Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/gcc-patch [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:plctlab/patchwork-gcc.git > git init /home/jenkins/agent/workspace/gcc-patch # timeout=10 Fetching upstream changes from git@github.com:plctlab/patchwork-gcc.git > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:plctlab/patchwork-gcc.git +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:plctlab/patchwork-gcc.git # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 Commit message: "RISC-V: Reorganize binary autovec testcases" > git rev-list --no-walk c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/plctlab/patchwork-gcc PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. [gcc-patch] $ /usr/bin/env bash /tmp/jenkins14534779616875864991.sh + git config pw.server https://patchwork.plctlab.org/api/1.2/ + git config pw.project gcc-patch + git config pw.token [*******] ++ date +%Y-%m + now_date=2024-01 ++ date +%Y + now_date_year=2024 + bundle_name=gcc-patch_2024-01 ++ curl -s -H 'Authorization: Token [*******]' 'https://patchwork.plctlab.org/api/1.2/bundles/?project=gcc-patch&per_page=999' + bundle_response='[{"id":4,"url":"https://patchwork.plctlab.org/api/1.2/bundles/4/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-10/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-10","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":1618,"url":"https://patchwork.plctlab.org/api/1.2/patches/1618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001005720.28208-1-palmer@rivosinc.com/","msgid":"<20221001005720.28208-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-01T00:57:20","name":"Fix the build of record_edge_info()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001005720.28208-1-palmer@rivosinc.com/mbox/"},{"id":1621,"url":"https://patchwork.plctlab.org/api/1.2/patches/1621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041443.2211752-1-jason@redhat.com/","msgid":"<20221001041443.2211752-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-01T04:14:43","name":"[pushed] c++: cast split_nonconstant_init return val to void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041443.2211752-1-jason@redhat.com/mbox/"},{"id":1622,"url":"https://patchwork.plctlab.org/api/1.2/patches/1622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041502.2211988-1-jason@redhat.com/","msgid":"<20221001041502.2211988-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-01T04:15:02","name":"[pushed] c++: loop through array CONSTRUCTOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041502.2211988-1-jason@redhat.com/mbox/"},{"id":1624,"url":"https://patchwork.plctlab.org/api/1.2/patches/1624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com/","msgid":"<36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com>","list_archive_url":null,"date":"2022-10-01T04:52:12","name":"[committed] Improve Z flag handling on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com/mbox/"},{"id":1628,"url":"https://patchwork.plctlab.org/api/1.2/patches/1628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001075659.63410-1-julian@codesourcery.com/","msgid":"<20221001075659.63410-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-01T07:56:59","name":"OpenACC: Fix struct-component-kind-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001075659.63410-1-julian@codesourcery.com/mbox/"},{"id":1629,"url":"https://patchwork.plctlab.org/api/1.2/patches/1629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com/","msgid":"<0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com>","list_archive_url":null,"date":"2022-10-01T18:34:45","name":"Adding a new thread model to GCC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com/mbox/"},{"id":1630,"url":"https://patchwork.plctlab.org/api/1.2/patches/1630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001184004.3599748-1-arsen@aarsen.me/","msgid":"<20221001184004.3599748-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-01T18:40:05","name":"libstdc++: Use ///< for inline documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001184004.3599748-1-arsen@aarsen.me/mbox/"},{"id":1632,"url":"https://patchwork.plctlab.org/api/1.2/patches/1632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzl3afY3XTnM7sQ+@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-02T11:35:05","name":"c++: Disallow jumps into statement expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzl3afY3XTnM7sQ+@tucnak/mbox/"},{"id":1633,"url":"https://patchwork.plctlab.org/api/1.2/patches/1633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzmjs5JhXasdpTx4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-02T14:44:03","name":"[committed] tree-cfg: Fix a verification diagnostic typo [PR107121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzmjs5JhXasdpTx4@tucnak/mbox/"},{"id":1634,"url":"https://patchwork.plctlab.org/api/1.2/patches/1634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd6be261-fe0d-5b35-cffc-3eafded00bec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-02T17:47:18","name":"Fortran: Add OpenMP'\''s assume(s) directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd6be261-fe0d-5b35-cffc-3eafded00bec@codesourcery.com/mbox/"},{"id":1636,"url":"https://patchwork.plctlab.org/api/1.2/patches/1636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5bb46ca-bb5f-f177-5082-b16f38004ecb@netcologne.de/","msgid":"","list_archive_url":null,"date":"2022-10-02T20:07:34","name":"[RFC.,Fortran] Some clobbering for INTENT(OUT) arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5bb46ca-bb5f-f177-5082-b16f38004ecb@netcologne.de/mbox/"},{"id":1639,"url":"https://patchwork.plctlab.org/api/1.2/patches/1639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542EFA4C26432C5D92ADA04915B9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T06:08:37","name":"Set discriminators for call stmts on the same line within the same basic block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542EFA4C26432C5D92ADA04915B9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1645,"url":"https://patchwork.plctlab.org/api/1.2/patches/1645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003104351.408835-1-christophe.lyon@arm.com/","msgid":"<20221003104351.408835-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-10-03T10:43:51","name":"arm: Add missing early clobber to MVE vrev64q_m patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003104351.408835-1-christophe.lyon@arm.com/mbox/"},{"id":1650,"url":"https://patchwork.plctlab.org/api/1.2/patches/1650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-1-aldyh@redhat.com/","msgid":"<20221003110815.1075975-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:12","name":"[COMMITTED] Do not compare incompatible ranges in ipa-prop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-1-aldyh@redhat.com/mbox/"},{"id":1653,"url":"https://patchwork.plctlab.org/api/1.2/patches/1653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-2-aldyh@redhat.com/","msgid":"<20221003110815.1075975-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:13","name":"[COMMITTED] Do not compare nonzero masks for varying.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-2-aldyh@redhat.com/mbox/"},{"id":1651,"url":"https://patchwork.plctlab.org/api/1.2/patches/1651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-3-aldyh@redhat.com/","msgid":"<20221003110815.1075975-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:14","name":"[COMMITTED] Avoid comparing ranges when sub-ranges is 0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-3-aldyh@redhat.com/mbox/"},{"id":1652,"url":"https://patchwork.plctlab.org/api/1.2/patches/1652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-4-aldyh@redhat.com/","msgid":"<20221003110815.1075975-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:15","name":"[COMMITTED] Do not pessimize range in set_nonzero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-4-aldyh@redhat.com/mbox/"},{"id":1654,"url":"https://patchwork.plctlab.org/api/1.2/patches/1654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003114641.367692-1-jwakely@redhat.com/","msgid":"<20221003114641.367692-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:46:41","name":"[committed] libstdc++: Fix tests broken by C++23 P2266R3 \"Simpler implicit move\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003114641.367692-1-jwakely@redhat.com/mbox/"},{"id":1655,"url":"https://patchwork.plctlab.org/api/1.2/patches/1655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddy1txazmv.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-10-03T11:57:12","name":"[COMMITTED] libsanitizer: Fix Solaris 11.3 compilation of sanitizer_procmaps_solaris.cpp [PR105531]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddy1txazmv.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":1657,"url":"https://patchwork.plctlab.org/api/1.2/patches/1657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210031311260.789254@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-03T13:12:04","name":"[committed] c: Adjust LDBL_EPSILON for C2x for IBM long double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210031311260.789254@digraph.polyomino.org.uk/mbox/"},{"id":1658,"url":"https://patchwork.plctlab.org/api/1.2/patches/1658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39a8cab-7d04-ddc2-0e46-540325c6e84e@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T14:14:22","name":"PR tree-optimization/107109 - Don'\''t process undefined range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39a8cab-7d04-ddc2-0e46-540325c6e84e@redhat.com/mbox/"},{"id":1661,"url":"https://patchwork.plctlab.org/api/1.2/patches/1661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzs2gj1TqcWkldfN@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-03T19:22:42","name":"c++, c, v2: Implement C++23 P1774R8 - Portable assumptions [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzs2gj1TqcWkldfN@tucnak/mbox/"},{"id":1662,"url":"https://patchwork.plctlab.org/api/1.2/patches/1662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003203543.154431-1-arsen@aarsen.me/","msgid":"<20221003203543.154431-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-03T20:35:44","name":"elf: ELF toolchain --without-{headers, newlib} should provide stdint.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003203543.154431-1-arsen@aarsen.me/mbox/"},{"id":1663,"url":"https://patchwork.plctlab.org/api/1.2/patches/1663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003210247.457336-1-jwakely@redhat.com/","msgid":"<20221003210247.457336-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-03T21:02:47","name":"[committed] libstdc++: Update status docs for compare_exchange padding bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003210247.457336-1-jwakely@redhat.com/mbox/"},{"id":1664,"url":"https://patchwork.plctlab.org/api/1.2/patches/1664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212402.3337669-1-philipp.tomsich@vrull.eu/","msgid":"<20221003212402.3337669-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-03T21:24:02","name":"aarch64: update Ampere-1 core definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212402.3337669-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1665,"url":"https://patchwork.plctlab.org/api/1.2/patches/1665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212419.3337714-1-philipp.tomsich@vrull.eu/","msgid":"<20221003212419.3337714-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-03T21:24:19","name":"aarch64: fix off-by-one in reading cpuinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212419.3337714-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1666,"url":"https://patchwork.plctlab.org/api/1.2/patches/1666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ead367999f6136b51ae6206184a1193864b234aa.1664836268.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T22:32:14","name":"diagnostics: Add test for fixed _Pragma location issue [PR91669]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ead367999f6136b51ae6206184a1193864b234aa.1664836268.git.lhyatt@gmail.com/mbox/"},{"id":1667,"url":"https://patchwork.plctlab.org/api/1.2/patches/1667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004004216.1994023-1-ppalka@redhat.com/","msgid":"<20221004004216.1994023-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T00:42:16","name":"c++: install cp-trait.def as part of plugin headers [PR107136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004004216.1994023-1-ppalka@redhat.com/mbox/"},{"id":1668,"url":"https://patchwork.plctlab.org/api/1.2/patches/1668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004011115.2009591-1-ppalka@redhat.com/","msgid":"<20221004011115.2009591-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T01:11:15","name":"libstdc++: Implement ranges::join_with_view from P2441R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004011115.2009591-1-ppalka@redhat.com/mbox/"},{"id":1669,"url":"https://patchwork.plctlab.org/api/1.2/patches/1669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004042831.1419926-1-aldyh@redhat.com/","msgid":"<20221004042831.1419926-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T04:28:31","name":"[COMMITTED,PR107130] range-ops: Separate out ffs and popcount optimizations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004042831.1419926-1-aldyh@redhat.com/mbox/"},{"id":1670,"url":"https://patchwork.plctlab.org/api/1.2/patches/1670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004073530.1461390-1-aldyh@redhat.com/","msgid":"<20221004073530.1461390-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T07:35:30","name":"[COMMITTED] Convert nonzero mask in irange to wide_int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004073530.1461390-1-aldyh@redhat.com/mbox/"},{"id":1674,"url":"https://patchwork.plctlab.org/api/1.2/patches/1674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv3kyZFBYlJpeyL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-04T09:06:27","name":"middle-end, c++, i386, libgcc: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv3kyZFBYlJpeyL@tucnak/mbox/"},{"id":1675,"url":"https://patchwork.plctlab.org/api/1.2/patches/1675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv4q6gMMgJnAMQj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-04T09:11:07","name":"attribs: Add missing auto_diagnostic_group 3 times","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv4q6gMMgJnAMQj@tucnak/mbox/"},{"id":1680,"url":"https://patchwork.plctlab.org/api/1.2/patches/1680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004112849.27678-1-stefansf@linux.ibm.com/","msgid":"<20221004112849.27678-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2022-10-04T11:28:50","name":"cselib: Skip BImode while keeping track of subvalue relations [PR107088]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004112849.27678-1-stefansf@linux.ibm.com/mbox/"},{"id":1685,"url":"https://patchwork.plctlab.org/api/1.2/patches/1685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-1-jwakely@redhat.com/","msgid":"<20221004141138.530214-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:35","name":"[committed] libstdc++: Define functions for freestanding [PR107135]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-1-jwakely@redhat.com/mbox/"},{"id":1683,"url":"https://patchwork.plctlab.org/api/1.2/patches/1683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-2-jwakely@redhat.com/","msgid":"<20221004141138.530214-2-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:36","name":"[committed] libstdc++: Make work freestanding [PR107134]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-2-jwakely@redhat.com/mbox/"},{"id":1682,"url":"https://patchwork.plctlab.org/api/1.2/patches/1682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-3-jwakely@redhat.com/","msgid":"<20221004141138.530214-3-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:37","name":"[committed] libstdc++: Enable std::hash> [PR107139]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-3-jwakely@redhat.com/mbox/"},{"id":1684,"url":"https://patchwork.plctlab.org/api/1.2/patches/1684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-4-jwakely@redhat.com/","msgid":"<20221004141138.530214-4-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:38","name":"[committed] libstdc++: Disable test for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-4-jwakely@redhat.com/mbox/"},{"id":1686,"url":"https://patchwork.plctlab.org/api/1.2/patches/1686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004151200.1275636-2-ben.boeckel@kitware.com/","msgid":"<20221004151200.1275636-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-04T15:12:00","name":"[RESEND,1/1] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004151200.1275636-2-ben.boeckel@kitware.com/mbox/"},{"id":1687,"url":"https://patchwork.plctlab.org/api/1.2/patches/1687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152132.GA1906@delia.home/","msgid":"<20221004152132.GA1906@delia.home>","list_archive_url":null,"date":"2022-10-04T15:21:33","name":"Add --without-makeinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152132.GA1906@delia.home/mbox/"},{"id":1688,"url":"https://patchwork.plctlab.org/api/1.2/patches/1688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-2-qing.zhao@oracle.com/","msgid":"<20221004152154.1665626-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-04T15:21:52","name":"[GCC13,V5,1/2] Add a new option -fstrict-flex-arrays[=n] and new attribute strict_flex_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-2-qing.zhao@oracle.com/mbox/"},{"id":1689,"url":"https://patchwork.plctlab.org/api/1.2/patches/1689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-3-qing.zhao@oracle.com/","msgid":"<20221004152154.1665626-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-04T15:21:53","name":"[GCC13,V5,2/2] Use array_at_struct_end_p in __builtin_object_size [PR101836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-3-qing.zhao@oracle.com/mbox/"},{"id":1692,"url":"https://patchwork.plctlab.org/api/1.2/patches/1692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0znk0h0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T16:38:51","name":"aarch64: Define __ARM_FEATURE_RCPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0znk0h0.fsf@arm.com/mbox/"},{"id":1693,"url":"https://patchwork.plctlab.org/api/1.2/patches/1693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164624.558722-1-jwakely@redhat.com/","msgid":"<20221004164624.558722-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:24","name":"[committed] libstdc++: Refactor seed sequence constraints in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164624.558722-1-jwakely@redhat.com/mbox/"},{"id":1694,"url":"https://patchwork.plctlab.org/api/1.2/patches/1694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164631.558750-1-jwakely@redhat.com/","msgid":"<20221004164631.558750-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:31","name":"[committed] libstdc++: Use new built-ins __remove_cv, __remove_reference etc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164631.558750-1-jwakely@redhat.com/mbox/"},{"id":1695,"url":"https://patchwork.plctlab.org/api/1.2/patches/1695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164637.558771-1-jwakely@redhat.com/","msgid":"<20221004164637.558771-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:37","name":"[committed] libstdc++: Fix test FAIL for old std::string ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164637.558771-1-jwakely@redhat.com/mbox/"},{"id":1696,"url":"https://patchwork.plctlab.org/api/1.2/patches/1696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004165109.559028-1-jwakely@redhat.com/","msgid":"<20221004165109.559028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:51:09","name":"[RFC] libstdc++: Generate error_constants.h from [PR104883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004165109.559028-1-jwakely@redhat.com/mbox/"},{"id":1697,"url":"https://patchwork.plctlab.org/api/1.2/patches/1697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFFmr-7NZef+QOtv2rzcvu4Sc66sTsikGf_gju_fFgGGwi0m_w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T17:06:21","name":"improved const shifts for AVR targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFFmr-7NZef+QOtv2rzcvu4Sc66sTsikGf_gju_fFgGGwi0m_w@mail.gmail.com/mbox/"},{"id":1698,"url":"https://patchwork.plctlab.org/api/1.2/patches/1698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901CEA2D310CDB76A47600C835A9@AS4PR08MB7901.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T17:22:35","name":"[AArch64] Improve immediate expansion [PR106583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901CEA2D310CDB76A47600C835A9@AS4PR08MB7901.eurprd08.prod.outlook.com/mbox/"},{"id":1699,"url":"https://patchwork.plctlab.org/api/1.2/patches/1699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004173631.2958133-1-ppalka@redhat.com/","msgid":"<20221004173631.2958133-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T17:36:31","name":"c++ modules: lazy loading from within template [PR99377]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004173631.2958133-1-ppalka@redhat.com/mbox/"},{"id":1700,"url":"https://patchwork.plctlab.org/api/1.2/patches/1700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004175221.1493497-1-aldyh@redhat.com/","msgid":"<20221004175221.1493497-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T17:52:21","name":"[COMMITTED] Remove assert from set_nonzero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004175221.1493497-1-aldyh@redhat.com/mbox/"},{"id":1701,"url":"https://patchwork.plctlab.org/api/1.2/patches/1701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6d934a50-8304-4704-bce4-36a2afbc687e-1664911631690@3c-app-gmx-bs14/","msgid":"","list_archive_url":null,"date":"2022-10-04T19:27:11","name":"Fortran: reject procedures and procedure pointers as output item [PR107074]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6d934a50-8304-4704-bce4-36a2afbc687e-1664911631690@3c-app-gmx-bs14/mbox/"},{"id":1703,"url":"https://patchwork.plctlab.org/api/1.2/patches/1703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-79a6df2f-08a1-4f6d-9431-70f884d1c05c-1664918395982@3c-app-gmx-bs23/","msgid":"","list_archive_url":null,"date":"2022-10-04T21:19:56","name":"Fortran: error recovery for invalid types in array constructors [PR107000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-79a6df2f-08a1-4f6d-9431-70f884d1c05c-1664918395982@3c-app-gmx-bs23/mbox/"},{"id":1704,"url":"https://patchwork.plctlab.org/api/1.2/patches/1704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004225229.3104706-1-jason@redhat.com/","msgid":"<20221004225229.3104706-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-04T22:52:29","name":"[pushed] c++: fix debug info for array temporary [PR107154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004225229.3104706-1-jason@redhat.com/mbox/"},{"id":1705,"url":"https://patchwork.plctlab.org/api/1.2/patches/1705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzy8bdzUiCfLImkn@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T23:06:21","name":"[v2] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzy8bdzUiCfLImkn@redhat.com/mbox/"},{"id":1706,"url":"https://patchwork.plctlab.org/api/1.2/patches/1706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002418.710712-1-dmalcolm@redhat.com/","msgid":"<20221005002418.710712-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:18","name":"[committed] analyzer: widening_svalues take a function_point rather than a program_point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002418.710712-1-dmalcolm@redhat.com/mbox/"},{"id":1707,"url":"https://patchwork.plctlab.org/api/1.2/patches/1707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002423.710736-1-dmalcolm@redhat.com/","msgid":"<20221005002423.710736-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:23","name":"[committed] analyzer: fold -(-(VAL)) to VAL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002423.710736-1-dmalcolm@redhat.com/mbox/"},{"id":1709,"url":"https://patchwork.plctlab.org/api/1.2/patches/1709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002427.710760-1-dmalcolm@redhat.com/","msgid":"<20221005002427.710760-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:27","name":"[committed] analyzer: move region_model_manager decl to its own header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002427.710760-1-dmalcolm@redhat.com/mbox/"},{"id":1708,"url":"https://patchwork.plctlab.org/api/1.2/patches/1708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002431.710784-1-dmalcolm@redhat.com/","msgid":"<20221005002431.710784-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:31","name":"[committed] analyzer: revamp side-effects of call summaries [PR107072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002431.710784-1-dmalcolm@redhat.com/mbox/"},{"id":1720,"url":"https://patchwork.plctlab.org/api/1.2/patches/1720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1UiUPXZGIGXRJV@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-05T09:55:21","name":"c++, c, v3: Implement C++23 P1774R8 - Portable assumptions [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1UiUPXZGIGXRJV@tucnak/mbox/"},{"id":1721,"url":"https://patchwork.plctlab.org/api/1.2/patches/1721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz/","msgid":"<52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz>","list_archive_url":null,"date":"2022-10-05T10:15:33","name":"[pushed] testsuite: mark a test with xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz/mbox/"},{"id":1722,"url":"https://patchwork.plctlab.org/api/1.2/patches/1722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz/","msgid":"<7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz>","list_archive_url":null,"date":"2022-10-05T11:35:10","name":"[pushed] analyzer: remove unused variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz/mbox/"},{"id":1723,"url":"https://patchwork.plctlab.org/api/1.2/patches/1723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df64a08d-7bbf-8270-b922-bf7016f874de@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-05T11:41:37","name":"IPA: support -flto + -flive-patching=inline-clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df64a08d-7bbf-8270-b922-bf7016f874de@suse.cz/mbox/"},{"id":1724,"url":"https://patchwork.plctlab.org/api/1.2/patches/1724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6876baac-15f9-0450-72ec-1f0b85348392@suse.cz/","msgid":"<6876baac-15f9-0450-72ec-1f0b85348392@suse.cz>","list_archive_url":null,"date":"2022-10-05T11:42:37","name":"c: support attribs starting with '\''_'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6876baac-15f9-0450-72ec-1f0b85348392@suse.cz/mbox/"},{"id":1725,"url":"https://patchwork.plctlab.org/api/1.2/patches/1725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eea8eca0-6b5d-c5fa-e5bd-aa5409bd78c6@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-05T11:49:40","name":"c: support attribs starting with '\''_'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eea8eca0-6b5d-c5fa-e5bd-aa5409bd78c6@suse.cz/mbox/"},{"id":1728,"url":"https://patchwork.plctlab.org/api/1.2/patches/1728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-05T12:04:02","name":"[1/2] gcov: test switch/break line counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1726,"url":"https://patchwork.plctlab.org/api/1.2/patches/1726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-05T12:04:03","name":"[2/2] Split edge when edge locus and dest don'\''t match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1727,"url":"https://patchwork.plctlab.org/api/1.2/patches/1727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1y4yx9FYrPBeEw@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-05T12:04:51","name":"c++: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1y4yx9FYrPBeEw@tucnak/mbox/"},{"id":1729,"url":"https://patchwork.plctlab.org/api/1.2/patches/1729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122154.1579701-1-aldyh@redhat.com/","msgid":"<20221005122154.1579701-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:21:53","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Pass nonzero masks through cast.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122154.1579701-1-aldyh@redhat.com/mbox/"},{"id":1730,"url":"https://patchwork.plctlab.org/api/1.2/patches/1730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-1-aldyh@redhat.com/","msgid":"<20221005122236.1579762-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:22:35","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Pass nonzero masks through cast.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-1-aldyh@redhat.com/mbox/"},{"id":1731,"url":"https://patchwork.plctlab.org/api/1.2/patches/1731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-2-aldyh@redhat.com/","msgid":"<20221005122236.1579762-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:22:36","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Take into account nonzero mask in popcount.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-2-aldyh@redhat.com/mbox/"},{"id":1732,"url":"https://patchwork.plctlab.org/api/1.2/patches/1732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901314F7E77FB81A079AE5F835D9@AS4PR08MB7901.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-05T12:30:22","name":"[AArch64] Improve bit tests [PR105773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901314F7E77FB81A079AE5F835D9@AS4PR08MB7901.eurprd08.prod.outlook.com/mbox/"},{"id":1733,"url":"https://patchwork.plctlab.org/api/1.2/patches/1733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005124628.701564-1-jwakely@redhat.com/","msgid":"<20221005124628.701564-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:46:28","name":"[committed] libstdc++: Guard use of new built-in with __has_builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005124628.701564-1-jwakely@redhat.com/mbox/"},{"id":1734,"url":"https://patchwork.plctlab.org/api/1.2/patches/1734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005131611.703378-1-jwakely@redhat.com/","msgid":"<20221005131611.703378-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-05T13:16:11","name":"[committed] libtdc++: Regenerate Makefile.in after freestanding header changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005131611.703378-1-jwakely@redhat.com/mbox/"},{"id":1735,"url":"https://patchwork.plctlab.org/api/1.2/patches/1735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005134932.1584257-1-aldyh@redhat.com/","msgid":"<20221005134932.1584257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T13:49:32","name":"[COMMITTED] range-op: Keep nonzero mask up to date with truncating casts.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005134932.1584257-1-aldyh@redhat.com/mbox/"},{"id":1736,"url":"https://patchwork.plctlab.org/api/1.2/patches/1736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005141023.3206443-1-jason@redhat.com/","msgid":"<20221005141023.3206443-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-05T14:10:23","name":"[pushed] c++: lvalue_kind tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005141023.3206443-1-jason@redhat.com/mbox/"},{"id":1737,"url":"https://patchwork.plctlab.org/api/1.2/patches/1737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005145639.273140-1-torbjorn.svensson@foss.st.com/","msgid":"<20221005145639.273140-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-05T14:56:39","name":"[v2] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005145639.273140-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1738,"url":"https://patchwork.plctlab.org/api/1.2/patches/1738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4094054.1IzOArtZ34@fomalhaut/","msgid":"<4094054.1IzOArtZ34@fomalhaut>","list_archive_url":null,"date":"2022-10-05T15:36:48","name":"Fix wrong code generated by unroll-and-jam pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4094054.1IzOArtZ34@fomalhaut/mbox/"},{"id":1739,"url":"https://patchwork.plctlab.org/api/1.2/patches/1739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175630.748655-1-dmalcolm@redhat.com/","msgid":"<20221005175630.748655-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T17:56:30","name":"[committed] analyzer: fix ICEs seen with call summaries on PR 107060","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175630.748655-1-dmalcolm@redhat.com/mbox/"},{"id":1740,"url":"https://patchwork.plctlab.org/api/1.2/patches/1740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175634.748680-1-dmalcolm@redhat.com/","msgid":"<20221005175634.748680-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T17:56:34","name":"[committed] analyzer: simplify some includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175634.748680-1-dmalcolm@redhat.com/mbox/"},{"id":1741,"url":"https://patchwork.plctlab.org/api/1.2/patches/1741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005181127.749161-1-dmalcolm@redhat.com/","msgid":"<20221005181127.749161-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T18:11:27","name":"[committed] analyzer: add regression test for PR 107158","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005181127.749161-1-dmalcolm@redhat.com/mbox/"},{"id":1742,"url":"https://patchwork.plctlab.org/api/1.2/patches/1742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz/","msgid":"<29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz>","list_archive_url":null,"date":"2022-10-05T18:41:48","name":"[pushed] contrib: run fetch before pushing Daily bump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz/mbox/"},{"id":1744,"url":"https://patchwork.plctlab.org/api/1.2/patches/1744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org/","msgid":"<19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2022-10-05T19:08:39","name":"[1/3] rs6000: Remove \"wD\" from *vsx_extract__store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1743,"url":"https://patchwork.plctlab.org/api/1.2/patches/1743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe062c35be96fbcac92681f9e986745f4be78b6f.1664994970.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-05T19:08:40","name":"[2/3] rs6000: Rework vsx_extract_","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe062c35be96fbcac92681f9e986745f4be78b6f.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1745,"url":"https://patchwork.plctlab.org/api/1.2/patches/1745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org/","msgid":"<0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2022-10-05T19:08:41","name":"[3/3] rs6000: Remove the wD constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1747,"url":"https://patchwork.plctlab.org/api/1.2/patches/1747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-2-qing.zhao@oracle.com/","msgid":"<20221005191320.2087486-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-05T19:13:19","name":"[GCC13,V6,1/2] Add a new option -fstrict-flex-arrays[=n] and new attribute strict_flex_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-2-qing.zhao@oracle.com/mbox/"},{"id":1746,"url":"https://patchwork.plctlab.org/api/1.2/patches/1746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-3-qing.zhao@oracle.com/","msgid":"<20221005191320.2087486-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-05T19:13:20","name":"[GCC13,V6,2/2] Use array_at_struct_end_p in __builtin_object_size [PR101836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-3-qing.zhao@oracle.com/mbox/"},{"id":1748,"url":"https://patchwork.plctlab.org/api/1.2/patches/1748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005212744.640285-1-polacek@redhat.com/","msgid":"<20221005212744.640285-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-05T21:27:44","name":"c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005212744.640285-1-polacek@redhat.com/mbox/"},{"id":1749,"url":"https://patchwork.plctlab.org/api/1.2/patches/1749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210060120550.917581@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-06T01:21:22","name":"c: C2x typeof","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210060120550.917581@digraph.polyomino.org.uk/mbox/"},{"id":1750,"url":"https://patchwork.plctlab.org/api/1.2/patches/1750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006020226.3629040-1-ppalka@redhat.com/","msgid":"<20221006020226.3629040-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-06T02:02:26","name":"c++: remove optimize_specialization_lookup_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006020226.3629040-1-ppalka@redhat.com/mbox/"},{"id":1753,"url":"https://patchwork.plctlab.org/api/1.2/patches/1753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-1-aldyh@redhat.com/","msgid":"<20221006062318.1709996-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:16","name":"[COMMITTED] Do not double print INF and NAN in frange pretty printer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-1-aldyh@redhat.com/mbox/"},{"id":1755,"url":"https://patchwork.plctlab.org/api/1.2/patches/1755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-2-aldyh@redhat.com/","msgid":"<20221006062318.1709996-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:17","name":"[COMMITTED] Do not check finite_operands_p twice in range-ops-float.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-2-aldyh@redhat.com/mbox/"},{"id":1754,"url":"https://patchwork.plctlab.org/api/1.2/patches/1754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-3-aldyh@redhat.com/","msgid":"<20221006062318.1709996-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:18","name":"[COMMITTED] Setting explicit NANs sets UNDEFINED for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-3-aldyh@redhat.com/mbox/"},{"id":1756,"url":"https://patchwork.plctlab.org/api/1.2/patches/1756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz6VAi7u7pMLbb4K@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T08:42:42","name":"[committed] openmp: Map holds clause to IFN_ASSUME for C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz6VAi7u7pMLbb4K@tucnak/mbox/"},{"id":1757,"url":"https://patchwork.plctlab.org/api/1.2/patches/1757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006091056.1480675-1-claziss@gmail.com/","msgid":"<20221006091056.1480675-1-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-06T09:10:56","name":"[committed] arc: Remove max-page-size and common-page-size forced setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006091056.1480675-1-claziss@gmail.com/mbox/"},{"id":1758,"url":"https://patchwork.plctlab.org/api/1.2/patches/1758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz/","msgid":"<045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz>","list_archive_url":null,"date":"2022-10-06T09:16:17","name":"[pushed] git_update_version: add robust logging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz/mbox/"},{"id":1759,"url":"https://patchwork.plctlab.org/api/1.2/patches/1759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092544.260196-1-poulhies@adacore.com/","msgid":"<20221006092544.260196-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:25:44","name":"[COMMITED] ada: Fix spurious warning on unreferenced refinement constituents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092544.260196-1-poulhies@adacore.com/mbox/"},{"id":1760,"url":"https://patchwork.plctlab.org/api/1.2/patches/1760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092643.260420-1-poulhies@adacore.com/","msgid":"<20221006092643.260420-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:26:43","name":"[COMMITED] ada: Disable slice-of-component optimization in some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092643.260420-1-poulhies@adacore.com/mbox/"},{"id":1761,"url":"https://patchwork.plctlab.org/api/1.2/patches/1761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092734.260579-1-poulhies@adacore.com/","msgid":"<20221006092734.260579-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:27:34","name":"[COMMITED] ada: Do not issue compiler warnings in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092734.260579-1-poulhies@adacore.com/mbox/"},{"id":1762,"url":"https://patchwork.plctlab.org/api/1.2/patches/1762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092810.260715-1-poulhies@adacore.com/","msgid":"<20221006092810.260715-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:28:10","name":"[COMMITED] ada: Clean up slice-of-component optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092810.260715-1-poulhies@adacore.com/mbox/"},{"id":1763,"url":"https://patchwork.plctlab.org/api/1.2/patches/1763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092840.607374-1-philipp.tomsich@vrull.eu/","msgid":"<20221006092840.607374-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-06T09:28:39","name":"[v2] aarch64: fix off-by-one in reading cpuinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092840.607374-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1764,"url":"https://patchwork.plctlab.org/api/1.2/patches/1764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092847.260877-1-poulhies@adacore.com/","msgid":"<20221006092847.260877-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:28:47","name":"[COMMITED] ada: Accessibility error incorrectly flagged on call within Pre'\''Class expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092847.260877-1-poulhies@adacore.com/mbox/"},{"id":1765,"url":"https://patchwork.plctlab.org/api/1.2/patches/1765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092929.261152-1-poulhies@adacore.com/","msgid":"<20221006092929.261152-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:29","name":"[COMMITED] ada: Incorrect inferences drawn from if/elsif/while conditions with -gnatVo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092929.261152-1-poulhies@adacore.com/mbox/"},{"id":1767,"url":"https://patchwork.plctlab.org/api/1.2/patches/1767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092943.261301-1-poulhies@adacore.com/","msgid":"<20221006092943.261301-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:43","name":"[COMMITED] ada: Add C declarations for Storage Model support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092943.261301-1-poulhies@adacore.com/mbox/"},{"id":1768,"url":"https://patchwork.plctlab.org/api/1.2/patches/1768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.607412-1-philipp.tomsich@vrull.eu/","msgid":"<20221006092951.607412-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-06T09:29:51","name":"[v2] aarch64: update Ampere-1 core definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.607412-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1766,"url":"https://patchwork.plctlab.org/api/1.2/patches/1766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.261362-1-poulhies@adacore.com/","msgid":"<20221006092951.261362-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:51","name":"[COMMITED] ada: Fix inserting of validity checks in lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.261362-1-poulhies@adacore.com/mbox/"},{"id":1772,"url":"https://patchwork.plctlab.org/api/1.2/patches/1772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093006.261475-1-poulhies@adacore.com/","msgid":"<20221006093006.261475-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:30:06","name":"[COMMITED] ada: stack scrubbing: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093006.261475-1-poulhies@adacore.com/mbox/"},{"id":1769,"url":"https://patchwork.plctlab.org/api/1.2/patches/1769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093051.261719-1-poulhies@adacore.com/","msgid":"<20221006093051.261719-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:30:51","name":"[COMMITED] ada: hardened booleans: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093051.261719-1-poulhies@adacore.com/mbox/"},{"id":1770,"url":"https://patchwork.plctlab.org/api/1.2/patches/1770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093108.261899-1-poulhies@adacore.com/","msgid":"<20221006093108.261899-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:08","name":"[COMMITED] ada: hardened conditionals: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093108.261899-1-poulhies@adacore.com/mbox/"},{"id":1771,"url":"https://patchwork.plctlab.org/api/1.2/patches/1771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093112.261959-1-poulhies@adacore.com/","msgid":"<20221006093112.261959-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:12","name":"[COMMITED] ada: Cleanup related to lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093112.261959-1-poulhies@adacore.com/mbox/"},{"id":1773,"url":"https://patchwork.plctlab.org/api/1.2/patches/1773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093127.262068-1-poulhies@adacore.com/","msgid":"<20221006093127.262068-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:27","name":"[COMMITED] ada: Reject conditional goto in lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093127.262068-1-poulhies@adacore.com/mbox/"},{"id":1774,"url":"https://patchwork.plctlab.org/api/1.2/patches/1774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093142.262226-1-poulhies@adacore.com/","msgid":"<20221006093142.262226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:42","name":"[COMMITED] ada: Minor potential bug in sem_ch6.adb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093142.262226-1-poulhies@adacore.com/mbox/"},{"id":1775,"url":"https://patchwork.plctlab.org/api/1.2/patches/1775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093147.262286-1-poulhies@adacore.com/","msgid":"<20221006093147.262286-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:47","name":"[COMMITED] ada: Implementation of support for storage models in gigi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093147.262286-1-poulhies@adacore.com/mbox/"},{"id":1778,"url":"https://patchwork.plctlab.org/api/1.2/patches/1778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006100752.1E029383FB9B@sourceware.org/","msgid":"<20221006100752.1E029383FB9B@sourceware.org>","list_archive_url":null,"date":"2022-10-06T10:07:08","name":"tree-optimization/107107 - tail-merging VN wrong-code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006100752.1E029383FB9B@sourceware.org/mbox/"},{"id":1779,"url":"https://patchwork.plctlab.org/api/1.2/patches/1779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006105110.1719060-1-aldyh@redhat.com/","msgid":"<20221006105110.1719060-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T10:51:10","name":"[RFC] Add op1_range for __builtin_signbit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006105110.1719060-1-aldyh@redhat.com/mbox/"},{"id":1780,"url":"https://patchwork.plctlab.org/api/1.2/patches/1780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e747364c-f716-1661-2570-590a4c47820c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T10:55:01","name":"openmp: Map holds clause to IFN_ASSUME for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e747364c-f716-1661-2570-590a4c47820c@codesourcery.com/mbox/"},{"id":1782,"url":"https://patchwork.plctlab.org/api/1.2/patches/1782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006122037.48AAF3839DFC@sourceware.org/","msgid":"<20221006122037.48AAF3839DFC@sourceware.org>","list_archive_url":null,"date":"2022-10-06T12:19:53","name":"middle-end/107115 - avoid bogus redundant store removal during RTL expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006122037.48AAF3839DFC@sourceware.org/mbox/"},{"id":1783,"url":"https://patchwork.plctlab.org/api/1.2/patches/1783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu/","msgid":"<20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2022-10-06T14:34:00","name":"[RFC] c++: parser - Support for target address spaces in C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":1784,"url":"https://patchwork.plctlab.org/api/1.2/patches/1784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz7rBzPwUuBl4VQb@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T14:49:43","name":"[v2] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz7rBzPwUuBl4VQb@redhat.com/mbox/"},{"id":1785,"url":"https://patchwork.plctlab.org/api/1.2/patches/1785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com/","msgid":"<55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com>","list_archive_url":null,"date":"2022-10-06T16:01:36","name":"gcc-12: FTBFS on hurd-i386","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com/mbox/"},{"id":1786,"url":"https://patchwork.plctlab.org/api/1.2/patches/1786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006161916.4118820-1-ppalka@redhat.com/","msgid":"<20221006161916.4118820-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-06T16:19:16","name":"c++ modules: static var in inline function [PR104433]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006161916.4118820-1-ppalka@redhat.com/mbox/"},{"id":1787,"url":"https://patchwork.plctlab.org/api/1.2/patches/1787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ObKI+7c+ai+g4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T17:20:44","name":"c++, v2: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ObKI+7c+ai+g4@tucnak/mbox/"},{"id":1788,"url":"https://patchwork.plctlab.org/api/1.2/patches/1788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2601473.BddDVKsqQX@fomalhaut/","msgid":"<2601473.BddDVKsqQX@fomalhaut>","list_archive_url":null,"date":"2022-10-06T17:25:53","name":"Reduce DF computation at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2601473.BddDVKsqQX@fomalhaut/mbox/"},{"id":1789,"url":"https://patchwork.plctlab.org/api/1.2/patches/1789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com/","msgid":"<4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com>","list_archive_url":null,"date":"2022-10-06T17:38:09","name":"Fix gdb FilteringTypePrinter (again)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com/mbox/"},{"id":1790,"url":"https://patchwork.plctlab.org/api/1.2/patches/1790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006182251.3453018-1-jason@redhat.com/","msgid":"<20221006182251.3453018-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-06T18:22:51","name":"[RFA] gimplify: prevent some C++ temporary elision","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006182251.3453018-1-jason@redhat.com/mbox/"},{"id":1791,"url":"https://patchwork.plctlab.org/api/1.2/patches/1791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ecbP4fDo7NivD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T18:29:05","name":"c++, v3: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ecbP4fDo7NivD@tucnak/mbox/"},{"id":1792,"url":"https://patchwork.plctlab.org/api/1.2/patches/1792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006190255.361385-1-cf.natali@gmail.com/","msgid":"<20221006190255.361385-1-cf.natali@gmail.com>","list_archive_url":null,"date":"2022-10-06T19:02:56","name":"[v2] libstdc++: basic_filebuf: don'\''t flush more often than necessary.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006190255.361385-1-cf.natali@gmail.com/mbox/"},{"id":1794,"url":"https://patchwork.plctlab.org/api/1.2/patches/1794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195038.807580-1-dmalcolm@redhat.com/","msgid":"<20221006195038.807580-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-06T19:50:38","name":"[committed] analyzer: fixes to call_summary_replay::dump_to_pp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195038.807580-1-dmalcolm@redhat.com/mbox/"},{"id":1793,"url":"https://patchwork.plctlab.org/api/1.2/patches/1793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195043.807604-1-dmalcolm@redhat.com/","msgid":"<20221006195043.807604-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-06T19:50:43","name":"[committed] analyzer: fix another ICE in PR 107158","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195043.807604-1-dmalcolm@redhat.com/mbox/"},{"id":1795,"url":"https://patchwork.plctlab.org/api/1.2/patches/1795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006204035.1796190-1-aldyh@redhat.com/","msgid":"<20221006204035.1796190-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T20:40:35","name":"[COMMITTED,PR107170] Avoid copying incompatible types in legacy VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006204035.1796190-1-aldyh@redhat.com/mbox/"},{"id":1796,"url":"https://patchwork.plctlab.org/api/1.2/patches/1796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2128dcf14408b394358f51802e73bcc9d922889.camel@vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T21:29:57","name":"[rs6000] Fix addg6s builtin with long long parameters. (PR100693)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2128dcf14408b394358f51802e73bcc9d922889.camel@vnet.ibm.com/mbox/"},{"id":1797,"url":"https://patchwork.plctlab.org/api/1.2/patches/1797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9L+2VE5evyna+Z@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T21:43:23","name":"[v3] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9L+2VE5evyna+Z@redhat.com/mbox/"},{"id":1798,"url":"https://patchwork.plctlab.org/api/1.2/patches/1798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9UXQV4MrH5TbOC@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T22:19:09","name":"[committed] libgcc, arc: Fix build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9UXQV4MrH5TbOC@tucnak/mbox/"},{"id":1799,"url":"https://patchwork.plctlab.org/api/1.2/patches/1799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz+LH/upS8aybRBM@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T02:12:47","name":"[v3] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz+LH/upS8aybRBM@redhat.com/mbox/"},{"id":1800,"url":"https://patchwork.plctlab.org/api/1.2/patches/1800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXeSRifWKVEE3vW87v7CMJ--04uB=0i=dxKBA=8piwKcA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T02:15:39","name":"Go patch committed: better argument checking for builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXeSRifWKVEE3vW87v7CMJ--04uB=0i=dxKBA=8piwKcA@mail.gmail.com/mbox/"},{"id":1802,"url":"https://patchwork.plctlab.org/api/1.2/patches/1802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007040325.21276-1-kito.cheng@sifive.com/","msgid":"<20221007040325.21276-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-07T04:03:25","name":"PR middle-end/88345: Honor -falign-functions=N even optimized for size.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007040325.21276-1-kito.cheng@sifive.com/mbox/"},{"id":1804,"url":"https://patchwork.plctlab.org/api/1.2/patches/1804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz/REPRnQs0T2CXz@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-07T07:11:12","name":"[committed] Fix comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz/REPRnQs0T2CXz@tucnak/mbox/"},{"id":1805,"url":"https://patchwork.plctlab.org/api/1.2/patches/1805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbd6fff8-30fe-c840-ddf9-56f5bfaa6e16@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-07T08:11:39","name":"[pushed] remove dead variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbd6fff8-30fe-c840-ddf9-56f5bfaa6e16@suse.cz/mbox/"},{"id":1806,"url":"https://patchwork.plctlab.org/api/1.2/patches/1806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz/","msgid":"<4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz>","list_archive_url":null,"date":"2022-10-07T08:24:17","name":"[pushed] fix clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz/mbox/"},{"id":1807,"url":"https://patchwork.plctlab.org/api/1.2/patches/1807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz/","msgid":"<844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz>","list_archive_url":null,"date":"2022-10-07T08:35:35","name":"[pushed] libdecnumber: remove unused variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz/mbox/"},{"id":1808,"url":"https://patchwork.plctlab.org/api/1.2/patches/1808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz/","msgid":"<22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz>","list_archive_url":null,"date":"2022-10-07T09:36:24","name":"[pushed] contrib: remove extra fetch from git_update_version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz/mbox/"},{"id":1809,"url":"https://patchwork.plctlab.org/api/1.2/patches/1809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007114350.1212377-1-jwakely@redhat.com/","msgid":"<20221007114350.1212377-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:43:50","name":"[committed] libstdc++: Use bold style for DR titles in the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007114350.1212377-1-jwakely@redhat.com/mbox/"},{"id":1810,"url":"https://patchwork.plctlab.org/api/1.2/patches/1810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115701.1226696-1-jwakely@redhat.com/","msgid":"<20221007115701.1226696-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:57:01","name":"[committed] libstdc++: Shuffle header dependencies of ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115701.1226696-1-jwakely@redhat.com/mbox/"},{"id":1811,"url":"https://patchwork.plctlab.org/api/1.2/patches/1811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115713.1226717-1-jwakely@redhat.com/","msgid":"<20221007115713.1226717-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:57:13","name":"[committed] libstdc++: Add --disable-libstdcxx-hosted as an alias for hosted-libstdcxx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115713.1226717-1-jwakely@redhat.com/mbox/"},{"id":1812,"url":"https://patchwork.plctlab.org/api/1.2/patches/1812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007122659.274CA13A3D@imap2.suse-dmz.suse.de/","msgid":"<20221007122659.274CA13A3D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-07T12:26:56","name":"tree-optimization/107153 - autopar SSA update issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007122659.274CA13A3D@imap2.suse-dmz.suse.de/mbox/"},{"id":1813,"url":"https://patchwork.plctlab.org/api/1.2/patches/1813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org/","msgid":"<44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org>","list_archive_url":null,"date":"2022-10-07T12:27:40","name":"c++: Lambda context mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org/mbox/"},{"id":1814,"url":"https://patchwork.plctlab.org/api/1.2/patches/1814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007132828.335317-1-torbjorn.svensson@foss.st.com/","msgid":"<20221007132828.335317-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-07T13:28:29","name":"[v3] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007132828.335317-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1815,"url":"https://patchwork.plctlab.org/api/1.2/patches/1815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007134901.5078-1-palmer@rivosinc.com/","msgid":"<20221007134901.5078-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-07T13:49:01","name":"doc: -falign-functions doesn'\''t override the __attribute__((align(N)))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007134901.5078-1-palmer@rivosinc.com/mbox/"},{"id":1816,"url":"https://patchwork.plctlab.org/api/1.2/patches/1816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org/","msgid":"<7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org>","list_archive_url":null,"date":"2022-10-07T14:22:18","name":"libiberty: Demangle variadic template lambdas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org/mbox/"},{"id":1817,"url":"https://patchwork.plctlab.org/api/1.2/patches/1817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com/","msgid":"<798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com>","list_archive_url":null,"date":"2022-10-07T14:26:58","name":"[v5] libgomp/nvptx: Prepare for reverse-offload callback handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com/mbox/"},{"id":1818,"url":"https://patchwork.plctlab.org/api/1.2/patches/1818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007150952.102429-1-ppalka@redhat.com/","msgid":"<20221007150952.102429-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-07T15:09:52","name":"c++ modules: ICE with bitfield member in class template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007150952.102429-1-ppalka@redhat.com/mbox/"},{"id":1819,"url":"https://patchwork.plctlab.org/api/1.2/patches/1819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007155452.1299670-1-jwakely@redhat.com/","msgid":"<20221007155452.1299670-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T15:54:52","name":"libstdc++: Allow emergency EH alloc pool size to be tuned [PR68606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007155452.1299670-1-jwakely@redhat.com/mbox/"},{"id":1820,"url":"https://patchwork.plctlab.org/api/1.2/patches/1820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0BPdGc2AH9/gUtn@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T16:10:28","name":"[v4] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0BPdGc2AH9/gUtn@redhat.com/mbox/"},{"id":1821,"url":"https://patchwork.plctlab.org/api/1.2/patches/1821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007164509.854924-1-dmalcolm@redhat.com/","msgid":"<20221007164509.854924-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-07T16:45:09","name":"[committed] analyzer: extract bits from integer constants [PR105783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007164509.854924-1-dmalcolm@redhat.com/mbox/"},{"id":1822,"url":"https://patchwork.plctlab.org/api/1.2/patches/1822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr/","msgid":"<43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr>","list_archive_url":null,"date":"2022-10-07T20:26:18","name":"[v3] Fortran: error recovery for invalid types in array constructors [PR107000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr/mbox/"},{"id":1823,"url":"https://patchwork.plctlab.org/api/1.2/patches/1823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007204506.cokw3lkkn5aequ5h@begin/","msgid":"<20221007204506.cokw3lkkn5aequ5h@begin>","list_archive_url":null,"date":"2022-10-07T20:45:06","name":"[PATCHv2] libstdc++: Mark pieces of gnu-linux/os_support.h linux-specific","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007204506.cokw3lkkn5aequ5h@begin/mbox/"},{"id":1824,"url":"https://patchwork.plctlab.org/api/1.2/patches/1824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CVRvVh+I5pixLz@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T21:08:22","name":"[v4] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CVRvVh+I5pixLz@redhat.com/mbox/"},{"id":1825,"url":"https://patchwork.plctlab.org/api/1.2/patches/1825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CZa5mUxrBQ1WEL@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T21:26:03","name":"[v5] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CZa5mUxrBQ1WEL@redhat.com/mbox/"},{"id":1826,"url":"https://patchwork.plctlab.org/api/1.2/patches/1826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221008002758.3749441-1-jason@redhat.com/","msgid":"<20221008002758.3749441-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-08T00:27:58","name":"[pushed] c++: track whether we expect a TARGET_EXPR to be elided","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221008002758.3749441-1-jason@redhat.com/mbox/"},{"id":1835,"url":"https://patchwork.plctlab.org/api/1.2/patches/1835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com/","msgid":"<5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-08T21:18:04","name":"preprocessor: Fix tracking of system header state [PR60014, PR60723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com/mbox/"},{"id":1837,"url":"https://patchwork.plctlab.org/api/1.2/patches/1837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-1-dimitar@dinux.eu/","msgid":"<20221009114049.29943-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-10-09T11:40:48","name":"[committed] pru: Optimize DI shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-1-dimitar@dinux.eu/mbox/"},{"id":1838,"url":"https://patchwork.plctlab.org/api/1.2/patches/1838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-2-dimitar@dinux.eu/","msgid":"<20221009114049.29943-2-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-10-09T11:40:49","name":"[committed] pru: Add cbranchdi4 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-2-dimitar@dinux.eu/mbox/"},{"id":1839,"url":"https://patchwork.plctlab.org/api/1.2/patches/1839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1246dffc-383d-4eea-b3f8-03d5ac39aece-1665341826741@3c-app-gmx-bs08/","msgid":"","list_archive_url":null,"date":"2022-10-09T18:57:06","name":"Fortran: fix check of polymorphic elements in data transfers [PR100971]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1246dffc-383d-4eea-b3f8-03d5ac39aece-1665341826741@3c-app-gmx-bs08/mbox/"},{"id":1840,"url":"https://patchwork.plctlab.org/api/1.2/patches/1840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4cb5dc305cb30c0c9983e2048c66a31199be892.1665351784.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-09T21:51:34","name":"[v4,1/4] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4cb5dc305cb30c0c9983e2048c66a31199be892.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1841,"url":"https://patchwork.plctlab.org/api/1.2/patches/1841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com/","msgid":"<8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:35","name":"[v4,2/4] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1843,"url":"https://patchwork.plctlab.org/api/1.2/patches/1843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com/","msgid":"<2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:36","name":"[v4,3/4] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1842,"url":"https://patchwork.plctlab.org/api/1.2/patches/1842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com/","msgid":"<3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:37","name":"[v4,4/4] OpenMP/OpenACC: Unordered/non-constant component offset struct mapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com/mbox/"},{"id":1846,"url":"https://patchwork.plctlab.org/api/1.2/patches/1846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010012601.2741373-1-hongtao.liu@intel.com/","msgid":"<20221010012601.2741373-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-10T01:26:01","name":"[x86] Fix unrecognizable insn of cvtss2si.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010012601.2741373-1-hongtao.liu@intel.com/mbox/"},{"id":1847,"url":"https://patchwork.plctlab.org/api/1.2/patches/1847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-1-claziss@gmail.com/","msgid":"<20221010072902.3669746-1-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:28:58","name":"[committed,1/5] arc: Fix enter pattern instruction'\''s offsets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-1-claziss@gmail.com/mbox/"},{"id":1848,"url":"https://patchwork.plctlab.org/api/1.2/patches/1848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-2-claziss@gmail.com/","msgid":"<20221010072902.3669746-2-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:28:59","name":"[committed,2/5] arc: Remove Rcr constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-2-claziss@gmail.com/mbox/"},{"id":1850,"url":"https://patchwork.plctlab.org/api/1.2/patches/1850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-3-claziss@gmail.com/","msgid":"<20221010072902.3669746-3-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:00","name":"[committed,3/5] arc: Remove Rcw constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-3-claziss@gmail.com/mbox/"},{"id":1851,"url":"https://patchwork.plctlab.org/api/1.2/patches/1851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-4-claziss@gmail.com/","msgid":"<20221010072902.3669746-4-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:01","name":"[committed,4/5] arc: Remove Rcq constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-4-claziss@gmail.com/mbox/"},{"id":1849,"url":"https://patchwork.plctlab.org/api/1.2/patches/1849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-5-claziss@gmail.com/","msgid":"<20221010072902.3669746-5-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:02","name":"[committed,5/5] arc: Remove obsolete mRcq and mRcw options.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-5-claziss@gmail.com/mbox/"},{"id":1852,"url":"https://patchwork.plctlab.org/api/1.2/patches/1852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0PMXoRzh+dg/a1n@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T07:40:14","name":"[committed] openmp, fortran: Fix up IFN_ASSUME call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0PMXoRzh+dg/a1n@tucnak/mbox/"},{"id":1853,"url":"https://patchwork.plctlab.org/api/1.2/patches/1853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af86e552-974d-4233-8943-4dd155b00594@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T08:20:38","name":"[GCC] arm: Add cde feature support for Cortex-M55 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af86e552-974d-4233-8943-4dd155b00594@AZ-NEU-EX04.Arm.com/mbox/"},{"id":1854,"url":"https://patchwork.plctlab.org/api/1.2/patches/1854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Pd0i4FCMyx6ukZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T08:54:42","name":"middle-end IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Pd0i4FCMyx6ukZ@tucnak/mbox/"},{"id":1855,"url":"https://patchwork.plctlab.org/api/1.2/patches/1855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Puy8QL8/9zgNXp@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T10:07:07","name":"Require fgraphite effective target for pr107153.c test [PR107153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Puy8QL8/9zgNXp@tucnak/mbox/"},{"id":1856,"url":"https://patchwork.plctlab.org/api/1.2/patches/1856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010110339.E9E2513479@imap2.suse-dmz.suse.de/","msgid":"<20221010110339.E9E2513479@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-10T11:03:39","name":"[RFT] Vectorization of first-order recurrences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010110339.E9E2513479@imap2.suse-dmz.suse.de/mbox/"},{"id":1857,"url":"https://patchwork.plctlab.org/api/1.2/patches/1857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010112005.1523979-1-jwakely@redhat.com/","msgid":"<20221010112005.1523979-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-10T11:20:05","name":"[committed] libstdc++: std::make_signed_t should be ill-formed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010112005.1523979-1-jwakely@redhat.com/mbox/"},{"id":1862,"url":"https://patchwork.plctlab.org/api/1.2/patches/1862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-1-aldyh@redhat.com/","msgid":"<20221010124946.154152-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:42","name":"[COMMITTED] Return non-legacy ranges in range.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-1-aldyh@redhat.com/mbox/"},{"id":1859,"url":"https://patchwork.plctlab.org/api/1.2/patches/1859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-2-aldyh@redhat.com/","msgid":"<20221010124946.154152-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:43","name":"[COMMITTED] x UNORD x should set NAN on the TRUE side (and !NAN on the FALSE side).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-2-aldyh@redhat.com/mbox/"},{"id":1858,"url":"https://patchwork.plctlab.org/api/1.2/patches/1858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-3-aldyh@redhat.com/","msgid":"<20221010124946.154152-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:44","name":"[COMMITTED] The true side of x != x should set NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-3-aldyh@redhat.com/mbox/"},{"id":1861,"url":"https://patchwork.plctlab.org/api/1.2/patches/1861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-4-aldyh@redhat.com/","msgid":"<20221010124946.154152-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:45","name":"[COMMITTED] Add frange::maybe_isnan (bool sign).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-4-aldyh@redhat.com/mbox/"},{"id":1860,"url":"https://patchwork.plctlab.org/api/1.2/patches/1860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-5-aldyh@redhat.com/","msgid":"<20221010124946.154152-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:46","name":"[COMMITTED] Make range-op-float entries public.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-5-aldyh@redhat.com/mbox/"},{"id":1863,"url":"https://patchwork.plctlab.org/api/1.2/patches/1863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131315.13580-1-kito.cheng@sifive.com/","msgid":"<20221010131315.13580-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:13:15","name":"[committed] RISC-V: Add newline to the end of file [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131315.13580-1-kito.cheng@sifive.com/mbox/"},{"id":1864,"url":"https://patchwork.plctlab.org/api/1.2/patches/1864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131418.13632-1-kito.cheng@sifive.com/","msgid":"<20221010131418.13632-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:14:18","name":"[committed] RISC-V: Adjust testcase for rvv/base/user-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131418.13632-1-kito.cheng@sifive.com/mbox/"},{"id":1865,"url":"https://patchwork.plctlab.org/api/1.2/patches/1865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131436.13678-1-kito.cheng@sifive.com/","msgid":"<20221010131436.13678-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:14:36","name":"[committed] RISC-V: Add riscv_vector.h wrapper in testsuite to prevent pull in stdint.h from C library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131436.13678-1-kito.cheng@sifive.com/mbox/"},{"id":1866,"url":"https://patchwork.plctlab.org/api/1.2/patches/1866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134322.169275-1-juzhe.zhong@rivai.ai/","msgid":"<20221010134322.169275-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:43:22","name":"RISC-V: Add missing vsetvl instruction type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134322.169275-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1867,"url":"https://patchwork.plctlab.org/api/1.2/patches/1867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134928.171673-1-juzhe.zhong@rivai.ai/","msgid":"<20221010134928.171673-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:49:28","name":"RISC-V: move struct vector_type_info from *.h to *.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134928.171673-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1868,"url":"https://patchwork.plctlab.org/api/1.2/patches/1868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010135721.173181-1-juzhe.zhong@rivai.ai/","msgid":"<20221010135721.173181-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:57:21","name":"RISC-V: move struct vector_type_info from *.h to *.cc and change \"user_name\" into \"name\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010135721.173181-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1869,"url":"https://patchwork.plctlab.org/api/1.2/patches/1869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu/","msgid":"<20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2022-10-10T14:11:41","name":"[RFC] Add support for vectors in comparisons (like the C++ frontend does)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":1870,"url":"https://patchwork.plctlab.org/api/1.2/patches/1870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsfviww8.fsf@euler.schwinge.homeip.net/","msgid":"<87fsfviww8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-10T14:19:35","name":"Restore default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'' (was: [PATCH 1/3] STABS: remove -gstabs and -gxcoff functionality)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsfviww8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":1874,"url":"https://patchwork.plctlab.org/api/1.2/patches/1874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00Blzp-Rc@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:18","name":"2/19 modula2 front end: Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00Blzp-Rc@lancelot/mbox/"},{"id":1876,"url":"https://patchwork.plctlab.org/api/1.2/patches/1876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00BlzX-GX@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:18","name":"1/19 modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00BlzX-GX@lancelot/mbox/"},{"id":1882,"url":"https://patchwork.plctlab.org/api/1.2/patches/1882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm0N-LJ@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:19","name":"4/19 modula2 front end: libgm2/libm2pim contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm0N-LJ@lancelot/mbox/"},{"id":1872,"url":"https://patchwork.plctlab.org/api/1.2/patches/1872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm08-7e@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:19","name":"3/19 modula2 front end: gm2 driver files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm08-7e@lancelot/mbox/"},{"id":1871,"url":"https://patchwork.plctlab.org/api/1.2/patches/1871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm11-Pu@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"7/19 modula2 front end: libgm2/libm2log contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm11-Pu@lancelot/mbox/"},{"id":1881,"url":"https://patchwork.plctlab.org/api/1.2/patches/1881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0a-3R@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"5/19 modula2 front end: libgm2/libm2iso contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0a-3R@lancelot/mbox/"},{"id":1873,"url":"https://patchwork.plctlab.org/api/1.2/patches/1873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0n-FL@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"6/19 modula2 front end: libgm2/libm2min contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0n-FL@lancelot/mbox/"},{"id":1877,"url":"https://patchwork.plctlab.org/api/1.2/patches/1877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1X-Kn@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:21","name":"9/19 modula2 front end: plugin source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1X-Kn@lancelot/mbox/"},{"id":1875,"url":"https://patchwork.plctlab.org/api/1.2/patches/1875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1G-6p@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:21","name":"8/19 modula2 front end: libgm2 contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1G-6p@lancelot/mbox/"},{"id":1883,"url":"https://patchwork.plctlab.org/api/1.2/patches/1883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm2V-Q5@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:22","name":"11/19 modula2 front end: gimple interface *[a-d]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm2V-Q5@lancelot/mbox/"},{"id":1884,"url":"https://patchwork.plctlab.org/api/1.2/patches/1884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm22-62@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:22","name":"10/19 modula2 front end: gimple interface header files *.h and *.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm22-62@lancelot/mbox/"},{"id":1887,"url":"https://patchwork.plctlab.org/api/1.2/patches/1887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukV-00Bm34-D9@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:23","name":"12/19 modula2 front end: gimple interface *[e-f]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukV-00Bm34-D9@lancelot/mbox/"},{"id":1879,"url":"https://patchwork.plctlab.org/api/1.2/patches/1879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3W-F9@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:24","name":"14/19 modula2 front end: gimple interface remainder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3W-F9@lancelot/mbox/"},{"id":1878,"url":"https://patchwork.plctlab.org/api/1.2/patches/1878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3H-01@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:24","name":"13/19 modula2 front end: gimple interface *[g-m]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3H-01@lancelot/mbox/"},{"id":1885,"url":"https://patchwork.plctlab.org/api/1.2/patches/1885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm41-MC@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:25","name":"16/19 modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm41-MC@lancelot/mbox/"},{"id":1886,"url":"https://patchwork.plctlab.org/api/1.2/patches/1886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm3i-29@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:25","name":"15/19 modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm3i-29@lancelot/mbox/"},{"id":1880,"url":"https://patchwork.plctlab.org/api/1.2/patches/1880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukY-00Bm4O-2a@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:26","name":"17/19 modula2 front end: dejagnu expect library scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukY-00Bm4O-2a@lancelot/mbox/"},{"id":1888,"url":"https://patchwork.plctlab.org/api/1.2/patches/1888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010185829.312666-1-aldyh@redhat.com/","msgid":"<20221010185829.312666-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T18:58:29","name":"Avoid calling tracer.trailer() twice.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010185829.312666-1-aldyh@redhat.com/mbox/"},{"id":1889,"url":"https://patchwork.plctlab.org/api/1.2/patches/1889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Rv6e2hgWpo77D/@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T19:18:01","name":"[v5] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Rv6e2hgWpo77D/@redhat.com/mbox/"},{"id":1891,"url":"https://patchwork.plctlab.org/api/1.2/patches/1891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVgcPODk5EbUiTnNtFH3cQikzcpC=_WU0fTUABPLxG_AQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T21:27:29","name":"Go patch committed: Only build thunk struct type when needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVgcPODk5EbUiTnNtFH3cQikzcpC=_WU0fTUABPLxG_AQ@mail.gmail.com/mbox/"},{"id":1892,"url":"https://patchwork.plctlab.org/api/1.2/patches/1892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW9LELz-3fnT05qAkV8POsV0omaCvxvugYX=SWat7iKyg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T21:46:29","name":"Go patch committed: Treat S(\"\") as a string constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW9LELz-3fnT05qAkV8POsV0omaCvxvugYX=SWat7iKyg@mail.gmail.com/mbox/"},{"id":1896,"url":"https://patchwork.plctlab.org/api/1.2/patches/1896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354293045D32BFB1659CB2D691239@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T00:36:59","name":"[ICE] Fix for PR107193.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354293045D32BFB1659CB2D691239@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1898,"url":"https://patchwork.plctlab.org/api/1.2/patches/1898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011025113.624107-1-ppalka@redhat.com/","msgid":"<20221011025113.624107-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-11T02:51:13","name":"libstdc++: Implement ranges::repeat_view from P2474R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011025113.624107-1-ppalka@redhat.com/mbox/"},{"id":1899,"url":"https://patchwork.plctlab.org/api/1.2/patches/1899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db08f7bd-9bb5-5ab4-ca1c-0cb5dbe851f5@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T04:46:35","name":"[committed,PR,rtl-optimization/107182] Clear EDGE_CROSSING for jump->ret optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db08f7bd-9bb5-5ab4-ca1c-0cb5dbe851f5@gmail.com/mbox/"},{"id":1900,"url":"https://patchwork.plctlab.org/api/1.2/patches/1900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011044820.312228-1-juzhe.zhong@rivai.ai/","msgid":"<20221011044820.312228-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T04:48:20","name":"RISC-V: Move function place to make it looks better.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011044820.312228-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1901,"url":"https://patchwork.plctlab.org/api/1.2/patches/1901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011061521.65729-1-juzhe.zhong@rivai.ai/","msgid":"<20221011061521.65729-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:15:21","name":"RISC-V: Refine register_builtin_types function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011061521.65729-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1902,"url":"https://patchwork.plctlab.org/api/1.2/patches/1902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062159.69697-1-juzhe.zhong@rivai.ai/","msgid":"<20221011062159.69697-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:21:59","name":"RISC-V: Clang-format add_vector_attribute function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062159.69697-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1903,"url":"https://patchwork.plctlab.org/api/1.2/patches/1903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062333.70907-1-juzhe.zhong@rivai.ai/","msgid":"<20221011062333.70907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:23:33","name":"RISC-V: Remove TUPLE size macro define.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062333.70907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1904,"url":"https://patchwork.plctlab.org/api/1.2/patches/1904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063156.115984-1-juzhe.zhong@rivai.ai/","msgid":"<20221011063156.115984-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:31:56","name":"RISC-V: Refine riscv-vector-builtins.o include files and makefile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063156.115984-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1905,"url":"https://patchwork.plctlab.org/api/1.2/patches/1905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063627.131177-1-juzhe.zhong@rivai.ai/","msgid":"<20221011063627.131177-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:36:27","name":"RISC-V: Clang-format vector_type_index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063627.131177-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1906,"url":"https://patchwork.plctlab.org/api/1.2/patches/1906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz/","msgid":"<746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz>","list_archive_url":null,"date":"2022-10-11T06:54:25","name":"[(pushed)] ranger: add override keyword","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz/mbox/"},{"id":1907,"url":"https://patchwork.plctlab.org/api/1.2/patches/1907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1acd025-c91f-58b7-3b34-40635bb38cac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T07:38:48","name":"[PATCH-1,rs6000] Generate permute index directly for little endian target [PR100866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1acd025-c91f-58b7-3b34-40635bb38cac@linux.ibm.com/mbox/"},{"id":1908,"url":"https://patchwork.plctlab.org/api/1.2/patches/1908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011080316.1778261-1-hongtao.liu@intel.com/","msgid":"<20221011080316.1778261-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-11T08:03:16","name":"[x86] Add define_insn_and_split to support general version of \"kxnor\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011080316.1778261-1-hongtao.liu@intel.com/mbox/"},{"id":1909,"url":"https://patchwork.plctlab.org/api/1.2/patches/1909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011083137.336470-1-aldyh@redhat.com/","msgid":"<20221011083137.336470-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T08:31:37","name":"[COMMITTED,PR107195] Set range to zero when nonzero mask is 0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011083137.336470-1-aldyh@redhat.com/mbox/"},{"id":1913,"url":"https://patchwork.plctlab.org/api/1.2/patches/1913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com/","msgid":"<45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:03","name":"[committed,1/6] amdgcn: add multiple vector sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1910,"url":"https://patchwork.plctlab.org/api/1.2/patches/1910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com/","msgid":"<0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:04","name":"[committed,2/6] amdgcn: Resolve insn conditions at compile time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1911,"url":"https://patchwork.plctlab.org/api/1.2/patches/1911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com/","msgid":"<5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:05","name":"[committed,3/6] amdgcn: Add vec_extract for partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1912,"url":"https://patchwork.plctlab.org/api/1.2/patches/1912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com/","msgid":"<769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:06","name":"[committed,4/6] amdgcn: vec_init for multiple vector sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1914,"url":"https://patchwork.plctlab.org/api/1.2/patches/1914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf6b5c74a6f1927174091c73aa51401895ef92f0.1665485382.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T11:02:07","name":"[committed,5/6] amdgcn: Add vector integer negate insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf6b5c74a6f1927174091c73aa51401895ef92f0.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1915,"url":"https://patchwork.plctlab.org/api/1.2/patches/1915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9a05594d227cde79a67dc715bd9d82e9c464e9.1665485382.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T11:02:08","name":"[committed,6/6] amdgcn: vector testsuite tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9a05594d227cde79a67dc715bd9d82e9c464e9.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1916,"url":"https://patchwork.plctlab.org/api/1.2/patches/1916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011111653.6CDD23857B99@sourceware.org/","msgid":"<20221011111653.6CDD23857B99@sourceware.org>","list_archive_url":null,"date":"2022-10-11T11:15:24","name":"tree-optimization/107212 - SLP reduction of reduction paths","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011111653.6CDD23857B99@sourceware.org/mbox/"},{"id":1917,"url":"https://patchwork.plctlab.org/api/1.2/patches/1917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org/","msgid":"<84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org>","list_archive_url":null,"date":"2022-10-11T11:41:02","name":"libiberty: Demangling '\''M'\'' prefixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org/mbox/"},{"id":1918,"url":"https://patchwork.plctlab.org/api/1.2/patches/1918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-11T12:43:02","name":"[1/2] gcov: test switch/break line counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1919,"url":"https://patchwork.plctlab.org/api/1.2/patches/1919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-11T12:43:03","name":"[2/2] gcov: test line count for label in then/else block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1920,"url":"https://patchwork.plctlab.org/api/1.2/patches/1920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VwowKL1r/QXhLo@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-11T13:33:23","name":"c++: Implement excess precision support for C++ [PR107097, PR323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VwowKL1r/QXhLo@tucnak/mbox/"},{"id":1921,"url":"https://patchwork.plctlab.org/api/1.2/patches/1921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VxcOxwjGbN6rKl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-11T13:36:48","name":"middle-end, v2: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VxcOxwjGbN6rKl@tucnak/mbox/"},{"id":1922,"url":"https://patchwork.plctlab.org/api/1.2/patches/1922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-1-aldyh@redhat.com/","msgid":"<20221011135136.369644-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:33","name":"[COMMITTED] Move TRUE case first in range-op.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-1-aldyh@redhat.com/mbox/"},{"id":1923,"url":"https://patchwork.plctlab.org/api/1.2/patches/1923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-2-aldyh@redhat.com/","msgid":"<20221011135136.369644-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:34","name":"[COMMITTED] Share common ordered comparison code with UN*_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-2-aldyh@redhat.com/mbox/"},{"id":1925,"url":"https://patchwork.plctlab.org/api/1.2/patches/1925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-3-aldyh@redhat.com/","msgid":"<20221011135136.369644-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:35","name":"[COMMITTED] Implement op1_range operators for unordered comparisons.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-3-aldyh@redhat.com/mbox/"},{"id":1924,"url":"https://patchwork.plctlab.org/api/1.2/patches/1924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-4-aldyh@redhat.com/","msgid":"<20221011135136.369644-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:36","name":"[COMMITTED] Implement ABS_EXPR operator for frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-4-aldyh@redhat.com/mbox/"},{"id":1926,"url":"https://patchwork.plctlab.org/api/1.2/patches/1926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011153507.784631-1-ppalka@redhat.com/","msgid":"<20221011153507.784631-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-11T15:35:07","name":"c++ modules: ICE with templated friend and std namespace [PR100134]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011153507.784631-1-ppalka@redhat.com/mbox/"},{"id":1927,"url":"https://patchwork.plctlab.org/api/1.2/patches/1927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011165750.328974-1-polacek@redhat.com/","msgid":"<20221011165750.328974-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-11T16:57:50","name":"testsuite: Only run -fcf-protection test on i?86/x86_64 [PR107213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011165750.328974-1-polacek@redhat.com/mbox/"},{"id":1930,"url":"https://patchwork.plctlab.org/api/1.2/patches/1930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-87876f1f-d6af-46cb-899e-014572306581-1665514076911@3c-app-gmx-bap36/","msgid":"","list_archive_url":null,"date":"2022-10-11T18:47:56","name":"Fortran: check types of source expressions before conversion [PR107215]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-87876f1f-d6af-46cb-899e-014572306581-1665514076911@3c-app-gmx-bap36/mbox/"},{"id":1931,"url":"https://patchwork.plctlab.org/api/1.2/patches/1931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011200003.695682-1-polacek@redhat.com/","msgid":"<20221011200003.695682-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-11T20:00:03","name":"c++: ICE with VEC_INIT_EXPR and defarg [PR106925]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011200003.695682-1-polacek@redhat.com/mbox/"},{"id":1932,"url":"https://patchwork.plctlab.org/api/1.2/patches/1932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-820c5571-4877-4f7c-bb95-3c9a5487d6a6-1665519780978@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2022-10-11T20:23:01","name":"Fortran: check types of operands of arithmetic binary operations [PR107217]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-820c5571-4877-4f7c-bb95-3c9a5487d6a6-1665519780978@3c-app-gmx-bs49/mbox/"},{"id":1933,"url":"https://patchwork.plctlab.org/api/1.2/patches/1933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-2-palmer@rivosinc.com/","msgid":"<20221011210156.7710-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:54","name":"[v2,1/3] doc: -falign-functions doesn'\''t override the __attribute__((align(N)))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-2-palmer@rivosinc.com/mbox/"},{"id":1935,"url":"https://patchwork.plctlab.org/api/1.2/patches/1935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-3-palmer@rivosinc.com/","msgid":"<20221011210156.7710-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:55","name":"[v2,2/3] doc: -falign-functions is ignored under -Os","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-3-palmer@rivosinc.com/mbox/"},{"id":1934,"url":"https://patchwork.plctlab.org/api/1.2/patches/1934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-4-palmer@rivosinc.com/","msgid":"<20221011210156.7710-4-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:56","name":"[v2,3/3] doc: -falign-functions is ignored for cold/size-optimized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-4-palmer@rivosinc.com/mbox/"},{"id":1936,"url":"https://patchwork.plctlab.org/api/1.2/patches/1936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011215831.67154-1-iain@sandoe.co.uk/","msgid":"<20221011215831.67154-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-10-11T21:58:31","name":"coroutines: Use cp_build_init_expr consistently.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011215831.67154-1-iain@sandoe.co.uk/mbox/"},{"id":1937,"url":"https://patchwork.plctlab.org/api/1.2/patches/1937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2257020.ElGaqSPkdT@fomalhaut/","msgid":"<2257020.ElGaqSPkdT@fomalhaut>","list_archive_url":null,"date":"2022-10-11T22:42:30","name":"[Ada] Enable support for atomic primitives on SPARC/Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2257020.ElGaqSPkdT@fomalhaut/mbox/"},{"id":1938,"url":"https://patchwork.plctlab.org/api/1.2/patches/1938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1908900.PYKUYFuaPT@fomalhaut/","msgid":"<1908900.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2022-10-11T22:57:58","name":"Fix emit_group_store regression on big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1908900.PYKUYFuaPT@fomalhaut/mbox/"},{"id":1939,"url":"https://patchwork.plctlab.org/api/1.2/patches/1939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012014236.301092-1-juzhe.zhong@rivai.ai/","msgid":"<20221012014236.301092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-12T01:42:36","name":"RISC-V: Add new line at end of file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012014236.301092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1940,"url":"https://patchwork.plctlab.org/api/1.2/patches/1940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012025945.578-1-lili.cui@intel.com/","msgid":"<20221012025945.578-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-12T02:59:45","name":"Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012025945.578-1-lili.cui@intel.com/mbox/"},{"id":1942,"url":"https://patchwork.plctlab.org/api/1.2/patches/1942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012031605.2071672-1-chenglulu@loongson.cn/","msgid":"<20221012031605.2071672-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-12T03:16:06","name":"LoongArch: Fixed a bug in the loongarch architecture of libitm package.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012031605.2071672-1-chenglulu@loongson.cn/mbox/"},{"id":1943,"url":"https://patchwork.plctlab.org/api/1.2/patches/1943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012064820.151529-1-guojiufu@linux.ibm.com/","msgid":"<20221012064820.151529-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-12T06:48:20","name":"[V4] rs6000: cannot_force_const_mem for HIGH code rtx[PR106460]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012064820.151529-1-guojiufu@linux.ibm.com/mbox/"},{"id":1945,"url":"https://patchwork.plctlab.org/api/1.2/patches/1945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-1-aldyh@redhat.com/","msgid":"<20221012065050.412900-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:46","name":"[COMMITTED] Add default relation_kind to floating point range-op entries.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-1-aldyh@redhat.com/mbox/"},{"id":1948,"url":"https://patchwork.plctlab.org/api/1.2/patches/1948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-2-aldyh@redhat.com/","msgid":"<20221012065050.412900-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:47","name":"[COMMITTED] Add an frange(type) constructor analogous to the irange version.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-2-aldyh@redhat.com/mbox/"},{"id":1946,"url":"https://patchwork.plctlab.org/api/1.2/patches/1946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-3-aldyh@redhat.com/","msgid":"<20221012065050.412900-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:48","name":"[COMMITTED] Disable tree to bool conversion in frange::update_nan.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-3-aldyh@redhat.com/mbox/"},{"id":1944,"url":"https://patchwork.plctlab.org/api/1.2/patches/1944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-4-aldyh@redhat.com/","msgid":"<20221012065050.412900-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:49","name":"[COMMITTED] Add method to query the sign of a NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-4-aldyh@redhat.com/mbox/"},{"id":1947,"url":"https://patchwork.plctlab.org/api/1.2/patches/1947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-5-aldyh@redhat.com/","msgid":"<20221012065050.412900-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:50","name":"[COMMITTED] Add stubs for floating point range-op tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-5-aldyh@redhat.com/mbox/"},{"id":1949,"url":"https://patchwork.plctlab.org/api/1.2/patches/1949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fb389c8-a541-ed41-1786-6325decae530@suse.cz/","msgid":"<6fb389c8-a541-ed41-1786-6325decae530@suse.cz>","list_archive_url":null,"date":"2022-10-12T07:32:30","name":"[(pushed)] regenerate configure files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fb389c8-a541-ed41-1786-6325decae530@suse.cz/mbox/"},{"id":1950,"url":"https://patchwork.plctlab.org/api/1.2/patches/1950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012075014.2922-1-lili.cui@intel.com/","msgid":"<20221012075014.2922-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-12T07:50:14","name":"MAINTAINERS: Add myself for write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012075014.2922-1-lili.cui@intel.com/mbox/"},{"id":1951,"url":"https://patchwork.plctlab.org/api/1.2/patches/1951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com/","msgid":"<63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com>","list_archive_url":null,"date":"2022-10-12T08:12:21","name":"[v2] rs6000: Rework option -mpowerpc64 handling [PR106680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com/mbox/"},{"id":1952,"url":"https://patchwork.plctlab.org/api/1.2/patches/1952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Z5lozuTufmyMpL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T08:23:50","name":"machmode: Introduce GET_MODE_NEXT_MODE with previous GET_MODE_WIDER_MODE meaning, add new GET_MODE_WIDER_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Z5lozuTufmyMpL@tucnak/mbox/"},{"id":1953,"url":"https://patchwork.plctlab.org/api/1.2/patches/1953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz/","msgid":"<75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz>","list_archive_url":null,"date":"2022-10-12T08:52:47","name":"[COMMITTED] gcov: rename gcov_write_summary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz/mbox/"},{"id":1954,"url":"https://patchwork.plctlab.org/api/1.2/patches/1954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-12T10:16:19","name":"Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1955,"url":"https://patchwork.plctlab.org/api/1.2/patches/1955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0af9v/wVgkAk3SW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T11:07:34","name":"machmode, v2: Introduce GET_MODE_NEXT_MODE with previous GET_MODE_WIDER_MODE meaning, add new GET_MODE_WIDER_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0af9v/wVgkAk3SW@tucnak/mbox/"},{"id":1956,"url":"https://patchwork.plctlab.org/api/1.2/patches/1956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012115252.1881060-1-jwakely@redhat.com/","msgid":"<20221012115252.1881060-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-12T11:52:52","name":"libgcc: Quote variable in Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012115252.1881060-1-jwakely@redhat.com/mbox/"},{"id":1957,"url":"https://patchwork.plctlab.org/api/1.2/patches/1957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebcb6977-c445-264e-ce06-d56beb4bbcc0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T14:05:32","name":"libgomp: Add offload_device_gcn check, add requires-4a.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebcb6977-c445-264e-ce06-d56beb4bbcc0@codesourcery.com/mbox/"},{"id":1958,"url":"https://patchwork.plctlab.org/api/1.2/patches/1958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012142300.16833-1-xry111@xry111.site/","msgid":"<20221012142300.16833-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-10-12T14:23:00","name":"LoongArch: implement count_{leading,trailing}_zeros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012142300.16833-1-xry111@xry111.site/mbox/"},{"id":1959,"url":"https://patchwork.plctlab.org/api/1.2/patches/1959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012153752.427563-1-jason@redhat.com/","msgid":"<20221012153752.427563-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-12T15:37:52","name":"[pushed] c++: defer all consteval in default args [DR2631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012153752.427563-1-jason@redhat.com/mbox/"},{"id":1960,"url":"https://patchwork.plctlab.org/api/1.2/patches/1960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bq9gWcofbF1jVr@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:27:34","name":"[v2] c++: ICE with VEC_INIT_EXPR and defarg [PR106925]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bq9gWcofbF1jVr@redhat.com/mbox/"},{"id":1961,"url":"https://patchwork.plctlab.org/api/1.2/patches/1961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwi5uCACMPSzN/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:51:23","name":"[committed] libgomp: Fix up creation of artificial teams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwi5uCACMPSzN/@tucnak/mbox/"},{"id":1962,"url":"https://patchwork.plctlab.org/api/1.2/patches/1962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwv5mXC2V8Hu1s@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:52:15","name":"[committed] libgomp: Add omp_in_explicit_task support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwv5mXC2V8Hu1s@tucnak/mbox/"},{"id":1963,"url":"https://patchwork.plctlab.org/api/1.2/patches/1963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bw7VWQp+vGpCoe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:53:01","name":"[committed] libgomp: Fix up OpenMP 5.2 feature bullet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bw7VWQp+vGpCoe@tucnak/mbox/"},{"id":1965,"url":"https://patchwork.plctlab.org/api/1.2/patches/1965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com/","msgid":"<3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com>","list_archive_url":null,"date":"2022-10-12T17:29:02","name":"vect: Don'\''t pattern match BITFIELD_REF'\''s of non-integrals [PR107226]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com/mbox/"},{"id":1964,"url":"https://patchwork.plctlab.org/api/1.2/patches/1964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f84887dd-1d9e-e53f-b171-494426634026@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T17:29:07","name":"ifcvt: Fix bitpos calculation in bitfield lowering [PR107229]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f84887dd-1d9e-e53f-b171-494426634026@arm.com/mbox/"},{"id":1966,"url":"https://patchwork.plctlab.org/api/1.2/patches/1966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012182748.424078-1-aldyh@redhat.com/","msgid":"<20221012182748.424078-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T18:27:49","name":"[COMMITTED] Add range-op entry for floating point NEGATE_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012182748.424078-1-aldyh@redhat.com/mbox/"},{"id":1967,"url":"https://patchwork.plctlab.org/api/1.2/patches/1967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com/","msgid":"<1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com>","list_archive_url":null,"date":"2022-10-12T19:23:46","name":"xtensa: Add workaround for pSRAM cache issue in ESP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com/mbox/"},{"id":1968,"url":"https://patchwork.plctlab.org/api/1.2/patches/1968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0cX0wQJBbmESbG1@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T19:38:59","name":"[wwwdocs] porting_to: Two-stage overload resolution for implicit move removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0cX0wQJBbmESbG1@redhat.com/mbox/"},{"id":1969,"url":"https://patchwork.plctlab.org/api/1.2/patches/1969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c0a8c36e-266b-4a31-89b5-242246403fc5-1665603941818@3c-app-gmx-bs25/","msgid":"","list_archive_url":null,"date":"2022-10-12T19:45:41","name":"Fortran: simplify array constructors with typespec [PR93483, PR107216, PR107219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c0a8c36e-266b-4a31-89b5-242246403fc5-1665603941818@3c-app-gmx-bs25/mbox/"},{"id":1970,"url":"https://patchwork.plctlab.org/api/1.2/patches/1970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012194734.85319-1-arsen@aarsen.me/","msgid":"<20221012194734.85319-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-12T19:47:35","name":"libstdc++: respect with-{headers, newlib} for default hosted value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012194734.85319-1-arsen@aarsen.me/mbox/"},{"id":1971,"url":"https://patchwork.plctlab.org/api/1.2/patches/1971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8266b5be-256c-4be2-84db-3a880e849d41@gmail.com/","msgid":"<8266b5be-256c-4be2-84db-3a880e849d41@gmail.com>","list_archive_url":null,"date":"2022-10-12T20:18:37","name":"PR 107189 Remove useless _Alloc_node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8266b5be-256c-4be2-84db-3a880e849d41@gmail.com/mbox/"},{"id":1972,"url":"https://patchwork.plctlab.org/api/1.2/patches/1972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210130113580.2063768@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-13T01:14:35","name":"[committed] c: Do not use *_IS_IEC_60559 == 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210130113580.2063768@digraph.polyomino.org.uk/mbox/"},{"id":1973,"url":"https://patchwork.plctlab.org/api/1.2/patches/1973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031009.60175-1-liwei.xu@intel.com/","msgid":"<20221013031009.60175-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-13T03:10:09","name":"Optimize indentical permuation in my last r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031009.60175-1-liwei.xu@intel.com/mbox/"},{"id":1974,"url":"https://patchwork.plctlab.org/api/1.2/patches/1974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031518.66289-1-liwei.xu@intel.com/","msgid":"<20221013031518.66289-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-13T03:15:18","name":"Optimize identical permutation in my last r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031518.66289-1-liwei.xu@intel.com/mbox/"},{"id":1975,"url":"https://patchwork.plctlab.org/api/1.2/patches/1975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0e1QH++UvHO7MtJ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T06:50:40","name":"middle-end, v3: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0e1QH++UvHO7MtJ@tucnak/mbox/"},{"id":1995,"url":"https://patchwork.plctlab.org/api/1.2/patches/1995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d77b6541-1a2a-f15d-6855-14e206081fa4@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-13T09:37:47","name":"[DOCS] Python Language Conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d77b6541-1a2a-f15d-6855-14e206081fa4@suse.cz/mbox/"},{"id":2016,"url":"https://patchwork.plctlab.org/api/1.2/patches/2016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013110318.34FB413AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013110318.34FB413AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T11:03:17","name":"Diagnose return statement in match.pd (with { ... } expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013110318.34FB413AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2033,"url":"https://patchwork.plctlab.org/api/1.2/patches/2033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3194055.aeNJFYEL58@fomalhaut/","msgid":"<3194055.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2022-10-13T12:06:15","name":"Fix bogus -Wstringop-overflow warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3194055.aeNJFYEL58@fomalhaut/mbox/"},{"id":2037,"url":"https://patchwork.plctlab.org/api/1.2/patches/2037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013121701.473585-1-aldyh@redhat.com/","msgid":"<20221013121701.473585-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-13T12:17:01","name":"[COMMITTED] Add op1_op2_relation for float operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013121701.473585-1-aldyh@redhat.com/mbox/"},{"id":2040,"url":"https://patchwork.plctlab.org/api/1.2/patches/2040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013123649.474497-1-aldyh@redhat.com/","msgid":"<20221013123649.474497-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-13T12:36:49","name":"[PR24021] Implement PLUS_EXPR range-op entry for floats.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013123649.474497-1-aldyh@redhat.com/mbox/"},{"id":2049,"url":"https://patchwork.plctlab.org/api/1.2/patches/2049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131632.1017D13AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013131632.1017D13AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T13:16:31","name":"tree-optimization/107160 - avoid reusing multiple accumulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131632.1017D13AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2052,"url":"https://patchwork.plctlab.org/api/1.2/patches/2052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131957.8C67013AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013131957.8C67013AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T13:19:56","name":"tree-optimization/107247 - reduce SLP reduction accumulator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131957.8C67013AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2057,"url":"https://patchwork.plctlab.org/api/1.2/patches/2057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013140152.29237-1-shiyulong@iscas.ac.cn/","msgid":"<20221013140152.29237-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-13T14:01:52","name":"[V1] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013140152.29237-1-shiyulong@iscas.ac.cn/mbox/"},{"id":2061,"url":"https://patchwork.plctlab.org/api/1.2/patches/2061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz/","msgid":"<79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz>","list_archive_url":null,"date":"2022-10-13T14:25:52","name":"use proper DECL_INITIAL for VTV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz/mbox/"},{"id":2073,"url":"https://patchwork.plctlab.org/api/1.2/patches/2073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com/","msgid":"<8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:30:29","name":"[COMMITTED,1/4] Add partial equivalence support to the relation oracle.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com/mbox/"},{"id":2074,"url":"https://patchwork.plctlab.org/api/1.2/patches/2074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com/","msgid":"<70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:30:55","name":"[COMMITTED,2/4] Add equivalence iterator to relation oracle.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com/mbox/"},{"id":2076,"url":"https://patchwork.plctlab.org/api/1.2/patches/2076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c37a5a77-af50-e266-b29b-b05190546f0d@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-13T15:31:23","name":"[COMMITTED,3/4] Add partial equivalence recognition to cast and bitwise and.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c37a5a77-af50-e266-b29b-b05190546f0d@redhat.com/mbox/"},{"id":2075,"url":"https://patchwork.plctlab.org/api/1.2/patches/2075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com/","msgid":"<8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:31:40","name":"[COMMITTED,4/4] PR tree-optimization/102540 - propagate partial equivs in the cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com/mbox/"},{"id":2077,"url":"https://patchwork.plctlab.org/api/1.2/patches/2077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013153921.3795800-1-ppalka@redhat.com/","msgid":"<20221013153921.3795800-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:39:21","name":"c++ modules: verify_type failure with typedef enum [PR106848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013153921.3795800-1-ppalka@redhat.com/mbox/"},{"id":2091,"url":"https://patchwork.plctlab.org/api/1.2/patches/2091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0g/g0JYbV33TZiW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:40:35","name":"c++, v2: Implement excess precision support for C++ [PR107097, PR323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0g/g0JYbV33TZiW@tucnak/mbox/"},{"id":2094,"url":"https://patchwork.plctlab.org/api/1.2/patches/2094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hAqDSTjECCqE9j@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:45:28","name":"c++: Excess precision for ? int : float or int == float [PR107097, PR82071, PR87390]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hAqDSTjECCqE9j@tucnak/mbox/"},{"id":2095,"url":"https://patchwork.plctlab.org/api/1.2/patches/2095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hB6+3EJYPYkHkN@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:50:51","name":"middle-end, c++, i386, libgcc, v2: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hB6+3EJYPYkHkN@tucnak/mbox/"},{"id":2099,"url":"https://patchwork.plctlab.org/api/1.2/patches/2099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com/","msgid":"<8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com>","list_archive_url":null,"date":"2022-10-13T17:02:06","name":"testsuite: Fix failure in test pr105586.c [PR107171]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com/mbox/"},{"id":2242,"url":"https://patchwork.plctlab.org/api/1.2/patches/2242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d66ffad0-41c4-dd43-4b8f-d37b41f04668@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-13T18:10:47","name":"libgomp: Add Fortran testcases for omp_in_explicit_task","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d66ffad0-41c4-dd43-4b8f-d37b41f04668@codesourcery.com/mbox/"},{"id":2343,"url":"https://patchwork.plctlab.org/api/1.2/patches/2343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013190427.181432-1-ppalka@redhat.com/","msgid":"<20221013190427.181432-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-13T19:04:27","name":"c++ modules: ICE with dynamic_cast [PR106304]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013190427.181432-1-ppalka@redhat.com/mbox/"},{"id":2353,"url":"https://patchwork.plctlab.org/api/1.2/patches/2353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013201332.1157829-1-dmalcolm@redhat.com/","msgid":"<20221013201332.1157829-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-13T20:13:32","name":"[committed] analyzer: fix ICE introduced in r13-3168 [PR107210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013201332.1157829-1-dmalcolm@redhat.com/mbox/"},{"id":2447,"url":"https://patchwork.plctlab.org/api/1.2/patches/2447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9063ef11e8eff2f1aa24d949235e687de4ce968.1665699882.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-13T23:56:03","name":"Always enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9063ef11e8eff2f1aa24d949235e687de4ce968.1665699882.git.segher@kernel.crashing.org/mbox/"},{"id":2463,"url":"https://patchwork.plctlab.org/api/1.2/patches/2463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210140219040.2099903@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-14T02:19:37","name":"[committed] c: C2x storage class specifiers in compound literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210140219040.2099903@digraph.polyomino.org.uk/mbox/"},{"id":2465,"url":"https://patchwork.plctlab.org/api/1.2/patches/2465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014023219.1395533-1-chenglulu@loongson.cn/","msgid":"<20221014023219.1395533-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-14T02:32:20","name":"[v2] LoongArch: Optimize the implementation of stack check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014023219.1395533-1-chenglulu@loongson.cn/mbox/"},{"id":2480,"url":"https://patchwork.plctlab.org/api/1.2/patches/2480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014031748.55813-1-guojiufu@linux.ibm.com/","msgid":"<20221014031748.55813-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-14T03:17:48","name":"rs6000: Enable const_anchor for '\''addi'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014031748.55813-1-guojiufu@linux.ibm.com/mbox/"},{"id":2530,"url":"https://patchwork.plctlab.org/api/1.2/patches/2530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014062821.BE43833EEA@hamza.pair.com/","msgid":"<20221014062821.BE43833EEA@hamza.pair.com>","list_archive_url":null,"date":"2022-10-14T06:28:16","name":"[committed] wwwdocs: *: Consistently format around ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014062821.BE43833EEA@hamza.pair.com/mbox/"},{"id":2550,"url":"https://patchwork.plctlab.org/api/1.2/patches/2550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-2-haochen.jiang@intel.com/","msgid":"<20221014074058.7709-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:40:57","name":"[1/2] Initial Raptorlake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-2-haochen.jiang@intel.com/mbox/"},{"id":2549,"url":"https://patchwork.plctlab.org/api/1.2/patches/2549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-3-haochen.jiang@intel.com/","msgid":"<20221014074058.7709-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:40:58","name":"[2/2] Initial Meteorlake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-3-haochen.jiang@intel.com/mbox/"},{"id":2553,"url":"https://patchwork.plctlab.org/api/1.2/patches/2553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-2-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:40","name":"[1/6] Support Intel AVX-IFMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-2-haochen.jiang@intel.com/mbox/"},{"id":2556,"url":"https://patchwork.plctlab.org/api/1.2/patches/2556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-3-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:41","name":"[2/6] Support Intel AVX-VNNI-INT8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-3-haochen.jiang@intel.com/mbox/"},{"id":2554,"url":"https://patchwork.plctlab.org/api/1.2/patches/2554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-4-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:42","name":"[3/6] i386: Add intrinsic for vector __bf16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-4-haochen.jiang@intel.com/mbox/"},{"id":2559,"url":"https://patchwork.plctlab.org/api/1.2/patches/2559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-5-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:43","name":"[4/6] Support Intel AVX-NE-CONVERT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-5-haochen.jiang@intel.com/mbox/"},{"id":2558,"url":"https://patchwork.plctlab.org/api/1.2/patches/2558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-6-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-6-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:44","name":"[5/6] Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-6-haochen.jiang@intel.com/mbox/"},{"id":2555,"url":"https://patchwork.plctlab.org/api/1.2/patches/2555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-7-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-7-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:45","name":"[6/6] Initial Sierra Forest Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-7-haochen.jiang@intel.com/mbox/"},{"id":2563,"url":"https://patchwork.plctlab.org/api/1.2/patches/2563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075843.8074-1-haochen.jiang@intel.com/","msgid":"<20221014075843.8074-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:58:43","name":"Support Intel AMX-FP16 ISA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075843.8074-1-haochen.jiang@intel.com/mbox/"},{"id":2571,"url":"https://patchwork.plctlab.org/api/1.2/patches/2571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-2-haochen.jiang@intel.com/","msgid":"<20221014081945.8318-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:19:44","name":"[1/3] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-2-haochen.jiang@intel.com/mbox/"},{"id":2570,"url":"https://patchwork.plctlab.org/api/1.2/patches/2570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-3-haochen.jiang@intel.com/","msgid":"<20221014081945.8318-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:19:45","name":"[2/3] Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-3-haochen.jiang@intel.com/mbox/"},{"id":2583,"url":"https://patchwork.plctlab.org/api/1.2/patches/2583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-2-haochen.jiang@intel.com/","msgid":"<20221014083406.8406-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:34:05","name":"[1/2] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-2-haochen.jiang@intel.com/mbox/"},{"id":2582,"url":"https://patchwork.plctlab.org/api/1.2/patches/2582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-3-haochen.jiang@intel.com/","msgid":"<20221014083406.8406-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:34:06","name":"[2/2] Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-3-haochen.jiang@intel.com/mbox/"},{"id":2600,"url":"https://patchwork.plctlab.org/api/1.2/patches/2600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014091135.2477155-1-jwakely@redhat.com/","msgid":"<20221014091135.2477155-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T09:11:35","name":"[committed] libstdc++: Use markdown in Doxygen comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014091135.2477155-1-jwakely@redhat.com/mbox/"},{"id":2629,"url":"https://patchwork.plctlab.org/api/1.2/patches/2629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014095120.D070313A4A@imap2.suse-dmz.suse.de/","msgid":"<20221014095120.D070313A4A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-14T09:51:20","name":"tree-optimization/107254 - check and support live lanes from permutes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014095120.D070313A4A@imap2.suse-dmz.suse.de/mbox/"},{"id":2634,"url":"https://patchwork.plctlab.org/api/1.2/patches/2634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2850050.e9J7NaK4W3@fomalhaut/","msgid":"<2850050.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2022-10-14T10:00:44","name":"[SPARC] Fix PR target/107248","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2850050.e9J7NaK4W3@fomalhaut/mbox/"},{"id":2635,"url":"https://patchwork.plctlab.org/api/1.2/patches/2635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014100316.568795-1-aldyh@redhat.com/","msgid":"<20221014100316.568795-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T10:03:16","name":"[COMMITTED] Add cases for CFN_BUILT_IN_SIGNBIT[FL].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014100316.568795-1-aldyh@redhat.com/mbox/"},{"id":2653,"url":"https://patchwork.plctlab.org/api/1.2/patches/2653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp/","msgid":"<3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-14T11:06:08","name":"xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp/mbox/"},{"id":2696,"url":"https://patchwork.plctlab.org/api/1.2/patches/2696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-1-julian@codesourcery.com/","msgid":"<20221014133856.3388109-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-14T13:38:55","name":"[og12] amdgcn: Use FLAT addressing for all functions with pointer arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-1-julian@codesourcery.com/mbox/"},{"id":2697,"url":"https://patchwork.plctlab.org/api/1.2/patches/2697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-2-julian@codesourcery.com/","msgid":"<20221014133856.3388109-2-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-14T13:38:56","name":"[og12] OpenACC: Don'\''t gang-privatize artificial variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-2-julian@codesourcery.com/mbox/"},{"id":2703,"url":"https://patchwork.plctlab.org/api/1.2/patches/2703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-1-aldyh@redhat.com/","msgid":"<20221014142652.671475-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:50","name":"[COMMITTED] Drop -0.0 in frange::set() for !HONOR_SIGNED_ZEROS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-1-aldyh@redhat.com/mbox/"},{"id":2702,"url":"https://patchwork.plctlab.org/api/1.2/patches/2702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-2-aldyh@redhat.com/","msgid":"<20221014142652.671475-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:51","name":"[COMMITTED] Normalize ranges over the range for both bounds when -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-2-aldyh@redhat.com/mbox/"},{"id":2704,"url":"https://patchwork.plctlab.org/api/1.2/patches/2704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-3-aldyh@redhat.com/","msgid":"<20221014142652.671475-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:52","name":"[COMMITTED] Replace CFN_BUILTIN_SIGNBIT* cases with CASE_FLT_FN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-3-aldyh@redhat.com/mbox/"},{"id":2705,"url":"https://patchwork.plctlab.org/api/1.2/patches/2705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143047.672008-1-aldyh@redhat.com/","msgid":"<20221014143047.672008-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:30:47","name":"Check rvc_normal in real_isdenormal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143047.672008-1-aldyh@redhat.com/mbox/"},{"id":2714,"url":"https://patchwork.plctlab.org/api/1.2/patches/2714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143602.2512815-1-jwakely@redhat.com/","msgid":"<20221014143602.2512815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:36:02","name":"[committed] libstdc++: Simplify print_raw function for debug assertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143602.2512815-1-jwakely@redhat.com/mbox/"},{"id":2715,"url":"https://patchwork.plctlab.org/api/1.2/patches/2715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143655.2512929-1-jwakely@redhat.com/","msgid":"<20221014143655.2512929-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:36:55","name":"[committed] libstdc++: Disable all emergency EH pool code if obj-count == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143655.2512929-1-jwakely@redhat.com/mbox/"},{"id":2724,"url":"https://patchwork.plctlab.org/api/1.2/patches/2724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014150851.677560-1-aldyh@redhat.com/","msgid":"<20221014150851.677560-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T15:08:51","name":"Implement range-op entry for __builtin_copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014150851.677560-1-aldyh@redhat.com/mbox/"},{"id":2754,"url":"https://patchwork.plctlab.org/api/1.2/patches/2754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c57bf84c-383e-1591-1c44-1b652fc1499f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T16:38:09","name":"[committed] gfortran.dg/c-interop/deferred-character-2.f90: Fix dg-do","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c57bf84c-383e-1591-1c44-1b652fc1499f@codesourcery.com/mbox/"},{"id":2756,"url":"https://patchwork.plctlab.org/api/1.2/patches/2756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jw6mk1s.fsf@oldenburg.str.redhat.com/","msgid":"<874jw6mk1s.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-14T16:44:47","name":"libgcc: Move cfa_how into potential padding in struct frame_state_reg_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jw6mk1s.fsf@oldenburg.str.redhat.com/mbox/"},{"id":2757,"url":"https://patchwork.plctlab.org/api/1.2/patches/2757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014170018.892575-1-ppalka@redhat.com/","msgid":"<20221014170018.892575-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-14T17:00:18","name":"c++ modules: streaming constexpr_fundef [PR101449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014170018.892575-1-ppalka@redhat.com/mbox/"},{"id":2759,"url":"https://patchwork.plctlab.org/api/1.2/patches/2759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c72ceaca-53e4-3deb-c0a6-57af9b2935a4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T17:04:06","name":"libgomp: fix hang on fatal error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c72ceaca-53e4-3deb-c0a6-57af9b2935a4@codesourcery.com/mbox/"},{"id":2784,"url":"https://patchwork.plctlab.org/api/1.2/patches/2784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014180945.697F933E53@hamza.pair.com/","msgid":"<20221014180945.697F933E53@hamza.pair.com>","list_archive_url":null,"date":"2022-10-14T18:09:38","name":"[committed] wwwdocs: *: Omit trailing slash for CSS references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014180945.697F933E53@hamza.pair.com/mbox/"},{"id":2859,"url":"https://patchwork.plctlab.org/api/1.2/patches/2859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014195648.8865-1-palmer@rivosinc.com/","msgid":"<20221014195648.8865-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-14T19:56:48","name":"[v2] RISC-V: Implement __clear_cache via __builtin___clear_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014195648.8865-1-palmer@rivosinc.com/mbox/"},{"id":2833,"url":"https://patchwork.plctlab.org/api/1.2/patches/2833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7e998fb-2ab6-71a2-7e58-c72a08a453a7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T21:18:15","name":"Fortran: Fixes for kind=4 characters strings [PR107266]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7e998fb-2ab6-71a2-7e58-c72a08a453a7@codesourcery.com/mbox/"},{"id":2889,"url":"https://patchwork.plctlab.org/api/1.2/patches/2889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014230236.134044-1-juzhe.zhong@rivai.ai/","msgid":"<20221014230236.134044-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-14T23:02:36","name":"RISC-V: Reorganize mangle_builtin_type.[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014230236.134044-1-juzhe.zhong@rivai.ai/mbox/"},{"id":2890,"url":"https://patchwork.plctlab.org/api/1.2/patches/2890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210142309130.2164505@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-14T23:10:11","name":"[committed] preprocessor: C2x identifier rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210142309130.2164505@digraph.polyomino.org.uk/mbox/"},{"id":2903,"url":"https://patchwork.plctlab.org/api/1.2/patches/2903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015035548.274704-1-guillermo.e.martinez@oracle.com/","msgid":"<20221015035548.274704-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-10-15T03:55:48","name":"[v3] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015035548.274704-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":2920,"url":"https://patchwork.plctlab.org/api/1.2/patches/2920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfjps6kf.fsf@euler.schwinge.homeip.net/","msgid":"<87sfjps6kf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-15T10:51:44","name":"libstdc++: Address '\''-Wunused-function'\'' for '\''print_raw'\'' (was: [committed] libstdc++: Simplify print_raw function for debug assertions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfjps6kf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":2971,"url":"https://patchwork.plctlab.org/api/1.2/patches/2971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202210.2687628-1-jwakely@redhat.com/","msgid":"<20221015202210.2687628-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-15T20:22:10","name":"[committed] libstdc++: Fix uses_allocator_construction args for cv pair (LWG 3677)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202210.2687628-1-jwakely@redhat.com/mbox/"},{"id":2972,"url":"https://patchwork.plctlab.org/api/1.2/patches/2972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202518.2687700-1-jwakely@redhat.com/","msgid":"<20221015202518.2687700-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-15T20:25:18","name":"[committed] libstdc++: Implement constexpr std::to_chars for C++23 (P2291R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202518.2687700-1-jwakely@redhat.com/mbox/"},{"id":2979,"url":"https://patchwork.plctlab.org/api/1.2/patches/2979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com/","msgid":"<81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com>","list_archive_url":null,"date":"2022-10-16T03:41:42","name":"[committed] Fix bug in register move costing on H8/300","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com/mbox/"},{"id":2998,"url":"https://patchwork.plctlab.org/api/1.2/patches/2998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vYOUijciWziskx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-16T10:09:39","name":"builtins: Add various __builtin_*f{16,32,64,128,32x,64x,128x} builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vYOUijciWziskx@tucnak/mbox/"},{"id":2999,"url":"https://patchwork.plctlab.org/api/1.2/patches/2999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vayeXfX4DsqW6g@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-16T10:20:10","name":"[RFC] libstdc++, v2: Partial library support for std::float{16,32,64,128}_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vayeXfX4DsqW6g@tucnak/mbox/"},{"id":3043,"url":"https://patchwork.plctlab.org/api/1.2/patches/3043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7c1fd20-0448-af53-0ca2-255ba184ebde@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-16T15:04:04","name":"[committed] Rename \"Z\" constraint on H8/300 to \"Zz\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7c1fd20-0448-af53-0ca2-255ba184ebde@gmail.com/mbox/"},{"id":3073,"url":"https://patchwork.plctlab.org/api/1.2/patches/3073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com/","msgid":"<11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com>","list_archive_url":null,"date":"2022-10-16T16:51:52","name":"[committed] Add new constraints for upcoming autoinc fixes on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com/mbox/"},{"id":3142,"url":"https://patchwork.plctlab.org/api/1.2/patches/3142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221016181531.225006-1-ovpanait@gmail.com/","msgid":"<20221016181531.225006-1-ovpanait@gmail.com>","list_archive_url":null,"date":"2022-10-16T18:15:31","name":"microblaze: use strverscmp() in MICROBLAZE_VERSION_COMPARE()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221016181531.225006-1-ovpanait@gmail.com/mbox/"},{"id":3146,"url":"https://patchwork.plctlab.org/api/1.2/patches/3146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-691dab4a-f7d3-4e48-a67b-488e2f830917-1665945998916@3c-app-gmx-bap23/","msgid":"","list_archive_url":null,"date":"2022-10-16T18:46:38","name":"Fortran: check type of operands of logical operations, comparisons [PR107272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-691dab4a-f7d3-4e48-a67b-488e2f830917-1665945998916@3c-app-gmx-bap23/mbox/"},{"id":3148,"url":"https://patchwork.plctlab.org/api/1.2/patches/3148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F829E8CE4F809219707791269@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-16T20:24:53","name":"Don'\''t print discriminators for -fcompare-debug.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F829E8CE4F809219707791269@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":3199,"url":"https://patchwork.plctlab.org/api/1.2/patches/3199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017032429.282693-1-liwei.xu@intel.com/","msgid":"<20221017032429.282693-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-17T03:24:29","name":"Move scanning pass of forwprop-19.c to dse1 for r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017032429.282693-1-liwei.xu@intel.com/mbox/"},{"id":3252,"url":"https://patchwork.plctlab.org/api/1.2/patches/3252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017073047.117398-1-juzhe.zhong@rivai.ai/","msgid":"<20221017073047.117398-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T07:30:47","name":"RISC-V: Fix format[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017073047.117398-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3257,"url":"https://patchwork.plctlab.org/api/1.2/patches/3257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rlej3o6.fsf@euler.schwinge.homeip.net/","msgid":"<878rlej3o6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T07:43:37","name":"Add '\''c-c++-common/torture/pr107195-1.c'\'' [PR107195] (was: [COMMITTED] [PR107195] Set range to zero when nonzero mask is 0.)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rlej3o6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3271,"url":"https://patchwork.plctlab.org/api/1.2/patches/3271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017082043.114653-1-juzhe.zhong@rivai.ai/","msgid":"<20221017082043.114653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T08:20:43","name":"RISC-V: Add RVV intrinsic basic framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017082043.114653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3280,"url":"https://patchwork.plctlab.org/api/1.2/patches/3280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017083642.184867-1-juzhe.zhong@rivai.ai/","msgid":"<20221017083642.184867-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T08:36:42","name":"RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017083642.184867-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3295,"url":"https://patchwork.plctlab.org/api/1.2/patches/3295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgdun7ja.fsf@oldenburg.str.redhat.com/","msgid":"<87zgdun7ja.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-17T09:06:33","name":"libgcc: Special-case BFD ld unwind table encodings in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgdun7ja.fsf@oldenburg.str.redhat.com/mbox/"},{"id":3408,"url":"https://patchwork.plctlab.org/api/1.2/patches/3408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875ygiirt6.fsf@euler.schwinge.homeip.net/","msgid":"<875ygiirt6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T11:59:49","name":"Fix nvptx-specific '\''-foffload-options'\'' syntax in '\''libgomp.c/reverse-offload-sm30.c'\'' (was: [Patch] nvptx/mkoffload.cc: Warn instead of error when reverse offload is not possible)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875ygiirt6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3411,"url":"https://patchwork.plctlab.org/api/1.2/patches/3411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qr6ire8.fsf@euler.schwinge.homeip.net/","msgid":"<871qr6ire8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T12:08:47","name":"Tag '\''gcc/gimple-expr.cc:mark_addressable_2'\'' as '\''static'\'' (was: [PR67891] drop is_gimple_reg test from set_parm_rtl)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qr6ire8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3423,"url":"https://patchwork.plctlab.org/api/1.2/patches/3423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8oihc0c.fsf@euler.schwinge.homeip.net/","msgid":"<87v8oihc0c.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T12:26:27","name":"GCN: Restore build with GCC 4.8 (was: [committed 1/6] amdgcn: add multiple vector sizes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8oihc0c.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3434,"url":"https://patchwork.plctlab.org/api/1.2/patches/3434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edv6mwp5.fsf@oldenburg.str.redhat.com/","msgid":"<87edv6mwp5.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-17T13:00:38","name":"libgcc: Mostly vectorize CIE encoding extraction for FDEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edv6mwp5.fsf@oldenburg.str.redhat.com/mbox/"},{"id":3456,"url":"https://patchwork.plctlab.org/api/1.2/patches/3456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cddfdaaa-5384-a4bc-ace5-5319962c4443@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-17T13:25:04","name":"[COMMITTED] Don'\''t set useless relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cddfdaaa-5384-a4bc-ace5-5319962c4443@redhat.com/mbox/"},{"id":3457,"url":"https://patchwork.plctlab.org/api/1.2/patches/3457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com/","msgid":"<03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:24","name":"[COMMITTED] Fix nan updating in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com/mbox/"},{"id":3458,"url":"https://patchwork.plctlab.org/api/1.2/patches/3458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com/","msgid":"<0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:40","name":"[COMMITTED] Add relation_trio class for range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com/mbox/"},{"id":3459,"url":"https://patchwork.plctlab.org/api/1.2/patches/3459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com/","msgid":"<65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:59","name":"[COMMITTED] Add 3 floating NAN tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com/mbox/"},{"id":3462,"url":"https://patchwork.plctlab.org/api/1.2/patches/3462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017132838.24693-1-aldyh@redhat.com/","msgid":"<20221017132838.24693-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:28:38","name":"[COMMITTED] Do not test for -Inf when flag_finite_math_only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017132838.24693-1-aldyh@redhat.com/mbox/"},{"id":3464,"url":"https://patchwork.plctlab.org/api/1.2/patches/3464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017133925.34686-1-aldyh@redhat.com/","msgid":"<20221017133925.34686-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:39:25","name":"[COMMITTED,PR10582] Add test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017133925.34686-1-aldyh@redhat.com/mbox/"},{"id":3484,"url":"https://patchwork.plctlab.org/api/1.2/patches/3484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017144437.157424-1-jwjagersma@gmail.com/","msgid":"<20221017144437.157424-1-jwjagersma@gmail.com>","list_archive_url":null,"date":"2022-10-17T14:44:37","name":"i386: Allow setting target attribute from conditional expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017144437.157424-1-jwjagersma@gmail.com/mbox/"},{"id":3572,"url":"https://patchwork.plctlab.org/api/1.2/patches/3572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y014Rs9LF2AT3Dow@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-17T15:44:06","name":"middle-end, v4: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y014Rs9LF2AT3Dow@tucnak/mbox/"},{"id":3589,"url":"https://patchwork.plctlab.org/api/1.2/patches/3589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y02CFLLygVNSOmL2@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-17T16:25:56","name":"libstdc++, v3: Partial library support for std::float{16,32,64,128}_t and std::bfloat16_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y02CFLLygVNSOmL2@tucnak/mbox/"},{"id":3590,"url":"https://patchwork.plctlab.org/api/1.2/patches/3590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017162632.1085359-1-ppalka@redhat.com/","msgid":"<20221017162632.1085359-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-17T16:26:32","name":"libstdc++: Redefine __from_chars_alnum_to_val'\''s table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017162632.1085359-1-ppalka@redhat.com/mbox/"},{"id":3648,"url":"https://patchwork.plctlab.org/api/1.2/patches/3648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017180844.3492051-1-ibuclaw@gdcproject.org/","msgid":"<20221017180844.3492051-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-10-17T18:08:44","name":"d: Remove D-specific version definitions from target headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017180844.3492051-1-ibuclaw@gdcproject.org/mbox/"},{"id":3656,"url":"https://patchwork.plctlab.org/api/1.2/patches/3656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017185618.78502-1-aldyh@redhat.com/","msgid":"<20221017185618.78502-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T18:56:18","name":"[COMMITTED] Make sure exported range for SSA post-dominates the DEF in set_global_ranges_from_unreachable_edges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017185618.78502-1-aldyh@redhat.com/mbox/"},{"id":3696,"url":"https://patchwork.plctlab.org/api/1.2/patches/3696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017200926.1230070-1-ppalka@redhat.com/","msgid":"<20221017200926.1230070-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-17T20:09:26","name":"libstdc++: Implement ranges::stride_view from P1899R3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017200926.1230070-1-ppalka@redhat.com/mbox/"},{"id":3824,"url":"https://patchwork.plctlab.org/api/1.2/patches/3824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0111671-f8c5-0daf-8fe6-03a38055e9b0@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-17T23:25:39","name":"[committed] Add missing splitter for H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0111671-f8c5-0daf-8fe6-03a38055e9b0@gmail.com/mbox/"},{"id":3827,"url":"https://patchwork.plctlab.org/api/1.2/patches/3827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com/","msgid":"<0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:38:11","name":"[committed] Enable REE for H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com/mbox/"},{"id":3828,"url":"https://patchwork.plctlab.org/api/1.2/patches/3828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com/","msgid":"<3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:47:16","name":"[committed] More infrastructure to avoid bogus RTL on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com/mbox/"},{"id":3832,"url":"https://patchwork.plctlab.org/api/1.2/patches/3832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com/","msgid":"<1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:55:05","name":"[committed,PR,target/101697] Fix bogus RTL on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com/mbox/"},{"id":3859,"url":"https://patchwork.plctlab.org/api/1.2/patches/3859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab0052a8-e12a-a761-c71f-4ca5c4a355e2@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T01:05:17","name":"[COMMITTED] PR tree-optimization/107273 - Merge partial relation precisions properly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab0052a8-e12a-a761-c71f-4ca5c4a355e2@redhat.com/mbox/"},{"id":3913,"url":"https://patchwork.plctlab.org/api/1.2/patches/3913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1609279-d845-30a1-1ec6-ed0ca6c60a68@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-18T02:57:31","name":"[v2] xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1609279-d845-30a1-1ec6-ed0ca6c60a68@yahoo.co.jp/mbox/"},{"id":4008,"url":"https://patchwork.plctlab.org/api/1.2/patches/4008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018083022.2B11F139D2@imap2.suse-dmz.suse.de/","msgid":"<20221018083022.2B11F139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-18T08:30:21","name":"tree-optimization/107301 - check if we can duplicate block before doing so","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018083022.2B11F139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":4009,"url":"https://patchwork.plctlab.org/api/1.2/patches/4009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0888cc2d-2040-52c3-1201-16400567300b@arm.com/","msgid":"<0888cc2d-2040-52c3-1201-16400567300b@arm.com>","list_archive_url":null,"date":"2022-10-18T08:35:15","name":"ifcvt: Do not lower bitfields if we can'\''t analyze dr'\''s [PR107275]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0888cc2d-2040-52c3-1201-16400567300b@arm.com/mbox/"},{"id":4043,"url":"https://patchwork.plctlab.org/api/1.2/patches/4043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091050.82778-1-haochen.jiang@intel.com/","msgid":"<20221018091050.82778-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:10:50","name":"[v2] Support Intel AVX-VNNI-INT8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091050.82778-1-haochen.jiang@intel.com/mbox/"},{"id":4046,"url":"https://patchwork.plctlab.org/api/1.2/patches/4046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091727.82856-1-haochen.jiang@intel.com/","msgid":"<20221018091727.82856-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:17:27","name":"i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091727.82856-1-haochen.jiang@intel.com/mbox/"},{"id":4047,"url":"https://patchwork.plctlab.org/api/1.2/patches/4047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018092024.84082-1-haochen.jiang@intel.com/","msgid":"<20221018092024.84082-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:20:24","name":"[v2] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018092024.84082-1-haochen.jiang@intel.com/mbox/"},{"id":4055,"url":"https://patchwork.plctlab.org/api/1.2/patches/4055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0z5jws2.fsf@oldenburg.str.redhat.com/","msgid":"<87r0z5jws2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T09:39:25","name":"libsanitizer: Avoid implicit function declaration in configure test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0z5jws2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4065,"url":"https://patchwork.plctlab.org/api/1.2/patches/4065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h701jvk2.fsf@oldenburg.str.redhat.com/","msgid":"<87h701jvk2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T10:05:49","name":"libiberty: Fix C89-isms in configure tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h701jvk2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4075,"url":"https://patchwork.plctlab.org/api/1.2/patches/4075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2eae96f7642b974a6c0fd3d90fec80e9f65936f.1666088224.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T10:39:02","name":"[v5,1/4] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2eae96f7642b974a6c0fd3d90fec80e9f65936f.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4077,"url":"https://patchwork.plctlab.org/api/1.2/patches/4077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com/","msgid":"<8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:03","name":"[v5,2/4] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4074,"url":"https://patchwork.plctlab.org/api/1.2/patches/4074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com/","msgid":"<80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:04","name":"[v5,3/4] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4076,"url":"https://patchwork.plctlab.org/api/1.2/patches/4076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com/","msgid":"<83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:05","name":"[v5,4/4] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4078,"url":"https://patchwork.plctlab.org/api/1.2/patches/4078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018104758.20724139D2@imap2.suse-dmz.suse.de/","msgid":"<20221018104758.20724139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-18T10:47:57","name":"tree-optimization/107302 - fix vec_perm placement for recurrence vect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018104758.20724139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":4093,"url":"https://patchwork.plctlab.org/api/1.2/patches/4093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y06KvPa5EeXFijaV@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T11:15:08","name":"[ping,wwwdocs] Add reference to pp_format to Coding Conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y06KvPa5EeXFijaV@redhat.com/mbox/"},{"id":4180,"url":"https://patchwork.plctlab.org/api/1.2/patches/4180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6czap6y5j.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-18T13:48:08","name":"SRA: Limit replacement creation for accesses propagated from LHSs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6czap6y5j.fsf@suse.cz/mbox/"},{"id":4185,"url":"https://patchwork.plctlab.org/api/1.2/patches/4185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210181407500.2354457@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-18T14:08:40","name":"[committed] c: C2x enums wider than int [PR36113]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210181407500.2354457@digraph.polyomino.org.uk/mbox/"},{"id":4187,"url":"https://patchwork.plctlab.org/api/1.2/patches/4187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8ohi5ng.fsf@oldenburg.str.redhat.com/","msgid":"<87v8ohi5ng.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T14:10:43","name":"[v2] libiberty: Fix C89-isms in configure tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8ohi5ng.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4191,"url":"https://patchwork.plctlab.org/api/1.2/patches/4191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018141310.3139378-1-ppalka@redhat.com/","msgid":"<20221018141310.3139378-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T14:13:10","name":"c++ modules: stream non-trailing default targs [PR105045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018141310.3139378-1-ppalka@redhat.com/mbox/"},{"id":4214,"url":"https://patchwork.plctlab.org/api/1.2/patches/4214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018151212.1523137-1-manolis.tsamis@vrull.eu/","msgid":"<20221018151212.1523137-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-10-18T15:12:12","name":"[v2] Enable shrink wrapping for the RISC-V target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018151212.1523137-1-manolis.tsamis@vrull.eu/mbox/"},{"id":4269,"url":"https://patchwork.plctlab.org/api/1.2/patches/4269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018173829.392773-1-polacek@redhat.com/","msgid":"<20221018173829.392773-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-18T17:38:29","name":"c++: Mitigate -Wuseless-cast with classes [PR85043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018173829.392773-1-polacek@redhat.com/mbox/"},{"id":4275,"url":"https://patchwork.plctlab.org/api/1.2/patches/4275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-1-ppalka@redhat.com/","msgid":"<20221018181050.1629201-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T18:10:49","name":"[1/2] c++ modules: streaming enum with no enumerators [PR102600]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-1-ppalka@redhat.com/mbox/"},{"id":4276,"url":"https://patchwork.plctlab.org/api/1.2/patches/4276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-2-ppalka@redhat.com/","msgid":"<20221018181050.1629201-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T18:10:50","name":"[2/2] c++ modules: always stream TYPE_MIN/MAX_VALUE for enums [PR106848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-2-ppalka@redhat.com/mbox/"},{"id":4303,"url":"https://patchwork.plctlab.org/api/1.2/patches/4303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com/","msgid":"<9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T19:27:04","name":"OpenMP: Fix reverse offload GOMP_TARGET_REV IFN corner cases [PR107236]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com/mbox/"},{"id":4322,"url":"https://patchwork.plctlab.org/api/1.2/patches/4322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018211204.0BCA533E4A@hamza.pair.com/","msgid":"<20221018211204.0BCA533E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-18T21:12:00","name":"[committed] wwwdocs: *: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018211204.0BCA533E4A@hamza.pair.com/mbox/"},{"id":4342,"url":"https://patchwork.plctlab.org/api/1.2/patches/4342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa605ce17fbe4783b46a2cea7b3fa6d99d2cbfe6.1666131048.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T22:14:54","name":"pch: Fix streaming of strings with embedded null bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa605ce17fbe4783b46a2cea7b3fa6d99d2cbfe6.1666131048.git.lhyatt@gmail.com/mbox/"},{"id":4364,"url":"https://patchwork.plctlab.org/api/1.2/patches/4364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018232301.264776-1-hongtao.liu@intel.com/","msgid":"<20221018232301.264776-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-18T23:23:01","name":"Canonicalize vec_perm index to make the first index come from the first vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018232301.264776-1-hongtao.liu@intel.com/mbox/"},{"id":4365,"url":"https://patchwork.plctlab.org/api/1.2/patches/4365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210182326090.2363097@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-18T23:26:40","name":"[committed] c: Diagnose \"enum tag;\" after definition [PR107164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210182326090.2363097@digraph.polyomino.org.uk/mbox/"},{"id":4421,"url":"https://patchwork.plctlab.org/api/1.2/patches/4421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com/","msgid":"<31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com>","list_archive_url":null,"date":"2022-10-19T03:18:42","name":"vect: Try folding first for shifted value generation [PR107240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com/mbox/"},{"id":4422,"url":"https://patchwork.plctlab.org/api/1.2/patches/4422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3c052a5-70d2-56e7-226d-5b148924df6b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T03:19:00","name":"rs6000/test: Support vect_long_long effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3c052a5-70d2-56e7-226d-5b148924df6b@linux.ibm.com/mbox/"},{"id":4441,"url":"https://patchwork.plctlab.org/api/1.2/patches/4441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019060321.61112-1-hongyu.wang@intel.com/","msgid":"<20221019060321.61112-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-10-19T06:03:21","name":"Support Intel AVX-IFMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019060321.61112-1-hongyu.wang@intel.com/mbox/"},{"id":4445,"url":"https://patchwork.plctlab.org/api/1.2/patches/4445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6f0093a-cba8-6b60-aacc-ca02f781844b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T06:22:11","name":"s390: Fix bootstrap error with checking and -m31","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6f0093a-cba8-6b60-aacc-ca02f781844b@linux.ibm.com/mbox/"},{"id":4467,"url":"https://patchwork.plctlab.org/api/1.2/patches/4467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+rxzMBPmFcWzqe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T07:48:23","name":"c++: Don'\''t shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_constant_expression [PR107295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+rxzMBPmFcWzqe@tucnak/mbox/"},{"id":4468,"url":"https://patchwork.plctlab.org/api/1.2/patches/4468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+tShfF4ku2nMoM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T07:54:50","name":"expr: Fix ICE on BFmode -> SFmode conversion of constant [PR107262]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+tShfF4ku2nMoM@tucnak/mbox/"},{"id":4469,"url":"https://patchwork.plctlab.org/api/1.2/patches/4469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+upcPTOYp9/pFM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:00:37","name":"c++: Fix up mangling ICE with void{} [PR106863]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+upcPTOYp9/pFM@tucnak/mbox/"},{"id":4470,"url":"https://patchwork.plctlab.org/api/1.2/patches/4470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+vA4HZAdC68eE4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:02:11","name":"match.pd: Add 2 TYPE_OVERFLOW_SANITIZED checks [PR106990]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+vA4HZAdC68eE4@tucnak/mbox/"},{"id":4476,"url":"https://patchwork.plctlab.org/api/1.2/patches/4476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp/","msgid":"<3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-19T08:16:24","name":"[v3] xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp/mbox/"},{"id":4479,"url":"https://patchwork.plctlab.org/api/1.2/patches/4479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+z9IfvRybw/D2c@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:23:16","name":"libstdc++-v3: Implement {,b}float16_t nextafter and some fixes [PR106652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+z9IfvRybw/D2c@tucnak/mbox/"},{"id":4582,"url":"https://patchwork.plctlab.org/api/1.2/patches/4582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+6OPW020p5Zran@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:50:00","name":"i386: Fix up __bf16 handling on ia32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+6OPW020p5Zran@tucnak/mbox/"},{"id":4605,"url":"https://patchwork.plctlab.org/api/1.2/patches/4605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019085530.9691513345@imap2.suse-dmz.suse.de/","msgid":"<20221019085530.9691513345@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-19T08:55:30","name":"tree-optimization/106781 - adjust cgraph lhs removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019085530.9691513345@imap2.suse-dmz.suse.de/mbox/"},{"id":4918,"url":"https://patchwork.plctlab.org/api/1.2/patches/4918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019094214.1734353-1-torbjorn.svensson@foss.st.com/","msgid":"<20221019094214.1734353-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-19T09:42:15","name":"arm: Allow to override location of .gnu.sgstubs section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019094214.1734353-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":5239,"url":"https://patchwork.plctlab.org/api/1.2/patches/5239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5888ab6-564e-33ad-452b-f69e52c66b31@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T11:27:22","name":"Fortran: Fix non_negative_strides_array_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5888ab6-564e-33ad-452b-f69e52c66b31@codesourcery.com/mbox/"},{"id":5406,"url":"https://patchwork.plctlab.org/api/1.2/patches/5406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0/0mF4j3680bCG8@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T12:59:04","name":"libstdc++-v3: Some std::*float*_t charconv and i/ostream overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0/0mF4j3680bCG8@tucnak/mbox/"},{"id":5444,"url":"https://patchwork.plctlab.org/api/1.2/patches/5444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a41c1abe-3bd4-9079-6d06-a7a00b5aa3ef@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-19T13:24:43","name":"[(pushed)] avr: remove useless @tie{} directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a41c1abe-3bd4-9079-6d06-a7a00b5aa3ef@suse.cz/mbox/"},{"id":5536,"url":"https://patchwork.plctlab.org/api/1.2/patches/5536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019140212.44796-1-aldyh@redhat.com/","msgid":"<20221019140212.44796-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-19T14:02:12","name":"[COMMITTED,PR,tree-optimization/107312] Make range_true_and_false work with 1-bit signed types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019140212.44796-1-aldyh@redhat.com/mbox/"},{"id":5573,"url":"https://patchwork.plctlab.org/api/1.2/patches/5573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141341.3218C33E1B@hamza.pair.com/","msgid":"<20221019141341.3218C33E1B@hamza.pair.com>","list_archive_url":null,"date":"2022-10-19T14:13:38","name":"[committed] wwwdocs: codingconventions: Fix two typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141341.3218C33E1B@hamza.pair.com/mbox/"},{"id":5587,"url":"https://patchwork.plctlab.org/api/1.2/patches/5587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c64b0db5-9acb-ac22-1473-8759c1188a90@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T14:18:42","name":"[OG12,committed] Fortran: Fix delinearization regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c64b0db5-9acb-ac22-1473-8759c1188a90@codesourcery.com/mbox/"},{"id":5591,"url":"https://patchwork.plctlab.org/api/1.2/patches/5591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141949.1741947-1-torbjorn.svensson@foss.st.com/","msgid":"<20221019141949.1741947-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-19T14:19:50","name":"[v4] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141949.1741947-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":5594,"url":"https://patchwork.plctlab.org/api/1.2/patches/5594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019143141.248710-1-ppalka@redhat.com/","msgid":"<20221019143141.248710-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-19T14:31:41","name":"libstdc++: Fix typo in stride_view'\''s operator- [PR107313]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019143141.248710-1-ppalka@redhat.com/mbox/"},{"id":5693,"url":"https://patchwork.plctlab.org/api/1.2/patches/5693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AXafpqS9xxvvTp@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T15:27:37","name":"testsuite: Default make check-g++ vs. tests for newest C++ standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AXafpqS9xxvvTp@tucnak/mbox/"},{"id":5695,"url":"https://patchwork.plctlab.org/api/1.2/patches/5695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca0fe26c-5422-d5ee-27b0-cdfbee80b0dc@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T15:37:17","name":"[OG12,committed] Fix omp-expand.cc'\''s expand_omp_target for OpenACC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca0fe26c-5422-d5ee-27b0-cdfbee80b0dc@codesourcery.com/mbox/"},{"id":5725,"url":"https://patchwork.plctlab.org/api/1.2/patches/5725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com/","msgid":"<0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com>","list_archive_url":null,"date":"2022-10-19T16:04:03","name":"[COMMITTED] Use Value_Range when applying inferred ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com/mbox/"},{"id":5741,"url":"https://patchwork.plctlab.org/api/1.2/patches/5741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AkY7V2xil5Wpub@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T16:22:59","name":"testsuite: Fix up c2x-enum-1.c for 32-bit arches [PR107311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AkY7V2xil5Wpub@tucnak/mbox/"},{"id":5742,"url":"https://patchwork.plctlab.org/api/1.2/patches/5742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1An8APGvWejfjHX@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T16:38:08","name":"[v2] c++: Mitigate -Wuseless-cast with classes [PR85043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1An8APGvWejfjHX@redhat.com/mbox/"},{"id":5744,"url":"https://patchwork.plctlab.org/api/1.2/patches/5744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019164645.301739-1-ppalka@redhat.com/","msgid":"<20221019164645.301739-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-19T16:46:45","name":"libstdc++: Implement P2474R2 changes to views::take/drop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019164645.301739-1-ppalka@redhat.com/mbox/"},{"id":5821,"url":"https://patchwork.plctlab.org/api/1.2/patches/5821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019191929.3262862-1-arsen@aarsen.me/","msgid":"<20221019191929.3262862-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-19T19:19:31","name":"libstdc++: Enable _GLIBCXX_WEAK_DEFINITION on more platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019191929.3262862-1-arsen@aarsen.me/mbox/"},{"id":5839,"url":"https://patchwork.plctlab.org/api/1.2/patches/5839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d13d78b2-088f-400d-978c-b700912aeb30-1666212584693@3c-app-gmx-bap39/","msgid":"","list_archive_url":null,"date":"2022-10-19T20:49:44","name":"Fortran: error recovery with references of bad array constructors [PR105633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d13d78b2-088f-400d-978c-b700912aeb30-1666212584693@3c-app-gmx-bap39/mbox/"},{"id":5849,"url":"https://patchwork.plctlab.org/api/1.2/patches/5849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019205249.1502419-1-dmalcolm@redhat.com/","msgid":"<20221019205249.1502419-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-19T20:52:49","name":"[committed] analyzer: fix ICE on __builtin_ms_va_copy [PR105765]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019205249.1502419-1-dmalcolm@redhat.com/mbox/"},{"id":5851,"url":"https://patchwork.plctlab.org/api/1.2/patches/5851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019211550.135116-1-aldyh@redhat.com/","msgid":"<20221019211550.135116-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-19T21:15:50","name":"[COMMITTED] Always check result from build_ in range-op-float.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019211550.135116-1-aldyh@redhat.com/mbox/"},{"id":5855,"url":"https://patchwork.plctlab.org/api/1.2/patches/5855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210192155530.14960@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-19T21:56:41","name":"[committed] c: C2x %wN, %wfN format checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210192155530.14960@digraph.polyomino.org.uk/mbox/"},{"id":5866,"url":"https://patchwork.plctlab.org/api/1.2/patches/5866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019220638.13422-1-david.faust@oracle.com/","msgid":"<20221019220638.13422-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-19T22:06:38","name":"bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019220638.13422-1-david.faust@oracle.com/mbox/"},{"id":5930,"url":"https://patchwork.plctlab.org/api/1.2/patches/5930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com/","msgid":"<06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-19T23:08:54","name":"diagnostics: Allow FEs to keep customizations for middle end [PR101551, PR106274]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com/mbox/"},{"id":5942,"url":"https://patchwork.plctlab.org/api/1.2/patches/5942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020000559.371886-1-whh8b@obs.cr/","msgid":"<20221020000559.371886-1-whh8b@obs.cr>","list_archive_url":null,"date":"2022-10-20T00:05:59","name":"libstdc++: Refactor implementation of operator+ for std::string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020000559.371886-1-whh8b@obs.cr/mbox/"},{"id":5945,"url":"https://patchwork.plctlab.org/api/1.2/patches/5945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com/","msgid":"<8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com>","list_archive_url":null,"date":"2022-10-20T00:37:57","name":"[COMMITTED] PR c++/106654 - Add assume support to VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com/mbox/"},{"id":5957,"url":"https://patchwork.plctlab.org/api/1.2/patches/5957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020020507.616781-1-guillermo.e.martinez@oracle.com/","msgid":"<20221020020507.616781-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-10-20T02:05:07","name":"[v4] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020020507.616781-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":6097,"url":"https://patchwork.plctlab.org/api/1.2/patches/6097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020092917.358DD13494@imap2.suse-dmz.suse.de/","msgid":"<20221020092917.358DD13494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-20T09:29:16","name":"c/107305 - avoid ICEing with invalid GIMPLE input to the GIMPLE FE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020092917.358DD13494@imap2.suse-dmz.suse.de/mbox/"},{"id":6102,"url":"https://patchwork.plctlab.org/api/1.2/patches/6102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-2-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:32","name":"[v4,1/4] RISC-V: Minimal support of z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-2-jiawei@iscas.ac.cn/mbox/"},{"id":6103,"url":"https://patchwork.plctlab.org/api/1.2/patches/6103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-3-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:33","name":"[v4,2/4] RISC-V: Target support for z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-3-jiawei@iscas.ac.cn/mbox/"},{"id":6105,"url":"https://patchwork.plctlab.org/api/1.2/patches/6105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-4-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:34","name":"[v4,3/4] RISC-V: Limit regs use for z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-4-jiawei@iscas.ac.cn/mbox/"},{"id":6104,"url":"https://patchwork.plctlab.org/api/1.2/patches/6104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-5-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-5-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:35","name":"[v4,4/4] RISC-V: Add zhinx/zhinxmin testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-5-jiawei@iscas.ac.cn/mbox/"},{"id":6108,"url":"https://patchwork.plctlab.org/api/1.2/patches/6108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0z27s0v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:39:44","name":"[pushed] aarch64: Fix matching of BRKNS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0z27s0v.fsf@arm.com/mbox/"},{"id":6109,"url":"https://patchwork.plctlab.org/api/1.2/patches/6109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk04u7rz0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:40:51","name":"[pushed] aarch64: Prevent generation of /M BRKAS and BRKBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk04u7rz0.fsf@arm.com/mbox/"},{"id":6111,"url":"https://patchwork.plctlab.org/api/1.2/patches/6111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedv27ry0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:41:27","name":"[pushed] aarch64: Replace CONSTEXPR with constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedv27ry0.fsf@arm.com/mbox/"},{"id":6112,"url":"https://patchwork.plctlab.org/api/1.2/patches/6112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rla7rwz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:42:04","name":"[pushed] aarch64: Use using directives to inherit constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rla7rwz.fsf@arm.com/mbox/"},{"id":6110,"url":"https://patchwork.plctlab.org/api/1.2/patches/6110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35bi7rw0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:42:39","name":"[pushed] aarch64: Commonise some folding code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35bi7rw0.fsf@arm.com/mbox/"},{"id":6113,"url":"https://patchwork.plctlab.org/api/1.2/patches/6113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7u6hl7c.fsf@euler.schwinge.homeip.net/","msgid":"<87o7u6hl7c.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T09:56:55","name":"Make '\''autoreconf'\'' work for '\''gcc'\'', '\''libobjc'\'' (was: [PATCH] regenerate configure files and config.h.in files)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7u6hl7c.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6128,"url":"https://patchwork.plctlab.org/api/1.2/patches/6128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lepahkt3.fsf@euler.schwinge.homeip.net/","msgid":"<87lepahkt3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T10:05:28","name":"amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421] (was: [PATCH] [og12] amdgcn: Use FLAT addressing for all functions with pointer arguments)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lepahkt3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6140,"url":"https://patchwork.plctlab.org/api/1.2/patches/6140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zyhk5r.fsf@euler.schwinge.homeip.net/","msgid":"<87h6zyhk5r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T10:19:28","name":"Add '\''libgomp.oacc-c-c++-common/private-big-1.c'\'' [PR105421] (was: amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zyhk5r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6151,"url":"https://patchwork.plctlab.org/api/1.2/patches/6151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de/","msgid":"<20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-20T10:49:42","name":"Avoid PHI - PHI recurrence in vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de/mbox/"},{"id":6154,"url":"https://patchwork.plctlab.org/api/1.2/patches/6154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020110305.23A3033E79@hamza.pair.com/","msgid":"<20221020110305.23A3033E79@hamza.pair.com>","list_archive_url":null,"date":"2022-10-20T11:03:03","name":"[committed] wwwdocs: *: Omit trailing slash for tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020110305.23A3033E79@hamza.pair.com/mbox/"},{"id":6155,"url":"https://patchwork.plctlab.org/api/1.2/patches/6155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a65qhhk0.fsf@euler.schwinge.homeip.net/","msgid":"<87a65qhhk0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T11:15:43","name":"Remove support for Intel MIC offloading (was: [PATCH] Remove dead code.)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a65qhhk0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6162,"url":"https://patchwork.plctlab.org/api/1.2/patches/6162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-10-20T11:38:43","name":"Add '\''gcc.dg/tree-ssa/pr107195-3.c'\'' [PR107195] (was: Add '\''c-c++-common/torture/pr107195-1.c'\'' [PR107195] (was: [COMMITTED] [PR107195] Set range to zero when nonzero mask is 0.))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":6171,"url":"https://patchwork.plctlab.org/api/1.2/patches/6171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5Qw0au5ahZKvj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:04:19","name":"[committed] passes: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5Qw0au5ahZKvj@tucnak/mbox/"},{"id":6172,"url":"https://patchwork.plctlab.org/api/1.2/patches/6172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5fSXzOgOZcX67@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:05:17","name":"[committed] testsuite: Add some missing -Wno-psabi options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5fSXzOgOZcX67@tucnak/mbox/"},{"id":6182,"url":"https://patchwork.plctlab.org/api/1.2/patches/6182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FDkdIxfNGPH7KZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:48:17","name":"match.pd: Fix up gcc.dg/pr54346.c on i686-linux [PR54346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FDkdIxfNGPH7KZ@tucnak/mbox/"},{"id":6183,"url":"https://patchwork.plctlab.org/api/1.2/patches/6183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020125615.2198195-1-arsen@aarsen.me/","msgid":"<20221020125615.2198195-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T12:56:16","name":"libstdc++: Don'\''t use gstdint.h anymore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020125615.2198195-1-arsen@aarsen.me/mbox/"},{"id":6210,"url":"https://patchwork.plctlab.org/api/1.2/patches/6210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f65c009b-bbff-3358-b3f4-c4ce73f01d7c@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T13:58:09","name":"vect: Fix vectype when widening container type in bitfield pattern [PR107326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f65c009b-bbff-3358-b3f4-c4ce73f01d7c@arm.com/mbox/"},{"id":6211,"url":"https://patchwork.plctlab.org/api/1.2/patches/6211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020140740.415427-1-ppalka@redhat.com/","msgid":"<20221020140740.415427-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:07:40","name":"c++ modules: handle CONCEPT_DECL in node_template_info [PR102963]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020140740.415427-1-ppalka@redhat.com/mbox/"},{"id":6215,"url":"https://patchwork.plctlab.org/api/1.2/patches/6215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-1-aldyh@redhat.com/","msgid":"<20221020141336.228799-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:13:35","name":"[COMMITTED] Replace finite_operands_p with maybe_isnan.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-1-aldyh@redhat.com/mbox/"},{"id":6214,"url":"https://patchwork.plctlab.org/api/1.2/patches/6214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-2-aldyh@redhat.com/","msgid":"<20221020141336.228799-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:13:36","name":"[COMMITTED] Do not set NAN flags for VARYING ranges when !HONOR_NANS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-2-aldyh@redhat.com/mbox/"},{"id":6221,"url":"https://patchwork.plctlab.org/api/1.2/patches/6221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020142019.2418744-1-arsen@aarsen.me/","msgid":"<20221020142019.2418744-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T14:20:19","name":"[v2] libstdc++: Don'\''t use gstdint.h anymore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020142019.2418744-1-arsen@aarsen.me/mbox/"},{"id":6224,"url":"https://patchwork.plctlab.org/api/1.2/patches/6224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FdaWQjQMbkJ3rB@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T14:38:33","name":"c++, v2: Fix up mangling ICE with void{} [PR106863]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FdaWQjQMbkJ3rB@tucnak/mbox/"},{"id":6235,"url":"https://patchwork.plctlab.org/api/1.2/patches/6235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020145849.2459976-1-arsen@aarsen.me/","msgid":"<20221020145849.2459976-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T14:58:53","name":"libstdc++: Make placeholders inline when inline variables are available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020145849.2459976-1-arsen@aarsen.me/mbox/"},{"id":6265,"url":"https://patchwork.plctlab.org/api/1.2/patches/6265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020154948.2511787-1-arsen@aarsen.me/","msgid":"<20221020154948.2511787-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T15:49:50","name":"libstdc++: Enable building libstdc++.{a,so} when !HOSTED","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020154948.2511787-1-arsen@aarsen.me/mbox/"},{"id":6282,"url":"https://patchwork.plctlab.org/api/1.2/patches/6282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz/","msgid":"<33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz>","list_archive_url":null,"date":"2022-10-20T16:07:38","name":"[(pushed)] Remove dead link to Buildbot.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz/mbox/"},{"id":6284,"url":"https://patchwork.plctlab.org/api/1.2/patches/6284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020161414.7430-1-julian@codesourcery.com/","msgid":"<20221020161414.7430-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-20T16:14:13","name":"OpenMP: Duplicate checking for map clauses in Fortran (PR107214)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020161414.7430-1-julian@codesourcery.com/mbox/"},{"id":6298,"url":"https://patchwork.plctlab.org/api/1.2/patches/6298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfSSoVe+gmnco1uwJiE6=VFHboNXweEehqLsw763c5OwwA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T16:33:40","name":"PATCH: c++tools: fix compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfSSoVe+gmnco1uwJiE6=VFHboNXweEehqLsw763c5OwwA@mail.gmail.com/mbox/"},{"id":6299,"url":"https://patchwork.plctlab.org/api/1.2/patches/6299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020164633.256422-1-aldyh@redhat.com/","msgid":"<20221020164633.256422-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T16:46:33","name":"[COMMITTED] A false UNORDERED_ means neither operand can be a NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020164633.256422-1-aldyh@redhat.com/mbox/"},{"id":6300,"url":"https://patchwork.plctlab.org/api/1.2/patches/6300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com/","msgid":"<562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com>","list_archive_url":null,"date":"2022-10-20T16:50:44","name":"Fix uninitialized variable warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com/mbox/"},{"id":6303,"url":"https://patchwork.plctlab.org/api/1.2/patches/6303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020165734.1113688-1-hjl.tools@gmail.com/","msgid":"<20221020165734.1113688-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-20T16:57:34","name":"Always use TYPE_MODE instead of DECL_MODE for vector field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020165734.1113688-1-hjl.tools@gmail.com/mbox/"},{"id":6312,"url":"https://patchwork.plctlab.org/api/1.2/patches/6312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffef327d-54c2-1c52-319a-419d11c60bf0@eagerm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T17:35:37","name":"Microblaze: Fix uninitialized variable warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffef327d-54c2-1c52-319a-419d11c60bf0@eagerm.com/mbox/"},{"id":6313,"url":"https://patchwork.plctlab.org/api/1.2/patches/6313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com/","msgid":"<3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com>","list_archive_url":null,"date":"2022-10-20T17:38:08","name":"[OG12] libgomp.c-c++-common/requires-4.c: dg-xfail-run-if for USM with -foffload-memory=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com/mbox/"},{"id":6315,"url":"https://patchwork.plctlab.org/api/1.2/patches/6315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdea12bb-4d15-62a1-5e55-5948434568ab@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T17:41:53","name":"[OG12] omp-oacc-kernels-decompose.cc: fix -fcompare-debug with GIMPLE_DEBUG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdea12bb-4d15-62a1-5e55-5948434568ab@codesourcery.com/mbox/"},{"id":6364,"url":"https://patchwork.plctlab.org/api/1.2/patches/6364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194222.259811-1-aldyh@redhat.com/","msgid":"<20221020194222.259811-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T19:42:22","name":"[COMMITTED] Add op[12]_range for UNORDERED_LT entries in range-op.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194222.259811-1-aldyh@redhat.com/mbox/"},{"id":6366,"url":"https://patchwork.plctlab.org/api/1.2/patches/6366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194326.260151-1-aldyh@redhat.com/","msgid":"<20221020194326.260151-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T19:43:26","name":"[COMMITTED,PR,c++/106654] Handle non-irange ranges in get_range_global for default defs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194326.260151-1-aldyh@redhat.com/mbox/"},{"id":6376,"url":"https://patchwork.plctlab.org/api/1.2/patches/6376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020202053.3389227-1-jason@redhat.com/","msgid":"<20221020202053.3389227-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-20T20:20:53","name":"[RFA] tree: add build_string_literal overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020202053.3389227-1-jason@redhat.com/mbox/"},{"id":6397,"url":"https://patchwork.plctlab.org/api/1.2/patches/6397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020204825.3248771-1-torbjorn.svensson@foss.st.com/","msgid":"<20221020204825.3248771-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-20T20:48:26","name":"cpp/remap: Only override if string matched","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020204825.3248771-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":6423,"url":"https://patchwork.plctlab.org/api/1.2/patches/6423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020215402.ED7CC33E63@hamza.pair.com/","msgid":"<20221020215402.ED7CC33E63@hamza.pair.com>","list_archive_url":null,"date":"2022-10-20T21:54:01","name":"[committed] wwwdocs: *: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020215402.ED7CC33E63@hamza.pair.com/mbox/"},{"id":6471,"url":"https://patchwork.plctlab.org/api/1.2/patches/6471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ0PR11MB5600A9CDD52DBEC97E81257D9E2D9@SJ0PR11MB5600.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-21T01:52:06","name":"Ping^3 [PATCH V2] Add attribute hot judgement for INLINE_HINT_known_hot hint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ0PR11MB5600A9CDD52DBEC97E81257D9E2D9@SJ0PR11MB5600.namprd11.prod.outlook.com/mbox/"},{"id":6491,"url":"https://patchwork.plctlab.org/api/1.2/patches/6491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/faee7f9c-aef5-33e7-5f22-a52464ee4c35@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-21T02:58:35","name":"xtensa: Make register A0 allocable for the CALL0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/faee7f9c-aef5-33e7-5f22-a52464ee4c35@yahoo.co.jp/mbox/"},{"id":6510,"url":"https://patchwork.plctlab.org/api/1.2/patches/6510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021050159.121335-1-monk.chiang@sifive.com/","msgid":"<20221021050159.121335-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2022-10-21T05:01:59","name":"RISC-V: Add type attribute for atomic instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021050159.121335-1-monk.chiang@sifive.com/mbox/"},{"id":6532,"url":"https://patchwork.plctlab.org/api/1.2/patches/6532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021065447.GA10032@delia/","msgid":"<20221021065447.GA10032@delia>","list_archive_url":null,"date":"2022-10-21T06:54:48","name":"[committed] Don'\''t build readline/libreadline.a, when --with-system-readline is supplied","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021065447.GA10032@delia/mbox/"},{"id":6533,"url":"https://patchwork.plctlab.org/api/1.2/patches/6533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021071435.00F4633E4A@hamza.pair.com/","msgid":"<20221021071435.00F4633E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-21T07:14:31","name":"[committed] wwwdocs: style: Simplify handling of containers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021071435.00F4633E4A@hamza.pair.com/mbox/"},{"id":6534,"url":"https://patchwork.plctlab.org/api/1.2/patches/6534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JHE6thlGROTB36@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:15:31","name":"i386: Fix up BFmode comparisons in conditional moves [PR107322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JHE6thlGROTB36@tucnak/mbox/"},{"id":6537,"url":"https://patchwork.plctlab.org/api/1.2/patches/6537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JI5QFI4PPKRDJk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:23:17","name":"builtins: Add __builtin_nextafterf16b builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JI5QFI4PPKRDJk@tucnak/mbox/"},{"id":6540,"url":"https://patchwork.plctlab.org/api/1.2/patches/6540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKSqMSPD9xR8qk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:29:14","name":"libstdc++: Small extended float support tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKSqMSPD9xR8qk@tucnak/mbox/"},{"id":6541,"url":"https://patchwork.plctlab.org/api/1.2/patches/6541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKrxD7/o9itqqG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:30:55","name":"c++, v2: Don'\''t shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_constant_expression [PR107295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKrxD7/o9itqqG@tucnak/mbox/"},{"id":6542,"url":"https://patchwork.plctlab.org/api/1.2/patches/6542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0z1ljk2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:31:09","name":"[zero-call-used-regs] Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0z1ljk2.fsf@lxoliva.fsfla.org/mbox/"},{"id":6599,"url":"https://patchwork.plctlab.org/api/1.2/patches/6599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021091621.335F21331A@imap2.suse-dmz.suse.de/","msgid":"<20221021091621.335F21331A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-21T09:16:20","name":"tree-optimization/107323 - loop distribution partition ordering issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021091621.335F21331A@imap2.suse-dmz.suse.de/mbox/"},{"id":6607,"url":"https://patchwork.plctlab.org/api/1.2/patches/6607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021095119.473425-1-jwakely@redhat.com/","msgid":"<20221021095119.473425-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-21T09:51:19","name":"[committed] libstdc++: Fix std::move_only_function for incomplete parameter types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021095119.473425-1-jwakely@redhat.com/mbox/"},{"id":6668,"url":"https://patchwork.plctlab.org/api/1.2/patches/6668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021122414.3375395-1-torbjorn.svensson@foss.st.com/","msgid":"<20221021122414.3375395-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-21T12:24:15","name":"lto: Always quote path to touch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021122414.3375395-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":6709,"url":"https://patchwork.plctlab.org/api/1.2/patches/6709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021131426.308205-1-aldyh@redhat.com/","msgid":"<20221021131426.308205-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-21T13:14:26","name":"Rename nonzero_bits to known_zero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021131426.308205-1-aldyh@redhat.com/mbox/"},{"id":6729,"url":"https://patchwork.plctlab.org/api/1.2/patches/6729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-2-dimitrije.milosevic@syrmia.com/","msgid":"<20221021135203.626255-2-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-10-21T13:52:02","name":"[1/2] ivopts: Revert computation of address cost complexity.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-2-dimitrije.milosevic@syrmia.com/mbox/"},{"id":6731,"url":"https://patchwork.plctlab.org/api/1.2/patches/6731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-3-dimitrije.milosevic@syrmia.com/","msgid":"<20221021135203.626255-3-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-10-21T13:52:03","name":"[2/2] ivopts: Consider number of invariants when calculating register pressure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-3-dimitrije.milosevic@syrmia.com/mbox/"},{"id":6800,"url":"https://patchwork.plctlab.org/api/1.2/patches/6800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1K9+NDQQlJp87YK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T15:42:48","name":"builtins: Add various complex builtins for _Float{16,32,64,128,32x,64x,128x}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1K9+NDQQlJp87YK@tucnak/mbox/"},{"id":6804,"url":"https://patchwork.plctlab.org/api/1.2/patches/6804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1LBm4u+R3Ka28Dj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T15:58:19","name":"libstdc++-v3: support for extended floating point types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1LBm4u+R3Ka28Dj@tucnak/mbox/"},{"id":6805,"url":"https://patchwork.plctlab.org/api/1.2/patches/6805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-1-dmalcolm@redhat.com/","msgid":"<20221021160150.1600351-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-21T16:01:49","name":"[1/2] Add gcc/make-unique.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-1-dmalcolm@redhat.com/mbox/"},{"id":6806,"url":"https://patchwork.plctlab.org/api/1.2/patches/6806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-2-dmalcolm@redhat.com/","msgid":"<20221021160150.1600351-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-21T16:01:50","name":"[2/2] analyzer: use std::unique_ptr for pending_diagnostic/note","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-2-dmalcolm@redhat.com/mbox/"},{"id":6863,"url":"https://patchwork.plctlab.org/api/1.2/patches/6863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com/","msgid":"<129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com>","list_archive_url":null,"date":"2022-10-21T16:42:31","name":"vect: Make vect_check_gather_scatter reject offsets that aren'\''t multiples of BITS_PER_UNIT [PR107346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com/mbox/"},{"id":7021,"url":"https://patchwork.plctlab.org/api/1.2/patches/7021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210212214320.150427@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-21T22:15:11","name":"c: tree: target: C2x (...) function prototypes and va_start relaxation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210212214320.150427@digraph.polyomino.org.uk/mbox/"},{"id":7022,"url":"https://patchwork.plctlab.org/api/1.2/patches/7022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfa5eafc-d6a9-dfe3-7bb5-e82932de0add@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-21T22:46:13","name":"[v2] xtensa: Make register A0 allocable for the CALL0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfa5eafc-d6a9-dfe3-7bb5-e82932de0add@yahoo.co.jp/mbox/"},{"id":7023,"url":"https://patchwork.plctlab.org/api/1.2/patches/7023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232824.1093138-1-polacek@redhat.com/","msgid":"<20221021232824.1093138-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-21T23:28:24","name":"c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232824.1093138-1-polacek@redhat.com/mbox/"},{"id":7024,"url":"https://patchwork.plctlab.org/api/1.2/patches/7024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232922.1093229-1-polacek@redhat.com/","msgid":"<20221021232922.1093229-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-21T23:29:22","name":"c++: ICE with invalid structured bindings [PR107276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232922.1093229-1-polacek@redhat.com/mbox/"},{"id":7880,"url":"https://patchwork.plctlab.org/api/1.2/patches/7880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com/","msgid":"<9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com>","list_archive_url":null,"date":"2022-10-22T11:54:20","name":"libgcc: Update '\''gthr-mcf.h'\'' to include a dedicated header for libobjc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com/mbox/"},{"id":7893,"url":"https://patchwork.plctlab.org/api/1.2/patches/7893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022142529.376406-1-aldyh@redhat.com/","msgid":"<20221022142529.376406-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-22T14:25:29","name":"[COMMITTED] Update selftest such that [-Inf, +Inf] is always VARYING for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022142529.376406-1-aldyh@redhat.com/mbox/"},{"id":7917,"url":"https://patchwork.plctlab.org/api/1.2/patches/7917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022175911.08E2733ED8@hamza.pair.com/","msgid":"<20221022175911.08E2733ED8@hamza.pair.com>","list_archive_url":null,"date":"2022-10-22T17:59:08","name":"[committed] wwwdocs: index: Rotate news from 2018-08 to 2020-12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022175911.08E2733ED8@hamza.pair.com/mbox/"},{"id":7967,"url":"https://patchwork.plctlab.org/api/1.2/patches/7967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023093454.7et6anfgzksfssxg@begin/","msgid":"<20221023093454.7et6anfgzksfssxg@begin>","list_archive_url":null,"date":"2022-10-23T09:34:54","name":": Fix static-pie on Hurd target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023093454.7et6anfgzksfssxg@begin/mbox/"},{"id":8042,"url":"https://patchwork.plctlab.org/api/1.2/patches/8042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023145633.501586-1-aldyh@redhat.com/","msgid":"<20221023145633.501586-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-23T14:56:33","name":"[PR,tree-optimization/107365] Check HONOR_NANS instead of flag_finite_math_only in frange:verify_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023145633.501586-1-aldyh@redhat.com/mbox/"},{"id":8060,"url":"https://patchwork.plctlab.org/api/1.2/patches/8060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023165224.97237-1-keegan@undefinedbehaviour.org/","msgid":"<20221023165224.97237-1-keegan@undefinedbehaviour.org>","list_archive_url":null,"date":"2022-10-23T16:52:24","name":"c: If -fplan9-extensions, allow duplicate field declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023165224.97237-1-keegan@undefinedbehaviour.org/mbox/"},{"id":8102,"url":"https://patchwork.plctlab.org/api/1.2/patches/8102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024002828.28861-1-mark@harmstone.com/","msgid":"<20221024002828.28861-1-mark@harmstone.com>","list_archive_url":null,"date":"2022-10-24T00:28:28","name":"Add -gcodeview option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024002828.28861-1-mark@harmstone.com/mbox/"},{"id":8110,"url":"https://patchwork.plctlab.org/api/1.2/patches/8110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024013916.14043-1-juzhe.zhong@rivai.ai/","msgid":"<20221024013916.14043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T01:39:16","name":"RISC-V: Fix REG_CLASS_CONTENTS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024013916.14043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8115,"url":"https://patchwork.plctlab.org/api/1.2/patches/8115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024015344.22546-1-juzhe.zhong@rivai.ai/","msgid":"<20221024015344.22546-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T01:53:44","name":"RISC-V: Support (set (mem) (const_poly_int)) handling and remove TI/TF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024015344.22546-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8116,"url":"https://patchwork.plctlab.org/api/1.2/patches/8116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020312.26851-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020312.26851-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:03:12","name":"RISC-V: Support (set (mem) (const_poly_int))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020312.26851-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8121,"url":"https://patchwork.plctlab.org/api/1.2/patches/8121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020524.27704-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020524.27704-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:05:24","name":"RISC-V: Remove unused TI/TF vector modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020524.27704-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8122,"url":"https://patchwork.plctlab.org/api/1.2/patches/8122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020853.29547-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020853.29547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:08:53","name":"RISC-V: Support load/store in mov pattern for RVV modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020853.29547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8125,"url":"https://patchwork.plctlab.org/api/1.2/patches/8125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022028.197505-1-juzhe.zhong@rivai.ai/","msgid":"<20221024022028.197505-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:20:28","name":"RISC-V: Replace CONSTEXPR with constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022028.197505-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8127,"url":"https://patchwork.plctlab.org/api/1.2/patches/8127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022737.52627-1-juzhe.zhong@rivai.ai/","msgid":"<20221024022737.52627-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:27:37","name":"RISC-V: Support (set (mem) (const_poly_int))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022737.52627-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8129,"url":"https://patchwork.plctlab.org/api/1.2/patches/8129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024024604.18324-1-lili.cui@intel.com/","msgid":"<20221024024604.18324-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-24T02:46:04","name":"ix86: Suggest unroll factor for loop vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024024604.18324-1-lili.cui@intel.com/mbox/"},{"id":8137,"url":"https://patchwork.plctlab.org/api/1.2/patches/8137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4b84496-105a-200f-3a88-2b0a33ce638d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T03:14:20","name":"[PATCH-2,rs6000] Reverse V8HI on Power8 by vector rotation [PR100866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4b84496-105a-200f-3a88-2b0a33ce638d@linux.ibm.com/mbox/"},{"id":8181,"url":"https://patchwork.plctlab.org/api/1.2/patches/8181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y8dfwmYoaac6EW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-24T07:19:17","name":"c, c++: Fix up excess precision handling of scalar_to_vector conversion [PR107358]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y8dfwmYoaac6EW@tucnak/mbox/"},{"id":8184,"url":"https://patchwork.plctlab.org/api/1.2/patches/8184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y+XfMW7lkamX2r@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-24T07:27:25","name":"c++: Fix up constexpr handling of char/signed char/short pre/post inc/decrement [PR105774]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y+XfMW7lkamX2r@tucnak/mbox/"},{"id":8228,"url":"https://patchwork.plctlab.org/api/1.2/patches/8228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1910003.PYKUYFuaPT@fomalhaut/","msgid":"<1910003.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:25:10","name":"Relax assertion in profile.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1910003.PYKUYFuaPT@fomalhaut/mbox/"},{"id":8247,"url":"https://patchwork.plctlab.org/api/1.2/patches/8247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3519176.R56niFO833@fomalhaut/","msgid":"<3519176.R56niFO833@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:54:55","name":"ARM: Make ARMv8-M attribute cmse_nonsecure_call work in Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3519176.R56niFO833@fomalhaut/mbox/"},{"id":8248,"url":"https://patchwork.plctlab.org/api/1.2/patches/8248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1806820.atdPhlSkOF@fomalhaut/","msgid":"<1806820.atdPhlSkOF@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:57:31","name":"Aarch64: Do not define DONT_USE_BUILTIN_SETJMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1806820.atdPhlSkOF@fomalhaut/mbox/"},{"id":8252,"url":"https://patchwork.plctlab.org/api/1.2/patches/8252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024090125.16371-1-haochen.jiang@intel.com/","msgid":"<20221024090125.16371-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-24T09:01:25","name":"Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024090125.16371-1-haochen.jiang@intel.com/mbox/"},{"id":8288,"url":"https://patchwork.plctlab.org/api/1.2/patches/8288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024095530.16284-1-kito.cheng@sifive.com/","msgid":"<20221024095530.16284-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-24T09:55:30","name":"RISC-V: Add h extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024095530.16284-1-kito.cheng@sifive.com/mbox/"},{"id":8324,"url":"https://patchwork.plctlab.org/api/1.2/patches/8324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com/","msgid":"<95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com>","list_archive_url":null,"date":"2022-10-24T10:43:08","name":"vect: Fix wrong shift_n after widening on BE [PR107338]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com/mbox/"},{"id":9131,"url":"https://patchwork.plctlab.org/api/1.2/patches/9131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024133316.33026-1-aldyh@redhat.com/","msgid":"<20221024133316.33026-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-24T13:33:16","name":"[PR,tree-optimization/107355] Handle NANs in abs range-op entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024133316.33026-1-aldyh@redhat.com/mbox/"},{"id":9516,"url":"https://patchwork.plctlab.org/api/1.2/patches/9516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024142414.161380-1-juzhe.zhong@rivai.ai/","msgid":"<20221024142414.161380-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T14:24:14","name":"RISC-V: Fix typo.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024142414.161380-1-juzhe.zhong@rivai.ai/mbox/"},{"id":9688,"url":"https://patchwork.plctlab.org/api/1.2/patches/9688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com/","msgid":"<7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com>","list_archive_url":null,"date":"2022-10-24T16:26:44","name":"[OG12,commit] amdgcn, libgomp: USM allocation update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com/mbox/"},{"id":9689,"url":"https://patchwork.plctlab.org/api/1.2/patches/9689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024162726.3463437-1-ppalka@redhat.com/","msgid":"<20221024162726.3463437-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-24T16:27:26","name":"c++: remove use_default_args parm of coerce_template_parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024162726.3463437-1-ppalka@redhat.com/mbox/"},{"id":9730,"url":"https://patchwork.plctlab.org/api/1.2/patches/9730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9795e65-9425-9216-0556-a82266b7c336@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T16:38:23","name":"[OG12,commit] amdgcn: disallow USM on gfx908","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9795e65-9425-9216-0556-a82266b7c336@codesourcery.com/mbox/"},{"id":9771,"url":"https://patchwork.plctlab.org/api/1.2/patches/9771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com/","msgid":"<264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com>","list_archive_url":null,"date":"2022-10-24T16:50:40","name":"[OG12,commit] vect: WORKAROUND vectorizer bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com/mbox/"},{"id":9870,"url":"https://patchwork.plctlab.org/api/1.2/patches/9870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1bHteXKidcJWWie@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T17:13:25","name":"[v2] c++: ICE with invalid structured bindings [PR107276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1bHteXKidcJWWie@redhat.com/mbox/"},{"id":9925,"url":"https://patchwork.plctlab.org/api/1.2/patches/9925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd09944-8210-be23-dc1b-5a435f8eae26@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-24T18:24:22","name":"[(pushed)] x86: fix VENDOR_MAX enum value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd09944-8210-be23-dc1b-5a435f8eae26@suse.cz/mbox/"},{"id":10070,"url":"https://patchwork.plctlab.org/api/1.2/patches/10070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt9lvw3y.fsf@euler.schwinge.homeip.net/","msgid":"<87mt9lvw3y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-24T19:51:13","name":"libgomp/nvptx: Prepare for reverse-offload callback handling, resolve spurious SIGSEGVs (was: [Patch][v5] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt9lvw3y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":10136,"url":"https://patchwork.plctlab.org/api/1.2/patches/10136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024201927.300C733E59@hamza.pair.com/","msgid":"<20221024201927.300C733E59@hamza.pair.com>","list_archive_url":null,"date":"2022-10-24T20:19:24","name":"[committed] wwwdocs: search: Remove trailing slashes on tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024201927.300C733E59@hamza.pair.com/mbox/"},{"id":10275,"url":"https://patchwork.plctlab.org/api/1.2/patches/10275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205233.1760101-1-dmalcolm@redhat.com/","msgid":"<20221024205233.1760101-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:52:33","name":"[committed] analyzer: handle \"pipe\" and \"pipe2\" [PR106300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205233.1760101-1-dmalcolm@redhat.com/mbox/"},{"id":10276,"url":"https://patchwork.plctlab.org/api/1.2/patches/10276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205312.1760173-1-dmalcolm@redhat.com/","msgid":"<20221024205312.1760173-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:53:12","name":"[committed] analyzer: simplify sm_state_map lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205312.1760173-1-dmalcolm@redhat.com/mbox/"},{"id":10277,"url":"https://patchwork.plctlab.org/api/1.2/patches/10277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205348.1760258-1-dmalcolm@redhat.com/","msgid":"<20221024205348.1760258-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:53:48","name":"[committed] analyzer: handle (NULL == &VAR) [PR107345]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205348.1760258-1-dmalcolm@redhat.com/mbox/"},{"id":10278,"url":"https://patchwork.plctlab.org/api/1.2/patches/10278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205453.1760357-1-dmalcolm@redhat.com/","msgid":"<20221024205453.1760357-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:54:53","name":"[committed] diagnostics: fix ICE in sarif output with NULL filename [PR107366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205453.1760357-1-dmalcolm@redhat.com/mbox/"},{"id":10279,"url":"https://patchwork.plctlab.org/api/1.2/patches/10279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205554.1760903-1-dmalcolm@redhat.com/","msgid":"<20221024205554.1760903-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:55:54","name":"[commited] analyzer: fix ICE on va_copy [PR107349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205554.1760903-1-dmalcolm@redhat.com/mbox/"},{"id":10477,"url":"https://patchwork.plctlab.org/api/1.2/patches/10477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025032238.322211-1-juzhe.zhong@rivai.ai/","msgid":"<20221025032238.322211-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-25T03:22:38","name":"RISC-V: ADJUST_NUNITS according to -march.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025032238.322211-1-juzhe.zhong@rivai.ai/mbox/"},{"id":10484,"url":"https://patchwork.plctlab.org/api/1.2/patches/10484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz/","msgid":"<766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz>","list_archive_url":null,"date":"2022-10-25T04:23:53","name":"[pushed] i386: fix pedantic warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz/mbox/"},{"id":10485,"url":"https://patchwork.plctlab.org/api/1.2/patches/10485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz/","msgid":"<1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz>","list_archive_url":null,"date":"2022-10-25T05:01:02","name":"riscv: fix cross compiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz/mbox/"},{"id":10510,"url":"https://patchwork.plctlab.org/api/1.2/patches/10510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025061733.41146-1-monk.chiang@sifive.com/","msgid":"<20221025061733.41146-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2022-10-25T06:17:33","name":"RISC-V: Recognized Svinval and Svnapot extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025061733.41146-1-monk.chiang@sifive.com/mbox/"},{"id":10577,"url":"https://patchwork.plctlab.org/api/1.2/patches/10577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025080230.C01D613A64@imap2.suse-dmz.suse.de/","msgid":"<20221025080230.C01D613A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T08:02:30","name":"tree-optimization/100756 - niter analysis and folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025080230.C01D613A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10591,"url":"https://patchwork.plctlab.org/api/1.2/patches/10591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1eiocGGtzckn57A@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:47:29","name":"[committed] gimplify: Don'\''t add GIMPLE_ASSUME if errors were seen [PR107369]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1eiocGGtzckn57A@tucnak/mbox/"},{"id":10592,"url":"https://patchwork.plctlab.org/api/1.2/patches/10592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ei1ZtN132Hr3h3@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:48:21","name":"[committed] gimplify: Call gimple_boolify on IFN_ASSUME argument [PR107368]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ei1ZtN132Hr3h3@tucnak/mbox/"},{"id":10593,"url":"https://patchwork.plctlab.org/api/1.2/patches/10593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ejAIVkd8y4CNJW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:49:04","name":"[committed] gimplify: Fix comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ejAIVkd8y4CNJW@tucnak/mbox/"},{"id":10640,"url":"https://patchwork.plctlab.org/api/1.2/patches/10640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de/","msgid":"<20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T09:15:09","name":"Move NOP stripping in SCEV analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de/mbox/"},{"id":10685,"url":"https://patchwork.plctlab.org/api/1.2/patches/10685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025100103.1736564-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025100103.1736564-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T10:01:04","name":"IRA: Make sure array is big enough","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025100103.1736564-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10697,"url":"https://patchwork.plctlab.org/api/1.2/patches/10697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025101132.58E5F13A64@imap2.suse-dmz.suse.de/","msgid":"<20221025101132.58E5F13A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T10:11:31","name":"tree-optimization/107176 - SCEV analysis association issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025101132.58E5F13A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10780,"url":"https://patchwork.plctlab.org/api/1.2/patches/10780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025130926.6319B13A64@imap2.suse-dmz.suse.de/","msgid":"<20221025130926.6319B13A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T13:09:26","name":"unswitch most profitable condition first","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025130926.6319B13A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10790,"url":"https://patchwork.plctlab.org/api/1.2/patches/10790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025135323.98303-1-juzhe.zhong@rivai.ai/","msgid":"<20221025135323.98303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-25T13:53:23","name":"RISC-V: Fix a mistake in previous patch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025135323.98303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":10831,"url":"https://patchwork.plctlab.org/api/1.2/patches/10831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025141919.1789727-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025141919.1789727-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T14:19:20","name":"c++: Use in-process client when networking is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025141919.1789727-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10860,"url":"https://patchwork.plctlab.org/api/1.2/patches/10860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025151512.1791109-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025151512.1791109-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T15:15:13","name":"testsuite: Windows paths use \\ and not /","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025151512.1791109-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10866,"url":"https://patchwork.plctlab.org/api/1.2/patches/10866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1f+66oVJSTeTkCc@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T15:21:15","name":"[v2] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1f+66oVJSTeTkCc@redhat.com/mbox/"},{"id":10882,"url":"https://patchwork.plctlab.org/api/1.2/patches/10882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0ac4d330fe0803b052aa11e07ac078849a6a828.1666652978.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-25T16:29:21","name":"rs6000: Add CCANY; replace signed by ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0ac4d330fe0803b052aa11e07ac078849a6a828.1666652978.git.segher@kernel.crashing.org/mbox/"},{"id":10886,"url":"https://patchwork.plctlab.org/api/1.2/patches/10886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163709.95817-1-jason@redhat.com/","msgid":"<20221025163709.95817-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T16:37:09","name":"[pushed] c++: improve failed constexpr assume diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163709.95817-1-jason@redhat.com/mbox/"},{"id":10887,"url":"https://patchwork.plctlab.org/api/1.2/patches/10887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163750.96139-1-jason@redhat.com/","msgid":"<20221025163750.96139-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T16:37:50","name":"[pushed] c++: constexpr-evaluate more assumes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163750.96139-1-jason@redhat.com/mbox/"},{"id":10899,"url":"https://patchwork.plctlab.org/api/1.2/patches/10899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025172443.6732-1-david.faust@oracle.com/","msgid":"<20221025172443.6732-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-25T17:24:43","name":"[v2] bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025172443.6732-1-david.faust@oracle.com/mbox/"},{"id":10912,"url":"https://patchwork.plctlab.org/api/1.2/patches/10912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJbH2PyhVRnAgtEPnHc+3-XpdXVVbmV70V2rNmxFh5YRDmb1tw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T17:39:33","name":"tsan: fix test for machines without pthread_cond_clockwait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJbH2PyhVRnAgtEPnHc+3-XpdXVVbmV70V2rNmxFh5YRDmb1tw@mail.gmail.com/mbox/"},{"id":10914,"url":"https://patchwork.plctlab.org/api/1.2/patches/10914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025180506.108938-1-jason@redhat.com/","msgid":"<20221025180506.108938-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T18:05:06","name":"[pushed] c++: correct fold_operand change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025180506.108938-1-jason@redhat.com/mbox/"},{"id":10939,"url":"https://patchwork.plctlab.org/api/1.2/patches/10939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025185733.F0F3A33E37@hamza.pair.com/","msgid":"<20221025185733.F0F3A33E37@hamza.pair.com>","list_archive_url":null,"date":"2022-10-25T18:57:30","name":"[committed] wwwdocs: contribute: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025185733.F0F3A33E37@hamza.pair.com/mbox/"},{"id":10973,"url":"https://patchwork.plctlab.org/api/1.2/patches/10973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f068e565-e2a0-2b51-cb63-952e16b7c024@acm.org/","msgid":"","list_archive_url":null,"date":"2022-10-25T20:16:11","name":"c++: Adjust synthetic template parm creation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f068e565-e2a0-2b51-cb63-952e16b7c024@acm.org/mbox/"},{"id":10984,"url":"https://patchwork.plctlab.org/api/1.2/patches/10984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025205901.125058-1-aldyh@redhat.com/","msgid":"<20221025205901.125058-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-25T20:59:01","name":"Convert flag_finite_math_only uses in frange to HONOR_*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025205901.125058-1-aldyh@redhat.com/mbox/"},{"id":10985,"url":"https://patchwork.plctlab.org/api/1.2/patches/10985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025210140.125230-1-aldyh@redhat.com/","msgid":"<20221025210140.125230-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-25T21:01:40","name":"[PR,tree-optimization/107394] Canonicalize global franges as they are read back.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025210140.125230-1-aldyh@redhat.com/mbox/"},{"id":10986,"url":"https://patchwork.plctlab.org/api/1.2/patches/10986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E4C2614134D89E599B691319@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T21:06:59","name":"[PUSHED] Start using discriminators in AutoFDO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E4C2614134D89E599B691319@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":11024,"url":"https://patchwork.plctlab.org/api/1.2/patches/11024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3525A6EC99FBB9619679FDBB91309@DS7PR21MB3525.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T00:38:12","name":"[PUSHED] Don'\''t force DWARF4 for AutoFDO tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3525A6EC99FBB9619679FDBB91309@DS7PR21MB3525.namprd21.prod.outlook.com/mbox/"},{"id":11037,"url":"https://patchwork.plctlab.org/api/1.2/patches/11037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026022847.2932438-1-hongtao.liu@intel.com/","msgid":"<20221026022847.2932438-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-26T02:28:47","name":"[x86] Enable V4BFmode and V2BFmode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026022847.2932438-1-hongtao.liu@intel.com/mbox/"},{"id":11070,"url":"https://patchwork.plctlab.org/api/1.2/patches/11070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026055248.94100-1-hongyu.wang@intel.com/","msgid":"<20221026055248.94100-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-10-26T05:52:48","name":"i386: Enable small loop unrolling for O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026055248.94100-1-hongyu.wang@intel.com/mbox/"},{"id":11074,"url":"https://patchwork.plctlab.org/api/1.2/patches/11074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp/","msgid":"<9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-26T06:27:51","name":"xtensa: Fix out-of-bounds array access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp/mbox/"},{"id":11102,"url":"https://patchwork.plctlab.org/api/1.2/patches/11102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026074950.10462-1-sebastian.huber@embedded-brains.de/","msgid":"<20221026074950.10462-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-10-26T07:49:50","name":"riscv/RTEMS: Add RISCV_GCOV_TYPE_SIZE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026074950.10462-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":11104,"url":"https://patchwork.plctlab.org/api/1.2/patches/11104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-2-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:26","name":"[Rust,front-end,v3,01/46] Use DW_ATE_UTF for the Rust '\''char'\'' type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-2-arthur.cohen@embecosm.com/mbox/"},{"id":11109,"url":"https://patchwork.plctlab.org/api/1.2/patches/11109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-3-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:27","name":"[Rust,front-end,v3,02/46] gccrs: Add nessecary hooks for a Rust front-end testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-3-arthur.cohen@embecosm.com/mbox/"},{"id":11112,"url":"https://patchwork.plctlab.org/api/1.2/patches/11112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-4-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:28","name":"[Rust,front-end,v3,03/46] gccrs: Add Debug info testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-4-arthur.cohen@embecosm.com/mbox/"},{"id":11108,"url":"https://patchwork.plctlab.org/api/1.2/patches/11108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-5-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:29","name":"[Rust,front-end,v3,04/46] gccrs: Add link cases testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-5-arthur.cohen@embecosm.com/mbox/"},{"id":11116,"url":"https://patchwork.plctlab.org/api/1.2/patches/11116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-6-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:30","name":"[Rust,front-end,v3,05/46] gccrs: Add general compilation test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-6-arthur.cohen@embecosm.com/mbox/"},{"id":11107,"url":"https://patchwork.plctlab.org/api/1.2/patches/11107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-7-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:31","name":"[Rust,front-end,v3,06/46] gccrs: Add execution test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-7-arthur.cohen@embecosm.com/mbox/"},{"id":11111,"url":"https://patchwork.plctlab.org/api/1.2/patches/11111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-8-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:32","name":"[Rust,front-end,v3,07/46] gccrs: Add gcc-check-target check-rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-8-arthur.cohen@embecosm.com/mbox/"},{"id":11121,"url":"https://patchwork.plctlab.org/api/1.2/patches/11121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-9-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:33","name":"[Rust,front-end,v3,08/46] gccrs: Add Rust front-end base AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-9-arthur.cohen@embecosm.com/mbox/"},{"id":11114,"url":"https://patchwork.plctlab.org/api/1.2/patches/11114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-10-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:34","name":"[Rust,front-end,v3,09/46] gccrs: Add definitions of Rust Items in AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-10-arthur.cohen@embecosm.com/mbox/"},{"id":11127,"url":"https://patchwork.plctlab.org/api/1.2/patches/11127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-11-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:35","name":"[Rust,front-end,v3,10/46] gccrs: Add full definitions of Rust AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-11-arthur.cohen@embecosm.com/mbox/"},{"id":11110,"url":"https://patchwork.plctlab.org/api/1.2/patches/11110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-12-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:36","name":"[Rust,front-end,v3,11/46] gccrs: Add Rust AST visitors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-12-arthur.cohen@embecosm.com/mbox/"},{"id":11113,"url":"https://patchwork.plctlab.org/api/1.2/patches/11113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-13-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:37","name":"[Rust,front-end,v3,12/46] gccrs: Add Lexer for Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-13-arthur.cohen@embecosm.com/mbox/"},{"id":11115,"url":"https://patchwork.plctlab.org/api/1.2/patches/11115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-14-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:38","name":"[Rust,front-end,v3,13/46] gccrs: Add Parser for Rust front-end pt.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-14-arthur.cohen@embecosm.com/mbox/"},{"id":11118,"url":"https://patchwork.plctlab.org/api/1.2/patches/11118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-15-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:39","name":"[Rust,front-end,v3,14/46] gccrs: Add Parser for Rust front-end pt.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-15-arthur.cohen@embecosm.com/mbox/"},{"id":11123,"url":"https://patchwork.plctlab.org/api/1.2/patches/11123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-16-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:40","name":"[Rust,front-end,v3,15/46] gccrs: Add expansion pass for the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-16-arthur.cohen@embecosm.com/mbox/"},{"id":11119,"url":"https://patchwork.plctlab.org/api/1.2/patches/11119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-17-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:41","name":"[Rust,front-end,v3,16/46] gccrs: Add name resolution pass to the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-17-arthur.cohen@embecosm.com/mbox/"},{"id":11122,"url":"https://patchwork.plctlab.org/api/1.2/patches/11122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-18-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:42","name":"[Rust,front-end,v3,17/46] gccrs: Add declarations for Rust HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-18-arthur.cohen@embecosm.com/mbox/"},{"id":11124,"url":"https://patchwork.plctlab.org/api/1.2/patches/11124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-19-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:43","name":"[Rust,front-end,v3,18/46] gccrs: Add HIR definitions and visitor framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-19-arthur.cohen@embecosm.com/mbox/"},{"id":11128,"url":"https://patchwork.plctlab.org/api/1.2/patches/11128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-20-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:44","name":"[Rust,front-end,v3,19/46] gccrs: Add AST to HIR lowering pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-20-arthur.cohen@embecosm.com/mbox/"},{"id":11120,"url":"https://patchwork.plctlab.org/api/1.2/patches/11120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-21-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:45","name":"[Rust,front-end,v3,20/46] gccrs: Add wrapper for make_unique","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-21-arthur.cohen@embecosm.com/mbox/"},{"id":11139,"url":"https://patchwork.plctlab.org/api/1.2/patches/11139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-22-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:46","name":"[Rust,front-end,v3,21/46] gccrs: Add port of FNV hash used during legacy symbol mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-22-arthur.cohen@embecosm.com/mbox/"},{"id":11125,"url":"https://patchwork.plctlab.org/api/1.2/patches/11125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-23-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:47","name":"[Rust,front-end,v3,22/46] gccrs: Add Rust ABI enum helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-23-arthur.cohen@embecosm.com/mbox/"},{"id":11129,"url":"https://patchwork.plctlab.org/api/1.2/patches/11129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-24-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:48","name":"[Rust,front-end,v3,23/46] gccrs: Add Base62 implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-24-arthur.cohen@embecosm.com/mbox/"},{"id":11126,"url":"https://patchwork.plctlab.org/api/1.2/patches/11126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-25-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:49","name":"[Rust,front-end,v3,24/46] gccrs: Add implementation of Optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-25-arthur.cohen@embecosm.com/mbox/"},{"id":11131,"url":"https://patchwork.plctlab.org/api/1.2/patches/11131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-26-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:50","name":"[Rust,front-end,v3,25/46] gccrs: Add attributes checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-26-arthur.cohen@embecosm.com/mbox/"},{"id":11132,"url":"https://patchwork.plctlab.org/api/1.2/patches/11132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-27-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:51","name":"[Rust,front-end,v3,26/46] gccrs: Add helpers mappings canonical path and lang items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-27-arthur.cohen@embecosm.com/mbox/"},{"id":11135,"url":"https://patchwork.plctlab.org/api/1.2/patches/11135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-28-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:52","name":"[Rust,front-end,v3,27/46] gccrs: Add type resolution and trait solving pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-28-arthur.cohen@embecosm.com/mbox/"},{"id":11137,"url":"https://patchwork.plctlab.org/api/1.2/patches/11137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-29-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:53","name":"[Rust,front-end,v3,28/46] gccrs: Add Rust type information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-29-arthur.cohen@embecosm.com/mbox/"},{"id":11145,"url":"https://patchwork.plctlab.org/api/1.2/patches/11145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-30-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:54","name":"[Rust,front-end,v3,29/46] gccrs: Add remaining type system transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-30-arthur.cohen@embecosm.com/mbox/"},{"id":11142,"url":"https://patchwork.plctlab.org/api/1.2/patches/11142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-31-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:55","name":"[Rust,front-end,v3,30/46] gccrs: Add unsafe checks for Rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-31-arthur.cohen@embecosm.com/mbox/"},{"id":11130,"url":"https://patchwork.plctlab.org/api/1.2/patches/11130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-32-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:56","name":"[Rust,front-end,v3,31/46] gccrs: Add const checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-32-arthur.cohen@embecosm.com/mbox/"},{"id":11148,"url":"https://patchwork.plctlab.org/api/1.2/patches/11148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-33-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:57","name":"[Rust,front-end,v3,32/46] gccrs: Add privacy checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-33-arthur.cohen@embecosm.com/mbox/"},{"id":11144,"url":"https://patchwork.plctlab.org/api/1.2/patches/11144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-34-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:58","name":"[Rust,front-end,v3,33/46] gccrs: Add dead code scan on HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-34-arthur.cohen@embecosm.com/mbox/"},{"id":11143,"url":"https://patchwork.plctlab.org/api/1.2/patches/11143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-35-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:59","name":"[Rust,front-end,v3,34/46] gccrs: Add unused variable scan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-35-arthur.cohen@embecosm.com/mbox/"},{"id":11150,"url":"https://patchwork.plctlab.org/api/1.2/patches/11150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-36-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:00","name":"[Rust,front-end,v3,35/46] gccrs: Add metadata ouptput pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-36-arthur.cohen@embecosm.com/mbox/"},{"id":11147,"url":"https://patchwork.plctlab.org/api/1.2/patches/11147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-37-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:01","name":"[Rust,front-end,v3,36/46] gccrs: Add base for HIR to GCC GENERIC lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-37-arthur.cohen@embecosm.com/mbox/"},{"id":11136,"url":"https://patchwork.plctlab.org/api/1.2/patches/11136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-38-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:02","name":"[Rust,front-end,v3,37/46] gccrs: Add HIR to GCC GENERIC lowering for all nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-38-arthur.cohen@embecosm.com/mbox/"},{"id":11134,"url":"https://patchwork.plctlab.org/api/1.2/patches/11134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-39-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:03","name":"[Rust,front-end,v3,38/46] gccrs: Add HIR to GCC GENERIC lowering entry point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-39-arthur.cohen@embecosm.com/mbox/"},{"id":11151,"url":"https://patchwork.plctlab.org/api/1.2/patches/11151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-40-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:04","name":"[Rust,front-end,v3,39/46] gccrs: These are wrappers ported from reusing gccgo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-40-arthur.cohen@embecosm.com/mbox/"},{"id":11149,"url":"https://patchwork.plctlab.org/api/1.2/patches/11149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-41-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:05","name":"[Rust,front-end,v3,40/46] gccrs: Add GCC Rust front-end Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-41-arthur.cohen@embecosm.com/mbox/"},{"id":11141,"url":"https://patchwork.plctlab.org/api/1.2/patches/11141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-42-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:06","name":"[Rust,front-end,v3,41/46] gccrs: Add config-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-42-arthur.cohen@embecosm.com/mbox/"},{"id":11152,"url":"https://patchwork.plctlab.org/api/1.2/patches/11152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-43-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:07","name":"[Rust,front-end,v3,42/46] gccrs: Add lang-spec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-43-arthur.cohen@embecosm.com/mbox/"},{"id":11153,"url":"https://patchwork.plctlab.org/api/1.2/patches/11153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-44-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:08","name":"[Rust,front-end,v3,43/46] gccrs: Add lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-44-arthur.cohen@embecosm.com/mbox/"},{"id":11154,"url":"https://patchwork.plctlab.org/api/1.2/patches/11154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-45-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:09","name":"[Rust,front-end,v3,44/46] gccrs: Add compiler driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-45-arthur.cohen@embecosm.com/mbox/"},{"id":11146,"url":"https://patchwork.plctlab.org/api/1.2/patches/11146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-46-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:10","name":"[Rust,front-end,v3,45/46] gccrs: Compiler proper interface kicks off the pipeline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-46-arthur.cohen@embecosm.com/mbox/"},{"id":11155,"url":"https://patchwork.plctlab.org/api/1.2/patches/11155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-47-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:11","name":"[Rust,front-end,v3,46/46] gccrs: Add README, CONTRIBUTING and compiler logo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-47-arthur.cohen@embecosm.com/mbox/"},{"id":11156,"url":"https://patchwork.plctlab.org/api/1.2/patches/11156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1juZu+TsIub4jZj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-26T08:23:02","name":"c++: Fix excess precision related ICE on invalid binop [PR107382, PR107383]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1juZu+TsIub4jZj@tucnak/mbox/"},{"id":11172,"url":"https://patchwork.plctlab.org/api/1.2/patches/11172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com/","msgid":"<8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com>","list_archive_url":null,"date":"2022-10-26T09:46:06","name":"[OG12,committed] Handle operator new with alignment in USM transform","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com/mbox/"},{"id":11197,"url":"https://patchwork.plctlab.org/api/1.2/patches/11197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9321d38e-a185-5505-62a5-574d64446798@suse.cz/","msgid":"<9321d38e-a185-5505-62a5-574d64446798@suse.cz>","list_archive_url":null,"date":"2022-10-26T11:09:18","name":"docs: document sanitizers can trigger warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9321d38e-a185-5505-62a5-574d64446798@suse.cz/mbox/"},{"id":11207,"url":"https://patchwork.plctlab.org/api/1.2/patches/11207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026114052.17713-1-guojiufu@linux.ibm.com/","msgid":"<20221026114052.17713-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-26T11:40:52","name":"[V2] rs6000: Support to build constants by li/lis+oris/xoris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026114052.17713-1-guojiufu@linux.ibm.com/mbox/"},{"id":11219,"url":"https://patchwork.plctlab.org/api/1.2/patches/11219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zq4wgf.fsf@euler.schwinge.homeip.net/","msgid":"<87h6zq4wgf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-26T12:10:24","name":"Document '\''distclean-stage[N]'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zq4wgf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":11271,"url":"https://patchwork.plctlab.org/api/1.2/patches/11271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-10-26T13:46:47","name":"[PING] options: Clarify '\''Init'\'' option property usage for streaming optimization (was: [PATCH] options, lto: Optimize streaming of optimization nodes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":11279,"url":"https://patchwork.plctlab.org/api/1.2/patches/11279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4eb1be6-f004-3699-4657-42f98eef6480@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T13:49:36","name":"[COMMITTED] Check if varying may also be non-negative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4eb1be6-f004-3699-4657-42f98eef6480@redhat.com/mbox/"},{"id":11282,"url":"https://patchwork.plctlab.org/api/1.2/patches/11282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026135238.24678-1-amonakov@ispras.ru/","msgid":"<20221026135238.24678-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-10-26T13:52:38","name":"ipa-visibility: remove assert in TLS optimization [PR107353]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026135238.24678-1-amonakov@ispras.ru/mbox/"},{"id":11323,"url":"https://patchwork.plctlab.org/api/1.2/patches/11323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1lb4uJuWVdEF0x0@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T16:10:10","name":"[v3] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1lb4uJuWVdEF0x0@redhat.com/mbox/"},{"id":11341,"url":"https://patchwork.plctlab.org/api/1.2/patches/11341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1l77ThNE1f4jusN@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T18:26:53","name":"[v4] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1l77ThNE1f4jusN@redhat.com/mbox/"},{"id":11359,"url":"https://patchwork.plctlab.org/api/1.2/patches/11359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026185857.234023-1-hjl.tools@gmail.com/","msgid":"<20221026185857.234023-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-26T18:58:57","name":"x86: Replace ne:CCC/ne:CCO with UNSPEC_CC_NE in neg patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026185857.234023-1-hjl.tools@gmail.com/mbox/"},{"id":11406,"url":"https://patchwork.plctlab.org/api/1.2/patches/11406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8c1203c-bd17-4bfc-85c9-854076a1c363-1666811738919@3c-app-gmx-bap72/","msgid":"","list_archive_url":null,"date":"2022-10-26T19:15:38","name":"Fortran: BOZ literal constants are not compatible to any type [PR103413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8c1203c-bd17-4bfc-85c9-854076a1c363-1666811738919@3c-app-gmx-bap72/mbox/"},{"id":11407,"url":"https://patchwork.plctlab.org/api/1.2/patches/11407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026192311.12260-1-david.faust@oracle.com/","msgid":"<20221026192311.12260-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-26T19:23:11","name":"[v3] bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026192311.12260-1-david.faust@oracle.com/mbox/"},{"id":11439,"url":"https://patchwork.plctlab.org/api/1.2/patches/11439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026204005.1864136-1-dmalcolm@redhat.com/","msgid":"<20221026204005.1864136-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T20:40:05","name":"[v3] Add gcc/make-unique.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026204005.1864136-1-dmalcolm@redhat.com/mbox/"},{"id":11443,"url":"https://patchwork.plctlab.org/api/1.2/patches/11443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026211806.1866873-1-dmalcolm@redhat.com/","msgid":"<20221026211806.1866873-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T21:18:06","name":"[committed] analyzer: add sm-fd.dot","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026211806.1866873-1-dmalcolm@redhat.com/mbox/"},{"id":11444,"url":"https://patchwork.plctlab.org/api/1.2/patches/11444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026212300.1867175-1-dmalcolm@redhat.com/","msgid":"<20221026212300.1867175-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T21:23:00","name":"[committed] analyzer: fixes to file-descriptor handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026212300.1867175-1-dmalcolm@redhat.com/mbox/"},{"id":11447,"url":"https://patchwork.plctlab.org/api/1.2/patches/11447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026221226.9957A33E26@hamza.pair.com/","msgid":"<20221026221226.9957A33E26@hamza.pair.com>","list_archive_url":null,"date":"2022-10-26T22:12:23","name":"[committed] wwwdocs: style: Remove link to validator.w3.org in footer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026221226.9957A33E26@hamza.pair.com/mbox/"},{"id":11533,"url":"https://patchwork.plctlab.org/api/1.2/patches/11533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027033829.22918-1-mark@harmstone.com/","msgid":"<20221027033829.22918-1-mark@harmstone.com>","list_archive_url":null,"date":"2022-10-27T03:38:29","name":"[v2] Add -gcodeview option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027033829.22918-1-mark@harmstone.com/mbox/"},{"id":11620,"url":"https://patchwork.plctlab.org/api/1.2/patches/11620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc97e1d1-e256-d887-9a52-bef93e70d260@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-27T07:09:59","name":"testsuite: Adjust vect-bitfield-read-* with vect_shift and vect_long_long [PR107240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc97e1d1-e256-d887-9a52-bef93e70d260@linux.ibm.com/mbox/"},{"id":11638,"url":"https://patchwork.plctlab.org/api/1.2/patches/11638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o6fhwgbVZoh4Pe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-27T07:59:58","name":"libstdc++: std::to_chars std::{,b}float16_t support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o6fhwgbVZoh4Pe@tucnak/mbox/"},{"id":11639,"url":"https://patchwork.plctlab.org/api/1.2/patches/11639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o+hfO6L6AGXcE4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:17:09","name":"c++: Fix ICE on g++.dg/modules/adl-3_c.C [PR107379]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o+hfO6L6AGXcE4@tucnak/mbox/"},{"id":11644,"url":"https://patchwork.plctlab.org/api/1.2/patches/11644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39da44c-7a2f-3f24-0876-50aa1a28d33f@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:30:32","name":"[(pushed)] lto: do not load LTO stream for aliases [PR107418]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39da44c-7a2f-3f24-0876-50aa1a28d33f@suse.cz/mbox/"},{"id":11656,"url":"https://patchwork.plctlab.org/api/1.2/patches/11656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0954f7-b256-4b1a-3e6e-2464b22cca98@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:42:00","name":"lto-dump: modernize a bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0954f7-b256-4b1a-3e6e-2464b22cca98@suse.cz/mbox/"},{"id":11737,"url":"https://patchwork.plctlab.org/api/1.2/patches/11737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261AB4B9363DFAEE94800AD91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-27T10:51:24","name":"RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261AB4B9363DFAEE94800AD91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":11739,"url":"https://patchwork.plctlab.org/api/1.2/patches/11739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027105354.3151191-1-hongtao.liu@intel.com/","msgid":"<20221027105354.3151191-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-27T10:53:54","name":"[x86] Fix incorrect digit constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027105354.3151191-1-hongtao.liu@intel.com/mbox/"},{"id":11776,"url":"https://patchwork.plctlab.org/api/1.2/patches/11776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261ABB716605DE32EC2C58B91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-27T12:49:42","name":"[v2] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261ABB716605DE32EC2C58B91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":11796,"url":"https://patchwork.plctlab.org/api/1.2/patches/11796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmed2yhk.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-27T13:21:43","name":"[pushed] aarch64: Reinstate some uses of CONSTEXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmed2yhk.fsf@arm.com/mbox/"},{"id":11806,"url":"https://patchwork.plctlab.org/api/1.2/patches/11806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027144152.335455-1-juzhe.zhong@rivai.ai/","msgid":"<20221027144152.335455-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-27T14:41:52","name":"RISC-V: Change constexpr back to CONSTEXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027144152.335455-1-juzhe.zhong@rivai.ai/mbox/"},{"id":11835,"url":"https://patchwork.plctlab.org/api/1.2/patches/11835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1666883439-7725-1-git-send-email-apinski@marvell.com/","msgid":"<1666883439-7725-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-10-27T15:10:39","name":"Use simple_dce_from_worklist with match_simplify_replacement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1666883439-7725-1-git-send-email-apinski@marvell.com/mbox/"},{"id":11853,"url":"https://patchwork.plctlab.org/api/1.2/patches/11853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027153906.24773-1-polacek@redhat.com/","msgid":"<20221027153906.24773-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-27T15:39:06","name":"c++: -Wdangling-reference and system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027153906.24773-1-polacek@redhat.com/mbox/"},{"id":11855,"url":"https://patchwork.plctlab.org/api/1.2/patches/11855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa228d19-9f9a-7cda-ddb2-8ce6380bcbc2@acm.org/","msgid":"","list_archive_url":null,"date":"2022-10-27T16:00:39","name":"c++: Templated lambda mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa228d19-9f9a-7cda-ddb2-8ce6380bcbc2@acm.org/mbox/"},{"id":11876,"url":"https://patchwork.plctlab.org/api/1.2/patches/11876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027164750.97737-1-ppalka@redhat.com/","msgid":"<20221027164750.97737-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-27T16:47:50","name":"libstdc++: Implement ranges::cartesian_product_view from P2374R4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027164750.97737-1-ppalka@redhat.com/mbox/"},{"id":11894,"url":"https://patchwork.plctlab.org/api/1.2/patches/11894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com/","msgid":"<38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-27T17:30:11","name":"c++: libcpp: Support raw strings with newlines in directives [PR55971]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com/mbox/"},{"id":11907,"url":"https://patchwork.plctlab.org/api/1.2/patches/11907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027181125.1658982-1-christoph.muellner@vrull.eu/","msgid":"<20221027181125.1658982-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-10-27T18:11:25","name":"RISC-V: Add Zawrs ISA extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027181125.1658982-1-christoph.muellner@vrull.eu/mbox/"},{"id":12004,"url":"https://patchwork.plctlab.org/api/1.2/patches/12004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-2-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:42","name":"[v2,1/3] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-2-ben.boeckel@kitware.com/mbox/"},{"id":12002,"url":"https://patchwork.plctlab.org/api/1.2/patches/12002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-3-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:43","name":"[v2,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-3-ben.boeckel@kitware.com/mbox/"},{"id":12003,"url":"https://patchwork.plctlab.org/api/1.2/patches/12003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-4-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:44","name":"[v2,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-4-ben.boeckel@kitware.com/mbox/"},{"id":12018,"url":"https://patchwork.plctlab.org/api/1.2/patches/12018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da969aa1-aa99-74eb-3bbb-7b7bdd31cf38@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T00:38:27","name":"[committed] c: C2x enums with fixed underlying type [PR61469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da969aa1-aa99-74eb-3bbb-7b7bdd31cf38@codesourcery.com/mbox/"},{"id":12085,"url":"https://patchwork.plctlab.org/api/1.2/patches/12085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548761EC65B3DE7F66955887EC329@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T06:20:06","name":"i386: using __bf16 for AVX512BF16 intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548761EC65B3DE7F66955887EC329@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":12145,"url":"https://patchwork.plctlab.org/api/1.2/patches/12145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028080146.1586483-1-chenglulu@loongson.cn/","msgid":"<20221028080146.1586483-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-28T08:01:46","name":"[v3] LoongArch: Libvtv add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028080146.1586483-1-chenglulu@loongson.cn/mbox/"},{"id":12151,"url":"https://patchwork.plctlab.org/api/1.2/patches/12151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028083155.6628513A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028083155.6628513A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T08:31:54","name":"Adjust gcc.dg/vect/pr100756.c for V8SI and V16SI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028083155.6628513A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12153,"url":"https://patchwork.plctlab.org/api/1.2/patches/12153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261358467675A63EEE7B55D91329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-28T08:39:27","name":"[v3] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261358467675A63EEE7B55D91329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12157,"url":"https://patchwork.plctlab.org/api/1.2/patches/12157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8735b849h6.fsf@euler.schwinge.homeip.net/","msgid":"<8735b849h6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-28T08:51:17","name":"OpenACC: Don'\''t gang-privatize artificial variables [PR90115] (was: [PATCH] [og12] OpenACC: Don'\''t gang-privatize artificial variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8735b849h6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":12167,"url":"https://patchwork.plctlab.org/api/1.2/patches/12167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ucRnr9uUesOXnc@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-28T09:09:26","name":"[committed] openmp: Allow optional comma after directive-specifier in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ucRnr9uUesOXnc@tucnak/mbox/"},{"id":12168,"url":"https://patchwork.plctlab.org/api/1.2/patches/12168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1930502.usQuhbGJ8B@fomalhaut/","msgid":"<1930502.usQuhbGJ8B@fomalhaut>","list_archive_url":null,"date":"2022-10-28T09:10:29","name":"Restore RTL alias analysis for hard frame pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1930502.usQuhbGJ8B@fomalhaut/mbox/"},{"id":12169,"url":"https://patchwork.plctlab.org/api/1.2/patches/12169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028091500.2748920-1-torbjorn.svensson@foss.st.com/","msgid":"<20221028091500.2748920-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-28T09:15:01","name":"c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028091500.2748920-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":12248,"url":"https://patchwork.plctlab.org/api/1.2/patches/12248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB026166C70CCE09404AFC2B4891329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-28T12:34:08","name":"[v4] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB026166C70CCE09404AFC2B4891329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12264,"url":"https://patchwork.plctlab.org/api/1.2/patches/12264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:06:29","name":"tree-optimization/107435 - ICE with recurrence vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12265,"url":"https://patchwork.plctlab.org/api/1.2/patches/12265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:06:41","name":"tree-optimization/107447 - avoid hoisting returns-twice calls in LIM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12269,"url":"https://patchwork.plctlab.org/api/1.2/patches/12269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:22:46","name":"tree-optimization/107407 - wrong code with DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12341,"url":"https://patchwork.plctlab.org/api/1.2/patches/12341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028142754.145622-1-jwakely@redhat.com/","msgid":"<20221028142754.145622-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-28T14:27:54","name":"[committed] libstdc++: Fix allocator propagation in regex algorithms [PR107376]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028142754.145622-1-jwakely@redhat.com/mbox/"},{"id":12388,"url":"https://patchwork.plctlab.org/api/1.2/patches/12388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028151553.918472-1-jason@redhat.com/","msgid":"<20221028151553.918472-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-28T15:15:53","name":"[pushed] c++: apply friend attributes sooner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028151553.918472-1-jason@redhat.com/mbox/"},{"id":12448,"url":"https://patchwork.plctlab.org/api/1.2/patches/12448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrleozaov1.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T16:34:42","name":"[10/15,V3] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrleozaov1.fsf_-_@arm.com/mbox/"},{"id":12449,"url":"https://patchwork.plctlab.org/api/1.2/patches/12449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrh6znaolq.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T16:40:17","name":"[12/15,V3] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrh6znaolq.fsf_-_@arm.com/mbox/"},{"id":12531,"url":"https://patchwork.plctlab.org/api/1.2/patches/12531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-04843f20-2dab-41c6-87fa-c939f57d02b3-1666987979945@3c-app-gmx-bs25/","msgid":"","list_archive_url":null,"date":"2022-10-28T20:12:59","name":"Fortran: ordering of hidden procedure arguments [PR107441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-04843f20-2dab-41c6-87fa-c939f57d02b3-1666987979945@3c-app-gmx-bs25/mbox/"},{"id":12538,"url":"https://patchwork.plctlab.org/api/1.2/patches/12538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028204233.409310-1-polacek@redhat.com/","msgid":"<20221028204233.409310-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-28T20:42:33","name":"c++: Tweaks for -Wredundant-move [PR107363]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028204233.409310-1-polacek@redhat.com/mbox/"},{"id":12608,"url":"https://patchwork.plctlab.org/api/1.2/patches/12608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028235632.194108-1-jwakely@redhat.com/","msgid":"<20221028235632.194108-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-28T23:56:32","name":"[committed] libstdc++: Fix dangling reference in filesystem::path::filename()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028235632.194108-1-jwakely@redhat.com/mbox/"},{"id":12650,"url":"https://patchwork.plctlab.org/api/1.2/patches/12650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029065320.2561317-1-chenglulu@loongson.cn/","msgid":"<20221029065320.2561317-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T06:53:22","name":"[v4] Libvtv: Add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029065320.2561317-1-chenglulu@loongson.cn/mbox/"},{"id":12654,"url":"https://patchwork.plctlab.org/api/1.2/patches/12654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-2-chenglulu@loongson.cn/","msgid":"<20221029070524.2570782-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T07:05:24","name":"[v1,1/2] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-2-chenglulu@loongson.cn/mbox/"},{"id":12653,"url":"https://patchwork.plctlab.org/api/1.2/patches/12653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-3-chenglulu@loongson.cn/","msgid":"<20221029070524.2570782-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T07:05:25","name":"[v1,2/2] LoongArch: Add prefetch insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-3-chenglulu@loongson.cn/mbox/"},{"id":12658,"url":"https://patchwork.plctlab.org/api/1.2/patches/12658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029074131.1654166-1-ibuclaw@gdcproject.org/","msgid":"<20221029074131.1654166-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-10-29T07:41:31","name":"[committed] d: Make TARGET_D_MINFO_SECTION hooks in elfos.h the language default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029074131.1654166-1-ibuclaw@gdcproject.org/mbox/"},{"id":12663,"url":"https://patchwork.plctlab.org/api/1.2/patches/12663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029082755.781D833E4F@hamza.pair.com/","msgid":"<20221029082755.781D833E4F@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T08:27:52","name":"[committed] wwwdocs: contribute: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029082755.781D833E4F@hamza.pair.com/mbox/"},{"id":12668,"url":"https://patchwork.plctlab.org/api/1.2/patches/12668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYAP286MB0265EBD8D4F0E0E57E9EA44E91359@TYAP286MB0265.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-29T09:01:18","name":"[v5] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYAP286MB0265EBD8D4F0E0E57E9EA44E91359@TYAP286MB0265.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12697,"url":"https://patchwork.plctlab.org/api/1.2/patches/12697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21653628.EfDdHjke4D@fomalhaut/","msgid":"<21653628.EfDdHjke4D@fomalhaut>","list_archive_url":null,"date":"2022-10-29T12:14:23","name":"Repair --disable-sjlj-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21653628.EfDdHjke4D@fomalhaut/mbox/"},{"id":12725,"url":"https://patchwork.plctlab.org/api/1.2/patches/12725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150307.06C1433E4D@hamza.pair.com/","msgid":"<20221029150307.06C1433E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:03:04","name":"[committed] wwwdocs: bugs: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150307.06C1433E4D@hamza.pair.com/mbox/"},{"id":12726,"url":"https://patchwork.plctlab.org/api/1.2/patches/12726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150603.93D9C33E63@hamza.pair.com/","msgid":"<20221029150603.93D9C33E63@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:06:01","name":"[committed] wwwdocs: readings: Update Go-related links to new site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150603.93D9C33E63@hamza.pair.com/mbox/"},{"id":12727,"url":"https://patchwork.plctlab.org/api/1.2/patches/12727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150914.4FA8533E4C@hamza.pair.com/","msgid":"<20221029150914.4FA8533E4C@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:09:12","name":"[committed] wwwdocs: frontends: Adjust Sourceforge links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150914.4FA8533E4C@hamza.pair.com/mbox/"},{"id":12775,"url":"https://patchwork.plctlab.org/api/1.2/patches/12775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211510.8DC5333E4A@hamza.pair.com/","msgid":"<20221029211510.8DC5333E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:15:07","name":"[committed] wwwdocs: gcc-10: Update two developer.arm.com links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211510.8DC5333E4A@hamza.pair.com/mbox/"},{"id":12777,"url":"https://patchwork.plctlab.org/api/1.2/patches/12777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211820.18BD833E4D@hamza.pair.com/","msgid":"<20221029211820.18BD833E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:18:17","name":"[committed] wwwdocs: testing: Switch www.netlib.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211820.18BD833E4D@hamza.pair.com/mbox/"},{"id":12778,"url":"https://patchwork.plctlab.org/api/1.2/patches/12778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029213327.0296B33E55@hamza.pair.com/","msgid":"<20221029213327.0296B33E55@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:33:24","name":"[committed] wwwdocs: gcc-4.3: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029213327.0296B33E55@hamza.pair.com/mbox/"},{"id":12779,"url":"https://patchwork.plctlab.org/api/1.2/patches/12779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029214021.C993D33E4D@hamza.pair.com/","msgid":"<20221029214021.C993D33E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:40:20","name":"[committed] wwwdocs: projects: Remove extra slash at end of ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029214021.C993D33E4D@hamza.pair.com/mbox/"},{"id":13092,"url":"https://patchwork.plctlab.org/api/1.2/patches/13092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031011036.1158443-1-hongtao.liu@intel.com/","msgid":"<20221031011036.1158443-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-31T01:10:36","name":"[V2,x86] Fix incorrect digit constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031011036.1158443-1-hongtao.liu@intel.com/mbox/"},{"id":13093,"url":"https://patchwork.plctlab.org/api/1.2/patches/13093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031012310.1237451-1-hongtao.liu@intel.com/","msgid":"<20221031012310.1237451-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-31T01:23:10","name":"Enable more optimization for 32-bit/64-bit shrd/shld with imm shift count.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031012310.1237451-1-hongtao.liu@intel.com/mbox/"},{"id":13094,"url":"https://patchwork.plctlab.org/api/1.2/patches/13094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031014022.250112-1-juzhe.zhong@rivai.ai/","msgid":"<20221031014022.250112-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-31T01:40:22","name":"RISC-V: Fix RVV testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031014022.250112-1-juzhe.zhong@rivai.ai/mbox/"},{"id":13212,"url":"https://patchwork.plctlab.org/api/1.2/patches/13212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaQR7+ZB3JNvjWm9RGFsNSFH7uTgX0QYkxLiG=vdgJkxA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:14:04","name":"Update email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaQR7+ZB3JNvjWm9RGFsNSFH7uTgX0QYkxLiG=vdgJkxA@mail.gmail.com/mbox/"},{"id":13235,"url":"https://patchwork.plctlab.org/api/1.2/patches/13235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16485-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:53:08","name":"[1/2] middle-end: Add new tbranch optab to add support for bit-test-and-branch operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16485-tamar@arm.com/mbox/"},{"id":13236,"url":"https://patchwork.plctlab.org/api/1.2/patches/13236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3ThtA9vUT43aA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:53:50","name":"[2/2] AArch64 Support new tbranch optab.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3ThtA9vUT43aA@arm.com/mbox/"},{"id":13237,"url":"https://patchwork.plctlab.org/api/1.2/patches/13237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3Yxws77tZN9pN@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:54:11","name":"AArch64 Extend umov and sbfx patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3Yxws77tZN9pN@arm.com/mbox/"},{"id":13241,"url":"https://patchwork.plctlab.org/api/1.2/patches/13241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16240-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:56:42","name":"[1/8] middle-end: Recognize scalar reductions from bitfields and array_refs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16240-tamar@arm.com/mbox/"},{"id":13239,"url":"https://patchwork.plctlab.org/api/1.2/patches/13239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4GFnUyuwSK1hy@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:57:12","name":"[2/8] middle-end: Recognize scalar widening reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4GFnUyuwSK1hy@arm.com/mbox/"},{"id":13240,"url":"https://patchwork.plctlab.org/api/1.2/patches/13240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4Nu1ryQIKoOQA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:57:42","name":"[3/8] middle-end: Support extractions of subvectors from arbitrary element position inside a vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4Nu1ryQIKoOQA@arm.com/mbox/"},{"id":13242,"url":"https://patchwork.plctlab.org/api/1.2/patches/13242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4UYIESInTYiGq@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:58:09","name":"[4/8] AArch64 aarch64: Implement widening reduction patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4UYIESInTYiGq@arm.com/mbox/"},{"id":13244,"url":"https://patchwork.plctlab.org/api/1.2/patches/13244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4euF0rUwFIjTL@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:58:50","name":"[5/8] AArch64 aarch64: Make existing V2HF be usable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4euF0rUwFIjTL@arm.com/mbox/"},{"id":13243,"url":"https://patchwork.plctlab.org/api/1.2/patches/13243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4kpUXZfolj+cr@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:59:14","name":"[6/8] AArch64: Add peephole and scheduling logic for pairwise operations that appear late in RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4kpUXZfolj+cr@arm.com/mbox/"},{"id":13245,"url":"https://patchwork.plctlab.org/api/1.2/patches/13245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4qItMrQHbdqqD@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:59:36","name":"[7/8] AArch64: Consolidate zero and sign extension patterns and add missing ones.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4qItMrQHbdqqD@arm.com/mbox/"},{"id":13246,"url":"https://patchwork.plctlab.org/api/1.2/patches/13246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+41nrRB4ZMXZZA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T12:00:22","name":"[8/8] AArch64: Have reload not choose to do add on the scalar side if both values exist on the SIMD side.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+41nrRB4ZMXZZA@arm.com/mbox/"},{"id":13263,"url":"https://patchwork.plctlab.org/api/1.2/patches/13263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com/","msgid":"<7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T13:02:59","name":"[committed] amdgcn: Silence unused parameter warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com/mbox/"},{"id":13265,"url":"https://patchwork.plctlab.org/api/1.2/patches/13265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0c50451-2b18-7bea-4fed-f3c94192d35a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T13:03:07","name":"[committed] amdgcn: multi-size vector reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0c50451-2b18-7bea-4fed-f3c94192d35a@codesourcery.com/mbox/"},{"id":13264,"url":"https://patchwork.plctlab.org/api/1.2/patches/13264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com/","msgid":"<500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T13:03:13","name":"[committed] amdgcn: add fmin/fmax patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com/mbox/"},{"id":13272,"url":"https://patchwork.plctlab.org/api/1.2/patches/13272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com/","msgid":"<51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T14:46:25","name":"OpenMP/Fortran: '\''target update'\'' with strides + DT components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-10/mbox/"},{"id":5,"url":"https://patchwork.plctlab.org/api/1.2/bundles/5/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-09/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-09","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":1175,"url":"https://patchwork.plctlab.org/api/1.2/patches/1175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9f0c5c3-235c-26b3-f884-daf761ec16a1@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T07:15:14","name":"[committed] libgomp.texi: move item from gcn to nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9f0c5c3-235c-26b3-f884-daf761ec16a1@codesourcery.com/mbox/"},{"id":1176,"url":"https://patchwork.plctlab.org/api/1.2/patches/1176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth71b65ip.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T08:30:06","name":"[pushed] aarch64: Disassociate ls64 from simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth71b65ip.fsf@arm.com/mbox/"},{"id":1177,"url":"https://patchwork.plctlab.org/api/1.2/patches/1177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkrj65hr.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T08:30:40","name":"[pushed] aarch64: Vector move fixes for +nosimd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkrj65hr.fsf@arm.com/mbox/"},{"id":1178,"url":"https://patchwork.plctlab.org/api/1.2/patches/1178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085150.0F518139B3@imap2.suse-dmz.suse.de/","msgid":"<20220913085150.0F518139B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-13T08:51:49","name":"tree-optimization/106913 - ICE with -da and -Wuninitialized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085150.0F518139B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1179,"url":"https://patchwork.plctlab.org/api/1.2/patches/1179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de/","msgid":"<20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-13T08:52:03","name":"middle-end/106909 - CTRL altering flag after folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1180,"url":"https://patchwork.plctlab.org/api/1.2/patches/1180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913093616.1422179-1-jiawei@iscas.ac.cn/","msgid":"<20220913093616.1422179-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-09-13T09:36:16","name":"[V2] RISC-V:Add '\''-m[no]-csr-check'\'' option in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913093616.1422179-1-jiawei@iscas.ac.cn/mbox/"},{"id":1181,"url":"https://patchwork.plctlab.org/api/1.2/patches/1181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com/","msgid":"<020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T09:56:58","name":"PR target/106877: Robustify reg-stack to malformed asm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com/mbox/"},{"id":1182,"url":"https://patchwork.plctlab.org/api/1.2/patches/1182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com/","msgid":"<62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com>","list_archive_url":null,"date":"2022-09-13T11:03:35","name":"[OG12] openmp: Fix handling of target constructs in static member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com/mbox/"},{"id":1183,"url":"https://patchwork.plctlab.org/api/1.2/patches/1183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913114538.2741902-1-ppalka@redhat.com/","msgid":"<20220913114538.2741902-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-13T11:45:38","name":"c++: some missing-SFINAE fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913114538.2741902-1-ppalka@redhat.com/mbox/"},{"id":1184,"url":"https://patchwork.plctlab.org/api/1.2/patches/1184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913142118.3183120-1-ppalka@redhat.com/","msgid":"<20220913142118.3183120-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-13T14:21:18","name":"[committed] c++: remove single-parameter version of mark_used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913142118.3183120-1-ppalka@redhat.com/mbox/"},{"id":1185,"url":"https://patchwork.plctlab.org/api/1.2/patches/1185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913153237.305471-1-xry111@xry111.site/","msgid":"<20220913153237.305471-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-13T15:32:37","name":"LoongArch: Prepare static PIE support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913153237.305471-1-xry111@xry111.site/mbox/"},{"id":1186,"url":"https://patchwork.plctlab.org/api/1.2/patches/1186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyCy9OxAaLBDi+1V@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-13T16:42:28","name":"c++: Implement C++23 P1169R4 - static operator() [PR106651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyCy9OxAaLBDi+1V@tucnak/mbox/"},{"id":1187,"url":"https://patchwork.plctlab.org/api/1.2/patches/1187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyC4X5weKJ5HpmpZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-13T17:05:35","name":"[committed] libgomp: Appease some static analyzers [PR106906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyC4X5weKJ5HpmpZ@tucnak/mbox/"},{"id":1188,"url":"https://patchwork.plctlab.org/api/1.2/patches/1188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com/","msgid":"<000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T17:54:58","name":"PR tree-optimization/71343: Value number X<<2 as X*4.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com/mbox/"},{"id":1189,"url":"https://patchwork.plctlab.org/api/1.2/patches/1189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002d01d8c79f$dc5fe830$951fb890$@nextmovesoftware.com/","msgid":"<002d01d8c79f$dc5fe830$951fb890$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T18:37:20","name":"Optimize (X<","list_archive_url":null,"date":"2022-09-13T21:01:42","name":"[v3,01/11] OpenMP 5.0: Clause ordering for OpenMP 5.0 (topological sorting by base pointer)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/839df7d51e5bf6f29054e83b3c017f57df5c1149.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1190,"url":"https://patchwork.plctlab.org/api/1.2/patches/1190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com/","msgid":"<13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:01:43","name":"[v3,02/11] Remove omp_target_reorder_clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1192,"url":"https://patchwork.plctlab.org/api/1.2/patches/1192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com/","msgid":"<76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:01:44","name":"[v3,03/11] OpenMP/OpenACC struct sibling list gimplification extension and rework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1193,"url":"https://patchwork.plctlab.org/api/1.2/patches/1193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2f84c39600751588e8cf4a7809f5644055fa727.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:01:45","name":"[v3,04/11] OpenMP/OpenACC: mapping group list-handling improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2f84c39600751588e8cf4a7809f5644055fa727.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1194,"url":"https://patchwork.plctlab.org/api/1.2/patches/1194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com/","msgid":"<479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:15","name":"[v3,05/11] OpenMP: push attaches to end of clause list in \"target\" regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1197,"url":"https://patchwork.plctlab.org/api/1.2/patches/1197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3be658301113143e5ff5efea74e46ea6efc3e5f.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:03:16","name":"[v3,06/11] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3be658301113143e5ff5efea74e46ea6efc3e5f.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1195,"url":"https://patchwork.plctlab.org/api/1.2/patches/1195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com/","msgid":"<4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:17","name":"[v3,07/11] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1199,"url":"https://patchwork.plctlab.org/api/1.2/patches/1199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1d4786dbfd1f5cd31f809dfc713478e44c5232b.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:03:18","name":"[v3,08/11] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1d4786dbfd1f5cd31f809dfc713478e44c5232b.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1196,"url":"https://patchwork.plctlab.org/api/1.2/patches/1196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com/","msgid":"<1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:19","name":"[v3,09/11] FYI/unfinished: OpenMP: lvalue parsing for map clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1200,"url":"https://patchwork.plctlab.org/api/1.2/patches/1200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c2a998d8013d8d5b7abd56729b1ecf13c397a6.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:04:29","name":"[v3,10/11] Use OMP_ARRAY_SECTION instead of TREE_LIST in C++ FE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c2a998d8013d8d5b7abd56729b1ecf13c397a6.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1198,"url":"https://patchwork.plctlab.org/api/1.2/patches/1198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com/","msgid":"<2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:04:30","name":"[v3,11/11] FYI/unfinished: OpenMP 5.0 \"declare mapper\" support for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1201,"url":"https://patchwork.plctlab.org/api/1.2/patches/1201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913215743.2712390-1-jcmvbkbc@gmail.com/","msgid":"<20220913215743.2712390-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-09-13T21:57:43","name":"xtensa: gcc: implement MI thunk generation for call0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913215743.2712390-1-jcmvbkbc@gmail.com/mbox/"},{"id":1202,"url":"https://patchwork.plctlab.org/api/1.2/patches/1202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914012511.1012154-1-hongtao.liu@intel.com/","msgid":"<20220914012511.1012154-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-14T01:25:11","name":"[ICE] Check another epilog variable peeling case in vectorizable_nonlinear_induction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914012511.1012154-1-hongtao.liu@intel.com/mbox/"},{"id":1203,"url":"https://patchwork.plctlab.org/api/1.2/patches/1203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyGGD/5HXAXh13N0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-14T07:43:11","name":"Disallow pointer operands for |, ^ and partly & [PR106878]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyGGD/5HXAXh13N0@tucnak/mbox/"},{"id":1204,"url":"https://patchwork.plctlab.org/api/1.2/patches/1204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914095705.00384134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914095705.00384134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T09:57:04","name":"tree-optimization/106934 - avoid BIT_FIELD_REF of bitfields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914095705.00384134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1205,"url":"https://patchwork.plctlab.org/api/1.2/patches/1205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914121921.j46kmn2btdwmj3sc@lug-owl.de/","msgid":"<20220914121921.j46kmn2btdwmj3sc@lug-owl.de>","list_archive_url":null,"date":"2022-09-14T12:19:21","name":"[COMMITTED] Fix unused variable warning (was: [PATCH 1/3] STABS: remove -gstabs and -gxcoff functionality)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914121921.j46kmn2btdwmj3sc@lug-owl.de/mbox/"},{"id":1206,"url":"https://patchwork.plctlab.org/api/1.2/patches/1206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914124935.1221658-1-aldyh@redhat.com/","msgid":"<20220914124935.1221658-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T12:49:35","name":"[COMMITTED,PR106936] Remove assert from get_value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914124935.1221658-1-aldyh@redhat.com/mbox/"},{"id":1207,"url":"https://patchwork.plctlab.org/api/1.2/patches/1207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914125001.E5607134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914125001.E5607134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T12:50:01","name":"tree-optimization/106938 - cleanup abnormal edges after inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914125001.E5607134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1208,"url":"https://patchwork.plctlab.org/api/1.2/patches/1208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914140656.640BF134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914140656.640BF134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T14:06:55","name":"Move void_list_node init to common code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914140656.640BF134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1209,"url":"https://patchwork.plctlab.org/api/1.2/patches/1209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914141900.3489407-1-ppalka@redhat.com/","msgid":"<20220914141900.3489407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-14T14:19:00","name":"libstdc++: Implement ranges::chunk_by_view from P2443R1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914141900.3489407-1-ppalka@redhat.com/mbox/"},{"id":1210,"url":"https://patchwork.plctlab.org/api/1.2/patches/1210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rmm82c5.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T14:20:26","name":"[10/15,V2] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rmm82c5.fsf_-_@arm.com/mbox/"},{"id":1215,"url":"https://patchwork.plctlab.org/api/1.2/patches/1215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-1-aldyh@redhat.com/","msgid":"<20220914150852.1244397-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:48","name":"[COMMITTED] Minor fixes to frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-1-aldyh@redhat.com/mbox/"},{"id":1214,"url":"https://patchwork.plctlab.org/api/1.2/patches/1214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-2-aldyh@redhat.com/","msgid":"<20220914150852.1244397-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:49","name":"[COMMITTED] Provide cleaner set_nan(), clear_nan(), and update_nan() methods.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-2-aldyh@redhat.com/mbox/"},{"id":1211,"url":"https://patchwork.plctlab.org/api/1.2/patches/1211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-3-aldyh@redhat.com/","msgid":"<20220914150852.1244397-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:50","name":"[COMMITTED] Use frange::set_nan() from the generic frange::set().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-3-aldyh@redhat.com/mbox/"},{"id":1213,"url":"https://patchwork.plctlab.org/api/1.2/patches/1213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-4-aldyh@redhat.com/","msgid":"<20220914150852.1244397-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:51","name":"[COMMITTED] Pass full range to build_* in range-op-float.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-4-aldyh@redhat.com/mbox/"},{"id":1212,"url":"https://patchwork.plctlab.org/api/1.2/patches/1212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-5-aldyh@redhat.com/","msgid":"<20220914150852.1244397-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:52","name":"[COMMITTED] frange: add both zeros to ranges when there'\''s the possiblity of equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-5-aldyh@redhat.com/mbox/"},{"id":1216,"url":"https://patchwork.plctlab.org/api/1.2/patches/1216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com/","msgid":"<8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com>","list_archive_url":null,"date":"2022-09-14T17:22:08","name":"[_GLIBCXX_INLINE_VERSION] Cleanup gnu-versioned-namespace.ver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com/mbox/"},{"id":1217,"url":"https://patchwork.plctlab.org/api/1.2/patches/1217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com/","msgid":"<99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com>","list_archive_url":null,"date":"2022-09-14T17:26:16","name":"[_GLIBCXX_INLINE_VERSION] Fix test dg-prune-output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com/mbox/"},{"id":1218,"url":"https://patchwork.plctlab.org/api/1.2/patches/1218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d354aa-07ef-5e3a-991e-deba88ee0175@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T17:31:34","name":"OpenMP: Enable vectorization in all OpenMP loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d354aa-07ef-5e3a-991e-deba88ee0175@codesourcery.com/mbox/"},{"id":1219,"url":"https://patchwork.plctlab.org/api/1.2/patches/1219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com/","msgid":"<0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com>","list_archive_url":null,"date":"2022-09-14T17:32:11","name":"OpenMP: Generate SIMD clones for functions with \"declare target\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com/mbox/"},{"id":1220,"url":"https://patchwork.plctlab.org/api/1.2/patches/1220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANP1oa0QMfUCRwGpP46Hz3xz9CsHEkHdMJXJ5sv+92-boR3u5Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T18:09:56","name":"mips: Add appropriate linker flags when compiling with -static-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANP1oa0QMfUCRwGpP46Hz3xz9CsHEkHdMJXJ5sv+92-boR3u5Q@mail.gmail.com/mbox/"},{"id":1221,"url":"https://patchwork.plctlab.org/api/1.2/patches/1221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182315.263596-1-jwakely@redhat.com/","msgid":"<20220914182315.263596-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:15","name":"[committed] libstdc++: Document LWG 1203 API change in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182315.263596-1-jwakely@redhat.com/mbox/"},{"id":1223,"url":"https://patchwork.plctlab.org/api/1.2/patches/1223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182329.263649-1-jwakely@redhat.com/","msgid":"<20220914182329.263649-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:29","name":"[committed] libstdc++: Add assertion to std::promise::set_exception (LWG 2276)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182329.263649-1-jwakely@redhat.com/mbox/"},{"id":1222,"url":"https://patchwork.plctlab.org/api/1.2/patches/1222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182337.263664-1-jwakely@redhat.com/","msgid":"<20220914182337.263664-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:37","name":"[committed] libstdc++: Add comment to 17_intro/names.cc test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182337.263664-1-jwakely@redhat.com/mbox/"},{"id":1224,"url":"https://patchwork.plctlab.org/api/1.2/patches/1224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220435.276306-1-jwakely@redhat.com/","msgid":"<20220914220435.276306-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T22:04:35","name":"[committed] libstdc++: Add missing header to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220435.276306-1-jwakely@redhat.com/mbox/"},{"id":1225,"url":"https://patchwork.plctlab.org/api/1.2/patches/1225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220449.276340-1-jwakely@redhat.com/","msgid":"<20220914220449.276340-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T22:04:49","name":"[committed] libstdc++: Add TSan annotations to std::atomic>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220449.276340-1-jwakely@redhat.com/mbox/"},{"id":1226,"url":"https://patchwork.plctlab.org/api/1.2/patches/1226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209142301140.3158477@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-14T23:02:00","name":"float.h: Do not define INFINITY for C2x when infinities not supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209142301140.3158477@digraph.polyomino.org.uk/mbox/"},{"id":1227,"url":"https://patchwork.plctlab.org/api/1.2/patches/1227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548726F51948DD72BB8532B8EC499@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-15T03:36:19","name":"i386: Fixed vec_init_dup_v16bf [PR106887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548726F51948DD72BB8532B8EC499@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":1228,"url":"https://patchwork.plctlab.org/api/1.2/patches/1228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915054026.1359564-1-aldyh@redhat.com/","msgid":"<20220915054026.1359564-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-15T05:40:27","name":"Rewrite NAN and sign handling in frange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915054026.1359564-1-aldyh@redhat.com/mbox/"},{"id":1229,"url":"https://patchwork.plctlab.org/api/1.2/patches/1229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915065416.1172508-1-torbjorn.svensson@foss.st.com/","msgid":"<20220915065416.1172508-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-15T06:54:16","name":"testsuite: Disable zero-scratch-regs-{7, 9, 11}.c on arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915065416.1172508-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1230,"url":"https://patchwork.plctlab.org/api/1.2/patches/1230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915082853.109235-1-juzhe.zhong@rivai.ai/","msgid":"<20220915082853.109235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T08:28:53","name":"RISC-V: Support poly move manipulation and selftests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915082853.109235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1231,"url":"https://patchwork.plctlab.org/api/1.2/patches/1231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915083052.74903-1-guojiufu@linux.ibm.com/","msgid":"<20220915083052.74903-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-09-15T08:30:52","name":"rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915083052.74903-1-guojiufu@linux.ibm.com/mbox/"},{"id":1232,"url":"https://patchwork.plctlab.org/api/1.2/patches/1232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915084130.130148-1-juzhe.zhong@rivai.ai/","msgid":"<20220915084130.130148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T08:41:30","name":"RISC-V: Add RVV machine modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915084130.130148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1233,"url":"https://patchwork.plctlab.org/api/1.2/patches/1233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113730.19569-1-julian@codesourcery.com/","msgid":"<20220915113730.19569-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-15T11:37:30","name":"Fix c-c++-common/goacc/mdc-2.c and g++.dg/goacc/mdc.C tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113730.19569-1-julian@codesourcery.com/mbox/"},{"id":1234,"url":"https://patchwork.plctlab.org/api/1.2/patches/1234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113943.264538-1-juzhe.zhong@rivai.ai/","msgid":"<20220915113943.264538-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T11:39:43","name":"RISC-V: Add RVV machine modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113943.264538-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1235,"url":"https://patchwork.plctlab.org/api/1.2/patches/1235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915120224.56342-1-julian@codesourcery.com/","msgid":"<20220915120224.56342-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-15T12:02:24","name":"Fix c-c++-common/gomp/target-50.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915120224.56342-1-julian@codesourcery.com/mbox/"},{"id":1236,"url":"https://patchwork.plctlab.org/api/1.2/patches/1236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de/","msgid":"<20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-15T12:23:14","name":"tree-optimization/106922 - PRE and virtual operand translation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de/mbox/"},{"id":1237,"url":"https://patchwork.plctlab.org/api/1.2/patches/1237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915125234.1180957-1-torbjorn.svensson@foss.st.com/","msgid":"<20220915125234.1180957-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-15T12:52:35","name":"[pushed] MAINTAINERS: Add myself to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915125234.1180957-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1238,"url":"https://patchwork.plctlab.org/api/1.2/patches/1238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915155822.4021344-1-ppalka@redhat.com/","msgid":"<20220915155822.4021344-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T15:58:22","name":"c++: constraint matching, TEMPLATE_ID_EXPR, current inst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915155822.4021344-1-ppalka@redhat.com/mbox/"},{"id":1239,"url":"https://patchwork.plctlab.org/api/1.2/patches/1239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915180312.1596193-1-ppalka@redhat.com/","msgid":"<20220915180312.1596193-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T18:03:12","name":"c++: '\''mutable'\'' within constexpr [PR92505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915180312.1596193-1-ppalka@redhat.com/mbox/"},{"id":1240,"url":"https://patchwork.plctlab.org/api/1.2/patches/1240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915201627.2942314-1-ppalka@redhat.com/","msgid":"<20220915201627.2942314-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T20:16:27","name":"c++: modules ICE with typename friend declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915201627.2942314-1-ppalka@redhat.com/mbox/"},{"id":1241,"url":"https://patchwork.plctlab.org/api/1.2/patches/1241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-677b8c14-ffe9-47f3-a4e6-6a6286f00ea4-1663273406376@3c-app-gmx-bs69/","msgid":"","list_archive_url":null,"date":"2022-09-15T20:23:26","name":"[committed] Fortran: error recovery for bad deferred character length assignment [PR104314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-677b8c14-ffe9-47f3-a4e6-6a6286f00ea4-1663273406376@3c-app-gmx-bs69/mbox/"},{"id":1242,"url":"https://patchwork.plctlab.org/api/1.2/patches/1242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915204623.407931-1-jwakely@redhat.com/","msgid":"<20220915204623.407931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-15T20:46:23","name":"[committed] libstdc++: Tweak TSan annotations for std::atomic>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915204623.407931-1-jwakely@redhat.com/mbox/"},{"id":1243,"url":"https://patchwork.plctlab.org/api/1.2/patches/1243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6f4abfa3-3785-43e9-a9e9-2c4de9afa4ba-1663275092004@3c-app-gmx-bs27/","msgid":"","list_archive_url":null,"date":"2022-09-15T20:51:32","name":"[committed] Fortran: catch NULL pointer dereferences while simplifying PACK [PR106857]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6f4abfa3-3785-43e9-a9e9-2c4de9afa4ba-1663275092004@3c-app-gmx-bs27/mbox/"},{"id":1244,"url":"https://patchwork.plctlab.org/api/1.2/patches/1244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915225856.413536-1-jwakely@redhat.com/","msgid":"<20220915225856.413536-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-15T22:58:56","name":"[committed] libstdc++: Remove unnecessary header from ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915225856.413536-1-jwakely@redhat.com/mbox/"},{"id":1245,"url":"https://patchwork.plctlab.org/api/1.2/patches/1245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916005443.3305032-1-hongtao.liu@intel.com/","msgid":"<20220916005443.3305032-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T00:54:43","name":"Modernize ix86_builtin_vectorized_function with corresponding expanders.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916005443.3305032-1-hongtao.liu@intel.com/mbox/"},{"id":1246,"url":"https://patchwork.plctlab.org/api/1.2/patches/1246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916010659.37555-1-hongtao.liu@intel.com/","msgid":"<20220916010659.37555-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T01:06:59","name":"[x86] Don'\''t optimize cmp mem, 0 to load mem, reg + test reg, reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916010659.37555-1-hongtao.liu@intel.com/mbox/"},{"id":1247,"url":"https://patchwork.plctlab.org/api/1.2/patches/1247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916060052.48335-1-hongtao.liu@intel.com/","msgid":"<20220916060052.48335-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T06:00:52","name":"[x86] Adjust issue_rate for latest Intel processors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916060052.48335-1-hongtao.liu@intel.com/mbox/"},{"id":1248,"url":"https://patchwork.plctlab.org/api/1.2/patches/1248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilln4uo0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-16T07:58:55","name":"vect: Fix missed gather load opportunity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilln4uo0.fsf@arm.com/mbox/"},{"id":1249,"url":"https://patchwork.plctlab.org/api/1.2/patches/1249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbv4udm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-16T08:05:09","name":"vect: Fix SLP layout handling of masked loads [PR106794]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbv4udm.fsf@arm.com/mbox/"},{"id":1250,"url":"https://patchwork.plctlab.org/api/1.2/patches/1250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916100608.491243-1-jwakely@redhat.com/","msgid":"<20220916100608.491243-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T10:06:08","name":"[committed] libstdc++: Document new libstdc++.so symbol versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916100608.491243-1-jwakely@redhat.com/mbox/"},{"id":1251,"url":"https://patchwork.plctlab.org/api/1.2/patches/1251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de/","msgid":"<2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de>","list_archive_url":null,"date":"2022-09-16T10:19:36","name":"[v4] eliminate mutex in fast path of __register_frame","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de/mbox/"},{"id":1252,"url":"https://patchwork.plctlab.org/api/1.2/patches/1252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916122314.3826744-1-yunqiang.su@cipunited.com/","msgid":"<20220916122314.3826744-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2022-09-16T12:23:14","name":"[v2] MIPS: improve -march=native arch detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916122314.3826744-1-yunqiang.su@cipunited.com/mbox/"},{"id":1253,"url":"https://patchwork.plctlab.org/api/1.2/patches/1253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916124240.176613-1-jason@redhat.com/","msgid":"<20220916124240.176613-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-16T12:42:40","name":"[pushed] c++: member fn in omp loc list [PR106858]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916124240.176613-1-jason@redhat.com/mbox/"},{"id":1254,"url":"https://patchwork.plctlab.org/api/1.2/patches/1254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161759.510516-1-jwakely@redhat.com/","msgid":"<20220916161759.510516-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:17:59","name":"[committed] libstdc++: Fix Doxygen commands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161759.510516-1-jwakely@redhat.com/mbox/"},{"id":1256,"url":"https://patchwork.plctlab.org/api/1.2/patches/1256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161814.510563-1-jwakely@redhat.com/","msgid":"<20220916161814.510563-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:14","name":"[committed] libstdc++: Remove __alloc_neq helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161814.510563-1-jwakely@redhat.com/mbox/"},{"id":1255,"url":"https://patchwork.plctlab.org/api/1.2/patches/1255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161826.510606-1-jwakely@redhat.com/","msgid":"<20220916161826.510606-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:26","name":"[committed] libstdc++: Do not use nullptr in C++03-compatible code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161826.510606-1-jwakely@redhat.com/mbox/"},{"id":1257,"url":"https://patchwork.plctlab.org/api/1.2/patches/1257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161857.510663-1-jwakely@redhat.com/","msgid":"<20220916161857.510663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:57","name":"[committed] libstdc++: Fix tr1::variate_generator::engine_value_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161857.510663-1-jwakely@redhat.com/mbox/"},{"id":1258,"url":"https://patchwork.plctlab.org/api/1.2/patches/1258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916184922.3274016-1-slyich@gmail.com/","msgid":"<20220916184922.3274016-1-slyich@gmail.com>","list_archive_url":null,"date":"2022-09-16T18:49:22","name":"gcc/config/t-i386: add build dependencies on i386-builtin-types.inc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916184922.3274016-1-slyich@gmail.com/mbox/"},{"id":1259,"url":"https://patchwork.plctlab.org/api/1.2/patches/1259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916202127.579816-1-jwakely@redhat.com/","msgid":"<20220916202127.579816-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T20:21:27","name":"[committed] libstdc++: Fix compare_exchange_padding.cc test for std::atomic_ref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916202127.579816-1-jwakely@redhat.com/mbox/"},{"id":1360,"url":"https://patchwork.plctlab.org/api/1.2/patches/1360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105053.E298E1346B@imap2.suse-dmz.suse.de/","msgid":"<20220922105053.E298E1346B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T10:50:53","name":"tree-optimization/99407 - DSE with data-ref analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105053.E298E1346B@imap2.suse-dmz.suse.de/mbox/"},{"id":1361,"url":"https://patchwork.plctlab.org/api/1.2/patches/1361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105533.1837026-1-jcmvbkbc@gmail.com/","msgid":"<20220922105533.1837026-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-09-22T10:55:33","name":"[COMMITTED] xtensa: gcc: enable section anchors support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105533.1837026-1-jcmvbkbc@gmail.com/mbox/"},{"id":1362,"url":"https://patchwork.plctlab.org/api/1.2/patches/1362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de/","msgid":"<20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T11:10:08","name":"tree-optimization/106922 - missed FRE/PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de/mbox/"},{"id":1363,"url":"https://patchwork.plctlab.org/api/1.2/patches/1363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz/","msgid":"<5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz>","list_archive_url":null,"date":"2022-09-22T11:10:46","name":"remove -gz=zlib-gnu option value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz/mbox/"},{"id":1364,"url":"https://patchwork.plctlab.org/api/1.2/patches/1364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz/","msgid":"<3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz>","list_archive_url":null,"date":"2022-09-22T12:26:39","name":"[v2] remove -gz=zlib-gnu option value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz/mbox/"},{"id":1365,"url":"https://patchwork.plctlab.org/api/1.2/patches/1365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz/","msgid":"<19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz>","list_archive_url":null,"date":"2022-09-22T12:51:05","name":"support -gz=zstd for both linker and assembler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz/mbox/"},{"id":1366,"url":"https://patchwork.plctlab.org/api/1.2/patches/1366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz/","msgid":"<8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz>","list_archive_url":null,"date":"2022-09-22T13:04:47","name":"[DOCS] changes: mentioned ignore -gz=zlib-gnu option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz/mbox/"},{"id":1367,"url":"https://patchwork.plctlab.org/api/1.2/patches/1367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de/","msgid":"<20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T13:19:38","name":"tree-optimization/102801 - testcase for uninit diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de/mbox/"},{"id":1368,"url":"https://patchwork.plctlab.org/api/1.2/patches/1368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVBpzhKda=cjGc5qo=bYESO_zcfpt3Ba6GUQNXNBPMLjA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T13:28:29","name":"libgo patch committed: Add cgo.Incomplete","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVBpzhKda=cjGc5qo=bYESO_zcfpt3Ba6GUQNXNBPMLjA@mail.gmail.com/mbox/"},{"id":1369,"url":"https://patchwork.plctlab.org/api/1.2/patches/1369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922133900.142238-1-polacek@redhat.com/","msgid":"<20220922133900.142238-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-22T13:39:00","name":"c++: Implement __is_{nothrow_,}convertible [PR106784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922133900.142238-1-polacek@redhat.com/mbox/"},{"id":1370,"url":"https://patchwork.plctlab.org/api/1.2/patches/1370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz/","msgid":"<744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz>","list_archive_url":null,"date":"2022-09-22T13:58:53","name":"opts: fix --help=common with '\''\\t'\'' description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz/mbox/"},{"id":1371,"url":"https://patchwork.plctlab.org/api/1.2/patches/1371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-1-jwakely@redhat.com/","msgid":"<20220922142353.1139862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:23:52","name":"[committed,1/2] libstdc++: Rearrange tests for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-1-jwakely@redhat.com/mbox/"},{"id":1372,"url":"https://patchwork.plctlab.org/api/1.2/patches/1372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-2-jwakely@redhat.com/","msgid":"<20220922142353.1139862-2-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:23:53","name":"[committed,2/2] libstdc++: Implement constexpr std::bitset for C++23 (P2417R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-2-jwakely@redhat.com/mbox/"},{"id":1373,"url":"https://patchwork.plctlab.org/api/1.2/patches/1373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142515.1140135-1-jwakely@redhat.com/","msgid":"<20220922142515.1140135-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:25:15","name":"[committed] libiberty: Refer to Bugzilla in README","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142515.1140135-1-jwakely@redhat.com/mbox/"},{"id":1374,"url":"https://patchwork.plctlab.org/api/1.2/patches/1374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMXYATzMsLq2-YSHfA+pFTrM376Fn=E3iQ=Z4N3FRu-EPA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T15:02:19","name":"TYPE_{MIN/MAX}_VALUE for floats?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMXYATzMsLq2-YSHfA+pFTrM376Fn=E3iQ=Z4N3FRu-EPA@mail.gmail.com/mbox/"},{"id":1375,"url":"https://patchwork.plctlab.org/api/1.2/patches/1375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyyFs7w3npTxkci7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-22T15:56:35","name":"[RFC] __trunc{tf,xf,df,sf,hf}bf2, __truncbfhf2 and __extendbfsf2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyyFs7w3npTxkci7@tucnak/mbox/"},{"id":1376,"url":"https://patchwork.plctlab.org/api/1.2/patches/1376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164057.4107373-1-torbjorn.svensson@foss.st.com/","msgid":"<20220922164057.4107373-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-22T16:40:58","name":"testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164057.4107373-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1377,"url":"https://patchwork.plctlab.org/api/1.2/patches/1377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164752.2566043-1-aldyh@redhat.com/","msgid":"<20220922164752.2566043-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:47:52","name":"Add debug functions for REAL_VALUE_TYPE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164752.2566043-1-aldyh@redhat.com/mbox/"},{"id":1379,"url":"https://patchwork.plctlab.org/api/1.2/patches/1379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-1-aldyh@redhat.com/","msgid":"<20220922164911.2566143-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:49:10","name":"frange: dump hex values when dumping FP numbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-1-aldyh@redhat.com/mbox/"},{"id":1378,"url":"https://patchwork.plctlab.org/api/1.2/patches/1378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-2-aldyh@redhat.com/","msgid":"<20220922164911.2566143-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:49:11","name":"frange: drop endpoints to min/max representable numbers for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-2-aldyh@redhat.com/mbox/"},{"id":1380,"url":"https://patchwork.plctlab.org/api/1.2/patches/1380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com/","msgid":"<0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com>","list_archive_url":null,"date":"2022-09-22T17:06:16","name":"[_GLIBCXX_DEBUG,_GLIBCXX_INLINE_VERSION] Add missing printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com/mbox/"},{"id":1381,"url":"https://patchwork.plctlab.org/api/1.2/patches/1381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922182502.3218391-1-ppalka@redhat.com/","msgid":"<20220922182502.3218391-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:25:02","name":"c++ modules: ICE with class NTTP argument [PR100616]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922182502.3218391-1-ppalka@redhat.com/mbox/"},{"id":1382,"url":"https://patchwork.plctlab.org/api/1.2/patches/1382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17227f0-cdcf-f25b-58fb-4ad2751ff772@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T18:53:24","name":"[01/17] Replace another snippet with a call to, gimple_range_ssa_names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17227f0-cdcf-f25b-58fb-4ad2751ff772@redhat.com/mbox/"},{"id":1383,"url":"https://patchwork.plctlab.org/api/1.2/patches/1383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com/","msgid":"<1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:55:20","name":"[02/17] Adjust range_op_handler to store the handler directly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com/mbox/"},{"id":1384,"url":"https://patchwork.plctlab.org/api/1.2/patches/1384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com/","msgid":"<6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:56:29","name":"[03/17] Create gimple_range_op_handler in a new source file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com/mbox/"},{"id":1385,"url":"https://patchwork.plctlab.org/api/1.2/patches/1385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc2b47bd-57ab-e9bf-50b0-cbdf89f976da@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T18:58:04","name":"[04/17] Fix calc_op1 for undefined op2_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc2b47bd-57ab-e9bf-50b0-cbdf89f976da@redhat.com/mbox/"},{"id":1386,"url":"https://patchwork.plctlab.org/api/1.2/patches/1386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com/","msgid":"<78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:59:22","name":"[05/17] Add missing float fold_range prototype for floats.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com/mbox/"},{"id":1387,"url":"https://patchwork.plctlab.org/api/1.2/patches/1387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com/","msgid":"<35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:00:27","name":"[06/17] Always check the return value of fold_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com/mbox/"},{"id":1388,"url":"https://patchwork.plctlab.org/api/1.2/patches/1388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com/","msgid":"<4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:01:37","name":"[07/17] Add range-ops support for builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com/mbox/"},{"id":1389,"url":"https://patchwork.plctlab.org/api/1.2/patches/1389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37539494-f250-1f45-1dbd-e3f82c296136@redhat.com/","msgid":"<37539494-f250-1f45-1dbd-e3f82c296136@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:02:23","name":"[08/17] Convert CFN_BUILT_IN_SIGNBIT to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37539494-f250-1f45-1dbd-e3f82c296136@redhat.com/mbox/"},{"id":1390,"url":"https://patchwork.plctlab.org/api/1.2/patches/1390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/99671c98-c81e-1fa3-b851-263492a54669@redhat.com/","msgid":"<99671c98-c81e-1fa3-b851-263492a54669@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:05:08","name":"[09/17] Convert CFN_BUILT_IN_TOUPPER and TOLOWER to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/99671c98-c81e-1fa3-b851-263492a54669@redhat.com/mbox/"},{"id":1391,"url":"https://patchwork.plctlab.org/api/1.2/patches/1391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21789ec-cfab-4503-410f-48bbd905d4c6@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:05:13","name":"[10/17] Convert CFN_BUILT_FFS and CFN_POPCOUNT to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21789ec-cfab-4503-410f-48bbd905d4c6@redhat.com/mbox/"},{"id":1392,"url":"https://patchwork.plctlab.org/api/1.2/patches/1392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2ad2282-85ff-da6b-970a-66e63c925957@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:05:19","name":"[11/17] Convert CFN_CLZ builtins to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2ad2282-85ff-da6b-970a-66e63c925957@redhat.com/mbox/"},{"id":1393,"url":"https://patchwork.plctlab.org/api/1.2/patches/1393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com/","msgid":"<622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:05:36","name":"[12/17] Convert CFN_CTZ builtins to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com/mbox/"},{"id":1395,"url":"https://patchwork.plctlab.org/api/1.2/patches/1395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffc36af1-4096-fba9-ae43-61e105b7e20d@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:06:14","name":"[13/17] Convert CFN_BUILT_IN_CLRSB to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffc36af1-4096-fba9-ae43-61e105b7e20d@redhat.com/mbox/"},{"id":1394,"url":"https://patchwork.plctlab.org/api/1.2/patches/1394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2f34a94-1eb8-07a6-f174-55246161e1a5@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:06:50","name":"[14/17] Convert CFN_BUILT_IN_UBSAN_CHECK_* to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2f34a94-1eb8-07a6-f174-55246161e1a5@redhat.com/mbox/"},{"id":1396,"url":"https://patchwork.plctlab.org/api/1.2/patches/1396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc889d03-0184-d34c-5d54-87f7c9763195@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:08:16","name":"[15/17] Convert CFN_BUILT_IN_STRLEN to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc889d03-0184-d34c-5d54-87f7c9763195@redhat.com/mbox/"},{"id":1397,"url":"https://patchwork.plctlab.org/api/1.2/patches/1397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a297a47e-cc9f-12b3-ab99-dd52f897e16a@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:10:07","name":"[16/17] Convert CFN_BUILT_IN_GOACC_DIM_* to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a297a47e-cc9f-12b3-ab99-dd52f897e16a@redhat.com/mbox/"},{"id":1398,"url":"https://patchwork.plctlab.org/api/1.2/patches/1398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d97e89ef-7296-3cf4-3e52-e9aedcbc7432@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:10:45","name":"[17/17] Convert CFN_BUILT_IN_PARITY to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d97e89ef-7296-3cf4-3e52-e9aedcbc7432@redhat.com/mbox/"},{"id":1399,"url":"https://patchwork.plctlab.org/api/1.2/patches/1399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy1Sjn8VA1HVBkB7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-23T06:30:38","name":"attribs: Improve diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy1Sjn8VA1HVBkB7@tucnak/mbox/"},{"id":1400,"url":"https://patchwork.plctlab.org/api/1.2/patches/1400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923064254.326775-1-hongtao.liu@intel.com/","msgid":"<20220923064254.326775-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-23T06:42:54","name":"[x86] Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_const_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923064254.326775-1-hongtao.liu@intel.com/mbox/"},{"id":1401,"url":"https://patchwork.plctlab.org/api/1.2/patches/1401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923084330.4131742-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923084330.4131742-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T08:43:31","name":"[testsuite,arm] Fix cmse-15.c expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923084330.4131742-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1402,"url":"https://patchwork.plctlab.org/api/1.2/patches/1402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16239-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:17:23","name":"[2/2] AArch64 Add support for neg on v1df","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16239-tamar@arm.com/mbox/"},{"id":1403,"url":"https://patchwork.plctlab.org/api/1.2/patches/1403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16259-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:18:14","name":"middle-end Recognize more conditional comparisons idioms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16259-tamar@arm.com/mbox/"},{"id":1404,"url":"https://patchwork.plctlab.org/api/1.2/patches/1404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15680-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:21:20","name":"middle-end fix floating out of constants in conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15680-tamar@arm.com/mbox/"},{"id":1405,"url":"https://patchwork.plctlab.org/api/1.2/patches/1405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16250-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:23:03","name":"[testsuite] : make check-functions-body dump expected and seen cases on failure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16250-tamar@arm.com/mbox/"},{"id":1406,"url":"https://patchwork.plctlab.org/api/1.2/patches/1406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16248-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:24:56","name":"[1/2] middle-end: RFC: On expansion of conditional branches, give hint if argument is a truth type to backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16248-tamar@arm.com/mbox/"},{"id":1407,"url":"https://patchwork.plctlab.org/api/1.2/patches/1407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy17hn8LsinOmJID@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:25:26","name":"[2/2] AArch64 Extend tbz pattern to allow SI to SI extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy17hn8LsinOmJID@arm.com/mbox/"},{"id":1408,"url":"https://patchwork.plctlab.org/api/1.2/patches/1408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15779-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:08","name":"[1/4] middle-end Support not decomposing specific divisions during vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15779-tamar@arm.com/mbox/"},{"id":1411,"url":"https://patchwork.plctlab.org/api/1.2/patches/1411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19Z/q/HPJ6wm5w@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:27","name":"[2/4] AArch64 Add implementation for pow2 bitmask division.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19Z/q/HPJ6wm5w@arm.com/mbox/"},{"id":1409,"url":"https://patchwork.plctlab.org/api/1.2/patches/1409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19es5TOyWlHsnk@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:46","name":"[3/4] AArch64 Add SVE2 implementation for pow2 bitmask division","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19es5TOyWlHsnk@arm.com/mbox/"},{"id":1410,"url":"https://patchwork.plctlab.org/api/1.2/patches/1410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19kZozCiweoBcT@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:34:09","name":"[4/4] AArch64 sve2: rewrite pack + NARROWB + NARROWB to NARROWB + NARROWT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19kZozCiweoBcT@arm.com/mbox/"},{"id":1412,"url":"https://patchwork.plctlab.org/api/1.2/patches/1412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8bae7c0-2c0a-7022-9b7b-8ca41ef01544@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T10:39:43","name":"[committed] MAINTAINERS: Add myself to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8bae7c0-2c0a-7022-9b7b-8ca41ef01544@codesourcery.com/mbox/"},{"id":1413,"url":"https://patchwork.plctlab.org/api/1.2/patches/1413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15776-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T11:42:12","name":"[1/2] middle-end Fold BIT_FIELD_REF and Shifts into BIT_FIELD_REFs alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15776-tamar@arm.com/mbox/"},{"id":1414,"url":"https://patchwork.plctlab.org/api/1.2/patches/1414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy2b1o/foRR6xvBZ@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T11:43:18","name":"[2/2] AArch64 Perform more late folding of reg moves and shifts which arrive after expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy2b1o/foRR6xvBZ@arm.com/mbox/"},{"id":1415,"url":"https://patchwork.plctlab.org/api/1.2/patches/1415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115838.1327654-1-jwakely@redhat.com/","msgid":"<20220923115838.1327654-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T11:58:38","name":"[committed] libstdc++: Optimize std::bitset::to_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115838.1327654-1-jwakely@redhat.com/mbox/"},{"id":1416,"url":"https://patchwork.plctlab.org/api/1.2/patches/1416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115950.1327715-1-jwakely@redhat.com/","msgid":"<20220923115950.1327715-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T11:59:50","name":"[committed] libstdc++: Enable constexpr std::bitset for debug mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115950.1327715-1-jwakely@redhat.com/mbox/"},{"id":1417,"url":"https://patchwork.plctlab.org/api/1.2/patches/1417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923120331.4136741-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923120331.4136741-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T12:03:32","name":"testsuite: Verify that module-mapper is avialable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923120331.4136741-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1418,"url":"https://patchwork.plctlab.org/api/1.2/patches/1418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923123258.176D213A00@imap2.suse-dmz.suse.de/","msgid":"<20220923123258.176D213A00@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-23T12:32:57","name":"tree-optimization/106922 - extend same-val clobber FRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923123258.176D213A00@imap2.suse-dmz.suse.de/mbox/"},{"id":1419,"url":"https://patchwork.plctlab.org/api/1.2/patches/1419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923125830.2715538-1-aldyh@redhat.com/","msgid":"<20220923125830.2715538-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-23T12:58:30","name":"[COMMITTED] frange: Make the setter taking trees a wrapper.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923125830.2715538-1-aldyh@redhat.com/mbox/"},{"id":1420,"url":"https://patchwork.plctlab.org/api/1.2/patches/1420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923135914.24219-1-soeren@soeren-tempel.net/","msgid":"<20220923135914.24219-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-09-23T13:59:14","name":"[v2] libgo: Portable access to thread ID in struct sigevent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923135914.24219-1-soeren@soeren-tempel.net/mbox/"},{"id":1421,"url":"https://patchwork.plctlab.org/api/1.2/patches/1421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923141522.1393426-1-jwakely@redhat.com/","msgid":"<20220923141522.1393426-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T14:15:22","name":"[committed] libstdc++: Micro-optimizaion for std::bitset stream extraction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923141522.1393426-1-jwakely@redhat.com/mbox/"},{"id":1422,"url":"https://patchwork.plctlab.org/api/1.2/patches/1422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b694809c-c969-1d8f-196b-589194312c02@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T15:24:23","name":"OpenACC: Fix reduction tree-sharing issue [PR106982]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b694809c-c969-1d8f-196b-589194312c02@codesourcery.com/mbox/"},{"id":1423,"url":"https://patchwork.plctlab.org/api/1.2/patches/1423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rmaqetf.fsf@euler.schwinge.homeip.net/","msgid":"<878rmaqetf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-09-23T15:40:44","name":"[og12] Come up with {,UN}LIKELY macros (was: [Patch][2/3][v2] nvptx: libgomp+mkoffload.cc: Prepare for reverse offload fn lookup)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rmaqetf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":1424,"url":"https://patchwork.plctlab.org/api/1.2/patches/1424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923154924.GA66899@adacore.com/","msgid":"<20220923154924.GA66899@adacore.com>","list_archive_url":null,"date":"2022-09-23T15:49:24","name":"Fix thinko in powerpc default specs for -mabi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923154924.GA66899@adacore.com/mbox/"},{"id":1425,"url":"https://patchwork.plctlab.org/api/1.2/patches/1425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184026.379494-1-polacek@redhat.com/","msgid":"<20220923184026.379494-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-23T18:40:26","name":"c++: Don'\''t quote nothrow in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184026.379494-1-polacek@redhat.com/mbox/"},{"id":1426,"url":"https://patchwork.plctlab.org/api/1.2/patches/1426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184344.4147951-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923184344.4147951-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T18:43:44","name":"Fix typo in chapter level for RISC-V attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184344.4147951-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1427,"url":"https://patchwork.plctlab.org/api/1.2/patches/1427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542E50C76592E21B7207AB491519@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T18:53:16","name":"Fix profile count comparison.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542E50C76592E21B7207AB491519@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1428,"url":"https://patchwork.plctlab.org/api/1.2/patches/1428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209232123240.183299@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-23T21:24:07","name":"[committed] testsuite: Add more C2x tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209232123240.183299@digraph.polyomino.org.uk/mbox/"},{"id":1429,"url":"https://patchwork.plctlab.org/api/1.2/patches/1429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000747.1717312-1-jwakely@redhat.com/","msgid":"<20220924000747.1717312-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T00:07:47","name":"[committed] libstdc++: Fix std::is_nothrow_invocable_r for uncopyable prvalues [PR91456]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000747.1717312-1-jwakely@redhat.com/mbox/"},{"id":1430,"url":"https://patchwork.plctlab.org/api/1.2/patches/1430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000753.1717363-1-jwakely@redhat.com/","msgid":"<20220924000753.1717363-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T00:07:53","name":"[committed] libstdc++: Add test for type traits not having friend access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000753.1717363-1-jwakely@redhat.com/mbox/"},{"id":1431,"url":"https://patchwork.plctlab.org/api/1.2/patches/1431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924011611.433106-1-polacek@redhat.com/","msgid":"<20220924011611.433106-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-24T01:16:11","name":"c++: P2513R4, char8_t Compatibility and Portability Fix [PR106656]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924011611.433106-1-polacek@redhat.com/mbox/"},{"id":1432,"url":"https://patchwork.plctlab.org/api/1.2/patches/1432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924124722.1946365-1-xry111@xry111.site/","msgid":"<20220924124722.1946365-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-24T12:47:22","name":"LoongArch: Use UNSPEC for fmin/fmax RTL pattern [PR105414]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924124722.1946365-1-xry111@xry111.site/mbox/"},{"id":1433,"url":"https://patchwork.plctlab.org/api/1.2/patches/1433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924141912.1892292-1-jwakely@redhat.com/","msgid":"<20220924141912.1892292-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T14:19:12","name":"[committed] libstdc++: Simplify detection idiom using concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924141912.1892292-1-jwakely@redhat.com/mbox/"},{"id":1434,"url":"https://patchwork.plctlab.org/api/1.2/patches/1434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220925112537.2209847-1-xry111@xry111.site/","msgid":"<20220925112537.2209847-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-25T11:25:37","name":"LoongArch: Add prefetch instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220925112537.2209847-1-xry111@xry111.site/mbox/"},{"id":1435,"url":"https://patchwork.plctlab.org/api/1.2/patches/1435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada747e8-6ba5-70f9-f7a8-eb1685b3b09b@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-09-25T16:28:55","name":"[RFA] Minor improvement to coremark, avoid unconditional jump to return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada747e8-6ba5-70f9-f7a8-eb1685b3b09b@ventanamicro.com/mbox/"},{"id":1436,"url":"https://patchwork.plctlab.org/api/1.2/patches/1436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7af00afc-50de-4985-97b2-100ac2a7285b-1664139876212@3c-app-gmx-bap15/","msgid":"","list_archive_url":null,"date":"2022-09-25T21:04:36","name":"Proxy ping [PATCH] Fortran: Fix ICE and wrong code for assumed-rank arrays [PR100029, PR100040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7af00afc-50de-4985-97b2-100ac2a7285b-1664139876212@3c-app-gmx-bap15/mbox/"},{"id":1437,"url":"https://patchwork.plctlab.org/api/1.2/patches/1437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020010.779566-1-chenglulu@loongson.cn/","msgid":"<20220926020010.779566-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-26T02:00:10","name":"LoongArch: Libvtv add LoongArch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020010.779566-1-chenglulu@loongson.cn/mbox/"},{"id":1438,"url":"https://patchwork.plctlab.org/api/1.2/patches/1438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020504.791159-1-chenglulu@loongson.cn/","msgid":"<20220926020504.791159-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-26T02:05:04","name":"LoongArch: Libitm add LoongArch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020504.791159-1-chenglulu@loongson.cn/mbox/"},{"id":1439,"url":"https://patchwork.plctlab.org/api/1.2/patches/1439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926031434.47605-1-hongtao.liu@intel.com/","msgid":"<20220926031434.47605-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-26T03:14:34","name":"[x86] Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_const_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926031434.47605-1-hongtao.liu@intel.com/mbox/"},{"id":1440,"url":"https://patchwork.plctlab.org/api/1.2/patches/1440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com/","msgid":"<1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com>","list_archive_url":null,"date":"2022-09-26T03:35:28","name":"[v7,rs6000] Implemented f[min/max]_optab by xs[min/max]dp [PR103605]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com/mbox/"},{"id":1441,"url":"https://patchwork.plctlab.org/api/1.2/patches/1441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926051937.729321-1-lin1.hu@intel.com/","msgid":"<20220926051937.729321-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2022-09-26T05:19:37","name":"testsuite: Fix up avx256-unaligned-store-3.c test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926051937.729321-1-lin1.hu@intel.com/mbox/"},{"id":1442,"url":"https://patchwork.plctlab.org/api/1.2/patches/1442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065604.783193-1-liwei.xu@intel.com/","msgid":"<20220926065604.783193-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-09-26T06:56:04","name":"Optimize nested permutation to single VEC_PERM_EXPR [PR54346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065604.783193-1-liwei.xu@intel.com/mbox/"},{"id":1443,"url":"https://patchwork.plctlab.org/api/1.2/patches/1443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065805.15717-1-xry111@xry111.site/","msgid":"<20220926065805.15717-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-26T06:58:05","name":"LoongArch: Pass cache information to optimizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065805.15717-1-xry111@xry111.site/mbox/"},{"id":1444,"url":"https://patchwork.plctlab.org/api/1.2/patches/1444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1836c77d-56f0-fd92-6453-9978b246c969@suse.cz/","msgid":"<1836c77d-56f0-fd92-6453-9978b246c969@suse.cz>","list_archive_url":null,"date":"2022-09-26T07:46:25","name":"[pushed] ranger: remove unused function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1836c77d-56f0-fd92-6453-9978b246c969@suse.cz/mbox/"},{"id":1463,"url":"https://patchwork.plctlab.org/api/1.2/patches/1463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzFjMj+hcggRdc8F@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-26T08:30:44","name":"reassoc: Handle OFFSET_TYPE like POINTER_TYPE in optimize_range_tests_cmp_bitwise [PR107029[","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzFjMj+hcggRdc8F@tucnak/mbox/"},{"id":1445,"url":"https://patchwork.plctlab.org/api/1.2/patches/1445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091315.272096-1-poulhies@adacore.com/","msgid":"<20220926091315.272096-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:15","name":"[COMMITED] ada: Tune comment of routine for detecting junk names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091315.272096-1-poulhies@adacore.com/mbox/"},{"id":1447,"url":"https://patchwork.plctlab.org/api/1.2/patches/1447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091326.272406-1-poulhies@adacore.com/","msgid":"<20220926091326.272406-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:26","name":"[COMMITED] ada: Deconstruct build support for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091326.272406-1-poulhies@adacore.com/mbox/"},{"id":1446,"url":"https://patchwork.plctlab.org/api/1.2/patches/1446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091333.272502-1-poulhies@adacore.com/","msgid":"<20220926091333.272502-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:33","name":"[COMMITED] ada: Remove definition of MAXPATHLEN for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091333.272502-1-poulhies@adacore.com/mbox/"},{"id":1449,"url":"https://patchwork.plctlab.org/api/1.2/patches/1449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091341.272596-1-poulhies@adacore.com/","msgid":"<20220926091341.272596-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:41","name":"[COMMITED] ada: Remove socket definitions for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091341.272596-1-poulhies@adacore.com/mbox/"},{"id":1448,"url":"https://patchwork.plctlab.org/api/1.2/patches/1448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091437.272873-1-poulhies@adacore.com/","msgid":"<20220926091437.272873-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:37","name":"[COMMITED] ada: Improve accessibility check generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091437.272873-1-poulhies@adacore.com/mbox/"},{"id":1451,"url":"https://patchwork.plctlab.org/api/1.2/patches/1451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091453.273010-1-poulhies@adacore.com/","msgid":"<20220926091453.273010-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:53","name":"[COMMITED] ada: Only reject volatile ghost objects when SPARK_Mode is On","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091453.273010-1-poulhies@adacore.com/mbox/"},{"id":1450,"url":"https://patchwork.plctlab.org/api/1.2/patches/1450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091458.273107-1-poulhies@adacore.com/","msgid":"<20220926091458.273107-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:58","name":"[COMMITED] ada: Delay expansion of iterated component association","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091458.273107-1-poulhies@adacore.com/mbox/"},{"id":1454,"url":"https://patchwork.plctlab.org/api/1.2/patches/1454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091505.273202-1-poulhies@adacore.com/","msgid":"<20220926091505.273202-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:05","name":"[COMMITED] ada: Delay expansion of iterator specification in preanalysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091505.273202-1-poulhies@adacore.com/mbox/"},{"id":1456,"url":"https://patchwork.plctlab.org/api/1.2/patches/1456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091511.273296-1-poulhies@adacore.com/","msgid":"<20220926091511.273296-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:11","name":"[COMMITED] ada: Make Original_Aspect_Pragma_Name more precise","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091511.273296-1-poulhies@adacore.com/mbox/"},{"id":1453,"url":"https://patchwork.plctlab.org/api/1.2/patches/1453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091516.273390-1-poulhies@adacore.com/","msgid":"<20220926091516.273390-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:16","name":"[COMMITED] ada: Document support for the mold linker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091516.273390-1-poulhies@adacore.com/mbox/"},{"id":1455,"url":"https://patchwork.plctlab.org/api/1.2/patches/1455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091522.273508-1-poulhies@adacore.com/","msgid":"<20220926091522.273508-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:22","name":"[COMMITED] ada: Improve CUDA host-side and device-side binder support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091522.273508-1-poulhies@adacore.com/mbox/"},{"id":1452,"url":"https://patchwork.plctlab.org/api/1.2/patches/1452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091526.273603-1-poulhies@adacore.com/","msgid":"<20220926091526.273603-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:26","name":"[COMMITED] ada: Document Long_Long_Long_Size parameter for -gnateT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091526.273603-1-poulhies@adacore.com/mbox/"},{"id":1458,"url":"https://patchwork.plctlab.org/api/1.2/patches/1458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091531.273721-1-poulhies@adacore.com/","msgid":"<20220926091531.273721-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:31","name":"[COMMITED] ada: Remove unreferenced C macro from OS constants template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091531.273721-1-poulhies@adacore.com/mbox/"},{"id":1457,"url":"https://patchwork.plctlab.org/api/1.2/patches/1457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091537.273815-1-poulhies@adacore.com/","msgid":"<20220926091537.273815-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:37","name":"[COMMITED] ada: Remove unreferenced Rtsfind entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091537.273815-1-poulhies@adacore.com/mbox/"},{"id":1460,"url":"https://patchwork.plctlab.org/api/1.2/patches/1460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091542.273909-1-poulhies@adacore.com/","msgid":"<20220926091542.273909-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:42","name":"[COMMITED] ada: Fix location of pragmas coming from aspects in top-level instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091542.273909-1-poulhies@adacore.com/mbox/"},{"id":1459,"url":"https://patchwork.plctlab.org/api/1.2/patches/1459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091626.274146-1-poulhies@adacore.com/","msgid":"<20220926091626.274146-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:16:26","name":"[COMMITED] ada: Doc: rename Valid_Image to Valid_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091626.274146-1-poulhies@adacore.com/mbox/"},{"id":1461,"url":"https://patchwork.plctlab.org/api/1.2/patches/1461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091739.274489-1-poulhies@adacore.com/","msgid":"<20220926091739.274489-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:17:39","name":"[COMMITED] ada: Remove GNATmetric'\''s documentation from GNAT'\''s documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091739.274489-1-poulhies@adacore.com/mbox/"},{"id":1462,"url":"https://patchwork.plctlab.org/api/1.2/patches/1462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz/","msgid":"<72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz>","list_archive_url":null,"date":"2022-09-26T10:07:56","name":"[pushed] s390: fix wrong refactoring","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz/mbox/"},{"id":1464,"url":"https://patchwork.plctlab.org/api/1.2/patches/1464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926121759.3179767-1-aldyh@redhat.com/","msgid":"<20220926121759.3179767-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-26T12:18:00","name":"[PR107009] Set ranges from unreachable edges for all known ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926121759.3179767-1-aldyh@redhat.com/mbox/"},{"id":1465,"url":"https://patchwork.plctlab.org/api/1.2/patches/1465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926125953.2149422-1-jwakely@redhat.com/","msgid":"<20220926125953.2149422-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T12:59:53","name":"[committed] libstdc++: Add #if around non-C++03 code in std::bitset [PR107037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926125953.2149422-1-jwakely@redhat.com/mbox/"},{"id":1466,"url":"https://patchwork.plctlab.org/api/1.2/patches/1466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926143620.24037-1-ppalka@redhat.com/","msgid":"<20220926143620.24037-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-26T14:36:20","name":"c++ modules: variable template partial spec fixes [PR107033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926143620.24037-1-ppalka@redhat.com/mbox/"},{"id":1467,"url":"https://patchwork.plctlab.org/api/1.2/patches/1467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com/","msgid":"<1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com>","list_archive_url":null,"date":"2022-09-26T15:16:44","name":"Update my email address and DCO entry in MAINTAINERS file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com/mbox/"},{"id":1468,"url":"https://patchwork.plctlab.org/api/1.2/patches/1468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com/","msgid":"<645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com>","list_archive_url":null,"date":"2022-09-26T15:20:53","name":"Update for gcc steering committee page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com/mbox/"},{"id":1469,"url":"https://patchwork.plctlab.org/api/1.2/patches/1469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926152258.20921-1-polacek@redhat.com/","msgid":"<20220926152258.20921-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-26T15:22:58","name":"c++: Instantiate less when evaluating __is_convertible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926152258.20921-1-polacek@redhat.com/mbox/"},{"id":1470,"url":"https://patchwork.plctlab.org/api/1.2/patches/1470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHSgNWwCii2jawR@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-26T16:25:36","name":"[v2] c++: Instantiate less when evaluating __is_convertible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHSgNWwCii2jawR@redhat.com/mbox/"},{"id":1471,"url":"https://patchwork.plctlab.org/api/1.2/patches/1471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHVB2eFlmeaIZoO@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-26T16:36:23","name":"openmp: Add OpenMP assume, assumes and begin/end assumes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHVB2eFlmeaIZoO@tucnak/mbox/"},{"id":1472,"url":"https://patchwork.plctlab.org/api/1.2/patches/1472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926172441.3219466-1-aldyh@redhat.com/","msgid":"<20220926172441.3219466-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-26T17:24:41","name":"[COMMITTED] Optimize [0 = x & MASK] in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926172441.3219466-1-aldyh@redhat.com/mbox/"},{"id":1473,"url":"https://patchwork.plctlab.org/api/1.2/patches/1473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz/","msgid":"<073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz>","list_archive_url":null,"date":"2022-09-26T19:05:20","name":"[pushed] docs: add missing dash in option name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz/mbox/"},{"id":1474,"url":"https://patchwork.plctlab.org/api/1.2/patches/1474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzIDZSRNR65/L5zu@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-26T19:54:13","name":"[v2] c++: Don'\''t quote nothrow in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzIDZSRNR65/L5zu@redhat.com/mbox/"},{"id":1475,"url":"https://patchwork.plctlab.org/api/1.2/patches/1475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926222725.GA19652@ldh-imac.local/","msgid":"<20220926222725.GA19652@ldh-imac.local>","list_archive_url":null,"date":"2022-09-26T22:27:25","name":"Ping^3: [PATCH] libcpp: Handle extended characters in user-defined literal suffix [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926222725.GA19652@ldh-imac.local/mbox/"},{"id":1477,"url":"https://patchwork.plctlab.org/api/1.2/patches/1477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224904.2235882-1-jwakely@redhat.com/","msgid":"<20220926224904.2235882-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T22:49:04","name":"[committed] libstdc++: Use new built-ins for std::is_convertible traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224904.2235882-1-jwakely@redhat.com/mbox/"},{"id":1476,"url":"https://patchwork.plctlab.org/api/1.2/patches/1476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224909.2235959-1-jwakely@redhat.com/","msgid":"<20220926224909.2235959-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T22:49:09","name":"[committed] libstdc++: Update std::pointer_traits to match new LWG 3545 wording","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224909.2235959-1-jwakely@redhat.com/mbox/"},{"id":1478,"url":"https://patchwork.plctlab.org/api/1.2/patches/1478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-2-iii@linux.ibm.com/","msgid":"<20220927002334.651057-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2022-09-27T00:23:33","name":"[v5,1/2] asan: specify alignment for LASANPC labels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-2-iii@linux.ibm.com/mbox/"},{"id":1479,"url":"https://patchwork.plctlab.org/api/1.2/patches/1479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-3-iii@linux.ibm.com/","msgid":"<20220927002334.651057-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2022-09-27T00:23:34","name":"[v5,2/2] IBM zSystems: Define CODE_LABEL_BOUNDARY","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-3-iii@linux.ibm.com/mbox/"},{"id":1480,"url":"https://patchwork.plctlab.org/api/1.2/patches/1480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4086807d-97d1-ec58-1617-24dda537010a@gmail.com/","msgid":"<4086807d-97d1-ec58-1617-24dda537010a@gmail.com>","list_archive_url":null,"date":"2022-09-27T01:12:23","name":"libgompd: Add thread handles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4086807d-97d1-ec58-1617-24dda537010a@gmail.com/mbox/"},{"id":1481,"url":"https://patchwork.plctlab.org/api/1.2/patches/1481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927031639.186950-1-chenglulu@loongson.cn/","msgid":"<20220927031639.186950-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T03:16:39","name":"Libvtv-test: Fix the problem that scansarif.exp cannot be found in libvtv regression test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927031639.186950-1-chenglulu@loongson.cn/mbox/"},{"id":1482,"url":"https://patchwork.plctlab.org/api/1.2/patches/1482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927060228.573975-1-chenglulu@loongson.cn/","msgid":"<20220927060228.573975-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T06:02:28","name":"[v2] Libvtv-test: Fix bug that scansarif.exp cannot be found in libvtv regression test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927060228.573975-1-chenglulu@loongson.cn/mbox/"},{"id":1483,"url":"https://patchwork.plctlab.org/api/1.2/patches/1483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com/","msgid":"<86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com>","list_archive_url":null,"date":"2022-09-27T06:19:16","name":"[committed] Fix ICE'\''s due to jump-to-return optimization changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com/mbox/"},{"id":1488,"url":"https://patchwork.plctlab.org/api/1.2/patches/1488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927074928.804896-1-chenglulu@loongson.cn/","msgid":"<20220927074928.804896-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T07:49:29","name":"[v2] LoongArch: Libvtv add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927074928.804896-1-chenglulu@loongson.cn/mbox/"},{"id":1484,"url":"https://patchwork.plctlab.org/api/1.2/patches/1484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084453.3409529-1-aldyh@redhat.com/","msgid":"<20220927084453.3409529-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T08:44:53","name":"[COMMITTED] Add an irange setter for wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084453.3409529-1-aldyh@redhat.com/mbox/"},{"id":1485,"url":"https://patchwork.plctlab.org/api/1.2/patches/1485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzK4JeacvF923uZd@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-27T08:45:25","name":"[RFC] libstdc++: Partial library support for std::float{16,32,64,128}_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzK4JeacvF923uZd@tucnak/mbox/"},{"id":1486,"url":"https://patchwork.plctlab.org/api/1.2/patches/1486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084606.3409637-1-aldyh@redhat.com/","msgid":"<20220927084606.3409637-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T08:46:06","name":"[COMMITTED] irange: keep better track of powers of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084606.3409637-1-aldyh@redhat.com/mbox/"},{"id":1487,"url":"https://patchwork.plctlab.org/api/1.2/patches/1487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927092608.228176-1-juzhe.zhong@rivai.ai/","msgid":"<20220927092608.228176-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-27T09:26:08","name":"RISC-V: Add ABI-defined RVV types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927092608.228176-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1489,"url":"https://patchwork.plctlab.org/api/1.2/patches/1489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927103510.2321453-1-jwakely@redhat.com/","msgid":"<20220927103510.2321453-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-27T10:35:10","name":"c++: Make __is_{, nothrow_}convertible SFINAE on access [PR107049]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927103510.2321453-1-jwakely@redhat.com/mbox/"},{"id":1490,"url":"https://patchwork.plctlab.org/api/1.2/patches/1490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzLSIMAZZhPejSzT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-27T10:36:16","name":"[committed] fixincludes: FIx up for Debian/Ubuntu includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzLSIMAZZhPejSzT@tucnak/mbox/"},{"id":1491,"url":"https://patchwork.plctlab.org/api/1.2/patches/1491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927110013.2378598-1-jwakely@redhat.com/","msgid":"<20220927110013.2378598-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-27T11:00:13","name":"[committed] libstdc++: Adjust deduction guides for static operator() [PR106651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927110013.2378598-1-jwakely@redhat.com/mbox/"},{"id":1492,"url":"https://patchwork.plctlab.org/api/1.2/patches/1492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927144019.194796-1-torbjorn.svensson@foss.st.com/","msgid":"<20220927144019.194796-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-27T14:40:20","name":"testsuite: Skip intrinsics test if arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927144019.194796-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1493,"url":"https://patchwork.plctlab.org/api/1.2/patches/1493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927150131.3487543-1-aldyh@redhat.com/","msgid":"<20220927150131.3487543-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T15:01:31","name":"[COMMITTED] range-ops: Calculate the popcount of a singleton.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927150131.3487543-1-aldyh@redhat.com/mbox/"},{"id":1494,"url":"https://patchwork.plctlab.org/api/1.2/patches/1494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927151214.1082396-1-andrea.corallo@arm.com/","msgid":"<20220927151214.1082396-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-09-27T15:12:14","name":"Don'\''t ICE running selftests if errors were raised [PR99723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927151214.1082396-1-andrea.corallo@arm.com/mbox/"},{"id":1495,"url":"https://patchwork.plctlab.org/api/1.2/patches/1495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV8j=NpiABvshLg0FOZm+pk44B8FH1+ejFgpxX+6=ZbUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T16:28:59","name":"libgo patch committed: Synchronize empty struct field handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV8j=NpiABvshLg0FOZm+pk44B8FH1+ejFgpxX+6=ZbUA@mail.gmail.com/mbox/"},{"id":1496,"url":"https://patchwork.plctlab.org/api/1.2/patches/1496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-00fca6df-5ba0-4282-afff-39debc94a9ae-1664305529428@3c-app-gmx-bap61/","msgid":"","list_archive_url":null,"date":"2022-09-27T19:05:29","name":"Fortran: error recovery while simplifying intrinsic UNPACK [PR107054]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-00fca6df-5ba0-4282-afff-39debc94a9ae-1664305529428@3c-app-gmx-bap61/mbox/"},{"id":1497,"url":"https://patchwork.plctlab.org/api/1.2/patches/1497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-1-ppalka@redhat.com/","msgid":"<20220927195030.2024439-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-27T19:50:29","name":"[1/2] c++: introduce TRAIT_TYPE alongside TRAIT_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-1-ppalka@redhat.com/mbox/"},{"id":1498,"url":"https://patchwork.plctlab.org/api/1.2/patches/1498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-2-ppalka@redhat.com/","msgid":"<20220927195030.2024439-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-27T19:50:30","name":"[2/2] c++: implement __remove_cv, __remove_reference and __remove_cvref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-2-ppalka@redhat.com/mbox/"},{"id":1499,"url":"https://patchwork.plctlab.org/api/1.2/patches/1499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f41501c6-4a9a-6dc0-7224-0f9a721a0765@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T19:53:56","name":"[RFA] Avoid unnecessary load-immediate in coremark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f41501c6-4a9a-6dc0-7224-0f9a721a0765@ventanamicro.com/mbox/"},{"id":1500,"url":"https://patchwork.plctlab.org/api/1.2/patches/1500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzNcYqVuH+FsC8Wh@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T20:26:10","name":"[v3] c++: Implement C++23 P2266R1, Simpler implicit move [PR101165]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzNcYqVuH+FsC8Wh@redhat.com/mbox/"},{"id":1501,"url":"https://patchwork.plctlab.org/api/1.2/patches/1501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927233454.144656-1-hjl.tools@gmail.com/","msgid":"<20220927233454.144656-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-09-27T23:34:54","name":"i386: Mark XMM4-XMM6 as clobbered by encodekey128/encodekey256","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927233454.144656-1-hjl.tools@gmail.com/mbox/"},{"id":1502,"url":"https://patchwork.plctlab.org/api/1.2/patches/1502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354209704F36E049F69EFBB091549@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T00:39:18","name":"[PUSHED] Fix AutoFDO tests to not look for hot/cold splitting.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354209704F36E049F69EFBB091549@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1503,"url":"https://patchwork.plctlab.org/api/1.2/patches/1503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com/","msgid":"<9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com>","list_archive_url":null,"date":"2022-09-28T05:30:46","name":"rs6000: Rework option -mpowerpc64 handling [PR106680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com/mbox/"},{"id":1504,"url":"https://patchwork.plctlab.org/api/1.2/patches/1504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35ccvwem.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T06:35:29","name":"Add OPTIONS_H_EXTRA to GTFILES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35ccvwem.fsf@arm.com/mbox/"},{"id":1505,"url":"https://patchwork.plctlab.org/api/1.2/patches/1505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f071b915-d4ce-a7c2-beb1-3b8c634d8985@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T07:39:44","name":"[wwwdocs] gcc-13/changes.html: Add nvptx'\''s --with-arch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f071b915-d4ce-a7c2-beb1-3b8c634d8985@codesourcery.com/mbox/"},{"id":1506,"url":"https://patchwork.plctlab.org/api/1.2/patches/1506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com/","msgid":"<98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T08:31:20","name":"[committed] libgomp.texi: Status '\''P'\'' for '\''assume'\'', remove duplicated line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com/mbox/"},{"id":1507,"url":"https://patchwork.plctlab.org/api/1.2/patches/1507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928121926.13280-1-andrea.corallo@arm.com/","msgid":"<20220928121926.13280-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-09-28T12:19:26","name":"arm: Define __ARM_FEATURE_AES and __ARM_FEATURE_SHA2 when march +crypto is selected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928121926.13280-1-andrea.corallo@arm.com/mbox/"},{"id":1508,"url":"https://patchwork.plctlab.org/api/1.2/patches/1508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928132024.64984-1-julian@codesourcery.com/","msgid":"<20220928132024.64984-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T13:20:24","name":"OpenACC: whole struct vs. component mappings (PR107028)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928132024.64984-1-julian@codesourcery.com/mbox/"},{"id":1509,"url":"https://patchwork.plctlab.org/api/1.2/patches/1509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com/","msgid":"<87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T15:05:38","name":"vect: while_ult for integer mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com/mbox/"},{"id":1510,"url":"https://patchwork.plctlab.org/api/1.2/patches/1510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzSQP8RpiJBScioT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-28T18:19:43","name":"fixincludes: Fix up powerpc floatn.h tweaks [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzSQP8RpiJBScioT@tucnak/mbox/"},{"id":1511,"url":"https://patchwork.plctlab.org/api/1.2/patches/1511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1355b5b-71cc-6726-c4e2-c1828d7a5850@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T20:42:01","name":"Fix gdb printers for std::string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1355b5b-71cc-6726-c4e2-c1828d7a5850@gmail.com/mbox/"},{"id":1512,"url":"https://patchwork.plctlab.org/api/1.2/patches/1512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e990a883-f6c0-7993-ae17-47be8f999a74@acm.org/","msgid":"","list_archive_url":null,"date":"2022-09-28T20:44:29","name":"c++: Add DECL_NTTP_OBJECT_P lang flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e990a883-f6c0-7993-ae17-47be8f999a74@acm.org/mbox/"},{"id":1513,"url":"https://patchwork.plctlab.org/api/1.2/patches/1513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928211501.2647123-1-guillermo.e.martinez@oracle.com/","msgid":"<20220928211501.2647123-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-09-28T21:15:01","name":"[v2] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928211501.2647123-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":1514,"url":"https://patchwork.plctlab.org/api/1.2/patches/1514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928212634.1275032-1-polacek@redhat.com/","msgid":"<20220928212634.1275032-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-28T21:26:34","name":"c++: Remove maybe-rvalue OR in implicit move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928212634.1275032-1-polacek@redhat.com/mbox/"},{"id":1515,"url":"https://patchwork.plctlab.org/api/1.2/patches/1515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233554.2670010-1-jwakely@redhat.com/","msgid":"<20220928233554.2670010-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-28T23:35:54","name":"[committed] libstdc++: Make INVOKE refuse to create dangling references [PR70692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233554.2670010-1-jwakely@redhat.com/mbox/"},{"id":1516,"url":"https://patchwork.plctlab.org/api/1.2/patches/1516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233634.2670028-1-jwakely@redhat.com/","msgid":"<20220928233634.2670028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-28T23:36:34","name":"[committed] libstdc++: Disable volatile-qualified std::bind for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233634.2670028-1-jwakely@redhat.com/mbox/"},{"id":1517,"url":"https://patchwork.plctlab.org/api/1.2/patches/1517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929050051.30330-1-hongtao.liu@intel.com/","msgid":"<20220929050051.30330-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-29T05:00:51","name":"Check nonlinear iv in vect_can_advance_ivs_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929050051.30330-1-hongtao.liu@intel.com/mbox/"},{"id":1518,"url":"https://patchwork.plctlab.org/api/1.2/patches/1518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVECKV7e5nDSA0S@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T07:06:48","name":"driver, cppdefault: Unbreak bootstrap on Debian/Ubuntu [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVECKV7e5nDSA0S@tucnak/mbox/"},{"id":1519,"url":"https://patchwork.plctlab.org/api/1.2/patches/1519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091021.359477-1-poulhies@adacore.com/","msgid":"<20220929091021.359477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:10:21","name":"[COMMITED] ada: Fix checking of Refined_State with nested package renamings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091021.359477-1-poulhies@adacore.com/mbox/"},{"id":1520,"url":"https://patchwork.plctlab.org/api/1.2/patches/1520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091050.359634-1-poulhies@adacore.com/","msgid":"<20220929091050.359634-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:10:50","name":"[COMMITED] ada: Improve efficiency of slice-of-component assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091050.359634-1-poulhies@adacore.com/mbox/"},{"id":1521,"url":"https://patchwork.plctlab.org/api/1.2/patches/1521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091106.359762-1-poulhies@adacore.com/","msgid":"<20220929091106.359762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:11:06","name":"[COMMITED] ada: Further tweak new expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091106.359762-1-poulhies@adacore.com/mbox/"},{"id":1522,"url":"https://patchwork.plctlab.org/api/1.2/patches/1522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091119.359856-1-poulhies@adacore.com/","msgid":"<20220929091119.359856-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:11:19","name":"[COMMITED] ada: Remove duplicated doc comment section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091119.359856-1-poulhies@adacore.com/mbox/"},{"id":1523,"url":"https://patchwork.plctlab.org/api/1.2/patches/1523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVtB20h3jGKmYg1@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:01:43","name":"i386, rs6000, ia64, s390: Fix C++ ICEs with _Float64x or _Float128 [PR107080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVtB20h3jGKmYg1@tucnak/mbox/"},{"id":1524,"url":"https://patchwork.plctlab.org/api/1.2/patches/1524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5569bd4-c7b5-8802-7a0b-4730a229a7e7@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:28:05","name":"[v2,DOCS] changes: mentioned ignore -gz=zlib-gnu option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5569bd4-c7b5-8802-7a0b-4730a229a7e7@suse.cz/mbox/"},{"id":1525,"url":"https://patchwork.plctlab.org/api/1.2/patches/1525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleq2tqfs.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:39:35","name":"[01/17] aarch64: Rename AARCH64_ISA architecture-level macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleq2tqfs.fsf@arm.com/mbox/"},{"id":1526,"url":"https://patchwork.plctlab.org/api/1.2/patches/1526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth70qtqfh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:39:46","name":"[02/17] aarch64: Rename AARCH64_FL architecture-level macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth70qtqfh.fsf@arm.com/mbox/"},{"id":1528,"url":"https://patchwork.plctlab.org/api/1.2/patches/1528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbetqf1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:02","name":"[03/17] aarch64: Rename AARCH64_FL_FOR_ARCH macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbetqf1.fsf@arm.com/mbox/"},{"id":1527,"url":"https://patchwork.plctlab.org/api/1.2/patches/1527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rm2tqeo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:15","name":"[04/17] aarch64: Add \"V\" to aarch64-arches.def names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rm2tqeo.fsf@arm.com/mbox/"},{"id":1529,"url":"https://patchwork.plctlab.org/api/1.2/patches/1529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jwqtqeb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:28","name":"[05/17] aarch64: Small config.gcc cleanups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jwqtqeb.fsf@arm.com/mbox/"},{"id":1531,"url":"https://patchwork.plctlab.org/api/1.2/patches/1531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgeisbti.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:41","name":"[06/17] aarch64: Avoid redundancy in aarch64-cores.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgeisbti.fsf@arm.com/mbox/"},{"id":1530,"url":"https://patchwork.plctlab.org/api/1.2/patches/1530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8p6sbt6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:53","name":"[07/17] aarch64: Remove AARCH64_FL_RCPC8_4 [PR107025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8p6sbt6.fsf@arm.com/mbox/"},{"id":1534,"url":"https://patchwork.plctlab.org/api/1.2/patches/1534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0zusbst.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:06","name":"[08/17] aarch64: Fix transitive closure of features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0zusbst.fsf@arm.com/mbox/"},{"id":1532,"url":"https://patchwork.plctlab.org/api/1.2/patches/1532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmtaisbsh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:18","name":"[09/17] aarch64: Reorder an entry in aarch64-option-extensions.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmtaisbsh.fsf@arm.com/mbox/"},{"id":1536,"url":"https://patchwork.plctlab.org/api/1.2/patches/1536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6sbs2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:33","name":"[10/17] aarch64: Simplify feature definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6sbs2.fsf@arm.com/mbox/"},{"id":1539,"url":"https://patchwork.plctlab.org/api/1.2/patches/1539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedvusbrq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:45","name":"[11/17] aarch64: Simplify generation of .arch strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedvusbrq.fsf@arm.com/mbox/"},{"id":1533,"url":"https://patchwork.plctlab.org/api/1.2/patches/1533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta66isbre.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:57","name":"[12/17] aarch64: Avoid std::string in static data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta66isbre.fsf@arm.com/mbox/"},{"id":1540,"url":"https://patchwork.plctlab.org/api/1.2/patches/1540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yh6sbr2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:09","name":"[13/17] aarch64: Tweak constness of option-related data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yh6sbr2.fsf@arm.com/mbox/"},{"id":1537,"url":"https://patchwork.plctlab.org/api/1.2/patches/1537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qrusbqi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:29","name":"[14/17] aarch64: Make more use of aarch64_feature_flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qrusbqi.fsf@arm.com/mbox/"},{"id":1535,"url":"https://patchwork.plctlab.org/api/1.2/patches/1535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwn9mqx5q.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:41","name":"[15/17] aarch64: Tweak contents of flags_on/off fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwn9mqx5q.fsf@arm.com/mbox/"},{"id":1538,"url":"https://patchwork.plctlab.org/api/1.2/patches/1538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfkaqx5e.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:53","name":"[16/17] aarch64: Tweak handling of -mgeneral-regs-only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfkaqx5e.fsf@arm.com/mbox/"},{"id":1541,"url":"https://patchwork.plctlab.org/api/1.2/patches/1541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7uyqx51.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:43:06","name":"[17/17] aarch64: Remove redundant TARGET_* checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7uyqx51.fsf@arm.com/mbox/"},{"id":1542,"url":"https://patchwork.plctlab.org/api/1.2/patches/1542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6qx3a.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:44:09","name":"[pushed] data-ref: Fix ranges_maybe_overlap_p test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6qx3a.fsf@arm.com/mbox/"},{"id":1543,"url":"https://patchwork.plctlab.org/api/1.2/patches/1543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929110723.277330-1-juzhe.zhong@rivai.ai/","msgid":"<20220929110723.277330-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-29T11:07:23","name":"[Unfinished] Add first-order recurrence autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929110723.277330-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1544,"url":"https://patchwork.plctlab.org/api/1.2/patches/1544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org/","msgid":"<31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org>","list_archive_url":null,"date":"2022-09-29T11:43:38","name":"c++: import/export NTTP objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org/mbox/"},{"id":1545,"url":"https://patchwork.plctlab.org/api/1.2/patches/1545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929115423.2725537-1-jwakely@redhat.com/","msgid":"<20220929115423.2725537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-29T11:54:23","name":"[committed] libstdc++: Guard use of new built-in with __has_builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929115423.2725537-1-jwakely@redhat.com/mbox/"},{"id":1546,"url":"https://patchwork.plctlab.org/api/1.2/patches/1546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929144912.21826-1-soeren@soeren-tempel.net/","msgid":"<20220929144912.21826-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-09-29T14:49:12","name":"libgo: use _off_t for mmap offset argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929144912.21826-1-soeren@soeren-tempel.net/mbox/"},{"id":1548,"url":"https://patchwork.plctlab.org/api/1.2/patches/1548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145727.269135-1-christophe.lyon@arm.com/","msgid":"<20220929145727.269135-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-09-29T14:57:27","name":"testsuite: [arm] Relax expected register names in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145727.269135-1-christophe.lyon@arm.com/mbox/"},{"id":1547,"url":"https://patchwork.plctlab.org/api/1.2/patches/1547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145740.4846-1-shorne@gmail.com/","msgid":"<20220929145740.4846-1-shorne@gmail.com>","list_archive_url":null,"date":"2022-09-29T14:57:40","name":"or1k: Only define TARGET_HAVE_TLS when HAVE_AS_TLS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145740.4846-1-shorne@gmail.com/mbox/"},{"id":1549,"url":"https://patchwork.plctlab.org/api/1.2/patches/1549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929150504.829703-1-ppalka@redhat.com/","msgid":"<20220929150504.829703-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-29T15:05:04","name":"[RFC] c++: streamline process for adding new builtin trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929150504.829703-1-ppalka@redhat.com/mbox/"},{"id":1550,"url":"https://patchwork.plctlab.org/api/1.2/patches/1550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrk05mi3q5.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T15:45:38","name":"[12/15,V2] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrk05mi3q5.fsf_-_@arm.com/mbox/"},{"id":1551,"url":"https://patchwork.plctlab.org/api/1.2/patches/1551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzXABvJX2wl3gHkK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T15:55:50","name":"[RFC] c++, i386, arm, aarch64, libgcc: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzXABvJX2wl3gHkK@tucnak/mbox/"},{"id":1552,"url":"https://patchwork.plctlab.org/api/1.2/patches/1552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9f3e89e-afcb-84b4-7eba-6d029f627012@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T16:29:42","name":"[committed] amdgcn: remove unused variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9f3e89e-afcb-84b4-7eba-6d029f627012@codesourcery.com/mbox/"},{"id":1553,"url":"https://patchwork.plctlab.org/api/1.2/patches/1553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929173809.2234264-1-torbjorn.svensson@foss.st.com/","msgid":"<20220929173809.2234264-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-29T17:38:10","name":"testsuite: /dev/null is not accessible on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929173809.2234264-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1554,"url":"https://patchwork.plctlab.org/api/1.2/patches/1554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929174956.1915381-1-jason@redhat.com/","msgid":"<20220929174956.1915381-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:49:56","name":"[pushed] c++: reduce temporaries in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929174956.1915381-1-jason@redhat.com/mbox/"},{"id":1555,"url":"https://patchwork.plctlab.org/api/1.2/patches/1555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175047.1915926-1-jason@redhat.com/","msgid":"<20220929175047.1915926-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:50:47","name":"[pushed] c++: fix class-valued ?: extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175047.1915926-1-jason@redhat.com/mbox/"},{"id":1556,"url":"https://patchwork.plctlab.org/api/1.2/patches/1556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175120.1916164-1-jason@redhat.com/","msgid":"<20220929175120.1916164-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:51:20","name":"[pushed] c++: check DECL_INITIAL for constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175120.1916164-1-jason@redhat.com/mbox/"},{"id":1557,"url":"https://patchwork.plctlab.org/api/1.2/patches/1557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929180710.2235253-1-torbjorn.svensson@foss.st.com/","msgid":"<20220929180710.2235253-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-29T18:07:11","name":"testsuite: Windows reports errors with CreateProcess","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929180710.2235253-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1558,"url":"https://patchwork.plctlab.org/api/1.2/patches/1558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929191120.1938729-1-jason@redhat.com/","msgid":"<20220929191120.1938729-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T19:11:20","name":"[pushed] c++: fix triviality of class with unsatisfied op=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929191120.1938729-1-jason@redhat.com/mbox/"},{"id":1559,"url":"https://patchwork.plctlab.org/api/1.2/patches/1559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com/","msgid":"<81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-09-29T22:10:28","name":"diagnostics: Fix virtual location for -Wuninitialized [PR69543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com/mbox/"},{"id":1560,"url":"https://patchwork.plctlab.org/api/1.2/patches/1560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85abdd6-5261-49b2-2fbc-6a26644625c1@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:34:52","name":"PR tree-optimization/102892 - Remove undefined behaviour from testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85abdd6-5261-49b2-2fbc-6a26644625c1@redhat.com/mbox/"},{"id":1561,"url":"https://patchwork.plctlab.org/api/1.2/patches/1561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16763009-abeb-5785-80fc-40cd755fef0c@redhat.com/","msgid":"<16763009-abeb-5785-80fc-40cd755fef0c@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:35:09","name":"Audit op1_range and op2_range for undefined LHS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16763009-abeb-5785-80fc-40cd755fef0c@redhat.com/mbox/"},{"id":1562,"url":"https://patchwork.plctlab.org/api/1.2/patches/1562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8178ef8-4fc8-f7c3-80fa-1af995c23d3c@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:35:32","name":"Move class value_relation the header file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8178ef8-4fc8-f7c3-80fa-1af995c23d3c@redhat.com/mbox/"},{"id":1563,"url":"https://patchwork.plctlab.org/api/1.2/patches/1563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55e35d6-332a-87ec-145f-493010748ff8@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:36:01","name":"Track value_relations in GORI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55e35d6-332a-87ec-145f-493010748ff8@redhat.com/mbox/"},{"id":1564,"url":"https://patchwork.plctlab.org/api/1.2/patches/1564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8fde85d-7758-a00e-0cd5-da3283d70189@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:36:53","name":"Refine ranges using relations in GORI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8fde85d-7758-a00e-0cd5-da3283d70189@redhat.com/mbox/"},{"id":1565,"url":"https://patchwork.plctlab.org/api/1.2/patches/1565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b234c9a-5020-c97c-c379-877c4c018293@redhat.com/","msgid":"<9b234c9a-5020-c97c-c379-877c4c018293@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:38:10","name":"Process unsigned overflow relations for plus and minus in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b234c9a-5020-c97c-c379-877c4c018293@redhat.com/mbox/"},{"id":1566,"url":"https://patchwork.plctlab.org/api/1.2/patches/1566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929224945.90798-1-polacek@redhat.com/","msgid":"<20220929224945.90798-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:49:45","name":"c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929224945.90798-1-polacek@redhat.com/mbox/"},{"id":1567,"url":"https://patchwork.plctlab.org/api/1.2/patches/1567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209292259440.527883@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-29T23:00:30","name":"[committed] c: C2x noreturn attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209292259440.527883@digraph.polyomino.org.uk/mbox/"},{"id":1568,"url":"https://patchwork.plctlab.org/api/1.2/patches/1568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930012822.1994426-1-jason@redhat.com/","msgid":"<20220930012822.1994426-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-30T01:28:22","name":"[pushed] c++: reduce redundant TARGET_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930012822.1994426-1-jason@redhat.com/mbox/"},{"id":1569,"url":"https://patchwork.plctlab.org/api/1.2/patches/1569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930020523.21483-1-kito.cheng@sifive.com/","msgid":"<20220930020523.21483-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-09-30T02:05:23","name":"RISC-V: Support --target-help for -mcpu/-mtune","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930020523.21483-1-kito.cheng@sifive.com/mbox/"},{"id":1570,"url":"https://patchwork.plctlab.org/api/1.2/patches/1570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542346DCE5393A1BEDAB13E91569@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-30T06:28:01","name":"Emit discriminators for inlined call sites.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542346DCE5393A1BEDAB13E91569@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1571,"url":"https://patchwork.plctlab.org/api/1.2/patches/1571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930065816.170458-1-juzhe.zhong@rivai.ai/","msgid":"<20220930065816.170458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-30T06:58:16","name":"RISC-V: Introduce RVV header to enable builtin types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930065816.170458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1572,"url":"https://patchwork.plctlab.org/api/1.2/patches/1572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzaYvq2n3/u8oVLd@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T07:20:30","name":"fixincludes: Deal also with the _Float128x cases [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzaYvq2n3/u8oVLd@tucnak/mbox/"},{"id":1574,"url":"https://patchwork.plctlab.org/api/1.2/patches/1574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930080033.70151-1-juzhe.zhong@rivai.ai/","msgid":"<20220930080033.70151-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-30T08:00:33","name":"Add first-order recurrence autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930080033.70151-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1575,"url":"https://patchwork.plctlab.org/api/1.2/patches/1575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com/","msgid":"<1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com>","list_archive_url":null,"date":"2022-09-30T08:00:49","name":"install.texi: gcn - update llvm reqirements, gcn/nvptx - newlib use version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com/mbox/"},{"id":1576,"url":"https://patchwork.plctlab.org/api/1.2/patches/1576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930081806.2252641-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930081806.2252641-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T08:18:06","name":"testsuite: Colon is reserved on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930081806.2252641-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1587,"url":"https://patchwork.plctlab.org/api/1.2/patches/1587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com/","msgid":"<6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com>","list_archive_url":null,"date":"2022-09-30T10:41:19","name":"Fortran: Update use_device_ptr for OpenMP 5.1 [PR105318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com/mbox/"},{"id":1588,"url":"https://patchwork.plctlab.org/api/1.2/patches/1588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930105003.7C8A813776@imap2.suse-dmz.suse.de/","msgid":"<20220930105003.7C8A813776@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-30T10:50:03","name":"tree-optimization/107095 - fix typo in .MASK_STORE DSE handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930105003.7C8A813776@imap2.suse-dmz.suse.de/mbox/"},{"id":1589,"url":"https://patchwork.plctlab.org/api/1.2/patches/1589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930111938.354664-1-christophe.lyon@arm.com/","msgid":"<20220930111938.354664-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-09-30T11:19:38","name":"[v2] testsuite: [arm] Relax expected register names in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930111938.354664-1-christophe.lyon@arm.com/mbox/"},{"id":1595,"url":"https://patchwork.plctlab.org/api/1.2/patches/1595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930134620.106589-1-jwakely@redhat.com/","msgid":"<20220930134620.106589-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T13:46:20","name":"[committed] libstdc++: Add missing include to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930134620.106589-1-jwakely@redhat.com/mbox/"},{"id":1597,"url":"https://patchwork.plctlab.org/api/1.2/patches/1597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930153845.2268381-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930153845.2268381-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T15:38:46","name":"testsuite: Windows paths use \\ and not /","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930153845.2268381-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1598,"url":"https://patchwork.plctlab.org/api/1.2/patches/1598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930162212.2270178-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930162212.2270178-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T16:22:13","name":"[v3] testsuite: Only run test on target if VMA == LMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930162212.2270178-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1599,"url":"https://patchwork.plctlab.org/api/1.2/patches/1599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzcbZogl8uzaBpc6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T16:37:58","name":"openmp: Add begin declare target support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzcbZogl8uzaBpc6@tucnak/mbox/"},{"id":1600,"url":"https://patchwork.plctlab.org/api/1.2/patches/1600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-2-arsen@aarsen.me/","msgid":"<20220930164556.1198044-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:47","name":"[01/10] libstdc++: Make _GLIBCXX_HOSTED respect -ffreestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-2-arsen@aarsen.me/mbox/"},{"id":1602,"url":"https://patchwork.plctlab.org/api/1.2/patches/1602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-3-arsen@aarsen.me/","msgid":"<20220930164556.1198044-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:48","name":"[02/10] libstdc++: Filter out unconditional default include","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-3-arsen@aarsen.me/mbox/"},{"id":1603,"url":"https://patchwork.plctlab.org/api/1.2/patches/1603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-4-arsen@aarsen.me/","msgid":"<20220930164556.1198044-4-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:49","name":"[03/10] libstdc++: Adjust precompiled headers for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-4-arsen@aarsen.me/mbox/"},{"id":1606,"url":"https://patchwork.plctlab.org/api/1.2/patches/1606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-5-arsen@aarsen.me/","msgid":"<20220930164556.1198044-5-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:50","name":"[04/10] libstdc++: Mark headers that must be hosted as such [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-5-arsen@aarsen.me/mbox/"},{"id":1601,"url":"https://patchwork.plctlab.org/api/1.2/patches/1601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-6-arsen@aarsen.me/","msgid":"<20220930164556.1198044-6-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:51","name":"[05/10] c-family: Implement new `int main'\'' semantics in freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-6-arsen@aarsen.me/mbox/"},{"id":1604,"url":"https://patchwork.plctlab.org/api/1.2/patches/1604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-7-arsen@aarsen.me/","msgid":"<20220930164556.1198044-7-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:52","name":"[06/10] libstdc++: Rework how freestanding install works [PR106953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-7-arsen@aarsen.me/mbox/"},{"id":1609,"url":"https://patchwork.plctlab.org/api/1.2/patches/1609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-8-arsen@aarsen.me/","msgid":"<20220930164556.1198044-8-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:53","name":"[07/10] libstdc++: Make some tests work on freestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-8-arsen@aarsen.me/mbox/"},{"id":1605,"url":"https://patchwork.plctlab.org/api/1.2/patches/1605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-9-arsen@aarsen.me/","msgid":"<20220930164556.1198044-9-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:54","name":"[08/10] libstdc++: Add effective-target '\''hosted'\'' for testsuite [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-9-arsen@aarsen.me/mbox/"},{"id":1607,"url":"https://patchwork.plctlab.org/api/1.2/patches/1607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-10-arsen@aarsen.me/","msgid":"<20220930164556.1198044-10-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:55","name":"[09/10] libstdc++: Re-enable std::hash in freestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-10-arsen@aarsen.me/mbox/"},{"id":1608,"url":"https://patchwork.plctlab.org/api/1.2/patches/1608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-11-arsen@aarsen.me/","msgid":"<20220930164556.1198044-11-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:56","name":"[10/10] libstdc++: Disable hosted-only tests [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-11-arsen@aarsen.me/mbox/"},{"id":1610,"url":"https://patchwork.plctlab.org/api/1.2/patches/1610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzcjxp+y+yXlUO8y@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T17:13:42","name":"arm, aarch64, csky: Fix C++ ICEs with _Float16 and __fp16 [PR107080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzcjxp+y+yXlUO8y@tucnak/mbox/"},{"id":1611,"url":"https://patchwork.plctlab.org/api/1.2/patches/1611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930172019.1459433-1-ppalka@redhat.com/","msgid":"<20220930172019.1459433-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-30T17:20:19","name":"c++: make some cp_trait_kind switch statements exhaustive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930172019.1459433-1-ppalka@redhat.com/mbox/"},{"id":1613,"url":"https://patchwork.plctlab.org/api/1.2/patches/1613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205708.170313-1-jwakely@redhat.com/","msgid":"<20220930205708.170313-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:08","name":"[committed] libstdc++: Remove non-standard public members in std::bitset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205708.170313-1-jwakely@redhat.com/mbox/"},{"id":1612,"url":"https://patchwork.plctlab.org/api/1.2/patches/1612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205713.170346-1-jwakely@redhat.com/","msgid":"<20220930205713.170346-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:13","name":"[committed] libstdc++: Optimize operator>> for std::bitset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205713.170346-1-jwakely@redhat.com/mbox/"},{"id":1614,"url":"https://patchwork.plctlab.org/api/1.2/patches/1614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205717.170362-1-jwakely@redhat.com/","msgid":"<20220930205717.170362-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:17","name":"[committed] libstdc++: Remove dependency from std::bitset::to_ulong() test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205717.170362-1-jwakely@redhat.com/mbox/"},{"id":1615,"url":"https://patchwork.plctlab.org/api/1.2/patches/1615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930220623.2161990-1-jason@redhat.com/","msgid":"<20220930220623.2161990-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-30T22:06:23","name":"[RFC] c++: fix broken conversion in coroutines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930220623.2161990-1-jason@redhat.com/mbox/"},{"id":1616,"url":"https://patchwork.plctlab.org/api/1.2/patches/1616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com/","msgid":"<44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com>","list_archive_url":null,"date":"2022-09-30T23:05:47","name":"[committed] Minor cleanup/prep in DOM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com/mbox/"},{"id":1617,"url":"https://patchwork.plctlab.org/api/1.2/patches/1617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com/","msgid":"<6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com>","list_archive_url":null,"date":"2022-09-30T23:32:34","name":"[committed] More gimple const/copy propagation opportunities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-09/mbox/"},{"id":10,"url":"https://patchwork.plctlab.org/api/1.2/bundles/10/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-11","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":13283,"url":"https://patchwork.plctlab.org/api/1.2/patches/13283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c12f3e33-3ccc-4c78-20b1-6e64049d74dc@ubuntu.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T15:33:42","name":"[ada] fix libgnat build on x86_64-linux-gnux32 with glibc <= 2.31","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c12f3e33-3ccc-4c78-20b1-6e64049d74dc@ubuntu.com/mbox/"},{"id":13294,"url":"https://patchwork.plctlab.org/api/1.2/patches/13294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-2-gnu@danielengel.com/","msgid":"<20221031154529.3627576-2-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:56","name":"[v7,01/34] Add and restructure function declaration macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-2-gnu@danielengel.com/mbox/"},{"id":13298,"url":"https://patchwork.plctlab.org/api/1.2/patches/13298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-3-gnu@danielengel.com/","msgid":"<20221031154529.3627576-3-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:57","name":"[v7,02/34] Rename THUMB_FUNC_START to THUMB_FUNC_ENTRY","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-3-gnu@danielengel.com/mbox/"},{"id":13302,"url":"https://patchwork.plctlab.org/api/1.2/patches/13302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-4-gnu@danielengel.com/","msgid":"<20221031154529.3627576-4-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:58","name":"[v7,03/34] Fix syntax warnings on conditional instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-4-gnu@danielengel.com/mbox/"},{"id":13295,"url":"https://patchwork.plctlab.org/api/1.2/patches/13295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-5-gnu@danielengel.com/","msgid":"<20221031154529.3627576-5-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:59","name":"[v7,04/34] Reorganize LIB1ASMFUNCS object wrapper macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-5-gnu@danielengel.com/mbox/"},{"id":13299,"url":"https://patchwork.plctlab.org/api/1.2/patches/13299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-6-gnu@danielengel.com/","msgid":"<20221031154529.3627576-6-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:00","name":"[v7,05/34] Add the __HAVE_FEATURE_IT and IT() macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-6-gnu@danielengel.com/mbox/"},{"id":13297,"url":"https://patchwork.plctlab.org/api/1.2/patches/13297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-7-gnu@danielengel.com/","msgid":"<20221031154529.3627576-7-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:01","name":"[v7,06/34] Refactor '\''clz'\'' functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-7-gnu@danielengel.com/mbox/"},{"id":13296,"url":"https://patchwork.plctlab.org/api/1.2/patches/13296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-8-gnu@danielengel.com/","msgid":"<20221031154529.3627576-8-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:02","name":"[v7,07/34] Refactor '\''ctz'\'' functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-8-gnu@danielengel.com/mbox/"},{"id":13301,"url":"https://patchwork.plctlab.org/api/1.2/patches/13301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-9-gnu@danielengel.com/","msgid":"<20221031154529.3627576-9-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:03","name":"[v7,08/34] Refactor 64-bit shift functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-9-gnu@danielengel.com/mbox/"},{"id":13303,"url":"https://patchwork.plctlab.org/api/1.2/patches/13303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-10-gnu@danielengel.com/","msgid":"<20221031154529.3627576-10-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:04","name":"[v7,09/34] Import '\''clz'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-10-gnu@danielengel.com/mbox/"},{"id":13305,"url":"https://patchwork.plctlab.org/api/1.2/patches/13305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-11-gnu@danielengel.com/","msgid":"<20221031154529.3627576-11-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:05","name":"[v7,10/34] Import '\''ctz'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-11-gnu@danielengel.com/mbox/"},{"id":13307,"url":"https://patchwork.plctlab.org/api/1.2/patches/13307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-12-gnu@danielengel.com/","msgid":"<20221031154529.3627576-12-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:06","name":"[v7,11/34] Import 64-bit shift functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-12-gnu@danielengel.com/mbox/"},{"id":13310,"url":"https://patchwork.plctlab.org/api/1.2/patches/13310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-13-gnu@danielengel.com/","msgid":"<20221031154529.3627576-13-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:07","name":"[v7,12/34] Import '\''clrsb'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-13-gnu@danielengel.com/mbox/"},{"id":13308,"url":"https://patchwork.plctlab.org/api/1.2/patches/13308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-14-gnu@danielengel.com/","msgid":"<20221031154529.3627576-14-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:08","name":"[v7,13/34] Import '\''ffs'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-14-gnu@danielengel.com/mbox/"},{"id":13313,"url":"https://patchwork.plctlab.org/api/1.2/patches/13313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-15-gnu@danielengel.com/","msgid":"<20221031154529.3627576-15-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:09","name":"[v7,14/34] Import '\''parity'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-15-gnu@danielengel.com/mbox/"},{"id":13300,"url":"https://patchwork.plctlab.org/api/1.2/patches/13300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-16-gnu@danielengel.com/","msgid":"<20221031154529.3627576-16-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:10","name":"[v7,15/34] Import '\''popcnt'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-16-gnu@danielengel.com/mbox/"},{"id":13311,"url":"https://patchwork.plctlab.org/api/1.2/patches/13311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-17-gnu@danielengel.com/","msgid":"<20221031154529.3627576-17-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:11","name":"[v7,16/34] Refactor Thumb-1 64-bit comparison into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-17-gnu@danielengel.com/mbox/"},{"id":13304,"url":"https://patchwork.plctlab.org/api/1.2/patches/13304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-18-gnu@danielengel.com/","msgid":"<20221031154529.3627576-18-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:12","name":"[v7,17/34] Import 64-bit comparison from CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-18-gnu@danielengel.com/mbox/"},{"id":13309,"url":"https://patchwork.plctlab.org/api/1.2/patches/13309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-19-gnu@danielengel.com/","msgid":"<20221031154529.3627576-19-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:13","name":"[v7,18/34] Merge Thumb-2 optimizations for 64-bit comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-19-gnu@danielengel.com/mbox/"},{"id":13314,"url":"https://patchwork.plctlab.org/api/1.2/patches/13314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-20-gnu@danielengel.com/","msgid":"<20221031154529.3627576-20-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:14","name":"[v7,19/34] Import 32-bit division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-20-gnu@danielengel.com/mbox/"},{"id":13319,"url":"https://patchwork.plctlab.org/api/1.2/patches/13319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-21-gnu@danielengel.com/","msgid":"<20221031154529.3627576-21-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:15","name":"[v7,20/34] Refactor Thumb-1 64-bit division into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-21-gnu@danielengel.com/mbox/"},{"id":13312,"url":"https://patchwork.plctlab.org/api/1.2/patches/13312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-22-gnu@danielengel.com/","msgid":"<20221031154529.3627576-22-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:16","name":"[v7,21/34] Import 64-bit division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-22-gnu@danielengel.com/mbox/"},{"id":13315,"url":"https://patchwork.plctlab.org/api/1.2/patches/13315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-23-gnu@danielengel.com/","msgid":"<20221031154529.3627576-23-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:17","name":"[v7,22/34] Import integer multiplication from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-23-gnu@danielengel.com/mbox/"},{"id":13321,"url":"https://patchwork.plctlab.org/api/1.2/patches/13321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-24-gnu@danielengel.com/","msgid":"<20221031154529.3627576-24-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:18","name":"[v7,23/34] Refactor Thumb-1 float comparison into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-24-gnu@danielengel.com/mbox/"},{"id":13318,"url":"https://patchwork.plctlab.org/api/1.2/patches/13318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-25-gnu@danielengel.com/","msgid":"<20221031154529.3627576-25-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:19","name":"[v7,24/34] Import float comparison from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-25-gnu@danielengel.com/mbox/"},{"id":13316,"url":"https://patchwork.plctlab.org/api/1.2/patches/13316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-26-gnu@danielengel.com/","msgid":"<20221031154529.3627576-26-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:20","name":"[v7,25/34] Refactor Thumb-1 float subtraction into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-26-gnu@danielengel.com/mbox/"},{"id":13323,"url":"https://patchwork.plctlab.org/api/1.2/patches/13323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-27-gnu@danielengel.com/","msgid":"<20221031154529.3627576-27-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:21","name":"[v7,26/34] Import float addition and subtraction from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-27-gnu@danielengel.com/mbox/"},{"id":13328,"url":"https://patchwork.plctlab.org/api/1.2/patches/13328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-28-gnu@danielengel.com/","msgid":"<20221031154529.3627576-28-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:22","name":"[v7,27/34] Import float multiplication from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-28-gnu@danielengel.com/mbox/"},{"id":13329,"url":"https://patchwork.plctlab.org/api/1.2/patches/13329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-29-gnu@danielengel.com/","msgid":"<20221031154529.3627576-29-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:23","name":"[v7,28/34] Import float division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-29-gnu@danielengel.com/mbox/"},{"id":13332,"url":"https://patchwork.plctlab.org/api/1.2/patches/13332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-30-gnu@danielengel.com/","msgid":"<20221031154529.3627576-30-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:24","name":"[v7,29/34] Import integer-to-float conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-30-gnu@danielengel.com/mbox/"},{"id":13334,"url":"https://patchwork.plctlab.org/api/1.2/patches/13334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-31-gnu@danielengel.com/","msgid":"<20221031154529.3627576-31-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:25","name":"[v7,30/34] Import float-to-integer conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-31-gnu@danielengel.com/mbox/"},{"id":13330,"url":"https://patchwork.plctlab.org/api/1.2/patches/13330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-32-gnu@danielengel.com/","msgid":"<20221031154529.3627576-32-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:26","name":"[v7,31/34] Import float<->double conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-32-gnu@danielengel.com/mbox/"},{"id":13335,"url":"https://patchwork.plctlab.org/api/1.2/patches/13335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-33-gnu@danielengel.com/","msgid":"<20221031154529.3627576-33-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:27","name":"[v7,32/34] Import float<->__fp16 conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-33-gnu@danielengel.com/mbox/"},{"id":13327,"url":"https://patchwork.plctlab.org/api/1.2/patches/13327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-34-gnu@danielengel.com/","msgid":"<20221031154529.3627576-34-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:28","name":"[v7,33/34] Drop single-precision Thumb-1 soft-float functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-34-gnu@danielengel.com/mbox/"},{"id":13336,"url":"https://patchwork.plctlab.org/api/1.2/patches/13336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-35-gnu@danielengel.com/","msgid":"<20221031154529.3627576-35-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:29","name":"[v7,34/34] Add -mpure-code support to the CM0 functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-35-gnu@danielengel.com/mbox/"},{"id":13412,"url":"https://patchwork.plctlab.org/api/1.2/patches/13412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031190742.2116564-1-dmalcolm@redhat.com/","msgid":"<20221031190742.2116564-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-31T19:07:42","name":"c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031190742.2116564-1-dmalcolm@redhat.com/mbox/"},{"id":13431,"url":"https://patchwork.plctlab.org/api/1.2/patches/13431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031203310.852924-1-ppalka@redhat.com/","msgid":"<20221031203310.852924-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-31T20:33:10","name":"libstdc++: Implement ranges::as_rvalue_view from P2446R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031203310.852924-1-ppalka@redhat.com/mbox/"},{"id":13440,"url":"https://patchwork.plctlab.org/api/1.2/patches/13440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031210618.695953-1-hjl.tools@gmail.com/","msgid":"<20221031210618.695953-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-31T21:06:18","name":"x86: Track converted/skipped registers in STV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031210618.695953-1-hjl.tools@gmail.com/mbox/"},{"id":13491,"url":"https://patchwork.plctlab.org/api/1.2/patches/13491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487305F99BDE4F531490D69EC369@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T01:20:40","name":"[wwwdocs,GCC13] Mention Intel __bf16 support in AVX512BF16 intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487305F99BDE4F531490D69EC369@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":13492,"url":"https://patchwork.plctlab.org/api/1.2/patches/13492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101012344.1456215-1-jason@redhat.com/","msgid":"<20221101012344.1456215-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-01T01:23:44","name":"[pushed] c++: set TREE_NOTHROW after genericize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101012344.1456215-1-jason@redhat.com/mbox/"},{"id":13530,"url":"https://patchwork.plctlab.org/api/1.2/patches/13530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101061915.1677615-1-chenglulu@loongson.cn/","msgid":"<20221101061915.1677615-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-01T06:19:15","name":"[v2] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101061915.1677615-1-chenglulu@loongson.cn/mbox/"},{"id":13583,"url":"https://patchwork.plctlab.org/api/1.2/patches/13583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2DoqF9dtrknNICD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-01T09:36:40","name":"libstdc++: std::from_chars std::{,b}float16_t support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2DoqF9dtrknNICD@tucnak/mbox/"},{"id":13594,"url":"https://patchwork.plctlab.org/api/1.2/patches/13594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094525.CD8F533E65@hamza.pair.com/","msgid":"<20221101094525.CD8F533E65@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:45:22","name":"[committed] wwwdocs: projects/tree-ssa: Adjust mark up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094525.CD8F533E65@hamza.pair.com/mbox/"},{"id":13595,"url":"https://patchwork.plctlab.org/api/1.2/patches/13595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094640.E321433E61@hamza.pair.com/","msgid":"<20221101094640.E321433E61@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:46:38","name":"[committed] wwwdocs: readings: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094640.E321433E61@hamza.pair.com/mbox/"},{"id":13597,"url":"https://patchwork.plctlab.org/api/1.2/patches/13597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094858.CC1B233E61@hamza.pair.com/","msgid":"<20221101094858.CC1B233E61@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:48:56","name":"[committed] wwwdocs: codingconventions: Move two links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094858.CC1B233E61@hamza.pair.com/mbox/"},{"id":13617,"url":"https://patchwork.plctlab.org/api/1.2/patches/13617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b94b0feb-c5f9-430b-1911-182faa10fe79@acm.org/","msgid":"","list_archive_url":null,"date":"2022-11-01T10:23:18","name":"c++: Reorganize per-scope lambda discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b94b0feb-c5f9-430b-1911-182faa10fe79@acm.org/mbox/"},{"id":13630,"url":"https://patchwork.plctlab.org/api/1.2/patches/13630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101111831.390F033E63@hamza.pair.com/","msgid":"<20221101111831.390F033E63@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T11:18:24","name":"[committed] wwwdocs: *: Remove extraneous whitespaces around headings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101111831.390F033E63@hamza.pair.com/mbox/"},{"id":13638,"url":"https://patchwork.plctlab.org/api/1.2/patches/13638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120102.DDB8833E4C@hamza.pair.com/","msgid":"<20221101120102.DDB8833E4C@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:01:00","name":"[committed] wwwdocs: codingconventions: Properly link to flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120102.DDB8833E4C@hamza.pair.com/mbox/"},{"id":13639,"url":"https://patchwork.plctlab.org/api/1.2/patches/13639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120444.412376-1-chenglulu@loongson.cn/","msgid":"<20221101120444.412376-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-01T12:04:45","name":"[v3] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120444.412376-1-chenglulu@loongson.cn/mbox/"},{"id":13640,"url":"https://patchwork.plctlab.org/api/1.2/patches/13640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120535.7CC5733E13@hamza.pair.com/","msgid":"<20221101120535.7CC5733E13@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:05:33","name":"[committed] wwwdocs: gcc-4.4: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120535.7CC5733E13@hamza.pair.com/mbox/"},{"id":13643,"url":"https://patchwork.plctlab.org/api/1.2/patches/13643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120952.60F9933E4A@hamza.pair.com/","msgid":"<20221101120952.60F9933E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:09:50","name":"[committed] wwwdocs: readings: Switch sourceforge.net sub-sites to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120952.60F9933E4A@hamza.pair.com/mbox/"},{"id":13644,"url":"https://patchwork.plctlab.org/api/1.2/patches/13644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2EOfVFPvNucL8ht@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-01T12:18:05","name":"libstdc++: Shortest denormal hex std::to_chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2EOfVFPvNucL8ht@tucnak/mbox/"},{"id":13655,"url":"https://patchwork.plctlab.org/api/1.2/patches/13655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982542953A831514A369D9883369@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T13:08:18","name":"[AArch64] Cleanup move immediate code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982542953A831514A369D9883369@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":13656,"url":"https://patchwork.plctlab.org/api/1.2/patches/13656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com/","msgid":"<92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:19:11","name":"[COMMITTED] Irange::intersect with nonzero bits can indicate change incorrectly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com/mbox/"},{"id":13657,"url":"https://patchwork.plctlab.org/api/1.2/patches/13657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com/","msgid":"<052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:19:27","name":"[COMMITTED] Allow ranger queries on exit block.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com/mbox/"},{"id":13658,"url":"https://patchwork.plctlab.org/api/1.2/patches/13658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com/","msgid":"<3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:20:00","name":"[COMMITTED] Remove builtin_unreachable in ranger VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com/mbox/"},{"id":13681,"url":"https://patchwork.plctlab.org/api/1.2/patches/13681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/100da11f-424c-71e0-1275-f161b94ffa46@redhat.com/","msgid":"<100da11f-424c-71e0-1275-f161b94ffa46@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:58:00","name":"[COMMITTED] Make ranger the vrp1 default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/100da11f-424c-71e0-1275-f161b94ffa46@redhat.com/mbox/"},{"id":13682,"url":"https://patchwork.plctlab.org/api/1.2/patches/13682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101135941.444266-1-jwakely@redhat.com/","msgid":"<20221101135941.444266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:59:41","name":"doc: Remove outdated reference to \"core\" and front-end downloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101135941.444266-1-jwakely@redhat.com/mbox/"},{"id":13759,"url":"https://patchwork.plctlab.org/api/1.2/patches/13759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-2-amonakov@ispras.ru/","msgid":"<20221101162637.14238-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-01T16:26:36","name":"[1/2] i386: correct x87&SSE division modeling in znver.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-2-amonakov@ispras.ru/mbox/"},{"id":13760,"url":"https://patchwork.plctlab.org/api/1.2/patches/13760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-3-amonakov@ispras.ru/","msgid":"<20221101162637.14238-3-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-01T16:26:37","name":"[2/2] i386: correct x87&SSE multiplication modeling in znver.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-3-amonakov@ispras.ru/mbox/"},{"id":13802,"url":"https://patchwork.plctlab.org/api/1.2/patches/13802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101170156.52672-1-polacek@redhat.com/","msgid":"<20221101170156.52672-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-01T17:01:56","name":"c++: Disable -Wignored-qualifiers for template args [PR107492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101170156.52672-1-polacek@redhat.com/mbox/"},{"id":13813,"url":"https://patchwork.plctlab.org/api/1.2/patches/13813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T17:25:13","name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"},{"id":13829,"url":"https://patchwork.plctlab.org/api/1.2/patches/13829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc4dfa6e-997a-cdd1-4370-1d0ebc0363fd@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T18:04:38","name":"[COMMITTED] PR tree-optimization/107497 - Make sure ssa-name is valid.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc4dfa6e-997a-cdd1-4370-1d0ebc0363fd@redhat.com/mbox/"},{"id":13838,"url":"https://patchwork.plctlab.org/api/1.2/patches/13838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101182537.50407-1-aldyh@redhat.com/","msgid":"<20221101182537.50407-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-01T18:25:37","name":"[COMMITTED,PR,tree-optimization/107490] Handle NANs in op[12]_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101182537.50407-1-aldyh@redhat.com/mbox/"},{"id":13899,"url":"https://patchwork.plctlab.org/api/1.2/patches/13899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101213029.940043-1-ppalka@redhat.com/","msgid":"<20221101213029.940043-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-01T21:30:29","name":"libstdc++: Fix ERANGE behavior for fallback FP std::from_chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101213029.940043-1-ppalka@redhat.com/mbox/"},{"id":13900,"url":"https://patchwork.plctlab.org/api/1.2/patches/13900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3cc7fc1-9fdb-4693-07e6-e6f356cf6b2c@acm.org/","msgid":"","list_archive_url":null,"date":"2022-11-01T21:46:45","name":"c++: per-scope, per-signature lambda discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3cc7fc1-9fdb-4693-07e6-e6f356cf6b2c@acm.org/mbox/"},{"id":13922,"url":"https://patchwork.plctlab.org/api/1.2/patches/13922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101220652.588178-1-polacek@redhat.com/","msgid":"<20221101220652.588178-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-01T22:06:52","name":"c++: Quash -Wdangling-reference for member operator* [PR107488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101220652.588178-1-polacek@redhat.com/mbox/"},{"id":13998,"url":"https://patchwork.plctlab.org/api/1.2/patches/13998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HYqx4zLCNCT0Zy@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:40:43","name":"[1/3] Rework 128-bit complex multiply and divide, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HYqx4zLCNCT0Zy@toto.the-meissners.org/mbox/"},{"id":13999,"url":"https://patchwork.plctlab.org/api/1.2/patches/13999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZFlHH8HuvhGL4@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:42:30","name":"[2/3] Make __float128 use the _Float128 type, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZFlHH8HuvhGL4@toto.the-meissners.org/mbox/"},{"id":14000,"url":"https://patchwork.plctlab.org/api/1.2/patches/14000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZcYMCCcyEADyD@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:44:01","name":"[3/3] Update float 128-bit conversions, PR target/107299.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZcYMCCcyEADyD@toto.the-meissners.org/mbox/"},{"id":14013,"url":"https://patchwork.plctlab.org/api/1.2/patches/14013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102033728.99379-1-hongyu.wang@intel.com/","msgid":"<20221102033728.99379-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-02T03:37:28","name":"[V2] Enable small loop unrolling for O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102033728.99379-1-hongyu.wang@intel.com/mbox/"},{"id":14068,"url":"https://patchwork.plctlab.org/api/1.2/patches/14068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com/","msgid":"<94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-02T07:59:06","name":"vect: Fold LEN_{LOAD,STORE} if it'\''s for the whole vector [PR107412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com/mbox/"},{"id":14070,"url":"https://patchwork.plctlab.org/api/1.2/patches/14070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com/","msgid":"<3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com>","list_archive_url":null,"date":"2022-11-02T08:01:06","name":"testsuite: Fix gen-vect-34.c with vect_masked_load [PR106806]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com/mbox/"},{"id":14123,"url":"https://patchwork.plctlab.org/api/1.2/patches/14123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8nxiurb.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:13:44","name":"builtins: Guard builtins.cc against HUGE_VAL and NAN definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8nxiurb.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":14156,"url":"https://patchwork.plctlab.org/api/1.2/patches/14156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I3pr1Eyn120h1C@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:25:58","name":"libstdc++: Add _Float128 to_chars/from_chars support for x86, ia64 and ppc64le with glibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I3pr1Eyn120h1C@tucnak/mbox/"},{"id":14165,"url":"https://patchwork.plctlab.org/api/1.2/patches/14165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I62a8i1u1I7EaE@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:39:37","name":"libstdc++: _Bfloat16 for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I62a8i1u1I7EaE@tucnak/mbox/"},{"id":14174,"url":"https://patchwork.plctlab.org/api/1.2/patches/14174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102104713.643862-1-richard.purdie@linuxfoundation.org/","msgid":"<20221102104713.643862-1-richard.purdie@linuxfoundation.org>","list_archive_url":null,"date":"2022-11-02T10:47:13","name":"[v2] libcpp: Avoid remapping filenames within directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102104713.643862-1-richard.purdie@linuxfoundation.org/mbox/"},{"id":14215,"url":"https://patchwork.plctlab.org/api/1.2/patches/14215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-2-jiawei@iscas.ac.cn/","msgid":"<20221102125235.2325572-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-02T12:52:34","name":"[RFC] RISC-V: Minimal supports for new extensions in profile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-2-jiawei@iscas.ac.cn/mbox/"},{"id":14216,"url":"https://patchwork.plctlab.org/api/1.2/patches/14216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-3-jiawei@iscas.ac.cn/","msgid":"<20221102125235.2325572-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-02T12:52:35","name":"[RFC] RISC-V: Add profile supports.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-3-jiawei@iscas.ac.cn/mbox/"},{"id":14218,"url":"https://patchwork.plctlab.org/api/1.2/patches/14218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125631.634887-1-jwakely@redhat.com/","msgid":"<20221102125631.634887-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T12:56:31","name":"[committed] libstdc++: Ignore -Wignored-qualifiers warning in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125631.634887-1-jwakely@redhat.com/mbox/"},{"id":14219,"url":"https://patchwork.plctlab.org/api/1.2/patches/14219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125638.634917-1-jwakely@redhat.com/","msgid":"<20221102125638.634917-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T12:56:38","name":"[committed] libstdc++: Remove unnecessary variant member in std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125638.634917-1-jwakely@redhat.com/mbox/"},{"id":14221,"url":"https://patchwork.plctlab.org/api/1.2/patches/14221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102131004.3816486-1-christophe.lyon@arm.com/","msgid":"<20221102131004.3816486-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-02T13:10:04","name":"genmultilib: Add sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102131004.3816486-1-christophe.lyon@arm.com/mbox/"},{"id":14236,"url":"https://patchwork.plctlab.org/api/1.2/patches/14236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102134028.1032216-1-ppalka@redhat.com/","msgid":"<20221102134028.1032216-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-02T13:40:28","name":"libstdc++: Declare const global variables inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102134028.1032216-1-ppalka@redhat.com/mbox/"},{"id":14274,"url":"https://patchwork.plctlab.org/api/1.2/patches/14274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16498-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-02T14:45:39","name":"[1/2] middle-end: Support early break/return auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16498-tamar@arm.com/mbox/"},{"id":14273,"url":"https://patchwork.plctlab.org/api/1.2/patches/14273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2KCrKb019Z1/HgC@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-02T14:46:04","name":"[2/2] AArch64 Add implementation for vector cbranch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2KCrKb019Z1/HgC@arm.com/mbox/"},{"id":14277,"url":"https://patchwork.plctlab.org/api/1.2/patches/14277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102145904.2958916-1-christoph.muellner@vrull.eu/","msgid":"<20221102145904.2958916-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-02T14:59:04","name":"[wwwdocs] gcc-13: riscv: Document the Zawrs support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102145904.2958916-1-christoph.muellner@vrull.eu/mbox/"},{"id":14313,"url":"https://patchwork.plctlab.org/api/1.2/patches/14313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com/","msgid":"<9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com>","list_archive_url":null,"date":"2022-11-02T15:57:56","name":"Fortran/OpenMP: Fix DT struct-component with '\''alloc'\'' and array descr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com/mbox/"},{"id":14318,"url":"https://patchwork.plctlab.org/api/1.2/patches/14318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102160308.3675197-1-torbjorn.svensson@foss.st.com/","msgid":"<20221102160308.3675197-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-02T16:03:09","name":"[v2] c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102160308.3675197-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":14455,"url":"https://patchwork.plctlab.org/api/1.2/patches/14455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102190819.862078-1-hjl.tools@gmail.com/","msgid":"<20221102190819.862078-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-11-02T19:08:19","name":"Extend optimization for integer bit test on __atomic_fetch_[or|and]_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102190819.862078-1-hjl.tools@gmail.com/mbox/"},{"id":14472,"url":"https://patchwork.plctlab.org/api/1.2/patches/14472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877d0dktqv.fsf@euler.schwinge.homeip.net/","msgid":"<877d0dktqv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:04:56","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-1.f90'\'' (was: [gomp4] add support for fortran allocate support with declare create)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877d0dktqv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14473,"url":"https://patchwork.plctlab.org/api/1.2/patches/14473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jvhktgx.fsf@euler.schwinge.homeip.net/","msgid":"<874jvhktgx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:10:54","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-1-runtime.f90'\'' (was: Add '\''libgomp.oacc-fortran/declare-allocatable-1.f90'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jvhktgx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14474,"url":"https://patchwork.plctlab.org/api/1.2/patches/14474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qqlkt98.fsf@euler.schwinge.homeip.net/","msgid":"<871qqlkt98.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:15:31","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-array_descriptor-1-runtime.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qqlkt98.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14475,"url":"https://patchwork.plctlab.org/api/1.2/patches/14475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1stjeda.fsf@euler.schwinge.homeip.net/","msgid":"<87y1stjeda.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:22:25","name":"Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part I [PR106643]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1stjeda.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14476,"url":"https://patchwork.plctlab.org/api/1.2/patches/14476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102203332.672558-1-jwakely@redhat.com/","msgid":"<20221102203332.672558-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T20:33:32","name":"[committed] libstdc++: Remove more redundant union members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102203332.672558-1-jwakely@redhat.com/mbox/"},{"id":14477,"url":"https://patchwork.plctlab.org/api/1.2/patches/14477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu3hjdt6.fsf@euler.schwinge.homeip.net/","msgid":"<87tu3hjdt6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:34:29","name":"Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part II [PR106643, PR96668] (was: Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part I [PR106643])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu3hjdt6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14493,"url":"https://patchwork.plctlab.org/api/1.2/patches/14493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-2-git-send-email-apinski@marvell.com/","msgid":"<1667425595-2654-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-02T21:46:34","name":"[1/2] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-2-git-send-email-apinski@marvell.com/mbox/"},{"id":14494,"url":"https://patchwork.plctlab.org/api/1.2/patches/14494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-3-git-send-email-apinski@marvell.com/","msgid":"<1667425595-2654-3-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-02T21:46:35","name":"[2/2] Add assert for type on tree_nonzero_bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-3-git-send-email-apinski@marvell.com/mbox/"},{"id":14612,"url":"https://patchwork.plctlab.org/api/1.2/patches/14612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a2f23bc1-b419-050-2d13-3d162065622@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T02:55:25","name":"[committed] c: C2x auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a2f23bc1-b419-050-2d13-3d162065622@codesourcery.com/mbox/"},{"id":14674,"url":"https://patchwork.plctlab.org/api/1.2/patches/14674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103062657.58427-1-haochen.jiang@intel.com/","msgid":"<20221103062657.58427-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-03T06:26:57","name":"Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103062657.58427-1-haochen.jiang@intel.com/mbox/"},{"id":14784,"url":"https://patchwork.plctlab.org/api/1.2/patches/14784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103093748.2671754-1-torbjorn.svensson@foss.st.com/","msgid":"<20221103093748.2671754-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-03T09:37:49","name":"[v2] c++: Use in-process client when networking is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103093748.2671754-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":14790,"url":"https://patchwork.plctlab.org/api/1.2/patches/14790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103095259.4095606-1-christophe.lyon@arm.com/","msgid":"<20221103095259.4095606-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-03T09:52:59","name":"[v2] genmultilib: Add sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103095259.4095606-1-christophe.lyon@arm.com/mbox/"},{"id":14826,"url":"https://patchwork.plctlab.org/api/1.2/patches/14826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103114152.708336-1-jwakely@redhat.com/","msgid":"<20221103114152.708336-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-03T11:41:52","name":"[committed] libstdc++: Add missing move in ranges::copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103114152.708336-1-jwakely@redhat.com/mbox/"},{"id":14843,"url":"https://patchwork.plctlab.org/api/1.2/patches/14843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103123340.1402161-1-ppalka@redhat.com/","msgid":"<20221103123340.1402161-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-03T12:33:40","name":"c++: constexpr error with defaulted virtual dtor [PR93413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103123340.1402161-1-ppalka@redhat.com/mbox/"},{"id":14873,"url":"https://patchwork.plctlab.org/api/1.2/patches/14873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aPtttQkEet6+FDeCkw4TJ+zSt-vT+Jy822vM=uh+PPfA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T13:23:03","name":"i386: Fix uninitialized register after peephole2 conversion [PR107404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aPtttQkEet6+FDeCkw4TJ+zSt-vT+Jy822vM=uh+PPfA@mail.gmail.com/mbox/"},{"id":14874,"url":"https://patchwork.plctlab.org/api/1.2/patches/14874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com/","msgid":"<23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com>","list_archive_url":null,"date":"2022-11-03T13:35:03","name":"OpenMP/Fortran: '\''target update'\'' with DT components (was: [Patch] OpenMP/Fortran: '\''target update'\'' with strides + DT components)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com/mbox/"},{"id":14878,"url":"https://patchwork.plctlab.org/api/1.2/patches/14878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com/","msgid":"<785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com>","list_archive_url":null,"date":"2022-11-03T13:43:06","name":"ifcvt: Support bitfield lowering of multiple-exit loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com/mbox/"},{"id":14919,"url":"https://patchwork.plctlab.org/api/1.2/patches/14919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103142440.2260186-1-dmalcolm@redhat.com/","msgid":"<20221103142440.2260186-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T14:24:40","name":"[committed] analyzer: fix ICE when pipe'\''s arg isn'\''t a pointer [PR107486]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103142440.2260186-1-dmalcolm@redhat.com/mbox/"},{"id":14953,"url":"https://patchwork.plctlab.org/api/1.2/patches/14953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103154530.1442773-1-ppalka@redhat.com/","msgid":"<20221103154530.1442773-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-03T15:45:30","name":"c++: requires-expr substitution and access checking [PR107179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103154530.1442773-1-ppalka@redhat.com/mbox/"},{"id":15019,"url":"https://patchwork.plctlab.org/api/1.2/patches/15019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com/","msgid":"<6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com>","list_archive_url":null,"date":"2022-11-03T16:49:31","name":"[COMMITTED] Update range query cache when a statement is updated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com/mbox/"},{"id":15039,"url":"https://patchwork.plctlab.org/api/1.2/patches/15039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f06aa3e6-99ac-bf5e-139b-c7686410db5b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T17:47:35","name":"amdgcn: Fix instruction generation for exp2 and log2 operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f06aa3e6-99ac-bf5e-139b-c7686410db5b@codesourcery.com/mbox/"},{"id":15054,"url":"https://patchwork.plctlab.org/api/1.2/patches/15054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-2-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:28","name":"[committed,1/8] analyzer: use std::unique_ptr for pending_diagnostic/note","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-2-dmalcolm@redhat.com/mbox/"},{"id":15049,"url":"https://patchwork.plctlab.org/api/1.2/patches/15049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-3-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:29","name":"[committed,2/8] analyzer: use std::unique_ptr for saved_diagnostic::m_stmt_finder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-3-dmalcolm@redhat.com/mbox/"},{"id":15051,"url":"https://patchwork.plctlab.org/api/1.2/patches/15051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-4-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:30","name":"[committed,3/8] analyzer: use std::unique_ptr for custom_edge_info pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-4-dmalcolm@redhat.com/mbox/"},{"id":15050,"url":"https://patchwork.plctlab.org/api/1.2/patches/15050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-5-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:31","name":"[committed,4/8] analyzer: use std::unique_ptr for feasibility_problems and exploded_path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-5-dmalcolm@redhat.com/mbox/"},{"id":15055,"url":"https://patchwork.plctlab.org/api/1.2/patches/15055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-6-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:32","name":"[committed,5/8] analyzer: use std::unique_ptr for checker_event","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-6-dmalcolm@redhat.com/mbox/"},{"id":15053,"url":"https://patchwork.plctlab.org/api/1.2/patches/15053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-7-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:33","name":"[committed,6/8] analyzer: use std::unique_ptr during bifurcation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-7-dmalcolm@redhat.com/mbox/"},{"id":15052,"url":"https://patchwork.plctlab.org/api/1.2/patches/15052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-8-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-8-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:34","name":"[committed,7/8] analyzer: use std::unique_ptr for known functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-8-dmalcolm@redhat.com/mbox/"},{"id":15056,"url":"https://patchwork.plctlab.org/api/1.2/patches/15056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-9-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-9-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:35","name":"[committed,8/8] analyzer: use std::unique_ptr for state machines from plugins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-9-dmalcolm@redhat.com/mbox/"},{"id":15102,"url":"https://patchwork.plctlab.org/api/1.2/patches/15102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103185238.2104412-1-jason@redhat.com/","msgid":"<20221103185238.2104412-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T18:52:38","name":"[pushed] c++: change -fconcepts to mean C++20 concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103185238.2104412-1-jason@redhat.com/mbox/"},{"id":15126,"url":"https://patchwork.plctlab.org/api/1.2/patches/15126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103192646.2108551-1-jason@redhat.com/","msgid":"<20221103192646.2108551-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:26:46","name":"[pushed] c++: change -fconcepts to mean C++20 concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103192646.2108551-1-jason@redhat.com/mbox/"},{"id":15127,"url":"https://patchwork.plctlab.org/api/1.2/patches/15127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com/","msgid":"<8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:28:59","name":"[COMMITTED] Add testcases resolved with ranger as VRP1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com/mbox/"},{"id":15152,"url":"https://patchwork.plctlab.org/api/1.2/patches/15152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195750.2113734-1-jason@redhat.com/","msgid":"<20221103195750.2113734-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:57:50","name":"[RFA] libstdc++: add experimental Contracts support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195750.2113734-1-jason@redhat.com/mbox/"},{"id":15153,"url":"https://patchwork.plctlab.org/api/1.2/patches/15153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195902.2114479-1-jason@redhat.com/","msgid":"<20221103195902.2114479-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:59:02","name":"[RFA] input: add get_source_text_between","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195902.2114479-1-jason@redhat.com/mbox/"},{"id":15185,"url":"https://patchwork.plctlab.org/api/1.2/patches/15185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103204741.516199-1-aldot@gcc.gnu.org/","msgid":"<20221103204741.516199-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-03T20:47:41","name":"cgraph_node: Remove redundant section clearing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103204741.516199-1-aldot@gcc.gnu.org/mbox/"},{"id":15194,"url":"https://patchwork.plctlab.org/api/1.2/patches/15194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103210049.516886-1-aldot@gcc.gnu.org/","msgid":"<20221103210049.516886-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-03T21:00:49","name":"Plug memory leak in attribute target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103210049.516886-1-aldot@gcc.gnu.org/mbox/"},{"id":15227,"url":"https://patchwork.plctlab.org/api/1.2/patches/15227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103232355.5eb1d235@nbbrfq/","msgid":"<20221103232355.5eb1d235@nbbrfq>","list_archive_url":null,"date":"2022-11-03T22:23:55","name":"RFH: attr target_clones default assembler name ignored?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103232355.5eb1d235@nbbrfq/mbox/"},{"id":15262,"url":"https://patchwork.plctlab.org/api/1.2/patches/15262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104000432.15254-1-hongyu.wang@intel.com/","msgid":"<20221104000432.15254-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-04T00:04:32","name":"Optimize VEC_PERM_EXPR with same permutation index and operation [PR98167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104000432.15254-1-hongyu.wang@intel.com/mbox/"},{"id":15264,"url":"https://patchwork.plctlab.org/api/1.2/patches/15264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104005331.775049-1-kevinl@rivosinc.com/","msgid":"<20221104005331.775049-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-04T00:53:31","name":"[v3] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104005331.775049-1-kevinl@rivosinc.com/mbox/"},{"id":15382,"url":"https://patchwork.plctlab.org/api/1.2/patches/15382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104063942.1594844-1-xry111@xry111.site/","msgid":"<20221104063942.1594844-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-04T06:39:41","name":"LoongArch: fix signed overflow in loongarch_emit_int_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104063942.1594844-1-xry111@xry111.site/mbox/"},{"id":15412,"url":"https://patchwork.plctlab.org/api/1.2/patches/15412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104074632.19951-1-haochen.jiang@intel.com/","msgid":"<20221104074632.19951-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-04T07:46:32","name":"Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104074632.19951-1-haochen.jiang@intel.com/mbox/"},{"id":15419,"url":"https://patchwork.plctlab.org/api/1.2/patches/15419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104081150.22062-1-haochen.jiang@intel.com/","msgid":"<20221104081150.22062-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-04T08:11:50","name":"Initial Granite Rapids support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104081150.22062-1-haochen.jiang@intel.com/mbox/"},{"id":15428,"url":"https://patchwork.plctlab.org/api/1.2/patches/15428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TVUXHelLjgA8Yq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:03:13","name":"libcpp: Update to Unicode 15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TVUXHelLjgA8Yq@tucnak/mbox/"},{"id":15429,"url":"https://patchwork.plctlab.org/api/1.2/patches/15429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pme32idj.fsf@euler.schwinge.homeip.net/","msgid":"<87pme32idj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-04T09:12:24","name":"Better integrate default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'' (was: Restore default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pme32idj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":15430,"url":"https://patchwork.plctlab.org/api/1.2/patches/15430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TX+6SSEZw1fIsz@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:14:35","name":"testsuite: Add testcase from C++23 P2314R4 - Character sets and encodings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TX+6SSEZw1fIsz@tucnak/mbox/"},{"id":15434,"url":"https://patchwork.plctlab.org/api/1.2/patches/15434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7447720.EvYhyI6sBW@fomalhaut/","msgid":"<7447720.EvYhyI6sBW@fomalhaut>","list_archive_url":null,"date":"2022-11-04T09:27:23","name":"Fix recent thinko in operand_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7447720.EvYhyI6sBW@fomalhaut/mbox/"},{"id":15444,"url":"https://patchwork.plctlab.org/api/1.2/patches/15444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rkr12mj.fsf@oldenburg.str.redhat.com/","msgid":"<878rkr12mj.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-11-04T09:37:56","name":"[v2] libgcc: Mostly vectorize CIE encoding extraction for FDEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rkr12mj.fsf@oldenburg.str.redhat.com/mbox/"},{"id":15449,"url":"https://patchwork.plctlab.org/api/1.2/patches/15449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRY=KG-cL4GtX-wZBKd06WjNtDyeTLPDgL8WvzkJaoJDzA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:51:17","name":"Update Affiliation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRY=KG-cL4GtX-wZBKd06WjNtDyeTLPDgL8WvzkJaoJDzA@mail.gmail.com/mbox/"},{"id":15451,"url":"https://patchwork.plctlab.org/api/1.2/patches/15451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cza32fxi.fsf@euler.schwinge.homeip.net/","msgid":"<87cza32fxi.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-04T10:05:13","name":"GCC 13: OpenMP offloading to Intel MIC has been removed (was: Remove support for Intel MIC offloading)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cza32fxi.fsf@euler.schwinge.homeip.net/mbox/"},{"id":15489,"url":"https://patchwork.plctlab.org/api/1.2/patches/15489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104121734.828189-1-jwakely@redhat.com/","msgid":"<20221104121734.828189-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T12:17:34","name":"doc: Document correct -fwide-exec-charset defaults [PR41041]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104121734.828189-1-jwakely@redhat.com/mbox/"},{"id":15504,"url":"https://patchwork.plctlab.org/api/1.2/patches/15504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104124800.910588-1-siddhesh@gotplt.org/","msgid":"<20221104124800.910588-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-11-04T12:48:00","name":"[v2] tree-object-size: Support strndup and strdup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104124800.910588-1-siddhesh@gotplt.org/mbox/"},{"id":15524,"url":"https://patchwork.plctlab.org/api/1.2/patches/15524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com/","msgid":"<44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:09","name":"[1/6] diagnostics: Fix macro tracking for ad-hoc locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15526,"url":"https://patchwork.plctlab.org/api/1.2/patches/15526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com/","msgid":"<65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:10","name":"[2/6] diagnostics: Use an inline function rather than hardcoding string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15525,"url":"https://patchwork.plctlab.org/api/1.2/patches/15525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com/","msgid":"<2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:11","name":"[3/6] libcpp: Fix paste error with unknown pragma after macro expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15527,"url":"https://patchwork.plctlab.org/api/1.2/patches/15527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbe5ba2a7d067eb725c0733ca3960fab969cf139.1667514153.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T13:44:12","name":"[4/6] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbe5ba2a7d067eb725c0733ca3960fab969cf139.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15528,"url":"https://patchwork.plctlab.org/api/1.2/patches/15528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bef0a344e3c76fa7deb8d3fbb9fcfb8cd2257f97.1667514153.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T13:44:13","name":"[5/6] diagnostics: Support generated data in additional contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bef0a344e3c76fa7deb8d3fbb9fcfb8cd2257f97.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15529,"url":"https://patchwork.plctlab.org/api/1.2/patches/15529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com/","msgid":"<3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:14","name":"[6/6] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15530,"url":"https://patchwork.plctlab.org/api/1.2/patches/15530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135338.85230-1-poulhies@adacore.com/","msgid":"<20221104135338.85230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:53:38","name":"[COMMITTED] ada: Generate host-side CUDA_Register_Function calls for device'\''s adainit/adafinal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135338.85230-1-poulhies@adacore.com/mbox/"},{"id":15531,"url":"https://patchwork.plctlab.org/api/1.2/patches/15531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135347.85341-1-poulhies@adacore.com/","msgid":"<20221104135347.85341-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:53:47","name":"[COMMITTED] ada: Reject expanded global names in lock-free protected objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135347.85341-1-poulhies@adacore.com/mbox/"},{"id":15533,"url":"https://patchwork.plctlab.org/api/1.2/patches/15533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135418.85406-1-poulhies@adacore.com/","msgid":"<20221104135418.85406-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:54:18","name":"[COMMITTED] ada: Remove VxWorks 6 and VxWorks 653 2.x content from the UGX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135418.85406-1-poulhies@adacore.com/mbox/"},{"id":15532,"url":"https://patchwork.plctlab.org/api/1.2/patches/15532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135427.85477-1-poulhies@adacore.com/","msgid":"<20221104135427.85477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:54:27","name":"[COMMITTED] ada: Support lock-free protected objects with pragma Initialize_Scalars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135427.85477-1-poulhies@adacore.com/mbox/"},{"id":15534,"url":"https://patchwork.plctlab.org/api/1.2/patches/15534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135551.85648-1-poulhies@adacore.com/","msgid":"<20221104135551.85648-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:55:51","name":"[COMMITTED] ada: Generate missing object decls for adainit/adafinal registration calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135551.85648-1-poulhies@adacore.com/mbox/"},{"id":15536,"url":"https://patchwork.plctlab.org/api/1.2/patches/15536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135613.85774-1-poulhies@adacore.com/","msgid":"<20221104135613.85774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:13","name":"[COMMITTED] ada: Allow enabling a restricted set of language extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135613.85774-1-poulhies@adacore.com/mbox/"},{"id":15540,"url":"https://patchwork.plctlab.org/api/1.2/patches/15540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135622.85834-1-poulhies@adacore.com/","msgid":"<20221104135622.85834-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:22","name":"[COMMITTED] ada: Small editorial changes to documentation comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135622.85834-1-poulhies@adacore.com/mbox/"},{"id":15545,"url":"https://patchwork.plctlab.org/api/1.2/patches/15545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135628.85893-1-poulhies@adacore.com/","msgid":"<20221104135628.85893-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:28","name":"[COMMITTED] ada: Improve efficiency of scope stack restoration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135628.85893-1-poulhies@adacore.com/mbox/"},{"id":15550,"url":"https://patchwork.plctlab.org/api/1.2/patches/15550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135636.85954-1-poulhies@adacore.com/","msgid":"<20221104135636.85954-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:36","name":"[COMMITTED] ada: Fix various typos in GNAT RM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135636.85954-1-poulhies@adacore.com/mbox/"},{"id":15537,"url":"https://patchwork.plctlab.org/api/1.2/patches/15537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135643.86019-1-poulhies@adacore.com/","msgid":"<20221104135643.86019-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:43","name":"[COMMITTED] ada: Fix various typos in node and entity description comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135643.86019-1-poulhies@adacore.com/mbox/"},{"id":15538,"url":"https://patchwork.plctlab.org/api/1.2/patches/15538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135649.86081-1-poulhies@adacore.com/","msgid":"<20221104135649.86081-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:49","name":"[COMMITTED] ada: Refactor: replace uses of `not Present(X)` with `No (X)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135649.86081-1-poulhies@adacore.com/mbox/"},{"id":15554,"url":"https://patchwork.plctlab.org/api/1.2/patches/15554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135654.86140-1-poulhies@adacore.com/","msgid":"<20221104135654.86140-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:54","name":"[COMMITTED] ada: Remove sa_messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135654.86140-1-poulhies@adacore.com/mbox/"},{"id":15542,"url":"https://patchwork.plctlab.org/api/1.2/patches/15542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135702.86200-1-poulhies@adacore.com/","msgid":"<20221104135702.86200-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:02","name":"[COMMITTED] ada: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135702.86200-1-poulhies@adacore.com/mbox/"},{"id":15544,"url":"https://patchwork.plctlab.org/api/1.2/patches/15544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135708.86262-1-poulhies@adacore.com/","msgid":"<20221104135708.86262-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:08","name":"[COMMITTED] ada: Skip dynamic interface conversion under configurable runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135708.86262-1-poulhies@adacore.com/mbox/"},{"id":15549,"url":"https://patchwork.plctlab.org/api/1.2/patches/15549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135713.86322-1-poulhies@adacore.com/","msgid":"<20221104135713.86322-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:13","name":"[COMMITTED] ada: Skip dynamic interface conversion under configurable runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135713.86322-1-poulhies@adacore.com/mbox/"},{"id":15553,"url":"https://patchwork.plctlab.org/api/1.2/patches/15553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135721.86383-1-poulhies@adacore.com/","msgid":"<20221104135721.86383-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:21","name":"[COMMITTED] ada: Simplify detection of controlling formals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135721.86383-1-poulhies@adacore.com/mbox/"},{"id":15558,"url":"https://patchwork.plctlab.org/api/1.2/patches/15558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135728.86443-1-poulhies@adacore.com/","msgid":"<20221104135728.86443-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:28","name":"[COMMITTED] ada: Fix repeated killing of private entity values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135728.86443-1-poulhies@adacore.com/mbox/"},{"id":15541,"url":"https://patchwork.plctlab.org/api/1.2/patches/15541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135734.86504-1-poulhies@adacore.com/","msgid":"<20221104135734.86504-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:34","name":"[COMMITTED] ada: Fix loop unnesting issue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135734.86504-1-poulhies@adacore.com/mbox/"},{"id":15560,"url":"https://patchwork.plctlab.org/api/1.2/patches/15560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135743.86571-1-poulhies@adacore.com/","msgid":"<20221104135743.86571-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:43","name":"[COMMITTED] ada: Fix various typos in GNAT User'\''s Guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135743.86571-1-poulhies@adacore.com/mbox/"},{"id":15547,"url":"https://patchwork.plctlab.org/api/1.2/patches/15547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135752.86633-1-poulhies@adacore.com/","msgid":"<20221104135752.86633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:52","name":"[COMMITTED] ada: Cleanup clearing flags on package variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135752.86633-1-poulhies@adacore.com/mbox/"},{"id":15552,"url":"https://patchwork.plctlab.org/api/1.2/patches/15552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135801.86694-1-poulhies@adacore.com/","msgid":"<20221104135801.86694-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:01","name":"[COMMITTED] ada: Avoid repeated iteration over private protected components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135801.86694-1-poulhies@adacore.com/mbox/"},{"id":15556,"url":"https://patchwork.plctlab.org/api/1.2/patches/15556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135810.86760-1-poulhies@adacore.com/","msgid":"<20221104135810.86760-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:10","name":"[COMMITTED] ada: Flag unsupported dispatching constructor calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135810.86760-1-poulhies@adacore.com/mbox/"},{"id":15546,"url":"https://patchwork.plctlab.org/api/1.2/patches/15546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135815.86869-1-poulhies@adacore.com/","msgid":"<20221104135815.86869-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:15","name":"[COMMITTED] ada: Remove redundant calls in handling of aspect specifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135815.86869-1-poulhies@adacore.com/mbox/"},{"id":15551,"url":"https://patchwork.plctlab.org/api/1.2/patches/15551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135824.86935-1-poulhies@adacore.com/","msgid":"<20221104135824.86935-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:24","name":"[COMMITTED] ada: Static intrinsic functions are a core language extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135824.86935-1-poulhies@adacore.com/mbox/"},{"id":15562,"url":"https://patchwork.plctlab.org/api/1.2/patches/15562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135831.86995-1-poulhies@adacore.com/","msgid":"<20221104135831.86995-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:31","name":"[COMMITTED] ada: Cleanup code for warnings about unset references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135831.86995-1-poulhies@adacore.com/mbox/"},{"id":15564,"url":"https://patchwork.plctlab.org/api/1.2/patches/15564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135838.87055-1-poulhies@adacore.com/","msgid":"<20221104135838.87055-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:38","name":"[COMMITTED] ada: Cleanup code for unreferenced variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135838.87055-1-poulhies@adacore.com/mbox/"},{"id":15555,"url":"https://patchwork.plctlab.org/api/1.2/patches/15555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135844.87117-1-poulhies@adacore.com/","msgid":"<20221104135844.87117-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:44","name":"[COMMITTED] ada: Cleanup code for warnings about unreferenced formal parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135844.87117-1-poulhies@adacore.com/mbox/"},{"id":15559,"url":"https://patchwork.plctlab.org/api/1.2/patches/15559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135850.87177-1-poulhies@adacore.com/","msgid":"<20221104135850.87177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:50","name":"[COMMITTED] ada: Fix typo in comment referring to pragma Restrictions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135850.87177-1-poulhies@adacore.com/mbox/"},{"id":15561,"url":"https://patchwork.plctlab.org/api/1.2/patches/15561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135856.87236-1-poulhies@adacore.com/","msgid":"<20221104135856.87236-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:56","name":"[COMMITTED] ada: Fix couple of issues with arrays indexed by enumeration type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135856.87236-1-poulhies@adacore.com/mbox/"},{"id":15563,"url":"https://patchwork.plctlab.org/api/1.2/patches/15563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135903.87298-1-poulhies@adacore.com/","msgid":"<20221104135903.87298-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:59:03","name":"[COMMITTED] ada: Fix for validity checks combined with aliasing checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135903.87298-1-poulhies@adacore.com/mbox/"},{"id":15565,"url":"https://patchwork.plctlab.org/api/1.2/patches/15565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140612.834725-1-jwakely@redhat.com/","msgid":"<20221104140612.834725-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:06:12","name":"[committed] libstdc++: Define _GNU_SOURCE for secure_getenv on Cygwin [PR107511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140612.834725-1-jwakely@redhat.com/mbox/"},{"id":15573,"url":"https://patchwork.plctlab.org/api/1.2/patches/15573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140618.834765-1-jwakely@redhat.com/","msgid":"<20221104140618.834765-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:06:18","name":"[committed] libstdc++: Simplify lifetime of eh_globals variable [PR107500]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140618.834765-1-jwakely@redhat.com/mbox/"},{"id":15583,"url":"https://patchwork.plctlab.org/api/1.2/patches/15583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104141905.312059-1-aldyh@redhat.com/","msgid":"<20221104141905.312059-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:19:05","name":"[COMMITTED] Set nonzero bits for multiplication and divisions by a power of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104141905.312059-1-aldyh@redhat.com/mbox/"},{"id":15606,"url":"https://patchwork.plctlab.org/api/1.2/patches/15606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104143719.1709284-1-xry111@xry111.site/","msgid":"<20221104143719.1709284-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-04T14:37:19","name":"LoongArch: Add fcopysign instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104143719.1709284-1-xry111@xry111.site/mbox/"},{"id":15607,"url":"https://patchwork.plctlab.org/api/1.2/patches/15607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104144026.2311096-1-jason@redhat.com/","msgid":"<20221104144026.2311096-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:40:26","name":"[RFC] c++: implement P1492 contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104144026.2311096-1-jason@redhat.com/mbox/"},{"id":15628,"url":"https://patchwork.plctlab.org/api/1.2/patches/15628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-1-ppalka@redhat.com/","msgid":"<20221104150525.2968778-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-04T15:05:24","name":"[1/2] c++: correct __has_attribute(init_priority)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-1-ppalka@redhat.com/mbox/"},{"id":15629,"url":"https://patchwork.plctlab.org/api/1.2/patches/15629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-2-ppalka@redhat.com/","msgid":"<20221104150525.2968778-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-04T15:05:25","name":"[2/2] libstdc++: Move stream initialization into compiled library [PR44952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-2-ppalka@redhat.com/mbox/"},{"id":15680,"url":"https://patchwork.plctlab.org/api/1.2/patches/15680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104173920.5313660c@nbbrfq/","msgid":"<20221104173920.5313660c@nbbrfq>","list_archive_url":null,"date":"2022-11-04T16:39:20","name":"symtab: also change RTL decl name [was: RFH: attr target_clones default assembler name ignored?]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104173920.5313660c@nbbrfq/mbox/"},{"id":15708,"url":"https://patchwork.plctlab.org/api/1.2/patches/15708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB3PR08MB89866C068CE122E2FEEF152E833B9@DB3PR08MB8986.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T17:11:40","name":"[committed] AArch64: Fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB3PR08MB89866C068CE122E2FEEF152E833B9@DB3PR08MB8986.eurprd08.prod.outlook.com/mbox/"},{"id":15723,"url":"https://patchwork.plctlab.org/api/1.2/patches/15723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104172537.1039148-1-richard.purdie@linuxfoundation.org/","msgid":"<20221104172537.1039148-1-richard.purdie@linuxfoundation.org>","list_archive_url":null,"date":"2022-11-04T17:25:37","name":"gcc/file-prefix-map: Fix NULL filename handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104172537.1039148-1-richard.purdie@linuxfoundation.org/mbox/"},{"id":15973,"url":"https://patchwork.plctlab.org/api/1.2/patches/15973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105140155.1206577-1-jwakely@redhat.com/","msgid":"<20221105140155.1206577-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-05T14:01:55","name":"[committed] libstdc++: Do not use SFINAE for propagate_const conversions [PR107525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105140155.1206577-1-jwakely@redhat.com/mbox/"},{"id":16012,"url":"https://patchwork.plctlab.org/api/1.2/patches/16012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191021.3081198-1-ibuclaw@gdcproject.org/","msgid":"<20221105191021.3081198-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-05T19:10:21","name":"[committed] d: Add support for vector comparison operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191021.3081198-1-ibuclaw@gdcproject.org/mbox/"},{"id":16013,"url":"https://patchwork.plctlab.org/api/1.2/patches/16013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191906.3087155-1-ibuclaw@gdcproject.org/","msgid":"<20221105191906.3087155-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-05T19:19:06","name":"[committed] d: Adjust attr_register2.d to pass when compiling with -m32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191906.3087155-1-ibuclaw@gdcproject.org/mbox/"},{"id":16039,"url":"https://patchwork.plctlab.org/api/1.2/patches/16039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dee92d68-139c-9a2d-325e-2c3f402291e8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-05T22:28:47","name":"Fortran: Fix reallocation on assignment for kind=4 strings [PR107508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dee92d68-139c-9a2d-325e-2c3f402291e8@codesourcery.com/mbox/"},{"id":16042,"url":"https://patchwork.plctlab.org/api/1.2/patches/16042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225423.AFA9633E1C@hamza.pair.com/","msgid":"<20221105225423.AFA9633E1C@hamza.pair.com>","list_archive_url":null,"date":"2022-11-05T22:54:20","name":"[committed] wwwdocs: codingrationale: Switch www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225423.AFA9633E1C@hamza.pair.com/mbox/"},{"id":16043,"url":"https://patchwork.plctlab.org/api/1.2/patches/16043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225906.CC21733E18@hamza.pair.com/","msgid":"<20221105225906.CC21733E18@hamza.pair.com>","list_archive_url":null,"date":"2022-11-05T22:59:04","name":"[committed] wwwdocs: gcc-4.8: Move three links from http to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225906.CC21733E18@hamza.pair.com/mbox/"},{"id":16054,"url":"https://patchwork.plctlab.org/api/1.2/patches/16054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106000102.18696-1-kito.cheng@sifive.com/","msgid":"<20221106000102.18696-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-11-06T00:01:02","name":"RISC-V: Fix RVV related testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106000102.18696-1-kito.cheng@sifive.com/mbox/"},{"id":16102,"url":"https://patchwork.plctlab.org/api/1.2/patches/16102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106085633.267351-1-juzhe.zhong@rivai.ai/","msgid":"<20221106085633.267351-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-06T08:56:33","name":"RISC-V: Add RVV registers register spilling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106085633.267351-1-juzhe.zhong@rivai.ai/mbox/"},{"id":16132,"url":"https://patchwork.plctlab.org/api/1.2/patches/16132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870D12EAC564A973CA9788EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-06T12:55:41","name":"Support Intel RAO-INT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870D12EAC564A973CA9788EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16133,"url":"https://patchwork.plctlab.org/api/1.2/patches/16133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487D12DCC77C6F69B1B6775EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-06T12:59:25","name":"i386: Prefer remote atomic insn for atomic_fetch{add, and, or, xor}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487D12DCC77C6F69B1B6775EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16157,"url":"https://patchwork.plctlab.org/api/1.2/patches/16157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106161420.522485-1-aldyh@redhat.com/","msgid":"<20221106161420.522485-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-06T16:14:20","name":"Use bit-CCP in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106161420.522485-1-aldyh@redhat.com/mbox/"},{"id":16212,"url":"https://patchwork.plctlab.org/api/1.2/patches/16212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-2-haochen.jiang@intel.com/","msgid":"<20221107014114.71155-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-07T01:41:13","name":"[1/2] Initial Grand Ridge support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-2-haochen.jiang@intel.com/mbox/"},{"id":16213,"url":"https://patchwork.plctlab.org/api/1.2/patches/16213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-3-haochen.jiang@intel.com/","msgid":"<20221107014114.71155-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-07T01:41:14","name":"[2/2] Add m_CORE_ATOM for atom cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-3-haochen.jiang@intel.com/mbox/"},{"id":16262,"url":"https://patchwork.plctlab.org/api/1.2/patches/16262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com/","msgid":"<91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com>","list_archive_url":null,"date":"2022-11-07T06:45:05","name":"[v4,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com/mbox/"},{"id":16292,"url":"https://patchwork.plctlab.org/api/1.2/patches/16292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2i/dVyDDbzKHeoO@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:19:01","name":"libstdc++: Update from latest fast_float [PR107468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2i/dVyDDbzKHeoO@tucnak/mbox/"},{"id":16293,"url":"https://patchwork.plctlab.org/api/1.2/patches/16293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2jA5jLpvM8e2Cfu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:25:10","name":"[committed] Add another commit to ignore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2jA5jLpvM8e2Cfu@tucnak/mbox/"},{"id":16296,"url":"https://patchwork.plctlab.org/api/1.2/patches/16296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083828.150145-1-poulhies@adacore.com/","msgid":"<20221107083828.150145-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:38:28","name":"[COMMITTED] ada: Remove useless validity suppression for attribute Input","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083828.150145-1-poulhies@adacore.com/mbox/"},{"id":16297,"url":"https://patchwork.plctlab.org/api/1.2/patches/16297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083901.150264-1-poulhies@adacore.com/","msgid":"<20221107083901.150264-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:01","name":"[COMMITTED] ada: Fix missing tag for with of an obsolescent function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083901.150264-1-poulhies@adacore.com/mbox/"},{"id":16298,"url":"https://patchwork.plctlab.org/api/1.2/patches/16298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083913.150332-1-poulhies@adacore.com/","msgid":"<20221107083913.150332-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:13","name":"[COMMITTED] ada: Reject misplaced pragma Obsolescent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083913.150332-1-poulhies@adacore.com/mbox/"},{"id":16299,"url":"https://patchwork.plctlab.org/api/1.2/patches/16299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083922.150400-1-poulhies@adacore.com/","msgid":"<20221107083922.150400-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:22","name":"[COMMITTED] ada: Simplify detection of pragmas in the context items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083922.150400-1-poulhies@adacore.com/mbox/"},{"id":16300,"url":"https://patchwork.plctlab.org/api/1.2/patches/16300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083928.150465-1-poulhies@adacore.com/","msgid":"<20221107083928.150465-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:28","name":"[COMMITTED] ada: Don'\''t reuse operator nodes in expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083928.150465-1-poulhies@adacore.com/mbox/"},{"id":16301,"url":"https://patchwork.plctlab.org/api/1.2/patches/16301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083934.150530-1-poulhies@adacore.com/","msgid":"<20221107083934.150530-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:34","name":"[COMMITTED] ada: Create operator nodes in functional style","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083934.150530-1-poulhies@adacore.com/mbox/"},{"id":16302,"url":"https://patchwork.plctlab.org/api/1.2/patches/16302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083940.150593-1-poulhies@adacore.com/","msgid":"<20221107083940.150593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:40","name":"[COMMITTED] ada: Cleanup WITH clauses after switching from obsolescent Ada 83 unit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083940.150593-1-poulhies@adacore.com/mbox/"},{"id":16303,"url":"https://patchwork.plctlab.org/api/1.2/patches/16303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083944.150656-1-poulhies@adacore.com/","msgid":"<20221107083944.150656-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:44","name":"[COMMITTED] ada: Tune layout after switching to Ada 2022 aggregate syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083944.150656-1-poulhies@adacore.com/mbox/"},{"id":16307,"url":"https://patchwork.plctlab.org/api/1.2/patches/16307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083950.150721-1-poulhies@adacore.com/","msgid":"<20221107083950.150721-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:50","name":"[COMMITTED] ada: Put_Image aspect spec incorrectly not inherited","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083950.150721-1-poulhies@adacore.com/mbox/"},{"id":16311,"url":"https://patchwork.plctlab.org/api/1.2/patches/16311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083955.150787-1-poulhies@adacore.com/","msgid":"<20221107083955.150787-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:55","name":"[COMMITTED] ada: Cleanup comment about mapping parameters when inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083955.150787-1-poulhies@adacore.com/mbox/"},{"id":16306,"url":"https://patchwork.plctlab.org/api/1.2/patches/16306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083959.150855-1-poulhies@adacore.com/","msgid":"<20221107083959.150855-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:59","name":"[COMMITTED] ada: Clean up code for visibility of generic actuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083959.150855-1-poulhies@adacore.com/mbox/"},{"id":16314,"url":"https://patchwork.plctlab.org/api/1.2/patches/16314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084005.150919-1-poulhies@adacore.com/","msgid":"<20221107084005.150919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:05","name":"[COMMITTED] ada: Clean up unnecesary call in resolution of overloaded expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084005.150919-1-poulhies@adacore.com/mbox/"},{"id":16309,"url":"https://patchwork.plctlab.org/api/1.2/patches/16309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084011.150984-1-poulhies@adacore.com/","msgid":"<20221107084011.150984-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:11","name":"[COMMITTED] ada: Allow reuse of Enclosing_Declaration_Or_Statement by GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084011.150984-1-poulhies@adacore.com/mbox/"},{"id":16305,"url":"https://patchwork.plctlab.org/api/1.2/patches/16305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084016.151048-1-poulhies@adacore.com/","msgid":"<20221107084016.151048-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:16","name":"[COMMITTED] ada: Reject boxes in delta array aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084016.151048-1-poulhies@adacore.com/mbox/"},{"id":16308,"url":"https://patchwork.plctlab.org/api/1.2/patches/16308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084021.151112-1-poulhies@adacore.com/","msgid":"<20221107084021.151112-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:21","name":"[COMMITTED] ada: Remove redundant suppression for non-modified IN OUT parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084021.151112-1-poulhies@adacore.com/mbox/"},{"id":16318,"url":"https://patchwork.plctlab.org/api/1.2/patches/16318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084026.151175-1-poulhies@adacore.com/","msgid":"<20221107084026.151175-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:26","name":"[COMMITTED] ada: Cleanup detection of code within generic instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084026.151175-1-poulhies@adacore.com/mbox/"},{"id":16312,"url":"https://patchwork.plctlab.org/api/1.2/patches/16312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084034.151239-1-poulhies@adacore.com/","msgid":"<20221107084034.151239-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:34","name":"[COMMITTED] ada: Flip warning suppression routine to positive meaning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084034.151239-1-poulhies@adacore.com/mbox/"},{"id":16315,"url":"https://patchwork.plctlab.org/api/1.2/patches/16315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084040.151303-1-poulhies@adacore.com/","msgid":"<20221107084040.151303-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:40","name":"[COMMITTED] ada: Deconstruct Safe_To_Capture_In_Parameter_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084040.151303-1-poulhies@adacore.com/mbox/"},{"id":16321,"url":"https://patchwork.plctlab.org/api/1.2/patches/16321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084046.151369-1-poulhies@adacore.com/","msgid":"<20221107084046.151369-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:46","name":"[COMMITTED] ada: Suppress warnings on derived True/False","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084046.151369-1-poulhies@adacore.com/mbox/"},{"id":16313,"url":"https://patchwork.plctlab.org/api/1.2/patches/16313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084050.151435-1-poulhies@adacore.com/","msgid":"<20221107084050.151435-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:50","name":"[COMMITTED] ada: Clean up unnecessary nesting in code for DLL libraries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084050.151435-1-poulhies@adacore.com/mbox/"},{"id":16324,"url":"https://patchwork.plctlab.org/api/1.2/patches/16324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084055.151501-1-poulhies@adacore.com/","msgid":"<20221107084055.151501-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:55","name":"[COMMITTED] ada: Fix detection of external calls to protected objects in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084055.151501-1-poulhies@adacore.com/mbox/"},{"id":16310,"url":"https://patchwork.plctlab.org/api/1.2/patches/16310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084059.151565-1-poulhies@adacore.com/","msgid":"<20221107084059.151565-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:59","name":"[COMMITTED] ada: Rework CUDA host-side invocation of device-side elaboration code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084059.151565-1-poulhies@adacore.com/mbox/"},{"id":16317,"url":"https://patchwork.plctlab.org/api/1.2/patches/16317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084103.151630-1-poulhies@adacore.com/","msgid":"<20221107084103.151630-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:03","name":"[COMMITTED] ada: Fixed elaboration of CUDA programs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084103.151630-1-poulhies@adacore.com/mbox/"},{"id":16319,"url":"https://patchwork.plctlab.org/api/1.2/patches/16319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084108.151693-1-poulhies@adacore.com/","msgid":"<20221107084108.151693-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:08","name":"[COMMITTED] ada: Fix inherited postconditions in inlined subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084108.151693-1-poulhies@adacore.com/mbox/"},{"id":16325,"url":"https://patchwork.plctlab.org/api/1.2/patches/16325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084114.151758-1-poulhies@adacore.com/","msgid":"<20221107084114.151758-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:14","name":"[COMMITTED] ada: Inline composite node kind AST queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084114.151758-1-poulhies@adacore.com/mbox/"},{"id":16320,"url":"https://patchwork.plctlab.org/api/1.2/patches/16320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084129.151825-1-poulhies@adacore.com/","msgid":"<20221107084129.151825-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:29","name":"[COMMITTED] ada: New warning about noncomposing user-defined \"=\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084129.151825-1-poulhies@adacore.com/mbox/"},{"id":16322,"url":"https://patchwork.plctlab.org/api/1.2/patches/16322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084135.151888-1-poulhies@adacore.com/","msgid":"<20221107084135.151888-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:35","name":"[COMMITTED] ada: Use named notation in calls to Expand_Composite_Equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084135.151888-1-poulhies@adacore.com/mbox/"},{"id":16326,"url":"https://patchwork.plctlab.org/api/1.2/patches/16326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084140.151953-1-poulhies@adacore.com/","msgid":"<20221107084140.151953-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:40","name":"[COMMITTED] ada: Fix performance regression related to references in Refined_State","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084140.151953-1-poulhies@adacore.com/mbox/"},{"id":16327,"url":"https://patchwork.plctlab.org/api/1.2/patches/16327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084147.152022-1-poulhies@adacore.com/","msgid":"<20221107084147.152022-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:47","name":"[COMMITTED] ada: Tune hash function for cross-reference entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084147.152022-1-poulhies@adacore.com/mbox/"},{"id":16323,"url":"https://patchwork.plctlab.org/api/1.2/patches/16323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084152.152087-1-poulhies@adacore.com/","msgid":"<20221107084152.152087-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:52","name":"[COMMITTED] ada: Document that gprof won'\''t work on windows with PIE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084152.152087-1-poulhies@adacore.com/mbox/"},{"id":16328,"url":"https://patchwork.plctlab.org/api/1.2/patches/16328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz/","msgid":"<75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz>","list_archive_url":null,"date":"2022-11-07T08:51:08","name":"[(pushed)] Mitigate clang warnings:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz/mbox/"},{"id":16331,"url":"https://patchwork.plctlab.org/api/1.2/patches/16331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkra6539m5r.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:57:52","name":"[10/15,V4] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkra6539m5r.fsf_-_@arm.com/mbox/"},{"id":16332,"url":"https://patchwork.plctlab.org/api/1.2/patches/16332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107090211.E59EA13494@imap2.suse-dmz.suse.de/","msgid":"<20221107090211.E59EA13494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-07T09:02:11","name":"[RFC] tree-optimization/107389 - use __builtin_assume_alignment at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107090211.E59EA13494@imap2.suse-dmz.suse.de/mbox/"},{"id":16346,"url":"https://patchwork.plctlab.org/api/1.2/patches/16346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870966ACA7650A8A81A230EC3C9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-07T09:32:20","name":"[committed] i386: Fix typo in sse-22.c pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870966ACA7650A8A81A230EC3C9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16349,"url":"https://patchwork.plctlab.org/api/1.2/patches/16349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107094645.3718427-1-jcmvbkbc@gmail.com/","msgid":"<20221107094645.3718427-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-07T09:46:45","name":"[RFA] gcc: fix PR rtl-optimization/107482","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107094645.3718427-1-jcmvbkbc@gmail.com/mbox/"},{"id":16381,"url":"https://patchwork.plctlab.org/api/1.2/patches/16381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107114238.663927-1-aldyh@redhat.com/","msgid":"<20221107114238.663927-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-07T11:42:38","name":"[COMMITTED,range-op] Restrict division by power of 2 optimization to positive numbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107114238.663927-1-aldyh@redhat.com/mbox/"},{"id":16404,"url":"https://patchwork.plctlab.org/api/1.2/patches/16404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107130302.22073-1-amonakov@ispras.ru/","msgid":"<20221107130302.22073-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-07T13:03:02","name":"[committed] tree-ssa-sink: do not touch calls that return twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107130302.22073-1-amonakov@ispras.ru/mbox/"},{"id":16411,"url":"https://patchwork.plctlab.org/api/1.2/patches/16411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0yesygv.fsf_-_@debian/","msgid":"<87r0yesygv.fsf_-_@debian>","list_archive_url":null,"date":"2022-11-07T13:09:20","name":"[v2,16/19] modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0yesygv.fsf_-_@debian/mbox/"},{"id":16475,"url":"https://patchwork.plctlab.org/api/1.2/patches/16475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de/","msgid":"<20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-07T14:26:20","name":"unswitching of outer loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de/mbox/"},{"id":16635,"url":"https://patchwork.plctlab.org/api/1.2/patches/16635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29a64538-62fa-63a6-39ed-ed9165679e43@acm.org/","msgid":"<29a64538-62fa-63a6-39ed-ed9165679e43@acm.org>","list_archive_url":null,"date":"2022-11-07T18:27:56","name":"C++: Template lambda mangling testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29a64538-62fa-63a6-39ed-ed9165679e43@acm.org/mbox/"},{"id":16639,"url":"https://patchwork.plctlab.org/api/1.2/patches/16639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107185801.326-1-palmer@rivosinc.com/","msgid":"<20221107185801.326-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-07T18:58:01","name":"invoke: RISC-V'\''s -march doesn'\''t take ISA strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107185801.326-1-palmer@rivosinc.com/mbox/"},{"id":16661,"url":"https://patchwork.plctlab.org/api/1.2/patches/16661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107195856.791257-1-aldyh@redhat.com/","msgid":"<20221107195856.791257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-07T19:58:56","name":"[COMMITTED] Improve multiplication by powers of 2 in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107195856.791257-1-aldyh@redhat.com/mbox/"},{"id":16677,"url":"https://patchwork.plctlab.org/api/1.2/patches/16677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107205752.2735464-1-jason@redhat.com/","msgid":"<20221107205752.2735464-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-07T20:57:52","name":"[RFC(libstdc++)] c++: implement P2468R2, the equality operator you are looking for","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107205752.2735464-1-jason@redhat.com/mbox/"},{"id":16741,"url":"https://patchwork.plctlab.org/api/1.2/patches/16741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de/","msgid":"<24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de>","list_archive_url":null,"date":"2022-11-07T21:45:47","name":"[v3] Fortran: ordering of hidden procedure arguments [PR107441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de/mbox/"},{"id":16747,"url":"https://patchwork.plctlab.org/api/1.2/patches/16747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224254.12230-1-david.faust@oracle.com/","msgid":"<20221107224254.12230-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-07T22:42:54","name":"[committed] bpf: cleanup missed refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224254.12230-1-david.faust@oracle.com/mbox/"},{"id":16749,"url":"https://patchwork.plctlab.org/api/1.2/patches/16749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224829.12440-1-david.faust@oracle.com/","msgid":"<20221107224829.12440-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-07T22:48:29","name":"bpf: Use enum for resolved overloaded builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224829.12440-1-david.faust@oracle.com/mbox/"},{"id":16787,"url":"https://patchwork.plctlab.org/api/1.2/patches/16787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com/","msgid":"<3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com>","list_archive_url":null,"date":"2022-11-08T00:23:01","name":"[COMMITTED] PR tree-optimization/104530 - Add transitive inferred range processing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com/mbox/"},{"id":16794,"url":"https://patchwork.plctlab.org/api/1.2/patches/16794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108011751.286433-1-hongtao.liu@intel.com/","msgid":"<20221108011751.286433-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-08T01:17:51","name":"Fix incorrect insn type to avoid ICE in memory attr auto-detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108011751.286433-1-hongtao.liu@intel.com/mbox/"},{"id":16821,"url":"https://patchwork.plctlab.org/api/1.2/patches/16821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com/","msgid":"<454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-08T02:48:56","name":"rtl: Try to remove EH edges after {pro,epi}logue generation [PR90259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com/mbox/"},{"id":16822,"url":"https://patchwork.plctlab.org/api/1.2/patches/16822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025322.6499-1-lili.cui@intel.com/","msgid":"<20221108025322.6499-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-11-08T02:53:22","name":"Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025322.6499-1-lili.cui@intel.com/mbox/"},{"id":16823,"url":"https://patchwork.plctlab.org/api/1.2/patches/16823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025725.2493707-1-dmalcolm@redhat.com/","msgid":"<20221108025725.2493707-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:25","name":"[committed] analyzer: fix \"when '\''strchr'\'' returns non-NULL\" message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025725.2493707-1-dmalcolm@redhat.com/mbox/"},{"id":16824,"url":"https://patchwork.plctlab.org/api/1.2/patches/16824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025729.2493732-1-dmalcolm@redhat.com/","msgid":"<20221108025729.2493732-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:29","name":"[committed] analyzer: introduce succeed_or_fail_call_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025729.2493732-1-dmalcolm@redhat.com/mbox/"},{"id":16825,"url":"https://patchwork.plctlab.org/api/1.2/patches/16825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025733.2493756-1-dmalcolm@redhat.com/","msgid":"<20221108025733.2493756-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:33","name":"[commited] analyzer: start adding support for errno","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025733.2493756-1-dmalcolm@redhat.com/mbox/"},{"id":16828,"url":"https://patchwork.plctlab.org/api/1.2/patches/16828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030252.2494185-1-dmalcolm@redhat.com/","msgid":"<20221108030252.2494185-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:02:52","name":"analyzer: add warnings relating to sockets [PR106140]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030252.2494185-1-dmalcolm@redhat.com/mbox/"},{"id":16837,"url":"https://patchwork.plctlab.org/api/1.2/patches/16837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030940.1539533-1-jwakely@redhat.com/","msgid":"<20221108030940.1539533-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:09:40","name":"[committed] libstdc++: Remove empty elements in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030940.1539533-1-jwakely@redhat.com/mbox/"},{"id":16838,"url":"https://patchwork.plctlab.org/api/1.2/patches/16838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030951.1539586-1-jwakely@redhat.com/","msgid":"<20221108030951.1539586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:09:51","name":"[committed] libstdc++: Update my author blurb in the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030951.1539586-1-jwakely@redhat.com/mbox/"},{"id":16856,"url":"https://patchwork.plctlab.org/api/1.2/patches/16856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108043657.2064455-1-kevinl@rivosinc.com/","msgid":"<20221108043657.2064455-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-08T04:36:58","name":"[v2] RISC-V missing __builtin_lceil and __builtin_lfloor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108043657.2064455-1-kevinl@rivosinc.com/mbox/"},{"id":16890,"url":"https://patchwork.plctlab.org/api/1.2/patches/16890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108071438.2523863-1-sam@gentoo.org/","msgid":"<20221108071438.2523863-1-sam@gentoo.org>","list_archive_url":null,"date":"2022-11-08T07:14:38","name":"maintainer-scripts/gcc_release: compress xz in parallel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108071438.2523863-1-sam@gentoo.org/mbox/"},{"id":16931,"url":"https://patchwork.plctlab.org/api/1.2/patches/16931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084123.300670-1-poulhies@adacore.com/","msgid":"<20221108084123.300670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:23","name":"[COMMITTED] ada: Add new -gnatw_q switch to usage message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084123.300670-1-poulhies@adacore.com/mbox/"},{"id":16932,"url":"https://patchwork.plctlab.org/api/1.2/patches/16932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084133.300737-1-poulhies@adacore.com/","msgid":"<20221108084133.300737-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:33","name":"[COMMITTED] ada: Raise Tag_Error when Ada.Tags operations are called with No_Tag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084133.300737-1-poulhies@adacore.com/mbox/"},{"id":16934,"url":"https://patchwork.plctlab.org/api/1.2/patches/16934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084139.300802-1-poulhies@adacore.com/","msgid":"<20221108084139.300802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:39","name":"[COMMITTED] ada: Missing master of task causing assertion failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084139.300802-1-poulhies@adacore.com/mbox/"},{"id":16937,"url":"https://patchwork.plctlab.org/api/1.2/patches/16937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084144.300867-1-poulhies@adacore.com/","msgid":"<20221108084144.300867-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:44","name":"[COMMITTED] ada: Reject record delta aggregates with limited expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084144.300867-1-poulhies@adacore.com/mbox/"},{"id":16933,"url":"https://patchwork.plctlab.org/api/1.2/patches/16933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084150.300930-1-poulhies@adacore.com/","msgid":"<20221108084150.300930-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:50","name":"[COMMITTED] ada: Allow initialization of limited objects with delta aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084150.300930-1-poulhies@adacore.com/mbox/"},{"id":16936,"url":"https://patchwork.plctlab.org/api/1.2/patches/16936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084155.300994-1-poulhies@adacore.com/","msgid":"<20221108084155.300994-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:55","name":"[COMMITTED] ada: Reject limited objects in array and record delta aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084155.300994-1-poulhies@adacore.com/mbox/"},{"id":16935,"url":"https://patchwork.plctlab.org/api/1.2/patches/16935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084201.301060-1-poulhies@adacore.com/","msgid":"<20221108084201.301060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:01","name":"[COMMITTED] ada: Remove obsolete code in Resolve_If_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084201.301060-1-poulhies@adacore.com/mbox/"},{"id":16940,"url":"https://patchwork.plctlab.org/api/1.2/patches/16940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084207.301124-1-poulhies@adacore.com/","msgid":"<20221108084207.301124-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:07","name":"[COMMITTED] ada: Cleanup local variable that is only set as an out parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084207.301124-1-poulhies@adacore.com/mbox/"},{"id":16939,"url":"https://patchwork.plctlab.org/api/1.2/patches/16939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084212.301188-1-poulhies@adacore.com/","msgid":"<20221108084212.301188-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:12","name":"[COMMITTED] ada: Remove unneeded code in handling formal type defaults","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084212.301188-1-poulhies@adacore.com/mbox/"},{"id":16943,"url":"https://patchwork.plctlab.org/api/1.2/patches/16943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084217.301254-1-poulhies@adacore.com/","msgid":"<20221108084217.301254-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:17","name":"[COMMITTED] ada: Fix inconsistent whitespace in Ada.Numerics.Generic_Complex_Arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084217.301254-1-poulhies@adacore.com/mbox/"},{"id":16945,"url":"https://patchwork.plctlab.org/api/1.2/patches/16945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084222.301318-1-poulhies@adacore.com/","msgid":"<20221108084222.301318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:22","name":"[COMMITTED] ada: Fix expansion of '\''Wide_Image and '\''Wide_Wide_Image on composite types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084222.301318-1-poulhies@adacore.com/mbox/"},{"id":16941,"url":"https://patchwork.plctlab.org/api/1.2/patches/16941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084227.301381-1-poulhies@adacore.com/","msgid":"<20221108084227.301381-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:27","name":"[COMMITTED] ada: Preanalyze classwide contracts as spec expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084227.301381-1-poulhies@adacore.com/mbox/"},{"id":16944,"url":"https://patchwork.plctlab.org/api/1.2/patches/16944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084234.301451-1-poulhies@adacore.com/","msgid":"<20221108084234.301451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:34","name":"[COMMITTED] ada: Remove redundant line in Analyze_Qualified_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084234.301451-1-poulhies@adacore.com/mbox/"},{"id":16946,"url":"https://patchwork.plctlab.org/api/1.2/patches/16946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084238.301516-1-poulhies@adacore.com/","msgid":"<20221108084238.301516-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:38","name":"[COMMITTED] ada: Minor consistency tweaks in Sem_Ch4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084238.301516-1-poulhies@adacore.com/mbox/"},{"id":16948,"url":"https://patchwork.plctlab.org/api/1.2/patches/16948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084244.301581-1-poulhies@adacore.com/","msgid":"<20221108084244.301581-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:44","name":"[COMMITTED] ada: Improve handling of declare expressions in deferred-freezing contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084244.301581-1-poulhies@adacore.com/mbox/"},{"id":16938,"url":"https://patchwork.plctlab.org/api/1.2/patches/16938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084250.301647-1-poulhies@adacore.com/","msgid":"<20221108084250.301647-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:50","name":"[COMMITTED] ada: Align -gnatwc'\''s documentation with its behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084250.301647-1-poulhies@adacore.com/mbox/"},{"id":16949,"url":"https://patchwork.plctlab.org/api/1.2/patches/16949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084258.301710-1-poulhies@adacore.com/","msgid":"<20221108084258.301710-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:58","name":"[COMMITTED] ada: Move warnings switches -- initial work","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084258.301710-1-poulhies@adacore.com/mbox/"},{"id":16953,"url":"https://patchwork.plctlab.org/api/1.2/patches/16953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084303.301774-1-poulhies@adacore.com/","msgid":"<20221108084303.301774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:03","name":"[COMMITTED] ada: Enforce matching of extra formals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084303.301774-1-poulhies@adacore.com/mbox/"},{"id":16942,"url":"https://patchwork.plctlab.org/api/1.2/patches/16942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084315.301840-1-poulhies@adacore.com/","msgid":"<20221108084315.301840-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:15","name":"[COMMITTED] ada: Implement RM 4.5.7(10/3) name resolution rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084315.301840-1-poulhies@adacore.com/mbox/"},{"id":16952,"url":"https://patchwork.plctlab.org/api/1.2/patches/16952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084321.301906-1-poulhies@adacore.com/","msgid":"<20221108084321.301906-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:21","name":"[COMMITTED] ada: Propagate aspect Ghost when instantiating null formal procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084321.301906-1-poulhies@adacore.com/mbox/"},{"id":16947,"url":"https://patchwork.plctlab.org/api/1.2/patches/16947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084331.301970-1-poulhies@adacore.com/","msgid":"<20221108084331.301970-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:31","name":"[COMMITTED] ada: Small consistency fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084331.301970-1-poulhies@adacore.com/mbox/"},{"id":16950,"url":"https://patchwork.plctlab.org/api/1.2/patches/16950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084340.302036-1-poulhies@adacore.com/","msgid":"<20221108084340.302036-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:40","name":"[COMMITTED] ada: Set Support_Atomic_Primitives for VxWorks 7 runtimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084340.302036-1-poulhies@adacore.com/mbox/"},{"id":16951,"url":"https://patchwork.plctlab.org/api/1.2/patches/16951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084344.302102-1-poulhies@adacore.com/","msgid":"<20221108084344.302102-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:44","name":"[COMMITTED] ada: Adjust classwide contract expression preanalysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084344.302102-1-poulhies@adacore.com/mbox/"},{"id":16954,"url":"https://patchwork.plctlab.org/api/1.2/patches/16954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084350.302166-1-poulhies@adacore.com/","msgid":"<20221108084350.302166-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:50","name":"[COMMITTED] ada: Clean up call to check if aspects are present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084350.302166-1-poulhies@adacore.com/mbox/"},{"id":16956,"url":"https://patchwork.plctlab.org/api/1.2/patches/16956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084355.302230-1-poulhies@adacore.com/","msgid":"<20221108084355.302230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:55","name":"[COMMITTED] ada: Compile-time simplification of '\''Image incorrectly ignores Put_Image","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084355.302230-1-poulhies@adacore.com/mbox/"},{"id":16955,"url":"https://patchwork.plctlab.org/api/1.2/patches/16955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084400.302294-1-poulhies@adacore.com/","msgid":"<20221108084400.302294-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:44:00","name":"[COMMITTED] ada: Fix oversight in implementation of allocators for storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084400.302294-1-poulhies@adacore.com/mbox/"},{"id":16963,"url":"https://patchwork.plctlab.org/api/1.2/patches/16963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108093200.3750500-1-jcmvbkbc@gmail.com/","msgid":"<20221108093200.3750500-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-08T09:32:00","name":"[COMMITTED] gcc: fix PR rtl-optimization/107482","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108093200.3750500-1-jcmvbkbc@gmail.com/mbox/"},{"id":16975,"url":"https://patchwork.plctlab.org/api/1.2/patches/16975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2otxo2bEDKbOBth@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T10:21:58","name":"[committed] libstdc++: Uncomment denorm_min test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2otxo2bEDKbOBth@tucnak/mbox/"},{"id":16979,"url":"https://patchwork.plctlab.org/api/1.2/patches/16979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2oycVBgmY/RQPZb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T10:41:53","name":"i386: Improve vector [GL]E{,U} comparison against vector constants [PR107546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2oycVBgmY/RQPZb@tucnak/mbox/"},{"id":16983,"url":"https://patchwork.plctlab.org/api/1.2/patches/16983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2o3IekL8TZKHdlR@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T11:01:53","name":"cdce: Fix up get_no_error_domain for new f{16,32,64,128} builtins [PR107547]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2o3IekL8TZKHdlR@tucnak/mbox/"},{"id":16996,"url":"https://patchwork.plctlab.org/api/1.2/patches/16996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pCbby26nP6ipNf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T11:50:05","name":"testsuite: Fix up pr107541.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pCbby26nP6ipNf@tucnak/mbox/"},{"id":17008,"url":"https://patchwork.plctlab.org/api/1.2/patches/17008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108121539.E4F9F13398@imap2.suse-dmz.suse.de/","msgid":"<20221108121539.E4F9F13398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-08T12:15:39","name":"[RFC] tree-optimization/99416 - loop distribution wrt vect data dependence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108121539.E4F9F13398@imap2.suse-dmz.suse.de/mbox/"},{"id":17022,"url":"https://patchwork.plctlab.org/api/1.2/patches/17022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108125348.BFC2213398@imap2.suse-dmz.suse.de/","msgid":"<20221108125348.BFC2213398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-08T12:53:48","name":"[v2] tree-optimization/107389 - honor __builtin_assume_alignment at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108125348.BFC2213398@imap2.suse-dmz.suse.de/mbox/"},{"id":17058,"url":"https://patchwork.plctlab.org/api/1.2/patches/17058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108142458.862678-1-aldyh@redhat.com/","msgid":"<20221108142458.862678-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-08T14:24:58","name":"CCP: handle division by a power of 2 as a right shift.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108142458.862678-1-aldyh@redhat.com/mbox/"},{"id":17074,"url":"https://patchwork.plctlab.org/api/1.2/patches/17074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com/","msgid":"<952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com>","list_archive_url":null,"date":"2022-11-08T14:35:28","name":"amdgcn: Add builtins for vectorized native versions of abs, floorf and floor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com/mbox/"},{"id":17076,"url":"https://patchwork.plctlab.org/api/1.2/patches/17076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pq4z+Ig95RN1/z@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T14:42:43","name":"[RFC] c++: Minimal handling of carries_dependency attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pq4z+Ig95RN1/z@tucnak/mbox/"},{"id":17104,"url":"https://patchwork.plctlab.org/api/1.2/patches/17104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-2-qing.zhao@oracle.com/","msgid":"<20221108145113.955321-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-11-08T14:51:12","name":"[1/2] Change the name of array_at_struct_end_p to array_ref_flexible_size_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-2-qing.zhao@oracle.com/mbox/"},{"id":17093,"url":"https://patchwork.plctlab.org/api/1.2/patches/17093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-3-qing.zhao@oracle.com/","msgid":"<20221108145113.955321-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-11-08T14:51:13","name":"[2/2] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-3-qing.zhao@oracle.com/mbox/"},{"id":17094,"url":"https://patchwork.plctlab.org/api/1.2/patches/17094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcec9860-4091-3b32-3a55-4bd5df85e010@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T15:08:06","name":"[COMMITTED] amdgcn: Fix expansion of GCN_BUILTIN_LDEXPV builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcec9860-4091-3b32-3a55-4bd5df85e010@codesourcery.com/mbox/"},{"id":17133,"url":"https://patchwork.plctlab.org/api/1.2/patches/17133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174625.1764584-1-jwakely@redhat.com/","msgid":"<20221108174625.1764584-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:25","name":"[committed] libstdc++: Add always_inline to most allocator functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174625.1764584-1-jwakely@redhat.com/mbox/"},{"id":17137,"url":"https://patchwork.plctlab.org/api/1.2/patches/17137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174641.1764608-1-jwakely@redhat.com/","msgid":"<20221108174641.1764608-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:41","name":"[committed] libstdc++: Fix -Wsystem-headers warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174641.1764608-1-jwakely@redhat.com/mbox/"},{"id":17139,"url":"https://patchwork.plctlab.org/api/1.2/patches/17139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174648.1764639-1-jwakely@redhat.com/","msgid":"<20221108174648.1764639-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:48","name":"[committed] libstdc++: Fix -Wsystem-headers warnings in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174648.1764639-1-jwakely@redhat.com/mbox/"},{"id":17147,"url":"https://patchwork.plctlab.org/api/1.2/patches/17147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df0993a57a506629ba121656e5384c1500cb6338.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:14","name":"[1/3] Compute a table of DWARF register sizes at compile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df0993a57a506629ba121656e5384c1500cb6338.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17149,"url":"https://patchwork.plctlab.org/api/1.2/patches/17149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f08400a5054aadb4fa6e2da62a2768700944b591.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:30","name":"[2/3] Define __LIBGCC_DWARF_REG_SIZES_CONSTANT__ if DWARF register size is constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f08400a5054aadb4fa6e2da62a2768700944b591.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17148,"url":"https://patchwork.plctlab.org/api/1.2/patches/17148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5de1b7feecc0ce5bec77e6a21032ab1f6c0a315.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:40","name":"[3/3] libgcc: Specialize execute_cfa_program in DWARF unwinder for alignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5de1b7feecc0ce5bec77e6a21032ab1f6c0a315.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17159,"url":"https://patchwork.plctlab.org/api/1.2/patches/17159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRZonrXGHcaqVLNduyoAXa8mT+5TiYk29PsXd4sBwfa2JA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:20:20","name":"[Arm] Fix PR 92999","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRZonrXGHcaqVLNduyoAXa8mT+5TiYk29PsXd4sBwfa2JA@mail.gmail.com/mbox/"},{"id":17161,"url":"https://patchwork.plctlab.org/api/1.2/patches/17161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108183108.1233500-1-thomas@codesourcery.com/","msgid":"<20221108183108.1233500-1-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-11-08T18:31:08","name":"[newlib] Generally make all '\''long double complex'\'' methods available in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108183108.1233500-1-thomas@codesourcery.com/mbox/"},{"id":17190,"url":"https://patchwork.plctlab.org/api/1.2/patches/17190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195415.2701208-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195415.2701208-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:15","name":"RISC-V: costs: handle BSWAP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195415.2701208-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17191,"url":"https://patchwork.plctlab.org/api/1.2/patches/17191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195434.2701247-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195434.2701247-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:34","name":"RISC-V: costs: support shift-and-add in strength-reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195434.2701247-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17192,"url":"https://patchwork.plctlab.org/api/1.2/patches/17192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195456.2701279-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195456.2701279-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:56","name":"RISC-V: optimize '\''(a >= 0) ? b : 0'\'' to srai + andn, if compiling for Zbb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195456.2701279-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17193,"url":"https://patchwork.plctlab.org/api/1.2/patches/17193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195509.2701313-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195509.2701313-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:55:09","name":"RISC-V: branch-(not)equals-zero compares against $zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195509.2701313-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17194,"url":"https://patchwork.plctlab.org/api/1.2/patches/17194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195547.2701347-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195547.2701347-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:55:47","name":"RISC-V: bitmanip: use bexti for \"(a & (1 << BIT_NO)) ? 0 : -1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195547.2701347-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17195,"url":"https://patchwork.plctlab.org/api/1.2/patches/17195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195617.2701379-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195617.2701379-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:56:17","name":"RISC-V: split to allow formation of sh[123]add before divw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195617.2701379-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17196,"url":"https://patchwork.plctlab.org/api/1.2/patches/17196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195730.2701496-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195730.2701496-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:57:30","name":"RISC-V: Optimize slli(.uw)? + addw + zext.w into sh[123]add + zext.w","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195730.2701496-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17199,"url":"https://patchwork.plctlab.org/api/1.2/patches/17199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/adca186b-24e1-20da-9e4d-0acb6754f133@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T20:02:20","name":"match.pd: rewrite select to branchless expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/adca186b-24e1-20da-9e4d-0acb6754f133@rivosinc.com/mbox/"},{"id":17200,"url":"https://patchwork.plctlab.org/api/1.2/patches/17200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108200323.2719563-1-philipp.tomsich@vrull.eu/","msgid":"<20221108200323.2719563-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:03:23","name":"RISC-V: allow bseti on SImode without sign-extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108200323.2719563-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17209,"url":"https://patchwork.plctlab.org/api/1.2/patches/17209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmdx42bm.fsf@euler.schwinge.homeip.net/","msgid":"<87pmdx42bm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-08T20:29:49","name":"nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmdx42bm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":17213,"url":"https://patchwork.plctlab.org/api/1.2/patches/17213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204625.2794920-1-philipp.tomsich@vrull.eu/","msgid":"<20221108204625.2794920-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:46:25","name":"RISC-V: Optimize branches testing a bit-range or a shifted immediate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204625.2794920-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17216,"url":"https://patchwork.plctlab.org/api/1.2/patches/17216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204637.2794952-1-philipp.tomsich@vrull.eu/","msgid":"<20221108204637.2794952-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:46:36","name":"RISC-V: No extensions for SImode min/max against safe constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204637.2794952-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17263,"url":"https://patchwork.plctlab.org/api/1.2/patches/17263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108225413.2538404-1-dmalcolm@redhat.com/","msgid":"<20221108225413.2538404-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T22:54:13","name":"[committed] analyzer: eliminate region_model::eval_condition_without_cm [PR101962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108225413.2538404-1-dmalcolm@redhat.com/mbox/"},{"id":17283,"url":"https://patchwork.plctlab.org/api/1.2/patches/17283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109000631.2814859-1-philipp.tomsich@vrull.eu/","msgid":"<20221109000631.2814859-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T00:06:31","name":"[v2] RISC-V: No extensions for SImode min/max against safe constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109000631.2814859-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17306,"url":"https://patchwork.plctlab.org/api/1.2/patches/17306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-3-ben.boeckel@kitware.com/","msgid":"<20221109021048.2123704-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-11-09T02:10:47","name":"[v3,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-3-ben.boeckel@kitware.com/mbox/"},{"id":17307,"url":"https://patchwork.plctlab.org/api/1.2/patches/17307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-4-ben.boeckel@kitware.com/","msgid":"<20221109021048.2123704-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-11-09T02:10:48","name":"[v3,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-4-ben.boeckel@kitware.com/mbox/"},{"id":17325,"url":"https://patchwork.plctlab.org/api/1.2/patches/17325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109030036.19175-1-palmer@rivosinc.com/","msgid":"<20221109030036.19175-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-09T03:00:36","name":"RISC-V: Add the Zihpm and Zicntr extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109030036.19175-1-palmer@rivosinc.com/mbox/"},{"id":17362,"url":"https://patchwork.plctlab.org/api/1.2/patches/17362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-1-aldyh@redhat.com/","msgid":"<20221109070758.1030615-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T07:07:57","name":"[COMMITTED,range-op-float] Abstract out binary operator code out of PLUS_EXPR entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-1-aldyh@redhat.com/mbox/"},{"id":17361,"url":"https://patchwork.plctlab.org/api/1.2/patches/17361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-2-aldyh@redhat.com/","msgid":"<20221109070758.1030615-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T07:07:58","name":"[COMMITTED,range-op-float] Implement MINUS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-2-aldyh@redhat.com/mbox/"},{"id":17364,"url":"https://patchwork.plctlab.org/api/1.2/patches/17364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109071302.78435-1-haochen.jiang@intel.com/","msgid":"<20221109071302.78435-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-09T07:13:02","name":"i386: Add ISA check for newly introduced prefetch builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109071302.78435-1-haochen.jiang@intel.com/mbox/"},{"id":17368,"url":"https://patchwork.plctlab.org/api/1.2/patches/17368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-2-xry111@xry111.site/","msgid":"<20221109072147.789090-2-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:44","name":"[1/4] LoongArch: Rename frint_ to rint2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-2-xry111@xry111.site/mbox/"},{"id":17365,"url":"https://patchwork.plctlab.org/api/1.2/patches/17365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-3-xry111@xry111.site/","msgid":"<20221109072147.789090-3-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:45","name":"[2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-3-xry111@xry111.site/mbox/"},{"id":17366,"url":"https://patchwork.plctlab.org/api/1.2/patches/17366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-4-xry111@xry111.site/","msgid":"<20221109072147.789090-4-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:46","name":"[3/4] LoongArch: Add fscaleb.{s, d} instructions as ldexp{sf, df}3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-4-xry111@xry111.site/mbox/"},{"id":17367,"url":"https://patchwork.plctlab.org/api/1.2/patches/17367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-5-xry111@xry111.site/","msgid":"<20221109072147.789090-5-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:47","name":"[4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-5-xry111@xry111.site/mbox/"},{"id":17369,"url":"https://patchwork.plctlab.org/api/1.2/patches/17369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072645.790242-1-xry111@xry111.site/","msgid":"<20221109072645.790242-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:26:45","name":"[v2] LoongArch: fix signed overflow in loongarch_emit_int_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072645.790242-1-xry111@xry111.site/mbox/"},{"id":17415,"url":"https://patchwork.plctlab.org/api/1.2/patches/17415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109090246.1036213-1-aldyh@redhat.com/","msgid":"<20221109090246.1036213-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T09:02:46","name":"[COMMITTED] Implement op[12]_range operators for PLUS_EXPR and MINUS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109090246.1036213-1-aldyh@redhat.com/mbox/"},{"id":17419,"url":"https://patchwork.plctlab.org/api/1.2/patches/17419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz/","msgid":"<75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz>","list_archive_url":null,"date":"2022-11-09T09:09:27","name":"[(pushed)] sphinx: fix building if sphinx-build is missing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz/mbox/"},{"id":17436,"url":"https://patchwork.plctlab.org/api/1.2/patches/17436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz/","msgid":"<7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz>","list_archive_url":null,"date":"2022-11-09T10:05:49","name":"[(pushed)] avr: sphinx: port gen-avr-mmcu to RST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz/mbox/"},{"id":17460,"url":"https://patchwork.plctlab.org/api/1.2/patches/17460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2uHDeXiivo401ni@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-09T10:55:09","name":"Fix up foperator_abs::op1_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2uHDeXiivo401ni@tucnak/mbox/"},{"id":17480,"url":"https://patchwork.plctlab.org/api/1.2/patches/17480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz/","msgid":"<57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:13:04","name":"[DOCS] sphinx: align documentation links with project names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz/mbox/"},{"id":17483,"url":"https://patchwork.plctlab.org/api/1.2/patches/17483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz/","msgid":"<482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:13:37","name":"[DOCS] sphinx: use new Sphinx links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz/mbox/"},{"id":17494,"url":"https://patchwork.plctlab.org/api/1.2/patches/17494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr5yfo9y2m.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-09T11:17:21","name":"[6/12,V2] arm: Add pointer authentication for stack-unwinding runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr5yfo9y2m.fsf_-_@arm.com/mbox/"},{"id":17507,"url":"https://patchwork.plctlab.org/api/1.2/patches/17507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz/","msgid":"<00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:52:53","name":"[(pushed)] sphinx: update crontab with new script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz/mbox/"},{"id":17522,"url":"https://patchwork.plctlab.org/api/1.2/patches/17522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3c5344-171c-783e-e485-611223baf5bc@suse.cz/","msgid":"<4b3c5344-171c-783e-e485-611223baf5bc@suse.cz>","list_archive_url":null,"date":"2022-11-09T12:12:05","name":"[(pushed)] sphinx: update diagnostics URLs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3c5344-171c-783e-e485-611223baf5bc@suse.cz/mbox/"},{"id":17538,"url":"https://patchwork.plctlab.org/api/1.2/patches/17538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89824348B31E96B4F6432A3C833E9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-09T12:40:05","name":"AArch64: Add fma_reassoc_width [PR107413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89824348B31E96B4F6432A3C833E9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":17539,"url":"https://patchwork.plctlab.org/api/1.2/patches/17539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz/","msgid":"<60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz>","list_archive_url":null,"date":"2022-11-09T12:41:02","name":"[(pushed)] docs: fix: WARNING: Parsing of expression failed. Using fallback parser.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz/mbox/"},{"id":17546,"url":"https://patchwork.plctlab.org/api/1.2/patches/17546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1d91c0b-5326-ce2e-3f78-8a9de6af9a37@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-09T13:41:27","name":"changelog: check for space after tab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1d91c0b-5326-ce2e-3f78-8a9de6af9a37@suse.cz/mbox/"},{"id":17550,"url":"https://patchwork.plctlab.org/api/1.2/patches/17550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135046.17EDE1331F@imap2.suse-dmz.suse.de/","msgid":"<20221109135046.17EDE1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-09T13:50:45","name":"tree-optimization/84646 - remove premature thread path rejection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135046.17EDE1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":17553,"url":"https://patchwork.plctlab.org/api/1.2/patches/17553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-2-xry111@xry111.site/","msgid":"<20221109135329.952128-2-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:26","name":"[v2,1/4] LoongArch: Rename frint_ to rint2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-2-xry111@xry111.site/mbox/"},{"id":17557,"url":"https://patchwork.plctlab.org/api/1.2/patches/17557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-3-xry111@xry111.site/","msgid":"<20221109135329.952128-3-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:27","name":"[v2,2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-3-xry111@xry111.site/mbox/"},{"id":17554,"url":"https://patchwork.plctlab.org/api/1.2/patches/17554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-4-xry111@xry111.site/","msgid":"<20221109135329.952128-4-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:28","name":"[v2,3/4] LoongArch: Add fscaleb.{s, d} instructions as ldexp{sf, df}3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-4-xry111@xry111.site/mbox/"},{"id":17558,"url":"https://patchwork.plctlab.org/api/1.2/patches/17558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-5-xry111@xry111.site/","msgid":"<20221109135329.952128-5-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:29","name":"[v2,4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-5-xry111@xry111.site/mbox/"},{"id":17559,"url":"https://patchwork.plctlab.org/api/1.2/patches/17559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz/","msgid":"<70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz>","list_archive_url":null,"date":"2022-11-09T13:54:48","name":"[RFC] docs: remove documentation for unsupported releases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz/mbox/"},{"id":17608,"url":"https://patchwork.plctlab.org/api/1.2/patches/17608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com/","msgid":"<78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-09T14:32:35","name":"[GCC,13/15,v4] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com/mbox/"},{"id":17609,"url":"https://patchwork.plctlab.org/api/1.2/patches/17609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz/","msgid":"<145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz>","list_archive_url":null,"date":"2022-11-09T14:39:36","name":"[(pushed)] docs: fix links pointing to gcc.gnu.org/install","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz/mbox/"},{"id":17637,"url":"https://patchwork.plctlab.org/api/1.2/patches/17637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109154139.4561-1-jwakely@redhat.com/","msgid":"<20221109154139.4561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-09T15:41:39","name":"[wwwdocs] Add httpd redirects for texinfo trunk docs and for each release series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109154139.4561-1-jwakely@redhat.com/mbox/"},{"id":17711,"url":"https://patchwork.plctlab.org/api/1.2/patches/17711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109172148.41333-1-aldyh@redhat.com/","msgid":"<20221109172148.41333-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T17:21:48","name":"[COMMITTED] Clear NAN when reading back a global range if necessary.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109172148.41333-1-aldyh@redhat.com/mbox/"},{"id":17737,"url":"https://patchwork.plctlab.org/api/1.2/patches/17737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz/","msgid":"<963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz>","list_archive_url":null,"date":"2022-11-09T18:37:09","name":"[(pushed)] docs: create sources tarball","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz/mbox/"},{"id":17739,"url":"https://patchwork.plctlab.org/api/1.2/patches/17739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44555a43-3840-bf91-ee39-0a468ae524be@suse.cz/","msgid":"<44555a43-3840-bf91-ee39-0a468ae524be@suse.cz>","list_archive_url":null,"date":"2022-11-09T18:39:48","name":"[(pushed)] Include docs-sources in onlinedocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44555a43-3840-bf91-ee39-0a468ae524be@suse.cz/mbox/"},{"id":17763,"url":"https://patchwork.plctlab.org/api/1.2/patches/17763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-2-aldot@gcc.gnu.org/","msgid":"<20221109190225.96037-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-09T19:02:24","name":"[1/2] symtab: also change RTL decl name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-2-aldot@gcc.gnu.org/mbox/"},{"id":17764,"url":"https://patchwork.plctlab.org/api/1.2/patches/17764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-3-aldot@gcc.gnu.org/","msgid":"<20221109190225.96037-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-09T19:02:25","name":"[2/2] Fortran: add attribute target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-3-aldot@gcc.gnu.org/mbox/"},{"id":17777,"url":"https://patchwork.plctlab.org/api/1.2/patches/17777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz/","msgid":"<97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz>","list_archive_url":null,"date":"2022-11-09T19:33:51","name":"[(pushed)] sphinx: add missing HAS_SPHINX_BUILD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz/mbox/"},{"id":17795,"url":"https://patchwork.plctlab.org/api/1.2/patches/17795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz/","msgid":"<8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz>","list_archive_url":null,"date":"2022-11-09T19:57:18","name":"[(pushed)] docs: Fix expected diagnostics URL [PR107599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz/mbox/"},{"id":17803,"url":"https://patchwork.plctlab.org/api/1.2/patches/17803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-60fde88b-2e53-405e-b0d6-3cc97ef45980-1668025063811@3c-app-gmx-bap34/","msgid":"","list_archive_url":null,"date":"2022-11-09T20:17:43","name":"[committed] Fortran: avoid NULL pointer dereference on bad EQUIVALENCEs [PR107559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-60fde88b-2e53-405e-b0d6-3cc97ef45980-1668025063811@3c-app-gmx-bap34/mbox/"},{"id":17814,"url":"https://patchwork.plctlab.org/api/1.2/patches/17814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17c8fc65-adb9-4e07-a987-865911332259-1668027022980@3c-app-gmx-bap34/","msgid":"","list_archive_url":null,"date":"2022-11-09T20:50:22","name":"Proxy ping [PATCH] Fortran: diagnostics for actual arguments to pointer dummy arguments [PR94104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17c8fc65-adb9-4e07-a987-865911332259-1668027022980@3c-app-gmx-bap34/mbox/"},{"id":17815,"url":"https://patchwork.plctlab.org/api/1.2/patches/17815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109205305.96262-1-polacek@redhat.com/","msgid":"<20221109205305.96262-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-09T20:53:05","name":"c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109205305.96262-1-polacek@redhat.com/mbox/"},{"id":17835,"url":"https://patchwork.plctlab.org/api/1.2/patches/17835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109213132.2698221-1-arsen@aarsen.me/","msgid":"<20221109213132.2698221-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-11-09T21:31:34","name":"doc: Use a separate directory for new modules we add to PATH","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109213132.2698221-1-arsen@aarsen.me/mbox/"},{"id":17852,"url":"https://patchwork.plctlab.org/api/1.2/patches/17852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109221205.61966-1-jwakely@redhat.com/","msgid":"<20221109221205.61966-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-09T22:12:05","name":"[v2] doc: Remove outdated reference to \"core\" and front-end downloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109221205.61966-1-jwakely@redhat.com/mbox/"},{"id":17856,"url":"https://patchwork.plctlab.org/api/1.2/patches/17856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109222250.2594117-1-dmalcolm@redhat.com/","msgid":"<20221109222250.2594117-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-09T22:22:50","name":"[committed] analyzer: better logging of event creation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109222250.2594117-1-dmalcolm@redhat.com/mbox/"},{"id":17864,"url":"https://patchwork.plctlab.org/api/1.2/patches/17864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230718.3240479-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230718.3240479-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:18","name":"RISC-V: Optimise adding a (larger than simm12) constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230718.3240479-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17865,"url":"https://patchwork.plctlab.org/api/1.2/patches/17865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230736.3240512-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230736.3240512-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:36","name":"RISC-V: Implement movmisalign to enable SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230736.3240512-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17866,"url":"https://patchwork.plctlab.org/api/1.2/patches/17866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230747.3240551-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230747.3240551-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:47","name":"ifcombine: recognize single bit test of sign-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230747.3240551-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17867,"url":"https://patchwork.plctlab.org/api/1.2/patches/17867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230815.3240583-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230815.3240583-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:08:15","name":"ifcombine: fold two bit tests with different polarity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230815.3240583-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17868,"url":"https://patchwork.plctlab.org/api/1.2/patches/17868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230842.3240615-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230842.3240615-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:08:42","name":"[v2,WIP] RISC-V: Replace zero_extendsidi2_shifted with generalized split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230842.3240615-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17869,"url":"https://patchwork.plctlab.org/api/1.2/patches/17869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109231006.3240799-1-philipp.tomsich@vrull.eu/","msgid":"<20221109231006.3240799-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:10:06","name":"[v3] RISC-V: Replace zero_extendsidi2_shifted with generalized split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109231006.3240799-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17870,"url":"https://patchwork.plctlab.org/api/1.2/patches/17870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109234948.3279391-1-philipp.tomsich@vrull.eu/","msgid":"<20221109234948.3279391-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:49:48","name":"RISC-V: Fix selection of pipeline model for sifive-7-series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109234948.3279391-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17872,"url":"https://patchwork.plctlab.org/api/1.2/patches/17872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUsKk8N+EUsVjQS1sSRmsw+QKx4xPo7y4wOg6WLr0pqeQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T00:09:01","name":"Go patch committed: Define __atomic_fetch_add functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUsKk8N+EUsVjQS1sSRmsw+QKx4xPo7y4wOg6WLr0pqeQ@mail.gmail.com/mbox/"},{"id":17887,"url":"https://patchwork.plctlab.org/api/1.2/patches/17887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668042934-1377-1-git-send-email-apinski@marvell.com/","msgid":"<1668042934-1377-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-10T01:15:34","name":"Remove SLOW_SHORT_ACCESS from target headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668042934-1377-1-git-send-email-apinski@marvell.com/mbox/"},{"id":17914,"url":"https://patchwork.plctlab.org/api/1.2/patches/17914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110015608.454675-1-polacek@redhat.com/","msgid":"<20221110015608.454675-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-10T01:56:08","name":"c++: Extend -Wdangling-reference for std::minmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110015608.454675-1-polacek@redhat.com/mbox/"},{"id":17917,"url":"https://patchwork.plctlab.org/api/1.2/patches/17917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110020031.152520-1-jwakely@redhat.com/","msgid":"<20221110020031.152520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-10T02:00:31","name":"[committed] libstdc++: Optimize std::destructible concept","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110020031.152520-1-jwakely@redhat.com/mbox/"},{"id":17925,"url":"https://patchwork.plctlab.org/api/1.2/patches/17925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xll905otHWkzxl@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:44:39","name":"[1/6] PowerPC: Add -mcpu=future","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xll905otHWkzxl@toto.the-meissners.org/mbox/"},{"id":17926,"url":"https://patchwork.plctlab.org/api/1.2/patches/17926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xl0/RvJdmvchfJ@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:45:39","name":"[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xl0/RvJdmvchfJ@toto.the-meissners.org/mbox/"},{"id":17927,"url":"https://patchwork.plctlab.org/api/1.2/patches/17927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xmDFSXZ3ATDcpO@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:46:36","name":"[3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xmDFSXZ3ATDcpO@toto.the-meissners.org/mbox/"},{"id":17928,"url":"https://patchwork.plctlab.org/api/1.2/patches/17928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xm8GdMwRMEkbRA@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:50:24","name":"[4/6] PowerPC: Make MMA insns support DMR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xm8GdMwRMEkbRA@toto.the-meissners.org/mbox/"},{"id":17929,"url":"https://patchwork.plctlab.org/api/1.2/patches/17929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xnRFz8ioc+r7Jk@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:51:48","name":"[5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xnRFz8ioc+r7Jk@toto.the-meissners.org/mbox/"},{"id":17930,"url":"https://patchwork.plctlab.org/api/1.2/patches/17930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xngfGkkZBwBVcO@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:52:49","name":"[6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xngfGkkZBwBVcO@toto.the-meissners.org/mbox/"},{"id":17931,"url":"https://patchwork.plctlab.org/api/1.2/patches/17931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110031345.193991-1-jwakely@redhat.com/","msgid":"<20221110031345.193991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-10T03:13:45","name":"c-family: Support #pragma region/endregion [PR85487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110031345.193991-1-jwakely@redhat.com/mbox/"},{"id":17953,"url":"https://patchwork.plctlab.org/api/1.2/patches/17953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz/","msgid":"<9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz>","list_archive_url":null,"date":"2022-11-10T05:33:17","name":"[(pushed)] doc: Modernize baseconf.py.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz/mbox/"},{"id":17955,"url":"https://patchwork.plctlab.org/api/1.2/patches/17955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz/","msgid":"<6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz>","list_archive_url":null,"date":"2022-11-10T05:38:50","name":"[(pushed)] maintainer-scripts: fix superfluous '\''sh'\'' for Python script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz/mbox/"},{"id":17957,"url":"https://patchwork.plctlab.org/api/1.2/patches/17957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110060143.28132-1-haochen.jiang@intel.com/","msgid":"<20221110060143.28132-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-10T06:01:43","name":"[wwwdocs] gcc-13: Mention Intel new ISA and march support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110060143.28132-1-haochen.jiang@intel.com/mbox/"},{"id":18003,"url":"https://patchwork.plctlab.org/api/1.2/patches/18003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110080742.59F2733E46@hamza.pair.com/","msgid":"<20221110080742.59F2733E46@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T08:07:40","name":"[committed] wwwdocs: c99status: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110080742.59F2733E46@hamza.pair.com/mbox/"},{"id":18013,"url":"https://patchwork.plctlab.org/api/1.2/patches/18013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110084212.37FF333E18@hamza.pair.com/","msgid":"<20221110084212.37FF333E18@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T08:42:10","name":"[committed] wwwdocs: gcc-4.8: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110084212.37FF333E18@hamza.pair.com/mbox/"},{"id":18027,"url":"https://patchwork.plctlab.org/api/1.2/patches/18027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2zEZ6f0v/74nBbT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-10T09:29:11","name":"i386: Fix up ix86_expand_int_sse_cmp [PR107585]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2zEZ6f0v/74nBbT@tucnak/mbox/"},{"id":18032,"url":"https://patchwork.plctlab.org/api/1.2/patches/18032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110094331.7804333E60@hamza.pair.com/","msgid":"<20221110094331.7804333E60@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T09:43:28","name":"[committed] wwwdocs: readings: Remove linux-c6x.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110094331.7804333E60@hamza.pair.com/mbox/"},{"id":18046,"url":"https://patchwork.plctlab.org/api/1.2/patches/18046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-2-aldot@gcc.gnu.org/","msgid":"<20221110102031.1366016-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-10T10:20:30","name":"[1/2] Fortran: Cleanup struct ext_attr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-2-aldot@gcc.gnu.org/mbox/"},{"id":18047,"url":"https://patchwork.plctlab.org/api/1.2/patches/18047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-3-aldot@gcc.gnu.org/","msgid":"<20221110102031.1366016-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-10T10:20:31","name":"[2/2] Fortran: Add attribute flatten","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-3-aldot@gcc.gnu.org/mbox/"},{"id":18050,"url":"https://patchwork.plctlab.org/api/1.2/patches/18050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae8406c3-b85a-4bd9-9bd2-fff5474a1772@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T10:23:21","name":"[GCC] arm: Add support for Cortex-X1C CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae8406c3-b85a-4bd9-9bd2-fff5474a1772@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18058,"url":"https://patchwork.plctlab.org/api/1.2/patches/18058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c24cd3a3-6f3f-437d-b7ec-a9fea09378df@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T10:37:50","name":"[GCC] arm: Add support for new frame unwinding instruction \"0xb5\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c24cd3a3-6f3f-437d-b7ec-a9fea09378df@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18076,"url":"https://patchwork.plctlab.org/api/1.2/patches/18076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3d17147-aa74-aa6a-a435-2c8445e5b03b@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T11:16:55","name":"[1/2] aarch64: Enable the use of LDAPR for load-acquire semantics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3d17147-aa74-aa6a-a435-2c8445e5b03b@arm.com/mbox/"},{"id":18077,"url":"https://patchwork.plctlab.org/api/1.2/patches/18077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5c31297-4b0e-aaf5-227d-d69dbafb7e24@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T11:20:01","name":"[2/2] aarch64: Add support for widening LDAPR instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5c31297-4b0e-aaf5-227d-d69dbafb7e24@arm.com/mbox/"},{"id":18084,"url":"https://patchwork.plctlab.org/api/1.2/patches/18084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9468d0c-9136-edd2-390c-b49821ce8296@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-10T12:09:06","name":"sphinx: support Sphinx in lib*/Makefile.am.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9468d0c-9136-edd2-390c-b49821ce8296@suse.cz/mbox/"},{"id":18114,"url":"https://patchwork.plctlab.org/api/1.2/patches/18114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz/","msgid":"<7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz>","list_archive_url":null,"date":"2022-11-10T12:57:07","name":"[(pushed)] sphinx: add missing newline for conf.py files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz/mbox/"},{"id":18115,"url":"https://patchwork.plctlab.org/api/1.2/patches/18115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz/","msgid":"<247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz>","list_archive_url":null,"date":"2022-11-10T12:58:50","name":"[(pushed)] sphinx: add missing newline for conf.py files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz/mbox/"},{"id":18124,"url":"https://patchwork.plctlab.org/api/1.2/patches/18124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110131102.1091513B58@imap2.suse-dmz.suse.de/","msgid":"<20221110131102.1091513B58@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T13:11:01","name":"Restore CCP copy propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110131102.1091513B58@imap2.suse-dmz.suse.de/mbox/"},{"id":18134,"url":"https://patchwork.plctlab.org/api/1.2/patches/18134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y20AQOMOIzv3lvDR@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-10T13:44:32","name":"range-op: Implement floating point multiplication fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y20AQOMOIzv3lvDR@tucnak/mbox/"},{"id":18138,"url":"https://patchwork.plctlab.org/api/1.2/patches/18138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm5yfmc3v6.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2022-11-10T13:53:49","name":"doc: formatting fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm5yfmc3v6.fsf@suse.de/mbox/"},{"id":18149,"url":"https://patchwork.plctlab.org/api/1.2/patches/18149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110141936.62A821332F@imap2.suse-dmz.suse.de/","msgid":"<20221110141936.62A821332F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T14:19:36","name":"better PHI copy propagation for forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110141936.62A821332F@imap2.suse-dmz.suse.de/mbox/"},{"id":18151,"url":"https://patchwork.plctlab.org/api/1.2/patches/18151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com/","msgid":"<6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com>","list_archive_url":null,"date":"2022-11-10T14:37:13","name":"[RESEND] riscv: improve the cost model for loading a 64bit constant in rv32.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com/mbox/"},{"id":18153,"url":"https://patchwork.plctlab.org/api/1.2/patches/18153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110150345.157116-1-aldyh@redhat.com/","msgid":"<20221110150345.157116-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-10T15:03:46","name":"Do not specify NAN sign in frange::set_nonnegative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110150345.157116-1-aldyh@redhat.com/mbox/"},{"id":18159,"url":"https://patchwork.plctlab.org/api/1.2/patches/18159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110151434.7F16613B58@imap2.suse-dmz.suse.de/","msgid":"<20221110151434.7F16613B58@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T15:14:34","name":"Make last DCE remove empty loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110151434.7F16613B58@imap2.suse-dmz.suse.de/mbox/"},{"id":18230,"url":"https://patchwork.plctlab.org/api/1.2/patches/18230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdbe6424-b2f6-d632-1449-22dc00fb7697@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-10T17:03:13","name":"[(pushed)] docs: move label directly before title","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdbe6424-b2f6-d632-1449-22dc00fb7697@suse.cz/mbox/"},{"id":18281,"url":"https://patchwork.plctlab.org/api/1.2/patches/18281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110183715.2644564-1-dmalcolm@redhat.com/","msgid":"<20221110183715.2644564-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-10T18:37:15","name":"[committed] analyzer: new warning: -Wanalyzer-deref-before-check [PR99671]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110183715.2644564-1-dmalcolm@redhat.com/mbox/"},{"id":18299,"url":"https://patchwork.plctlab.org/api/1.2/patches/18299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-1-ppalka@redhat.com/","msgid":"<20221110195602.2434376-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-10T19:56:01","name":"[1/2] c++: remove function_p parm from tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-1-ppalka@redhat.com/mbox/"},{"id":18300,"url":"https://patchwork.plctlab.org/api/1.2/patches/18300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-2-ppalka@redhat.com/","msgid":"<20221110195602.2434376-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-10T19:56:02","name":"[2/2] c++: remove i_c_e_p parm from tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-2-ppalka@redhat.com/mbox/"},{"id":18329,"url":"https://patchwork.plctlab.org/api/1.2/patches/18329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213403.3592364-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213403.3592364-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:34:03","name":"[v2] RISC-V: costs: support shift-and-add in strength-reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213403.3592364-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18330,"url":"https://patchwork.plctlab.org/api/1.2/patches/18330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213445.3592438-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213445.3592438-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:34:45","name":"RISC-V: Use bseti to cover more immediates than with ori alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213445.3592438-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18331,"url":"https://patchwork.plctlab.org/api/1.2/patches/18331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213501.3592470-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213501.3592470-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:35:01","name":"RISC-V: Use binvi to cover more immediates than with xori alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213501.3592470-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18332,"url":"https://patchwork.plctlab.org/api/1.2/patches/18332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213617.3592572-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213617.3592572-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:36:17","name":"RISC-V: Optimize masking with two clear bits not a SMALL_OPERAND","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213617.3592572-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18333,"url":"https://patchwork.plctlab.org/api/1.2/patches/18333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c4cc511a-5cda-481e-b712-133f9bc73ffe-1668117408459@3c-app-gmx-bs59/","msgid":"","list_archive_url":null,"date":"2022-11-10T21:56:48","name":"Fortran: fix treatment of character, value, optional dummy arguments [PR107444]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c4cc511a-5cda-481e-b712-133f9bc73ffe-1668117408459@3c-app-gmx-bs59/mbox/"},{"id":18343,"url":"https://patchwork.plctlab.org/api/1.2/patches/18343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OP472vRO_13s3y8PI5nplVOCz6jhAMLTrsiRNglJYpsVepytiMkTHLMJAgzi83RBq0Lbv9VU0QNCuLNKiTUtVPJebd8pQPSAvXgzU7QL35k=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-11-10T23:07:30","name":"d: Update __FreeBSD_version values [PR107469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OP472vRO_13s3y8PI5nplVOCz6jhAMLTrsiRNglJYpsVepytiMkTHLMJAgzi83RBq0Lbv9VU0QNCuLNKiTUtVPJebd8pQPSAvXgzU7QL35k=@lorenzosalvadore.it/mbox/"},{"id":18344,"url":"https://patchwork.plctlab.org/api/1.2/patches/18344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org/","msgid":"<3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org>","list_archive_url":null,"date":"2022-11-10T23:25:26","name":"demangler: Templated lambda demangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org/mbox/"},{"id":18370,"url":"https://patchwork.plctlab.org/api/1.2/patches/18370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-2-hongtao.liu@intel.com/","msgid":"<20221111012631.76776-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-11T01:26:30","name":"[1/2] Implement hwasan target_hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-2-hongtao.liu@intel.com/mbox/"},{"id":18369,"url":"https://patchwork.plctlab.org/api/1.2/patches/18369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-3-hongtao.liu@intel.com/","msgid":"<20221111012631.76776-3-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-11T01:26:31","name":"[2/2] Enable hwasan for x86-64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-3-hongtao.liu@intel.com/mbox/"},{"id":18390,"url":"https://patchwork.plctlab.org/api/1.2/patches/18390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9934c80-5182-9a7b-f9fe-f7b14e458e16@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T02:28:01","name":"[v2] match.pd: rewrite select to branchless expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9934c80-5182-9a7b-f9fe-f7b14e458e16@rivosinc.com/mbox/"},{"id":18392,"url":"https://patchwork.plctlab.org/api/1.2/patches/18392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111024330.87663-1-haochen.jiang@intel.com/","msgid":"<20221111024330.87663-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-11T02:43:30","name":"i386: Add AMX-TILE dependency for AMX related ISAs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111024330.87663-1-haochen.jiang@intel.com/mbox/"},{"id":18393,"url":"https://patchwork.plctlab.org/api/1.2/patches/18393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025244.188157-1-polacek@redhat.com/","msgid":"<20221111025244.188157-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T02:52:44","name":"configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025244.188157-1-polacek@redhat.com/mbox/"},{"id":18394,"url":"https://patchwork.plctlab.org/api/1.2/patches/18394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025309.188226-1-polacek@redhat.com/","msgid":"<20221111025309.188226-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T02:53:09","name":"configure: Implement --enable-host-bind-now","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025309.188226-1-polacek@redhat.com/mbox/"},{"id":18469,"url":"https://patchwork.plctlab.org/api/1.2/patches/18469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-11-11T05:21:42","name":"[v2] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":18470,"url":"https://patchwork.plctlab.org/api/1.2/patches/18470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053043.563832-1-jwakely@redhat.com/","msgid":"<20221111053043.563832-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:43","name":"[committed] libstdc++: Avoid redundant checks in std::use_facet [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053043.563832-1-jwakely@redhat.com/mbox/"},{"id":18471,"url":"https://patchwork.plctlab.org/api/1.2/patches/18471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053054.563891-1-jwakely@redhat.com/","msgid":"<20221111053054.563891-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:54","name":"[committed] libstdc++: Fix test that uses C++17 variable template in C++14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053054.563891-1-jwakely@redhat.com/mbox/"},{"id":18472,"url":"https://patchwork.plctlab.org/api/1.2/patches/18472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053059.563909-1-jwakely@redhat.com/","msgid":"<20221111053059.563909-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:59","name":"[committed] libstdc++: Add missing definition for in C++14 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053059.563909-1-jwakely@redhat.com/mbox/"},{"id":18473,"url":"https://patchwork.plctlab.org/api/1.2/patches/18473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053108.563931-1-jwakely@redhat.com/","msgid":"<20221111053108.563931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:31:08","name":"[committed] libstdc++: Fix tests with non-const operator==","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053108.563931-1-jwakely@redhat.com/mbox/"},{"id":18522,"url":"https://patchwork.plctlab.org/api/1.2/patches/18522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y238ewF+UgXC2kFk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T07:40:43","name":"c++: Implement C++23 P2589R1 - - static operator[]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y238ewF+UgXC2kFk@tucnak/mbox/"},{"id":18524,"url":"https://patchwork.plctlab.org/api/1.2/patches/18524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y239B6R5TVWj2/jM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T07:43:03","name":"c++: Implement CWG 2654 - Un-deprecation of compound volatile assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y239B6R5TVWj2/jM@tucnak/mbox/"},{"id":18537,"url":"https://patchwork.plctlab.org/api/1.2/patches/18537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111082532.24898-1-guojiufu@linux.ibm.com/","msgid":"<20221111082532.24898-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-11T08:25:32","name":"Using sub-scalars mode to move struct block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111082532.24898-1-guojiufu@linux.ibm.com/mbox/"},{"id":18554,"url":"https://patchwork.plctlab.org/api/1.2/patches/18554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24NZRBs5H9In4Cr@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T08:52:53","name":"range-op, v2: Implement floating point multiplication fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24NZRBs5H9In4Cr@tucnak/mbox/"},{"id":18584,"url":"https://patchwork.plctlab.org/api/1.2/patches/18584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111090838.7194-1-lili.cui@intel.com/","msgid":"<20221111090838.7194-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-11-11T09:08:38","name":"x86: Enable 256 move by pieces for ALDERLAKE and AVX2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111090838.7194-1-lili.cui@intel.com/mbox/"},{"id":18585,"url":"https://patchwork.plctlab.org/api/1.2/patches/18585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24RVgktf3A5X5Di@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T09:09:42","name":"range-op: Implement floating point division fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24RVgktf3A5X5Di@tucnak/mbox/"},{"id":18636,"url":"https://patchwork.plctlab.org/api/1.2/patches/18636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24df+rg4zNzHGKK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T10:01:35","name":"range-op: Cleanup floating point multiplication and division fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24df+rg4zNzHGKK@tucnak/mbox/"},{"id":18683,"url":"https://patchwork.plctlab.org/api/1.2/patches/18683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24wszWBpJVRv1ma@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-11T11:23:31","name":"libstdc++: Set active union member in constexpr std::string [PR103295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24wszWBpJVRv1ma@Thaum.localdomain/mbox/"},{"id":18700,"url":"https://patchwork.plctlab.org/api/1.2/patches/18700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2426uaT5d2Zc7M9@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T11:50:02","name":"range-op: Implement op[12]_range operators for {PLUS,MINUS,MULT,RDIV}_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2426uaT5d2Zc7M9@tucnak/mbox/"},{"id":18708,"url":"https://patchwork.plctlab.org/api/1.2/patches/18708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com/","msgid":"<57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T11:58:04","name":"[GCC] aarch64: Add support for Cortex-A715 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18721,"url":"https://patchwork.plctlab.org/api/1.2/patches/18721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com/","msgid":"<274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T12:11:29","name":"[GCC] aarch64: Add support for Cortex-X1C CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18725,"url":"https://patchwork.plctlab.org/api/1.2/patches/18725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz/","msgid":"<161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz>","list_archive_url":null,"date":"2022-11-11T12:33:51","name":"[(pushed)] sphinx: stop using parallel mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz/mbox/"},{"id":18729,"url":"https://patchwork.plctlab.org/api/1.2/patches/18729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111130221.541603-1-oriachiuan@gmail.com/","msgid":"<20221111130221.541603-1-oriachiuan@gmail.com>","list_archive_url":null,"date":"2022-11-11T13:02:21","name":"fix small const data for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111130221.541603-1-oriachiuan@gmail.com/mbox/"},{"id":18738,"url":"https://patchwork.plctlab.org/api/1.2/patches/18738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz/","msgid":"<15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz>","list_archive_url":null,"date":"2022-11-11T13:27:21","name":"[(pushed)] jit: doc: Use shared Indices and tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz/mbox/"},{"id":18739,"url":"https://patchwork.plctlab.org/api/1.2/patches/18739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111133112.85A4A13273@imap2.suse-dmz.suse.de/","msgid":"<20221111133112.85A4A13273@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-11T13:31:12","name":"tree-optimization/107618 - enhance copy propagation of constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111133112.85A4A13273@imap2.suse-dmz.suse.de/mbox/"},{"id":18740,"url":"https://patchwork.plctlab.org/api/1.2/patches/18740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25QhrM0bMcTmpAn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:39:18","name":"[0/8] middle-end: Ensure at_stmt is defined before an early exit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25QhrM0bMcTmpAn@e124511.cambridge.arm.com/mbox/"},{"id":18742,"url":"https://patchwork.plctlab.org/api/1.2/patches/18742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25SMeZZryZD/ZSN@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:46:25","name":"[2/8] middle-end: Remove prototype for number_of_iterations_popcount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25SMeZZryZD/ZSN@e124511.cambridge.arm.com/mbox/"},{"id":18741,"url":"https://patchwork.plctlab.org/api/1.2/patches/18741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26247edc-2f04-844e-f8ca-87892632377b@suse.cz/","msgid":"<26247edc-2f04-844e-f8ca-87892632377b@suse.cz>","list_archive_url":null,"date":"2022-11-11T13:47:01","name":"doc: Ada: include Indices and Tables in manuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26247edc-2f04-844e-f8ca-87892632377b@suse.cz/mbox/"},{"id":18778,"url":"https://patchwork.plctlab.org/api/1.2/patches/18778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25TqHuEvlEQEF6Q@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:52:40","name":"[3/8] middle-end: Refactor number_of_iterations_popcount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25TqHuEvlEQEF6Q@e124511.cambridge.arm.com/mbox/"},{"id":18744,"url":"https://patchwork.plctlab.org/api/1.2/patches/18744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-1-aldyh@redhat.com/","msgid":"<20221111135318.235387-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:14","name":"[COMMITTED,range-ops] Add tree code to range_operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-1-aldyh@redhat.com/mbox/"},{"id":18745,"url":"https://patchwork.plctlab.org/api/1.2/patches/18745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-2-aldyh@redhat.com/","msgid":"<20221111135318.235387-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:15","name":"[COMMITTED,range-ops] Use existing tree code for *DIV_EXPR entries.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-2-aldyh@redhat.com/mbox/"},{"id":18743,"url":"https://patchwork.plctlab.org/api/1.2/patches/18743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-3-aldyh@redhat.com/","msgid":"<20221111135318.235387-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:16","name":"[COMMITTED,range-ops] Update known bitmasks using CCP for all operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-3-aldyh@redhat.com/mbox/"},{"id":18746,"url":"https://patchwork.plctlab.org/api/1.2/patches/18746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-4-aldyh@redhat.com/","msgid":"<20221111135318.235387-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:17","name":"[COMMITTED,range-ops] Avoid unnecessary intersection in update_known_bitmask.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-4-aldyh@redhat.com/mbox/"},{"id":18751,"url":"https://patchwork.plctlab.org/api/1.2/patches/18751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-5-aldyh@redhat.com/","msgid":"<20221111135318.235387-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:18","name":"[COMMITTED,range-ops] Remove specialized fold_range methods for various operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-5-aldyh@redhat.com/mbox/"},{"id":18846,"url":"https://patchwork.plctlab.org/api/1.2/patches/18846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FD8B866FE4B8058A80B483009@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:22:16","name":"libatomic: Add support for LSE and LSE2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FD8B866FE4B8058A80B483009@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":18851,"url":"https://patchwork.plctlab.org/api/1.2/patches/18851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111143614.8F25313357@imap2.suse-dmz.suse.de/","msgid":"<20221111143614.8F25313357@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-11T14:36:14","name":"tree-optimization/107554 - fix ICE in stlen optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111143614.8F25313357@imap2.suse-dmz.suse.de/mbox/"},{"id":18859,"url":"https://patchwork.plctlab.org/api/1.2/patches/18859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16561-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:44:55","name":"[i386] : Update ix86_can_change_mode_class target hook to accept QImode conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16561-tamar@arm.com/mbox/"},{"id":18856,"url":"https://patchwork.plctlab.org/api/1.2/patches/18856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16562-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:45:42","name":"AArch64 Fix vector re-interpretation between partial SIMD modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16562-tamar@arm.com/mbox/"},{"id":18862,"url":"https://patchwork.plctlab.org/api/1.2/patches/18862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982C07FA68CA1BAF8B6C10883009@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:48:24","name":"AArch64: Add support for -mdirect-extern-access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982C07FA68CA1BAF8B6C10883009@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":18879,"url":"https://patchwork.plctlab.org/api/1.2/patches/18879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com/","msgid":"<8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T15:08:04","name":"[GCC] aarch64: Add support for Cortex-X3 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18881,"url":"https://patchwork.plctlab.org/api/1.2/patches/18881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com/","msgid":"<853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com>","list_archive_url":null,"date":"2022-11-11T15:13:01","name":"[wwwdocs] projects/gomp: TR11 + GCC13 update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com/mbox/"},{"id":18898,"url":"https://patchwork.plctlab.org/api/1.2/patches/18898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com/","msgid":"<3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com>","list_archive_url":null,"date":"2022-11-11T16:17:17","name":"[COMMITTED] process transitive inferred ranges in pre_fold_stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com/mbox/"},{"id":18901,"url":"https://patchwork.plctlab.org/api/1.2/patches/18901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfipsbte.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:19:57","name":"Handle epilogues that contain jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfipsbte.fsf@arm.com/mbox/"},{"id":18903,"url":"https://patchwork.plctlab.org/api/1.2/patches/18903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt8xsbrl.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:21:02","name":"Allow prologues and epilogues to be inserted later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt8xsbrl.fsf@arm.com/mbox/"},{"id":18905,"url":"https://patchwork.plctlab.org/api/1.2/patches/18905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z5sbpy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:22:01","name":"Add a target hook for sibcall epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z5sbpy.fsf@arm.com/mbox/"},{"id":18907,"url":"https://patchwork.plctlab.org/api/1.2/patches/18907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpdsbev.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:28:40","name":"Add a new target hook: TARGET_START_CALL_ARGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpdsbev.fsf@arm.com/mbox/"},{"id":18921,"url":"https://patchwork.plctlab.org/api/1.2/patches/18921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26BNiMCgUMaOpW5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:07:02","name":"c++: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26BNiMCgUMaOpW5@tucnak/mbox/"},{"id":18927,"url":"https://patchwork.plctlab.org/api/1.2/patches/18927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yfls8j1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:30:58","name":"Allow targets to add USEs to asms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yfls8j1.fsf@arm.com/mbox/"},{"id":18928,"url":"https://patchwork.plctlab.org/api/1.2/patches/18928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcxqtwt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:32:02","name":"aarch64: Use SVE'\''s RDVL instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcxqtwt.fsf@arm.com/mbox/"},{"id":18932,"url":"https://patchwork.plctlab.org/api/1.2/patches/18932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af40d679-cf52-f422-2b4f-9e6306c8508e@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:39:55","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af40d679-cf52-f422-2b4f-9e6306c8508e@arm.com/mbox/"},{"id":18933,"url":"https://patchwork.plctlab.org/api/1.2/patches/18933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com/","msgid":"<212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com>","list_archive_url":null,"date":"2022-11-11T17:40:55","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com/mbox/"},{"id":18934,"url":"https://patchwork.plctlab.org/api/1.2/patches/18934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111174424.686786-1-jwakely@redhat.com/","msgid":"<20221111174424.686786-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T17:44:24","name":"[committed] libstdc++: Fix wstring conversions in filesystem::path [PR95048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111174424.686786-1-jwakely@redhat.com/mbox/"},{"id":18937,"url":"https://patchwork.plctlab.org/api/1.2/patches/18937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111181147.278546-1-aldyh@redhat.com/","msgid":"<20221111181147.278546-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T18:11:47","name":"[range-ops] Add ability to represent open intervals in frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111181147.278546-1-aldyh@redhat.com/mbox/"},{"id":18967,"url":"https://patchwork.plctlab.org/api/1.2/patches/18967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26XubanUrWdwJZF@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:43:05","name":"[4/8] Modify test, to prevent the next patch breaking it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26XubanUrWdwJZF@e124511.cambridge.arm.com/mbox/"},{"id":18968,"url":"https://patchwork.plctlab.org/api/1.2/patches/18968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111184759.2531849-1-ppalka@redhat.com/","msgid":"<20221111184759.2531849-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-11T18:47:59","name":"c++: init_priority and SUPPORTS_INIT_PRIORITY [PR107638]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111184759.2531849-1-ppalka@redhat.com/mbox/"},{"id":18973,"url":"https://patchwork.plctlab.org/api/1.2/patches/18973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26ZZNEHkjv+eR+p@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:50:12","name":"[5/8] middle-end: Add cltz_complement idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26ZZNEHkjv+eR+p@e124511.cambridge.arm.com/mbox/"},{"id":18977,"url":"https://patchwork.plctlab.org/api/1.2/patches/18977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26aTm8CDN6Jockb@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:54:06","name":"[6/8] docs: Add popcount, clz and ctz target attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26aTm8CDN6Jockb@e124511.cambridge.arm.com/mbox/"},{"id":18978,"url":"https://patchwork.plctlab.org/api/1.2/patches/18978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26b9g+LgJPnRItn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T19:01:10","name":"[7/8] middle-end: Add c[lt]z idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26b9g+LgJPnRItn@e124511.cambridge.arm.com/mbox/"},{"id":18979,"url":"https://patchwork.plctlab.org/api/1.2/patches/18979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26dZqWmy8qJdpjn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T19:07:18","name":"[8/8] middle-end: Expand comment for tree_niter_desc.max","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26dZqWmy8qJdpjn@e124511.cambridge.arm.com/mbox/"},{"id":18981,"url":"https://patchwork.plctlab.org/api/1.2/patches/18981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111194356.3922768-1-jcmvbkbc@gmail.com/","msgid":"<20221111194356.3922768-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-11T19:43:56","name":"gcc: m68k: fix PR target/107645","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111194356.3922768-1-jcmvbkbc@gmail.com/mbox/"},{"id":18982,"url":"https://patchwork.plctlab.org/api/1.2/patches/18982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com/","msgid":"<914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com>","list_archive_url":null,"date":"2022-11-11T19:53:24","name":"[COMMITTED] PR tree-optimization/107523 - Don'\''t add dependencies in update_stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com/mbox/"},{"id":18989,"url":"https://patchwork.plctlab.org/api/1.2/patches/18989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111202226.103649-1-polacek@redhat.com/","msgid":"<20221111202226.103649-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T20:22:26","name":"c++: Disable -Wdangling-reference when initing T&","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111202226.103649-1-polacek@redhat.com/mbox/"},{"id":18993,"url":"https://patchwork.plctlab.org/api/1.2/patches/18993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211236.2707086-1-dmalcolm@redhat.com/","msgid":"<20221111211236.2707086-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:12:36","name":"[committed] analyzer: new warning: -Wanalyzer-infinite-recursion [PR106147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211236.2707086-1-dmalcolm@redhat.com/mbox/"},{"id":18994,"url":"https://patchwork.plctlab.org/api/1.2/patches/18994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211251.2707146-1-dmalcolm@redhat.com/","msgid":"<20221111211251.2707146-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:12:51","name":"[committed] analyzer: split out checker_event classes to their own header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211251.2707146-1-dmalcolm@redhat.com/mbox/"},{"id":19003,"url":"https://patchwork.plctlab.org/api/1.2/patches/19003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111215421.2709259-1-dmalcolm@redhat.com/","msgid":"<20221111215421.2709259-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:54:21","name":"[committed] analyzer: more state machine documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111215421.2709259-1-dmalcolm@redhat.com/mbox/"},{"id":19066,"url":"https://patchwork.plctlab.org/api/1.2/patches/19066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014353.810822-1-jwakely@redhat.com/","msgid":"<20221112014353.810822-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-12T01:43:53","name":"[committed] libstdc++: Define INSTANTIATE_FACET_ACCESSORS macro in compat source [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014353.810822-1-jwakely@redhat.com/mbox/"},{"id":19068,"url":"https://patchwork.plctlab.org/api/1.2/patches/19068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014433.814465-1-jwakely@redhat.com/","msgid":"<20221112014433.814465-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-12T01:44:33","name":"[committed] libstdc++: Simplify build targets for debug library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014433.814465-1-jwakely@redhat.com/mbox/"},{"id":19067,"url":"https://patchwork.plctlab.org/api/1.2/patches/19067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8nlkkth.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:44:58","name":"[01/12] ipa: IPA-SRA split detection simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8nlkkth.fsf@suse.cz/mbox/"},{"id":19069,"url":"https://patchwork.plctlab.org/api/1.2/patches/19069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6tu35kksn.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:45:28","name":"[02/12] ipa-cp: Do not consider useless aggregate constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6tu35kksn.fsf@suse.cz/mbox/"},{"id":19070,"url":"https://patchwork.plctlab.org/api/1.2/patches/19070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfipkksb.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:45:40","name":"[03/12] ipa-cp: Write transformation summaries of all functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfipkksb.fsf@suse.cz/mbox/"},{"id":19071,"url":"https://patchwork.plctlab.org/api/1.2/patches/19071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6r0y9kkrq.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:01","name":"[04/12] ipa: Better way of applying both IPA-CP and IPA-SRA (PR 103227)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6r0y9kkrq.fsf@suse.cz/mbox/"},{"id":19073,"url":"https://patchwork.plctlab.org/api/1.2/patches/19073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pmdtkkrk.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:07","name":"[05/12] ipa-sra: Dump edge summaries also for non-candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pmdtkkrk.fsf@suse.cz/mbox/"},{"id":19072,"url":"https://patchwork.plctlab.org/api/1.2/patches/19072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7tdkkqz.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:28","name":"[06/12] ipa-cp: Leave removal of unused parameters to IPA-SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7tdkkqz.fsf@suse.cz/mbox/"},{"id":19075,"url":"https://patchwork.plctlab.org/api/1.2/patches/19075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt8xkkqs.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:35","name":"[07/12] ipa-sra: Treat REFERENCE_TYPES as always dereferencable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt8xkkqs.fsf@suse.cz/mbox/"},{"id":19076,"url":"https://patchwork.plctlab.org/api/1.2/patches/19076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6leohkkq8.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:55","name":"[08/12] ipa-sra: Move caller->callee propagation before callee->caller one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6leohkkq8.fsf@suse.cz/mbox/"},{"id":19074,"url":"https://patchwork.plctlab.org/api/1.2/patches/19074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6k041kkpy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:05","name":"[09/12] ipa-sra: Be optimistic about Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6k041kkpy.fsf@suse.cz/mbox/"},{"id":19079,"url":"https://patchwork.plctlab.org/api/1.2/patches/19079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6iljlkkp4.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:35","name":"[10/12] ipa-sra: Forward propagation of sizes which are safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6iljlkkp4.fsf@suse.cz/mbox/"},{"id":19077,"url":"https://patchwork.plctlab.org/api/1.2/patches/19077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6h6z5kkoy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:41","name":"[11/12] ipa-sra: Make scan_expr_access bail out on uninteresting expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6h6z5kkoy.fsf@suse.cz/mbox/"},{"id":19078,"url":"https://patchwork.plctlab.org/api/1.2/patches/19078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fsepkkou.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:45","name":"[12/12] ipa: Avoid looking for IPA-SRA replacements where there are none","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fsepkkou.fsf@suse.cz/mbox/"},{"id":19089,"url":"https://patchwork.plctlab.org/api/1.2/patches/19089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032310.2723361-1-dmalcolm@redhat.com/","msgid":"<20221112032310.2723361-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-12T03:23:10","name":"[v2] c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032310.2723361-1-dmalcolm@redhat.com/mbox/"},{"id":19097,"url":"https://patchwork.plctlab.org/api/1.2/patches/19097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032740.2724091-1-dmalcolm@redhat.com/","msgid":"<20221112032740.2724091-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-12T03:27:40","name":"[v2] analyzer: add warnings relating to sockets [PR106140]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032740.2724091-1-dmalcolm@redhat.com/mbox/"},{"id":19112,"url":"https://patchwork.plctlab.org/api/1.2/patches/19112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com/","msgid":"<2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com>","list_archive_url":null,"date":"2022-11-12T04:55:30","name":"c: C2x constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com/mbox/"},{"id":19113,"url":"https://patchwork.plctlab.org/api/1.2/patches/19113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28qK55092Ii3COP@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-12T05:07:55","name":"[7] PowerPC: Add -mcpu=future saturating subtract built-ins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28qK55092Ii3COP@toto.the-meissners.org/mbox/"},{"id":19114,"url":"https://patchwork.plctlab.org/api/1.2/patches/19114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28q48o93tWF223A@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-12T05:10:59","name":"[8] PowerPC: Support load/store vector with right length.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28q48o93tWF223A@toto.the-meissners.org/mbox/"},{"id":19121,"url":"https://patchwork.plctlab.org/api/1.2/patches/19121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112073756.912800-1-chenglulu@loongson.cn/","msgid":"<20221112073756.912800-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-12T07:37:56","name":"[v2] LoongArch: Add prefetch instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112073756.912800-1-chenglulu@loongson.cn/mbox/"},{"id":19130,"url":"https://patchwork.plctlab.org/api/1.2/patches/19130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29dkunenk2cCh7w@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T08:47:14","name":"libstdc++: Fix up to_chars ppc64le _Float128 overloads [PR107636]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29dkunenk2cCh7w@tucnak/mbox/"},{"id":19131,"url":"https://patchwork.plctlab.org/api/1.2/patches/19131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29erF8D0T/tXav0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T08:51:56","name":"[committed] libgomp: Fix up build on mingw [PR107641]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29erF8D0T/tXav0@tucnak/mbox/"},{"id":19136,"url":"https://patchwork.plctlab.org/api/1.2/patches/19136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112090754.997467-1-chenglulu@loongson.cn/","msgid":"<20221112090754.997467-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-12T09:07:54","name":"[v2] LoongArch: Optimize the implementation of stack check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112090754.997467-1-chenglulu@loongson.cn/mbox/"},{"id":19163,"url":"https://patchwork.plctlab.org/api/1.2/patches/19163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112102859.302600-1-aldyh@redhat.com/","msgid":"<20221112102859.302600-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-12T10:28:59","name":"[COMMITTED,frange] Avoid testing signed zero test for -fno-signed-zeros.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112102859.302600-1-aldyh@redhat.com/mbox/"},{"id":19166,"url":"https://patchwork.plctlab.org/api/1.2/patches/19166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2+CSlWHeS+aGxVZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T11:23:54","name":"c++: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2+CSlWHeS+aGxVZ@tucnak/mbox/"},{"id":19222,"url":"https://patchwork.plctlab.org/api/1.2/patches/19222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112165331.349041-1-polacek@redhat.com/","msgid":"<20221112165331.349041-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-12T16:53:31","name":"c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112165331.349041-1-polacek@redhat.com/mbox/"},{"id":19223,"url":"https://patchwork.plctlab.org/api/1.2/patches/19223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com/","msgid":"<77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com>","list_archive_url":null,"date":"2022-11-12T18:18:18","name":"ginclude: C2x header version macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com/mbox/"},{"id":19224,"url":"https://patchwork.plctlab.org/api/1.2/patches/19224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112183048.389811-1-aldyh@redhat.com/","msgid":"<20221112183048.389811-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-12T18:30:48","name":"[PR68097] Try to avoid recursing for floats in tree_*_nonnegative_warnv_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112183048.389811-1-aldyh@redhat.com/mbox/"},{"id":19241,"url":"https://patchwork.plctlab.org/api/1.2/patches/19241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112210535.45202-1-aldot@gcc.gnu.org/","msgid":"<20221112210535.45202-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T21:05:35","name":"Fortran: Remove unused declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112210535.45202-1-aldot@gcc.gnu.org/mbox/"},{"id":19258,"url":"https://patchwork.plctlab.org/api/1.2/patches/19258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-2-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:37","name":"[1/7] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19259,"url":"https://patchwork.plctlab.org/api/1.2/patches/19259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-3-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:38","name":"[2/7] RISC-V: Generate vt.maskc on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19261,"url":"https://patchwork.plctlab.org/api/1.2/patches/19261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-4-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:39","name":"[3/7] RISC-V: Support noce_try_store_flag_mask as vt.maskc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-4-philipp.tomsich@vrull.eu/mbox/"},{"id":19262,"url":"https://patchwork.plctlab.org/api/1.2/patches/19262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-5-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:40","name":"[4/7] RISC-V: Recognize sign-extract + and cases for XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-5-philipp.tomsich@vrull.eu/mbox/"},{"id":19263,"url":"https://patchwork.plctlab.org/api/1.2/patches/19263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-6-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:41","name":"[5/7] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-6-philipp.tomsich@vrull.eu/mbox/"},{"id":19260,"url":"https://patchwork.plctlab.org/api/1.2/patches/19260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-7-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:42","name":"[6/7] RISC-V: Support immediates in XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-7-philipp.tomsich@vrull.eu/mbox/"},{"id":19264,"url":"https://patchwork.plctlab.org/api/1.2/patches/19264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-8-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:43","name":"[7/7] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-8-philipp.tomsich@vrull.eu/mbox/"},{"id":19270,"url":"https://patchwork.plctlab.org/api/1.2/patches/19270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-2-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:39","name":"[1/5] c: Set the locus of the function result decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-2-aldot@gcc.gnu.org/mbox/"},{"id":19268,"url":"https://patchwork.plctlab.org/api/1.2/patches/19268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-3-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:40","name":"[2/5] c++: Set the locus of the function result decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-3-aldot@gcc.gnu.org/mbox/"},{"id":19271,"url":"https://patchwork.plctlab.org/api/1.2/patches/19271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-4-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-4-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:41","name":"[3/5] Fortran: Narrow return types [PR78798]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-4-aldot@gcc.gnu.org/mbox/"},{"id":19269,"url":"https://patchwork.plctlab.org/api/1.2/patches/19269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-5-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-5-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:42","name":"[4/5] value-range: Add as_string diagnostics helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-5-aldot@gcc.gnu.org/mbox/"},{"id":19272,"url":"https://patchwork.plctlab.org/api/1.2/patches/19272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-6-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-6-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:43","name":"[5/5] gimple: Add pass to note possible type demotions; IPA pro/demotion; DO NOT MERGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-6-aldot@gcc.gnu.org/mbox/"},{"id":19281,"url":"https://patchwork.plctlab.org/api/1.2/patches/19281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011445.920711-1-jwakely@redhat.com/","msgid":"<20221113011445.920711-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:14:45","name":"[committed] libstdc++: Allow std::to_chars for 128-bit integers in strict mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011445.920711-1-jwakely@redhat.com/mbox/"},{"id":19282,"url":"https://patchwork.plctlab.org/api/1.2/patches/19282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011454.920766-1-jwakely@redhat.com/","msgid":"<20221113011454.920766-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:14:54","name":"[committed] libstdc++: Implement C++20 [PR104166]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011454.920766-1-jwakely@redhat.com/mbox/"},{"id":19283,"url":"https://patchwork.plctlab.org/api/1.2/patches/19283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011640.920781-1-jwakely@redhat.com/","msgid":"<20221113011640.920781-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:16:40","name":"[committed] libstdc++: Add C++20 clocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011640.920781-1-jwakely@redhat.com/mbox/"},{"id":19311,"url":"https://patchwork.plctlab.org/api/1.2/patches/19311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzqjwp.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T09:32:38","name":"builtins: Commonise default handling of nonlocal_goto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzqjwp.fsf@arm.com/mbox/"},{"id":19316,"url":"https://patchwork.plctlab.org/api/1.2/patches/19316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk03zp42v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T09:59:52","name":"[01/16] aarch64: Add arm_streaming(_compatible) attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk03zp42v.fsf@arm.com/mbox/"},{"id":19317,"url":"https://patchwork.plctlab.org/api/1.2/patches/19317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsenp42e.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:09","name":"[02/16] aarch64: Add +sme","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsenp42e.fsf@arm.com/mbox/"},{"id":19318,"url":"https://patchwork.plctlab.org/api/1.2/patches/19318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpbp41y.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:25","name":"[03/16] aarch64: Distinguish streaming-compatible AdvSIMD insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpbp41y.fsf@arm.com/mbox/"},{"id":19319,"url":"https://patchwork.plctlab.org/api/1.2/patches/19319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzp41i.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:41","name":"[04/16] aarch64: Mark relevant SVE instructions as non-streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzp41i.fsf@arm.com/mbox/"},{"id":19323,"url":"https://patchwork.plctlab.org/api/1.2/patches/19323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35anp411.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:58","name":"[05/16] aarch64: Switch PSTATE.SM around calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35anp411.fsf@arm.com/mbox/"},{"id":19327,"url":"https://patchwork.plctlab.org/api/1.2/patches/19327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1sfnpg7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:12","name":"[06/16] aarch64: Add support for SME ZA attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1sfnpg7.fsf@arm.com/mbox/"},{"id":19322,"url":"https://patchwork.plctlab.org/api/1.2/patches/19322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpttu33npft.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:26","name":"[07/16] aarch64: Add a register class for w12-w15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpttu33npft.fsf@arm.com/mbox/"},{"id":19321,"url":"https://patchwork.plctlab.org/api/1.2/patches/19321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmdrnpfh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:38","name":"[08/16] aarch64: Add a VNx1TI mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmdrnpfh.fsf@arm.com/mbox/"},{"id":19329,"url":"https://patchwork.plctlab.org/api/1.2/patches/19329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleofnpf2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:53","name":"[09/16] aarch64: Make AARCH64_FL_SVE requirements explicit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleofnpf2.fsf@arm.com/mbox/"},{"id":19325,"url":"https://patchwork.plctlab.org/api/1.2/patches/19325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z3npen.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:08","name":"[10/16] aarch64: Generalise unspec_based_function_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z3npen.fsf@arm.com/mbox/"},{"id":19328,"url":"https://patchwork.plctlab.org/api/1.2/patches/19328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz9rnpe9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:22","name":"[11/16] aarch64: Generalise _m rules for SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz9rnpe9.fsf@arm.com/mbox/"},{"id":19331,"url":"https://patchwork.plctlab.org/api/1.2/patches/19331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rkfnpdx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:34","name":"[12/16] aarch64: Tweaks to function_resolver::resolve_to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rkfnpdx.fsf@arm.com/mbox/"},{"id":19332,"url":"https://patchwork.plctlab.org/api/1.2/patches/19332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jv3npd8.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:59","name":"[13/16] aarch64: Add support for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jv3npd8.fsf@arm.com/mbox/"},{"id":19324,"url":"https://patchwork.plctlab.org/api/1.2/patches/19324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcvmasc.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:15","name":"[14/16] aarch64: Add support for arm_locally_streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcvmasc.fsf@arm.com/mbox/"},{"id":19330,"url":"https://patchwork.plctlab.org/api/1.2/patches/19330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8njmarz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:28","name":"[15/16] aarch64: Enforce inlining restrictions for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8njmarz.fsf@arm.com/mbox/"},{"id":19326,"url":"https://patchwork.plctlab.org/api/1.2/patches/19326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0y7mari.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:45","name":"[16/16] aarch64: Update sibcall handling for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0y7mari.fsf@arm.com/mbox/"},{"id":19350,"url":"https://patchwork.plctlab.org/api/1.2/patches/19350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYaMLHMM3JCf0W@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:43:36","name":"c++, v2: Implement CWG 2654 - Un-deprecation of compound volatile assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYaMLHMM3JCf0W@tucnak/mbox/"},{"id":19351,"url":"https://patchwork.plctlab.org/api/1.2/patches/19351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYxNPWpM23FCtj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:45:08","name":"c++, v2: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYxNPWpM23FCtj@tucnak/mbox/"},{"id":19352,"url":"https://patchwork.plctlab.org/api/1.2/patches/19352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DZ8MaCk7KWlPoa@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:50:08","name":"c++, v2: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DZ8MaCk7KWlPoa@tucnak/mbox/"},{"id":19365,"url":"https://patchwork.plctlab.org/api/1.2/patches/19365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113150912.1292332-1-christoph.muellner@vrull.eu/","msgid":"<20221113150912.1292332-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:09:12","name":"[RFC] ipa-guarded-deref: Add new pass to dereference function pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113150912.1292332-1-christoph.muellner@vrull.eu/mbox/"},{"id":19368,"url":"https://patchwork.plctlab.org/api/1.2/patches/19368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db31cb32-a2d1-8f75-cc00-cbb679940dad@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-13T15:36:16","name":"[(pushed)] configure: always set SPHINX_BUILD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db31cb32-a2d1-8f75-cc00-cbb679940dad@suse.cz/mbox/"},{"id":19369,"url":"https://patchwork.plctlab.org/api/1.2/patches/19369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113153741.1305175-1-christoph.muellner@vrull.eu/","msgid":"<20221113153741.1305175-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:37:41","name":"[RFC] ipa-cp: Speculatively call specialized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113153741.1305175-1-christoph.muellner@vrull.eu/mbox/"},{"id":19370,"url":"https://patchwork.plctlab.org/api/1.2/patches/19370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz/","msgid":"<811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz>","list_archive_url":null,"date":"2022-11-13T15:41:04","name":"[(pushed)] sphinx: include todolist only if INCLUDE_TODO env. set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz/mbox/"},{"id":19371,"url":"https://patchwork.plctlab.org/api/1.2/patches/19371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113154320.3083043-1-philipp.tomsich@vrull.eu/","msgid":"<20221113154320.3083043-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:43:20","name":"doc: Update Jeff Law'\''s email-address in contrib.rst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113154320.3083043-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19379,"url":"https://patchwork.plctlab.org/api/1.2/patches/19379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113160215.3084008-1-philipp.tomsich@vrull.eu/","msgid":"<20221113160215.3084008-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T16:02:15","name":"aarch64: Add support for Ampere-1A (-mcpu=ampere1a) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113160215.3084008-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19383,"url":"https://patchwork.plctlab.org/api/1.2/patches/19383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3En3SZJqYryOI++@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-13T17:22:37","name":"[committed] hppa: Skip guality tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3En3SZJqYryOI++@mx3210.localdomain/mbox/"},{"id":19386,"url":"https://patchwork.plctlab.org/api/1.2/patches/19386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113180527.2907744-1-arsen@aarsen.me/","msgid":"<20221113180527.2907744-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-11-13T18:05:27","name":"libstdc++: Fix python/ not making install directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113180527.2907744-1-arsen@aarsen.me/mbox/"},{"id":19432,"url":"https://patchwork.plctlab.org/api/1.2/patches/19432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113200553.440728-1-aldyh@redhat.com/","msgid":"<20221113200553.440728-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-13T20:05:53","name":"[range-ops] Implement sqrt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113200553.440728-1-aldyh@redhat.com/mbox/"},{"id":19444,"url":"https://patchwork.plctlab.org/api/1.2/patches/19444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204119.4061447-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204119.4061447-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:41:18","name":"RISC-V: Use .p2align for code-alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204119.4061447-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19445,"url":"https://patchwork.plctlab.org/api/1.2/patches/19445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204139.4061479-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204139.4061479-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:41:39","name":"RISC-V: Zihintpause: add __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204139.4061479-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19446,"url":"https://patchwork.plctlab.org/api/1.2/patches/19446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-2-philipp.tomsich@vrull.eu/","msgid":"<20221113204824.4062042-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:23","name":"[v2,1/2] RISC-V: Add basic support for the Ventana-VT1 core","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19448,"url":"https://patchwork.plctlab.org/api/1.2/patches/19448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-3-philipp.tomsich@vrull.eu/","msgid":"<20221113204824.4062042-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:24","name":"[v2,2/2] RISC-V: Add instruction fusion (for ventana-vt1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19447,"url":"https://patchwork.plctlab.org/api/1.2/patches/19447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204840.4062092-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204840.4062092-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:40","name":"RISC-V: Split \"(a & (1UL << bitno)) ? 0 : -1\" to bext + addi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204840.4062092-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19450,"url":"https://patchwork.plctlab.org/api/1.2/patches/19450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204849.4062129-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204849.4062129-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:49","name":"RISC-V: Split \"(a & (1UL << bitno)) ? 0 : 1\" to bext + xori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204849.4062129-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19449,"url":"https://patchwork.plctlab.org/api/1.2/patches/19449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204858.4062163-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204858.4062163-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:58","name":"RISC-V: Handle \"(a & twobits) == singlebit\" in branches using Zbs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204858.4062163-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19451,"url":"https://patchwork.plctlab.org/api/1.2/patches/19451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Fa4u7MiqH3OS/C@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T21:00:18","name":"aarch64: Add bfloat16_t support for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Fa4u7MiqH3OS/C@tucnak/mbox/"},{"id":19452,"url":"https://patchwork.plctlab.org/api/1.2/patches/19452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc0f818a-1f14-5519-3b3b-3d8141ca96dd@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T21:10:34","name":"sphinx: more build fixing if sphinx-build is missing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc0f818a-1f14-5519-3b3b-3d8141ca96dd@redhat.com/mbox/"},{"id":19453,"url":"https://patchwork.plctlab.org/api/1.2/patches/19453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-2-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:22","name":"[v2,1/8] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19454,"url":"https://patchwork.plctlab.org/api/1.2/patches/19454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-3-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:23","name":"[v2,2/8] RISC-V: Generate vt.maskc on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19457,"url":"https://patchwork.plctlab.org/api/1.2/patches/19457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-4-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:24","name":"[v2,3/8] RISC-V: Support noce_try_store_flag_mask as vt.maskc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-4-philipp.tomsich@vrull.eu/mbox/"},{"id":19455,"url":"https://patchwork.plctlab.org/api/1.2/patches/19455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-5-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:25","name":"[v2,4/8] RISC-V: Recognize sign-extract + and cases for XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-5-philipp.tomsich@vrull.eu/mbox/"},{"id":19458,"url":"https://patchwork.plctlab.org/api/1.2/patches/19458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-6-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:26","name":"[v2,5/8] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-6-philipp.tomsich@vrull.eu/mbox/"},{"id":19456,"url":"https://patchwork.plctlab.org/api/1.2/patches/19456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-7-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:27","name":"[v2,6/8] RISC-V: Support immediates in XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-7-philipp.tomsich@vrull.eu/mbox/"},{"id":19460,"url":"https://patchwork.plctlab.org/api/1.2/patches/19460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-8-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:28","name":"[v2,7/8] RISC-V: Ventana-VT1 supports XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-8-philipp.tomsich@vrull.eu/mbox/"},{"id":19459,"url":"https://patchwork.plctlab.org/api/1.2/patches/19459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-9-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-9-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:29","name":"[v2,8/8] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-9-philipp.tomsich@vrull.eu/mbox/"},{"id":19461,"url":"https://patchwork.plctlab.org/api/1.2/patches/19461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-2-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:30","name":"[1/7] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-2-christoph.muellner@vrull.eu/mbox/"},{"id":19462,"url":"https://patchwork.plctlab.org/api/1.2/patches/19462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-3-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:31","name":"[2/7] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-3-christoph.muellner@vrull.eu/mbox/"},{"id":19465,"url":"https://patchwork.plctlab.org/api/1.2/patches/19465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-4-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:32","name":"[3/7] riscv: thead: Add support for XTheadBa and XTheadBs ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-4-christoph.muellner@vrull.eu/mbox/"},{"id":19463,"url":"https://patchwork.plctlab.org/api/1.2/patches/19463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-5-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:33","name":"[4/7] riscv: thead: Add support for XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-5-christoph.muellner@vrull.eu/mbox/"},{"id":19464,"url":"https://patchwork.plctlab.org/api/1.2/patches/19464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-6-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:34","name":"[5/7] riscv: thead: Add support for XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-6-christoph.muellner@vrull.eu/mbox/"},{"id":19467,"url":"https://patchwork.plctlab.org/api/1.2/patches/19467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-7-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:35","name":"[6/7] riscv: thead: Add support for XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-7-christoph.muellner@vrull.eu/mbox/"},{"id":19466,"url":"https://patchwork.plctlab.org/api/1.2/patches/19466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-8-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:36","name":"[7/7] riscv: Add basic extension support for XTheadFmv and XTheadInt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-8-christoph.muellner@vrull.eu/mbox/"},{"id":19469,"url":"https://patchwork.plctlab.org/api/1.2/patches/19469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113220057.2753718-1-christoph.muellner@vrull.eu/","msgid":"<20221113220057.2753718-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T22:00:57","name":"[RFC] riscv: thead: Add support for XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113220057.2753718-1-christoph.muellner@vrull.eu/mbox/"},{"id":19471,"url":"https://patchwork.plctlab.org/api/1.2/patches/19471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230309.2819841-1-dmalcolm@redhat.com/","msgid":"<20221113230309.2819841-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-13T23:03:09","name":"[committed] analyzer: new warning: -Wanalyzer-tainted-assertion [PR106235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230309.2819841-1-dmalcolm@redhat.com/mbox/"},{"id":19474,"url":"https://patchwork.plctlab.org/api/1.2/patches/19474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-2-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:15","name":"[1/7] riscv: bitmanip: add orc.b as an unspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-2-christoph.muellner@vrull.eu/mbox/"},{"id":19475,"url":"https://patchwork.plctlab.org/api/1.2/patches/19475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-3-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:16","name":"[2/7] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-3-christoph.muellner@vrull.eu/mbox/"},{"id":19473,"url":"https://patchwork.plctlab.org/api/1.2/patches/19473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-4-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:17","name":"[3/7] riscv: Enable overlap-by-pieces via tune param","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-4-christoph.muellner@vrull.eu/mbox/"},{"id":19476,"url":"https://patchwork.plctlab.org/api/1.2/patches/19476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-5-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:18","name":"[4/7] riscv: Move riscv_block_move_loop to separate file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-5-christoph.muellner@vrull.eu/mbox/"},{"id":19472,"url":"https://patchwork.plctlab.org/api/1.2/patches/19472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-6-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:19","name":"[5/7] riscv: Use by-pieces to do overlapping accesses in block_move_straight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-6-christoph.muellner@vrull.eu/mbox/"},{"id":19477,"url":"https://patchwork.plctlab.org/api/1.2/patches/19477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-7-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:20","name":"[6/7] riscv: Add support for strlen inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-7-christoph.muellner@vrull.eu/mbox/"},{"id":19478,"url":"https://patchwork.plctlab.org/api/1.2/patches/19478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-8-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:21","name":"[7/7] riscv: Add support for str(n)cmp inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-8-christoph.muellner@vrull.eu/mbox/"},{"id":19523,"url":"https://patchwork.plctlab.org/api/1.2/patches/19523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff799b68-b3d6-7a97-d203-dfb2a427bb5d@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-14T02:52:58","name":"[(pushed)] gcc-changelog: temporarily disable check_line_start","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff799b68-b3d6-7a97-d203-dfb2a427bb5d@suse.cz/mbox/"},{"id":19542,"url":"https://patchwork.plctlab.org/api/1.2/patches/19542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-1-ppalka@redhat.com/","msgid":"<20221114045047.362745-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:45","name":"[1/3] libstdc++: Implement ranges::contains/contains_subrange from P2302R4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-1-ppalka@redhat.com/mbox/"},{"id":19543,"url":"https://patchwork.plctlab.org/api/1.2/patches/19543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-2-ppalka@redhat.com/","msgid":"<20221114045047.362745-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:46","name":"[2/3] libstdc++: Implement ranges::iota from P2440R1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-2-ppalka@redhat.com/mbox/"},{"id":19544,"url":"https://patchwork.plctlab.org/api/1.2/patches/19544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-3-ppalka@redhat.com/","msgid":"<20221114045047.362745-3-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:47","name":"[3/3] libstdc++: Implement ranges::find_last{, _if, _if_not} from P1223R5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-3-ppalka@redhat.com/mbox/"},{"id":19551,"url":"https://patchwork.plctlab.org/api/1.2/patches/19551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114070937.17B8013A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114070937.17B8013A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T07:09:36","name":"restrict gcc.dg/pr107554.c to 64bit platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114070937.17B8013A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19562,"url":"https://patchwork.plctlab.org/api/1.2/patches/19562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hy1ckL3ZluEOSi@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T07:48:37","name":"libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hy1ckL3ZluEOSi@tucnak/mbox/"},{"id":19566,"url":"https://patchwork.plctlab.org/api/1.2/patches/19566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hz0QswGCGclWGu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T07:52:49","name":"i386: Emit 16b atomics inline with -m64 -mcx16 -mavx [PR104688]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hz0QswGCGclWGu@tucnak/mbox/"},{"id":19663,"url":"https://patchwork.plctlab.org/api/1.2/patches/19663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IaE4OIQGHhvhXv@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T10:36:03","name":"c++: Add testcase for DR 2392","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IaE4OIQGHhvhXv@tucnak/mbox/"},{"id":19669,"url":"https://patchwork.plctlab.org/api/1.2/patches/19669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IbNWSVE+Ydjk4u@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T10:40:53","name":"c++: Allow attributes on concepts - DR 2428","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IbNWSVE+Ydjk4u@tucnak/mbox/"},{"id":19719,"url":"https://patchwork.plctlab.org/api/1.2/patches/19719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3ImZ/fcwjmMFQyb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T11:28:39","name":"c++: Alignment changes to layout compatibility/common initial sequence - DR2583","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3ImZ/fcwjmMFQyb@tucnak/mbox/"},{"id":19727,"url":"https://patchwork.plctlab.org/api/1.2/patches/19727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Ip4JHD7cg8W8MG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T11:43:28","name":"c++: Add testcase for DR 2604","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Ip4JHD7cg8W8MG@tucnak/mbox/"},{"id":19810,"url":"https://patchwork.plctlab.org/api/1.2/patches/19810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T13:34:57","name":"remove duplicate match.pd patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19814,"url":"https://patchwork.plctlab.org/api/1.2/patches/19814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135136.52466-1-poulhies@adacore.com/","msgid":"<20221114135136.52466-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:36","name":"[COMMITTED] ada: Remove gnatcheck reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135136.52466-1-poulhies@adacore.com/mbox/"},{"id":19815,"url":"https://patchwork.plctlab.org/api/1.2/patches/19815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135146.52584-1-poulhies@adacore.com/","msgid":"<20221114135146.52584-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:46","name":"[COMMITTED] ada: Improve location of error messages in instantiations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135146.52584-1-poulhies@adacore.com/mbox/"},{"id":19817,"url":"https://patchwork.plctlab.org/api/1.2/patches/19817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135156.52647-1-poulhies@adacore.com/","msgid":"<20221114135156.52647-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:56","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on QNX and RTEMS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135156.52647-1-poulhies@adacore.com/mbox/"},{"id":19818,"url":"https://patchwork.plctlab.org/api/1.2/patches/19818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135202.52712-1-poulhies@adacore.com/","msgid":"<20221114135202.52712-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:02","name":"[COMMITTED] ada: Expand generic formal subprograms with contracts for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135202.52712-1-poulhies@adacore.com/mbox/"},{"id":19823,"url":"https://patchwork.plctlab.org/api/1.2/patches/19823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135208.52775-1-poulhies@adacore.com/","msgid":"<20221114135208.52775-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:08","name":"[COMMITTED] ada: Fix style in code for generic formal subprograms with contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135208.52775-1-poulhies@adacore.com/mbox/"},{"id":19825,"url":"https://patchwork.plctlab.org/api/1.2/patches/19825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135212.52840-1-poulhies@adacore.com/","msgid":"<20221114135212.52840-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:12","name":"[COMMITTED] ada: Adjust locations in aspects on generic formal subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135212.52840-1-poulhies@adacore.com/mbox/"},{"id":19822,"url":"https://patchwork.plctlab.org/api/1.2/patches/19822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135219.52903-1-poulhies@adacore.com/","msgid":"<20221114135219.52903-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:19","name":"[COMMITTED] ada: Fix error on SPARK_Mode on library-level separate body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135219.52903-1-poulhies@adacore.com/mbox/"},{"id":19824,"url":"https://patchwork.plctlab.org/api/1.2/patches/19824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135224.52966-1-poulhies@adacore.com/","msgid":"<20221114135224.52966-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:24","name":"[COMMITTED] ada: Fix non-capturing parentheses handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135224.52966-1-poulhies@adacore.com/mbox/"},{"id":19816,"url":"https://patchwork.plctlab.org/api/1.2/patches/19816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135229.53029-1-poulhies@adacore.com/","msgid":"<20221114135229.53029-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:29","name":"[COMMITTED] ada: Crash on applying '\''Pos to expression of a type derived from a formal type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135229.53029-1-poulhies@adacore.com/mbox/"},{"id":19820,"url":"https://patchwork.plctlab.org/api/1.2/patches/19820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135240.53093-1-poulhies@adacore.com/","msgid":"<20221114135240.53093-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:40","name":"[COMMITTED] ada: hardcfr docs: add optional checkpoints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135240.53093-1-poulhies@adacore.com/mbox/"},{"id":19828,"url":"https://patchwork.plctlab.org/api/1.2/patches/19828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135245.53157-1-poulhies@adacore.com/","msgid":"<20221114135245.53157-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:45","name":"[COMMITTED] ada: Flag unsupported dispatching constructor calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135245.53157-1-poulhies@adacore.com/mbox/"},{"id":19826,"url":"https://patchwork.plctlab.org/api/1.2/patches/19826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135252.53221-1-poulhies@adacore.com/","msgid":"<20221114135252.53221-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:52","name":"[COMMITTED] ada: Remove incorrect comments about initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135252.53221-1-poulhies@adacore.com/mbox/"},{"id":19819,"url":"https://patchwork.plctlab.org/api/1.2/patches/19819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135258.53285-1-poulhies@adacore.com/","msgid":"<20221114135258.53285-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:58","name":"[COMMITTED] ada: Silence CodePeer false positive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135258.53285-1-poulhies@adacore.com/mbox/"},{"id":19821,"url":"https://patchwork.plctlab.org/api/1.2/patches/19821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135324.19352-1-philipp.tomsich@vrull.eu/","msgid":"<20221114135324.19352-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T13:53:24","name":"[v2] aarch64: Add support for Ampere-1A (-mcpu=ampere1a) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135324.19352-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19830,"url":"https://patchwork.plctlab.org/api/1.2/patches/19830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3JJXGaKji0gKDlV@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T13:57:48","name":"libstdc++: Fix up for extended floating point types [PR107649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3JJXGaKji0gKDlV@tucnak/mbox/"},{"id":19836,"url":"https://patchwork.plctlab.org/api/1.2/patches/19836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114144235.20390-1-philipp.tomsich@vrull.eu/","msgid":"<20221114144235.20390-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T14:42:35","name":"GCC13: aarch64: Document new cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114144235.20390-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19849,"url":"https://patchwork.plctlab.org/api/1.2/patches/19849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114145348.20652-1-philipp.tomsich@vrull.eu/","msgid":"<20221114145348.20652-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T14:53:48","name":"[v2] gcc-13: aarch64: Document new cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114145348.20652-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19852,"url":"https://patchwork.plctlab.org/api/1.2/patches/19852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668438395-2326-1-git-send-email-apinski@marvell.com/","msgid":"<1668438395-2326-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-14T15:06:35","name":"[COMMITTED] Fix some @opindex with - in the front","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668438395-2326-1-git-send-email-apinski@marvell.com/mbox/"},{"id":19855,"url":"https://patchwork.plctlab.org/api/1.2/patches/19855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668439517-2899-1-git-send-email-apinski@marvell.com/","msgid":"<1668439517-2899-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-14T15:25:17","name":"[COMMITTED] Fix @opindex for m80387","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668439517-2899-1-git-send-email-apinski@marvell.com/mbox/"},{"id":19859,"url":"https://patchwork.plctlab.org/api/1.2/patches/19859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-2-krebbel@linux.ibm.com/","msgid":"<20221114152657.43632-2-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2022-11-14T15:26:56","name":"[1/2] New reg note REG_CFA_NORESTORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-2-krebbel@linux.ibm.com/mbox/"},{"id":19858,"url":"https://patchwork.plctlab.org/api/1.2/patches/19858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-3-krebbel@linux.ibm.com/","msgid":"<20221114152657.43632-3-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2022-11-14T15:26:57","name":"[2/2] IBM zSystems: Save argument registers to the stack -mpreserve-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-3-krebbel@linux.ibm.com/mbox/"},{"id":19868,"url":"https://patchwork.plctlab.org/api/1.2/patches/19868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM6PR12MB4795D38A7C29749BBDEABB98E3059@DM6PR12MB4795.namprd12.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T16:18:43","name":"[X86_64] Separate znver4 insn reservations from older znvers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM6PR12MB4795D38A7C29749BBDEABB98E3059@DM6PR12MB4795.namprd12.prod.outlook.com/mbox/"},{"id":19876,"url":"https://patchwork.plctlab.org/api/1.2/patches/19876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114162918.1563116-1-jiawei@iscas.ac.cn/","msgid":"<20221114162918.1563116-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-14T16:29:18","name":"RISC-V: Optimal RVV epilogue logic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114162918.1563116-1-jiawei@iscas.ac.cn/mbox/"},{"id":19961,"url":"https://patchwork.plctlab.org/api/1.2/patches/19961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114180832.49DD013A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114180832.49DD013A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T18:08:31","name":"tree-optimization/107485 - fix non-call exception ICE with inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114180832.49DD013A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19999,"url":"https://patchwork.plctlab.org/api/1.2/patches/19999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3KO4nPza2D9nJMQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T18:54:26","name":"[wwwdocs] cxx-status: Add C++23 papers from the Nov 2022 Kona WG21 plenary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3KO4nPza2D9nJMQ@redhat.com/mbox/"},{"id":20005,"url":"https://patchwork.plctlab.org/api/1.2/patches/20005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16593-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T19:00:14","name":"[committed] middle-end: Fix can_special_div_by_const doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16593-tamar@arm.com/mbox/"},{"id":20020,"url":"https://patchwork.plctlab.org/api/1.2/patches/20020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16594-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T20:08:20","name":"[committed] middle-end: Fix addsub patch removing return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16594-tamar@arm.com/mbox/"},{"id":20049,"url":"https://patchwork.plctlab.org/api/1.2/patches/20049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211141505170.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-14T22:03:56","name":"[committed] ira: Fix `create_insn_allocnos'\'' `outer'\'' parameter documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211141505170.19931@tpp.orcam.me.uk/mbox/"},{"id":20057,"url":"https://patchwork.plctlab.org/api/1.2/patches/20057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114225213.3714883-1-jason@redhat.com/","msgid":"<20221114225213.3714883-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-14T22:52:13","name":"[pushed] c++: only declare satisfied friends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114225213.3714883-1-jason@redhat.com/mbox/"},{"id":20058,"url":"https://patchwork.plctlab.org/api/1.2/patches/20058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com/","msgid":"<24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com>","list_archive_url":null,"date":"2022-11-14T23:00:09","name":"[committed] wwwdocs: gcc-13: Add release notes for more C23 features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com/mbox/"},{"id":20088,"url":"https://patchwork.plctlab.org/api/1.2/patches/20088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142306400.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-14T23:21:41","name":"ira: Remove duplicate `memset'\'' over `full_costs'\'' from `assign_hard_reg'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142306400.19931@tpp.orcam.me.uk/mbox/"},{"id":20107,"url":"https://patchwork.plctlab.org/api/1.2/patches/20107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Lea4Fo/Hl8iFNZ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T00:33:47","name":"[v2] c++: Disable -Wignored-qualifiers for template args [PR107492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Lea4Fo/Hl8iFNZ@redhat.com/mbox/"},{"id":20167,"url":"https://patchwork.plctlab.org/api/1.2/patches/20167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115033559.66827-1-hongyu.wang@intel.com/","msgid":"<20221115033559.66827-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-15T03:35:59","name":"doc: Reword the description of -mrelax-cmpxchg-loop [PR 107676]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115033559.66827-1-hongyu.wang@intel.com/mbox/"},{"id":20172,"url":"https://patchwork.plctlab.org/api/1.2/patches/20172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668486450-9315-1-git-send-email-apinski@marvell.com/","msgid":"<1668486450-9315-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:27:30","name":"Fix @opindex for mcall-aixdesc and mcall-openbsd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668486450-9315-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20181,"url":"https://patchwork.plctlab.org/api/1.2/patches/20181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487081-9637-1-git-send-email-apinski@marvell.com/","msgid":"<1668487081-9637-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:38:01","name":"Remove documentation for MeP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487081-9637-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20182,"url":"https://patchwork.plctlab.org/api/1.2/patches/20182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487461-9942-1-git-send-email-apinski@marvell.com/","msgid":"<1668487461-9942-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:44:21","name":"Remove the picoChip documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487461-9942-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20183,"url":"https://patchwork.plctlab.org/api/1.2/patches/20183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ad110-065e-9414-1312-bff5a0644e97@siemens.com/","msgid":"<927ad110-065e-9414-1312-bff5a0644e97@siemens.com>","list_archive_url":null,"date":"2022-11-15T04:46:15","name":"[v4] OpenMP: Generate SIMD clones for functions with \"declare target\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ad110-065e-9414-1312-bff5a0644e97@siemens.com/mbox/"},{"id":20196,"url":"https://patchwork.plctlab.org/api/1.2/patches/20196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668488508-10524-1-git-send-email-apinski@marvell.com/","msgid":"<1668488508-10524-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T05:01:48","name":"Remove Score documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668488508-10524-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20212,"url":"https://patchwork.plctlab.org/api/1.2/patches/20212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115064624.2352237-2-zengxiao@eswincomputing.com/","msgid":"<20221115064624.2352237-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T06:46:24","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115064624.2352237-2-zengxiao@eswincomputing.com/mbox/"},{"id":20213,"url":"https://patchwork.plctlab.org/api/1.2/patches/20213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115065159.2353620-2-zengxiao@eswincomputing.com/","msgid":"<20221115065159.2353620-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T06:51:59","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115065159.2353620-2-zengxiao@eswincomputing.com/mbox/"},{"id":20224,"url":"https://patchwork.plctlab.org/api/1.2/patches/20224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3NAj5CVTklLb8xg@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-15T07:32:31","name":"[committed] c++: Fix a typo in function name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3NAj5CVTklLb8xg@tucnak/mbox/"},{"id":20234,"url":"https://patchwork.plctlab.org/api/1.2/patches/20234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115080925.2354502-2-zengxiao@eswincomputing.com/","msgid":"<20221115080925.2354502-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T08:09:25","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115080925.2354502-2-zengxiao@eswincomputing.com/mbox/"},{"id":20240,"url":"https://patchwork.plctlab.org/api/1.2/patches/20240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-2-jiawei@iscas.ac.cn/","msgid":"<20221115083358.4130952-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T08:33:57","name":"[v2,1/2] RISC-V: Add spill sp adjust check testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-2-jiawei@iscas.ac.cn/mbox/"},{"id":20239,"url":"https://patchwork.plctlab.org/api/1.2/patches/20239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-3-jiawei@iscas.ac.cn/","msgid":"<20221115083358.4130952-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T08:33:58","name":"[v2,2/2] RISC-V: Optimize RVV epilogue logic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-3-jiawei@iscas.ac.cn/mbox/"},{"id":20292,"url":"https://patchwork.plctlab.org/api/1.2/patches/20292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16595-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T10:33:36","name":"middle-end: replace GET_MODE_WIDER_MODE with GET_MODE_NEXT_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16595-tamar@arm.com/mbox/"},{"id":20329,"url":"https://patchwork.plctlab.org/api/1.2/patches/20329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115113713.1131991-1-jwakely@redhat.com/","msgid":"<20221115113713.1131991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T11:37:13","name":"[committed] libstdc++: Document use of Markdown for Doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115113713.1131991-1-jwakely@redhat.com/mbox/"},{"id":20345,"url":"https://patchwork.plctlab.org/api/1.2/patches/20345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115121345.3650155-1-chenyixuan@iscas.ac.cn/","msgid":"<20221115121345.3650155-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T12:13:45","name":"Optimize testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115121345.3650155-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":20352,"url":"https://patchwork.plctlab.org/api/1.2/patches/20352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3OF0UXlqmuibCUZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-15T12:28:01","name":"c++: Fix up calls to static operator() or operator[] [PR107624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3OF0UXlqmuibCUZ@tucnak/mbox/"},{"id":20363,"url":"https://patchwork.plctlab.org/api/1.2/patches/20363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115130328.15413-1-hejinyang@loongson.cn/","msgid":"<20221115130328.15413-1-hejinyang@loongson.cn>","list_archive_url":null,"date":"2022-11-15T13:03:28","name":"LoongArch: Fix atomic_exchange make comparison and may jump out","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115130328.15413-1-hejinyang@loongson.cn/mbox/"},{"id":20369,"url":"https://patchwork.plctlab.org/api/1.2/patches/20369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz/","msgid":"<00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz>","list_archive_url":null,"date":"2022-11-15T13:19:04","name":"[(pushed)] libsanitizer: use git clone --depth 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz/mbox/"},{"id":20401,"url":"https://patchwork.plctlab.org/api/1.2/patches/20401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143119.1155190-1-jwakely@redhat.com/","msgid":"<20221115143119.1155190-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:19","name":"[committed] libstdc++: Fix detection of std::format support for __float128 [PR107693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143119.1155190-1-jwakely@redhat.com/mbox/"},{"id":20402,"url":"https://patchwork.plctlab.org/api/1.2/patches/20402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143134.1155246-1-jwakely@redhat.com/","msgid":"<20221115143134.1155246-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:34","name":"[committed] libstc++: std::formattable concept should not be defined for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143134.1155246-1-jwakely@redhat.com/mbox/"},{"id":20403,"url":"https://patchwork.plctlab.org/api/1.2/patches/20403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143145.1155275-1-jwakely@redhat.com/","msgid":"<20221115143145.1155275-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:45","name":"[committed] libstdc++: Fix std::format test for strict -std=c++20 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143145.1155275-1-jwakely@redhat.com/mbox/"},{"id":20469,"url":"https://patchwork.plctlab.org/api/1.2/patches/20469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115163135.604240-1-aldyh@redhat.com/","msgid":"<20221115163135.604240-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-15T16:31:35","name":"[range-ops] Minor readability fix.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115163135.604240-1-aldyh@redhat.com/mbox/"},{"id":20474,"url":"https://patchwork.plctlab.org/api/1.2/patches/20474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142117380.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-15T17:02:13","name":"testsuite: Fix missing EFFECTIVE_TARGETS variable errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142117380.19931@tpp.orcam.me.uk/mbox/"},{"id":20505,"url":"https://patchwork.plctlab.org/api/1.2/patches/20505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af77b16e0296d57c2df5a5edb7c2aa25c3290cb1.camel@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T18:35:05","name":"[v3] c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af77b16e0296d57c2df5a5edb7c2aa25c3290cb1.camel@redhat.com/mbox/"},{"id":20506,"url":"https://patchwork.plctlab.org/api/1.2/patches/20506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com/","msgid":"<1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com>","list_archive_url":null,"date":"2022-11-15T18:47:25","name":"nvptx/mkoffload.cc: Fix \"$nohost\" check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com/mbox/"},{"id":20510,"url":"https://patchwork.plctlab.org/api/1.2/patches/20510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190523.23018-1-david.faust@oracle.com/","msgid":"<20221115190523.23018-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-15T19:05:23","name":"[committed] bpf: avoid possible use of uninitialized variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190523.23018-1-david.faust@oracle.com/mbox/"},{"id":20512,"url":"https://patchwork.plctlab.org/api/1.2/patches/20512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190806.2756221-1-kevinl@rivosinc.com/","msgid":"<20221115190806.2756221-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-15T19:08:06","name":"RISC-V uninit-pred-9_b.c failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190806.2756221-1-kevinl@rivosinc.com/mbox/"},{"id":20553,"url":"https://patchwork.plctlab.org/api/1.2/patches/20553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-98e07e65-78c9-4364-866f-6b4d29f24992-1668545104036@3c-app-gmx-bs61/","msgid":"","list_archive_url":null,"date":"2022-11-15T20:45:04","name":"Fortran: ICE in simplification of array expression involving power [PR107680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-98e07e65-78c9-4364-866f-6b4d29f24992-1668545104036@3c-app-gmx-bs61/mbox/"},{"id":20620,"url":"https://patchwork.plctlab.org/api/1.2/patches/20620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115223648.196471-1-christoph.muellner@vrull.eu/","msgid":"<20221115223648.196471-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-15T22:36:48","name":"doc: invoke: riscv: Fix closing block bracket","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115223648.196471-1-christoph.muellner@vrull.eu/mbox/"},{"id":20627,"url":"https://patchwork.plctlab.org/api/1.2/patches/20627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115230845.210285-1-christoph.muellner@vrull.eu/","msgid":"<20221115230845.210285-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-15T23:08:45","name":"doc: invoke: pru/riscv: Fix option list formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115230845.210285-1-christoph.muellner@vrull.eu/mbox/"},{"id":20643,"url":"https://patchwork.plctlab.org/api/1.2/patches/20643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3QvHg2twpwSpCZJ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T00:30:22","name":"[v2] c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3QvHg2twpwSpCZJ@redhat.com/mbox/"},{"id":20662,"url":"https://patchwork.plctlab.org/api/1.2/patches/20662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021027.519897-1-chenglulu@loongson.cn/","msgid":"<20221116021027.519897-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-16T02:10:28","name":"[v3] LoongArch: Add prefetch instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021027.519897-1-chenglulu@loongson.cn/mbox/"},{"id":20661,"url":"https://patchwork.plctlab.org/api/1.2/patches/20661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021154.4AE372042F@pchp3.se.axis.com/","msgid":"<20221116021154.4AE372042F@pchp3.se.axis.com>","list_archive_url":null,"date":"2022-11-16T02:11:54","name":"testsuite: Fix mistransformed gcov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021154.4AE372042F@pchp3.se.axis.com/mbox/"},{"id":20664,"url":"https://patchwork.plctlab.org/api/1.2/patches/20664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com/","msgid":"<153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-16T02:32:42","name":"[rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com/mbox/"},{"id":20670,"url":"https://patchwork.plctlab.org/api/1.2/patches/20670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116024619.1465996-1-ppalka@redhat.com/","msgid":"<20221116024619.1465996-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-16T02:46:19","name":"libstdc++: Fix stream initialization with static library [PR107701]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116024619.1465996-1-ppalka@redhat.com/mbox/"},{"id":20735,"url":"https://patchwork.plctlab.org/api/1.2/patches/20735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SGHV9P/xR6N2zg@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T06:41:33","name":"[committed] range-op-float: Fix up float_binary_op_range_finish [PR107668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SGHV9P/xR6N2zg@tucnak/mbox/"},{"id":20736,"url":"https://patchwork.plctlab.org/api/1.2/patches/20736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e73c1320-0738-7645-b0fa-1da62a31ab94@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T06:48:25","name":"[1/2] rs6000: Emit vector fp comparison directly in rs6000_emit_vector_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e73c1320-0738-7645-b0fa-1da62a31ab94@linux.ibm.com/mbox/"},{"id":20738,"url":"https://patchwork.plctlab.org/api/1.2/patches/20738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com/","msgid":"<247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com>","list_archive_url":null,"date":"2022-11-16T06:51:04","name":"[2/2] rs6000: Refine integer comparison handlings in rs6000_emit_vector_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com/mbox/"},{"id":20747,"url":"https://patchwork.plctlab.org/api/1.2/patches/20747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1d78b22-e5e9-5104-a3aa-750d8bb6cba2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T07:29:20","name":"Fix typo in gimple_fold_partial_load_store_mem_ref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1d78b22-e5e9-5104-a3aa-750d8bb6cba2@linux.ibm.com/mbox/"},{"id":20788,"url":"https://patchwork.plctlab.org/api/1.2/patches/20788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Selj1pt9/Jq0Yt@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T08:25:58","name":"c++, v2: Fix up calls to static operator() or operator[] [PR107624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Selj1pt9/Jq0Yt@tucnak/mbox/"},{"id":20822,"url":"https://patchwork.plctlab.org/api/1.2/patches/20822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SoCZfrEbw3KN3t@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T09:06:17","name":"libgcc, i386: Add __fix{,uns}bfti and __float{,un}tibf [PR107703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SoCZfrEbw3KN3t@tucnak/mbox/"},{"id":20871,"url":"https://patchwork.plctlab.org/api/1.2/patches/20871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S4wvO/i4rBQPVj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T10:17:38","name":"c++, v3: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S4wvO/i4rBQPVj@tucnak/mbox/"},{"id":20893,"url":"https://patchwork.plctlab.org/api/1.2/patches/20893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S9AnlIctx/iFPf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T10:35:46","name":"c++, v2: Alignment changes to layout compatibility/common initial sequence - DR2583","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S9AnlIctx/iFPf@tucnak/mbox/"},{"id":20974,"url":"https://patchwork.plctlab.org/api/1.2/patches/20974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31a32901-1912-988b-c641-1f23093e8563@codesourcery.com/","msgid":"<31a32901-1912-988b-c641-1f23093e8563@codesourcery.com>","list_archive_url":null,"date":"2022-11-16T11:42:16","name":"gcn: Add __builtin_gcn_kernarg_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31a32901-1912-988b-c641-1f23093e8563@codesourcery.com/mbox/"},{"id":20978,"url":"https://patchwork.plctlab.org/api/1.2/patches/20978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3TOsnjlLHvSarjl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T11:51:14","name":"libgcc, i386, optabs, v2: Add __float{, un}tibf to libgcc and expand BF -> integral through SF intermediate [PR107703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3TOsnjlLHvSarjl@tucnak/mbox/"},{"id":21060,"url":"https://patchwork.plctlab.org/api/1.2/patches/21060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132920.2958143-1-dmalcolm@redhat.com/","msgid":"<20221116132920.2958143-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:29:20","name":"[committed] analyzer: split out checker-path.cc into a new checker-event.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132920.2958143-1-dmalcolm@redhat.com/mbox/"},{"id":21062,"url":"https://patchwork.plctlab.org/api/1.2/patches/21062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132942.2958189-1-dmalcolm@redhat.com/","msgid":"<20221116132942.2958189-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:29:42","name":"[committed] analyzer: use known_function to simplify region_model::on_call_{pre, post}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132942.2958189-1-dmalcolm@redhat.com/mbox/"},{"id":21069,"url":"https://patchwork.plctlab.org/api/1.2/patches/21069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133815.1351836-1-jwakely@redhat.com/","msgid":"<20221116133815.1351836-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:38:15","name":"[committed] libstdc++: Improve comments on pretty printer code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133815.1351836-1-jwakely@redhat.com/mbox/"},{"id":21070,"url":"https://patchwork.plctlab.org/api/1.2/patches/21070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133834.1351862-1-jwakely@redhat.com/","msgid":"<20221116133834.1351862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:38:34","name":"[committed] libstdc++: Fix std::any pretty printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133834.1351862-1-jwakely@redhat.com/mbox/"},{"id":21080,"url":"https://patchwork.plctlab.org/api/1.2/patches/21080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz/","msgid":"<66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz>","list_archive_url":null,"date":"2022-11-16T14:14:41","name":"[(pushed)] libatomic: regenerate Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz/mbox/"},{"id":21117,"url":"https://patchwork.plctlab.org/api/1.2/patches/21117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116150735.1374787-1-jwakely@redhat.com/","msgid":"<20221116150735.1374787-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T15:07:35","name":"[committed] libstdc++: Add test for chrono::utc_clock leap second offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116150735.1374787-1-jwakely@redhat.com/mbox/"},{"id":21120,"url":"https://patchwork.plctlab.org/api/1.2/patches/21120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153408.86FA313480@imap2.suse-dmz.suse.de/","msgid":"<20221116153408.86FA313480@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-16T15:34:08","name":"middle-end/107679 - fix SSA rewrite of clobber of parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153408.86FA313480@imap2.suse-dmz.suse.de/mbox/"},{"id":21121,"url":"https://patchwork.plctlab.org/api/1.2/patches/21121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153421.1EE2513480@imap2.suse-dmz.suse.de/","msgid":"<20221116153421.1EE2513480@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-16T15:34:20","name":"tree-optimization/107686 - fix bitfield ref through vec_unpack optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153421.1EE2513480@imap2.suse-dmz.suse.de/mbox/"},{"id":21133,"url":"https://patchwork.plctlab.org/api/1.2/patches/21133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ORTB8ja1orPQI2PlPNzQUO4jsLD8w4L7DFPV-Gc_lt29nt6oJn7d4sVnjtdlnn4ehnd0FBYvRUR0lH1QTVFVku2n94g-7xC5xi2Nq2jUSG0=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-11-16T16:03:17","name":"jit: Install jit headers in $(libsubincludedir) [PR 101491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ORTB8ja1orPQI2PlPNzQUO4jsLD8w4L7DFPV-Gc_lt29nt6oJn7d4sVnjtdlnn4ehnd0FBYvRUR0lH1QTVFVku2n94g-7xC5xi2Nq2jUSG0=@lorenzosalvadore.it/mbox/"},{"id":21134,"url":"https://patchwork.plctlab.org/api/1.2/patches/21134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3UKmGtHHRaNahjM@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T16:06:48","name":"[v3] c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3UKmGtHHRaNahjM@redhat.com/mbox/"},{"id":21254,"url":"https://patchwork.plctlab.org/api/1.2/patches/21254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-db3546b8-31ca-43d1-bb5f-962f38c399c4-1668631813744@3c-app-gmx-bap19/","msgid":"","list_archive_url":null,"date":"2022-11-16T20:50:13","name":"Fortran: error recovery after reference to bad CLASS variable [PR107681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-db3546b8-31ca-43d1-bb5f-962f38c399c4-1668631813744@3c-app-gmx-bap19/mbox/"},{"id":21273,"url":"https://patchwork.plctlab.org/api/1.2/patches/21273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116205950.1420057-1-jwakely@redhat.com/","msgid":"<20221116205950.1420057-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T20:59:50","name":"[committed] libstdc++: Disable std::format of _Float128 if std::to_chars is innaccurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116205950.1420057-1-jwakely@redhat.com/mbox/"},{"id":21274,"url":"https://patchwork.plctlab.org/api/1.2/patches/21274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210006.1420105-1-jwakely@redhat.com/","msgid":"<20221116210006.1420105-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:06","name":"[committed] libstdc++: Adjust for Clang compatibility [PR107712]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210006.1420105-1-jwakely@redhat.com/mbox/"},{"id":21275,"url":"https://patchwork.plctlab.org/api/1.2/patches/21275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210014.1420128-1-jwakely@redhat.com/","msgid":"<20221116210014.1420128-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:14","name":"[committed] libstdc++: Improve performance of chrono::utc_clock::now()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210014.1420128-1-jwakely@redhat.com/mbox/"},{"id":21277,"url":"https://patchwork.plctlab.org/api/1.2/patches/21277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210023.1420143-1-jwakely@redhat.com/","msgid":"<20221116210023.1420143-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:23","name":"[committed] libstdc++: Fix dumb typos in ALT128 support in [PR107720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210023.1420143-1-jwakely@redhat.com/mbox/"},{"id":21281,"url":"https://patchwork.plctlab.org/api/1.2/patches/21281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116211614.904834-1-kevinl@rivosinc.com/","msgid":"<20221116211614.904834-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-16T21:16:14","name":"[v3] RISC-V missing __builtin_lceil and __builtin_lfloor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116211614.904834-1-kevinl@rivosinc.com/mbox/"},{"id":21311,"url":"https://patchwork.plctlab.org/api/1.2/patches/21311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f69af5d4-c8de-4af1-94d3-d9f20963f1ef-1668635898373@3c-app-gmx-bap19/","msgid":"","list_archive_url":null,"date":"2022-11-16T21:58:18","name":"[committed] Fortran: ICE on procedure arguments with non-integer length [PR107707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f69af5d4-c8de-4af1-94d3-d9f20963f1ef-1668635898373@3c-app-gmx-bap19/mbox/"},{"id":21318,"url":"https://patchwork.plctlab.org/api/1.2/patches/21318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225115.2985194-1-dmalcolm@redhat.com/","msgid":"<20221116225115.2985194-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T22:51:15","name":"[committed] analyzer: log the stashing of named constants [PR107711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225115.2985194-1-dmalcolm@redhat.com/mbox/"},{"id":21319,"url":"https://patchwork.plctlab.org/api/1.2/patches/21319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225137.2985245-1-dmalcolm@redhat.com/","msgid":"<20221116225137.2985245-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T22:51:37","name":"[committed] analyzer: more test coverage for named constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225137.2985245-1-dmalcolm@redhat.com/mbox/"},{"id":21343,"url":"https://patchwork.plctlab.org/api/1.2/patches/21343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116235429.25268-1-hongyu.wang@intel.com/","msgid":"<20221116235429.25268-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-16T23:54:29","name":"rs6000: Adjust loop_unroll_adjust to match middle-end change [PR 107692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116235429.25268-1-hongyu.wang@intel.com/mbox/"},{"id":21349,"url":"https://patchwork.plctlab.org/api/1.2/patches/21349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117003508.1432092-1-jwakely@redhat.com/","msgid":"<20221117003508.1432092-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-17T00:35:08","name":"[committed] libstdc++: Ensure std::to_chars overloads all declared in [PR107720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117003508.1432092-1-jwakely@redhat.com/mbox/"},{"id":21378,"url":"https://patchwork.plctlab.org/api/1.2/patches/21378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc69d060-9336-a1fd-fd9b-6bc9a024eb57@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-17T01:51:38","name":"[committed] Fix multiple recent sh3/sh3eb regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc69d060-9336-a1fd-fd9b-6bc9a024eb57@gmail.com/mbox/"},{"id":21392,"url":"https://patchwork.plctlab.org/api/1.2/patches/21392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117030530.2995977-1-dmalcolm@redhat.com/","msgid":"<20221117030530.2995977-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-17T03:05:30","name":"c: fix ICE with -fanalyzer and -Wunused-macros [PR107711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117030530.2995977-1-dmalcolm@redhat.com/mbox/"},{"id":21422,"url":"https://patchwork.plctlab.org/api/1.2/patches/21422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16601-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-17T04:09:49","name":"middle-end: ensure that VEC_PERM operands get lowered to the same SSA_NAME. [PR107717]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16601-tamar@arm.com/mbox/"},{"id":21456,"url":"https://patchwork.plctlab.org/api/1.2/patches/21456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117061549.178481-1-guojiufu@linux.ibm.com/","msgid":"<20221117061549.178481-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-17T06:15:49","name":"[V2] Use subscalar mode to move struct block for parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117061549.178481-1-guojiufu@linux.ibm.com/mbox/"},{"id":21461,"url":"https://patchwork.plctlab.org/api/1.2/patches/21461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117063852.29869-1-hejinyang@loongson.cn/","msgid":"<20221117063852.29869-1-hejinyang@loongson.cn>","list_archive_url":null,"date":"2022-11-17T06:38:52","name":"[v2] LoongArch: Fix atomic_exchange expanding [PR107713]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117063852.29869-1-hejinyang@loongson.cn/mbox/"},{"id":21460,"url":"https://patchwork.plctlab.org/api/1.2/patches/21460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com/","msgid":"<438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com>","list_archive_url":null,"date":"2022-11-17T06:39:20","name":"[PATCHv2,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com/mbox/"},{"id":21516,"url":"https://patchwork.plctlab.org/api/1.2/patches/21516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3X7UH00hQtTnQSj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-17T09:13:52","name":"c++, v3: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3X7UH00hQtTnQSj@tucnak/mbox/"},{"id":21526,"url":"https://patchwork.plctlab.org/api/1.2/patches/21526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095355.1928564-1-chenyixuan@iscas.ac.cn/","msgid":"<20221117095355.1928564-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-17T09:53:55","name":"Ver.2: Add compile option \"-msmall-data-limit=0\" to avoid using .srodata section for riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095355.1928564-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":21536,"url":"https://patchwork.plctlab.org/api/1.2/patches/21536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095909.2896386-1-chenglulu@loongson.cn/","msgid":"<20221117095909.2896386-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-17T09:59:09","name":"[v4] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095909.2896386-1-chenglulu@loongson.cn/mbox/"},{"id":21549,"url":"https://patchwork.plctlab.org/api/1.2/patches/21549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117105236.2480943-1-manolis.tsamis@vrull.eu/","msgid":"<20221117105236.2480943-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-11-17T10:52:36","name":"[v3] Enable shrink wrapping for the RISC-V target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117105236.2480943-1-manolis.tsamis@vrull.eu/mbox/"},{"id":21666,"url":"https://patchwork.plctlab.org/api/1.2/patches/21666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117132021.1143935-1-torbjorn.svensson@foss.st.com/","msgid":"<20221117132021.1143935-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-17T13:20:22","name":"[v3] c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117132021.1143935-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":21845,"url":"https://patchwork.plctlab.org/api/1.2/patches/21845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-2-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:35","name":"[01/35] arm: improve vcreateq* tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-2-andrea.corallo@arm.com/mbox/"},{"id":21802,"url":"https://patchwork.plctlab.org/api/1.2/patches/21802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-3-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-3-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:36","name":"[02/35] arm: fix '\''vmsr'\'' spacing and register capitalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-3-andrea.corallo@arm.com/mbox/"},{"id":21803,"url":"https://patchwork.plctlab.org/api/1.2/patches/21803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-4-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:37","name":"[03/35] arm: improve tests and fix vddupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-4-andrea.corallo@arm.com/mbox/"},{"id":21804,"url":"https://patchwork.plctlab.org/api/1.2/patches/21804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-5-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:38","name":"[04/35] arm: improve tests and fix vdwdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-5-andrea.corallo@arm.com/mbox/"},{"id":21806,"url":"https://patchwork.plctlab.org/api/1.2/patches/21806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-6-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:39","name":"[05/35] arm: improve vidupq* tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-6-andrea.corallo@arm.com/mbox/"},{"id":21807,"url":"https://patchwork.plctlab.org/api/1.2/patches/21807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-7-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-7-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:40","name":"[06/35] arm: improve tests and fix vdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-7-andrea.corallo@arm.com/mbox/"},{"id":21837,"url":"https://patchwork.plctlab.org/api/1.2/patches/21837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-8-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:41","name":"[07/35] arm: improve tests and fix vcmp*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-8-andrea.corallo@arm.com/mbox/"},{"id":21824,"url":"https://patchwork.plctlab.org/api/1.2/patches/21824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-9-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:42","name":"[08/35] arm: improve tests for vmin*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-9-andrea.corallo@arm.com/mbox/"},{"id":21840,"url":"https://patchwork.plctlab.org/api/1.2/patches/21840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-10-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:43","name":"[09/35] arm: improve tests for vmax*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-10-andrea.corallo@arm.com/mbox/"},{"id":21805,"url":"https://patchwork.plctlab.org/api/1.2/patches/21805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-11-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-11-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:44","name":"[10/35] arm: improve tests for vabavq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-11-andrea.corallo@arm.com/mbox/"},{"id":21813,"url":"https://patchwork.plctlab.org/api/1.2/patches/21813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-12-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-12-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:45","name":"[11/35] arm: improve tests for vabdq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-12-andrea.corallo@arm.com/mbox/"},{"id":21811,"url":"https://patchwork.plctlab.org/api/1.2/patches/21811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-13-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-13-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:46","name":"[12/35] arm: improve tests and fix vabsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-13-andrea.corallo@arm.com/mbox/"},{"id":21849,"url":"https://patchwork.plctlab.org/api/1.2/patches/21849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-14-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-14-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:47","name":"[13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-14-andrea.corallo@arm.com/mbox/"},{"id":21842,"url":"https://patchwork.plctlab.org/api/1.2/patches/21842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-15-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-15-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:48","name":"[14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-15-andrea.corallo@arm.com/mbox/"},{"id":21846,"url":"https://patchwork.plctlab.org/api/1.2/patches/21846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-16-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-16-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:49","name":"[15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-16-andrea.corallo@arm.com/mbox/"},{"id":21814,"url":"https://patchwork.plctlab.org/api/1.2/patches/21814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-17-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-17-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:50","name":"[16/35] arm: Add integer vector overloading of vsubq_x instrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-17-andrea.corallo@arm.com/mbox/"},{"id":21841,"url":"https://patchwork.plctlab.org/api/1.2/patches/21841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-18-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-18-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:51","name":"[17/35] arm: improve tests and fix vadd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-18-andrea.corallo@arm.com/mbox/"},{"id":21827,"url":"https://patchwork.plctlab.org/api/1.2/patches/21827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-19-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-19-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:52","name":"[18/35] arm: improve tests for vmulq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-19-andrea.corallo@arm.com/mbox/"},{"id":21821,"url":"https://patchwork.plctlab.org/api/1.2/patches/21821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-20-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-20-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:53","name":"[19/35] arm: improve tests and fix vsubq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-20-andrea.corallo@arm.com/mbox/"},{"id":21812,"url":"https://patchwork.plctlab.org/api/1.2/patches/21812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-21-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-21-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:54","name":"[20/35] arm: improve tests for vfmasq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-21-andrea.corallo@arm.com/mbox/"},{"id":21834,"url":"https://patchwork.plctlab.org/api/1.2/patches/21834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-22-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-22-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:55","name":"[21/35] arm: improve tests for vhaddq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-22-andrea.corallo@arm.com/mbox/"},{"id":21823,"url":"https://patchwork.plctlab.org/api/1.2/patches/21823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-23-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-23-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:56","name":"[22/35] arm: improve tests for vhsubq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-23-andrea.corallo@arm.com/mbox/"},{"id":21820,"url":"https://patchwork.plctlab.org/api/1.2/patches/21820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-24-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-24-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:57","name":"[23/35] arm: improve tests for viwdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-24-andrea.corallo@arm.com/mbox/"},{"id":21819,"url":"https://patchwork.plctlab.org/api/1.2/patches/21819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-25-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-25-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:58","name":"[24/35] arm: improve tests for vmladavaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-25-andrea.corallo@arm.com/mbox/"},{"id":21825,"url":"https://patchwork.plctlab.org/api/1.2/patches/21825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-26-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-26-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:59","name":"[25/35] arm: improve tests and fix vmlaldavaxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-26-andrea.corallo@arm.com/mbox/"},{"id":21829,"url":"https://patchwork.plctlab.org/api/1.2/patches/21829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-27-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-27-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:00","name":"[26/35] arm: improve tests for vmlasq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-27-andrea.corallo@arm.com/mbox/"},{"id":21816,"url":"https://patchwork.plctlab.org/api/1.2/patches/21816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-28-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-28-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:01","name":"[27/35] arm: improve tests for vqaddq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-28-andrea.corallo@arm.com/mbox/"},{"id":21826,"url":"https://patchwork.plctlab.org/api/1.2/patches/21826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-29-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-29-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:02","name":"[28/35] arm: improve tests for vqdmlahq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-29-andrea.corallo@arm.com/mbox/"},{"id":21836,"url":"https://patchwork.plctlab.org/api/1.2/patches/21836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-30-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-30-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:03","name":"[29/35] arm: improve tests for vqdmul*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-30-andrea.corallo@arm.com/mbox/"},{"id":21822,"url":"https://patchwork.plctlab.org/api/1.2/patches/21822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-31-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-31-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:04","name":"[30/35] arm: improve tests for vqrdmlahq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-31-andrea.corallo@arm.com/mbox/"},{"id":21810,"url":"https://patchwork.plctlab.org/api/1.2/patches/21810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-32-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-32-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:05","name":"[31/35] arm: improve tests for vqrdmlashq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-32-andrea.corallo@arm.com/mbox/"},{"id":21835,"url":"https://patchwork.plctlab.org/api/1.2/patches/21835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-33-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-33-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:06","name":"[32/35] arm: improve tests for vqsubq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-33-andrea.corallo@arm.com/mbox/"},{"id":21817,"url":"https://patchwork.plctlab.org/api/1.2/patches/21817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-34-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-34-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:07","name":"[33/35] arm: improve tests and fix vrmlaldavhaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-34-andrea.corallo@arm.com/mbox/"},{"id":21828,"url":"https://patchwork.plctlab.org/api/1.2/patches/21828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-35-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-35-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:08","name":"[34/35] arm: improve tests for vrshlq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-35-andrea.corallo@arm.com/mbox/"},{"id":21808,"url":"https://patchwork.plctlab.org/api/1.2/patches/21808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-36-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-36-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:09","name":"[35/35] arm: improve tests for vsetq_lane*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-36-andrea.corallo@arm.com/mbox/"},{"id":21859,"url":"https://patchwork.plctlab.org/api/1.2/patches/21859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117174449.825329-1-aldyh@redhat.com/","msgid":"<20221117174449.825329-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-17T17:44:49","name":"[COMMITTED,PR,tree-optimization/107732,range-ops] Handle attempt to abs() negatives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117174449.825329-1-aldyh@redhat.com/mbox/"},{"id":21860,"url":"https://patchwork.plctlab.org/api/1.2/patches/21860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668707958-10346-1-git-send-email-apinski@marvell.com/","msgid":"<1668707958-10346-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-17T17:59:18","name":"[COMMITTED] Fix PR 107734: valgrind errors with sbitmap in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668707958-10346-1-git-send-email-apinski@marvell.com/mbox/"},{"id":21870,"url":"https://patchwork.plctlab.org/api/1.2/patches/21870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117183810.33353-1-polacek@redhat.com/","msgid":"<20221117183810.33353-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-17T18:38:10","name":"c++: constinit on pointer to function [PR104066]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117183810.33353-1-polacek@redhat.com/mbox/"},{"id":21894,"url":"https://patchwork.plctlab.org/api/1.2/patches/21894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3acqbULfy3PULmc@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-17T20:42:17","name":"c++, v4: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3acqbULfy3PULmc@tucnak/mbox/"},{"id":21895,"url":"https://patchwork.plctlab.org/api/1.2/patches/21895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9afc12d0-717f-45c1-81cf-6d4fc8d6249e-1668718081298@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2022-11-17T20:48:01","name":"Fortran: reject NULL actual argument without explicit interface [PR107576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9afc12d0-717f-45c1-81cf-6d4fc8d6249e-1668718081298@3c-app-gmx-bap50/mbox/"},{"id":21903,"url":"https://patchwork.plctlab.org/api/1.2/patches/21903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117210259.154569-1-aldot@gcc.gnu.org/","msgid":"<20221117210259.154569-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-17T21:02:59","name":"libcpp: Add missing config for --enable-valgrind-annotations [PR107691]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117210259.154569-1-aldot@gcc.gnu.org/mbox/"},{"id":22039,"url":"https://patchwork.plctlab.org/api/1.2/patches/22039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118014522.1989180-1-hongtao.liu@intel.com/","msgid":"<20221118014522.1989180-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-18T01:45:22","name":"[x86] define builtins for \"shared\" avxneconvert-avx512bf16vl builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118014522.1989180-1-hongtao.liu@intel.com/mbox/"},{"id":22062,"url":"https://patchwork.plctlab.org/api/1.2/patches/22062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118021223.348112-1-christoph.muellner@vrull.eu/","msgid":"<20221118021223.348112-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-18T02:12:23","name":"RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118021223.348112-1-christoph.muellner@vrull.eu/mbox/"},{"id":22085,"url":"https://patchwork.plctlab.org/api/1.2/patches/22085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-1-git-send-email-apinski@marvell.com/","msgid":"<1668741911-1727-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T03:25:10","name":"[1/2] Fix PRs 106764, 106765, and 107307, all ICE after invalid re-declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-1-git-send-email-apinski@marvell.com/mbox/"},{"id":22084,"url":"https://patchwork.plctlab.org/api/1.2/patches/22084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-2-git-send-email-apinski@marvell.com/","msgid":"<1668741911-1727-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T03:25:11","name":"[2/2] Fix PR middle-end/107705: ICE after reclaration error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-2-git-send-email-apinski@marvell.com/mbox/"},{"id":22100,"url":"https://patchwork.plctlab.org/api/1.2/patches/22100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118042706.10725-1-palmer@rivosinc.com/","msgid":"<20221118042706.10725-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-18T04:27:06","name":"RISC-V: Note that __builtin_riscv_pause() implies Xgnuzihintpausestate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118042706.10725-1-palmer@rivosinc.com/mbox/"},{"id":22107,"url":"https://patchwork.plctlab.org/api/1.2/patches/22107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118054904.240603-1-chenyixuan@iscas.ac.cn/","msgid":"<20221118054904.240603-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-18T05:49:04","name":"optimize the testcase for architectures that use \".srodata\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118054904.240603-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":22162,"url":"https://patchwork.plctlab.org/api/1.2/patches/22162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118073700.151791345B@imap2.suse-dmz.suse.de/","msgid":"<20221118073700.151791345B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-18T07:36:59","name":"tree-optimization/107647 - avoid FMA from SLP with -ffp-contract=off","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118073700.151791345B@imap2.suse-dmz.suse.de/mbox/"},{"id":22213,"url":"https://patchwork.plctlab.org/api/1.2/patches/22213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3dL8nv/qF+qb1j3@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-18T09:10:10","name":"c++, v5: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3dL8nv/qF+qb1j3@tucnak/mbox/"},{"id":22269,"url":"https://patchwork.plctlab.org/api/1.2/patches/22269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-2-philipp.tomsich@vrull.eu/","msgid":"<20221118111001.1488517-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-18T11:10:00","name":"[v2,1/2] RISC-V: Use bseti/bclri/binvi to extend reach of ori/andi/xori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-2-philipp.tomsich@vrull.eu/mbox/"},{"id":22270,"url":"https://patchwork.plctlab.org/api/1.2/patches/22270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-3-philipp.tomsich@vrull.eu/","msgid":"<20221118111001.1488517-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-18T11:10:01","name":"[v2,2/2] RISC-V: Handle \"(a & twobits) == singlebit\" in branches using Zbs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-3-philipp.tomsich@vrull.eu/mbox/"},{"id":22402,"url":"https://patchwork.plctlab.org/api/1.2/patches/22402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com/","msgid":"<1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com>","list_archive_url":null,"date":"2022-11-18T17:20:29","name":"gcn: Add __builtin_gcn_{get_stack_limit,first_call_this_thread_p}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com/mbox/"},{"id":22412,"url":"https://patchwork.plctlab.org/api/1.2/patches/22412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668794731-9349-1-git-send-email-apinski@marvell.com/","msgid":"<1668794731-9349-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T18:05:31","name":"constexprify some tree variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668794731-9349-1-git-send-email-apinski@marvell.com/mbox/"},{"id":22440,"url":"https://patchwork.plctlab.org/api/1.2/patches/22440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcoayyz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-18T18:39:48","name":"gomp: Various fixes for SVE types [PR101018]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcoayyz.fsf@arm.com/mbox/"},{"id":22513,"url":"https://patchwork.plctlab.org/api/1.2/patches/22513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118214339.3620949-1-ppalka@redhat.com/","msgid":"<20221118214339.3620949-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-18T21:43:39","name":"c++: cache the normal form of a concept-id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118214339.3620949-1-ppalka@redhat.com/mbox/"},{"id":22517,"url":"https://patchwork.plctlab.org/api/1.2/patches/22517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118215946.3621557-1-ppalka@redhat.com/","msgid":"<20221118215946.3621557-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-18T21:59:46","name":"c++: remove coerce_innermost_template_parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118215946.3621557-1-ppalka@redhat.com/mbox/"},{"id":22518,"url":"https://patchwork.plctlab.org/api/1.2/patches/22518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118220326.3093911-1-dmalcolm@redhat.com/","msgid":"<20221118220326.3093911-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-18T22:03:26","name":"[committed] analyzer: move more impl_* to known_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118220326.3093911-1-dmalcolm@redhat.com/mbox/"},{"id":22664,"url":"https://patchwork.plctlab.org/api/1.2/patches/22664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-11-18T23:25:16","name":"nvptx: In '\''STARTFILE_SPEC'\'', fix '\''crt0.o'\'' for '\''-mmainkernel'\'' (was: [MentorEmbedded/nvptx-tools] Match standard '\''ld'\'' \"search\" behavior (PR #38))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":22814,"url":"https://patchwork.plctlab.org/api/1.2/patches/22814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3gazoJNHo0bHBR9@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-18T23:52:46","name":"[v2] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3gazoJNHo0bHBR9@redhat.com/mbox/"},{"id":23086,"url":"https://patchwork.plctlab.org/api/1.2/patches/23086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119004136.3101136-1-dmalcolm@redhat.com/","msgid":"<20221119004136.3101136-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-19T00:41:36","name":"[committed] analyzer: fix feasibility false +ve on jumps through function ptrs [PR107582]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119004136.3101136-1-dmalcolm@redhat.com/mbox/"},{"id":23220,"url":"https://patchwork.plctlab.org/api/1.2/patches/23220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119062532.75190-1-hongyu.wang@intel.com/","msgid":"<20221119062532.75190-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-19T06:25:32","name":"i386: Only enable small loop unrolling in backend [PR 107602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119062532.75190-1-hongyu.wang@intel.com/mbox/"},{"id":23236,"url":"https://patchwork.plctlab.org/api/1.2/patches/23236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iV4SQrZRB2TJxD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T08:37:53","name":"i386: Uglify some local identifiers in *intrin.h [PR107748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iV4SQrZRB2TJxD@tucnak/mbox/"},{"id":23237,"url":"https://patchwork.plctlab.org/api/1.2/patches/23237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iZZpCSBrzTZVP4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T08:52:54","name":"i386: Outline fast BF -> SF conversion and fix up sNaN handling in it [PR107628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iZZpCSBrzTZVP4@tucnak/mbox/"},{"id":23240,"url":"https://patchwork.plctlab.org/api/1.2/patches/23240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iexgMbUBm5mi7A@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T09:15:50","name":"reg-stack: Fix a -fcompare-debug bug in reg-stack [PR107183]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iexgMbUBm5mi7A@tucnak/mbox/"},{"id":23268,"url":"https://patchwork.plctlab.org/api/1.2/patches/23268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9630c4c-1df6-4dd5-f7e1-3d63c2e1f34d@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-19T13:02:44","name":"Fix in _GLIBCXX_INLINE_VERSION mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9630c4c-1df6-4dd5-f7e1-3d63c2e1f34d@gmail.com/mbox/"},{"id":23270,"url":"https://patchwork.plctlab.org/api/1.2/patches/23270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150817.1673878-1-jwakely@redhat.com/","msgid":"<20221119150817.1673878-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:17","name":"[committed] libstdc++: Fix one more malformed requires-clause [PR107649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150817.1673878-1-jwakely@redhat.com/mbox/"},{"id":23271,"url":"https://patchwork.plctlab.org/api/1.2/patches/23271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150840.1673902-1-jwakely@redhat.com/","msgid":"<20221119150840.1673902-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:40","name":"[committed] libstdc++: Fix Doxygen warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150840.1673902-1-jwakely@redhat.com/mbox/"},{"id":23272,"url":"https://patchwork.plctlab.org/api/1.2/patches/23272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150847.1673947-1-jwakely@redhat.com/","msgid":"<20221119150847.1673947-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:47","name":"[committed] libstdc++: Fix -Wsign-compare warnings in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150847.1673947-1-jwakely@redhat.com/mbox/"},{"id":23302,"url":"https://patchwork.plctlab.org/api/1.2/patches/23302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119174453.1688270-1-jwakely@redhat.com/","msgid":"<20221119174453.1688270-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T17:44:53","name":"[committed] libstdc++: Add always_inline to trivial range access functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119174453.1688270-1-jwakely@redhat.com/mbox/"},{"id":23367,"url":"https://patchwork.plctlab.org/api/1.2/patches/23367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668907504-29652-1-git-send-email-apinski@marvell.com/","msgid":"<1668907504-29652-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-20T01:25:04","name":"Fix PR 106560: Another ICE after conflicting types of redeclaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668907504-29652-1-git-send-email-apinski@marvell.com/mbox/"},{"id":23369,"url":"https://patchwork.plctlab.org/api/1.2/patches/23369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com/","msgid":"<3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com>","list_archive_url":null,"date":"2022-11-20T01:50:52","name":"[committed] Fix test to not depend on DECL_UIDs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com/mbox/"},{"id":23373,"url":"https://patchwork.plctlab.org/api/1.2/patches/23373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com/","msgid":"<66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com>","list_archive_url":null,"date":"2022-11-20T02:26:52","name":"[committed,PR,other/104044] Remove extraneous semicolons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com/mbox/"},{"id":23401,"url":"https://patchwork.plctlab.org/api/1.2/patches/23401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221120100257.281467-1-dimitar@dinux.eu/","msgid":"<20221120100257.281467-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-11-20T10:02:57","name":"testsuite: Add filter for target socket support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221120100257.281467-1-dimitar@dinux.eu/mbox/"},{"id":23438,"url":"https://patchwork.plctlab.org/api/1.2/patches/23438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff23edb1b10b4b6d099bb8a436910dd282d508fe.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2022-11-20T19:03:12","name":"libgccjit: Fix float vector comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff23edb1b10b4b6d099bb8a436910dd282d508fe.camel@zoho.com/mbox/"},{"id":23476,"url":"https://patchwork.plctlab.org/api/1.2/patches/23476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaUaDNB_rGUUPBOWQHZVCFN8uoiCVEWcoAX3q9MvyyPWw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-20T22:50:06","name":"[Arm] Add neon_fcmla and neon_fcadd as neon_type instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaUaDNB_rGUUPBOWQHZVCFN8uoiCVEWcoAX3q9MvyyPWw@mail.gmail.com/mbox/"},{"id":23510,"url":"https://patchwork.plctlab.org/api/1.2/patches/23510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121021150.3348406-1-hongtao.liu@intel.com/","msgid":"<20221121021150.3348406-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-21T02:11:50","name":"[x86] Some tidy up for RA related hooks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121021150.3348406-1-hongtao.liu@intel.com/mbox/"},{"id":23548,"url":"https://patchwork.plctlab.org/api/1.2/patches/23548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-1-sebastian.huber@embedded-brains.de/","msgid":"<20221121072526.103446-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-11-21T07:25:25","name":"[v2,1/2] Allow subtarget customization of CC1_SPEC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":23550,"url":"https://patchwork.plctlab.org/api/1.2/patches/23550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-2-sebastian.huber@embedded-brains.de/","msgid":"<20221121072526.103446-2-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-11-21T07:25:26","name":"[v2,2/2] RTEMS: Use local-exec TLS model by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-2-sebastian.huber@embedded-brains.de/mbox/"},{"id":23577,"url":"https://patchwork.plctlab.org/api/1.2/patches/23577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz/","msgid":"<0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz>","list_archive_url":null,"date":"2022-11-21T08:04:31","name":"[(pushed)] build: re-configure 2 files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz/mbox/"},{"id":23580,"url":"https://patchwork.plctlab.org/api/1.2/patches/23580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz/","msgid":"<52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz>","list_archive_url":null,"date":"2022-11-21T08:19:24","name":"changelog: Fix extra space after tab. fix extra spaces after tab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz/mbox/"},{"id":23630,"url":"https://patchwork.plctlab.org/api/1.2/patches/23630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJOtW+5=-WA_i7cXxrWSOVKDc_PQbtNOoaLmEQJrk3oU=uLUdw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T09:57:15","name":"[PING,sanitizer/106558] asan: fix unsafe optimization of Asan checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJOtW+5=-WA_i7cXxrWSOVKDc_PQbtNOoaLmEQJrk3oU=uLUdw@mail.gmail.com/mbox/"},{"id":23634,"url":"https://patchwork.plctlab.org/api/1.2/patches/23634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101329.258908-1-poulhies@adacore.com/","msgid":"<20221121101329.258908-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:29","name":"[COMMITTED] ada: Tweak error messages on misplaced with keywords","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101329.258908-1-poulhies@adacore.com/mbox/"},{"id":23635,"url":"https://patchwork.plctlab.org/api/1.2/patches/23635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101338.259014-1-poulhies@adacore.com/","msgid":"<20221121101338.259014-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:38","name":"[COMMITTED] ada: Fix gnatmake'\''s parsing of adc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101338.259014-1-poulhies@adacore.com/mbox/"},{"id":23640,"url":"https://patchwork.plctlab.org/api/1.2/patches/23640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101346.259079-1-poulhies@adacore.com/","msgid":"<20221121101346.259079-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:46","name":"[COMMITTED] ada: Reject nonconfirming Size attribute value for aliased object","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101346.259079-1-poulhies@adacore.com/mbox/"},{"id":23641,"url":"https://patchwork.plctlab.org/api/1.2/patches/23641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101356.259145-1-poulhies@adacore.com/","msgid":"<20221121101356.259145-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:56","name":"[COMMITTED] ada: Improve documentation for -gnatw.h warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101356.259145-1-poulhies@adacore.com/mbox/"},{"id":23648,"url":"https://patchwork.plctlab.org/api/1.2/patches/23648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101405.259209-1-poulhies@adacore.com/","msgid":"<20221121101405.259209-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:05","name":"[COMMITTED] ada: Move warnings switches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101405.259209-1-poulhies@adacore.com/mbox/"},{"id":23645,"url":"https://patchwork.plctlab.org/api/1.2/patches/23645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101410.259273-1-poulhies@adacore.com/","msgid":"<20221121101410.259273-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:10","name":"[COMMITTED] ada: Disable subprogram call validation in CodePeer mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101410.259273-1-poulhies@adacore.com/mbox/"},{"id":23639,"url":"https://patchwork.plctlab.org/api/1.2/patches/23639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101418.259338-1-poulhies@adacore.com/","msgid":"<20221121101418.259338-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:18","name":"[COMMITTED] ada: Ada 2022 Image attribute bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101418.259338-1-poulhies@adacore.com/mbox/"},{"id":23647,"url":"https://patchwork.plctlab.org/api/1.2/patches/23647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101426.259405-1-poulhies@adacore.com/","msgid":"<20221121101426.259405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:26","name":"[COMMITTED] ada: Small cleanup in Expand_N_Object_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101426.259405-1-poulhies@adacore.com/mbox/"},{"id":23650,"url":"https://patchwork.plctlab.org/api/1.2/patches/23650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101431.259470-1-poulhies@adacore.com/","msgid":"<20221121101431.259470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:31","name":"[COMMITTED] ada: Internal compiler error for Sequential Partition_Elaboration_Policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101431.259470-1-poulhies@adacore.com/mbox/"},{"id":23644,"url":"https://patchwork.plctlab.org/api/1.2/patches/23644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101437.259534-1-poulhies@adacore.com/","msgid":"<20221121101437.259534-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:37","name":"[COMMITTED] ada: Minor tweak in assertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101437.259534-1-poulhies@adacore.com/mbox/"},{"id":23651,"url":"https://patchwork.plctlab.org/api/1.2/patches/23651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101444.259598-1-poulhies@adacore.com/","msgid":"<20221121101444.259598-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:44","name":"[COMMITTED] ada: Order pragmas alphabetically in reference manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101444.259598-1-poulhies@adacore.com/mbox/"},{"id":23643,"url":"https://patchwork.plctlab.org/api/1.2/patches/23643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101449.259662-1-poulhies@adacore.com/","msgid":"<20221121101449.259662-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:49","name":"[COMMITTED] ada: Do not share Packed Array Type if sizes of types differ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101449.259662-1-poulhies@adacore.com/mbox/"},{"id":23646,"url":"https://patchwork.plctlab.org/api/1.2/patches/23646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101453.259725-1-poulhies@adacore.com/","msgid":"<20221121101453.259725-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:53","name":"[COMMITTED] ada: Adjust recent change for returns involving function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101453.259725-1-poulhies@adacore.com/mbox/"},{"id":23652,"url":"https://patchwork.plctlab.org/api/1.2/patches/23652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121102909.1603846-1-ibuclaw@gdcproject.org/","msgid":"<20221121102909.1603846-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-21T10:29:09","name":"maintainer-scripts: Add gdc to update_web_docs_git","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121102909.1603846-1-ibuclaw@gdcproject.org/mbox/"},{"id":23693,"url":"https://patchwork.plctlab.org/api/1.2/patches/23693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115720.2510778-1-philipp.tomsich@vrull.eu/","msgid":"<20221121115720.2510778-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-21T11:57:20","name":"[PR107786,COMMITTED] RISC-V: Fix ICE in branch_shiftedarith_equals_zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115720.2510778-1-philipp.tomsich@vrull.eu/mbox/"},{"id":23698,"url":"https://patchwork.plctlab.org/api/1.2/patches/23698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115915.374247-1-christophe.lyon@arm.com/","msgid":"<20221121115915.374247-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-21T11:59:15","name":"genmultilib: Fix sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115915.374247-1-christophe.lyon@arm.com/mbox/"},{"id":23748,"url":"https://patchwork.plctlab.org/api/1.2/patches/23748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com/","msgid":"<23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com>","list_archive_url":null,"date":"2022-11-21T13:40:59","name":"libgomp/gcn: fix/improve struct output (was: [Patch] libgomp/gcn: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com/mbox/"},{"id":23941,"url":"https://patchwork.plctlab.org/api/1.2/patches/23941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMWq0RZKyuQQ4uQ8eT2abg=N0MQEpoQ1TvSiZUz+kvEb-A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T16:35:18","name":"Remove legacy VRP (maybe?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMWq0RZKyuQQ4uQ8eT2abg=N0MQEpoQ1TvSiZUz+kvEb-A@mail.gmail.com/mbox/"},{"id":23991,"url":"https://patchwork.plctlab.org/api/1.2/patches/23991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185115.2021818-1-jwakely@redhat.com/","msgid":"<20221121185115.2021818-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:15","name":"[committed] libstdc++: Improve Doxygen comments in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185115.2021818-1-jwakely@redhat.com/mbox/"},{"id":23993,"url":"https://patchwork.plctlab.org/api/1.2/patches/23993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185123.2021836-1-jwakely@redhat.com/","msgid":"<20221121185123.2021836-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:23","name":"[committed] libstdc++: Check static assertions earlier in chrono::duration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185123.2021836-1-jwakely@redhat.com/mbox/"},{"id":23992,"url":"https://patchwork.plctlab.org/api/1.2/patches/23992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185130.2021855-1-jwakely@redhat.com/","msgid":"<20221121185130.2021855-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:30","name":"[committed] libstdc++: Reduce size of std::bind_front(F) result","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185130.2021855-1-jwakely@redhat.com/mbox/"},{"id":24011,"url":"https://patchwork.plctlab.org/api/1.2/patches/24011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121204341.2024118-1-jwakely@redhat.com/","msgid":"<20221121204341.2024118-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T20:43:41","name":"libstdc++: Make chrono::hh_mm_ss more compact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121204341.2024118-1-jwakely@redhat.com/mbox/"},{"id":24016,"url":"https://patchwork.plctlab.org/api/1.2/patches/24016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E6C2EE445568BFA6BA4910A9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T21:26:49","name":"Fix count comparison in ipa-cp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E6C2EE445568BFA6BA4910A9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":24039,"url":"https://patchwork.plctlab.org/api/1.2/patches/24039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F5D5271CA9CEEE3C4EF9910A9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T21:57:29","name":"Fix autoprofiledbootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F5D5271CA9CEEE3C4EF9910A9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":24044,"url":"https://patchwork.plctlab.org/api/1.2/patches/24044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wC9ytEbTC0OidM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-21T23:00:07","name":"c++: Fix up -fcontract* options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wC9ytEbTC0OidM@tucnak/mbox/"},{"id":24045,"url":"https://patchwork.plctlab.org/api/1.2/patches/24045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wDPIFQikJu2Opz@wildebeest.org/","msgid":"","list_archive_url":null,"date":"2022-11-21T23:01:16","name":"Activate gcc builder problem emails (Was: [PATCH v2] genmultilib: Add sanity check)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wDPIFQikJu2Opz@wildebeest.org/mbox/"},{"id":24047,"url":"https://patchwork.plctlab.org/api/1.2/patches/24047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121233147.523576-1-jason@redhat.com/","msgid":"<20221121233147.523576-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-21T23:31:47","name":"[RFA(configure)] c++: provide strchrnul on targets without it [PR107781]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121233147.523576-1-jason@redhat.com/mbox/"},{"id":24058,"url":"https://patchwork.plctlab.org/api/1.2/patches/24058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001410.3254534-1-dmalcolm@redhat.com/","msgid":"<20221122001410.3254534-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:10","name":"[committed] analyzer, testsuite: add more examples taken from CWE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001410.3254534-1-dmalcolm@redhat.com/mbox/"},{"id":24059,"url":"https://patchwork.plctlab.org/api/1.2/patches/24059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001421.3254582-1-dmalcolm@redhat.com/","msgid":"<20221122001421.3254582-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:21","name":"[committed] analyzer: fix ICE on writes to errno [PR107777]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001421.3254582-1-dmalcolm@redhat.com/mbox/"},{"id":24061,"url":"https://patchwork.plctlab.org/api/1.2/patches/24061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001446.3254636-1-dmalcolm@redhat.com/","msgid":"<20221122001446.3254636-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:46","name":"[committed] analyzer: fix ICE on '\''bind'\'' with non-pointer arg [P107783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001446.3254636-1-dmalcolm@redhat.com/mbox/"},{"id":24060,"url":"https://patchwork.plctlab.org/api/1.2/patches/24060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001500.3254683-1-dmalcolm@redhat.com/","msgid":"<20221122001500.3254683-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:15:00","name":"[committed] analyzer: fix ICE on '\''bind'\'' that returns a struct [PR107788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001500.3254683-1-dmalcolm@redhat.com/mbox/"},{"id":24100,"url":"https://patchwork.plctlab.org/api/1.2/patches/24100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122012609.550872-1-jason@redhat.com/","msgid":"<20221122012609.550872-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-22T01:26:09","name":"[pushed] c++: contracts fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122012609.550872-1-jason@redhat.com/mbox/"},{"id":24170,"url":"https://patchwork.plctlab.org/api/1.2/patches/24170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122070540.F235B13AA1@imap2.suse-dmz.suse.de/","msgid":"<20221122070540.F235B13AA1@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-22T07:05:40","name":"tree-optimization/107766 - ICE with recent -ffp-contract=off fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122070540.F235B13AA1@imap2.suse-dmz.suse.de/mbox/"},{"id":24179,"url":"https://patchwork.plctlab.org/api/1.2/patches/24179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de/","msgid":"<80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de>","list_archive_url":null,"date":"2022-11-22T08:00:51","name":"speed up end_fde_sort using radix sort","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de/mbox/"},{"id":24199,"url":"https://patchwork.plctlab.org/api/1.2/patches/24199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084235.1216435-1-chenyixuan@iscas.ac.cn/","msgid":"<20221122084235.1216435-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-22T08:42:35","name":"Riscv don'\''t support \"-fprefetch-loop-arrays\", skip.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084235.1216435-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":24200,"url":"https://patchwork.plctlab.org/api/1.2/patches/24200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084850.B6CA313B01@imap2.suse-dmz.suse.de/","msgid":"<20221122084850.B6CA313B01@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-22T08:48:50","name":"tree-optimization/107672 - avoid vector mode type_for_mode call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084850.B6CA313B01@imap2.suse-dmz.suse.de/mbox/"},{"id":24216,"url":"https://patchwork.plctlab.org/api/1.2/patches/24216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122090114.38090-1-christophe.lyon@arm.com/","msgid":"<20221122090114.38090-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-22T09:01:14","name":"aarch64: Fix test_dfp_17.c for big-endian [PR 107604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122090114.38090-1-christophe.lyon@arm.com/mbox/"},{"id":24220,"url":"https://patchwork.plctlab.org/api/1.2/patches/24220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3yXEaqKdvWxf9v0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-22T09:32:01","name":"c-family: Fix up -Wsign-compare BIT_NOT_EXPR handling [PR107465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3yXEaqKdvWxf9v0@tucnak/mbox/"},{"id":24223,"url":"https://patchwork.plctlab.org/api/1.2/patches/24223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f680ae3e-7819-22e0-ca83-72c98135e034@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-22T09:41:28","name":"d: respect --enable-link-mutex configure option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f680ae3e-7819-22e0-ca83-72c98135e034@suse.cz/mbox/"},{"id":24231,"url":"https://patchwork.plctlab.org/api/1.2/patches/24231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122094842.2629693-1-chenyixuan@iscas.ac.cn/","msgid":"<20221122094842.2629693-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-22T09:48:42","name":"Ver2: Riscv don'\''t support \"-fprefetch-loop-arrays\" option, add \"-w\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122094842.2629693-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":24260,"url":"https://patchwork.plctlab.org/api/1.2/patches/24260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122104019.2092679-1-jwakely@redhat.com/","msgid":"<20221122104019.2092679-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T10:40:19","name":"[committed] libstdc++: Fix pool resource build errors for H8 [PR107801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122104019.2092679-1-jwakely@redhat.com/mbox/"},{"id":24268,"url":"https://patchwork.plctlab.org/api/1.2/patches/24268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4442231.LvFx2qVVIh@fomalhaut/","msgid":"<4442231.LvFx2qVVIh@fomalhaut>","list_archive_url":null,"date":"2022-11-22T11:05:16","name":"Fix wrong array type conversion with different storage order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4442231.LvFx2qVVIh@fomalhaut/mbox/"},{"id":24267,"url":"https://patchwork.plctlab.org/api/1.2/patches/24267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122110602.94F003857C71@sourceware.org/","msgid":"<20221122110602.94F003857C71@sourceware.org>","list_archive_url":null,"date":"2022-11-22T11:05:16","name":"tree-optimization/107803 - abnormal cleanup from the SSA propagator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122110602.94F003857C71@sourceware.org/mbox/"},{"id":24335,"url":"https://patchwork.plctlab.org/api/1.2/patches/24335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9fqixe.fsf@oldenburg.str.redhat.com/","msgid":"<87cz9fqixe.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-11-22T12:21:01","name":"c: Propagate erroneous types to declaration specifiers [PR107805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9fqixe.fsf@oldenburg.str.redhat.com/mbox/"},{"id":24338,"url":"https://patchwork.plctlab.org/api/1.2/patches/24338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123620.336156-1-poulhies@adacore.com/","msgid":"<20221122123620.336156-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:20","name":"[COMMITTED] ada: Fix recent assertion failure on GPR2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123620.336156-1-poulhies@adacore.com/mbox/"},{"id":24339,"url":"https://patchwork.plctlab.org/api/1.2/patches/24339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123639.336264-1-poulhies@adacore.com/","msgid":"<20221122123639.336264-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:39","name":"[COMMITTED] ada: Fix formatting glitches in Make_Tag_Assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123639.336264-1-poulhies@adacore.com/mbox/"},{"id":24340,"url":"https://patchwork.plctlab.org/api/1.2/patches/24340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123646.336327-1-poulhies@adacore.com/","msgid":"<20221122123646.336327-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:46","name":"[COMMITTED] ada: Adjust number of errors when removing warning in dead code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123646.336327-1-poulhies@adacore.com/mbox/"},{"id":24341,"url":"https://patchwork.plctlab.org/api/1.2/patches/24341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123654.336392-1-poulhies@adacore.com/","msgid":"<20221122123654.336392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:54","name":"[COMMITTED] ada: Disable checking of Elab_Spec procedures in CodePeer_Mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123654.336392-1-poulhies@adacore.com/mbox/"},{"id":24342,"url":"https://patchwork.plctlab.org/api/1.2/patches/24342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123659.336456-1-poulhies@adacore.com/","msgid":"<20221122123659.336456-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:59","name":"[COMMITTED] ada: Accept aspects Global and Depends on abstract subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123659.336456-1-poulhies@adacore.com/mbox/"},{"id":24389,"url":"https://patchwork.plctlab.org/api/1.2/patches/24389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-1-aldyh@redhat.com/","msgid":"<20221122135801.1945438-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:57:59","name":"Remove ASSERT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-1-aldyh@redhat.com/mbox/"},{"id":24391,"url":"https://patchwork.plctlab.org/api/1.2/patches/24391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-2-aldyh@redhat.com/","msgid":"<20221122135801.1945438-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:58:00","name":"Remove follow_assert_exprs from overflow_comparison.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-2-aldyh@redhat.com/mbox/"},{"id":24390,"url":"https://patchwork.plctlab.org/api/1.2/patches/24390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-3-aldyh@redhat.com/","msgid":"<20221122135801.1945438-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:58:01","name":"Remove use_equiv_p in vr-values.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-3-aldyh@redhat.com/mbox/"},{"id":24401,"url":"https://patchwork.plctlab.org/api/1.2/patches/24401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edtvulho.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-22T14:12:03","name":"ipa-cp: Do not be too optimistic about self-recursive edges (PR 107661)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edtvulho.fsf@suse.cz/mbox/"},{"id":24408,"url":"https://patchwork.plctlab.org/api/1.2/patches/24408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122142955.677712-1-jason@redhat.com/","msgid":"<20221122142955.677712-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-22T14:29:55","name":"[pushed] c++: don'\''t use strchrnul [PR107781]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122142955.677712-1-jason@redhat.com/mbox/"},{"id":24494,"url":"https://patchwork.plctlab.org/api/1.2/patches/24494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175454.2141215-1-jwakely@redhat.com/","msgid":"<20221122175454.2141215-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T17:54:54","name":"[committed] libstdc++: Add testcase for fs::path constraint recursion [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175454.2141215-1-jwakely@redhat.com/mbox/"},{"id":24495,"url":"https://patchwork.plctlab.org/api/1.2/patches/24495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175502.2141235-1-jwakely@redhat.com/","msgid":"<20221122175502.2141235-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T17:55:02","name":"[committed] libstdc++: Replace std::isdigit and std::isxdigit in [PR107817]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175502.2141235-1-jwakely@redhat.com/mbox/"},{"id":24594,"url":"https://patchwork.plctlab.org/api/1.2/patches/24594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122215026.2156686-1-jwakely@redhat.com/","msgid":"<20221122215026.2156686-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T21:50:26","name":"[committed] libstdc++: Add workaround for fs::path constraint recursion [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122215026.2156686-1-jwakely@redhat.com/mbox/"},{"id":24598,"url":"https://patchwork.plctlab.org/api/1.2/patches/24598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dbdce3d4-1d85-4628-b9ea-d4935aaa02df-1669153996745@3c-app-gmx-bap12/","msgid":"","list_archive_url":null,"date":"2022-11-22T21:53:16","name":"Fortran: error recovery on associate with bad selector [PR107577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dbdce3d4-1d85-4628-b9ea-d4935aaa02df-1669153996745@3c-app-gmx-bap12/mbox/"},{"id":24606,"url":"https://patchwork.plctlab.org/api/1.2/patches/24606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223633.3308746-1-dmalcolm@redhat.com/","msgid":"<20221122223633.3308746-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:33","name":"[committed] analyzer: eliminate region_model::impl_call_* special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223633.3308746-1-dmalcolm@redhat.com/mbox/"},{"id":24607,"url":"https://patchwork.plctlab.org/api/1.2/patches/24607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223649.3308793-1-dmalcolm@redhat.com/","msgid":"<20221122223649.3308793-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:49","name":"[committed] analyzer: fix '\''errno'\'' on Solaris and OS X [PR107807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223649.3308793-1-dmalcolm@redhat.com/mbox/"},{"id":24608,"url":"https://patchwork.plctlab.org/api/1.2/patches/24608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223659.3308837-1-dmalcolm@redhat.com/","msgid":"<20221122223659.3308837-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:59","name":"[committed] analyzer: fix ICE on '\''bind(INT_CST, ...)'\'' [PR107783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223659.3308837-1-dmalcolm@redhat.com/mbox/"},{"id":24609,"url":"https://patchwork.plctlab.org/api/1.2/patches/24609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223711.3308884-1-dmalcolm@redhat.com/","msgid":"<20221122223711.3308884-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:37:11","name":"[committed] analyzer: only look for named functions in root ns [PR107788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223711.3308884-1-dmalcolm@redhat.com/mbox/"},{"id":24627,"url":"https://patchwork.plctlab.org/api/1.2/patches/24627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com/","msgid":"<293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com>","list_archive_url":null,"date":"2022-11-22T23:20:58","name":"[committed,RISC-V] Fix recent rvv/base/spill testcase failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com/mbox/"},{"id":24628,"url":"https://patchwork.plctlab.org/api/1.2/patches/24628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db876775-3e1b-172f-18e3-d593ef766832@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-11-22T23:24:36","name":"[committed] Fix comment typos noticed by Bernhard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db876775-3e1b-172f-18e3-d593ef766832@ventanamicro.com/mbox/"},{"id":24664,"url":"https://patchwork.plctlab.org/api/1.2/patches/24664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com/","msgid":"<4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com>","list_archive_url":null,"date":"2022-11-23T02:54:42","name":"Change the behavior of predicate check failure on cbranchcc4 operand0 in prepare_cmp_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com/mbox/"},{"id":24740,"url":"https://patchwork.plctlab.org/api/1.2/patches/24740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123064934.1560808-1-chenglulu@loongson.cn/","msgid":"<20221123064934.1560808-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-23T06:49:35","name":"[v1] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123064934.1560808-1-chenglulu@loongson.cn/mbox/"},{"id":24752,"url":"https://patchwork.plctlab.org/api/1.2/patches/24752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com/","msgid":"<75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com>","list_archive_url":null,"date":"2022-11-23T07:08:44","name":"Add a new conversion for conditional ternary set into ifcvt [PR106536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com/mbox/"},{"id":24800,"url":"https://patchwork.plctlab.org/api/1.2/patches/24800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33fGGNXV6JNCK1p@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:51:36","name":"diagnostics: Fix selftest ICE in certain locales [PR107722]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33fGGNXV6JNCK1p@tucnak/mbox/"},{"id":24801,"url":"https://patchwork.plctlab.org/api/1.2/patches/24801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33f5EQ0InVdAs3/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:55:00","name":"libstdc++: Fix libstdc++ build on some targets [PR107811]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33f5EQ0InVdAs3/@tucnak/mbox/"},{"id":24802,"url":"https://patchwork.plctlab.org/api/1.2/patches/24802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33hBb0fLsB9QjWU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:59:49","name":"c: Fix compile time hog in c_genericize [PR107127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33hBb0fLsB9QjWU@tucnak/mbox/"},{"id":24826,"url":"https://patchwork.plctlab.org/api/1.2/patches/24826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ac22ef05-6313-23fc-5972-e97b380601fe@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-23T09:40:23","name":"lto: fix usage of timer in materialize_cgraph","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ac22ef05-6313-23fc-5972-e97b380601fe@suse.cz/mbox/"},{"id":24846,"url":"https://patchwork.plctlab.org/api/1.2/patches/24846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123101038.2192550-1-jwakely@redhat.com/","msgid":"<20221123101038.2192550-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-23T10:10:38","name":"doc: -Wdelete-non-virtual-dtor supersedes -Wnon-virtual-dtor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123101038.2192550-1-jwakely@redhat.com/mbox/"},{"id":24847,"url":"https://patchwork.plctlab.org/api/1.2/patches/24847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123102116.2194553-1-jwakely@redhat.com/","msgid":"<20221123102116.2194553-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-23T10:21:16","name":"[committed] libstdc++: Fix unsafe use of dirent::d_name [PR107814]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123102116.2194553-1-jwakely@redhat.com/mbox/"},{"id":24891,"url":"https://patchwork.plctlab.org/api/1.2/patches/24891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3331bxiUwkukHjb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T10:37:09","name":"c-family: Incremental fix for -Wsign-compare BIT_NOT_EXPR handling [PR107465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3331bxiUwkukHjb@tucnak/mbox/"},{"id":24946,"url":"https://patchwork.plctlab.org/api/1.2/patches/24946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123122820.3150670-1-hongtao.liu@intel.com/","msgid":"<20221123122820.3150670-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-23T12:28:20","name":"[x86] Fix incorrect implementation for mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123122820.3150670-1-hongtao.liu@intel.com/mbox/"},{"id":24951,"url":"https://patchwork.plctlab.org/api/1.2/patches/24951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt8hpzro.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-11-23T13:27:07","name":"analyzer: Use __builtin_alloca in gcc.dg/analyzer/call-summaries-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt8hpzro.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":24973,"url":"https://patchwork.plctlab.org/api/1.2/patches/24973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru/","msgid":"<9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru>","list_archive_url":null,"date":"2022-11-23T13:29:46","name":"Make Warray-bounds alias to Warray-bounds= [PR107787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru/mbox/"},{"id":25010,"url":"https://patchwork.plctlab.org/api/1.2/patches/25010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16645-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-23T14:24:44","name":"AArch64 sve2: Fix expansion of division [PR107830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16645-tamar@arm.com/mbox/"},{"id":25279,"url":"https://patchwork.plctlab.org/api/1.2/patches/25279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124012200.103783-1-hongtao.liu@intel.com/","msgid":"<20221124012200.103783-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-24T01:22:00","name":"[v2,x86] Fix incorrect _mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124012200.103783-1-hongtao.liu@intel.com/mbox/"},{"id":25282,"url":"https://patchwork.plctlab.org/api/1.2/patches/25282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-1-dmalcolm@redhat.com/","msgid":"<20221124015203.3367244-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:02","name":"[committed,1/2] analyzer: move known funs for fds to sm-fd.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-1-dmalcolm@redhat.com/mbox/"},{"id":25281,"url":"https://patchwork.plctlab.org/api/1.2/patches/25281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-2-dmalcolm@redhat.com/","msgid":"<20221124015203.3367244-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:03","name":"[committed,2/2] analyzer: eliminate region_model::on_ fns for sockets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-2-dmalcolm@redhat.com/mbox/"},{"id":25284,"url":"https://patchwork.plctlab.org/api/1.2/patches/25284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015221.3367288-1-dmalcolm@redhat.com/","msgid":"<20221124015221.3367288-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:21","name":"[committed] analyzer: fix nondeterminism in logs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015221.3367288-1-dmalcolm@redhat.com/mbox/"},{"id":25283,"url":"https://patchwork.plctlab.org/api/1.2/patches/25283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015233.3367331-1-dmalcolm@redhat.com/","msgid":"<20221124015233.3367331-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:33","name":"[committed] analyzer: revamp of heap-allocated regions [PR106473]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015233.3367331-1-dmalcolm@redhat.com/mbox/"},{"id":25343,"url":"https://patchwork.plctlab.org/api/1.2/patches/25343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e42c1e38-a53e-885d-8e0a-6b4d218c6328@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-24T07:42:43","name":"[(pushed)] analyzer: fix Clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e42c1e38-a53e-885d-8e0a-6b4d218c6328@suse.cz/mbox/"},{"id":25390,"url":"https://patchwork.plctlab.org/api/1.2/patches/25390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3810xiZcwOyI+7f@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:13:55","name":"c++: Don'\''t clear TREE_READONLY for -fmerge-all-constants for non-aggregates [PR107558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3810xiZcwOyI+7f@tucnak/mbox/"},{"id":25396,"url":"https://patchwork.plctlab.org/api/1.2/patches/25396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-2-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-2-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:49","name":"[1/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-2-linkw@linux.ibm.com/mbox/"},{"id":25398,"url":"https://patchwork.plctlab.org/api/1.2/patches/25398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-3-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-3-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:50","name":"[2/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-3-linkw@linux.ibm.com/mbox/"},{"id":25391,"url":"https://patchwork.plctlab.org/api/1.2/patches/25391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-4-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-4-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:51","name":"[3/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-4-linkw@linux.ibm.com/mbox/"},{"id":25399,"url":"https://patchwork.plctlab.org/api/1.2/patches/25399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-5-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-5-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:52","name":"[4/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-5-linkw@linux.ibm.com/mbox/"},{"id":25401,"url":"https://patchwork.plctlab.org/api/1.2/patches/25401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-6-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-6-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:53","name":"[5/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-6-linkw@linux.ibm.com/mbox/"},{"id":25392,"url":"https://patchwork.plctlab.org/api/1.2/patches/25392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-7-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-7-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:54","name":"[6/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-7-linkw@linux.ibm.com/mbox/"},{"id":25397,"url":"https://patchwork.plctlab.org/api/1.2/patches/25397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-8-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-8-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:55","name":"[7/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-8-linkw@linux.ibm.com/mbox/"},{"id":25402,"url":"https://patchwork.plctlab.org/api/1.2/patches/25402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-9-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-9-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:56","name":"[8/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-9-linkw@linux.ibm.com/mbox/"},{"id":25393,"url":"https://patchwork.plctlab.org/api/1.2/patches/25393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-10-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-10-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:57","name":"[9/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-10-linkw@linux.ibm.com/mbox/"},{"id":25400,"url":"https://patchwork.plctlab.org/api/1.2/patches/25400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y383ZmQYu/NFCmpI@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:20:38","name":"libstdc++: Workaround buggy printf on Solaris in to_chars/float128_c++23.cc test [PR107815]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y383ZmQYu/NFCmpI@tucnak/mbox/"},{"id":25403,"url":"https://patchwork.plctlab.org/api/1.2/patches/25403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384D/1PiDqjqBdt@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:23:27","name":"libstdc++: Another merge from fast_float upstream [PR107468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384D/1PiDqjqBdt@tucnak/mbox/"},{"id":25404,"url":"https://patchwork.plctlab.org/api/1.2/patches/25404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384/VPTaUH2+Bi5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:27:25","name":"asan: Fix up error recovery for too large frames [PR107317]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384/VPTaUH2+Bi5@tucnak/mbox/"},{"id":25405,"url":"https://patchwork.plctlab.org/api/1.2/patches/25405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y387Ra+X63ssy1UG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:37:09","name":"[committed] testsuite: Fix up broken testcase [PR107127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y387Ra+X63ssy1UG@tucnak/mbox/"},{"id":25409,"url":"https://patchwork.plctlab.org/api/1.2/patches/25409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124094148.125303-1-guojiufu@linux.ibm.com/","msgid":"<20221124094148.125303-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:41:48","name":"[V2] Update block move for struct param or returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124094148.125303-1-guojiufu@linux.ibm.com/mbox/"},{"id":25420,"url":"https://patchwork.plctlab.org/api/1.2/patches/25420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101245.445226-1-poulhies@adacore.com/","msgid":"<20221124101245.445226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-24T10:12:45","name":"[COMMITTED] ada: Spurious error on Lock_Free protected type with discriminants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101245.445226-1-poulhies@adacore.com/mbox/"},{"id":25421,"url":"https://patchwork.plctlab.org/api/1.2/patches/25421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101258.445328-1-poulhies@adacore.com/","msgid":"<20221124101258.445328-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-24T10:12:58","name":"[COMMITTED] ada: Add assertion for the implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101258.445328-1-poulhies@adacore.com/mbox/"},{"id":25442,"url":"https://patchwork.plctlab.org/api/1.2/patches/25442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y39OUfw+3mJJirzf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T10:58:25","name":"[committed] c++: Further -fcontract* option description fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y39OUfw+3mJJirzf@tucnak/mbox/"},{"id":25585,"url":"https://patchwork.plctlab.org/api/1.2/patches/25585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrwn7kv2dv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-24T14:43:56","name":"[35/35,V2] arm: improve tests for vsetq_lane*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrwn7kv2dv.fsf_-_@arm.com/mbox/"},{"id":25657,"url":"https://patchwork.plctlab.org/api/1.2/patches/25657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com/","msgid":"<64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com>","list_archive_url":null,"date":"2022-11-24T17:48:01","name":"libgomp: Add no-target-region rev offload test + fix plugin-nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com/mbox/"},{"id":25696,"url":"https://patchwork.plctlab.org/api/1.2/patches/25696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com/","msgid":"<5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com>","list_archive_url":null,"date":"2022-11-24T20:43:34","name":"gcc/jit/jit-recording.cc: recording::global::write_to_dump: Avoid crashes when writing psuedo-C for globals with string initializers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com/mbox/"},{"id":25765,"url":"https://patchwork.plctlab.org/api/1.2/patches/25765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002131.41071-1-jwakely@redhat.com/","msgid":"<20221125002131.41071-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T00:21:31","name":"[committed] libstdc++: Update tests on trunk [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002131.41071-1-jwakely@redhat.com/mbox/"},{"id":25766,"url":"https://patchwork.plctlab.org/api/1.2/patches/25766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002356.42216-1-jwakely@redhat.com/","msgid":"<20221125002356.42216-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T00:23:56","name":"[committed] libstdc++: Change return type of std::bit_width to int (LWG 3656)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002356.42216-1-jwakely@redhat.com/mbox/"},{"id":25781,"url":"https://patchwork.plctlab.org/api/1.2/patches/25781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f57923-175a-82ca-5c0f-769ac916647d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-25T02:13:38","name":"[OpenMP] GC unused SIMD clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f57923-175a-82ca-5c0f-769ac916647d@codesourcery.com/mbox/"},{"id":25824,"url":"https://patchwork.plctlab.org/api/1.2/patches/25824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125053904.1984263-1-hongtao.liu@intel.com/","msgid":"<20221125053904.1984263-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-25T05:39:04","name":"[V3,x86] Fix incorrect _mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125053904.1984263-1-hongtao.liu@intel.com/mbox/"},{"id":25872,"url":"https://patchwork.plctlab.org/api/1.2/patches/25872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075921.0706813A08@imap2.suse-dmz.suse.de/","msgid":"<20221125075921.0706813A08@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-25T07:59:20","name":"tree-optimization/107865 - ICE with outlining of loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075921.0706813A08@imap2.suse-dmz.suse.de/mbox/"},{"id":25873,"url":"https://patchwork.plctlab.org/api/1.2/patches/25873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075944.7DA6713A08@imap2.suse-dmz.suse.de/","msgid":"<20221125075944.7DA6713A08@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-25T07:59:44","name":"tree-optimization/106912 - IPA profile and pure/const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075944.7DA6713A08@imap2.suse-dmz.suse.de/mbox/"},{"id":25883,"url":"https://patchwork.plctlab.org/api/1.2/patches/25883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12106563.O9o76ZdvQC@fomalhaut/","msgid":"<12106563.O9o76ZdvQC@fomalhaut>","list_archive_url":null,"date":"2022-11-25T09:21:52","name":"Fix thinko in operator_bitwise_xor::op1_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12106563.O9o76ZdvQC@fomalhaut/mbox/"},{"id":25915,"url":"https://patchwork.plctlab.org/api/1.2/patches/25915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com/","msgid":"<78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com>","list_archive_url":null,"date":"2022-11-25T10:34:35","name":"libgomp.texi: OpenMP Impl Status 5.1 additions + TR11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com/mbox/"},{"id":25930,"url":"https://patchwork.plctlab.org/api/1.2/patches/25930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9bl28f.fsf@euler.schwinge.homeip.net/","msgid":"<87cz9bl28f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-25T11:09:36","name":"[PING] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9bl28f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":25994,"url":"https://patchwork.plctlab.org/api/1.2/patches/25994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68f00ea-199b-2980-0ae6-df53da370a5c@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-25T12:57:35","name":"i386: fix assert (__builtin_cpu_supports (\"x86-64\") >= 0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68f00ea-199b-2980-0ae6-df53da370a5c@suse.cz/mbox/"},{"id":26022,"url":"https://patchwork.plctlab.org/api/1.2/patches/26022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4DM8FVKsEnXonyu@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-11-25T14:10:56","name":"Fix resolution streaming with incremental linking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4DM8FVKsEnXonyu@kam.mff.cuni.cz/mbox/"},{"id":26027,"url":"https://patchwork.plctlab.org/api/1.2/patches/26027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125143229.3232391-1-rearnsha@arm.com/","msgid":"<20221125143229.3232391-1-rearnsha@arm.com>","list_archive_url":null,"date":"2022-11-25T14:32:29","name":"sync libsframe toplevel from binutils-gdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125143229.3232391-1-rearnsha@arm.com/mbox/"},{"id":26058,"url":"https://patchwork.plctlab.org/api/1.2/patches/26058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150804.128740-1-jwakely@redhat.com/","msgid":"<20221125150804.128740-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:04","name":"[committed] libstdc++: Add always_inline to trivial iterator operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150804.128740-1-jwakely@redhat.com/mbox/"},{"id":26059,"url":"https://patchwork.plctlab.org/api/1.2/patches/26059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150816.128776-1-jwakely@redhat.com/","msgid":"<20221125150816.128776-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:16","name":"[committed] libstdc++: Do not define operator!= in for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150816.128776-1-jwakely@redhat.com/mbox/"},{"id":26063,"url":"https://patchwork.plctlab.org/api/1.2/patches/26063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150830.128794-1-jwakely@redhat.com/","msgid":"<20221125150830.128794-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:30","name":"[committed] libstdc++: Call predicate with non-const values in std::erase_if [PR107850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150830.128794-1-jwakely@redhat.com/mbox/"},{"id":26065,"url":"https://patchwork.plctlab.org/api/1.2/patches/26065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150839.128831-1-jwakely@redhat.com/","msgid":"<20221125150839.128831-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:39","name":"[committed] libstdc++: Fix orphaned/nested output of configure checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150839.128831-1-jwakely@redhat.com/mbox/"},{"id":26088,"url":"https://patchwork.plctlab.org/api/1.2/patches/26088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125160639.43024-1-juzhe.zhong@rivai.ai/","msgid":"<20221125160639.43024-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-25T16:06:39","name":"RISC-V: Add duplicate vector support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125160639.43024-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26278,"url":"https://patchwork.plctlab.org/api/1.2/patches/26278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669480898-21885-1-git-send-email-apinski@marvell.com/","msgid":"<1669480898-21885-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-26T16:41:38","name":"tree-optimization/103356 Add missing (~a) == b folding for _Bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669480898-21885-1-git-send-email-apinski@marvell.com/mbox/"},{"id":26306,"url":"https://patchwork.plctlab.org/api/1.2/patches/26306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127021613.432881-1-softwaresale01@gmail.com/","msgid":"<20221127021613.432881-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2022-11-27T02:16:13","name":"rtl: add predicates for addition, subtraction & multiplication","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127021613.432881-1-softwaresale01@gmail.com/mbox/"},{"id":26383,"url":"https://patchwork.plctlab.org/api/1.2/patches/26383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127170256.3803408-1-christoph.muellner@vrull.eu/","msgid":"<20221127170256.3803408-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-27T17:02:56","name":"[v2] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127170256.3803408-1-christoph.muellner@vrull.eu/mbox/"},{"id":26410,"url":"https://patchwork.plctlab.org/api/1.2/patches/26410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2d7545f7-09e7-44d8-ba71-166690b820a8-1669581157254@3c-app-gmx-bap47/","msgid":"","list_archive_url":null,"date":"2022-11-27T20:32:37","name":"Fortran: ICE with elemental and dummy argument with VALUE attribute [PR107819]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2d7545f7-09e7-44d8-ba71-166690b820a8-1669581157254@3c-app-gmx-bap47/mbox/"},{"id":26457,"url":"https://patchwork.plctlab.org/api/1.2/patches/26457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128021428.13824-1-wangfeng@eswincomputing.com/","msgid":"<20221128021428.13824-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T02:14:28","name":"RISC-V: Support the ins \"rol\" with immediate operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128021428.13824-1-wangfeng@eswincomputing.com/mbox/"},{"id":26511,"url":"https://patchwork.plctlab.org/api/1.2/patches/26511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052829.36087-2-gaofei@eswincomputing.com/","msgid":"<20221128052829.36087-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T05:28:29","name":"[1/1] RISC-V: fix stack access before allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052829.36087-2-gaofei@eswincomputing.com/mbox/"},{"id":26512,"url":"https://patchwork.plctlab.org/api/1.2/patches/26512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052904.36217-2-gaofei@eswincomputing.com/","msgid":"<20221128052904.36217-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T05:29:04","name":"[1/1] RISC-V: fix stack access before allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052904.36217-2-gaofei@eswincomputing.com/mbox/"},{"id":26524,"url":"https://patchwork.plctlab.org/api/1.2/patches/26524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/323b61ce-7027-bad3-a061-c198d7268a22@gmail.com/","msgid":"<323b61ce-7027-bad3-a061-c198d7268a22@gmail.com>","list_archive_url":null,"date":"2022-11-28T06:01:22","name":"[_GLIBCXX_INLINE_VERSION] Adapt dg error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/323b61ce-7027-bad3-a061-c198d7268a22@gmail.com/mbox/"},{"id":26525,"url":"https://patchwork.plctlab.org/api/1.2/patches/26525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd8a96c6-216d-d774-8356-dad6c9150f15@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-28T06:07:07","name":"[_GLIBCXX_INLINE_VERSION] Adapt to_chars/from_chars symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd8a96c6-216d-d774-8356-dad6c9150f15@gmail.com/mbox/"},{"id":26574,"url":"https://patchwork.plctlab.org/api/1.2/patches/26574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com/","msgid":"<54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com>","list_archive_url":null,"date":"2022-11-28T07:40:47","name":"gcn: Fix __builtin_gcn_first_call_this_thread_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com/mbox/"},{"id":26575,"url":"https://patchwork.plctlab.org/api/1.2/patches/26575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128075944.239B11326E@imap2.suse-dmz.suse.de/","msgid":"<20221128075944.239B11326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T07:59:43","name":"tree-optimization/107867 - failed abnormal cleanup in forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128075944.239B11326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26582,"url":"https://patchwork.plctlab.org/api/1.2/patches/26582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4R1agyRgguWCyfT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-28T08:46:34","name":"i386: Fix up ix86_abi handling [PR106875]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4R1agyRgguWCyfT@tucnak/mbox/"},{"id":26585,"url":"https://patchwork.plctlab.org/api/1.2/patches/26585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128090434.44F5E13273@imap2.suse-dmz.suse.de/","msgid":"<20221128090434.44F5E13273@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T09:04:33","name":"tree-optimization/107876 - unswitching of switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128090434.44F5E13273@imap2.suse-dmz.suse.de/mbox/"},{"id":26608,"url":"https://patchwork.plctlab.org/api/1.2/patches/26608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128101653.0419F1326E@imap2.suse-dmz.suse.de/","msgid":"<20221128101653.0419F1326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T10:16:52","name":"tree-optimization/107493 - SCEV analysis with conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128101653.0419F1326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26655,"url":"https://patchwork.plctlab.org/api/1.2/patches/26655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5da61567-b5de-48db-83e0-d50da3d39520-1669636551837@3c-app-webde-bs19/","msgid":"","list_archive_url":null,"date":"2022-11-28T11:55:51","name":"coroutines: Fix promotion of class members in co_await statements [PR99576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5da61567-b5de-48db-83e0-d50da3d39520-1669636551837@3c-app-webde-bs19/mbox/"},{"id":26711,"url":"https://patchwork.plctlab.org/api/1.2/patches/26711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120437.171358-1-poulhies@adacore.com/","msgid":"<20221128120437.171358-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:37","name":"[COMMITTED] ada: Implement change to SPARK RM rule on state refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120437.171358-1-poulhies@adacore.com/mbox/"},{"id":26716,"url":"https://patchwork.plctlab.org/api/1.2/patches/26716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120451.171477-1-poulhies@adacore.com/","msgid":"<20221128120451.171477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:51","name":"[COMMITTED] ada: Add PIE support to backtraces on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120451.171477-1-poulhies@adacore.com/mbox/"},{"id":26713,"url":"https://patchwork.plctlab.org/api/1.2/patches/26713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120458.171543-1-poulhies@adacore.com/","msgid":"<20221128120458.171543-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:58","name":"[COMMITTED] ada: Fix internal error on conversion as in/out actual with -gnatVa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120458.171543-1-poulhies@adacore.com/mbox/"},{"id":26714,"url":"https://patchwork.plctlab.org/api/1.2/patches/26714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120506.171614-1-poulhies@adacore.com/","msgid":"<20221128120506.171614-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:06","name":"[COMMITTED] ada: Annotate GNAT.Source_Info with an abstract state","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120506.171614-1-poulhies@adacore.com/mbox/"},{"id":26717,"url":"https://patchwork.plctlab.org/api/1.2/patches/26717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120524.171679-1-poulhies@adacore.com/","msgid":"<20221128120524.171679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:24","name":"[COMMITTED] ada: doc/share/conf.py: Switch the HTML documentation to using the RTD theme","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120524.171679-1-poulhies@adacore.com/mbox/"},{"id":26718,"url":"https://patchwork.plctlab.org/api/1.2/patches/26718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120535.171749-1-poulhies@adacore.com/","msgid":"<20221128120535.171749-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:35","name":"[COMMITTED] ada: Adjust runtime library and User'\''s Guide to PIE default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120535.171749-1-poulhies@adacore.com/mbox/"},{"id":26724,"url":"https://patchwork.plctlab.org/api/1.2/patches/26724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0b14a63-ec38-89bc-5c0b-da87c3b28390@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-28T12:13:22","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0b14a63-ec38-89bc-5c0b-da87c3b28390@arm.com/mbox/"},{"id":26741,"url":"https://patchwork.plctlab.org/api/1.2/patches/26741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128130539.2124727-1-hongtao.liu@intel.com/","msgid":"<20221128130539.2124727-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-28T13:05:39","name":"[x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128130539.2124727-1-hongtao.liu@intel.com/mbox/"},{"id":26781,"url":"https://patchwork.plctlab.org/api/1.2/patches/26781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128135914.4068410-1-joakim@nohlgard.se/","msgid":"<20221128135914.4068410-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-11-28T13:59:14","name":"gcc: Use ld -r when checking for HAVE_LD_RO_RW_SECTION_MIXING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128135914.4068410-1-joakim@nohlgard.se/mbox/"},{"id":26782,"url":"https://patchwork.plctlab.org/api/1.2/patches/26782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128140251.4076484-1-joakim@nohlgard.se/","msgid":"<20221128140251.4076484-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-11-28T14:02:51","name":"c++: Fall back to global cpp spec if CPLUSPLUS_CPP_SPEC is not defined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128140251.4076484-1-joakim@nohlgard.se/mbox/"},{"id":26797,"url":"https://patchwork.plctlab.org/api/1.2/patches/26797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128141406.242953-1-juzhe.zhong@rivai.ai/","msgid":"<20221128141406.242953-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-28T14:14:06","name":"RISC-V: Add attributes for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128141406.242953-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26798,"url":"https://patchwork.plctlab.org/api/1.2/patches/26798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128142116.245036-1-juzhe.zhong@rivai.ai/","msgid":"<20221128142116.245036-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-28T14:21:16","name":"RISC-V: Remove tail && mask policy operand for vmclr, vmset, vmld, vmst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128142116.245036-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26811,"url":"https://patchwork.plctlab.org/api/1.2/patches/26811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152003.41709-1-jwakely@redhat.com/","msgid":"<20221128152003.41709-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T15:20:03","name":"[committed] libstdc++: Make 16-bit std::subtract_with_carry_engine work [PR107466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152003.41709-1-jwakely@redhat.com/mbox/"},{"id":26812,"url":"https://patchwork.plctlab.org/api/1.2/patches/26812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152015.41760-1-jwakely@redhat.com/","msgid":"<20221128152015.41760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T15:20:15","name":"[committed] libstdc++: Prune versioned namespace from testsuite output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152015.41760-1-jwakely@redhat.com/mbox/"},{"id":26875,"url":"https://patchwork.plctlab.org/api/1.2/patches/26875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170005.61262-1-jwakely@redhat.com/","msgid":"<20221128170005.61262-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:05","name":"[committed] libstdc++: Fix _Hash_bytes for I16LP32 targets [PR107885]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170005.61262-1-jwakely@redhat.com/mbox/"},{"id":26877,"url":"https://patchwork.plctlab.org/api/1.2/patches/26877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170020.61434-1-jwakely@redhat.com/","msgid":"<20221128170020.61434-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:20","name":"[committed] libstdc++: Fix std::string_view for I32LP16 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170020.61434-1-jwakely@redhat.com/mbox/"},{"id":26876,"url":"https://patchwork.plctlab.org/api/1.2/patches/26876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170028.61462-1-jwakely@redhat.com/","msgid":"<20221128170028.61462-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:28","name":"[committed] libstdc++: Fix src/c++17/memory_resource for H8 targets [PR107801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170028.61462-1-jwakely@redhat.com/mbox/"},{"id":26902,"url":"https://patchwork.plctlab.org/api/1.2/patches/26902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211281635580.463@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-28T17:44:05","name":"[v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211281635580.463@tpp.orcam.me.uk/mbox/"},{"id":26914,"url":"https://patchwork.plctlab.org/api/1.2/patches/26914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128184057.3FF501326E@imap2.suse-dmz.suse.de/","msgid":"<20221128184057.3FF501326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T18:40:56","name":"tree-optimization/107896 - allow v2si to dimode unpacks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128184057.3FF501326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26944,"url":"https://patchwork.plctlab.org/api/1.2/patches/26944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2ce9e1a0-ad68-4fad-8953-6b51b5cfb9de-1669665943770@3c-app-gmx-bs02/","msgid":"","list_archive_url":null,"date":"2022-11-28T20:05:43","name":"Fortran: intrinsic MERGE shall use all its arguments [PR107874]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2ce9e1a0-ad68-4fad-8953-6b51b5cfb9de-1669665943770@3c-app-gmx-bs02/mbox/"},{"id":26945,"url":"https://patchwork.plctlab.org/api/1.2/patches/26945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669666345-28322-1-git-send-email-apinski@marvell.com/","msgid":"<1669666345-28322-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-28T20:12:25","name":"[COMMITTED] Fix comment for (A / (1 << B)) -> (A >> B).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669666345-28322-1-git-send-email-apinski@marvell.com/mbox/"},{"id":26946,"url":"https://patchwork.plctlab.org/api/1.2/patches/26946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128201647.484582-1-ppalka@redhat.com/","msgid":"<20221128201647.484582-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:16:47","name":"c++: explicit specialization and trailing requirements [PR107864]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128201647.484582-1-ppalka@redhat.com/mbox/"},{"id":26953,"url":"https://patchwork.plctlab.org/api/1.2/patches/26953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205142.541060-1-jason@redhat.com/","msgid":"<20221128205142.541060-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:51:42","name":"[pushed] c++: be more strict about '\''concept bool'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205142.541060-1-jason@redhat.com/mbox/"},{"id":26954,"url":"https://patchwork.plctlab.org/api/1.2/patches/26954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205236.541407-1-jason@redhat.com/","msgid":"<20221128205236.541407-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:52:36","name":"[pushed] c++: simple-requirement starting with '\''typename'\'' [PR101733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205236.541407-1-jason@redhat.com/mbox/"},{"id":26956,"url":"https://patchwork.plctlab.org/api/1.2/patches/26956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128212211.940206-1-ppalka@redhat.com/","msgid":"<20221128212211.940206-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-28T21:22:11","name":"c++: TYPENAME_TYPE lookup ignoring non-types [PR107773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128212211.940206-1-ppalka@redhat.com/mbox/"},{"id":26958,"url":"https://patchwork.plctlab.org/api/1.2/patches/26958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128213725.13926-1-palmer@rivosinc.com/","msgid":"<20221128213725.13926-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-28T21:37:25","name":"RISC-V: Fix up some wording in the mcpu/mtune comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128213725.13926-1-palmer@rivosinc.com/mbox/"},{"id":26991,"url":"https://patchwork.plctlab.org/api/1.2/patches/26991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-2-jcmvbkbc@gmail.com/","msgid":"<20221129004551.2213723-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-29T00:45:50","name":"[v2,1/2] gcc: xtensa: allow dynamic configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-2-jcmvbkbc@gmail.com/mbox/"},{"id":26990,"url":"https://patchwork.plctlab.org/api/1.2/patches/26990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-3-jcmvbkbc@gmail.com/","msgid":"<20221129004551.2213723-3-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-29T00:45:51","name":"[v2,2/2] libgcc: xtensa: use built-in configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-3-jcmvbkbc@gmail.com/mbox/"},{"id":27009,"url":"https://patchwork.plctlab.org/api/1.2/patches/27009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129012201.76355-1-juzhe.zhong@rivai.ai/","msgid":"<20221129012201.76355-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-29T01:22:01","name":"RISC-V: Remove tail && mask policy operand for vmclr, vmset, vmld, vmst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129012201.76355-1-juzhe.zhong@rivai.ai/mbox/"},{"id":27113,"url":"https://patchwork.plctlab.org/api/1.2/patches/27113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88ad246-a3b6-8f33-0cfd-98513928326a@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-29T08:34:54","name":"[(pushed)] re-run configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88ad246-a3b6-8f33-0cfd-98513928326a@suse.cz/mbox/"},{"id":27123,"url":"https://patchwork.plctlab.org/api/1.2/patches/27123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092511.5E60613428@imap2.suse-dmz.suse.de/","msgid":"<20221129092511.5E60613428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T09:25:11","name":"tree-optimization/107898 - ICE with -Walloca-larger-than","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092511.5E60613428@imap2.suse-dmz.suse.de/mbox/"},{"id":27124,"url":"https://patchwork.plctlab.org/api/1.2/patches/27124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092523.7E43313428@imap2.suse-dmz.suse.de/","msgid":"<20221129092523.7E43313428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T09:25:23","name":"ipa/107897 - avoid property verification ICE after error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092523.7E43313428@imap2.suse-dmz.suse.de/mbox/"},{"id":27128,"url":"https://patchwork.plctlab.org/api/1.2/patches/27128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4XUPYRb92sFBZk4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T09:43:25","name":"range-op-float: Fix up multiplication and division reverse operation [PR107879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4XUPYRb92sFBZk4@tucnak/mbox/"},{"id":27138,"url":"https://patchwork.plctlab.org/api/1.2/patches/27138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129100446.3875697-1-manolis.tsamis@vrull.eu/","msgid":"<20221129100446.3875697-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-11-29T10:04:46","name":"[v2] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129100446.3875697-1-manolis.tsamis@vrull.eu/mbox/"},{"id":27169,"url":"https://patchwork.plctlab.org/api/1.2/patches/27169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3202323.aeNJFYEL58@fomalhaut/","msgid":"<3202323.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2022-11-29T10:47:21","name":"Fix PR ada/107810","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3202323.aeNJFYEL58@fomalhaut/mbox/"},{"id":27202,"url":"https://patchwork.plctlab.org/api/1.2/patches/27202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129115910.9268213428@imap2.suse-dmz.suse.de/","msgid":"<20221129115910.9268213428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T11:59:10","name":"tree-optimization/106995 - if-conversion and vanishing loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129115910.9268213428@imap2.suse-dmz.suse.de/mbox/"},{"id":27212,"url":"https://patchwork.plctlab.org/api/1.2/patches/27212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X551/z9F08wuCL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T12:24:07","name":"c++: Deduce range for structured bindings if expression is not type dependent [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X551/z9F08wuCL@tucnak/mbox/"},{"id":27214,"url":"https://patchwork.plctlab.org/api/1.2/patches/27214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X70nKAHnZLUNVa@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T12:32:18","name":"c++: Incremental fix for g++.dg/gomp/for-21.C [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X70nKAHnZLUNVa@tucnak/mbox/"},{"id":27234,"url":"https://patchwork.plctlab.org/api/1.2/patches/27234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de/","msgid":"<20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T13:30:22","name":"tree-optimization/107852 - missed optimization with PHIs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de/mbox/"},{"id":27243,"url":"https://patchwork.plctlab.org/api/1.2/patches/27243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-1-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:05","name":"[1/3] Use sub mode to move block for struct parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-1-guojiufu@linux.ibm.com/mbox/"},{"id":27244,"url":"https://patchwork.plctlab.org/api/1.2/patches/27244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-2-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:06","name":"[2/3] Use sub mode to move block for struct returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-2-guojiufu@linux.ibm.com/mbox/"},{"id":27245,"url":"https://patchwork.plctlab.org/api/1.2/patches/27245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-3-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:07","name":"[3/3] Testcases for move sub blocks on param and ret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-3-guojiufu@linux.ibm.com/mbox/"},{"id":27249,"url":"https://patchwork.plctlab.org/api/1.2/patches/27249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-1-christophe.lyon@arm.com/","msgid":"<20221129134728.242212-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-29T13:47:27","name":"[v2,1/2] aarch64: fix warning emission for ABI break since GCC 9.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-1-christophe.lyon@arm.com/mbox/"},{"id":27247,"url":"https://patchwork.plctlab.org/api/1.2/patches/27247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-2-christophe.lyon@arm.com/","msgid":"<20221129134728.242212-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-29T13:47:28","name":"[v2,2/2] aarch64: Fix bit-field alignment in param passing [PR105549]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-2-christophe.lyon@arm.com/mbox/"},{"id":27281,"url":"https://patchwork.plctlab.org/api/1.2/patches/27281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=0mHW4Aw2u-Kksy=OV5KY-G7_CW+mrT1QKPyKMrBi80g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-29T14:39:07","name":"[aarch64] Use dup and zip1 for interleaving elements in initializing vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=0mHW4Aw2u-Kksy=OV5KY-G7_CW+mrT1QKPyKMrBi80g@mail.gmail.com/mbox/"},{"id":27299,"url":"https://patchwork.plctlab.org/api/1.2/patches/27299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129153945.144056-1-jwakely@redhat.com/","msgid":"<20221129153945.144056-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T15:39:45","name":"[committed] libstdc++: Do not use __used or __packed as identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129153945.144056-1-jwakely@redhat.com/mbox/"},{"id":27310,"url":"https://patchwork.plctlab.org/api/1.2/patches/27310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd63de7d-171c-bc9b-a3c5-5a3254c1c8a2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-29T15:56:21","name":"amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd63de7d-171c-bc9b-a3c5-5a3254c1c8a2@codesourcery.com/mbox/"},{"id":27384,"url":"https://patchwork.plctlab.org/api/1.2/patches/27384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171432.149718-1-jwakely@redhat.com/","msgid":"<20221129171432.149718-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T17:14:32","name":"[committed] libstdc++: Remove unnecessary tag dispatching in std::vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171432.149718-1-jwakely@redhat.com/mbox/"},{"id":27385,"url":"https://patchwork.plctlab.org/api/1.2/patches/27385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171446.149751-1-jwakely@redhat.com/","msgid":"<20221129171446.149751-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T17:14:46","name":"[committed] libstdc++: Avoid bogus warning in std::vector::insert [PR107852]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171446.149751-1-jwakely@redhat.com/mbox/"},{"id":27387,"url":"https://patchwork.plctlab.org/api/1.2/patches/27387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129174331.3124-1-soeren@soeren-tempel.net/","msgid":"<20221129174331.3124-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-11-29T17:43:31","name":"libgo: Don'\''t rely on GNU-specific strerror_r variant on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129174331.3124-1-soeren@soeren-tempel.net/mbox/"},{"id":27391,"url":"https://patchwork.plctlab.org/api/1.2/patches/27391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129175453.3644-1-soeren@soeren-tempel.net/","msgid":"<20221129175453.3644-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-11-29T17:54:53","name":"[v2] libgo: Don'\''t rely on GNU-specific strerror_r variant on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129175453.3644-1-soeren@soeren-tempel.net/mbox/"},{"id":27393,"url":"https://patchwork.plctlab.org/api/1.2/patches/27393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com/","msgid":"<9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com>","list_archive_url":null,"date":"2022-11-29T18:26:07","name":"libgomp.texi: List GCN'\''s '\''gfx803'\'' under OpenMP Context Selectors (was: amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com/mbox/"},{"id":27482,"url":"https://patchwork.plctlab.org/api/1.2/patches/27482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129200322.1544250-1-ppalka@redhat.com/","msgid":"<20221129200322.1544250-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-29T20:03:22","name":"c++: ICE with <=> of incompatible pointers [PR107542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129200322.1544250-1-ppalka@redhat.com/mbox/"},{"id":27519,"url":"https://patchwork.plctlab.org/api/1.2/patches/27519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de/","msgid":"<776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de>","list_archive_url":null,"date":"2022-11-29T21:48:13","name":"libstdc++: Add error handler for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de/mbox/"},{"id":27558,"url":"https://patchwork.plctlab.org/api/1.2/patches/27558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010722.3663721-1-dmalcolm@redhat.com/","msgid":"<20221130010722.3663721-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:22","name":"[committed] analyzer: fix folding of '\''(PTR + 0) => PTR'\'' [PR105784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010722.3663721-1-dmalcolm@redhat.com/mbox/"},{"id":27560,"url":"https://patchwork.plctlab.org/api/1.2/patches/27560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010736.3663768-1-dmalcolm@redhat.com/","msgid":"<20221130010736.3663768-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:36","name":"[committed] analyzer work on issues with flex-generated lexers [PR103546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010736.3663768-1-dmalcolm@redhat.com/mbox/"},{"id":27559,"url":"https://patchwork.plctlab.org/api/1.2/patches/27559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010751.3663828-1-dmalcolm@redhat.com/","msgid":"<20221130010751.3663828-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:51","name":"[committed] analyzer: move stdio known fns to sm-file.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010751.3663828-1-dmalcolm@redhat.com/mbox/"},{"id":27567,"url":"https://patchwork.plctlab.org/api/1.2/patches/27567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130022152.190824-1-guojiufu@linux.ibm.com/","msgid":"<20221130022152.190824-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-30T02:21:52","name":"NFC: use more readable pattern to clean high 32 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130022152.190824-1-guojiufu@linux.ibm.com/mbox/"},{"id":27596,"url":"https://patchwork.plctlab.org/api/1.2/patches/27596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130052114.10229-1-hongtao.liu@intel.com/","msgid":"<20221130052114.10229-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-30T05:21:14","name":"[1/2,V2] Implement hwasan target_hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130052114.10229-1-hongtao.liu@intel.com/mbox/"},{"id":27621,"url":"https://patchwork.plctlab.org/api/1.2/patches/27621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz94q3db.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-11-30T07:59:44","name":"[PR107304] note test'\''s ifunc requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz94q3db.fsf@lxoliva.fsfla.org/mbox/"},{"id":27671,"url":"https://patchwork.plctlab.org/api/1.2/patches/27671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com/","msgid":"<009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com>","list_archive_url":null,"date":"2022-11-30T08:30:13","name":"rs6000: Fix some issues related to Power10 fusion [PR104024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com/mbox/"},{"id":27672,"url":"https://patchwork.plctlab.org/api/1.2/patches/27672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbef44d3-fc72-ca13-d29c-2635e8b9d7b1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T08:30:44","name":"[v2] predict: Adjust optimize_function_for_size_p [PR105818]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbef44d3-fc72-ca13-d29c-2635e8b9d7b1@linux.ibm.com/mbox/"},{"id":27674,"url":"https://patchwork.plctlab.org/api/1.2/patches/27674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130083717.14438-1-gaofei@eswincomputing.com/","msgid":"<20221130083717.14438-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-30T08:37:17","name":"RISC-V: optimize stack manipulation in save-restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130083717.14438-1-gaofei@eswincomputing.com/mbox/"},{"id":27706,"url":"https://patchwork.plctlab.org/api/1.2/patches/27706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4cmlqFFMt3p7Nz8@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-30T09:47:02","name":"tree-chrec: Fix up ICE on pointer multiplication [PR107835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4cmlqFFMt3p7Nz8@tucnak/mbox/"},{"id":27708,"url":"https://patchwork.plctlab.org/api/1.2/patches/27708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4co5oszzPoXjjkU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-30T09:56:54","name":"c-family: Account for integral promotions of left shifts for -Wshift-overflow warning [PR107846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4co5oszzPoXjjkU@tucnak/mbox/"},{"id":27740,"url":"https://patchwork.plctlab.org/api/1.2/patches/27740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130110030.9E7981331F@imap2.suse-dmz.suse.de/","msgid":"<20221130110030.9E7981331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:00:30","name":"tree-optimization/107919 - uninit diagnostic predicate simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130110030.9E7981331F@imap2.suse-dmz.suse.de/mbox/"},{"id":27760,"url":"https://patchwork.plctlab.org/api/1.2/patches/27760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115247.C39A113A70@imap2.suse-dmz.suse.de/","msgid":"<20221130115247.C39A113A70@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:52:47","name":"Improve uninit diagnostic dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115247.C39A113A70@imap2.suse-dmz.suse.de/mbox/"},{"id":27761,"url":"https://patchwork.plctlab.org/api/1.2/patches/27761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115302.8394013A70@imap2.suse-dmz.suse.de/","msgid":"<20221130115302.8394013A70@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:53:02","name":"tree-optimization/107919 - predicate simplification in uninit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115302.8394013A70@imap2.suse-dmz.suse.de/mbox/"},{"id":27773,"url":"https://patchwork.plctlab.org/api/1.2/patches/27773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com/","msgid":"<8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-11-30T12:44:26","name":"[1/7] OpenMP/OpenACC: Refine condition for when map clause expansion happens","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com/mbox/"},{"id":27774,"url":"https://patchwork.plctlab.org/api/1.2/patches/27774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f32cb0d7aa424d6fcfbeeb75987bf1101de520d1.1669808721.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T12:44:27","name":"[2/2] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f32cb0d7aa424d6fcfbeeb75987bf1101de520d1.1669808721.git.julian@codesourcery.com/mbox/"},{"id":27804,"url":"https://patchwork.plctlab.org/api/1.2/patches/27804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz/","msgid":"<13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz>","list_archive_url":null,"date":"2022-11-30T13:47:39","name":"[(pushed)] fix Clang warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/mbox/"},{"id":11,"url":"https://patchwork.plctlab.org/api/1.2/bundles/11/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-12/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-12","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":27857,"url":"https://patchwork.plctlab.org/api/1.2/patches/27857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e929111e-d5f2-8ed3-c3ec-f1280615d8fc@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T15:32:06","name":"[OG12] amdgcn: Support AMD-specific '\''isa'\'' and '\''arch'\'' traits in OpenMP context selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e929111e-d5f2-8ed3-c3ec-f1280615d8fc@codesourcery.com/mbox/"},{"id":27918,"url":"https://patchwork.plctlab.org/api/1.2/patches/27918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130171314.323962-1-ibuclaw@gdcproject.org/","msgid":"<20221130171314.323962-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T17:13:14","name":"[committed] d: Fix ICE on named continue label in an unrolled loop [PR107592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130171314.323962-1-ibuclaw@gdcproject.org/mbox/"},{"id":27919,"url":"https://patchwork.plctlab.org/api/1.2/patches/27919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-1-git-send-email-apinski@marvell.com/","msgid":"<1669828695-18532-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-30T17:18:14","name":"[1/2] Fix C/107926: Wrong error message when initializing char array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-1-git-send-email-apinski@marvell.com/mbox/"},{"id":27920,"url":"https://patchwork.plctlab.org/api/1.2/patches/27920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-2-git-send-email-apinski@marvell.com/","msgid":"<1669828695-18532-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-30T17:18:15","name":"[2/2] Improve error message for excess elements in array initializer from {\"a\"}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-2-git-send-email-apinski@marvell.com/mbox/"},{"id":27948,"url":"https://patchwork.plctlab.org/api/1.2/patches/27948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130181625.2011166-1-adhemerval.zanella@linaro.org/","msgid":"<20221130181625.2011166-1-adhemerval.zanella@linaro.org>","list_archive_url":null,"date":"2022-11-30T18:16:25","name":"longlong.h: Do no use asm input cast for clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130181625.2011166-1-adhemerval.zanella@linaro.org/mbox/"},{"id":27957,"url":"https://patchwork.plctlab.org/api/1.2/patches/27957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4el43pq83ixCe/N@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-30T18:50:11","name":"[committed] hppa: Fix addvdi3 and subvdi3 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4el43pq83ixCe/N@mx3210.localdomain/mbox/"},{"id":28019,"url":"https://patchwork.plctlab.org/api/1.2/patches/28019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213115.539282-1-ibuclaw@gdcproject.org/","msgid":"<20221130213115.539282-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:31:15","name":"[GCC-12,committed] d: Fix #error You must define PREFERRED_DEBUGGING_TYPE if DWARF is not supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213115.539282-1-ibuclaw@gdcproject.org/mbox/"},{"id":28020,"url":"https://patchwork.plctlab.org/api/1.2/patches/28020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213727.545475-1-ibuclaw@gdcproject.org/","msgid":"<20221130213727.545475-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:37:27","name":"[committed] d: Synchronize gdc documentation with options in d/lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213727.545475-1-ibuclaw@gdcproject.org/mbox/"},{"id":28021,"url":"https://patchwork.plctlab.org/api/1.2/patches/28021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213949.547614-1-ibuclaw@gdcproject.org/","msgid":"<20221130213949.547614-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:39:49","name":"[committed] d: Separate documentation indices into options and keywords.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213949.547614-1-ibuclaw@gdcproject.org/mbox/"},{"id":28022,"url":"https://patchwork.plctlab.org/api/1.2/patches/28022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214234.550547-1-ibuclaw@gdcproject.org/","msgid":"<20221130214234.550547-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:42:34","name":"[committed] d: Update recipes for building html and pdf documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214234.550547-1-ibuclaw@gdcproject.org/mbox/"},{"id":28024,"url":"https://patchwork.plctlab.org/api/1.2/patches/28024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214812.554893-1-ibuclaw@gdcproject.org/","msgid":"<20221130214812.554893-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:48:12","name":"[committed] d: Add language reference section to documentation files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214812.554893-1-ibuclaw@gdcproject.org/mbox/"},{"id":28128,"url":"https://patchwork.plctlab.org/api/1.2/patches/28128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-1-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:17","name":"[1/3] rs6000: NFC use more readable pattern to clean high 32 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-1-guojiufu@linux.ibm.com/mbox/"},{"id":28129,"url":"https://patchwork.plctlab.org/api/1.2/patches/28129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-2-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:18","name":"[2/3] rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-2-guojiufu@linux.ibm.com/mbox/"},{"id":28130,"url":"https://patchwork.plctlab.org/api/1.2/patches/28130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-3-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:19","name":"[3/3] rs6000: NFC no need copy_rtx in rs6000_emit_set_long_const and rs6000_emit_set_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-3-guojiufu@linux.ibm.com/mbox/"},{"id":28156,"url":"https://patchwork.plctlab.org/api/1.2/patches/28156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201023317.3722715-1-dmalcolm@redhat.com/","msgid":"<20221201023317.3722715-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:33:17","name":"[committed] analyzer: fix ICE on bind/connect with a constant fd [PR107928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201023317.3722715-1-dmalcolm@redhat.com/mbox/"},{"id":28163,"url":"https://patchwork.plctlab.org/api/1.2/patches/28163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-1-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:54","name":"[committed,1/7] analyzer: move bounds checking to a new bounds-checking.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-1-dmalcolm@redhat.com/mbox/"},{"id":28158,"url":"https://patchwork.plctlab.org/api/1.2/patches/28158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-2-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:55","name":"[committed,2/7] analyzer: fix wording of '\''number of bad bytes'\'' note [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-2-dmalcolm@redhat.com/mbox/"},{"id":28159,"url":"https://patchwork.plctlab.org/api/1.2/patches/28159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-3-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:56","name":"[committed,3/7] analyzer: add note about valid subscripts [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-3-dmalcolm@redhat.com/mbox/"},{"id":28161,"url":"https://patchwork.plctlab.org/api/1.2/patches/28161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-4-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:57","name":"[committed,4/7] analyzer: more bounds-checking wording tweaks [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-4-dmalcolm@redhat.com/mbox/"},{"id":28162,"url":"https://patchwork.plctlab.org/api/1.2/patches/28162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-5-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:58","name":"[committed,5/7] diagnostics: tweak diagnostic_path::interprocedural_p [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-5-dmalcolm@redhat.com/mbox/"},{"id":28160,"url":"https://patchwork.plctlab.org/api/1.2/patches/28160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-6-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:59","name":"[committed,6/7] analyzer: unify bounds-checking class hierarchies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-6-dmalcolm@redhat.com/mbox/"},{"id":28164,"url":"https://patchwork.plctlab.org/api/1.2/patches/28164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-7-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:42:00","name":"[committed,7/7] analyzer: fix i18n issues in symbolic out-of-bounds [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-7-dmalcolm@redhat.com/mbox/"},{"id":28168,"url":"https://patchwork.plctlab.org/api/1.2/patches/28168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b2be13be3534681af5a64b8163a3c8c@amazon.com/","msgid":"<3b2be13be3534681af5a64b8163a3c8c@amazon.com>","list_archive_url":null,"date":"2022-12-01T03:04:52","name":"AArch64: Add UNSPECV_PATCHABLE_AREA [PR98776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b2be13be3534681af5a64b8163a3c8c@amazon.com/mbox/"},{"id":28182,"url":"https://patchwork.plctlab.org/api/1.2/patches/28182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201034639.136411-1-jason@redhat.com/","msgid":"<20221201034639.136411-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-01T03:46:39","name":"[pushed] c++: small contracts fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201034639.136411-1-jason@redhat.com/mbox/"},{"id":28187,"url":"https://patchwork.plctlab.org/api/1.2/patches/28187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201043155.9369-1-luolongjuna@gmail.com/","msgid":"<20221201043155.9369-1-luolongjuna@gmail.com>","list_archive_url":null,"date":"2022-12-01T04:31:55","name":"libcpp: suppress builtin macro redefined warnings for __LINE__","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201043155.9369-1-luolongjuna@gmail.com/mbox/"},{"id":28209,"url":"https://patchwork.plctlab.org/api/1.2/patches/28209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201061130.2696537-1-hongtao.liu@intel.com/","msgid":"<20221201061130.2696537-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-01T06:11:30","name":"[x86] Fix ICE due to incorrect insn type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201061130.2696537-1-hongtao.liu@intel.com/mbox/"},{"id":28230,"url":"https://patchwork.plctlab.org/api/1.2/patches/28230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4hhT8kVXen8yOX5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-01T08:09:51","name":"i386: Improve *concat3_{1,2,3,4} patterns [PR107627]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4hhT8kVXen8yOX5@tucnak/mbox/"},{"id":28244,"url":"https://patchwork.plctlab.org/api/1.2/patches/28244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-1-guojiufu@linux.ibm.com/","msgid":"<20221201084754.12959-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T08:47:53","name":"[1/2] rs6000: use lis;xoris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-1-guojiufu@linux.ibm.com/mbox/"},{"id":28245,"url":"https://patchwork.plctlab.org/api/1.2/patches/28245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-2-guojiufu@linux.ibm.com/","msgid":"<20221201084754.12959-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T08:47:54","name":"[2/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-2-guojiufu@linux.ibm.com/mbox/"},{"id":28259,"url":"https://patchwork.plctlab.org/api/1.2/patches/28259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de/","msgid":"<20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-01T09:18:22","name":"tree-optimization/107935 - fixup equivalence handling in PHI VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de/mbox/"},{"id":28273,"url":"https://patchwork.plctlab.org/api/1.2/patches/28273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz/","msgid":"<74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz>","list_archive_url":null,"date":"2022-12-01T09:33:56","name":"gcc: remove incpath.o from CXX_C_OBJS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz/mbox/"},{"id":28275,"url":"https://patchwork.plctlab.org/api/1.2/patches/28275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201095335.355711320E@imap1.suse-dmz.suse.de/","msgid":"<20221201095335.355711320E@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-01T09:53:34","name":"tree-optimization/107937 - uninit predicate simplification fixup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201095335.355711320E@imap1.suse-dmz.suse.de/mbox/"},{"id":28282,"url":"https://patchwork.plctlab.org/api/1.2/patches/28282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4208860-1af9-6c47-6109-5c2fe4c9d444@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-01T09:59:07","name":"IPA: do not release body if still needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4208860-1af9-6c47-6109-5c2fe4c9d444@suse.cz/mbox/"},{"id":28288,"url":"https://patchwork.plctlab.org/api/1.2/patches/28288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-2-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:30","name":"[1/3] RISC-V: add a new parameter in riscv_first_stack_step.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-2-gaofei@eswincomputing.com/mbox/"},{"id":28287,"url":"https://patchwork.plctlab.org/api/1.2/patches/28287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-3-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:31","name":"[2/3] RISC-V: optimize stack manipulation in save-restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-3-gaofei@eswincomputing.com/mbox/"},{"id":28289,"url":"https://patchwork.plctlab.org/api/1.2/patches/28289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-4-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:32","name":"[3/3] RISC-V: make the stack manipulation codes more readable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-4-gaofei@eswincomputing.com/mbox/"},{"id":28295,"url":"https://patchwork.plctlab.org/api/1.2/patches/28295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4iCpoNWlMFJF4T5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-01T10:32:06","name":"c++, v2: Incremental fix for g++.dg/gomp/for-21.C [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4iCpoNWlMFJF4T5@tucnak/mbox/"},{"id":28377,"url":"https://patchwork.plctlab.org/api/1.2/patches/28377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201134316.3506324-1-christophe.lyon@arm.com/","msgid":"<20221201134316.3506324-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-12-01T13:43:16","name":"[committed] arm: Fix MVE testsuite fallouts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201134316.3506324-1-christophe.lyon@arm.com/mbox/"},{"id":28382,"url":"https://patchwork.plctlab.org/api/1.2/patches/28382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135505.457877-1-poulhies@adacore.com/","msgid":"<20221201135505.457877-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:05","name":"[COMMITTED] ada: Minor updates to gnat/doc configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135505.457877-1-poulhies@adacore.com/mbox/"},{"id":28384,"url":"https://patchwork.plctlab.org/api/1.2/patches/28384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135522.457972-1-poulhies@adacore.com/","msgid":"<20221201135522.457972-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:22","name":"[COMMITTED] ada: Fix minor issues in reference manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135522.457972-1-poulhies@adacore.com/mbox/"},{"id":28386,"url":"https://patchwork.plctlab.org/api/1.2/patches/28386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135532.458039-1-poulhies@adacore.com/","msgid":"<20221201135532.458039-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:32","name":"[COMMITTED] ada: Use the address type of a Storage_Model_Type for '\''Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135532.458039-1-poulhies@adacore.com/mbox/"},{"id":28385,"url":"https://patchwork.plctlab.org/api/1.2/patches/28385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135537.458104-1-poulhies@adacore.com/","msgid":"<20221201135537.458104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:37","name":"[COMMITTED] ada: Fix misphrasing in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135537.458104-1-poulhies@adacore.com/mbox/"},{"id":28387,"url":"https://patchwork.plctlab.org/api/1.2/patches/28387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135544.458168-1-poulhies@adacore.com/","msgid":"<20221201135544.458168-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:44","name":"[COMMITTED] ada: Further adjustments to User'\''s Guide for PIE default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135544.458168-1-poulhies@adacore.com/mbox/"},{"id":28388,"url":"https://patchwork.plctlab.org/api/1.2/patches/28388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135550.458256-1-poulhies@adacore.com/","msgid":"<20221201135550.458256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:50","name":"[COMMITTED] ada: Enforce Aggregate aspect legality rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135550.458256-1-poulhies@adacore.com/mbox/"},{"id":28389,"url":"https://patchwork.plctlab.org/api/1.2/patches/28389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135556.458319-1-poulhies@adacore.com/","msgid":"<20221201135556.458319-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:56","name":"[COMMITTED] ada: Strip conversions for the implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135556.458319-1-poulhies@adacore.com/mbox/"},{"id":28408,"url":"https://patchwork.plctlab.org/api/1.2/patches/28408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201142235.GA12562@ldh-imac.local/","msgid":"<20221201142235.GA12562@ldh-imac.local>","list_archive_url":null,"date":"2022-12-01T14:22:35","name":"Ping^3: [PATCH] libcpp: Improve location for macro names [PR66290]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201142235.GA12562@ldh-imac.local/mbox/"},{"id":28409,"url":"https://patchwork.plctlab.org/api/1.2/patches/28409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3b7e809-537d-c2f0-c02d-b1050967edbd@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T14:35:34","name":"amdgcn: Add preprocessor builtins for every processor type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3b7e809-537d-c2f0-c02d-b1050967edbd@codesourcery.com/mbox/"},{"id":28426,"url":"https://patchwork.plctlab.org/api/1.2/patches/28426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4jJSkO6Ccew5OjL@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T15:33:30","name":"varasm: Fix type confusion bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4jJSkO6Ccew5OjL@arm.com/mbox/"},{"id":28454,"url":"https://patchwork.plctlab.org/api/1.2/patches/28454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201163752.2176490-1-ppalka@redhat.com/","msgid":"<20221201163752.2176490-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-01T16:37:52","name":"c++: explicit spec of constrained member tmpl [PR107522]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201163752.2176490-1-ppalka@redhat.com/mbox/"},{"id":28457,"url":"https://patchwork.plctlab.org/api/1.2/patches/28457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201165051.51853-1-jason@redhat.com/","msgid":"<20221201165051.51853-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-01T16:50:51","name":"[RFA] driver: fix validate_switches logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201165051.51853-1-jason@redhat.com/mbox/"},{"id":28458,"url":"https://patchwork.plctlab.org/api/1.2/patches/28458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898282DA41F5944167126D7883149@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T16:55:16","name":"libgcc: Fix uninitialized RA signing on AArch64 [PR107678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898282DA41F5944167126D7883149@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":28502,"url":"https://patchwork.plctlab.org/api/1.2/patches/28502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ca1641-f2b7-d9d2-6740-2c3fdf007bb5@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T18:19:47","name":"arm: Split up MVE _Generic associations to prevent type clashes [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ca1641-f2b7-d9d2-6740-2c3fdf007bb5@arm.com/mbox/"},{"id":28547,"url":"https://patchwork.plctlab.org/api/1.2/patches/28547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-36a140f9-17a0-4d3d-8a78-f2ae946960cb-1669926330700@3c-app-gmx-bs60/","msgid":"","list_archive_url":null,"date":"2022-12-01T20:25:30","name":"Fortran: error recovery simplifying UNPACK for insufficient FIELD [PR107922]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-36a140f9-17a0-4d3d-8a78-f2ae946960cb-1669926330700@3c-app-gmx-bs60/mbox/"},{"id":28551,"url":"https://patchwork.plctlab.org/api/1.2/patches/28551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201205702.2822213-1-ppalka@redhat.com/","msgid":"<20221201205702.2822213-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-01T20:57:02","name":"c++: comptypes ICE with BOUND_TEMPLATE_TEMPLATE_PARMs [PR107539]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201205702.2822213-1-ppalka@redhat.com/mbox/"},{"id":28664,"url":"https://patchwork.plctlab.org/api/1.2/patches/28664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023541.3778122-1-dmalcolm@redhat.com/","msgid":"<20221202023541.3778122-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T02:35:41","name":"[committed] analyzer: add test coverage for string ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023541.3778122-1-dmalcolm@redhat.com/mbox/"},{"id":28665,"url":"https://patchwork.plctlab.org/api/1.2/patches/28665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023554.3778168-1-dmalcolm@redhat.com/","msgid":"<20221202023554.3778168-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T02:35:54","name":"[committed] analyzer: handle comparisons against negated symbolic values [PR107948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023554.3778168-1-dmalcolm@redhat.com/mbox/"},{"id":28702,"url":"https://patchwork.plctlab.org/api/1.2/patches/28702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202042606.551350-1-hongtao.liu@intel.com/","msgid":"<20221202042606.551350-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-02T04:26:05","name":"[x86] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202042606.551350-1-hongtao.liu@intel.com/mbox/"},{"id":28726,"url":"https://patchwork.plctlab.org/api/1.2/patches/28726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a63fac98-4737-3f8d-44d9-92874ed814d6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T07:03:46","name":"[v5,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a63fac98-4737-3f8d-44d9-92874ed814d6@linux.ibm.com/mbox/"},{"id":28725,"url":"https://patchwork.plctlab.org/api/1.2/patches/28725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202070401.A01F6133DE@imap1.suse-dmz.suse.de/","msgid":"<20221202070401.A01F6133DE@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-02T07:04:01","name":"Add --param max-unswitch-depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202070401.A01F6133DE@imap1.suse-dmz.suse.de/mbox/"},{"id":28730,"url":"https://patchwork.plctlab.org/api/1.2/patches/28730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnaLY=sigq_+fXpBZ++UpEw4AD_XdNL4H-1Gy4Knp+cAw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T07:21:37","name":"[aarch64] PR107920 - Fix incorrect handling of virtual operands in svld1rq_impl::fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnaLY=sigq_+fXpBZ++UpEw4AD_XdNL4H-1Gy4Knp+cAw@mail.gmail.com/mbox/"},{"id":28800,"url":"https://patchwork.plctlab.org/api/1.2/patches/28800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yeuyxdv.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:21:00","name":"[testsuite,riscv] uninit-pred-9_b bogus warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yeuyxdv.fsf@lxoliva.fsfla.org/mbox/"},{"id":28802,"url":"https://patchwork.plctlab.org/api/1.2/patches/28802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qpiyx9a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:23:45","name":"[testsuite,riscv] skip ssa-sink-18.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qpiyx9a.fsf@lxoliva.fsfla.org/mbox/"},{"id":28812,"url":"https://patchwork.plctlab.org/api/1.2/patches/28812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn7axilx.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:25:30","name":"[testsuite,arm/aarch64] -fno-short-enums for auto-init-[12].c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn7axilx.fsf@lxoliva.fsfla.org/mbox/"},{"id":28816,"url":"https://patchwork.plctlab.org/api/1.2/patches/28816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfhyxik0.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:26:39","name":"[PR42093,arm,thumb2] disable tree-dce for test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfhyxik0.fsf@lxoliva.fsfla.org/mbox/"},{"id":28820,"url":"https://patchwork.plctlab.org/api/1.2/patches/28820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7smxieq.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:29:49","name":"[PR40457,arm] expand SI-aligned movdi into pair of movsi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7smxieq.fsf@lxoliva.fsfla.org/mbox/"},{"id":28821,"url":"https://patchwork.plctlab.org/api/1.2/patches/28821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork03axi6x.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:34:30","name":"[arm] xfail fp-uint64-convert-double tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork03axi6x.fsf@lxoliva.fsfla.org/mbox/"},{"id":28824,"url":"https://patchwork.plctlab.org/api/1.2/patches/28824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4nH2qqDl0WFBiYS@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:39:38","name":"i386: Save/restore recog_data in ix86_vector_duplicate_value [PR106577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4nH2qqDl0WFBiYS@tucnak/mbox/"},{"id":28831,"url":"https://patchwork.plctlab.org/api/1.2/patches/28831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsdyxhoy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:45:17","name":"[gcc-12,PR104308,analyzer] handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsdyxhoy.fsf@lxoliva.fsfla.org/mbox/"},{"id":28871,"url":"https://patchwork.plctlab.org/api/1.2/patches/28871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c210778d-e7d8-5d00-7255-329f7dfec052@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-02T11:27:29","name":"ipa: silent -Wodr notes with -w","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c210778d-e7d8-5d00-7255-329f7dfec052@suse.cz/mbox/"},{"id":28874,"url":"https://patchwork.plctlab.org/api/1.2/patches/28874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz/","msgid":"<332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz>","list_archive_url":null,"date":"2022-12-02T11:38:37","name":"[(pushed)] gcc: regenerate configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz/mbox/"},{"id":28891,"url":"https://patchwork.plctlab.org/api/1.2/patches/28891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-2-thomas@codesourcery.com/","msgid":"<20221202120315.803120-2-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:07","name":"[1/9] nvptx: Re-enable '\''gcc.c-torture/compile/20080721-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-2-thomas@codesourcery.com/mbox/"},{"id":28890,"url":"https://patchwork.plctlab.org/api/1.2/patches/28890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-3-thomas@codesourcery.com/","msgid":"<20221202120315.803120-3-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:08","name":"[2/9] nvptx: Re-enable \"ptxas times out\" test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-3-thomas@codesourcery.com/mbox/"},{"id":28893,"url":"https://patchwork.plctlab.org/api/1.2/patches/28893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-4-thomas@codesourcery.com/","msgid":"<20221202120315.803120-4-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:09","name":"[3/9] nvptx: Re-enable test cases by removing effective target '\''freestanding'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-4-thomas@codesourcery.com/mbox/"},{"id":28894,"url":"https://patchwork.plctlab.org/api/1.2/patches/28894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-5-thomas@codesourcery.com/","msgid":"<20221202120315.803120-5-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:10","name":"[4/9] nvptx: Re-enable all variants of '\''gcc.c-torture/execute/20020529-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-5-thomas@codesourcery.com/mbox/"},{"id":28896,"url":"https://patchwork.plctlab.org/api/1.2/patches/28896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-6-thomas@codesourcery.com/","msgid":"<20221202120315.803120-6-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:11","name":"[5/9] nvptx: Re-enable '\''gcc.dg/special/weak-2.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-6-thomas@codesourcery.com/mbox/"},{"id":28898,"url":"https://patchwork.plctlab.org/api/1.2/patches/28898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-7-thomas@codesourcery.com/","msgid":"<20221202120315.803120-7-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:12","name":"[6/9] nvptx: Re-enable all variants of '\''c-c++-common/torture/complex-sign-mixed-add.c'\'', '\''c-c++-common/torture/complex-sign-mixed-sub.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-7-thomas@codesourcery.com/mbox/"},{"id":28892,"url":"https://patchwork.plctlab.org/api/1.2/patches/28892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-8-thomas@codesourcery.com/","msgid":"<20221202120315.803120-8-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:13","name":"[7/9] nvptx: Re-enable '\''gcc.dg/torture/c99-contract-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-8-thomas@codesourcery.com/mbox/"},{"id":28897,"url":"https://patchwork.plctlab.org/api/1.2/patches/28897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-9-thomas@codesourcery.com/","msgid":"<20221202120315.803120-9-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:14","name":"[8/9] nvptx: Re-enable \"Stack alignment causes use of alloca\" test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-9-thomas@codesourcery.com/mbox/"},{"id":28899,"url":"https://patchwork.plctlab.org/api/1.2/patches/28899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-10-thomas@codesourcery.com/","msgid":"<20221202120315.803120-10-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:15","name":"[9/9] nvptx: Re-enable '\''gcc.misc-tests/options.exp'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-10-thomas@codesourcery.com/mbox/"},{"id":28912,"url":"https://patchwork.plctlab.org/api/1.2/patches/28912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c654090-4263-a2f5-3651-312694a8f786@redhat.com/","msgid":"<1c654090-4263-a2f5-3651-312694a8f786@redhat.com>","list_archive_url":null,"date":"2022-12-02T13:30:32","name":"[committed,PR106462] LRA: Check hard reg availability of pseudo and its subreg for pseudo reload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c654090-4263-a2f5-3651-312694a8f786@redhat.com/mbox/"},{"id":28913,"url":"https://patchwork.plctlab.org/api/1.2/patches/28913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-12-02T13:35:35","name":"nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":28925,"url":"https://patchwork.plctlab.org/api/1.2/patches/28925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbc8f41c-fe12-b7af-c906-e19f1ce1224e@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T14:12:23","name":"Fix a few incorrect accesses.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbc8f41c-fe12-b7af-c906-e19f1ce1224e@redhat.com/mbox/"},{"id":28928,"url":"https://patchwork.plctlab.org/api/1.2/patches/28928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202143055.46CE813644@imap1.suse-dmz.suse.de/","msgid":"<20221202143055.46CE813644@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-02T14:30:54","name":"tree-optimization/107833 - invariant motion of uninit uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202143055.46CE813644@imap1.suse-dmz.suse.de/mbox/"},{"id":28944,"url":"https://patchwork.plctlab.org/api/1.2/patches/28944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202154512.310755-1-jason@redhat.com/","msgid":"<20221202154512.310755-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-02T15:45:12","name":"[RFA(tree)] c++: source position of lambda captures [PR84471]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202154512.310755-1-jason@redhat.com/mbox/"},{"id":29050,"url":"https://patchwork.plctlab.org/api/1.2/patches/29050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-2-cupertino.miranda@oracle.com/","msgid":"<20221202175225.2780-2-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2022-12-02T17:52:24","name":"[1/2] select .rodata for const volatile variables.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-2-cupertino.miranda@oracle.com/mbox/"},{"id":29049,"url":"https://patchwork.plctlab.org/api/1.2/patches/29049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-3-cupertino.miranda@oracle.com/","msgid":"<20221202175225.2780-3-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2022-12-02T17:52:25","name":"[2/2] Corrected pr25521.c target matching.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-3-cupertino.miranda@oracle.com/mbox/"},{"id":29082,"url":"https://patchwork.plctlab.org/api/1.2/patches/29082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202190110.3491914-1-ppalka@redhat.com/","msgid":"<20221202190110.3491914-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:01:10","name":"c++: substituting CONST_DECL_USING_P enumerator [PR103081]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202190110.3491914-1-ppalka@redhat.com/mbox/"},{"id":29086,"url":"https://patchwork.plctlab.org/api/1.2/patches/29086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202191104.3812885-1-dmalcolm@redhat.com/","msgid":"<20221202191104.3812885-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:11:04","name":"[trunk,PR104308,analyzer] handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202191104.3812885-1-dmalcolm@redhat.com/mbox/"},{"id":29091,"url":"https://patchwork.plctlab.org/api/1.2/patches/29091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202194228.3794597-1-ppalka@redhat.com/","msgid":"<20221202194228.3794597-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:42:28","name":"c++: unexpanded pack in requires-expr parm list [PR107417]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202194228.3794597-1-ppalka@redhat.com/mbox/"},{"id":29094,"url":"https://patchwork.plctlab.org/api/1.2/patches/29094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202202526.10504-1-iain@sandoe.co.uk/","msgid":"<20221202202526.10504-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-02T20:25:26","name":"coroutines: Do not promote temporaries that will be elided.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202202526.10504-1-iain@sandoe.co.uk/mbox/"},{"id":29115,"url":"https://patchwork.plctlab.org/api/1.2/patches/29115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213552.3820428-1-dmalcolm@redhat.com/","msgid":"<20221202213552.3820428-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T21:35:52","name":"[committed] analyzer: fixes to region creation messages [PR107851]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213552.3820428-1-dmalcolm@redhat.com/mbox/"},{"id":29116,"url":"https://patchwork.plctlab.org/api/1.2/patches/29116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213608.3820488-1-dmalcolm@redhat.com/","msgid":"<20221202213608.3820488-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T21:36:08","name":"[committed] analyzer: introduce struct event_loc_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213608.3820488-1-dmalcolm@redhat.com/mbox/"},{"id":29152,"url":"https://patchwork.plctlab.org/api/1.2/patches/29152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4qRJUvlu1VoykA9@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T23:58:29","name":"[v3] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4qRJUvlu1VoykA9@redhat.com/mbox/"},{"id":29244,"url":"https://patchwork.plctlab.org/api/1.2/patches/29244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora644ykc0.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-03T08:15:11","name":"[PR102706,testsuite] -Wno-stringop-overflow vs Warray-bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora644ykc0.fsf@lxoliva.fsfla.org/mbox/"},{"id":29298,"url":"https://patchwork.plctlab.org/api/1.2/patches/29298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-76ab7545-a0b1-4fc6-9950-b47d9d13742d-1670092066726@3c-app-gmx-bs55/","msgid":"","list_archive_url":null,"date":"2022-12-03T18:27:46","name":"Fortran: error recovery handling invalid CLASS variable [PR107899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-76ab7545-a0b1-4fc6-9950-b47d9d13742d-1670092066726@3c-app-gmx-bs55/mbox/"},{"id":29300,"url":"https://patchwork.plctlab.org/api/1.2/patches/29300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/XEXAtikg5eNPBqsrJ2I9FS_DwVIKh3rZJRFUzbmyPpe_IpbJ96NXOpTQtdtsODI3NlnvaMQ5HV2VYrvXEE5UPByJTtIcDlISwnXW13PetJk=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-12-03T19:34:42","name":"Ping: [PATCH] jit: Install jit headers in $(libsubincludedir) [PR 101491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/XEXAtikg5eNPBqsrJ2I9FS_DwVIKh3rZJRFUzbmyPpe_IpbJ96NXOpTQtdtsODI3NlnvaMQ5HV2VYrvXEE5UPByJTtIcDlISwnXW13PetJk=@lorenzosalvadore.it/mbox/"},{"id":29340,"url":"https://patchwork.plctlab.org/api/1.2/patches/29340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a9bb8ff-dfa7-4a63-b4cf-99b4c9fe1d74-1670099062157@3c-app-gmx-bs13/","msgid":"","list_archive_url":null,"date":"2022-12-03T20:24:22","name":"Fortran: fix typo in documentation of intrinsic FLOOR [PR107870]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a9bb8ff-dfa7-4a63-b4cf-99b4c9fe1d74-1670099062157@3c-app-gmx-bs13/mbox/"},{"id":29398,"url":"https://patchwork.plctlab.org/api/1.2/patches/29398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204104437.32069-1-iain@sandoe.co.uk/","msgid":"<20221204104437.32069-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T10:44:37","name":"[pushed] libsanitizer, Darwin: Restrict build to Darwin 16 or newer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204104437.32069-1-iain@sandoe.co.uk/mbox/"},{"id":29403,"url":"https://patchwork.plctlab.org/api/1.2/patches/29403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204105345.33234-1-iain@sandoe.co.uk/","msgid":"<20221204105345.33234-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T10:53:45","name":"[pushed] libstdc++, Darwin: Fix weak attribute to use __weak__ instead of weak.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204105345.33234-1-iain@sandoe.co.uk/mbox/"},{"id":29405,"url":"https://patchwork.plctlab.org/api/1.2/patches/29405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204110815.34872-1-iain@sandoe.co.uk/","msgid":"<20221204110815.34872-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T11:08:15","name":"libstdc++, Darwin: Limit recursive mutex init to OS versions needing it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204110815.34872-1-iain@sandoe.co.uk/mbox/"},{"id":29412,"url":"https://patchwork.plctlab.org/api/1.2/patches/29412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204115150.35508-1-iain@sandoe.co.uk/","msgid":"<20221204115150.35508-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T11:51:50","name":"testsuite, X86, Darwin: Fix bf16 ABI tests for Mach-O/macOS ABI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204115150.35508-1-iain@sandoe.co.uk/mbox/"},{"id":29425,"url":"https://patchwork.plctlab.org/api/1.2/patches/29425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204163047.72124-1-iain@sandoe.co.uk/","msgid":"<20221204163047.72124-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T16:30:47","name":"c++, driver: Fix -static-libstdc++ for targets without Bstatic/dynamic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204163047.72124-1-iain@sandoe.co.uk/mbox/"},{"id":29482,"url":"https://patchwork.plctlab.org/api/1.2/patches/29482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-12-05T01:40:38","name":"[v3] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":29503,"url":"https://patchwork.plctlab.org/api/1.2/patches/29503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/905c34de-6333-1021-05e6-942922918b18@linux.ibm.com/","msgid":"<905c34de-6333-1021-05e6-942922918b18@linux.ibm.com>","list_archive_url":null,"date":"2022-12-05T03:07:56","name":"[v2] Return a NULL rtx when targets don'\''t support cbranchcc4 or predicate check fails in prepare_cmp_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/905c34de-6333-1021-05e6-942922918b18@linux.ibm.com/mbox/"},{"id":29519,"url":"https://patchwork.plctlab.org/api/1.2/patches/29519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042101.4144757-1-ppalka@redhat.com/","msgid":"<20221205042101.4144757-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-05T04:21:01","name":"tree, c++: declare some basic functions inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042101.4144757-1-ppalka@redhat.com/mbox/"},{"id":29520,"url":"https://patchwork.plctlab.org/api/1.2/patches/29520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042109.4144777-1-ppalka@redhat.com/","msgid":"<20221205042109.4144777-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-05T04:21:09","name":"tree, c++: optimize walk_tree_1 and cp_walk_subtrees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042109.4144777-1-ppalka@redhat.com/mbox/"},{"id":29589,"url":"https://patchwork.plctlab.org/api/1.2/patches/29589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205081117.B59B11348F@imap1.suse-dmz.suse.de/","msgid":"<20221205081117.B59B11348F@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T08:11:17","name":"tree-optimization/107956 - ICE with NULL call LHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205081117.B59B11348F@imap1.suse-dmz.suse.de/mbox/"},{"id":29592,"url":"https://patchwork.plctlab.org/api/1.2/patches/29592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de/","msgid":"<20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T08:21:42","name":"plugins/107964 - install contracts.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de/mbox/"},{"id":29632,"url":"https://patchwork.plctlab.org/api/1.2/patches/29632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43H+LkdiDQjILIU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T10:29:12","name":"match.pd: Don'\''t fold nan < x etc. for -ftrapping-math [PR106805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43H+LkdiDQjILIU@tucnak/mbox/"},{"id":29659,"url":"https://patchwork.plctlab.org/api/1.2/patches/29659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43dD0/eSrUNx/8Z@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T11:59:11","name":"range-op-float: Improve multiplication reverse operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43dD0/eSrUNx/8Z@tucnak/mbox/"},{"id":29680,"url":"https://patchwork.plctlab.org/api/1.2/patches/29680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205134349.1730053-1-joakim@nohlgard.se/","msgid":"<20221205134349.1730053-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-12-05T13:43:49","name":"[v2] gcc: Use ld -r when checking for HAVE_LD_RO_RW_SECTION_MIXING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205134349.1730053-1-joakim@nohlgard.se/mbox/"},{"id":29696,"url":"https://patchwork.plctlab.org/api/1.2/patches/29696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205135531.BBAC513326@imap1.suse-dmz.suse.de/","msgid":"<20221205135531.BBAC513326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T13:55:31","name":"tree-optimization/106868 - bogus -Wdangling-pointer diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205135531.BBAC513326@imap1.suse-dmz.suse.de/mbox/"},{"id":29699,"url":"https://patchwork.plctlab.org/api/1.2/patches/29699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205142850.969850-1-siddhesh@gotplt.org/","msgid":"<20221205142850.969850-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-05T14:28:50","name":"testsuite: Fix leaks in tree-dynamic-object-size-0.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205142850.969850-1-siddhesh@gotplt.org/mbox/"},{"id":29735,"url":"https://patchwork.plctlab.org/api/1.2/patches/29735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y44PYa8n3RkNIfCn@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T15:33:53","name":"range-op-float: Improve binary reverse operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y44PYa8n3RkNIfCn@tucnak/mbox/"},{"id":29736,"url":"https://patchwork.plctlab.org/api/1.2/patches/29736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205153955.5F6A813326@imap1.suse-dmz.suse.de/","msgid":"<20221205153955.5F6A813326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T15:39:55","name":"middle-end/40635 - SSA update losing PHI arg loations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205153955.5F6A813326@imap1.suse-dmz.suse.de/mbox/"},{"id":29977,"url":"https://patchwork.plctlab.org/api/1.2/patches/29977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y446AHZfl9DZFrdx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T18:35:46","name":"range-op-float: Fix up ICE in lower_bound [PR107975]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y446AHZfl9DZFrdx@tucnak/mbox/"},{"id":30086,"url":"https://patchwork.plctlab.org/api/1.2/patches/30086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f321ea49-6adb-7f28-aa98-13168b961e3c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-06T05:44:49","name":"[v3,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f321ea49-6adb-7f28-aa98-13168b961e3c@linux.ibm.com/mbox/"},{"id":30111,"url":"https://patchwork.plctlab.org/api/1.2/patches/30111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206072340.C862C13326@imap1.suse-dmz.suse.de/","msgid":"<20221206072340.C862C13326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-06T07:23:40","name":"tree-optimization/104165 - bougs -Warray-bounds, add testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206072340.C862C13326@imap1.suse-dmz.suse.de/mbox/"},{"id":30115,"url":"https://patchwork.plctlab.org/api/1.2/patches/30115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com/","msgid":"<0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com>","list_archive_url":null,"date":"2022-12-06T07:45:07","name":"libgomp: Handle OpenMP'\''s reverse offloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com/mbox/"},{"id":30123,"url":"https://patchwork.plctlab.org/api/1.2/patches/30123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206080623.1879920-1-hongtao.liu@intel.com/","msgid":"<20221206080623.1879920-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-06T08:06:23","name":"[x86] Fix ICE due to condition mismatch between expander and define_insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206080623.1879920-1-hongtao.liu@intel.com/mbox/"},{"id":30144,"url":"https://patchwork.plctlab.org/api/1.2/patches/30144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b83d284d-c789-1e4a-f2c2-e06e2e6878fd@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-06T08:53:47","name":"[committed] libgomp.texi: Fix a OpenMP 5.2 and a TR11 impl-status item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b83d284d-c789-1e4a-f2c2-e06e2e6878fd@codesourcery.com/mbox/"},{"id":30146,"url":"https://patchwork.plctlab.org/api/1.2/patches/30146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com/","msgid":"<4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com>","list_archive_url":null,"date":"2022-12-06T08:59:17","name":"[wwwdocs] gcc-13/changes.html + projects/gomp: OpenMP GCC 13 update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com/mbox/"},{"id":30150,"url":"https://patchwork.plctlab.org/api/1.2/patches/30150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206091153.27281-2-wangfeng@eswincomputing.com/","msgid":"<20221206091153.27281-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2022-12-06T09:11:53","name":"[v2,1/1] RISC-V: Optimze the reverse conditions of rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206091153.27281-2-wangfeng@eswincomputing.com/mbox/"},{"id":30183,"url":"https://patchwork.plctlab.org/api/1.2/patches/30183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206095020.A865B13326@imap1.suse-dmz.suse.de/","msgid":"<20221206095020.A865B13326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-06T09:50:20","name":"tree-optimization/104475 - improve access diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206095020.A865B13326@imap1.suse-dmz.suse.de/mbox/"},{"id":30184,"url":"https://patchwork.plctlab.org/api/1.2/patches/30184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48S1d7kqcbRhfJ3@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:00:53","name":"Zen4 tuning part 1 - cost tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48S1d7kqcbRhfJ3@kam.mff.cuni.cz/mbox/"},{"id":30185,"url":"https://patchwork.plctlab.org/api/1.2/patches/30185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-2-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:33","name":"[Rust,front-end,v4,01/46] Use DW_ATE_UTF for the Rust '\''char'\'' type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-2-arthur.cohen@embecosm.com/mbox/"},{"id":30186,"url":"https://patchwork.plctlab.org/api/1.2/patches/30186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-3-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:34","name":"[Rust,front-end,v4,02/46] gccrs: Add necessary hooks for a Rust front-end testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-3-arthur.cohen@embecosm.com/mbox/"},{"id":30187,"url":"https://patchwork.plctlab.org/api/1.2/patches/30187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-4-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:35","name":"[Rust,front-end,v4,03/46] gccrs: Add Debug info testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-4-arthur.cohen@embecosm.com/mbox/"},{"id":30188,"url":"https://patchwork.plctlab.org/api/1.2/patches/30188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-5-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:36","name":"[Rust,front-end,v4,04/46] gccrs: Add link cases testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-5-arthur.cohen@embecosm.com/mbox/"},{"id":30192,"url":"https://patchwork.plctlab.org/api/1.2/patches/30192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-6-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:37","name":"[Rust,front-end,v4,05/46] gccrs: Add general compilation test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-6-arthur.cohen@embecosm.com/mbox/"},{"id":30190,"url":"https://patchwork.plctlab.org/api/1.2/patches/30190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-7-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:38","name":"[Rust,front-end,v4,06/46] gccrs: Add execution test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-7-arthur.cohen@embecosm.com/mbox/"},{"id":30189,"url":"https://patchwork.plctlab.org/api/1.2/patches/30189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-8-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:39","name":"[Rust,front-end,v4,07/46] gccrs: Add gcc-check-target check-rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-8-arthur.cohen@embecosm.com/mbox/"},{"id":30196,"url":"https://patchwork.plctlab.org/api/1.2/patches/30196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-9-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:40","name":"[Rust,front-end,v4,08/46] gccrs: Add Rust front-end base AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-9-arthur.cohen@embecosm.com/mbox/"},{"id":30201,"url":"https://patchwork.plctlab.org/api/1.2/patches/30201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-10-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:41","name":"[Rust,front-end,v4,09/46] gccrs: Add definitions of Rust Items in AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-10-arthur.cohen@embecosm.com/mbox/"},{"id":30194,"url":"https://patchwork.plctlab.org/api/1.2/patches/30194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-11-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:42","name":"[Rust,front-end,v4,10/46] gccrs: Add full definitions of Rust AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-11-arthur.cohen@embecosm.com/mbox/"},{"id":30191,"url":"https://patchwork.plctlab.org/api/1.2/patches/30191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-12-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:43","name":"[Rust,front-end,v4,11/46] gccrs: Add Rust AST visitors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-12-arthur.cohen@embecosm.com/mbox/"},{"id":30199,"url":"https://patchwork.plctlab.org/api/1.2/patches/30199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-13-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:44","name":"[Rust,front-end,v4,12/46] gccrs: Add Lexer for Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-13-arthur.cohen@embecosm.com/mbox/"},{"id":30193,"url":"https://patchwork.plctlab.org/api/1.2/patches/30193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-14-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:45","name":"[Rust,front-end,v4,13/46] gccrs: Add Parser for Rust front-end pt.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-14-arthur.cohen@embecosm.com/mbox/"},{"id":30195,"url":"https://patchwork.plctlab.org/api/1.2/patches/30195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-15-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:46","name":"[Rust,front-end,v4,14/46] gccrs: Add Parser for Rust front-end pt.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-15-arthur.cohen@embecosm.com/mbox/"},{"id":30198,"url":"https://patchwork.plctlab.org/api/1.2/patches/30198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-16-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:47","name":"[Rust,front-end,v4,15/46] gccrs: Add expansion pass for the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-16-arthur.cohen@embecosm.com/mbox/"},{"id":30200,"url":"https://patchwork.plctlab.org/api/1.2/patches/30200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-17-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:48","name":"[Rust,front-end,v4,16/46] gccrs: Add name resolution pass to the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-17-arthur.cohen@embecosm.com/mbox/"},{"id":30208,"url":"https://patchwork.plctlab.org/api/1.2/patches/30208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-18-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:49","name":"[Rust,front-end,v4,17/46] gccrs: Add declarations for Rust HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-18-arthur.cohen@embecosm.com/mbox/"},{"id":30207,"url":"https://patchwork.plctlab.org/api/1.2/patches/30207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-19-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:50","name":"[Rust,front-end,v4,18/46] gccrs: Add HIR definitions and visitor framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-19-arthur.cohen@embecosm.com/mbox/"},{"id":30209,"url":"https://patchwork.plctlab.org/api/1.2/patches/30209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-20-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:51","name":"[Rust,front-end,v4,19/46] gccrs: Add AST to HIR lowering pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-20-arthur.cohen@embecosm.com/mbox/"},{"id":30203,"url":"https://patchwork.plctlab.org/api/1.2/patches/30203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-21-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:52","name":"[Rust,front-end,v4,20/46] gccrs: Add wrapper for make_unique","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-21-arthur.cohen@embecosm.com/mbox/"},{"id":30213,"url":"https://patchwork.plctlab.org/api/1.2/patches/30213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-22-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:53","name":"[Rust,front-end,v4,21/46] gccrs: Add port of FNV hash used during legacy symbol mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-22-arthur.cohen@embecosm.com/mbox/"},{"id":30210,"url":"https://patchwork.plctlab.org/api/1.2/patches/30210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-23-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:54","name":"[Rust,front-end,v4,22/46] gccrs: Add Rust ABI enum helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-23-arthur.cohen@embecosm.com/mbox/"},{"id":30202,"url":"https://patchwork.plctlab.org/api/1.2/patches/30202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-24-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:55","name":"[Rust,front-end,v4,23/46] gccrs: Add Base62 implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-24-arthur.cohen@embecosm.com/mbox/"},{"id":30205,"url":"https://patchwork.plctlab.org/api/1.2/patches/30205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-25-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:56","name":"[Rust,front-end,v4,24/46] gccrs: Add implementation of Optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-25-arthur.cohen@embecosm.com/mbox/"},{"id":30211,"url":"https://patchwork.plctlab.org/api/1.2/patches/30211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-26-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:57","name":"[Rust,front-end,v4,25/46] gccrs: Add attributes checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-26-arthur.cohen@embecosm.com/mbox/"},{"id":30204,"url":"https://patchwork.plctlab.org/api/1.2/patches/30204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-27-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:58","name":"[Rust,front-end,v4,26/46] gccrs: Add helpers mappings canonical path and lang items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-27-arthur.cohen@embecosm.com/mbox/"},{"id":30219,"url":"https://patchwork.plctlab.org/api/1.2/patches/30219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-28-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:59","name":"[Rust,front-end,v4,27/46] gccrs: Add type resolution and trait solving pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-28-arthur.cohen@embecosm.com/mbox/"},{"id":30224,"url":"https://patchwork.plctlab.org/api/1.2/patches/30224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-29-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:00","name":"[Rust,front-end,v4,28/46] gccrs: Add Rust type information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-29-arthur.cohen@embecosm.com/mbox/"},{"id":30212,"url":"https://patchwork.plctlab.org/api/1.2/patches/30212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-30-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:01","name":"[Rust,front-end,v4,29/46] gccrs: Add remaining type system transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-30-arthur.cohen@embecosm.com/mbox/"},{"id":30214,"url":"https://patchwork.plctlab.org/api/1.2/patches/30214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-31-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:02","name":"[Rust,front-end,v4,30/46] gccrs: Add unsafe checks for Rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-31-arthur.cohen@embecosm.com/mbox/"},{"id":30206,"url":"https://patchwork.plctlab.org/api/1.2/patches/30206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-32-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:03","name":"[Rust,front-end,v4,31/46] gccrs: Add const checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-32-arthur.cohen@embecosm.com/mbox/"},{"id":30217,"url":"https://patchwork.plctlab.org/api/1.2/patches/30217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-33-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:04","name":"[Rust,front-end,v4,32/46] gccrs: Add privacy checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-33-arthur.cohen@embecosm.com/mbox/"},{"id":30216,"url":"https://patchwork.plctlab.org/api/1.2/patches/30216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-34-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:05","name":"[Rust,front-end,v4,33/46] gccrs: Add dead code scan on HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-34-arthur.cohen@embecosm.com/mbox/"},{"id":30218,"url":"https://patchwork.plctlab.org/api/1.2/patches/30218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-35-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:07","name":"[Rust,front-end,v4,34/46] gccrs: Add unused variable scan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-35-arthur.cohen@embecosm.com/mbox/"},{"id":30215,"url":"https://patchwork.plctlab.org/api/1.2/patches/30215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-36-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:09","name":"[Rust,front-end,v4,35/46] gccrs: Add metadata output pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-36-arthur.cohen@embecosm.com/mbox/"},{"id":30228,"url":"https://patchwork.plctlab.org/api/1.2/patches/30228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-37-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:11","name":"[Rust,front-end,v4,36/46] gccrs: Add base for HIR to GCC GENERIC lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-37-arthur.cohen@embecosm.com/mbox/"},{"id":30222,"url":"https://patchwork.plctlab.org/api/1.2/patches/30222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-38-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:13","name":"[Rust,front-end,v4,37/46] gccrs: Add HIR to GCC GENERIC lowering for all nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-38-arthur.cohen@embecosm.com/mbox/"},{"id":30226,"url":"https://patchwork.plctlab.org/api/1.2/patches/30226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-39-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:15","name":"[Rust,front-end,v4,38/46] gccrs: Add HIR to GCC GENERIC lowering entry point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-39-arthur.cohen@embecosm.com/mbox/"},{"id":30220,"url":"https://patchwork.plctlab.org/api/1.2/patches/30220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-40-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:17","name":"[Rust,front-end,v4,39/46] gccrs: These are wrappers ported from reusing gccgo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-40-arthur.cohen@embecosm.com/mbox/"},{"id":30227,"url":"https://patchwork.plctlab.org/api/1.2/patches/30227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-41-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:18","name":"[Rust,front-end,v4,40/46] gccrs: Add GCC Rust front-end Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-41-arthur.cohen@embecosm.com/mbox/"},{"id":30221,"url":"https://patchwork.plctlab.org/api/1.2/patches/30221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-42-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:19","name":"[Rust,front-end,v4,41/46] gccrs: Add config-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-42-arthur.cohen@embecosm.com/mbox/"},{"id":30223,"url":"https://patchwork.plctlab.org/api/1.2/patches/30223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-43-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:20","name":"[Rust,front-end,v4,42/46] gccrs: Add lang-spec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-43-arthur.cohen@embecosm.com/mbox/"},{"id":30225,"url":"https://patchwork.plctlab.org/api/1.2/patches/30225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-44-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:21","name":"[Rust,front-end,v4,43/46] gccrs: Add lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-44-arthur.cohen@embecosm.com/mbox/"},{"id":30229,"url":"https://patchwork.plctlab.org/api/1.2/patches/30229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-45-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:23","name":"[Rust,front-end,v4,44/46] gccrs: Add compiler driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-45-arthur.cohen@embecosm.com/mbox/"},{"id":30230,"url":"https://patchwork.plctlab.org/api/1.2/patches/30230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-46-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:25","name":"[Rust,front-end,v4,45/46] gccrs: Compiler proper interface kicks off the pipeline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-46-arthur.cohen@embecosm.com/mbox/"},{"id":30231,"url":"https://patchwork.plctlab.org/api/1.2/patches/30231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-47-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:26","name":"[Rust,front-end,v4,46/46] gccrs: Add README, CONTRIBUTING and compiler logo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-47-arthur.cohen@embecosm.com/mbox/"},{"id":30232,"url":"https://patchwork.plctlab.org/api/1.2/patches/30232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dHK7UMNqkwdTs@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:44:44","name":"[committed] testsuite: Use -mnofpu for rx-*-* in ieee testsuite [PR107046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dHK7UMNqkwdTs@tucnak/mbox/"},{"id":30234,"url":"https://patchwork.plctlab.org/api/1.2/patches/30234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dxLVBpmVJLztI@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:47:32","name":"i386: Fix up expander conditions on cbranchbf4 and cstorebf4 [PR107969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dxLVBpmVJLztI@tucnak/mbox/"},{"id":30238,"url":"https://patchwork.plctlab.org/api/1.2/patches/30238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48kD2pq/URhF8Ur@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-06T11:14:23","name":"Zen4 tuning part 2 - tuning flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48kD2pq/URhF8Ur@kam.mff.cuni.cz/mbox/"},{"id":30265,"url":"https://patchwork.plctlab.org/api/1.2/patches/30265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206122707.494575-1-ibuclaw@gdcproject.org/","msgid":"<20221206122707.494575-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-06T12:27:07","name":"[committed] onlinedocs: Add documentation links to gdc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206122707.494575-1-ibuclaw@gdcproject.org/mbox/"},{"id":30303,"url":"https://patchwork.plctlab.org/api/1.2/patches/30303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206132624.1051104-1-jason@redhat.com/","msgid":"<20221206132624.1051104-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-06T13:26:24","name":"[RFA] build: add -Wconditionally-supported to strict_warn [PR64867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206132624.1051104-1-jason@redhat.com/mbox/"},{"id":30304,"url":"https://patchwork.plctlab.org/api/1.2/patches/30304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140126.716950-1-poulhies@adacore.com/","msgid":"<20221206140126.716950-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:26","name":"[COMMITTED] ada: Add Codepeer Exemption + simplify TO_C code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140126.716950-1-poulhies@adacore.com/mbox/"},{"id":30310,"url":"https://patchwork.plctlab.org/api/1.2/patches/30310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140137.717051-1-poulhies@adacore.com/","msgid":"<20221206140137.717051-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:37","name":"[COMMITTED] ada: Accessibility code reorganization and bug fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140137.717051-1-poulhies@adacore.com/mbox/"},{"id":30305,"url":"https://patchwork.plctlab.org/api/1.2/patches/30305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140149.717127-1-poulhies@adacore.com/","msgid":"<20221206140149.717127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:49","name":"[COMMITTED] ada: Use larger type for membership test of universal value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140149.717127-1-poulhies@adacore.com/mbox/"},{"id":30307,"url":"https://patchwork.plctlab.org/api/1.2/patches/30307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140158.717193-1-poulhies@adacore.com/","msgid":"<20221206140158.717193-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:58","name":"[COMMITTED] ada: Small adjustment to special resolution of membership test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140158.717193-1-poulhies@adacore.com/mbox/"},{"id":30308,"url":"https://patchwork.plctlab.org/api/1.2/patches/30308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140203.717258-1-poulhies@adacore.com/","msgid":"<20221206140203.717258-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:03","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140203.717258-1-poulhies@adacore.com/mbox/"},{"id":30311,"url":"https://patchwork.plctlab.org/api/1.2/patches/30311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140211.717323-1-poulhies@adacore.com/","msgid":"<20221206140211.717323-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:11","name":"[COMMITTED] ada: Fix spurious error in checking of SPARK elaboration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140211.717323-1-poulhies@adacore.com/mbox/"},{"id":30309,"url":"https://patchwork.plctlab.org/api/1.2/patches/30309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140219.717392-1-poulhies@adacore.com/","msgid":"<20221206140219.717392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:19","name":"[COMMITTED] ada: Suppress warning for specific constant valid condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140219.717392-1-poulhies@adacore.com/mbox/"},{"id":30306,"url":"https://patchwork.plctlab.org/api/1.2/patches/30306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140224.717457-1-poulhies@adacore.com/","msgid":"<20221206140224.717457-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:24","name":"[COMMITTED] ada: Spurious error on nested call using the prefix notation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140224.717457-1-poulhies@adacore.com/mbox/"},{"id":30312,"url":"https://patchwork.plctlab.org/api/1.2/patches/30312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140228.717520-1-poulhies@adacore.com/","msgid":"<20221206140228.717520-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:28","name":"[COMMITTED] ada: Allow No_Caching on volatile types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140228.717520-1-poulhies@adacore.com/mbox/"},{"id":30338,"url":"https://patchwork.plctlab.org/api/1.2/patches/30338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qe5-LO@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,2/19] modula2 front end: Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qe5-LO@lancelot/mbox/"},{"id":30334,"url":"https://patchwork.plctlab.org/api/1.2/patches/30334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeL-Qd@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,3/19] modula2 front end: gm2 driver files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeL-Qd@lancelot/mbox/"},{"id":30337,"url":"https://patchwork.plctlab.org/api/1.2/patches/30337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeZ-WE@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,4/19] modula2 front end: libgm2/libm2pim contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeZ-WE@lancelot/mbox/"},{"id":30322,"url":"https://patchwork.plctlab.org/api/1.2/patches/30322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qdq-Gg@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qdq-Gg@lancelot/mbox/"},{"id":30323,"url":"https://patchwork.plctlab.org/api/1.2/patches/30323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qfk-S1@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,9/19] modula2 front end: plugin source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qfk-S1@lancelot/mbox/"},{"id":30319,"url":"https://patchwork.plctlab.org/api/1.2/patches/30319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qf1-Bo@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,6/19] modula2 front end: libgm2/libm2min contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qf1-Bo@lancelot/mbox/"},{"id":30320,"url":"https://patchwork.plctlab.org/api/1.2/patches/30320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qen-6m@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,5/19] modula2 front end: libgm2/libm2iso contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qen-6m@lancelot/mbox/"},{"id":30327,"url":"https://patchwork.plctlab.org/api/1.2/patches/30327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfW-Mo@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,8/19] modula2 front end: libgm2 contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfW-Mo@lancelot/mbox/"},{"id":30318,"url":"https://patchwork.plctlab.org/api/1.2/patches/30318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfF-Gz@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,7/19] modula2 front end: libgm2/libm2log contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfF-Gz@lancelot/mbox/"},{"id":30355,"url":"https://patchwork.plctlab.org/api/1.2/patches/30355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgF-C1@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,11/19] modula2 front end: gimple interface *[a-d]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgF-C1@lancelot/mbox/"},{"id":30329,"url":"https://patchwork.plctlab.org/api/1.2/patches/30329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qfy-3L@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,10/19] modula2 front end: gimple interface header files *.h and *.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qfy-3L@lancelot/mbox/"},{"id":30341,"url":"https://patchwork.plctlab.org/api/1.2/patches/30341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qgl-Sj@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,13/19] modula2 front end: gimple interface *[g-m]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qgl-Sj@lancelot/mbox/"},{"id":30360,"url":"https://patchwork.plctlab.org/api/1.2/patches/30360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgU-Kq@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,12/19] modula2 front end: gimple interface *[e-f]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgU-Kq@lancelot/mbox/"},{"id":30336,"url":"https://patchwork.plctlab.org/api/1.2/patches/30336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qhj-S4@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,17/19] modula2 front end: dejagnu expect library scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qhj-S4@lancelot/mbox/"},{"id":30339,"url":"https://patchwork.plctlab.org/api/1.2/patches/30339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhG-Bj@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,15/19] modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhG-Bj@lancelot/mbox/"},{"id":30359,"url":"https://patchwork.plctlab.org/api/1.2/patches/30359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qgz-29@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,14/19] modula2 front end: gimple interface remainder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qgz-29@lancelot/mbox/"},{"id":30340,"url":"https://patchwork.plctlab.org/api/1.2/patches/30340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhV-Lh@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,16/19] modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhV-Lh@lancelot/mbox/"},{"id":30426,"url":"https://patchwork.plctlab.org/api/1.2/patches/30426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-2-qing.zhao@oracle.com/","msgid":"<20221206161438.2396168-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:14:36","name":"[V2,1/1] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-2-qing.zhao@oracle.com/mbox/"},{"id":30425,"url":"https://patchwork.plctlab.org/api/1.2/patches/30425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-3-qing.zhao@oracle.com/","msgid":"<20221206161438.2396168-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:14:37","name":"[V3,1/2] Update -Warray-bounds with -fstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-3-qing.zhao@oracle.com/mbox/"},{"id":30427,"url":"https://patchwork.plctlab.org/api/1.2/patches/30427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161844.2397151-1-qing.zhao@oracle.com/","msgid":"<20221206161844.2397151-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:18:44","name":"[V3,2/2] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161844.2397151-1-qing.zhao@oracle.com/mbox/"},{"id":30465,"url":"https://patchwork.plctlab.org/api/1.2/patches/30465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206175702.987794-1-ppalka@redhat.com/","msgid":"<20221206175702.987794-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-06T17:57:02","name":"c++: NTTP object wrapper substitution fixes [PR103346, ...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206175702.987794-1-ppalka@redhat.com/mbox/"},{"id":30469,"url":"https://patchwork.plctlab.org/api/1.2/patches/30469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183631.4095755-1-dmalcolm@redhat.com/","msgid":"<20221206183631.4095755-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:36:31","name":"[committed] analyzer: split out more stuff from region-model-impl-calls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183631.4095755-1-dmalcolm@redhat.com/mbox/"},{"id":30470,"url":"https://patchwork.plctlab.org/api/1.2/patches/30470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183649.4095806-1-dmalcolm@redhat.com/","msgid":"<20221206183649.4095806-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:36:49","name":"[committed] analyzer: update internal docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183649.4095806-1-dmalcolm@redhat.com/mbox/"},{"id":30471,"url":"https://patchwork.plctlab.org/api/1.2/patches/30471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183743.4095884-1-dmalcolm@redhat.com/","msgid":"<20221206183743.4095884-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:37:43","name":"[committed] contrib: doxygen: add gcc/analyzer subdirectory to INPUT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183743.4095884-1-dmalcolm@redhat.com/mbox/"},{"id":30472,"url":"https://patchwork.plctlab.org/api/1.2/patches/30472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183800.4095931-1-dmalcolm@redhat.com/","msgid":"<20221206183800.4095931-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:38:00","name":"[committed] analyzer: use __attribute__((nonnull)) at top level of analysis [PR106325]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183800.4095931-1-dmalcolm@redhat.com/mbox/"},{"id":30478,"url":"https://patchwork.plctlab.org/api/1.2/patches/30478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2dbP-006uqW-MN@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T19:27:39","name":"[v4,15/19] modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2dbP-006uqW-MN@lancelot/mbox/"},{"id":30481,"url":"https://patchwork.plctlab.org/api/1.2/patches/30481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-1-gcc@hazardy.de/","msgid":"<20221206195028.37104-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:25","name":"[1/4] libbacktrace: change all pc related variables to uintptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-1-gcc@hazardy.de/mbox/"},{"id":30483,"url":"https://patchwork.plctlab.org/api/1.2/patches/30483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-2-gcc@hazardy.de/","msgid":"<20221206195028.37104-2-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:26","name":"[2/4] libbacktrace: detect executable path on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-2-gcc@hazardy.de/mbox/"},{"id":30482,"url":"https://patchwork.plctlab.org/api/1.2/patches/30482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-3-gcc@hazardy.de/","msgid":"<20221206195028.37104-3-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:27","name":"[3/4] libbacktrace: work with aslr on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-3-gcc@hazardy.de/mbox/"},{"id":30480,"url":"https://patchwork.plctlab.org/api/1.2/patches/30480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-4-gcc@hazardy.de/","msgid":"<20221206195028.37104-4-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:28","name":"[4/4] libbacktrace: get debug information for loaded dlls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-4-gcc@hazardy.de/mbox/"},{"id":30513,"url":"https://patchwork.plctlab.org/api/1.2/patches/30513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213420.232451-1-jwakely@redhat.com/","msgid":"<20221206213420.232451-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:34:20","name":"[committed] libstdc++: The Trouble with Tribbles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213420.232451-1-jwakely@redhat.com/mbox/"},{"id":30514,"url":"https://patchwork.plctlab.org/api/1.2/patches/30514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213631.238976-1-jwakely@redhat.com/","msgid":"<20221206213631.238976-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:36:31","name":"[committed] libstdc++: Add nodiscard attribute to mutex try_lock functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213631.238976-1-jwakely@redhat.com/mbox/"},{"id":30515,"url":"https://patchwork.plctlab.org/api/1.2/patches/30515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213654.239004-1-jwakely@redhat.com/","msgid":"<20221206213654.239004-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:36:54","name":"[committed] libstdc++: Add hint to compiler about vector invariants [PR106434]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213654.239004-1-jwakely@redhat.com/mbox/"},{"id":30517,"url":"https://patchwork.plctlab.org/api/1.2/patches/30517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214054.239631-1-jwakely@redhat.com/","msgid":"<20221206214054.239631-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:40:54","name":"[committed] libstdc++: Add casts for integer-like difference type [PR107871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214054.239631-1-jwakely@redhat.com/mbox/"},{"id":30518,"url":"https://patchwork.plctlab.org/api/1.2/patches/30518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214100.239663-1-jwakely@redhat.com/","msgid":"<20221206214100.239663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:41:00","name":"[committed] libstdc++: Fix test that fails due to name clash with old glibc [PR107979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214100.239663-1-jwakely@redhat.com/mbox/"},{"id":30544,"url":"https://patchwork.plctlab.org/api/1.2/patches/30544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206233146.4111115-1-dmalcolm@redhat.com/","msgid":"<20221206233146.4111115-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T23:31:46","name":"[committed] analyzer: don'\''t create bindings or binding keys for empty regions [PR107882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206233146.4111115-1-dmalcolm@redhat.com/mbox/"},{"id":30575,"url":"https://patchwork.plctlab.org/api/1.2/patches/30575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207014152.3313833-1-chenglulu@loongson.cn/","msgid":"<20221207014152.3313833-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-07T01:41:53","name":"doc: Correct a clerical error in the document.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207014152.3313833-1-chenglulu@loongson.cn/mbox/"},{"id":30622,"url":"https://patchwork.plctlab.org/api/1.2/patches/30622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6fed247-243f-45c3-cfb3-53d7bdfc2b65@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T05:17:08","name":"[v2] Add a new conversion for conditional ternary set into ifcvt [PR106536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6fed247-243f-45c3-cfb3-53d7bdfc2b65@linux.ibm.com/mbox/"},{"id":30653,"url":"https://patchwork.plctlab.org/api/1.2/patches/30653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207063644.100134-1-hongyu.wang@intel.com/","msgid":"<20221207063644.100134-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-12-07T06:36:44","name":"i386: Avoid fma_chain for -march=alderlake and sapphirerapids.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207063644.100134-1-hongyu.wang@intel.com/mbox/"},{"id":30692,"url":"https://patchwork.plctlab.org/api/1.2/patches/30692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3383e0b-29d1-622b-3278-f10aa173fa62@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T08:08:09","name":"libgomp.texi: Reverse-offload updates (was: [Patch] libgomp: Handle OpenMP'\''s reverse offloads)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3383e0b-29d1-622b-3278-f10aa173fa62@codesourcery.com/mbox/"},{"id":30695,"url":"https://patchwork.plctlab.org/api/1.2/patches/30695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BO16zJ9vReV+Af@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T08:29:11","name":"range-op-float: Fix up frange_arithmetic [PR107967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BO16zJ9vReV+Af@tucnak/mbox/"},{"id":30725,"url":"https://patchwork.plctlab.org/api/1.2/patches/30725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BdQ2An000WISET@alf.mars/","msgid":"","list_archive_url":null,"date":"2022-12-07T09:30:43","name":"preprocessor: __has_include_next should not error out [PR80755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BdQ2An000WISET@alf.mars/mbox/"},{"id":30760,"url":"https://patchwork.plctlab.org/api/1.2/patches/30760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207102739.73934134CD@imap1.suse-dmz.suse.de/","msgid":"<20221207102739.73934134CD@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T10:27:39","name":"ipa/105676 - pure attribute suggestion for const function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207102739.73934134CD@imap1.suse-dmz.suse.de/mbox/"},{"id":30783,"url":"https://patchwork.plctlab.org/api/1.2/patches/30783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207112501.989ED136B4@imap1.suse-dmz.suse.de/","msgid":"<20221207112501.989ED136B4@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T11:25:01","name":"tree-optimization/104475 - bogus -Wstringop-overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207112501.989ED136B4@imap1.suse-dmz.suse.de/mbox/"},{"id":30789,"url":"https://patchwork.plctlab.org/api/1.2/patches/30789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207113633.993896-1-arthur.cohen@embecosm.com/","msgid":"<20221207113633.993896-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-07T11:36:33","name":"[committed] MAINTAINERS: Add myself as Rust front-end maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207113633.993896-1-arthur.cohen@embecosm.com/mbox/"},{"id":30805,"url":"https://patchwork.plctlab.org/api/1.2/patches/30805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207120008.126895-1-guojiufu@linux.ibm.com/","msgid":"<20221207120008.126895-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-07T12:00:08","name":"[V3] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207120008.126895-1-guojiufu@linux.ibm.com/mbox/"},{"id":30815,"url":"https://patchwork.plctlab.org/api/1.2/patches/30815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5CCrWLFwPMSRtEx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T12:10:21","name":"range-op-float: frange_arithmetic tweaks for MODE_COMPOSITE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5CCrWLFwPMSRtEx@tucnak/mbox/"},{"id":30853,"url":"https://patchwork.plctlab.org/api/1.2/patches/30853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207135418.F35F4136B4@imap1.suse-dmz.suse.de/","msgid":"<20221207135418.F35F4136B4@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T13:54:18","name":"tree-optimization/106904 - bogus -Wstringopt-overflow with vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207135418.F35F4136B4@imap1.suse-dmz.suse.de/mbox/"},{"id":30897,"url":"https://patchwork.plctlab.org/api/1.2/patches/30897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207153939.49157-1-iain@sandoe.co.uk/","msgid":"<20221207153939.49157-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-07T15:39:39","name":"c++, TLS: Support cross-tu static initialization for targets without alias support [PR106435].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207153939.49157-1-iain@sandoe.co.uk/mbox/"},{"id":30900,"url":"https://patchwork.plctlab.org/api/1.2/patches/30900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C2HQOXFT+RTCId@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T15:49:49","name":"range-op-float, v2: Fix up frange_arithmetic [PR107967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C2HQOXFT+RTCId@tucnak/mbox/"},{"id":30909,"url":"https://patchwork.plctlab.org/api/1.2/patches/30909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C54d2clIOm0hrr@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T16:05:53","name":"range-op-float, v2: frange_arithmetic tweaks for MODE_COMPOSITE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C54d2clIOm0hrr@tucnak/mbox/"},{"id":30933,"url":"https://patchwork.plctlab.org/api/1.2/patches/30933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1752ce19-956b-a055-2585-a6b0e2827572@redhat.com/","msgid":"<1752ce19-956b-a055-2585-a6b0e2827572@redhat.com>","list_archive_url":null,"date":"2022-12-07T16:44:04","name":"PR tree-optimization/107985 - Ensure arguments to range-op handler are supported.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1752ce19-956b-a055-2585-a6b0e2827572@redhat.com/mbox/"},{"id":30950,"url":"https://patchwork.plctlab.org/api/1.2/patches/30950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982520FB2F4810235D350BD831A9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T17:15:14","name":"[COMMITTED] AArch64: Fix assert in aarch64_move_imm [PR108006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982520FB2F4810235D350BD831A9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":30998,"url":"https://patchwork.plctlab.org/api/1.2/patches/30998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207190903.78a6b37f@squid.athome/","msgid":"<20221207190903.78a6b37f@squid.athome>","list_archive_url":null,"date":"2022-12-07T19:09:03","name":"[1/2] OpenMP/Fortran: Combined directives with map/firstprivate of same symbol","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207190903.78a6b37f@squid.athome/mbox/"},{"id":30999,"url":"https://patchwork.plctlab.org/api/1.2/patches/30999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207191355.2e43ea14@squid.athome/","msgid":"<20221207191355.2e43ea14@squid.athome>","list_archive_url":null,"date":"2022-12-07T19:13:55","name":"[2/2] OpenMP: Duplicate checking for map clauses in Fortran (PR107214)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207191355.2e43ea14@squid.athome/mbox/"},{"id":31000,"url":"https://patchwork.plctlab.org/api/1.2/patches/31000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com/","msgid":"<8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com>","list_archive_url":null,"date":"2022-12-07T19:19:24","name":"[committed] preprocessor: Enable __VA_OPT__ for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com/mbox/"},{"id":31005,"url":"https://patchwork.plctlab.org/api/1.2/patches/31005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab2a758-711d-6d30-6561-a4189efff023@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T19:25:29","name":"[committed] testsuite: Add test for C90 auto with implicit int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab2a758-711d-6d30-6561-a4189efff023@codesourcery.com/mbox/"},{"id":31016,"url":"https://patchwork.plctlab.org/api/1.2/patches/31016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207201827.1720474-1-ppalka@redhat.com/","msgid":"<20221207201827.1720474-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-07T20:18:27","name":"c++: ICE with concepts TS multiple auto deduction [PR101886]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207201827.1720474-1-ppalka@redhat.com/mbox/"},{"id":31022,"url":"https://patchwork.plctlab.org/api/1.2/patches/31022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207203409.104322-1-polacek@redhat.com/","msgid":"<20221207203409.104322-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-12-07T20:34:09","name":"docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207203409.104322-1-polacek@redhat.com/mbox/"},{"id":31049,"url":"https://patchwork.plctlab.org/api/1.2/patches/31049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205517.526182-1-rzinsly@ventanamicro.com/","msgid":"<20221207205517.526182-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-07T20:55:17","name":"RISC-V: Produce better code with complex constants [PR95632] [PR106602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205517.526182-1-rzinsly@ventanamicro.com/mbox/"},{"id":31050,"url":"https://patchwork.plctlab.org/api/1.2/patches/31050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-63117869-4396-41cc-8f80-3f7d4d02e5d6-1670446640941@3c-app-gmx-bs03/","msgid":"","list_archive_url":null,"date":"2022-12-07T20:57:20","name":"Fortran: handle zero-sized arrays in ctors with typespec [PR108010]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-63117869-4396-41cc-8f80-3f7d4d02e5d6-1670446640941@3c-app-gmx-bs03/mbox/"},{"id":31053,"url":"https://patchwork.plctlab.org/api/1.2/patches/31053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-2-david.faust@oracle.com/","msgid":"<20221207205734.9287-2-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:32","name":"[1/3] btf: add '\''extern'\'' linkage for variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-2-david.faust@oracle.com/mbox/"},{"id":31051,"url":"https://patchwork.plctlab.org/api/1.2/patches/31051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-3-david.faust@oracle.com/","msgid":"<20221207205734.9287-3-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:33","name":"[2/3] btf: fix '\''extern const void'\'' variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-3-david.faust@oracle.com/mbox/"},{"id":31052,"url":"https://patchwork.plctlab.org/api/1.2/patches/31052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-4-david.faust@oracle.com/","msgid":"<20221207205734.9287-4-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:34","name":"[3/3] btf: correct generation for extern funcs [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-4-david.faust@oracle.com/mbox/"},{"id":31064,"url":"https://patchwork.plctlab.org/api/1.2/patches/31064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207215028.1851790-1-ppalka@redhat.com/","msgid":"<20221207215028.1851790-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-07T21:50:28","name":"c++: modules and std::source_location::current() def arg [PR100881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207215028.1851790-1-ppalka@redhat.com/mbox/"},{"id":31077,"url":"https://patchwork.plctlab.org/api/1.2/patches/31077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3d8e34-802-15a9-d4e6-317cd1c324ff@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T22:08:56","name":"[committed] c: Diagnose auto constexpr used with a type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3d8e34-802-15a9-d4e6-317cd1c324ff@codesourcery.com/mbox/"},{"id":31098,"url":"https://patchwork.plctlab.org/api/1.2/patches/31098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVMYucfwKjxTZvvuumHhbcwKYhjc3=LDZxGNfhMqr6Lqg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T00:22:57","name":"Add zstd support to libbacktrace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVMYucfwKjxTZvvuumHhbcwKYhjc3=LDZxGNfhMqr6Lqg@mail.gmail.com/mbox/"},{"id":31133,"url":"https://patchwork.plctlab.org/api/1.2/patches/31133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com/","msgid":"<3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com>","list_archive_url":null,"date":"2022-12-08T03:08:22","name":"[v4,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com/mbox/"},{"id":31249,"url":"https://patchwork.plctlab.org/api/1.2/patches/31249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208091851.3459448-1-jcmvbkbc@gmail.com/","msgid":"<20221208091851.3459448-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-08T09:18:51","name":"[COMMITTED] libgcc: xtensa: remove stray symbols from X*HAL macro definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208091851.3459448-1-jcmvbkbc@gmail.com/mbox/"},{"id":31254,"url":"https://patchwork.plctlab.org/api/1.2/patches/31254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5Gy/7jwJG2UdNTA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-08T09:48:47","name":"i386: Add *concat3_{5,6,7} patterns [PR107627]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5Gy/7jwJG2UdNTA@tucnak/mbox/"},{"id":31255,"url":"https://patchwork.plctlab.org/api/1.2/patches/31255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5G4RyqhX5c0p38G@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-08T10:11:19","name":"cfgbuild: Fix DEBUG_INSN handling in find_bb_boundaries [PR106719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5G4RyqhX5c0p38G@tucnak/mbox/"},{"id":31282,"url":"https://patchwork.plctlab.org/api/1.2/patches/31282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081053400.17722@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2022-12-08T10:54:04","name":"tree-optimization/107699 - missed &data._M_elems + _1 != &data._M_elems folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081053400.17722@jbgna.fhfr.qr/mbox/"},{"id":31283,"url":"https://patchwork.plctlab.org/api/1.2/patches/31283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208105944.660323-1-jose.marchesi@oracle.com/","msgid":"<20221208105944.660323-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-08T10:59:44","name":"expr.cc: avoid unexpected side effects in expand_expr_divmod optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208105944.660323-1-jose.marchesi@oracle.com/mbox/"},{"id":31292,"url":"https://patchwork.plctlab.org/api/1.2/patches/31292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081100520.17722@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2022-12-08T11:07:08","name":"tree-optimization/99919 - bogus uninit diagnostic with bitfield guards","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081100520.17722@jbgna.fhfr.qr/mbox/"},{"id":31381,"url":"https://patchwork.plctlab.org/api/1.2/patches/31381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5H1+kCo+hcQsDHU@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T14:34:34","name":"[v2] docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5H1+kCo+hcQsDHU@redhat.com/mbox/"},{"id":31434,"url":"https://patchwork.plctlab.org/api/1.2/patches/31434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16679-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T16:39:13","name":"AArch64 div-by-255, ensure that arguments are registers. [PR107988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16679-tamar@arm.com/mbox/"},{"id":31435,"url":"https://patchwork.plctlab.org/api/1.2/patches/31435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208164230.2208644-1-ppalka@redhat.com/","msgid":"<20221208164230.2208644-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-08T16:42:30","name":"c++: class-scope qualified constrained auto [PR107188]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208164230.2208644-1-ppalka@redhat.com/mbox/"},{"id":31458,"url":"https://patchwork.plctlab.org/api/1.2/patches/31458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183444.1648084-1-jason@redhat.com/","msgid":"<20221208183444.1648084-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:34:44","name":"[pushed] c++: fewer allocator temps [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183444.1648084-1-jason@redhat.com/mbox/"},{"id":31459,"url":"https://patchwork.plctlab.org/api/1.2/patches/31459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183540.8667-1-david.faust@oracle.com/","msgid":"<20221208183540.8667-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-08T18:35:40","name":"bpf: add define_insn for bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183540.8667-1-david.faust@oracle.com/mbox/"},{"id":31460,"url":"https://patchwork.plctlab.org/api/1.2/patches/31460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184111.1649145-1-jason@redhat.com/","msgid":"<20221208184111.1649145-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:41:11","name":"[pushed] c++: avoid initializer_list [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184111.1649145-1-jason@redhat.com/mbox/"},{"id":31461,"url":"https://patchwork.plctlab.org/api/1.2/patches/31461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184528.1657376-1-jason@redhat.com/","msgid":"<20221208184528.1657376-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:45:28","name":"[pushed] c++: build initializer_list in a loop [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184528.1657376-1-jason@redhat.com/mbox/"},{"id":31509,"url":"https://patchwork.plctlab.org/api/1.2/patches/31509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c8f6193c-a103-49ca-a08b-64c2de66ad54-1670536782690@3c-app-gmx-bap18/","msgid":"","list_archive_url":null,"date":"2022-12-08T21:59:42","name":"Fortran: diagnose and reject duplicate CONTIGUOUS attribute [PR108025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c8f6193c-a103-49ca-a08b-64c2de66ad54-1670536782690@3c-app-gmx-bap18/mbox/"},{"id":31510,"url":"https://patchwork.plctlab.org/api/1.2/patches/31510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208220112.1700553-1-jason@redhat.com/","msgid":"<20221208220112.1700553-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T22:01:12","name":"[RFA] gimplify: avoid unnecessary copy of init array [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208220112.1700553-1-jason@redhat.com/mbox/"},{"id":31523,"url":"https://patchwork.plctlab.org/api/1.2/patches/31523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5JrqSFa/3Z2D4AR@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T22:56:41","name":"[v3] docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5JrqSFa/3Z2D4AR@redhat.com/mbox/"},{"id":31560,"url":"https://patchwork.plctlab.org/api/1.2/patches/31560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003551.443038-1-jwakely@redhat.com/","msgid":"<20221209003551.443038-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:35:51","name":"[committed] libstdc++: Change class-key for duration and time_point to class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003551.443038-1-jwakely@redhat.com/mbox/"},{"id":31561,"url":"https://patchwork.plctlab.org/api/1.2/patches/31561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003602.443084-1-jwakely@redhat.com/","msgid":"<20221209003602.443084-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:02","name":"[committed] libstdc++: Add [[nodiscard]] to chrono conversion functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003602.443084-1-jwakely@redhat.com/mbox/"},{"id":31563,"url":"https://patchwork.plctlab.org/api/1.2/patches/31563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003611.443110-1-jwakely@redhat.com/","msgid":"<20221209003611.443110-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:11","name":"[committed] libstdc++: Fix some -Wunused warnings in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003611.443110-1-jwakely@redhat.com/mbox/"},{"id":31562,"url":"https://patchwork.plctlab.org/api/1.2/patches/31562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003620.443129-1-jwakely@redhat.com/","msgid":"<20221209003620.443129-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:20","name":"[committed] libstdc++: Remove digit separators [PR108015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003620.443129-1-jwakely@redhat.com/mbox/"},{"id":31604,"url":"https://patchwork.plctlab.org/api/1.2/patches/31604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022845.32233-1-dmalcolm@redhat.com/","msgid":"<20221209022845.32233-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:28:45","name":"[committed] analyzer: handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022845.32233-1-dmalcolm@redhat.com/mbox/"},{"id":31605,"url":"https://patchwork.plctlab.org/api/1.2/patches/31605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022919.32279-1-dmalcolm@redhat.com/","msgid":"<20221209022919.32279-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:29:19","name":"[committed] analyzer: fix ICE on region creation during get_referenced_base_regions [PR108003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022919.32279-1-dmalcolm@redhat.com/mbox/"},{"id":31606,"url":"https://patchwork.plctlab.org/api/1.2/patches/31606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022933.32326-1-dmalcolm@redhat.com/","msgid":"<20221209022933.32326-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:29:33","name":"[committed] analyzer: rename region-model-impl-calls.cc to kf.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022933.32326-1-dmalcolm@redhat.com/mbox/"},{"id":31608,"url":"https://patchwork.plctlab.org/api/1.2/patches/31608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-2-uwu@icenowy.me/","msgid":"<20221209024349.845948-2-uwu@icenowy.me>","list_archive_url":null,"date":"2022-12-09T02:43:48","name":"[1/2] LoongArch: respect the with values in config.gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-2-uwu@icenowy.me/mbox/"},{"id":31609,"url":"https://patchwork.plctlab.org/api/1.2/patches/31609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-3-uwu@icenowy.me/","msgid":"<20221209024349.845948-3-uwu@icenowy.me>","list_archive_url":null,"date":"2022-12-09T02:43:49","name":"[2/2] LoongArch: drop loongarch-driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-3-uwu@icenowy.me/mbox/"},{"id":31696,"url":"https://patchwork.plctlab.org/api/1.2/patches/31696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209094141.1565366-1-chenglulu@loongson.cn/","msgid":"<20221209094141.1565366-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-09T09:41:42","name":"[v3] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209094141.1565366-1-chenglulu@loongson.cn/mbox/"},{"id":31740,"url":"https://patchwork.plctlab.org/api/1.2/patches/31740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com/","msgid":"<08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com>","list_archive_url":null,"date":"2022-12-09T13:32:29","name":"Fix memory constraint on MVE v[ld/st][2/4] instructions [PR107714]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com/mbox/"},{"id":31746,"url":"https://patchwork.plctlab.org/api/1.2/patches/31746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209135609.55159-1-sebastian.huber@embedded-brains.de/","msgid":"<20221209135609.55159-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-09T13:56:09","name":"gcov: Fix -fprofile-update=atomic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209135609.55159-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":31774,"url":"https://patchwork.plctlab.org/api/1.2/patches/31774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rjgu0gv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-09T14:16:00","name":"[10/15,V5] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rjgu0gv.fsf_-_@arm.com/mbox/"},{"id":31779,"url":"https://patchwork.plctlab.org/api/1.2/patches/31779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982B7A11182C4919D157793831C9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-09T14:26:11","name":"AArch64: Enable TARGET_CONST_ANCHOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982B7A11182C4919D157793831C9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":31898,"url":"https://patchwork.plctlab.org/api/1.2/patches/31898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de/","msgid":"<7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de>","list_archive_url":null,"date":"2022-12-09T17:34:18","name":"initialize fde objects lazily","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de/mbox/"},{"id":31904,"url":"https://patchwork.plctlab.org/api/1.2/patches/31904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209181938.29706-1-amonakov@ispras.ru/","msgid":"<20221209181938.29706-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-12-09T18:19:38","name":"i386: correct division modeling in lujiazui.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209181938.29706-1-amonakov@ispras.ru/mbox/"},{"id":31905,"url":"https://patchwork.plctlab.org/api/1.2/patches/31905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209182510.43515-1-rzinsly@ventanamicro.com/","msgid":"<20221209182510.43515-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-09T18:25:10","name":"[v2] RISC-V: Produce better code with complex constants [PR95632] [PR106602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209182510.43515-1-rzinsly@ventanamicro.com/mbox/"},{"id":31923,"url":"https://patchwork.plctlab.org/api/1.2/patches/31923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com/","msgid":"<9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com>","list_archive_url":null,"date":"2022-12-09T20:14:55","name":"Fortran/OpenMP: align/allocator modifiers to the allocate clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com/mbox/"},{"id":31926,"url":"https://patchwork.plctlab.org/api/1.2/patches/31926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com/","msgid":"<091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com>","list_archive_url":null,"date":"2022-12-09T21:12:47","name":"Fortran: Replace simple '\''.'\'' quotes by %<.%>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com/mbox/"},{"id":31927,"url":"https://patchwork.plctlab.org/api/1.2/patches/31927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-896fac60-06d8-49ed-9a30-56ae2e8b7c7f-1670621235681@3c-app-gmx-bs62/","msgid":"","list_archive_url":null,"date":"2022-12-09T21:27:15","name":"Fortran: ICE on recursive derived types with allocatable components [PR107872]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-896fac60-06d8-49ed-9a30-56ae2e8b7c7f-1670621235681@3c-app-gmx-bs62/mbox/"},{"id":31935,"url":"https://patchwork.plctlab.org/api/1.2/patches/31935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209215720.3142097-1-ppalka@redhat.com/","msgid":"<20221209215720.3142097-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-09T21:57:20","name":"c++: extract_local_specs and unevaluated contexts [PR100295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209215720.3142097-1-ppalka@redhat.com/mbox/"},{"id":31955,"url":"https://patchwork.plctlab.org/api/1.2/patches/31955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edt86q3q.fsf@debian/","msgid":"<87edt86q3q.fsf@debian>","list_archive_url":null,"date":"2022-12-10T00:48:25","name":"[v4,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edt86q3q.fsf@debian/mbox/"},{"id":31977,"url":"https://patchwork.plctlab.org/api/1.2/patches/31977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgbv225f.fsf@euler.schwinge.homeip.net/","msgid":"<87zgbv225f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-10T06:39:24","name":"Prepare '\''contrib/gcc-changelog/git_commit.py'\'' for GCC/Rust (was: Rust front-end patches v4)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgbv225f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":31982,"url":"https://patchwork.plctlab.org/api/1.2/patches/31982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcr1zg2.fsf@euler.schwinge.homeip.net/","msgid":"<87pmcr1zg2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-10T07:37:49","name":"Add stub '\''gcc/rust/ChangeLog'\'' (was: Prepare '\''contrib/gcc-changelog/git_commit.py'\'' for GCC/Rust)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcr1zg2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":31995,"url":"https://patchwork.plctlab.org/api/1.2/patches/31995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RSeiXwNVUa7+dw@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-10T09:33:46","name":"c++: Ensure !!var is not an lvalue [PR107065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RSeiXwNVUa7+dw@tucnak/mbox/"},{"id":31997,"url":"https://patchwork.plctlab.org/api/1.2/patches/31997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RT+ZOKX3pHseJu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-10T09:40:09","name":"ivopts: Fix IP_END handling for asm goto [PR107997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RT+ZOKX3pHseJu@tucnak/mbox/"},{"id":31998,"url":"https://patchwork.plctlab.org/api/1.2/patches/31998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-2-arsen@aarsen.me/","msgid":"<20221210094303.2180127-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:00","name":"[1/4] contracts: Lowercase {MAYBE,NEVER}_CONTINUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-2-arsen@aarsen.me/mbox/"},{"id":31999,"url":"https://patchwork.plctlab.org/api/1.2/patches/31999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-3-arsen@aarsen.me/","msgid":"<20221210094303.2180127-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:01","name":"[2/4] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-3-arsen@aarsen.me/mbox/"},{"id":32000,"url":"https://patchwork.plctlab.org/api/1.2/patches/32000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-4-arsen@aarsen.me/","msgid":"<20221210094303.2180127-4-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:02","name":"[3/4] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-4-arsen@aarsen.me/mbox/"},{"id":32001,"url":"https://patchwork.plctlab.org/api/1.2/patches/32001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-5-arsen@aarsen.me/","msgid":"<20221210094303.2180127-5-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:03","name":"[4/4] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-5-arsen@aarsen.me/mbox/"},{"id":32006,"url":"https://patchwork.plctlab.org/api/1.2/patches/32006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcrpkfv.fsf@debian/","msgid":"<87pmcrpkfv.fsf@debian>","list_archive_url":null,"date":"2022-12-10T11:28:04","name":"[v5,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite. Addendum.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcrpkfv.fsf@debian/mbox/"},{"id":32012,"url":"https://patchwork.plctlab.org/api/1.2/patches/32012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210113744.38708-1-iain@sandoe.co.uk/","msgid":"<20221210113744.38708-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-10T11:37:44","name":"coroutines: Accept '\''extern \"C\"'\'' coroutines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210113744.38708-1-iain@sandoe.co.uk/mbox/"},{"id":32023,"url":"https://patchwork.plctlab.org/api/1.2/patches/32023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210131356.3385654-1-arsen@aarsen.me/","msgid":"<20221210131356.3385654-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T13:13:56","name":"contracts: Stop relying on mangling for naming .pre/.post clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210131356.3385654-1-arsen@aarsen.me/mbox/"},{"id":32059,"url":"https://patchwork.plctlab.org/api/1.2/patches/32059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210155427.31858-1-iain@sandoe.co.uk/","msgid":"<20221210155427.31858-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-10T15:54:27","name":"coroutines: Build pointer initializers with nullptr_node [PR107768]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210155427.31858-1-iain@sandoe.co.uk/mbox/"},{"id":32096,"url":"https://patchwork.plctlab.org/api/1.2/patches/32096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-23942435-f209-452a-b9e2-427a01a491ef-1670706846774@3c-app-gmx-bap38/","msgid":"","list_archive_url":null,"date":"2022-12-10T21:14:06","name":"Fortran: reject bad SIZE argument while simplifying ISHFTC [PR106911]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-23942435-f209-452a-b9e2-427a01a491ef-1670706846774@3c-app-gmx-bap38/mbox/"},{"id":32097,"url":"https://patchwork.plctlab.org/api/1.2/patches/32097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-24b92e9f-fa6e-4c3c-bad9-e66b6e0de14f-1670707406360@3c-app-gmx-bap38/","msgid":"","list_archive_url":null,"date":"2022-12-10T21:23:26","name":"Fortran: fix ICE on bad use of statement function [PR107995]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-24b92e9f-fa6e-4c3c-bad9-e66b6e0de14f-1670707406360@3c-app-gmx-bap38/mbox/"},{"id":32102,"url":"https://patchwork.plctlab.org/api/1.2/patches/32102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-3-ben.boeckel@kitware.com/","msgid":"<20221210222050.1674457-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-12-10T22:20:49","name":"[v4,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-3-ben.boeckel@kitware.com/mbox/"},{"id":32103,"url":"https://patchwork.plctlab.org/api/1.2/patches/32103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-4-ben.boeckel@kitware.com/","msgid":"<20221210222050.1674457-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-12-10T22:20:50","name":"[v4,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-4-ben.boeckel@kitware.com/mbox/"},{"id":32175,"url":"https://patchwork.plctlab.org/api/1.2/patches/32175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1e2eb80-e4bb-0fa7-f3f3-3b17f6a8a885@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-11T11:03:21","name":"[committed] fortran/openmp.cc: Remove '\''s'\'' that slipped in during %<..%> replacement (was: [Patch] Fortran: Replace simple '\''.'\'' quotes by %<.%>)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1e2eb80-e4bb-0fa7-f3f3-3b17f6a8a885@codesourcery.com/mbox/"},{"id":32189,"url":"https://patchwork.plctlab.org/api/1.2/patches/32189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133234.64ABB13413@imap2.suse-dmz.suse.de/","msgid":"<20221211133234.64ABB13413@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-11T13:32:34","name":"[1/2] Treat ADDR_EXPR and CONSTRUCTOR as GIMPLE/GENERIC magically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133234.64ABB13413@imap2.suse-dmz.suse.de/mbox/"},{"id":32190,"url":"https://patchwork.plctlab.org/api/1.2/patches/32190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133252.1DDD913413@imap2.suse-dmz.suse.de/","msgid":"<20221211133252.1DDD913413@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-11T13:32:51","name":"[2/2] tree-optimization/89317 - missed folding of (p + 4) - &p->d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133252.1DDD913413@imap2.suse-dmz.suse.de/mbox/"},{"id":32196,"url":"https://patchwork.plctlab.org/api/1.2/patches/32196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211154519.2681701-1-ibuclaw@gdcproject.org/","msgid":"<20221211154519.2681701-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T15:45:19","name":"[committed] d: Expand bsr intrinsic as `clz(arg) ^ (argsize - 1)'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211154519.2681701-1-ibuclaw@gdcproject.org/mbox/"},{"id":32197,"url":"https://patchwork.plctlab.org/api/1.2/patches/32197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3670826-b9cf-a1a4-4f74-373c356f0994@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-11T16:21:09","name":"[(pushed)] unidiff: use newline='\''\\n'\'' argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3670826-b9cf-a1a4-4f74-373c356f0994@suse.cz/mbox/"},{"id":32198,"url":"https://patchwork.plctlab.org/api/1.2/patches/32198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211175259.2795408-1-ibuclaw@gdcproject.org/","msgid":"<20221211175259.2795408-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T17:52:59","name":"[committed] d: Fix internal compiler error: in visit, at d/imports.cc:72 (PR108050)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211175259.2795408-1-ibuclaw@gdcproject.org/mbox/"},{"id":32199,"url":"https://patchwork.plctlab.org/api/1.2/patches/32199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211181354.2826180-1-ibuclaw@gdcproject.org/","msgid":"<20221211181354.2826180-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T18:13:54","name":"[GCC-12,committed] d: Remove \"final\" and \"override\" from visitor method.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211181354.2826180-1-ibuclaw@gdcproject.org/mbox/"},{"id":32216,"url":"https://patchwork.plctlab.org/api/1.2/patches/32216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8917110-4059-42e7-976e-d948e16611f0-1670798023698@3c-app-gmx-bap41/","msgid":"","list_archive_url":null,"date":"2022-12-11T22:33:43","name":"Fortran: improve checking of assumed size array spec [PR102180]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8917110-4059-42e7-976e-d948e16611f0-1670798023698@3c-app-gmx-bap41/mbox/"},{"id":32224,"url":"https://patchwork.plctlab.org/api/1.2/patches/32224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-1-guojiufu@linux.ibm.com/","msgid":"<20221212013829.111739-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:38:28","name":"[V4,1/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-1-guojiufu@linux.ibm.com/mbox/"},{"id":32225,"url":"https://patchwork.plctlab.org/api/1.2/patches/32225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-2-guojiufu@linux.ibm.com/","msgid":"<20221212013829.111739-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:38:29","name":"[V4,2/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-2-guojiufu@linux.ibm.com/mbox/"},{"id":32228,"url":"https://patchwork.plctlab.org/api/1.2/patches/32228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212014401.112147-1-guojiufu@linux.ibm.com/","msgid":"<20221212014401.112147-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:44:01","name":"[V2] rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212014401.112147-1-guojiufu@linux.ibm.com/mbox/"},{"id":32264,"url":"https://patchwork.plctlab.org/api/1.2/patches/32264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212075441.50129138F3@imap2.suse-dmz.suse.de/","msgid":"<20221212075441.50129138F3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-12T07:54:40","name":"tree-optimization/89317 - another pattern for &p->x != p + 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212075441.50129138F3@imap2.suse-dmz.suse.de/mbox/"},{"id":32266,"url":"https://patchwork.plctlab.org/api/1.2/patches/32266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212085020.40B6813456@imap2.suse-dmz.suse.de/","msgid":"<20221212085020.40B6813456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-12T08:50:19","name":"Revert parts of ADDR_EXPR/CONSTRUCTOR treatment change in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212085020.40B6813456@imap2.suse-dmz.suse.de/mbox/"},{"id":32346,"url":"https://patchwork.plctlab.org/api/1.2/patches/32346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a691b49a-b340-2c23-f047-ae546b183122@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T12:25:21","name":"[(pushed)] mklog: do not parse binary file for PR entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a691b49a-b340-2c23-f047-ae546b183122@suse.cz/mbox/"},{"id":32401,"url":"https://patchwork.plctlab.org/api/1.2/patches/32401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140113.716862-1-jwakely@redhat.com/","msgid":"<20221212140113.716862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:13","name":"[committed] libstdc++: Make operator<< for stacktraces less templated (LWG 3515)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140113.716862-1-jwakely@redhat.com/mbox/"},{"id":32402,"url":"https://patchwork.plctlab.org/api/1.2/patches/32402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140124.716909-1-jwakely@redhat.com/","msgid":"<20221212140124.716909-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:24","name":"[committed] libstdc++: Define atomic lock-free type aliases for C++20 [PR98034]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140124.716909-1-jwakely@redhat.com/mbox/"},{"id":32403,"url":"https://patchwork.plctlab.org/api/1.2/patches/32403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140132.716931-1-jwakely@redhat.com/","msgid":"<20221212140132.716931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:32","name":"[committed] libstdc++: Change names that clash with Win32 or Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140132.716931-1-jwakely@redhat.com/mbox/"},{"id":32405,"url":"https://patchwork.plctlab.org/api/1.2/patches/32405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140139.716962-1-jwakely@redhat.com/","msgid":"<20221212140139.716962-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:39","name":"[committed] libstdc++: Fix constraint on std::basic_format_string [PR108024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140139.716962-1-jwakely@redhat.com/mbox/"},{"id":32404,"url":"https://patchwork.plctlab.org/api/1.2/patches/32404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140146.716976-1-jwakely@redhat.com/","msgid":"<20221212140146.716976-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:46","name":"[committed] libstdc++: Add a test checking for chrono::duration overflows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140146.716976-1-jwakely@redhat.com/mbox/"},{"id":32452,"url":"https://patchwork.plctlab.org/api/1.2/patches/32452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cywimyy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:05","name":"[1/9] ipa-cp: Write transformation summaries of all functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cywimyy.fsf@suse.cz/mbox/"},{"id":32453,"url":"https://patchwork.plctlab.org/api/1.2/patches/32453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65yegimym.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:17","name":"[2/9] ipa: Better way of applying both IPA-CP and IPA-SRA (PR 103227)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65yegimym.fsf@suse.cz/mbox/"},{"id":32455,"url":"https://patchwork.plctlab.org/api/1.2/patches/32455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64ju0imyd.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:26","name":"[3/9] ipa-cp: Leave removal of unused parameters to IPA-SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64ju0imyd.fsf@suse.cz/mbox/"},{"id":32454,"url":"https://patchwork.plctlab.org/api/1.2/patches/32454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6359kimxk.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:55","name":"[4/9] ipa-sra: Treat REFERENCE_TYPES as always dereferencable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6359kimxk.fsf@suse.cz/mbox/"},{"id":32456,"url":"https://patchwork.plctlab.org/api/1.2/patches/32456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri61qp4imwz.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:16","name":"[5/9] ipa-sra: Move caller->callee propagation before callee->caller one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri61qp4imwz.fsf@suse.cz/mbox/"},{"id":32457,"url":"https://patchwork.plctlab.org/api/1.2/patches/32457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zgbsh8ca.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:25","name":"[6/9] ipa-sra: Be optimistic about Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zgbsh8ca.fsf@suse.cz/mbox/"},{"id":32460,"url":"https://patchwork.plctlab.org/api/1.2/patches/32460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1rch8bw.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:39","name":"[7/9] ipa-sra: Forward propagation of sizes which are safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1rch8bw.fsf@suse.cz/mbox/"},{"id":32458,"url":"https://patchwork.plctlab.org/api/1.2/patches/32458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6wn6wh8bn.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:48","name":"[8/9] ipa-sra: Make scan_expr_access bail out on uninteresting expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6wn6wh8bn.fsf@suse.cz/mbox/"},{"id":32459,"url":"https://patchwork.plctlab.org/api/1.2/patches/32459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8mgh8bg.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:55","name":"[9/9] ipa: Avoid looking for IPA-SRA replacements where there are none","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8mgh8bg.fsf@suse.cz/mbox/"},{"id":32463,"url":"https://patchwork.plctlab.org/api/1.2/patches/32463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172057.3527670-1-ppalka@redhat.com/","msgid":"<20221212172057.3527670-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-12T17:20:57","name":"c++: template friend with variadic constraints [PR108066]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172057.3527670-1-ppalka@redhat.com/mbox/"},{"id":32464,"url":"https://patchwork.plctlab.org/api/1.2/patches/32464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172749.49723-1-gcc@hazardy.de/","msgid":"<20221212172749.49723-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:27:49","name":"libstdc++: enable on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172749.49723-1-gcc@hazardy.de/mbox/"},{"id":32465,"url":"https://patchwork.plctlab.org/api/1.2/patches/32465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175508.50143-1-gcc@hazardy.de/","msgid":"<20221212175508.50143-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:55:08","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175508.50143-1-gcc@hazardy.de/mbox/"},{"id":32466,"url":"https://patchwork.plctlab.org/api/1.2/patches/32466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175601.50166-1-gcc@hazardy.de/","msgid":"<20221212175601.50166-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:56:01","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175601.50166-1-gcc@hazardy.de/mbox/"},{"id":32514,"url":"https://patchwork.plctlab.org/api/1.2/patches/32514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212192557.52896-1-ibuclaw@gdcproject.org/","msgid":"<20221212192557.52896-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-12T19:25:57","name":"[committed] d: Fix undefined reference to nested lambda in template (PR108055)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212192557.52896-1-ibuclaw@gdcproject.org/mbox/"},{"id":32526,"url":"https://patchwork.plctlab.org/api/1.2/patches/32526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7efcc196-d97a-4fa6-bd76-48e9eb90d528-1670876532663@3c-app-gmx-bs69/","msgid":"","list_archive_url":null,"date":"2022-12-12T20:22:12","name":"Fortran: NULL pointer dereference while parsing a function [PR107423]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7efcc196-d97a-4fa6-bd76-48e9eb90d528-1670876532663@3c-app-gmx-bs69/mbox/"},{"id":32546,"url":"https://patchwork.plctlab.org/api/1.2/patches/32546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWouEWbE=TkZ63D8fPeyJTKCVkLyobwsO5Go6BtDxib7g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-12T22:18:32","name":"libgo patch committed: Bump major version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWouEWbE=TkZ63D8fPeyJTKCVkLyobwsO5Go6BtDxib7g@mail.gmail.com/mbox/"},{"id":32597,"url":"https://patchwork.plctlab.org/api/1.2/patches/32597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com/","msgid":"<1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com>","list_archive_url":null,"date":"2022-12-13T02:31:15","name":"libgccjit: Allow comparing vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com/mbox/"},{"id":32649,"url":"https://patchwork.plctlab.org/api/1.2/patches/32649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5gZ0o1nzCq9MmR9@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-13T06:21:06","name":"[V2] Rework 128-bit complex multiply and divide, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5gZ0o1nzCq9MmR9@toto.the-meissners.org/mbox/"},{"id":32655,"url":"https://patchwork.plctlab.org/api/1.2/patches/32655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213064927.1416-1-shihua@iscas.ac.cn/","msgid":"<20221213064927.1416-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2022-12-13T06:49:27","name":"[RFC] RISC-V: Support RV64-ILP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213064927.1416-1-shihua@iscas.ac.cn/mbox/"},{"id":32721,"url":"https://patchwork.plctlab.org/api/1.2/patches/32721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hD4qnv/ddcKxyQ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:20:34","name":"i386: Fix up *concat*_{5,6,7} patterns [PR108044]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hD4qnv/ddcKxyQ@tucnak/mbox/"},{"id":32722,"url":"https://patchwork.plctlab.org/api/1.2/patches/32722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hFd0dYk/ijv5jQ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:27:19","name":"vect-patterns: Fix up vect_recog_rotate_pattern [PR108064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hFd0dYk/ijv5jQ@tucnak/mbox/"},{"id":32725,"url":"https://patchwork.plctlab.org/api/1.2/patches/32725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hHQJj9a5Fa4ILA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:34:56","name":"[committed] libsanitizer: Fix up libbacktrace build after r13-4547 [PR108072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hHQJj9a5Fa4ILA@tucnak/mbox/"},{"id":32727,"url":"https://patchwork.plctlab.org/api/1.2/patches/32727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hImCyw/3IIhGuT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:40:40","name":"c++, libstdc++: Add typeinfo for _Float{16,32,64,128,32x,64x} and __bf16 types [PR108075]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hImCyw/3IIhGuT@tucnak/mbox/"},{"id":32728,"url":"https://patchwork.plctlab.org/api/1.2/patches/32728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hJdyuDW5yvCyz6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:44:23","name":"libstdc++: Update backtrace-rename.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hJdyuDW5yvCyz6@tucnak/mbox/"},{"id":32748,"url":"https://patchwork.plctlab.org/api/1.2/patches/32748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213104156.A1875383EB15@sourceware.org/","msgid":"<20221213104156.A1875383EB15@sourceware.org>","list_archive_url":null,"date":"2022-12-13T10:41:10","name":"tree-optimization/108076 - if-conversion and forced labels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213104156.A1875383EB15@sourceware.org/mbox/"},{"id":32794,"url":"https://patchwork.plctlab.org/api/1.2/patches/32794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilifeb2h.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-12-13T12:35:02","name":"build: doc: Obsolete Solaris 11.3 support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilifeb2h.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":32833,"url":"https://patchwork.plctlab.org/api/1.2/patches/32833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213141055.10CCA383B6EC@sourceware.org/","msgid":"<20221213141055.10CCA383B6EC@sourceware.org>","list_archive_url":null,"date":"2022-12-13T14:10:09","name":"tree-optimization/105801 - CCP and .DEFERRED_INIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213141055.10CCA383B6EC@sourceware.org/mbox/"},{"id":32871,"url":"https://patchwork.plctlab.org/api/1.2/patches/32871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com/","msgid":"<0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com>","list_archive_url":null,"date":"2022-12-13T16:12:22","name":"[OG12,committed] OpenMP, libgomp: Handle unified shared memory in omp_target_is_accessible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com/mbox/"},{"id":32872,"url":"https://patchwork.plctlab.org/api/1.2/patches/32872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a599f6ae-ac6d-7c59-890a-104e4d5e3e1c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T16:29:26","name":"[Fortran] libgfortran'\''s ISO_Fortran_binding.c: Use GCC11 version for backward-only code [PR108056]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a599f6ae-ac6d-7c59-890a-104e4d5e3e1c@codesourcery.com/mbox/"},{"id":32873,"url":"https://patchwork.plctlab.org/api/1.2/patches/32873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa14a602-d3d2-c5f7-a5d6-62aff32b7b7e@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T16:38:22","name":"Fortran: Extend align-clause checks of OpenMP'\''s allocate clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa14a602-d3d2-c5f7-a5d6-62aff32b7b7e@codesourcery.com/mbox/"},{"id":32895,"url":"https://patchwork.plctlab.org/api/1.2/patches/32895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16700-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T17:14:27","name":"AArch64 Fix ILP32 tbranch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16700-tamar@arm.com/mbox/"},{"id":32901,"url":"https://patchwork.plctlab.org/api/1.2/patches/32901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com/","msgid":"<857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com>","list_archive_url":null,"date":"2022-12-13T17:44:27","name":"OpenMP: Parse align clause in allocate directive in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com/mbox/"},{"id":32923,"url":"https://patchwork.plctlab.org/api/1.2/patches/32923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-2-david.faust@oracle.com/","msgid":"<20221213184426.8861-2-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:24","name":"[v2,1/3] btf: add '\''extern'\'' linkage for variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-2-david.faust@oracle.com/mbox/"},{"id":32924,"url":"https://patchwork.plctlab.org/api/1.2/patches/32924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-3-david.faust@oracle.com/","msgid":"<20221213184426.8861-3-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:25","name":"[v2,2/3] btf: fix '\''extern const void'\'' variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-3-david.faust@oracle.com/mbox/"},{"id":32925,"url":"https://patchwork.plctlab.org/api/1.2/patches/32925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-4-david.faust@oracle.com/","msgid":"<20221213184426.8861-4-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:26","name":"[v2,3/3] btf: correct generation for extern funcs [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-4-david.faust@oracle.com/mbox/"},{"id":32946,"url":"https://patchwork.plctlab.org/api/1.2/patches/32946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213210247.50375-1-gcc@hazardy.de/","msgid":"<20221213210247.50375-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-13T21:02:47","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213210247.50375-1-gcc@hazardy.de/mbox/"},{"id":32964,"url":"https://patchwork.plctlab.org/api/1.2/patches/32964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213224548.853922-1-ibuclaw@gdcproject.org/","msgid":"<20221213224548.853922-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T22:45:48","name":"[GCC-12,committed] libphobos: Backport library and bindings fixes from mainline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213224548.853922-1-ibuclaw@gdcproject.org/mbox/"},{"id":32976,"url":"https://patchwork.plctlab.org/api/1.2/patches/32976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230344.872210-1-ibuclaw@gdcproject.org/","msgid":"<20221213230344.872210-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T23:03:44","name":"[GCC-11,committed] libphobos: Backport library and bindings fixes from mainline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230344.872210-1-ibuclaw@gdcproject.org/mbox/"},{"id":32977,"url":"https://patchwork.plctlab.org/api/1.2/patches/32977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230552.874531-1-ibuclaw@gdcproject.org/","msgid":"<20221213230552.874531-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T23:05:52","name":"[GCC-10,committed] libphobos: Fix std.path.expandTilde raising onOutOfMemory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230552.874531-1-ibuclaw@gdcproject.org/mbox/"},{"id":33011,"url":"https://patchwork.plctlab.org/api/1.2/patches/33011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e072e22428810ff407f96ce3d9e062b8@matoro.tk/","msgid":"","list_archive_url":null,"date":"2022-12-14T01:04:09","name":"libgo: add hppa as known target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e072e22428810ff407f96ce3d9e062b8@matoro.tk/mbox/"},{"id":33013,"url":"https://patchwork.plctlab.org/api/1.2/patches/33013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214014338.85391-1-haochen.jiang@intel.com/","msgid":"<20221214014338.85391-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-12-14T01:43:38","name":"Fix intrin name in Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214014338.85391-1-haochen.jiang@intel.com/mbox/"},{"id":33018,"url":"https://patchwork.plctlab.org/api/1.2/patches/33018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214021842.1015348-1-hongtao.liu@intel.com/","msgid":"<20221214021842.1015348-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-14T02:18:42","name":"[x86] x86: Don'\''t add crtfastmath.o for -shared and add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214021842.1015348-1-hongtao.liu@intel.com/mbox/"},{"id":33073,"url":"https://patchwork.plctlab.org/api/1.2/patches/33073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214064825.240605-1-juzhe.zhong@rivai.ai/","msgid":"<20221214064825.240605-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T06:48:25","name":"RISC-V: Fix RVV mask mode size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214064825.240605-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33074,"url":"https://patchwork.plctlab.org/api/1.2/patches/33074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214065744.124007-1-juzhe.zhong@rivai.ai/","msgid":"<20221214065744.124007-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T06:57:44","name":"RISC-V: Change vlmul printing rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214065744.124007-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33075,"url":"https://patchwork.plctlab.org/api/1.2/patches/33075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214070156.37689-1-juzhe.zhong@rivai.ai/","msgid":"<20221214070156.37689-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:01:56","name":"RISC-V: Fix RVV machine mode attribute configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214070156.37689-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33082,"url":"https://patchwork.plctlab.org/api/1.2/patches/33082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214071345.153278-1-juzhe.zhong@rivai.ai/","msgid":"<20221214071345.153278-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:13:45","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214071345.153278-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33085,"url":"https://patchwork.plctlab.org/api/1.2/patches/33085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073106.122871-1-juzhe.zhong@rivai.ai/","msgid":"<20221214073106.122871-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:31:06","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073106.122871-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33087,"url":"https://patchwork.plctlab.org/api/1.2/patches/33087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073111.124081-1-juzhe.zhong@rivai.ai/","msgid":"<20221214073111.124081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:31:11","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073111.124081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33089,"url":"https://patchwork.plctlab.org/api/1.2/patches/33089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214074848.39A3238358AD@sourceware.org/","msgid":"<20221214074848.39A3238358AD@sourceware.org>","list_archive_url":null,"date":"2022-12-14T07:48:03","name":"tree-optimization/107617 - big-endian .LEN_STORE VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214074848.39A3238358AD@sourceware.org/mbox/"},{"id":33090,"url":"https://patchwork.plctlab.org/api/1.2/patches/33090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz/","msgid":"<116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz>","list_archive_url":null,"date":"2022-12-14T07:55:01","name":"[(pushed)] docs: document --param=ipa-sra-ptrwrap-growth-factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz/mbox/"},{"id":33091,"url":"https://patchwork.plctlab.org/api/1.2/patches/33091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhict3i.fsf@debian/","msgid":"<87sfhict3i.fsf@debian>","list_archive_url":null,"date":"2022-12-14T08:00:49","name":"[v5,1a/19] modula2 front end: (long unedited patches).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhict3i.fsf@debian/mbox/"},{"id":33097,"url":"https://patchwork.plctlab.org/api/1.2/patches/33097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214080931.192028-1-juzhe.zhong@rivai.ai/","msgid":"<20221214080931.192028-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:09:31","name":"RISC-V: Add testcases for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214080931.192028-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33098,"url":"https://patchwork.plctlab.org/api/1.2/patches/33098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081301.218683-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081301.218683-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:13:01","name":"RISC-V: Add testcases for VSETVL PASS 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081301.218683-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33099,"url":"https://patchwork.plctlab.org/api/1.2/patches/33099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081548.253313-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081548.253313-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:15:48","name":"RISC-V: Add testcases for VSETVL PASS 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081548.253313-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33103,"url":"https://patchwork.plctlab.org/api/1.2/patches/33103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081935.256992-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081935.256992-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:19:35","name":"RISC-V: Add testcases for VSETVL PASS 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081935.256992-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33104,"url":"https://patchwork.plctlab.org/api/1.2/patches/33104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214082558.261570-1-juzhe.zhong@rivai.ai/","msgid":"<20221214082558.261570-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:25:58","name":"RISC-V: Add testcases for VSETVL PASS 5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214082558.261570-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33106,"url":"https://patchwork.plctlab.org/api/1.2/patches/33106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214083902.169785-1-juzhe.zhong@rivai.ai/","msgid":"<20221214083902.169785-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:39:02","name":"RISC-V: Fix annotation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214083902.169785-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33110,"url":"https://patchwork.plctlab.org/api/1.2/patches/33110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214085148.229220-1-juzhe.zhong@rivai.ai/","msgid":"<20221214085148.229220-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:51:48","name":"RISC-V: Remove unused redundant vector attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214085148.229220-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33116,"url":"https://patchwork.plctlab.org/api/1.2/patches/33116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5mT93N/K83jqSz7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-14T09:14:31","name":"rust: Fix up aarch64-linux bootstrap [PR106072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5mT93N/K83jqSz7@tucnak/mbox/"},{"id":33153,"url":"https://patchwork.plctlab.org/api/1.2/patches/33153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672593b-414a-d1b4-8e84-abdba0915410@suse.cz/","msgid":"<2672593b-414a-d1b4-8e84-abdba0915410@suse.cz>","list_archive_url":null,"date":"2022-12-14T10:34:24","name":"[(pushed)] mklog: do not depend on recent unidiff version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672593b-414a-d1b4-8e84-abdba0915410@suse.cz/mbox/"},{"id":33155,"url":"https://patchwork.plctlab.org/api/1.2/patches/33155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com/","msgid":"<11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com>","list_archive_url":null,"date":"2022-12-14T10:47:21","name":"Fortran/OpenMP: Add parsing support for allocators directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com/mbox/"},{"id":33160,"url":"https://patchwork.plctlab.org/api/1.2/patches/33160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com/","msgid":"<055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com>","list_archive_url":null,"date":"2022-12-14T11:21:20","name":"rs6000: Raise error for __vector_{quad, pair} uses without MMA enabled [PR106736]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com/mbox/"},{"id":33163,"url":"https://patchwork.plctlab.org/api/1.2/patches/33163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214113641.63320-1-juzhe.zhong@rivai.ai/","msgid":"<20221214113641.63320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T11:36:41","name":"RISC-V: Remove unit-stride store from ta attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214113641.63320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33197,"url":"https://patchwork.plctlab.org/api/1.2/patches/33197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0c0c26b-dbcd-9619-ee9c-f3ff3081f4ea@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:07:38","name":"[(pushed)] contrib: add copyright for my scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0c0c26b-dbcd-9619-ee9c-f3ff3081f4ea@suse.cz/mbox/"},{"id":33198,"url":"https://patchwork.plctlab.org/api/1.2/patches/33198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a95b8b6e-5685-52fa-0190-793eede45b19@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:10:32","name":"contrib: add contrib to update-copyright.py script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a95b8b6e-5685-52fa-0190-793eede45b19@suse.cz/mbox/"},{"id":33205,"url":"https://patchwork.plctlab.org/api/1.2/patches/33205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfRj26CgWLBq=9M4AsC5WhhXOW4s3ynbjoSt2n8mv6LbRA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:39:24","name":"libgccjit: Fix a failing test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfRj26CgWLBq=9M4AsC5WhhXOW4s3ynbjoSt2n8mv6LbRA@mail.gmail.com/mbox/"},{"id":33224,"url":"https://patchwork.plctlab.org/api/1.2/patches/33224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214141151.933092-1-jwakely@redhat.com/","msgid":"<20221214141151.933092-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-14T14:11:51","name":"[committed] libstdc++: Fix size passed to operator delete [PR108097]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214141151.933092-1-jwakely@redhat.com/mbox/"},{"id":33235,"url":"https://patchwork.plctlab.org/api/1.2/patches/33235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfhirp37.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T15:18:20","name":"ipa-sra: Fix address escape case when detecting Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfhirp37.fsf@suse.cz/mbox/"},{"id":33236,"url":"https://patchwork.plctlab.org/api/1.2/patches/33236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7s6rp25.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T15:18:58","name":"ipa-sra: Consider the first parameter of methods safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7s6rp25.fsf@suse.cz/mbox/"},{"id":33251,"url":"https://patchwork.plctlab.org/api/1.2/patches/33251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkry1rarli2.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T16:35:49","name":"[10/15,V6] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkry1rarli2.fsf_-_@arm.com/mbox/"},{"id":33254,"url":"https://patchwork.plctlab.org/api/1.2/patches/33254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrsfhirla6.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T16:40:33","name":"[12/15,V4] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrsfhirla6.fsf_-_@arm.com/mbox/"},{"id":33266,"url":"https://patchwork.plctlab.org/api/1.2/patches/33266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214174825.2340493-1-ppalka@redhat.com/","msgid":"<20221214174825.2340493-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-14T17:48:25","name":"c++: local alias in typename in lambda [PR105518]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214174825.2340493-1-ppalka@redhat.com/mbox/"},{"id":33320,"url":"https://patchwork.plctlab.org/api/1.2/patches/33320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccd68154-65bc-bd4b-be6b-cf71d00ee8e6@gmx.de/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:03:08","name":"gcov: annotate uncovered branches [PR107537]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccd68154-65bc-bd4b-be6b-cf71d00ee8e6@gmx.de/mbox/"},{"id":33358,"url":"https://patchwork.plctlab.org/api/1.2/patches/33358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5oy3GcsxSQ5xpgM@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:32:28","name":"[1/3,V3] PR 107299, Rework 128-bit complex multiply and divide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5oy3GcsxSQ5xpgM@toto.the-meissners.org/mbox/"},{"id":33360,"url":"https://patchwork.plctlab.org/api/1.2/patches/33360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozVm5L+crILT33@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:34:30","name":"[2/3,V3] PR 107299, Make __float128 use the _Float128 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozVm5L+crILT33@toto.the-meissners.org/mbox/"},{"id":33362,"url":"https://patchwork.plctlab.org/api/1.2/patches/33362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozoQgEvX1iAgY7@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:35:45","name":"[3/3,V3] PR 107299, Update float 128-bit conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozoQgEvX1iAgY7@toto.the-meissners.org/mbox/"},{"id":33374,"url":"https://patchwork.plctlab.org/api/1.2/patches/33374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214210938.356311-1-dmalcolm@redhat.com/","msgid":"<20221214210938.356311-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-14T21:09:38","name":"[committed] analyzer: don'\''t call binding_key::make on empty regions [PR108065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214210938.356311-1-dmalcolm@redhat.com/mbox/"},{"id":33394,"url":"https://patchwork.plctlab.org/api/1.2/patches/33394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcla8yz.fsf@euler.schwinge.homeip.net/","msgid":"<87pmcla8yz.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-14T22:58:28","name":"Make '\''-frust-incomplete-and-experimental-compiler-do-not-use'\'' a '\''Common'\'' option (was: Rust front-end patches v4)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcla8yz.fsf@euler.schwinge.homeip.net/mbox/"},{"id":33438,"url":"https://patchwork.plctlab.org/api/1.2/patches/33438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215000145.2381507-1-ppalka@redhat.com/","msgid":"<20221215000145.2381507-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-15T00:01:45","name":"c++: partial ordering with memfn pointer cst [PR108104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215000145.2381507-1-ppalka@redhat.com/mbox/"},{"id":33481,"url":"https://patchwork.plctlab.org/api/1.2/patches/33481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215052557.608641-1-jason@redhat.com/","msgid":"<20221215052557.608641-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-15T05:25:57","name":"[pushed] c++: fix initializer_list transformation [PR108071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215052557.608641-1-jason@redhat.com/mbox/"},{"id":33483,"url":"https://patchwork.plctlab.org/api/1.2/patches/33483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-1-hongtao.liu@intel.com/","msgid":"<20221215062137.3128845-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-15T06:21:36","name":"[V2,1/2] x86: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-1-hongtao.liu@intel.com/mbox/"},{"id":33484,"url":"https://patchwork.plctlab.org/api/1.2/patches/33484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-2-hongtao.liu@intel.com/","msgid":"<20221215062137.3128845-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-15T06:21:37","name":"[V2,2/2,x86] x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-2-hongtao.liu@intel.com/mbox/"},{"id":33542,"url":"https://patchwork.plctlab.org/api/1.2/patches/33542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5rSYNlWHHku4M/H@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-15T07:53:04","name":"into-ssa: Fix emitting debug stmts after asm goto [PR108095]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5rSYNlWHHku4M/H@tucnak/mbox/"},{"id":33567,"url":"https://patchwork.plctlab.org/api/1.2/patches/33567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215103253.896A8388CA4D@sourceware.org/","msgid":"<20221215103253.896A8388CA4D@sourceware.org>","list_archive_url":null,"date":"2022-12-15T10:32:06","name":"middle-end/108086 - reduce operand scanner use from inliner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215103253.896A8388CA4D@sourceware.org/mbox/"},{"id":33609,"url":"https://patchwork.plctlab.org/api/1.2/patches/33609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5sR1W/p4K0CEMRU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-15T12:23:49","name":"testsuite: Add support for Rust and Modula-2 effective target tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5sR1W/p4K0CEMRU@tucnak/mbox/"},{"id":33646,"url":"https://patchwork.plctlab.org/api/1.2/patches/33646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215130013.46408388CF26@sourceware.org/","msgid":"<20221215130013.46408388CF26@sourceware.org>","list_archive_url":null,"date":"2022-12-15T12:58:37","name":"middle-end/108086 - avoid quadraticness in copy_edges_for_bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215130013.46408388CF26@sourceware.org/mbox/"},{"id":33656,"url":"https://patchwork.plctlab.org/api/1.2/patches/33656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhgbuy0.fsf@debian/","msgid":"<87sfhgbuy0.fsf@debian>","list_archive_url":null,"date":"2022-12-15T14:30:47","name":"[committed,pushed] PR-107607 m2: Remove bdepend on realpath, cut and echo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhgbuy0.fsf@debian/mbox/"},{"id":33699,"url":"https://patchwork.plctlab.org/api/1.2/patches/33699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215161535.2731182-1-ppalka@redhat.com/","msgid":"<20221215161535.2731182-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-15T16:15:35","name":"c++: variadic using-decl with parm pack in terminal name [PR102104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215161535.2731182-1-ppalka@redhat.com/mbox/"},{"id":33710,"url":"https://patchwork.plctlab.org/api/1.2/patches/33710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215163340.1802736-1-siddhesh@gotplt.org/","msgid":"<20221215163340.1802736-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T16:33:40","name":"middle-end/70090: Document that -fsanitize=object-size uses dynamic size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215163340.1802736-1-siddhesh@gotplt.org/mbox/"},{"id":33732,"url":"https://patchwork.plctlab.org/api/1.2/patches/33732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215165814.1808816-1-siddhesh@gotplt.org/","msgid":"<20221215165814.1808816-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T16:58:14","name":"doc: Fix documentation for __builtin_dynamic_object_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215165814.1808816-1-siddhesh@gotplt.org/mbox/"},{"id":33778,"url":"https://patchwork.plctlab.org/api/1.2/patches/33778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a63ofrpf.fsf@euler.schwinge.homeip.net/","msgid":"<87a63ofrpf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-15T18:27:08","name":"nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution (was: [committed][nvptx] Add uniform_warp_check insn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a63ofrpf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":33799,"url":"https://patchwork.plctlab.org/api/1.2/patches/33799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215192548.1999425-1-siddhesh@gotplt.org/","msgid":"<20221215192548.1999425-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T19:25:48","name":"tree-optimization/105043: Object Size Checking docs cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215192548.1999425-1-siddhesh@gotplt.org/mbox/"},{"id":33802,"url":"https://patchwork.plctlab.org/api/1.2/patches/33802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com/","msgid":"<5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com>","list_archive_url":null,"date":"2022-12-15T19:28:44","name":"[committed,PR90706] IRA: Check that reg classes contain a hard reg of given mode in reg move cost calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com/mbox/"},{"id":33901,"url":"https://patchwork.plctlab.org/api/1.2/patches/33901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216083034.ACE883817F8B@sourceware.org/","msgid":"<20221216083034.ACE883817F8B@sourceware.org>","list_archive_url":null,"date":"2022-12-16T08:29:39","name":"middle-end/108086 - more operand scanner reduction in inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216083034.ACE883817F8B@sourceware.org/mbox/"},{"id":33913,"url":"https://patchwork.plctlab.org/api/1.2/patches/33913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5w2HuVCI8qOxaTP@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-16T09:10:54","name":"loop-invariant: Split preheader edge if the preheader bb ends with jump [PR106751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5w2HuVCI8qOxaTP@tucnak/mbox/"},{"id":33917,"url":"https://patchwork.plctlab.org/api/1.2/patches/33917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com/","msgid":"<780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com>","list_archive_url":null,"date":"2022-12-16T09:18:11","name":"gcc-changelog/git_email.py: Support older unidiff.PatchSet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com/mbox/"},{"id":33918,"url":"https://patchwork.plctlab.org/api/1.2/patches/33918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216092922.B1681382EF28@sourceware.org/","msgid":"<20221216092922.B1681382EF28@sourceware.org>","list_archive_url":null,"date":"2022-12-16T09:28:38","name":"middle-end/108086 - remove PR28238 fix superseeded by PR34018 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216092922.B1681382EF28@sourceware.org/mbox/"},{"id":33937,"url":"https://patchwork.plctlab.org/api/1.2/patches/33937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216102521.73271-1-sebastian.huber@embedded-brains.de/","msgid":"<20221216102521.73271-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-16T10:25:21","name":"[v2] gcov: Fix -fprofile-update=atomic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216102521.73271-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":33938,"url":"https://patchwork.plctlab.org/api/1.2/patches/33938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5xIHotpDlePrJwq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-16T10:27:42","name":"hwasan: Add libhwasan_preinit.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5xIHotpDlePrJwq@tucnak/mbox/"},{"id":33940,"url":"https://patchwork.plctlab.org/api/1.2/patches/33940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz/","msgid":"<8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz>","list_archive_url":null,"date":"2022-12-16T11:23:32","name":"[(pushed)] gcc-changelog: do not use PatchSet.from_filename","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz/mbox/"},{"id":33944,"url":"https://patchwork.plctlab.org/api/1.2/patches/33944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85ead47-3163-ff07-4f7b-63f53e2557ee@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T11:45:59","name":"[OG12,committed] libgomp: Fix USM bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85ead47-3163-ff07-4f7b-63f53e2557ee@codesourcery.com/mbox/"},{"id":33947,"url":"https://patchwork.plctlab.org/api/1.2/patches/33947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216120617.1A7CB384D6C3@sourceware.org/","msgid":"<20221216120617.1A7CB384D6C3@sourceware.org>","list_archive_url":null,"date":"2022-12-16T12:05:31","name":"middle-end/108086 - avoid unshare_expr when remapping SSA names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216120617.1A7CB384D6C3@sourceware.org/mbox/"},{"id":33948,"url":"https://patchwork.plctlab.org/api/1.2/patches/33948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5c3e7dc-2244-99ca-c584-f157eca131b4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T12:33:22","name":"gcc-changelog: Add warning for auto-added files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5c3e7dc-2244-99ca-c584-f157eca131b4@codesourcery.com/mbox/"},{"id":33955,"url":"https://patchwork.plctlab.org/api/1.2/patches/33955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216133437.56618383F208@sourceware.org/","msgid":"<20221216133437.56618383F208@sourceware.org>","list_archive_url":null,"date":"2022-12-16T13:33:53","name":"Simplify gimple_assign_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216133437.56618383F208@sourceware.org/mbox/"},{"id":33957,"url":"https://patchwork.plctlab.org/api/1.2/patches/33957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87k02r78va.fsf@debian/","msgid":"<87k02r78va.fsf@debian>","list_archive_url":null,"date":"2022-12-16T13:53:29","name":"[m2] Add missing m2.stage{profile,feedback} to Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87k02r78va.fsf@debian/mbox/"},{"id":33958,"url":"https://patchwork.plctlab.org/api/1.2/patches/33958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-12-16T14:10:12","name":"Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere (was: Make '\''-frust-incomplete-and-experimental-compiler-do-not-use'\'' a '\''Common'\'' option)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":33959,"url":"https://patchwork.plctlab.org/api/1.2/patches/33959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216143105.118483-1-jwakely@redhat.com/","msgid":"<20221216143105.118483-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T14:31:05","name":"[committed] libstdc++: Fix self-move for std::weak_ptr [PR108118]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216143105.118483-1-jwakely@redhat.com/mbox/"},{"id":33994,"url":"https://patchwork.plctlab.org/api/1.2/patches/33994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216161054.3663182-1-manolis.tsamis@vrull.eu/","msgid":"<20221216161054.3663182-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-12-16T16:10:54","name":"[v2] ipa-cp: Speculatively call specialized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216161054.3663182-1-manolis.tsamis@vrull.eu/mbox/"},{"id":34001,"url":"https://patchwork.plctlab.org/api/1.2/patches/34001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd877978-48c4-4a9b-66f9-a105d9901ec1@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T16:19:00","name":"nvptx/mkoffload.cc: Add dummy proc for OpenMP rev-offload table [PR108098]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd877978-48c4-4a9b-66f9-a105d9901ec1@codesourcery.com/mbox/"},{"id":34026,"url":"https://patchwork.plctlab.org/api/1.2/patches/34026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216164526.224772-1-ppalka@redhat.com/","msgid":"<20221216164526.224772-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-16T16:45:26","name":"c++: empty captured var as template argument [PR107437]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216164526.224772-1-ppalka@redhat.com/mbox/"},{"id":34031,"url":"https://patchwork.plctlab.org/api/1.2/patches/34031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170118.457649-1-dmalcolm@redhat.com/","msgid":"<20221216170118.457649-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T17:01:18","name":"gccrs: add selftest-rust-gdb and selftest-rust-valgrind \"make\" targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170118.457649-1-dmalcolm@redhat.com/mbox/"},{"id":34032,"url":"https://patchwork.plctlab.org/api/1.2/patches/34032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170152.457701-1-dmalcolm@redhat.com/","msgid":"<20221216170152.457701-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T17:01:52","name":"gccrs: avoid printing to stderr in selftest::rust_flatten_list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170152.457701-1-dmalcolm@redhat.com/mbox/"},{"id":34042,"url":"https://patchwork.plctlab.org/api/1.2/patches/34042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216182817.295303-1-polacek@redhat.com/","msgid":"<20221216182817.295303-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-12-16T18:28:17","name":"c-family: Fix ICE with -Wsuggest-attribute [PR98487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216182817.295303-1-polacek@redhat.com/mbox/"},{"id":34069,"url":"https://patchwork.plctlab.org/api/1.2/patches/34069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216195355.465351-1-dmalcolm@redhat.com/","msgid":"<20221216195355.465351-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T19:53:55","name":"[committed] analyzer: add src_region param to region_model::check_for_poison [PR106479]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216195355.465351-1-dmalcolm@redhat.com/mbox/"},{"id":34085,"url":"https://patchwork.plctlab.org/api/1.2/patches/34085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210028.161738-1-jwakely@redhat.com/","msgid":"<20221216210028.161738-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:00:28","name":"[committed] libstdc++: Diagnose broken allocator rebind members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210028.161738-1-jwakely@redhat.com/mbox/"},{"id":34086,"url":"https://patchwork.plctlab.org/api/1.2/patches/34086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210237.161771-1-jwakely@redhat.com/","msgid":"<20221216210237.161771-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:02:37","name":"[committed] libstdc++: Fixes for std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210237.161771-1-jwakely@redhat.com/mbox/"},{"id":34087,"url":"https://patchwork.plctlab.org/api/1.2/patches/34087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210251.162105-1-jwakely@redhat.com/","msgid":"<20221216210251.162105-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:02:51","name":"[committed] libstdc++: Add monadic operations to std::expected for C++23 (P2505R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210251.162105-1-jwakely@redhat.com/mbox/"},{"id":34091,"url":"https://patchwork.plctlab.org/api/1.2/patches/34091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216213132.578277-1-hjl.tools@gmail.com/","msgid":"<20221216213132.578277-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-12-16T21:31:32","name":"libsanitizer: Add __interceptor_sigsetjmp_internal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216213132.578277-1-hjl.tools@gmail.com/mbox/"},{"id":34100,"url":"https://patchwork.plctlab.org/api/1.2/patches/34100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5zpMNyFTOcgqqDf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-16T21:54:56","name":"[committed] Suppress warning from -fstack-protector on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5zpMNyFTOcgqqDf@mx3210.localdomain/mbox/"},{"id":34214,"url":"https://patchwork.plctlab.org/api/1.2/patches/34214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1r6aspb.fsf@debian/","msgid":"<87y1r6aspb.fsf@debian>","list_archive_url":null,"date":"2022-12-17T16:41:20","name":"[m2] : PR-108122 Reduce sleep times in gm2/pimcoroutines/run/pass/testtime.mod","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1r6aspb.fsf@debian/mbox/"},{"id":34218,"url":"https://patchwork.plctlab.org/api/1.2/patches/34218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com/","msgid":"<5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com>","list_archive_url":null,"date":"2022-12-17T17:12:43","name":"[fortran] PR107397 ICE in gfc_arith_plus, at fortran/arith.cc:654","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com/mbox/"},{"id":34269,"url":"https://patchwork.plctlab.org/api/1.2/patches/34269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f80f540e394e87ac70349bad109bfc4b465c7c98.1671310804.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-12-17T21:01:51","name":"rs6000: Add Rust support to traceback table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f80f540e394e87ac70349bad109bfc4b465c7c98.1671310804.git.segher@kernel.crashing.org/mbox/"},{"id":34270,"url":"https://patchwork.plctlab.org/api/1.2/patches/34270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-3d8a6fbe-9e01-4e21-960b-3fde6a9d9f51-1671312077244@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2022-12-17T21:21:17","name":"Fortran: incorrect array bounds when bound intrinsic used in decl [PR108131]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-3d8a6fbe-9e01-4e21-960b-3fde6a9d9f51-1671312077244@3c-app-gmx-bap49/mbox/"},{"id":34354,"url":"https://patchwork.plctlab.org/api/1.2/patches/34354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-2-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:28","name":"[v2,01/11] riscv: attr: Synchronize comments with code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-2-christoph.muellner@vrull.eu/mbox/"},{"id":34356,"url":"https://patchwork.plctlab.org/api/1.2/patches/34356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-3-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:29","name":"[v2,02/11] riscv: Restructure callee-saved register save/restore code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-3-christoph.muellner@vrull.eu/mbox/"},{"id":34360,"url":"https://patchwork.plctlab.org/api/1.2/patches/34360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-4-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:30","name":"[v2,03/11] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-4-christoph.muellner@vrull.eu/mbox/"},{"id":34357,"url":"https://patchwork.plctlab.org/api/1.2/patches/34357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-5-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:31","name":"[v2,04/11] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-5-christoph.muellner@vrull.eu/mbox/"},{"id":34361,"url":"https://patchwork.plctlab.org/api/1.2/patches/34361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-6-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:32","name":"[v2,05/11] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-6-christoph.muellner@vrull.eu/mbox/"},{"id":34358,"url":"https://patchwork.plctlab.org/api/1.2/patches/34358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-7-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:33","name":"[v2,06/11] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-7-christoph.muellner@vrull.eu/mbox/"},{"id":34359,"url":"https://patchwork.plctlab.org/api/1.2/patches/34359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-8-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:34","name":"[v2,07/11] riscv: thead: Add support for th XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-8-christoph.muellner@vrull.eu/mbox/"},{"id":34362,"url":"https://patchwork.plctlab.org/api/1.2/patches/34362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-9-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:35","name":"[v2,08/11] riscv: thead: Add support for XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-9-christoph.muellner@vrull.eu/mbox/"},{"id":34363,"url":"https://patchwork.plctlab.org/api/1.2/patches/34363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-10-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:36","name":"[v2,09/11] riscv: thead: Add support for XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-10-christoph.muellner@vrull.eu/mbox/"},{"id":34364,"url":"https://patchwork.plctlab.org/api/1.2/patches/34364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-11-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-11-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:37","name":"[v2,10/11] riscv: thead: Add support for XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-11-christoph.muellner@vrull.eu/mbox/"},{"id":34365,"url":"https://patchwork.plctlab.org/api/1.2/patches/34365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-12-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-12-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:38","name":"[v2,11/11] riscv: thead: Add support for XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-12-christoph.muellner@vrull.eu/mbox/"},{"id":34452,"url":"https://patchwork.plctlab.org/api/1.2/patches/34452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com/","msgid":"<3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com>","list_archive_url":null,"date":"2022-12-19T06:27:57","name":"[v6,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com/mbox/"},{"id":34453,"url":"https://patchwork.plctlab.org/api/1.2/patches/34453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e66cfc44-22c1-072d-0af2-b9fe585012a9@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T08:11:59","name":"fold-const: Treat fp conversion to a type with same mode as copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e66cfc44-22c1-072d-0af2-b9fe585012a9@linux.ibm.com/mbox/"},{"id":34458,"url":"https://patchwork.plctlab.org/api/1.2/patches/34458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz/","msgid":"<59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz>","list_archive_url":null,"date":"2022-12-19T09:02:28","name":"[(pushed)] gcc-changelog: stop using --flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz/mbox/"},{"id":34463,"url":"https://patchwork.plctlab.org/api/1.2/patches/34463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8e44598-adb6-8b3a-292b-6bef4622c86a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T09:09:09","name":"gfortran.dg/read_dir.f90: Make PASS on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8e44598-adb6-8b3a-292b-6bef4622c86a@codesourcery.com/mbox/"},{"id":34457,"url":"https://patchwork.plctlab.org/api/1.2/patches/34457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6A9BBI4OAIb0s9a@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T10:29:24","name":"[committed] testsuite: Fix up pr107397.f90 test [PR107397]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6A9BBI4OAIb0s9a@tucnak/mbox/"},{"id":34474,"url":"https://patchwork.plctlab.org/api/1.2/patches/34474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BFjLgQdwlgkNnZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:05:48","name":"c: Diagnose compound literals with function type [PR108043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BFjLgQdwlgkNnZ@tucnak/mbox/"},{"id":34475,"url":"https://patchwork.plctlab.org/api/1.2/patches/34475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BG1P7KYDd9dayC@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:11:16","name":"modula2: Fix up bootstrap on powerpc64le-linux [PR108147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BG1P7KYDd9dayC@tucnak/mbox/"},{"id":34477,"url":"https://patchwork.plctlab.org/api/1.2/patches/34477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111147.1768-1-juzhe.zhong@rivai.ai/","msgid":"<20221219111147.1768-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T11:11:47","name":"RISC-V: Simplify ASM checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111147.1768-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34478,"url":"https://patchwork.plctlab.org/api/1.2/patches/34478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111357.4515-1-juzhe.zhong@rivai.ai/","msgid":"<20221219111357.4515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T11:13:57","name":"RISC-V: Simplify ASM checks 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111357.4515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34479,"url":"https://patchwork.plctlab.org/api/1.2/patches/34479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BI10ixEqaLah04@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:19:51","name":"modula2: Don'\''t treat % in Modula 2 messages specially","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BI10ixEqaLah04@tucnak/mbox/"},{"id":34535,"url":"https://patchwork.plctlab.org/api/1.2/patches/34535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6Be2p6281yCqfoq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T12:53:46","name":"[committed] testsuite: Fix up pr64536.c for LLP64 targets [PR108151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6Be2p6281yCqfoq@tucnak/mbox/"},{"id":34546,"url":"https://patchwork.plctlab.org/api/1.2/patches/34546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz/","msgid":"<0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz>","list_archive_url":null,"date":"2022-12-19T13:40:29","name":"[(pushed)] gcc-changelog: allow digit in component name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz/mbox/"},{"id":34555,"url":"https://patchwork.plctlab.org/api/1.2/patches/34555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b85e2aab-e7a1-cbeb-f5bc-c465e32834a4@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-19T13:56:34","name":"[(pushed)] gcc-changelog: support digits in PR'\''s component in subject","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b85e2aab-e7a1-cbeb-f5bc-c465e32834a4@suse.cz/mbox/"},{"id":34558,"url":"https://patchwork.plctlab.org/api/1.2/patches/34558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219140645.34011-1-guojiufu@linux.ibm.com/","msgid":"<20221219140645.34011-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-19T14:06:45","name":"[V7] rs6000: Optimize cmp on rotated 16bits constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219140645.34011-1-guojiufu@linux.ibm.com/mbox/"},{"id":34557,"url":"https://patchwork.plctlab.org/api/1.2/patches/34557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BwMS8xkhs1IKk1@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T14:07:45","name":"[committed] testsuite: Fix up pr64536.c for LLP64 targets [PR108151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BwMS8xkhs1IKk1@tucnak/mbox/"},{"id":34599,"url":"https://patchwork.plctlab.org/api/1.2/patches/34599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b50e7ca3-c2c2-c91f-c0c6-c284c7e35c60@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T14:56:55","name":"PR tree-optimization/108139 - Don'\''t use PHI equivalences in range-on-entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b50e7ca3-c2c2-c91f-c0c6-c284c7e35c60@redhat.com/mbox/"},{"id":34606,"url":"https://patchwork.plctlab.org/api/1.2/patches/34606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219150626.2972660-1-rearnsha@arm.com/","msgid":"<20221219150626.2972660-1-rearnsha@arm.com>","list_archive_url":null,"date":"2022-12-19T15:06:26","name":"[committed] arm: correctly define __ARM_FEATURE_CLZ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219150626.2972660-1-rearnsha@arm.com/mbox/"},{"id":34614,"url":"https://patchwork.plctlab.org/api/1.2/patches/34614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219153607.E229F13498@imap2.suse-dmz.suse.de/","msgid":"<20221219153607.E229F13498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-19T15:36:07","name":"tree-optimization/108164 - undefined overflow with IV vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219153607.E229F13498@imap2.suse-dmz.suse.de/mbox/"},{"id":34639,"url":"https://patchwork.plctlab.org/api/1.2/patches/34639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219160245.55745-1-sebastian.huber@embedded-brains.de/","msgid":"<20221219160245.55745-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-19T16:02:45","name":"libatomic: Provide gthr.h default implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219160245.55745-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":34653,"url":"https://patchwork.plctlab.org/api/1.2/patches/34653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219165922.25443-1-soeren@soeren-tempel.net/","msgid":"<20221219165922.25443-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-12-19T16:59:22","name":"libgo: check if -lucontext is required for {make, set, get}context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219165922.25443-1-soeren@soeren-tempel.net/mbox/"},{"id":34761,"url":"https://patchwork.plctlab.org/api/1.2/patches/34761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-1-thomas@codesourcery.com/","msgid":"<20221219204007.2818567-1-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-19T20:40:06","name":"[1/2] Add '\''gcc.target/nvptx/softstack-decl-1.c'\'', '\''gcc.target/nvptx/uniform-simt-decl-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-1-thomas@codesourcery.com/mbox/"},{"id":34762,"url":"https://patchwork.plctlab.org/api/1.2/patches/34762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-2-thomas@codesourcery.com/","msgid":"<20221219204007.2818567-2-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-19T20:40:07","name":"[2/2] nvptx: Prevent emitting duplicate declarations for '\''__nvptx_stacks'\'', '\''__nvptx_uni'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-2-thomas@codesourcery.com/mbox/"},{"id":34830,"url":"https://patchwork.plctlab.org/api/1.2/patches/34830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219230935.89797-1-juzhe.zhong@rivai.ai/","msgid":"<20221219230935.89797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T23:09:35","name":"RISC-V: Fix muti-line condition format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219230935.89797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34831,"url":"https://patchwork.plctlab.org/api/1.2/patches/34831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219231354.135626-1-juzhe.zhong@rivai.ai/","msgid":"<20221219231354.135626-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T23:13:54","name":"RISC-V: Fix incorrect annotation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219231354.135626-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34973,"url":"https://patchwork.plctlab.org/api/1.2/patches/34973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87len2cxwj.fsf@euler.schwinge.homeip.net/","msgid":"<87len2cxwj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-20T07:55:08","name":"[PING^2] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87len2cxwj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":34984,"url":"https://patchwork.plctlab.org/api/1.2/patches/34984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsdacxi0.fsf@euler.schwinge.homeip.net/","msgid":"<87fsdacxi0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-20T08:03:51","name":"[PING] nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsdacxi0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":34987,"url":"https://patchwork.plctlab.org/api/1.2/patches/34987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220081549.339006-1-dkm@kataplop.net/","msgid":"<20221220081549.339006-1-dkm@kataplop.net>","list_archive_url":null,"date":"2022-12-20T08:15:49","name":"[COMMITTED] rust: fix link serialization [PR108113]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220081549.339006-1-dkm@kataplop.net/mbox/"},{"id":34994,"url":"https://patchwork.plctlab.org/api/1.2/patches/34994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6F2oT1HjoJRCIL6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-20T08:47:29","name":"libstdc++: Don'\''t call 4-5 argument to_chars with chars_format{}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6F2oT1HjoJRCIL6@tucnak/mbox/"},{"id":35000,"url":"https://patchwork.plctlab.org/api/1.2/patches/35000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3d6033e-2ae1-dbd0-8839-dd6329149f8c@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T09:22:04","name":"testsuite: Fix pr55569.c excess errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3d6033e-2ae1-dbd0-8839-dd6329149f8c@gmail.com/mbox/"},{"id":35027,"url":"https://patchwork.plctlab.org/api/1.2/patches/35027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6GRTuxVgQmxSZT5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-20T10:41:18","name":"aarch64: Fix plugin header install","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6GRTuxVgQmxSZT5@tucnak/mbox/"},{"id":35029,"url":"https://patchwork.plctlab.org/api/1.2/patches/35029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-1-arsen@aarsen.me/","msgid":"<20221220104916.3000540-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:14","name":"[1/3] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-1-arsen@aarsen.me/mbox/"},{"id":35030,"url":"https://patchwork.plctlab.org/api/1.2/patches/35030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-2-arsen@aarsen.me/","msgid":"<20221220104916.3000540-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:15","name":"[2/3] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-2-arsen@aarsen.me/mbox/"},{"id":35031,"url":"https://patchwork.plctlab.org/api/1.2/patches/35031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-3-arsen@aarsen.me/","msgid":"<20221220104916.3000540-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:16","name":"[3/3] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-3-arsen@aarsen.me/mbox/"},{"id":35051,"url":"https://patchwork.plctlab.org/api/1.2/patches/35051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220122323.3863293-1-manolis.tsamis@vrull.eu/","msgid":"<20221220122323.3863293-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-12-20T12:23:23","name":"[v3] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220122323.3863293-1-manolis.tsamis@vrull.eu/mbox/"},{"id":35090,"url":"https://patchwork.plctlab.org/api/1.2/patches/35090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220133626.05C2B1390E@imap2.suse-dmz.suse.de/","msgid":"<20221220133626.05C2B1390E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-20T13:36:25","name":"d/104749 - document host GDC version requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220133626.05C2B1390E@imap2.suse-dmz.suse.de/mbox/"},{"id":35109,"url":"https://patchwork.plctlab.org/api/1.2/patches/35109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145116.223955-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145116.223955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:51:16","name":"RISC-V: Remove side effects of vsetvl/vsetvlmax intriniscs in properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145116.223955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35114,"url":"https://patchwork.plctlab.org/api/1.2/patches/35114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145649.232331-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145649.232331-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:56:49","name":"RISC-V: Remove side effects of vsetvl pattern in RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145649.232331-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35116,"url":"https://patchwork.plctlab.org/api/1.2/patches/35116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145847.234303-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145847.234303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:58:47","name":"RISC-V: Update vsetvl/vsetvlmax intrinsics to the latest api name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145847.234303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35119,"url":"https://patchwork.plctlab.org/api/1.2/patches/35119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220153034.2746407-1-ppalka@redhat.com/","msgid":"<20221220153034.2746407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-20T15:30:34","name":"c++, tree: walk TREE_VEC (and VECTOR_CST) in natural order [PR101886]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220153034.2746407-1-ppalka@redhat.com/mbox/"},{"id":35139,"url":"https://patchwork.plctlab.org/api/1.2/patches/35139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/FF9C7E0B-5DF6-4FC2-B3C2-29F3CBCBE147@oracle.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T16:16:30","name":"gcc-13/changes.html: Mention -fstrict-flex-arrays and its impact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/FF9C7E0B-5DF6-4FC2-B3C2-29F3CBCBE147@oracle.com/mbox/"},{"id":35165,"url":"https://patchwork.plctlab.org/api/1.2/patches/35165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at/","msgid":"<95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-20T19:08:02","name":"[C] remove same_translation_unit_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at/mbox/"},{"id":35188,"url":"https://patchwork.plctlab.org/api/1.2/patches/35188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d347c3e7-b009-48e8-b790-9380995fd72a-1671568823481@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2022-12-20T20:40:23","name":"Fortran: a C interoperable function cannot have the CLASS attribute [PR95375]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d347c3e7-b009-48e8-b790-9380995fd72a-1671568823481@3c-app-gmx-bs49/mbox/"},{"id":35195,"url":"https://patchwork.plctlab.org/api/1.2/patches/35195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16717-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T21:32:19","name":"AArch64 relax constraints on FP16 insn PR108172","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16717-tamar@arm.com/mbox/"},{"id":35235,"url":"https://patchwork.plctlab.org/api/1.2/patches/35235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com/","msgid":"<6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T03:16:36","name":"[committed] rs6000: Fix the wrong location of OPTION_MASK_P10_FUSION setting hunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com/mbox/"},{"id":35268,"url":"https://patchwork.plctlab.org/api/1.2/patches/35268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221062736.78036-1-guojiufu@linux.ibm.com/","msgid":"<20221221062736.78036-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T06:27:36","name":"loading float member of parameter stored via int registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221062736.78036-1-guojiufu@linux.ibm.com/mbox/"},{"id":35289,"url":"https://patchwork.plctlab.org/api/1.2/patches/35289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz/","msgid":"<84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz>","list_archive_url":null,"date":"2022-12-21T08:05:21","name":"[(pushed)] libgccjit: silent 2 Clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz/mbox/"},{"id":35290,"url":"https://patchwork.plctlab.org/api/1.2/patches/35290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d730a0-3ae8-3dd0-848b-09ad67542bde@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:05:39","name":"go: fix clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d730a0-3ae8-3dd0-848b-09ad67542bde@suse.cz/mbox/"},{"id":35296,"url":"https://patchwork.plctlab.org/api/1.2/patches/35296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LB8TGAbA1fAFe4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:21:05","name":"[committed] modula2: Fix lto profiledbootstrap on powerpc64le-linux and s390x-linux [PR108153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LB8TGAbA1fAFe4@tucnak/mbox/"},{"id":35297,"url":"https://patchwork.plctlab.org/api/1.2/patches/35297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LCdySCuQk6V90v@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:23:19","name":"[committed] openmp: Don'\''t try to destruct DECL_OMP_PRIVATIZED_MEMBER vars [PR108180]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LCdySCuQk6V90v@tucnak/mbox/"},{"id":35305,"url":"https://patchwork.plctlab.org/api/1.2/patches/35305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com/","msgid":"<718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T09:02:17","name":"[RFC/PATCH] Remove the workaround for _Float128 precision [PR107299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com/mbox/"},{"id":35346,"url":"https://patchwork.plctlab.org/api/1.2/patches/35346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LxPU/HBAJ0fFQl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-21T11:42:53","name":"Make -fwhole-program to work with incremental LTO linking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LxPU/HBAJ0fFQl@kam.mff.cuni.cz/mbox/"},{"id":35348,"url":"https://patchwork.plctlab.org/api/1.2/patches/35348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221121237.8718613913@imap2.suse-dmz.suse.de/","msgid":"<20221221121237.8718613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-21T12:12:37","name":"middle-end/107994 - ICE after error with comparison gimplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221121237.8718613913@imap2.suse-dmz.suse.de/mbox/"},{"id":35352,"url":"https://patchwork.plctlab.org/api/1.2/patches/35352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cyl0wb8.fsf@debian/","msgid":"<877cyl0wb8.fsf@debian>","list_archive_url":null,"date":"2022-12-21T12:34:51","name":"modula2: PR-108119 Disable m2 plugin m2rte","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cyl0wb8.fsf@debian/mbox/"},{"id":35358,"url":"https://patchwork.plctlab.org/api/1.2/patches/35358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221130901.39779-1-iain@sandoe.co.uk/","msgid":"<20221221130901.39779-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-21T13:09:01","name":"[pushed] libffi: Fix X86 32b Darwin build and EH frames.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221130901.39779-1-iain@sandoe.co.uk/mbox/"},{"id":35359,"url":"https://patchwork.plctlab.org/api/1.2/patches/35359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-2-dimitrije.milosevic@syrmia.com/","msgid":"<20221221131214.190579-2-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-12-21T13:12:13","name":"[1/2] ivopts: Compute complexity for unsupported addressing modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-2-dimitrije.milosevic@syrmia.com/mbox/"},{"id":35360,"url":"https://patchwork.plctlab.org/api/1.2/patches/35360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-3-dimitrije.milosevic@syrmia.com/","msgid":"<20221221131214.190579-3-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-12-21T13:12:14","name":"[2/2] ivopts: Revert register pressure cost when there are enough registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-3-dimitrije.milosevic@syrmia.com/mbox/"},{"id":35391,"url":"https://patchwork.plctlab.org/api/1.2/patches/35391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221145254.389983-1-ppalka@redhat.com/","msgid":"<20221221145254.389983-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-21T14:52:54","name":"c++: get_nsdmi in template context [PR108116]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221145254.389983-1-ppalka@redhat.com/mbox/"},{"id":35424,"url":"https://patchwork.plctlab.org/api/1.2/patches/35424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com/","msgid":"<7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com>","list_archive_url":null,"date":"2022-12-21T15:51:25","name":"Fortran/OpenMP: Add parsing support for allocators/allocate directive (was: [Patch] Fortran/OpenMP: Add parsing support for allocators directive)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com/mbox/"},{"id":35487,"url":"https://patchwork.plctlab.org/api/1.2/patches/35487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221183103.3800844-1-christoph.muellner@vrull.eu/","msgid":"<20221221183103.3800844-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-21T18:31:03","name":"[RFC] RISC-V: Add support for vector crypto extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221183103.3800844-1-christoph.muellner@vrull.eu/mbox/"},{"id":35543,"url":"https://patchwork.plctlab.org/api/1.2/patches/35543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-2-siddhesh@gotplt.org/","msgid":"<20221221222554.4141678-2-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-21T22:25:53","name":"[1/2] testsuite: Run __bos tests to completion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-2-siddhesh@gotplt.org/mbox/"},{"id":35540,"url":"https://patchwork.plctlab.org/api/1.2/patches/35540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-3-siddhesh@gotplt.org/","msgid":"<20221221222554.4141678-3-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-21T22:25:54","name":"[2/2] tree-object-size: More consistent behaviour with flex arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-3-siddhesh@gotplt.org/mbox/"},{"id":35004,"url":"https://patchwork.plctlab.org/api/1.2/patches/35004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222002711.116962-1-lipeng.zhu@intel.com/","msgid":"<20221222002711.116962-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-22T00:27:11","name":"libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222002711.116962-1-lipeng.zhu@intel.com/mbox/"},{"id":35032,"url":"https://patchwork.plctlab.org/api/1.2/patches/35032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222021947.117891-1-lipeng.zhu@intel.com/","msgid":"<20221222021947.117891-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-22T02:19:47","name":"libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222021947.117891-1-lipeng.zhu@intel.com/mbox/"},{"id":35644,"url":"https://patchwork.plctlab.org/api/1.2/patches/35644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222084321.7263613918@imap2.suse-dmz.suse.de/","msgid":"<20221222084321.7263613918@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T08:43:21","name":"Compare DECL_NOT_FLEXARRAY for LTO tree merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222084321.7263613918@imap2.suse-dmz.suse.de/mbox/"},{"id":35665,"url":"https://patchwork.plctlab.org/api/1.2/patches/35665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101538.660256-1-jwakely@redhat.com/","msgid":"<20221222101538.660256-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T10:15:38","name":"[committed] libstdc++: Add [[nodiscard]] in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101538.660256-1-jwakely@redhat.com/mbox/"},{"id":35666,"url":"https://patchwork.plctlab.org/api/1.2/patches/35666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101547.660304-1-jwakely@redhat.com/","msgid":"<20221222101547.660304-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T10:15:47","name":"[committed] libstdc++: Define and use variable templates in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101547.660304-1-jwakely@redhat.com/mbox/"},{"id":35667,"url":"https://patchwork.plctlab.org/api/1.2/patches/35667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QwCSX4gGzWstiF@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:23:05","name":"cse: Fix up CSE const_anchor handling [PR108193]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QwCSX4gGzWstiF@tucnak/mbox/"},{"id":35669,"url":"https://patchwork.plctlab.org/api/1.2/patches/35669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QxsdUy2S2w//u/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:30:09","name":"phiopt: Drop SSA_NAME_RANGE_INFO in maybe equal case [PR108166]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QxsdUy2S2w//u/@tucnak/mbox/"},{"id":35670,"url":"https://patchwork.plctlab.org/api/1.2/patches/35670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QyU5d2RLvwMP/q@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:32:51","name":"c, c++, cgraphunit: Prevent duplicated -Wunused-value warnings [PR108079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QyU5d2RLvwMP/q@tucnak/mbox/"},{"id":35673,"url":"https://patchwork.plctlab.org/api/1.2/patches/35673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-1-arsen@aarsen.me/","msgid":"<20221222110306.3869396-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:06","name":"[1/3] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-1-arsen@aarsen.me/mbox/"},{"id":35674,"url":"https://patchwork.plctlab.org/api/1.2/patches/35674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-2-arsen@aarsen.me/","msgid":"<20221222110306.3869396-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:07","name":"[2/3] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-2-arsen@aarsen.me/mbox/"},{"id":35675,"url":"https://patchwork.plctlab.org/api/1.2/patches/35675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-3-arsen@aarsen.me/","msgid":"<20221222110306.3869396-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:08","name":"[3/3] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-3-arsen@aarsen.me/mbox/"},{"id":35684,"url":"https://patchwork.plctlab.org/api/1.2/patches/35684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222112019.9549E138FD@imap2.suse-dmz.suse.de/","msgid":"<20221222112019.9549E138FD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T11:20:19","name":"tree-optimization/107451 - SLP load vectorization issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222112019.9549E138FD@imap2.suse-dmz.suse.de/mbox/"},{"id":35745,"url":"https://patchwork.plctlab.org/api/1.2/patches/35745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6RTdCmstcJUoFnU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T12:54:12","name":"phiopt: Adjust instead of reset phires range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6RTdCmstcJUoFnU@tucnak/mbox/"},{"id":35767,"url":"https://patchwork.plctlab.org/api/1.2/patches/35767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222132150.37277138FD@imap2.suse-dmz.suse.de/","msgid":"<20221222132150.37277138FD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T13:21:49","name":"testsuite/107809 - fix vect-recurr testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222132150.37277138FD@imap2.suse-dmz.suse.de/mbox/"},{"id":35815,"url":"https://patchwork.plctlab.org/api/1.2/patches/35815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222145404.2AB0313918@imap2.suse-dmz.suse.de/","msgid":"<20221222145404.2AB0313918@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T14:54:03","name":"bootstrap/106482 - document minimal GCC version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222145404.2AB0313918@imap2.suse-dmz.suse.de/mbox/"},{"id":35880,"url":"https://patchwork.plctlab.org/api/1.2/patches/35880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rizz7xv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:04:12","name":"[1/15,V2] arm: Make mbranch-protection opts parsing common to AArch32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rizz7xv.fsf_-_@arm.com/mbox/"},{"id":35881,"url":"https://patchwork.plctlab.org/api/1.2/patches/35881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SObwpkw+HVsLtx@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:05:51","name":"[committed] docs: Link to correct section for constraint modifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SObwpkw+HVsLtx@e124511.cambridge.arm.com/mbox/"},{"id":35882,"url":"https://patchwork.plctlab.org/api/1.2/patches/35882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOeoevE0LQJdzF@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:06:02","name":"[committed] docs: Fix inconsistent example predicate name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOeoevE0LQJdzF@e124511.cambridge.arm.com/mbox/"},{"id":35883,"url":"https://patchwork.plctlab.org/api/1.2/patches/35883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOhUlYMGLtprFN@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:06:13","name":"[committed] docs: Fix peephole paragraph ordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOhUlYMGLtprFN@e124511.cambridge.arm.com/mbox/"},{"id":35885,"url":"https://patchwork.plctlab.org/api/1.2/patches/35885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr3597z7hl.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:13:58","name":"[12/15,V5] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr3597z7hl.fsf_-_@arm.com/mbox/"},{"id":35884,"url":"https://patchwork.plctlab.org/api/1.2/patches/35884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222171645.12064-1-jose.marchesi@oracle.com/","msgid":"<20221222171645.12064-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-22T17:16:45","name":"Disable sched1 in functions that call setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222171645.12064-1-jose.marchesi@oracle.com/mbox/"},{"id":35887,"url":"https://patchwork.plctlab.org/api/1.2/patches/35887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222173208.13317-1-jose.marchesi@oracle.com/","msgid":"<20221222173208.13317-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-22T17:32:08","name":"[V2] Disable sched1 in functions that call setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222173208.13317-1-jose.marchesi@oracle.com/mbox/"},{"id":35888,"url":"https://patchwork.plctlab.org/api/1.2/patches/35888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at/","msgid":"<9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T17:41:22","name":"[C] (for STAGE 1) Reorganize comptypes and related functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at/mbox/"},{"id":35889,"url":"https://patchwork.plctlab.org/api/1.2/patches/35889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SW+ErptI8cj+EC@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:42:16","name":"[5/8,v2] middle-end: Add cltz_complement idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SW+ErptI8cj+EC@e124511.cambridge.arm.com/mbox/"},{"id":35890,"url":"https://patchwork.plctlab.org/api/1.2/patches/35890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXCOp3jLSRgPkv@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:42:32","name":"[6/8,v2] docs: Add popcount, clz and ctz target attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXCOp3jLSRgPkv@e124511.cambridge.arm.com/mbox/"},{"id":35891,"url":"https://patchwork.plctlab.org/api/1.2/patches/35891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXOd4qtp4SX2qP@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:43:21","name":"[9/8] middle-end: Allow build_popcount_expr to use an IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXOd4qtp4SX2qP@e124511.cambridge.arm.com/mbox/"},{"id":35892,"url":"https://patchwork.plctlab.org/api/1.2/patches/35892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at/","msgid":"<710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T17:44:27","name":"[C] (for STAGE 1) UBSan instrumentation for assignment of VM types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at/mbox/"},{"id":35941,"url":"https://patchwork.plctlab.org/api/1.2/patches/35941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at/","msgid":"<5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T20:13:57","name":"regression tests for 103770 fixed on trunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at/mbox/"},{"id":35960,"url":"https://patchwork.plctlab.org/api/1.2/patches/35960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b54c9233-525b-4b08-b8cf-f7451c36cb72-1671743584325@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2022-12-22T21:13:04","name":"Fortran: check for invalid uses of statement functions arguments [PR69604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b54c9233-525b-4b08-b8cf-f7451c36cb72-1671743584325@3c-app-gmx-bap55/mbox/"},{"id":35965,"url":"https://patchwork.plctlab.org/api/1.2/patches/35965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6TPrATjd0SO/UrA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T21:44:12","name":"phiopt, v2: Adjust instead of reset phires range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6TPrATjd0SO/UrA@tucnak/mbox/"},{"id":35990,"url":"https://patchwork.plctlab.org/api/1.2/patches/35990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com/","msgid":"<001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-22T23:09:31","name":"[x86] PR target/106933: Limit TImode STV to SSA-like def-use chains.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com/mbox/"},{"id":35991,"url":"https://patchwork.plctlab.org/api/1.2/patches/35991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com/","msgid":"<001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-22T23:19:21","name":"[x86] PR target/107548: Handle vec_select in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com/mbox/"},{"id":36006,"url":"https://patchwork.plctlab.org/api/1.2/patches/36006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233704.772013-1-jwakely@redhat.com/","msgid":"<20221222233704.772013-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:37:04","name":"[committed] libstdc++: Implement C++20 time zone support in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233704.772013-1-jwakely@redhat.com/mbox/"},{"id":36005,"url":"https://patchwork.plctlab.org/api/1.2/patches/36005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233804.772229-1-jwakely@redhat.com/","msgid":"<20221222233804.772229-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:38:04","name":"[committed] libstdc++: Add GDB printers for types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233804.772229-1-jwakely@redhat.com/mbox/"},{"id":36008,"url":"https://patchwork.plctlab.org/api/1.2/patches/36008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233816.772318-1-jwakely@redhat.com/","msgid":"<20221222233816.772318-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:38:16","name":"[committed] libstdc++: Add helper function in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233816.772318-1-jwakely@redhat.com/mbox/"},{"id":36007,"url":"https://patchwork.plctlab.org/api/1.2/patches/36007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233957.2866911-1-jason@redhat.com/","msgid":"<20221222233957.2866911-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:39:57","name":"[pushed] testsuite: don'\''t declare printf in coro.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233957.2866911-1-jason@redhat.com/mbox/"},{"id":36010,"url":"https://patchwork.plctlab.org/api/1.2/patches/36010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234015.772332-1-jwakely@redhat.com/","msgid":"<20221222234015.772332-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:40:15","name":"[committed] libstdc++: Add std::format support to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234015.772332-1-jwakely@redhat.com/mbox/"},{"id":36009,"url":"https://patchwork.plctlab.org/api/1.2/patches/36009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234112.772515-1-jwakely@redhat.com/","msgid":"<20221222234112.772515-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:41:12","name":"[committed] libstdc++: Avoid recursion in __nothrow_wait_cv::wait [PR105730]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234112.772515-1-jwakely@redhat.com/mbox/"},{"id":36027,"url":"https://patchwork.plctlab.org/api/1.2/patches/36027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223005246.38622-1-juzhe.zhong@rivai.ai/","msgid":"<20221223005246.38622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T00:52:46","name":"RISC-V: Support vle.v/vse.v intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223005246.38622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36109,"url":"https://patchwork.plctlab.org/api/1.2/patches/36109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223033306.264797-1-juzhe.zhong@rivai.ai/","msgid":"<20221223033306.264797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T03:33:06","name":"RISC-V: Fix vle constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223033306.264797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36138,"url":"https://patchwork.plctlab.org/api/1.2/patches/36138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com/","msgid":"<9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2022-12-23T06:06:55","name":"[1/1] Fixed typo in RISCV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com/mbox/"},{"id":36164,"url":"https://patchwork.plctlab.org/api/1.2/patches/36164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223093357.3170-1-jose.marchesi@oracle.com/","msgid":"<20221223093357.3170-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T09:33:57","name":"[WWWDOCS] htdocs: news: GCC BPF in Compiler Explorer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223093357.3170-1-jose.marchesi@oracle.com/mbox/"},{"id":36175,"url":"https://patchwork.plctlab.org/api/1.2/patches/36175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223094421.832354-1-jwakely@redhat.com/","msgid":"<20221223094421.832354-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-23T09:44:21","name":"[committed] libstdc++: Remove problematic static_assert from src/c++20/tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223094421.832354-1-jwakely@redhat.com/mbox/"},{"id":36193,"url":"https://patchwork.plctlab.org/api/1.2/patches/36193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223095013.3630-1-jose.marchesi@oracle.com/","msgid":"<20221223095013.3630-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T09:50:13","name":"[WWWDOCS] htdocs: add an Atom feed for GCC news","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223095013.3630-1-jose.marchesi@oracle.com/mbox/"},{"id":36198,"url":"https://patchwork.plctlab.org/api/1.2/patches/36198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223100601.4485-1-jose.marchesi@oracle.com/","msgid":"<20221223100601.4485-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T10:06:01","name":"[WWWDOCS] htdocs: rotate news","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223100601.4485-1-jose.marchesi@oracle.com/mbox/"},{"id":36234,"url":"https://patchwork.plctlab.org/api/1.2/patches/36234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com/","msgid":"<856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:54","name":"[v6,01/11] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36236,"url":"https://patchwork.plctlab.org/api/1.2/patches/36236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com/","msgid":"<2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:55","name":"[v6,02/11] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36239,"url":"https://patchwork.plctlab.org/api/1.2/patches/36239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com/","msgid":"<44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:56","name":"[v6,03/11] OpenMP/OpenACC: Refine condition for when map clause expansion happens","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36237,"url":"https://patchwork.plctlab.org/api/1.2/patches/36237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e97712f8f441bddd839f6b8dcea549f6ef247b71.1671796516.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-23T12:12:57","name":"[v6,04/11] OpenMP: implicitly map base pointer for array-section pointer components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e97712f8f441bddd839f6b8dcea549f6ef247b71.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36241,"url":"https://patchwork.plctlab.org/api/1.2/patches/36241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com/","msgid":"<4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:58","name":"[v6,05/11] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36235,"url":"https://patchwork.plctlab.org/api/1.2/patches/36235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com/","msgid":"<1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:59","name":"[v6,06/11] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36238,"url":"https://patchwork.plctlab.org/api/1.2/patches/36238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com/","msgid":"<3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:00","name":"[v6,07/11] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36243,"url":"https://patchwork.plctlab.org/api/1.2/patches/36243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com/","msgid":"<7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:01","name":"[v6,08/11] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36242,"url":"https://patchwork.plctlab.org/api/1.2/patches/36242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb79a146432898f400ad52e364b0c7d27098f0ca.1671796516.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-23T12:13:02","name":"[v6,09/11] OpenMP: lvalue parsing for map clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb79a146432898f400ad52e364b0c7d27098f0ca.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36244,"url":"https://patchwork.plctlab.org/api/1.2/patches/36244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com/","msgid":"<59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:03","name":"[v6,10/11] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36240,"url":"https://patchwork.plctlab.org/api/1.2/patches/36240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com/","msgid":"<1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:04","name":"[v6,11/11] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36259,"url":"https://patchwork.plctlab.org/api/1.2/patches/36259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223124227.199969-1-juzhe.zhong@rivai.ai/","msgid":"<20221223124227.199969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T12:42:27","name":"RISC-V: Fix ICE for avl_info deprecated copy and pp_print error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223124227.199969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36276,"url":"https://patchwork.plctlab.org/api/1.2/patches/36276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7rup7f8.fsf@euler.schwinge.homeip.net/","msgid":"<87o7rup7f8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-23T13:37:47","name":"nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7rup7f8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":36277,"url":"https://patchwork.plctlab.org/api/1.2/patches/36277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223134717.852611-1-jwakely@redhat.com/","msgid":"<20221223134717.852611-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-23T13:47:17","name":"[committed] libstdc++: Fix Darwin bootstrap error in src/c++20/tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223134717.852611-1-jwakely@redhat.com/mbox/"},{"id":36279,"url":"https://patchwork.plctlab.org/api/1.2/patches/36279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ili2p60p.fsf@euler.schwinge.homeip.net/","msgid":"<87ili2p60p.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-23T14:08:06","name":"nvptx: '\''-mframe-malloc-threshold'\'', '\''-Wframe-malloc-threshold'\'' (was: Handling of large stack objects in GPU code generation -- maybe transform into heap allocation?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ili2p60p.fsf@euler.schwinge.homeip.net/mbox/"},{"id":36290,"url":"https://patchwork.plctlab.org/api/1.2/patches/36290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6XIZvKyJ+uzQEKl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-23T15:25:26","name":"[committed] tree-ssa-dom: can_infer_simple_equiv fixes [PR108068]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6XIZvKyJ+uzQEKl@tucnak/mbox/"},{"id":36301,"url":"https://patchwork.plctlab.org/api/1.2/patches/36301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz/","msgid":"<677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz>","list_archive_url":null,"date":"2022-12-23T15:44:04","name":"strlen: do not use cond_expr for boundaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz/mbox/"},{"id":36310,"url":"https://patchwork.plctlab.org/api/1.2/patches/36310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com/","msgid":"<00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-23T16:46:06","name":"[x86] Use movss/movsd to implement V4SI/V2DI VEC_PERM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com/mbox/"},{"id":36312,"url":"https://patchwork.plctlab.org/api/1.2/patches/36312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223170619.38428-1-iain@sandoe.co.uk/","msgid":"<20221223170619.38428-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-23T17:06:19","name":"libstdc++, configure: Fix GLIBCXX_ZONEINFO_DIR configuration macro.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223170619.38428-1-iain@sandoe.co.uk/mbox/"},{"id":36384,"url":"https://patchwork.plctlab.org/api/1.2/patches/36384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224030800.221397-1-juzhe.zhong@rivai.ai/","msgid":"<20221224030800.221397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-24T03:08:00","name":"RISC-V: Fix ICE of visiting non-existing block in CFG.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224030800.221397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36403,"url":"https://patchwork.plctlab.org/api/1.2/patches/36403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224113525.20201-1-iain@sandoe.co.uk/","msgid":"<20221224113525.20201-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:35:25","name":"libstdc++: Export the __gnu_cxx::zoneinfo_dir_override symbol.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224113525.20201-1-iain@sandoe.co.uk/mbox/"},{"id":36404,"url":"https://patchwork.plctlab.org/api/1.2/patches/36404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114009.20261-1-iain@sandoe.co.uk/","msgid":"<20221224114009.20261-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:40:09","name":"libstdc++: Test for tzdata.zi before fallback version files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114009.20261-1-iain@sandoe.co.uk/mbox/"},{"id":36405,"url":"https://patchwork.plctlab.org/api/1.2/patches/36405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114234.20419-1-iain@sandoe.co.uk/","msgid":"<20221224114234.20419-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:42:34","name":"libstdc++, testsuite: Correct an init.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114234.20419-1-iain@sandoe.co.uk/mbox/"},{"id":36438,"url":"https://patchwork.plctlab.org/api/1.2/patches/36438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224174957.95123-1-iain@sandoe.co.uk/","msgid":"<20221224174957.95123-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T17:49:57","name":"[pushed] libgcc, Darwin: No early install for the compatibility libgcc_s.1.dylib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224174957.95123-1-iain@sandoe.co.uk/mbox/"},{"id":36439,"url":"https://patchwork.plctlab.org/api/1.2/patches/36439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190049.99806-1-iain@sandoe.co.uk/","msgid":"<20221224190049.99806-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T19:00:49","name":"Ada, Darwin: Do not link libgcc statically on Darwin [PR108202].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190049.99806-1-iain@sandoe.co.uk/mbox/"},{"id":36440,"url":"https://patchwork.plctlab.org/api/1.2/patches/36440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190343.3490-1-softwaresale01@gmail.com/","msgid":"<20221224190343.3490-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2022-12-24T19:03:43","name":"cp: warn uninitialized const/ref in base class [PR80681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190343.3490-1-softwaresale01@gmail.com/mbox/"},{"id":36454,"url":"https://patchwork.plctlab.org/api/1.2/patches/36454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com/","msgid":"<006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-24T22:13:36","name":"[Committed] Tweak new gcc.target/i386/pr107548-1.c for -march=cascadelake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com/mbox/"},{"id":36466,"url":"https://patchwork.plctlab.org/api/1.2/patches/36466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221225115141.A09EC33E8A@hamza.pair.com/","msgid":"<20221225115141.A09EC33E8A@hamza.pair.com>","list_archive_url":null,"date":"2022-12-25T11:51:39","name":"[committed] wwwdocs: gcc-12: Spelling fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221225115141.A09EC33E8A@hamza.pair.com/mbox/"},{"id":36568,"url":"https://patchwork.plctlab.org/api/1.2/patches/36568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org/","msgid":"<881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org>","list_archive_url":null,"date":"2022-12-26T08:55:45","name":"[Bug,c/108224] add srandom random initstate setstate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org/mbox/"},{"id":36647,"url":"https://patchwork.plctlab.org/api/1.2/patches/36647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8lyi5nn.fsf@debian/","msgid":"<87v8lyi5nn.fsf@debian>","list_archive_url":null,"date":"2022-12-26T14:46:52","name":"[modula2] PR-108142 Remove empty directories created in the build directory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8lyi5nn.fsf@debian/mbox/"},{"id":36671,"url":"https://patchwork.plctlab.org/api/1.2/patches/36671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6nbJLinJtSPip+8@mars/","msgid":"","list_archive_url":null,"date":"2022-12-26T17:34:28","name":"Add support for x86_64-*-gnu-* targets to build x86_64 gnumach/hurd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6nbJLinJtSPip+8@mars/mbox/"},{"id":36703,"url":"https://patchwork.plctlab.org/api/1.2/patches/36703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org/","msgid":"<2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org>","list_archive_url":null,"date":"2022-12-26T20:50:23","name":"Bugzilla Bug 81649 [PATCH]: Clarify LeakSanitizer in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org/mbox/"},{"id":36704,"url":"https://patchwork.plctlab.org/api/1.2/patches/36704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3166f68-a988-7476-bc71-7f3eb6d20deb@jguk.org/","msgid":"","list_archive_url":null,"date":"2022-12-26T21:00:05","name":"[PATCHJ] : Bugzilla 88860 - Clarify online manual infelicities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3166f68-a988-7476-bc71-7f3eb6d20deb@jguk.org/mbox/"},{"id":36705,"url":"https://patchwork.plctlab.org/api/1.2/patches/36705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/750917f3-555a-a5b8-9d55-261b0883153f@jguk.org/","msgid":"<750917f3-555a-a5b8-9d55-261b0883153f@jguk.org>","list_archive_url":null,"date":"2022-12-26T21:04:31","name":"Bugzilla 88860 - Clarify gcc online manual attribute format printf example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/750917f3-555a-a5b8-9d55-261b0883153f@jguk.org/mbox/"},{"id":36709,"url":"https://patchwork.plctlab.org/api/1.2/patches/36709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com/","msgid":"<7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com>","list_archive_url":null,"date":"2022-12-26T22:26:29","name":"[fortran] ICE in attr_decl1, at fortran/decl.c:8691","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com/mbox/"},{"id":36762,"url":"https://patchwork.plctlab.org/api/1.2/patches/36762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora639h4u9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:02:06","name":"[RFC] Introduce -finline-memset-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora639h4u9.fsf@lxoliva.fsfla.org/mbox/"},{"id":36761,"url":"https://patchwork.plctlab.org/api/1.2/patches/36761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydxh4l4.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:07:35","name":"[00/13] check hash table counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydxh4l4.fsf@lxoliva.fsfla.org/mbox/"},{"id":36763,"url":"https://patchwork.plctlab.org/api/1.2/patches/36763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qolh455.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:17:10","name":"[01/13] scoped tables: insert before further lookups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qolh455.fsf@lxoliva.fsfla.org/mbox/"},{"id":36764,"url":"https://patchwork.plctlab.org/api/1.2/patches/36764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6dfpia.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:18:37","name":"[02/13] varpool: do not add NULL vnodes to referenced","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6dfpia.fsf@lxoliva.fsfla.org/mbox/"},{"id":36765,"url":"https://patchwork.plctlab.org/api/1.2/patches/36765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfh1fpgc.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:19:47","name":"[03/13] tree-inline decl_map: skip mapping NULL to itself","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfh1fpgc.fsf@lxoliva.fsfla.org/mbox/"},{"id":36766,"url":"https://patchwork.plctlab.org/api/1.2/patches/36766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7rpfpcx.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:21:50","name":"[04/13,C++] constraint: insert norm entry once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7rpfpcx.fsf@lxoliva.fsfla.org/mbox/"},{"id":36767,"url":"https://patchwork.plctlab.org/api/1.2/patches/36767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork02dfpbv.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:22:28","name":"[05/13] ssa-loop-niter: skip caching of null operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork02dfpbv.fsf@lxoliva.fsfla.org/mbox/"},{"id":36769,"url":"https://patchwork.plctlab.org/api/1.2/patches/36769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsd1fpad.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:23:22","name":"[06/13] tree-inline decl_map: skip mapping result'\''s NULL default def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsd1fpad.fsf@lxoliva.fsfla.org/mbox/"},{"id":36768,"url":"https://patchwork.plctlab.org/api/1.2/patches/36768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbknpfp8w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:24:15","name":"[07/13] postreload-gcse: no insert on mere lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbknpfp8w.fsf@lxoliva.fsfla.org/mbox/"},{"id":36770,"url":"https://patchwork.plctlab.org/api/1.2/patches/36770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jthfp1e.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:28:45","name":"[08/13] tm: complete tm_restart insertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jthfp1e.fsf@lxoliva.fsfla.org/mbox/"},{"id":36771,"url":"https://patchwork.plctlab.org/api/1.2/patches/36771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzgb9eaev.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:30:00","name":"[09/13,C++] constexpr: request insert iff depth is ok","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzgb9eaev.fsf@lxoliva.fsfla.org/mbox/"},{"id":36772,"url":"https://patchwork.plctlab.org/api/1.2/patches/36772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8lxea5a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:35:45","name":"[10/13] lto: drop dummy partition mapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8lxea5a.fsf@lxoliva.fsfla.org/mbox/"},{"id":36773,"url":"https://patchwork.plctlab.org/api/1.2/patches/36773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0wlea1j.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:38:00","name":"[11/13] ada: don'\''t map NULL decl to locus","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0wlea1j.fsf@lxoliva.fsfla.org/mbox/"},{"id":36774,"url":"https://patchwork.plctlab.org/api/1.2/patches/36774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt79ea05.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:38:50","name":"[12/13] hash set: reject attempts to add empty values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt79ea05.fsf@lxoliva.fsfla.org/mbox/"},{"id":36775,"url":"https://patchwork.plctlab.org/api/1.2/patches/36775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilhxe9z1.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:39:30","name":"[13/13] hash-map: reject empty-looking insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilhxe9z1.fsf@lxoliva.fsfla.org/mbox/"},{"id":36778,"url":"https://patchwork.plctlab.org/api/1.2/patches/36778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d559758f-8e1d-3513-b5d2-055d123f87b2@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-12-27T06:30:12","name":"xtensa: Apply a few minor fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d559758f-8e1d-3513-b5d2-055d123f87b2@yahoo.co.jp/mbox/"},{"id":36780,"url":"https://patchwork.plctlab.org/api/1.2/patches/36780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227064246.2149251-1-chenglulu@loongson.cn/","msgid":"<20221227064246.2149251-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-27T06:42:47","name":"[v4] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227064246.2149251-1-chenglulu@loongson.cn/mbox/"},{"id":36935,"url":"https://patchwork.plctlab.org/api/1.2/patches/36935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227152127.57251-1-kito.cheng@sifive.com/","msgid":"<20221227152127.57251-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-12-27T15:21:27","name":"RISC-V: Return const ref. for vl_vtype_info::get_avl_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227152127.57251-1-kito.cheng@sifive.com/mbox/"},{"id":36943,"url":"https://patchwork.plctlab.org/api/1.2/patches/36943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227153018.100423-1-kito.cheng@sifive.com/","msgid":"<20221227153018.100423-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-12-27T15:30:18","name":"[committed] RISC-V: Add riscv_vector.h wrapper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227153018.100423-1-kito.cheng@sifive.com/mbox/"},{"id":36948,"url":"https://patchwork.plctlab.org/api/1.2/patches/36948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-1-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:01","name":"[COMMITTED,1/4] xtensa: Tabify, and trim trailing spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-1-jcmvbkbc@gmail.com/mbox/"},{"id":36946,"url":"https://patchwork.plctlab.org/api/1.2/patches/36946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-2-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:02","name":"[COMMITTED,2/4] xtensa: Clean up xtensa_expand_prologue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-2-jcmvbkbc@gmail.com/mbox/"},{"id":36945,"url":"https://patchwork.plctlab.org/api/1.2/patches/36945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-3-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-3-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:03","name":"[COMMITTED,3/4] xtensa: Change GP_RETURN{, _REG_COUNT} to GP_RETURN_{FIRST, LAST}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-3-jcmvbkbc@gmail.com/mbox/"},{"id":36944,"url":"https://patchwork.plctlab.org/api/1.2/patches/36944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-4-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-4-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:04","name":"[COMMITTED,4/4] xtensa: Generate density instructions in set_frame_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-4-jcmvbkbc@gmail.com/mbox/"},{"id":36947,"url":"https://patchwork.plctlab.org/api/1.2/patches/36947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154456.111741-1-jcmvbkbc@gmail.com/","msgid":"<20221227154456.111741-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:56","name":"[COMMITTED] gcc: xtensa: use define_c_enums instead of define_constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154456.111741-1-jcmvbkbc@gmail.com/mbox/"},{"id":37048,"url":"https://patchwork.plctlab.org/api/1.2/patches/37048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com/","msgid":"<00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T00:06:08","name":"[x86] Use ix86_expand_clear in ix86_split_ashl.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com/mbox/"},{"id":37050,"url":"https://patchwork.plctlab.org/api/1.2/patches/37050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com/","msgid":"<00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T00:32:52","name":"[x86_64] Add post-reload splitter for extendditi2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com/mbox/"},{"id":37060,"url":"https://patchwork.plctlab.org/api/1.2/patches/37060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com/","msgid":"<00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T01:15:23","name":"[x86] Provide zero_extend versions/variants of several patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com/mbox/"},{"id":37099,"url":"https://patchwork.plctlab.org/api/1.2/patches/37099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228040154.778-1-shihua@iscas.ac.cn/","msgid":"<20221228040154.778-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2022-12-28T04:01:54","name":"[RFC,v2] Support RV64-ILP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228040154.778-1-shihua@iscas.ac.cn/mbox/"},{"id":37103,"url":"https://patchwork.plctlab.org/api/1.2/patches/37103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051108.196702-1-juzhe.zhong@rivai.ai/","msgid":"<20221228051108.196702-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-28T05:11:08","name":"RISC-V: Fix pointer tree type for store pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051108.196702-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37104,"url":"https://patchwork.plctlab.org/api/1.2/patches/37104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051947.219604-1-juzhe.zhong@rivai.ai/","msgid":"<20221228051947.219604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-28T05:19:47","name":"RISC-V: Change form of iterating blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051947.219604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37128,"url":"https://patchwork.plctlab.org/api/1.2/patches/37128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz/","msgid":"<10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz>","list_archive_url":null,"date":"2022-12-28T08:16:54","name":"c: check if target_clone attrs are all string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz/mbox/"},{"id":37152,"url":"https://patchwork.plctlab.org/api/1.2/patches/37152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d23be938-e91f-2f5b-f85f-c9e8105e272b@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-28T09:18:57","name":"docs: fix Var documentation for .opt files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d23be938-e91f-2f5b-f85f-c9e8105e272b@suse.cz/mbox/"},{"id":37185,"url":"https://patchwork.plctlab.org/api/1.2/patches/37185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora637emmo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:30:39","name":"[14/17] parloops: don'\''t request insert that won'\''t be completed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora637emmo.fsf@lxoliva.fsfla.org/mbox/"},{"id":37189,"url":"https://patchwork.plctlab.org/api/1.2/patches/37189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydvemiz.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:32:52","name":"[15/17] prevent hash set/map insertion of deleted entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydvemiz.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":37192,"url":"https://patchwork.plctlab.org/api/1.2/patches/37192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qojelwj.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:46:20","name":"[16/17] check hash table counts at expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qojelwj.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":37193,"url":"https://patchwork.plctlab.org/api/1.2/patches/37193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6bd759.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:50:26","name":"[17/17] check hash table insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6bd759.fsf@lxoliva.fsfla.org/mbox/"},{"id":37208,"url":"https://patchwork.plctlab.org/api/1.2/patches/37208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSexdb8vqz4JJH@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-28T14:28:11","name":"[1/2] libstdc++: Normalise _GLIBCXX20_DEPRECATED macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSexdb8vqz4JJH@Thaum.localdomain/mbox/"},{"id":37209,"url":"https://patchwork.plctlab.org/api/1.2/patches/37209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSiYH9k9JrId6H@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-28T14:28:25","name":"[2/2] libstdc++: Implement P1413R3 '\''deprecate aligned_storage and aligned_union'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSiYH9k9JrId6H@Thaum.localdomain/mbox/"},{"id":37261,"url":"https://patchwork.plctlab.org/api/1.2/patches/37261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228181817.193462-1-rzinsly@ventanamicro.com/","msgid":"<20221228181817.193462-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-28T18:18:17","name":"RISC-V: Optimize min/max with SImode sources on 64-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228181817.193462-1-rzinsly@ventanamicro.com/mbox/"},{"id":37371,"url":"https://patchwork.plctlab.org/api/1.2/patches/37371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp/","msgid":"<1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp>","list_archive_url":null,"date":"2022-12-29T12:14:33","name":"xtensa: Check DF availability before use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp/mbox/"},{"id":37419,"url":"https://patchwork.plctlab.org/api/1.2/patches/37419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229153402.40958-1-juzhe.zhong@rivai.ai/","msgid":"<20221229153402.40958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-29T15:34:02","name":"RISC-V: Fix inferior codegen for vse intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229153402.40958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37453,"url":"https://patchwork.plctlab.org/api/1.2/patches/37453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229171432.236445-1-jcmvbkbc@gmail.com/","msgid":"<20221229171432.236445-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-29T17:14:32","name":"[COMMITTED] gcc: xtensa: use GP_RETURN_* instead of magic constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229171432.236445-1-jcmvbkbc@gmail.com/mbox/"},{"id":37151,"url":"https://patchwork.plctlab.org/api/1.2/patches/37151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230001607.2232962-1-lipeng.zhu@intel.com/","msgid":"<20221230001607.2232962-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-30T00:16:07","name":"[v2] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230001607.2232962-1-lipeng.zhu@intel.com/mbox/"},{"id":37625,"url":"https://patchwork.plctlab.org/api/1.2/patches/37625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230094132.15562-1-iain@sandoe.co.uk/","msgid":"<20221230094132.15562-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T09:41:32","name":"[1/n] modula-2: Fix building the plugin for Darwin [PR107612].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230094132.15562-1-iain@sandoe.co.uk/mbox/"},{"id":37629,"url":"https://patchwork.plctlab.org/api/1.2/patches/37629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230095949.45279-1-iain@sandoe.co.uk/","msgid":"<20221230095949.45279-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T09:59:49","name":"[2/n] modula-2, libgm2: Add undefined, dynamic_lookup to m2 libs links.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230095949.45279-1-iain@sandoe.co.uk/mbox/"},{"id":37637,"url":"https://patchwork.plctlab.org/api/1.2/patches/37637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230100627.14753-1-iain@sandoe.co.uk/","msgid":"<20221230100627.14753-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:06:27","name":"[3/n] modula2: Ensure that module registration constructors are '\''extern'\'' [PR108183].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230100627.14753-1-iain@sandoe.co.uk/mbox/"},{"id":37638,"url":"https://patchwork.plctlab.org/api/1.2/patches/37638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230102046.8287-1-iain@sandoe.co.uk/","msgid":"<20221230102046.8287-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:20:46","name":"Darwin, crts: Provide scalb and significand as a crt [PR107631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230102046.8287-1-iain@sandoe.co.uk/mbox/"},{"id":37639,"url":"https://patchwork.plctlab.org/api/1.2/patches/37639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org/","msgid":"<66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org>","list_archive_url":null,"date":"2022-12-30T10:30:22","name":"update copyright year in libstdcc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org/mbox/"},{"id":37641,"url":"https://patchwork.plctlab.org/api/1.2/patches/37641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230105821.61331-1-iain@sandoe.co.uk/","msgid":"<20221230105821.61331-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:58:21","name":"[4/n] modula-2, driver: Handle static-libstd++ for targets without static/dynamic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230105821.61331-1-iain@sandoe.co.uk/mbox/"},{"id":37717,"url":"https://patchwork.plctlab.org/api/1.2/patches/37717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc46419f69db826cab8742ecd967308584848c3.1672420755.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-30T17:21:37","name":"preprocessor: Don'\''t register pragmas in directives-only mode [PR108244]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc46419f69db826cab8742ecd967308584848c3.1672420755.git.lhyatt@gmail.com/mbox/"},{"id":37866,"url":"https://patchwork.plctlab.org/api/1.2/patches/37866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231135721.10758-1-iain@sandoe.co.uk/","msgid":"<20221231135721.10758-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T13:57:21","name":"modula-2, doc: Build dvi, ps and pdf doc in the gcc/doc directory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231135721.10758-1-iain@sandoe.co.uk/mbox/"},{"id":37867,"url":"https://patchwork.plctlab.org/api/1.2/patches/37867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231140347.10890-1-iain@sandoe.co.uk/","msgid":"<20221231140347.10890-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T14:03:47","name":"Modula-2, testsuite: No 96 bit floating type on Darwin.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231140347.10890-1-iain@sandoe.co.uk/mbox/"},{"id":37868,"url":"https://patchwork.plctlab.org/api/1.2/patches/37868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231141610.11021-1-iain@sandoe.co.uk/","msgid":"<20221231141610.11021-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T14:16:10","name":"configure: Do not build the unused libffi shared library.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231141610.11021-1-iain@sandoe.co.uk/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-12/mbox/"},{"id":14,"url":"https://patchwork.plctlab.org/api/1.2/bundles/14/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-01/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-01","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":37954,"url":"https://patchwork.plctlab.org/api/1.2/patches/37954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com/","msgid":"<002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-01T15:55:26","name":"Fix RTL simplifications of FFS, POPCOUNT and PARITY.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com/mbox/"},{"id":37963,"url":"https://patchwork.plctlab.org/api/1.2/patches/37963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com/","msgid":"<005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-01T16:52:57","name":"[x86] PR target/108229: A minor STV compute_convert_gain tweak.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com/mbox/"},{"id":38068,"url":"https://patchwork.plctlab.org/api/1.2/patches/38068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102103805.4328-1-iain@sandoe.co.uk/","msgid":"<20230102103805.4328-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T10:38:05","name":"modula-2, driver: Implement handling for -static-libgm2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102103805.4328-1-iain@sandoe.co.uk/mbox/"},{"id":38072,"url":"https://patchwork.plctlab.org/api/1.2/patches/38072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com/","msgid":"<00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-02T10:50:38","name":"[x86] Improve ix86_expand_int_movcc to allow condition (mask) sharing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com/mbox/"},{"id":38095,"url":"https://patchwork.plctlab.org/api/1.2/patches/38095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102113922.5458-1-iain@sandoe.co.uk/","msgid":"<20230102113922.5458-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T11:39:22","name":"modula-2: Module registration constructors need to be visible [PR108259].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102113922.5458-1-iain@sandoe.co.uk/mbox/"},{"id":38114,"url":"https://patchwork.plctlab.org/api/1.2/patches/38114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102121913.62841-1-iain@sandoe.co.uk/","msgid":"<20230102121913.62841-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T12:19:13","name":"modula-2: Fix registration of modules via constructors [PR108183].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102121913.62841-1-iain@sandoe.co.uk/mbox/"},{"id":38235,"url":"https://patchwork.plctlab.org/api/1.2/patches/38235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103013957.318395-1-juzhe.zhong@rivai.ai/","msgid":"<20230103013957.318395-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T01:39:57","name":"RISC-V: Fix vsetivli instruction asm for IMM AVL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103013957.318395-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38295,"url":"https://patchwork.plctlab.org/api/1.2/patches/38295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103065530.142443-1-juzhe.zhong@rivai.ai/","msgid":"<20230103065530.142443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T06:55:30","name":"RISC-V: Fix bugs for refine vsetvl a5, zero into vsetvl zero, zero incorrectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103065530.142443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38298,"url":"https://patchwork.plctlab.org/api/1.2/patches/38298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071159.147469-1-juzhe.zhong@rivai.ai/","msgid":"<20230103071159.147469-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:11:59","name":"RISC-V: Fix wrong in_group flag in validate_change call function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071159.147469-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38300,"url":"https://patchwork.plctlab.org/api/1.2/patches/38300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071641.149958-1-juzhe.zhong@rivai.ai/","msgid":"<20230103071641.149958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:16:41","name":"RISC-V: Fix backward_propagate_worthwhile_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071641.149958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38308,"url":"https://patchwork.plctlab.org/api/1.2/patches/38308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103072436.157051-1-juzhe.zhong@rivai.ai/","msgid":"<20230103072436.157051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:24:36","name":"RISC-V: Simplify codes of changing vsetvl instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103072436.157051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38311,"url":"https://patchwork.plctlab.org/api/1.2/patches/38311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103073030.163679-1-juzhe.zhong@rivai.ai/","msgid":"<20230103073030.163679-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:30:30","name":"RISC-V: Fix bugs of available condition.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103073030.163679-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38321,"url":"https://patchwork.plctlab.org/api/1.2/patches/38321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-1-lin1.hu@intel.com/","msgid":"<20230103083723.3395300-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-01-03T08:37:22","name":"[1/4] i386: Remove Meteorlake'\''s family_model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-1-lin1.hu@intel.com/mbox/"},{"id":38322,"url":"https://patchwork.plctlab.org/api/1.2/patches/38322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-2-lin1.hu@intel.com/","msgid":"<20230103083723.3395300-2-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-01-03T08:37:23","name":"[2/4] Initial Emeraldrapids Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-2-lin1.hu@intel.com/mbox/"},{"id":38329,"url":"https://patchwork.plctlab.org/api/1.2/patches/38329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093502.75997-1-poulhies@adacore.com/","msgid":"<20230103093502.75997-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:02","name":"[COMMITTED] ada: Fix support of Default_Component_Value aspect on derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093502.75997-1-poulhies@adacore.com/mbox/"},{"id":38330,"url":"https://patchwork.plctlab.org/api/1.2/patches/38330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093514.76112-1-poulhies@adacore.com/","msgid":"<20230103093514.76112-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:14","name":"[COMMITTED] ada: Cannot reference ghost entity in class-wide precondition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093514.76112-1-poulhies@adacore.com/mbox/"},{"id":38333,"url":"https://patchwork.plctlab.org/api/1.2/patches/38333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093518.76176-1-poulhies@adacore.com/","msgid":"<20230103093518.76176-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:18","name":"[COMMITTED] ada: Simplify [Small_]Integer_Type_For","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093518.76176-1-poulhies@adacore.com/mbox/"},{"id":38331,"url":"https://patchwork.plctlab.org/api/1.2/patches/38331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093523.76239-1-poulhies@adacore.com/","msgid":"<20230103093523.76239-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:23","name":"[COMMITTED] ada: Fix detection of function calls in object declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093523.76239-1-poulhies@adacore.com/mbox/"},{"id":38337,"url":"https://patchwork.plctlab.org/api/1.2/patches/38337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093530.76302-1-poulhies@adacore.com/","msgid":"<20230103093530.76302-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:30","name":"[COMMITTED] ada: GNAT UGN: Adjust wording in \"Platform-specific Information\" chapter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093530.76302-1-poulhies@adacore.com/mbox/"},{"id":38340,"url":"https://patchwork.plctlab.org/api/1.2/patches/38340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093534.76368-1-poulhies@adacore.com/","msgid":"<20230103093534.76368-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:34","name":"[COMMITTED] ada: Make Sem_Util.Is_Aliased_View predicate more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093534.76368-1-poulhies@adacore.com/mbox/"},{"id":38342,"url":"https://patchwork.plctlab.org/api/1.2/patches/38342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093540.76431-1-poulhies@adacore.com/","msgid":"<20230103093540.76431-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:40","name":"[COMMITTED] ada: Another small adjustment to special resolution of membership test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093540.76431-1-poulhies@adacore.com/mbox/"},{"id":38332,"url":"https://patchwork.plctlab.org/api/1.2/patches/38332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093545.76495-1-poulhies@adacore.com/","msgid":"<20230103093545.76495-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:45","name":"[COMMITTED] ada: Adapt frontend optimization for aggregate assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093545.76495-1-poulhies@adacore.com/mbox/"},{"id":38336,"url":"https://patchwork.plctlab.org/api/1.2/patches/38336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093549.76562-1-poulhies@adacore.com/","msgid":"<20230103093549.76562-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:49","name":"[COMMITTED] ada: Fix calling convention of foreign functions returning limited type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093549.76562-1-poulhies@adacore.com/mbox/"},{"id":38335,"url":"https://patchwork.plctlab.org/api/1.2/patches/38335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093557.76628-1-poulhies@adacore.com/","msgid":"<20230103093557.76628-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:57","name":"[COMMITTED] ada: Make Apply_Discriminant_Check.Denotes_Explicit_Dereference more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093557.76628-1-poulhies@adacore.com/mbox/"},{"id":38344,"url":"https://patchwork.plctlab.org/api/1.2/patches/38344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093602.76692-1-poulhies@adacore.com/","msgid":"<20230103093602.76692-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:02","name":"[COMMITTED] ada: Fix format string parsing in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093602.76692-1-poulhies@adacore.com/mbox/"},{"id":38339,"url":"https://patchwork.plctlab.org/api/1.2/patches/38339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093606.76755-1-poulhies@adacore.com/","msgid":"<20230103093606.76755-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:06","name":"[COMMITTED] ada: Fix premature finalization of return temporary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093606.76755-1-poulhies@adacore.com/mbox/"},{"id":38334,"url":"https://patchwork.plctlab.org/api/1.2/patches/38334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093612.76819-1-poulhies@adacore.com/","msgid":"<20230103093612.76819-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:12","name":"[COMMITTED] ada: Fix parsing bug in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093612.76819-1-poulhies@adacore.com/mbox/"},{"id":38341,"url":"https://patchwork.plctlab.org/api/1.2/patches/38341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093615.76884-1-poulhies@adacore.com/","msgid":"<20230103093615.76884-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:15","name":"[COMMITTED] ada: Fix GNAT.Formatted_String'\''s handling of real values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093615.76884-1-poulhies@adacore.com/mbox/"},{"id":38343,"url":"https://patchwork.plctlab.org/api/1.2/patches/38343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093621.76948-1-poulhies@adacore.com/","msgid":"<20230103093621.76948-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:21","name":"[COMMITTED] ada: output.adb: fix newline being inserted when buffer is full","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093621.76948-1-poulhies@adacore.com/mbox/"},{"id":38338,"url":"https://patchwork.plctlab.org/api/1.2/patches/38338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093626.77011-1-poulhies@adacore.com/","msgid":"<20230103093626.77011-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:26","name":"[COMMITTED] ada: Fix unescaped quotes when combining fdiagnostics-format=json and gnatdJ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093626.77011-1-poulhies@adacore.com/mbox/"},{"id":38358,"url":"https://patchwork.plctlab.org/api/1.2/patches/38358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QDVwqcWxcRpq5u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-03T10:28:39","name":"cfgrtl: Don'\''t try to redirect asm goto to EXIT [PR108263]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QDVwqcWxcRpq5u@tucnak/mbox/"},{"id":38365,"url":"https://patchwork.plctlab.org/api/1.2/patches/38365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QEn3gxmWvMRdr7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-03T10:34:07","name":"expr: Fix up store_expr into SUBREG_PROMOTED_* target [PR108264]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QEn3gxmWvMRdr7@tucnak/mbox/"},{"id":38382,"url":"https://patchwork.plctlab.org/api/1.2/patches/38382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmbvx41g.fsf@oldenburg.str.redhat.com/","msgid":"<87pmbvx41g.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-01-03T11:15:23","name":"Various fixes for DWARF register size computation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmbvx41g.fsf@oldenburg.str.redhat.com/mbox/"},{"id":38427,"url":"https://patchwork.plctlab.org/api/1.2/patches/38427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009101d91f75$ac187920$04496b60$@nextmovesoftware.com/","msgid":"<009101d91f75$ac187920$04496b60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-03T13:17:02","name":"PR tree-optimization/92342: Optimize b & -(a==c) in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009101d91f75$ac187920$04496b60$@nextmovesoftware.com/mbox/"},{"id":38695,"url":"https://patchwork.plctlab.org/api/1.2/patches/38695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded1a76dd073768bef073314e86407439fea8f32.camel@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-03T22:47:20","name":"gcc-11: FTBFS on hurd-i386","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded1a76dd073768bef073314e86407439fea8f32.camel@gmail.com/mbox/"},{"id":38731,"url":"https://patchwork.plctlab.org/api/1.2/patches/38731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fNaJU0FQkpY1sbMSTBhtyL9Fe3rKjTMaPdqQoq0VZhJBQxB1UtH_QU19Rai4usWKkETmSjqNT7cW5JaJxPnLy6iDTYpq4LHcEZsk2twCHAE=@proton.me/","msgid":"","list_archive_url":null,"date":"2023-01-04T03:09:45","name":"libiberty: Handle Windows nul device in unlink-if-ordinary.c [PR108276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fNaJU0FQkpY1sbMSTBhtyL9Fe3rKjTMaPdqQoq0VZhJBQxB1UtH_QU19Rai4usWKkETmSjqNT7cW5JaJxPnLy6iDTYpq4LHcEZsk2twCHAE=@proton.me/mbox/"},{"id":38739,"url":"https://patchwork.plctlab.org/api/1.2/patches/38739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3a62e9d-1d13-e338-7392-22c207061d37@emailplus.org/","msgid":"","list_archive_url":null,"date":"2023-01-04T05:32:32","name":"Add link to gmplib.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3a62e9d-1d13-e338-7392-22c207061d37@emailplus.org/mbox/"},{"id":38749,"url":"https://patchwork.plctlab.org/api/1.2/patches/38749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com/","msgid":"<5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:16:34","name":"[PATCH-1,rs6000] Change mode and insn condition for scalar extract exp instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com/mbox/"},{"id":38750,"url":"https://patchwork.plctlab.org/api/1.2/patches/38750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com/","msgid":"<5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:16:48","name":"[PATCH-2,rs6000] Change mode and insn condition for scalar extract sig instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com/mbox/"},{"id":38751,"url":"https://patchwork.plctlab.org/api/1.2/patches/38751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f82d5de1-31fd-f700-f633-1aeb15b39e1c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T06:17:01","name":"[PATCH-3,rs6000] Change mode and insn condition for scalar insert exp instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f82d5de1-31fd-f700-f633-1aeb15b39e1c@linux.ibm.com/mbox/"},{"id":38752,"url":"https://patchwork.plctlab.org/api/1.2/patches/38752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2a6914d-f2e5-7383-fb7e-a88b50192b2c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T06:17:12","name":"[PATCH-4,rs6000] Change ilp32 target check for some scalar-extract-sig and scalar-insert-exp test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2a6914d-f2e5-7383-fb7e-a88b50192b2c@linux.ibm.com/mbox/"},{"id":38773,"url":"https://patchwork.plctlab.org/api/1.2/patches/38773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104065140.91578-1-guojiufu@linux.ibm.com/","msgid":"<20230104065140.91578-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:51:40","name":"[V3] rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104065140.91578-1-guojiufu@linux.ibm.com/mbox/"},{"id":38782,"url":"https://patchwork.plctlab.org/api/1.2/patches/38782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6e8ab52-3c92-3fa0-c70a-085c5c53e18e@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T08:28:19","name":"swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6e8ab52-3c92-3fa0-c70a-085c5c53e18e@linux.vnet.ibm.com/mbox/"},{"id":38812,"url":"https://patchwork.plctlab.org/api/1.2/patches/38812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VCJRmHC/U+F53U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:08:53","name":"ubsan: Avoid narrowing of multiply for -fsanitize=signed-integer-overflow [PR108256]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VCJRmHC/U+F53U@tucnak/mbox/"},{"id":38814,"url":"https://patchwork.plctlab.org/api/1.2/patches/38814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VDRnSoaO6DtSDV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:13:42","name":"vrp: Handle pointers in maybe_set_nonzero_bits [PR108253]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VDRnSoaO6DtSDV@tucnak/mbox/"},{"id":38815,"url":"https://patchwork.plctlab.org/api/1.2/patches/38815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com/","msgid":"<197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T09:20:14","name":"rs6000: Don'\''t use optimize_function_for_speed_p too early [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com/mbox/"},{"id":38817,"url":"https://patchwork.plctlab.org/api/1.2/patches/38817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com/","msgid":"<9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T09:20:23","name":"rs6000: Make P10_FUSION honour tuning setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com/mbox/"},{"id":38818,"url":"https://patchwork.plctlab.org/api/1.2/patches/38818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VE9wUKrxTJ0OJF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:20:55","name":"generic-match-head: Don'\''t assume GENERIC folding is done only early [PR108237]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VE9wUKrxTJ0OJF@tucnak/mbox/"},{"id":38825,"url":"https://patchwork.plctlab.org/api/1.2/patches/38825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VHqivJl6gu4GNA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:32:26","name":"c++: Error recovery in merge_default_template_args [PR108206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VHqivJl6gu4GNA@tucnak/mbox/"},{"id":38879,"url":"https://patchwork.plctlab.org/api/1.2/patches/38879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104115437.48991-1-jwakely@redhat.com/","msgid":"<20230104115437.48991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-04T11:54:37","name":"[committed] libstdc++: Fix std::array::data() to be a constant expression [PR108258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104115437.48991-1-jwakely@redhat.com/mbox/"},{"id":38896,"url":"https://patchwork.plctlab.org/api/1.2/patches/38896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104124439.191858-1-guojiufu@linux.ibm.com/","msgid":"<20230104124439.191858-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T12:44:39","name":"[V4] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104124439.191858-1-guojiufu@linux.ibm.com/mbox/"},{"id":38935,"url":"https://patchwork.plctlab.org/api/1.2/patches/38935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134526.206115-1-juzhe.zhong@rivai.ai/","msgid":"<20230104134526.206115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-04T13:45:26","name":"RISC-V: Refine Phase 3 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134526.206115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38936,"url":"https://patchwork.plctlab.org/api/1.2/patches/38936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134557.196235-1-guojiufu@linux.ibm.com/","msgid":"<20230104134557.196235-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T13:45:57","name":"[V2] extract DF/SF/SI/HI/QI subreg from parameter word on stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134557.196235-1-guojiufu@linux.ibm.com/mbox/"},{"id":38938,"url":"https://patchwork.plctlab.org/api/1.2/patches/38938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134848.209374-1-juzhe.zhong@rivai.ai/","msgid":"<20230104134848.209374-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-04T13:48:48","name":"RISC-V: Add testcases for IMM (0 ~ 31) AVL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134848.209374-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38993,"url":"https://patchwork.plctlab.org/api/1.2/patches/38993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104163758.2933306-1-ppalka@redhat.com/","msgid":"<20230104163758.2933306-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-04T16:37:58","name":"c++: mark_single_function and SFINAE [PR108282]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104163758.2933306-1-ppalka@redhat.com/mbox/"},{"id":39041,"url":"https://patchwork.plctlab.org/api/1.2/patches/39041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7W0LY8i7rq756/m@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-04T17:15:25","name":"Avoid quadratic behaviour of symbol renaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7W0LY8i7rq756/m@kam.mff.cuni.cz/mbox/"},{"id":39045,"url":"https://patchwork.plctlab.org/api/1.2/patches/39045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104175408.4437-1-softwaresale01@gmail.com/","msgid":"<20230104175408.4437-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2023-01-04T17:54:09","name":"[ping] cp: warn uninitialized const/ref in base class [PR80681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104175408.4437-1-softwaresale01@gmail.com/mbox/"},{"id":39157,"url":"https://patchwork.plctlab.org/api/1.2/patches/39157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1qhq3x9.fsf@debian/","msgid":"<87y1qhq3x9.fsf@debian>","list_archive_url":null,"date":"2023-01-04T23:24:18","name":"[modula2] Add missing declarations to gcc/m2/gm2-libs-min/M2RTS.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1qhq3x9.fsf@debian/mbox/"},{"id":39235,"url":"https://patchwork.plctlab.org/api/1.2/patches/39235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005225.140099-1-jwakely@redhat.com/","msgid":"<20230105005225.140099-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:52:25","name":"[committed] libstdc++: Fix std::chrono::hh_mm_ss with unsigned rep [PR108265]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005225.140099-1-jwakely@redhat.com/mbox/"},{"id":39236,"url":"https://patchwork.plctlab.org/api/1.2/patches/39236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005240.140165-1-jwakely@redhat.com/","msgid":"<20230105005240.140165-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:52:40","name":"[committed] libstdc++: Only use std::atomic if lock free [PR108228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005240.140165-1-jwakely@redhat.com/mbox/"},{"id":39237,"url":"https://patchwork.plctlab.org/api/1.2/patches/39237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005316.140306-1-jwakely@redhat.com/","msgid":"<20230105005316.140306-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:53:16","name":"[committed] libstdc++: Support single components in name of chrono::current_zone() [PR108211]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005316.140306-1-jwakely@redhat.com/mbox/"},{"id":39294,"url":"https://patchwork.plctlab.org/api/1.2/patches/39294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105033853.7111-2-benson_muite@emailplus.org/","msgid":"<20230105033853.7111-2-benson_muite@emailplus.org>","list_archive_url":null,"date":"2023-01-05T03:38:53","name":"[1/1] Add link to gmplib.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105033853.7111-2-benson_muite@emailplus.org/mbox/"},{"id":39489,"url":"https://patchwork.plctlab.org/api/1.2/patches/39489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp/","msgid":"<04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-05T08:40:51","name":"xtensa: Optimize stack frame adjustment more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp/mbox/"},{"id":39481,"url":"https://patchwork.plctlab.org/api/1.2/patches/39481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7auiK3sZ0VWIh/j@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-05T11:03:36","name":"[committed] openmp: Fix up finish_omp_target_clauses [PR108286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7auiK3sZ0VWIh/j@tucnak/mbox/"},{"id":39524,"url":"https://patchwork.plctlab.org/api/1.2/patches/39524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105130553.3434596-1-ysato@users.sourceforge.jp/","msgid":"<20230105130553.3434596-1-ysato@users.sourceforge.jp>","list_archive_url":null,"date":"2023-01-05T13:05:53","name":"PR target/89828 Inernal compiler error on -fno-omit-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105130553.3434596-1-ysato@users.sourceforge.jp/mbox/"},{"id":39528,"url":"https://patchwork.plctlab.org/api/1.2/patches/39528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105131323.81730-1-iain@sandoe.co.uk/","msgid":"<20230105131323.81730-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-05T13:13:23","name":"modula-2: Remove uses of scalb*() and significand*() [PR107631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105131323.81730-1-iain@sandoe.co.uk/mbox/"},{"id":39603,"url":"https://patchwork.plctlab.org/api/1.2/patches/39603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001501d9210f$694bed70$3be3c850$@nextmovesoftware.com/","msgid":"<001501d9210f$694bed70$3be3c850$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-05T14:10:04","name":"[x86_64] Introduce insvti_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001501d9210f$694bed70$3be3c850$@nextmovesoftware.com/mbox/"},{"id":39612,"url":"https://patchwork.plctlab.org/api/1.2/patches/39612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143835.155238-1-poulhies@adacore.com/","msgid":"<20230105143835.155238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:35","name":"[COMMITTED] ada: Fix incorrect warning about unreferenced packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143835.155238-1-poulhies@adacore.com/mbox/"},{"id":39613,"url":"https://patchwork.plctlab.org/api/1.2/patches/39613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143844.155367-1-poulhies@adacore.com/","msgid":"<20230105143844.155367-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:44","name":"[COMMITTED] ada: Fix finalization issues in extended return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143844.155367-1-poulhies@adacore.com/mbox/"},{"id":39616,"url":"https://patchwork.plctlab.org/api/1.2/patches/39616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143853.155433-1-poulhies@adacore.com/","msgid":"<20230105143853.155433-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:53","name":"[COMMITTED] ada: Update doc for -gnatw_q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143853.155433-1-poulhies@adacore.com/mbox/"},{"id":39617,"url":"https://patchwork.plctlab.org/api/1.2/patches/39617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143901.155499-1-poulhies@adacore.com/","msgid":"<20230105143901.155499-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:01","name":"[COMMITTED] ada: Better error message for bad Discard_Names configuration pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143901.155499-1-poulhies@adacore.com/mbox/"},{"id":39619,"url":"https://patchwork.plctlab.org/api/1.2/patches/39619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143907.155566-1-poulhies@adacore.com/","msgid":"<20230105143907.155566-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:07","name":"[COMMITTED] ada: Revert to constrained allocation for string concatenation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143907.155566-1-poulhies@adacore.com/mbox/"},{"id":39614,"url":"https://patchwork.plctlab.org/api/1.2/patches/39614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143912.155630-1-poulhies@adacore.com/","msgid":"<20230105143912.155630-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:12","name":"[COMMITTED] ada: Spurious error on Lock_Free protected type with discriminants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143912.155630-1-poulhies@adacore.com/mbox/"},{"id":39618,"url":"https://patchwork.plctlab.org/api/1.2/patches/39618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143918.155693-1-poulhies@adacore.com/","msgid":"<20230105143918.155693-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:18","name":"[COMMITTED] ada: Fix generic instantiation of sibling package","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143918.155693-1-poulhies@adacore.com/mbox/"},{"id":39615,"url":"https://patchwork.plctlab.org/api/1.2/patches/39615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143924.155757-1-poulhies@adacore.com/","msgid":"<20230105143924.155757-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:24","name":"[COMMITTED] ada: Adjust handling of \"%g\" in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143924.155757-1-poulhies@adacore.com/mbox/"},{"id":39620,"url":"https://patchwork.plctlab.org/api/1.2/patches/39620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143933.155824-1-poulhies@adacore.com/","msgid":"<20230105143933.155824-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:33","name":"[COMMITTED] ada: Simplify new expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143933.155824-1-poulhies@adacore.com/mbox/"},{"id":39622,"url":"https://patchwork.plctlab.org/api/1.2/patches/39622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143937.155893-1-poulhies@adacore.com/","msgid":"<20230105143937.155893-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:37","name":"[COMMITTED] ada: Further adjust freezing for expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143937.155893-1-poulhies@adacore.com/mbox/"},{"id":39628,"url":"https://patchwork.plctlab.org/api/1.2/patches/39628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143946.155956-1-poulhies@adacore.com/","msgid":"<20230105143946.155956-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:46","name":"[COMMITTED] ada: Update gnatpp documentation with --layout switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143946.155956-1-poulhies@adacore.com/mbox/"},{"id":39630,"url":"https://patchwork.plctlab.org/api/1.2/patches/39630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143954.156047-1-poulhies@adacore.com/","msgid":"<20230105143954.156047-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:54","name":"[COMMITTED] ada: INOX: prototype RFC on String Interpolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143954.156047-1-poulhies@adacore.com/mbox/"},{"id":39624,"url":"https://patchwork.plctlab.org/api/1.2/patches/39624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144009.156114-1-poulhies@adacore.com/","msgid":"<20230105144009.156114-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:09","name":"[COMMITTED] ada: Fix spurious emissions of -gnatwj warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144009.156114-1-poulhies@adacore.com/mbox/"},{"id":39621,"url":"https://patchwork.plctlab.org/api/1.2/patches/39621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144020.156181-1-poulhies@adacore.com/","msgid":"<20230105144020.156181-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:20","name":"[COMMITTED] ada: Fix pasto in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144020.156181-1-poulhies@adacore.com/mbox/"},{"id":39629,"url":"https://patchwork.plctlab.org/api/1.2/patches/39629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144040.156244-1-poulhies@adacore.com/","msgid":"<20230105144040.156244-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:40","name":"[COMMITTED] ada: Optimize class-wide objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144040.156244-1-poulhies@adacore.com/mbox/"},{"id":39623,"url":"https://patchwork.plctlab.org/api/1.2/patches/39623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144045.156314-1-poulhies@adacore.com/","msgid":"<20230105144045.156314-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:45","name":"[COMMITTED] ada: Do not use decimal approximation in -gnatRj output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144045.156314-1-poulhies@adacore.com/mbox/"},{"id":39631,"url":"https://patchwork.plctlab.org/api/1.2/patches/39631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144051.156381-1-poulhies@adacore.com/","msgid":"<20230105144051.156381-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:51","name":"[COMMITTED] ada: Fix nested generic instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144051.156381-1-poulhies@adacore.com/mbox/"},{"id":39633,"url":"https://patchwork.plctlab.org/api/1.2/patches/39633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144055.156446-1-poulhies@adacore.com/","msgid":"<20230105144055.156446-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:55","name":"[COMMITTED] ada: Remove unhelpful special case for renamed bodies in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144055.156446-1-poulhies@adacore.com/mbox/"},{"id":39627,"url":"https://patchwork.plctlab.org/api/1.2/patches/39627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144059.156509-1-poulhies@adacore.com/","msgid":"<20230105144059.156509-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:59","name":"[COMMITTED] ada: Flag renaming-as-spec as a body to inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144059.156509-1-poulhies@adacore.com/mbox/"},{"id":39632,"url":"https://patchwork.plctlab.org/api/1.2/patches/39632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144107.156577-1-poulhies@adacore.com/","msgid":"<20230105144107.156577-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:41:07","name":"[COMMITTED] ada: Clean up interface handling in Expand_N_Object_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144107.156577-1-poulhies@adacore.com/mbox/"},{"id":39635,"url":"https://patchwork.plctlab.org/api/1.2/patches/39635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144111.156640-1-poulhies@adacore.com/","msgid":"<20230105144111.156640-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:41:11","name":"[COMMITTED] ada: Minor tweak to test added in previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144111.156640-1-poulhies@adacore.com/mbox/"},{"id":39661,"url":"https://patchwork.plctlab.org/api/1.2/patches/39661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105162911.82041-1-jwakely@redhat.com/","msgid":"<20230105162911.82041-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T16:29:11","name":"[committed] libstdc++: Reduce size of std::bind_front(empty_type) result [PR108290]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105162911.82041-1-jwakely@redhat.com/mbox/"},{"id":39662,"url":"https://patchwork.plctlab.org/api/1.2/patches/39662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105163007.82096-1-jwakely@redhat.com/","msgid":"<20230105163007.82096-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T16:30:07","name":"[committed] libstdc++: Fix printers for Python 2 [PR108212]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105163007.82096-1-jwakely@redhat.com/mbox/"},{"id":39663,"url":"https://patchwork.plctlab.org/api/1.2/patches/39663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fscpkjy7.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-05T16:46:56","name":"ipa: Sort ipa_param_body_adjustments::m_replacements (PR 108110)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fscpkjy7.fsf@suse.cz/mbox/"},{"id":39709,"url":"https://patchwork.plctlab.org/api/1.2/patches/39709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105172010.3598077-1-ppalka@redhat.com/","msgid":"<20230105172010.3598077-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-05T17:20:10","name":"c++: class-head parsing and CPP_TEMPLATE_ID access [PR108275]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105172010.3598077-1-ppalka@redhat.com/mbox/"},{"id":39731,"url":"https://patchwork.plctlab.org/api/1.2/patches/39731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7cV5aVDZBXxqCmU@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-05T18:24:37","name":"[committed] hppa: Fix atomic operations on PA-RISC 2.0 processors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7cV5aVDZBXxqCmU@mx3210.localdomain/mbox/"},{"id":39782,"url":"https://patchwork.plctlab.org/api/1.2/patches/39782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/febe8136ba2e1afbbf70beff8ce0a1cf66401dff.1672946731.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2023-01-05T19:27:40","name":"wwwdocs: Note that old reload is deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/febe8136ba2e1afbbf70beff8ce0a1cf66401dff.1672946731.git.segher@kernel.crashing.org/mbox/"},{"id":39826,"url":"https://patchwork.plctlab.org/api/1.2/patches/39826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com/","msgid":"<0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2023-01-05T22:36:05","name":"[v2,1/4] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39824,"url":"https://patchwork.plctlab.org/api/1.2/patches/39824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af19256469798ddf9b7906adacb8f8edfd574a25.1672867272.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-05T22:36:06","name":"[v2,2/4] diagnostics: Handle generated data locations in edit_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af19256469798ddf9b7906adacb8f8edfd574a25.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39827,"url":"https://patchwork.plctlab.org/api/1.2/patches/39827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com/","msgid":"<9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2023-01-05T22:36:07","name":"[v2,3/4] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39825,"url":"https://patchwork.plctlab.org/api/1.2/patches/39825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e364f3a6881ed90c41090e890121332adf62c0ee.1672867272.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-05T22:36:08","name":"[v2,4/4] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e364f3a6881ed90c41090e890121332adf62c0ee.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39968,"url":"https://patchwork.plctlab.org/api/1.2/patches/39968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb666223-2b26-4914-903d-6fbafcafd5c0.jinma@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T06:56:03","name":"[RISCV] Change the generation mode of `adjust_sp_rtx` from gen_insn to gen_SET.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb666223-2b26-4914-903d-6fbafcafd5c0.jinma@linux.alibaba.com/mbox/"},{"id":39978,"url":"https://patchwork.plctlab.org/api/1.2/patches/39978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz/","msgid":"<6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz>","list_archive_url":null,"date":"2023-01-06T07:49:23","name":"[pushed] contrib: add '\''contrib'\'' to default dirs in update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz/mbox/"},{"id":39991,"url":"https://patchwork.plctlab.org/api/1.2/patches/39991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106082314.2091-1-anothername27-unity@yahoo.com/","msgid":"<20230106082314.2091-1-anothername27-unity@yahoo.com>","list_archive_url":null,"date":"2023-01-06T08:23:14","name":"Handle Windows nul device in unlink-if-ordinary.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106082314.2091-1-anothername27-unity@yahoo.com/mbox/"},{"id":39995,"url":"https://patchwork.plctlab.org/api/1.2/patches/39995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083118.2141-1-anothername27-unity@yahoo.com/","msgid":"<20230106083118.2141-1-anothername27-unity@yahoo.com>","list_archive_url":null,"date":"2023-01-06T08:31:18","name":"Handle Windows nul device in unlink-if-ordinary.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083118.2141-1-anothername27-unity@yahoo.com/mbox/"},{"id":40003,"url":"https://patchwork.plctlab.org/api/1.2/patches/40003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083908.332604-1-chigot@adacore.com/","msgid":"<20230106083908.332604-1-chigot@adacore.com>","list_archive_url":null,"date":"2023-01-06T08:39:08","name":"configure: remove dependencies on gmp and mpfr when gdb is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083908.332604-1-chigot@adacore.com/mbox/"},{"id":40052,"url":"https://patchwork.plctlab.org/api/1.2/patches/40052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com/","msgid":"<11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com>","list_archive_url":null,"date":"2023-01-06T09:26:37","name":"rs6000: Teach rs6000_opaque_type_invalid_use_p about inline asm [PR108272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com/mbox/"},{"id":40057,"url":"https://patchwork.plctlab.org/api/1.2/patches/40057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc4e1ec0-9f4c-0a9c-74c2-e3ba753b9414@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T09:28:26","name":"rs6000: Allow powerpc64 to be unset for implicit 64 bit [PR108240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc4e1ec0-9f4c-0a9c-74c2-e3ba753b9414@linux.ibm.com/mbox/"},{"id":40063,"url":"https://patchwork.plctlab.org/api/1.2/patches/40063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7fwNTmas50x4CUm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-06T09:56:05","name":"[committed] testsuite: Add testcases from PR108292 and PR108308","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7fwNTmas50x4CUm@tucnak/mbox/"},{"id":40073,"url":"https://patchwork.plctlab.org/api/1.2/patches/40073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106102520.3949796-1-yunqiang.su@cipunited.com/","msgid":"<20230106102520.3949796-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-01-06T10:25:20","name":"Set CROSS_SYSTEM_HEADER_DIR according includedir","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106102520.3949796-1-yunqiang.su@cipunited.com/mbox/"},{"id":40081,"url":"https://patchwork.plctlab.org/api/1.2/patches/40081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106103632.3951217-1-yunqiang.su@cipunited.com/","msgid":"<20230106103632.3951217-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-01-06T10:36:32","name":"libsanitizer/mips: always build with largefile support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106103632.3951217-1-yunqiang.su@cipunited.com/mbox/"},{"id":40084,"url":"https://patchwork.plctlab.org/api/1.2/patches/40084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104126.161754-1-jwakely@redhat.com/","msgid":"<20230106104126.161754-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T10:41:26","name":"[wwwdocs] Document libstdc++ additions for GCC 12 and 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104126.161754-1-jwakely@redhat.com/mbox/"},{"id":40088,"url":"https://patchwork.plctlab.org/api/1.2/patches/40088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104846.172544-1-jwakely@redhat.com/","msgid":"<20230106104846.172544-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T10:48:46","name":"[wwwdocs] Fix typo in libstdc++ release notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104846.172544-1-jwakely@redhat.com/mbox/"},{"id":40093,"url":"https://patchwork.plctlab.org/api/1.2/patches/40093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz/","msgid":"<60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz>","list_archive_url":null,"date":"2023-01-06T11:33:54","name":"diagnostics: fix crash with -fdiagnostics-format=json-file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz/mbox/"},{"id":40099,"url":"https://patchwork.plctlab.org/api/1.2/patches/40099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106115402.178926-1-jwakely@redhat.com/","msgid":"<20230106115402.178926-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T11:54:02","name":"[committed] libstdc++: Fix deadlock in debug iterator increment [PR108288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106115402.178926-1-jwakely@redhat.com/mbox/"},{"id":40108,"url":"https://patchwork.plctlab.org/api/1.2/patches/40108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz/","msgid":"<6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz>","list_archive_url":null,"date":"2023-01-06T12:21:26","name":"Remove legacy pre-C++ 11 definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz/mbox/"},{"id":40109,"url":"https://patchwork.plctlab.org/api/1.2/patches/40109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106122552.145679-1-guojiufu@linux.ibm.com/","msgid":"<20230106122552.145679-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-06T12:25:52","name":"rs6000: mark tieable between INT and FLOAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106122552.145679-1-guojiufu@linux.ibm.com/mbox/"},{"id":40123,"url":"https://patchwork.plctlab.org/api/1.2/patches/40123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106132658.189522-1-jwakely@redhat.com/","msgid":"<20230106132658.189522-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T13:26:58","name":"[committed] libstdc++: Disable broken std::format for floating-point types [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106132658.189522-1-jwakely@redhat.com/mbox/"},{"id":40144,"url":"https://patchwork.plctlab.org/api/1.2/patches/40144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106141200.237958-1-jwakely@redhat.com/","msgid":"<20230106141200.237958-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T14:12:00","name":"[committed] libstdc++: Fix misuse of alloca in std::bitset [PR108214]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106141200.237958-1-jwakely@redhat.com/mbox/"},{"id":40155,"url":"https://patchwork.plctlab.org/api/1.2/patches/40155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106145950.3685552-1-ppalka@redhat.com/","msgid":"<20230106145950.3685552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-06T14:59:50","name":"libstdc++: Add feature-test macros for implemented C++23 views [PR108260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106145950.3685552-1-ppalka@redhat.com/mbox/"},{"id":40213,"url":"https://patchwork.plctlab.org/api/1.2/patches/40213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfEK_Y1fQVHCZ=RGy3e_O5uYCa4cOhPm9aZGb1Q_9t_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T17:42:19","name":"libbacktrace patch committed: Only test --build-id if supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfEK_Y1fQVHCZ=RGy3e_O5uYCa4cOhPm9aZGb1Q_9t_g@mail.gmail.com/mbox/"},{"id":40217,"url":"https://patchwork.plctlab.org/api/1.2/patches/40217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce46a74e-c892-3d54-1741-9758166eee4b@126.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T18:01:05","name":"Always define `WIN32_LEAN_AND_MEAN` before ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce46a74e-c892-3d54-1741-9758166eee4b@126.com/mbox/"},{"id":40232,"url":"https://patchwork.plctlab.org/api/1.2/patches/40232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c58052a2-2ac8-90de-d6c1-c38cb2f74cd0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T19:32:48","name":"[committed] c: C2x semantics for __builtin_tgmath","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c58052a2-2ac8-90de-d6c1-c38cb2f74cd0@codesourcery.com/mbox/"},{"id":40268,"url":"https://patchwork.plctlab.org/api/1.2/patches/40268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212129.397061-1-jwakely@redhat.com/","msgid":"<20230106212129.397061-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T21:21:29","name":"[committed] libstdc++: Refactor time_zone::_Impl::rules_counter [PR108235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212129.397061-1-jwakely@redhat.com/mbox/"},{"id":40269,"url":"https://patchwork.plctlab.org/api/1.2/patches/40269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212135.397113-1-jwakely@redhat.com/","msgid":"<20230106212135.397113-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T21:21:35","name":"[committed] libstdc++: Suppress -Waddress warning in tzdb.cc [PR108228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212135.397113-1-jwakely@redhat.com/mbox/"},{"id":40270,"url":"https://patchwork.plctlab.org/api/1.2/patches/40270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5zs5l4.fsf@debian/","msgid":"<87wn5zs5l4.fsf@debian>","list_archive_url":null,"date":"2023-01-06T21:42:15","name":"[modula2] PR-108182 gm2 driver mishandles target and multilib options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5zs5l4.fsf@debian/mbox/"},{"id":40301,"url":"https://patchwork.plctlab.org/api/1.2/patches/40301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp/","msgid":"<19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-07T02:55:11","name":"[v2] xtensa: Optimize stack frame adjustment more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp/mbox/"},{"id":40302,"url":"https://patchwork.plctlab.org/api/1.2/patches/40302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp/","msgid":"<1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-07T02:55:26","name":"xtensa: Optimize bitwise splicing operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp/mbox/"},{"id":40362,"url":"https://patchwork.plctlab.org/api/1.2/patches/40362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107105349.92210-1-iain@sandoe.co.uk/","msgid":"<20230107105349.92210-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-07T10:53:49","name":"modula-2, driver: Do not add extra '\''-L'\'' options that shadow $libdir.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107105349.92210-1-iain@sandoe.co.uk/mbox/"},{"id":40381,"url":"https://patchwork.plctlab.org/api/1.2/patches/40381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGA7tdvVLbySE0i=YjV7GT-ArgFyaJAb0-k8XzwNqhowDDZrvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-07T12:01:05","name":"gcc: fix gcc --help -v opertion with linker flags and input files [PR108328]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGA7tdvVLbySE0i=YjV7GT-ArgFyaJAb0-k8XzwNqhowDDZrvw@mail.gmail.com/mbox/"},{"id":40413,"url":"https://patchwork.plctlab.org/api/1.2/patches/40413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107154545.93295-1-iain@sandoe.co.uk/","msgid":"<20230107154545.93295-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-07T15:45:45","name":"modula-2, libm2min: Declare abort and exit as expected.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107154545.93295-1-iain@sandoe.co.uk/mbox/"},{"id":40414,"url":"https://patchwork.plctlab.org/api/1.2/patches/40414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de/","msgid":"<7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de>","list_archive_url":null,"date":"2023-01-07T15:46:20","name":"[fortran] Fix common subexpression elimination with IEEE rounding (PR108329)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de/mbox/"},{"id":40426,"url":"https://patchwork.plctlab.org/api/1.2/patches/40426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fscmckhx.fsf@debian/","msgid":"<87fscmckhx.fsf@debian>","list_archive_url":null,"date":"2023-01-07T17:39:06","name":"[modula2] v2 PR-108182 gm2 driver mishandles target and multilib options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fscmckhx.fsf@debian/mbox/"},{"id":40444,"url":"https://patchwork.plctlab.org/api/1.2/patches/40444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7m9lk+1t6ItwuXB@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-07T18:44:38","name":"[committed] Fix compilation of gcc.dg/atomic/c11-atomic-exec-[45].c on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7m9lk+1t6ItwuXB@mx3210.localdomain/mbox/"},{"id":40446,"url":"https://patchwork.plctlab.org/api/1.2/patches/40446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7nEKiHZJhHBwJMf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-07T19:12:42","name":"c++tools: Fix compilation of server.cc on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7nEKiHZJhHBwJMf@mx3210.localdomain/mbox/"},{"id":40481,"url":"https://patchwork.plctlab.org/api/1.2/patches/40481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1bfa676-c35d-cdea-af7d-95463f1f25a1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-08T05:03:49","name":"[v2] xtensa: Optimize bitwise splicing operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1bfa676-c35d-cdea-af7d-95463f1f25a1@yahoo.co.jp/mbox/"},{"id":40787,"url":"https://patchwork.plctlab.org/api/1.2/patches/40787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vqI9Y4uO500WY1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-09T10:19:15","name":"c++: Only do maybe_init_list_as_range optimization if !processing_template_decl [PR108047]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vqI9Y4uO500WY1@tucnak/mbox/"},{"id":40788,"url":"https://patchwork.plctlab.org/api/1.2/patches/40788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vtQYCoWik3D9Wc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-09T10:32:33","name":"calls: Fix up TYPE_NO_NAMED_ARGS_STDARG_P handling [PR107453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vtQYCoWik3D9Wc@tucnak/mbox/"},{"id":40792,"url":"https://patchwork.plctlab.org/api/1.2/patches/40792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz/","msgid":"<7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz>","list_archive_url":null,"date":"2023-01-09T10:52:55","name":"hash: do not insert deleted value to a hash_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz/mbox/"},{"id":40798,"url":"https://patchwork.plctlab.org/api/1.2/patches/40798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110844.24C06134AD@imap2.suse-dmz.suse.de/","msgid":"<20230109110844.24C06134AD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T11:08:43","name":"tree-optimization/101912 - testcase for fixed uninit case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110844.24C06134AD@imap2.suse-dmz.suse.de/mbox/"},{"id":40799,"url":"https://patchwork.plctlab.org/api/1.2/patches/40799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110941.9FB86134AD@imap2.suse-dmz.suse.de/","msgid":"<20230109110941.9FB86134AD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T11:09:41","name":"tree-optimization/107767 - not profitable switch conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110941.9FB86134AD@imap2.suse-dmz.suse.de/mbox/"},{"id":40820,"url":"https://patchwork.plctlab.org/api/1.2/patches/40820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109123126.2C9BA13583@imap2.suse-dmz.suse.de/","msgid":"<20230109123126.2C9BA13583@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T12:31:25","name":"middle-end/69482 - not preserving volatile accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109123126.2C9BA13583@imap2.suse-dmz.suse.de/mbox/"},{"id":40867,"url":"https://patchwork.plctlab.org/api/1.2/patches/40867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com/","msgid":"<00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T13:29:14","name":"[nvptx] Correct pattern for popcountdi2 insn in nvptx.md.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com/mbox/"},{"id":40888,"url":"https://patchwork.plctlab.org/api/1.2/patches/40888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109140727.78A9C13583@imap2.suse-dmz.suse.de/","msgid":"<20230109140727.78A9C13583@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T14:07:27","name":"middle-end/108209 - typo in genmatch.cc:commutative_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109140727.78A9C13583@imap2.suse-dmz.suse.de/mbox/"},{"id":40894,"url":"https://patchwork.plctlab.org/api/1.2/patches/40894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144508.2285330-1-poulhies@adacore.com/","msgid":"<20230109144508.2285330-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-09T14:45:08","name":"[COMMITTED] ada: Simplify finalization of temporaries created for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144508.2285330-1-poulhies@adacore.com/mbox/"},{"id":40895,"url":"https://patchwork.plctlab.org/api/1.2/patches/40895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144525.2286171-1-poulhies@adacore.com/","msgid":"<20230109144525.2286171-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-09T14:45:25","name":"[COMMITTED] ada: Remove a couple of unreachable statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144525.2286171-1-poulhies@adacore.com/mbox/"},{"id":40911,"url":"https://patchwork.plctlab.org/api/1.2/patches/40911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com/","msgid":"<011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T15:01:10","name":"[x86] PR rtl-optimization/107991: peephole2 to tweak register allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com/mbox/"},{"id":41084,"url":"https://patchwork.plctlab.org/api/1.2/patches/41084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com/","msgid":"<004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T19:49:31","name":"PR rtl-optimization/106421: ICE in bypass_block from non-local goto.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com/mbox/"},{"id":41184,"url":"https://patchwork.plctlab.org/api/1.2/patches/41184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com/","msgid":"<572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com>","list_archive_url":null,"date":"2023-01-09T21:57:16","name":"[committed] c: Check for modifiable static compound literals in inline definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com/mbox/"},{"id":41190,"url":"https://patchwork.plctlab.org/api/1.2/patches/41190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3209307.aeNJFYEL58@fomalhaut/","msgid":"<3209307.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2023-01-09T22:30:52","name":"Modula-2: fix documentation layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3209307.aeNJFYEL58@fomalhaut/mbox/"},{"id":41191,"url":"https://patchwork.plctlab.org/api/1.2/patches/41191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109223307.144358-1-juzhe.zhong@rivai.ai/","msgid":"<20230109223307.144358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:33:07","name":"RISC-V: Cleanup the codes of bitmap create and free [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109223307.144358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41195,"url":"https://patchwork.plctlab.org/api/1.2/patches/41195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224007.146325-1-juzhe.zhong@rivai.ai/","msgid":"<20230109224007.146325-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:40:07","name":"RISC-V: Avoid redundant flow in forward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224007.146325-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41203,"url":"https://patchwork.plctlab.org/api/1.2/patches/41203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224045.13453-1-david.faust@oracle.com/","msgid":"<20230109224045.13453-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-01-09T22:40:45","name":"bpf: correct bpf_print_operand for floats [PR108293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224045.13453-1-david.faust@oracle.com/mbox/"},{"id":41207,"url":"https://patchwork.plctlab.org/api/1.2/patches/41207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224726.148263-1-juzhe.zhong@rivai.ai/","msgid":"<20230109224726.148263-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:47:26","name":"RISC-V: Refine codes in backward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224726.148263-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41208,"url":"https://patchwork.plctlab.org/api/1.2/patches/41208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225035.149190-1-juzhe.zhong@rivai.ai/","msgid":"<20230109225035.149190-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:50:35","name":"RISC-V: Avoid redundant flow in backward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225035.149190-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41210,"url":"https://patchwork.plctlab.org/api/1.2/patches/41210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225643.150853-1-juzhe.zhong@rivai.ai/","msgid":"<20230109225643.150853-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:56:43","name":"RISC-V: Rename insn into rinsn for rtx_insn *","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225643.150853-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41211,"url":"https://patchwork.plctlab.org/api/1.2/patches/41211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231059.154229-1-juzhe.zhong@rivai.ai/","msgid":"<20230109231059.154229-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:10:59","name":"RISC-V: Remove dirty_pat since it is redundant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231059.154229-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41214,"url":"https://patchwork.plctlab.org/api/1.2/patches/41214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231720.155773-1-juzhe.zhong@rivai.ai/","msgid":"<20230109231720.155773-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:17:20","name":"RISC-V: Add probability model of each block to prevent endless loop of Phase 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231720.155773-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41217,"url":"https://patchwork.plctlab.org/api/1.2/patches/41217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232057.156867-1-juzhe.zhong@rivai.ai/","msgid":"<20230109232057.156867-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:20:57","name":"RISC-V: Call DCE to remove redundant instructions created by the PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232057.156867-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41218,"url":"https://patchwork.plctlab.org/api/1.2/patches/41218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232911.158606-1-juzhe.zhong@rivai.ai/","msgid":"<20230109232911.158606-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:29:11","name":"RISC-V: Fix bugs of supporting AVL=REG (single-real-def) in VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232911.158606-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41219,"url":"https://patchwork.plctlab.org/api/1.2/patches/41219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233533.160230-1-juzhe.zhong@rivai.ai/","msgid":"<20230109233533.160230-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:35:33","name":"RISC-V: Adjust testcases for AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233533.160230-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41225,"url":"https://patchwork.plctlab.org/api/1.2/patches/41225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233838.161078-1-juzhe.zhong@rivai.ai/","msgid":"<20230109233838.161078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:38:38","name":"RISC-V: Add testcases for AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233838.161078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41228,"url":"https://patchwork.plctlab.org/api/1.2/patches/41228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109234026.161632-1-juzhe.zhong@rivai.ai/","msgid":"<20230109234026.161632-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:40:26","name":"RISC-V: Add the rest testcases of AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109234026.161632-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41253,"url":"https://patchwork.plctlab.org/api/1.2/patches/41253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wzf9ci.fsf@debian/","msgid":"<87h6wzf9ci.fsf@debian>","list_archive_url":null,"date":"2023-01-10T01:48:29","name":"[Modula2] PR-108142 Many empty directories created in the build directory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wzf9ci.fsf@debian/mbox/"},{"id":41280,"url":"https://patchwork.plctlab.org/api/1.2/patches/41280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp/","msgid":"<2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-10T03:34:01","name":"xtensa: Make instruction cost estimation for size more accurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp/mbox/"},{"id":41292,"url":"https://patchwork.plctlab.org/api/1.2/patches/41292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7zqJvSj6haMwSMF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-10T04:31:34","name":"More znver4 x86-tune flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7zqJvSj6haMwSMF@kam.mff.cuni.cz/mbox/"},{"id":41368,"url":"https://patchwork.plctlab.org/api/1.2/patches/41368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110090426.11475-1-krebbel@linux.ibm.com/","msgid":"<20230110090426.11475-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-01-10T09:04:26","name":"[Committed] IBM zSystems: Make -fcall-saved-... work.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110090426.11475-1-krebbel@linux.ibm.com/mbox/"},{"id":41382,"url":"https://patchwork.plctlab.org/api/1.2/patches/41382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110094614.0E81A1358A@imap2.suse-dmz.suse.de/","msgid":"<20230110094614.0E81A1358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-10T09:46:13","name":"tree-optimization/108314 - avoid BIT_NOT optimization for extract-last","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110094614.0E81A1358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41384,"url":"https://patchwork.plctlab.org/api/1.2/patches/41384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-1-arsen@aarsen.me/","msgid":"<20230110100305.1420589-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-10T10:03:04","name":"[1/2] libstdc++: Enable string_view in freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-1-arsen@aarsen.me/mbox/"},{"id":41383,"url":"https://patchwork.plctlab.org/api/1.2/patches/41383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-2-arsen@aarsen.me/","msgid":"<20230110100305.1420589-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-10T10:03:05","name":"[2/2] libstdc++: Fix a few !HOSTED test regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-2-arsen@aarsen.me/mbox/"},{"id":41412,"url":"https://patchwork.plctlab.org/api/1.2/patches/41412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc27fa73-cb20-52f3-11bc-302a33157b34@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T11:35:38","name":"[1/2] OpenMP: Add lang hooks + run-time filled map arrays for Fortran deep mapping of DT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc27fa73-cb20-52f3-11bc-302a33157b34@codesourcery.com/mbox/"},{"id":41418,"url":"https://patchwork.plctlab.org/api/1.2/patches/41418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-1-jwakely@redhat.com/","msgid":"<20230110114657.636853-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:55","name":"[committed,1/3] libstdc++: Fix std::span constraint for sizeof(size_t) < sizeof(int) [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-1-jwakely@redhat.com/mbox/"},{"id":41417,"url":"https://patchwork.plctlab.org/api/1.2/patches/41417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-2-jwakely@redhat.com/","msgid":"<20230110114657.636853-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:56","name":"[committed,2/3] libstdc++: Fix some algos for 16-bit size_t [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-2-jwakely@redhat.com/mbox/"},{"id":41416,"url":"https://patchwork.plctlab.org/api/1.2/patches/41416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-3-jwakely@redhat.com/","msgid":"<20230110114657.636853-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:57","name":"[committed,3/3] libstdc++: Fix tzdb.cc to compile with -fno-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-3-jwakely@redhat.com/mbox/"},{"id":41451,"url":"https://patchwork.plctlab.org/api/1.2/patches/41451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB541256BD6B9838E4BE055B85ACFF9@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T12:58:59","name":"[v2] libstdc++: Fix Unicode codecvt and add tests [PR86419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB541256BD6B9838E4BE055B85ACFF9@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":41476,"url":"https://patchwork.plctlab.org/api/1.2/patches/41476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110134527.194389-1-guojiufu@linux.ibm.com/","msgid":"<20230110134527.194389-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-10T13:45:27","name":"rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110134527.194389-1-guojiufu@linux.ibm.com/mbox/"},{"id":41489,"url":"https://patchwork.plctlab.org/api/1.2/patches/41489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB6507C6E5774C27F424DCB1B7BBFF9@DB9PR08MB6507.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T14:07:42","name":"[PING] arm: Split up MVE _Generic associations to prevent type clashes [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB6507C6E5774C27F424DCB1B7BBFF9@DB9PR08MB6507.eurprd08.prod.outlook.com/mbox/"},{"id":41512,"url":"https://patchwork.plctlab.org/api/1.2/patches/41512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com/","msgid":"<9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com>","list_archive_url":null,"date":"2023-01-10T15:10:42","name":"gcc: emit DW_AT_name for DW_TAG_GNU_formal_parameter_pack [PR70536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com/mbox/"},{"id":41532,"url":"https://patchwork.plctlab.org/api/1.2/patches/41532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110155328.5B4AC13338@imap2.suse-dmz.suse.de/","msgid":"<20230110155328.5B4AC13338@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-10T15:53:28","name":"tree-optimization/106293 - missed DSE with virtual LC PHI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110155328.5B4AC13338@imap2.suse-dmz.suse.de/mbox/"},{"id":41603,"url":"https://patchwork.plctlab.org/api/1.2/patches/41603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110191202.8641-1-david.faust@oracle.com/","msgid":"<20230110191202.8641-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-01-10T19:12:02","name":"[v2] bpf: correct bpf_print_operand for floats [PR108293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110191202.8641-1-david.faust@oracle.com/mbox/"},{"id":41672,"url":"https://patchwork.plctlab.org/api/1.2/patches/41672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a62769c1-9991-4f41-8926-8ee0eb2240bd-1673387787545@3c-app-gmx-bap64/","msgid":"","list_archive_url":null,"date":"2023-01-10T21:56:27","name":"Fortran: frontend passes do_subscript leaks gmp memory [PR97345]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a62769c1-9991-4f41-8926-8ee0eb2240bd-1673387787545@3c-app-gmx-bap64/mbox/"},{"id":41736,"url":"https://patchwork.plctlab.org/api/1.2/patches/41736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp/","msgid":"<076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-11T04:20:42","name":"ifcvt.cc: Prevent excessive if-conversion for conditional moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp/mbox/"},{"id":41776,"url":"https://patchwork.plctlab.org/api/1.2/patches/41776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111070409.4CE071358A@imap2.suse-dmz.suse.de/","msgid":"<20230111070409.4CE071358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T07:04:08","name":"tree-optimization/106293 - fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111070409.4CE071358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41854,"url":"https://patchwork.plctlab.org/api/1.2/patches/41854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y75+1bW680qP7wiD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:18:13","name":"fortran: Fix up function types for realloc and sincos{,f,l} builtins [PR108349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y75+1bW680qP7wiD@tucnak/mbox/"},{"id":41870,"url":"https://patchwork.plctlab.org/api/1.2/patches/41870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y76G9F09l5YV0r4C@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:52:52","name":"c++: Avoid some false positive -Wfloat-conversion warnings with extended precision [PR108285]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y76G9F09l5YV0r4C@tucnak/mbox/"},{"id":41871,"url":"https://patchwork.plctlab.org/api/1.2/patches/41871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0e03173-569f-01f5-c5d4-d81a0a9f5ecd@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:56:28","name":"Resolve bugzilla #108150 and #108192 for mingw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0e03173-569f-01f5-c5d4-d81a0a9f5ecd@gmail.com/mbox/"},{"id":41872,"url":"https://patchwork.plctlab.org/api/1.2/patches/41872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrzgappf3c.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:58:47","name":"[10/15,V7] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrzgappf3c.fsf_-_@arm.com/mbox/"},{"id":41873,"url":"https://patchwork.plctlab.org/api/1.2/patches/41873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2889898.e9J7NaK4W3@fomalhaut/","msgid":"<2889898.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2023-01-11T09:59:39","name":"Fix PR tree-optimization/108199","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2889898.e9J7NaK4W3@fomalhaut/mbox/"},{"id":41882,"url":"https://patchwork.plctlab.org/api/1.2/patches/41882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111102901.15229-1-krebbel@linux.ibm.com/","msgid":"<20230111102901.15229-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T10:29:01","name":"[Committed] IBM zSystems: Use NAND instruction to implement bit not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111102901.15229-1-krebbel@linux.ibm.com/mbox/"},{"id":41883,"url":"https://patchwork.plctlab.org/api/1.2/patches/41883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e291c8-e9e0-eb33-5fa7-8815217e238b@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-11T10:30:51","name":"switch expansion: limit JT growth param values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e291c8-e9e0-eb33-5fa7-8815217e238b@suse.cz/mbox/"},{"id":41890,"url":"https://patchwork.plctlab.org/api/1.2/patches/41890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111105257.05FEB13591@imap2.suse-dmz.suse.de/","msgid":"<20230111105257.05FEB13591@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T10:52:56","name":"tree-optimization/108353 - copyprop iteration order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111105257.05FEB13591@imap2.suse-dmz.suse.de/mbox/"},{"id":41900,"url":"https://patchwork.plctlab.org/api/1.2/patches/41900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcccac99-fd77-9c8e-b1e9-637e01cc4bdd@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-11T11:27:07","name":"[gcc-12,backport] strlen: do not use cond_expr for boundaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcccac99-fd77-9c8e-b1e9-637e01cc4bdd@suse.cz/mbox/"},{"id":41916,"url":"https://patchwork.plctlab.org/api/1.2/patches/41916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0xl2t7.fsf@euler.schwinge.homeip.net/","msgid":"<87tu0xl2t7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:37:40","name":"[PING] nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution (was: [committed][nvptx] Add uniform_warp_check insn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0xl2t7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41920,"url":"https://patchwork.plctlab.org/api/1.2/patches/41920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0w1l2nh.fsf@euler.schwinge.homeip.net/","msgid":"<87r0w1l2nh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:41:06","name":"[PING] Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0w1l2nh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41922,"url":"https://patchwork.plctlab.org/api/1.2/patches/41922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com/","msgid":"<8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-11T11:42:01","name":"[RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com/mbox/"},{"id":41930,"url":"https://patchwork.plctlab.org/api/1.2/patches/41930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lem9l2fw.fsf@euler.schwinge.homeip.net/","msgid":"<87lem9l2fw.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:45:39","name":"[PING^3] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lem9l2fw.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41941,"url":"https://patchwork.plctlab.org/api/1.2/patches/41941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wxl2b4.fsf@euler.schwinge.homeip.net/","msgid":"<87h6wxl2b4.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:48:31","name":"[PING^2] nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wxl2b4.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41944,"url":"https://patchwork.plctlab.org/api/1.2/patches/41944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fschl29n.fsf@euler.schwinge.homeip.net/","msgid":"<87fschl29n.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:49:24","name":"[PING] nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fschl29n.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41948,"url":"https://patchwork.plctlab.org/api/1.2/patches/41948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111115854.781A01358A@imap2.suse-dmz.suse.de/","msgid":"<20230111115854.781A01358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T11:58:54","name":"tree-optimization/108352 - FSM threads creating irreducible loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111115854.781A01358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41951,"url":"https://patchwork.plctlab.org/api/1.2/patches/41951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz7ll1hh.fsf@euler.schwinge.homeip.net/","msgid":"<87cz7ll1hh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T12:06:18","name":"[PING] nvptx: '\''-mframe-malloc-threshold'\'', '\''-Wframe-malloc-threshold'\'' (was: Handling of large stack objects in GPU code generation -- maybe transform into heap allocation?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz7ll1hh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41973,"url":"https://patchwork.plctlab.org/api/1.2/patches/41973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com/","msgid":"<8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T13:09:37","name":"[committed] rs6000/test: Make ppc-fortran.exp only available for PowerPC target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com/mbox/"},{"id":41979,"url":"https://patchwork.plctlab.org/api/1.2/patches/41979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com/","msgid":"<1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T13:21:19","name":"rs6000: Imply VSX early to adopt some checkings on conflict [PR108240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com/mbox/"},{"id":42016,"url":"https://patchwork.plctlab.org/api/1.2/patches/42016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-1-christophe.lyon@arm.com/","msgid":"<20230111141806.258233-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-11T14:18:05","name":"[v3,1/2] aarch64: fix warning emission for ABI break since GCC 9.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-1-christophe.lyon@arm.com/mbox/"},{"id":42017,"url":"https://patchwork.plctlab.org/api/1.2/patches/42017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-2-christophe.lyon@arm.com/","msgid":"<20230111141806.258233-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-11T14:18:06","name":"[v3,2/2] aarch64: Fix bit-field alignment in param passing [PR105549]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-2-christophe.lyon@arm.com/mbox/"},{"id":42027,"url":"https://patchwork.plctlab.org/api/1.2/patches/42027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com/","msgid":"<93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com>","list_archive_url":null,"date":"2023-01-11T14:23:57","name":"[1/2,v2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com/mbox/"},{"id":42035,"url":"https://patchwork.plctlab.org/api/1.2/patches/42035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d826d086-fd4b-18a5-3242-c60b086cbcdc@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T14:25:05","name":"[2/2,v2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d826d086-fd4b-18a5-3242-c60b086cbcdc@arm.com/mbox/"},{"id":42124,"url":"https://patchwork.plctlab.org/api/1.2/patches/42124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7742V4Ipt6WxHyb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T17:58:49","name":"c++: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7742V4Ipt6WxHyb@tucnak/mbox/"},{"id":42127,"url":"https://patchwork.plctlab.org/api/1.2/patches/42127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y776K/eRDes5Z0MD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T18:04:27","name":"c: Don'\''t emit DEBUG_BEGIN_STMTs for K&R function argument declarations [PR105972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y776K/eRDes5Z0MD@tucnak/mbox/"},{"id":42126,"url":"https://patchwork.plctlab.org/api/1.2/patches/42126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d5017a-8b63-3103-bad1-528a5b3723c3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T18:05:05","name":"[OG12,committed] amdgcn, libgomp: custom USM allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d5017a-8b63-3103-bad1-528a5b3723c3@codesourcery.com/mbox/"},{"id":42204,"url":"https://patchwork.plctlab.org/api/1.2/patches/42204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111213259.258216-1-dmalcolm@redhat.com/","msgid":"<20230111213259.258216-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-11T21:32:59","name":"[committed] analyzer: fix leak false positives on \"*UNKNOWN = PTR; \" [PR108252]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111213259.258216-1-dmalcolm@redhat.com/mbox/"},{"id":42208,"url":"https://patchwork.plctlab.org/api/1.2/patches/42208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111232554.A299633E60@hamza.pair.com/","msgid":"<20230111232554.A299633E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-11T23:25:42","name":"[committed] wwwdocs: gcc-8: Properly spell \"command-line option\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111232554.A299633E60@hamza.pair.com/mbox/"},{"id":42209,"url":"https://patchwork.plctlab.org/api/1.2/patches/42209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112001012.2D8C933EF6@hamza.pair.com/","msgid":"<20230112001012.2D8C933EF6@hamza.pair.com>","list_archive_url":null,"date":"2023-01-12T00:10:00","name":"[committed] config-list.mk: Remove obsolete FreeBSD targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112001012.2D8C933EF6@hamza.pair.com/mbox/"},{"id":42221,"url":"https://patchwork.plctlab.org/api/1.2/patches/42221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112014440.19153-1-palmer@rivosinc.com/","msgid":"<20230112014440.19153-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-01-12T01:44:40","name":"gimple-fold.h: Add missing gimple-iterator.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112014440.19153-1-palmer@rivosinc.com/mbox/"},{"id":42222,"url":"https://patchwork.plctlab.org/api/1.2/patches/42222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com/","msgid":"<77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T01:56:03","name":"[v2,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com/mbox/"},{"id":42251,"url":"https://patchwork.plctlab.org/api/1.2/patches/42251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp/","msgid":"<92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-12T04:25:58","name":"[1/2] xtensa: Tune \"*btrue\" insn pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp/mbox/"},{"id":42252,"url":"https://patchwork.plctlab.org/api/1.2/patches/42252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf7f5873-6959-9ca5-5a2f-83499ac78034@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-12T04:26:42","name":"[2/2] xtensa: Optimize ctzsi2 and ffssi2 a bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf7f5873-6959-9ca5-5a2f-83499ac78034@yahoo.co.jp/mbox/"},{"id":42258,"url":"https://patchwork.plctlab.org/api/1.2/patches/42258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com/","msgid":"<38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T05:34:18","name":"[v3,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com/mbox/"},{"id":42823,"url":"https://patchwork.plctlab.org/api/1.2/patches/42823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork01sjlmo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-12T06:46:23","name":"[18/18] hash table: enforce testing is_empty before is_deleted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork01sjlmo.fsf@lxoliva.fsfla.org/mbox/"},{"id":42273,"url":"https://patchwork.plctlab.org/api/1.2/patches/42273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112073441.282-1-jinma@linux.alibaba.com/","msgid":"<20230112073441.282-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T07:34:41","name":"[v4,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112073441.282-1-jinma@linux.alibaba.com/mbox/"},{"id":42354,"url":"https://patchwork.plctlab.org/api/1.2/patches/42354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com/","msgid":"<6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com>","list_archive_url":null,"date":"2023-01-12T10:22:40","name":"Fortran/OpenMP: Reject non-scalar '\''holds'\'' expr in '\''omp assume(s)'\'' [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com/mbox/"},{"id":42421,"url":"https://patchwork.plctlab.org/api/1.2/patches/42421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112130359.5F57538543B3@sourceware.org/","msgid":"<20230112130359.5F57538543B3@sourceware.org>","list_archive_url":null,"date":"2023-01-12T13:03:14","name":"tree-optimization/99412 - reassoc and reduction chains","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112130359.5F57538543B3@sourceware.org/mbox/"},{"id":42442,"url":"https://patchwork.plctlab.org/api/1.2/patches/42442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgan6eug.fsf@euler.schwinge.homeip.net/","msgid":"<87zgan6eug.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-12T13:51:19","name":"nvptx: Avoid deadlock in '\''cuStreamAddCallback'\'' callback, error case (was: [PATCH 6/6, OpenACC, libgomp] Async re-work, nvptx changes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgan6eug.fsf@euler.schwinge.homeip.net/mbox/"},{"id":42780,"url":"https://patchwork.plctlab.org/api/1.2/patches/42780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8BuGyewY8o2YFkR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-12T20:31:23","name":"c, c++, v2: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8BuGyewY8o2YFkR@tucnak/mbox/"},{"id":42806,"url":"https://patchwork.plctlab.org/api/1.2/patches/42806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205845.931635-1-jwakely@redhat.com/","msgid":"<20230112205845.931635-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T20:58:45","name":"[committed] libstdc++: Update shared library version history in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205845.931635-1-jwakely@redhat.com/mbox/"},{"id":42809,"url":"https://patchwork.plctlab.org/api/1.2/patches/42809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205949.932013-1-jwakely@redhat.com/","msgid":"<20230112205949.932013-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T20:59:49","name":"[committed] libstdc++: Extend max_align_t special case to 64-bit HP-UX [PR77691]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205949.932013-1-jwakely@redhat.com/mbox/"},{"id":42812,"url":"https://patchwork.plctlab.org/api/1.2/patches/42812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112210401.932343-1-jwakely@redhat.com/","msgid":"<20230112210401.932343-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T21:04:01","name":"libstdc++: Make forward to C version if included by C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112210401.932343-1-jwakely@redhat.com/mbox/"},{"id":42822,"url":"https://patchwork.plctlab.org/api/1.2/patches/42822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112211010.932966-1-jwakely@redhat.com/","msgid":"<20230112211010.932966-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T21:10:10","name":"libstdc++: Fix unintended layout change to std::basic_filebuf [PR108331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112211010.932966-1-jwakely@redhat.com/mbox/"},{"id":42856,"url":"https://patchwork.plctlab.org/api/1.2/patches/42856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112230406.2023047-2-qing.zhao@oracle.com/","msgid":"<20230112230406.2023047-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-12T23:04:06","name":"[1/1] Replace flag_strict_flex_arrays with DECL_NOT_FLEXARRAY in middle-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112230406.2023047-2-qing.zhao@oracle.com/mbox/"},{"id":42876,"url":"https://patchwork.plctlab.org/api/1.2/patches/42876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001546.944147-1-jwakely@redhat.com/","msgid":"<20230113001546.944147-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-13T00:15:46","name":"[committed] libstdc++: Do not include in concurrency headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001546.944147-1-jwakely@redhat.com/mbox/"},{"id":42878,"url":"https://patchwork.plctlab.org/api/1.2/patches/42878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001559.944194-1-jwakely@redhat.com/","msgid":"<20230113001559.944194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-13T00:15:59","name":"[committed] libstdc++: Fix exports for IEEE128 versions of __try_use_facet [PR108327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001559.944194-1-jwakely@redhat.com/mbox/"},{"id":42880,"url":"https://patchwork.plctlab.org/api/1.2/patches/42880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001919.87334-1-iain@sandoe.co.uk/","msgid":"<20230113001919.87334-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-13T00:19:19","name":"modula-2: Handle pass '\''-v'\'' option to the compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001919.87334-1-iain@sandoe.co.uk/mbox/"},{"id":42883,"url":"https://patchwork.plctlab.org/api/1.2/patches/42883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CmpuU+Js7Tlsqz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T00:32:38","name":"c, c++: Allow ignoring -Winit-self through pragmas [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CmpuU+Js7Tlsqz@tucnak/mbox/"},{"id":42884,"url":"https://patchwork.plctlab.org/api/1.2/patches/42884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CndZxq5djLlAB/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T00:36:05","name":"x86: Avoid -Wuninitialized warnings on _mm*_undefined_* in C++ [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CndZxq5djLlAB/@tucnak/mbox/"},{"id":42909,"url":"https://patchwork.plctlab.org/api/1.2/patches/42909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113032755.3318339-1-chenglulu@loongson.cn/","msgid":"<20230113032755.3318339-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-01-13T03:27:56","name":"[v5] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113032755.3318339-1-chenglulu@loongson.cn/mbox/"},{"id":43052,"url":"https://patchwork.plctlab.org/api/1.2/patches/43052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113075953.34CCB13913@imap2.suse-dmz.suse.de/","msgid":"<20230113075953.34CCB13913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T07:59:52","name":"[1/9] aarch64: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113075953.34CCB13913@imap2.suse-dmz.suse.de/mbox/"},{"id":43054,"url":"https://patchwork.plctlab.org/api/1.2/patches/43054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080003.D7E8713913@imap2.suse-dmz.suse.de/","msgid":"<20230113080003.D7E8713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:03","name":"[2/9] alpha: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080003.D7E8713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43053,"url":"https://patchwork.plctlab.org/api/1.2/patches/43053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080015.6E41613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080015.6E41613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:15","name":"[3/9] arm: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080015.6E41613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43055,"url":"https://patchwork.plctlab.org/api/1.2/patches/43055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080100.2837913913@imap2.suse-dmz.suse.de/","msgid":"<20230113080100.2837913913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:59","name":"[4/9] ia64: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080100.2837913913@imap2.suse-dmz.suse.de/mbox/"},{"id":43056,"url":"https://patchwork.plctlab.org/api/1.2/patches/43056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080112.88F1713913@imap2.suse-dmz.suse.de/","msgid":"<20230113080112.88F1713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:12","name":"[5/9] loongarch: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080112.88F1713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43057,"url":"https://patchwork.plctlab.org/api/1.2/patches/43057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080124.46AB613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080124.46AB613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:23","name":"[6/9] mips: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080124.46AB613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43058,"url":"https://patchwork.plctlab.org/api/1.2/patches/43058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080135.43B3813913@imap2.suse-dmz.suse.de/","msgid":"<20230113080135.43B3813913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:34","name":"[7/9] sparc: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080135.43B3813913@imap2.suse-dmz.suse.de/mbox/"},{"id":43059,"url":"https://patchwork.plctlab.org/api/1.2/patches/43059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080146.E61D613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080146.E61D613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:46","name":"[8/9] solaris2: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080146.E61D613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43060,"url":"https://patchwork.plctlab.org/api/1.2/patches/43060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080203.73D8113913@imap2.suse-dmz.suse.de/","msgid":"<20230113080203.73D8113913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:02:03","name":"[9/9] Clarify -shared effect on crtfastmath.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080203.73D8113913@imap2.suse-dmz.suse.de/mbox/"},{"id":43075,"url":"https://patchwork.plctlab.org/api/1.2/patches/43075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113083930.A7C8713913@imap2.suse-dmz.suse.de/","msgid":"<20230113083930.A7C8713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:39:30","name":"Sync LTO type_for_mode with c-family/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113083930.A7C8713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43100,"url":"https://patchwork.plctlab.org/api/1.2/patches/43100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113091450.72599-1-lehua.ding@rivai.ai/","msgid":"<20230113091450.72599-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-13T09:14:50","name":"[1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113091450.72599-1-lehua.ding@rivai.ai/mbox/"},{"id":43118,"url":"https://patchwork.plctlab.org/api/1.2/patches/43118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094236.77805-1-lehua.ding@rivai.ai/","msgid":"<20230113094236.77805-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-13T09:42:36","name":"[1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094236.77805-1-lehua.ding@rivai.ai/mbox/"},{"id":43121,"url":"https://patchwork.plctlab.org/api/1.2/patches/43121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094748.F0D891358A@imap2.suse-dmz.suse.de/","msgid":"<20230113094748.F0D891358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T09:47:48","name":"tree-optimization/108387 - ICE with VN handling of x << C as x * (1<","list_archive_url":null,"date":"2023-01-13T09:56:51","name":"Don'\''t add crtfastmath.o for -shared.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113095651.1367699-1-hongtao.liu@intel.com/mbox/"},{"id":43128,"url":"https://patchwork.plctlab.org/api/1.2/patches/43128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8ri6u4y1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:03:34","name":"[pushed] aarch64: Don'\''t update EH info when folding [PR107209]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8ri6u4y1.fsf@arm.com/mbox/"},{"id":43129,"url":"https://patchwork.plctlab.org/api/1.2/patches/43129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt358eu4u8.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:05:51","name":"[pushed] aarch64: Fix DWARF frame register sizes for predicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt358eu4u8.fsf_-_@arm.com/mbox/"},{"id":43130,"url":"https://patchwork.plctlab.org/api/1.2/patches/43130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8EvmUH3mP9/B5h4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:16:57","name":"[committed] testsuite: Add testcase for PR that went latent in GCC 13 [PR107131]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8EvmUH3mP9/B5h4@tucnak/mbox/"},{"id":43156,"url":"https://patchwork.plctlab.org/api/1.2/patches/43156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4771224.GXAFRqVoOG@fomalhaut/","msgid":"<4771224.GXAFRqVoOG@fomalhaut>","list_archive_url":null,"date":"2023-01-13T10:49:04","name":"Fix PR rtl-optimization/108274","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4771224.GXAFRqVoOG@fomalhaut/mbox/"},{"id":43268,"url":"https://patchwork.plctlab.org/api/1.2/patches/43268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113123805.75201-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113123805.75201-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:38:05","name":"[committed] C-SKY: Add conditions for ceil etc patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113123805.75201-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43272,"url":"https://patchwork.plctlab.org/api/1.2/patches/43272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124211.75278-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124211.75278-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:11","name":"[committed] C-SKY: Skip other CPUs if the testcases are only for ck801.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124211.75278-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43273,"url":"https://patchwork.plctlab.org/api/1.2/patches/43273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124223.75333-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124223.75333-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:23","name":"[committed] C-SKY: Fix patterns'\'' condition for ck802 smart mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124223.75333-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43276,"url":"https://patchwork.plctlab.org/api/1.2/patches/43276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124234.75388-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124234.75388-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:34","name":"[committed] C-SKY: Add missing builtin defines for soft float abi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124234.75388-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43280,"url":"https://patchwork.plctlab.org/api/1.2/patches/43280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124247.75440-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124247.75440-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:47","name":"[committed] C-SKY: Fix skip codition for testcase ldbs.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124247.75440-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43275,"url":"https://patchwork.plctlab.org/api/1.2/patches/43275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124302.75492-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124302.75492-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:43:02","name":"[committed] C-SKY: Fix float abi option in MULTILIB_DEFAULTS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124302.75492-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43274,"url":"https://patchwork.plctlab.org/api/1.2/patches/43274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124319.75544-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124319.75544-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:43:19","name":"[committed] C-SKY: Define SYSROOT_SUFFIX_SPEC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124319.75544-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43387,"url":"https://patchwork.plctlab.org/api/1.2/patches/43387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com/","msgid":"<5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-13T15:40:15","name":"[Committed] arm: Add cde feature support for Cortex-M55 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com/mbox/"},{"id":43428,"url":"https://patchwork.plctlab.org/api/1.2/patches/43428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GJazeTmfv+2xgb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T16:40:11","name":"[committed] testsuite: Add another testcase from PR107131","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GJazeTmfv+2xgb@tucnak/mbox/"},{"id":43500,"url":"https://patchwork.plctlab.org/api/1.2/patches/43500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GY0+AOA8qXDm8h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T17:45:55","name":"c, c++, v3: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GY0+AOA8qXDm8h@tucnak/mbox/"},{"id":43511,"url":"https://patchwork.plctlab.org/api/1.2/patches/43511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113175428.1771219-1-stefansf@linux.ibm.com/","msgid":"<20230113175428.1771219-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-01-13T17:54:29","name":"IBM zSystems: Fix TARGET_D_CPU_VERSIONS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113175428.1771219-1-stefansf@linux.ibm.com/mbox/"},{"id":43540,"url":"https://patchwork.plctlab.org/api/1.2/patches/43540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru/","msgid":"<0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru>","list_archive_url":null,"date":"2023-01-13T18:20:12","name":"sched-deps: do not schedule pseudos across calls [PR108117]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru/mbox/"},{"id":43560,"url":"https://patchwork.plctlab.org/api/1.2/patches/43560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Gzh4bMh3n/RVyo@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-13T19:39:51","name":"[committed] hppa: Fix support for atomic loads and stores on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Gzh4bMh3n/RVyo@mx3210.localdomain/mbox/"},{"id":43613,"url":"https://patchwork.plctlab.org/api/1.2/patches/43613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2211088.iZASKD2KPV@fomalhaut/","msgid":"<2211088.iZASKD2KPV@fomalhaut>","list_archive_url":null,"date":"2023-01-13T21:16:02","name":"[c-family] Small fix for -fdump-ada-spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2211088.iZASKD2KPV@fomalhaut/mbox/"},{"id":43616,"url":"https://patchwork.plctlab.org/api/1.2/patches/43616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com/","msgid":"<3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com>","list_archive_url":null,"date":"2023-01-13T21:23:20","name":"PR tree-optimization/108359 - Utilize op1 == op2 when invoking range-ops folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com/mbox/"},{"id":43644,"url":"https://patchwork.plctlab.org/api/1.2/patches/43644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113225428.380307-1-dmalcolm@redhat.com/","msgid":"<20230113225428.380307-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-13T22:54:28","name":"[committed] analyzer: add heuristics for switch on enum type [PR105273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113225428.380307-1-dmalcolm@redhat.com/mbox/"},{"id":43649,"url":"https://patchwork.plctlab.org/api/1.2/patches/43649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8HnvoRv09X8izTQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T23:22:38","name":"[v4] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8HnvoRv09X8izTQ@redhat.com/mbox/"},{"id":43696,"url":"https://patchwork.plctlab.org/api/1.2/patches/43696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp/","msgid":"<0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-14T05:03:55","name":"xtensa: Remove old broken tweak for leaf function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp/mbox/"},{"id":43745,"url":"https://patchwork.plctlab.org/api/1.2/patches/43745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114105046.35020-1-iain@sandoe.co.uk/","msgid":"<20230114105046.35020-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-14T10:50:46","name":"modula-2: Fix stack size request in initPreemptive [PR108405]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114105046.35020-1-iain@sandoe.co.uk/mbox/"},{"id":43747,"url":"https://patchwork.plctlab.org/api/1.2/patches/43747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz7hxsqf.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-14T11:26:00","name":"[PR106746] drop cselib addr lookup in debug insn mem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz7hxsqf.fsf@lxoliva.fsfla.org/mbox/"},{"id":43781,"url":"https://patchwork.plctlab.org/api/1.2/patches/43781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114170035.1238643-1-jwakely@redhat.com/","msgid":"<20230114170035.1238643-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T17:00:35","name":"[committed] libstdc++: Fix ostream insertion operators for calendar types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114170035.1238643-1-jwakely@redhat.com/mbox/"},{"id":43787,"url":"https://patchwork.plctlab.org/api/1.2/patches/43787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b18279769199fe5019effd045d7999e2992996ad.1673721922.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-14T18:46:24","name":"libcpp: Fix ICE on directive inside _Pragma() operator [PR67046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b18279769199fe5019effd045d7999e2992996ad.1673721922.git.lhyatt@gmail.com/mbox/"},{"id":43793,"url":"https://patchwork.plctlab.org/api/1.2/patches/43793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114203945.1282157-1-jwakely@redhat.com/","msgid":"<20230114203945.1282157-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T20:39:45","name":"libatomic: Use config/mingw/lock.c for --enable-threads=single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114203945.1282157-1-jwakely@redhat.com/mbox/"},{"id":43799,"url":"https://patchwork.plctlab.org/api/1.2/patches/43799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114215953.1299851-1-jwakely@redhat.com/","msgid":"<20230114215953.1299851-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T21:59:53","name":"[committed] libstdc++: Implement std::chrono::current_zone() for AIX [PR108409]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114215953.1299851-1-jwakely@redhat.com/mbox/"},{"id":43806,"url":"https://patchwork.plctlab.org/api/1.2/patches/43806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115023207.88481-1-cooper.qu@linux.alibaba.com/","msgid":"<20230115023207.88481-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-15T02:32:07","name":"[COMMITTED] C-SKY: Support --with-float=softfp in configuration.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115023207.88481-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43808,"url":"https://patchwork.plctlab.org/api/1.2/patches/43808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115055842.3965247-1-pefoley2@pefoley.com/","msgid":"<20230115055842.3965247-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-15T05:58:42","name":"configure: Only create serdep.tmp if needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115055842.3965247-1-pefoley2@pefoley.com/mbox/"},{"id":43824,"url":"https://patchwork.plctlab.org/api/1.2/patches/43824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115102738.19101-1-aldyh@redhat.com/","msgid":"<20230115102738.19101-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-01-15T10:27:38","name":"[PR107608,range-ops] Avoid folding into INF when flag_trapping_math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115102738.19101-1-aldyh@redhat.com/mbox/"},{"id":43825,"url":"https://patchwork.plctlab.org/api/1.2/patches/43825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115103227.19393-1-aldyh@redhat.com/","msgid":"<20230115103227.19393-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-01-15T10:32:27","name":"[PR107608,range-ops] Avoid folding into INF when flag_trapping_math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115103227.19393-1-aldyh@redhat.com/mbox/"},{"id":43847,"url":"https://patchwork.plctlab.org/api/1.2/patches/43847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115124544.1338953-1-jwakely@redhat.com/","msgid":"<20230115124544.1338953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T12:45:44","name":"[committed] libstdc++: Fix narrowing conversion in std/time/clock/utc/io.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115124544.1338953-1-jwakely@redhat.com/mbox/"},{"id":43852,"url":"https://patchwork.plctlab.org/api/1.2/patches/43852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115134735.62D2E33E70@hamza.pair.com/","msgid":"<20230115134735.62D2E33E70@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T13:47:20","name":"[committed] config-list.mk: Modernize FreeBSD targets towards version 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115134735.62D2E33E70@hamza.pair.com/mbox/"},{"id":43853,"url":"https://patchwork.plctlab.org/api/1.2/patches/43853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115135122.1345194-1-jwakely@redhat.com/","msgid":"<20230115135122.1345194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T13:51:22","name":"[committed] libstdc++: Remove unconditional -pthread from test options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115135122.1345194-1-jwakely@redhat.com/mbox/"},{"id":43875,"url":"https://patchwork.plctlab.org/api/1.2/patches/43875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115164703.1354873-1-jwakely@redhat.com/","msgid":"<20230115164703.1354873-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T16:47:03","name":"[committed] libstdc++: Remove dg-xfail-run-if in std/time/tzdb_list/1.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115164703.1354873-1-jwakely@redhat.com/mbox/"},{"id":43902,"url":"https://patchwork.plctlab.org/api/1.2/patches/43902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115212759.43AEF33E59@hamza.pair.com/","msgid":"<20230115212759.43AEF33E59@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T21:27:43","name":"[committed] wwwdocs: faq: Move c-faq.com to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115212759.43AEF33E59@hamza.pair.com/mbox/"},{"id":43903,"url":"https://patchwork.plctlab.org/api/1.2/patches/43903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115213754.0432533E56@hamza.pair.com/","msgid":"<20230115213754.0432533E56@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T21:37:38","name":"[committed] wwwdocs: gcc-4.5: Convert www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115213754.0432533E56@hamza.pair.com/mbox/"},{"id":43905,"url":"https://patchwork.plctlab.org/api/1.2/patches/43905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221511.5EF7A33E24@hamza.pair.com/","msgid":"<20230115221511.5EF7A33E24@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T22:14:55","name":"[committed] wwwdocs: codingconventions: Adjust Intel BID library link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221511.5EF7A33E24@hamza.pair.com/mbox/"},{"id":43907,"url":"https://patchwork.plctlab.org/api/1.2/patches/43907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221707.EFEEC33E24@hamza.pair.com/","msgid":"<20230115221707.EFEEC33E24@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T22:16:52","name":"[committed] wwwdocs: gcc-3.4: Switch www.eclipse.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221707.EFEEC33E24@hamza.pair.com/mbox/"},{"id":43911,"url":"https://patchwork.plctlab.org/api/1.2/patches/43911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115231619.CA29E33E13@hamza.pair.com/","msgid":"<20230115231619.CA29E33E13@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T23:16:03","name":"[committed] libstdc++: Move www.open-std.org in status part of manual to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115231619.CA29E33E13@hamza.pair.com/mbox/"},{"id":43930,"url":"https://patchwork.plctlab.org/api/1.2/patches/43930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3e65485-20e4-9513-3bc5-a6f964fc99b7@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-16T02:52:55","name":"xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3e65485-20e4-9513-3bc5-a6f964fc99b7@yahoo.co.jp/mbox/"},{"id":43995,"url":"https://patchwork.plctlab.org/api/1.2/patches/43995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116071148.427-1-tejas.belagod@arm.com/","msgid":"<20230116071148.427-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-01-16T07:11:48","name":"AArch64: Gate various crypto intrinsics availability based on features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116071148.427-1-tejas.belagod@arm.com/mbox/"},{"id":44008,"url":"https://patchwork.plctlab.org/api/1.2/patches/44008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116075129.A633D33E4B@hamza.pair.com/","msgid":"<20230116075129.A633D33E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T07:51:10","name":"[committed] wwwdocs: projects/cfg: Update reference to paper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116075129.A633D33E4B@hamza.pair.com/mbox/"},{"id":44024,"url":"https://patchwork.plctlab.org/api/1.2/patches/44024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com/","msgid":"<1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T08:33:36","name":"rs6000: Teach rs6000_opaque_type_invalid_use_p about gcall [PR108348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com/mbox/"},{"id":44031,"url":"https://patchwork.plctlab.org/api/1.2/patches/44031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9230de2-d3d3-c960-f39a-4f81b6a094bc@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-16T09:08:02","name":"[v2] rs6000: Don'\''t use optimize_function_for_speed_p too early [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9230de2-d3d3-c960-f39a-4f81b6a094bc@linux.ibm.com/mbox/"},{"id":44040,"url":"https://patchwork.plctlab.org/api/1.2/patches/44040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com/","msgid":"<6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T09:39:04","name":"[PATCH/RFC] rs6000: Remove optimize_for_speed check for implicit TARGET_SAVE_TOC_INDIRECT [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com/mbox/"},{"id":44048,"url":"https://patchwork.plctlab.org/api/1.2/patches/44048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UfdUzj63BuX6oj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T09:57:09","name":"contrib: Partial fix for failed update-copyright --this year [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UfdUzj63BuX6oj@tucnak/mbox/"},{"id":44065,"url":"https://patchwork.plctlab.org/api/1.2/patches/44065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UmRw0SIp0yEk26@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T10:26:15","name":"[committed] riscv: Fix up Copyright lines [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UmRw0SIp0yEk26@tucnak/mbox/"},{"id":44066,"url":"https://patchwork.plctlab.org/api/1.2/patches/44066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116102949.10821-1-jwakely@redhat.com/","msgid":"<20230116102949.10821-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:29:49","name":"[committed] doc: Fix grammar typo in description of malloc attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116102949.10821-1-jwakely@redhat.com/mbox/"},{"id":44068,"url":"https://patchwork.plctlab.org/api/1.2/patches/44068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116103316.11780-1-jwakely@redhat.com/","msgid":"<20230116103316.11780-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:33:16","name":"[committed] libstdc++: Fix copyright notice to use usual form [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116103316.11780-1-jwakely@redhat.com/mbox/"},{"id":44071,"url":"https://patchwork.plctlab.org/api/1.2/patches/44071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Up3AJNfDcwsOzx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T10:41:32","name":"[committed] contrib: Yet another update-copyright.py tweak [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Up3AJNfDcwsOzx@tucnak/mbox/"},{"id":44081,"url":"https://patchwork.plctlab.org/api/1.2/patches/44081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116105001.13048-1-jwakely@redhat.com/","msgid":"<20230116105001.13048-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:50:01","name":"[wwwdocs] Document new libstdc++ header dependency changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116105001.13048-1-jwakely@redhat.com/mbox/"},{"id":44121,"url":"https://patchwork.plctlab.org/api/1.2/patches/44121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com/","msgid":"<33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T13:07:43","name":"rs6000: Fix typo on vec_vsubcuq in rs6000-overload.def [PR108396]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com/mbox/"},{"id":44175,"url":"https://patchwork.plctlab.org/api/1.2/patches/44175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aac9d189027b7e12c365f49e7148a3d7@autistici.org/","msgid":"","list_archive_url":null,"date":"2023-01-16T14:08:56","name":"lrealpath() patch to fix symlinks resolution for win32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aac9d189027b7e12c365f49e7148a3d7@autistici.org/mbox/"},{"id":44184,"url":"https://patchwork.plctlab.org/api/1.2/patches/44184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144832.3171227-1-poulhies@adacore.com/","msgid":"<20230116144832.3171227-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:32","name":"[COMMITTED] ada: Optimize interface objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144832.3171227-1-poulhies@adacore.com/mbox/"},{"id":44185,"url":"https://patchwork.plctlab.org/api/1.2/patches/44185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144841.3171334-1-poulhies@adacore.com/","msgid":"<20230116144841.3171334-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:41","name":"[COMMITTED] ada: Lift restriction on optimization of aliased objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144841.3171334-1-poulhies@adacore.com/mbox/"},{"id":44189,"url":"https://patchwork.plctlab.org/api/1.2/patches/44189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144848.3171399-1-poulhies@adacore.com/","msgid":"<20230116144848.3171399-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:48","name":"[COMMITTED] ada: Put back conversion to interface in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144848.3171399-1-poulhies@adacore.com/mbox/"},{"id":44188,"url":"https://patchwork.plctlab.org/api/1.2/patches/44188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144853.3171463-1-poulhies@adacore.com/","msgid":"<20230116144853.3171463-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:53","name":"[COMMITTED] ada: Further optimize interface objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144853.3171463-1-poulhies@adacore.com/mbox/"},{"id":44186,"url":"https://patchwork.plctlab.org/api/1.2/patches/44186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144900.3171529-1-poulhies@adacore.com/","msgid":"<20230116144900.3171529-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:00","name":"[COMMITTED] ada: Fix premature finalization of temporaries for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144900.3171529-1-poulhies@adacore.com/mbox/"},{"id":44191,"url":"https://patchwork.plctlab.org/api/1.2/patches/44191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144906.3171599-1-poulhies@adacore.com/","msgid":"<20230116144906.3171599-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:06","name":"[COMMITTED] ada: Fix benign pasto in new predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144906.3171599-1-poulhies@adacore.com/mbox/"},{"id":44187,"url":"https://patchwork.plctlab.org/api/1.2/patches/44187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144911.3171666-1-poulhies@adacore.com/","msgid":"<20230116144911.3171666-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:11","name":"[COMMITTED] ada: Use static references to tag in more cases for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144911.3171666-1-poulhies@adacore.com/mbox/"},{"id":44196,"url":"https://patchwork.plctlab.org/api/1.2/patches/44196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144916.3171732-1-poulhies@adacore.com/","msgid":"<20230116144916.3171732-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:16","name":"[COMMITTED] ada: Fix pessimization of some CW objects initialized with function call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144916.3171732-1-poulhies@adacore.com/mbox/"},{"id":44202,"url":"https://patchwork.plctlab.org/api/1.2/patches/44202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144923.3171796-1-poulhies@adacore.com/","msgid":"<20230116144923.3171796-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:23","name":"[COMMITTED] ada: Fix latent bug exposed by recent work on extended return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144923.3171796-1-poulhies@adacore.com/mbox/"},{"id":44204,"url":"https://patchwork.plctlab.org/api/1.2/patches/44204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144928.3171863-1-poulhies@adacore.com/","msgid":"<20230116144928.3171863-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:28","name":"[COMMITTED] ada: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144928.3171863-1-poulhies@adacore.com/mbox/"},{"id":44197,"url":"https://patchwork.plctlab.org/api/1.2/patches/44197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144936.3171936-1-poulhies@adacore.com/","msgid":"<20230116144936.3171936-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:36","name":"[COMMITTED] ada: Update copyright years.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144936.3171936-1-poulhies@adacore.com/mbox/"},{"id":44247,"url":"https://patchwork.plctlab.org/api/1.2/patches/44247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116161002.40093-1-jwakely@redhat.com/","msgid":"<20230116161002.40093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T16:10:02","name":"[committed] libstdc++: Fix --with-default-libstdcxx-abi=gcc4-compatible build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116161002.40093-1-jwakely@redhat.com/mbox/"},{"id":44274,"url":"https://patchwork.plctlab.org/api/1.2/patches/44274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8WG3g+bAIynpiHC@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-16T17:18:22","name":"Fix wrong code issues with ipa-sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8WG3g+bAIynpiHC@kam.mff.cuni.cz/mbox/"},{"id":44289,"url":"https://patchwork.plctlab.org/api/1.2/patches/44289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185633.159901-1-hjl.tools@gmail.com/","msgid":"<20230116185633.159901-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-16T18:56:33","name":"x86: Disable -mforce-indirect-call for PIC in 32-bit mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185633.159901-1-hjl.tools@gmail.com/mbox/"},{"id":44290,"url":"https://patchwork.plctlab.org/api/1.2/patches/44290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185944.4BF8233F26@hamza.pair.com/","msgid":"<20230116185944.4BF8233F26@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T18:59:25","name":"[committed] wwwdocs: git: Remove trailing slash from tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185944.4BF8233F26@hamza.pair.com/mbox/"},{"id":44295,"url":"https://patchwork.plctlab.org/api/1.2/patches/44295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116192915.7C8DF33F27@hamza.pair.com/","msgid":"<20230116192915.7C8DF33F27@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T19:28:56","name":"[committed] wwwdocs: readings: Move www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116192915.7C8DF33F27@hamza.pair.com/mbox/"},{"id":44308,"url":"https://patchwork.plctlab.org/api/1.2/patches/44308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1a5ca55f-e1cb-417f-9f67-59b39c16bc64-1673901535696@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-01-16T20:38:55","name":"Fortran: fix ICE in get_expr_storage_size [PR108421]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1a5ca55f-e1cb-417f-9f67-59b39c16bc64-1673901535696@3c-app-gmx-bs50/mbox/"},{"id":44321,"url":"https://patchwork.plctlab.org/api/1.2/patches/44321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9ff539aa-079f-42e1-9456-a47833bc44a8-1673903509644@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-01-16T21:11:49","name":"Fortran: fix ICE in check_charlen_present [PR108420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9ff539aa-079f-42e1-9456-a47833bc44a8-1673903509644@3c-app-gmx-bs50/mbox/"},{"id":44399,"url":"https://patchwork.plctlab.org/api/1.2/patches/44399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116235816.658483-1-apinski@marvell.com/","msgid":"<20230116235816.658483-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-01-16T23:58:16","name":"[COMMITTED] Remove reference to Solaris 9 in comment of add_options_for_tls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116235816.658483-1-apinski@marvell.com/mbox/"},{"id":44401,"url":"https://patchwork.plctlab.org/api/1.2/patches/44401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117011203.3342271-1-pefoley2@pefoley.com/","msgid":"<20230117011203.3342271-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-17T01:12:03","name":"[v2] configure: Only create serdep.tmp if needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117011203.3342271-1-pefoley2@pefoley.com/mbox/"},{"id":44402,"url":"https://patchwork.plctlab.org/api/1.2/patches/44402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117012518.3382059-1-pefoley2@pefoley.com/","msgid":"<20230117012518.3382059-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-17T01:25:18","name":"ada: Respect GNATMAKE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117012518.3382059-1-pefoley2@pefoley.com/mbox/"},{"id":44485,"url":"https://patchwork.plctlab.org/api/1.2/patches/44485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp/","msgid":"<70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-17T04:12:50","name":"[v2] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp/mbox/"},{"id":44492,"url":"https://patchwork.plctlab.org/api/1.2/patches/44492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aba72208-c9b6-0d9e-918d-4b7e402b634b@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-17T04:54:44","name":"xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aba72208-c9b6-0d9e-918d-4b7e402b634b@yahoo.co.jp/mbox/"},{"id":44561,"url":"https://patchwork.plctlab.org/api/1.2/patches/44561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilh58rnd.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-17T08:57:42","name":"libsanitizer: Fix asan SEGVs with gld on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilh58rnd.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":44613,"url":"https://patchwork.plctlab.org/api/1.2/patches/44613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8ZuxWBRYJgTleuS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-17T09:47:49","name":"forwprop: Fix up rotate pattern matching [PR106523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8ZuxWBRYJgTleuS@tucnak/mbox/"},{"id":44620,"url":"https://patchwork.plctlab.org/api/1.2/patches/44620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de/","msgid":"<20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-17T10:13:19","name":"middle-end/106075 - non-call EH and DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de/mbox/"},{"id":44638,"url":"https://patchwork.plctlab.org/api/1.2/patches/44638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=J8Vye=RPBw1sWQnUzxfC1C2UPT_vc+_jmXOeYJG-YGQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T10:46:45","name":"[aarch64] Use wzr/xzr for assigning vector element to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=J8Vye=RPBw1sWQnUzxfC1C2UPT_vc+_jmXOeYJG-YGQ@mail.gmail.com/mbox/"},{"id":44643,"url":"https://patchwork.plctlab.org/api/1.2/patches/44643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dea53b40-6611-08a5-7bc3-2ce21b1bd6fb@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-17T11:20:14","name":"[(pushed)] Regenerate Makefile.in files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dea53b40-6611-08a5-7bc3-2ce21b1bd6fb@suse.cz/mbox/"},{"id":44647,"url":"https://patchwork.plctlab.org/api/1.2/patches/44647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz/","msgid":"<609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz>","list_archive_url":null,"date":"2023-01-17T11:56:32","name":"[(pushed)] contrib: revert removal of CR character","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz/mbox/"},{"id":44648,"url":"https://patchwork.plctlab.org/api/1.2/patches/44648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d15fec2f-b7aa-2830-089a-62c0fd0b66d9@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-17T12:00:35","name":"contrib: ignore CR in update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d15fec2f-b7aa-2830-089a-62c0fd0b66d9@suse.cz/mbox/"},{"id":44659,"url":"https://patchwork.plctlab.org/api/1.2/patches/44659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz/","msgid":"<553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz>","list_archive_url":null,"date":"2023-01-17T13:02:42","name":"[(pushed)] Ignore test_patches.txt in update-copyright.py.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz/mbox/"},{"id":44683,"url":"https://patchwork.plctlab.org/api/1.2/patches/44683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117141840.172815-1-jwakely@redhat.com/","msgid":"<20230117141840.172815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-17T14:18:40","name":"[committed] libstdc++: Fix configuration of default zoneinfo dir on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117141840.172815-1-jwakely@redhat.com/mbox/"},{"id":44716,"url":"https://patchwork.plctlab.org/api/1.2/patches/44716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com/","msgid":"<18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com>","list_archive_url":null,"date":"2023-01-17T15:35:45","name":"[RFC] tree-optimization: fix optimize-out variables passed into func to alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com/mbox/"},{"id":44726,"url":"https://patchwork.plctlab.org/api/1.2/patches/44726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117162508.74789-1-jose.marchesi@oracle.com/","msgid":"<20230117162508.74789-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-01-17T16:25:08","name":"[COMMITTED] bpf: disable -fstack-protector in BPF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117162508.74789-1-jose.marchesi@oracle.com/mbox/"},{"id":44742,"url":"https://patchwork.plctlab.org/api/1.2/patches/44742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170431.52986-1-iain@sandoe.co.uk/","msgid":"<20230117170431.52986-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-17T17:04:31","name":"modula-2, driver, Front end: Revise handling of I and L paths [PR108182].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170431.52986-1-iain@sandoe.co.uk/mbox/"},{"id":44745,"url":"https://patchwork.plctlab.org/api/1.2/patches/44745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWc4b_LdY2hUaFdqSXXSfCm95ujA0qft8wcBb4fxRSM9g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T17:05:42","name":"Go patch committed: Define builtin functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWc4b_LdY2hUaFdqSXXSfCm95ujA0qft8wcBb4fxRSM9g@mail.gmail.com/mbox/"},{"id":44748,"url":"https://patchwork.plctlab.org/api/1.2/patches/44748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170655.53157-1-iain@sandoe.co.uk/","msgid":"<20230117170655.53157-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-17T17:06:55","name":"modula-2, testsuite: Make libs and interfaces consistent.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170655.53157-1-iain@sandoe.co.uk/mbox/"},{"id":44800,"url":"https://patchwork.plctlab.org/api/1.2/patches/44800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB5412605A8D2993AFD96B036BACC69@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T21:12:12","name":"libstdc++: testsuite: Simplify codecvt_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB5412605A8D2993AFD96B036BACC69@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":44801,"url":"https://patchwork.plctlab.org/api/1.2/patches/44801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211313.D71DC33F99@hamza.pair.com/","msgid":"<20230117211313.D71DC33F99@hamza.pair.com>","list_archive_url":null,"date":"2023-01-17T21:12:54","name":"[committed] wwwdocs: rsync: Remove trailing slash from tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211313.D71DC33F99@hamza.pair.com/mbox/"},{"id":44802,"url":"https://patchwork.plctlab.org/api/1.2/patches/44802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211921.5A75C33FA8@hamza.pair.com/","msgid":"<20230117211921.5A75C33FA8@hamza.pair.com>","list_archive_url":null,"date":"2023-01-17T21:19:02","name":"[committed] wwwdocs: gcc-4.7: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211921.5A75C33FA8@hamza.pair.com/mbox/"},{"id":44828,"url":"https://patchwork.plctlab.org/api/1.2/patches/44828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117225908.1604948-1-vineetg@rivosinc.com/","msgid":"<20230117225908.1604948-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-01-17T22:59:08","name":"riscv: generate builtin macro for compilation with strict alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117225908.1604948-1-vineetg@rivosinc.com/mbox/"},{"id":44933,"url":"https://patchwork.plctlab.org/api/1.2/patches/44933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118024415.64340-1-juzhe.zhong@rivai.ai/","msgid":"<20230118024415.64340-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:44:15","name":"RISC-V: Fix incorrect attributes of vsetvl instructions pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118024415.64340-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44934,"url":"https://patchwork.plctlab.org/api/1.2/patches/44934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025014.65261-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025014.65261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:50:14","name":"RISC-V: Change VSETVL PASS always call split_all_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025014.65261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44935,"url":"https://patchwork.plctlab.org/api/1.2/patches/44935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025341.66033-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025341.66033-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:53:41","name":"RISC-V: Remove DCE in VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025341.66033-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44939,"url":"https://patchwork.plctlab.org/api/1.2/patches/44939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025832.66827-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025832.66827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:58:32","name":"RISC-V: Clang-format some annotations[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025832.66827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44940,"url":"https://patchwork.plctlab.org/api/1.2/patches/44940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030347.68061-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030347.68061-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:03:47","name":"RISC-V: Reorder VSETVL PASS location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030347.68061-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44943,"url":"https://patchwork.plctlab.org/api/1.2/patches/44943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030654.4083983-1-chenglulu@loongson.cn/","msgid":"<20230118030654.4083983-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-01-18T03:06:56","name":"[v6] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030654.4083983-1-chenglulu@loongson.cn/mbox/"},{"id":44941,"url":"https://patchwork.plctlab.org/api/1.2/patches/44941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030659.68604-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030659.68604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:06:59","name":"RISC-V: Change parse_insn into public for future use.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030659.68604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44942,"url":"https://patchwork.plctlab.org/api/1.2/patches/44942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030921.69098-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030921.69098-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:09:21","name":"RISC-V: Fix bug of before_p function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030921.69098-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44944,"url":"https://patchwork.plctlab.org/api/1.2/patches/44944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031305.69740-1-juzhe.zhong@rivai.ai/","msgid":"<20230118031305.69740-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:13:05","name":"RISC-V: Refine function args of some functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031305.69740-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44945,"url":"https://patchwork.plctlab.org/api/1.2/patches/44945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031650.70285-1-juzhe.zhong@rivai.ai/","msgid":"<20230118031650.70285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:16:50","name":"RISC-V: Add :: for static function calling to avoid confusing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031650.70285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44949,"url":"https://patchwork.plctlab.org/api/1.2/patches/44949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032434.71273-1-juzhe.zhong@rivai.ai/","msgid":"<20230118032434.71273-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:24:34","name":"RISC-V: Finalize VSETVL PASS implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032434.71273-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44952,"url":"https://patchwork.plctlab.org/api/1.2/patches/44952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032915.71849-1-juzhe.zhong@rivai.ai/","msgid":"<20230118032915.71849-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:29:15","name":"RISC-V: Finalize testcases for final version VSETVL PASS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032915.71849-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44958,"url":"https://patchwork.plctlab.org/api/1.2/patches/44958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebf0364a-16ad-2c69-fd73-00a9fa949e50@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-18T04:23:52","name":"[v3] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebf0364a-16ad-2c69-fd73-00a9fa949e50@yahoo.co.jp/mbox/"},{"id":44976,"url":"https://patchwork.plctlab.org/api/1.2/patches/44976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd3c649a-64f0-6922-e7de-7170fb4bb419@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-18T05:25:41","name":"[v2] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd3c649a-64f0-6922-e7de-7170fb4bb419@yahoo.co.jp/mbox/"},{"id":44977,"url":"https://patchwork.plctlab.org/api/1.2/patches/44977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp/","msgid":"<5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-18T05:43:13","name":"xtensa: Optimize inversion of the MSB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp/mbox/"},{"id":45096,"url":"https://patchwork.plctlab.org/api/1.2/patches/45096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118083442.04BA933EEC@hamza.pair.com/","msgid":"<20230118083442.04BA933EEC@hamza.pair.com>","list_archive_url":null,"date":"2023-01-18T08:34:36","name":"[committed] wwwdocs: gcc-4.6: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118083442.04BA933EEC@hamza.pair.com/mbox/"},{"id":45098,"url":"https://patchwork.plctlab.org/api/1.2/patches/45098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f05d86a0-0bd2-6efb-31aa-6d163d91e184@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-18T08:36:29","name":"[rs6000] Convert TI AND with a special constant to DI AND [PR93123]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f05d86a0-0bd2-6efb-31aa-6d163d91e184@linux.ibm.com/mbox/"},{"id":45099,"url":"https://patchwork.plctlab.org/api/1.2/patches/45099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com/","msgid":"<55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com>","list_archive_url":null,"date":"2023-01-18T08:50:39","name":"[1/2] rs6000: Refactor script genfusion.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com/mbox/"},{"id":45104,"url":"https://patchwork.plctlab.org/api/1.2/patches/45104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com/","msgid":"<130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com>","list_archive_url":null,"date":"2023-01-18T09:02:47","name":"[2/2] rs6000: Refactor genfusion.pl a bit further","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com/mbox/"},{"id":45142,"url":"https://patchwork.plctlab.org/api/1.2/patches/45142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmlem0ywoy.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-01-18T10:16:29","name":"lto: pass through -funwind-tables and -fasynchronous-unwind-tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmlem0ywoy.fsf@suse.de/mbox/"},{"id":45152,"url":"https://patchwork.plctlab.org/api/1.2/patches/45152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c061f6c1c090362efbbcb9af9f6c758@autistici.org/","msgid":"<7c061f6c1c090362efbbcb9af9f6c758@autistici.org>","list_archive_url":null,"date":"2023-01-18T10:44:19","name":"realpath() patch to fix symlinks resolution for win32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c061f6c1c090362efbbcb9af9f6c758@autistici.org/mbox/"},{"id":45153,"url":"https://patchwork.plctlab.org/api/1.2/patches/45153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnmuV0Jf2=uBqnbmVTeTRVAZToNhR3X_kU9DCrTJM+Edw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-18T10:48:07","name":"[aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnmuV0Jf2=uBqnbmVTeTRVAZToNhR3X_kU9DCrTJM+Edw@mail.gmail.com/mbox/"},{"id":45293,"url":"https://patchwork.plctlab.org/api/1.2/patches/45293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118135707.2394F139D2@imap2.suse-dmz.suse.de/","msgid":"<20230118135707.2394F139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-18T13:57:06","name":"lto/108445 - avoid LTO decl wrapping being confused by tree sharing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118135707.2394F139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":45296,"url":"https://patchwork.plctlab.org/api/1.2/patches/45296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzgag544p.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-18T14:06:14","name":"wwwdocs: Announce Solaris 11.3 obsoletion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzgag544p.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":45340,"url":"https://patchwork.plctlab.org/api/1.2/patches/45340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com/","msgid":"<0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com>","list_archive_url":null,"date":"2023-01-18T15:42:24","name":"libfortran: Fix execute_command_line for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com/mbox/"},{"id":45385,"url":"https://patchwork.plctlab.org/api/1.2/patches/45385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118164501.8130-1-dmalcolm@redhat.com/","msgid":"<20230118164501.8130-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-18T16:45:01","name":"[committed] analyzer: add SARD testsuite 81","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118164501.8130-1-dmalcolm@redhat.com/mbox/"},{"id":45404,"url":"https://patchwork.plctlab.org/api/1.2/patches/45404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118175200.365397-1-polacek@redhat.com/","msgid":"<20230118175200.365397-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-18T17:52:00","name":"c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118175200.365397-1-polacek@redhat.com/mbox/"},{"id":45429,"url":"https://patchwork.plctlab.org/api/1.2/patches/45429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118191231.29839-1-hjl.tools@gmail.com/","msgid":"<20230118191231.29839-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-18T19:12:31","name":"x86: Check invalid third argument to __builtin_ia32_prefetch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118191231.29839-1-hjl.tools@gmail.com/mbox/"},{"id":45469,"url":"https://patchwork.plctlab.org/api/1.2/patches/45469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-1-christophe.lyon@arm.com/","msgid":"<20230118201649.11612-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-18T20:16:48","name":"[1/2] aarch64: fix ICE in aarch64_layout_arg [PR108411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-1-christophe.lyon@arm.com/mbox/"},{"id":45468,"url":"https://patchwork.plctlab.org/api/1.2/patches/45468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-2-christophe.lyon@arm.com/","msgid":"<20230118201649.11612-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-18T20:16:49","name":"[2/2] aarch64: add -fno-stack-protector to some tests [PR108411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-2-christophe.lyon@arm.com/mbox/"},{"id":45501,"url":"https://patchwork.plctlab.org/api/1.2/patches/45501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118211242.488379-1-polacek@redhat.com/","msgid":"<20230118211242.488379-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:12:42","name":"c: ICE with nullptr as case expression [PR108424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118211242.488379-1-polacek@redhat.com/mbox/"},{"id":45507,"url":"https://patchwork.plctlab.org/api/1.2/patches/45507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-294bce16-8b7b-4df3-b8a5-6f21ee37d08f-1674076842437@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-18T21:20:42","name":"Fortran: error recovery for invalid CLASS component [PR108434]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-294bce16-8b7b-4df3-b8a5-6f21ee37d08f-1674076842437@3c-app-gmx-bs46/mbox/"},{"id":45520,"url":"https://patchwork.plctlab.org/api/1.2/patches/45520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214922.440230-1-jwakely@redhat.com/","msgid":"<20230118214922.440230-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:49:22","name":"[committed] libstdc++: Fix std::random_device::entropy() for non-posix targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214922.440230-1-jwakely@redhat.com/mbox/"},{"id":45519,"url":"https://patchwork.plctlab.org/api/1.2/patches/45519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214929.440253-1-jwakely@redhat.com/","msgid":"<20230118214929.440253-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:49:29","name":"[committed] libstdc++: Deprecate std::filesystem::u8path for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214929.440253-1-jwakely@redhat.com/mbox/"},{"id":45526,"url":"https://patchwork.plctlab.org/api/1.2/patches/45526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118222004.A77E933F02@hamza.pair.com/","msgid":"<20230118222004.A77E933F02@hamza.pair.com>","list_archive_url":null,"date":"2023-01-18T22:20:02","name":"[committed] libstdc++: Minor updates to Policy Based Data Structures: Biblio","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118222004.A77E933F02@hamza.pair.com/mbox/"},{"id":45553,"url":"https://patchwork.plctlab.org/api/1.2/patches/45553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8iZOKnDx+14BjOD@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-19T01:13:28","name":"[v2] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8iZOKnDx+14BjOD@redhat.com/mbox/"},{"id":45570,"url":"https://patchwork.plctlab.org/api/1.2/patches/45570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp/","msgid":"<465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-19T03:50:10","name":"[v4] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp/mbox/"},{"id":45595,"url":"https://patchwork.plctlab.org/api/1.2/patches/45595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b19b8ffe-16ea-522f-ebd8-d9041972353e@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-19T05:06:26","name":"[v3] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b19b8ffe-16ea-522f-ebd8-d9041972353e@yahoo.co.jp/mbox/"},{"id":45602,"url":"https://patchwork.plctlab.org/api/1.2/patches/45602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119060749.6812-1-juzhe.zhong@rivai.ai/","msgid":"<20230119060749.6812-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T06:07:49","name":"RISC-V: Add vlm/vsm C/C++ API intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119060749.6812-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45615,"url":"https://patchwork.plctlab.org/api/1.2/patches/45615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119070258.38936-1-juzhe.zhong@rivai.ai/","msgid":"<20230119070258.38936-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T07:02:58","name":"RISC-V: Fix pred_mov constraint for vle.v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119070258.38936-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45646,"url":"https://patchwork.plctlab.org/api/1.2/patches/45646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kCLT9lHooHB2Ti@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T08:41:17","name":"forwprop: Further fixes for simplify_rotate [PR108440]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kCLT9lHooHB2Ti@tucnak/mbox/"},{"id":45647,"url":"https://patchwork.plctlab.org/api/1.2/patches/45647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kEy10R0C8zeVC5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T08:52:27","name":"c++: Fix up handling of non-dependent subscript with static operator[] [PR108437]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kEy10R0C8zeVC5@tucnak/mbox/"},{"id":45657,"url":"https://patchwork.plctlab.org/api/1.2/patches/45657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093037.0C02C33E96@hamza.pair.com/","msgid":"<20230119093037.0C02C33E96@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T09:30:35","name":"[committed] wwwdocs: gcc-3.3: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093037.0C02C33E96@hamza.pair.com/mbox/"},{"id":45663,"url":"https://patchwork.plctlab.org/api/1.2/patches/45663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093342.36BEB33E96@hamza.pair.com/","msgid":"<20230119093342.36BEB33E96@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T09:33:40","name":"[committed] wwwdocs: gitwrite: Structure a section some more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093342.36BEB33E96@hamza.pair.com/mbox/"},{"id":45664,"url":"https://patchwork.plctlab.org/api/1.2/patches/45664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119094609.35967134F5@imap2.suse-dmz.suse.de/","msgid":"<20230119094609.35967134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-19T09:46:08","name":"tree-optimization/108449 - keep maybe_special_function_p behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119094609.35967134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":45696,"url":"https://patchwork.plctlab.org/api/1.2/patches/45696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de/","msgid":"<20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-19T11:22:28","name":"modula2/108144 - fix --enable-version-specific-runtime-libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":45785,"url":"https://patchwork.plctlab.org/api/1.2/patches/45785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119141249.293487-1-juzhe.zhong@rivai.ai/","msgid":"<20230119141249.293487-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T14:12:49","name":"RISC-V: Add vle.v C API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119141249.293487-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45797,"url":"https://patchwork.plctlab.org/api/1.2/patches/45797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119143108.314789-1-juzhe.zhong@rivai.ai/","msgid":"<20230119143108.314789-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T14:31:08","name":"RISC-V: Add vse.v C API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119143108.314789-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45807,"url":"https://patchwork.plctlab.org/api/1.2/patches/45807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com/","msgid":"<18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com>","list_archive_url":null,"date":"2023-01-19T14:40:19","name":"OpenMP/Fortran: Partially fix non-rect loop nests [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com/mbox/"},{"id":45821,"url":"https://patchwork.plctlab.org/api/1.2/patches/45821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144608.56FCD33E8C@hamza.pair.com/","msgid":"<20230119144608.56FCD33E8C@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T14:46:06","name":"[committed] style: Tweak a comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144608.56FCD33E8C@hamza.pair.com/mbox/"},{"id":45823,"url":"https://patchwork.plctlab.org/api/1.2/patches/45823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144841.1B7E233E8E@hamza.pair.com/","msgid":"<20230119144841.1B7E233E8E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T14:48:39","name":"[committed] wwwdocs: gcc-4.9: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144841.1B7E233E8E@hamza.pair.com/mbox/"},{"id":45854,"url":"https://patchwork.plctlab.org/api/1.2/patches/45854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8lxx+Jxfl1IkheJ@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-01-19T16:37:27","name":"PR target/107299: Fix build issue when long double is IEEE 128-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8lxx+Jxfl1IkheJ@toto.the-meissners.org/mbox/"},{"id":45905,"url":"https://patchwork.plctlab.org/api/1.2/patches/45905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119185619.78452-1-dmalcolm@redhat.com/","msgid":"<20230119185619.78452-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-19T18:56:19","name":"[committed] analyzer: use dominator info in -Wanalyzer-deref-before-check [PR108455]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119185619.78452-1-dmalcolm@redhat.com/mbox/"},{"id":45950,"url":"https://patchwork.plctlab.org/api/1.2/patches/45950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8miS6EhPhsHx9/c@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:04:27","name":"[committed] openmp: Fix up OpenMP expansion of non-rectangular loops [PR108459]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8miS6EhPhsHx9/c@tucnak/mbox/"},{"id":45951,"url":"https://patchwork.plctlab.org/api/1.2/patches/45951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mjKFwfY/7O4lQM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:08:08","name":"niter: Fix up unused var warning [PR108457]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mjKFwfY/7O4lQM@tucnak/mbox/"},{"id":45954,"url":"https://patchwork.plctlab.org/api/1.2/patches/45954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mkUOpknOZyIC1I@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:13:04","name":"c++: Fix up handling of references to anon union members in initializers [PR53932]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mkUOpknOZyIC1I@tucnak/mbox/"},{"id":45956,"url":"https://patchwork.plctlab.org/api/1.2/patches/45956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mlNDm8kwAfjB5F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:16:52","name":"value-relation: Fix up relation_union [PR108447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mlNDm8kwAfjB5F@tucnak/mbox/"},{"id":46086,"url":"https://patchwork.plctlab.org/api/1.2/patches/46086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8n2ayXMZf+dYsqi@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-20T02:03:23","name":"[v3] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8n2ayXMZf+dYsqi@redhat.com/mbox/"},{"id":46087,"url":"https://patchwork.plctlab.org/api/1.2/patches/46087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120020339.1025075-1-polacek@redhat.com/","msgid":"<20230120020339.1025075-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-20T02:03:39","name":"c++: Quash bogus -Wunused-value with new [PR107797]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120020339.1025075-1-polacek@redhat.com/mbox/"},{"id":46092,"url":"https://patchwork.plctlab.org/api/1.2/patches/46092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022029.215012-1-juzhe.zhong@rivai.ai/","msgid":"<20230120022029.215012-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T02:20:29","name":"RISC-V: Fix vop_m overloaded C++ API name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022029.215012-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46093,"url":"https://patchwork.plctlab.org/api/1.2/patches/46093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022434.215774-1-juzhe.zhong@rivai.ai/","msgid":"<20230120022434.215774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T02:24:34","name":"RISC-V: Add vle/vse C++ overloaded API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022434.215774-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46120,"url":"https://patchwork.plctlab.org/api/1.2/patches/46120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp/","msgid":"<28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-20T03:33:37","name":"xtensa: Revise 89afb2e86fcb29c559b2957fdcbea0d01740c49b","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp/mbox/"},{"id":46126,"url":"https://patchwork.plctlab.org/api/1.2/patches/46126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042541.109466-1-juzhe.zhong@rivai.ai/","msgid":"<20230120042541.109466-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T04:25:41","name":"RISC-V: Add vlse/vsse C/C++ API intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042541.109466-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46127,"url":"https://patchwork.plctlab.org/api/1.2/patches/46127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042723.109826-1-juzhe.zhong@rivai.ai/","msgid":"<20230120042723.109826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T04:27:23","name":"RISC-V: Add vlse/vsse C/C++ intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042723.109826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46259,"url":"https://patchwork.plctlab.org/api/1.2/patches/46259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120093309.104394-1-juzhe.zhong@rivai.ai/","msgid":"<20230120093309.104394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T09:33:09","name":"RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120093309.104394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46289,"url":"https://patchwork.plctlab.org/api/1.2/patches/46289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-1-gcc@hazardy.de/","msgid":"<20230120105409.54949-1-gcc@hazardy.de>","list_archive_url":null,"date":"2023-01-20T10:54:06","name":"[1/4] libbacktrace: change all pc related variables to uintptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-1-gcc@hazardy.de/mbox/"},{"id":46290,"url":"https://patchwork.plctlab.org/api/1.2/patches/46290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-3-gcc@hazardy.de/","msgid":"<20230120105409.54949-3-gcc@hazardy.de>","list_archive_url":null,"date":"2023-01-20T10:54:08","name":"[3/4] libbacktrace: work with aslr on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-3-gcc@hazardy.de/mbox/"},{"id":46302,"url":"https://patchwork.plctlab.org/api/1.2/patches/46302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120120433.5A733385841E@sourceware.org/","msgid":"<20230120120433.5A733385841E@sourceware.org>","list_archive_url":null,"date":"2023-01-20T12:03:47","name":"modula2/108144 - Fix multilib install of libgm2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120120433.5A733385841E@sourceware.org/mbox/"},{"id":46350,"url":"https://patchwork.plctlab.org/api/1.2/patches/46350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5ef1d5ce3e47e8431450ae8383a342@autistici.org/","msgid":"<0e5ef1d5ce3e47e8431450ae8383a342@autistici.org>","list_archive_url":null,"date":"2023-01-20T14:06:01","name":"libquadmath fix for 94756 and 87204","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5ef1d5ce3e47e8431450ae8383a342@autistici.org/mbox/"},{"id":46365,"url":"https://patchwork.plctlab.org/api/1.2/patches/46365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5h5m11.fsf@euler.schwinge.homeip.net/","msgid":"<87wn5h5m11.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T14:16:26","name":"[og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration (was: [OG12] [committed] amdgcn: Enable SIMD vectorization of math library functions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5h5m11.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46366,"url":"https://patchwork.plctlab.org/api/1.2/patches/46366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0l5lqg.fsf@euler.schwinge.homeip.net/","msgid":"<87tu0l5lqg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T14:22:47","name":"[og12] Force '\''--param openacc-kernels=parloops'\'' in '\''libgomp.oacc-c-c++-common/abort-3.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0l5lqg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46403,"url":"https://patchwork.plctlab.org/api/1.2/patches/46403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8qt0/yOySGsLEnt@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-20T15:05:55","name":"file-prefix-map: Fix up -f*-prefix-map= [PR108464]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8qt0/yOySGsLEnt@tucnak/mbox/"},{"id":46469,"url":"https://patchwork.plctlab.org/api/1.2/patches/46469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxdv5t.fsf@euler.schwinge.homeip.net/","msgid":"<87lelxdv5t.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T16:31:58","name":"[og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration, again (was: [og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration (was: [OG12] [committed] amdgcn: Enable SIMD vectorization of math library functions))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxdv5t.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46491,"url":"https://patchwork.plctlab.org/api/1.2/patches/46491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-2-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:26","name":"[01/23] arm: improve tests and fix vclsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-2-andrea.corallo@arm.com/mbox/"},{"id":46504,"url":"https://patchwork.plctlab.org/api/1.2/patches/46504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-3-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-3-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:27","name":"[02/23] arm: improve tests and fix vclzq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-3-andrea.corallo@arm.com/mbox/"},{"id":46500,"url":"https://patchwork.plctlab.org/api/1.2/patches/46500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-4-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:28","name":"[03/23] arm: improve tests and fix vnegq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-4-andrea.corallo@arm.com/mbox/"},{"id":46497,"url":"https://patchwork.plctlab.org/api/1.2/patches/46497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-5-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:29","name":"[04/23] arm: improve tests for vmulhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-5-andrea.corallo@arm.com/mbox/"},{"id":46499,"url":"https://patchwork.plctlab.org/api/1.2/patches/46499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-6-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:30","name":"[05/23] arm: improve tests for vmullbq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-6-andrea.corallo@arm.com/mbox/"},{"id":46496,"url":"https://patchwork.plctlab.org/api/1.2/patches/46496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-7-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-7-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:31","name":"[06/23] arm: improve tests for vmulltq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-7-andrea.corallo@arm.com/mbox/"},{"id":46510,"url":"https://patchwork.plctlab.org/api/1.2/patches/46510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-8-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:32","name":"[07/23] arm: improve tests for vcaddq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-8-andrea.corallo@arm.com/mbox/"},{"id":46505,"url":"https://patchwork.plctlab.org/api/1.2/patches/46505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-9-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:33","name":"[08/23] arm: improve tests for vcmlaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-9-andrea.corallo@arm.com/mbox/"},{"id":46513,"url":"https://patchwork.plctlab.org/api/1.2/patches/46513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-10-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:34","name":"[09/23] arm: improve tests for vcmulq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-10-andrea.corallo@arm.com/mbox/"},{"id":46509,"url":"https://patchwork.plctlab.org/api/1.2/patches/46509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-11-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-11-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:35","name":"[10/23] arm: improve tests and fix vqabsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-11-andrea.corallo@arm.com/mbox/"},{"id":46506,"url":"https://patchwork.plctlab.org/api/1.2/patches/46506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-12-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-12-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:36","name":"[11/23] arm: improve tests for vqdmladhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-12-andrea.corallo@arm.com/mbox/"},{"id":46502,"url":"https://patchwork.plctlab.org/api/1.2/patches/46502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-13-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-13-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:37","name":"[12/23] arm: improve tests for vqdmladhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-13-andrea.corallo@arm.com/mbox/"},{"id":46503,"url":"https://patchwork.plctlab.org/api/1.2/patches/46503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-14-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-14-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:38","name":"[13/23] arm: improve tests for vqrdmladhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-14-andrea.corallo@arm.com/mbox/"},{"id":46512,"url":"https://patchwork.plctlab.org/api/1.2/patches/46512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-15-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-15-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:39","name":"[14/23] arm: improve tests for vqrdmladhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-15-andrea.corallo@arm.com/mbox/"},{"id":46489,"url":"https://patchwork.plctlab.org/api/1.2/patches/46489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-16-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-16-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:40","name":"[15/23] arm: improve tests for vqrdmlashq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-16-andrea.corallo@arm.com/mbox/"},{"id":46493,"url":"https://patchwork.plctlab.org/api/1.2/patches/46493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-17-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-17-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:41","name":"[16/23] arm: improve tests for vqdmlsdhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-17-andrea.corallo@arm.com/mbox/"},{"id":46490,"url":"https://patchwork.plctlab.org/api/1.2/patches/46490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-18-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-18-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:42","name":"[17/23] arm: improve tests for vqdmlsdhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-18-andrea.corallo@arm.com/mbox/"},{"id":46498,"url":"https://patchwork.plctlab.org/api/1.2/patches/46498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-19-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-19-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:43","name":"[18/23] arm: improve tests for vqrdmlsdhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-19-andrea.corallo@arm.com/mbox/"},{"id":46507,"url":"https://patchwork.plctlab.org/api/1.2/patches/46507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-20-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-20-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:44","name":"[19/23] arm: improve tests for vqrdmlsdhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-20-andrea.corallo@arm.com/mbox/"},{"id":46511,"url":"https://patchwork.plctlab.org/api/1.2/patches/46511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-21-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-21-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:45","name":"[20/23] arm: improve tests for vqrdmulhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-21-andrea.corallo@arm.com/mbox/"},{"id":46501,"url":"https://patchwork.plctlab.org/api/1.2/patches/46501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-22-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-22-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:46","name":"[21/23] arm: improve tests and fix vqnegq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-22-andrea.corallo@arm.com/mbox/"},{"id":46508,"url":"https://patchwork.plctlab.org/api/1.2/patches/46508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-23-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-23-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:47","name":"[22/23] arm: improve tests for vld2q*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-23-andrea.corallo@arm.com/mbox/"},{"id":46514,"url":"https://patchwork.plctlab.org/api/1.2/patches/46514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-24-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-24-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:48","name":"[23/23] arm: fix missing extern \"C\" in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-24-andrea.corallo@arm.com/mbox/"},{"id":46536,"url":"https://patchwork.plctlab.org/api/1.2/patches/46536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com/","msgid":"<1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-20T17:27:24","name":"[v2,GCC] arm: Add support for new frame unwinding instruction \"0xb5\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com/mbox/"},{"id":46617,"url":"https://patchwork.plctlab.org/api/1.2/patches/46617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxotii.fsf@euler.schwinge.homeip.net/","msgid":"<87lelxotii.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T20:12:05","name":"Clean up after newlib \"nvptx: In offloading execution, map '\''_exit'\'' to '\''abort'\'' [GCC PR85463]\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxotii.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46625,"url":"https://patchwork.plctlab.org/api/1.2/patches/46625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:23:06","name":"[og12] nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46626,"url":"https://patchwork.plctlab.org/api/1.2/patches/46626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:26:43","name":"[og12] Add '\''gcc.target/nvptx/softstack-decl-1.c'\'', '\''gcc.target/nvptx/uniform-simt-decl-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46627,"url":"https://patchwork.plctlab.org/api/1.2/patches/46627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:30:14","name":"[og12] nvptx: Prevent emitting duplicate declarations for '\''__nvptx_stacks'\'', '\''__nvptx_uni'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46630,"url":"https://patchwork.plctlab.org/api/1.2/patches/46630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:46:50","name":"[og12] nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46641,"url":"https://patchwork.plctlab.org/api/1.2/patches/46641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T21:04:02","name":"nvptx, libgcc: Stub unwinding implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46643,"url":"https://patchwork.plctlab.org/api/1.2/patches/46643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T21:16:00","name":"nvptx, libgfortran: Switch out of \"minimal\" mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46748,"url":"https://patchwork.plctlab.org/api/1.2/patches/46748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbce44ba-6020-ee61-d657-5676a5432e79@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-21T01:46:39","name":"[patch.,fortran] PR102595 ICE in var_element, at fortran/decl.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbce44ba-6020-ee61-d657-5676a5432e79@gmail.com/mbox/"},{"id":46755,"url":"https://patchwork.plctlab.org/api/1.2/patches/46755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com/","msgid":"<1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com>","list_archive_url":null,"date":"2023-01-21T02:13:16","name":"[gfortran.dg] Adjust numerous tests so that they pass on line endings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com/mbox/"},{"id":46758,"url":"https://patchwork.plctlab.org/api/1.2/patches/46758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca088d6a-91bf-c8f1-9db1-cc92065d7df9@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-21T03:21:27","name":"[gfortran.dg] Allow test to pass on mingw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca088d6a-91bf-c8f1-9db1-cc92065d7df9@protonmail.com/mbox/"},{"id":46796,"url":"https://patchwork.plctlab.org/api/1.2/patches/46796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com/","msgid":"<11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com>","list_archive_url":null,"date":"2023-01-21T09:57:24","name":"install.texi: Bump newlib version for nvptx + gcn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com/mbox/"},{"id":46797,"url":"https://patchwork.plctlab.org/api/1.2/patches/46797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8u3h8B7//8hKdHh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-21T09:59:35","name":"c++: Handle structured bindings like anon unions in initializers [PR108474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8u3h8B7//8hKdHh@tucnak/mbox/"},{"id":46811,"url":"https://patchwork.plctlab.org/api/1.2/patches/46811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121111541.ADDED33EBE@hamza.pair.com/","msgid":"<20230121111541.ADDED33EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-01-21T11:15:40","name":"[pushed] wwwdocs: *: Consistent formatting around environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121111541.ADDED33EBE@hamza.pair.com/mbox/"},{"id":46844,"url":"https://patchwork.plctlab.org/api/1.2/patches/46844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121170507.2193-1-iain@sandoe.co.uk/","msgid":"<20230121170507.2193-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-21T17:05:07","name":"[pushed] Darwin, fixincludes: Handle MacOS13 SDK Apple-specific deprecations [PR107586].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121170507.2193-1-iain@sandoe.co.uk/mbox/"},{"id":46845,"url":"https://patchwork.plctlab.org/api/1.2/patches/46845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121171220.36495-1-iain@sandoe.co.uk/","msgid":"<20230121171220.36495-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-21T17:12:20","name":"Darwin, fixincludes: Handle Apple Blocks in objc/runtime.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121171220.36495-1-iain@sandoe.co.uk/mbox/"},{"id":46846,"url":"https://patchwork.plctlab.org/api/1.2/patches/46846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121173312.6E2FE33E62@hamza.pair.com/","msgid":"<20230121173312.6E2FE33E62@hamza.pair.com>","list_archive_url":null,"date":"2023-01-21T17:33:11","name":"[pushed] wwwdocs: gcc-5: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121173312.6E2FE33E62@hamza.pair.com/mbox/"},{"id":46922,"url":"https://patchwork.plctlab.org/api/1.2/patches/46922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122093556.33081-1-iain@sandoe.co.uk/","msgid":"<20230122093556.33081-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-22T09:35:56","name":"[pushed] Darwin, libffi, testsuite: Ensure we pick up the convenience lib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122093556.33081-1-iain@sandoe.co.uk/mbox/"},{"id":46928,"url":"https://patchwork.plctlab.org/api/1.2/patches/46928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfdc8846-6060-2e9c-ec28-e0f7c74d9795@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-01-22T12:02:01","name":"[pushed] wwwdocs: gcc-10: Grammar fixes in the amdgcn section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfdc8846-6060-2e9c-ec28-e0f7c74d9795@pfeifer.com/mbox/"},{"id":46963,"url":"https://patchwork.plctlab.org/api/1.2/patches/46963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122161059.96036-1-iain@sandoe.co.uk/","msgid":"<20230122161059.96036-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-22T16:10:59","name":"Modula-2, testsuite: Remove use of concatenated paths.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122161059.96036-1-iain@sandoe.co.uk/mbox/"},{"id":47005,"url":"https://patchwork.plctlab.org/api/1.2/patches/47005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122195040.746214-1-dimitar@dinux.eu/","msgid":"<20230122195040.746214-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-22T19:50:40","name":"[committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122195040.746214-1-dimitar@dinux.eu/mbox/"},{"id":47023,"url":"https://patchwork.plctlab.org/api/1.2/patches/47023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123003447.3975772-1-jason@redhat.com/","msgid":"<20230123003447.3975772-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T00:34:47","name":"[pushed] c++: lifetime extension with .* expression [PR53288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123003447.3975772-1-jason@redhat.com/mbox/"},{"id":47025,"url":"https://patchwork.plctlab.org/api/1.2/patches/47025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123012100.4021860-1-arsen@aarsen.me/","msgid":"<20230123012100.4021860-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-23T01:21:00","name":"[wwwdocs] lists: Add documentation about the Sourceware public-inbox","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123012100.4021860-1-arsen@aarsen.me/mbox/"},{"id":47044,"url":"https://patchwork.plctlab.org/api/1.2/patches/47044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd643693-5e73-cd9f-ae2e-541d253985d0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-23T06:02:27","name":"[_GLIBCXX_DEBUG] Remove useless checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd643693-5e73-cd9f-ae2e-541d253985d0@gmail.com/mbox/"},{"id":47071,"url":"https://patchwork.plctlab.org/api/1.2/patches/47071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com/","msgid":"<42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com>","list_archive_url":null,"date":"2023-01-23T08:48:33","name":"[committed] libgomp.texi: Impl. status - non-rect loop nest only partial","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com/mbox/"},{"id":47090,"url":"https://patchwork.plctlab.org/api/1.2/patches/47090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123100943.6C675134F5@imap2.suse-dmz.suse.de/","msgid":"<20230123100943.6C675134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:09:43","name":"tree-optimization/108482 - remove stray .LOOP_DIST_ALIAS calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123100943.6C675134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":47106,"url":"https://patchwork.plctlab.org/api/1.2/patches/47106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123101852.EABDC134F5@imap2.suse-dmz.suse.de/","msgid":"<20230123101852.EABDC134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:18:52","name":"modula2/108144 - fix mistake in previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123101852.EABDC134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":47107,"url":"https://patchwork.plctlab.org/api/1.2/patches/47107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0vltu0v.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-23T10:38:56","name":"testsuite: Fix gcc.dg/vect/vect-fmax-1.c etc. on SPARC [PR104756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0vltu0v.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":47109,"url":"https://patchwork.plctlab.org/api/1.2/patches/47109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt69ttsh.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-23T10:43:58","name":"testsuite: Fix gcc.dg/vect/vect-bitfield-write-[23].c on SPARC [PR107808]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt69ttsh.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":47114,"url":"https://patchwork.plctlab.org/api/1.2/patches/47114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123105023.983A51357F@imap2.suse-dmz.suse.de/","msgid":"<20230123105023.983A51357F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:50:23","name":"modula2/108462 - duplicate install of static modula2 target libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123105023.983A51357F@imap2.suse-dmz.suse.de/mbox/"},{"id":47119,"url":"https://patchwork.plctlab.org/api/1.2/patches/47119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y85shC6wzmxApdZM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-23T11:16:20","name":"c++, cgraphbuild: Handle DECL_VALUE_EXPRs in record_reference [PR108474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y85shC6wzmxApdZM@tucnak/mbox/"},{"id":47120,"url":"https://patchwork.plctlab.org/api/1.2/patches/47120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com/","msgid":"<0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com>","list_archive_url":null,"date":"2023-01-23T11:37:38","name":"[wwwdocs] gcc-6: Consistently lower-case newlib (was: [Patch] install.texi: Bump newlib version for nvptx + gcn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com/mbox/"},{"id":47130,"url":"https://patchwork.plctlab.org/api/1.2/patches/47130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123124145.965541-1-arsen@aarsen.me/","msgid":"<20230123124145.965541-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-23T12:41:45","name":"libstdc++: Document P1642 and extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123124145.965541-1-arsen@aarsen.me/mbox/"},{"id":47152,"url":"https://patchwork.plctlab.org/api/1.2/patches/47152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com/","msgid":"<3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-23T13:39:45","name":"[Committed,GCC] arm: Documentation fix for -mbranch-protection option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com/mbox/"},{"id":47269,"url":"https://patchwork.plctlab.org/api/1.2/patches/47269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com/","msgid":"<2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com>","list_archive_url":null,"date":"2023-01-23T17:44:42","name":"[1/2] Use value_relation class instead of direct calls to intersect/union.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com/mbox/"},{"id":47270,"url":"https://patchwork.plctlab.org/api/1.2/patches/47270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c60c2794-f726-29cc-45fd-54149ffce169@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-23T17:44:48","name":"[2/2] Add VREL_OTHER for FP unsupported relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c60c2794-f726-29cc-45fd-54149ffce169@redhat.com/mbox/"},{"id":47324,"url":"https://patchwork.plctlab.org/api/1.2/patches/47324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123183706.14801-1-Brian.Inglis@Shaw.ca/","msgid":"<20230123183706.14801-1-Brian.Inglis@Shaw.ca>","list_archive_url":null,"date":"2023-01-23T18:37:06","name":"doc/invoke.texi: remove Cygwin options from Windows options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123183706.14801-1-Brian.Inglis@Shaw.ca/mbox/"},{"id":47336,"url":"https://patchwork.plctlab.org/api/1.2/patches/47336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123190936.4161568-1-jason@redhat.com/","msgid":"<20230123190936.4161568-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T19:09:36","name":"[pushed] c++: result location and explicit inst [PR108496]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123190936.4161568-1-jason@redhat.com/mbox/"},{"id":47375,"url":"https://patchwork.plctlab.org/api/1.2/patches/47375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ecf6c22d-c54d-48b8-9e31-bec40bcc5bc7-1674506099182@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-01-23T20:34:59","name":"Fortran: avoid ICE on invalid array subscript triplets [PR108501]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ecf6c22d-c54d-48b8-9e31-bec40bcc5bc7-1674506099182@3c-app-gmx-bap50/mbox/"},{"id":47407,"url":"https://patchwork.plctlab.org/api/1.2/patches/47407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123211234.37680-1-jason@redhat.com/","msgid":"<20230123211234.37680-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T21:12:34","name":"[pushed] c++: vector of class with bool ctor [PR108195]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123211234.37680-1-jason@redhat.com/mbox/"},{"id":47409,"url":"https://patchwork.plctlab.org/api/1.2/patches/47409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a7fd4365-096c-4df3-b654-6912a5dca41d-1674509034609@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-01-23T21:23:54","name":"Fortran: fix NULL pointer dereference in gfc_check_dependency [PR108502]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a7fd4365-096c-4df3-b654-6912a5dca41d-1674509034609@3c-app-gmx-bap50/mbox/"},{"id":47464,"url":"https://patchwork.plctlab.org/api/1.2/patches/47464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7030d247-5453-2344-2ee6-33899e52ed08@redhat.com/","msgid":"<7030d247-5453-2344-2ee6-33899e52ed08@redhat.com>","list_archive_url":null,"date":"2023-01-23T23:21:37","name":"tree-optimization/108306 - Correctly detect shifts out of range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7030d247-5453-2344-2ee6-33899e52ed08@redhat.com/mbox/"},{"id":47467,"url":"https://patchwork.plctlab.org/api/1.2/patches/47467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123233453.85393-1-jason@redhat.com/","msgid":"<20230123233453.85393-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T23:34:53","name":"[pushed] c++: TARGET_EXPR_ELIDING_P and std::move [PR107267]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123233453.85393-1-jason@redhat.com/mbox/"},{"id":47515,"url":"https://patchwork.plctlab.org/api/1.2/patches/47515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124032614.121085-1-jason@redhat.com/","msgid":"<20230124032614.121085-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T03:26:14","name":"[pushed] c++: TARGET_EXPR collapsing [PR107303]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124032614.121085-1-jason@redhat.com/mbox/"},{"id":47517,"url":"https://patchwork.plctlab.org/api/1.2/patches/47517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp/","msgid":"<1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-24T03:43:31","name":"[v5] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp/mbox/"},{"id":47518,"url":"https://patchwork.plctlab.org/api/1.2/patches/47518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp/","msgid":"<384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-24T03:43:52","name":"[v4] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp/mbox/"},{"id":47593,"url":"https://patchwork.plctlab.org/api/1.2/patches/47593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124084701.258605-1-stefansf@linux.ibm.com/","msgid":"<20230124084701.258605-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-01-24T08:47:02","name":"[v2] IBM zSystems: Fix TARGET_D_CPU_VERSIONS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124084701.258605-1-stefansf@linux.ibm.com/mbox/"},{"id":47594,"url":"https://patchwork.plctlab.org/api/1.2/patches/47594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-24T09:01:16","name":"Make '\''libgcc/config/nvptx/crt0.c'\'' build '\''--without-headers'\'' (was: [PING] nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":47621,"url":"https://patchwork.plctlab.org/api/1.2/patches/47621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-24T09:37:00","name":"Update '\''libgomp/libgomp.texi'\'' for '\''nvptx, libgfortran: Switch out of \"minimal\" mode'\'' (was: nvptx, libgfortran: Switch out of \"minimal\" mode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":47623,"url":"https://patchwork.plctlab.org/api/1.2/patches/47623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com/","msgid":"<0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-24T09:55:00","name":"[GCC] arm: Fix inclusion of arm-mlib.h header more than once (pr108505).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com/mbox/"},{"id":47676,"url":"https://patchwork.plctlab.org/api/1.2/patches/47676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124123707.D802C139FB@imap2.suse-dmz.suse.de/","msgid":"<20230124123707.D802C139FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-24T12:37:07","name":"tree-optimization/108500 - avoid useless fast-query compute in CFG cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124123707.D802C139FB@imap2.suse-dmz.suse.de/mbox/"},{"id":47707,"url":"https://patchwork.plctlab.org/api/1.2/patches/47707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae05c3e4-c4a5-69a6-b61b-1d22b63ec9cf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-24T13:40:46","name":"[1/3] arm: Fix sign of MVE predicate mve_pred16_t [PR 107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae05c3e4-c4a5-69a6-b61b-1d22b63ec9cf@arm.com/mbox/"},{"id":47710,"url":"https://patchwork.plctlab.org/api/1.2/patches/47710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com/","msgid":"<22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com>","list_archive_url":null,"date":"2023-01-24T13:54:20","name":"[2/3] arm: Remove unnecessary zero-extending of MVE predicates before use [PR 107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com/mbox/"},{"id":47711,"url":"https://patchwork.plctlab.org/api/1.2/patches/47711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com/","msgid":"<7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com>","list_archive_url":null,"date":"2023-01-24T13:56:28","name":"[3/3] arm: Fix MVE predicates synthesis [PR 108443]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com/mbox/"},{"id":47740,"url":"https://patchwork.plctlab.org/api/1.2/patches/47740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz/","msgid":"<196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz>","list_archive_url":null,"date":"2023-01-24T15:15:05","name":"ipa: check if cache_token != NULL before hash_set::add call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz/mbox/"},{"id":47743,"url":"https://patchwork.plctlab.org/api/1.2/patches/47743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e85a77-ce5e-31b5-5b5f-cd9ee1b2ac4a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-24T15:24:07","name":"OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e85a77-ce5e-31b5-5b5f-cd9ee1b2ac4a@codesourcery.com/mbox/"},{"id":47760,"url":"https://patchwork.plctlab.org/api/1.2/patches/47760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124163607.47793-1-cooper.qu@linux.alibaba.com/","msgid":"<20230124163607.47793-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-24T16:36:07","name":"[COMMITTED] C-SKY: Fix wrong sysroot suffix when disable multilib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124163607.47793-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":47775,"url":"https://patchwork.plctlab.org/api/1.2/patches/47775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12259c76-b704-86eb-c93e-b0a92b0db269@arm.com/","msgid":"<12259c76-b704-86eb-c93e-b0a92b0db269@arm.com>","list_archive_url":null,"date":"2023-01-24T16:52:51","name":"aarch64: Add aarch64*-*-* to the list of vect_long_long targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12259c76-b704-86eb-c93e-b0a92b0db269@arm.com/mbox/"},{"id":47890,"url":"https://patchwork.plctlab.org/api/1.2/patches/47890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a70062ed-5ff9-4209-82a6-93575ddbd32c-1674593251552@3c-app-gmx-bs66/","msgid":"","list_archive_url":null,"date":"2023-01-24T20:47:31","name":"[committed] Fortran: ICE in transformational_result [PR108529]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a70062ed-5ff9-4209-82a6-93575ddbd32c-1674593251552@3c-app-gmx-bs66/mbox/"},{"id":47907,"url":"https://patchwork.plctlab.org/api/1.2/patches/47907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com/","msgid":"<8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com>","list_archive_url":null,"date":"2023-01-24T21:18:38","name":"[committed,PR108388] LRA: Always do elimination and only for hard register to check insn constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com/mbox/"},{"id":47908,"url":"https://patchwork.plctlab.org/api/1.2/patches/47908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17ca0330-53b9-466e-b5f4-dcc7526b27bb-1674596893254@3c-app-gmx-bs66/","msgid":"","list_archive_url":null,"date":"2023-01-24T21:48:13","name":"Fortran: fix ICE in compare_bound_int [PR108527]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17ca0330-53b9-466e-b5f4-dcc7526b27bb-1674596893254@3c-app-gmx-bs66/mbox/"},{"id":47909,"url":"https://patchwork.plctlab.org/api/1.2/patches/47909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124215400.1345220-1-siddhesh@gotplt.org/","msgid":"<20230124215400.1345220-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-01-24T21:54:00","name":"tree-optimization/108522 Use COMPONENT_REF offset when available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124215400.1345220-1-siddhesh@gotplt.org/mbox/"},{"id":47923,"url":"https://patchwork.plctlab.org/api/1.2/patches/47923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221106.299101-1-jason@redhat.com/","msgid":"<20230124221106.299101-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T22:11:06","name":"[pushed] c++: static lambda in template [PR108526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221106.299101-1-jason@redhat.com/mbox/"},{"id":47925,"url":"https://patchwork.plctlab.org/api/1.2/patches/47925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221123.299474-1-jason@redhat.com/","msgid":"<20230124221123.299474-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T22:11:23","name":"[pushed] c++: \"\" #pragma at BOF [PR108504]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221123.299474-1-jason@redhat.com/mbox/"},{"id":47946,"url":"https://patchwork.plctlab.org/api/1.2/patches/47946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BmzmRTiExVyZFR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-24T23:16:30","name":"[committed] testsuite: Fix up new51.C test on various targets [PR108533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BmzmRTiExVyZFR@tucnak/mbox/"},{"id":47947,"url":"https://patchwork.plctlab.org/api/1.2/patches/47947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BnmXCZtTgjby2V@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-24T23:19:53","name":"c++: Fix up mangling of static lambdas [PR108525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BnmXCZtTgjby2V@tucnak/mbox/"},{"id":47966,"url":"https://patchwork.plctlab.org/api/1.2/patches/47966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235153.1186124-1-jwakely@redhat.com/","msgid":"<20230124235153.1186124-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-24T23:51:53","name":"[committed] libstdc++: Include std::ranges::subrange definition in [PR102301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235153.1186124-1-jwakely@redhat.com/mbox/"},{"id":47967,"url":"https://patchwork.plctlab.org/api/1.2/patches/47967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235157.1186160-1-jwakely@redhat.com/","msgid":"<20230124235157.1186160-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-24T23:51:57","name":"[committed] libstdc++: Use /etc/sysconfig/clock for std::chrono::current_zone() [PR108530]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235157.1186160-1-jwakely@redhat.com/mbox/"},{"id":48066,"url":"https://patchwork.plctlab.org/api/1.2/patches/48066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125084629.55372-1-iain@sandoe.co.uk/","msgid":"<20230125084629.55372-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-25T08:46:29","name":"modula-2: Fixes for preprocessing [PR102343, PR108182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125084629.55372-1-iain@sandoe.co.uk/mbox/"},{"id":48067,"url":"https://patchwork.plctlab.org/api/1.2/patches/48067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9DsnRNVWIjdTzQu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-25T08:47:25","name":"store-merging: Disable string_concatenate mode if start or end aren'\''t byte aligned [PR108498]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9DsnRNVWIjdTzQu@tucnak/mbox/"},{"id":48091,"url":"https://patchwork.plctlab.org/api/1.2/patches/48091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125104351.F0CB433EE4@hamza.pair.com/","msgid":"<20230125104351.F0CB433EE4@hamza.pair.com>","list_archive_url":null,"date":"2023-01-25T10:43:46","name":"[pushed] doc/contrib.texi: Add Jose E. Marchesi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125104351.F0CB433EE4@hamza.pair.com/mbox/"},{"id":48111,"url":"https://patchwork.plctlab.org/api/1.2/patches/48111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125111201.D211233EEC@hamza.pair.com/","msgid":"<20230125111201.D211233EEC@hamza.pair.com>","list_archive_url":null,"date":"2023-01-25T11:11:59","name":"[pushed] wwwdocs: gcc-6: Switch www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125111201.D211233EEC@hamza.pair.com/mbox/"},{"id":48114,"url":"https://patchwork.plctlab.org/api/1.2/patches/48114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycuony7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T11:25:52","name":"[pushed] aarch64: Update sizeless tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycuony7.fsf@arm.com/mbox/"},{"id":48115,"url":"https://patchwork.plctlab.org/api/1.2/patches/48115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga6n9ce.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T11:26:41","name":"[pushed] aarch64: Restore generation of SVE UQDEC instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga6n9ce.fsf@arm.com/mbox/"},{"id":48141,"url":"https://patchwork.plctlab.org/api/1.2/patches/48141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123032.23F333858D39@sourceware.org/","msgid":"<20230125123032.23F333858D39@sourceware.org>","list_archive_url":null,"date":"2023-01-25T12:29:47","name":"Fixup LTO internal docs for option processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123032.23F333858D39@sourceware.org/mbox/"},{"id":48145,"url":"https://patchwork.plctlab.org/api/1.2/patches/48145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123749.A89F03858438@sourceware.org/","msgid":"<20230125123749.A89F03858438@sourceware.org>","list_archive_url":null,"date":"2023-01-25T12:37:04","name":"tree-optimization/108523 - fix endless iteration in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123749.A89F03858438@sourceware.org/mbox/"},{"id":48177,"url":"https://patchwork.plctlab.org/api/1.2/patches/48177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a07aa9bd-b07c-8c6d-29a8-1b3475639124@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T14:47:18","name":"[v2] OpenMP/Fortran: Partially fix non-rect loop nests [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a07aa9bd-b07c-8c6d-29a8-1b3475639124@codesourcery.com/mbox/"},{"id":48241,"url":"https://patchwork.plctlab.org/api/1.2/patches/48241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0780922f-99b5-96fc-b921-9e00652f9741@redhat.com/","msgid":"<0780922f-99b5-96fc-b921-9e00652f9741@redhat.com>","list_archive_url":null,"date":"2023-01-25T18:05:09","name":"PR tree-optimization/108447 - Do not try to logical fold floating point relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0780922f-99b5-96fc-b921-9e00652f9741@redhat.com/mbox/"},{"id":48255,"url":"https://patchwork.plctlab.org/api/1.2/patches/48255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdbcafee-35e2-7074-0207-d93cfa8b7db0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T18:38:47","name":"minor optimization bug in basic_string move assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdbcafee-35e2-7074-0207-d93cfa8b7db0@gmail.com/mbox/"},{"id":48289,"url":"https://patchwork.plctlab.org/api/1.2/patches/48289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-e58ca35d-9f14-4c23-a70e-c307739ee6ed-1674676416042@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-25T19:53:36","name":"[committed] Fortran: ICE in gfc_compare_array_spec [PR108528]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-e58ca35d-9f14-4c23-a70e-c307739ee6ed-1674676416042@3c-app-gmx-bs46/mbox/"},{"id":48306,"url":"https://patchwork.plctlab.org/api/1.2/patches/48306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125201643.506666-1-ppalka@redhat.com/","msgid":"<20230125201643.506666-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-25T20:16:43","name":"c++ modules: uninstantiated template friend class [PR104234]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125201643.506666-1-ppalka@redhat.com/mbox/"},{"id":48343,"url":"https://patchwork.plctlab.org/api/1.2/patches/48343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-2-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:32","name":"[v5,1/5] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-2-ben.boeckel@kitware.com/mbox/"},{"id":48344,"url":"https://patchwork.plctlab.org/api/1.2/patches/48344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-4-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:34","name":"[v5,3/5] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-4-ben.boeckel@kitware.com/mbox/"},{"id":48346,"url":"https://patchwork.plctlab.org/api/1.2/patches/48346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-5-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:35","name":"[v5,4/5] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-5-ben.boeckel@kitware.com/mbox/"},{"id":48358,"url":"https://patchwork.plctlab.org/api/1.2/patches/48358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-6-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-6-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:36","name":"[v5,5/5] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-6-ben.boeckel@kitware.com/mbox/"},{"id":48396,"url":"https://patchwork.plctlab.org/api/1.2/patches/48396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5e4b248f-79f4-46ea-aafa-9a6a12d90f2f-1674683962284@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-25T21:59:22","name":"Fortran: fix ICE in check_host_association [PR108544]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5e4b248f-79f4-46ea-aafa-9a6a12d90f2f-1674683962284@3c-app-gmx-bs46/mbox/"},{"id":48410,"url":"https://patchwork.plctlab.org/api/1.2/patches/48410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125232545.312399-1-polacek@redhat.com/","msgid":"<20230125232545.312399-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-25T23:25:45","name":"opts: SANITIZE_ADDRESS wrongly cleared [PR108543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125232545.312399-1-polacek@redhat.com/mbox/"},{"id":48480,"url":"https://patchwork.plctlab.org/api/1.2/patches/48480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126033210.1926726-1-siddhesh@gotplt.org/","msgid":"<20230126033210.1926726-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-01-26T03:32:10","name":"tree-optimization/108522 Use component_ref_field_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126033210.1926726-1-siddhesh@gotplt.org/mbox/"},{"id":48507,"url":"https://patchwork.plctlab.org/api/1.2/patches/48507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126073917.DE68F1358A@imap2.suse-dmz.suse.de/","msgid":"<20230126073917.DE68F1358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-26T07:39:17","name":"tree-optimization/108523 - testcase for the bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126073917.DE68F1358A@imap2.suse-dmz.suse.de/mbox/"},{"id":48538,"url":"https://patchwork.plctlab.org/api/1.2/patches/48538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JM8j9QbkSLMs68@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T09:50:42","name":"[committed] openmp, c++: Workaround fold_for_warn ICE on invalid OpenMP collapsed loops [PR108503]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JM8j9QbkSLMs68@tucnak/mbox/"},{"id":48560,"url":"https://patchwork.plctlab.org/api/1.2/patches/48560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JUvA7+lqVDt6WR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T10:23:56","name":"value-relation: Small tweaks to tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JUvA7+lqVDt6WR@tucnak/mbox/"},{"id":48599,"url":"https://patchwork.plctlab.org/api/1.2/patches/48599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com/","msgid":"<2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com>","list_archive_url":null,"date":"2023-01-26T11:29:29","name":"[pushed] doc: Refer to projects as GCC and GDB (was: [PATCH] sourcebuild.texi: Document new toplevel directories [PR82383])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com/mbox/"},{"id":48609,"url":"https://patchwork.plctlab.org/api/1.2/patches/48609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126124904.81D8013A09@imap2.suse-dmz.suse.de/","msgid":"<20230126124904.81D8013A09@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-26T12:49:04","name":"tree-optimization/108547 - robustify uninit predicate analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126124904.81D8013A09@imap2.suse-dmz.suse.de/mbox/"},{"id":48631,"url":"https://patchwork.plctlab.org/api/1.2/patches/48631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126131549.4785633EA6@hamza.pair.com/","msgid":"<20230126131549.4785633EA6@hamza.pair.com>","list_archive_url":null,"date":"2023-01-26T13:15:47","name":"[pushed] libstdc++: Move www.open-std.org to https in bugs manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126131549.4785633EA6@hamza.pair.com/mbox/"},{"id":48649,"url":"https://patchwork.plctlab.org/api/1.2/patches/48649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133901.1428898-1-jwakely@redhat.com/","msgid":"<20230126133901.1428898-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:39:01","name":"[committed] libstdc++: Fix strings read from /etc/sysconfig/clock [PR108530]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133901.1428898-1-jwakely@redhat.com/mbox/"},{"id":48651,"url":"https://patchwork.plctlab.org/api/1.2/patches/48651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133949.1428954-1-jwakely@redhat.com/","msgid":"<20230126133949.1428954-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:39:49","name":"[committed] libstdc++: Add returns_nonnull to non-inline std::map detail [PR108554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133949.1428954-1-jwakely@redhat.com/mbox/"},{"id":48662,"url":"https://patchwork.plctlab.org/api/1.2/patches/48662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126135046.1441243-1-jwakely@redhat.com/","msgid":"<20230126135046.1441243-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:50:46","name":"[committed] libstdc++: Add workaround for old tzdata.zi files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126135046.1441243-1-jwakely@redhat.com/mbox/"},{"id":48702,"url":"https://patchwork.plctlab.org/api/1.2/patches/48702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142032.500073-1-dmalcolm@redhat.com/","msgid":"<20230126142032.500073-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-26T14:20:32","name":"[committed] analyzer: fix false positives from -Wanalyzer-infinite-recursion [PR108524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142032.500073-1-dmalcolm@redhat.com/mbox/"},{"id":48703,"url":"https://patchwork.plctlab.org/api/1.2/patches/48703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142045.500121-1-dmalcolm@redhat.com/","msgid":"<20230126142045.500121-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-26T14:20:45","name":"[committed] analyzer: fix SARD-tc841-basic-00182-min.c test case [PR108507]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142045.500121-1-dmalcolm@redhat.com/mbox/"},{"id":48768,"url":"https://patchwork.plctlab.org/api/1.2/patches/48768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsffxmhbj.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:44:16","name":"vect/aarch64: Fix various sve/cond*.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsffxmhbj.fsf@arm.com/mbox/"},{"id":48771,"url":"https://patchwork.plctlab.org/api/1.2/patches/48771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk019mgyt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:51:54","name":"[1/4] aarch64: Remove slp_13.c XFAILs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk019mgyt.fsf@arm.com/mbox/"},{"id":48772,"url":"https://patchwork.plctlab.org/api/1.2/patches/48772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz71mgxz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:52:24","name":"[pushed] aarch64: Suppress warnings in pr99766.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz71mgxz.fsf@arm.com/mbox/"},{"id":48774,"url":"https://patchwork.plctlab.org/api/1.2/patches/48774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rhpmgx7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:52:52","name":"[pushed] Update guality XFAILs for aarch64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rhpmgx7.fsf@arm.com/mbox/"},{"id":48773,"url":"https://patchwork.plctlab.org/api/1.2/patches/48773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt357xmgwi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:53:17","name":"[pushed] aarch64: Remove expected error for compound literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt357xmgwi.fsf@arm.com/mbox/"},{"id":48776,"url":"https://patchwork.plctlab.org/api/1.2/patches/48776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KjbJA8HZs3nLNX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:59:40","name":"tree: Fix up tree_code_{length,type}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KjbJA8HZs3nLNX@tucnak/mbox/"},{"id":48781,"url":"https://patchwork.plctlab.org/api/1.2/patches/48781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ktl1w3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:02:52","name":"testsuite: Fix hwasan/arguments-3.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ktl1w3.fsf@arm.com/mbox/"},{"id":48789,"url":"https://patchwork.plctlab.org/api/1.2/patches/48789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KqmIR9OWrM+pVh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:30:16","name":"[committed] frange: Fix up foperator_{,not_}equal::fold_range for signed zeros [PR108540]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KqmIR9OWrM+pVh@tucnak/mbox/"},{"id":48792,"url":"https://patchwork.plctlab.org/api/1.2/patches/48792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126163257.13458-1-iain@sandoe.co.uk/","msgid":"<20230126163257.13458-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-26T16:32:57","name":"[pushed] Modula-2: Remove debug code [PR108553].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126163257.13458-1-iain@sandoe.co.uk/mbox/"},{"id":48800,"url":"https://patchwork.plctlab.org/api/1.2/patches/48800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmedrhtfl7.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:39:48","name":"riscv: Enable -fasynchronous_unwind_tables by default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmedrhtfl7.fsf@suse.de/mbox/"},{"id":48804,"url":"https://patchwork.plctlab.org/api/1.2/patches/48804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Ks/THdiuq70HW3@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:40:29","name":"[v2] opts: SANITIZE_ADDRESS wrongly cleared [PR108543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Ks/THdiuq70HW3@redhat.com/mbox/"},{"id":48845,"url":"https://patchwork.plctlab.org/api/1.2/patches/48845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183824.285183-1-dimitar@dinux.eu/","msgid":"<20230126183824.285183-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-26T18:38:24","name":"[GCC-12,committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183824.285183-1-dimitar@dinux.eu/mbox/"},{"id":48846,"url":"https://patchwork.plctlab.org/api/1.2/patches/48846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183902.285310-1-dimitar@dinux.eu/","msgid":"<20230126183902.285310-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-26T18:39:02","name":"[GCC-11,committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183902.285310-1-dimitar@dinux.eu/mbox/"},{"id":48862,"url":"https://patchwork.plctlab.org/api/1.2/patches/48862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126191811.48240-1-kito.cheng@sifive.com/","msgid":"<20230126191811.48240-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-01-26T19:18:11","name":"[committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126191811.48240-1-kito.cheng@sifive.com/mbox/"},{"id":48879,"url":"https://patchwork.plctlab.org/api/1.2/patches/48879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126202745.49379-1-iain@sandoe.co.uk/","msgid":"<20230126202745.49379-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-26T20:27:45","name":"Modula-2: Add claimed command line options to lang.opt [PR108555].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126202745.49379-1-iain@sandoe.co.uk/mbox/"},{"id":48927,"url":"https://patchwork.plctlab.org/api/1.2/patches/48927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126221732.617749-1-polacek@redhat.com/","msgid":"<20230126221732.617749-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-26T22:17:32","name":"c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126221732.617749-1-polacek@redhat.com/mbox/"},{"id":48958,"url":"https://patchwork.plctlab.org/api/1.2/patches/48958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126232919.E8F6F33E50@hamza.pair.com/","msgid":"<20230126232919.E8F6F33E50@hamza.pair.com>","list_archive_url":null,"date":"2023-01-26T23:29:18","name":"[pushed] wwwdocs: git: Tweak link to TR29124 C++ reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126232919.E8F6F33E50@hamza.pair.com/mbox/"},{"id":48992,"url":"https://patchwork.plctlab.org/api/1.2/patches/48992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127001617.CE64D33E9E@hamza.pair.com/","msgid":"<20230127001617.CE64D33E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:16:15","name":"[pushed] wwwdocs: codingconventions: Update upstream instructions for libstdc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127001617.CE64D33E9E@hamza.pair.com/mbox/"},{"id":48998,"url":"https://patchwork.plctlab.org/api/1.2/patches/48998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14d1bcfece7c54a22811291496b8b7cd9d438ae.1674777149.git.arsen@aarsen.me/","msgid":"","list_archive_url":null,"date":"2023-01-27T00:18:29","name":"[1/7] docs: Create Indices appendix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14d1bcfece7c54a22811291496b8b7cd9d438ae.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49003,"url":"https://patchwork.plctlab.org/api/1.2/patches/49003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me/","msgid":"<8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:31","name":"[3/7] **/*.texi: Reorder index entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49002,"url":"https://patchwork.plctlab.org/api/1.2/patches/49002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me/","msgid":"<5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:32","name":"[4/7] docs: Mechanically reorder item/index combos in extend.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49001,"url":"https://patchwork.plctlab.org/api/1.2/patches/49001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me/","msgid":"<2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:33","name":"[5/7] doc: Add @defbuiltin family of helpers, set documentlanguage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49000,"url":"https://patchwork.plctlab.org/api/1.2/patches/49000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me/","msgid":"<17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:35","name":"[7/7] update_web_docs_git: Update CSS reference to new manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49004,"url":"https://patchwork.plctlab.org/api/1.2/patches/49004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127003224.717347-1-arsen@aarsen.me/","msgid":"<20230127003224.717347-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:36","name":"[wwwdocs] Add revised Texinfo manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127003224.717347-1-arsen@aarsen.me/mbox/"},{"id":48993,"url":"https://patchwork.plctlab.org/api/1.2/patches/48993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002025.F269733E9E@hamza.pair.com/","msgid":"<20230127002025.F269733E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:20:24","name":"[pushed] wwwdocs: codingconventions: Update a link to Github docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002025.F269733E9E@hamza.pair.com/mbox/"},{"id":48994,"url":"https://patchwork.plctlab.org/api/1.2/patches/48994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002338.3871F33E4D@hamza.pair.com/","msgid":"<20230127002338.3871F33E4D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:23:36","name":"[pushed] wwwdocs: gcc-3.4: Update a link to use https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002338.3871F33E4D@hamza.pair.com/mbox/"},{"id":48995,"url":"https://patchwork.plctlab.org/api/1.2/patches/48995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002650.8AF7333E9E@hamza.pair.com/","msgid":"<20230127002650.8AF7333E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:26:48","name":"[pushed] wwwdocs: readings: Update Modula 3 link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002650.8AF7333E9E@hamza.pair.com/mbox/"},{"id":49039,"url":"https://patchwork.plctlab.org/api/1.2/patches/49039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzga47ndl.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-27T01:54:46","name":"[FYI,docs] note that -g opts are implicitly negatable too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzga47ndl.fsf@lxoliva.fsfla.org/mbox/"},{"id":49057,"url":"https://patchwork.plctlab.org/api/1.2/patches/49057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp/","msgid":"<23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-27T03:17:33","name":"[v6] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp/mbox/"},{"id":49116,"url":"https://patchwork.plctlab.org/api/1.2/patches/49116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9397df3-a72f-b9e6-b16c-8e3589c3cf09@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T08:24:18","name":"[committed] gomp/declare-variant-1*.f90: Update for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9397df3-a72f-b9e6-b16c-8e3589c3cf09@codesourcery.com/mbox/"},{"id":49117,"url":"https://patchwork.plctlab.org/api/1.2/patches/49117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OTCEBcvrMQeQqy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:02:00","name":"cgraph: Adjust verify_corresponds_to_fndecl [PR106061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OTCEBcvrMQeQqy@tucnak/mbox/"},{"id":49118,"url":"https://patchwork.plctlab.org/api/1.2/patches/49118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OUvmVFcSU5Eaix@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:09:18","name":"doc: Fix up return type of __builtin_va_arg_pack_len [PR108560]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OUvmVFcSU5Eaix@tucnak/mbox/"},{"id":49122,"url":"https://patchwork.plctlab.org/api/1.2/patches/49122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb57f55b-3b84-c853-3bab-731c5c6608c2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:19:42","name":"OpenMP/Fortran: Fix has_device_addr clause splitting [PR108558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb57f55b-3b84-c853-3bab-731c5c6608c2@codesourcery.com/mbox/"},{"id":49130,"url":"https://patchwork.plctlab.org/api/1.2/patches/49130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OZibQSy8DYxwbd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:29:45","name":"libstdc++: Fix up FAIL in 17_intro/names.cc on glibc < 2.19 [PR108568]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OZibQSy8DYxwbd@tucnak/mbox/"},{"id":49169,"url":"https://patchwork.plctlab.org/api/1.2/patches/49169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16839-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T10:36:17","name":"AArch64: Fix native detection in the presence of mandatory features which don'\''t have midr values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16839-tamar@arm.com/mbox/"},{"id":49171,"url":"https://patchwork.plctlab.org/api/1.2/patches/49171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16829-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T10:39:25","name":"AArch64: Fix codegen regressions around tbz.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16829-tamar@arm.com/mbox/"},{"id":49187,"url":"https://patchwork.plctlab.org/api/1.2/patches/49187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmb0kzir.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T11:06:20","name":"[1/2] Add support for conditional xorsign [PR96373]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmb0kzir.fsf@arm.com/mbox/"},{"id":49191,"url":"https://patchwork.plctlab.org/api/1.2/patches/49191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk018kzex.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T11:08:38","name":"[2/2] vect: Make partial trapping ops use predication [PR96373]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk018kzex.fsf@arm.com/mbox/"},{"id":49308,"url":"https://patchwork.plctlab.org/api/1.2/patches/49308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127114627.243812-1-xry111@xry111.site/","msgid":"<20230127114627.243812-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-01-27T11:46:27","name":"testsuite: Use noipa and noinline attributes for pr95115 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127114627.243812-1-xry111@xry111.site/mbox/"},{"id":49348,"url":"https://patchwork.plctlab.org/api/1.2/patches/49348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127123020.260769-1-juzhe.zhong@rivai.ai/","msgid":"<20230127123020.260769-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T12:30:20","name":"RISC-V: Fix testcases check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127123020.260769-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49408,"url":"https://patchwork.plctlab.org/api/1.2/patches/49408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz/","msgid":"<44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz>","list_archive_url":null,"date":"2023-01-27T13:59:43","name":"driver: fix -gz=none error message with missing zstd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz/mbox/"},{"id":49451,"url":"https://patchwork.plctlab.org/api/1.2/patches/49451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127144311.2188730-1-andrea.corallo@arm.com/","msgid":"<20230127144311.2188730-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-27T14:43:11","name":"arm: Implement arm Function target attribute '\''branch-protection'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127144311.2188730-1-andrea.corallo@arm.com/mbox/"},{"id":49462,"url":"https://patchwork.plctlab.org/api/1.2/patches/49462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154429.1599859-1-jwakely@redhat.com/","msgid":"<20230127154429.1599859-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-27T15:44:29","name":"[committed] libstdc++: Use dg-bogus in new test [PR108554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154429.1599859-1-jwakely@redhat.com/mbox/"},{"id":49463,"url":"https://patchwork.plctlab.org/api/1.2/patches/49463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154529.1601707-1-jwakely@redhat.com/","msgid":"<20230127154529.1601707-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-27T15:45:29","name":"[committed] libstdc++: Use constant for name of tzdata file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154529.1601707-1-jwakely@redhat.com/mbox/"},{"id":49534,"url":"https://patchwork.plctlab.org/api/1.2/patches/49534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycrkiv5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:06:06","name":"[pushed] aarch64: Prevent simd tests from being optimised away","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycrkiv5.fsf@arm.com/mbox/"},{"id":49539,"url":"https://patchwork.plctlab.org/api/1.2/patches/49539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga3j49h.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:06:50","name":"[pushed] testsuite: Two adjustments to gcc.dg/vect/complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga3j49h.fsf@arm.com/mbox/"},{"id":49551,"url":"https://patchwork.plctlab.org/api/1.2/patches/49551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6ca16d1-28d9-463e-bbed-ce6dfad7a887@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:44:59","name":"[GCC] arm: Optimize arm-mlib.h header inclusion (pr108505).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6ca16d1-28d9-463e-bbed-ce6dfad7a887@AZ-NEU-EX04.Arm.com/mbox/"},{"id":49700,"url":"https://patchwork.plctlab.org/api/1.2/patches/49700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8df3e-bf4f-804b-2e47-6430848d1e81@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T21:39:59","name":"[committed] c: Disallow braces around C2x auto initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8df3e-bf4f-804b-2e47-6430848d1e81@codesourcery.com/mbox/"},{"id":49703,"url":"https://patchwork.plctlab.org/api/1.2/patches/49703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-1-ppalka@redhat.com/","msgid":"<20230127220250.1896137-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-27T22:02:49","name":"[1/2] c++: make manifestly_const_eval tri-state","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-1-ppalka@redhat.com/mbox/"},{"id":49702,"url":"https://patchwork.plctlab.org/api/1.2/patches/49702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-2-ppalka@redhat.com/","msgid":"<20230127220250.1896137-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-27T22:02:50","name":"[2/2] c++: speculative constexpr and is_constant_evaluated [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-2-ppalka@redhat.com/mbox/"},{"id":49716,"url":"https://patchwork.plctlab.org/api/1.2/patches/49716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127225714.261700-1-juzhe.zhong@rivai.ai/","msgid":"<20230127225714.261700-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T22:57:14","name":"RISC-V: Remove redundant attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127225714.261700-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49719,"url":"https://patchwork.plctlab.org/api/1.2/patches/49719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Rb2eRAm/kUbWyZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T23:18:49","name":"sched-deps, cselib: Fix up some -fcompare-debug issues and regressions [PR108463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Rb2eRAm/kUbWyZ@tucnak/mbox/"},{"id":49720,"url":"https://patchwork.plctlab.org/api/1.2/patches/49720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232608.276006-1-juzhe.zhong@rivai.ai/","msgid":"<20230127232608.276006-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T23:26:08","name":"RISC-V: Add vlse/vsse intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232608.276006-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49721,"url":"https://patchwork.plctlab.org/api/1.2/patches/49721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232757.276372-1-juzhe.zhong@rivai.ai/","msgid":"<20230127232757.276372-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T23:27:57","name":"RISC-V: Add vlse/vsse C/C++ intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232757.276372-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49763,"url":"https://patchwork.plctlab.org/api/1.2/patches/49763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com/","msgid":"<79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com>","list_archive_url":null,"date":"2023-01-28T01:04:44","name":"[1/3] Properly set GORI relation trios.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com/mbox/"},{"id":49764,"url":"https://patchwork.plctlab.org/api/1.2/patches/49764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe85adad-8778-8cac-0d75-5440bb15049d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-28T01:04:50","name":"[2/3] PR tree-optimization/108359","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe85adad-8778-8cac-0d75-5440bb15049d@redhat.com/mbox/"},{"id":49765,"url":"https://patchwork.plctlab.org/api/1.2/patches/49765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128012455.7414833E86@hamza.pair.com/","msgid":"<20230128012455.7414833E86@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T01:24:53","name":"[pushed] wwwdocs: codingconventions: Replace markup by ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128012455.7414833E86@hamza.pair.com/mbox/"},{"id":49767,"url":"https://patchwork.plctlab.org/api/1.2/patches/49767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128015215.399F033E86@hamza.pair.com/","msgid":"<20230128015215.399F033E86@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T01:52:13","name":"[pushed] wwwdocs: mirrors: Switch ftp.fu-berlin.de from ftp to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128015215.399F033E86@hamza.pair.com/mbox/"},{"id":49835,"url":"https://patchwork.plctlab.org/api/1.2/patches/49835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128101512.9238F33E84@hamza.pair.com/","msgid":"<20230128101512.9238F33E84@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:15:10","name":"[pushed] libstdc++: Switch www.open-std.org to https (ABI manual)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128101512.9238F33E84@hamza.pair.com/mbox/"},{"id":49836,"url":"https://patchwork.plctlab.org/api/1.2/patches/49836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128102441.CA8B533E74@hamza.pair.com/","msgid":"<20230128102441.CA8B533E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:24:39","name":"[pushed] doc: Update Go1 link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128102441.CA8B533E74@hamza.pair.com/mbox/"},{"id":49838,"url":"https://patchwork.plctlab.org/api/1.2/patches/49838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128103814.D29DF33E74@hamza.pair.com/","msgid":"<20230128103814.D29DF33E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:38:12","name":"[pushed] doc: Update reference to AddressSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128103814.D29DF33E74@hamza.pair.com/mbox/"},{"id":49843,"url":"https://patchwork.plctlab.org/api/1.2/patches/49843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128105141.6217333E74@hamza.pair.com/","msgid":"<20230128105141.6217333E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:51:39","name":"[pushed] libstdc++: Move sourceforge.net links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128105141.6217333E74@hamza.pair.com/mbox/"},{"id":49846,"url":"https://patchwork.plctlab.org/api/1.2/patches/49846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128111449.81D0833E77@hamza.pair.com/","msgid":"<20230128111449.81D0833E77@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T11:14:47","name":"[pushed,C++] wwwdocs: faq: Remove \"Copy constructor access check\" entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128111449.81D0833E77@hamza.pair.com/mbox/"},{"id":49855,"url":"https://patchwork.plctlab.org/api/1.2/patches/49855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132131.D9DCC33E8C@hamza.pair.com/","msgid":"<20230128132131.D9DCC33E8C@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T13:21:30","name":"[pushed] wwwdocs: bugs: Adjust link to ISO C++ standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132131.D9DCC33E8C@hamza.pair.com/mbox/"},{"id":49856,"url":"https://patchwork.plctlab.org/api/1.2/patches/49856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132353.77631-1-iain@sandoe.co.uk/","msgid":"<20230128132353.77631-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-28T13:23:53","name":"[pushed] Modula-2: Claim Wreturn-type in lang.opt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132353.77631-1-iain@sandoe.co.uk/mbox/"},{"id":49873,"url":"https://patchwork.plctlab.org/api/1.2/patches/49873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-26885791-f651-4f0a-a2c7-0c03ca90b149-1674925670220@3c-app-gmx-bs11/","msgid":"","list_archive_url":null,"date":"2023-01-28T17:07:50","name":"Fortran: diagnose USE associated symbols in COMMON blocks [PR108453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-26885791-f651-4f0a-a2c7-0c03ca90b149-1674925670220@3c-app-gmx-bs11/mbox/"},{"id":49875,"url":"https://patchwork.plctlab.org/api/1.2/patches/49875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24646027-deae-ef6b-4b96-1de0776938a9@gmail.com/","msgid":"<24646027-deae-ef6b-4b96-1de0776938a9@gmail.com>","list_archive_url":null,"date":"2023-01-28T17:31:35","name":"Fix excess warnings for mingw-w64 (LLP64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24646027-deae-ef6b-4b96-1de0776938a9@gmail.com/mbox/"},{"id":49895,"url":"https://patchwork.plctlab.org/api/1.2/patches/49895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab676a99-e22c-08fa-787a-4b7586a2bd60@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-28T18:16:40","name":"pr65658.c: fix excess warnings on LLP64 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab676a99-e22c-08fa-787a-4b7586a2bd60@gmail.com/mbox/"},{"id":49897,"url":"https://patchwork.plctlab.org/api/1.2/patches/49897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128182729.A560D33E6B@hamza.pair.com/","msgid":"<20230128182729.A560D33E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T18:27:27","name":"[pushed] doc: Update link to Objective-C book","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128182729.A560D33E6B@hamza.pair.com/mbox/"},{"id":49907,"url":"https://patchwork.plctlab.org/api/1.2/patches/49907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128203621.28B6A33E60@hamza.pair.com/","msgid":"<20230128203621.28B6A33E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T20:36:19","name":"[pushed] wwwdocs: cxx-status: Fix link to GCC 10 release notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128203621.28B6A33E60@hamza.pair.com/mbox/"},{"id":49911,"url":"https://patchwork.plctlab.org/api/1.2/patches/49911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215623.9C2F433E60@hamza.pair.com/","msgid":"<20230128215623.9C2F433E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T21:56:21","name":"[v2,pushed] wwwdocs: projects/gomp: Editorial changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215623.9C2F433E60@hamza.pair.com/mbox/"},{"id":49912,"url":"https://patchwork.plctlab.org/api/1.2/patches/49912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215850.6D1B233E60@hamza.pair.com/","msgid":"<20230128215850.6D1B233E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T21:58:48","name":"[pushed] wwwdocs: gcc-11: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215850.6D1B233E60@hamza.pair.com/mbox/"},{"id":49913,"url":"https://patchwork.plctlab.org/api/1.2/patches/49913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128221210.B246733E4B@hamza.pair.com/","msgid":"<20230128221210.B246733E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T22:12:08","name":"[pushed] libstdc++: Update links in the \"Contributing\" manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128221210.B246733E4B@hamza.pair.com/mbox/"},{"id":49914,"url":"https://patchwork.plctlab.org/api/1.2/patches/49914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222056.D868833E4D@hamza.pair.com/","msgid":"<20230128222056.D868833E4D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T22:20:55","name":"[pushed] doc: Update link to the AVR-Libc manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222056.D868833E4D@hamza.pair.com/mbox/"},{"id":49915,"url":"https://patchwork.plctlab.org/api/1.2/patches/49915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222425.1185711-1-apinski@marvell.com/","msgid":"<20230128222425.1185711-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-01-28T22:24:25","name":"Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222425.1185711-1-apinski@marvell.com/mbox/"},{"id":49916,"url":"https://patchwork.plctlab.org/api/1.2/patches/49916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128231214.1257560-1-philipp.tomsich@vrull.eu/","msgid":"<20230128231214.1257560-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-01-28T23:12:14","name":"aarch64: Update Ampere-1A (-mcpu=ampere1a) to include SM4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128231214.1257560-1-philipp.tomsich@vrull.eu/mbox/"},{"id":49918,"url":"https://patchwork.plctlab.org/api/1.2/patches/49918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012041.930809-1-hongtao.liu@intel.com/","msgid":"<20230129012041.930809-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-01-29T01:20:41","name":"Change AVX512FP16 to AVX512-FP16 in the document.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012041.930809-1-hongtao.liu@intel.com/mbox/"},{"id":49919,"url":"https://patchwork.plctlab.org/api/1.2/patches/49919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012352.930881-1-hongtao.liu@intel.com/","msgid":"<20230129012352.930881-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-01-29T01:23:52","name":"Change AVX512FP16 to AVX512-FP16 which is official name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012352.930881-1-hongtao.liu@intel.com/mbox/"},{"id":49940,"url":"https://patchwork.plctlab.org/api/1.2/patches/49940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com/","msgid":"<56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com>","list_archive_url":null,"date":"2023-01-29T04:17:30","name":"[fortran] PR103506 [10/11/12/13 Regression] ICE in gfc_free_namespace, at fortran/symbol.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com/mbox/"},{"id":49959,"url":"https://patchwork.plctlab.org/api/1.2/patches/49959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129113451.24516-1-iain@sandoe.co.uk/","msgid":"<20230129113451.24516-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-29T11:34:51","name":"driver, toplevel: Avoid emitting the version information twice.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129113451.24516-1-iain@sandoe.co.uk/mbox/"},{"id":49979,"url":"https://patchwork.plctlab.org/api/1.2/patches/49979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129141909.37927-1-lehua.ding@rivai.ai/","msgid":"<20230129141909.37927-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-29T14:19:09","name":"[V2,1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129141909.37927-1-lehua.ding@rivai.ai/mbox/"},{"id":50005,"url":"https://patchwork.plctlab.org/api/1.2/patches/50005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153233.219454-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153233.219454-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:32:33","name":"RISC-V: Add indexed loads/stores C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153233.219454-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50006,"url":"https://patchwork.plctlab.org/api/1.2/patches/50006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153457.220337-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153457.220337-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:34:57","name":"RISC-V: Add VSETVL testcases for indexed loads/stores.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153457.220337-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50007,"url":"https://patchwork.plctlab.org/api/1.2/patches/50007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153721.220810-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153721.220810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:37:21","name":"RISC-V: Add indexed loads/stores constraints testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153721.220810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50012,"url":"https://patchwork.plctlab.org/api/1.2/patches/50012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154424.222326-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154424.222326-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:44:24","name":"RISC-V: Add vloxei8 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154424.222326-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50013,"url":"https://patchwork.plctlab.org/api/1.2/patches/50013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154654.222798-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154654.222798-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:46:54","name":"RISC-V: Add vloxei16 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154654.222798-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50014,"url":"https://patchwork.plctlab.org/api/1.2/patches/50014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154846.223253-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154846.223253-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:48:46","name":"RISC-V: Add vloxei32 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154846.223253-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50015,"url":"https://patchwork.plctlab.org/api/1.2/patches/50015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155034.223826-1-juzhe.zhong@rivai.ai/","msgid":"<20230129155034.223826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:50:34","name":"RISC-V: Add vloxei64 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155034.223826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50016,"url":"https://patchwork.plctlab.org/api/1.2/patches/50016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155235.224444-1-juzhe.zhong@rivai.ai/","msgid":"<20230129155235.224444-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:52:35","name":"RISC-V: Add vluxei8 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155235.224444-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50021,"url":"https://patchwork.plctlab.org/api/1.2/patches/50021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr/","msgid":"<673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr>","list_archive_url":null,"date":"2023-01-29T16:21:36","name":"fortran: Explicitly set name for *LOC default BACK argument [PR108450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr/mbox/"},{"id":50046,"url":"https://patchwork.plctlab.org/api/1.2/patches/50046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129225639.88642-1-juzhe.zhong@rivai.ai/","msgid":"<20230129225639.88642-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T22:56:39","name":"RISC-V: Add vluxei16 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129225639.88642-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50047,"url":"https://patchwork.plctlab.org/api/1.2/patches/50047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230632.89482-1-juzhe.zhong@rivai.ai/","msgid":"<20230129230632.89482-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:06:32","name":"RISC-V: Add vluxei32 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230632.89482-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50048,"url":"https://patchwork.plctlab.org/api/1.2/patches/50048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230830.89758-1-juzhe.zhong@rivai.ai/","msgid":"<20230129230830.89758-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:08:30","name":"RISC-V: Add vluxei64 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230830.89758-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50049,"url":"https://patchwork.plctlab.org/api/1.2/patches/50049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231140.90181-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231140.90181-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:11:40","name":"RISC-V: Add vsoxei8 && vsoxei16 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231140.90181-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50057,"url":"https://patchwork.plctlab.org/api/1.2/patches/50057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231444.90559-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231444.90559-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:14:44","name":"RISC-V: Add vsoxei32 && vsoxei64 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231444.90559-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50063,"url":"https://patchwork.plctlab.org/api/1.2/patches/50063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231658.90834-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231658.90834-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:16:58","name":"RISC-V: Add vsoxei C API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231658.90834-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50064,"url":"https://patchwork.plctlab.org/api/1.2/patches/50064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231834.91087-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231834.91087-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:18:34","name":"RISC-V: Add vsuxei C API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231834.91087-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50065,"url":"https://patchwork.plctlab.org/api/1.2/patches/50065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232401.91674-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232401.91674-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:24:01","name":"RISC-V: Add vsuxei* C++ API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232401.91674-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50066,"url":"https://patchwork.plctlab.org/api/1.2/patches/50066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232625.91957-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232625.91957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:26:25","name":"RISC-V: Add vluxei8 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232625.91957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50067,"url":"https://patchwork.plctlab.org/api/1.2/patches/50067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232833.92227-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232833.92227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:28:33","name":"RISC-V: Add vluxei16 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232833.92227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50068,"url":"https://patchwork.plctlab.org/api/1.2/patches/50068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233209.92641-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233209.92641-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:32:09","name":"RISC-V: Add vluxei32 C++ intrinsic API testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233209.92641-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50069,"url":"https://patchwork.plctlab.org/api/1.2/patches/50069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233349.92875-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233349.92875-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:33:49","name":"RISC-V: Add vluxei64 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233349.92875-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50070,"url":"https://patchwork.plctlab.org/api/1.2/patches/50070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233538.93138-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233538.93138-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:35:38","name":"RISC-V: Add vloxei8 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233538.93138-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50071,"url":"https://patchwork.plctlab.org/api/1.2/patches/50071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233739.93397-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233739.93397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:37:39","name":"RISC-V: Add vloxei16 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233739.93397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50072,"url":"https://patchwork.plctlab.org/api/1.2/patches/50072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233929.93656-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233929.93656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:39:29","name":"RISC-V: Add vloxei32 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233929.93656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50073,"url":"https://patchwork.plctlab.org/api/1.2/patches/50073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129234050.93897-1-juzhe.zhong@rivai.ai/","msgid":"<20230129234050.93897-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:40:50","name":"RISC-V: Add vloxei64 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129234050.93897-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50184,"url":"https://patchwork.plctlab.org/api/1.2/patches/50184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130083439.74B0E13A06@imap2.suse-dmz.suse.de/","msgid":"<20230130083439.74B0E13A06@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-30T08:34:39","name":"ipa/108511 - relax assert for undefined local statics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130083439.74B0E13A06@imap2.suse-dmz.suse.de/mbox/"},{"id":50203,"url":"https://patchwork.plctlab.org/api/1.2/patches/50203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130095038.3665C13444@imap2.suse-dmz.suse.de/","msgid":"<20230130095038.3665C13444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-30T09:50:37","name":"tree-optimization/108574 - wrong-code with PRE PHI node processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130095038.3665C13444@imap2.suse-dmz.suse.de/mbox/"},{"id":50280,"url":"https://patchwork.plctlab.org/api/1.2/patches/50280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7qgqhno.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-30T13:24:43","name":"[COMMITTED] testsuite: Restore TORTURE_OPTIONS in gm2/warnings/returntype/fail/warnings-returntype-fail.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7qgqhno.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":50362,"url":"https://patchwork.plctlab.org/api/1.2/patches/50362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9fpprBtBWo7+Hk+@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-30T16:00:38","name":"[v2] c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9fpprBtBWo7+Hk+@redhat.com/mbox/"},{"id":50438,"url":"https://patchwork.plctlab.org/api/1.2/patches/50438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130191038.2450035-1-ppalka@redhat.com/","msgid":"<20230130191038.2450035-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-30T19:10:38","name":"c++: excessive satisfaction in check_methods [PR108579]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130191038.2450035-1-ppalka@redhat.com/mbox/"},{"id":50440,"url":"https://patchwork.plctlab.org/api/1.2/patches/50440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com/","msgid":"<64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com>","list_archive_url":null,"date":"2023-01-30T19:46:33","name":"[3/3] tree-optimization/108385 - Add op2_range to pointer_plus.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com/mbox/"},{"id":50499,"url":"https://patchwork.plctlab.org/api/1.2/patches/50499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130213639.2585560-1-ppalka@redhat.com/","msgid":"<20230130213639.2585560-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-30T21:36:39","name":"c++: ICE on unviable/ambiguous constrained dtors [PR96745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130213639.2585560-1-ppalka@redhat.com/mbox/"},{"id":50519,"url":"https://patchwork.plctlab.org/api/1.2/patches/50519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130214846.C969933E8D@hamza.pair.com/","msgid":"<20230130214846.C969933E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-30T21:48:40","name":"[pushed] wwwdocs: gcc-4.7: Adjust link to \"Collecting User-Mode Dumps\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130214846.C969933E8D@hamza.pair.com/mbox/"},{"id":50520,"url":"https://patchwork.plctlab.org/api/1.2/patches/50520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb913976-46f3-7df4-bf40-1d3315b908de@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-01-30T21:52:00","name":"[wwwdocs] readings: Update AIX linker links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb913976-46f3-7df4-bf40-1d3315b908de@pfeifer.com/mbox/"},{"id":50521,"url":"https://patchwork.plctlab.org/api/1.2/patches/50521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc595eeb-4f3a-42c2-a0d5-c8454e324e38-1675115730988@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2023-01-30T21:55:31","name":"Fortran: prevent redundant integer division truncation warnings [PR108592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc595eeb-4f3a-42c2-a0d5-c8454e324e38-1675115730988@3c-app-gmx-bap49/mbox/"},{"id":50529,"url":"https://patchwork.plctlab.org/api/1.2/patches/50529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130222013.9CC5933E8E@hamza.pair.com/","msgid":"<20230130222013.9CC5933E8E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-30T22:20:11","name":"[pushed] libstdc++: Update links in the Memory section of the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130222013.9CC5933E8E@hamza.pair.com/mbox/"},{"id":50561,"url":"https://patchwork.plctlab.org/api/1.2/patches/50561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131001455.D4C6133E90@hamza.pair.com/","msgid":"<20230131001455.D4C6133E90@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T00:14:53","name":"[pushed] doc: Change fsf.org to www.fsf.org in URLs (GFDL)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131001455.D4C6133E90@hamza.pair.com/mbox/"},{"id":50562,"url":"https://patchwork.plctlab.org/api/1.2/patches/50562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131003904.E564133E84@hamza.pair.com/","msgid":"<20230131003904.E564133E84@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T00:39:02","name":"[pushed] wwwdocs: cxx-dr-status: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131003904.E564133E84@hamza.pair.com/mbox/"},{"id":50571,"url":"https://patchwork.plctlab.org/api/1.2/patches/50571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9h+TFZKRmLzfUWj@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T02:34:52","name":"[v3] c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9h+TFZKRmLzfUWj@redhat.com/mbox/"},{"id":50576,"url":"https://patchwork.plctlab.org/api/1.2/patches/50576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131023549.454983-1-polacek@redhat.com/","msgid":"<20230131023549.454983-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T02:35:49","name":"c++: wrong error with constexpr array and value-init [PR108158]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131023549.454983-1-polacek@redhat.com/mbox/"},{"id":50579,"url":"https://patchwork.plctlab.org/api/1.2/patches/50579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131033707.2597685-1-ppalka@redhat.com/","msgid":"<20230131033707.2597685-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-31T03:37:07","name":"don'\''t declare header-defined functions both static and inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131033707.2597685-1-ppalka@redhat.com/mbox/"},{"id":50584,"url":"https://patchwork.plctlab.org/api/1.2/patches/50584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131042547.111233-1-kito.cheng@sifive.com/","msgid":"<20230131042547.111233-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-01-31T04:25:47","name":"[committed] RISC-V: Simplify testcase condition for RVV tests [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131042547.111233-1-kito.cheng@sifive.com/mbox/"},{"id":50619,"url":"https://patchwork.plctlab.org/api/1.2/patches/50619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131061038.97059-1-cooper.qu@linux.alibaba.com/","msgid":"<20230131061038.97059-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-31T06:10:38","name":"testsuite: Fix pr108574-3.c failed in arch where sign defaults to unsigned.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131061038.97059-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":50673,"url":"https://patchwork.plctlab.org/api/1.2/patches/50673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jK8Bk6l6sxbuvC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:01:52","name":"i386: Fix up ix86_convert_const_wide_int_to_broadcast [PR108599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jK8Bk6l6sxbuvC@tucnak/mbox/"},{"id":50674,"url":"https://patchwork.plctlab.org/api/1.2/patches/50674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jMtem3lCSndTCo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:09:25","name":"i386: Fix up -Wuninitialized warnings in avx512erintrin.h [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jMtem3lCSndTCo@tucnak/mbox/"},{"id":50675,"url":"https://patchwork.plctlab.org/api/1.2/patches/50675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jOynMLnKFL6jTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:18:18","name":"bbpart: Fix up ICE on asm goto [PR108596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jOynMLnKFL6jTu@tucnak/mbox/"},{"id":50695,"url":"https://patchwork.plctlab.org/api/1.2/patches/50695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a78ada54-1a0a-8914-917a-57baa71eb877@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:41:26","name":"[2/2,v3] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a78ada54-1a0a-8914-917a-57baa71eb877@arm.com/mbox/"},{"id":50760,"url":"https://patchwork.plctlab.org/api/1.2/patches/50760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba811e9b-2586-379f-9dce-69d7661f95ea@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-31T09:36:06","name":"[(pushed)] libsanitizer: Regenerate configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba811e9b-2586-379f-9dce-69d7661f95ea@suse.cz/mbox/"},{"id":50777,"url":"https://patchwork.plctlab.org/api/1.2/patches/50777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-31T11:28:23","name":"For Modula-2 build-tree testing, also set up paths to compiler libraries (was: [PATCH] 17/19 modula2 front end: dejagnu expect library scripts)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":50786,"url":"https://patchwork.plctlab.org/api/1.2/patches/50786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131120631.299018-1-juzhe.zhong@rivai.ai/","msgid":"<20230131120631.299018-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:06:31","name":"RISC-V: Add integer binary vv C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131120631.299018-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50789,"url":"https://patchwork.plctlab.org/api/1.2/patches/50789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121206.301304-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121206.301304-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:12:06","name":"RISC-V: Add vxor.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121206.301304-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50790,"url":"https://patchwork.plctlab.org/api/1.2/patches/50790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121340.301935-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121340.301935-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:13:40","name":"RISC-V: Add vsub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121340.301935-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50791,"url":"https://patchwork.plctlab.org/api/1.2/patches/50791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121647.303063-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121647.303063-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:16:47","name":"RISC-V: Add srl.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121647.303063-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50792,"url":"https://patchwork.plctlab.org/api/1.2/patches/50792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121820.303684-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121820.303684-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:18:20","name":"RISC-V: Add vsra.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121820.303684-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50794,"url":"https://patchwork.plctlab.org/api/1.2/patches/50794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122023.304615-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122023.304615-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:20:23","name":"RISC-V: Add vsll.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122023.304615-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50795,"url":"https://patchwork.plctlab.org/api/1.2/patches/50795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122235.305444-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122235.305444-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:22:35","name":"RISC-V: Add vrem*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122235.305444-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50796,"url":"https://patchwork.plctlab.org/api/1.2/patches/50796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122519.306474-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122519.306474-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:25:19","name":"RISC-V: Add vor.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122519.306474-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50797,"url":"https://patchwork.plctlab.org/api/1.2/patches/50797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122709.307183-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122709.307183-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:27:09","name":"RISC-V: Add vmin*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122709.307183-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50798,"url":"https://patchwork.plctlab.org/api/1.2/patches/50798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122836.307772-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122836.307772-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:28:36","name":"RISC-V: Add vmax*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122836.307772-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50799,"url":"https://patchwork.plctlab.org/api/1.2/patches/50799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123006.308617-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123006.308617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:30:06","name":"RISC-V: Add vdiv*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123006.308617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50800,"url":"https://patchwork.plctlab.org/api/1.2/patches/50800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123411.310092-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123411.310092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:34:11","name":"RISC-V: Add vand.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123411.310092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50801,"url":"https://patchwork.plctlab.org/api/1.2/patches/50801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123743.311357-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123743.311357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:37:43","name":"RISC-V: Add vadd.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123743.311357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50802,"url":"https://patchwork.plctlab.org/api/1.2/patches/50802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123933.312078-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123933.312078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:39:33","name":"RISC-V: Add binop constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123933.312078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50804,"url":"https://patchwork.plctlab.org/api/1.2/patches/50804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124106.312795-1-juzhe.zhong@rivai.ai/","msgid":"<20230131124106.312795-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:41:06","name":"RISC-V: Add vadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124106.312795-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50809,"url":"https://patchwork.plctlab.org/api/1.2/patches/50809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124946.315892-1-juzhe.zhong@rivai.ai/","msgid":"<20230131124946.315892-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:49:46","name":"RISC-V: Add vxor.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124946.315892-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50810,"url":"https://patchwork.plctlab.org/api/1.2/patches/50810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125538.318073-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125538.318073-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:55:37","name":"RISC-V: Add vand.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125538.318073-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50811,"url":"https://patchwork.plctlab.org/api/1.2/patches/50811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125820.319080-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125820.319080-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:58:20","name":"RISC-V: Add vsrl.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125820.319080-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50812,"url":"https://patchwork.plctlab.org/api/1.2/patches/50812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125958.319738-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125958.319738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:59:58","name":"RISC-V: Add vsra.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125958.319738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50813,"url":"https://patchwork.plctlab.org/api/1.2/patches/50813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130137.320560-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130137.320560-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:01:37","name":"RISC-V: Add vsll.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130137.320560-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50814,"url":"https://patchwork.plctlab.org/api/1.2/patches/50814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130319.321249-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130319.321249-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:03:19","name":"RISC-V: Add vrem*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130319.321249-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50818,"url":"https://patchwork.plctlab.org/api/1.2/patches/50818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130517.322011-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130517.322011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:05:17","name":"RISC-V: Add vor.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130517.322011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50826,"url":"https://patchwork.plctlab.org/api/1.2/patches/50826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130650.322631-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130650.322631-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:06:50","name":"RISC-V: Add vmin*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130650.322631-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50824,"url":"https://patchwork.plctlab.org/api/1.2/patches/50824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0vag8en.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T13:06:56","name":"vect: Fix single def-use cycle for ifn reductions [PR108608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0vag8en.fsf@arm.com/mbox/"},{"id":50830,"url":"https://patchwork.plctlab.org/api/1.2/patches/50830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130839.323333-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130839.323333-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:08:39","name":"RISC-V: Add vmax*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130839.323333-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50833,"url":"https://patchwork.plctlab.org/api/1.2/patches/50833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131131028.324141-1-juzhe.zhong@rivai.ai/","msgid":"<20230131131028.324141-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:10:28","name":"RISC-V: Add vdiv*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131131028.324141-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50837,"url":"https://patchwork.plctlab.org/api/1.2/patches/50837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132246.660779-1-arthur.cohen@embecosm.com/","msgid":"<20230131132246.660779-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:22:46","name":"[COMMITTED] gccrs: session-manager: Add ast-pretty-expanded dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132246.660779-1-arthur.cohen@embecosm.com/mbox/"},{"id":50838,"url":"https://patchwork.plctlab.org/api/1.2/patches/50838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132407.661219-1-arthur.cohen@embecosm.com/","msgid":"<20230131132407.661219-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:07","name":"[COMMITTED] gccrs: builtins: Add add_overflow builtin and refactor class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132407.661219-1-arthur.cohen@embecosm.com/mbox/"},{"id":50843,"url":"https://patchwork.plctlab.org/api/1.2/patches/50843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132417.661302-1-arthur.cohen@embecosm.com/","msgid":"<20230131132417.661302-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:17","name":"[COMMITTED] gccrs: backend: Add overflow checks to every arithmetic operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132417.661302-1-arthur.cohen@embecosm.com/mbox/"},{"id":50905,"url":"https://patchwork.plctlab.org/api/1.2/patches/50905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132424.661382-1-arthur.cohen@embecosm.com/","msgid":"<20230131132424.661382-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:24","name":"[COMMITTED] gccrs: rustc_attrs: Allow `rustc_inherit_overflow_checks` as a builtin..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132424.661382-1-arthur.cohen@embecosm.com/mbox/"},{"id":50850,"url":"https://patchwork.plctlab.org/api/1.2/patches/50850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132429.661457-1-arthur.cohen@embecosm.com/","msgid":"<20230131132429.661457-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:29","name":"[COMMITTED] gccrs: lint: Do not emit unused warnings for public items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132429.661457-1-arthur.cohen@embecosm.com/mbox/"},{"id":50839,"url":"https://patchwork.plctlab.org/api/1.2/patches/50839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132435.661532-1-arthur.cohen@embecosm.com/","msgid":"<20230131132435.661532-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:35","name":"[COMMITTED] gccrs: parser: Parse RangeFullExpr without erroring out","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132435.661532-1-arthur.cohen@embecosm.com/mbox/"},{"id":50844,"url":"https://patchwork.plctlab.org/api/1.2/patches/50844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132441.661608-1-arthur.cohen@embecosm.com/","msgid":"<20230131132441.661608-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:41","name":"[COMMITTED] gccrs: macros: Handle matchers properly in repetitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132441.661608-1-arthur.cohen@embecosm.com/mbox/"},{"id":50857,"url":"https://patchwork.plctlab.org/api/1.2/patches/50857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132448.661684-1-arthur.cohen@embecosm.com/","msgid":"<20230131132448.661684-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:48","name":"[COMMITTED] gccrs: transcriber: Do not infinite loop if the current parsed node is an error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132448.661684-1-arthur.cohen@embecosm.com/mbox/"},{"id":50851,"url":"https://patchwork.plctlab.org/api/1.2/patches/50851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132456.661762-1-arthur.cohen@embecosm.com/","msgid":"<20230131132456.661762-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:56","name":"[COMMITTED] gccrs: dump: Add AST debugging using the AST::Dump class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132456.661762-1-arthur.cohen@embecosm.com/mbox/"},{"id":50856,"url":"https://patchwork.plctlab.org/api/1.2/patches/50856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132504.661840-1-arthur.cohen@embecosm.com/","msgid":"<20230131132504.661840-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:04","name":"[COMMITTED] gccrs: ast: Only expand expressions and types if the kind is right","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132504.661840-1-arthur.cohen@embecosm.com/mbox/"},{"id":50858,"url":"https://patchwork.plctlab.org/api/1.2/patches/50858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132510.661917-1-arthur.cohen@embecosm.com/","msgid":"<20230131132510.661917-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:10","name":"[COMMITTED] gccrs: ast: Add better assertion on AST fragments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132510.661917-1-arthur.cohen@embecosm.com/mbox/"},{"id":50913,"url":"https://patchwork.plctlab.org/api/1.2/patches/50913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132515.661993-1-arthur.cohen@embecosm.com/","msgid":"<20230131132515.661993-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:15","name":"[COMMITTED] gccrs: Add guards against getting data from an empty vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132515.661993-1-arthur.cohen@embecosm.com/mbox/"},{"id":50853,"url":"https://patchwork.plctlab.org/api/1.2/patches/50853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132520.662068-1-arthur.cohen@embecosm.com/","msgid":"<20230131132520.662068-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:20","name":"[COMMITTED] gccrs: Add missing location info to coercions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132520.662068-1-arthur.cohen@embecosm.com/mbox/"},{"id":50860,"url":"https://patchwork.plctlab.org/api/1.2/patches/50860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132525.662143-1-arthur.cohen@embecosm.com/","msgid":"<20230131132525.662143-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:25","name":"[COMMITTED] gccrs: Refactor unify to hit a unify_site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132525.662143-1-arthur.cohen@embecosm.com/mbox/"},{"id":50861,"url":"https://patchwork.plctlab.org/api/1.2/patches/50861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132530.662219-1-arthur.cohen@embecosm.com/","msgid":"<20230131132530.662219-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:30","name":"[COMMITTED] gccrs: Remove param_use_canonical_types checks ported from c++ front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132530.662219-1-arthur.cohen@embecosm.com/mbox/"},{"id":50855,"url":"https://patchwork.plctlab.org/api/1.2/patches/50855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132538.662296-1-arthur.cohen@embecosm.com/","msgid":"<20230131132538.662296-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:38","name":"[COMMITTED] gccrs: Create canonical process of compiling constant items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132538.662296-1-arthur.cohen@embecosm.com/mbox/"},{"id":50859,"url":"https://patchwork.plctlab.org/api/1.2/patches/50859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132542.662372-1-arthur.cohen@embecosm.com/","msgid":"<20230131132542.662372-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:42","name":"[COMMITTED] gccrs: Add extra debugging for method call expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132542.662372-1-arthur.cohen@embecosm.com/mbox/"},{"id":50863,"url":"https://patchwork.plctlab.org/api/1.2/patches/50863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132546.662447-1-arthur.cohen@embecosm.com/","msgid":"<20230131132546.662447-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:46","name":"[COMMITTED] gccrs: Add new check for contains_associated_types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132546.662447-1-arthur.cohen@embecosm.com/mbox/"},{"id":50864,"url":"https://patchwork.plctlab.org/api/1.2/patches/50864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132550.662527-1-arthur.cohen@embecosm.com/","msgid":"<20230131132550.662527-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:50","name":"[COMMITTED] gccrs: Unit structs are not concrete when they need substitutions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132550.662527-1-arthur.cohen@embecosm.com/mbox/"},{"id":50911,"url":"https://patchwork.plctlab.org/api/1.2/patches/50911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132553.662602-1-arthur.cohen@embecosm.com/","msgid":"<20230131132553.662602-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:53","name":"[COMMITTED] gccrs: bugfix: initialize slice from array in const context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132553.662602-1-arthur.cohen@embecosm.com/mbox/"},{"id":50866,"url":"https://patchwork.plctlab.org/api/1.2/patches/50866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132555.662678-1-arthur.cohen@embecosm.com/","msgid":"<20230131132555.662678-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:55","name":"[COMMITTED] gccrs: add testcase to test component_ref and constructor codes in eval_constant_expression()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132555.662678-1-arthur.cohen@embecosm.com/mbox/"},{"id":50865,"url":"https://patchwork.plctlab.org/api/1.2/patches/50865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132559.662754-1-arthur.cohen@embecosm.com/","msgid":"<20230131132559.662754-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:59","name":"[COMMITTED] gccrs: backend: correctly formulate the exit condition ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132559.662754-1-arthur.cohen@embecosm.com/mbox/"},{"id":50871,"url":"https://patchwork.plctlab.org/api/1.2/patches/50871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132604.662832-1-arthur.cohen@embecosm.com/","msgid":"<20230131132604.662832-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:04","name":"[COMMITTED] gccrs: add testcase with struct to test component_ref and constructor codes..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132604.662832-1-arthur.cohen@embecosm.com/mbox/"},{"id":50870,"url":"https://patchwork.plctlab.org/api/1.2/patches/50870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132610.662984-1-arthur.cohen@embecosm.com/","msgid":"<20230131132610.662984-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:10","name":"[COMMITTED] gccrs: const generics: Make sure const generic types are visited properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132610.662984-1-arthur.cohen@embecosm.com/mbox/"},{"id":50862,"url":"https://patchwork.plctlab.org/api/1.2/patches/50862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132641.663441-1-arthur.cohen@embecosm.com/","msgid":"<20230131132641.663441-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:41","name":"[COMMITTED] gccrs: remove bad assertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132641.663441-1-arthur.cohen@embecosm.com/mbox/"},{"id":50868,"url":"https://patchwork.plctlab.org/api/1.2/patches/50868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132723.663982-1-arthur.cohen@embecosm.com/","msgid":"<20230131132723.663982-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:23","name":"[COMMITTED] gccrs: Fix duplicated function generation on higher ranked trait bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132723.663982-1-arthur.cohen@embecosm.com/mbox/"},{"id":50914,"url":"https://patchwork.plctlab.org/api/1.2/patches/50914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132729.664059-1-arthur.cohen@embecosm.com/","msgid":"<20230131132729.664059-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:29","name":"[COMMITTED] gccrs: Refactor TypeResolution to be a simple query based system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132729.664059-1-arthur.cohen@embecosm.com/mbox/"},{"id":50912,"url":"https://patchwork.plctlab.org/api/1.2/patches/50912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132736.664214-1-arthur.cohen@embecosm.com/","msgid":"<20230131132736.664214-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:36","name":"[COMMITTED] gccrs: Add testcase to show forward declared items work via TypeAlias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132736.664214-1-arthur.cohen@embecosm.com/mbox/"},{"id":50900,"url":"https://patchwork.plctlab.org/api/1.2/patches/50900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-2-qing.zhao@oracle.com/","msgid":"<20230131141140.3610133-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-31T14:11:39","name":"[1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-2-qing.zhao@oracle.com/mbox/"},{"id":50902,"url":"https://patchwork.plctlab.org/api/1.2/patches/50902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-3-qing.zhao@oracle.com/","msgid":"<20230131141140.3610133-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-31T14:11:40","name":"[2/2] Documentation Update.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-3-qing.zhao@oracle.com/mbox/"},{"id":50903,"url":"https://patchwork.plctlab.org/api/1.2/patches/50903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131144544.452FD13585@imap2.suse-dmz.suse.de/","msgid":"<20230131144544.452FD13585@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-31T14:45:43","name":"middle-end/108500 - replace recursive domtree DFS traversal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131144544.452FD13585@imap2.suse-dmz.suse.de/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-01/mbox/"},{"id":15,"url":"https://patchwork.plctlab.org/api/1.2/bundles/15/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-02/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-02","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":50916,"url":"https://patchwork.plctlab.org/api/1.2/patches/50916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132324.661030-1-arthur.cohen@embecosm.com/","msgid":"<20230131132324.661030-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:23:24","name":"[COMMITTED] gccrs: Desugar double borrows into two HIR:BorrowExpr'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132324.661030-1-arthur.cohen@embecosm.com/mbox/"},{"id":50919,"url":"https://patchwork.plctlab.org/api/1.2/patches/50919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132335.661108-1-arthur.cohen@embecosm.com/","msgid":"<20230131132335.661108-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:23:36","name":"[COMMITTED] gccrs: backend: Expose Bvariable class through rust-gcc header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132335.661108-1-arthur.cohen@embecosm.com/mbox/"},{"id":50933,"url":"https://patchwork.plctlab.org/api/1.2/patches/50933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132607.662907-1-arthur.cohen@embecosm.com/","msgid":"<20230131132607.662907-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:07","name":"[COMMITTED] gccrs: testsuite: add loop condition execution test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132607.662907-1-arthur.cohen@embecosm.com/mbox/"},{"id":50932,"url":"https://patchwork.plctlab.org/api/1.2/patches/50932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132613.663060-1-arthur.cohen@embecosm.com/","msgid":"<20230131132613.663060-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:13","name":"[COMMITTED] gccrs: const generics: Forbid default values in Functions, Traits and Impls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132613.663060-1-arthur.cohen@embecosm.com/mbox/"},{"id":50935,"url":"https://patchwork.plctlab.org/api/1.2/patches/50935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132616.663136-1-arthur.cohen@embecosm.com/","msgid":"<20230131132616.663136-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:16","name":"[COMMITTED] gccrs: attributes: Add #[macro_use] as builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132616.663136-1-arthur.cohen@embecosm.com/mbox/"},{"id":50928,"url":"https://patchwork.plctlab.org/api/1.2/patches/50928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132620.663213-1-arthur.cohen@embecosm.com/","msgid":"<20230131132620.663213-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:20","name":"[COMMITTED] gccrs: module lowering: Do not append null pointers as items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132620.663213-1-arthur.cohen@embecosm.com/mbox/"},{"id":50930,"url":"https://patchwork.plctlab.org/api/1.2/patches/50930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132624.663288-1-arthur.cohen@embecosm.com/","msgid":"<20230131132624.663288-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:24","name":"[COMMITTED] gccrs: Static Items must be const evaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132624.663288-1-arthur.cohen@embecosm.com/mbox/"},{"id":50934,"url":"https://patchwork.plctlab.org/api/1.2/patches/50934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132633.663363-1-arthur.cohen@embecosm.com/","msgid":"<20230131132633.663363-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:33","name":"[COMMITTED] gccrs: Statics are a coercion site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132633.663363-1-arthur.cohen@embecosm.com/mbox/"},{"id":50923,"url":"https://patchwork.plctlab.org/api/1.2/patches/50923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132650.663517-1-arthur.cohen@embecosm.com/","msgid":"<20230131132650.663517-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:50","name":"[COMMITTED] gccrs: Add testcase for const-eval issue from rust-blog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132650.663517-1-arthur.cohen@embecosm.com/mbox/"},{"id":50931,"url":"https://patchwork.plctlab.org/api/1.2/patches/50931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132656.663600-1-arthur.cohen@embecosm.com/","msgid":"<20230131132656.663600-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:56","name":"[COMMITTED] gccrs: rust: Add -frust-compile-until option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132656.663600-1-arthur.cohen@embecosm.com/mbox/"},{"id":50929,"url":"https://patchwork.plctlab.org/api/1.2/patches/50929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132703.663677-1-arthur.cohen@embecosm.com/","msgid":"<20230131132703.663677-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:03","name":"[COMMITTED] gccrs: expand: eager evaluate macros inside builtin macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132703.663677-1-arthur.cohen@embecosm.com/mbox/"},{"id":50920,"url":"https://patchwork.plctlab.org/api/1.2/patches/50920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132709.663756-1-arthur.cohen@embecosm.com/","msgid":"<20230131132709.663756-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:09","name":"[COMMITTED] gccrs: testsuite/rust: add a testcase for testing ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132709.663756-1-arthur.cohen@embecosm.com/mbox/"},{"id":50927,"url":"https://patchwork.plctlab.org/api/1.2/patches/50927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132716.663831-1-arthur.cohen@embecosm.com/","msgid":"<20230131132716.663831-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:16","name":"[COMMITTED] gccrs: Cleanup formatting of backend expression visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132716.663831-1-arthur.cohen@embecosm.com/mbox/"},{"id":50917,"url":"https://patchwork.plctlab.org/api/1.2/patches/50917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132720.663907-1-arthur.cohen@embecosm.com/","msgid":"<20230131132720.663907-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:20","name":"[COMMITTED] gccrs: Make constexpr constructors type-checking more permissive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132720.663907-1-arthur.cohen@embecosm.com/mbox/"},{"id":50922,"url":"https://patchwork.plctlab.org/api/1.2/patches/50922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132732.664139-1-arthur.cohen@embecosm.com/","msgid":"<20230131132732.664139-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:32","name":"[COMMITTED] gccrs: Add testcase to show forward declared items work","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132732.664139-1-arthur.cohen@embecosm.com/mbox/"},{"id":50936,"url":"https://patchwork.plctlab.org/api/1.2/patches/50936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131153702.2844226-1-philipp.tomsich@vrull.eu/","msgid":"<20230131153702.2844226-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-01-31T15:37:02","name":"[COMMITTED] PR target/108589 - Check REG_P for AARCH64_FUSE_ADDSUB_2REG_CONST1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131153702.2844226-1-philipp.tomsich@vrull.eu/mbox/"},{"id":51000,"url":"https://patchwork.plctlab.org/api/1.2/patches/51000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131183001.377458-1-polacek@redhat.com/","msgid":"<20230131183001.377458-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T18:30:01","name":"[pushed] c++: Add fixed test [PR102870]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131183001.377458-1-polacek@redhat.com/mbox/"},{"id":51029,"url":"https://patchwork.plctlab.org/api/1.2/patches/51029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com/","msgid":"<4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com>","list_archive_url":null,"date":"2023-01-31T20:10:39","name":"PR tree-optimization/108356 - Ranger cache - always use range_from_dom when updating.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com/mbox/"},{"id":51031,"url":"https://patchwork.plctlab.org/api/1.2/patches/51031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131204134.725217-1-polacek@redhat.com/","msgid":"<20230131204134.725217-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T20:41:34","name":"c++: ICE with -Wlogical-op [PR107755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131204134.725217-1-polacek@redhat.com/mbox/"},{"id":51044,"url":"https://patchwork.plctlab.org/api/1.2/patches/51044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220724.19131-1-juzhe.zhong@rivai.ai/","msgid":"<20230131220724.19131-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:07:24","name":"RISC-V: Add RVV shift.vx C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220724.19131-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51046,"url":"https://patchwork.plctlab.org/api/1.2/patches/51046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220958.20394-1-juzhe.zhong@rivai.ai/","msgid":"<20230131220958.20394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:09:58","name":"RISC-V: Add vsrl.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220958.20394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51047,"url":"https://patchwork.plctlab.org/api/1.2/patches/51047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221110.20996-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221110.20996-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:11:10","name":"RISC-V: Add vsra.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221110.20996-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51048,"url":"https://patchwork.plctlab.org/api/1.2/patches/51048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221325.21956-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221325.21956-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:13:25","name":"RISC-V: Add vsll.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221325.21956-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51049,"url":"https://patchwork.plctlab.org/api/1.2/patches/51049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221513.22652-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221513.22652-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:15:13","name":"RISC-V: Add shift constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221513.22652-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51050,"url":"https://patchwork.plctlab.org/api/1.2/patches/51050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221752.23648-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221752.23648-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:17:52","name":"RISC-V: Add vsrl.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221752.23648-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51051,"url":"https://patchwork.plctlab.org/api/1.2/patches/51051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221943.24518-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221943.24518-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:19:43","name":"RISC-V: Add vsra.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221943.24518-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51054,"url":"https://patchwork.plctlab.org/api/1.2/patches/51054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131222056.25127-1-juzhe.zhong@rivai.ai/","msgid":"<20230131222056.25127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:20:56","name":"RISC-V: Add vsll.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131222056.25127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51068,"url":"https://patchwork.plctlab.org/api/1.2/patches/51068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131223954.219780-1-hjl.tools@gmail.com/","msgid":"<20230131223954.219780-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-31T22:39:54","name":"libsanitizer: cherry-pick commit 742bcbf685bc from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131223954.219780-1-hjl.tools@gmail.com/mbox/"},{"id":51073,"url":"https://patchwork.plctlab.org/api/1.2/patches/51073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131225342.7CE7433E92@hamza.pair.com/","msgid":"<20230131225342.7CE7433E92@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T22:53:39","name":"[pushed] wwwdocs: gcc-5: Fix deep link into GDB manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131225342.7CE7433E92@hamza.pair.com/mbox/"},{"id":51109,"url":"https://patchwork.plctlab.org/api/1.2/patches/51109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201001111.1045847-1-jason@redhat.com/","msgid":"<20230201001111.1045847-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-01T00:11:11","name":"[pushed] c++: aggregate base and TARGET_EXPR_ELIDING_P [PR108559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201001111.1045847-1-jason@redhat.com/mbox/"},{"id":51121,"url":"https://patchwork.plctlab.org/api/1.2/patches/51121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012112.1300516-1-apinski@marvell.com/","msgid":"<20230201012112.1300516-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-01T01:21:12","name":"Simplify \"1 - bool_val\" to \"bool_val ^ 1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012112.1300516-1-apinski@marvell.com/mbox/"},{"id":51119,"url":"https://patchwork.plctlab.org/api/1.2/patches/51119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012919.1301588-1-apinski@marvell.com/","msgid":"<20230201012919.1301588-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-01T01:29:19","name":"Simplify \"1 - bool_val\" to \"bool_val ^ 1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012919.1301588-1-apinski@marvell.com/mbox/"},{"id":51122,"url":"https://patchwork.plctlab.org/api/1.2/patches/51122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201014733.172099-1-juzhe.zhong@rivai.ai/","msgid":"<20230201014733.172099-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-01T01:47:33","name":"RISC-V: Fix constraint bug for binary operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201014733.172099-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51134,"url":"https://patchwork.plctlab.org/api/1.2/patches/51134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022406.824321-1-dmalcolm@redhat.com/","msgid":"<20230201022406.824321-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:24:06","name":"[pushed] doc: add notes about limitations of -fanalyzer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022406.824321-1-dmalcolm@redhat.com/mbox/"},{"id":51135,"url":"https://patchwork.plctlab.org/api/1.2/patches/51135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022524.1100674-1-jason@redhat.com/","msgid":"<20230201022524.1100674-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:25:24","name":"[pushed] c++: Add -Wno-changes-meaning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022524.1100674-1-jason@redhat.com/mbox/"},{"id":51136,"url":"https://patchwork.plctlab.org/api/1.2/patches/51136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022615.824902-1-dmalcolm@redhat.com/","msgid":"<20230201022615.824902-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:26:15","name":"[pushed] analyzer: fix -Wanalyzer-allocation-size false -ve on alloca [PR108616]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022615.824902-1-dmalcolm@redhat.com/mbox/"},{"id":51137,"url":"https://patchwork.plctlab.org/api/1.2/patches/51137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022755.825041-1-dmalcolm@redhat.com/","msgid":"<20230201022755.825041-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:27:55","name":"[pushed] analyzer: fix uses of alloca in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022755.825041-1-dmalcolm@redhat.com/mbox/"},{"id":51210,"url":"https://patchwork.plctlab.org/api/1.2/patches/51210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201073859.3920910-1-maskray@google.com/","msgid":"<20230201073859.3920910-1-maskray@google.com>","list_archive_url":null,"date":"2023-02-01T07:38:59","name":"x86: Use DW_EH_PE_indirect|DW_EH_PE_pcrel encodings for -fno-pic code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201073859.3920910-1-maskray@google.com/mbox/"},{"id":51211,"url":"https://patchwork.plctlab.org/api/1.2/patches/51211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-2-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-2-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:43","name":"[1/3] New reg note REG_CFA_NORESTORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-2-krebbel@linux.ibm.com/mbox/"},{"id":51213,"url":"https://patchwork.plctlab.org/api/1.2/patches/51213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-3-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-3-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:44","name":"[2/3] IBM zSystems: Make stack_tie to work with hard frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-3-krebbel@linux.ibm.com/mbox/"},{"id":51212,"url":"https://patchwork.plctlab.org/api/1.2/patches/51212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-4-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-4-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:45","name":"[3/3] IBM zSystems: Save argument registers to the stack -mpreserve-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-4-krebbel@linux.ibm.com/mbox/"},{"id":51250,"url":"https://patchwork.plctlab.org/api/1.2/patches/51250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9o0lpdPLeh4JF6U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:44:54","name":"[committed] c++, openmp: Handle some OMP_*/OACC_* constructs during constant expression evaluation [PR108607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9o0lpdPLeh4JF6U@tucnak/mbox/"},{"id":51253,"url":"https://patchwork.plctlab.org/api/1.2/patches/51253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-1-christophe.lyon@arm.com/","msgid":"<20230201094650.65755-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-02-01T09:46:49","name":"arm: Fix warning in libgcc/config/arm/pr-support.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-1-christophe.lyon@arm.com/mbox/"},{"id":51252,"url":"https://patchwork.plctlab.org/api/1.2/patches/51252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-2-christophe.lyon@arm.com/","msgid":"<20230201094650.65755-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-02-01T09:46:50","name":"arm: [MVE] Add missing length=8 attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-2-christophe.lyon@arm.com/mbox/"},{"id":51259,"url":"https://patchwork.plctlab.org/api/1.2/patches/51259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelhg17a.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:54:49","name":"[pushed] testsuite: Fix g++.dg/gomp warnings for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelhg17a.fsf@arm.com/mbox/"},{"id":51260,"url":"https://patchwork.plctlab.org/api/1.2/patches/51260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedr9g165.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:55:30","name":"[pushed] compare-elim: Fix an RTL checking failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedr9g165.fsf@arm.com/mbox/"},{"id":51261,"url":"https://patchwork.plctlab.org/api/1.2/patches/51261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201095624.AAF1633E9B@hamza.pair.com/","msgid":"<20230201095624.AAF1633E9B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T09:56:22","name":"[pushed] wwwdocs: readings: Remove Herman D. Knoble'\''s Fortran Resources","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201095624.AAF1633E9B@hamza.pair.com/mbox/"},{"id":51262,"url":"https://patchwork.plctlab.org/api/1.2/patches/51262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201100109.5F31A33EAD@hamza.pair.com/","msgid":"<20230201100109.5F31A33EAD@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T10:01:07","name":"[pushed] wwwdocs: testing: Update LAPACK links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201100109.5F31A33EAD@hamza.pair.com/mbox/"},{"id":51310,"url":"https://patchwork.plctlab.org/api/1.2/patches/51310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9pO9EuODLKr8Do3@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-01T11:37:24","name":"ree: Fix -fcompare-debug issues in combine_reaching_defs [PR108573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9pO9EuODLKr8Do3@tucnak/mbox/"},{"id":51312,"url":"https://patchwork.plctlab.org/api/1.2/patches/51312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yclppf8.fsf@euler.schwinge.homeip.net/","msgid":"<875yclppf8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-01T11:59:07","name":"[og12] Fix '\''omp_allocator_handle_kind'\'' example in '\''gfortran.dg/gomp/allocate-4.f90'\'' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0).)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yclppf8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":51315,"url":"https://patchwork.plctlab.org/api/1.2/patches/51315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201122444.253620-1-juzhe.zhong@rivai.ai/","msgid":"<20230201122444.253620-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-01T12:24:44","name":"CPROP: Allow cprop optimization when the function has a single block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201122444.253620-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51359,"url":"https://patchwork.plctlab.org/api/1.2/patches/51359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201143831.BDA3A20423@pchp3.se.axis.com/","msgid":"<20230201143831.BDA3A20423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-01T14:38:31","name":"libstdc++ testsuite: Correct S0 in std/time/hh_mm_ss/1.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201143831.BDA3A20423@pchp3.se.axis.com/mbox/"},{"id":51423,"url":"https://patchwork.plctlab.org/api/1.2/patches/51423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1efd091-471f-ed79-ad14-64946f2e5565@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T15:35:03","name":"amdgcn: Add instruction pattern for conditional shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1efd091-471f-ed79-ad14-64946f2e5565@codesourcery.com/mbox/"},{"id":51476,"url":"https://patchwork.plctlab.org/api/1.2/patches/51476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201164626.699192-1-siddhesh@gotplt.org/","msgid":"<20230201164626.699192-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-02-01T16:46:26","name":"[committed,v2] testsuite: Run __bos tests to completion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201164626.699192-1-siddhesh@gotplt.org/mbox/"},{"id":51501,"url":"https://patchwork.plctlab.org/api/1.2/patches/51501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df275d3e-145b-c8ca-5947-db2661e84262@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T18:11:27","name":"PR tree-optimization/107570 - Reset SCEV after folding in VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df275d3e-145b-c8ca-5947-db2661e84262@redhat.com/mbox/"},{"id":51547,"url":"https://patchwork.plctlab.org/api/1.2/patches/51547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-41f58533-d711-454b-9271-84b8d31b8a41-1675283099194@3c-app-gmx-bs72/","msgid":"","list_archive_url":null,"date":"2023-02-01T20:24:59","name":"[committed] Fortran: error recovery on invalid array section [PR108609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-41f58533-d711-454b-9271-84b8d31b8a41-1675283099194@3c-app-gmx-bs72/mbox/"},{"id":51572,"url":"https://patchwork.plctlab.org/api/1.2/patches/51572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210755.2445205-1-jwakely@redhat.com/","msgid":"<20230201210755.2445205-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:07:55","name":"[committed] libstdc++: Do not embed tzdata.zi for 8-bit and 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210755.2445205-1-jwakely@redhat.com/mbox/"},{"id":51573,"url":"https://patchwork.plctlab.org/api/1.2/patches/51573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210853.2445267-1-jwakely@redhat.com/","msgid":"<20230201210853.2445267-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:08:53","name":"[committed] libstdc++: Fix build failures for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210853.2445267-1-jwakely@redhat.com/mbox/"},{"id":51574,"url":"https://patchwork.plctlab.org/api/1.2/patches/51574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210921.2445332-1-jwakely@redhat.com/","msgid":"<20230201210921.2445332-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:09:21","name":"[committed] libstdc++: Fix std::random_device for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210921.2445332-1-jwakely@redhat.com/mbox/"},{"id":51612,"url":"https://patchwork.plctlab.org/api/1.2/patches/51612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201235444.14EE633EBF@hamza.pair.com/","msgid":"<20230201235444.14EE633EBF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T23:54:41","name":"[pushed] wwwdocs: readings: Update Nios II reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201235444.14EE633EBF@hamza.pair.com/mbox/"},{"id":51613,"url":"https://patchwork.plctlab.org/api/1.2/patches/51613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202003345.B1E0B33EBE@hamza.pair.com/","msgid":"<20230202003345.B1E0B33EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:33:43","name":"[pushed] libstdc++: Fix link to online GDB manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202003345.B1E0B33EBE@hamza.pair.com/mbox/"},{"id":51614,"url":"https://patchwork.plctlab.org/api/1.2/patches/51614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202004547.9F3EB33E6E@hamza.pair.com/","msgid":"<20230202004547.9F3EB33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:45:45","name":"[pushed] wwwdocs: frontends: Switch www.modula3.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202004547.9F3EB33E6E@hamza.pair.com/mbox/"},{"id":51615,"url":"https://patchwork.plctlab.org/api/1.2/patches/51615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202005154.7652133EBE@hamza.pair.com/","msgid":"<20230202005154.7652133EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:51:52","name":"[pushed] libstdc++: Switch a www.open-std.org link to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202005154.7652133EBE@hamza.pair.com/mbox/"},{"id":51626,"url":"https://patchwork.plctlab.org/api/1.2/patches/51626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202013052.2070569-1-hongtao.liu@intel.com/","msgid":"<20230202013052.2070569-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-02-02T01:30:52","name":"[vect] Don'\''t peel nonlinear iv(mult or shift) for epilog when vf is not constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202013052.2070569-1-hongtao.liu@intel.com/mbox/"},{"id":51726,"url":"https://patchwork.plctlab.org/api/1.2/patches/51726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202054550.2034-1-jinma@linux.alibaba.com/","msgid":"<20230202054550.2034-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-02T05:45:50","name":"[v5,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202054550.2034-1-jinma@linux.alibaba.com/mbox/"},{"id":51727,"url":"https://patchwork.plctlab.org/api/1.2/patches/51727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9tQNeCkdqlMkKdz@jupiter.tail36e24.ts.net/","msgid":"","list_archive_url":null,"date":"2023-02-02T05:55:01","name":"Add x86_64-gnu target to contrib/config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9tQNeCkdqlMkKdz@jupiter.tail36e24.ts.net/mbox/"},{"id":51799,"url":"https://patchwork.plctlab.org/api/1.2/patches/51799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com/","msgid":"<4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com>","list_archive_url":null,"date":"2023-02-02T08:43:42","name":"s390: Add LEN_LOAD/LEN_STORE support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com/mbox/"},{"id":51806,"url":"https://patchwork.plctlab.org/api/1.2/patches/51806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t7xMBKDiGdX3/F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:00:52","name":"[committed] nested, openmp: Wrap OMP_CLAUSE_*_GIMPLE_SEQ into GIMPLE_BIND for declare_vars [PR108435]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t7xMBKDiGdX3/F@tucnak/mbox/"},{"id":51810,"url":"https://patchwork.plctlab.org/api/1.2/patches/51810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t+gOQrO/wBHlxY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:12:32","name":"Replace IFN_TRAP with BUILT_IN_UNREACHABLE_TRAP [PR107300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t+gOQrO/wBHlxY@tucnak/mbox/"},{"id":51829,"url":"https://patchwork.plctlab.org/api/1.2/patches/51829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelge6uc.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:48:11","name":"rtl-ssa: Fix splitting of clobber groups [PR108508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelge6uc.fsf@arm.com/mbox/"},{"id":51869,"url":"https://patchwork.plctlab.org/api/1.2/patches/51869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com/","msgid":"<768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T11:19:56","name":"[committed] libgomp.texi (OpenMP TR11 impl. status): Fix '\''strict'\'' item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com/mbox/"},{"id":51872,"url":"https://patchwork.plctlab.org/api/1.2/patches/51872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202113406.91303385842C@sourceware.org/","msgid":"<20230202113406.91303385842C@sourceware.org>","list_archive_url":null,"date":"2023-02-02T11:33:22","name":"middle-end/108625 - wrong folding due to misinterpreted !","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202113406.91303385842C@sourceware.org/mbox/"},{"id":51877,"url":"https://patchwork.plctlab.org/api/1.2/patches/51877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202114604.2059-1-jinma@linux.alibaba.com/","msgid":"<20230202114604.2059-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-02T11:46:04","name":"RISC-V: Fix bug of TARGET_COMPUTE_MULTILIB implemented in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202114604.2059-1-jinma@linux.alibaba.com/mbox/"},{"id":51878,"url":"https://patchwork.plctlab.org/api/1.2/patches/51878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com/","msgid":"<46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T11:49:57","name":"[committed] amdgcn, libgomp: Manually allocated stacks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com/mbox/"},{"id":51942,"url":"https://patchwork.plctlab.org/api/1.2/patches/51942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com/","msgid":"<4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T14:13:58","name":"libgomp: Fix reverse offload issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com/mbox/"},{"id":51944,"url":"https://patchwork.plctlab.org/api/1.2/patches/51944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141503.913418-1-dmalcolm@redhat.com/","msgid":"<20230202141503.913418-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-02T14:15:03","name":"[pushed] analyzer: add deref-before-check-qemu-qtest_rsp_args.c test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141503.913418-1-dmalcolm@redhat.com/mbox/"},{"id":51948,"url":"https://patchwork.plctlab.org/api/1.2/patches/51948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141630.913508-1-dmalcolm@redhat.com/","msgid":"<20230202141630.913508-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-02T14:16:30","name":"[pushed] analyzer: fix -Wanalyzer-fd-type-mismatch false +ve on \"listen\" [PR108633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141630.913508-1-dmalcolm@redhat.com/mbox/"},{"id":51953,"url":"https://patchwork.plctlab.org/api/1.2/patches/51953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9vJBTq6losUIR6J@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:30:29","name":"tree: Use comdat tree_code_{type,length} even for C++11/14 [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9vJBTq6losUIR6J@tucnak/mbox/"},{"id":51978,"url":"https://patchwork.plctlab.org/api/1.2/patches/51978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v8ce32.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:54:41","name":"[pushed] testsuite: Add case-values-threshold to pr107876.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v8ce32.fsf@arm.com/mbox/"},{"id":51979,"url":"https://patchwork.plctlab.org/api/1.2/patches/51979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelgce1g.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:55:39","name":"[pushed] rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelgce1g.fsf@arm.com/mbox/"},{"id":52074,"url":"https://patchwork.plctlab.org/api/1.2/patches/52074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7qc9h08.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-02T16:19:51","name":"ipa: Avoid invalid gimple when IPA-CP and IPA-SRA disagree on types (108384)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7qc9h08.fsf@suse.cz/mbox/"},{"id":52099,"url":"https://patchwork.plctlab.org/api/1.2/patches/52099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164802.2634934-1-jwakely@redhat.com/","msgid":"<20230202164802.2634934-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T16:48:02","name":"[committed] libstdc++: Use emplace in std::variant::operator=(T&&) as per LWG 3585","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164802.2634934-1-jwakely@redhat.com/mbox/"},{"id":52100,"url":"https://patchwork.plctlab.org/api/1.2/patches/52100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164905.2634961-1-jwakely@redhat.com/","msgid":"<20230202164905.2634961-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T16:49:05","name":"[committed] libstdc++: Fix std::filesystem errors with -fkeep-inline-functions [PR108636]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164905.2634961-1-jwakely@redhat.com/mbox/"},{"id":52102,"url":"https://patchwork.plctlab.org/api/1.2/patches/52102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9v1FvWk30MUvi4Z@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-02T17:38:30","name":"Bump up precision size to 16 bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9v1FvWk30MUvi4Z@toto.the-meissners.org/mbox/"},{"id":52103,"url":"https://patchwork.plctlab.org/api/1.2/patches/52103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202173903.2638731-1-jwakely@redhat.com/","msgid":"<20230202173903.2638731-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T17:39:03","name":"[committed] libstdc++: Define std::basic_stringbuf::view() for old std::string ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202173903.2638731-1-jwakely@redhat.com/mbox/"},{"id":52106,"url":"https://patchwork.plctlab.org/api/1.2/patches/52106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180529.2642046-1-jwakely@redhat.com/","msgid":"<20230202180529.2642046-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T18:05:29","name":"[committed] libstdc++: Use ENOSYS for unsupported filesystem ops on AVR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180529.2642046-1-jwakely@redhat.com/mbox/"},{"id":52107,"url":"https://patchwork.plctlab.org/api/1.2/patches/52107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180950.3469931-1-ppalka@redhat.com/","msgid":"<20230202180950.3469931-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-02T18:09:50","name":"c++: spurious ADDR_EXPR after overload set pruning [PR107461]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180950.3469931-1-ppalka@redhat.com/mbox/"},{"id":52110,"url":"https://patchwork.plctlab.org/api/1.2/patches/52110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df42fe65-4c8a-8448-6463-17e498e0a6cd@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T18:20:26","name":"libstdc++: Limit allocations in _Rb_tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df42fe65-4c8a-8448-6463-17e498e0a6cd@gmail.com/mbox/"},{"id":52158,"url":"https://patchwork.plctlab.org/api/1.2/patches/52158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com/","msgid":"<5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T20:08:44","name":"[committed] c: Update checks on constexpr floating-point initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com/mbox/"},{"id":52168,"url":"https://patchwork.plctlab.org/api/1.2/patches/52168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202210139.E1AF420426@pchp3.se.axis.com/","msgid":"<20230202210139.E1AF420426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-02T21:01:39","name":"testsuite: XFAIL g++.dg/pr71488.C and warn/Warray-bounds-16.C, PR107561","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202210139.E1AF420426@pchp3.se.axis.com/mbox/"},{"id":52176,"url":"https://patchwork.plctlab.org/api/1.2/patches/52176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202215018.0691B33E77@hamza.pair.com/","msgid":"<20230202215018.0691B33E77@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T21:50:16","name":"[pushed] wwwdocs: gcc-11: Update arm \"Straight-line Speculation vulnerability\" link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202215018.0691B33E77@hamza.pair.com/mbox/"},{"id":52208,"url":"https://patchwork.plctlab.org/api/1.2/patches/52208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe66a753-e6cb-d047-8a53-666825bcafb2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T23:30:44","name":"[committed] c: Update nullptr_t comparison checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe66a753-e6cb-d047-8a53-666825bcafb2@codesourcery.com/mbox/"},{"id":52225,"url":"https://patchwork.plctlab.org/api/1.2/patches/52225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203002825.398939-1-polacek@redhat.com/","msgid":"<20230203002825.398939-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-03T00:28:25","name":"c++: can'\''t eval PTRMEM_CST in incomplete class [PR107574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203002825.398939-1-polacek@redhat.com/mbox/"},{"id":52303,"url":"https://patchwork.plctlab.org/api/1.2/patches/52303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203045851.43100-1-monk.chiang@sifive.com/","msgid":"<20230203045851.43100-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-02-03T04:58:51","name":"RISC-V: Remove unnecessary register class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203045851.43100-1-monk.chiang@sifive.com/mbox/"},{"id":52315,"url":"https://patchwork.plctlab.org/api/1.2/patches/52315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9ygWHc7w3DeIr9O@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T05:49:12","name":"[1/2] PR target/107299: Fix build issue when long double is IEEE 128-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9ygWHc7w3DeIr9O@toto.the-meissners.org/mbox/"},{"id":52316,"url":"https://patchwork.plctlab.org/api/1.2/patches/52316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9yhQQdUaM+z6IYD@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T05:53:05","name":"[2/2] Rework 128-bit complex multiply and divide.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9yhQQdUaM+z6IYD@toto.the-meissners.org/mbox/"},{"id":52325,"url":"https://patchwork.plctlab.org/api/1.2/patches/52325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203065605.153044-1-juzhe.zhong@rivai.ai/","msgid":"<20230203065605.153044-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T06:56:05","name":"RISC-V: Add binary vx C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203065605.153044-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52326,"url":"https://patchwork.plctlab.org/api/1.2/patches/52326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070048.153816-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070048.153816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:00:48","name":"RISC-V: Add vmul.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070048.153816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52327,"url":"https://patchwork.plctlab.org/api/1.2/patches/52327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070254.155371-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070254.155371-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:02:54","name":"RISC-V: Add vmul.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070254.155371-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52332,"url":"https://patchwork.plctlab.org/api/1.2/patches/52332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070449.158742-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070449.158742-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:04:49","name":"RISC-V: Add vxor.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070449.158742-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52333,"url":"https://patchwork.plctlab.org/api/1.2/patches/52333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070623.162411-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070623.162411-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:06:22","name":"RISC-V: Add vsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070623.162411-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52335,"url":"https://patchwork.plctlab.org/api/1.2/patches/52335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070818.166303-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070818.166303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:08:18","name":"RISC-V: Add vrsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070818.166303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52336,"url":"https://patchwork.plctlab.org/api/1.2/patches/52336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071025.168340-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071025.168340-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:10:25","name":"RISC-V: Add vremu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071025.168340-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52337,"url":"https://patchwork.plctlab.org/api/1.2/patches/52337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071152.170594-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071152.170594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:11:52","name":"RISC-V: Add vrem.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071152.170594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52343,"url":"https://patchwork.plctlab.org/api/1.2/patches/52343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071351.172167-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071351.172167-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:13:51","name":"RISC-V: Add vor.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071351.172167-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52344,"url":"https://patchwork.plctlab.org/api/1.2/patches/52344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071508.173207-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071508.173207-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:15:08","name":"RISC-V: Add vmul.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071508.173207-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52347,"url":"https://patchwork.plctlab.org/api/1.2/patches/52347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnwGk4fOc3PTM_agTXXFvt=767a3-AWOfSr23Xja6K81w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T07:16:33","name":"[aarch64] Code-gen for vector initialization involving constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnwGk4fOc3PTM_agTXXFvt=767a3-AWOfSr23Xja6K81w@mail.gmail.com/mbox/"},{"id":52345,"url":"https://patchwork.plctlab.org/api/1.2/patches/52345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071811.175585-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071811.175585-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:18:11","name":"RISC-V: Add vminu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071811.175585-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52346,"url":"https://patchwork.plctlab.org/api/1.2/patches/52346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072038.177916-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072038.177916-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:20:38","name":"RISC-V: Add vmin.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072038.177916-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52348,"url":"https://patchwork.plctlab.org/api/1.2/patches/52348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072224.179317-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072224.179317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:22:24","name":"RISC-V: Add vmaxu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072224.179317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52349,"url":"https://patchwork.plctlab.org/api/1.2/patches/52349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072338.180417-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072338.180417-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:23:38","name":"RISC-V: Add vmax.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072338.180417-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52350,"url":"https://patchwork.plctlab.org/api/1.2/patches/52350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072458.181496-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072458.181496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:24:58","name":"RISC-V: Add vdivu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072458.181496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52351,"url":"https://patchwork.plctlab.org/api/1.2/patches/52351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073024.186912-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073024.186912-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:30:24","name":"RISC-V: Add vdiv.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073024.186912-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52356,"url":"https://patchwork.plctlab.org/api/1.2/patches/52356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073431.190895-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073431.190895-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:34:31","name":"RISC-V: Add vand.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073431.190895-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52357,"url":"https://patchwork.plctlab.org/api/1.2/patches/52357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073552.192133-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073552.192133-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:35:52","name":"RISC-V: Add vadd.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073552.192133-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52359,"url":"https://patchwork.plctlab.org/api/1.2/patches/52359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073716.193547-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073716.193547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:37:16","name":"RISC-V: Add binary op vx constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073716.193547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52363,"url":"https://patchwork.plctlab.org/api/1.2/patches/52363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074024.196307-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074024.196307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:40:24","name":"RISC-V: Add vxor.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074024.196307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52364,"url":"https://patchwork.plctlab.org/api/1.2/patches/52364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074207.197673-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074207.197673-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:42:07","name":"RISC-V: Add vsub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074207.197673-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52366,"url":"https://patchwork.plctlab.org/api/1.2/patches/52366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074318.199552-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074318.199552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:43:18","name":"RISC-V: Add vrsub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074318.199552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52369,"url":"https://patchwork.plctlab.org/api/1.2/patches/52369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074523.201447-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074523.201447-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:45:23","name":"RISC-V: Add vadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074523.201447-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52371,"url":"https://patchwork.plctlab.org/api/1.2/patches/52371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074911.204999-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074911.204999-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:49:11","name":"RISC-V: Add vremu.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074911.204999-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52372,"url":"https://patchwork.plctlab.org/api/1.2/patches/52372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075042.206568-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075042.206568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:50:42","name":"RISC-V: Add vrem.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075042.206568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52373,"url":"https://patchwork.plctlab.org/api/1.2/patches/52373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075154.207608-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075154.207608-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:51:54","name":"RISC-V: Add vor.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075154.207608-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52375,"url":"https://patchwork.plctlab.org/api/1.2/patches/52375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075316.208999-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075316.208999-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:53:15","name":"RISC-V: Add vmul.vx C++ API testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075316.208999-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52377,"url":"https://patchwork.plctlab.org/api/1.2/patches/52377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075713.212656-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075713.212656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:57:12","name":"RISC-V: Add vminu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075713.212656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52382,"url":"https://patchwork.plctlab.org/api/1.2/patches/52382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075830.213927-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075830.213927-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:58:30","name":"RISC-V: Add vmin.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075830.213927-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52387,"url":"https://patchwork.plctlab.org/api/1.2/patches/52387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080035.216830-1-juzhe.zhong@rivai.ai/","msgid":"<20230203080035.216830-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:00:35","name":"RISC-V: Add vmaxu.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080035.216830-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52388,"url":"https://patchwork.plctlab.org/api/1.2/patches/52388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080932.227891-1-juzhe.zhong@rivai.ai/","msgid":"<20230203080932.227891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:09:32","name":"RISC-V: Add vmax.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080932.227891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52389,"url":"https://patchwork.plctlab.org/api/1.2/patches/52389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081138.229977-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081138.229977-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:11:38","name":"RISC-V: Add vdivu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081138.229977-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52391,"url":"https://patchwork.plctlab.org/api/1.2/patches/52391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081257.231058-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081257.231058-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:12:57","name":"RISC-V: Add vdiv.vx C++ API test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081257.231058-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52392,"url":"https://patchwork.plctlab.org/api/1.2/patches/52392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081405.232059-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081405.232059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:14:05","name":"RISC-V: Add vand.vx C++ API test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081405.232059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52410,"url":"https://patchwork.plctlab.org/api/1.2/patches/52410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203085043.157321-1-aldyh@redhat.com/","msgid":"<20230203085043.157321-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-02-03T08:50:43","name":"[PR,tree-optimization/18639] Compare nonzero bits in irange with widest_int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203085043.157321-1-aldyh@redhat.com/mbox/"},{"id":52417,"url":"https://patchwork.plctlab.org/api/1.2/patches/52417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203090544.2528175-1-yunqiang.su@cipunited.com/","msgid":"<20230203090544.2528175-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-02-03T09:05:44","name":"MIPS: use arch_32/64 instead of default_mips_arch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203090544.2528175-1-yunqiang.su@cipunited.com/mbox/"},{"id":52418,"url":"https://patchwork.plctlab.org/api/1.2/patches/52418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycjcdoo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T09:15:35","name":"ifcvt: Fix regression in aarch64/fcsel_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycjcdoo.fsf@arm.com/mbox/"},{"id":52434,"url":"https://patchwork.plctlab.org/api/1.2/patches/52434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203094259.673-1-jinma@linux.alibaba.com/","msgid":"<20230203094259.673-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-03T09:42:59","name":"[v1] RISC-V: Change the generation mode of ADJUST_SP_RTX from gen_insn to gen_SET.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203094259.673-1-jinma@linux.alibaba.com/mbox/"},{"id":52455,"url":"https://patchwork.plctlab.org/api/1.2/patches/52455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-2-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:05","name":"[1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-2-guojiufu@linux.ibm.com/mbox/"},{"id":52457,"url":"https://patchwork.plctlab.org/api/1.2/patches/52457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-3-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:06","name":"[2/4] rs6000: build constant via lis;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-3-guojiufu@linux.ibm.com/mbox/"},{"id":52456,"url":"https://patchwork.plctlab.org/api/1.2/patches/52456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-4-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-4-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:07","name":"[3/4] rs6000: build constant via li/lis;rldicl/rldicr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-4-guojiufu@linux.ibm.com/mbox/"},{"id":52458,"url":"https://patchwork.plctlab.org/api/1.2/patches/52458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-5-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-5-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:08","name":"[4/4] rs6000: build constant via li/lis;rldic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-5-guojiufu@linux.ibm.com/mbox/"},{"id":52483,"url":"https://patchwork.plctlab.org/api/1.2/patches/52483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203130539.12F0A1346D@imap2.suse-dmz.suse.de/","msgid":"<20230203130539.12F0A1346D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-03T13:05:38","name":"Speedup cse_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203130539.12F0A1346D@imap2.suse-dmz.suse.de/mbox/"},{"id":52490,"url":"https://patchwork.plctlab.org/api/1.2/patches/52490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com/","msgid":"<6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com>","list_archive_url":null,"date":"2023-02-03T13:44:33","name":"openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com/mbox/"},{"id":52522,"url":"https://patchwork.plctlab.org/api/1.2/patches/52522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203140650.E72031346D@imap2.suse-dmz.suse.de/","msgid":"<20230203140650.E72031346D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-03T14:06:50","name":"Improve RTL CSE hash table hash usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203140650.E72031346D@imap2.suse-dmz.suse.de/mbox/"},{"id":52544,"url":"https://patchwork.plctlab.org/api/1.2/patches/52544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelels1w.fsf@debian/","msgid":"<87lelels1w.fsf@debian>","list_archive_url":null,"date":"2023-02-03T14:52:43","name":"[wwwdocs] document modula-2 in gcc-13/changes.html (and index.html)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelels1w.fsf@debian/mbox/"},{"id":52600,"url":"https://patchwork.plctlab.org/api/1.2/patches/52600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203175022.690671-1-xry111@xry111.site/","msgid":"<20230203175022.690671-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-02-03T17:50:22","name":"LoongArch: Generate bytepick.[wd] for suitable bit operation pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203175022.690671-1-xry111@xry111.site/mbox/"},{"id":52602,"url":"https://patchwork.plctlab.org/api/1.2/patches/52602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Nl/1HqWGOHLGK@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T18:08:23","name":"[v2] c++: wrong error with constexpr array and value-init [PR108158]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Nl/1HqWGOHLGK@redhat.com/mbox/"},{"id":52603,"url":"https://patchwork.plctlab.org/api/1.2/patches/52603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203180918.6417-1-aldyh@redhat.com/","msgid":"<20230203180918.6417-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-02-03T18:09:18","name":"range-ops: Handle undefined ranges in frange op[12]_range [PR108647]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203180918.6417-1-aldyh@redhat.com/mbox/"},{"id":52612,"url":"https://patchwork.plctlab.org/api/1.2/patches/52612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203185103.802749-1-polacek@redhat.com/","msgid":"<20230203185103.802749-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-03T18:51:03","name":"[pushed] c++: Add fixed test [PR101071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203185103.802749-1-polacek@redhat.com/mbox/"},{"id":52635,"url":"https://patchwork.plctlab.org/api/1.2/patches/52635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Zmsx+2oWM4Wvs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T18:59:39","name":"range-op: Handle op?.undefined_p () in op[12]_range of comparisons [PR108647]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Zmsx+2oWM4Wvs@tucnak/mbox/"},{"id":52634,"url":"https://patchwork.plctlab.org/api/1.2/patches/52634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91ah+TPG01V1g/A@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T19:03:36","name":"fortran: Fix up hash table usage in gfc_trans_use_stmts [PR108451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91ah+TPG01V1g/A@tucnak/mbox/"},{"id":52633,"url":"https://patchwork.plctlab.org/api/1.2/patches/52633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91bM7eeiHWZMwWI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T19:06:29","name":"ubsan: Fix up another spot that should have been BUILT_IN_UNREACHABLE_TRAPS [PR108655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91bM7eeiHWZMwWI@tucnak/mbox/"},{"id":52617,"url":"https://patchwork.plctlab.org/api/1.2/patches/52617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192011.C853A33EBF@hamza.pair.com/","msgid":"<20230203192011.C853A33EBF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T19:20:09","name":"[pushed] libstdc++: Tweak link to ABIcheck project","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192011.C853A33EBF@hamza.pair.com/mbox/"},{"id":52618,"url":"https://patchwork.plctlab.org/api/1.2/patches/52618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192645.9F17B33EE5@hamza.pair.com/","msgid":"<20230203192645.9F17B33EE5@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T19:26:44","name":"[pushed] wwwdocs: news/profiledriven: Move citeseerx.ist.psu.edu to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192645.9F17B33EE5@hamza.pair.com/mbox/"},{"id":52652,"url":"https://patchwork.plctlab.org/api/1.2/patches/52652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y916x1jPlcL5QOSE@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:21:11","name":"[1/8] PowerPC: Add -mcpu=future.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y916x1jPlcL5QOSE@toto.the-meissners.org/mbox/"},{"id":52653,"url":"https://patchwork.plctlab.org/api/1.2/patches/52653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y917UQxGb0iODU2Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:23:29","name":"[1/8] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y917UQxGb0iODU2Y@toto.the-meissners.org/mbox/"},{"id":52654,"url":"https://patchwork.plctlab.org/api/1.2/patches/52654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91702u4TmGb5Rxb@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:25:39","name":"[2/8] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91702u4TmGb5Rxb@toto.the-meissners.org/mbox/"},{"id":52656,"url":"https://patchwork.plctlab.org/api/1.2/patches/52656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918V8nqMRpVrb5Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:27:51","name":"[3/8] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918V8nqMRpVrb5Y@toto.the-meissners.org/mbox/"},{"id":52657,"url":"https://patchwork.plctlab.org/api/1.2/patches/52657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918tc2F14HMOlFh@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:29:25","name":"[4/8] PowerPC: Switch to dense math names for all MMA operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918tc2F14HMOlFh@toto.the-meissners.org/mbox/"},{"id":52658,"url":"https://patchwork.plctlab.org/api/1.2/patches/52658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y919ndtcPsz+9doP@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:33:17","name":"[6/8] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y919ndtcPsz+9doP@toto.the-meissners.org/mbox/"},{"id":52659,"url":"https://patchwork.plctlab.org/api/1.2/patches/52659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+UgGTq1udBRS6@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:36:18","name":"[7/8] Support load/store vector with right length.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+UgGTq1udBRS6@toto.the-meissners.org/mbox/"},{"id":52660,"url":"https://patchwork.plctlab.org/api/1.2/patches/52660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+hDeMysjK0B4Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:37:08","name":"[8/8] Add saturating subtract built-ins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+hDeMysjK0B4Y@toto.the-meissners.org/mbox/"},{"id":52700,"url":"https://patchwork.plctlab.org/api/1.2/patches/52700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203225724.4FEBE33EB9@hamza.pair.com/","msgid":"<20230203225724.4FEBE33EB9@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T22:57:07","name":"[pushed] libstdc++: Adjust link to pdftex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203225724.4FEBE33EB9@hamza.pair.com/mbox/"},{"id":52703,"url":"https://patchwork.plctlab.org/api/1.2/patches/52703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232115.223866-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232115.223866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:21:15","name":"RISC-V: Add unary C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232115.223866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52704,"url":"https://patchwork.plctlab.org/api/1.2/patches/52704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232240.224110-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232240.224110-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:22:40","name":"RISC-V: Add vnot.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232240.224110-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52705,"url":"https://patchwork.plctlab.org/api/1.2/patches/52705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232408.224338-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232408.224338-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:24:08","name":"RISC-V: Add vneg.v C/C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232408.224338-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52706,"url":"https://patchwork.plctlab.org/api/1.2/patches/52706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232522.224551-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232522.224551-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:25:22","name":"RISC-V: Add unary constraint tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232522.224551-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52708,"url":"https://patchwork.plctlab.org/api/1.2/patches/52708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232641.224761-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232641.224761-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:26:41","name":"RISC-V: Add vnot.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232641.224761-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52709,"url":"https://patchwork.plctlab.org/api/1.2/patches/52709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232759.224994-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232759.224994-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:27:59","name":"RISC-V: Add vneg.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232759.224994-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52715,"url":"https://patchwork.plctlab.org/api/1.2/patches/52715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204010930.263271-1-juzhe.zhong@rivai.ai/","msgid":"<20230204010930.263271-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-04T01:09:30","name":"RISC-V: Fix VSETVL PASS bug in exception handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204010930.263271-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52723,"url":"https://patchwork.plctlab.org/api/1.2/patches/52723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204031940.A747420426@pchp3.se.axis.com/","msgid":"<20230204031940.A747420426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-04T03:19:40","name":"libstdc++: Avoid use of naked int32_t in unseq_backend_simd.h, PR108672","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204031940.A747420426@pchp3.se.axis.com/mbox/"},{"id":52793,"url":"https://patchwork.plctlab.org/api/1.2/patches/52793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204165033.4026-1-ed@catmur.uk/","msgid":"<20230204165033.4026-1-ed@catmur.uk>","list_archive_url":null,"date":"2023-02-04T16:50:33","name":"[v3] emit DW_AT_name for DW_TAG_GNU_formal_parameter_pack [PR70536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204165033.4026-1-ed@catmur.uk/mbox/"},{"id":52819,"url":"https://patchwork.plctlab.org/api/1.2/patches/52819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203126.782976-1-ppalka@redhat.com/","msgid":"<20230204203126.782976-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-04T20:31:26","name":"c++: equivalence of non-dependent calls [PR107461]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203126.782976-1-ppalka@redhat.com/mbox/"},{"id":52817,"url":"https://patchwork.plctlab.org/api/1.2/patches/52817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203329.F1A8933E56@hamza.pair.com/","msgid":"<20230204203329.F1A8933E56@hamza.pair.com>","list_archive_url":null,"date":"2023-02-04T20:33:25","name":"[pushed] wwwdocs: projects/beginner: Remove traces of Interix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203329.F1A8933E56@hamza.pair.com/mbox/"},{"id":52818,"url":"https://patchwork.plctlab.org/api/1.2/patches/52818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com/","msgid":"<000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-02-04T20:33:54","name":"[DOC] Document the VEC_PERM_EXPR tree code (and minor clean-ups).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com/mbox/"},{"id":52834,"url":"https://patchwork.plctlab.org/api/1.2/patches/52834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y977ZULaCk6iP74+@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-02-05T00:42:13","name":"Enable AVX512 512bit vectors by default on Zen4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y977ZULaCk6iP74+@kam.mff.cuni.cz/mbox/"},{"id":52851,"url":"https://patchwork.plctlab.org/api/1.2/patches/52851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205014738.8722-1-juzhe.zhong@rivai.ai/","msgid":"<20230205014738.8722-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:47:38","name":"RISC-V: Add saturating Addition && Subtraction C/C++ Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205014738.8722-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52852,"url":"https://patchwork.plctlab.org/api/1.2/patches/52852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015031.9176-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015031.9176-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:50:31","name":"RISC-V: Add saturating Add && Sub vx constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015031.9176-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52853,"url":"https://patchwork.plctlab.org/api/1.2/patches/52853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015155.9413-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015155.9413-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:51:55","name":"RISC-V: Add vsadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015155.9413-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52854,"url":"https://patchwork.plctlab.org/api/1.2/patches/52854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015350.9716-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015350.9716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:53:50","name":"RISC-V: Add vsaddu.vv C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015350.9716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52855,"url":"https://patchwork.plctlab.org/api/1.2/patches/52855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015510.9957-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015510.9957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:55:10","name":"RISC-V: Add vsub.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015510.9957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52856,"url":"https://patchwork.plctlab.org/api/1.2/patches/52856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015622.10172-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015622.10172-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:56:22","name":"RISC-V: Add vssubu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015622.10172-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52857,"url":"https://patchwork.plctlab.org/api/1.2/patches/52857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015742.10412-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015742.10412-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:57:42","name":"RISC-V: Add vssubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015742.10412-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52858,"url":"https://patchwork.plctlab.org/api/1.2/patches/52858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015851.10635-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015851.10635-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:58:51","name":"RISC-V: Add vssub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015851.10635-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52859,"url":"https://patchwork.plctlab.org/api/1.2/patches/52859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015955.10847-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015955.10847-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:59:55","name":"RISC-V: Add vsaddu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015955.10847-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52860,"url":"https://patchwork.plctlab.org/api/1.2/patches/52860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205020106.11182-1-juzhe.zhong@rivai.ai/","msgid":"<20230205020106.11182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T02:01:06","name":"RISC-V: Add vsadd.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205020106.11182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52872,"url":"https://patchwork.plctlab.org/api/1.2/patches/52872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com/","msgid":"<0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:34","name":"[1/3] Allow default libc to be specified to configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com/mbox/"},{"id":52870,"url":"https://patchwork.plctlab.org/api/1.2/patches/52870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com/","msgid":"<7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:35","name":"[2/3] Add newlib and picolibc as default C library choices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com/mbox/"},{"id":52871,"url":"https://patchwork.plctlab.org/api/1.2/patches/52871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com/","msgid":"<266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:36","name":"[3/3] Add '\''--oslib='\'' option when default C library is picolibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com/mbox/"},{"id":52874,"url":"https://patchwork.plctlab.org/api/1.2/patches/52874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205081827.176653-1-juzhe.zhong@rivai.ai/","msgid":"<20230205081827.176653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:18:27","name":"RISC-V: Add vssubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205081827.176653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52875,"url":"https://patchwork.plctlab.org/api/1.2/patches/52875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082119.178471-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082119.178471-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:21:19","name":"RISC-V: Add vssub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082119.178471-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52876,"url":"https://patchwork.plctlab.org/api/1.2/patches/52876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082239.179197-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082239.179197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:22:39","name":"RISC-V: Add vsaddu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082239.179197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52877,"url":"https://patchwork.plctlab.org/api/1.2/patches/52877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082344.179805-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082344.179805-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:23:43","name":"RISC-V: Add vsadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082344.179805-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52878,"url":"https://patchwork.plctlab.org/api/1.2/patches/52878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082455.180453-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082455.180453-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:24:55","name":"RISC-V: Add vssubu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082455.180453-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52879,"url":"https://patchwork.plctlab.org/api/1.2/patches/52879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082606.181085-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082606.181085-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:26:06","name":"RISC-V: Add vssub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082606.181085-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52880,"url":"https://patchwork.plctlab.org/api/1.2/patches/52880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082757.182031-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082757.182031-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:27:57","name":"RISC-V: Add vsaddu.vx overloaded API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082757.182031-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52881,"url":"https://patchwork.plctlab.org/api/1.2/patches/52881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082927.182829-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082927.182829-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:29:27","name":"RISC-V: Add vsadd.vx C++ overloaded API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082927.182829-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52919,"url":"https://patchwork.plctlab.org/api/1.2/patches/52919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180237.F173233E8A@hamza.pair.com/","msgid":"<20230205180237.F173233E8A@hamza.pair.com>","list_archive_url":null,"date":"2023-02-05T18:02:35","name":"[pushed] wwwdocs: mirrors: Remove ftp.uvsq.fr mirror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180237.F173233E8A@hamza.pair.com/mbox/"},{"id":52920,"url":"https://patchwork.plctlab.org/api/1.2/patches/52920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180947.BA75A33E82@hamza.pair.com/","msgid":"<20230205180947.BA75A33E82@hamza.pair.com>","list_archive_url":null,"date":"2023-02-05T18:09:45","name":"[pushed] doc: Remove note on PW32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180947.BA75A33E82@hamza.pair.com/mbox/"},{"id":52990,"url":"https://patchwork.plctlab.org/api/1.2/patches/52990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050656.211738-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050656.211738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:06:56","name":"RISC-V: Add vsext/vzext C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050656.211738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52991,"url":"https://patchwork.plctlab.org/api/1.2/patches/52991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050839.214506-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050839.214506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:08:39","name":"RISC-V: Add vzext.vf8 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050839.214506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52992,"url":"https://patchwork.plctlab.org/api/1.2/patches/52992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050949.215140-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050949.215140-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:09:49","name":"RISC-V: Add vzext.vf4 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050949.215140-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52993,"url":"https://patchwork.plctlab.org/api/1.2/patches/52993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051106.215903-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051106.215903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:11:06","name":"RISC-V: Add vzext.vf2 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051106.215903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52994,"url":"https://patchwork.plctlab.org/api/1.2/patches/52994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051238.216703-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051238.216703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:12:38","name":"RISC-V: Add vsext.vf8 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051238.216703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52995,"url":"https://patchwork.plctlab.org/api/1.2/patches/52995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051504.220629-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051504.220629-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:15:04","name":"RISC-V: Add vsext.vf4 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051504.220629-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52996,"url":"https://patchwork.plctlab.org/api/1.2/patches/52996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051704.224015-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051704.224015-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:17:04","name":"RISC-V: Add vsext.vf2 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051704.224015-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52997,"url":"https://patchwork.plctlab.org/api/1.2/patches/52997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051836.225790-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051836.225790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:18:36","name":"RISC-V: Add vsext constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051836.225790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52998,"url":"https://patchwork.plctlab.org/api/1.2/patches/52998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052030.229222-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052030.229222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:20:30","name":"RISC-V: Add vzext.vf8 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052030.229222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52999,"url":"https://patchwork.plctlab.org/api/1.2/patches/52999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052327.233617-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052327.233617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:23:27","name":"RISC-V: Add vzext.vf4 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052327.233617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53000,"url":"https://patchwork.plctlab.org/api/1.2/patches/53000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052429.234436-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052429.234436-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:24:29","name":"RISC-V: Add vzext.vf2 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052429.234436-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53001,"url":"https://patchwork.plctlab.org/api/1.2/patches/53001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052547.235133-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052547.235133-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:25:47","name":"RISC-V: Add vsext C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052547.235133-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53193,"url":"https://patchwork.plctlab.org/api/1.2/patches/53193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16895-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-06T11:39:23","name":"AArch64[committed] testsuite: remove broken test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16895-tamar@arm.com/mbox/"},{"id":53194,"url":"https://patchwork.plctlab.org/api/1.2/patches/53194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206115113.47100-1-juzhe.zhong@rivai.ai/","msgid":"<20230206115113.47100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T11:51:13","name":"RISC-V: Add vmulh C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206115113.47100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53195,"url":"https://patchwork.plctlab.org/api/1.2/patches/53195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com/","msgid":"<85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com>","list_archive_url":null,"date":"2023-02-06T11:52:11","name":"libgomp: Fix reverse-offload for GOMP_MAP_TO_PSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com/mbox/"},{"id":53201,"url":"https://patchwork.plctlab.org/api/1.2/patches/53201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120519.48787-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120519.48787-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:05:19","name":"RISC-V: Add vmulhu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120519.48787-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53203,"url":"https://patchwork.plctlab.org/api/1.2/patches/53203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120652.49229-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120652.49229-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:06:52","name":"RISC-V: Add vmulhu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120652.49229-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53204,"url":"https://patchwork.plctlab.org/api/1.2/patches/53204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120842.49589-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120842.49589-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:08:42","name":"RISC-V: Add vmulhsu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120842.49589-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53210,"url":"https://patchwork.plctlab.org/api/1.2/patches/53210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120945.49797-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120945.49797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:09:45","name":"RISC-V: Add vmulhsu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120945.49797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53217,"url":"https://patchwork.plctlab.org/api/1.2/patches/53217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206124533.88066-1-juzhe.zhong@rivai.ai/","msgid":"<20230206124533.88066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:45:33","name":"RISC-V: Add vmulh.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206124533.88066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53218,"url":"https://patchwork.plctlab.org/api/1.2/patches/53218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125034.88928-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125034.88928-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:50:34","name":"RISC-V: Add vmulh.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125034.88928-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53219,"url":"https://patchwork.plctlab.org/api/1.2/patches/53219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125207.89256-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125207.89256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:52:07","name":"RISC-V: Add vmulhu.vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125207.89256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53220,"url":"https://patchwork.plctlab.org/api/1.2/patches/53220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125551.89879-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125551.89879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:55:51","name":"RISC-V: Add vmulhsu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125551.89879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53221,"url":"https://patchwork.plctlab.org/api/1.2/patches/53221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130045.92105-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130045.92105-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:00:45","name":"RISC-V: Add vmulhsu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130045.92105-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53222,"url":"https://patchwork.plctlab.org/api/1.2/patches/53222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130248.92565-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130248.92565-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:02:48","name":"RISC-V: Add vmulh.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130248.92565-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53223,"url":"https://patchwork.plctlab.org/api/1.2/patches/53223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130405.92876-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130405.92876-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:04:05","name":"RISC-V: Add vmulh.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130405.92876-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53227,"url":"https://patchwork.plctlab.org/api/1.2/patches/53227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+D7p8r66hgkCR1y@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-06T13:07:51","name":"aarch64: Fix up bfmlal lane pattern [PR104921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+D7p8r66hgkCR1y@arm.com/mbox/"},{"id":53253,"url":"https://patchwork.plctlab.org/api/1.2/patches/53253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206134723.3391910-1-qing.zhao@oracle.com/","msgid":"<20230206134723.3391910-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-06T13:47:23","name":"[V2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206134723.3391910-1-qing.zhao@oracle.com/mbox/"},{"id":53311,"url":"https://patchwork.plctlab.org/api/1.2/patches/53311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142417.2969781-1-jwakely@redhat.com/","msgid":"<20230206142417.2969781-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:24:17","name":"[committed] libstdc++: Disable building additional archives for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142417.2969781-1-jwakely@redhat.com/mbox/"},{"id":53313,"url":"https://patchwork.plctlab.org/api/1.2/patches/53313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142601.2970070-1-jwakely@redhat.com/","msgid":"<20230206142601.2970070-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:26:01","name":"[committed] libstdc++: Fix testsuite warnings about new C++23 deprecations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142601.2970070-1-jwakely@redhat.com/mbox/"},{"id":53312,"url":"https://patchwork.plctlab.org/api/1.2/patches/53312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142606.2970099-1-jwakely@redhat.com/","msgid":"<20230206142606.2970099-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:26:06","name":"[committed] libstdc++: Fix non-reserved name for template parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142606.2970099-1-jwakely@redhat.com/mbox/"},{"id":53326,"url":"https://patchwork.plctlab.org/api/1.2/patches/53326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206144752.3829182-1-andrea.corallo@arm.com/","msgid":"<20230206144752.3829182-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-02-06T14:47:52","name":"aarch64: Fix return_address_sign_ab_exception.C regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206144752.3829182-1-andrea.corallo@arm.com/mbox/"},{"id":53344,"url":"https://patchwork.plctlab.org/api/1.2/patches/53344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmttzyx1b3.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-06T15:26:24","name":"lto-wrapper: Pass through -funwind-tables and -fasynchronous-unwind-tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmttzyx1b3.fsf@suse.de/mbox/"},{"id":53442,"url":"https://patchwork.plctlab.org/api/1.2/patches/53442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com/","msgid":"<03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com>","list_archive_url":null,"date":"2023-02-06T17:22:31","name":"[committed] amdgcn: Pass -mstack-size through to runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com/mbox/"},{"id":53482,"url":"https://patchwork.plctlab.org/api/1.2/patches/53482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9557dbd4-3896-48bc-8096-d72310da093c-1675714238918@3c-app-gmx-bap04/","msgid":"","list_archive_url":null,"date":"2023-02-06T20:10:38","name":"Fortran: ASSOCIATE variables should not be TREE_STATIC [PR95107]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9557dbd4-3896-48bc-8096-d72310da093c-1675714238918@3c-app-gmx-bap04/mbox/"},{"id":53486,"url":"https://patchwork.plctlab.org/api/1.2/patches/53486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206201852.71EDF33EC1@hamza.pair.com/","msgid":"<20230206201852.71EDF33EC1@hamza.pair.com>","list_archive_url":null,"date":"2023-02-06T20:18:40","name":"[pushed] wwwdocs: projects/tree-ssa: Use our own copy of GCC Summit 2007 proceedings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206201852.71EDF33EC1@hamza.pair.com/mbox/"},{"id":53491,"url":"https://patchwork.plctlab.org/api/1.2/patches/53491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206203017.CA4B133ECF@hamza.pair.com/","msgid":"<20230206203017.CA4B133ECF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-06T20:30:15","name":"[pushed] wwwdocs: readings: Update reference for Blackfin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206203017.CA4B133ECF@hamza.pair.com/mbox/"},{"id":53701,"url":"https://patchwork.plctlab.org/api/1.2/patches/53701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061424.32134-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061424.32134-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:14:24","name":"RISC-V: Add integer widening instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061424.32134-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53702,"url":"https://patchwork.plctlab.org/api/1.2/patches/53702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061601.33379-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061601.33379-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:16:01","name":"RISC-V: Add vwsubu.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061601.33379-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53703,"url":"https://patchwork.plctlab.org/api/1.2/patches/53703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061712.33613-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061712.33613-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:17:12","name":"RISC-V: Add vwsubu.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061712.33613-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53704,"url":"https://patchwork.plctlab.org/api/1.2/patches/53704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061823.33859-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061823.33859-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:18:23","name":"RISC-V: Add vwsubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061823.33859-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53705,"url":"https://patchwork.plctlab.org/api/1.2/patches/53705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061932.34795-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061932.34795-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:19:32","name":"RISC-V: Add vwsubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061932.34795-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53706,"url":"https://patchwork.plctlab.org/api/1.2/patches/53706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062444.36747-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062444.36747-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:24:44","name":"RISC-V: Add vwsub.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062444.36747-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53707,"url":"https://patchwork.plctlab.org/api/1.2/patches/53707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062554.36985-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062554.36985-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:25:54","name":"RISC-V: Add vwsub.wv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062554.36985-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53709,"url":"https://patchwork.plctlab.org/api/1.2/patches/53709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062702.37203-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062702.37203-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:27:02","name":"RISC-V: Add vwsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062702.37203-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53711,"url":"https://patchwork.plctlab.org/api/1.2/patches/53711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062800.37431-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062800.37431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:28:00","name":"RISC-V: Add vwsub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062800.37431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53712,"url":"https://patchwork.plctlab.org/api/1.2/patches/53712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062916.38206-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062916.38206-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:29:16","name":"RISC-V: Add vwmulu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062916.38206-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53713,"url":"https://patchwork.plctlab.org/api/1.2/patches/53713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063051.38606-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063051.38606-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:30:51","name":"RISC-V: Add vwmulsu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063051.38606-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53715,"url":"https://patchwork.plctlab.org/api/1.2/patches/53715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063224.39064-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063224.39064-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:32:24","name":"RISC-V: Add vwmul C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063224.39064-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53716,"url":"https://patchwork.plctlab.org/api/1.2/patches/53716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063328.39329-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063328.39329-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:33:28","name":"RISC-V: Add vwcvt C API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063328.39329-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53717,"url":"https://patchwork.plctlab.org/api/1.2/patches/53717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063447.39828-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063447.39828-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:34:47","name":"RISC-V: Add vwaddu.w C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063447.39828-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53718,"url":"https://patchwork.plctlab.org/api/1.2/patches/53718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063549.40062-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063549.40062-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:35:49","name":"RISC-V: Add vwaddu.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063549.40062-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53719,"url":"https://patchwork.plctlab.org/api/1.2/patches/53719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063655.40286-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063655.40286-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:36:55","name":"RISC-V: Add vwadd.w C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063655.40286-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53721,"url":"https://patchwork.plctlab.org/api/1.2/patches/53721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063807.40519-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063807.40519-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:38:07","name":"RISC-V: Add vwadd.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063807.40519-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53722,"url":"https://patchwork.plctlab.org/api/1.2/patches/53722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063927.40790-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063927.40790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:39:27","name":"RISC-V: Add constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063927.40790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53723,"url":"https://patchwork.plctlab.org/api/1.2/patches/53723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064038.41137-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064038.41137-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:40:38","name":"RISC-V: Add vwsubu.w C++ api TETS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064038.41137-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53724,"url":"https://patchwork.plctlab.org/api/1.2/patches/53724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064145.41499-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064145.41499-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:41:45","name":"RISC-V: Add vwsubu.v C++ API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064145.41499-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53725,"url":"https://patchwork.plctlab.org/api/1.2/patches/53725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064305.41749-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064305.41749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:43:05","name":"RISC-V: Add vwsub.w C++ api TESTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064305.41749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53726,"url":"https://patchwork.plctlab.org/api/1.2/patches/53726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064426.43100-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064426.43100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:44:26","name":"RISC-V: Add vwsub.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064426.43100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53727,"url":"https://patchwork.plctlab.org/api/1.2/patches/53727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064535.43364-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064535.43364-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:45:35","name":"RISC-V: Add vwmulu C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064535.43364-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53729,"url":"https://patchwork.plctlab.org/api/1.2/patches/53729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064648.45113-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064648.45113-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:46:48","name":"RISC-V: Add vwmulsu.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064648.45113-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53730,"url":"https://patchwork.plctlab.org/api/1.2/patches/53730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064805.45508-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064805.45508-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:48:05","name":"RISC-V: Add vwmul.v C++ api TETS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064805.45508-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53731,"url":"https://patchwork.plctlab.org/api/1.2/patches/53731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064913.45829-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064913.45829-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:49:13","name":"RISC-V: Add vwcvt C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064913.45829-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53732,"url":"https://patchwork.plctlab.org/api/1.2/patches/53732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065045.49209-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065045.49209-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:50:45","name":"RISC-V: Add vwaddu.w c++ API TESTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065045.49209-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53733,"url":"https://patchwork.plctlab.org/api/1.2/patches/53733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065155.49564-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065155.49564-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:51:55","name":"RISC-V: Add vwaddu.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065155.49564-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53734,"url":"https://patchwork.plctlab.org/api/1.2/patches/53734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065330.50802-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065330.50802-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:53:30","name":"RISC-V: Add vwadd.w C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065330.50802-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53735,"url":"https://patchwork.plctlab.org/api/1.2/patches/53735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065426.51963-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065426.51963-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:54:25","name":"RISC-V: Add vwadd v C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065426.51963-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53764,"url":"https://patchwork.plctlab.org/api/1.2/patches/53764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207074916.116648-1-juzhe.zhong@rivai.ai/","msgid":"<20230207074916.116648-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T07:49:16","name":"RISC-V: allow vx instruction use \"zero\" as scalar register.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207074916.116648-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53775,"url":"https://patchwork.plctlab.org/api/1.2/patches/53775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+INds/30aydJlJj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T08:36:06","name":"cgraph: Handle simd clones in cgraph_node::set_{const,pure}_flag [PR106433]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+INds/30aydJlJj@tucnak/mbox/"},{"id":53778,"url":"https://patchwork.plctlab.org/api/1.2/patches/53778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IO2AZAm6WPtrQh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T08:42:00","name":"ipa-split: Don'\''t split returns_twice functions [PR106923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IO2AZAm6WPtrQh@tucnak/mbox/"},{"id":53792,"url":"https://patchwork.plctlab.org/api/1.2/patches/53792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IY7Er3m7bAxKCS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T09:25:00","name":"[committed] testsuite: Expect -Wdeprecated warning in warn/Wstrict-aliasing-bogus-union-2.C for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IY7Er3m7bAxKCS@tucnak/mbox/"},{"id":53817,"url":"https://patchwork.plctlab.org/api/1.2/patches/53817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v17oqh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-07T10:29:26","name":"lra: Replace subregs in bare uses & clobbers [PR108681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v17oqh.fsf@arm.com/mbox/"},{"id":53866,"url":"https://patchwork.plctlab.org/api/1.2/patches/53866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207124156.853506-1-vit.kabele@sysgo.com/","msgid":"<20230207124156.853506-1-vit.kabele@sysgo.com>","list_archive_url":null,"date":"2023-02-07T12:41:57","name":"Print padding size when aligning struct member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207124156.853506-1-vit.kabele@sysgo.com/mbox/"},{"id":53885,"url":"https://patchwork.plctlab.org/api/1.2/patches/53885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207132511.94760-1-guojiufu@linux.ibm.com/","msgid":"<20230207132511.94760-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-07T13:25:11","name":"rs6000: Add new patterns rlwinm with mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207132511.94760-1-guojiufu@linux.ibm.com/mbox/"},{"id":53887,"url":"https://patchwork.plctlab.org/api/1.2/patches/53887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207133828.B735D139ED@imap2.suse-dmz.suse.de/","msgid":"<20230207133828.B735D139ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-07T13:38:28","name":"tree-optimization/26854 - compile-time hog in SSA forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207133828.B735D139ED@imap2.suse-dmz.suse.de/mbox/"},{"id":53889,"url":"https://patchwork.plctlab.org/api/1.2/patches/53889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de/","msgid":"<20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-07T13:49:20","name":"tree-optimization/26854 - slow bitmap operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de/mbox/"},{"id":53918,"url":"https://patchwork.plctlab.org/api/1.2/patches/53918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com/","msgid":"<7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com>","list_archive_url":null,"date":"2023-02-07T14:07:56","name":"[pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com/mbox/"},{"id":53991,"url":"https://patchwork.plctlab.org/api/1.2/patches/53991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+KAUnyceKGxghOR@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-07T16:46:10","name":"[v4] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+KAUnyceKGxghOR@redhat.com/mbox/"},{"id":53992,"url":"https://patchwork.plctlab.org/api/1.2/patches/53992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207164847.30568-1-polacek@redhat.com/","msgid":"<20230207164847.30568-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-07T16:48:47","name":"[pushed] doc: Update -fchar8_t documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207164847.30568-1-polacek@redhat.com/mbox/"},{"id":53993,"url":"https://patchwork.plctlab.org/api/1.2/patches/53993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207165000.AC93020426@pchp3.se.axis.com/","msgid":"<20230207165000.AC93020426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-07T16:50:00","name":"testsuite: XFAIL bogus g++.dg/warn/Wstringop-overflow-4.C:144, PR106120","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207165000.AC93020426@pchp3.se.axis.com/mbox/"},{"id":54040,"url":"https://patchwork.plctlab.org/api/1.2/patches/54040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207183813.978782042C@pchp3.se.axis.com/","msgid":"<20230207183813.978782042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-07T18:38:13","name":"testsuite: Generalize check_effective_target_lra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207183813.978782042C@pchp3.se.axis.com/mbox/"},{"id":54059,"url":"https://patchwork.plctlab.org/api/1.2/patches/54059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-157fad65-8e00-4b72-b203-2166df85c671-1675798593924@3c-app-gmx-bs54/","msgid":"","list_archive_url":null,"date":"2023-02-07T19:36:33","name":"Fortran: error handling of global entity appearing in COMMON block [PR103259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-157fad65-8e00-4b72-b203-2166df85c671-1675798593924@3c-app-gmx-bs54/mbox/"},{"id":54069,"url":"https://patchwork.plctlab.org/api/1.2/patches/54069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207201959.1545413-1-apinski@marvell.com/","msgid":"<20230207201959.1545413-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-07T20:19:59","name":"[COMMITTED,GCC,12] Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207201959.1545413-1-apinski@marvell.com/mbox/"},{"id":54083,"url":"https://patchwork.plctlab.org/api/1.2/patches/54083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207211357.1226071-1-dmalcolm@redhat.com/","msgid":"<20230207211357.1226071-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-07T21:13:57","name":"[pushed] analyzer: fix -Wanalyzer-use-of-uninitialized-value false +ve on \"read\" [PR108661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207211357.1226071-1-dmalcolm@redhat.com/mbox/"},{"id":54100,"url":"https://patchwork.plctlab.org/api/1.2/patches/54100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrxum82.fsf@euler.schwinge.homeip.net/","msgid":"<874jrxum82.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-07T22:47:25","name":"Fix '\''libgomp.fortran/reverse-offload-6.f90'\'' nvptx offloading compilation (was: [Patch] libgomp: Fix reverse offload issues)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrxum82.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54142,"url":"https://patchwork.plctlab.org/api/1.2/patches/54142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023024.225500-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023024.225500-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:30:24","name":"RISC-V: Add vadc/vsbc C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023024.225500-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54143,"url":"https://patchwork.plctlab.org/api/1.2/patches/54143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023229.225998-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023229.225998-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:32:29","name":"RISC-V: Add vadc.vvm/vadc.vxm C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023229.225998-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54144,"url":"https://patchwork.plctlab.org/api/1.2/patches/54144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023430.226464-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023430.226464-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:34:30","name":"RISC-V: Add vsbc.vvm/vsbc.vxm C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023430.226464-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54155,"url":"https://patchwork.plctlab.org/api/1.2/patches/54155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024725.229946-1-juzhe.zhong@rivai.ai/","msgid":"<20230208024725.229946-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:47:25","name":"RISC-V: Add vadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024725.229946-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54149,"url":"https://patchwork.plctlab.org/api/1.2/patches/54149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024910.230380-1-juzhe.zhong@rivai.ai/","msgid":"<20230208024910.230380-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:49:10","name":"RISC-V: Add vsbc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024910.230380-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54156,"url":"https://patchwork.plctlab.org/api/1.2/patches/54156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208025527.231767-1-juzhe.zhong@rivai.ai/","msgid":"<20230208025527.231767-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:55:27","name":"[2/3] RISC-V: Add vadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208025527.231767-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54158,"url":"https://patchwork.plctlab.org/api/1.2/patches/54158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208031059.248235-1-juzhe.zhong@rivai.ai/","msgid":"<20230208031059.248235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T03:10:59","name":"RISC-V: Fix indent [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208031059.248235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54179,"url":"https://patchwork.plctlab.org/api/1.2/patches/54179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com/","msgid":"<740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com>","list_archive_url":null,"date":"2023-02-08T05:08:28","name":"[rs6000] Split TImode for logical operations in expand pass [PR100694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com/mbox/"},{"id":54261,"url":"https://patchwork.plctlab.org/api/1.2/patches/54261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Niv1eQMRe80IJM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:52:15","name":"vect-patterns: Fix up vect_widened_op_tree [PR108692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Niv1eQMRe80IJM@tucnak/mbox/"},{"id":54263,"url":"https://patchwork.plctlab.org/api/1.2/patches/54263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlel87cug.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:58:31","name":"vect: Check gather/scatter offset types [PR108316]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlel87cug.fsf@arm.com/mbox/"},{"id":54262,"url":"https://patchwork.plctlab.org/api/1.2/patches/54262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NkZcal2ZRHLBZw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:59:17","name":"c++: Mangle EXCESS_PRECISION_EXPR as fold_convert REAL_CST [PR108698]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NkZcal2ZRHLBZw@tucnak/mbox/"},{"id":54288,"url":"https://patchwork.plctlab.org/api/1.2/patches/54288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NoWtjlMx8itfDf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T09:16:10","name":"tree.def: Remove outdated comment on SAD_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NoWtjlMx8itfDf@tucnak/mbox/"},{"id":54325,"url":"https://patchwork.plctlab.org/api/1.2/patches/54325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Nu6les4SuFnrsB@guest.guest/","msgid":"","list_archive_url":null,"date":"2023-02-08T09:44:10","name":"ada: Fix musl build on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Nu6les4SuFnrsB@guest.guest/mbox/"},{"id":54381,"url":"https://patchwork.plctlab.org/api/1.2/patches/54381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208105147.214712-1-juzhe.zhong@rivai.ai/","msgid":"<20230208105147.214712-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T10:51:47","name":"RISC-V: Fix indent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208105147.214712-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54420,"url":"https://patchwork.plctlab.org/api/1.2/patches/54420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at/","msgid":"<932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-08T12:02:36","name":"gimplify size expressions in parameters for all types [PR107557] [PR108423]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at/mbox/"},{"id":54424,"url":"https://patchwork.plctlab.org/api/1.2/patches/54424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Oc9UZp29kXsJPW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T13:00:37","name":"[committed] testsuite: Fix up PR108525 test [PR108525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Oc9UZp29kXsJPW@tucnak/mbox/"},{"id":54431,"url":"https://patchwork.plctlab.org/api/1.2/patches/54431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsbg6zr3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T13:41:20","name":"[pushed] testsuite: Import objc-dg-prune in execute.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsbg6zr3.fsf@arm.com/mbox/"},{"id":54544,"url":"https://patchwork.plctlab.org/api/1.2/patches/54544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-1-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:08","name":"[pushed,wwwdocs] gcc-13: linkify some options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-1-dmalcolm@redhat.com/mbox/"},{"id":54548,"url":"https://patchwork.plctlab.org/api/1.2/patches/54548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-2-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:09","name":"[pushed,wwwdocs] gcc-13: add SARIF and other diagnostics improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-2-dmalcolm@redhat.com/mbox/"},{"id":54549,"url":"https://patchwork.plctlab.org/api/1.2/patches/54549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-3-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:10","name":"[pushed,wwwdocs] gcc-13: add -Wxor-used-as-pow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-3-dmalcolm@redhat.com/mbox/"},{"id":54545,"url":"https://patchwork.plctlab.org/api/1.2/patches/54545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-4-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:11","name":"[pushed,wwwdocs] gcc-13: add analyzer improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-4-dmalcolm@redhat.com/mbox/"},{"id":54577,"url":"https://patchwork.plctlab.org/api/1.2/patches/54577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208185021.1281451-1-dmalcolm@redhat.com/","msgid":"<20230208185021.1281451-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T18:50:21","name":"[pushed] analyzer: fix overzealous state purging with on-stack structs [PR108704]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208185021.1281451-1-dmalcolm@redhat.com/mbox/"},{"id":54588,"url":"https://patchwork.plctlab.org/api/1.2/patches/54588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208191348.1580462-1-apinski@marvell.com/","msgid":"<20230208191348.1580462-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-08T19:13:48","name":"tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208191348.1580462-1-apinski@marvell.com/mbox/"},{"id":54600,"url":"https://patchwork.plctlab.org/api/1.2/patches/54600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208204551.0D78A2040B@pchp3.se.axis.com/","msgid":"<20230208204551.0D78A2040B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-08T20:45:51","name":"testsuite: Fix asm-goto-with-outputs tests; limit to lra targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208204551.0D78A2040B@pchp3.se.axis.com/mbox/"},{"id":54601,"url":"https://patchwork.plctlab.org/api/1.2/patches/54601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205236.267934-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205236.267934-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:52:36","name":"RISC-V: Add vmadc/vsbc C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205236.267934-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54602,"url":"https://patchwork.plctlab.org/api/1.2/patches/54602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205448.269030-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205448.269030-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:54:48","name":"RISC-V: Add vmadc C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205448.269030-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54603,"url":"https://patchwork.plctlab.org/api/1.2/patches/54603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205615.269803-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205615.269803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:56:15","name":"RISC-V: Add vmsbc C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205615.269803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54604,"url":"https://patchwork.plctlab.org/api/1.2/patches/54604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205727.270442-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205727.270442-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:57:26","name":"RISC-V: Add vmadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205727.270442-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54608,"url":"https://patchwork.plctlab.org/api/1.2/patches/54608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205837.271078-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205837.271078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:58:37","name":"RISC-V: Add vmsbc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205837.271078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54618,"url":"https://patchwork.plctlab.org/api/1.2/patches/54618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208210140.391014-1-polacek@redhat.com/","msgid":"<20230208210140.391014-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-08T21:01:40","name":"c++: ICE initing lifetime-extended constexpr var [PR107079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208210140.391014-1-polacek@redhat.com/mbox/"},{"id":54619,"url":"https://patchwork.plctlab.org/api/1.2/patches/54619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208211419.1583473-1-apinski@marvell.com/","msgid":"<20230208211419.1583473-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-08T21:14:19","name":"When simplifing BFR of an insert, require a mode precision integral type (PR108688)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208211419.1583473-1-apinski@marvell.com/mbox/"},{"id":54628,"url":"https://patchwork.plctlab.org/api/1.2/patches/54628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208214533.031B633E84@hamza.pair.com/","msgid":"<20230208214533.031B633E84@hamza.pair.com>","list_archive_url":null,"date":"2023-02-08T21:45:30","name":"[pushed] doc: Change fsf.org to www.fsf.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208214533.031B633E84@hamza.pair.com/mbox/"},{"id":54637,"url":"https://patchwork.plctlab.org/api/1.2/patches/54637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB54127FF670644B5182B84459ACD89@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T23:38:21","name":"libstdc++: testsuite: Add char8_t to codecvt_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB54127FF670644B5182B84459ACD89@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":54638,"url":"https://patchwork.plctlab.org/api/1.2/patches/54638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2c1ae82-25b0-6a50-ab6a-27a19c4117df@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T23:42:40","name":"[committed] c: Update checks on constexpr pointer initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2c1ae82-25b0-6a50-ab6a-27a19c4117df@codesourcery.com/mbox/"},{"id":54669,"url":"https://patchwork.plctlab.org/api/1.2/patches/54669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+RXRJj4upKUtccH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T02:15:32","name":"[v2] c++: ICE initing lifetime-extended constexpr var [PR107079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+RXRJj4upKUtccH@redhat.com/mbox/"},{"id":54797,"url":"https://patchwork.plctlab.org/api/1.2/patches/54797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209075101.2699033E6A@hamza.pair.com/","msgid":"<20230209075101.2699033E6A@hamza.pair.com>","list_archive_url":null,"date":"2023-02-09T07:50:58","name":"[pushed] wwwdocs: readings: Update MicroBlaze Processor Reference reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209075101.2699033E6A@hamza.pair.com/mbox/"},{"id":54800,"url":"https://patchwork.plctlab.org/api/1.2/patches/54800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+SxumGulM+AgYvM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T08:41:30","name":"c++, debug: Fix up locus of DW_TAG_imported_module [PR108716]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+SxumGulM+AgYvM@tucnak/mbox/"},{"id":54804,"url":"https://patchwork.plctlab.org/api/1.2/patches/54804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com/","msgid":"<026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com>","list_archive_url":null,"date":"2023-02-09T08:56:09","name":"Fortran/OpenMP: Fix -fopenmp-simd for '\''omp assume(s)'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com/mbox/"},{"id":54827,"url":"https://patchwork.plctlab.org/api/1.2/patches/54827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmfsbfuq3a.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-09T09:48:25","name":"testsuite: adjust patterns in RISC-V tests to skip unwind table directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmfsbfuq3a.fsf@suse.de/mbox/"},{"id":54855,"url":"https://patchwork.plctlab.org/api/1.2/patches/54855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0030ad6-b152-c307-7c0c-b2d447cb51fb@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-09T10:35:37","name":"docs: add cavear for __builtin_cpu_supports","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0030ad6-b152-c307-7c0c-b2d447cb51fb@suse.cz/mbox/"},{"id":54874,"url":"https://patchwork.plctlab.org/api/1.2/patches/54874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209110617.3370-2-shiyulong@iscas.ac.cn/","msgid":"<20230209110617.3370-2-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-09T11:06:17","name":"[V1,1/1] UNRATIFIED RISC-V: Add '\''ZiCond'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209110617.3370-2-shiyulong@iscas.ac.cn/mbox/"},{"id":54878,"url":"https://patchwork.plctlab.org/api/1.2/patches/54878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edqz1437.fsf@euler.schwinge.homeip.net/","msgid":"<87edqz1437.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:16:28","name":"[og12] '\''c-c++-common/gomp/alloc-pinned-1.c'\'' -> '\''libgomp.c-c++-common/alloc-pinned-1.c'\'' (was: [PATCH 5/5] openmp: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edqz1437.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54879,"url":"https://patchwork.plctlab.org/api/1.2/patches/54879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkm313m6.fsf@euler.schwinge.homeip.net/","msgid":"<87bkm313m6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:26:41","name":"[og12] '\''{c-c++-common,gfortran.dg}/gomp/uses_allocators-*'\'' -> '\''libgomp.{c-c++-common,fortran}/uses_allocators-*'\'' (was: [PATCH, OpenMP] Implement uses_allocators clause for target regions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkm313m6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54880,"url":"https://patchwork.plctlab.org/api/1.2/patches/54880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwr136o.fsf@euler.schwinge.homeip.net/","msgid":"<877cwr136o.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:35:59","name":"[og12] '\''gfortran.dg/gomp/allocate-4.f90'\'' -> '\''libgomp.fortran/allocate-5.f90'\'' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwr136o.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54902,"url":"https://patchwork.plctlab.org/api/1.2/patches/54902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+TjBOP6PzjLP4Ua@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T12:11:48","name":"i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+TjBOP6PzjLP4Ua@tucnak/mbox/"},{"id":54948,"url":"https://patchwork.plctlab.org/api/1.2/patches/54948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com/","msgid":"<181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com>","list_archive_url":null,"date":"2023-02-09T13:26:00","name":"[1/2,v3,ping] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com/mbox/"},{"id":54949,"url":"https://patchwork.plctlab.org/api/1.2/patches/54949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com/","msgid":"<92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com>","list_archive_url":null,"date":"2023-02-09T13:26:22","name":"[2/2,v3,ping] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com/mbox/"},{"id":54984,"url":"https://patchwork.plctlab.org/api/1.2/patches/54984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142524.D3B4B38582B0@sourceware.org/","msgid":"<20230209142524.D3B4B38582B0@sourceware.org>","list_archive_url":null,"date":"2023-02-09T14:24:40","name":"target/108738 - optimize bit operations in STV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142524.D3B4B38582B0@sourceware.org/mbox/"},{"id":54985,"url":"https://patchwork.plctlab.org/api/1.2/patches/54985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142544.6C9C4385B52D@sourceware.org/","msgid":"<20230209142544.6C9C4385B52D@sourceware.org>","list_archive_url":null,"date":"2023-02-09T14:25:01","name":"target/108738 - STV bitmap operations compile-time hog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142544.6C9C4385B52D@sourceware.org/mbox/"},{"id":55042,"url":"https://patchwork.plctlab.org/api/1.2/patches/55042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Ub70j63NkbaekZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T16:14:39","name":"c++: Don'\''t defer local statics initialized with constant expressions [PR108702]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Ub70j63NkbaekZ@tucnak/mbox/"},{"id":55043,"url":"https://patchwork.plctlab.org/api/1.2/patches/55043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UdYvqGpAggRqVD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T16:20:50","name":"[wwwdocs] gcc-13/changes.html: Document C++ -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UdYvqGpAggRqVD@tucnak/mbox/"},{"id":55051,"url":"https://patchwork.plctlab.org/api/1.2/patches/55051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16909-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T17:16:40","name":"[1/2] middle-end: Fix wrong overmatching of div-bitmask by using new optabs [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16909-tamar@arm.com/mbox/"},{"id":55052,"url":"https://patchwork.plctlab.org/api/1.2/patches/55052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UrwQSz3hWz+Puo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T17:22:09","name":"[2/2] AArch64 Update div-bitmask to implement new optab instead of target hook [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UrwQSz3hWz+Puo@arm.com/mbox/"},{"id":55053,"url":"https://patchwork.plctlab.org/api/1.2/patches/55053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209173922.30789-1-polacek@redhat.com/","msgid":"<20230209173922.30789-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-09T17:39:22","name":"c++: ICE with -fno-elide-constructors and trivial fn [PR101073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209173922.30789-1-polacek@redhat.com/mbox/"},{"id":55061,"url":"https://patchwork.plctlab.org/api/1.2/patches/55061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209181722.3178411-1-ppalka@redhat.com/","msgid":"<20230209181722.3178411-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-09T18:17:22","name":"c++: sizeof(expr) in non-templated requires-expr [PR108563]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209181722.3178411-1-ppalka@redhat.com/mbox/"},{"id":55091,"url":"https://patchwork.plctlab.org/api/1.2/patches/55091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3ec97bf-eaa2-d472-3db8-74989015407e@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T20:13:43","name":"amdgcn: Add instruction patterns for vector operations on complex numbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3ec97bf-eaa2-d472-3db8-74989015407e@codesourcery.com/mbox/"},{"id":55092,"url":"https://patchwork.plctlab.org/api/1.2/patches/55092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-be314e88-a322-42a7-ad50-5058cc1eb34b-1675974508480@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2023-02-09T20:28:28","name":"[committed] Fortran: catch invalid kind in character conversion [PR69636,PR103779]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-be314e88-a322-42a7-ad50-5058cc1eb34b-1675974508480@3c-app-gmx-bap49/mbox/"},{"id":55097,"url":"https://patchwork.plctlab.org/api/1.2/patches/55097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209214544.20460-1-juzhe.zhong@rivai.ai/","msgid":"<20230209214544.20460-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:45:44","name":"RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209214544.20460-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55098,"url":"https://patchwork.plctlab.org/api/1.2/patches/55098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e445b420-0e25-3f41-7b79-dd22a2775c4d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T21:49:34","name":"[pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization (version 2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e445b420-0e25-3f41-7b79-dd22a2775c4d@redhat.com/mbox/"},{"id":55099,"url":"https://patchwork.plctlab.org/api/1.2/patches/55099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215019.22674-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215019.22674-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:50:19","name":"RISC-V: Add vnsrl C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215019.22674-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55100,"url":"https://patchwork.plctlab.org/api/1.2/patches/55100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215241.23872-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215241.23872-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:52:41","name":"RISC-V: Add vnsra C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215241.23872-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55101,"url":"https://patchwork.plctlab.org/api/1.2/patches/55101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215354.24527-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215354.24527-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:53:54","name":"RISC-V: Add vncvt C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215354.24527-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55102,"url":"https://patchwork.plctlab.org/api/1.2/patches/55102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215502.25158-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215502.25158-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:55:02","name":"RISC-V: Add vmv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215502.25158-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55104,"url":"https://patchwork.plctlab.org/api/1.2/patches/55104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215612.25818-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215612.25818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:56:12","name":"RISC-V: Add vmv.v.x C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215612.25818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55105,"url":"https://patchwork.plctlab.org/api/1.2/patches/55105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215713.26388-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215713.26388-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:57:13","name":"RISC-V: Add vmerge C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215713.26388-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55106,"url":"https://patchwork.plctlab.org/api/1.2/patches/55106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215835.27124-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215835.27124-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:58:35","name":"RISC-V: Add vnsrl C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215835.27124-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55107,"url":"https://patchwork.plctlab.org/api/1.2/patches/55107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215943.27763-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215943.27763-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:59:43","name":"RISC-V: Add vnsra C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215943.27763-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55108,"url":"https://patchwork.plctlab.org/api/1.2/patches/55108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220103.28557-1-juzhe.zhong@rivai.ai/","msgid":"<20230209220103.28557-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T22:01:03","name":"RISC-V: Add vncvt/vmv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220103.28557-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55109,"url":"https://patchwork.plctlab.org/api/1.2/patches/55109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220214.29208-1-juzhe.zhong@rivai.ai/","msgid":"<20230209220214.29208-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T22:02:14","name":"RISC-V: Add vmerge C++ API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220214.29208-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55110,"url":"https://patchwork.plctlab.org/api/1.2/patches/55110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209221530.1349166-1-dmalcolm@redhat.com/","msgid":"<20230209221530.1349166-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-09T22:15:30","name":"[pushed] analyzer: fix further overzealous state purging [PR108733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209221530.1349166-1-dmalcolm@redhat.com/mbox/"},{"id":55144,"url":"https://patchwork.plctlab.org/api/1.2/patches/55144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com/","msgid":"<5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com>","list_archive_url":null,"date":"2023-02-10T00:01:28","name":"PR tree-optimization/108520 - Add function context for querying global ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com/mbox/"},{"id":55171,"url":"https://patchwork.plctlab.org/api/1.2/patches/55171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcdf4d9-70fb-80fb-557-a0b8a4121ab0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-10T00:43:27","name":"[committed] c: Allow conversions of null pointer constants to nullptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcdf4d9-70fb-80fb-557-a0b8a4121ab0@codesourcery.com/mbox/"},{"id":55183,"url":"https://patchwork.plctlab.org/api/1.2/patches/55183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210014311.1626049-1-apinski@marvell.com/","msgid":"<20230210014311.1626049-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-10T01:43:11","name":"[COMMITTED] tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210014311.1626049-1-apinski@marvell.com/mbox/"},{"id":55190,"url":"https://patchwork.plctlab.org/api/1.2/patches/55190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com/","msgid":"<11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com>","list_archive_url":null,"date":"2023-02-10T02:38:06","name":"PR tree-optimization/108687 - Query rangers cache in readonly mode only internally","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com/mbox/"},{"id":55203,"url":"https://patchwork.plctlab.org/api/1.2/patches/55203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210025952.1887696-1-xionghuluo@tencent.com/","msgid":"<20230210025952.1887696-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-02-10T02:59:52","name":"[v4] rs6000: Fix incorrect RTL for Power LE when removing the UNSPECS [PR106069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210025952.1887696-1-xionghuluo@tencent.com/mbox/"},{"id":55209,"url":"https://patchwork.plctlab.org/api/1.2/patches/55209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210035312.1630020-1-apinski@marvell.com/","msgid":"<20230210035312.1630020-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-10T03:53:12","name":"[PATCHv4,AARCH64] Fix PR target/103100 -mstrict-align and memset on not aligned buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210035312.1630020-1-apinski@marvell.com/mbox/"},{"id":55237,"url":"https://patchwork.plctlab.org/api/1.2/patches/55237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062131.199690-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062131.199690-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:21:31","name":"RISC-V: Add fixed-point support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062131.199690-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55239,"url":"https://patchwork.plctlab.org/api/1.2/patches/55239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062446.201653-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062446.201653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:24:46","name":"RISC-V: Add vssrl.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062446.201653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55240,"url":"https://patchwork.plctlab.org/api/1.2/patches/55240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062607.202577-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062607.202577-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:26:07","name":"RISC-V: Add vssrl.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062607.202577-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55241,"url":"https://patchwork.plctlab.org/api/1.2/patches/55241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062738.203552-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062738.203552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:27:38","name":"RISC-V: Add vssra.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062738.203552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55242,"url":"https://patchwork.plctlab.org/api/1.2/patches/55242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062921.204645-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062921.204645-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:29:21","name":"RISC-V: Add vssra.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062921.204645-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55243,"url":"https://patchwork.plctlab.org/api/1.2/patches/55243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063032.205484-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063032.205484-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:30:32","name":"RISC-V: Add vsmul.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063032.205484-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55244,"url":"https://patchwork.plctlab.org/api/1.2/patches/55244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063147.206320-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063147.206320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:31:47","name":"RISC-V: Add vsmul.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063147.206320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55245,"url":"https://patchwork.plctlab.org/api/1.2/patches/55245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063258.207272-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063258.207272-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:32:58","name":"RISC-V: Add vnclip C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063258.207272-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55246,"url":"https://patchwork.plctlab.org/api/1.2/patches/55246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063426.208355-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063426.208355-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:34:26","name":"RISC-V: Add vasubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063426.208355-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55247,"url":"https://patchwork.plctlab.org/api/1.2/patches/55247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063547.209320-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063547.209320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:35:47","name":"RISC-V: Add vasubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063547.209320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55248,"url":"https://patchwork.plctlab.org/api/1.2/patches/55248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063701.210261-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063701.210261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:37:01","name":"RISC-V: Add vasub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063701.210261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55249,"url":"https://patchwork.plctlab.org/api/1.2/patches/55249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063822.211462-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063822.211462-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:38:22","name":"RISC-V: Add vasub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063822.211462-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55250,"url":"https://patchwork.plctlab.org/api/1.2/patches/55250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064141.213840-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064141.213840-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:41:41","name":"RISC-V: Add vaaddu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064141.213840-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55251,"url":"https://patchwork.plctlab.org/api/1.2/patches/55251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064248.214584-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064248.214584-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:42:48","name":"RISC-V: Add vaaddu.vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064248.214584-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55252,"url":"https://patchwork.plctlab.org/api/1.2/patches/55252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064356.215393-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064356.215393-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:43:56","name":"RISC-V: Add vaadd.vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064356.215393-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55253,"url":"https://patchwork.plctlab.org/api/1.2/patches/55253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064516.216360-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064516.216360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:45:16","name":"RISC-V: Finish fixed-point C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064516.216360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55254,"url":"https://patchwork.plctlab.org/api/1.2/patches/55254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064634.217281-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064634.217281-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:46:34","name":"RISC-V: Add vssrl.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064634.217281-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55255,"url":"https://patchwork.plctlab.org/api/1.2/patches/55255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064758.218198-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064758.218198-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:47:58","name":"RISC-V: Add vssrl.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064758.218198-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55257,"url":"https://patchwork.plctlab.org/api/1.2/patches/55257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064907.218979-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064907.218979-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:49:07","name":"RISC-V: Add vssra.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064907.218979-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55258,"url":"https://patchwork.plctlab.org/api/1.2/patches/55258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065017.219817-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065017.219817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:50:17","name":"RISC-V: Add vssra.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065017.219817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55261,"url":"https://patchwork.plctlab.org/api/1.2/patches/55261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065118.220507-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065118.220507-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:51:18","name":"RISC-V: Add vsmul.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065118.220507-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55262,"url":"https://patchwork.plctlab.org/api/1.2/patches/55262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065232.221558-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065232.221558-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:52:32","name":"RISC-V: Add vsmul.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065232.221558-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55263,"url":"https://patchwork.plctlab.org/api/1.2/patches/55263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065344.222680-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065344.222680-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:53:44","name":"RISC-V: Add vnclip C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065344.222680-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55264,"url":"https://patchwork.plctlab.org/api/1.2/patches/55264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065502.223635-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065502.223635-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:55:02","name":"RISC-V: Add vasubu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065502.223635-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55266,"url":"https://patchwork.plctlab.org/api/1.2/patches/55266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065615.224458-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065615.224458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:56:15","name":"RISC-V: Add vasubu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065615.224458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55267,"url":"https://patchwork.plctlab.org/api/1.2/patches/55267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065730.225300-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065730.225300-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:57:30","name":"RISC-V: Add vasub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065730.225300-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55270,"url":"https://patchwork.plctlab.org/api/1.2/patches/55270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065840.226106-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065840.226106-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:58:40","name":"RISC-V: Add vasub.vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065840.226106-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55271,"url":"https://patchwork.plctlab.org/api/1.2/patches/55271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065945.227003-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065945.227003-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:59:45","name":"RISC-V: Add vaaddu.vx C++ Api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065945.227003-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55272,"url":"https://patchwork.plctlab.org/api/1.2/patches/55272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070055.228117-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070055.228117-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:00:55","name":"RISC-V: Add vaaddu.vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070055.228117-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55273,"url":"https://patchwork.plctlab.org/api/1.2/patches/55273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070213.229246-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070213.229246-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:02:13","name":"RISC-V: Add vaadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070213.229246-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55274,"url":"https://patchwork.plctlab.org/api/1.2/patches/55274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070314.229955-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070314.229955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:03:14","name":"RISC-V: Add vaadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070314.229955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55363,"url":"https://patchwork.plctlab.org/api/1.2/patches/55363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101314.7636D3858C2D@sourceware.org/","msgid":"<20230210101314.7636D3858C2D@sourceware.org>","list_archive_url":null,"date":"2023-02-10T10:12:29","name":"tree-optimization/106722 - fix CD-DCE edge marking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101314.7636D3858C2D@sourceware.org/mbox/"},{"id":55366,"url":"https://patchwork.plctlab.org/api/1.2/patches/55366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrt25bb.fsf@euler.schwinge.homeip.net/","msgid":"<874jrt25bb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-10T10:16:56","name":"[GCC] In '\''contrib/config-list.mk'\'', clarify i686-symbolics-gnu to i686-gnu (was: RFA: Add makefile for cross-configuration torture test)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrt25bb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":55367,"url":"https://patchwork.plctlab.org/api/1.2/patches/55367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101937.137591-1-juzhe.zhong@rivai.ai/","msgid":"<20230210101937.137591-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T10:19:37","name":"RISC-V: Add Full '\''v'\'' extension predicate to vsmul intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101937.137591-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55387,"url":"https://patchwork.plctlab.org/api/1.2/patches/55387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210110317.01B95385B513@sourceware.org/","msgid":"<20230210110317.01B95385B513@sourceware.org>","list_archive_url":null,"date":"2023-02-10T11:02:32","name":"tree-optimization/108724 - vectorized code getting piecewise expanded","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210110317.01B95385B513@sourceware.org/mbox/"},{"id":55399,"url":"https://patchwork.plctlab.org/api/1.2/patches/55399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2adb2ed-065a-cc9b-ed6b-29b2783c6651@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-10T11:52:47","name":"[v2] OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2adb2ed-065a-cc9b-ed6b-29b2783c6651@codesourcery.com/mbox/"},{"id":55466,"url":"https://patchwork.plctlab.org/api/1.2/patches/55466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com/","msgid":"<08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com>","list_archive_url":null,"date":"2023-02-10T16:47:08","name":"[pushed,PR108500] RA: Use simple LRA for huge functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com/mbox/"},{"id":55500,"url":"https://patchwork.plctlab.org/api/1.2/patches/55500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com/","msgid":"<8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com>","list_archive_url":null,"date":"2023-02-10T17:42:06","name":"[pushed,PR108754] RA: Use caller save equivalent memory only for LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com/mbox/"},{"id":55571,"url":"https://patchwork.plctlab.org/api/1.2/patches/55571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210203550.7A24033E6E@hamza.pair.com/","msgid":"<20230210203550.7A24033E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-10T20:35:47","name":"[pushed] wwwdocs: news/profiledriven: Update a Citeseer link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210203550.7A24033E6E@hamza.pair.com/mbox/"},{"id":55611,"url":"https://patchwork.plctlab.org/api/1.2/patches/55611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-2-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:41","name":"[RFC,v1,01/10] docs: Document a canonical RTL for a conditional-zero insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-2-philipp.tomsich@vrull.eu/mbox/"},{"id":55612,"url":"https://patchwork.plctlab.org/api/1.2/patches/55612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-3-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:42","name":"[RFC,v1,02/10] RISC-V: Recognize Zicond (conditional operations) extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-3-philipp.tomsich@vrull.eu/mbox/"},{"id":55613,"url":"https://patchwork.plctlab.org/api/1.2/patches/55613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-4-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:43","name":"[RFC,v1,03/10] RISC-V: Generate czero.eqz/nez on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-4-philipp.tomsich@vrull.eu/mbox/"},{"id":55617,"url":"https://patchwork.plctlab.org/api/1.2/patches/55617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-5-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:44","name":"[RFC,v1,04/10] RISC-V: Support immediates in Zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-5-philipp.tomsich@vrull.eu/mbox/"},{"id":55616,"url":"https://patchwork.plctlab.org/api/1.2/patches/55616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-6-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:45","name":"[RFC,v1,05/10] RISC-V: Support noce_try_store_flag_mask as czero.eqz/czero.nez","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-6-philipp.tomsich@vrull.eu/mbox/"},{"id":55619,"url":"https://patchwork.plctlab.org/api/1.2/patches/55619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-7-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:46","name":"[RFC,v1,06/10] RISC-V: Recognize sign-extract + and cases for czero.eqz/nez","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-7-philipp.tomsich@vrull.eu/mbox/"},{"id":55622,"url":"https://patchwork.plctlab.org/api/1.2/patches/55622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-8-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:47","name":"[RFC,v1,07/10] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-8-philipp.tomsich@vrull.eu/mbox/"},{"id":55621,"url":"https://patchwork.plctlab.org/api/1.2/patches/55621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-9-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-9-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:48","name":"[RFC,v1,08/10] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-9-philipp.tomsich@vrull.eu/mbox/"},{"id":55614,"url":"https://patchwork.plctlab.org/api/1.2/patches/55614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-10-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-10-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:49","name":"[RFC,v1,09/10] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-10-philipp.tomsich@vrull.eu/mbox/"},{"id":55623,"url":"https://patchwork.plctlab.org/api/1.2/patches/55623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-11-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-11-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:50","name":"[RFC,v1,10/10] RISC-V: Support XVentanaCondOps extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-11-philipp.tomsich@vrull.eu/mbox/"},{"id":55626,"url":"https://patchwork.plctlab.org/api/1.2/patches/55626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210231605.1406181-1-dmalcolm@redhat.com/","msgid":"<20230210231605.1406181-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-10T23:16:05","name":"[pushed] analyzer: don'\''t warn for deref-before-check for checks in macros [PR108745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210231605.1406181-1-dmalcolm@redhat.com/mbox/"},{"id":55663,"url":"https://patchwork.plctlab.org/api/1.2/patches/55663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-2-qing.zhao@oracle.com/","msgid":"<20230211005013.789161-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-11T00:50:12","name":"[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-2-qing.zhao@oracle.com/mbox/"},{"id":55664,"url":"https://patchwork.plctlab.org/api/1.2/patches/55664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-3-qing.zhao@oracle.com/","msgid":"<20230211005013.789161-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-11T00:50:13","name":"[v3,2/2] Update documentation to clarify a GCC extension (PR77650)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-3-qing.zhao@oracle.com/mbox/"},{"id":55677,"url":"https://patchwork.plctlab.org/api/1.2/patches/55677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824276DFE4615A5C14150FAA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-11T02:51:18","name":"RISC-V: Optimize the code gen of VLM/VSM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824276DFE4615A5C14150FAA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":55742,"url":"https://patchwork.plctlab.org/api/1.2/patches/55742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080135.01ED033E4B@hamza.pair.com/","msgid":"<20230211080135.01ED033E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T08:01:33","name":"[pushed] libstdc++: Update link to \"Worst-case efficient priority queues\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080135.01ED033E4B@hamza.pair.com/mbox/"},{"id":55743,"url":"https://patchwork.plctlab.org/api/1.2/patches/55743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080856.00DD733E83@hamza.pair.com/","msgid":"<20230211080856.00DD733E83@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T08:08:55","name":"[pushed] wwwdocs: readings: Update link to RX610 landing page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080856.00DD733E83@hamza.pair.com/mbox/"},{"id":55744,"url":"https://patchwork.plctlab.org/api/1.2/patches/55744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com/","msgid":"<2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com>","list_archive_url":null,"date":"2023-02-11T08:33:46","name":"builtin-declaration-mismatch-7: fix LLP64 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com/mbox/"},{"id":55754,"url":"https://patchwork.plctlab.org/api/1.2/patches/55754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB48245075FF3DB049086E5E1BA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-11T08:46:49","name":"RISC-V: Bugfix for mode tieable of the rvv bool types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB48245075FF3DB049086E5E1BA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":55764,"url":"https://patchwork.plctlab.org/api/1.2/patches/55764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+dlcOSzUo6Jwwyg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-11T09:52:48","name":"ipa-cp: Punt for too large offsets [PR108605]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+dlcOSzUo6Jwwyg@tucnak/mbox/"},{"id":55801,"url":"https://patchwork.plctlab.org/api/1.2/patches/55801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211120050.AC42933E82@hamza.pair.com/","msgid":"<20230211120050.AC42933E82@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T12:00:48","name":"[pushed] doc: Adjust link to WG14 N965","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211120050.AC42933E82@hamza.pair.com/mbox/"},{"id":55836,"url":"https://patchwork.plctlab.org/api/1.2/patches/55836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211155934.3539787-1-stefansf@linux.ibm.com/","msgid":"<20230211155934.3539787-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-02-11T15:59:35","name":"IBM zSystems: Do not propagate scheduler state across basic blocks [PR108102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211155934.3539787-1-stefansf@linux.ibm.com/mbox/"},{"id":55842,"url":"https://patchwork.plctlab.org/api/1.2/patches/55842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211161044.3540594-1-stefansf@linux.ibm.com/","msgid":"<20230211161044.3540594-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-02-11T16:10:45","name":"IBM zSystems: Fix predicate execute_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211161044.3540594-1-stefansf@linux.ibm.com/mbox/"},{"id":55884,"url":"https://patchwork.plctlab.org/api/1.2/patches/55884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212085845.92B8833E63@hamza.pair.com/","msgid":"<20230212085845.92B8833E63@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T08:58:43","name":"[pushed] libstdc++: Change www.unix.org to unix.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212085845.92B8833E63@hamza.pair.com/mbox/"},{"id":55896,"url":"https://patchwork.plctlab.org/api/1.2/patches/55896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212113359.18239-1-kito.cheng@sifive.com/","msgid":"<20230212113359.18239-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-12T11:33:59","name":"RISC-V: Handle vlenb correctly in unwinding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212113359.18239-1-kito.cheng@sifive.com/mbox/"},{"id":55900,"url":"https://patchwork.plctlab.org/api/1.2/patches/55900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212114716.B098C33E6E@hamza.pair.com/","msgid":"<20230212114716.B098C33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T11:47:14","name":"[pushed] doc: Remove direct reference to configure/build docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212114716.B098C33E6E@hamza.pair.com/mbox/"},{"id":55965,"url":"https://patchwork.plctlab.org/api/1.2/patches/55965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at/","msgid":"<6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-12T19:10:40","name":"[C] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at/mbox/"},{"id":55980,"url":"https://patchwork.plctlab.org/api/1.2/patches/55980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212224332.B0B1233E50@hamza.pair.com/","msgid":"<20230212224332.B0B1233E50@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T22:43:30","name":"[pushed] libstdc++: Tweak link to N1780 (C++ standard)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212224332.B0B1233E50@hamza.pair.com/mbox/"},{"id":56000,"url":"https://patchwork.plctlab.org/api/1.2/patches/56000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213024332.2614540-1-guojiufu@linux.ibm.com/","msgid":"<20230213024332.2614540-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-13T02:43:32","name":"[V2] rs6000: Add new patterns rlwinm with mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213024332.2614540-1-guojiufu@linux.ibm.com/mbox/"},{"id":56045,"url":"https://patchwork.plctlab.org/api/1.2/patches/56045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213051843.2615021-1-guojiufu@linux.ibm.com/","msgid":"<20230213051843.2615021-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-13T05:18:43","name":"[V2] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213051843.2615021-1-guojiufu@linux.ibm.com/mbox/"},{"id":56059,"url":"https://patchwork.plctlab.org/api/1.2/patches/56059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074113.266716-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074113.266716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:41:13","name":"RISC-V: Add integer compare C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074113.266716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56061,"url":"https://patchwork.plctlab.org/api/1.2/patches/56061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074350.267734-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074350.267734-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:43:50","name":"RISC-V: Add vmsne.vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074350.267734-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56062,"url":"https://patchwork.plctlab.org/api/1.2/patches/56062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074525.268358-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074525.268358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:45:25","name":"RISC-V: Add vmsne vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074525.268358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56063,"url":"https://patchwork.plctlab.org/api/1.2/patches/56063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074647.268832-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074647.268832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:46:47","name":"RISC-V: Add vmslt vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074647.268832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56064,"url":"https://patchwork.plctlab.org/api/1.2/patches/56064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074810.269480-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074810.269480-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:48:10","name":"RISC-V: Add vmslt vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074810.269480-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56065,"url":"https://patchwork.plctlab.org/api/1.2/patches/56065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074914.269850-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074914.269850-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:49:14","name":"RISC-V: Add vmsle vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074914.269850-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56066,"url":"https://patchwork.plctlab.org/api/1.2/patches/56066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075037.270173-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075037.270173-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:50:37","name":"RISC-V: Add vmsle vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075037.270173-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56067,"url":"https://patchwork.plctlab.org/api/1.2/patches/56067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075149.270563-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075149.270563-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:51:49","name":"RISC-V: Add vmsgt vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075149.270563-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56068,"url":"https://patchwork.plctlab.org/api/1.2/patches/56068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075304.271252-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075304.271252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:53:04","name":"RISC-V: Add vmsgt vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075304.271252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56075,"url":"https://patchwork.plctlab.org/api/1.2/patches/56075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080303.285363-1-juzhe.zhong@rivai.ai/","msgid":"<20230213080303.285363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:03:03","name":"RISC-V: Add vmsge vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080303.285363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56076,"url":"https://patchwork.plctlab.org/api/1.2/patches/56076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080441.285645-1-juzhe.zhong@rivai.ai/","msgid":"<20230213080441.285645-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:04:41","name":"RISC-V: Add vmsge vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080441.285645-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56083,"url":"https://patchwork.plctlab.org/api/1.2/patches/56083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082112.288170-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082112.288170-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:21:12","name":"RISC-V: Add vmseq vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082112.288170-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56084,"url":"https://patchwork.plctlab.org/api/1.2/patches/56084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082229.288515-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082229.288515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:22:29","name":"RISC-V: Add vmseq vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082229.288515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56085,"url":"https://patchwork.plctlab.org/api/1.2/patches/56085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082522.289082-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082522.289082-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:25:22","name":"RISC-V: Add binop constraints tests for integer compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082522.289082-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56086,"url":"https://patchwork.plctlab.org/api/1.2/patches/56086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082629.289383-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082629.289383-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:26:29","name":"RISC-V: Add vmsne vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082629.289383-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56087,"url":"https://patchwork.plctlab.org/api/1.2/patches/56087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082734.289679-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082734.289679-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:27:34","name":"RISC-V: Add vmsne vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082734.289679-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56088,"url":"https://patchwork.plctlab.org/api/1.2/patches/56088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082838.289977-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082838.289977-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:28:38","name":"RISC-V: Add vmslt vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082838.289977-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56089,"url":"https://patchwork.plctlab.org/api/1.2/patches/56089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082954.290285-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082954.290285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:29:54","name":"RISC-V: Add vmslt vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082954.290285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56090,"url":"https://patchwork.plctlab.org/api/1.2/patches/56090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083109.290640-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083109.290640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:31:09","name":"RISC-V: Add vmsle vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083109.290640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56091,"url":"https://patchwork.plctlab.org/api/1.2/patches/56091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083223.290961-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083223.290961-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:32:23","name":"RISC-V: Add vmsle vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083223.290961-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56092,"url":"https://patchwork.plctlab.org/api/1.2/patches/56092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083334.291298-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083334.291298-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:33:33","name":"RISC-V: Add vmsgt vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083334.291298-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56093,"url":"https://patchwork.plctlab.org/api/1.2/patches/56093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083431.291581-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083431.291581-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:34:31","name":"RISC-V: Add vmsgt vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083431.291581-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56094,"url":"https://patchwork.plctlab.org/api/1.2/patches/56094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083539.291955-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083539.291955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:35:39","name":"RISC-V: Add vmsge vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083539.291955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56095,"url":"https://patchwork.plctlab.org/api/1.2/patches/56095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083657.292491-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083657.292491-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:36:57","name":"RISC-V: Add vmsge vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083657.292491-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56096,"url":"https://patchwork.plctlab.org/api/1.2/patches/56096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083755.292800-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083755.292800-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:37:55","name":"RISC-V: Add vmseq vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083755.292800-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56097,"url":"https://patchwork.plctlab.org/api/1.2/patches/56097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083903.293123-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083903.293123-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:39:03","name":"RISC-V: Add vmseq vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083903.293123-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56109,"url":"https://patchwork.plctlab.org/api/1.2/patches/56109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz/","msgid":"<43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz>","list_archive_url":null,"date":"2023-02-13T09:16:32","name":"[(pushed)] docs: document new param","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz/mbox/"},{"id":56129,"url":"https://patchwork.plctlab.org/api/1.2/patches/56129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213093624.946572-1-claziss@gmail.com/","msgid":"<20230213093624.946572-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-02-13T09:36:24","name":"[committed] arc: Don'\''t use millicode thunks unless asked for.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213093624.946572-1-claziss@gmail.com/mbox/"},{"id":56165,"url":"https://patchwork.plctlab.org/api/1.2/patches/56165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213103853.502212-1-xry111@xry111.site/","msgid":"<20230213103853.502212-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-02-13T10:38:53","name":"LoongArch: Fix multiarch tuple canonization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213103853.502212-1-xry111@xry111.site/mbox/"},{"id":56168,"url":"https://patchwork.plctlab.org/api/1.2/patches/56168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta61hzw2t.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T10:41:30","name":"[Ping] ifcvt: Fix regression in aarch64/fcsel_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta61hzw2t.fsf@arm.com/mbox/"},{"id":56186,"url":"https://patchwork.plctlab.org/api/1.2/patches/56186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzg9hyhce.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T10:45:05","name":"[Ping^3] gomp: Various fixes for SVE types [PR101018]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzg9hyhce.fsf_-_@arm.com/mbox/"},{"id":56194,"url":"https://patchwork.plctlab.org/api/1.2/patches/56194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-2-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:34","name":"[1/5] RISC-V: Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-2-shihua@iscas.ac.cn/mbox/"},{"id":56200,"url":"https://patchwork.plctlab.org/api/1.2/patches/56200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-3-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:35","name":"[2/5] RISC-V: Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-3-shihua@iscas.ac.cn/mbox/"},{"id":56199,"url":"https://patchwork.plctlab.org/api/1.2/patches/56199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-4-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:36","name":"[3/5] RISC-V: Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-4-shihua@iscas.ac.cn/mbox/"},{"id":56192,"url":"https://patchwork.plctlab.org/api/1.2/patches/56192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-5-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:37","name":"[4/5] RISC-V: Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-5-shihua@iscas.ac.cn/mbox/"},{"id":56196,"url":"https://patchwork.plctlab.org/api/1.2/patches/56196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-6-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:38","name":"[5/5] RISC-V: Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-6-shihua@iscas.ac.cn/mbox/"},{"id":56201,"url":"https://patchwork.plctlab.org/api/1.2/patches/56201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213110058.0C9B61391B@imap2.suse-dmz.suse.de/","msgid":"<20230213110058.0C9B61391B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-13T11:00:56","name":"tree-optimization/108691 - indirect calls to setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213110058.0C9B61391B@imap2.suse-dmz.suse.de/mbox/"},{"id":56329,"url":"https://patchwork.plctlab.org/api/1.2/patches/56329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213145637.C023C138E6@imap2.suse-dmz.suse.de/","msgid":"<20230213145637.C023C138E6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-13T14:56:37","name":"tree-optimization/28614 - high FRE time for gcc.c-torture/compile/20001226-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213145637.C023C138E6@imap2.suse-dmz.suse.de/mbox/"},{"id":56397,"url":"https://patchwork.plctlab.org/api/1.2/patches/56397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213170619.28996-1-polacek@redhat.com/","msgid":"<20230213170619.28996-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:06:19","name":"c++: fix ICE in joust_maybe_elide_copy [PR106675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213170619.28996-1-polacek@redhat.com/mbox/"},{"id":56398,"url":"https://patchwork.plctlab.org/api/1.2/patches/56398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-1-ppalka@redhat.com/","msgid":"<20230213172340.849204-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:23:39","name":"[1/2] c++: factor out TYPENAME_TYPE substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-1-ppalka@redhat.com/mbox/"},{"id":56399,"url":"https://patchwork.plctlab.org/api/1.2/patches/56399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-2-ppalka@redhat.com/","msgid":"<20230213172340.849204-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:23:40","name":"[2/2] c++: TYPENAME_TYPE lookup ignoring non-types [PR107773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-2-ppalka@redhat.com/mbox/"},{"id":56563,"url":"https://patchwork.plctlab.org/api/1.2/patches/56563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cz6db60m.fsf@aarsen.me/","msgid":"<86cz6db60m.fsf@aarsen.me>","list_archive_url":null,"date":"2023-02-13T18:51:28","name":"Ping: [PATCH+wwwdocs 0/8] A small Texinfo refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cz6db60m.fsf@aarsen.me/mbox/"},{"id":56489,"url":"https://patchwork.plctlab.org/api/1.2/patches/56489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213192700.2013187-1-rasmus.villemoes@prevas.dk/","msgid":"<20230213192700.2013187-1-rasmus.villemoes@prevas.dk>","list_archive_url":null,"date":"2023-02-13T19:27:00","name":"apply debug-remap to file names in .su files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213192700.2013187-1-rasmus.villemoes@prevas.dk/mbox/"},{"id":56490,"url":"https://patchwork.plctlab.org/api/1.2/patches/56490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aQe7tPDge5-3kXgBYSEcJz3XDqR2ZGkTwWRHMFXzyv0A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T19:27:43","name":"i386: Relax extract location operand mode requirements [PR108516]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aQe7tPDge5-3kXgBYSEcJz3XDqR2ZGkTwWRHMFXzyv0A@mail.gmail.com/mbox/"},{"id":56536,"url":"https://patchwork.plctlab.org/api/1.2/patches/56536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b21a2d3f-8d44-7311-ed3d-b06f70d9b7d4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T20:28:15","name":"libgomp: Fix '\''target enter data'\'' with always pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b21a2d3f-8d44-7311-ed3d-b06f70d9b7d4@codesourcery.com/mbox/"},{"id":56548,"url":"https://patchwork.plctlab.org/api/1.2/patches/56548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com/","msgid":"<3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com>","list_archive_url":null,"date":"2023-02-13T21:12:51","name":"[pushed,PR108774] RA: Clear reg equiv caller_save_p flag when clearing defined_p flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com/mbox/"},{"id":56552,"url":"https://patchwork.plctlab.org/api/1.2/patches/56552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-4f91f3ff-1a0f-441e-ae8b-8beffd701aa9-1676322798018@3c-app-gmx-bap61/","msgid":"","list_archive_url":null,"date":"2023-02-13T21:13:18","name":"[committed] Fortran: error recovery after invalid use of CLASS variable [PR103475]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-4f91f3ff-1a0f-441e-ae8b-8beffd701aa9-1676322798018@3c-app-gmx-bap61/mbox/"},{"id":56589,"url":"https://patchwork.plctlab.org/api/1.2/patches/56589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213223122.9F67D33EAC@hamza.pair.com/","msgid":"<20230213223122.9F67D33EAC@hamza.pair.com>","list_archive_url":null,"date":"2023-02-13T22:31:14","name":"[pushed] libstdc++: Adjust \"The Component Object Model\" reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213223122.9F67D33EAC@hamza.pair.com/mbox/"},{"id":56609,"url":"https://patchwork.plctlab.org/api/1.2/patches/56609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214023346.2A85B20423@pchp3.se.axis.com/","msgid":"<20230214023346.2A85B20423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-14T02:33:46","name":"debug: Support \"phrs\" for dumping a HARD_REG_SET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214023346.2A85B20423@pchp3.se.axis.com/mbox/"},{"id":56775,"url":"https://patchwork.plctlab.org/api/1.2/patches/56775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tMqCFYVNL6xxYq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-14T08:56:08","name":"asan: Add --param=asan-kernel-mem-intrinsic-prefix= [PR108777]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tMqCFYVNL6xxYq@tucnak/mbox/"},{"id":56789,"url":"https://patchwork.plctlab.org/api/1.2/patches/56789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214092404.78801-1-juzhe.zhong@rivai.ai/","msgid":"<20230214092404.78801-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T09:24:04","name":"RISC-V: Finish all integer C/C++ intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214092404.78801-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56806,"url":"https://patchwork.plctlab.org/api/1.2/patches/56806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6vo8u8u.fsf@euler.schwinge.homeip.net/","msgid":"<87h6vo8u8u.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T09:35:29","name":"nvptx: Adjust '\''scan-assembler'\'' in '\''gfortran.dg/weak-1.f90'\'' (was: Support for NOINLINE attribute)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6vo8u8u.fsf@euler.schwinge.homeip.net/mbox/"},{"id":56837,"url":"https://patchwork.plctlab.org/api/1.2/patches/56837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7b5aee2-0203-dc57-0328-e3989e7ecc8e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-14T10:42:21","name":"More LLP64 fixes and __PIC__ values fixes for PE targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7b5aee2-0203-dc57-0328-e3989e7ecc8e@gmail.com/mbox/"},{"id":56885,"url":"https://patchwork.plctlab.org/api/1.2/patches/56885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tu4LN1R2FYe02y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-14T11:22:33","name":"c++: Add testcases from some Issaquah DRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tu4LN1R2FYe02y@tucnak/mbox/"},{"id":56886,"url":"https://patchwork.plctlab.org/api/1.2/patches/56886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214114918.3E86413A21@imap2.suse-dmz.suse.de/","msgid":"<20230214114918.3E86413A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T11:49:17","name":"tree-optimization/108782 - nested first order recurrence vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214114918.3E86413A21@imap2.suse-dmz.suse.de/mbox/"},{"id":56904,"url":"https://patchwork.plctlab.org/api/1.2/patches/56904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3481520.iIbC2pHGDl@fomalhaut/","msgid":"<3481520.iIbC2pHGDl@fomalhaut>","list_archive_url":null,"date":"2023-02-14T12:42:14","name":"Fix small regression in Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3481520.iIbC2pHGDl@fomalhaut/mbox/"},{"id":56905,"url":"https://patchwork.plctlab.org/api/1.2/patches/56905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6voz9tl.fsf@euler.schwinge.homeip.net/","msgid":"<87h6voz9tl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T12:54:30","name":"[og12] In '\''libgomp/allocator.c:omp_realloc'\'', route '\''free'\'' through '\''MEMSPACE_FREE'\'' (was: [PATCH] libgomp, OpenMP, nvptx: Low-latency memory allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6voz9tl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":56957,"url":"https://patchwork.plctlab.org/api/1.2/patches/56957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134405.129401-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134405.129401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:44:05","name":"RISC-V: Add vwmacc vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134405.129401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56965,"url":"https://patchwork.plctlab.org/api/1.2/patches/56965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134612.140930-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134612.140930-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:46:12","name":"RISC-V: Add vwmacc vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134612.140930-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56967,"url":"https://patchwork.plctlab.org/api/1.2/patches/56967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134826.144016-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134826.144016-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:48:26","name":"RISC-V: Add vnmsub vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134826.144016-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56968,"url":"https://patchwork.plctlab.org/api/1.2/patches/56968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135300.145205-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135300.145205-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:53:00","name":"RISC-V: Add vnmsub vx rv64 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135300.145205-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56969,"url":"https://patchwork.plctlab.org/api/1.2/patches/56969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135417.145612-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135417.145612-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:54:17","name":"RISC-V: Add vnmsub vx rv32 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135417.145612-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56970,"url":"https://patchwork.plctlab.org/api/1.2/patches/56970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135612.146539-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135612.146539-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:56:12","name":"RISC-V: Add vnmsac rv64 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135612.146539-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56971,"url":"https://patchwork.plctlab.org/api/1.2/patches/56971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135712.146813-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135712.146813-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:57:12","name":"RISC-V: Add vnmsac vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135712.146813-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56972,"url":"https://patchwork.plctlab.org/api/1.2/patches/56972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135829.147123-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135829.147123-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:58:29","name":"RISC-V: Add vnmsac vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135829.147123-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56973,"url":"https://patchwork.plctlab.org/api/1.2/patches/56973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135957.147487-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135957.147487-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:59:57","name":"RISC-V: Add vmadd vx rv64 c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135957.147487-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56974,"url":"https://patchwork.plctlab.org/api/1.2/patches/56974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140114.147866-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140114.147866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:01:14","name":"RISC-V: Add vmadd vx c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140114.147866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56976,"url":"https://patchwork.plctlab.org/api/1.2/patches/56976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140234.148185-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140234.148185-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:02:34","name":"RISC-V: Add vmadd vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140234.148185-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56977,"url":"https://patchwork.plctlab.org/api/1.2/patches/56977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140342.148470-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140342.148470-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:03:42","name":"RISC-V: Add vmacc vx c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140342.148470-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56979,"url":"https://patchwork.plctlab.org/api/1.2/patches/56979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140456.148783-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140456.148783-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:04:56","name":"RISC-V: Add vmacc vx rv32 c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140456.148783-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56989,"url":"https://patchwork.plctlab.org/api/1.2/patches/56989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140604.149066-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140604.149066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:06:04","name":"RISC-V: Add vmacc vv c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140604.149066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56991,"url":"https://patchwork.plctlab.org/api/1.2/patches/56991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140609.149094-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140609.149094-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:06:09","name":"RISC-V: Add vmacc vv c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140609.149094-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56996,"url":"https://patchwork.plctlab.org/api/1.2/patches/56996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140813.149624-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140813.149624-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:08:13","name":"RISC-V: Add ternary constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140813.149624-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57014,"url":"https://patchwork.plctlab.org/api/1.2/patches/57014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141236.150709-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141236.150709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:12:36","name":"RISC-V: Add vwmacc vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141236.150709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57015,"url":"https://patchwork.plctlab.org/api/1.2/patches/57015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141423.151090-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141423.151090-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:14:23","name":"RISC-V: Add vwmacc vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141423.151090-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57017,"url":"https://patchwork.plctlab.org/api/1.2/patches/57017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141559.151450-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141559.151450-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:15:59","name":"RISC-V: Add vnmsub vx rv64 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141559.151450-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57018,"url":"https://patchwork.plctlab.org/api/1.2/patches/57018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141718.151801-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141718.151801-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:17:18","name":"RISC-V: Add vnmsub vx rv32 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141718.151801-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57019,"url":"https://patchwork.plctlab.org/api/1.2/patches/57019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141823.152082-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141823.152082-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:18:23","name":"RISC-V: Add vnmsub vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141823.152082-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57020,"url":"https://patchwork.plctlab.org/api/1.2/patches/57020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142137.152713-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142137.152713-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:21:37","name":"RISC-V: Add vnmsac vx rv64 C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142137.152713-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57021,"url":"https://patchwork.plctlab.org/api/1.2/patches/57021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142154.09F8D13A21@imap2.suse-dmz.suse.de/","msgid":"<20230214142154.09F8D13A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T14:21:53","name":"Speedup DF dataflow solver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142154.09F8D13A21@imap2.suse-dmz.suse.de/mbox/"},{"id":57022,"url":"https://patchwork.plctlab.org/api/1.2/patches/57022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142239.152985-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142239.152985-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:22:39","name":"RISC-V: Add vnmsac vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142239.152985-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57023,"url":"https://patchwork.plctlab.org/api/1.2/patches/57023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142355.153302-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142355.153302-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:23:55","name":"RISC-V: Add vnmsac vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142355.153302-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57024,"url":"https://patchwork.plctlab.org/api/1.2/patches/57024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142535.153676-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142535.153676-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:25:35","name":"RISC-V: Add vmadd vx C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142535.153676-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57027,"url":"https://patchwork.plctlab.org/api/1.2/patches/57027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142652.153982-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142652.153982-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:26:52","name":"RISC-V: Add vmadd vx c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142652.153982-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57028,"url":"https://patchwork.plctlab.org/api/1.2/patches/57028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142825.154358-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142825.154358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:28:24","name":"RISC-V: Add vmadd vv c++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142825.154358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57035,"url":"https://patchwork.plctlab.org/api/1.2/patches/57035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142936.154660-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142936.154660-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:29:36","name":"RISC-V: Add vmacc vx rv32 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142936.154660-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57040,"url":"https://patchwork.plctlab.org/api/1.2/patches/57040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143039.154969-1-juzhe.zhong@rivai.ai/","msgid":"<20230214143039.154969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:30:39","name":"RISC-V: Add vmacc vx rv64 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143039.154969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57044,"url":"https://patchwork.plctlab.org/api/1.2/patches/57044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143259.155429-1-juzhe.zhong@rivai.ai/","msgid":"<20230214143259.155429-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:32:59","name":"RISC-V: Add vmacc vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143259.155429-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57059,"url":"https://patchwork.plctlab.org/api/1.2/patches/57059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1p0gv37.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-14T14:50:04","name":"ipa: Avoid IPA confusing scalar values and single-field aggregates (PR 108679)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1p0gv37.fsf@suse.cz/mbox/"},{"id":57060,"url":"https://patchwork.plctlab.org/api/1.2/patches/57060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214145053.AB8B113A21@imap2.suse-dmz.suse.de/","msgid":"<20230214145053.AB8B113A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T14:50:53","name":"More DF worklist solver improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214145053.AB8B113A21@imap2.suse-dmz.suse.de/mbox/"},{"id":57063,"url":"https://patchwork.plctlab.org/api/1.2/patches/57063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214150449.249991-1-juzhe.zhong@rivai.ai/","msgid":"<20230214150449.249991-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T15:04:49","name":"RISC-V: Replace simm32_p with immediate_operand (Pmode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214150449.249991-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57065,"url":"https://patchwork.plctlab.org/api/1.2/patches/57065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de/","msgid":"<20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T15:18:30","name":"Improve VN PHI hash table handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":57066,"url":"https://patchwork.plctlab.org/api/1.2/patches/57066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214152025.2226E138E3@imap2.suse-dmz.suse.de/","msgid":"<20230214152025.2226E138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T15:20:24","name":"Fix possible sanopt compile-time hog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214152025.2226E138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":57078,"url":"https://patchwork.plctlab.org/api/1.2/patches/57078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214153903.27974-1-juzhe.zhong@rivai.ai/","msgid":"<20230214153903.27974-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T15:39:03","name":"RISC-V: Remove \"extern??? for namespace [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214153903.27974-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57186,"url":"https://patchwork.plctlab.org/api/1.2/patches/57186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214195153.8445-1-david.faust@oracle.com/","msgid":"<20230214195153.8445-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-02-14T19:51:53","name":"bpf: fix memory constraint of ldx/stx instructions [PR108790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214195153.8445-1-david.faust@oracle.com/mbox/"},{"id":57210,"url":"https://patchwork.plctlab.org/api/1.2/patches/57210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214212510.5EB7133E9C@hamza.pair.com/","msgid":"<20230214212510.5EB7133E9C@hamza.pair.com>","list_archive_url":null,"date":"2023-02-14T21:25:07","name":"[pushed] libstdc++: Update an open-std.org link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214212510.5EB7133E9C@hamza.pair.com/mbox/"},{"id":57243,"url":"https://patchwork.plctlab.org/api/1.2/patches/57243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214222733.183219-1-juzhe.zhong@rivai.ai/","msgid":"<20230214222733.183219-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T22:27:33","name":"RISC-V: Rearrange the organization of declarations of RVV intrinsics [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214222733.183219-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57246,"url":"https://patchwork.plctlab.org/api/1.2/patches/57246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sff73m0n.fsf@euler.schwinge.homeip.net/","msgid":"<87sff73m0n.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T22:44:24","name":"[og12] Address cast to pointer from integer of different size in '\''libgomp/target.c:gomp_target_rev'\'' (was: [OG12][committed] openmp: Add support for the '\''present'\'' modifier)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sff73m0n.fsf@euler.schwinge.homeip.net/mbox/"},{"id":57272,"url":"https://patchwork.plctlab.org/api/1.2/patches/57272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214231820.283957-1-juzhe.zhong@rivai.ai/","msgid":"<20230214231820.283957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T23:18:20","name":"RISC-V: Move saturating add/subtract md pattern location [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214231820.283957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57291,"url":"https://patchwork.plctlab.org/api/1.2/patches/57291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215001814.F3BAB2042C@pchp3.se.axis.com/","msgid":"<20230215001814.F3BAB2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T00:18:14","name":"gen_reload: Correct parameter for fatal_insn call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215001814.F3BAB2042C@pchp3.se.axis.com/mbox/"},{"id":57335,"url":"https://patchwork.plctlab.org/api/1.2/patches/57335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215013828.7043633EA3@hamza.pair.com/","msgid":"<20230215013828.7043633EA3@hamza.pair.com>","list_archive_url":null,"date":"2023-02-15T01:38:25","name":"[pushed] wwwdocs: news/profiledriven: Update a link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215013828.7043633EA3@hamza.pair.com/mbox/"},{"id":57351,"url":"https://patchwork.plctlab.org/api/1.2/patches/57351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215034815.1276847-1-polacek@redhat.com/","msgid":"<20230215034815.1276847-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-15T03:48:15","name":"warn-access: wrong -Wdangling-pointer with labels [PR106080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215034815.1276847-1-polacek@redhat.com/mbox/"},{"id":57423,"url":"https://patchwork.plctlab.org/api/1.2/patches/57423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz/","msgid":"<7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz>","list_archive_url":null,"date":"2023-02-15T08:39:11","name":"[(pushed)] docs: document new --param=asan-kernel-mem-intrinsic-prefix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz/mbox/"},{"id":57424,"url":"https://patchwork.plctlab.org/api/1.2/patches/57424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215083954.274514-1-juzhe.zhong@rivai.ai/","msgid":"<20230215083954.274514-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-15T08:39:54","name":"RISC-V: Normalize SEW = 64 handling into a simplified function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215083954.274514-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57436,"url":"https://patchwork.plctlab.org/api/1.2/patches/57436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+yjZX54gxCaUTfY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-15T09:18:29","name":"[committed] powerpc: Fix up expansion for WIDEN_MULT_PLUS_EXPR [PR108787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+yjZX54gxCaUTfY@tucnak/mbox/"},{"id":57460,"url":"https://patchwork.plctlab.org/api/1.2/patches/57460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215100202.lrjn2dpk2xuwht6a@lug-owl.de/","msgid":"<20230215100202.lrjn2dpk2xuwht6a@lug-owl.de>","list_archive_url":null,"date":"2023-02-15T10:02:02","name":"bpf: Fix double whitespace warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215100202.lrjn2dpk2xuwht6a@lug-owl.de/mbox/"},{"id":57469,"url":"https://patchwork.plctlab.org/api/1.2/patches/57469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7cwjted9.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-15T10:25:06","name":"Update baseline symbols for aarch64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7cwjted9.fsf@suse.de/mbox/"},{"id":57478,"url":"https://patchwork.plctlab.org/api/1.2/patches/57478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215105411.30966-1-iain@sandoe.co.uk/","msgid":"<20230215105411.30966-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-02-15T10:54:11","name":"[pushed] testsuite, objective-c: Fix a testcase on Windows.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215105411.30966-1-iain@sandoe.co.uk/mbox/"},{"id":57484,"url":"https://patchwork.plctlab.org/api/1.2/patches/57484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215112231.45341-1-juzhe.zhong@rivai.ai/","msgid":"<20230215112231.45341-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-15T11:22:31","name":"RISC-V: Rename tu_preds to none_tu_preds [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215112231.45341-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57546,"url":"https://patchwork.plctlab.org/api/1.2/patches/57546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215133750.15537-1-jwakely@redhat.com/","msgid":"<20230215133750.15537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-15T13:37:50","name":"doc: Suggest fix for -Woverloaded-virtual warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215133750.15537-1-jwakely@redhat.com/mbox/"},{"id":57552,"url":"https://patchwork.plctlab.org/api/1.2/patches/57552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com/","msgid":"<1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com>","list_archive_url":null,"date":"2023-02-15T13:44:08","name":"harden-sls-6.c: fix warning on LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com/mbox/"},{"id":57554,"url":"https://patchwork.plctlab.org/api/1.2/patches/57554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+ziHx6/8SB4k+4J@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T13:46:07","name":"[v2] warn-access: wrong -Wdangling-pointer with labels [PR106080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+ziHx6/8SB4k+4J@redhat.com/mbox/"},{"id":57596,"url":"https://patchwork.plctlab.org/api/1.2/patches/57596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8221231.NyiUUSuA9g@fomalhaut/","msgid":"<8221231.NyiUUSuA9g@fomalhaut>","list_archive_url":null,"date":"2023-02-15T15:24:09","name":"Fix PR target/90458","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8221231.NyiUUSuA9g@fomalhaut/mbox/"},{"id":57599,"url":"https://patchwork.plctlab.org/api/1.2/patches/57599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZJEcH-mwcyxupcaoCmnUyhF9-5b7F5mFa-4g6LxXH_Rg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T15:28:09","name":"i386: Rename extr_register_operand to int248_register_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZJEcH-mwcyxupcaoCmnUyhF9-5b7F5mFa-4g6LxXH_Rg@mail.gmail.com/mbox/"},{"id":57600,"url":"https://patchwork.plctlab.org/api/1.2/patches/57600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YsV0ROTJxutL+pn4CAwf5xFO02V7t76otKYUqhjWs8Aw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T15:32:47","name":"testsuite/i386: Cleanup target selectors in i386 target directory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YsV0ROTJxutL+pn4CAwf5xFO02V7t76otKYUqhjWs8Aw@mail.gmail.com/mbox/"},{"id":57601,"url":"https://patchwork.plctlab.org/api/1.2/patches/57601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215153432.0663D2042E@pchp3.se.axis.com/","msgid":"<20230215153432.0663D2042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T15:34:32","name":"reload: Handle generating reloads that also clobbers flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215153432.0663D2042E@pchp3.se.axis.com/mbox/"},{"id":57637,"url":"https://patchwork.plctlab.org/api/1.2/patches/57637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com/","msgid":"<86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com>","list_archive_url":null,"date":"2023-02-15T17:05:52","name":"PR tree-optimization/108697 - Create a lazy ssa_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com/mbox/"},{"id":57680,"url":"https://patchwork.plctlab.org/api/1.2/patches/57680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkluzr8q.fsf@euler.schwinge.homeip.net/","msgid":"<87bkluzr8q.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-15T19:02:45","name":"[og12] Fix '\''libgomp.{c-c++-common,fortran}/target-present-*'\'' test cases (was: [OG12][committed] openmp: Add support for the '\''present'\'' modifier)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkluzr8q.fsf@euler.schwinge.homeip.net/mbox/"},{"id":57683,"url":"https://patchwork.plctlab.org/api/1.2/patches/57683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215191957.F12532042E@pchp3.se.axis.com/","msgid":"<20230215191957.F12532042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T19:19:57","name":"testsuite: Handle \"packed\" targets in c-c++-common/auto-init-7.c and -8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215191957.F12532042E@pchp3.se.axis.com/mbox/"},{"id":57704,"url":"https://patchwork.plctlab.org/api/1.2/patches/57704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215195549.1677156-1-dmalcolm@redhat.com/","msgid":"<20230215195549.1677156-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-15T19:55:49","name":"[pushed] analyzer: fix uninit false +ves [PR108664, PR108666, PR108725]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215195549.1677156-1-dmalcolm@redhat.com/mbox/"},{"id":57713,"url":"https://patchwork.plctlab.org/api/1.2/patches/57713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bBUsXh5atfAo=pYB7vafnqZ00tN81KG+32B0KBVy_qTQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T20:37:06","name":"i386: Relax extract location operand mode requirements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bBUsXh5atfAo=pYB7vafnqZ00tN81KG+32B0KBVy_qTQ@mail.gmail.com/mbox/"},{"id":57719,"url":"https://patchwork.plctlab.org/api/1.2/patches/57719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21793652.EfDdHjke4D@minbar/","msgid":"<21793652.EfDdHjke4D@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:36","name":"[1/7] libstdc++: Ensure __builtin_constant_p isn'\''t lost on the way","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21793652.EfDdHjke4D@minbar/mbox/"},{"id":57723,"url":"https://patchwork.plctlab.org/api/1.2/patches/57723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9083131.CDJkKcVGEf@minbar/","msgid":"<9083131.CDJkKcVGEf@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:46","name":"[2/7] libstdc++: Annotate most lambdas with always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9083131.CDJkKcVGEf@minbar/mbox/"},{"id":57720,"url":"https://patchwork.plctlab.org/api/1.2/patches/57720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8239109.NyiUUSuA9g@minbar/","msgid":"<8239109.NyiUUSuA9g@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:51","name":"[3/7] libstdc++: Document timeout and timeout-factor of simd tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8239109.NyiUUSuA9g@minbar/mbox/"},{"id":57724,"url":"https://patchwork.plctlab.org/api/1.2/patches/57724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22986674.6Emhk5qWAg@minbar/","msgid":"<22986674.6Emhk5qWAg@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:58","name":"[4/7] libstdc++: Use a PCH to speed up check-simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22986674.6Emhk5qWAg@minbar/mbox/"},{"id":57722,"url":"https://patchwork.plctlab.org/api/1.2/patches/57722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3557908.R56niFO833@minbar/","msgid":"<3557908.R56niFO833@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:03","name":"[5/7] libstdc++: printf format string fix in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3557908.R56niFO833@minbar/mbox/"},{"id":57725,"url":"https://patchwork.plctlab.org/api/1.2/patches/57725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45331655.fMDQidcC6G@minbar/","msgid":"<45331655.fMDQidcC6G@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:07","name":"[6/7] libstdc++: Fix incorrect __builtin_is_constant_evaluated calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45331655.fMDQidcC6G@minbar/mbox/"},{"id":57721,"url":"https://patchwork.plctlab.org/api/1.2/patches/57721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/111787281.nniJfEyVGO@minbar/","msgid":"<111787281.nniJfEyVGO@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:11","name":"[7/7] libstdc++: Fix incorrect function call in -ffast-math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/111787281.nniJfEyVGO@minbar/mbox/"},{"id":57741,"url":"https://patchwork.plctlab.org/api/1.2/patches/57741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1dfbfce5-bd6d-482b-acde-183a890e8286-1676496480787@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-02-15T21:28:00","name":"[committed] Fortran: error recovery on invalid assumed size reference [PR104554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1dfbfce5-bd6d-482b-acde-183a890e8286-1676496480787@3c-app-gmx-bs56/mbox/"},{"id":57743,"url":"https://patchwork.plctlab.org/api/1.2/patches/57743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-de5f13fe-faca-4b54-a26b-10d7613d9096-1676497805862@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-02-15T21:50:05","name":"[committed] Fortran: error recovery on checking procedure argument intent [PR103608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-de5f13fe-faca-4b54-a26b-10d7613d9096-1676497805862@3c-app-gmx-bs56/mbox/"},{"id":57770,"url":"https://patchwork.plctlab.org/api/1.2/patches/57770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002334.38B1E2043D@pchp3.se.axis.com/","msgid":"<20230216002334.38B1E2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T00:23:34","name":"testsuite: Add CRIS to check_effective_target_lra non-LRA list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002334.38B1E2043D@pchp3.se.axis.com/mbox/"},{"id":57771,"url":"https://patchwork.plctlab.org/api/1.2/patches/57771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002846.E1B6A20441@pchp3.se.axis.com/","msgid":"<20230216002846.E1B6A20441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T00:28:46","name":"objs-gcc.sh: Only bootstrap if source-directory contains gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002846.E1B6A20441@pchp3.se.axis.com/mbox/"},{"id":57827,"url":"https://patchwork.plctlab.org/api/1.2/patches/57827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033001.15256-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033001.15256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:30:01","name":"RISC-V: Add RVV all mask C/C++ intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033001.15256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57828,"url":"https://patchwork.plctlab.org/api/1.2/patches/57828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033428.16157-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033428.16157-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:34:28","name":"RISC-V: Fix vmnot asm check (Should check vmnot.m instead of vmnot.mm)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033428.16157-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57829,"url":"https://patchwork.plctlab.org/api/1.2/patches/57829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033619.16472-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033619.16472-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:36:19","name":"RISC-V: Add vm* mask C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033619.16472-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57830,"url":"https://patchwork.plctlab.org/api/1.2/patches/57830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033819.16850-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033819.16850-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:38:19","name":"RISC-V: Add vid.v/viota.m C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033819.16850-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57831,"url":"https://patchwork.plctlab.org/api/1.2/patches/57831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034001.17197-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034001.17197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:40:01","name":"RISC-V: Add the res of all mask C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034001.17197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57832,"url":"https://patchwork.plctlab.org/api/1.2/patches/57832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034158.17684-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034158.17684-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:41:58","name":"RISC-V: Add vm* C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034158.17684-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57833,"url":"https://patchwork.plctlab.org/api/1.2/patches/57833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034445.18092-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034445.18092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:44:45","name":"RISC-V: Add all mask C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034445.18092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57880,"url":"https://patchwork.plctlab.org/api/1.2/patches/57880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-1-tejas.belagod@arm.com/","msgid":"<20230216061351.25090-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-02-16T06:13:50","name":"[1/2,GCC12] AArch64: Update transitive closures of aes, sha2 and sha3 extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-1-tejas.belagod@arm.com/mbox/"},{"id":57881,"url":"https://patchwork.plctlab.org/api/1.2/patches/57881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-2-tejas.belagod@arm.com/","msgid":"<20230216061351.25090-2-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-02-16T06:13:51","name":"[2/2,GCC12] AArch64: Gate various crypto intrinsics availability based on features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-2-tejas.belagod@arm.com/mbox/"},{"id":57891,"url":"https://patchwork.plctlab.org/api/1.2/patches/57891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216073133.4D6E73858022@sourceware.org/","msgid":"<20230216073133.4D6E73858022@sourceware.org>","list_archive_url":null,"date":"2023-02-16T07:29:26","name":"tree-optimization/108791 - checking ICE with sloppy ADDR_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216073133.4D6E73858022@sourceware.org/mbox/"},{"id":57894,"url":"https://patchwork.plctlab.org/api/1.2/patches/57894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-2-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:40","name":"[1/5] Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-2-shihua@iscas.ac.cn/mbox/"},{"id":57898,"url":"https://patchwork.plctlab.org/api/1.2/patches/57898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-3-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:41","name":"[V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-3-shihua@iscas.ac.cn/mbox/"},{"id":57896,"url":"https://patchwork.plctlab.org/api/1.2/patches/57896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-4-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:42","name":"[V2,3/5] Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-4-shihua@iscas.ac.cn/mbox/"},{"id":57897,"url":"https://patchwork.plctlab.org/api/1.2/patches/57897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-5-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:43","name":"[V2,4/5] Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-5-shihua@iscas.ac.cn/mbox/"},{"id":57895,"url":"https://patchwork.plctlab.org/api/1.2/patches/57895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-6-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:44","name":"[V2,5/5] Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-6-shihua@iscas.ac.cn/mbox/"},{"id":57900,"url":"https://patchwork.plctlab.org/api/1.2/patches/57900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-2-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:01","name":"[V2,1/5] Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-2-shihua@iscas.ac.cn/mbox/"},{"id":57904,"url":"https://patchwork.plctlab.org/api/1.2/patches/57904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-3-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:02","name":"[V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-3-shihua@iscas.ac.cn/mbox/"},{"id":57902,"url":"https://patchwork.plctlab.org/api/1.2/patches/57902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-4-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:03","name":"[V2,3/5] Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-4-shihua@iscas.ac.cn/mbox/"},{"id":57903,"url":"https://patchwork.plctlab.org/api/1.2/patches/57903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-5-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:04","name":"[V2,4/5] Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-5-shihua@iscas.ac.cn/mbox/"},{"id":57901,"url":"https://patchwork.plctlab.org/api/1.2/patches/57901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-6-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:05","name":"[V2,5/5] Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-6-shihua@iscas.ac.cn/mbox/"},{"id":57922,"url":"https://patchwork.plctlab.org/api/1.2/patches/57922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3rUiUVywYfwfDE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T08:37:38","name":"reassoc: Fix up (ab) handling in eliminate_redundant_comparison [PR108783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3rUiUVywYfwfDE@tucnak/mbox/"},{"id":57926,"url":"https://patchwork.plctlab.org/api/1.2/patches/57926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3vzqcqv9AZsKy+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T08:56:46","name":"tree-ssa-dse: Fix up handling of lhs of internal calls [PR108657]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3vzqcqv9AZsKy+@tucnak/mbox/"},{"id":57934,"url":"https://patchwork.plctlab.org/api/1.2/patches/57934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e561b827-6f23-07f9-f968-83f485f18cca@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T09:23:40","name":"rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e561b827-6f23-07f9-f968-83f485f18cca@linux.ibm.com/mbox/"},{"id":57959,"url":"https://patchwork.plctlab.org/api/1.2/patches/57959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216103030.94868-1-jwakely@redhat.com/","msgid":"<20230216103030.94868-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T10:30:30","name":"[committed] libstdc++: Fix uses of non-reserved names in headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216103030.94868-1-jwakely@redhat.com/mbox/"},{"id":57979,"url":"https://patchwork.plctlab.org/api/1.2/patches/57979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4RZHrFT1+jua/0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T11:20:17","name":"[committed] libgomp: Fix comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4RZHrFT1+jua/0@tucnak/mbox/"},{"id":57981,"url":"https://patchwork.plctlab.org/api/1.2/patches/57981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4Rk2d7OiB9JW70@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T11:21:02","name":"[committed] libgomp: Fix up some typos in libgomp.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4Rk2d7OiB9JW70@tucnak/mbox/"},{"id":57990,"url":"https://patchwork.plctlab.org/api/1.2/patches/57990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114016.105674-1-jwakely@redhat.com/","msgid":"<20230216114016.105674-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:40:16","name":"[committed] libstdc++: Fix non-reserved names in PSTL headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114016.105674-1-jwakely@redhat.com/mbox/"},{"id":57997,"url":"https://patchwork.plctlab.org/api/1.2/patches/57997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114924.108222-1-jwakely@redhat.com/","msgid":"<20230216114924.108222-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:49:24","name":"[committed] libstdc++: Add missing space after effective-target name in test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114924.108222-1-jwakely@redhat.com/mbox/"},{"id":57998,"url":"https://patchwork.plctlab.org/api/1.2/patches/57998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216115010.108388-1-jwakely@redhat.com/","msgid":"<20230216115010.108388-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:50:10","name":"[committed] libstdc++: Fix non-reserved names in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216115010.108388-1-jwakely@redhat.com/mbox/"},{"id":58014,"url":"https://patchwork.plctlab.org/api/1.2/patches/58014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216124034.124744-1-jwakely@redhat.com/","msgid":"<20230216124034.124744-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T12:40:34","name":"[committed] libstdc++: Make names_pstl.cc require et tbb_backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216124034.124744-1-jwakely@redhat.com/mbox/"},{"id":58075,"url":"https://patchwork.plctlab.org/api/1.2/patches/58075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216134431.1600922-1-ppalka@redhat.com/","msgid":"<20230216134431.1600922-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-16T13:44:31","name":"don'\''t declare header-defined functions both static and inline, pt 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216134431.1600922-1-ppalka@redhat.com/mbox/"},{"id":58107,"url":"https://patchwork.plctlab.org/api/1.2/patches/58107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jfsb5fzx9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T14:27:46","name":"constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jfsb5fzx9.fsf@arm.com/mbox/"},{"id":58113,"url":"https://patchwork.plctlab.org/api/1.2/patches/58113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143908.138045-1-jwakely@redhat.com/","msgid":"<20230216143908.138045-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:08","name":"[committed] libstdc++: Implement P2255R2 dangling checks for std::pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143908.138045-1-jwakely@redhat.com/mbox/"},{"id":58111,"url":"https://patchwork.plctlab.org/api/1.2/patches/58111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143926.138064-1-jwakely@redhat.com/","msgid":"<20230216143926.138064-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:26","name":"[committed] libstdc++: Enable CTAD for std::basic_format_args (LWG 3810)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143926.138064-1-jwakely@redhat.com/mbox/"},{"id":58112,"url":"https://patchwork.plctlab.org/api/1.2/patches/58112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143933.138086-1-jwakely@redhat.com/","msgid":"<20230216143933.138086-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:33","name":"[committed] libstdc++: Fix name of in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143933.138086-1-jwakely@redhat.com/mbox/"},{"id":58114,"url":"https://patchwork.plctlab.org/api/1.2/patches/58114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216144016.138203-1-jwakely@redhat.com/","msgid":"<20230216144016.138203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:40:16","name":"[committed] libstdc++: Implement (P0290)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216144016.138203-1-jwakely@redhat.com/mbox/"},{"id":58115,"url":"https://patchwork.plctlab.org/api/1.2/patches/58115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216145448.141622-1-jwakely@redhat.com/","msgid":"<20230216145448.141622-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:54:48","name":"[committed] libstdc++: Replace non-ascii character in test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216145448.141622-1-jwakely@redhat.com/mbox/"},{"id":58126,"url":"https://patchwork.plctlab.org/api/1.2/patches/58126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824A720063FEE6C4F10776DA4A09@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T15:11:50","name":"RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824A720063FEE6C4F10776DA4A09@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":58135,"url":"https://patchwork.plctlab.org/api/1.2/patches/58135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-02-16T15:32:49","name":"Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'' (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":58146,"url":"https://patchwork.plctlab.org/api/1.2/patches/58146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jedqpfw6c.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T15:48:43","name":"[ARM] MVE: Implementing auto-vectorized array * scalar instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jedqpfw6c.fsf@arm.com/mbox/"},{"id":58162,"url":"https://patchwork.plctlab.org/api/1.2/patches/58162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2815464-472d-a44f-a68a-2233309b3a22@126.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T16:09:10","name":"gcc: Remove size limit of PCH for *-*-mingw32 hosts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2815464-472d-a44f-a68a-2233309b3a22@126.com/mbox/"},{"id":58166,"url":"https://patchwork.plctlab.org/api/1.2/patches/58166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216162316.88085-1-iain@sandoe.co.uk/","msgid":"<20230216162316.88085-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-02-16T16:23:16","name":"[pushed] testsuite, objective-c: Cater for Windows intptr type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216162316.88085-1-iain@sandoe.co.uk/mbox/"},{"id":58175,"url":"https://patchwork.plctlab.org/api/1.2/patches/58175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b_k7Az5ycESE-_7nqJF4y8s4KLbdYx3Y=LbCVP+q_xfA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T17:39:16","name":"simplify-rtx: Fix VOIDmode operand handling in simplify_subreg [PR108805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b_k7Az5ycESE-_7nqJF4y8s4KLbdYx3Y=LbCVP+q_xfA@mail.gmail.com/mbox/"},{"id":58181,"url":"https://patchwork.plctlab.org/api/1.2/patches/58181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com/","msgid":"<5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com>","list_archive_url":null,"date":"2023-02-16T18:06:41","name":"[OG12,committed] amdgcn: OpenMP low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com/mbox/"},{"id":58219,"url":"https://patchwork.plctlab.org/api/1.2/patches/58219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216200529.AC55F2042C@pchp3.se.axis.com/","msgid":"<20230216200529.AC55F2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T20:05:29","name":"testsuite: Tweak gcc.dg/attr-aligned.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216200529.AC55F2042C@pchp3.se.axis.com/mbox/"},{"id":58233,"url":"https://patchwork.plctlab.org/api/1.2/patches/58233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873575z65l.fsf@euler.schwinge.homeip.net/","msgid":"<873575z65l.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T20:50:30","name":"[og12] '\''libgomp.c/usm-{1,2,3,4}.c'\'': Re-enable non-GCN offloading compilation (was: [OG12 commit] amdgcn, libgomp: USM allocation update)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873575z65l.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58237,"url":"https://patchwork.plctlab.org/api/1.2/patches/58237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9dxqlp.fsf@euler.schwinge.homeip.net/","msgid":"<87zg9dxqlp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:11:46","name":"[og12] Un-break nvptx libgomp build (was: [OG12][committed] amdgcn: OpenMP low-latency allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9dxqlp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58238,"url":"https://patchwork.plctlab.org/api/1.2/patches/58238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn4hxq0r.fsf@euler.schwinge.homeip.net/","msgid":"<87wn4hxq0r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:24:20","name":"[og12] Miscellaneous clean-up re OpenMP '\''ompx_unified_shared_mem_space'\'', '\''ompx_host_mem_space'\'' (was: [PATCH 3/5] openmp, nvptx: ompx_unified_shared_mem_alloc)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn4hxq0r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58240,"url":"https://patchwork.plctlab.org/api/1.2/patches/58240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttzlxpb3.fsf@euler.schwinge.homeip.net/","msgid":"<87ttzlxpb3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:39:44","name":"[og12] Clarify/verify OpenMP '\''omp_calloc'\'' zero-initialization for pinned memory (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttzlxpb3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58260,"url":"https://patchwork.plctlab.org/api/1.2/patches/58260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekxxo23.fsf@euler.schwinge.homeip.net/","msgid":"<87lekxxo23.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T22:06:44","name":"[og12] Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'' (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekxxo23.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58274,"url":"https://patchwork.plctlab.org/api/1.2/patches/58274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216231627.1748333-1-dmalcolm@redhat.com/","msgid":"<20230216231627.1748333-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-16T23:16:27","name":"[pushed] analyzer: respect some conditions from bit masks [PR108806]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216231627.1748333-1-dmalcolm@redhat.com/mbox/"},{"id":58300,"url":"https://patchwork.plctlab.org/api/1.2/patches/58300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217004236.070D233E6B@hamza.pair.com/","msgid":"<20230217004236.070D233E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-17T00:42:34","name":"[pushed] doc: Reword how to get possible values of a parameter (was: Document all param values and remove defaults (PR middle-end/86078))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217004236.070D233E6B@hamza.pair.com/mbox/"},{"id":58312,"url":"https://patchwork.plctlab.org/api/1.2/patches/58312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com/","msgid":"<8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com>","list_archive_url":null,"date":"2023-02-17T01:22:19","name":"[wwwdocs] testing: Tweak the link to upstream FTensor (was: Anyone using FTensor to test GCC (or otherwise)?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com/mbox/"},{"id":58315,"url":"https://patchwork.plctlab.org/api/1.2/patches/58315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217013405.584620-1-guojiufu@linux.ibm.com/","msgid":"<20230217013405.584620-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T01:34:05","name":"rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217013405.584620-1-guojiufu@linux.ibm.com/mbox/"},{"id":58352,"url":"https://patchwork.plctlab.org/api/1.2/patches/58352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0uou8ai.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:15:33","name":"[arm,testsuite] asm-flag-4.c: match quotes in expected message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0uou8ai.fsf@lxoliva.fsfla.org/mbox/"},{"id":58353,"url":"https://patchwork.plctlab.org/api/1.2/patches/58353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt5cu86w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:17:43","name":"[libstdc++,testsuite] intro/names.cc: undef func on vxw7krn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt5cu86w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58354,"url":"https://patchwork.plctlab.org/api/1.2/patches/58354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilg0u82g.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:20:23","name":"[arm] xfail fp-uint64-convert-double-* on all arm targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilg0u82g.fsf@lxoliva.fsfla.org/mbox/"},{"id":58356,"url":"https://patchwork.plctlab.org/api/1.2/patches/58356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredqou760.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:39:51","name":"[libstdc++] Use __gthread_join in jthread/95989","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredqou760.fsf@lxoliva.fsfla.org/mbox/"},{"id":58357,"url":"https://patchwork.plctlab.org/api/1.2/patches/58357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora61cu71u.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:42:21","name":"[PR100127] Test for coroutine header in clang-compatible tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora61cu71u.fsf@lxoliva.fsfla.org/mbox/"},{"id":58360,"url":"https://patchwork.plctlab.org/api/1.2/patches/58360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yc0u6f9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:55:54","name":"Skip module_cmi_p and related unsupported module test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yc0u6f9.fsf@lxoliva.fsfla.org/mbox/"},{"id":58366,"url":"https://patchwork.plctlab.org/api/1.2/patches/58366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qmou68k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:59:55","name":"Drop need for constant I in ctf test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qmou68k.fsf@lxoliva.fsfla.org/mbox/"},{"id":58369,"url":"https://patchwork.plctlab.org/api/1.2/patches/58369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn4gsrkk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:02:03","name":"Accept pmf-vbit-in-delta extra warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn4gsrkk.fsf@lxoliva.fsfla.org/mbox/"},{"id":58370,"url":"https://patchwork.plctlab.org/api/1.2/patches/58370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsff4srfy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:04:49","name":"[vxworks] make wint_t and wchar_t the same distinct type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsff4srfy.fsf@lxoliva.fsfla.org/mbox/"},{"id":58371,"url":"https://patchwork.plctlab.org/api/1.2/patches/58371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7pssrdz.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:06:00","name":"[arm] disable aes-1742098 mitigation for a72 combine tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7pssrdz.fsf@lxoliva.fsfla.org/mbox/"},{"id":58372,"url":"https://patchwork.plctlab.org/api/1.2/patches/58372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork00gsr8w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:09:03","name":"-Wdangling-pointer: don'\''t mark SSA lhs sets as stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork00gsr8w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58380,"url":"https://patchwork.plctlab.org/api/1.2/patches/58380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsb4sr3w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:12:03","name":"[arm] adjust expectations for armv8_2-fp16-move-[12].c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsb4sr3w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58379,"url":"https://patchwork.plctlab.org/api/1.2/patches/58379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbklssr0v.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:13:52","name":"[PR51534,arm] split out pr51534 test for softfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbklssr0v.fsf@lxoliva.fsfla.org/mbox/"},{"id":58378,"url":"https://patchwork.plctlab.org/api/1.2/patches/58378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cwgsqv5.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:17:18","name":"[arm] adjust tests for quotes around +cdecp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cwgsqv5.fsf@lxoliva.fsfla.org/mbox/"},{"id":58382,"url":"https://patchwork.plctlab.org/api/1.2/patches/58382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or3574spzu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:36:05","name":"[arm] complete vmsr/vmrs blank and case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or3574spzu.fsf@lxoliva.fsfla.org/mbox/"},{"id":58384,"url":"https://patchwork.plctlab.org/api/1.2/patches/58384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1owrbaj.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:39:00","name":"[PR104882,arm] require mve hw for mve run test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1owrbaj.fsf@lxoliva.fsfla.org/mbox/"},{"id":58385,"url":"https://patchwork.plctlab.org/api/1.2/patches/58385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttzkrb8u.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:40:01","name":"[libstdc++] xfail noreplace tests on vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttzkrb8u.fsf@lxoliva.fsfla.org/mbox/"},{"id":58387,"url":"https://patchwork.plctlab.org/api/1.2/patches/58387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orpma8rb4x.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:42:22","name":"[arm,vxworks] xfail fp-double-convert-float-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orpma8rb4x.fsf@lxoliva.fsfla.org/mbox/"},{"id":58388,"url":"https://patchwork.plctlab.org/api/1.2/patches/58388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlekwrb1w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:44:11","name":"[libstdc++] ensure mutex_pool survives _Safe_sequence_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlekwrb1w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58389,"url":"https://patchwork.plctlab.org/api/1.2/patches/58389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6vkravy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:47:45","name":"[PR77760,libstdc++] encode __time_get_state in tm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6vkravy.fsf@lxoliva.fsfla.org/mbox/"},{"id":58392,"url":"https://patchwork.plctlab.org/api/1.2/patches/58392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp/","msgid":"<20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp>","list_archive_url":null,"date":"2023-02-17T07:54:49","name":"[v7] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp/mbox/"},{"id":58409,"url":"https://patchwork.plctlab.org/api/1.2/patches/58409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217082258.3399094-1-zhujunxian@oss.cipunited.com/","msgid":"<20230217082258.3399094-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-17T08:24:55","name":"Hazard barrier return support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217082258.3399094-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":58413,"url":"https://patchwork.plctlab.org/api/1.2/patches/58413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217083531.3409405-1-zhujunxian@oss.cipunited.com/","msgid":"<20230217083531.3409405-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-17T08:35:56","name":"Add pattern for clo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217083531.3409405-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":58457,"url":"https://patchwork.plctlab.org/api/1.2/patches/58457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com/","msgid":"<4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T09:54:30","name":"[v2] rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com/mbox/"},{"id":58458,"url":"https://patchwork.plctlab.org/api/1.2/patches/58458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com/","msgid":"<737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T09:55:04","name":"rs6000: Fix vector_set_var_p9 by considering BE [PR108807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com/mbox/"},{"id":58470,"url":"https://patchwork.plctlab.org/api/1.2/patches/58470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+9TodOHE09e9Vwq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-17T10:14:57","name":"optabs: Fix up expand_doubleword_shift_condmove for shift_mask == 0 [PR108803]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+9TodOHE09e9Vwq@tucnak/mbox/"},{"id":58497,"url":"https://patchwork.plctlab.org/api/1.2/patches/58497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com/","msgid":"<27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com>","list_archive_url":null,"date":"2023-02-17T11:13:52","name":"Fortran: Avoid SAVE_EXPR for deferred-len char types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com/mbox/"},{"id":58520,"url":"https://patchwork.plctlab.org/api/1.2/patches/58520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113153.6E2753860740@sourceware.org/","msgid":"<20230217113153.6E2753860740@sourceware.org>","list_archive_url":null,"date":"2023-02-17T11:30:59","name":"Fix wrong-code issue in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113153.6E2753860740@sourceware.org/mbox/"},{"id":58524,"url":"https://patchwork.plctlab.org/api/1.2/patches/58524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113926.619E43843854@sourceware.org/","msgid":"<20230217113926.619E43843854@sourceware.org>","list_archive_url":null,"date":"2023-02-17T11:38:42","name":"tree-optimization/108821 - store motion and volatiles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113926.619E43843854@sourceware.org/mbox/"},{"id":58525,"url":"https://patchwork.plctlab.org/api/1.2/patches/58525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb5c90ba-0524-1695-f51e-012baf33930d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T11:45:33","name":"[PATCHv2] openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb5c90ba-0524-1695-f51e-012baf33930d@codesourcery.com/mbox/"},{"id":58542,"url":"https://patchwork.plctlab.org/api/1.2/patches/58542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzg9cxygc.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-17T12:34:27","name":"[COMMITTED] contrib: Fix make_sunver.pl warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzg9cxygc.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":58545,"url":"https://patchwork.plctlab.org/api/1.2/patches/58545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8k0xxqx.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-17T12:49:42","name":"[COMMITTED] fixincludes: Bypass solaris_math_12 on newer Solaris 11.4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8k0xxqx.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":58546,"url":"https://patchwork.plctlab.org/api/1.2/patches/58546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217125114.288597-1-juzhe.zhong@rivai.ai/","msgid":"<20230217125114.288597-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-17T12:51:14","name":"RISC-V: Add floating-point RVV C/C++ api","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217125114.288597-1-juzhe.zhong@rivai.ai/mbox/"},{"id":58567,"url":"https://patchwork.plctlab.org/api/1.2/patches/58567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217134130.2565745-1-siddhesh@gotplt.org/","msgid":"<20230217134130.2565745-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-02-17T13:41:30","name":"doc: Fix typo in -Wall description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217134130.2565745-1-siddhesh@gotplt.org/mbox/"},{"id":58594,"url":"https://patchwork.plctlab.org/api/1.2/patches/58594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T14:02:40","name":"RISC-V: Add divmod instruction support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"},{"id":58716,"url":"https://patchwork.plctlab.org/api/1.2/patches/58716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKK21deuX7U3Be7RHTdBzCnK77wqbBW6QwHdO4Gjircw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T16:51:14","name":"i386: Generate QImode binary ops with high-part input register [PR108831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKK21deuX7U3Be7RHTdBzCnK77wqbBW6QwHdO4Gjircw@mail.gmail.com/mbox/"},{"id":58723,"url":"https://patchwork.plctlab.org/api/1.2/patches/58723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com/","msgid":"<16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T16:58:41","name":"rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com/mbox/"},{"id":58740,"url":"https://patchwork.plctlab.org/api/1.2/patches/58740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at/","msgid":"<90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-17T18:17:26","name":"[C] Detect all variably modified types [PR108375]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at/mbox/"},{"id":58753,"url":"https://patchwork.plctlab.org/api/1.2/patches/58753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217185847.33102-1-polacek@redhat.com/","msgid":"<20230217185847.33102-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-17T18:58:47","name":"c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217185847.33102-1-polacek@redhat.com/mbox/"},{"id":58771,"url":"https://patchwork.plctlab.org/api/1.2/patches/58771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217203209.2141339-1-jason@redhat.com/","msgid":"<20230217203209.2141339-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-17T20:32:09","name":"[RFC] c++: static_assert (false) in template [DR2518]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217203209.2141339-1-jason@redhat.com/mbox/"},{"id":58777,"url":"https://patchwork.plctlab.org/api/1.2/patches/58777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+/sP+kFAwElRqWA@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T21:06:07","name":"[v2] c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+/sP+kFAwElRqWA@redhat.com/mbox/"},{"id":58781,"url":"https://patchwork.plctlab.org/api/1.2/patches/58781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-1-apinski@marvell.com/","msgid":"<20230217214538.2177094-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-17T21:45:37","name":"[1/2] Support get_range_query with a nullptr argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-1-apinski@marvell.com/mbox/"},{"id":58782,"url":"https://patchwork.plctlab.org/api/1.2/patches/58782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-2-apinski@marvell.com/","msgid":"<20230217214538.2177094-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-17T21:45:38","name":"[2/2] Remove #if GIMPLE around 1 - a pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-2-apinski@marvell.com/mbox/"},{"id":58783,"url":"https://patchwork.plctlab.org/api/1.2/patches/58783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217222603.2485714-1-qing.zhao@oracle.com/","msgid":"<20230217222603.2485714-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-17T22:26:03","name":"Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217222603.2485714-1-qing.zhao@oracle.com/mbox/"},{"id":58788,"url":"https://patchwork.plctlab.org/api/1.2/patches/58788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/AC6UX/X8MsficN@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T22:42:49","name":"[v3] c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/AC6UX/X8MsficN@redhat.com/mbox/"},{"id":58794,"url":"https://patchwork.plctlab.org/api/1.2/patches/58794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217230525.10750-1-alx@kernel.org/","msgid":"<20230217230525.10750-1-alx@kernel.org>","list_archive_url":null,"date":"2023-02-17T23:05:26","name":"[resend] Make -Wuse-after-free=3 the default one in -Wall","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217230525.10750-1-alx@kernel.org/mbox/"},{"id":58800,"url":"https://patchwork.plctlab.org/api/1.2/patches/58800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekv3n19.fsf@euler.schwinge.homeip.net/","msgid":"<87lekv3n19.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-17T23:11:30","name":"'\''#include \"tm_p.h\"'\'' in '\''gcc/rust/backend/rust-tree.cc'\'' (was: [gcc r13-5533] gccrs: const folding port)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekv3n19.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58881,"url":"https://patchwork.plctlab.org/api/1.2/patches/58881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f54bc212-d66e-51ae-7728-17a410eab85e@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-18T04:43:34","name":"[v5] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f54bc212-d66e-51ae-7728-17a410eab85e@yahoo.co.jp/mbox/"},{"id":58882,"url":"https://patchwork.plctlab.org/api/1.2/patches/58882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffa22cd6-978c-0f23-d2ff-c52000db3398@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-18T04:54:10","name":"xtensa: Enforce return address saving when -Og is specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffa22cd6-978c-0f23-d2ff-c52000db3398@yahoo.co.jp/mbox/"},{"id":58904,"url":"https://patchwork.plctlab.org/api/1.2/patches/58904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218094838.BC5FC33E95@hamza.pair.com/","msgid":"<20230218094838.BC5FC33E95@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T09:48:36","name":"[pushed] doc: Update link to AVR-LibC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218094838.BC5FC33E95@hamza.pair.com/mbox/"},{"id":58905,"url":"https://patchwork.plctlab.org/api/1.2/patches/58905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218095441.5043233E90@hamza.pair.com/","msgid":"<20230218095441.5043233E90@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T09:54:39","name":"[pushed] wwwdocs: readings: Update link to ETRAX manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218095441.5043233E90@hamza.pair.com/mbox/"},{"id":58906,"url":"https://patchwork.plctlab.org/api/1.2/patches/58906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218100134.9C10B33EAC@hamza.pair.com/","msgid":"<20230218100134.9C10B33EAC@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T10:01:32","name":"[pushed] libstdc++: Switch two links to www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218100134.9C10B33EAC@hamza.pair.com/mbox/"},{"id":58908,"url":"https://patchwork.plctlab.org/api/1.2/patches/58908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CqBQDCQZal1+1G@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-18T10:35:49","name":"i386: Fix up replacement of registers in certain peephole2s [PR108832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CqBQDCQZal1+1G@tucnak/mbox/"},{"id":58909,"url":"https://patchwork.plctlab.org/api/1.2/patches/58909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CrHDbQpnIxKUFj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-18T10:40:28","name":"reassoc: Fold some statements [PR108819]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CrHDbQpnIxKUFj@tucnak/mbox/"},{"id":58955,"url":"https://patchwork.plctlab.org/api/1.2/patches/58955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873572rd5p.fsf@igel.home/","msgid":"<873572rd5p.fsf@igel.home>","list_archive_url":null,"date":"2023-02-18T19:23:14","name":"Update baseline symbols for m68k-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873572rd5p.fsf@igel.home/mbox/"},{"id":59026,"url":"https://patchwork.plctlab.org/api/1.2/patches/59026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-1-jason@redhat.com/","msgid":"<20230218214239.2297623-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:37","name":"[RFC,1/3] c++: add __is_deducible trait [PR105841]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-1-jason@redhat.com/mbox/"},{"id":59028,"url":"https://patchwork.plctlab.org/api/1.2/patches/59028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-2-jason@redhat.com/","msgid":"<20230218214239.2297623-2-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:38","name":"[2/3] c++: fix alias CTAD [PR105841]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-2-jason@redhat.com/mbox/"},{"id":59027,"url":"https://patchwork.plctlab.org/api/1.2/patches/59027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-3-jason@redhat.com/","msgid":"<20230218214239.2297623-3-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:39","name":"[3/3] c++: CTAD for less-specialized alias template [PR102529]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-3-jason@redhat.com/mbox/"},{"id":59050,"url":"https://patchwork.plctlab.org/api/1.2/patches/59050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218223206.5458033E77@hamza.pair.com/","msgid":"<20230218223206.5458033E77@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T22:32:03","name":"[pushed] wwwdocs: gcc-12: Simplify a sentence in the OpenMP section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218223206.5458033E77@hamza.pair.com/mbox/"},{"id":59076,"url":"https://patchwork.plctlab.org/api/1.2/patches/59076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com/","msgid":"<02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com>","list_archive_url":null,"date":"2023-02-19T05:21:09","name":"[RFC] internal documentation for OMP_FOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com/mbox/"},{"id":59362,"url":"https://patchwork.plctlab.org/api/1.2/patches/59362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg99pm2o.fsf@debian/","msgid":"<87zg99pm2o.fsf@debian>","list_archive_url":null,"date":"2023-02-19T18:05:51","name":"Allow front ends to register spec functions gcc/{gcc.cc,gcc.h} [PR108261]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg99pm2o.fsf@debian/mbox/"},{"id":59357,"url":"https://patchwork.plctlab.org/api/1.2/patches/59357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230219191528.4921D33E50@hamza.pair.com/","msgid":"<20230219191528.4921D33E50@hamza.pair.com>","list_archive_url":null,"date":"2023-02-19T19:15:26","name":"[pushed] wwwdocs: *: Add a comma after \"In addition\" when used as transition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230219191528.4921D33E50@hamza.pair.com/mbox/"},{"id":59339,"url":"https://patchwork.plctlab.org/api/1.2/patches/59339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsb1no1k.fsf@debian/","msgid":"<87fsb1no1k.fsf@debian>","list_archive_url":null,"date":"2023-02-20T01:06:15","name":"Allow front ends to register spec functions gcc/{gcc.cc,gcc.h} [PR108261]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsb1no1k.fsf@debian/mbox/"},{"id":59323,"url":"https://patchwork.plctlab.org/api/1.2/patches/59323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com/","msgid":"<4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com>","list_archive_url":null,"date":"2023-02-20T02:04:27","name":"[rs6000] Merge two vector shift when their sources are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com/mbox/"},{"id":59330,"url":"https://patchwork.plctlab.org/api/1.2/patches/59330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220065445.207902-1-juzhe.zhong@rivai.ai/","msgid":"<20230220065445.207902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-20T06:54:45","name":"RISC-V: Add RVV reduction C/C++ intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220065445.207902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":59353,"url":"https://patchwork.plctlab.org/api/1.2/patches/59353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-2-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:21","name":"[V3,1/5] RISC-V: Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-2-shihua@iscas.ac.cn/mbox/"},{"id":59355,"url":"https://patchwork.plctlab.org/api/1.2/patches/59355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-3-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:22","name":"[V3,2/5] RISC-V: Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-3-shihua@iscas.ac.cn/mbox/"},{"id":59354,"url":"https://patchwork.plctlab.org/api/1.2/patches/59354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-4-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:23","name":"[V3,3/5] RISC-V: Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-4-shihua@iscas.ac.cn/mbox/"},{"id":59356,"url":"https://patchwork.plctlab.org/api/1.2/patches/59356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-5-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:24","name":"[V3,4/5] RISC-V: Implement ZKNH extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-5-shihua@iscas.ac.cn/mbox/"},{"id":59352,"url":"https://patchwork.plctlab.org/api/1.2/patches/59352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-6-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:25","name":"[V3,5/5] RISC-V: Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-6-shihua@iscas.ac.cn/mbox/"},{"id":59351,"url":"https://patchwork.plctlab.org/api/1.2/patches/59351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220101112.E5776396E47E@sourceware.org/","msgid":"<20230220101112.E5776396E47E@sourceware.org>","list_archive_url":null,"date":"2023-02-20T07:43:13","name":"tree-optimization/108819 - niter analysis ICE with unexpected constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220101112.E5776396E47E@sourceware.org/mbox/"},{"id":59341,"url":"https://patchwork.plctlab.org/api/1.2/patches/59341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220092515.A927A33E5C@hamza.pair.com/","msgid":"<20230220092515.A927A33E5C@hamza.pair.com>","list_archive_url":null,"date":"2023-02-20T09:25:13","name":"[pushed] wwwdocs: index: Remove link to Nick'\''s blog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220092515.A927A33E5C@hamza.pair.com/mbox/"},{"id":59337,"url":"https://patchwork.plctlab.org/api/1.2/patches/59337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220100306.CFFE43AA8C16@sourceware.org/","msgid":"<20230220100306.CFFE43AA8C16@sourceware.org>","list_archive_url":null,"date":"2023-02-20T10:02:19","name":"tree-optimization/108825 - checking ICE with unroll-and-jam","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220100306.CFFE43AA8C16@sourceware.org/mbox/"},{"id":59363,"url":"https://patchwork.plctlab.org/api/1.2/patches/59363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddcz64wrmy.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-20T10:36:05","name":"rust: Fix rust-tree.cc compilation on SPARC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddcz64wrmy.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":59372,"url":"https://patchwork.plctlab.org/api/1.2/patches/59372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220105631.4627639502F3@sourceware.org/","msgid":"<20230220105631.4627639502F3@sourceware.org>","list_archive_url":null,"date":"2023-02-20T10:55:43","name":"tree-optimization/108816 - vect versioning check split confusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220105631.4627639502F3@sourceware.org/mbox/"},{"id":59388,"url":"https://patchwork.plctlab.org/api/1.2/patches/59388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NYLexxdOdbgbjf@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-02-20T11:23:25","name":"libstdc++: Add missing functions to [PR79700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NYLexxdOdbgbjf@Thaum.localdomain/mbox/"},{"id":59396,"url":"https://patchwork.plctlab.org/api/1.2/patches/59396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NfXD/wr0I7rmH9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-20T11:54:04","name":"libstdc++: Some baseline_symbols.txt updates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NfXD/wr0I7rmH9@tucnak/mbox/"},{"id":59397,"url":"https://patchwork.plctlab.org/api/1.2/patches/59397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmilfwsfl2.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-20T12:10:01","name":"libstdc++: Update baseline symbols for riscv64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmilfwsfl2.fsf@suse.de/mbox/"},{"id":59441,"url":"https://patchwork.plctlab.org/api/1.2/patches/59441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220130855.7012D3846918@sourceware.org/","msgid":"<20230220130855.7012D3846918@sourceware.org>","list_archive_url":null,"date":"2023-02-20T13:08:09","name":"tree-optimization/108793 - niter compute type mismatch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220130855.7012D3846918@sourceware.org/mbox/"},{"id":59447,"url":"https://patchwork.plctlab.org/api/1.2/patches/59447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7po797z.fsf@euler.schwinge.homeip.net/","msgid":"<87o7po797z.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T13:33:04","name":"Rust: Don'\''t depend on unused '\''target-libffi'\'', '\''target-libbacktrace'\'' (was: [PATCH Rust front-end v2 32/37] gccrs: Add config-lang.in)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7po797z.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59451,"url":"https://patchwork.plctlab.org/api/1.2/patches/59451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0uktpds.fsf@euler.schwinge.homeip.net/","msgid":"<87r0uktpds.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T13:53:03","name":"[og12] Attempt to not just register but allocate OpenMP pinned memory using a device (was: [og12] Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0uktpds.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59474,"url":"https://patchwork.plctlab.org/api/1.2/patches/59474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilfwxu0m.fsf@euler.schwinge.homeip.net/","msgid":"<87ilfwxu0m.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T14:59:21","name":"Prototype '\''GOMP_enable_pinned_mode'\'' (was: [PATCH 08/17] openmp: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilfwxu0m.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59541,"url":"https://patchwork.plctlab.org/api/1.2/patches/59541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220153645.115207-1-kito.cheng@sifive.com/","msgid":"<20230220153645.115207-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-20T15:36:45","name":"[committed] RISC-V: prefetch.* only take base register with zero-offset for the address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220153645.115207-1-kito.cheng@sifive.com/mbox/"},{"id":59555,"url":"https://patchwork.plctlab.org/api/1.2/patches/59555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12342604.nUPlyArG6x@minbar/","msgid":"<12342604.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-02-20T16:31:55","name":"[committed] libstdc++: Fix uses of non-reserved names in simd header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12342604.nUPlyArG6x@minbar/mbox/"},{"id":59647,"url":"https://patchwork.plctlab.org/api/1.2/patches/59647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220194641.4172416-1-ppalka@redhat.com/","msgid":"<20230220194641.4172416-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-20T19:46:41","name":"c++: constant non-copy-init is manifestly constant [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220194641.4172416-1-ppalka@redhat.com/mbox/"},{"id":59665,"url":"https://patchwork.plctlab.org/api/1.2/patches/59665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-70379611-3104-41fb-b298-b55372325a13-1676925762184@3c-app-gmx-bap60/","msgid":"","list_archive_url":null,"date":"2023-02-20T20:42:42","name":"Fortran: improve checking of character length specification [PR96025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-70379611-3104-41fb-b298-b55372325a13-1676925762184@3c-app-gmx-bap60/mbox/"},{"id":59674,"url":"https://patchwork.plctlab.org/api/1.2/patches/59674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/PhbMGTVXDT4rre@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-20T21:09:00","name":"[committed] powerpc: Another umaddditi4 fix [PR108862]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/PhbMGTVXDT4rre@tucnak/mbox/"},{"id":59684,"url":"https://patchwork.plctlab.org/api/1.2/patches/59684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZFS5DXHt1Cdd6pMu+OF6RafRJ-m39S5f-0jkqg8kuo8A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-20T22:21:29","name":"i386: Introduce general_x64constmem_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZFS5DXHt1Cdd6pMu+OF6RafRJ-m39S5f-0jkqg8kuo8A@mail.gmail.com/mbox/"},{"id":59704,"url":"https://patchwork.plctlab.org/api/1.2/patches/59704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221023857.211542-1-xin.liu@oss.cipunited.com/","msgid":"<20230221023857.211542-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-21T02:39:12","name":"Testsuite: Disable micromips for MSA tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221023857.211542-1-xin.liu@oss.cipunited.com/mbox/"},{"id":59737,"url":"https://patchwork.plctlab.org/api/1.2/patches/59737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221031524.220339-1-xin.liu@oss.cipunited.com/","msgid":"<20230221031524.220339-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-21T03:16:04","name":"MIPS: Account for LWL/LWR in store_by_pieces_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221031524.220339-1-xin.liu@oss.cipunited.com/mbox/"},{"id":59778,"url":"https://patchwork.plctlab.org/api/1.2/patches/59778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221072001.480858-1-chenglulu@loongson.cn/","msgid":"<20230221072001.480858-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-02-21T07:20:02","name":"LoongArch: Change the value of macro TRY_EMPTY_VM_SPACE from 0x8000000000 to 0x1000000000.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221072001.480858-1-chenglulu@loongson.cn/mbox/"},{"id":59804,"url":"https://patchwork.plctlab.org/api/1.2/patches/59804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd8rgrwh75.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-21T08:33:50","name":"libstdc++: Update Solaris baselines for GCC 13.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd8rgrwh75.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":59814,"url":"https://patchwork.plctlab.org/api/1.2/patches/59814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093300.03F1913481@imap2.suse-dmz.suse.de/","msgid":"<20230221093300.03F1913481@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T09:32:59","name":"tree-optimization/108855 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093300.03F1913481@imap2.suse-dmz.suse.de/mbox/"},{"id":59815,"url":"https://patchwork.plctlab.org/api/1.2/patches/59815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093305.8E2BA13481@imap2.suse-dmz.suse.de/","msgid":"<20230221093305.8E2BA13481@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T09:33:05","name":"tree-optimization/108868 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093305.8E2BA13481@imap2.suse-dmz.suse.de/mbox/"},{"id":59843,"url":"https://patchwork.plctlab.org/api/1.2/patches/59843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz63xqrk.fsf@euler.schwinge.homeip.net/","msgid":"<87cz63xqrk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-21T10:21:51","name":"[PING,v2] Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz63xqrk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59901,"url":"https://patchwork.plctlab.org/api/1.2/patches/59901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdc01b81-7097-11bc-ab65-315388e3c916@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-21T11:57:22","name":"Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdc01b81-7097-11bc-ab65-315388e3c916@codesourcery.com/mbox/"},{"id":59952,"url":"https://patchwork.plctlab.org/api/1.2/patches/59952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-2-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:50","name":"[committed,001/103] gccrs: Fix missing dead code analysis ICE on local enum definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-2-arthur.cohen@embecosm.com/mbox/"},{"id":59957,"url":"https://patchwork.plctlab.org/api/1.2/patches/59957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-3-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:52","name":"[committed,002/103] gccrs: visibility: Rename get_public_vis_type -> get_vis_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-3-arthur.cohen@embecosm.com/mbox/"},{"id":59950,"url":"https://patchwork.plctlab.org/api/1.2/patches/59950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-4-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:53","name":"[committed,003/103] gccrs: dump: Emit visibility when dumping items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-4-arthur.cohen@embecosm.com/mbox/"},{"id":59951,"url":"https://patchwork.plctlab.org/api/1.2/patches/59951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-5-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:54","name":"[committed,004/103] gccrs: Add catch for recusive type queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-5-arthur.cohen@embecosm.com/mbox/"},{"id":59971,"url":"https://patchwork.plctlab.org/api/1.2/patches/59971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-6-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:55","name":"[committed,005/103] gccrs: testing: try loop in const function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-6-arthur.cohen@embecosm.com/mbox/"},{"id":59964,"url":"https://patchwork.plctlab.org/api/1.2/patches/59964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-7-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:56","name":"[committed,006/103] gccrs: ast: dump assignment and compound assignment expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-7-arthur.cohen@embecosm.com/mbox/"},{"id":59967,"url":"https://patchwork.plctlab.org/api/1.2/patches/59967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-8-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:57","name":"[committed,007/103] gccrs: ast: dump If expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-8-arthur.cohen@embecosm.com/mbox/"},{"id":59955,"url":"https://patchwork.plctlab.org/api/1.2/patches/59955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-9-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:58","name":"[committed,008/103] gccrs: builtins: Move implementation into source file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-9-arthur.cohen@embecosm.com/mbox/"},{"id":59960,"url":"https://patchwork.plctlab.org/api/1.2/patches/59960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-10-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:59","name":"[committed,009/103] gccrs: Track DefId on ADT variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-10-arthur.cohen@embecosm.com/mbox/"},{"id":59976,"url":"https://patchwork.plctlab.org/api/1.2/patches/59976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-11-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:00","name":"[committed,010/103] gccrs: Ensure uniqueness on Path probe'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-11-arthur.cohen@embecosm.com/mbox/"},{"id":59958,"url":"https://patchwork.plctlab.org/api/1.2/patches/59958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-12-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:01","name":"[committed,011/103] gccrs: Support looking up super traits for trait items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-12-arthur.cohen@embecosm.com/mbox/"},{"id":59966,"url":"https://patchwork.plctlab.org/api/1.2/patches/59966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-13-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:02","name":"[committed,012/103] gccrs: ast: dump: add emit_generic_params helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-13-arthur.cohen@embecosm.com/mbox/"},{"id":59970,"url":"https://patchwork.plctlab.org/api/1.2/patches/59970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-14-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:03","name":"[committed,013/103] gccrs: ast: dump: add format_{tuple, struct}_field helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-14-arthur.cohen@embecosm.com/mbox/"},{"id":59972,"url":"https://patchwork.plctlab.org/api/1.2/patches/59972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-15-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:04","name":"[committed,014/103] gccrs: ast: dump structs, enums and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-15-arthur.cohen@embecosm.com/mbox/"},{"id":59968,"url":"https://patchwork.plctlab.org/api/1.2/patches/59968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-16-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:05","name":"[committed,015/103] gccrs: intrinsics: Add data prefetching intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-16-arthur.cohen@embecosm.com/mbox/"},{"id":59969,"url":"https://patchwork.plctlab.org/api/1.2/patches/59969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-17-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:06","name":"[committed,016/103] gccrs: fix ICE on missing closing paren","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-17-arthur.cohen@embecosm.com/mbox/"},{"id":59982,"url":"https://patchwork.plctlab.org/api/1.2/patches/59982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-18-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:07","name":"[committed,017/103] gccrs: mappings: Add MacroInvocation -> MacroRulesDef mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-18-arthur.cohen@embecosm.com/mbox/"},{"id":59975,"url":"https://patchwork.plctlab.org/api/1.2/patches/59975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-19-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:08","name":"[committed,018/103] gccrs: rust-ast-resolve-item: Add note about resolving glob uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-19-arthur.cohen@embecosm.com/mbox/"},{"id":59986,"url":"https://patchwork.plctlab.org/api/1.2/patches/59986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-20-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:09","name":"[committed,019/103] gccrs: ast: Add accept_vis() method to `GenericArg`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-20-arthur.cohen@embecosm.com/mbox/"},{"id":59985,"url":"https://patchwork.plctlab.org/api/1.2/patches/59985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-21-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:10","name":"[committed,020/103] gccrs: early-name-resolver: Add simple macro name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-21-arthur.cohen@embecosm.com/mbox/"},{"id":59973,"url":"https://patchwork.plctlab.org/api/1.2/patches/59973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-22-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:11","name":"[committed,021/103] gccrs: Support type resolution on super traits on dyn objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-22-arthur.cohen@embecosm.com/mbox/"},{"id":59989,"url":"https://patchwork.plctlab.org/api/1.2/patches/59989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-23-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:12","name":"[committed,022/103] gccrs: Add mappings for fn_once lang item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-23-arthur.cohen@embecosm.com/mbox/"},{"id":59981,"url":"https://patchwork.plctlab.org/api/1.2/patches/59981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-24-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:13","name":"[committed,023/103] gccrs: Add ABI mappings for rust-call to map to ABI::RUST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-24-arthur.cohen@embecosm.com/mbox/"},{"id":59978,"url":"https://patchwork.plctlab.org/api/1.2/patches/59978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-25-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:14","name":"[committed,024/103] gccrs: Method resolution must support multiple candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-25-arthur.cohen@embecosm.com/mbox/"},{"id":59977,"url":"https://patchwork.plctlab.org/api/1.2/patches/59977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-26-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:15","name":"[committed,025/103] gccrs: ast: dump: fix extra newline in block without tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-26-arthur.cohen@embecosm.com/mbox/"},{"id":59994,"url":"https://patchwork.plctlab.org/api/1.2/patches/59994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-27-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:16","name":"[committed,026/103] gccrs: ast: dump: minor fixups to IfExpr formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-27-arthur.cohen@embecosm.com/mbox/"},{"id":59974,"url":"https://patchwork.plctlab.org/api/1.2/patches/59974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-28-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:17","name":"[committed,027/103] gccrs: ast: dump: ComparisonExpr and LazyBooleanExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-28-arthur.cohen@embecosm.com/mbox/"},{"id":59998,"url":"https://patchwork.plctlab.org/api/1.2/patches/59998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-29-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:18","name":"[committed,028/103] gccrs: ast: dump: ArrayExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-29-arthur.cohen@embecosm.com/mbox/"},{"id":59980,"url":"https://patchwork.plctlab.org/api/1.2/patches/59980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-30-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:19","name":"[committed,029/103] gccrs: ast: dump: various simple Exprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-30-arthur.cohen@embecosm.com/mbox/"},{"id":60003,"url":"https://patchwork.plctlab.org/api/1.2/patches/60003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-31-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:20","name":"[committed,030/103] gccrs: ast: dump: RangeExprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-31-arthur.cohen@embecosm.com/mbox/"},{"id":59993,"url":"https://patchwork.plctlab.org/api/1.2/patches/59993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-32-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:21","name":"[committed,031/103] gccrs: Refactor TraitResolver to not require a visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-32-arthur.cohen@embecosm.com/mbox/"},{"id":59979,"url":"https://patchwork.plctlab.org/api/1.2/patches/59979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-33-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:22","name":"[committed,032/103] gccrs: ast: dump TypeAlias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-33-arthur.cohen@embecosm.com/mbox/"},{"id":59996,"url":"https://patchwork.plctlab.org/api/1.2/patches/59996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-34-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:23","name":"[committed,033/103] gccrs: Support outer attribute handling on trait items just like normal items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-34-arthur.cohen@embecosm.com/mbox/"},{"id":60011,"url":"https://patchwork.plctlab.org/api/1.2/patches/60011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-35-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:24","name":"[committed,034/103] gccrs: dump: Emit visibility when dumping items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-35-arthur.cohen@embecosm.com/mbox/"},{"id":60002,"url":"https://patchwork.plctlab.org/api/1.2/patches/60002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-36-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:25","name":"[committed,035/103] gccrs: dump: Dump items within modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-36-arthur.cohen@embecosm.com/mbox/"},{"id":60015,"url":"https://patchwork.plctlab.org/api/1.2/patches/60015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-37-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:26","name":"[committed,036/103] gccrs: dump: Fix module dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-37-arthur.cohen@embecosm.com/mbox/"},{"id":59983,"url":"https://patchwork.plctlab.org/api/1.2/patches/59983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-38-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:27","name":"[committed,037/103] gccrs: ast: Module: unloaded module and inner attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-38-arthur.cohen@embecosm.com/mbox/"},{"id":59984,"url":"https://patchwork.plctlab.org/api/1.2/patches/59984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-39-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:28","name":"[committed,038/103] gccrs: dump: Dump macro rules definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-39-arthur.cohen@embecosm.com/mbox/"},{"id":60021,"url":"https://patchwork.plctlab.org/api/1.2/patches/60021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-40-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:29","name":"[committed,039/103] gccrs: Add check for recursive trait cycles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-40-arthur.cohen@embecosm.com/mbox/"},{"id":59987,"url":"https://patchwork.plctlab.org/api/1.2/patches/59987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-41-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:30","name":"[committed,040/103] gccrs: ast: Refactor ASTFragment -> Fragment class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-41-arthur.cohen@embecosm.com/mbox/"},{"id":60025,"url":"https://patchwork.plctlab.org/api/1.2/patches/60025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-42-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:31","name":"[committed,041/103] gccrs: rust: Replace uses of ASTFragment -> Fragment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-42-arthur.cohen@embecosm.com/mbox/"},{"id":59992,"url":"https://patchwork.plctlab.org/api/1.2/patches/59992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-43-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:32","name":"[committed,042/103] gccrs: ast: Improve Fragment API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-43-arthur.cohen@embecosm.com/mbox/"},{"id":59988,"url":"https://patchwork.plctlab.org/api/1.2/patches/59988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-44-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:33","name":"[committed,043/103] gccrs: Add missing fn_once_output langitem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-44-arthur.cohen@embecosm.com/mbox/"},{"id":60008,"url":"https://patchwork.plctlab.org/api/1.2/patches/60008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-45-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:34","name":"[committed,044/103] gccrs: Refactor expression hir lowering into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-45-arthur.cohen@embecosm.com/mbox/"},{"id":59995,"url":"https://patchwork.plctlab.org/api/1.2/patches/59995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-46-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:35","name":"[committed,045/103] gccrs: Formatting cleanup in HIR lowering pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-46-arthur.cohen@embecosm.com/mbox/"},{"id":60010,"url":"https://patchwork.plctlab.org/api/1.2/patches/60010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-47-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:36","name":"[committed,046/103] gccrs: Add name resolution for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-47-arthur.cohen@embecosm.com/mbox/"},{"id":60001,"url":"https://patchwork.plctlab.org/api/1.2/patches/60001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-48-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-48-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:37","name":"[committed,047/103] gccrs: Refactor method call type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-48-arthur.cohen@embecosm.com/mbox/"},{"id":59991,"url":"https://patchwork.plctlab.org/api/1.2/patches/59991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-49-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-49-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:38","name":"[committed,048/103] gccrs: Add closures to lints and error checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-49-arthur.cohen@embecosm.com/mbox/"},{"id":60033,"url":"https://patchwork.plctlab.org/api/1.2/patches/60033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-50-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-50-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:39","name":"[committed,049/103] gccrs: Initial Type resolution for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-50-arthur.cohen@embecosm.com/mbox/"},{"id":60036,"url":"https://patchwork.plctlab.org/api/1.2/patches/60036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-51-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-51-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:40","name":"[committed,050/103] gccrs: Closure support at CallExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-51-arthur.cohen@embecosm.com/mbox/"},{"id":60013,"url":"https://patchwork.plctlab.org/api/1.2/patches/60013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-52-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-52-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:41","name":"[committed,051/103] gccrs: Add missing name resolution to Function type-path segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-52-arthur.cohen@embecosm.com/mbox/"},{"id":60020,"url":"https://patchwork.plctlab.org/api/1.2/patches/60020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-53-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-53-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:42","name":"[committed,052/103] gccrs: Add missing hir lowering to function type-path segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-53-arthur.cohen@embecosm.com/mbox/"},{"id":59999,"url":"https://patchwork.plctlab.org/api/1.2/patches/59999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-54-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-54-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:43","name":"[committed,053/103] gccrs: Add missing type resolution for function type segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-54-arthur.cohen@embecosm.com/mbox/"},{"id":60004,"url":"https://patchwork.plctlab.org/api/1.2/patches/60004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-55-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-55-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:44","name":"[committed,054/103] gccrs: Support Closure calls as generic trait bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-55-arthur.cohen@embecosm.com/mbox/"},{"id":60045,"url":"https://patchwork.plctlab.org/api/1.2/patches/60045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-56-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-56-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:45","name":"[committed,055/103] gccrs: Implement the inline visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-56-arthur.cohen@embecosm.com/mbox/"},{"id":60040,"url":"https://patchwork.plctlab.org/api/1.2/patches/60040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-57-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-57-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:46","name":"[committed,056/103] gccrs: rust: Allow gccrs to build on x86_64-apple-darwin with clang/libc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-57-arthur.cohen@embecosm.com/mbox/"},{"id":60024,"url":"https://patchwork.plctlab.org/api/1.2/patches/60024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-58-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-58-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:47","name":"[committed,057/103] gccrs: builtins: Rename all bang macro handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-58-arthur.cohen@embecosm.com/mbox/"},{"id":60012,"url":"https://patchwork.plctlab.org/api/1.2/patches/60012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-59-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-59-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:48","name":"[committed,058/103] gccrs: intrinsics: Add `sorry_handler` intrinsic handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-59-arthur.cohen@embecosm.com/mbox/"},{"id":60019,"url":"https://patchwork.plctlab.org/api/1.2/patches/60019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-60-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-60-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:49","name":"[committed,059/103] gccrs: constexpr: Add `rust_sorry_at` in places relying on init values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-60-arthur.cohen@embecosm.com/mbox/"},{"id":60018,"url":"https://patchwork.plctlab.org/api/1.2/patches/60018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-61-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-61-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:50","name":"[committed,060/103] gccrs: intrinsics: Add early implementation for atomic_store_{seqcst, relaxed, release}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-61-arthur.cohen@embecosm.com/mbox/"},{"id":60009,"url":"https://patchwork.plctlab.org/api/1.2/patches/60009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-62-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-62-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:51","name":"[committed,061/103] gccrs: intrinsics: Add unchecked operation intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-62-arthur.cohen@embecosm.com/mbox/"},{"id":60050,"url":"https://patchwork.plctlab.org/api/1.2/patches/60050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-63-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-63-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:52","name":"[committed,062/103] gccrs: intrinsics: Use lambdas for wrapping_ intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-63-arthur.cohen@embecosm.com/mbox/"},{"id":60022,"url":"https://patchwork.plctlab.org/api/1.2/patches/60022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-64-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-64-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:53","name":"[committed,063/103] gccrs: intrinsics: Cleanup error handling around atomic_store_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-64-arthur.cohen@embecosm.com/mbox/"},{"id":60035,"url":"https://patchwork.plctlab.org/api/1.2/patches/60035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-65-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-65-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:54","name":"[committed,064/103] gccrs: intrinsics: Implement atomic_load intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-65-arthur.cohen@embecosm.com/mbox/"},{"id":60032,"url":"https://patchwork.plctlab.org/api/1.2/patches/60032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-66-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-66-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:55","name":"[committed,065/103] gccrs: ast: visitor pattern -> overload syntax compatibility layer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-66-arthur.cohen@embecosm.com/mbox/"},{"id":60027,"url":"https://patchwork.plctlab.org/api/1.2/patches/60027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-67-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-67-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:56","name":"[committed,066/103] gccrs: ast: transform helper methods to visits and add methods to simplify repeated patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-67-arthur.cohen@embecosm.com/mbox/"},{"id":60054,"url":"https://patchwork.plctlab.org/api/1.2/patches/60054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-68-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-68-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:57","name":"[committed,067/103] gccrs: ast: refer correctly to arguments in docs-strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-68-arthur.cohen@embecosm.com/mbox/"},{"id":60039,"url":"https://patchwork.plctlab.org/api/1.2/patches/60039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-69-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-69-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:58","name":"[committed,068/103] gccrs: ast: Dump unit struct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-69-arthur.cohen@embecosm.com/mbox/"},{"id":60056,"url":"https://patchwork.plctlab.org/api/1.2/patches/60056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-70-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-70-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:59","name":"[committed,069/103] gccrs: add lang item \"phantom_data\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-70-arthur.cohen@embecosm.com/mbox/"},{"id":60034,"url":"https://patchwork.plctlab.org/api/1.2/patches/60034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-71-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-71-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:00","name":"[committed,070/103] gccrs: add Location to AST::Visibility","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-71-arthur.cohen@embecosm.com/mbox/"},{"id":60060,"url":"https://patchwork.plctlab.org/api/1.2/patches/60060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-72-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-72-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:01","name":"[committed,071/103] gccrs: typecheck: Fix overzealous `delete` call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-72-arthur.cohen@embecosm.com/mbox/"},{"id":60038,"url":"https://patchwork.plctlab.org/api/1.2/patches/60038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-73-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-73-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:02","name":"[committed,072/103] gccrs: ast: add visit overload for references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-73-arthur.cohen@embecosm.com/mbox/"},{"id":60023,"url":"https://patchwork.plctlab.org/api/1.2/patches/60023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-74-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-74-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:03","name":"[committed,073/103] gccrs: ast: Dump where clause and recursively needed nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-74-arthur.cohen@embecosm.com/mbox/"},{"id":60064,"url":"https://patchwork.plctlab.org/api/1.2/patches/60064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-75-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-75-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:04","name":"[committed,074/103] gccrs: ast: Dump slice type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-75-arthur.cohen@embecosm.com/mbox/"},{"id":60042,"url":"https://patchwork.plctlab.org/api/1.2/patches/60042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-76-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-76-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:05","name":"[committed,075/103] gccrs: ast: Dump array type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-76-arthur.cohen@embecosm.com/mbox/"},{"id":60031,"url":"https://patchwork.plctlab.org/api/1.2/patches/60031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-77-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-77-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:06","name":"[committed,076/103] gccrs: ast: Dump raw pointer type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-77-arthur.cohen@embecosm.com/mbox/"},{"id":60046,"url":"https://patchwork.plctlab.org/api/1.2/patches/60046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-78-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-78-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:07","name":"[committed,077/103] gccrs: ast: Dump never type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-78-arthur.cohen@embecosm.com/mbox/"},{"id":60066,"url":"https://patchwork.plctlab.org/api/1.2/patches/60066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-79-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-79-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:08","name":"[committed,078/103] gccrs: ast: Dump tuple type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-79-arthur.cohen@embecosm.com/mbox/"},{"id":60049,"url":"https://patchwork.plctlab.org/api/1.2/patches/60049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-80-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-80-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:09","name":"[committed,079/103] gccrs: ast: Dump inferred type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-80-arthur.cohen@embecosm.com/mbox/"},{"id":60043,"url":"https://patchwork.plctlab.org/api/1.2/patches/60043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-81-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-81-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:10","name":"[committed,080/103] gccrs: ast: Dump bare function type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-81-arthur.cohen@embecosm.com/mbox/"},{"id":60068,"url":"https://patchwork.plctlab.org/api/1.2/patches/60068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-82-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-82-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:11","name":"[committed,081/103] gccrs: ast: Dump impl trait type one bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-82-arthur.cohen@embecosm.com/mbox/"},{"id":60037,"url":"https://patchwork.plctlab.org/api/1.2/patches/60037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-83-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-83-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:12","name":"[committed,082/103] gccrs: ast: Dump impl trait type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-83-arthur.cohen@embecosm.com/mbox/"},{"id":60041,"url":"https://patchwork.plctlab.org/api/1.2/patches/60041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-84-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-84-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:13","name":"[committed,083/103] gccrs: ast: Dump trait object type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-84-arthur.cohen@embecosm.com/mbox/"},{"id":60053,"url":"https://patchwork.plctlab.org/api/1.2/patches/60053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-85-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-85-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:14","name":"[committed,084/103] gccrs: ast: Dump parenthesised type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-85-arthur.cohen@embecosm.com/mbox/"},{"id":60044,"url":"https://patchwork.plctlab.org/api/1.2/patches/60044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-86-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-86-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:15","name":"[committed,085/103] gccrs: ast: Dump trait object type one bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-86-arthur.cohen@embecosm.com/mbox/"},{"id":60057,"url":"https://patchwork.plctlab.org/api/1.2/patches/60057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-87-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-87-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:16","name":"[committed,086/103] gccrs: ast: Dump type param type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-87-arthur.cohen@embecosm.com/mbox/"},{"id":60071,"url":"https://patchwork.plctlab.org/api/1.2/patches/60071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-88-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-88-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:17","name":"[committed,087/103] gccrs: ast: Dump generic parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-88-arthur.cohen@embecosm.com/mbox/"},{"id":60074,"url":"https://patchwork.plctlab.org/api/1.2/patches/60074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-89-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-89-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:18","name":"[committed,088/103] gccrs: ast: Remove unused include in rust-ast-dump.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-89-arthur.cohen@embecosm.com/mbox/"},{"id":60059,"url":"https://patchwork.plctlab.org/api/1.2/patches/60059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-90-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-90-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:19","name":"[committed,089/103] gccrs: ast: Dump remove /* stmp */ comment to not clutter the dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-90-arthur.cohen@embecosm.com/mbox/"},{"id":60047,"url":"https://patchwork.plctlab.org/api/1.2/patches/60047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-91-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-91-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:20","name":"[committed,090/103] gccrs: ast: Dump no comma after self in fn params if it is the last one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-91-arthur.cohen@embecosm.com/mbox/"},{"id":60062,"url":"https://patchwork.plctlab.org/api/1.2/patches/60062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-92-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-92-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:21","name":"[committed,091/103] gccrs: Remove default location. Add visibility location to create_* functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-92-arthur.cohen@embecosm.com/mbox/"},{"id":60077,"url":"https://patchwork.plctlab.org/api/1.2/patches/60077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-93-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-93-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:22","name":"[committed,092/103] gccrs: Improve lexer dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-93-arthur.cohen@embecosm.com/mbox/"},{"id":60048,"url":"https://patchwork.plctlab.org/api/1.2/patches/60048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-94-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-94-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:23","name":"[committed,093/103] gccrs: Get rid of make builtin macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-94-arthur.cohen@embecosm.com/mbox/"},{"id":60055,"url":"https://patchwork.plctlab.org/api/1.2/patches/60055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-95-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-95-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:24","name":"[committed,094/103] gccrs: Refactor name resolver to take a Rib::ItemType","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-95-arthur.cohen@embecosm.com/mbox/"},{"id":60051,"url":"https://patchwork.plctlab.org/api/1.2/patches/60051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-96-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-96-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:25","name":"[committed,095/103] gccrs: Add closure binding'\''s tracking to name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-96-arthur.cohen@embecosm.com/mbox/"},{"id":60079,"url":"https://patchwork.plctlab.org/api/1.2/patches/60079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-97-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-97-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:26","name":"[committed,096/103] gccrs: Add capture tracking to the type info for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-97-arthur.cohen@embecosm.com/mbox/"},{"id":60052,"url":"https://patchwork.plctlab.org/api/1.2/patches/60052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-98-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-98-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:27","name":"[committed,097/103] gccrs: Add initial support for argument capture of closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-98-arthur.cohen@embecosm.com/mbox/"},{"id":60080,"url":"https://patchwork.plctlab.org/api/1.2/patches/60080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-99-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-99-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:28","name":"[committed,098/103] gccrs: Fix undefined behaviour issues on macos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-99-arthur.cohen@embecosm.com/mbox/"},{"id":60065,"url":"https://patchwork.plctlab.org/api/1.2/patches/60065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-100-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-100-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:29","name":"[committed,099/103] gccrs: Skip this debug test case which is failing on the latest mac-os devtools and its only for debug info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-100-arthur.cohen@embecosm.com/mbox/"},{"id":60061,"url":"https://patchwork.plctlab.org/api/1.2/patches/60061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-101-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-101-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:30","name":"[committed,100/103] gccrs: Cleanup unused parameters to fix the bootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-101-arthur.cohen@embecosm.com/mbox/"},{"id":60067,"url":"https://patchwork.plctlab.org/api/1.2/patches/60067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-102-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-102-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:31","name":"[committed,101/103] gccrs: Repair '\''gcc/rust/lang.opt'\'' comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-102-arthur.cohen@embecosm.com/mbox/"},{"id":60070,"url":"https://patchwork.plctlab.org/api/1.2/patches/60070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-103-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-103-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:32","name":"[committed,102/103] gccrs: const evaluator: Remove get_nth_callarg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-103-arthur.cohen@embecosm.com/mbox/"},{"id":60058,"url":"https://patchwork.plctlab.org/api/1.2/patches/60058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-104-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-104-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:33","name":"[committed,103/103] gccrs: add math intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-104-arthur.cohen@embecosm.com/mbox/"},{"id":60082,"url":"https://patchwork.plctlab.org/api/1.2/patches/60082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221124800.25BFD13223@imap2.suse-dmz.suse.de/","msgid":"<20230221124800.25BFD13223@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T12:47:59","name":"tree-optimization/108691 - remove trigger-happy assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221124800.25BFD13223@imap2.suse-dmz.suse.de/mbox/"},{"id":60084,"url":"https://patchwork.plctlab.org/api/1.2/patches/60084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkln6uxx.fsf@euler.schwinge.homeip.net/","msgid":"<87bkln6uxx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-21T12:53:46","name":"Update copyright years. (was: [committed 003/103] gccrs: dump: Emit visibility when dumping items)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkln6uxx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60102,"url":"https://patchwork.plctlab.org/api/1.2/patches/60102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141405.1798120-1-ibuclaw@gdcproject.org/","msgid":"<20230221141405.1798120-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:14:05","name":"[committed] libphobos: Add @nogc to gcc.backtrace and gcc.libbacktrace modules.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141405.1798120-1-ibuclaw@gdcproject.org/mbox/"},{"id":60104,"url":"https://patchwork.plctlab.org/api/1.2/patches/60104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141900.1802009-1-ibuclaw@gdcproject.org/","msgid":"<20230221141900.1802009-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:19:00","name":"[committed] d: Set doing_semantic_analysis_p before calling functionSemantic3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141900.1802009-1-ibuclaw@gdcproject.org/mbox/"},{"id":60107,"url":"https://patchwork.plctlab.org/api/1.2/patches/60107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221142350.1806182-1-ibuclaw@gdcproject.org/","msgid":"<20230221142350.1806182-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:23:50","name":"[committed] d: Only handle the left-to-right evaluation of a call expression during gimplify","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221142350.1806182-1-ibuclaw@gdcproject.org/mbox/"},{"id":60114,"url":"https://patchwork.plctlab.org/api/1.2/patches/60114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221143536.1818454-1-ibuclaw@gdcproject.org/","msgid":"<20230221143536.1818454-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:35:36","name":"[committed] d: Merge upstream dmd, druntime 09faa4eacd, phobos 13ef27a56.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221143536.1818454-1-ibuclaw@gdcproject.org/mbox/"},{"id":60115,"url":"https://patchwork.plctlab.org/api/1.2/patches/60115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7pncc66.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-21T14:42:41","name":"[1/2] ipa-cp: Fix various issues in update_specialized_profile (PR 107925)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7pncc66.fsf@suse.cz/mbox/"},{"id":60116,"url":"https://patchwork.plctlab.org/api/1.2/patches/60116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt57cc64.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-21T14:42:43","name":"[2/2] ipa-cp: Improve updating behavior when profile counts have gone bad","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt57cc64.fsf@suse.cz/mbox/"},{"id":60117,"url":"https://patchwork.plctlab.org/api/1.2/patches/60117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221144604.2128750-1-qing.zhao@oracle.com/","msgid":"<20230221144604.2128750-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-21T14:46:04","name":"[V2] Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221144604.2128750-1-qing.zhao@oracle.com/mbox/"},{"id":60129,"url":"https://patchwork.plctlab.org/api/1.2/patches/60129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86pma3nipf.fsf@aarsen.me/","msgid":"<86pma3nipf.fsf@aarsen.me>","list_archive_url":null,"date":"2023-02-21T14:59:37","name":"Ping^2: [PATCH+wwwdocs 0/8] A small Texinfo refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86pma3nipf.fsf@aarsen.me/mbox/"},{"id":60227,"url":"https://patchwork.plctlab.org/api/1.2/patches/60227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221191036.1140927-1-ppalka@redhat.com/","msgid":"<20230221191036.1140927-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-21T19:10:36","name":"c++: more mce_false folding from cp_fully_fold_init [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221191036.1140927-1-ppalka@redhat.com/mbox/"},{"id":60263,"url":"https://patchwork.plctlab.org/api/1.2/patches/60263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a066b400-95d8-49cf-9f44-9cacacb8ff0f-1677014338288@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-02-21T21:18:58","name":"Fortran: reject invalid CHARACTER length of derived type components [PR96024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a066b400-95d8-49cf-9f44-9cacacb8ff0f-1677014338288@3c-app-gmx-bs33/mbox/"},{"id":60271,"url":"https://patchwork.plctlab.org/api/1.2/patches/60271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221215622.3077474-1-jcmvbkbc@gmail.com/","msgid":"<20230221215622.3077474-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-21T21:56:22","name":"[COMMITTED] gcc: xtensa: fix PR target/108876","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221215622.3077474-1-jcmvbkbc@gmail.com/mbox/"},{"id":60272,"url":"https://patchwork.plctlab.org/api/1.2/patches/60272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221220733.2068735-1-dmalcolm@redhat.com/","msgid":"<20230221220733.2068735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-21T22:07:33","name":"[pushed] analyzer: stop exploring the path after certain diagnostics [PR108830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221220733.2068735-1-dmalcolm@redhat.com/mbox/"},{"id":60285,"url":"https://patchwork.plctlab.org/api/1.2/patches/60285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com/","msgid":"<3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com>","list_archive_url":null,"date":"2023-02-21T23:02:32","name":"vect: Check that vector factor is a compile-time constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com/mbox/"},{"id":60348,"url":"https://patchwork.plctlab.org/api/1.2/patches/60348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com/","msgid":"<7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com>","list_archive_url":null,"date":"2023-02-22T06:06:23","name":"libstdc++: Limit allocations in _Rb_tree 1/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com/mbox/"},{"id":60350,"url":"https://patchwork.plctlab.org/api/1.2/patches/60350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com/","msgid":"<98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com>","list_archive_url":null,"date":"2023-02-22T06:08:24","name":"libstdc++: Limit allocations in _Rb_tree 2/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com/mbox/"},{"id":60376,"url":"https://patchwork.plctlab.org/api/1.2/patches/60376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XbFF0VQV9htP5E@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:06:28","name":"c++: Don'\''t recurse on DECL_INITIAL for DECL_EXPR on non-VAR_DECLs [PR108606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XbFF0VQV9htP5E@tucnak/mbox/"},{"id":60378,"url":"https://patchwork.plctlab.org/api/1.2/patches/60378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XclksRe7Btwfim@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:12:54","name":"cgraph: Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE in more spots [PR106258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XclksRe7Btwfim@tucnak/mbox/"},{"id":60379,"url":"https://patchwork.plctlab.org/api/1.2/patches/60379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XfcHZqlRUGJ+GQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:25:04","name":"cygwin: Don'\''t try to support multilibs [PR107998]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XfcHZqlRUGJ+GQ@tucnak/mbox/"},{"id":60455,"url":"https://patchwork.plctlab.org/api/1.2/patches/60455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwa6o46.fsf@euler.schwinge.homeip.net/","msgid":"<877cwa6o46.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-22T09:33:29","name":"Rust: Move void_list_node init to common code (was: [PATCH] Move void_list_node init to common code)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwa6o46.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60434,"url":"https://patchwork.plctlab.org/api/1.2/patches/60434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222094351.1075-1-jinma@linux.alibaba.com/","msgid":"<20230222094351.1075-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-22T09:43:51","name":"RISC-V: When the TARGET_COMPUTE_MULTILIB hook is implemented, check the version of each extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222094351.1075-1-jinma@linux.alibaba.com/mbox/"},{"id":60458,"url":"https://patchwork.plctlab.org/api/1.2/patches/60458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222102609.1099-1-jinma@linux.alibaba.com/","msgid":"<20230222102609.1099-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-22T10:26:09","name":"RISC-V: Don'\''t report an error until the link phase if suitable multilib isn'\''t found.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222102609.1099-1-jinma@linux.alibaba.com/mbox/"},{"id":60459,"url":"https://patchwork.plctlab.org/api/1.2/patches/60459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3af129a-55d1-663d-0177-08bfd51c4895@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-22T10:59:06","name":"[wwwdocs] OpenMP update for gcc-13/changes.html + projects/gomp/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3af129a-55d1-663d-0177-08bfd51c4895@codesourcery.com/mbox/"},{"id":60460,"url":"https://patchwork.plctlab.org/api/1.2/patches/60460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/X2sryMfD4FufBF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T11:04:18","name":"tree: Add 3 argument fndecl_built_in_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/X2sryMfD4FufBF@tucnak/mbox/"},{"id":60471,"url":"https://patchwork.plctlab.org/api/1.2/patches/60471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qmi6iya.fsf@euler.schwinge.homeip.net/","msgid":"<871qmi6iya.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-22T11:25:01","name":"Rust: In '\''type_for_mode'\'' langhook also consider all '\''int_n'\'' modes/types (was: Modula-2 / Rust: Many targets failing)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qmi6iya.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60514,"url":"https://patchwork.plctlab.org/api/1.2/patches/60514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222121904.4087522-1-Yash.Shinde@windriver.com/","msgid":"<20230222121904.4087522-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:19:04","name":"Share work directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222121904.4087522-1-Yash.Shinde@windriver.com/mbox/"},{"id":60515,"url":"https://patchwork.plctlab.org/api/1.2/patches/60515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122114.47958-1-kito.cheng@sifive.com/","msgid":"<20230222122114.47958-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-22T12:21:14","name":"[committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122114.47958-1-kito.cheng@sifive.com/mbox/"},{"id":60516,"url":"https://patchwork.plctlab.org/api/1.2/patches/60516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122333.28218-1-Yash.Shinde@windriver.com/","msgid":"<20230222122333.28218-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:23:33","name":"libgcc_s: Use alias for __cpu_indicator_init instead of symver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122333.28218-1-Yash.Shinde@windriver.com/mbox/"},{"id":60517,"url":"https://patchwork.plctlab.org/api/1.2/patches/60517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222123411.419584-1-Yash.Shinde@windriver.com/","msgid":"<20230222123411.419584-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:34:11","name":"Pass CXXFLAGS_FOR_BUILD to avoid build failure errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222123411.419584-1-Yash.Shinde@windriver.com/mbox/"},{"id":60640,"url":"https://patchwork.plctlab.org/api/1.2/patches/60640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/Zf9GkrxxWxG8Eo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T18:33:24","name":"tree, v2: Add 3 argument fndecl_built_in_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/Zf9GkrxxWxG8Eo@tucnak/mbox/"},{"id":60671,"url":"https://patchwork.plctlab.org/api/1.2/patches/60671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222194509.3606756-1-ppalka@redhat.com/","msgid":"<20230222194509.3606756-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-22T19:45:09","name":"c++: unevaluated array new-expr size constantness [PR108219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222194509.3606756-1-ppalka@redhat.com/mbox/"},{"id":60713,"url":"https://patchwork.plctlab.org/api/1.2/patches/60713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222223745.166070-1-polacek@redhat.com/","msgid":"<20230222223745.166070-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-22T22:37:45","name":"c-family: avoid compile-time-hog in c_genericize [PR108880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222223745.166070-1-polacek@redhat.com/mbox/"},{"id":60715,"url":"https://patchwork.plctlab.org/api/1.2/patches/60715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222225913.7BAC233E54@hamza.pair.com/","msgid":"<20230222225913.7BAC233E54@hamza.pair.com>","list_archive_url":null,"date":"2023-02-22T22:59:06","name":"[pushed] wwwdocs: gcc-9: Various changes around -flive-patching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222225913.7BAC233E54@hamza.pair.com/mbox/"},{"id":60726,"url":"https://patchwork.plctlab.org/api/1.2/patches/60726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222235812.185722-1-polacek@redhat.com/","msgid":"<20230222235812.185722-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-22T23:58:12","name":"c++: variable template and targ deduction [PR108550]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222235812.185722-1-polacek@redhat.com/mbox/"},{"id":60771,"url":"https://patchwork.plctlab.org/api/1.2/patches/60771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfe3ee6-f897-1939-05ea-3e427ad53ae6@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-23T03:41:40","name":"[1/2] xtensa: Fix non-fatal regression introduced by b2ef02e8cbbaf95fee98be255f697f47193960ec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfe3ee6-f897-1939-05ea-3e427ad53ae6@yahoo.co.jp/mbox/"},{"id":60772,"url":"https://patchwork.plctlab.org/api/1.2/patches/60772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3fdecfb-5560-97a5-327d-7db751fe6ec1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-23T03:42:32","name":"[2/2] xtensa: Fix missing mode warnings in machine description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3fdecfb-5560-97a5-327d-7db751fe6ec1@yahoo.co.jp/mbox/"},{"id":60803,"url":"https://patchwork.plctlab.org/api/1.2/patches/60803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/cOFKwwDsz+DgAO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T06:56:20","name":"ipa-prop: Fix another case of missing BUILT_IN_UNREACHABLE_TRAP handling [PR106258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/cOFKwwDsz+DgAO@tucnak/mbox/"},{"id":60854,"url":"https://patchwork.plctlab.org/api/1.2/patches/60854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7492903.EvYhyI6sBW@minbar/","msgid":"<7492903.EvYhyI6sBW@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:19","name":"[1/8] libstdc++: Simplify three helper functions into one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7492903.EvYhyI6sBW@minbar/mbox/"},{"id":60851,"url":"https://patchwork.plctlab.org/api/1.2/patches/60851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3152270.5fSG56mABF@minbar/","msgid":"<3152270.5fSG56mABF@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:29","name":"[2/8] libstdc++: Fix simd build failure on clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3152270.5fSG56mABF@minbar/mbox/"},{"id":60853,"url":"https://patchwork.plctlab.org/api/1.2/patches/60853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1944554.usQuhbGJ8B@minbar/","msgid":"<1944554.usQuhbGJ8B@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:43","name":"[3/8] libstdc++: More efficient masked inc-/decrement implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1944554.usQuhbGJ8B@minbar/mbox/"},{"id":60848,"url":"https://patchwork.plctlab.org/api/1.2/patches/60848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2550642.Lt9SDvczpP@minbar/","msgid":"<2550642.Lt9SDvczpP@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:51","name":"[4/8] libstdc++: Add missing constexpr on simd shift implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2550642.Lt9SDvczpP@minbar/mbox/"},{"id":60852,"url":"https://patchwork.plctlab.org/api/1.2/patches/60852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3667544.MHq7AAxBmi@minbar/","msgid":"<3667544.MHq7AAxBmi@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:57","name":"[5/8] libstdc++: Always-inline most of non-cmath fixed_size implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3667544.MHq7AAxBmi@minbar/mbox/"},{"id":60850,"url":"https://patchwork.plctlab.org/api/1.2/patches/60850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2147606.Icojqenx9y@minbar/","msgid":"<2147606.Icojqenx9y@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:02","name":"[6/8] libstdc++: Fix formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2147606.Icojqenx9y@minbar/mbox/"},{"id":60849,"url":"https://patchwork.plctlab.org/api/1.2/patches/60849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/838576767.0ifERbkFSE@minbar/","msgid":"<838576767.0ifERbkFSE@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:10","name":"[7/8] libstdc++: Fix -Wsign-compare issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/838576767.0ifERbkFSE@minbar/mbox/"},{"id":60847,"url":"https://patchwork.plctlab.org/api/1.2/patches/60847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2166927.NgBsaNRSFp@minbar/","msgid":"<2166927.NgBsaNRSFp@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:16","name":"[8/8] libstdc++: Test that integral simd reductions are precise","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2166927.NgBsaNRSFp@minbar/mbox/"},{"id":60866,"url":"https://patchwork.plctlab.org/api/1.2/patches/60866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223092935.579700-1-chenglulu@loongson.cn/","msgid":"<20230223092935.579700-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-02-23T09:29:36","name":"[v2] LoongArch: Change the value of macro TRY_EMPTY_VM_SPACE from 0x8000000000 to 0x1000000000.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223092935.579700-1-chenglulu@loongson.cn/mbox/"},{"id":60868,"url":"https://patchwork.plctlab.org/api/1.2/patches/60868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-1-jcmvbkbc@gmail.com/","msgid":"<20230223093726.3258958-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-23T09:37:25","name":"[COMMITTED,1/2] Revert \"gcc: xtensa: fix PR target/108876\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-1-jcmvbkbc@gmail.com/mbox/"},{"id":60867,"url":"https://patchwork.plctlab.org/api/1.2/patches/60867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-2-jcmvbkbc@gmail.com/","msgid":"<20230223093726.3258958-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-23T09:37:26","name":"[COMMITTED,2/2] xtensa: fix PR target/108876","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-2-jcmvbkbc@gmail.com/mbox/"},{"id":60883,"url":"https://patchwork.plctlab.org/api/1.2/patches/60883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223101014.B2D2E13928@imap2.suse-dmz.suse.de/","msgid":"<20230223101014.B2D2E13928@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T10:10:14","name":"tree-optimization/108888 - call if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223101014.B2D2E13928@imap2.suse-dmz.suse.de/mbox/"},{"id":60886,"url":"https://patchwork.plctlab.org/api/1.2/patches/60886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c+mpY9VdAiIVFO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:23:22","name":"c++: Add target hook for emit_support_tinfos [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c+mpY9VdAiIVFO@tucnak/mbox/"},{"id":60887,"url":"https://patchwork.plctlab.org/api/1.2/patches/60887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c/U4Y3wDN/K+uc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:26:27","name":"c++: Fix up -fcontracts option description [PR108890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c/U4Y3wDN/K+uc@tucnak/mbox/"},{"id":60888,"url":"https://patchwork.plctlab.org/api/1.2/patches/60888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-2-arsen@aarsen.me/","msgid":"<20230223102714.3606058-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:10","name":"[v2,1/5] docs: Create Indices appendix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-2-arsen@aarsen.me/mbox/"},{"id":60892,"url":"https://patchwork.plctlab.org/api/1.2/patches/60892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-3-arsen@aarsen.me/","msgid":"<20230223102714.3606058-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:11","name":"[v2,2/5] **/*.texi: Reorder index entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-3-arsen@aarsen.me/mbox/"},{"id":60890,"url":"https://patchwork.plctlab.org/api/1.2/patches/60890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-4-arsen@aarsen.me/","msgid":"<20230223102714.3606058-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:12","name":"[v2,3/5] doc: Add @defbuiltin family of helpers, set documentlanguage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-4-arsen@aarsen.me/mbox/"},{"id":60891,"url":"https://patchwork.plctlab.org/api/1.2/patches/60891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-5-arsen@aarsen.me/","msgid":"<20230223102714.3606058-5-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:13","name":"[v2,4/5] Update texinfo.tex, remove the @gol macro/alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-5-arsen@aarsen.me/mbox/"},{"id":60889,"url":"https://patchwork.plctlab.org/api/1.2/patches/60889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-6-arsen@aarsen.me/","msgid":"<20230223102714.3606058-6-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:14","name":"[v2,5/5] update_web_docs_git: Update CSS reference to new manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-6-arsen@aarsen.me/mbox/"},{"id":60893,"url":"https://patchwork.plctlab.org/api/1.2/patches/60893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/dBSvWvHlyViuhb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:34:50","name":"xtensa: Fix up fatal_error message strings in xtensa-dynconfig.c [PR108890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/dBSvWvHlyViuhb@tucnak/mbox/"},{"id":60906,"url":"https://patchwork.plctlab.org/api/1.2/patches/60906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223110326.2D39C139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223110326.2D39C139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T11:03:25","name":"Fix memory leak in if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223110326.2D39C139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60920,"url":"https://patchwork.plctlab.org/api/1.2/patches/60920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223114826.79148-1-sebastian.huber@embedded-brains.de/","msgid":"<20230223114826.79148-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-02-23T11:48:26","name":"[gcc] RTEMS: Tune multilib selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223114826.79148-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":60945,"url":"https://patchwork.plctlab.org/api/1.2/patches/60945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com/","msgid":"<80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com>","list_archive_url":null,"date":"2023-02-23T12:16:52","name":"[committed,OG12] libgomp: no need to attach USM pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com/mbox/"},{"id":60958,"url":"https://patchwork.plctlab.org/api/1.2/patches/60958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223125427.DA402139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223125427.DA402139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T12:54:27","name":"Avoid default-initializing auto_vec storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223125427.DA402139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60959,"url":"https://patchwork.plctlab.org/api/1.2/patches/60959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223132126.96E7E139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223132126.96E7E139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T13:21:26","name":"Fix memory leak in PTA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223132126.96E7E139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60998,"url":"https://patchwork.plctlab.org/api/1.2/patches/60998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C9BEE9EF-2C2F-43F9-B848-99D08D4C6ED9@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-02-23T14:12:46","name":"[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C9BEE9EF-2C2F-43F9-B848-99D08D4C6ED9@oracle.com/mbox/"},{"id":61001,"url":"https://patchwork.plctlab.org/api/1.2/patches/61001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com/","msgid":"<89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com>","list_archive_url":null,"date":"2023-02-23T14:14:24","name":"[v3,2/2] Update documentation to clarify a GCC extension (PR77650)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com/mbox/"},{"id":61004,"url":"https://patchwork.plctlab.org/api/1.2/patches/61004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/d1nMrKs775Bfs+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T14:18:04","name":"testsuite: Fix up modules.exp [PR108899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/d1nMrKs775Bfs+@tucnak/mbox/"},{"id":61013,"url":"https://patchwork.plctlab.org/api/1.2/patches/61013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982579B72C4CEE0A3C1BC9983AB9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-23T15:11:39","name":"libatomic: Fix SEQ_CST 128-bit atomic load [PR108891]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982579B72C4CEE0A3C1BC9983AB9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":61039,"url":"https://patchwork.plctlab.org/api/1.2/patches/61039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223173741.532305-1-jwakely@redhat.com/","msgid":"<20230223173741.532305-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-23T17:37:41","name":"libstdc++: Add Doxygen comment for string::resize_and_overwite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223173741.532305-1-jwakely@redhat.com/mbox/"},{"id":61084,"url":"https://patchwork.plctlab.org/api/1.2/patches/61084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com/","msgid":"<860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com>","list_archive_url":null,"date":"2023-02-23T21:14:48","name":"Fix std::unordered_map key range insertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com/mbox/"},{"id":61086,"url":"https://patchwork.plctlab.org/api/1.2/patches/61086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223215245.1513700-1-ppalka@redhat.com/","msgid":"<20230223215245.1513700-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-23T21:52:45","name":"c++: non-dependent variable template-id [PR108848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223215245.1513700-1-ppalka@redhat.com/mbox/"},{"id":61091,"url":"https://patchwork.plctlab.org/api/1.2/patches/61091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223235133.140864-1-polacek@redhat.com/","msgid":"<20230223235133.140864-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-23T23:51:33","name":"c++: ICE with constexpr variable template [PR107938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223235133.140864-1-polacek@redhat.com/mbox/"},{"id":61093,"url":"https://patchwork.plctlab.org/api/1.2/patches/61093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-1-jcmvbkbc@gmail.com/","msgid":"<20230224000005.3355736-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-24T00:00:04","name":"[COMMITTED,1/2] gcc: xtensa: rename xtensa-dynconfig.c and update its build rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-1-jcmvbkbc@gmail.com/mbox/"},{"id":61092,"url":"https://patchwork.plctlab.org/api/1.2/patches/61092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-2-jcmvbkbc@gmail.com/","msgid":"<20230224000005.3355736-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-24T00:00:05","name":"[COMMITTED,2/2] gcc: xtensa: update include style in xtensa-dynconfig.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-2-jcmvbkbc@gmail.com/mbox/"},{"id":61104,"url":"https://patchwork.plctlab.org/api/1.2/patches/61104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224022439.18998-1-palmer@rivosinc.com/","msgid":"<20230224022439.18998-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-02-24T02:24:39","name":"RISC-V: Disable attribute generation by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224022439.18998-1-palmer@rivosinc.com/mbox/"},{"id":61125,"url":"https://patchwork.plctlab.org/api/1.2/patches/61125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-2-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:17","name":"[v3,01/11] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-2-christoph.muellner@vrull.eu/mbox/"},{"id":61124,"url":"https://patchwork.plctlab.org/api/1.2/patches/61124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-3-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:18","name":"[v3,02/11] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-3-christoph.muellner@vrull.eu/mbox/"},{"id":61129,"url":"https://patchwork.plctlab.org/api/1.2/patches/61129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-4-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:19","name":"[v3,03/11] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-4-christoph.muellner@vrull.eu/mbox/"},{"id":61123,"url":"https://patchwork.plctlab.org/api/1.2/patches/61123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-5-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:20","name":"[v3,04/11] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-5-christoph.muellner@vrull.eu/mbox/"},{"id":61127,"url":"https://patchwork.plctlab.org/api/1.2/patches/61127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-6-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:21","name":"[v3,05/11] riscv: thead: Add support for the XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-6-christoph.muellner@vrull.eu/mbox/"},{"id":61128,"url":"https://patchwork.plctlab.org/api/1.2/patches/61128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-7-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:22","name":"[v3,06/11] riscv: thead: Add support for the XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-7-christoph.muellner@vrull.eu/mbox/"},{"id":61126,"url":"https://patchwork.plctlab.org/api/1.2/patches/61126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-8-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:23","name":"[v3,07/11] riscv: thead: Add support for the XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-8-christoph.muellner@vrull.eu/mbox/"},{"id":61131,"url":"https://patchwork.plctlab.org/api/1.2/patches/61131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-9-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:24","name":"[v3,08/11] riscv: thead: Add support for the XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-9-christoph.muellner@vrull.eu/mbox/"},{"id":61132,"url":"https://patchwork.plctlab.org/api/1.2/patches/61132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-10-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:25","name":"[v3,09/11] riscv: thead: Add support for the XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-10-christoph.muellner@vrull.eu/mbox/"},{"id":61133,"url":"https://patchwork.plctlab.org/api/1.2/patches/61133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-11-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-11-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:26","name":"[v3,10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-11-christoph.muellner@vrull.eu/mbox/"},{"id":61130,"url":"https://patchwork.plctlab.org/api/1.2/patches/61130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-12-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-12-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:27","name":"[v3,11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-12-christoph.muellner@vrull.eu/mbox/"},{"id":61165,"url":"https://patchwork.plctlab.org/api/1.2/patches/61165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224072835.12177-1-vit.kabele@sysgo.com/","msgid":"<20230224072835.12177-1-vit.kabele@sysgo.com>","list_archive_url":null,"date":"2023-02-24T07:28:36","name":"[v2] Print padding size when aligning struct member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224072835.12177-1-vit.kabele@sysgo.com/mbox/"},{"id":61181,"url":"https://patchwork.plctlab.org/api/1.2/patches/61181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8632fa5-8f26-970d-0f57-dc7bed6d42e4@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-24T08:20:26","name":"[(pushed)] libsanitizer: cherry-pick commit 8f5962b1ccb5fcd4d4544121d43efb860ac3cc6d from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8632fa5-8f26-970d-0f57-dc7bed6d42e4@suse.cz/mbox/"},{"id":61186,"url":"https://patchwork.plctlab.org/api/1.2/patches/61186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224083008.1082527-1-guojiufu@linux.ibm.com/","msgid":"<20230224083008.1082527-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-24T08:30:08","name":"use subreg for movsf_from_si and remove UNSPEC_SF_FROM_SI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224083008.1082527-1-guojiufu@linux.ibm.com/mbox/"},{"id":61189,"url":"https://patchwork.plctlab.org/api/1.2/patches/61189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz/","msgid":"<7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz>","list_archive_url":null,"date":"2023-02-24T09:00:01","name":"asan: adjust module name for global variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz/mbox/"},{"id":61203,"url":"https://patchwork.plctlab.org/api/1.2/patches/61203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iDFmMergDAsy+2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T09:27:50","name":"[committed] i386: Fix up builtins used in avx512bf16vlintrin.h [PR108881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iDFmMergDAsy+2@tucnak/mbox/"},{"id":61204,"url":"https://patchwork.plctlab.org/api/1.2/patches/61204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iFEoRtKXyRe46M@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T09:36:18","name":"cgraphclones: Don'\''t share DECL_ARGUMENTS between thunk and its artificial thunk [PR108854]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iFEoRtKXyRe46M@tucnak/mbox/"},{"id":61275,"url":"https://patchwork.plctlab.org/api/1.2/patches/61275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224111908.92419-1-christoph.muellner@vrull.eu/","msgid":"<20230224111908.92419-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T11:19:08","name":"[wwwdocs] gcc-13: riscv: Document the T-Head CPU support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224111908.92419-1-christoph.muellner@vrull.eu/mbox/"},{"id":61276,"url":"https://patchwork.plctlab.org/api/1.2/patches/61276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com/","msgid":"<07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com>","list_archive_url":null,"date":"2023-02-24T11:31:59","name":"Fortran: Skip bound conv in gfc_conv_gfc_desc_to_cfi_desc with intent(out) ptr [PR108621]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com/mbox/"},{"id":61277,"url":"https://patchwork.plctlab.org/api/1.2/patches/61277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224113245.9645013246@imap2.suse-dmz.suse.de/","msgid":"<20230224113245.9645013246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T11:32:45","name":"[1/2] Change vec<, , vl_embed>::m_vecdata refrences into address ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224113245.9645013246@imap2.suse-dmz.suse.de/mbox/"},{"id":61279,"url":"https://patchwork.plctlab.org/api/1.2/patches/61279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224114444.7E2CE13246@imap2.suse-dmz.suse.de/","msgid":"<20230224114444.7E2CE13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T11:44:44","name":"[2/2] Avoid default-initializing auto_vec storage, fix vec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224114444.7E2CE13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61296,"url":"https://patchwork.plctlab.org/api/1.2/patches/61296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iqLkrnUsZr8eCy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T12:14:38","name":"[committed] i386: Update i386-builtin.def file comment description of BDESC{,_FIRST}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iqLkrnUsZr8eCy@tucnak/mbox/"},{"id":61320,"url":"https://patchwork.plctlab.org/api/1.2/patches/61320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134622.09FCF13246@imap2.suse-dmz.suse.de/","msgid":"<20230224134622.09FCF13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T13:46:21","name":"[1/2] Change vec<, , vl_embed>::m_vecdata refrences into address ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134622.09FCF13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61321,"url":"https://patchwork.plctlab.org/api/1.2/patches/61321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134739.D386F13246@imap2.suse-dmz.suse.de/","msgid":"<20230224134739.D386F13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T13:47:39","name":"[2/2] Avoid default-initializing auto_vec storage, fix vec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134739.D386F13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61336,"url":"https://patchwork.plctlab.org/api/1.2/patches/61336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224141905.711154-1-jwakely@redhat.com/","msgid":"<20230224141905.711154-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:19:05","name":"[committed] libstdc++: Reorder dg-options before dg-do","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224141905.711154-1-jwakely@redhat.com/mbox/"},{"id":61337,"url":"https://patchwork.plctlab.org/api/1.2/patches/61337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142522.713327-1-jwakely@redhat.com/","msgid":"<20230224142522.713327-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:25:22","name":"[committed] libstdc++: Suppress warnings about use of deprecated std::aligned_storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142522.713327-1-jwakely@redhat.com/mbox/"},{"id":61338,"url":"https://patchwork.plctlab.org/api/1.2/patches/61338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-1-jwakely@redhat.com/","msgid":"<20230224142808.714075-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:04","name":"[committed,1/5] libstdc++: Optimize net::ip::address_v4::to_string()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-1-jwakely@redhat.com/mbox/"},{"id":61342,"url":"https://patchwork.plctlab.org/api/1.2/patches/61342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-2-jwakely@redhat.com/","msgid":"<20230224142808.714075-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:05","name":"[committed,2/5] libstdc++: Fix conversion to/from net::ip::address_v4::bytes_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-2-jwakely@redhat.com/mbox/"},{"id":61341,"url":"https://patchwork.plctlab.org/api/1.2/patches/61341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-3-jwakely@redhat.com/","msgid":"<20230224142808.714075-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:06","name":"[committed,3/5] libstdc++: Fix members of net::ip::network_v4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-3-jwakely@redhat.com/mbox/"},{"id":61340,"url":"https://patchwork.plctlab.org/api/1.2/patches/61340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-4-jwakely@redhat.com/","msgid":"<20230224142808.714075-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:07","name":"[committed,4/5] libstdc++: Make net::ip::basic_endpoint comparisons constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-4-jwakely@redhat.com/mbox/"},{"id":61339,"url":"https://patchwork.plctlab.org/api/1.2/patches/61339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-5-jwakely@redhat.com/","msgid":"<20230224142808.714075-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:08","name":"[committed,5/5] libstdc++: Constrain net::executor constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-5-jwakely@redhat.com/mbox/"},{"id":61369,"url":"https://patchwork.plctlab.org/api/1.2/patches/61369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151802.215659-1-juzhe.zhong@rivai.ai/","msgid":"<20230224151802.215659-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-24T15:18:02","name":"RISC-V: Add scalar move support and fix VSETVL bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151802.215659-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61370,"url":"https://patchwork.plctlab.org/api/1.2/patches/61370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151914.215909-1-juzhe.zhong@rivai.ai/","msgid":"<20230224151914.215909-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-24T15:19:14","name":"RISC-V: Add testcase for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151914.215909-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61394,"url":"https://patchwork.plctlab.org/api/1.2/patches/61394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224163753.8649920423@pchp3.se.axis.com/","msgid":"<20230224163753.8649920423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T16:37:53","name":"testsuite: Add -fno-ivopts to gcc.dg/Wuse-after-free-2.c, PR108828","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224163753.8649920423@pchp3.se.axis.com/mbox/"},{"id":61408,"url":"https://patchwork.plctlab.org/api/1.2/patches/61408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224175433.CF5002043D@pchp3.se.axis.com/","msgid":"<20230224175433.CF5002043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T17:54:33","name":"testsuite: Don'\''t include multiline regexps in the the pass/fail log","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224175433.CF5002043D@pchp3.se.axis.com/mbox/"},{"id":61413,"url":"https://patchwork.plctlab.org/api/1.2/patches/61413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-2-qing.zhao@oracle.com/","msgid":"<20230224183505.4112295-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-24T18:35:04","name":"[v4,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-2-qing.zhao@oracle.com/mbox/"},{"id":61414,"url":"https://patchwork.plctlab.org/api/1.2/patches/61414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-3-qing.zhao@oracle.com/","msgid":"<20230224183505.4112295-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-24T18:35:05","name":"[V4,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-3-qing.zhao@oracle.com/mbox/"},{"id":61420,"url":"https://patchwork.plctlab.org/api/1.2/patches/61420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191603.3935F20447@pchp3.se.axis.com/","msgid":"<20230224191603.3935F20447@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T19:16:03","name":"[1/2] testsuite: Provide means to regexp in multiline patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191603.3935F20447@pchp3.se.axis.com/mbox/"},{"id":61421,"url":"https://patchwork.plctlab.org/api/1.2/patches/61421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191843.729A520444@pchp3.se.axis.com/","msgid":"<20230224191843.729A520444@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T19:18:43","name":"[2/2] testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-3.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191843.729A520444@pchp3.se.axis.com/mbox/"},{"id":61447,"url":"https://patchwork.plctlab.org/api/1.2/patches/61447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-726fb111-e89a-40c0-8abb-5ed9970c20fb-1677271105148@3c-app-gmx-bs39/","msgid":"","list_archive_url":null,"date":"2023-02-24T20:38:25","name":"[committed] Fortran: frontend passes do_subscript leaks gmp memory [PR108924]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-726fb111-e89a-40c0-8abb-5ed9970c20fb-1677271105148@3c-app-gmx-bs39/mbox/"},{"id":61456,"url":"https://patchwork.plctlab.org/api/1.2/patches/61456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr/","msgid":"<246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr>","list_archive_url":null,"date":"2023-02-24T21:21:13","name":"[pushed] fortran: Plug leak of associated_dummy memory. [PR108923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr/mbox/"},{"id":61500,"url":"https://patchwork.plctlab.org/api/1.2/patches/61500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com/","msgid":"<174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com>","list_archive_url":null,"date":"2023-02-25T09:50:33","name":"[v2] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com/mbox/"},{"id":61501,"url":"https://patchwork.plctlab.org/api/1.2/patches/61501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225100105.3477550-1-jcmvbkbc@gmail.com/","msgid":"<20230225100105.3477550-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-25T10:01:05","name":"gcc: xtensa: fix PR target/108919","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225100105.3477550-1-jcmvbkbc@gmail.com/mbox/"},{"id":61519,"url":"https://patchwork.plctlab.org/api/1.2/patches/61519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225140523.3493078-1-jcmvbkbc@gmail.com/","msgid":"<20230225140523.3493078-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-25T14:05:23","name":"[COMMITTED] gcc: xtensa: fix PR target/108919","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225140523.3493078-1-jcmvbkbc@gmail.com/mbox/"},{"id":61528,"url":"https://patchwork.plctlab.org/api/1.2/patches/61528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr/","msgid":"<48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr>","list_archive_url":null,"date":"2023-02-25T16:35:04","name":"fortran: Reuse associated_dummy memory if previously allocated [PR108923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr/mbox/"},{"id":61535,"url":"https://patchwork.plctlab.org/api/1.2/patches/61535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0a55c0d-964c-4a07-bc72-e3fe5e733cb0-1677349043450@3c-app-gmx-bap72/","msgid":"","list_archive_url":null,"date":"2023-02-25T18:17:23","name":"[committed] Fortran: fix memory leak with real to integer conversion warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0a55c0d-964c-4a07-bc72-e3fe5e733cb0-1677349043450@3c-app-gmx-bap72/mbox/"},{"id":61577,"url":"https://patchwork.plctlab.org/api/1.2/patches/61577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ec9808-7f52-659f-7859-72573bb76263@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-26T06:38:58","name":"gcc.c-torture/compile/103818.c: enable for llp64 too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ec9808-7f52-659f-7859-72573bb76263@gmail.com/mbox/"},{"id":61647,"url":"https://patchwork.plctlab.org/api/1.2/patches/61647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp/","msgid":"<76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp>","list_archive_url":null,"date":"2023-02-26T17:27:42","name":"xtensa: Make use of CLAMPS instruction if configured","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp/mbox/"},{"id":61654,"url":"https://patchwork.plctlab.org/api/1.2/patches/61654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com/","msgid":"<17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com>","list_archive_url":null,"date":"2023-02-26T19:52:43","name":"[libgfortran] Initailize some variable to get rid of nuisance warnings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com/mbox/"},{"id":61702,"url":"https://patchwork.plctlab.org/api/1.2/patches/61702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227032223.176203-1-zhujunxian@oss.cipunited.com/","msgid":"<20230227032223.176203-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-27T03:22:45","name":"MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227032223.176203-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":61755,"url":"https://patchwork.plctlab.org/api/1.2/patches/61755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227080132.53115-1-juzhe.zhong@rivai.ai/","msgid":"<20230227080132.53115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-27T08:01:32","name":"RISC-V: Remove void_type_node of void_args for vsetvlmax intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227080132.53115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61893,"url":"https://patchwork.plctlab.org/api/1.2/patches/61893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com/","msgid":"<4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com>","list_archive_url":null,"date":"2023-02-27T09:52:38","name":"gcc.dg/overflow-warn-9.c: exclude from LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com/mbox/"},{"id":61896,"url":"https://patchwork.plctlab.org/api/1.2/patches/61896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0cc9e3-5c41-2bc4-64fb-37e6902d9ef5@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T10:09:34","name":"gcc.dg/memchr-3.c: fix for LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0cc9e3-5c41-2bc4-64fb-37e6902d9ef5@gmail.com/mbox/"},{"id":61899,"url":"https://patchwork.plctlab.org/api/1.2/patches/61899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com/","msgid":"<57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com>","list_archive_url":null,"date":"2023-02-27T10:29:23","name":"c-c++-common/Warray-bounds.c: fix excess warnings on LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com/mbox/"},{"id":61900,"url":"https://patchwork.plctlab.org/api/1.2/patches/61900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227103225.335443-1-juzhe.zhong@rivai.ai/","msgid":"<20230227103225.335443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-27T10:32:25","name":"RISC-V: Add permutation C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227103225.335443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61921,"url":"https://patchwork.plctlab.org/api/1.2/patches/61921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com/","msgid":"<9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com>","list_archive_url":null,"date":"2023-02-27T11:20:30","name":"rs6000: Inline lrint and lrintf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com/mbox/"},{"id":61926,"url":"https://patchwork.plctlab.org/api/1.2/patches/61926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea889655-6dd1-d676-46b3-4227e3eece1d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T11:57:19","name":"[OG12,committed] Update dg-dump-scan for ... (was: [Patch] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea889655-6dd1-d676-46b3-4227e3eece1d@codesourcery.com/mbox/"},{"id":61929,"url":"https://patchwork.plctlab.org/api/1.2/patches/61929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227120816.3642952-1-jcmvbkbc@gmail.com/","msgid":"<20230227120816.3642952-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-27T12:08:16","name":"gcc: xtensa: add XCHAL_HAVE_{CLAMPS, DEPBITS, EXCLUSIVE, XEA3} to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227120816.3642952-1-jcmvbkbc@gmail.com/mbox/"},{"id":61931,"url":"https://patchwork.plctlab.org/api/1.2/patches/61931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7a29b9b-ccf2-e2e2-af59-9ec7c1d56876@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:15:04","name":"[v3] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7a29b9b-ccf2-e2e2-af59-9ec7c1d56876@codesourcery.com/mbox/"},{"id":61935,"url":"https://patchwork.plctlab.org/api/1.2/patches/61935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16928-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:32:39","name":"[1/4] middle-end: Revert can_special_div_by_const changes [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16928-tamar@arm.com/mbox/"},{"id":61936,"url":"https://patchwork.plctlab.org/api/1.2/patches/61936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjDtzup8FaUIZF@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:33:18","name":"[2/4,ranger] : Add range-ops for widen addition and widen multiplication [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjDtzup8FaUIZF@arm.com/mbox/"},{"id":61937,"url":"https://patchwork.plctlab.org/api/1.2/patches/61937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjM04lLCimbeu4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:33:55","name":"[3/4] middle-end: Implement preferred_div_as_shifts_over_mult [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjM04lLCimbeu4@arm.com/mbox/"},{"id":61938,"url":"https://patchwork.plctlab.org/api/1.2/patches/61938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjTE9I4WrC4tEg@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:34:20","name":"[4/4] AArch64 Update div-bitmask to implement new optab instead of target hook [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjTE9I4WrC4tEg@arm.com/mbox/"},{"id":61963,"url":"https://patchwork.plctlab.org/api/1.2/patches/61963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227135857.90EDF385842C@sourceware.org/","msgid":"<20230227135857.90EDF385842C@sourceware.org>","list_archive_url":null,"date":"2023-02-27T13:58:10","name":"Fixup possible VR_ANTI_RANGE value_range issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227135857.90EDF385842C@sourceware.org/mbox/"},{"id":61968,"url":"https://patchwork.plctlab.org/api/1.2/patches/61968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com/","msgid":"<4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com>","list_archive_url":null,"date":"2023-02-27T14:30:48","name":"[V2] Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com/mbox/"},{"id":61970,"url":"https://patchwork.plctlab.org/api/1.2/patches/61970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227144957.1076432-1-jwakely@redhat.com/","msgid":"<20230227144957.1076432-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-27T14:49:57","name":"[committed] libstdc++: Add Doxygen comment for string::resize_and_overwite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227144957.1076432-1-jwakely@redhat.com/mbox/"},{"id":61972,"url":"https://patchwork.plctlab.org/api/1.2/patches/61972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com/","msgid":"<3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com>","list_archive_url":null,"date":"2023-02-27T15:11:37","name":"[rs6000] Tweak modulo define_insns to eliminate register copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com/mbox/"},{"id":61974,"url":"https://patchwork.plctlab.org/api/1.2/patches/61974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/zI+Vt0kL68AFHm@guest.guest/","msgid":"","list_archive_url":null,"date":"2023-02-27T15:15:05","name":"[ada] fix unknown type name '\''cpu_set_t'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/zI+Vt0kL68AFHm@guest.guest/mbox/"},{"id":62136,"url":"https://patchwork.plctlab.org/api/1.2/patches/62136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-372da1da-70c8-453d-881b-e0f4a0ec0704-1677531278062@3c-app-gmx-bap31/","msgid":"","list_archive_url":null,"date":"2023-02-27T20:54:38","name":"Fortran: fix corner case of IBITS intrinsic [PR108937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-372da1da-70c8-453d-881b-e0f4a0ec0704-1677531278062@3c-app-gmx-bap31/mbox/"},{"id":62140,"url":"https://patchwork.plctlab.org/api/1.2/patches/62140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yv=nDsbvSbsUxOnu3eBjF4hrQfcQ72YuM7Vn8Em+QLaA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T21:12:30","name":"i386: Do not constrain fmod and remainder patterns with flag_finite_math_only [PR108922]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yv=nDsbvSbsUxOnu3eBjF4hrQfcQ72YuM7Vn8Em+QLaA@mail.gmail.com/mbox/"},{"id":62223,"url":"https://patchwork.plctlab.org/api/1.2/patches/62223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228011421.CC1E220441@pchp3.se.axis.com/","msgid":"<20230228011421.CC1E220441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:14:21","name":"[COMMITTED] testsuite: Add CRIS to targets not xfailing gcc.dg/attr-alloc_size-11.c:50, 51","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228011421.CC1E220441@pchp3.se.axis.com/mbox/"},{"id":62224,"url":"https://patchwork.plctlab.org/api/1.2/patches/62224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012423.D1B7420433@pchp3.se.axis.com/","msgid":"<20230228012423.D1B7420433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:24:23","name":"[COMMITTED] testsuite: Remove xfail gcc.dg/tree-ssa/pr91091-2.c RHS ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012423.D1B7420433@pchp3.se.axis.com/mbox/"},{"id":62226,"url":"https://patchwork.plctlab.org/api/1.2/patches/62226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012714.1C78E2043D@pchp3.se.axis.com/","msgid":"<20230228012714.1C78E2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:27:14","name":"[COMMITTED] testsuite: Shorten multiline pattern message to the same for fail and pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012714.1C78E2043D@pchp3.se.axis.com/mbox/"},{"id":62227,"url":"https://patchwork.plctlab.org/api/1.2/patches/62227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228013137.4A8D02042E@pchp3.se.axis.com/","msgid":"<20230228013137.4A8D02042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:31:37","name":"[COMMITTED] testsuite: No xfail infoleak-vfio_iommu_type1.c bogus for default_packed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228013137.4A8D02042E@pchp3.se.axis.com/mbox/"},{"id":62231,"url":"https://patchwork.plctlab.org/api/1.2/patches/62231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com/","msgid":"<1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com>","list_archive_url":null,"date":"2023-02-28T02:31:31","name":"[PATCHv2,rs6000] Merge two vector shift when their sources are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com/mbox/"},{"id":62259,"url":"https://patchwork.plctlab.org/api/1.2/patches/62259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228043250.212566-1-zhujunxian@oss.cipunited.com/","msgid":"<20230228043250.212566-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T04:33:13","name":"MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228043250.212566-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":62260,"url":"https://patchwork.plctlab.org/api/1.2/patches/62260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e02e0971-79db-45f2-af77-8a53fb4c4efa.sinan.lin@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-02-28T04:36:15","name":"RISC-V: Allow const0_rtx operand in max/min","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e02e0971-79db-45f2-af77-8a53fb4c4efa.sinan.lin@linux.alibaba.com/mbox/"},{"id":62266,"url":"https://patchwork.plctlab.org/api/1.2/patches/62266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228050036.30601-1-mynameisxiaou@gmail.com/","msgid":"<20230228050036.30601-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-02-28T05:00:36","name":"RISC-V: Fix wrong partial subreg check for bsetidisi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228050036.30601-1-mynameisxiaou@gmail.com/mbox/"},{"id":62321,"url":"https://patchwork.plctlab.org/api/1.2/patches/62321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/21AVDEBex5vqmc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T08:02:09","name":"lto: Fix up lto_fixup_prevailing_type [PR108910]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/21AVDEBex5vqmc@tucnak/mbox/"},{"id":62332,"url":"https://patchwork.plctlab.org/api/1.2/patches/62332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/26yg4fJ89wguAN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T08:26:50","name":"ubsan: Honor -fstrict-flex-arrays= in -fsanitize=bounds [PR108894]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/26yg4fJ89wguAN@tucnak/mbox/"},{"id":62355,"url":"https://patchwork.plctlab.org/api/1.2/patches/62355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228092332.222487-1-zhujunxian@oss.cipunited.com/","msgid":"<20230228092332.222487-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T09:24:34","name":"[v2] MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228092332.222487-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":62387,"url":"https://patchwork.plctlab.org/api/1.2/patches/62387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095042.1192997-1-jwakely@redhat.com/","msgid":"<20230228095042.1192997-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:42","name":"[committed] libstdc++: Add likely/unlikely attributes to implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095042.1192997-1-jwakely@redhat.com/mbox/"},{"id":62388,"url":"https://patchwork.plctlab.org/api/1.2/patches/62388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095048.1193075-1-jwakely@redhat.com/","msgid":"<20230228095048.1193075-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:48","name":"[committed] libstdc++: Do not use memmove for 1-element ranges [PR108846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095048.1193075-1-jwakely@redhat.com/mbox/"},{"id":62386,"url":"https://patchwork.plctlab.org/api/1.2/patches/62386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095053.1193118-1-jwakely@redhat.com/","msgid":"<20230228095053.1193118-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:53","name":"[committed] libstdc++: Fix uses_allocator_construction_args for pair [PR108952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095053.1193118-1-jwakely@redhat.com/mbox/"},{"id":62390,"url":"https://patchwork.plctlab.org/api/1.2/patches/62390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/3RuhY7f0bkoZA+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T10:04:42","name":"c++: Emit fundamental tinfos for all _Float*/decltype(0.0bf16) types unconditionally [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/3RuhY7f0bkoZA+@tucnak/mbox/"},{"id":62393,"url":"https://patchwork.plctlab.org/api/1.2/patches/62393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228101941.170726-1-xin.liu@oss.cipunited.com/","msgid":"<20230228101941.170726-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T10:24:21","name":"MIPS: Bugfix for fix Dejagnu issues with RTL checking enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228101941.170726-1-xin.liu@oss.cipunited.com/mbox/"},{"id":62478,"url":"https://patchwork.plctlab.org/api/1.2/patches/62478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com/","msgid":"<437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com>","list_archive_url":null,"date":"2023-02-28T13:06:43","name":"OpenMP: Ignore side-effects when finding struct comps [PR108545]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com/mbox/"},{"id":62492,"url":"https://patchwork.plctlab.org/api/1.2/patches/62492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134718.2C43413440@imap2.suse-dmz.suse.de/","msgid":"<20230228134718.2C43413440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:17","name":"[1/5] fix anti-range dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134718.2C43413440@imap2.suse-dmz.suse.de/mbox/"},{"id":62493,"url":"https://patchwork.plctlab.org/api/1.2/patches/62493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134725.02E8813440@imap2.suse-dmz.suse.de/","msgid":"<20230228134725.02E8813440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:24","name":"[2/5] fend off anti-ranges from value-range-storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134725.02E8813440@imap2.suse-dmz.suse.de/mbox/"},{"id":62496,"url":"https://patchwork.plctlab.org/api/1.2/patches/62496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134733.417D113440@imap2.suse-dmz.suse.de/","msgid":"<20230228134733.417D113440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:32","name":"[3/5] Avoid upper/lower_bound (1) on VR_ANTI_RANGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134733.417D113440@imap2.suse-dmz.suse.de/mbox/"},{"id":62497,"url":"https://patchwork.plctlab.org/api/1.2/patches/62497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134739.E030413440@imap2.suse-dmz.suse.de/","msgid":"<20230228134739.E030413440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:39","name":"[4/5] Sanitize irange::num_pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134739.E030413440@imap2.suse-dmz.suse.de/mbox/"},{"id":62495,"url":"https://patchwork.plctlab.org/api/1.2/patches/62495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134748.07F8D13440@imap2.suse-dmz.suse.de/","msgid":"<20230228134748.07F8D13440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:47","name":"[5/5] Sanitize legacy_{lower,upper}_bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134748.07F8D13440@imap2.suse-dmz.suse.de/mbox/"},{"id":62500,"url":"https://patchwork.plctlab.org/api/1.2/patches/62500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-1-jcmvbkbc@gmail.com/","msgid":"<20230228135136.3727643-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-28T13:51:35","name":"[1/2] gcc: xtensa: add data alignment properties to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-1-jcmvbkbc@gmail.com/mbox/"},{"id":62499,"url":"https://patchwork.plctlab.org/api/1.2/patches/62499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-2-jcmvbkbc@gmail.com/","msgid":"<20230228135136.3727643-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-28T13:51:36","name":"[2/2] gcc: xtensa: adjust STRICT_ALIGNMENT per hardware capabilities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-2-jcmvbkbc@gmail.com/mbox/"},{"id":62545,"url":"https://patchwork.plctlab.org/api/1.2/patches/62545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com/","msgid":"<452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com>","list_archive_url":null,"date":"2023-02-28T16:18:25","name":"OpenMP/Fortran: Fix handling of optional is_device_ptr + bind(C) [PR108546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com/mbox/"},{"id":62578,"url":"https://patchwork.plctlab.org/api/1.2/patches/62578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184735.24E6E20438@pchp3.se.axis.com/","msgid":"<20230228184735.24E6E20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T18:47:35","name":"[1/2] testsuite: Fix analyzer errors for newlib-errno","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184735.24E6E20438@pchp3.se.axis.com/mbox/"},{"id":62579,"url":"https://patchwork.plctlab.org/api/1.2/patches/62579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184958.4992D20438@pchp3.se.axis.com/","msgid":"<20230228184958.4992D20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T18:49:58","name":"[2/2] testsuite: Fix analyzer errors for newlib-fd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184958.4992D20438@pchp3.se.axis.com/mbox/"},{"id":62609,"url":"https://patchwork.plctlab.org/api/1.2/patches/62609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228211414.1374620-1-jwakely@redhat.com/","msgid":"<20230228211414.1374620-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T21:14:14","name":"[wwwdocs] Document synchronized_value addition to libstdc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228211414.1374620-1-jwakely@redhat.com/mbox/"},{"id":62675,"url":"https://patchwork.plctlab.org/api/1.2/patches/62675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f85990b0-1a7a-bc17-50c1-ef176cbd0dae@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-28T23:01:20","name":"amdgcn: Enable SIMD vectorization of math functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f85990b0-1a7a-bc17-50c1-ef176cbd0dae@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-02/mbox/"},{"id":18,"url":"https://patchwork.plctlab.org/api/1.2/bundles/18/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-03/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-03","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":62702,"url":"https://patchwork.plctlab.org/api/1.2/patches/62702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301014611.26707-1-wangfeng@eswincomputing.com/","msgid":"<20230301014611.26707-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-01T01:46:11","name":"RISC-V: Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301014611.26707-1-wangfeng@eswincomputing.com/mbox/"},{"id":62762,"url":"https://patchwork.plctlab.org/api/1.2/patches/62762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d17b718e-24a7-cffb-cbec-e76857db2753@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T05:54:22","name":"rs6000/test: Adjust two bfp test cases with has_arch_ppc64 [PR108729]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d17b718e-24a7-cffb-cbec-e76857db2753@linux.ibm.com/mbox/"},{"id":62763,"url":"https://patchwork.plctlab.org/api/1.2/patches/62763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com/","msgid":"<3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:55:08","name":"rs6000/test: Adjust scalar-test-neg-8.c with lp64 [PR108730]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com/mbox/"},{"id":62764,"url":"https://patchwork.plctlab.org/api/1.2/patches/62764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6303ed9-5ba8-ac10-719c-9eb2a414d5f4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T05:55:53","name":"rs6000/test: Adjust fold-vec-extract-double.p9.c for BE [PR108810]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6303ed9-5ba8-ac10-719c-9eb2a414d5f4@linux.ibm.com/mbox/"},{"id":62765,"url":"https://patchwork.plctlab.org/api/1.2/patches/62765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com/","msgid":"<9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:56:20","name":"rs6000/test: Adjust pr101384-2.c for P9 [PR108813]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com/mbox/"},{"id":62766,"url":"https://patchwork.plctlab.org/api/1.2/patches/62766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com/","msgid":"<4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:56:48","name":"rs6000/test: Adjust scalar-test-data-class-1[45].c with int128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com/mbox/"},{"id":62773,"url":"https://patchwork.plctlab.org/api/1.2/patches/62773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4d05663-57a2-40be-3fba-270239b52ee0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T07:09:56","name":"[gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4d05663-57a2-40be-3fba-270239b52ee0@linux.ibm.com/mbox/"},{"id":62777,"url":"https://patchwork.plctlab.org/api/1.2/patches/62777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301073810.627043858C30@sourceware.org/","msgid":"<20230301073810.627043858C30@sourceware.org>","list_archive_url":null,"date":"2023-03-01T07:37:18","name":"tree-optimization/108950 - widen-sum reduction ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301073810.627043858C30@sourceware.org/mbox/"},{"id":62794,"url":"https://patchwork.plctlab.org/api/1.2/patches/62794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301091029.A10C13858430@sourceware.org/","msgid":"<20230301091029.A10C13858430@sourceware.org>","list_archive_url":null,"date":"2023-03-01T09:09:34","name":"tree-optimization/108970 - ICE with vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301091029.A10C13858430@sourceware.org/mbox/"},{"id":62797,"url":"https://patchwork.plctlab.org/api/1.2/patches/62797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8Wyr196+cnqxrX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:11:38","name":"cfgexpand: Handle WIDEN_{PLUS,MINUS}_EXPR and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR in expand_debug_expr [PR108967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8Wyr196+cnqxrX@tucnak/mbox/"},{"id":62808,"url":"https://patchwork.plctlab.org/api/1.2/patches/62808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8YtP5QiQzQ9spF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:19:48","name":"c++, v2: Emit fundamental tinfos for all _Float*/decltype(0.0bf16) types unconditionally [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8YtP5QiQzQ9spF@tucnak/mbox/"},{"id":62834,"url":"https://patchwork.plctlab.org/api/1.2/patches/62834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8htiwLe6udGBN5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:58:14","name":"[committed] ubsan: Add another testcase for [0] array in the middle of struct [PR108894]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8htiwLe6udGBN5@tucnak/mbox/"},{"id":62854,"url":"https://patchwork.plctlab.org/api/1.2/patches/62854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301113512.1544598-1-raj.khem@gmail.com/","msgid":"<20230301113512.1544598-1-raj.khem@gmail.com>","list_archive_url":null,"date":"2023-03-01T11:35:12","name":"Cpp: honor sysroot location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301113512.1544598-1-raj.khem@gmail.com/mbox/"},{"id":62882,"url":"https://patchwork.plctlab.org/api/1.2/patches/62882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9664e8-65e9-00ef-25c4-4766fd70e12e@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-03-01T12:51:02","name":"update copyright year in libstdcc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9664e8-65e9-00ef-25c4-4766fd70e12e@jguk.org/mbox/"},{"id":62883,"url":"https://patchwork.plctlab.org/api/1.2/patches/62883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org/","msgid":"<73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org>","list_archive_url":null,"date":"2023-03-01T12:53:18","name":"Bugzilla Bug 81649 [PATCH]: Clarify LeakSanitizer in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org/mbox/"},{"id":62884,"url":"https://patchwork.plctlab.org/api/1.2/patches/62884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org/","msgid":"<85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org>","list_archive_url":null,"date":"2023-03-01T12:54:10","name":"[PATCHJ] : Bugzilla 88860 - Clarify online manual infelicities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org/mbox/"},{"id":62896,"url":"https://patchwork.plctlab.org/api/1.2/patches/62896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301130749.9A7B03858401@sourceware.org/","msgid":"<20230301130749.9A7B03858401@sourceware.org>","list_archive_url":null,"date":"2023-03-01T13:07:02","name":"debug/108772 - ICE with late debug generated with -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301130749.9A7B03858401@sourceware.org/mbox/"},{"id":62908,"url":"https://patchwork.plctlab.org/api/1.2/patches/62908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301141033.2578200-1-dmalcolm@redhat.com/","msgid":"<20230301141033.2578200-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-01T14:10:33","name":"[pushed] analyzer: fix infinite recursion false +ves [PR108935]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301141033.2578200-1-dmalcolm@redhat.com/mbox/"},{"id":62980,"url":"https://patchwork.plctlab.org/api/1.2/patches/62980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com/","msgid":"<1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com>","list_archive_url":null,"date":"2023-03-01T16:56:51","name":"amdgcn: Add instruction patterns for conditional min/max operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com/mbox/"},{"id":63017,"url":"https://patchwork.plctlab.org/api/1.2/patches/63017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-2-xry111@xry111.site/","msgid":"<20230301180720.26514-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:13","name":"[1/8] aarch64: testsuite: disable PIE for aapcs64 tests [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-2-xry111@xry111.site/mbox/"},{"id":63022,"url":"https://patchwork.plctlab.org/api/1.2/patches/63022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-3-xry111@xry111.site/","msgid":"<20230301180720.26514-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:14","name":"[2/8] aarch64: testsuite: disable PIE for tests with large code model [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-3-xry111@xry111.site/mbox/"},{"id":63020,"url":"https://patchwork.plctlab.org/api/1.2/patches/63020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-4-xry111@xry111.site/","msgid":"<20230301180720.26514-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:15","name":"[3/8] aarch64: testsuite: disable PIE for fuse_adrp_add_1.c [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-4-xry111@xry111.site/mbox/"},{"id":63018,"url":"https://patchwork.plctlab.org/api/1.2/patches/63018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-5-xry111@xry111.site/","msgid":"<20230301180720.26514-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:16","name":"[4/8] aarch64: testsuite: disable stack protector for sve-pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-5-xry111@xry111.site/mbox/"},{"id":63023,"url":"https://patchwork.plctlab.org/api/1.2/patches/63023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-6-xry111@xry111.site/","msgid":"<20230301180720.26514-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:17","name":"[5/8] aarch64: testsuite: disable stack protector for pr103147-10 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-6-xry111@xry111.site/mbox/"},{"id":63019,"url":"https://patchwork.plctlab.org/api/1.2/patches/63019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-7-xry111@xry111.site/","msgid":"<20230301180720.26514-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:18","name":"[6/8] aarch64: testsuite: disable stack protector for auto-init-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-7-xry111@xry111.site/mbox/"},{"id":63021,"url":"https://patchwork.plctlab.org/api/1.2/patches/63021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-8-xry111@xry111.site/","msgid":"<20230301180720.26514-8-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:19","name":"[7/8] aarch64: testsuite: disable stack protector for pr104005.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-8-xry111@xry111.site/mbox/"},{"id":63025,"url":"https://patchwork.plctlab.org/api/1.2/patches/63025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-9-xry111@xry111.site/","msgid":"<20230301180720.26514-9-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:20","name":"[8/8] aarch64: testsuite: disable stack protector for tests relying on stack offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-9-xry111@xry111.site/mbox/"},{"id":63024,"url":"https://patchwork.plctlab.org/api/1.2/patches/63024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn4Gk3_pB8K1SsXNzCyWMVGGs4jOtO1_L=L+qBpkDtqHg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T18:07:43","name":"libiberty: fix memory leak in pex-win32.c and refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn4Gk3_pB8K1SsXNzCyWMVGGs4jOtO1_L=L+qBpkDtqHg@mail.gmail.com/mbox/"},{"id":63049,"url":"https://patchwork.plctlab.org/api/1.2/patches/63049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301195315.1793087-1-vineetg@rivosinc.com/","msgid":"<20230301195315.1793087-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-03-01T19:53:15","name":"RISC-V: costs: miscomputed shiftadd_cost triggering synth_mult [PR/108987]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301195315.1793087-1-vineetg@rivosinc.com/mbox/"},{"id":63085,"url":"https://patchwork.plctlab.org/api/1.2/patches/63085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301203308.405645-1-polacek@redhat.com/","msgid":"<20230301203308.405645-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-01T20:33:08","name":"c++: ICE with -Wmismatched-tags and member template [PR106259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301203308.405645-1-polacek@redhat.com/mbox/"},{"id":63097,"url":"https://patchwork.plctlab.org/api/1.2/patches/63097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212637.1481240-1-jwakely@redhat.com/","msgid":"<20230301212637.1481240-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-01T21:26:37","name":"[committed] libstdc++: Make std::chrono::current_zone() default to UTC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212637.1481240-1-jwakely@redhat.com/mbox/"},{"id":63098,"url":"https://patchwork.plctlab.org/api/1.2/patches/63098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212645.1481272-1-jwakely@redhat.com/","msgid":"<20230301212645.1481272-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-01T21:26:45","name":"[committed] libstdc++: Fix typo in comment in bits/cow_string.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212645.1481272-1-jwakely@redhat.com/mbox/"},{"id":63099,"url":"https://patchwork.plctlab.org/api/1.2/patches/63099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222856.12300c64@nbbrfq/","msgid":"<20230301222856.12300c64@nbbrfq>","list_archive_url":null,"date":"2023-03-01T21:28:56","name":"[stage1] Remove conditionals around free()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222856.12300c64@nbbrfq/mbox/"},{"id":63107,"url":"https://patchwork.plctlab.org/api/1.2/patches/63107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222847.2606616-1-dmalcolm@redhat.com/","msgid":"<20230301222847.2606616-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-01T22:28:47","name":"[pushed] analyzer: fixes to side-effects for built-in functions [PR107565]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222847.2606616-1-dmalcolm@redhat.com/mbox/"},{"id":63113,"url":"https://patchwork.plctlab.org/api/1.2/patches/63113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301232500.2622240-1-apinski@marvell.com/","msgid":"<20230301232500.2622240-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-01T23:25:00","name":"Fix PR 108980: note without warning due to array bounds check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301232500.2622240-1-apinski@marvell.com/mbox/"},{"id":63153,"url":"https://patchwork.plctlab.org/api/1.2/patches/63153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012003.6A0D52040C@pchp3.se.axis.com/","msgid":"<20230302012003.6A0D52040C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-02T01:20:03","name":"[COMMITTED] testsuite: Fix gcc.dg/attr-copy-6.c for user-label-prefixed targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012003.6A0D52040C@pchp3.se.axis.com/mbox/"},{"id":63154,"url":"https://patchwork.plctlab.org/api/1.2/patches/63154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012552.279FF20433@pchp3.se.axis.com/","msgid":"<20230302012552.279FF20433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-02T01:25:52","name":"[COMMITTED] testsuite: Fix g++.dg/ext/attr-copy-2.C for default_packed targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012552.279FF20433@pchp3.se.axis.com/mbox/"},{"id":63175,"url":"https://patchwork.plctlab.org/api/1.2/patches/63175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-1-xionghuluo@tencent.com/","msgid":"<20230302022921.4055291-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-02T02:29:20","name":"[1/2] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-1-xionghuluo@tencent.com/mbox/"},{"id":63174,"url":"https://patchwork.plctlab.org/api/1.2/patches/63174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-2-xionghuluo@tencent.com/","msgid":"<20230302022921.4055291-2-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-02T02:29:21","name":"[2/2] gcov: Fix incorrect gimple line LOCATION [PR97923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-2-xionghuluo@tencent.com/mbox/"},{"id":63235,"url":"https://patchwork.plctlab.org/api/1.2/patches/63235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302055538.730932-1-pan2.li@intel.com/","msgid":"<20230302055538.730932-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-02T05:55:38","name":"[v2] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302055538.730932-1-pan2.li@intel.com/mbox/"},{"id":63261,"url":"https://patchwork.plctlab.org/api/1.2/patches/63261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302074134.721DE33E59@hamza.pair.com/","msgid":"<20230302074134.721DE33E59@hamza.pair.com>","list_archive_url":null,"date":"2023-03-02T07:41:31","name":"[pushed] wwwdocs: testing: Avoid a duplicate link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302074134.721DE33E59@hamza.pair.com/mbox/"},{"id":63264,"url":"https://patchwork.plctlab.org/api/1.2/patches/63264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080152.96006-1-juzhe.zhong@rivai.ai/","msgid":"<20230302080152.96006-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-02T08:01:52","name":"RISC-V: Add RVV misc intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080152.96006-1-juzhe.zhong@rivai.ai/mbox/"},{"id":63265,"url":"https://patchwork.plctlab.org/api/1.2/patches/63265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080535.4F7203858000@sourceware.org/","msgid":"<20230302080535.4F7203858000@sourceware.org>","list_archive_url":null,"date":"2023-03-02T08:04:49","name":"testsuite/108985 - missing vect_simd_clones target requirement on test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080535.4F7203858000@sourceware.org/mbox/"},{"id":63266,"url":"https://patchwork.plctlab.org/api/1.2/patches/63266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABZgZ7jX0HX/up2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T08:08:33","name":"[committed] openmp: Fix up error recovery for invalid structured bindings in OpenMP range for loops [PR105839]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABZgZ7jX0HX/up2@tucnak/mbox/"},{"id":63270,"url":"https://patchwork.plctlab.org/api/1.2/patches/63270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABdUSaG8Dw/avH7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T08:24:49","name":"fold-const: Ignore padding bits in native_interpret_expr REAL_CST reverse verification [PR108934]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABdUSaG8Dw/avH7@tucnak/mbox/"},{"id":63271,"url":"https://patchwork.plctlab.org/api/1.2/patches/63271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-2-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:26","name":"[v4,1/9] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-2-christoph.muellner@vrull.eu/mbox/"},{"id":63272,"url":"https://patchwork.plctlab.org/api/1.2/patches/63272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-3-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:27","name":"[v4,2/9] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-3-christoph.muellner@vrull.eu/mbox/"},{"id":63274,"url":"https://patchwork.plctlab.org/api/1.2/patches/63274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-4-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:28","name":"[v4,3/9] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-4-christoph.muellner@vrull.eu/mbox/"},{"id":63273,"url":"https://patchwork.plctlab.org/api/1.2/patches/63273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-5-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:29","name":"[v4,4/9] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-5-christoph.muellner@vrull.eu/mbox/"},{"id":63275,"url":"https://patchwork.plctlab.org/api/1.2/patches/63275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-6-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:30","name":"[v4,5/9] riscv: thead: Add support for the XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-6-christoph.muellner@vrull.eu/mbox/"},{"id":63276,"url":"https://patchwork.plctlab.org/api/1.2/patches/63276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-7-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:31","name":"[v4,6/9] riscv: thead: Add support for the XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-7-christoph.muellner@vrull.eu/mbox/"},{"id":63278,"url":"https://patchwork.plctlab.org/api/1.2/patches/63278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-8-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:32","name":"[v4,7/9] riscv: thead: Add support for the XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-8-christoph.muellner@vrull.eu/mbox/"},{"id":63277,"url":"https://patchwork.plctlab.org/api/1.2/patches/63277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-9-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:33","name":"[v4,8/9] riscv: thead: Add support for the XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-9-christoph.muellner@vrull.eu/mbox/"},{"id":63279,"url":"https://patchwork.plctlab.org/api/1.2/patches/63279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-10-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:34","name":"[v4,9/9] riscv: thead: Add support for the XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-10-christoph.muellner@vrull.eu/mbox/"},{"id":63329,"url":"https://patchwork.plctlab.org/api/1.2/patches/63329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzzzlalx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:18:50","name":"vect: Fix voluntarily-masked negative conditionals [PR108430]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzzzlalx.fsf@arm.com/mbox/"},{"id":63330,"url":"https://patchwork.plctlab.org/api/1.2/patches/63330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedq7lai9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:21:02","name":"Avoid creating (const (reg ...)) [PR108603]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedq7lai9.fsf@arm.com/mbox/"},{"id":63331,"url":"https://patchwork.plctlab.org/api/1.2/patches/63331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAB7TAwFGPoJJqHT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:32:44","name":"[wwwdocs] gcc-13/porting_to.html: Document C++ -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAB7TAwFGPoJJqHT@tucnak/mbox/"},{"id":63359,"url":"https://patchwork.plctlab.org/api/1.2/patches/63359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACGi5t6N65DipZA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T11:20:43","name":"c++, v3: Emit fundamental tinfos for _Float16/decltype(0.0bf16) types on ia32 with -mno-sse2 [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACGi5t6N65DipZA@tucnak/mbox/"},{"id":63374,"url":"https://patchwork.plctlab.org/api/1.2/patches/63374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACMogsrU0vpmQ1S@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T11:46:42","name":"wwwdocs: Document several further C++23 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACMogsrU0vpmQ1S@tucnak/mbox/"},{"id":63421,"url":"https://patchwork.plctlab.org/api/1.2/patches/63421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302132917.2668B3858425@sourceware.org/","msgid":"<20230302132917.2668B3858425@sourceware.org>","list_archive_url":null,"date":"2023-03-02T13:28:27","name":"target/108738 - limit STV chain discovery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302132917.2668B3858425@sourceware.org/mbox/"},{"id":63427,"url":"https://patchwork.plctlab.org/api/1.2/patches/63427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt4vi5xm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T14:28:05","name":"vect: Don'\''t apply masks to operations on invariants [PR108979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt4vi5xm.fsf@arm.com/mbox/"},{"id":63464,"url":"https://patchwork.plctlab.org/api/1.2/patches/63464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302152450.1486452-1-stefansf@linux.ibm.com/","msgid":"<20230302152450.1486452-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T15:24:51","name":"s390: libatomic: Fix 16 byte atomic {cas,load,store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302152450.1486452-1-stefansf@linux.ibm.com/mbox/"},{"id":63471,"url":"https://patchwork.plctlab.org/api/1.2/patches/63471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302160122.47573-1-xry111@xry111.site/","msgid":"<20230302160122.47573-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-02T16:01:22","name":"LoongArch: Stop -mfpu from silently breaking ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302160122.47573-1-xry111@xry111.site/mbox/"},{"id":63509,"url":"https://patchwork.plctlab.org/api/1.2/patches/63509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com/","msgid":"<3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T18:13:52","name":"s390: Fix ifcvt test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com/mbox/"},{"id":63511,"url":"https://patchwork.plctlab.org/api/1.2/patches/63511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com/","msgid":"<48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T18:17:07","name":"s390: Use arch14 instead of z16 for -march=native.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com/mbox/"},{"id":63513,"url":"https://patchwork.plctlab.org/api/1.2/patches/63513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8a19eff-30e9-434d-8780-d21ff877864e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T18:23:32","name":"testsuite: Do not expect partial vectorization for s390.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8a19eff-30e9-434d-8780-d21ff877864e@linux.ibm.com/mbox/"},{"id":63522,"url":"https://patchwork.plctlab.org/api/1.2/patches/63522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302191048.2657370-1-dmalcolm@redhat.com/","msgid":"<20230302191048.2657370-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-02T19:10:48","name":"[pushed] analyzer: fix uninit false +ves reading from DECL_HARD_REGISTER [PR108968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302191048.2657370-1-dmalcolm@redhat.com/mbox/"},{"id":63524,"url":"https://patchwork.plctlab.org/api/1.2/patches/63524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnvvm=9dvGFYebmKw_jo+S7NfmWERb0ZWNOsYiCaX+ynA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T19:25:08","name":"driver: Treat include path args the same way between cpp_unique_options and asm_options. [PR71850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnvvm=9dvGFYebmKw_jo+S7NfmWERb0ZWNOsYiCaX+ynA@mail.gmail.com/mbox/"},{"id":63583,"url":"https://patchwork.plctlab.org/api/1.2/patches/63583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302205614.1564709-1-jwakely@redhat.com/","msgid":"<20230302205614.1564709-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-02T20:56:14","name":"[wwwdocs] Document allocator_traits::rebind_alloc assertion with GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302205614.1564709-1-jwakely@redhat.com/mbox/"},{"id":63600,"url":"https://patchwork.plctlab.org/api/1.2/patches/63600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b92172eb-3e6e-401c-82e2-f5e1b3cee6b2-1677794628453@3c-app-gmx-bs40/","msgid":"","list_archive_url":null,"date":"2023-03-02T22:03:48","name":"Fortran: fix CLASS attribute handling [PR106856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b92172eb-3e6e-401c-82e2-f5e1b3cee6b2-1677794628453@3c-app-gmx-bs40/mbox/"},{"id":63613,"url":"https://patchwork.plctlab.org/api/1.2/patches/63613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eabba3ca-4199-a893-0b16-99e2680bf553@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T22:22:57","name":"[pushed,PR90706] IRA: Use minimal cost for hard register movement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eabba3ca-4199-a893-0b16-99e2680bf553@redhat.com/mbox/"},{"id":63650,"url":"https://patchwork.plctlab.org/api/1.2/patches/63650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302230703.2234902-1-lhyatt@gmail.com/","msgid":"<20230302230703.2234902-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-03-02T23:07:03","name":"[v2] libcpp: Handle extended characters in user-defined literal suffix [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302230703.2234902-1-lhyatt@gmail.com/mbox/"},{"id":63669,"url":"https://patchwork.plctlab.org/api/1.2/patches/63669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAE2uhyk3ens4RXy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T23:52:26","name":"[committed] testsuite: Fix up memchr-3.c test [PR108991]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAE2uhyk3ens4RXy@tucnak/mbox/"},{"id":63683,"url":"https://patchwork.plctlab.org/api/1.2/patches/63683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001351.4145614-1-ibuclaw@gdcproject.org/","msgid":"<20230303001351.4145614-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:13:51","name":"[committed] d: Add test for PR d/108167 to the testsuite [PR108167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001351.4145614-1-ibuclaw@gdcproject.org/mbox/"},{"id":63685,"url":"https://patchwork.plctlab.org/api/1.2/patches/63685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001742.4148863-1-ibuclaw@gdcproject.org/","msgid":"<20230303001742.4148863-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:17:42","name":"[committed] d: Allow vectors to be compared for identity (PR108946)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001742.4148863-1-ibuclaw@gdcproject.org/mbox/"},{"id":63687,"url":"https://patchwork.plctlab.org/api/1.2/patches/63687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002202.4152119-1-ibuclaw@gdcproject.org/","msgid":"<20230303002202.4152119-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:22:02","name":"[committed] d: Fix ICE on explicit immutable struct import [PR10887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002202.4152119-1-ibuclaw@gdcproject.org/mbox/"},{"id":63688,"url":"https://patchwork.plctlab.org/api/1.2/patches/63688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002411.4153820-1-ibuclaw@gdcproject.org/","msgid":"<20230303002411.4153820-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:24:11","name":"[committed] d: vector float comparison doesn'\''t result in 0 or -1 [PR108945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002411.4153820-1-ibuclaw@gdcproject.org/mbox/"},{"id":63725,"url":"https://patchwork.plctlab.org/api/1.2/patches/63725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303023141.125126-1-pan2.li@intel.com/","msgid":"<20230303023141.125126-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-03T02:31:41","name":"[v3] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303023141.125126-1-pan2.li@intel.com/mbox/"},{"id":63752,"url":"https://patchwork.plctlab.org/api/1.2/patches/63752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0790eac-0656-ed9c-5426-9e83d786ff30@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:52:42","name":"[01/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0790eac-0656-ed9c-5426-9e83d786ff30@rivosinc.com/mbox/"},{"id":63753,"url":"https://patchwork.plctlab.org/api/1.2/patches/63753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6305e96-ff71-cde6-9b91-4333489a47ed@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:52:55","name":"[02/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6305e96-ff71-cde6-9b91-4333489a47ed@rivosinc.com/mbox/"},{"id":63754,"url":"https://patchwork.plctlab.org/api/1.2/patches/63754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e79c40af-4269-f950-131e-926f813b9f76@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:03","name":"[03/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e79c40af-4269-f950-131e-926f813b9f76@rivosinc.com/mbox/"},{"id":63755,"url":"https://patchwork.plctlab.org/api/1.2/patches/63755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/abc3ee25-4d56-47ec-63de-3fcc7ce0591a@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:14","name":"[04/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/abc3ee25-4d56-47ec-63de-3fcc7ce0591a@rivosinc.com/mbox/"},{"id":63756,"url":"https://patchwork.plctlab.org/api/1.2/patches/63756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2107aec-938f-0581-244c-4c08ee08190e@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:25","name":"[05/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2107aec-938f-0581-244c-4c08ee08190e@rivosinc.com/mbox/"},{"id":63757,"url":"https://patchwork.plctlab.org/api/1.2/patches/63757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com/","msgid":"<927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com>","list_archive_url":null,"date":"2023-03-03T04:53:35","name":"[06/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com/mbox/"},{"id":63759,"url":"https://patchwork.plctlab.org/api/1.2/patches/63759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eefb0311-e12b-307f-fe70-c3e4641bb402@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:42","name":"[07/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eefb0311-e12b-307f-fe70-c3e4641bb402@rivosinc.com/mbox/"},{"id":63782,"url":"https://patchwork.plctlab.org/api/1.2/patches/63782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303081658.6383-1-xry111@xry111.site/","msgid":"<20230303081658.6383-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:16:58","name":"[v2] LoongArch: Stop -mfpu from silently breaking ABI [PR109000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303081658.6383-1-xry111@xry111.site/mbox/"},{"id":63798,"url":"https://patchwork.plctlab.org/api/1.2/patches/63798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-2-xry111@xry111.site/","msgid":"<20230303084011.8989-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:40:10","name":"[1/2] LoongArch: testsuite: Disable stack protector for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-2-xry111@xry111.site/mbox/"},{"id":63799,"url":"https://patchwork.plctlab.org/api/1.2/patches/63799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-3-xry111@xry111.site/","msgid":"<20230303084011.8989-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:40:11","name":"[2/2] LoongArch: testsuite: Adjust stack offsets in stack-check-cfa tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-3-xry111@xry111.site/mbox/"},{"id":63800,"url":"https://patchwork.plctlab.org/api/1.2/patches/63800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303085456.13037-1-xry111@xry111.site/","msgid":"<20230303085456.13037-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:54:56","name":"driver: toplev: Fix a typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303085456.13037-1-xry111@xry111.site/mbox/"},{"id":63813,"url":"https://patchwork.plctlab.org/api/1.2/patches/63813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a59a7554-9f0a-e0ff-5666-629c66174e9a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:12:30","name":"[PATCHv2,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a59a7554-9f0a-e0ff-5666-629c66174e9a@linux.ibm.com/mbox/"},{"id":63839,"url":"https://patchwork.plctlab.org/api/1.2/patches/63839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAG/euZxYFFWr5N9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:35:54","name":"diagnostics: Fix up selftests with $COLUMNS < 42 [PR108973]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAG/euZxYFFWr5N9@tucnak/mbox/"},{"id":63850,"url":"https://patchwork.plctlab.org/api/1.2/patches/63850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHB4wr3Nnj/4np8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:46:11","name":"gimple-fold: Fix up fputs -> fwrite folding [PR108988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHB4wr3Nnj/4np8@tucnak/mbox/"},{"id":63855,"url":"https://patchwork.plctlab.org/api/1.2/patches/63855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHHTu2bupT3tcQr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T10:09:18","name":"waccess: Fix two -Wnonnull warning issues [PR108986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHHTu2bupT3tcQr@tucnak/mbox/"},{"id":63865,"url":"https://patchwork.plctlab.org/api/1.2/patches/63865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303110643.1128D139D3@imap2.suse-dmz.suse.de/","msgid":"<20230303110643.1128D139D3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-03T11:06:42","name":"tree-optimization/109002 - partial PRE miscompilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303110643.1128D139D3@imap2.suse-dmz.suse.de/mbox/"},{"id":63933,"url":"https://patchwork.plctlab.org/api/1.2/patches/63933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0u6szx7.fsf@moxielogic.com/","msgid":"<87r0u6szx7.fsf@moxielogic.com>","list_archive_url":null,"date":"2023-03-03T13:54:44","name":"moxie: use define_memory_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0u6szx7.fsf@moxielogic.com/mbox/"},{"id":63934,"url":"https://patchwork.plctlab.org/api/1.2/patches/63934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt4uszlk.fsf@laptop.mail-host-address-is-not-set/","msgid":"<87mt4uszlk.fsf@laptop.mail-host-address-is-not-set>","list_archive_url":null,"date":"2023-03-03T14:01:43","name":"moxie: enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt4uszlk.fsf@laptop.mail-host-address-is-not-set/mbox/"},{"id":63968,"url":"https://patchwork.plctlab.org/api/1.2/patches/63968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303145821.1081489-1-ppalka@redhat.com/","msgid":"<20230303145821.1081489-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-03T14:58:21","name":"c++: thinko in extract_local_specs [PR108998]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303145821.1081489-1-ppalka@redhat.com/mbox/"},{"id":63970,"url":"https://patchwork.plctlab.org/api/1.2/patches/63970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIPvaT1ipBv5JI4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T15:18:21","name":"c++, v2: Don'\''t defer local statics initialized with constant expressions [PR108702]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIPvaT1ipBv5JI4@tucnak/mbox/"},{"id":63987,"url":"https://patchwork.plctlab.org/api/1.2/patches/63987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303164439.1625702-1-jwakely@redhat.com/","msgid":"<20230303164439.1625702-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-03T16:44:39","name":"gcc: Adjust gdbhooks.py VecPrinter for vec layout changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303164439.1625702-1-jwakely@redhat.com/mbox/"},{"id":64016,"url":"https://patchwork.plctlab.org/api/1.2/patches/64016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7p9iv1s.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-03T17:50:07","name":"[libstdc++,prettyprint] add local std::string use to more tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7p9iv1s.fsf@lxoliva.fsfla.org/mbox/"},{"id":64017,"url":"https://patchwork.plctlab.org/api/1.2/patches/64017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIzU47FLQleT9HO@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T17:50:11","name":"[v5] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIzU47FLQleT9HO@redhat.com/mbox/"},{"id":64018,"url":"https://patchwork.plctlab.org/api/1.2/patches/64018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303175121.705791-1-polacek@redhat.com/","msgid":"<20230303175121.705791-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-03T17:51:21","name":"c++: error with constexpr operator() [PR107939]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303175121.705791-1-polacek@redhat.com/mbox/"},{"id":64023,"url":"https://patchwork.plctlab.org/api/1.2/patches/64023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzzxiul9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-03T18:00:02","name":"[rs6000] adjust return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzzxiul9.fsf@lxoliva.fsfla.org/mbox/"},{"id":64024,"url":"https://patchwork.plctlab.org/api/1.2/patches/64024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303180748.1645712-1-jwakely@redhat.com/","msgid":"<20230303180748.1645712-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-03T18:07:48","name":"gcc: Fix gdbhooks.py VecPrinter for vec<> as well as vec<>* [PR109006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303180748.1645712-1-jwakely@redhat.com/mbox/"},{"id":64064,"url":"https://patchwork.plctlab.org/api/1.2/patches/64064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303194333.559903-1-ibuclaw@gdcproject.org/","msgid":"<20230303194333.559903-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T19:43:33","name":"[committed] d: Document that TypeInfo-based va_arg is not implemented [PR108763]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303194333.559903-1-ibuclaw@gdcproject.org/mbox/"},{"id":64098,"url":"https://patchwork.plctlab.org/api/1.2/patches/64098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230327.2730749-1-dmalcolm@redhat.com/","msgid":"<20230303230327.2730749-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:03:27","name":"[pushed] testsuite: remove XFAIL in gcc.dg/analyzer/pr99716-1.c [PR108988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230327.2730749-1-dmalcolm@redhat.com/mbox/"},{"id":64099,"url":"https://patchwork.plctlab.org/api/1.2/patches/64099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230459.2730864-1-dmalcolm@redhat.com/","msgid":"<20230303230459.2730864-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:04:59","name":"[committed] analyzer: provide placeholder implementation of sprintf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230459.2730864-1-dmalcolm@redhat.com/mbox/"},{"id":64101,"url":"https://patchwork.plctlab.org/api/1.2/patches/64101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303232110.2731449-1-dmalcolm@redhat.com/","msgid":"<20230303232110.2731449-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:21:10","name":"[pushed] analyzer: start adding test coverage for OpenMP [PR109016]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303232110.2731449-1-dmalcolm@redhat.com/mbox/"},{"id":64117,"url":"https://patchwork.plctlab.org/api/1.2/patches/64117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005801.3F69C20425@pchp3.se.axis.com/","msgid":"<20230304005801.3F69C20425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T00:58:01","name":"[COMMITTED] testsuite: Fix various scan-assembler identifiers not handling _-prefix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005801.3F69C20425@pchp3.se.axis.com/mbox/"},{"id":64118,"url":"https://patchwork.plctlab.org/api/1.2/patches/64118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005932.4DD8A20425@pchp3.se.axis.com/","msgid":"<20230304005932.4DD8A20425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T00:59:32","name":"[COMMITTED] testsuite: Skip gcc.dg/ifcvt-4.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005932.4DD8A20425@pchp3.se.axis.com/mbox/"},{"id":64119,"url":"https://patchwork.plctlab.org/api/1.2/patches/64119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304010102.7585E20436@pchp3.se.axis.com/","msgid":"<20230304010102.7585E20436@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T01:01:02","name":"[COMMITTED] testsuite: Skip gcc.dg/ipa/pr77653.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304010102.7585E20436@pchp3.se.axis.com/mbox/"},{"id":64183,"url":"https://patchwork.plctlab.org/api/1.2/patches/64183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMGZG59v6MuoI43@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T08:50:44","name":"[committed] diagnostics, v2: Fix up selftests with $COLUMNS < 42 [PR108973]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMGZG59v6MuoI43@tucnak/mbox/"},{"id":64186,"url":"https://patchwork.plctlab.org/api/1.2/patches/64186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMI/REWaNXGJPL2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T09:01:49","name":"Remove remaining traces of m_vecdata from comments [PR109006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMI/REWaNXGJPL2@tucnak/mbox/"},{"id":64188,"url":"https://patchwork.plctlab.org/api/1.2/patches/64188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMTc/ZXC8klOXeY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T09:46:27","name":"[committed] testsuite: Fix up syntax errors in scan-tree-dump-times target selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMTc/ZXC8klOXeY@tucnak/mbox/"},{"id":64262,"url":"https://patchwork.plctlab.org/api/1.2/patches/64262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com/","msgid":"<000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-03-04T18:32:15","name":"PR rtl-optimization/106594: Preserve zero_extend in combine when cheap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com/mbox/"},{"id":64284,"url":"https://patchwork.plctlab.org/api/1.2/patches/64284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230305102430.266375-1-juzhe.zhong@rivai.ai/","msgid":"<20230305102430.266375-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-05T10:24:30","name":"RISC-V: Fix ICE for avl_single-86/avl_single-88/avl_single-90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230305102430.266375-1-juzhe.zhong@rivai.ai/mbox/"},{"id":64336,"url":"https://patchwork.plctlab.org/api/1.2/patches/64336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZATbvdEAtN1tK8Uw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-05T18:13:29","name":"[committed] testsuite: Fix up syntax error in scan-tree-dump-times target selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZATbvdEAtN1tK8Uw@tucnak/mbox/"},{"id":64339,"url":"https://patchwork.plctlab.org/api/1.2/patches/64339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec7afc14-1865-2f69-4d26-fa62dc22ff2c@gmx.de/","msgid":"","list_archive_url":null,"date":"2023-03-05T20:21:41","name":"[v3] Fortran: fix CLASS attribute handling [PR106856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec7afc14-1865-2f69-4d26-fa62dc22ff2c@gmx.de/mbox/"},{"id":64399,"url":"https://patchwork.plctlab.org/api/1.2/patches/64399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com/","msgid":"<5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:13:50","name":"[v2,01/07] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com/mbox/"},{"id":64400,"url":"https://patchwork.plctlab.org/api/1.2/patches/64400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6f5a659-6487-83bb-acef-ba19122d4c1e@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T03:14:23","name":"[v2,02/07] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6f5a659-6487-83bb-acef-ba19122d4c1e@rivosinc.com/mbox/"},{"id":64402,"url":"https://patchwork.plctlab.org/api/1.2/patches/64402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com/","msgid":"<1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:14:53","name":"[v2,03/07] RISC-V: autovec: Add vector cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com/mbox/"},{"id":64403,"url":"https://patchwork.plctlab.org/api/1.2/patches/64403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com/","msgid":"<0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:15:30","name":"[v2,04/07] RISC-V: autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com/mbox/"},{"id":64405,"url":"https://patchwork.plctlab.org/api/1.2/patches/64405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com/","msgid":"<07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:16:01","name":"[v2,05/07] RISC-V: autovec: Add tuning and target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com/mbox/"},{"id":64406,"url":"https://patchwork.plctlab.org/api/1.2/patches/64406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com/","msgid":"<6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:16:31","name":"[V2,06/07] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com/mbox/"},{"id":64408,"url":"https://patchwork.plctlab.org/api/1.2/patches/64408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00013323-7689-85c3-f10a-45f90e746868@rivosinc.com/","msgid":"<00013323-7689-85c3-f10a-45f90e746868@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:17:03","name":"[v2,07/07] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00013323-7689-85c3-f10a-45f90e746868@rivosinc.com/mbox/"},{"id":64528,"url":"https://patchwork.plctlab.org/api/1.2/patches/64528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be761ccd-2db7-1b80-a0bb-1d3499847bc7@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T09:27:09","name":"rs6000, libgcc: Fix bump size for powerpc64 elfv1 ABI [PR108727]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be761ccd-2db7-1b80-a0bb-1d3499847bc7@linux.ibm.com/mbox/"},{"id":64530,"url":"https://patchwork.plctlab.org/api/1.2/patches/64530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com/","msgid":"<60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com>","list_archive_url":null,"date":"2023-03-06T09:27:49","name":"testsuite, rs6000: Adjust ppc-fortran.exp to support dg-{warning,error}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com/mbox/"},{"id":64543,"url":"https://patchwork.plctlab.org/api/1.2/patches/64543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAW7SuefyFqOlPDc@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-03-06T10:07:06","name":"Enable scatter for generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAW7SuefyFqOlPDc@kam.mff.cuni.cz/mbox/"},{"id":64548,"url":"https://patchwork.plctlab.org/api/1.2/patches/64548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de/","msgid":"<20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-06T10:11:20","name":"[RFC] RAII auto_mpfr and autp_mpz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de/mbox/"},{"id":64582,"url":"https://patchwork.plctlab.org/api/1.2/patches/64582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306102609.1310C13A66@imap2.suse-dmz.suse.de/","msgid":"<20230306102609.1310C13A66@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-06T10:26:08","name":"tree-optimization/109025 - fixup double reduction detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306102609.1310C13A66@imap2.suse-dmz.suse.de/mbox/"},{"id":64630,"url":"https://patchwork.plctlab.org/api/1.2/patches/64630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilfe9hdh.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T12:47:06","name":"combine: Try harder to form zero_extends [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilfe9hdh.fsf_-_@arm.com/mbox/"},{"id":64746,"url":"https://patchwork.plctlab.org/api/1.2/patches/64746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306145715.1617591-1-pan2.li@intel.com/","msgid":"<20230306145715.1617591-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-06T14:57:15","name":"[v4] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306145715.1617591-1-pan2.li@intel.com/mbox/"},{"id":65046,"url":"https://patchwork.plctlab.org/api/1.2/patches/65046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184542.0517B20405@pchp3.se.axis.com/","msgid":"<20230306184542.0517B20405@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:45:42","name":"[1/3] testsuite: Add tail_call effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184542.0517B20405@pchp3.se.axis.com/mbox/"},{"id":65047,"url":"https://patchwork.plctlab.org/api/1.2/patches/65047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184735.03643203D7@pchp3.se.axis.com/","msgid":"<20230306184735.03643203D7@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:47:35","name":"[2/3] doc: Document testsuite check_effective_target_tail_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184735.03643203D7@pchp3.se.axis.com/mbox/"},{"id":65048,"url":"https://patchwork.plctlab.org/api/1.2/patches/65048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185008.538C7203D7@pchp3.se.axis.com/","msgid":"<20230306185008.538C7203D7@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:50:08","name":"[3/3] testsuite: Gate gcc.dg/plugin/must-tail-call-1.c and -2.c on tail_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185008.538C7203D7@pchp3.se.axis.com/mbox/"},{"id":65050,"url":"https://patchwork.plctlab.org/api/1.2/patches/65050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185255.721FC20405@pchp3.se.axis.com/","msgid":"<20230306185255.721FC20405@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:52:55","name":"testsuite: Support scanning tree-dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185255.721FC20405@pchp3.se.axis.com/mbox/"},{"id":65129,"url":"https://patchwork.plctlab.org/api/1.2/patches/65129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZhCDWSrLacjPCs@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T21:54:16","name":"[v6] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZhCDWSrLacjPCs@redhat.com/mbox/"},{"id":65130,"url":"https://patchwork.plctlab.org/api/1.2/patches/65130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZinAZKAELCJ2Sy@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T22:01:00","name":"[v2] c++: error with constexpr operator() [PR107939]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZinAZKAELCJ2Sy@redhat.com/mbox/"},{"id":65181,"url":"https://patchwork.plctlab.org/api/1.2/patches/65181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJtMq0f00sm_Hasn9pVZPGWD12hN99FHnGM0BKCgi+DYA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T23:45:16","name":"libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJtMq0f00sm_Hasn9pVZPGWD12hN99FHnGM0BKCgi+DYA@mail.gmail.com/mbox/"},{"id":65182,"url":"https://patchwork.plctlab.org/api/1.2/patches/65182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306235957.390533-1-polacek@redhat.com/","msgid":"<20230306235957.390533-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-06T23:59:57","name":"c++: noexcept and copy elision [PR109030]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306235957.390533-1-polacek@redhat.com/mbox/"},{"id":65280,"url":"https://patchwork.plctlab.org/api/1.2/patches/65280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307062123.142975-1-juzhe.zhong@rivai.ai/","msgid":"<20230307062123.142975-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-07T06:21:23","name":"RISC-V: Add fault first load C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307062123.142975-1-juzhe.zhong@rivai.ai/mbox/"},{"id":65330,"url":"https://patchwork.plctlab.org/api/1.2/patches/65330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e76cdb-49e7-aa77-d861-ccebe64748cf@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T08:55:38","name":"[PATCHv3,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e76cdb-49e7-aa77-d861-ccebe64748cf@linux.ibm.com/mbox/"},{"id":65332,"url":"https://patchwork.plctlab.org/api/1.2/patches/65332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAb+vw8RAyZtrlll@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-07T09:07:11","name":"c++: Fix up ICE in emit_support_tinfo_1 [PR109042]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAb+vw8RAyZtrlll@tucnak/mbox/"},{"id":65333,"url":"https://patchwork.plctlab.org/api/1.2/patches/65333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307091204.1498-1-shihua@iscas.ac.cn/","msgid":"<20230307091204.1498-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-07T09:12:04","name":"[RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307091204.1498-1-shihua@iscas.ac.cn/mbox/"},{"id":65370,"url":"https://patchwork.plctlab.org/api/1.2/patches/65370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307110906.81A03385B523@sourceware.org/","msgid":"<20230307110906.81A03385B523@sourceware.org>","list_archive_url":null,"date":"2023-03-07T11:08:15","name":"tree-optimization/109046 - re-combine complex loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307110906.81A03385B523@sourceware.org/mbox/"},{"id":65395,"url":"https://patchwork.plctlab.org/api/1.2/patches/65395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307120515.258058-1-pan2.li@intel.com/","msgid":"<20230307120515.258058-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-07T12:05:15","name":"[v5] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307120515.258058-1-pan2.li@intel.com/mbox/"},{"id":65508,"url":"https://patchwork.plctlab.org/api/1.2/patches/65508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLxqFxtwm8zK_uftgfoKjVeh-EXv85cVtX50T_=fsC9yw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T13:45:55","name":"[fortran] PR37336 finalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLxqFxtwm8zK_uftgfoKjVeh-EXv85cVtX50T_=fsC9yw@mail.gmail.com/mbox/"},{"id":65745,"url":"https://patchwork.plctlab.org/api/1.2/patches/65745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173534.1976902-1-jwakely@redhat.com/","msgid":"<20230307173534.1976902-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-07T17:35:34","name":"[committed] libstdc++: Fix comment typo in eh_personality.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173534.1976902-1-jwakely@redhat.com/mbox/"},{"id":65747,"url":"https://patchwork.plctlab.org/api/1.2/patches/65747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173549.1976948-1-jwakely@redhat.com/","msgid":"<20230307173549.1976948-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-07T17:35:49","name":"[committed] libstdc++: Fix symver for __gnu_cxx11_ieee128::__try_use_facet [PR108882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173549.1976948-1-jwakely@redhat.com/mbox/"},{"id":65749,"url":"https://patchwork.plctlab.org/api/1.2/patches/65749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17094-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T17:38:29","name":"middle-end: On emergency dumps finish the graph generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17094-tamar@arm.com/mbox/"},{"id":65768,"url":"https://patchwork.plctlab.org/api/1.2/patches/65768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307193349.578669-1-jason@redhat.com/","msgid":"<20230307193349.578669-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-07T19:33:49","name":"c++: static lambda tsubst [PR108526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307193349.578669-1-jason@redhat.com/mbox/"},{"id":65833,"url":"https://patchwork.plctlab.org/api/1.2/patches/65833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307201335.14969-1-ppalka@redhat.com/","msgid":"<20230307201335.14969-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-07T20:13:35","name":"libstdc++: extraneous begin in cartesian_product_view::end [PR107572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307201335.14969-1-ppalka@redhat.com/mbox/"},{"id":65983,"url":"https://patchwork.plctlab.org/api/1.2/patches/65983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308025945.648936-1-jason@redhat.com/","msgid":"<20230308025945.648936-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-08T02:59:44","name":"[RFC] c++: lambda mangling alias issues [PR107897]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308025945.648936-1-jason@redhat.com/mbox/"},{"id":65988,"url":"https://patchwork.plctlab.org/api/1.2/patches/65988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308031856.174124-1-juzhe.zhong@rivai.ai/","msgid":"<20230308031856.174124-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T03:18:56","name":"RISC-V: Fine tune merge operand constraint for integer/load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308031856.174124-1-juzhe.zhong@rivai.ai/mbox/"},{"id":65993,"url":"https://patchwork.plctlab.org/api/1.2/patches/65993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-2-collison@rivosinc.com/","msgid":"<20230308032740.989275-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:35","name":"[v3,1/6] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-2-collison@rivosinc.com/mbox/"},{"id":65992,"url":"https://patchwork.plctlab.org/api/1.2/patches/65992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-3-collison@rivosinc.com/","msgid":"<20230308032740.989275-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:36","name":"[v3,2/6] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-3-collison@rivosinc.com/mbox/"},{"id":65994,"url":"https://patchwork.plctlab.org/api/1.2/patches/65994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-4-collison@rivosinc.com/","msgid":"<20230308032740.989275-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:37","name":"[v3,3/6] RISC-V: autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-4-collison@rivosinc.com/mbox/"},{"id":65995,"url":"https://patchwork.plctlab.org/api/1.2/patches/65995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-5-collison@rivosinc.com/","msgid":"<20230308032740.989275-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:38","name":"[v3,4/6] RISC-V: autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-5-collison@rivosinc.com/mbox/"},{"id":65996,"url":"https://patchwork.plctlab.org/api/1.2/patches/65996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-6-collison@rivosinc.com/","msgid":"<20230308032740.989275-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:39","name":"[v3,5/6] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-6-collison@rivosinc.com/mbox/"},{"id":65999,"url":"https://patchwork.plctlab.org/api/1.2/patches/65999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-7-collison@rivosinc.com/","msgid":"<20230308032740.989275-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:40","name":"[v3,6/6] RISC-V: autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-7-collison@rivosinc.com/mbox/"},{"id":66014,"url":"https://patchwork.plctlab.org/api/1.2/patches/66014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308045839.D4D7D203F2@pchp3.se.axis.com/","msgid":"<20230308045839.D4D7D203F2@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-08T04:58:39","name":"testsuite: Fix omp-parallel-for-get-min.c and -for-1.c for non-openmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308045839.D4D7D203F2@pchp3.se.axis.com/mbox/"},{"id":66015,"url":"https://patchwork.plctlab.org/api/1.2/patches/66015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com/","msgid":"<413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com>","list_archive_url":null,"date":"2023-03-08T05:03:41","name":"[committed] Fix MIPS testsuite over-eager matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com/mbox/"},{"id":66023,"url":"https://patchwork.plctlab.org/api/1.2/patches/66023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp/","msgid":"<8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp>","list_archive_url":null,"date":"2023-03-08T06:04:41","name":"xtensa: Fix for enabling LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp/mbox/"},{"id":66024,"url":"https://patchwork.plctlab.org/api/1.2/patches/66024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308061621.317733-1-juzhe.zhong@rivai.ai/","msgid":"<20230308061621.317733-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T06:16:21","name":"RISC-V: Fine tunning merge operand constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308061621.317733-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66028,"url":"https://patchwork.plctlab.org/api/1.2/patches/66028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308063138.1490431-1-hongyu.wang@intel.com/","msgid":"<20230308063138.1490431-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-03-08T06:31:38","name":"libgomp: Fix default value of GOMP_SPINCOUNT [PR 109062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308063138.1490431-1-hongyu.wang@intel.com/mbox/"},{"id":66049,"url":"https://patchwork.plctlab.org/api/1.2/patches/66049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308073333.814033-1-pan2.li@intel.com/","msgid":"<20230308073333.814033-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-08T07:33:33","name":"RISC-V: Bugfix for rvv bool mode size adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308073333.814033-1-pan2.li@intel.com/mbox/"},{"id":66057,"url":"https://patchwork.plctlab.org/api/1.2/patches/66057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308074213.97404-1-juzhe.zhong@rivai.ai/","msgid":"<20230308074213.97404-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T07:42:13","name":"Extend nops num in \"maybe_gen_insn\" for RISC-V Vector intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308074213.97404-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66126,"url":"https://patchwork.plctlab.org/api/1.2/patches/66126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308093929.98D8C3858C62@sourceware.org/","msgid":"<20230308093929.98D8C3858C62@sourceware.org>","list_archive_url":null,"date":"2023-03-08T09:38:43","name":"middle-end/108995 - avoid folding when sanitizing overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308093929.98D8C3858C62@sourceware.org/mbox/"},{"id":66147,"url":"https://patchwork.plctlab.org/api/1.2/patches/66147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com/","msgid":"<17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com>","list_archive_url":null,"date":"2023-03-08T11:05:37","name":"GCN update for wwwdocs / libgomp.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com/mbox/"},{"id":66191,"url":"https://patchwork.plctlab.org/api/1.2/patches/66191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79726845-749b-8e49-6c10-1f7930074ddf@gmail.com/","msgid":"<79726845-749b-8e49-6c10-1f7930074ddf@gmail.com>","list_archive_url":null,"date":"2023-03-08T13:07:19","name":"[v3] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79726845-749b-8e49-6c10-1f7930074ddf@gmail.com/mbox/"},{"id":66251,"url":"https://patchwork.plctlab.org/api/1.2/patches/66251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB16201866FEA701E17850E8D3ACB49@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-03-08T14:08:49","name":"libstdc++: Fix handling of surrogate CP in codecvt [PR108976]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB16201866FEA701E17850E8D3ACB49@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":66261,"url":"https://patchwork.plctlab.org/api/1.2/patches/66261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308143527.113337-1-ppalka@redhat.com/","msgid":"<20230308143527.113337-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T14:35:27","name":"libstdc++: Make views::single/iota/istream SFINAE-friendly [PR108362]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308143527.113337-1-ppalka@redhat.com/mbox/"},{"id":66287,"url":"https://patchwork.plctlab.org/api/1.2/patches/66287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308151133.152110-1-ppalka@redhat.com/","msgid":"<20230308151133.152110-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T15:11:33","name":"libstdc++: Implement LWG 3820/3849 changes to cartesian_product_view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308151133.152110-1-ppalka@redhat.com/mbox/"},{"id":66320,"url":"https://patchwork.plctlab.org/api/1.2/patches/66320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308155306.257241-1-ppalka@redhat.com/","msgid":"<20230308155306.257241-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T15:53:06","name":"libstdc++: Implement LWG 3715 changes to view_interface::empty","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308155306.257241-1-ppalka@redhat.com/mbox/"},{"id":66347,"url":"https://patchwork.plctlab.org/api/1.2/patches/66347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com/","msgid":"<98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com>","list_archive_url":null,"date":"2023-03-08T16:20:02","name":"[1/X] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com/mbox/"},{"id":66348,"url":"https://patchwork.plctlab.org/api/1.2/patches/66348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com/","msgid":"<08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com>","list_archive_url":null,"date":"2023-03-08T16:21:47","name":"[2/X] parloops: Copy target and optimizations when creating a function clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com/mbox/"},{"id":66349,"url":"https://patchwork.plctlab.org/api/1.2/patches/66349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com/","msgid":"<8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com>","list_archive_url":null,"date":"2023-03-08T16:23:45","name":"[3/X] parloops: Allow poly number of iterations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com/mbox/"},{"id":66350,"url":"https://patchwork.plctlab.org/api/1.2/patches/66350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4e8c0df-3c3b-852c-3e87-e54ead721fc8@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-08T16:25:27","name":"[RFC,4/X] omp, aarch64: Add SVE support for '\''omp declare simd'\'' [PR 96342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4e8c0df-3c3b-852c-3e87-e54ead721fc8@arm.com/mbox/"},{"id":66351,"url":"https://patchwork.plctlab.org/api/1.2/patches/66351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce294c68-cfb4-9716-f939-7bbf0e9a6205@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-08T16:26:59","name":"[RFC,5/X] omp: Create simd clones from '\''omp declare variant'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce294c68-cfb4-9716-f939-7bbf0e9a6205@arm.com/mbox/"},{"id":66352,"url":"https://patchwork.plctlab.org/api/1.2/patches/66352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com/","msgid":"<2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com>","list_archive_url":null,"date":"2023-03-08T16:28:24","name":"[RFC,6/X] omp: Allow creation of simd clones from omp declare variant with -fopenmp-simd flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com/mbox/"},{"id":66356,"url":"https://patchwork.plctlab.org/api/1.2/patches/66356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308164651.325398-1-ppalka@redhat.com/","msgid":"<20230308164651.325398-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T16:46:51","name":"libstdc++: Implement P2520R0 changes to move_iterator'\''s iterator_concept","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308164651.325398-1-ppalka@redhat.com/mbox/"},{"id":66451,"url":"https://patchwork.plctlab.org/api/1.2/patches/66451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308210930.128620-1-polacek@redhat.com/","msgid":"<20230308210930.128620-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-08T21:09:30","name":"ubsan: missed -fsanitize=bounds for compound ops [PR108060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308210930.128620-1-polacek@redhat.com/mbox/"},{"id":66481,"url":"https://patchwork.plctlab.org/api/1.2/patches/66481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308222146.102045-1-juzhe.zhong@rivai.ai/","msgid":"<20230308222146.102045-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T22:21:46","name":"[V2] RISC-V: Add fault first load C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308222146.102045-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66493,"url":"https://patchwork.plctlab.org/api/1.2/patches/66493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com/","msgid":"<40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com>","list_archive_url":null,"date":"2023-03-08T23:01:38","name":"rs6000: Accept const pointer operands for MMA builtins [PR109073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com/mbox/"},{"id":66556,"url":"https://patchwork.plctlab.org/api/1.2/patches/66556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021620.19719-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021620.19719-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:20","name":"[gcc12,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021620.19719-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66557,"url":"https://patchwork.plctlab.org/api/1.2/patches/66557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021627.19767-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021627.19767-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:27","name":"[gcc11,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021627.19767-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66558,"url":"https://patchwork.plctlab.org/api/1.2/patches/66558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021636.19815-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021636.19815-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:36","name":"[gcc10,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021636.19815-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66612,"url":"https://patchwork.plctlab.org/api/1.2/patches/66612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309065846.2D7A933E60@hamza.pair.com/","msgid":"<20230309065846.2D7A933E60@hamza.pair.com>","list_archive_url":null,"date":"2023-03-09T06:58:44","name":"[pushed] wwwdocs: gcc-13: Spell front end (noun) without dash","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309065846.2D7A933E60@hamza.pair.com/mbox/"},{"id":66642,"url":"https://patchwork.plctlab.org/api/1.2/patches/66642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309075710.2236986-1-collison@rivosinc.com/","msgid":"<20230309075710.2236986-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-09T07:57:10","name":"[v2] vect: Check that vector factor is a compile-time constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309075710.2236986-1-collison@rivosinc.com/mbox/"},{"id":66682,"url":"https://patchwork.plctlab.org/api/1.2/patches/66682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAmYznEFViafs4Gv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-09T08:29:02","name":"range-op-float: Fix up reverse binary operations [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAmYznEFViafs4Gv@tucnak/mbox/"},{"id":66755,"url":"https://patchwork.plctlab.org/api/1.2/patches/66755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309103821.D67683850868@sourceware.org/","msgid":"<20230309103821.D67683850868@sourceware.org>","list_archive_url":null,"date":"2023-03-09T10:37:13","name":"Avoid unnecessary epilogues from tree_unroll_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309103821.D67683850868@sourceware.org/mbox/"},{"id":66789,"url":"https://patchwork.plctlab.org/api/1.2/patches/66789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309111602.D79AC3858C3A@sourceware.org/","msgid":"<20230309111602.D79AC3858C3A@sourceware.org>","list_archive_url":null,"date":"2023-03-09T11:15:17","name":"tree-optimization/44794 - avoid excessive RTL unrolling on epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309111602.D79AC3858C3A@sourceware.org/mbox/"},{"id":66823,"url":"https://patchwork.plctlab.org/api/1.2/patches/66823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsae15yg.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T12:09:59","name":"[v2,1/2] combine: Split code out of make_compound_operation_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsae15yg.fsf@arm.com/mbox/"},{"id":66824,"url":"https://patchwork.plctlab.org/api/1.2/patches/66824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkl215x0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T12:10:51","name":"[v2,2/2] combine: Try harder to form zero_extends [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkl215x0.fsf@arm.com/mbox/"},{"id":66865,"url":"https://patchwork.plctlab.org/api/1.2/patches/66865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com/","msgid":"<8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com>","list_archive_url":null,"date":"2023-03-09T13:45:32","name":"[pushed,PR108999] LRA: For clobbered regs use operand mode instead of the biggest mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com/mbox/"},{"id":66955,"url":"https://patchwork.plctlab.org/api/1.2/patches/66955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309161236.2192731-1-jwakely@redhat.com/","msgid":"<20230309161236.2192731-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-09T16:12:36","name":"[committed] libstdc++: Really fix symver for __gnu_cxx11_ieee128::__try_use_facet [PR108882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309161236.2192731-1-jwakely@redhat.com/mbox/"},{"id":67063,"url":"https://patchwork.plctlab.org/api/1.2/patches/67063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309180320.2899452-1-apinski@marvell.com/","msgid":"<20230309180320.2899452-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-09T18:03:20","name":"[PATCHv2] Fix PR 108980: note without warning due to array bounds check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309180320.2899452-1-apinski@marvell.com/mbox/"},{"id":67065,"url":"https://patchwork.plctlab.org/api/1.2/patches/67065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c56ca7fa-4444-483d-9c3e-93f641dd7f22-1678385289835@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-03-09T18:08:09","name":"Fortran: fix ICE with bind(c) in block data [PR104332]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c56ca7fa-4444-483d-9c3e-93f641dd7f22-1678385289835@3c-app-gmx-bap32/mbox/"},{"id":67070,"url":"https://patchwork.plctlab.org/api/1.2/patches/67070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309185616.E420F20438@pchp3.se.axis.com/","msgid":"<20230309185616.E420F20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-09T18:56:16","name":"testsuite: Handle default_packed targets in gcc.dg/plugin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309185616.E420F20438@pchp3.se.axis.com/mbox/"},{"id":67080,"url":"https://patchwork.plctlab.org/api/1.2/patches/67080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17101-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T19:36:21","name":"middle-end: don'\''t form FMAs when multiplication is not single use. [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17101-tamar@arm.com/mbox/"},{"id":67082,"url":"https://patchwork.plctlab.org/api/1.2/patches/67082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAo2E3aXm85gr4dw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-09T19:40:03","name":"c++, abi: Fix up class layout with bitfields [PR109039]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAo2E3aXm85gr4dw@tucnak/mbox/"},{"id":67116,"url":"https://patchwork.plctlab.org/api/1.2/patches/67116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212318.3126266-1-dmalcolm@redhat.com/","msgid":"<20230309212318.3126266-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-09T21:23:18","name":"[pushed] testsuite: add various -Wanalyzer-null-dereference false +ve test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212318.3126266-1-dmalcolm@redhat.com/mbox/"},{"id":67117,"url":"https://patchwork.plctlab.org/api/1.2/patches/67117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212619.2329010-1-jason@redhat.com/","msgid":"<20230309212619.2329010-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-09T21:26:19","name":"[pushed] c++: allocator temps in list of arrays [PR108773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212619.2329010-1-jason@redhat.com/mbox/"},{"id":67130,"url":"https://patchwork.plctlab.org/api/1.2/patches/67130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-1-arsen@aarsen.me/","msgid":"<20230309222626.4008373-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-09T22:26:25","name":"[1/2] libstdc++: Harmonize and other headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-1-arsen@aarsen.me/mbox/"},{"id":67131,"url":"https://patchwork.plctlab.org/api/1.2/patches/67131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-2-arsen@aarsen.me/","msgid":"<20230309222626.4008373-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-09T22:26:26","name":"[2/2] libstdc++: Add a test for FTM redefinitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-2-arsen@aarsen.me/mbox/"},{"id":67181,"url":"https://patchwork.plctlab.org/api/1.2/patches/67181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAp9hXdOGo/Ks+xz@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-10T00:44:53","name":"[v2] ubsan: missed -fsanitize=bounds for compound ops [PR108060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAp9hXdOGo/Ks+xz@redhat.com/mbox/"},{"id":67183,"url":"https://patchwork.plctlab.org/api/1.2/patches/67183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAqKlNLJl4jMFGVa@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-10T01:40:36","name":"[V4] Rework 128-bit complex multiply and divide.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAqKlNLJl4jMFGVa@toto.the-meissners.org/mbox/"},{"id":67186,"url":"https://patchwork.plctlab.org/api/1.2/patches/67186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310030205.90760-1-juzhe.zhong@rivai.ai/","msgid":"<20230310030205.90760-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-10T03:02:05","name":"RISC-V: Fine tune RA constraint for narrow instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310030205.90760-1-juzhe.zhong@rivai.ai/mbox/"},{"id":67188,"url":"https://patchwork.plctlab.org/api/1.2/patches/67188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310031351.2404945-1-jason@redhat.com/","msgid":"<20230310031351.2404945-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T03:13:51","name":"[pushed] c++: overloaded fn in contract [PR108542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310031351.2404945-1-jason@redhat.com/mbox/"},{"id":67199,"url":"https://patchwork.plctlab.org/api/1.2/patches/67199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310035736.2418695-1-jason@redhat.com/","msgid":"<20230310035736.2418695-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T03:57:36","name":"[pushed] c++: signed __int128_t [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310035736.2418695-1-jason@redhat.com/mbox/"},{"id":67228,"url":"https://patchwork.plctlab.org/api/1.2/patches/67228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310055947.2918320-1-apinski@marvell.com/","msgid":"<20230310055947.2918320-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T05:59:47","name":"Fix PR 108874: aarch64 code regression with shift and ands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310055947.2918320-1-apinski@marvell.com/mbox/"},{"id":67264,"url":"https://patchwork.plctlab.org/api/1.2/patches/67264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArlUJOn1HBZ44yJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T08:07:44","name":"range-op-float: Fix up -ffinite-math-only range extension and don'\''t extend into infinities [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArlUJOn1HBZ44yJ@tucnak/mbox/"},{"id":67268,"url":"https://patchwork.plctlab.org/api/1.2/patches/67268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310080857.186586-1-juzhe.zhong@rivai.ai/","msgid":"<20230310080857.186586-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-10T08:08:57","name":"RISC-V: Fix ICE of RVV compare intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310080857.186586-1-juzhe.zhong@rivai.ai/mbox/"},{"id":67271,"url":"https://patchwork.plctlab.org/api/1.2/patches/67271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArmdQvGOS9m7jXA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T08:12:37","name":"range-op-float: Extend lhs by 0.5ulp rather than 1ulp if not -frounding-math [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArmdQvGOS9m7jXA@tucnak/mbox/"},{"id":67364,"url":"https://patchwork.plctlab.org/api/1.2/patches/67364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de/","msgid":"<20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-10T11:26:47","name":"Shrink points-to analysis dumps when not dumping with -details","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de/mbox/"},{"id":67370,"url":"https://patchwork.plctlab.org/api/1.2/patches/67370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310113718.2304961-1-jwakely@redhat.com/","msgid":"<20230310113718.2304961-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-10T11:37:18","name":"[committed] libstdc++: Fix GDB Xmethod for std::shared_ptr::use_count() [PR109064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310113718.2304961-1-jwakely@redhat.com/mbox/"},{"id":67384,"url":"https://patchwork.plctlab.org/api/1.2/patches/67384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310124053.164-1-jinma@linux.alibaba.com/","msgid":"<20230310124053.164-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-03-10T12:40:53","name":"[v6] RISC-V: Add support for experimental zfa extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310124053.164-1-jinma@linux.alibaba.com/mbox/"},{"id":67404,"url":"https://patchwork.plctlab.org/api/1.2/patches/67404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133232.3165688-1-dmalcolm@redhat.com/","msgid":"<20230310133232.3165688-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-10T13:32:32","name":"[pushed] analyzer: fix deref-before-check false +ves seen in haproxy [PR108475, PR109060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133232.3165688-1-dmalcolm@redhat.com/mbox/"},{"id":67406,"url":"https://patchwork.plctlab.org/api/1.2/patches/67406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133858.76465134F7@imap2.suse-dmz.suse.de/","msgid":"<20230310133858.76465134F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-10T13:38:57","name":"Speedup PTA solving for call constraint sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133858.76465134F7@imap2.suse-dmz.suse.de/mbox/"},{"id":67408,"url":"https://patchwork.plctlab.org/api/1.2/patches/67408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310135420.2492295-1-jason@redhat.com/","msgid":"<20230310135420.2492295-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T13:54:20","name":"[pushed] c++: class NTTP and nested anon union [PR108566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310135420.2492295-1-jason@redhat.com/mbox/"},{"id":67409,"url":"https://patchwork.plctlab.org/api/1.2/patches/67409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6usbsxt.fsf@euler.schwinge.homeip.net/","msgid":"<87h6usbsxt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:07:58","name":"Fix OpenACC/GCN '\''acc_ev_enqueue_launch_end'\'' position (was: [PATCH] [og9] OpenACC profiling support for AMD GCN)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6usbsxt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67412,"url":"https://patchwork.plctlab.org/api/1.2/patches/67412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz5gbsbm.fsf@euler.schwinge.homeip.net/","msgid":"<87cz5gbsbm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:21:17","name":"Document/verify another aspect of OpenACC '\''async'\'' semantics in '\''libgomp.oacc-c-c++-common/data-3.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz5gbsbm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67413,"url":"https://patchwork.plctlab.org/api/1.2/patches/67413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a60kbrbo.fsf@euler.schwinge.homeip.net/","msgid":"<87a60kbrbo.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:42:51","name":"OpenACC: Remove '\''acc_async_test'\'' -> skip shortcut in '\''libgomp/oacc-async.c:goacc_wait'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a60kbrbo.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67420,"url":"https://patchwork.plctlab.org/api/1.2/patches/67420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yb8bqlt.fsf@euler.schwinge.homeip.net/","msgid":"<875yb8bqlt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:58:22","name":"Simplify OpenACC '\''no_create'\'' clause implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yb8bqlt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67424,"url":"https://patchwork.plctlab.org/api/1.2/patches/67424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87356cbpgy.fsf@euler.schwinge.homeip.net/","msgid":"<87356cbpgy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T15:22:53","name":"Allow libgomp '\''cbuf'\'' buffering with OpenACC '\''async'\'' for '\''ephemeral'\'' data (was: [PATCH 3/4] openacc: Fix asynchronous host-to-device copies in libgomp runtime)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87356cbpgy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67425,"url":"https://patchwork.plctlab.org/api/1.2/patches/67425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310153513.2330396-1-jwakely@redhat.com/","msgid":"<20230310153513.2330396-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-10T15:35:13","name":"gcc: Add deleted assignment operators to non-copyable types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310153513.2330396-1-jwakely@redhat.com/mbox/"},{"id":67439,"url":"https://patchwork.plctlab.org/api/1.2/patches/67439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAtQIleilVL5xkAl@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T15:43:30","name":"c++ testsuite: Add test for PR107703","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAtQIleilVL5xkAl@tucnak/mbox/"},{"id":67525,"url":"https://patchwork.plctlab.org/api/1.2/patches/67525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310161713.124368-1-polacek@redhat.com/","msgid":"<20230310161713.124368-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-10T16:17:13","name":"c++: ICE with constexpr lambda [PR107280]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310161713.124368-1-polacek@redhat.com/mbox/"},{"id":67578,"url":"https://patchwork.plctlab.org/api/1.2/patches/67578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310165841.3179375-1-dmalcolm@redhat.com/","msgid":"<20230310165841.3179375-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-10T16:58:41","name":"[pushed] analyzer: fix leak false +ve seen in haproxy'\''s cfgparse.c [PR109059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310165841.3179375-1-dmalcolm@redhat.com/mbox/"},{"id":67589,"url":"https://patchwork.plctlab.org/api/1.2/patches/67589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8ka5s2.fsf@euler.schwinge.homeip.net/","msgid":"<87zg8ka5s2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T17:13:33","name":"Use '\''GOMP_MAP_VARS_TARGET'\'' for OpenACC compute constructs [PR90596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8ka5s2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67605,"url":"https://patchwork.plctlab.org/api/1.2/patches/67605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310173954.DB93433E1B@hamza.pair.com/","msgid":"<20230310173954.DB93433E1B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-10T17:39:52","name":"[pushed] wwwdocs: gcc-13: Escape < and > as < and >","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310173954.DB93433E1B@hamza.pair.com/mbox/"},{"id":67618,"url":"https://patchwork.plctlab.org/api/1.2/patches/67618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310175102.2937497-1-apinski@marvell.com/","msgid":"<20230310175102.2937497-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T17:51:02","name":"[COMMITTED] Fix PR 108874: aarch64 code regression with shift and ands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310175102.2937497-1-apinski@marvell.com/mbox/"},{"id":67620,"url":"https://patchwork.plctlab.org/api/1.2/patches/67620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eef3f64d-521e-e24d-80fb-24f18ee3e4e7@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-10T17:54:10","name":"[Fortran] Enable -fwrapv for -std=legacy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eef3f64d-521e-e24d-80fb-24f18ee3e4e7@netcologne.de/mbox/"},{"id":67641,"url":"https://patchwork.plctlab.org/api/1.2/patches/67641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310184938.2531120-1-jason@redhat.com/","msgid":"<20230310184938.2531120-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T18:49:38","name":"[pushed] c++: constrained lambda error-recovery [PR108972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310184938.2531120-1-jason@redhat.com/mbox/"},{"id":67642,"url":"https://patchwork.plctlab.org/api/1.2/patches/67642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310185048.1183264-1-arsen@aarsen.me/","msgid":"<20230310185048.1183264-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-10T18:50:48","name":"[pushed] MAINTAINERS: add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310185048.1183264-1-arsen@aarsen.me/mbox/"},{"id":67648,"url":"https://patchwork.plctlab.org/api/1.2/patches/67648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310190741.168444-1-polacek@redhat.com/","msgid":"<20230310190741.168444-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-10T19:07:41","name":"c++: suppress -Wdangling-reference for std::span [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310190741.168444-1-polacek@redhat.com/mbox/"},{"id":67660,"url":"https://patchwork.plctlab.org/api/1.2/patches/67660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310201620.2097011-1-collison@rivosinc.com/","msgid":"<20230310201620.2097011-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-10T20:16:20","name":"vect: Verify that GET_MODE_NUNITS is power-of-2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310201620.2097011-1-collison@rivosinc.com/mbox/"},{"id":67741,"url":"https://patchwork.plctlab.org/api/1.2/patches/67741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310215351.2943914-1-apinski@marvell.com/","msgid":"<20230310215351.2943914-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T21:53:51","name":"[COMMITTED/12] tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310215351.2943914-1-apinski@marvell.com/mbox/"},{"id":67826,"url":"https://patchwork.plctlab.org/api/1.2/patches/67826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225124.CF2BD20417@pchp3.se.axis.com/","msgid":"<20230310225124.CF2BD20417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:51:24","name":"[committed] testsuite: gcc.dg/pr106397.c: Add -w to options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225124.CF2BD20417@pchp3.se.axis.com/mbox/"},{"id":67827,"url":"https://patchwork.plctlab.org/api/1.2/patches/67827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225234.F162720417@pchp3.se.axis.com/","msgid":"<20230310225234.F162720417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:52:34","name":"[committed] testsuite: gcc.dg/pr108117.c: Require effective-target scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225234.F162720417@pchp3.se.axis.com/mbox/"},{"id":67829,"url":"https://patchwork.plctlab.org/api/1.2/patches/67829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225403.3827420420@pchp3.se.axis.com/","msgid":"<20230310225403.3827420420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:54:03","name":"[committed] testsuite: Tweak check_fork_available for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225403.3827420420@pchp3.se.axis.com/mbox/"},{"id":67839,"url":"https://patchwork.plctlab.org/api/1.2/patches/67839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfca67e4-e14f-63cd-fefb-db0025353d90@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-03-10T23:08:57","name":"update copyright year in libstdc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfca67e4-e14f-63cd-fefb-db0025353d90@jguk.org/mbox/"},{"id":67865,"url":"https://patchwork.plctlab.org/api/1.2/patches/67865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39626f1c48c842b523aa46e3c23b2aabe356e27.1678491986.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-10T23:53:05","name":"[1/3] OpenMP: Fix \"exit data\" for array sections for ref-to-ptr components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39626f1c48c842b523aa46e3c23b2aabe356e27.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67867,"url":"https://patchwork.plctlab.org/api/1.2/patches/67867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com/","msgid":"<6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-10T23:53:06","name":"[2/3] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67866,"url":"https://patchwork.plctlab.org/api/1.2/patches/67866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com/","msgid":"<4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-10T23:53:07","name":"[3/3] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67951,"url":"https://patchwork.plctlab.org/api/1.2/patches/67951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311012749.2949900-1-apinski@marvell.com/","msgid":"<20230311012749.2949900-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-11T01:27:49","name":"[COMMITTED/12] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311012749.2949900-1-apinski@marvell.com/mbox/"},{"id":67956,"url":"https://patchwork.plctlab.org/api/1.2/patches/67956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4afcdfe-1f44-0414-85b4-b6b16633de58@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-11T01:33:33","name":"[Committed] Docs: Update documentation of Texinfo versions for building manuals.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4afcdfe-1f44-0414-85b4-b6b16633de58@codesourcery.com/mbox/"},{"id":68125,"url":"https://patchwork.plctlab.org/api/1.2/patches/68125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-618a0ce8-7457-4d87-828a-ea87d1342711-1678546768519@3c-app-gmx-bs11/","msgid":"","list_archive_url":null,"date":"2023-03-11T14:59:28","name":"[pushed] Fortran: fix bounds check for copying of class expressions [PR106945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-618a0ce8-7457-4d87-828a-ea87d1342711-1678546768519@3c-app-gmx-bs11/mbox/"},{"id":68137,"url":"https://patchwork.plctlab.org/api/1.2/patches/68137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2d2ce62-49e9-296d-096f-e82c203d9f14@seanbright.com/","msgid":"","list_archive_url":null,"date":"2023-03-11T17:33:46","name":"docs: Fix double '\''See'\'' in zero-length-bounds docs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2d2ce62-49e9-296d-096f-e82c203d9f14@seanbright.com/mbox/"},{"id":68187,"url":"https://patchwork.plctlab.org/api/1.2/patches/68187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202445.3133190-1-sam@gentoo.org/","msgid":"<20230311202445.3133190-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-11T20:24:45","name":"RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202445.3133190-1-sam@gentoo.org/mbox/"},{"id":68188,"url":"https://patchwork.plctlab.org/api/1.2/patches/68188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202522.0D82833EA9@hamza.pair.com/","msgid":"<20230311202522.0D82833EA9@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T20:25:20","name":"[pushed] wwwdocs: gcc-10: Minor tweaks to the OpenACC/OpenMP section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202522.0D82833EA9@hamza.pair.com/mbox/"},{"id":68189,"url":"https://patchwork.plctlab.org/api/1.2/patches/68189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202705.3135051-1-sam@gentoo.org/","msgid":"<20230311202705.3135051-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-11T20:27:05","name":"[v2] RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202705.3135051-1-sam@gentoo.org/mbox/"},{"id":68190,"url":"https://patchwork.plctlab.org/api/1.2/patches/68190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311203234.2257423-1-arsen@aarsen.me/","msgid":"<20230311203234.2257423-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-11T20:32:34","name":"[v2] html: Set CONTENTS_OUTPUT_LOCATION=inline if makeinfo supports it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311203234.2257423-1-arsen@aarsen.me/mbox/"},{"id":68214,"url":"https://patchwork.plctlab.org/api/1.2/patches/68214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230238.CBACF33E9F@hamza.pair.com/","msgid":"<20230311230238.CBACF33E9F@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T23:02:37","name":"[pushed] doc: Drop a redundant link to AVR-LibC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230238.CBACF33E9F@hamza.pair.com/mbox/"},{"id":68215,"url":"https://patchwork.plctlab.org/api/1.2/patches/68215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230859.4EB3E33EB3@hamza.pair.com/","msgid":"<20230311230859.4EB3E33EB3@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T23:08:57","name":"[pushed] wwwdocs: testing: Further adjust link to upstream FTensor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230859.4EB3E33EB3@hamza.pair.com/mbox/"},{"id":68267,"url":"https://patchwork.plctlab.org/api/1.2/patches/68267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312101613.C0F0233E6B@hamza.pair.com/","msgid":"<20230312101613.C0F0233E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-12T10:16:11","name":"[pushed] libstdc++: Move www.graphviz.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312101613.C0F0233E6B@hamza.pair.com/mbox/"},{"id":68361,"url":"https://patchwork.plctlab.org/api/1.2/patches/68361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com/","msgid":"<000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-03-12T15:04:20","name":"PR middle-end/109031: Fix final value replacement from narrower IVs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com/mbox/"},{"id":68417,"url":"https://patchwork.plctlab.org/api/1.2/patches/68417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312175401.2736265-1-sam@gentoo.org/","msgid":"<20230312175401.2736265-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-12T17:54:01","name":"[v3] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312175401.2736265-1-sam@gentoo.org/mbox/"},{"id":68607,"url":"https://patchwork.plctlab.org/api/1.2/patches/68607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp/","msgid":"<85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp>","list_archive_url":null,"date":"2023-03-13T00:37:10","name":"xtensa: Remove REG_OK_STRICT and its derivatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp/mbox/"},{"id":68626,"url":"https://patchwork.plctlab.org/api/1.2/patches/68626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313035249.3997637-1-chenglulu@loongson.cn/","msgid":"<20230313035249.3997637-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-03-13T03:52:50","name":"LoongArch: Control all __crc* __crcc* builtin functions with macro __loongarch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313035249.3997637-1-chenglulu@loongson.cn/mbox/"},{"id":68640,"url":"https://patchwork.plctlab.org/api/1.2/patches/68640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313065742.1335925-1-arsen@aarsen.me/","msgid":"<20230313065742.1335925-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-13T06:57:43","name":"[gcc-{11,12}] c++: top level bind when rewriting coroutines [PR106188]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313065742.1335925-1-arsen@aarsen.me/mbox/"},{"id":68654,"url":"https://patchwork.plctlab.org/api/1.2/patches/68654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313075201.241158-1-juzhe.zhong@rivai.ai/","msgid":"<20230313075201.241158-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T07:52:01","name":"RISC-V: Fix bugs of internal tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313075201.241158-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68679,"url":"https://patchwork.plctlab.org/api/1.2/patches/68679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313081927.247155-1-juzhe.zhong@rivai.ai/","msgid":"<20230313081927.247155-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T08:19:27","name":"RISC-V: Fix reg order of RVV registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313081927.247155-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68684,"url":"https://patchwork.plctlab.org/api/1.2/patches/68684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313082855.248118-1-juzhe.zhong@rivai.ai/","msgid":"<20230313082855.248118-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T08:28:55","name":"RISC-V: Fine tune gather load RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313082855.248118-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68697,"url":"https://patchwork.plctlab.org/api/1.2/patches/68697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313090540.335536-1-juzhe.zhong@rivai.ai/","msgid":"<20230313090540.335536-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T09:05:40","name":"RISC-V: Refine reduction RA constraint according to RVV ISA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313090540.335536-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68702,"url":"https://patchwork.plctlab.org/api/1.2/patches/68702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZA7ommeXWVjWe3vH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-13T09:10:50","name":"libstdc++: Another baseline_symbols.txt update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZA7ommeXWVjWe3vH@tucnak/mbox/"},{"id":68731,"url":"https://patchwork.plctlab.org/api/1.2/patches/68731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313103508.2543385-1-jwakely@redhat.com/","msgid":"<20230313103508.2543385-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-13T10:35:08","name":"[committed] libstdc++: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313103508.2543385-1-jwakely@redhat.com/mbox/"},{"id":68733,"url":"https://patchwork.plctlab.org/api/1.2/patches/68733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313104607.2545130-1-jwakely@redhat.com/","msgid":"<20230313104607.2545130-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-13T10:46:07","name":"[committed] libstdc++: Refer to documentation hacking docs from Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313104607.2545130-1-jwakely@redhat.com/mbox/"},{"id":68806,"url":"https://patchwork.plctlab.org/api/1.2/patches/68806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com/","msgid":"<41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com>","list_archive_url":null,"date":"2023-03-13T12:25:04","name":"gcn/mkoffload.cc: Pass -save-temps on for the hsaco step","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com/mbox/"},{"id":68861,"url":"https://patchwork.plctlab.org/api/1.2/patches/68861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313141757.277008-1-juzhe.zhong@rivai.ai/","msgid":"<20230313141757.277008-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T14:17:57","name":"RISC-V: Fix Bug 109092","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313141757.277008-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68901,"url":"https://patchwork.plctlab.org/api/1.2/patches/68901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/716e6395-4108-0864-4272-f96b232989d2@arm.com/","msgid":"<716e6395-4108-0864-4272-f96b232989d2@arm.com>","list_archive_url":null,"date":"2023-03-13T15:53:30","name":"ifcvt: Lower bitfields only if suitable for scalar register [PR tree/109005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/716e6395-4108-0864-4272-f96b232989d2@arm.com/mbox/"},{"id":69036,"url":"https://patchwork.plctlab.org/api/1.2/patches/69036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae7e081e-d301-16a3-8e4e-e69655286cdd@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-03-13T18:48:08","name":"[pushed] wwwdocs: style: Add a link to our testing page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae7e081e-d301-16a3-8e4e-e69655286cdd@pfeifer.com/mbox/"},{"id":69048,"url":"https://patchwork.plctlab.org/api/1.2/patches/69048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190027.3358516-1-dmalcolm@redhat.com/","msgid":"<20230313190027.3358516-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:27","name":"[pushed] analyzer, testsuite: add test coverage for various builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190027.3358516-1-dmalcolm@redhat.com/mbox/"},{"id":69049,"url":"https://patchwork.plctlab.org/api/1.2/patches/69049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190031.3358543-1-dmalcolm@redhat.com/","msgid":"<20230313190031.3358543-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:31","name":"[pushed] testsuite: add test coverage for PR analyzer/108045","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190031.3358543-1-dmalcolm@redhat.com/mbox/"},{"id":69050,"url":"https://patchwork.plctlab.org/api/1.2/patches/69050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190035.3358567-1-dmalcolm@redhat.com/","msgid":"<20230313190035.3358567-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:35","name":"[pushed] testsuite: add test coverage for analyzer leak false +ve [PR105906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190035.3358567-1-dmalcolm@redhat.com/mbox/"},{"id":69091,"url":"https://patchwork.plctlab.org/api/1.2/patches/69091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201512.151814-1-jason@redhat.com/","msgid":"<20230313201512.151814-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-13T20:15:12","name":"[RFA] tree: define tree_code_type in C++11/14 [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201512.151814-1-jason@redhat.com/mbox/"},{"id":69092,"url":"https://patchwork.plctlab.org/api/1.2/patches/69092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201636.152901-1-jason@redhat.com/","msgid":"<20230313201636.152901-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-13T20:16:36","name":"[pushed] c++: handle _FloatNN redeclaration like bool [PR107128]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201636.152901-1-jason@redhat.com/mbox/"},{"id":69119,"url":"https://patchwork.plctlab.org/api/1.2/patches/69119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313204510.1908188-1-jcmvbkbc@gmail.com/","msgid":"<20230313204510.1908188-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-03-13T20:45:10","name":"[COMMITTED] xtensa: add .note.GNU-stack section on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313204510.1908188-1-jcmvbkbc@gmail.com/mbox/"},{"id":69150,"url":"https://patchwork.plctlab.org/api/1.2/patches/69150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212719.1269-1-ibuclaw@gdcproject.org/","msgid":"<20230313212719.1269-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-13T21:27:19","name":"[committed] d: Refactor DECL_ARGUMENT and DECL_RESULT generation to own function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212719.1269-1-ibuclaw@gdcproject.org/mbox/"},{"id":69152,"url":"https://patchwork.plctlab.org/api/1.2/patches/69152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212749.1772-1-ibuclaw@gdcproject.org/","msgid":"<20230313212749.1772-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-13T21:27:49","name":"[committed] d: Delay removing DECL_EXTERNAL from thunks until funcion has finished","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212749.1772-1-ibuclaw@gdcproject.org/mbox/"},{"id":69202,"url":"https://patchwork.plctlab.org/api/1.2/patches/69202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-1-sam@gentoo.org/","msgid":"<20230314002354.367655-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-14T00:23:53","name":"[v4,1/2] RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-1-sam@gentoo.org/mbox/"},{"id":69203,"url":"https://patchwork.plctlab.org/api/1.2/patches/69203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-2-sam@gentoo.org/","msgid":"<20230314002354.367655-2-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-14T00:23:54","name":"[v4,2/2] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-2-sam@gentoo.org/mbox/"},{"id":69212,"url":"https://patchwork.plctlab.org/api/1.2/patches/69212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314003806.328920-1-juzhe.zhong@rivai.ai/","msgid":"<20230314003806.328920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-14T00:38:06","name":"RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314003806.328920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":69222,"url":"https://patchwork.plctlab.org/api/1.2/patches/69222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314012536.2789120417@pchp3.se.axis.com/","msgid":"<20230314012536.2789120417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-14T01:25:36","name":"doc: md.texi (Insn Splitting): Tweak wording for readability.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314012536.2789120417@pchp3.se.axis.com/mbox/"},{"id":69256,"url":"https://patchwork.plctlab.org/api/1.2/patches/69256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314022331.105558-1-juzhe.zhong@rivai.ai/","msgid":"<20230314022331.105558-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-14T02:23:31","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314022331.105558-1-juzhe.zhong@rivai.ai/mbox/"},{"id":69322,"url":"https://patchwork.plctlab.org/api/1.2/patches/69322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314062514.1711201-1-lin1.hu@intel.com/","msgid":"<20230314062514.1711201-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-03-14T06:25:14","name":"i386:Add missing OPTION_MASK_ISA_AVX512VL in i386-builtin.def for VAES builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314062514.1711201-1-lin1.hu@intel.com/mbox/"},{"id":69338,"url":"https://patchwork.plctlab.org/api/1.2/patches/69338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314073003.C48B53858C2F@sourceware.org/","msgid":"<20230314073003.C48B53858C2F@sourceware.org>","list_archive_url":null,"date":"2023-03-14T07:29:19","name":"New testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314073003.C48B53858C2F@sourceware.org/mbox/"},{"id":69347,"url":"https://patchwork.plctlab.org/api/1.2/patches/69347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAoNGDJPNd069B5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T07:54:28","name":"testsuite: Fix up g++.dg/cpp2a/concepts-lambda3.C [PR108972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAoNGDJPNd069B5@tucnak/mbox/"},{"id":69350,"url":"https://patchwork.plctlab.org/api/1.2/patches/69350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApCMbOq6n+IGxA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T07:58:00","name":"c++: Treat unnamed bitfields as padding for __has_unique_object_representations [PR109096]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApCMbOq6n+IGxA@tucnak/mbox/"},{"id":69351,"url":"https://patchwork.plctlab.org/api/1.2/patches/69351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApxBo9DUPYM8fe@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T08:01:08","name":"tree-vect-patterns: Fix up ICE in upper_bound [PR109115]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApxBo9DUPYM8fe@tucnak/mbox/"},{"id":69364,"url":"https://patchwork.plctlab.org/api/1.2/patches/69364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAsLIG/MsOVEid4@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-03-14T08:11:24","name":"Fix ICE in profile_count::to_sreal_frequency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAsLIG/MsOVEid4@kam.mff.cuni.cz/mbox/"},{"id":69422,"url":"https://patchwork.plctlab.org/api/1.2/patches/69422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314101342.1F4003858414@sourceware.org/","msgid":"<20230314101342.1F4003858414@sourceware.org>","list_archive_url":null,"date":"2023-03-14T10:12:58","name":"Remove variables only used with .DEFERRED_INIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314101342.1F4003858414@sourceware.org/mbox/"},{"id":69428,"url":"https://patchwork.plctlab.org/api/1.2/patches/69428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17109-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-14T10:18:38","name":"[committed,testsuite] : move mla_1 test to aarch64 only [PR109118]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17109-tamar@arm.com/mbox/"},{"id":69443,"url":"https://patchwork.plctlab.org/api/1.2/patches/69443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103027.2697727-1-jwakely@redhat.com/","msgid":"<20230314103027.2697727-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:27","name":"[committed] libstdc++: Add assertions to std::mask_array operations [PR62196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103027.2697727-1-jwakely@redhat.com/mbox/"},{"id":69446,"url":"https://patchwork.plctlab.org/api/1.2/patches/69446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103033.2697851-1-jwakely@redhat.com/","msgid":"<20230314103033.2697851-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:33","name":"[committed] libstdc++: Add comment about symver linker scripts to makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103033.2697851-1-jwakely@redhat.com/mbox/"},{"id":69445,"url":"https://patchwork.plctlab.org/api/1.2/patches/69445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103040.2697873-1-jwakely@redhat.com/","msgid":"<20230314103040.2697873-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:40","name":"[committed] libstdc++: Fix preprocessor condition for inline variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103040.2697873-1-jwakely@redhat.com/mbox/"},{"id":69706,"url":"https://patchwork.plctlab.org/api/1.2/patches/69706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCV7EF97QkCHs+U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T15:42:36","name":"gdbhooks: Update gdbhooks.py for recent tree_code_type changes [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCV7EF97QkCHs+U@tucnak/mbox/"},{"id":69709,"url":"https://patchwork.plctlab.org/api/1.2/patches/69709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314160443.AC7E420417@pchp3.se.axis.com/","msgid":"<20230314160443.AC7E420417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-14T16:04:43","name":"[v2] doc: md.texi (Insn Splitting): Tweak wording for readability.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314160443.AC7E420417@pchp3.se.axis.com/mbox/"},{"id":69711,"url":"https://patchwork.plctlab.org/api/1.2/patches/69711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCcL2Uy41B+9NKU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T16:09:19","name":"i386: Fix up split_double_concat [PR109109]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCcL2Uy41B+9NKU@tucnak/mbox/"},{"id":69729,"url":"https://patchwork.plctlab.org/api/1.2/patches/69729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-1-ppalka@redhat.com/","msgid":"<20230314164146.1470993-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T16:41:45","name":"[1/2] c++: constrained template friend class matching [PR96830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-1-ppalka@redhat.com/mbox/"},{"id":69730,"url":"https://patchwork.plctlab.org/api/1.2/patches/69730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-2-ppalka@redhat.com/","msgid":"<20230314164146.1470993-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T16:41:46","name":"[2/2] c++: redeclaring member of constrained class template [PR96830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-2-ppalka@redhat.com/mbox/"},{"id":69745,"url":"https://patchwork.plctlab.org/api/1.2/patches/69745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bCobKsiWtNxzdZVcd_PwgtnTS_mONisdYdg4JN0442oA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-14T17:43:16","name":"i386: Use movss to implement V2SImode VEC_PERM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bCobKsiWtNxzdZVcd_PwgtnTS_mONisdYdg4JN0442oA@mail.gmail.com/mbox/"},{"id":69787,"url":"https://patchwork.plctlab.org/api/1.2/patches/69787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314184620.373190-1-jason@redhat.com/","msgid":"<20230314184620.373190-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-14T18:46:20","name":"[pushed] c++: -Wreturn-type with if (true) throw [PR107310]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314184620.373190-1-jason@redhat.com/mbox/"},{"id":69823,"url":"https://patchwork.plctlab.org/api/1.2/patches/69823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a97ee57-2800-4785-b4b4-418bbb32675c-1678822727185@3c-app-gmx-bap12/","msgid":"","list_archive_url":null,"date":"2023-03-14T19:38:47","name":"Fortran: rank checking with explicit-/assumed-size arrays and CLASS [PR58331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a97ee57-2800-4785-b4b4-418bbb32675c-1678822727185@3c-app-gmx-bap12/mbox/"},{"id":69826,"url":"https://patchwork.plctlab.org/api/1.2/patches/69826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314195659.1682947-1-ibuclaw@gdcproject.org/","msgid":"<20230314195659.1682947-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-14T19:56:59","name":"[committed] d: Fix undefined reference to lambda defined in private enum [PR109108]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314195659.1682947-1-ibuclaw@gdcproject.org/mbox/"},{"id":69840,"url":"https://patchwork.plctlab.org/api/1.2/patches/69840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314215256.4153026-1-collison@rivosinc.com/","msgid":"<20230314215256.4153026-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-14T21:52:56","name":"vect: Verify that GET_MODE_NUNITS is greater than one.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314215256.4153026-1-collison@rivosinc.com/mbox/"},{"id":69852,"url":"https://patchwork.plctlab.org/api/1.2/patches/69852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314221019.463098-1-jason@redhat.com/","msgid":"<20230314221019.463098-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-14T22:10:19","name":"[pushed] c++: variable tmpl partial specialization [PR108468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314221019.463098-1-jason@redhat.com/mbox/"},{"id":69875,"url":"https://patchwork.plctlab.org/api/1.2/patches/69875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314225026.163717-1-polacek@redhat.com/","msgid":"<20230314225026.163717-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-14T22:50:26","name":"sanitizer: missing signed integer overflow errors [PR109107]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314225026.163717-1-polacek@redhat.com/mbox/"},{"id":69891,"url":"https://patchwork.plctlab.org/api/1.2/patches/69891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314232005.1575584-1-ppalka@redhat.com/","msgid":"<20230314232005.1575584-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T23:20:05","name":"[pushed] libstdc++: Fix template-head of repeat_view::_Iterator [PR109111]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314232005.1575584-1-ppalka@redhat.com/mbox/"},{"id":69961,"url":"https://patchwork.plctlab.org/api/1.2/patches/69961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315052338.88042-1-juzhe.zhong@rivai.ai/","msgid":"<20230315052338.88042-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-15T05:23:38","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315052338.88042-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70019,"url":"https://patchwork.plctlab.org/api/1.2/patches/70019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315063746.166390-1-juzhe.zhong@rivai.ai/","msgid":"<20230315063746.166390-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-15T06:37:46","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315063746.166390-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70062,"url":"https://patchwork.plctlab.org/api/1.2/patches/70062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315075103.1039307-1-ysato@users.sourceforge.jp/","msgid":"<20230315075103.1039307-1-ysato@users.sourceforge.jp>","list_archive_url":null,"date":"2023-03-15T07:51:03","name":"[v2] PR target/89828 Inernal compiler error on -fno-omit-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315075103.1039307-1-ysato@users.sourceforge.jp/mbox/"},{"id":70089,"url":"https://patchwork.plctlab.org/api/1.2/patches/70089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093001.3BD723857803@sourceware.org/","msgid":"<20230315093001.3BD723857803@sourceware.org>","list_archive_url":null,"date":"2023-03-15T09:29:15","name":"tree-optimization/109139 - fix .DEFERRED_INIT removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093001.3BD723857803@sourceware.org/mbox/"},{"id":70090,"url":"https://patchwork.plctlab.org/api/1.2/patches/70090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093321.555944-1-xry111@xry111.site/","msgid":"<20230315093321.555944-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-15T09:33:21","name":"Pushed: [PATCH] builtins: Move the character difference into result instead of reassigning result [PR109086]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093321.555944-1-xry111@xry111.site/mbox/"},{"id":70100,"url":"https://patchwork.plctlab.org/api/1.2/patches/70100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com/","msgid":"<977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com>","list_archive_url":null,"date":"2023-03-15T10:07:24","name":"[v4] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com/mbox/"},{"id":70114,"url":"https://patchwork.plctlab.org/api/1.2/patches/70114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315104919.38328385840E@sourceware.org/","msgid":"<20230315104919.38328385840E@sourceware.org>","list_archive_url":null,"date":"2023-03-15T10:48:32","name":"[1/2] Avoid random stmt order result in pass_waccess::use_after_inval_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315104919.38328385840E@sourceware.org/mbox/"},{"id":70116,"url":"https://patchwork.plctlab.org/api/1.2/patches/70116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315105003.D4D1F3857437@sourceware.org/","msgid":"<20230315105003.D4D1F3857437@sourceware.org>","list_archive_url":null,"date":"2023-03-15T10:49:19","name":"[2/2] tree-optimization/109123 - run -Wuse-afer-free only early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315105003.D4D1F3857437@sourceware.org/mbox/"},{"id":70187,"url":"https://patchwork.plctlab.org/api/1.2/patches/70187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315122448.3394353-1-christoph.muellner@vrull.eu/","msgid":"<20230315122448.3394353-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-15T12:24:48","name":"riscv: thead: Add sign/zero extension support for th.ext and th.extu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315122448.3394353-1-christoph.muellner@vrull.eu/mbox/"},{"id":70188,"url":"https://patchwork.plctlab.org/api/1.2/patches/70188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124346.686647-1-jason@redhat.com/","msgid":"<20230315124346.686647-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:43:46","name":"[pushed] c++: injected class name as default ttp arg [PR58538]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124346.686647-1-jason@redhat.com/mbox/"},{"id":70189,"url":"https://patchwork.plctlab.org/api/1.2/patches/70189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-1-jason@redhat.com/","msgid":"<20230315124427.687003-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:44:26","name":"[pushed,1/2] c++: coerce_template_template_parms interface tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-1-jason@redhat.com/mbox/"},{"id":70190,"url":"https://patchwork.plctlab.org/api/1.2/patches/70190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-2-jason@redhat.com/","msgid":"<20230315124427.687003-2-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:44:27","name":"[2/2] c++: passing one ttp to another [PR108179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-2-jason@redhat.com/mbox/"},{"id":70233,"url":"https://patchwork.plctlab.org/api/1.2/patches/70233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315135358.3DE153858017@sourceware.org/","msgid":"<20230315135358.3DE153858017@sourceware.org>","list_archive_url":null,"date":"2023-03-15T13:53:14","name":"Avoid duplicate diagnostic in g++.dg/warn/Wuse-after-free3.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315135358.3DE153858017@sourceware.org/mbox/"},{"id":70249,"url":"https://patchwork.plctlab.org/api/1.2/patches/70249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com/","msgid":"<6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com>","list_archive_url":null,"date":"2023-03-15T14:24:04","name":"OpenMP: Add omp_in_explicit_task to omp_runtime_api_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com/mbox/"},{"id":70260,"url":"https://patchwork.plctlab.org/api/1.2/patches/70260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBHYLmBGhgu3QDRa@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T14:37:34","name":"[v2] c++: ICE with constexpr lambda [PR107280]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBHYLmBGhgu3QDRa@redhat.com/mbox/"},{"id":70297,"url":"https://patchwork.plctlab.org/api/1.2/patches/70297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com/","msgid":"<952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com>","list_archive_url":null,"date":"2023-03-15T16:14:01","name":"Now gcc-13: [Fwd: [PATCH] gcc-12: Re-enable split-stack support for GNU/Hurd.]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com/mbox/"},{"id":70398,"url":"https://patchwork.plctlab.org/api/1.2/patches/70398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zKDb8AV9dubh6Jqokg_qynXWfVsENxhDd45Nm8bi7oyZQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:29:58","name":"[v2,1/2] libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zKDb8AV9dubh6Jqokg_qynXWfVsENxhDd45Nm8bi7oyZQ@mail.gmail.com/mbox/"},{"id":70399,"url":"https://patchwork.plctlab.org/api/1.2/patches/70399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJQhKdZizesKV8qOR4omMDAJPWQ=exuOFar0iQUuAWWKg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:32:01","name":"[v2,2/2] libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJQhKdZizesKV8qOR4omMDAJPWQ=exuOFar0iQUuAWWKg@mail.gmail.com/mbox/"},{"id":70403,"url":"https://patchwork.plctlab.org/api/1.2/patches/70403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y97FGBKyLbSijcsmP_-AWU5sHtvdfk8nv8ZPfhQhx-zg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:37:40","name":"i386: Fix blend vector permutation for 8-byte modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y97FGBKyLbSijcsmP_-AWU5sHtvdfk8nv8ZPfhQhx-zg@mail.gmail.com/mbox/"},{"id":70408,"url":"https://patchwork.plctlab.org/api/1.2/patches/70408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315194324.1930746-1-iamberkeyavas@gmail.com/","msgid":"<20230315194324.1930746-1-iamberkeyavas@gmail.com>","list_archive_url":null,"date":"2023-03-15T19:43:24","name":"compiler built in is_scalar, use built-in is_scalar in libstdc++ std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315194324.1930746-1-iamberkeyavas@gmail.com/mbox/"},{"id":70446,"url":"https://patchwork.plctlab.org/api/1.2/patches/70446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315211011.2023906-1-iamberkeyavas@gmail.com/","msgid":"<20230315211011.2023906-1-iamberkeyavas@gmail.com>","list_archive_url":null,"date":"2023-03-15T21:10:12","name":"c++, libstdc++: new compiler built in is_scalar, use built-in is_scalar in libstdc++ std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315211011.2023906-1-iamberkeyavas@gmail.com/mbox/"},{"id":70482,"url":"https://patchwork.plctlab.org/api/1.2/patches/70482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222022.3505853-1-dmalcolm@redhat.com/","msgid":"<20230315222022.3505853-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-15T22:20:22","name":"[pushed] diagnostics: attempt to capture crash info in SARIF output [PR109097]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222022.3505853-1-dmalcolm@redhat.com/mbox/"},{"id":70483,"url":"https://patchwork.plctlab.org/api/1.2/patches/70483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222923.846553-1-jason@redhat.com/","msgid":"<20230315222923.846553-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T22:29:23","name":"[pushed] c++: co_await and initializer_list [PR103871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222923.846553-1-jason@redhat.com/mbox/"},{"id":70521,"url":"https://patchwork.plctlab.org/api/1.2/patches/70521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316003211.F054433E4F@hamza.pair.com/","msgid":"<20230316003211.F054433E4F@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T00:32:09","name":"[pushed] maintainer-scripts: Abstract BUGURL in update_web_docs_git","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316003211.F054433E4F@hamza.pair.com/mbox/"},{"id":70534,"url":"https://patchwork.plctlab.org/api/1.2/patches/70534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora60dbig2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-16T01:20:29","name":"[testsuite] test for weak_undefined support and add options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora60dbig2.fsf@lxoliva.fsfla.org/mbox/"},{"id":70535,"url":"https://patchwork.plctlab.org/api/1.2/patches/70535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yb1bi6a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-16T01:26:21","name":"[testsuite] fix array element count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yb1bi6a.fsf@lxoliva.fsfla.org/mbox/"},{"id":70547,"url":"https://patchwork.plctlab.org/api/1.2/patches/70547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316030157.882778-1-jason@redhat.com/","msgid":"<20230316030157.882778-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T03:01:57","name":"[RFC] c++: co_await and move-only type [PR105406]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316030157.882778-1-jason@redhat.com/mbox/"},{"id":70570,"url":"https://patchwork.plctlab.org/api/1.2/patches/70570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com/","msgid":"<86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-16T05:20:21","name":"rs6000: suboptimal code for returning bool value on target ppc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com/mbox/"},{"id":70573,"url":"https://patchwork.plctlab.org/api/1.2/patches/70573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com/","msgid":"<22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-16T05:34:32","name":"[PATCH-1,rs6000] Put constant into pseudo at expand when it needs two insns [PR86106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com/mbox/"},{"id":70575,"url":"https://patchwork.plctlab.org/api/1.2/patches/70575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1dec3a1-1e7b-28ba-ec9b-ca56e6c15c72@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-16T05:34:40","name":"[PATCH-2,rs6000] Put constant into pseudo at expand when it needs two insns [PR86106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1dec3a1-1e7b-28ba-ec9b-ca56e6c15c72@linux.ibm.com/mbox/"},{"id":70671,"url":"https://patchwork.plctlab.org/api/1.2/patches/70671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316085542.171023-1-juzhe.zhong@rivai.ai/","msgid":"<20230316085542.171023-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T08:55:42","name":"RISC-V: Fix bugs reported by @kito","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316085542.171023-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70683,"url":"https://patchwork.plctlab.org/api/1.2/patches/70683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLfsr13dpPoE/ki@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-16T09:21:54","name":"[committed] libcpp: Update Unicode copyright years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLfsr13dpPoE/ki@tucnak/mbox/"},{"id":70684,"url":"https://patchwork.plctlab.org/api/1.2/patches/70684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLgYT5EtdeyWrAM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-16T09:24:49","name":"contrib: Update instructions regarding Unicode updates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLgYT5EtdeyWrAM@tucnak/mbox/"},{"id":70686,"url":"https://patchwork.plctlab.org/api/1.2/patches/70686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093807.176072-1-juzhe.zhong@rivai.ai/","msgid":"<20230316093807.176072-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T09:38:07","name":"ISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093807.176072-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70688,"url":"https://patchwork.plctlab.org/api/1.2/patches/70688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093914.176248-1-juzhe.zhong@rivai.ai/","msgid":"<20230316093914.176248-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T09:39:14","name":"RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093914.176248-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70746,"url":"https://patchwork.plctlab.org/api/1.2/patches/70746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113927.4967-1-tejas.belagod@arm.com/","msgid":"<20230316113927.4967-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-03-16T11:39:27","name":"[PR96339] AArch64: Optimise svlast[ab]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113927.4967-1-tejas.belagod@arm.com/mbox/"},{"id":70745,"url":"https://patchwork.plctlab.org/api/1.2/patches/70745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113935.325393-1-ibuclaw@gdcproject.org/","msgid":"<20230316113935.325393-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-16T11:39:35","name":"[committed] d: Fix closure fields don'\''t get same alignment as local variable [PR109144]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113935.325393-1-ibuclaw@gdcproject.org/mbox/"},{"id":70834,"url":"https://patchwork.plctlab.org/api/1.2/patches/70834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316152706.2214124-1-manolis.tsamis@vrull.eu/","msgid":"<20230316152706.2214124-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-03-16T15:27:06","name":"[v1,RFC] Improve folding for comparisons with zero in tree-ssa-forwprop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316152706.2214124-1-manolis.tsamis@vrull.eu/mbox/"},{"id":70902,"url":"https://patchwork.plctlab.org/api/1.2/patches/70902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316164816.2493686-1-ppalka@redhat.com/","msgid":"<20230316164816.2493686-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-16T16:48:16","name":"c++: ICE with diagnosed constraint recursion [PR100288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316164816.2493686-1-ppalka@redhat.com/mbox/"},{"id":70953,"url":"https://patchwork.plctlab.org/api/1.2/patches/70953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahd+tv3FHJaDWmMvVrqhaSCQnctiQUZdt0vdat+owMtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-16T19:44:23","name":"i386: Robustify vec perm blend functions for TARGET_MMX_WITH_SSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahd+tv3FHJaDWmMvVrqhaSCQnctiQUZdt0vdat+owMtw@mail.gmail.com/mbox/"},{"id":70979,"url":"https://patchwork.plctlab.org/api/1.2/patches/70979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-2-qing.zhao@oracle.com/","msgid":"<20230316214715.604671-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-16T21:47:14","name":"[V5,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-2-qing.zhao@oracle.com/mbox/"},{"id":70980,"url":"https://patchwork.plctlab.org/api/1.2/patches/70980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-3-qing.zhao@oracle.com/","msgid":"<20230316214715.604671-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-16T21:47:15","name":"[V5,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-3-qing.zhao@oracle.com/mbox/"},{"id":70983,"url":"https://patchwork.plctlab.org/api/1.2/patches/70983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316220948.1138021-1-jason@redhat.com/","msgid":"<20230316220948.1138021-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:09:48","name":"[pushed] c++: &enum::enumerator [PR101869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316220948.1138021-1-jason@redhat.com/mbox/"},{"id":70984,"url":"https://patchwork.plctlab.org/api/1.2/patches/70984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221108.1138412-1-jason@redhat.com/","msgid":"<20230316221108.1138412-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:11:08","name":"[pushed] c++: generic lambda, local class, __func__ [PR108242]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221108.1138412-1-jason@redhat.com/mbox/"},{"id":70985,"url":"https://patchwork.plctlab.org/api/1.2/patches/70985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221223.1138825-1-jason@redhat.com/","msgid":"<20230316221223.1138825-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:12:23","name":"[pushed] c++: __func__ and local class DMI [PR105809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221223.1138825-1-jason@redhat.com/mbox/"},{"id":71001,"url":"https://patchwork.plctlab.org/api/1.2/patches/71001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org/","msgid":"<640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org>","list_archive_url":null,"date":"2023-03-16T22:37:41","name":"correct function attribute typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org/mbox/"},{"id":71012,"url":"https://patchwork.plctlab.org/api/1.2/patches/71012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316232658.CA7C133E73@hamza.pair.com/","msgid":"<20230316232658.CA7C133E73@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T23:26:56","name":"[pushed] wwwdocs: onlinedocs: Use the proper name of the Modula-2 manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316232658.CA7C133E73@hamza.pair.com/mbox/"},{"id":71015,"url":"https://patchwork.plctlab.org/api/1.2/patches/71015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316234840.A3B8D33E53@hamza.pair.com/","msgid":"<20230316234840.A3B8D33E53@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T23:48:39","name":"[pushed] wwwdocs: readings: Switch publibfp.dhe.ibm.com to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316234840.A3B8D33E53@hamza.pair.com/mbox/"},{"id":71065,"url":"https://patchwork.plctlab.org/api/1.2/patches/71065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317032722.1548833-1-guojiufu@linux.ibm.com/","msgid":"<20230317032722.1548833-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-03-17T03:27:22","name":"[V3] extract DF/SF/SI/HI/QI subreg from parameter word on stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317032722.1548833-1-guojiufu@linux.ibm.com/mbox/"},{"id":71068,"url":"https://patchwork.plctlab.org/api/1.2/patches/71068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317033952.1549050-1-guojiufu@linux.ibm.com/","msgid":"<20230317033952.1549050-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-03-17T03:39:52","name":"[V5] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317033952.1549050-1-guojiufu@linux.ibm.com/mbox/"},{"id":71069,"url":"https://patchwork.plctlab.org/api/1.2/patches/71069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com/","msgid":"<527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com>","list_archive_url":null,"date":"2023-03-17T04:01:57","name":"[committed] Docs: Fix some too-long lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com/mbox/"},{"id":71070,"url":"https://patchwork.plctlab.org/api/1.2/patches/71070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee967b88-0343-aee6-c8b2-fa5478044aa8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T04:02:04","name":"[committed] Docs: Fix formatting issues in BPF built-ins documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee967b88-0343-aee6-c8b2-fa5478044aa8@codesourcery.com/mbox/"},{"id":71073,"url":"https://patchwork.plctlab.org/api/1.2/patches/71073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317045256.34563-1-ibuclaw@gdcproject.org/","msgid":"<20230317045256.34563-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-17T04:52:56","name":"[committed] d: Merge upstream dmd, druntime 5f7552bb28, phobos 67a47cf39.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317045256.34563-1-ibuclaw@gdcproject.org/mbox/"},{"id":71124,"url":"https://patchwork.plctlab.org/api/1.2/patches/71124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQe+haaKNvzZMw5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:04:10","name":"[committed] openmp: Fix up handling of doacross loops with noreturn body in loops [PR108685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQe+haaKNvzZMw5@tucnak/mbox/"},{"id":71129,"url":"https://patchwork.plctlab.org/api/1.2/patches/71129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQhTHb0CzN5mx/N@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:14:04","name":"c, ubsan: Instrument even shortened divisions [PR109151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQhTHb0CzN5mx/N@tucnak/mbox/"},{"id":71131,"url":"https://patchwork.plctlab.org/api/1.2/patches/71131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQiMc3ZWcPFAAkV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:17:53","name":"testsuite: Fix up forwprop-39.c testcase [PR109145]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQiMc3ZWcPFAAkV@tucnak/mbox/"},{"id":71150,"url":"https://patchwork.plctlab.org/api/1.2/patches/71150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQkoxouS5jRLwv5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:28:19","name":"cgraphclones: Fix up target_clones cloning of functions with vector arguments [PR105554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQkoxouS5jRLwv5@tucnak/mbox/"},{"id":71267,"url":"https://patchwork.plctlab.org/api/1.2/patches/71267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317121833.16A961346F@imap2.suse-dmz.suse.de/","msgid":"<20230317121833.16A961346F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-17T12:18:32","name":"tree-optimization/109170 - bogus use-after-free with __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317121833.16A961346F@imap2.suse-dmz.suse.de/mbox/"},{"id":71282,"url":"https://patchwork.plctlab.org/api/1.2/patches/71282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8324fe0-a8fc-9576-4985-a5b82af3fac0@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T13:10:11","name":"[pushed,PR109052] LRA: Implement combining secondary memory reload and original insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8324fe0-a8fc-9576-4985-a5b82af3fac0@redhat.com/mbox/"},{"id":71331,"url":"https://patchwork.plctlab.org/api/1.2/patches/71331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317152629.3944138-1-ppalka@redhat.com/","msgid":"<20230317152629.3944138-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-17T15:26:29","name":"c++: NTTP constraint depending on outer args [PR109160]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317152629.3944138-1-ppalka@redhat.com/mbox/"},{"id":71378,"url":"https://patchwork.plctlab.org/api/1.2/patches/71378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSnqPiQgZmSLO29@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T17:47:20","name":"tree-inline: Fix up multiversioning with vector arguments [PR105554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSnqPiQgZmSLO29@tucnak/mbox/"},{"id":71379,"url":"https://patchwork.plctlab.org/api/1.2/patches/71379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSoqOLhNMhm4YTo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T17:51:36","name":"c++: Drop TREE_READONLY on vars (possibly) initialized by tls wrapper [PR109164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSoqOLhNMhm4YTo@tucnak/mbox/"},{"id":71390,"url":"https://patchwork.plctlab.org/api/1.2/patches/71390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317184414.1335691-1-jason@redhat.com/","msgid":"<20230317184414.1335691-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T18:44:14","name":"[pushed] c++: namespace-scoped friend in local class [PR69410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317184414.1335691-1-jason@redhat.com/mbox/"},{"id":71426,"url":"https://patchwork.plctlab.org/api/1.2/patches/71426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317202908.42800-1-polacek@redhat.com/","msgid":"<20230317202908.42800-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:29:08","name":"c++: further -Wdangling-reference refinement [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317202908.42800-1-polacek@redhat.com/mbox/"},{"id":71428,"url":"https://patchwork.plctlab.org/api/1.2/patches/71428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317203601.55027-1-jwakely@redhat.com/","msgid":"<20230317203601.55027-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:36:01","name":"[committed] libstdc++: Add const to hash>::operator() [PR109165]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317203601.55027-1-jwakely@redhat.com/mbox/"},{"id":71430,"url":"https://patchwork.plctlab.org/api/1.2/patches/71430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317205349.3635562-1-dmalcolm@redhat.com/","msgid":"<20230317205349.3635562-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:53:49","name":"json: preserve key-insertion order [PR109163]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317205349.3635562-1-dmalcolm@redhat.com/mbox/"},{"id":71440,"url":"https://patchwork.plctlab.org/api/1.2/patches/71440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317213205.1383604-1-jason@redhat.com/","msgid":"<20230317213205.1383604-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T21:32:05","name":"[pushed] c++: throw and private destructor [PR109172]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317213205.1383604-1-jason@redhat.com/mbox/"},{"id":71458,"url":"https://patchwork.plctlab.org/api/1.2/patches/71458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7cc4f143-7033-4551-af8d-b4fbe021637d-1679089003636@3c-app-gmx-bs05/","msgid":"","list_archive_url":null,"date":"2023-03-17T21:36:43","name":"Fortran: procedures with BIND(C) attribute require explicit interface [PR85877]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7cc4f143-7033-4551-af8d-b4fbe021637d-1679089003636@3c-app-gmx-bs05/mbox/"},{"id":71499,"url":"https://patchwork.plctlab.org/api/1.2/patches/71499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d09518ad-277a-b1b7-dda4-1b9782ac022c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T22:35:12","name":"rs6000: Don'\''t ICE when compiling the __builtin_vec_xst_trunc built-in [PR109178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d09518ad-277a-b1b7-dda4-1b9782ac022c@linux.ibm.com/mbox/"},{"id":71520,"url":"https://patchwork.plctlab.org/api/1.2/patches/71520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317233249.1406928-1-jason@redhat.com/","msgid":"<20230317233249.1406928-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T23:32:49","name":"[pushed] c++: constant, array, lambda, template [PR108975]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317233249.1406928-1-jason@redhat.com/mbox/"},{"id":71539,"url":"https://patchwork.plctlab.org/api/1.2/patches/71539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7ea52e2-ba72-aa92-3969-ab52f7d112d6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-18T00:12:24","name":"[committed] lra: Ignore debug insns and notes in combine_reload_insn [PR109179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7ea52e2-ba72-aa92-3969-ab52f7d112d6@linux.ibm.com/mbox/"},{"id":71563,"url":"https://patchwork.plctlab.org/api/1.2/patches/71563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318080405.2799610-1-shorne@gmail.com/","msgid":"<20230318080405.2799610-1-shorne@gmail.com>","list_archive_url":null,"date":"2023-03-18T08:04:05","name":"or1k: Do not clear existing FPU exceptions before updating","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318080405.2799610-1-shorne@gmail.com/mbox/"},{"id":71626,"url":"https://patchwork.plctlab.org/api/1.2/patches/71626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBXUQ06ObKinZSSc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-18T15:09:55","name":"c++, v2: Drop TREE_READONLY on vars (possibly) initialized by tls wrapper [PR109164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBXUQ06ObKinZSSc@tucnak/mbox/"},{"id":71636,"url":"https://patchwork.plctlab.org/api/1.2/patches/71636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318165101.3685516-1-dmalcolm@redhat.com/","msgid":"<20230318165101.3685516-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-18T16:51:01","name":"[pushed] analyzer: fix ICE on certain longjmp calls [PR109094]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318165101.3685516-1-dmalcolm@redhat.com/mbox/"},{"id":71645,"url":"https://patchwork.plctlab.org/api/1.2/patches/71645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0c911ee-4587-10d6-3c75-74538e7623be@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-18T18:23:59","name":"[wwwdocs] Mention random number generators in porting_to.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0c911ee-4587-10d6-3c75-74538e7623be@netcologne.de/mbox/"},{"id":71699,"url":"https://patchwork.plctlab.org/api/1.2/patches/71699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pXL_L9eySWVRCSX68GSqD56A=6DP3vBC1h__FgyuBOJ2g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T04:07:53","name":"c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pXL_L9eySWVRCSX68GSqD56A=6DP3vBC1h__FgyuBOJ2g@mail.gmail.com/mbox/"},{"id":71702,"url":"https://patchwork.plctlab.org/api/1.2/patches/71702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pVYKw0zzseC1H+yKwO5L77S001qcvwgwh80AizD80djOw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T04:21:46","name":"libstdc++: use new built-in trait __is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pVYKw0zzseC1H+yKwO5L77S001qcvwgwh80AizD80djOw@mail.gmail.com/mbox/"},{"id":71721,"url":"https://patchwork.plctlab.org/api/1.2/patches/71721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de/","msgid":"<24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de>","list_archive_url":null,"date":"2023-03-19T08:15:08","name":"[wwwdocs] Mention finalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de/mbox/"},{"id":71722,"url":"https://patchwork.plctlab.org/api/1.2/patches/71722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eee8f01b-7e2c-c465-eaed-226714dc9655@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-19T08:32:45","name":"[fortran,doc] Explicitly mention undefined overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eee8f01b-7e2c-c465-eaed-226714dc9655@netcologne.de/mbox/"},{"id":71748,"url":"https://patchwork.plctlab.org/api/1.2/patches/71748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77f9c93-af16-a548-8d6b-d1954a11f02f@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T11:45:47","name":"[v2] rs6000: suboptimal code for returning bool value on target ppc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77f9c93-af16-a548-8d6b-d1954a11f02f@linux.ibm.com/mbox/"},{"id":71763,"url":"https://patchwork.plctlab.org/api/1.2/patches/71763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+m3Wd5z58BNng9_ftjiet5E=4TC3VsCZ_FopBbBZM=og@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T12:04:25","name":"[fortran] PR87127 - External function not recognised from within an associate block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+m3Wd5z58BNng9_ftjiet5E=4TC3VsCZ_FopBbBZM=og@mail.gmail.com/mbox/"},{"id":71836,"url":"https://patchwork.plctlab.org/api/1.2/patches/71836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ece2c4f5-6f01-3689-1c58-d6367dbabae0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T17:20:49","name":"[testsuite] rs6000: suboptimal code for returning bool value on target ppc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ece2c4f5-6f01-3689-1c58-d6367dbabae0@linux.ibm.com/mbox/"},{"id":71865,"url":"https://patchwork.plctlab.org/api/1.2/patches/71865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pWf_bYyeZcecrV=kmG_e6McD+JJPZuHJ2R2XeqJue6Wfw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T20:21:01","name":"c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pWf_bYyeZcecrV=kmG_e6McD+JJPZuHJ2R2XeqJue6Wfw@mail.gmail.com/mbox/"},{"id":71868,"url":"https://patchwork.plctlab.org/api/1.2/patches/71868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ff90764-385c-47bf-bc00-27d0f13bbbad-1679258653969@3c-app-gmx-bs65/","msgid":"","list_archive_url":null,"date":"2023-03-19T20:44:14","name":"Fortran: simplification of NEAREST for large argument [PR109186]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ff90764-385c-47bf-bc00-27d0f13bbbad-1679258653969@3c-app-gmx-bs65/mbox/"},{"id":71938,"url":"https://patchwork.plctlab.org/api/1.2/patches/71938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pW_2+9XTYMWEVHDyU8BKBpQEuGTkwmYVr+dcwUtzHVgsw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T02:53:19","name":"libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pW_2+9XTYMWEVHDyU8BKBpQEuGTkwmYVr+dcwUtzHVgsw@mail.gmail.com/mbox/"},{"id":71969,"url":"https://patchwork.plctlab.org/api/1.2/patches/71969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320042915.140622-1-juzhe.zhong@rivai.ai/","msgid":"<20230320042915.140622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-20T04:29:15","name":"RISC-V: Fix RVV ICE && runtine fail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320042915.140622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":71997,"url":"https://patchwork.plctlab.org/api/1.2/patches/71997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DHPmR-Rs2vT4hbq0pvPsbMthqpFPtfJ6GAUHhWxf31mLg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T06:07:52","name":"fix for __sanitizer_struct_mallinfo with mallinfo2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DHPmR-Rs2vT4hbq0pvPsbMthqpFPtfJ6GAUHhWxf31mLg@mail.gmail.com/mbox/"},{"id":72001,"url":"https://patchwork.plctlab.org/api/1.2/patches/72001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com/","msgid":"<928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:02","name":"[RFC/PATCH] sched: Consider debug insn in no_real_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com/mbox/"},{"id":72003,"url":"https://patchwork.plctlab.org/api/1.2/patches/72003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com/","msgid":"<65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:31","name":"[v3] rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com/mbox/"},{"id":72005,"url":"https://patchwork.plctlab.org/api/1.2/patches/72005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com/","msgid":"<1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:49","name":"rs6000: Ensure vec_sld shift count in allowable range [PR109082]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com/mbox/"},{"id":72006,"url":"https://patchwork.plctlab.org/api/1.2/patches/72006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com/","msgid":"<9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:32:15","name":"rs6000: Make _mm_slli_si128 and _mm_bslli_si128 consistent [PR109167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com/mbox/"},{"id":72007,"url":"https://patchwork.plctlab.org/api/1.2/patches/72007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com/","msgid":"<050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:33:13","name":"libgcc: Use initarray section type for .init_stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com/mbox/"},{"id":72020,"url":"https://patchwork.plctlab.org/api/1.2/patches/72020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pUMO-RG5TjMDKVVxWQn194gPDs4ub7FoTYn6LO_rsFymQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T07:44:59","name":"c++: implement __add_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pUMO-RG5TjMDKVVxWQn194gPDs4ub7FoTYn6LO_rsFymQ@mail.gmail.com/mbox/"},{"id":72048,"url":"https://patchwork.plctlab.org/api/1.2/patches/72048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320093629.15801-1-jwakely@redhat.com/","msgid":"<20230320093629.15801-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-20T09:36:29","name":"[committed] libstdc++: Remove template-head from std::expected ctor [PR109182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320093629.15801-1-jwakely@redhat.com/mbox/"},{"id":72145,"url":"https://patchwork.plctlab.org/api/1.2/patches/72145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-1-kmatsui@cs.washington.edu/","msgid":"<20230320131444.7505-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T13:14:43","name":"[1/2] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-1-kmatsui@cs.washington.edu/mbox/"},{"id":72146,"url":"https://patchwork.plctlab.org/api/1.2/patches/72146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-2-kmatsui@cs.washington.edu/","msgid":"<20230320131444.7505-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T13:14:44","name":"[2/2] libstdc++: use new built-in trait __is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-2-kmatsui@cs.washington.edu/mbox/"},{"id":72231,"url":"https://patchwork.plctlab.org/api/1.2/patches/72231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320155508.28497-1-polacek@redhat.com/","msgid":"<20230320155508.28497-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-20T15:55:08","name":"c++: explicit ctor and list-initialization [PR109159]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320155508.28497-1-polacek@redhat.com/mbox/"},{"id":72424,"url":"https://patchwork.plctlab.org/api/1.2/patches/72424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXY24C2b_eOZ0qZ56zWZKM5fTd9Au1cdde-A+z+Fv47Mw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T19:37:19","name":"Add notes for Go to gcc 12 and 13 changes file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXY24C2b_eOZ0qZ56zWZKM5fTd9Au1cdde-A+z+Fv47Mw@mail.gmail.com/mbox/"},{"id":72427,"url":"https://patchwork.plctlab.org/api/1.2/patches/72427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com/","msgid":"<9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com>","list_archive_url":null,"date":"2023-03-20T19:46:32","name":"stor-layout: Set TYPE_TYPELESS_STORAGE consistently for type variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com/mbox/"},{"id":72434,"url":"https://patchwork.plctlab.org/api/1.2/patches/72434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5a332952-25e6-4b5c-a5bc-51eeaee1b8af-1679342707586@3c-app-gmx-bs21/","msgid":"","list_archive_url":null,"date":"2023-03-20T20:05:07","name":"Fortran: fix documentation of -fno-underscoring [PR109216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5a332952-25e6-4b5c-a5bc-51eeaee1b8af-1679342707586@3c-app-gmx-bs21/mbox/"},{"id":72447,"url":"https://patchwork.plctlab.org/api/1.2/patches/72447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe491b4b-66a9-4d21-b8b1-9af4b907aa10-1679345864578@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-03-20T20:57:44","name":"Fortran: reject MODULE PROCEDURE outside generic module interface [PR99036]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe491b4b-66a9-4d21-b8b1-9af4b907aa10-1679345864578@3c-app-gmx-bap50/mbox/"},{"id":72491,"url":"https://patchwork.plctlab.org/api/1.2/patches/72491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320220625.3877024-1-dmalcolm@redhat.com/","msgid":"<20230320220625.3877024-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-20T22:06:25","name":"testsuite: always use UTF-8 in scan-sarif-file[-not] [PR105959]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320220625.3877024-1-dmalcolm@redhat.com/mbox/"},{"id":72492,"url":"https://patchwork.plctlab.org/api/1.2/patches/72492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBjY/ONm2xjNEped@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T22:06:52","name":"[v2] c++: further -Wdangling-reference refinement [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBjY/ONm2xjNEped@redhat.com/mbox/"},{"id":72505,"url":"https://patchwork.plctlab.org/api/1.2/patches/72505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-1-kmatsui@cs.washington.edu/","msgid":"<20230320222249.20069-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T22:22:48","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-1-kmatsui@cs.washington.edu/mbox/"},{"id":72506,"url":"https://patchwork.plctlab.org/api/1.2/patches/72506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-2-kmatsui@cs.washington.edu/","msgid":"<20230320222249.20069-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T22:22:49","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-2-kmatsui@cs.washington.edu/mbox/"},{"id":72517,"url":"https://patchwork.plctlab.org/api/1.2/patches/72517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320230416.144993-1-jwakely@redhat.com/","msgid":"<20230320230416.144993-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-20T23:04:16","name":"[committed] libstdc++: Fix formatting in std::filesystem helper function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320230416.144993-1-jwakely@redhat.com/mbox/"},{"id":72709,"url":"https://patchwork.plctlab.org/api/1.2/patches/72709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6ba084-3b72-7ae9-1cb3-9a3ad889eaf8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T06:29:50","name":"[PATCHv4,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6ba084-3b72-7ae9-1cb3-9a3ad889eaf8@linux.ibm.com/mbox/"},{"id":72734,"url":"https://patchwork.plctlab.org/api/1.2/patches/72734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321073849.21470-1-zhusonghe@eswincomputing.com/","msgid":"<20230321073849.21470-1-zhusonghe@eswincomputing.com>","list_archive_url":null,"date":"2023-03-21T07:38:49","name":"RISC-V: Fix loss of function to script '\''multilib-generator'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321073849.21470-1-zhusonghe@eswincomputing.com/mbox/"},{"id":72749,"url":"https://patchwork.plctlab.org/api/1.2/patches/72749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBlpWhnv6NXCrESh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T08:22:50","name":"tree: Fix up component_ref_sam_type handling of arrays of 0 sized elements [PR109215]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBlpWhnv6NXCrESh@tucnak/mbox/"},{"id":72782,"url":"https://patchwork.plctlab.org/api/1.2/patches/72782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12217370.T7Z3S40VBb@minbar/","msgid":"<12217370.T7Z3S40VBb@minbar>","list_archive_url":null,"date":"2023-03-21T09:23:01","name":"[1/2] libstdc++: Fix simd test compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12217370.T7Z3S40VBb@minbar/mbox/"},{"id":72783,"url":"https://patchwork.plctlab.org/api/1.2/patches/72783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25835488.EfDdHjke4D@minbar/","msgid":"<25835488.EfDdHjke4D@minbar>","list_archive_url":null,"date":"2023-03-21T09:23:10","name":"[2/2] libstdc++: Fix simd compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25835488.EfDdHjke4D@minbar/mbox/"},{"id":72811,"url":"https://patchwork.plctlab.org/api/1.2/patches/72811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-1-kmatsui@cs.washington.edu/","msgid":"<20230321111056.78121-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T11:10:55","name":"[1/2] c++: implement __add_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-1-kmatsui@cs.washington.edu/mbox/"},{"id":72810,"url":"https://patchwork.plctlab.org/api/1.2/patches/72810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-2-kmatsui@cs.washington.edu/","msgid":"<20230321111056.78121-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T11:10:56","name":"[2/2] libstdc++: use new built-in trait __add_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-2-kmatsui@cs.washington.edu/mbox/"},{"id":72835,"url":"https://patchwork.plctlab.org/api/1.2/patches/72835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com/","msgid":"<0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com>","list_archive_url":null,"date":"2023-03-21T12:10:04","name":"[V2,rs6000] Tweak modulo define_insns to eliminate register copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com/mbox/"},{"id":72837,"url":"https://patchwork.plctlab.org/api/1.2/patches/72837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmfsIQsseeBxUj/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T12:14:40","name":"testsuite: Fix up vect-simd-clone1[678]*.c tests [PR108898]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmfsIQsseeBxUj/@tucnak/mbox/"},{"id":72852,"url":"https://patchwork.plctlab.org/api/1.2/patches/72852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmnD+dfYKuh489q@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T12:46:07","name":"[jakub@redhat.com:,Re:,[PATCH] testsuite: Fix up vect-simd-clone1[678]*.c tests [PR108898]]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmnD+dfYKuh489q@tucnak/mbox/"},{"id":72856,"url":"https://patchwork.plctlab.org/api/1.2/patches/72856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321130409.E34FE13440@imap2.suse-dmz.suse.de/","msgid":"<20230321130409.E34FE13440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-21T13:04:09","name":"tree-optimization/109219 - avoid looking at STMT_SLP_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321130409.E34FE13440@imap2.suse-dmz.suse.de/mbox/"},{"id":72871,"url":"https://patchwork.plctlab.org/api/1.2/patches/72871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af3ada93-10cd-87e3-5836-045819d88090@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T13:42:56","name":"amdgcn: Add accumulator VGPR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af3ada93-10cd-87e3-5836-045819d88090@codesourcery.com/mbox/"},{"id":72872,"url":"https://patchwork.plctlab.org/api/1.2/patches/72872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df4f1039-c686-2155-cfee-6abefa8c8064@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T13:43:17","name":"PR tree-optimization/109192 - Terminate GORI calculations if a relation is not relevant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df4f1039-c686-2155-cfee-6abefa8c8064@redhat.com/mbox/"},{"id":72897,"url":"https://patchwork.plctlab.org/api/1.2/patches/72897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-1-kmatsui@cs.washington.edu/","msgid":"<20230321142159.86694-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T14:21:58","name":"[1/2] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-1-kmatsui@cs.washington.edu/mbox/"},{"id":72901,"url":"https://patchwork.plctlab.org/api/1.2/patches/72901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-2-kmatsui@cs.washington.edu/","msgid":"<20230321142159.86694-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T14:21:59","name":"[2/2] libstdc++: use new built-in trait __is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-2-kmatsui@cs.washington.edu/mbox/"},{"id":72909,"url":"https://patchwork.plctlab.org/api/1.2/patches/72909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321150844.1983244-1-jason@redhat.com/","msgid":"<20230321150844.1983244-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-21T15:08:44","name":"[pushed] c++: DMI in template with virtual base [PR106890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321150844.1983244-1-jason@redhat.com/mbox/"},{"id":72916,"url":"https://patchwork.plctlab.org/api/1.2/patches/72916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321153805.9120E2040E@pchp3.se.axis.com/","msgid":"<20230321153805.9120E2040E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-21T15:38:05","name":"testsuite: Compile-only gcc.dg/tree-ssa/pr100359.c if ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321153805.9120E2040E@pchp3.se.axis.com/mbox/"},{"id":72926,"url":"https://patchwork.plctlab.org/api/1.2/patches/72926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0ti9k3o.fsf@euler.schwinge.homeip.net/","msgid":"<87r0ti9k3o.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-21T15:53:31","name":"libgomp: Simplify OpenMP reverse offload host <-> device memory copy implementation (was: [Patch] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0ti9k3o.fsf@euler.schwinge.homeip.net/mbox/"},{"id":72938,"url":"https://patchwork.plctlab.org/api/1.2/patches/72938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-1-kmatsui@cs.washington.edu/","msgid":"<20230321163949.1950-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T16:39:48","name":"[1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-1-kmatsui@cs.washington.edu/mbox/"},{"id":72939,"url":"https://patchwork.plctlab.org/api/1.2/patches/72939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-2-kmatsui@cs.washington.edu/","msgid":"<20230321163949.1950-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T16:39:49","name":"[2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-2-kmatsui@cs.washington.edu/mbox/"},{"id":72941,"url":"https://patchwork.plctlab.org/api/1.2/patches/72941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620BB0C1D1D2ED13BCE6CA9AC819@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-03-21T16:50:42","name":"[v2] libstdc++: Fix handling of surrogate CP in codecvt [PR108976]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620BB0C1D1D2ED13BCE6CA9AC819@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":72942,"url":"https://patchwork.plctlab.org/api/1.2/patches/72942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27030948.6Emhk5qWAg@minbar/","msgid":"<27030948.6Emhk5qWAg@minbar>","list_archive_url":null,"date":"2023-03-21T17:01:22","name":"[committed] libstdc++: Fix simd compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27030948.6Emhk5qWAg@minbar/mbox/"},{"id":72943,"url":"https://patchwork.plctlab.org/api/1.2/patches/72943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7568297.R56niFO833@minbar/","msgid":"<7568297.R56niFO833@minbar>","list_archive_url":null,"date":"2023-03-21T17:05:18","name":"libstdc++: Skip integer division optimization for Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7568297.R56niFO833@minbar/mbox/"},{"id":72944,"url":"https://patchwork.plctlab.org/api/1.2/patches/72944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5914330.taCxCBeP46@minbar/","msgid":"<5914330.taCxCBeP46@minbar>","list_archive_url":null,"date":"2023-03-21T17:05:23","name":"libstdc++: Use more precise __RECIPROCAL_MATH__ macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5914330.taCxCBeP46@minbar/mbox/"},{"id":72946,"url":"https://patchwork.plctlab.org/api/1.2/patches/72946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170700.4153-1-kmatsui@cs.washington.edu/","msgid":"<20230321170700.4153-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T17:06:59","name":"[v2,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170700.4153-1-kmatsui@cs.washington.edu/mbox/"},{"id":72948,"url":"https://patchwork.plctlab.org/api/1.2/patches/72948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170851.4277-2-kmatsui@cs.washington.edu/","msgid":"<20230321170851.4277-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T17:08:51","name":"[v2,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170851.4277-2-kmatsui@cs.washington.edu/mbox/"},{"id":73010,"url":"https://patchwork.plctlab.org/api/1.2/patches/73010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rfpx5z3.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-21T19:24:48","name":"[wwwdocs] Document support for znver4 in gcc-13/changes.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rfpx5z3.fsf@suse.cz/mbox/"},{"id":73097,"url":"https://patchwork.plctlab.org/api/1.2/patches/73097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-1-kmatsui@cs.washington.edu/","msgid":"<20230321223957.7176-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T22:39:56","name":"[1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-1-kmatsui@cs.washington.edu/mbox/"},{"id":73099,"url":"https://patchwork.plctlab.org/api/1.2/patches/73099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-2-kmatsui@cs.washington.edu/","msgid":"<20230321223957.7176-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T22:39:57","name":"[2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-2-kmatsui@cs.washington.edu/mbox/"},{"id":73112,"url":"https://patchwork.plctlab.org/api/1.2/patches/73112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBpDaXeXCMBNxNWk@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-21T23:53:13","name":"PR target/105325, Make load/cmp fusion know about prefixed loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBpDaXeXCMBNxNWk@toto.the-meissners.org/mbox/"},{"id":73113,"url":"https://patchwork.plctlab.org/api/1.2/patches/73113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-1-kmatsui@cs.washington.edu/","msgid":"<20230322001142.13422-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T00:11:41","name":"[1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-1-kmatsui@cs.washington.edu/mbox/"},{"id":73114,"url":"https://patchwork.plctlab.org/api/1.2/patches/73114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-2-kmatsui@cs.washington.edu/","msgid":"<20230322001142.13422-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T00:11:42","name":"[2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-2-kmatsui@cs.washington.edu/mbox/"},{"id":73144,"url":"https://patchwork.plctlab.org/api/1.2/patches/73144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com/","msgid":"<527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com>","list_archive_url":null,"date":"2023-03-22T01:40:59","name":"[V2] Docs, OpenMP: Correct internal documentation of OMP_FOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com/mbox/"},{"id":73162,"url":"https://patchwork.plctlab.org/api/1.2/patches/73162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322024956.74271-1-juzhe.zhong@rivai.ai/","msgid":"<20230322024956.74271-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T02:49:56","name":"RISC-V: Fix ICE in LRA for LMUL < 1 vector spillings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322024956.74271-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73163,"url":"https://patchwork.plctlab.org/api/1.2/patches/73163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322025701.3369256-1-hongtao.liu@intel.com/","msgid":"<20230322025701.3369256-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-22T02:57:01","name":"Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it'\''s not used anymore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322025701.3369256-1-hongtao.liu@intel.com/mbox/"},{"id":73192,"url":"https://patchwork.plctlab.org/api/1.2/patches/73192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050330.31903-1-shiyulong@iscas.ac.cn/","msgid":"<20230322050330.31903-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-22T05:03:30","name":"[V3] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050330.31903-1-shiyulong@iscas.ac.cn/mbox/"},{"id":73193,"url":"https://patchwork.plctlab.org/api/1.2/patches/73193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050623.229416-1-juzhe.zhong@rivai.ai/","msgid":"<20230322050623.229416-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T05:06:23","name":"RISC-V: Fix PR109228","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050623.229416-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73337,"url":"https://patchwork.plctlab.org/api/1.2/patches/73337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6422fead-a964-5497-2422-510acf753a4d@codesourcery.com/","msgid":"<6422fead-a964-5497-2422-510acf753a4d@codesourcery.com>","list_archive_url":null,"date":"2023-03-22T09:59:28","name":"[committed] MAINTAINERS: Add myself as OpenMP and libgomp maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6422fead-a964-5497-2422-510acf753a4d@codesourcery.com/mbox/"},{"id":73338,"url":"https://patchwork.plctlab.org/api/1.2/patches/73338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100240.DDC59385735E@sourceware.org/","msgid":"<20230322100240.DDC59385735E@sourceware.org>","list_archive_url":null,"date":"2023-03-22T10:01:54","name":"rtl-optimization/109237 - quadraticness in delete_trivially_dead_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100240.DDC59385735E@sourceware.org/mbox/"},{"id":73339,"url":"https://patchwork.plctlab.org/api/1.2/patches/73339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100435.ECD873858416@sourceware.org/","msgid":"<20230322100435.ECD873858416@sourceware.org>","list_archive_url":null,"date":"2023-03-22T10:03:42","name":"rtl-optimization/109237 - speedup bb_is_just_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100435.ECD873858416@sourceware.org/mbox/"},{"id":73341,"url":"https://patchwork.plctlab.org/api/1.2/patches/73341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrVY9tS995rgIVj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-22T10:16:03","name":"match.pd: Fix up fneg/fadd simplification [PR109230]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrVY9tS995rgIVj@tucnak/mbox/"},{"id":73342,"url":"https://patchwork.plctlab.org/api/1.2/patches/73342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322104230.343644-1-jwakely@redhat.com/","msgid":"<20230322104230.343644-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T10:42:30","name":"wwwdocs: Clarify experimental status of C++17 prior to GCC 9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322104230.343644-1-jwakely@redhat.com/mbox/"},{"id":73370,"url":"https://patchwork.plctlab.org/api/1.2/patches/73370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrnTg7r6/KAceFW@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T11:32:30","name":"c++: Avoid duplicate diagnostic calling unavailable function [PR109177]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrnTg7r6/KAceFW@arm.com/mbox/"},{"id":73397,"url":"https://patchwork.plctlab.org/api/1.2/patches/73397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322121556.94496-1-juzhe.zhong@rivai.ai/","msgid":"<20230322121556.94496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T12:15:56","name":"RISC-V: Fix redundant vmv1r.v instruction in vmsge.vx codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322121556.94496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73400,"url":"https://patchwork.plctlab.org/api/1.2/patches/73400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322123036.8709B385B519@sourceware.org/","msgid":"<20230322123036.8709B385B519@sourceware.org>","list_archive_url":null,"date":"2023-03-22T12:29:52","name":"tree-optimization/109237 - last_stmt is possibly slow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322123036.8709B385B519@sourceware.org/mbox/"},{"id":73402,"url":"https://patchwork.plctlab.org/api/1.2/patches/73402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322124341.3976040-1-dmalcolm@redhat.com/","msgid":"<20230322124341.3976040-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-22T12:43:41","name":"[pushed] analyzer: fix false +ves from -Wanalyzer-deref-before-check due to inlining [PR109239]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322124341.3976040-1-dmalcolm@redhat.com/mbox/"},{"id":73511,"url":"https://patchwork.plctlab.org/api/1.2/patches/73511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322160448.2494466-1-jason@redhat.com/","msgid":"<20230322160448.2494466-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-22T16:04:48","name":"[pushed] c++: attribute on dtor in template [PR108795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322160448.2494466-1-jason@redhat.com/mbox/"},{"id":73582,"url":"https://patchwork.plctlab.org/api/1.2/patches/73582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb0f104a-ee16-0692-c0a1-f0c1c8b4ba8d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T17:37:39","name":"[pushed,PR109137] LRA: Do not repeat inheritance and live range splitting in case of asm error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb0f104a-ee16-0692-c0a1-f0c1c8b4ba8d@redhat.com/mbox/"},{"id":73591,"url":"https://patchwork.plctlab.org/api/1.2/patches/73591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174942.407933-1-jwakely@redhat.com/","msgid":"<20230322174942.407933-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:42","name":"[committed] libstdc++: Make std::istream_iterator copy ctor constexpr (LWG 3600)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174942.407933-1-jwakely@redhat.com/mbox/"},{"id":73589,"url":"https://patchwork.plctlab.org/api/1.2/patches/73589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174947.407957-1-jwakely@redhat.com/","msgid":"<20230322174947.407957-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:47","name":"[committed] libstdc++: Add allocator-extended constructors to std::match_results (LWG 2195)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174947.407957-1-jwakely@redhat.com/mbox/"},{"id":73588,"url":"https://patchwork.plctlab.org/api/1.2/patches/73588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174952.407973-1-jwakely@redhat.com/","msgid":"<20230322174952.407973-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:52","name":"[committed] libstdc++: Add comment to (LWG 3720)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174952.407973-1-jwakely@redhat.com/mbox/"},{"id":73590,"url":"https://patchwork.plctlab.org/api/1.2/patches/73590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174958.407987-1-jwakely@redhat.com/","msgid":"<20230322174958.407987-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:58","name":"[committed] libstdc++: Use rvalues in std::string::resize_and_overwrite (LWG 3645)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174958.407987-1-jwakely@redhat.com/mbox/"},{"id":73592,"url":"https://patchwork.plctlab.org/api/1.2/patches/73592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175003.408005-1-jwakely@redhat.com/","msgid":"<20230322175003.408005-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:03","name":"[committed] libstdc++: Add missing __cpp_lib_format macro to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175003.408005-1-jwakely@redhat.com/mbox/"},{"id":73595,"url":"https://patchwork.plctlab.org/api/1.2/patches/73595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175016.408028-1-jwakely@redhat.com/","msgid":"<20230322175016.408028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:16","name":"[committed] libstdc++: Define __cpp_lib_constexpr_algorithms in (LWG 3792)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175016.408028-1-jwakely@redhat.com/mbox/"},{"id":73596,"url":"https://patchwork.plctlab.org/api/1.2/patches/73596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175026.408061-1-jwakely@redhat.com/","msgid":"<20230322175026.408061-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:26","name":"[committed] libstdc++: Remove std::formatter specialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175026.408061-1-jwakely@redhat.com/mbox/"},{"id":73611,"url":"https://patchwork.plctlab.org/api/1.2/patches/73611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7df2d884-20c1-4801-a213-d2e676f4dafd-1679509823088@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2023-03-22T18:30:23","name":"[committed] Fortran: improve checking of FINAL subroutine arguments [PR104572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7df2d884-20c1-4801-a213-d2e676f4dafd-1679509823088@3c-app-gmx-bap55/mbox/"},{"id":73638,"url":"https://patchwork.plctlab.org/api/1.2/patches/73638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322193016.2560128-1-jason@redhat.com/","msgid":"<20230322193016.2560128-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-22T19:30:16","name":"[pushed] c++: array bound partial ordering [PR108390]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322193016.2560128-1-jason@redhat.com/mbox/"},{"id":73652,"url":"https://patchwork.plctlab.org/api/1.2/patches/73652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWM7GsJ_tvAFbjdCaqBWcHUdck_zGgXKG+k-hV_TqsZcQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T19:58:41","name":"Go patch committed: Add missing Slice_info_expression::do_traverse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWM7GsJ_tvAFbjdCaqBWcHUdck_zGgXKG+k-hV_TqsZcQ@mail.gmail.com/mbox/"},{"id":73693,"url":"https://patchwork.plctlab.org/api/1.2/patches/73693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322232709.457972-1-jwakely@redhat.com/","msgid":"<20230322232709.457972-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T23:27:09","name":"[committed] libstdc++: Fix assigning nullptr to std::atomic> (LWG 3893)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322232709.457972-1-jwakely@redhat.com/mbox/"},{"id":73697,"url":"https://patchwork.plctlab.org/api/1.2/patches/73697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-1-kmatsui@cs.washington.edu/","msgid":"<20230322234134.14578-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T23:41:33","name":"[1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-1-kmatsui@cs.washington.edu/mbox/"},{"id":73698,"url":"https://patchwork.plctlab.org/api/1.2/patches/73698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-2-kmatsui@cs.washington.edu/","msgid":"<20230322234134.14578-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T23:41:34","name":"[2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-2-kmatsui@cs.washington.edu/mbox/"},{"id":73729,"url":"https://patchwork.plctlab.org/api/1.2/patches/73729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004122.34600-1-kmatsui@cs.washington.edu/","msgid":"<20230323004122.34600-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T00:41:21","name":"[v2,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004122.34600-1-kmatsui@cs.washington.edu/mbox/"},{"id":73730,"url":"https://patchwork.plctlab.org/api/1.2/patches/73730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004207.34784-2-kmatsui@cs.washington.edu/","msgid":"<20230323004207.34784-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T00:42:07","name":"[v2,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004207.34784-2-kmatsui@cs.washington.edu/mbox/"},{"id":73747,"url":"https://patchwork.plctlab.org/api/1.2/patches/73747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323020458.54515-1-kmatsui@cs.washington.edu/","msgid":"<20230323020458.54515-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T02:04:58","name":"libstdc++: use __bool_constant instead of integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323020458.54515-1-kmatsui@cs.washington.edu/mbox/"},{"id":73758,"url":"https://patchwork.plctlab.org/api/1.2/patches/73758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfdwma90.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-23T03:12:27","name":"[v2,#1/2] enable adjustment of return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfdwma90.fsf@lxoliva.fsfla.org/mbox/"},{"id":73759,"url":"https://patchwork.plctlab.org/api/1.2/patches/73759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7okma45.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-23T03:15:22","name":"[v2,#2/2,rs6000] adjust return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7okma45.fsf@lxoliva.fsfla.org/mbox/"},{"id":73760,"url":"https://patchwork.plctlab.org/api/1.2/patches/73760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323032355.2678239-1-jason@redhat.com/","msgid":"<20230323032355.2678239-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T03:23:55","name":"[pushed] c++: local class in nested generic lambda [PR109241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323032355.2678239-1-jason@redhat.com/mbox/"},{"id":73804,"url":"https://patchwork.plctlab.org/api/1.2/patches/73804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323051151.2982138-1-kevinl@rivosinc.com/","msgid":"<20230323051151.2982138-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-03-23T05:11:51","name":"[RFC] vect: verify that nelt is greater than one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323051151.2982138-1-kevinl@rivosinc.com/mbox/"},{"id":73883,"url":"https://patchwork.plctlab.org/api/1.2/patches/73883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323080734.423-1-jinma@linux.alibaba.com/","msgid":"<20230323080734.423-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-03-23T08:07:34","name":"In the ready lists of pipeline, put unrecog insns (such as CLOBBER, USE) at the latest to issue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323080734.423-1-jinma@linux.alibaba.com/mbox/"},{"id":73893,"url":"https://patchwork.plctlab.org/api/1.2/patches/73893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBwOTvM4REORW9kQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-23T08:31:10","name":"tree-vect-generic: Fix up expand_vector_condition [PR109176]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBwOTvM4REORW9kQ@tucnak/mbox/"},{"id":73933,"url":"https://patchwork.plctlab.org/api/1.2/patches/73933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com/","msgid":"<0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T09:28:26","name":"[v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com/mbox/"},{"id":73964,"url":"https://patchwork.plctlab.org/api/1.2/patches/73964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cv7vkxc.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-23T10:09:19","name":"ipa: Avoid another ICE when dealing with type-incompatibilities (PR 108959)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cv7vkxc.fsf@suse.cz/mbox/"},{"id":73980,"url":"https://patchwork.plctlab.org/api/1.2/patches/73980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com/","msgid":"<4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com>","list_archive_url":null,"date":"2023-03-23T10:38:32","name":"rtl-optimization: ppc backend generates unnecessary signed extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com/mbox/"},{"id":73999,"url":"https://patchwork.plctlab.org/api/1.2/patches/73999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323110608.42262-1-kmatsui@cs.washington.edu/","msgid":"<20230323110608.42262-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T11:06:08","name":"libstdc++: use __bool_constant instead of integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323110608.42262-1-kmatsui@cs.washington.edu/mbox/"},{"id":74009,"url":"https://patchwork.plctlab.org/api/1.2/patches/74009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db0a824f-d244-a3bc-6ffd-2dc87b6635db@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-23T11:32:20","name":"[committed] amdgcn: vec_extract no-op insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db0a824f-d244-a3bc-6ffd-2dc87b6635db@codesourcery.com/mbox/"},{"id":74015,"url":"https://patchwork.plctlab.org/api/1.2/patches/74015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com/","msgid":"<3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T11:47:41","name":"[committed] amdgcn: Fix register size bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com/mbox/"},{"id":74063,"url":"https://patchwork.plctlab.org/api/1.2/patches/74063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95180085-897F-4B87-BE0E-78ACF1808326@oracle.com/","msgid":"<95180085-897F-4B87-BE0E-78ACF1808326@oracle.com>","list_archive_url":null,"date":"2023-03-23T13:03:45","name":"[V5,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95180085-897F-4B87-BE0E-78ACF1808326@oracle.com/mbox/"},{"id":74065,"url":"https://patchwork.plctlab.org/api/1.2/patches/74065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C8A44F64-E794-4BC2-9CDF-16549EF0BD8B@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-03-23T13:05:16","name":"[V5,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C8A44F64-E794-4BC2-9CDF-16549EF0BD8B@oracle.com/mbox/"},{"id":74071,"url":"https://patchwork.plctlab.org/api/1.2/patches/74071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBxU3ojbATAS1RNX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-23T13:32:14","name":"ranger: Ranger meets aspell","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBxU3ojbATAS1RNX@tucnak/mbox/"},{"id":74080,"url":"https://patchwork.plctlab.org/api/1.2/patches/74080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com/","msgid":"<8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T13:41:15","name":"[OG12,committed] Fortran: Add attr.class_ok check for generate_callback_wrapper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com/mbox/"},{"id":74091,"url":"https://patchwork.plctlab.org/api/1.2/patches/74091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2623454.BddDVKsqQX@fomalhaut/","msgid":"<2623454.BddDVKsqQX@fomalhaut>","list_archive_url":null,"date":"2023-03-23T14:14:11","name":"(testsuite] Skip gnat.dg/div_zero.adb on Aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2623454.BddDVKsqQX@fomalhaut/mbox/"},{"id":74097,"url":"https://patchwork.plctlab.org/api/1.2/patches/74097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323150055.2694558-1-ppalka@redhat.com/","msgid":"<20230323150055.2694558-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T15:00:55","name":"c++: outer '\''this'\'' leaking into local class [PR106969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323150055.2694558-1-ppalka@redhat.com/mbox/"},{"id":74102,"url":"https://patchwork.plctlab.org/api/1.2/patches/74102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323153505.0E8A313596@imap2.suse-dmz.suse.de/","msgid":"<20230323153505.0E8A313596@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T15:35:04","name":"tree-optimization/109262 - ICE with non-call EH and forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323153505.0E8A313596@imap2.suse-dmz.suse.de/mbox/"},{"id":74105,"url":"https://patchwork.plctlab.org/api/1.2/patches/74105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323160030.02D4813596@imap2.suse-dmz.suse.de/","msgid":"<20230323160030.02D4813596@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T16:00:29","name":"lto/109263 - lto-wrapper and -g0 -ggdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323160030.02D4813596@imap2.suse-dmz.suse.de/mbox/"},{"id":74108,"url":"https://patchwork.plctlab.org/api/1.2/patches/74108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323162146.791FA132C2@imap2.suse-dmz.suse.de/","msgid":"<20230323162146.791FA132C2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T16:21:46","name":"tree-optimization/107569 - avoid wrecking earlier folding in FRE/PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323162146.791FA132C2@imap2.suse-dmz.suse.de/mbox/"},{"id":74129,"url":"https://patchwork.plctlab.org/api/1.2/patches/74129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323172557.3415682-1-apinski@marvell.com/","msgid":"<20230323172557.3415682-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-23T17:25:57","name":"c: [PR84900] cast of compound literal does not cause the code to become a non-lvalue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323172557.3415682-1-apinski@marvell.com/mbox/"},{"id":74166,"url":"https://patchwork.plctlab.org/api/1.2/patches/74166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com/","msgid":"<96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com>","list_archive_url":null,"date":"2023-03-23T18:37:01","name":"PR tree-optimization/109238 - Ranger cache dominator queries should ignore backedges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com/mbox/"},{"id":74202,"url":"https://patchwork.plctlab.org/api/1.2/patches/74202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com/","msgid":"<830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T19:57:39","name":"[OG12,committed] Fortran/OpenMP: Fix '\''alloc'\'' and '\''from'\'' mapping for allocatable components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com/mbox/"},{"id":74208,"url":"https://patchwork.plctlab.org/api/1.2/patches/74208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323203507.2960052-1-jason@redhat.com/","msgid":"<20230323203507.2960052-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T20:35:07","name":"[RFC] c-family: -Wsequence-point and COMPONENT_REF [PR107163]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323203507.2960052-1-jason@redhat.com/mbox/"},{"id":74217,"url":"https://patchwork.plctlab.org/api/1.2/patches/74217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323205838.3AA8B20430@pchp3.se.axis.com/","msgid":"<20230323205838.3AA8B20430@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-23T20:58:38","name":"[COMMITTED] testsuite: Xfail gcc.dg/tree-ssa/ssa-fre-100.c for ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323205838.3AA8B20430@pchp3.se.axis.com/mbox/"},{"id":74223,"url":"https://patchwork.plctlab.org/api/1.2/patches/74223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-1-ppalka@redhat.com/","msgid":"<20230323211803.396326-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:18:02","name":"[1/2] c++: improve \"NTTP argument considered unused\" fix [PR53164, PR105848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-1-ppalka@redhat.com/mbox/"},{"id":74224,"url":"https://patchwork.plctlab.org/api/1.2/patches/74224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-2-ppalka@redhat.com/","msgid":"<20230323211803.396326-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:18:03","name":"[2/2] c++: duplicate \"use of deleted fn\" diagnostic [PR106880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-2-ppalka@redhat.com/mbox/"},{"id":74233,"url":"https://patchwork.plctlab.org/api/1.2/patches/74233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323213908.2988082-1-jason@redhat.com/","msgid":"<20230323213908.2988082-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:39:08","name":"[pushed] c++: constexpr PMF conversion [PR105996]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323213908.2988082-1-jason@redhat.com/mbox/"},{"id":74298,"url":"https://patchwork.plctlab.org/api/1.2/patches/74298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015239.13455-1-wangfeng@eswincomputing.com/","msgid":"<20230324015239.13455-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-24T01:52:39","name":"RISC-V: Optimize load memory data in rv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015239.13455-1-wangfeng@eswincomputing.com/mbox/"},{"id":74299,"url":"https://patchwork.plctlab.org/api/1.2/patches/74299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015324.13616-1-wangfeng@eswincomputing.com/","msgid":"<20230324015324.13616-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-24T01:53:24","name":"RISC-V: Optimize zbb ins sext.b and sext.h in rv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015324.13616-1-wangfeng@eswincomputing.com/mbox/"},{"id":74369,"url":"https://patchwork.plctlab.org/api/1.2/patches/74369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324064222.205360-1-juzhe.zhong@rivai.ai/","msgid":"<20230324064222.205360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T06:42:22","name":"[GCC14,QUEUE] RISC-V: Fix RVV register order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324064222.205360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74374,"url":"https://patchwork.plctlab.org/api/1.2/patches/74374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324065725.70549-1-juzhe.zhong@rivai.ai/","msgid":"<20230324065725.70549-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T06:57:25","name":"[GCC14,QUEUE] RISC-V: Fix RVV register order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324065725.70549-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74482,"url":"https://patchwork.plctlab.org/api/1.2/patches/74482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1kx/ykFT0v62j+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T08:52:23","name":"[committed] testsuite: Add testcase for already fixed PR [PR99739]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1kx/ykFT0v62j+@tucnak/mbox/"},{"id":74436,"url":"https://patchwork.plctlab.org/api/1.2/patches/74436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1lLvJxLGCAk2GT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T08:54:06","name":"[committed] testsuite: Fix up gcc.target/i386/pr109137.c testcase [PR109137]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1lLvJxLGCAk2GT@tucnak/mbox/"},{"id":74444,"url":"https://patchwork.plctlab.org/api/1.2/patches/74444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1oZcqg/ujxE+D+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T09:07:49","name":"builtins: Fix up ICE in inline_string_cmp [PR109258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1oZcqg/ujxE+D+@tucnak/mbox/"},{"id":74445,"url":"https://patchwork.plctlab.org/api/1.2/patches/74445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1r8ncB77h3D2Si@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T09:22:58","name":"go: Fix up go.test/test/fixedbugs/bug207.go failure [PR109258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1r8ncB77h3D2Si@tucnak/mbox/"},{"id":74474,"url":"https://patchwork.plctlab.org/api/1.2/patches/74474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324101942.7978E138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324101942.7978E138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T10:19:42","name":"[1/2] Disallow -gno-dwarf, gno-dwarf-N, -gno-gdb and -gno-vms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324101942.7978E138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74476,"url":"https://patchwork.plctlab.org/api/1.2/patches/74476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324102009.C79A5138F1@imap2.suse-dmz.suse.de/","msgid":"<20230324102009.C79A5138F1@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T10:20:09","name":"[2/2] Remove Negative(gwarf-) from gdwarf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324102009.C79A5138F1@imap2.suse-dmz.suse.de/mbox/"},{"id":74487,"url":"https://patchwork.plctlab.org/api/1.2/patches/74487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112846.283687-1-juzhe.zhong@rivai.ai/","msgid":"<20230324112846.283687-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T11:28:46","name":"RISC-V: Fine tune RVV narrow instruction (source EEW > dest DEST) RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112846.283687-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74488,"url":"https://patchwork.plctlab.org/api/1.2/patches/74488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112927.285817-1-juzhe.zhong@rivai.ai/","msgid":"<20230324112927.285817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T11:29:27","name":"[GCC14,QUEUE] RISC-V: Fine tune RVV narrow instruction (source EEW > dest DEST) RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112927.285817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74514,"url":"https://patchwork.plctlab.org/api/1.2/patches/74514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB2LgwL5rK/JI+KH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T11:37:39","name":"[wwwdocs] Mention the GNU C enum changes in gcc-13/changes.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB2LgwL5rK/JI+KH@tucnak/mbox/"},{"id":74530,"url":"https://patchwork.plctlab.org/api/1.2/patches/74530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130319.5E23D138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324130319.5E23D138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T13:03:18","name":"[1/2] Add emulated scatter capability to the vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130319.5E23D138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74531,"url":"https://patchwork.plctlab.org/api/1.2/patches/74531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T13:04:03","name":"[2/2,i386] Adjust costing of emulated vectorized gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74557,"url":"https://patchwork.plctlab.org/api/1.2/patches/74557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324133928.14753-1-alx@kernel.org/","msgid":"<20230324133928.14753-1-alx@kernel.org>","list_archive_url":null,"date":"2023-03-24T13:39:28","name":"[v2] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324133928.14753-1-alx@kernel.org/mbox/"},{"id":74566,"url":"https://patchwork.plctlab.org/api/1.2/patches/74566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324141157.1646192-1-pan2.li@intel.com/","msgid":"<20230324141157.1646192-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-24T14:11:57","name":"RTL: Bugfix for wrong code with v16hi compare & mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324141157.1646192-1-pan2.li@intel.com/mbox/"},{"id":74599,"url":"https://patchwork.plctlab.org/api/1.2/patches/74599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-2-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-2-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:39","name":"[1/7] openmp: Add Fortran support for \"omp unroll\" directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-2-frederik@codesourcery.com/mbox/"},{"id":74598,"url":"https://patchwork.plctlab.org/api/1.2/patches/74598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-3-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-3-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:40","name":"[2/7] openmp: Add C/C++ support for \"omp unroll\" directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-3-frederik@codesourcery.com/mbox/"},{"id":74601,"url":"https://patchwork.plctlab.org/api/1.2/patches/74601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-4-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-4-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:41","name":"[3/7] openacc: Rename OMP_CLAUSE_TILE to OMP_CLAUSE_OACC_TILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-4-frederik@codesourcery.com/mbox/"},{"id":74611,"url":"https://patchwork.plctlab.org/api/1.2/patches/74611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-5-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-5-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:42","name":"[4/7] openmp: Add Fortran support for \"omp tile\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-5-frederik@codesourcery.com/mbox/"},{"id":74612,"url":"https://patchwork.plctlab.org/api/1.2/patches/74612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-6-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-6-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:43","name":"[5/7] openmp: Add C/C++ support for \"omp tile\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-6-frederik@codesourcery.com/mbox/"},{"id":74616,"url":"https://patchwork.plctlab.org/api/1.2/patches/74616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-7-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-7-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:44","name":"[6/7] openmp: Add Fortran support for loop transformations on inner loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-7-frederik@codesourcery.com/mbox/"},{"id":74618,"url":"https://patchwork.plctlab.org/api/1.2/patches/74618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-8-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-8-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:45","name":"[7/7] openmp: Add C/C++ support for loop transformations on inner loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-8-frederik@codesourcery.com/mbox/"},{"id":74604,"url":"https://patchwork.plctlab.org/api/1.2/patches/74604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ileq9n5v.fsf@euler.schwinge.homeip.net/","msgid":"<87ileq9n5v.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:36:28","name":"[og12] In '\''libgomp/target.c:gomp_unmap_vars_internal'\'', defer '\''gomp_remove_var'\'' (was: [PATCH, v2, OpenMP 5.0, libgomp] Structure element mapping for OpenMP 5.0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ileq9n5v.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74610,"url":"https://patchwork.plctlab.org/api/1.2/patches/74610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edpe9muz.fsf@euler.schwinge.homeip.net/","msgid":"<87edpe9muz.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:43:00","name":"[og12] libgomp: Simplify OpenMP reverse offload host <-> device memory copy implementation (was: [Patch] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edpe9muz.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74615,"url":"https://patchwork.plctlab.org/api/1.2/patches/74615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkki9mji.fsf@euler.schwinge.homeip.net/","msgid":"<87bkki9mji.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:49:53","name":"[og12] libgomp: Document OpenMP '\''pinned'\'' memory (was: [PATCH] libgomp, openmp: pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkki9mji.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74624,"url":"https://patchwork.plctlab.org/api/1.2/patches/74624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfm9l8f.fsf@euler.schwinge.homeip.net/","msgid":"<878rfm9l8f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T16:18:08","name":"Add caveat/safeguard to OpenMP: Handle descriptors in target'\''s firstprivate [PR104949] (was: [Patch] OpenMP: Handle descriptors in target'\''s firstprivate [PR104949])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfm9l8f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74633,"url":"https://patchwork.plctlab.org/api/1.2/patches/74633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324163153.3200112-1-jason@redhat.com/","msgid":"<20230324163153.3200112-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-24T16:31:53","name":"[pushed] c++: default template arg, partial ordering [PR105481]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324163153.3200112-1-jason@redhat.com/mbox/"},{"id":74634,"url":"https://patchwork.plctlab.org/api/1.2/patches/74634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8285vg.fsf@euler.schwinge.homeip.net/","msgid":"<87zg8285vg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T16:35:15","name":"[og12] Add '\''libgomp.c/alloc-ompx_host_mem_alloc-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8285vg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74635,"url":"https://patchwork.plctlab.org/api/1.2/patches/74635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com/","msgid":"<3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T16:37:39","name":"[committed] libgomp.texi: Fix wording in GCN offload specifics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com/mbox/"},{"id":74743,"url":"https://patchwork.plctlab.org/api/1.2/patches/74743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7f6b0c0f-cba2-46f2-a5ef-9085b5268c50-1679692495210@3c-app-gmx-bap63/","msgid":"","list_archive_url":null,"date":"2023-03-24T21:14:55","name":"[committed] Fortran: fix FE memleak with BOZ expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7f6b0c0f-cba2-46f2-a5ef-9085b5268c50-1679692495210@3c-app-gmx-bap63/mbox/"},{"id":74750,"url":"https://patchwork.plctlab.org/api/1.2/patches/74750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4dSDShmhmy6Y6k@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T21:59:36","name":"aarch64, builtins: Include PR registers in FUNCTION_ARG_REGNO_P etc. [PR109254]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4dSDShmhmy6Y6k@tucnak/mbox/"},{"id":74786,"url":"https://patchwork.plctlab.org/api/1.2/patches/74786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4s+1RqBNR49tj/@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-24T23:06:35","name":"[V2] PR target/105325, Make load/cmp fusion know about prefixed load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4s+1RqBNR49tj/@toto.the-meissners.org/mbox/"},{"id":74788,"url":"https://patchwork.plctlab.org/api/1.2/patches/74788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324235635.4137828-1-dmalcolm@redhat.com/","msgid":"<20230324235635.4137828-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-24T23:56:35","name":"[pushed] docs, analyzer: improvements to \"Debugging the Analyzer\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324235635.4137828-1-dmalcolm@redhat.com/mbox/"},{"id":74801,"url":"https://patchwork.plctlab.org/api/1.2/patches/74801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325010301.4140585-1-dmalcolm@redhat.com/","msgid":"<20230325010301.4140585-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-25T01:03:01","name":"[pushed] diagnostics: ensure that .sarif files are UTF-8 encoded [PR109098]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325010301.4140585-1-dmalcolm@redhat.com/mbox/"},{"id":74885,"url":"https://patchwork.plctlab.org/api/1.2/patches/74885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7EJsY28ImtWfLF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-25T09:53:09","name":"predict: Don'\''t emit -Wsuggest-attribute=cold warning for functions which already have that attribute [PR105685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7EJsY28ImtWfLF@tucnak/mbox/"},{"id":74886,"url":"https://patchwork.plctlab.org/api/1.2/patches/74886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7IBe1ytkKihzTP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-25T10:10:54","name":"c++: Avoid informs without a warning [PR109278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7IBe1ytkKihzTP@tucnak/mbox/"},{"id":74887,"url":"https://patchwork.plctlab.org/api/1.2/patches/74887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325121432.3203674-1-pan2.li@intel.com/","msgid":"<20230325121432.3203674-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-25T12:14:32","name":"[v2] RISCV: Bugfix for wrong code with v16hi compare & mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325121432.3203674-1-pan2.li@intel.com/mbox/"},{"id":74976,"url":"https://patchwork.plctlab.org/api/1.2/patches/74976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-51153ee0-1aaf-4766-b665-cb8ecfeca996-1679771616856@3c-app-gmx-bs65/","msgid":"","list_archive_url":null,"date":"2023-03-25T19:13:36","name":"[commited] Fortran: remove dead code [PR104321]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-51153ee0-1aaf-4766-b665-cb8ecfeca996-1679771616856@3c-app-gmx-bs65/mbox/"},{"id":75000,"url":"https://patchwork.plctlab.org/api/1.2/patches/75000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-2-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:23","name":"[01/10] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-2-kmatsui@cs.washington.edu/mbox/"},{"id":74999,"url":"https://patchwork.plctlab.org/api/1.2/patches/74999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-3-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:24","name":"[02/10] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-3-kmatsui@cs.washington.edu/mbox/"},{"id":75006,"url":"https://patchwork.plctlab.org/api/1.2/patches/75006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-4-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:25","name":"[03/10] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-4-kmatsui@cs.washington.edu/mbox/"},{"id":75004,"url":"https://patchwork.plctlab.org/api/1.2/patches/75004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-5-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:26","name":"[04/10] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-5-kmatsui@cs.washington.edu/mbox/"},{"id":75003,"url":"https://patchwork.plctlab.org/api/1.2/patches/75003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-6-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:27","name":"[05/10] libstdc++: use std::is_void instead of __is_void in helper_functions.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-6-kmatsui@cs.washington.edu/mbox/"},{"id":75001,"url":"https://patchwork.plctlab.org/api/1.2/patches/75001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-7-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:28","name":"[06/10] libstdc++: remove unused __is_void in cpp_type_traits.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-7-kmatsui@cs.washington.edu/mbox/"},{"id":75002,"url":"https://patchwork.plctlab.org/api/1.2/patches/75002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-8-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-8-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:29","name":"[07/10] c++: rename __is_void defined in pr46567.C to ____is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-8-kmatsui@cs.washington.edu/mbox/"},{"id":75007,"url":"https://patchwork.plctlab.org/api/1.2/patches/75007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-9-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-9-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:30","name":"[08/10] c++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-9-kmatsui@cs.washington.edu/mbox/"},{"id":75008,"url":"https://patchwork.plctlab.org/api/1.2/patches/75008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-10-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-10-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:31","name":"[09/10] libstdc++: use new built-in trait __is_void for std::is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-10-kmatsui@cs.washington.edu/mbox/"},{"id":75005,"url":"https://patchwork.plctlab.org/api/1.2/patches/75005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-11-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-11-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:32","name":"[10/10] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-11-kmatsui@cs.washington.edu/mbox/"},{"id":75024,"url":"https://patchwork.plctlab.org/api/1.2/patches/75024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326083458.1240538-1-jiawei@iscas.ac.cn/","msgid":"<20230326083458.1240538-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-26T08:34:58","name":"RISC-V: Add Z*inx incompatible check in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326083458.1240538-1-jiawei@iscas.ac.cn/mbox/"},{"id":75038,"url":"https://patchwork.plctlab.org/api/1.2/patches/75038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326102402.9D82C33E4B@hamza.pair.com/","msgid":"<20230326102402.9D82C33E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-26T10:24:00","name":"[pushed] doc: Remove anachronistic note related to languages built","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326102402.9D82C33E4B@hamza.pair.com/mbox/"},{"id":75049,"url":"https://patchwork.plctlab.org/api/1.2/patches/75049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b597b853-7ea6-504b-7609-49c8aa98932f@irvise.xyz/","msgid":"","list_archive_url":null,"date":"2023-03-26T12:58:26","name":"[wwwdocs] Add Ada'\''s GCC13 changelog entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b597b853-7ea6-504b-7609-49c8aa98932f@irvise.xyz/mbox/"},{"id":75134,"url":"https://patchwork.plctlab.org/api/1.2/patches/75134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326165447.43628-1-iain@sandoe.co.uk/","msgid":"<20230326165447.43628-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-03-26T16:54:47","name":"c++, coroutines: Stabilize names of promoted slot vars [PR101118].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326165447.43628-1-iain@sandoe.co.uk/mbox/"},{"id":75151,"url":"https://patchwork.plctlab.org/api/1.2/patches/75151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs9rs0zo.fsf@igel.home/","msgid":"<87fs9rs0zo.fsf@igel.home>","list_archive_url":null,"date":"2023-03-26T20:37:15","name":"m68k: handle TLS access with offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs9rs0zo.fsf@igel.home/mbox/"},{"id":75223,"url":"https://patchwork.plctlab.org/api/1.2/patches/75223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e57a8f3f-e356-7153-cfdf-80d179a0b651@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-27T06:16:16","name":"[rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e57a8f3f-e356-7153-cfdf-80d179a0b651@linux.ibm.com/mbox/"},{"id":75233,"url":"https://patchwork.plctlab.org/api/1.2/patches/75233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327065907.155807-1-juzhe.zhong@rivai.ai/","msgid":"<20230327065907.155807-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-27T06:59:07","name":"RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327065907.155807-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75235,"url":"https://patchwork.plctlab.org/api/1.2/patches/75235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327074654.1126912-1-philipp.tomsich@vrull.eu/","msgid":"<20230327074654.1126912-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-03-27T07:46:54","name":"aarch64: update ampere1 vectorization cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327074654.1126912-1-philipp.tomsich@vrull.eu/mbox/"},{"id":75249,"url":"https://patchwork.plctlab.org/api/1.2/patches/75249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2c55ed6-ac51-013f-69ef-1917eed7d430@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-27T08:04:15","name":"[(pushed)] fix: pytest error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2c55ed6-ac51-013f-69ef-1917eed7d430@suse.cz/mbox/"},{"id":75250,"url":"https://patchwork.plctlab.org/api/1.2/patches/75250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com/","msgid":"<61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-27T08:09:39","name":"rs6000: Fix predicate for const vector in sldoi_to_mov [PR109069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com/mbox/"},{"id":75264,"url":"https://patchwork.plctlab.org/api/1.2/patches/75264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCFVYctz4vCATyxc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-27T08:35:45","name":"libstdc++: Fix up experimental/net/timer/waitable/dest.cc testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCFVYctz4vCATyxc@tucnak/mbox/"},{"id":75310,"url":"https://patchwork.plctlab.org/api/1.2/patches/75310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327085252.3390790-1-xionghuluo@tencent.com/","msgid":"<20230327085252.3390790-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-27T08:52:52","name":"[RFC] ipa-visibility: Fix ICE in lto-partition caused by incorrect comdat group solving in ipa-visibility","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327085252.3390790-1-xionghuluo@tencent.com/mbox/"},{"id":75339,"url":"https://patchwork.plctlab.org/api/1.2/patches/75339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327103707.1253143-1-chenyixuan@iscas.ac.cn/","msgid":"<20230327103707.1253143-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-27T10:37:07","name":"Changed vector size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327103707.1253143-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":75342,"url":"https://patchwork.plctlab.org/api/1.2/patches/75342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327110422.3353876-1-christoph.muellner@vrull.eu/","msgid":"<20230327110422.3353876-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-27T11:04:22","name":"target/109296 - riscv: Add missing mode specifiers for XTheadMemPair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327110422.3353876-1-christoph.muellner@vrull.eu/mbox/"},{"id":75349,"url":"https://patchwork.plctlab.org/api/1.2/patches/75349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfiqvtn.fsf@euler.schwinge.homeip.net/","msgid":"<878rfiqvtn.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-27T11:26:28","name":"[og12] libgomp: Document OpenMP '\''pinned'\'' memory (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfiqvtn.fsf@euler.schwinge.homeip.net/mbox/"},{"id":75386,"url":"https://patchwork.plctlab.org/api/1.2/patches/75386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327122349.4136E13482@imap2.suse-dmz.suse.de/","msgid":"<20230327122349.4136E13482@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-27T12:23:48","name":"tree-optimization/108357 - add testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327122349.4136E13482@imap2.suse-dmz.suse.de/mbox/"},{"id":75389,"url":"https://patchwork.plctlab.org/api/1.2/patches/75389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327123159.5B75713482@imap2.suse-dmz.suse.de/","msgid":"<20230327123159.5B75713482@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-27T12:31:58","name":"tree-optimization/54498 - testcase for the bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327123159.5B75713482@imap2.suse-dmz.suse.de/mbox/"},{"id":75405,"url":"https://patchwork.plctlab.org/api/1.2/patches/75405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327125049.967747-1-jwakely@redhat.com/","msgid":"<20230327125049.967747-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-27T12:50:49","name":"[committed] gcov: Fix \"subcomand\" typos [PR109297]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327125049.967747-1-jwakely@redhat.com/mbox/"},{"id":75540,"url":"https://patchwork.plctlab.org/api/1.2/patches/75540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327160157.4111747-1-kevinl@rivosinc.com/","msgid":"<20230327160157.4111747-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-03-27T16:01:57","name":"[v2,RFC] vect: Verify that GET_MODE_NUNITS is greater than one for vect_grouped_store_supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327160157.4111747-1-kevinl@rivosinc.com/mbox/"},{"id":75597,"url":"https://patchwork.plctlab.org/api/1.2/patches/75597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327175908.424052-1-xry111@xry111.site/","msgid":"<20230327175908.424052-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-27T17:59:08","name":"fixincludes: Declare memmem if it'\''s not declared in system headers [PR109293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327175908.424052-1-xry111@xry111.site/mbox/"},{"id":75622,"url":"https://patchwork.plctlab.org/api/1.2/patches/75622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327185430.3217374-1-julian@codesourcery.com/","msgid":"<20230327185430.3217374-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-27T18:54:30","name":"[og12] OpenMP: Constructors and destructors for \"declare target\" static aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327185430.3217374-1-julian@codesourcery.com/mbox/"},{"id":75697,"url":"https://patchwork.plctlab.org/api/1.2/patches/75697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAG0zEH+0J741JS9PGKTJbucuijprZGhCFt9yJnuZd5aHk7SeBw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-27T21:23:51","name":"libstdc++/complex: Remove implicit type casts in complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAG0zEH+0J741JS9PGKTJbucuijprZGhCFt9yJnuZd5aHk7SeBw@mail.gmail.com/mbox/"},{"id":75748,"url":"https://patchwork.plctlab.org/api/1.2/patches/75748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010010.235224-1-juzhe.zhong@rivai.ai/","msgid":"<20230328010010.235224-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T01:00:10","name":"RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010010.235224-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75749,"url":"https://patchwork.plctlab.org/api/1.2/patches/75749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010124.235703-1-juzhe.zhong@rivai.ai/","msgid":"<20230328010124.235703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T01:01:24","name":"[GCC14,QUEUE] RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010124.235703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75752,"url":"https://patchwork.plctlab.org/api/1.2/patches/75752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012606.64C8020427@pchp3.se.axis.com/","msgid":"<20230328012606.64C8020427@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:26:06","name":"[committed] CRIS: Remove unused constraint \"R\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012606.64C8020427@pchp3.se.axis.com/mbox/"},{"id":75756,"url":"https://patchwork.plctlab.org/api/1.2/patches/75756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012939.49ECF20417@pchp3.se.axis.com/","msgid":"<20230328012939.49ECF20417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:29:39","name":"[committed] CRIS: Improve bailing for eliminable compares for \"addi\" vs. \"add\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012939.49ECF20417@pchp3.se.axis.com/mbox/"},{"id":75757,"url":"https://patchwork.plctlab.org/api/1.2/patches/75757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013037.3EFE020417@pchp3.se.axis.com/","msgid":"<20230328013037.3EFE020417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:30:37","name":"[committed] CRIS: Add peephole2 to handle gcc.target/cris/rld-legit1.c for LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013037.3EFE020417@pchp3.se.axis.com/mbox/"},{"id":75758,"url":"https://patchwork.plctlab.org/api/1.2/patches/75758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013200.52DA220417@pchp3.se.axis.com/","msgid":"<20230328013200.52DA220417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:32:00","name":"[committed] CRIS: Correct \"T\" to define_memory_constraint, not define_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013200.52DA220417@pchp3.se.axis.com/mbox/"},{"id":75799,"url":"https://patchwork.plctlab.org/api/1.2/patches/75799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCJc253L29AUFGaN@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-28T03:19:55","name":"[V3] PR target/105325, Make load/cmp fusion know about prefixed loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCJc253L29AUFGaN@toto.the-meissners.org/mbox/"},{"id":75842,"url":"https://patchwork.plctlab.org/api/1.2/patches/75842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328062120.A450C3858C53@sourceware.org/","msgid":"<20230328062120.A450C3858C53@sourceware.org>","list_archive_url":null,"date":"2023-03-28T06:20:36","name":"ipa/106124 - ICE with -fkeep-inline-functions and OpenMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328062120.A450C3858C53@sourceware.org/mbox/"},{"id":75871,"url":"https://patchwork.plctlab.org/api/1.2/patches/75871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7081af4-d062-7da4-a342-0bd71da523e6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T07:45:47","name":"[PATCHv2,rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7081af4-d062-7da4-a342-0bd71da523e6@linux.ibm.com/mbox/"},{"id":75877,"url":"https://patchwork.plctlab.org/api/1.2/patches/75877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKdJtsc0vDzPq12@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T07:54:14","name":"range-op-float: Use get_nan_state in float_widen_lhs_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKdJtsc0vDzPq12@tucnak/mbox/"},{"id":75887,"url":"https://patchwork.plctlab.org/api/1.2/patches/75887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKfkrUlk++IRAvn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:04:34","name":"sanopt: Return TODO_cleanup_cfg if any .{UB,HWA,A}SAN_* calls were lowered [PR106190]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKfkrUlk++IRAvn@tucnak/mbox/"},{"id":75888,"url":"https://patchwork.plctlab.org/api/1.2/patches/75888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328080657.773873858296@sourceware.org/","msgid":"<20230328080657.773873858296@sourceware.org>","list_archive_url":null,"date":"2023-03-28T08:06:12","name":"tree-optimization/109304 - properly handle instrumented aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328080657.773873858296@sourceware.org/mbox/"},{"id":75889,"url":"https://patchwork.plctlab.org/api/1.2/patches/75889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKhCVg2wXr2k/fu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:10:49","name":"i386: Require just 32-bit alignment for SLOT_FLOATxFDI_387 -m32 -mpreferred-stack-boundary=2 DImode temporaries [PR109276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKhCVg2wXr2k/fu@tucnak/mbox/"},{"id":75891,"url":"https://patchwork.plctlab.org/api/1.2/patches/75891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKiZDm40JqnmjZi@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:16:36","name":"[RFC] range-op-float: Only flush_denormals_to_zero for +-*/ [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKiZDm40JqnmjZi@tucnak/mbox/"},{"id":75892,"url":"https://patchwork.plctlab.org/api/1.2/patches/75892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKkbo4zAg36w3wI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:25:18","name":"match.pd: Fix up sqrt (sqrt (x)) simplification [PR109301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKkbo4zAg36w3wI@tucnak/mbox/"},{"id":75904,"url":"https://patchwork.plctlab.org/api/1.2/patches/75904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0t9uv59.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:39:46","name":"[COMMITTED] testsuite: Fix weak_undefined handling on Darwin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0t9uv59.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":75909,"url":"https://patchwork.plctlab.org/api/1.2/patches/75909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8198261.T7Z3S40VBb@fomalhaut/","msgid":"<8198261.T7Z3S40VBb@fomalhaut>","list_archive_url":null,"date":"2023-03-28T08:48:43","name":"[SPARC] Fix PR target/109140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8198261.T7Z3S40VBb@fomalhaut/mbox/"},{"id":75937,"url":"https://patchwork.plctlab.org/api/1.2/patches/75937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK2yWURbV7ufT+p@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T09:43:37","name":"[committed] openmp: Fix typo in diagnostics [PR109314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK2yWURbV7ufT+p@tucnak/mbox/"},{"id":75942,"url":"https://patchwork.plctlab.org/api/1.2/patches/75942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK5vnMKxCV6UIXw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T09:56:14","name":"[committed] gcov-tool: Use subcommand rather than sub-command in function comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK5vnMKxCV6UIXw@tucnak/mbox/"},{"id":75955,"url":"https://patchwork.plctlab.org/api/1.2/patches/75955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK8eTKhp3GZY0UC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T10:07:53","name":"tree-ssa-math-opts: Move PROP_gimple_opt_math from sincos pass to powcabs [PR109301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK8eTKhp3GZY0UC@tucnak/mbox/"},{"id":75977,"url":"https://patchwork.plctlab.org/api/1.2/patches/75977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5441527.e9J7NaK4W3@minbar/","msgid":"<5441527.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-03-28T10:40:51","name":"libstdc++: Add missing trait is_simd_flag_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5441527.e9J7NaK4W3@minbar/mbox/"},{"id":75979,"url":"https://patchwork.plctlab.org/api/1.2/patches/75979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12813636.nUPlyArG6x@minbar/","msgid":"<12813636.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-03-28T10:42:40","name":"[committed] libstdc++: Fix operator% implementation for Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12813636.nUPlyArG6x@minbar/mbox/"},{"id":76007,"url":"https://patchwork.plctlab.org/api/1.2/patches/76007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113123.C77EE3857C5A@sourceware.org/","msgid":"<20230328113123.C77EE3857C5A@sourceware.org>","list_archive_url":null,"date":"2023-03-28T11:30:38","name":"bootstrap/84402 - improve (match ...) code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113123.C77EE3857C5A@sourceware.org/mbox/"},{"id":76009,"url":"https://patchwork.plctlab.org/api/1.2/patches/76009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-2-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-2-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:28","name":"[1/3] c++: Track lifetimes in constant evaluation [PR70331, PR96630, PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-2-nathanieloshead@gmail.com/mbox/"},{"id":76010,"url":"https://patchwork.plctlab.org/api/1.2/patches/76010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-3-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-3-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:29","name":"[2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-3-nathanieloshead@gmail.com/mbox/"},{"id":76008,"url":"https://patchwork.plctlab.org/api/1.2/patches/76008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-4-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-4-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:30","name":"[3/3] c++: Improve location information in constexpr evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-4-nathanieloshead@gmail.com/mbox/"},{"id":76011,"url":"https://patchwork.plctlab.org/api/1.2/patches/76011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jq5w1io.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T11:36:47","name":"[committed] aarch64: Restore vectorisation of vld1 inputs [PR109072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jq5w1io.fsf@arm.com/mbox/"},{"id":76028,"url":"https://patchwork.plctlab.org/api/1.2/patches/76028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328122128.333431-1-juzhe.zhong@rivai.ai/","msgid":"<20230328122128.333431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T12:21:28","name":"RISC-V: Fix ICE of ternary intrinsics and scalar move in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328122128.333431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76055,"url":"https://patchwork.plctlab.org/api/1.2/patches/76055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328124419.6EDD5385840E@sourceware.org/","msgid":"<20230328124419.6EDD5385840E@sourceware.org>","list_archive_url":null,"date":"2023-03-28T12:43:34","name":"tree-optimization/107087 - missed CCP after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328124419.6EDD5385840E@sourceware.org/mbox/"},{"id":76069,"url":"https://patchwork.plctlab.org/api/1.2/patches/76069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328131110.7780-1-amonakov@ispras.ru/","msgid":"<20230328131110.7780-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-03-28T13:11:10","name":"haifa-sched: fix autopref_rank_for_schedule comparator [PR109187]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328131110.7780-1-amonakov@ispras.ru/mbox/"},{"id":76074,"url":"https://patchwork.plctlab.org/api/1.2/patches/76074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c301a8d5-1331-1731-594c-d89eca395ceb@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T13:19:33","name":"PR tree-optimization/109274 -Fix compute_operand when op1 == op2 symbolically.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c301a8d5-1331-1731-594c-d89eca395ceb@redhat.com/mbox/"},{"id":76076,"url":"https://patchwork.plctlab.org/api/1.2/patches/76076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt3xui33.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-03-28T13:21:52","name":"build: Check that -lzstd can be linked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt3xui33.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":76105,"url":"https://patchwork.plctlab.org/api/1.2/patches/76105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142302.3824535-1-jiawei@iscas.ac.cn/","msgid":"<20230328142302.3824535-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-28T14:23:02","name":"[v2] RISC-V: Add Z*inx imcompatible check in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142302.3824535-1-jiawei@iscas.ac.cn/mbox/"},{"id":76107,"url":"https://patchwork.plctlab.org/api/1.2/patches/76107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142657.53724-1-kito.cheng@sifive.com/","msgid":"<20230328142657.53724-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-03-28T14:26:57","name":"RISC-V: Define __riscv_v_intrinsic [PR109312]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142657.53724-1-kito.cheng@sifive.com/mbox/"},{"id":76157,"url":"https://patchwork.plctlab.org/api/1.2/patches/76157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCMLY6Br6tqr8L9P@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T15:44:35","name":"c++: Allow translations of check_postcondition_result messages [PR109309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCMLY6Br6tqr8L9P@tucnak/mbox/"},{"id":76169,"url":"https://patchwork.plctlab.org/api/1.2/patches/76169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-2-qing.zhao@oracle.com/","msgid":"<20230328154944.3946619-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-28T15:49:43","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-2-qing.zhao@oracle.com/mbox/"},{"id":76162,"url":"https://patchwork.plctlab.org/api/1.2/patches/76162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-3-qing.zhao@oracle.com/","msgid":"<20230328154944.3946619-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-28T15:49:44","name":"[2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-3-qing.zhao@oracle.com/mbox/"},{"id":76164,"url":"https://patchwork.plctlab.org/api/1.2/patches/76164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328155057.1187204-1-jwakely@redhat.com/","msgid":"<20230328155057.1187204-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T15:50:57","name":"c++: Make diagnostic translatable [PR109309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328155057.1187204-1-jwakely@redhat.com/mbox/"},{"id":76205,"url":"https://patchwork.plctlab.org/api/1.2/patches/76205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a22c34d6-07c5-80a5-f6d5-8aa49869a03d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T16:49:27","name":"[v2] rtl-optimization: ppc backend generates unnecessary extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a22c34d6-07c5-80a5-f6d5-8aa49869a03d@linux.ibm.com/mbox/"},{"id":76213,"url":"https://patchwork.plctlab.org/api/1.2/patches/76213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328165515.2300685-1-jiawei@iscas.ac.cn/","msgid":"<20230328165515.2300685-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-28T16:55:15","name":"[v3] RISC-V: Add Z*inx imcompatible check in gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328165515.2300685-1-jiawei@iscas.ac.cn/mbox/"},{"id":76221,"url":"https://patchwork.plctlab.org/api/1.2/patches/76221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328173732.1722425-1-ppalka@redhat.com/","msgid":"<20230328173732.1722425-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-28T17:37:32","name":"c++: ICE on loopy var tmpl auto deduction [PR109300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328173732.1722425-1-ppalka@redhat.com/mbox/"},{"id":76225,"url":"https://patchwork.plctlab.org/api/1.2/patches/76225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328180139.74395-1-xry111@xry111.site/","msgid":"<20230328180139.74395-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-28T18:01:39","name":"LoongArch: Improve GAR store for va_list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328180139.74395-1-xry111@xry111.site/mbox/"},{"id":76226,"url":"https://patchwork.plctlab.org/api/1.2/patches/76226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328183728.168042-1-dmalcolm@redhat.com/","msgid":"<20230328183728.168042-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-28T18:37:28","name":"[pushed] Don'\''t emit -Wxor-used-as-pow on macro expansions [PR107002]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328183728.168042-1-dmalcolm@redhat.com/mbox/"},{"id":76242,"url":"https://patchwork.plctlab.org/api/1.2/patches/76242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU1TRyicyScHU2b-0r2Us4hce9xO0oP6wK0-xnOE7OUDg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T20:09:42","name":"libbacktrace patch committed: Tweaks to zstd decompression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU1TRyicyScHU2b-0r2Us4hce9xO0oP6wK0-xnOE7OUDg@mail.gmail.com/mbox/"},{"id":76243,"url":"https://patchwork.plctlab.org/api/1.2/patches/76243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201450.1201780-1-jwakely@redhat.com/","msgid":"<20230328201450.1201780-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:14:50","name":"[committed] libstdc++: Update tzdata to 2023a [PR109288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201450.1201780-1-jwakely@redhat.com/mbox/"},{"id":76253,"url":"https://patchwork.plctlab.org/api/1.2/patches/76253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201455.1202542-1-jwakely@redhat.com/","msgid":"<20230328201455.1202542-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:14:55","name":"[committed] libstdc++: Tell GCC what basic_string::_M_is_local() means [PR109299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201455.1202542-1-jwakely@redhat.com/mbox/"},{"id":76248,"url":"https://patchwork.plctlab.org/api/1.2/patches/76248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201501.1202700-1-jwakely@redhat.com/","msgid":"<20230328201501.1202700-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:15:01","name":"[committed] libstdc++: More fixes for null pointers used with std::char_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201501.1202700-1-jwakely@redhat.com/mbox/"},{"id":76263,"url":"https://patchwork.plctlab.org/api/1.2/patches/76263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm8s8u1x.fsf@euler.schwinge.homeip.net/","msgid":"<87pm8s8u1x.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-28T21:06:34","name":"Enable '\''gfortran.dg/weak-2.f90'\'' for nvptx target (was: Support for WEAK attribute, part 2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm8s8u1x.fsf@euler.schwinge.homeip.net/mbox/"},{"id":76301,"url":"https://patchwork.plctlab.org/api/1.2/patches/76301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328231903.1214366-1-jwakely@redhat.com/","msgid":"<20230328231903.1214366-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T23:19:03","name":"[committed] libstdc++: Do not use facets cached in ios for ATL128 build [PR103387]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328231903.1214366-1-jwakely@redhat.com/mbox/"},{"id":76324,"url":"https://patchwork.plctlab.org/api/1.2/patches/76324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcX1MNR1Y9KdOvBd5AJLbNO8uE-ksW6jbPKVMq5wze6L_Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T00:31:38","name":"Go patch committed: Mark Call_expression multi-results as result struct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcX1MNR1Y9KdOvBd5AJLbNO8uE-ksW6jbPKVMq5wze6L_Q@mail.gmail.com/mbox/"},{"id":76340,"url":"https://patchwork.plctlab.org/api/1.2/patches/76340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329022327.99330-1-jason@redhat.com/","msgid":"<20230329022327.99330-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-29T02:23:27","name":"[pushed] c++: alias ctad refinements [PR109321]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329022327.99330-1-jason@redhat.com/mbox/"},{"id":76343,"url":"https://patchwork.plctlab.org/api/1.2/patches/76343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-2-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-2-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:56","name":"[v2,1/3] c++: Track lifetimes in constant evaluation [PR70331, PR96630, PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-2-nathanieloshead@gmail.com/mbox/"},{"id":76342,"url":"https://patchwork.plctlab.org/api/1.2/patches/76342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-3-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-3-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:57","name":"[v2,2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-3-nathanieloshead@gmail.com/mbox/"},{"id":76344,"url":"https://patchwork.plctlab.org/api/1.2/patches/76344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-4-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-4-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:58","name":"[v2,3/3] c++: Improve location information in constexpr evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-4-nathanieloshead@gmail.com/mbox/"},{"id":76345,"url":"https://patchwork.plctlab.org/api/1.2/patches/76345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024259.174803-1-juzhe.zhong@rivai.ai/","msgid":"<20230329024259.174803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-29T02:42:59","name":"RISC-V: Fix ICE && codegen error of scalar move in RV32 system.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024259.174803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76346,"url":"https://patchwork.plctlab.org/api/1.2/patches/76346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024727.201957-1-juzhe.zhong@rivai.ai/","msgid":"<20230329024727.201957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-29T02:47:26","name":"RISC-V: Fix reload fail issue on vector mac instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024727.201957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76383,"url":"https://patchwork.plctlab.org/api/1.2/patches/76383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329063352.5BE433857026@sourceware.org/","msgid":"<20230329063352.5BE433857026@sourceware.org>","list_archive_url":null,"date":"2023-03-29T06:33:07","name":"tree-optimization/109154 - improve if-conversion for vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329063352.5BE433857026@sourceware.org/mbox/"},{"id":76393,"url":"https://patchwork.plctlab.org/api/1.2/patches/76393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com/","msgid":"<2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-29T07:18:38","name":"[v2] sched: Change no_real_insns_p to no_real_nondebug_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com/mbox/"},{"id":76394,"url":"https://patchwork.plctlab.org/api/1.2/patches/76394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329072126.2297953-1-hongtao.liu@intel.com/","msgid":"<20230329072126.2297953-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-29T07:21:26","name":"Generate vpblendd instead of vpblendw for V4SI under AVX2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329072126.2297953-1-hongtao.liu@intel.com/mbox/"},{"id":76424,"url":"https://patchwork.plctlab.org/api/1.2/patches/76424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329075222.2888608-1-pan2.li@intel.com/","msgid":"<20230329075222.2888608-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-29T07:52:22","name":"[RISC-V] : Bugfix for RVV vbool*_t vn_reference_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329075222.2888608-1-pan2.li@intel.com/mbox/"},{"id":76443,"url":"https://patchwork.plctlab.org/api/1.2/patches/76443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329083527.02DF1385703F@sourceware.org/","msgid":"<20230329083527.02DF1385703F@sourceware.org>","list_archive_url":null,"date":"2023-03-29T08:34:38","name":"tree-optimization/109327 - forwprop stmt removal issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329083527.02DF1385703F@sourceware.org/mbox/"},{"id":76454,"url":"https://patchwork.plctlab.org/api/1.2/patches/76454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329084832.6FEFA3857C43@sourceware.org/","msgid":"<20230329084832.6FEFA3857C43@sourceware.org>","list_archive_url":null,"date":"2023-03-29T08:47:43","name":"scan generic vector tests before lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329084832.6FEFA3857C43@sourceware.org/mbox/"},{"id":76456,"url":"https://patchwork.plctlab.org/api/1.2/patches/76456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329085328.3066061-1-pan2.li@intel.com/","msgid":"<20230329085328.3066061-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-29T08:53:28","name":"[v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329085328.3066061-1-pan2.li@intel.com/mbox/"},{"id":76515,"url":"https://patchwork.plctlab.org/api/1.2/patches/76515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8021191-7ec1-8683-5a33-7cf91172cb42@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T10:50:26","name":"arm: Fix MVE vcreate definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8021191-7ec1-8683-5a33-7cf91172cb42@arm.com/mbox/"},{"id":76531,"url":"https://patchwork.plctlab.org/api/1.2/patches/76531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GF8Lw3PhgEDoCpE8Pu64yKun736N=uazhUVg=aP2EEb9Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T11:36:16","name":"[RFC] Fix for c++/PR12341","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GF8Lw3PhgEDoCpE8Pu64yKun736N=uazhUVg=aP2EEb9Q@mail.gmail.com/mbox/"},{"id":76537,"url":"https://patchwork.plctlab.org/api/1.2/patches/76537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329115635.6D3113858434@sourceware.org/","msgid":"<20230329115635.6D3113858434@sourceware.org>","list_archive_url":null,"date":"2023-03-29T11:55:50","name":"tree-optimization/109331 - make sure to clean up the CFG after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329115635.6D3113858434@sourceware.org/mbox/"},{"id":76555,"url":"https://patchwork.plctlab.org/api/1.2/patches/76555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329121233.B0266385B538@sourceware.org/","msgid":"<20230329121233.B0266385B538@sourceware.org>","list_archive_url":null,"date":"2023-03-29T12:11:47","name":"tree-optimization/107561 - reduce -Wstringop-overflow false positives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329121233.B0266385B538@sourceware.org/mbox/"},{"id":76564,"url":"https://patchwork.plctlab.org/api/1.2/patches/76564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e114ac92-17fe-a0c0-b68a-3585910b70e4@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-29T12:55:01","name":"configure: deprecate --enable-link-mutex option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e114ac92-17fe-a0c0-b68a-3585910b70e4@suse.cz/mbox/"},{"id":76579,"url":"https://patchwork.plctlab.org/api/1.2/patches/76579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329134210.19370-1-shiyulong@iscas.ac.cn/","msgid":"<20230329134210.19370-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-29T13:42:10","name":"[V1] RISCV: Modified validation information for contracts-tmpl-spec2.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329134210.19370-1-shiyulong@iscas.ac.cn/mbox/"},{"id":76581,"url":"https://patchwork.plctlab.org/api/1.2/patches/76581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d34537-c54b-ebac-7c7d-89380cf9fe46@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T13:48:00","name":"[RFA,Bug,target/108892,13,regression] Force re-recognition after changing RTL structure of an insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d34537-c54b-ebac-7c7d-89380cf9fe46@ventanamicro.com/mbox/"},{"id":76724,"url":"https://patchwork.plctlab.org/api/1.2/patches/76724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com/","msgid":"<54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com>","list_archive_url":null,"date":"2023-03-29T17:22:27","name":"recomputation and PR 109154","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com/mbox/"},{"id":76792,"url":"https://patchwork.plctlab.org/api/1.2/patches/76792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7ob2usn.fsf@euler.schwinge.homeip.net/","msgid":"<87o7ob2usn.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-29T19:59:20","name":"'\''g++.dg/modules/modules.exp'\'': don'\''t leak local '\''unsupported'\'' proc [PR108899] (was: [PATCH] testsuite: Fix up modules.exp [PR108899])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7ob2usn.fsf@euler.schwinge.homeip.net/mbox/"},{"id":76828,"url":"https://patchwork.plctlab.org/api/1.2/patches/76828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329220802.1F70133E56@hamza.pair.com/","msgid":"<20230329220802.1F70133E56@hamza.pair.com>","list_archive_url":null,"date":"2023-03-29T22:07:59","name":"[pushed] wwwdocs: gcc-4.7: Adjust dwarfstd.org links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329220802.1F70133E56@hamza.pair.com/mbox/"},{"id":76846,"url":"https://patchwork.plctlab.org/api/1.2/patches/76846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329225727.2D86420433@pchp3.se.axis.com/","msgid":"<20230329225727.2D86420433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-29T22:57:27","name":"[committed] CRIS: Make rtx-cost 0 for many CONST_INT \"quick\" operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329225727.2D86420433@pchp3.se.axis.com/mbox/"},{"id":76854,"url":"https://patchwork.plctlab.org/api/1.2/patches/76854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233858.1405145-1-jwakely@redhat.com/","msgid":"<20230329233858.1405145-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:38:58","name":"[committed] libstdc++: Enforce requirements on template argument of std::optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233858.1405145-1-jwakely@redhat.com/mbox/"},{"id":76855,"url":"https://patchwork.plctlab.org/api/1.2/patches/76855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233904.1405179-1-jwakely@redhat.com/","msgid":"<20230329233904.1405179-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:39:04","name":"[committed] libstdc++: Use std::remove_cv_t in std::optional::transform [PR109340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233904.1405179-1-jwakely@redhat.com/mbox/"},{"id":76856,"url":"https://patchwork.plctlab.org/api/1.2/patches/76856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233914.1405196-1-jwakely@redhat.com/","msgid":"<20230329233914.1405196-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:39:14","name":"[committed] libstdc++: Apply small fix from LWG 3843 to std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233914.1405196-1-jwakely@redhat.com/mbox/"},{"id":76857,"url":"https://patchwork.plctlab.org/api/1.2/patches/76857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329234000.1405216-1-jwakely@redhat.com/","msgid":"<20230329234000.1405216-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:40:00","name":"[committed] libstdc++: Fix constexpr functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329234000.1405216-1-jwakely@redhat.com/mbox/"},{"id":76864,"url":"https://patchwork.plctlab.org/api/1.2/patches/76864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330012804.110539-1-juzhe.zhong@rivai.ai/","msgid":"<20230330012804.110539-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-30T01:28:04","name":"[GCC14,QUEUE] RISC-V: Optimize fault only first load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330012804.110539-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76867,"url":"https://patchwork.plctlab.org/api/1.2/patches/76867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330014456.1425596-1-hongtao.liu@intel.com/","msgid":"<20230330014456.1425596-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-30T01:44:56","name":"Support vector conversion for AVX512 vcvtudq2pd/vcvttps2udq/vcvttpd2udq.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330014456.1425596-1-hongtao.liu@intel.com/mbox/"},{"id":76878,"url":"https://patchwork.plctlab.org/api/1.2/patches/76878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330034753.3661606-1-apinski@marvell.com/","msgid":"<20230330034753.3661606-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-30T03:47:53","name":"Fix fc-prototypes usage with C_INT64_T and non LP64 Targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330034753.3661606-1-apinski@marvell.com/mbox/"},{"id":76934,"url":"https://patchwork.plctlab.org/api/1.2/patches/76934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCU+huPw218pdDqo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-30T07:47:18","name":"c++: Fix up ICE in build_min_non_dep_op_overload [PR109319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCU+huPw218pdDqo@tucnak/mbox/"},{"id":76936,"url":"https://patchwork.plctlab.org/api/1.2/patches/76936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCVCzOdvlQG2Lke7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-30T08:05:32","name":"testsuite, analyzer: Fix up pipe-glibc.c testcase [PR107396]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCVCzOdvlQG2Lke7@tucnak/mbox/"},{"id":77099,"url":"https://patchwork.plctlab.org/api/1.2/patches/77099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330110206.11FDD1348E@imap2.suse-dmz.suse.de/","msgid":"<20230330110206.11FDD1348E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-30T11:02:05","name":"tree-optimization/109342 - wrong code with edge equivalences in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330110206.11FDD1348E@imap2.suse-dmz.suse.de/mbox/"},{"id":77133,"url":"https://patchwork.plctlab.org/api/1.2/patches/77133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330114146.442606-1-hongtao.liu@intel.com/","msgid":"<20230330114146.442606-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-30T11:41:46","name":"[V2] Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns* to align with standard pattern name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330114146.442606-1-hongtao.liu@intel.com/mbox/"},{"id":77160,"url":"https://patchwork.plctlab.org/api/1.2/patches/77160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330121546.1454231-1-jwakely@redhat.com/","msgid":"<20230330121546.1454231-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-30T12:15:46","name":"c++tools: Fix Makefile to properly clean and rebuild [PR101834]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330121546.1454231-1-jwakely@redhat.com/mbox/"},{"id":77359,"url":"https://patchwork.plctlab.org/api/1.2/patches/77359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-2-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:05","name":"[v2,1/7] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-2-kmatsui@cs.washington.edu/mbox/"},{"id":77357,"url":"https://patchwork.plctlab.org/api/1.2/patches/77357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-3-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:06","name":"[v2,2/7] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-3-kmatsui@cs.washington.edu/mbox/"},{"id":77358,"url":"https://patchwork.plctlab.org/api/1.2/patches/77358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-4-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:07","name":"[v2,3/7] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-4-kmatsui@cs.washington.edu/mbox/"},{"id":77361,"url":"https://patchwork.plctlab.org/api/1.2/patches/77361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-5-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:08","name":"[v2,4/7] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-5-kmatsui@cs.washington.edu/mbox/"},{"id":77363,"url":"https://patchwork.plctlab.org/api/1.2/patches/77363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-6-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:09","name":"[v2,5/7] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-6-kmatsui@cs.washington.edu/mbox/"},{"id":77362,"url":"https://patchwork.plctlab.org/api/1.2/patches/77362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-7-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:10","name":"[v2,6/7] libstdc++: use new built-in trait __is_void for std::is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-7-kmatsui@cs.washington.edu/mbox/"},{"id":77364,"url":"https://patchwork.plctlab.org/api/1.2/patches/77364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-8-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-8-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:11","name":"[v2,7/7] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-8-kmatsui@cs.washington.edu/mbox/"},{"id":77427,"url":"https://patchwork.plctlab.org/api/1.2/patches/77427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222454.793588-1-jason@redhat.com/","msgid":"<20230330222454.793588-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-30T22:24:54","name":"[pushed] c++: anonymous union member reference [PR105452]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222454.793588-1-jason@redhat.com/mbox/"},{"id":77428,"url":"https://patchwork.plctlab.org/api/1.2/patches/77428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222552.793991-1-jason@redhat.com/","msgid":"<20230330222552.793991-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-30T22:25:52","name":"[pushed] c++: generic lambda and function ptr conv [PR105221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222552.793991-1-jason@redhat.com/mbox/"},{"id":77529,"url":"https://patchwork.plctlab.org/api/1.2/patches/77529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331051129.2691249-1-hongtao.liu@intel.com/","msgid":"<20230331051129.2691249-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-31T05:11:29","name":"Adjust memory_move_cost for MASK_REGS when MODE_SIZE > 8.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331051129.2691249-1-hongtao.liu@intel.com/mbox/"},{"id":77531,"url":"https://patchwork.plctlab.org/api/1.2/patches/77531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331054113.245429-1-juzhe.zhong@rivai.ai/","msgid":"<20230331054113.245429-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-31T05:41:13","name":"[GCC14,QUEUE] RISC-V: Support chunk = 128bit for '\''V'\'' Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331054113.245429-1-juzhe.zhong@rivai.ai/mbox/"},{"id":77558,"url":"https://patchwork.plctlab.org/api/1.2/patches/77558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331065810.4012545-1-hongtao.liu@intel.com/","msgid":"<20230331065810.4012545-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-31T06:58:10","name":"Document signbitm2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331065810.4012545-1-hongtao.liu@intel.com/mbox/"},{"id":77574,"url":"https://patchwork.plctlab.org/api/1.2/patches/77574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331072057.84974-1-kito.cheng@sifive.com/","msgid":"<20230331072057.84974-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-03-31T07:20:57","name":"[committed] RISC-V: Fix missing file dependency in RISC-V back-end [PR109328]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331072057.84974-1-kito.cheng@sifive.com/mbox/"},{"id":77706,"url":"https://patchwork.plctlab.org/api/1.2/patches/77706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaSgegwS47Tq+MJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T07:57:54","name":"range-op-float, value-range: Fix up handling of UN{LT,LE,GT,GE,EQ}_EXPR and handle comparisons in get_tree_range [PR91645]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaSgegwS47Tq+MJ@tucnak/mbox/"},{"id":77707,"url":"https://patchwork.plctlab.org/api/1.2/patches/77707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaW+lxMXIASrQJz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T08:16:59","name":"[RFC] Use ranger in the cdce pass [PR91645]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaW+lxMXIASrQJz@tucnak/mbox/"},{"id":77631,"url":"https://patchwork.plctlab.org/api/1.2/patches/77631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pm8p48cj.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-31T08:45:48","name":"ipa: Avoid constructing aggregate jump functions with huge offsets (PR 109303)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pm8p48cj.fsf@suse.cz/mbox/"},{"id":77719,"url":"https://patchwork.plctlab.org/api/1.2/patches/77719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa5thrjuM3EhXO8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T10:45:10","name":"range-op-float: Further comparison fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa5thrjuM3EhXO8@tucnak/mbox/"},{"id":77721,"url":"https://patchwork.plctlab.org/api/1.2/patches/77721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa8nVSkandaSH2N@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T10:57:33","name":"range-op-float: Further foperator_{,not_}equal::fold_range fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa8nVSkandaSH2N@tucnak/mbox/"},{"id":77801,"url":"https://patchwork.plctlab.org/api/1.2/patches/77801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331144909.29872-1-jwakely@redhat.com/","msgid":"<20230331144909.29872-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T14:49:09","name":"[committed] libstdc++: Revert addition of boolean flag to net::ip::basic_endpoint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331144909.29872-1-jwakely@redhat.com/mbox/"},{"id":77802,"url":"https://patchwork.plctlab.org/api/1.2/patches/77802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331145017.30025-1-jwakely@redhat.com/","msgid":"<20230331145017.30025-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T14:50:17","name":"[committed] libstdc++: Avoid -Wmaybe-uninitialized warning in std::stop_source [PR109339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331145017.30025-1-jwakely@redhat.com/mbox/"},{"id":77812,"url":"https://patchwork.plctlab.org/api/1.2/patches/77812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com/","msgid":"<006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com>","list_archive_url":null,"date":"2023-03-31T15:06:41","name":"[pushed,PR109052] LRA: Implement commutative operands exchange for combining secondary memory reload and original insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-03/mbox/"},{"id":19,"url":"https://patchwork.plctlab.org/api/1.2/bundles/19/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-04/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-04","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":77949,"url":"https://patchwork.plctlab.org/api/1.2/patches/77949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331185041.8F5FC33E63@hamza.pair.com/","msgid":"<20230331185041.8F5FC33E63@hamza.pair.com>","list_archive_url":null,"date":"2023-03-31T18:50:33","name":"[pushed] libiberty: Remove a reference to the Glibc manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331185041.8F5FC33E63@hamza.pair.com/mbox/"},{"id":78025,"url":"https://patchwork.plctlab.org/api/1.2/patches/78025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331224541.102599-1-jwakely@redhat.com/","msgid":"<20230331224541.102599-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T22:45:41","name":"[committed] libstdc++: Teach optimizer that empty COW strings are empty [PR107087]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331224541.102599-1-jwakely@redhat.com/mbox/"},{"id":78062,"url":"https://patchwork.plctlab.org/api/1.2/patches/78062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCfXdZvpU0rv6Ezk@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-01T07:04:21","name":"[committed] testsuite: Add testcase for already fixed PR [PR109362]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCfXdZvpU0rv6Ezk@tucnak/mbox/"},{"id":78188,"url":"https://patchwork.plctlab.org/api/1.2/patches/78188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-2-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:09","name":"[v3,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-2-kmatsui@cs.washington.edu/mbox/"},{"id":78187,"url":"https://patchwork.plctlab.org/api/1.2/patches/78187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-3-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:10","name":"[v3,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-3-kmatsui@cs.washington.edu/mbox/"},{"id":78186,"url":"https://patchwork.plctlab.org/api/1.2/patches/78186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-4-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:11","name":"[v3,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-4-kmatsui@cs.washington.edu/mbox/"},{"id":78190,"url":"https://patchwork.plctlab.org/api/1.2/patches/78190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-5-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:12","name":"[v3,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-5-kmatsui@cs.washington.edu/mbox/"},{"id":78189,"url":"https://patchwork.plctlab.org/api/1.2/patches/78189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-6-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:13","name":"[v3,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-6-kmatsui@cs.washington.edu/mbox/"},{"id":78191,"url":"https://patchwork.plctlab.org/api/1.2/patches/78191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-7-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:14","name":"[v3,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-7-kmatsui@cs.washington.edu/mbox/"},{"id":78244,"url":"https://patchwork.plctlab.org/api/1.2/patches/78244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402140044.23073-1-xry111@xry111.site/","msgid":"<20230402140044.23073-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-02T14:00:44","name":"[GCC14] LoongArch: Optimize additions with immediates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402140044.23073-1-xry111@xry111.site/mbox/"},{"id":78256,"url":"https://patchwork.plctlab.org/api/1.2/patches/78256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-2-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:13","name":"[1/3] go: Fix memory leak in Integer_expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-2-rep.dot.nop@gmail.com/mbox/"},{"id":78257,"url":"https://patchwork.plctlab.org/api/1.2/patches/78257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-3-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-3-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:14","name":"[2/3] rust: Fix memory leak in compile_{integer,float}_literal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-3-rep.dot.nop@gmail.com/mbox/"},{"id":78255,"url":"https://patchwork.plctlab.org/api/1.2/patches/78255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-4-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-4-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:15","name":"[3/3] Fortran: Fix mpz and mpfr memory leaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-4-rep.dot.nop@gmail.com/mbox/"},{"id":78306,"url":"https://patchwork.plctlab.org/api/1.2/patches/78306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402213345.632989-1-sam@gentoo.org/","msgid":"<20230402213345.632989-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-02T21:33:45","name":"[v5] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402213345.632989-1-sam@gentoo.org/mbox/"},{"id":78313,"url":"https://patchwork.plctlab.org/api/1.2/patches/78313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403003855.113601-1-juzhe.zhong@rivai.ai/","msgid":"<20230403003855.113601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-03T00:38:55","name":"RISC-V: Fix SEW64 of vrsub.vx runtime fail in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403003855.113601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":78319,"url":"https://patchwork.plctlab.org/api/1.2/patches/78319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403011939.10677-1-xuli1@eswincomputing.com/","msgid":"<20230403011939.10677-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-04-03T01:19:39","name":"RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403011939.10677-1-xuli1@eswincomputing.com/mbox/"},{"id":78400,"url":"https://patchwork.plctlab.org/api/1.2/patches/78400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz/","msgid":"<7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:04:51","name":"[(pushed)] param: document ranger-recompute-depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz/mbox/"},{"id":78413,"url":"https://patchwork.plctlab.org/api/1.2/patches/78413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz/","msgid":"<94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:46:58","name":"driver: drop flag_var_tracking_assignments flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz/mbox/"},{"id":78415,"url":"https://patchwork.plctlab.org/api/1.2/patches/78415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-2-haochen.jiang@intel.com/","msgid":"<20230403084923.2904086-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-03T08:49:22","name":"[1/2] Support Intel AMX-COMPLEX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-2-haochen.jiang@intel.com/mbox/"},{"id":78414,"url":"https://patchwork.plctlab.org/api/1.2/patches/78414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-3-haochen.jiang@intel.com/","msgid":"<20230403084923.2904086-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-03T08:49:23","name":"[2/2] i386: Add AMX-COMPLEX to Granite Rapids","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-3-haochen.jiang@intel.com/mbox/"},{"id":78416,"url":"https://patchwork.plctlab.org/api/1.2/patches/78416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz/","msgid":"<7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:54:23","name":"[stage1] gcov: respect -fprofile-prefix-map when it comes to output of .gcda file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz/mbox/"},{"id":78418,"url":"https://patchwork.plctlab.org/api/1.2/patches/78418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz/","msgid":"<200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz>","list_archive_url":null,"date":"2023-04-03T09:02:28","name":"ipa: propagate attributes for target attribute clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz/mbox/"},{"id":78562,"url":"https://patchwork.plctlab.org/api/1.2/patches/78562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4lxc5z.fsf@euler.schwinge.homeip.net/","msgid":"<87cz4lxc5z.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-03T14:39:36","name":"[og12] OpenACC: Pass pre-allocated '\''ptrblock'\'' to '\''goacc_noncontig_array_create_ptrblock'\'' [PR76739] (was: [PATCH, OpenACC, v3] Non-contiguous array support for OpenACC data clauses)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4lxc5z.fsf@euler.schwinge.homeip.net/mbox/"},{"id":78565,"url":"https://patchwork.plctlab.org/api/1.2/patches/78565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403144932.747134-1-ppalka@redhat.com/","msgid":"<20230403144932.747134-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-03T14:49:32","name":"c++: satisfaction and ARGUMENT_PACK_SELECT [PR105644]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403144932.747134-1-ppalka@redhat.com/mbox/"},{"id":78568,"url":"https://patchwork.plctlab.org/api/1.2/patches/78568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rf9xbd0.fsf@euler.schwinge.homeip.net/","msgid":"<878rf9xbd0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-03T14:56:59","name":"[og12] '\''-foffload-memory=pinned'\'' using offloading device interfaces (was: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rf9xbd0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":78699,"url":"https://patchwork.plctlab.org/api/1.2/patches/78699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d65cacfb9cbc7bf1a94791bf7213169b77ec213e.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:34:11","name":"Less warnings for parameters declared as arrays [PR98541, PR98536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d65cacfb9cbc7bf1a94791bf7213169b77ec213e.camel@tugraz.at/mbox/"},{"id":78702,"url":"https://patchwork.plctlab.org/api/1.2/patches/78702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ae251df8-8c79-4a58-bf78-ffb1daa7cdfe-1680551148829@3c-app-gmx-bs28/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:45:48","name":"Fortran: reject module variable as character length in PARAMETER [PR104349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ae251df8-8c79-4a58-bf78-ffb1daa7cdfe-1680551148829@3c-app-gmx-bs28/mbox/"},{"id":78704,"url":"https://patchwork.plctlab.org/api/1.2/patches/78704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCsu1qEUuowRqlWf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:53:58","name":"range-op-float: Fix reverse ops of comparisons [PR109386]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCsu1qEUuowRqlWf@tucnak/mbox/"},{"id":78836,"url":"https://patchwork.plctlab.org/api/1.2/patches/78836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404032248.2722677-1-jason@redhat.com/","msgid":"<20230404032248.2722677-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-04T03:22:48","name":"[pushed] c++: friend template matching [PR107484]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404032248.2722677-1-jason@redhat.com/mbox/"},{"id":78850,"url":"https://patchwork.plctlab.org/api/1.2/patches/78850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404051346.1223071-1-hongtao.liu@intel.com/","msgid":"<20230404051346.1223071-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-04T05:13:46","name":"Check hard_regno_mode_ok before setting lowest memory move cost for the mode with different reg classes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404051346.1223071-1-hongtao.liu@intel.com/mbox/"},{"id":78851,"url":"https://patchwork.plctlab.org/api/1.2/patches/78851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/caeae307-9630-68c3-6639-93f14394d9d8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T05:22:22","name":"testsuite: Adjust powerpc test case pr83677.c for BE [PR108815]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/caeae307-9630-68c3-6639-93f14394d9d8@linux.ibm.com/mbox/"},{"id":78894,"url":"https://patchwork.plctlab.org/api/1.2/patches/78894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404074903.4275-1-xuli1@eswincomputing.com/","msgid":"<20230404074903.4275-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-04-04T07:49:03","name":"RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404074903.4275-1-xuli1@eswincomputing.com/mbox/"},{"id":78914,"url":"https://patchwork.plctlab.org/api/1.2/patches/78914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd7cus12b4.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-04-04T08:25:51","name":"[COMMITTED] config: -pthread shouldn'\''t link with -lpthread on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd7cus12b4.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":78926,"url":"https://patchwork.plctlab.org/api/1.2/patches/78926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404083836.9153-1-xry111@xry111.site/","msgid":"<20230404083836.9153-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-04T08:38:36","name":"[GCC14,v2] LoongArch: Optimize additions with immediates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404083836.9153-1-xry111@xry111.site/mbox/"},{"id":78928,"url":"https://patchwork.plctlab.org/api/1.2/patches/78928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404084630.48657-1-juzhe.zhong@rivai.ai/","msgid":"<20230404084630.48657-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-04T08:46:30","name":"RISC-V: Fix PR109399 VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404084630.48657-1-juzhe.zhong@rivai.ai/mbox/"},{"id":78938,"url":"https://patchwork.plctlab.org/api/1.2/patches/78938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCvnXt00qMrZyJSM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-04T09:01:18","name":"riscv: Fix bootstrap [PR109384]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCvnXt00qMrZyJSM@tucnak/mbox/"},{"id":78961,"url":"https://patchwork.plctlab.org/api/1.2/patches/78961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7baea35-ea9d-5f11-520e-009c8da3735d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T09:57:57","name":"[committed] amdgcn: Add 64-bit vector not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7baea35-ea9d-5f11-520e-009c8da3735d@codesourcery.com/mbox/"},{"id":79010,"url":"https://patchwork.plctlab.org/api/1.2/patches/79010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404111724.243040-1-jwakely@redhat.com/","msgid":"<20230404111724.243040-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-04T11:17:24","name":"[committed] libstdc++: Fix outdated docs about demangling exception messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404111724.243040-1-jwakely@redhat.com/mbox/"},{"id":79021,"url":"https://patchwork.plctlab.org/api/1.2/patches/79021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com/","msgid":"<20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com>","list_archive_url":null,"date":"2023-04-04T11:32:35","name":"ree: Improvement of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com/mbox/"},{"id":79094,"url":"https://patchwork.plctlab.org/api/1.2/patches/79094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com/","msgid":"<4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com>","list_archive_url":null,"date":"2023-04-04T13:06:37","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com/mbox/"},{"id":79095,"url":"https://patchwork.plctlab.org/api/1.2/patches/79095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BF89C563-9663-4671-BCCB-24C7B6C26474@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T13:07:55","name":"[V6,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BF89C563-9663-4671-BCCB-24C7B6C26474@oracle.com/mbox/"},{"id":79256,"url":"https://patchwork.plctlab.org/api/1.2/patches/79256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404170857.608270-1-dmalcolm@redhat.com/","msgid":"<20230404170857.608270-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-04-04T17:08:57","name":"Add -fsarif-time-report [PR109361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404170857.608270-1-dmalcolm@redhat.com/mbox/"},{"id":79412,"url":"https://patchwork.plctlab.org/api/1.2/patches/79412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-1-arsen@aarsen.me/","msgid":"<20230404230950.158556-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:47","name":"[1/4] libstdc++: Harmonize and other headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-1-arsen@aarsen.me/mbox/"},{"id":79409,"url":"https://patchwork.plctlab.org/api/1.2/patches/79409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-2-arsen@aarsen.me/","msgid":"<20230404230950.158556-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:48","name":"[2/4] libstdc++: Add a test for FTM redefinitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-2-arsen@aarsen.me/mbox/"},{"id":79411,"url":"https://patchwork.plctlab.org/api/1.2/patches/79411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-3-arsen@aarsen.me/","msgid":"<20230404230950.158556-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:49","name":"[3/4] libstdc++: Downgrade DEBUG to ASSERTIONS when !HOSTED","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-3-arsen@aarsen.me/mbox/"},{"id":79410,"url":"https://patchwork.plctlab.org/api/1.2/patches/79410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-4-arsen@aarsen.me/","msgid":"<20230404230950.158556-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:50","name":"[4/4] libstdc++: Fix some freestanding test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-4-arsen@aarsen.me/mbox/"},{"id":79414,"url":"https://patchwork.plctlab.org/api/1.2/patches/79414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404233927.3B8BE2043D@pchp3.se.axis.com/","msgid":"<20230404233927.3B8BE2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-04T23:39:27","name":"[committed] doc: md.texi (Including Patterns): Fix page break","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404233927.3B8BE2043D@pchp3.se.axis.com/mbox/"},{"id":79504,"url":"https://patchwork.plctlab.org/api/1.2/patches/79504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmE5ohrwZMAjU+ju_pMcTbPMnYHGWixgdYUfx=abPn3nw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-05T08:38:26","name":"[match.pd,SVE] Add pattern to transform svrev(svrev(v)) --> v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmE5ohrwZMAjU+ju_pMcTbPMnYHGWixgdYUfx=abPn3nw@mail.gmail.com/mbox/"},{"id":79512,"url":"https://patchwork.plctlab.org/api/1.2/patches/79512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC04IGSaDzQarXvq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-05T08:58:08","name":"tree-vect-generic: Fix up ICE with SSA_NAME_OCCURS_IN_ABNORMAL_PHI [PR109392]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC04IGSaDzQarXvq@tucnak/mbox/"},{"id":79520,"url":"https://patchwork.plctlab.org/api/1.2/patches/79520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC08hc8fUczEywig@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-05T09:16:53","name":"dse: Handle SUBREGs of word REGs differently for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC08hc8fUczEywig@tucnak/mbox/"},{"id":79565,"url":"https://patchwork.plctlab.org/api/1.2/patches/79565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405112418.334349-1-jwakely@redhat.com/","msgid":"<20230405112418.334349-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-05T11:24:18","name":"[committed] libstdc++: Define std::sub_match::swap member function (LWG 3204)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405112418.334349-1-jwakely@redhat.com/mbox/"},{"id":79582,"url":"https://patchwork.plctlab.org/api/1.2/patches/79582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405120833.3598320-1-julian@codesourcery.com/","msgid":"<20230405120833.3598320-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-05T12:08:33","name":"[og12] OpenMP: Fix checking ICE in \"declare target\" ctor/dtor support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405120833.3598320-1-julian@codesourcery.com/mbox/"},{"id":79621,"url":"https://patchwork.plctlab.org/api/1.2/patches/79621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-2-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:44","name":"[committed,01/88] gccrs: fatal_error_flag: Fix typo in error message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-2-arthur.cohen@embecosm.com/mbox/"},{"id":79617,"url":"https://patchwork.plctlab.org/api/1.2/patches/79617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-3-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:45","name":"[committed,02/88] gccrs: unsafe: check use of `target_feature` attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-3-arthur.cohen@embecosm.com/mbox/"},{"id":79620,"url":"https://patchwork.plctlab.org/api/1.2/patches/79620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-4-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:47","name":"[committed,03/88] gccrs: Check for mutable references in const functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-4-arthur.cohen@embecosm.com/mbox/"},{"id":79623,"url":"https://patchwork.plctlab.org/api/1.2/patches/79623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-5-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:48","name":"[committed,04/88] gccrs: rust: add bound parsing in parse_generic_arg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-5-arthur.cohen@embecosm.com/mbox/"},{"id":79619,"url":"https://patchwork.plctlab.org/api/1.2/patches/79619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-6-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:49","name":"[committed,05/88] gccrs: Implement declarative macro 2.0 parser","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-6-arthur.cohen@embecosm.com/mbox/"},{"id":79622,"url":"https://patchwork.plctlab.org/api/1.2/patches/79622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-7-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:50","name":"[committed,06/88] gccrs: Add name resolution to generic argument associated item bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-7-arthur.cohen@embecosm.com/mbox/"},{"id":79630,"url":"https://patchwork.plctlab.org/api/1.2/patches/79630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-8-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:51","name":"[committed,07/88] gccrs: Support associated type bound arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-8-arthur.cohen@embecosm.com/mbox/"},{"id":79626,"url":"https://patchwork.plctlab.org/api/1.2/patches/79626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-9-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:52","name":"[committed,08/88] gccrs: Reuse TypeCheckPattern on LetStmt'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-9-arthur.cohen@embecosm.com/mbox/"},{"id":79625,"url":"https://patchwork.plctlab.org/api/1.2/patches/79625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-10-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:53","name":"[committed,09/88] gccrs: Add get_locus function for abstract class MetaItemInner.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-10-arthur.cohen@embecosm.com/mbox/"},{"id":79627,"url":"https://patchwork.plctlab.org/api/1.2/patches/79627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-11-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:54","name":"[committed,10/88] gccrs: diagnostics: Add underline for tokens in diagnostics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-11-arthur.cohen@embecosm.com/mbox/"},{"id":79624,"url":"https://patchwork.plctlab.org/api/1.2/patches/79624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-12-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:55","name":"[committed,11/88] gccrs: Change how CompileVarDecl outputs Bvariable'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-12-arthur.cohen@embecosm.com/mbox/"},{"id":79640,"url":"https://patchwork.plctlab.org/api/1.2/patches/79640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-13-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:56","name":"[committed,12/88] gccrs: testsuite: Handle Windows carriage returns properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-13-arthur.cohen@embecosm.com/mbox/"},{"id":79629,"url":"https://patchwork.plctlab.org/api/1.2/patches/79629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-14-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:57","name":"[committed,13/88] gccrs: Support GroupedPattern during name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-14-arthur.cohen@embecosm.com/mbox/"},{"id":79628,"url":"https://patchwork.plctlab.org/api/1.2/patches/79628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-15-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:58","name":"[committed,14/88] gccrs: Do not crash on empty macros expand. Fixes #1712","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-15-arthur.cohen@embecosm.com/mbox/"},{"id":79631,"url":"https://patchwork.plctlab.org/api/1.2/patches/79631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-16-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:59","name":"[committed,15/88] gccrs: Add HIR lowering for GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-16-arthur.cohen@embecosm.com/mbox/"},{"id":79641,"url":"https://patchwork.plctlab.org/api/1.2/patches/79641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-17-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:00","name":"[committed,16/88] gccrs: Add get_item method for HIR::GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-17-arthur.cohen@embecosm.com/mbox/"},{"id":79632,"url":"https://patchwork.plctlab.org/api/1.2/patches/79632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-18-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:01","name":"[committed,17/88] gccrs: Add type resolution for grouped patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-18-arthur.cohen@embecosm.com/mbox/"},{"id":79635,"url":"https://patchwork.plctlab.org/api/1.2/patches/79635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-19-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:02","name":"[committed,18/88] gccrs: Added missing GroupedPattern visitors for code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-19-arthur.cohen@embecosm.com/mbox/"},{"id":79658,"url":"https://patchwork.plctlab.org/api/1.2/patches/79658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-20-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:03","name":"[committed,19/88] gccrs: Rename file rust-ast-full-test.cc to rust-ast.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-20-arthur.cohen@embecosm.com/mbox/"},{"id":79660,"url":"https://patchwork.plctlab.org/api/1.2/patches/79660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-21-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:04","name":"[committed,20/88] gccrs: moved operator.h to util/rust-operators.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-21-arthur.cohen@embecosm.com/mbox/"},{"id":79671,"url":"https://patchwork.plctlab.org/api/1.2/patches/79671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-22-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:05","name":"[committed,21/88] gccrs: fixed compiler error message on wildcard pattern within expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-22-arthur.cohen@embecosm.com/mbox/"},{"id":79668,"url":"https://patchwork.plctlab.org/api/1.2/patches/79668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-23-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:06","name":"[committed,22/88] gccrs: fixed indentations in AST pretty expanded dump of trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-23-arthur.cohen@embecosm.com/mbox/"},{"id":79647,"url":"https://patchwork.plctlab.org/api/1.2/patches/79647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-24-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:07","name":"[committed,23/88] gccrs: macro: Allow builtin `MacroInvocation`s within the AST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-24-arthur.cohen@embecosm.com/mbox/"},{"id":79654,"url":"https://patchwork.plctlab.org/api/1.2/patches/79654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-25-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:08","name":"[committed,24/88] gccrs: Create and use CompilePatternLet visitor for compiling let statments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-25-arthur.cohen@embecosm.com/mbox/"},{"id":79662,"url":"https://patchwork.plctlab.org/api/1.2/patches/79662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-26-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:09","name":"[committed,25/88] gccrs: parser: Allow parsing multiple reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-26-arthur.cohen@embecosm.com/mbox/"},{"id":79667,"url":"https://patchwork.plctlab.org/api/1.2/patches/79667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-27-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:10","name":"[committed,26/88] gccrs: Move rust-buffered-queue.h to util folder #1766","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-27-arthur.cohen@embecosm.com/mbox/"},{"id":79670,"url":"https://patchwork.plctlab.org/api/1.2/patches/79670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-28-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:11","name":"[committed,27/88] gccrs: Improve GroupedPattern lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-28-arthur.cohen@embecosm.com/mbox/"},{"id":79672,"url":"https://patchwork.plctlab.org/api/1.2/patches/79672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-29-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:12","name":"[committed,28/88] gccrs: Remove HIR::GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-29-arthur.cohen@embecosm.com/mbox/"},{"id":79673,"url":"https://patchwork.plctlab.org/api/1.2/patches/79673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-30-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:13","name":"[committed,29/88] gccrs: Optimize HIR::ReferencePattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-30-arthur.cohen@embecosm.com/mbox/"},{"id":79674,"url":"https://patchwork.plctlab.org/api/1.2/patches/79674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-31-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:14","name":"[committed,30/88] gccrs: Implement lowering ReferencePattern from AST to HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-31-arthur.cohen@embecosm.com/mbox/"},{"id":79682,"url":"https://patchwork.plctlab.org/api/1.2/patches/79682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-32-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:15","name":"[committed,31/88] gccrs: parser: Improve parsing of complex generic arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-32-arthur.cohen@embecosm.com/mbox/"},{"id":79678,"url":"https://patchwork.plctlab.org/api/1.2/patches/79678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-33-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:16","name":"[committed,32/88] gccrs: parser: Fix parsing of closure param list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-33-arthur.cohen@embecosm.com/mbox/"},{"id":79680,"url":"https://patchwork.plctlab.org/api/1.2/patches/79680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-34-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:17","name":"[committed,33/88] gccrs: Add support for feature check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-34-arthur.cohen@embecosm.com/mbox/"},{"id":79675,"url":"https://patchwork.plctlab.org/api/1.2/patches/79675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-35-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:18","name":"[committed,34/88] gccrs: Removed comment copy-pasted from gcc/tree.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-35-arthur.cohen@embecosm.com/mbox/"},{"id":79687,"url":"https://patchwork.plctlab.org/api/1.2/patches/79687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-36-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:19","name":"[committed,35/88] gccrs: Add another test case for passing associated type-bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-36-arthur.cohen@embecosm.com/mbox/"},{"id":79676,"url":"https://patchwork.plctlab.org/api/1.2/patches/79676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-37-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:20","name":"[committed,36/88] gccrs: Move TypePredicateItem impl out of the header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-37-arthur.cohen@embecosm.com/mbox/"},{"id":79679,"url":"https://patchwork.plctlab.org/api/1.2/patches/79679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-38-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:21","name":"[committed,37/88] gccrs: Refactor TyVar and TypeBoundPredicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-38-arthur.cohen@embecosm.com/mbox/"},{"id":79677,"url":"https://patchwork.plctlab.org/api/1.2/patches/79677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-39-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:22","name":"[committed,38/88] gccrs: Refactor SubstitutionRef base class into its own CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-39-arthur.cohen@embecosm.com/mbox/"},{"id":79699,"url":"https://patchwork.plctlab.org/api/1.2/patches/79699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-40-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:23","name":"[committed,39/88] gccrs: Refactor all substitution mapper code implementation into its own CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-40-arthur.cohen@embecosm.com/mbox/"},{"id":79684,"url":"https://patchwork.plctlab.org/api/1.2/patches/79684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-41-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:24","name":"[committed,40/88] gccrs: Refactor BaseType, InferType and ErrorType impl into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-41-arthur.cohen@embecosm.com/mbox/"},{"id":79690,"url":"https://patchwork.plctlab.org/api/1.2/patches/79690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-42-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:25","name":"[committed,41/88] gccrs: Refactor PathProbe into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-42-arthur.cohen@embecosm.com/mbox/"},{"id":79685,"url":"https://patchwork.plctlab.org/api/1.2/patches/79685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-43-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:26","name":"[committed,42/88] gccrs: Refactor PathProbeType code into CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-43-arthur.cohen@embecosm.com/mbox/"},{"id":79701,"url":"https://patchwork.plctlab.org/api/1.2/patches/79701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-44-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:27","name":"[committed,43/88] gccrs: Refactor all code out of the rust-tyty.h header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-44-arthur.cohen@embecosm.com/mbox/"},{"id":79689,"url":"https://patchwork.plctlab.org/api/1.2/patches/79689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-45-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:28","name":"[committed,44/88] gccrs: Rename rust-tyctx.cc to rust-typecheck-context.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-45-arthur.cohen@embecosm.com/mbox/"},{"id":79706,"url":"https://patchwork.plctlab.org/api/1.2/patches/79706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-46-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:29","name":"[committed,45/88] gccrs: Rename header rust-hir-trait-ref.h to rust-hir-trait-reference.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-46-arthur.cohen@embecosm.com/mbox/"},{"id":79694,"url":"https://patchwork.plctlab.org/api/1.2/patches/79694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-47-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:30","name":"[committed,46/88] gccrs: Refactor handle_substitutions to take a reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-47-arthur.cohen@embecosm.com/mbox/"},{"id":79695,"url":"https://patchwork.plctlab.org/api/1.2/patches/79695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-48-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-48-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:31","name":"[committed,47/88] gccrs: Clear the substitution callbacks when copying ArgumentMappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-48-arthur.cohen@embecosm.com/mbox/"},{"id":79711,"url":"https://patchwork.plctlab.org/api/1.2/patches/79711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-49-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-49-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:32","name":"[committed,48/88] gccrs: Add missing param subst callback","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-49-arthur.cohen@embecosm.com/mbox/"},{"id":79698,"url":"https://patchwork.plctlab.org/api/1.2/patches/79698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-50-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-50-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:33","name":"[committed,49/88] gccrs: Remove monomorphization hack to setup possible associated types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-50-arthur.cohen@embecosm.com/mbox/"},{"id":79715,"url":"https://patchwork.plctlab.org/api/1.2/patches/79715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-51-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-51-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:34","name":"[committed,50/88] gccrs: Refactor the type unification code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-51-arthur.cohen@embecosm.com/mbox/"},{"id":79681,"url":"https://patchwork.plctlab.org/api/1.2/patches/79681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-52-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-52-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:35","name":"[committed,51/88] gccrs: Fix nullptr dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-52-arthur.cohen@embecosm.com/mbox/"},{"id":79686,"url":"https://patchwork.plctlab.org/api/1.2/patches/79686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-53-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-53-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:36","name":"[committed,52/88] gccrs: Add missing Sized, Copy and Clone lang item mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-53-arthur.cohen@embecosm.com/mbox/"},{"id":79708,"url":"https://patchwork.plctlab.org/api/1.2/patches/79708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-54-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-54-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:37","name":"[committed,53/88] gccrs: Fix higher ranked trait bounds computation of self","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-54-arthur.cohen@embecosm.com/mbox/"},{"id":79710,"url":"https://patchwork.plctlab.org/api/1.2/patches/79710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-55-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-55-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:38","name":"[committed,54/88] gccrs: Remove bad error message on checking function arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-55-arthur.cohen@embecosm.com/mbox/"},{"id":79716,"url":"https://patchwork.plctlab.org/api/1.2/patches/79716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-56-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-56-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:39","name":"[committed,55/88] gccrs: Add general TypeBounds checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-56-arthur.cohen@embecosm.com/mbox/"},{"id":79712,"url":"https://patchwork.plctlab.org/api/1.2/patches/79712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-57-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-57-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:40","name":"[committed,56/88] gccrs: Add support for TuplePattern in let statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-57-arthur.cohen@embecosm.com/mbox/"},{"id":79721,"url":"https://patchwork.plctlab.org/api/1.2/patches/79721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-58-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-58-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:41","name":"[committed,57/88] gccrs: rust-item: include rust-expr.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-58-arthur.cohen@embecosm.com/mbox/"},{"id":79717,"url":"https://patchwork.plctlab.org/api/1.2/patches/79717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-59-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-59-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:42","name":"[committed,58/88] gccrs: parser: Expose parse_macro_invocation as public API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-59-arthur.cohen@embecosm.com/mbox/"},{"id":79720,"url":"https://patchwork.plctlab.org/api/1.2/patches/79720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-60-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-60-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:43","name":"[committed,59/88] gccrs: expansion: Add `get_token_slice` to `MacroInvocLexer` class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-60-arthur.cohen@embecosm.com/mbox/"},{"id":79722,"url":"https://patchwork.plctlab.org/api/1.2/patches/79722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-61-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-61-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:44","name":"[committed,60/88] gccrs: macros: Perform macro expansion in a fixed-point fashion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-61-arthur.cohen@embecosm.com/mbox/"},{"id":79691,"url":"https://patchwork.plctlab.org/api/1.2/patches/79691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-62-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-62-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:45","name":"[committed,61/88] gccrs: expander: Add documentation for `expand_eager_invocations`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-62-arthur.cohen@embecosm.com/mbox/"},{"id":79719,"url":"https://patchwork.plctlab.org/api/1.2/patches/79719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-63-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-63-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:46","name":"[committed,62/88] gccrs: typecheck: Refactor rust-hir-trait-reference.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-63-arthur.cohen@embecosm.com/mbox/"},{"id":79723,"url":"https://patchwork.plctlab.org/api/1.2/patches/79723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-64-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-64-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:47","name":"[committed,63/88] gccrs: cli: Update safety warning message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-64-arthur.cohen@embecosm.com/mbox/"},{"id":79724,"url":"https://patchwork.plctlab.org/api/1.2/patches/79724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-65-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-65-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:48","name":"[committed,64/88] gccrs: Update copyright years.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-65-arthur.cohen@embecosm.com/mbox/"},{"id":79725,"url":"https://patchwork.plctlab.org/api/1.2/patches/79725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-66-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-66-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:49","name":"[committed,65/88] gccrs: Add feature gate for \"rust-intrinsic\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-66-arthur.cohen@embecosm.com/mbox/"},{"id":79697,"url":"https://patchwork.plctlab.org/api/1.2/patches/79697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-67-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-67-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:50","name":"[committed,66/88] gccrs: Add variadic argument type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-67-arthur.cohen@embecosm.com/mbox/"},{"id":79726,"url":"https://patchwork.plctlab.org/api/1.2/patches/79726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-68-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-68-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:51","name":"[committed,67/88] gccrs: Add test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-68-arthur.cohen@embecosm.com/mbox/"},{"id":79728,"url":"https://patchwork.plctlab.org/api/1.2/patches/79728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-69-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-69-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:52","name":"[committed,68/88] gccrs: Simplify WildcardPattern let statement handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-69-arthur.cohen@embecosm.com/mbox/"},{"id":79702,"url":"https://patchwork.plctlab.org/api/1.2/patches/79702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-70-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-70-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:53","name":"[committed,69/88] gccrs: lex: Prevent directories in RAIIFile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-70-arthur.cohen@embecosm.com/mbox/"},{"id":79709,"url":"https://patchwork.plctlab.org/api/1.2/patches/79709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-71-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-71-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:54","name":"[committed,70/88] gccrs: testsuite: Add empty string macro test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-71-arthur.cohen@embecosm.com/mbox/"},{"id":79727,"url":"https://patchwork.plctlab.org/api/1.2/patches/79727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-72-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-72-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:55","name":"[committed,71/88] gccrs: Add support for parsing empty tuple patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-72-arthur.cohen@embecosm.com/mbox/"},{"id":79729,"url":"https://patchwork.plctlab.org/api/1.2/patches/79729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-74-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-74-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:57","name":"[committed,73/88] gccrs: Extract query_type from TypeCheckBase to be a simple extern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-74-arthur.cohen@embecosm.com/mbox/"},{"id":79714,"url":"https://patchwork.plctlab.org/api/1.2/patches/79714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-75-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-75-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:58","name":"[committed,74/88] gccrs: Add new virtual function HIR::ImplItem::get_impl_item_name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-75-arthur.cohen@embecosm.com/mbox/"},{"id":79738,"url":"https://patchwork.plctlab.org/api/1.2/patches/79738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-76-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-76-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:59","name":"[committed,75/88] gccrs: Support for Sized builtin marker trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-76-arthur.cohen@embecosm.com/mbox/"},{"id":79732,"url":"https://patchwork.plctlab.org/api/1.2/patches/79732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-77-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-77-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:00","name":"[committed,76/88] gccrs: Fix regression in testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-77-arthur.cohen@embecosm.com/mbox/"},{"id":79731,"url":"https://patchwork.plctlab.org/api/1.2/patches/79731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-78-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-78-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:01","name":"[committed,77/88] gccrs: Add trailing newline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-78-arthur.cohen@embecosm.com/mbox/"},{"id":79730,"url":"https://patchwork.plctlab.org/api/1.2/patches/79730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-79-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-79-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:02","name":"[committed,78/88] gccrs: builtins: Return empty list of tokens instead of nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-79-arthur.cohen@embecosm.com/mbox/"},{"id":79735,"url":"https://patchwork.plctlab.org/api/1.2/patches/79735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-80-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-80-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:03","name":"[committed,79/88] gccrs: Fix formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-80-arthur.cohen@embecosm.com/mbox/"},{"id":79734,"url":"https://patchwork.plctlab.org/api/1.2/patches/79734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-81-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-81-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:04","name":"[committed,80/88] gccrs: Add AST::AltPattern class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-81-arthur.cohen@embecosm.com/mbox/"},{"id":79718,"url":"https://patchwork.plctlab.org/api/1.2/patches/79718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-82-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-82-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:05","name":"[committed,81/88] gccrs: Fix up DejaGnu directives in '\''rust/compile/issue-1830_{bytes, str}.rs'\'' test cases [#1838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-82-arthur.cohen@embecosm.com/mbox/"},{"id":79737,"url":"https://patchwork.plctlab.org/api/1.2/patches/79737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-83-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-83-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:06","name":"[committed,82/88] gccrs: rename rust-hir-full-tests.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-83-arthur.cohen@embecosm.com/mbox/"},{"id":79740,"url":"https://patchwork.plctlab.org/api/1.2/patches/79740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-84-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-84-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:07","name":"[committed,83/88] gccrs: add test case to show our query-type system is working","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-84-arthur.cohen@embecosm.com/mbox/"},{"id":79733,"url":"https://patchwork.plctlab.org/api/1.2/patches/79733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-85-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-85-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:08","name":"[committed,84/88] gccrs: ast: Refactor TraitItem to keep Location info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-85-arthur.cohen@embecosm.com/mbox/"},{"id":79736,"url":"https://patchwork.plctlab.org/api/1.2/patches/79736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-86-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-86-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:09","name":"[committed,85/88] gccrs: diagnostic: Refactor Error class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-86-arthur.cohen@embecosm.com/mbox/"},{"id":79744,"url":"https://patchwork.plctlab.org/api/1.2/patches/79744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-87-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-87-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:10","name":"[committed,86/88] gccrs: Added AST Node AST::InlineAsm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-87-arthur.cohen@embecosm.com/mbox/"},{"id":79739,"url":"https://patchwork.plctlab.org/api/1.2/patches/79739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-88-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-88-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:11","name":"[committed,87/88] gccrs: Address unsafe with/without block handling ambiguity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-88-arthur.cohen@embecosm.com/mbox/"},{"id":79742,"url":"https://patchwork.plctlab.org/api/1.2/patches/79742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-89-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-89-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:12","name":"[committed,88/88] gccrs: Fix issue with parsing unsafe block expression statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-89-arthur.cohen@embecosm.com/mbox/"},{"id":79758,"url":"https://patchwork.plctlab.org/api/1.2/patches/79758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2LJcmv8Gd2X0Q0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-05T14:52:21","name":"[committed] hppa: Add assember CFI directives to millicode division and remainder routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2LJcmv8Gd2X0Q0@mx3210.localdomain/mbox/"},{"id":79772,"url":"https://patchwork.plctlab.org/api/1.2/patches/79772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2YKR0I073iqang@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-05T15:47:53","name":"[committed] hppa: Fix 22_locale/locale/cons/12658_thread-2.cc on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2YKR0I073iqang@mx3210.localdomain/mbox/"},{"id":79820,"url":"https://patchwork.plctlab.org/api/1.2/patches/79820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405165927.1987914-1-ppalka@redhat.com/","msgid":"<20230405165927.1987914-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-05T16:59:27","name":"c++: '\''typename T::X'\'' vs '\''struct T::X'\'' lookup [PR109420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405165927.1987914-1-ppalka@redhat.com/mbox/"},{"id":79905,"url":"https://patchwork.plctlab.org/api/1.2/patches/79905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a81da3-99ab-482e-14aa-59a8f1025ffe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-05T20:10:25","name":"PR tree-optimization/109417 - Check if dependency is valid before using in may_recompute_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a81da3-99ab-482e-14aa-59a8f1025ffe@redhat.com/mbox/"},{"id":79941,"url":"https://patchwork.plctlab.org/api/1.2/patches/79941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-2-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:11","name":"[v2,1/8] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-2-patrick@rivosinc.com/mbox/"},{"id":79949,"url":"https://patchwork.plctlab.org/api/1.2/patches/79949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-3-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:12","name":"[v2,2/8] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-3-patrick@rivosinc.com/mbox/"},{"id":79951,"url":"https://patchwork.plctlab.org/api/1.2/patches/79951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-4-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:13","name":"[v2,3/8] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-4-patrick@rivosinc.com/mbox/"},{"id":79942,"url":"https://patchwork.plctlab.org/api/1.2/patches/79942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-5-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:14","name":"[v2,4/8] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-5-patrick@rivosinc.com/mbox/"},{"id":79944,"url":"https://patchwork.plctlab.org/api/1.2/patches/79944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-6-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:15","name":"[v2,5/8] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-6-patrick@rivosinc.com/mbox/"},{"id":79945,"url":"https://patchwork.plctlab.org/api/1.2/patches/79945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-7-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:16","name":"[v2,6/8] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-7-patrick@rivosinc.com/mbox/"},{"id":79952,"url":"https://patchwork.plctlab.org/api/1.2/patches/79952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-8-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:17","name":"[v2,7/8] RISCV: Weaken atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-8-patrick@rivosinc.com/mbox/"},{"id":79953,"url":"https://patchwork.plctlab.org/api/1.2/patches/79953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-9-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:18","name":"[v2,8/8] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-9-patrick@rivosinc.com/mbox/"},{"id":80045,"url":"https://patchwork.plctlab.org/api/1.2/patches/80045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406041530.256933-1-apinski@marvell.com/","msgid":"<20230406041530.256933-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-06T04:15:30","name":"Fix typo in -param=vect-induction-float= attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406041530.256933-1-apinski@marvell.com/mbox/"},{"id":80049,"url":"https://patchwork.plctlab.org/api/1.2/patches/80049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406042526.257487-1-apinski@marvell.com/","msgid":"<20230406042526.257487-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-06T04:25:26","name":"Fix typo in -param=vect-induction-float= attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406042526.257487-1-apinski@marvell.com/mbox/"},{"id":80052,"url":"https://patchwork.plctlab.org/api/1.2/patches/80052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com/","msgid":"<59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com>","list_archive_url":null,"date":"2023-04-06T05:35:20","name":"[PATCHv3,rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com/mbox/"},{"id":80060,"url":"https://patchwork.plctlab.org/api/1.2/patches/80060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8i98rdn.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-06T06:19:16","name":"[testsuite,ppc] skip ppc-fortran if fortran is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8i98rdn.fsf@lxoliva.fsfla.org/mbox/"},{"id":80067,"url":"https://patchwork.plctlab.org/api/1.2/patches/80067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-2-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:14","name":"[1/5] RISC-V: Minimal support for ZC extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-2-jiawei@iscas.ac.cn/mbox/"},{"id":80065,"url":"https://patchwork.plctlab.org/api/1.2/patches/80065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-3-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:15","name":"[2/5] RISC-V: Enable compressible features when use ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-3-jiawei@iscas.ac.cn/mbox/"},{"id":80064,"url":"https://patchwork.plctlab.org/api/1.2/patches/80064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-4-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:16","name":"[3/5] RISC-V: Add ZC* test for march args being passed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-4-jiawei@iscas.ac.cn/mbox/"},{"id":80066,"url":"https://patchwork.plctlab.org/api/1.2/patches/80066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-5-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-5-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:17","name":"[4/5] RISC-V: Add Zcmp extension supports.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-5-jiawei@iscas.ac.cn/mbox/"},{"id":80068,"url":"https://patchwork.plctlab.org/api/1.2/patches/80068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-6-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-6-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:18","name":"[5/5] RISC-V: Add ZCMP push/pop testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-6-jiawei@iscas.ac.cn/mbox/"},{"id":80069,"url":"https://patchwork.plctlab.org/api/1.2/patches/80069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062737.79723-1-iain@sandoe.co.uk/","msgid":"<20230406062737.79723-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-04-06T06:27:37","name":"c++, coroutines: Fix block nests when the function has no top-level bind.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062737.79723-1-iain@sandoe.co.uk/mbox/"},{"id":80114,"url":"https://patchwork.plctlab.org/api/1.2/patches/80114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406072807.3434931-1-indu.bhagat@oracle.com/","msgid":"<20230406072807.3434931-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-04-06T07:28:07","name":"[Committed] MAINTAINERS: Add myself as CTF and BTF reviewer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406072807.3434931-1-indu.bhagat@oracle.com/mbox/"},{"id":80137,"url":"https://patchwork.plctlab.org/api/1.2/patches/80137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406081900.3588715-1-chenglulu@loongson.cn/","msgid":"<20230406081900.3588715-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-06T08:19:01","name":"LoongArch: Add built-in functions description of LoongArch BASE instruction set instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406081900.3588715-1-chenglulu@loongson.cn/mbox/"},{"id":80161,"url":"https://patchwork.plctlab.org/api/1.2/patches/80161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6Uzf9gu8sWW7+K@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-06T09:45:49","name":"riscv: Fix genrvv-type-indexer dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6Uzf9gu8sWW7+K@tucnak/mbox/"},{"id":80184,"url":"https://patchwork.plctlab.org/api/1.2/patches/80184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6fiaL9vIiqZJ7z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:31:37","name":"combine: Fix simplify_comparison AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6fiaL9vIiqZJ7z@tucnak/mbox/"},{"id":80189,"url":"https://patchwork.plctlab.org/api/1.2/patches/80189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406103533.1087349-1-arsen@aarsen.me/","msgid":"<20230406103533.1087349-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-06T10:35:34","name":"update_web_docs_git: Add updated Texinfo to PATH","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406103533.1087349-1-arsen@aarsen.me/mbox/"},{"id":80191,"url":"https://patchwork.plctlab.org/api/1.2/patches/80191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17159-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:43:34","name":"[3/3] RFC - match.pd: automatically partition *-match.cc files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17159-tamar@arm.com/mbox/"},{"id":80192,"url":"https://patchwork.plctlab.org/api/1.2/patches/80192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com/","msgid":"<466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com>","list_archive_url":null,"date":"2023-04-06T10:49:53","name":"[v2] ree: Improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com/mbox/"},{"id":80193,"url":"https://patchwork.plctlab.org/api/1.2/patches/80193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17157-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:56:01","name":"[1/3] RFC match.pd: don'\''t emit label if not needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17157-tamar@arm.com/mbox/"},{"id":80194,"url":"https://patchwork.plctlab.org/api/1.2/patches/80194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6lb7jIu2t7kssM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:56:47","name":"[2/3] RFC - match.pd: simplify debug dump checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6lb7jIu2t7kssM@arm.com/mbox/"},{"id":80212,"url":"https://patchwork.plctlab.org/api/1.2/patches/80212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406113322.3182296-1-yashinde145@gmail.com/","msgid":"<20230406113322.3182296-1-yashinde145@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:33:22","name":"Add ssp_nonshared to link commandline for musl targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406113322.3182296-1-yashinde145@gmail.com/mbox/"},{"id":80213,"url":"https://patchwork.plctlab.org/api/1.2/patches/80213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114158.3182468-1-raj.khem@gmail.com/","msgid":"<20230406114158.3182468-1-raj.khem@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:41:58","name":"gcc: armv4: pass fix-v4bx to linker to support EABI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114158.3182468-1-raj.khem@gmail.com/mbox/"},{"id":80214,"url":"https://patchwork.plctlab.org/api/1.2/patches/80214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114906.3182600-1-yashinde145@gmail.com/","msgid":"<20230406114906.3182600-1-yashinde145@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:49:06","name":"Search target sysroot gcc version specific dirs with multilib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114906.3182600-1-yashinde145@gmail.com/mbox/"},{"id":80248,"url":"https://patchwork.plctlab.org/api/1.2/patches/80248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406133441.1944365-1-yanzhang.wang@intel.com/","msgid":"<20230406133441.1944365-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-06T13:34:41","name":"RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406133441.1944365-1-yanzhang.wang@intel.com/mbox/"},{"id":80251,"url":"https://patchwork.plctlab.org/api/1.2/patches/80251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3041a27a-8599-23da-237b-d802f83c40ae@suse.cz/","msgid":"<3041a27a-8599-23da-237b-d802f83c40ae@suse.cz>","list_archive_url":null,"date":"2023-04-06T13:58:35","name":"gcov: add info about \"calls\" to JSON output format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3041a27a-8599-23da-237b-d802f83c40ae@suse.cz/mbox/"},{"id":80285,"url":"https://patchwork.plctlab.org/api/1.2/patches/80285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-2-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:20","name":"[1/3] VECT: Add WHILE_LEN pattern to support decrement IV manipulation for loop vectorizer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-2-juzhe.zhong@rivai.ai/mbox/"},{"id":80288,"url":"https://patchwork.plctlab.org/api/1.2/patches/80288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-3-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:21","name":"[2/3] RISC-V: Enable basic RVV auto-vectorization and support WHILE_LEN/LEN_LOAD/LEN_STORE pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-3-juzhe.zhong@rivai.ai/mbox/"},{"id":80289,"url":"https://patchwork.plctlab.org/api/1.2/patches/80289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-4-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:22","name":"RISC-V: Add RVV auto-vectorization testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-4-juzhe.zhong@rivai.ai/mbox/"},{"id":80308,"url":"https://patchwork.plctlab.org/api/1.2/patches/80308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC7hS75ohXMo7Qcw@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-06T15:12:11","name":"PR target/70243: Do not generate fmaddfp and fnmsubfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC7hS75ohXMo7Qcw@toto.the-meissners.org/mbox/"},{"id":80324,"url":"https://patchwork.plctlab.org/api/1.2/patches/80324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406153620.931820-1-rearnsha@arm.com/","msgid":"<20230406153620.931820-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-04-06T15:36:20","name":"[committed] arm: mve: fix auto-inc generation [PR107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406153620.931820-1-rearnsha@arm.com/mbox/"},{"id":80383,"url":"https://patchwork.plctlab.org/api/1.2/patches/80383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com/","msgid":"<26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com>","list_archive_url":null,"date":"2023-04-06T18:02:05","name":"[committed,testsuite] arm: remove unused variables from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com/mbox/"},{"id":80392,"url":"https://patchwork.plctlab.org/api/1.2/patches/80392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com/","msgid":"<14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com>","list_archive_url":null,"date":"2023-04-06T18:56:39","name":"'\''omp scan'\'' struct block seq update for OpenMP 5.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com/mbox/"},{"id":80593,"url":"https://patchwork.plctlab.org/api/1.2/patches/80593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407011143.46004-1-juzhe.zhong@rivai.ai/","msgid":"<20230407011143.46004-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:11:43","name":"RISC-V: Fix incorrect condition of EEW = 64 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407011143.46004-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80595,"url":"https://patchwork.plctlab.org/api/1.2/patches/80595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012129.63142-1-juzhe.zhong@rivai.ai/","msgid":"<20230407012129.63142-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:21:29","name":"RISC-V: Add RVV auto-vectorization compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012129.63142-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80597,"url":"https://patchwork.plctlab.org/api/1.2/patches/80597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012503.65215-1-juzhe.zhong@rivai.ai/","msgid":"<20230407012503.65215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:25:03","name":"RISC-V: Enable basic RVV auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012503.65215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80599,"url":"https://patchwork.plctlab.org/api/1.2/patches/80599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013413.127686-1-juzhe.zhong@rivai.ai/","msgid":"<20230407013413.127686-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:34:13","name":"RISC-V: Add local user vsetvl instruction elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013413.127686-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80600,"url":"https://patchwork.plctlab.org/api/1.2/patches/80600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013701.129875-1-juzhe.zhong@rivai.ai/","msgid":"<20230407013701.129875-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:37:01","name":"RISC-V: Add testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013701.129875-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80602,"url":"https://patchwork.plctlab.org/api/1.2/patches/80602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407014741.139387-1-juzhe.zhong@rivai.ai/","msgid":"<20230407014741.139387-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:47:41","name":"VECT: Add WHILE_LEN pattern for decrement IV support for auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407014741.139387-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80644,"url":"https://patchwork.plctlab.org/api/1.2/patches/80644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-1-shiyulong@iscas.ac.cn/","msgid":"<20230407033702.6770-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-07T03:37:01","name":"[V4] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-1-shiyulong@iscas.ac.cn/mbox/"},{"id":80645,"url":"https://patchwork.plctlab.org/api/1.2/patches/80645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-2-shiyulong@iscas.ac.cn/","msgid":"<20230407033702.6770-2-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-07T03:37:02","name":"[V2] RISC-V: Modified validation information for contracts-tmpl-spec2.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-2-shiyulong@iscas.ac.cn/mbox/"},{"id":80660,"url":"https://patchwork.plctlab.org/api/1.2/patches/80660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000201d96911$5824d670$086e8350$@pony-e.jp/","msgid":"<000201d96911$5824d670$086e8350$@pony-e.jp>","list_archive_url":null,"date":"2023-04-07T05:25:19","name":"PR target/109402: v850 (not v850e) variant of __muldi3() moves sp in reversed direction [PR109402]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000201d96911$5824d670$086e8350$@pony-e.jp/mbox/"},{"id":80668,"url":"https://patchwork.plctlab.org/api/1.2/patches/80668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC+5WQxocwgkig/1@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-07T06:34:01","name":"[V2] PR target/70243: Do not generate vmaddfp and vnmsubfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC+5WQxocwgkig/1@toto.the-meissners.org/mbox/"},{"id":80672,"url":"https://patchwork.plctlab.org/api/1.2/patches/80672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407065940.2331101-1-yanzhang.wang@intel.com/","msgid":"<20230407065940.2331101-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-07T06:59:40","name":"[v2] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407065940.2331101-1-yanzhang.wang@intel.com/mbox/"},{"id":80699,"url":"https://patchwork.plctlab.org/api/1.2/patches/80699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407083820.752753-1-chenglulu@loongson.cn/","msgid":"<20230407083820.752753-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-07T08:38:20","name":"[v2] LoongArch: Add built-in functions description of LoongArch Base instruction set instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407083820.752753-1-chenglulu@loongson.cn/mbox/"},{"id":80774,"url":"https://patchwork.plctlab.org/api/1.2/patches/80774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407123249.2600968-1-yanzhang.wang@intel.com/","msgid":"<20230407123249.2600968-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-07T12:32:49","name":"[v3] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407123249.2600968-1-yanzhang.wang@intel.com/mbox/"},{"id":80901,"url":"https://patchwork.plctlab.org/api/1.2/patches/80901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com/","msgid":"<49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com>","list_archive_url":null,"date":"2023-04-07T16:07:27","name":"[rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com/mbox/"},{"id":81051,"url":"https://patchwork.plctlab.org/api/1.2/patches/81051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUpcDZda0axzk=_d-CEoO_s_ZVHMmxyzSYWoz0LfK8fQg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-07T21:07:42","name":"libgo patch committed: Remove test ordering dependency in mime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUpcDZda0axzk=_d-CEoO_s_ZVHMmxyzSYWoz0LfK8fQg@mail.gmail.com/mbox/"},{"id":81066,"url":"https://patchwork.plctlab.org/api/1.2/patches/81066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com/","msgid":"<8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com>","list_archive_url":null,"date":"2023-04-07T22:33:37","name":"aarch64: Add the cost and scheduling models for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com/mbox/"},{"id":81214,"url":"https://patchwork.plctlab.org/api/1.2/patches/81214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDFte7XxGH3P2fpq@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-08T13:34:51","name":"[V3] PR target/70243 - Do not generate vmaddfp or vnmsubdp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDFte7XxGH3P2fpq@toto.the-meissners.org/mbox/"},{"id":81244,"url":"https://patchwork.plctlab.org/api/1.2/patches/81244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDGQrieOfEIVNkfg@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-08T16:05:02","name":"[committed] hppa: Fix gcc.dg/long_branch.c on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDGQrieOfEIVNkfg@mx3210.localdomain/mbox/"},{"id":81259,"url":"https://patchwork.plctlab.org/api/1.2/patches/81259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com/","msgid":"<15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com>","list_archive_url":null,"date":"2023-04-08T18:27:38","name":"[committed,PR,tree-optimization/109392] Handle failure from maybe_push_res_to_seq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com/mbox/"},{"id":81338,"url":"https://patchwork.plctlab.org/api/1.2/patches/81338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020807.1757872-1-haochen.jiang@intel.com/","msgid":"<20230410020807.1757872-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-10T02:08:07","name":"gcc-13: Mention Intel AMX-COMPLEX ISA support and revise march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020807.1757872-1-haochen.jiang@intel.com/mbox/"},{"id":81340,"url":"https://patchwork.plctlab.org/api/1.2/patches/81340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020941.2440885-1-guojiufu@linux.ibm.com/","msgid":"<20230410020941.2440885-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-10T02:09:41","name":"testsuite: update requires for powerpc/float128-cmp2-runnable.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020941.2440885-1-guojiufu@linux.ibm.com/mbox/"},{"id":81350,"url":"https://patchwork.plctlab.org/api/1.2/patches/81350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410030037.1202490-1-yanzhang.wang@intel.com/","msgid":"<20230410030037.1202490-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-10T03:00:37","name":"[v4] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410030037.1202490-1-yanzhang.wang@intel.com/mbox/"},{"id":81357,"url":"https://patchwork.plctlab.org/api/1.2/patches/81357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033134.78378-1-juzhe.zhong@rivai.ai/","msgid":"<20230410033134.78378-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T03:31:34","name":"RISC-V: Fix EEW = 64 predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033134.78378-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81358,"url":"https://patchwork.plctlab.org/api/1.2/patches/81358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033938.130469-1-juzhe.zhong@rivai.ai/","msgid":"<20230410033938.130469-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T03:39:38","name":"RISC-V: Allow LMUL = 2 auto-vectorization for zve32*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033938.130469-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81363,"url":"https://patchwork.plctlab.org/api/1.2/patches/81363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410050701.10254-1-mynameisxiaou@gmail.com/","msgid":"<20230410050701.10254-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-04-10T05:07:01","name":"RISC-V: avoid splitting small constant in i_extrabit pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410050701.10254-1-mynameisxiaou@gmail.com/mbox/"},{"id":81460,"url":"https://patchwork.plctlab.org/api/1.2/patches/81460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410105640.6510-1-mynameisxiaou@gmail.com/","msgid":"<20230410105640.6510-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-04-10T10:56:40","name":"RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr3 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410105640.6510-1-mynameisxiaou@gmail.com/mbox/"},{"id":81529,"url":"https://patchwork.plctlab.org/api/1.2/patches/81529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410144808.324346-1-juzhe.zhong@rivai.ai/","msgid":"<20230410144808.324346-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T14:48:08","name":"machine_mode type size: Extend enum size from 8-bit to 16-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410144808.324346-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81592,"url":"https://patchwork.plctlab.org/api/1.2/patches/81592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-2-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:39","name":"[v3,01/10] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-2-patrick@rivosinc.com/mbox/"},{"id":81596,"url":"https://patchwork.plctlab.org/api/1.2/patches/81596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-3-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:40","name":"[v3,02/10] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-3-patrick@rivosinc.com/mbox/"},{"id":81598,"url":"https://patchwork.plctlab.org/api/1.2/patches/81598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-4-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:41","name":"[v3,03/10] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-4-patrick@rivosinc.com/mbox/"},{"id":81594,"url":"https://patchwork.plctlab.org/api/1.2/patches/81594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-5-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:42","name":"[v3,04/10] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-5-patrick@rivosinc.com/mbox/"},{"id":81601,"url":"https://patchwork.plctlab.org/api/1.2/patches/81601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-6-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:43","name":"[v3,05/10] RISCV: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-6-patrick@rivosinc.com/mbox/"},{"id":81593,"url":"https://patchwork.plctlab.org/api/1.2/patches/81593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-7-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:44","name":"[v3,06/10] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-7-patrick@rivosinc.com/mbox/"},{"id":81597,"url":"https://patchwork.plctlab.org/api/1.2/patches/81597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-8-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:45","name":"[v3,07/10] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-8-patrick@rivosinc.com/mbox/"},{"id":81603,"url":"https://patchwork.plctlab.org/api/1.2/patches/81603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-9-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:46","name":"[v3,08/10] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-9-patrick@rivosinc.com/mbox/"},{"id":81599,"url":"https://patchwork.plctlab.org/api/1.2/patches/81599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-10-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:47","name":"[v3,09/10] RISCV: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-10-patrick@rivosinc.com/mbox/"},{"id":81602,"url":"https://patchwork.plctlab.org/api/1.2/patches/81602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-11-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:48","name":"[v3,10/10] RISCV: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-11-patrick@rivosinc.com/mbox/"},{"id":81634,"url":"https://patchwork.plctlab.org/api/1.2/patches/81634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca740fe-9b24-4f46-9744-67b7dff20908-1681159786501@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-04-10T20:49:46","name":"Fortran: resolve correct generic with TYPE(C_PTR) arguments [PR61615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca740fe-9b24-4f46-9744-67b7dff20908-1681159786501@3c-app-gmx-bs33/mbox/"},{"id":81794,"url":"https://patchwork.plctlab.org/api/1.2/patches/81794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUWZffY5P/8o2OQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-11T08:12:21","name":"c++: Fix Solaris bootstraps across midnight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUWZffY5P/8o2OQ@tucnak/mbox/"},{"id":81798,"url":"https://patchwork.plctlab.org/api/1.2/patches/81798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUYpbs+dY6ly8a1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-11T08:21:57","name":"[RFC] range-op-float: Fix up op1_op2_relation of comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUYpbs+dY6ly8a1@tucnak/mbox/"},{"id":81866,"url":"https://patchwork.plctlab.org/api/1.2/patches/81866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DE18yJuM_Vn9jmaW05t8R6m5rNQ5niLUJVW93O09rR30Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-11T10:31:12","name":"fix compatability typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DE18yJuM_Vn9jmaW05t8R6m5rNQ5niLUJVW93O09rR30Q@mail.gmail.com/mbox/"},{"id":81898,"url":"https://patchwork.plctlab.org/api/1.2/patches/81898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com/","msgid":"<95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com>","list_archive_url":null,"date":"2023-04-11T11:22:15","name":"[committed] gfortran.dg/gomp/affinity-clause-1.f90: Fix scan-tree-dump (was: [r13-7120 Regression] FAIL: gfortran.dg/gomp/affinity-clause-1.f90 -O scan-tree-dump-times original \"#pragma omp task affinity\\\\(iterator\\\\(integer\\\\(kind=4\\\\) i=D\\\\.[0-9]+:5:1\\\\","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com/mbox/"},{"id":81905,"url":"https://patchwork.plctlab.org/api/1.2/patches/81905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411113748.1283643-1-yanzhang.wang@intel.com/","msgid":"<20230411113748.1283643-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-11T11:37:48","name":"[v5] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411113748.1283643-1-yanzhang.wang@intel.com/mbox/"},{"id":81964,"url":"https://patchwork.plctlab.org/api/1.2/patches/81964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com/","msgid":"<9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com>","list_archive_url":null,"date":"2023-04-11T13:37:18","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com/mbox/"},{"id":81965,"url":"https://patchwork.plctlab.org/api/1.2/patches/81965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C59672BF-7ECB-458D-9DF1-ED5FB430A60D@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-11T13:38:29","name":"[V6,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C59672BF-7ECB-458D-9DF1-ED5FB430A60D@oracle.com/mbox/"},{"id":82013,"url":"https://patchwork.plctlab.org/api/1.2/patches/82013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de/","msgid":"<846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de>","list_archive_url":null,"date":"2023-04-11T14:54:42","name":"[v2] Fortran: resolve correct generic with TYPE(C_PTR) arguments [PR61615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de/mbox/"},{"id":82016,"url":"https://patchwork.plctlab.org/api/1.2/patches/82016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145831.2862333-1-ppalka@redhat.com/","msgid":"<20230411145831.2862333-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-11T14:58:31","name":"libstdc++: Implement LWG 3904 change to lazy_split_view'\''s iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145831.2862333-1-ppalka@redhat.com/mbox/"},{"id":82019,"url":"https://patchwork.plctlab.org/api/1.2/patches/82019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145838.2862361-1-ppalka@redhat.com/","msgid":"<20230411145838.2862361-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-11T14:58:38","name":"libstdc++: Implement ranges::enumerate_view from P2164R9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145838.2862361-1-ppalka@redhat.com/mbox/"},{"id":82144,"url":"https://patchwork.plctlab.org/api/1.2/patches/82144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com/","msgid":"<82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com>","list_archive_url":null,"date":"2023-04-11T18:47:01","name":"Fix ICEs related to VM types in C [PR106465, PR107557, PR108424, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com/mbox/"},{"id":82150,"url":"https://patchwork.plctlab.org/api/1.2/patches/82150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411190320.13717-1-palmer@rivosinc.com/","msgid":"<20230411190320.13717-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-11T19:03:21","name":"RISC-V: Clean up the pr106602.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411190320.13717-1-palmer@rivosinc.com/mbox/"},{"id":82166,"url":"https://patchwork.plctlab.org/api/1.2/patches/82166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net/","msgid":"<87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-11T20:07:15","name":"libgm2: Adjust '\''autogen.sh'\'' to '\''ACLOCAL_AMFLAGS'\'', and simplify (was: [PATCH v3 8/19] modula2 front end: libgm2 contents)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net/mbox/"},{"id":82187,"url":"https://patchwork.plctlab.org/api/1.2/patches/82187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411201031.22067-1-palmer@rivosinc.com/","msgid":"<20230411201031.22067-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-11T20:10:32","name":"RISC-V: Force ilp32d for the T-Head FMV test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411201031.22067-1-palmer@rivosinc.com/mbox/"},{"id":82168,"url":"https://patchwork.plctlab.org/api/1.2/patches/82168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-101ecbef-9191-4532-b100-478605966705-1681243959761@3c-app-gmx-bs42/","msgid":"","list_archive_url":null,"date":"2023-04-11T20:12:39","name":"Fortran: fix functions with entry and pointer/allocatable result [PR104312]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-101ecbef-9191-4532-b100-478605966705-1681243959761@3c-app-gmx-bs42/mbox/"},{"id":82213,"url":"https://patchwork.plctlab.org/api/1.2/patches/82213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com/","msgid":"<951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com>","list_archive_url":null,"date":"2023-04-11T23:52:29","name":"PR tree-optimization/109462 - Don'\''t use ANY PHI equivalences in range-on-entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com/mbox/"},{"id":82228,"url":"https://patchwork.plctlab.org/api/1.2/patches/82228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/edf564ae-4312-cdd2-39a9-1e9c1ef68454@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T02:27:22","name":"[rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/edf564ae-4312-cdd2-39a9-1e9c1ef68454@linux.ibm.com/mbox/"},{"id":82268,"url":"https://patchwork.plctlab.org/api/1.2/patches/82268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412060845.981953-1-guojiufu@linux.ibm.com/","msgid":"<20230412060845.981953-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-12T06:08:45","name":"testsuite: filter out warning noise for CWE-1341 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412060845.981953-1-guojiufu@linux.ibm.com/mbox/"},{"id":82278,"url":"https://patchwork.plctlab.org/api/1.2/patches/82278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064931.EF1553858C5F@sourceware.org/","msgid":"<20230412064931.EF1553858C5F@sourceware.org>","list_archive_url":null,"date":"2023-04-12T06:48:47","name":"tree-optimization/109469 - SLP with returns-twice region start","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064931.EF1553858C5F@sourceware.org/mbox/"},{"id":82279,"url":"https://patchwork.plctlab.org/api/1.2/patches/82279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064946.231153856940@sourceware.org/","msgid":"<20230412064946.231153856940@sourceware.org>","list_archive_url":null,"date":"2023-04-12T06:49:01","name":"tree-optimization/109434 - bogus DSE of throwing call LHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064946.231153856940@sourceware.org/mbox/"},{"id":82361,"url":"https://patchwork.plctlab.org/api/1.2/patches/82361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDaBpPyA/XiPOvjw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T10:02:12","name":"combine, v3: Fix AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDaBpPyA/XiPOvjw@tucnak/mbox/"},{"id":82366,"url":"https://patchwork.plctlab.org/api/1.2/patches/82366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412102406.9F5BC3858C83@sourceware.org/","msgid":"<20230412102406.9F5BC3858C83@sourceware.org>","list_archive_url":null,"date":"2023-04-12T10:23:20","name":"tree-optimization/109473 - ICE with reduction epilog adjustment op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412102406.9F5BC3858C83@sourceware.org/mbox/"},{"id":82384,"url":"https://patchwork.plctlab.org/api/1.2/patches/82384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412110846.308184-1-juzhe.zhong@rivai.ai/","msgid":"<20230412110846.308184-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-12T11:08:46","name":"RISC-V: Fix PR109479","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412110846.308184-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82432,"url":"https://patchwork.plctlab.org/api/1.2/patches/82432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412121648.1394569-1-xry111@xry111.site/","msgid":"<20230412121648.1394569-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-12T12:16:48","name":"[GCC14] LoongArch: Improve cpymemsi expansion [PR109465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412121648.1394569-1-xry111@xry111.site/mbox/"},{"id":82442,"url":"https://patchwork.plctlab.org/api/1.2/patches/82442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122848.114135-1-jwakely@redhat.com/","msgid":"<20230412122848.114135-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T12:28:48","name":"[committed] libstdc++: Update tzdata to 2023c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122848.114135-1-jwakely@redhat.com/mbox/"},{"id":82444,"url":"https://patchwork.plctlab.org/api/1.2/patches/82444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122856.114242-1-jwakely@redhat.com/","msgid":"<20230412122856.114242-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T12:28:56","name":"[committed] libstdc++: Initialize all members of basic_endpoint union [PR109482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122856.114242-1-jwakely@redhat.com/mbox/"},{"id":82475,"url":"https://patchwork.plctlab.org/api/1.2/patches/82475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412131840.29214-1-shiyulong@iscas.ac.cn/","msgid":"<20230412131840.29214-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-12T13:18:40","name":"[V5] Testsuite: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412131840.29214-1-shiyulong@iscas.ac.cn/mbox/"},{"id":82505,"url":"https://patchwork.plctlab.org/api/1.2/patches/82505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCm5V4E2fea4WvTB55Vv2NbZ-x8h3LZX1mUCk-bQbi+XDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T13:39:26","name":"mingw: Support building with older gcc versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCm5V4E2fea4WvTB55Vv2NbZ-x8h3LZX1mUCk-bQbi+XDQ@mail.gmail.com/mbox/"},{"id":82506,"url":"https://patchwork.plctlab.org/api/1.2/patches/82506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412134502.3147419-1-ppalka@redhat.com/","msgid":"<20230412134502.3147419-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-12T13:45:02","name":"libstdc++: Ensure headers used by fast_float are included","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412134502.3147419-1-ppalka@redhat.com/mbox/"},{"id":82507,"url":"https://patchwork.plctlab.org/api/1.2/patches/82507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412135605.205032-1-juzhe.zhong@rivai.ai/","msgid":"<20230412135605.205032-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-12T13:56:05","name":"RISC-V: Fix pr109479 RVV ISA inconsistency bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412135605.205032-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82512,"url":"https://patchwork.plctlab.org/api/1.2/patches/82512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDa//e6L7ZDXn13x@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T14:28:13","name":"i386: Fix up z operand modifier diagnostics on inline-asm [PR109458]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDa//e6L7ZDXn13x@tucnak/mbox/"},{"id":82513,"url":"https://patchwork.plctlab.org/api/1.2/patches/82513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbB+n2lzHZoH6q5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T14:36:42","name":"reassoc: Fix up another ICE with returns_twice call [PR109410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbB+n2lzHZoH6q5@tucnak/mbox/"},{"id":82515,"url":"https://patchwork.plctlab.org/api/1.2/patches/82515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412144124.3356890-1-ppalka@redhat.com/","msgid":"<20230412144124.3356890-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-12T14:41:24","name":"libstdc++: Fix chunk_by_view when value_type& and reference differ [PR108291]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412144124.3356890-1-ppalka@redhat.com/mbox/"},{"id":82527,"url":"https://patchwork.plctlab.org/api/1.2/patches/82527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJJYwM1w_ECV-GgpoauKa8LT+08u3c4XAEpBGosZSxnkA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T15:25:06","name":"[fortran] PR109451 - ICE in gfc_conv_expr_descriptor with ASSOCIATE and substrings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJJYwM1w_ECV-GgpoauKa8LT+08u3c4XAEpBGosZSxnkA@mail.gmail.com/mbox/"},{"id":82577,"url":"https://patchwork.plctlab.org/api/1.2/patches/82577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbjI34T20ewQ2qs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T16:58:11","name":"combine, v4: Fix AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbjI34T20ewQ2qs@tucnak/mbox/"},{"id":82689,"url":"https://patchwork.plctlab.org/api/1.2/patches/82689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223011.207158-1-jwakely@redhat.com/","msgid":"<20230412223011.207158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T22:30:11","name":"[committed] libstdc++: Document libstdc++exp.a library for -fcontracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223011.207158-1-jwakely@redhat.com/mbox/"},{"id":82690,"url":"https://patchwork.plctlab.org/api/1.2/patches/82690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223036.207238-1-jwakely@redhat.com/","msgid":"<20230412223036.207238-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T22:30:36","name":"[committed] libstdc++: Fix some AIX test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223036.207238-1-jwakely@redhat.com/mbox/"},{"id":82939,"url":"https://patchwork.plctlab.org/api/1.2/patches/82939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413115126.1568212-1-chenglulu@loongson.cn/","msgid":"<20230413115126.1568212-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-13T11:51:26","name":"LoongArch: Remove the definition of the macro LOGICAL_OP_NON_SHORT_CIRCUIT under the architecture and use the default definition instead.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413115126.1568212-1-chenglulu@loongson.cn/mbox/"},{"id":82944,"url":"https://patchwork.plctlab.org/api/1.2/patches/82944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413122722.335227-1-juzhe.zhong@rivai.ai/","msgid":"<20230413122722.335227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-13T12:27:22","name":"RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413122722.335227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82950,"url":"https://patchwork.plctlab.org/api/1.2/patches/82950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413130105.2925A3856DD2@sourceware.org/","msgid":"<20230413130105.2925A3856DD2@sourceware.org>","list_archive_url":null,"date":"2023-04-13T13:00:20","name":"tree-optimization/109491 - ICE in expressions_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413130105.2925A3856DD2@sourceware.org/mbox/"},{"id":82987,"url":"https://patchwork.plctlab.org/api/1.2/patches/82987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GEHnWpNMrY9=rPPtRkcq=m1zJQZ5dd3QOijNPCJN+i+og@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T13:38:49","name":"[RFC] c++/new-warning: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GEHnWpNMrY9=rPPtRkcq=m1zJQZ5dd3QOijNPCJN+i+og@mail.gmail.com/mbox/"},{"id":82991,"url":"https://patchwork.plctlab.org/api/1.2/patches/82991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDgHd4qtTuRk3r7H@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-13T13:45:27","name":"loop-iv: Fix up bounds computation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDgHd4qtTuRk3r7H@tucnak/mbox/"},{"id":83020,"url":"https://patchwork.plctlab.org/api/1.2/patches/83020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413151018.31791-1-palmer@rivosinc.com/","msgid":"<20230413151018.31791-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-13T15:10:19","name":"RISC-V: Set the ABI for the RVV tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413151018.31791-1-palmer@rivosinc.com/mbox/"},{"id":83027,"url":"https://patchwork.plctlab.org/api/1.2/patches/83027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5zbhiwq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T16:00:05","name":"aarch64: Don'\''t trust TYPE_ALIGN for pointers [PR108910]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5zbhiwq.fsf@arm.com/mbox/"},{"id":83051,"url":"https://patchwork.plctlab.org/api/1.2/patches/83051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8cece7402f7d9d125542747a58f308e3eda625f.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T17:58:38","name":"rs6000: Fix test int_128bit-runnable.c instruction counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8cece7402f7d9d125542747a58f308e3eda625f.camel@us.ibm.com/mbox/"},{"id":83064,"url":"https://patchwork.plctlab.org/api/1.2/patches/83064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-1-jason@redhat.com/","msgid":"<20230413185921.2201433-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-13T18:59:20","name":"[1/2] c++: make cxx_incomplete_type_diagnostic return bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-1-jason@redhat.com/mbox/"},{"id":83065,"url":"https://patchwork.plctlab.org/api/1.2/patches/83065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-2-jason@redhat.com/","msgid":"<20230413185921.2201433-2-jason@redhat.com>","list_archive_url":null,"date":"2023-04-13T18:59:21","name":"[2/2] c++: make trait of incomplete type a permerror [PR109277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-2-jason@redhat.com/mbox/"},{"id":83073,"url":"https://patchwork.plctlab.org/api/1.2/patches/83073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7e61083e9a2a8154a18a6c4ffe22ae8751ad3f0.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T19:42:34","name":"rs6000: Fix test gc.target/powerpc/rs600-fpint.c test options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7e61083e9a2a8154a18a6c4ffe22ae8751ad3f0.camel@us.ibm.com/mbox/"},{"id":83087,"url":"https://patchwork.plctlab.org/api/1.2/patches/83087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1756a8e41b03138f8db58899799a4539812ecf1.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T20:47:11","name":"rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1756a8e41b03138f8db58899799a4539812ecf1.camel@us.ibm.com/mbox/"},{"id":83088,"url":"https://patchwork.plctlab.org/api/1.2/patches/83088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413205208.465-1-palmer@rivosinc.com/","msgid":"<20230413205208.465-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-13T20:52:09","name":"RISC-V: Update multilib-generator to handle V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413205208.465-1-palmer@rivosinc.com/mbox/"},{"id":83089,"url":"https://patchwork.plctlab.org/api/1.2/patches/83089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1425ad38-6282-46fc-a74b-066ba172025d-1681419417716@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-04-13T20:56:57","name":"[committed] Fortran: call of overloaded ???abs(long long int&)??? is ambiguous [PR109492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1425ad38-6282-46fc-a74b-066ba172025d-1681419417716@3c-app-gmx-bs50/mbox/"},{"id":83132,"url":"https://patchwork.plctlab.org/api/1.2/patches/83132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413232157.1487389-1-philipp.tomsich@vrull.eu/","msgid":"<20230413232157.1487389-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-04-13T23:21:57","name":"aarch64: disable LDP via tuning structure for -mcpu=ampere1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413232157.1487389-1-philipp.tomsich@vrull.eu/mbox/"},{"id":83171,"url":"https://patchwork.plctlab.org/api/1.2/patches/83171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414014518.15458-1-juzhe.zhong@rivai.ai/","msgid":"<20230414014518.15458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-14T01:45:18","name":"RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414014518.15458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":83191,"url":"https://patchwork.plctlab.org/api/1.2/patches/83191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414023238.2921142-1-pan2.li@intel.com/","msgid":"<20230414023238.2921142-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T02:32:38","name":"RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414023238.2921142-1-pan2.li@intel.com/mbox/"},{"id":83196,"url":"https://patchwork.plctlab.org/api/1.2/patches/83196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414024529.2930664-1-pan2.li@intel.com/","msgid":"<20230414024529.2930664-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T02:45:29","name":"[v2] RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414024529.2930664-1-pan2.li@intel.com/mbox/"},{"id":83204,"url":"https://patchwork.plctlab.org/api/1.2/patches/83204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414032511.2958280-1-pan2.li@intel.com/","msgid":"<20230414032511.2958280-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T03:25:11","name":"[v3] RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414032511.2958280-1-pan2.li@intel.com/mbox/"},{"id":83212,"url":"https://patchwork.plctlab.org/api/1.2/patches/83212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040038.1498807-1-ppalka@redhat.com/","msgid":"<20230414040038.1498807-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:38","name":"libstdc++: Implement ranges::fold_* from P2322R6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040038.1498807-1-ppalka@redhat.com/mbox/"},{"id":83211,"url":"https://patchwork.plctlab.org/api/1.2/patches/83211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-1-ppalka@redhat.com/","msgid":"<20230414040042.1498825-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:41","name":"[1/2] libstdc++: Move down definitions of ranges::cbegin/cend/cetc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-1-ppalka@redhat.com/mbox/"},{"id":83213,"url":"https://patchwork.plctlab.org/api/1.2/patches/83213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-2-ppalka@redhat.com/","msgid":"<20230414040042.1498825-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:42","name":"[2/2] libstdc++: Implement P2278R4 \"cbegin should always return a constant iterator\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-2-ppalka@redhat.com/mbox/"},{"id":83257,"url":"https://patchwork.plctlab.org/api/1.2/patches/83257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff0c733d75a54aa59a3c29aa9085b09e@ex13mbxc01n01.ikhex.ikoula.com/","msgid":"","list_archive_url":null,"date":"2023-04-14T07:02:35","name":"aarch64: Add -mveclibabi=sleefgnu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff0c733d75a54aa59a3c29aa9085b09e@ex13mbxc01n01.ikhex.ikoula.com/mbox/"},{"id":83261,"url":"https://patchwork.plctlab.org/api/1.2/patches/83261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414073026.2766449-1-guojiufu@linux.ibm.com/","msgid":"<20230414073026.2766449-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-14T07:30:26","name":"testsuite: update builtins-5-p9-runnable.c for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414073026.2766449-1-guojiufu@linux.ibm.com/mbox/"},{"id":83296,"url":"https://patchwork.plctlab.org/api/1.2/patches/83296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com/","msgid":"<1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com>","list_archive_url":null,"date":"2023-04-14T08:41:37","name":"PATCH] tree-ssa-sink: Add heuristics for code sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com/mbox/"},{"id":83314,"url":"https://patchwork.plctlab.org/api/1.2/patches/83314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094255.F02F313498@imap2.suse-dmz.suse.de/","msgid":"<20230414094255.F02F313498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T09:42:55","name":"Fix vect-simd-clone testcase dump scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094255.F02F313498@imap2.suse-dmz.suse.de/mbox/"},{"id":83315,"url":"https://patchwork.plctlab.org/api/1.2/patches/83315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094525.1645E13498@imap2.suse-dmz.suse.de/","msgid":"<20230414094525.1645E13498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T09:45:24","name":"tree-optimization/109502 - vector conversion between mask and non-mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094525.1645E13498@imap2.suse-dmz.suse.de/mbox/"},{"id":83349,"url":"https://patchwork.plctlab.org/api/1.2/patches/83349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414110022.359953-1-jwakely@redhat.com/","msgid":"<20230414110022.359953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-14T11:00:22","name":"[committed] libstdc++: Improve diagnostics for invalid std::format calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414110022.359953-1-jwakely@redhat.com/mbox/"},{"id":83371,"url":"https://patchwork.plctlab.org/api/1.2/patches/83371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414113222.A977613498@imap2.suse-dmz.suse.de/","msgid":"<20230414113222.A977613498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T11:32:22","name":"vect-simd-clone testcase adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414113222.A977613498@imap2.suse-dmz.suse.de/mbox/"},{"id":83523,"url":"https://patchwork.plctlab.org/api/1.2/patches/83523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-2-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:33","name":"[v4,01/10] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-2-patrick@rivosinc.com/mbox/"},{"id":83524,"url":"https://patchwork.plctlab.org/api/1.2/patches/83524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-3-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:34","name":"[v4,02/10] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-3-patrick@rivosinc.com/mbox/"},{"id":83525,"url":"https://patchwork.plctlab.org/api/1.2/patches/83525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-4-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:35","name":"[v4,03/10] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-4-patrick@rivosinc.com/mbox/"},{"id":83526,"url":"https://patchwork.plctlab.org/api/1.2/patches/83526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-5-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:36","name":"[v4,04/10] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-5-patrick@rivosinc.com/mbox/"},{"id":83529,"url":"https://patchwork.plctlab.org/api/1.2/patches/83529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-6-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:37","name":"[v4,05/10] RISCV: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-6-patrick@rivosinc.com/mbox/"},{"id":83530,"url":"https://patchwork.plctlab.org/api/1.2/patches/83530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-7-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:38","name":"[v4,06/10] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-7-patrick@rivosinc.com/mbox/"},{"id":83531,"url":"https://patchwork.plctlab.org/api/1.2/patches/83531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-8-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:39","name":"[v4,07/10] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-8-patrick@rivosinc.com/mbox/"},{"id":83532,"url":"https://patchwork.plctlab.org/api/1.2/patches/83532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-9-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:40","name":"[v4,08/10] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-9-patrick@rivosinc.com/mbox/"},{"id":83527,"url":"https://patchwork.plctlab.org/api/1.2/patches/83527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-10-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:41","name":"[v4,09/10] RISCV: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-10-patrick@rivosinc.com/mbox/"},{"id":83528,"url":"https://patchwork.plctlab.org/api/1.2/patches/83528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-11-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:42","name":"[v4,10/10] RISCV: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-11-patrick@rivosinc.com/mbox/"},{"id":83533,"url":"https://patchwork.plctlab.org/api/1.2/patches/83533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmK22caxA60IKzF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-14T17:18:19","name":"Disable X86_TUNE_AVX256_MOVE_BY_PIECES and STORE_BY_PIECES for znver1-3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmK22caxA60IKzF@kam.mff.cuni.cz/mbox/"},{"id":83550,"url":"https://patchwork.plctlab.org/api/1.2/patches/83550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414180543.1497603-1-philipp.tomsich@vrull.eu/","msgid":"<20230414180543.1497603-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-04-14T18:05:43","name":"[v2] aarch64: disable LDP via tuning structure for -mcpu=ampere1/1a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414180543.1497603-1-philipp.tomsich@vrull.eu/mbox/"},{"id":83553,"url":"https://patchwork.plctlab.org/api/1.2/patches/83553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1927733.PYKUYFuaPT@fomalhaut/","msgid":"<1927733.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2023-04-14T18:18:30","name":"[Ada] Fix PR bootstrap/109510","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1927733.PYKUYFuaPT@fomalhaut/mbox/"},{"id":83560,"url":"https://patchwork.plctlab.org/api/1.2/patches/83560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d5a880c2-3bb0-4464-9940-ac3568977112-1681498764042@3c-app-gmx-bs43/","msgid":"","list_archive_url":null,"date":"2023-04-14T18:59:24","name":"Fortran: fix compile-time simplification of SET_EXPONENT [PR109511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d5a880c2-3bb0-4464-9940-ac3568977112-1681498764042@3c-app-gmx-bs43/mbox/"},{"id":83562,"url":"https://patchwork.plctlab.org/api/1.2/patches/83562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmmXMae9glt4ABn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-14T19:15:40","name":"c: Fix up error-recovery on functions initialized as variables [PR109412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmmXMae9glt4ABn@tucnak/mbox/"},{"id":83563,"url":"https://patchwork.plctlab.org/api/1.2/patches/83563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmnkLaA8EX5RyFz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-14T19:20:48","name":"c: Fix up error-recovery on non-empty VLA initializers [PR109409]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmnkLaA8EX5RyFz@tucnak/mbox/"},{"id":83564,"url":"https://patchwork.plctlab.org/api/1.2/patches/83564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-1-ppalka@redhat.com/","msgid":"<20230414194512.2569383-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T19:45:11","name":"[1/2] libstdc++: Convert _RangeAdaptorClosure into a CRTP class [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-1-ppalka@redhat.com/mbox/"},{"id":83566,"url":"https://patchwork.plctlab.org/api/1.2/patches/83566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-2-ppalka@redhat.com/","msgid":"<20230414194512.2569383-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T19:45:12","name":"[2/2] libstdc++: Implement range_adaptor_closure from P2387R3 [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-2-ppalka@redhat.com/mbox/"},{"id":83575,"url":"https://patchwork.plctlab.org/api/1.2/patches/83575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414215115.2011733E1A@hamza.pair.com/","msgid":"<20230414215115.2011733E1A@hamza.pair.com>","list_archive_url":null,"date":"2023-04-14T21:51:12","name":"[pushed] wwwdocs: codingconventions: Recommend \"file name\" over \"filename\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414215115.2011733E1A@hamza.pair.com/mbox/"},{"id":83584,"url":"https://patchwork.plctlab.org/api/1.2/patches/83584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414234224.2870389-1-jason@redhat.com/","msgid":"<20230414234224.2870389-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-14T23:42:24","name":"[RFA] -Wdangling-pointer: fix MEM_REF handling [PR109514]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414234224.2870389-1-jason@redhat.com/mbox/"},{"id":83650,"url":"https://patchwork.plctlab.org/api/1.2/patches/83650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDpVL1KlzxWJKDzy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-15T07:41:37","name":"if-conv: Small improvement for expansion of complex PHIs [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDpVL1KlzxWJKDzy@tucnak/mbox/"},{"id":83715,"url":"https://patchwork.plctlab.org/api/1.2/patches/83715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415120105.131576-1-xry111@xry111.site/","msgid":"<20230415120105.131576-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-15T12:01:05","name":"build: Use -nostdinc generating macro_list [PR109522]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415120105.131576-1-xry111@xry111.site/mbox/"},{"id":83738,"url":"https://patchwork.plctlab.org/api/1.2/patches/83738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415163449.3236640-1-jason@redhat.com/","msgid":"<20230415163449.3236640-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-15T16:34:49","name":"[pushed] c++: constexpr aggregate destruction [PR109357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415163449.3236640-1-jason@redhat.com/mbox/"},{"id":83764,"url":"https://patchwork.plctlab.org/api/1.2/patches/83764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDrlXTk8H87+cvkM@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-15T17:56:45","name":"[committed] hppa: Fix handling of large arguments passed by value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDrlXTk8H87+cvkM@mx3210.localdomain/mbox/"},{"id":83843,"url":"https://patchwork.plctlab.org/api/1.2/patches/83843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com/","msgid":"<00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-16T12:07:34","name":"[Committed] New test case gcc.target/avr/pr54816.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com/mbox/"},{"id":83872,"url":"https://patchwork.plctlab.org/api/1.2/patches/83872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3753c6-05e5-c321-c821-22381f4ff6ac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-16T13:20:51","name":"tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3753c6-05e5-c321-c821-22381f4ff6ac@linux.ibm.com/mbox/"},{"id":83899,"url":"https://patchwork.plctlab.org/api/1.2/patches/83899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com/","msgid":"<9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com>","list_archive_url":null,"date":"2023-04-16T15:57:06","name":"[committed,PR,target/109508] Adjust conditional move expansion for SFB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com/mbox/"},{"id":83936,"url":"https://patchwork.plctlab.org/api/1.2/patches/83936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GGZ6UmK=i_ozcv6Gz0mqVKg2W3oeYsCYeQ5U_CK5VtNqA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-16T21:33:22","name":"c++: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GGZ6UmK=i_ozcv6Gz0mqVKg2W3oeYsCYeQ5U_CK5VtNqA@mail.gmail.com/mbox/"},{"id":83948,"url":"https://patchwork.plctlab.org/api/1.2/patches/83948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417015358.100811-1-kito.cheng@sifive.com/","msgid":"<20230417015358.100811-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-17T01:53:58","name":"[committed] RISC-V: Fix testsuite fail on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417015358.100811-1-kito.cheng@sifive.com/mbox/"},{"id":83950,"url":"https://patchwork.plctlab.org/api/1.2/patches/83950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417023919.7015-1-fanpeng@loongson.cn/","msgid":"<20230417023919.7015-1-fanpeng@loongson.cn>","list_archive_url":null,"date":"2023-04-17T02:39:19","name":"LoongArch: fix MUSL_DYNAMIC_LINKER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417023919.7015-1-fanpeng@loongson.cn/mbox/"},{"id":83984,"url":"https://patchwork.plctlab.org/api/1.2/patches/83984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034540.2645965-1-ppalka@redhat.com/","msgid":"<20230417034540.2645965-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T03:45:40","name":"libstdc++: Adding missing feature-test macros for C++23 ranges algos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034540.2645965-1-ppalka@redhat.com/mbox/"},{"id":83983,"url":"https://patchwork.plctlab.org/api/1.2/patches/83983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034553.2646005-1-ppalka@redhat.com/","msgid":"<20230417034553.2646005-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T03:45:53","name":"libstdc++: Fix typo in views::as_const'\''s operator() [PR109525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034553.2646005-1-ppalka@redhat.com/mbox/"},{"id":84011,"url":"https://patchwork.plctlab.org/api/1.2/patches/84011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417061754.1879-1-juzhe.zhong@rivai.ai/","msgid":"<20230417061754.1879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-17T06:17:54","name":"RISC-V: Add tuple type builtins for segment intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417061754.1879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84060,"url":"https://patchwork.plctlab.org/api/1.2/patches/84060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417084222.B13A23858288@sourceware.org/","msgid":"<20230417084222.B13A23858288@sourceware.org>","list_archive_url":null,"date":"2023-04-17T08:41:38","name":"tree-optimization/109524 - ICE with VRP edge removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417084222.B13A23858288@sourceware.org/mbox/"},{"id":84069,"url":"https://patchwork.plctlab.org/api/1.2/patches/84069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD0Ptanfl7QKBohQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-17T09:21:57","name":"testsuite: Fix up vect-simd-clone-1[678]f.c tests some more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD0Ptanfl7QKBohQ@tucnak/mbox/"},{"id":84161,"url":"https://patchwork.plctlab.org/api/1.2/patches/84161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edoizsln.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-04-17T10:54:44","name":"ipa: Fix double reference-count decrements for the same edge (PR 107769, PR 109318)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edoizsln.fsf@suse.cz/mbox/"},{"id":84187,"url":"https://patchwork.plctlab.org/api/1.2/patches/84187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2304171139240.4466@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2023-04-17T11:39:40","name":"[www] Move -fstrict-flex-arrays entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2304171139240.4466@jbgna.fhfr.qr/mbox/"},{"id":84208,"url":"https://patchwork.plctlab.org/api/1.2/patches/84208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz/","msgid":"<41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz>","list_archive_url":null,"date":"2023-04-17T12:50:55","name":"[(pushed)] ada: bump Library_Version to 14.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz/mbox/"},{"id":84254,"url":"https://patchwork.plctlab.org/api/1.2/patches/84254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417133916.3110637-1-ppalka@redhat.com/","msgid":"<20230417133916.3110637-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T13:39:16","name":"libstdc++: Implement P2770R0 changes to join_view / join_with_view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417133916.3110637-1-ppalka@redhat.com/mbox/"},{"id":84276,"url":"https://patchwork.plctlab.org/api/1.2/patches/84276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417145025.2291874-1-pan2.li@intel.com/","msgid":"<20230417145025.2291874-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-17T14:50:25","name":"RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417145025.2291874-1-pan2.li@intel.com/mbox/"},{"id":84353,"url":"https://patchwork.plctlab.org/api/1.2/patches/84353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417163856.2253309-1-kevinl@rivosinc.com/","msgid":"<20230417163856.2253309-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T16:38:56","name":"[v3] vect: Verify that GET_MODE_UNITS is greater than one for vect_grouped_store_supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417163856.2253309-1-kevinl@rivosinc.com/mbox/"},{"id":84390,"url":"https://patchwork.plctlab.org/api/1.2/patches/84390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-2-palmer@rivosinc.com/","msgid":"<20230417182044.22425-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:42","name":"[13-backport,1/3] RISC-V: Clean up the pr106602.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-2-palmer@rivosinc.com/mbox/"},{"id":84391,"url":"https://patchwork.plctlab.org/api/1.2/patches/84391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-3-palmer@rivosinc.com/","msgid":"<20230417182044.22425-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:43","name":"[13-backport,2/3] RISC-V: Set the ABI for the RVV tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-3-palmer@rivosinc.com/mbox/"},{"id":84392,"url":"https://patchwork.plctlab.org/api/1.2/patches/84392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-4-palmer@rivosinc.com/","msgid":"<20230417182044.22425-4-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:44","name":"[13-backport,3/3] RISC-V: Force ilp32d for the T-Head FMV test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-4-palmer@rivosinc.com/mbox/"},{"id":84398,"url":"https://patchwork.plctlab.org/api/1.2/patches/84398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-2-collison@rivosinc.com/","msgid":"<20230417183701.2249183-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:52","name":"[v4,01/10] RISC-V: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-2-collison@rivosinc.com/mbox/"},{"id":84397,"url":"https://patchwork.plctlab.org/api/1.2/patches/84397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-3-collison@rivosinc.com/","msgid":"<20230417183701.2249183-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:53","name":"[v4,02/10] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-3-collison@rivosinc.com/mbox/"},{"id":84400,"url":"https://patchwork.plctlab.org/api/1.2/patches/84400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-4-collison@rivosinc.com/","msgid":"<20230417183701.2249183-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:54","name":"[v4,03/10] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-4-collison@rivosinc.com/mbox/"},{"id":84399,"url":"https://patchwork.plctlab.org/api/1.2/patches/84399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-5-collison@rivosinc.com/","msgid":"<20230417183701.2249183-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:55","name":"[v4,04/10] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-5-collison@rivosinc.com/mbox/"},{"id":84401,"url":"https://patchwork.plctlab.org/api/1.2/patches/84401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-6-collison@rivosinc.com/","msgid":"<20230417183701.2249183-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:56","name":"[v4,05/10] RISC-V:autovec: Add autovectorization patterns for binary integer operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-6-collison@rivosinc.com/mbox/"},{"id":84402,"url":"https://patchwork.plctlab.org/api/1.2/patches/84402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-7-collison@rivosinc.com/","msgid":"<20230417183701.2249183-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:57","name":"[v4,06/10] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-7-collison@rivosinc.com/mbox/"},{"id":84404,"url":"https://patchwork.plctlab.org/api/1.2/patches/84404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-8-collison@rivosinc.com/","msgid":"<20230417183701.2249183-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:58","name":"[v4,07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-8-collison@rivosinc.com/mbox/"},{"id":84405,"url":"https://patchwork.plctlab.org/api/1.2/patches/84405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-9-collison@rivosinc.com/","msgid":"<20230417183701.2249183-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:59","name":"[v4,08/10] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-9-collison@rivosinc.com/mbox/"},{"id":84403,"url":"https://patchwork.plctlab.org/api/1.2/patches/84403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-10-collison@rivosinc.com/","msgid":"<20230417183701.2249183-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:37:00","name":"[v4,09/10] This patch adds a guard for VNx1 vectors that are present in ports like riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-10-collison@rivosinc.com/mbox/"},{"id":84406,"url":"https://patchwork.plctlab.org/api/1.2/patches/84406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-11-collison@rivosinc.com/","msgid":"<20230417183701.2249183-11-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:37:01","name":"[v4,10/10] This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-11-collison@rivosinc.com/mbox/"},{"id":84407,"url":"https://patchwork.plctlab.org/api/1.2/patches/84407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183917.216257-1-aldyh@redhat.com/","msgid":"<20230417183917.216257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:39:18","name":"Abstract out calculation of max HWIs per wide int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183917.216257-1-aldyh@redhat.com/mbox/"},{"id":84408,"url":"https://patchwork.plctlab.org/api/1.2/patches/84408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184419.4043285-1-ppalka@redhat.com/","msgid":"<20230417184419.4043285-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:44:19","name":"c++: bound ttp level lowering [PR109531]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184419.4043285-1-ppalka@redhat.com/mbox/"},{"id":84409,"url":"https://patchwork.plctlab.org/api/1.2/patches/84409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184701.217397-1-aldyh@redhat.com/","msgid":"<20230417184701.217397-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:47:01","name":"[COMMITTED] Do not export global ranges from -Walloca pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184701.217397-1-aldyh@redhat.com/mbox/"},{"id":84413,"url":"https://patchwork.plctlab.org/api/1.2/patches/84413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417185223.245929-1-apinski@marvell.com/","msgid":"<20230417185223.245929-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T18:52:23","name":"[COMMITTED] PHIOPT: Remove gate_hoist_loads prototype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417185223.245929-1-apinski@marvell.com/mbox/"},{"id":84473,"url":"https://patchwork.plctlab.org/api/1.2/patches/84473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ana5uk0Xkmn=6rok+-uMpCsGwC8=i2mxHXGd+vNr0V5g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-17T21:27:28","name":"Introduce VIRTUAL_REGISTER_P and VIRTUAL_REGISTER_NUM_P predicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ana5uk0Xkmn=6rok+-uMpCsGwC8=i2mxHXGd+vNr0V5g@mail.gmail.com/mbox/"},{"id":84490,"url":"https://patchwork.plctlab.org/api/1.2/patches/84490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-1-apinski@marvell.com/","msgid":"<20230417221740.251864-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T22:17:39","name":"[1/2] PHIOPT: small cleanup in match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-1-apinski@marvell.com/mbox/"},{"id":84491,"url":"https://patchwork.plctlab.org/api/1.2/patches/84491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-2-apinski@marvell.com/","msgid":"<20230417221740.251864-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T22:17:40","name":"[2/2] PHIOPT: add folding/simplification detail to the dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-2-apinski@marvell.com/mbox/"},{"id":84542,"url":"https://patchwork.plctlab.org/api/1.2/patches/84542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418020311.36368-1-juzhe.zhong@rivai.ai/","msgid":"<20230418020311.36368-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T02:03:11","name":"RISC-V: Fix PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418020311.36368-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84562,"url":"https://patchwork.plctlab.org/api/1.2/patches/84562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7d4dad9-e410-c4f0-62f7-c3b6acdd7d70@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T03:13:52","name":"[PATCH-1,rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7d4dad9-e410-c4f0-62f7-c3b6acdd7d70@linux.ibm.com/mbox/"},{"id":84561,"url":"https://patchwork.plctlab.org/api/1.2/patches/84561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92ff30f-759a-2a1a-8086-511b3c0738b0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T03:13:57","name":"[PATCH-2,rs6000] Add ppc_cpu_supports_hw into proc is-effective-target-keyword [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92ff30f-759a-2a1a-8086-511b3c0738b0@linux.ibm.com/mbox/"},{"id":84579,"url":"https://patchwork.plctlab.org/api/1.2/patches/84579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418053314.222548-1-aldyh@redhat.com/","msgid":"<20230418053314.222548-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:33:14","name":"[COMMITTED] Constify invariant fields of vrange and irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418053314.222548-1-aldyh@redhat.com/mbox/"},{"id":84581,"url":"https://patchwork.plctlab.org/api/1.2/patches/84581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418054301.226604-1-aldyh@redhat.com/","msgid":"<20230418054301.226604-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:43:01","name":"[COMMITTED] Add two new methods to Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418054301.226604-1-aldyh@redhat.com/mbox/"},{"id":84584,"url":"https://patchwork.plctlab.org/api/1.2/patches/84584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418055934.245432-1-aldyh@redhat.com/","msgid":"<20230418055934.245432-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:59:34","name":"Abstract out REAL_VALUE_TYPE streaming.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418055934.245432-1-aldyh@redhat.com/mbox/"},{"id":84585,"url":"https://patchwork.plctlab.org/api/1.2/patches/84585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418061556.3455329-1-chenglulu@loongson.cn/","msgid":"<20230418061556.3455329-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T06:15:56","name":"gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418061556.3455329-1-chenglulu@loongson.cn/mbox/"},{"id":84592,"url":"https://patchwork.plctlab.org/api/1.2/patches/84592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418063041.2615-1-iain@sandoe.co.uk/","msgid":"<20230418063041.2615-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-04-18T06:30:41","name":"[pushed] libsanitizer, darwin: Unsupport Darwin >= 22 for now.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418063041.2615-1-iain@sandoe.co.uk/mbox/"},{"id":84603,"url":"https://patchwork.plctlab.org/api/1.2/patches/84603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065223.3862113-1-lin1.hu@intel.com/","msgid":"<20230418065223.3862113-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-04-18T06:52:23","name":"i386: Optimize vshuf{i, f}{32x4, 64x2} ymm and vperm{i, f}128 ymm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065223.3862113-1-lin1.hu@intel.com/mbox/"},{"id":84605,"url":"https://patchwork.plctlab.org/api/1.2/patches/84605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065514.4003416-1-haochen.jiang@intel.com/","msgid":"<20230418065514.4003416-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T06:55:14","name":"i386: Use macro to wrap up share builtin exceptions in builtin isa check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065514.4003416-1-haochen.jiang@intel.com/mbox/"},{"id":84607,"url":"https://patchwork.plctlab.org/api/1.2/patches/84607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070256.3964933-1-lin1.hu@intel.com/","msgid":"<20230418070256.3964933-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-04-18T07:02:56","name":"i386: Add reduce_*_ep[i|u][8|16] series intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070256.3964933-1-lin1.hu@intel.com/mbox/"},{"id":84611,"url":"https://patchwork.plctlab.org/api/1.2/patches/84611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-2-haochen.jiang@intel.com/","msgid":"<20230418070450.4114708-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:04:49","name":"[1/2] i386: Add AVX512BW dependency to AVX512BITALG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-2-haochen.jiang@intel.com/mbox/"},{"id":84612,"url":"https://patchwork.plctlab.org/api/1.2/patches/84612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-3-haochen.jiang@intel.com/","msgid":"<20230418070450.4114708-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:04:50","name":"[2/2] i386: Add AVX512BW dependency to AVX512VBMI2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-3-haochen.jiang@intel.com/mbox/"},{"id":84615,"url":"https://patchwork.plctlab.org/api/1.2/patches/84615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071105.4061135-1-chenglulu@loongson.cn/","msgid":"<20230418071105.4061135-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T07:11:07","name":"[v2] gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071105.4061135-1-chenglulu@loongson.cn/mbox/"},{"id":84616,"url":"https://patchwork.plctlab.org/api/1.2/patches/84616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071514.4115672-1-haochen.jiang@intel.com/","msgid":"<20230418071514.4115672-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:15:14","name":"i386: Fix vpblendm{b,w} intrins and insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071514.4115672-1-haochen.jiang@intel.com/mbox/"},{"id":84617,"url":"https://patchwork.plctlab.org/api/1.2/patches/84617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071804.4192513-1-haochen.jiang@intel.com/","msgid":"<20230418071804.4192513-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:18:04","name":"i386: Add PCLMUL dependency for VPCLMULQDQ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071804.4192513-1-haochen.jiang@intel.com/mbox/"},{"id":84618,"url":"https://patchwork.plctlab.org/api/1.2/patches/84618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071851.4192579-1-haochen.jiang@intel.com/","msgid":"<20230418071851.4192579-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:18:51","name":"i386: Share AES xmm intrin with VAES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071851.4192579-1-haochen.jiang@intel.com/mbox/"},{"id":84623,"url":"https://patchwork.plctlab.org/api/1.2/patches/84623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418072823.4192952-1-haochen.jiang@intel.com/","msgid":"<20230418072823.4192952-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:28:23","name":"i386: Share AES xmm intrin with VAES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418072823.4192952-1-haochen.jiang@intel.com/mbox/"},{"id":84631,"url":"https://patchwork.plctlab.org/api/1.2/patches/84631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418075441.24431-1-christophe.lyon@arm.com/","msgid":"<20230418075441.24431-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T07:54:41","name":"install.texi: Document --enable-decimal-float for AArch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418075441.24431-1-christophe.lyon@arm.com/mbox/"},{"id":84680,"url":"https://patchwork.plctlab.org/api/1.2/patches/84680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418084922.882434-1-chenglulu@loongson.cn/","msgid":"<20230418084922.882434-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T08:49:23","name":"[v3] gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418084922.882434-1-chenglulu@loongson.cn/mbox/"},{"id":84683,"url":"https://patchwork.plctlab.org/api/1.2/patches/84683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5Z3iovGmuMQ3C9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T08:50:38","name":"match.pd: Improve fneg/fadd optimization [PR109240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5Z3iovGmuMQ3C9@tucnak/mbox/"},{"id":84688,"url":"https://patchwork.plctlab.org/api/1.2/patches/84688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418085255.252125-1-aldyh@redhat.com/","msgid":"<20230418085255.252125-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T08:52:56","name":"Return true from operator== for two identical ranges containing NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418085255.252125-1-aldyh@redhat.com/mbox/"},{"id":84702,"url":"https://patchwork.plctlab.org/api/1.2/patches/84702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5dlaIu4zph3Opc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T09:06:29","name":"dse: Use SUBREG_REG for copy_to_mode_reg in DSE replace_read for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5dlaIu4zph3Opc@tucnak/mbox/"},{"id":84703,"url":"https://patchwork.plctlab.org/api/1.2/patches/84703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-1-aldyh@redhat.com/","msgid":"<20230418090637.253140-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T09:06:36","name":"Add support for vrange streaming.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-1-aldyh@redhat.com/mbox/"},{"id":84704,"url":"https://patchwork.plctlab.org/api/1.2/patches/84704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-2-aldyh@redhat.com/","msgid":"<20230418090637.253140-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T09:06:38","name":"Add inchash support for vrange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-2-aldyh@redhat.com/mbox/"},{"id":84706,"url":"https://patchwork.plctlab.org/api/1.2/patches/84706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090855.3012513-1-pan2.li@intel.com/","msgid":"<20230418090855.3012513-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-18T09:08:55","name":"[v2] RISC-V: Allow Vector IOR(V1, NOT V1) optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090855.3012513-1-pan2.li@intel.com/mbox/"},{"id":84710,"url":"https://patchwork.plctlab.org/api/1.2/patches/84710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418092649.156-1-jinma@linux.alibaba.com/","msgid":"<20230418092649.156-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-18T09:26:49","name":"RISC-V: Adjust the parsing order of extensions to be consistent with riscv-spec and binutils.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418092649.156-1-jinma@linux.alibaba.com/mbox/"},{"id":84714,"url":"https://patchwork.plctlab.org/api/1.2/patches/84714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5lUUaEJFNLt2eY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T09:39:29","name":"rust: Disable --enable-languages=rust and silently exclude it from --enable-languages=all for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5lUUaEJFNLt2eY@tucnak/mbox/"},{"id":84716,"url":"https://patchwork.plctlab.org/api/1.2/patches/84716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418094048.177-1-jinma@linux.alibaba.com/","msgid":"<20230418094048.177-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-18T09:40:48","name":"Fixed typo.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418094048.177-1-jinma@linux.alibaba.com/mbox/"},{"id":84734,"url":"https://patchwork.plctlab.org/api/1.2/patches/84734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jbkjljy58.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:13:55","name":"constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jbkjljy58.fsf@arm.com/mbox/"},{"id":84735,"url":"https://patchwork.plctlab.org/api/1.2/patches/84735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418101615.116219-1-kito.cheng@sifive.com/","msgid":"<20230418101615.116219-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-18T10:16:15","name":"Docs: Add doc for RISC-V vector intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418101615.116219-1-kito.cheng@sifive.com/mbox/"},{"id":84739,"url":"https://patchwork.plctlab.org/api/1.2/patches/84739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u0Z9FB39C6nmv@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:20:01","name":"[2/3] middle-end match.pd: simplify debug dump checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u0Z9FB39C6nmv@arm.com/mbox/"},{"id":84740,"url":"https://patchwork.plctlab.org/api/1.2/patches/84740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u7XMmQVeVJd82@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:20:29","name":"[3/3] middle-end RFC - match.pd: automatically partition *-match.cc files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u7XMmQVeVJd82@arm.com/mbox/"},{"id":84742,"url":"https://patchwork.plctlab.org/api/1.2/patches/84742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418103326.54716139CC@imap2.suse-dmz.suse.de/","msgid":"<20230418103326.54716139CC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T10:33:25","name":"tree-optimization/109539 - restrict PHI handling in access diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418103326.54716139CC@imap2.suse-dmz.suse.de/mbox/"},{"id":84761,"url":"https://patchwork.plctlab.org/api/1.2/patches/84761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d33bf196-1a6a-b95a-ec62-6521e69de2d5@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T11:24:29","name":"[committed] amdgcn: HardFP divide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d33bf196-1a6a-b95a-ec62-6521e69de2d5@codesourcery.com/mbox/"},{"id":84779,"url":"https://patchwork.plctlab.org/api/1.2/patches/84779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8ja5z5jtzm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T11:43:41","name":"[v3] constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8ja5z5jtzm.fsf@arm.com/mbox/"},{"id":84805,"url":"https://patchwork.plctlab.org/api/1.2/patches/84805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120451.10146-1-juzhe.zhong@rivai.ai/","msgid":"<20230418120451.10146-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T12:04:51","name":"RISC-V: Add tuple types support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120451.10146-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84817,"url":"https://patchwork.plctlab.org/api/1.2/patches/84817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120957.11046-1-juzhe.zhong@rivai.ai/","msgid":"<20230418120957.11046-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T12:09:57","name":"RISC-V: Add tuple types support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120957.11046-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84825,"url":"https://patchwork.plctlab.org/api/1.2/patches/84825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418121753.50830-1-xry111@xry111.site/","msgid":"<20230418121753.50830-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-18T12:17:53","name":"LoongArch: Set 4 * (issue rate) as the default for -falign-functions and -falign-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418121753.50830-1-xry111@xry111.site/mbox/"},{"id":84828,"url":"https://patchwork.plctlab.org/api/1.2/patches/84828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com/","msgid":"<36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com>","list_archive_url":null,"date":"2023-04-18T12:22:18","name":"[V2,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com/mbox/"},{"id":84836,"url":"https://patchwork.plctlab.org/api/1.2/patches/84836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418125928.307445-1-aldyh@redhat.com/","msgid":"<20230418125928.307445-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T12:59:28","name":"Declare dconstm0 to go along with dconst0 and friends.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418125928.307445-1-aldyh@redhat.com/mbox/"},{"id":84844,"url":"https://patchwork.plctlab.org/api/1.2/patches/84844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418131250.310916-1-aldyh@redhat.com/","msgid":"<20230418131250.310916-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T13:12:50","name":"Implement range-op entry for sin/cos.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418131250.310916-1-aldyh@redhat.com/mbox/"},{"id":84848,"url":"https://patchwork.plctlab.org/api/1.2/patches/84848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418133942.1FAC113581@imap2.suse-dmz.suse.de/","msgid":"<20230418133942.1FAC113581@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T13:39:41","name":"RAII auto_mpfr and autp_mpz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418133942.1FAC113581@imap2.suse-dmz.suse.de/mbox/"},{"id":84850,"url":"https://patchwork.plctlab.org/api/1.2/patches/84850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-2-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:47","name":"[01/22] arm: move builtin function codes into general numberspace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-2-christophe.lyon@arm.com/mbox/"},{"id":84853,"url":"https://patchwork.plctlab.org/api/1.2/patches/84853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-3-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:48","name":"[02/22] arm: [MVE intrinsics] Add new framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-3-christophe.lyon@arm.com/mbox/"},{"id":84855,"url":"https://patchwork.plctlab.org/api/1.2/patches/84855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-4-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:49","name":"[03/22] arm: [MVE intrinsics] Rework vreinterpretq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-4-christophe.lyon@arm.com/mbox/"},{"id":84856,"url":"https://patchwork.plctlab.org/api/1.2/patches/84856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-5-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:50","name":"[04/22] arm: [MVE intrinsics] Rework vuninitialized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-5-christophe.lyon@arm.com/mbox/"},{"id":84857,"url":"https://patchwork.plctlab.org/api/1.2/patches/84857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-6-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:51","name":"[05/22] arm: [MVE intrinsics] add binary_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-6-christophe.lyon@arm.com/mbox/"},{"id":84866,"url":"https://patchwork.plctlab.org/api/1.2/patches/84866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-7-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:52","name":"[06/22] arm: [MVE intrinsics] add unspec_based_mve_function_exact_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-7-christophe.lyon@arm.com/mbox/"},{"id":84858,"url":"https://patchwork.plctlab.org/api/1.2/patches/84858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-8-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:53","name":"[07/22] arm: [MVE intrinsics] factorize vadd vsubq vmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-8-christophe.lyon@arm.com/mbox/"},{"id":84861,"url":"https://patchwork.plctlab.org/api/1.2/patches/84861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-9-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:54","name":"[08/22] arm: [MVE intrinsics] rework vaddq vmulq vsubq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-9-christophe.lyon@arm.com/mbox/"},{"id":84862,"url":"https://patchwork.plctlab.org/api/1.2/patches/84862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-10-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:55","name":"[09/22] arm: [MVE intrinsics] add binary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-10-christophe.lyon@arm.com/mbox/"},{"id":84860,"url":"https://patchwork.plctlab.org/api/1.2/patches/84860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-11-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:56","name":"[10/22] arm: [MVE intrinsics] factorize vandq veorq vorrq vbicq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-11-christophe.lyon@arm.com/mbox/"},{"id":84870,"url":"https://patchwork.plctlab.org/api/1.2/patches/84870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-12-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:57","name":"[11/22] arm: [MVE intrinsics] rework vandq veorq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-12-christophe.lyon@arm.com/mbox/"},{"id":84872,"url":"https://patchwork.plctlab.org/api/1.2/patches/84872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-13-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:58","name":"[12/22] arm: [MVE intrinsics] add binary_orrq shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-13-christophe.lyon@arm.com/mbox/"},{"id":84869,"url":"https://patchwork.plctlab.org/api/1.2/patches/84869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-14-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:59","name":"[13/22] arm: [MVE intrinsics] rework vorrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-14-christophe.lyon@arm.com/mbox/"},{"id":84852,"url":"https://patchwork.plctlab.org/api/1.2/patches/84852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-15-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:00","name":"[14/22] arm: [MVE intrinsics] add unspec_mve_function_exact_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-15-christophe.lyon@arm.com/mbox/"},{"id":84859,"url":"https://patchwork.plctlab.org/api/1.2/patches/84859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-16-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:01","name":"[15/22] arm: [MVE intrinsics] add create shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-16-christophe.lyon@arm.com/mbox/"},{"id":84863,"url":"https://patchwork.plctlab.org/api/1.2/patches/84863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-17-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:02","name":"[16/22] arm: [MVE intrinsics] factorize vcreateq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-17-christophe.lyon@arm.com/mbox/"},{"id":84867,"url":"https://patchwork.plctlab.org/api/1.2/patches/84867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-18-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:03","name":"[17/22] arm: [MVE intrinsics] rework vcreateq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-18-christophe.lyon@arm.com/mbox/"},{"id":84877,"url":"https://patchwork.plctlab.org/api/1.2/patches/84877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-19-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:04","name":"[18/22] arm: [MVE intrinsics] factorize several binary_m operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-19-christophe.lyon@arm.com/mbox/"},{"id":84864,"url":"https://patchwork.plctlab.org/api/1.2/patches/84864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-20-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:05","name":"[19/22] arm: [MVE intrinsics] factorize several binary _n operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-20-christophe.lyon@arm.com/mbox/"},{"id":84865,"url":"https://patchwork.plctlab.org/api/1.2/patches/84865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-21-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:06","name":"[20/22] arm: [MVE intrinsics] factorize several binary _m_n operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-21-christophe.lyon@arm.com/mbox/"},{"id":84868,"url":"https://patchwork.plctlab.org/api/1.2/patches/84868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-22-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:07","name":"[21/22] arm: [MVE intrinsics] factorize several binary operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-22-christophe.lyon@arm.com/mbox/"},{"id":84875,"url":"https://patchwork.plctlab.org/api/1.2/patches/84875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-23-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:08","name":"[22/22] arm: [MVE intrinsics] rework vhaddq vhsubq vmulhq vqaddq vqsubq vqdmulhq vrhaddq vrmulhq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-23-christophe.lyon@arm.com/mbox/"},{"id":84876,"url":"https://patchwork.plctlab.org/api/1.2/patches/84876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418135334.217FE13581@imap2.suse-dmz.suse.de/","msgid":"<20230418135334.217FE13581@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T13:53:33","name":"middle-end/108786 - add bitmap_clear_first_set_bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418135334.217FE13581@imap2.suse-dmz.suse.de/mbox/"},{"id":84890,"url":"https://patchwork.plctlab.org/api/1.2/patches/84890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418142858.2424851-1-patrick@rivosinc.com/","msgid":"<20230418142858.2424851-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T14:28:58","name":"[v5] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418142858.2424851-1-patrick@rivosinc.com/mbox/"},{"id":84892,"url":"https://patchwork.plctlab.org/api/1.2/patches/84892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418143635.980594-1-vineetg@rivosinc.com/","msgid":"<20230418143635.980594-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T14:36:35","name":"riscv: relax splitter restrictions for creating pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418143635.980594-1-vineetg@rivosinc.com/mbox/"},{"id":84894,"url":"https://patchwork.plctlab.org/api/1.2/patches/84894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418144401.70F8D139CC@imap2.suse-dmz.suse.de/","msgid":"<20230418144401.70F8D139CC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T14:44:01","name":"Shrink points-to analysis dumps when not dumping with -details","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418144401.70F8D139CC@imap2.suse-dmz.suse.de/mbox/"},{"id":84912,"url":"https://patchwork.plctlab.org/api/1.2/patches/84912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418150701.982572-1-vineetg@rivosinc.com/","msgid":"<20230418150701.982572-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T15:07:01","name":"[v2] riscv: relax splitter restrictions for creating pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418150701.982572-1-vineetg@rivosinc.com/mbox/"},{"id":84946,"url":"https://patchwork.plctlab.org/api/1.2/patches/84946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418155914.545421-1-jwakely@redhat.com/","msgid":"<20230418155914.545421-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-18T15:59:14","name":"[committed] libstdc++: Export global iostreams with GLIBCXX_3.4.31 symver [PR108969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418155914.545421-1-jwakely@redhat.com/mbox/"},{"id":84953,"url":"https://patchwork.plctlab.org/api/1.2/patches/84953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418162457.338626-1-aldyh@redhat.com/","msgid":"<20230418162457.338626-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T16:24:57","name":"[COMMITTED] Add GTY support for vrange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418162457.338626-1-aldyh@redhat.com/mbox/"},{"id":84954,"url":"https://patchwork.plctlab.org/api/1.2/patches/84954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17151-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T16:30:33","name":"RFC: New compact syntax for insn and insn_split in Machine Descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17151-tamar@arm.com/mbox/"},{"id":84955,"url":"https://patchwork.plctlab.org/api/1.2/patches/84955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418163913.2429812-1-patrick@rivosinc.com/","msgid":"<20230418163913.2429812-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T16:39:13","name":"[v6] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418163913.2429812-1-patrick@rivosinc.com/mbox/"},{"id":84956,"url":"https://patchwork.plctlab.org/api/1.2/patches/84956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418164007.341221-1-aldyh@redhat.com/","msgid":"<20230418164007.341221-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T16:40:07","name":"Fix pointer sharing in Value_Range constructor.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418164007.341221-1-aldyh@redhat.com/mbox/"},{"id":84976,"url":"https://patchwork.plctlab.org/api/1.2/patches/84976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahvuDwL58Vqj2zVwzyio_yZMA8hKqMZoomfTDNuT0q8Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T17:01:16","name":"i386: Improve permutations with INSERTPS instruction [PR94908]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahvuDwL58Vqj2zVwzyio_yZMA8hKqMZoomfTDNuT0q8Q@mail.gmail.com/mbox/"},{"id":85012,"url":"https://patchwork.plctlab.org/api/1.2/patches/85012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418175507.2C40B2040B@pchp3.se.axis.com/","msgid":"<20230418175507.2C40B2040B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-18T17:55:07","name":"doc: Document order of define_peephole2 scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418175507.2C40B2040B@pchp3.se.axis.com/mbox/"},{"id":85015,"url":"https://patchwork.plctlab.org/api/1.2/patches/85015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418181745.987867-1-vineetg@rivosinc.com/","msgid":"<20230418181745.987867-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T18:17:45","name":"expansion: make layout of x_shift*cost[][][] more efficient","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418181745.987867-1-vineetg@rivosinc.com/mbox/"},{"id":85054,"url":"https://patchwork.plctlab.org/api/1.2/patches/85054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418192136.286589-1-apinski@marvell.com/","msgid":"<20230418192136.286589-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-18T19:21:36","name":"PHIOPT: Move tree_ssa_cs_elim into pass_cselim::execute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418192136.286589-1-apinski@marvell.com/mbox/"},{"id":85061,"url":"https://patchwork.plctlab.org/api/1.2/patches/85061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc2a82bc-fc4e-44f2-bb38-38597e878fd9-1681846782121@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-04-18T19:39:42","name":"testsuite: fix scan-tree-dump patterns [PR83904,PR100297]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc2a82bc-fc4e-44f2-bb38-38597e878fd9-1681846782121@3c-app-gmx-bs56/mbox/"},{"id":85067,"url":"https://patchwork.plctlab.org/api/1.2/patches/85067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418204809.993242-1-vineetg@rivosinc.com/","msgid":"<20230418204809.993242-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T20:48:09","name":"[v2] expansion: make layout of x_shift*cost[][][] more efficient","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418204809.993242-1-vineetg@rivosinc.com/mbox/"},{"id":85082,"url":"https://patchwork.plctlab.org/api/1.2/patches/85082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com/","msgid":"<4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com>","list_archive_url":null,"date":"2023-04-18T21:41:12","name":"aarch64: Add the scheduling model for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com/mbox/"},{"id":85081,"url":"https://patchwork.plctlab.org/api/1.2/patches/85081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418214124.2446642-1-patrick@rivosinc.com/","msgid":"<20230418214124.2446642-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T21:41:24","name":"[v7] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418214124.2446642-1-patrick@rivosinc.com/mbox/"},{"id":85083,"url":"https://patchwork.plctlab.org/api/1.2/patches/85083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com/","msgid":"<6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com>","list_archive_url":null,"date":"2023-04-18T21:41:47","name":"aarch64: Add the cost model for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com/mbox/"},{"id":85110,"url":"https://patchwork.plctlab.org/api/1.2/patches/85110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418231500.585632-1-jwakely@redhat.com/","msgid":"<20230418231500.585632-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-18T23:15:00","name":"[committed] libstdc++: Adjust uses of null pointer constants in docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418231500.585632-1-jwakely@redhat.com/mbox/"},{"id":85111,"url":"https://patchwork.plctlab.org/api/1.2/patches/85111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418232515.95891-1-juzhe.zhong@rivai.ai/","msgid":"<20230418232515.95891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T23:25:15","name":"RISC-V: Fix bug reported by PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418232515.95891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85112,"url":"https://patchwork.plctlab.org/api/1.2/patches/85112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418233253.293204-1-apinski@marvell.com/","msgid":"<20230418233253.293204-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-18T23:32:53","name":"i386: Add new pattern for zero-extend cmov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418233253.293204-1-apinski@marvell.com/mbox/"},{"id":85132,"url":"https://patchwork.plctlab.org/api/1.2/patches/85132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020301.1864306-1-zewei.mo@intel.com/","msgid":"<20230419020301.1864306-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-04-19T02:03:01","name":"Re-arrange sections of i386 cpuid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020301.1864306-1-zewei.mo@intel.com/mbox/"},{"id":85131,"url":"https://patchwork.plctlab.org/api/1.2/patches/85131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020336.722450-1-guojiufu@linux.ibm.com/","msgid":"<20230419020336.722450-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T02:03:36","name":"PR testsuite/106879 FAIL: gcc.dg/vect/bb-slp-layout-19.c on powerpc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020336.722450-1-guojiufu@linux.ibm.com/mbox/"},{"id":85141,"url":"https://patchwork.plctlab.org/api/1.2/patches/85141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419025214.149675-1-xionghuluo@tencent.com/","msgid":"<20230419025214.149675-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-04-19T02:52:14","name":"[v5] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419025214.149675-1-xionghuluo@tencent.com/mbox/"},{"id":85153,"url":"https://patchwork.plctlab.org/api/1.2/patches/85153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419031527.6D39120420@pchp3.se.axis.com/","msgid":"<20230419031527.6D39120420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-19T03:15:27","name":"[v2] doc: Document order of define_peephole2 scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419031527.6D39120420@pchp3.se.axis.com/mbox/"},{"id":85155,"url":"https://patchwork.plctlab.org/api/1.2/patches/85155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419032117.930737-1-pan2.li@intel.com/","msgid":"<20230419032117.930737-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T03:21:17","name":"RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419032117.930737-1-pan2.li@intel.com/mbox/"},{"id":85225,"url":"https://patchwork.plctlab.org/api/1.2/patches/85225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419070628.1011624-1-lipeng.zhu@intel.com/","msgid":"<20230419070628.1011624-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-04-19T07:06:28","name":"[v3] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419070628.1011624-1-lipeng.zhu@intel.com/mbox/"},{"id":85227,"url":"https://patchwork.plctlab.org/api/1.2/patches/85227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071551.3478647-1-hongtao.liu@intel.com/","msgid":"<20230419071551.3478647-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-19T07:15:51","name":"[i386] Support type _Float16/__bf16 independent of SSE2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071551.3478647-1-hongtao.liu@intel.com/mbox/"},{"id":85228,"url":"https://patchwork.plctlab.org/api/1.2/patches/85228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071900.61BB83856949@sourceware.org/","msgid":"<20230419071900.61BB83856949@sourceware.org>","list_archive_url":null,"date":"2023-04-19T07:18:14","name":"rtl-optimization/109237 - speedup bb_is_just_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071900.61BB83856949@sourceware.org/mbox/"},{"id":85247,"url":"https://patchwork.plctlab.org/api/1.2/patches/85247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+iyFBUsQQOaSxT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T08:14:00","name":"[committed] testsuite: Fix up pr109524.C for -std=c++23 [PR109524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+iyFBUsQQOaSxT@tucnak/mbox/"},{"id":85249,"url":"https://patchwork.plctlab.org/api/1.2/patches/85249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419082342.21705-1-fanpeng@loongson.cn/","msgid":"<20230419082342.21705-1-fanpeng@loongson.cn>","list_archive_url":null,"date":"2023-04-19T08:23:42","name":"LoongArch: fix MUSL_DYNAMIC_LINKER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419082342.21705-1-fanpeng@loongson.cn/mbox/"},{"id":85261,"url":"https://patchwork.plctlab.org/api/1.2/patches/85261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+rh/xdkZfD7Zwe@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T08:51:19","name":"tree-vect-patterns: Improve __builtin_{clz,ctz,ffs}ll vectorization [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+rh/xdkZfD7Zwe@tucnak/mbox/"},{"id":85266,"url":"https://patchwork.plctlab.org/api/1.2/patches/85266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+uPQ0SZiYDfScT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T09:02:53","name":"c: Avoid -Wenum-int-mismatch warning for redeclaration of builtin acc_on_device [PR107041]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+uPQ0SZiYDfScT@tucnak/mbox/"},{"id":85270,"url":"https://patchwork.plctlab.org/api/1.2/patches/85270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419091820.3729443-1-pan2.li@intel.com/","msgid":"<20230419091820.3729443-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T09:18:20","name":"[v3] RISC-V: Align IOR optimization MODE_CLASS condition to AND.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419091820.3729443-1-pan2.li@intel.com/mbox/"},{"id":85277,"url":"https://patchwork.plctlab.org/api/1.2/patches/85277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419093722.F218A385771D@sourceware.org/","msgid":"<20230419093722.F218A385771D@sourceware.org>","list_archive_url":null,"date":"2023-04-19T09:36:35","name":"Transform more gmp/mpfr uses to use RAII","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419093722.F218A385771D@sourceware.org/mbox/"},{"id":85284,"url":"https://patchwork.plctlab.org/api/1.2/patches/85284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419094812.98F5A3858CDA@sourceware.org/","msgid":"<20230419094812.98F5A3858CDA@sourceware.org>","list_archive_url":null,"date":"2023-04-19T09:47:24","name":"Simplify gimple_assign_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419094812.98F5A3858CDA@sourceware.org/mbox/"},{"id":85291,"url":"https://patchwork.plctlab.org/api/1.2/patches/85291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419095751.815-1-jinma@linux.alibaba.com/","msgid":"<20230419095751.815-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-19T09:57:51","name":"[v8] RISC-V: Add the '\''zfa'\'' extension, version 0.2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419095751.815-1-jinma@linux.alibaba.com/mbox/"},{"id":85309,"url":"https://patchwork.plctlab.org/api/1.2/patches/85309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419103332.DBBC73858C50@sourceware.org/","msgid":"<20230419103332.DBBC73858C50@sourceware.org>","list_archive_url":null,"date":"2023-04-19T10:32:48","name":"Avoid repeated forwarder_block_p calls in CFG cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419103332.DBBC73858C50@sourceware.org/mbox/"},{"id":85312,"url":"https://patchwork.plctlab.org/api/1.2/patches/85312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104054.935874-1-juzhe.zhong@rivai.ai/","msgid":"<20230419104054.935874-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T10:40:54","name":"RISC-V: Fix bug of PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104054.935874-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85313,"url":"https://patchwork.plctlab.org/api/1.2/patches/85313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104151.936002-1-juzhe.zhong@rivai.ai/","msgid":"<20230419104151.936002-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T10:41:51","name":"RISC-V: Fix bug of PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104151.936002-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85343,"url":"https://patchwork.plctlab.org/api/1.2/patches/85343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419112307.3805682-1-pan2.li@intel.com/","msgid":"<20230419112307.3805682-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T11:23:07","name":"[v2] RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419112307.3805682-1-pan2.li@intel.com/mbox/"},{"id":85360,"url":"https://patchwork.plctlab.org/api/1.2/patches/85360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121424.87B213856DF6@sourceware.org/","msgid":"<20230419121424.87B213856DF6@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:13:38","name":"Remove odd code from gimple_can_merge_blocks_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121424.87B213856DF6@sourceware.org/mbox/"},{"id":85361,"url":"https://patchwork.plctlab.org/api/1.2/patches/85361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121438.656C83857019@sourceware.org/","msgid":"<20230419121438.656C83857019@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:13:52","name":"[1/4] Avoid non-unified nodes on the topological sorting for PTA solving","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121438.656C83857019@sourceware.org/mbox/"},{"id":85362,"url":"https://patchwork.plctlab.org/api/1.2/patches/85362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121453.C3DBE3853800@sourceware.org/","msgid":"<20230419121453.C3DBE3853800@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:08","name":"[2/4] Remove senseless store in do_sd_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121453.C3DBE3853800@sourceware.org/mbox/"},{"id":85363,"url":"https://patchwork.plctlab.org/api/1.2/patches/85363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121522.78B90385696B@sourceware.org/","msgid":"<20230419121522.78B90385696B@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:24","name":"[3/4] Fix do_sd_constraint escape special casing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121522.78B90385696B@sourceware.org/mbox/"},{"id":85364,"url":"https://patchwork.plctlab.org/api/1.2/patches/85364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121619.C45363857038@sourceware.org/","msgid":"<20230419121619.C45363857038@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:37","name":"[4/4] Remove special-cased edges when solving copies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121619.C45363857038@sourceware.org/mbox/"},{"id":85381,"url":"https://patchwork.plctlab.org/api/1.2/patches/85381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123111.211055-1-juzhe.zhong@rivai.ai/","msgid":"<20230419123111.211055-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T12:31:11","name":"[04/10] RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123111.211055-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85382,"url":"https://patchwork.plctlab.org/api/1.2/patches/85382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123346.211804-1-juzhe.zhong@rivai.ai/","msgid":"<20230419123346.211804-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T12:33:46","name":"RISC-V: Support 128 bit vector chunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123346.211804-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85397,"url":"https://patchwork.plctlab.org/api/1.2/patches/85397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419130028.267252-1-juzhe.zhong@rivai.ai/","msgid":"<20230419130028.267252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T13:00:28","name":"RISC-V: Add tuple type vget/vset intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419130028.267252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85412,"url":"https://patchwork.plctlab.org/api/1.2/patches/85412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134332.E80E5385772D@sourceware.org/","msgid":"<20230419134332.E80E5385772D@sourceware.org>","list_archive_url":null,"date":"2023-04-19T13:42:49","name":"[1/2] Split out solve_add_graph_edge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134332.E80E5385772D@sourceware.org/mbox/"},{"id":85413,"url":"https://patchwork.plctlab.org/api/1.2/patches/85413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134352.315BD3857022@sourceware.org/","msgid":"<20230419134352.315BD3857022@sourceware.org>","list_archive_url":null,"date":"2023-04-19T13:43:08","name":"[2/2] Use solve_add_graph_edge in more places","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134352.315BD3857022@sourceware.org/mbox/"},{"id":85415,"url":"https://patchwork.plctlab.org/api/1.2/patches/85415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com/","msgid":"<4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com>","list_archive_url":null,"date":"2023-04-19T13:51:52","name":"Docs, OpenMP: Small fixes to internal OMP_FOR doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com/mbox/"},{"id":85417,"url":"https://patchwork.plctlab.org/api/1.2/patches/85417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419135351.98376-1-kito.cheng@sifive.com/","msgid":"<20230419135351.98376-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-19T13:53:51","name":"[wwwdocs] gcc-13: Add release note for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419135351.98376-1-kito.cheng@sifive.com/mbox/"},{"id":85446,"url":"https://patchwork.plctlab.org/api/1.2/patches/85446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZwreLpQ877V2em5RbM4tQ2sJLdXt5gP0NE3-Dvio7qCg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T15:06:34","name":"i386: Emit compares between high registers and memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZwreLpQ877V2em5RbM4tQ2sJLdXt5gP0NE3-Dvio7qCg@mail.gmail.com/mbox/"},{"id":85459,"url":"https://patchwork.plctlab.org/api/1.2/patches/85459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419152009.494469-1-jason@redhat.com/","msgid":"<20230419152009.494469-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-19T15:20:09","name":"[13,RFA] c++: fix '\''unsigned __int128_t'\'' semantics [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419152009.494469-1-jason@redhat.com/mbox/"},{"id":85483,"url":"https://patchwork.plctlab.org/api/1.2/patches/85483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419154515.1300814-1-ppalka@redhat.com/","msgid":"<20230419154515.1300814-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-19T15:45:15","name":"c++: bad ggc_free in try_class_unification [PR109556]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419154515.1300814-1-ppalka@redhat.com/mbox/"},{"id":85487,"url":"https://patchwork.plctlab.org/api/1.2/patches/85487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419155448.EAC3420438@pchp3.se.axis.com/","msgid":"<20230419155448.EAC3420438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-19T15:54:48","name":"recog.cc: Correct comments referring to parameter match_len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419155448.EAC3420438@pchp3.se.axis.com/mbox/"},{"id":85490,"url":"https://patchwork.plctlab.org/api/1.2/patches/85490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j8renkg3z.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T16:10:24","name":"[v2] Leveraging the use of STP instruction for vec_duplicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j8renkg3z.fsf@arm.com/mbox/"},{"id":85496,"url":"https://patchwork.plctlab.org/api/1.2/patches/85496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-2-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:14","name":"[1/3] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85494,"url":"https://patchwork.plctlab.org/api/1.2/patches/85494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-3-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:15","name":"[2/3] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85498,"url":"https://patchwork.plctlab.org/api/1.2/patches/85498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-4-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:16","name":"[3/3] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85495,"url":"https://patchwork.plctlab.org/api/1.2/patches/85495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-2-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:32","name":"[1/3] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85497,"url":"https://patchwork.plctlab.org/api/1.2/patches/85497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-3-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:33","name":"[2/3] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85499,"url":"https://patchwork.plctlab.org/api/1.2/patches/85499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-4-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:34","name":"[3/3] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85500,"url":"https://patchwork.plctlab.org/api/1.2/patches/85500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at/","msgid":"<0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at>","list_archive_url":null,"date":"2023-04-19T16:39:46","name":"[C,-,backport,12] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at/mbox/"},{"id":85503,"url":"https://patchwork.plctlab.org/api/1.2/patches/85503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-2-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:12","name":"[1/3,V2] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85502,"url":"https://patchwork.plctlab.org/api/1.2/patches/85502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-3-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:13","name":"[2/3,V2] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85505,"url":"https://patchwork.plctlab.org/api/1.2/patches/85505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-4-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:14","name":"[3/3,V2] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85518,"url":"https://patchwork.plctlab.org/api/1.2/patches/85518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com/","msgid":"<236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T17:53:07","name":"[v3,1/4] ree: Default ree pass for O2 and above for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com/mbox/"},{"id":85519,"url":"https://patchwork.plctlab.org/api/1.2/patches/85519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3ec893d-683d-7a39-34b6-7d059df2da7c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T17:56:34","name":"[v3,2/4] ree : Code movement to avoid adding prototype to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3ec893d-683d-7a39-34b6-7d059df2da7c@linux.ibm.com/mbox/"},{"id":85520,"url":"https://patchwork.plctlab.org/api/1.2/patches/85520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com/","msgid":"<12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T18:00:30","name":"[v3,3/4] ree: Main functionality to Improve ree pass for rs6000 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com/mbox/"},{"id":85521,"url":"https://patchwork.plctlab.org/api/1.2/patches/85521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d80335eb-9436-fe77-dca4-fbb02d3d688d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T18:03:32","name":"[v3,4/4] ree: Using ABI interfaces to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d80335eb-9436-fe77-dca4-fbb02d3d688d@linux.ibm.com/mbox/"},{"id":85539,"url":"https://patchwork.plctlab.org/api/1.2/patches/85539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-1-jcmvbkbc@gmail.com/","msgid":"<20230419194636.4006880-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-04-19T19:46:35","name":"[COMMITTED,1/2] gcc: xtensa: add data alignment properties to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-1-jcmvbkbc@gmail.com/mbox/"},{"id":85540,"url":"https://patchwork.plctlab.org/api/1.2/patches/85540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-2-jcmvbkbc@gmail.com/","msgid":"<20230419194636.4006880-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-04-19T19:46:36","name":"[COMMITTED,2/2] gcc: xtensa: add -m[no-]strict-align option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-2-jcmvbkbc@gmail.com/mbox/"},{"id":85570,"url":"https://patchwork.plctlab.org/api/1.2/patches/85570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419213635.329198-1-apinski@marvell.com/","msgid":"<20230419213635.329198-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-19T21:36:35","name":"PHIOPT: Improve minmax diamond detection for phiopt1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419213635.329198-1-apinski@marvell.com/mbox/"},{"id":85668,"url":"https://patchwork.plctlab.org/api/1.2/patches/85668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-1-hongtao.liu@intel.com/","msgid":"<20230420004615.2434390-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T00:46:14","name":"[1/2] Use NO_REGS in cost calculation when the preferred register class are not known yet.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-1-hongtao.liu@intel.com/mbox/"},{"id":85669,"url":"https://patchwork.plctlab.org/api/1.2/patches/85669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-2-hongtao.liu@intel.com/","msgid":"<20230420004615.2434390-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T00:46:15","name":"[2/2] Adjust testcases after better RA decision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-2-hongtao.liu@intel.com/mbox/"},{"id":85673,"url":"https://patchwork.plctlab.org/api/1.2/patches/85673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420010535.336618-1-apinski@marvell.com/","msgid":"<20230420010535.336618-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-20T01:05:35","name":"PHIOPT: Improve readability of tree_ssa_phiopt_worker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420010535.336618-1-apinski@marvell.com/mbox/"},{"id":85704,"url":"https://patchwork.plctlab.org/api/1.2/patches/85704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420035821.4113007-1-hongtao.liu@intel.com/","msgid":"<20230420035821.4113007-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T03:58:21","name":"Canonicalize vec_merge when mask is constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420035821.4113007-1-hongtao.liu@intel.com/mbox/"},{"id":85707,"url":"https://patchwork.plctlab.org/api/1.2/patches/85707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com/","msgid":"<3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com>","list_archive_url":null,"date":"2023-04-20T04:34:34","name":"[RFA,PR,target/108248,RISC-V] Break down some bitmanip insn types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com/mbox/"},{"id":85731,"url":"https://patchwork.plctlab.org/api/1.2/patches/85731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com/","msgid":"<7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com>","list_archive_url":null,"date":"2023-04-20T06:04:39","name":"[2/1,rs6000] make ppc_cpu_supports_hw as effective target keyword [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com/mbox/"},{"id":85732,"url":"https://patchwork.plctlab.org/api/1.2/patches/85732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcbe0ab5-9649-9005-8739-f1bfec216a18@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T06:04:44","name":"[2/2,rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcbe0ab5-9649-9005-8739-f1bfec216a18@linux.ibm.com/mbox/"},{"id":85752,"url":"https://patchwork.plctlab.org/api/1.2/patches/85752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEDqbPYI10NaVp6R@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-20T07:31:56","name":"tree-vect-patterns: Pattern recognize ctz or ffs using clz, popcount or ctz [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEDqbPYI10NaVp6R@tucnak/mbox/"},{"id":85806,"url":"https://patchwork.plctlab.org/api/1.2/patches/85806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420092356.CB21A3856965@sourceware.org/","msgid":"<20230420092356.CB21A3856965@sourceware.org>","list_archive_url":null,"date":"2023-04-20T09:23:12","name":"Remove duplicate DFS walks from DF init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420092356.CB21A3856965@sourceware.org/mbox/"},{"id":85828,"url":"https://patchwork.plctlab.org/api/1.2/patches/85828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420102056.43142-1-kito.cheng@sifive.com/","msgid":"<20230420102056.43142-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T10:20:56","name":"[committed,v2] gcc-13: Add release note for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420102056.43142-1-kito.cheng@sifive.com/mbox/"},{"id":85882,"url":"https://patchwork.plctlab.org/api/1.2/patches/85882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420120351.918CE3857716@sourceware.org/","msgid":"<20230420120351.918CE3857716@sourceware.org>","list_archive_url":null,"date":"2023-04-20T12:03:05","name":"tree-optimization/109564 - avoid equivalences from PHIs in most cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420120351.918CE3857716@sourceware.org/mbox/"},{"id":85883,"url":"https://patchwork.plctlab.org/api/1.2/patches/85883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46815819-9b18-1052-c022-0a924901f906@codesourcery.com/","msgid":"<46815819-9b18-1052-c022-0a924901f906@codesourcery.com>","list_archive_url":null,"date":"2023-04-20T12:07:29","name":"[committed] amdgcn: update target-supports.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46815819-9b18-1052-c022-0a924901f906@codesourcery.com/mbox/"},{"id":85884,"url":"https://patchwork.plctlab.org/api/1.2/patches/85884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e76f66b1-a161-4bd8-c9e3-be1576dd1b9a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T12:11:36","name":"[committed] amdgcn: bug fix ldexp insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e76f66b1-a161-4bd8-c9e3-be1576dd1b9a@codesourcery.com/mbox/"},{"id":85909,"url":"https://patchwork.plctlab.org/api/1.2/patches/85909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132416.12502-1-kito.cheng@sifive.com/","msgid":"<20230420132416.12502-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T13:24:16","name":"[committed] RISC-V: Fix simplify_ior_optimization.c on rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132416.12502-1-kito.cheng@sifive.com/mbox/"},{"id":85910,"url":"https://patchwork.plctlab.org/api/1.2/patches/85910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132439.12555-1-kito.cheng@sifive.com/","msgid":"<20230420132439.12555-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T13:24:39","name":"[committed] RISC-V: Fix riscv/arch-19.c with different ISA spec version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132439.12555-1-kito.cheng@sifive.com/mbox/"},{"id":85911,"url":"https://patchwork.plctlab.org/api/1.2/patches/85911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5a95ca2-d7e8-280d-1351-c9dfb5b26de3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T13:29:49","name":"[committed,OG10] amdgcn, openmp: Fix concurrency in low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5a95ca2-d7e8-280d-1351-c9dfb5b26de3@codesourcery.com/mbox/"},{"id":85916,"url":"https://patchwork.plctlab.org/api/1.2/patches/85916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-1-ppalka@redhat.com/","msgid":"<20230420135633.2447631-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T13:56:32","name":"[1/2] c++: make strip_typedefs generalize strip_typedefs_expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-1-ppalka@redhat.com/mbox/"},{"id":85917,"url":"https://patchwork.plctlab.org/api/1.2/patches/85917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-2-ppalka@redhat.com/","msgid":"<20230420135633.2447631-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T13:56:33","name":"[2/2] c++: use TREE_VEC for trailing args of variadic built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-2-ppalka@redhat.com/mbox/"},{"id":85919,"url":"https://patchwork.plctlab.org/api/1.2/patches/85919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/D0E9924D-C7C4-4C43-B586-324B3378028B@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T14:10:24","name":"Ping * 3: [V6][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/D0E9924D-C7C4-4C43-B586-324B3378028B@oracle.com/mbox/"},{"id":85920,"url":"https://patchwork.plctlab.org/api/1.2/patches/85920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com/","msgid":"<3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com>","list_archive_url":null,"date":"2023-04-20T14:11:55","name":"Ping * 3: [V6][PATCH 2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com/mbox/"},{"id":85932,"url":"https://patchwork.plctlab.org/api/1.2/patches/85932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZQOn9KYrtz3JON-veJ+C+7oKttKMfzm_FEU7U5StSyUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T14:54:10","name":"i386: Handle sign-extract for QImode operations with high registers [PR78952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZQOn9KYrtz3JON-veJ+C+7oKttKMfzm_FEU7U5StSyUA@mail.gmail.com/mbox/"},{"id":85933,"url":"https://patchwork.plctlab.org/api/1.2/patches/85933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bDD-apcZ6JgAjAk5+h+twRFFMpmiYnRK9G9AKzdseNQw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T15:03:48","name":"arch: Use VIRTUAL_REGISTER_P predicate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bDD-apcZ6JgAjAk5+h+twRFFMpmiYnRK9G9AKzdseNQw@mail.gmail.com/mbox/"},{"id":85934,"url":"https://patchwork.plctlab.org/api/1.2/patches/85934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db985c56-371f-4d26-a1a5-26b25c5e68cf@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T15:07:10","name":"[pushed,LRA] : Exclude some hard regs for multi-reg inout reload pseudos used in asm in different mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db985c56-371f-4d26-a1a5-26b25c5e68cf@redhat.com/mbox/"},{"id":85939,"url":"https://patchwork.plctlab.org/api/1.2/patches/85939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420153437.2910374-1-ppalka@redhat.com/","msgid":"<20230420153437.2910374-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T15:34:37","name":"c++: improve template parameter level lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420153437.2910374-1-ppalka@redhat.com/mbox/"},{"id":85965,"url":"https://patchwork.plctlab.org/api/1.2/patches/85965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420165523.281157-1-vineetg@rivosinc.com/","msgid":"<20230420165523.281157-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-20T16:55:23","name":"MAINTAINERS: add Vineet Gupta to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420165523.281157-1-vineetg@rivosinc.com/mbox/"},{"id":85977,"url":"https://patchwork.plctlab.org/api/1.2/patches/85977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420171855.31294-1-alx@kernel.org/","msgid":"<20230420171855.31294-1-alx@kernel.org>","list_archive_url":null,"date":"2023-04-20T17:18:55","name":"doc: tfix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420171855.31294-1-alx@kernel.org/mbox/"},{"id":85979,"url":"https://patchwork.plctlab.org/api/1.2/patches/85979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com/","msgid":"<1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com>","list_archive_url":null,"date":"2023-04-20T17:22:11","name":"PR tee-optimization/109564 - Do not ignore UNDEFINED ranges when determining PHI equivalences.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com/mbox/"},{"id":85984,"url":"https://patchwork.plctlab.org/api/1.2/patches/85984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEF4qvhBzBOEQxX1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-20T17:38:50","name":"tree-vect-patterns: One small vect_recog_ctz_ffs_pattern tweak [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEF4qvhBzBOEQxX1@tucnak/mbox/"},{"id":86020,"url":"https://patchwork.plctlab.org/api/1.2/patches/86020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-28f2e76d-4032-4ca5-8666-7faf6caf6c05-1682020919629@3c-app-gmx-bs34/","msgid":"","list_archive_url":null,"date":"2023-04-20T20:01:59","name":"Fortran: function results never have the ALLOCATABLE attribute [PR109500]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-28f2e76d-4032-4ca5-8666-7faf6caf6c05-1682020919629@3c-app-gmx-bs34/mbox/"},{"id":86021,"url":"https://patchwork.plctlab.org/api/1.2/patches/86021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfD3TVgU3utyPeMvG=7KVy8tNJsUf1h_wLAcy4R919_A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T20:11:42","name":"RISC-V: avoid splitting small constants in bcrli_nottwobits patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfD3TVgU3utyPeMvG=7KVy8tNJsUf1h_wLAcy4R919_A@mail.gmail.com/mbox/"},{"id":86151,"url":"https://patchwork.plctlab.org/api/1.2/patches/86151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064712.60139-1-kito.cheng@sifive.com/","msgid":"<20230421064712.60139-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-21T06:47:12","name":"[committed,v2] RISC-V: Handle multi-lib path correclty for linux [DRAFT]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064712.60139-1-kito.cheng@sifive.com/mbox/"},{"id":86153,"url":"https://patchwork.plctlab.org/api/1.2/patches/86153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064937.106679-1-kito.cheng@sifive.com/","msgid":"<20230421064937.106679-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-21T06:49:37","name":"[committed,v2] RISC-V: Add local user vsetvl instruction elimination [PR109547]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064937.106679-1-kito.cheng@sifive.com/mbox/"},{"id":86155,"url":"https://patchwork.plctlab.org/api/1.2/patches/86155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421070011.166258-1-juzhe.zhong@rivai.ai/","msgid":"<20230421070011.166258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T07:00:11","name":"RISC-V: Support segment intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421070011.166258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86162,"url":"https://patchwork.plctlab.org/api/1.2/patches/86162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421074828.C8C631390E@imap2.suse-dmz.suse.de/","msgid":"<20230421074828.C8C631390E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T07:48:28","name":"Fix LCM dataflow CFG order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421074828.C8C631390E@imap2.suse-dmz.suse.de/mbox/"},{"id":86164,"url":"https://patchwork.plctlab.org/api/1.2/patches/86164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421075851.38441-1-juzhe.zhong@rivai.ai/","msgid":"<20230421075851.38441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T07:58:51","name":"RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421075851.38441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86165,"url":"https://patchwork.plctlab.org/api/1.2/patches/86165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421080205.47633-1-juzhe.zhong@rivai.ai/","msgid":"<20230421080205.47633-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T08:02:05","name":"[V2] RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421080205.47633-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86189,"url":"https://patchwork.plctlab.org/api/1.2/patches/86189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091007.158276-1-juzhe.zhong@rivai.ai/","msgid":"<20230421091007.158276-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T09:10:07","name":"[V3] RISC-V: Defer vsetvli insertion to later if possible [PR108270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091007.158276-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86193,"url":"https://patchwork.plctlab.org/api/1.2/patches/86193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091912.169622-1-juzhe.zhong@rivai.ai/","msgid":"<20230421091912.169622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T09:19:12","name":"[V4] RISC-V: Defer vsetvli insertion to later if possible [PR108270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091912.169622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86216,"url":"https://patchwork.plctlab.org/api/1.2/patches/86216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421100722.17288-1-gaofei@eswincomputing.com/","msgid":"<20230421100722.17288-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-04-21T10:07:22","name":"RISC-V: decouple stack allocation for rv32e w/o save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421100722.17288-1-gaofei@eswincomputing.com/mbox/"},{"id":86249,"url":"https://patchwork.plctlab.org/api/1.2/patches/86249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112446.2DD2B13456@imap2.suse-dmz.suse.de/","msgid":"<20230421112446.2DD2B13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:24:45","name":"[1/3] change DF to use the proper CFG order for DF_FORWARD problems","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112446.2DD2B13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86250,"url":"https://patchwork.plctlab.org/api/1.2/patches/86250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112505.9E91D13456@imap2.suse-dmz.suse.de/","msgid":"<20230421112505.9E91D13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:25:05","name":"[2/3] change inverted_post_order_compute to inverted_rev_post_order_compute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112505.9E91D13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86251,"url":"https://patchwork.plctlab.org/api/1.2/patches/86251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112527.BB76813456@imap2.suse-dmz.suse.de/","msgid":"<20230421112527.BB76813456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:25:27","name":"[3/3] Use correct CFG orders for DF worklist processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112527.BB76813456@imap2.suse-dmz.suse.de/mbox/"},{"id":86252,"url":"https://patchwork.plctlab.org/api/1.2/patches/86252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ07c4CCxL0skMb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:35:09","name":"Remove dead handling of label_decl in tree merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ07c4CCxL0skMb@kam.mff.cuni.cz/mbox/"},{"id":86257,"url":"https://patchwork.plctlab.org/api/1.2/patches/86257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421114722.6D89F13456@imap2.suse-dmz.suse.de/","msgid":"<20230421114722.6D89F13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:47:22","name":"tree-optimization/109573 - avoid ICEing on unexpected live def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421114722.6D89F13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86264,"url":"https://patchwork.plctlab.org/api/1.2/patches/86264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ42eT5TXmuBzia@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:51:53","name":"Stabilize temporary variable names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ42eT5TXmuBzia@kam.mff.cuni.cz/mbox/"},{"id":86266,"url":"https://patchwork.plctlab.org/api/1.2/patches/86266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ6p/HJxNt479h/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:59:35","name":"match.pd: Fix fneg/fadd optimization [PR109583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ6p/HJxNt479h/@tucnak/mbox/"},{"id":86267,"url":"https://patchwork.plctlab.org/api/1.2/patches/86267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ7qPghoFZ59bIS@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T12:03:52","name":"Stabilize inliner Fibonacci heap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ7qPghoFZ59bIS@kam.mff.cuni.cz/mbox/"},{"id":86298,"url":"https://patchwork.plctlab.org/api/1.2/patches/86298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f53887a9-59b1-f348-c683-205f6e5255f0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T12:54:32","name":"[v4,1/4] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f53887a9-59b1-f348-c683-205f6e5255f0@linux.ibm.com/mbox/"},{"id":86311,"url":"https://patchwork.plctlab.org/api/1.2/patches/86311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEKRXFttQMehkW19@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T13:36:28","name":"Fix loop-ch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEKRXFttQMehkW19@kam.mff.cuni.cz/mbox/"},{"id":86322,"url":"https://patchwork.plctlab.org/api/1.2/patches/86322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135123.0BA1613456@imap2.suse-dmz.suse.de/","msgid":"<20230421135123.0BA1613456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:51:22","name":"Add operator* to gimple_stmt_iterator and gphi_iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135123.0BA1613456@imap2.suse-dmz.suse.de/mbox/"},{"id":86323,"url":"https://patchwork.plctlab.org/api/1.2/patches/86323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135135.B805413456@imap2.suse-dmz.suse.de/","msgid":"<20230421135135.B805413456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:51:35","name":"Add safe_is_a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135135.B805413456@imap2.suse-dmz.suse.de/mbox/"},{"id":86324,"url":"https://patchwork.plctlab.org/api/1.2/patches/86324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135306.0536913456@imap2.suse-dmz.suse.de/","msgid":"<20230421135306.0536913456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:53:05","name":"This replaces uses of last_stmt where we do not require debug skipping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135306.0536913456@imap2.suse-dmz.suse.de/mbox/"},{"id":86325,"url":"https://patchwork.plctlab.org/api/1.2/patches/86325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-1-hongtao.liu@intel.com/","msgid":"<20230421135347.2519452-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-21T13:53:46","name":"[1/2,i386] Support type _Float16/__bf16 independent of SSE2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-1-hongtao.liu@intel.com/mbox/"},{"id":86328,"url":"https://patchwork.plctlab.org/api/1.2/patches/86328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-2-hongtao.liu@intel.com/","msgid":"<20230421135347.2519452-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-21T13:53:47","name":"[2/2,i386] def_or_undef __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__ for target attribute/pragmas.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-2-hongtao.liu@intel.com/mbox/"},{"id":86353,"url":"https://patchwork.plctlab.org/api/1.2/patches/86353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-Tn3BewxELWbvLWj=qp14f-o+dQBe30rKXkb_yuh2Eg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T14:41:05","name":"i386: Remove REG_OK_FOR_INDEX/REG_OK_FOR_BASE and their derivatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-Tn3BewxELWbvLWj=qp14f-o+dQBe30rKXkb_yuh2Eg@mail.gmail.com/mbox/"},{"id":86376,"url":"https://patchwork.plctlab.org/api/1.2/patches/86376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421150248.968828-1-jwakely@redhat.com/","msgid":"<20230421150248.968828-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-21T15:02:48","name":"[committed,gcc-12] libstdc++: Optimize std::try_facet and std::use_facet [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421150248.968828-1-jwakely@redhat.com/mbox/"},{"id":86379,"url":"https://patchwork.plctlab.org/api/1.2/patches/86379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMk61mruUqyGGyp6mHZfOb0AYkUo-AFdKPxYVwZpnBx1Dw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:17:39","name":"[aarch64] Use force_reg instead of copy_to_mode_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMk61mruUqyGGyp6mHZfOb0AYkUo-AFdKPxYVwZpnBx1Dw@mail.gmail.com/mbox/"},{"id":86381,"url":"https://patchwork.plctlab.org/api/1.2/patches/86381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6274bcc-8711-610e-98ba-c0ce55dff8eb@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:21:08","name":"[v4,3/4] ree: Main functionality to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6274bcc-8711-610e-98ba-c0ce55dff8eb@linux.ibm.com/mbox/"},{"id":86382,"url":"https://patchwork.plctlab.org/api/1.2/patches/86382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddpm7xuunr.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:22:48","name":"doc: Update install.texi for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddpm7xuunr.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":86448,"url":"https://patchwork.plctlab.org/api/1.2/patches/86448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421173804.3513130-1-arsen@aarsen.me/","msgid":"<20230421173804.3513130-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-21T17:38:04","name":"gcc/m2: Drop references to $(P)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421173804.3513130-1-arsen@aarsen.me/mbox/"},{"id":86466,"url":"https://patchwork.plctlab.org/api/1.2/patches/86466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fba5f376-75b6-e8ca-cd56-fa49fc51b668@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T18:27:35","name":"[committed,PR,testsuite/109549] Adjust x86 testsuite for recent if-conversion cost checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fba5f376-75b6-e8ca-cd56-fa49fc51b668@ventanamicro.com/mbox/"},{"id":86474,"url":"https://patchwork.plctlab.org/api/1.2/patches/86474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193227.1044332-1-jason@redhat.com/","msgid":"<20230421193227.1044332-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-21T19:32:27","name":"[pushed] c++: fix '\''unsigned typedef-name'\'' extension [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193227.1044332-1-jason@redhat.com/mbox/"},{"id":86475,"url":"https://patchwork.plctlab.org/api/1.2/patches/86475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193338.3874230-1-sam@gentoo.org/","msgid":"<20230421193338.3874230-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-21T19:33:38","name":"testsuite: Add testcase for sparc ICE [PR105573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193338.3874230-1-sam@gentoo.org/mbox/"},{"id":86482,"url":"https://patchwork.plctlab.org/api/1.2/patches/86482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5da330c4-2918-10df-b315-17307067d2bf@redhat.com/","msgid":"<5da330c4-2918-10df-b315-17307067d2bf@redhat.com>","list_archive_url":null,"date":"2023-04-21T20:34:43","name":"[COMMITTED] PR tree-optimization/109546 - Do not fold ADDR_EXPR conditions leading to builtin_unreachable early.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5da330c4-2918-10df-b315-17307067d2bf@redhat.com/mbox/"},{"id":86553,"url":"https://patchwork.plctlab.org/api/1.2/patches/86553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEN9yWhVwRqM2kVn@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-22T06:25:13","name":"c++: Fix ICE with parameter pack of decltype(auto) [PR103497]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEN9yWhVwRqM2kVn@Thaum.localdomain/mbox/"},{"id":86560,"url":"https://patchwork.plctlab.org/api/1.2/patches/86560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOUjFpUiri7kUOp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:02:20","name":"Fix up bootstrap with GCC 4.[89] after RAII auto_mpfr and autp_mpz [PR109589]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOUjFpUiri7kUOp@tucnak/mbox/"},{"id":86562,"url":"https://patchwork.plctlab.org/api/1.2/patches/86562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOZPwDFcqYdSnaN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:22:23","name":"testsuite: Fix up pr109011-*.c tests for powerpc [PR109572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOZPwDFcqYdSnaN@tucnak/mbox/"},{"id":86563,"url":"https://patchwork.plctlab.org/api/1.2/patches/86563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLQB=optugqew-T1a5bn=DA=XsN7fYT=hT4fY4UtpU7+Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:32:30","name":"[fortran] PRs 105152, 100193, 87946, 103389, 104429 and 82774","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLQB=optugqew-T1a5bn=DA=XsN7fYT=hT4fY4UtpU7+Q@mail.gmail.com/mbox/"},{"id":86568,"url":"https://patchwork.plctlab.org/api/1.2/patches/86568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com/","msgid":"<8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com>","list_archive_url":null,"date":"2023-04-22T09:06:20","name":"[v4,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com/mbox/"},{"id":86608,"url":"https://patchwork.plctlab.org/api/1.2/patches/86608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007101d97538$e0734790$a159d6b0$@nextmovesoftware.com/","msgid":"<007101d97538$e0734790$a159d6b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T16:38:30","name":"[xstormy16] Update xstormy16_rtx_costs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007101d97538$e0734790$a159d6b0$@nextmovesoftware.com/mbox/"},{"id":86609,"url":"https://patchwork.plctlab.org/api/1.2/patches/86609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com/","msgid":"<008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T16:43:12","name":"[xstormy16] Improved SImode shifts by two bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com/mbox/"},{"id":86611,"url":"https://patchwork.plctlab.org/api/1.2/patches/86611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9fe99b-65ff-4d26-ae3e-5a9668831344@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-22T16:47:00","name":"[committed] Adjust rx movsicc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9fe99b-65ff-4d26-ae3e-5a9668831344@gmail.com/mbox/"},{"id":86633,"url":"https://patchwork.plctlab.org/api/1.2/patches/86633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026001d9755d$19b30030$4d190090$@nextmovesoftware.com/","msgid":"<026001d9755d$19b30030$4d190090$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T20:57:48","name":"[xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026001d9755d$19b30030$4d190090$@nextmovesoftware.com/mbox/"},{"id":86639,"url":"https://patchwork.plctlab.org/api/1.2/patches/86639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-2-apinski@marvell.com/","msgid":"<20230422220921.452264-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:16","name":"[1/6] PHIOPT: Move check on diamond bb to tree_ssa_phiopt_worker from minmax_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-2-apinski@marvell.com/mbox/"},{"id":86642,"url":"https://patchwork.plctlab.org/api/1.2/patches/86642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-3-apinski@marvell.com/","msgid":"<20230422220921.452264-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:17","name":"[2/6] PHIOPT: Cleanup tree_ssa_phiopt_worker code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-3-apinski@marvell.com/mbox/"},{"id":86643,"url":"https://patchwork.plctlab.org/api/1.2/patches/86643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-4-apinski@marvell.com/","msgid":"<20230422220921.452264-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:18","name":"[3/6] PHIOPT: Allow other diamond uses when do_hoist_loads is true","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-4-apinski@marvell.com/mbox/"},{"id":86640,"url":"https://patchwork.plctlab.org/api/1.2/patches/86640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-5-apinski@marvell.com/","msgid":"<20230422220921.452264-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:19","name":"[4/6] PHIOPT: Factor out some code from match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-5-apinski@marvell.com/mbox/"},{"id":86641,"url":"https://patchwork.plctlab.org/api/1.2/patches/86641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-6-apinski@marvell.com/","msgid":"<20230422220921.452264-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:20","name":"[5/6] PHIOPT: Ignore predicates for match-and-simplify phi-opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-6-apinski@marvell.com/mbox/"},{"id":86644,"url":"https://patchwork.plctlab.org/api/1.2/patches/86644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-7-apinski@marvell.com/","msgid":"<20230422220921.452264-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:21","name":"[6/6] PHIOPT: Add support for diamond shaped bb to match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-7-apinski@marvell.com/mbox/"},{"id":86656,"url":"https://patchwork.plctlab.org/api/1.2/patches/86656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423030258.194509-1-hongtao.liu@intel.com/","msgid":"<20230423030258.194509-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-23T03:02:58","name":"Add testcases for ffs/ctz vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423030258.194509-1-hongtao.liu@intel.com/mbox/"},{"id":86668,"url":"https://patchwork.plctlab.org/api/1.2/patches/86668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6444e3c7.16516@msgid.achurch.org/","msgid":"<6444e3c7.16516@msgid.achurch.org>","list_archive_url":null,"date":"2023-04-23T07:52:38","name":"PoC: add -Wunused-result=strict","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6444e3c7.16516@msgid.achurch.org/mbox/"},{"id":86674,"url":"https://patchwork.plctlab.org/api/1.2/patches/86674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423090453.87556-1-aldyh@redhat.com/","msgid":"<20230423090453.87556-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-23T09:04:53","name":"[COMMITTED] Handle NANs in frange::operator== [PR109593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423090453.87556-1-aldyh@redhat.com/mbox/"},{"id":86692,"url":"https://patchwork.plctlab.org/api/1.2/patches/86692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423111752.101308-1-juzhe.zhong@rivai.ai/","msgid":"<20230423111752.101308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T11:17:52","name":"[V2] RISC-V: Optimize fault only first load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423111752.101308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86693,"url":"https://patchwork.plctlab.org/api/1.2/patches/86693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423113354.141950-1-juzhe.zhong@rivai.ai/","msgid":"<20230423113354.141950-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T11:33:54","name":"RISC-V: Add function comment for cleanup_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423113354.141950-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86698,"url":"https://patchwork.plctlab.org/api/1.2/patches/86698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121812.95392-1-juzhe.zhong@rivai.ai/","msgid":"<20230423121812.95392-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T12:18:12","name":"RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121812.95392-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86701,"url":"https://patchwork.plctlab.org/api/1.2/patches/86701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121859.95799-1-juzhe.zhong@rivai.ai/","msgid":"<20230423121859.95799-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T12:18:59","name":"[V2] RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121859.95799-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86722,"url":"https://patchwork.plctlab.org/api/1.2/patches/86722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423131903.155998-1-xry111@xry111.site/","msgid":"<20230423131903.155998-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-23T13:19:03","name":"LoongArch: Enable shrink wrapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423131903.155998-1-xry111@xry111.site/mbox/"},{"id":86780,"url":"https://patchwork.plctlab.org/api/1.2/patches/86780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org/","msgid":"<283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-04-23T16:47:52","name":"Turn on LRA on all targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org/mbox/"},{"id":86807,"url":"https://patchwork.plctlab.org/api/1.2/patches/86807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com/","msgid":"<00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-23T20:14:28","name":"PR rtl-optimization/109476: Use ZERO_EXTEND instead of zeroing a SUBREG.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com/mbox/"},{"id":86832,"url":"https://patchwork.plctlab.org/api/1.2/patches/86832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424035341.96537-1-juzhe.zhong@rivai.ai/","msgid":"<20230424035341.96537-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-24T03:53:41","name":"[V2] RISC-V: Optimize comparison patterns for register allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424035341.96537-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86888,"url":"https://patchwork.plctlab.org/api/1.2/patches/86888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424074332.141890-1-aldyh@redhat.com/","msgid":"<20230424074332.141890-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-24T07:43:32","name":"Pass correct type to irange::contains_p() in ipa-cp.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424074332.141890-1-aldyh@redhat.com/mbox/"},{"id":86939,"url":"https://patchwork.plctlab.org/api/1.2/patches/86939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz/","msgid":"<7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz>","list_archive_url":null,"date":"2023-04-24T10:00:17","name":"[(pushed)] MAINTAINERS: fix sorting of names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz/mbox/"},{"id":87099,"url":"https://patchwork.plctlab.org/api/1.2/patches/87099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEamGo7BN+3iscYO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-24T15:54:02","name":"powerpc: Fix up *branch_anddi3_dot for -m32 -mpowerpc64 [PR109566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEamGo7BN+3iscYO@tucnak/mbox/"},{"id":87108,"url":"https://patchwork.plctlab.org/api/1.2/patches/87108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162337.104065-1-ppalka@redhat.com/","msgid":"<20230424162337.104065-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-24T16:23:37","name":"libstdc++: Fix __max_diff_type::operator>>= for negative values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162337.104065-1-ppalka@redhat.com/mbox/"},{"id":87109,"url":"https://patchwork.plctlab.org/api/1.2/patches/87109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162347.104093-1-ppalka@redhat.com/","msgid":"<20230424162347.104093-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-24T16:23:47","name":"libstdc++: Make __max_size_type and __max_diff_type structural","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162347.104093-1-ppalka@redhat.com/mbox/"},{"id":87168,"url":"https://patchwork.plctlab.org/api/1.2/patches/87168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-2-apinski@marvell.com/","msgid":"<20230424213011.528181-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:05","name":"[1/7] PHIOPT: Split out store elimination from phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-2-apinski@marvell.com/mbox/"},{"id":87172,"url":"https://patchwork.plctlab.org/api/1.2/patches/87172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-3-apinski@marvell.com/","msgid":"<20230424213011.528181-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:06","name":"[2/7] PHIOPT: Rename tree_ssa_phiopt_worker to pass_phiopt::execute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-3-apinski@marvell.com/mbox/"},{"id":87167,"url":"https://patchwork.plctlab.org/api/1.2/patches/87167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-4-apinski@marvell.com/","msgid":"<20230424213011.528181-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:07","name":"[3/7] PHIOPT: Move store_elim_worker into pass_cselim::execute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-4-apinski@marvell.com/mbox/"},{"id":87166,"url":"https://patchwork.plctlab.org/api/1.2/patches/87166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-5-apinski@marvell.com/","msgid":"<20230424213011.528181-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:08","name":"[4/7] MIN/MAX should be treated similar as comparisons for trapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-5-apinski@marvell.com/mbox/"},{"id":87169,"url":"https://patchwork.plctlab.org/api/1.2/patches/87169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-6-apinski@marvell.com/","msgid":"<20230424213011.528181-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:09","name":"[5/7] PHIOPT: Allow MIN/MAX to have up to 2 MIN/MAX expressions for early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-6-apinski@marvell.com/mbox/"},{"id":87171,"url":"https://patchwork.plctlab.org/api/1.2/patches/87171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-7-apinski@marvell.com/","msgid":"<20230424213011.528181-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:10","name":"[6/7] MATCH: Factor out code that for min max detection with constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-7-apinski@marvell.com/mbox/"},{"id":87170,"url":"https://patchwork.plctlab.org/api/1.2/patches/87170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-8-apinski@marvell.com/","msgid":"<20230424213011.528181-8-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:11","name":"[7/7] MATCH: Add patterns from phiopt'\''s minmax_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-8-apinski@marvell.com/mbox/"},{"id":87193,"url":"https://patchwork.plctlab.org/api/1.2/patches/87193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424223055.3450183-1-sam@gentoo.org/","msgid":"<20230424223055.3450183-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-24T22:30:55","name":"[v2] testsuite: Add testcase for sparc ICE [PR105573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424223055.3450183-1-sam@gentoo.org/mbox/"},{"id":87223,"url":"https://patchwork.plctlab.org/api/1.2/patches/87223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425002404.533283-1-apinski@marvell.com/","msgid":"<20230425002404.533283-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-25T00:24:04","name":"[1] Add alternative testcase of phi-opt-25.c that tests phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425002404.533283-1-apinski@marvell.com/mbox/"},{"id":87253,"url":"https://patchwork.plctlab.org/api/1.2/patches/87253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425062543.851AF13466@imap2.suse-dmz.suse.de/","msgid":"<20230425062543.851AF13466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T06:25:43","name":"rtl-optimization/109585 - alias analysis typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425062543.851AF13466@imap2.suse-dmz.suse.de/mbox/"},{"id":87309,"url":"https://patchwork.plctlab.org/api/1.2/patches/87309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2140474.irdbgypaU6@fomalhaut/","msgid":"<2140474.irdbgypaU6@fomalhaut>","list_archive_url":null,"date":"2023-04-25T08:47:59","name":"[Ada] Remove obsolete configure code in gnattools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2140474.irdbgypaU6@fomalhaut/mbox/"},{"id":87317,"url":"https://patchwork.plctlab.org/api/1.2/patches/87317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425090517.247556-1-aldyh@redhat.com/","msgid":"<20230425090517.247556-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-25T09:05:17","name":"Remove default constructor to nan_state.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425090517.247556-1-aldyh@redhat.com/mbox/"},{"id":87326,"url":"https://patchwork.plctlab.org/api/1.2/patches/87326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3493207.iIbC2pHGDl@fomalhaut/","msgid":"<3493207.iIbC2pHGDl@fomalhaut>","list_archive_url":null,"date":"2023-04-25T09:33:23","name":"Avoid creating useless debug temporaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3493207.iIbC2pHGDl@fomalhaut/mbox/"},{"id":87331,"url":"https://patchwork.plctlab.org/api/1.2/patches/87331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j7cu0jnuk.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-25T09:46:43","name":"MAINTAINERS: add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j7cu0jnuk.fsf@arm.com/mbox/"},{"id":87361,"url":"https://patchwork.plctlab.org/api/1.2/patches/87361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com/","msgid":"<00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-25T11:10:44","name":"[Committed] Correct zeroextendqihi2 insn length regression on xstormy16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com/mbox/"},{"id":87384,"url":"https://patchwork.plctlab.org/api/1.2/patches/87384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEfLSlzL3Ajemmmk@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-25T12:44:58","name":"[committed] testsuite: Fix up ext-floating15.C tests on powerpc64-linux [PR109278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEfLSlzL3Ajemmmk@tucnak/mbox/"},{"id":87390,"url":"https://patchwork.plctlab.org/api/1.2/patches/87390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425130836.5E2B513466@imap2.suse-dmz.suse.de/","msgid":"<20230425130836.5E2B513466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T13:08:35","name":"tree-optimization/109609 - correctly interpret arg size in fnspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425130836.5E2B513466@imap2.suse-dmz.suse.de/mbox/"},{"id":87413,"url":"https://patchwork.plctlab.org/api/1.2/patches/87413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425134229.181115-1-juzhe.zhong@rivai.ai/","msgid":"<20230425134229.181115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-25T13:42:29","name":"VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425134229.181115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87419,"url":"https://patchwork.plctlab.org/api/1.2/patches/87419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEffjoGtOosBVKcZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-25T14:11:26","name":"[committed] testsuite: Fix up ext-floating2.C on powerpc64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEffjoGtOosBVKcZ@tucnak/mbox/"},{"id":87450,"url":"https://patchwork.plctlab.org/api/1.2/patches/87450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425142904.133137-1-pan2.li@intel.com/","msgid":"<20230425142904.133137-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-25T14:29:04","name":"[v3] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425142904.133137-1-pan2.li@intel.com/mbox/"},{"id":87452,"url":"https://patchwork.plctlab.org/api/1.2/patches/87452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com/","msgid":"<37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com>","list_archive_url":null,"date":"2023-04-25T14:35:46","name":"[committed] Re: [patch] '\''omp scan'\'' struct block seq update for OpenMP 5.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com/mbox/"},{"id":87467,"url":"https://patchwork.plctlab.org/api/1.2/patches/87467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4100446e-18fa-6f72-13a2-05905666a787@suse.com/","msgid":"<4100446e-18fa-6f72-13a2-05905666a787@suse.com>","list_archive_url":null,"date":"2023-04-25T14:50:29","name":"testsuite: adjust NOP expectations for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4100446e-18fa-6f72-13a2-05905666a787@suse.com/mbox/"},{"id":87471,"url":"https://patchwork.plctlab.org/api/1.2/patches/87471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com/","msgid":"<27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com>","list_archive_url":null,"date":"2023-04-25T15:00:05","name":"[v2] testsuite/C++: cope with IPv6 being unavailable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com/mbox/"},{"id":87472,"url":"https://patchwork.plctlab.org/api/1.2/patches/87472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425151135.AEB62138E3@imap2.suse-dmz.suse.de/","msgid":"<20230425151135.AEB62138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T15:11:35","name":"More last_stmt removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425151135.AEB62138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":87473,"url":"https://patchwork.plctlab.org/api/1.2/patches/87473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEft8nJK6sP93fM+@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-25T15:12:50","name":"Unloop no longer looping loops in loop-ch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEft8nJK6sP93fM+@kam.mff.cuni.cz/mbox/"},{"id":87539,"url":"https://patchwork.plctlab.org/api/1.2/patches/87539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com/","msgid":"<019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-25T20:20:50","name":"[xstormy16] Add support for byte and word swapping instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com/mbox/"},{"id":87589,"url":"https://patchwork.plctlab.org/api/1.2/patches/87589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426020159.2497257-1-juzhe.zhong@rivai.ai/","msgid":"<20230426020159.2497257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T02:01:59","name":"Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426020159.2497257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87594,"url":"https://patchwork.plctlab.org/api/1.2/patches/87594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426035929.330213-1-juzhe.zhong@rivai.ai/","msgid":"<20230426035929.330213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T03:59:29","name":"[V3] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426035929.330213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87600,"url":"https://patchwork.plctlab.org/api/1.2/patches/87600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426044739.2672860-1-juzhe.zhong@rivai.ai/","msgid":"<20230426044739.2672860-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T04:47:39","name":"[V2] RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426044739.2672860-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87619,"url":"https://patchwork.plctlab.org/api/1.2/patches/87619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426061026.116232-1-sebastian.huber@embedded-brains.de/","msgid":"<20230426061026.116232-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-04-26T06:10:26","name":"[wwwdocs] gcc-13: Mention new gcov feature","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426061026.116232-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":87687,"url":"https://patchwork.plctlab.org/api/1.2/patches/87687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426073555.4073530-1-hongtao.liu@intel.com/","msgid":"<20230426073555.4073530-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-26T07:35:55","name":"[vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426073555.4073530-1-hongtao.liu@intel.com/mbox/"},{"id":87725,"url":"https://patchwork.plctlab.org/api/1.2/patches/87725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-1-aldyh@redhat.com/","msgid":"<20230426083328.313566-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:20","name":"[COMMITTED] Remove compare_names* from legacy cond folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-1-aldyh@redhat.com/mbox/"},{"id":87731,"url":"https://patchwork.plctlab.org/api/1.2/patches/87731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-2-aldyh@redhat.com/","msgid":"<20230426083328.313566-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:21","name":"[COMMITTED] Refactor vrp_evaluate_conditional* and rename it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-2-aldyh@redhat.com/mbox/"},{"id":87728,"url":"https://patchwork.plctlab.org/api/1.2/patches/87728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-3-aldyh@redhat.com/","msgid":"<20230426083328.313566-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:22","name":"[COMMITTED] Remove range_query::get_value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-3-aldyh@redhat.com/mbox/"},{"id":87726,"url":"https://patchwork.plctlab.org/api/1.2/patches/87726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-4-aldyh@redhat.com/","msgid":"<20230426083328.313566-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:23","name":"[COMMITTED] Remove deprecated range_fold_{unary, binary}_expr uses from ipa-*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-4-aldyh@redhat.com/mbox/"},{"id":87729,"url":"https://patchwork.plctlab.org/api/1.2/patches/87729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-5-aldyh@redhat.com/","msgid":"<20230426083328.313566-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:24","name":"[COMMITTED] Remove range_fold_{unary,binary}_expr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-5-aldyh@redhat.com/mbox/"},{"id":87734,"url":"https://patchwork.plctlab.org/api/1.2/patches/87734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-6-aldyh@redhat.com/","msgid":"<20230426083328.313566-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:25","name":"[COMMITTED] Remove irange::may_contain_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-6-aldyh@redhat.com/mbox/"},{"id":87733,"url":"https://patchwork.plctlab.org/api/1.2/patches/87733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-7-aldyh@redhat.com/","msgid":"<20230426083328.313566-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:26","name":"[COMMITTED] Remove symbolics from irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-7-aldyh@redhat.com/mbox/"},{"id":87736,"url":"https://patchwork.plctlab.org/api/1.2/patches/87736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-8-aldyh@redhat.com/","msgid":"<20230426083328.313566-8-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:27","name":"[COMMITTED] Remove irange::constant_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-8-aldyh@redhat.com/mbox/"},{"id":87737,"url":"https://patchwork.plctlab.org/api/1.2/patches/87737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-9-aldyh@redhat.com/","msgid":"<20230426083328.313566-9-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:28","name":"[COMMITTED] Convert users of legacy API to get_legacy_range() function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-9-aldyh@redhat.com/mbox/"},{"id":87743,"url":"https://patchwork.plctlab.org/api/1.2/patches/87743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AEA71396-534B-4730-901C-9B561568A780@microchip.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T09:00:08","name":"avr: Set param_min_pagesize to 0 [PR105523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AEA71396-534B-4730-901C-9B561568A780@microchip.com/mbox/"},{"id":87826,"url":"https://patchwork.plctlab.org/api/1.2/patches/87826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-1-aldyh@redhat.com/","msgid":"<20230426114752.336928-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:46","name":"[COMMITTED] Fix swapping of ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-1-aldyh@redhat.com/mbox/"},{"id":87827,"url":"https://patchwork.plctlab.org/api/1.2/patches/87827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-2-aldyh@redhat.com/","msgid":"<20230426114752.336928-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:47","name":"[COMMITTED] Replace ad-hoc value_range dumpers with irange::dump.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-2-aldyh@redhat.com/mbox/"},{"id":87828,"url":"https://patchwork.plctlab.org/api/1.2/patches/87828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-3-aldyh@redhat.com/","msgid":"<20230426114752.336928-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:48","name":"[COMMITTED] Remove some uses of deprecated irange API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-3-aldyh@redhat.com/mbox/"},{"id":87834,"url":"https://patchwork.plctlab.org/api/1.2/patches/87834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-4-aldyh@redhat.com/","msgid":"<20230426114752.336928-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:49","name":"[COMMITTED] Convert compare_nonzero_chars to wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-4-aldyh@redhat.com/mbox/"},{"id":87830,"url":"https://patchwork.plctlab.org/api/1.2/patches/87830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-5-aldyh@redhat.com/","msgid":"<20230426114752.336928-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:50","name":"[COMMITTED] Remove range_int_cst_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-5-aldyh@redhat.com/mbox/"},{"id":87831,"url":"https://patchwork.plctlab.org/api/1.2/patches/87831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-6-aldyh@redhat.com/","msgid":"<20230426114752.336928-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:51","name":"[COMMITTED] Remove range_has_numeric_bounds_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-6-aldyh@redhat.com/mbox/"},{"id":87829,"url":"https://patchwork.plctlab.org/api/1.2/patches/87829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-7-aldyh@redhat.com/","msgid":"<20230426114752.336928-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:52","name":"[COMMITTED] Remove legacy range support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-7-aldyh@redhat.com/mbox/"},{"id":87839,"url":"https://patchwork.plctlab.org/api/1.2/patches/87839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120006.2362465-1-pan2.li@intel.com/","msgid":"<20230426120006.2362465-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-26T12:00:06","name":"RISC-V: Legitimise the const0_rtx for RVV load/store address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120006.2362465-1-pan2.li@intel.com/mbox/"},{"id":87843,"url":"https://patchwork.plctlab.org/api/1.2/patches/87843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120503.3207041-1-yanzhang.wang@intel.com/","msgid":"<20230426120503.3207041-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T12:05:03","name":"RISC-V: ICE for vlmul_ext_v intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120503.3207041-1-yanzhang.wang@intel.com/mbox/"},{"id":87849,"url":"https://patchwork.plctlab.org/api/1.2/patches/87849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426123743.3210243-1-yanzhang.wang@intel.com/","msgid":"<20230426123743.3210243-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T12:37:43","name":"RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426123743.3210243-1-yanzhang.wang@intel.com/mbox/"},{"id":87856,"url":"https://patchwork.plctlab.org/api/1.2/patches/87856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426125140.1064474-1-ppalka@redhat.com/","msgid":"<20230426125140.1064474-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-26T12:51:40","name":"wwwdocs: Document more libstdc++ additions for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426125140.1064474-1-ppalka@redhat.com/mbox/"},{"id":87861,"url":"https://patchwork.plctlab.org/api/1.2/patches/87861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426130602.3335312-1-yanzhang.wang@intel.com/","msgid":"<20230426130602.3335312-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T13:06:02","name":"[v2] RISC-V: ICE for vlmul_ext_v intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426130602.3335312-1-yanzhang.wang@intel.com/mbox/"},{"id":87877,"url":"https://patchwork.plctlab.org/api/1.2/patches/87877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEkzW8oH5Rxp7yKM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-26T14:21:15","name":"Add targetm.libm_function_max_error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEkzW8oH5Rxp7yKM@tucnak/mbox/"},{"id":87893,"url":"https://patchwork.plctlab.org/api/1.2/patches/87893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426160705.1072259-1-patrick@rivosinc.com/","msgid":"<20230426160705.1072259-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T16:07:05","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426160705.1072259-1-patrick@rivosinc.com/mbox/"},{"id":87894,"url":"https://patchwork.plctlab.org/api/1.2/patches/87894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426161539.1571701-1-jwakely@redhat.com/","msgid":"<20230426161539.1571701-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-26T16:15:39","name":"doc: Add explanation of zero-length array example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426161539.1571701-1-jwakely@redhat.com/mbox/"},{"id":87895,"url":"https://patchwork.plctlab.org/api/1.2/patches/87895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZElO3DhiloDY6dO7@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-26T16:18:36","name":"[V4] PR target/105325, Make load/cmp fusion know about prefixed loads.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZElO3DhiloDY6dO7@toto.the-meissners.org/mbox/"},{"id":87898,"url":"https://patchwork.plctlab.org/api/1.2/patches/87898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426165347.599616-1-apinski@marvell.com/","msgid":"<20230426165347.599616-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-26T16:53:47","name":"GCC-13/changes: Add note about iostream usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426165347.599616-1-apinski@marvell.com/mbox/"},{"id":87900,"url":"https://patchwork.plctlab.org/api/1.2/patches/87900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426170129.1076929-1-patrick@rivosinc.com/","msgid":"<20230426170129.1076929-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T17:01:29","name":"[committed] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426170129.1076929-1-patrick@rivosinc.com/mbox/"},{"id":87956,"url":"https://patchwork.plctlab.org/api/1.2/patches/87956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6840d76-3c02-6034-38c5-f3ead4a6bbb4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T19:26:00","name":"[COMMITTED,1/5] PR tree-optimization/109417 - Don'\''t save ssa-name pointer in dependency cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6840d76-3c02-6034-38c5-f3ead4a6bbb4@redhat.com/mbox/"},{"id":87957,"url":"https://patchwork.plctlab.org/api/1.2/patches/87957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28bd16f7-f334-3245-c444-65a23e98d020@redhat.com/","msgid":"<28bd16f7-f334-3245-c444-65a23e98d020@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:26:21","name":"[COMMITTED,2/5] Quicker relation check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28bd16f7-f334-3245-c444-65a23e98d020@redhat.com/mbox/"},{"id":87958,"url":"https://patchwork.plctlab.org/api/1.2/patches/87958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b652b65f-63fb-f3d6-e031-ade8a9095730@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T19:26:40","name":"[COMMITTED,3/5] Add sbr_lazy_vector and adjust (e)vrp sparse cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b652b65f-63fb-f3d6-e031-ade8a9095730@redhat.com/mbox/"},{"id":87960,"url":"https://patchwork.plctlab.org/api/1.2/patches/87960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com/","msgid":"<5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:26:53","name":"[COMMITTED,4/5] Rename ssa_global_cache to ssa_cache and add has_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com/mbox/"},{"id":87959,"url":"https://patchwork.plctlab.org/api/1.2/patches/87959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com/","msgid":"<8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:27:06","name":"[COMMITTED,5/5] PR tree-optimization/108697 - Create a lazy ssa_cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com/mbox/"},{"id":87984,"url":"https://patchwork.plctlab.org/api/1.2/patches/87984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426205349.1131469-1-patrick@rivosinc.com/","msgid":"<20230426205349.1131469-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T20:53:49","name":"RISC-V: Fix sync.md and riscv.cc whitespace errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426205349.1131469-1-patrick@rivosinc.com/mbox/"},{"id":87986,"url":"https://patchwork.plctlab.org/api/1.2/patches/87986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211547.463435-1-jason@redhat.com/","msgid":"<20230426211547.463435-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:15:47","name":"[pushed] c++: unique friend shenanigans [PR69836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211547.463435-1-jason@redhat.com/mbox/"},{"id":87987,"url":"https://patchwork.plctlab.org/api/1.2/patches/87987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211602.463658-1-jason@redhat.com/","msgid":"<20230426211602.463658-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:16:02","name":"[pushed] c++: local class in nested generic lambda [PR109241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211602.463658-1-jason@redhat.com/mbox/"},{"id":87988,"url":"https://patchwork.plctlab.org/api/1.2/patches/87988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211613.463855-1-jason@redhat.com/","msgid":"<20230426211613.463855-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:16:13","name":"[pushed] c++: remove nsdmi_inst hashtable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211613.463855-1-jason@redhat.com/mbox/"},{"id":87989,"url":"https://patchwork.plctlab.org/api/1.2/patches/87989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426212106.1134636-1-patrick@rivosinc.com/","msgid":"<20230426212106.1134636-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:21:06","name":"[v2] RISC-V: Fix sync.md and riscv.cc whitespace errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426212106.1134636-1-patrick@rivosinc.com/mbox/"},{"id":87992,"url":"https://patchwork.plctlab.org/api/1.2/patches/87992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-2-collison@rivosinc.com/","msgid":"<20230426214514.3355280-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:05","name":"[v5,01/10] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-2-collison@rivosinc.com/mbox/"},{"id":88001,"url":"https://patchwork.plctlab.org/api/1.2/patches/88001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-3-collison@rivosinc.com/","msgid":"<20230426214514.3355280-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:06","name":"[v5,02/10] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-3-collison@rivosinc.com/mbox/"},{"id":87999,"url":"https://patchwork.plctlab.org/api/1.2/patches/87999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-4-collison@rivosinc.com/","msgid":"<20230426214514.3355280-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:07","name":"[v5,03/10] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-4-collison@rivosinc.com/mbox/"},{"id":88003,"url":"https://patchwork.plctlab.org/api/1.2/patches/88003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-5-collison@rivosinc.com/","msgid":"<20230426214514.3355280-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:08","name":"[v5,04/10] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-5-collison@rivosinc.com/mbox/"},{"id":87993,"url":"https://patchwork.plctlab.org/api/1.2/patches/87993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-6-collison@rivosinc.com/","msgid":"<20230426214514.3355280-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:09","name":"[v5,05/10] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-6-collison@rivosinc.com/mbox/"},{"id":87994,"url":"https://patchwork.plctlab.org/api/1.2/patches/87994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-7-collison@rivosinc.com/","msgid":"<20230426214514.3355280-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:10","name":"[v5,06/10] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-7-collison@rivosinc.com/mbox/"},{"id":88002,"url":"https://patchwork.plctlab.org/api/1.2/patches/88002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-8-collison@rivosinc.com/","msgid":"<20230426214514.3355280-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:11","name":"[v5,07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-8-collison@rivosinc.com/mbox/"},{"id":87998,"url":"https://patchwork.plctlab.org/api/1.2/patches/87998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-9-collison@rivosinc.com/","msgid":"<20230426214514.3355280-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:12","name":"[v5,08/10] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-9-collison@rivosinc.com/mbox/"},{"id":87997,"url":"https://patchwork.plctlab.org/api/1.2/patches/87997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-10-collison@rivosinc.com/","msgid":"<20230426214514.3355280-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:13","name":"[v5,09/10] RISC-V: autovec: This patch adds a guard for VNx1 vectors that are present in ports like riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-10-collison@rivosinc.com/mbox/"},{"id":88000,"url":"https://patchwork.plctlab.org/api/1.2/patches/88000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-11-collison@rivosinc.com/","msgid":"<20230426214514.3355280-11-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:14","name":"[v5,10/10] RISC-V: autovec: This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-11-collison@rivosinc.com/mbox/"},{"id":88035,"url":"https://patchwork.plctlab.org/api/1.2/patches/88035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427000528.C64CA20420@pchp3.se.axis.com/","msgid":"<20230427000528.C64CA20420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-27T00:05:28","name":"[committed] libgcc CRIS: Define TARGET_HAS_NO_HW_DIVIDE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427000528.C64CA20420@pchp3.se.axis.com/mbox/"},{"id":88075,"url":"https://patchwork.plctlab.org/api/1.2/patches/88075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427014542.539011-1-jason@redhat.com/","msgid":"<20230427014542.539011-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-27T01:45:42","name":"[pushed] c++: restore instantiate_decl assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427014542.539011-1-jason@redhat.com/mbox/"},{"id":88085,"url":"https://patchwork.plctlab.org/api/1.2/patches/88085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427023243.1481560-1-hjl.tools@gmail.com/","msgid":"<20230427023243.1481560-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-04-27T02:32:43","name":"libsanitizer: cherry-pick commit 05551c658269 from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427023243.1481560-1-hjl.tools@gmail.com/mbox/"},{"id":88088,"url":"https://patchwork.plctlab.org/api/1.2/patches/88088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427024002.533187-1-yanzhang.wang@intel.com/","msgid":"<20230427024002.533187-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-27T02:40:02","name":"[v2] RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427024002.533187-1-yanzhang.wang@intel.com/mbox/"},{"id":88095,"url":"https://patchwork.plctlab.org/api/1.2/patches/88095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427031242.662721-1-yanzhang.wang@intel.com/","msgid":"<20230427031242.662721-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-27T03:12:42","name":"[v3] RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427031242.662721-1-yanzhang.wang@intel.com/mbox/"},{"id":88098,"url":"https://patchwork.plctlab.org/api/1.2/patches/88098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427033142.949564-1-pan2.li@intel.com/","msgid":"<20230427033142.949564-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-27T03:31:42","name":"RISC-V: Add required tls to read thread pointer test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427033142.949564-1-pan2.li@intel.com/mbox/"},{"id":88142,"url":"https://patchwork.plctlab.org/api/1.2/patches/88142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427072532.B70AD3858C74@sourceware.org/","msgid":"<20230427072532.B70AD3858C74@sourceware.org>","list_archive_url":null,"date":"2023-04-27T07:24:46","name":"ipa/109607 - properly gimplify conversions introduced by IPA param manipulation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427072532.B70AD3858C74@sourceware.org/mbox/"},{"id":88149,"url":"https://patchwork.plctlab.org/api/1.2/patches/88149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427083843.D6A4C3858C31@sourceware.org/","msgid":"<20230427083843.D6A4C3858C31@sourceware.org>","list_archive_url":null,"date":"2023-04-27T08:37:23","name":"tree-optimization/109594 - wrong register promotion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427083843.D6A4C3858C31@sourceware.org/mbox/"},{"id":88151,"url":"https://patchwork.plctlab.org/api/1.2/patches/88151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427085241.69218-1-kito.cheng@sifive.com/","msgid":"<20230427085241.69218-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-27T08:52:41","name":"Docs: Add vector register constarint for asm operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427085241.69218-1-kito.cheng@sifive.com/mbox/"},{"id":88179,"url":"https://patchwork.plctlab.org/api/1.2/patches/88179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103026.1725758-1-jwakely@redhat.com/","msgid":"<20230427103026.1725758-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:30:26","name":"[committed] libstdc++: Make std::random_device throw std::system_error [PR105081]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103026.1725758-1-jwakely@redhat.com/mbox/"},{"id":88180,"url":"https://patchwork.plctlab.org/api/1.2/patches/88180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103136.1725804-1-jwakely@redhat.com/","msgid":"<20230427103136.1725804-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:31:36","name":"[committed] libstdc++: Add @headerfile and @since to doxygen comments [PR40380]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103136.1725804-1-jwakely@redhat.com/mbox/"},{"id":88182,"url":"https://patchwork.plctlab.org/api/1.2/patches/88182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103210.1725860-1-jwakely@redhat.com/","msgid":"<20230427103210.1725860-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:32:10","name":"[committed] libstdc++: Improve doxygen docs for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103210.1725860-1-jwakely@redhat.com/mbox/"},{"id":88184,"url":"https://patchwork.plctlab.org/api/1.2/patches/88184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103237.1725914-1-jwakely@redhat.com/","msgid":"<20230427103237.1725914-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:32:37","name":"[committed] libstdc++: Reduce Doxygen output for PDF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103237.1725914-1-jwakely@redhat.com/mbox/"},{"id":88185,"url":"https://patchwork.plctlab.org/api/1.2/patches/88185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103301.1725942-1-jwakely@redhat.com/","msgid":"<20230427103301.1725942-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:33:01","name":"[committed] libstdc++: Remove obsolete options from Doxygen config","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103301.1725942-1-jwakely@redhat.com/mbox/"},{"id":88183,"url":"https://patchwork.plctlab.org/api/1.2/patches/88183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103314.1725986-1-jwakely@redhat.com/","msgid":"<20230427103314.1725986-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:33:14","name":"[committed] libstdc++: Fix typos in doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103314.1725986-1-jwakely@redhat.com/mbox/"},{"id":88198,"url":"https://patchwork.plctlab.org/api/1.2/patches/88198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpXmaFjRBeJA2yp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:08:09","name":"v2: Add targetm.libm_function_max_error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpXmaFjRBeJA2yp@tucnak/mbox/"},{"id":88200,"url":"https://patchwork.plctlab.org/api/1.2/patches/88200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpYvaNqvI7Mfi6u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:13:01","name":"v2: Implement range-op entry for sin/cos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpYvaNqvI7Mfi6u@tucnak/mbox/"},{"id":88201,"url":"https://patchwork.plctlab.org/api/1.2/patches/88201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111634.1728893-1-jwakely@redhat.com/","msgid":"<20230427111634.1728893-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T11:16:34","name":"doc: Describe behaviour of enums with fixed underlying type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111634.1728893-1-jwakely@redhat.com/mbox/"},{"id":88202,"url":"https://patchwork.plctlab.org/api/1.2/patches/88202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111827.C411F3858425@sourceware.org/","msgid":"<20230427111827.C411F3858425@sourceware.org>","list_archive_url":null,"date":"2023-04-27T11:17:42","name":"Properly gimplify handled component chains on registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111827.C411F3858425@sourceware.org/mbox/"},{"id":88206,"url":"https://patchwork.plctlab.org/api/1.2/patches/88206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427112219.AC33F3858418@sourceware.org/","msgid":"<20230427112219.AC33F3858418@sourceware.org>","list_archive_url":null,"date":"2023-04-27T11:21:35","name":"wrong GIMPLE from (bit_field_ref CTOR ..) simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427112219.AC33F3858418@sourceware.org/mbox/"},{"id":88213,"url":"https://patchwork.plctlab.org/api/1.2/patches/88213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkj9wnpq.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:48:01","name":"harden-conditionals: detach values before compares","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkj9wnpq.fsf@lxoliva.fsfla.org/mbox/"},{"id":88216,"url":"https://patchwork.plctlab.org/api/1.2/patches/88216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7ctxwnbo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:56:27","name":"[FYI] Use CONFIG_SHELL-/bin/sh in genmultilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7ctxwnbo.fsf@lxoliva.fsfla.org/mbox/"},{"id":88219,"url":"https://patchwork.plctlab.org/api/1.2/patches/88219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427115948.480747-1-aldyh@redhat.com/","msgid":"<20230427115948.480747-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-27T11:59:48","name":"[COMMITTED] Normalize addresses in IPA before calling range_op_handler [PR109639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427115948.480747-1-aldyh@redhat.com/mbox/"},{"id":88226,"url":"https://patchwork.plctlab.org/api/1.2/patches/88226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427121125.CEB753858C66@sourceware.org/","msgid":"<20230427121125.CEB753858C66@sourceware.org>","list_archive_url":null,"date":"2023-04-27T12:10:40","name":"tree-optimization/109170 - bogus use-after-free with __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427121125.CEB753858C66@sourceware.org/mbox/"},{"id":88260,"url":"https://patchwork.plctlab.org/api/1.2/patches/88260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEp46RiMoi1K3wSG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T13:30:17","name":"gimple-range-op: Handle sqrt (basic bounds only)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEp46RiMoi1K3wSG@tucnak/mbox/"},{"id":88271,"url":"https://patchwork.plctlab.org/api/1.2/patches/88271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427140106.40452-1-kito.cheng@sifive.com/","msgid":"<20230427140106.40452-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-27T14:01:07","name":"[v2] Docs: Add vector register constarint for asm operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427140106.40452-1-kito.cheng@sifive.com/mbox/"},{"id":88278,"url":"https://patchwork.plctlab.org/api/1.2/patches/88278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACofN_76PcS3FbFQL2K2rXKPuov5JaT-jwAMTut0QuwAjN6hGg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-27T14:29:24","name":"RISC-V: Added support clmul[r,h] instructions for Zbc extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACofN_76PcS3FbFQL2K2rXKPuov5JaT-jwAMTut0QuwAjN6hGg@mail.gmail.com/mbox/"},{"id":88281,"url":"https://patchwork.plctlab.org/api/1.2/patches/88281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427143005.1781966-1-pan2.li@intel.com/","msgid":"<20230427143005.1781966-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-27T14:30:05","name":"RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427143005.1781966-1-pan2.li@intel.com/mbox/"},{"id":88292,"url":"https://patchwork.plctlab.org/api/1.2/patches/88292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CS7M946E8DPP.9L3ZEUF7UK3X@x1c10/","msgid":"","list_archive_url":null,"date":"2023-04-27T14:50:01","name":"MAINTAINERS: Change my email address.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CS7M946E8DPP.9L3ZEUF7UK3X@x1c10/mbox/"},{"id":88300,"url":"https://patchwork.plctlab.org/api/1.2/patches/88300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9791b$0d55b960$28012c20$@nextmovesoftware.com/","msgid":"<002001d9791b$0d55b960$28012c20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-27T15:15:05","name":"Synchronize include/ctf.h with upstream binutils/libctf.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9791b$0d55b960$28012c20$@nextmovesoftware.com/mbox/"},{"id":88304,"url":"https://patchwork.plctlab.org/api/1.2/patches/88304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427155842.699173-1-jason@redhat.com/","msgid":"<20230427155842.699173-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-27T15:58:42","name":"[pushed] c++: print conversion error at candidate location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427155842.699173-1-jason@redhat.com/mbox/"},{"id":88308,"url":"https://patchwork.plctlab.org/api/1.2/patches/88308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-2-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:51","name":"[v5,01/11] RISC-V: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-2-patrick@rivosinc.com/mbox/"},{"id":88314,"url":"https://patchwork.plctlab.org/api/1.2/patches/88314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-3-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:52","name":"[v5,02/11] RISC-V: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-3-patrick@rivosinc.com/mbox/"},{"id":88317,"url":"https://patchwork.plctlab.org/api/1.2/patches/88317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-4-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:53","name":"[v5,03/11] RISC-V: Enforce subword atomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-4-patrick@rivosinc.com/mbox/"},{"id":88310,"url":"https://patchwork.plctlab.org/api/1.2/patches/88310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-5-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:54","name":"[v5,04/11] RISC-V: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-5-patrick@rivosinc.com/mbox/"},{"id":88319,"url":"https://patchwork.plctlab.org/api/1.2/patches/88319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-6-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:55","name":"[v5,05/11] RISC-V: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-6-patrick@rivosinc.com/mbox/"},{"id":88309,"url":"https://patchwork.plctlab.org/api/1.2/patches/88309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-7-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:56","name":"[v5,06/11] RISC-V: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-7-patrick@rivosinc.com/mbox/"},{"id":88312,"url":"https://patchwork.plctlab.org/api/1.2/patches/88312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-8-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:57","name":"[v5,07/11] RISC-V: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-8-patrick@rivosinc.com/mbox/"},{"id":88315,"url":"https://patchwork.plctlab.org/api/1.2/patches/88315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-9-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:58","name":"[v5,08/11] RISC-V: Weaken LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-9-patrick@rivosinc.com/mbox/"},{"id":88318,"url":"https://patchwork.plctlab.org/api/1.2/patches/88318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-10-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:59","name":"[v5,09/11] RISC-V: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-10-patrick@rivosinc.com/mbox/"},{"id":88311,"url":"https://patchwork.plctlab.org/api/1.2/patches/88311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-11-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:23:00","name":"[v5,10/11] RISC-V: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-11-patrick@rivosinc.com/mbox/"},{"id":88316,"url":"https://patchwork.plctlab.org/api/1.2/patches/88316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-12-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-12-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:23:01","name":"[v5,11/11] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-12-patrick@rivosinc.com/mbox/"},{"id":88307,"url":"https://patchwork.plctlab.org/api/1.2/patches/88307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162318.118104-1-julian@codesourcery.com/","msgid":"<20230427162318.118104-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T16:23:18","name":"OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162318.118104-1-julian@codesourcery.com/mbox/"},{"id":88320,"url":"https://patchwork.plctlab.org/api/1.2/patches/88320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com/","msgid":"<32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T16:38:30","name":"[committed] amdgcn: Fix addsub bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com/mbox/"},{"id":88321,"url":"https://patchwork.plctlab.org/api/1.2/patches/88321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427163956.3051552-1-ppalka@redhat.com/","msgid":"<20230427163956.3051552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-27T16:39:56","name":"c++: NSDMI instantiation from template context [PR109506]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427163956.3051552-1-ppalka@redhat.com/mbox/"},{"id":88362,"url":"https://patchwork.plctlab.org/api/1.2/patches/88362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427183647.99112-1-julian@codesourcery.com/","msgid":"<20230427183647.99112-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T18:36:47","name":"OpenACC: Stand-alone attach/detach clause fixes for Fortran [PR109622]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427183647.99112-1-julian@codesourcery.com/mbox/"},{"id":88384,"url":"https://patchwork.plctlab.org/api/1.2/patches/88384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427204610.3403840-1-ppalka@redhat.com/","msgid":"<20230427204610.3403840-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-27T20:46:10","name":"c++: outer args for level-lowered ttp [PR109651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427204610.3403840-1-ppalka@redhat.com/mbox/"},{"id":88396,"url":"https://patchwork.plctlab.org/api/1.2/patches/88396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427222457.1773293-1-jwakely@redhat.com/","msgid":"<20230427222457.1773293-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T22:24:57","name":"[committed] libstdc++: Fix error in doxygen comments in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427222457.1773293-1-jwakely@redhat.com/mbox/"},{"id":88423,"url":"https://patchwork.plctlab.org/api/1.2/patches/88423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428004726.3217666-1-maskray@google.com/","msgid":"<20230428004726.3217666-1-maskray@google.com>","list_archive_url":null,"date":"2023-04-28T00:47:26","name":"i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428004726.3217666-1-maskray@google.com/mbox/"},{"id":88434,"url":"https://patchwork.plctlab.org/api/1.2/patches/88434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428022141.2080-1-lidie@eswincomputing.com/","msgid":"<20230428022141.2080-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-04-28T02:21:41","name":"[RISC-V] Fix riscv_expand_conditional_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428022141.2080-1-lidie@eswincomputing.com/mbox/"},{"id":88436,"url":"https://patchwork.plctlab.org/api/1.2/patches/88436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428024641.3757002-1-pan2.li@intel.com/","msgid":"<20230428024641.3757002-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-28T02:46:41","name":"[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428024641.3757002-1-pan2.li@intel.com/mbox/"},{"id":88442,"url":"https://patchwork.plctlab.org/api/1.2/patches/88442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428032506.655667-1-apinski@marvell.com/","msgid":"<20230428032506.655667-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T03:25:06","name":"[PATCHv2] MATCH: Factor out code that for min max detection with constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428032506.655667-1-apinski@marvell.com/mbox/"},{"id":88443,"url":"https://patchwork.plctlab.org/api/1.2/patches/88443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428033045.655785-1-apinski@marvell.com/","msgid":"<20230428033045.655785-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T03:30:45","name":"PHIOPT: Move two_value_replacement to match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428033045.655785-1-apinski@marvell.com/mbox/"},{"id":88449,"url":"https://patchwork.plctlab.org/api/1.2/patches/88449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-2-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:02","name":"[01/11] riscv: xtheadbb: Add sign/zero extension support for th.ext and th.extu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-2-christoph.muellner@vrull.eu/mbox/"},{"id":88453,"url":"https://patchwork.plctlab.org/api/1.2/patches/88453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-3-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:03","name":"[02/11] riscv: xtheadmempair: Fix CFA reg notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-3-christoph.muellner@vrull.eu/mbox/"},{"id":88457,"url":"https://patchwork.plctlab.org/api/1.2/patches/88457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-4-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:04","name":"[03/11] riscv: xtheadmempair: Fix doc for th_mempair_order_operands()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-4-christoph.muellner@vrull.eu/mbox/"},{"id":88450,"url":"https://patchwork.plctlab.org/api/1.2/patches/88450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-5-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:05","name":"[04/11] riscv: thead: Adjust constraints of th_addsl INSN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-5-christoph.muellner@vrull.eu/mbox/"},{"id":88452,"url":"https://patchwork.plctlab.org/api/1.2/patches/88452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-6-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:06","name":"[05/11] riscv: Simplify output of MEM addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-6-christoph.muellner@vrull.eu/mbox/"},{"id":88455,"url":"https://patchwork.plctlab.org/api/1.2/patches/88455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-7-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:07","name":"[06/11] riscv: Define Xmode macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-7-christoph.muellner@vrull.eu/mbox/"},{"id":88454,"url":"https://patchwork.plctlab.org/api/1.2/patches/88454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-8-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:08","name":"[07/11] riscv: Move address classification info types to riscv-protos.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-8-christoph.muellner@vrull.eu/mbox/"},{"id":88458,"url":"https://patchwork.plctlab.org/api/1.2/patches/88458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-9-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:09","name":"[08/11] riscv: Prepare backend for index registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-9-christoph.muellner@vrull.eu/mbox/"},{"id":88456,"url":"https://patchwork.plctlab.org/api/1.2/patches/88456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-10-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:10","name":"[09/11] riscv: thead: Factor out XThead*-specific peepholes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-10-christoph.muellner@vrull.eu/mbox/"},{"id":88462,"url":"https://patchwork.plctlab.org/api/1.2/patches/88462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-1-christoph.muellner@vrull.eu/","msgid":"<20230428062314.2995571-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:23:13","name":"[10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-1-christoph.muellner@vrull.eu/mbox/"},{"id":88461,"url":"https://patchwork.plctlab.org/api/1.2/patches/88461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-2-christoph.muellner@vrull.eu/","msgid":"<20230428062314.2995571-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:23:14","name":"[11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-2-christoph.muellner@vrull.eu/mbox/"},{"id":88472,"url":"https://patchwork.plctlab.org/api/1.2/patches/88472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com/","msgid":"<0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T07:26:06","name":"[committed] Fortran: Fix (mostly) comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com/mbox/"},{"id":88476,"url":"https://patchwork.plctlab.org/api/1.2/patches/88476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEt3EFFjFUijaFFx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-28T07:34:40","name":"libstdc++: Another attempt to ensure g++ 13+ compiled programs enforce gcc 13.2+ libstdc++.so.6 [PR108969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEt3EFFjFUijaFFx@tucnak/mbox/"},{"id":88534,"url":"https://patchwork.plctlab.org/api/1.2/patches/88534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428090745.435BE3857711@sourceware.org/","msgid":"<20230428090745.435BE3857711@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:06:45","name":"tree-optimization/108752 - vectorize emulated vectors in lowered form","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428090745.435BE3857711@sourceware.org/mbox/"},{"id":88548,"url":"https://patchwork.plctlab.org/api/1.2/patches/88548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094851.5FEE9385771D@sourceware.org/","msgid":"<20230428094851.5FEE9385771D@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:48:01","name":"Avoid more invalid GIMPLE with register bases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094851.5FEE9385771D@sourceware.org/mbox/"},{"id":88549,"url":"https://patchwork.plctlab.org/api/1.2/patches/88549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094928.63E96385771A@sourceware.org/","msgid":"<20230428094928.63E96385771A@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:48:35","name":"tree-optimization/109644 - missing IL checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094928.63E96385771A@sourceware.org/mbox/"},{"id":88589,"url":"https://patchwork.plctlab.org/api/1.2/patches/88589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17227-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:38:30","name":"[2/5] match.pd: Remove commented out line pragmas unless -vv is used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17227-tamar@arm.com/mbox/"},{"id":88590,"url":"https://patchwork.plctlab.org/api/1.2/patches/88590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17228-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:39:23","name":"[3/5] match.pd: CSE the dump output check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17228-tamar@arm.com/mbox/"},{"id":88592,"url":"https://patchwork.plctlab.org/api/1.2/patches/88592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17229-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:40:13","name":"[3/5] genmatch: split shared code to gimple-match-exports.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17229-tamar@arm.com/mbox/"},{"id":88596,"url":"https://patchwork.plctlab.org/api/1.2/patches/88596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17230-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:44:15","name":"[5/5] match.pd: Use splits in makefile and make configurable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17230-tamar@arm.com/mbox/"},{"id":88606,"url":"https://patchwork.plctlab.org/api/1.2/patches/88606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-1-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:53","name":"[01/10] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-1-andrea.corallo@arm.com/mbox/"},{"id":88609,"url":"https://patchwork.plctlab.org/api/1.2/patches/88609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-2-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:54","name":"[02/10] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-2-andrea.corallo@arm.com/mbox/"},{"id":88607,"url":"https://patchwork.plctlab.org/api/1.2/patches/88607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-4-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:56","name":"[04/10] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-4-andrea.corallo@arm.com/mbox/"},{"id":88603,"url":"https://patchwork.plctlab.org/api/1.2/patches/88603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-5-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:57","name":"[05/10] arm: Add vorrq_n overloading into vorrq _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-5-andrea.corallo@arm.com/mbox/"},{"id":88602,"url":"https://patchwork.plctlab.org/api/1.2/patches/88602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-6-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:58","name":"[06/10] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-6-andrea.corallo@arm.com/mbox/"},{"id":88608,"url":"https://patchwork.plctlab.org/api/1.2/patches/88608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-8-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:00","name":"[08/10] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-8-andrea.corallo@arm.com/mbox/"},{"id":88604,"url":"https://patchwork.plctlab.org/api/1.2/patches/88604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-9-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:01","name":"[09/10] arm testsuite: XFAIL or relax registers in some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-9-andrea.corallo@arm.com/mbox/"},{"id":88610,"url":"https://patchwork.plctlab.org/api/1.2/patches/88610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-10-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:02","name":"[10/10] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-10-andrea.corallo@arm.com/mbox/"},{"id":88611,"url":"https://patchwork.plctlab.org/api/1.2/patches/88611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113621.942273853823@sourceware.org/","msgid":"<20230428113621.942273853823@sourceware.org>","list_archive_url":null,"date":"2023-04-28T11:35:35","name":"ipa/109652 - ICE in modification phase of IPA SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113621.942273853823@sourceware.org/mbox/"},{"id":88615,"url":"https://patchwork.plctlab.org/api/1.2/patches/88615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120748.1906656-1-jwakely@redhat.com/","msgid":"<20230428120748.1906656-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:07:48","name":"[committed] libstdc++: Simplify preprocessor/namespace nesting in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120748.1906656-1-jwakely@redhat.com/mbox/"},{"id":88618,"url":"https://patchwork.plctlab.org/api/1.2/patches/88618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120755.1906678-1-jwakely@redhat.com/","msgid":"<20230428120755.1906678-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:07:55","name":"[committed] libstdc++: Strip absolute paths from files shown in Doxygen docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120755.1906678-1-jwakely@redhat.com/mbox/"},{"id":88616,"url":"https://patchwork.plctlab.org/api/1.2/patches/88616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120800.1906699-1-jwakely@redhat.com/","msgid":"<20230428120800.1906699-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:08:00","name":"[committed] libstdc++: Minor fixes to doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120800.1906699-1-jwakely@redhat.com/mbox/"},{"id":88617,"url":"https://patchwork.plctlab.org/api/1.2/patches/88617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120805.1906718-1-jwakely@redhat.com/","msgid":"<20230428120805.1906718-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:08:05","name":"[committed] libstdc++: Improve doxygen docs for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120805.1906718-1-jwakely@redhat.com/mbox/"},{"id":88631,"url":"https://patchwork.plctlab.org/api/1.2/patches/88631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOFDQ6mAF9hM=ZdMFqNDvSJ5J9-HaQ861jzLMnMH3m3Qw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:29:38","name":"RISC-V: Eliminate redundant zero extension of minu/maxu operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOFDQ6mAF9hM=ZdMFqNDvSJ5J9-HaQ861jzLMnMH3m3Qw@mail.gmail.com/mbox/"},{"id":88632,"url":"https://patchwork.plctlab.org/api/1.2/patches/88632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428123327.686353-1-yunqiang.su@cipunited.com/","msgid":"<20230428123327.686353-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-04-28T12:33:27","name":"MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428123327.686353-1-yunqiang.su@cipunited.com/mbox/"},{"id":88635,"url":"https://patchwork.plctlab.org/api/1.2/patches/88635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dec3ac9c-d107-441e-ee0c-a4d43cd70150@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:36:59","name":"[1/3] Refactor to allow internal_fn'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dec3ac9c-d107-441e-ee0c-a4d43cd70150@arm.com/mbox/"},{"id":88637,"url":"https://patchwork.plctlab.org/api/1.2/patches/88637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c739df-eba4-e0e6-b59e-4d6ecc7511e9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:37:14","name":"[2/3] Refactor widen_plus as internal_fn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c739df-eba4-e0e6-b59e-4d6ecc7511e9@arm.com/mbox/"},{"id":88634,"url":"https://patchwork.plctlab.org/api/1.2/patches/88634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17b337e-369a-e78e-e065-94845dc8b0d4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:37:27","name":"[3/3] Remove widen_plus/minus_expr tree codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17b337e-369a-e78e-e065-94845dc8b0d4@arm.com/mbox/"},{"id":88636,"url":"https://patchwork.plctlab.org/api/1.2/patches/88636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428124232.CFF443889E20@sourceware.org/","msgid":"<20230428124232.CFF443889E20@sourceware.org>","list_archive_url":null,"date":"2023-04-28T12:41:43","name":"Add emulated scatter capability to the vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428124232.CFF443889E20@sourceware.org/mbox/"},{"id":88638,"url":"https://patchwork.plctlab.org/api/1.2/patches/88638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEvChfzMa0IotL/h@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:56:37","name":"[v2] GCC-13/changes: Add note about iostream usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEvChfzMa0IotL/h@redhat.com/mbox/"},{"id":88644,"url":"https://patchwork.plctlab.org/api/1.2/patches/88644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428131249.713463-1-yunqiang.su@cipunited.com/","msgid":"<20230428131249.713463-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-04-28T13:12:49","name":"[v2] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428131249.713463-1-yunqiang.su@cipunited.com/mbox/"},{"id":88657,"url":"https://patchwork.plctlab.org/api/1.2/patches/88657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz/","msgid":"<9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz>","list_archive_url":null,"date":"2023-04-28T14:42:10","name":"[(pushed)] contrib: port doxygen script to Python3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz/mbox/"},{"id":88664,"url":"https://patchwork.plctlab.org/api/1.2/patches/88664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428152102.1653600-1-pan2.li@intel.com/","msgid":"<20230428152102.1653600-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-28T15:21:02","name":"RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428152102.1653600-1-pan2.li@intel.com/mbox/"},{"id":88678,"url":"https://patchwork.plctlab.org/api/1.2/patches/88678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428155829.F20D120438@pchp3.se.axis.com/","msgid":"<20230428155829.F20D120438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-28T15:58:29","name":"testsuite: Handle empty assembly lines in check-function-bodies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428155829.F20D120438@pchp3.se.axis.com/mbox/"},{"id":88680,"url":"https://patchwork.plctlab.org/api/1.2/patches/88680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com/","msgid":"<46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com>","list_archive_url":null,"date":"2023-04-28T16:10:07","name":"riscv: Allow vector constants in riscv_const_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com/mbox/"},{"id":88684,"url":"https://patchwork.plctlab.org/api/1.2/patches/88684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-2-apinski@marvell.com/","msgid":"<20230428170213.677572-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T17:02:12","name":"[1/2] PHIOPT: Allow moving of some builtin calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-2-apinski@marvell.com/mbox/"},{"id":88685,"url":"https://patchwork.plctlab.org/api/1.2/patches/88685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-3-apinski@marvell.com/","msgid":"<20230428170213.677572-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T17:02:13","name":"[2/2] MATCH: add some of what phiopt'\''s builtin_zero_pattern did","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-3-apinski@marvell.com/mbox/"},{"id":88690,"url":"https://patchwork.plctlab.org/api/1.2/patches/88690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428174524.1006324-1-mikpelinux@gmail.com/","msgid":"<20230428174524.1006324-1-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-04-28T17:45:24","name":"add glibc-stdint.h to vax and lm32 linux target (PR target/105525)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428174524.1006324-1-mikpelinux@gmail.com/mbox/"},{"id":88700,"url":"https://patchwork.plctlab.org/api/1.2/patches/88700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428190508.4091082-1-ppalka@redhat.com/","msgid":"<20230428190508.4091082-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-28T19:05:08","name":"c++: RESULT_DECL replacement in constexpr call result [PR105440]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428190508.4091082-1-ppalka@redhat.com/mbox/"},{"id":88709,"url":"https://patchwork.plctlab.org/api/1.2/patches/88709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428194910.18611-1-palmer@rivosinc.com/","msgid":"<20230428194910.18611-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-28T19:49:10","name":"WIP: All the -march documentation I got around to writing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428194910.18611-1-palmer@rivosinc.com/mbox/"},{"id":88756,"url":"https://patchwork.plctlab.org/api/1.2/patches/88756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6sz66xx.fsf@oldenburg.str.redhat.com/","msgid":"<87h6sz66xx.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-04-28T21:19:22","name":"libstdc++: Mention recent libgcc_s symbol versions in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6sz66xx.fsf@oldenburg.str.redhat.com/mbox/"},{"id":88770,"url":"https://patchwork.plctlab.org/api/1.2/patches/88770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-2-sandra@codesourcery.com/","msgid":"<20230428232254.628185-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:52","name":"[1/3] OpenMP: C support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-2-sandra@codesourcery.com/mbox/"},{"id":88771,"url":"https://patchwork.plctlab.org/api/1.2/patches/88771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-3-sandra@codesourcery.com/","msgid":"<20230428232254.628185-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:53","name":"[2/3] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-3-sandra@codesourcery.com/mbox/"},{"id":88772,"url":"https://patchwork.plctlab.org/api/1.2/patches/88772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-4-sandra@codesourcery.com/","msgid":"<20230428232254.628185-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:54","name":"[3/3] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-4-sandra@codesourcery.com/mbox/"},{"id":88774,"url":"https://patchwork.plctlab.org/api/1.2/patches/88774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428233446.688570-1-apinski@marvell.com/","msgid":"<20230428233446.688570-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T23:34:46","name":"target: [PR109657] (a ? -1 : 0) | b could be optimized better for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428233446.688570-1-apinski@marvell.com/mbox/"},{"id":88860,"url":"https://patchwork.plctlab.org/api/1.2/patches/88860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-2-arsen@aarsen.me/","msgid":"<20230429101640.1697750-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-29T10:16:39","name":"[1/2] libstdc++: Implement more maintainable header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-2-arsen@aarsen.me/mbox/"},{"id":88861,"url":"https://patchwork.plctlab.org/api/1.2/patches/88861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-3-arsen@aarsen.me/","msgid":"<20230429101640.1697750-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-29T10:16:40","name":"[2/2] libstdc++: Replace all manual FTM definitions and use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-3-arsen@aarsen.me/mbox/"},{"id":88869,"url":"https://patchwork.plctlab.org/api/1.2/patches/88869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105741.108576-1-julian@codesourcery.com/","msgid":"<20230429105741.108576-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-29T10:57:41","name":"OpenACC: Further attach/detach clause fixes for Fortran [PR109622]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105741.108576-1-julian@codesourcery.com/mbox/"},{"id":88870,"url":"https://patchwork.plctlab.org/api/1.2/patches/88870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105959.23211-1-gaofei@eswincomputing.com/","msgid":"<20230429105959.23211-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-04-29T10:59:59","name":"[V2] RISC-V: decouple stack allocation for rv32e w/o save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105959.23211-1-gaofei@eswincomputing.com/mbox/"},{"id":88874,"url":"https://patchwork.plctlab.org/api/1.2/patches/88874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429133250.3789188-1-pan2.li@intel.com/","msgid":"<20230429133250.3789188-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-29T13:32:50","name":"[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429133250.3789188-1-pan2.li@intel.com/mbox/"},{"id":88882,"url":"https://patchwork.plctlab.org/api/1.2/patches/88882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com/","msgid":"<3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com>","list_archive_url":null,"date":"2023-04-29T16:21:20","name":"[committed,PR,target/109549] Adjust mips test for recent ifcvt costing changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com/mbox/"},{"id":88884,"url":"https://patchwork.plctlab.org/api/1.2/patches/88884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com/","msgid":"<004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-29T16:24:13","name":"[xstormy16] Recognize/support swpn (swap nibbles) instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com/mbox/"},{"id":88885,"url":"https://patchwork.plctlab.org/api/1.2/patches/88885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com/","msgid":"<004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-29T16:25:48","name":"[xstormy16] Efficient HImode rotate left by a single bit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com/mbox/"},{"id":88899,"url":"https://patchwork.plctlab.org/api/1.2/patches/88899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZE3LpThCgIob9yHG@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-30T02:00:05","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZE3LpThCgIob9yHG@Thaum.localdomain/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-04/mbox/"},{"id":21,"url":"https://patchwork.plctlab.org/api/1.2/bundles/21/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-05/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-05","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":88946,"url":"https://patchwork.plctlab.org/api/1.2/patches/88946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a824a5-a7eb-91db-a2fe-01e24bd47cd1@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-04-30T19:31:41","name":"[(pushed)] libsanitizer: link hwasan against lsan library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a824a5-a7eb-91db-a2fe-01e24bd47cd1@suse.cz/mbox/"},{"id":88948,"url":"https://patchwork.plctlab.org/api/1.2/patches/88948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04283010-e7bc-5d28-9eec-4a316799c440@suse.cz/","msgid":"<04283010-e7bc-5d28-9eec-4a316799c440@suse.cz>","list_archive_url":null,"date":"2023-04-30T19:40:24","name":"[(pushed)] hwasan: adjust wording in expected output in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04283010-e7bc-5d28-9eec-4a316799c440@suse.cz/mbox/"},{"id":88955,"url":"https://patchwork.plctlab.org/api/1.2/patches/88955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211248.761908-1-apinski@marvell.com/","msgid":"<20230430211248.761908-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:12:48","name":"MATCH: Port CLRSB part of builtin_zero_pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211248.761908-1-apinski@marvell.com/mbox/"},{"id":88956,"url":"https://patchwork.plctlab.org/api/1.2/patches/88956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211330.761973-1-apinski@marvell.com/","msgid":"<20230430211330.761973-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:13:30","name":"PHIOPT: small refactoring of match_simplify_replacement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211330.761973-1-apinski@marvell.com/mbox/"},{"id":88957,"url":"https://patchwork.plctlab.org/api/1.2/patches/88957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211356.762030-1-apinski@marvell.com/","msgid":"<20230430211356.762030-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:13:56","name":"PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211356.762030-1-apinski@marvell.com/mbox/"},{"id":88960,"url":"https://patchwork.plctlab.org/api/1.2/patches/88960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com/","msgid":"<001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-30T22:53:46","name":"[Committed] Update xstormy16'\''s neghi2 pattern to not clobber the carry flag.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com/mbox/"},{"id":88972,"url":"https://patchwork.plctlab.org/api/1.2/patches/88972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-1-aldyh@redhat.com/","msgid":"<20230501062906.564803-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:55","name":"[COMMITTED] vrange_storage overhaul","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-1-aldyh@redhat.com/mbox/"},{"id":88970,"url":"https://patchwork.plctlab.org/api/1.2/patches/88970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-2-aldyh@redhat.com/","msgid":"<20230501062906.564803-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:56","name":"[COMMITTED] Remove irange::{min,max,kind}.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-2-aldyh@redhat.com/mbox/"},{"id":88969,"url":"https://patchwork.plctlab.org/api/1.2/patches/88969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-3-aldyh@redhat.com/","msgid":"<20230501062906.564803-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:57","name":"[COMMITTED] Remove irange::tree_{lower,upper}_bound.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-3-aldyh@redhat.com/mbox/"},{"id":88971,"url":"https://patchwork.plctlab.org/api/1.2/patches/88971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-4-aldyh@redhat.com/","msgid":"<20230501062906.564803-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:58","name":"[COMMITTED] Various cleanups in vr-values.cc towards ranger API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-4-aldyh@redhat.com/mbox/"},{"id":88977,"url":"https://patchwork.plctlab.org/api/1.2/patches/88977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-5-aldyh@redhat.com/","msgid":"<20230501062906.564803-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:59","name":"[COMMITTED] Convert get_legacy_range in bounds_of_var_in_loop to irange API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-5-aldyh@redhat.com/mbox/"},{"id":88974,"url":"https://patchwork.plctlab.org/api/1.2/patches/88974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-6-aldyh@redhat.com/","msgid":"<20230501062906.564803-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:00","name":"[COMMITTED] Merge irange::union/intersect into irange_union/intersect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-6-aldyh@redhat.com/mbox/"},{"id":88980,"url":"https://patchwork.plctlab.org/api/1.2/patches/88980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-7-aldyh@redhat.com/","msgid":"<20230501062906.564803-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:01","name":"[COMMITTED] Conversion to irange wide_int API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-7-aldyh@redhat.com/mbox/"},{"id":88975,"url":"https://patchwork.plctlab.org/api/1.2/patches/88975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-8-aldyh@redhat.com/","msgid":"<20230501062906.564803-8-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:02","name":"[COMMITTED] Replace vrp_val* with wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-8-aldyh@redhat.com/mbox/"},{"id":88978,"url":"https://patchwork.plctlab.org/api/1.2/patches/88978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-9-aldyh@redhat.com/","msgid":"<20230501062906.564803-9-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:03","name":"[COMMITTED] Rewrite bounds_of_var_in_loop() to use ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-9-aldyh@redhat.com/mbox/"},{"id":88976,"url":"https://patchwork.plctlab.org/api/1.2/patches/88976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-10-aldyh@redhat.com/","msgid":"<20230501062906.564803-10-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:04","name":"[COMMITTED] Convert internal representation of irange to wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-10-aldyh@redhat.com/mbox/"},{"id":88973,"url":"https://patchwork.plctlab.org/api/1.2/patches/88973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-11-aldyh@redhat.com/","msgid":"<20230501062906.564803-11-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:05","name":"[COMMITTED] Cleanup irange::set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-11-aldyh@redhat.com/mbox/"},{"id":88979,"url":"https://patchwork.plctlab.org/api/1.2/patches/88979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-12-aldyh@redhat.com/","msgid":"<20230501062906.564803-12-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:06","name":"[COMMITTED] Inline irange::set_nonzero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-12-aldyh@redhat.com/mbox/"},{"id":88981,"url":"https://patchwork.plctlab.org/api/1.2/patches/88981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501064655.588111-1-aldyh@redhat.com/","msgid":"<20230501064655.588111-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:46:55","name":"[COMMITTED] Remove unused friends in int_range<>.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501064655.588111-1-aldyh@redhat.com/mbox/"},{"id":88984,"url":"https://patchwork.plctlab.org/api/1.2/patches/88984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501081901.386194-1-dimitar@dinux.eu/","msgid":"<20230501081901.386194-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-05-01T08:19:01","name":"[committed] libgcc pru: Define TARGET_HAS_NO_HW_DIVIDE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501081901.386194-1-dimitar@dinux.eu/mbox/"},{"id":89047,"url":"https://patchwork.plctlab.org/api/1.2/patches/89047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com/","msgid":"<91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com>","list_archive_url":null,"date":"2023-05-01T13:21:59","name":"[committed] Enable LRA on several ports","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com/mbox/"},{"id":89048,"url":"https://patchwork.plctlab.org/api/1.2/patches/89048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com/","msgid":"<0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com>","list_archive_url":null,"date":"2023-05-01T13:42:25","name":"[committed] Convert xstormy16 to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com/mbox/"},{"id":89080,"url":"https://patchwork.plctlab.org/api/1.2/patches/89080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501161037.614414-1-patrick@rivosinc.com/","msgid":"<20230501161037.614414-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-01T16:10:37","name":"RISC-V: Name newly added flags in changelog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501161037.614414-1-patrick@rivosinc.com/mbox/"},{"id":89081,"url":"https://patchwork.plctlab.org/api/1.2/patches/89081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ce8b7413-8aa1-46d7-b361-5fc943e01d23-1682958599603@3c-app-gmx-bap68/","msgid":"","list_archive_url":null,"date":"2023-05-01T16:29:59","name":"Fortran: overloading of intrinsic binary operators [PR109641]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ce8b7413-8aa1-46d7-b361-5fc943e01d23-1682958599603@3c-app-gmx-bap68/mbox/"},{"id":89082,"url":"https://patchwork.plctlab.org/api/1.2/patches/89082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501163700.797083-1-apinski@marvell.com/","msgid":"<20230501163700.797083-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-01T16:37:00","name":"PHIOPT: Update comment about what the pass now does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501163700.797083-1-apinski@marvell.com/mbox/"},{"id":89168,"url":"https://patchwork.plctlab.org/api/1.2/patches/89168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-1-ppalka@redhat.com/","msgid":"<20230501195902.1915703-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-01T19:59:01","name":"[1/2] c++: potentiality of templated memfn call [PR109480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-1-ppalka@redhat.com/mbox/"},{"id":89167,"url":"https://patchwork.plctlab.org/api/1.2/patches/89167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-2-ppalka@redhat.com/","msgid":"<20230501195902.1915703-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-01T19:59:02","name":"[2/2] c++: non-dep init folding and access checking [PR109480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-2-ppalka@redhat.com/mbox/"},{"id":89176,"url":"https://patchwork.plctlab.org/api/1.2/patches/89176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501205454.1627105-1-jason@redhat.com/","msgid":"<20230501205454.1627105-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-01T20:54:54","name":"[pushed] c++: array DMI and member fn [PR109666]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501205454.1627105-1-jason@redhat.com/mbox/"},{"id":89185,"url":"https://patchwork.plctlab.org/api/1.2/patches/89185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501215112.432409-1-polacek@redhat.com/","msgid":"<20230501215112.432409-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-01T21:51:12","name":"[pushed] ubsan: ubsan_maybe_instrument_array_ref tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501215112.432409-1-polacek@redhat.com/mbox/"},{"id":89207,"url":"https://patchwork.plctlab.org/api/1.2/patches/89207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501235412.451394-1-polacek@redhat.com/","msgid":"<20230501235412.451394-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-01T23:54:12","name":"c++: Move -Wdangling-reference to -Wextra [PR109642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501235412.451394-1-polacek@redhat.com/mbox/"},{"id":89266,"url":"https://patchwork.plctlab.org/api/1.2/patches/89266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDE8+OaQ1x9YiyU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:08:19","name":"i386: Fix up handling of debug insns in STV [PR109676]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDE8+OaQ1x9YiyU@tucnak/mbox/"},{"id":89284,"url":"https://patchwork.plctlab.org/api/1.2/patches/89284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNAlHXg0CHx6Os@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:42:42","name":"libstdc++: Shut up -Wattribute-alias warning [PR109694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNAlHXg0CHx6Os@tucnak/mbox/"},{"id":89286,"url":"https://patchwork.plctlab.org/api/1.2/patches/89286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNkV3au6VQsVGK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:45:05","name":"libstdc++: Regenerate baseline_symbols.txt files for Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNkV3au6VQsVGK@tucnak/mbox/"},{"id":89300,"url":"https://patchwork.plctlab.org/api/1.2/patches/89300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095602.D2A9B3858C74@sourceware.org/","msgid":"<20230502095602.D2A9B3858C74@sourceware.org>","list_archive_url":null,"date":"2023-05-02T09:55:17","name":"[i386] Fix testcases for emulated scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095602.D2A9B3858C74@sourceware.org/mbox/"},{"id":89301,"url":"https://patchwork.plctlab.org/api/1.2/patches/89301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095712.955103857341@sourceware.org/","msgid":"<20230502095712.955103857341@sourceware.org>","list_archive_url":null,"date":"2023-05-02T09:56:28","name":"tree-optimization/109672 - properly check emulated plus during vect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095712.955103857341@sourceware.org/mbox/"},{"id":89330,"url":"https://patchwork.plctlab.org/api/1.2/patches/89330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502122155.2576725-1-romain.naour@gmail.com/","msgid":"<20230502122155.2576725-1-romain.naour@gmail.com>","list_archive_url":null,"date":"2023-05-02T12:21:55","name":"RISC-V: fix build issue with gcc 4.9.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502122155.2576725-1-romain.naour@gmail.com/mbox/"},{"id":89343,"url":"https://patchwork.plctlab.org/api/1.2/patches/89343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz/","msgid":"<9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz>","list_archive_url":null,"date":"2023-05-02T12:36:07","name":"[(pushed)] docs: port documentation of VRP params","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz/mbox/"},{"id":89344,"url":"https://patchwork.plctlab.org/api/1.2/patches/89344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502125003.1967323-1-ppalka@redhat.com/","msgid":"<20230502125003.1967323-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-02T12:50:03","name":"[pushed] c++: Add testcase for already fixed PR [PR109506]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502125003.1967323-1-ppalka@redhat.com/mbox/"},{"id":89396,"url":"https://patchwork.plctlab.org/api/1.2/patches/89396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de/","msgid":"<1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de>","list_archive_url":null,"date":"2023-05-02T14:32:05","name":"release the sorted FDE array when deregistering a frame [PR109685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de/mbox/"},{"id":89397,"url":"https://patchwork.plctlab.org/api/1.2/patches/89397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502144504.14654-1-amonakov@ispras.ru/","msgid":"<20230502144504.14654-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-02T14:45:04","name":"do not tailcall __sanitizer_cov_trace_pc [PR90746]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502144504.14654-1-amonakov@ispras.ru/mbox/"},{"id":89403,"url":"https://patchwork.plctlab.org/api/1.2/patches/89403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFEp73Ks9fKJ0tiW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T15:19:11","name":"c++: Fix up VEC_INIT_EXPR gimplification after r12-7069","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFEp73Ks9fKJ0tiW@tucnak/mbox/"},{"id":89407,"url":"https://patchwork.plctlab.org/api/1.2/patches/89407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d481896de5fbe840039ad944da9bdd1ae69a78cc.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-02T15:52:19","name":"rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d481896de5fbe840039ad944da9bdd1ae69a78cc.camel@us.ibm.com/mbox/"},{"id":89443,"url":"https://patchwork.plctlab.org/api/1.2/patches/89443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-1-jason@redhat.com/","msgid":"<20230502202525.1964821-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:25:24","name":"[1/2] c++: std::variant slow to compile [PR109678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-1-jason@redhat.com/mbox/"},{"id":89444,"url":"https://patchwork.plctlab.org/api/1.2/patches/89444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-2-jason@redhat.com/","msgid":"<20230502202525.1964821-2-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:25:25","name":"[2/2] c++: look for empty base at specific offset [PR109678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-2-jason@redhat.com/mbox/"},{"id":89445,"url":"https://patchwork.plctlab.org/api/1.2/patches/89445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202623.1965601-1-jason@redhat.com/","msgid":"<20230502202623.1965601-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:26:23","name":"[pushed] c++: less invalidate_class_lookup_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202623.1965601-1-jason@redhat.com/mbox/"},{"id":89446,"url":"https://patchwork.plctlab.org/api/1.2/patches/89446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202838.1098272-1-patrick@rivosinc.com/","msgid":"<20230502202838.1098272-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-02T20:28:38","name":"[Committed,11/11] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202838.1098272-1-patrick@rivosinc.com/mbox/"},{"id":89460,"url":"https://patchwork.plctlab.org/api/1.2/patches/89460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502211310.220156-1-ppalka@redhat.com/","msgid":"<20230502211310.220156-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-02T21:13:10","name":"c++: satisfaction of non-dep member alias template-id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502211310.220156-1-ppalka@redhat.com/mbox/"},{"id":89463,"url":"https://patchwork.plctlab.org/api/1.2/patches/89463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502214559.868243-1-apinski@marvell.com/","msgid":"<20230502214559.868243-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-02T21:45:59","name":"[COMMITTED] tree-optimization: [PR109702] MATCH: Fix a ? func(a) : N patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502214559.868243-1-apinski@marvell.com/mbox/"},{"id":89488,"url":"https://patchwork.plctlab.org/api/1.2/patches/89488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502225251.1990129-1-jason@redhat.com/","msgid":"<20230502225251.1990129-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T22:52:51","name":"[pushed] c++: simplify member template substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502225251.1990129-1-jason@redhat.com/mbox/"},{"id":89514,"url":"https://patchwork.plctlab.org/api/1.2/patches/89514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231015.56181-1-polacek@redhat.com/","msgid":"<20230502231015.56181-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-02T23:10:15","name":"c++: wrong std::is_convertible with cv-qual fn [PR109680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231015.56181-1-polacek@redhat.com/mbox/"},{"id":89515,"url":"https://patchwork.plctlab.org/api/1.2/patches/89515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231417.872953-1-apinski@marvell.com/","msgid":"<20230502231417.872953-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-02T23:14:17","name":"Add stats to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231417.872953-1-apinski@marvell.com/mbox/"},{"id":89539,"url":"https://patchwork.plctlab.org/api/1.2/patches/89539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503021713.1146069-2-tchaikov@gmail.com/","msgid":"<20230503021713.1146069-2-tchaikov@gmail.com>","list_archive_url":null,"date":"2023-05-03T02:17:13","name":"[v2,1/1] libstdc++: Set _M_string_length before calling _M_dispose() [PR109703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503021713.1146069-2-tchaikov@gmail.com/mbox/"},{"id":89541,"url":"https://patchwork.plctlab.org/api/1.2/patches/89541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-1-apinski@marvell.com/","msgid":"<20230503023050.880728-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T02:30:49","name":"[1/2] Factor out copy_phi_args from gimple_duplicate_sese_tail and remove_forwarder_block.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-1-apinski@marvell.com/mbox/"},{"id":89542,"url":"https://patchwork.plctlab.org/api/1.2/patches/89542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-2-apinski@marvell.com/","msgid":"<20230503023050.880728-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T02:30:50","name":"[2/2] PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-2-apinski@marvell.com/mbox/"},{"id":89557,"url":"https://patchwork.plctlab.org/api/1.2/patches/89557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503043023.2076907-1-jason@redhat.com/","msgid":"<20230503043023.2076907-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-03T04:30:23","name":"[pushed] c++: fix TTP level reduction cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503043023.2076907-1-jason@redhat.com/mbox/"},{"id":89662,"url":"https://patchwork.plctlab.org/api/1.2/patches/89662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14c76dc-af6a-78f7-4ae8-99f9b2c1a4c5@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-05-03T09:17:52","name":"[(pushed)] clang warning: warning: private field '\''m_gc'\'' is not used [-Wunused-private-field]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14c76dc-af6a-78f7-4ae8-99f9b2c1a4c5@suse.cz/mbox/"},{"id":89680,"url":"https://patchwork.plctlab.org/api/1.2/patches/89680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503101310.143791331F@imap2.suse-dmz.suse.de/","msgid":"<20230503101310.143791331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T10:13:09","name":"[GCC,11] tree-optimization/109473 - fix type mismatch in reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503101310.143791331F@imap2.suse-dmz.suse.de/mbox/"},{"id":89701,"url":"https://patchwork.plctlab.org/api/1.2/patches/89701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7ctp4rbz.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-05-03T10:55:28","name":"riscv: Don'\''t add -latomic with -pthread","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7ctp4rbz.fsf@suse.de/mbox/"},{"id":89712,"url":"https://patchwork.plctlab.org/api/1.2/patches/89712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y99d5rt.fsf@euler.schwinge.homeip.net/","msgid":"<875y99d5rt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-03T11:16:22","name":"Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''torture-init'\'' the '\''LTO_TORTURE_OPTIONS'\'' (was: Update testsuite to run with slim LTO)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y99d5rt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":89720,"url":"https://patchwork.plctlab.org/api/1.2/patches/89720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503114145.662934-1-aldyh@redhat.com/","msgid":"<20230503114145.662934-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-03T11:41:45","name":"Remove type from vrange_storage::equal_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503114145.662934-1-aldyh@redhat.com/mbox/"},{"id":89738,"url":"https://patchwork.plctlab.org/api/1.2/patches/89738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com/","msgid":"<25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com>","list_archive_url":null,"date":"2023-05-03T12:34:38","name":"[10/10] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com/mbox/"},{"id":89740,"url":"https://patchwork.plctlab.org/api/1.2/patches/89740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125824.813C913584@imap2.suse-dmz.suse.de/","msgid":"<20230503125824.813C913584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T12:58:24","name":"More last_stmt removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125824.813C913584@imap2.suse-dmz.suse.de/mbox/"},{"id":89741,"url":"https://patchwork.plctlab.org/api/1.2/patches/89741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125847.D146213584@imap2.suse-dmz.suse.de/","msgid":"<20230503125847.D146213584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T12:58:47","name":"Rename last_stmt to last_nondebug_stmt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125847.D146213584@imap2.suse-dmz.suse.de/mbox/"},{"id":89753,"url":"https://patchwork.plctlab.org/api/1.2/patches/89753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503135043.273442-1-ppalka@redhat.com/","msgid":"<20230503135043.273442-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-03T13:50:43","name":"c++: ahead of time variable template-id coercion [PR89442]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503135043.273442-1-ppalka@redhat.com/mbox/"},{"id":89768,"url":"https://patchwork.plctlab.org/api/1.2/patches/89768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz/","msgid":"<0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz>","list_archive_url":null,"date":"2023-05-03T14:37:07","name":"[(pushed)] riscv: fix error: control reaches end of non-void function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz/mbox/"},{"id":89769,"url":"https://patchwork.plctlab.org/api/1.2/patches/89769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503143709.50270-1-christophe.lyon@arm.com/","msgid":"<20230503143709.50270-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-03T14:37:09","name":"[v2,03/22] arm: [MVE intrinsics] Rework vreinterpretq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503143709.50270-1-christophe.lyon@arm.com/mbox/"},{"id":89775,"url":"https://patchwork.plctlab.org/api/1.2/patches/89775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com/","msgid":"<77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-03T15:30:14","name":"rs6000: vec_cmpne confusing implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com/mbox/"},{"id":89783,"url":"https://patchwork.plctlab.org/api/1.2/patches/89783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qjxuzs6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-03T16:48:25","name":"[1/2] aarch64: Rename abi_break parameters [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qjxuzs6.fsf@arm.com/mbox/"},{"id":89784,"url":"https://patchwork.plctlab.org/api/1.2/patches/89784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8h9tl72.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-03T16:48:49","name":"[2/2] aarch64: Fix ABI handling of aligned enums [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8h9tl72.fsf@arm.com/mbox/"},{"id":89798,"url":"https://patchwork.plctlab.org/api/1.2/patches/89798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171612.687750-1-aldyh@redhat.com/","msgid":"<20230503171612.687750-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-03T17:16:12","name":"[COMMITTED] Allow varying ranges of unknown types in irange::verify_range [PR109711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171612.687750-1-aldyh@redhat.com/mbox/"},{"id":89802,"url":"https://patchwork.plctlab.org/api/1.2/patches/89802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171922.1120098-1-patrick@rivosinc.com/","msgid":"<20230503171922.1120098-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-03T17:19:22","name":"[gcc13,backport] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171922.1120098-1-patrick@rivosinc.com/mbox/"},{"id":89823,"url":"https://patchwork.plctlab.org/api/1.2/patches/89823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKrSMd4ERX2hWsy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-03T18:43:20","name":"libstdc++: Fix up abi.exp FAILs on powerpc64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKrSMd4ERX2hWsy@tucnak/mbox/"},{"id":89830,"url":"https://patchwork.plctlab.org/api/1.2/patches/89830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKtuNYTXlDlSBYC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-03T18:53:44","name":"libstdc++: Fix up abi.exp FAILs on powerpc64le-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKtuNYTXlDlSBYC@tucnak/mbox/"},{"id":89833,"url":"https://patchwork.plctlab.org/api/1.2/patches/89833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503192504.2299704-1-jason@redhat.com/","msgid":"<20230503192504.2299704-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-03T19:25:04","name":"[pushed] c++: over-eager friend matching [PR109649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503192504.2299704-1-jason@redhat.com/mbox/"},{"id":89859,"url":"https://patchwork.plctlab.org/api/1.2/patches/89859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503211731.182963-1-arsen@aarsen.me/","msgid":"<20230503211731.182963-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-05-03T21:17:31","name":"[PUSHED,gcc-11] extend.texi: replace @itemx not preceded by @item.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503211731.182963-1-arsen@aarsen.me/mbox/"},{"id":89869,"url":"https://patchwork.plctlab.org/api/1.2/patches/89869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231103.931391-1-apinski@marvell.com/","msgid":"<20230503231103.931391-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:11:03","name":"PHIOPT: Improve replace_phi_edge_with_variable'\''s dce_ssa_names slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231103.931391-1-apinski@marvell.com/mbox/"},{"id":89870,"url":"https://patchwork.plctlab.org/api/1.2/patches/89870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-1-apinski@marvell.com/","msgid":"<20230503231224.931656-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:12:23","name":"[1/2] Move copy_phi_arg_into_existing_phi to common location and use it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-1-apinski@marvell.com/mbox/"},{"id":89871,"url":"https://patchwork.plctlab.org/api/1.2/patches/89871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-2-apinski@marvell.com/","msgid":"<20230503231224.931656-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:12:24","name":"[PATCHv2,2/2] PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-2-apinski@marvell.com/mbox/"},{"id":89881,"url":"https://patchwork.plctlab.org/api/1.2/patches/89881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504000721.AA69920425@pchp3.se.axis.com/","msgid":"<20230504000721.AA69920425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:07:21","name":"[committed] CRIS-LRA: Fix uses of reload_in_progress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504000721.AA69920425@pchp3.se.axis.com/mbox/"},{"id":89883,"url":"https://patchwork.plctlab.org/api/1.2/patches/89883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004415.3F59E20438@pchp3.se.axis.com/","msgid":"<20230504004415.3F59E20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:44:15","name":"[committed] CRIS-LRA: Define TARGET_SPILL_CLASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004415.3F59E20438@pchp3.se.axis.com/mbox/"},{"id":89884,"url":"https://patchwork.plctlab.org/api/1.2/patches/89884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004748.E0F7D20416@pchp3.se.axis.com/","msgid":"<20230504004748.E0F7D20416@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:47:48","name":"[committed] CRIS: peephole2 an \"and\" with a contiguous \"one-sided\" sequences of 1s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004748.E0F7D20416@pchp3.se.axis.com/mbox/"},{"id":89902,"url":"https://patchwork.plctlab.org/api/1.2/patches/89902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504032535.1368877-1-hongtao.liu@intel.com/","msgid":"<20230504032535.1368877-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-04T03:25:35","name":"[v2] Canonicalize vec_merge when mask is constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504032535.1368877-1-hongtao.liu@intel.com/mbox/"},{"id":89921,"url":"https://patchwork.plctlab.org/api/1.2/patches/89921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504054544.203366-1-juzhe.zhong@rivai.ai/","msgid":"<20230504054544.203366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-04T05:45:44","name":"[V3] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504054544.203366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":89922,"url":"https://patchwork.plctlab.org/api/1.2/patches/89922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504055446.1675940-1-hongtao.liu@intel.com/","msgid":"<20230504055446.1675940-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-04T05:54:46","name":"[powerpc] Add a peephole2 to eliminate redundant move from VSX_REGS to GENERAL_REGS when it'\''s from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504055446.1675940-1-hongtao.liu@intel.com/mbox/"},{"id":89936,"url":"https://patchwork.plctlab.org/api/1.2/patches/89936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504072936.116825-1-kito.cheng@sifive.com/","msgid":"<20230504072936.116825-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-04T07:29:37","name":"RISC-V: Handle multi-lib path correclty for linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504072936.116825-1-kito.cheng@sifive.com/mbox/"},{"id":89939,"url":"https://patchwork.plctlab.org/api/1.2/patches/89939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de/","msgid":"<20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T07:43:13","name":"tree-optimization/109724 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de/mbox/"},{"id":89951,"url":"https://patchwork.plctlab.org/api/1.2/patches/89951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rwbkh0.fsf@euler.schwinge.homeip.net/","msgid":"<87r0rwbkh0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-04T07:54:03","name":"libgomp C++ testsuite: Use '\''lang_include_flags'\'' instead of '\''libstdcxx_includes'\'' (was: [PATCH] libgomp: Add openacc_{cuda,cublas,cudart} effective targets and use them in openacc testsuite)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rwbkh0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":89954,"url":"https://patchwork.plctlab.org/api/1.2/patches/89954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504080130.24217-1-kito.cheng@sifive.com/","msgid":"<20230504080130.24217-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-04T08:01:31","name":"[v2] RISC-V: Handle multi-lib path correclty for linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504080130.24217-1-kito.cheng@sifive.com/mbox/"},{"id":89995,"url":"https://patchwork.plctlab.org/api/1.2/patches/89995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504083537.2719788-1-pan2.li@intel.com/","msgid":"<20230504083537.2719788-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-04T08:35:37","name":"RISC-V: Legitimise the const0_rtx for RVV indexed load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504083537.2719788-1-pan2.li@intel.com/mbox/"},{"id":90000,"url":"https://patchwork.plctlab.org/api/1.2/patches/90000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com/","msgid":"<47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com>","list_archive_url":null,"date":"2023-05-04T08:56:22","name":"[PATCHv2,rs6000] Splat vector small V2DI constants with ISA 2.07 instructions [PR104124]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com/mbox/"},{"id":90007,"url":"https://patchwork.plctlab.org/api/1.2/patches/90007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504091118.2805091-1-pan2.li@intel.com/","msgid":"<20230504091118.2805091-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-04T09:11:18","name":"[v2] RISC-V: Legitimise the const0_rtx for RVV indexed load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504091118.2805091-1-pan2.li@intel.com/mbox/"},{"id":90040,"url":"https://patchwork.plctlab.org/api/1.2/patches/90040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504105126.0AC9013444@imap2.suse-dmz.suse.de/","msgid":"<20230504105126.0AC9013444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T10:51:25","name":"tree-optimization/109721 - emulated vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504105126.0AC9013444@imap2.suse-dmz.suse.de/mbox/"},{"id":90050,"url":"https://patchwork.plctlab.org/api/1.2/patches/90050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4amfmATdWfLpUjxy+0Hoisjg+7TKOg9wVDOq820RQu_HQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T11:04:28","name":"i386: Improve index_register_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4amfmATdWfLpUjxy+0Hoisjg+7TKOg9wVDOq820RQu_HQ@mail.gmail.com/mbox/"},{"id":90056,"url":"https://patchwork.plctlab.org/api/1.2/patches/90056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504115031.51842-1-jwakely@redhat.com/","msgid":"<20230504115031.51842-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-04T11:50:31","name":"[committed] libstdc++: Document new library version in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504115031.51842-1-jwakely@redhat.com/mbox/"},{"id":90059,"url":"https://patchwork.plctlab.org/api/1.2/patches/90059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5ykpaj2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-04T12:05:05","name":"[libstdc++] use strtold for from_chars even without locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5ykpaj2.fsf@lxoliva.fsfla.org/mbox/"},{"id":90060,"url":"https://patchwork.plctlab.org/api/1.2/patches/90060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y98padr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-04T12:08:16","name":"[vxworks,testsuite,aarch64] use builtin in pred-not-gen-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y98padr.fsf@lxoliva.fsfla.org/mbox/"},{"id":90082,"url":"https://patchwork.plctlab.org/api/1.2/patches/90082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504132540.286148-1-juzhe.zhong@rivai.ai/","msgid":"<20230504132540.286148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-04T13:25:40","name":"[V4] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504132540.286148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90090,"url":"https://patchwork.plctlab.org/api/1.2/patches/90090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504135932.1618B13444@imap2.suse-dmz.suse.de/","msgid":"<20230504135932.1618B13444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T13:59:31","name":"[RFC] tree-optimization/104475 - bogus -Wstringop-overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504135932.1618B13444@imap2.suse-dmz.suse.de/mbox/"},{"id":90139,"url":"https://patchwork.plctlab.org/api/1.2/patches/90139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163340.1327067-1-ppalka@redhat.com/","msgid":"<20230504163340.1327067-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-04T16:33:40","name":"c++: some assorted code improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163340.1327067-1-ppalka@redhat.com/mbox/"},{"id":90140,"url":"https://patchwork.plctlab.org/api/1.2/patches/90140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163353.1327143-1-ppalka@redhat.com/","msgid":"<20230504163353.1327143-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-04T16:33:53","name":"c++: fix pretty printing of '\''alignof'\'' vs '\''__alignof__'\'' [PR85979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163353.1327143-1-ppalka@redhat.com/mbox/"},{"id":90153,"url":"https://patchwork.plctlab.org/api/1.2/patches/90153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504170808.1829411-1-rzinsly@ventanamicro.com/","msgid":"<20230504170808.1829411-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-04T17:08:08","name":"RISC-V: Add bext pattern for ZBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504170808.1829411-1-rzinsly@ventanamicro.com/mbox/"},{"id":90154,"url":"https://patchwork.plctlab.org/api/1.2/patches/90154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504171421.1829763-1-rzinsly@ventanamicro.com/","msgid":"<20230504171421.1829763-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-04T17:14:21","name":"RISC-V: Fix CTZ unnecessary sign extension [PR #106888]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504171421.1829763-1-rzinsly@ventanamicro.com/mbox/"},{"id":90174,"url":"https://patchwork.plctlab.org/api/1.2/patches/90174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z0XjZOUsiYW4XuyRiYAssu3gTZ3MABResbC=bjjfAbjQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T18:29:17","name":"i386: Tighten ashift to lea splitter operand predicates [PR109733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z0XjZOUsiYW4XuyRiYAssu3gTZ3MABResbC=bjjfAbjQ@mail.gmail.com/mbox/"},{"id":90218,"url":"https://patchwork.plctlab.org/api/1.2/patches/90218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3381264-616a-6c76-3357-7dec1f60696d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T19:29:34","name":"libffi: fix handling of homogeneous float128 structs [PR109447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3381264-616a-6c76-3357-7dec1f60696d@linux.ibm.com/mbox/"},{"id":90255,"url":"https://patchwork.plctlab.org/api/1.2/patches/90255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504215638.988177-1-apinski@marvell.com/","msgid":"<20230504215638.988177-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-04T21:56:38","name":"PHIOPT: Fix diamond case of match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504215638.988177-1-apinski@marvell.com/mbox/"},{"id":90263,"url":"https://patchwork.plctlab.org/api/1.2/patches/90263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504234042.992763-1-apinski@marvell.com/","msgid":"<20230504234042.992763-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-04T23:40:42","name":"MATCH: Add ABSU == 0 to a == 0 simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504234042.992763-1-apinski@marvell.com/mbox/"},{"id":90269,"url":"https://patchwork.plctlab.org/api/1.2/patches/90269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505010707.2687333-1-jason@redhat.com/","msgid":"<20230505010707.2687333-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-05T01:07:07","name":"[pushed] Revert \"c++: restore instantiate_decl assert\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505010707.2687333-1-jason@redhat.com/mbox/"},{"id":90292,"url":"https://patchwork.plctlab.org/api/1.2/patches/90292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505052120.1074528-1-juzhe.zhong@rivai.ai/","msgid":"<20230505052120.1074528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T05:21:20","name":"RISC-V: Fix PR109615","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505052120.1074528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90307,"url":"https://patchwork.plctlab.org/api/1.2/patches/90307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505063344.1085156-1-juzhe.zhong@rivai.ai/","msgid":"<20230505063344.1085156-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T06:33:44","name":"[V2] RISC-V: Fix PR109615","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505063344.1085156-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90323,"url":"https://patchwork.plctlab.org/api/1.2/patches/90323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS2L6002wKiQuaB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T07:54:23","name":"[committed] builtins: Fix comment typo mpft_t -> mpfr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS2L6002wKiQuaB@tucnak/mbox/"},{"id":90327,"url":"https://patchwork.plctlab.org/api/1.2/patches/90327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS3q06pEH5J3ZRI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T08:00:43","name":"gimple-range-op: Improve handling of sqrt ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS3q06pEH5J3ZRI@tucnak/mbox/"},{"id":90349,"url":"https://patchwork.plctlab.org/api/1.2/patches/90349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-1-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:08","name":"[01/23] arm: [MVE intrinsics] add binary_round_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-1-christophe.lyon@arm.com/mbox/"},{"id":90348,"url":"https://patchwork.plctlab.org/api/1.2/patches/90348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-2-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:09","name":"[02/23] arm: [MVE intrinsics] factorize vqrshlq vrshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-2-christophe.lyon@arm.com/mbox/"},{"id":90360,"url":"https://patchwork.plctlab.org/api/1.2/patches/90360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-3-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:10","name":"[03/23] arm: [MVE intrinsics] rework vrshlq vqrshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-3-christophe.lyon@arm.com/mbox/"},{"id":90351,"url":"https://patchwork.plctlab.org/api/1.2/patches/90351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-4-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:11","name":"[04/23] arm: [MVE intrinsics] factorize vqshlq vshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-4-christophe.lyon@arm.com/mbox/"},{"id":90356,"url":"https://patchwork.plctlab.org/api/1.2/patches/90356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-5-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:12","name":"[05/23] arm: [MVE intrinsics] rework vqrdmulhq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-5-christophe.lyon@arm.com/mbox/"},{"id":90347,"url":"https://patchwork.plctlab.org/api/1.2/patches/90347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-6-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:13","name":"[06/23] arm: [MVE intrinsics] factorize vabdq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-6-christophe.lyon@arm.com/mbox/"},{"id":90355,"url":"https://patchwork.plctlab.org/api/1.2/patches/90355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-7-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:14","name":"[07/23] arm: [MVE intrinsics] rework vabdq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-7-christophe.lyon@arm.com/mbox/"},{"id":90354,"url":"https://patchwork.plctlab.org/api/1.2/patches/90354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-8-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:15","name":"[08/23] arm: [MVE intrinsics] add binary_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-8-christophe.lyon@arm.com/mbox/"},{"id":90353,"url":"https://patchwork.plctlab.org/api/1.2/patches/90353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-9-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:16","name":"[09/23] arm: [MVE intrinsics] add support for MODE_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-9-christophe.lyon@arm.com/mbox/"},{"id":90350,"url":"https://patchwork.plctlab.org/api/1.2/patches/90350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-10-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:17","name":"[10/23] arm: [MVE intrinsics] add binary_lshift_r shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-10-christophe.lyon@arm.com/mbox/"},{"id":90352,"url":"https://patchwork.plctlab.org/api/1.2/patches/90352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-11-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:18","name":"[11/23] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-11-christophe.lyon@arm.com/mbox/"},{"id":90368,"url":"https://patchwork.plctlab.org/api/1.2/patches/90368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-12-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:19","name":"[12/23] arm: [MVE intrinsics] rework vqshlq vshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-12-christophe.lyon@arm.com/mbox/"},{"id":90361,"url":"https://patchwork.plctlab.org/api/1.2/patches/90361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-13-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:20","name":"[13/23] arm: [MVE intrinsics] factorize vmaxq vminq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-13-christophe.lyon@arm.com/mbox/"},{"id":90365,"url":"https://patchwork.plctlab.org/api/1.2/patches/90365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-14-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:21","name":"[14/23] arm: [MVE intrinsics] rework vmaxq vminq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-14-christophe.lyon@arm.com/mbox/"},{"id":90364,"url":"https://patchwork.plctlab.org/api/1.2/patches/90364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-15-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:22","name":"[15/23] arm: [MVE intrinsics] add binary_rshift_narrow shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-15-christophe.lyon@arm.com/mbox/"},{"id":90366,"url":"https://patchwork.plctlab.org/api/1.2/patches/90366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-16-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:23","name":"[16/23] arm: [MVE intrinsics] factorize vshrntq vshrnbq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-16-christophe.lyon@arm.com/mbox/"},{"id":90367,"url":"https://patchwork.plctlab.org/api/1.2/patches/90367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-17-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:24","name":"[17/23] arm: [MVE intrinsics] rework vshrnbq vshrntq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-17-christophe.lyon@arm.com/mbox/"},{"id":90358,"url":"https://patchwork.plctlab.org/api/1.2/patches/90358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-18-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:25","name":"[18/23] arm: [MVE intrinsics] add binary_rshift_narrow_unsigned shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-18-christophe.lyon@arm.com/mbox/"},{"id":90362,"url":"https://patchwork.plctlab.org/api/1.2/patches/90362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-19-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:26","name":"[19/23] arm: [MVE intrinsics] factorize vqrshrunb vqrshrunt vqshrunb vqshrunt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-19-christophe.lyon@arm.com/mbox/"},{"id":90363,"url":"https://patchwork.plctlab.org/api/1.2/patches/90363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-20-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:27","name":"[20/23] arm: [MVE intrinsics] rework vqrshrunbq vqrshruntq vqshrunbq vqshruntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-20-christophe.lyon@arm.com/mbox/"},{"id":90357,"url":"https://patchwork.plctlab.org/api/1.2/patches/90357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-21-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:28","name":"[21/23] arm: [MVE intrinsics] add binary_rshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-21-christophe.lyon@arm.com/mbox/"},{"id":90359,"url":"https://patchwork.plctlab.org/api/1.2/patches/90359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-22-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:29","name":"[22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-22-christophe.lyon@arm.com/mbox/"},{"id":90369,"url":"https://patchwork.plctlab.org/api/1.2/patches/90369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-23-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:30","name":"[23/23] arm: [MVE intrinsics] rework vshrq vrshrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-23-christophe.lyon@arm.com/mbox/"},{"id":90370,"url":"https://patchwork.plctlab.org/api/1.2/patches/90370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6srb1iq.fsf@euler.schwinge.homeip.net/","msgid":"<87h6srb1iq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-05T08:55:41","name":"Support parallel testing in libgomp, part I [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6srb1iq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":90372,"url":"https://patchwork.plctlab.org/api/1.2/patches/90372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ednvb1cc.fsf@euler.schwinge.homeip.net/","msgid":"<87ednvb1cc.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-05T08:59:31","name":"Support parallel testing in libgomp, part II [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ednvb1cc.fsf@euler.schwinge.homeip.net/mbox/"},{"id":90373,"url":"https://patchwork.plctlab.org/api/1.2/patches/90373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFTGiRSmYjV5IqFy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:04:09","name":"tree: Fix up save_expr [PR52339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFTGiRSmYjV5IqFy@tucnak/mbox/"},{"id":90393,"url":"https://patchwork.plctlab.org/api/1.2/patches/90393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com/","msgid":"<70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:32","name":"[1/8] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90391,"url":"https://patchwork.plctlab.org/api/1.2/patches/90391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:33","name":"[2/8] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90392,"url":"https://patchwork.plctlab.org/api/1.2/patches/90392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/baeeaa5f076e395b14693f83349c64079e33fab3.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:34","name":"[3/8] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/baeeaa5f076e395b14693f83349c64079e33fab3.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90394,"url":"https://patchwork.plctlab.org/api/1.2/patches/90394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:36","name":"[4/8] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90388,"url":"https://patchwork.plctlab.org/api/1.2/patches/90388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d70e3d68b11dbd58298e0d4a341de3039743f954.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:37","name":"[5/8] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d70e3d68b11dbd58298e0d4a341de3039743f954.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90389,"url":"https://patchwork.plctlab.org/api/1.2/patches/90389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cae316f7b894aca94dab3a560045bb0cf1c4da40.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:38","name":"[6/8] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cae316f7b894aca94dab3a560045bb0cf1c4da40.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90395,"url":"https://patchwork.plctlab.org/api/1.2/patches/90395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:39","name":"[7/8] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90396,"url":"https://patchwork.plctlab.org/api/1.2/patches/90396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:40","name":"[8/8] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90409,"url":"https://patchwork.plctlab.org/api/1.2/patches/90409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com/","msgid":"<22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com>","list_archive_url":null,"date":"2023-05-05T11:10:28","name":"GCN: Silence unused-variable warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com/mbox/"},{"id":90426,"url":"https://patchwork.plctlab.org/api/1.2/patches/90426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aXWfcmDeDtSG59wiXbkGqz+=-XZhdqBkPYegKue3tYSg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T12:13:57","name":"i386: Introduce mulv2si3 instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aXWfcmDeDtSG59wiXbkGqz+=-XZhdqBkPYegKue3tYSg@mail.gmail.com/mbox/"},{"id":90428,"url":"https://patchwork.plctlab.org/api/1.2/patches/90428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505121843.AAF6813513@imap2.suse-dmz.suse.de/","msgid":"<20230505121843.AAF6813513@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-05T12:18:43","name":"tree-optimization/109735 - conversion for vectorized pointer-diff","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505121843.AAF6813513@imap2.suse-dmz.suse.de/mbox/"},{"id":90438,"url":"https://patchwork.plctlab.org/api/1.2/patches/90438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a_eva9FnxD1y4Qp6HnQ3DMr+MKkCnQaKBrXJw4D+=_Hw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T13:16:03","name":"i386: Rename index_register_operand predicate to register_no_SP_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a_eva9FnxD1y4Qp6HnQ3DMr+MKkCnQaKBrXJw4D+=_Hw@mail.gmail.com/mbox/"},{"id":90446,"url":"https://patchwork.plctlab.org/api/1.2/patches/90446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505135153.1308864-1-juzhe.zhong@rivai.ai/","msgid":"<20230505135153.1308864-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T13:51:53","name":"RISC-V: Fix PR109748","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505135153.1308864-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90453,"url":"https://patchwork.plctlab.org/api/1.2/patches/90453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505140643.1322399-1-juzhe.zhong@rivai.ai/","msgid":"<20230505140643.1322399-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:06:43","name":"[V4] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505140643.1322399-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90455,"url":"https://patchwork.plctlab.org/api/1.2/patches/90455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505141239.1323841-1-juzhe.zhong@rivai.ai/","msgid":"<20230505141239.1323841-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:12:39","name":"[V2] RISC-V: Fix incorrect demand info merge in local vsetvli optimization [PR109748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505141239.1323841-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90469,"url":"https://patchwork.plctlab.org/api/1.2/patches/90469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505145956.1336111-1-juzhe.zhong@rivai.ai/","msgid":"<20230505145956.1336111-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:59:56","name":"[V5] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505145956.1336111-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90474,"url":"https://patchwork.plctlab.org/api/1.2/patches/90474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505151719.1031737-1-apinski@marvell.com/","msgid":"<20230505151719.1031737-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-05T15:17:19","name":"Move substitute_and_fold over to use simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505151719.1031737-1-apinski@marvell.com/mbox/"},{"id":90482,"url":"https://patchwork.plctlab.org/api/1.2/patches/90482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-2-collison@rivosinc.com/","msgid":"<20230505154607.1155567-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:45:59","name":"[v6,1/9] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-2-collison@rivosinc.com/mbox/"},{"id":90483,"url":"https://patchwork.plctlab.org/api/1.2/patches/90483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-3-collison@rivosinc.com/","msgid":"<20230505154607.1155567-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:00","name":"[v6,2/9] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-3-collison@rivosinc.com/mbox/"},{"id":90490,"url":"https://patchwork.plctlab.org/api/1.2/patches/90490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-4-collison@rivosinc.com/","msgid":"<20230505154607.1155567-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:01","name":"[v6,3/9] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-4-collison@rivosinc.com/mbox/"},{"id":90489,"url":"https://patchwork.plctlab.org/api/1.2/patches/90489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-5-collison@rivosinc.com/","msgid":"<20230505154607.1155567-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:02","name":"[v6,4/9] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-5-collison@rivosinc.com/mbox/"},{"id":90484,"url":"https://patchwork.plctlab.org/api/1.2/patches/90484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-6-collison@rivosinc.com/","msgid":"<20230505154607.1155567-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:03","name":"[v6,5/9] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-6-collison@rivosinc.com/mbox/"},{"id":90495,"url":"https://patchwork.plctlab.org/api/1.2/patches/90495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-7-collison@rivosinc.com/","msgid":"<20230505154607.1155567-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:04","name":"[v6,6/9] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-7-collison@rivosinc.com/mbox/"},{"id":90493,"url":"https://patchwork.plctlab.org/api/1.2/patches/90493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-8-collison@rivosinc.com/","msgid":"<20230505154607.1155567-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:05","name":"[v6,7/9] RISC-V: autovec: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-8-collison@rivosinc.com/mbox/"},{"id":90491,"url":"https://patchwork.plctlab.org/api/1.2/patches/90491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-9-collison@rivosinc.com/","msgid":"<20230505154607.1155567-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:06","name":"[v6,8/9] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-9-collison@rivosinc.com/mbox/"},{"id":90494,"url":"https://patchwork.plctlab.org/api/1.2/patches/90494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-10-collison@rivosinc.com/","msgid":"<20230505154607.1155567-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:07","name":"[v6,9/9] RISC-V:autovec: This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-10-collison@rivosinc.com/mbox/"},{"id":90498,"url":"https://patchwork.plctlab.org/api/1.2/patches/90498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-1-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:57","name":"[01/10] arm: [MVE intrinsics] add unary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-1-christophe.lyon@arm.com/mbox/"},{"id":90499,"url":"https://patchwork.plctlab.org/api/1.2/patches/90499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-2-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:58","name":"[02/10] arm: [MVE intrinsics] factorize several unary operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-2-christophe.lyon@arm.com/mbox/"},{"id":90502,"url":"https://patchwork.plctlab.org/api/1.2/patches/90502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-3-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:59","name":"[03/10] arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabsq, vqnegq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-3-christophe.lyon@arm.com/mbox/"},{"id":90506,"url":"https://patchwork.plctlab.org/api/1.2/patches/90506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-4-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:00","name":"[04/10] arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrndpq vrndxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-4-christophe.lyon@arm.com/mbox/"},{"id":90500,"url":"https://patchwork.plctlab.org/api/1.2/patches/90500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-5-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:01","name":"[05/10] arm: [MVE intrinsics] add binary_move_narrow and binary_move_narrow_unsigned shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-5-christophe.lyon@arm.com/mbox/"},{"id":90505,"url":"https://patchwork.plctlab.org/api/1.2/patches/90505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-6-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:02","name":"[06/10] arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-6-christophe.lyon@arm.com/mbox/"},{"id":90507,"url":"https://patchwork.plctlab.org/api/1.2/patches/90507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-7-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:03","name":"[07/10] arm: [MVE intrinsics] rework vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-7-christophe.lyon@arm.com/mbox/"},{"id":90504,"url":"https://patchwork.plctlab.org/api/1.2/patches/90504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-8-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:04","name":"[08/10] arm: [MVE intrinsics] add binary_widen_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-8-christophe.lyon@arm.com/mbox/"},{"id":90501,"url":"https://patchwork.plctlab.org/api/1.2/patches/90501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-9-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:05","name":"[09/10] arm: [MVE intrinsics] factorize vshllbq vshlltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-9-christophe.lyon@arm.com/mbox/"},{"id":90503,"url":"https://patchwork.plctlab.org/api/1.2/patches/90503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-10-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:06","name":"[10/10] arm: [MVE intrinsics] rework vshllbq vshlltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-10-christophe.lyon@arm.com/mbox/"},{"id":90508,"url":"https://patchwork.plctlab.org/api/1.2/patches/90508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8re2soib.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T16:59:24","name":"ira: Don'\''t create copies for earlyclobbered pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8re2soib.fsf@arm.com/mbox/"},{"id":90511,"url":"https://patchwork.plctlab.org/api/1.2/patches/90511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505170241.19836-1-amonakov@ispras.ru/","msgid":"<20230505170241.19836-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-05T17:02:41","name":"Makefile.in: clean up match.pd-related dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505170241.19836-1-amonakov@ispras.ru/mbox/"},{"id":90514,"url":"https://patchwork.plctlab.org/api/1.2/patches/90514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505171256.1380528-1-patrick@rivosinc.com/","msgid":"<20230505171256.1380528-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T17:12:56","name":"[RFC] RISC-V: Add proposed Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505171256.1380528-1-patrick@rivosinc.com/mbox/"},{"id":90523,"url":"https://patchwork.plctlab.org/api/1.2/patches/90523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173637.1587407-1-ppalka@redhat.com/","msgid":"<20230505173637.1587407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T17:36:37","name":"c++: list CTAD and resolve_nondeduced_context [PR106214]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173637.1587407-1-ppalka@redhat.com/mbox/"},{"id":90524,"url":"https://patchwork.plctlab.org/api/1.2/patches/90524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173648.1593931-1-ppalka@redhat.com/","msgid":"<20230505173648.1593931-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T17:36:48","name":"c++: goto entering scope of obj w/ non-trivial dtor [PR103091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173648.1593931-1-ppalka@redhat.com/mbox/"},{"id":90552,"url":"https://patchwork.plctlab.org/api/1.2/patches/90552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505182630.2133570-1-ppalka@redhat.com/","msgid":"<20230505182630.2133570-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T18:26:30","name":"c++: parenthesized -> resolving to static member [PR98283]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505182630.2133570-1-ppalka@redhat.com/mbox/"},{"id":90581,"url":"https://patchwork.plctlab.org/api/1.2/patches/90581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFVssfzGJSf16Mox@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T20:53:05","name":"gimple-range-op: Improve handling of sin/cos ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFVssfzGJSf16Mox@tucnak/mbox/"},{"id":90624,"url":"https://patchwork.plctlab.org/api/1.2/patches/90624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505231617.1D56B2043B@pchp3.se.axis.com/","msgid":"<20230505231617.1D56B2043B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-05T23:16:17","name":"[committed] CRIS: peephole2 a lsrq into a lslq+lsrq pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505231617.1D56B2043B@pchp3.se.axis.com/mbox/"},{"id":90631,"url":"https://patchwork.plctlab.org/api/1.2/patches/90631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505235950.3675720420@pchp3.se.axis.com/","msgid":"<20230505235950.3675720420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-05T23:59:50","name":"[committed] CRIS: peephole2 a move of constant followed by and of same register","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505235950.3675720420@pchp3.se.axis.com/mbox/"},{"id":90633,"url":"https://patchwork.plctlab.org/api/1.2/patches/90633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506000251.0DDBD20448@pchp3.se.axis.com/","msgid":"<20230506000251.0DDBD20448@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-06T00:02:51","name":"[committed] CRIS: peephole2 an add into two addq or subq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506000251.0DDBD20448@pchp3.se.axis.com/mbox/"},{"id":90657,"url":"https://patchwork.plctlab.org/api/1.2/patches/90657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506014942.1462251-1-juzhe.zhong@rivai.ai/","msgid":"<20230506014942.1462251-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T01:49:42","name":"ISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506014942.1462251-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90658,"url":"https://patchwork.plctlab.org/api/1.2/patches/90658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506015041.1462935-1-juzhe.zhong@rivai.ai/","msgid":"<20230506015041.1462935-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T01:50:41","name":"[V6] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506015041.1462935-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90670,"url":"https://patchwork.plctlab.org/api/1.2/patches/90670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dbf978-ac53-8f2d-4db5-b153300abad3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-06T03:41:48","name":"[fortran] PR109662 Namelist input with comma after name accepted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dbf978-ac53-8f2d-4db5-b153300abad3@gmail.com/mbox/"},{"id":90671,"url":"https://patchwork.plctlab.org/api/1.2/patches/90671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506034340.1717760-1-juzhe.zhong@rivai.ai/","msgid":"<20230506034340.1717760-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T03:43:40","name":"[V7] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506034340.1717760-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90710,"url":"https://patchwork.plctlab.org/api/1.2/patches/90710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-2-gaofei@eswincomputing.com/","msgid":"<20230506083939.22097-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-06T08:39:38","name":"[1/2,RISC-V] disable shrink-wrap-separate if zcmp enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-2-gaofei@eswincomputing.com/mbox/"},{"id":90711,"url":"https://patchwork.plctlab.org/api/1.2/patches/90711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-3-gaofei@eswincomputing.com/","msgid":"<20230506083939.22097-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-06T08:39:39","name":"[2/2,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-3-gaofei@eswincomputing.com/mbox/"},{"id":90729,"url":"https://patchwork.plctlab.org/api/1.2/patches/90729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506111449.2128575-1-juzhe.zhong@rivai.ai/","msgid":"<20230506111449.2128575-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T11:14:49","name":"RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506111449.2128575-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90734,"url":"https://patchwork.plctlab.org/api/1.2/patches/90734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115036.pvng4w6wztcimzrh@begin/","msgid":"<20230506115036.pvng4w6wztcimzrh@begin>","list_archive_url":null,"date":"2023-05-06T11:50:36","name":"hurd: Add multilib paths for gnu-x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115036.pvng4w6wztcimzrh@begin/mbox/"},{"id":90736,"url":"https://patchwork.plctlab.org/api/1.2/patches/90736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115544.y5hzmvwlgoup22ct@begin/","msgid":"<20230506115544.y5hzmvwlgoup22ct@begin>","list_archive_url":null,"date":"2023-05-06T11:55:44","name":"hurd: Ad default-pie and static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115544.y5hzmvwlgoup22ct@begin/mbox/"},{"id":90755,"url":"https://patchwork.plctlab.org/api/1.2/patches/90755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com/","msgid":"<009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T12:57:38","name":"Don'\''t call emit_clobber in lower-subreg.cc'\''s resolve_simple_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com/mbox/"},{"id":90758,"url":"https://patchwork.plctlab.org/api/1.2/patches/90758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com/","msgid":"<003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T14:00:24","name":"[x86_64] Introduce insvti_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com/mbox/"},{"id":90778,"url":"https://patchwork.plctlab.org/api/1.2/patches/90778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007301d98034$82486ea0$86d94be0$@nextmovesoftware.com/","msgid":"<007301d98034$82486ea0$86d94be0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T16:04:57","name":"nvptx: Add suppport for __builtin_nvptx_brev instrinsic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007301d98034$82486ea0$86d94be0$@nextmovesoftware.com/mbox/"},{"id":90781,"url":"https://patchwork.plctlab.org/api/1.2/patches/90781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com/","msgid":"<00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T16:39:15","name":"Add RTX codes for BITREVERSE and COPYSIGN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com/mbox/"},{"id":90783,"url":"https://patchwork.plctlab.org/api/1.2/patches/90783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab6c814593757f0c18116d11a0365a25b6487d47.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-05-06T17:05:34","name":"Pushed: [PATCH v2] LoongArch: Enable shrink wrapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab6c814593757f0c18116d11a0365a25b6487d47.camel@xry111.site/mbox/"},{"id":90785,"url":"https://patchwork.plctlab.org/api/1.2/patches/90785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com/","msgid":"<00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T17:26:11","name":"[libgcc] Add bit reversal functions __bitrev[qhsd]i2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com/mbox/"},{"id":90799,"url":"https://patchwork.plctlab.org/api/1.2/patches/90799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55ba35f-8779-68f4-5e80-ddeb52e0b0e4@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-06T19:52:56","name":"[committed] Partial revert of recent changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55ba35f-8779-68f4-5e80-ddeb52e0b0e4@gmail.com/mbox/"},{"id":90817,"url":"https://patchwork.plctlab.org/api/1.2/patches/90817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-1-apinski@marvell.com/","msgid":"<20230507044332.1122612-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:30","name":"[1/3] PHIOPT: Add diamond bb form to factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-1-apinski@marvell.com/mbox/"},{"id":90816,"url":"https://patchwork.plctlab.org/api/1.2/patches/90816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-2-apinski@marvell.com/","msgid":"<20230507044332.1122612-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:31","name":"[2/3] PHIOPT: Loop over calling factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-2-apinski@marvell.com/mbox/"},{"id":90815,"url":"https://patchwork.plctlab.org/api/1.2/patches/90815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-3-apinski@marvell.com/","msgid":"<20230507044332.1122612-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:32","name":"[3/3] PHIOPT: factor out unary operations instead of just conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-3-apinski@marvell.com/mbox/"},{"id":90819,"url":"https://patchwork.plctlab.org/api/1.2/patches/90819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507045021.1122928-1-apinski@marvell.com/","msgid":"<20230507045021.1122928-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:50:21","name":"[1/3] PHIOPT: Add diamond bb form to factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507045021.1122928-1-apinski@marvell.com/mbox/"},{"id":90824,"url":"https://patchwork.plctlab.org/api/1.2/patches/90824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507084244.61D6433E6C@hamza.pair.com/","msgid":"<20230507084244.61D6433E6C@hamza.pair.com>","list_archive_url":null,"date":"2023-05-07T08:42:42","name":"[pushed] wwwdocs: onlinedocs: Fix markup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507084244.61D6433E6C@hamza.pair.com/mbox/"},{"id":90851,"url":"https://patchwork.plctlab.org/api/1.2/patches/90851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507152600.1150387-1-apinski@marvell.com/","msgid":"<20230507152600.1150387-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T15:26:00","name":"Fix aarch64/109762: push_options/push_options does not work sometimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507152600.1150387-1-apinski@marvell.com/mbox/"},{"id":90876,"url":"https://patchwork.plctlab.org/api/1.2/patches/90876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507201300.1161530-1-apinski@marvell.com/","msgid":"<20230507201300.1161530-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T20:13:00","name":"[GCC,13] Fix aarch64/109762: push_options/push_options does not work sometimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507201300.1161530-1-apinski@marvell.com/mbox/"},{"id":90887,"url":"https://patchwork.plctlab.org/api/1.2/patches/90887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507221959.1166993-1-apinski@marvell.com/","msgid":"<20230507221959.1166993-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T22:19:59","name":"MATCH: Move `a <= CST1 ? MAX : a` optimization to match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507221959.1166993-1-apinski@marvell.com/mbox/"},{"id":90914,"url":"https://patchwork.plctlab.org/api/1.2/patches/90914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508015900.3988239-1-hongtao.liu@intel.com/","msgid":"<20230508015900.3988239-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-08T01:59:00","name":"[V2,vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508015900.3988239-1-hongtao.liu@intel.com/mbox/"},{"id":90929,"url":"https://patchwork.plctlab.org/api/1.2/patches/90929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508034143.2606769-1-juzhe.zhong@rivai.ai/","msgid":"<20230508034143.2606769-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T03:41:43","name":"RISC-V: Fix ugly && incorrect codes of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508034143.2606769-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90936,"url":"https://patchwork.plctlab.org/api/1.2/patches/90936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508052625.1185434-1-apinski@marvell.com/","msgid":"<20230508052625.1185434-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-08T05:26:25","name":"Add a != MIN/MAX_VALUE_CST ? CST-+1 : a to minmax_from_comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508052625.1185434-1-apinski@marvell.com/mbox/"},{"id":91031,"url":"https://patchwork.plctlab.org/api/1.2/patches/91031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508085428.4074457-1-pan2.li@intel.com/","msgid":"<20230508085428.4074457-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-08T08:54:28","name":"RISC-V: Update RVV integer compare simplification comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508085428.4074457-1-pan2.li@intel.com/mbox/"},{"id":91038,"url":"https://patchwork.plctlab.org/api/1.2/patches/91038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508094442.1413139-1-lipeng.zhu@intel.com/","msgid":"<20230508094442.1413139-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-05-08T09:44:43","name":"[v4] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508094442.1413139-1-lipeng.zhu@intel.com/mbox/"},{"id":91153,"url":"https://patchwork.plctlab.org/api/1.2/patches/91153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp/","msgid":"<91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-08T13:38:51","name":"xtensa: Make full transition to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp/mbox/"},{"id":91165,"url":"https://patchwork.plctlab.org/api/1.2/patches/91165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5yeapdt.fsf@euler.schwinge.homeip.net/","msgid":"<87a5yeapdt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-08T14:06:54","name":"libgm2: Remove '\''autogen.sh'\'' (was: libgm2: Adjust '\''autogen.sh'\'' to '\''ACLOCAL_AMFLAGS'\'', and simplify)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5yeapdt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91167,"url":"https://patchwork.plctlab.org/api/1.2/patches/91167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141122.127023-1-rzinsly@ventanamicro.com/","msgid":"<20230508141122.127023-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-08T14:11:22","name":"[v2] RISC-V: Add bext pattern for ZBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141122.127023-1-rzinsly@ventanamicro.com/mbox/"},{"id":91168,"url":"https://patchwork.plctlab.org/api/1.2/patches/91168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141256.127110-1-rzinsly@ventanamicro.com/","msgid":"<20230508141256.127110-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-08T14:12:56","name":"[v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141256.127110-1-rzinsly@ventanamicro.com/mbox/"},{"id":91176,"url":"https://patchwork.plctlab.org/api/1.2/patches/91176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6ba6cf3-00a5-6ba4-9796-5154cdbfcf15@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-08T14:30:52","name":"[committed] Fix minor length computation on stormy16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6ba6cf3-00a5-6ba4-9796-5154cdbfcf15@gmail.com/mbox/"},{"id":91185,"url":"https://patchwork.plctlab.org/api/1.2/patches/91185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143816.45084-1-kito.cheng@sifive.com/","msgid":"<20230508143816.45084-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-08T14:38:16","name":"[committed] RISC-V: Factor out vector manager code in vsetvli insertion pass. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143816.45084-1-kito.cheng@sifive.com/mbox/"},{"id":91186,"url":"https://patchwork.plctlab.org/api/1.2/patches/91186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143829.45127-1-kito.cheng@sifive.com/","msgid":"<20230508143829.45127-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-08T14:38:29","name":"[committed] RISC-V: Improve portability of testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143829.45127-1-kito.cheng@sifive.com/mbox/"},{"id":91187,"url":"https://patchwork.plctlab.org/api/1.2/patches/91187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508144016.649694-1-juzhe.zhong@rivai.ai/","msgid":"<20230508144016.649694-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T14:40:16","name":"[V2] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508144016.649694-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91189,"url":"https://patchwork.plctlab.org/api/1.2/patches/91189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp/","msgid":"<42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-08T14:44:00","name":"[v2] xtensa: Make full transition to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp/mbox/"},{"id":91219,"url":"https://patchwork.plctlab.org/api/1.2/patches/91219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508180408.1218395-1-apinski@marvell.com/","msgid":"<20230508180408.1218395-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-08T18:04:08","name":"[COMMITTED] Fix pr81192.c for int16 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508180408.1218395-1-apinski@marvell.com/mbox/"},{"id":91222,"url":"https://patchwork.plctlab.org/api/1.2/patches/91222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-2-amonakov@ispras.ru/","msgid":"<20230508181311.25961-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:09","name":"[1/3] genmatch: clean up emit_func","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-2-amonakov@ispras.ru/mbox/"},{"id":91221,"url":"https://patchwork.plctlab.org/api/1.2/patches/91221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-3-amonakov@ispras.ru/","msgid":"<20230508181311.25961-3-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:10","name":"[2/3] genmatch: clean up showUsage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-3-amonakov@ispras.ru/mbox/"},{"id":91220,"url":"https://patchwork.plctlab.org/api/1.2/patches/91220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-4-amonakov@ispras.ru/","msgid":"<20230508181311.25961-4-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:11","name":"[3/3] genmatch: fixup get_out_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-4-amonakov@ispras.ru/mbox/"},{"id":91311,"url":"https://patchwork.plctlab.org/api/1.2/patches/91311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB34793E5E1EA2C050CB45B2A691719@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-08T22:26:58","name":"[PUSHED] Fix cfg maintenance after inlining in AutoFDO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB34793E5E1EA2C050CB45B2A691719@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":91314,"url":"https://patchwork.plctlab.org/api/1.2/patches/91314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508231726.801047-1-juzhe.zhong@rivai.ai/","msgid":"<20230508231726.801047-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T23:17:26","name":"[V3] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508231726.801047-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91346,"url":"https://patchwork.plctlab.org/api/1.2/patches/91346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509021934.958640-1-juzhe.zhong@rivai.ai/","msgid":"<20230509021934.958640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T02:19:34","name":"RISC-V: Fix dead loop for user vsetvli intrinsic avl checking [PR109773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509021934.958640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91352,"url":"https://patchwork.plctlab.org/api/1.2/patches/91352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509023844.1433589-1-lipeng.zhu@intel.com/","msgid":"<20230509023844.1433589-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-05-09T02:38:45","name":"[v5] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509023844.1433589-1-lipeng.zhu@intel.com/mbox/"},{"id":91387,"url":"https://patchwork.plctlab.org/api/1.2/patches/91387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at/","msgid":"<6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-09T06:46:24","name":"[committed,gcc,12] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at/mbox/"},{"id":91388,"url":"https://patchwork.plctlab.org/api/1.2/patches/91388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-2-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:26","name":"[1/6] aarch64: Fix move-after-intrinsic function-body tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-2-richard.sandiford@arm.com/mbox/"},{"id":91390,"url":"https://patchwork.plctlab.org/api/1.2/patches/91390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-3-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:27","name":"[2/6] aarch64: Allow moves after tied-register intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-3-richard.sandiford@arm.com/mbox/"},{"id":91389,"url":"https://patchwork.plctlab.org/api/1.2/patches/91389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-4-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:28","name":"[3/6] aarch64: Relax ordering requirements in SVE dup tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-4-richard.sandiford@arm.com/mbox/"},{"id":91391,"url":"https://patchwork.plctlab.org/api/1.2/patches/91391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-5-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:29","name":"[4/6] aarch64: Relax predicate register matches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-5-richard.sandiford@arm.com/mbox/"},{"id":91392,"url":"https://patchwork.plctlab.org/api/1.2/patches/91392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-6-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:30","name":"[5/6] aarch64: Relax FP/vector register matches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-6-richard.sandiford@arm.com/mbox/"},{"id":91393,"url":"https://patchwork.plctlab.org/api/1.2/patches/91393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-7-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:31","name":"[6/6] aarch64: Avoid hard-coding specific register allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-7-richard.sandiford@arm.com/mbox/"},{"id":91396,"url":"https://patchwork.plctlab.org/api/1.2/patches/91396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509070604.3466556-1-hongtao.liu@intel.com/","msgid":"<20230509070604.3466556-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-09T07:06:04","name":"Detect bswap + rotate for byte permutation in pass_bswap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509070604.3466556-1-hongtao.liu@intel.com/mbox/"},{"id":91448,"url":"https://patchwork.plctlab.org/api/1.2/patches/91448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoAggM58+P5CFlE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:12:51","name":"c++: Reject attributes without arguments used as pack expansion [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoAggM58+P5CFlE@tucnak/mbox/"},{"id":91449,"url":"https://patchwork.plctlab.org/api/1.2/patches/91449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoCsXiB7fN8rsW5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:22:09","name":"c++: Reject pack expansion of assume attribute [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoCsXiB7fN8rsW5@tucnak/mbox/"},{"id":91455,"url":"https://patchwork.plctlab.org/api/1.2/patches/91455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoJP41qHvSIaWhw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:50:07","name":"tree-ssa-ccp, wide-int: Fix up handling of [LR]ROTATE_EXPR in bitwise ccp [PR109778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoJP41qHvSIaWhw@tucnak/mbox/"},{"id":91460,"url":"https://patchwork.plctlab.org/api/1.2/patches/91460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509085835.1143661-1-ardb@kernel.org/","msgid":"<20230509085835.1143661-1-ardb@kernel.org>","list_archive_url":null,"date":"2023-05-09T08:58:35","name":"i386: Honour -mdirect-extern-access when calling __fentry__","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509085835.1143661-1-ardb@kernel.org/mbox/"},{"id":91461,"url":"https://patchwork.plctlab.org/api/1.2/patches/91461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lehxswug.fsf@euler.schwinge.homeip.net/","msgid":"<87lehxswug.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T09:00:39","name":"Testsuite: Add missing '\''torture-init'\''/'\''torture-finish'\'' around '\''LTO_TORTURE_OPTIONS'\'' usage (was: Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''torture-init'\'' the '\''LTO_TORTURE_OPTIONS'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lehxswug.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91469,"url":"https://patchwork.plctlab.org/api/1.2/patches/91469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509092820.658568-1-juzhe.zhong@rivai.ai/","msgid":"<20230509092820.658568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T09:28:20","name":"RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509092820.658568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91495,"url":"https://patchwork.plctlab.org/api/1.2/patches/91495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoesHMLC1fRG9qd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T10:21:36","name":"[committed] testsuite: Add further testcase for already fixed PR [PR109778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoesHMLC1fRG9qd@tucnak/mbox/"},{"id":91498,"url":"https://patchwork.plctlab.org/api/1.2/patches/91498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFok4JIOAFvJjh4v@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T10:48:00","name":"[committed] mux-utils.h: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFok4JIOAFvJjh4v@tucnak/mbox/"},{"id":91552,"url":"https://patchwork.plctlab.org/api/1.2/patches/91552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509120550.4093888-1-juzhe.zhong@rivai.ai/","msgid":"<20230509120550.4093888-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T12:05:50","name":"[V2] RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509120550.4093888-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91555,"url":"https://patchwork.plctlab.org/api/1.2/patches/91555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFo3b8RDN8nseojl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T12:07:11","name":"[RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFo3b8RDN8nseojl@arm.com/mbox/"},{"id":91558,"url":"https://patchwork.plctlab.org/api/1.2/patches/91558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-1-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:22","name":"[01/16] arm: [MVE intrinsics] add binary_maxvminv shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-1-christophe.lyon@arm.com/mbox/"},{"id":91572,"url":"https://patchwork.plctlab.org/api/1.2/patches/91572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-2-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:23","name":"[02/16] arm: [MVE intrinsics] add binary_maxavminav shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-2-christophe.lyon@arm.com/mbox/"},{"id":91557,"url":"https://patchwork.plctlab.org/api/1.2/patches/91557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-3-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:24","name":"[03/16] arm: [MVE intrinsics add unspec_mve_function_exact_insn_pred_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-3-christophe.lyon@arm.com/mbox/"},{"id":91565,"url":"https://patchwork.plctlab.org/api/1.2/patches/91565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-4-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:25","name":"[04/16] arm: [MVE intrinsics] factorize vmaxvq vminvq vmaxavq vminavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-4-christophe.lyon@arm.com/mbox/"},{"id":91579,"url":"https://patchwork.plctlab.org/api/1.2/patches/91579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-5-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:26","name":"[05/16] arm: [MVE intrinsics] rework vmaxvq vminvq vmaxavq vminavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-5-christophe.lyon@arm.com/mbox/"},{"id":91559,"url":"https://patchwork.plctlab.org/api/1.2/patches/91559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-6-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:27","name":"[06/16] arm: add smax/smin expanders for v*hf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-6-christophe.lyon@arm.com/mbox/"},{"id":91576,"url":"https://patchwork.plctlab.org/api/1.2/patches/91576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-7-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:28","name":"[07/16] arm: [MVE intrinsics] factorize vmaxnmq vminnmq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-7-christophe.lyon@arm.com/mbox/"},{"id":91568,"url":"https://patchwork.plctlab.org/api/1.2/patches/91568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-8-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:29","name":"[08/16] arm: [MVE intrinsics] rework vmaxnmq vminnmq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-8-christophe.lyon@arm.com/mbox/"},{"id":91577,"url":"https://patchwork.plctlab.org/api/1.2/patches/91577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-9-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:30","name":"[09/16] arm: [MVE intrinsics] factorize vmaxnmavq vmaxnmvq vminnmavq vminnmvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-9-christophe.lyon@arm.com/mbox/"},{"id":91564,"url":"https://patchwork.plctlab.org/api/1.2/patches/91564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-10-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:31","name":"[10/16] arm: [MVE intrinsics] add support for mve_q_p_f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-10-christophe.lyon@arm.com/mbox/"},{"id":91571,"url":"https://patchwork.plctlab.org/api/1.2/patches/91571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-11-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:32","name":"[11/16] arm: [MVE intrinsics] rework vmaxnmavq vmaxnmvq vminnmavq vminnmvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-11-christophe.lyon@arm.com/mbox/"},{"id":91560,"url":"https://patchwork.plctlab.org/api/1.2/patches/91560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-12-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:33","name":"[12/16] arm: [MVE intrinsics] factorize vmaxnmaq vminnmaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-12-christophe.lyon@arm.com/mbox/"},{"id":91573,"url":"https://patchwork.plctlab.org/api/1.2/patches/91573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-13-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:34","name":"[13/16] arm: [MVE intrinsics] rework vmaxnmaq vminnmaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-13-christophe.lyon@arm.com/mbox/"},{"id":91574,"url":"https://patchwork.plctlab.org/api/1.2/patches/91574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-14-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:35","name":"[14/16] arm: [MVE intrinsics] add binary_maxamina shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-14-christophe.lyon@arm.com/mbox/"},{"id":91578,"url":"https://patchwork.plctlab.org/api/1.2/patches/91578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-15-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:36","name":"[15/16] arm: [MVE intrinsics] factorize vmaxaq vminaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-15-christophe.lyon@arm.com/mbox/"},{"id":91567,"url":"https://patchwork.plctlab.org/api/1.2/patches/91567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-16-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:37","name":"[16/16] arm: [MVE intrinsics] rework vmaxaq vminaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-16-christophe.lyon@arm.com/mbox/"},{"id":91580,"url":"https://patchwork.plctlab.org/api/1.2/patches/91580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873545bs0q.fsf@euler.schwinge.homeip.net/","msgid":"<873545bs0q.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:36:53","name":"libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873545bs0q.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91582,"url":"https://patchwork.plctlab.org/api/1.2/patches/91582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg6dadba.fsf@euler.schwinge.homeip.net/","msgid":"<87zg6dadba.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:39:53","name":"libgomp testsuite: Only use '\''blddir'\'' if set (was: libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg6dadba.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91583,"url":"https://patchwork.plctlab.org/api/1.2/patches/91583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn1had8b.fsf@euler.schwinge.homeip.net/","msgid":"<87wn1had8b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:41:40","name":"libgomp testsuite: Use '\''lang_test_file_found'\'' instead of '\''lang_test_file'\'' (was: libgomp testsuite: Only use '\''blddir'\'' if set (was: libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn1had8b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91589,"url":"https://patchwork.plctlab.org/api/1.2/patches/91589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttwlacn6.fsf@euler.schwinge.homeip.net/","msgid":"<87ttwlacn6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:54:21","name":"libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttwlacn6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91592,"url":"https://patchwork.plctlab.org/api/1.2/patches/91592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rpacdy.fsf@euler.schwinge.homeip.net/","msgid":"<87r0rpacdy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:59:53","name":"libgomp C++, Fortran testsuites: Resolve '\''lang_test_file_found'\'' first (was: libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rpacdy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91595,"url":"https://patchwork.plctlab.org/api/1.2/patches/91595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt2dac51.fsf@euler.schwinge.homeip.net/","msgid":"<87mt2dac51.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T13:05:14","name":"libgomp testsuite: Get rid of '\''lang_test_file_found'\'' (was: libgomp C++, Fortran testsuites: Resolve '\''lang_test_file_found'\'' first (was: libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt2dac51.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91598,"url":"https://patchwork.plctlab.org/api/1.2/patches/91598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9a3a573-f39a-6042-3c33-54978a96972f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T13:23:07","name":"[committed] Eliminate more comparisons on the H8 port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9a3a573-f39a-6042-3c33-54978a96972f@gmail.com/mbox/"},{"id":91636,"url":"https://patchwork.plctlab.org/api/1.2/patches/91636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+jrPoiz2m0PYSSRKDy0Rxyv9sw=3hMeK1OrpS8HdRRgg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T15:51:56","name":"[fortran] PR97122 - Spurious FINAL ... must be in the specification part of a MODULE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+jrPoiz2m0PYSSRKDy0Rxyv9sw=3hMeK1OrpS8HdRRgg@mail.gmail.com/mbox/"},{"id":91638,"url":"https://patchwork.plctlab.org/api/1.2/patches/91638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB345227948079D4E16CD24CBDF5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:00:05","name":"vect: Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB345227948079D4E16CD24CBDF5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91640,"url":"https://patchwork.plctlab.org/api/1.2/patches/91640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+_uXXzYQfHsfTjvo7USx98JB_ufDFEwN8eLm=X1xEcDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:00:46","name":"[fortran] PR103716 - [10/11/12/13/14 Regression] ICE in gimplify_expr, at gimplify.c:15964","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+_uXXzYQfHsfTjvo7USx98JB_ufDFEwN8eLm=X1xEcDQ@mail.gmail.com/mbox/"},{"id":91642,"url":"https://patchwork.plctlab.org/api/1.2/patches/91642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34527EC55B9EA0A097EC96C3F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:07:09","name":"vect: Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34527EC55B9EA0A097EC96C3F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91649,"url":"https://patchwork.plctlab.org/api/1.2/patches/91649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34526BFA97C71399317166B0F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:14:33","name":"rtl: AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34526BFA97C71399317166B0F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91656,"url":"https://patchwork.plctlab.org/api/1.2/patches/91656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163502.3746600-1-ppalka@redhat.com/","msgid":"<20230509163502.3746600-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-09T16:35:02","name":"c++: noexcept-spec from nested class confusion [PR109761]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163502.3746600-1-ppalka@redhat.com/mbox/"},{"id":91655,"url":"https://patchwork.plctlab.org/api/1.2/patches/91655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163509.3746628-1-ppalka@redhat.com/","msgid":"<20230509163509.3746628-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-09T16:35:09","name":"c++: error-recovery ICE with unstable satisfaction [PR109752]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163509.3746628-1-ppalka@redhat.com/mbox/"},{"id":91705,"url":"https://patchwork.plctlab.org/api/1.2/patches/91705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm79petb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T17:58:24","name":"[1/2] aarch64: Fix cut-&-pasto in aarch64-sve2-acle-asm.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm79petb.fsf@arm.com/mbox/"},{"id":91706,"url":"https://patchwork.plctlab.org/api/1.2/patches/91706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzxhperg.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T17:59:31","name":"[2/2] aarch64: Improve register allocation for lane instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzxhperg.fsf@arm.com/mbox/"},{"id":91711,"url":"https://patchwork.plctlab.org/api/1.2/patches/91711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509182823.726391-1-christophe.lyon@arm.com/","msgid":"<20230509182823.726391-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T18:28:23","name":"[v2,06/16] arm: add smax/smin expanders for v*hf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509182823.726391-1-christophe.lyon@arm.com/mbox/"},{"id":91724,"url":"https://patchwork.plctlab.org/api/1.2/patches/91724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFqdnW1JY7nR1bii@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T19:23:09","name":"c++, v2: Reject attributes without arguments used as pack expansion [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFqdnW1JY7nR1bii@tucnak/mbox/"},{"id":91730,"url":"https://patchwork.plctlab.org/api/1.2/patches/91730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509194158.329137-1-polacek@redhat.com/","msgid":"<20230509194158.329137-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-09T19:41:58","name":"configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509194158.329137-1-polacek@redhat.com/mbox/"},{"id":91731,"url":"https://patchwork.plctlab.org/api/1.2/patches/91731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509195345.561522-1-jwakely@redhat.com/","msgid":"<20230509195345.561522-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-09T19:53:45","name":"[committed] libstdc++: Fix pretty printers and add tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509195345.561522-1-jwakely@redhat.com/mbox/"},{"id":91784,"url":"https://patchwork.plctlab.org/api/1.2/patches/91784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510003326.8B65620423@pchp3.se.axis.com/","msgid":"<20230510003326.8B65620423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-10T00:33:26","name":"[committed] CRIS: Fix ccmode typo in cris_postdbr_cmpelim","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510003326.8B65620423@pchp3.se.axis.com/mbox/"},{"id":91787,"url":"https://patchwork.plctlab.org/api/1.2/patches/91787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB348450698DEB069F231AF92E91779@MN0PR21MB3484.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T01:38:08","name":"Fixes and workarounds for warnings during autoprofiledbootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB348450698DEB069F231AF92E91779@MN0PR21MB3484.namprd21.prod.outlook.com/mbox/"},{"id":91795,"url":"https://patchwork.plctlab.org/api/1.2/patches/91795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510021826.31920-1-xuli1@eswincomputing.com/","msgid":"<20230510021826.31920-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-05-10T02:18:26","name":"RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instructions satisfying REG_P(operand[1]) in -O0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510021826.31920-1-xuli1@eswincomputing.com/mbox/"},{"id":91834,"url":"https://patchwork.plctlab.org/api/1.2/patches/91834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040035.2972636-1-juzhe.zhong@rivai.ai/","msgid":"<20230510040035.2972636-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-10T04:00:35","name":"RISC-V: Support const series vector for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040035.2972636-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91835,"url":"https://patchwork.plctlab.org/api/1.2/patches/91835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040213.7313-1-xuli1@eswincomputing.com/","msgid":"<20230510040213.7313-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-05-10T04:02:13","name":"[V2] RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instructions satisfying REG_P(operand[1]) in -O0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040213.7313-1-xuli1@eswincomputing.com/mbox/"},{"id":91857,"url":"https://patchwork.plctlab.org/api/1.2/patches/91857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3eb53fe-b930-5162-656e-8adfdb31e797@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T04:59:19","name":"_Hashtable implementation cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3eb53fe-b930-5162-656e-8adfdb31e797@gmail.com/mbox/"},{"id":91865,"url":"https://patchwork.plctlab.org/api/1.2/patches/91865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510050748.1308816-1-apinski@marvell.com/","msgid":"<20230510050748.1308816-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-10T05:07:48","name":"[Committed] New testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510050748.1308816-1-apinski@marvell.com/mbox/"},{"id":91913,"url":"https://patchwork.plctlab.org/api/1.2/patches/91913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510071758.2098860-1-pan2.li@intel.com/","msgid":"<20230510071758.2098860-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T07:17:58","name":"Var-Tracking: Leverage pointer_mux for decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510071758.2098860-1-pan2.li@intel.com/mbox/"},{"id":91936,"url":"https://patchwork.plctlab.org/api/1.2/patches/91936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs84sjxl.fsf@euler.schwinge.homeip.net/","msgid":"<87fs84sjxl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-10T07:51:50","name":"Testsuite: Add '\''torture-init-done'\'', and use it to conditionalize implicit '\''torture-init'\'' (was: Testsuite: Add missing '\''torture-init'\''/'\''torture-finish'\'' around '\''LTO_TORTURE_OPTIONS'\'' usage (was: Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs84sjxl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91977,"url":"https://patchwork.plctlab.org/api/1.2/patches/91977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510090758.3737162-1-hongtao.liu@intel.com/","msgid":"<20230510090758.3737162-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-10T09:07:58","name":"x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510090758.3737162-1-hongtao.liu@intel.com/mbox/"},{"id":92006,"url":"https://patchwork.plctlab.org/api/1.2/patches/92006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFtow4ihR8drfg7g@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-10T09:49:55","name":"ipa-prop: Fix ipa_get_callee_param_type for calls with argument type mismatches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFtow4ihR8drfg7g@tucnak/mbox/"},{"id":92013,"url":"https://patchwork.plctlab.org/api/1.2/patches/92013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/830f90ea-6278-f757-4642-cca654edd736@in.tum.de/","msgid":"<830f90ea-6278-f757-4642-cca654edd736@in.tum.de>","list_archive_url":null,"date":"2023-05-10T10:49:46","name":"fix radix sort on 32bit platforms [PR109670]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/830f90ea-6278-f757-4642-cca654edd736@in.tum.de/mbox/"},{"id":92032,"url":"https://patchwork.plctlab.org/api/1.2/patches/92032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510112009.633444-1-jwakely@redhat.com/","msgid":"<20230510112009.633444-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-10T11:20:09","name":"[RFC] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510112009.633444-1-jwakely@redhat.com/mbox/"},{"id":92051,"url":"https://patchwork.plctlab.org/api/1.2/patches/92051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com/","msgid":"<6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com>","list_archive_url":null,"date":"2023-05-10T11:46:41","name":"[committed] Fix a couple constraints on the H8 in preparation for LRA conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com/mbox/"},{"id":92065,"url":"https://patchwork.plctlab.org/api/1.2/patches/92065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510115705.2420805-1-pan2.li@intel.com/","msgid":"<20230510115705.2420805-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T11:57:05","name":"[v2] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510115705.2420805-1-pan2.li@intel.com/mbox/"},{"id":92080,"url":"https://patchwork.plctlab.org/api/1.2/patches/92080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510130543.4026214-1-juzhe.zhong@rivai.ai/","msgid":"<20230510130543.4026214-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-10T13:05:43","name":"RISC-V: Add basic vec_init support for RVV auto-vectorizaiton","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510130543.4026214-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92085,"url":"https://patchwork.plctlab.org/api/1.2/patches/92085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-1-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:17","name":"[01/20] arm: [MVE intrinsics] factorize vcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-1-christophe.lyon@arm.com/mbox/"},{"id":92105,"url":"https://patchwork.plctlab.org/api/1.2/patches/92105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-2-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:18","name":"[02/20] arm: [MVE intrinsics] add cmp shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-2-christophe.lyon@arm.com/mbox/"},{"id":92119,"url":"https://patchwork.plctlab.org/api/1.2/patches/92119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-3-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:19","name":"[03/20] arm: [MVE intrinsics] rework vcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-3-christophe.lyon@arm.com/mbox/"},{"id":92096,"url":"https://patchwork.plctlab.org/api/1.2/patches/92096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-4-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:20","name":"[04/20] arm: [MVE intrinsics] factorize vrev16q vrev32q vrev64q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-4-christophe.lyon@arm.com/mbox/"},{"id":92118,"url":"https://patchwork.plctlab.org/api/1.2/patches/92118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-5-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:21","name":"[05/20] arm: [MVE intrinsics] rework vrev16q vrev32q vrev64q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-5-christophe.lyon@arm.com/mbox/"},{"id":92094,"url":"https://patchwork.plctlab.org/api/1.2/patches/92094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-6-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:22","name":"[06/20] arm: [MVE intrinsics] factorize vdupq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-6-christophe.lyon@arm.com/mbox/"},{"id":92101,"url":"https://patchwork.plctlab.org/api/1.2/patches/92101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-7-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:23","name":"[07/20] arm: [MVE intrinsics] add unary_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-7-christophe.lyon@arm.com/mbox/"},{"id":92110,"url":"https://patchwork.plctlab.org/api/1.2/patches/92110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-8-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:24","name":"[08/20] arm: [MVE intrinsics] rework vdupq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-8-christophe.lyon@arm.com/mbox/"},{"id":92091,"url":"https://patchwork.plctlab.org/api/1.2/patches/92091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-9-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:25","name":"[09/20] arm: [MVE intrinsics] factorize vaddvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-9-christophe.lyon@arm.com/mbox/"},{"id":92102,"url":"https://patchwork.plctlab.org/api/1.2/patches/92102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-10-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:26","name":"[10/20] arm: [MVE intrinsics] add unary_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-10-christophe.lyon@arm.com/mbox/"},{"id":92087,"url":"https://patchwork.plctlab.org/api/1.2/patches/92087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-11-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:27","name":"[11/20] arm: [MVE intrinsics] rework vaddvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-11-christophe.lyon@arm.com/mbox/"},{"id":92116,"url":"https://patchwork.plctlab.org/api/1.2/patches/92116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-12-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:28","name":"[12/20] arm: [MVE intrinsics] factorize vaddvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-12-christophe.lyon@arm.com/mbox/"},{"id":92113,"url":"https://patchwork.plctlab.org/api/1.2/patches/92113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-13-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:29","name":"[13/20] arm: [MVE intrinsics] add unary_int32_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-13-christophe.lyon@arm.com/mbox/"},{"id":92103,"url":"https://patchwork.plctlab.org/api/1.2/patches/92103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-14-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:30","name":"[14/20] arm: [MVE intrinsics] rework vaddvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-14-christophe.lyon@arm.com/mbox/"},{"id":92099,"url":"https://patchwork.plctlab.org/api/1.2/patches/92099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-15-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:31","name":"[15/20] arm: [MVE intrinsics] add unary_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-15-christophe.lyon@arm.com/mbox/"},{"id":92104,"url":"https://patchwork.plctlab.org/api/1.2/patches/92104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-16-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:32","name":"[16/20] arm: [MVE intrinsics] factorize vaddlvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-16-christophe.lyon@arm.com/mbox/"},{"id":92108,"url":"https://patchwork.plctlab.org/api/1.2/patches/92108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-17-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:33","name":"[17/20] arm: [MVE intrinsics] rework vaddlvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-17-christophe.lyon@arm.com/mbox/"},{"id":92107,"url":"https://patchwork.plctlab.org/api/1.2/patches/92107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-18-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:34","name":"[18/20] arm: [MVE intrinsics] factorize vmovlbq vmovltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-18-christophe.lyon@arm.com/mbox/"},{"id":92106,"url":"https://patchwork.plctlab.org/api/1.2/patches/92106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-19-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:35","name":"[19/20] arm: [MVE intrinsics] add unary_widen shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-19-christophe.lyon@arm.com/mbox/"},{"id":92098,"url":"https://patchwork.plctlab.org/api/1.2/patches/92098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-20-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:36","name":"[20/20] arm: [MVE intrinsics] rework vmovlbq vmovltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-20-christophe.lyon@arm.com/mbox/"},{"id":92120,"url":"https://patchwork.plctlab.org/api/1.2/patches/92120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510134600.D4AE13851C12@sourceware.org/","msgid":"<20230510134600.D4AE13851C12@sourceware.org>","list_archive_url":null,"date":"2023-05-10T13:43:34","name":"Avoid g++.dg/torture/pr106922.C FAIL with the pre-C++11 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510134600.D4AE13851C12@sourceware.org/mbox/"},{"id":92163,"url":"https://patchwork.plctlab.org/api/1.2/patches/92163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com/","msgid":"<000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T14:46:10","name":"[take,#3] match.pd: Simplify popcount/parity of bswap/rotate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com/mbox/"},{"id":92170,"url":"https://patchwork.plctlab.org/api/1.2/patches/92170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-1-jason@redhat.com/","msgid":"<20230510150441.850396-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:04:40","name":"[pushed,1/2] c++: always check consteval address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-1-jason@redhat.com/mbox/"},{"id":92171,"url":"https://patchwork.plctlab.org/api/1.2/patches/92171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-2-jason@redhat.com/","msgid":"<20230510150441.850396-2-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:04:41","name":"[pushed,2/2] c++: be stricter about constinit [CWG2543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-2-jason@redhat.com/mbox/"},{"id":92175,"url":"https://patchwork.plctlab.org/api/1.2/patches/92175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510152356.2623391-1-pan2.li@intel.com/","msgid":"<20230510152356.2623391-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T15:23:56","name":"[v3] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510152356.2623391-1-pan2.li@intel.com/mbox/"},{"id":92176,"url":"https://patchwork.plctlab.org/api/1.2/patches/92176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com/","msgid":"<0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com>","list_archive_url":null,"date":"2023-05-10T15:24:30","name":"riscv: Add vectorized binops and insn_expander helpers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com/mbox/"},{"id":92179,"url":"https://patchwork.plctlab.org/api/1.2/patches/92179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfb0414-4cc5-e613-5115-99f02970c058@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:24:40","name":"riscv: Clarify vlmax and length handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfb0414-4cc5-e613-5115-99f02970c058@gmail.com/mbox/"},{"id":92177,"url":"https://patchwork.plctlab.org/api/1.2/patches/92177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com/","msgid":"<75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com>","list_archive_url":null,"date":"2023-05-10T15:24:50","name":"riscv: Split off shift patterns for autovectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com/mbox/"},{"id":92178,"url":"https://patchwork.plctlab.org/api/1.2/patches/92178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbec9930-ad79-6d20-1d1d-c9457331fafb@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:24:57","name":"riscv: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbec9930-ad79-6d20-1d1d-c9457331fafb@gmail.com/mbox/"},{"id":92181,"url":"https://patchwork.plctlab.org/api/1.2/patches/92181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510153604.311723-1-ppalka@redhat.com/","msgid":"<20230510153604.311723-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:36:04","name":"c++: converted lambda as template argument [PR83258, ...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510153604.311723-1-ppalka@redhat.com/mbox/"},{"id":92183,"url":"https://patchwork.plctlab.org/api/1.2/patches/92183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFu60EPEOJTV/GA1@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:40:00","name":"[V5,2/2] PR target/105325: Fix memory constraints for power10 fusion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFu60EPEOJTV/GA1@toto.the-meissners.org/mbox/"},{"id":92190,"url":"https://patchwork.plctlab.org/api/1.2/patches/92190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMnH0NAvR-5Zqo9W76C1LPnfDroEk_O+D8HPqwuW1xPBA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:50:37","name":"RISC-V: Remove masking third operand of rotate instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMnH0NAvR-5Zqo9W76C1LPnfDroEk_O+D8HPqwuW1xPBA@mail.gmail.com/mbox/"},{"id":92200,"url":"https://patchwork.plctlab.org/api/1.2/patches/92200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510161009.2653550-1-pan2.li@intel.com/","msgid":"<20230510161009.2653550-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T16:10:09","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510161009.2653550-1-pan2.li@intel.com/mbox/"},{"id":92212,"url":"https://patchwork.plctlab.org/api/1.2/patches/92212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164719.155783-1-rep.dot.nop@gmail.com/","msgid":"<20230510164719.155783-1-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:47:19","name":"[v2] Fortran: Narrow return types [PR78798]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164719.155783-1-rep.dot.nop@gmail.com/mbox/"},{"id":92213,"url":"https://patchwork.plctlab.org/api/1.2/patches/92213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-1-rep.dot.nop@gmail.com/","msgid":"<20230510164841.155816-1-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:48:40","name":"[1/2] Fortran: dump-parse-tree attribs: fix unbalanced braces [PR109624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-1-rep.dot.nop@gmail.com/mbox/"},{"id":92214,"url":"https://patchwork.plctlab.org/api/1.2/patches/92214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-2-rep.dot.nop@gmail.com/","msgid":"<20230510164841.155816-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:48:41","name":"[2/2] Fortran: dump-parse-tree: Mark debug functions with DEBUG_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-2-rep.dot.nop@gmail.com/mbox/"},{"id":92252,"url":"https://patchwork.plctlab.org/api/1.2/patches/92252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510180006.1340377-1-apinski@marvell.com/","msgid":"<20230510180006.1340377-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-10T18:00:06","name":"Add another new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510180006.1340377-1-apinski@marvell.com/mbox/"},{"id":92253,"url":"https://patchwork.plctlab.org/api/1.2/patches/92253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db7ba137fbb7b94404c2131ea8e93565803081d7.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T18:06:22","name":"rs6000: Fix __builtin_vec_xst_trunc definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db7ba137fbb7b94404c2131ea8e93565803081d7.camel@us.ibm.com/mbox/"},{"id":92278,"url":"https://patchwork.plctlab.org/api/1.2/patches/92278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000001d98374$7971dad0$6c559070$@nextmovesoftware.com/","msgid":"<000001d98374$7971dad0$6c559070$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T19:20:23","name":"[x86_64] Use [(const_int 0)] idiom consistently in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000001d98374$7971dad0$6c559070$@nextmovesoftware.com/mbox/"},{"id":92291,"url":"https://patchwork.plctlab.org/api/1.2/patches/92291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aV=ooqGYrVayfHtRT-0nPgqSP09CD0qLMz74hxuS2y2w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T20:45:01","name":"i386: Add missing vector extend patterns [PR92658]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aV=ooqGYrVayfHtRT-0nPgqSP09CD0qLMz74hxuS2y2w@mail.gmail.com/mbox/"},{"id":92294,"url":"https://patchwork.plctlab.org/api/1.2/patches/92294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510210731.975161-1-jason@redhat.com/","msgid":"<20230510210731.975161-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T21:07:31","name":"[pushed] c++: adjust conversion diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510210731.975161-1-jason@redhat.com/mbox/"},{"id":92305,"url":"https://patchwork.plctlab.org/api/1.2/patches/92305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFwMeKCu4OnsPPaE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T21:28:24","name":"[v2] c++: wrong std::is_convertible with cv-qual fn [PR109680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFwMeKCu4OnsPPaE@redhat.com/mbox/"},{"id":92307,"url":"https://patchwork.plctlab.org/api/1.2/patches/92307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com/","msgid":"<02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T21:53:49","name":"match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount(X)+popcount(Y)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com/mbox/"},{"id":92346,"url":"https://patchwork.plctlab.org/api/1.2/patches/92346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511022818.3211659-1-pan2.li@intel.com/","msgid":"<20230511022818.3211659-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T02:28:18","name":"[v4] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511022818.3211659-1-pan2.li@intel.com/mbox/"},{"id":92348,"url":"https://patchwork.plctlab.org/api/1.2/patches/92348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031354.282014-1-juzhe.zhong@rivai.ai/","msgid":"<20230511031354.282014-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T03:13:54","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031354.282014-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92349,"url":"https://patchwork.plctlab.org/api/1.2/patches/92349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031447.286664-1-juzhe.zhong@rivai.ai/","msgid":"<20230511031447.286664-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T03:14:47","name":"[commited] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031447.286664-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92351,"url":"https://patchwork.plctlab.org/api/1.2/patches/92351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511033829.39575-1-kito.cheng@sifive.com/","msgid":"<20230511033829.39575-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-11T03:38:30","name":"[committed,v2] RISC-V: Support const series vector for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511033829.39575-1-kito.cheng@sifive.com/mbox/"},{"id":92355,"url":"https://patchwork.plctlab.org/api/1.2/patches/92355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511051244.1068441-1-juzhe.zhong@rivai.ai/","msgid":"<20230511051244.1068441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T05:12:44","name":"[V5] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511051244.1068441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92366,"url":"https://patchwork.plctlab.org/api/1.2/patches/92366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511062137.3451855-1-pan2.li@intel.com/","msgid":"<20230511062137.3451855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T06:21:37","name":"[v5] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511062137.3451855-1-pan2.li@intel.com/mbox/"},{"id":92433,"url":"https://patchwork.plctlab.org/api/1.2/patches/92433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada6da15-ba5e-1959-91ae-3ed9c44faf1f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T08:29:16","name":"mklog.py: Add --commit option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada6da15-ba5e-1959-91ae-3ed9c44faf1f@gmail.com/mbox/"},{"id":92445,"url":"https://patchwork.plctlab.org/api/1.2/patches/92445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511092420.1779593-1-juzhe.zhong@rivai.ai/","msgid":"<20230511092420.1779593-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T09:24:20","name":"[V2] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511092420.1779593-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92452,"url":"https://patchwork.plctlab.org/api/1.2/patches/92452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511093852.291864-1-juzhe.zhong@rivai.ai/","msgid":"<20230511093852.291864-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T09:38:52","name":"[V6] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511093852.291864-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92472,"url":"https://patchwork.plctlab.org/api/1.2/patches/92472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-1-lili.cui@intel.com/","msgid":"<20230511101201.2052667-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T10:12:00","name":"[1/2] PR gcc/98350:Add a param to control the length of the chain with FMA in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-1-lili.cui@intel.com/mbox/"},{"id":92471,"url":"https://patchwork.plctlab.org/api/1.2/patches/92471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-2-lili.cui@intel.com/","msgid":"<20230511101201.2052667-2-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T10:12:01","name":"[2/2] Add a tune option to control the length of the chain with FMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-2-lili.cui@intel.com/mbox/"},{"id":92473,"url":"https://patchwork.plctlab.org/api/1.2/patches/92473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c510c333-a863-6aa0-5a40-5177d5b45094@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T10:26:55","name":"[v2] RISC-V: Add vectorized binops and insn_expander helpers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c510c333-a863-6aa0-5a40-5177d5b45094@gmail.com/mbox/"},{"id":92474,"url":"https://patchwork.plctlab.org/api/1.2/patches/92474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com/","msgid":"<2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com>","list_archive_url":null,"date":"2023-05-11T10:27:50","name":"[v2] RISC-V: Add autovectorization tests for binary integer, operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com/mbox/"},{"id":92475,"url":"https://patchwork.plctlab.org/api/1.2/patches/92475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e21778f9-94f2-9452-f2fd-270322ab88e8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T10:29:54","name":"[v2] RISC-V: Clarify vlmax and length handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e21778f9-94f2-9452-f2fd-270322ab88e8@gmail.com/mbox/"},{"id":92476,"url":"https://patchwork.plctlab.org/api/1.2/patches/92476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com/","msgid":"<22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com>","list_archive_url":null,"date":"2023-05-11T10:33:50","name":"[v2] RISC-V: Split off shift patterns for autovectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com/mbox/"},{"id":92482,"url":"https://patchwork.plctlab.org/api/1.2/patches/92482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511110939.1994129-1-pan2.li@intel.com/","msgid":"<20230511110939.1994129-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T11:09:39","name":"[committed] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511110939.1994129-1-pan2.li@intel.com/mbox/"},{"id":92483,"url":"https://patchwork.plctlab.org/api/1.2/patches/92483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFzOQqRuXWoRXHsG@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T11:15:14","name":"arm: Fix ICE due to infinite splitting [PR109800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFzOQqRuXWoRXHsG@arm.com/mbox/"},{"id":92485,"url":"https://patchwork.plctlab.org/api/1.2/patches/92485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt2bf69o.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T11:37:39","name":"aarch64: Remove alignment assertions [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt2bf69o.fsf@arm.com/mbox/"},{"id":92488,"url":"https://patchwork.plctlab.org/api/1.2/patches/92488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511115636.964614-1-jwakely@redhat.com/","msgid":"<20230511115636.964614-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T11:56:36","name":"[committed] libstdc++: Fix std::abs(__float128) for -NaN and -0.0 [PR109758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511115636.964614-1-jwakely@redhat.com/mbox/"},{"id":92508,"url":"https://patchwork.plctlab.org/api/1.2/patches/92508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-1-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:56","name":"[01/24] arm: [MVE intrinsics] factorize vaddlvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-1-christophe.lyon@arm.com/mbox/"},{"id":92509,"url":"https://patchwork.plctlab.org/api/1.2/patches/92509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-2-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:57","name":"[02/24] arm: [MVE intrinsics] add unary_widen_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-2-christophe.lyon@arm.com/mbox/"},{"id":92515,"url":"https://patchwork.plctlab.org/api/1.2/patches/92515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-3-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:58","name":"[03/24] arm: [MVE intrinsics] rework vaddlvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-3-christophe.lyon@arm.com/mbox/"},{"id":92514,"url":"https://patchwork.plctlab.org/api/1.2/patches/92514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-4-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:59","name":"[04/24] arm: [MVE intrinsics] add binary_acc_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-4-christophe.lyon@arm.com/mbox/"},{"id":92513,"url":"https://patchwork.plctlab.org/api/1.2/patches/92513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-5-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:00","name":"[05/24] arm: [MVE intrinsics] factorize vmladav vmladavx vmlsdav vmlsdavx vmladava vmladavax vmlsdava vmlsdavax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-5-christophe.lyon@arm.com/mbox/"},{"id":92521,"url":"https://patchwork.plctlab.org/api/1.2/patches/92521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-6-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:01","name":"[06/24] arm: [MVE intrinsics] rework vmladavq vmladavxq vmlsdavq vmlsdavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-6-christophe.lyon@arm.com/mbox/"},{"id":92511,"url":"https://patchwork.plctlab.org/api/1.2/patches/92511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-7-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:02","name":"[07/24] arm: [MVE intrinsics] add binary_acca_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-7-christophe.lyon@arm.com/mbox/"},{"id":92547,"url":"https://patchwork.plctlab.org/api/1.2/patches/92547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-8-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:03","name":"[08/24] arm: [MVE intrinsics] rework vmladavaq vmladavaxq vmlsdavaq vmlsdavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-8-christophe.lyon@arm.com/mbox/"},{"id":92516,"url":"https://patchwork.plctlab.org/api/1.2/patches/92516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-9-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:04","name":"[09/24] arm: [MVE intrinsics] factorize vabavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-9-christophe.lyon@arm.com/mbox/"},{"id":92524,"url":"https://patchwork.plctlab.org/api/1.2/patches/92524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-10-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:05","name":"[10/24] arm: [MVE intrinsics] rework vabavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-10-christophe.lyon@arm.com/mbox/"},{"id":92523,"url":"https://patchwork.plctlab.org/api/1.2/patches/92523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-11-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:06","name":"[11/24] arm: [MVE intrinsics] add binary_acc_int64 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-11-christophe.lyon@arm.com/mbox/"},{"id":92512,"url":"https://patchwork.plctlab.org/api/1.2/patches/92512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-12-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:07","name":"[12/24] arm: [MVE intrinsics] factorize vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-12-christophe.lyon@arm.com/mbox/"},{"id":92518,"url":"https://patchwork.plctlab.org/api/1.2/patches/92518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-13-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:08","name":"[13/24] arm: [MVE intrinsics] rework vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-13-christophe.lyon@arm.com/mbox/"},{"id":92522,"url":"https://patchwork.plctlab.org/api/1.2/patches/92522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-14-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:09","name":"[14/24] arm: [MVE intrinsics] factorize vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-14-christophe.lyon@arm.com/mbox/"},{"id":92544,"url":"https://patchwork.plctlab.org/api/1.2/patches/92544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-15-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:10","name":"[15/24] arm: [MVE intrinsics] rework vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-15-christophe.lyon@arm.com/mbox/"},{"id":92517,"url":"https://patchwork.plctlab.org/api/1.2/patches/92517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-16-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:11","name":"[16/24] arm: [MVE intrinsics] add binary_acca_int64 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-16-christophe.lyon@arm.com/mbox/"},{"id":92542,"url":"https://patchwork.plctlab.org/api/1.2/patches/92542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-17-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:12","name":"[17/24] arm: [MVE intrinsics] factorize vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-17-christophe.lyon@arm.com/mbox/"},{"id":92538,"url":"https://patchwork.plctlab.org/api/1.2/patches/92538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-18-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:13","name":"[18/24] arm: [MVE intrinsics] rework vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-18-christophe.lyon@arm.com/mbox/"},{"id":92532,"url":"https://patchwork.plctlab.org/api/1.2/patches/92532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-19-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:14","name":"[19/24] arm: [MVE intrinsics] add ternary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-19-christophe.lyon@arm.com/mbox/"},{"id":92519,"url":"https://patchwork.plctlab.org/api/1.2/patches/92519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-20-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:15","name":"[20/24] arm: [MVE intrinsics] factorize vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-20-christophe.lyon@arm.com/mbox/"},{"id":92530,"url":"https://patchwork.plctlab.org/api/1.2/patches/92530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-21-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:16","name":"[21/24] arm: [MVE intrinsics] rework vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-21-christophe.lyon@arm.com/mbox/"},{"id":92520,"url":"https://patchwork.plctlab.org/api/1.2/patches/92520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-22-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:17","name":"[22/24] arm: [MVE intrinsics] add ternary_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-22-christophe.lyon@arm.com/mbox/"},{"id":92531,"url":"https://patchwork.plctlab.org/api/1.2/patches/92531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-23-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:18","name":"[23/24] arm: [MVE intrinsics] factorize vmlaq_n vmlasq_n vqdmlahq_n vqdmlashq_n vqrdmlahq_n vqrdmlashq_n","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-23-christophe.lyon@arm.com/mbox/"},{"id":92548,"url":"https://patchwork.plctlab.org/api/1.2/patches/92548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-24-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-24-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:19","name":"[24/24] arm: [MVE intrinsics] rework vmlaq vmlasq vqdmlahq vqdmlashq vqrdmlahq vqrdmlashq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-24-christophe.lyon@arm.com/mbox/"},{"id":92549,"url":"https://patchwork.plctlab.org/api/1.2/patches/92549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511122641.2323840-1-pan2.li@intel.com/","msgid":"<20230511122641.2323840-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T12:26:41","name":"[committed] RISC-V: Update RVV integer compare simplification comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511122641.2323840-1-pan2.li@intel.com/mbox/"},{"id":92550,"url":"https://patchwork.plctlab.org/api/1.2/patches/92550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com/","msgid":"<2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com>","list_archive_url":null,"date":"2023-05-11T12:33:09","name":"[Commited] MAINTAINERS: Fix alphabetic sorting.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com/mbox/"},{"id":92555,"url":"https://patchwork.plctlab.org/api/1.2/patches/92555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com/","msgid":"<3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com>","list_archive_url":null,"date":"2023-05-11T12:47:24","name":"[v2] RISC-V: Allow vector constants in riscv_const_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com/mbox/"},{"id":92556,"url":"https://patchwork.plctlab.org/api/1.2/patches/92556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511125404.2504388-1-pan2.li@intel.com/","msgid":"<20230511125404.2504388-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T12:54:04","name":"[v6] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511125404.2504388-1-pan2.li@intel.com/mbox/"},{"id":92642,"url":"https://patchwork.plctlab.org/api/1.2/patches/92642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com/","msgid":"<02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-11T14:21:41","name":"[x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com/mbox/"},{"id":92658,"url":"https://patchwork.plctlab.org/api/1.2/patches/92658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511144027.593130-1-ppalka@redhat.com/","msgid":"<20230511144027.593130-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-11T14:40:27","name":"[pushed] c++: Add testcase for already fixed PR [PR103807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511144027.593130-1-ppalka@redhat.com/mbox/"},{"id":92694,"url":"https://patchwork.plctlab.org/api/1.2/patches/92694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511151719.1394582-1-apinski@marvell.com/","msgid":"<20230511151719.1394582-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-11T15:17:19","name":"Improve simple_dce for phis that only used in itself","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511151719.1394582-1-apinski@marvell.com/mbox/"},{"id":92697,"url":"https://patchwork.plctlab.org/api/1.2/patches/92697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511152356.2116735-1-lili.cui@intel.com/","msgid":"<20230511152356.2116735-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T15:23:56","name":"[PATCH1/2] PR gcc/98350:Add a param to control the length of the chain with FMA in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511152356.2116735-1-lili.cui@intel.com/mbox/"},{"id":92720,"url":"https://patchwork.plctlab.org/api/1.2/patches/92720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511155317.1002581-1-jwakely@redhat.com/","msgid":"<20230511155317.1002581-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T15:53:17","name":"[wwwdocs] Document libstdc++ freestanding changes in gcc-13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511155317.1002581-1-jwakely@redhat.com/mbox/"},{"id":92722,"url":"https://patchwork.plctlab.org/api/1.2/patches/92722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511162738.1482389-1-juzhe.zhong@rivai.ai/","msgid":"<20230511162738.1482389-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T16:27:38","name":"[V5] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511162738.1482389-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92741,"url":"https://patchwork.plctlab.org/api/1.2/patches/92741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXUP=a+EtCxoPUJV_wuTsrPdhyE6QWxw0vyDmmEUsGGvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T16:54:07","name":"libgo patch committed: Add syscall.prlimit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXUP=a+EtCxoPUJV_wuTsrPdhyE6QWxw0vyDmmEUsGGvw@mail.gmail.com/mbox/"},{"id":92806,"url":"https://patchwork.plctlab.org/api/1.2/patches/92806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511182555.26183-1-palmer@rivosinc.com/","msgid":"<20230511182555.26183-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-05-11T18:25:56","name":"RISC-V: Add v_uimm_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511182555.26183-1-palmer@rivosinc.com/mbox/"},{"id":92812,"url":"https://patchwork.plctlab.org/api/1.2/patches/92812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511183006.1565721-1-ppalka@redhat.com/","msgid":"<20230511183006.1565721-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-11T18:30:06","name":"c++: '\''mutable'\'' subobject of constexpr variable [PR109745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511183006.1565721-1-ppalka@redhat.com/mbox/"},{"id":92821,"url":"https://patchwork.plctlab.org/api/1.2/patches/92821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bY-ChBDrQ0SG+KkCGpZZ_74+PFr8sTVGNWzzWKvmbMkg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T18:56:30","name":"i386: Handle V4HI and V2SImode in ix86_widen_mult_cost [PR109807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bY-ChBDrQ0SG+KkCGpZZ_74+PFr8sTVGNWzzWKvmbMkg@mail.gmail.com/mbox/"},{"id":92844,"url":"https://patchwork.plctlab.org/api/1.2/patches/92844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511201847.1056247-1-jwakely@redhat.com/","msgid":"<20230511201847.1056247-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:18:47","name":"[committed] libstdc++: Enforce value_type consistency in strings and streams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511201847.1056247-1-jwakely@redhat.com/mbox/"},{"id":92845,"url":"https://patchwork.plctlab.org/api/1.2/patches/92845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202029.1058974-1-jwakely@redhat.com/","msgid":"<20230511202029.1058974-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:20:29","name":"[committed] libstdc++: Fix chrono::hh_mm_ss::subseconds() [PR109772]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202029.1058974-1-jwakely@redhat.com/mbox/"},{"id":92846,"url":"https://patchwork.plctlab.org/api/1.2/patches/92846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202125.1059353-1-jwakely@redhat.com/","msgid":"<20230511202125.1059353-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:21:25","name":"[committed] libstdc++: Use RAII types in strtod-based std::from_chars implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202125.1059353-1-jwakely@redhat.com/mbox/"},{"id":92847,"url":"https://patchwork.plctlab.org/api/1.2/patches/92847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4n6MiTz2iV5Ef9HoupLdub65_A8MbY_1dmg+7sLKOOKCQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T20:52:22","name":"[v2] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4n6MiTz2iV5Ef9HoupLdub65_A8MbY_1dmg+7sLKOOKCQ@mail.gmail.com/mbox/"},{"id":92868,"url":"https://patchwork.plctlab.org/api/1.2/patches/92868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511222848.15044-1-palmer@rivosinc.com/","msgid":"<20230511222848.15044-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-05-11T22:28:49","name":"[v2] RISC-V: Add vector_scalar_shift_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511222848.15044-1-palmer@rivosinc.com/mbox/"},{"id":92870,"url":"https://patchwork.plctlab.org/api/1.2/patches/92870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511231126.1594132-1-juzhe.zhong@rivai.ai/","msgid":"<20230511231126.1594132-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:11:26","name":"[V6] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511231126.1594132-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92875,"url":"https://patchwork.plctlab.org/api/1.2/patches/92875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232916.1596624-1-juzhe.zhong@rivai.ai/","msgid":"<20230511232916.1596624-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:29:16","name":"RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232916.1596624-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92876,"url":"https://patchwork.plctlab.org/api/1.2/patches/92876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232933.1596663-1-juzhe.zhong@rivai.ai/","msgid":"<20230511232933.1596663-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:29:33","name":"RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232933.1596663-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92904,"url":"https://patchwork.plctlab.org/api/1.2/patches/92904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512010247.116026-1-juzhe.zhong@rivai.ai/","msgid":"<20230512010247.116026-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T01:02:47","name":"RISC-V: Reorganize binary autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512010247.116026-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92906,"url":"https://patchwork.plctlab.org/api/1.2/patches/92906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512013112.276462-1-juzhe.zhong@rivai.ai/","msgid":"<20230512013112.276462-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T01:31:12","name":"[V2] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512013112.276462-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92907,"url":"https://patchwork.plctlab.org/api/1.2/patches/92907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512014257.4187492-1-pan2.li@intel.com/","msgid":"<20230512014257.4187492-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T01:42:57","name":"[committed] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512014257.4187492-1-pan2.li@intel.com/mbox/"},{"id":92923,"url":"https://patchwork.plctlab.org/api/1.2/patches/92923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512022432.207773-1-pan2.li@intel.com/","msgid":"<20230512022432.207773-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T02:24:32","name":"[committed] RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512022432.207773-1-pan2.li@intel.com/mbox/"},{"id":92925,"url":"https://patchwork.plctlab.org/api/1.2/patches/92925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512023253.219569-1-pan2.li@intel.com/","msgid":"<20230512023253.219569-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T02:32:53","name":"[committed] RISC-V: Reorganize binary autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512023253.219569-1-pan2.li@intel.com/mbox/"},{"id":92929,"url":"https://patchwork.plctlab.org/api/1.2/patches/92929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512025645.141049-1-juzhe.zhong@rivai.ai/","msgid":"<20230512025645.141049-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T02:56:45","name":"[V3] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512025645.141049-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92933,"url":"https://patchwork.plctlab.org/api/1.2/patches/92933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512031045.199419-1-juzhe.zhong@rivai.ai/","msgid":"<20230512031045.199419-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T03:10:45","name":"RISC-V: Fix fail of vmv-imm-rv64.c in rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512031045.199419-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92939,"url":"https://patchwork.plctlab.org/api/1.2/patches/92939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512050016.476110-1-pan2.li@intel.com/","msgid":"<20230512050016.476110-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T05:00:16","name":"Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512050016.476110-1-pan2.li@intel.com/mbox/"},{"id":92940,"url":"https://patchwork.plctlab.org/api/1.2/patches/92940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512054213.2211594-1-hongtao.liu@intel.com/","msgid":"<20230512054213.2211594-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-12T05:42:13","name":"Provide -fcf-protection=branch,return.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512054213.2211594-1-hongtao.liu@intel.com/mbox/"},{"id":92948,"url":"https://patchwork.plctlab.org/api/1.2/patches/92948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:47","name":"[v2,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92951,"url":"https://patchwork.plctlab.org/api/1.2/patches/92951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:49","name":"[v2,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92952,"url":"https://patchwork.plctlab.org/api/1.2/patches/92952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:50","name":"[v2,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92955,"url":"https://patchwork.plctlab.org/api/1.2/patches/92955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:51","name":"[v2,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92953,"url":"https://patchwork.plctlab.org/api/1.2/patches/92953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:53","name":"[v2,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92954,"url":"https://patchwork.plctlab.org/api/1.2/patches/92954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:55","name":"[v2,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92947,"url":"https://patchwork.plctlab.org/api/1.2/patches/92947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:56","name":"[v2,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92949,"url":"https://patchwork.plctlab.org/api/1.2/patches/92949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:58","name":"[v2,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92956,"url":"https://patchwork.plctlab.org/api/1.2/patches/92956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:59","name":"[v2,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92979,"url":"https://patchwork.plctlab.org/api/1.2/patches/92979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6si9fiv.fsf@euler.schwinge.homeip.net/","msgid":"<87h6si9fiv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T07:26:32","name":"libgomp testsuite: Generalize '\''lang_library_path'\'' into a list of '\''lang_library_paths'\'' (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6si9fiv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":92997,"url":"https://patchwork.plctlab.org/api/1.2/patches/92997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkiq9cpa.fsf@euler.schwinge.homeip.net/","msgid":"<87bkiq9cpa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T08:27:29","name":"libgomp testsuite: Have each '\''*.exp'\'' file specify the compiler to use [PR91884] (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkiq9cpa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":93001,"url":"https://patchwork.plctlab.org/api/1.2/patches/93001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cte9cfa.fsf@euler.schwinge.homeip.net/","msgid":"<877cte9cfa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T08:33:29","name":"libgomp testsuite: As appropriate, use the '\''gcc'\'', '\''g++'\'', '\''gfortran'\'' driver [PR91884] (was: libgomp testsuite: Have each '\''*.exp'\'' file specify the compiler to use [PR91884] (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cte9cfa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":93005,"url":"https://patchwork.plctlab.org/api/1.2/patches/93005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512085802.84994-1-kito.cheng@sifive.com/","msgid":"<20230512085802.84994-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T08:58:02","name":"[committed] RISC-V: Suppress unused parameter warning in riscv-common.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512085802.84994-1-kito.cheng@sifive.com/mbox/"},{"id":93012,"url":"https://patchwork.plctlab.org/api/1.2/patches/93012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512090443.34123-2-gaofei@eswincomputing.com/","msgid":"<20230512090443.34123-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-12T09:04:43","name":"[1/1,V2,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512090443.34123-2-gaofei@eswincomputing.com/mbox/"},{"id":93026,"url":"https://patchwork.plctlab.org/api/1.2/patches/93026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-1-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:30","name":"[01/26] arm: [MVE intrinsics] add binary_widen_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-1-christophe.lyon@arm.com/mbox/"},{"id":93043,"url":"https://patchwork.plctlab.org/api/1.2/patches/93043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-2-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:31","name":"[02/26] arm: [MVE intrinsics] factorize vqdmullbq vqdmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-2-christophe.lyon@arm.com/mbox/"},{"id":93036,"url":"https://patchwork.plctlab.org/api/1.2/patches/93036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-3-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:32","name":"[03/26] arm: [MVE intrinsics] rework vqdmullbq vqdmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-3-christophe.lyon@arm.com/mbox/"},{"id":93037,"url":"https://patchwork.plctlab.org/api/1.2/patches/93037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-4-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:33","name":"[04/26] arm: [MVE intrinsics] factorize vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-4-christophe.lyon@arm.com/mbox/"},{"id":93035,"url":"https://patchwork.plctlab.org/api/1.2/patches/93035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-5-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:34","name":"[05/26] arm: [MVE intrinsics] rework vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-5-christophe.lyon@arm.com/mbox/"},{"id":93028,"url":"https://patchwork.plctlab.org/api/1.2/patches/93028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-6-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:35","name":"[06/26] arm: [MVE intrinsics] add binary_lshift_unsigned shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-6-christophe.lyon@arm.com/mbox/"},{"id":93027,"url":"https://patchwork.plctlab.org/api/1.2/patches/93027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-7-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:36","name":"[07/26] arm: [MVE intrinsics] factorize vqshluq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-7-christophe.lyon@arm.com/mbox/"},{"id":93048,"url":"https://patchwork.plctlab.org/api/1.2/patches/93048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-8-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:37","name":"[08/26] arm: [MVE intrinsics] rework vqshluq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-8-christophe.lyon@arm.com/mbox/"},{"id":93025,"url":"https://patchwork.plctlab.org/api/1.2/patches/93025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-9-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:38","name":"[09/26] arm: [MVE intrinsics] add binary_imm32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-9-christophe.lyon@arm.com/mbox/"},{"id":93044,"url":"https://patchwork.plctlab.org/api/1.2/patches/93044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-10-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:39","name":"[10/26] arm: [MVE intrinsics] factorize vrbsrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-10-christophe.lyon@arm.com/mbox/"},{"id":93039,"url":"https://patchwork.plctlab.org/api/1.2/patches/93039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-11-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:40","name":"[11/26] arm: [MVE intrinsics] rework vbrsrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-11-christophe.lyon@arm.com/mbox/"},{"id":93052,"url":"https://patchwork.plctlab.org/api/1.2/patches/93052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-12-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:41","name":"[12/26] arm: [MVE intrinsics] add mvn shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-12-christophe.lyon@arm.com/mbox/"},{"id":93047,"url":"https://patchwork.plctlab.org/api/1.2/patches/93047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-13-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:42","name":"[13/26] arm: [MVE intrinsics] factorize vmvnq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-13-christophe.lyon@arm.com/mbox/"},{"id":93053,"url":"https://patchwork.plctlab.org/api/1.2/patches/93053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-14-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:43","name":"[14/26] arm: [MVE intrinsics] rework vmvnq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-14-christophe.lyon@arm.com/mbox/"},{"id":93049,"url":"https://patchwork.plctlab.org/api/1.2/patches/93049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-15-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:44","name":"[15/26] arm: [MVE intrinsics] add ternary_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-15-christophe.lyon@arm.com/mbox/"},{"id":93059,"url":"https://patchwork.plctlab.org/api/1.2/patches/93059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-16-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:45","name":"[16/26] arm: [MVE intrinsics] factorize vfmaq vfmsq vfmasq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-16-christophe.lyon@arm.com/mbox/"},{"id":93055,"url":"https://patchwork.plctlab.org/api/1.2/patches/93055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-17-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:46","name":"[17/26] arm: [MVE intrinsics] rework vfmaq vfmasq vfmsq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-17-christophe.lyon@arm.com/mbox/"},{"id":93051,"url":"https://patchwork.plctlab.org/api/1.2/patches/93051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-18-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:47","name":"[18/26] arm: [MVE intrinsics] factorize vpselq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-18-christophe.lyon@arm.com/mbox/"},{"id":93042,"url":"https://patchwork.plctlab.org/api/1.2/patches/93042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-19-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:48","name":"[19/26] arm: [MVE intrinsics] add vpsel shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-19-christophe.lyon@arm.com/mbox/"},{"id":93056,"url":"https://patchwork.plctlab.org/api/1.2/patches/93056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-20-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:49","name":"[20/26] arm: [MVE intrinsics] rework vpselq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-20-christophe.lyon@arm.com/mbox/"},{"id":93054,"url":"https://patchwork.plctlab.org/api/1.2/patches/93054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-21-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:50","name":"[21/26] arm: [MVE intrinsics] add ternary_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-21-christophe.lyon@arm.com/mbox/"},{"id":93045,"url":"https://patchwork.plctlab.org/api/1.2/patches/93045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-22-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:51","name":"[22/26] arm: [MVE intrinsics] factorize vsliq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-22-christophe.lyon@arm.com/mbox/"},{"id":93046,"url":"https://patchwork.plctlab.org/api/1.2/patches/93046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-23-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:52","name":"[23/26] arm: [MVE intrinsics] rework vsliq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-23-christophe.lyon@arm.com/mbox/"},{"id":93050,"url":"https://patchwork.plctlab.org/api/1.2/patches/93050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-24-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-24-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:53","name":"[24/26] arm: [MVE intrinsics] add ternary_rshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-24-christophe.lyon@arm.com/mbox/"},{"id":93058,"url":"https://patchwork.plctlab.org/api/1.2/patches/93058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-25-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-25-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:54","name":"[25/26] arm: [MVE intrinsics] factorize vsriq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-25-christophe.lyon@arm.com/mbox/"},{"id":93061,"url":"https://patchwork.plctlab.org/api/1.2/patches/93061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-26-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-26-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:55","name":"[26/26] arm: [MVE intrinsics] rework vsriq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-26-christophe.lyon@arm.com/mbox/"},{"id":93073,"url":"https://patchwork.plctlab.org/api/1.2/patches/93073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512100327.1941926-1-yunqiang.su@cipunited.com/","msgid":"<20230512100327.1941926-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-12T10:03:27","name":"[v3] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512100327.1941926-1-yunqiang.su@cipunited.com/mbox/"},{"id":93111,"url":"https://patchwork.plctlab.org/api/1.2/patches/93111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512103006.1944244-1-yunqiang.su@cipunited.com/","msgid":"<20230512103006.1944244-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-12T10:30:06","name":"[v4] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512103006.1944244-1-yunqiang.su@cipunited.com/mbox/"},{"id":93125,"url":"https://patchwork.plctlab.org/api/1.2/patches/93125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512104412.170581-1-juzhe.zhong@rivai.ai/","msgid":"<20230512104412.170581-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T10:44:12","name":"RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512104412.170581-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93142,"url":"https://patchwork.plctlab.org/api/1.2/patches/93142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512114759.DA50A13499@imap2.suse-dmz.suse.de/","msgid":"<20230512114759.DA50A13499@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-12T11:47:59","name":"tree-optimization/109791 - simplify (unsigned)&foo - (unsigned)(&foo + o)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512114759.DA50A13499@imap2.suse-dmz.suse.de/mbox/"},{"id":93144,"url":"https://patchwork.plctlab.org/api/1.2/patches/93144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512120247.3213280-1-julian@codesourcery.com/","msgid":"<20230512120247.3213280-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-05-12T12:02:47","name":"OpenMP: Constructors and destructors for \"declare target\" static aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512120247.3213280-1-julian@codesourcery.com/mbox/"},{"id":93177,"url":"https://patchwork.plctlab.org/api/1.2/patches/93177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-1-ppalka@redhat.com/","msgid":"<20230512123908.1652082-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-12T12:39:07","name":"[pushed] c++: remove redundant testcase [PR83258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-1-ppalka@redhat.com/mbox/"},{"id":93179,"url":"https://patchwork.plctlab.org/api/1.2/patches/93179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-2-ppalka@redhat.com/","msgid":"<20230512123908.1652082-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-12T12:39:08","name":"[pushed] c++: robustify testcase [PR109752]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-2-ppalka@redhat.com/mbox/"},{"id":93182,"url":"https://patchwork.plctlab.org/api/1.2/patches/93182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfc1g1lx.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-05-12T12:45:14","name":"ipa: Self-DCE of uses of removed call LHSs (PR 108007)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfc1g1lx.fsf@suse.cz/mbox/"},{"id":93183,"url":"https://patchwork.plctlab.org/api/1.2/patches/93183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com/","msgid":"<74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com>","list_archive_url":null,"date":"2023-05-12T12:46:21","name":"LTO: Fix writing of toplevel asm with offloading [PR109816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com/mbox/"},{"id":93185,"url":"https://patchwork.plctlab.org/api/1.2/patches/93185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512130414.6D78B13466@imap2.suse-dmz.suse.de/","msgid":"<20230512130414.6D78B13466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-12T13:04:14","name":"tree-optimization/64731 - extend store-from CTOR lowering to TARGET_MEM_REF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512130414.6D78B13466@imap2.suse-dmz.suse.de/mbox/"},{"id":93205,"url":"https://patchwork.plctlab.org/api/1.2/patches/93205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512132813.58106-1-kito.cheng@sifive.com/","msgid":"<20230512132813.58106-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T13:28:14","name":"[committed,v4] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512132813.58106-1-kito.cheng@sifive.com/mbox/"},{"id":93206,"url":"https://patchwork.plctlab.org/api/1.2/patches/93206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512133254.59478-1-kito.cheng@sifive.com/","msgid":"<20230512133254.59478-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T13:32:54","name":"RISC-V: Improve vector_insn_info::dump for LMUL and policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512133254.59478-1-kito.cheng@sifive.com/mbox/"},{"id":93208,"url":"https://patchwork.plctlab.org/api/1.2/patches/93208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134431.1289116-1-jwakely@redhat.com/","msgid":"<20230512134431.1289116-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:31","name":"[committed] libstdc++: Remove test dependencies on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134431.1289116-1-jwakely@redhat.com/mbox/"},{"id":93210,"url":"https://patchwork.plctlab.org/api/1.2/patches/93210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134435.1291779-1-jwakely@redhat.com/","msgid":"<20230512134435.1291779-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:35","name":"[committed] libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134435.1291779-1-jwakely@redhat.com/mbox/"},{"id":93209,"url":"https://patchwork.plctlab.org/api/1.2/patches/93209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134439.1291794-1-jwakely@redhat.com/","msgid":"<20230512134439.1291794-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:39","name":"[committed] libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134439.1291794-1-jwakely@redhat.com/mbox/"},{"id":93227,"url":"https://patchwork.plctlab.org/api/1.2/patches/93227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512145940.587528-1-juzhe.zhong@rivai.ai/","msgid":"<20230512145940.587528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T14:59:40","name":"[V2] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512145940.587528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93256,"url":"https://patchwork.plctlab.org/api/1.2/patches/93256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153828.604848-1-juzhe.zhong@rivai.ai/","msgid":"<20230512153828.604848-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T15:38:28","name":"[V3] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153828.604848-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93257,"url":"https://patchwork.plctlab.org/api/1.2/patches/93257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153839.1106908-1-pan2.li@intel.com/","msgid":"<20230512153839.1106908-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T15:38:39","name":"[v2] Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153839.1106908-1-pan2.li@intel.com/mbox/"},{"id":93261,"url":"https://patchwork.plctlab.org/api/1.2/patches/93261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512154655.613780-1-juzhe.zhong@rivai.ai/","msgid":"<20230512154655.613780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T15:46:55","name":"[V4] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512154655.613780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93280,"url":"https://patchwork.plctlab.org/api/1.2/patches/93280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z7q=6W_0Y2Xe0ZpWdHr+5-v4h+ZpDR7ekj_L3zDDXWOA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-12T16:43:50","name":"i386: Remove mulv2si emulated sequence for TARGET_SSE2 [PR109797]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z7q=6W_0Y2Xe0ZpWdHr+5-v4h+ZpDR7ekj_L3zDDXWOA@mail.gmail.com/mbox/"},{"id":93282,"url":"https://patchwork.plctlab.org/api/1.2/patches/93282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164838.1303266-1-jwakely@redhat.com/","msgid":"<20230512164838.1303266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:38","name":"[committed] libstdc++: Remove dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164838.1303266-1-jwakely@redhat.com/mbox/"},{"id":93283,"url":"https://patchwork.plctlab.org/api/1.2/patches/93283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164843.1303299-1-jwakely@redhat.com/","msgid":"<20230512164843.1303299-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:43","name":"[committed] libstdc++: Reduce dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164843.1303299-1-jwakely@redhat.com/mbox/"},{"id":93281,"url":"https://patchwork.plctlab.org/api/1.2/patches/93281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164849.1303313-1-jwakely@redhat.com/","msgid":"<20230512164849.1303313-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:49","name":"[committed] libstdc++: Remove redundant dependencies on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164849.1303313-1-jwakely@redhat.com/mbox/"},{"id":93284,"url":"https://patchwork.plctlab.org/api/1.2/patches/93284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164914.1303446-1-jwakely@redhat.com/","msgid":"<20230512164914.1303446-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:49:14","name":"[committed] libstdc++: Fix -Wnonnull warnings during configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164914.1303446-1-jwakely@redhat.com/mbox/"},{"id":93296,"url":"https://patchwork.plctlab.org/api/1.2/patches/93296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YvvcZRNkF8D8xPd-HgmcRE_2GWdv1ntM8yzqpSgLw0kA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-12T17:52:17","name":"i386: Cleanup ix86_expand_vecop_qihi{,2}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YvvcZRNkF8D8xPd-HgmcRE_2GWdv1ntM8yzqpSgLw0kA@mail.gmail.com/mbox/"},{"id":93341,"url":"https://patchwork.plctlab.org/api/1.2/patches/93341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512200527.B9B1133E96@hamza.pair.com/","msgid":"<20230512200527.B9B1133E96@hamza.pair.com>","list_archive_url":null,"date":"2023-05-12T20:05:24","name":"[pushed] wwwdocs: gcc-13/buildstat: Remove trace of XHTML","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512200527.B9B1133E96@hamza.pair.com/mbox/"},{"id":93369,"url":"https://patchwork.plctlab.org/api/1.2/patches/93369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512205332.1781029-1-jason@redhat.com/","msgid":"<20230512205332.1781029-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-12T20:53:32","name":"[RFC] c-family: make -fno-permissive upgrade pedwarns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512205332.1781029-1-jason@redhat.com/mbox/"},{"id":93443,"url":"https://patchwork.plctlab.org/api/1.2/patches/93443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513002026.321317-1-juzhe.zhong@rivai.ai/","msgid":"<20230513002026.321317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T00:20:26","name":"[V5] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513002026.321317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93473,"url":"https://patchwork.plctlab.org/api/1.2/patches/93473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513020859.13485-1-juzhe.zhong@rivai.ai/","msgid":"<20230513020859.13485-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T02:08:59","name":"RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513020859.13485-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93475,"url":"https://patchwork.plctlab.org/api/1.2/patches/93475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513030822.1481372-1-apinski@marvell.com/","msgid":"<20230513030822.1481372-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-13T03:08:22","name":"MATCH: Fix PR 109834, ICE with popcount combined with bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513030822.1481372-1-apinski@marvell.com/mbox/"},{"id":93478,"url":"https://patchwork.plctlab.org/api/1.2/patches/93478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513061719.63705-1-kito.cheng@sifive.com/","msgid":"<20230513061719.63705-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-13T06:17:19","name":"[committed] RISC-V: Pull out function call with side effect from gcc_assert.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513061719.63705-1-kito.cheng@sifive.com/mbox/"},{"id":93493,"url":"https://patchwork.plctlab.org/api/1.2/patches/93493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513092042.3927038-1-hongtao.liu@intel.com/","msgid":"<20230513092042.3927038-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-13T09:20:42","name":"[V2] Provide -fcf-protection=branch,return.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513092042.3927038-1-hongtao.liu@intel.com/mbox/"},{"id":93511,"url":"https://patchwork.plctlab.org/api/1.2/patches/93511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513114421.196081-1-juzhe.zhong@rivai.ai/","msgid":"<20230513114421.196081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T11:44:21","name":"RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513114421.196081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93526,"url":"https://patchwork.plctlab.org/api/1.2/patches/93526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513131325.1667305-1-pan2.li@intel.com/","msgid":"<20230513131325.1667305-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-13T13:13:25","name":"[v3] Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513131325.1667305-1-pan2.li@intel.com/mbox/"},{"id":93630,"url":"https://patchwork.plctlab.org/api/1.2/patches/93630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-2-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:08","name":"[01/14] ada: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-2-rep.dot.nop@gmail.com/mbox/"},{"id":93621,"url":"https://patchwork.plctlab.org/api/1.2/patches/93621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-3-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-3-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:09","name":"[02/14] analyzer: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-3-rep.dot.nop@gmail.com/mbox/"},{"id":93628,"url":"https://patchwork.plctlab.org/api/1.2/patches/93628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-4-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-4-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:10","name":"[03/14] gcc/config/*: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-4-rep.dot.nop@gmail.com/mbox/"},{"id":93629,"url":"https://patchwork.plctlab.org/api/1.2/patches/93629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-5-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-5-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:11","name":"[04/14] c++: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-5-rep.dot.nop@gmail.com/mbox/"},{"id":93626,"url":"https://patchwork.plctlab.org/api/1.2/patches/93626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-6-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-6-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:12","name":"[05/14] m2: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-6-rep.dot.nop@gmail.com/mbox/"},{"id":93634,"url":"https://patchwork.plctlab.org/api/1.2/patches/93634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-7-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-7-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:13","name":"[06/14] lto: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-7-rep.dot.nop@gmail.com/mbox/"},{"id":93620,"url":"https://patchwork.plctlab.org/api/1.2/patches/93620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-8-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-8-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:14","name":"[07/14] d: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-8-rep.dot.nop@gmail.com/mbox/"},{"id":93627,"url":"https://patchwork.plctlab.org/api/1.2/patches/93627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-9-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-9-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:15","name":"[08/14] fortran: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-9-rep.dot.nop@gmail.com/mbox/"},{"id":93631,"url":"https://patchwork.plctlab.org/api/1.2/patches/93631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-10-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-10-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:16","name":"[09/14] rust: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-10-rep.dot.nop@gmail.com/mbox/"},{"id":93622,"url":"https://patchwork.plctlab.org/api/1.2/patches/93622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-11-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-11-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:17","name":"[10/14] c: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-11-rep.dot.nop@gmail.com/mbox/"},{"id":93625,"url":"https://patchwork.plctlab.org/api/1.2/patches/93625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-12-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-12-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:18","name":"[11/14] objc: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-12-rep.dot.nop@gmail.com/mbox/"},{"id":93624,"url":"https://patchwork.plctlab.org/api/1.2/patches/93624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-13-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-13-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:19","name":"[12/14] go: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-13-rep.dot.nop@gmail.com/mbox/"},{"id":93623,"url":"https://patchwork.plctlab.org/api/1.2/patches/93623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-14-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-14-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:20","name":"[13/14] omp: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-14-rep.dot.nop@gmail.com/mbox/"},{"id":93633,"url":"https://patchwork.plctlab.org/api/1.2/patches/93633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-15-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-15-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:21","name":"[14/14] gcc: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-15-rep.dot.nop@gmail.com/mbox/"},{"id":93638,"url":"https://patchwork.plctlab.org/api/1.2/patches/93638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514031258.1542461-1-apinski@marvell.com/","msgid":"<20230514031258.1542461-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-14T03:12:58","name":"MATCH: Add pattern for `signbit(x) ? x : -x` into abs (and swapped)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514031258.1542461-1-apinski@marvell.com/mbox/"},{"id":93655,"url":"https://patchwork.plctlab.org/api/1.2/patches/93655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514082113.3487198-1-pan2.li@intel.com/","msgid":"<20230514082113.3487198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-14T08:21:13","name":"RISC-V: Refactor the or pattern to switch cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514082113.3487198-1-pan2.li@intel.com/mbox/"},{"id":93733,"url":"https://patchwork.plctlab.org/api/1.2/patches/93733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net/","msgid":"<2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net>","list_archive_url":null,"date":"2023-05-14T16:09:35","name":"Fix assertion for unwind-dw2-fde.c btree changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net/mbox/"},{"id":93753,"url":"https://patchwork.plctlab.org/api/1.2/patches/93753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z5J39bZ+prm87jyzfBHReNbFymYecFv7hwvO4+wH---w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-14T19:55:16","name":"i386: Handle unsupported modes from ix86_widen_mult_cost [PR109807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z5J39bZ+prm87jyzfBHReNbFymYecFv7hwvO4+wH---w@mail.gmail.com/mbox/"},{"id":93755,"url":"https://patchwork.plctlab.org/api/1.2/patches/93755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2b29de67-6497-40b6-bc2d-2ff749ab4d90-1684094665147@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2023-05-14T20:04:25","name":"Fortran: CLASS pointer function result in variable definition context [PR109846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2b29de67-6497-40b6-bc2d-2ff749ab4d90-1684094665147@3c-app-gmx-bs49/mbox/"},{"id":93777,"url":"https://patchwork.plctlab.org/api/1.2/patches/93777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515012844.183599-1-juzhe.zhong@rivai.ai/","msgid":"<20230515012844.183599-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T01:28:44","name":"[V7] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515012844.183599-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93796,"url":"https://patchwork.plctlab.org/api/1.2/patches/93796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515022647.182902-1-juzhe.zhong@rivai.ai/","msgid":"<20230515022647.182902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T02:26:47","name":"RISC-V: Add VECTOR_ALIGNMENT_REACHABLE && BUILTIN_VECTORIZATION_COST target hook to optimize RVV VLS auto-vectorization codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515022647.182902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93828,"url":"https://patchwork.plctlab.org/api/1.2/patches/93828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031452.2154535-1-pan2.li@intel.com/","msgid":"<20230515031452.2154535-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-15T03:14:52","name":"RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031452.2154535-1-pan2.li@intel.com/mbox/"},{"id":93829,"url":"https://patchwork.plctlab.org/api/1.2/patches/93829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031514.241945-1-juzhe.zhong@rivai.ai/","msgid":"<20230515031514.241945-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T03:15:14","name":"RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA && VLS auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031514.241945-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93830,"url":"https://patchwork.plctlab.org/api/1.2/patches/93830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031549.242051-1-juzhe.zhong@rivai.ai/","msgid":"<20230515031549.242051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T03:15:49","name":"[V2] RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA && VLS auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031549.242051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93852,"url":"https://patchwork.plctlab.org/api/1.2/patches/93852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com/","msgid":"<595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com>","list_archive_url":null,"date":"2023-05-15T05:06:03","name":"[Testsuite] Skip -fdelete-null-pointer-check tests if target keeps_null_pointer_checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com/mbox/"},{"id":93928,"url":"https://patchwork.plctlab.org/api/1.2/patches/93928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-2-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:36","name":"[1/3] s390: Refactor block operation cpymem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-2-stefansf@linux.ibm.com/mbox/"},{"id":93927,"url":"https://patchwork.plctlab.org/api/1.2/patches/93927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-3-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-3-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:37","name":"[2/3] s390: Add block operation movmem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-3-stefansf@linux.ibm.com/mbox/"},{"id":93932,"url":"https://patchwork.plctlab.org/api/1.2/patches/93932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-4-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-4-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:38","name":"[3/3] s390: Refactor block operation setmem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-4-stefansf@linux.ibm.com/mbox/"},{"id":93955,"url":"https://patchwork.plctlab.org/api/1.2/patches/93955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515081725.106136-1-juzhe.zhong@rivai.ai/","msgid":"<20230515081725.106136-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T08:17:25","name":"RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515081725.106136-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93956,"url":"https://patchwork.plctlab.org/api/1.2/patches/93956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082137.4BC95138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515082137.4BC95138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:21:36","name":"Fix gcc.dg/vect/pr108950.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082137.4BC95138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93960,"url":"https://patchwork.plctlab.org/api/1.2/patches/93960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082406.A92BA138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515082406.A92BA138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:24:06","name":"[GCC,12] testsuite/108776 - avoid c-c++-common/rotate-11.c FAIL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082406.A92BA138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93968,"url":"https://patchwork.plctlab.org/api/1.2/patches/93968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515083305.2656202-1-pan2.li@intel.com/","msgid":"<20230515083305.2656202-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-15T08:33:05","name":"[v2] RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515083305.2656202-1-pan2.li@intel.com/mbox/"},{"id":93969,"url":"https://patchwork.plctlab.org/api/1.2/patches/93969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515084047.475AF138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515084047.475AF138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:40:46","name":"tree-optimization/109848 - fix TARGET_MEM_REF store from CTOR simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515084047.475AF138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93973,"url":"https://patchwork.plctlab.org/api/1.2/patches/93973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515085146.281004-1-juzhe.zhong@rivai.ai/","msgid":"<20230515085146.281004-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T08:51:46","name":"[V2] RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515085146.281004-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94016,"url":"https://patchwork.plctlab.org/api/1.2/patches/94016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094135.1407003-1-poulhies@adacore.com/","msgid":"<20230515094135.1407003-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:35","name":"[COMMITTED] ada: Fix link to parent when copying with Copy_Separate_Tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094135.1407003-1-poulhies@adacore.com/mbox/"},{"id":94017,"url":"https://patchwork.plctlab.org/api/1.2/patches/94017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094145.1407307-1-poulhies@adacore.com/","msgid":"<20230515094145.1407307-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:45","name":"[COMMITTED] ada: Fix Unchecked_Conversion in edge case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094145.1407307-1-poulhies@adacore.com/mbox/"},{"id":94020,"url":"https://patchwork.plctlab.org/api/1.2/patches/94020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094154.1407371-1-poulhies@adacore.com/","msgid":"<20230515094154.1407371-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:54","name":"[COMMITTED] ada: Reject attribute Initialize on unchecked unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094154.1407371-1-poulhies@adacore.com/mbox/"},{"id":94033,"url":"https://patchwork.plctlab.org/api/1.2/patches/94033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094203.1407440-1-poulhies@adacore.com/","msgid":"<20230515094203.1407440-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:03","name":"[COMMITTED] ada: Skip dynamic interface conversion under native runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094203.1407440-1-poulhies@adacore.com/mbox/"},{"id":94024,"url":"https://patchwork.plctlab.org/api/1.2/patches/94024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094215.1407504-1-poulhies@adacore.com/","msgid":"<20230515094215.1407504-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:15","name":"[COMMITTED] ada: GNAT UGN: Add section documenting PIE being enabled by default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094215.1407504-1-poulhies@adacore.com/mbox/"},{"id":94018,"url":"https://patchwork.plctlab.org/api/1.2/patches/94018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094223.1407571-1-poulhies@adacore.com/","msgid":"<20230515094223.1407571-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:23","name":"[COMMITTED] ada: INOX: prototype RFC on String Interpolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094223.1407571-1-poulhies@adacore.com/mbox/"},{"id":94038,"url":"https://patchwork.plctlab.org/api/1.2/patches/94038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094229.1407641-1-poulhies@adacore.com/","msgid":"<20230515094229.1407641-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:29","name":"[COMMITTED] ada: Allow pragmas Annotate between loop pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094229.1407641-1-poulhies@adacore.com/mbox/"},{"id":94042,"url":"https://patchwork.plctlab.org/api/1.2/patches/94042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094236.1407706-1-poulhies@adacore.com/","msgid":"<20230515094236.1407706-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:36","name":"[COMMITTED] ada: Fix proof of runtime unit System.Value*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094236.1407706-1-poulhies@adacore.com/mbox/"},{"id":94030,"url":"https://patchwork.plctlab.org/api/1.2/patches/94030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094244.1407771-1-poulhies@adacore.com/","msgid":"<20230515094244.1407771-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:44","name":"[COMMITTED] ada: Fix invalid JSON for extended variant record with -gnatRj","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094244.1407771-1-poulhies@adacore.com/mbox/"},{"id":94044,"url":"https://patchwork.plctlab.org/api/1.2/patches/94044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094249.1407836-1-poulhies@adacore.com/","msgid":"<20230515094249.1407836-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:49","name":"[COMMITTED] ada: Fix handling of pragma Warnings (Toolname, Off/On)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094249.1407836-1-poulhies@adacore.com/mbox/"},{"id":94043,"url":"https://patchwork.plctlab.org/api/1.2/patches/94043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094254.1407902-1-poulhies@adacore.com/","msgid":"<20230515094254.1407902-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:54","name":"[COMMITTED] ada: Add Check_Error_Detected before \"raise Bad_Attribute\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094254.1407902-1-poulhies@adacore.com/mbox/"},{"id":94032,"url":"https://patchwork.plctlab.org/api/1.2/patches/94032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094301.1407966-1-poulhies@adacore.com/","msgid":"<20230515094301.1407966-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:01","name":"[COMMITTED] ada: Optimize 2**N to avoid explicit '\''if'\'' in modular case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094301.1407966-1-poulhies@adacore.com/mbox/"},{"id":94040,"url":"https://patchwork.plctlab.org/api/1.2/patches/94040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094310.1408030-1-poulhies@adacore.com/","msgid":"<20230515094310.1408030-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:10","name":"[COMMITTED] ada: Fix minor documentation formatting issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094310.1408030-1-poulhies@adacore.com/mbox/"},{"id":94049,"url":"https://patchwork.plctlab.org/api/1.2/patches/94049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094316.1408094-1-poulhies@adacore.com/","msgid":"<20230515094316.1408094-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:16","name":"[COMMITTED] ada: Improve check of attribute reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094316.1408094-1-poulhies@adacore.com/mbox/"},{"id":94047,"url":"https://patchwork.plctlab.org/api/1.2/patches/94047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094322.1408160-1-poulhies@adacore.com/","msgid":"<20230515094322.1408160-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:22","name":"[COMMITTED] ada: Update comment after SPARK RM change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094322.1408160-1-poulhies@adacore.com/mbox/"},{"id":94048,"url":"https://patchwork.plctlab.org/api/1.2/patches/94048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094329.1408226-1-poulhies@adacore.com/","msgid":"<20230515094329.1408226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:29","name":"[COMMITTED] ada: Emit warnings for (some) ineffective static predicate tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094329.1408226-1-poulhies@adacore.com/mbox/"},{"id":94051,"url":"https://patchwork.plctlab.org/api/1.2/patches/94051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094335.1408296-1-poulhies@adacore.com/","msgid":"<20230515094335.1408296-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:35","name":"[COMMITTED] ada: Accept aggregates with OTHERS clause in unchecked type conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094335.1408296-1-poulhies@adacore.com/mbox/"},{"id":94055,"url":"https://patchwork.plctlab.org/api/1.2/patches/94055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094341.1408360-1-poulhies@adacore.com/","msgid":"<20230515094341.1408360-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:41","name":"[COMMITTED] ada: Simplify lookup of predecessor in homonym chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094341.1408360-1-poulhies@adacore.com/mbox/"},{"id":94052,"url":"https://patchwork.plctlab.org/api/1.2/patches/94052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094346.1408423-1-poulhies@adacore.com/","msgid":"<20230515094346.1408423-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:46","name":"[COMMITTED] ada: Remove redundant protection against empty lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094346.1408423-1-poulhies@adacore.com/mbox/"},{"id":94046,"url":"https://patchwork.plctlab.org/api/1.2/patches/94046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094353.1408487-1-poulhies@adacore.com/","msgid":"<20230515094353.1408487-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:53","name":"[COMMITTED] ada: Fix internal error on instance in package body with -gnatn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094353.1408487-1-poulhies@adacore.com/mbox/"},{"id":94057,"url":"https://patchwork.plctlab.org/api/1.2/patches/94057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094358.1408551-1-poulhies@adacore.com/","msgid":"<20230515094358.1408551-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:58","name":"[COMMITTED] ada: Clean up vanishing entity fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094358.1408551-1-poulhies@adacore.com/mbox/"},{"id":94059,"url":"https://patchwork.plctlab.org/api/1.2/patches/94059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094404.1408615-1-poulhies@adacore.com/","msgid":"<20230515094404.1408615-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:04","name":"[COMMITTED] ada: Improve comment on First_Entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094404.1408615-1-poulhies@adacore.com/mbox/"},{"id":94061,"url":"https://patchwork.plctlab.org/api/1.2/patches/94061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094408.1408681-1-poulhies@adacore.com/","msgid":"<20230515094408.1408681-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:08","name":"[COMMITTED] ada: Remove duplicated code in Proc_Next_Component_Or_Discriminant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094408.1408681-1-poulhies@adacore.com/mbox/"},{"id":94064,"url":"https://patchwork.plctlab.org/api/1.2/patches/94064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094413.1408748-1-poulhies@adacore.com/","msgid":"<20230515094413.1408748-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:13","name":"[COMMITTED] ada: Fix formatting inconsistency in User'\''s Guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094413.1408748-1-poulhies@adacore.com/mbox/"},{"id":94062,"url":"https://patchwork.plctlab.org/api/1.2/patches/94062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094417.1408811-1-poulhies@adacore.com/","msgid":"<20230515094417.1408811-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:17","name":"[COMMITTED] ada: Use Inline aspect instead of pragma in Einfo.Utils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094417.1408811-1-poulhies@adacore.com/mbox/"},{"id":94050,"url":"https://patchwork.plctlab.org/api/1.2/patches/94050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094422.1408878-1-poulhies@adacore.com/","msgid":"<20230515094422.1408878-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:22","name":"[COMMITTED] ada: Fix comment related to inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094422.1408878-1-poulhies@adacore.com/mbox/"},{"id":94067,"url":"https://patchwork.plctlab.org/api/1.2/patches/94067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094425.1408943-1-poulhies@adacore.com/","msgid":"<20230515094425.1408943-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:25","name":"[COMMITTED] ada: Recover proof of Interfaces.C for termination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094425.1408943-1-poulhies@adacore.com/mbox/"},{"id":94068,"url":"https://patchwork.plctlab.org/api/1.2/patches/94068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094429.1409007-1-poulhies@adacore.com/","msgid":"<20230515094429.1409007-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:29","name":"[COMMITTED] ada: Recover proof of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094429.1409007-1-poulhies@adacore.com/mbox/"},{"id":94065,"url":"https://patchwork.plctlab.org/api/1.2/patches/94065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094434.1409071-1-poulhies@adacore.com/","msgid":"<20230515094434.1409071-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:34","name":"[COMMITTED] ada: Add annotations for proof of termination of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094434.1409071-1-poulhies@adacore.com/mbox/"},{"id":94069,"url":"https://patchwork.plctlab.org/api/1.2/patches/94069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094440.1409136-1-poulhies@adacore.com/","msgid":"<20230515094440.1409136-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:40","name":"[COMMITTED] ada: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094440.1409136-1-poulhies@adacore.com/mbox/"},{"id":94084,"url":"https://patchwork.plctlab.org/api/1.2/patches/94084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515102550.228989-1-juzhe.zhong@rivai.ai/","msgid":"<20230515102550.228989-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T10:25:50","name":"[V3] RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515102550.228989-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94090,"url":"https://patchwork.plctlab.org/api/1.2/patches/94090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515103523.100412-1-aldyh@redhat.com/","msgid":"<20230515103523.100412-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-15T10:35:23","name":"Add auto-resizing capability to irange'\''s [PR109695]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515103523.100412-1-aldyh@redhat.com/mbox/"},{"id":94095,"url":"https://patchwork.plctlab.org/api/1.2/patches/94095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515114932.244397-1-juzhe.zhong@rivai.ai/","msgid":"<20230515114932.244397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T11:49:32","name":"RISC-V: Add rounding mode operand for floating point instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515114932.244397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94107,"url":"https://patchwork.plctlab.org/api/1.2/patches/94107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515121617.280113-1-juzhe.zhong@rivai.ai/","msgid":"<20230515121617.280113-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:16:17","name":"RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515121617.280113-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94109,"url":"https://patchwork.plctlab.org/api/1.2/patches/94109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-1-juzhe.zhong@rivai.ai/","msgid":"<20230515122235.293830-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:22:34","name":"OPTABS: Extend the number of expanding instructions pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94108,"url":"https://patchwork.plctlab.org/api/1.2/patches/94108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-2-juzhe.zhong@rivai.ai/","msgid":"<20230515122235.293830-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:22:35","name":"RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-2-juzhe.zhong@rivai.ai/mbox/"},{"id":94136,"url":"https://patchwork.plctlab.org/api/1.2/patches/94136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515131628.953-1-jinma@linux.alibaba.com/","msgid":"<20230515131628.953-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-15T13:16:28","name":"[v9] RISC-V: Add the '\''zfa'\'' extension, version 0.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515131628.953-1-jinma@linux.alibaba.com/mbox/"},{"id":94181,"url":"https://patchwork.plctlab.org/api/1.2/patches/94181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515145346.153478-1-juzhe.zhong@rivai.ai/","msgid":"<20230515145346.153478-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T14:53:46","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515145346.153478-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94193,"url":"https://patchwork.plctlab.org/api/1.2/patches/94193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515152455.2549476-1-ppalka@redhat.com/","msgid":"<20230515152455.2549476-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-15T15:24:55","name":"c++: add feature-test macro for auto(x)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515152455.2549476-1-ppalka@redhat.com/mbox/"},{"id":94265,"url":"https://patchwork.plctlab.org/api/1.2/patches/94265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de/","msgid":"<48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de>","list_archive_url":null,"date":"2023-05-15T18:05:18","name":"[avr] Fix PR109650 wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de/mbox/"},{"id":94301,"url":"https://patchwork.plctlab.org/api/1.2/patches/94301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1lp8lcr.fsf@euler.schwinge.homeip.net/","msgid":"<87y1lp8lcr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-15T19:07:16","name":"Back to requiring \"Perl version 5.6.1 (or later)\" [PR82856] (was: Update GCC to autoconf 2.69, automake 1.15.1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1lp8lcr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94348,"url":"https://patchwork.plctlab.org/api/1.2/patches/94348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515211852.228907-1-juzhe.zhong@rivai.ai/","msgid":"<20230515211852.228907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T21:18:52","name":"[V9] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515211852.228907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94353,"url":"https://patchwork.plctlab.org/api/1.2/patches/94353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca8b8c9a-1866-b95d-8b93-9d57885de5f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-15T21:28:45","name":"[committed] c: Update __has_c_attribute values for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca8b8c9a-1866-b95d-8b93-9d57885de5f@codesourcery.com/mbox/"},{"id":94394,"url":"https://patchwork.plctlab.org/api/1.2/patches/94394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dba8287c-e1e4-21fa-f842-80b459e7b65f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-15T23:18:33","name":"[committed] c: Ignore _Atomic on function return type for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dba8287c-e1e4-21fa-f842-80b459e7b65f@codesourcery.com/mbox/"},{"id":94412,"url":"https://patchwork.plctlab.org/api/1.2/patches/94412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516013655.1660657-1-apinski@marvell.com/","msgid":"<20230516013655.1660657-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-16T01:36:55","name":"MATCH: [PR109424] Simplify min/max of boolean arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516013655.1660657-1-apinski@marvell.com/mbox/"},{"id":94442,"url":"https://patchwork.plctlab.org/api/1.2/patches/94442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef5944f4-28b5-1fe0-26b8-a348ea56d045@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T06:15:28","name":"[v5,1/4] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef5944f4-28b5-1fe0-26b8-a348ea56d045@linux.ibm.com/mbox/"},{"id":94459,"url":"https://patchwork.plctlab.org/api/1.2/patches/94459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516064322.2584953-1-stefansf@linux.ibm.com/","msgid":"<20230516064322.2584953-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-16T06:43:23","name":"s390: Implement TARGET_ATOMIC_ALIGN_FOR_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516064322.2584953-1-stefansf@linux.ibm.com/mbox/"},{"id":94463,"url":"https://patchwork.plctlab.org/api/1.2/patches/94463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516065201.751821-1-pan2.li@intel.com/","msgid":"<20230516065201.751821-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-16T06:52:01","name":"RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516065201.751821-1-pan2.li@intel.com/mbox/"},{"id":94514,"url":"https://patchwork.plctlab.org/api/1.2/patches/94514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083903.1500563-1-poulhies@adacore.com/","msgid":"<20230516083903.1500563-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:03","name":"[COMMITTED] ada: Restore proof of System.Arith_Double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083903.1500563-1-poulhies@adacore.com/mbox/"},{"id":94515,"url":"https://patchwork.plctlab.org/api/1.2/patches/94515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083925.1500745-1-poulhies@adacore.com/","msgid":"<20230516083925.1500745-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:25","name":"[COMMITTED] ada: Trivial refactoring in Instantiate_*_Body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083925.1500745-1-poulhies@adacore.com/mbox/"},{"id":94516,"url":"https://patchwork.plctlab.org/api/1.2/patches/94516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083931.1500816-1-poulhies@adacore.com/","msgid":"<20230516083931.1500816-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:31","name":"[COMMITTED] ada: Set Loop_Variant assertion policy to Ignore in both","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083931.1500816-1-poulhies@adacore.com/mbox/"},{"id":94517,"url":"https://patchwork.plctlab.org/api/1.2/patches/94517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083935.1500895-1-poulhies@adacore.com/","msgid":"<20230516083935.1500895-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:35","name":"[COMMITTED] ada: Missing dependency with -gnatc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083935.1500895-1-poulhies@adacore.com/mbox/"},{"id":94519,"url":"https://patchwork.plctlab.org/api/1.2/patches/94519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083940.1500958-1-poulhies@adacore.com/","msgid":"<20230516083940.1500958-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:40","name":"[COMMITTED] ada: Add intermediate assertions for proof of Super_Tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083940.1500958-1-poulhies@adacore.com/mbox/"},{"id":94520,"url":"https://patchwork.plctlab.org/api/1.2/patches/94520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083944.1501021-1-poulhies@adacore.com/","msgid":"<20230516083944.1501021-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:44","name":"[COMMITTED] ada: Simplify dramatically ghost code for proof of System.Arith_Double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083944.1501021-1-poulhies@adacore.com/mbox/"},{"id":94523,"url":"https://patchwork.plctlab.org/api/1.2/patches/94523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083949.1501084-1-poulhies@adacore.com/","msgid":"<20230516083949.1501084-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:49","name":"[COMMITTED] ada: Change Present_Expr field type to Uint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083949.1501084-1-poulhies@adacore.com/mbox/"},{"id":94518,"url":"https://patchwork.plctlab.org/api/1.2/patches/94518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083956.1501148-1-poulhies@adacore.com/","msgid":"<20230516083956.1501148-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:56","name":"[COMMITTED] ada: Introduce Cannot_Be_Superflat flag on N_Range nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083956.1501148-1-poulhies@adacore.com/mbox/"},{"id":94528,"url":"https://patchwork.plctlab.org/api/1.2/patches/94528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084001.1501211-1-poulhies@adacore.com/","msgid":"<20230516084001.1501211-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:01","name":"[COMMITTED] ada: Bad handling of ASCII with -gnatyn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084001.1501211-1-poulhies@adacore.com/mbox/"},{"id":94532,"url":"https://patchwork.plctlab.org/api/1.2/patches/94532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084006.1501276-1-poulhies@adacore.com/","msgid":"<20230516084006.1501276-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:06","name":"[COMMITTED] ada: Document examples of No_Dependence restriction for code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084006.1501276-1-poulhies@adacore.com/mbox/"},{"id":94522,"url":"https://patchwork.plctlab.org/api/1.2/patches/94522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084011.1501341-1-poulhies@adacore.com/","msgid":"<20230516084011.1501341-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:11","name":"[COMMITTED] ada: Get name from entity if that'\''s what'\''s passed to Subprogram_Name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084011.1501341-1-poulhies@adacore.com/mbox/"},{"id":94535,"url":"https://patchwork.plctlab.org/api/1.2/patches/94535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084015.1501411-1-poulhies@adacore.com/","msgid":"<20230516084015.1501411-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:15","name":"[COMMITTED] ada: Build invariant procedure while freezing in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084015.1501411-1-poulhies@adacore.com/mbox/"},{"id":94539,"url":"https://patchwork.plctlab.org/api/1.2/patches/94539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084022.1501474-1-poulhies@adacore.com/","msgid":"<20230516084022.1501474-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:22","name":"[COMMITTED] ada: Adjust semantics and implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084022.1501474-1-poulhies@adacore.com/mbox/"},{"id":94526,"url":"https://patchwork.plctlab.org/api/1.2/patches/94526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084026.1501538-1-poulhies@adacore.com/","msgid":"<20230516084026.1501538-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:26","name":"[COMMITTED] ada: Fix typo in \"pattern\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084026.1501538-1-poulhies@adacore.com/mbox/"},{"id":94527,"url":"https://patchwork.plctlab.org/api/1.2/patches/94527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084032.1501610-1-poulhies@adacore.com/","msgid":"<20230516084032.1501610-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:32","name":"[COMMITTED] ada: Add tags on style messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084032.1501610-1-poulhies@adacore.com/mbox/"},{"id":94541,"url":"https://patchwork.plctlab.org/api/1.2/patches/94541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084037.1501674-1-poulhies@adacore.com/","msgid":"<20230516084037.1501674-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:37","name":"[COMMITTED] ada: Follow-up improvement to implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084037.1501674-1-poulhies@adacore.com/mbox/"},{"id":94530,"url":"https://patchwork.plctlab.org/api/1.2/patches/94530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084042.1501739-1-poulhies@adacore.com/","msgid":"<20230516084042.1501739-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:42","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on PPC Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084042.1501739-1-poulhies@adacore.com/mbox/"},{"id":94521,"url":"https://patchwork.plctlab.org/api/1.2/patches/94521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084048.1501804-1-poulhies@adacore.com/","msgid":"<20230516084048.1501804-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:48","name":"[COMMITTED] ada: Fix Ada representation of r_debug and link_map types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084048.1501804-1-poulhies@adacore.com/mbox/"},{"id":94531,"url":"https://patchwork.plctlab.org/api/1.2/patches/94531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084052.1501867-1-poulhies@adacore.com/","msgid":"<20230516084052.1501867-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:52","name":"[COMMITTED] ada: usage.adb: document -gnatyD switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084052.1501867-1-poulhies@adacore.com/mbox/"},{"id":94533,"url":"https://patchwork.plctlab.org/api/1.2/patches/94533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084058.1501934-1-poulhies@adacore.com/","msgid":"<20230516084058.1501934-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:58","name":"[COMMITTED] ada: Apply range checks to preanalyzed aggregate expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084058.1501934-1-poulhies@adacore.com/mbox/"},{"id":94536,"url":"https://patchwork.plctlab.org/api/1.2/patches/94536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084103.1502006-1-poulhies@adacore.com/","msgid":"<20230516084103.1502006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:03","name":"[COMMITTED] ada: Spurious error on function returning CPP type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084103.1502006-1-poulhies@adacore.com/mbox/"},{"id":94534,"url":"https://patchwork.plctlab.org/api/1.2/patches/94534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084110.1502069-1-poulhies@adacore.com/","msgid":"<20230516084110.1502069-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:10","name":"[COMMITTED] ada: Spurious error analyzing '\''old or '\''result in class-wide conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084110.1502069-1-poulhies@adacore.com/mbox/"},{"id":94525,"url":"https://patchwork.plctlab.org/api/1.2/patches/94525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084115.1502135-1-poulhies@adacore.com/","msgid":"<20230516084115.1502135-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:15","name":"[COMMITTED] ada: Implement inheritance of user-defined literal aspects for untagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084115.1502135-1-poulhies@adacore.com/mbox/"},{"id":94543,"url":"https://patchwork.plctlab.org/api/1.2/patches/94543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084120.1502199-1-poulhies@adacore.com/","msgid":"<20230516084120.1502199-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:20","name":"[COMMITTED] ada: Update proof of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084120.1502199-1-poulhies@adacore.com/mbox/"},{"id":94540,"url":"https://patchwork.plctlab.org/api/1.2/patches/94540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084125.1502265-1-poulhies@adacore.com/","msgid":"<20230516084125.1502265-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:25","name":"[COMMITTED] ada: Fix internal error on chain of predicated record types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084125.1502265-1-poulhies@adacore.com/mbox/"},{"id":94544,"url":"https://patchwork.plctlab.org/api/1.2/patches/94544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084129.1502331-1-poulhies@adacore.com/","msgid":"<20230516084129.1502331-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:29","name":"[COMMITTED] ada: Fix internal error on '\''Image applied to array component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084129.1502331-1-poulhies@adacore.com/mbox/"},{"id":94545,"url":"https://patchwork.plctlab.org/api/1.2/patches/94545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084133.1502396-1-poulhies@adacore.com/","msgid":"<20230516084133.1502396-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:33","name":"[COMMITTED] ada: Fix crash on iterated component in expression function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084133.1502396-1-poulhies@adacore.com/mbox/"},{"id":94529,"url":"https://patchwork.plctlab.org/api/1.2/patches/94529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084138.1502460-1-poulhies@adacore.com/","msgid":"<20230516084138.1502460-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:38","name":"[COMMITTED] ada: Fix missing warning on aggregate with iterated component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084138.1502460-1-poulhies@adacore.com/mbox/"},{"id":94537,"url":"https://patchwork.plctlab.org/api/1.2/patches/94537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084141.1502523-1-poulhies@adacore.com/","msgid":"<20230516084141.1502523-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:41","name":"[COMMITTED] ada: Use accumulator type in expansion of '\''Reduce attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084141.1502523-1-poulhies@adacore.com/mbox/"},{"id":94542,"url":"https://patchwork.plctlab.org/api/1.2/patches/94542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084146.1502587-1-poulhies@adacore.com/","msgid":"<20230516084146.1502587-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:46","name":"[COMMITTED] ada: Add \"gnat --help-ada\" text for new switches.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084146.1502587-1-poulhies@adacore.com/mbox/"},{"id":94546,"url":"https://patchwork.plctlab.org/api/1.2/patches/94546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de/","msgid":"<94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de>","list_archive_url":null,"date":"2023-05-16T08:56:19","name":"[avr] PR105753: Fix ICE in add_clobbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de/mbox/"},{"id":94548,"url":"https://patchwork.plctlab.org/api/1.2/patches/94548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090555.1698108-1-jwakely@redhat.com/","msgid":"<20230516090555.1698108-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:05:55","name":"[committed] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090555.1698108-1-jwakely@redhat.com/mbox/"},{"id":94549,"url":"https://patchwork.plctlab.org/api/1.2/patches/94549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090708.1698284-1-jwakely@redhat.com/","msgid":"<20230516090708.1698284-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:07:08","name":"[committed] libstdc++: Require tzdb support for chrono::zoned_time printer test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090708.1698284-1-jwakely@redhat.com/mbox/"},{"id":94550,"url":"https://patchwork.plctlab.org/api/1.2/patches/94550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090719.1698299-1-jwakely@redhat.com/","msgid":"<20230516090719.1698299-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:07:19","name":"[committed] libstdc++: Add assertion to debug_allocator test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090719.1698299-1-jwakely@redhat.com/mbox/"},{"id":94565,"url":"https://patchwork.plctlab.org/api/1.2/patches/94565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-1-jwakely@redhat.com/","msgid":"<20230516091132.1698684-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:30","name":"[committed,1/3] libstdc++: Stop using _GLIBCXX_USE_C99_COMPLEX_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-1-jwakely@redhat.com/mbox/"},{"id":94573,"url":"https://patchwork.plctlab.org/api/1.2/patches/94573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-2-jwakely@redhat.com/","msgid":"<20230516091132.1698684-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:31","name":"[committed,2/3] libstdc++: Stop using _GLIBCXX_USE_C99_STDINT_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-2-jwakely@redhat.com/mbox/"},{"id":94568,"url":"https://patchwork.plctlab.org/api/1.2/patches/94568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-3-jwakely@redhat.com/","msgid":"<20230516091132.1698684-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:32","name":"[committed,3/3] libstdc++: Stop using TR1 macros in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-3-jwakely@redhat.com/mbox/"},{"id":94579,"url":"https://patchwork.plctlab.org/api/1.2/patches/94579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091941.84280-1-juzhe.zhong@rivai.ai/","msgid":"<20230516091941.84280-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T09:19:41","name":"[V10] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091941.84280-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94600,"url":"https://patchwork.plctlab.org/api/1.2/patches/94600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516101916.2895797-1-juzhe.zhong@rivai.ai/","msgid":"<20230516101916.2895797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:19:16","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516101916.2895797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94601,"url":"https://patchwork.plctlab.org/api/1.2/patches/94601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102124.2896235-1-juzhe.zhong@rivai.ai/","msgid":"<20230516102124.2896235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:21:24","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102124.2896235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94602,"url":"https://patchwork.plctlab.org/api/1.2/patches/94602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102319.163752-1-juzhe.zhong@rivai.ai/","msgid":"<20230516102319.163752-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:23:19","name":"[V11] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102319.163752-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94617,"url":"https://patchwork.plctlab.org/api/1.2/patches/94617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleho1r9v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T10:53:32","name":"aarch64: Allow moves after tied-register intrinsics (2nd edition)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleho1r9v.fsf@arm.com/mbox/"},{"id":94734,"url":"https://patchwork.plctlab.org/api/1.2/patches/94734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfbw8imk.fsf@euler.schwinge.homeip.net/","msgid":"<87sfbw8imk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-16T14:18:27","name":"Remove stale Autoconf checks for Perl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfbw8imk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94740,"url":"https://patchwork.plctlab.org/api/1.2/patches/94740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7mk8hzw.fsf@euler.schwinge.homeip.net/","msgid":"<87o7mk8hzw.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-16T14:32:03","name":"Support parallel testing in libgomp: fallback Perl '\''flock'\'' [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7mk8hzw.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94752,"url":"https://patchwork.plctlab.org/api/1.2/patches/94752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516151609.36619-1-julian@codesourcery.com/","msgid":"<20230516151609.36619-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-05-16T15:16:09","name":"OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516151609.36619-1-julian@codesourcery.com/mbox/"},{"id":94757,"url":"https://patchwork.plctlab.org/api/1.2/patches/94757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153343.56157-1-kito.cheng@sifive.com/","msgid":"<20230516153343.56157-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-16T15:33:43","name":"[committed] RISC-V: Fix wrong select_kind in riscv_compute_multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153343.56157-1-kito.cheng@sifive.com/mbox/"},{"id":94758,"url":"https://patchwork.plctlab.org/api/1.2/patches/94758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153524.3302940-1-pan2.li@intel.com/","msgid":"<20230516153524.3302940-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-16T15:35:24","name":"Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153524.3302940-1-pan2.li@intel.com/mbox/"},{"id":94760,"url":"https://patchwork.plctlab.org/api/1.2/patches/94760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGOjIunxHFQLfzQQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T15:37:06","name":"configure: Implement --enable-host-bind-now","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGOjIunxHFQLfzQQ@redhat.com/mbox/"},{"id":94761,"url":"https://patchwork.plctlab.org/api/1.2/patches/94761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153811.3515353-1-ppalka@redhat.com/","msgid":"<20230516153811.3515353-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-16T15:38:11","name":"c++: desig init in presence of list ctor [PR109871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153811.3515353-1-ppalka@redhat.com/mbox/"},{"id":94846,"url":"https://patchwork.plctlab.org/api/1.2/patches/94846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdb83fad-a824-bbfd-c049-29c0a418dbc8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T17:22:00","name":"[committed] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdb83fad-a824-bbfd-c049-29c0a418dbc8@linux.ibm.com/mbox/"},{"id":94847,"url":"https://patchwork.plctlab.org/api/1.2/patches/94847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173037.1807702-1-jwakely@redhat.com/","msgid":"<20230516173037.1807702-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T17:30:37","name":"libstdc++: Disable embedded tzdata for all 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173037.1807702-1-jwakely@redhat.com/mbox/"},{"id":94849,"url":"https://patchwork.plctlab.org/api/1.2/patches/94849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173156.1826089-1-jwakely@redhat.com/","msgid":"<20230516173156.1826089-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T17:31:56","name":"[committed] libstdc++: Disable cacheline alignment for DJGPP [PR109741]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173156.1826089-1-jwakely@redhat.com/mbox/"},{"id":94869,"url":"https://patchwork.plctlab.org/api/1.2/patches/94869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516191354.155428-1-polacek@redhat.com/","msgid":"<20230516191354.155428-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-16T19:13:54","name":"c++: -Wdangling-reference not suppressed in template [PR109774]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516191354.155428-1-polacek@redhat.com/mbox/"},{"id":94871,"url":"https://patchwork.plctlab.org/api/1.2/patches/94871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGPa0mUUzxt2bO6d@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-16T19:34:42","name":"c++: Don'\''t try to initialize zero width bitfields in zero initialization [PR109868]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGPa0mUUzxt2bO6d@tucnak/mbox/"},{"id":94984,"url":"https://patchwork.plctlab.org/api/1.2/patches/94984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a64ef3fd-79cc-5a27-309f-6117c16f61fa@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T23:46:47","name":"[committed] c: Remove restrictions on declarations in '\''for'\'' loops for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a64ef3fd-79cc-5a27-309f-6117c16f61fa@codesourcery.com/mbox/"},{"id":94993,"url":"https://patchwork.plctlab.org/api/1.2/patches/94993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517005256.1718424-1-apinski@marvell.com/","msgid":"<20230517005256.1718424-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-17T00:52:56","name":"Fix PR 106900: array-bounds warning inside simplify_builtin_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517005256.1718424-1-apinski@marvell.com/mbox/"},{"id":94998,"url":"https://patchwork.plctlab.org/api/1.2/patches/94998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517015143.4023434-1-juzhe.zhong@rivai.ai/","msgid":"<20230517015143.4023434-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T01:51:43","name":"RISC-V: Add rounding mode enum for fixed-point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517015143.4023434-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95057,"url":"https://patchwork.plctlab.org/api/1.2/patches/95057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517052521.405836-1-juzhe.zhong@rivai.ai/","msgid":"<20230517052521.405836-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T05:25:21","name":"RISC-V: Introduce rounding mode operand into fixed-point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517052521.405836-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95060,"url":"https://patchwork.plctlab.org/api/1.2/patches/95060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f026396c-59b8-36ae-2332-e2ece6db2e3b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T06:05:53","name":"vect: Don'\''t retry if the previous analysis fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f026396c-59b8-36ae-2332-e2ece6db2e3b@linux.ibm.com/mbox/"},{"id":95061,"url":"https://patchwork.plctlab.org/api/1.2/patches/95061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com/","msgid":"<72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:09:28","name":"[1/2] vect: Refactor code for index == count in vect_transform_slp_perm_load_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com/mbox/"},{"id":95063,"url":"https://patchwork.plctlab.org/api/1.2/patches/95063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517061050.3778864-1-guojiufu@linux.ibm.com/","msgid":"<20230517061050.3778864-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:10:50","name":"Optimized \"(X - N * M) / N + M\" to \"X / N\" if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517061050.3778864-1-guojiufu@linux.ibm.com/mbox/"},{"id":95064,"url":"https://patchwork.plctlab.org/api/1.2/patches/95064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com/","msgid":"<71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:15:00","name":"[2/2] vect: Enhance cost evaluation in vect_transform_slp_perm_load_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com/mbox/"},{"id":95073,"url":"https://patchwork.plctlab.org/api/1.2/patches/95073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517065702.2935000-1-hongtao.liu@intel.com/","msgid":"<20230517065702.2935000-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-17T06:57:02","name":"Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517065702.2935000-1-hongtao.liu@intel.com/mbox/"},{"id":95097,"url":"https://patchwork.plctlab.org/api/1.2/patches/95097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517081420.1074223-1-pan2.li@intel.com/","msgid":"<20230517081420.1074223-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-17T08:14:20","name":"RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool[2-64]_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517081420.1074223-1-pan2.li@intel.com/mbox/"},{"id":95098,"url":"https://patchwork.plctlab.org/api/1.2/patches/95098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGSOCJBujabM5gNh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T08:19:20","name":"[committed] wide-int: Fix up function comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGSOCJBujabM5gNh@tucnak/mbox/"},{"id":95105,"url":"https://patchwork.plctlab.org/api/1.2/patches/95105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090315.795-1-jinma@linux.alibaba.com/","msgid":"<20230517090315.795-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-17T09:03:15","name":"Fix type error of '\''switch (SUBREG_BYTE (op)).'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090315.795-1-jinma@linux.alibaba.com/mbox/"},{"id":95108,"url":"https://patchwork.plctlab.org/api/1.2/patches/95108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090803.813-1-jinma@linux.alibaba.com/","msgid":"<20230517090803.813-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-17T09:08:03","name":"RISC-V: Remove trailing spaces on lines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090803.813-1-jinma@linux.alibaba.com/mbox/"},{"id":95122,"url":"https://patchwork.plctlab.org/api/1.2/patches/95122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517092238.imdawv4fkhu466bf@debian/","msgid":"<20230517092238.imdawv4fkhu466bf@debian>","list_archive_url":null,"date":"2023-05-17T09:22:38","name":"[13-backport] riscv/linux: Don'\''t add -latomic with -pthread","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517092238.imdawv4fkhu466bf@debian/mbox/"},{"id":95135,"url":"https://patchwork.plctlab.org/api/1.2/patches/95135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517095818.1285188-1-juzhe.zhong@rivai.ai/","msgid":"<20230517095818.1285188-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T09:58:18","name":"RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517095818.1285188-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95192,"url":"https://patchwork.plctlab.org/api/1.2/patches/95192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com/","msgid":"<80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com>","list_archive_url":null,"date":"2023-05-17T11:31:08","name":"[committed] Re: [Patch,v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com/mbox/"},{"id":95226,"url":"https://patchwork.plctlab.org/api/1.2/patches/95226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517130222.2534562-1-lili.cui@intel.com/","msgid":"<20230517130222.2534562-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-17T13:02:22","name":"PR gcc/98350:Handle FMA friendly in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517130222.2534562-1-lili.cui@intel.com/mbox/"},{"id":95276,"url":"https://patchwork.plctlab.org/api/1.2/patches/95276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-1-aldyh@redhat.com/","msgid":"<20230517141020.464106-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:10:19","name":"[COMMITTED] Provide support for copying unsupported ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-1-aldyh@redhat.com/mbox/"},{"id":95277,"url":"https://patchwork.plctlab.org/api/1.2/patches/95277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-2-aldyh@redhat.com/","msgid":"<20230517141020.464106-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:10:20","name":"[COMMITTED] Add Value_Range::operator=.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-2-aldyh@redhat.com/mbox/"},{"id":95279,"url":"https://patchwork.plctlab.org/api/1.2/patches/95279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141622.464538-1-aldyh@redhat.com/","msgid":"<20230517141622.464538-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:16:22","name":"Provide an API for ipa_vr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141622.464538-1-aldyh@redhat.com/mbox/"},{"id":95282,"url":"https://patchwork.plctlab.org/api/1.2/patches/95282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517143030.465081-1-aldyh@redhat.com/","msgid":"<20230517143030.465081-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:30:31","name":"Convert ipcp_vr_lattice to type agnostic framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517143030.465081-1-aldyh@redhat.com/mbox/"},{"id":95396,"url":"https://patchwork.plctlab.org/api/1.2/patches/95396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNJHHe4Q52N93X9Y5OkGb-1pMpqvX2ZpgFanW9hnueiYQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T16:02:31","name":"[v2] RISC-V: Remove masking third operand of rotate instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNJHHe4Q52N93X9Y5OkGb-1pMpqvX2ZpgFanW9hnueiYQ@mail.gmail.com/mbox/"},{"id":95468,"url":"https://patchwork.plctlab.org/api/1.2/patches/95468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUYH+SgUWanqPVA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:08:31","name":"i386: Fix up types in __builtin_{inf,huge_val,nan{,s},fabs,copysign}q builtins [PR109884]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUYH+SgUWanqPVA@tucnak/mbox/"},{"id":95469,"url":"https://patchwork.plctlab.org/api/1.2/patches/95469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUaWQkrIkrtlbPa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:18:01","name":"libstdc++: Fix up some templates [PR109883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUaWQkrIkrtlbPa@tucnak/mbox/"},{"id":95478,"url":"https://patchwork.plctlab.org/api/1.2/patches/95478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y37a95TGsZtHtCZtNXiecqGJ-22AvB+=AxK_Tfh+AaAg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:29:19","name":"[COMMITTED] i386: Adjust emulated integer vector mode multiplication costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y37a95TGsZtHtCZtNXiecqGJ-22AvB+=AxK_Tfh+AaAg@mail.gmail.com/mbox/"},{"id":95486,"url":"https://patchwork.plctlab.org/api/1.2/patches/95486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517184352.32144-1-amonakov@ispras.ru/","msgid":"<20230517184352.32144-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-17T18:43:52","name":"[committed] tree-ssa-math-opts: correct -ffp-contract= check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517184352.32144-1-amonakov@ispras.ru/mbox/"},{"id":95490,"url":"https://patchwork.plctlab.org/api/1.2/patches/95490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f62baae8-2c7b-45b2-9cd9-da495125cc90-1684349530775@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:52:10","name":"Fortran: set shape of initializers of zero-sized arrays [PR95374,PR104352]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f62baae8-2c7b-45b2-9cd9-da495125cc90-1684349530775@3c-app-gmx-bap55/mbox/"},{"id":95495,"url":"https://patchwork.plctlab.org/api/1.2/patches/95495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190552.2023422-1-jwakely@redhat.com/","msgid":"<20230517190552.2023422-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:05:52","name":"[committed] libstdc++: Implement LWG 3877 for std::expected monadic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190552.2023422-1-jwakely@redhat.com/mbox/"},{"id":95497,"url":"https://patchwork.plctlab.org/api/1.2/patches/95497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190607.2023676-1-jwakely@redhat.com/","msgid":"<20230517190607.2023676-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:06:07","name":"[committed] libstdc++: Add system_header pragma to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190607.2023676-1-jwakely@redhat.com/mbox/"},{"id":95498,"url":"https://patchwork.plctlab.org/api/1.2/patches/95498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190715.2024283-1-jwakely@redhat.com/","msgid":"<20230517190715.2024283-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:07:15","name":"[committed] libstdc++: Uncomment checks for enumeration types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190715.2024283-1-jwakely@redhat.com/mbox/"},{"id":95534,"url":"https://patchwork.plctlab.org/api/1.2/patches/95534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517202646.3793039-1-arsen@aarsen.me/","msgid":"<20230517202646.3793039-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-05-17T20:26:46","name":"[pushed] doc: Fix a pinch of typos in extend.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517202646.3793039-1-arsen@aarsen.me/mbox/"},{"id":95546,"url":"https://patchwork.plctlab.org/api/1.2/patches/95546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGU7kyENloNHj6vd@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-05-17T20:39:47","name":"[committed] hppa: Add clear_cache expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGU7kyENloNHj6vd@mx3210.localdomain/mbox/"},{"id":95594,"url":"https://patchwork.plctlab.org/api/1.2/patches/95594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c8e37e-0748-5333-002a-026348b19627@acm.org/","msgid":"<17c8e37e-0748-5333-002a-026348b19627@acm.org>","list_archive_url":null,"date":"2023-05-17T23:38:33","name":"Allow plugin-specific dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c8e37e-0748-5333-002a-026348b19627@acm.org/mbox/"},{"id":95596,"url":"https://patchwork.plctlab.org/api/1.2/patches/95596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca6c3b-79e-2ee2-d815-f58cc7e7b197@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T00:08:44","name":"[committed] c: Handle printf %B like %b for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca6c3b-79e-2ee2-d815-f58cc7e7b197@codesourcery.com/mbox/"},{"id":95633,"url":"https://patchwork.plctlab.org/api/1.2/patches/95633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518031725.3164716-1-pan2.li@intel.com/","msgid":"<20230518031725.3164716-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T03:17:25","name":"RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518031725.3164716-1-pan2.li@intel.com/mbox/"},{"id":95670,"url":"https://patchwork.plctlab.org/api/1.2/patches/95670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063209.3270504-1-pan2.li@intel.com/","msgid":"<20230518063209.3270504-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T06:32:09","name":"RISC-V: Support RVV VREINTERPRET from vbool*_t to vuint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063209.3270504-1-pan2.li@intel.com/mbox/"},{"id":95671,"url":"https://patchwork.plctlab.org/api/1.2/patches/95671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063652.3273735-1-pan2.li@intel.com/","msgid":"<20230518063652.3273735-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T06:36:52","name":"[v2] RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063652.3273735-1-pan2.li@intel.com/mbox/"},{"id":95677,"url":"https://patchwork.plctlab.org/api/1.2/patches/95677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acdb8e2b-7c95-0fd2-2189-51f661f15bc5@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T07:14:28","name":"[v1] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acdb8e2b-7c95-0fd2-2189-51f661f15bc5@linux.ibm.com/mbox/"},{"id":95707,"url":"https://patchwork.plctlab.org/api/1.2/patches/95707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com/","msgid":"<20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com>","list_archive_url":null,"date":"2023-05-18T08:39:09","name":"[1/4] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com/mbox/"},{"id":95732,"url":"https://patchwork.plctlab.org/api/1.2/patches/95732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4801877.GXAFRqVoOG@fomalhaut/","msgid":"<4801877.GXAFRqVoOG@fomalhaut>","list_archive_url":null,"date":"2023-05-18T09:28:51","name":"Fix internal error on small array with negative lower bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4801877.GXAFRqVoOG@fomalhaut/mbox/"},{"id":95772,"url":"https://patchwork.plctlab.org/api/1.2/patches/95772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-1-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-1-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:21","name":"[committed,gcc12,backport] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-1-stam.markianos-wright@arm.com/mbox/"},{"id":95760,"url":"https://patchwork.plctlab.org/api/1.2/patches/95760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-2-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-2-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:22","name":"[committed,gcc12,backport] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-2-stam.markianos-wright@arm.com/mbox/"},{"id":95763,"url":"https://patchwork.plctlab.org/api/1.2/patches/95763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-4-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-4-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:24","name":"[committed,gcc12,backport] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-4-stam.markianos-wright@arm.com/mbox/"},{"id":95761,"url":"https://patchwork.plctlab.org/api/1.2/patches/95761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-5-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-5-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:25","name":"[committed,gcc12,backport] arm: Add vorrq_n overloading into vorrq _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-5-stam.markianos-wright@arm.com/mbox/"},{"id":95773,"url":"https://patchwork.plctlab.org/api/1.2/patches/95773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-6-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-6-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:26","name":"[committed,gcc12,backport] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-6-stam.markianos-wright@arm.com/mbox/"},{"id":95768,"url":"https://patchwork.plctlab.org/api/1.2/patches/95768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-8-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-8-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:28","name":"[committed,gcc12,backport] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-8-stam.markianos-wright@arm.com/mbox/"},{"id":95766,"url":"https://patchwork.plctlab.org/api/1.2/patches/95766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-9-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-9-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:29","name":"[committed,gcc12,backport] arm testsuite: XFAIL or relax registers in some tests [PR109697]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-9-stam.markianos-wright@arm.com/mbox/"},{"id":95767,"url":"https://patchwork.plctlab.org/api/1.2/patches/95767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-10-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-10-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:30","name":"[committed,gcc12,backport] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-10-stam.markianos-wright@arm.com/mbox/"},{"id":95762,"url":"https://patchwork.plctlab.org/api/1.2/patches/95762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-11-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-11-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:31","name":"[committed,gcc12,backport,arm] complete vmsr/vmrs blank and case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-11-stam.markianos-wright@arm.com/mbox/"},{"id":95781,"url":"https://patchwork.plctlab.org/api/1.2/patches/95781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-1-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-1-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:07","name":"[commited,trunk,1/9] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-1-stam.markianos-wright@arm.com/mbox/"},{"id":95778,"url":"https://patchwork.plctlab.org/api/1.2/patches/95778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-2-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-2-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:08","name":"[commited,trunk,2/9] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-2-stam.markianos-wright@arm.com/mbox/"},{"id":95776,"url":"https://patchwork.plctlab.org/api/1.2/patches/95776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-4-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-4-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:10","name":"[commited,trunk,4/9] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-4-stam.markianos-wright@arm.com/mbox/"},{"id":95775,"url":"https://patchwork.plctlab.org/api/1.2/patches/95775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-5-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-5-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:11","name":"[commited,trunk,5/9] arm: Fix overloading of MVE scalar constant parameters on vbicq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-5-stam.markianos-wright@arm.com/mbox/"},{"id":95779,"url":"https://patchwork.plctlab.org/api/1.2/patches/95779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-6-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-6-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:12","name":"[commited,trunk,6/9] arm: Fix MVE header pointer overloads this time (and a bit more tidying)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-6-stam.markianos-wright@arm.com/mbox/"},{"id":95782,"url":"https://patchwork.plctlab.org/api/1.2/patches/95782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-7-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-7-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:13","name":"[commited,trunk,7/9] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-7-stam.markianos-wright@arm.com/mbox/"},{"id":95777,"url":"https://patchwork.plctlab.org/api/1.2/patches/95777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-8-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-8-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:14","name":"[commited,trunk,8/9] arm testsuite: XFAIL or relax registers in some tests [PR109697]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-8-stam.markianos-wright@arm.com/mbox/"},{"id":95780,"url":"https://patchwork.plctlab.org/api/1.2/patches/95780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-9-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-9-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:15","name":"[commited,trunk,9/9] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-9-stam.markianos-wright@arm.com/mbox/"},{"id":95792,"url":"https://patchwork.plctlab.org/api/1.2/patches/95792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com/","msgid":"<58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com>","list_archive_url":null,"date":"2023-05-18T11:16:04","name":"rs6000: Update powerpc test fold-vec-extract-int.p8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com/mbox/"},{"id":95852,"url":"https://patchwork.plctlab.org/api/1.2/patches/95852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at/","msgid":"<4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-18T12:46:34","name":"[PING,C] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at/mbox/"},{"id":95855,"url":"https://patchwork.plctlab.org/api/1.2/patches/95855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-2-jwakely@redhat.com/","msgid":"<20230518125647.2105203-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:45","name":"[1/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-2-jwakely@redhat.com/mbox/"},{"id":95854,"url":"https://patchwork.plctlab.org/api/1.2/patches/95854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-3-jwakely@redhat.com/","msgid":"<20230518125647.2105203-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:46","name":"[2/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-3-jwakely@redhat.com/mbox/"},{"id":95856,"url":"https://patchwork.plctlab.org/api/1.2/patches/95856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-4-jwakely@redhat.com/","msgid":"<20230518125647.2105203-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:47","name":"[3/3] contrib: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-4-jwakely@redhat.com/mbox/"},{"id":95858,"url":"https://patchwork.plctlab.org/api/1.2/patches/95858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518130358.2106172-1-jwakely@redhat.com/","msgid":"<20230518130358.2106172-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T13:03:58","name":"[v2,2/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518130358.2106172-1-jwakely@redhat.com/mbox/"},{"id":95994,"url":"https://patchwork.plctlab.org/api/1.2/patches/95994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5739d25-396c-d0d8-d10d-f23defe81fed@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-18T16:41:10","name":"[avr,committed] Fix a trivial typo in gen-avr-mmcu-specs.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5739d25-396c-d0d8-d10d-f23defe81fed@gjlay.de/mbox/"},{"id":96016,"url":"https://patchwork.plctlab.org/api/1.2/patches/96016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518175927.4158045-1-ppalka@redhat.com/","msgid":"<20230518175927.4158045-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-18T17:59:27","name":"c++: scoped variable template-id of reference type [PR97340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518175927.4158045-1-ppalka@redhat.com/mbox/"},{"id":96017,"url":"https://patchwork.plctlab.org/api/1.2/patches/96017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518180114.4158415-1-ppalka@redhat.com/","msgid":"<20230518180114.4158415-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-18T18:01:14","name":"c++: simplify norm_cache manipulation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518180114.4158415-1-ppalka@redhat.com/mbox/"},{"id":96022,"url":"https://patchwork.plctlab.org/api/1.2/patches/96022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yq+s2JkNrazY-H1bANSTFW10+kJ81z8wefUrAPeN+Szg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T18:50:25","name":"[COMMITTED] i386: Add infrastructure for QImode partial vector mult and shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yq+s2JkNrazY-H1bANSTFW10+kJ81z8wefUrAPeN+Szg@mail.gmail.com/mbox/"},{"id":96046,"url":"https://patchwork.plctlab.org/api/1.2/patches/96046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518205716.3258223-1-vineetg@rivosinc.com/","msgid":"<20230518205716.3258223-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-18T20:57:16","name":"RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518205716.3258223-1-vineetg@rivosinc.com/mbox/"},{"id":96048,"url":"https://patchwork.plctlab.org/api/1.2/patches/96048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518210331.11564-1-amonakov@ispras.ru/","msgid":"<20230518210331.11564-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-18T21:03:31","name":"c-family: implement -ffp-contract=on","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518210331.11564-1-amonakov@ispras.ru/mbox/"},{"id":96049,"url":"https://patchwork.plctlab.org/api/1.2/patches/96049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b897a2be3bfc7ef730091f66f1102104aab1924b.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T21:12:51","name":"[v2] rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b897a2be3bfc7ef730091f66f1102104aab1924b.camel@us.ibm.com/mbox/"},{"id":96101,"url":"https://patchwork.plctlab.org/api/1.2/patches/96101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGa1mbB+/HinAW2o@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T23:32:41","name":"[v2] configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGa1mbB+/HinAW2o@redhat.com/mbox/"},{"id":96140,"url":"https://patchwork.plctlab.org/api/1.2/patches/96140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com/","msgid":"<37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com>","list_archive_url":null,"date":"2023-05-19T00:42:54","name":"[committed] c: Do not allow thread-local tentative definitions for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com/mbox/"},{"id":96165,"url":"https://patchwork.plctlab.org/api/1.2/patches/96165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-1-apinski@marvell.com/","msgid":"<20230519021410.1841811-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T02:14:09","name":"[1/2] Improve do_store_flag for single bit comparison against 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-1-apinski@marvell.com/mbox/"},{"id":96166,"url":"https://patchwork.plctlab.org/api/1.2/patches/96166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-2-apinski@marvell.com/","msgid":"<20230519021410.1841811-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T02:14:10","name":"[2/2] Improve do_store_flag for comparing single bit against that bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-2-apinski@marvell.com/mbox/"},{"id":96175,"url":"https://patchwork.plctlab.org/api/1.2/patches/96175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519034823.653-1-shihua@iscas.ac.cn/","msgid":"<20230519034823.653-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-05-19T03:48:23","name":"[RFC,V2] RISC-V : Support rv64 ilp32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519034823.653-1-shihua@iscas.ac.cn/mbox/"},{"id":96203,"url":"https://patchwork.plctlab.org/api/1.2/patches/96203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519061152.3154332-1-yunqiang.su@cipunited.com/","msgid":"<20230519061152.3154332-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-19T06:11:52","name":"MIPS: don'\''t expand large block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519061152.3154332-1-yunqiang.su@cipunited.com/mbox/"},{"id":96212,"url":"https://patchwork.plctlab.org/api/1.2/patches/96212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com/","msgid":"<4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com>","list_archive_url":null,"date":"2023-05-19T07:40:24","name":"[v1] rs6000: Update powerpc test fold-vec-extract-int.p8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com/mbox/"},{"id":96220,"url":"https://patchwork.plctlab.org/api/1.2/patches/96220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519074209.307764-1-jie.mei@oss.cipunited.com/","msgid":"<20230519074209.307764-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-19T07:44:06","name":"MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519074209.307764-1-jie.mei@oss.cipunited.com/mbox/"},{"id":96232,"url":"https://patchwork.plctlab.org/api/1.2/patches/96232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcsc76Md1sN0D9i@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T07:59:47","name":"tree-ssa-math-opts: Pattern recognize hand written __builtin_mul_overflow_p with same unsigned types even when target just has highpart umul [PR101856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcsc76Md1sN0D9i@tucnak/mbox/"},{"id":96251,"url":"https://patchwork.plctlab.org/api/1.2/patches/96251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGct7KUwpvHp78FB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T08:06:04","name":"tree-ssa-math-opts: Pattern recognize some further hand written forms of signed __builtin_mul_overflow{,_p} [PR105776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGct7KUwpvHp78FB@tucnak/mbox/"},{"id":96252,"url":"https://patchwork.plctlab.org/api/1.2/patches/96252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080631.309062-1-jie.mei@oss.cipunited.com/","msgid":"<20230519080631.309062-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-19T08:07:03","name":"[v2] MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080631.309062-1-jie.mei@oss.cipunited.com/mbox/"},{"id":96253,"url":"https://patchwork.plctlab.org/api/1.2/patches/96253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080829.4ADE033E93@hamza.pair.com/","msgid":"<20230519080829.4ADE033E93@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T08:08:28","name":"[pushed] wwwdocs: onlinedocs/13.1.0: Remove last trace of XHTML","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080829.4ADE033E93@hamza.pair.com/mbox/"},{"id":96254,"url":"https://patchwork.plctlab.org/api/1.2/patches/96254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081130.34977-1-iain@sandoe.co.uk/","msgid":"<20230519081130.34977-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-05-19T08:11:30","name":"[pushed] Darwin, libgcc : Adjust min version supported for the OS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081130.34977-1-iain@sandoe.co.uk/mbox/"},{"id":96256,"url":"https://patchwork.plctlab.org/api/1.2/patches/96256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081505.DA15D33E93@hamza.pair.com/","msgid":"<20230519081505.DA15D33E93@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T08:15:05","name":"[pushed] libstdc++: Move lafstern.org reference to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081505.DA15D33E93@hamza.pair.com/mbox/"},{"id":96260,"url":"https://patchwork.plctlab.org/api/1.2/patches/96260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcwyQG4dEaGPArd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T08:18:17","name":"[committed] libgomp: Fix up -static -fopenmp linking [PR109904]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcwyQG4dEaGPArd@tucnak/mbox/"},{"id":96332,"url":"https://patchwork.plctlab.org/api/1.2/patches/96332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com/","msgid":"<97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com>","list_archive_url":null,"date":"2023-05-19T09:43:41","name":"[v2] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com/mbox/"},{"id":96377,"url":"https://patchwork.plctlab.org/api/1.2/patches/96377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com/","msgid":"<77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:07:03","name":"RISC-V: Allow more loading of const vectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com/mbox/"},{"id":96379,"url":"https://patchwork.plctlab.org/api/1.2/patches/96379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com/","msgid":"<6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:10:25","name":"RISC-V: testsuite: Remove empty *-run-template.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com/mbox/"},{"id":96392,"url":"https://patchwork.plctlab.org/api/1.2/patches/96392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com/","msgid":"<0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:32:24","name":"RISC-V: Implement autovec abs, vneg, vnot.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com/mbox/"},{"id":96394,"url":"https://patchwork.plctlab.org/api/1.2/patches/96394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab760102a39e56340c68cba76a79fea70f7cc0f4.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-19T11:50:10","name":"[C,v2] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab760102a39e56340c68cba76a79fea70f7cc0f4.camel@tugraz.at/mbox/"},{"id":96440,"url":"https://patchwork.plctlab.org/api/1.2/patches/96440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519140206.1369B33E6E@hamza.pair.com/","msgid":"<20230519140206.1369B33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T14:01:59","name":"[pushed] wwwdocs: preprocess: Check whether input files exist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519140206.1369B33E6E@hamza.pair.com/mbox/"},{"id":96472,"url":"https://patchwork.plctlab.org/api/1.2/patches/96472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519144848.1873152-1-apinski@marvell.com/","msgid":"<20230519144848.1873152-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T14:48:48","name":"Fix driver/33980: Precompiled header file not removed on error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519144848.1873152-1-apinski@marvell.com/mbox/"},{"id":96532,"url":"https://patchwork.plctlab.org/api/1.2/patches/96532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com/","msgid":"<212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com>","list_archive_url":null,"date":"2023-05-19T17:18:22","name":"libgomp: Honor OpenMP'\''s nteams-var ICV as upper limit on num teams [PR109875]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com/mbox/"},{"id":96575,"url":"https://patchwork.plctlab.org/api/1.2/patches/96575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519183851.760404-1-ppalka@redhat.com/","msgid":"<20230519183851.760404-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-19T18:38:50","name":"c++: mangle noexcept-expr [PR70790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519183851.760404-1-ppalka@redhat.com/mbox/"},{"id":96577,"url":"https://patchwork.plctlab.org/api/1.2/patches/96577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed49c4e3-5598-9fee-66cb-a978af77da3f@in.tum.de/","msgid":"","list_archive_url":null,"date":"2023-05-19T18:50:33","name":"[v2] release the sorted FDE array when deregistering a frame [PR109685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed49c4e3-5598-9fee-66cb-a978af77da3f@in.tum.de/mbox/"},{"id":96580,"url":"https://patchwork.plctlab.org/api/1.2/patches/96580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGfGVAPg5HwFLSYE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-19T18:56:20","name":"[v3] configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGfGVAPg5HwFLSYE@redhat.com/mbox/"},{"id":96622,"url":"https://patchwork.plctlab.org/api/1.2/patches/96622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f44ec2bb791d05c69636b8d881d74edb4b57234f.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-19T20:38:09","name":"[C] Remove dead code related to type compatibility across TUs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f44ec2bb791d05c69636b8d881d74edb4b57234f.camel@tugraz.at/mbox/"},{"id":96623,"url":"https://patchwork.plctlab.org/api/1.2/patches/96623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-2-qing.zhao@oracle.com/","msgid":"<20230519204948.237791-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-19T20:49:47","name":"[V7,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-2-qing.zhao@oracle.com/mbox/"},{"id":96629,"url":"https://patchwork.plctlab.org/api/1.2/patches/96629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-3-qing.zhao@oracle.com/","msgid":"<20230519204948.237791-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-19T20:49:48","name":"[V7,2/2] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-3-qing.zhao@oracle.com/mbox/"},{"id":96674,"url":"https://patchwork.plctlab.org/api/1.2/patches/96674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519235618.4078456-1-pan2.li@intel.com/","msgid":"<20230519235618.4078456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-19T23:56:18","name":"Mode-Switching: Fix local array maybe uninitialized warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519235618.4078456-1-pan2.li@intel.com/mbox/"},{"id":96711,"url":"https://patchwork.plctlab.org/api/1.2/patches/96711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-2-apinski@marvell.com/","msgid":"<20230520021451.1901275-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:45","name":"[1/7] Move fold_single_bit_test to expr.cc from fold-const.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-2-apinski@marvell.com/mbox/"},{"id":96710,"url":"https://patchwork.plctlab.org/api/1.2/patches/96710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-3-apinski@marvell.com/","msgid":"<20230520021451.1901275-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:46","name":"[2/7] Inline and simplify fold_single_bit_test_into_sign_test into fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-3-apinski@marvell.com/mbox/"},{"id":96712,"url":"https://patchwork.plctlab.org/api/1.2/patches/96712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-4-apinski@marvell.com/","msgid":"<20230520021451.1901275-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:47","name":"[3/7] Use get_def_for_expr in fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-4-apinski@marvell.com/mbox/"},{"id":96715,"url":"https://patchwork.plctlab.org/api/1.2/patches/96715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-5-apinski@marvell.com/","msgid":"<20230520021451.1901275-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:48","name":"[4/7] Simplify fold_single_bit_test slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-5-apinski@marvell.com/mbox/"},{"id":96716,"url":"https://patchwork.plctlab.org/api/1.2/patches/96716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-6-apinski@marvell.com/","msgid":"<20230520021451.1901275-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:49","name":"[5/7] Simplify fold_single_bit_test with respect to code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-6-apinski@marvell.com/mbox/"},{"id":96713,"url":"https://patchwork.plctlab.org/api/1.2/patches/96713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-7-apinski@marvell.com/","msgid":"<20230520021451.1901275-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:50","name":"[6/7] Use BIT_FIELD_REF inside fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-7-apinski@marvell.com/mbox/"},{"id":96714,"url":"https://patchwork.plctlab.org/api/1.2/patches/96714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-8-apinski@marvell.com/","msgid":"<20230520021451.1901275-8-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:51","name":"[7/7] Expand directly for single bit test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-8-apinski@marvell.com/mbox/"},{"id":96723,"url":"https://patchwork.plctlab.org/api/1.2/patches/96723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520045447.3276232-1-juzhe.zhong@rivai.ai/","msgid":"<20230520045447.3276232-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-20T04:54:47","name":"RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520045447.3276232-1-juzhe.zhong@rivai.ai/mbox/"},{"id":96799,"url":"https://patchwork.plctlab.org/api/1.2/patches/96799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-1-apinski@marvell.com/","msgid":"<20230520150406.1932767-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T15:04:05","name":"[PATCHv2,1/2] Improve do_store_flag for single bit comparison against 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-1-apinski@marvell.com/mbox/"},{"id":96800,"url":"https://patchwork.plctlab.org/api/1.2/patches/96800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-2-apinski@marvell.com/","msgid":"<20230520150406.1932767-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T15:04:06","name":"[PATCHv2,2/2] Improve do_store_flag for comparing single bit against that bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-2-apinski@marvell.com/mbox/"},{"id":96818,"url":"https://patchwork.plctlab.org/api/1.2/patches/96818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGkued2UMF5mMQGD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-20T20:32:57","name":"match.pd: Ensure (op CONSTANT_CLASS_P CONSTANT_CLASS_P) is simplified [PR109505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGkued2UMF5mMQGD@tucnak/mbox/"},{"id":96822,"url":"https://patchwork.plctlab.org/api/1.2/patches/96822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520223748.0AF9C33E83@hamza.pair.com/","msgid":"<20230520223748.0AF9C33E83@hamza.pair.com>","list_archive_url":null,"date":"2023-05-20T22:37:44","name":"[pushed,1/N] install.texi: Remove alpha*-*-* section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520223748.0AF9C33E83@hamza.pair.com/mbox/"},{"id":96825,"url":"https://patchwork.plctlab.org/api/1.2/patches/96825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521010949.1957550-1-apinski@marvell.com/","msgid":"<20230521010949.1957550-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T01:09:49","name":"Fix PR 109919: ICE in emit_move_insn with some bit tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521010949.1957550-1-apinski@marvell.com/mbox/"},{"id":96829,"url":"https://patchwork.plctlab.org/api/1.2/patches/96829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521040459.1964837-1-apinski@marvell.com/","msgid":"<20230521040459.1964837-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T04:04:59","name":"Fix expand_single_bit_test for big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521040459.1964837-1-apinski@marvell.com/mbox/"},{"id":96828,"url":"https://patchwork.plctlab.org/api/1.2/patches/96828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521045007.1966279-1-apinski@marvell.com/","msgid":"<20230521045007.1966279-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T04:50:07","name":"Fix expand_single_bit_test for big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521045007.1966279-1-apinski@marvell.com/mbox/"},{"id":96891,"url":"https://patchwork.plctlab.org/api/1.2/patches/96891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a97f093f-f7d0-49f9-82dc-f65b90bdfc87@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-21T17:12:16","name":"[avr,committed] Fix PR90622","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a97f093f-f7d0-49f9-82dc-f65b90bdfc87@gjlay.de/mbox/"},{"id":96897,"url":"https://patchwork.plctlab.org/api/1.2/patches/96897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521184228.C70D533E87@hamza.pair.com/","msgid":"<20230521184228.C70D533E87@hamza.pair.com>","list_archive_url":null,"date":"2023-05-21T18:42:25","name":"[pushed] wwwdocs: readings: Adjust link to Arm architectures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521184228.C70D533E87@hamza.pair.com/mbox/"},{"id":96903,"url":"https://patchwork.plctlab.org/api/1.2/patches/96903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f90ea4af-3d2d-4a0c-8444-480ac3e3639f-1684702102536@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-05-21T20:48:22","name":"Fortran: checking and simplification of RESHAPE intrinsic [PR103794]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f90ea4af-3d2d-4a0c-8444-480ac3e3639f-1684702102536@3c-app-gmx-bap32/mbox/"},{"id":96960,"url":"https://patchwork.plctlab.org/api/1.2/patches/96960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522020804.192222-1-juzhe.zhong@rivai.ai/","msgid":"<20230522020804.192222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T02:08:04","name":"[V12] VECT: Fix issue of multiple-rgroup for length is counting elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522020804.192222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97060,"url":"https://patchwork.plctlab.org/api/1.2/patches/97060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522064138.74056-1-kito.cheng@sifive.com/","msgid":"<20230522064138.74056-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-22T06:41:39","name":"RISC-V: Add missing torture-init and torture-finish for rvv.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522064138.74056-1-kito.cheng@sifive.com/mbox/"},{"id":97096,"url":"https://patchwork.plctlab.org/api/1.2/patches/97096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea701092-71a1-7c4b-3070-376f9421252c@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-05-22T07:03:51","name":"[1/2] xtensa: Optimize '\''(x & CST1_POW2) != 0 ? CST2_POW2 : 0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea701092-71a1-7c4b-3070-376f9421252c@yahoo.co.jp/mbox/"},{"id":97095,"url":"https://patchwork.plctlab.org/api/1.2/patches/97095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp/","msgid":"<8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-22T07:04:37","name":"[2/2] xtensa: Merge '\''*addx'\'' and '\''*subx'\'' insn patterns into one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp/mbox/"},{"id":97112,"url":"https://patchwork.plctlab.org/api/1.2/patches/97112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522072002.1248114-1-juzhe.zhong@rivai.ai/","msgid":"<20230522072002.1248114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T07:20:02","name":"RISC-V: Reorganize the code of CONST_VECTOR handling in riscv.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522072002.1248114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97123,"url":"https://patchwork.plctlab.org/api/1.2/patches/97123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522073547.591554-1-hongtao.liu@intel.com/","msgid":"<20230522073547.591554-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-22T07:35:47","name":"Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522073547.591554-1-hongtao.liu@intel.com/mbox/"},{"id":97169,"url":"https://patchwork.plctlab.org/api/1.2/patches/97169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13270277.uLZWGnKmhe@fomalhaut/","msgid":"<13270277.uLZWGnKmhe@fomalhaut>","list_archive_url":null,"date":"2023-05-22T08:08:10","name":"Fix handling of non-integral bit-fields in native_encode_initializer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13270277.uLZWGnKmhe@fomalhaut/mbox/"},{"id":97171,"url":"https://patchwork.plctlab.org/api/1.2/patches/97171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522081101.1570598-1-juzhe.zhong@rivai.ai/","msgid":"<20230522081101.1570598-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T08:11:01","name":"[V13] VECT: Fix bug of multiple-rgroup for length is counting elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522081101.1570598-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97170,"url":"https://patchwork.plctlab.org/api/1.2/patches/97170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e51c4217-d35c-41bc-2912-42627f83b280@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T08:11:02","name":"[wwwdocs,committed] git.html: Move OG12 to OG13, briefly mention old branches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e51c4217-d35c-41bc-2912-42627f83b280@codesourcery.com/mbox/"},{"id":97174,"url":"https://patchwork.plctlab.org/api/1.2/patches/97174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522083814.1647787-1-juzhe.zhong@rivai.ai/","msgid":"<20230522083814.1647787-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T08:38:14","name":"[V12] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522083814.1647787-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97177,"url":"https://patchwork.plctlab.org/api/1.2/patches/97177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084906.1725082-1-poulhies@adacore.com/","msgid":"<20230522084906.1725082-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:06","name":"[COMMITTED] ada: prevent infinite recursion in Collect_Types_In_Hierarchy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084906.1725082-1-poulhies@adacore.com/mbox/"},{"id":97178,"url":"https://patchwork.plctlab.org/api/1.2/patches/97178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084914.1725248-1-poulhies@adacore.com/","msgid":"<20230522084914.1725248-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:14","name":"[COMMITTED] ada: update Ada_Version_Type in fe.h to match opt.ads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084914.1725248-1-poulhies@adacore.com/mbox/"},{"id":97179,"url":"https://patchwork.plctlab.org/api/1.2/patches/97179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084920.1725312-1-poulhies@adacore.com/","msgid":"<20230522084920.1725312-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:20","name":"[COMMITTED] ada: Update Controlling_Argument when copying trees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084920.1725312-1-poulhies@adacore.com/mbox/"},{"id":97181,"url":"https://patchwork.plctlab.org/api/1.2/patches/97181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084924.1725379-1-poulhies@adacore.com/","msgid":"<20230522084924.1725379-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:24","name":"[COMMITTED] ada: Don'\''t pretty-print DEL within expression images","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084924.1725379-1-poulhies@adacore.com/mbox/"},{"id":97180,"url":"https://patchwork.plctlab.org/api/1.2/patches/97180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084929.1725443-1-poulhies@adacore.com/","msgid":"<20230522084929.1725443-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:29","name":"[COMMITTED] ada: Restrict expression pretty-printer to subexpressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084929.1725443-1-poulhies@adacore.com/mbox/"},{"id":97185,"url":"https://patchwork.plctlab.org/api/1.2/patches/97185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084933.1725506-1-poulhies@adacore.com/","msgid":"<20230522084933.1725506-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:33","name":"[COMMITTED] ada: Fix traversal for the rightmost node of a pretty-printed expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084933.1725506-1-poulhies@adacore.com/mbox/"},{"id":97182,"url":"https://patchwork.plctlab.org/api/1.2/patches/97182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084938.1725583-1-poulhies@adacore.com/","msgid":"<20230522084938.1725583-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:38","name":"[COMMITTED] ada: Fix handling of constrained array declarations in declare-expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084938.1725583-1-poulhies@adacore.com/mbox/"},{"id":97188,"url":"https://patchwork.plctlab.org/api/1.2/patches/97188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084942.1725646-1-poulhies@adacore.com/","msgid":"<20230522084942.1725646-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:42","name":"[COMMITTED] ada: Fix double finalization in conditional exit statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084942.1725646-1-poulhies@adacore.com/mbox/"},{"id":97183,"url":"https://patchwork.plctlab.org/api/1.2/patches/97183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084945.1725711-1-poulhies@adacore.com/","msgid":"<20230522084945.1725711-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:45","name":"[COMMITTED] ada: Better error message if non-Ada2022 code declares No_Return function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084945.1725711-1-poulhies@adacore.com/mbox/"},{"id":97186,"url":"https://patchwork.plctlab.org/api/1.2/patches/97186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084950.1725774-1-poulhies@adacore.com/","msgid":"<20230522084950.1725774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:50","name":"[COMMITTED] ada: Reject illegal declarations in expression functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084950.1725774-1-poulhies@adacore.com/mbox/"},{"id":97189,"url":"https://patchwork.plctlab.org/api/1.2/patches/97189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084953.1725838-1-poulhies@adacore.com/","msgid":"<20230522084953.1725838-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:53","name":"[COMMITTED] ada: Fix error and crash on imported function with precondition and '\''Base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084953.1725838-1-poulhies@adacore.com/mbox/"},{"id":97187,"url":"https://patchwork.plctlab.org/api/1.2/patches/97187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084956.1725901-1-poulhies@adacore.com/","msgid":"<20230522084956.1725901-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:56","name":"[COMMITTED] ada: Implement conversions from Big_Integer to large types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084956.1725901-1-poulhies@adacore.com/mbox/"},{"id":97193,"url":"https://patchwork.plctlab.org/api/1.2/patches/97193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085001.1725965-1-poulhies@adacore.com/","msgid":"<20230522085001.1725965-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:01","name":"[COMMITTED] ada: Fix crash on Ada.Containers with No_Dispatching_Calls restriction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085001.1725965-1-poulhies@adacore.com/mbox/"},{"id":97184,"url":"https://patchwork.plctlab.org/api/1.2/patches/97184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085004.1726030-1-poulhies@adacore.com/","msgid":"<20230522085004.1726030-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:04","name":"[COMMITTED] ada: Add contracts to Ada.Strings.Unbounded library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085004.1726030-1-poulhies@adacore.com/mbox/"},{"id":97194,"url":"https://patchwork.plctlab.org/api/1.2/patches/97194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085010.1726096-1-poulhies@adacore.com/","msgid":"<20230522085010.1726096-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:10","name":"[COMMITTED] ada: Remove unreferenced utility routine Is_Actual_Tagged_Parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085010.1726096-1-poulhies@adacore.com/mbox/"},{"id":97198,"url":"https://patchwork.plctlab.org/api/1.2/patches/97198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085013.1726162-1-poulhies@adacore.com/","msgid":"<20230522085013.1726162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:13","name":"[COMMITTED] ada: Support calls through dereferences in Find_Actual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085013.1726162-1-poulhies@adacore.com/mbox/"},{"id":97201,"url":"https://patchwork.plctlab.org/api/1.2/patches/97201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085018.1726226-1-poulhies@adacore.com/","msgid":"<20230522085018.1726226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:18","name":"[COMMITTED] ada: Remove redundant protection against empty lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085018.1726226-1-poulhies@adacore.com/mbox/"},{"id":97191,"url":"https://patchwork.plctlab.org/api/1.2/patches/97191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085022.1726290-1-poulhies@adacore.com/","msgid":"<20230522085022.1726290-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:22","name":"[COMMITTED] ada: Remove a remaining reference to ?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085022.1726290-1-poulhies@adacore.com/mbox/"},{"id":97197,"url":"https://patchwork.plctlab.org/api/1.2/patches/97197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085029.1726354-1-poulhies@adacore.com/","msgid":"<20230522085029.1726354-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:29","name":"[COMMITTED] ada: Remove extra parentheses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085029.1726354-1-poulhies@adacore.com/mbox/"},{"id":97200,"url":"https://patchwork.plctlab.org/api/1.2/patches/97200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085034.1726417-1-poulhies@adacore.com/","msgid":"<20230522085034.1726417-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:34","name":"[COMMITTED] ada: Improve -gnatyx style check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085034.1726417-1-poulhies@adacore.com/mbox/"},{"id":97203,"url":"https://patchwork.plctlab.org/api/1.2/patches/97203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085039.1726481-1-poulhies@adacore.com/","msgid":"<20230522085039.1726481-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:39","name":"[COMMITTED] ada: Fix spurious warning on Inline_Always and contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085039.1726481-1-poulhies@adacore.com/mbox/"},{"id":97205,"url":"https://patchwork.plctlab.org/api/1.2/patches/97205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085043.1726552-1-poulhies@adacore.com/","msgid":"<20230522085043.1726552-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:43","name":"[COMMITTED] ada: Add warning on frontend inlining of Subprogram_Variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085043.1726552-1-poulhies@adacore.com/mbox/"},{"id":97199,"url":"https://patchwork.plctlab.org/api/1.2/patches/97199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085047.1726616-1-poulhies@adacore.com/","msgid":"<20230522085047.1726616-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:47","name":"[COMMITTED] ada: Accept Assert pragmas in expression functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085047.1726616-1-poulhies@adacore.com/mbox/"},{"id":97206,"url":"https://patchwork.plctlab.org/api/1.2/patches/97206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085051.1726679-1-poulhies@adacore.com/","msgid":"<20230522085051.1726679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:51","name":"[COMMITTED] ada: Add Is_Past_Self_Hiding_Point flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085051.1726679-1-poulhies@adacore.com/mbox/"},{"id":97208,"url":"https://patchwork.plctlab.org/api/1.2/patches/97208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085055.1726743-1-poulhies@adacore.com/","msgid":"<20230522085055.1726743-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:55","name":"[COMMITTED] ada: Cleanup redundant condition in resolution of entity names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085055.1726743-1-poulhies@adacore.com/mbox/"},{"id":97212,"url":"https://patchwork.plctlab.org/api/1.2/patches/97212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085059.1726810-1-poulhies@adacore.com/","msgid":"<20230522085059.1726810-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:59","name":"[COMMITTED] ada: Further fixes to GNATprove and CodePeer expression pretty-printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085059.1726810-1-poulhies@adacore.com/mbox/"},{"id":97202,"url":"https://patchwork.plctlab.org/api/1.2/patches/97202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085103.1726874-1-poulhies@adacore.com/","msgid":"<20230522085103.1726874-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:03","name":"[COMMITTED] ada: Fix spurious freezing error on nonabstract null extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085103.1726874-1-poulhies@adacore.com/mbox/"},{"id":97215,"url":"https://patchwork.plctlab.org/api/1.2/patches/97215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085109.1726939-1-poulhies@adacore.com/","msgid":"<20230522085109.1726939-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:09","name":"[COMMITTED] ada: Rename Is_Past_Self_Hiding_Point flag to be Is_Not_Self_Hidden","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085109.1726939-1-poulhies@adacore.com/mbox/"},{"id":97204,"url":"https://patchwork.plctlab.org/api/1.2/patches/97204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085113.1727006-1-poulhies@adacore.com/","msgid":"<20230522085113.1727006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:13","name":"[COMMITTED] ada: Fix missing finalization in library-unit instance spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085113.1727006-1-poulhies@adacore.com/mbox/"},{"id":97190,"url":"https://patchwork.plctlab.org/api/1.2/patches/97190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085117.1727069-1-poulhies@adacore.com/","msgid":"<20230522085117.1727069-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:17","name":"[COMMITTED] ada: Remove outdated part of comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085117.1727069-1-poulhies@adacore.com/mbox/"},{"id":97209,"url":"https://patchwork.plctlab.org/api/1.2/patches/97209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085122.1727132-1-poulhies@adacore.com/","msgid":"<20230522085122.1727132-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:22","name":"[COMMITTED] ada: Fix missing finalization in separate package body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085122.1727132-1-poulhies@adacore.com/mbox/"},{"id":97216,"url":"https://patchwork.plctlab.org/api/1.2/patches/97216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085128.1727196-1-poulhies@adacore.com/","msgid":"<20230522085128.1727196-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:28","name":"[COMMITTED] ada: Fix crash caused by incorrect expansion of iterated component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085128.1727196-1-poulhies@adacore.com/mbox/"},{"id":97217,"url":"https://patchwork.plctlab.org/api/1.2/patches/97217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085131.1727260-1-poulhies@adacore.com/","msgid":"<20230522085131.1727260-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:31","name":"[COMMITTED] ada: Incorrect constant folding in postcondition involving '\''Old","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085131.1727260-1-poulhies@adacore.com/mbox/"},{"id":97207,"url":"https://patchwork.plctlab.org/api/1.2/patches/97207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085135.1727328-1-poulhies@adacore.com/","msgid":"<20230522085135.1727328-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:35","name":"[COMMITTED] ada: Add missing word in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085135.1727328-1-poulhies@adacore.com/mbox/"},{"id":97195,"url":"https://patchwork.plctlab.org/api/1.2/patches/97195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085139.1727399-1-poulhies@adacore.com/","msgid":"<20230522085139.1727399-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:39","name":"[COMMITTED] ada: Fix source location for crashes in expanded Loop_Entry attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085139.1727399-1-poulhies@adacore.com/mbox/"},{"id":97213,"url":"https://patchwork.plctlab.org/api/1.2/patches/97213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085143.1727487-1-poulhies@adacore.com/","msgid":"<20230522085143.1727487-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:43","name":"[COMMITTED] ada: Use idiomatic construct in Expand_N_Package_Body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085143.1727487-1-poulhies@adacore.com/mbox/"},{"id":97214,"url":"https://patchwork.plctlab.org/api/1.2/patches/97214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085147.1727570-1-poulhies@adacore.com/","msgid":"<20230522085147.1727570-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:47","name":"[COMMITTED] ada: Small cleanup in support for protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085147.1727570-1-poulhies@adacore.com/mbox/"},{"id":97210,"url":"https://patchwork.plctlab.org/api/1.2/patches/97210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085152.1727635-1-poulhies@adacore.com/","msgid":"<20230522085152.1727635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:52","name":"[COMMITTED] ada: Avoid repeated calls when looking for first/last slocs of a node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085152.1727635-1-poulhies@adacore.com/mbox/"},{"id":97218,"url":"https://patchwork.plctlab.org/api/1.2/patches/97218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085158.1727700-1-poulhies@adacore.com/","msgid":"<20230522085158.1727700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:58","name":"[COMMITTED] ada: Reuse idiomatic procedure in CStand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085158.1727700-1-poulhies@adacore.com/mbox/"},{"id":97234,"url":"https://patchwork.plctlab.org/api/1.2/patches/97234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522100156.2294068-1-juzhe.zhong@rivai.ai/","msgid":"<20230522100156.2294068-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T10:01:56","name":"RISC-V: Fix typo of multiple_rgroup-2.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522100156.2294068-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97349,"url":"https://patchwork.plctlab.org/api/1.2/patches/97349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522120956.2833527-1-juzhe.zhong@rivai.ai/","msgid":"<20230522120956.2833527-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T12:09:56","name":"RISC-V: Add \"m_\" prefix for private member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522120956.2833527-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97411,"url":"https://patchwork.plctlab.org/api/1.2/patches/97411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522125149.30467-1-sebastian.huber@embedded-brains.de/","msgid":"<20230522125149.30467-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-05-22T12:51:49","name":"libgomp: Fix build for -fshort-enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522125149.30467-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":97433,"url":"https://patchwork.plctlab.org/api/1.2/patches/97433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn5h=262tGq2_SdhMKQON_hrCaTbPPRk7PQ=mcwoFGkpQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T13:25:21","name":"libiberty: On Windows pass a >32k cmdline through a response file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn5h=262tGq2_SdhMKQON_hrCaTbPPRk7PQ=mcwoFGkpQ@mail.gmail.com/mbox/"},{"id":97486,"url":"https://patchwork.plctlab.org/api/1.2/patches/97486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZKo5_-H4OBXGB=7353=tg0Mr8rYaWFbJ5HAKSFZdP30g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T14:36:26","name":"[COMMITTED] i386: Account for the memory read in V*QImode multiplication sequences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZKo5_-H4OBXGB=7353=tg0Mr8rYaWFbJ5HAKSFZdP30g@mail.gmail.com/mbox/"},{"id":97485,"url":"https://patchwork.plctlab.org/api/1.2/patches/97485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de/","msgid":"<8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de>","list_archive_url":null,"date":"2023-05-22T14:36:49","name":"[avr,testsuite,committed] Skip test that fail for avr for this or that reason.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de/mbox/"},{"id":97496,"url":"https://patchwork.plctlab.org/api/1.2/patches/97496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de/","msgid":"<3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de>","list_archive_url":null,"date":"2023-05-22T14:58:06","name":"[testsuite,committed] PR testsuite/52641","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de/mbox/"},{"id":97512,"url":"https://patchwork.plctlab.org/api/1.2/patches/97512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5868460.taCxCBeP46@minbar/","msgid":"<5868460.taCxCBeP46@minbar>","list_archive_url":null,"date":"2023-05-22T15:32:45","name":"[committed] libstdc++: Resolve -Wunused-variable warnings in stdx::simd and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5868460.taCxCBeP46@minbar/mbox/"},{"id":97514,"url":"https://patchwork.plctlab.org/api/1.2/patches/97514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/116291317.nniJfEyVGO@minbar/","msgid":"<116291317.nniJfEyVGO@minbar>","list_archive_url":null,"date":"2023-05-22T15:36:19","name":"libstdc++: Add missing constexpr to simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/116291317.nniJfEyVGO@minbar/mbox/"},{"id":97550,"url":"https://patchwork.plctlab.org/api/1.2/patches/97550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at/","msgid":"<2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-22T17:17:01","name":"[C,v3] Fix ICEs related to VM types in C 1/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at/mbox/"},{"id":97552,"url":"https://patchwork.plctlab.org/api/1.2/patches/97552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4357b98b6e61dc227db9b21e21e5878af6a7ceb.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-22T17:23:58","name":"[C,v3] Fix ICEs related to VM types in C 2/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4357b98b6e61dc227db9b21e21e5878af6a7ceb.camel@tugraz.at/mbox/"},{"id":97561,"url":"https://patchwork.plctlab.org/api/1.2/patches/97561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com/","msgid":"<79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-22T17:36:50","name":"[v3] rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com/mbox/"},{"id":97562,"url":"https://patchwork.plctlab.org/api/1.2/patches/97562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecc0245f-1b9d-bae5-75b6-aa4c444dc194@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-22T18:26:18","name":"[testsuite,committed] : PR52614: Fix more of the int=32 assumption fallout.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecc0245f-1b9d-bae5-75b6-aa4c444dc194@gjlay.de/mbox/"},{"id":97563,"url":"https://patchwork.plctlab.org/api/1.2/patches/97563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522183834.535767-1-aldyh@redhat.com/","msgid":"<20230522183834.535767-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:38:34","name":"[COMMITTED] Implement some miscellaneous zero accessors for Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522183834.535767-1-aldyh@redhat.com/mbox/"},{"id":97564,"url":"https://patchwork.plctlab.org/api/1.2/patches/97564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-1-aldyh@redhat.com/","msgid":"<20230522185622.537454-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:20","name":"Convert ipa_jump_func to use ipa_vr instead of a value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-1-aldyh@redhat.com/mbox/"},{"id":97566,"url":"https://patchwork.plctlab.org/api/1.2/patches/97566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-2-aldyh@redhat.com/","msgid":"<20230522185622.537454-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:21","name":"Implement ipa_vr hashing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-2-aldyh@redhat.com/mbox/"},{"id":97567,"url":"https://patchwork.plctlab.org/api/1.2/patches/97567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-3-aldyh@redhat.com/","msgid":"<20230522185622.537454-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:22","name":"Convert remaining uses of value_range in ipa-*.cc to Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-3-aldyh@redhat.com/mbox/"},{"id":97572,"url":"https://patchwork.plctlab.org/api/1.2/patches/97572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com/","msgid":"<366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-22T19:50:17","name":"[ver,2] rs6000: Fix __builtin_vec_xst_trunc definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com/mbox/"},{"id":97603,"url":"https://patchwork.plctlab.org/api/1.2/patches/97603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yea5_347p5s5ZZnGnPT54sXh5P82dSJ1Bpu0PegwixHQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T20:39:01","name":"[COMMITTED] i386: Adjust emulated integer vector mode shift costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yea5_347p5s5ZZnGnPT54sXh5P82dSJ1Bpu0PegwixHQ@mail.gmail.com/mbox/"},{"id":97612,"url":"https://patchwork.plctlab.org/api/1.2/patches/97612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com/","msgid":"<9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com>","list_archive_url":null,"date":"2023-05-22T20:50:54","name":"Replace __gnu_cxx::__ops::__negate with std::not_fn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com/mbox/"},{"id":97635,"url":"https://patchwork.plctlab.org/api/1.2/patches/97635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522214744.15211-1-iain@sandoe.co.uk/","msgid":"<20230522214744.15211-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-05-22T21:47:44","name":"[pushed] libobjc: Add local macros to support encode generation [P109913].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522214744.15211-1-iain@sandoe.co.uk/mbox/"},{"id":97644,"url":"https://patchwork.plctlab.org/api/1.2/patches/97644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522235841.inxggcczfaatu6ct@lug-owl.de/","msgid":"<20230522235841.inxggcczfaatu6ct@lug-owl.de>","list_archive_url":null,"date":"2023-05-22T23:58:41","name":"mcore: Fix sprintf length warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522235841.inxggcczfaatu6ct@lug-owl.de/mbox/"},{"id":97723,"url":"https://patchwork.plctlab.org/api/1.2/patches/97723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523044202.1201-1-jinma@linux.alibaba.com/","msgid":"<20230523044202.1201-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-23T04:42:02","name":"RISC-V: Add the option \"-mdisable-multilib-check\" to avoid multilib checks breaking the compilation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523044202.1201-1-jinma@linux.alibaba.com/mbox/"},{"id":97733,"url":"https://patchwork.plctlab.org/api/1.2/patches/97733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp/","msgid":"<5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-23T05:48:09","name":"[v2] xtensa: Optimize '\''(x & CST1_POW2) != 0 ? CST2_POW2 : 0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp/mbox/"},{"id":97734,"url":"https://patchwork.plctlab.org/api/1.2/patches/97734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523060804.61556-1-juzhe.zhong@rivai.ai/","msgid":"<20230523060804.61556-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T06:08:04","name":"RISC-V: Refactor the framework of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523060804.61556-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97750,"url":"https://patchwork.plctlab.org/api/1.2/patches/97750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com/","msgid":"<7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com>","list_archive_url":null,"date":"2023-05-23T06:52:38","name":"[wwwdocs,committed] projects/gomp: Link to GCC 13 impl. status as well","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com/mbox/"},{"id":97751,"url":"https://patchwork.plctlab.org/api/1.2/patches/97751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523065727.575169-1-aldyh@redhat.com/","msgid":"<20230523065727.575169-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-23T06:57:27","name":"[COMMITTED] Use delete[] in int_range destructor [PR109920]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523065727.575169-1-aldyh@redhat.com/mbox/"},{"id":97770,"url":"https://patchwork.plctlab.org/api/1.2/patches/97770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15963891.uLZWGnKmhe@minbar/","msgid":"<15963891.uLZWGnKmhe@minbar>","list_archive_url":null,"date":"2023-05-23T07:30:04","name":"[committed] Re: [PATCH] libstdc++: Add missing constexpr to simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15963891.uLZWGnKmhe@minbar/mbox/"},{"id":97828,"url":"https://patchwork.plctlab.org/api/1.2/patches/97828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080733.1872635-1-poulhies@adacore.com/","msgid":"<20230523080733.1872635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:33","name":"[COMMITTED] ada: Crash on dispatching primitive referencing limited-with type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080733.1872635-1-poulhies@adacore.com/mbox/"},{"id":97839,"url":"https://patchwork.plctlab.org/api/1.2/patches/97839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080737.1872700-1-poulhies@adacore.com/","msgid":"<20230523080737.1872700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:37","name":"[COMMITTED] ada: Remove duplicate comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080737.1872700-1-poulhies@adacore.com/mbox/"},{"id":97830,"url":"https://patchwork.plctlab.org/api/1.2/patches/97830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080742.1872762-1-poulhies@adacore.com/","msgid":"<20230523080742.1872762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:42","name":"[COMMITTED] ada: Minor fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080742.1872762-1-poulhies@adacore.com/mbox/"},{"id":97833,"url":"https://patchwork.plctlab.org/api/1.2/patches/97833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080744.1872824-1-poulhies@adacore.com/","msgid":"<20230523080744.1872824-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:44","name":"[COMMITTED] ada: Small code cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080744.1872824-1-poulhies@adacore.com/mbox/"},{"id":97863,"url":"https://patchwork.plctlab.org/api/1.2/patches/97863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080747.1872885-1-poulhies@adacore.com/","msgid":"<20230523080747.1872885-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:47","name":"[COMMITTED] ada: Suppress warning about Subprogram_Variant failing at run time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080747.1872885-1-poulhies@adacore.com/mbox/"},{"id":97854,"url":"https://patchwork.plctlab.org/api/1.2/patches/97854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080749.1872946-1-poulhies@adacore.com/","msgid":"<20230523080749.1872946-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:49","name":"[COMMITTED] ada: Fix expression pretty-printer for SPARK counterexamples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080749.1872946-1-poulhies@adacore.com/mbox/"},{"id":97843,"url":"https://patchwork.plctlab.org/api/1.2/patches/97843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080752.1873021-1-poulhies@adacore.com/","msgid":"<20230523080752.1873021-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:52","name":"[COMMITTED] ada: Transfer fix for pretty-printed parentheses from GNATprove to GNAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080752.1873021-1-poulhies@adacore.com/mbox/"},{"id":97868,"url":"https://patchwork.plctlab.org/api/1.2/patches/97868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080754.1873095-1-poulhies@adacore.com/","msgid":"<20230523080754.1873095-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:54","name":"[COMMITTED] ada: Remove special-case for parentheses in expansion for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080754.1873095-1-poulhies@adacore.com/mbox/"},{"id":97872,"url":"https://patchwork.plctlab.org/api/1.2/patches/97872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080756.1873165-1-poulhies@adacore.com/","msgid":"<20230523080756.1873165-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:56","name":"[COMMITTED] ada: Ignore accessibility actuals in expression pretty-printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080756.1873165-1-poulhies@adacore.com/mbox/"},{"id":97853,"url":"https://patchwork.plctlab.org/api/1.2/patches/97853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080759.1873226-1-poulhies@adacore.com/","msgid":"<20230523080759.1873226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:59","name":"[COMMITTED] ada: Revert to old pretty-printing of internal entities for CodePeer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080759.1873226-1-poulhies@adacore.com/mbox/"},{"id":97845,"url":"https://patchwork.plctlab.org/api/1.2/patches/97845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080802.1873289-1-poulhies@adacore.com/","msgid":"<20230523080802.1873289-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:02","name":"[COMMITTED] ada: Sync different variants of interrupt handler registration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080802.1873289-1-poulhies@adacore.com/mbox/"},{"id":97878,"url":"https://patchwork.plctlab.org/api/1.2/patches/97878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080806.1873350-1-poulhies@adacore.com/","msgid":"<20230523080806.1873350-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:06","name":"[COMMITTED] ada: Fix bogus error on predicated limited record declared in protected type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080806.1873350-1-poulhies@adacore.com/mbox/"},{"id":97867,"url":"https://patchwork.plctlab.org/api/1.2/patches/97867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080810.1873414-1-poulhies@adacore.com/","msgid":"<20230523080810.1873414-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:10","name":"[COMMITTED] ada: Fix internal error on quantified expression with predicated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080810.1873414-1-poulhies@adacore.com/mbox/"},{"id":97857,"url":"https://patchwork.plctlab.org/api/1.2/patches/97857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080814.1873488-1-poulhies@adacore.com/","msgid":"<20230523080814.1873488-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:14","name":"[COMMITTED] ada: Fix endings of pretty-printed numeric literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080814.1873488-1-poulhies@adacore.com/mbox/"},{"id":97862,"url":"https://patchwork.plctlab.org/api/1.2/patches/97862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080818.1873549-1-poulhies@adacore.com/","msgid":"<20230523080818.1873549-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:18","name":"[COMMITTED] ada: Add mention of what LSP stands for","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080818.1873549-1-poulhies@adacore.com/mbox/"},{"id":97884,"url":"https://patchwork.plctlab.org/api/1.2/patches/97884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080821.1873611-1-poulhies@adacore.com/","msgid":"<20230523080821.1873611-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:21","name":"[COMMITTED] ada: Turn assertions into defensive code in error locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080821.1873611-1-poulhies@adacore.com/mbox/"},{"id":97864,"url":"https://patchwork.plctlab.org/api/1.2/patches/97864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080824.1873672-1-poulhies@adacore.com/","msgid":"<20230523080824.1873672-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:24","name":"[COMMITTED] ada: Spurious errors on class-wide preconditions of private types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080824.1873672-1-poulhies@adacore.com/mbox/"},{"id":97890,"url":"https://patchwork.plctlab.org/api/1.2/patches/97890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080826.1873735-1-poulhies@adacore.com/","msgid":"<20230523080826.1873735-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:26","name":"[COMMITTED] ada: Remove the body of System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080826.1873735-1-poulhies@adacore.com/mbox/"},{"id":97873,"url":"https://patchwork.plctlab.org/api/1.2/patches/97873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080828.1873797-1-poulhies@adacore.com/","msgid":"<20230523080828.1873797-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:28","name":"[COMMITTED] ada: Facilitate proof of Interfaces.C.To_Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080828.1873797-1-poulhies@adacore.com/mbox/"},{"id":97869,"url":"https://patchwork.plctlab.org/api/1.2/patches/97869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080832.1873858-1-poulhies@adacore.com/","msgid":"<20230523080832.1873858-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:32","name":"[COMMITTED] ada: Add default value at initialization for CodePeer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080832.1873858-1-poulhies@adacore.com/mbox/"},{"id":97894,"url":"https://patchwork.plctlab.org/api/1.2/patches/97894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080834.1873919-1-poulhies@adacore.com/","msgid":"<20230523080834.1873919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:34","name":"[COMMITTED] ada: A discriminant of a variable is not a variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080834.1873919-1-poulhies@adacore.com/mbox/"},{"id":97838,"url":"https://patchwork.plctlab.org/api/1.2/patches/97838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080836.1873982-1-poulhies@adacore.com/","msgid":"<20230523080836.1873982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:36","name":"[COMMITTED] ada: Fix address arithmetic issues in the runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080836.1873982-1-poulhies@adacore.com/mbox/"},{"id":97896,"url":"https://patchwork.plctlab.org/api/1.2/patches/97896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080838.1874043-1-poulhies@adacore.com/","msgid":"<20230523080838.1874043-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:38","name":"[COMMITTED] ada: Fix address arithmetic issues in the expanded code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080838.1874043-1-poulhies@adacore.com/mbox/"},{"id":97892,"url":"https://patchwork.plctlab.org/api/1.2/patches/97892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080840.1874104-1-poulhies@adacore.com/","msgid":"<20230523080840.1874104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:40","name":"[COMMITTED] ada: Fix reference to Ada issue in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080840.1874104-1-poulhies@adacore.com/mbox/"},{"id":97877,"url":"https://patchwork.plctlab.org/api/1.2/patches/97877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080842.1874165-1-poulhies@adacore.com/","msgid":"<20230523080842.1874165-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:42","name":"[COMMITTED] ada: Remove unnecessary call to Detach.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080842.1874165-1-poulhies@adacore.com/mbox/"},{"id":97897,"url":"https://patchwork.plctlab.org/api/1.2/patches/97897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080845.1874226-1-poulhies@adacore.com/","msgid":"<20230523080845.1874226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:45","name":"[COMMITTED] ada: Fix resolution of mod operator of System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080845.1874226-1-poulhies@adacore.com/mbox/"},{"id":97882,"url":"https://patchwork.plctlab.org/api/1.2/patches/97882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080856.1874354-1-poulhies@adacore.com/","msgid":"<20230523080856.1874354-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:56","name":"[COMMITTED] ada: Fix oversight in latest change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080856.1874354-1-poulhies@adacore.com/mbox/"},{"id":97888,"url":"https://patchwork.plctlab.org/api/1.2/patches/97888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080858.1874416-1-poulhies@adacore.com/","msgid":"<20230523080858.1874416-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:58","name":"[COMMITTED] ada: Fix minor address arithmetic issues in System.Dwarf_Lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080858.1874416-1-poulhies@adacore.com/mbox/"},{"id":97852,"url":"https://patchwork.plctlab.org/api/1.2/patches/97852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080901.1874480-1-poulhies@adacore.com/","msgid":"<20230523080901.1874480-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:01","name":"[COMMITTED] ada: Add new switch -gnatyz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080901.1874480-1-poulhies@adacore.com/mbox/"},{"id":97891,"url":"https://patchwork.plctlab.org/api/1.2/patches/97891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080904.1874544-1-poulhies@adacore.com/","msgid":"<20230523080904.1874544-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:04","name":"[COMMITTED] ada: Update ghost code for proof of integer input functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080904.1874544-1-poulhies@adacore.com/mbox/"},{"id":97866,"url":"https://patchwork.plctlab.org/api/1.2/patches/97866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080906.1874606-1-poulhies@adacore.com/","msgid":"<20230523080906.1874606-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:06","name":"[COMMITTED] ada: Make string interpolation part of the core extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080906.1874606-1-poulhies@adacore.com/mbox/"},{"id":97861,"url":"https://patchwork.plctlab.org/api/1.2/patches/97861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080908.1874670-1-poulhies@adacore.com/","msgid":"<20230523080908.1874670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:08","name":"[COMMITTED] ada: Fix address manipulation issue in the tasking runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080908.1874670-1-poulhies@adacore.com/mbox/"},{"id":97893,"url":"https://patchwork.plctlab.org/api/1.2/patches/97893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080912.1874731-1-poulhies@adacore.com/","msgid":"<20230523080912.1874731-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:12","name":"[COMMITTED] ada: Fix latent issue in support for protected entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080912.1874731-1-poulhies@adacore.com/mbox/"},{"id":97871,"url":"https://patchwork.plctlab.org/api/1.2/patches/97871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080915.1874792-1-poulhies@adacore.com/","msgid":"<20230523080915.1874792-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:15","name":"[COMMITTED] ada: Cleanup inconsistent iteration over exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080915.1874792-1-poulhies@adacore.com/mbox/"},{"id":97870,"url":"https://patchwork.plctlab.org/api/1.2/patches/97870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080917.1874858-1-poulhies@adacore.com/","msgid":"<20230523080917.1874858-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:17","name":"[COMMITTED] ada: Add tags to warnings controlled by Warn_On_Redundant_Constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080917.1874858-1-poulhies@adacore.com/mbox/"},{"id":97895,"url":"https://patchwork.plctlab.org/api/1.2/patches/97895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080920.1874919-1-poulhies@adacore.com/","msgid":"<20230523080920.1874919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:20","name":"[COMMITTED] ada: Remove redundant parentheses from System.Stack_Checking.Operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080920.1874919-1-poulhies@adacore.com/mbox/"},{"id":97874,"url":"https://patchwork.plctlab.org/api/1.2/patches/97874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080922.1874982-1-poulhies@adacore.com/","msgid":"<20230523080922.1874982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:22","name":"[COMMITTED] ada: ICE on BIP call in class-wide function return within instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080922.1874982-1-poulhies@adacore.com/mbox/"},{"id":97876,"url":"https://patchwork.plctlab.org/api/1.2/patches/97876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080925.1875043-1-poulhies@adacore.com/","msgid":"<20230523080925.1875043-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:25","name":"[COMMITTED] ada: Rework fix for internal error on quantified expression with predicated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080925.1875043-1-poulhies@adacore.com/mbox/"},{"id":97883,"url":"https://patchwork.plctlab.org/api/1.2/patches/97883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080928.1875104-1-poulhies@adacore.com/","msgid":"<20230523080928.1875104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:28","name":"[COMMITTED] ada: Accept and analyze new aspect Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080928.1875104-1-poulhies@adacore.com/mbox/"},{"id":97909,"url":"https://patchwork.plctlab.org/api/1.2/patches/97909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523085618.241312-1-juzhe.zhong@rivai.ai/","msgid":"<20230523085618.241312-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T08:56:18","name":"[V2] RISC-V: Refactor the framework of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523085618.241312-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97934,"url":"https://patchwork.plctlab.org/api/1.2/patches/97934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523093407.3501163-1-christophe.lyon@linaro.org/","msgid":"<20230523093407.3501163-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-05-23T09:34:07","name":"testsuite, analyzer: Fix testcases with fclose","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523093407.3501163-1-christophe.lyon@linaro.org/mbox/"},{"id":97942,"url":"https://patchwork.plctlab.org/api/1.2/patches/97942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523095533.B1C0713588@imap2.suse-dmz.suse.de/","msgid":"<20230523095533.B1C0713588@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T09:55:33","name":"tree-optimization/109849 - missed code hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523095533.B1C0713588@imap2.suse-dmz.suse.de/mbox/"},{"id":97950,"url":"https://patchwork.plctlab.org/api/1.2/patches/97950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523100958.340512-1-juzhe.zhong@rivai.ai/","msgid":"<20230523100958.340512-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T10:09:58","name":"RISC-V: Fix warning of vxrm pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523100958.340512-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97957,"url":"https://patchwork.plctlab.org/api/1.2/patches/97957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz2rpc67.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T10:36:16","name":"[1/2] md: Allow to refer to the value of int iterator FOO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz2rpc67.fsf@arm.com/mbox/"},{"id":97956,"url":"https://patchwork.plctlab.org/api/1.2/patches/97956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cszpc4d.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T10:37:22","name":"[2/2] aarch64: Provide FPR alternatives for some bit insertions [PR109632]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cszpc4d.fsf@arm.com/mbox/"},{"id":97959,"url":"https://patchwork.plctlab.org/api/1.2/patches/97959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523105643.18F4F13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523105643.18F4F13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T10:56:42","name":"Dump ANTIC_OUT before pruning it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523105643.18F4F13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":97983,"url":"https://patchwork.plctlab.org/api/1.2/patches/97983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de/","msgid":"<6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de>","list_archive_url":null,"date":"2023-05-23T12:55:45","name":": Implement PR104327 for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de/mbox/"},{"id":97985,"url":"https://patchwork.plctlab.org/api/1.2/patches/97985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523125836.642394-1-aldyh@redhat.com/","msgid":"<20230523125836.642394-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-23T12:58:36","name":"[COMMITTED] Remove buggy special case in irange::invert [PR109934].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523125836.642394-1-aldyh@redhat.com/mbox/"},{"id":97996,"url":"https://patchwork.plctlab.org/api/1.2/patches/97996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523135007.682279-1-juzhe.zhong@rivai.ai/","msgid":"<20230523135007.682279-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T13:50:07","name":"[V2] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523135007.682279-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98027,"url":"https://patchwork.plctlab.org/api/1.2/patches/98027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523143412.184530-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230523143412.184530-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-05-23T14:34:12","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523143412.184530-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":98023,"url":"https://patchwork.plctlab.org/api/1.2/patches/98023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523144145.315887-1-christophe.lyon@linaro.org/","msgid":"<20230523144145.315887-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-05-23T14:41:45","name":"[arm] testsuite: make mve_intrinsic_type_overloads-int.c libc-agnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523144145.315887-1-christophe.lyon@linaro.org/mbox/"},{"id":98029,"url":"https://patchwork.plctlab.org/api/1.2/patches/98029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523150446.699745-1-juzhe.zhong@rivai.ai/","msgid":"<20230523150446.699745-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T15:04:46","name":"[V3] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523150446.699745-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98043,"url":"https://patchwork.plctlab.org/api/1.2/patches/98043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151548.622FF13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151548.622FF13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:15:48","name":"Generic vector op costing adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151548.622FF13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98045,"url":"https://patchwork.plctlab.org/api/1.2/patches/98045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151803.3428B13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151803.3428B13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:18:02","name":"tree-optimization/109747 - SLP cost of CTORs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151803.3428B13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98046,"url":"https://patchwork.plctlab.org/api/1.2/patches/98046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151845.D26C213A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151845.D26C213A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:18:45","name":"Account for vector splat GPR->XMM move cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151845.D26C213A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98072,"url":"https://patchwork.plctlab.org/api/1.2/patches/98072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YGYGTgt7WqfNLK4dOX16=c+axq2n5_EyGxB9D8+AyWbA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T16:02:09","name":"[COMMITTED] i386: Add V8QI and V4QImode partial vector shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YGYGTgt7WqfNLK4dOX16=c+axq2n5_EyGxB9D8+AyWbA@mail.gmail.com/mbox/"},{"id":98086,"url":"https://patchwork.plctlab.org/api/1.2/patches/98086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da686a99-84a5-e733-0029-94c11c96a377@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-23T16:57:49","name":"[avr,committed] Fix cost computation for bit insertions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da686a99-84a5-e733-0029-94c11c96a377@gjlay.de/mbox/"},{"id":98127,"url":"https://patchwork.plctlab.org/api/1.2/patches/98127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com/","msgid":"<075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-23T18:30:19","name":"PR middle-end/109840: Preserve popcount/parity type in match.pd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com/mbox/"},{"id":98153,"url":"https://patchwork.plctlab.org/api/1.2/patches/98153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523194114.56310-1-kmatsui@cs.washington.edu/","msgid":"<20230523194114.56310-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-05-23T19:41:14","name":"libstdc++: use using instead of typedef for type_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523194114.56310-1-kmatsui@cs.washington.edu/mbox/"},{"id":98154,"url":"https://patchwork.plctlab.org/api/1.2/patches/98154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMORuCuONZGQEzATJh3T0aqidjoki=gZZLsT7EJMA_KKA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T19:46:59","name":"RISC-V: Use extension instructions instead of bitwise \"and\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMORuCuONZGQEzATJh3T0aqidjoki=gZZLsT7EJMA_KKA@mail.gmail.com/mbox/"},{"id":98186,"url":"https://patchwork.plctlab.org/api/1.2/patches/98186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6920882.e9J7NaK4W3@minbar/","msgid":"<6920882.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-05-23T21:57:22","name":"libstdc++: Add missing constexpr to simd_neon","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6920882.e9J7NaK4W3@minbar/mbox/"},{"id":98199,"url":"https://patchwork.plctlab.org/api/1.2/patches/98199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523231601.2130715-1-apinski@marvell.com/","msgid":"<20230523231601.2130715-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-23T23:16:01","name":"Dump if a pattern fails after having printed applying it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523231601.2130715-1-apinski@marvell.com/mbox/"},{"id":98231,"url":"https://patchwork.plctlab.org/api/1.2/patches/98231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524011323.1046670-1-juzhe.zhong@rivai.ai/","msgid":"<20230524011323.1046670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:13:23","name":"RISC-V: Fix magic number of RVV auto-vectorization expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524011323.1046670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98235,"url":"https://patchwork.plctlab.org/api/1.2/patches/98235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524012848.1097889-1-juzhe.zhong@rivai.ai/","msgid":"<20230524012848.1097889-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:28:48","name":"[V2] RISC-V: Fix magic number of RVV auto-vectorization expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524012848.1097889-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98241,"url":"https://patchwork.plctlab.org/api/1.2/patches/98241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524015727.1157568-1-juzhe.zhong@rivai.ai/","msgid":"<20230524015727.1157568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:57:27","name":"RISC-V: Fix incorrect code of touching inaccessible memory address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524015727.1157568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98252,"url":"https://patchwork.plctlab.org/api/1.2/patches/98252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524023851.1440077-1-juzhe.zhong@rivai.ai/","msgid":"<20230524023851.1440077-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T02:38:51","name":"[V2] RISC-V: Fix incorrect code of reaching inaccessible memory address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524023851.1440077-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98256,"url":"https://patchwork.plctlab.org/api/1.2/patches/98256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524031154.1533363-1-juzhe.zhong@rivai.ai/","msgid":"<20230524031154.1533363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T03:11:54","name":"[V4] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524031154.1533363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98263,"url":"https://patchwork.plctlab.org/api/1.2/patches/98263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524032917.1598882-1-juzhe.zhong@rivai.ai/","msgid":"<20230524032917.1598882-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T03:29:17","name":"[V5] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524032917.1598882-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98289,"url":"https://patchwork.plctlab.org/api/1.2/patches/98289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz2qqptg.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:08:27","name":"Check for sysconf decl on vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz2qqptg.fsf@lxoliva.fsfla.org/mbox/"},{"id":98290,"url":"https://patchwork.plctlab.org/api/1.2/patches/98290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8rdeqpgh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:16:14","name":"[testsuite] tsvc: skip include malloc.h when unavailable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8rdeqpgh.fsf@lxoliva.fsfla.org/mbox/"},{"id":98291,"url":"https://patchwork.plctlab.org/api/1.2/patches/98291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jo2qpcu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:18:25","name":"[testsuite] require pic for pr103074.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jo2qpcu.fsf@lxoliva.fsfla.org/mbox/"},{"id":98292,"url":"https://patchwork.plctlab.org/api/1.2/patches/98292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg5upaqt.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:19:22","name":"[testsuite] require pthread for openmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg5upaqt.fsf@lxoliva.fsfla.org/mbox/"},{"id":98293,"url":"https://patchwork.plctlab.org/api/1.2/patches/98293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8gipaox.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:20:30","name":"[testsuite] require profiling for -pg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8gipaox.fsf@lxoliva.fsfla.org/mbox/"},{"id":98294,"url":"https://patchwork.plctlab.org/api/1.2/patches/98294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0r6paik.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:24:19","name":"[testsuite,i386] enable sse2 for signbit-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0r6paik.fsf@lxoliva.fsfla.org/mbox/"},{"id":98297,"url":"https://patchwork.plctlab.org/api/1.2/patches/98297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilcip9nk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:42:55","name":"[testsuite,ppc] xfail uninit-pred-9_b bogus warn on ppc32 too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilcip9nk.fsf@lxoliva.fsfla.org/mbox/"},{"id":98299,"url":"https://patchwork.plctlab.org/api/1.2/patches/98299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredn6p9gk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:47:07","name":"[x86] reenable dword MOVE_MAX for better memmove inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredn6p9gk.fsf@lxoliva.fsfla.org/mbox/"},{"id":98300,"url":"https://patchwork.plctlab.org/api/1.2/patches/98300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5xup9e3.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:48:36","name":"[testsuite,x86] cope with --enable-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5xup9e3.fsf@lxoliva.fsfla.org/mbox/"},{"id":98301,"url":"https://patchwork.plctlab.org/api/1.2/patches/98301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y8ip9ba.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:50:17","name":"[libstdc++,testsuite] xfail to_chars/long_double on x86-vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y8ip9ba.fsf@lxoliva.fsfla.org/mbox/"},{"id":98302,"url":"https://patchwork.plctlab.org/api/1.2/patches/98302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qj6p98w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:51:43","name":"[testsuite,powerpc] adjust -m32 counts for fold-vec-extract*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qj6p98w.fsf@lxoliva.fsfla.org/mbox/"},{"id":98303,"url":"https://patchwork.plctlab.org/api/1.2/patches/98303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524060407.19181-1-chenglulu@loongson.cn/","msgid":"<20230524060407.19181-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-05-24T06:04:08","name":"LoongArch: Fix the problem of structure parameter passing in C++. This structure has empty structure members and less than three floating point members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524060407.19181-1-chenglulu@loongson.cn/mbox/"},{"id":98321,"url":"https://patchwork.plctlab.org/api/1.2/patches/98321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt353mmdjy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T06:46:57","name":"early-remat: Resync with new DF postorders [PR109940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt353mmdjy.fsf@arm.com/mbox/"},{"id":98326,"url":"https://patchwork.plctlab.org/api/1.2/patches/98326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524070329.1163656-1-juzhe.zhong@rivai.ai/","msgid":"<20230524070329.1163656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T07:03:29","name":"RISC-V: Add RVV mask logic auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524070329.1163656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98350,"url":"https://patchwork.plctlab.org/api/1.2/patches/98350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524072723.1387346-1-juzhe.zhong@rivai.ai/","msgid":"<20230524072723.1387346-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T07:27:23","name":"[V2,COMMITTED] RISC-V: Add RVV mask logic auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524072723.1387346-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98416,"url":"https://patchwork.plctlab.org/api/1.2/patches/98416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"<200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:11","name":"[v3,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98415,"url":"https://patchwork.plctlab.org/api/1.2/patches/98415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"<8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:13","name":"[v3,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98418,"url":"https://patchwork.plctlab.org/api/1.2/patches/98418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7124194404595352049d5779c4e4b9379fb3167.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:15","name":"[v3,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7124194404595352049d5779c4e4b9379fb3167.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98414,"url":"https://patchwork.plctlab.org/api/1.2/patches/98414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0d7d2d1cbea94f44064714a84115a4797c1342b.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:16","name":"[v3,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0d7d2d1cbea94f44064714a84115a4797c1342b.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98413,"url":"https://patchwork.plctlab.org/api/1.2/patches/98413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa4c1d8e2fdaa7929bfd2f728396a1eee1ff1be8.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:18","name":"[v3,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa4c1d8e2fdaa7929bfd2f728396a1eee1ff1be8.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98417,"url":"https://patchwork.plctlab.org/api/1.2/patches/98417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:19","name":"[v3,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98419,"url":"https://patchwork.plctlab.org/api/1.2/patches/98419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:21","name":"[v3,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98420,"url":"https://patchwork.plctlab.org/api/1.2/patches/98420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:22","name":"[v3,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98421,"url":"https://patchwork.plctlab.org/api/1.2/patches/98421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:24","name":"[v3,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98423,"url":"https://patchwork.plctlab.org/api/1.2/patches/98423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2883909.e9J7NaK4W3@fomalhaut/","msgid":"<2883909.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2023-05-24T09:54:41","name":"Fix artificial overflow during GENERIC folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2883909.e9J7NaK4W3@fomalhaut/mbox/"},{"id":98430,"url":"https://patchwork.plctlab.org/api/1.2/patches/98430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524101445.E7EC63857708@sourceware.org/","msgid":"<20230524101445.E7EC63857708@sourceware.org>","list_archive_url":null,"date":"2023-05-24T10:13:57","name":"target/109944 - avoid STLF fail for V16QImode CTOR expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524101445.E7EC63857708@sourceware.org/mbox/"},{"id":98440,"url":"https://patchwork.plctlab.org/api/1.2/patches/98440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13148454.CDJkKcVGEf@minbar/","msgid":"<13148454.CDJkKcVGEf@minbar>","list_archive_url":null,"date":"2023-05-24T10:58:19","name":"libstdc++: Fix SFINAE for __is_intrinsic_type on ARM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13148454.CDJkKcVGEf@minbar/mbox/"},{"id":98446,"url":"https://patchwork.plctlab.org/api/1.2/patches/98446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111933.3A9FC3857720@sourceware.org/","msgid":"<20230524111933.3A9FC3857720@sourceware.org>","list_archive_url":null,"date":"2023-05-24T11:18:47","name":"tree-optimization/109849 - fix fallout of PRE hoisting change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111933.3A9FC3857720@sourceware.org/mbox/"},{"id":98447,"url":"https://patchwork.plctlab.org/api/1.2/patches/98447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111902.248450-1-juzhe.zhong@rivai.ai/","msgid":"<20230524111902.248450-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T11:19:02","name":"RISC-V: Add FRM_ prefix to dynamic rounding mode enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111902.248450-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98450,"url":"https://patchwork.plctlab.org/api/1.2/patches/98450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524112614.258594-1-juzhe.zhong@rivai.ai/","msgid":"<20230524112614.258594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T11:26:14","name":"RISC-V: Remove FRM_REGNUM dependency for rtx conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524112614.258594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98462,"url":"https://patchwork.plctlab.org/api/1.2/patches/98462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi/","msgid":"<76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-05-24T12:21:22","name":"Use expandargv on gcc-ar [PR77576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi/mbox/"},{"id":98470,"url":"https://patchwork.plctlab.org/api/1.2/patches/98470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec30da59-e022-905d-c710-3b1223ff7712@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T12:42:07","name":"[COMMITTED,1/3] PR tree-optimization/109695 - Choose better initial values for ranger.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec30da59-e022-905d-c710-3b1223ff7712@redhat.com/mbox/"},{"id":98473,"url":"https://patchwork.plctlab.org/api/1.2/patches/98473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com/","msgid":"<74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com>","list_archive_url":null,"date":"2023-05-24T12:42:21","name":"[COMMITTED,2/3] PR tree-optimization/109695 - Use negative values to reflect always_current in the, temporal cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com/mbox/"},{"id":98472,"url":"https://patchwork.plctlab.org/api/1.2/patches/98472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com/","msgid":"<419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com>","list_archive_url":null,"date":"2023-05-24T12:42:27","name":"[COMMITTED,3/3] PR tree-optimization/109695 - Only update global value if it changes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com/mbox/"},{"id":98482,"url":"https://patchwork.plctlab.org/api/1.2/patches/98482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524125332.30839-1-amonakov@ispras.ru/","msgid":"<20230524125332.30839-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-24T12:53:32","name":"doc: clarify semantics of vector bitwise shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524125332.30839-1-amonakov@ispras.ru/mbox/"},{"id":98520,"url":"https://patchwork.plctlab.org/api/1.2/patches/98520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YpKfOOwCwLH=qscZECsXcuyoN7qd7sFB0aQq-iAcBuHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T14:20:14","name":"[COMMITTED] i386: Add vv4qi3 expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YpKfOOwCwLH=qscZECsXcuyoN7qd7sFB0aQq-iAcBuHA@mail.gmail.com/mbox/"},{"id":98521,"url":"https://patchwork.plctlab.org/api/1.2/patches/98521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524142941.6838-1-juzhe.zhong@rivai.ai/","msgid":"<20230524142941.6838-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T14:29:41","name":"[V13] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524142941.6838-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98528,"url":"https://patchwork.plctlab.org/api/1.2/patches/98528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524144801.73537-1-juzhe.zhong@rivai.ai/","msgid":"<20230524144801.73537-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T14:48:01","name":"[V14] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524144801.73537-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98544,"url":"https://patchwork.plctlab.org/api/1.2/patches/98544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7719656.MHq7AAxBmi@minbar/","msgid":"<7719656.MHq7AAxBmi@minbar>","list_archive_url":null,"date":"2023-05-24T15:04:32","name":"libstdc++: Fix type of first argument to vec_cntm call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7719656.MHq7AAxBmi@minbar/mbox/"},{"id":98637,"url":"https://patchwork.plctlab.org/api/1.2/patches/98637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com/","msgid":"<7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com>","list_archive_url":null,"date":"2023-05-24T17:32:06","name":"[v3] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com/mbox/"},{"id":98639,"url":"https://patchwork.plctlab.org/api/1.2/patches/98639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com/","msgid":"<07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-24T17:54:06","name":"[i386] A minor code clean-up: Use NULL_RTX instead of nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com/mbox/"},{"id":98648,"url":"https://patchwork.plctlab.org/api/1.2/patches/98648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524184147.168078-1-aldyh@redhat.com/","msgid":"<20230524184147.168078-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-24T18:41:47","name":"[COMMITTED] Remove deprecated vrange::kind().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524184147.168078-1-aldyh@redhat.com/mbox/"},{"id":98660,"url":"https://patchwork.plctlab.org/api/1.2/patches/98660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524185559.1285583-1-jason@redhat.com/","msgid":"<20230524185559.1285583-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-24T18:55:59","name":"[RFC] c++: use __cxa_call_terminate for MUST_NOT_THROW [PR97720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524185559.1285583-1-jason@redhat.com/mbox/"},{"id":98662,"url":"https://patchwork.plctlab.org/api/1.2/patches/98662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d99cc8a9-1e19-4b84-89aa-f8a2c36b6ae1-1684955762561@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-05-24T19:16:02","name":"Fortran: reject bad DIM argument of SIZE intrinsic in simplification [PR104350]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d99cc8a9-1e19-4b84-89aa-f8a2c36b6ae1-1684955762561@3c-app-gmx-bap32/mbox/"},{"id":98672,"url":"https://patchwork.plctlab.org/api/1.2/patches/98672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce8b586f-119d-4589-be0e-cde57b7a609d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T21:19:07","name":"[COMMITTED,1/4] - Make ssa_cache and ssa_lazy_cache virtual.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce8b586f-119d-4589-be0e-cde57b7a609d@redhat.com/mbox/"},{"id":98675,"url":"https://patchwork.plctlab.org/api/1.2/patches/98675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com/","msgid":"<5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:21","name":"[COMMITTED,2/4] - Make ssa_cache a range_query.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com/mbox/"},{"id":98673,"url":"https://patchwork.plctlab.org/api/1.2/patches/98673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com/","msgid":"<92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:39","name":"[COMMITTED,3/4] Provide relation queries for a stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com/mbox/"},{"id":98674,"url":"https://patchwork.plctlab.org/api/1.2/patches/98674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com/","msgid":"<6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:52","name":"[COMMITTED,4/4] - Gimple range PHI analyzer and testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com/mbox/"},{"id":98720,"url":"https://patchwork.plctlab.org/api/1.2/patches/98720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOjw7vr0+OjTN4BB0DZ6=egk4r81affnLAXD0-xKwDpVQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T23:14:48","name":"[RFC] RISC-V: Eliminate extension after for *w instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOjw7vr0+OjTN4BB0DZ6=egk4r81affnLAXD0-xKwDpVQ@mail.gmail.com/mbox/"},{"id":98722,"url":"https://patchwork.plctlab.org/api/1.2/patches/98722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524233005.3284950-1-lili.cui@intel.com/","msgid":"<20230524233005.3284950-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-24T23:30:05","name":"Handle FMA friendly in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524233005.3284950-1-lili.cui@intel.com/mbox/"},{"id":98733,"url":"https://patchwork.plctlab.org/api/1.2/patches/98733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-2-qing.zhao@oracle.com/","msgid":"<20230525012255.2807393-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-25T01:22:54","name":"[1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-2-qing.zhao@oracle.com/mbox/"},{"id":98734,"url":"https://patchwork.plctlab.org/api/1.2/patches/98734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-3-qing.zhao@oracle.com/","msgid":"<20230525012255.2807393-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-25T01:22:55","name":"[2/2] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-3-qing.zhao@oracle.com/mbox/"},{"id":98755,"url":"https://patchwork.plctlab.org/api/1.2/patches/98755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025439.3362655-1-lin1.hu@intel.com/","msgid":"<20230525025439.3362655-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-05-25T02:54:39","name":"i386: Fix incorrect intrinsic signature for AVX512 s{lli|rai|rli}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025439.3362655-1-lin1.hu@intel.com/mbox/"},{"id":98757,"url":"https://patchwork.plctlab.org/api/1.2/patches/98757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025813.1232463-1-juzhe.zhong@rivai.ai/","msgid":"<20230525025813.1232463-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T02:58:13","name":"[V15] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025813.1232463-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98760,"url":"https://patchwork.plctlab.org/api/1.2/patches/98760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525030920.2569553-1-pan2.li@intel.com/","msgid":"<20230525030920.2569553-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-25T03:09:20","name":"[v6] RISC-V: Using merge approach to optimize repeating sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525030920.2569553-1-pan2.li@intel.com/mbox/"},{"id":98919,"url":"https://patchwork.plctlab.org/api/1.2/patches/98919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525044342.3815571-1-naveenh@marvell.com/","msgid":"<20230525044342.3815571-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T04:43:42","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525044342.3815571-1-naveenh@marvell.com/mbox/"},{"id":98918,"url":"https://patchwork.plctlab.org/api/1.2/patches/98918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525045147.3815773-1-naveenh@marvell.com/","msgid":"<20230525045147.3815773-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T04:51:47","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525045147.3815773-1-naveenh@marvell.com/mbox/"},{"id":98920,"url":"https://patchwork.plctlab.org/api/1.2/patches/98920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525050750.3816032-1-naveenh@marvell.com/","msgid":"<20230525050750.3816032-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T05:07:50","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525050750.3816032-1-naveenh@marvell.com/mbox/"},{"id":98921,"url":"https://patchwork.plctlab.org/api/1.2/patches/98921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525052029.3816261-1-naveenh@marvell.com/","msgid":"<20230525052029.3816261-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T05:20:29","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525052029.3816261-1-naveenh@marvell.com/mbox/"},{"id":98783,"url":"https://patchwork.plctlab.org/api/1.2/patches/98783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-1-aldyh@redhat.com/","msgid":"<20230525053520.244673-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:17","name":"[COMMITTED] Add an frange::set_nan() variant that takes a nan_state.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-1-aldyh@redhat.com/mbox/"},{"id":98784,"url":"https://patchwork.plctlab.org/api/1.2/patches/98784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-2-aldyh@redhat.com/","msgid":"<20230525053520.244673-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:18","name":"[COMMITTED] Hash known NANs correctly for franges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-2-aldyh@redhat.com/mbox/"},{"id":98785,"url":"https://patchwork.plctlab.org/api/1.2/patches/98785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-3-aldyh@redhat.com/","msgid":"<20230525053520.244673-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:19","name":"[COMMITTED] Disallow setting of NANs in frange setter unless setting trees.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-3-aldyh@redhat.com/mbox/"},{"id":98787,"url":"https://patchwork.plctlab.org/api/1.2/patches/98787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-4-aldyh@redhat.com/","msgid":"<20230525053520.244673-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:20","name":"[COMMITTED] Stream out NANs correctly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-4-aldyh@redhat.com/mbox/"},{"id":98798,"url":"https://patchwork.plctlab.org/api/1.2/patches/98798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525064806.1676311-1-juzhe.zhong@rivai.ai/","msgid":"<20230525064806.1676311-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T06:48:06","name":"RISC-V: Fix incorrect VXRM configuration in mode switching for CALL and ASM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525064806.1676311-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98922,"url":"https://patchwork.plctlab.org/api/1.2/patches/98922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065320.3816623-1-naveenh@marvell.com/","msgid":"<20230525065320.3816623-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T06:53:20","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065320.3816623-1-naveenh@marvell.com/mbox/"},{"id":98800,"url":"https://patchwork.plctlab.org/api/1.2/patches/98800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065824.3816727-1-naveenh@marvell.com/","msgid":"<20230525065824.3816727-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T06:58:24","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065824.3816727-1-naveenh@marvell.com/mbox/"},{"id":98802,"url":"https://patchwork.plctlab.org/api/1.2/patches/98802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065957.1872100-1-juzhe.zhong@rivai.ai/","msgid":"<20230525065957.1872100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T06:59:57","name":"[V2] RISC-V: Fix incorrect VXRM configuration in mode switching for CALL and ASM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065957.1872100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98835,"url":"https://patchwork.plctlab.org/api/1.2/patches/98835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525075406.270194-1-juzhe.zhong@rivai.ai/","msgid":"<20230525075406.270194-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T07:54:06","name":"RISC-V: Add RVV FRM enum for floating-point rounding mode intriniscs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525075406.270194-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98837,"url":"https://patchwork.plctlab.org/api/1.2/patches/98837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080507.1955270-1-poulhies@adacore.com/","msgid":"<20230525080507.1955270-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:07","name":"[COMMITTED] ada: Restrict use of formal parameters within exceptional cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080507.1955270-1-poulhies@adacore.com/mbox/"},{"id":98839,"url":"https://patchwork.plctlab.org/api/1.2/patches/98839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080519.1955422-1-poulhies@adacore.com/","msgid":"<20230525080519.1955422-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:19","name":"[COMMITTED] ada: Fix SPARK context not restored when Load_Unit is failing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080519.1955422-1-poulhies@adacore.com/mbox/"},{"id":98841,"url":"https://patchwork.plctlab.org/api/1.2/patches/98841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080520.1955484-1-poulhies@adacore.com/","msgid":"<20230525080520.1955484-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:20","name":"[COMMITTED] ada: Fix obsolete comment in Sinfo.Utils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080520.1955484-1-poulhies@adacore.com/mbox/"},{"id":98845,"url":"https://patchwork.plctlab.org/api/1.2/patches/98845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080522.1955545-1-poulhies@adacore.com/","msgid":"<20230525080522.1955545-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:22","name":"[COMMITTED] ada: Fix incorrect handling of Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080522.1955545-1-poulhies@adacore.com/mbox/"},{"id":98836,"url":"https://patchwork.plctlab.org/api/1.2/patches/98836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080524.1955610-1-poulhies@adacore.com/","msgid":"<20230525080524.1955610-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:24","name":"[COMMITTED] ada: Accept aliased parameters in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080524.1955610-1-poulhies@adacore.com/mbox/"},{"id":98840,"url":"https://patchwork.plctlab.org/api/1.2/patches/98840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080526.1955679-1-poulhies@adacore.com/","msgid":"<20230525080526.1955679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:26","name":"[COMMITTED] ada: Tune warning about assignment just before a raise statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080526.1955679-1-poulhies@adacore.com/mbox/"},{"id":98838,"url":"https://patchwork.plctlab.org/api/1.2/patches/98838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080528.1955789-1-poulhies@adacore.com/","msgid":"<20230525080528.1955789-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:28","name":"[COMMITTED] ada: Minor fixes in description of scope depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080528.1955789-1-poulhies@adacore.com/mbox/"},{"id":98850,"url":"https://patchwork.plctlab.org/api/1.2/patches/98850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080530.1955851-1-poulhies@adacore.com/","msgid":"<20230525080530.1955851-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:30","name":"[COMMITTED] ada: Add Entry_Cancel_Parameter to E_Label","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080530.1955851-1-poulhies@adacore.com/mbox/"},{"id":98844,"url":"https://patchwork.plctlab.org/api/1.2/patches/98844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080531.1955918-1-poulhies@adacore.com/","msgid":"<20230525080531.1955918-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:31","name":"[COMMITTED] ada: Handle controlling access parameters in DTWs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080531.1955918-1-poulhies@adacore.com/mbox/"},{"id":98853,"url":"https://patchwork.plctlab.org/api/1.2/patches/98853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080533.1955979-1-poulhies@adacore.com/","msgid":"<20230525080533.1955979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:33","name":"[COMMITTED] ada: Set Is_Not_Self_Hidden flag in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080533.1955979-1-poulhies@adacore.com/mbox/"},{"id":98842,"url":"https://patchwork.plctlab.org/api/1.2/patches/98842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080535.1956040-1-poulhies@adacore.com/","msgid":"<20230525080535.1956040-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:35","name":"[COMMITTED] ada: Reduce span of variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080535.1956040-1-poulhies@adacore.com/mbox/"},{"id":98859,"url":"https://patchwork.plctlab.org/api/1.2/patches/98859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080537.1956101-1-poulhies@adacore.com/","msgid":"<20230525080537.1956101-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:37","name":"[COMMITTED] ada: Maximize use of existing constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080537.1956101-1-poulhies@adacore.com/mbox/"},{"id":98849,"url":"https://patchwork.plctlab.org/api/1.2/patches/98849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080539.1956162-1-poulhies@adacore.com/","msgid":"<20230525080539.1956162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:38","name":"[COMMITTED] ada: Enrich documentation of subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080539.1956162-1-poulhies@adacore.com/mbox/"},{"id":98865,"url":"https://patchwork.plctlab.org/api/1.2/patches/98865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080542.1956225-1-poulhies@adacore.com/","msgid":"<20230525080542.1956225-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:42","name":"[COMMITTED] ada: Fix copy-paste mistake in analysis of Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080542.1956225-1-poulhies@adacore.com/mbox/"},{"id":98856,"url":"https://patchwork.plctlab.org/api/1.2/patches/98856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080543.1956286-1-poulhies@adacore.com/","msgid":"<20230525080543.1956286-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:43","name":"[COMMITTED] ada: Small tweak to implementation of by-copy semantics for storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080543.1956286-1-poulhies@adacore.com/mbox/"},{"id":98862,"url":"https://patchwork.plctlab.org/api/1.2/patches/98862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080545.1956348-1-poulhies@adacore.com/","msgid":"<20230525080545.1956348-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:45","name":"[COMMITTED] ada: Remove redundant guards from calls to Move_Aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080545.1956348-1-poulhies@adacore.com/mbox/"},{"id":98857,"url":"https://patchwork.plctlab.org/api/1.2/patches/98857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080547.1956409-1-poulhies@adacore.com/","msgid":"<20230525080547.1956409-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:47","name":"[COMMITTED] ada: Tune handling of attributes Old in contract Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080547.1956409-1-poulhies@adacore.com/mbox/"},{"id":98847,"url":"https://patchwork.plctlab.org/api/1.2/patches/98847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080549.1956470-1-poulhies@adacore.com/","msgid":"<20230525080549.1956470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:49","name":"[COMMITTED] ada: Add missing supportive code for recently added SPARK aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080549.1956470-1-poulhies@adacore.com/mbox/"},{"id":98854,"url":"https://patchwork.plctlab.org/api/1.2/patches/98854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080551.1956531-1-poulhies@adacore.com/","msgid":"<20230525080551.1956531-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:51","name":"[COMMITTED] ada: Fix comments for recently added SPARK aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080551.1956531-1-poulhies@adacore.com/mbox/"},{"id":98855,"url":"https://patchwork.plctlab.org/api/1.2/patches/98855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080552.1956593-1-poulhies@adacore.com/","msgid":"<20230525080552.1956593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:52","name":"[COMMITTED] ada: Prevent search of calls in preconditions from going too far","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080552.1956593-1-poulhies@adacore.com/mbox/"},{"id":98868,"url":"https://patchwork.plctlab.org/api/1.2/patches/98868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080554.1956654-1-poulhies@adacore.com/","msgid":"<20230525080554.1956654-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:54","name":"[COMMITTED] ada: Fix (again) incorrect handling of Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080554.1956654-1-poulhies@adacore.com/mbox/"},{"id":98858,"url":"https://patchwork.plctlab.org/api/1.2/patches/98858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080556.1956715-1-poulhies@adacore.com/","msgid":"<20230525080556.1956715-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:56","name":"[COMMITTED] ada: Remove unused initial value of a local variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080556.1956715-1-poulhies@adacore.com/mbox/"},{"id":98852,"url":"https://patchwork.plctlab.org/api/1.2/patches/98852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080557.1956782-1-poulhies@adacore.com/","msgid":"<20230525080557.1956782-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:57","name":"[COMMITTED] ada: Fix crash during function return analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080557.1956782-1-poulhies@adacore.com/mbox/"},{"id":98870,"url":"https://patchwork.plctlab.org/api/1.2/patches/98870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080559.1956848-1-poulhies@adacore.com/","msgid":"<20230525080559.1956848-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:59","name":"[COMMITTED] ada: Avoid duplicated streaming subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080559.1956848-1-poulhies@adacore.com/mbox/"},{"id":98872,"url":"https://patchwork.plctlab.org/api/1.2/patches/98872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080601.1956918-1-poulhies@adacore.com/","msgid":"<20230525080601.1956918-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:01","name":"[COMMITTED] ada: Simplify copying of node lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080601.1956918-1-poulhies@adacore.com/mbox/"},{"id":98860,"url":"https://patchwork.plctlab.org/api/1.2/patches/98860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080603.1956979-1-poulhies@adacore.com/","msgid":"<20230525080603.1956979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:03","name":"[COMMITTED] ada: Clean up copying of node trees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080603.1956979-1-poulhies@adacore.com/mbox/"},{"id":98861,"url":"https://patchwork.plctlab.org/api/1.2/patches/98861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080604.1957044-1-poulhies@adacore.com/","msgid":"<20230525080604.1957044-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:04","name":"[COMMITTED] ada: Deconstruct a no longer used parameter of New_Copy_Tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080604.1957044-1-poulhies@adacore.com/mbox/"},{"id":98875,"url":"https://patchwork.plctlab.org/api/1.2/patches/98875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080606.1957110-1-poulhies@adacore.com/","msgid":"<20230525080606.1957110-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:06","name":"[COMMITTED] ada: Fix copying of quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080606.1957110-1-poulhies@adacore.com/mbox/"},{"id":98863,"url":"https://patchwork.plctlab.org/api/1.2/patches/98863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080608.1957177-1-poulhies@adacore.com/","msgid":"<20230525080608.1957177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:08","name":"[COMMITTED] ada: Decouple size of addresses and pointers from size of memory space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080608.1957177-1-poulhies@adacore.com/mbox/"},{"id":98866,"url":"https://patchwork.plctlab.org/api/1.2/patches/98866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080610.1957238-1-poulhies@adacore.com/","msgid":"<20230525080610.1957238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:10","name":"[COMMITTED] ada: Switch from E_Void to Is_Not_Self_Hidden","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080610.1957238-1-poulhies@adacore.com/mbox/"},{"id":98843,"url":"https://patchwork.plctlab.org/api/1.2/patches/98843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080611.1957303-1-poulhies@adacore.com/","msgid":"<20230525080611.1957303-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:11","name":"[COMMITTED] ada: Fix error message for Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080611.1957303-1-poulhies@adacore.com/mbox/"},{"id":98864,"url":"https://patchwork.plctlab.org/api/1.2/patches/98864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080613.1957364-1-poulhies@adacore.com/","msgid":"<20230525080613.1957364-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:13","name":"[COMMITTED] ada: Add size clause to System.Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080613.1957364-1-poulhies@adacore.com/mbox/"},{"id":98878,"url":"https://patchwork.plctlab.org/api/1.2/patches/98878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080615.1957429-1-poulhies@adacore.com/","msgid":"<20230525080615.1957429-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:15","name":"[COMMITTED] ada: Minor adjustments to Standard_Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080615.1957429-1-poulhies@adacore.com/mbox/"},{"id":98879,"url":"https://patchwork.plctlab.org/api/1.2/patches/98879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080616.1957490-1-poulhies@adacore.com/","msgid":"<20230525080616.1957490-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:16","name":"[COMMITTED] ada: Require successful build of xsnamest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080616.1957490-1-poulhies@adacore.com/mbox/"},{"id":98848,"url":"https://patchwork.plctlab.org/api/1.2/patches/98848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080618.1957604-1-poulhies@adacore.com/","msgid":"<20230525080618.1957604-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:18","name":"[COMMITTED] ada: Fix internal error on declare-expression in post-condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080618.1957604-1-poulhies@adacore.com/mbox/"},{"id":98877,"url":"https://patchwork.plctlab.org/api/1.2/patches/98877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080620.1957675-1-poulhies@adacore.com/","msgid":"<20230525080620.1957675-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:20","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on VxWorks 7 PPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080620.1957675-1-poulhies@adacore.com/mbox/"},{"id":98867,"url":"https://patchwork.plctlab.org/api/1.2/patches/98867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080622.1957738-1-poulhies@adacore.com/","msgid":"<20230525080622.1957738-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:22","name":"[COMMITTED] ada: Crash on empty aggregate using the Ada 2022 notation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080622.1957738-1-poulhies@adacore.com/mbox/"},{"id":98869,"url":"https://patchwork.plctlab.org/api/1.2/patches/98869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080624.1957802-1-poulhies@adacore.com/","msgid":"<20230525080624.1957802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:24","name":"[COMMITTED] ada: Use procedural variant of Next_Index where possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080624.1957802-1-poulhies@adacore.com/mbox/"},{"id":98873,"url":"https://patchwork.plctlab.org/api/1.2/patches/98873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080625.1957864-1-poulhies@adacore.com/","msgid":"<20230525080625.1957864-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:25","name":"[COMMITTED] ada: Expect Exceptional_Cases as a context for attribute Old","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080625.1957864-1-poulhies@adacore.com/mbox/"},{"id":98876,"url":"https://patchwork.plctlab.org/api/1.2/patches/98876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080628.1957926-1-poulhies@adacore.com/","msgid":"<20230525080628.1957926-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:28","name":"[COMMITTED] ada: Missing warning on null-excluding array aggregate component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080628.1957926-1-poulhies@adacore.com/mbox/"},{"id":98881,"url":"https://patchwork.plctlab.org/api/1.2/patches/98881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525083231.234-1-jinma@linux.alibaba.com/","msgid":"<20230525083231.234-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-25T08:32:31","name":"RISC-V: In pipeline scheduling, insns should not be fusion in different BB blocks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525083231.234-1-jinma@linux.alibaba.com/mbox/"},{"id":98902,"url":"https://patchwork.plctlab.org/api/1.2/patches/98902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525090006.E0AA93857702@sourceware.org/","msgid":"<20230525090006.E0AA93857702@sourceware.org>","list_archive_url":null,"date":"2023-05-25T08:59:21","name":"tree-optimization/109791 - expand &x + off for niter compute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525090006.E0AA93857702@sourceware.org/mbox/"},{"id":98906,"url":"https://patchwork.plctlab.org/api/1.2/patches/98906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com/","msgid":"<1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com>","list_archive_url":null,"date":"2023-05-25T09:03:27","name":"RISC-V: Add autovec sign/zero extension and truncation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-05/mbox/"},{"id":24,"url":"https://patchwork.plctlab.org/api/1.2/bundles/24/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-06/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-06","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":101534,"url":"https://patchwork.plctlab.org/api/1.2/patches/101534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-2-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-2-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:32","name":"[1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-2-vineetg@rivosinc.com/mbox/"},{"id":101535,"url":"https://patchwork.plctlab.org/api/1.2/patches/101535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-3-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-3-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:33","name":"[2/3] RISC-V: Add missing torture-init and torture-finish for rvv.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-3-vineetg@rivosinc.com/mbox/"},{"id":101536,"url":"https://patchwork.plctlab.org/api/1.2/patches/101536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-4-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-4-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:34","name":"[3/3] testsuite: print any leaking torture options for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-4-vineetg@rivosinc.com/mbox/"},{"id":101552,"url":"https://patchwork.plctlab.org/api/1.2/patches/101552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com/","msgid":"<01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com>","list_archive_url":null,"date":"2023-05-31T17:39:28","name":"Move std::search into algobase.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com/mbox/"},{"id":101560,"url":"https://patchwork.plctlab.org/api/1.2/patches/101560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-2-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:28","name":"[1/3] testsuite: move handle-multiline-outputs to before check for blank lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-2-dmalcolm@redhat.com/mbox/"},{"id":101562,"url":"https://patchwork.plctlab.org/api/1.2/patches/101562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-3-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:29","name":"[2/3] diagnostics: add support for \"text art\" diagrams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-3-dmalcolm@redhat.com/mbox/"},{"id":101561,"url":"https://patchwork.plctlab.org/api/1.2/patches/101561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-4-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:30","name":"[3/3] analyzer: add text-art visualizations of out-of-bounds accesses [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-4-dmalcolm@redhat.com/mbox/"},{"id":101569,"url":"https://patchwork.plctlab.org/api/1.2/patches/101569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9de24e4-2cf9-1434-4148-7a7634ad4253@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-31T19:22:15","name":"OpenMP/Fortran: Permit pure directives inside PURE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9de24e4-2cf9-1434-4148-7a7634ad4253@codesourcery.com/mbox/"},{"id":101571,"url":"https://patchwork.plctlab.org/api/1.2/patches/101571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200257.6784-1-jwakely@redhat.com/","msgid":"<20230531200257.6784-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:02:57","name":"[committed] libstdc++: Fix configure test for 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200257.6784-1-jwakely@redhat.com/mbox/"},{"id":101575,"url":"https://patchwork.plctlab.org/api/1.2/patches/101575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200532.6935-1-jwakely@redhat.com/","msgid":"<20230531200532.6935-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:05:32","name":"[committed] libstdc++: Fix build for targets without _Float128 [PR109921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200532.6935-1-jwakely@redhat.com/mbox/"},{"id":101582,"url":"https://patchwork.plctlab.org/api/1.2/patches/101582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202019.20749-1-jwakely@redhat.com/","msgid":"<20230531202019.20749-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:19","name":"[committed] libstdc++: Express std::vector'\''s size() <= capacity() invariant in code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202019.20749-1-jwakely@redhat.com/mbox/"},{"id":101583,"url":"https://patchwork.plctlab.org/api/1.2/patches/101583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202049.20903-1-jwakely@redhat.com/","msgid":"<20230531202049.20903-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:49","name":"[committed] libstdc++: Stop using _GLIBCXX_USE_C99_MATH_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202049.20903-1-jwakely@redhat.com/mbox/"},{"id":101584,"url":"https://patchwork.plctlab.org/api/1.2/patches/101584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202054.20950-1-jwakely@redhat.com/","msgid":"<20230531202054.20950-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:54","name":"[committed] libstdc++: Add separate autoconf macro for std::float_t and std::double_t [PR109818]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202054.20950-1-jwakely@redhat.com/mbox/"},{"id":101653,"url":"https://patchwork.plctlab.org/api/1.2/patches/101653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601023615.89715-1-juzhe.zhong@rivai.ai/","msgid":"<20230601023615.89715-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T02:36:15","name":"[V2] RISC-V: Support RVV permutation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601023615.89715-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101677,"url":"https://patchwork.plctlab.org/api/1.2/patches/101677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031255.1268906-1-jason@redhat.com/","msgid":"<20230601031255.1268906-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:12:55","name":"libstdc++: optimize EH phase 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031255.1268906-1-jason@redhat.com/mbox/"},{"id":101686,"url":"https://patchwork.plctlab.org/api/1.2/patches/101686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031819.1271768-1-jason@redhat.com/","msgid":"<20230601031819.1271768-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:18:19","name":"[pushed] c++: make -fpermissive avoid -Werror=narrowing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031819.1271768-1-jason@redhat.com/mbox/"},{"id":101690,"url":"https://patchwork.plctlab.org/api/1.2/patches/101690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601033136.1275711-1-jason@redhat.com/","msgid":"<20230601033136.1275711-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:31:36","name":"doc: improve docs for -pedantic{,-errors}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601033136.1275711-1-jason@redhat.com/mbox/"},{"id":101693,"url":"https://patchwork.plctlab.org/api/1.2/patches/101693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601034823.235258-1-juzhe.zhong@rivai.ai/","msgid":"<20230601034823.235258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T03:48:23","name":"RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601034823.235258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101701,"url":"https://patchwork.plctlab.org/api/1.2/patches/101701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601042658.2128162-1-yunqiang.su@cipunited.com/","msgid":"<20230601042658.2128162-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-01T04:26:58","name":"[v5] MIPS: Add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601042658.2128162-1-yunqiang.su@cipunited.com/mbox/"},{"id":101702,"url":"https://patchwork.plctlab.org/api/1.2/patches/101702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601043617.173986-1-juzhe.zhong@rivai.ai/","msgid":"<20230601043617.173986-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T04:36:17","name":"[V3] VECT: Change flow of decrement IV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601043617.173986-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101704,"url":"https://patchwork.plctlab.org/api/1.2/patches/101704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com/","msgid":"<94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com>","list_archive_url":null,"date":"2023-06-01T05:23:02","name":"PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com/mbox/"},{"id":101743,"url":"https://patchwork.plctlab.org/api/1.2/patches/101743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp/","msgid":"<931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp>","list_archive_url":null,"date":"2023-06-01T06:01:07","name":"[2/3,v3] xtensa: Add '\''adddi3'\'' and '\''subdi3'\'' insn patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp/mbox/"},{"id":101786,"url":"https://patchwork.plctlab.org/api/1.2/patches/101786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601071746.2403557-1-pan2.li@intel.com/","msgid":"<20230601071746.2403557-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-01T07:17:46","name":"RISC-V: Introduce vfloat16m{f}*_t and their machine mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601071746.2403557-1-pan2.li@intel.com/mbox/"},{"id":101787,"url":"https://patchwork.plctlab.org/api/1.2/patches/101787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbe83266-cae1-e46c-2288-1a944e0c607b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T07:20:08","name":"[v5] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbe83266-cae1-e46c-2288-1a944e0c607b@linux.ibm.com/mbox/"},{"id":101791,"url":"https://patchwork.plctlab.org/api/1.2/patches/101791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601073136.193330-1-juzhe.zhong@rivai.ai/","msgid":"<20230601073136.193330-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T07:31:36","name":"RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv instruction optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601073136.193330-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101796,"url":"https://patchwork.plctlab.org/api/1.2/patches/101796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601074855.319313-1-hongtao.liu@intel.com/","msgid":"<20230601074855.319313-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-01T07:48:55","name":"Don'\''t try bswap + rotate when TYPE_PRECISION(n->type) > n->range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601074855.319313-1-hongtao.liu@intel.com/mbox/"},{"id":101801,"url":"https://patchwork.plctlab.org/api/1.2/patches/101801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601083212.245585-1-juzhe.zhong@rivai.ai/","msgid":"<20230601083212.245585-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T08:32:12","name":"[V2] RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv instruction optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601083212.245585-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101805,"url":"https://patchwork.plctlab.org/api/1.2/patches/101805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5270701.LvFx2qVVIh@minbar/","msgid":"<5270701.LvFx2qVVIh@minbar>","list_archive_url":null,"date":"2023-06-01T08:49:58","name":"[committed] libstdc++: Fix condition for supported SIMD types on ARMv8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5270701.LvFx2qVVIh@minbar/mbox/"},{"id":101874,"url":"https://patchwork.plctlab.org/api/1.2/patches/101874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601103737.99717-1-jwakely@redhat.com/","msgid":"<20230601103737.99717-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T10:37:37","name":"doc: Fix description of x86 -m32 option [PR109954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601103737.99717-1-jwakely@redhat.com/mbox/"},{"id":101902,"url":"https://patchwork.plctlab.org/api/1.2/patches/101902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601120853.2769642-1-pan2.li@intel.com/","msgid":"<20230601120853.2769642-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-01T12:08:53","name":"RISC-V: Add test for vfloat16*_t (non tuple) types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601120853.2769642-1-pan2.li@intel.com/mbox/"},{"id":101964,"url":"https://patchwork.plctlab.org/api/1.2/patches/101964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZkM1UjbyrupBsmmPf8cmpExTRHrO2HB22f6M1-vigCnA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T14:24:57","name":"[COMMITTED] cse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZkM1UjbyrupBsmmPf8cmpExTRHrO2HB22f6M1-vigCnA@mail.gmail.com/mbox/"},{"id":101974,"url":"https://patchwork.plctlab.org/api/1.2/patches/101974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-1-ppalka@redhat.com/","msgid":"<20230601144938.765175-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T14:49:36","name":"[1/2] c++: refine dependent_alias_template_spec_p [PR90679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-1-ppalka@redhat.com/mbox/"},{"id":101975,"url":"https://patchwork.plctlab.org/api/1.2/patches/101975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-2-ppalka@redhat.com/","msgid":"<20230601144938.765175-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T14:49:37","name":"[2/2] c++: partial ordering and dep alias tmpl specs [PR90679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-2-ppalka@redhat.com/mbox/"},{"id":102002,"url":"https://patchwork.plctlab.org/api/1.2/patches/102002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150711.257954-1-jwakely@redhat.com/","msgid":"<20230601150711.257954-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:07:11","name":"[committed] libstdc++: Document removal of implicit allocator rebinding extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150711.257954-1-jwakely@redhat.com/mbox/"},{"id":102005,"url":"https://patchwork.plctlab.org/api/1.2/patches/102005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150958.268109-1-jwakely@redhat.com/","msgid":"<20230601150958.268109-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:09:58","name":"[committed] libstdc++: Fix code size regressions in std::vector [PR110060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150958.268109-1-jwakely@redhat.com/mbox/"},{"id":102006,"url":"https://patchwork.plctlab.org/api/1.2/patches/102006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601151004.268138-1-jwakely@redhat.com/","msgid":"<20230601151004.268138-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:10:04","name":"[committed] libstdc++: Do not use std::expected::value() in monadic ops (LWG 3938)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601151004.268138-1-jwakely@redhat.com/mbox/"},{"id":102020,"url":"https://patchwork.plctlab.org/api/1.2/patches/102020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKQcWUnq72PBYJb5YGT6x=tWnO_MhEFA_R7FmPpHE3jSA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T15:20:46","name":"[fortran] PR87477 - [meta-bug] [F03] issues concerning the ASSOCIATE statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKQcWUnq72PBYJb5YGT6x=tWnO_MhEFA_R7FmPpHE3jSA@mail.gmail.com/mbox/"},{"id":102062,"url":"https://patchwork.plctlab.org/api/1.2/patches/102062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155651.305379-1-jwakely@redhat.com/","msgid":"<20230601155651.305379-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:56:51","name":"[committed] libstdc++: Fix PSTL test that fails in C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155651.305379-1-jwakely@redhat.com/mbox/"},{"id":102065,"url":"https://patchwork.plctlab.org/api/1.2/patches/102065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155856.305565-1-jwakely@redhat.com/","msgid":"<20230601155856.305565-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:58:56","name":"libstdc++: Use AS_IF in configure.ac","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155856.305565-1-jwakely@redhat.com/mbox/"},{"id":102070,"url":"https://patchwork.plctlab.org/api/1.2/patches/102070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92f28d5-a7ef-34e5-044d-0ee04771a280@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T16:30:02","name":"inline: improve internal function costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92f28d5-a7ef-34e5-044d-0ee04771a280@arm.com/mbox/"},{"id":102073,"url":"https://patchwork.plctlab.org/api/1.2/patches/102073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21150fd3-ff31-1188-5876-768e7a5edc84@arm.com/","msgid":"<21150fd3-ff31-1188-5876-768e7a5edc84@arm.com>","list_archive_url":null,"date":"2023-06-01T16:31:42","name":"gimple-range: implement widen plus range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21150fd3-ff31-1188-5876-768e7a5edc84@arm.com/mbox/"},{"id":102141,"url":"https://patchwork.plctlab.org/api/1.2/patches/102141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1c63e58d-07b4-4137-a7be-3648399ce8db-1685646310303@3c-app-gmx-bap24/","msgid":"","list_archive_url":null,"date":"2023-06-01T19:05:10","name":"Fortran: force error on bad KIND specifier [PR88552]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1c63e58d-07b4-4137-a7be-3648399ce8db-1685646310303@3c-app-gmx-bap24/mbox/"},{"id":102161,"url":"https://patchwork.plctlab.org/api/1.2/patches/102161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193853.160037-1-vineetg@rivosinc.com/","msgid":"<20230601193853.160037-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-01T19:38:53","name":"[Committed] testsuite: Unbork multilib setups using -march flags (RISC-V)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193853.160037-1-vineetg@rivosinc.com/mbox/"},{"id":102162,"url":"https://patchwork.plctlab.org/api/1.2/patches/102162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193945.160085-1-vineetg@rivosinc.com/","msgid":"<20230601193945.160085-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-01T19:39:45","name":"[Committed] testsuite: print any leaking torture options for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193945.160085-1-vineetg@rivosinc.com/mbox/"},{"id":102163,"url":"https://patchwork.plctlab.org/api/1.2/patches/102163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com/","msgid":"<602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-01T20:01:44","name":"rs6000: Fix arguments for __builtin_altivec_tr_stxvrwx, __builtin_altivec_tr_stxvrhx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com/mbox/"},{"id":102171,"url":"https://patchwork.plctlab.org/api/1.2/patches/102171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6281b22-bf93-fe03-d461-6f597849bf98@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T20:12:21","name":"[RFC] range-op restructuring","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6281b22-bf93-fe03-d461-6f597849bf98@redhat.com/mbox/"},{"id":102205,"url":"https://patchwork.plctlab.org/api/1.2/patches/102205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601214224.1468391-1-ppalka@redhat.com/","msgid":"<20230601214224.1468391-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T21:42:24","name":"c++: fix up caching of level lowered ttps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601214224.1468391-1-ppalka@redhat.com/mbox/"},{"id":102232,"url":"https://patchwork.plctlab.org/api/1.2/patches/102232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601230441.294259-1-juzhe.zhong@rivai.ai/","msgid":"<20230601230441.294259-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T23:04:41","name":"RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601230441.294259-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102233,"url":"https://patchwork.plctlab.org/api/1.2/patches/102233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com/","msgid":"<0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-01T23:11:25","name":"rs6000: Fix expected counts powerpc/p9-vec-length-full","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com/mbox/"},{"id":102236,"url":"https://patchwork.plctlab.org/api/1.2/patches/102236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601231907.3879-1-juzhe.zhong@rivai.ai/","msgid":"<20230601231907.3879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T23:19:07","name":"RISC-V: Add __RISCV_ prefix to VXRM and FRM enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601231907.3879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102248,"url":"https://patchwork.plctlab.org/api/1.2/patches/102248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602004908.2571237-1-hongtao.liu@intel.com/","msgid":"<20230602004908.2571237-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-02T00:49:08","name":"i386: Add missing vector truncate patterns [PR92658].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602004908.2571237-1-hongtao.liu@intel.com/mbox/"},{"id":102249,"url":"https://patchwork.plctlab.org/api/1.2/patches/102249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602010015.2571612-1-hongtao.liu@intel.com/","msgid":"<20230602010015.2571612-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-02T01:00:15","name":"[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602010015.2571612-1-hongtao.liu@intel.com/mbox/"},{"id":102262,"url":"https://patchwork.plctlab.org/api/1.2/patches/102262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602013115.1613501-1-jason@redhat.com/","msgid":"<20230602013115.1613501-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T01:31:15","name":"[RFA] c++: make initializer_list array static again [PR110070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602013115.1613501-1-jason@redhat.com/mbox/"},{"id":102277,"url":"https://patchwork.plctlab.org/api/1.2/patches/102277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020426.63191-1-juzhe.zhong@rivai.ai/","msgid":"<20230602020426.63191-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T02:04:26","name":"RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020426.63191-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102278,"url":"https://patchwork.plctlab.org/api/1.2/patches/102278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020447.63264-1-juzhe.zhong@rivai.ai/","msgid":"<20230602020447.63264-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T02:04:47","name":"[V2] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020447.63264-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102280,"url":"https://patchwork.plctlab.org/api/1.2/patches/102280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602021059.2229464-1-yunqiang.su@cipunited.com/","msgid":"<20230602021059.2229464-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-02T02:10:59","name":"[COMMITTED] MAINTAINERS: Add myself as MIPS port maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602021059.2229464-1-yunqiang.su@cipunited.com/mbox/"},{"id":102283,"url":"https://patchwork.plctlab.org/api/1.2/patches/102283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602024341.1629656-1-jason@redhat.com/","msgid":"<20230602024341.1629656-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T02:43:41","name":"[RFA] varasm: check float size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602024341.1629656-1-jason@redhat.com/mbox/"},{"id":102287,"url":"https://patchwork.plctlab.org/api/1.2/patches/102287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602030443.124743-1-juzhe.zhong@rivai.ai/","msgid":"<20230602030443.124743-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T03:04:43","name":"RISC-V: Fix warning in predicated.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602030443.124743-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102300,"url":"https://patchwork.plctlab.org/api/1.2/patches/102300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602055617.63608-1-lidie@eswincomputing.com/","msgid":"<20230602055617.63608-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T05:56:17","name":"RISC-V: Remove unnecessary md pattern for TARGET_XTHEADCONDMOV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602055617.63608-1-lidie@eswincomputing.com/mbox/"},{"id":102317,"url":"https://patchwork.plctlab.org/api/1.2/patches/102317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602063140.29401-1-juzhe.zhong@rivai.ai/","msgid":"<20230602063140.29401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T06:31:40","name":"RISC-V: Optimize reverse series index vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602063140.29401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102334,"url":"https://patchwork.plctlab.org/api/1.2/patches/102334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602070726.3807539-1-yanzhang.wang@intel.com/","msgid":"<20230602070726.3807539-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-02T07:07:26","name":"RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602070726.3807539-1-yanzhang.wang@intel.com/mbox/"},{"id":102342,"url":"https://patchwork.plctlab.org/api/1.2/patches/102342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602073559.2690527-1-apinski@marvell.com/","msgid":"<20230602073559.2690527-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-02T07:35:59","name":"rtl-optimization: [PR102733] DSE removing address which only differ by address space.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602073559.2690527-1-apinski@marvell.com/mbox/"},{"id":102376,"url":"https://patchwork.plctlab.org/api/1.2/patches/102376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55462f69-84b8-6efb-b98e-399390928420@gjlay.de/","msgid":"<55462f69-84b8-6efb-b98e-399390928420@gjlay.de>","list_archive_url":null,"date":"2023-06-02T08:46:41","name":"Fix PR101188 wrong code from postreload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55462f69-84b8-6efb-b98e-399390928420@gjlay.de/mbox/"},{"id":102412,"url":"https://patchwork.plctlab.org/api/1.2/patches/102412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602093333.19552-1-juzhe.zhong@rivai.ai/","msgid":"<20230602093333.19552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T09:33:33","name":"[V2] RISC-V: Fix warning in predicated.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602093333.19552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102426,"url":"https://patchwork.plctlab.org/api/1.2/patches/102426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y868a4b.fsf@euler.schwinge.homeip.net/","msgid":"<875y868a4b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-02T09:52:04","name":"Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y868a4b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":102427,"url":"https://patchwork.plctlab.org/api/1.2/patches/102427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com/","msgid":"<9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com>","list_archive_url":null,"date":"2023-06-02T09:53:59","name":"[PR110086] avr: Fix ICE on optimize attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com/mbox/"},{"id":102473,"url":"https://patchwork.plctlab.org/api/1.2/patches/102473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-1-gaofei@eswincomputing.com/","msgid":"<20230602104247.26454-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T10:42:46","name":"[1/2,RISC-V] fix cfi issue in save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-1-gaofei@eswincomputing.com/mbox/"},{"id":102474,"url":"https://patchwork.plctlab.org/api/1.2/patches/102474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-2-gaofei@eswincomputing.com/","msgid":"<20230602104247.26454-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T10:42:47","name":"[2/2,V3,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-2-gaofei@eswincomputing.com/mbox/"},{"id":102502,"url":"https://patchwork.plctlab.org/api/1.2/patches/102502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfa51b3b-c7b9-197b-923c-aeb8eed903fe@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-06-02T11:38:04","name":"[avr,committed] Improve operations on non-LD_REGS when the operation follows a move from LD_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfa51b3b-c7b9-197b-923c-aeb8eed903fe@gjlay.de/mbox/"},{"id":102549,"url":"https://patchwork.plctlab.org/api/1.2/patches/102549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602132057.293160-1-lehua.ding@rivai.ai/","msgid":"<20230602132057.293160-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-02T13:20:57","name":"Add more ForEachMacros to clang-format file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602132057.293160-1-lehua.ding@rivai.ai/mbox/"},{"id":102559,"url":"https://patchwork.plctlab.org/api/1.2/patches/102559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133239.66945-1-dmalcolm@redhat.com/","msgid":"<20230602133239.66945-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-02T13:32:39","name":"[pushed] analyzer: regions in different memory spaces can'\''t alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133239.66945-1-dmalcolm@redhat.com/mbox/"},{"id":102561,"url":"https://patchwork.plctlab.org/api/1.2/patches/102561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133245.66990-1-dmalcolm@redhat.com/","msgid":"<20230602133245.66990-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-02T13:32:45","name":"[pushed] analyzer: implement various atomic builtins [PR109015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133245.66990-1-dmalcolm@redhat.com/mbox/"},{"id":102575,"url":"https://patchwork.plctlab.org/api/1.2/patches/102575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com/","msgid":"<005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-02T14:17:19","name":"New wi::bitreverse function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com/mbox/"},{"id":102578,"url":"https://patchwork.plctlab.org/api/1.2/patches/102578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142920.1793173-1-ppalka@redhat.com/","msgid":"<20230602142920.1793173-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T14:29:20","name":"c++: is_specialization_of_friend confusion [PR109923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142920.1793173-1-ppalka@redhat.com/mbox/"},{"id":102579,"url":"https://patchwork.plctlab.org/api/1.2/patches/102579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142928.1793231-1-ppalka@redhat.com/","msgid":"<20230602142928.1793231-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T14:29:27","name":"c++: simplify TEMPLATE_TEMPLATE_PARM hashing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142928.1793231-1-ppalka@redhat.com/mbox/"},{"id":102582,"url":"https://patchwork.plctlab.org/api/1.2/patches/102582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUNB1N9TtJrtJmagXi+y7QbVbc1HRV0B=eC200jiFR+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T14:50:51","name":"[COMMITTED] reg-stack: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUNB1N9TtJrtJmagXi+y7QbVbc1HRV0B=eC200jiFR+A@mail.gmail.com/mbox/"},{"id":102592,"url":"https://patchwork.plctlab.org/api/1.2/patches/102592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602151534.2132668-1-ppalka@redhat.com/","msgid":"<20230602151534.2132668-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:15:34","name":"c++: replace in_template_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602151534.2132668-1-ppalka@redhat.com/mbox/"},{"id":102596,"url":"https://patchwork.plctlab.org/api/1.2/patches/102596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-2-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:41","name":"[01/12,contrib] validate_failures.py: Avoid testsuite aliasing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102601,"url":"https://patchwork.plctlab.org/api/1.2/patches/102601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-3-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-3-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:42","name":"[02/12,contrib] validate_failures.py: Support expiry attributes in manifests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-3-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102600,"url":"https://patchwork.plctlab.org/api/1.2/patches/102600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-4-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-4-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:43","name":"[03/12,contrib] validate_failures.py: Read in manifest when comparing build dirs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-4-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102598,"url":"https://patchwork.plctlab.org/api/1.2/patches/102598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-5-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-5-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:44","name":"[04/12,contrib] validate_failures.py: Simplify GetManifestPath()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-5-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102603,"url":"https://patchwork.plctlab.org/api/1.2/patches/102603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-6-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-6-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:45","name":"[05/12,contrib] validate_failures.py: Add more verbosity levels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-6-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102602,"url":"https://patchwork.plctlab.org/api/1.2/patches/102602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-7-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-7-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:46","name":"[06/12,contrib] validate_failures.py: Be more stringent in parsing result lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-7-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102604,"url":"https://patchwork.plctlab.org/api/1.2/patches/102604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-8-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-8-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:47","name":"[07/12,contrib] validate_failures.py: Use exit code \"2\" to indicate regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-8-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102607,"url":"https://patchwork.plctlab.org/api/1.2/patches/102607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-9-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-9-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:48","name":"[08/12,contrib] validate_failures.py: Support \"$tool:\" prefix in exp names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-9-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102605,"url":"https://patchwork.plctlab.org/api/1.2/patches/102605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-10-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-10-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:49","name":"[09/12,contrib] validate_failures.py: Improve error output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-10-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102599,"url":"https://patchwork.plctlab.org/api/1.2/patches/102599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-11-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-11-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:50","name":"[10/12,contrib] validate_failures.py: Add new option --invert_match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-11-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102606,"url":"https://patchwork.plctlab.org/api/1.2/patches/102606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-12-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-12-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:51","name":"[11/12,contrib] validate_failures.py: Add \"--expiry_date YYYYMMDD\" option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-12-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102608,"url":"https://patchwork.plctlab.org/api/1.2/patches/102608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-13-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-13-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:52","name":"[12/12,contrib] validate_failures.py: Ignore stray filesystem paths in results","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-13-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102628,"url":"https://patchwork.plctlab.org/api/1.2/patches/102628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LO4P265MB5914451ED93CD4B7617714A0804EA@LO4P265MB5914.GBRP265.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-06-02T15:44:48","name":"libstdc++: Do not assume existence of char8_t codecvt facet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LO4P265MB5914451ED93CD4B7617714A0804EA@LO4P265MB5914.GBRP265.PROD.OUTLOOK.COM/mbox/"},{"id":102629,"url":"https://patchwork.plctlab.org/api/1.2/patches/102629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155349.1775177-1-jason@redhat.com/","msgid":"<20230602155349.1775177-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:53:49","name":"[pushed] c++: fix explicit/copy problem [PR109247]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155349.1775177-1-jason@redhat.com/mbox/"},{"id":102630,"url":"https://patchwork.plctlab.org/api/1.2/patches/102630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155519.2300026-1-ppalka@redhat.com/","msgid":"<20230602155519.2300026-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:55:19","name":"c++: bad '\''this'\'' conversion for nullary memfn [PR106760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155519.2300026-1-ppalka@redhat.com/mbox/"},{"id":102633,"url":"https://patchwork.plctlab.org/api/1.2/patches/102633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZHoSxwZsh98WrBSU@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T16:03:19","name":"[committed] btf: Fix -Wformat errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZHoSxwZsh98WrBSU@arm.com/mbox/"},{"id":102654,"url":"https://patchwork.plctlab.org/api/1.2/patches/102654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602163513.6196-1-david.faust@oracle.com/","msgid":"<20230602163513.6196-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-06-02T16:35:13","name":"[committed] btf: fix bootstrap -Wformat errors [PR110073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602163513.6196-1-david.faust@oracle.com/mbox/"},{"id":102659,"url":"https://patchwork.plctlab.org/api/1.2/patches/102659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898223DE66773176183922A9834EA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T17:28:10","name":"libatomic: Enable lock-free 128-bit atomics on AArch64 [PR110061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898223DE66773176183922A9834EA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":102660,"url":"https://patchwork.plctlab.org/api/1.2/patches/102660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-53104170-fe2e-4a0d-b0a0-4e2819ba1e90-1685729154070@3c-app-gmx-bs08/","msgid":"","list_archive_url":null,"date":"2023-06-02T18:05:54","name":"[committed] Fortran: fix diagnostics for SELECT RANK [PR100607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-53104170-fe2e-4a0d-b0a0-4e2819ba1e90-1685729154070@3c-app-gmx-bs08/mbox/"},{"id":102677,"url":"https://patchwork.plctlab.org/api/1.2/patches/102677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602191153.78156-1-iain@sandoe.co.uk/","msgid":"<20230602191153.78156-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-02T19:11:53","name":"[pushed] Darwin, PPC: Fix struct layout with pragma pack [PR110044].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602191153.78156-1-iain@sandoe.co.uk/mbox/"},{"id":102807,"url":"https://patchwork.plctlab.org/api/1.2/patches/102807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6428a06-f728-06a9-a530-36aa115291dc@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-03T09:55:17","name":"xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6428a06-f728-06a9-a530-36aa115291dc@yahoo.co.jp/mbox/"},{"id":102837,"url":"https://patchwork.plctlab.org/api/1.2/patches/102837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603112532.3264658-1-xry111@xry111.site/","msgid":"<20230603112532.3264658-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-06-03T11:25:32","name":"libatomic: x86_64: Always try ifunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603112532.3264658-1-xry111@xry111.site/mbox/"},{"id":102840,"url":"https://patchwork.plctlab.org/api/1.2/patches/102840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603143713.3029159-1-pan2.li@intel.com/","msgid":"<20230603143713.3029159-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-03T14:37:13","name":"RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603143713.3029159-1-pan2.li@intel.com/mbox/"},{"id":102863,"url":"https://patchwork.plctlab.org/api/1.2/patches/102863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/035801d99641$43215980$c9640c80$@nextmovesoftware.com/","msgid":"<035801d99641$43215980$c9640c80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-03T17:31:40","name":"[x86_64] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/035801d99641$43215980$c9640c80$@nextmovesoftware.com/mbox/"},{"id":102924,"url":"https://patchwork.plctlab.org/api/1.2/patches/102924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d701d9966d$16552220$42ff6660$@nextmovesoftware.com/","msgid":"<00d701d9966d$16552220$42ff6660$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-03T22:45:23","name":"[x86] Add support for stc, clc and cmc instructions in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d701d9966d$16552220$42ff6660$@nextmovesoftware.com/mbox/"},{"id":102925,"url":"https://patchwork.plctlab.org/api/1.2/patches/102925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb2b819e-5cf4-e71f-2cb3-b05046f18de8@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-03T22:52:16","name":"xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb2b819e-5cf4-e71f-2cb3-b05046f18de8@yahoo.co.jp/mbox/"},{"id":102964,"url":"https://patchwork.plctlab.org/api/1.2/patches/102964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604071928.1681889-1-pan2.li@intel.com/","msgid":"<20230604071928.1681889-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-04T07:19:28","name":"RISC-V: Support RVV FP16 ZVFHMIN intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604071928.1681889-1-pan2.li@intel.com/mbox/"},{"id":102969,"url":"https://patchwork.plctlab.org/api/1.2/patches/102969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604085147.3989859-1-juzhe.zhong@rivai.ai/","msgid":"<20230604085147.3989859-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T08:51:47","name":"RISC-V: Remove redundant vlmul_ext_* patterns to fix PR110109","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604085147.3989859-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102970,"url":"https://patchwork.plctlab.org/api/1.2/patches/102970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604091112.3999325-1-juzhe.zhong@rivai.ai/","msgid":"<20230604091112.3999325-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:11:12","name":"[NFC] RISC-V: Reorganize riscv-v.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604091112.3999325-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102975,"url":"https://patchwork.plctlab.org/api/1.2/patches/102975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604092503.4009600-1-juzhe.zhong@rivai.ai/","msgid":"<20230604092503.4009600-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:25:03","name":"RISC-V: Split arguments of expand_vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604092503.4009600-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102976,"url":"https://patchwork.plctlab.org/api/1.2/patches/102976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604093647.4018890-1-juzhe.zhong@rivai.ai/","msgid":"<20230604093647.4018890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:36:47","name":"[NFC] RISC-V: Move optimization patterns into autovec-opt.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604093647.4018890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103038,"url":"https://patchwork.plctlab.org/api/1.2/patches/103038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16a85e3-45a8-4c82-61ab-9adad2daf537@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-04T17:42:58","name":"[committed] Convert H8 port to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16a85e3-45a8-4c82-61ab-9adad2daf537@gmail.com/mbox/"},{"id":103046,"url":"https://patchwork.plctlab.org/api/1.2/patches/103046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4d5b600-2e21-3fea-17f8-4c2764880409@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-04T21:41:06","name":"[RFA] Improve strcmp expansion when one input is a constant string.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4d5b600-2e21-3fea-17f8-4c2764880409@gmail.com/mbox/"},{"id":103053,"url":"https://patchwork.plctlab.org/api/1.2/patches/103053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605012635.2292889-1-hongtao.liu@intel.com/","msgid":"<20230605012635.2292889-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-05T01:26:35","name":"[x86] Add missing vec_pack/unpacks patterns for _Float16 <-> int/float conversion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605012635.2292889-1-hongtao.liu@intel.com/mbox/"},{"id":103057,"url":"https://patchwork.plctlab.org/api/1.2/patches/103057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605015017.2559720-1-yunqiang.su@cipunited.com/","msgid":"<20230605015017.2559720-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-05T01:50:17","name":"MAINTAINERS: move Matthew Fortune to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605015017.2559720-1-yunqiang.su@cipunited.com/mbox/"},{"id":103061,"url":"https://patchwork.plctlab.org/api/1.2/patches/103061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605035741.613909-1-juzhe.zhong@rivai.ai/","msgid":"<20230605035741.613909-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-05T03:57:41","name":"[V2] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605035741.613909-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103081,"url":"https://patchwork.plctlab.org/api/1.2/patches/103081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605044112.2861212-1-apinski@marvell.com/","msgid":"<20230605044112.2861212-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T04:41:12","name":"Fix PR 110085: `make clean` in GCC directory on sh target causes a failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605044112.2861212-1-apinski@marvell.com/mbox/"},{"id":103086,"url":"https://patchwork.plctlab.org/api/1.2/patches/103086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-1-apinski@marvell.com/","msgid":"<20230605055331.2864335-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T05:53:30","name":"[1/2] Improve do_store_flag for single bit when there is no non-zero bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-1-apinski@marvell.com/mbox/"},{"id":103087,"url":"https://patchwork.plctlab.org/api/1.2/patches/103087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-2-apinski@marvell.com/","msgid":"<20230605055331.2864335-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T05:53:31","name":"[2/2] Handle const_int in expand_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-2-apinski@marvell.com/mbox/"},{"id":103092,"url":"https://patchwork.plctlab.org/api/1.2/patches/103092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605060757.22344-1-gaofei@eswincomputing.com/","msgid":"<20230605060757.22344-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-05T06:07:57","name":"[RISC-V] add TC for save-restore cfi directives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605060757.22344-1-gaofei@eswincomputing.com/mbox/"},{"id":103097,"url":"https://patchwork.plctlab.org/api/1.2/patches/103097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com/","msgid":"<5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-06-05T06:41:42","name":"rs6000: Remove duplicate expression [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com/mbox/"},{"id":103098,"url":"https://patchwork.plctlab.org/api/1.2/patches/103098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605065058.1037581-1-pan2.li@intel.com/","msgid":"<20230605065058.1037581-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T06:50:58","name":"[v1] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605065058.1037581-1-pan2.li@intel.com/mbox/"},{"id":103194,"url":"https://patchwork.plctlab.org/api/1.2/patches/103194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbc8c369-79af-ca70-646d-4b156b4c2df1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-05T07:30:55","name":"[v2] xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbc8c369-79af-ca70-646d-4b156b4c2df1@yahoo.co.jp/mbox/"},{"id":103180,"url":"https://patchwork.plctlab.org/api/1.2/patches/103180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605081822.24328-1-xuli1@eswincomputing.com/","msgid":"<20230605081822.24328-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-05T08:18:22","name":"RISC-V: Fix '\''REQUIREMENT'\'' for machine_mode '\''MODE'\'' in vector-iterators.md.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605081822.24328-1-xuli1@eswincomputing.com/mbox/"},{"id":103182,"url":"https://patchwork.plctlab.org/api/1.2/patches/103182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605082043.1707158-1-pan2.li@intel.com/","msgid":"<20230605082043.1707158-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T08:20:43","name":"[v2] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605082043.1707158-1-pan2.li@intel.com/mbox/"},{"id":103199,"url":"https://patchwork.plctlab.org/api/1.2/patches/103199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605103018.729941-1-juzhe.zhong@rivai.ai/","msgid":"<20230605103018.729941-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-05T10:30:18","name":"[V3] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605103018.729941-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103202,"url":"https://patchwork.plctlab.org/api/1.2/patches/103202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2798293836398E27+2023060518584925668867@rivai.ai/","msgid":"<2798293836398E27+2023060518584925668867@rivai.ai>","list_archive_url":null,"date":"2023-06-05T10:58:50","name":"??????: Re: [PATCH V3] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2798293836398E27+2023060518584925668867@rivai.ai/mbox/"},{"id":103219,"url":"https://patchwork.plctlab.org/api/1.2/patches/103219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz2aqezb.fsf@euler.schwinge.homeip.net/","msgid":"<87cz2aqezb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-05T12:18:48","name":"Add '\''libgomp.{,oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz2aqezb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":103222,"url":"https://patchwork.plctlab.org/api/1.2/patches/103222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rcyqeoh.fsf@euler.schwinge.homeip.net/","msgid":"<878rcyqeoh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-05T12:25:18","name":"driver: Forward '\''-lgfortran'\'', '\''-lm'\'' to offloading compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rcyqeoh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":103303,"url":"https://patchwork.plctlab.org/api/1.2/patches/103303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnV8p_Qs0AZhBYKzUy+inMGCH6hE3ZfVnp1Q3o+ZoC_ng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T14:37:37","name":"libiberty: writeargv: Simplify function error mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnV8p_Qs0AZhBYKzUy+inMGCH6hE3ZfVnp1Q3o+ZoC_ng@mail.gmail.com/mbox/"},{"id":103312,"url":"https://patchwork.plctlab.org/api/1.2/patches/103312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605144952.2546564-1-pan2.li@intel.com/","msgid":"<20230605144952.2546564-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T14:49:52","name":"[v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605144952.2546564-1-pan2.li@intel.com/mbox/"},{"id":103318,"url":"https://patchwork.plctlab.org/api/1.2/patches/103318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605150753.2583349-1-pan2.li@intel.com/","msgid":"<20230605150753.2583349-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T15:07:53","name":"[v1] RISC-V: Fix some typo in vector-iterators.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605150753.2583349-1-pan2.li@intel.com/mbox/"},{"id":103334,"url":"https://patchwork.plctlab.org/api/1.2/patches/103334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/B81FAA88-C26E-49BC-8938-B9A226B33C30@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:12:53","name":"Ping: Fwd: [V9][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/B81FAA88-C26E-49BC-8938-B9A226B33C30@oracle.com/mbox/"},{"id":103364,"url":"https://patchwork.plctlab.org/api/1.2/patches/103364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-cRfW8N=MUkt1Gmy17_+gmc0X0VyOSVQ5P-p9emWLYQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:36:25","name":"[COMMITTED] reginfo: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-cRfW8N=MUkt1Gmy17_+gmc0X0VyOSVQ5P-p9emWLYQ@mail.gmail.com/mbox/"},{"id":103365,"url":"https://patchwork.plctlab.org/api/1.2/patches/103365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUSFhUj49VTu5ghyf8jVZeWtgt3-gQJhGXLx5xb8sKeA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:38:43","name":"[COMMITTED] print-rtl: Change return type of two print functions from int to void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUSFhUj49VTu5ghyf8jVZeWtgt3-gQJhGXLx5xb8sKeA@mail.gmail.com/mbox/"},{"id":103397,"url":"https://patchwork.plctlab.org/api/1.2/patches/103397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605165531.1009946-1-ibuclaw@gdcproject.org/","msgid":"<20230605165531.1009946-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-05T16:55:31","name":"[committed] d: Warn when declared size of a special enum does not match its intrinsic type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605165531.1009946-1-ibuclaw@gdcproject.org/mbox/"},{"id":103502,"url":"https://patchwork.plctlab.org/api/1.2/patches/103502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605212639.204780-1-ppalka@redhat.com/","msgid":"<20230605212639.204780-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-05T21:26:39","name":"c++: extend lookup_template_class shortcut [PR110122]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605212639.204780-1-ppalka@redhat.com/mbox/"},{"id":103528,"url":"https://patchwork.plctlab.org/api/1.2/patches/103528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606015723.12297-1-gaofei@eswincomputing.com/","msgid":"<20230606015723.12297-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-06T01:57:23","name":"[RISC-V] correct machine mode in save-restore cfi RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606015723.12297-1-gaofei@eswincomputing.com/mbox/"},{"id":103536,"url":"https://patchwork.plctlab.org/api/1.2/patches/103536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606024851.D7E7920441@pchp3.se.axis.com/","msgid":"<20230606024851.D7E7920441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-06T02:48:51","name":"[committed] bootstrap rtl-checking: Fix XVEC vs XVECEXP in postreload.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606024851.D7E7920441@pchp3.se.axis.com/mbox/"},{"id":103548,"url":"https://patchwork.plctlab.org/api/1.2/patches/103548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606041635.226494-1-juzhe.zhong@rivai.ai/","msgid":"<20230606041635.226494-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T04:16:35","name":"RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606041635.226494-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103555,"url":"https://patchwork.plctlab.org/api/1.2/patches/103555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-1-hongtao.liu@intel.com/","msgid":"<20230606043121.24843-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T04:31:20","name":"Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-1-hongtao.liu@intel.com/mbox/"},{"id":103554,"url":"https://patchwork.plctlab.org/api/1.2/patches/103554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-2-hongtao.liu@intel.com/","msgid":"<20230606043121.24843-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T04:31:21","name":"Don'\''t fold _mm{, 256}_blendv_epi8 into (mask < 0 ? src1 : src2) when -funsigned-char.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-2-hongtao.liu@intel.com/mbox/"},{"id":103556,"url":"https://patchwork.plctlab.org/api/1.2/patches/103556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-1-dimitar@dinux.eu/","msgid":"<20230606045130.1687824-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-06-06T04:51:29","name":"riscv: Fix insn cost calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-1-dimitar@dinux.eu/mbox/"},{"id":103557,"url":"https://patchwork.plctlab.org/api/1.2/patches/103557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-2-dimitar@dinux.eu/","msgid":"<20230606045130.1687824-2-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-06-06T04:51:30","name":"riscv: Fix scope for memory model calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-2-dimitar@dinux.eu/mbox/"},{"id":103586,"url":"https://patchwork.plctlab.org/api/1.2/patches/103586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606065225.845953-1-jie.mei@oss.cipunited.com/","msgid":"<20230606065225.845953-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-06T06:53:36","name":"[v3] MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606065225.845953-1-jie.mei@oss.cipunited.com/mbox/"},{"id":103595,"url":"https://patchwork.plctlab.org/api/1.2/patches/103595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072151.63CA83857019@sourceware.org/","msgid":"<20230606072151.63CA83857019@sourceware.org>","list_archive_url":null,"date":"2023-06-06T07:21:06","name":"middle-end/110055 - avoid CLOBBERing static variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072151.63CA83857019@sourceware.org/mbox/"},{"id":103598,"url":"https://patchwork.plctlab.org/api/1.2/patches/103598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072215.B9A05385700C@sourceware.org/","msgid":"<20230606072215.B9A05385700C@sourceware.org>","list_archive_url":null,"date":"2023-06-06T07:21:31","name":"tree-optimization/109143 - improve PTA compile time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072215.B9A05385700C@sourceware.org/mbox/"},{"id":103627,"url":"https://patchwork.plctlab.org/api/1.2/patches/103627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606082150.657119-1-hongtao.liu@intel.com/","msgid":"<20230606082150.657119-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T08:21:50","name":"[v2] Explicitly view_convert_expr mask to signed type when folding pblendvb builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606082150.657119-1-hongtao.liu@intel.com/mbox/"},{"id":103637,"url":"https://patchwork.plctlab.org/api/1.2/patches/103637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606083549.658280-1-hongtao.liu@intel.com/","msgid":"<20230606083549.658280-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T08:35:49","name":"[1/2] Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606083549.658280-1-hongtao.liu@intel.com/mbox/"},{"id":103680,"url":"https://patchwork.plctlab.org/api/1.2/patches/103680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com/","msgid":"<124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com>","list_archive_url":null,"date":"2023-06-06T09:19:24","name":"rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com/mbox/"},{"id":103681,"url":"https://patchwork.plctlab.org/api/1.2/patches/103681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2a1af32-3384-dc65-825f-7374b1ec29ef@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T09:20:08","name":"rs6000: Don'\''t use TFmode for 128 bits fp constant in toc [PR110011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2a1af32-3384-dc65-825f-7374b1ec29ef@linux.ibm.com/mbox/"},{"id":103695,"url":"https://patchwork.plctlab.org/api/1.2/patches/103695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qioapgh.fsf@oldenburg3.str.redhat.com/","msgid":"<871qioapgh.fsf@oldenburg3.str.redhat.com>","list_archive_url":null,"date":"2023-06-06T09:51:26","name":"libgcc: Fix eh_frame fast path in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qioapgh.fsf@oldenburg3.str.redhat.com/mbox/"},{"id":103696,"url":"https://patchwork.plctlab.org/api/1.2/patches/103696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095321.24585-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606095321.24585-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T09:53:21","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095321.24585-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103698,"url":"https://patchwork.plctlab.org/api/1.2/patches/103698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095847.171835-1-juzhe.zhong@rivai.ai/","msgid":"<20230606095847.171835-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T09:58:47","name":"RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095847.171835-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103736,"url":"https://patchwork.plctlab.org/api/1.2/patches/103736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606113833.857327-1-jwakely@redhat.com/","msgid":"<20230606113833.857327-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T11:38:33","name":"[committed] libstdc++: Use close-on-exec for file descriptors in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606113833.857327-1-jwakely@redhat.com/mbox/"},{"id":103741,"url":"https://patchwork.plctlab.org/api/1.2/patches/103741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114608.868760-1-jwakely@redhat.com/","msgid":"<20230606114608.868760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T11:46:08","name":"[committed] libstdc++: Fix ambiguous expression in std::array::front() [PR110139]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114608.868760-1-jwakely@redhat.com/mbox/"},{"id":103738,"url":"https://patchwork.plctlab.org/api/1.2/patches/103738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-1-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:30","name":"[V2] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103740,"url":"https://patchwork.plctlab.org/api/1.2/patches/103740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-2-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:31","name":"RISC-V: Enable SELECT_VL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-2-juzhe.zhong@rivai.ai/mbox/"},{"id":103739,"url":"https://patchwork.plctlab.org/api/1.2/patches/103739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-3-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:32","name":"RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-3-juzhe.zhong@rivai.ai/mbox/"},{"id":103742,"url":"https://patchwork.plctlab.org/api/1.2/patches/103742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114803.1630479-1-juzhe.zhong@rivai.ai/","msgid":"<20230606114803.1630479-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:48:03","name":"[V3] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114803.1630479-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103744,"url":"https://patchwork.plctlab.org/api/1.2/patches/103744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114858.447221-1-vultkayn@gcc.gnu.org/","msgid":"<20230606114858.447221-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-06T11:48:58","name":"analyzer: Standalone OOB-warning [PR109437, PR109439]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114858.447221-1-vultkayn@gcc.gnu.org/mbox/"},{"id":103749,"url":"https://patchwork.plctlab.org/api/1.2/patches/103749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606120433.1633720-1-juzhe.zhong@rivai.ai/","msgid":"<20230606120433.1633720-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T12:04:33","name":"[V4] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606120433.1633720-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103773,"url":"https://patchwork.plctlab.org/api/1.2/patches/103773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5732205.e9J7NaK4W3@minbar/","msgid":"<5732205.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-06-06T12:23:37","name":"[committed] libstdc++: Protect against macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5732205.e9J7NaK4W3@minbar/mbox/"},{"id":103775,"url":"https://patchwork.plctlab.org/api/1.2/patches/103775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13130881.nUPlyArG6x@minbar/","msgid":"<13130881.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-06-06T12:25:51","name":"libstdc++: Replace use of incorrect non-temporal store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13130881.nUPlyArG6x@minbar/mbox/"},{"id":103778,"url":"https://patchwork.plctlab.org/api/1.2/patches/103778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6348100.iIbC2pHGDl@minbar/","msgid":"<6348100.iIbC2pHGDl@minbar>","list_archive_url":null,"date":"2023-06-06T12:29:16","name":"libstdc++: Avoid vector casts while still avoiding PR90424","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6348100.iIbC2pHGDl@minbar/mbox/"},{"id":103781,"url":"https://patchwork.plctlab.org/api/1.2/patches/103781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606123646.1553843-1-pan2.li@intel.com/","msgid":"<20230606123646.1553843-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-06T12:36:46","name":"[v1] RISC-V: Refactor ZVFHMIN to separated iterator and pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606123646.1553843-1-pan2.li@intel.com/mbox/"},{"id":103830,"url":"https://patchwork.plctlab.org/api/1.2/patches/103830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606134153.1592417-1-ibuclaw@gdcproject.org/","msgid":"<20230606134153.1592417-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-06T13:41:53","name":"[GCC,12,committed] d: Merge upstream dmd 316b89f1e3, phobos 8e8aaae50.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606134153.1592417-1-ibuclaw@gdcproject.org/mbox/"},{"id":103832,"url":"https://patchwork.plctlab.org/api/1.2/patches/103832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org/","msgid":"<8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-06-06T13:48:31","name":"[1/2] rs6000: genfusion: Rewrite load/compare code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org/mbox/"},{"id":103833,"url":"https://patchwork.plctlab.org/api/1.2/patches/103833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org/","msgid":"<0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-06-06T13:48:32","name":"[2/2] rs6000: genfusion: Delete dead code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org/mbox/"},{"id":103848,"url":"https://patchwork.plctlab.org/api/1.2/patches/103848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4608206.VLH7GnMWUR@minbar/","msgid":"<4608206.VLH7GnMWUR@minbar>","list_archive_url":null,"date":"2023-06-06T14:13:52","name":"libstdc++: Rewrite or avoid casts to 64-bit element types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4608206.VLH7GnMWUR@minbar/mbox/"},{"id":103862,"url":"https://patchwork.plctlab.org/api/1.2/patches/103862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606143446.50118-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606143446.50118-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T14:34:46","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606143446.50118-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103896,"url":"https://patchwork.plctlab.org/api/1.2/patches/103896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com/","msgid":"<3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com>","list_archive_url":null,"date":"2023-06-06T14:55:50","name":"[committed] Re: [PATCHv2] openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com/mbox/"},{"id":103915,"url":"https://patchwork.plctlab.org/api/1.2/patches/103915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com/","msgid":"<3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com>","list_archive_url":null,"date":"2023-06-06T15:10:37","name":"[OpenACC,2.7] Implement host_data must have use_device clause requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com/mbox/"},{"id":103917,"url":"https://patchwork.plctlab.org/api/1.2/patches/103917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b7a229-0ec8-5404-fea2-4612ffb73bf2@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T15:11:55","name":"[OpenACC,2.7] Implement default clause support for data constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b7a229-0ec8-5404-fea2-4612ffb73bf2@siemens.com/mbox/"},{"id":103929,"url":"https://patchwork.plctlab.org/api/1.2/patches/103929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606151706.53910-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606151706.53910-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T15:17:06","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606151706.53910-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103934,"url":"https://patchwork.plctlab.org/api/1.2/patches/103934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606153258.1988789-1-pan2.li@intel.com/","msgid":"<20230606153258.1988789-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-06T15:32:58","name":"[v2] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606153258.1988789-1-pan2.li@intel.com/mbox/"},{"id":103936,"url":"https://patchwork.plctlab.org/api/1.2/patches/103936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0429eff-7eb9-8380-3ae6-e0695b0ab6d8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T15:33:32","name":"libgomp: plugin-gcn - support '\''unified_address'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0429eff-7eb9-8380-3ae6-e0695b0ab6d8@codesourcery.com/mbox/"},{"id":103960,"url":"https://patchwork.plctlab.org/api/1.2/patches/103960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155931.1241991-1-jwakely@redhat.com/","msgid":"<20230606155931.1241991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T15:59:31","name":"[committed] libstdc++: Make std::numeric_limits<__float128> more portable [PR104772]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155931.1241991-1-jwakely@redhat.com/mbox/"},{"id":103961,"url":"https://patchwork.plctlab.org/api/1.2/patches/103961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155947.1242056-1-jwakely@redhat.com/","msgid":"<20230606155947.1242056-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T15:59:47","name":"[committed] libstdc++: Update list of known symbol versions for abi-check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155947.1242056-1-jwakely@redhat.com/mbox/"},{"id":103997,"url":"https://patchwork.plctlab.org/api/1.2/patches/103997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRwe_anb9ozkoKh0nWXKC86w-O76u9G+ruSuvjEPUU+g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T17:22:57","name":"[COMMITTED] reload1: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRwe_anb9ozkoKh0nWXKC86w-O76u9G+ruSuvjEPUU+g@mail.gmail.com/mbox/"},{"id":104030,"url":"https://patchwork.plctlab.org/api/1.2/patches/104030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606182953.815966-1-ppalka@redhat.com/","msgid":"<20230606182953.815966-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-06T18:29:53","name":"c++: unsynthesized defaulted constexpr fn [PR110122]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606182953.815966-1-ppalka@redhat.com/mbox/"},{"id":104095,"url":"https://patchwork.plctlab.org/api/1.2/patches/104095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0f752a624ec9d69b9549d0192105318b5d3c641.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T19:54:04","name":"[ver,2] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0f752a624ec9d69b9549d0192105318b5d3c641.camel@us.ibm.com/mbox/"},{"id":104108,"url":"https://patchwork.plctlab.org/api/1.2/patches/104108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-2-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:22","name":"[v6,1/4] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-2-ben.boeckel@kitware.com/mbox/"},{"id":104110,"url":"https://patchwork.plctlab.org/api/1.2/patches/104110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-3-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:23","name":"[v6,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-3-ben.boeckel@kitware.com/mbox/"},{"id":104109,"url":"https://patchwork.plctlab.org/api/1.2/patches/104109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-5-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:25","name":"[v6,4/4] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-5-ben.boeckel@kitware.com/mbox/"},{"id":104112,"url":"https://patchwork.plctlab.org/api/1.2/patches/104112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606210710.2992237-1-apinski@marvell.com/","msgid":"<20230606210710.2992237-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-06T21:07:10","name":"For the `-A CMP -B -> B CMP A` pattern allow EQ/NE for all integer types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606210710.2992237-1-apinski@marvell.com/mbox/"},{"id":104116,"url":"https://patchwork.plctlab.org/api/1.2/patches/104116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+k9Qum+98u1vML@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-06T21:28:21","name":"modula2: Fix bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+k9Qum+98u1vML@tucnak/mbox/"},{"id":104117,"url":"https://patchwork.plctlab.org/api/1.2/patches/104117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606213315.2993028-1-apinski@marvell.com/","msgid":"<20230606213315.2993028-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-06T21:33:15","name":"[COMMITTED/13] Fix PR 110085: `make clean` in GCC directory on sh target causes a failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606213315.2993028-1-apinski@marvell.com/mbox/"},{"id":104118,"url":"https://patchwork.plctlab.org/api/1.2/patches/104118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+oL657y6sfy08/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-06T21:42:07","name":"middle-end, i386: Pattern recognize add/subtract with carry [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+oL657y6sfy08/@tucnak/mbox/"},{"id":104122,"url":"https://patchwork.plctlab.org/api/1.2/patches/104122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/030901d998c6$ac062250$041266f0$@nextmovesoftware.com/","msgid":"<030901d998c6$ac062250$041266f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-06T22:31:42","name":"[x86_64] PR target/110104: Missing peephole2 for addcarry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/030901d998c6$ac062250$041266f0$@nextmovesoftware.com/mbox/"},{"id":104135,"url":"https://patchwork.plctlab.org/api/1.2/patches/104135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com/","msgid":"<037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-06T23:05:40","name":"[x86] PR target/31985: Improve memory operand use with doubleword add.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com/mbox/"},{"id":104159,"url":"https://patchwork.plctlab.org/api/1.2/patches/104159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-1-apinski@marvell.com/","msgid":"<20230607001706.3000011-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T00:17:05","name":"[1/2] Match: zero_one_valued_p should match 0 constants too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-1-apinski@marvell.com/mbox/"},{"id":104160,"url":"https://patchwork.plctlab.org/api/1.2/patches/104160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-2-apinski@marvell.com/","msgid":"<20230607001706.3000011-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T00:17:06","name":"[2/2] Add match patterns for `a ? onezero : onezero` where one of the two operands are constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-2-apinski@marvell.com/mbox/"},{"id":104171,"url":"https://patchwork.plctlab.org/api/1.2/patches/104171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607012956.2770169-1-jason@redhat.com/","msgid":"<20230607012956.2770169-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:29:56","name":"[pushed] c++: add NRV testcase [PR58050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607012956.2770169-1-jason@redhat.com/mbox/"},{"id":104172,"url":"https://patchwork.plctlab.org/api/1.2/patches/104172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013028.2770448-1-jason@redhat.com/","msgid":"<20230607013028.2770448-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:30:28","name":"[pushed] c++: fix contracts with NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013028.2770448-1-jason@redhat.com/mbox/"},{"id":104173,"url":"https://patchwork.plctlab.org/api/1.2/patches/104173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013053.2770663-1-jason@redhat.com/","msgid":"<20230607013053.2770663-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:30:53","name":"[pushed] c++: fix throwing cleanup with label","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013053.2770663-1-jason@redhat.com/mbox/"},{"id":104176,"url":"https://patchwork.plctlab.org/api/1.2/patches/104176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013116.2770869-1-jason@redhat.com/","msgid":"<20230607013116.2770869-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:31:16","name":"[pushed] c++: NRV and goto [PR92407]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013116.2770869-1-jason@redhat.com/mbox/"},{"id":104174,"url":"https://patchwork.plctlab.org/api/1.2/patches/104174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013214.2771266-1-jason@redhat.com/","msgid":"<20230607013214.2771266-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:32:14","name":"[pushed] c++: enable NRVO from inner block [PR51571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013214.2771266-1-jason@redhat.com/mbox/"},{"id":104175,"url":"https://patchwork.plctlab.org/api/1.2/patches/104175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013303.2771541-1-jason@redhat.com/","msgid":"<20230607013303.2771541-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:33:03","name":"[pushed] c++: Add -Wnrvo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013303.2771541-1-jason@redhat.com/mbox/"},{"id":104192,"url":"https://patchwork.plctlab.org/api/1.2/patches/104192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607021908.615905-1-pan2.li@intel.com/","msgid":"<20230607021908.615905-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T02:19:08","name":"RISC-V: Fix ICE when include riscv_vector.h with rv64gcv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607021908.615905-1-pan2.li@intel.com/mbox/"},{"id":104198,"url":"https://patchwork.plctlab.org/api/1.2/patches/104198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607023147.1602812-1-chenglulu@loongson.cn/","msgid":"<20230607023147.1602812-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-07T02:31:47","name":"LoongArch: Change jumptable'\''s register constraint to '\''q'\'' [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607023147.1602812-1-chenglulu@loongson.cn/mbox/"},{"id":104208,"url":"https://patchwork.plctlab.org/api/1.2/patches/104208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607030038.896932-1-pan2.li@intel.com/","msgid":"<20230607030038.896932-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T03:00:38","name":"[v3] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607030038.896932-1-pan2.li@intel.com/mbox/"},{"id":104213,"url":"https://patchwork.plctlab.org/api/1.2/patches/104213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607031915.115114-1-juzhe.zhong@rivai.ai/","msgid":"<20230607031915.115114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-07T03:19:15","name":"[V2] RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607031915.115114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104223,"url":"https://patchwork.plctlab.org/api/1.2/patches/104223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607040409.2409-1-chenxl04200420@163.com/","msgid":"<20230607040409.2409-1-chenxl04200420@163.com>","list_archive_url":null,"date":"2023-06-07T04:04:09","name":"[v1] LoongArch:Change the default value of LARCH_CALL_RATIO to 6 on the LoongArch architecture.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607040409.2409-1-chenxl04200420@163.com/mbox/"},{"id":104243,"url":"https://patchwork.plctlab.org/api/1.2/patches/104243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com/","msgid":"<68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-06-07T05:44:02","name":"rs6000: Remove redundant initialization [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com/mbox/"},{"id":104248,"url":"https://patchwork.plctlab.org/api/1.2/patches/104248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-2-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:12","name":"[1/4,V4,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-2-gaofei@eswincomputing.com/mbox/"},{"id":104247,"url":"https://patchwork.plctlab.org/api/1.2/patches/104247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-3-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:13","name":"[2/4,RISC-V] support cm.popretz in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-3-gaofei@eswincomputing.com/mbox/"},{"id":104250,"url":"https://patchwork.plctlab.org/api/1.2/patches/104250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-4-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:14","name":"[3/4,RISC-V] resolve confilct between zcmp multi push/pop and shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-4-gaofei@eswincomputing.com/mbox/"},{"id":104249,"url":"https://patchwork.plctlab.org/api/1.2/patches/104249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-5-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-5-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:15","name":"[4/4,RISC-V] support cm.mva01s cm.mvsa01 in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-5-gaofei@eswincomputing.com/mbox/"},{"id":104258,"url":"https://patchwork.plctlab.org/api/1.2/patches/104258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce4f071b-48a4-424b-3be8-9fb645cf2615@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T06:17:27","name":"Add parentheses to clarify precedence between operators [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce4f071b-48a4-424b-3be8-9fb645cf2615@linux.vnet.ibm.com/mbox/"},{"id":104277,"url":"https://patchwork.plctlab.org/api/1.2/patches/104277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607065256.1539150-1-pan2.li@intel.com/","msgid":"<20230607065256.1539150-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T06:52:56","name":"RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607065256.1539150-1-pan2.li@intel.com/mbox/"},{"id":104279,"url":"https://patchwork.plctlab.org/api/1.2/patches/104279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kvpwxo.fsf@euler.schwinge.homeip.net/","msgid":"<87y1kvpwxo.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T07:13:07","name":"Support '\''UNSUPPORTED: [...]: exception handling disabled'\'' for libstdc++ testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kvpwxo.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104317,"url":"https://patchwork.plctlab.org/api/1.2/patches/104317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607074909.3541-1-chenxl04200420@163.com/","msgid":"<20230607074909.3541-1-chenxl04200420@163.com>","list_archive_url":null,"date":"2023-06-07T07:49:09","name":"[v2] LoongArch:Change the default value of LARCH_CALL_RATIO to 6 on the LoongArch architecture.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607074909.3541-1-chenxl04200420@163.com/mbox/"},{"id":104323,"url":"https://patchwork.plctlab.org/api/1.2/patches/104323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607080606.2104805-1-pan2.li@intel.com/","msgid":"<20230607080606.2104805-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T08:06:06","name":"[v5] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607080606.2104805-1-pan2.li@intel.com/mbox/"},{"id":104326,"url":"https://patchwork.plctlab.org/api/1.2/patches/104326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlegv3d35.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-07T08:12:46","name":"[testsuite] bump some tsvc timeouts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlegv3d35.fsf@lxoliva.fsfla.org/mbox/"},{"id":104338,"url":"https://patchwork.plctlab.org/api/1.2/patches/104338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607082111.2773414-1-guojiufu@linux.ibm.com/","msgid":"<20230607082111.2773414-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-07T08:21:11","name":"[V2] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607082111.2773414-1-guojiufu@linux.ibm.com/mbox/"},{"id":104344,"url":"https://patchwork.plctlab.org/api/1.2/patches/104344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de/","msgid":"<5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de>","list_archive_url":null,"date":"2023-06-07T08:41:00","name":"[avr] : Improve bit-extractions as of PR109907.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de/mbox/"},{"id":104385,"url":"https://patchwork.plctlab.org/api/1.2/patches/104385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCmgsL7dv7-NyLKc=vTNVsVSajuaccHZugnEn9Y1VbMHDA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T10:21:42","name":"libiberty: pex-unix.c: Make pex_unix_cleanup signature always match body.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCmgsL7dv7-NyLKc=vTNVsVSajuaccHZugnEn9Y1VbMHDA@mail.gmail.com/mbox/"},{"id":104387,"url":"https://patchwork.plctlab.org/api/1.2/patches/104387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da977e26-f462-c0ec-e054-2cb415ad2493@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T10:25:26","name":"[3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da977e26-f462-c0ec-e054-2cb415ad2493@linux.ibm.com/mbox/"},{"id":104444,"url":"https://patchwork.plctlab.org/api/1.2/patches/104444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a30067cf-e261-211c-d6c9-7a10c99c3ee8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T11:26:48","name":"[committed] testsuite/libgomp.*/target-present-*.{c, f90}: Improve and fix (was: Re: [og12] Fix '\''libgomp.{c-c++-common, fortran}/target-present-*'\'' test cases)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a30067cf-e261-211c-d6c9-7a10c99c3ee8@codesourcery.com/mbox/"},{"id":104485,"url":"https://patchwork.plctlab.org/api/1.2/patches/104485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607124701.2367809-1-juzhe.zhong@rivai.ai/","msgid":"<20230607124701.2367809-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-07T12:47:01","name":"[V4] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607124701.2367809-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104506,"url":"https://patchwork.plctlab.org/api/1.2/patches/104506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-2-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:39","name":"[v2,1/3] RISC-V: Minimal support for ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-2-jiawei@iscas.ac.cn/mbox/"},{"id":104507,"url":"https://patchwork.plctlab.org/api/1.2/patches/104507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-3-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:40","name":"[v2,2/3] RISC-V: Enable compressible features when use ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-3-jiawei@iscas.ac.cn/mbox/"},{"id":104508,"url":"https://patchwork.plctlab.org/api/1.2/patches/104508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-4-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:41","name":"[v2,3/3] RISC-V: Add ZC* test for failed march args being passed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-4-jiawei@iscas.ac.cn/mbox/"},{"id":104515,"url":"https://patchwork.plctlab.org/api/1.2/patches/104515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607131749.82794-1-rzinsly@ventanamicro.com/","msgid":"<20230607131749.82794-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-06-07T13:17:49","name":"RISC-V: Add Veyron V1 pipeline description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607131749.82794-1-rzinsly@ventanamicro.com/mbox/"},{"id":104524,"url":"https://patchwork.plctlab.org/api/1.2/patches/104524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNeDsPTd0lCn0m@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:00:24","name":"[1/3] aarch64: Fix whitespace in ls64 builtin implementation [PR110100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNeDsPTd0lCn0m@arm.com/mbox/"},{"id":104523,"url":"https://patchwork.plctlab.org/api/1.2/patches/104523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNkadMGxK9Aq1X@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:00:49","name":"[2/3] aarch64: Fix wrong code with st64b builtin [PR110100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNkadMGxK9Aq1X@arm.com/mbox/"},{"id":104525,"url":"https://patchwork.plctlab.org/api/1.2/patches/104525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNq/vZLi2HYeKM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:01:15","name":"[3/3] aarch64: Allow compiler to define ls64 builtins [PR110132]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNq/vZLi2HYeKM@arm.com/mbox/"},{"id":104534,"url":"https://patchwork.plctlab.org/api/1.2/patches/104534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a95a55-9f4d-1333-bc74-ddfd348ea0c3@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:20:41","name":"vect: Don'\''t pass subtype to vect_widened_op_tree where not needed [PR 110142]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a95a55-9f4d-1333-bc74-ddfd348ea0c3@arm.com/mbox/"},{"id":104548,"url":"https://patchwork.plctlab.org/api/1.2/patches/104548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com/","msgid":"<7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com>","list_archive_url":null,"date":"2023-06-07T14:48:57","name":"[committed] Fix expected test output on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com/mbox/"},{"id":104552,"url":"https://patchwork.plctlab.org/api/1.2/patches/104552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg5b727b.fsf@euler.schwinge.homeip.net/","msgid":"<87zg5b727b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T14:54:16","name":"Remove '\''gcc/testsuite/g++.dg/warn/Wfree-nonheap-object.s'\'' (was: [PATCH] add -Wmismatched-new-delete to middle end (PR 90629))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg5b727b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104560,"url":"https://patchwork.plctlab.org/api/1.2/patches/104560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn0f71uq.fsf@euler.schwinge.homeip.net/","msgid":"<87wn0f71uq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T15:01:49","name":"Tighten '\''dg-warning'\'' alternatives in '\''c-c++-common/Wfree-nonheap-object{,-2,-3}.c'\'' (was: [PATCH] correct -Wmismatched-new-delete (PR 98160, 98166))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn0f71uq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104593,"url":"https://patchwork.plctlab.org/api/1.2/patches/104593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155314.1369707-1-jwakely@redhat.com/","msgid":"<20230607155314.1369707-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:14","name":"[committed] libstdc++: Fix some tests that fail with -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155314.1369707-1-jwakely@redhat.com/mbox/"},{"id":104597,"url":"https://patchwork.plctlab.org/api/1.2/patches/104597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155320.1369738-1-jwakely@redhat.com/","msgid":"<20230607155320.1369738-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:20","name":"[committed] libstdc++: Fix some tests that fail with -fno-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155320.1369738-1-jwakely@redhat.com/mbox/"},{"id":104598,"url":"https://patchwork.plctlab.org/api/1.2/patches/104598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155333.1369759-1-jwakely@redhat.com/","msgid":"<20230607155333.1369759-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:33","name":"[committed] libstdc++: Restore accidentally removed version in abi-check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155333.1369759-1-jwakely@redhat.com/mbox/"},{"id":104608,"url":"https://patchwork.plctlab.org/api/1.2/patches/104608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKOzc=DcdTNpTFO2MZeRiMSOhZZTJ2zKvq0+SDjZvwCyg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:10:48","name":"[fortran] PR87477 - (associate) - [meta-bug] [F03] issues concerning the ASSOCIATE statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKOzc=DcdTNpTFO2MZeRiMSOhZZTJ2zKvq0+SDjZvwCyg@mail.gmail.com/mbox/"},{"id":104628,"url":"https://patchwork.plctlab.org/api/1.2/patches/104628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC1glXyzhmt7ZQz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:51:14","name":"i386: Fix endless recursion in ix86_expand_vector_init_general with MMX [PR110152]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC1glXyzhmt7ZQz@tucnak/mbox/"},{"id":104630,"url":"https://patchwork.plctlab.org/api/1.2/patches/104630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC3TReXs9CBKEbz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:58:53","name":"optabs: Implement double-word ctz and ffs expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC3TReXs9CBKEbz@tucnak/mbox/"},{"id":104634,"url":"https://patchwork.plctlab.org/api/1.2/patches/104634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC7kEwyILqqnOht@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T17:17:04","name":"libstdc++: Fix up 20_util/to_chars/double.cc test for excess precision [PR110145]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC7kEwyILqqnOht@tucnak/mbox/"},{"id":104708,"url":"https://patchwork.plctlab.org/api/1.2/patches/104708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607212806.3052446-1-apinski@marvell.com/","msgid":"<20230607212806.3052446-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:28:06","name":"MATCH: Fix comment for `(zero_one ==/!= 0) ? y : z y` patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607212806.3052446-1-apinski@marvell.com/mbox/"},{"id":104712,"url":"https://patchwork.plctlab.org/api/1.2/patches/104712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-1-apinski@marvell.com/","msgid":"<20230607213217.3052696-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:15","name":"[1/3] MATCH: Allow unsigned types for `X & -Y -> X * Y` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-1-apinski@marvell.com/mbox/"},{"id":104713,"url":"https://patchwork.plctlab.org/api/1.2/patches/104713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-2-apinski@marvell.com/","msgid":"<20230607213217.3052696-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:16","name":"[2/3] Change the `zero_one ==/!= 0) ? y : z y` patterns to use multiply rather than `(-zero_one) & z`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-2-apinski@marvell.com/mbox/"},{"id":104714,"url":"https://patchwork.plctlab.org/api/1.2/patches/104714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-3-apinski@marvell.com/","msgid":"<20230607213217.3052696-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:17","name":"[3/3] Add Plus to the op list of `(zero_one == 0) ? y : z y` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-3-apinski@marvell.com/mbox/"},{"id":104741,"url":"https://patchwork.plctlab.org/api/1.2/patches/104741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607220615.2981121-1-jason@redhat.com/","msgid":"<20230607220615.2981121-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T22:06:15","name":"[pushed] c++: allow NRV and non-NRV returns [PR58487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607220615.2981121-1-jason@redhat.com/mbox/"},{"id":104772,"url":"https://patchwork.plctlab.org/api/1.2/patches/104772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com/","msgid":"<009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-07T22:54:37","name":"[Committed] Bug fix to new wi::bitreverse_large function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com/mbox/"},{"id":104774,"url":"https://patchwork.plctlab.org/api/1.2/patches/104774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com/","msgid":"<00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-07T23:09:00","name":"[nvptx] Update nvptx'\''s bitrev2 pattern to use BITREVERSE rtx.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com/mbox/"},{"id":104789,"url":"https://patchwork.plctlab.org/api/1.2/patches/104789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-2-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:44","name":"[1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-2-guojiufu@linux.ibm.com/mbox/"},{"id":104792,"url":"https://patchwork.plctlab.org/api/1.2/patches/104792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-3-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:45","name":"[2/4] rs6000: build constant via lis;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-3-guojiufu@linux.ibm.com/mbox/"},{"id":104791,"url":"https://patchwork.plctlab.org/api/1.2/patches/104791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-4-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-4-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:46","name":"[3/4] rs6000: build constant via li/lis;rldicl/rldicr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-4-guojiufu@linux.ibm.com/mbox/"},{"id":104790,"url":"https://patchwork.plctlab.org/api/1.2/patches/104790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-5-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-5-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:47","name":"[4/4] rs6000: build constant via li/lis;rldic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-5-guojiufu@linux.ibm.com/mbox/"},{"id":104794,"url":"https://patchwork.plctlab.org/api/1.2/patches/104794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608020541.2548506-1-juzhe.zhong@rivai.ai/","msgid":"<20230608020541.2548506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-08T02:05:41","name":"[V5] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608020541.2548506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104800,"url":"https://patchwork.plctlab.org/api/1.2/patches/104800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608022721.1226263-1-chenglulu@loongson.cn/","msgid":"<20230608022721.1226263-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-08T02:27:22","name":"[v2] LoongArch: Modify the register constraints for template \"jumptable\" and \"indirect_jump\" from \"r\" to \"e\" [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608022721.1226263-1-chenglulu@loongson.cn/mbox/"},{"id":104823,"url":"https://patchwork.plctlab.org/api/1.2/patches/104823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608052034.1731084-1-pan2.li@intel.com/","msgid":"<20230608052034.1731084-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T05:20:34","name":"[v6] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608052034.1731084-1-pan2.li@intel.com/mbox/"},{"id":104827,"url":"https://patchwork.plctlab.org/api/1.2/patches/104827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608060635.2226754-1-pan2.li@intel.com/","msgid":"<20230608060635.2226754-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T06:06:35","name":"[v7] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608060635.2226754-1-pan2.li@intel.com/mbox/"},{"id":104830,"url":"https://patchwork.plctlab.org/api/1.2/patches/104830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608062954.2513718-1-pan2.li@intel.com/","msgid":"<20230608062954.2513718-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T06:29:54","name":"[v8] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608062954.2513718-1-pan2.li@intel.com/mbox/"},{"id":104861,"url":"https://patchwork.plctlab.org/api/1.2/patches/104861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608075211.2940017-1-pan2.li@intel.com/","msgid":"<20230608075211.2940017-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T07:52:11","name":"[v2] RISC-V: Add more test cases for RVV FP16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608075211.2940017-1-pan2.li@intel.com/mbox/"},{"id":104891,"url":"https://patchwork.plctlab.org/api/1.2/patches/104891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608093048.1677718-1-vultkayn@gcc.gnu.org/","msgid":"<20230608093048.1677718-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-08T09:30:50","name":"[COMMITTED] analyzer: Standalone OOB-warning, formatting fixed [PR109437, PR109439]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608093048.1677718-1-vultkayn@gcc.gnu.org/mbox/"},{"id":104902,"url":"https://patchwork.plctlab.org/api/1.2/patches/104902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/VI1PR08MB53254381C1ACCE759C338488FF50A@VI1PR08MB5325.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T10:00:57","name":"[GCC,AArch64] convert some patterns to new MD syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/VI1PR08MB53254381C1ACCE759C338488FF50A@VI1PR08MB5325.eurprd08.prod.outlook.com/mbox/"},{"id":104916,"url":"https://patchwork.plctlab.org/api/1.2/patches/104916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103103.23794-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230608103103.23794-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-08T10:31:03","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103103.23794-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":104920,"url":"https://patchwork.plctlab.org/api/1.2/patches/104920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103833.25420-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230608103833.25420-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-08T10:38:33","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103833.25420-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":104932,"url":"https://patchwork.plctlab.org/api/1.2/patches/104932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIG2PaKQvzGAfbd2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T11:06:37","name":"[RFC] c++: Accept elaborated-enum-base in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIG2PaKQvzGAfbd2@arm.com/mbox/"},{"id":104935,"url":"https://patchwork.plctlab.org/api/1.2/patches/104935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608112351.207461-1-lehua.ding@rivai.ai/","msgid":"<20230608112351.207461-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-08T11:23:51","name":"testsuite: fix the condition bug in tsvc s176","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608112351.207461-1-lehua.ding@rivai.ai/mbox/"},{"id":104998,"url":"https://patchwork.plctlab.org/api/1.2/patches/104998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or35322f6d.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-08T14:37:30","name":"fix frange_nextafter odr violation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or35322f6d.fsf@lxoliva.fsfla.org/mbox/"},{"id":105006,"url":"https://patchwork.plctlab.org/api/1.2/patches/105006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com/","msgid":"<17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-08T15:21:42","name":"[ver,3] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com/mbox/"},{"id":105077,"url":"https://patchwork.plctlab.org/api/1.2/patches/105077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608175709.462490-1-polacek@redhat.com/","msgid":"<20230608175709.462490-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-08T17:57:09","name":"doc: Clarification for -Wmissing-field-initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608175709.462490-1-polacek@redhat.com/mbox/"},{"id":105084,"url":"https://patchwork.plctlab.org/api/1.2/patches/105084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbd39e11-cf04-87f5-627b-9b526bde87ec@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:26","name":"[COMMITTED,1/4] Fix floating point bug in fold_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbd39e11-cf04-87f5-627b-9b526bde87ec@redhat.com/mbox/"},{"id":105085,"url":"https://patchwork.plctlab.org/api/1.2/patches/105085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4fbb34c-a042-6704-a615-a75f5a32df6c@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:41","name":"[COMMITTED,2/4] - Remove tree_code from range-operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4fbb34c-a042-6704-a615-a75f5a32df6c@redhat.com/mbox/"},{"id":105087,"url":"https://patchwork.plctlab.org/api/1.2/patches/105087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ecb5c5-7daf-fa25-6ec5-beb79bb4e67b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:50","name":"[COMMITTED,3/4] Unify range_operators to one class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ecb5c5-7daf-fa25-6ec5-beb79bb4e67b@redhat.com/mbox/"},{"id":105086,"url":"https://patchwork.plctlab.org/api/1.2/patches/105086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b191c018-04be-dbd8-0e68-b96d9fcc3889@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:58:01","name":"[COMMITTED,4/4] Provide a new dispatch mechanism for range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b191c018-04be-dbd8-0e68-b96d9fcc3889@redhat.com/mbox/"},{"id":105212,"url":"https://patchwork.plctlab.org/api/1.2/patches/105212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609014701.3123763-1-apinski@marvell.com/","msgid":"<20230609014701.3123763-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-09T01:47:01","name":"MATCH: Fix zero_one_valued_p not to match signed 1 bit integers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609014701.3123763-1-apinski@marvell.com/mbox/"},{"id":105280,"url":"https://patchwork.plctlab.org/api/1.2/patches/105280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609055948.1744603-1-pan2.li@intel.com/","msgid":"<20230609055948.1744603-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T05:59:48","name":"[v9] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609055948.1744603-1-pan2.li@intel.com/mbox/"},{"id":105284,"url":"https://patchwork.plctlab.org/api/1.2/patches/105284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609060117.4083144-1-yanzhang.wang@intel.com/","msgid":"<20230609060117.4083144-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-09T06:01:17","name":"[v4] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609060117.4083144-1-yanzhang.wang@intel.com/mbox/"},{"id":105297,"url":"https://patchwork.plctlab.org/api/1.2/patches/105297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609070709.2087327-1-pan2.li@intel.com/","msgid":"<20230609070709.2087327-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T07:07:09","name":"[v10] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609070709.2087327-1-pan2.li@intel.com/mbox/"},{"id":105316,"url":"https://patchwork.plctlab.org/api/1.2/patches/105316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609073932.C782913A47@imap2.suse-dmz.suse.de/","msgid":"<20230609073932.C782913A47@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-09T07:39:32","name":"middle-end/110182 - TYPE_PRECISION on VECTOR_TYPE causes wrong-code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609073932.C782913A47@imap2.suse-dmz.suse.de/mbox/"},{"id":105317,"url":"https://patchwork.plctlab.org/api/1.2/patches/105317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609074005.2815F13A47@imap2.suse-dmz.suse.de/","msgid":"<20230609074005.2815F13A47@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-09T07:40:04","name":"Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609074005.2815F13A47@imap2.suse-dmz.suse.de/mbox/"},{"id":105328,"url":"https://patchwork.plctlab.org/api/1.2/patches/105328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609075301.2214833-1-pan2.li@intel.com/","msgid":"<20230609075301.2214833-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T07:53:01","name":"[v1] RISC-V: Fix one warning of frm enum.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609075301.2214833-1-pan2.li@intel.com/mbox/"},{"id":105355,"url":"https://patchwork.plctlab.org/api/1.2/patches/105355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZILdBQz6TcMnxNqC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-09T08:04:21","name":"[committed] fortran: Fix ICE on pr96024.f90 on big-endian hosts [PR96024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZILdBQz6TcMnxNqC@tucnak/mbox/"},{"id":105424,"url":"https://patchwork.plctlab.org/api/1.2/patches/105424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609083934.556871-1-juzhe.zhong@rivai.ai/","msgid":"<20230609083934.556871-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T08:39:34","name":"[V6] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609083934.556871-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105441,"url":"https://patchwork.plctlab.org/api/1.2/patches/105441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609085647.208295-1-jwakely@redhat.com/","msgid":"<20230609085647.208295-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T08:56:47","name":"[committed] libstdc++: Improve tests for emplace member of sequence containers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609085647.208295-1-jwakely@redhat.com/mbox/"},{"id":105520,"url":"https://patchwork.plctlab.org/api/1.2/patches/105520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609103251.335449-1-juzhe.zhong@rivai.ai/","msgid":"<20230609103251.335449-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T10:32:51","name":"RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609103251.335449-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105537,"url":"https://patchwork.plctlab.org/api/1.2/patches/105537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609104105.9100-1-juzhe.zhong@rivai.ai/","msgid":"<20230609104105.9100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T10:41:05","name":"[V2] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609104105.9100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105582,"url":"https://patchwork.plctlab.org/api/1.2/patches/105582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609120917.294304-1-jwakely@redhat.com/","msgid":"<20230609120917.294304-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:09:17","name":"[committed] libstdc++: Optimize std::to_array for trivial types [PR110167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609120917.294304-1-jwakely@redhat.com/mbox/"},{"id":105583,"url":"https://patchwork.plctlab.org/api/1.2/patches/105583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121025.294493-1-jwakely@redhat.com/","msgid":"<20230609121025.294493-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:10:25","name":"[committed] libstdc++: Fix P2510R3 \"Formatting pointers\" [PR110149]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121025.294493-1-jwakely@redhat.com/mbox/"},{"id":105585,"url":"https://patchwork.plctlab.org/api/1.2/patches/105585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121409.294772-1-jwakely@redhat.com/","msgid":"<20230609121409.294772-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:14:09","name":"[committed] libstdc++: Bump library version to libstdc++.so.6.0.33","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121409.294772-1-jwakely@redhat.com/mbox/"},{"id":105590,"url":"https://patchwork.plctlab.org/api/1.2/patches/105590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121900.307482-1-jwakely@redhat.com/","msgid":"<20230609121900.307482-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:19:00","name":"[committed] libstdc++: Add preprocessor checks to [PR100285]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121900.307482-1-jwakely@redhat.com/mbox/"},{"id":105594,"url":"https://patchwork.plctlab.org/api/1.2/patches/105594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609122614.308487-1-jwakely@redhat.com/","msgid":"<20230609122614.308487-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:26:14","name":"[committed] libstdc++: Remove duplicate definition of _Float128 std::from_chars [PR110077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609122614.308487-1-jwakely@redhat.com/mbox/"},{"id":105676,"url":"https://patchwork.plctlab.org/api/1.2/patches/105676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609143241.115366-1-juzhe.zhong@rivai.ai/","msgid":"<20230609143241.115366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T14:32:41","name":"RISC-V: Fix V_WHOLE && V_FRACT iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609143241.115366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105700,"url":"https://patchwork.plctlab.org/api/1.2/patches/105700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609151909.3628123-1-ppalka@redhat.com/","msgid":"<20230609151909.3628123-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:19:09","name":"c++: diagnostic ICE b/c of empty TPARMS_PRIMARY_TEMPLATE [PR109655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609151909.3628123-1-ppalka@redhat.com/mbox/"},{"id":105708,"url":"https://patchwork.plctlab.org/api/1.2/patches/105708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609153943.3386685-1-jason@redhat.com/","msgid":"<20230609153943.3386685-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:39:43","name":"[pushed] c++: init-list of uncopyable type [PR110102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609153943.3386685-1-jason@redhat.com/mbox/"},{"id":105709,"url":"https://patchwork.plctlab.org/api/1.2/patches/105709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154103.3386960-1-jason@redhat.com/","msgid":"<20230609154103.3386960-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:41:03","name":"[pushed] c++: diagnose auto in template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154103.3386960-1-jason@redhat.com/mbox/"},{"id":105711,"url":"https://patchwork.plctlab.org/api/1.2/patches/105711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154126.3387346-1-jason@redhat.com/","msgid":"<20230609154126.3387346-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:41:26","name":"[pushed] c++: fix 32-bit spaceship failures [PR110185]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154126.3387346-1-jason@redhat.com/mbox/"},{"id":105723,"url":"https://patchwork.plctlab.org/api/1.2/patches/105723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b79a4d10-ac52-0c5a-4ac2-9f86c7f6aed1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-09T16:37:40","name":"[COMMITTED] Relocate range_cast to header, and add a generic version.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b79a4d10-ac52-0c5a-4ac2-9f86c7f6aed1@redhat.com/mbox/"},{"id":105725,"url":"https://patchwork.plctlab.org/api/1.2/patches/105725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec52048f-b11b-3ac2-38ad-8a817de2f7f0@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-09T16:37:50","name":"[COMMITTED] PR ipa/109886 - Also check type being cast to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec52048f-b11b-3ac2-38ad-8a817de2f7f0@redhat.com/mbox/"},{"id":105742,"url":"https://patchwork.plctlab.org/api/1.2/patches/105742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609172753.3164342-1-apinski@marvell.com/","msgid":"<20230609172753.3164342-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-09T17:27:53","name":"MATCH: Fix zero_one_valued_p not to match signed 1 bit integers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609172753.3164342-1-apinski@marvell.com/mbox/"},{"id":105752,"url":"https://patchwork.plctlab.org/api/1.2/patches/105752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-1-mail@tim-lange.me/","msgid":"<20230609182813.72319-1-mail@tim-lange.me>","list_archive_url":null,"date":"2023-06-09T18:28:12","name":"[1/2] analyzer: Fix allocation size false positive on conjured svalue [PR109577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-1-mail@tim-lange.me/mbox/"},{"id":105753,"url":"https://patchwork.plctlab.org/api/1.2/patches/105753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-2-mail@tim-lange.me/","msgid":"<20230609182813.72319-2-mail@tim-lange.me>","list_archive_url":null,"date":"2023-06-09T18:28:13","name":"[2/2] testsuite: Add more allocation size tests for conjured svalues [PR110014]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-2-mail@tim-lange.me/mbox/"},{"id":105821,"url":"https://patchwork.plctlab.org/api/1.2/patches/105821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609220801.587289-1-dmalcolm@redhat.com/","msgid":"<20230609220801.587289-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-09T22:08:01","name":"[pushed] analyzer: add caching to globals with initializers [PR110112]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609220801.587289-1-dmalcolm@redhat.com/mbox/"},{"id":105834,"url":"https://patchwork.plctlab.org/api/1.2/patches/105834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609231143.1359411-1-juzhe.zhong@rivai.ai/","msgid":"<20230609231143.1359411-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T23:11:43","name":"[V3] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609231143.1359411-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105841,"url":"https://patchwork.plctlab.org/api/1.2/patches/105841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609235902.1270855-1-pan2.li@intel.com/","msgid":"<20230609235902.1270855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T23:59:02","name":"[v1] RISC-V: Add test cases for RVV FP16 vreinterpret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609235902.1270855-1-pan2.li@intel.com/mbox/"},{"id":105844,"url":"https://patchwork.plctlab.org/api/1.2/patches/105844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4d04b74-c27a-0129-7466-e19b4afdbcce@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-10T00:33:44","name":"[COMMITTED,1/15] - Provide a unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4d04b74-c27a-0129-7466-e19b4afdbcce@redhat.com/mbox/"},{"id":105847,"url":"https://patchwork.plctlab.org/api/1.2/patches/105847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com/","msgid":"<567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:02","name":"[2/15] Unify EQ_EXPR range operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com/mbox/"},{"id":105845,"url":"https://patchwork.plctlab.org/api/1.2/patches/105845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e54d4610-9361-49c5-85a4-786b779a05b8@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-10T00:34:10","name":"[COMMITTED,3/15] Unify NE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e54d4610-9361-49c5-85a4-786b779a05b8@redhat.com/mbox/"},{"id":105846,"url":"https://patchwork.plctlab.org/api/1.2/patches/105846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com/","msgid":"<84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:21","name":"[COMMITTED,4/15] Unify LT_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com/mbox/"},{"id":105851,"url":"https://patchwork.plctlab.org/api/1.2/patches/105851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2078a799-12da-356b-3802-4e8fdd09614e@redhat.com/","msgid":"<2078a799-12da-356b-3802-4e8fdd09614e@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:33","name":"[COMMITTED,5/15] Unify LE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2078a799-12da-356b-3802-4e8fdd09614e@redhat.com/mbox/"},{"id":105853,"url":"https://patchwork.plctlab.org/api/1.2/patches/105853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com/","msgid":"<2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:47","name":"[COMMITTED,6/15] Unify GT_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com/mbox/"},{"id":105850,"url":"https://patchwork.plctlab.org/api/1.2/patches/105850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com/","msgid":"<08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:01","name":"[COMMITTED,7/15] Unify GE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com/mbox/"},{"id":105848,"url":"https://patchwork.plctlab.org/api/1.2/patches/105848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com/","msgid":"<15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:26","name":"[COMMITTED,8/15] Unify Identity range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com/mbox/"},{"id":105849,"url":"https://patchwork.plctlab.org/api/1.2/patches/105849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com/","msgid":"<4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:37","name":"[COMMITTED,9/15] Unify operator_cst range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com/mbox/"},{"id":105852,"url":"https://patchwork.plctlab.org/api/1.2/patches/105852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com/","msgid":"<2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:51","name":"[COMMITTED,10/15] Unify operator_cast range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com/mbox/"},{"id":105855,"url":"https://patchwork.plctlab.org/api/1.2/patches/105855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com/","msgid":"<37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:36:02","name":"[COMMITTED,11/15] Unify PLUS_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com/mbox/"},{"id":105854,"url":"https://patchwork.plctlab.org/api/1.2/patches/105854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610003737.1679827-1-juzhe.zhong@rivai.ai/","msgid":"<20230610003737.1679827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-10T00:37:37","name":"RISC-V: Enable select_vl for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610003737.1679827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105890,"url":"https://patchwork.plctlab.org/api/1.2/patches/105890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610040528.1058420420@pchp3.se.axis.com/","msgid":"<20230610040528.1058420420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-10T04:05:28","name":"(Re: Splitting up 27_io/basic_istream/ignore/wchar_t/94749.cc (takes too long))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610040528.1058420420@pchp3.se.axis.com/mbox/"},{"id":105926,"url":"https://patchwork.plctlab.org/api/1.2/patches/105926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIRSdNvz+pbiUQLG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-10T10:37:40","name":"[RFC] Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIRSdNvz+pbiUQLG@tucnak/mbox/"},{"id":106019,"url":"https://patchwork.plctlab.org/api/1.2/patches/106019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org/","msgid":"<4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org>","list_archive_url":null,"date":"2023-06-10T21:28:42","name":"[c++] Implement DR 976","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org/mbox/"},{"id":106020,"url":"https://patchwork.plctlab.org/api/1.2/patches/106020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbdce7ef-037a-e677-f309-5125cf16e503@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-06-10T22:03:40","name":"libstdc++: Clarify manual demangle doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbdce7ef-037a-e677-f309-5125cf16e503@jguk.org/mbox/"},{"id":106023,"url":"https://patchwork.plctlab.org/api/1.2/patches/106023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com/","msgid":"<03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-10T22:54:36","name":"[GCC,13] PR target/109973: CCZmode and CCCmode variants of [v]ptest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com/mbox/"},{"id":106025,"url":"https://patchwork.plctlab.org/api/1.2/patches/106025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611003331.3518071-1-pan2.li@intel.com/","msgid":"<20230611003331.3518071-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-11T00:33:31","name":"[v1] RISC-V: Support RVV FP16 MISC vlmul ext intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611003331.3518071-1-pan2.li@intel.com/mbox/"},{"id":106037,"url":"https://patchwork.plctlab.org/api/1.2/patches/106037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-2-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:08","name":"[v4,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-2-kmatsui@cs.washington.edu/mbox/"},{"id":106038,"url":"https://patchwork.plctlab.org/api/1.2/patches/106038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-3-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:09","name":"[v4,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-3-kmatsui@cs.washington.edu/mbox/"},{"id":106039,"url":"https://patchwork.plctlab.org/api/1.2/patches/106039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-4-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:10","name":"[v4,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-4-kmatsui@cs.washington.edu/mbox/"},{"id":106041,"url":"https://patchwork.plctlab.org/api/1.2/patches/106041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-5-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:11","name":"[v4,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-5-kmatsui@cs.washington.edu/mbox/"},{"id":106040,"url":"https://patchwork.plctlab.org/api/1.2/patches/106040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-6-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:12","name":"[v4,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-6-kmatsui@cs.washington.edu/mbox/"},{"id":106042,"url":"https://patchwork.plctlab.org/api/1.2/patches/106042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-7-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:13","name":"[v4,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-7-kmatsui@cs.washington.edu/mbox/"},{"id":106079,"url":"https://patchwork.plctlab.org/api/1.2/patches/106079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de/","msgid":"<8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de>","list_archive_url":null,"date":"2023-06-11T12:01:30","name":"[avr,committed] Tidy code for inverted bit insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de/mbox/"},{"id":106126,"url":"https://patchwork.plctlab.org/api/1.2/patches/106126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com/","msgid":"<00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-11T16:15:14","name":"Avoid duplicate vector initializations during RTL expansion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com/mbox/"},{"id":106162,"url":"https://patchwork.plctlab.org/api/1.2/patches/106162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611230755.70848-1-juzhe.zhong@rivai.ai/","msgid":"<20230611230755.70848-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-11T23:07:55","name":"VECT: Add LEN_MASK_ LOAD/STORE to support flow control for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611230755.70848-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106172,"url":"https://patchwork.plctlab.org/api/1.2/patches/106172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGWvnynHB+8BEh1t_rtTMomEFdaZkaDCS3LU6fetkpF_HWuwbg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T01:18:28","name":"[AIX] Debugging does not require a stack frame.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGWvnynHB+8BEh1t_rtTMomEFdaZkaDCS3LU6fetkpF_HWuwbg@mail.gmail.com/mbox/"},{"id":106176,"url":"https://patchwork.plctlab.org/api/1.2/patches/106176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com/","msgid":"<083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T02:34:45","name":"[PATCHv2,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com/mbox/"},{"id":106177,"url":"https://patchwork.plctlab.org/api/1.2/patches/106177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612024102.580504-1-juzhe.zhong@rivai.ai/","msgid":"<20230612024102.580504-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T02:41:02","name":"RISC-V: Add RVV narrow shift right lowering auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612024102.580504-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106179,"url":"https://patchwork.plctlab.org/api/1.2/patches/106179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612025721.3288649-1-pan2.li@intel.com/","msgid":"<20230612025721.3288649-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T02:57:21","name":"[v1] RISC-V: Add test cases for RVV FP16 undefined and vlmul trunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612025721.3288649-1-pan2.li@intel.com/mbox/"},{"id":106211,"url":"https://patchwork.plctlab.org/api/1.2/patches/106211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612041438.272885-1-juzhe.zhong@rivai.ai/","msgid":"<20230612041438.272885-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T04:14:38","name":"[V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow control for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612041438.272885-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106285,"url":"https://patchwork.plctlab.org/api/1.2/patches/106285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612074024.454116-1-pan2.li@intel.com/","msgid":"<20230612074024.454116-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T07:40:24","name":"[v1] RISC-V: Support RVV FP16 MISC vget/vset intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612074024.454116-1-pan2.li@intel.com/mbox/"},{"id":106293,"url":"https://patchwork.plctlab.org/api/1.2/patches/106293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612075737.1801-1-stefansf@linux.ibm.com/","msgid":"<20230612075737.1801-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T07:57:38","name":"combine: Narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612075737.1801-1-stefansf@linux.ibm.com/mbox/"},{"id":106296,"url":"https://patchwork.plctlab.org/api/1.2/patches/106296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612080828.1292728-1-yanzhang.wang@intel.com/","msgid":"<20230612080828.1292728-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-12T08:08:28","name":"[v5] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612080828.1292728-1-yanzhang.wang@intel.com/mbox/"},{"id":106317,"url":"https://patchwork.plctlab.org/api/1.2/patches/106317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612082756.27638-1-tejas.belagod@arm.com/","msgid":"<20230612082756.27638-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-06-12T08:27:56","name":"[v2,PR96339] Optimise svlast[ab]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612082756.27638-1-tejas.belagod@arm.com/mbox/"},{"id":106335,"url":"https://patchwork.plctlab.org/api/1.2/patches/106335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612085617.3908962-1-jason@redhat.com/","msgid":"<20230612085617.3908962-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-12T08:56:17","name":"[pushed] c++: build initializer_list in a loop [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612085617.3908962-1-jason@redhat.com/mbox/"},{"id":106337,"url":"https://patchwork.plctlab.org/api/1.2/patches/106337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612090110.785CE138EC@imap2.suse-dmz.suse.de/","msgid":"<20230612090110.785CE138EC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-12T09:01:10","name":"middle-end/110200 - genmatch force-leaf and convert interaction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612090110.785CE138EC@imap2.suse-dmz.suse.de/mbox/"},{"id":106376,"url":"https://patchwork.plctlab.org/api/1.2/patches/106376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612093621.1223856-1-juzhe.zhong@rivai.ai/","msgid":"<20230612093621.1223856-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T09:36:21","name":"RISC-V: Add ZVFHMIN autovec block testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612093621.1223856-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106383,"url":"https://patchwork.plctlab.org/api/1.2/patches/106383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612094458.1230512-1-juzhe.zhong@rivai.ai/","msgid":"<20230612094458.1230512-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T09:44:58","name":"[V2] RISC-V: Add ZVFHMIN block autovec testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612094458.1230512-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106472,"url":"https://patchwork.plctlab.org/api/1.2/patches/106472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17379-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T10:20:00","name":"[committed] Regenerate config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17379-tamar@arm.com/mbox/"},{"id":106506,"url":"https://patchwork.plctlab.org/api/1.2/patches/106506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a09039c6-3535-c7c9-8755-acaaabc1278a@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T11:18:21","name":"rs6000: Change bitwise xor to inequality operator [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a09039c6-3535-c7c9-8755-acaaabc1278a@linux.vnet.ibm.com/mbox/"},{"id":106552,"url":"https://patchwork.plctlab.org/api/1.2/patches/106552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612121844.1412921-1-pan2.li@intel.com/","msgid":"<20230612121844.1412921-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T12:18:44","name":"[v1] RISC-V: Fix one potential test failure for RVV vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612121844.1412921-1-pan2.li@intel.com/mbox/"},{"id":106571,"url":"https://patchwork.plctlab.org/api/1.2/patches/106571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17381-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T12:53:26","name":"Remove DEFAULT_MATCHPD_PARTITIONS macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17381-tamar@arm.com/mbox/"},{"id":106586,"url":"https://patchwork.plctlab.org/api/1.2/patches/106586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131903.2C776138EC@imap2.suse-dmz.suse.de/","msgid":"<20230612131903.2C776138EC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-12T13:19:02","name":"Fix disambiguation against .MASK_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131903.2C776138EC@imap2.suse-dmz.suse.de/mbox/"},{"id":106587,"url":"https://patchwork.plctlab.org/api/1.2/patches/106587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131919.269681-1-guojiufu@linux.ibm.com/","msgid":"<20230612131919.269681-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T13:19:19","name":"rs6000: replace '\''(const_int 0)'\'' to '\''unspec:BLK [(const_int 0)]'\'' for stack_tie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131919.269681-1-guojiufu@linux.ibm.com/mbox/"},{"id":106589,"url":"https://patchwork.plctlab.org/api/1.2/patches/106589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612132901.1727002-1-juzhe.zhong@rivai.ai/","msgid":"<20230612132901.1727002-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T13:29:01","name":"RISC-V: Enhance RVV VLA SLP auto-vectorization with decompress operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612132901.1727002-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106602,"url":"https://patchwork.plctlab.org/api/1.2/patches/106602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d99d36$a38111c0$ea833540$@nextmovesoftware.com/","msgid":"<001001d99d36$a38111c0$ea833540$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-12T14:03:16","name":"New finish_compare_by_pieces target hook (for x86).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d99d36$a38111c0$ea833540$@nextmovesoftware.com/mbox/"},{"id":106662,"url":"https://patchwork.plctlab.org/api/1.2/patches/106662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd153fb-4e70-a772-14b1-730490e35611@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T14:55:43","name":"RISC-V: Implement vec_set and vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd153fb-4e70-a772-14b1-730490e35611@gmail.com/mbox/"},{"id":106663,"url":"https://patchwork.plctlab.org/api/1.2/patches/106663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com/","msgid":"<2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com>","list_archive_url":null,"date":"2023-06-12T15:04:16","name":"RISC-V: Add sign-extending variants for vmv.x.s.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com/mbox/"},{"id":106664,"url":"https://patchwork.plctlab.org/api/1.2/patches/106664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612151107.13373-1-juzhe.zhong@rivai.ai/","msgid":"<20230612151107.13373-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T15:11:07","name":"[V2] RISC-V: Enhance RVV VLA SLP auto-vectorization with decompress operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612151107.13373-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106679,"url":"https://patchwork.plctlab.org/api/1.2/patches/106679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com/","msgid":"<0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:07","name":"[COMMITTED,1/17] Move operator_addr_expr to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com/mbox/"},{"id":106681,"url":"https://patchwork.plctlab.org/api/1.2/patches/106681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com/","msgid":"<8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:12","name":"[COMMITTED,2/17] - Move operator_bitwise_not to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com/mbox/"},{"id":106682,"url":"https://patchwork.plctlab.org/api/1.2/patches/106682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com/","msgid":"<0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:17","name":"[COMMITTED,3/17] - Move operator_bitwise_xor to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com/mbox/"},{"id":106683,"url":"https://patchwork.plctlab.org/api/1.2/patches/106683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com/","msgid":"<15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:22","name":"[COMMITTED,4/17] - Move operator_bitwise_and to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com/mbox/"},{"id":106686,"url":"https://patchwork.plctlab.org/api/1.2/patches/106686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com/","msgid":"<158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:27","name":"[COMMITTED,5/17] - Move operator_bitwise_or to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com/mbox/"},{"id":106689,"url":"https://patchwork.plctlab.org/api/1.2/patches/106689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e83ca99a-6042-1629-66e4-05de9c93afb4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:31","name":"[COMMITTED,6/17] - Move operator_min to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e83ca99a-6042-1629-66e4-05de9c93afb4@redhat.com/mbox/"},{"id":106684,"url":"https://patchwork.plctlab.org/api/1.2/patches/106684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef9c4663-9cad-9ae7-defd-e1abb0a0568b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:36","name":"[COMMITTED,7/17] - Move operator_max to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef9c4663-9cad-9ae7-defd-e1abb0a0568b@redhat.com/mbox/"},{"id":106687,"url":"https://patchwork.plctlab.org/api/1.2/patches/106687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com/","msgid":"<419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:40","name":"[COMMITTED,8/17] - Split pointer based range operators to range-op-ptr.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com/mbox/"},{"id":106693,"url":"https://patchwork.plctlab.org/api/1.2/patches/106693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/690d98ed-2389-d664-dff6-00617dd596c0@redhat.com/","msgid":"<690d98ed-2389-d664-dff6-00617dd596c0@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:46","name":"[COMMITTED,9/17] - Add a hybrid BIT_AND_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/690d98ed-2389-d664-dff6-00617dd596c0@redhat.com/mbox/"},{"id":106696,"url":"https://patchwork.plctlab.org/api/1.2/patches/106696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com/","msgid":"<1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:51","name":"[COMMITTED,10/17] - Add a hybrid BIT_IOR_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com/mbox/"},{"id":106685,"url":"https://patchwork.plctlab.org/api/1.2/patches/106685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5eccc69-b7df-f3cc-74b7-421e0ea4247e@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:58","name":"[COMMITTED,11/17] - Add a hybrid MIN_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5eccc69-b7df-f3cc-74b7-421e0ea4247e@redhat.com/mbox/"},{"id":106697,"url":"https://patchwork.plctlab.org/api/1.2/patches/106697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6243523-bb57-6b36-5f9b-b9b97dca0dd8@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:02","name":"[COMMITTED,12/17] - Add a hybrid MAX_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6243523-bb57-6b36-5f9b-b9b97dca0dd8@redhat.com/mbox/"},{"id":106688,"url":"https://patchwork.plctlab.org/api/1.2/patches/106688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com/","msgid":"<8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:33:07","name":"[COMMITTED,13/17] - Remove type from range_op_handler table selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com/mbox/"},{"id":106690,"url":"https://patchwork.plctlab.org/api/1.2/patches/106690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccc6f9e8-75e7-60c9-fc76-e038fe0bca6a@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:12","name":"[COMMITTED,14/17] - Switch from unified table to range_op_table. There can be only one.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccc6f9e8-75e7-60c9-fc76-e038fe0bca6a@redhat.com/mbox/"},{"id":106694,"url":"https://patchwork.plctlab.org/api/1.2/patches/106694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3de06f0-3cdf-eaea-35b2-b61512bf3f77@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:18","name":"[COMMITTED,15/17] - Provide a default range_operator via range_op_handler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3de06f0-3cdf-eaea-35b2-b61512bf3f77@redhat.com/mbox/"},{"id":106692,"url":"https://patchwork.plctlab.org/api/1.2/patches/106692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c74647fd-ba87-65f5-0ef5-5473f148c60b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:23","name":"[COMMITTED,16/17] - Provide interface for non-standard operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c74647fd-ba87-65f5-0ef5-5473f148c60b@redhat.com/mbox/"},{"id":106695,"url":"https://patchwork.plctlab.org/api/1.2/patches/106695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65b29c92-eae6-b709-7928-84a881527724@redhat.com/","msgid":"<65b29c92-eae6-b709-7928-84a881527724@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:33:28","name":"[COMMITTED,17/17] PR tree-optimization/110205 - Add some overrides.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65b29c92-eae6-b709-7928-84a881527724@redhat.com/mbox/"},{"id":106712,"url":"https://patchwork.plctlab.org/api/1.2/patches/106712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64017201-8206-fd22-70e4-897c858ae049@codesourcery.com/","msgid":"<64017201-8206-fd22-70e4-897c858ae049@codesourcery.com>","list_archive_url":null,"date":"2023-06-12T16:44:23","name":"[committed] OpenMP: Cleanups related to the '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64017201-8206-fd22-70e4-897c858ae049@codesourcery.com/mbox/"},{"id":106764,"url":"https://patchwork.plctlab.org/api/1.2/patches/106764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com/","msgid":"<52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com>","list_archive_url":null,"date":"2023-06-12T18:55:49","name":"[committed,PR,rtl-optimization/101188] Fix reload_cse_move2add ignoring clobbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com/mbox/"},{"id":106779,"url":"https://patchwork.plctlab.org/api/1.2/patches/106779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId3OsN8187JLiKV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:51:22","name":"c: Add __typeof_unqual__ and __typeof_unqual support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId3OsN8187JLiKV@tucnak/mbox/"},{"id":106784,"url":"https://patchwork.plctlab.org/api/1.2/patches/106784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId4nTL6nFuc02rH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:57:17","name":"c, c++: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId4nTL6nFuc02rH@tucnak/mbox/"},{"id":106787,"url":"https://patchwork.plctlab.org/api/1.2/patches/106787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId5JjzFMuybL4v5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:59:34","name":"c: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId5JjzFMuybL4v5@tucnak/mbox/"},{"id":106891,"url":"https://patchwork.plctlab.org/api/1.2/patches/106891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ee69c69e-7b4c-48d6-8f89-a5c4467fd9e6-1686604365454@3c-app-gmx-bs01/","msgid":"","list_archive_url":null,"date":"2023-06-12T21:12:45","name":"Fortran: fix passing of zero-sized array arguments to procedures [PR86277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ee69c69e-7b4c-48d6-8f89-a5c4467fd9e6-1686604365454@3c-app-gmx-bs01/mbox/"},{"id":106920,"url":"https://patchwork.plctlab.org/api/1.2/patches/106920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-2-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:26","name":"[v5,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-2-kmatsui@cs.washington.edu/mbox/"},{"id":106921,"url":"https://patchwork.plctlab.org/api/1.2/patches/106921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-3-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:27","name":"[v5,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-3-kmatsui@cs.washington.edu/mbox/"},{"id":106922,"url":"https://patchwork.plctlab.org/api/1.2/patches/106922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-4-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:28","name":"[v5,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-4-kmatsui@cs.washington.edu/mbox/"},{"id":106923,"url":"https://patchwork.plctlab.org/api/1.2/patches/106923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-5-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:29","name":"[v5,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-5-kmatsui@cs.washington.edu/mbox/"},{"id":106925,"url":"https://patchwork.plctlab.org/api/1.2/patches/106925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-6-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:30","name":"[v5,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-6-kmatsui@cs.washington.edu/mbox/"},{"id":106926,"url":"https://patchwork.plctlab.org/api/1.2/patches/106926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-7-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:31","name":"[v5,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-7-kmatsui@cs.washington.edu/mbox/"},{"id":106929,"url":"https://patchwork.plctlab.org/api/1.2/patches/106929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-2-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:47","name":"[v6,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-2-kmatsui@cs.washington.edu/mbox/"},{"id":106930,"url":"https://patchwork.plctlab.org/api/1.2/patches/106930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-3-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:48","name":"[v6,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-3-kmatsui@cs.washington.edu/mbox/"},{"id":106932,"url":"https://patchwork.plctlab.org/api/1.2/patches/106932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-4-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:49","name":"[v6,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-4-kmatsui@cs.washington.edu/mbox/"},{"id":106931,"url":"https://patchwork.plctlab.org/api/1.2/patches/106931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-5-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:50","name":"[v6,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-5-kmatsui@cs.washington.edu/mbox/"},{"id":106935,"url":"https://patchwork.plctlab.org/api/1.2/patches/106935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-6-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:51","name":"[v6,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-6-kmatsui@cs.washington.edu/mbox/"},{"id":106933,"url":"https://patchwork.plctlab.org/api/1.2/patches/106933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-7-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:52","name":"[v6,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-7-kmatsui@cs.washington.edu/mbox/"},{"id":106936,"url":"https://patchwork.plctlab.org/api/1.2/patches/106936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-2-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:24","name":"[v7,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-2-kmatsui@cs.washington.edu/mbox/"},{"id":106937,"url":"https://patchwork.plctlab.org/api/1.2/patches/106937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-3-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:25","name":"[v7,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-3-kmatsui@cs.washington.edu/mbox/"},{"id":106938,"url":"https://patchwork.plctlab.org/api/1.2/patches/106938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-4-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:26","name":"[v7,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-4-kmatsui@cs.washington.edu/mbox/"},{"id":106939,"url":"https://patchwork.plctlab.org/api/1.2/patches/106939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-5-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:27","name":"[v7,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-5-kmatsui@cs.washington.edu/mbox/"},{"id":106940,"url":"https://patchwork.plctlab.org/api/1.2/patches/106940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-6-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:28","name":"[v7,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-6-kmatsui@cs.washington.edu/mbox/"},{"id":106941,"url":"https://patchwork.plctlab.org/api/1.2/patches/106941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-7-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:29","name":"[v7,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-7-kmatsui@cs.washington.edu/mbox/"},{"id":106962,"url":"https://patchwork.plctlab.org/api/1.2/patches/106962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIe0tCZyKfle3+BU@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T00:13:40","name":"[wwwdocs] cxx-dr-status: Update from C++ Core Language Issue TOC, Revision 111","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIe0tCZyKfle3+BU@redhat.com/mbox/"},{"id":107005,"url":"https://patchwork.plctlab.org/api/1.2/patches/107005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613005921.93315-1-jorgen.kvalsvik@woven.toyota/","msgid":"<20230613005921.93315-1-jorgen.kvalsvik@woven.toyota>","list_archive_url":null,"date":"2023-06-13T00:59:21","name":"[v4] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613005921.93315-1-jorgen.kvalsvik@woven.toyota/mbox/"},{"id":107016,"url":"https://patchwork.plctlab.org/api/1.2/patches/107016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8597dce488a3301f4b9917249a5a286b925f87c.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:22","name":"[1/9] vect: Move vect_model_load_cost next to the transform in vectorizable_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8597dce488a3301f4b9917249a5a286b925f87c.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107019,"url":"https://patchwork.plctlab.org/api/1.2/patches/107019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com/","msgid":"<9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:23","name":"[2/9] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER && gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107017,"url":"https://patchwork.plctlab.org/api/1.2/patches/107017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db8fecc7f079cd781695e26b6a7bf6a47e14e8ab.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:24","name":"[3/9] vect: Adjust vectorizable_load costing on VMAT_INVARIANT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db8fecc7f079cd781695e26b6a7bf6a47e14e8ab.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107022,"url":"https://patchwork.plctlab.org/api/1.2/patches/107022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com/","msgid":"<0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:25","name":"[4/9] vect: Adjust vectorizable_load costing on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107023,"url":"https://patchwork.plctlab.org/api/1.2/patches/107023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea7b896e3cbc7ffc13e802a12f3ece1c625b0c4d.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:26","name":"[5/9] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea7b896e3cbc7ffc13e802a12f3ece1c625b0c4d.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107018,"url":"https://patchwork.plctlab.org/api/1.2/patches/107018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com/","msgid":"<1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:27","name":"[6/9] vect: Adjust vectorizable_load costing on VMAT_LOAD_STORE_LANES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107024,"url":"https://patchwork.plctlab.org/api/1.2/patches/107024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0d83a313ba6b9d6dd33bcbd7981f04ce733cc4e.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:28","name":"[7/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS_REVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0d83a313ba6b9d6dd33bcbd7981f04ce733cc4e.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107021,"url":"https://patchwork.plctlab.org/api/1.2/patches/107021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com/","msgid":"<216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:29","name":"[8/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS_PERMUTE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107020,"url":"https://patchwork.plctlab.org/api/1.2/patches/107020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com/","msgid":"<625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:30","name":"[9/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107026,"url":"https://patchwork.plctlab.org/api/1.2/patches/107026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613022611.2189297-1-juzhe.zhong@rivai.ai/","msgid":"<20230613022611.2189297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T02:26:11","name":"RISC-V: Add comments of some functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613022611.2189297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107028,"url":"https://patchwork.plctlab.org/api/1.2/patches/107028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613024640.2726370-1-yanzhang.wang@intel.com/","msgid":"<20230613024640.2726370-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-13T02:46:40","name":"[v6] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613024640.2726370-1-yanzhang.wang@intel.com/mbox/"},{"id":107054,"url":"https://patchwork.plctlab.org/api/1.2/patches/107054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPzzfctOqwsbG4ig4gT2eUWc5C+YdLZPJfKtHDgN8OKSQU+PzA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T03:18:54","name":"Fix note_defect3 function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPzzfctOqwsbG4ig4gT2eUWc5C+YdLZPJfKtHDgN8OKSQU+PzA@mail.gmail.com/mbox/"},{"id":107056,"url":"https://patchwork.plctlab.org/api/1.2/patches/107056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613032823.264347-1-maskray@google.com/","msgid":"<20230613032823.264347-1-maskray@google.com>","list_archive_url":null,"date":"2023-06-13T03:28:23","name":"[v3] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613032823.264347-1-maskray@google.com/mbox/"},{"id":107105,"url":"https://patchwork.plctlab.org/api/1.2/patches/107105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613064126.1323-1-jinma@linux.alibaba.com/","msgid":"<20230613064126.1323-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-06-13T06:41:26","name":"RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613064126.1323-1-jinma@linux.alibaba.com/mbox/"},{"id":107116,"url":"https://patchwork.plctlab.org/api/1.2/patches/107116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613071703.704283-1-pan2.li@intel.com/","msgid":"<20230613071703.704283-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-13T07:17:03","name":"[v1] RISC-V: Fix one typo in full-vec-movel test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613071703.704283-1-pan2.li@intel.com/mbox/"},{"id":107131,"url":"https://patchwork.plctlab.org/api/1.2/patches/107131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073723.238680-1-poulhies@adacore.com/","msgid":"<20230613073723.238680-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:23","name":"[COMMITTED] ada: Remove explicit decoration of wrapper created in freezing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073723.238680-1-poulhies@adacore.com/mbox/"},{"id":107135,"url":"https://patchwork.plctlab.org/api/1.2/patches/107135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073736.238835-1-poulhies@adacore.com/","msgid":"<20230613073736.238835-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:36","name":"[COMMITTED] ada: Support new GNAT-specific aspect Ghost_Predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073736.238835-1-poulhies@adacore.com/mbox/"},{"id":107132,"url":"https://patchwork.plctlab.org/api/1.2/patches/107132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073740.238900-1-poulhies@adacore.com/","msgid":"<20230613073740.238900-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:40","name":"[COMMITTED] ada: Simplify appending to a newly created list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073740.238900-1-poulhies@adacore.com/mbox/"},{"id":107136,"url":"https://patchwork.plctlab.org/api/1.2/patches/107136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073742.238961-1-poulhies@adacore.com/","msgid":"<20230613073742.238961-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:42","name":"[COMMITTED] ada: Tune style in detection of writable function actuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073742.238961-1-poulhies@adacore.com/mbox/"},{"id":107140,"url":"https://patchwork.plctlab.org/api/1.2/patches/107140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073744.239061-1-poulhies@adacore.com/","msgid":"<20230613073744.239061-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:44","name":"[COMMITTED] ada: Cleanup expansion of locally handled exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073744.239061-1-poulhies@adacore.com/mbox/"},{"id":107144,"url":"https://patchwork.plctlab.org/api/1.2/patches/107144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073746.239122-1-poulhies@adacore.com/","msgid":"<20230613073746.239122-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:46","name":"[COMMITTED] ada: Cleanup finding of locally handled exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073746.239122-1-poulhies@adacore.com/mbox/"},{"id":107147,"url":"https://patchwork.plctlab.org/api/1.2/patches/107147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073749.239184-1-poulhies@adacore.com/","msgid":"<20230613073749.239184-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:49","name":"[COMMITTED] ada: Remove wrong comment about expansion of exceptions for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073749.239184-1-poulhies@adacore.com/mbox/"},{"id":107137,"url":"https://patchwork.plctlab.org/api/1.2/patches/107137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073751.239246-1-poulhies@adacore.com/","msgid":"<20230613073751.239246-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:51","name":"[COMMITTED] ada: Factor common processing in expansion of aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073751.239246-1-poulhies@adacore.com/mbox/"},{"id":107133,"url":"https://patchwork.plctlab.org/api/1.2/patches/107133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073753.239309-1-poulhies@adacore.com/","msgid":"<20230613073753.239309-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:53","name":"[COMMITTED] ada: Fix expansion of aggregates with controlled components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073753.239309-1-poulhies@adacore.com/mbox/"},{"id":107153,"url":"https://patchwork.plctlab.org/api/1.2/patches/107153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073756.239408-1-poulhies@adacore.com/","msgid":"<20230613073756.239408-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:56","name":"[COMMITTED] ada: Use ghost predicate in standard library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073756.239408-1-poulhies@adacore.com/mbox/"},{"id":107134,"url":"https://patchwork.plctlab.org/api/1.2/patches/107134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073758.239469-1-poulhies@adacore.com/","msgid":"<20230613073758.239469-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:58","name":"[COMMITTED] ada: Factor out tag assignments from type in expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073758.239469-1-poulhies@adacore.com/mbox/"},{"id":107138,"url":"https://patchwork.plctlab.org/api/1.2/patches/107138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073800.239531-1-poulhies@adacore.com/","msgid":"<20230613073800.239531-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:00","name":"[COMMITTED] ada: Add No_Elaboration_Code_All pragma to System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073800.239531-1-poulhies@adacore.com/mbox/"},{"id":107157,"url":"https://patchwork.plctlab.org/api/1.2/patches/107157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073802.239593-1-poulhies@adacore.com/","msgid":"<20230613073802.239593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:02","name":"[COMMITTED] ada: Mark attribute Initialized as ghost code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073802.239593-1-poulhies@adacore.com/mbox/"},{"id":107142,"url":"https://patchwork.plctlab.org/api/1.2/patches/107142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073804.239660-1-poulhies@adacore.com/","msgid":"<20230613073804.239660-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:04","name":"[COMMITTED] ada: Fix wrong expansion of limited extension aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073804.239660-1-poulhies@adacore.com/mbox/"},{"id":107141,"url":"https://patchwork.plctlab.org/api/1.2/patches/107141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073809.239731-1-poulhies@adacore.com/","msgid":"<20230613073809.239731-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:09","name":"[COMMITTED] ada: Small housekeeping work in expansion of extension aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073809.239731-1-poulhies@adacore.com/mbox/"},{"id":107149,"url":"https://patchwork.plctlab.org/api/1.2/patches/107149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073811.239803-1-poulhies@adacore.com/","msgid":"<20230613073811.239803-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:11","name":"[COMMITTED] ada: Remove unreferenced routine Is_Inherited_Operation_For_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073811.239803-1-poulhies@adacore.com/mbox/"},{"id":107145,"url":"https://patchwork.plctlab.org/api/1.2/patches/107145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073814.239864-1-poulhies@adacore.com/","msgid":"<20230613073814.239864-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:14","name":"[COMMITTED] ada: Remove obsolete code in Analyze_Assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073814.239864-1-poulhies@adacore.com/mbox/"},{"id":107154,"url":"https://patchwork.plctlab.org/api/1.2/patches/107154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073816.239933-1-poulhies@adacore.com/","msgid":"<20230613073816.239933-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:16","name":"[COMMITTED] ada: Streamline expansion of controlled actions for aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073816.239933-1-poulhies@adacore.com/mbox/"},{"id":107146,"url":"https://patchwork.plctlab.org/api/1.2/patches/107146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073818.239995-1-poulhies@adacore.com/","msgid":"<20230613073818.239995-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:18","name":"[COMMITTED] ada: Fix internal error on imported function with post-condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073818.239995-1-poulhies@adacore.com/mbox/"},{"id":107159,"url":"https://patchwork.plctlab.org/api/1.2/patches/107159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073821.240073-1-poulhies@adacore.com/","msgid":"<20230613073821.240073-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:21","name":"[COMMITTED] ada: Fix spurious error on call to function returning private in generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073821.240073-1-poulhies@adacore.com/mbox/"},{"id":107150,"url":"https://patchwork.plctlab.org/api/1.2/patches/107150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073823.240135-1-poulhies@adacore.com/","msgid":"<20230613073823.240135-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:23","name":"[COMMITTED] ada: Fix exception raised on invalid contract in generic package","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073823.240135-1-poulhies@adacore.com/mbox/"},{"id":107162,"url":"https://patchwork.plctlab.org/api/1.2/patches/107162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073825.240197-1-poulhies@adacore.com/","msgid":"<20230613073825.240197-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:25","name":"[COMMITTED] ada: Fix iterated component initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073825.240197-1-poulhies@adacore.com/mbox/"},{"id":107167,"url":"https://patchwork.plctlab.org/api/1.2/patches/107167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073827.240259-1-poulhies@adacore.com/","msgid":"<20230613073827.240259-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:27","name":"[COMMITTED] ada: Fix another case of missing Has_Private_View flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073827.240259-1-poulhies@adacore.com/mbox/"},{"id":107155,"url":"https://patchwork.plctlab.org/api/1.2/patches/107155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073829.240320-1-poulhies@adacore.com/","msgid":"<20230613073829.240320-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:29","name":"[COMMITTED] ada: Skip elaboration checks for abstract subprograms on derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073829.240320-1-poulhies@adacore.com/mbox/"},{"id":107158,"url":"https://patchwork.plctlab.org/api/1.2/patches/107158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073831.240386-1-poulhies@adacore.com/","msgid":"<20230613073831.240386-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:31","name":"[COMMITTED] ada: Implement new aspect Always_Terminates for SPARK","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073831.240386-1-poulhies@adacore.com/mbox/"},{"id":107160,"url":"https://patchwork.plctlab.org/api/1.2/patches/107160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073835.240455-1-poulhies@adacore.com/","msgid":"<20230613073835.240455-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:35","name":"[COMMITTED] ada: Disable inlining in potentially unevaluated contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073835.240455-1-poulhies@adacore.com/mbox/"},{"id":107163,"url":"https://patchwork.plctlab.org/api/1.2/patches/107163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073837.240516-1-poulhies@adacore.com/","msgid":"<20230613073837.240516-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:37","name":"[COMMITTED] ada: Recognize iterated_component_association as potentially unevaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073837.240516-1-poulhies@adacore.com/mbox/"},{"id":107164,"url":"https://patchwork.plctlab.org/api/1.2/patches/107164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073839.240577-1-poulhies@adacore.com/","msgid":"<20230613073839.240577-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:39","name":"[COMMITTED] ada: Recognize iterated_component_association as repeatedly evaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073839.240577-1-poulhies@adacore.com/mbox/"},{"id":107151,"url":"https://patchwork.plctlab.org/api/1.2/patches/107151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073841.240638-1-poulhies@adacore.com/","msgid":"<20230613073841.240638-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:41","name":"[COMMITTED] ada: Add missing ss_mark/ss_release in quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073841.240638-1-poulhies@adacore.com/mbox/"},{"id":107168,"url":"https://patchwork.plctlab.org/api/1.2/patches/107168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073844.240700-1-poulhies@adacore.com/","msgid":"<20230613073844.240700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:44","name":"[COMMITTED] ada: Fix decoration of iterated component association for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073844.240700-1-poulhies@adacore.com/mbox/"},{"id":107174,"url":"https://patchwork.plctlab.org/api/1.2/patches/107174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e52b7d-30cb-a571-c1f3-fb9275dc2498@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T08:11:07","name":"[committed] testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e52b7d-30cb-a571-c1f3-fb9275dc2498@linux.ibm.com/mbox/"},{"id":107184,"url":"https://patchwork.plctlab.org/api/1.2/patches/107184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082643.149991-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230613082643.149991-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-13T08:26:43","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082643.149991-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":107185,"url":"https://patchwork.plctlab.org/api/1.2/patches/107185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082715.150054-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230613082715.150054-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-13T08:27:15","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082715.150054-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":107190,"url":"https://patchwork.plctlab.org/api/1.2/patches/107190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084223.D3B863857006@sourceware.org/","msgid":"<20230613084223.D3B863857006@sourceware.org>","list_archive_url":null,"date":"2023-06-13T08:41:32","name":"Fix disambiguation against .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084223.D3B863857006@sourceware.org/mbox/"},{"id":107191,"url":"https://patchwork.plctlab.org/api/1.2/patches/107191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084337.9F2843858414@sourceware.org/","msgid":"<20230613084337.9F2843858414@sourceware.org>","list_archive_url":null,"date":"2023-06-13T08:42:15","name":"middle-end/110232 - fix native interpret of vector ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084337.9F2843858414@sourceware.org/mbox/"},{"id":107194,"url":"https://patchwork.plctlab.org/api/1.2/patches/107194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com/","msgid":"<3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T08:49:45","name":"[PATCHv3,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com/mbox/"},{"id":107210,"url":"https://patchwork.plctlab.org/api/1.2/patches/107210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613091449.324764-1-juzhe.zhong@rivai.ai/","msgid":"<20230613091449.324764-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T09:14:49","name":"RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613091449.324764-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107212,"url":"https://patchwork.plctlab.org/api/1.2/patches/107212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613093055.329955-1-juzhe.zhong@rivai.ai/","msgid":"<20230613093055.329955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T09:30:55","name":"RISC-V: Fix bug of VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613093055.329955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107215,"url":"https://patchwork.plctlab.org/api/1.2/patches/107215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com/","msgid":"<13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T09:35:11","name":"[committed] libgomp/testsuite: Add requires-unified-addr-1.{c,f90} [PR109837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com/mbox/"},{"id":107261,"url":"https://patchwork.plctlab.org/api/1.2/patches/107261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613103541.96476-1-juzhe.zhong@rivai.ai/","msgid":"<20230613103541.96476-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:35:41","name":"[V2] RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613103541.96476-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107263,"url":"https://patchwork.plctlab.org/api/1.2/patches/107263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttvb7ied.fsf@euler.schwinge.homeip.net/","msgid":"<87ttvb7ied.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-13T10:42:34","name":"[ping] Add '\''libgomp.{, oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttvb7ied.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107264,"url":"https://patchwork.plctlab.org/api/1.2/patches/107264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qf7ibj.fsf@euler.schwinge.homeip.net/","msgid":"<87r0qf7ibj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-13T10:44:16","name":"[ping] driver: Forward '\''-lgfortran'\'', '\''-lm'\'' to offloading compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qf7ibj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107270,"url":"https://patchwork.plctlab.org/api/1.2/patches/107270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105304.708770-1-lehua.ding@rivai.ai/","msgid":"<20230613105304.708770-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:53:04","name":"RISC-V: Remove duplicate `#include \"riscv-vector-switch.def\"`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105304.708770-1-lehua.ding@rivai.ai/mbox/"},{"id":107273,"url":"https://patchwork.plctlab.org/api/1.2/patches/107273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105909.820090-1-lehua.ding@rivai.ai/","msgid":"<20230613105909.820090-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:59:09","name":"[V2] RISC-V: Remove duplicate `#include \"riscv-vector-switch.def\"`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105909.820090-1-lehua.ding@rivai.ai/mbox/"},{"id":107318,"url":"https://patchwork.plctlab.org/api/1.2/patches/107318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613113838.183314-1-juzhe.zhong@rivai.ai/","msgid":"<20230613113838.183314-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T11:38:38","name":"[V3] RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613113838.183314-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107336,"url":"https://patchwork.plctlab.org/api/1.2/patches/107336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613120934.4183450-1-jason@redhat.com/","msgid":"<20230613120934.4183450-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-13T12:09:34","name":"[pushed] c++: mutable temps in rodata","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613120934.4183450-1-jason@redhat.com/mbox/"},{"id":107344,"url":"https://patchwork.plctlab.org/api/1.2/patches/107344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122209.B5D7B3858C30@sourceware.org/","msgid":"<20230613122209.B5D7B3858C30@sourceware.org>","list_archive_url":null,"date":"2023-06-13T12:21:26","name":"Fix memory leak in loop header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122209.B5D7B3858C30@sourceware.org/mbox/"},{"id":107345,"url":"https://patchwork.plctlab.org/api/1.2/patches/107345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122335.2108620-1-guojiufu@linux.ibm.com/","msgid":"<20230613122335.2108620-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T12:23:35","name":"rs6000: replace '\''(const_int 0)'\'' to '\''unspec:BLK [(const_int 0)]'\'' for stack_tie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122335.2108620-1-guojiufu@linux.ibm.com/mbox/"},{"id":107369,"url":"https://patchwork.plctlab.org/api/1.2/patches/107369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613130529.7762-1-someguy@effective-light.com/","msgid":"<20230613130529.7762-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-06-13T13:05:29","name":"Add -Wmissing-variable-declarations [PR65213].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613130529.7762-1-someguy@effective-light.com/mbox/"},{"id":107441,"url":"https://patchwork.plctlab.org/api/1.2/patches/107441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1a5d579-f28c-9417-44ed-ba6248850398@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T15:52:25","name":"[OpenACC,2.7] Implement self clause for compute constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1a5d579-f28c-9417-44ed-ba6248850398@siemens.com/mbox/"},{"id":107444,"url":"https://patchwork.plctlab.org/api/1.2/patches/107444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com/","msgid":"<0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T15:55:57","name":"vect: Vectorize via libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com/mbox/"},{"id":107448,"url":"https://patchwork.plctlab.org/api/1.2/patches/107448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com/","msgid":"<00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-13T16:03:52","name":"[x86] Convert ptestz of pandn into ptestc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com/mbox/"},{"id":107458,"url":"https://patchwork.plctlab.org/api/1.2/patches/107458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIiZbniaGFLYHGwi@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-13T16:29:34","name":"libcpp: Diagnose #include after failed __has_include [PR80753]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIiZbniaGFLYHGwi@tucnak/mbox/"},{"id":107462,"url":"https://patchwork.plctlab.org/api/1.2/patches/107462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIicZLX240GoXGAs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-13T16:42:12","name":"[committed] i386: Fix up whitespace in assembly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIicZLX240GoXGAs@tucnak/mbox/"},{"id":107470,"url":"https://patchwork.plctlab.org/api/1.2/patches/107470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com/","msgid":"<57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com>","list_archive_url":null,"date":"2023-06-13T17:15:07","name":"[committed] Remove sh5media divtab code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com/mbox/"},{"id":107496,"url":"https://patchwork.plctlab.org/api/1.2/patches/107496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f028ee5a-489a-200b-028c-92cf7ee32115@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T17:49:03","name":"[commited] Remove a couple mudflap remnants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f028ee5a-489a-200b-028c-92cf7ee32115@gmail.com/mbox/"},{"id":107509,"url":"https://patchwork.plctlab.org/api/1.2/patches/107509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com/","msgid":"<1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T18:44:39","name":"OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com/mbox/"},{"id":107510,"url":"https://patchwork.plctlab.org/api/1.2/patches/107510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc0e7c7-27e0-c6e1-7fa0-c2283ee2903b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T18:45:33","name":"[wwwdocs] gcc-14/changes.html + projects/gomp/: GCC 14 OpenMP update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc0e7c7-27e0-c6e1-7fa0-c2283ee2903b@codesourcery.com/mbox/"},{"id":107547,"url":"https://patchwork.plctlab.org/api/1.2/patches/107547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb2c916c-cd80-03ae-a0c5-9c70adad7a6f@acm.org/","msgid":"","list_archive_url":null,"date":"2023-06-13T21:11:02","name":"Fix templated conversion operator demangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb2c916c-cd80-03ae-a0c5-9c70adad7a6f@acm.org/mbox/"},{"id":107558,"url":"https://patchwork.plctlab.org/api/1.2/patches/107558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613214618.879071-1-dmalcolm@redhat.com/","msgid":"<20230613214618.879071-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-13T21:46:18","name":"[pushed] c/c++: use positive tone in missing header notes [PR84890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613214618.879071-1-dmalcolm@redhat.com/mbox/"},{"id":107635,"url":"https://patchwork.plctlab.org/api/1.2/patches/107635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614004316.546426-1-xry111@xry111.site/","msgid":"<20230614004316.546426-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-06-14T00:43:16","name":"LoongArch: Set default alignment for functions and labels with -mtune","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614004316.546426-1-xry111@xry111.site/mbox/"},{"id":107637,"url":"https://patchwork.plctlab.org/api/1.2/patches/107637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614005859.960040-1-pan2.li@intel.com/","msgid":"<20230614005859.960040-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T00:58:59","name":"[v1] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614005859.960040-1-pan2.li@intel.com/mbox/"},{"id":107653,"url":"https://patchwork.plctlab.org/api/1.2/patches/107653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614014755.634006-1-hongtao.liu@intel.com/","msgid":"<20230614014755.634006-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-14T01:47:55","name":"[x86] Use x instead of v for alternative 2 (v, BH) in mov_internal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614014755.634006-1-hongtao.liu@intel.com/mbox/"},{"id":107657,"url":"https://patchwork.plctlab.org/api/1.2/patches/107657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIkiap8FXrBHAShh@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T02:14:02","name":"[V6] Fix power10 fusion and -fstack-protector, PR target/105325","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIkiap8FXrBHAShh@cowardly-lion.the-meissners.org/mbox/"},{"id":107659,"url":"https://patchwork.plctlab.org/api/1.2/patches/107659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614021557.1691461-1-pan2.li@intel.com/","msgid":"<20230614021557.1691461-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T02:15:57","name":"[v1] RISC-V: Align the predictor style for define_insn_and_split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614021557.1691461-1-pan2.li@intel.com/mbox/"},{"id":107695,"url":"https://patchwork.plctlab.org/api/1.2/patches/107695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614042409.266841-1-juzhe.zhong@rivai.ai/","msgid":"<20230614042409.266841-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-14T04:24:09","name":"RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614042409.266841-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107704,"url":"https://patchwork.plctlab.org/api/1.2/patches/107704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1901e956-dc34-cc03-0419-8d4338174384@suse.com/","msgid":"<1901e956-dc34-cc03-0419-8d4338174384@suse.com>","list_archive_url":null,"date":"2023-06-14T05:54:35","name":"x86/AVX512: use VMOVDDUP for broadcast to V2DF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1901e956-dc34-cc03-0419-8d4338174384@suse.com/mbox/"},{"id":107705,"url":"https://patchwork.plctlab.org/api/1.2/patches/107705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com/","msgid":"<5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com>","list_archive_url":null,"date":"2023-06-14T05:55:43","name":"x86: add Bk and Br to comment list B'\''s sub-chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com/mbox/"},{"id":107706,"url":"https://patchwork.plctlab.org/api/1.2/patches/107706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com/","msgid":"<48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com>","list_archive_url":null,"date":"2023-06-14T05:57:38","name":"x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com/mbox/"},{"id":107708,"url":"https://patchwork.plctlab.org/api/1.2/patches/107708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com/","msgid":"<68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com>","list_archive_url":null,"date":"2023-06-14T05:59:05","name":"x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com/mbox/"},{"id":107751,"url":"https://patchwork.plctlab.org/api/1.2/patches/107751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com/","msgid":"<1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com>","list_archive_url":null,"date":"2023-06-14T07:16:13","name":"RISC-V: Add (u)int8_t to binop tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com/mbox/"},{"id":107760,"url":"https://patchwork.plctlab.org/api/1.2/patches/107760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614072900.3698145-1-pan2.li@intel.com/","msgid":"<20230614072900.3698145-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T07:29:00","name":"[v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614072900.3698145-1-pan2.li@intel.com/mbox/"},{"id":107783,"url":"https://patchwork.plctlab.org/api/1.2/patches/107783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614075746.3918-1-jinma@linux.alibaba.com/","msgid":"<20230614075746.3918-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-06-14T07:57:45","name":"[v2] RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614075746.3918-1-jinma@linux.alibaba.com/mbox/"},{"id":107796,"url":"https://patchwork.plctlab.org/api/1.2/patches/107796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm5y31p6.fsf@euler.schwinge.homeip.net/","msgid":"<87pm5y31p6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T08:09:09","name":"Fix typo in '\''libgomp.c/target-51.c'\'' (was: [patch] OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm5y31p6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107819,"url":"https://patchwork.plctlab.org/api/1.2/patches/107819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614090035.5470-1-pan2.li@intel.com/","msgid":"<20230614090035.5470-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T09:00:35","name":"[v3] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614090035.5470-1-pan2.li@intel.com/mbox/"},{"id":107824,"url":"https://patchwork.plctlab.org/api/1.2/patches/107824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfme1dRTqaLR0UWLVnKj_eYw-c3DBqLFCwH_Y3JnowWg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T09:14:38","name":"Remove MFWRAP_SPEC remnant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfme1dRTqaLR0UWLVnKj_eYw-c3DBqLFCwH_Y3JnowWg@mail.gmail.com/mbox/"},{"id":107832,"url":"https://patchwork.plctlab.org/api/1.2/patches/107832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614094705.EC699385842C@sourceware.org/","msgid":"<20230614094705.EC699385842C@sourceware.org>","list_archive_url":null,"date":"2023-06-14T09:46:18","name":"[RFC] main loop masked vectorization with --param vect-partial-vector-usage=1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614094705.EC699385842C@sourceware.org/mbox/"},{"id":107845,"url":"https://patchwork.plctlab.org/api/1.2/patches/107845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kmv02k.fsf@euler.schwinge.homeip.net/","msgid":"<87y1kmv02k.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T09:56:51","name":"Add '\''libgomp.{,oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kmv02k.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107848,"url":"https://patchwork.plctlab.org/api/1.2/patches/107848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZZpOzdCPBz84zEYCiakXn6b5Hr=ae=-_un5z26erWO4Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T10:15:38","name":"RTL: Merge rtx_equal_p and hash_rtx functions with their callback variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZZpOzdCPBz84zEYCiakXn6b5Hr=ae=-_un5z26erWO4Q@mail.gmail.com/mbox/"},{"id":107879,"url":"https://patchwork.plctlab.org/api/1.2/patches/107879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com/","msgid":"<641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T10:34:20","name":"libgomp.texi: Document allocator + affininity env vars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com/mbox/"},{"id":107880,"url":"https://patchwork.plctlab.org/api/1.2/patches/107880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614103444.2179711-1-lehua.ding@rivai.ai/","msgid":"<20230614103444.2179711-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T10:34:44","name":"RISC-V: Fix PR 110119","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614103444.2179711-1-lehua.ding@rivai.ai/mbox/"},{"id":107882,"url":"https://patchwork.plctlab.org/api/1.2/patches/107882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz1ywcp0.fsf@euler.schwinge.homeip.net/","msgid":"<87cz1ywcp0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T10:38:51","name":"libgomp testsuite: Don'\''t handle '\''lang_link_flags'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz1ywcp0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107888,"url":"https://patchwork.plctlab.org/api/1.2/patches/107888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5x2wbsj.fsf@euler.schwinge.homeip.net/","msgid":"<87a5x2wbsj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T10:58:20","name":"Align a '\''OMP_TARGET_OFFLOAD=mandatory'\'' diagnostic with others (was: Fix typo in '\''libgomp.c/target-51.c'\'' (was: [patch] OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5x2wbsj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107892,"url":"https://patchwork.plctlab.org/api/1.2/patches/107892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614110319.2191614-1-lehua.ding@rivai.ai/","msgid":"<20230614110319.2191614-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T11:03:19","name":"RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614110319.2191614-1-lehua.ding@rivai.ai/mbox/"},{"id":107900,"url":"https://patchwork.plctlab.org/api/1.2/patches/107900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E46DF34D4D45854A+2023061419204905814546@rivai.ai/","msgid":"","list_archive_url":null,"date":"2023-06-14T11:20:49","name":"??????: Re: [PATCH] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E46DF34D4D45854A+2023061419204905814546@rivai.ai/mbox/"},{"id":107911,"url":"https://patchwork.plctlab.org/api/1.2/patches/107911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114827.9103B3856DF1@sourceware.org/","msgid":"<20230614114827.9103B3856DF1@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:47:10","name":"[1/3] Inline vect_get_max_nscalars_per_iter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114827.9103B3856DF1@sourceware.org/mbox/"},{"id":107912,"url":"https://patchwork.plctlab.org/api/1.2/patches/107912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114843.66BFB3858288@sourceware.org/","msgid":"<20230614114843.66BFB3858288@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:47:21","name":"[2/3] Add loop_vinfo argument to vect_get_loop_mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114843.66BFB3858288@sourceware.org/mbox/"},{"id":107916,"url":"https://patchwork.plctlab.org/api/1.2/patches/107916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115455.ACA883858422@sourceware.org/","msgid":"<20230614115455.ACA883858422@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:54:06","name":"[3/3] AVX512 fully masked vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115455.ACA883858422@sourceware.org/mbox/"},{"id":107918,"url":"https://patchwork.plctlab.org/api/1.2/patches/107918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115611.2227435-1-lehua.ding@rivai.ai/","msgid":"<20230614115611.2227435-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T11:56:11","name":"[V2] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115611.2227435-1-lehua.ding@rivai.ai/mbox/"},{"id":107955,"url":"https://patchwork.plctlab.org/api/1.2/patches/107955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInBSpWMc7qz9m53@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:31:54","name":"[v2] c++: Accept elaborated-enum-base in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInBSpWMc7qz9m53@arm.com/mbox/"},{"id":107957,"url":"https://patchwork.plctlab.org/api/1.2/patches/107957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInGN+99kNXeSQ+h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:52:55","name":"middle-end: Move constant args folding of .UBSAN_CHECK_* and .*_OVERFLOW into fold-const-call.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInGN+99kNXeSQ+h@tucnak/mbox/"},{"id":107958,"url":"https://patchwork.plctlab.org/api/1.2/patches/107958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInH2L1MHxI13xgK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:59:52","name":"middle-end, i386, v3: Pattern recognize add/subtract with carry [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInH2L1MHxI13xgK@tucnak/mbox/"},{"id":107959,"url":"https://patchwork.plctlab.org/api/1.2/patches/107959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614140210.291212-1-jason@redhat.com/","msgid":"<20230614140210.291212-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-14T14:02:10","name":"c++: tweak c++17 ctor/conversion tiebreaker [DR2327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614140210.291212-1-jason@redhat.com/mbox/"},{"id":107960,"url":"https://patchwork.plctlab.org/api/1.2/patches/107960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0f91d40-dea8-e398-9678-6ede777de4f0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T14:06:15","name":"RISC-V: testsuite: Add vector_hw and zvfh_hw checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0f91d40-dea8-e398-9678-6ede777de4f0@gmail.com/mbox/"},{"id":108003,"url":"https://patchwork.plctlab.org/api/1.2/patches/108003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614152656.51278-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230614152656.51278-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-14T15:26:56","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614152656.51278-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":108005,"url":"https://patchwork.plctlab.org/api/1.2/patches/108005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com/","msgid":"<46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com>","list_archive_url":null,"date":"2023-06-14T15:28:33","name":"RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com/mbox/"},{"id":108010,"url":"https://patchwork.plctlab.org/api/1.2/patches/108010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com/","msgid":"<490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com>","list_archive_url":null,"date":"2023-06-14T15:31:34","name":"RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com/mbox/"},{"id":108018,"url":"https://patchwork.plctlab.org/api/1.2/patches/108018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com/","msgid":"<20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T15:44:28","name":"libgomp: Extend OMP_ALLOCATOR, add affinity env var doc (was: [Patch] libgomp.texi: Document allocator + affininity env vars)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com/mbox/"},{"id":108022,"url":"https://patchwork.plctlab.org/api/1.2/patches/108022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614160917.13046-1-pali@kernel.org/","msgid":"<20230614160917.13046-1-pali@kernel.org>","list_archive_url":null,"date":"2023-06-14T16:09:17","name":"[v2] Add MinGW option -mcrtdll= for choosing C RunTime DLL library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614160917.13046-1-pali@kernel.org/mbox/"},{"id":108078,"url":"https://patchwork.plctlab.org/api/1.2/patches/108078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOhyivGBzp0=GCviOBH=5mUsNba32i+nCQtSHJR5LzAuDoTrHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T18:05:01","name":"[COMMITED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOhyivGBzp0=GCviOBH=5mUsNba32i+nCQtSHJR5LzAuDoTrHA@mail.gmail.com/mbox/"},{"id":108143,"url":"https://patchwork.plctlab.org/api/1.2/patches/108143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com/","msgid":"<55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-14T20:37:26","name":"[ver,4] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com/mbox/"},{"id":108146,"url":"https://patchwork.plctlab.org/api/1.2/patches/108146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMOUUaacFk0bBSudP51=s3scoYs87AWu4WZMk52LOym2Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T20:54:16","name":"[wwwdocs] Broken URL to README in st/cli-be project","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMOUUaacFk0bBSudP51=s3scoYs87AWu4WZMk52LOym2Q@mail.gmail.com/mbox/"},{"id":108155,"url":"https://patchwork.plctlab.org/api/1.2/patches/108155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-2-sandra@codesourcery.com/","msgid":"<20230614220804.917436-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:07:59","name":"[OG13,1/6] OpenMP: Handle loop transformation clauses in nested functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-2-sandra@codesourcery.com/mbox/"},{"id":108156,"url":"https://patchwork.plctlab.org/api/1.2/patches/108156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-3-sandra@codesourcery.com/","msgid":"<20230614220804.917436-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:00","name":"[OG13,2/6] OpenMP: C support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-3-sandra@codesourcery.com/mbox/"},{"id":108159,"url":"https://patchwork.plctlab.org/api/1.2/patches/108159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-4-sandra@codesourcery.com/","msgid":"<20230614220804.917436-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:01","name":"[OG13,3/6] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-4-sandra@codesourcery.com/mbox/"},{"id":108157,"url":"https://patchwork.plctlab.org/api/1.2/patches/108157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-5-sandra@codesourcery.com/","msgid":"<20230614220804.917436-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:02","name":"[OG13,4/6] OpenMP: New c/c++ testcases for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-5-sandra@codesourcery.com/mbox/"},{"id":108158,"url":"https://patchwork.plctlab.org/api/1.2/patches/108158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-6-sandra@codesourcery.com/","msgid":"<20230614220804.917436-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:03","name":"[OG13,5/6] OpenMP: Refactor and tidy Fortran front-end code for loop transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-6-sandra@codesourcery.com/mbox/"},{"id":108160,"url":"https://patchwork.plctlab.org/api/1.2/patches/108160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-7-sandra@codesourcery.com/","msgid":"<20230614220804.917436-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:04","name":"[OG13,6/6] OpenMP: Fortran support for imperfectly nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-7-sandra@codesourcery.com/mbox/"},{"id":108169,"url":"https://patchwork.plctlab.org/api/1.2/patches/108169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0qdy860.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:45:59","name":"libstdc++-v3: do not duplicate some math functions when using newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0qdy860.fsf@lxoliva.fsfla.org/mbox/"},{"id":108171,"url":"https://patchwork.plctlab.org/api/1.2/patches/108171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt11y80p.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:49:10","name":"[libstdc++,testsuite] xfail dbl from_chars for aarch64 rtems ldbl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt11y80p.fsf@lxoliva.fsfla.org/mbox/"},{"id":108172,"url":"https://patchwork.plctlab.org/api/1.2/patches/108172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilbpy7yh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:50:30","name":"[libstdc++,testsuite] expect zero entropy matching implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilbpy7yh.fsf@lxoliva.fsfla.org/mbox/"},{"id":108217,"url":"https://patchwork.plctlab.org/api/1.2/patches/108217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615002814.967814-1-dmalcolm@redhat.com/","msgid":"<20230615002814.967814-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-15T00:28:14","name":"c++: provide #include hint for missing includes [PR110164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615002814.967814-1-dmalcolm@redhat.com/mbox/"},{"id":108221,"url":"https://patchwork.plctlab.org/api/1.2/patches/108221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615011934.2262108-1-pan2.li@intel.com/","msgid":"<20230615011934.2262108-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T01:19:34","name":"[committed] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615011934.2262108-1-pan2.li@intel.com/mbox/"},{"id":108223,"url":"https://patchwork.plctlab.org/api/1.2/patches/108223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615013033.505823-1-chenglulu@loongson.cn/","msgid":"<20230615013033.505823-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-15T01:30:34","name":"[v3] LoongArch: Avoid non-returning indirect jumps through $ra [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615013033.505823-1-chenglulu@loongson.cn/mbox/"},{"id":108231,"url":"https://patchwork.plctlab.org/api/1.2/patches/108231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615015236.2283429-1-pan2.li@intel.com/","msgid":"<20230615015236.2283429-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T01:52:36","name":"[v2] RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615015236.2283429-1-pan2.li@intel.com/mbox/"},{"id":108235,"url":"https://patchwork.plctlab.org/api/1.2/patches/108235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615021856.2527165-1-pan2.li@intel.com/","msgid":"<20230615021856.2527165-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T02:18:56","name":"[v3] RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615021856.2527165-1-pan2.li@intel.com/mbox/"},{"id":108260,"url":"https://patchwork.plctlab.org/api/1.2/patches/108260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com/","msgid":"<6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com>","list_archive_url":null,"date":"2023-06-15T05:07:35","name":"Reimplement __gnu_cxx::__ops operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com/mbox/"},{"id":108263,"url":"https://patchwork.plctlab.org/api/1.2/patches/108263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615054052.23633-1-shiyulong@iscas.ac.cn/","msgid":"<20230615054052.23633-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-15T05:40:52","name":"[V1] RISC-V:Add float16 tuple type support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615054052.23633-1-shiyulong@iscas.ac.cn/mbox/"},{"id":108268,"url":"https://patchwork.plctlab.org/api/1.2/patches/108268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa84243c-860b-ddf8-bfde-7e080a197cd1@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T06:03:11","name":"x86: correct and improve \"*vec_dupv2di\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa84243c-860b-ddf8-bfde-7e080a197cd1@suse.com/mbox/"},{"id":108269,"url":"https://patchwork.plctlab.org/api/1.2/patches/108269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061636.3015833-1-chenglulu@loongson.cn/","msgid":"<20230615061636.3015833-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-15T06:16:36","name":"[pushed,v3] LoongArch: Change the default value of LARCH_CALL_RATIO to 6.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061636.3015833-1-chenglulu@loongson.cn/mbox/"},{"id":108270,"url":"https://patchwork.plctlab.org/api/1.2/patches/108270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061704.3514834-1-apinski@marvell.com/","msgid":"<20230615061704.3514834-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-15T06:17:04","name":"Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info during match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061704.3514834-1-apinski@marvell.com/mbox/"},{"id":108312,"url":"https://patchwork.plctlab.org/api/1.2/patches/108312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080348.938724-1-poulhies@adacore.com/","msgid":"<20230615080348.938724-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:48","name":"[COMMITTED] ada: Cleanup analysis of iterated component association","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080348.938724-1-poulhies@adacore.com/mbox/"},{"id":108316,"url":"https://patchwork.plctlab.org/api/1.2/patches/108316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080351.938791-1-poulhies@adacore.com/","msgid":"<20230615080351.938791-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:51","name":"[COMMITTED] ada: Fix aspect Linker_Section ignored on subprogram body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080351.938791-1-poulhies@adacore.com/mbox/"},{"id":108313,"url":"https://patchwork.plctlab.org/api/1.2/patches/108313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080353.938852-1-poulhies@adacore.com/","msgid":"<20230615080353.938852-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:53","name":"[COMMITTED] ada: Remove obsolete references for Build_Transient_Object_Statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080353.938852-1-poulhies@adacore.com/mbox/"},{"id":108314,"url":"https://patchwork.plctlab.org/api/1.2/patches/108314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080355.938913-1-poulhies@adacore.com/","msgid":"<20230615080355.938913-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:55","name":"[COMMITTED] ada: Crash on C++ constructor of private type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080355.938913-1-poulhies@adacore.com/mbox/"},{"id":108317,"url":"https://patchwork.plctlab.org/api/1.2/patches/108317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080356.938975-1-poulhies@adacore.com/","msgid":"<20230615080356.938975-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:56","name":"[COMMITTED] ada: Accept aspect Always_Terminates without expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080356.938975-1-poulhies@adacore.com/mbox/"},{"id":108315,"url":"https://patchwork.plctlab.org/api/1.2/patches/108315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080358.939037-1-poulhies@adacore.com/","msgid":"<20230615080358.939037-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:58","name":"[COMMITTED] ada: Fix inverted implementation of RM 8.4(10) clause for operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080358.939037-1-poulhies@adacore.com/mbox/"},{"id":108320,"url":"https://patchwork.plctlab.org/api/1.2/patches/108320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080400.939098-1-poulhies@adacore.com/","msgid":"<20230615080400.939098-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:00","name":"[COMMITTED] ada: Remove Ttypes.Max_Unaligned_Field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080400.939098-1-poulhies@adacore.com/mbox/"},{"id":108318,"url":"https://patchwork.plctlab.org/api/1.2/patches/108318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080402.939162-1-poulhies@adacore.com/","msgid":"<20230615080402.939162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:02","name":"[COMMITTED] ada: Fix minor issues in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080402.939162-1-poulhies@adacore.com/mbox/"},{"id":108322,"url":"https://patchwork.plctlab.org/api/1.2/patches/108322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080404.939261-1-poulhies@adacore.com/","msgid":"<20230615080404.939261-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:04","name":"[COMMITTED] ada: Fix missing error on function call returning incomplete view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080404.939261-1-poulhies@adacore.com/mbox/"},{"id":108321,"url":"https://patchwork.plctlab.org/api/1.2/patches/108321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080406.939322-1-poulhies@adacore.com/","msgid":"<20230615080406.939322-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:06","name":"[COMMITTED] ada: Reject aspect Always_Terminates on functions and generic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080406.939322-1-poulhies@adacore.com/mbox/"},{"id":108329,"url":"https://patchwork.plctlab.org/api/1.2/patches/108329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080408.939384-1-poulhies@adacore.com/","msgid":"<20230615080408.939384-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:08","name":"[COMMITTED] ada: Accept aspect Always_Terminates on entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080408.939384-1-poulhies@adacore.com/mbox/"},{"id":108319,"url":"https://patchwork.plctlab.org/api/1.2/patches/108319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080410.939483-1-poulhies@adacore.com/","msgid":"<20230615080410.939483-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:10","name":"[COMMITTED] ada: Accept aspect Always_Terminates on packages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080410.939483-1-poulhies@adacore.com/mbox/"},{"id":108333,"url":"https://patchwork.plctlab.org/api/1.2/patches/108333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080412.939566-1-poulhies@adacore.com/","msgid":"<20230615080412.939566-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:12","name":"[COMMITTED] ada: Adjust comments in targparm.ads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080412.939566-1-poulhies@adacore.com/mbox/"},{"id":108331,"url":"https://patchwork.plctlab.org/api/1.2/patches/108331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080413.939627-1-poulhies@adacore.com/","msgid":"<20230615080413.939627-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:13","name":"[COMMITTED] ada: Adjust QNX Ada priorities to match QNX system priorities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080413.939627-1-poulhies@adacore.com/mbox/"},{"id":108326,"url":"https://patchwork.plctlab.org/api/1.2/patches/108326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080415.939740-1-poulhies@adacore.com/","msgid":"<20230615080415.939740-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:15","name":"[COMMITTED] ada: Fix missing finalization for aggregates nested in conditional expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080415.939740-1-poulhies@adacore.com/mbox/"},{"id":108323,"url":"https://patchwork.plctlab.org/api/1.2/patches/108323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080417.939801-1-poulhies@adacore.com/","msgid":"<20230615080417.939801-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:17","name":"[COMMITTED] ada: Add escape hatch to configurable run-time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080417.939801-1-poulhies@adacore.com/mbox/"},{"id":108335,"url":"https://patchwork.plctlab.org/api/1.2/patches/108335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080419.939862-1-poulhies@adacore.com/","msgid":"<20230615080419.939862-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:19","name":"[COMMITTED] ada: Remove dead code in Expand_Iterator_Loop_Over_Container","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080419.939862-1-poulhies@adacore.com/mbox/"},{"id":108330,"url":"https://patchwork.plctlab.org/api/1.2/patches/108330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080421.939923-1-poulhies@adacore.com/","msgid":"<20230615080421.939923-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:21","name":"[COMMITTED] ada: Fix too small secondary stack allocation for returned aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080421.939923-1-poulhies@adacore.com/mbox/"},{"id":108332,"url":"https://patchwork.plctlab.org/api/1.2/patches/108332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080424.939984-1-poulhies@adacore.com/","msgid":"<20230615080424.939984-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:24","name":"[COMMITTED] ada: Revert latest change to Find_Hook_Context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080424.939984-1-poulhies@adacore.com/mbox/"},{"id":108338,"url":"https://patchwork.plctlab.org/api/1.2/patches/108338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080426.940045-1-poulhies@adacore.com/","msgid":"<20230615080426.940045-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:26","name":"[COMMITTED] ada: Fix internal error on loop iterator filter with -gnatVa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080426.940045-1-poulhies@adacore.com/mbox/"},{"id":108334,"url":"https://patchwork.plctlab.org/api/1.2/patches/108334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080428.940106-1-poulhies@adacore.com/","msgid":"<20230615080428.940106-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:28","name":"[COMMITTED] ada: Fix too small secondary stack allocation for returned conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080428.940106-1-poulhies@adacore.com/mbox/"},{"id":108340,"url":"https://patchwork.plctlab.org/api/1.2/patches/108340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080430.940168-1-poulhies@adacore.com/","msgid":"<20230615080430.940168-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:30","name":"[COMMITTED] ada: Reject Loop_Entry inside prefix of Loop_Entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080430.940168-1-poulhies@adacore.com/mbox/"},{"id":108342,"url":"https://patchwork.plctlab.org/api/1.2/patches/108342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080432.940230-1-poulhies@adacore.com/","msgid":"<20230615080432.940230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:32","name":"[COMMITTED] ada: Make minor improvements to user'\''s guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080432.940230-1-poulhies@adacore.com/mbox/"},{"id":108343,"url":"https://patchwork.plctlab.org/api/1.2/patches/108343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080434.940329-1-poulhies@adacore.com/","msgid":"<20230615080434.940329-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:34","name":"[COMMITTED] ada: Fix wrong finalization for double subtype of bounded vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080434.940329-1-poulhies@adacore.com/mbox/"},{"id":108341,"url":"https://patchwork.plctlab.org/api/1.2/patches/108341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080436.940392-1-poulhies@adacore.com/","msgid":"<20230615080436.940392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:36","name":"[COMMITTED] ada: Fix wrong code for ACATS cd1c03i on Morello target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080436.940392-1-poulhies@adacore.com/mbox/"},{"id":108339,"url":"https://patchwork.plctlab.org/api/1.2/patches/108339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080438.940453-1-poulhies@adacore.com/","msgid":"<20230615080438.940453-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:38","name":"[COMMITTED] ada: Remove unused files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080438.940453-1-poulhies@adacore.com/mbox/"},{"id":108387,"url":"https://patchwork.plctlab.org/api/1.2/patches/108387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615095052.13119-1-filip.kastl@gmail.com/","msgid":"<20230615095052.13119-1-filip.kastl@gmail.com>","list_archive_url":null,"date":"2023-06-15T09:50:52","name":"value-prof.cc: Correct edge prob calculation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615095052.13119-1-filip.kastl@gmail.com/mbox/"},{"id":108402,"url":"https://patchwork.plctlab.org/api/1.2/patches/108402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615100534.77819-1-juzhe.zhong@rivai.ai/","msgid":"<20230615100534.77819-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-15T10:05:34","name":"[V3] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615100534.77819-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108451,"url":"https://patchwork.plctlab.org/api/1.2/patches/108451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com/","msgid":"<4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com>","list_archive_url":null,"date":"2023-06-15T11:47:18","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com/mbox/"},{"id":108452,"url":"https://patchwork.plctlab.org/api/1.2/patches/108452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cada1fc1-dd8f-60b1-ecc2-f89262d458d4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T11:47:44","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cada1fc1-dd8f-60b1-ecc2-f89262d458d4@arm.com/mbox/"},{"id":108458,"url":"https://patchwork.plctlab.org/api/1.2/patches/108458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnYjq-C1-hm022qLkqSXfDJ5dUPBgyyJb-12WQ105Zxpg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T12:10:47","name":"gcc-ar: Remove code duplication.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnYjq-C1-hm022qLkqSXfDJ5dUPBgyyJb-12WQ105Zxpg@mail.gmail.com/mbox/"},{"id":108482,"url":"https://patchwork.plctlab.org/api/1.2/patches/108482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-1-kmatsui@cs.washington.edu/","msgid":"<20230615122129.20213-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-15T12:21:28","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-1-kmatsui@cs.washington.edu/mbox/"},{"id":108483,"url":"https://patchwork.plctlab.org/api/1.2/patches/108483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-2-kmatsui@cs.washington.edu/","msgid":"<20230615122129.20213-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-15T12:21:29","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-2-kmatsui@cs.washington.edu/mbox/"},{"id":108512,"url":"https://patchwork.plctlab.org/api/1.2/patches/108512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615131435.10323-1-juzhe.zhong@rivai.ai/","msgid":"<20230615131435.10323-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-15T13:14:35","name":"[V4] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615131435.10323-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108580,"url":"https://patchwork.plctlab.org/api/1.2/patches/108580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b834b2f5-e505-71be-c694-bbf529ec6bd4@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T15:06:39","name":"[v2] RISC-V: testsuite: Add vector_hw and zvfh_hw checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b834b2f5-e505-71be-c694-bbf529ec6bd4@gmail.com/mbox/"},{"id":108581,"url":"https://patchwork.plctlab.org/api/1.2/patches/108581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com/","msgid":"<56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com>","list_archive_url":null,"date":"2023-06-15T15:10:24","name":"[v2] RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com/mbox/"},{"id":108582,"url":"https://patchwork.plctlab.org/api/1.2/patches/108582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com/","msgid":"<64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com>","list_archive_url":null,"date":"2023-06-15T15:12:36","name":"[v2] RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com/mbox/"},{"id":108583,"url":"https://patchwork.plctlab.org/api/1.2/patches/108583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn04eoyd.fsf@euler.schwinge.homeip.net/","msgid":"<87wn04eoyd.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T15:15:54","name":"Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn04eoyd.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108604,"url":"https://patchwork.plctlab.org/api/1.2/patches/108604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttv8engy.fsf@euler.schwinge.homeip.net/","msgid":"<87ttv8engy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T15:47:57","name":"Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttv8engy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108607,"url":"https://patchwork.plctlab.org/api/1.2/patches/108607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com/","msgid":"<004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-15T16:00:35","name":"[ver,2] rs6000, fix vec_replace_unaligned builtin arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com/mbox/"},{"id":108611,"url":"https://patchwork.plctlab.org/api/1.2/patches/108611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qcemq3.fsf@euler.schwinge.homeip.net/","msgid":"<87r0qcemq3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T16:04:04","name":"Skip a number of C++ '\''g++.dg/tree-prof/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qcemq3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108624,"url":"https://patchwork.plctlab.org/api/1.2/patches/108624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73715f12-dedd-ba1f-3048-7af791860768@redhat.com/","msgid":"<73715f12-dedd-ba1f-3048-7af791860768@redhat.com>","list_archive_url":null,"date":"2023-06-15T16:22:38","name":"PR tree-optimization/110266 - Check for integer only complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73715f12-dedd-ba1f-3048-7af791860768@redhat.com/mbox/"},{"id":108664,"url":"https://patchwork.plctlab.org/api/1.2/patches/108664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615172817.3587006-1-manolis.tsamis@vrull.eu/","msgid":"<20230615172817.3587006-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-06-15T17:28:16","name":"[v2] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615172817.3587006-1-manolis.tsamis@vrull.eu/mbox/"},{"id":108669,"url":"https://patchwork.plctlab.org/api/1.2/patches/108669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615175625.3544115-1-apinski@marvell.com/","msgid":"<20230615175625.3544115-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-15T17:56:25","name":"Add another testcase for PR 110266","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615175625.3544115-1-apinski@marvell.com/mbox/"},{"id":108774,"url":"https://patchwork.plctlab.org/api/1.2/patches/108774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616010138.1047991-1-dmalcolm@redhat.com/","msgid":"<20230616010138.1047991-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-16T01:01:38","name":"[pushed] c: add name hints to c_parser_declspecs [PR107583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616010138.1047991-1-dmalcolm@redhat.com/mbox/"},{"id":108781,"url":"https://patchwork.plctlab.org/api/1.2/patches/108781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-1-hongtao.liu@intel.com/","msgid":"<20230616020958.1413585-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-16T02:09:57","name":"[1/2] Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_truncate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-1-hongtao.liu@intel.com/mbox/"},{"id":108782,"url":"https://patchwork.plctlab.org/api/1.2/patches/108782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-2-hongtao.liu@intel.com/","msgid":"<20230616020958.1413585-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-16T02:09:58","name":"[2/2] Refined 256/512-bit vpacksswb/vpackssdw patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-2-hongtao.liu@intel.com/mbox/"},{"id":108819,"url":"https://patchwork.plctlab.org/api/1.2/patches/108819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616043157.1713-1-shihua@iscas.ac.cn/","msgid":"<20230616043157.1713-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-16T04:31:57","name":"Add bfloat16_t support for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616043157.1713-1-shihua@iscas.ac.cn/mbox/"},{"id":108830,"url":"https://patchwork.plctlab.org/api/1.2/patches/108830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b59a0cfa-20bb-1a5b-75ec-3b237b977b29@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T06:19:59","name":"[v2] x86: correct and improve \"*vec_dupv2di\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b59a0cfa-20bb-1a5b-75ec-3b237b977b29@suse.com/mbox/"},{"id":108831,"url":"https://patchwork.plctlab.org/api/1.2/patches/108831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a342d677-867e-e5a2-dd56-b6ba784c1d50@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T06:22:16","name":"[v2] x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a342d677-867e-e5a2-dd56-b6ba784c1d50@suse.com/mbox/"},{"id":108893,"url":"https://patchwork.plctlab.org/api/1.2/patches/108893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616072834.3754201-1-pan2.li@intel.com/","msgid":"<20230616072834.3754201-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T07:28:34","name":"[v1] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616072834.3754201-1-pan2.li@intel.com/mbox/"},{"id":108918,"url":"https://patchwork.plctlab.org/api/1.2/patches/108918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616075916.141968-1-juzhe.zhong@rivai.ai/","msgid":"<20230616075916.141968-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T07:59:16","name":"RISC-V: Fix PR 110264","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616075916.141968-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108919,"url":"https://patchwork.plctlab.org/api/1.2/patches/108919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080231.142845-1-juzhe.zhong@rivai.ai/","msgid":"<20230616080231.142845-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T08:02:31","name":"RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080231.142845-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108922,"url":"https://patchwork.plctlab.org/api/1.2/patches/108922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080932.4190921-1-pan2.li@intel.com/","msgid":"<20230616080932.4190921-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T08:09:32","name":"[v2] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080932.4190921-1-pan2.li@intel.com/mbox/"},{"id":108923,"url":"https://patchwork.plctlab.org/api/1.2/patches/108923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616081455.1697928-1-guojiufu@linux.ibm.com/","msgid":"<20230616081455.1697928-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T08:14:55","name":"Check SCALAR_INT_MODE_P in try_const_anchors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616081455.1697928-1-guojiufu@linux.ibm.com/mbox/"},{"id":108926,"url":"https://patchwork.plctlab.org/api/1.2/patches/108926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616082558.855921330B@imap2.suse-dmz.suse.de/","msgid":"<20230616082558.855921330B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T08:25:58","name":"tree-optimization/110269 - restore missed condition folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616082558.855921330B@imap2.suse-dmz.suse.de/mbox/"},{"id":108928,"url":"https://patchwork.plctlab.org/api/1.2/patches/108928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616083412.1877704-1-guojiufu@linux.ibm.com/","msgid":"<20230616083412.1877704-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T08:34:12","name":"[V3,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616083412.1877704-1-guojiufu@linux.ibm.com/mbox/"},{"id":108934,"url":"https://patchwork.plctlab.org/api/1.2/patches/108934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616085443.1AF5A3854E5B@sourceware.org/","msgid":"<20230616085443.1AF5A3854E5B@sourceware.org>","list_archive_url":null,"date":"2023-06-16T08:53:45","name":"[2/2,v2] AVX512 fully masked vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616085443.1AF5A3854E5B@sourceware.org/mbox/"},{"id":108985,"url":"https://patchwork.plctlab.org/api/1.2/patches/108985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616093125.196342-1-juzhe.zhong@rivai.ai/","msgid":"<20230616093125.196342-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T09:31:25","name":"[V5] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616093125.196342-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109031,"url":"https://patchwork.plctlab.org/api/1.2/patches/109031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616102912.262207-1-juzhe.zhong@rivai.ai/","msgid":"<20230616102912.262207-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T10:29:12","name":"[V6] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616102912.262207-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109050,"url":"https://patchwork.plctlab.org/api/1.2/patches/109050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616113514.327122-1-pan2.li@intel.com/","msgid":"<20230616113514.327122-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T11:35:14","name":"[v1] RISC-V: Fix one warning of maybe-uninitialized in riscv-vsetvl.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616113514.327122-1-pan2.li@intel.com/mbox/"},{"id":109064,"url":"https://patchwork.plctlab.org/api/1.2/patches/109064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616114549.47732138E8@imap2.suse-dmz.suse.de/","msgid":"<20230616114549.47732138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T11:45:48","name":"tree-optimization/110278 - uns < (typeof uns)(uns != 0) is always false","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616114549.47732138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":109075,"url":"https://patchwork.plctlab.org/api/1.2/patches/109075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxOaoCXVo++78RO@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T11:58:34","name":"[v3] c++: Accept elaborated-enum-base with pedwarn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxOaoCXVo++78RO@arm.com/mbox/"},{"id":109081,"url":"https://patchwork.plctlab.org/api/1.2/patches/109081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616120214.114098-1-thiago.bauermann@linaro.org/","msgid":"<20230616120214.114098-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-06-16T12:02:14","name":"[contrib] validate_failures.py: Don'\''t consider summary line in wrong place","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616120214.114098-1-thiago.bauermann@linaro.org/mbox/"},{"id":109089,"url":"https://patchwork.plctlab.org/api/1.2/patches/109089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616123424.B38AC1330B@imap2.suse-dmz.suse.de/","msgid":"<20230616123424.B38AC1330B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T12:34:24","name":"tree-optimization/110243 - kill off IVOPTs split_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616123424.B38AC1330B@imap2.suse-dmz.suse.de/mbox/"},{"id":109125,"url":"https://patchwork.plctlab.org/api/1.2/patches/109125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4438c7c-4aca-23a6-5482-464bc5eb0f14@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T13:29:36","name":"[v3] RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4438c7c-4aca-23a6-5482-464bc5eb0f14@gmail.com/mbox/"},{"id":109126,"url":"https://patchwork.plctlab.org/api/1.2/patches/109126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com/","msgid":"<4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com>","list_archive_url":null,"date":"2023-06-16T13:32:09","name":"[v3] RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com/mbox/"},{"id":109134,"url":"https://patchwork.plctlab.org/api/1.2/patches/109134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com/","msgid":"<0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com>","list_archive_url":null,"date":"2023-06-16T13:41:45","name":"[v2] RISC-V: Implement vec_set and vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com/mbox/"},{"id":109135,"url":"https://patchwork.plctlab.org/api/1.2/patches/109135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com/","msgid":"<675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com>","list_archive_url":null,"date":"2023-06-16T13:43:16","name":"[wwwdocs] gcc-14/changes.htm - Offloading: -lm/-lgfortran is autolinked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com/mbox/"},{"id":109171,"url":"https://patchwork.plctlab.org/api/1.2/patches/109171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxwDtDoomPI9d5n@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-16T14:22:06","name":"tree-ssa-math-opts: Fix up uaddc/usubc pattern matching [PR110271]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxwDtDoomPI9d5n@tucnak/mbox/"},{"id":109172,"url":"https://patchwork.plctlab.org/api/1.2/patches/109172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxyz4SrwyW7130U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-16T14:33:51","name":"builtins: Add support for clang compatible __builtin_{add,sub}c{,l,ll} [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxyz4SrwyW7130U@tucnak/mbox/"},{"id":109192,"url":"https://patchwork.plctlab.org/api/1.2/patches/109192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com/","msgid":"<7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com>","list_archive_url":null,"date":"2023-06-16T15:18:46","name":"[pushed,RA,PR110215] Ignore conflicts for some pseudos from insns throwing a final exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com/mbox/"},{"id":109218,"url":"https://patchwork.plctlab.org/api/1.2/patches/109218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com/","msgid":"<91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com>","list_archive_url":null,"date":"2023-06-16T15:57:10","name":"[committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com/mbox/"},{"id":109223,"url":"https://patchwork.plctlab.org/api/1.2/patches/109223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-1-murphyp@linux.ibm.com/","msgid":"<20230616160002.1854983-1-murphyp@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T16:00:01","name":"[1/2] go: update usage of TARGET_AIX to TARGET_AIX_OS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-1-murphyp@linux.ibm.com/mbox/"},{"id":109224,"url":"https://patchwork.plctlab.org/api/1.2/patches/109224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-2-murphyp@linux.ibm.com/","msgid":"<20230616160002.1854983-2-murphyp@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T16:00:02","name":"[2/2] rust: update usage of TARGET_AIX to TARGET_AIX_OS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-2-murphyp@linux.ibm.com/mbox/"},{"id":109236,"url":"https://patchwork.plctlab.org/api/1.2/patches/109236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rcj4c57.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:15:00","name":"Regenerate some autotools generated files (Was: Re: [PATCH v3] configure: Implement --enable-host-pie)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rcj4c57.fsf@suse.cz/mbox/"},{"id":109244,"url":"https://patchwork.plctlab.org/api/1.2/patches/109244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca7ca81-2c2e-4e2e-ce33-17f6289fc31a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:17:18","name":"OpenMP (C/C++): Keep pointer value of unmapped ptr with default mapping [PR110270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca7ca81-2c2e-4e2e-ce33-17f6289fc31a@codesourcery.com/mbox/"},{"id":109245,"url":"https://patchwork.plctlab.org/api/1.2/patches/109245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jn74c08.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:17:59","name":"ipa-sra: Disable candidates with no known callers (PR 110276)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jn74c08.fsf@suse.cz/mbox/"},{"id":109250,"url":"https://patchwork.plctlab.org/api/1.2/patches/109250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com/","msgid":"<033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-16T16:27:17","name":"[x86_64] Two minor tweaks to ix86_expand_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com/mbox/"},{"id":109293,"url":"https://patchwork.plctlab.org/api/1.2/patches/109293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com/","msgid":"<4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-16T17:57:19","name":"[ver,5] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com/mbox/"},{"id":109333,"url":"https://patchwork.plctlab.org/api/1.2/patches/109333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQMgax3RS-nT0ac+J+7ZFqJ-BZEF-200SmHDWtxagL1w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T19:30:26","name":"libgo patch committed: Add benchmarks and examples to test list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQMgax3RS-nT0ac+J+7ZFqJ-BZEF-200SmHDWtxagL1w@mail.gmail.com/mbox/"},{"id":109439,"url":"https://patchwork.plctlab.org/api/1.2/patches/109439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJyZDofE5VhYpCgKKyHg8YSQBLBZMYJspfJ40Kf6J+PcA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-17T09:14:43","name":"[fortran] PR107900 Select type with intrinsic type inside associate causes ICE / Segmenation fault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJyZDofE5VhYpCgKKyHg8YSQBLBZMYJspfJ40Kf6J+PcA@mail.gmail.com/mbox/"},{"id":109504,"url":"https://patchwork.plctlab.org/api/1.2/patches/109504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617142325.2939112-1-pan2.li@intel.com/","msgid":"<20230617142325.2939112-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-17T14:23:25","name":"[v1] RISC-V: Bugfix for RVV float reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617142325.2939112-1-pan2.li@intel.com/mbox/"},{"id":109557,"url":"https://patchwork.plctlab.org/api/1.2/patches/109557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617225328.1175357-1-juzhe.zhong@rivai.ai/","msgid":"<20230617225328.1175357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-17T22:53:28","name":"[V7] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617225328.1175357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109566,"url":"https://patchwork.plctlab.org/api/1.2/patches/109566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618025732.717902-1-pan2.li@intel.com/","msgid":"<20230618025732.717902-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-18T02:57:32","name":"[v2] RISC-V: Bugfix for RVV float reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618025732.717902-1-pan2.li@intel.com/mbox/"},{"id":109578,"url":"https://patchwork.plctlab.org/api/1.2/patches/109578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp/","msgid":"<9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp>","list_archive_url":null,"date":"2023-06-18T07:07:12","name":"[1/2] xtensa: Remove TARGET_MEMORY_MOVE_COST hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp/mbox/"},{"id":109577,"url":"https://patchwork.plctlab.org/api/1.2/patches/109577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfbb27df-1afd-2dbc-ffc5-a5143f6ccd2d@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-18T07:09:10","name":"[2/2] xtensa: constantsynth: Add new 2-insns synthesis pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfbb27df-1afd-2dbc-ffc5-a5143f6ccd2d@yahoo.co.jp/mbox/"},{"id":109593,"url":"https://patchwork.plctlab.org/api/1.2/patches/109593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com/","msgid":"<005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T09:05:48","name":"[x86] Standardize shift amount constants as QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com/mbox/"},{"id":109594,"url":"https://patchwork.plctlab.org/api/1.2/patches/109594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com/","msgid":"<006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T09:35:28","name":"[x86] Add alternate representation for {and,or,xor}b %ah,%dh.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com/mbox/"},{"id":109597,"url":"https://patchwork.plctlab.org/api/1.2/patches/109597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com/","msgid":"<008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T10:22:46","name":"Improved SUBREG simplifications in simplify-rtx.cc'\''s simplify_subreg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com/mbox/"},{"id":109599,"url":"https://patchwork.plctlab.org/api/1.2/patches/109599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com/","msgid":"<000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T11:10:00","name":"[x86] Refactor new ix86_expand_carry to set the carry flag.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com/mbox/"},{"id":109600,"url":"https://patchwork.plctlab.org/api/1.2/patches/109600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618114157.3451886-1-lehua.ding@rivai.ai/","msgid":"<20230618114157.3451886-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-18T11:41:57","name":"RISC-V: Add tuple vector mode psABI checking and simplify code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618114157.3451886-1-lehua.ding@rivai.ai/mbox/"},{"id":109615,"url":"https://patchwork.plctlab.org/api/1.2/patches/109615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com/","msgid":"<002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T13:20:32","name":"[RFC] Workaround LRA reload issue with SUBREGs in SET_DEST.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com/mbox/"},{"id":109629,"url":"https://patchwork.plctlab.org/api/1.2/patches/109629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618151329.1814812-1-pan2.li@intel.com/","msgid":"<20230618151329.1814812-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-18T15:13:29","name":"[v1] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618151329.1814812-1-pan2.li@intel.com/mbox/"},{"id":109631,"url":"https://patchwork.plctlab.org/api/1.2/patches/109631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI8owVx4aDXxwB8Y@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T15:54:41","name":"Optimize std::max early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI8owVx4aDXxwB8Y@kam.mff.cuni.cz/mbox/"},{"id":109638,"url":"https://patchwork.plctlab.org/api/1.2/patches/109638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com/","msgid":"<24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com>","list_archive_url":null,"date":"2023-06-18T17:29:08","name":"[committed] Fix arc assumption that insns are not re-recognized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com/mbox/"},{"id":109650,"url":"https://patchwork.plctlab.org/api/1.2/patches/109650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9MmdQ+OMehcdeg@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T18:27:37","name":"[libstdc++] Improve M_check_len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9MmdQ+OMehcdeg@kam.mff.cuni.cz/mbox/"},{"id":109660,"url":"https://patchwork.plctlab.org/api/1.2/patches/109660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aaAs9mnx3-+UKoXfVU8b6kZmn_HE0QivSzfYL62rpHdQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-18T20:12:11","name":"[COMMITTED] RTL: Change return type of predicate and callback functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aaAs9mnx3-+UKoXfVU8b6kZmn_HE0QivSzfYL62rpHdQ@mail.gmail.com/mbox/"},{"id":109661,"url":"https://patchwork.plctlab.org/api/1.2/patches/109661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9phUDoOu81ivtb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T20:31:01","name":"Extend fnsummary to predict SRA oppurtunities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9phUDoOu81ivtb@kam.mff.cuni.cz/mbox/"},{"id":109697,"url":"https://patchwork.plctlab.org/api/1.2/patches/109697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618230645.3673843-1-juzhe.zhong@rivai.ai/","msgid":"<20230618230645.3673843-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-18T23:06:45","name":"RISC-V: Add VLS modes for GNU vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618230645.3673843-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109702,"url":"https://patchwork.plctlab.org/api/1.2/patches/109702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc68688-7292-f739-5ad4-a2367b6e18bc@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T01:14:55","name":"[rs6000] Generate mfvsrwz for all platforms and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc68688-7292-f739-5ad4-a2367b6e18bc@linux.ibm.com/mbox/"},{"id":109724,"url":"https://patchwork.plctlab.org/api/1.2/patches/109724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619042617.31605-1-xuli1@eswincomputing.com/","msgid":"<20230619042617.31605-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-19T04:26:17","name":"RISC-V: Fix iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619042617.31605-1-xuli1@eswincomputing.com/mbox/"},{"id":109733,"url":"https://patchwork.plctlab.org/api/1.2/patches/109733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619055257.15858-1-xuli1@eswincomputing.com/","msgid":"<20230619055257.15858-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-19T05:52:57","name":"[v2] RISC-V: Fix VWEXTF iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619055257.15858-1-xuli1@eswincomputing.com/mbox/"},{"id":109740,"url":"https://patchwork.plctlab.org/api/1.2/patches/109740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619062903.7E5103858415@sourceware.org/","msgid":"<20230619062903.7E5103858415@sourceware.org>","list_archive_url":null,"date":"2023-06-19T06:28:18","name":"Remove -save-temps from tests using -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619062903.7E5103858415@sourceware.org/mbox/"},{"id":109743,"url":"https://patchwork.plctlab.org/api/1.2/patches/109743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619064650.1410831-1-pan2.li@intel.com/","msgid":"<20230619064650.1410831-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T06:46:50","name":"[v2] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619064650.1410831-1-pan2.li@intel.com/mbox/"},{"id":109749,"url":"https://patchwork.plctlab.org/api/1.2/patches/109749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAIBuJCa6OWrM0x@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-19T07:47:18","name":"Tiny phiprop compile time optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAIBuJCa6OWrM0x@kam.mff.cuni.cz/mbox/"},{"id":109752,"url":"https://patchwork.plctlab.org/api/1.2/patches/109752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAJMPiUB4oxqZBR@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-19T07:52:16","name":"Do not account __builtin_unreachable guards in inliner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAJMPiUB4oxqZBR@kam.mff.cuni.cz/mbox/"},{"id":109758,"url":"https://patchwork.plctlab.org/api/1.2/patches/109758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0bce677-da4f-3ccd-d220-ef2e2bbba877@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:02:58","name":"[committed] libgomp.c/target-51.c: Accept more error-msg variants in dg-output (was: Re: [committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0bce677-da4f-3ccd-d220-ef2e2bbba877@codesourcery.com/mbox/"},{"id":109761,"url":"https://patchwork.plctlab.org/api/1.2/patches/109761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619080710.1536456-1-pan2.li@intel.com/","msgid":"<20230619080710.1536456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T08:07:10","name":"[v1] RISC-V: Fix out of range memory access when lto mode init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619080710.1536456-1-pan2.li@intel.com/mbox/"},{"id":109791,"url":"https://patchwork.plctlab.org/api/1.2/patches/109791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:50","name":"[v4,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109794,"url":"https://patchwork.plctlab.org/api/1.2/patches/109794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0f3e929f438106b51a1dcbe7a7c762bd90e1933.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:29:51","name":"[v4,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0f3e929f438106b51a1dcbe7a7c762bd90e1933.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109773,"url":"https://patchwork.plctlab.org/api/1.2/patches/109773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:52","name":"[v4,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109795,"url":"https://patchwork.plctlab.org/api/1.2/patches/109795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:53","name":"[v4,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109774,"url":"https://patchwork.plctlab.org/api/1.2/patches/109774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:54","name":"[v4,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109789,"url":"https://patchwork.plctlab.org/api/1.2/patches/109789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:55","name":"[v4,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109777,"url":"https://patchwork.plctlab.org/api/1.2/patches/109777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9d3a87f14aed2af9b637e639128ca7c2e1ae1d1.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:29:56","name":"[v4,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9d3a87f14aed2af9b637e639128ca7c2e1ae1d1.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109790,"url":"https://patchwork.plctlab.org/api/1.2/patches/109790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:57","name":"[v4,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109784,"url":"https://patchwork.plctlab.org/api/1.2/patches/109784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:58","name":"[v4,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109796,"url":"https://patchwork.plctlab.org/api/1.2/patches/109796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619083603.151CC385354A@sourceware.org/","msgid":"<20230619083603.151CC385354A@sourceware.org>","list_archive_url":null,"date":"2023-06-19T08:34:59","name":"Fix build of aarc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619083603.151CC385354A@sourceware.org/mbox/"},{"id":109819,"url":"https://patchwork.plctlab.org/api/1.2/patches/109819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rcfc039.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:44:58","name":"[committed] vect: Restore aarch64 bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rcfc039.fsf@arm.com/mbox/"},{"id":109829,"url":"https://patchwork.plctlab.org/api/1.2/patches/109829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com/","msgid":"<96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T08:56:52","name":"[committed] Doc update: -foffload-options= examples + OpenMP in Fortran intrinsic modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com/mbox/"},{"id":109831,"url":"https://patchwork.plctlab.org/api/1.2/patches/109831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090548.1574008-1-pan2.li@intel.com/","msgid":"<20230619090548.1574008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T09:05:48","name":"RISC-V: Fix out of range memory access of machine mode table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090548.1574008-1-pan2.li@intel.com/mbox/"},{"id":109834,"url":"https://patchwork.plctlab.org/api/1.2/patches/109834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090743.ADDD63858C78@sourceware.org/","msgid":"<20230619090743.ADDD63858C78@sourceware.org>","list_archive_url":null,"date":"2023-06-19T09:06:46","name":"tree-optimization/110298 - CFG cleanup and stale nb_iterations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090743.ADDD63858C78@sourceware.org/mbox/"},{"id":109888,"url":"https://patchwork.plctlab.org/api/1.2/patches/109888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619101609.63E4F385840D@sourceware.org/","msgid":"<20230619101609.63E4F385840D@sourceware.org>","list_archive_url":null,"date":"2023-06-19T10:15:25","name":"debug/110295 - mixed up early/late debug for member DIEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619101609.63E4F385840D@sourceware.org/mbox/"},{"id":109898,"url":"https://patchwork.plctlab.org/api/1.2/patches/109898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5wveomg.fsf@euler.schwinge.homeip.net/","msgid":"<87a5wveomg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-19T10:24:23","name":"Fix DejaGnu directive syntax error in '\''libgomp.c/target-51.c'\'' (was: [committed] libgomp.c/target-51.c: Accept more error-msg variants in dg-output (was: Re: [committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5wveomg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":109903,"url":"https://patchwork.plctlab.org/api/1.2/patches/109903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T10:32:41","name":"Do not allow \"x + 0.0\" to \"x\" optimization with -fsignaling-nans","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com/mbox/"},{"id":109937,"url":"https://patchwork.plctlab.org/api/1.2/patches/109937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com/","msgid":"<01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T11:37:37","name":"[committed] amdgcn: Delete inactive libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com/mbox/"},{"id":109938,"url":"https://patchwork.plctlab.org/api/1.2/patches/109938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/afd440fa-a7b9-a539-9056-7f9e85060ef0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T11:37:52","name":"[committed] amdgcn: minimal V64TImode vector support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/afd440fa-a7b9-a539-9056-7f9e85060ef0@codesourcery.com/mbox/"},{"id":109939,"url":"https://patchwork.plctlab.org/api/1.2/patches/109939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com/","msgid":"<6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T11:38:09","name":"[committed] amdgcn: implement vector div and mod libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com/mbox/"},{"id":109966,"url":"https://patchwork.plctlab.org/api/1.2/patches/109966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619123606.2F5E73858431@sourceware.org/","msgid":"<20230619123606.2F5E73858431@sourceware.org>","list_archive_url":null,"date":"2023-06-19T12:35:21","name":"[i386] Reject too large vectors for partial vector vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619123606.2F5E73858431@sourceware.org/mbox/"},{"id":110034,"url":"https://patchwork.plctlab.org/api/1.2/patches/110034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619142356.345159-1-stefansf@linux.ibm.com/","msgid":"<20230619142356.345159-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-19T14:23:57","name":"[v2] combine: Narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619142356.345159-1-stefansf@linux.ibm.com/mbox/"},{"id":110040,"url":"https://patchwork.plctlab.org/api/1.2/patches/110040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+DWEukOn4iktqvvmoT+p6u+dh_DrmFVd7i4Mv9nBr9A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T14:46:18","name":"[committed] recog: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+DWEukOn4iktqvvmoT+p6u+dh_DrmFVd7i4Mv9nBr9A@mail.gmail.com/mbox/"},{"id":110084,"url":"https://patchwork.plctlab.org/api/1.2/patches/110084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com/","msgid":"<42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-19T15:57:32","name":"rs6000, __builtin_set_fpscr_rn add retrun value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com/mbox/"},{"id":110094,"url":"https://patchwork.plctlab.org/api/1.2/patches/110094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619161705.251983-1-juzhe.zhong@rivai.ai/","msgid":"<20230619161705.251983-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-19T16:17:05","name":"VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619161705.251983-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110139,"url":"https://patchwork.plctlab.org/api/1.2/patches/110139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com/","msgid":"<35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-19T18:54:03","name":"[ver,6] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com/mbox/"},{"id":110163,"url":"https://patchwork.plctlab.org/api/1.2/patches/110163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com/","msgid":"<6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:25","name":"[01/14] Revert \"Assumed-size arrays with non-lexical data mappings\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110162,"url":"https://patchwork.plctlab.org/api/1.2/patches/110162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com/","msgid":"<82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:26","name":"[02/14] Revert \"Fix references declared in lexically-enclosing OpenACC data region\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110164,"url":"https://patchwork.plctlab.org/api/1.2/patches/110164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com/","msgid":"<8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:27","name":"[03/14] Revert \"Fix implicit mapping for array slices on lexically-enclosing data constructs (PR70828)\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110161,"url":"https://patchwork.plctlab.org/api/1.2/patches/110161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com/","msgid":"<8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:28","name":"[04/14] Revert \"openmp: Handle C/C++ array reference base-pointers in array sections\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110166,"url":"https://patchwork.plctlab.org/api/1.2/patches/110166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com/","msgid":"<62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:29","name":"[05/14] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110172,"url":"https://patchwork.plctlab.org/api/1.2/patches/110172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com/","msgid":"<8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:30","name":"[06/14] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110165,"url":"https://patchwork.plctlab.org/api/1.2/patches/110165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/efe6a75a4f15d6d227478d2f2cd6e4a0e2b4a8c0.1687201315.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:31","name":"[07/14] OpenMP: implicitly map base pointer for array-section pointer components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/efe6a75a4f15d6d227478d2f2cd6e4a0e2b4a8c0.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110176,"url":"https://patchwork.plctlab.org/api/1.2/patches/110176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9312554aa15cd93c3e463f9dee84daccba31a67.1687201315.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:32","name":"[08/14] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9312554aa15cd93c3e463f9dee84daccba31a67.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110173,"url":"https://patchwork.plctlab.org/api/1.2/patches/110173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com/","msgid":"<4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:33","name":"[09/14] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110177,"url":"https://patchwork.plctlab.org/api/1.2/patches/110177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com/","msgid":"<345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:34","name":"[10/14] OpenMP/OpenACC: Reorganise OMP map clause handling in gimplify.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110178,"url":"https://patchwork.plctlab.org/api/1.2/patches/110178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com/","msgid":"<77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:35","name":"[11/14] OpenACC: Reimplement \"inheritance\" for lexically-nested offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110179,"url":"https://patchwork.plctlab.org/api/1.2/patches/110179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com/","msgid":"<8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:36","name":"[12/14] OpenACC: \"declare create\" fixes wrt. \"allocatable\" variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110167,"url":"https://patchwork.plctlab.org/api/1.2/patches/110167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com/","msgid":"<2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:37","name":"[13/14] OpenACC: Allow implicit uses of assumed-size arrays in offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110171,"url":"https://patchwork.plctlab.org/api/1.2/patches/110171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a02f67664b5ffd7c70dc1cd251673e40fbc2b569.1687201316.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:38","name":"[14/14] OpenACC: Improve implicit mapping for non-lexically nested offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a02f67664b5ffd7c70dc1cd251673e40fbc2b569.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110180,"url":"https://patchwork.plctlab.org/api/1.2/patches/110180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7505008-3132-20e0-da7b-00ec1ee66cc3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T22:34:28","name":"[PR,target/110201] Fix operand types for various scalar crypto insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7505008-3132-20e0-da7b-00ec1ee66cc3@gmail.com/mbox/"},{"id":110181,"url":"https://patchwork.plctlab.org/api/1.2/patches/110181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619230406.308938-1-juzhe.zhong@rivai.ai/","msgid":"<20230619230406.308938-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-19T23:04:06","name":"RISC-V: Fix fails of testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619230406.308938-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110242,"url":"https://patchwork.plctlab.org/api/1.2/patches/110242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620031450.146303-1-juzhe.zhong@rivai.ai/","msgid":"<20230620031450.146303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T03:14:50","name":"RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620031450.146303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110246,"url":"https://patchwork.plctlab.org/api/1.2/patches/110246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240FF414227232B91CACA98E85CA@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T03:58:23","name":"Change fma_reassoc_width tuning for ampere1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240FF414227232B91CACA98E85CA@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":110258,"url":"https://patchwork.plctlab.org/api/1.2/patches/110258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620060705.22235-1-xuli1@eswincomputing.com/","msgid":"<20230620060705.22235-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T06:07:05","name":"RISC-V: Set the natural size of constant vector mask modes to one RVV data vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620060705.22235-1-xuli1@eswincomputing.com/mbox/"},{"id":110262,"url":"https://patchwork.plctlab.org/api/1.2/patches/110262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620064618.31141-1-xuli1@eswincomputing.com/","msgid":"<20230620064618.31141-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T06:46:18","name":"[v2] RISC-V: Set the natural size of constant vector mask modes to one RVV data vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620064618.31141-1-xuli1@eswincomputing.com/mbox/"},{"id":110264,"url":"https://patchwork.plctlab.org/api/1.2/patches/110264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620070039.10D7638582A3@sourceware.org/","msgid":"<20230620070039.10D7638582A3@sourceware.org>","list_archive_url":null,"date":"2023-06-20T06:59:55","name":"Improve DSE to handle stores before __builtin_unreachable ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620070039.10D7638582A3@sourceware.org/mbox/"},{"id":110265,"url":"https://patchwork.plctlab.org/api/1.2/patches/110265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com/","msgid":"<169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com>","list_archive_url":null,"date":"2023-06-20T07:06:57","name":"[v3] x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com/mbox/"},{"id":110287,"url":"https://patchwork.plctlab.org/api/1.2/patches/110287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074630.1252053-1-poulhies@adacore.com/","msgid":"<20230620074630.1252053-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:30","name":"[COMMITTED] ada: Fix edge case in Ada.Calendar.Formatting.Time_Of","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074630.1252053-1-poulhies@adacore.com/mbox/"},{"id":110288,"url":"https://patchwork.plctlab.org/api/1.2/patches/110288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074642.1252250-1-poulhies@adacore.com/","msgid":"<20230620074642.1252250-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:42","name":"[COMMITTED] ada: Spurious error on package instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074642.1252250-1-poulhies@adacore.com/mbox/"},{"id":110303,"url":"https://patchwork.plctlab.org/api/1.2/patches/110303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074644.1252313-1-poulhies@adacore.com/","msgid":"<20230620074644.1252313-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:44","name":"[COMMITTED] ada: Remove references to Might_Not_Return and Always_Return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074644.1252313-1-poulhies@adacore.com/mbox/"},{"id":110292,"url":"https://patchwork.plctlab.org/api/1.2/patches/110292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074646.1252375-1-poulhies@adacore.com/","msgid":"<20230620074646.1252375-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:46","name":"[COMMITTED] ada: Pass Error_Node to calls to Error_Msg in lib-load.adb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074646.1252375-1-poulhies@adacore.com/mbox/"},{"id":110293,"url":"https://patchwork.plctlab.org/api/1.2/patches/110293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074648.1252437-1-poulhies@adacore.com/","msgid":"<20230620074648.1252437-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:48","name":"[COMMITTED] ada: Fix type derivation of subtype of derived type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074648.1252437-1-poulhies@adacore.com/mbox/"},{"id":110302,"url":"https://patchwork.plctlab.org/api/1.2/patches/110302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074650.1252499-1-poulhies@adacore.com/","msgid":"<20230620074650.1252499-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:50","name":"[COMMITTED] ada: Update annotations in runtime for proof","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074650.1252499-1-poulhies@adacore.com/mbox/"},{"id":110310,"url":"https://patchwork.plctlab.org/api/1.2/patches/110310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074652.1252564-1-poulhies@adacore.com/","msgid":"<20230620074652.1252564-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:52","name":"[COMMITTED] ada: Introduce -gnateH switch to force reverse Bit_Order threshold to 64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074652.1252564-1-poulhies@adacore.com/mbox/"},{"id":110306,"url":"https://patchwork.plctlab.org/api/1.2/patches/110306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074654.1252681-1-poulhies@adacore.com/","msgid":"<20230620074654.1252681-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:54","name":"[COMMITTED] ada: Fix -fdiagnostics-format=json not printing all messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074654.1252681-1-poulhies@adacore.com/mbox/"},{"id":110289,"url":"https://patchwork.plctlab.org/api/1.2/patches/110289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074656.1252745-1-poulhies@adacore.com/","msgid":"<20230620074656.1252745-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:56","name":"[COMMITTED] ada: Fix internal error on aggregate within container aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074656.1252745-1-poulhies@adacore.com/mbox/"},{"id":110296,"url":"https://patchwork.plctlab.org/api/1.2/patches/110296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074658.1252808-1-poulhies@adacore.com/","msgid":"<20230620074658.1252808-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:58","name":"[COMMITTED] ada: Small fixes to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074658.1252808-1-poulhies@adacore.com/mbox/"},{"id":110291,"url":"https://patchwork.plctlab.org/api/1.2/patches/110291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074700.1252872-1-poulhies@adacore.com/","msgid":"<20230620074700.1252872-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:00","name":"[COMMITTED] ada: Add CHERI intrinsic bindings and helper functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074700.1252872-1-poulhies@adacore.com/mbox/"},{"id":110299,"url":"https://patchwork.plctlab.org/api/1.2/patches/110299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074703.1252933-1-poulhies@adacore.com/","msgid":"<20230620074703.1252933-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:03","name":"[COMMITTED] ada: Fix fallout of fix to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074703.1252933-1-poulhies@adacore.com/mbox/"},{"id":110304,"url":"https://patchwork.plctlab.org/api/1.2/patches/110304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074705.1252998-1-poulhies@adacore.com/","msgid":"<20230620074705.1252998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:05","name":"[COMMITTED] ada: Fix bug in predicate checks with address clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074705.1252998-1-poulhies@adacore.com/mbox/"},{"id":110312,"url":"https://patchwork.plctlab.org/api/1.2/patches/110312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074707.1253060-1-poulhies@adacore.com/","msgid":"<20230620074707.1253060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:07","name":"[COMMITTED] ada: Fix for quantified expressions in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074707.1253060-1-poulhies@adacore.com/mbox/"},{"id":110319,"url":"https://patchwork.plctlab.org/api/1.2/patches/110319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075205.1253127-1-poulhies@adacore.com/","msgid":"<20230620075205.1253127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:05","name":"[COMMITTED] ada: Document partition-wide Ada signal handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075205.1253127-1-poulhies@adacore.com/mbox/"},{"id":110315,"url":"https://patchwork.plctlab.org/api/1.2/patches/110315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075208.1253570-1-poulhies@adacore.com/","msgid":"<20230620075208.1253570-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:08","name":"[COMMITTED] ada: Fix for attribute Range in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075208.1253570-1-poulhies@adacore.com/mbox/"},{"id":110313,"url":"https://patchwork.plctlab.org/api/1.2/patches/110313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075210.1253631-1-poulhies@adacore.com/","msgid":"<20230620075210.1253631-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:10","name":"[COMMITTED] ada: Add the ability to add error codes to error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075210.1253631-1-poulhies@adacore.com/mbox/"},{"id":110314,"url":"https://patchwork.plctlab.org/api/1.2/patches/110314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075212.1253692-1-poulhies@adacore.com/","msgid":"<20230620075212.1253692-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:12","name":"[COMMITTED] ada: Do not issue warning on postcondition in some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075212.1253692-1-poulhies@adacore.com/mbox/"},{"id":110318,"url":"https://patchwork.plctlab.org/api/1.2/patches/110318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075214.1253753-1-poulhies@adacore.com/","msgid":"<20230620075214.1253753-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:14","name":"[COMMITTED] ada: Fix couple of issues in documentation of overflow checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075214.1253753-1-poulhies@adacore.com/mbox/"},{"id":110317,"url":"https://patchwork.plctlab.org/api/1.2/patches/110317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17403-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T07:52:22","name":"[committed] AArch64 remove test comment from *mov_aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17403-tamar@arm.com/mbox/"},{"id":110320,"url":"https://patchwork.plctlab.org/api/1.2/patches/110320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com/","msgid":"<5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com>","list_archive_url":null,"date":"2023-06-20T07:58:36","name":"RISC-V: Fix vmul test expectation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com/mbox/"},{"id":110347,"url":"https://patchwork.plctlab.org/api/1.2/patches/110347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a008ca07-bf69-8ea0-34f2-0f78b496624b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T08:49:04","name":"[PATCHv4,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a008ca07-bf69-8ea0-34f2-0f78b496624b@linux.ibm.com/mbox/"},{"id":110355,"url":"https://patchwork.plctlab.org/api/1.2/patches/110355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620085452.132059-1-juzhe.zhong@rivai.ai/","msgid":"<20230620085452.132059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T08:54:52","name":"[V2] RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620085452.132059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110356,"url":"https://patchwork.plctlab.org/api/1.2/patches/110356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620090031.140730-1-juzhe.zhong@rivai.ai/","msgid":"<20230620090031.140730-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T09:00:31","name":"[V3] RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620090031.140730-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110371,"url":"https://patchwork.plctlab.org/api/1.2/patches/110371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-2-gaofei@eswincomputing.com/","msgid":"<20230620094052.35993-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T09:40:51","name":"[1/2] allow target to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-2-gaofei@eswincomputing.com/mbox/"},{"id":110370,"url":"https://patchwork.plctlab.org/api/1.2/patches/110370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-3-gaofei@eswincomputing.com/","msgid":"<20230620094052.35993-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T09:40:52","name":"[2/2,RISC-V] resolve confilct between zcmp multi push/pop and shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-3-gaofei@eswincomputing.com/mbox/"},{"id":110374,"url":"https://patchwork.plctlab.org/api/1.2/patches/110374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094517.3693077-1-lehua.ding@rivai.ai/","msgid":"<20230620094517.3693077-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-20T09:45:17","name":"RISC-V: Fix compiler warning of riscv_arg_has_vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094517.3693077-1-lehua.ding@rivai.ai/mbox/"},{"id":110386,"url":"https://patchwork.plctlab.org/api/1.2/patches/110386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnXn5ArbP9zg2Pwu-_CWb=E4f5_dx95T+bSPCb0HsnE7A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T09:54:58","name":"[SVE,match.pd] Fix ICE observed in PR110280","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnXn5ArbP9zg2Pwu-_CWb=E4f5_dx95T+bSPCb0HsnE7A@mail.gmail.com/mbox/"},{"id":110412,"url":"https://patchwork.plctlab.org/api/1.2/patches/110412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com/","msgid":"<7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com>","list_archive_url":null,"date":"2023-06-20T10:50:36","name":"Fortran'\''s gfc_match_char: %S to match symbol with host_assoc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com/mbox/"},{"id":110413,"url":"https://patchwork.plctlab.org/api/1.2/patches/110413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620105136.106423856634@sourceware.org/","msgid":"<20230620105136.106423856634@sourceware.org>","list_archive_url":null,"date":"2023-06-20T10:50:51","name":"Update virtual SSA form manually where easily possible in phiprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620105136.106423856634@sourceware.org/mbox/"},{"id":110426,"url":"https://patchwork.plctlab.org/api/1.2/patches/110426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112620.1299203-1-poulhies@adacore.com/","msgid":"<20230620112620.1299203-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:20","name":"[COMMITTED] ada: Remove outdated comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112620.1299203-1-poulhies@adacore.com/mbox/"},{"id":110430,"url":"https://patchwork.plctlab.org/api/1.2/patches/110430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112630.1299352-1-poulhies@adacore.com/","msgid":"<20230620112630.1299352-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:30","name":"[COMMITTED] ada: Further fixes to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112630.1299352-1-poulhies@adacore.com/mbox/"},{"id":110427,"url":"https://patchwork.plctlab.org/api/1.2/patches/110427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112633.1299451-1-poulhies@adacore.com/","msgid":"<20230620112633.1299451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:33","name":"[COMMITTED] ada: Fix crash on inlining in GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112633.1299451-1-poulhies@adacore.com/mbox/"},{"id":110428,"url":"https://patchwork.plctlab.org/api/1.2/patches/110428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112635.1299512-1-poulhies@adacore.com/","msgid":"<20230620112635.1299512-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:35","name":"[COMMITTED] ada: Minor tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112635.1299512-1-poulhies@adacore.com/mbox/"},{"id":110446,"url":"https://patchwork.plctlab.org/api/1.2/patches/110446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4a57c42-39fa-dc2a-de09-213f045edf40@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T12:01:48","name":"[committed] Fortran: Fix parse-dump-tree for OpenMP ALLOCATE clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4a57c42-39fa-dc2a-de09-213f045edf40@codesourcery.com/mbox/"},{"id":110459,"url":"https://patchwork.plctlab.org/api/1.2/patches/110459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com/","msgid":"<8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com>","list_archive_url":null,"date":"2023-06-20T12:47:43","name":"RISC-V: Implement autovec copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com/mbox/"},{"id":110498,"url":"https://patchwork.plctlab.org/api/1.2/patches/110498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620133858.166497-1-jwakely@redhat.com/","msgid":"<20230620133858.166497-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-20T13:38:58","name":"libstdc++: Use RAII in std::vector::_M_realloc_insert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620133858.166497-1-jwakely@redhat.com/mbox/"},{"id":110504,"url":"https://patchwork.plctlab.org/api/1.2/patches/110504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620134221.181173-1-juzhe.zhong@rivai.ai/","msgid":"<20230620134221.181173-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T13:42:21","name":"[V2] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620134221.181173-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110553,"url":"https://patchwork.plctlab.org/api/1.2/patches/110553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620150626.269383-1-juzhe.zhong@rivai.ai/","msgid":"<20230620150626.269383-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T15:06:26","name":"[V3] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620150626.269383-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110585,"url":"https://patchwork.plctlab.org/api/1.2/patches/110585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-2-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:44","name":"[V10,1/3] Introduce IR bit TYPE_INCLUDES_FLEXARRAY for the GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-2-qing.zhao@oracle.com/mbox/"},{"id":110579,"url":"https://patchwork.plctlab.org/api/1.2/patches/110579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-3-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:45","name":"[V10,2/3] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-3-qing.zhao@oracle.com/mbox/"},{"id":110583,"url":"https://patchwork.plctlab.org/api/1.2/patches/110583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-4-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:46","name":"[V10,3/3] Use TYPE_INCLUDES_FLEXARRAY in __builtin_object_size [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-4-qing.zhao@oracle.com/mbox/"},{"id":110597,"url":"https://patchwork.plctlab.org/api/1.2/patches/110597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620161103.2964705-1-hongtao.liu@intel.com/","msgid":"<20230620161103.2964705-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-20T16:11:03","name":"[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620161103.2964705-1-hongtao.liu@intel.com/mbox/"},{"id":110598,"url":"https://patchwork.plctlab.org/api/1.2/patches/110598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKCiHkaBpuXXPD7_cG8O-P+tWju=CFCw9eiwLCZLvnOtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:19:07","name":"[fortran] PR108961 - Segfault when associating to pointer from C_F_POINTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKCiHkaBpuXXPD7_cG8O-P+tWju=CFCw9eiwLCZLvnOtw@mail.gmail.com/mbox/"},{"id":110599,"url":"https://patchwork.plctlab.org/api/1.2/patches/110599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620162211.922410-1-jason@redhat.com/","msgid":"<20230620162211.922410-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-20T16:22:11","name":"[pushed] wwwdocs: Add GCC Code of Conduct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620162211.922410-1-jason@redhat.com/mbox/"},{"id":110615,"url":"https://patchwork.plctlab.org/api/1.2/patches/110615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJHXpbRnyrPrFROM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:45:25","name":"tree-ssa-math-opts: Small uaddc/usubc pattern matching improvement [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJHXpbRnyrPrFROM@tucnak/mbox/"},{"id":110618,"url":"https://patchwork.plctlab.org/api/1.2/patches/110618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVszEL5dx4_OcRjLn24tBDBdCEMM8rSrvmWJcDRe8oq9Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:57:41","name":"libgo patch committed: Use a C function to call mmap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVszEL5dx4_OcRjLn24tBDBdCEMM8rSrvmWJcDRe8oq9Q@mail.gmail.com/mbox/"},{"id":110625,"url":"https://patchwork.plctlab.org/api/1.2/patches/110625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17410-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T17:17:51","name":"[gensupport] drop suppport for define_cond_exec from compact syntac","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17410-tamar@arm.com/mbox/"},{"id":110634,"url":"https://patchwork.plctlab.org/api/1.2/patches/110634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b2hQXwTRb+RFB+1inHyrLEcenHQ+B8GYKs=Cg=7SJkjw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T17:47:00","name":"[committed] calls: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b2hQXwTRb+RFB+1inHyrLEcenHQ+B8GYKs=Cg=7SJkjw@mail.gmail.com/mbox/"},{"id":110693,"url":"https://patchwork.plctlab.org/api/1.2/patches/110693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6r1amg4.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T20:49:31","name":"[pushed] aarch64: Robustify stack tie handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6r1amg4.fsf@arm.com/mbox/"},{"id":110694,"url":"https://patchwork.plctlab.org/api/1.2/patches/110694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkh9amf1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T20:50:10","name":"[pushed] aarch64: Fix gcc.target/aarch64/sve/pcs failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkh9amf1.fsf@arm.com/mbox/"},{"id":110774,"url":"https://patchwork.plctlab.org/api/1.2/patches/110774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621051713.573883-1-hongtao.liu@intel.com/","msgid":"<20230621051713.573883-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-21T05:17:13","name":"Refine maskloadmn pattern with UNSPEC_MASKLOAD.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621051713.573883-1-hongtao.liu@intel.com/mbox/"},{"id":110780,"url":"https://patchwork.plctlab.org/api/1.2/patches/110780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df9f403f4e3c1f9ad620e8d5e38adaa59be2332b.camel@microchip.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T05:57:20","name":"Update array address space in c_build_qualified_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df9f403f4e3c1f9ad620e8d5e38adaa59be2332b.camel@microchip.com/mbox/"},{"id":110781,"url":"https://patchwork.plctlab.org/api/1.2/patches/110781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com/","msgid":"<0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com>","list_archive_url":null,"date":"2023-06-21T05:59:44","name":"x86: add -mprefer-vector-width=512 to new avx512f-dupv2di.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com/mbox/"},{"id":110785,"url":"https://patchwork.plctlab.org/api/1.2/patches/110785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c643ed57-cdba-5487-1781-47904dbe6208@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T06:06:00","name":"[v2] x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c643ed57-cdba-5487-1781-47904dbe6208@suse.com/mbox/"},{"id":110786,"url":"https://patchwork.plctlab.org/api/1.2/patches/110786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621060842.189680-1-yanzhang.wang@intel.com/","msgid":"<20230621060842.189680-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-21T06:08:42","name":"RISC-V: convert the mulh with 0 to mov 0 to the reg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621060842.189680-1-yanzhang.wang@intel.com/mbox/"},{"id":110791,"url":"https://patchwork.plctlab.org/api/1.2/patches/110791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com/","msgid":"<457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com>","list_archive_url":null,"date":"2023-06-21T06:25:52","name":"[1/5] x86: use VPTERNLOG for further bitwise two-vector operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com/mbox/"},{"id":110793,"url":"https://patchwork.plctlab.org/api/1.2/patches/110793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com/","msgid":"<3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com>","list_archive_url":null,"date":"2023-06-21T06:27:11","name":"[2/5] x86: use VPTERNLOG also for certain andnot forms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com/mbox/"},{"id":110794,"url":"https://patchwork.plctlab.org/api/1.2/patches/110794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com/","msgid":"<4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com>","list_archive_url":null,"date":"2023-06-21T06:27:32","name":"[3/5] x86: allow memory operand for AVX2 splitter for PR target/100711","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com/mbox/"},{"id":110796,"url":"https://patchwork.plctlab.org/api/1.2/patches/110796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2607ae7-045a-d1bc-2cc8-d2f114677cb6@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T06:27:51","name":"[4/5] x86: further PR target/100711-like splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2607ae7-045a-d1bc-2cc8-d2f114677cb6@suse.com/mbox/"},{"id":110797,"url":"https://patchwork.plctlab.org/api/1.2/patches/110797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com/","msgid":"<0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com>","list_archive_url":null,"date":"2023-06-21T06:28:12","name":"[5/5] x86: yet more PR target/100711-like splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com/mbox/"},{"id":110843,"url":"https://patchwork.plctlab.org/api/1.2/patches/110843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621073955.2567-1-shiyulong@iscas.ac.cn/","msgid":"<20230621073955.2567-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-21T07:39:55","name":"[V1] RISC-V:Add float16 tuple type abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621073955.2567-1-shiyulong@iscas.ac.cn/mbox/"},{"id":110844,"url":"https://patchwork.plctlab.org/api/1.2/patches/110844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075021.5A14738582BC@sourceware.org/","msgid":"<20230621075021.5A14738582BC@sourceware.org>","list_archive_url":null,"date":"2023-06-21T07:49:37","name":"[RFC] middle-end/110237 - wrong MEM_ATTRs for partial loads/stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075021.5A14738582BC@sourceware.org/mbox/"},{"id":110846,"url":"https://patchwork.plctlab.org/api/1.2/patches/110846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075824.1990571-1-pan2.li@intel.com/","msgid":"<20230621075824.1990571-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-21T07:58:24","name":"[v3] Streamer: Fix out of range memory access of machine mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075824.1990571-1-pan2.li@intel.com/mbox/"},{"id":110910,"url":"https://patchwork.plctlab.org/api/1.2/patches/110910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17411-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T09:32:10","name":"[committed,docs] : replace backslashchar [PR 110329].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17411-tamar@arm.com/mbox/"},{"id":110984,"url":"https://patchwork.plctlab.org/api/1.2/patches/110984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621111252.236515-1-juzhe.zhong@rivai.ai/","msgid":"<20230621111252.236515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T11:12:52","name":"RISC-V: Support RVV floating-point ternary auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621111252.236515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110987,"url":"https://patchwork.plctlab.org/api/1.2/patches/110987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113141.909183856DF1@sourceware.org/","msgid":"<20230621113141.909183856DF1@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:30:54","name":"[1/3] Hide and refactor IVOPTs strip_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113141.909183856DF1@sourceware.org/mbox/"},{"id":110988,"url":"https://patchwork.plctlab.org/api/1.2/patches/110988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113152.B9E773857019@sourceware.org/","msgid":"<20230621113152.B9E773857019@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:31:08","name":"[2/3] Less strip_offset in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113152.B9E773857019@sourceware.org/mbox/"},{"id":110989,"url":"https://patchwork.plctlab.org/api/1.2/patches/110989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113206.3F9773856973@sourceware.org/","msgid":"<20230621113206.3F9773856973@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:31:21","name":"[3/3] Less strip_offset in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113206.3F9773856973@sourceware.org/mbox/"},{"id":110990,"url":"https://patchwork.plctlab.org/api/1.2/patches/110990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113338.290127-1-juzhe.zhong@rivai.ai/","msgid":"<20230621113338.290127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T11:33:38","name":": [NFC] Move can_vec_mask_load_store_p and get_len_load_store_mode from \"optabs-query\" into \"optabs-tree\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113338.290127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110998,"url":"https://patchwork.plctlab.org/api/1.2/patches/110998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621122207.302494-1-jwakely@redhat.com/","msgid":"<20230621122207.302494-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-21T12:22:07","name":"[committed,gcc-12] libstdc++: avoid bogus -Wrestrict [PR105651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621122207.302494-1-jwakely@redhat.com/mbox/"},{"id":111002,"url":"https://patchwork.plctlab.org/api/1.2/patches/111002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee09dc9b-63d8-b166-7ceb-21f022d0eef6@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T12:57:24","name":"[v2] RISC-V: Implement autovec copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee09dc9b-63d8-b166-7ceb-21f022d0eef6@gmail.com/mbox/"},{"id":111048,"url":"https://patchwork.plctlab.org/api/1.2/patches/111048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621142819.307989-1-juzhe.zhong@rivai.ai/","msgid":"<20230621142819.307989-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T14:28:19","name":"[V2] RISC-V: Support RVV floating-point auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621142819.307989-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111124,"url":"https://patchwork.plctlab.org/api/1.2/patches/111124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621153618.134179-1-juzhe.zhong@rivai.ai/","msgid":"<20230621153618.134179-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T15:36:18","name":"[V4] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621153618.134179-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111134,"url":"https://patchwork.plctlab.org/api/1.2/patches/111134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621155314.183370-1-juzhe.zhong@rivai.ai/","msgid":"<20230621155314.183370-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T15:53:14","name":"[V3] RISC-V: Support RVV floating-point auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621155314.183370-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111183,"url":"https://patchwork.plctlab.org/api/1.2/patches/111183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJMpN1WebpMTlQHd@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T16:45:43","name":"[wwwdocs] cxx-status: Add C++26 papers (Spring 2023, Varna)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJMpN1WebpMTlQHd@redhat.com/mbox/"},{"id":111205,"url":"https://patchwork.plctlab.org/api/1.2/patches/111205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621171920.1283054-1-ppalka@redhat.com/","msgid":"<20230621171920.1283054-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-21T17:19:20","name":"c++: redundant targ coercion for var/alias tmpls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621171920.1283054-1-ppalka@redhat.com/mbox/"},{"id":111270,"url":"https://patchwork.plctlab.org/api/1.2/patches/111270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621185820.1766291-1-ben.boeckel@kitware.com/","msgid":"<20230621185820.1766291-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-21T18:58:20","name":"[1/1] libcpp: allow UCS_LIMIT codepoints in UTF-8 strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621185820.1766291-1-ben.boeckel@kitware.com/mbox/"},{"id":111298,"url":"https://patchwork.plctlab.org/api/1.2/patches/111298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZzjMJHVwn4vB6gCrd_gesLkRXAAGnv9dJBZBmVC+Hmag@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T19:57:50","name":"[committed] function: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZzjMJHVwn4vB6gCrd_gesLkRXAAGnv9dJBZBmVC+Hmag@mail.gmail.com/mbox/"},{"id":111332,"url":"https://patchwork.plctlab.org/api/1.2/patches/111332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621223842.259423-1-juzhe.zhong@rivai.ai/","msgid":"<20230621223842.259423-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T22:38:42","name":"RISC-V: Refactor the integer ternary autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621223842.259423-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111334,"url":"https://patchwork.plctlab.org/api/1.2/patches/111334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com/","msgid":"<6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-21T22:46:05","name":"[ver,2] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com/mbox/"},{"id":111378,"url":"https://patchwork.plctlab.org/api/1.2/patches/111378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUBnHj_WyUkExtGPi2x96qBGZ7ZYAjT4EdW8HzoC0Usvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T00:53:04","name":"Go patch committed: Determine types of Slice_{value, info} expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUBnHj_WyUkExtGPi2x96qBGZ7ZYAjT4EdW8HzoC0Usvw@mail.gmail.com/mbox/"},{"id":111481,"url":"https://patchwork.plctlab.org/api/1.2/patches/111481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622081413.EA6D53858C39@sourceware.org/","msgid":"<20230622081413.EA6D53858C39@sourceware.org>","list_archive_url":null,"date":"2023-06-22T08:13:28","name":"tree-optimization/110332 - fix ICE with phiprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622081413.EA6D53858C39@sourceware.org/mbox/"},{"id":111598,"url":"https://patchwork.plctlab.org/api/1.2/patches/111598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com/","msgid":"<4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com>","list_archive_url":null,"date":"2023-06-22T10:03:37","name":"[OpenACC,2.7] Adjust acc_map_data/acc_unmap_data interaction with reference counters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com/mbox/"},{"id":111618,"url":"https://patchwork.plctlab.org/api/1.2/patches/111618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622111154.2837175-1-philipp.tomsich@vrull.eu/","msgid":"<20230622111154.2837175-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-06-22T11:11:54","name":"cprop_hardreg: fix ORIGINAL_REGNO/REG_ATTRS/REG_POINTER handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622111154.2837175-1-philipp.tomsich@vrull.eu/mbox/"},{"id":111622,"url":"https://patchwork.plctlab.org/api/1.2/patches/111622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMRM9YmzmpuHTeMNAd1e2PKXkCkkkdnM1-M34YqGZ8b2w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T11:36:51","name":"LTO: buffer overflow in lto_output_init_mode_table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMRM9YmzmpuHTeMNAd1e2PKXkCkkkdnM1-M34YqGZ8b2w@mail.gmail.com/mbox/"},{"id":111657,"url":"https://patchwork.plctlab.org/api/1.2/patches/111657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6f011d2-6629-9acb-4a4e-f3f079678f12@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T13:03:41","name":"RISC-V: Split VF iterators for Zvfh(min).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6f011d2-6629-9acb-4a4e-f3f079678f12@gmail.com/mbox/"},{"id":111656,"url":"https://patchwork.plctlab.org/api/1.2/patches/111656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com/","msgid":"<4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com>","list_archive_url":null,"date":"2023-06-22T13:03:43","name":"[committed] libgomp.texi: Improve OpenMP ICV description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com/mbox/"},{"id":111677,"url":"https://patchwork.plctlab.org/api/1.2/patches/111677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622135348.160496-1-juzhe.zhong@rivai.ai/","msgid":"<20230622135348.160496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-22T13:53:48","name":"[V5] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622135348.160496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111795,"url":"https://patchwork.plctlab.org/api/1.2/patches/111795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622194952.1834364-1-vultkayn@gcc.gnu.org/","msgid":"<20230622194952.1834364-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-22T19:49:54","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622194952.1834364-1-vultkayn@gcc.gnu.org/mbox/"},{"id":111797,"url":"https://patchwork.plctlab.org/api/1.2/patches/111797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622195522.1834793-1-vultkayn@gcc.gnu.org/","msgid":"<20230622195522.1834793-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-22T19:55:24","name":"analyzer: Fix regression bug after r14-1632-g9589a46ddadc8b [pr110198]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622195522.1834793-1-vultkayn@gcc.gnu.org/mbox/"},{"id":111799,"url":"https://patchwork.plctlab.org/api/1.2/patches/111799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-67cbfb46-d186-40df-86e8-fb36979a34a9-1687465404920@3c-app-gmx-bs06/","msgid":"","list_archive_url":null,"date":"2023-06-22T20:23:24","name":"Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-67cbfb46-d186-40df-86e8-fb36979a34a9-1687465404920@3c-app-gmx-bs06/mbox/"},{"id":111843,"url":"https://patchwork.plctlab.org/api/1.2/patches/111843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622235112.9407-1-juzhe.zhong@rivai.ai/","msgid":"<20230622235112.9407-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-22T23:51:12","name":"[V6] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622235112.9407-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111855,"url":"https://patchwork.plctlab.org/api/1.2/patches/111855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623002537.140375-1-polacek@redhat.com/","msgid":"<20230623002537.140375-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-23T00:25:37","name":"c++: Add support for -std={c,gnu}++2{c,6}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623002537.140375-1-polacek@redhat.com/mbox/"},{"id":111928,"url":"https://patchwork.plctlab.org/api/1.2/patches/111928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzvupwpr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-23T05:35:28","name":"[testsuite] note pitfall in how outputs.exp sets gld","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzvupwpr.fsf@lxoliva.fsfla.org/mbox/"},{"id":111944,"url":"https://patchwork.plctlab.org/api/1.2/patches/111944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623064417.598501331F@imap2.suse-dmz.suse.de/","msgid":"<20230623064417.598501331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T06:44:16","name":"Improve vector_vector_composition_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623064417.598501331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111966,"url":"https://patchwork.plctlab.org/api/1.2/patches/111966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623081138.552D21331F@imap2.suse-dmz.suse.de/","msgid":"<20230623081138.552D21331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:11:37","name":"Optimize vector codegen for invariant loads, fix SLP support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623081138.552D21331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111976,"url":"https://patchwork.plctlab.org/api/1.2/patches/111976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082613.00D381331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082613.00D381331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:26:12","name":"[RFC] Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082613.00D381331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111977,"url":"https://patchwork.plctlab.org/api/1.2/patches/111977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082642.0811A1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082642.0811A1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:26:41","name":"[1/6] Avoid shorten_binary_op on VECTOR_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082642.0811A1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111978,"url":"https://patchwork.plctlab.org/api/1.2/patches/111978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:04","name":"[2/6] Fix TYPE_PRECISION use in hashable_expr_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111980,"url":"https://patchwork.plctlab.org/api/1.2/patches/111980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082721.CF9571331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082721.CF9571331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:21","name":"[3/6] Properly guard vect_look_through_possible_promotion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082721.CF9571331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111979,"url":"https://patchwork.plctlab.org/api/1.2/patches/111979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:35","name":"[4/6] Fix tree_simple_nonnegative_warnv_p for VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111982,"url":"https://patchwork.plctlab.org/api/1.2/patches/111982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082748.10FA71331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082748.10FA71331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:47","name":"[5/6] Bogus and missed folding on vector compares","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082748.10FA71331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111981,"url":"https://patchwork.plctlab.org/api/1.2/patches/111981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082759.0DD281331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082759.0DD281331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:58","name":"[6/6] Use element_precision for match.pd arith conversion optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082759.0DD281331F@imap2.suse-dmz.suse.de/mbox/"},{"id":112044,"url":"https://patchwork.plctlab.org/api/1.2/patches/112044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623102759.DA3231331F@imap2.suse-dmz.suse.de/","msgid":"<20230623102759.DA3231331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T10:27:59","name":"tree-optimization/96208 - SLP of non-grouped loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623102759.DA3231331F@imap2.suse-dmz.suse.de/mbox/"},{"id":112112,"url":"https://patchwork.plctlab.org/api/1.2/patches/112112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121442.3A967134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121442.3A967134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:14:41","name":"Deal with vector typed operands in conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121442.3A967134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112113,"url":"https://patchwork.plctlab.org/api/1.2/patches/112113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:14:52","name":"Fix initializer_constant_valid_p_1 TYPE_PRECISION use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112114,"url":"https://patchwork.plctlab.org/api/1.2/patches/112114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:16:07","name":"narrowing initializers and initializer_constant_valid_p_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112141,"url":"https://patchwork.plctlab.org/api/1.2/patches/112141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623134827.4093245-1-juzhe.zhong@rivai.ai/","msgid":"<20230623134827.4093245-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T13:48:27","name":"GIMPLE_FOLD: Apply LEN_MASK_{LOAD,STORE} into GIMPLE_FOLD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623134827.4093245-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112145,"url":"https://patchwork.plctlab.org/api/1.2/patches/112145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623135635.4100947-1-juzhe.zhong@rivai.ai/","msgid":"<20230623135635.4100947-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T13:56:35","name":"SSA ALIAS: Apply LEN_MASK_{LOAD, STORE} into SSA alias analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623135635.4100947-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112149,"url":"https://patchwork.plctlab.org/api/1.2/patches/112149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623140537.4156063-1-juzhe.zhong@rivai.ai/","msgid":"<20230623140537.4156063-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:05:37","name":"LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623140537.4156063-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112157,"url":"https://patchwork.plctlab.org/api/1.2/patches/112157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623141539.4165425-1-juzhe.zhong@rivai.ai/","msgid":"<20230623141539.4165425-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:15:39","name":"SSA ALIAS: Apply LEN_MASK_STORE to '\''ref_maybe_used_by_call_p_1'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623141539.4165425-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112161,"url":"https://patchwork.plctlab.org/api/1.2/patches/112161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623142103.16401-1-juzhe.zhong@rivai.ai/","msgid":"<20230623142103.16401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:21:03","name":"IVOPTS: Add LEN_MASK_{LOAD, STORE} into '\''get_alias_ptr_type_for_ptr_address'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623142103.16401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112172,"url":"https://patchwork.plctlab.org/api/1.2/patches/112172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143602.83510-1-dmalcolm@redhat.com/","msgid":"<20230623143602.83510-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-23T14:36:02","name":"text-art: remove explicit #include of C++ standard library headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143602.83510-1-dmalcolm@redhat.com/mbox/"},{"id":112175,"url":"https://patchwork.plctlab.org/api/1.2/patches/112175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143835.36983-1-iain@sandoe.co.uk/","msgid":"<20230623143835.36983-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-23T14:38:35","name":"[pushed] testsuite,objective-c++: Fix imported NSObjCRuntime.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143835.36983-1-iain@sandoe.co.uk/mbox/"},{"id":112185,"url":"https://patchwork.plctlab.org/api/1.2/patches/112185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623144847.85698-1-juzhe.zhong@rivai.ai/","msgid":"<20230623144847.85698-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:48:47","name":"DSE: Add LEN_MASK_STORE analysis into DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623144847.85698-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112231,"url":"https://patchwork.plctlab.org/api/1.2/patches/112231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c34bd181-e25e-910b-7bc3-1c1d000d429b@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T16:49:18","name":"rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c34bd181-e25e-910b-7bc3-1c1d000d429b@linux.vnet.ibm.com/mbox/"},{"id":112242,"url":"https://patchwork.plctlab.org/api/1.2/patches/112242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJXU7UQY3oH8t4LH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T17:22:53","name":"[v2] c++: Add support for -std={c,gnu}++2{c,6}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJXU7UQY3oH8t4LH@redhat.com/mbox/"},{"id":112297,"url":"https://patchwork.plctlab.org/api/1.2/patches/112297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623210851.jnyyc24by7jomr2b@lug-owl.de/","msgid":"<20230623210851.jnyyc24by7jomr2b@lug-owl.de>","list_archive_url":null,"date":"2023-06-23T21:08:52","name":"GCC nvptx: Silence warning?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623210851.jnyyc24by7jomr2b@lug-owl.de/mbox/"},{"id":112345,"url":"https://patchwork.plctlab.org/api/1.2/patches/112345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623220106.117866-1-dmalcolm@redhat.com/","msgid":"<20230623220106.117866-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-23T22:01:06","name":"[pushed] c++: provide #include hint for missing includes [PR110164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623220106.117866-1-dmalcolm@redhat.com/mbox/"},{"id":112351,"url":"https://patchwork.plctlab.org/api/1.2/patches/112351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623222525.547651-1-polacek@redhat.com/","msgid":"<20230623222525.547651-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-23T22:25:25","name":"c++: fix error reporting routines re-entered ICE [PR110175]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623222525.547651-1-polacek@redhat.com/mbox/"},{"id":112376,"url":"https://patchwork.plctlab.org/api/1.2/patches/112376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVTmpCvvgudvjOjpOtHUni-9__=TKHwJoE6_E7Z_4ARCw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T23:17:31","name":"Go patch committed: Support bootstrapping Go 1.21","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVTmpCvvgudvjOjpOtHUni-9__=TKHwJoE6_E7Z_4ARCw@mail.gmail.com/mbox/"},{"id":112385,"url":"https://patchwork.plctlab.org/api/1.2/patches/112385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qi1pxnk.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-23T23:27:27","name":"[v3] Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qi1pxnk.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":112386,"url":"https://patchwork.plctlab.org/api/1.2/patches/112386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623234157.331911-1-juzhe.zhong@rivai.ai/","msgid":"<20230623234157.331911-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T23:41:57","name":"[V2] LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623234157.331911-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112405,"url":"https://patchwork.plctlab.org/api/1.2/patches/112405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624012657.130267-1-dmalcolm@redhat.com/","msgid":"<20230624012657.130267-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-24T01:26:57","name":"[pushed:,v2] text-art: remove explicit #include of C++ standard library headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624012657.130267-1-dmalcolm@redhat.com/mbox/"},{"id":112409,"url":"https://patchwork.plctlab.org/api/1.2/patches/112409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e906272d-b875-32c5-8db7-aaebdd3565d4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-24T04:12:13","name":"[v6] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e906272d-b875-32c5-8db7-aaebdd3565d4@linux.ibm.com/mbox/"},{"id":112440,"url":"https://patchwork.plctlab.org/api/1.2/patches/112440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-1-kmatsui@cs.washington.edu/","msgid":"<20230624101210.57519-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:12:09","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-1-kmatsui@cs.washington.edu/mbox/"},{"id":112441,"url":"https://patchwork.plctlab.org/api/1.2/patches/112441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-2-kmatsui@cs.washington.edu/","msgid":"<20230624101210.57519-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:12:10","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-2-kmatsui@cs.washington.edu/mbox/"},{"id":112443,"url":"https://patchwork.plctlab.org/api/1.2/patches/112443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-1-kmatsui@cs.washington.edu/","msgid":"<20230624103848.68000-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:38:47","name":"[1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-1-kmatsui@cs.washington.edu/mbox/"},{"id":112444,"url":"https://patchwork.plctlab.org/api/1.2/patches/112444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-2-kmatsui@cs.washington.edu/","msgid":"<20230624103848.68000-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:38:48","name":"[2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-2-kmatsui@cs.washington.edu/mbox/"},{"id":112458,"url":"https://patchwork.plctlab.org/api/1.2/patches/112458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKPvpOMQSbx5tm9UGVvyGuDoEcQAR7WJMo7iQiYh9pL+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-24T13:18:54","name":"[fortran] PR49213 - [OOP] gfortran rejects structure constructor expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKPvpOMQSbx5tm9UGVvyGuDoEcQAR7WJMo7iQiYh9pL+A@mail.gmail.com/mbox/"},{"id":112459,"url":"https://patchwork.plctlab.org/api/1.2/patches/112459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-1-kmatsui@cs.washington.edu/","msgid":"<20230624134051.73203-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:40:50","name":"[v2,1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-1-kmatsui@cs.washington.edu/mbox/"},{"id":112460,"url":"https://patchwork.plctlab.org/api/1.2/patches/112460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-2-kmatsui@cs.washington.edu/","msgid":"<20230624134051.73203-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:40:51","name":"[v2,2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-2-kmatsui@cs.washington.edu/mbox/"},{"id":112462,"url":"https://patchwork.plctlab.org/api/1.2/patches/112462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-1-kmatsui@cs.washington.edu/","msgid":"<20230624135348.74428-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:53:47","name":"[v2,1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-1-kmatsui@cs.washington.edu/mbox/"},{"id":112464,"url":"https://patchwork.plctlab.org/api/1.2/patches/112464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-2-kmatsui@cs.washington.edu/","msgid":"<20230624135348.74428-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:53:48","name":"[v2,2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-2-kmatsui@cs.washington.edu/mbox/"},{"id":112468,"url":"https://patchwork.plctlab.org/api/1.2/patches/112468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-1-kmatsui@cs.washington.edu/","msgid":"<20230624142346.84325-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T14:23:45","name":"[v2,1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-1-kmatsui@cs.washington.edu/mbox/"},{"id":112469,"url":"https://patchwork.plctlab.org/api/1.2/patches/112469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-2-kmatsui@cs.washington.edu/","msgid":"<20230624142346.84325-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T14:23:46","name":"[v2,2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-2-kmatsui@cs.washington.edu/mbox/"},{"id":112476,"url":"https://patchwork.plctlab.org/api/1.2/patches/112476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com/","msgid":"<00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-24T17:13:55","name":"[x86_64] Handle SUBREG conversions in TImode STV (for ptest).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com/mbox/"},{"id":112479,"url":"https://patchwork.plctlab.org/api/1.2/patches/112479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com/","msgid":"<010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-24T18:04:47","name":"[x86_PATCH] New *ashl_doubleword_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com/mbox/"},{"id":112490,"url":"https://patchwork.plctlab.org/api/1.2/patches/112490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b942f382-e8c1-4447-a562-0567f1f1f923-1687633555558@3c-app-gmx-bap37/","msgid":"","list_archive_url":null,"date":"2023-06-24T19:05:55","name":"[part2,committed] Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b942f382-e8c1-4447-a562-0567f1f1f923-1687633555558@3c-app-gmx-bap37/mbox/"},{"id":112509,"url":"https://patchwork.plctlab.org/api/1.2/patches/112509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com/","msgid":"<8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com>","list_archive_url":null,"date":"2023-06-25T02:09:25","name":"[PATCHv4,rs6000] Splat vector small V2DI constants with ISA 2.07 instructions [PR104124]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com/mbox/"},{"id":112510,"url":"https://patchwork.plctlab.org/api/1.2/patches/112510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625030837.23389-1-xuli1@eswincomputing.com/","msgid":"<20230625030837.23389-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-25T03:08:37","name":"RISC-V: force arg and target to reg rtx under -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625030837.23389-1-xuli1@eswincomputing.com/mbox/"},{"id":112516,"url":"https://patchwork.plctlab.org/api/1.2/patches/112516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625033654.1150808-1-juzhe.zhong@rivai.ai/","msgid":"<20230625033654.1150808-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T03:36:54","name":"internal-fn: Fix bug of BIAS argument index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625033654.1150808-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112522,"url":"https://patchwork.plctlab.org/api/1.2/patches/112522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083207.289000-1-juzhe.zhong@rivai.ai/","msgid":"<20230625083207.289000-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T08:32:07","name":"RISC-V: Enable len_mask{load, store} and remove len_{load, store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083207.289000-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112526,"url":"https://patchwork.plctlab.org/api/1.2/patches/112526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083952.9771-1-juzhe.zhong@rivai.ai/","msgid":"<20230625083952.9771-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T08:39:52","name":"[V2] RISC-V: Enable len_mask{load, store} and remove len_{load, store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083952.9771-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112529,"url":"https://patchwork.plctlab.org/api/1.2/patches/112529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625090932.18330-1-xuli1@eswincomputing.com/","msgid":"<20230625090932.18330-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-25T09:09:32","name":"[v2] RISC-V: fix expand function of vlmul_ext RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625090932.18330-1-xuli1@eswincomputing.com/mbox/"},{"id":112530,"url":"https://patchwork.plctlab.org/api/1.2/patches/112530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625092128.44071-1-iain@sandoe.co.uk/","msgid":"<20230625092128.44071-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-25T09:21:28","name":"[pushed] configure, Darwin: Ensure overrides to host-pie are passed to gcc configure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625092128.44071-1-iain@sandoe.co.uk/mbox/"},{"id":112532,"url":"https://patchwork.plctlab.org/api/1.2/patches/112532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625095118.1854755-1-lehua.ding@rivai.ai/","msgid":"<20230625095118.1854755-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-25T09:51:18","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625095118.1854755-1-lehua.ding@rivai.ai/mbox/"},{"id":112559,"url":"https://patchwork.plctlab.org/api/1.2/patches/112559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625113229.79338-1-iain@sandoe.co.uk/","msgid":"<20230625113229.79338-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-25T11:32:29","name":"modula-2: Amend the handling of failed select() calls in RTint [PR108835].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625113229.79338-1-iain@sandoe.co.uk/mbox/"},{"id":112571,"url":"https://patchwork.plctlab.org/api/1.2/patches/112571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625122057.195433-1-juzhe.zhong@rivai.ai/","msgid":"<20230625122057.195433-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T12:20:57","name":"RISC-V: Optimize VSETVL codegen of SELECT_VL with LEN_MASK_{LOAD, STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625122057.195433-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112579,"url":"https://patchwork.plctlab.org/api/1.2/patches/112579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625124040.2335529-1-lehua.ding@rivai.ai/","msgid":"<20230625124040.2335529-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-25T12:40:40","name":"RISC-V: Add an experimental vector calling convention","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625124040.2335529-1-lehua.ding@rivai.ai/mbox/"},{"id":112583,"url":"https://patchwork.plctlab.org/api/1.2/patches/112583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com/","msgid":"<4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com>","list_archive_url":null,"date":"2023-06-25T13:13:37","name":"[PING,RISCV,PR,target/110201] Fix operand types for various scalar crypto insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com/mbox/"},{"id":112685,"url":"https://patchwork.plctlab.org/api/1.2/patches/112685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626000415.277265-1-ibuclaw@gdcproject.org/","msgid":"<20230626000415.277265-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T00:04:15","name":"[committed] d: Merge upstream dmd, druntime a45f4e9f43, phobos 106038f2e.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626000415.277265-1-ibuclaw@gdcproject.org/mbox/"},{"id":112686,"url":"https://patchwork.plctlab.org/api/1.2/patches/112686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626005142.333366-1-ibuclaw@gdcproject.org/","msgid":"<20230626005142.333366-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T00:51:42","name":"[GCC13,committed] d: Fix crash in d/dmd/root/aav.d:127 dmd_aaGetRvalue from DsymbolTable::lookup (PR110113)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626005142.333366-1-ibuclaw@gdcproject.org/mbox/"},{"id":112693,"url":"https://patchwork.plctlab.org/api/1.2/patches/112693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-1-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:03","name":"[1/3] Use cvt_op to save intermediate type operand instead of \"subtle\" vec_dest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-1-hongtao.liu@intel.com/mbox/"},{"id":112691,"url":"https://patchwork.plctlab.org/api/1.2/patches/112691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-2-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:04","name":"[2/3] Don'\''t use intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-2-hongtao.liu@intel.com/mbox/"},{"id":112692,"url":"https://patchwork.plctlab.org/api/1.2/patches/112692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-3-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-3-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:05","name":"[3/3,aarch64] Adjust testcase to match assembly output after r14-2007.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-3-hongtao.liu@intel.com/mbox/"},{"id":112694,"url":"https://patchwork.plctlab.org/api/1.2/patches/112694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626014940.36902-1-juzhe.zhong@rivai.ai/","msgid":"<20230626014940.36902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T01:49:40","name":"GIMPLE_FOLD: Fix gimple fold for LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626014940.36902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112695,"url":"https://patchwork.plctlab.org/api/1.2/patches/112695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626015443.89052-1-juzhe.zhong@rivai.ai/","msgid":"<20230626015443.89052-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T01:54:43","name":"[V2] DSE: Add LEN_MASK_STORE analysis into DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626015443.89052-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112696,"url":"https://patchwork.plctlab.org/api/1.2/patches/112696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626021222.419821-1-ibuclaw@gdcproject.org/","msgid":"<20230626021222.419821-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T02:12:22","name":"[committed] d: Suboptimal codegen for __builtin_expect(cond, false)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626021222.419821-1-ibuclaw@gdcproject.org/mbox/"},{"id":112698,"url":"https://patchwork.plctlab.org/api/1.2/patches/112698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626022913.32556-1-hongyu.wang@intel.com/","msgid":"<20230626022913.32556-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-06-26T02:29:13","name":"i386: Sync tune_string with arch_string for target attribute arch=*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626022913.32556-1-hongyu.wang@intel.com/mbox/"},{"id":112699,"url":"https://patchwork.plctlab.org/api/1.2/patches/112699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023204.1010610-1-juzhe.zhong@rivai.ai/","msgid":"<20230626023204.1010610-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T02:32:04","name":"SCCVN: Fix repeating variable name \"len\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023204.1010610-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112703,"url":"https://patchwork.plctlab.org/api/1.2/patches/112703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023408.33758-1-hongyu.wang@intel.com/","msgid":"<20230626023408.33758-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-06-26T02:34:08","name":"i386: Relax inline requirement for functions with different target attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023408.33758-1-hongyu.wang@intel.com/mbox/"},{"id":112704,"url":"https://patchwork.plctlab.org/api/1.2/patches/112704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023735.1013441-1-juzhe.zhong@rivai.ai/","msgid":"<20230626023735.1013441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T02:37:35","name":"SSCV: Add LEN_MASK_STORE into SCCVN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023735.1013441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112718,"url":"https://patchwork.plctlab.org/api/1.2/patches/112718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626033830.6544-1-juzhe.zhong@rivai.ai/","msgid":"<20230626033830.6544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T03:38:30","name":"RISC-V: Remove redundant vcond patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626033830.6544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112751,"url":"https://patchwork.plctlab.org/api/1.2/patches/112751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626065101.75459-1-juzhe.zhong@rivai.ai/","msgid":"<20230626065101.75459-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T06:51:01","name":"RISC-V: Enhance RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626065101.75459-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112754,"url":"https://patchwork.plctlab.org/api/1.2/patches/112754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626074342.2629716-1-juzhe.zhong@rivai.ai/","msgid":"<20230626074342.2629716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T07:43:42","name":"[V3] DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626074342.2629716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112758,"url":"https://patchwork.plctlab.org/api/1.2/patches/112758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626081155.2865595-1-juzhe.zhong@rivai.ai/","msgid":"<20230626081155.2865595-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T08:11:55","name":"[V2] GIMPLE_FOLD: Fix gimple fold for LEN_{MASK}_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626081155.2865595-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112778,"url":"https://patchwork.plctlab.org/api/1.2/patches/112778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626085417.1357574-1-hongtao.liu@intel.com/","msgid":"<20230626085417.1357574-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T08:54:17","name":"Issue a warning for conversion between short and __bf16 under TARGET_AVX512BF16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626085417.1357574-1-hongtao.liu@intel.com/mbox/"},{"id":112815,"url":"https://patchwork.plctlab.org/api/1.2/patches/112815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093656.502976-1-pan2.li@intel.com/","msgid":"<20230626093656.502976-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-26T09:36:56","name":"[v1] RISC-V: Remove duplicated extern function_base decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093656.502976-1-pan2.li@intel.com/mbox/"},{"id":112820,"url":"https://patchwork.plctlab.org/api/1.2/patches/112820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093846.3006718-1-juzhe.zhong@rivai.ai/","msgid":"<20230626093846.3006718-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T09:38:46","name":"[V2] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093846.3006718-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112840,"url":"https://patchwork.plctlab.org/api/1.2/patches/112840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626104303.3098270-1-juzhe.zhong@rivai.ai/","msgid":"<20230626104303.3098270-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T10:43:03","name":"Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626104303.3098270-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112850,"url":"https://patchwork.plctlab.org/api/1.2/patches/112850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626110223.D451938582A4@sourceware.org/","msgid":"<20230626110223.D451938582A4@sourceware.org>","list_archive_url":null,"date":"2023-06-26T11:01:39","name":"tree-optimization/110392 - ICE with predicate analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626110223.D451938582A4@sourceware.org/mbox/"},{"id":112889,"url":"https://patchwork.plctlab.org/api/1.2/patches/112889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt352ee8qx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T11:57:42","name":"vect: Cost intermediate conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt352ee8qx.fsf@arm.com/mbox/"},{"id":112893,"url":"https://patchwork.plctlab.org/api/1.2/patches/112893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626120429.3403256-1-juzhe.zhong@rivai.ai/","msgid":"<20230626120429.3403256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T12:04:29","name":"[V3] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626120429.3403256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112898,"url":"https://patchwork.plctlab.org/api/1.2/patches/112898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121826.8030D385772D@sourceware.org/","msgid":"<20230626121826.8030D385772D@sourceware.org>","list_archive_url":null,"date":"2023-06-26T12:17:28","name":"tree-optimization/110381 - preserve SLP permutation with in-order reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121826.8030D385772D@sourceware.org/mbox/"},{"id":112900,"url":"https://patchwork.plctlab.org/api/1.2/patches/112900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121804.110219-1-juzhe.zhong@rivai.ai/","msgid":"<20230626121804.110219-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T12:18:04","name":"[V2] RISC-V: Support const vector expansion with step vector with base != 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121804.110219-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112955,"url":"https://patchwork.plctlab.org/api/1.2/patches/112955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com/","msgid":"<98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-06-26T13:55:48","name":"aarch64: Remove architecture dependencies from intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com/mbox/"},{"id":112957,"url":"https://patchwork.plctlab.org/api/1.2/patches/112957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9ef49e-9f22-cb6c-1914-3b30f6e33758@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T14:02:32","name":"[COMMITTED] PR tree-optimization/110251 - Avoid redundant GORI calcuations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9ef49e-9f22-cb6c-1914-3b30f6e33758@redhat.com/mbox/"},{"id":112973,"url":"https://patchwork.plctlab.org/api/1.2/patches/112973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com/","msgid":"<1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-06-26T14:25:25","name":"[committed] docs: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com/mbox/"},{"id":112976,"url":"https://patchwork.plctlab.org/api/1.2/patches/112976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com/","msgid":"<3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com>","list_archive_url":null,"date":"2023-06-26T14:26:58","name":"match.pd: Use element_mode instead of TYPE_MODE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com/mbox/"},{"id":112996,"url":"https://patchwork.plctlab.org/api/1.2/patches/112996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626150230.2483991-1-christophe.lyon@linaro.org/","msgid":"<20230626150230.2483991-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-26T15:02:30","name":"arm: Fix MVE intrinsics support with LTO (PR target/110268)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626150230.2483991-1-christophe.lyon@linaro.org/mbox/"},{"id":113015,"url":"https://patchwork.plctlab.org/api/1.2/patches/113015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153423.42763-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230626153423.42763-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-26T15:34:23","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153423.42763-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113016,"url":"https://patchwork.plctlab.org/api/1.2/patches/113016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153454.42824-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230626153454.42824-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-26T15:34:54","name":"[2/2] AArch64: New RTL for ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153454.42824-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113043,"url":"https://patchwork.plctlab.org/api/1.2/patches/113043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJm82eCPnJ4r8nrP@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-26T16:29:13","name":"Fix profile of forwardes produced by cd-dce","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJm82eCPnJ4r8nrP@kam.mff.cuni.cz/mbox/"},{"id":113047,"url":"https://patchwork.plctlab.org/api/1.2/patches/113047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164345.270480-1-jwakely@redhat.com/","msgid":"<20230626164345.270480-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:28","name":"[committed] libstdc++: Qualify calls to debug mode helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164345.270480-1-jwakely@redhat.com/mbox/"},{"id":113048,"url":"https://patchwork.plctlab.org/api/1.2/patches/113048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164350.270495-1-jwakely@redhat.com/","msgid":"<20230626164350.270495-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:46","name":"[committed] libstdc++: Implement P2538R1 ADL-proof std::projected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164350.270495-1-jwakely@redhat.com/mbox/"},{"id":113049,"url":"https://patchwork.plctlab.org/api/1.2/patches/113049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164404.270512-1-jwakely@redhat.com/","msgid":"<20230626164404.270512-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:51","name":"[committed] libstdc++: Fix std::format for pointers [PR110239]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164404.270512-1-jwakely@redhat.com/mbox/"},{"id":113050,"url":"https://patchwork.plctlab.org/api/1.2/patches/113050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164512.11512-1-krebbel@linux.ibm.com/","msgid":"<20230626164512.11512-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-06-26T16:45:12","name":"[Committed] IBM zSystems: Assume symbols without explicit alignment to be ok","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164512.11512-1-krebbel@linux.ibm.com/mbox/"},{"id":113051,"url":"https://patchwork.plctlab.org/api/1.2/patches/113051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUzBG31w-is2RFc-S8fxCv0HBwtakQKoFtbBybuS2F0sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T16:58:22","name":"Go patch committed: Support -fgo-importcfg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUzBG31w-is2RFc-S8fxCv0HBwtakQKoFtbBybuS2F0sw@mail.gmail.com/mbox/"},{"id":113089,"url":"https://patchwork.plctlab.org/api/1.2/patches/113089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc08596b-e2e1-b46c-5697-9e723427ac53@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T18:58:27","name":"RISC-V: Add autovec FP int->float conversion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc08596b-e2e1-b46c-5697-9e723427ac53@gmail.com/mbox/"},{"id":113091,"url":"https://patchwork.plctlab.org/api/1.2/patches/113091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89b515c2-df12-156e-c116-02f711a911d5@gmail.com/","msgid":"<89b515c2-df12-156e-c116-02f711a911d5@gmail.com>","list_archive_url":null,"date":"2023-06-26T18:58:52","name":"RISC-V: Add autovec FP widening/narrowing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89b515c2-df12-156e-c116-02f711a911d5@gmail.com/mbox/"},{"id":113092,"url":"https://patchwork.plctlab.org/api/1.2/patches/113092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f706d9ed-d0d6-8d9b-c515-17efc09a6bd9@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T18:59:10","name":"RISC-V: Add autovect widening/narrowing Integer/FP conversions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f706d9ed-d0d6-8d9b-c515-17efc09a6bd9@gmail.com/mbox/"},{"id":113134,"url":"https://patchwork.plctlab.org/api/1.2/patches/113134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626220737.24643-1-apinski@marvell.com/","msgid":"<20230626220737.24643-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-26T22:07:37","name":"[Committed] docs: Add @cindex for some attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626220737.24643-1-apinski@marvell.com/mbox/"},{"id":113176,"url":"https://patchwork.plctlab.org/api/1.2/patches/113176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627023202.35018-1-apinski@marvell.com/","msgid":"<20230627023202.35018-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-27T02:32:02","name":"Fix __builtin_alloca_with_align_and_max defbuiltin usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627023202.35018-1-apinski@marvell.com/mbox/"},{"id":113187,"url":"https://patchwork.plctlab.org/api/1.2/patches/113187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627032449.37404-1-apinski@marvell.com/","msgid":"<20230627032449.37404-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-27T03:24:49","name":"Mark asm goto with outputs as volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627032449.37404-1-apinski@marvell.com/mbox/"},{"id":113225,"url":"https://patchwork.plctlab.org/api/1.2/patches/113225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627053806.2880955-1-hongtao.liu@intel.com/","msgid":"<20230627053806.2880955-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:38:06","name":"[x86] Refine maskstore patterns with UNSPEC_MASKMOV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627053806.2880955-1-hongtao.liu@intel.com/mbox/"},{"id":113226,"url":"https://patchwork.plctlab.org/api/1.2/patches/113226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz1ha2ik.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T05:38:11","name":"gengtype: Handle braced initialisers in structs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz1ha2ik.fsf@arm.com/mbox/"},{"id":113232,"url":"https://patchwork.plctlab.org/api/1.2/patches/113232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-1-hongtao.liu@intel.com/","msgid":"<20230627055312.2881827-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:53:11","name":"[1/2] Don'\''t issue vzeroupper for vzeroupper call_insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-1-hongtao.liu@intel.com/mbox/"},{"id":113231,"url":"https://patchwork.plctlab.org/api/1.2/patches/113231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-2-hongtao.liu@intel.com/","msgid":"<20230627055312.2881827-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:53:12","name":"[2/2] Make option mvzeroupper independent of optimization level.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-2-hongtao.liu@intel.com/mbox/"},{"id":113236,"url":"https://patchwork.plctlab.org/api/1.2/patches/113236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627060617.2250903-1-pan2.li@intel.com/","msgid":"<20230627060617.2250903-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-27T06:06:17","name":"[v1] RISC-V: Allow rounding mode control for RVV floating-point add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627060617.2250903-1-pan2.li@intel.com/mbox/"},{"id":113237,"url":"https://patchwork.plctlab.org/api/1.2/patches/113237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627061148.24656-1-xuli1@eswincomputing.com/","msgid":"<20230627061148.24656-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-27T06:11:48","name":"Extend streamer_mode_table size to MACHINE_MODE_BITSIZE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627061148.24656-1-xuli1@eswincomputing.com/mbox/"},{"id":113252,"url":"https://patchwork.plctlab.org/api/1.2/patches/113252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627064737.16257-1-juzhe.zhong@rivai.ai/","msgid":"<20230627064737.16257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-27T06:47:37","name":"[V4] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627064737.16257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113293,"url":"https://patchwork.plctlab.org/api/1.2/patches/113293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e12e9bb3-53ab-d5d4-fb86-d431e254153a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T08:13:19","name":"[v7] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e12e9bb3-53ab-d5d4-fb86-d431e254153a@linux.ibm.com/mbox/"},{"id":113329,"url":"https://patchwork.plctlab.org/api/1.2/patches/113329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627094533.C82C713462@imap2.suse-dmz.suse.de/","msgid":"<20230627094533.C82C713462@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-27T09:45:33","name":"Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627094533.C82C713462@imap2.suse-dmz.suse.de/mbox/"},{"id":113381,"url":"https://patchwork.plctlab.org/api/1.2/patches/113381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnqru1VGD-A_cWLoQKjX4UntDrMLw3D49GfWYDK7CYKdg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T12:01:18","name":"[SVE] Fold svdupq to VEC_PERM_EXPR if elements are not constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnqru1VGD-A_cWLoQKjX4UntDrMLw3D49GfWYDK7CYKdg@mail.gmail.com/mbox/"},{"id":113382,"url":"https://patchwork.plctlab.org/api/1.2/patches/113382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120745.3419192-1-poulhies@adacore.com/","msgid":"<20230627120745.3419192-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:07:45","name":"[COMMITTED] ada: Fix expanding container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120745.3419192-1-poulhies@adacore.com/mbox/"},{"id":113388,"url":"https://patchwork.plctlab.org/api/1.2/patches/113388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120758.3419680-1-poulhies@adacore.com/","msgid":"<20230627120758.3419680-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:07:58","name":"[COMMITTED] ada: Update printing container aggregates for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120758.3419680-1-poulhies@adacore.com/mbox/"},{"id":113383,"url":"https://patchwork.plctlab.org/api/1.2/patches/113383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120800.3419785-1-poulhies@adacore.com/","msgid":"<20230627120800.3419785-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:00","name":"[COMMITTED] ada: Plug another loophole in the handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120800.3419785-1-poulhies@adacore.com/mbox/"},{"id":113384,"url":"https://patchwork.plctlab.org/api/1.2/patches/113384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120801.3419890-1-poulhies@adacore.com/","msgid":"<20230627120801.3419890-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:01","name":"[COMMITTED] ada: Plug small loophole in the handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120801.3419890-1-poulhies@adacore.com/mbox/"},{"id":113389,"url":"https://patchwork.plctlab.org/api/1.2/patches/113389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120803.3419993-1-poulhies@adacore.com/","msgid":"<20230627120803.3419993-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:03","name":"[COMMITTED] ada: Fix too late finalization and secondary stack release in iterator loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120803.3419993-1-poulhies@adacore.com/mbox/"},{"id":113385,"url":"https://patchwork.plctlab.org/api/1.2/patches/113385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120805.3420102-1-poulhies@adacore.com/","msgid":"<20230627120805.3420102-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:05","name":"[COMMITTED] ada: Correct the contract of Ada.Text_IO.Get_Line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120805.3420102-1-poulhies@adacore.com/mbox/"},{"id":113392,"url":"https://patchwork.plctlab.org/api/1.2/patches/113392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120807.3420205-1-poulhies@adacore.com/","msgid":"<20230627120807.3420205-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:07","name":"[COMMITTED] ada: Fix incorrect handling of iterator specifications in recent change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120807.3420205-1-poulhies@adacore.com/mbox/"},{"id":113393,"url":"https://patchwork.plctlab.org/api/1.2/patches/113393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120809.3420308-1-poulhies@adacore.com/","msgid":"<20230627120809.3420308-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:09","name":"[COMMITTED] ada: Fix double finalization of case expression in concatenation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120809.3420308-1-poulhies@adacore.com/mbox/"},{"id":113394,"url":"https://patchwork.plctlab.org/api/1.2/patches/113394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120811.3420419-1-poulhies@adacore.com/","msgid":"<20230627120811.3420419-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:11","name":"[COMMITTED] ada: Make the identification of case expressions more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120811.3420419-1-poulhies@adacore.com/mbox/"},{"id":113395,"url":"https://patchwork.plctlab.org/api/1.2/patches/113395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120813.3420523-1-poulhies@adacore.com/","msgid":"<20230627120813.3420523-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:13","name":"[COMMITTED] ada: Fix bad interaction between inlining and thunk generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120813.3420523-1-poulhies@adacore.com/mbox/"},{"id":113396,"url":"https://patchwork.plctlab.org/api/1.2/patches/113396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120815.3420628-1-poulhies@adacore.com/","msgid":"<20230627120815.3420628-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:15","name":"[COMMITTED] ada: Fix build of GNAT tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120815.3420628-1-poulhies@adacore.com/mbox/"},{"id":113426,"url":"https://patchwork.plctlab.org/api/1.2/patches/113426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJrhyTWosoCcEs8V@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-27T13:19:05","name":"Enable ranger for ipa-prop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJrhyTWosoCcEs8V@kam.mff.cuni.cz/mbox/"},{"id":113438,"url":"https://patchwork.plctlab.org/api/1.2/patches/113438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627140924.33604-1-juzhe.zhong@rivai.ai/","msgid":"<20230627140924.33604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-27T14:09:24","name":"RISC-V: Fix bug of pre-calculated const vector mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627140924.33604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113490,"url":"https://patchwork.plctlab.org/api/1.2/patches/113490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAP2b4GPn7Ls+OOn-MeDss4tw1d3M3dRg85jdQN_5VHTE2pBvmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T16:05:40","name":"Basic asm blocks should always be volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAP2b4GPn7Ls+OOn-MeDss4tw1d3M3dRg85jdQN_5VHTE2pBvmg@mail.gmail.com/mbox/"},{"id":113516,"url":"https://patchwork.plctlab.org/api/1.2/patches/113516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com/","msgid":"<013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T17:22:14","name":"[x86] Add cbranchti4 pattern to i386.md (for -m32 compare_by_pieces).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com/mbox/"},{"id":113547,"url":"https://patchwork.plctlab.org/api/1.2/patches/113547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com/","msgid":"<020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T18:40:06","name":"[x86] Fix FAIL of gcc.target/i386/pr78794.c on ia32.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com/mbox/"},{"id":113549,"url":"https://patchwork.plctlab.org/api/1.2/patches/113549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com/","msgid":"<68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com>","list_archive_url":null,"date":"2023-06-27T18:52:01","name":"[V3,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com/mbox/"},{"id":113558,"url":"https://patchwork.plctlab.org/api/1.2/patches/113558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d9a92d$72080150$561803f0$@nextmovesoftware.com/","msgid":"<004001d9a92d$72080150$561803f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T19:27:41","name":"[x86] Tweak ix86_expand_int_compare to use PTEST for vector equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d9a92d$72080150$561803f0$@nextmovesoftware.com/mbox/"},{"id":113623,"url":"https://patchwork.plctlab.org/api/1.2/patches/113623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479E84A7B3B6A8145B4AE469127A@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T21:26:02","name":"Fix collection and processing of autoprofile data for target libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479E84A7B3B6A8145B4AE469127A@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":113649,"url":"https://patchwork.plctlab.org/api/1.2/patches/113649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628015944.112659-1-juzhe.zhong@rivai.ai/","msgid":"<20230628015944.112659-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T01:59:44","name":"[V2] RISC-V: Fix bug of pre-calculated const vector mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628015944.112659-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113676,"url":"https://patchwork.plctlab.org/api/1.2/patches/113676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628025925.135862-1-juzhe.zhong@rivai.ai/","msgid":"<20230628025925.135862-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T02:59:25","name":"RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628025925.135862-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113679,"url":"https://patchwork.plctlab.org/api/1.2/patches/113679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628031011.138575-1-juzhe.zhong@rivai.ai/","msgid":"<20230628031011.138575-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T03:10:11","name":"[V2] RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628031011.138575-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113680,"url":"https://patchwork.plctlab.org/api/1.2/patches/113680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032858.2614753-1-jason@redhat.com/","msgid":"<20230628032858.2614753-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T03:28:58","name":"[pushed] testsuite: std_list handling for { target c++26 }","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032858.2614753-1-jason@redhat.com/mbox/"},{"id":113681,"url":"https://patchwork.plctlab.org/api/1.2/patches/113681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032934.2615167-1-jason@redhat.com/","msgid":"<20230628032934.2615167-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T03:29:34","name":"[pushed] c++: C++26 constexpr cast from void* [PR110344]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032934.2615167-1-jason@redhat.com/mbox/"},{"id":113683,"url":"https://patchwork.plctlab.org/api/1.2/patches/113683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628041512.188243-1-juzhe.zhong@rivai.ai/","msgid":"<20230628041512.188243-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T04:15:12","name":"RISC-V: Support vfwmul.vv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628041512.188243-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113684,"url":"https://patchwork.plctlab.org/api/1.2/patches/113684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628044200.2636996-1-jason@redhat.com/","msgid":"<20230628044200.2636996-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T04:42:00","name":"[pushed] c++: inherited constructor attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628044200.2636996-1-jason@redhat.com/mbox/"},{"id":113685,"url":"https://patchwork.plctlab.org/api/1.2/patches/113685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628071605.203127-1-guojiufu@linux.ibm.com/","msgid":"<20230628071605.203127-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-28T07:16:05","name":"[V3] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628071605.203127-1-guojiufu@linux.ibm.com/mbox/"},{"id":113686,"url":"https://patchwork.plctlab.org/api/1.2/patches/113686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628072247.109808-1-apinski@marvell.com/","msgid":"<20230628072247.109808-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-28T07:22:48","name":"[COMMITTED] Add testcase for PR 110444","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628072247.109808-1-apinski@marvell.com/mbox/"},{"id":113690,"url":"https://patchwork.plctlab.org/api/1.2/patches/113690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628082707.256024-1-juzhe.zhong@rivai.ai/","msgid":"<20230628082707.256024-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T08:27:07","name":"RISC-V: Support vfwmacc combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628082707.256024-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113720,"url":"https://patchwork.plctlab.org/api/1.2/patches/113720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628091331.3400C3858416@sourceware.org/","msgid":"<20230628091331.3400C3858416@sourceware.org>","list_archive_url":null,"date":"2023-06-28T09:12:33","name":"tree-optimization/110443 - prevent SLP splat of gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628091331.3400C3858416@sourceware.org/mbox/"},{"id":113724,"url":"https://patchwork.plctlab.org/api/1.2/patches/113724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-1-christophe.lyon@linaro.org/","msgid":"<20230628092631.3173114-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-28T09:26:30","name":"[1/2,testsuite,arm] : Make nomve_fp_1.c require arm_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-1-christophe.lyon@linaro.org/mbox/"},{"id":113725,"url":"https://patchwork.plctlab.org/api/1.2/patches/113725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-2-christophe.lyon@linaro.org/","msgid":"<20230628092631.3173114-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-28T09:26:31","name":"[2/2,testsuite,arm] : Make mve_fp_fpu[12].c accept single or double precision FPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-2-christophe.lyon@linaro.org/mbox/"},{"id":113739,"url":"https://patchwork.plctlab.org/api/1.2/patches/113739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628094752.332289-1-juzhe.zhong@rivai.ai/","msgid":"<20230628094752.332289-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T09:47:52","name":"[V3] RISC-V: Fix bug of pre-calculated const vector mask for VNx1BI, VNx2BI and VNx4BI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628094752.332289-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113771,"url":"https://patchwork.plctlab.org/api/1.2/patches/113771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628102228.5F11E3857C51@sourceware.org/","msgid":"<20230628102228.5F11E3857C51@sourceware.org>","list_archive_url":null,"date":"2023-06-28T10:21:45","name":"tree-optimization/110434 - avoid ={v} {CLOBBER} from NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628102228.5F11E3857C51@sourceware.org/mbox/"},{"id":113789,"url":"https://patchwork.plctlab.org/api/1.2/patches/113789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJwM98bEqz9tZ8kZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T10:35:35","name":"[v2,RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJwM98bEqz9tZ8kZ@arm.com/mbox/"},{"id":113796,"url":"https://patchwork.plctlab.org/api/1.2/patches/113796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628105209.1879240-1-lili.cui@intel.com/","msgid":"<20230628105209.1879240-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-06-28T10:52:09","name":"x86: Update model values for Alderlake, Rocketlake and Raptorlake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628105209.1879240-1-lili.cui@intel.com/mbox/"},{"id":113809,"url":"https://patchwork.plctlab.org/api/1.2/patches/113809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz1fg764.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-28T11:25:39","name":"[testsuite] tolerate enabled but missing language frontends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz1fg764.fsf@lxoliva.fsfla.org/mbox/"},{"id":113822,"url":"https://patchwork.plctlab.org/api/1.2/patches/113822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628115559.116166-1-juzhe.zhong@rivai.ai/","msgid":"<20230628115559.116166-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T11:55:59","name":"RISC-V: Support vfwnmacc/vfwmsac/vfwnmsac combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628115559.116166-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113826,"url":"https://patchwork.plctlab.org/api/1.2/patches/113826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628123442.E814E385840E@sourceware.org/","msgid":"<20230628123442.E814E385840E@sourceware.org>","list_archive_url":null,"date":"2023-06-28T12:33:59","name":"tree-optimization/110451 - hoist invariant compare after interchange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628123442.E814E385840E@sourceware.org/mbox/"},{"id":113861,"url":"https://patchwork.plctlab.org/api/1.2/patches/113861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628131753.9B5413858C66@sourceware.org/","msgid":"<20230628131753.9B5413858C66@sourceware.org>","list_archive_url":null,"date":"2023-06-28T13:17:09","name":"middle-end/110452 - bad code generation with AVX512 mask splat","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628131753.9B5413858C66@sourceware.org/mbox/"},{"id":113880,"url":"https://patchwork.plctlab.org/api/1.2/patches/113880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4gTZ706kqK1RA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:41:21","name":"[1/19] middle-end ifcvt: Support bitfield lowering of multiple-exit loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4gTZ706kqK1RA@arm.com/mbox/"},{"id":113882,"url":"https://patchwork.plctlab.org/api/1.2/patches/113882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4msITSZSb83WR@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:41:46","name":"[2/19,front-end] C/C++ front-end: add pragma GCC novector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4msITSZSb83WR@arm.com/mbox/"},{"id":113886,"url":"https://patchwork.plctlab.org/api/1.2/patches/113886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5BcegL6zob2rC@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:43:33","name":"[4/19] middle-end: Fix scale_loop_frequencies segfault on multiple-exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5BcegL6zob2rC@arm.com/mbox/"},{"id":113888,"url":"https://patchwork.plctlab.org/api/1.2/patches/113888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5HgBu6Py9c9Z9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:43:58","name":"[5/19] middle-end: Enable bit-field vectorization to work correctly when we'\''re vectoring inside conds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5HgBu6Py9c9Z9@arm.com/mbox/"},{"id":113891,"url":"https://patchwork.plctlab.org/api/1.2/patches/113891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5OtpY61bsCZBR@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:44:26","name":"[6/19] middle-end: Don'\''t enter piecewise expansion if VF is not constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5OtpY61bsCZBR@arm.com/mbox/"},{"id":113894,"url":"https://patchwork.plctlab.org/api/1.2/patches/113894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5W5lP8SjYGPnX@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:44:59","name":"[7/19] middle-end: Refactor vectorizer loop conditionals and separate out IV to new variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5W5lP8SjYGPnX@arm.com/mbox/"},{"id":113896,"url":"https://patchwork.plctlab.org/api/1.2/patches/113896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5eojLVxxEsYpl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:45:30","name":"[8/19] middle-end: updated niters analysis to handle multiple exits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5eojLVxxEsYpl@arm.com/mbox/"},{"id":113898,"url":"https://patchwork.plctlab.org/api/1.2/patches/113898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5j6WOScQKJHZ5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:45:51","name":"[9/19] AArch64 middle-end: refactor vectorizable_comparison to make the main body re-usable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5j6WOScQKJHZ5@arm.com/mbox/"},{"id":113903,"url":"https://patchwork.plctlab.org/api/1.2/patches/113903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5qICwz9HKBa98@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:46:16","name":"[10/19] middle-end: implement vectorizable_early_break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5qICwz9HKBa98@arm.com/mbox/"},{"id":113901,"url":"https://patchwork.plctlab.org/api/1.2/patches/113901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5vgFBUoR6BH4m@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:46:38","name":"[11/19] middle-end: implement code motion for early break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5vgFBUoR6BH4m@arm.com/mbox/"},{"id":113904,"url":"https://patchwork.plctlab.org/api/1.2/patches/113904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw510c3/NpFrqbh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:03","name":"[12/19] middle-end: implement loop peeling and IV updates for early break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw510c3/NpFrqbh@arm.com/mbox/"},{"id":113906,"url":"https://patchwork.plctlab.org/api/1.2/patches/113906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw560TYdHXPFCP0@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:23","name":"[13/19] middle-end testsuite: un-xfail TSVC loops that check for exit control flow vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw560TYdHXPFCP0@arm.com/mbox/"},{"id":113908,"url":"https://patchwork.plctlab.org/api/1.2/patches/113908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6AK5y1ad3p4AB@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:44","name":"[14/19] middle-end testsuite: Add new tests for early break vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6AK5y1ad3p4AB@arm.com/mbox/"},{"id":113911,"url":"https://patchwork.plctlab.org/api/1.2/patches/113911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6GvvJJUSqmXhu@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:10","name":"[15/19] AArch64: Add implementation for vector cbranch for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6GvvJJUSqmXhu@arm.com/mbox/"},{"id":113912,"url":"https://patchwork.plctlab.org/api/1.2/patches/113912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6LhOUJ7LssONs@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:30","name":"[16/19] AArch64 Add optimization for vector != cbranch fed into compare with 0 for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6LhOUJ7LssONs@arm.com/mbox/"},{"id":113907,"url":"https://patchwork.plctlab.org/api/1.2/patches/113907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6SvUWBaXlpQoL@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:58","name":"[17/19] AArch64 Add optimization for vector cbranch combining SVE and Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6SvUWBaXlpQoL@arm.com/mbox/"},{"id":113910,"url":"https://patchwork.plctlab.org/api/1.2/patches/113910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6XxayCjJEfBTw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:49:19","name":"[18/19] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6XxayCjJEfBTw@arm.com/mbox/"},{"id":113909,"url":"https://patchwork.plctlab.org/api/1.2/patches/113909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6i/lre3vnMev/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:50:03","name":"[19/19] Arm: Add MVE cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6i/lre3vnMev/@arm.com/mbox/"},{"id":113913,"url":"https://patchwork.plctlab.org/api/1.2/patches/113913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628135614.846D938313B2@sourceware.org/","msgid":"<20230628135614.846D938313B2@sourceware.org>","list_archive_url":null,"date":"2023-06-28T13:54:53","name":"[vs] tree-optimization/110434 - avoid ={v} {CLOBBER} from NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628135614.846D938313B2@sourceware.org/mbox/"},{"id":113917,"url":"https://patchwork.plctlab.org/api/1.2/patches/113917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628140741.3045618-1-philipp.tomsich@vrull.eu/","msgid":"<20230628140741.3045618-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-06-28T14:07:41","name":"[COMMITTED,PR,110308] cprop_hardreg: fix ORIGINAL_REGNO/REG_ATTRS/REG_POINTER handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628140741.3045618-1-philipp.tomsich@vrull.eu/mbox/"},{"id":113937,"url":"https://patchwork.plctlab.org/api/1.2/patches/113937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bfgUqNRS2Sgffhm6t_pebpnF09YRVRrSGZLrG73tuA3w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T14:34:10","name":"[committed] final+varasm: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bfgUqNRS2Sgffhm6t_pebpnF09YRVRrSGZLrG73tuA3w@mail.gmail.com/mbox/"},{"id":113940,"url":"https://patchwork.plctlab.org/api/1.2/patches/113940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628150948.47843-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230628150948.47843-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-28T15:09:48","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628150948.47843-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113943,"url":"https://patchwork.plctlab.org/api/1.2/patches/113943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628151532.48412-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230628151532.48412-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-28T15:15:32","name":"[2/2] AArch64: New RTL for ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628151532.48412-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113964,"url":"https://patchwork.plctlab.org/api/1.2/patches/113964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155347.2144291-1-ibuclaw@gdcproject.org/","msgid":"<20230628155347.2144291-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-28T15:53:47","name":"[committed] d: Fix d_signed_or_unsigned_type is invoked for vector types (PR110193)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155347.2144291-1-ibuclaw@gdcproject.org/mbox/"},{"id":113966,"url":"https://patchwork.plctlab.org/api/1.2/patches/113966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155703.2948377-1-tromey@adacore.com/","msgid":"<20230628155703.2948377-1-tromey@adacore.com>","list_archive_url":null,"date":"2023-06-28T15:57:03","name":"Relax type-printer regexp in libstdc++ test suite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155703.2948377-1-tromey@adacore.com/mbox/"},{"id":113974,"url":"https://patchwork.plctlab.org/api/1.2/patches/113974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628165129.2429217-1-ppalka@redhat.com/","msgid":"<20230628165129.2429217-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-28T16:51:29","name":"c++: cache partial template specialization selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628165129.2429217-1-ppalka@redhat.com/mbox/"},{"id":114002,"url":"https://patchwork.plctlab.org/api/1.2/patches/114002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628185357.2326251-1-ibuclaw@gdcproject.org/","msgid":"<20230628185357.2326251-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-28T18:53:57","name":"[committed] d: Fix wrong code-gen when returning structs by value.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628185357.2326251-1-ibuclaw@gdcproject.org/mbox/"},{"id":114050,"url":"https://patchwork.plctlab.org/api/1.2/patches/114050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d4716674-f97e-4e14-9de2-1b8cedc7f3e0-1687985065511@3c-app-gmx-bs03/","msgid":"","list_archive_url":null,"date":"2023-06-28T20:44:25","name":"[part3,committed] Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d4716674-f97e-4e14-9de2-1b8cedc7f3e0-1687985065511@3c-app-gmx-bs03/mbox/"},{"id":114056,"url":"https://patchwork.plctlab.org/api/1.2/patches/114056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJyhfQRGFnzqdjFl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-28T21:09:17","name":"Enable early inlining into always_inline functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJyhfQRGFnzqdjFl@kam.mff.cuni.cz/mbox/"},{"id":114076,"url":"https://patchwork.plctlab.org/api/1.2/patches/114076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212228.013E720418@pchp3.se.axis.com/","msgid":"<20230628212228.013E720418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-28T21:22:27","name":"[committed] CRIS: Don'\''t apply PATTERN to insn before validation (PR 110144)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212228.013E720418@pchp3.se.axis.com/mbox/"},{"id":114077,"url":"https://patchwork.plctlab.org/api/1.2/patches/114077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212324.31DF620418@pchp3.se.axis.com/","msgid":"<20230628212324.31DF620418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-28T21:23:24","name":"[committed] testsuite: check_effective_target_lra: CRIS is LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212324.31DF620418@pchp3.se.axis.com/mbox/"},{"id":114079,"url":"https://patchwork.plctlab.org/api/1.2/patches/114079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8f76zh7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T21:36:36","name":"A couple of va_gc_atomic tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8f76zh7.fsf@arm.com/mbox/"},{"id":114119,"url":"https://patchwork.plctlab.org/api/1.2/patches/114119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014014.3676175-1-pan2.li@intel.com/","msgid":"<20230629014014.3676175-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-29T01:40:14","name":"[v1] RISC-V: Support vfadd static rounding mode by mode switching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014014.3676175-1-pan2.li@intel.com/mbox/"},{"id":114121,"url":"https://patchwork.plctlab.org/api/1.2/patches/114121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014949.1995621-1-lili.cui@intel.com/","msgid":"<20230629014949.1995621-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-06-29T01:49:49","name":"PR gcc/110148:Avoid adding loop-carried ops to long chains","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014949.1995621-1-lili.cui@intel.com/mbox/"},{"id":114136,"url":"https://patchwork.plctlab.org/api/1.2/patches/114136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629025105.1993837-1-lin1.hu@intel.com/","msgid":"<20230629025105.1993837-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-06-29T02:51:05","name":"i386: refactor macros.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629025105.1993837-1-lin1.hu@intel.com/mbox/"},{"id":114166,"url":"https://patchwork.plctlab.org/api/1.2/patches/114166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629060054.617743-1-pan2.li@intel.com/","msgid":"<20230629060054.617743-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-29T06:00:54","name":"[v1] RISC-V: Refactor vxrm_mode attr for type attr equal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629060054.617743-1-pan2.li@intel.com/mbox/"},{"id":114210,"url":"https://patchwork.plctlab.org/api/1.2/patches/114210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081301.965F13858C74@sourceware.org/","msgid":"<20230629081301.965F13858C74@sourceware.org>","list_archive_url":null,"date":"2023-06-29T08:12:18","name":"c/110454 - ICE with bogus TYPE_PRECISION use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081301.965F13858C74@sourceware.org/mbox/"},{"id":114211,"url":"https://patchwork.plctlab.org/api/1.2/patches/114211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081313.797F83858402@sourceware.org/","msgid":"<20230629081313.797F83858402@sourceware.org>","list_archive_url":null,"date":"2023-06-29T08:12:30","name":"middle-end/110461 - pattern applying wrongly to vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081313.797F83858402@sourceware.org/mbox/"},{"id":114263,"url":"https://patchwork.plctlab.org/api/1.2/patches/114263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629095708.BEB40385840A@sourceware.org/","msgid":"<20230629095708.BEB40385840A@sourceware.org>","list_archive_url":null,"date":"2023-06-29T09:56:14","name":"tree-optimization/110460 - fend off vector types from vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629095708.BEB40385840A@sourceware.org/mbox/"},{"id":114273,"url":"https://patchwork.plctlab.org/api/1.2/patches/114273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com/","msgid":"<022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-29T10:49:30","name":"[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com/mbox/"},{"id":114299,"url":"https://patchwork.plctlab.org/api/1.2/patches/114299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629122858.91689385840D@sourceware.org/","msgid":"<20230629122858.91689385840D@sourceware.org>","list_archive_url":null,"date":"2023-06-29T12:28:12","name":"[RFC] target/110456 - avoid loop masking with zero distance dependences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629122858.91689385840D@sourceware.org/mbox/"},{"id":114304,"url":"https://patchwork.plctlab.org/api/1.2/patches/114304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629125430.17021-1-chenglulu@loongson.cn/","msgid":"<20230629125430.17021-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-29T12:54:30","name":"LoongArch: Fix bug in loongarch_emit_stack_tie [PR110484].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629125430.17021-1-chenglulu@loongson.cn/mbox/"},{"id":114337,"url":"https://patchwork.plctlab.org/api/1.2/patches/114337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152009.607619-1-jwakely@redhat.com/","msgid":"<20230629152009.607619-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:19:15","name":"[committed] libstdc++: Do not use off64_t in calls to copy_file_range [PR110462]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152009.607619-1-jwakely@redhat.com/mbox/"},{"id":114333,"url":"https://patchwork.plctlab.org/api/1.2/patches/114333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152130.607676-1-jwakely@redhat.com/","msgid":"<20230629152130.607676-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:20:10","name":"[committed] libstdc++: Fix src/c++20/tzdb.cc for non-constexpr std::mutex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152130.607676-1-jwakely@redhat.com/mbox/"},{"id":114335,"url":"https://patchwork.plctlab.org/api/1.2/patches/114335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152247.3838584-1-ppalka@redhat.com/","msgid":"<20230629152247.3838584-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:22:47","name":"c++: NSDMI instantiation during overload resolution [PR110468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152247.3838584-1-ppalka@redhat.com/mbox/"},{"id":114336,"url":"https://patchwork.plctlab.org/api/1.2/patches/114336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152255.3838604-1-ppalka@redhat.com/","msgid":"<20230629152255.3838604-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:22:55","name":"c++: unpropagated CONSTRUCTOR_MUTABLE_POISON [PR110463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152255.3838604-1-ppalka@redhat.com/mbox/"},{"id":114338,"url":"https://patchwork.plctlab.org/api/1.2/patches/114338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b8V8ug_NZ8C9LSGQYXnmcqLif+MHZoma5xcf-8J0VAOg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-29T15:32:43","name":"[committed] cselib+expr+bitmap: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b8V8ug_NZ8C9LSGQYXnmcqLif+MHZoma5xcf-8J0VAOg@mail.gmail.com/mbox/"},{"id":114367,"url":"https://patchwork.plctlab.org/api/1.2/patches/114367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-1-aldyh@redhat.com/","msgid":"<20230629164833.495003-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-06-29T16:48:33","name":"[COMMITTED] Tidy up the range normalization code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-1-aldyh@redhat.com/mbox/"},{"id":114366,"url":"https://patchwork.plctlab.org/api/1.2/patches/114366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-2-aldyh@redhat.com/","msgid":"<20230629164833.495003-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-06-29T16:48:34","name":"[COMMITTED] Move maybe_set_nonzero_bits() to its only user.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-2-aldyh@redhat.com/mbox/"},{"id":114396,"url":"https://patchwork.plctlab.org/api/1.2/patches/114396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629190330.71131-1-polacek@redhat.com/","msgid":"<20230629190330.71131-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-29T19:03:30","name":"testsuite: Use -fno-report-bug in gcc.dg/plugin/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629190330.71131-1-polacek@redhat.com/mbox/"},{"id":114397,"url":"https://patchwork.plctlab.org/api/1.2/patches/114397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8f6ulzg.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-29T19:06:27","name":"[v2] Control flow redundancy hardening","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8f6ulzg.fsf@lxoliva.fsfla.org/mbox/"},{"id":114419,"url":"https://patchwork.plctlab.org/api/1.2/patches/114419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629200120.169263-1-polacek@redhat.com/","msgid":"<20230629200120.169263-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-29T20:01:20","name":"i386: add -fno-stack-protector to two tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629200120.169263-1-polacek@redhat.com/mbox/"},{"id":114435,"url":"https://patchwork.plctlab.org/api/1.2/patches/114435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ3uUW7I2HcSq8Ml@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-29T20:49:21","name":"Extend ipa-fnsummary to skip __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ3uUW7I2HcSq8Ml@kam.mff.cuni.cz/mbox/"},{"id":114480,"url":"https://patchwork.plctlab.org/api/1.2/patches/114480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com/","msgid":"<2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-29T21:36:07","name":"[ver,3] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com/mbox/"},{"id":114530,"url":"https://patchwork.plctlab.org/api/1.2/patches/114530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-2-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:09","name":"[v1,1/6] LoongArch: Added Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-2-panchenghui@loongson.cn/mbox/"},{"id":114535,"url":"https://patchwork.plctlab.org/api/1.2/patches/114535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-3-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:10","name":"[v1,2/6] LoongArch: Added Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-3-panchenghui@loongson.cn/mbox/"},{"id":114531,"url":"https://patchwork.plctlab.org/api/1.2/patches/114531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-4-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:11","name":"[v1,3/6] LoongArch: Added Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-4-panchenghui@loongson.cn/mbox/"},{"id":114534,"url":"https://patchwork.plctlab.org/api/1.2/patches/114534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-5-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:12","name":"[v1,4/6] LoongArch: Added Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-5-panchenghui@loongson.cn/mbox/"},{"id":114532,"url":"https://patchwork.plctlab.org/api/1.2/patches/114532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-6-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:13","name":"[v1,5/6] LoongArch: Added Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-6-panchenghui@loongson.cn/mbox/"},{"id":114536,"url":"https://patchwork.plctlab.org/api/1.2/patches/114536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-7-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:14","name":"[v1,6/6] LoongArch: Added Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-7-panchenghui@loongson.cn/mbox/"},{"id":114537,"url":"https://patchwork.plctlab.org/api/1.2/patches/114537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630023618.3898001-1-juzhe.zhong@rivai.ai/","msgid":"<20230630023618.3898001-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-30T02:36:18","name":"[V2] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630023618.3898001-1-juzhe.zhong@rivai.ai/mbox/"},{"id":114547,"url":"https://patchwork.plctlab.org/api/1.2/patches/114547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630034847.0D200203F8@pchp3.se.axis.com/","msgid":"<20230630034847.0D200203F8@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-30T03:48:47","name":"PR108672 re-fixed after [PATCH] libstdc++: Synchronize PSTL with upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630034847.0D200203F8@pchp3.se.axis.com/mbox/"},{"id":114560,"url":"https://patchwork.plctlab.org/api/1.2/patches/114560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com/","msgid":"<743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:20:42","name":"tree.h: Hide wi::from_mpz from GENERATOR_FILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com/mbox/"},{"id":114562,"url":"https://patchwork.plctlab.org/api/1.2/patches/114562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB34844532CF2CD395DE99B07E912AA@MN0PR21MB3484.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T05:27:55","name":"Collect both user and kernel events for autofdo tests and autoprofiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB34844532CF2CD395DE99B07E912AA@MN0PR21MB3484.namprd21.prod.outlook.com/mbox/"},{"id":114564,"url":"https://patchwork.plctlab.org/api/1.2/patches/114564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com/","msgid":"<7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:37:53","name":"[1/3] targhooks: Extend legitimate_address_p with code_helper [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com/mbox/"},{"id":114569,"url":"https://patchwork.plctlab.org/api/1.2/patches/114569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com/","msgid":"<10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:46:40","name":"[2/3] ivopts: Call valid_mem_ref_p with code_helper [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com/mbox/"},{"id":114572,"url":"https://patchwork.plctlab.org/api/1.2/patches/114572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com/","msgid":"<62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:57:13","name":"[3/3] rs6000: Teach legitimate_address_p about LEN_{LOAD, STORE} [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com/mbox/"},{"id":114590,"url":"https://patchwork.plctlab.org/api/1.2/patches/114590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630063521.796C5138F8@imap2.suse-dmz.suse.de/","msgid":"<20230630063521.796C5138F8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-30T06:35:19","name":"tree-optimization/110381 - fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630063521.796C5138F8@imap2.suse-dmz.suse.de/mbox/"},{"id":114601,"url":"https://patchwork.plctlab.org/api/1.2/patches/114601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com/","msgid":"<016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-30T07:29:14","name":"[x86] Add STV support for DImode and SImode rotations by constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com/mbox/"},{"id":114610,"url":"https://patchwork.plctlab.org/api/1.2/patches/114610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8f5uzob.fsf@euler.schwinge.homeip.net/","msgid":"<87v8f5uzob.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-30T08:23:00","name":"LTO: Capture '\''lto_file_decl_data *file_data'\'' in '\''class lto_input_block'\'' (was: [PATCH v3] Streamer: Fix out of range memory access of machine mode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8f5uzob.fsf@euler.schwinge.homeip.net/mbox/"},{"id":114611,"url":"https://patchwork.plctlab.org/api/1.2/patches/114611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630082611.112557-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230630082611.112557-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-30T08:26:11","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630082611.112557-1-oluwatamilore.adebayo@arm.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-06/mbox/"},{"id":25,"url":"https://patchwork.plctlab.org/api/1.2/bundles/25/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-07/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-07","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":114788,"url":"https://patchwork.plctlab.org/api/1.2/patches/114788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-1-dmalcolm@redhat.com/","msgid":"<20230630155409.183039-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-30T15:54:08","name":"[pushed,1/2] jit: avoid using __vector in testcase [PR110466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-1-dmalcolm@redhat.com/mbox/"},{"id":114789,"url":"https://patchwork.plctlab.org/api/1.2/patches/114789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-2-dmalcolm@redhat.com/","msgid":"<20230630155409.183039-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-30T15:54:09","name":"[pushed,2/2] jit.exp: handle dwarf version mismatch in jit-check-debug-info [PR110466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-2-dmalcolm@redhat.com/mbox/"},{"id":114858,"url":"https://patchwork.plctlab.org/api/1.2/patches/114858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55d42cc902dfba9a0ae5fd5f670c535afb3f24e.1688151381.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:28","name":"[1/7] Fix up merge/formatting errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55d42cc902dfba9a0ae5fd5f670c535afb3f24e.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114859,"url":"https://patchwork.plctlab.org/api/1.2/patches/114859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6d794fe1b6225f56be6a89e1df37ed4eebfa5a7.1688151381.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:29","name":"[2/7] OpenMP: OpenMP 5.2 semantics for pointers with unmapped target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6d794fe1b6225f56be6a89e1df37ed4eebfa5a7.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114864,"url":"https://patchwork.plctlab.org/api/1.2/patches/114864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com/","msgid":"<32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:30","name":"[3/7] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114861,"url":"https://patchwork.plctlab.org/api/1.2/patches/114861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com/","msgid":"<61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:31","name":"[4/7] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114866,"url":"https://patchwork.plctlab.org/api/1.2/patches/114866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com/","msgid":"<1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:32","name":"[5/7] OpenMP: lvalue parsing for map clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114867,"url":"https://patchwork.plctlab.org/api/1.2/patches/114867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6878a9a33a285142f5314d8c5ddba744eccae3b.1688151382.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:33","name":"[6/7] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6878a9a33a285142f5314d8c5ddba744eccae3b.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114865,"url":"https://patchwork.plctlab.org/api/1.2/patches/114865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com/","msgid":"<5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:34","name":"[7/7] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114868,"url":"https://patchwork.plctlab.org/api/1.2/patches/114868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com/","msgid":"<57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T19:26:35","name":"[V4,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com/mbox/"},{"id":114873,"url":"https://patchwork.plctlab.org/api/1.2/patches/114873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630201637.766018-1-jwakely@redhat.com/","msgid":"<20230630201637.766018-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-30T20:15:54","name":"libstdc++: Enable OpenMP 5.0 pragmas in PSTL headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630201637.766018-1-jwakely@redhat.com/mbox/"},{"id":114910,"url":"https://patchwork.plctlab.org/api/1.2/patches/114910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630225914.620150-1-lhyatt@gmail.com/","msgid":"<20230630225914.620150-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-06-30T22:59:14","name":"c-family: Implement pragma_lex () for preprocess-only mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630225914.620150-1-lhyatt@gmail.com/mbox/"},{"id":114925,"url":"https://patchwork.plctlab.org/api/1.2/patches/114925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630233315.212700-1-vineetg@rivosinc.com/","msgid":"<20230630233315.212700-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-30T23:33:15","name":"RISC-V: improve codegen for repeating large constants [3]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630233315.212700-1-vineetg@rivosinc.com/mbox/"},{"id":114932,"url":"https://patchwork.plctlab.org/api/1.2/patches/114932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39733dc4b96c263db0e75b69c293e2654e2b7e5.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-01T00:58:39","name":"[ver,2] rs6000, __builtin_set_fpscr_rn add retrun value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39733dc4b96c263db0e75b69c293e2654e2b7e5.camel@us.ibm.com/mbox/"},{"id":114941,"url":"https://patchwork.plctlab.org/api/1.2/patches/114941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+dYsxW2YQrtz+A@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:28:34","name":"[v3,1/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+dYsxW2YQrtz+A@Thaum.localdomain/mbox/"},{"id":114942,"url":"https://patchwork.plctlab.org/api/1.2/patches/114942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+duCoetIZP3/mg@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:30:00","name":"[v3,2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+duCoetIZP3/mg@Thaum.localdomain/mbox/"},{"id":114943,"url":"https://patchwork.plctlab.org/api/1.2/patches/114943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+d3TmY/AADod0X@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:30:37","name":"[v3,3/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+d3TmY/AADod0X@Thaum.localdomain/mbox/"},{"id":114959,"url":"https://patchwork.plctlab.org/api/1.2/patches/114959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67OcE1s+SkHUjyaSa0NxziY68xmzoXtoj5BEfEVmxLifPw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-01T05:21:25","name":"lto: Bypass assembler when generating LTO object files. & libiberty: lto: Addition of .symtab in elf file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67OcE1s+SkHUjyaSa0NxziY68xmzoXtoj5BEfEVmxLifPw@mail.gmail.com/mbox/"},{"id":115012,"url":"https://patchwork.plctlab.org/api/1.2/patches/115012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-1-apinski@marvell.com/","msgid":"<20230701082216.299104-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T08:22:15","name":"[1/2] Fix PR 110487: invalid signed boolean value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-1-apinski@marvell.com/mbox/"},{"id":115013,"url":"https://patchwork.plctlab.org/api/1.2/patches/115013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-2-apinski@marvell.com/","msgid":"<20230701082216.299104-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T08:22:16","name":"[2/2] PR 110487: `(a !=/== CST1 ? CST2 : CST3)` pattern for type safety","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-2-apinski@marvell.com/mbox/"},{"id":115020,"url":"https://patchwork.plctlab.org/api/1.2/patches/115020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-2-manolis.tsamis@vrull.eu/","msgid":"<20230701092413.2488806-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-01T09:24:12","name":"[1/2] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-2-manolis.tsamis@vrull.eu/mbox/"},{"id":115021,"url":"https://patchwork.plctlab.org/api/1.2/patches/115021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-3-manolis.tsamis@vrull.eu/","msgid":"<20230701092413.2488806-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-01T09:24:13","name":"[2/2] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-3-manolis.tsamis@vrull.eu/mbox/"},{"id":115028,"url":"https://patchwork.plctlab.org/api/1.2/patches/115028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKAJV9rjbWo3XFWb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-01T11:09:11","name":"Fix profile updates in copy-header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKAJV9rjbWo3XFWb@kam.mff.cuni.cz/mbox/"},{"id":115041,"url":"https://patchwork.plctlab.org/api/1.2/patches/115041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701141410.2891380-1-ibuclaw@gdcproject.org/","msgid":"<20230701141410.2891380-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T14:14:10","name":"[GCC,11,committed] d: Fix ICE in setValue, at d/dmd/dinterpret.c:7013","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701141410.2891380-1-ibuclaw@gdcproject.org/mbox/"},{"id":115050,"url":"https://patchwork.plctlab.org/api/1.2/patches/115050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701155556.2966102-1-ibuclaw@gdcproject.org/","msgid":"<20230701155556.2966102-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T15:55:56","name":"[committed] d: Don'\''t generate code that throws exceptions when compiling with `-fno-exceptions'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701155556.2966102-1-ibuclaw@gdcproject.org/mbox/"},{"id":115052,"url":"https://patchwork.plctlab.org/api/1.2/patches/115052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701161831.93249-1-iain@sandoe.co.uk/","msgid":"<20230701161831.93249-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-01T16:18:31","name":"[pushed] libphobos, testsuite: Disable forkgc2 on Darwin [PR103944]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701161831.93249-1-iain@sandoe.co.uk/mbox/"},{"id":115055,"url":"https://patchwork.plctlab.org/api/1.2/patches/115055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp/","msgid":"<6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp>","list_archive_url":null,"date":"2023-07-01T17:19:03","name":"[1/2] xtensa: Fix missing mode warning in \"*eqne_INT_MIN\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp/mbox/"},{"id":115056,"url":"https://patchwork.plctlab.org/api/1.2/patches/115056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9dd8d5c-14d2-cfb8-d0e1-35b14a8eb4cb@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-07-01T17:20:08","name":"[2/2] xtensa: The use of CLAMPS instruction also requires TARGET_MINMAX, as well as TARGET_CLAMPS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9dd8d5c-14d2-cfb8-d0e1-35b14a8eb4cb@yahoo.co.jp/mbox/"},{"id":115060,"url":"https://patchwork.plctlab.org/api/1.2/patches/115060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701212840.330022-1-apinski@marvell.com/","msgid":"<20230701212840.330022-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T21:28:40","name":"Use chain_next on eh_landing_pad_d for GTY (PR middle-end/110510)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701212840.330022-1-apinski@marvell.com/mbox/"},{"id":115064,"url":"https://patchwork.plctlab.org/api/1.2/patches/115064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701232147.3265358-1-ibuclaw@gdcproject.org/","msgid":"<20230701232147.3265358-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T23:21:47","name":"[committed] d: Fix accesses of immutable arrays using constant index still bounds checked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701232147.3265358-1-ibuclaw@gdcproject.org/mbox/"},{"id":115067,"url":"https://patchwork.plctlab.org/api/1.2/patches/115067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702014404.3398624-1-ibuclaw@gdcproject.org/","msgid":"<20230702014404.3398624-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T01:44:04","name":"[committed] d: Fix core.volatile.volatileLoad discarded if result is unused","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702014404.3398624-1-ibuclaw@gdcproject.org/mbox/"},{"id":115079,"url":"https://patchwork.plctlab.org/api/1.2/patches/115079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702102242.56435-1-iain@sandoe.co.uk/","msgid":"<20230702102242.56435-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-02T10:22:42","name":"libphobos: Handle Darwin Arm and AArch64 in fibre context asm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702102242.56435-1-iain@sandoe.co.uk/mbox/"},{"id":115094,"url":"https://patchwork.plctlab.org/api/1.2/patches/115094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702135601.3632320-1-ibuclaw@gdcproject.org/","msgid":"<20230702135601.3632320-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T13:56:01","name":"[committed] d: Add testcase from PR108962","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702135601.3632320-1-ibuclaw@gdcproject.org/mbox/"},{"id":115095,"url":"https://patchwork.plctlab.org/api/1.2/patches/115095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702142641.21363-1-iain@sandoe.co.uk/","msgid":"<20230702142641.21363-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-02T14:26:41","name":"[pushed] Darwin, Objective-C: Support -fconstant-cfstrings [PR108743].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702142641.21363-1-iain@sandoe.co.uk/mbox/"},{"id":115099,"url":"https://patchwork.plctlab.org/api/1.2/patches/115099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKGPdiAZUtNk3yqa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-02T14:53:42","name":"tree-ssa-math-opts: Fix up ICE in match_uaddc_usubc [PR110508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKGPdiAZUtNk3yqa@tucnak/mbox/"},{"id":115106,"url":"https://patchwork.plctlab.org/api/1.2/patches/115106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-3-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:09","name":"[v7,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-3-ben.boeckel@kitware.com/mbox/"},{"id":115102,"url":"https://patchwork.plctlab.org/api/1.2/patches/115102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-4-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:10","name":"[v7,3/4] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-4-ben.boeckel@kitware.com/mbox/"},{"id":115104,"url":"https://patchwork.plctlab.org/api/1.2/patches/115104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-5-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:11","name":"[v7,4/4] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-5-ben.boeckel@kitware.com/mbox/"},{"id":115150,"url":"https://patchwork.plctlab.org/api/1.2/patches/115150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe43f0e9-8051-4903-8088-e099f9f12528-1688330335546@3c-app-gmx-bs45/","msgid":"","list_archive_url":null,"date":"2023-07-02T20:38:55","name":"Fortran: fixes for procedures with ALLOCATABLE,INTENT(OUT) arguments [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe43f0e9-8051-4903-8088-e099f9f12528-1688330335546@3c-app-gmx-bs45/mbox/"},{"id":115161,"url":"https://patchwork.plctlab.org/api/1.2/patches/115161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702232339.3957011-1-ibuclaw@gdcproject.org/","msgid":"<20230702232339.3957011-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T23:23:39","name":"[committed] d: Fix testcase failure of gdc.dg/Wbuiltin_declaration_mismatch2.d.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702232339.3957011-1-ibuclaw@gdcproject.org/mbox/"},{"id":115163,"url":"https://patchwork.plctlab.org/api/1.2/patches/115163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703011753.18876-1-kmatsui@cs.washington.edu/","msgid":"<20230703011753.18876-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T01:17:53","name":"libstdc++: use __is_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703011753.18876-1-kmatsui@cs.washington.edu/mbox/"},{"id":115166,"url":"https://patchwork.plctlab.org/api/1.2/patches/115166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703021500.165265-1-juzhe.zhong@rivai.ai/","msgid":"<20230703021500.165265-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T02:15:00","name":"[V6] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703021500.165265-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115172,"url":"https://patchwork.plctlab.org/api/1.2/patches/115172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com/","msgid":"<90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T02:57:58","name":"[2/9,v2] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER && gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com/mbox/"},{"id":115173,"url":"https://patchwork.plctlab.org/api/1.2/patches/115173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com/","msgid":"<06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T02:58:30","name":"[3/9,v2] vect: Adjust vectorizable_load costing on VMAT_INVARIANT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com/mbox/"},{"id":115174,"url":"https://patchwork.plctlab.org/api/1.2/patches/115174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0313117-cfd0-ff85-09eb-25cc5cf35dee@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T03:01:04","name":"[5/9,v2] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0313117-cfd0-ff85-09eb-25cc5cf35dee@linux.ibm.com/mbox/"},{"id":115176,"url":"https://patchwork.plctlab.org/api/1.2/patches/115176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com/","msgid":"<67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T03:06:27","name":"[9/9,v2] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com/mbox/"},{"id":115185,"url":"https://patchwork.plctlab.org/api/1.2/patches/115185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703040744.258283-1-juzhe.zhong@rivai.ai/","msgid":"<20230703040744.258283-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T04:07:44","name":"Middle-end: Change order of LEN_MASK_LOAD/LEN_MASK_STORE arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703040744.258283-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115197,"url":"https://patchwork.plctlab.org/api/1.2/patches/115197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com/","msgid":"<08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T06:30:01","name":"[rs6000] Extract the element in dword0 by mfvsrd and shift/mask [PR110331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com/mbox/"},{"id":115199,"url":"https://patchwork.plctlab.org/api/1.2/patches/115199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072307.9E9D73858438@sourceware.org/","msgid":"<20230703072307.9E9D73858438@sourceware.org>","list_archive_url":null,"date":"2023-07-03T07:22:23","name":"tree-optimization/110506 - bogus non-zero mask in CCP for vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072307.9E9D73858438@sourceware.org/mbox/"},{"id":115200,"url":"https://patchwork.plctlab.org/api/1.2/patches/115200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072403.17BB83858C1F@sourceware.org/","msgid":"<20230703072403.17BB83858C1F@sourceware.org>","list_archive_url":null,"date":"2023-07-03T07:22:36","name":"tree-optimization/110506 - ICE in pattern recog with TYPE_PRECISION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072403.17BB83858C1F@sourceware.org/mbox/"},{"id":115211,"url":"https://patchwork.plctlab.org/api/1.2/patches/115211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703080805.1297008-1-pan2.li@intel.com/","msgid":"<20230703080805.1297008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-03T08:08:05","name":"[v1] RISC-V: Fix one typo of FRM dynamic definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703080805.1297008-1-pan2.li@intel.com/mbox/"},{"id":115234,"url":"https://patchwork.plctlab.org/api/1.2/patches/115234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs65uzvw.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T09:07:31","name":"aarch64: Fix vector-to-vector vec_extract","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs65uzvw.fsf@arm.com/mbox/"},{"id":115236,"url":"https://patchwork.plctlab.org/api/1.2/patches/115236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091026.305277-1-juzhe.zhong@rivai.ai/","msgid":"<20230703091026.305277-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T09:10:26","name":"[V2] Middle-end: Change order of LEN_MASK_LOAD/LEN_MASK_STORE arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091026.305277-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115237,"url":"https://patchwork.plctlab.org/api/1.2/patches/115237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091141.34764-1-kmatsui@cs.washington.edu/","msgid":"<20230703091141.34764-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:11:40","name":"[1/2] c++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091141.34764-1-kmatsui@cs.washington.edu/mbox/"},{"id":115238,"url":"https://patchwork.plctlab.org/api/1.2/patches/115238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-1-kmatsui@cs.washington.edu/","msgid":"<20230703091355.35269-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:13:54","name":"[1/2] c++, libstdc++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-1-kmatsui@cs.washington.edu/mbox/"},{"id":115239,"url":"https://patchwork.plctlab.org/api/1.2/patches/115239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-2-kmatsui@cs.washington.edu/","msgid":"<20230703091355.35269-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:13:55","name":"[2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-2-kmatsui@cs.washington.edu/mbox/"},{"id":115288,"url":"https://patchwork.plctlab.org/api/1.2/patches/115288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5104f927-d7db-c148-911c-0ca8e783a609@gmail.com/","msgid":"<5104f927-d7db-c148-911c-0ca8e783a609@gmail.com>","list_archive_url":null,"date":"2023-07-03T10:19:22","name":"gimple-isel: Recognize vec_extract pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5104f927-d7db-c148-911c-0ca8e783a609@gmail.com/mbox/"},{"id":115307,"url":"https://patchwork.plctlab.org/api/1.2/patches/115307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703105716.2909864-1-pan2.li@intel.com/","msgid":"<20230703105716.2909864-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-03T10:57:16","name":"[v1] RISC-V: Fix one typo for emit_mode_set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703105716.2909864-1-pan2.li@intel.com/mbox/"},{"id":115311,"url":"https://patchwork.plctlab.org/api/1.2/patches/115311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110742.3134160-1-christoph.muellner@vrull.eu/","msgid":"<20230703110742.3134160-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-03T11:07:42","name":"[v2] RISC-V: Add support for vector crypto extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110742.3134160-1-christoph.muellner@vrull.eu/mbox/"},{"id":115313,"url":"https://patchwork.plctlab.org/api/1.2/patches/115313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110912.15311-1-juzhe.zhong@rivai.ai/","msgid":"<20230703110912.15311-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T11:09:12","name":"[V7] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110912.15311-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115330,"url":"https://patchwork.plctlab.org/api/1.2/patches/115330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703122045.67AB53858D28@sourceware.org/","msgid":"<20230703122045.67AB53858D28@sourceware.org>","list_archive_url":null,"date":"2023-07-03T12:20:00","name":"middle-end/110495 - avoid associating constants with (VL) vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703122045.67AB53858D28@sourceware.org/mbox/"},{"id":115334,"url":"https://patchwork.plctlab.org/api/1.2/patches/115334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703123342.2341414-1-juzhe.zhong@rivai.ai/","msgid":"<20230703123342.2341414-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T12:33:42","name":"[VSETVL,PASS] RISC-V: Optimize local AVL propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703123342.2341414-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115344,"url":"https://patchwork.plctlab.org/api/1.2/patches/115344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703125655.35E62385700B@sourceware.org/","msgid":"<20230703125655.35E62385700B@sourceware.org>","list_archive_url":null,"date":"2023-07-03T12:56:08","name":"tree-optimization/110310 - move vector epilogue disabling to analysis phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703125655.35E62385700B@sourceware.org/mbox/"},{"id":115359,"url":"https://patchwork.plctlab.org/api/1.2/patches/115359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132700.880979-1-poulhies@adacore.com/","msgid":"<20230703132700.880979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:00","name":"[COMMITTED] ada: Fix small inaccuracy in implementation of B.3.3(20/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132700.880979-1-poulhies@adacore.com/mbox/"},{"id":115360,"url":"https://patchwork.plctlab.org/api/1.2/patches/115360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132712.881166-1-poulhies@adacore.com/","msgid":"<20230703132712.881166-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:12","name":"[COMMITTED] ada: Fix discrepancy in expansion of untagged record equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132712.881166-1-poulhies@adacore.com/mbox/"},{"id":115361,"url":"https://patchwork.plctlab.org/api/1.2/patches/115361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132714.881227-1-poulhies@adacore.com/","msgid":"<20230703132714.881227-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:14","name":"[COMMITTED] ada: Fix renaming of predefined equality operator for unchecked union types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132714.881227-1-poulhies@adacore.com/mbox/"},{"id":115393,"url":"https://patchwork.plctlab.org/api/1.2/patches/115393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZEF8Z5fuS-6WjLssJvEPRy8bbyaXT_YFPqHTBMEmGtRQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T14:38:11","name":"[committed] tree+ggc: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZEF8Z5fuS-6WjLssJvEPRy8bbyaXT_YFPqHTBMEmGtRQ@mail.gmail.com/mbox/"},{"id":115425,"url":"https://patchwork.plctlab.org/api/1.2/patches/115425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPju=KM4G1tw0SbGLc5h_dumXhRXyfYW=SdeX77C70UeEv4dcQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T16:02:57","name":"[v2] libstdc++: PSTL dispatch for C++20 range random access iterators [PR110512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPju=KM4G1tw0SbGLc5h_dumXhRXyfYW=SdeX77C70UeEv4dcQ@mail.gmail.com/mbox/"},{"id":115432,"url":"https://patchwork.plctlab.org/api/1.2/patches/115432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com/","msgid":"<9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com>","list_archive_url":null,"date":"2023-07-03T16:52:50","name":"vect: Treat vector widening IFN calls as '\''simple'\'' [PR110436]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com/mbox/"},{"id":115482,"url":"https://patchwork.plctlab.org/api/1.2/patches/115482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703192024.11486-1-iain@sandoe.co.uk/","msgid":"<20230703192024.11486-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-03T19:20:24","name":"[pushed] testsuite, Darwin: Remove an unnecessary flags addition.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703192024.11486-1-iain@sandoe.co.uk/mbox/"},{"id":115494,"url":"https://patchwork.plctlab.org/api/1.2/patches/115494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6de3ece999e215e7ebbbd124af64a39e726006c.1688418868.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T21:33:15","name":"[1/5] OpenMP: Fix \"exit data\" for array sections for ref-to-ptr components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6de3ece999e215e7ebbbd124af64a39e726006c.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115496,"url":"https://patchwork.plctlab.org/api/1.2/patches/115496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7a1870f3b2578939796d7d87532e968a0a9f7be.1688418868.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T21:33:16","name":"[2/5] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7a1870f3b2578939796d7d87532e968a0a9f7be.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115495,"url":"https://patchwork.plctlab.org/api/1.2/patches/115495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com/","msgid":"<2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:17","name":"[3/5] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115497,"url":"https://patchwork.plctlab.org/api/1.2/patches/115497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com/","msgid":"<518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:18","name":"[4/5] OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115498,"url":"https://patchwork.plctlab.org/api/1.2/patches/115498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com/","msgid":"<8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:19","name":"[5/5] OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115503,"url":"https://patchwork.plctlab.org/api/1.2/patches/115503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMmuTO_-n_We6J1k_OXeZAKja9B+7DwkjTrOX6g8NB1ziJWYVg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T22:13:05","name":"libstdc++: Split up pstl/set.cc testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMmuTO_-n_We6J1k_OXeZAKja9B+7DwkjTrOX6g8NB1ziJWYVg@mail.gmail.com/mbox/"},{"id":115509,"url":"https://patchwork.plctlab.org/api/1.2/patches/115509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230702.995484-1-jwakely@redhat.com/","msgid":"<20230703230702.995484-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-03T23:06:32","name":"[committed] libstdc++: Qualify calls to std::_Destroy and _Destroy_aux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230702.995484-1-jwakely@redhat.com/mbox/"},{"id":115510,"url":"https://patchwork.plctlab.org/api/1.2/patches/115510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230828.995791-1-jwakely@redhat.com/","msgid":"<20230703230828.995791-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-03T23:08:13","name":"[committed] libstdc++: Fix synopsis test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230828.995791-1-jwakely@redhat.com/mbox/"},{"id":115529,"url":"https://patchwork.plctlab.org/api/1.2/patches/115529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp/","msgid":"<932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp>","list_archive_url":null,"date":"2023-07-04T00:57:03","name":"xtensa: Use HARD_REG_SET instead of bare integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp/mbox/"},{"id":115530,"url":"https://patchwork.plctlab.org/api/1.2/patches/115530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010629.31B8220418@pchp3.se.axis.com/","msgid":"<20230704010629.31B8220418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-07-04T01:06:29","name":"[committed] dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010629.31B8220418@pchp3.se.axis.com/mbox/"},{"id":115531,"url":"https://patchwork.plctlab.org/api/1.2/patches/115531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010758.8E35120418@pchp3.se.axis.com/","msgid":"<20230704010758.8E35120418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-07-04T01:07:58","name":"[committed] CRIS: Replace unspec CRIS_UNSPEC_SWAP_BITS with rtx bitreverse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010758.8E35120418@pchp3.se.axis.com/mbox/"},{"id":115543,"url":"https://patchwork.plctlab.org/api/1.2/patches/115543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704021832.1580584-1-guojiufu@linux.ibm.com/","msgid":"<20230704021832.1580584-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-04T02:18:32","name":"[V4,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704021832.1580584-1-guojiufu@linux.ibm.com/mbox/"},{"id":115545,"url":"https://patchwork.plctlab.org/api/1.2/patches/115545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704025035.1074040-1-hongtao.liu@intel.com/","msgid":"<20230704025035.1074040-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-04T02:50:35","name":"Break false dependence for vpternlog by inserting vpxor.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704025035.1074040-1-hongtao.liu@intel.com/mbox/"},{"id":115546,"url":"https://patchwork.plctlab.org/api/1.2/patches/115546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704031244.1074834-1-hongyu.wang@intel.com/","msgid":"<20230704031244.1074834-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-07-04T03:12:44","name":"[V2] i386: Inline function with default arch/tune to caller","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704031244.1074834-1-hongyu.wang@intel.com/mbox/"},{"id":115565,"url":"https://patchwork.plctlab.org/api/1.2/patches/115565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704055053.2308713-1-pan2.li@intel.com/","msgid":"<20230704055053.2308713-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T05:50:53","name":"[v1] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704055053.2308713-1-pan2.li@intel.com/mbox/"},{"id":115570,"url":"https://patchwork.plctlab.org/api/1.2/patches/115570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704064227.3432171-1-guojiufu@linux.ibm.com/","msgid":"<20230704064227.3432171-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-04T06:42:27","name":"[V3] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704064227.3432171-1-guojiufu@linux.ibm.com/mbox/"},{"id":115584,"url":"https://patchwork.plctlab.org/api/1.2/patches/115584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704070728.82C0D3858409@sourceware.org/","msgid":"<20230704070728.82C0D3858409@sourceware.org>","list_archive_url":null,"date":"2023-07-04T07:06:44","name":"[v2] middle-end/110495 - avoid associating constants with (VL) vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704070728.82C0D3858409@sourceware.org/mbox/"},{"id":115599,"url":"https://patchwork.plctlab.org/api/1.2/patches/115599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704075320.195407-1-juzhe.zhong@rivai.ai/","msgid":"<20230704075320.195407-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T07:53:20","name":"[V2] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704075320.195407-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115605,"url":"https://patchwork.plctlab.org/api/1.2/patches/115605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080806.2677374-1-pan2.li@intel.com/","msgid":"<20230704080806.2677374-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T08:08:06","name":"[v2] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080806.2677374-1-pan2.li@intel.com/mbox/"},{"id":115607,"url":"https://patchwork.plctlab.org/api/1.2/patches/115607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080929.998656-1-poulhies@adacore.com/","msgid":"<20230704080929.998656-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:29","name":"[COMMITTED] ada: Fix list of inherited subprograms in query for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080929.998656-1-poulhies@adacore.com/mbox/"},{"id":115610,"url":"https://patchwork.plctlab.org/api/1.2/patches/115610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080945.998813-1-poulhies@adacore.com/","msgid":"<20230704080945.998813-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:45","name":"[COMMITTED] ada: Add No_Use_Of_Attribute & No_Use_Of_Pragma to gnat_rm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080945.998813-1-poulhies@adacore.com/mbox/"},{"id":115608,"url":"https://patchwork.plctlab.org/api/1.2/patches/115608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080947.998876-1-poulhies@adacore.com/","msgid":"<20230704080947.998876-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:47","name":"[COMMITTED] ada: Small adjustments to new procedure Expand_Unchecked_Union_Equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080947.998876-1-poulhies@adacore.com/mbox/"},{"id":115609,"url":"https://patchwork.plctlab.org/api/1.2/patches/115609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080950.998976-1-poulhies@adacore.com/","msgid":"<20230704080950.998976-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:50","name":"[COMMITTED] ada: Do not unnecessarily use component-wise loop for slice assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080950.998976-1-poulhies@adacore.com/mbox/"},{"id":115611,"url":"https://patchwork.plctlab.org/api/1.2/patches/115611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704081551.3422387-1-lili.cui@intel.com/","msgid":"<20230704081551.3422387-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-07-04T08:15:51","name":"x86: Enable ENQCMD and UINTR for march=sierraforest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704081551.3422387-1-lili.cui@intel.com/mbox/"},{"id":115619,"url":"https://patchwork.plctlab.org/api/1.2/patches/115619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084045.233AB3858C30@sourceware.org/","msgid":"<20230704084045.233AB3858C30@sourceware.org>","list_archive_url":null,"date":"2023-07-04T08:39:59","name":"tree-optimization/110436 - bogus live/relevant for unused pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084045.233AB3858C30@sourceware.org/mbox/"},{"id":115620,"url":"https://patchwork.plctlab.org/api/1.2/patches/115620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084158.2976523-1-pan2.li@intel.com/","msgid":"<20230704084158.2976523-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T08:41:58","name":"[v1] RISC-V: Refine the insn pattern of fsrm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084158.2976523-1-pan2.li@intel.com/mbox/"},{"id":115623,"url":"https://patchwork.plctlab.org/api/1.2/patches/115623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB863509CEB9A5B18AD42D986EE12EA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-04T08:51:00","name":"Vect: avoid using uninitialized variable (PR tree-optimization/110531)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB863509CEB9A5B18AD42D986EE12EA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":115633,"url":"https://patchwork.plctlab.org/api/1.2/patches/115633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704091554.7C7393857734@sourceware.org/","msgid":"<20230704091554.7C7393857734@sourceware.org>","list_archive_url":null,"date":"2023-07-04T09:14:43","name":"tree-optimization/110228 - avoid undefs in ifcombine more thoroughly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704091554.7C7393857734@sourceware.org/mbox/"},{"id":115679,"url":"https://patchwork.plctlab.org/api/1.2/patches/115679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095048.1065139-1-jie.mei@oss.cipunited.com/","msgid":"<20230704095048.1065139-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-07-04T09:50:48","name":"MIPS: Adjust mips16e2 related tests for ifcvt costing changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095048.1065139-1-jie.mei@oss.cipunited.com/mbox/"},{"id":115680,"url":"https://patchwork.plctlab.org/api/1.2/patches/115680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095406.3518145-1-juzhe.zhong@rivai.ai/","msgid":"<20230704095406.3518145-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T09:54:06","name":"[V3] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095406.3518145-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115696,"url":"https://patchwork.plctlab.org/api/1.2/patches/115696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103249.2396A385771F@sourceware.org/","msgid":"<20230704103249.2396A385771F@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:32:06","name":"tree-optimization/110376 - testcase for fixed bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103249.2396A385771F@sourceware.org/mbox/"},{"id":115697,"url":"https://patchwork.plctlab.org/api/1.2/patches/115697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103538.79F723857835@sourceware.org/","msgid":"<20230704103538.79F723857835@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:34:53","name":"Use mark_ssa_maybe_undefs in PHI-OPT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103538.79F723857835@sourceware.org/mbox/"},{"id":115698,"url":"https://patchwork.plctlab.org/api/1.2/patches/115698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103635.3A397385772E@sourceware.org/","msgid":"<20230704103635.3A397385772E@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:35:06","name":"Remove unnecessary check on scalar_niter == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103635.3A397385772E@sourceware.org/mbox/"},{"id":115741,"url":"https://patchwork.plctlab.org/api/1.2/patches/115741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704121714.BE6E73856DDC@sourceware.org/","msgid":"<20230704121714.BE6E73856DDC@sourceware.org>","list_archive_url":null,"date":"2023-07-04T12:16:31","name":"tree-optimization/110491 - PHI-OPT and undefs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704121714.BE6E73856DDC@sourceware.org/mbox/"},{"id":115745,"url":"https://patchwork.plctlab.org/api/1.2/patches/115745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704122611.4128668-1-pan2.li@intel.com/","msgid":"<20230704122611.4128668-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T12:26:11","name":"[v1] RISC-V: Use FRM_DYN when add the rounding mode operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704122611.4128668-1-pan2.li@intel.com/mbox/"},{"id":115749,"url":"https://patchwork.plctlab.org/api/1.2/patches/115749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704124332.3961261-1-juzhe.zhong@rivai.ai/","msgid":"<20230704124332.3961261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T12:43:32","name":"[V4] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704124332.3961261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115761,"url":"https://patchwork.plctlab.org/api/1.2/patches/115761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704131000.4031672-1-juzhe.zhong@rivai.ai/","msgid":"<20230704131000.4031672-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T13:10:00","name":"[V5] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704131000.4031672-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115807,"url":"https://patchwork.plctlab.org/api/1.2/patches/115807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704140536.680044-1-pan2.li@intel.com/","msgid":"<20230704140536.680044-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T14:05:36","name":"[v3] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704140536.680044-1-pan2.li@intel.com/mbox/"},{"id":115840,"url":"https://patchwork.plctlab.org/api/1.2/patches/115840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qjvfp1.fsf@euler.schwinge.homeip.net/","msgid":"<87h6qjvfp1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-04T15:50:34","name":"'\''unsigned int len'\'' field in '\''libcpp/include/symtab.h:struct ht_identifier'\'' (was: [PATCH] pch: Fix streaming of strings with embedded null bytes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qjvfp1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115845,"url":"https://patchwork.plctlab.org/api/1.2/patches/115845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlnvfb8.fsf@euler.schwinge.homeip.net/","msgid":"<87edlnvfb8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-04T15:58:51","name":"GGC: Remove unused '\''bool is_string'\'' arguments to '\''ggc_pch_{count,alloc,write}_object'\'' (was: RFA - Remove GC zone allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlnvfb8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115850,"url":"https://patchwork.plctlab.org/api/1.2/patches/115850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704162532.205035-1-vultkayn@gcc.gnu.org/","msgid":"<20230704162532.205035-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-04T16:25:35","name":"analyzer: Add support of placement new and improved operator new [PR105948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704162532.205035-1-vultkayn@gcc.gnu.org/mbox/"},{"id":115882,"url":"https://patchwork.plctlab.org/api/1.2/patches/115882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f73371d732237ed54ede44b7bd88624@ispras.ru/","msgid":"<8f73371d732237ed54ede44b7bd88624@ispras.ru>","list_archive_url":null,"date":"2023-07-04T18:25:00","name":"Generating all-ones zmm needs dep-breaking pxor before ternlog (PR target/110438)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f73371d732237ed54ede44b7bd88624@ispras.ru/mbox/"},{"id":115922,"url":"https://patchwork.plctlab.org/api/1.2/patches/115922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com/","msgid":"<3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com>","list_archive_url":null,"date":"2023-07-05T03:22:58","name":"[rs6000] Skip redundant vector extract if the element is first element of dword0 [PR110429]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com/mbox/"},{"id":115948,"url":"https://patchwork.plctlab.org/api/1.2/patches/115948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064004.1143580-1-jwakely@redhat.com/","msgid":"<20230705064004.1143580-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:39:39","name":"[committed] libstdc++: Add redundant '\''typename'\'' to std::projected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064004.1143580-1-jwakely@redhat.com/mbox/"},{"id":115949,"url":"https://patchwork.plctlab.org/api/1.2/patches/115949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064010.1143604-1-jwakely@redhat.com/","msgid":"<20230705064010.1143604-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:40:05","name":"[committed] libstdc++: Use RAII in std::vector::_M_default_append","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064010.1143604-1-jwakely@redhat.com/mbox/"},{"id":115950,"url":"https://patchwork.plctlab.org/api/1.2/patches/115950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064106.1143618-1-jwakely@redhat.com/","msgid":"<20230705064106.1143618-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:40:11","name":"[committed] libstdc++: Fix std::__uninitialized_default_n for constant evaluation [PR110542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064106.1143618-1-jwakely@redhat.com/mbox/"},{"id":115951,"url":"https://patchwork.plctlab.org/api/1.2/patches/115951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064113.1143661-1-jwakely@redhat.com/","msgid":"<20230705064113.1143661-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:41:07","name":"[committed] libstdc++: Disable std::forward_list tests for C++98 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064113.1143661-1-jwakely@redhat.com/mbox/"},{"id":115952,"url":"https://patchwork.plctlab.org/api/1.2/patches/115952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB86357ECFCF921CF3114FC894E12FA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T06:43:13","name":"Vect: use a small step to calculate induction for the unrolled loop (PR tree-optimization/110449)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB86357ECFCF921CF3114FC894E12FA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":115958,"url":"https://patchwork.plctlab.org/api/1.2/patches/115958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705065808.E438A3858408@sourceware.org/","msgid":"<20230705065808.E438A3858408@sourceware.org>","list_archive_url":null,"date":"2023-07-05T06:57:26","name":"middle-end/110541 - VEC_PERM_EXPR documentation is off","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705065808.E438A3858408@sourceware.org/mbox/"},{"id":115966,"url":"https://patchwork.plctlab.org/api/1.2/patches/115966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705070223.806580-1-pan2.li@intel.com/","msgid":"<20230705070223.806580-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-05T07:02:23","name":"[v4] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705070223.806580-1-pan2.li@intel.com/mbox/"},{"id":115987,"url":"https://patchwork.plctlab.org/api/1.2/patches/115987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkgqvlst.fsf@euler.schwinge.homeip.net/","msgid":"<87bkgqvlst.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T07:50:58","name":"GTY: Explicitly reject '\''string_length'\'' option for (fields in) global variables (was: [PATCH] pch: Fix streaming of strings with embedded null bytes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkgqvlst.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115988,"url":"https://patchwork.plctlab.org/api/1.2/patches/115988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com/","msgid":"<59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com>","list_archive_url":null,"date":"2023-07-05T07:51:34","name":"x86: suppress avx512f-copysign.c testcase for 32-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com/mbox/"},{"id":115994,"url":"https://patchwork.plctlab.org/api/1.2/patches/115994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rbuvljs.fsf@euler.schwinge.homeip.net/","msgid":"<878rbuvljs.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T07:56:23","name":"GTY: Enhance '\''string_length'\'' option documentation (was: '\''unsigned int len'\'' field in '\''libcpp/include/symtab.h:struct ht_identifier'\'' (was: [PATCH] pch: Fix streaming of strings with embedded null bytes))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rbuvljs.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115997,"url":"https://patchwork.plctlab.org/api/1.2/patches/115997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com/","msgid":"<9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com>","list_archive_url":null,"date":"2023-07-05T08:00:23","name":"[1/2] x86: correct / simplify @vec_extract_hi_ and vec_extract_hi_v32qi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com/mbox/"},{"id":115998,"url":"https://patchwork.plctlab.org/api/1.2/patches/115998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3e17c19-0cd4-9d07-bcfc-0312487f029a@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T08:00:55","name":"[2/2] x86: slightly correct / simplify *vec_extractv2ti","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3e17c19-0cd4-9d07-bcfc-0312487f029a@suse.com/mbox/"},{"id":116000,"url":"https://patchwork.plctlab.org/api/1.2/patches/116000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705080852.2249A3858288@sourceware.org/","msgid":"<20230705080852.2249A3858288@sourceware.org>","list_archive_url":null,"date":"2023-07-05T08:08:09","name":"adjust testcase for now happening epilogue vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705080852.2249A3858288@sourceware.org/mbox/"},{"id":116001,"url":"https://patchwork.plctlab.org/api/1.2/patches/116001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6yvkwc.fsf@euler.schwinge.homeip.net/","msgid":"<875y6yvkwc.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T08:10:27","name":"GTY: Clean up obsolete '\''bool needs_cast_p'\'' field of '\''gcc/gengtype.cc:struct walk_type_data'\'' (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6yvkwc.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116002,"url":"https://patchwork.plctlab.org/api/1.2/patches/116002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705081129.92457-1-kito.cheng@sifive.com/","msgid":"<20230705081129.92457-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-05T08:11:29","name":"RISC-V: Handle rouding mode correctly on zfinx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705081129.92457-1-kito.cheng@sifive.com/mbox/"},{"id":116003,"url":"https://patchwork.plctlab.org/api/1.2/patches/116003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873522vkmu.fsf@euler.schwinge.homeip.net/","msgid":"<873522vkmu.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T08:16:09","name":"GTY: Clean up obsolete parametrized structs remnants (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873522vkmu.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116028,"url":"https://patchwork.plctlab.org/api/1.2/patches/116028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635E49C6DC6B89D31D6390FE12FA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T08:46:26","name":"Vect: select small VF for epilog of unrolled loop (PR tree-optimization/110474)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635E49C6DC6B89D31D6390FE12FA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":116030,"url":"https://patchwork.plctlab.org/api/1.2/patches/116030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32b33338-a294-1464-6a97-c77c7465eae6@gmail.com/","msgid":"<32b33338-a294-1464-6a97-c77c7465eae6@gmail.com>","list_archive_url":null,"date":"2023-07-05T09:12:00","name":"RISC-V: Allow variable index for vec_set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32b33338-a294-1464-6a97-c77c7465eae6@gmail.com/mbox/"},{"id":116031,"url":"https://patchwork.plctlab.org/api/1.2/patches/116031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com/","msgid":"<9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com>","list_archive_url":null,"date":"2023-07-05T09:13:12","name":"RISC-V: Support variable index in vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com/mbox/"},{"id":116058,"url":"https://patchwork.plctlab.org/api/1.2/patches/116058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzveu08y.fsf@euler.schwinge.homeip.net/","msgid":"<87jzveu08y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T10:21:49","name":"GTY: Repair '\''enum gty_token'\'', '\''token_names'\'' desynchronization (was: [cxx-conversion] Support garbage-collected C++ templates)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzveu08y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116081,"url":"https://patchwork.plctlab.org/api/1.2/patches/116081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com/","msgid":"<56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-05T11:51:18","name":"rs6000: Don'\''t ICE when generating vector pair load/store insns [PR110411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com/mbox/"},{"id":116122,"url":"https://patchwork.plctlab.org/api/1.2/patches/116122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d53db0b9-80ae-ff06-1bc9-f6884333c934@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T13:00:01","name":"RISC-V: Change truncate to float_truncate in narrowing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d53db0b9-80ae-ff06-1bc9-f6884333c934@gmail.com/mbox/"},{"id":116140,"url":"https://patchwork.plctlab.org/api/1.2/patches/116140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705134147.13325-1-drross@redhat.com/","msgid":"<20230705134147.13325-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-05T13:41:47","name":"match.pd: Implement missed optimization (~X | Y) ^ X -> ~(X & Y) [PR109986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705134147.13325-1-drross@redhat.com/mbox/"},{"id":116146,"url":"https://patchwork.plctlab.org/api/1.2/patches/116146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705135022.245282-1-juzhe.zhong@rivai.ai/","msgid":"<20230705135022.245282-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-05T13:50:22","name":"[v1] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705135022.245282-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116228,"url":"https://patchwork.plctlab.org/api/1.2/patches/116228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bE2GRmO-1Bwe8mRvA_jdBEr=FVE13rdWsNeWTMP-W-7A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T15:32:51","name":"[committed] sched: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bE2GRmO-1Bwe8mRvA_jdBEr=FVE13rdWsNeWTMP-W-7A@mail.gmail.com/mbox/"},{"id":116236,"url":"https://patchwork.plctlab.org/api/1.2/patches/116236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qitk0h.fsf@euler.schwinge.homeip.net/","msgid":"<87h6qitk0h.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:12:30","name":"[v2] GTY: Clean up obsolete parametrized structs remnants (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qitk0h.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116239,"url":"https://patchwork.plctlab.org/api/1.2/patches/116239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705161442.1184446-1-jwakely@redhat.com/","msgid":"<20230705161442.1184446-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T16:14:14","name":"doc: Update my Contributors entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705161442.1184446-1-jwakely@redhat.com/mbox/"},{"id":116238,"url":"https://patchwork.plctlab.org/api/1.2/patches/116238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlmtjwh.fsf@euler.schwinge.homeip.net/","msgid":"<87edlmtjwh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:14:54","name":"GGC, GTY: Tighten up a few things re '\''reorder'\'' option and strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlmtjwh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116245,"url":"https://patchwork.plctlab.org/api/1.2/patches/116245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5watjg1.fsf@euler.schwinge.homeip.net/","msgid":"<87a5watjg1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:24:46","name":"GGC, GTY: No pointer walking for '\''atomic'\'' in PCH '\''gt_pch_note_object'\'' (was: Patch: New GTY ((atomic)) option)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5watjg1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116256,"url":"https://patchwork.plctlab.org/api/1.2/patches/116256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705170136.581584-1-apinski@marvell.com/","msgid":"<20230705170136.581584-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-05T17:01:36","name":"Fix PR 110554: vec lowering introduces scalar signed-boolean:32 comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705170136.581584-1-apinski@marvell.com/mbox/"},{"id":116454,"url":"https://patchwork.plctlab.org/api/1.2/patches/116454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705215151.84788-1-polacek@redhat.com/","msgid":"<20230705215151.84788-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-05T21:51:51","name":"testsuite: fix dwarf2/utf-1.C with DWARF4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705215151.84788-1-polacek@redhat.com/mbox/"},{"id":116459,"url":"https://patchwork.plctlab.org/api/1.2/patches/116459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com/","msgid":"<121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com>","list_archive_url":null,"date":"2023-07-05T23:08:05","name":"[COMMITTED,1/5] Move relation discovery into compute_operand_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com/mbox/"},{"id":116458,"url":"https://patchwork.plctlab.org/api/1.2/patches/116458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc3528ef-a7a6-5250-73b9-ec3897e0387f@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:14","name":"[COMMITTED,2/5] Simplify compute_operand_range for op1 and op2 case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc3528ef-a7a6-5250-73b9-ec3897e0387f@redhat.com/mbox/"},{"id":116460,"url":"https://patchwork.plctlab.org/api/1.2/patches/116460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com/","msgid":"<74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com>","list_archive_url":null,"date":"2023-07-05T23:08:21","name":"[COMMITTED,3/5] Make compute_operand1_range a leaf call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com/mbox/"},{"id":116461,"url":"https://patchwork.plctlab.org/api/1.2/patches/116461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5662c87-368a-f072-3819-b6535baefeb1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:29","name":"[COMMITTED,4/5] Make compute_operand2_range a leaf call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5662c87-368a-f072-3819-b6535baefeb1@redhat.com/mbox/"},{"id":116462,"url":"https://patchwork.plctlab.org/api/1.2/patches/116462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6b8901e-00e9-a30c-0892-aebd98199ee1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:35","name":"[COMMITTED,5/5] Make compute_operand_range a tail call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6b8901e-00e9-a30c-0892-aebd98199ee1@redhat.com/mbox/"},{"id":116463,"url":"https://patchwork.plctlab.org/api/1.2/patches/116463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705232724.631992-1-hjl.tools@gmail.com/","msgid":"<20230705232724.631992-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-05T23:27:24","name":"x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705232724.631992-1-hjl.tools@gmail.com/mbox/"},{"id":116466,"url":"https://patchwork.plctlab.org/api/1.2/patches/116466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011204.3542905-1-hongtao.liu@intel.com/","msgid":"<20230706011204.3542905-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:12:04","name":"Disparage slightly for the alternative which move DFmode between SSE_REGS and GENERAL_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011204.3542905-1-hongtao.liu@intel.com/mbox/"},{"id":116468,"url":"https://patchwork.plctlab.org/api/1.2/patches/116468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-1-hongtao.liu@intel.com/","msgid":"<20230706011816.3543708-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:18:15","name":"[1/2,x86] Add pre_reload splitter to detect fp min/max pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-1-hongtao.liu@intel.com/mbox/"},{"id":116467,"url":"https://patchwork.plctlab.org/api/1.2/patches/116467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-2-hongtao.liu@intel.com/","msgid":"<20230706011816.3543708-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:18:16","name":"[2/2] Adjust rtx_cost for DF/SFmode AND/IOR/XOR/ANDN operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-2-hongtao.liu@intel.com/mbox/"},{"id":116511,"url":"https://patchwork.plctlab.org/api/1.2/patches/116511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706052656.3191422-1-pan2.li@intel.com/","msgid":"<20230706052656.3191422-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-06T05:26:56","name":"[v5] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706052656.3191422-1-pan2.li@intel.com/mbox/"},{"id":116522,"url":"https://patchwork.plctlab.org/api/1.2/patches/116522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706061626.3420739-1-juzhe.zhong@rivai.ai/","msgid":"<20230706061626.3420739-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T06:16:26","name":"VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706061626.3420739-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116523,"url":"https://patchwork.plctlab.org/api/1.2/patches/116523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063712.409891-1-hongyu.wang@intel.com/","msgid":"<20230706063712.409891-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-07-06T06:37:12","name":"i386: Update document for inlining rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063712.409891-1-hongyu.wang@intel.com/mbox/"},{"id":116524,"url":"https://patchwork.plctlab.org/api/1.2/patches/116524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063713.376465-1-zewei.mo@intel.com/","msgid":"<20230706063713.376465-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-06T06:37:13","name":"Initial Granite Rapids D Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063713.376465-1-zewei.mo@intel.com/mbox/"},{"id":116526,"url":"https://patchwork.plctlab.org/api/1.2/patches/116526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065135.3448078-1-juzhe.zhong@rivai.ai/","msgid":"<20230706065135.3448078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T06:51:35","name":"[V2] VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065135.3448078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116527,"url":"https://patchwork.plctlab.org/api/1.2/patches/116527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065501.3C425138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706065501.3C425138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T06:55:00","name":"Fix expectation on gcc.dg/vect/pr71264.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065501.3C425138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116537,"url":"https://patchwork.plctlab.org/api/1.2/patches/116537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706072929.D6939138FC@imap2.suse-dmz.suse.de/","msgid":"<20230706072929.D6939138FC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T07:29:29","name":"tree-optimization/110515 - wrong code with LIM + PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706072929.D6939138FC@imap2.suse-dmz.suse.de/mbox/"},{"id":116569,"url":"https://patchwork.plctlab.org/api/1.2/patches/116569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com/","msgid":"<001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-06T09:00:12","name":"[Committed] Handle COPYSIGN in dwarf2out.cc'\''d mem_loc_descriptor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com/mbox/"},{"id":116620,"url":"https://patchwork.plctlab.org/api/1.2/patches/116620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706104845.604BE138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706104845.604BE138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T10:48:44","name":"tree-optimization/110563 - simplify epilogue VF checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706104845.604BE138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116635,"url":"https://patchwork.plctlab.org/api/1.2/patches/116635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113805.1765789-1-poulhies@adacore.com/","msgid":"<20230706113805.1765789-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:05","name":"[COMMITTED] ada: Finalization not performed for component of protected type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113805.1765789-1-poulhies@adacore.com/mbox/"},{"id":116634,"url":"https://patchwork.plctlab.org/api/1.2/patches/116634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113853.1765963-1-poulhies@adacore.com/","msgid":"<20230706113853.1765963-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:53","name":"[COMMITTED] ada: Improve error message on violation of SPARK_Mode rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113853.1765963-1-poulhies@adacore.com/mbox/"},{"id":116636,"url":"https://patchwork.plctlab.org/api/1.2/patches/116636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113855.1766024-1-poulhies@adacore.com/","msgid":"<20230706113855.1766024-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:55","name":"[COMMITTED] ada: Avoid crash in Find_Optional_Prim_Op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113855.1766024-1-poulhies@adacore.com/mbox/"},{"id":116638,"url":"https://patchwork.plctlab.org/api/1.2/patches/116638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113856.1766127-1-poulhies@adacore.com/","msgid":"<20230706113856.1766127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:56","name":"[COMMITTED] ada: Reuse code in Is_Fully_Initialized_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113856.1766127-1-poulhies@adacore.com/mbox/"},{"id":116637,"url":"https://patchwork.plctlab.org/api/1.2/patches/116637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113907.1766190-1-poulhies@adacore.com/","msgid":"<20230706113907.1766190-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:07","name":"[COMMITTED] ada: Refer to non-Ada binding limitations in user guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113907.1766190-1-poulhies@adacore.com/mbox/"},{"id":116639,"url":"https://patchwork.plctlab.org/api/1.2/patches/116639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113908.1766256-1-poulhies@adacore.com/","msgid":"<20230706113908.1766256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:08","name":"[COMMITTED] ada: Evaluate static expressions in Range attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113908.1766256-1-poulhies@adacore.com/mbox/"},{"id":116640,"url":"https://patchwork.plctlab.org/api/1.2/patches/116640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113910.1766318-1-poulhies@adacore.com/","msgid":"<20230706113910.1766318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:10","name":"[COMMITTED] ada: Refactor the proof of the Value and Image runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113910.1766318-1-poulhies@adacore.com/mbox/"},{"id":116641,"url":"https://patchwork.plctlab.org/api/1.2/patches/116641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113913.1766423-1-poulhies@adacore.com/","msgid":"<20230706113913.1766423-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:13","name":"[COMMITTED] ada: Add specification source files of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113913.1766423-1-poulhies@adacore.com/mbox/"},{"id":116647,"url":"https://patchwork.plctlab.org/api/1.2/patches/116647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com/","msgid":"<014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-06T12:04:35","name":"[x86_64] Improve __int128 argument passing (in ix86_expand_move).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com/mbox/"},{"id":116700,"url":"https://patchwork.plctlab.org/api/1.2/patches/116700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706132434.77CF8138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706132434.77CF8138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T13:24:34","name":"tree-optimization/110556 - tail merging still pre-tuples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706132434.77CF8138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116731,"url":"https://patchwork.plctlab.org/api/1.2/patches/116731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706135748.2583541-1-claziss@gmail.com/","msgid":"<20230706135748.2583541-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-07-06T13:57:48","name":"[committed] arc: Update builtin documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706135748.2583541-1-claziss@gmail.com/mbox/"},{"id":116734,"url":"https://patchwork.plctlab.org/api/1.2/patches/116734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbNABv8JqSUlOaO@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-06T14:17:36","name":"update_bb_profile_for_threading TLC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbNABv8JqSUlOaO@kam.mff.cuni.cz/mbox/"},{"id":116737,"url":"https://patchwork.plctlab.org/api/1.2/patches/116737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706142551.598751-1-juzhe.zhong@rivai.ai/","msgid":"<20230706142551.598751-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T14:25:51","name":"[V2] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706142551.598751-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116753,"url":"https://patchwork.plctlab.org/api/1.2/patches/116753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbYkVxNoKnkW0Px@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-06T15:06:57","name":"Fix profile update after loop-ch and cunroll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbYkVxNoKnkW0Px@kam.mff.cuni.cz/mbox/"},{"id":116766,"url":"https://patchwork.plctlab.org/api/1.2/patches/116766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706152826.1254690-1-jwakely@redhat.com/","msgid":"<20230706152826.1254690-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-06T15:28:02","name":"[committed] libstdc++: Document --enable-cstdio=stdio_pure [PR110574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706152826.1254690-1-jwakely@redhat.com/mbox/"},{"id":116765,"url":"https://patchwork.plctlab.org/api/1.2/patches/116765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com/","msgid":"<8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-06T15:33:57","name":"[v4] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com/mbox/"},{"id":116781,"url":"https://patchwork.plctlab.org/api/1.2/patches/116781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706155559.1041292-1-julian@codesourcery.com/","msgid":"<20230706155559.1041292-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-06T15:55:59","name":"[og13] OpenMP: Expand \"declare mapper\" mappers for target {enter, exit, } data directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706155559.1041292-1-julian@codesourcery.com/mbox/"},{"id":116797,"url":"https://patchwork.plctlab.org/api/1.2/patches/116797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706161521.6094-2-xry111@xry111.site/","msgid":"<20230706161521.6094-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-06T16:15:22","name":"vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706161521.6094-2-xry111@xry111.site/mbox/"},{"id":116822,"url":"https://patchwork.plctlab.org/api/1.2/patches/116822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6wub1r.fsf@euler.schwinge.homeip.net/","msgid":"<875y6wub1r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-06T18:53:04","name":"GGC: Remove '\''const char *'\'' '\''gt_ggc_mx'\'', '\''gt_pch_nx'\'' variants (was: [PATCH] support ggc hash_map and hash_set)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6wub1r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116849,"url":"https://patchwork.plctlab.org/api/1.2/patches/116849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062144220.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:35:54","name":"[1/3] testsuite: Add check for vectors of 128 bits being supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062144220.28892@tpp.orcam.me.uk/mbox/"},{"id":116850,"url":"https://patchwork.plctlab.org/api/1.2/patches/116850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062153310.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:36:12","name":"[2/3] testsuite: Require 128-bit vectors for bb-slp-pr95839.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062153310.28892@tpp.orcam.me.uk/mbox/"},{"id":116851,"url":"https://patchwork.plctlab.org/api/1.2/patches/116851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062204180.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:36:32","name":"[3/3] testsuite: Require vectors of doubles for pr97428.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062204180.28892@tpp.orcam.me.uk/mbox/"},{"id":116889,"url":"https://patchwork.plctlab.org/api/1.2/patches/116889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk/","msgid":"<4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk>","list_archive_url":null,"date":"2023-07-07T00:08:20","name":"committed: Stepping down as maintainer for ARC and Epiphany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk/mbox/"},{"id":116894,"url":"https://patchwork.plctlab.org/api/1.2/patches/116894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707010023.863732-1-juzhe.zhong@rivai.ai/","msgid":"<20230707010023.863732-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T01:00:23","name":"[V3] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707010023.863732-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116923,"url":"https://patchwork.plctlab.org/api/1.2/patches/116923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707040326.9223-1-juzhe.zhong@rivai.ai/","msgid":"<20230707040326.9223-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T04:03:26","name":"VECT: Add COND_LEN_* operations for loop control with length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707040326.9223-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116967,"url":"https://patchwork.plctlab.org/api/1.2/patches/116967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707052914.3386877-1-hongtao.liu@intel.com/","msgid":"<20230707052914.3386877-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-07T05:29:14","name":"[V2,x86] Add pre_reload splitter to detect fp min/max pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707052914.3386877-1-hongtao.liu@intel.com/mbox/"},{"id":116982,"url":"https://patchwork.plctlab.org/api/1.2/patches/116982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67Mh9wMoNsZV8p1iDUsviNSDuaHkwc-SPjAgo0U-rWaGZw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T06:29:37","name":"lto: bypass-asm: Fixed test(U*) used but never defined error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67Mh9wMoNsZV8p1iDUsviNSDuaHkwc-SPjAgo0U-rWaGZw@mail.gmail.com/mbox/"},{"id":117003,"url":"https://patchwork.plctlab.org/api/1.2/patches/117003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707070727.658031-1-dkm@kataplop.net/","msgid":"<20230707070727.658031-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-07-07T07:07:27","name":"mklog: handle Signed-Off-By, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707070727.658031-1-dkm@kataplop.net/mbox/"},{"id":117027,"url":"https://patchwork.plctlab.org/api/1.2/patches/117027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-1-christophe.lyon@linaro.org/","msgid":"<20230707075145.2929681-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-07T07:51:44","name":"doc: Document arm_v8_1m_main_cde_mve_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-1-christophe.lyon@linaro.org/mbox/"},{"id":117028,"url":"https://patchwork.plctlab.org/api/1.2/patches/117028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-2-christophe.lyon@linaro.org/","msgid":"<20230707075145.2929681-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-07T07:51:45","name":"testsuite: Add _link flavor for several arm_arch* and arm* effective-targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-2-christophe.lyon@linaro.org/mbox/"},{"id":117031,"url":"https://patchwork.plctlab.org/api/1.2/patches/117031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-1-aldyh@redhat.com/","msgid":"<20230707075750.1248045-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:48","name":"[COMMITTED] Implement value/mask tracking for irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-1-aldyh@redhat.com/mbox/"},{"id":117030,"url":"https://patchwork.plctlab.org/api/1.2/patches/117030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-2-aldyh@redhat.com/","msgid":"<20230707075750.1248045-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:49","name":"[COMMITTED] The caller to irange::intersect (wide_int, wide_int) must normalize the range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-2-aldyh@redhat.com/mbox/"},{"id":117029,"url":"https://patchwork.plctlab.org/api/1.2/patches/117029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-3-aldyh@redhat.com/","msgid":"<20230707075750.1248045-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:50","name":"[COMMITTED] A singleton irange has all known bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-3-aldyh@redhat.com/mbox/"},{"id":117037,"url":"https://patchwork.plctlab.org/api/1.2/patches/117037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707082231.27703-1-xuli1@eswincomputing.com/","msgid":"<20230707082231.27703-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-07T08:22:31","name":"RISCV: Fix local_eliminate_vsetvl_insn bug in VSETVL PASS[PR110560]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707082231.27703-1-xuli1@eswincomputing.com/mbox/"},{"id":117049,"url":"https://patchwork.plctlab.org/api/1.2/patches/117049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17550-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T09:37:20","name":"[1/2] middle-end ifcvt: Reduce comparisons on conditionals by tracking truths [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17550-tamar@arm.com/mbox/"},{"id":117050,"url":"https://patchwork.plctlab.org/api/1.2/patches/117050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKfc66Pp1MdMvKL9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T09:37:47","name":"[2/2] middle-end ifcvt: Sort PHI arguments not only occurrences but also complexity [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKfc66Pp1MdMvKL9@arm.com/mbox/"},{"id":117127,"url":"https://patchwork.plctlab.org/api/1.2/patches/117127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707104847.271195-1-juzhe.zhong@rivai.ai/","msgid":"<20230707104847.271195-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T10:48:47","name":"[V4] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707104847.271195-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117129,"url":"https://patchwork.plctlab.org/api/1.2/patches/117129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707131857.2386125-2-xry111@xry111.site/","msgid":"<20230707131857.2386125-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-07T13:18:58","name":"[v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707131857.2386125-2-xry111@xry111.site/mbox/"},{"id":117138,"url":"https://patchwork.plctlab.org/api/1.2/patches/117138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707135142.21579-1-jchrist@linux.ibm.com/","msgid":"<20230707135142.21579-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-07-07T13:51:42","name":"s390: Fix vec_init default expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707135142.21579-1-jchrist@linux.ibm.com/mbox/"},{"id":117139,"url":"https://patchwork.plctlab.org/api/1.2/patches/117139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c197435b-f141-5355-7b9b-bc45344178f1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T14:01:21","name":"[pushed,LRA,PR110372] : Refine reload pseudo class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c197435b-f141-5355-7b9b-bc45344178f1@redhat.com/mbox/"},{"id":117162,"url":"https://patchwork.plctlab.org/api/1.2/patches/117162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707143257.24129-1-juzhe.zhong@rivai.ai/","msgid":"<20230707143257.24129-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T14:32:57","name":"[V5] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707143257.24129-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117181,"url":"https://patchwork.plctlab.org/api/1.2/patches/117181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707151336.691534-1-hjl.tools@gmail.com/","msgid":"<20230707151336.691534-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-07T15:13:36","name":"[v2] x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707151336.691534-1-hjl.tools@gmail.com/mbox/"},{"id":117202,"url":"https://patchwork.plctlab.org/api/1.2/patches/117202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707163806.1537093-1-jwakely@redhat.com/","msgid":"<20230707163806.1537093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-07T16:36:16","name":"libstdc++: Fix --enable-cstdio=stdio_pure [PR110574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707163806.1537093-1-jwakely@redhat.com/mbox/"},{"id":117205,"url":"https://patchwork.plctlab.org/api/1.2/patches/117205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707164019.1537221-1-jwakely@redhat.com/","msgid":"<20230707164019.1537221-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-07T16:38:22","name":"libstdc++: Compile basic_file_stdio.cc for LFS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707164019.1537221-1-jwakely@redhat.com/mbox/"},{"id":117222,"url":"https://patchwork.plctlab.org/api/1.2/patches/117222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhJISgInYN208nc@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-07T17:19:29","name":"Fix some profile consistency testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhJISgInYN208nc@kam.mff.cuni.cz/mbox/"},{"id":117224,"url":"https://patchwork.plctlab.org/api/1.2/patches/117224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhKDsbYPGpWEARA@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-07T17:23:26","name":"Cleanup force_edge_cold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhKDsbYPGpWEARA@kam.mff.cuni.cz/mbox/"},{"id":117234,"url":"https://patchwork.plctlab.org/api/1.2/patches/117234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707175622.702351-1-apinski@marvell.com/","msgid":"<20230707175622.702351-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-07T17:56:22","name":"Fix PR 110539: missed optimization after moving two_value to match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707175622.702351-1-apinski@marvell.com/mbox/"},{"id":117241,"url":"https://patchwork.plctlab.org/api/1.2/patches/117241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5247d438-212e-429f-ac48-fefeeda3f07c-1688754739987@3c-app-gmx-bs47/","msgid":"","list_archive_url":null,"date":"2023-07-07T18:32:20","name":"Fortran: simplification of FINDLOC for constant complex arguments [PR110585]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5247d438-212e-429f-ac48-fefeeda3f07c-1688754739987@3c-app-gmx-bs47/mbox/"},{"id":117262,"url":"https://patchwork.plctlab.org/api/1.2/patches/117262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707192923.465324-1-ibuclaw@gdcproject.org/","msgid":"<20230707192923.465324-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-07T19:29:23","name":"[committed] d: Fix PR 108842: Cannot use enum array with -fno-druntime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707192923.465324-1-ibuclaw@gdcproject.org/mbox/"},{"id":117280,"url":"https://patchwork.plctlab.org/api/1.2/patches/117280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com/","msgid":"<34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-07T20:18:56","name":"[ver,3] rs6000, fix vec_replace_unaligned built-in arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com/mbox/"},{"id":117285,"url":"https://patchwork.plctlab.org/api/1.2/patches/117285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7154d0d309b20945185e1634e08883b00d9f969.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T20:40:12","name":"[v5] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7154d0d309b20945185e1634e08883b00d9f969.camel@us.ibm.com/mbox/"},{"id":117371,"url":"https://patchwork.plctlab.org/api/1.2/patches/117371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-1-kmatsui@gcc.gnu.org/","msgid":"<20230708044539.61276-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:45:38","name":"[v2,1/2] c++, libstdc++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117372,"url":"https://patchwork.plctlab.org/api/1.2/patches/117372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-2-kmatsui@gcc.gnu.org/","msgid":"<20230708044539.61276-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:45:39","name":"[v2,2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117373,"url":"https://patchwork.plctlab.org/api/1.2/patches/117373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708045005.61988-1-kmatsui@gcc.gnu.org/","msgid":"<20230708045005.61988-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:50:05","name":"[v2] libstdc++: use __is_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708045005.61988-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117375,"url":"https://patchwork.plctlab.org/api/1.2/patches/117375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-2-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:08","name":"[v8,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117374,"url":"https://patchwork.plctlab.org/api/1.2/patches/117374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-3-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:09","name":"[v8,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-3-kmatsui@gcc.gnu.org/mbox/"},{"id":117377,"url":"https://patchwork.plctlab.org/api/1.2/patches/117377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-4-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:10","name":"[v8,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-4-kmatsui@gcc.gnu.org/mbox/"},{"id":117376,"url":"https://patchwork.plctlab.org/api/1.2/patches/117376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-5-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:11","name":"[v8,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-5-kmatsui@gcc.gnu.org/mbox/"},{"id":117379,"url":"https://patchwork.plctlab.org/api/1.2/patches/117379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-6-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:12","name":"[v8,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-6-kmatsui@gcc.gnu.org/mbox/"},{"id":117378,"url":"https://patchwork.plctlab.org/api/1.2/patches/117378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-7-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:13","name":"[v8,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-7-kmatsui@gcc.gnu.org/mbox/"},{"id":117380,"url":"https://patchwork.plctlab.org/api/1.2/patches/117380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-1-kmatsui@gcc.gnu.org/","msgid":"<20230708051825.64839-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:18:24","name":"[v3,1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117381,"url":"https://patchwork.plctlab.org/api/1.2/patches/117381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-2-kmatsui@gcc.gnu.org/","msgid":"<20230708051825.64839-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:18:25","name":"[v3,2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117382,"url":"https://patchwork.plctlab.org/api/1.2/patches/117382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052335.65718-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:23:34","name":"[v3,1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117383,"url":"https://patchwork.plctlab.org/api/1.2/patches/117383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052335.65718-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:23:35","name":"[v3,2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117384,"url":"https://patchwork.plctlab.org/api/1.2/patches/117384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052625.66538-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:26:24","name":"[v3,1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117385,"url":"https://patchwork.plctlab.org/api/1.2/patches/117385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052625.66538-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:26:25","name":"[v3,2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117386,"url":"https://patchwork.plctlab.org/api/1.2/patches/117386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052928.67485-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:29:27","name":"[v2,1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117388,"url":"https://patchwork.plctlab.org/api/1.2/patches/117388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052928.67485-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:29:28","name":"[v2,2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117392,"url":"https://patchwork.plctlab.org/api/1.2/patches/117392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708055435.68714-1-kmatsui@gcc.gnu.org/","msgid":"<20230708055435.68714-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:54:34","name":"[v3,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708055435.68714-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117420,"url":"https://patchwork.plctlab.org/api/1.2/patches/117420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708092511.1581884-1-jwakely@redhat.com/","msgid":"<20230708092511.1581884-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-08T09:24:58","name":"[committed] doc: Fix typos in Warning Options [PR110596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708092511.1581884-1-jwakely@redhat.com/mbox/"},{"id":117431,"url":"https://patchwork.plctlab.org/api/1.2/patches/117431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-1-kmatsui@gcc.gnu.org/","msgid":"<20230708111308.92402-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T11:13:07","name":"[v4,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117432,"url":"https://patchwork.plctlab.org/api/1.2/patches/117432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-2-kmatsui@gcc.gnu.org/","msgid":"<20230708111308.92402-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T11:13:08","name":"[v4,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117436,"url":"https://patchwork.plctlab.org/api/1.2/patches/117436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a53KgJRT_LM_kTW7a097JUZaBN1M9cfR1WjJftnYa2Ww@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T13:03:44","name":"[committed] gcse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a53KgJRT_LM_kTW7a097JUZaBN1M9cfR1WjJftnYa2Ww@mail.gmail.com/mbox/"},{"id":117437,"url":"https://patchwork.plctlab.org/api/1.2/patches/117437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z8zYN4_qU5gWbmKdUXC07y2=-AvSjx0ZhLRR=SpB=mbg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T13:04:43","name":"[committed] cprop: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z8zYN4_qU5gWbmKdUXC07y2=-AvSjx0ZhLRR=SpB=mbg@mail.gmail.com/mbox/"},{"id":117440,"url":"https://patchwork.plctlab.org/api/1.2/patches/117440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLyCitnePwtiEucjcAhK8q_PBKuSdsvUpjKkE3iDVu06A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T14:23:31","name":"[fortran] Fix default type bugs in gfortran [PR99139, PR99368]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLyCitnePwtiEucjcAhK8q_PBKuSdsvUpjKkE3iDVu06A@mail.gmail.com/mbox/"},{"id":117450,"url":"https://patchwork.plctlab.org/api/1.2/patches/117450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKmKYTnGNGB/9GFW@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-08T16:10:09","name":"Fix profile update in tree-ssa/update-cunroll.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKmKYTnGNGB/9GFW@kam.mff.cuni.cz/mbox/"},{"id":117468,"url":"https://patchwork.plctlab.org/api/1.2/patches/117468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKnZ7Ey9BtAG2S86@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-08T21:49:32","name":"Add missing dump_file check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKnZ7Ey9BtAG2S86@kam.mff.cuni.cz/mbox/"},{"id":117486,"url":"https://patchwork.plctlab.org/api/1.2/patches/117486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-1-kmatsui@gcc.gnu.org/","msgid":"<20230709084717.20744-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T08:47:16","name":"[1/2] c++, libstdc++: implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117487,"url":"https://patchwork.plctlab.org/api/1.2/patches/117487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-2-kmatsui@gcc.gnu.org/","msgid":"<20230709084717.20744-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T08:47:17","name":"[2/2] libstdc++: use new built-in trait __is_signed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117488,"url":"https://patchwork.plctlab.org/api/1.2/patches/117488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKNWisMUzv3DQ9u7Cy8UE6Z98Ws3Vzpgc=RLh4Xpq21Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-09T08:52:38","name":"simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKNWisMUzv3DQ9u7Cy8UE6Z98Ws3Vzpgc=RLh4Xpq21Q@mail.gmail.com/mbox/"},{"id":117502,"url":"https://patchwork.plctlab.org/api/1.2/patches/117502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-1-kmatsui@gcc.gnu.org/","msgid":"<20230709125715.26884-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T12:57:14","name":"[1/2] c++, libstdc++: implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117503,"url":"https://patchwork.plctlab.org/api/1.2/patches/117503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-2-kmatsui@gcc.gnu.org/","msgid":"<20230709125715.26884-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T12:57:15","name":"[2/2] libstdc++: use new built-in trait __is_arithmetic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117506,"url":"https://patchwork.plctlab.org/api/1.2/patches/117506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKq18vCQLX4mFtw8@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-09T13:28:18","name":"Improve dumping of profile_count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKq18vCQLX4mFtw8@kam.mff.cuni.cz/mbox/"},{"id":117530,"url":"https://patchwork.plctlab.org/api/1.2/patches/117530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com/","msgid":"<035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-09T20:35:53","name":"[x86] Add AVX512 support for STV of SI/DImode rotation by constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com/mbox/"},{"id":117533,"url":"https://patchwork.plctlab.org/api/1.2/patches/117533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com/","msgid":"<037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-09T21:30:28","name":"[X86] Add new insvti_lowpart_1 and insvdi_lowpart_1 patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com/mbox/"},{"id":117539,"url":"https://patchwork.plctlab.org/api/1.2/patches/117539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011400.910408-1-ibuclaw@gdcproject.org/","msgid":"<20230710011400.910408-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-10T01:14:00","name":"[committed] d: Merge upstream dmd, druntime 17ccd12af3, phobos 8d3800bee.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011400.910408-1-ibuclaw@gdcproject.org/mbox/"},{"id":117541,"url":"https://patchwork.plctlab.org/api/1.2/patches/117541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011714.3615931-1-hongtao.liu@intel.com/","msgid":"<20230710011714.3615931-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-10T01:17:14","name":"Break false dependence for vpternlog by inserting vpxor or setting constraint of input operand to '\''0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011714.3615931-1-hongtao.liu@intel.com/mbox/"},{"id":117603,"url":"https://patchwork.plctlab.org/api/1.2/patches/117603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-1-kmatsui@gcc.gnu.org/","msgid":"<20230710052310.48116-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:23:09","name":"[1/2] c++, libstdc++: implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117604,"url":"https://patchwork.plctlab.org/api/1.2/patches/117604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-2-kmatsui@gcc.gnu.org/","msgid":"<20230710052310.48116-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:23:10","name":"[2/2] libstdc++: use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117610,"url":"https://patchwork.plctlab.org/api/1.2/patches/117610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-1-kmatsui@gcc.gnu.org/","msgid":"<20230710053828.49793-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:38:27","name":"[v2,1/2] c++, libstdc++: implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117611,"url":"https://patchwork.plctlab.org/api/1.2/patches/117611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-2-kmatsui@gcc.gnu.org/","msgid":"<20230710053828.49793-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:38:28","name":"[v2,2/2] libstdc++: use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117659,"url":"https://patchwork.plctlab.org/api/1.2/patches/117659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710070612.233168-1-juzhe.zhong@rivai.ai/","msgid":"<20230710070612.233168-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T07:06:12","name":"GCSE: Export add_label_notes as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710070612.233168-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117679,"url":"https://patchwork.plctlab.org/api/1.2/patches/117679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710075600.114191-1-juzhe.zhong@rivai.ai/","msgid":"<20230710075600.114191-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T07:56:00","name":"GCSE: Export '\''insert_insn_end_basic_block'\'' as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710075600.114191-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117692,"url":"https://patchwork.plctlab.org/api/1.2/patches/117692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710081259.189869-1-juzhe.zhong@rivai.ai/","msgid":"<20230710081259.189869-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T08:12:59","name":"[v2] GCSE: Export '\''insert_insn_end_basic_block'\'' as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710081259.189869-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117869,"url":"https://patchwork.plctlab.org/api/1.2/patches/117869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710113547.142562-1-juzhe.zhong@rivai.ai/","msgid":"<20230710113547.142562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T11:35:47","name":"[V2] VECT: Add COND_LEN_* operations for loop control with length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710113547.142562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117888,"url":"https://patchwork.plctlab.org/api/1.2/patches/117888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124337.2262944-1-poulhies@adacore.com/","msgid":"<20230710124337.2262944-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:37","name":"[COMMITTED] ada: Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124337.2262944-1-poulhies@adacore.com/mbox/"},{"id":117891,"url":"https://patchwork.plctlab.org/api/1.2/patches/117891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124347.2263134-1-poulhies@adacore.com/","msgid":"<20230710124347.2263134-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:47","name":"[COMMITTED] ada: Adapt proof of System.Arith_Double to remove CVC4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124347.2263134-1-poulhies@adacore.com/mbox/"},{"id":117893,"url":"https://patchwork.plctlab.org/api/1.2/patches/117893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124349.2263234-1-poulhies@adacore.com/","msgid":"<20230710124349.2263234-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:49","name":"[COMMITTED] ada: hardcfr: mark throw-expected functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124349.2263234-1-poulhies@adacore.com/mbox/"},{"id":117894,"url":"https://patchwork.plctlab.org/api/1.2/patches/117894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124352.2263295-1-poulhies@adacore.com/","msgid":"<20230710124352.2263295-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:52","name":"[COMMITTED] ada: hardcfr: optionally disable in leaf functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124352.2263295-1-poulhies@adacore.com/mbox/"},{"id":117895,"url":"https://patchwork.plctlab.org/api/1.2/patches/117895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124425.2263356-1-poulhies@adacore.com/","msgid":"<20230710124425.2263356-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:25","name":"[COMMITTED] ada: Documentation for mixed declarations and statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124425.2263356-1-poulhies@adacore.com/mbox/"},{"id":117889,"url":"https://patchwork.plctlab.org/api/1.2/patches/117889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124427.2263633-1-poulhies@adacore.com/","msgid":"<20230710124427.2263633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:27","name":"[COMMITTED] ada: Simplify assertion to remove CodePeer message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124427.2263633-1-poulhies@adacore.com/mbox/"},{"id":117892,"url":"https://patchwork.plctlab.org/api/1.2/patches/117892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124429.2263694-1-poulhies@adacore.com/","msgid":"<20230710124429.2263694-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:29","name":"[COMMITTED] ada: Add typedefs to snames.h-tmpl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124429.2263694-1-poulhies@adacore.com/mbox/"},{"id":117890,"url":"https://patchwork.plctlab.org/api/1.2/patches/117890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124431.2263755-1-poulhies@adacore.com/","msgid":"<20230710124431.2263755-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:31","name":"[COMMITTED] ada: Follow-up fix for compilation issue with recent MinGW-w64 versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124431.2263755-1-poulhies@adacore.com/mbox/"},{"id":117914,"url":"https://patchwork.plctlab.org/api/1.2/patches/117914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710130847.2940323-1-christophe.lyon@linaro.org/","msgid":"<20230710130847.2940323-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-10T13:08:47","name":"[v2] arm: Fix MVE intrinsics support with LTO (PR target/110268)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710130847.2940323-1-christophe.lyon@linaro.org/mbox/"},{"id":117945,"url":"https://patchwork.plctlab.org/api/1.2/patches/117945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710141904.109665-1-kito.cheng@sifive.com/","msgid":"<20230710141904.109665-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-10T14:19:04","name":"doc: Add doc for RISC-V Operand Modifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710141904.109665-1-kito.cheng@sifive.com/mbox/"},{"id":117951,"url":"https://patchwork.plctlab.org/api/1.2/patches/117951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710150052.1793398-1-ppalka@redhat.com/","msgid":"<20230710150052.1793398-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-10T15:00:52","name":"[pushed] c++: redeclare_class_template and ttps [PR110523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710150052.1793398-1-ppalka@redhat.com/mbox/"},{"id":117955,"url":"https://patchwork.plctlab.org/api/1.2/patches/117955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710174826.48f9230c@vepi2/","msgid":"<20230710174826.48f9230c@vepi2>","list_archive_url":null,"date":"2023-07-10T15:48:26","name":"[Fortran] Allow ref'\''ing PDT'\''s len() in parameter-initializer [PR102003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710174826.48f9230c@vepi2/mbox/"},{"id":117960,"url":"https://patchwork.plctlab.org/api/1.2/patches/117960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.LSU.2.20.2307101549210.13548@wotan.suse.de/","msgid":"","list_archive_url":null,"date":"2023-07-10T15:55:27","name":"[x86-64] RFC: Add nosse abi attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.LSU.2.20.2307101549210.13548@wotan.suse.de/mbox/"},{"id":117974,"url":"https://patchwork.plctlab.org/api/1.2/patches/117974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com/","msgid":"<227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com>","list_archive_url":null,"date":"2023-07-10T16:47:55","name":"[OBVIOUS] rs6000: Remove redundant MEM_P predicate usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com/mbox/"},{"id":118008,"url":"https://patchwork.plctlab.org/api/1.2/patches/118008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0e6013f-ca38-b98d-dc01-b30adbd5901a@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-07-10T18:33:58","name":"[OpenACC,2.7] readonly modifier support in front-ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0e6013f-ca38-b98d-dc01-b30adbd5901a@siemens.com/mbox/"},{"id":118014,"url":"https://patchwork.plctlab.org/api/1.2/patches/118014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzv7iold.fsf@oldenburg.str.redhat.com/","msgid":"<87jzv7iold.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-10T18:54:54","name":"libgcc: Fix -Wint-conversion warning in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzv7iold.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118028,"url":"https://patchwork.plctlab.org/api/1.2/patches/118028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710191138.1534922-1-qing.zhao@oracle.com/","msgid":"<20230710191138.1534922-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-07-10T19:11:38","name":"gcc-14/changes.html: Deprecate a GCC C extension on flexible array members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710191138.1534922-1-qing.zhao@oracle.com/mbox/"},{"id":118029,"url":"https://patchwork.plctlab.org/api/1.2/patches/118029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com/","msgid":"<32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-10T19:18:10","name":"[ver3] rs6000, Add return value to __builtin_set_fpscr_rn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com/mbox/"},{"id":118048,"url":"https://patchwork.plctlab.org/api/1.2/patches/118048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhF+qhjby3+V3F@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:50:47","name":"Optimize vec_splats of vec_extract for V2DI/V2DF (PR target/99293)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhF+qhjby3+V3F@cowardly-lion.the-meissners.org/mbox/"},{"id":118049,"url":"https://patchwork.plctlab.org/api/1.2/patches/118049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhXGgvRPO1VgAK@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:51:56","name":"Improve 64->128 bit zero extension on PowerPC (PR target/108958)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhXGgvRPO1VgAK@cowardly-lion.the-meissners.org/mbox/"},{"id":118050,"url":"https://patchwork.plctlab.org/api/1.2/patches/118050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZN4unwZ2+rFcyu+OLkqsqs2Ow5ZibUQedxP7txepNHjg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:55:51","name":"[committed] reorg: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZN4unwZ2+rFcyu+OLkqsqs2Ow5ZibUQedxP7txepNHjg@mail.gmail.com/mbox/"},{"id":118051,"url":"https://patchwork.plctlab.org/api/1.2/patches/118051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxjMDOl1K/d5z23@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:59:44","name":"Fix typo in insn name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxjMDOl1K/d5z23@cowardly-lion.the-meissners.org/mbox/"},{"id":118070,"url":"https://patchwork.plctlab.org/api/1.2/patches/118070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710203326.79631-1-polacek@redhat.com/","msgid":"<20230710203326.79631-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-10T20:33:26","name":"testsuite: fix allocator-opt1.C FAIL with old ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710203326.79631-1-polacek@redhat.com/mbox/"},{"id":118120,"url":"https://patchwork.plctlab.org/api/1.2/patches/118120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com/","msgid":"<59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com>","list_archive_url":null,"date":"2023-07-10T22:07:39","name":"libgomp: Update OpenMP memory allocation doc, fix omp_high_bw_mem_space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com/mbox/"},{"id":118121,"url":"https://patchwork.plctlab.org/api/1.2/patches/118121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710220957.1579524-1-ibuclaw@gdcproject.org/","msgid":"<20230710220957.1579524-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-10T22:09:57","name":"[committed] d: Merge upstream dmd, druntime a88e1335f7, phobos 1921d29df.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710220957.1579524-1-ibuclaw@gdcproject.org/mbox/"},{"id":118218,"url":"https://patchwork.plctlab.org/api/1.2/patches/118218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711031356.3066611-1-hongtao.liu@intel.com/","msgid":"<20230711031356.3066611-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T03:13:56","name":"Add peephole to eliminate redundant comparison after cmpccxadd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711031356.3066611-1-hongtao.liu@intel.com/mbox/"},{"id":118224,"url":"https://patchwork.plctlab.org/api/1.2/patches/118224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711033639.3081376-1-haochen.jiang@intel.com/","msgid":"<20230711033639.3081376-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-11T03:36:39","name":"i386: Guard 128 bit VAES builtins with AVX512VL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711033639.3081376-1-haochen.jiang@intel.com/mbox/"},{"id":118254,"url":"https://patchwork.plctlab.org/api/1.2/patches/118254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711040130.3090884-1-hongtao.liu@intel.com/","msgid":"<20230711040130.3090884-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T04:01:30","name":"[v2] Break false dependence for vpternlog by inserting vpxor or setting constraint of input operand to '\''0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711040130.3090884-1-hongtao.liu@intel.com/mbox/"},{"id":118248,"url":"https://patchwork.plctlab.org/api/1.2/patches/118248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711044401.1405808-1-christoph.muellner@vrull.eu/","msgid":"<20230711044401.1405808-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-11T04:44:01","name":"riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711044401.1405808-1-christoph.muellner@vrull.eu/mbox/"},{"id":118273,"url":"https://patchwork.plctlab.org/api/1.2/patches/118273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b620e634-3adf-dba7-51a1-25220a150d6c@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T06:03:51","name":"[v3] x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b620e634-3adf-dba7-51a1-25220a150d6c@suse.com/mbox/"},{"id":118275,"url":"https://patchwork.plctlab.org/api/1.2/patches/118275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d75a4d5a-8624-aa77-9f29-140767357b58@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T06:08:00","name":"x86: improve fast bfloat->float conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d75a4d5a-8624-aa77-9f29-140767357b58@suse.com/mbox/"},{"id":118283,"url":"https://patchwork.plctlab.org/api/1.2/patches/118283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711063828.331387-1-juzhe.zhong@rivai.ai/","msgid":"<20230711063828.331387-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-11T06:38:28","name":"RISC-V: Optimize permutation codegen with vcompress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711063828.331387-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118307,"url":"https://patchwork.plctlab.org/api/1.2/patches/118307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site/","msgid":"<2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site>","list_archive_url":null,"date":"2023-07-11T08:12:26","name":"[pushed] testsuite: Unbreak pr110557.cc where long is 32-bit (was Re: Pushed: [PATCH v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site/mbox/"},{"id":118336,"url":"https://patchwork.plctlab.org/api/1.2/patches/118336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711090413.3587421-1-guojiufu@linux.ibm.com/","msgid":"<20230711090413.3587421-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-11T09:04:13","name":"[V4] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711090413.3587421-1-guojiufu@linux.ibm.com/mbox/"},{"id":118337,"url":"https://patchwork.plctlab.org/api/1.2/patches/118337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711091349.3376586-1-hongtao.liu@intel.com/","msgid":"<20230711091349.3376586-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T09:13:49","name":"Add peephole to eliminate redundant comparison after cmpccxadd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711091349.3376586-1-hongtao.liu@intel.com/mbox/"},{"id":118349,"url":"https://patchwork.plctlab.org/api/1.2/patches/118349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092548.2323955-1-poulhies@adacore.com/","msgid":"<20230711092548.2323955-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-11T09:25:48","name":"[COMMITTED] ada: Fix wrong resolution for hidden discriminant in predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092548.2323955-1-poulhies@adacore.com/mbox/"},{"id":118350,"url":"https://patchwork.plctlab.org/api/1.2/patches/118350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092559.2324105-1-poulhies@adacore.com/","msgid":"<20230711092559.2324105-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-11T09:25:59","name":"[COMMITTED] ada: Avoid renaming_decl in case of constrained array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092559.2324105-1-poulhies@adacore.com/mbox/"},{"id":118356,"url":"https://patchwork.plctlab.org/api/1.2/patches/118356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6qeqma.fsf@oldenburg.str.redhat.com/","msgid":"<875y6qeqma.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:37:01","name":"aarch64: Fix warnings during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6qeqma.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118364,"url":"https://patchwork.plctlab.org/api/1.2/patches/118364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg42dbzt.fsf@oldenburg.str.redhat.com/","msgid":"<87zg42dbzt.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:14","name":"m68k: Avoid implicit function declaration in libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg42dbzt.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118371,"url":"https://patchwork.plctlab.org/api/1.2/patches/118371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8eqdbz9.fsf@oldenburg.str.redhat.com/","msgid":"<87v8eqdbz9.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:34","name":"csky: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8eqdbz9.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118379,"url":"https://patchwork.plctlab.org/api/1.2/patches/118379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0pedbyq.fsf@oldenburg.str.redhat.com/","msgid":"<87r0pedbyq.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:53","name":"riscv: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0pedbyq.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118372,"url":"https://patchwork.plctlab.org/api/1.2/patches/118372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt02dby7.fsf@oldenburg.str.redhat.com/","msgid":"<87mt02dby7.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:39:12","name":"arc: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt02dby7.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118373,"url":"https://patchwork.plctlab.org/api/1.2/patches/118373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilaqdbxn.fsf@oldenburg.str.redhat.com/","msgid":"<87ilaqdbxn.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:39:32","name":"or1k: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilaqdbxn.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118406,"url":"https://patchwork.plctlab.org/api/1.2/patches/118406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711102308.129C83855587@sourceware.org/","msgid":"<20230711102308.129C83855587@sourceware.org>","list_archive_url":null,"date":"2023-07-11T10:22:23","name":"tree-optimization/110614 - SLP splat and re-align (optimized)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711102308.129C83855587@sourceware.org/mbox/"},{"id":118411,"url":"https://patchwork.plctlab.org/api/1.2/patches/118411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-2-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:51","name":"[1/3] fortran: defer class wrapper initialization after deallocation [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-2-mikael@gcc.gnu.org/mbox/"},{"id":118412,"url":"https://patchwork.plctlab.org/api/1.2/patches/118412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-3-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:52","name":"[2/3] fortran: Factor data references for scalar class argument wrapping [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-3-mikael@gcc.gnu.org/mbox/"},{"id":118413,"url":"https://patchwork.plctlab.org/api/1.2/patches/118413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-4-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:53","name":"[3/3] fortran: Reorder array argument evaluation parts [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-4-mikael@gcc.gnu.org/mbox/"},{"id":118414,"url":"https://patchwork.plctlab.org/api/1.2/patches/118414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com/","msgid":"<34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com>","list_archive_url":null,"date":"2023-07-11T10:35:38","name":"libgomp: Use libnuma for OpenMP'\''s partition=nearest allocation trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com/mbox/"},{"id":118415,"url":"https://patchwork.plctlab.org/api/1.2/patches/118415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddd7f9cd-994e-0baf-33a3-34c27539f2b1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T10:37:19","name":"Include insn-opinit.h in PLUGIN_H [PR110610]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddd7f9cd-994e-0baf-33a3-34c27539f2b1@arm.com/mbox/"},{"id":118435,"url":"https://patchwork.plctlab.org/api/1.2/patches/118435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com/","msgid":"<8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com>","list_archive_url":null,"date":"2023-07-11T11:51:46","name":"genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com/mbox/"},{"id":118437,"url":"https://patchwork.plctlab.org/api/1.2/patches/118437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711120835.2043753-1-mikael@gcc.gnu.org/","msgid":"<20230711120835.2043753-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T12:08:35","name":"fortran: Release symbols in reversed order [PR106050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711120835.2043753-1-mikael@gcc.gnu.org/mbox/"},{"id":118441,"url":"https://patchwork.plctlab.org/api/1.2/patches/118441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711121639.2421168-1-ppalka@redhat.com/","msgid":"<20230711121639.2421168-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-11T12:16:39","name":"c++: coercing variable template from current inst [PR110580]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711121639.2421168-1-ppalka@redhat.com/mbox/"},{"id":118492,"url":"https://patchwork.plctlab.org/api/1.2/patches/118492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK1PLZaV457x2pTt@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-11T12:46:37","name":"Loop-ch improvements, part 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK1PLZaV457x2pTt@kam.mff.cuni.cz/mbox/"},{"id":118525,"url":"https://patchwork.plctlab.org/api/1.2/patches/118525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d2aba95-9433-8419-126b-cae83075422e@gmail.com/","msgid":"<7d2aba95-9433-8419-126b-cae83075422e@gmail.com>","list_archive_url":null,"date":"2023-07-11T13:31:13","name":"genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d2aba95-9433-8419-126b-cae83075422e@gmail.com/mbox/"},{"id":118531,"url":"https://patchwork.plctlab.org/api/1.2/patches/118531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711133523.3617092-1-hongtao.liu@intel.com/","msgid":"<20230711133523.3617092-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T13:35:23","name":"Fix typo in the testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711133523.3617092-1-hongtao.liu@intel.com/mbox/"},{"id":118614,"url":"https://patchwork.plctlab.org/api/1.2/patches/118614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711153949.6676-1-cooper.qu@linux.alibaba.com/","msgid":"<20230711153949.6676-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-11T15:39:49","name":"[1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711153949.6676-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":118646,"url":"https://patchwork.plctlab.org/api/1.2/patches/118646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YfabfMForrLNJp51ML5YNt8zSTFEx_NdGSgs0BzABOtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T16:36:16","name":"[committed] cfg+gcse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YfabfMForrLNJp51ML5YNt8zSTFEx_NdGSgs0BzABOtw@mail.gmail.com/mbox/"},{"id":118690,"url":"https://patchwork.plctlab.org/api/1.2/patches/118690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com/","msgid":"<5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-11T18:06:52","name":"[ver4] rs6000, Add return value to __builtin_set_fpscr_rn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com/mbox/"},{"id":118691,"url":"https://patchwork.plctlab.org/api/1.2/patches/118691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com/","msgid":"<028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-11T19:07:50","name":"[x86] PR target/110598: Fix rega = 0; rega ^= rega regression.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com/mbox/"},{"id":118693,"url":"https://patchwork.plctlab.org/api/1.2/patches/118693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-bb05afea-59cc-4557-8d76-9f901044315b-1689104371308@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-07-11T19:39:31","name":"Fortran: formal symbol attributes for intrinsic procedures [PR110288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-bb05afea-59cc-4557-8d76-9f901044315b-1689104371308@3c-app-gmx-bs33/mbox/"},{"id":118702,"url":"https://patchwork.plctlab.org/api/1.2/patches/118702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com/","msgid":"<02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-11T20:07:10","name":"[x86] Fix FAIL of gcc.target/i386/pr91681-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com/mbox/"},{"id":118707,"url":"https://patchwork.plctlab.org/api/1.2/patches/118707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com/","msgid":"<7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com>","list_archive_url":null,"date":"2023-07-11T20:24:44","name":"[v2] genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com/mbox/"},{"id":118727,"url":"https://patchwork.plctlab.org/api/1.2/patches/118727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-2-david.faust@oracle.com/","msgid":"<20230711215716.12980-2-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:08","name":"[1/9] c-family: add btf_decl_tag attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-2-david.faust@oracle.com/mbox/"},{"id":118720,"url":"https://patchwork.plctlab.org/api/1.2/patches/118720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-3-david.faust@oracle.com/","msgid":"<20230711215716.12980-3-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:09","name":"[2/9] include: add BTF decl tag defines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-3-david.faust@oracle.com/mbox/"},{"id":118722,"url":"https://patchwork.plctlab.org/api/1.2/patches/118722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-4-david.faust@oracle.com/","msgid":"<20230711215716.12980-4-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:10","name":"[3/9] dwarf: create annotation DIEs for decl tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-4-david.faust@oracle.com/mbox/"},{"id":118723,"url":"https://patchwork.plctlab.org/api/1.2/patches/118723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-5-david.faust@oracle.com/","msgid":"<20230711215716.12980-5-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:11","name":"[4/9] dwarf: expose get_die_parent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-5-david.faust@oracle.com/mbox/"},{"id":118721,"url":"https://patchwork.plctlab.org/api/1.2/patches/118721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-6-david.faust@oracle.com/","msgid":"<20230711215716.12980-6-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:12","name":"[5/9] ctf: add support to pass through BTF tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-6-david.faust@oracle.com/mbox/"},{"id":118725,"url":"https://patchwork.plctlab.org/api/1.2/patches/118725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-7-david.faust@oracle.com/","msgid":"<20230711215716.12980-7-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:13","name":"[6/9] dwarf2ctf: convert annotation DIEs to CTF types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-7-david.faust@oracle.com/mbox/"},{"id":118729,"url":"https://patchwork.plctlab.org/api/1.2/patches/118729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-8-david.faust@oracle.com/","msgid":"<20230711215716.12980-8-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:14","name":"[7/9] btf: create and output BTF_KIND_DECL_TAG types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-8-david.faust@oracle.com/mbox/"},{"id":118726,"url":"https://patchwork.plctlab.org/api/1.2/patches/118726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-9-david.faust@oracle.com/","msgid":"<20230711215716.12980-9-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:15","name":"[8/9] testsuite: add tests for BTF decl tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-9-david.faust@oracle.com/mbox/"},{"id":118724,"url":"https://patchwork.plctlab.org/api/1.2/patches/118724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-10-david.faust@oracle.com/","msgid":"<20230711215716.12980-10-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:16","name":"[9/9] doc: document btf_decl_tag attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-10-david.faust@oracle.com/mbox/"},{"id":118789,"url":"https://patchwork.plctlab.org/api/1.2/patches/118789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712031935.3908564-1-yunqiang.su@cipunited.com/","msgid":"<20230712031935.3908564-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-12T03:19:35","name":"[RFC] Store_bit_field_1: Use mode of SUBREG instead of REG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712031935.3908564-1-yunqiang.su@cipunited.com/mbox/"},{"id":118792,"url":"https://patchwork.plctlab.org/api/1.2/patches/118792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712032730.40158-1-lehua.ding@rivai.ai/","msgid":"<20230712032730.40158-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-12T03:27:30","name":"RISC-V: Throw compilation error for unknown sub-extension or supervisor extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712032730.40158-1-lehua.ding@rivai.ai/mbox/"},{"id":118804,"url":"https://patchwork.plctlab.org/api/1.2/patches/118804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040133.88791-1-lehua.ding@rivai.ai/","msgid":"<20230712040133.88791-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:01:33","name":"mklog: Add --append option to auto add generate ChangeLog to patch file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040133.88791-1-lehua.ding@rivai.ai/mbox/"},{"id":118805,"url":"https://patchwork.plctlab.org/api/1.2/patches/118805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040502.3283038-1-pan2.li@intel.com/","msgid":"<20230712040502.3283038-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T04:05:02","name":"[V6] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040502.3283038-1-pan2.li@intel.com/mbox/"},{"id":118808,"url":"https://patchwork.plctlab.org/api/1.2/patches/118808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/","msgid":"<20230712042124.111818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:21:24","name":"VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118814,"url":"https://patchwork.plctlab.org/api/1.2/patches/118814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712044424.75724-1-juzhe.zhong@rivai.ai/","msgid":"<20230712044424.75724-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:44:24","name":"RISC-V: Support COND_LEN_* patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712044424.75724-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118829,"url":"https://patchwork.plctlab.org/api/1.2/patches/118829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712054609.3958442-1-pan2.li@intel.com/","msgid":"<20230712054609.3958442-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T05:46:09","name":"[v1] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712054609.3958442-1-pan2.li@intel.com/mbox/"},{"id":118830,"url":"https://patchwork.plctlab.org/api/1.2/patches/118830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055053.4016796-1-pan2.li@intel.com/","msgid":"<20230712055053.4016796-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T05:50:53","name":"[v2] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055053.4016796-1-pan2.li@intel.com/mbox/"},{"id":118831,"url":"https://patchwork.plctlab.org/api/1.2/patches/118831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055613.1716215-1-zewei.mo@intel.com/","msgid":"<20230712055613.1716215-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-12T05:56:13","name":"Initial Granite Rapids D Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055613.1716215-1-zewei.mo@intel.com/mbox/"},{"id":118839,"url":"https://patchwork.plctlab.org/api/1.2/patches/118839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712062855.13455-1-guojie@loongson.cn/","msgid":"<20230712062855.13455-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-07-12T06:28:55","name":"LoongArch: Fix the missing include file when using gcc plugins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712062855.13455-1-guojie@loongson.cn/mbox/"},{"id":118944,"url":"https://patchwork.plctlab.org/api/1.2/patches/118944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712083923.92799-1-juzhe.zhong@rivai.ai/","msgid":"<20230712083923.92799-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T08:39:23","name":"RISC-V: Support integer mult highpart auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712083923.92799-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119025,"url":"https://patchwork.plctlab.org/api/1.2/patches/119025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712093849.102131-1-juzhe.zhong@rivai.ai/","msgid":"<20230712093849.102131-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T09:38:49","name":"[V7] RISC-V: RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712093849.102131-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119056,"url":"https://patchwork.plctlab.org/api/1.2/patches/119056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712103621.47696-1-juzhe.zhong@rivai.ai/","msgid":"<20230712103621.47696-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T10:36:21","name":"[V2] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712103621.47696-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119077,"url":"https://patchwork.plctlab.org/api/1.2/patches/119077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712110100.3B3AD3857726@sourceware.org/","msgid":"<20230712110100.3B3AD3857726@sourceware.org>","list_archive_url":null,"date":"2023-07-12T11:00:16","name":"tree-optimization/110630 - enhance SLP permute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712110100.3B3AD3857726@sourceware.org/mbox/"},{"id":119083,"url":"https://patchwork.plctlab.org/api/1.2/patches/119083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com/","msgid":"<4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com>","list_archive_url":null,"date":"2023-07-12T11:05:10","name":"[IRA] Skip empty register classes in setup_reg_class_relations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com/mbox/"},{"id":119086,"url":"https://patchwork.plctlab.org/api/1.2/patches/119086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712111608.71951-1-juzhe.zhong@rivai.ai/","msgid":"<20230712111608.71951-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T11:16:08","name":"[V3] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712111608.71951-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119165,"url":"https://patchwork.plctlab.org/api/1.2/patches/119165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712131739.270277-1-juzhe.zhong@rivai.ai/","msgid":"<20230712131739.270277-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T13:17:39","name":"[V4] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712131739.270277-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119177,"url":"https://patchwork.plctlab.org/api/1.2/patches/119177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712133740.7216B3858020@sourceware.org/","msgid":"<20230712133740.7216B3858020@sourceware.org>","list_archive_url":null,"date":"2023-07-12T13:36:56","name":"tree-optimization/94864 - vector insert of vector extract simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712133740.7216B3858020@sourceware.org/mbox/"},{"id":119183,"url":"https://patchwork.plctlab.org/api/1.2/patches/119183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-1-julian@codesourcery.com/","msgid":"<20230712134207.123424-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T13:42:06","name":"[og13] OpenACC: Vector length warning fixes for implicit mapping/declare create tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-1-julian@codesourcery.com/mbox/"},{"id":119184,"url":"https://patchwork.plctlab.org/api/1.2/patches/119184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-2-julian@codesourcery.com/","msgid":"<20230712134207.123424-2-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T13:42:07","name":"OpenMP: Strided/rectangular '\''target update'\'' out-of-bounds array lookup fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-2-julian@codesourcery.com/mbox/"},{"id":119212,"url":"https://patchwork.plctlab.org/api/1.2/patches/119212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com/","msgid":"<4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T14:17:30","name":"[committed] libgomp.texi: add cross ref, remove duplicated entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com/mbox/"},{"id":119224,"url":"https://patchwork.plctlab.org/api/1.2/patches/119224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZHTn7U9ejR8+K+f+GUy=sf=aN5_UorSVrDyezWadgb6g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T14:32:46","name":"[committed] ifcvt: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZHTn7U9ejR8+K+f+GUy=sf=aN5_UorSVrDyezWadgb6g@mail.gmail.com/mbox/"},{"id":119232,"url":"https://patchwork.plctlab.org/api/1.2/patches/119232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712150302.3517511-1-pan2.li@intel.com/","msgid":"<20230712150302.3517511-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T15:03:02","name":"[v1] RISC-V: Add more tests for RVV floating-point FRM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712150302.3517511-1-pan2.li@intel.com/mbox/"},{"id":119245,"url":"https://patchwork.plctlab.org/api/1.2/patches/119245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712152438.296209-1-juzhe.zhong@rivai.ai/","msgid":"<20230712152438.296209-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T15:24:38","name":"[V2] RISC-V: Support COND_LEN_* patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712152438.296209-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119251,"url":"https://patchwork.plctlab.org/api/1.2/patches/119251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712154138.2837658-1-ppalka@redhat.com/","msgid":"<20230712154138.2837658-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-12T15:41:38","name":"c++: constrained surrogate calls [PR110535]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712154138.2837658-1-ppalka@redhat.com/mbox/"},{"id":119259,"url":"https://patchwork.plctlab.org/api/1.2/patches/119259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712160802.998150-1-apinski@marvell.com/","msgid":"<20230712160802.998150-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-12T16:08:02","name":"Fix part of PR 110293: `A NEEQ (A NEEQ CST)` part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712160802.998150-1-apinski@marvell.com/mbox/"},{"id":119264,"url":"https://patchwork.plctlab.org/api/1.2/patches/119264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712162108.50227-1-aldyh@redhat.com/","msgid":"<20230712162108.50227-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T16:21:08","name":"[COMMITTED,range-op] Enable value/mask propagation in range-op.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712162108.50227-1-aldyh@redhat.com/mbox/"},{"id":119323,"url":"https://patchwork.plctlab.org/api/1.2/patches/119323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712184747.3213450-1-ppalka@redhat.com/","msgid":"<20230712184747.3213450-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-12T18:47:47","name":"c++: non-standalone surrogate call template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712184747.3213450-1-ppalka@redhat.com/mbox/"},{"id":119325,"url":"https://patchwork.plctlab.org/api/1.2/patches/119325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aRuKRYpydsdxmfLOuGgcuO08FXgeyD6AQt=0jjfQV1_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T19:11:50","name":"[committed] IRA+LRA: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aRuKRYpydsdxmfLOuGgcuO08FXgeyD6AQt=0jjfQV1_g@mail.gmail.com/mbox/"},{"id":119328,"url":"https://patchwork.plctlab.org/api/1.2/patches/119328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712200500.1914419-1-jwakely@redhat.com/","msgid":"<20230712200500.1914419-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-12T20:04:38","name":"[committed] libstdc++: Check conversion from filesystem::path to wide strings [PR95048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712200500.1914419-1-jwakely@redhat.com/mbox/"},{"id":119333,"url":"https://patchwork.plctlab.org/api/1.2/patches/119333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sPmfwnyQq4C2AQHgMbm6uxggVFGFK63_Q=yyXC+KCwTOA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T20:59:30","name":"RISC-V: Folding memory for FP + constant case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sPmfwnyQq4C2AQHgMbm6uxggVFGFK63_Q=yyXC+KCwTOA@mail.gmail.com/mbox/"},{"id":119346,"url":"https://patchwork.plctlab.org/api/1.2/patches/119346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-1-aldyh@redhat.com/","msgid":"<20230712211528.65888-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T21:15:27","name":"[COMMITTED,range-op] Take known set bits into account in popcount [PR107053]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-1-aldyh@redhat.com/mbox/"},{"id":119347,"url":"https://patchwork.plctlab.org/api/1.2/patches/119347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-2-aldyh@redhat.com/","msgid":"<20230712211528.65888-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T21:15:29","name":"[COMMITTED,range-op] Take known mask into account for bitwise ands [PR107043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-2-aldyh@redhat.com/mbox/"},{"id":119414,"url":"https://patchwork.plctlab.org/api/1.2/patches/119414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK83jHIDeUA9U1LU@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-12T23:30:20","name":"Loop-ch improvements, part 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK83jHIDeUA9U1LU@kam.mff.cuni.cz/mbox/"},{"id":119457,"url":"https://patchwork.plctlab.org/api/1.2/patches/119457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-1-kmatsui@gcc.gnu.org/","msgid":"<20230713011127.98367-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:11:25","name":"[v3,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119458,"url":"https://patchwork.plctlab.org/api/1.2/patches/119458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-2-kmatsui@gcc.gnu.org/","msgid":"<20230713011127.98367-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:11:26","name":"[v3,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119466,"url":"https://patchwork.plctlab.org/api/1.2/patches/119466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-1-kmatsui@gcc.gnu.org/","msgid":"<20230713014351.6442-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:43:50","name":"[v2,1/2] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119467,"url":"https://patchwork.plctlab.org/api/1.2/patches/119467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-2-kmatsui@gcc.gnu.org/","msgid":"<20230713014351.6442-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:43:51","name":"[v2,2/2] libstdc++: Use new built-in trait __is_signed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119483,"url":"https://patchwork.plctlab.org/api/1.2/patches/119483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-2-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:35","name":"[v10,1/5] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119482,"url":"https://patchwork.plctlab.org/api/1.2/patches/119482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-3-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:36","name":"[v10,2/5] libstdc++: Use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-3-kmatsui@gcc.gnu.org/mbox/"},{"id":119484,"url":"https://patchwork.plctlab.org/api/1.2/patches/119484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-4-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:37","name":"[v10,3/5] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-4-kmatsui@gcc.gnu.org/mbox/"},{"id":119485,"url":"https://patchwork.plctlab.org/api/1.2/patches/119485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-5-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:38","name":"[v10,4/5] libstdc++: Use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-5-kmatsui@gcc.gnu.org/mbox/"},{"id":119486,"url":"https://patchwork.plctlab.org/api/1.2/patches/119486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-6-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:39","name":"[v10,5/5] libstdc++: Make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-6-kmatsui@gcc.gnu.org/mbox/"},{"id":119490,"url":"https://patchwork.plctlab.org/api/1.2/patches/119490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-1-kmatsui@gcc.gnu.org/","msgid":"<20230713031601.17787-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:16:00","name":"[v4,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119492,"url":"https://patchwork.plctlab.org/api/1.2/patches/119492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-2-kmatsui@gcc.gnu.org/","msgid":"<20230713031601.17787-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:16:01","name":"[v4,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119494,"url":"https://patchwork.plctlab.org/api/1.2/patches/119494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-1-kmatsui@gcc.gnu.org/","msgid":"<20230713031901.18162-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:19:00","name":"[v5,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119497,"url":"https://patchwork.plctlab.org/api/1.2/patches/119497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-2-kmatsui@gcc.gnu.org/","msgid":"<20230713031901.18162-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:19:01","name":"[v5,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119540,"url":"https://patchwork.plctlab.org/api/1.2/patches/119540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713050235.2864130-1-pan2.li@intel.com/","msgid":"<20230713050235.2864130-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-13T05:02:35","name":"[v3] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713050235.2864130-1-pan2.li@intel.com/mbox/"},{"id":119541,"url":"https://patchwork.plctlab.org/api/1.2/patches/119541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051001.2869210-1-pan2.li@intel.com/","msgid":"<20230713051001.2869210-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-13T05:10:01","name":"[v2] RISC-V: Add more tests for RVV floating-point FRM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051001.2869210-1-pan2.li@intel.com/mbox/"},{"id":119543,"url":"https://patchwork.plctlab.org/api/1.2/patches/119543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051716.3099259-1-juzhe.zhong@rivai.ai/","msgid":"<20230713051716.3099259-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T05:17:16","name":"SSA MATH: Support COND_LEN_FMA for floating-point math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051716.3099259-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119551,"url":"https://patchwork.plctlab.org/api/1.2/patches/119551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-1-monk.chiang@sifive.com/","msgid":"<20230713053856.101950-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-07-13T05:38:55","name":"[1/2] RISC-V: Recognized zihintntl extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-1-monk.chiang@sifive.com/mbox/"},{"id":119552,"url":"https://patchwork.plctlab.org/api/1.2/patches/119552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-2-monk.chiang@sifive.com/","msgid":"<20230713053856.101950-2-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-07-13T05:38:56","name":"[2/2] RISC-V: Implement locality for __builtin_prefetch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-2-monk.chiang@sifive.com/mbox/"},{"id":119559,"url":"https://patchwork.plctlab.org/api/1.2/patches/119559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-2-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:32","name":"[1/4] Support Intel AVX-VNNI-INT16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-2-haochen.jiang@intel.com/mbox/"},{"id":119557,"url":"https://patchwork.plctlab.org/api/1.2/patches/119557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-3-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:33","name":"[2/4] Support Intel SM3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-3-haochen.jiang@intel.com/mbox/"},{"id":119558,"url":"https://patchwork.plctlab.org/api/1.2/patches/119558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-4-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:34","name":"[3/4] Support Intel SHA512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-4-haochen.jiang@intel.com/mbox/"},{"id":119556,"url":"https://patchwork.plctlab.org/api/1.2/patches/119556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-5-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:35","name":"[4/4] Support Intel SM4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-5-haochen.jiang@intel.com/mbox/"},{"id":119560,"url":"https://patchwork.plctlab.org/api/1.2/patches/119560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713061208.916308-1-yanzhang.wang@intel.com/","msgid":"<20230713061208.916308-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:12:08","name":"RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713061208.916308-1-yanzhang.wang@intel.com/mbox/"},{"id":119561,"url":"https://patchwork.plctlab.org/api/1.2/patches/119561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713063142.66310-1-chenyixuan@iscas.ac.cn/","msgid":"<20230713063142.66310-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-07-13T06:31:42","name":"Add VXRM enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713063142.66310-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":119629,"url":"https://patchwork.plctlab.org/api/1.2/patches/119629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713083209.49847-1-lehua.ding@rivai.ai/","msgid":"<20230713083209.49847-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-13T08:32:09","name":"[V2] RISC-V: Throw compilation error for unknown sub-extension or supervisor extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713083209.49847-1-lehua.ding@rivai.ai/mbox/"},{"id":119669,"url":"https://patchwork.plctlab.org/api/1.2/patches/119669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-2-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:23","name":"[01/14] fortran: Outline final procedure pointer evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-2-mikael@gcc.gnu.org/mbox/"},{"id":119671,"url":"https://patchwork.plctlab.org/api/1.2/patches/119671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-3-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:24","name":"[02/14] fortran: Outline element size evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-3-mikael@gcc.gnu.org/mbox/"},{"id":119672,"url":"https://patchwork.plctlab.org/api/1.2/patches/119672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-4-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:25","name":"[03/14] fortran: Outline data reference descriptor evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-4-mikael@gcc.gnu.org/mbox/"},{"id":119673,"url":"https://patchwork.plctlab.org/api/1.2/patches/119673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-5-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-5-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:26","name":"[04/14] fortran: Inline gfc_build_final_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-5-mikael@gcc.gnu.org/mbox/"},{"id":119679,"url":"https://patchwork.plctlab.org/api/1.2/patches/119679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-6-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-6-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:27","name":"[05/14] fortran: Add missing cleanup blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-6-mikael@gcc.gnu.org/mbox/"},{"id":119675,"url":"https://patchwork.plctlab.org/api/1.2/patches/119675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-7-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-7-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:28","name":"[06/14] fortran: Reuse final procedure pointer expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-7-mikael@gcc.gnu.org/mbox/"},{"id":119670,"url":"https://patchwork.plctlab.org/api/1.2/patches/119670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-8-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-8-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:29","name":"[07/14] fortran: Push element size expression generation close to its usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-8-mikael@gcc.gnu.org/mbox/"},{"id":119684,"url":"https://patchwork.plctlab.org/api/1.2/patches/119684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-9-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-9-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:30","name":"[08/14] fortran: Push final procedure expr gen close to its one usage.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-9-mikael@gcc.gnu.org/mbox/"},{"id":119690,"url":"https://patchwork.plctlab.org/api/1.2/patches/119690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-10-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-10-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:31","name":"[09/14] fortran: Inline variable definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-10-mikael@gcc.gnu.org/mbox/"},{"id":119685,"url":"https://patchwork.plctlab.org/api/1.2/patches/119685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-11-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-11-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:32","name":"[10/14] fortran: Remove redundant argument in get_var_descr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-11-mikael@gcc.gnu.org/mbox/"},{"id":119674,"url":"https://patchwork.plctlab.org/api/1.2/patches/119674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-12-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-12-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:33","name":"[11/14] fortran: Outline virtual table pointer evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-12-mikael@gcc.gnu.org/mbox/"},{"id":119682,"url":"https://patchwork.plctlab.org/api/1.2/patches/119682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-13-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-13-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:34","name":"[12/14] fortran: Factor scalar descriptor generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-13-mikael@gcc.gnu.org/mbox/"},{"id":119694,"url":"https://patchwork.plctlab.org/api/1.2/patches/119694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-14-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-14-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:35","name":"[13/14] fortran: Use pre-evaluated class container if available [PR110618]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-14-mikael@gcc.gnu.org/mbox/"},{"id":119695,"url":"https://patchwork.plctlab.org/api/1.2/patches/119695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-15-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-15-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:36","name":"[14/14] fortran: Pass pre-calculated class container argument [pr110618]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-15-mikael@gcc.gnu.org/mbox/"},{"id":119692,"url":"https://patchwork.plctlab.org/api/1.2/patches/119692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085434.3381643-1-juzhe.zhong@rivai.ai/","msgid":"<20230713085434.3381643-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T08:54:34","name":"[V2] SSA MATH: Support COND_LEN_FMA for floating-point math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085434.3381643-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119699,"url":"https://patchwork.plctlab.org/api/1.2/patches/119699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf9srxhj.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-07-13T09:07:04","name":"m2, build: Use LDLFAGS for mklink","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf9srxhj.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":119734,"url":"https://patchwork.plctlab.org/api/1.2/patches/119734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713095402.E26EA385770D@sourceware.org/","msgid":"<20230713095402.E26EA385770D@sourceware.org>","list_archive_url":null,"date":"2023-07-13T09:53:14","name":"[RFC] tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713095402.E26EA385770D@sourceware.org/mbox/"},{"id":119755,"url":"https://patchwork.plctlab.org/api/1.2/patches/119755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-1-christophe.lyon@linaro.org/","msgid":"<20230713102140.1161573-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:21:39","name":"[1/2,testsuite,arm] : Make nomve_fp_1.c require arm_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-1-christophe.lyon@linaro.org/mbox/"},{"id":119756,"url":"https://patchwork.plctlab.org/api/1.2/patches/119756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-2-christophe.lyon@linaro.org/","msgid":"<20230713102140.1161573-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:21:40","name":"[2/2,testsuite,arm] : Make mve_fp_fpu[12].c accept single or double precision FPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-2-christophe.lyon@linaro.org/mbox/"},{"id":119758,"url":"https://patchwork.plctlab.org/api/1.2/patches/119758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-1-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:19","name":"[1/6] arm: [MVE intrinsics] Factorize vcaddq vhcaddq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-1-christophe.lyon@linaro.org/mbox/"},{"id":119764,"url":"https://patchwork.plctlab.org/api/1.2/patches/119764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-2-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:20","name":"[2/6] arm: [MVE intrinsics] rework vcaddq vhcaddq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-2-christophe.lyon@linaro.org/mbox/"},{"id":119759,"url":"https://patchwork.plctlab.org/api/1.2/patches/119759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-3-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:21","name":"[3/6] arm: [MVE intrinsics factorize vcmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-3-christophe.lyon@linaro.org/mbox/"},{"id":119761,"url":"https://patchwork.plctlab.org/api/1.2/patches/119761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-4-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:22","name":"[4/6] arm: [MVE intrinsics] rework vcmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-4-christophe.lyon@linaro.org/mbox/"},{"id":119760,"url":"https://patchwork.plctlab.org/api/1.2/patches/119760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-5-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:23","name":"[5/6] arm: [MVE intrinsics] factorize vcmlaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-5-christophe.lyon@linaro.org/mbox/"},{"id":119757,"url":"https://patchwork.plctlab.org/api/1.2/patches/119757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-6-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:24","name":"[6/6] arm: [MVE intrinsics] rework vcmlaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-6-christophe.lyon@linaro.org/mbox/"},{"id":119767,"url":"https://patchwork.plctlab.org/api/1.2/patches/119767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7abbe5a-2b77-00e6-a2ba-b390891d2a99@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T10:30:25","name":"vect: Handle demoting FLOAT and promoting FIX_TRUNC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7abbe5a-2b77-00e6-a2ba-b390891d2a99@gmail.com/mbox/"},{"id":119771,"url":"https://patchwork.plctlab.org/api/1.2/patches/119771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa222b94-ad9e-8c44-f99b-fbd8b8dc9d82@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T10:54:00","name":"[OpenACC,2.7,v2] Implement host_data must have use_device clause requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa222b94-ad9e-8c44-f99b-fbd8b8dc9d82@siemens.com/mbox/"},{"id":119786,"url":"https://patchwork.plctlab.org/api/1.2/patches/119786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713113247.249532-1-juzhe.zhong@rivai.ai/","msgid":"<20230713113247.249532-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T11:32:47","name":"RISC-V: Enable COND_LEN_FMA auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713113247.249532-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119879,"url":"https://patchwork.plctlab.org/api/1.2/patches/119879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713132017.3289546-1-ppalka@redhat.com/","msgid":"<20230713132017.3289546-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-13T13:20:17","name":"c++: mangling template-id of unknown template [PR110524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713132017.3289546-1-ppalka@redhat.com/mbox/"},{"id":119917,"url":"https://patchwork.plctlab.org/api/1.2/patches/119917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-2-manolis.tsamis@vrull.eu/","msgid":"<20230713140904.3274306-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:09:03","name":"[v2,1/2] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-2-manolis.tsamis@vrull.eu/mbox/"},{"id":119918,"url":"https://patchwork.plctlab.org/api/1.2/patches/119918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-3-manolis.tsamis@vrull.eu/","msgid":"<20230713140904.3274306-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:09:04","name":"[v2,2/2] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-3-manolis.tsamis@vrull.eu/mbox/"},{"id":119923,"url":"https://patchwork.plctlab.org/api/1.2/patches/119923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713141336.3950751-1-manolis.tsamis@vrull.eu/","msgid":"<20230713141336.3950751-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:13:36","name":"[v3] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713141336.3950751-1-manolis.tsamis@vrull.eu/mbox/"},{"id":119948,"url":"https://patchwork.plctlab.org/api/1.2/patches/119948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ade5eae2-b01d-1b8c-7c73-24e8192202fe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T14:52:44","name":"[pushed,RA,PR109520] : Catch error when there are no enough registers for asm insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ade5eae2-b01d-1b8c-7c73-24e8192202fe@redhat.com/mbox/"},{"id":120018,"url":"https://patchwork.plctlab.org/api/1.2/patches/120018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bhA8NxhyeZrngN6n9hM+JHRpZK+dF+Wfet1pEM+4KzUQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T16:39:41","name":"[committed] alpha: Fix computation mode in alpha_emit_set_long_cost [PR106966]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bhA8NxhyeZrngN6n9hM+JHRpZK+dF+Wfet1pEM+4KzUQ@mail.gmail.com/mbox/"},{"id":120020,"url":"https://patchwork.plctlab.org/api/1.2/patches/120020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com/","msgid":"<03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-13T16:45:13","name":"[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com/mbox/"},{"id":120025,"url":"https://patchwork.plctlab.org/api/1.2/patches/120025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713164756.3558785-2-mikpelinux@gmail.com/","msgid":"<20230713164756.3558785-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-07-13T16:47:57","name":"fix pdp11_expand_epilogue (PR target/107841)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713164756.3558785-2-mikpelinux@gmail.com/mbox/"},{"id":120031,"url":"https://patchwork.plctlab.org/api/1.2/patches/120031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713165948.1993395-1-jwakely@redhat.com/","msgid":"<20230713165948.1993395-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-13T16:59:30","name":"[committed] libstdc++: std::stoi etc. do not need C99 support [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713165948.1993395-1-jwakely@redhat.com/mbox/"},{"id":120055,"url":"https://patchwork.plctlab.org/api/1.2/patches/120055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com/","msgid":"<042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-13T17:10:47","name":"[x86] PR target/110588: Add *bt_setncqi_2 to generate btl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com/mbox/"},{"id":120084,"url":"https://patchwork.plctlab.org/api/1.2/patches/120084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713184923.3699777-1-ppalka@redhat.com/","msgid":"<20230713184923.3699777-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-13T18:49:23","name":"c++: copy elision of object arg in static memfn call [PR110441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713184923.3699777-1-ppalka@redhat.com/mbox/"},{"id":120086,"url":"https://patchwork.plctlab.org/api/1.2/patches/120086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLBIYYzqbMkt+HaZ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T18:54:25","name":"[v2] c++: wrong error with static constexpr var in tmpl [PR109876]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLBIYYzqbMkt+HaZ@redhat.com/mbox/"},{"id":120093,"url":"https://patchwork.plctlab.org/api/1.2/patches/120093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713191744.46960-1-iain@sandoe.co.uk/","msgid":"<20230713191744.46960-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-13T19:17:44","name":"[pushed] Darwin: Use -platform_version when available [PR110624].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713191744.46960-1-iain@sandoe.co.uk/mbox/"},{"id":120104,"url":"https://patchwork.plctlab.org/api/1.2/patches/120104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-1-kmatsui@gcc.gnu.org/","msgid":"<20230713204823.22303-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T20:48:22","name":"[v6,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120105,"url":"https://patchwork.plctlab.org/api/1.2/patches/120105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-2-kmatsui@gcc.gnu.org/","msgid":"<20230713204823.22303-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T20:48:23","name":"[v6,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-2-kmatsui@gcc.gnu.org/mbox/"},{"id":120119,"url":"https://patchwork.plctlab.org/api/1.2/patches/120119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713221709.3893367-1-juzhe.zhong@rivai.ai/","msgid":"<20230713221709.3893367-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T22:17:09","name":"[V2] RISC-V: Enable COND_LEN_FMA auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713221709.3893367-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120186,"url":"https://patchwork.plctlab.org/api/1.2/patches/120186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714020205.16214-1-lidie@eswincomputing.com/","msgid":"<20230714020205.16214-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-07-14T02:02:05","name":"RISC-V: Remove the redundant expressions in the and3.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714020205.16214-1-lidie@eswincomputing.com/mbox/"},{"id":120187,"url":"https://patchwork.plctlab.org/api/1.2/patches/120187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de/","msgid":"<467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de>","list_archive_url":null,"date":"2023-07-14T02:08:41","name":"[SH,committed] Fix PR 101469","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de/mbox/"},{"id":120197,"url":"https://patchwork.plctlab.org/api/1.2/patches/120197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025024.1408869-1-pan2.li@intel.com/","msgid":"<20230714025024.1408869-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-14T02:50:24","name":"[v1] RISC-V: Support basic floating-point dynamic rounding mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025024.1408869-1-pan2.li@intel.com/mbox/"},{"id":120200,"url":"https://patchwork.plctlab.org/api/1.2/patches/120200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025246.1757367-1-zewei.mo@intel.com/","msgid":"<20230714025246.1757367-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-14T02:52:46","name":"Initial Lunar Lake, Arrow Lake and Arrow Lake S Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025246.1757367-1-zewei.mo@intel.com/mbox/"},{"id":120249,"url":"https://patchwork.plctlab.org/api/1.2/patches/120249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714054908.1071907-1-naveenh@marvell.com/","msgid":"<20230714054908.1071907-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-07-14T05:49:08","name":"Implement Bit-field lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714054908.1071907-1-naveenh@marvell.com/mbox/"},{"id":120258,"url":"https://patchwork.plctlab.org/api/1.2/patches/120258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YrNr8GovPOMAhP29hw0edQeF7eBSKFif3NRu4RYF69+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T06:22:51","name":"cprop: Do not set REG_EQUAL note when simplifying paradoxical subreg [PR110206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YrNr8GovPOMAhP29hw0edQeF7eBSKFif3NRu4RYF69+A@mail.gmail.com/mbox/"},{"id":120259,"url":"https://patchwork.plctlab.org/api/1.2/patches/120259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714062413.2277485-1-haochen.jiang@intel.com/","msgid":"<20230714062413.2277485-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-14T06:24:13","name":"i386: Auto vectorize usdot_prod, udot_prod with AVXVNNIINT16 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714062413.2277485-1-haochen.jiang@intel.com/mbox/"},{"id":120329,"url":"https://patchwork.plctlab.org/api/1.2/patches/120329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714083530.F2E79138F8@imap2.suse-dmz.suse.de/","msgid":"<20230714083530.F2E79138F8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-14T08:35:30","name":"Provide extra checking for phi argument access from edge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714083530.F2E79138F8@imap2.suse-dmz.suse.de/mbox/"},{"id":120375,"url":"https://patchwork.plctlab.org/api/1.2/patches/120375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com/","msgid":"<620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com>","list_archive_url":null,"date":"2023-07-14T09:40:11","name":"x86: slightly enhance \"vec_dupv2df\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com/mbox/"},{"id":120376,"url":"https://patchwork.plctlab.org/api/1.2/patches/120376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7767255-af05-c9ab-aa54-107f02da8f32@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T09:42:11","name":"x86: avoid maybe_gen_...()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7767255-af05-c9ab-aa54-107f02da8f32@suse.com/mbox/"},{"id":120377,"url":"https://patchwork.plctlab.org/api/1.2/patches/120377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com/","msgid":"<28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com>","list_archive_url":null,"date":"2023-07-14T09:44:16","name":"x86: replace \"extendhfdf2\" expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com/mbox/"},{"id":120425,"url":"https://patchwork.plctlab.org/api/1.2/patches/120425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c17b2b7d-f5bc-df4e-e4a2-3fec01c08e2c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T11:20:42","name":"[committed] libgomp.texi: Extend memory allocation documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c17b2b7d-f5bc-df4e-e4a2-3fec01c08e2c@codesourcery.com/mbox/"},{"id":120445,"url":"https://patchwork.plctlab.org/api/1.2/patches/120445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8emptx6.fsf@oracle.com/","msgid":"<87v8emptx6.fsf@oracle.com>","list_archive_url":null,"date":"2023-07-14T12:19:17","name":"[COMMITTED] bpf: enable instruction scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8emptx6.fsf@oracle.com/mbox/"},{"id":120446,"url":"https://patchwork.plctlab.org/api/1.2/patches/120446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLE+G4KvU7loJtji@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-14T12:22:51","name":"Loop-ch improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLE+G4KvU7loJtji@kam.mff.cuni.cz/mbox/"},{"id":120455,"url":"https://patchwork.plctlab.org/api/1.2/patches/120455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714123038.1017670-1-juzhe.zhong@rivai.ai/","msgid":"<20230714123038.1017670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-14T12:30:38","name":"RISC-V: Support non-SLP unordered reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714123038.1017670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120475,"url":"https://patchwork.plctlab.org/api/1.2/patches/120475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714132050.2728477-1-pan2.li@intel.com/","msgid":"<20230714132050.2728477-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-14T13:20:50","name":"[v1] RISC-V: Fix RVV frm run test failure on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714132050.2728477-1-pan2.li@intel.com/mbox/"},{"id":120507,"url":"https://patchwork.plctlab.org/api/1.2/patches/120507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLFa4p55G/H78vE2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-14T14:25:38","name":"Turn TODO_rebuild_frequencies to a pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLFa4p55G/H78vE2@kam.mff.cuni.cz/mbox/"},{"id":120526,"url":"https://patchwork.plctlab.org/api/1.2/patches/120526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com/","msgid":"<7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com>","list_archive_url":null,"date":"2023-07-14T15:11:25","name":"vectorizer: Avoid an OOB access from vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com/mbox/"},{"id":120528,"url":"https://patchwork.plctlab.org/api/1.2/patches/120528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com/","msgid":"<632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com>","list_archive_url":null,"date":"2023-07-14T15:16:41","name":"[v2] vect: Handle demoting FLOAT and promoting FIX_TRUNC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com/mbox/"},{"id":120539,"url":"https://patchwork.plctlab.org/api/1.2/patches/120539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jm6sd0d.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T15:56:18","name":"[WIP,RFC] Add support for keyword-based attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jm6sd0d.fsf@arm.com/mbox/"},{"id":120555,"url":"https://patchwork.plctlab.org/api/1.2/patches/120555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-1-julian@codesourcery.com/","msgid":"<20230714163340.3464603-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-14T16:33:39","name":"[og13] OpenMP: Dimension ordering for array-shaping operator for C and C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-1-julian@codesourcery.com/mbox/"},{"id":120554,"url":"https://patchwork.plctlab.org/api/1.2/patches/120554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-2-julian@codesourcery.com/","msgid":"<20230714163340.3464603-2-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-14T16:33:40","name":"[og13] OpenMP: Enable c-c++-common/gomp/declare-mapper-3.c for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-2-julian@codesourcery.com/mbox/"},{"id":120681,"url":"https://patchwork.plctlab.org/api/1.2/patches/120681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com/","msgid":"<001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-14T18:56:22","name":"Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com/mbox/"},{"id":120696,"url":"https://patchwork.plctlab.org/api/1.2/patches/120696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714205542.1131700-1-apinski@marvell.com/","msgid":"<20230714205542.1131700-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-14T20:55:42","name":"Fix PR 110666: `(a != 2) == a` produces wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714205542.1131700-1-apinski@marvell.com/mbox/"},{"id":120700,"url":"https://patchwork.plctlab.org/api/1.2/patches/120700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714223744.264094-1-jason@redhat.com/","msgid":"<20230714223744.264094-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-14T22:37:44","name":"[pushed] c++: c++26 regression fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714223744.264094-1-jason@redhat.com/mbox/"},{"id":120704,"url":"https://patchwork.plctlab.org/api/1.2/patches/120704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714234500.75826-1-juzhe.zhong@rivai.ai/","msgid":"<20230714234500.75826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-14T23:45:00","name":"VECT: Add mask_len_fold_left_plus for in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714234500.75826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120717,"url":"https://patchwork.plctlab.org/api/1.2/patches/120717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1ji6ky5.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-07-15T01:08:02","name":"[v3] Introduce attribute reverse_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1ji6ky5.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":120728,"url":"https://patchwork.plctlab.org/api/1.2/patches/120728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715030156.26231-1-kmatsui@gcc.gnu.org/","msgid":"<20230715030156.26231-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T03:01:56","name":"libstdc++: Use __bool_constant entirely","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715030156.26231-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120734,"url":"https://patchwork.plctlab.org/api/1.2/patches/120734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-1-apinski@marvell.com/","msgid":"<20230715031957.1147225-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T03:19:56","name":"[1/2] Add flow_sensitive_info_storage and use it in gimple-fold.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-1-apinski@marvell.com/mbox/"},{"id":120735,"url":"https://patchwork.plctlab.org/api/1.2/patches/120735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-2-apinski@marvell.com/","msgid":"<20230715031957.1147225-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T03:19:57","name":"[2/2] Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info during match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-2-apinski@marvell.com/mbox/"},{"id":120750,"url":"https://patchwork.plctlab.org/api/1.2/patches/120750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-1-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:17","name":"[v2,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120751,"url":"https://patchwork.plctlab.org/api/1.2/patches/120751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-2-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:18","name":"[v2,2/3] libstdc++: Optimize is_arithmetic performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-2-kmatsui@gcc.gnu.org/mbox/"},{"id":120752,"url":"https://patchwork.plctlab.org/api/1.2/patches/120752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-3-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:19","name":"[v2,3/3] libstdc++: Optimize is_fundamental performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-3-kmatsui@gcc.gnu.org/mbox/"},{"id":120815,"url":"https://patchwork.plctlab.org/api/1.2/patches/120815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLLZwxcjxOxbEPVL@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-15T17:39:15","name":"[committed] hppa: Modify TLS patterns to provide both 32 and 64-bit support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLLZwxcjxOxbEPVL@mx3210.localdomain/mbox/"},{"id":120852,"url":"https://patchwork.plctlab.org/api/1.2/patches/120852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715213610.1191532-1-apinski@marvell.com/","msgid":"<20230715213610.1191532-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T21:36:10","name":"Update my contrib entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715213610.1191532-1-apinski@marvell.com/mbox/"},{"id":120869,"url":"https://patchwork.plctlab.org/api/1.2/patches/120869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230716021622.2831938-1-pan2.li@intel.com/","msgid":"<20230716021622.2831938-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-16T02:16:22","name":"[v1|GCC-13] RISC-V: Bugfix for riscv-vsetvl pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230716021622.2831938-1-pan2.li@intel.com/mbox/"},{"id":120927,"url":"https://patchwork.plctlab.org/api/1.2/patches/120927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-442fa3d0-10b8-415b-a161-a5821d474fdb-1689539459265@3c-app-gmx-bap40/","msgid":"","list_archive_url":null,"date":"2023-07-16T20:30:59","name":"Fortran: intrinsics and deferred-length character arguments [PR95947,PR110658]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-442fa3d0-10b8-415b-a161-a5821d474fdb-1689539459265@3c-app-gmx-bap40/mbox/"},{"id":120985,"url":"https://patchwork.plctlab.org/api/1.2/patches/120985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com/","msgid":"<8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com>","list_archive_url":null,"date":"2023-07-17T02:22:32","name":"vect: Initialize new_temp to avoid false positive warning [PR110652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com/mbox/"},{"id":120997,"url":"https://patchwork.plctlab.org/api/1.2/patches/120997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717024247.1263484-1-apinski@marvell.com/","msgid":"<20230717024247.1263484-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-17T02:42:47","name":"PR 95923: More (boolean) bitop simplifications in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717024247.1263484-1-apinski@marvell.com/mbox/"},{"id":121017,"url":"https://patchwork.plctlab.org/api/1.2/patches/121017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717033334.2376251-1-haochen.jiang@intel.com/","msgid":"<20230717033334.2376251-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-17T03:33:34","name":"[gcc-wwwdocs] gcc-13/14: Mention Intel new ISA and march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717033334.2376251-1-haochen.jiang@intel.com/mbox/"},{"id":121022,"url":"https://patchwork.plctlab.org/api/1.2/patches/121022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc59eb5-eaff-cb23-328e-2bfff6fcccc6@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T03:40:57","name":"[V2] rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc59eb5-eaff-cb23-328e-2bfff6fcccc6@linux.vnet.ibm.com/mbox/"},{"id":121045,"url":"https://patchwork.plctlab.org/api/1.2/patches/121045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717060423.31423-1-juzhe.zhong@rivai.ai/","msgid":"<20230717060423.31423-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T06:04:23","name":"RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717060423.31423-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121058,"url":"https://patchwork.plctlab.org/api/1.2/patches/121058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717062828.47511-1-juzhe.zhong@rivai.ai/","msgid":"<20230717062828.47511-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T06:28:28","name":"[V2] RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717062828.47511-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121080,"url":"https://patchwork.plctlab.org/api/1.2/patches/121080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-1-aldyh@redhat.com/","msgid":"<20230717071603.242424-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:16:02","name":"[COMMITTED] Normalize irange_bitmask before union/intersect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-1-aldyh@redhat.com/mbox/"},{"id":121081,"url":"https://patchwork.plctlab.org/api/1.2/patches/121081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-2-aldyh@redhat.com/","msgid":"<20230717071603.242424-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:16:03","name":"[COMMITTED] Add global setter for value/mask pair for SSA names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-2-aldyh@redhat.com/mbox/"},{"id":121100,"url":"https://patchwork.plctlab.org/api/1.2/patches/121100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717074838.2724136-1-hongtao.liu@intel.com/","msgid":"<20230717074838.2724136-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-17T07:48:38","name":"Remove # from one_cmpl2 assemble output.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717074838.2724136-1-hongtao.liu@intel.com/mbox/"},{"id":121101,"url":"https://patchwork.plctlab.org/api/1.2/patches/121101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075645.243653-1-aldyh@redhat.com/","msgid":"<20230717075645.243653-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:56:45","name":"Export value/mask known bits from CCP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075645.243653-1-aldyh@redhat.com/mbox/"},{"id":121102,"url":"https://patchwork.plctlab.org/api/1.2/patches/121102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075834.244277-1-aldyh@redhat.com/","msgid":"<20230717075834.244277-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:58:35","name":"Export value/mask known bits from IPA.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075834.244277-1-aldyh@redhat.com/mbox/"},{"id":121114,"url":"https://patchwork.plctlab.org/api/1.2/patches/121114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmh6q3dkh6.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-07-17T08:13:09","name":"Use substituted GDCFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmh6q3dkh6.fsf@suse.de/mbox/"},{"id":121115,"url":"https://patchwork.plctlab.org/api/1.2/patches/121115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717082039.024683858D39@sourceware.org/","msgid":"<20230717082039.024683858D39@sourceware.org>","list_archive_url":null,"date":"2023-07-17T08:19:40","name":"tree-optimization/110669 - bogus matching of loop bitop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717082039.024683858D39@sourceware.org/mbox/"},{"id":121116,"url":"https://patchwork.plctlab.org/api/1.2/patches/121116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717081946.187709-1-juzhe.zhong@rivai.ai/","msgid":"<20230717081946.187709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T08:19:46","name":"[V2] RISC-V: Support non-SLP unordered reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717081946.187709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121135,"url":"https://patchwork.plctlab.org/api/1.2/patches/121135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717085915.2570743-1-christoph.muellner@vrull.eu/","msgid":"<20230717085915.2570743-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-17T08:59:15","name":"riscv: Fix warning in riscv_regno_ok_for_index_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717085915.2570743-1-christoph.muellner@vrull.eu/mbox/"},{"id":121137,"url":"https://patchwork.plctlab.org/api/1.2/patches/121137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-2-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-2-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:42","name":"[1/9] Native complex operations: Conditional lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-2-snoiry@kalrayinc.com/mbox/"},{"id":121138,"url":"https://patchwork.plctlab.org/api/1.2/patches/121138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-3-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-3-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:43","name":"[2/9] Native complex operations: Move functions to hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-3-snoiry@kalrayinc.com/mbox/"},{"id":121139,"url":"https://patchwork.plctlab.org/api/1.2/patches/121139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-4-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-4-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:44","name":"[3/9] Native complex operations: Add gen_rtx_complex hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-4-snoiry@kalrayinc.com/mbox/"},{"id":121140,"url":"https://patchwork.plctlab.org/api/1.2/patches/121140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-5-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-5-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:45","name":"[4/9] Native complex operations: Allow native complex regs and ops in rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-5-snoiry@kalrayinc.com/mbox/"},{"id":121142,"url":"https://patchwork.plctlab.org/api/1.2/patches/121142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-6-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-6-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:46","name":"[5/9] Native complex operations: Add the conjugate op in optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-6-snoiry@kalrayinc.com/mbox/"},{"id":121143,"url":"https://patchwork.plctlab.org/api/1.2/patches/121143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-7-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-7-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:47","name":"[6/9] Native complex operations: Update how complex rotations are handled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-7-snoiry@kalrayinc.com/mbox/"},{"id":121144,"url":"https://patchwork.plctlab.org/api/1.2/patches/121144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-8-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-8-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:48","name":"[7/9] Native complex operations: Vectorization of native complex operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-8-snoiry@kalrayinc.com/mbox/"},{"id":121141,"url":"https://patchwork.plctlab.org/api/1.2/patches/121141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-9-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-9-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:49","name":"[8/9] Native complex operations: Add explicit vector of complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-9-snoiry@kalrayinc.com/mbox/"},{"id":121145,"url":"https://patchwork.plctlab.org/api/1.2/patches/121145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-10-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-10-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:50","name":"[9/9] Native complex operation: Experimental support in x86 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-10-snoiry@kalrayinc.com/mbox/"},{"id":121161,"url":"https://patchwork.plctlab.org/api/1.2/patches/121161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717095259.326307-1-lehua.ding@rivai.ai/","msgid":"<20230717095259.326307-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-17T09:52:59","name":"RISC-V: Ensure all implied extensions are included[PR110696]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717095259.326307-1-lehua.ding@rivai.ai/mbox/"},{"id":121188,"url":"https://patchwork.plctlab.org/api/1.2/patches/121188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZbRiErCZ1pnYK@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:35:25","name":"Fix optimize_mask_stores profile update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZbRiErCZ1pnYK@kam.mff.cuni.cz/mbox/"},{"id":121190,"url":"https://patchwork.plctlab.org/api/1.2/patches/121190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZijWxHsRaiHC5@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:35:54","name":"Fix profile update in scale_profile_for_vect_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZijWxHsRaiHC5@kam.mff.cuni.cz/mbox/"},{"id":121193,"url":"https://patchwork.plctlab.org/api/1.2/patches/121193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZqJ1lJpCFTWCi@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:36:24","name":"Avoid double profile udpate in try_peel_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZqJ1lJpCFTWCi@kam.mff.cuni.cz/mbox/"},{"id":121245,"url":"https://patchwork.plctlab.org/api/1.2/patches/121245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnk_N=tgPNBhUu91yt8YN0HcCoWgQQYpshHMqhU=6WgAQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T12:14:13","name":"[RFC,v2] Extend fold_vec_perm to handle VLA vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnk_N=tgPNBhUu91yt8YN0HcCoWgQQYpshHMqhU=6WgAQ@mail.gmail.com/mbox/"},{"id":121252,"url":"https://patchwork.plctlab.org/api/1.2/patches/121252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zg3ulo91.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T12:24:26","name":"[committed] Restore bootstrap by removing unused variable in tree-ssa-loop-ivcanon.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zg3ulo91.fsf@suse.cz/mbox/"},{"id":121270,"url":"https://patchwork.plctlab.org/api/1.2/patches/121270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717123929.260814-1-juzhe.zhong@rivai.ai/","msgid":"<20230717123929.260814-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T12:39:29","name":"RTL_SSA: Relax PHI_MODE in phi_setup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717123929.260814-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121294,"url":"https://patchwork.plctlab.org/api/1.2/patches/121294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717131411.330650-1-aldyh@redhat.com/","msgid":"<20230717131411.330650-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T13:14:11","name":"Read global value/mask in IPA.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717131411.330650-1-aldyh@redhat.com/mbox/"},{"id":121311,"url":"https://patchwork.plctlab.org/api/1.2/patches/121311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com/","msgid":"<7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com>","list_archive_url":null,"date":"2023-07-17T13:26:27","name":"[committed] OpenMP/Fortran: Parsing support for '\''uses_allocators'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com/mbox/"},{"id":121356,"url":"https://patchwork.plctlab.org/api/1.2/patches/121356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717142002.295213-1-juzhe.zhong@rivai.ai/","msgid":"<20230717142002.295213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T14:20:02","name":"[V3] RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717142002.295213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121380,"url":"https://patchwork.plctlab.org/api/1.2/patches/121380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717144209.316540-1-juzhe.zhong@rivai.ai/","msgid":"<20230717144209.316540-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T14:42:09","name":"[V2] RTL_SSA: Relax PHI_MODE in phi_setup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717144209.316540-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121391,"url":"https://patchwork.plctlab.org/api/1.2/patches/121391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717150957.23119-1-jchrist@linux.ibm.com/","msgid":"<20230717150957.23119-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-07-17T15:09:57","name":"s390: Optimize vec_cmpge followed by vec_sel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717150957.23119-1-jchrist@linux.ibm.com/mbox/"},{"id":121561,"url":"https://patchwork.plctlab.org/api/1.2/patches/121561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com/","msgid":"<949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-17T19:19:57","name":"[1/2] rs6000, add argument to function find_instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com/mbox/"},{"id":121562,"url":"https://patchwork.plctlab.org/api/1.2/patches/121562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com/","msgid":"<150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-17T19:20:21","name":"[2/2,ver,4] rs6000, fix vec_replace_unaligned built-in arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com/mbox/"},{"id":121585,"url":"https://patchwork.plctlab.org/api/1.2/patches/121585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+mxPA1xc1aqf3iqz_1iYVXw-K7QZAjQduUn_3NyHGAQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T20:16:27","name":"[committed] combine: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+mxPA1xc1aqf3iqz_1iYVXw-K7QZAjQduUn_3NyHGAQ@mail.gmail.com/mbox/"},{"id":121609,"url":"https://patchwork.plctlab.org/api/1.2/patches/121609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211808.946183-1-jason@redhat.com/","msgid":"<20230717211808.946183-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T21:18:08","name":"[pushed] c++: only cache constexpr calls that are constant exprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211808.946183-1-jason@redhat.com/mbox/"},{"id":121611,"url":"https://patchwork.plctlab.org/api/1.2/patches/121611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211905.946580-1-jason@redhat.com/","msgid":"<20230717211905.946580-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T21:19:05","name":"[RFA,(fold)] c++: constexpr bit_cast with empty field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211905.946580-1-jason@redhat.com/mbox/"},{"id":121612,"url":"https://patchwork.plctlab.org/api/1.2/patches/121612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212235.2971735-1-arsen@aarsen.me/","msgid":"<20230717212235.2971735-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-07-17T21:22:28","name":"[pushed] extend.texi: index __auto_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212235.2971735-1-arsen@aarsen.me/mbox/"},{"id":121613,"url":"https://patchwork.plctlab.org/api/1.2/patches/121613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212836.23056-1-patrick@rivosinc.com/","msgid":"<20230717212836.23056-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-17T21:28:36","name":"[RFC,v2] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212836.23056-1-patrick@rivosinc.com/mbox/"},{"id":121693,"url":"https://patchwork.plctlab.org/api/1.2/patches/121693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717235711.972199-1-jason@redhat.com/","msgid":"<20230717235711.972199-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T23:57:11","name":"[FYI] c++: check for trying to cache non-constant expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717235711.972199-1-jason@redhat.com/mbox/"},{"id":121714,"url":"https://patchwork.plctlab.org/api/1.2/patches/121714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718010351.240789-1-juzhe.zhong@rivai.ai/","msgid":"<20230718010351.240789-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T01:03:51","name":"RISC-V: Enable SLP un-order reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718010351.240789-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121735,"url":"https://patchwork.plctlab.org/api/1.2/patches/121735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718024953.1343484-1-pan2.li@intel.com/","msgid":"<20230718024953.1343484-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-18T02:49:53","name":"[v2] RISC-V: Fix RVV frm run test failure on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718024953.1343484-1-pan2.li@intel.com/mbox/"},{"id":121755,"url":"https://patchwork.plctlab.org/api/1.2/patches/121755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCrSp3DKxH3cz5VrKnN73A3mRp0j8n8zwz2PVfJTsjar=Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T04:05:44","name":"Committed: Tighten regexps in gcc.target/riscv/_Float16-zhinx-1.c .","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCrSp3DKxH3cz5VrKnN73A3mRp0j8n8zwz2PVfJTsjar=Q@mail.gmail.com/mbox/"},{"id":121761,"url":"https://patchwork.plctlab.org/api/1.2/patches/121761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpuUTjoaPzJvr7fxxWZm1d=FZ=K7feigkXOYx6A1yh+Sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T04:47:40","name":"cpymem for RISCV with v extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpuUTjoaPzJvr7fxxWZm1d=FZ=K7feigkXOYx6A1yh+Sw@mail.gmail.com/mbox/"},{"id":121775,"url":"https://patchwork.plctlab.org/api/1.2/patches/121775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqakjgGSZb_BFeAn=NbqXvpzznXG9n4sy9KWzKUVHDBXw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T06:02:46","name":"RISCV test infrastructure for d / v / zfh extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqakjgGSZb_BFeAn=NbqXvpzznXG9n4sy9KWzKUVHDBXw@mail.gmail.com/mbox/"},{"id":121791,"url":"https://patchwork.plctlab.org/api/1.2/patches/121791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062739.312774-1-juzhe.zhong@rivai.ai/","msgid":"<20230718062739.312774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T06:27:39","name":"RISC-V: Dynamic adjust size of VLA vector according to TARGET_MIN_VLEN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062739.312774-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121793,"url":"https://patchwork.plctlab.org/api/1.2/patches/121793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-1-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:43","name":"[v3,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-1-kmatsui@gcc.gnu.org/mbox/"},{"id":121796,"url":"https://patchwork.plctlab.org/api/1.2/patches/121796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-2-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:44","name":"[v3,2/3] libstdc++: Optimize is_arithmetic performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-2-kmatsui@gcc.gnu.org/mbox/"},{"id":121797,"url":"https://patchwork.plctlab.org/api/1.2/patches/121797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-3-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:45","name":"[v3,3/3] libstdc++: Optimize is_fundamental performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-3-kmatsui@gcc.gnu.org/mbox/"},{"id":121802,"url":"https://patchwork.plctlab.org/api/1.2/patches/121802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718065512.2728118-1-lehua.ding@rivai.ai/","msgid":"<20230718065512.2728118-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-18T06:55:11","name":"RISC-V: Remove testcase that cannot be compiled because VLEN limitation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718065512.2728118-1-lehua.ding@rivai.ai/mbox/"},{"id":121824,"url":"https://patchwork.plctlab.org/api/1.2/patches/121824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-1-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:24","name":"[v4,1/4] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-1-kmatsui@gcc.gnu.org/mbox/"},{"id":121829,"url":"https://patchwork.plctlab.org/api/1.2/patches/121829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-2-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:25","name":"[v4,2/4] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-2-kmatsui@gcc.gnu.org/mbox/"},{"id":121831,"url":"https://patchwork.plctlab.org/api/1.2/patches/121831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-3-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:26","name":"[v4,3/4] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-3-kmatsui@gcc.gnu.org/mbox/"},{"id":121832,"url":"https://patchwork.plctlab.org/api/1.2/patches/121832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-4-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:27","name":"[v4,4/4] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-4-kmatsui@gcc.gnu.org/mbox/"},{"id":121830,"url":"https://patchwork.plctlab.org/api/1.2/patches/121830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074249.236825-1-lehua.ding@rivai.ai/","msgid":"<20230718074249.236825-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-18T07:42:49","name":"RISC-V: Fix testcase failed when default -mcmodel=medany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074249.236825-1-lehua.ding@rivai.ai/mbox/"},{"id":121849,"url":"https://patchwork.plctlab.org/api/1.2/patches/121849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074958.2806939-1-yanzhang.wang@intel.com/","msgid":"<20230718074958.2806939-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-18T07:49:58","name":"[v3] RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074958.2806939-1-yanzhang.wang@intel.com/mbox/"},{"id":121836,"url":"https://patchwork.plctlab.org/api/1.2/patches/121836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab576007-4f7d-59a9-5f2e-c4902572c616@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T07:56:02","name":"PING^1 [PATCH v7] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab576007-4f7d-59a9-5f2e-c4902572c616@linux.ibm.com/mbox/"},{"id":121837,"url":"https://patchwork.plctlab.org/api/1.2/patches/121837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1217cb9-79df-61a9-7e1b-f949344bf4e4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T07:58:08","name":"[PING^2] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1217cb9-79df-61a9-7e1b-f949344bf4e4@linux.ibm.com/mbox/"},{"id":121845,"url":"https://patchwork.plctlab.org/api/1.2/patches/121845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com/","msgid":"<2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T08:01:27","name":"[PING^2,3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com/mbox/"},{"id":121864,"url":"https://patchwork.plctlab.org/api/1.2/patches/121864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718084411.310736-1-juzhe.zhong@rivai.ai/","msgid":"<20230718084411.310736-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T08:44:11","name":"[V2] RISC-V: Enable SLP un-order reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718084411.310736-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121896,"url":"https://patchwork.plctlab.org/api/1.2/patches/121896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718093437.595925-1-juzhe.zhong@rivai.ai/","msgid":"<20230718093437.595925-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T09:34:37","name":"MAINTAINERS: Add myself as riscv port reviewer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718093437.595925-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121912,"url":"https://patchwork.plctlab.org/api/1.2/patches/121912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1412ccb5be14216ace46eb46cee29ab@ex13mbxc01n01.ikhex.ikoula.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T09:50:18","name":"aarch64: remove useless pairs of rev instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1412ccb5be14216ace46eb46cee29ab@ex13mbxc01n01.ikhex.ikoula.com/mbox/"},{"id":121933,"url":"https://patchwork.plctlab.org/api/1.2/patches/121933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718102108.8837D134B0@imap2.suse-dmz.suse.de/","msgid":"<20230718102108.8837D134B0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T10:21:08","name":"middle-end/105715 - missed RTL if-conversion with COND_EXPR expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718102108.8837D134B0@imap2.suse-dmz.suse.de/mbox/"},{"id":121936,"url":"https://patchwork.plctlab.org/api/1.2/patches/121936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-2-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:18","name":"[v2,1/8] LoongArch: Added Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-2-panchenghui@loongson.cn/mbox/"},{"id":121941,"url":"https://patchwork.plctlab.org/api/1.2/patches/121941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-3-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:19","name":"[v2,2/8] LoongArch: Added Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-3-panchenghui@loongson.cn/mbox/"},{"id":121938,"url":"https://patchwork.plctlab.org/api/1.2/patches/121938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-4-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:20","name":"[v2,3/8] LoongArch: Added Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-4-panchenghui@loongson.cn/mbox/"},{"id":121937,"url":"https://patchwork.plctlab.org/api/1.2/patches/121937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-5-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:21","name":"[v2,4/8] LoongArch: Added Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-5-panchenghui@loongson.cn/mbox/"},{"id":121940,"url":"https://patchwork.plctlab.org/api/1.2/patches/121940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-6-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:22","name":"[v2,5/8] LoongArch: Added Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-6-panchenghui@loongson.cn/mbox/"},{"id":121942,"url":"https://patchwork.plctlab.org/api/1.2/patches/121942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-7-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:23","name":"[v2,6/8] LoongArch: Added Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-7-panchenghui@loongson.cn/mbox/"},{"id":121949,"url":"https://patchwork.plctlab.org/api/1.2/patches/121949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718112545.BC5D413494@imap2.suse-dmz.suse.de/","msgid":"<20230718112545.BC5D413494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T11:25:45","name":"middle-end/61747 - conditional move expansion and constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718112545.BC5D413494@imap2.suse-dmz.suse.de/mbox/"},{"id":121973,"url":"https://patchwork.plctlab.org/api/1.2/patches/121973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2990c55-5e3f-3418-d719-d9af0c649b6d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T12:11:13","name":"OpenMP/Fortran: Non-rectangular loops with constant steps other than 1 or -1 [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2990c55-5e3f-3418-d719-d9af0c649b6d@codesourcery.com/mbox/"},{"id":122009,"url":"https://patchwork.plctlab.org/api/1.2/patches/122009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131311.80670-1-poulhies@adacore.com/","msgid":"<20230718131311.80670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:11","name":"[COMMITTED] ada: Fix Valid_Scalars attribute applied to types from limited with","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131311.80670-1-poulhies@adacore.com/mbox/"},{"id":122010,"url":"https://patchwork.plctlab.org/api/1.2/patches/122010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131323.80823-1-poulhies@adacore.com/","msgid":"<20230718131323.80823-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:23","name":"[COMMITTED] ada: Allow warnings with explain code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131323.80823-1-poulhies@adacore.com/mbox/"},{"id":122024,"url":"https://patchwork.plctlab.org/api/1.2/patches/122024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131325.80885-1-poulhies@adacore.com/","msgid":"<20230718131325.80885-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:25","name":"[COMMITTED] ada: Refactor s-pack* units to remove multiple returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131325.80885-1-poulhies@adacore.com/mbox/"},{"id":122016,"url":"https://patchwork.plctlab.org/api/1.2/patches/122016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131328.80948-1-poulhies@adacore.com/","msgid":"<20230718131328.80948-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:28","name":"[COMMITTED] ada: Expose expected_throw attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131328.80948-1-poulhies@adacore.com/mbox/"},{"id":122011,"url":"https://patchwork.plctlab.org/api/1.2/patches/122011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131329.81009-1-poulhies@adacore.com/","msgid":"<20230718131329.81009-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:29","name":"[COMMITTED] ada: Fix assertion failure introduced by latest change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131329.81009-1-poulhies@adacore.com/mbox/"},{"id":122013,"url":"https://patchwork.plctlab.org/api/1.2/patches/122013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131331.81070-1-poulhies@adacore.com/","msgid":"<20230718131331.81070-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:31","name":"[COMMITTED] ada: Fix internal error on aggregates of self-referencing types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131331.81070-1-poulhies@adacore.com/mbox/"},{"id":122025,"url":"https://patchwork.plctlab.org/api/1.2/patches/122025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131333.81169-1-poulhies@adacore.com/","msgid":"<20230718131333.81169-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:33","name":"[COMMITTED] ada: Tweak CPU affinity handling on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131333.81169-1-poulhies@adacore.com/mbox/"},{"id":122019,"url":"https://patchwork.plctlab.org/api/1.2/patches/122019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131335.81230-1-poulhies@adacore.com/","msgid":"<20230718131335.81230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:35","name":"[COMMITTED] ada: Constraint_Error caused by interface conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131335.81230-1-poulhies@adacore.com/mbox/"},{"id":122033,"url":"https://patchwork.plctlab.org/api/1.2/patches/122033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131336.81291-1-poulhies@adacore.com/","msgid":"<20230718131336.81291-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:36","name":"[COMMITTED] ada: Improve error message for ambiguous subprogram call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131336.81291-1-poulhies@adacore.com/mbox/"},{"id":122031,"url":"https://patchwork.plctlab.org/api/1.2/patches/122031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131338.81390-1-poulhies@adacore.com/","msgid":"<20230718131338.81390-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:38","name":"[COMMITTED] ada: Fix expanding container aggregates with Iterator specification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131338.81390-1-poulhies@adacore.com/mbox/"},{"id":122017,"url":"https://patchwork.plctlab.org/api/1.2/patches/122017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131340.81451-1-poulhies@adacore.com/","msgid":"<20230718131340.81451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:40","name":"[COMMITTED] ada: Apply correct element type for container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131340.81451-1-poulhies@adacore.com/mbox/"},{"id":122026,"url":"https://patchwork.plctlab.org/api/1.2/patches/122026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131342.81513-1-poulhies@adacore.com/","msgid":"<20230718131342.81513-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:42","name":"[COMMITTED] ada: Avoid iterator conflicts in container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131342.81513-1-poulhies@adacore.com/mbox/"},{"id":122035,"url":"https://patchwork.plctlab.org/api/1.2/patches/122035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131343.81574-1-poulhies@adacore.com/","msgid":"<20230718131343.81574-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:43","name":"[COMMITTED] ada: Constraint_Error caused by '\''Image applied to interface type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131343.81574-1-poulhies@adacore.com/mbox/"},{"id":122037,"url":"https://patchwork.plctlab.org/api/1.2/patches/122037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131345.81635-1-poulhies@adacore.com/","msgid":"<20230718131345.81635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:45","name":"[COMMITTED] ada: Use new typedefs in gcc-interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131345.81635-1-poulhies@adacore.com/mbox/"},{"id":122039,"url":"https://patchwork.plctlab.org/api/1.2/patches/122039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com/","msgid":"<2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T13:33:37","name":"[v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com/mbox/"},{"id":122060,"url":"https://patchwork.plctlab.org/api/1.2/patches/122060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-1-guojiufu@linux.ibm.com/","msgid":"<20230718140544.3497370-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T14:05:43","name":"[V5,1/2] Add overflow API for plus minus mult on range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-1-guojiufu@linux.ibm.com/mbox/"},{"id":122059,"url":"https://patchwork.plctlab.org/api/1.2/patches/122059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-2-guojiufu@linux.ibm.com/","msgid":"<20230718140544.3497370-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T14:05:44","name":"[V5,2/2] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-2-guojiufu@linux.ibm.com/mbox/"},{"id":122062,"url":"https://patchwork.plctlab.org/api/1.2/patches/122062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com/","msgid":"<7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-07-18T14:15:40","name":"[releases/gcc-13,1/2] libgcc: Fix eh_frame fast path in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com/mbox/"},{"id":122061,"url":"https://patchwork.plctlab.org/api/1.2/patches/122061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com/","msgid":"<6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-07-18T14:15:45","name":"[releases/gcc-13,2/2] libgcc: Fix -Wint-conversion warning in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com/mbox/"},{"id":122078,"url":"https://patchwork.plctlab.org/api/1.2/patches/122078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17577-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T14:43:21","name":"AArch64 fix regexp for live_1.c sve test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17577-tamar@arm.com/mbox/"},{"id":122080,"url":"https://patchwork.plctlab.org/api/1.2/patches/122080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718145253.CC67E134B0@imap2.suse-dmz.suse.de/","msgid":"<20230718145253.CC67E134B0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T14:52:53","name":"tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718145253.CC67E134B0@imap2.suse-dmz.suse.de/mbox/"},{"id":122101,"url":"https://patchwork.plctlab.org/api/1.2/patches/122101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718151807.665487-1-ppalka@redhat.com/","msgid":"<20230718151807.665487-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-18T15:18:07","name":"c++: deducing empty type vs non-type argument pack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718151807.665487-1-ppalka@redhat.com/mbox/"},{"id":122128,"url":"https://patchwork.plctlab.org/api/1.2/patches/122128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bGkc0U4wk6v_1kj61rfAgw7OpnVRJCLiKu7SkKw8mDMA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T16:49:50","name":"[committed] dwarf2: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bGkc0U4wk6v_1kj61rfAgw7OpnVRJCLiKu7SkKw8mDMA@mail.gmail.com/mbox/"},{"id":122169,"url":"https://patchwork.plctlab.org/api/1.2/patches/122169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718173314.72666-1-polacek@redhat.com/","msgid":"<20230718173314.72666-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-18T17:33:14","name":"[pushed] c++: Add tests for P2621, no UB in lexer [PR110340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718173314.72666-1-polacek@redhat.com/mbox/"},{"id":122204,"url":"https://patchwork.plctlab.org/api/1.2/patches/122204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718191431.50059-1-someguy@effective-light.com/","msgid":"<20230718191431.50059-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-07-18T19:14:31","name":"[RESEND] c: add -Wmissing-variable-declarations [PR65213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718191431.50059-1-someguy@effective-light.com/mbox/"},{"id":122225,"url":"https://patchwork.plctlab.org/api/1.2/patches/122225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718211458.858343-1-polacek@redhat.com/","msgid":"<20230718211458.858343-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-18T21:14:58","name":"c++: fix ICE with is_really_empty_class [PR110106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718211458.858343-1-polacek@redhat.com/mbox/"},{"id":122280,"url":"https://patchwork.plctlab.org/api/1.2/patches/122280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718223233.15328-1-kmatsui@gcc.gnu.org/","msgid":"<20230718223233.15328-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T22:32:33","name":"libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718223233.15328-1-kmatsui@gcc.gnu.org/mbox/"},{"id":122288,"url":"https://patchwork.plctlab.org/api/1.2/patches/122288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-2-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:43","name":"[1/8] c++, tree: Move TYPE_REF_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-2-kmatsui@gcc.gnu.org/mbox/"},{"id":122289,"url":"https://patchwork.plctlab.org/api/1.2/patches/122289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-3-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:44","name":"[2/8] gcc: Use TYPE_REF_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-3-kmatsui@gcc.gnu.org/mbox/"},{"id":122291,"url":"https://patchwork.plctlab.org/api/1.2/patches/122291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-4-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:45","name":"[3/8] c++, tree: Move TYPE_PTR_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-4-kmatsui@gcc.gnu.org/mbox/"},{"id":122292,"url":"https://patchwork.plctlab.org/api/1.2/patches/122292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-5-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:46","name":"[4/8] c++, tree: Move INDIRECT_TYPE_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-5-kmatsui@gcc.gnu.org/mbox/"},{"id":122293,"url":"https://patchwork.plctlab.org/api/1.2/patches/122293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-7-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:48","name":"[6/8] tree: Remove POINTER_TYPE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-7-kmatsui@gcc.gnu.org/mbox/"},{"id":122294,"url":"https://patchwork.plctlab.org/api/1.2/patches/122294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-8-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:49","name":"[7/8] tree: Define TYPE_REF_IS_LVALUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-8-kmatsui@gcc.gnu.org/mbox/"},{"id":122295,"url":"https://patchwork.plctlab.org/api/1.2/patches/122295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-9-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:50","name":"[8/8] c++, lto: Use TYPE_REF_IS_LVALUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-9-kmatsui@gcc.gnu.org/mbox/"},{"id":122357,"url":"https://patchwork.plctlab.org/api/1.2/patches/122357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719015221.1383859-1-apinski@marvell.com/","msgid":"<20230719015221.1383859-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-19T01:52:21","name":"Fix PR110726: a | (a == b) can sometimes produce wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719015221.1383859-1-apinski@marvell.com/mbox/"},{"id":122365,"url":"https://patchwork.plctlab.org/api/1.2/patches/122365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com/","msgid":"<531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com>","list_archive_url":null,"date":"2023-07-19T03:06:05","name":"[PATCH-1,combine] Don'\''t widen shift mode when target has rotate/mask instruction on original mode [PR93738]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com/mbox/"},{"id":122363,"url":"https://patchwork.plctlab.org/api/1.2/patches/122363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com/","msgid":"<7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-19T03:06:22","name":"[PATCH-2,rs6000] Don'\''t widen shift mode when target has rotate/mask instruction on original mode [PR93738]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com/mbox/"},{"id":122366,"url":"https://patchwork.plctlab.org/api/1.2/patches/122366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719032822.85817-1-pan2.li@intel.com/","msgid":"<20230719032822.85817-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-19T03:28:22","name":"[v1] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719032822.85817-1-pan2.li@intel.com/mbox/"},{"id":122369,"url":"https://patchwork.plctlab.org/api/1.2/patches/122369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041432.2967226-1-yunqiang.su@cipunited.com/","msgid":"<20230719041432.2967226-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-19T04:14:32","name":"Store_bit_field_1: Use SUBREG instead of REG if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041432.2967226-1-yunqiang.su@cipunited.com/mbox/"},{"id":122371,"url":"https://patchwork.plctlab.org/api/1.2/patches/122371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041639.2967597-1-yunqiang.su@cipunited.com/","msgid":"<20230719041639.2967597-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-19T04:16:39","name":"[v2] Store_bit_field_1: Use SUBREG instead of REG if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041639.2967597-1-yunqiang.su@cipunited.com/mbox/"},{"id":122388,"url":"https://patchwork.plctlab.org/api/1.2/patches/122388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635742E07E2076FA2BE0560E139A@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T04:33:48","name":"AArch64: Do not increase the vect reduction latency by multiplying count [PR110625]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635742E07E2076FA2BE0560E139A@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":122406,"url":"https://patchwork.plctlab.org/api/1.2/patches/122406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719062911.521348-1-pan2.li@intel.com/","msgid":"<20230719062911.521348-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-19T06:29:11","name":"[v2] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719062911.521348-1-pan2.li@intel.com/mbox/"},{"id":122449,"url":"https://patchwork.plctlab.org/api/1.2/patches/122449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719082126.265155-1-lehua.ding@rivai.ai/","msgid":"<20230719082126.265155-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-19T08:21:26","name":"mklog: fix bugs of --append option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719082126.265155-1-lehua.ding@rivai.ai/mbox/"},{"id":122454,"url":"https://patchwork.plctlab.org/api/1.2/patches/122454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee9e4937-ad2e-1e15-9d5d-6611bd9f572d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T08:26:12","name":"[committed] - Re: [patch] OpenMP/Fortran: Non-rectangular loops with constant steps other than 1 or -1 [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee9e4937-ad2e-1e15-9d5d-6611bd9f572d@codesourcery.com/mbox/"},{"id":122505,"url":"https://patchwork.plctlab.org/api/1.2/patches/122505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-1-jwakely@redhat.com/","msgid":"<20230719100625.2494437-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:10","name":"[committed,1/3] libstdc++: Check autoconf macros for strtof and strtold [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-1-jwakely@redhat.com/mbox/"},{"id":122508,"url":"https://patchwork.plctlab.org/api/1.2/patches/122508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-2-jwakely@redhat.com/","msgid":"<20230719100625.2494437-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:11","name":"[committed,2/3] libstdc++: Define std::stof fallback in terms of std::stod [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-2-jwakely@redhat.com/mbox/"},{"id":122506,"url":"https://patchwork.plctlab.org/api/1.2/patches/122506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-3-jwakely@redhat.com/","msgid":"<20230719100625.2494437-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:12","name":"[committed,3/3] libstdc++: Enable tests for std::stoi etc. unconditionally [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-3-jwakely@redhat.com/mbox/"},{"id":122520,"url":"https://patchwork.plctlab.org/api/1.2/patches/122520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101252.2494924-1-jwakely@redhat.com/","msgid":"<20230719101252.2494924-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:11:50","name":"[committed] libstdc++: Check for multiple modifiers in chrono format string [PR110708]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101252.2494924-1-jwakely@redhat.com/mbox/"},{"id":122513,"url":"https://patchwork.plctlab.org/api/1.2/patches/122513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-2-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:52","name":"[1/5,RISC-V] Recognize Zicond extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-2-zengxiao@eswincomputing.com/mbox/"},{"id":122509,"url":"https://patchwork.plctlab.org/api/1.2/patches/122509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-3-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-3-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:53","name":"[2/5,RISC-V] Generate Zicond instruction for basic semantics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-3-zengxiao@eswincomputing.com/mbox/"},{"id":122515,"url":"https://patchwork.plctlab.org/api/1.2/patches/122515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-4-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-4-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:54","name":"[3/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-4-zengxiao@eswincomputing.com/mbox/"},{"id":122511,"url":"https://patchwork.plctlab.org/api/1.2/patches/122511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-5-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-5-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:55","name":"[4/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to non-zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-5-zengxiao@eswincomputing.com/mbox/"},{"id":122512,"url":"https://patchwork.plctlab.org/api/1.2/patches/122512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-6-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-6-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:56","name":"[5/5,RISC-V] Generate Zicond instruction for conditional execution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-6-zengxiao@eswincomputing.com/mbox/"},{"id":122547,"url":"https://patchwork.plctlab.org/api/1.2/patches/122547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307191141511.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:02:37","name":"[committed] testsuite: Add 64-bit vector variant for bb-slp-pr95839.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307191141511.28892@tpp.orcam.me.uk/mbox/"},{"id":122549,"url":"https://patchwork.plctlab.org/api/1.2/patches/122549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfDr9xICtYfTpCq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:06:23","name":"wide-int: Fix up wi::divmod_internal [PR110731]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfDr9xICtYfTpCq@tucnak/mbox/"},{"id":122564,"url":"https://patchwork.plctlab.org/api/1.2/patches/122564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113815.2510151-1-jwakely@redhat.com/","msgid":"<20230719113815.2510151-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T11:37:34","name":"[committed] libstdc++: Implement correct locale-specific chrono formatting [PR110719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113815.2510151-1-jwakely@redhat.com/mbox/"},{"id":122568,"url":"https://patchwork.plctlab.org/api/1.2/patches/122568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113829.2510208-1-jwakely@redhat.com/","msgid":"<20230719113829.2510208-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T11:38:17","name":"[committed] libstdc++: Avoid warning in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113829.2510208-1-jwakely@redhat.com/mbox/"},{"id":122574,"url":"https://patchwork.plctlab.org/api/1.2/patches/122574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfO1++M5xx11xF5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:53:59","name":"[committed] tree-switch-conversion: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfO1++M5xx11xF5@tucnak/mbox/"},{"id":122576,"url":"https://patchwork.plctlab.org/api/1.2/patches/122576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719115505.100294-1-juzhe.zhong@rivai.ai/","msgid":"<20230719115505.100294-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T11:55:05","name":"RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719115505.100294-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122587,"url":"https://patchwork.plctlab.org/api/1.2/patches/122587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1c20be2-5ac1-6644-5ffa-be2c85867d46@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T12:27:23","name":"[OG13,committed] gfortran.dg/gomp/affinity-clause-1.f90: Fix scan-tree-dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1c20be2-5ac1-6644-5ffa-be2c85867d46@codesourcery.com/mbox/"},{"id":122610,"url":"https://patchwork.plctlab.org/api/1.2/patches/122610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com/","msgid":"<4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com>","list_archive_url":null,"date":"2023-07-19T12:59:16","name":"[OG13,committed] libgomp.fortran/map-subarray-5.f90: Fix for shared-mem device/host","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com/mbox/"},{"id":122680,"url":"https://patchwork.plctlab.org/api/1.2/patches/122680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17578-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T15:15:50","name":"[1/2,frontend] Add novector C++ pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17578-tamar@arm.com/mbox/"},{"id":122681,"url":"https://patchwork.plctlab.org/api/1.2/patches/122681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLf+UkEwHWUbkdzy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T15:16:34","name":"[2/2,frontend] : Add novector C pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLf+UkEwHWUbkdzy@arm.com/mbox/"},{"id":122698,"url":"https://patchwork.plctlab.org/api/1.2/patches/122698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155211.2545541-1-jwakely@redhat.com/","msgid":"<20230719155211.2545541-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T15:51:54","name":"[committed] libstdc++: Fix locale-specific duration formatting [PR110719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155211.2545541-1-jwakely@redhat.com/mbox/"},{"id":122699,"url":"https://patchwork.plctlab.org/api/1.2/patches/122699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155216.2545575-1-jwakely@redhat.com/","msgid":"<20230719155216.2545575-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T15:52:12","name":"[committed] libstdc++: Fix formatting of negative chrono::hh_mm_ss","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155216.2545575-1-jwakely@redhat.com/mbox/"},{"id":122719,"url":"https://patchwork.plctlab.org/api/1.2/patches/122719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88fc414-c5b2-ac42-b531-dc0dd4268cff@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T16:44:08","name":"[GCC,13] aarch64: Remove architecture dependencies from intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88fc414-c5b2-ac42-b531-dc0dd4268cff@e124511.cambridge.arm.com/mbox/"},{"id":122728,"url":"https://patchwork.plctlab.org/api/1.2/patches/122728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f173f4f8-2f33-c712-c400-d3b00ff43f84@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T16:46:48","name":"[V2] rs6000: Don'\''t allow AltiVec address in movoo & movxo pattern [PR110411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f173f4f8-2f33-c712-c400-d3b00ff43f84@linux.vnet.ibm.com/mbox/"},{"id":122758,"url":"https://patchwork.plctlab.org/api/1.2/patches/122758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com/","msgid":"<10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com>","list_archive_url":null,"date":"2023-07-19T17:59:04","name":"[pushed,LRA] : Check and update frame to stack pointer elimination after stack slot allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com/mbox/"},{"id":122759,"url":"https://patchwork.plctlab.org/api/1.2/patches/122759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180053.46101-1-polacek@redhat.com/","msgid":"<20230719180053.46101-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T18:00:53","name":"c++: fix ICE with designated initializer [PR110114]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180053.46101-1-polacek@redhat.com/mbox/"},{"id":122760,"url":"https://patchwork.plctlab.org/api/1.2/patches/122760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180536.2447863-1-ppalka@redhat.com/","msgid":"<20230719180536.2447863-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-19T18:05:36","name":"c++: passing partially inst tmpl as ttp [PR110566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180536.2447863-1-ppalka@redhat.com/mbox/"},{"id":122765,"url":"https://patchwork.plctlab.org/api/1.2/patches/122765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLgyqE97WQkOyZc+@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-19T18:59:52","name":"Use strtol instead of std::stoi in gensupport.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLgyqE97WQkOyZc+@mx3210.localdomain/mbox/"},{"id":122769,"url":"https://patchwork.plctlab.org/api/1.2/patches/122769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719192047.449259-1-polacek@redhat.com/","msgid":"<20230719192047.449259-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T19:20:47","name":"c++: -Wmissing-field-initializers and empty class [PR110064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719192047.449259-1-polacek@redhat.com/mbox/"},{"id":122774,"url":"https://patchwork.plctlab.org/api/1.2/patches/122774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719193242.59472-1-kmatsui@gcc.gnu.org/","msgid":"<20230719193242.59472-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-19T19:32:42","name":"[v2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719193242.59472-1-kmatsui@gcc.gnu.org/mbox/"},{"id":122795,"url":"https://patchwork.plctlab.org/api/1.2/patches/122795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com/","msgid":"<009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-19T20:07:29","name":"[x86_64] More TImode parameter passing improvements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com/mbox/"},{"id":122822,"url":"https://patchwork.plctlab.org/api/1.2/patches/122822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719204522.2585813-1-jwakely@redhat.com/","msgid":"<20230719204522.2585813-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T20:43:58","name":"libstdc++: Fix preprocessor conditions for std::from_chars [PR109921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719204522.2585813-1-jwakely@redhat.com/mbox/"},{"id":122845,"url":"https://patchwork.plctlab.org/api/1.2/patches/122845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719215122.513059-1-polacek@redhat.com/","msgid":"<20230719215122.513059-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T21:51:22","name":"c++: Improve printing of base classes [PR110745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719215122.513059-1-polacek@redhat.com/mbox/"},{"id":122847,"url":"https://patchwork.plctlab.org/api/1.2/patches/122847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719220108.255662-1-dmalcolm@redhat.com/","msgid":"<20230719220108.255662-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:01:08","name":"[pushed] analyzer: fix ICE on division of tainted floating-point values [PR110700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719220108.255662-1-dmalcolm@redhat.com/mbox/"},{"id":122848,"url":"https://patchwork.plctlab.org/api/1.2/patches/122848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com/","msgid":"<003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-19T22:10:57","name":"PR c/110699: Defend against error_mark_node in gimplify.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com/mbox/"},{"id":122867,"url":"https://patchwork.plctlab.org/api/1.2/patches/122867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224318.2599563-1-jwakely@redhat.com/","msgid":"<20230719224318.2599563-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:43:05","name":"[committed] libstdc++: Check for std::ratio in arithmetic and comparisons [PR110593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224318.2599563-1-jwakely@redhat.com/mbox/"},{"id":122868,"url":"https://patchwork.plctlab.org/api/1.2/patches/122868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224441.2599589-1-jwakely@redhat.com/","msgid":"<20230719224441.2599589-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:43:19","name":"[committed] libstdc++: Do not define inaccurate from_chars for _Float128 [PR110077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224441.2599589-1-jwakely@redhat.com/mbox/"},{"id":122869,"url":"https://patchwork.plctlab.org/api/1.2/patches/122869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224502.67323-1-juzhe.zhong@rivai.ai/","msgid":"<20230719224502.67323-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T22:45:01","name":"[V2] RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224502.67323-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122880,"url":"https://patchwork.plctlab.org/api/1.2/patches/122880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmyvzece.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-07-19T23:11:29","name":"[v4] Introduce attribute sym","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmyvzece.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":122891,"url":"https://patchwork.plctlab.org/api/1.2/patches/122891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719232120.80316-1-juzhe.zhong@rivai.ai/","msgid":"<20230719232120.80316-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T23:21:20","name":"[V3] RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719232120.80316-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122952,"url":"https://patchwork.plctlab.org/api/1.2/patches/122952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720024142.1448443-1-apinski@marvell.com/","msgid":"<20230720024142.1448443-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-20T02:41:42","name":"Move combine over to statistics_counter_event.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720024142.1448443-1-apinski@marvell.com/mbox/"},{"id":122956,"url":"https://patchwork.plctlab.org/api/1.2/patches/122956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720031352.786458-1-haochen.jiang@intel.com/","msgid":"<20230720031352.786458-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-20T03:13:52","name":"Correct Granite Rapids{, D} documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720031352.786458-1-haochen.jiang@intel.com/mbox/"},{"id":122959,"url":"https://patchwork.plctlab.org/api/1.2/patches/122959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032157.869080-1-pan2.li@intel.com/","msgid":"<20230720032157.869080-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T03:21:57","name":"[v3] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032157.869080-1-pan2.li@intel.com/mbox/"},{"id":122960,"url":"https://patchwork.plctlab.org/api/1.2/patches/122960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032243.3643540-1-lhyatt@gmail.com/","msgid":"<20230720032243.3643540-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-20T03:22:43","name":"[committed] testsuite: Fix C++ UDL tests failing on 32-bit arch [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032243.3643540-1-lhyatt@gmail.com/mbox/"},{"id":122973,"url":"https://patchwork.plctlab.org/api/1.2/patches/122973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com/","msgid":"<460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-20T04:35:28","name":"rs6000: Fix issue in specifying PTImode as an attribute [PR106895]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com/mbox/"},{"id":122975,"url":"https://patchwork.plctlab.org/api/1.2/patches/122975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720045009.989895-1-hongtao.liu@intel.com/","msgid":"<20230720045009.989895-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-20T04:50:09","name":"Fix fp16 related testcase failure for i686.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720045009.989895-1-hongtao.liu@intel.com/mbox/"},{"id":122991,"url":"https://patchwork.plctlab.org/api/1.2/patches/122991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720060740.649611-1-juzhe.zhong@rivai.ai/","msgid":"<20230720060740.649611-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T06:07:40","name":"VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720060740.649611-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123007,"url":"https://patchwork.plctlab.org/api/1.2/patches/123007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720063250.1910048-1-pan2.li@intel.com/","msgid":"<20230720063250.1910048-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T06:32:50","name":"[v1] RISC-V: Align the pattern format in vector.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720063250.1910048-1-pan2.li@intel.com/mbox/"},{"id":123009,"url":"https://patchwork.plctlab.org/api/1.2/patches/123009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720064307.1943091-1-pan2.li@intel.com/","msgid":"<20230720064307.1943091-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T06:43:07","name":"[v4] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720064307.1943091-1-pan2.li@intel.com/mbox/"},{"id":123030,"url":"https://patchwork.plctlab.org/api/1.2/patches/123030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLjdpesBtEv9OFMF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T07:09:25","name":"loop-ch improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLjdpesBtEv9OFMF@kam.mff.cuni.cz/mbox/"},{"id":123051,"url":"https://patchwork.plctlab.org/api/1.2/patches/123051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073406.239379-1-juzhe.zhong@rivai.ai/","msgid":"<20230720073406.239379-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T07:34:06","name":"RISC-V: Support in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073406.239379-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123052,"url":"https://patchwork.plctlab.org/api/1.2/patches/123052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073516.2171485-1-hongtao.liu@intel.com/","msgid":"<20230720073516.2171485-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-20T07:35:16","name":"Optimize vlddqu to vmovdqu for TARGET_AVX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073516.2171485-1-hongtao.liu@intel.com/mbox/"},{"id":123066,"url":"https://patchwork.plctlab.org/api/1.2/patches/123066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720080629.1060969-1-juzhe.zhong@rivai.ai/","msgid":"<20230720080629.1060969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T08:06:29","name":"CODE STRUCTURE: Refine codes in Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720080629.1060969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123088,"url":"https://patchwork.plctlab.org/api/1.2/patches/123088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720083530.3260344-1-pan2.li@intel.com/","msgid":"<20230720083530.3260344-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T08:35:30","name":"[v1] RISC-V: Fix one incorrect match operand for RVV reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720083530.3260344-1-pan2.li@intel.com/mbox/"},{"id":123089,"url":"https://patchwork.plctlab.org/api/1.2/patches/123089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720085103.159227-1-juzhe.zhong@rivai.ai/","msgid":"<20230720085103.159227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T08:51:03","name":"[V2] RISC-V: Support in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720085103.159227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123110,"url":"https://patchwork.plctlab.org/api/1.2/patches/123110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-2-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:24","name":"[1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-2-lehua.ding@rivai.ai/mbox/"},{"id":123112,"url":"https://patchwork.plctlab.org/api/1.2/patches/123112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-3-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:25","name":"[2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-3-lehua.ding@rivai.ai/mbox/"},{"id":123111,"url":"https://patchwork.plctlab.org/api/1.2/patches/123111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-4-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:26","name":"[3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-4-lehua.ding@rivai.ai/mbox/"},{"id":123134,"url":"https://patchwork.plctlab.org/api/1.2/patches/123134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLj/54VvX7Xz7wRk@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:35:35","name":"[v4,1/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLj/54VvX7Xz7wRk@Thaum.localdomain/mbox/"},{"id":123135,"url":"https://patchwork.plctlab.org/api/1.2/patches/123135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAGBfPXgFGt1ox@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:36:24","name":"[v4,2/3] c++: Improve constexpr error for dangling local variables [PR110619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAGBfPXgFGt1ox@Thaum.localdomain/mbox/"},{"id":123136,"url":"https://patchwork.plctlab.org/api/1.2/patches/123136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAUdydPj5lwahN@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:37:21","name":"[v4,3/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAUdydPj5lwahN@Thaum.localdomain/mbox/"},{"id":123159,"url":"https://patchwork.plctlab.org/api/1.2/patches/123159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a793b7d9-2235-f1c5-1591-92075b8c0b99@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T10:13:25","name":"testsuite: Add a test case for PR110729","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a793b7d9-2235-f1c5-1591-92075b8c0b99@linux.ibm.com/mbox/"},{"id":123161,"url":"https://patchwork.plctlab.org/api/1.2/patches/123161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com/","msgid":"<6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com>","list_archive_url":null,"date":"2023-07-20T10:16:43","name":"sccvn: Correct the index of bias for IFN_LEN_STORE [PR110744]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com/mbox/"},{"id":123240,"url":"https://patchwork.plctlab.org/api/1.2/patches/123240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720123919.ECBCE3858C33@sourceware.org/","msgid":"<20230720123919.ECBCE3858C33@sourceware.org>","list_archive_url":null,"date":"2023-07-20T12:38:36","name":"tree-optimization/110742 - fix latent issue with permuting existing vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720123919.ECBCE3858C33@sourceware.org/mbox/"},{"id":123248,"url":"https://patchwork.plctlab.org/api/1.2/patches/123248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720124636.A1DDA385558C@sourceware.org/","msgid":"<20230720124636.A1DDA385558C@sourceware.org>","list_archive_url":null,"date":"2023-07-20T12:45:52","name":"tree-optimization/110204 - second level redundancy and simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720124636.A1DDA385558C@sourceware.org/mbox/"},{"id":123282,"url":"https://patchwork.plctlab.org/api/1.2/patches/123282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720132910.210043-1-xry111@xry111.site/","msgid":"<20230720132910.210043-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-20T13:28:02","name":"LoongArch: Allow using --with-arch=native if host CPU is LoongArch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720132910.210043-1-xry111@xry111.site/mbox/"},{"id":123303,"url":"https://patchwork.plctlab.org/api/1.2/patches/123303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk+EOndV5f4UbuW@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:00:48","name":"Cleanup code determining number of iterations from cfg profile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk+EOndV5f4UbuW@kam.mff.cuni.cz/mbox/"},{"id":123309,"url":"https://patchwork.plctlab.org/api/1.2/patches/123309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk/z6F6HX5+zGLg@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:08:15","name":"[v2] c++: fix ICE with designated initializer [PR110114]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk/z6F6HX5+zGLg@redhat.com/mbox/"},{"id":123312,"url":"https://patchwork.plctlab.org/api/1.2/patches/123312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea56d14fc5ca99685e8c5c6c94c28bdadd0bb757.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:35:19","name":"[1/3] gcc: xtensa: add mdynconfig option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea56d14fc5ca99685e8c5c6c94c28bdadd0bb757.camel@espressif.com/mbox/"},{"id":123315,"url":"https://patchwork.plctlab.org/api/1.2/patches/123315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec6efca9301a39f9545f7285d43e0251af83d9fb.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:37:22","name":"[2/3] gcc: xtensa: use dynconfig settings as builtin-macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec6efca9301a39f9545f7285d43e0251af83d9fb.camel@espressif.com/mbox/"},{"id":123317,"url":"https://patchwork.plctlab.org/api/1.2/patches/123317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e20622aa6c7b3876b25cd59cbf0c6dcb0f3ae5.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:37:59","name":"[3/3] gcc: xtensa: add xtensa*-esp*-elf multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e20622aa6c7b3876b25cd59cbf0c6dcb0f3ae5.camel@espressif.com/mbox/"},{"id":123329,"url":"https://patchwork.plctlab.org/api/1.2/patches/123329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6ilaemyh0.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:47:23","name":"[committed] Document new analyzer parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6ilaemyh0.fsf@suse.cz/mbox/"},{"id":123382,"url":"https://patchwork.plctlab.org/api/1.2/patches/123382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com/","msgid":"<4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com>","list_archive_url":null,"date":"2023-07-20T16:31:39","name":"[committed] libgomp.texi: Split OpenMP routines chapter into sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com/mbox/"},{"id":123429,"url":"https://patchwork.plctlab.org/api/1.2/patches/123429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9482c2a-285d-1ff0-c234-13f8e418d646@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T18:49:06","name":"[pushed,LRA] : Exclude reloading of frame pointer in subreg for some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9482c2a-285d-1ff0-c234-13f8e418d646@redhat.com/mbox/"},{"id":123431,"url":"https://patchwork.plctlab.org/api/1.2/patches/123431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZMydG9qLjbcdCddg=Cd5B5MXoqcPsQ=xQpYj5dwTQKNQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T18:57:53","name":"[committed] i386: Double-word sign-extension missed-optimization [PR110717]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZMydG9qLjbcdCddg=Cd5B5MXoqcPsQ=xQpYj5dwTQKNQ@mail.gmail.com/mbox/"},{"id":123436,"url":"https://patchwork.plctlab.org/api/1.2/patches/123436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW1HBv_xLevgVtxR6U-J=OgnwAOHNN5e746ubBOu7Sz7Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T19:29:26","name":"libgo patch committet: Don'\''t collect package CGOLDFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW1HBv_xLevgVtxR6U-J=OgnwAOHNN5e746ubBOu7Sz7Q@mail.gmail.com/mbox/"},{"id":123482,"url":"https://patchwork.plctlab.org/api/1.2/patches/123482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720232004.240308-1-juzhe.zhong@rivai.ai/","msgid":"<20230720232004.240308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T23:20:04","name":"cleanup: Change LEN_MASK into MASK_LEN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720232004.240308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123499,"url":"https://patchwork.plctlab.org/api/1.2/patches/123499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003148.339618-1-dmalcolm@redhat.com/","msgid":"<20230721003148.339618-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:31:48","name":"[pushed] analyzer: fix ICE on certain pointer subtractions [PR110387]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003148.339618-1-dmalcolm@redhat.com/mbox/"},{"id":123501,"url":"https://patchwork.plctlab.org/api/1.2/patches/123501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003201.339666-1-dmalcolm@redhat.com/","msgid":"<20230721003201.339666-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:32:01","name":"[pushed] analyzer/text-art: fix clang warnings [PR110433,PR110612]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003201.339666-1-dmalcolm@redhat.com/mbox/"},{"id":123500,"url":"https://patchwork.plctlab.org/api/1.2/patches/123500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003216.339710-1-dmalcolm@redhat.com/","msgid":"<20230721003216.339710-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:32:16","name":"[pushed] analyzer: avoid usage of TYPE_PRECISION on vector types [PR110455]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003216.339710-1-dmalcolm@redhat.com/mbox/"},{"id":123505,"url":"https://patchwork.plctlab.org/api/1.2/patches/123505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com/","msgid":"<894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com>","list_archive_url":null,"date":"2023-07-21T01:32:16","name":"[PATCHv2,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com/mbox/"},{"id":123513,"url":"https://patchwork.plctlab.org/api/1.2/patches/123513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721020900.298554-1-juzhe.zhong@rivai.ai/","msgid":"<20230721020900.298554-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T02:09:00","name":"cleanup: make all cond_len_* and mask_len_* consistent on the order of mask and len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721020900.298554-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123516,"url":"https://patchwork.plctlab.org/api/1.2/patches/123516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721022343.314043-1-juzhe.zhong@rivai.ai/","msgid":"<20230721022343.314043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T02:23:43","name":"cleanup: Change condition order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721022343.314043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123543,"url":"https://patchwork.plctlab.org/api/1.2/patches/123543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721040534.1511819-1-apinski@marvell.com/","msgid":"<20230721040534.1511819-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-21T04:05:34","name":"MATCH: Add Max,a> -> Max simplifcation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721040534.1511819-1-apinski@marvell.com/mbox/"},{"id":123563,"url":"https://patchwork.plctlab.org/api/1.2/patches/123563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721052911.1514944-1-apinski@marvell.com/","msgid":"<20230721052911.1514944-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-21T05:29:11","name":"libfortran: Fix build for targets that don'\''t have 10byte or 16 byte floating point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721052911.1514944-1-apinski@marvell.com/mbox/"},{"id":123575,"url":"https://patchwork.plctlab.org/api/1.2/patches/123575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com/","msgid":"<07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com>","list_archive_url":null,"date":"2023-07-21T06:03:23","name":"vect: Don'\''t vectorize a single scalar iteration loop [PR110740]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com/mbox/"},{"id":123625,"url":"https://patchwork.plctlab.org/api/1.2/patches/123625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074625.607468-1-haochen.jiang@intel.com/","msgid":"<20230721074625.607468-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-21T07:46:25","name":"Fix a typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074625.607468-1-haochen.jiang@intel.com/mbox/"},{"id":123623,"url":"https://patchwork.plctlab.org/api/1.2/patches/123623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074716.2007407-1-slyich@gmail.com/","msgid":"<20230721074716.2007407-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-07-21T07:47:16","name":"mh-mingw: drop unused BOOT_CXXFLAGS variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074716.2007407-1-slyich@gmail.com/mbox/"},{"id":123640,"url":"https://patchwork.plctlab.org/api/1.2/patches/123640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLo5+wTc5gkQIIP/@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T07:55:39","name":"Improve loop dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLo5+wTc5gkQIIP/@kam.mff.cuni.cz/mbox/"},{"id":123710,"url":"https://patchwork.plctlab.org/api/1.2/patches/123710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721095727.221308-1-juzhe.zhong@rivai.ai/","msgid":"<20230721095727.221308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T09:57:27","name":"[committed] RISC-V: Fix redundant variable declaration.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721095727.221308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123718,"url":"https://patchwork.plctlab.org/api/1.2/patches/123718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721100532.1342700-1-juzhe.zhong@rivai.ai/","msgid":"<20230721100532.1342700-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T10:05:32","name":"[V2] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721100532.1342700-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123734,"url":"https://patchwork.plctlab.org/api/1.2/patches/123734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com/","msgid":"<202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-21T10:13:51","name":"ira: update allocated_hardreg_p[] in improve_allocation() [PR110254]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com/mbox/"},{"id":123785,"url":"https://patchwork.plctlab.org/api/1.2/patches/123785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721105722.1460089-1-juzhe.zhong@rivai.ai/","msgid":"<20230721105722.1460089-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T10:57:22","name":"[V3] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721105722.1460089-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123788,"url":"https://patchwork.plctlab.org/api/1.2/patches/123788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110603.1470072-1-juzhe.zhong@rivai.ai/","msgid":"<20230721110603.1470072-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T11:06:03","name":"[V4] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110603.1470072-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123790,"url":"https://patchwork.plctlab.org/api/1.2/patches/123790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110813.3136547-1-dkm@kataplop.net/","msgid":"<20230721110813.3136547-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-07-21T11:08:13","name":"[v2] mklog: handle Signed-Off-By, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110813.3136547-1-dkm@kataplop.net/mbox/"},{"id":123805,"url":"https://patchwork.plctlab.org/api/1.2/patches/123805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7af59d52ac0b134bd6617b8f45673c63981e13a.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:21:57","name":"[C] : Add Walloc-type to warn about insufficient size in allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7af59d52ac0b134bd6617b8f45673c63981e13a.camel@tugraz.at/mbox/"},{"id":123812,"url":"https://patchwork.plctlab.org/api/1.2/patches/123812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpvtOUb8IBYs7zT@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:44:52","name":"finite_loop_p tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpvtOUb8IBYs7zT@kam.mff.cuni.cz/mbox/"},{"id":123819,"url":"https://patchwork.plctlab.org/api/1.2/patches/123819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721114835.23667-1-cupertino.miranda@oracle.com/","msgid":"<20230721114835.23667-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T11:48:35","name":"bpf: pseudo-c assembly dialect support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721114835.23667-1-cupertino.miranda@oracle.com/mbox/"},{"id":123820,"url":"https://patchwork.plctlab.org/api/1.2/patches/123820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpxj7Ue6W4xkFjC@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:52:47","name":"loop-ch improvements, part 5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpxj7Ue6W4xkFjC@kam.mff.cuni.cz/mbox/"},{"id":123822,"url":"https://patchwork.plctlab.org/api/1.2/patches/123822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721115730.A4C49134BA@imap2.suse-dmz.suse.de/","msgid":"<20230721115730.A4C49134BA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-21T11:57:30","name":"tree-optimization/41320 - remove bogus XFAILed testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721115730.A4C49134BA@imap2.suse-dmz.suse.de/mbox/"},{"id":123828,"url":"https://patchwork.plctlab.org/api/1.2/patches/123828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded23976-2873-45de-aebd-28839ec0ab82@AZ-NEU-EX03.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T12:11:38","name":"Reduce floating-point difficulties in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded23976-2873-45de-aebd-28839ec0ab82@AZ-NEU-EX03.Arm.com/mbox/"},{"id":123909,"url":"https://patchwork.plctlab.org/api/1.2/patches/123909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqaIhXmspiXfoVl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T14:45:54","name":"Fix sreal::to_int and implement sreal::to_nearest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqaIhXmspiXfoVl@kam.mff.cuni.cz/mbox/"},{"id":123910,"url":"https://patchwork.plctlab.org/api/1.2/patches/123910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721145046.93041-1-iain@sandoe.co.uk/","msgid":"<20230721145046.93041-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-21T14:50:46","name":"[pushed] Darwin: Handle linker '\''-demangle'\'' option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721145046.93041-1-iain@sandoe.co.uk/mbox/"},{"id":123912,"url":"https://patchwork.plctlab.org/api/1.2/patches/123912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721150851.94504-1-drross@redhat.com/","msgid":"<20230721150851.94504-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-21T15:08:51","name":"match.pd: Implement missed optimization (x << c) >> c -> -(x & 1) [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721150851.94504-1-drross@redhat.com/mbox/"},{"id":123914,"url":"https://patchwork.plctlab.org/api/1.2/patches/123914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721151626.67206-1-siddhesh@gotplt.org/","msgid":"<20230721151626.67206-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-07-21T15:16:26","name":"testsuite/110763: Ensure zero return from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721151626.67206-1-siddhesh@gotplt.org/mbox/"},{"id":123926,"url":"https://patchwork.plctlab.org/api/1.2/patches/123926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GFBmnmg1xSa0FEU-nENjdCZVCS28-3rVn2r1qCXxyyeag@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:35:11","name":"[WIP,RFC] analyzer: Add optional trim of the analyzer diagnostics going too deep [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GFBmnmg1xSa0FEU-nENjdCZVCS28-3rVn2r1qCXxyyeag@mail.gmail.com/mbox/"},{"id":123928,"url":"https://patchwork.plctlab.org/api/1.2/patches/123928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmI1whqFD6yl0m@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:37:07","name":"Implement flat loop profile detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmI1whqFD6yl0m@kam.mff.cuni.cz/mbox/"},{"id":123929,"url":"https://patchwork.plctlab.org/api/1.2/patches/123929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmTxelBV+8iRmH@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:37:51","name":"Fix gcc.dg/tree-ssa/copy-headers-9.c and gcc.dg/tree-ssa/dce-1.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmTxelBV+8iRmH@kam.mff.cuni.cz/mbox/"},{"id":123963,"url":"https://patchwork.plctlab.org/api/1.2/patches/123963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721164332.29163-1-cupertino.miranda@oracle.com/","msgid":"<20230721164332.29163-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T16:43:32","name":"bpf: fixed template for neg (added second operand)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721164332.29163-1-cupertino.miranda@oracle.com/mbox/"},{"id":124043,"url":"https://patchwork.plctlab.org/api/1.2/patches/124043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721175552.2693295-1-vineetg@rivosinc.com/","msgid":"<20230721175552.2693295-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-21T17:55:52","name":"RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721175552.2693295-1-vineetg@rivosinc.com/mbox/"},{"id":124051,"url":"https://patchwork.plctlab.org/api/1.2/patches/124051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181839.119969-1-drross@redhat.com/","msgid":"<20230721181839.119969-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-21T18:18:39","name":"match.pd, v2: Implement missed optimization (~X | Y) ^ X -> ~(X & Y) [PR109986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181839.119969-1-drross@redhat.com/mbox/"},{"id":124052,"url":"https://patchwork.plctlab.org/api/1.2/patches/124052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181954.31073-1-cupertino.miranda@oracle.com/","msgid":"<20230721181954.31073-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T18:19:54","name":"[v4] bpf: fixed template for neg (added second operand)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181954.31073-1-cupertino.miranda@oracle.com/mbox/"},{"id":124053,"url":"https://patchwork.plctlab.org/api/1.2/patches/124053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183035.2892020-1-vineetg@rivosinc.com/","msgid":"<20230721183035.2892020-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-21T18:30:35","name":"[v2] RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183035.2892020-1-vineetg@rivosinc.com/mbox/"},{"id":124055,"url":"https://patchwork.plctlab.org/api/1.2/patches/124055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183420.1806906-1-ppalka@redhat.com/","msgid":"<20230721183420.1806906-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-21T18:34:19","name":"[2/1] c++: passing partially inst ttp as ttp [PR110566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183420.1806906-1-ppalka@redhat.com/mbox/"},{"id":124062,"url":"https://patchwork.plctlab.org/api/1.2/patches/124062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721190234.1018000-1-qing.zhao@oracle.com/","msgid":"<20230721190234.1018000-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-07-21T19:02:34","name":"gcc-13/changes.html: Add and fix URL to -fstrict-flex-array option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721190234.1018000-1-qing.zhao@oracle.com/mbox/"},{"id":124065,"url":"https://patchwork.plctlab.org/api/1.2/patches/124065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLriUhZiW+1cEByD@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-21T19:53:54","name":"[committed] Require target lra in gcc.c-torture/compile/asmgoto-6.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLriUhZiW+1cEByD@mx3210.localdomain/mbox/"},{"id":124105,"url":"https://patchwork.plctlab.org/api/1.2/patches/124105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAvei9q1OdtwLCJcog5omsftpaXjMfwdNqX=X5BpVYYrQjpYzw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T21:22:48","name":"libstdc++ Add cstdarg to freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAvei9q1OdtwLCJcog5omsftpaXjMfwdNqX=X5BpVYYrQjpYzw@mail.gmail.com/mbox/"},{"id":124110,"url":"https://patchwork.plctlab.org/api/1.2/patches/124110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721212937.1784983-1-thiago.bauermann@linaro.org/","msgid":"<20230721212937.1784983-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-07-21T21:29:37","name":"testsuite: Adjust g++.dg/gomp/pr58567.C to new compiler message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721212937.1784983-1-thiago.bauermann@linaro.org/mbox/"},{"id":124138,"url":"https://patchwork.plctlab.org/api/1.2/patches/124138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721223835.630543-1-polacek@redhat.com/","msgid":"<20230721223835.630543-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-21T22:38:35","name":"c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721223835.630543-1-polacek@redhat.com/mbox/"},{"id":124145,"url":"https://patchwork.plctlab.org/api/1.2/patches/124145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-2-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-2-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:48","name":"[v3,1/4] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-2-lhyatt@gmail.com/mbox/"},{"id":124142,"url":"https://patchwork.plctlab.org/api/1.2/patches/124142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-3-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-3-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:49","name":"[v3,2/4] diagnostics: Handle generated data locations in edit_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-3-lhyatt@gmail.com/mbox/"},{"id":124144,"url":"https://patchwork.plctlab.org/api/1.2/patches/124144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-4-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-4-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:50","name":"[v3,3/4] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-4-lhyatt@gmail.com/mbox/"},{"id":124143,"url":"https://patchwork.plctlab.org/api/1.2/patches/124143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-5-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-5-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:51","name":"[v3,4/4] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-5-lhyatt@gmail.com/mbox/"},{"id":124149,"url":"https://patchwork.plctlab.org/api/1.2/patches/124149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef666dabca521f1afb9cc1cf6d65a3a9a0a17084.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T23:38:04","name":"[1/2,ver,2] rs6000, add argument to function find_instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef666dabca521f1afb9cc1cf6d65a3a9a0a17084.camel@us.ibm.com/mbox/"},{"id":124162,"url":"https://patchwork.plctlab.org/api/1.2/patches/124162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com/","msgid":"<6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com>","list_archive_url":null,"date":"2023-07-22T00:34:43","name":"[pushed,LRA] : Fix sparc bootstrap after recent patch for fp elimination for avr LRA port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com/mbox/"},{"id":124326,"url":"https://patchwork.plctlab.org/api/1.2/patches/124326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com/","msgid":"<00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T14:17:40","name":"[x86] Don'\''t use insvti_{high, low}part with -O0 (for compile-time).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com/mbox/"},{"id":124330,"url":"https://patchwork.plctlab.org/api/1.2/patches/124330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyJ/BH+crWg3hD@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:13:43","name":"[v5,1/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyJ/BH+crWg3hD@Thaum.localdomain/mbox/"},{"id":124331,"url":"https://patchwork.plctlab.org/api/1.2/patches/124331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyXbXiHvhfAjpu@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:14:37","name":"[v5,2/3] c++: Prevent dangling pointers from becoming nullptr in constexpr [PR110619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyXbXiHvhfAjpu@Thaum.localdomain/mbox/"},{"id":124332,"url":"https://patchwork.plctlab.org/api/1.2/patches/124332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvygoqcP+PcF6hH@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:15:14","name":"[v5,3/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvygoqcP+PcF6hH@Thaum.localdomain/mbox/"},{"id":124333,"url":"https://patchwork.plctlab.org/api/1.2/patches/124333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com/","msgid":"<00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T15:37:39","name":"[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com/mbox/"},{"id":124335,"url":"https://patchwork.plctlab.org/api/1.2/patches/124335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com/","msgid":"<9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com>","list_archive_url":null,"date":"2023-07-22T15:53:24","name":"[committed] Fix length computation bug in bfin port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com/mbox/"},{"id":124340,"url":"https://patchwork.plctlab.org/api/1.2/patches/124340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com/","msgid":"<00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T16:44:48","name":"Replace lra-spill.cc'\''s return_regno_p with return_reg_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com/mbox/"},{"id":124342,"url":"https://patchwork.plctlab.org/api/1.2/patches/124342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307221710120.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-22T16:57:30","name":"[committed] testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307221710120.28892@tpp.orcam.me.uk/mbox/"},{"id":124372,"url":"https://patchwork.plctlab.org/api/1.2/patches/124372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722205302.1611930-1-apinski@marvell.com/","msgid":"<20230722205302.1611930-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-22T20:53:02","name":"Fix alpha building","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722205302.1611930-1-apinski@marvell.com/mbox/"},{"id":124378,"url":"https://patchwork.plctlab.org/api/1.2/patches/124378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722214805.297932-1-vineetg@rivosinc.com/","msgid":"<20230722214805.297932-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-22T21:48:05","name":"[Committed] RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722214805.297932-1-vineetg@rivosinc.com/mbox/"},{"id":124392,"url":"https://patchwork.plctlab.org/api/1.2/patches/124392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722232649.1617746-1-apinski@marvell.com/","msgid":"<20230722232649.1617746-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-22T23:26:49","name":"Fix 100864: `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722232649.1617746-1-apinski@marvell.com/mbox/"},{"id":124404,"url":"https://patchwork.plctlab.org/api/1.2/patches/124404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-1-apinski@marvell.com/","msgid":"<20230723010645.1622083-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-23T01:06:44","name":"[1/2] Fix PR 110066: crash with -pg -static on riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-1-apinski@marvell.com/mbox/"},{"id":124403,"url":"https://patchwork.plctlab.org/api/1.2/patches/124403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-2-apinski@marvell.com/","msgid":"<20230723010645.1622083-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-23T01:06:45","name":"[2/2] AARCH64: Turn off unwind tables for crtbeginT.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-2-apinski@marvell.com/mbox/"},{"id":124418,"url":"https://patchwork.plctlab.org/api/1.2/patches/124418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723042333.1956144-1-lehua.ding@rivai.ai/","msgid":"<20230723042333.1956144-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-23T04:23:33","name":"[V5] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723042333.1956144-1-lehua.ding@rivai.ai/mbox/"},{"id":124450,"url":"https://patchwork.plctlab.org/api/1.2/patches/124450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723131120.3626085-1-pan2.li@intel.com/","msgid":"<20230723131120.3626085-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-23T13:11:20","name":"[v5] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723131120.3626085-1-pan2.li@intel.com/mbox/"},{"id":124457,"url":"https://patchwork.plctlab.org/api/1.2/patches/124457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723135421.3723462-1-pan2.li@intel.com/","msgid":"<20230723135421.3723462-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-23T13:54:21","name":"[v1] RISC-V: Bugfix for allowing incorrect dyn for static rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723135421.3723462-1-pan2.li@intel.com/mbox/"},{"id":124553,"url":"https://patchwork.plctlab.org/api/1.2/patches/124553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-2-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:17","name":"[V2,1/5] OpenMP: Add OMP_STRUCTURED_BLOCK and GIMPLE_OMP_STRUCTURED_BLOCK.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-2-sandra@codesourcery.com/mbox/"},{"id":124552,"url":"https://patchwork.plctlab.org/api/1.2/patches/124552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-3-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:18","name":"[V2,2/5] OpenMP: C front end support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-3-sandra@codesourcery.com/mbox/"},{"id":124555,"url":"https://patchwork.plctlab.org/api/1.2/patches/124555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-4-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:19","name":"[V2,3/5] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-4-sandra@codesourcery.com/mbox/"},{"id":124554,"url":"https://patchwork.plctlab.org/api/1.2/patches/124554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-5-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:20","name":"[V2,4/5] OpenMP: New C/C++ testcases for imperfectly nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-5-sandra@codesourcery.com/mbox/"},{"id":124556,"url":"https://patchwork.plctlab.org/api/1.2/patches/124556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-6-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:21","name":"[V2,5/5] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-6-sandra@codesourcery.com/mbox/"},{"id":124580,"url":"https://patchwork.plctlab.org/api/1.2/patches/124580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724024209.3595212-1-pan2.li@intel.com/","msgid":"<20230724024209.3595212-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-24T02:42:09","name":"[v6] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724024209.3595212-1-pan2.li@intel.com/mbox/"},{"id":124590,"url":"https://patchwork.plctlab.org/api/1.2/patches/124590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACJEya+wn7RxPr5t=MYr5Xedh7q4q=CfwiA=qPP7mk4uRq7zNw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T03:28:02","name":"libstdc++: Add missing constexpr specifier and function overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACJEya+wn7RxPr5t=MYr5Xedh7q4q=CfwiA=qPP7mk4uRq7zNw@mail.gmail.com/mbox/"},{"id":124662,"url":"https://patchwork.plctlab.org/api/1.2/patches/124662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075008.5B449138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724075008.5B449138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T07:50:07","name":"tree-optimization/110777 - abnormals and recent PRE optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075008.5B449138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124663,"url":"https://patchwork.plctlab.org/api/1.2/patches/124663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T07:50:21","name":"tree-optimization/110766 - missing PHI location check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124714,"url":"https://patchwork.plctlab.org/api/1.2/patches/124714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724090915.27231-1-jose.marchesi@oracle.com/","msgid":"<20230724090915.27231-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T09:09:15","name":"[COMMITTED] bpf: make use of the bswap{16,32,64} V4 BPF instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724090915.27231-1-jose.marchesi@oracle.com/mbox/"},{"id":124745,"url":"https://patchwork.plctlab.org/api/1.2/patches/124745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724095712.14497-1-jose.marchesi@oracle.com/","msgid":"<20230724095712.14497-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T09:57:12","name":"[COMMITTED] bpf: remove -mkernel option and BPF_KERNEL_VERSION_CODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724095712.14497-1-jose.marchesi@oracle.com/mbox/"},{"id":124773,"url":"https://patchwork.plctlab.org/api/1.2/patches/124773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724102431.94955138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724102431.94955138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T10:24:31","name":"Remove SLP_TREE_VEC_STMTS in favor of SLP_TREE_VEC_DEFS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724102431.94955138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124792,"url":"https://patchwork.plctlab.org/api/1.2/patches/124792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com/","msgid":"<6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com>","list_archive_url":null,"date":"2023-07-24T11:02:29","name":"[Hashtable] Performance optimization through use of insertion hint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com/mbox/"},{"id":124876,"url":"https://patchwork.plctlab.org/api/1.2/patches/124876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com/","msgid":"<021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-24T11:37:59","name":"[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com/mbox/"},{"id":124879,"url":"https://patchwork.plctlab.org/api/1.2/patches/124879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724114650.61923-1-juzhe.zhong@rivai.ai/","msgid":"<20230724114650.61923-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-24T11:46:50","name":"VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724114650.61923-1-juzhe.zhong@rivai.ai/mbox/"},{"id":124911,"url":"https://patchwork.plctlab.org/api/1.2/patches/124911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123251.6923E138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724123251.6923E138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T12:32:51","name":"[i386] remove unused tree-vectorizer.h includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123251.6923E138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124912,"url":"https://patchwork.plctlab.org/api/1.2/patches/124912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123304.1DD21138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724123304.1DD21138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T12:33:03","name":"Remove unused tree-vectorizer.h include","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123304.1DD21138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":125006,"url":"https://patchwork.plctlab.org/api/1.2/patches/125006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d26218f5-6167-97a7-9f4c-0458b6ba8297@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T13:59:27","name":"[committed,RISC-V] Fix minor issues in diagnostic message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d26218f5-6167-97a7-9f4c-0458b6ba8297@gmail.com/mbox/"},{"id":125007,"url":"https://patchwork.plctlab.org/api/1.2/patches/125007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724140143.17350-1-jose.marchesi@oracle.com/","msgid":"<20230724140143.17350-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T14:01:43","name":"[COMMITTED] bpf: sdiv/smod are now part of BPF V4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724140143.17350-1-jose.marchesi@oracle.com/mbox/"},{"id":125010,"url":"https://patchwork.plctlab.org/api/1.2/patches/125010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com/","msgid":"<7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com>","list_archive_url":null,"date":"2023-07-24T14:14:37","name":"[committed] Use single quote rather than backquote in RISC-V diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com/mbox/"},{"id":125049,"url":"https://patchwork.plctlab.org/api/1.2/patches/125049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com/","msgid":"<8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com>","list_archive_url":null,"date":"2023-07-24T14:39:27","name":"[GCC13] PR tree-optimization/110315 - Add auto-resizing capability to irange'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com/mbox/"},{"id":125077,"url":"https://patchwork.plctlab.org/api/1.2/patches/125077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL6gc8/8THf1gN18@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-24T16:01:55","name":"range-op-float: Fix up -frounding-math frange_arithmetic +- handling [PR110755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL6gc8/8THf1gN18@tucnak/mbox/"},{"id":125169,"url":"https://patchwork.plctlab.org/api/1.2/patches/125169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724190858.8717-1-david.faust@oracle.com/","msgid":"<20230724190858.8717-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-24T19:08:58","name":"[COMMITTED] bpf: add pseudo-c asm dialect for \"nop\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724190858.8717-1-david.faust@oracle.com/mbox/"},{"id":125174,"url":"https://patchwork.plctlab.org/api/1.2/patches/125174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b915c835-71fb-ae37-487e-221a98ac22ec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T19:43:10","name":"OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b915c835-71fb-ae37-487e-221a98ac22ec@codesourcery.com/mbox/"},{"id":125179,"url":"https://patchwork.plctlab.org/api/1.2/patches/125179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200510.83085-1-jwakely@redhat.com/","msgid":"<20230724200510.83085-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-24T20:04:23","name":"[committed] libstdc++; Do not use strtold for hppa-hpux [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200510.83085-1-jwakely@redhat.com/mbox/"},{"id":125180,"url":"https://patchwork.plctlab.org/api/1.2/patches/125180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200642.84915-1-jwakely@redhat.com/","msgid":"<20230724200642.84915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-24T20:05:32","name":"libstdc++: Reuse double overload of __convert_to_v if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200642.84915-1-jwakely@redhat.com/mbox/"},{"id":125187,"url":"https://patchwork.plctlab.org/api/1.2/patches/125187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724203536.40091-1-hjl.tools@gmail.com/","msgid":"<20230724203536.40091-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-24T20:35:36","name":"[v3] x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724203536.40091-1-hjl.tools@gmail.com/mbox/"},{"id":125211,"url":"https://patchwork.plctlab.org/api/1.2/patches/125211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL79Q71QB3UOT+nE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T22:37:55","name":"[v2] c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL79Q71QB3UOT+nE@redhat.com/mbox/"},{"id":125222,"url":"https://patchwork.plctlab.org/api/1.2/patches/125222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724234851.1736326-1-apinski@marvell.com/","msgid":"<20230724234851.1736326-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-24T23:48:51","name":"Fix PR 93044: extra cast is not removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724234851.1736326-1-apinski@marvell.com/mbox/"},{"id":125262,"url":"https://patchwork.plctlab.org/api/1.2/patches/125262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com/","msgid":"<485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com>","list_archive_url":null,"date":"2023-07-25T02:10:16","name":"[PATCHv2,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com/mbox/"},{"id":125335,"url":"https://patchwork.plctlab.org/api/1.2/patches/125335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725055156.595718-1-pan2.li@intel.com/","msgid":"<20230725055156.595718-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-25T05:51:56","name":"[v7] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725055156.595718-1-pan2.li@intel.com/mbox/"},{"id":125346,"url":"https://patchwork.plctlab.org/api/1.2/patches/125346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725063910.1568-1-jinma@linux.alibaba.com/","msgid":"<20230725063910.1568-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-25T06:39:10","name":"RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725063910.1568-1-jinma@linux.alibaba.com/mbox/"},{"id":125366,"url":"https://patchwork.plctlab.org/api/1.2/patches/125366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725072816.1629-1-jinma@linux.alibaba.com/","msgid":"<20230725072816.1629-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-25T07:28:16","name":"[v2] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725072816.1629-1-jinma@linux.alibaba.com/mbox/"},{"id":125529,"url":"https://patchwork.plctlab.org/api/1.2/patches/125529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com/","msgid":"<8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com>","list_archive_url":null,"date":"2023-07-25T11:14:03","name":"OpenMP/Fortran: Reject declarations between target + teams (was: [Patch] OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71065])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com/mbox/"},{"id":125530,"url":"https://patchwork.plctlab.org/api/1.2/patches/125530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com/","msgid":"<004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-25T11:31:45","name":"PR rtl-optimization/110587: Reduce useless moves in compile-time hog.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com/mbox/"},{"id":125611,"url":"https://patchwork.plctlab.org/api/1.2/patches/125611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725125832.1399590-1-juzhe.zhong@rivai.ai/","msgid":"<20230725125832.1399590-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-25T12:58:32","name":"internal-fn: Refine macro define of COND_* and COND_LEN_* internal functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725125832.1399590-1-juzhe.zhong@rivai.ai/mbox/"},{"id":125618,"url":"https://patchwork.plctlab.org/api/1.2/patches/125618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725132352.1638772-1-poulhies@adacore.com/","msgid":"<20230725132352.1638772-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-25T13:23:52","name":"[COMMITTED] Adjust one Ada test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725132352.1638772-1-poulhies@adacore.com/mbox/"},{"id":125621,"url":"https://patchwork.plctlab.org/api/1.2/patches/125621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134050.706193856DF4@sourceware.org/","msgid":"<20230725134050.706193856DF4@sourceware.org>","list_archive_url":null,"date":"2023-07-25T13:40:04","name":"rtl-optimization/110587 - remove quadratic regno_in_use_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134050.706193856DF4@sourceware.org/mbox/"},{"id":125622,"url":"https://patchwork.plctlab.org/api/1.2/patches/125622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134122.51229385773F@sourceware.org/","msgid":"<20230725134122.51229385773F@sourceware.org>","list_archive_url":null,"date":"2023-07-25T13:40:33","name":"rtl-optimization/110587 - speedup find_hard_regno_for_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134122.51229385773F@sourceware.org/mbox/"},{"id":125632,"url":"https://patchwork.plctlab.org/api/1.2/patches/125632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725140335.1739803-1-juzhe.zhong@rivai.ai/","msgid":"<20230725140335.1739803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-25T14:03:35","name":"RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725140335.1739803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":125712,"url":"https://patchwork.plctlab.org/api/1.2/patches/125712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com/","msgid":"<5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com>","list_archive_url":null,"date":"2023-07-25T15:52:06","name":"[OpenACC,2.7] Connect readonly modifier to points-to analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com/mbox/"},{"id":125725,"url":"https://patchwork.plctlab.org/api/1.2/patches/125725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL//joAT7GOtzusI@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-25T16:59:58","name":"[v3] c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL//joAT7GOtzusI@redhat.com/mbox/"},{"id":125746,"url":"https://patchwork.plctlab.org/api/1.2/patches/125746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-2-patrick@rivosinc.com/","msgid":"<20230725180206.284777-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:55","name":"[gcc13,backport,01/12] RISC-V: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-2-patrick@rivosinc.com/mbox/"},{"id":125749,"url":"https://patchwork.plctlab.org/api/1.2/patches/125749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-3-patrick@rivosinc.com/","msgid":"<20230725180206.284777-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:56","name":"[gcc13,backport,02/12] RISC-V: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-3-patrick@rivosinc.com/mbox/"},{"id":125747,"url":"https://patchwork.plctlab.org/api/1.2/patches/125747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-4-patrick@rivosinc.com/","msgid":"<20230725180206.284777-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:57","name":"[gcc13,backport,03/12] RISC-V: Enforce subword atomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-4-patrick@rivosinc.com/mbox/"},{"id":125748,"url":"https://patchwork.plctlab.org/api/1.2/patches/125748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-5-patrick@rivosinc.com/","msgid":"<20230725180206.284777-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:58","name":"[gcc13,backport,04/12] RISC-V: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-5-patrick@rivosinc.com/mbox/"},{"id":125753,"url":"https://patchwork.plctlab.org/api/1.2/patches/125753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-6-patrick@rivosinc.com/","msgid":"<20230725180206.284777-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:59","name":"[gcc13,backport,05/12] RISC-V: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-6-patrick@rivosinc.com/mbox/"},{"id":125750,"url":"https://patchwork.plctlab.org/api/1.2/patches/125750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-7-patrick@rivosinc.com/","msgid":"<20230725180206.284777-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:00","name":"[gcc13,backport,06/12] RISC-V: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-7-patrick@rivosinc.com/mbox/"},{"id":125754,"url":"https://patchwork.plctlab.org/api/1.2/patches/125754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-8-patrick@rivosinc.com/","msgid":"<20230725180206.284777-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:01","name":"[gcc13,backport,07/12] RISC-V: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-8-patrick@rivosinc.com/mbox/"},{"id":125752,"url":"https://patchwork.plctlab.org/api/1.2/patches/125752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-9-patrick@rivosinc.com/","msgid":"<20230725180206.284777-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:02","name":"[gcc13,backport,08/12] RISC-V: Weaken LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-9-patrick@rivosinc.com/mbox/"},{"id":125751,"url":"https://patchwork.plctlab.org/api/1.2/patches/125751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-10-patrick@rivosinc.com/","msgid":"<20230725180206.284777-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:03","name":"[gcc13,backport,09/12] RISC-V: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-10-patrick@rivosinc.com/mbox/"},{"id":125756,"url":"https://patchwork.plctlab.org/api/1.2/patches/125756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-11-patrick@rivosinc.com/","msgid":"<20230725180206.284777-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:04","name":"[gcc13,backport,10/12] RISC-V: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-11-patrick@rivosinc.com/mbox/"},{"id":125755,"url":"https://patchwork.plctlab.org/api/1.2/patches/125755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-12-patrick@rivosinc.com/","msgid":"<20230725180206.284777-12-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:05","name":"[gcc13,backport,11/12] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-12-patrick@rivosinc.com/mbox/"},{"id":125757,"url":"https://patchwork.plctlab.org/api/1.2/patches/125757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-13-patrick@rivosinc.com/","msgid":"<20230725180206.284777-13-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:06","name":"[gcc13,backport,12/12] riscv: fix error: control reaches end of non-void function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-13-patrick@rivosinc.com/mbox/"},{"id":125759,"url":"https://patchwork.plctlab.org/api/1.2/patches/125759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725181118.27484-1-simonaytes.yan@ispras.ru/","msgid":"<20230725181118.27484-1-simonaytes.yan@ispras.ru>","list_archive_url":null,"date":"2023-07-25T18:11:18","name":"Replace invariant ternlog operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725181118.27484-1-simonaytes.yan@ispras.ru/mbox/"},{"id":125772,"url":"https://patchwork.plctlab.org/api/1.2/patches/125772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-1-aldyh@redhat.com/","msgid":"<20230725190739.37779-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:07:29","name":"[COMMITTED] Make some functions in CCP static.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-1-aldyh@redhat.com/mbox/"},{"id":125773,"url":"https://patchwork.plctlab.org/api/1.2/patches/125773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-3-aldyh@redhat.com/","msgid":"<20230725190739.37779-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:07:31","name":"Initialize value in bit_value_unop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-3-aldyh@redhat.com/mbox/"},{"id":125775,"url":"https://patchwork.plctlab.org/api/1.2/patches/125775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-07-25T19:24:23","name":"List myself as \"nvptx port\" maintainer (was: Thomas Schwinge appointed co-maintainer of the nvptx backend)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":125787,"url":"https://patchwork.plctlab.org/api/1.2/patches/125787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725195552.1249139-1-polacek@redhat.com/","msgid":"<20230725195552.1249139-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:55:52","name":"c++: clear tf_partial et al in instantiate_template [PR108960]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725195552.1249139-1-polacek@redhat.com/mbox/"},{"id":125819,"url":"https://patchwork.plctlab.org/api/1.2/patches/125819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com/","msgid":"<3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com>","list_archive_url":null,"date":"2023-07-25T21:45:54","name":"OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com/mbox/"},{"id":125828,"url":"https://patchwork.plctlab.org/api/1.2/patches/125828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725215534.1791062-1-apinski@marvell.com/","msgid":"<20230725215534.1791062-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-25T21:55:34","name":"[COMMITTED] Fix 110803: use of plain char instead of signed char","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725215534.1791062-1-apinski@marvell.com/mbox/"},{"id":125839,"url":"https://patchwork.plctlab.org/api/1.2/patches/125839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-1-david.faust@oracle.com/","msgid":"<20230725220821.11431-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:08:20","name":"[1/2] bpf: don'\''t print () in bpf_print_operand_address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-1-david.faust@oracle.com/mbox/"},{"id":125840,"url":"https://patchwork.plctlab.org/api/1.2/patches/125840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-2-david.faust@oracle.com/","msgid":"<20230725220821.11431-2-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:08:21","name":"[2/2] bpf: add v3 atomic instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-2-david.faust@oracle.com/mbox/"},{"id":125901,"url":"https://patchwork.plctlab.org/api/1.2/patches/125901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224308.12304-1-david.faust@oracle.com/","msgid":"<20230725224308.12304-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:43:08","name":"[v2,2/2] bpf: add v3 atomic instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224308.12304-1-david.faust@oracle.com/mbox/"},{"id":125906,"url":"https://patchwork.plctlab.org/api/1.2/patches/125906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224920.12392-1-david.faust@oracle.com/","msgid":"<20230725224920.12392-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:49:20","name":"[COMMITTED,v2,1/2] bpf: don'\''t print () in bpf_print_operand_address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224920.12392-1-david.faust@oracle.com/mbox/"},{"id":126030,"url":"https://patchwork.plctlab.org/api/1.2/patches/126030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726014423.2747726-1-jason@redhat.com/","msgid":"<20230726014423.2747726-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-26T01:44:23","name":"[pushed] testsuite: run C++11 tests in C++11 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726014423.2747726-1-jason@redhat.com/mbox/"},{"id":126037,"url":"https://patchwork.plctlab.org/api/1.2/patches/126037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726021712.352-1-jinma@linux.alibaba.com/","msgid":"<20230726021712.352-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-26T02:17:12","name":"[v3] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726021712.352-1-jinma@linux.alibaba.com/mbox/"},{"id":126039,"url":"https://patchwork.plctlab.org/api/1.2/patches/126039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com/","msgid":"<7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com>","list_archive_url":null,"date":"2023-07-26T02:52:50","name":"vect: Treat VMAT_ELEMENTWISE as scalar load in costing [PR110776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com/mbox/"},{"id":126040,"url":"https://patchwork.plctlab.org/api/1.2/patches/126040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b35db8fe-8397-607c-3e2d-035fe49380d2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T02:53:11","name":"rs6000: Correct vsx operands output for xxeval [PR110741]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b35db8fe-8397-607c-3e2d-035fe49380d2@linux.ibm.com/mbox/"},{"id":126051,"url":"https://patchwork.plctlab.org/api/1.2/patches/126051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726040429.30868-1-xuli1@eswincomputing.com/","msgid":"<20230726040429.30868-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T04:04:29","name":"RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726040429.30868-1-xuli1@eswincomputing.com/mbox/"},{"id":126114,"url":"https://patchwork.plctlab.org/api/1.2/patches/126114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726054104.403-1-jinma@linux.alibaba.com/","msgid":"<20230726054104.403-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-26T05:41:04","name":"[v4] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726054104.403-1-jinma@linux.alibaba.com/mbox/"},{"id":126135,"url":"https://patchwork.plctlab.org/api/1.2/patches/126135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMDEwXtgcXt8s3kE@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-26T07:01:21","name":"Fix profile_count::to_sreal_scale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMDEwXtgcXt8s3kE@kam.mff.cuni.cz/mbox/"},{"id":126164,"url":"https://patchwork.plctlab.org/api/1.2/patches/126164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sP4X5xFOS0295td32=BBvbtbbN2=h+G7SEJkeQ8hWrUKw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T07:54:53","name":"RISC-V: Replace unspec with bitreverse in riscv_brev8_ insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sP4X5xFOS0295td32=BBvbtbbN2=h+G7SEJkeQ8hWrUKw@mail.gmail.com/mbox/"},{"id":126166,"url":"https://patchwork.plctlab.org/api/1.2/patches/126166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726080008.14544-1-xuli1@eswincomputing.com/","msgid":"<20230726080008.14544-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T08:00:08","name":"[v2] RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726080008.14544-1-xuli1@eswincomputing.com/mbox/"},{"id":126171,"url":"https://patchwork.plctlab.org/api/1.2/patches/126171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726081836.16660-1-xuli1@eswincomputing.com/","msgid":"<20230726081836.16660-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T08:18:36","name":"RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726081836.16660-1-xuli1@eswincomputing.com/mbox/"},{"id":126182,"url":"https://patchwork.plctlab.org/api/1.2/patches/126182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-1-aldyh@redhat.com/","msgid":"<20230726084224.43416-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:15","name":"[COMMITTED,range-ops] Handle bitmasks for unary operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-1-aldyh@redhat.com/mbox/"},{"id":126183,"url":"https://patchwork.plctlab.org/api/1.2/patches/126183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-2-aldyh@redhat.com/","msgid":"<20230726084224.43416-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:16","name":"[COMMITTED,range-ops] Handle bitmasks for BIT_NOT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-2-aldyh@redhat.com/mbox/"},{"id":126184,"url":"https://patchwork.plctlab.org/api/1.2/patches/126184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-3-aldyh@redhat.com/","msgid":"<20230726084224.43416-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:17","name":"[COMMITTED,range-ops] Handle bitmasks for ABS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-3-aldyh@redhat.com/mbox/"},{"id":126185,"url":"https://patchwork.plctlab.org/api/1.2/patches/126185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-4-aldyh@redhat.com/","msgid":"<20230726084224.43416-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:18","name":"[COMMITTED,range-ops] Handle bitmasks for ABSU_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-4-aldyh@redhat.com/mbox/"},{"id":126234,"url":"https://patchwork.plctlab.org/api/1.2/patches/126234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726094219.D4A98385AF89@sourceware.org/","msgid":"<20230726094219.D4A98385AF89@sourceware.org>","list_archive_url":null,"date":"2023-07-26T09:41:34","name":"tree-optimization/110799 - fix bug in code hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726094219.D4A98385AF89@sourceware.org/mbox/"},{"id":126243,"url":"https://patchwork.plctlab.org/api/1.2/patches/126243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com/","msgid":"<30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com>","list_archive_url":null,"date":"2023-07-26T09:57:25","name":"[committed] libgomp.texi: Add status item, @ref and document omp_in_explicit_task","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com/mbox/"},{"id":126245,"url":"https://patchwork.plctlab.org/api/1.2/patches/126245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726101045.13125-1-jose.marchesi@oracle.com/","msgid":"<20230726101045.13125-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-26T10:10:45","name":"[COMMITTED] bpf: fix generation of neg and neg32 BPF instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726101045.13125-1-jose.marchesi@oracle.com/mbox/"},{"id":126247,"url":"https://patchwork.plctlab.org/api/1.2/patches/126247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bT=yF69w62M5ZsFmaoENaLw=-NdyPtXSSmfN4miw1cbQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T10:21:51","name":"[committed] i386: Clear upper half of XMM register for V2SFmode operations [PR110762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bT=yF69w62M5ZsFmaoENaLw=-NdyPtXSSmfN4miw1cbQ@mail.gmail.com/mbox/"},{"id":126272,"url":"https://patchwork.plctlab.org/api/1.2/patches/126272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726113557.97035-1-aldyh@redhat.com/","msgid":"<20230726113557.97035-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T11:35:54","name":"[COMMITTED,range-ops] Remove special case for handling bitmasks in casts.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726113557.97035-1-aldyh@redhat.com/mbox/"},{"id":126275,"url":"https://patchwork.plctlab.org/api/1.2/patches/126275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com/","msgid":"<04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-26T11:40:57","name":"PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com/mbox/"},{"id":126358,"url":"https://patchwork.plctlab.org/api/1.2/patches/126358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726132834.D12B5385C8B0@sourceware.org/","msgid":"<20230726132834.D12B5385C8B0@sourceware.org>","list_archive_url":null,"date":"2023-07-26T13:27:33","name":"tree-optimization/106081 - elide redundant permute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726132834.D12B5385C8B0@sourceware.org/mbox/"},{"id":126402,"url":"https://patchwork.plctlab.org/api/1.2/patches/126402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Zuc1F9BmG25Uh4i_XMMzG4XdOo8L4zbN=5V6oeBPjffQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T14:11:01","name":"[committed] testsuite: Fix gfortran.dg/ieee/comparisons_3.F90 testsuite failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Zuc1F9BmG25Uh4i_XMMzG4XdOo8L4zbN=5V6oeBPjffQ@mail.gmail.com/mbox/"},{"id":126412,"url":"https://patchwork.plctlab.org/api/1.2/patches/126412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726143332.749363-1-dmalcolm@redhat.com/","msgid":"<20230726143332.749363-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-26T14:33:32","name":"[pushed] analyzer: add symbol base class, moving region id to there [PR104940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726143332.749363-1-dmalcolm@redhat.com/mbox/"},{"id":126422,"url":"https://patchwork.plctlab.org/api/1.2/patches/126422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21466af-ae65-2e1b-49c2-ababe6047be3@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T14:44:16","name":"aarch64: enable mixed-types for aarch64 simdclones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21466af-ae65-2e1b-49c2-ababe6047be3@arm.com/mbox/"},{"id":126475,"url":"https://patchwork.plctlab.org/api/1.2/patches/126475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6e25a36-e2e8-4787-86bc-885faa1f0acc@AZ-NEU-EX03.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T15:58:54","name":"[committed] Add check_vect in a testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6e25a36-e2e8-4787-86bc-885faa1f0acc@AZ-NEU-EX03.Arm.com/mbox/"},{"id":126480,"url":"https://patchwork.plctlab.org/api/1.2/patches/126480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160320.220196-1-jwakely@redhat.com/","msgid":"<20230726160320.220196-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:02:53","name":"[committed] libstdc++: Add deprecated attribute to std::random_shuffle declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160320.220196-1-jwakely@redhat.com/mbox/"},{"id":126481,"url":"https://patchwork.plctlab.org/api/1.2/patches/126481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160344.220228-1-jwakely@redhat.com/","msgid":"<20230726160344.220228-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:03:21","name":"[committed] libstdc++: Avoid bogus overflow warnings in std::vector [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160344.220228-1-jwakely@redhat.com/mbox/"},{"id":126483,"url":"https://patchwork.plctlab.org/api/1.2/patches/126483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc6f18335ec6dd5d87e06e3b77fee1e55b36529f.camel@gwdg.de/","msgid":"","list_archive_url":null,"date":"2023-07-26T16:06:49","name":"[C] Synthesize nonnull attribute for parameters declared with static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc6f18335ec6dd5d87e06e3b77fee1e55b36529f.camel@gwdg.de/mbox/"},{"id":126492,"url":"https://patchwork.plctlab.org/api/1.2/patches/126492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726163145.2905222-1-jason@redhat.com/","msgid":"<20230726163145.2905222-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:31:45","name":"[pushed] c++: member vs global template [PR106310]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726163145.2905222-1-jason@redhat.com/mbox/"},{"id":126499,"url":"https://patchwork.plctlab.org/api/1.2/patches/126499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165735.2058945-1-ppalka@redhat.com/","msgid":"<20230726165735.2058945-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:57:34","name":"c++: constexpr empty subobject confusion [PR110197]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165735.2058945-1-ppalka@redhat.com/mbox/"},{"id":126498,"url":"https://patchwork.plctlab.org/api/1.2/patches/126498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165750.2062127-1-ppalka@redhat.com/","msgid":"<20230726165750.2062127-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:57:50","name":"c++: unifying REAL_CSTs [PR110809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165750.2062127-1-ppalka@redhat.com/mbox/"},{"id":126508,"url":"https://patchwork.plctlab.org/api/1.2/patches/126508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMn5RHmbpYEZ=PZTJJ2552+sW0sAgh55+d+kNrDW9VfdvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T17:33:10","name":"[gcc-13] Backport PR10280 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMn5RHmbpYEZ=PZTJJ2552+sW0sAgh55+d+kNrDW9VfdvQ@mail.gmail.com/mbox/"},{"id":126520,"url":"https://patchwork.plctlab.org/api/1.2/patches/126520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726181204.229512-1-jwakely@redhat.com/","msgid":"<20230726181204.229512-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T18:11:47","name":"[committed] libstdc++: Require C++11 for 23_containers/vector/bool/110807.cc [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726181204.229512-1-jwakely@redhat.com/mbox/"},{"id":126533,"url":"https://patchwork.plctlab.org/api/1.2/patches/126533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6616a0f7-d3f9-44be-9894-f2ec511ebd7c-1690398620691@3c-app-gmx-bap18/","msgid":"","list_archive_url":null,"date":"2023-07-26T19:10:20","name":"Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6616a0f7-d3f9-44be-9894-f2ec511ebd7c-1690398620691@3c-app-gmx-bap18/mbox/"},{"id":126534,"url":"https://patchwork.plctlab.org/api/1.2/patches/126534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cad2d682-af6b-77be-daf2-fff2daf78faf@gmx.de/","msgid":"","list_archive_url":null,"date":"2023-07-26T19:17:58","name":"[v2] Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cad2d682-af6b-77be-daf2-fff2daf78faf@gmx.de/mbox/"},{"id":126542,"url":"https://patchwork.plctlab.org/api/1.2/patches/126542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de/","msgid":"<6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de>","list_archive_url":null,"date":"2023-07-26T19:33:22","name":"[v3] Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de/mbox/"},{"id":126584,"url":"https://patchwork.plctlab.org/api/1.2/patches/126584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com/","msgid":"<05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com>","list_archive_url":null,"date":"2023-07-27T01:28:49","name":"[committed,RISC-V] Fix expected diagnostic messages in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com/mbox/"},{"id":126611,"url":"https://patchwork.plctlab.org/api/1.2/patches/126611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727031940.162951-1-juzhe.zhong@rivai.ai/","msgid":"<20230727031940.162951-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T03:19:40","name":"[V2] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727031940.162951-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126822,"url":"https://patchwork.plctlab.org/api/1.2/patches/126822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727090640.65258-1-juzhe.zhong@rivai.ai/","msgid":"<20230727090640.65258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T09:06:40","name":"[V3] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727090640.65258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126878,"url":"https://patchwork.plctlab.org/api/1.2/patches/126878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727093438.31E2D38881C7@sourceware.org/","msgid":"<20230727093438.31E2D38881C7@sourceware.org>","list_archive_url":null,"date":"2023-07-27T09:31:49","name":"Remove recursive post-dominator traversal in sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727093438.31E2D38881C7@sourceware.org/mbox/"},{"id":126883,"url":"https://patchwork.plctlab.org/api/1.2/patches/126883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727094859.3884298-1-demin.han@starfivetech.com/","msgid":"<20230727094859.3884298-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-07-27T09:48:59","name":"RISC-V: Fix uninitialized and redundant use of which_alternative","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727094859.3884298-1-demin.han@starfivetech.com/mbox/"},{"id":126889,"url":"https://patchwork.plctlab.org/api/1.2/patches/126889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727103715.6CD7E3854803@sourceware.org/","msgid":"<20230727103715.6CD7E3854803@sourceware.org>","list_archive_url":null,"date":"2023-07-27T10:36:30","name":"XFAIL parts broken deliberately by r13-1762-gf9d4c3b45c5ed5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727103715.6CD7E3854803@sourceware.org/mbox/"},{"id":126895,"url":"https://patchwork.plctlab.org/api/1.2/patches/126895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727104353.3890397-1-pan2.li@intel.com/","msgid":"<20230727104353.3890397-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-27T10:43:53","name":"[v1] RISC-V: Remove unnecessary vread_csr/vwrite_csr intrinsic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727104353.3890397-1-pan2.li@intel.com/mbox/"},{"id":126925,"url":"https://patchwork.plctlab.org/api/1.2/patches/126925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727114702.219531-1-juzhe.zhong@rivai.ai/","msgid":"<20230727114702.219531-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T11:47:02","name":"[V4] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727114702.219531-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126934,"url":"https://patchwork.plctlab.org/api/1.2/patches/126934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727120151.C9B03385B524@sourceware.org/","msgid":"<20230727120151.C9B03385B524@sourceware.org>","list_archive_url":null,"date":"2023-07-27T12:00:56","name":"tree-optimization/91838 - fix FAIL of g++.dg/opt/pr91838.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727120151.C9B03385B524@sourceware.org/mbox/"},{"id":126973,"url":"https://patchwork.plctlab.org/api/1.2/patches/126973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727133639.2208533-1-hongtao.liu@intel.com/","msgid":"<20230727133639.2208533-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-27T13:36:39","name":"[x86] Add UNSPEC_MASKOP to vpbroadcastm pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727133639.2208533-1-hongtao.liu@intel.com/mbox/"},{"id":126987,"url":"https://patchwork.plctlab.org/api/1.2/patches/126987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9Df2xIWL6wD35@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:19:57","name":"Fix profile_count::apply_probability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9Df2xIWL6wD35@kam.mff.cuni.cz/mbox/"},{"id":126988,"url":"https://patchwork.plctlab.org/api/1.2/patches/126988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9PZiYSPTP8YP0@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:20:45","name":"Fix profile update in tree-ssa-loop-im.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9PZiYSPTP8YP0@kam.mff.cuni.cz/mbox/"},{"id":126989,"url":"https://patchwork.plctlab.org/api/1.2/patches/126989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9eeM5DRrlLsTv@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:21:45","name":"Fix profile update in tree_transform_and_unroll_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9eeM5DRrlLsTv@kam.mff.cuni.cz/mbox/"},{"id":127002,"url":"https://patchwork.plctlab.org/api/1.2/patches/127002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727150345.303590-1-jwakely@redhat.com/","msgid":"<20230727150345.303590-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-27T15:03:11","name":"[committed] libstdc++: Fix std::format alternate form for floating-point [PR108046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727150345.303590-1-jwakely@redhat.com/mbox/"},{"id":127054,"url":"https://patchwork.plctlab.org/api/1.2/patches/127054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com/","msgid":"<447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com>","list_archive_url":null,"date":"2023-07-27T16:36:49","name":"[committed] OpenMP/Fortran: Extend reject code between target + teams [PR71065, PR110725] (was: Re: [patch] OpenMP/Fortran: Reject declarations between target + teams (was: [Patch] OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com/mbox/"},{"id":127071,"url":"https://patchwork.plctlab.org/api/1.2/patches/127071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlYWhZSKuUv3gX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:12:01","name":"[1/5] Middle-end _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlYWhZSKuUv3gX@tucnak/mbox/"},{"id":127073,"url":"https://patchwork.plctlab.org/api/1.2/patches/127073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlqT3aSPeqEHUB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:13:13","name":"[2/5] libgcc _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlqT3aSPeqEHUB@tucnak/mbox/"},{"id":127072,"url":"https://patchwork.plctlab.org/api/1.2/patches/127072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKl72EbjP0gPNM7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:14:23","name":"[3/5] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKl72EbjP0gPNM7@tucnak/mbox/"},{"id":127074,"url":"https://patchwork.plctlab.org/api/1.2/patches/127074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmMICooUqjISC2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:15:28","name":"[4/5] testsuite part 1 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmMICooUqjISC2@tucnak/mbox/"},{"id":127076,"url":"https://patchwork.plctlab.org/api/1.2/patches/127076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmdrWbE6owq+KJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:16:38","name":"[5/5] testsuite part 2 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmdrWbE6owq+KJ@tucnak/mbox/"},{"id":127101,"url":"https://patchwork.plctlab.org/api/1.2/patches/127101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727181105.15595-1-david.faust@oracle.com/","msgid":"<20230727181105.15595-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T18:11:05","name":"bpf: correct pseudo-C template for add3 and sub3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727181105.15595-1-david.faust@oracle.com/mbox/"},{"id":127107,"url":"https://patchwork.plctlab.org/api/1.2/patches/127107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK34wjgBF4MnGD7@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T18:30:59","name":"Fix profile update after RTL unrolling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK34wjgBF4MnGD7@kam.mff.cuni.cz/mbox/"},{"id":127108,"url":"https://patchwork.plctlab.org/api/1.2/patches/127108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK4ac7zl/oNVi0H@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T18:33:13","name":"Make store likely in optimize_mask_stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK4ac7zl/oNVi0H@kam.mff.cuni.cz/mbox/"},{"id":127129,"url":"https://patchwork.plctlab.org/api/1.2/patches/127129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-106acade-c06b-4bdf-8173-a189f07212dd-1690486793645@3c-app-gmx-bs10/","msgid":"","list_archive_url":null,"date":"2023-07-27T19:39:53","name":"Fortran: do not pass hidden character length for TYPE(*) dummy [PR110825]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-106acade-c06b-4bdf-8173-a189f07212dd-1690486793645@3c-app-gmx-bs10/mbox/"},{"id":127194,"url":"https://patchwork.plctlab.org/api/1.2/patches/127194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214120.18783-1-david.faust@oracle.com/","msgid":"<20230727214120.18783-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T21:41:20","name":"bpf: minor doc cleanup for command-line options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214120.18783-1-david.faust@oracle.com/mbox/"},{"id":127195,"url":"https://patchwork.plctlab.org/api/1.2/patches/127195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214324.18871-1-david.faust@oracle.com/","msgid":"<20230727214324.18871-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T21:43:24","name":"bpf: ISA V4 sign-extending move and load insns [PR110782, PR110784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214324.18871-1-david.faust@oracle.com/mbox/"},{"id":127235,"url":"https://patchwork.plctlab.org/api/1.2/patches/127235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727225914.918081-1-lhyatt@gmail.com/","msgid":"<20230727225914.918081-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-27T22:59:14","name":"[v2] c-family: Implement pragma_lex () for preprocess-only mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727225914.918081-1-lhyatt@gmail.com/mbox/"},{"id":127272,"url":"https://patchwork.plctlab.org/api/1.2/patches/127272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728011521.3280522-1-pan2.li@intel.com/","msgid":"<20230728011521.3280522-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-28T01:15:21","name":"[v8] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728011521.3280522-1-pan2.li@intel.com/mbox/"},{"id":127306,"url":"https://patchwork.plctlab.org/api/1.2/patches/127306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-1-kmatsui@gcc.gnu.org/","msgid":"<20230728035737.50181-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-28T03:57:35","name":"[v3,1/2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-1-kmatsui@gcc.gnu.org/mbox/"},{"id":127307,"url":"https://patchwork.plctlab.org/api/1.2/patches/127307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-2-kmatsui@gcc.gnu.org/","msgid":"<20230728035737.50181-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-28T03:57:36","name":"[v3,2/2] libstdc++: Use _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-2-kmatsui@gcc.gnu.org/mbox/"},{"id":127340,"url":"https://patchwork.plctlab.org/api/1.2/patches/127340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728055222.2382-1-xuli1@eswincomputing.com/","msgid":"<20230728055222.2382-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-28T05:52:22","name":"RISC-V: Remove vxrm parameter for vsadd[u] and vssub[u]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728055222.2382-1-xuli1@eswincomputing.com/mbox/"},{"id":127350,"url":"https://patchwork.plctlab.org/api/1.2/patches/127350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMNiIpP4cwLGlRSN@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T06:37:22","name":"loop-split improvements, part 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMNiIpP4cwLGlRSN@kam.mff.cuni.cz/mbox/"},{"id":127357,"url":"https://patchwork.plctlab.org/api/1.2/patches/127357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728070552.50C1413276@imap2.suse-dmz.suse.de/","msgid":"<20230728070552.50C1413276@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-28T07:05:51","name":"[RFC] tree-optimization/92335 - Improve sinking heuristics for vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728070552.50C1413276@imap2.suse-dmz.suse.de/mbox/"},{"id":127362,"url":"https://patchwork.plctlab.org/api/1.2/patches/127362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728071039.107552-1-juzhe.zhong@rivai.ai/","msgid":"<20230728071039.107552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-28T07:10:39","name":"[V2] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728071039.107552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":127370,"url":"https://patchwork.plctlab.org/api/1.2/patches/127370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728072010.108620-1-juzhe.zhong@rivai.ai/","msgid":"<20230728072010.108620-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-28T07:20:10","name":"RISC-V: Support CALL conditional autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728072010.108620-1-juzhe.zhong@rivai.ai/mbox/"},{"id":127375,"url":"https://patchwork.plctlab.org/api/1.2/patches/127375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073032.1852060-1-poulhies@adacore.com/","msgid":"<20230728073032.1852060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:32","name":"[COMMITTED] ada: Improve defense against illegal code in check for infinite loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073032.1852060-1-poulhies@adacore.com/mbox/"},{"id":127376,"url":"https://patchwork.plctlab.org/api/1.2/patches/127376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073042.1852207-1-poulhies@adacore.com/","msgid":"<20230728073042.1852207-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:42","name":"[COMMITTED] ada: Allow calls to Number_Formals when no formals are present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073042.1852207-1-poulhies@adacore.com/mbox/"},{"id":127381,"url":"https://patchwork.plctlab.org/api/1.2/patches/127381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073044.1852306-1-poulhies@adacore.com/","msgid":"<20230728073044.1852306-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:44","name":"[COMMITTED] ada: Fix typo in comment of Ada.Exceptions.Save_Occurrence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073044.1852306-1-poulhies@adacore.com/mbox/"},{"id":127385,"url":"https://patchwork.plctlab.org/api/1.2/patches/127385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073047.1852369-1-poulhies@adacore.com/","msgid":"<20230728073047.1852369-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:47","name":"[COMMITTED] ada: Emit enums rather than defines for various constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073047.1852369-1-poulhies@adacore.com/mbox/"},{"id":127387,"url":"https://patchwork.plctlab.org/api/1.2/patches/127387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073050.1852470-1-poulhies@adacore.com/","msgid":"<20230728073050.1852470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:50","name":"[COMMITTED] ada: Leave detection of missing return in functions to GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073050.1852470-1-poulhies@adacore.com/mbox/"},{"id":127389,"url":"https://patchwork.plctlab.org/api/1.2/patches/127389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073052.1852535-1-poulhies@adacore.com/","msgid":"<20230728073052.1852535-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:52","name":"[COMMITTED] ada: Fix memory explosion on aggregate of nested packed array type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073052.1852535-1-poulhies@adacore.com/mbox/"},{"id":127378,"url":"https://patchwork.plctlab.org/api/1.2/patches/127378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073054.1852596-1-poulhies@adacore.com/","msgid":"<20230728073054.1852596-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:54","name":"[COMMITTED] ada: Add guard for detection of class-wide precondition subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073054.1852596-1-poulhies@adacore.com/mbox/"},{"id":127377,"url":"https://patchwork.plctlab.org/api/1.2/patches/127377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073056.1852677-1-poulhies@adacore.com/","msgid":"<20230728073056.1852677-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:56","name":"[COMMITTED] ada: Small refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073056.1852677-1-poulhies@adacore.com/mbox/"},{"id":127383,"url":"https://patchwork.plctlab.org/api/1.2/patches/127383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073058.1852740-1-poulhies@adacore.com/","msgid":"<20230728073058.1852740-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:58","name":"[COMMITTED] ada: Fix race condition in protected entry call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073058.1852740-1-poulhies@adacore.com/mbox/"},{"id":127382,"url":"https://patchwork.plctlab.org/api/1.2/patches/127382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073100.1852802-1-poulhies@adacore.com/","msgid":"<20230728073100.1852802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:00","name":"[COMMITTED] ada: Add missing SCO generation for quantified expressions in object decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073100.1852802-1-poulhies@adacore.com/mbox/"},{"id":127390,"url":"https://patchwork.plctlab.org/api/1.2/patches/127390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073102.1852865-1-poulhies@adacore.com/","msgid":"<20230728073102.1852865-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:02","name":"[COMMITTED] ada: Add support for binding to a specific network interface controller.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073102.1852865-1-poulhies@adacore.com/mbox/"},{"id":127388,"url":"https://patchwork.plctlab.org/api/1.2/patches/127388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073105.1852928-1-poulhies@adacore.com/","msgid":"<20230728073105.1852928-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:05","name":"[COMMITTED] ada: Fix unsupported dispatching constructor call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073105.1852928-1-poulhies@adacore.com/mbox/"},{"id":127386,"url":"https://patchwork.plctlab.org/api/1.2/patches/127386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073107.1852989-1-poulhies@adacore.com/","msgid":"<20230728073107.1852989-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:07","name":"[COMMITTED] ada: Add an assert in Posix Interrupt_Wait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073107.1852989-1-poulhies@adacore.com/mbox/"},{"id":127380,"url":"https://patchwork.plctlab.org/api/1.2/patches/127380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073109.1853050-1-poulhies@adacore.com/","msgid":"<20230728073109.1853050-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:09","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073109.1853050-1-poulhies@adacore.com/mbox/"},{"id":127394,"url":"https://patchwork.plctlab.org/api/1.2/patches/127394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMN1DOizIGX8AdGF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T07:58:04","name":"Loop-split improvements, part 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMN1DOizIGX8AdGF@kam.mff.cuni.cz/mbox/"},{"id":127508,"url":"https://patchwork.plctlab.org/api/1.2/patches/127508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com/","msgid":"<805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com>","list_archive_url":null,"date":"2023-07-28T10:17:00","name":"gcse: Extract reg pressure handling into separate file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com/mbox/"},{"id":127526,"url":"https://patchwork.plctlab.org/api/1.2/patches/127526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMOjzRGv50hOfavs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-28T11:17:33","name":"gimple-fold: Handle _BitInt in __builtin_clear_padding [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMOjzRGv50hOfavs@tucnak/mbox/"},{"id":127548,"url":"https://patchwork.plctlab.org/api/1.2/patches/127548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728115004.3071397-1-yanzhang.wang@intel.com/","msgid":"<20230728115004.3071397-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-28T11:50:04","name":"[v2] RISC-V: convert the mulh with 0 to mov 0 to the reg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728115004.3071397-1-yanzhang.wang@intel.com/mbox/"},{"id":127549,"url":"https://patchwork.plctlab.org/api/1.2/patches/127549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com/","msgid":"<12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T11:51:41","name":"libgomp: cuda.h and omp_target_memcpy_rect cleanup (was: [patch] OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com/mbox/"},{"id":127613,"url":"https://patchwork.plctlab.org/api/1.2/patches/127613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMO7E9C9KBfbyJHH@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T12:56:51","name":"Loop-split improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMO7E9C9KBfbyJHH@kam.mff.cuni.cz/mbox/"},{"id":127621,"url":"https://patchwork.plctlab.org/api/1.2/patches/127621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-2-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-2-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:30","name":"[1/4] openmp: Fix loop transformation tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-2-frederik@codesourcery.com/mbox/"},{"id":127625,"url":"https://patchwork.plctlab.org/api/1.2/patches/127625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-3-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-3-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:31","name":"[2/4] openmp: Fix initialization for '\''unroll full'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-3-frederik@codesourcery.com/mbox/"},{"id":127624,"url":"https://patchwork.plctlab.org/api/1.2/patches/127624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-4-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-4-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:32","name":"[3/4] openmp: Fix diagnostic message for \"omp unroll\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-4-frederik@codesourcery.com/mbox/"},{"id":127622,"url":"https://patchwork.plctlab.org/api/1.2/patches/127622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-5-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-5-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:33","name":"[4/4] openmp: Fix number of iterations computation for \"omp unroll full\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-5-frederik@codesourcery.com/mbox/"},{"id":127684,"url":"https://patchwork.plctlab.org/api/1.2/patches/127684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com/","msgid":"<03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-28T15:00:01","name":"rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com/mbox/"},{"id":127729,"url":"https://patchwork.plctlab.org/api/1.2/patches/127729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMPpap9VO0EMUGCn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-28T16:14:34","name":"[RFC,WIP] _BitInt bit-field support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMPpap9VO0EMUGCn@tucnak/mbox/"},{"id":127740,"url":"https://patchwork.plctlab.org/api/1.2/patches/127740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728163758.377962-1-patrick@rivosinc.com/","msgid":"<20230728163758.377962-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-28T16:37:58","name":"[Committed] RISC-V: Specify -mabi in rv64 autovec testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728163758.377962-1-patrick@rivosinc.com/mbox/"},{"id":127835,"url":"https://patchwork.plctlab.org/api/1.2/patches/127835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728190304.8849-1-jose.marchesi@oracle.com/","msgid":"<20230728190304.8849-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-28T19:03:04","name":"[COMMITTED] bpf: disable tail call optimization in BPF targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728190304.8849-1-jose.marchesi@oracle.com/mbox/"},{"id":127851,"url":"https://patchwork.plctlab.org/api/1.2/patches/127851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab58900340f81c5ebf4743d5a8b756878c21fa7e.camel@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-28T20:19:44","name":"[v2] SARIF and -ftime-report'\''s output [PR109361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab58900340f81c5ebf4743d5a8b756878c21fa7e.camel@redhat.com/mbox/"},{"id":127855,"url":"https://patchwork.plctlab.org/api/1.2/patches/127855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com/","msgid":"<1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com>","list_archive_url":null,"date":"2023-07-28T20:37:56","name":"[COMMITTED] PR tree-optimization/110205 -Fix some warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com/mbox/"},{"id":127857,"url":"https://patchwork.plctlab.org/api/1.2/patches/127857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0b9c100-afd5-aa5f-ae74-5b0a069d2880@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-28T20:38:06","name":"[COMMITTED] Remove value_query, push into sub&fold class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0b9c100-afd5-aa5f-ae74-5b0a069d2880@redhat.com/mbox/"},{"id":127856,"url":"https://patchwork.plctlab.org/api/1.2/patches/127856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4378bf33-4718-ff59-4083-769d4485c352@redhat.com/","msgid":"<4378bf33-4718-ff59-4083-769d4485c352@redhat.com>","list_archive_url":null,"date":"2023-07-28T20:38:13","name":"[COMMITTED] Add a merge_range to ssa_cache and use it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4378bf33-4718-ff59-4083-769d4485c352@redhat.com/mbox/"},{"id":128016,"url":"https://patchwork.plctlab.org/api/1.2/patches/128016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMSz67f92gUuX9Yz@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-29T06:38:35","name":"Fix profile update after loop versioning in vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMSz67f92gUuX9Yz@kam.mff.cuni.cz/mbox/"},{"id":128072,"url":"https://patchwork.plctlab.org/api/1.2/patches/128072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729091308.29792-1-zengxiao@eswincomputing.com/","msgid":"<20230729091308.29792-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-29T09:13:08","name":"[V2,3/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729091308.29792-1-zengxiao@eswincomputing.com/mbox/"},{"id":128161,"url":"https://patchwork.plctlab.org/api/1.2/patches/128161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com/","msgid":"<002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-29T16:13:29","name":"[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com/mbox/"},{"id":128163,"url":"https://patchwork.plctlab.org/api/1.2/patches/128163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729182120.2017374-1-apinski@marvell.com/","msgid":"<20230729182120.2017374-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-29T18:21:20","name":"[PATCHv2] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729182120.2017374-1-apinski@marvell.com/mbox/"},{"id":128182,"url":"https://patchwork.plctlab.org/api/1.2/patches/128182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730021058.3359318-1-juzhe.zhong@rivai.ai/","msgid":"<20230730021058.3359318-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-30T02:10:58","name":"RISC-V: Enable basic VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730021058.3359318-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128228,"url":"https://patchwork.plctlab.org/api/1.2/patches/128228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com/","msgid":"<2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com>","list_archive_url":null,"date":"2023-07-30T13:55:19","name":"[committed] Fix several preprocessor directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com/mbox/"},{"id":128274,"url":"https://patchwork.plctlab.org/api/1.2/patches/128274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4abm7fZrKOYWMibFDM=uBk1TET0vSn7=5=-tYhcVrRdUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-30T20:12:53","name":"[RFC] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4abm7fZrKOYWMibFDM=uBk1TET0vSn7=5=-tYhcVrRdUA@mail.gmail.com/mbox/"},{"id":128296,"url":"https://patchwork.plctlab.org/api/1.2/patches/128296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730223746.0000F33E7D@hamza.pair.com/","msgid":"<20230730223746.0000F33E7D@hamza.pair.com>","list_archive_url":null,"date":"2023-07-30T22:37:43","name":"[pushed] wwwdocs: gcc-4.5: Update link to GNU MPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730223746.0000F33E7D@hamza.pair.com/mbox/"},{"id":128306,"url":"https://patchwork.plctlab.org/api/1.2/patches/128306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731012537.4398-1-xuli1@eswincomputing.com/","msgid":"<20230731012537.4398-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-31T01:25:37","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731012537.4398-1-xuli1@eswincomputing.com/mbox/"},{"id":128316,"url":"https://patchwork.plctlab.org/api/1.2/patches/128316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731021357.3815294-1-juzhe.zhong@rivai.ai/","msgid":"<20230731021357.3815294-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T02:13:57","name":"[V2] RISC-V: Enable basic VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731021357.3815294-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128322,"url":"https://patchwork.plctlab.org/api/1.2/patches/128322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731025646.1021646-1-pan2.li@intel.com/","msgid":"<20230731025646.1021646-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-31T02:56:46","name":"[v1] RISC-V: Bugfix for RVV floating-point rm suffix sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731025646.1021646-1-pan2.li@intel.com/mbox/"},{"id":128344,"url":"https://patchwork.plctlab.org/api/1.2/patches/128344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-1-apinski@marvell.com/","msgid":"<20230731053412.2102672-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T05:34:11","name":"[1/2] MATCH: PR 106164 : Optimize `(X CMP1 Y) AND/IOR (X CMP2 Y)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-1-apinski@marvell.com/mbox/"},{"id":128343,"url":"https://patchwork.plctlab.org/api/1.2/patches/128343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-2-apinski@marvell.com/","msgid":"<20230731053412.2102672-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T05:34:12","name":"[2/2] MATCH: Add `a == b | a cmp b` and `a != b & a cmp b` simplifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-2-apinski@marvell.com/mbox/"},{"id":128351,"url":"https://patchwork.plctlab.org/api/1.2/patches/128351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731061629.2540150-1-lin1.hu@intel.com/","msgid":"<20230731061629.2540150-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-07-31T06:16:29","name":"Add myself for write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731061629.2540150-1-lin1.hu@intel.com/mbox/"},{"id":128369,"url":"https://patchwork.plctlab.org/api/1.2/patches/128369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731065228.69779-1-kito.cheng@sifive.com/","msgid":"<20230731065228.69779-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-31T06:52:28","name":"RISC-V: Return machine_mode rather than opt_machine_mode for get_mask_mode, NFC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731065228.69779-1-kito.cheng@sifive.com/mbox/"},{"id":128372,"url":"https://patchwork.plctlab.org/api/1.2/patches/128372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com/","msgid":"<001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-31T07:13:07","name":"[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com/mbox/"},{"id":128506,"url":"https://patchwork.plctlab.org/api/1.2/patches/128506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/168d2ada-15df-7e97-9932-6a65104147ef@arm.com/","msgid":"<168d2ada-15df-7e97-9932-6a65104147ef@arm.com>","list_archive_url":null,"date":"2023-07-31T09:42:02","name":"Add POLY_INT_CST support to fold_ctor_reference in gimple-fold.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/168d2ada-15df-7e97-9932-6a65104147ef@arm.com/mbox/"},{"id":128590,"url":"https://patchwork.plctlab.org/api/1.2/patches/128590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-2-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:44","name":"[1/3] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-2-andrzej.turko@gmail.com/mbox/"},{"id":128589,"url":"https://patchwork.plctlab.org/api/1.2/patches/128589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-3-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:45","name":"[2/3] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-3-andrzej.turko@gmail.com/mbox/"},{"id":128592,"url":"https://patchwork.plctlab.org/api/1.2/patches/128592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-4-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:46","name":"[3/3] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-4-andrzej.turko@gmail.com/mbox/"},{"id":128624,"url":"https://patchwork.plctlab.org/api/1.2/patches/128624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731120120.651197-1-juzhe.zhong@rivai.ai/","msgid":"<20230731120120.651197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T12:01:20","name":"RISC-V: Support POPCOUNT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731120120.651197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128642,"url":"https://patchwork.plctlab.org/api/1.2/patches/128642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731122026.966504-1-juzhe.zhong@rivai.ai/","msgid":"<20230731122026.966504-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T12:20:26","name":"[committed] RISC-V: Fix bug of get_mask_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731122026.966504-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128648,"url":"https://patchwork.plctlab.org/api/1.2/patches/128648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731124037.1FA743858425@sourceware.org/","msgid":"<20230731124037.1FA743858425@sourceware.org>","list_archive_url":null,"date":"2023-07-31T12:39:52","name":"Improve sinking with unrelated defs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731124037.1FA743858425@sourceware.org/mbox/"},{"id":128710,"url":"https://patchwork.plctlab.org/api/1.2/patches/128710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731140232.3EFC738582BC@sourceware.org/","msgid":"<20230731140232.3EFC738582BC@sourceware.org>","list_archive_url":null,"date":"2023-07-31T14:01:49","name":"tree-optimization/110838 - vectorization of widened shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731140232.3EFC738582BC@sourceware.org/mbox/"},{"id":128736,"url":"https://patchwork.plctlab.org/api/1.2/patches/128736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731141349.1188774-1-juzhe.zhong@rivai.ai/","msgid":"<20230731141349.1188774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T14:13:49","name":"[V2] RISC-V: Support POPCOUNT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731141349.1188774-1-juzhe.zhong@rivai.ai/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-07/mbox/"},{"id":27,"url":"https://patchwork.plctlab.org/api/1.2/bundles/27/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-08","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":128781,"url":"https://patchwork.plctlab.org/api/1.2/patches/128781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com/","msgid":"<73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com>","list_archive_url":null,"date":"2023-07-31T16:06:40","name":"[COMMITTED] PR tree-optimization/110582 - fur_list should not use the range vector for non-ssa, operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com/mbox/"},{"id":128790,"url":"https://patchwork.plctlab.org/api/1.2/patches/128790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mszcau6z.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-31T17:04:36","name":"ipa-sra: Don'\''t consider CLOBBERS as writes preventing splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mszcau6z.fsf@suse.cz/mbox/"},{"id":128800,"url":"https://patchwork.plctlab.org/api/1.2/patches/128800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731170756.2130927-1-apinski@marvell.com/","msgid":"<20230731170756.2130927-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:07:56","name":"[COMMITTEDv3] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731170756.2130927-1-apinski@marvell.com/mbox/"},{"id":128809,"url":"https://patchwork.plctlab.org/api/1.2/patches/128809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-1-apinski@marvell.com/","msgid":"<20230731174606.2132534-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:46:05","name":"[1/2] Move `~X & X` and `~X | X` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-1-apinski@marvell.com/mbox/"},{"id":128810,"url":"https://patchwork.plctlab.org/api/1.2/patches/128810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-2-apinski@marvell.com/","msgid":"<20230731174606.2132534-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:46:06","name":"[2/2] Slightly improve bitwise_inverted_equal_p comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-2-apinski@marvell.com/mbox/"},{"id":128860,"url":"https://patchwork.plctlab.org/api/1.2/patches/128860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731201637.2139398-1-apinski@marvell.com/","msgid":"<20230731201637.2139398-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T20:16:37","name":"PHIOPT: Mark the conditional lhs and rhs as to look at to see if DCEable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731201637.2139398-1-apinski@marvell.com/mbox/"},{"id":128879,"url":"https://patchwork.plctlab.org/api/1.2/patches/128879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731215206.1876739-1-polacek@redhat.com/","msgid":"<20230731215206.1876739-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-31T21:52:06","name":"c++: parser cleanup, remove dummy arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731215206.1876739-1-polacek@redhat.com/mbox/"},{"id":128924,"url":"https://patchwork.plctlab.org/api/1.2/patches/128924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV4p8uf1bMBP5OhUb=nfy-WZDPvoDqRBznzdGoD3oHo=w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T00:01:53","name":"libbacktrace patch committed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV4p8uf1bMBP5OhUb=nfy-WZDPvoDqRBznzdGoD3oHo=w@mail.gmail.com/mbox/"},{"id":128925,"url":"https://patchwork.plctlab.org/api/1.2/patches/128925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801000507.2147978-1-apinski@marvell.com/","msgid":"<20230801000507.2147978-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-01T00:05:07","name":"[COMMITTEDv2] Fix PR 93044: extra cast is not removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801000507.2147978-1-apinski@marvell.com/mbox/"},{"id":128929,"url":"https://patchwork.plctlab.org/api/1.2/patches/128929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003456.994217-1-ppalka@redhat.com/","msgid":"<20230801003456.994217-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-01T00:34:56","name":"c++: improve debug_tree for templated types/decls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003456.994217-1-ppalka@redhat.com/mbox/"},{"id":128930,"url":"https://patchwork.plctlab.org/api/1.2/patches/128930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003505.994240-1-ppalka@redhat.com/","msgid":"<20230801003505.994240-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-01T00:35:05","name":"tree-pretty-print: handle COMPONENT_REF with non-decl RHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003505.994240-1-ppalka@redhat.com/mbox/"},{"id":128958,"url":"https://patchwork.plctlab.org/api/1.2/patches/128958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801022253.3286257-1-lhyatt@gmail.com/","msgid":"<20230801022253.3286257-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-01T02:22:53","name":"preprocessor: c++: Support `#pragma GCC target'\'' macros [PR87299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801022253.3286257-1-lhyatt@gmail.com/mbox/"},{"id":128992,"url":"https://patchwork.plctlab.org/api/1.2/patches/128992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801054416.2531911-1-hongtao.liu@intel.com/","msgid":"<20230801054416.2531911-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-01T05:44:16","name":"Adjust testcase for more optimal codegen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801054416.2531911-1-hongtao.liu@intel.com/mbox/"},{"id":128993,"url":"https://patchwork.plctlab.org/api/1.2/patches/128993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9a3f117-43b6-d7f4-bb5a-0cf5c512e61f@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T05:49:09","name":"x86: fold two of vec_dupv2df'\''s alternatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9a3f117-43b6-d7f4-bb5a-0cf5c512e61f@suse.com/mbox/"},{"id":128994,"url":"https://patchwork.plctlab.org/api/1.2/patches/128994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com/","msgid":"<9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com>","list_archive_url":null,"date":"2023-08-01T05:55:22","name":"[RESEND] libatomic: drop redundant all-multi command","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com/mbox/"},{"id":129013,"url":"https://patchwork.plctlab.org/api/1.2/patches/129013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801063743.155666-1-juzhe.zhong@rivai.ai/","msgid":"<20230801063743.155666-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-01T06:37:43","name":"[V3] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801063743.155666-1-juzhe.zhong@rivai.ai/mbox/"},{"id":129032,"url":"https://patchwork.plctlab.org/api/1.2/patches/129032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801064831.3261727-1-pan2.li@intel.com/","msgid":"<20230801064831.3261727-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-01T06:48:31","name":"[v1] RISC-V: Support RVV VFSUB and VFRSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801064831.3261727-1-pan2.li@intel.com/mbox/"},{"id":129062,"url":"https://patchwork.plctlab.org/api/1.2/patches/129062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080746.2271226-1-poulhies@adacore.com/","msgid":"<20230801080746.2271226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:07:46","name":"[COMMITTED] ada: Emit SCOs for nested decisions in quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080746.2271226-1-poulhies@adacore.com/mbox/"},{"id":129059,"url":"https://patchwork.plctlab.org/api/1.2/patches/129059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080812.2271398-1-poulhies@adacore.com/","msgid":"<20230801080812.2271398-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:12","name":"[COMMITTED] ada: check Atree.Get/Set_Field_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080812.2271398-1-poulhies@adacore.com/mbox/"},{"id":129060,"url":"https://patchwork.plctlab.org/api/1.2/patches/129060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080814.2271480-1-poulhies@adacore.com/","msgid":"<20230801080814.2271480-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:14","name":"[COMMITTED] ada: Fix generation of JSON output for data representation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080814.2271480-1-poulhies@adacore.com/mbox/"},{"id":129061,"url":"https://patchwork.plctlab.org/api/1.2/patches/129061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080816.2271563-1-poulhies@adacore.com/","msgid":"<20230801080816.2271563-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:16","name":"[COMMITTED] ada: Default Put_Image for composite derived types is missing information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080816.2271563-1-poulhies@adacore.com/mbox/"},{"id":129063,"url":"https://patchwork.plctlab.org/api/1.2/patches/129063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080818.2271624-1-poulhies@adacore.com/","msgid":"<20230801080818.2271624-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:18","name":"[COMMITTED] ada: Incorrect optimization for unconstrained limited record component type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080818.2271624-1-poulhies@adacore.com/mbox/"},{"id":129065,"url":"https://patchwork.plctlab.org/api/1.2/patches/129065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080820.2271686-1-poulhies@adacore.com/","msgid":"<20230801080820.2271686-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:20","name":"[COMMITTED] ada: Bugbox compiling Constrained_Protected_Object'\''Image","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080820.2271686-1-poulhies@adacore.com/mbox/"},{"id":129066,"url":"https://patchwork.plctlab.org/api/1.2/patches/129066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080821.2271747-1-poulhies@adacore.com/","msgid":"<20230801080821.2271747-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:21","name":"[COMMITTED] ada: Disable inlining of subprograms with Skip(_Flow_And)_Proof in GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080821.2271747-1-poulhies@adacore.com/mbox/"},{"id":129064,"url":"https://patchwork.plctlab.org/api/1.2/patches/129064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080823.2271808-1-poulhies@adacore.com/","msgid":"<20230801080823.2271808-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:23","name":"[COMMITTED] ada: Fix printing of numbers in JSON output for data representation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080823.2271808-1-poulhies@adacore.com/mbox/"},{"id":129069,"url":"https://patchwork.plctlab.org/api/1.2/patches/129069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2d95051-53d2-ec5e-cf6b-9a410b7a5841@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T08:17:10","name":"[PING^1,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2d95051-53d2-ec5e-cf6b-9a410b7a5841@linux.ibm.com/mbox/"},{"id":129071,"url":"https://patchwork.plctlab.org/api/1.2/patches/129071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com/","msgid":"<1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T08:18:58","name":"[PING^3] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com/mbox/"},{"id":129072,"url":"https://patchwork.plctlab.org/api/1.2/patches/129072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com/","msgid":"<1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T08:20:21","name":"PING^3] [PATCH 3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com/mbox/"},{"id":129085,"url":"https://patchwork.plctlab.org/api/1.2/patches/129085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801084447.1380635-1-christophe.lyon@linaro.org/","msgid":"<20230801084447.1380635-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-01T08:44:47","name":"[COMMITTED] doc: Fix spelling in arm_v8_1m_main_cde_mve_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801084447.1380635-1-christophe.lyon@linaro.org/mbox/"},{"id":129108,"url":"https://patchwork.plctlab.org/api/1.2/patches/129108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af5a8e98-d7d4-c7e6-2a51-f6ceb883d288@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T09:36:12","name":"MAINTAINERS: correct my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af5a8e98-d7d4-c7e6-2a51-f6ceb883d288@suse.com/mbox/"},{"id":129129,"url":"https://patchwork.plctlab.org/api/1.2/patches/129129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMja7SlWkRfppzOV@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-01T10:14:05","name":"Fix profile upate after vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMja7SlWkRfppzOV@kam.mff.cuni.cz/mbox/"},{"id":129294,"url":"https://patchwork.plctlab.org/api/1.2/patches/129294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de/","msgid":"<0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de>","list_archive_url":null,"date":"2023-08-01T13:03:32","name":"[avr,committed] Fix PR target/110220: Set JUMP_LABEL as required.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de/mbox/"},{"id":129315,"url":"https://patchwork.plctlab.org/api/1.2/patches/129315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANGHATU5pzXTNAgpsdua6M8d-YNtH7Jx=K9USKcT994vwmSw7Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T13:52:52","name":"analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANGHATU5pzXTNAgpsdua6M8d-YNtH7Jx=K9USKcT994vwmSw7Q@mail.gmail.com/mbox/"},{"id":129317,"url":"https://patchwork.plctlab.org/api/1.2/patches/129317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com/","msgid":"<6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com>","list_archive_url":null,"date":"2023-08-01T13:56:16","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com/mbox/"},{"id":129323,"url":"https://patchwork.plctlab.org/api/1.2/patches/129323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com/","msgid":"<163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com>","list_archive_url":null,"date":"2023-08-01T14:31:03","name":"RISC-V: Implement vector \"average\" autovec pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com/mbox/"},{"id":129355,"url":"https://patchwork.plctlab.org/api/1.2/patches/129355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com/","msgid":"<3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com>","list_archive_url":null,"date":"2023-08-01T15:35:16","name":"[OpenACC,2.7,v2] Implement default clause support for data constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com/mbox/"},{"id":129381,"url":"https://patchwork.plctlab.org/api/1.2/patches/129381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com/","msgid":"<1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com>","list_archive_url":null,"date":"2023-08-01T17:21:42","name":"arm: Remove unsigned variant of vcaddq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com/mbox/"},{"id":129416,"url":"https://patchwork.plctlab.org/api/1.2/patches/129416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com/","msgid":"<18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-01T18:29:09","name":"[v2] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com/mbox/"},{"id":129425,"url":"https://patchwork.plctlab.org/api/1.2/patches/129425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-2-cupertino.miranda@oracle.com/","msgid":"<20230801184307.179692-2-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-08-01T18:43:06","name":"[1/2] bpf: Implementation of BPF CO-RE builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-2-cupertino.miranda@oracle.com/mbox/"},{"id":129424,"url":"https://patchwork.plctlab.org/api/1.2/patches/129424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-3-cupertino.miranda@oracle.com/","msgid":"<20230801184307.179692-3-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-08-01T18:43:07","name":"[2/2] bpf: CO-RE builtins support tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-3-cupertino.miranda@oracle.com/mbox/"},{"id":129439,"url":"https://patchwork.plctlab.org/api/1.2/patches/129439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191226.64464-1-krebbel@linux.ibm.com/","msgid":"<20230801191226.64464-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T19:12:26","name":"[Committed] IBM Z: Handle unaligned symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191226.64464-1-krebbel@linux.ibm.com/mbox/"},{"id":129445,"url":"https://patchwork.plctlab.org/api/1.2/patches/129445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191831.432511-1-drross@redhat.com/","msgid":"<20230801191831.432511-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-01T19:18:31","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191831.432511-1-drross@redhat.com/mbox/"},{"id":129447,"url":"https://patchwork.plctlab.org/api/1.2/patches/129447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801192033.432742-1-drross@redhat.com/","msgid":"<20230801192033.432742-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-01T19:20:33","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801192033.432742-1-drross@redhat.com/mbox/"},{"id":129456,"url":"https://patchwork.plctlab.org/api/1.2/patches/129456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801195104.2183011-1-maskray@google.com/","msgid":"<20230801195104.2183011-1-maskray@google.com>","list_archive_url":null,"date":"2023-08-01T19:51:04","name":"[v4] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801195104.2183011-1-maskray@google.com/mbox/"},{"id":129538,"url":"https://patchwork.plctlab.org/api/1.2/patches/129538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802011311.771803-1-hongtao.liu@intel.com/","msgid":"<20230802011311.771803-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-02T01:13:11","name":"Support vec_fmaddsub/vec_fmsubadd for vector HFmode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802011311.771803-1-hongtao.liu@intel.com/mbox/"},{"id":129545,"url":"https://patchwork.plctlab.org/api/1.2/patches/129545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013141.772245-1-hongtao.liu@intel.com/","msgid":"<20230802013141.772245-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-02T01:31:41","name":"Optimize vlddqu + inserti128 to vbroadcasti128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013141.772245-1-hongtao.liu@intel.com/mbox/"},{"id":129546,"url":"https://patchwork.plctlab.org/api/1.2/patches/129546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013813.14284-1-zengxiao@eswincomputing.com/","msgid":"<20230802013813.14284-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-08-02T01:38:13","name":"[v3,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013813.14284-1-zengxiao@eswincomputing.com/mbox/"},{"id":129561,"url":"https://patchwork.plctlab.org/api/1.2/patches/129561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802023621.1954111-1-pan2.li@intel.com/","msgid":"<20230802023621.1954111-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T02:36:21","name":"[v1] RISC-V: Support RVV VFWADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802023621.1954111-1-pan2.li@intel.com/mbox/"},{"id":129613,"url":"https://patchwork.plctlab.org/api/1.2/patches/129613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee73ca29-bcb2-9e1f-60fc-a3f117c2b788@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T05:41:47","name":"[committed,RISC-V] Avoid sub-word mode comparisons with Zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee73ca29-bcb2-9e1f-60fc-a3f117c2b788@ventanamicro.com/mbox/"},{"id":129630,"url":"https://patchwork.plctlab.org/api/1.2/patches/129630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802063547.2663520-1-pan2.li@intel.com/","msgid":"<20230802063547.2663520-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T06:35:47","name":"[v2] RISC-V: Support RVV VFWADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802063547.2663520-1-pan2.li@intel.com/mbox/"},{"id":129669,"url":"https://patchwork.plctlab.org/api/1.2/patches/129669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMoFmriZhia9k7Wm@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-02T07:28:26","name":"Fix profile update after cancelled loop distribution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMoFmriZhia9k7Wm@kam.mff.cuni.cz/mbox/"},{"id":129689,"url":"https://patchwork.plctlab.org/api/1.2/patches/129689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802075924.3448107-1-pan2.li@intel.com/","msgid":"<20230802075924.3448107-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T07:59:24","name":"[v1] RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802075924.3448107-1-pan2.li@intel.com/mbox/"},{"id":129708,"url":"https://patchwork.plctlab.org/api/1.2/patches/129708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802084314.965951-1-jun.zhang@intel.com/","msgid":"<20230802084314.965951-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-08-02T08:43:14","name":"Enable tpause Exponential backoff and thread delay","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802084314.965951-1-jun.zhang@intel.com/mbox/"},{"id":129717,"url":"https://patchwork.plctlab.org/api/1.2/patches/129717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802090616.1214802-1-dkm@kataplop.net/","msgid":"<20230802090616.1214802-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-08-02T09:06:16","name":"[v3] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802090616.1214802-1-dkm@kataplop.net/mbox/"},{"id":129735,"url":"https://patchwork.plctlab.org/api/1.2/patches/129735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-2-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:25","name":"[1/3,v2] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-2-andrzej.turko@gmail.com/mbox/"},{"id":129736,"url":"https://patchwork.plctlab.org/api/1.2/patches/129736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-3-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:26","name":"[2/3,v2] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-3-andrzej.turko@gmail.com/mbox/"},{"id":129737,"url":"https://patchwork.plctlab.org/api/1.2/patches/129737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-4-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:27","name":"[3/3,v2] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-4-andrzej.turko@gmail.com/mbox/"},{"id":129743,"url":"https://patchwork.plctlab.org/api/1.2/patches/129743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802101907.3772871-1-pan2.li@intel.com/","msgid":"<20230802101907.3772871-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T10:19:07","name":"[v1] RISC-V: Support RVV VFWSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802101907.3772871-1-pan2.li@intel.com/mbox/"},{"id":129746,"url":"https://patchwork.plctlab.org/api/1.2/patches/129746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17618-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:21:59","name":"AArch64 update costing for MLA by invariant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17618-tamar@arm.com/mbox/"},{"id":129747,"url":"https://patchwork.plctlab.org/api/1.2/patches/129747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17624-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:22:41","name":"AArch64 update costing for combining vector conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17624-tamar@arm.com/mbox/"},{"id":129751,"url":"https://patchwork.plctlab.org/api/1.2/patches/129751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17620-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:25:12","name":"AArch64 Undo vec_widen_shiftl optabs [PR106346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17620-tamar@arm.com/mbox/"},{"id":129752,"url":"https://patchwork.plctlab.org/api/1.2/patches/129752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17619-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:29:08","name":"[gensupport] : Don'\''t segfault on empty attrs list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17619-tamar@arm.com/mbox/"},{"id":129788,"url":"https://patchwork.plctlab.org/api/1.2/patches/129788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802115217.AC7123858436@sourceware.org/","msgid":"<20230802115217.AC7123858436@sourceware.org>","list_archive_url":null,"date":"2023-08-02T11:51:33","name":"Make add_phi_node_to_bb static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802115217.AC7123858436@sourceware.org/mbox/"},{"id":129796,"url":"https://patchwork.plctlab.org/api/1.2/patches/129796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c23e4ed4-ec72-a35a-4417-c589dca28a54@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T12:09:54","name":"aarch64: SVE/NEON Bridging intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c23e4ed4-ec72-a35a-4417-c589dca28a54@arm.com/mbox/"},{"id":129816,"url":"https://patchwork.plctlab.org/api/1.2/patches/129816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124506.DDA1A3857706@sourceware.org/","msgid":"<20230802124506.DDA1A3857706@sourceware.org>","list_archive_url":null,"date":"2023-08-02T12:44:23","name":"[1/2] Add virtual operand global liveness computation class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124506.DDA1A3857706@sourceware.org/mbox/"},{"id":129817,"url":"https://patchwork.plctlab.org/api/1.2/patches/129817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124532.69E863858000@sourceware.org/","msgid":"<20230802124532.69E863858000@sourceware.org>","list_archive_url":null,"date":"2023-08-02T12:44:48","name":"[2/2] Improve sinking with unrelated defs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124532.69E863858000@sourceware.org/mbox/"},{"id":129850,"url":"https://patchwork.plctlab.org/api/1.2/patches/129850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802134910.2564339-2-stefansf@linux.ibm.com/","msgid":"<20230802134910.2564339-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-02T13:49:11","name":"PR combine/110867 Fix narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802134910.2564339-2-stefansf@linux.ibm.com/mbox/"},{"id":129925,"url":"https://patchwork.plctlab.org/api/1.2/patches/129925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB783923BF951C8BDF5B3D5BA9F70BA@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T15:48:59","name":"arm/aarch64: Add bti for all functions [PR106671]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB783923BF951C8BDF5B3D5BA9F70BA@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":129930,"url":"https://patchwork.plctlab.org/api/1.2/patches/129930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMp9YaTkwBZi7l69@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-02T15:59:29","name":"_BitInt bit-field support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMp9YaTkwBZi7l69@tucnak/mbox/"},{"id":129933,"url":"https://patchwork.plctlab.org/api/1.2/patches/129933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162014.24756-1-ef2648@columbia.edu/","msgid":"<20230802162014.24756-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-02T16:20:14","name":"[v2] analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162014.24756-1-ef2648@columbia.edu/mbox/"},{"id":129934,"url":"https://patchwork.plctlab.org/api/1.2/patches/129934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162322.447469-1-drross@redhat.com/","msgid":"<20230802162322.447469-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-02T16:23:22","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162322.447469-1-drross@redhat.com/mbox/"},{"id":129991,"url":"https://patchwork.plctlab.org/api/1.2/patches/129991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ea321ba0ede7a0834bd8a73098ab892d94e669.1690994309.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T17:00:34","name":"[v2,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ea321ba0ede7a0834bd8a73098ab892d94e669.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129989,"url":"https://patchwork.plctlab.org/api/1.2/patches/129989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com/","msgid":"<161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-02T17:00:35","name":"[v2,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129993,"url":"https://patchwork.plctlab.org/api/1.2/patches/129993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com/","msgid":"<285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-02T17:00:36","name":"[v2,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129998,"url":"https://patchwork.plctlab.org/api/1.2/patches/129998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com/","msgid":"<003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com>","list_archive_url":null,"date":"2023-08-02T17:20:40","name":"[committed,RISC-V] Fix 20010221-1.c with zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com/mbox/"},{"id":130057,"url":"https://patchwork.plctlab.org/api/1.2/patches/130057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802184547.26983-1-ef2648@columbia.edu/","msgid":"<20230802184547.26983-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-02T18:45:47","name":"[v3] analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802184547.26983-1-ef2648@columbia.edu/mbox/"},{"id":130167,"url":"https://patchwork.plctlab.org/api/1.2/patches/130167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com/","msgid":"<000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-02T22:18:44","name":"[x86] PR target/110792: Early clobber issues with rot32di2_doubleword.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com/mbox/"},{"id":130218,"url":"https://patchwork.plctlab.org/api/1.2/patches/130218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802235232.2265424-1-apinski@marvell.com/","msgid":"<20230802235232.2265424-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-02T23:52:32","name":"MATCH: first of the value replacement moving from phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802235232.2265424-1-apinski@marvell.com/mbox/"},{"id":130238,"url":"https://patchwork.plctlab.org/api/1.2/patches/130238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803013807.3967176-1-pan2.li@intel.com/","msgid":"<20230803013807.3967176-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T01:38:07","name":"[v1] RISC-V: Support RVV VFMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803013807.3967176-1-pan2.li@intel.com/mbox/"},{"id":130243,"url":"https://patchwork.plctlab.org/api/1.2/patches/130243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803015835.447081-1-juzhe.zhong@rivai.ai/","msgid":"<20230803015835.447081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-03T01:58:35","name":"[V2] RISC-V: Support CALL conditional autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803015835.447081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":130245,"url":"https://patchwork.plctlab.org/api/1.2/patches/130245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803021059.516819-1-pan2.li@intel.com/","msgid":"<20230803021059.516819-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T02:10:59","name":"[v1] RISC-V: Remove redudant extern declaration in function base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803021059.516819-1-pan2.li@intel.com/mbox/"},{"id":130258,"url":"https://patchwork.plctlab.org/api/1.2/patches/130258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023110.2271301-1-apinski@marvell.com/","msgid":"<20230803023110.2271301-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T02:31:10","name":"Fix `~X & X` and `~X | X` patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023110.2271301-1-apinski@marvell.com/mbox/"},{"id":130259,"url":"https://patchwork.plctlab.org/api/1.2/patches/130259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023210.530982-1-pan2.li@intel.com/","msgid":"<20230803023210.530982-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T02:32:10","name":"[v2] RISC-V: Support RVV VFMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023210.530982-1-pan2.li@intel.com/mbox/"},{"id":130261,"url":"https://patchwork.plctlab.org/api/1.2/patches/130261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023404.2271442-1-apinski@marvell.com/","msgid":"<20230803023404.2271442-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T02:34:04","name":"Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023404.2271442-1-apinski@marvell.com/mbox/"},{"id":130268,"url":"https://patchwork.plctlab.org/api/1.2/patches/130268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023635.260926-1-juzhe.zhong@rivai.ai/","msgid":"<20230803023635.260926-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-03T02:36:35","name":"[V4] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023635.260926-1-juzhe.zhong@rivai.ai/mbox/"},{"id":130290,"url":"https://patchwork.plctlab.org/api/1.2/patches/130290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803031713.912298-1-yunqiang.su@cipunited.com/","msgid":"<20230803031713.912298-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-08-03T03:17:13","name":"[RFC] Combine zero_extract and sign_extend for TARGET_TRULY_NOOP_TRUNCATION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803031713.912298-1-yunqiang.su@cipunited.com/mbox/"},{"id":130294,"url":"https://patchwork.plctlab.org/api/1.2/patches/130294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803032914.819141-1-pan2.li@intel.com/","msgid":"<20230803032914.819141-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T03:29:14","name":"[v1] RISC-V: Support RVV VFDIV and VFRDIV rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803032914.819141-1-pan2.li@intel.com/mbox/"},{"id":130317,"url":"https://patchwork.plctlab.org/api/1.2/patches/130317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803052844.1178854-1-pan2.li@intel.com/","msgid":"<20230803052844.1178854-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T05:28:44","name":"[v1] RISC-V: Support RVV VFWMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803052844.1178854-1-pan2.li@intel.com/mbox/"},{"id":130325,"url":"https://patchwork.plctlab.org/api/1.2/patches/130325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803064806.951680-2-stefansf@linux.ibm.com/","msgid":"<20230803064806.951680-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-03T06:48:07","name":"s390: Enable vect_bswap test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803064806.951680-2-stefansf@linux.ibm.com/mbox/"},{"id":130326,"url":"https://patchwork.plctlab.org/api/1.2/patches/130326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803065059.951867-2-stefansf@linux.ibm.com/","msgid":"<20230803065059.951867-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-03T06:51:00","name":"s390: Try to emit vlbr/vstbr instead of vperm et al.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803065059.951867-2-stefansf@linux.ibm.com/mbox/"},{"id":130341,"url":"https://patchwork.plctlab.org/api/1.2/patches/130341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com/","msgid":"<00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-03T07:10:17","name":"[x86] Split SUBREGs of SSE vector registers into vec_select insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com/mbox/"},{"id":130343,"url":"https://patchwork.plctlab.org/api/1.2/patches/130343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jlgions.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-08-03T07:13:43","name":"Introduce -msmp to select /lib_smp/ on ppc-vx6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jlgions.fsf@lxoliva.fsfla.org/mbox/"},{"id":130376,"url":"https://patchwork.plctlab.org/api/1.2/patches/130376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com/","msgid":"<7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com>","list_archive_url":null,"date":"2023-08-03T08:09:56","name":"[01/10] x86: \"prefix_extra\" tidying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com/mbox/"},{"id":130377,"url":"https://patchwork.plctlab.org/api/1.2/patches/130377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com/","msgid":"<2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com>","list_archive_url":null,"date":"2023-08-03T08:10:25","name":"[02/10] x86: \"sse4arg\" adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com/mbox/"},{"id":130380,"url":"https://patchwork.plctlab.org/api/1.2/patches/130380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e98989aa-baf3-40a4-13ab-09d06b191362@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:10:46","name":"[03/10] x86: \"ssemuladd\" adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e98989aa-baf3-40a4-13ab-09d06b191362@suse.com/mbox/"},{"id":130379,"url":"https://patchwork.plctlab.org/api/1.2/patches/130379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com/","msgid":"<4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com>","list_archive_url":null,"date":"2023-08-03T08:11:30","name":"[04/10] x86: \"prefix_extra\" can'\''t really be \"2\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com/mbox/"},{"id":130386,"url":"https://patchwork.plctlab.org/api/1.2/patches/130386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5fae9d-e240-c808-702b-93871e39be47@suse.com/","msgid":"<5a5fae9d-e240-c808-702b-93871e39be47@suse.com>","list_archive_url":null,"date":"2023-08-03T08:12:04","name":"[05/10] x86: replace/correct bogus \"prefix_extra\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5fae9d-e240-c808-702b-93871e39be47@suse.com/mbox/"},{"id":130389,"url":"https://patchwork.plctlab.org/api/1.2/patches/130389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b55b2669-518e-d956-ec4e-d93b542e40fb@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:12:26","name":"[06/10] x86: drop stray \"prefix_extra\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b55b2669-518e-d956-ec4e-d93b542e40fb@suse.com/mbox/"},{"id":130381,"url":"https://patchwork.plctlab.org/api/1.2/patches/130381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b44684ea-482e-8867-8b24-d6d08a596ee8@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:12:49","name":"[07/10] x86: add (adjust) XOP insn attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b44684ea-482e-8867-8b24-d6d08a596ee8@suse.com/mbox/"},{"id":130393,"url":"https://patchwork.plctlab.org/api/1.2/patches/130393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com/","msgid":"<0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com>","list_archive_url":null,"date":"2023-08-03T08:13:17","name":"[08/10] x86: add missing \"prefix\" attribute to VF{,C}MULC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com/mbox/"},{"id":130385,"url":"https://patchwork.plctlab.org/api/1.2/patches/130385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com/","msgid":"<8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com>","list_archive_url":null,"date":"2023-08-03T08:13:44","name":"[09/10] x86: correct \"length_immediate\" in a few cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com/mbox/"},{"id":130398,"url":"https://patchwork.plctlab.org/api/1.2/patches/130398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8673f78-d3f7-8418-733a-79d61094a7d4@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:14:07","name":"[10/10] x86: drop redundant \"prefix_data16\" attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8673f78-d3f7-8418-733a-79d61094a7d4@suse.com/mbox/"},{"id":130440,"url":"https://patchwork.plctlab.org/api/1.2/patches/130440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803091041.BE3EE3857C51@sourceware.org/","msgid":"<20230803091041.BE3EE3857C51@sourceware.org>","list_archive_url":null,"date":"2023-08-03T09:09:46","name":"Swap loop splitting and final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803091041.BE3EE3857C51@sourceware.org/mbox/"},{"id":130444,"url":"https://patchwork.plctlab.org/api/1.2/patches/130444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMtxqMF1PQhWrWnZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T09:21:44","name":"[v3,RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMtxqMF1PQhWrWnZ@arm.com/mbox/"},{"id":130459,"url":"https://patchwork.plctlab.org/api/1.2/patches/130459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMuE0AUpDPcENgeB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-03T10:43:28","name":"c-family: Add _BitInt support for __atomic_*fetch* [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMuE0AUpDPcENgeB@tucnak/mbox/"},{"id":130478,"url":"https://patchwork.plctlab.org/api/1.2/patches/130478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuW0ubRQ97nta7HgL18QXGDse1pfnCsC=mr5CP_KRtkh3Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T11:07:48","name":"[RFC] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuW0ubRQ97nta7HgL18QXGDse1pfnCsC=mr5CP_KRtkh3Q@mail.gmail.com/mbox/"},{"id":130482,"url":"https://patchwork.plctlab.org/api/1.2/patches/130482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-2-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:43","name":"[v3,1/8] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-2-panchenghui@loongson.cn/mbox/"},{"id":130488,"url":"https://patchwork.plctlab.org/api/1.2/patches/130488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-3-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:44","name":"[v3,2/8] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-3-panchenghui@loongson.cn/mbox/"},{"id":130485,"url":"https://patchwork.plctlab.org/api/1.2/patches/130485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-4-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:45","name":"[v3,3/8] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-4-panchenghui@loongson.cn/mbox/"},{"id":130483,"url":"https://patchwork.plctlab.org/api/1.2/patches/130483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-5-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:46","name":"[v3,4/8] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-5-panchenghui@loongson.cn/mbox/"},{"id":130486,"url":"https://patchwork.plctlab.org/api/1.2/patches/130486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-6-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:47","name":"[v3,5/8] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-6-panchenghui@loongson.cn/mbox/"},{"id":130484,"url":"https://patchwork.plctlab.org/api/1.2/patches/130484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-7-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:48","name":"[v3,6/8] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-7-panchenghui@loongson.cn/mbox/"},{"id":130534,"url":"https://patchwork.plctlab.org/api/1.2/patches/130534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120844.2526382-1-poulhies@adacore.com/","msgid":"<20230803120844.2526382-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:08:44","name":"[COMMITTED] ada: Adjust again address arithmetics in System.Dwarf_Lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120844.2526382-1-poulhies@adacore.com/mbox/"},{"id":130533,"url":"https://patchwork.plctlab.org/api/1.2/patches/130533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120904.2526668-1-poulhies@adacore.com/","msgid":"<20230803120904.2526668-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:04","name":"[COMMITTED] ada: Fix spurious error on '\''Input of private type with Type_Invariant aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120904.2526668-1-poulhies@adacore.com/mbox/"},{"id":130536,"url":"https://patchwork.plctlab.org/api/1.2/patches/130536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120906.2526729-1-poulhies@adacore.com/","msgid":"<20230803120906.2526729-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:06","name":"[COMMITTED] ada: Rewrite Set_Image_*_Unsigned routines to remove recursion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120906.2526729-1-poulhies@adacore.com/mbox/"},{"id":130535,"url":"https://patchwork.plctlab.org/api/1.2/patches/130535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120907.2526791-1-poulhies@adacore.com/","msgid":"<20230803120907.2526791-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:07","name":"[COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120907.2526791-1-poulhies@adacore.com/mbox/"},{"id":130542,"url":"https://patchwork.plctlab.org/api/1.2/patches/130542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803122307.3C86F3857C66@sourceware.org/","msgid":"<20230803122307.3C86F3857C66@sourceware.org>","list_archive_url":null,"date":"2023-08-03T12:22:20","name":"tree-optimization/110702 - avoid zero-based memory references in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803122307.3C86F3857C66@sourceware.org/mbox/"},{"id":130559,"url":"https://patchwork.plctlab.org/api/1.2/patches/130559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsz82t1q.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T12:45:37","name":"poly_int: Handle more can_div_trunc_p cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsz82t1q.fsf@arm.com/mbox/"},{"id":130584,"url":"https://patchwork.plctlab.org/api/1.2/patches/130584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803132715.000023858D35@sourceware.org/","msgid":"<20230803132715.000023858D35@sourceware.org>","list_archive_url":null,"date":"2023-08-03T13:26:29","name":"[libbacktrace] fix up broken test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803132715.000023858D35@sourceware.org/mbox/"},{"id":130609,"url":"https://patchwork.plctlab.org/api/1.2/patches/130609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d22d1b-0534-47f2-9d3b-3072314447d4@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T13:38:32","name":"mid-end: Use integral time intervals in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d22d1b-0534-47f2-9d3b-3072314447d4@AZ-NEU-EX04.Arm.com/mbox/"},{"id":130625,"url":"https://patchwork.plctlab.org/api/1.2/patches/130625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803135243.1341761-1-dmalcolm@redhat.com/","msgid":"<20230803135243.1341761-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-03T13:52:43","name":"[committed] analyzer: fix ICE on zero-sized arrays [PR110882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803135243.1341761-1-dmalcolm@redhat.com/mbox/"},{"id":130661,"url":"https://patchwork.plctlab.org/api/1.2/patches/130661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-2-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:29","name":"[1/3,v3] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-2-andrzej.turko@gmail.com/mbox/"},{"id":130659,"url":"https://patchwork.plctlab.org/api/1.2/patches/130659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-3-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:30","name":"[2/3,v3] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-3-andrzej.turko@gmail.com/mbox/"},{"id":130660,"url":"https://patchwork.plctlab.org/api/1.2/patches/130660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-4-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:31","name":"[3/3,v3] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-4-andrzej.turko@gmail.com/mbox/"},{"id":130663,"url":"https://patchwork.plctlab.org/api/1.2/patches/130663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143152.2087444-1-pan2.li@intel.com/","msgid":"<20230803143152.2087444-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T14:31:52","name":"[v1] RISC-V: Fix one comment for binop_frm insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143152.2087444-1-pan2.li@intel.com/mbox/"},{"id":130669,"url":"https://patchwork.plctlab.org/api/1.2/patches/130669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143837.2092129-1-pan2.li@intel.com/","msgid":"<20230803143837.2092129-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T14:38:37","name":"[v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143837.2092129-1-pan2.li@intel.com/mbox/"},{"id":130673,"url":"https://patchwork.plctlab.org/api/1.2/patches/130673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803144924.1348195-1-dmalcolm@redhat.com/","msgid":"<20230803144924.1348195-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-03T14:49:24","name":"[committed] testsuite, analyzer: add test case [PR108171]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803144924.1348195-1-dmalcolm@redhat.com/mbox/"},{"id":130676,"url":"https://patchwork.plctlab.org/api/1.2/patches/130676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc14c02e-2ea8-17e4-b44f-6991d1a992dc@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T15:05:09","name":"[committed,RISC-V] Remove errant hunk of code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc14c02e-2ea8-17e4-b44f-6991d1a992dc@gmail.com/mbox/"},{"id":130729,"url":"https://patchwork.plctlab.org/api/1.2/patches/130729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803163117.1016079-1-qing.zhao@oracle.com/","msgid":"<20230803163117.1016079-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-03T16:31:17","name":"Add documentation for -Wflex-array-member-not-at-end.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803163117.1016079-1-qing.zhao@oracle.com/mbox/"},{"id":130733,"url":"https://patchwork.plctlab.org/api/1.2/patches/130733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803164038.2306774-1-apinski@marvell.com/","msgid":"<20230803164038.2306774-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T16:40:38","name":"[PATCHv2] Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803164038.2306774-1-apinski@marvell.com/mbox/"},{"id":130784,"url":"https://patchwork.plctlab.org/api/1.2/patches/130784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af917818-2d7b-f75f-8088-d58e357ba281@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T18:25:47","name":"[COMMITTED] Automatically set type is certain Value_Range routines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af917818-2d7b-f75f-8088-d58e357ba281@redhat.com/mbox/"},{"id":130785,"url":"https://patchwork.plctlab.org/api/1.2/patches/130785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com/","msgid":"<496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com>","list_archive_url":null,"date":"2023-08-03T18:25:53","name":"[COMMITTED] Provide a routine for NAME == NAME relation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com/mbox/"},{"id":130787,"url":"https://patchwork.plctlab.org/api/1.2/patches/130787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aae445c7-c137-1f0c-e746-016163509887@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T18:25:58","name":"[COMMITTED] Add operand ranges to op1_op2_relation API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aae445c7-c137-1f0c-e746-016163509887@redhat.com/mbox/"},{"id":130814,"url":"https://patchwork.plctlab.org/api/1.2/patches/130814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com/","msgid":"<014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-03T19:14:43","name":"Specify signed/unsigned/dontcare in calls to extract_bit_field_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com/mbox/"},{"id":130846,"url":"https://patchwork.plctlab.org/api/1.2/patches/130846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwRo+jeVaS73px2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-03T20:44:19","name":"Fix profiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwRo+jeVaS73px2@kam.mff.cuni.cz/mbox/"},{"id":130849,"url":"https://patchwork.plctlab.org/api/1.2/patches/130849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwSXdJyms5onlrv@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-03T20:47:25","name":"Update estimated iteraitons counts after splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwSXdJyms5onlrv@kam.mff.cuni.cz/mbox/"},{"id":130919,"url":"https://patchwork.plctlab.org/api/1.2/patches/130919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804022205.53108-1-pan2.li@intel.com/","msgid":"<20230804022205.53108-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T02:22:05","name":"[v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804022205.53108-1-pan2.li@intel.com/mbox/"},{"id":130933,"url":"https://patchwork.plctlab.org/api/1.2/patches/130933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804025848.327107-1-pan2.li@intel.com/","msgid":"<20230804025848.327107-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T02:58:48","name":"[v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804025848.327107-1-pan2.li@intel.com/mbox/"},{"id":130942,"url":"https://patchwork.plctlab.org/api/1.2/patches/130942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804032828.596526-1-pan2.li@intel.com/","msgid":"<20230804032828.596526-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T03:28:28","name":"[v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804032828.596526-1-pan2.li@intel.com/mbox/"},{"id":130970,"url":"https://patchwork.plctlab.org/api/1.2/patches/130970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f041b82554fd897f2a609a4d274716ad62d33c66.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-04T06:04:14","name":"[C] _Generic should not warn in non-active branches [PR68193,PR97100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f041b82554fd897f2a609a4d274716ad62d33c66.camel@tugraz.at/mbox/"},{"id":130973,"url":"https://patchwork.plctlab.org/api/1.2/patches/130973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804061018.945633-1-pan2.li@intel.com/","msgid":"<20230804061018.945633-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T06:10:18","name":"[v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804061018.945633-1-pan2.li@intel.com/mbox/"},{"id":130984,"url":"https://patchwork.plctlab.org/api/1.2/patches/130984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMylmGqvOtxn7pEf@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-04T07:15:36","name":"Disable loop distribution for loops with estimated iterations 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMylmGqvOtxn7pEf@kam.mff.cuni.cz/mbox/"},{"id":131023,"url":"https://patchwork.plctlab.org/api/1.2/patches/131023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6b47491-2423-d911-6232-2b3b97137b64@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-08-04T08:57:23","name":"[avr,committed] Fix some typos in avr-mcus.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6b47491-2423-d911-6232-2b3b97137b64@gjlay.de/mbox/"},{"id":131024,"url":"https://patchwork.plctlab.org/api/1.2/patches/131024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de/","msgid":"<34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de>","list_archive_url":null,"date":"2023-08-04T09:02:33","name":"[avr,committed] Add some more devices to avr-mcus.def.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de/mbox/"},{"id":131054,"url":"https://patchwork.plctlab.org/api/1.2/patches/131054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2b7daef-7a54-4f81-9cec-5fe24196f634@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-04T09:41:08","name":"mid-end: Use integral time intervals in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2b7daef-7a54-4f81-9cec-5fe24196f634@AZ-NEU-EX04.Arm.com/mbox/"},{"id":131068,"url":"https://patchwork.plctlab.org/api/1.2/patches/131068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101537.C02F313904@imap2.suse-dmz.suse.de/","msgid":"<20230804101537.C02F313904@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-04T10:15:37","name":"tree-optimization/110838 - less aggressively fold out-of-bound shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101537.C02F313904@imap2.suse-dmz.suse.de/mbox/"},{"id":131072,"url":"https://patchwork.plctlab.org/api/1.2/patches/131072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101959.1008513904@imap2.suse-dmz.suse.de/","msgid":"<20230804101959.1008513904@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-04T10:19:58","name":"tree-optimization/110838 - vectorization of widened right shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101959.1008513904@imap2.suse-dmz.suse.de/mbox/"},{"id":131170,"url":"https://patchwork.plctlab.org/api/1.2/patches/131170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com/","msgid":"<1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com>","list_archive_url":null,"date":"2023-08-04T13:16:30","name":"[pushed,LRA] Check input insn pattern hard regs against early clobber hard regs for live info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com/mbox/"},{"id":131215,"url":"https://patchwork.plctlab.org/api/1.2/patches/131215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982E6D99993A9BC82615B368309A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-04T15:05:39","name":"libatomic: Improve ifunc selection on AArch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982E6D99993A9BC82615B368309A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":131284,"url":"https://patchwork.plctlab.org/api/1.2/patches/131284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu/","msgid":"<07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu>","list_archive_url":null,"date":"2023-08-04T17:57:16","name":"Add -Wdisabled-optimization warning for not optimizing sibling calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu/mbox/"},{"id":131295,"url":"https://patchwork.plctlab.org/api/1.2/patches/131295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZM0/srtB/QHE+vs2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-04T18:13:06","name":"_Decimal* to _BitInt conversion support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZM0/srtB/QHE+vs2@tucnak/mbox/"},{"id":131320,"url":"https://patchwork.plctlab.org/api/1.2/patches/131320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-2-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:29","name":"[V2,1/3] Provide counted_by attribute to flexible array member field (PR108896)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-2-qing.zhao@oracle.com/mbox/"},{"id":131321,"url":"https://patchwork.plctlab.org/api/1.2/patches/131321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-3-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:30","name":"[V2,2/3] Use the counted_by atribute info in builtin object size [PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-3-qing.zhao@oracle.com/mbox/"},{"id":131322,"url":"https://patchwork.plctlab.org/api/1.2/patches/131322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-4-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:31","name":"[V2,3/3] Use the counted_by attribute information in bound sanitizer[PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-4-qing.zhao@oracle.com/mbox/"},{"id":131340,"url":"https://patchwork.plctlab.org/api/1.2/patches/131340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202213.1447631-1-dmalcolm@redhat.com/","msgid":"<20230804202213.1447631-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-04T20:22:13","name":"[pushed] analyzer: fix some svalue::dump_to_pp implementations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202213.1447631-1-dmalcolm@redhat.com/mbox/"},{"id":131341,"url":"https://patchwork.plctlab.org/api/1.2/patches/131341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202251.1447735-1-dmalcolm@redhat.com/","msgid":"<20230804202251.1447735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-04T20:22:51","name":"[pushed] analyzer: handle function attribute \"alloc_size\" [PR110426]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202251.1447735-1-dmalcolm@redhat.com/mbox/"},{"id":131372,"url":"https://patchwork.plctlab.org/api/1.2/patches/131372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804214817.1256642-1-drross@redhat.com/","msgid":"<20230804214817.1256642-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-04T21:48:17","name":"match.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804214817.1256642-1-drross@redhat.com/mbox/"},{"id":131497,"url":"https://patchwork.plctlab.org/api/1.2/patches/131497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAN3w5K-qLb7GkxqHjvJhYGZLM2wBJ8Pmv5eu6f83c5aOue3rdA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-05T15:57:56","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAN3w5K-qLb7GkxqHjvJhYGZLM2wBJ8Pmv5eu6f83c5aOue3rdA@mail.gmail.com/mbox/"},{"id":131500,"url":"https://patchwork.plctlab.org/api/1.2/patches/131500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at/","msgid":"<8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-05T16:22:43","name":"[committed] c: Less warnings for parameters declared as arrays [PR98536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at/mbox/"},{"id":131504,"url":"https://patchwork.plctlab.org/api/1.2/patches/131504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffd3c7b1b0c71e13f40471aeef643b9c9e3c0353.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-05T16:33:04","name":"[C] Support typename as selector in _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffd3c7b1b0c71e13f40471aeef643b9c9e3c0353.camel@tugraz.at/mbox/"},{"id":131546,"url":"https://patchwork.plctlab.org/api/1.2/patches/131546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230805204324.2434846-1-apinski@marvell.com/","msgid":"<20230805204324.2434846-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-05T20:43:24","name":"MATCH: Extend min_value/max_value to pointer types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230805204324.2434846-1-apinski@marvell.com/mbox/"},{"id":131559,"url":"https://patchwork.plctlab.org/api/1.2/patches/131559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806033612.1078855-1-pan2.li@intel.com/","msgid":"<20230806033612.1078855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-06T03:36:12","name":"[v1] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806033612.1078855-1-pan2.li@intel.com/mbox/"},{"id":131580,"url":"https://patchwork.plctlab.org/api/1.2/patches/131580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com/","msgid":"<4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com>","list_archive_url":null,"date":"2023-08-06T12:34:45","name":"[committed,_GLIBCXX_INLINE_VERSION] Add __cxa_call_terminate symbol export","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com/mbox/"},{"id":131586,"url":"https://patchwork.plctlab.org/api/1.2/patches/131586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-1-c@jia.je/","msgid":"<20230806125010.283900-1-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:49:58","name":"[1/9] LoongArch: Introduce loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-1-c@jia.je/mbox/"},{"id":131581,"url":"https://patchwork.plctlab.org/api/1.2/patches/131581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-2-c@jia.je/","msgid":"<20230806125010.283900-2-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:49:59","name":"[2/9] LoongArch: Fix default ISA setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-2-c@jia.je/mbox/"},{"id":131582,"url":"https://patchwork.plctlab.org/api/1.2/patches/131582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-3-c@jia.je/","msgid":"<20230806125010.283900-3-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:00","name":"[3/9] LoongArch: Fix SI division for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-3-c@jia.je/mbox/"},{"id":131583,"url":"https://patchwork.plctlab.org/api/1.2/patches/131583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-4-c@jia.je/","msgid":"<20230806125010.283900-4-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:01","name":"[4/9] LoongArch: Fix movgr2frh.w operand order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-4-c@jia.je/mbox/"},{"id":131587,"url":"https://patchwork.plctlab.org/api/1.2/patches/131587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-5-c@jia.je/","msgid":"<20230806125010.283900-5-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:02","name":"[5/9] LoongArch: Fix 64-bit move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-5-c@jia.je/mbox/"},{"id":131589,"url":"https://patchwork.plctlab.org/api/1.2/patches/131589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-6-c@jia.je/","msgid":"<20230806125010.283900-6-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:03","name":"[6/9] LoongArch: Fix 64-bit immediate move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-6-c@jia.je/mbox/"},{"id":131584,"url":"https://patchwork.plctlab.org/api/1.2/patches/131584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-7-c@jia.je/","msgid":"<20230806125010.283900-7-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:04","name":"[7/9] LoongArch: Fix signed 32-bit overflow for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-7-c@jia.je/mbox/"},{"id":131585,"url":"https://patchwork.plctlab.org/api/1.2/patches/131585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-8-c@jia.je/","msgid":"<20230806125010.283900-8-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:05","name":"[8/9] LoongArch: Do not emit SF/DF <-> DI conversion in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-8-c@jia.je/mbox/"},{"id":131588,"url":"https://patchwork.plctlab.org/api/1.2/patches/131588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-9-c@jia.je/","msgid":"<20230806125010.283900-9-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:06","name":"[9/9] LoongArch: Add: Add -march=loongarch64 to tests with -mabi=lp64d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-9-c@jia.je/mbox/"},{"id":131624,"url":"https://patchwork.plctlab.org/api/1.2/patches/131624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806181535.71101-1-gnaggnoyil@gmail.com/","msgid":"<20230806181535.71101-1-gnaggnoyil@gmail.com>","list_archive_url":null,"date":"2023-08-06T18:15:35","name":"c++: follow DR 2386 and update implementation of get_tuple_size [PR110216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806181535.71101-1-gnaggnoyil@gmail.com/mbox/"},{"id":131626,"url":"https://patchwork.plctlab.org/api/1.2/patches/131626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAB3BD7KOYK4iiJ@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-06T20:26:04","name":"Fix profile update after peeled epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAB3BD7KOYK4iiJ@kam.mff.cuni.cz/mbox/"},{"id":131629,"url":"https://patchwork.plctlab.org/api/1.2/patches/131629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com/","msgid":"<004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-06T22:28:05","name":"[Committed] Avoid FAIL of gcc.target/i386/pr110792.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com/mbox/"},{"id":131630,"url":"https://patchwork.plctlab.org/api/1.2/patches/131630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAlGtgck9vLOX9a@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-06T22:56:26","name":"Fix profile update after versioning ifconverted loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAlGtgck9vLOX9a@kam.mff.cuni.cz/mbox/"},{"id":131657,"url":"https://patchwork.plctlab.org/api/1.2/patches/131657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807040140.14796-1-chenxiaolong@loongson.cn/","msgid":"<20230807040140.14796-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-07T04:01:40","name":"[v1] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807040140.14796-1-chenxiaolong@loongson.cn/mbox/"},{"id":131666,"url":"https://patchwork.plctlab.org/api/1.2/patches/131666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807050631.2514046-1-apinski@marvell.com/","msgid":"<20230807050631.2514046-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-07T05:06:31","name":"MATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807050631.2514046-1-apinski@marvell.com/mbox/"},{"id":131721,"url":"https://patchwork.plctlab.org/api/1.2/patches/131721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com/","msgid":"<004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-07T07:37:01","name":"PR target/107671: Make more use of btl/btq on x86_64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com/mbox/"},{"id":131754,"url":"https://patchwork.plctlab.org/api/1.2/patches/131754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085401.288265-1-hongtao.liu@intel.com/","msgid":"<20230807085401.288265-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-07T08:54:01","name":"Fix ICE in rtl check when bootstrap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085401.288265-1-hongtao.liu@intel.com/mbox/"},{"id":131755,"url":"https://patchwork.plctlab.org/api/1.2/patches/131755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085701.302936-1-hongtao.liu@intel.com/","msgid":"<20230807085701.302936-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-07T08:57:01","name":"i386: Clear upper bits of XMM register for V4HFmode/V2HFmode operations [PR110762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085701.302936-1-hongtao.liu@intel.com/mbox/"},{"id":131759,"url":"https://patchwork.plctlab.org/api/1.2/patches/131759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddbkfji5ax.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-07T09:13:10","name":"libsanitizer: Fix SPARC stacktraces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddbkfji5ax.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":131766,"url":"https://patchwork.plctlab.org/api/1.2/patches/131766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807092715.31994-1-juzhe.zhong@rivai.ai/","msgid":"<20230807092715.31994-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:27:15","name":"RISC-V: Support VLS basic operation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807092715.31994-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131768,"url":"https://patchwork.plctlab.org/api/1.2/patches/131768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093812.1716553-1-juzhe.zhong@rivai.ai/","msgid":"<20230807093812.1716553-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:38:12","name":"[V4] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093812.1716553-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131769,"url":"https://patchwork.plctlab.org/api/1.2/patches/131769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093846.150132-1-juzhe.zhong@rivai.ai/","msgid":"<20230807093846.150132-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:38:46","name":"tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093846.150132-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131778,"url":"https://patchwork.plctlab.org/api/1.2/patches/131778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-2-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:58:59","name":"[1/3,v4] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-2-andrzej.turko@gmail.com/mbox/"},{"id":131780,"url":"https://patchwork.plctlab.org/api/1.2/patches/131780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-3-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:59:00","name":"[2/3,v4] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-3-andrzej.turko@gmail.com/mbox/"},{"id":131779,"url":"https://patchwork.plctlab.org/api/1.2/patches/131779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-4-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:59:01","name":"[3/3,v4] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-4-andrzej.turko@gmail.com/mbox/"},{"id":131784,"url":"https://patchwork.plctlab.org/api/1.2/patches/131784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com/","msgid":"<5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com>","list_archive_url":null,"date":"2023-08-07T10:26:59","name":"fwprop: Allow UNARY_P and check register pressure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com/mbox/"},{"id":131804,"url":"https://patchwork.plctlab.org/api/1.2/patches/131804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-2-arsen@aarsen.me/","msgid":"<20230807105935.2098236-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:43","name":"[01/24] toplevel: Substitute GDCFLAGS instead of using CFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-2-arsen@aarsen.me/mbox/"},{"id":131810,"url":"https://patchwork.plctlab.org/api/1.2/patches/131810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-3-arsen@aarsen.me/","msgid":"<20230807105935.2098236-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:44","name":"[02/24] PR29961, plugin-api.h: \"Could not detect architecture endianess\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-3-arsen@aarsen.me/mbox/"},{"id":131807,"url":"https://patchwork.plctlab.org/api/1.2/patches/131807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-4-arsen@aarsen.me/","msgid":"<20230807105935.2098236-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:45","name":"[03/24] gcc-4.5 build fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-4-arsen@aarsen.me/mbox/"},{"id":131822,"url":"https://patchwork.plctlab.org/api/1.2/patches/131822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-5-arsen@aarsen.me/","msgid":"<20230807105935.2098236-5-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:46","name":"[04/24] Sync with binutils: GCC: Pass --plugin to AR and RANLIB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-5-arsen@aarsen.me/mbox/"},{"id":131818,"url":"https://patchwork.plctlab.org/api/1.2/patches/131818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-6-arsen@aarsen.me/","msgid":"<20230807105935.2098236-6-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:47","name":"[05/24] GCC: Check if AR works with --plugin and rc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-6-arsen@aarsen.me/mbox/"},{"id":131811,"url":"https://patchwork.plctlab.org/api/1.2/patches/131811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-7-arsen@aarsen.me/","msgid":"<20230807105935.2098236-7-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:48","name":"[06/24] toplevel: Recover tilegx/tilepro targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-7-arsen@aarsen.me/mbox/"},{"id":131815,"url":"https://patchwork.plctlab.org/api/1.2/patches/131815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-8-arsen@aarsen.me/","msgid":"<20230807105935.2098236-8-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:49","name":"[07/24] binutils, gdb: support zstd compressed debug sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-8-arsen@aarsen.me/mbox/"},{"id":131814,"url":"https://patchwork.plctlab.org/api/1.2/patches/131814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-9-arsen@aarsen.me/","msgid":"<20230807105935.2098236-9-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:50","name":"[08/24] configure: require libzstd >= 1.4.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-9-arsen@aarsen.me/mbox/"},{"id":131806,"url":"https://patchwork.plctlab.org/api/1.2/patches/131806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-10-arsen@aarsen.me/","msgid":"<20230807105935.2098236-10-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:51","name":"[09/24] add --enable-default-compressed-debug-sections-algorithm configure option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-10-arsen@aarsen.me/mbox/"},{"id":131835,"url":"https://patchwork.plctlab.org/api/1.2/patches/131835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-11-arsen@aarsen.me/","msgid":"<20230807105935.2098236-11-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:52","name":"[10/24] gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-11-arsen@aarsen.me/mbox/"},{"id":131809,"url":"https://patchwork.plctlab.org/api/1.2/patches/131809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-12-arsen@aarsen.me/","msgid":"<20230807105935.2098236-12-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:53","name":"[11/24] Disable year 2038 support on 32-bit hosts by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-12-arsen@aarsen.me/mbox/"},{"id":131819,"url":"https://patchwork.plctlab.org/api/1.2/patches/131819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-13-arsen@aarsen.me/","msgid":"<20230807105935.2098236-13-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:54","name":"[12/24] Pass PKG_CONFIG_PATH down from top-level Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-13-arsen@aarsen.me/mbox/"},{"id":131854,"url":"https://patchwork.plctlab.org/api/1.2/patches/131854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-14-arsen@aarsen.me/","msgid":"<20230807105935.2098236-14-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:55","name":"[13/24] configure: reinstate 32b PA-RISC HP-UX target in toplevel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-14-arsen@aarsen.me/mbox/"},{"id":131858,"url":"https://patchwork.plctlab.org/api/1.2/patches/131858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-15-arsen@aarsen.me/","msgid":"<20230807105935.2098236-15-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:56","name":"[14/24] libtool.m4: fix nm BSD flag detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-15-arsen@aarsen.me/mbox/"},{"id":131853,"url":"https://patchwork.plctlab.org/api/1.2/patches/131853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-16-arsen@aarsen.me/","msgid":"<20230807105935.2098236-16-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:57","name":"[15/24] libtool.m4: fix the NM=\"/nm/over/here -B/option/with/path\" case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-16-arsen@aarsen.me/mbox/"},{"id":131856,"url":"https://patchwork.plctlab.org/api/1.2/patches/131856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-17-arsen@aarsen.me/","msgid":"<20230807105935.2098236-17-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:58","name":"[16/24] Add support for the haiku operating system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-17-arsen@aarsen.me/mbox/"},{"id":131827,"url":"https://patchwork.plctlab.org/api/1.2/patches/131827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-18-arsen@aarsen.me/","msgid":"<20230807105935.2098236-18-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:59","name":"[17/24] egrep in binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-18-arsen@aarsen.me/mbox/"},{"id":131820,"url":"https://patchwork.plctlab.org/api/1.2/patches/131820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-19-arsen@aarsen.me/","msgid":"<20230807105935.2098236-19-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:00","name":"[18/24] PR27116, Spelling errors found by Debian style checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-19-arsen@aarsen.me/mbox/"},{"id":131865,"url":"https://patchwork.plctlab.org/api/1.2/patches/131865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-20-arsen@aarsen.me/","msgid":"<20230807105935.2098236-20-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:01","name":"[19/24] Deprecate a.out support for NetBSD targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-20-arsen@aarsen.me/mbox/"},{"id":131825,"url":"https://patchwork.plctlab.org/api/1.2/patches/131825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-21-arsen@aarsen.me/","msgid":"<20230807105935.2098236-21-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:02","name":"[20/24] PKG_CHECK_MODULES: Check if $pkg_cv_[]$1[]_LIBS works","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-21-arsen@aarsen.me/mbox/"},{"id":131824,"url":"https://patchwork.plctlab.org/api/1.2/patches/131824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-22-arsen@aarsen.me/","msgid":"<20230807105935.2098236-22-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:03","name":"[21/24] PKG_CHECK_MODULES: Properly check if $pkg_cv_[]$1[]_LIBS works","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-22-arsen@aarsen.me/mbox/"},{"id":131868,"url":"https://patchwork.plctlab.org/api/1.2/patches/131868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-23-arsen@aarsen.me/","msgid":"<20230807105935.2098236-23-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:04","name":"[22/24] libtool.m4: augment symcode for Solaris 11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-23-arsen@aarsen.me/mbox/"},{"id":131837,"url":"https://patchwork.plctlab.org/api/1.2/patches/131837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-24-arsen@aarsen.me/","msgid":"<20230807105935.2098236-24-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:05","name":"[23/24] bfd: linker: merge .sframe sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-24-arsen@aarsen.me/mbox/"},{"id":131859,"url":"https://patchwork.plctlab.org/api/1.2/patches/131859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-25-arsen@aarsen.me/","msgid":"<20230807105935.2098236-25-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:06","name":"[24/24] toplevel: Makefile.def: add install-strip dependency on libsframe","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-25-arsen@aarsen.me/mbox/"},{"id":131798,"url":"https://patchwork.plctlab.org/api/1.2/patches/131798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111622.2854826-1-poulhies@adacore.com/","msgid":"<20230807111622.2854826-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:22","name":"[COMMITTED] ada: Spurious error on class-wide preconditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111622.2854826-1-poulhies@adacore.com/mbox/"},{"id":131799,"url":"https://patchwork.plctlab.org/api/1.2/patches/131799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111637.2854994-1-poulhies@adacore.com/","msgid":"<20230807111637.2854994-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:37","name":"[COMMITTED] ada: Crash in GNATprove due to wrong detection of inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111637.2854994-1-poulhies@adacore.com/mbox/"},{"id":131800,"url":"https://patchwork.plctlab.org/api/1.2/patches/131800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111639.2855057-1-poulhies@adacore.com/","msgid":"<20230807111639.2855057-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:39","name":"[COMMITTED] ada: Extend precondition of Interfaces.C.String.Value with Length","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111639.2855057-1-poulhies@adacore.com/mbox/"},{"id":131801,"url":"https://patchwork.plctlab.org/api/1.2/patches/131801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111641.2855120-1-poulhies@adacore.com/","msgid":"<20230807111641.2855120-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:41","name":"[COMMITTED] ada: Refactor multiple returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111641.2855120-1-poulhies@adacore.com/mbox/"},{"id":131849,"url":"https://patchwork.plctlab.org/api/1.2/patches/131849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807113105.437693-1-manolis.tsamis@vrull.eu/","msgid":"<20230807113105.437693-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-07T11:31:05","name":"cprop_hardreg: Allow more propagation of the stack pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807113105.437693-1-manolis.tsamis@vrull.eu/mbox/"},{"id":131909,"url":"https://patchwork.plctlab.org/api/1.2/patches/131909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807122247.1881775-1-pan2.li@intel.com/","msgid":"<20230807122247.1881775-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-07T12:22:47","name":"[v1] Mode-Switching: Fix SET_SRC ICE when only one operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807122247.1881775-1-pan2.li@intel.com/mbox/"},{"id":131960,"url":"https://patchwork.plctlab.org/api/1.2/patches/131960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807131635.CE5733857C41@sourceware.org/","msgid":"<20230807131635.CE5733857C41@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:15:52","name":"Improve -fopt-info-vec for basic-block vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807131635.CE5733857C41@sourceware.org/mbox/"},{"id":131967,"url":"https://patchwork.plctlab.org/api/1.2/patches/131967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807132242.759603858000@sourceware.org/","msgid":"<20230807132242.759603858000@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:21:59","name":"Use RPO order for sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807132242.759603858000@sourceware.org/mbox/"},{"id":131984,"url":"https://patchwork.plctlab.org/api/1.2/patches/131984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133135.04FB838582A1@sourceware.org/","msgid":"<20230807133135.04FB838582A1@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:30:50","name":"tree-optimization/49955 - BB reduction with odd number of lanes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133135.04FB838582A1@sourceware.org/mbox/"},{"id":131992,"url":"https://patchwork.plctlab.org/api/1.2/patches/131992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133241.197319-2-stefansf@linux.ibm.com/","msgid":"<20230807133241.197319-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-07T13:32:42","name":"rtl-optimization/110869 Fix tests cmp-mem-const-*.c for sparc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133241.197319-2-stefansf@linux.ibm.com/mbox/"},{"id":132025,"url":"https://patchwork.plctlab.org/api/1.2/patches/132025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5af4407-1538-802f-92ca-aae843258c15@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-08-07T13:58:27","name":"[OpenACC,2.7,v2] readonly modifier support in front-ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5af4407-1538-802f-92ca-aae843258c15@siemens.com/mbox/"},{"id":132068,"url":"https://patchwork.plctlab.org/api/1.2/patches/132068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807142216.1857701-1-qing.zhao@oracle.com/","msgid":"<20230807142216.1857701-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-07T14:22:16","name":"[V2] gcc-14/changes.html: Deprecate a GCC C extension on flexible array members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807142216.1857701-1-qing.zhao@oracle.com/mbox/"},{"id":132093,"url":"https://patchwork.plctlab.org/api/1.2/patches/132093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807143324.656791-1-manolis.tsamis@vrull.eu/","msgid":"<20230807143324.656791-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-07T14:33:24","name":"[v4] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807143324.656791-1-manolis.tsamis@vrull.eu/mbox/"},{"id":132115,"url":"https://patchwork.plctlab.org/api/1.2/patches/132115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807144534.2538500-1-apinski@marvell.com/","msgid":"<20230807144534.2538500-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-07T14:45:34","name":"VR-VALUES [PR28794]: optimize compare assignments also","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807144534.2538500-1-apinski@marvell.com/mbox/"},{"id":132133,"url":"https://patchwork.plctlab.org/api/1.2/patches/132133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com/","msgid":"<8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com>","list_archive_url":null,"date":"2023-08-07T15:06:25","name":"[committed,RISC-V] Handle more cases in riscv_expand_conditional_move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com/mbox/"},{"id":132290,"url":"https://patchwork.plctlab.org/api/1.2/patches/132290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807172917.10439-1-david.faust@oracle.com/","msgid":"<20230807172917.10439-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-07T17:29:17","name":"[COMMITTED] MAINTAINERS: Add myself as a BPF port reviewer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807172917.10439-1-david.faust@oracle.com/mbox/"},{"id":132299,"url":"https://patchwork.plctlab.org/api/1.2/patches/132299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com/","msgid":"<5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-07T17:50:09","name":"[ver,3] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com/mbox/"},{"id":132318,"url":"https://patchwork.plctlab.org/api/1.2/patches/132318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNE8SVeUupRLUJ1u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-07T18:47:37","name":"_BitInt to _Decimal* conversion support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNE8SVeUupRLUJ1u@tucnak/mbox/"},{"id":132364,"url":"https://patchwork.plctlab.org/api/1.2/patches/132364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com/","msgid":"<4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com>","list_archive_url":null,"date":"2023-08-07T20:20:07","name":"vect: Add a popcount fallback.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com/mbox/"},{"id":132368,"url":"https://patchwork.plctlab.org/api/1.2/patches/132368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f913b618-f708-2018-898b-57a8b84bb07f@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-07T20:36:37","name":"[committed,RISC-V] Don'\''t reject constants in cmov condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f913b618-f708-2018-898b-57a8b84bb07f@ventanamicro.com/mbox/"},{"id":132387,"url":"https://patchwork.plctlab.org/api/1.2/patches/132387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211234.701538-1-jwakely@redhat.com/","msgid":"<20230807211234.701538-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:12:11","name":"[committed] libstdc++: Fix past-the-end increment in std::format [PR110862]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211234.701538-1-jwakely@redhat.com/mbox/"},{"id":132388,"url":"https://patchwork.plctlab.org/api/1.2/patches/132388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211335.701619-1-jwakely@redhat.com/","msgid":"<20230807211335.701619-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:12:35","name":"[committed] i386: Fix grammar typo in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211335.701619-1-jwakely@redhat.com/mbox/"},{"id":132391,"url":"https://patchwork.plctlab.org/api/1.2/patches/132391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211421.701784-1-jwakely@redhat.com/","msgid":"<20230807211421.701784-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:14:01","name":"[committed] libstdc++: Constrain __format::_Iter_sink for contiguous iterators [PR110917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211421.701784-1-jwakely@redhat.com/mbox/"},{"id":132390,"url":"https://patchwork.plctlab.org/api/1.2/patches/132390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211428.701867-1-jwakely@redhat.com/","msgid":"<20230807211428.701867-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:14:22","name":"[committed] libstdc++: Fix incorrect use of abs and log10 in std::format [PR110860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211428.701867-1-jwakely@redhat.com/mbox/"},{"id":132468,"url":"https://patchwork.plctlab.org/api/1.2/patches/132468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808005424.2563140-1-apinski@marvell.com/","msgid":"<20230808005424.2563140-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-08T00:54:24","name":"MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808005424.2563140-1-apinski@marvell.com/mbox/"},{"id":132477,"url":"https://patchwork.plctlab.org/api/1.2/patches/132477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808013709.168452-1-juzhe.zhong@rivai.ai/","msgid":"<20230808013709.168452-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T01:37:09","name":"RISC-V: Support VLS shift vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808013709.168452-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132481,"url":"https://patchwork.plctlab.org/api/1.2/patches/132481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808020902.11626-1-chenxiaolong@loongson.cn/","msgid":"<20230808020902.11626-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-08T02:09:02","name":"[v2] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808020902.11626-1-chenxiaolong@loongson.cn/mbox/"},{"id":132482,"url":"https://patchwork.plctlab.org/api/1.2/patches/132482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808021342.26774-1-chenxiaolong@loongson.cn/","msgid":"<20230808021342.26774-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-08T02:13:42","name":"[v2] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808021342.26774-1-chenxiaolong@loongson.cn/mbox/"},{"id":132488,"url":"https://patchwork.plctlab.org/api/1.2/patches/132488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGrEWUqh3KeQ9LD@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-08T02:40:17","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGrEWUqh3KeQ9LD@Thaum.localdomain/mbox/"},{"id":132489,"url":"https://patchwork.plctlab.org/api/1.2/patches/132489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGtCxzbJwkSXvCy@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-08T02:48:43","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGtCxzbJwkSXvCy@Thaum.localdomain/mbox/"},{"id":132496,"url":"https://patchwork.plctlab.org/api/1.2/patches/132496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808030929.502310-1-pan2.li@intel.com/","msgid":"<20230808030929.502310-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-08T03:09:29","name":"[v2] Mode-Switching: Fix SET_SRC ICE when USE or CLOBBER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808030929.502310-1-pan2.li@intel.com/mbox/"},{"id":132497,"url":"https://patchwork.plctlab.org/api/1.2/patches/132497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808031016.262528-1-juzhe.zhong@rivai.ai/","msgid":"<20230808031016.262528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T03:10:16","name":"RISC-V: Support neg VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808031016.262528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132504,"url":"https://patchwork.plctlab.org/api/1.2/patches/132504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808041232.15387-1-shiyulong@iscas.ac.cn/","msgid":"<20230808041232.15387-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-08-08T04:12:32","name":"[V1] RISC-V: Fix a bug that causes an error insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808041232.15387-1-shiyulong@iscas.ac.cn/mbox/"},{"id":132507,"url":"https://patchwork.plctlab.org/api/1.2/patches/132507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808052508.968486-1-pan2.li@intel.com/","msgid":"<20230808052508.968486-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-08T05:25:08","name":"[v2] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808052508.968486-1-pan2.li@intel.com/mbox/"},{"id":132510,"url":"https://patchwork.plctlab.org/api/1.2/patches/132510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-2-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:10","name":"[1/3] Initial support for AVX10.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-2-haochen.jiang@intel.com/mbox/"},{"id":132509,"url":"https://patchwork.plctlab.org/api/1.2/patches/132509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-3-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:11","name":"[2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-3-haochen.jiang@intel.com/mbox/"},{"id":132508,"url":"https://patchwork.plctlab.org/api/1.2/patches/132508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-4-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:12","name":"[3/3] Emit a warning when AVX10 options conflict in vector width","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-4-haochen.jiang@intel.com/mbox/"},{"id":132511,"url":"https://patchwork.plctlab.org/api/1.2/patches/132511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071947.1570053-1-haochen.jiang@intel.com/","msgid":"<20230808071947.1570053-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:19:47","name":"[1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071947.1570053-1-haochen.jiang@intel.com/mbox/"},{"id":132512,"url":"https://patchwork.plctlab.org/api/1.2/patches/132512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072004.1570107-1-haochen.jiang@intel.com/","msgid":"<20230808072004.1570107-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:04","name":"[2/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072004.1570107-1-haochen.jiang@intel.com/mbox/"},{"id":132513,"url":"https://patchwork.plctlab.org/api/1.2/patches/132513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072019.1570162-1-haochen.jiang@intel.com/","msgid":"<20230808072019.1570162-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:19","name":"[3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072019.1570162-1-haochen.jiang@intel.com/mbox/"},{"id":132515,"url":"https://patchwork.plctlab.org/api/1.2/patches/132515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072031.1570222-1-haochen.jiang@intel.com/","msgid":"<20230808072031.1570222-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:31","name":"[4/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072031.1570222-1-haochen.jiang@intel.com/mbox/"},{"id":132514,"url":"https://patchwork.plctlab.org/api/1.2/patches/132514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072046.1570283-1-haochen.jiang@intel.com/","msgid":"<20230808072046.1570283-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:46","name":"[5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072046.1570283-1-haochen.jiang@intel.com/mbox/"},{"id":132516,"url":"https://patchwork.plctlab.org/api/1.2/patches/132516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072059.1570341-1-haochen.jiang@intel.com/","msgid":"<20230808072059.1570341-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:59","name":"[6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072059.1570341-1-haochen.jiang@intel.com/mbox/"},{"id":132517,"url":"https://patchwork.plctlab.org/api/1.2/patches/132517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808075600.1878105-1-hongtao.liu@intel.com/","msgid":"<20230808075600.1878105-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-08T07:56:00","name":"[X86] Workaround possible CPUID bug in Sandy Bridge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808075600.1878105-1-hongtao.liu@intel.com/mbox/"},{"id":132518,"url":"https://patchwork.plctlab.org/api/1.2/patches/132518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808113259.363524-1-juzhe.zhong@rivai.ai/","msgid":"<20230808113259.363524-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T11:32:59","name":"RISC-V: Allow CONST_VECTOR for VLS modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808113259.363524-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132521,"url":"https://patchwork.plctlab.org/api/1.2/patches/132521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808115709.380001-1-lehua.ding@rivai.ai/","msgid":"<20230808115709.380001-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-08T11:57:09","name":"RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808115709.380001-1-lehua.ding@rivai.ai/mbox/"},{"id":132522,"url":"https://patchwork.plctlab.org/api/1.2/patches/132522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808122353.CF6F713451@imap2.suse-dmz.suse.de/","msgid":"<20230808122353.CF6F713451@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-08T12:23:53","name":"tree-optimization/110924 - fix vop liveness for noreturn const CFG parts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808122353.CF6F713451@imap2.suse-dmz.suse.de/mbox/"},{"id":132523,"url":"https://patchwork.plctlab.org/api/1.2/patches/132523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com/","msgid":"<334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com>","list_archive_url":null,"date":"2023-08-08T13:04:21","name":"[GCC] aarch64: Add support for Cortex-A520 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com/mbox/"},{"id":132525,"url":"https://patchwork.plctlab.org/api/1.2/patches/132525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNJIRJ2p49HBjcMn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-08T13:51:00","name":"testsuite: Add runtime _BitInt stdatomic.h tests [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNJIRJ2p49HBjcMn@tucnak/mbox/"},{"id":132527,"url":"https://patchwork.plctlab.org/api/1.2/patches/132527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808150121.318595-1-christophe.lyon@linaro.org/","msgid":"<20230808150121.318595-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-08T15:01:21","name":"testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-[123].c [PR 110426]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808150121.318595-1-christophe.lyon@linaro.org/mbox/"},{"id":132569,"url":"https://patchwork.plctlab.org/api/1.2/patches/132569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Ze_MJqEnWFkvukyRLBqWgyScgaPP5wN+bCfYN2yaVdqA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-08T16:59:58","name":"[committed] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Ze_MJqEnWFkvukyRLBqWgyScgaPP5wN+bCfYN2yaVdqA@mail.gmail.com/mbox/"},{"id":132589,"url":"https://patchwork.plctlab.org/api/1.2/patches/132589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ilqw4h.fsf@oracle.com/","msgid":"<87y1ilqw4h.fsf@oracle.com>","list_archive_url":null,"date":"2023-08-08T17:31:10","name":"bpf: Fixed GC mistakes in BPF builtins code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ilqw4h.fsf@oracle.com/mbox/"},{"id":132884,"url":"https://patchwork.plctlab.org/api/1.2/patches/132884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0433672-8310-b1aa-653c-a83b9bad3de3@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-08T21:40:07","name":"[committed,RISC-V] Fix bug in condition canonicalization for zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0433672-8310-b1aa-653c-a83b9bad3de3@ventanamicro.com/mbox/"},{"id":132900,"url":"https://patchwork.plctlab.org/api/1.2/patches/132900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808215214.19929-1-patrick@rivosinc.com/","msgid":"<20230808215214.19929-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-08T21:52:14","name":"[v3] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808215214.19929-1-patrick@rivosinc.com/mbox/"},{"id":132927,"url":"https://patchwork.plctlab.org/api/1.2/patches/132927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808223405.35178-1-palevichva@gmail.com/","msgid":"<20230808223405.35178-1-palevichva@gmail.com>","list_archive_url":null,"date":"2023-08-08T22:34:05","name":"libstdc++: fix memory clobbering in std::vector [PR110879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808223405.35178-1-palevichva@gmail.com/mbox/"},{"id":133018,"url":"https://patchwork.plctlab.org/api/1.2/patches/133018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809014756.19615-1-hongtao.liu@intel.com/","msgid":"<20230809014756.19615-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-09T01:47:56","name":"[V2,X86] Workaround possible CPUID bug in Sandy Bridge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809014756.19615-1-hongtao.liu@intel.com/mbox/"},{"id":133035,"url":"https://patchwork.plctlab.org/api/1.2/patches/133035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809030511.857619-1-pan2.li@intel.com/","msgid":"<20230809030511.857619-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-09T03:05:11","name":"[v3] Mode-Switching: Fix SET_SRC ICE when CLOBBER insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809030511.857619-1-pan2.li@intel.com/mbox/"},{"id":133067,"url":"https://patchwork.plctlab.org/api/1.2/patches/133067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com/","msgid":"<7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:09:21","name":"RISC-V: Remove non-existing '\''Zve32d'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133068,"url":"https://patchwork.plctlab.org/api/1.2/patches/133068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com/","msgid":"<83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:11:50","name":"[RFC,1/2] RISC-V: __builtin_riscv_pause for all environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133069,"url":"https://patchwork.plctlab.org/api/1.2/patches/133069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com/","msgid":"<9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:11:51","name":"[RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133071,"url":"https://patchwork.plctlab.org/api/1.2/patches/133071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809063622.316743-1-juzhe.zhong@rivai.ai/","msgid":"<20230809063622.316743-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T06:36:22","name":"VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809063622.316743-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133077,"url":"https://patchwork.plctlab.org/api/1.2/patches/133077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809065138.1392231-1-hongtao.liu@intel.com/","msgid":"<20230809065138.1392231-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-09T06:51:38","name":"Rename local variable subleaf_level to max_subleaf_level.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809065138.1392231-1-hongtao.liu@intel.com/mbox/"},{"id":133158,"url":"https://patchwork.plctlab.org/api/1.2/patches/133158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809105142.3163887-1-juzhe.zhong@rivai.ai/","msgid":"<20230809105142.3163887-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T10:51:42","name":"RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809105142.3163887-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133159,"url":"https://patchwork.plctlab.org/api/1.2/patches/133159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809110244.2966438582B0@sourceware.org/","msgid":"<20230809110244.2966438582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-09T11:02:00","name":"Remove insert location argument from vectorizable_live_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809110244.2966438582B0@sourceware.org/mbox/"},{"id":133171,"url":"https://patchwork.plctlab.org/api/1.2/patches/133171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-2-c@jia.je/","msgid":"<20230809115325.3716347-2-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:08","name":"[v2,01/14] LoongArch: Introduce loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-2-c@jia.je/mbox/"},{"id":133167,"url":"https://patchwork.plctlab.org/api/1.2/patches/133167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-3-c@jia.je/","msgid":"<20230809115325.3716347-3-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:09","name":"[v2,02/14] LoongArch: Fix default ISA setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-3-c@jia.je/mbox/"},{"id":133174,"url":"https://patchwork.plctlab.org/api/1.2/patches/133174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-4-c@jia.je/","msgid":"<20230809115325.3716347-4-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:10","name":"[v2,03/14] LoongArch: Fix SI division for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-4-c@jia.je/mbox/"},{"id":133170,"url":"https://patchwork.plctlab.org/api/1.2/patches/133170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-5-c@jia.je/","msgid":"<20230809115325.3716347-5-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:11","name":"[v2,04/14] LoongArch: Fix movgr2frh.w operand order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-5-c@jia.je/mbox/"},{"id":133169,"url":"https://patchwork.plctlab.org/api/1.2/patches/133169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-6-c@jia.je/","msgid":"<20230809115325.3716347-6-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:12","name":"[v2,05/14] LoongArch: Fix 64-bit move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-6-c@jia.je/mbox/"},{"id":133173,"url":"https://patchwork.plctlab.org/api/1.2/patches/133173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-7-c@jia.je/","msgid":"<20230809115325.3716347-7-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:13","name":"[v2,06/14] LoongArch: Fix 64-bit immediate move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-7-c@jia.je/mbox/"},{"id":133176,"url":"https://patchwork.plctlab.org/api/1.2/patches/133176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-8-c@jia.je/","msgid":"<20230809115325.3716347-8-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:14","name":"[v2,07/14] LoongArch: Fix signed 32-bit overflow for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-8-c@jia.je/mbox/"},{"id":133177,"url":"https://patchwork.plctlab.org/api/1.2/patches/133177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-9-c@jia.je/","msgid":"<20230809115325.3716347-9-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:15","name":"[v2,08/14] LoongArch: Disable SF/DF -> unsigned DI expand in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-9-c@jia.je/mbox/"},{"id":133180,"url":"https://patchwork.plctlab.org/api/1.2/patches/133180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-10-c@jia.je/","msgid":"<20230809115325.3716347-10-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:16","name":"[v2,09/14] LoongArch: Add -march=loongarch64 to tests with -mabi=lp64d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-10-c@jia.je/mbox/"},{"id":133182,"url":"https://patchwork.plctlab.org/api/1.2/patches/133182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-11-c@jia.je/","msgid":"<20230809115325.3716347-11-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:17","name":"[v2,10/14] LoongArch: Forbid ADDRESS_REG_REG in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-11-c@jia.je/mbox/"},{"id":133186,"url":"https://patchwork.plctlab.org/api/1.2/patches/133186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-12-c@jia.je/","msgid":"<20230809115325.3716347-12-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:18","name":"[v2,11/14] LoongArch: Mark am* instructions as LA64-only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-12-c@jia.je/mbox/"},{"id":133172,"url":"https://patchwork.plctlab.org/api/1.2/patches/133172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-13-c@jia.je/","msgid":"<20230809115325.3716347-13-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:19","name":"[v2,12/14] LoongArch: Set long double width to 128 in la32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-13-c@jia.je/mbox/"},{"id":133181,"url":"https://patchwork.plctlab.org/api/1.2/patches/133181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-14-c@jia.je/","msgid":"<20230809115325.3716347-14-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:20","name":"[v2,13/14] LoongArch: Fix ilp32 detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-14-c@jia.je/mbox/"},{"id":133183,"url":"https://patchwork.plctlab.org/api/1.2/patches/133183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-15-c@jia.je/","msgid":"<20230809115325.3716347-15-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:21","name":"[v2,14/14] LoongArch: Allow ftintrz for DF->DI in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-15-c@jia.je/mbox/"},{"id":133197,"url":"https://patchwork.plctlab.org/api/1.2/patches/133197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809121840.3576116-1-juzhe.zhong@rivai.ai/","msgid":"<20230809121840.3576116-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T12:18:40","name":"RISC-V: Support NPATTERNS = 1 stepped vector[PR110950]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809121840.3576116-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133237,"url":"https://patchwork.plctlab.org/api/1.2/patches/133237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809132301.0F2F138582B0@sourceware.org/","msgid":"<20230809132301.0F2F138582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-09T13:22:15","name":"Handle in-order reductions when SLP vectorizing non-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809132301.0F2F138582B0@sourceware.org/mbox/"},{"id":133278,"url":"https://patchwork.plctlab.org/api/1.2/patches/133278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142146.1014795-1-jwakely@redhat.com/","msgid":"<20230809142146.1014795-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:22","name":"[committed] libstdc++: Minor fixes for some warnings in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142146.1014795-1-jwakely@redhat.com/mbox/"},{"id":133280,"url":"https://patchwork.plctlab.org/api/1.2/patches/133280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142156.1014897-1-jwakely@redhat.com/","msgid":"<20230809142156.1014897-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:47","name":"[committed] libstdc++: Explicitly default some copy ctors and assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142156.1014897-1-jwakely@redhat.com/mbox/"},{"id":133279,"url":"https://patchwork.plctlab.org/api/1.2/patches/133279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142232.1014914-1-jwakely@redhat.com/","msgid":"<20230809142232.1014914-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:57","name":"[committed] libstdc++: Fix some -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142232.1014914-1-jwakely@redhat.com/mbox/"},{"id":133281,"url":"https://patchwork.plctlab.org/api/1.2/patches/133281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142240.1015004-1-jwakely@redhat.com/","msgid":"<20230809142240.1015004-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:35","name":"[committed] libstdc++: Fix some -Wmismatched-tags warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142240.1015004-1-jwakely@redhat.com/mbox/"},{"id":133284,"url":"https://patchwork.plctlab.org/api/1.2/patches/133284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142245.1015025-1-jwakely@redhat.com/","msgid":"<20230809142245.1015025-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:41","name":"[committed] libstdc++: Suppress clang -Wc99-extensions warnings in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142245.1015025-1-jwakely@redhat.com/mbox/"},{"id":133282,"url":"https://patchwork.plctlab.org/api/1.2/patches/133282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142252.1015042-1-jwakely@redhat.com/","msgid":"<20230809142252.1015042-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:47","name":"[committed] libstdc++: Fix a -Wsign-compare warning in std::list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142252.1015042-1-jwakely@redhat.com/mbox/"},{"id":133283,"url":"https://patchwork.plctlab.org/api/1.2/patches/133283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142300.1015066-1-jwakely@redhat.com/","msgid":"<20230809142300.1015066-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:53","name":"[committed] libstdc++: Fix constexpr functions to conform to older standards","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142300.1015066-1-jwakely@redhat.com/mbox/"},{"id":133314,"url":"https://patchwork.plctlab.org/api/1.2/patches/133314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b028eb6689e9afdca0e06ed354b94d7ed615a802.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-09T15:52:46","name":"rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b028eb6689e9afdca0e06ed354b94d7ed615a802.camel@us.ibm.com/mbox/"},{"id":133329,"url":"https://patchwork.plctlab.org/api/1.2/patches/133329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809161340.2659544-1-apinski@marvell.com/","msgid":"<20230809161340.2659544-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-09T16:13:40","name":"VR-VALUES: Simplify comparison using range pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809161340.2659544-1-apinski@marvell.com/mbox/"},{"id":133402,"url":"https://patchwork.plctlab.org/api/1.2/patches/133402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:13","name":"[1/12] expr: Small optimization [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/"},{"id":133404,"url":"https://patchwork.plctlab.org/api/1.2/patches/133404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:54","name":"[2/12] lto-streamer-in: Adjust assert [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/mbox/"},{"id":133406,"url":"https://patchwork.plctlab.org/api/1.2/patches/133406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:17:09","name":"[3/12] phiopt: Fix phiopt ICE on vops [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/mbox/"},{"id":133407,"url":"https://patchwork.plctlab.org/api/1.2/patches/133407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:17:50","name":"[4/12] Middle-end _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/mbox/"},{"id":133409,"url":"https://patchwork.plctlab.org/api/1.2/patches/133409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:18:50","name":"[5/12] _BitInt lowering support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/mbox/"},{"id":133408,"url":"https://patchwork.plctlab.org/api/1.2/patches/133408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:19:41","name":"[6/12] i386: Enable _BitInt on x86-64 [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/mbox/"},{"id":133410,"url":"https://patchwork.plctlab.org/api/1.2/patches/133410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:20:37","name":"[7/12] ubsan: _BitInt -fsanitize=undefined support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/mbox/"},{"id":133411,"url":"https://patchwork.plctlab.org/api/1.2/patches/133411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:22:07","name":"[8/12] libgcc: Generated tables for _BitInt <-> _Decimal* conversions [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/mbox/"},{"id":133412,"url":"https://patchwork.plctlab.org/api/1.2/patches/133412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:23:05","name":"[9/12] libgcc _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/mbox/"},{"id":133413,"url":"https://patchwork.plctlab.org/api/1.2/patches/133413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:25:14","name":"[10/12] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/mbox/"},{"id":133415,"url":"https://patchwork.plctlab.org/api/1.2/patches/133415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:26:12","name":"[11/12] testsuite part 1 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/mbox/"},{"id":133416,"url":"https://patchwork.plctlab.org/api/1.2/patches/133416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:27:30","name":"[12/12] testsuite part 2 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/mbox/"},{"id":133443,"url":"https://patchwork.plctlab.org/api/1.2/patches/133443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809191954.2668047-1-apinski@marvell.com/","msgid":"<20230809191954.2668047-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-09T19:19:54","name":"MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809191954.2668047-1-apinski@marvell.com/mbox/"},{"id":133444,"url":"https://patchwork.plctlab.org/api/1.2/patches/133444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu/","msgid":"<97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-09T19:22:47","name":"[v2] analyzer: More features for CPython analyzer plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu/mbox/"},{"id":133481,"url":"https://patchwork.plctlab.org/api/1.2/patches/133481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202104.1804417-1-dmalcolm@redhat.com/","msgid":"<20230809202104.1804417-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-09T20:21:04","name":"[pushed] analyzer: remove default return value from region_model::on_call_pre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202104.1804417-1-dmalcolm@redhat.com/mbox/"},{"id":133483,"url":"https://patchwork.plctlab.org/api/1.2/patches/133483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-2-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:20","name":"[1/3] fortran: New predicate gfc_length_one_character_type_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-2-mikael@gcc.gnu.org/mbox/"},{"id":133482,"url":"https://patchwork.plctlab.org/api/1.2/patches/133482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-3-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:21","name":"[2/3] fortran: Fix length one character dummy arg type [PR110419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-3-mikael@gcc.gnu.org/mbox/"},{"id":133485,"url":"https://patchwork.plctlab.org/api/1.2/patches/133485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-4-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:22","name":"[3/3] testsuite: Use distinct explicit error codes in value_9.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-4-mikael@gcc.gnu.org/mbox/"},{"id":133587,"url":"https://patchwork.plctlab.org/api/1.2/patches/133587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-2-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-2-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:07","name":"[v4,1/8] libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-2-lhyatt@gmail.com/mbox/"},{"id":133586,"url":"https://patchwork.plctlab.org/api/1.2/patches/133586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-3-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-3-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:08","name":"[v4,2/8] libcpp: diagnostics: Support generated data in expanded locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-3-lhyatt@gmail.com/mbox/"},{"id":133591,"url":"https://patchwork.plctlab.org/api/1.2/patches/133591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-4-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-4-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:09","name":"[v4,3/8] diagnostics: Refactor class file_cache_slot","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-4-lhyatt@gmail.com/mbox/"},{"id":133590,"url":"https://patchwork.plctlab.org/api/1.2/patches/133590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-5-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-5-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:10","name":"[v4,4/8] diagnostics: Support obtaining source code lines from generated data buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-5-lhyatt@gmail.com/mbox/"},{"id":133592,"url":"https://patchwork.plctlab.org/api/1.2/patches/133592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-6-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-6-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:11","name":"[v4,5/8] diagnostics: Support testing generated data in input.cc selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-6-lhyatt@gmail.com/mbox/"},{"id":133593,"url":"https://patchwork.plctlab.org/api/1.2/patches/133593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-7-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-7-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:12","name":"[v4,6/8] diagnostics: Full support for generated data locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-7-lhyatt@gmail.com/mbox/"},{"id":133596,"url":"https://patchwork.plctlab.org/api/1.2/patches/133596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-8-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-8-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:13","name":"[v4,7/8] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-8-lhyatt@gmail.com/mbox/"},{"id":133588,"url":"https://patchwork.plctlab.org/api/1.2/patches/133588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-9-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-9-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:14","name":"[v4,8/8] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-9-lhyatt@gmail.com/mbox/"},{"id":133625,"url":"https://patchwork.plctlab.org/api/1.2/patches/133625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810001956.2680884-1-apinski@marvell.com/","msgid":"<20230810001956.2680884-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-10T00:19:56","name":"Fix PR 110954: wrong code with cmp | !cmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810001956.2680884-1-apinski@marvell.com/mbox/"},{"id":133627,"url":"https://patchwork.plctlab.org/api/1.2/patches/133627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810003026.214982-1-vineetg@rivosinc.com/","msgid":"<20230810003026.214982-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-10T00:30:26","name":"RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810003026.214982-1-vineetg@rivosinc.com/mbox/"},{"id":133634,"url":"https://patchwork.plctlab.org/api/1.2/patches/133634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810004728.15915-1-hongtao.liu@intel.com/","msgid":"<20230810004728.15915-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-10T00:47:28","name":"i386: Do not sanitize upper part of V2HFmode and V4HFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810004728.15915-1-hongtao.liu@intel.com/mbox/"},{"id":133642,"url":"https://patchwork.plctlab.org/api/1.2/patches/133642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810011149.23432-1-hongtao.liu@intel.com/","msgid":"<20230810011149.23432-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-10T01:11:49","name":"Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810011149.23432-1-hongtao.liu@intel.com/mbox/"},{"id":133662,"url":"https://patchwork.plctlab.org/api/1.2/patches/133662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com/","msgid":"<22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:25:06","name":"[RFC,v2,1/2] RISC-V: __builtin_riscv_pause for all environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133661,"url":"https://patchwork.plctlab.org/api/1.2/patches/133661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com/","msgid":"<0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:25:07","name":"[RFC,v2,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133663,"url":"https://patchwork.plctlab.org/api/1.2/patches/133663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com/","msgid":"<22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:26:02","name":"[RFC,1/2] RISC-V: Make __builtin_riscv_pause '\''Zihintpause'\'' only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133664,"url":"https://patchwork.plctlab.org/api/1.2/patches/133664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/efab3539fbece51c688b055579ab6670ff8ca8af.1691634361.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T02:26:03","name":"[RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/efab3539fbece51c688b055579ab6670ff8ca8af.1691634361.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133671,"url":"https://patchwork.plctlab.org/api/1.2/patches/133671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com/","msgid":"<97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T03:10:57","name":"[1/1] RISC-V: Make \"prefetch.i\" built-in usable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133672,"url":"https://patchwork.plctlab.org/api/1.2/patches/133672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810031203.2539834-1-pan2.li@intel.com/","msgid":"<20230810031203.2539834-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T03:12:03","name":"[v3] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810031203.2539834-1-pan2.li@intel.com/mbox/"},{"id":133691,"url":"https://patchwork.plctlab.org/api/1.2/patches/133691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810050940.3694097-1-pan2.li@intel.com/","msgid":"<20230810050940.3694097-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T05:09:40","name":"[v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810050940.3694097-1-pan2.li@intel.com/mbox/"},{"id":133692,"url":"https://patchwork.plctlab.org/api/1.2/patches/133692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com/","msgid":"<1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com>","list_archive_url":null,"date":"2023-08-10T05:13:36","name":"sso-string@gnu-versioned-namespace [PR83077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com/mbox/"},{"id":133718,"url":"https://patchwork.plctlab.org/api/1.2/patches/133718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-2-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:43","name":"[V2,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-2-lehua.ding@rivai.ai/mbox/"},{"id":133719,"url":"https://patchwork.plctlab.org/api/1.2/patches/133719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-3-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:44","name":"[V2,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-3-lehua.ding@rivai.ai/mbox/"},{"id":133720,"url":"https://patchwork.plctlab.org/api/1.2/patches/133720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-4-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:45","name":"[V2,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-4-lehua.ding@rivai.ai/mbox/"},{"id":133736,"url":"https://patchwork.plctlab.org/api/1.2/patches/133736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810074909.492039-1-juzhe.zhong@rivai.ai/","msgid":"<20230810074909.492039-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:49:09","name":"[V2] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810074909.492039-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133757,"url":"https://patchwork.plctlab.org/api/1.2/patches/133757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810081954.1899125-1-pan2.li@intel.com/","msgid":"<20230810081954.1899125-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T08:19:54","name":"[v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810081954.1899125-1-pan2.li@intel.com/mbox/"},{"id":133764,"url":"https://patchwork.plctlab.org/api/1.2/patches/133764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810085518.725472-1-juzhe.zhong@rivai.ai/","msgid":"<20230810085518.725472-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T08:55:18","name":"RISC-V: Add missing modes to the iterators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810085518.725472-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133788,"url":"https://patchwork.plctlab.org/api/1.2/patches/133788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810092146.839668-1-juzhe.zhong@rivai.ai/","msgid":"<20230810092146.839668-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T09:21:46","name":"RISC-V: Support TU for integer ternary OP[PR110964]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810092146.839668-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133842,"url":"https://patchwork.plctlab.org/api/1.2/patches/133842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNS3f14lkWcbBDpR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T10:10:07","name":"[13/12] C _BitInt incremental fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNS3f14lkWcbBDpR@tucnak/mbox/"},{"id":133868,"url":"https://patchwork.plctlab.org/api/1.2/patches/133868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810103705.1697293-1-juzhe.zhong@rivai.ai/","msgid":"<20230810103705.1697293-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T10:37:05","name":"RISC-V: Add MASK vec_duplicate pattern[PR110962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810103705.1697293-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133927,"url":"https://patchwork.plctlab.org/api/1.2/patches/133927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae3a8263-f29f-f8b2-0733-8dc1e3420859@in.tum.de/","msgid":"","list_archive_url":null,"date":"2023-08-10T11:33:53","name":"preserve base pointer for __deregister_frame [PR110956]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae3a8263-f29f-f8b2-0733-8dc1e3420859@in.tum.de/mbox/"},{"id":133928,"url":"https://patchwork.plctlab.org/api/1.2/patches/133928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at/","msgid":"<573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-10T11:39:45","name":"c: Support for -Wuseless-cast [RR84510]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at/mbox/"},{"id":133959,"url":"https://patchwork.plctlab.org/api/1.2/patches/133959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122119.1679030-1-lehua.ding@rivai.ai/","msgid":"<20230810122119.1679030-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T12:21:19","name":"[V2] RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122119.1679030-1-lehua.ding@rivai.ai/mbox/"},{"id":133961,"url":"https://patchwork.plctlab.org/api/1.2/patches/133961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122342.10BBA38582B0@sourceware.org/","msgid":"<20230810122342.10BBA38582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-10T12:22:59","name":"Make ISEL used internal functions const/nothrow where appropriate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122342.10BBA38582B0@sourceware.org/mbox/"},{"id":133974,"url":"https://patchwork.plctlab.org/api/1.2/patches/133974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810124235.9E9393857B8E@sourceware.org/","msgid":"<20230810124235.9E9393857B8E@sourceware.org>","list_archive_url":null,"date":"2023-08-10T12:41:51","name":"tree-optimization/110963 - more PRE when optimizing for size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810124235.9E9393857B8E@sourceware.org/mbox/"},{"id":134025,"url":"https://patchwork.plctlab.org/api/1.2/patches/134025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810130402.752335-2-stefansf@linux.ibm.com/","msgid":"<20230810130402.752335-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-10T13:04:03","name":"rtl-optimization/110939 Really fix narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810130402.752335-2-stefansf@linux.ibm.com/mbox/"},{"id":133999,"url":"https://patchwork.plctlab.org/api/1.2/patches/133999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a38a757a186a7ed0530bec6eed632d7230b5f3d5.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:02","name":"[1/5] OpenMP: Move Fortran '\''declare mapper'\'' instantiation code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a38a757a186a7ed0530bec6eed632d7230b5f3d5.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134002,"url":"https://patchwork.plctlab.org/api/1.2/patches/134002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcd6309ed81cddb4e8e029430e421f8208b52f8a.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:03","name":"[2/5] OpenMP: Reprocess expanded clauses after '\''declare mapper'\'' instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcd6309ed81cddb4e8e029430e421f8208b52f8a.1691672603.git.julian@codesourcery.com/mbox/"},{"id":133998,"url":"https://patchwork.plctlab.org/api/1.2/patches/133998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com/","msgid":"<7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T13:33:04","name":"[3/5] OpenMP: Introduce C_ORT_{, OMP_}DECLARE_MAPPER c_omp_region_type types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134001,"url":"https://patchwork.plctlab.org/api/1.2/patches/134001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d90c4df5a82eab4313b75f5e702f7bd0a613c304.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:05","name":"[4/5] OpenMP: Look up '\''declare mapper'\'' definitions at resolution time not parse time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d90c4df5a82eab4313b75f5e702f7bd0a613c304.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134003,"url":"https://patchwork.plctlab.org/api/1.2/patches/134003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com/","msgid":"<0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T13:33:06","name":"[5/5] OpenMP: Enable '\''declare mapper'\'' mappers for '\''target update'\'' directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134044,"url":"https://patchwork.plctlab.org/api/1.2/patches/134044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUA0zC/RG/cqnB5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:22:59","name":"[13/12,v2] C _BitInt incremental fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUA0zC/RG/cqnB5@tucnak/mbox/"},{"id":134045,"url":"https://patchwork.plctlab.org/api/1.2/patches/134045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDMvNw/UldnN9d@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:33:06","name":"c, v2: Add __typeof_unqual__ and __typeof_unqual support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDMvNw/UldnN9d@tucnak/mbox/"},{"id":134046,"url":"https://patchwork.plctlab.org/api/1.2/patches/134046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDrXSjHpgTuknm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:35:09","name":"c, c++, v2: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDrXSjHpgTuknm@tucnak/mbox/"},{"id":134048,"url":"https://patchwork.plctlab.org/api/1.2/patches/134048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEZzW2H9zc/n4V@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:38:15","name":"c, v2: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEZzW2H9zc/n4V@tucnak/mbox/"},{"id":134050,"url":"https://patchwork.plctlab.org/api/1.2/patches/134050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEskNR0ezRW2Js@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:39:30","name":"stdckdint.h _BitInt test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEskNR0ezRW2Js@tucnak/mbox/"},{"id":134054,"url":"https://patchwork.plctlab.org/api/1.2/patches/134054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUFhqrSn3Gcq09w@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:43:02","name":"match.pd, v2: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUFhqrSn3Gcq09w@tucnak/mbox/"},{"id":134073,"url":"https://patchwork.plctlab.org/api/1.2/patches/134073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160833.1513194-1-ppalka@redhat.com/","msgid":"<20230810160833.1513194-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:08:33","name":"c++: dependently scoped template-id in type-req [PR110927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160833.1513194-1-ppalka@redhat.com/mbox/"},{"id":134074,"url":"https://patchwork.plctlab.org/api/1.2/patches/134074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160842.1513222-1-ppalka@redhat.com/","msgid":"<20230810160842.1513222-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:08:42","name":"c++: recognize in-class var tmpl partial spec [PR71954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160842.1513222-1-ppalka@redhat.com/mbox/"},{"id":134075,"url":"https://patchwork.plctlab.org/api/1.2/patches/134075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160900.1513252-1-ppalka@redhat.com/","msgid":"<20230810160900.1513252-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:09:00","name":"c++: bogus warning w/ deduction guide in anon ns [PR106604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160900.1513252-1-ppalka@redhat.com/mbox/"},{"id":134110,"url":"https://patchwork.plctlab.org/api/1.2/patches/134110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUWx+6BCgS4Y7uX@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T16:56:39","name":"Fix undefined behaviour in profile_count::differs_from_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUWx+6BCgS4Y7uX@kam.mff.cuni.cz/mbox/"},{"id":134111,"url":"https://patchwork.plctlab.org/api/1.2/patches/134111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUW6q1p08h/OTLN@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T16:57:14","name":"Fix profile updating bug in tree-ssa-threadupdate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUW6q1p08h/OTLN@kam.mff.cuni.cz/mbox/"},{"id":134113,"url":"https://patchwork.plctlab.org/api/1.2/patches/134113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUYcP4Lm1v7fps9@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T17:03:44","name":"Fix profile update in duplicat_loop_body_to_header_edge for loops with 0 count_in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUYcP4Lm1v7fps9@kam.mff.cuni.cz/mbox/"},{"id":134134,"url":"https://patchwork.plctlab.org/api/1.2/patches/134134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuUU3KtBmD4rgH=FbWSfmsaxCO6i2F3=4rq5W2VgR7YF=Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T18:06:36","name":"[RFC,v2] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuUU3KtBmD4rgH=FbWSfmsaxCO6i2F3=4rq5W2VgR7YF=Q@mail.gmail.com/mbox/"},{"id":134232,"url":"https://patchwork.plctlab.org/api/1.2/patches/134232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com/","msgid":"<5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T21:30:32","name":"config: Fix host -rdynamic detection for build != host != target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com/mbox/"},{"id":134240,"url":"https://patchwork.plctlab.org/api/1.2/patches/134240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNVjtv70+OJlqcn2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T22:24:54","name":"Fix division by zero in tree-ssa-loop-split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNVjtv70+OJlqcn2@kam.mff.cuni.cz/mbox/"},{"id":134243,"url":"https://patchwork.plctlab.org/api/1.2/patches/134243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223344.1242452-1-jwakely@redhat.com/","msgid":"<20230810223344.1242452-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:32:21","name":"[committed] libstdc++: Use alias template for iterator_category [PR110970]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223344.1242452-1-jwakely@redhat.com/mbox/"},{"id":134242,"url":"https://patchwork.plctlab.org/api/1.2/patches/134242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223353.1242664-1-jwakely@redhat.com/","msgid":"<20230810223353.1242664-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:33:45","name":"[committed] libstdc++: Fix std::format for localized floats [PR110968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223353.1242664-1-jwakely@redhat.com/mbox/"},{"id":134246,"url":"https://patchwork.plctlab.org/api/1.2/patches/134246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810224034.1259089-1-jwakely@redhat.com/","msgid":"<20230810224034.1259089-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:40:03","name":"[committed] libstdc++: Fix out-of-bounds read in format string \"{:{}.\" [PR110974]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810224034.1259089-1-jwakely@redhat.com/mbox/"},{"id":134251,"url":"https://patchwork.plctlab.org/api/1.2/patches/134251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810225121.2732876-1-apinski@marvell.com/","msgid":"<20230810225121.2732876-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-10T22:51:21","name":"[PATCHv2] Fix PR 110954: wrong code with cmp | !cmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810225121.2732876-1-apinski@marvell.com/mbox/"},{"id":134260,"url":"https://patchwork.plctlab.org/api/1.2/patches/134260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811003810.2669080-1-hongtao.liu@intel.com/","msgid":"<20230811003810.2669080-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-11T00:38:10","name":"Software mitigation: Disable gather generation in vectorization for GDS affected Intel Processors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811003810.2669080-1-hongtao.liu@intel.com/mbox/"},{"id":134279,"url":"https://patchwork.plctlab.org/api/1.2/patches/134279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811022819.1113702-1-pan2.li@intel.com/","msgid":"<20230811022819.1113702-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T02:28:19","name":"[v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811022819.1113702-1-pan2.li@intel.com/mbox/"},{"id":134326,"url":"https://patchwork.plctlab.org/api/1.2/patches/134326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811055429.3654604-1-pan2.li@intel.com/","msgid":"<20230811055429.3654604-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T05:54:29","name":"[v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811055429.3654604-1-pan2.li@intel.com/mbox/"},{"id":134332,"url":"https://patchwork.plctlab.org/api/1.2/patches/134332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811060131.1494356-1-hongtao.liu@intel.com/","msgid":"<20230811060131.1494356-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-11T06:01:31","name":"[V2] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811060131.1494356-1-hongtao.liu@intel.com/mbox/"},{"id":134334,"url":"https://patchwork.plctlab.org/api/1.2/patches/134334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811063817.491547-1-juzhe.zhong@rivai.ai/","msgid":"<20230811063817.491547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T06:38:17","name":"[V3] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811063817.491547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134338,"url":"https://patchwork.plctlab.org/api/1.2/patches/134338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811064910.525721-1-juzhe.zhong@rivai.ai/","msgid":"<20230811064910.525721-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T06:49:10","name":"VECT: Add vec_mask_len_{load_lanes,store_lanes} patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811064910.525721-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134345,"url":"https://patchwork.plctlab.org/api/1.2/patches/134345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811071748.486528-1-pan2.li@intel.com/","msgid":"<20230811071748.486528-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T07:17:48","name":"[v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811071748.486528-1-pan2.li@intel.com/mbox/"},{"id":134355,"url":"https://patchwork.plctlab.org/api/1.2/patches/134355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNXstoaxDzI1OEwE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-11T08:09:26","name":"c, v3: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNXstoaxDzI1OEwE@tucnak/mbox/"},{"id":134357,"url":"https://patchwork.plctlab.org/api/1.2/patches/134357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081023.95408-1-mikael@gcc.gnu.org/","msgid":"<20230811081023.95408-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-11T08:10:23","name":"dg-cmp-results: Escape slash from variant argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081023.95408-1-mikael@gcc.gnu.org/mbox/"},{"id":134359,"url":"https://patchwork.plctlab.org/api/1.2/patches/134359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081117.1088622-1-pan2.li@intel.com/","msgid":"<20230811081117.1088622-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T08:11:17","name":"[v1] RISC-V: Support RVV VFNMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081117.1088622-1-pan2.li@intel.com/mbox/"},{"id":134370,"url":"https://patchwork.plctlab.org/api/1.2/patches/134370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811084526.237649-1-juzhe.zhong@rivai.ai/","msgid":"<20230811084526.237649-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T08:45:26","name":"RISC-V: Fix vec_series expander[PR110985]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811084526.237649-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134372,"url":"https://patchwork.plctlab.org/api/1.2/patches/134372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811090121.1789446-1-lehua.ding@rivai.ai/","msgid":"<20230811090121.1789446-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-11T09:01:21","name":"RISC-V: Revert the convert from vmv.s.x to vmv.v.i","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811090121.1789446-1-lehua.ding@rivai.ai/mbox/"},{"id":134375,"url":"https://patchwork.plctlab.org/api/1.2/patches/134375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com/","msgid":"<3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-11T09:11:39","name":"RISC-V: Revive test case PR 102957","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134377,"url":"https://patchwork.plctlab.org/api/1.2/patches/134377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-1-apinski@marvell.com/","msgid":"<20230811091551.2758227-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-11T09:15:50","name":"[1/2] PHI-OPT [PR 110984]: Add support for NE_EXPR/EQ_EXPR with casts to spaceship_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-1-apinski@marvell.com/mbox/"},{"id":134378,"url":"https://patchwork.plctlab.org/api/1.2/patches/134378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-2-apinski@marvell.com/","msgid":"<20230811091551.2758227-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-11T09:15:51","name":"[2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-2-apinski@marvell.com/mbox/"},{"id":134386,"url":"https://patchwork.plctlab.org/api/1.2/patches/134386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811095601.216255-1-juzhe.zhong@rivai.ai/","msgid":"<20230811095601.216255-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T09:56:01","name":"[V2] RISC-V: Allow CONST_VECTOR for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811095601.216255-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134397,"url":"https://patchwork.plctlab.org/api/1.2/patches/134397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811101153.1621235-1-pan2.li@intel.com/","msgid":"<20230811101153.1621235-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T10:11:53","name":"[v1] RISC-V: Support RVV VFMSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811101153.1621235-1-pan2.li@intel.com/mbox/"},{"id":134417,"url":"https://patchwork.plctlab.org/api/1.2/patches/134417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110606.08A7913592@imap2.suse-dmz.suse.de/","msgid":"<20230811110606.08A7913592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T11:06:05","name":"tree-optimization/110979 - fold-left reduction and partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110606.08A7913592@imap2.suse-dmz.suse.de/mbox/"},{"id":134418,"url":"https://patchwork.plctlab.org/api/1.2/patches/134418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110712.5486D13592@imap2.suse-dmz.suse.de/","msgid":"<20230811110712.5486D13592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T11:07:11","name":"Improve BB vectorization opt-info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110712.5486D13592@imap2.suse-dmz.suse.de/mbox/"},{"id":134435,"url":"https://patchwork.plctlab.org/api/1.2/patches/134435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811114919.2556172-1-juzhe.zhong@rivai.ai/","msgid":"<20230811114919.2556172-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T11:49:19","name":"VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811114919.2556172-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134434,"url":"https://patchwork.plctlab.org/api/1.2/patches/134434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811115115.2277873-1-vultkayn@gcc.gnu.org/","msgid":"<20230811115115.2277873-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-11T11:51:15","name":"analyzer: New option fanalyzer-show-events-in-system-headers [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811115115.2277873-1-vultkayn@gcc.gnu.org/mbox/"},{"id":134474,"url":"https://patchwork.plctlab.org/api/1.2/patches/134474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811130321.D7EB613592@imap2.suse-dmz.suse.de/","msgid":"<20230811130321.D7EB613592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T13:03:21","name":"[v2] tree-optimization/110979 - fold-left reduction and partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811130321.D7EB613592@imap2.suse-dmz.suse.de/mbox/"},{"id":134493,"url":"https://patchwork.plctlab.org/api/1.2/patches/134493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXE1WdcjEsGtU786dAEyg2Eq0z90nxPiHzc6XXBV1nEwg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-11T13:18:36","name":"[v3] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXE1WdcjEsGtU786dAEyg2Eq0z90nxPiHzc6XXBV1nEwg@mail.gmail.com/mbox/"},{"id":134510,"url":"https://patchwork.plctlab.org/api/1.2/patches/134510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811135542.2823827-1-juzhe.zhong@rivai.ai/","msgid":"<20230811135542.2823827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T13:55:42","name":"[V2] VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811135542.2823827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134522,"url":"https://patchwork.plctlab.org/api/1.2/patches/134522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140303.1390347-1-jwakely@redhat.com/","msgid":"<20230811140303.1390347-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T14:02:28","name":"[committed] libstdc++: Revert accidentally committed change to bits/stl_iterator.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140303.1390347-1-jwakely@redhat.com/mbox/"},{"id":134526,"url":"https://patchwork.plctlab.org/api/1.2/patches/134526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140332.1390523-1-jwakely@redhat.com/","msgid":"<20230811140332.1390523-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T14:03:12","name":"[committed] libstdc++: Handle invalid values in std::chrono pretty printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140332.1390523-1-jwakely@redhat.com/mbox/"},{"id":134535,"url":"https://patchwork.plctlab.org/api/1.2/patches/134535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811142448.2913622-1-juzhe.zhong@rivai.ai/","msgid":"<20230811142448.2913622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T14:24:48","name":"[V4] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811142448.2913622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134561,"url":"https://patchwork.plctlab.org/api/1.2/patches/134561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com/","msgid":"<8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com>","list_archive_url":null,"date":"2023-08-11T15:32:19","name":"[pushed,LRA] : Implement output stack pointer reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com/mbox/"},{"id":134604,"url":"https://patchwork.plctlab.org/api/1.2/patches/134604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811172221.1432932-1-jwakely@redhat.com/","msgid":"<20230811172221.1432932-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T17:21:53","name":"[committed] libstdc++: Do not call log10(0.0) in std::format [PR110860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811172221.1432932-1-jwakely@redhat.com/mbox/"},{"id":134605,"url":"https://patchwork.plctlab.org/api/1.2/patches/134605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173025.12324-1-ef2648@columbia.edu/","msgid":"<20230811173025.12324-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-11T17:30:25","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173025.12324-1-ef2648@columbia.edu/mbox/"},{"id":134606,"url":"https://patchwork.plctlab.org/api/1.2/patches/134606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNZwXD4oLQPO98KZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-11T17:31:08","name":"c, v4: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNZwXD4oLQPO98KZ@tucnak/mbox/"},{"id":134610,"url":"https://patchwork.plctlab.org/api/1.2/patches/134610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173545.2116052-1-ppalka@redhat.com/","msgid":"<20230811173545.2116052-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-11T17:35:45","name":"tree-pretty-print: delimit TREE_VEC with braces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173545.2116052-1-ppalka@redhat.com/mbox/"},{"id":134624,"url":"https://patchwork.plctlab.org/api/1.2/patches/134624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811174724.12604-1-ef2648@columbia.edu/","msgid":"<20230811174724.12604-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-11T17:47:24","name":"[COMMITTED] analyzer: More features for CPython analyzer plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811174724.12604-1-ef2648@columbia.edu/mbox/"},{"id":134640,"url":"https://patchwork.plctlab.org/api/1.2/patches/134640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185247.5228-1-jose.marchesi@oracle.com/","msgid":"<20230811185247.5228-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-11T18:52:47","name":"[COMMITTED] bpf: allow exceeding max num of args in BPF when always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185247.5228-1-jose.marchesi@oracle.com/mbox/"},{"id":134641,"url":"https://patchwork.plctlab.org/api/1.2/patches/134641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185258.5285-1-jose.marchesi@oracle.com/","msgid":"<20230811185258.5285-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-11T18:52:58","name":"[COMMITTED] bpf: liberate R9 for general register allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185258.5285-1-jose.marchesi@oracle.com/mbox/"},{"id":134645,"url":"https://patchwork.plctlab.org/api/1.2/patches/134645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185935.1438399-1-jwakely@redhat.com/","msgid":"<20230811185935.1438399-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T18:58:41","name":"[committed] libstdc++: Implement C++20 std::chrono::parse [PR104167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185935.1438399-1-jwakely@redhat.com/mbox/"},{"id":134652,"url":"https://patchwork.plctlab.org/api/1.2/patches/134652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811191559.232535-1-patrick@rivosinc.com/","msgid":"<20230811191559.232535-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-11T19:15:59","name":"RISC-V: Specify -mabi for ztso testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811191559.232535-1-patrick@rivosinc.com/mbox/"},{"id":134728,"url":"https://patchwork.plctlab.org/api/1.2/patches/134728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce0a46f7-bc24-2585-dcd9-4b27a749bc16@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-11T21:55:48","name":"[committed] Fix subdi3 synthesis on rx port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce0a46f7-bc24-2585-dcd9-4b27a749bc16@gmail.com/mbox/"},{"id":134733,"url":"https://patchwork.plctlab.org/api/1.2/patches/134733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811221212.1959872-1-dmalcolm@redhat.com/","msgid":"<20230811221212.1959872-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-11T22:12:12","name":"[pushed] analyzer: new warning: -Wanalyzer-unterminated-string [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811221212.1959872-1-dmalcolm@redhat.com/mbox/"},{"id":134752,"url":"https://patchwork.plctlab.org/api/1.2/patches/134752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811223721.34729-1-jwakely@redhat.com/","msgid":"<20230811223721.34729-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T22:37:05","name":"[committed] libstdc++: Fix std::format_to_n return value [PR110990]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811223721.34729-1-jwakely@redhat.com/mbox/"},{"id":134799,"url":"https://patchwork.plctlab.org/api/1.2/patches/134799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812023002.238780-1-juzhe.zhong@rivai.ai/","msgid":"<20230812023002.238780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-12T02:30:02","name":"RISC-V: Add TAREGT_VECTOR check into VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812023002.238780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134807,"url":"https://patchwork.plctlab.org/api/1.2/patches/134807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:18","name":"[1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134809,"url":"https://patchwork.plctlab.org/api/1.2/patches/134809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:19","name":"[2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134808,"url":"https://patchwork.plctlab.org/api/1.2/patches/134808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:20","name":"[3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134813,"url":"https://patchwork.plctlab.org/api/1.2/patches/134813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812044822.2351566-1-pan2.li@intel.com/","msgid":"<20230812044822.2351566-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-12T04:48:22","name":"[v1] RISC-V: Support RVV VFNMSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812044822.2351566-1-pan2.li@intel.com/mbox/"},{"id":134830,"url":"https://patchwork.plctlab.org/api/1.2/patches/134830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812080521.2814979-1-apinski@marvell.com/","msgid":"<20230812080521.2814979-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-12T08:05:21","name":"Add support for vector conitional not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812080521.2814979-1-apinski@marvell.com/mbox/"},{"id":134831,"url":"https://patchwork.plctlab.org/api/1.2/patches/134831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812081652.1851216-1-gnaggnoyil@gmail.com/","msgid":"<20230812081652.1851216-1-gnaggnoyil@gmail.com>","list_archive_url":null,"date":"2023-08-12T08:16:52","name":"[v1] c++: follow DR 2386 and update implementation of get_tuple_size [PR110216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812081652.1851216-1-gnaggnoyil@gmail.com/mbox/"},{"id":134890,"url":"https://patchwork.plctlab.org/api/1.2/patches/134890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812141515.326096-1-juzhe.zhong@rivai.ai/","msgid":"<20230812141515.326096-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-12T14:15:15","name":"RISC-V: Fix autovec_length_operand predicate[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812141515.326096-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134891,"url":"https://patchwork.plctlab.org/api/1.2/patches/134891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812143643.1511082-1-lehua.ding@rivai.ai/","msgid":"<20230812143643.1511082-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-12T14:36:43","name":"RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812143643.1511082-1-lehua.ding@rivai.ai/mbox/"},{"id":134993,"url":"https://patchwork.plctlab.org/api/1.2/patches/134993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813005621.591927-1-pan2.li@intel.com/","msgid":"<20230813005621.591927-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-13T00:56:21","name":"[v4] Mode-Switching: Fix SET_SRC ICE for create_pre_exit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813005621.591927-1-pan2.li@intel.com/mbox/"},{"id":135018,"url":"https://patchwork.plctlab.org/api/1.2/patches/135018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813080231.2188040-1-pan2.li@intel.com/","msgid":"<20230813080231.2188040-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-13T08:02:31","name":"[v1] RISC-V: Support RVV VFWMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813080231.2188040-1-pan2.li@intel.com/mbox/"},{"id":135032,"url":"https://patchwork.plctlab.org/api/1.2/patches/135032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813134515.12498-1-iain@sandoe.co.uk/","msgid":"<20230813134515.12498-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-08-13T13:45:15","name":"[pushed] modula-2, plugin: Fix Darwin bootstrap issues.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813134515.12498-1-iain@sandoe.co.uk/mbox/"},{"id":135078,"url":"https://patchwork.plctlab.org/api/1.2/patches/135078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P195MB13982812469EE1DEFDF83A24AE16A@AS1P195MB1398.EURP195.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-08-13T19:19:56","name":"gcc/reload.h: Change type of x_spill_indirect_levels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P195MB13982812469EE1DEFDF83A24AE16A@AS1P195MB1398.EURP195.PROD.OUTLOOK.COM/mbox/"},{"id":135080,"url":"https://patchwork.plctlab.org/api/1.2/patches/135080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-1-arsen@aarsen.me/","msgid":"<20230813195939.1099991-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-13T19:35:34","name":"[v2,1/2] libstdc++: Implement more maintainable header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-1-arsen@aarsen.me/mbox/"},{"id":135081,"url":"https://patchwork.plctlab.org/api/1.2/patches/135081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-2-arsen@aarsen.me/","msgid":"<20230813195939.1099991-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-13T19:35:35","name":"[v2,2/2] libstdc++: Replace all manual FTM definitions and use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-2-arsen@aarsen.me/mbox/"},{"id":135095,"url":"https://patchwork.plctlab.org/api/1.2/patches/135095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdf06990-a0fe-1bed-46db-44ff92f3a986@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T01:09:00","name":"[pushed] LRA]: Fix asserts for output stack pointer reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdf06990-a0fe-1bed-46db-44ff92f3a986@redhat.com/mbox/"},{"id":135097,"url":"https://patchwork.plctlab.org/api/1.2/patches/135097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132212030.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:13:46","name":"[committed] Disable LRA for MMIX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132212030.11350@arjuna.pair.com/mbox/"},{"id":135098,"url":"https://patchwork.plctlab.org/api/1.2/patches/135098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132213580.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:16:17","name":"[committed] MMIX: Handle LRA FP-to-SP-elimination oddity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132213580.11350@arjuna.pair.com/mbox/"},{"id":135099,"url":"https://patchwork.plctlab.org/api/1.2/patches/135099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com/","msgid":"<61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T02:18:22","name":"[PATCHv4,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com/mbox/"},{"id":135101,"url":"https://patchwork.plctlab.org/api/1.2/patches/135101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132216290.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:19:22","name":"[committed] MMIX: Re-enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132216290.11350@arjuna.pair.com/mbox/"},{"id":135102,"url":"https://patchwork.plctlab.org/api/1.2/patches/135102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132219360.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:20:31","name":"[committed] MMIX: Switch to lra_in_progress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132219360.11350@arjuna.pair.com/mbox/"},{"id":135104,"url":"https://patchwork.plctlab.org/api/1.2/patches/135104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814023625.1355161-1-pan2.li@intel.com/","msgid":"<20230814023625.1355161-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T02:36:25","name":"[v1] RISC-V: Support RVV VFWNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814023625.1355161-1-pan2.li@intel.com/mbox/"},{"id":135105,"url":"https://patchwork.plctlab.org/api/1.2/patches/135105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814024600.1594913-1-hongtao.liu@intel.com/","msgid":"<20230814024600.1594913-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-14T02:46:00","name":"Generate vmovapd instead of vmovsd for moving DFmode between SSE_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814024600.1594913-1-hongtao.liu@intel.com/mbox/"},{"id":135106,"url":"https://patchwork.plctlab.org/api/1.2/patches/135106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com/","msgid":"<89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T02:53:44","name":"RISC-V: Deduplicate #error messages in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135113,"url":"https://patchwork.plctlab.org/api/1.2/patches/135113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814032909.1898090-1-pan2.li@intel.com/","msgid":"<20230814032909.1898090-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T03:29:09","name":"[v1] RISC-V: Support RVV VFWMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814032909.1898090-1-pan2.li@intel.com/mbox/"},{"id":135120,"url":"https://patchwork.plctlab.org/api/1.2/patches/135120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-1-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:02","name":"[v1,1/6] LoongArch: a symmetric multilib subdir layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-1-yangyujie@loongson.cn/mbox/"},{"id":135117,"url":"https://patchwork.plctlab.org/api/1.2/patches/135117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-2-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:03","name":"[v1,2/6] LoongArch: improved target configuration interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-2-yangyujie@loongson.cn/mbox/"},{"id":135116,"url":"https://patchwork.plctlab.org/api/1.2/patches/135116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-3-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:04","name":"[v1,3/6] LoongArch: define preprocessing macros \"__loongarch_{arch, tune}\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-3-yangyujie@loongson.cn/mbox/"},{"id":135118,"url":"https://patchwork.plctlab.org/api/1.2/patches/135118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-4-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:05","name":"[v1,4/6] LoongArch: use -mstrict-align by default when building libraries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-4-yangyujie@loongson.cn/mbox/"},{"id":135115,"url":"https://patchwork.plctlab.org/api/1.2/patches/135115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-5-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:06","name":"[v1,5/6] LoongArch: export headers for building GCC plugins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-5-yangyujie@loongson.cn/mbox/"},{"id":135119,"url":"https://patchwork.plctlab.org/api/1.2/patches/135119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-6-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-6-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:07","name":"[v1,6/6] LoongArch: support loongarch*-elf target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-6-yangyujie@loongson.cn/mbox/"},{"id":135121,"url":"https://patchwork.plctlab.org/api/1.2/patches/135121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814043747.2877403-1-lili.cui@intel.com/","msgid":"<20230814043747.2877403-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-08-14T04:37:47","name":"x86: Update model values for Raptorlake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814043747.2877403-1-lili.cui@intel.com/mbox/"},{"id":135128,"url":"https://patchwork.plctlab.org/api/1.2/patches/135128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com/","msgid":"<644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T05:32:09","name":"[1/2] RISC-V: Add support for the '\''Zfa'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135129,"url":"https://patchwork.plctlab.org/api/1.2/patches/135129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16370ade4886697b0ed46ebf2d7835b89ab8cc2.1691991126.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T05:32:10","name":"[2/2] RISC-V: Constant FP Optimization with '\''Zfa'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16370ade4886697b0ed46ebf2d7835b89ab8cc2.1691991126.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135132,"url":"https://patchwork.plctlab.org/api/1.2/patches/135132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-1-guojiufu@linux.ibm.com/","msgid":"<20230814054156.2068718-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T05:41:55","name":"[1/2] light expander sra v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-1-guojiufu@linux.ibm.com/mbox/"},{"id":135133,"url":"https://patchwork.plctlab.org/api/1.2/patches/135133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-2-guojiufu@linux.ibm.com/","msgid":"<20230814054156.2068718-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T05:41:56","name":"[2/2] combine nonconstant_array walker and expander_sra walker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-2-guojiufu@linux.ibm.com/mbox/"},{"id":135135,"url":"https://patchwork.plctlab.org/api/1.2/patches/135135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814055033.1995-1-jinma@linux.alibaba.com/","msgid":"<20230814055033.1995-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-14T05:50:33","name":"[v10] RISC-V: Add support for the Zfa extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814055033.1995-1-jinma@linux.alibaba.com/mbox/"},{"id":135138,"url":"https://patchwork.plctlab.org/api/1.2/patches/135138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814060702.4078649-1-pan2.li@intel.com/","msgid":"<20230814060702.4078649-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T06:07:02","name":"[v1] RISC-V: Support RVV VFWNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814060702.4078649-1-pan2.li@intel.com/mbox/"},{"id":135143,"url":"https://patchwork.plctlab.org/api/1.2/patches/135143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c79e0c5a7c28518b41ac5d33c7817d921c91fadd.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T06:09:51","name":"[v2,1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c79e0c5a7c28518b41ac5d33c7817d921c91fadd.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135144,"url":"https://patchwork.plctlab.org/api/1.2/patches/135144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"<0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T06:09:52","name":"[v2,2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135142,"url":"https://patchwork.plctlab.org/api/1.2/patches/135142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"<3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T06:09:53","name":"[v2,3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135156,"url":"https://patchwork.plctlab.org/api/1.2/patches/135156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814064513.157363-1-juzhe.zhong@rivai.ai/","msgid":"<20230814064513.157363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T06:45:13","name":"VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814064513.157363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135186,"url":"https://patchwork.plctlab.org/api/1.2/patches/135186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814073902.722885-1-pan2.li@intel.com/","msgid":"<20230814073902.722885-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T07:39:02","name":"[v1] RISC-V: Support RVV VFSQRT rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814073902.722885-1-pan2.li@intel.com/mbox/"},{"id":135221,"url":"https://patchwork.plctlab.org/api/1.2/patches/135221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814083705.AA2713858C31@sourceware.org/","msgid":"<20230814083705.AA2713858C31@sourceware.org>","list_archive_url":null,"date":"2023-08-14T08:35:49","name":"Fix print_loop_info ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814083705.AA2713858C31@sourceware.org/mbox/"},{"id":135238,"url":"https://patchwork.plctlab.org/api/1.2/patches/135238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfdd58d9-577b-ea7b-d9fc-57ff565f5866@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T08:52:03","name":"vect: Remove several useless VMAT_INVARIANT checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfdd58d9-577b-ea7b-d9fc-57ff565f5866@linux.ibm.com/mbox/"},{"id":135239,"url":"https://patchwork.plctlab.org/api/1.2/patches/135239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39e934e-869e-840d-eb7a-5b2de24146a8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T08:54:47","name":"vect: Move VMAT_LOAD_STORE_LANES handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39e934e-869e-840d-eb7a-5b2de24146a8@linux.ibm.com/mbox/"},{"id":135240,"url":"https://patchwork.plctlab.org/api/1.2/patches/135240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com/","msgid":"<7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T08:59:11","name":"vect: Move VMAT_GATHER_SCATTER handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com/mbox/"},{"id":135283,"url":"https://patchwork.plctlab.org/api/1.2/patches/135283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814094218.3286920-1-juzhe.zhong@rivai.ai/","msgid":"<20230814094218.3286920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T09:42:18","name":"genrecog: Add SUBREG_BYTE.to_constant check to the genrecog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814094218.3286920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135297,"url":"https://patchwork.plctlab.org/api/1.2/patches/135297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se/","msgid":"<3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se>","list_archive_url":null,"date":"2023-08-14T09:57:09","name":"Fix for bug libstdc++/110860","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se/mbox/"},{"id":135349,"url":"https://patchwork.plctlab.org/api/1.2/patches/135349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814112255.2071-1-jinma@linux.alibaba.com/","msgid":"<20230814112255.2071-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-14T11:22:55","name":"[v2] In the pipeline, USE or CLOBBER should delay execution if it starts a new live range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814112255.2071-1-jinma@linux.alibaba.com/mbox/"},{"id":135369,"url":"https://patchwork.plctlab.org/api/1.2/patches/135369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814121527.3482525-1-juzhe.zhong@rivai.ai/","msgid":"<20230814121527.3482525-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T12:15:27","name":"RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814121527.3482525-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135401,"url":"https://patchwork.plctlab.org/api/1.2/patches/135401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814124923.3108452-1-pan2.li@intel.com/","msgid":"<20230814124923.3108452-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T12:49:23","name":"[v1] RISC-V: Support RVV VFREC7 rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814124923.3108452-1-pan2.li@intel.com/mbox/"},{"id":135418,"url":"https://patchwork.plctlab.org/api/1.2/patches/135418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814132958.A6644385840B@sourceware.org/","msgid":"<20230814132958.A6644385840B@sourceware.org>","list_archive_url":null,"date":"2023-08-14T13:29:15","name":"tree-optimization/110991 - unroll size estimate after vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814132958.A6644385840B@sourceware.org/mbox/"},{"id":135465,"url":"https://patchwork.plctlab.org/api/1.2/patches/135465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com/","msgid":"<56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com>","list_archive_url":null,"date":"2023-08-14T14:15:52","name":"[GCC] aarch64: Add support for Cortex-A720 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com/mbox/"},{"id":135481,"url":"https://patchwork.plctlab.org/api/1.2/patches/135481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814144651.3437687-1-pan2.li@intel.com/","msgid":"<20230814144651.3437687-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T14:46:51","name":"[v2] RISC-V: Support RVV VFREC7 rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814144651.3437687-1-pan2.li@intel.com/mbox/"},{"id":135523,"url":"https://patchwork.plctlab.org/api/1.2/patches/135523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814154853.2371420-1-vultkayn@gcc.gnu.org/","msgid":"<20230814154853.2371420-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-14T15:48:55","name":"[v2] analyzer: New option fanalyzer-show-events-in-system-headers [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814154853.2371420-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135527,"url":"https://patchwork.plctlab.org/api/1.2/patches/135527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNpPecZj12tk5zbn@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-14T15:59:53","name":"Avoid division by zero in fold_loop_internal_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNpPecZj12tk5zbn@kam.mff.cuni.cz/mbox/"},{"id":135575,"url":"https://patchwork.plctlab.org/api/1.2/patches/135575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814173312.14980-1-jason@redhat.com/","msgid":"<20230814173312.14980-1-jason@redhat.com>","list_archive_url":null,"date":"2023-08-14T17:33:12","name":"[pushed] c++: -fconcepts and __cpp_concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814173312.14980-1-jason@redhat.com/mbox/"},{"id":135582,"url":"https://patchwork.plctlab.org/api/1.2/patches/135582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jl1cyky.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-14T17:39:57","name":"Fortran: Avoid accessing gfc_charlen when not looking at BT_CHARACTER (PR 110677)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jl1cyky.fsf@suse.cz/mbox/"},{"id":135584,"url":"https://patchwork.plctlab.org/api/1.2/patches/135584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814180105.1812551-1-christophe.lyon@linaro.org/","msgid":"<20230814180105.1812551-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:01:05","name":"arm: [MVE intrinsics] fix binary_acca_int32 and binary_acca_int64 shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814180105.1812551-1-christophe.lyon@linaro.org/mbox/"},{"id":135585,"url":"https://patchwork.plctlab.org/api/1.2/patches/135585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814181005.1905319-1-christophe.lyon@linaro.org/","msgid":"<20230814181005.1905319-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:10:05","name":"arm: [MVE intrinsics] Remove dead check for float type in parse_element_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814181005.1905319-1-christophe.lyon@linaro.org/mbox/"},{"id":135588,"url":"https://patchwork.plctlab.org/api/1.2/patches/135588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-1-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:14","name":"[1/9] arm: [MVE intrinsics] factorize vmullbq vmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-1-christophe.lyon@linaro.org/mbox/"},{"id":135589,"url":"https://patchwork.plctlab.org/api/1.2/patches/135589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-2-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:15","name":"[2/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-2-christophe.lyon@linaro.org/mbox/"},{"id":135592,"url":"https://patchwork.plctlab.org/api/1.2/patches/135592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-3-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:16","name":"[3/9] arm: [MVE intrinsics] add binary_widen shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-3-christophe.lyon@linaro.org/mbox/"},{"id":135595,"url":"https://patchwork.plctlab.org/api/1.2/patches/135595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-4-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:17","name":"[4/9] arm: [MVE intrinsics] rework vmullbq_int vmulltq_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-4-christophe.lyon@linaro.org/mbox/"},{"id":135590,"url":"https://patchwork.plctlab.org/api/1.2/patches/135590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-5-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:18","name":"[5/9] arm: [MVE intrinsics] add support for p8 and p16 polynomial types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-5-christophe.lyon@linaro.org/mbox/"},{"id":135591,"url":"https://patchwork.plctlab.org/api/1.2/patches/135591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-6-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:19","name":"[6/9] arm: [MVE intrinsics] add support for U and p formats in parse_element_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-6-christophe.lyon@linaro.org/mbox/"},{"id":135593,"url":"https://patchwork.plctlab.org/api/1.2/patches/135593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-7-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-7-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:20","name":"[7/9] arm: [MVE intrinsics] add binary_widen_poly shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-7-christophe.lyon@linaro.org/mbox/"},{"id":135594,"url":"https://patchwork.plctlab.org/api/1.2/patches/135594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-8-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-8-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:21","name":"[8/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull_poly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-8-christophe.lyon@linaro.org/mbox/"},{"id":135596,"url":"https://patchwork.plctlab.org/api/1.2/patches/135596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-9-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-9-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:22","name":"[9/9] arm: [MVE intrinsics] rework vmullbq_poly vmulltq_poly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-9-christophe.lyon@linaro.org/mbox/"},{"id":135600,"url":"https://patchwork.plctlab.org/api/1.2/patches/135600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com/","msgid":"<780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com>","list_archive_url":null,"date":"2023-08-14T20:14:39","name":"[pushed,LRA] : Process output stack pointer reloads before emitting reload insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com/mbox/"},{"id":135606,"url":"https://patchwork.plctlab.org/api/1.2/patches/135606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-2-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:32","name":"[v4,1/6] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-2-panchenghui@loongson.cn/mbox/"},{"id":135604,"url":"https://patchwork.plctlab.org/api/1.2/patches/135604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-3-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:33","name":"[v4,2/6] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-3-panchenghui@loongson.cn/mbox/"},{"id":135605,"url":"https://patchwork.plctlab.org/api/1.2/patches/135605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-4-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:34","name":"[v4,3/6] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-4-panchenghui@loongson.cn/mbox/"},{"id":135602,"url":"https://patchwork.plctlab.org/api/1.2/patches/135602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-5-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:35","name":"[v4,4/6] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-5-panchenghui@loongson.cn/mbox/"},{"id":135607,"url":"https://patchwork.plctlab.org/api/1.2/patches/135607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-6-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:36","name":"[v4,5/6] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-6-panchenghui@loongson.cn/mbox/"},{"id":135603,"url":"https://patchwork.plctlab.org/api/1.2/patches/135603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-7-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:37","name":"[v4,6/6] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-7-panchenghui@loongson.cn/mbox/"},{"id":135614,"url":"https://patchwork.plctlab.org/api/1.2/patches/135614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815025525.3437008-1-pan2.li@intel.com/","msgid":"<20230815025525.3437008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T02:55:25","name":"[v1] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815025525.3437008-1-pan2.li@intel.com/mbox/"},{"id":135615,"url":"https://patchwork.plctlab.org/api/1.2/patches/135615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com/","msgid":"<85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com>","list_archive_url":null,"date":"2023-08-15T03:13:08","name":"Makefile.in: Make recog.h depend on $(TREE_H)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com/mbox/"},{"id":135619,"url":"https://patchwork.plctlab.org/api/1.2/patches/135619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815045704.30B3A2042C@pchp3.se.axis.com/","msgid":"<20230815045704.30B3A2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-15T04:57:04","name":"CRIS: Don'\''t include tree.h in cris-protos.h, PR bootstrap/111021","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815045704.30B3A2042C@pchp3.se.axis.com/mbox/"},{"id":135620,"url":"https://patchwork.plctlab.org/api/1.2/patches/135620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815050146.204188-1-pan2.li@intel.com/","msgid":"<20230815050146.204188-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T05:01:46","name":"[v1] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815050146.204188-1-pan2.li@intel.com/mbox/"},{"id":135622,"url":"https://patchwork.plctlab.org/api/1.2/patches/135622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815051952.6488F203F1@pchp3.se.axis.com/","msgid":"<20230815051952.6488F203F1@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-15T05:19:52","name":"[v2] CRIS: Don'\''t include tree.h in cris-protos.h, PR bootstrap/111021","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815051952.6488F203F1@pchp3.se.axis.com/mbox/"},{"id":135624,"url":"https://patchwork.plctlab.org/api/1.2/patches/135624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815064807.1314281-1-pan2.li@intel.com/","msgid":"<20230815064807.1314281-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T06:48:07","name":"[v1] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815064807.1314281-1-pan2.li@intel.com/mbox/"},{"id":135629,"url":"https://patchwork.plctlab.org/api/1.2/patches/135629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815080147.1986255-1-pan2.li@intel.com/","msgid":"<20230815080147.1986255-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T08:01:47","name":"[v1] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815080147.1986255-1-pan2.li@intel.com/mbox/"},{"id":135632,"url":"https://patchwork.plctlab.org/api/1.2/patches/135632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815083452.90040385700D@sourceware.org/","msgid":"<20230815083452.90040385700D@sourceware.org>","list_archive_url":null,"date":"2023-08-15T08:34:01","name":"Use find_loop_location from unrolling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815083452.90040385700D@sourceware.org/mbox/"},{"id":135636,"url":"https://patchwork.plctlab.org/api/1.2/patches/135636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815090730.2537591-1-pan2.li@intel.com/","msgid":"<20230815090730.2537591-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T09:07:30","name":"[v1] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815090730.2537591-1-pan2.li@intel.com/mbox/"},{"id":135645,"url":"https://patchwork.plctlab.org/api/1.2/patches/135645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815103943.21417-1-chenxiaolong@loongson.cn/","msgid":"<20230815103943.21417-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-15T10:39:43","name":"[v3] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815103943.21417-1-chenxiaolong@loongson.cn/mbox/"},{"id":135652,"url":"https://patchwork.plctlab.org/api/1.2/patches/135652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815121050.F2D9B3856DD0@sourceware.org/","msgid":"<20230815121050.F2D9B3856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-15T12:10:06","name":"Support constants and externals in BB reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815121050.F2D9B3856DD0@sourceware.org/mbox/"},{"id":135654,"url":"https://patchwork.plctlab.org/api/1.2/patches/135654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815122917.270596-1-juzhe.zhong@rivai.ai/","msgid":"<20230815122917.270596-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-15T12:29:17","name":"[V2] VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815122917.270596-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135659,"url":"https://patchwork.plctlab.org/api/1.2/patches/135659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815132829.57DF13856DD0@sourceware.org/","msgid":"<20230815132829.57DF13856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-15T13:27:42","name":"Cleanup BB vectorization roots handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815132829.57DF13856DD0@sourceware.org/mbox/"},{"id":135660,"url":"https://patchwork.plctlab.org/api/1.2/patches/135660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815133728.EE0D23856964@sourceware.org/","msgid":"<20230815133728.EE0D23856964@sourceware.org>","list_archive_url":null,"date":"2023-08-15T13:36:40","name":"Handle TYPE_OVERFLOW_UNDEFINED vectorized BB reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815133728.EE0D23856964@sourceware.org/mbox/"},{"id":135661,"url":"https://patchwork.plctlab.org/api/1.2/patches/135661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXNSpt28jn-ZG-kMHBNJSHKoY2wBkgF1Y-FarcrKeBePA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T13:41:58","name":"[v4] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXNSpt28jn-ZG-kMHBNJSHKoY2wBkgF1Y-FarcrKeBePA@mail.gmail.com/mbox/"},{"id":135665,"url":"https://patchwork.plctlab.org/api/1.2/patches/135665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com/","msgid":"<4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com>","list_archive_url":null,"date":"2023-08-15T14:02:40","name":"IFN: Fix vector extraction into promoted subreg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com/mbox/"},{"id":135667,"url":"https://patchwork.plctlab.org/api/1.2/patches/135667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jztwcr05.fsf@euler.schwinge.homeip.net/","msgid":"<87jztwcr05.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-08-15T14:35:54","name":"[v3] OpenACC 2.7: default clause support for data constructs (was: [PATCH, OpenACC 2.7, v2] Implement default clause support for data constructs)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jztwcr05.fsf@euler.schwinge.homeip.net/mbox/"},{"id":135669,"url":"https://patchwork.plctlab.org/api/1.2/patches/135669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815151804.3588843-1-ibuclaw@gdcproject.org/","msgid":"<20230815151804.3588843-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-08-15T15:18:04","name":"[committed,GCC,12] d: Fix internal compiler error: in layout_aggregate_type, at d/types.cc:574","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815151804.3588843-1-ibuclaw@gdcproject.org/mbox/"},{"id":135674,"url":"https://patchwork.plctlab.org/api/1.2/patches/135674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3b347e3-55fc-ab4d-14c2-0c372167be34@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T15:49:42","name":"RISC-V: Fix reduc_strict_run-1 test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3b347e3-55fc-ab4d-14c2-0c372167be34@gmail.com/mbox/"},{"id":135675,"url":"https://patchwork.plctlab.org/api/1.2/patches/135675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2bf61f6-08a5-f21d-8cc3-3054c0d444ce@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T15:55:20","name":"[v2,GCC] aarch64: Add support for Cortex-A720 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2bf61f6-08a5-f21d-8cc3-3054c0d444ce@arm.com/mbox/"},{"id":135683,"url":"https://patchwork.plctlab.org/api/1.2/patches/135683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815172029.63-1-romain.geissler@amadeus.com/","msgid":"<20230815172029.63-1-romain.geissler@amadeus.com>","list_archive_url":null,"date":"2023-08-15T17:20:30","name":"[gcc,11,backport] Support ld.mold linker.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815172029.63-1-romain.geissler@amadeus.com/mbox/"},{"id":135685,"url":"https://patchwork.plctlab.org/api/1.2/patches/135685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815182913.2824479-1-ewlu@rivosinc.com/","msgid":"<20230815182913.2824479-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-15T18:29:10","name":"[V3] riscv: generate builtin macro for compilation with strict alignment:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815182913.2824479-1-ewlu@rivosinc.com/mbox/"},{"id":135686,"url":"https://patchwork.plctlab.org/api/1.2/patches/135686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815183208.330060-1-vultkayn@gcc.gnu.org/","msgid":"<20230815183208.330060-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-15T18:32:09","name":"testsuite: Remove unused dg-line in ce8cdf5bcf96a2db6d7b9f656fc9ba58d7942a83","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815183208.330060-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135688,"url":"https://patchwork.plctlab.org/api/1.2/patches/135688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184618.7396-1-david.faust@oracle.com/","msgid":"<20230815184618.7396-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-15T18:46:18","name":"bpf: fix pseudoc w regs for small modes [PR111029]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184618.7396-1-david.faust@oracle.com/mbox/"},{"id":135689,"url":"https://patchwork.plctlab.org/api/1.2/patches/135689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184908.7474-1-david.faust@oracle.com/","msgid":"<20230815184908.7474-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-15T18:49:08","name":"bpf: remove useless define_insn for extendsisi2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184908.7474-1-david.faust@oracle.com/mbox/"},{"id":135694,"url":"https://patchwork.plctlab.org/api/1.2/patches/135694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193630.ltkwpmezkmw4rade@lug-owl.de/","msgid":"<20230815193630.ltkwpmezkmw4rade@lug-owl.de>","list_archive_url":null,"date":"2023-08-15T19:36:30","name":"config-list.mk i686-solaris2.11: Use --with-gnu-as","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193630.ltkwpmezkmw4rade@lug-owl.de/mbox/"},{"id":135695,"url":"https://patchwork.plctlab.org/api/1.2/patches/135695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193635.6lk7kqqjzkbfh22w@lug-owl.de/","msgid":"<20230815193635.6lk7kqqjzkbfh22w@lug-owl.de>","list_archive_url":null,"date":"2023-08-15T19:36:35","name":"config-list.mk Darwin: Use --with-gnu-as","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193635.6lk7kqqjzkbfh22w@lug-owl.de/mbox/"},{"id":135707,"url":"https://patchwork.plctlab.org/api/1.2/patches/135707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816010253.860803-1-thiago.bauermann@linaro.org/","msgid":"<20230816010253.860803-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-16T01:02:53","name":"Remove XFAIL from gcc/testsuite/gcc.dg/unroll-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816010253.860803-1-thiago.bauermann@linaro.org/mbox/"},{"id":135708,"url":"https://patchwork.plctlab.org/api/1.2/patches/135708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014519.3053770-1-juzhe.zhong@rivai.ai/","msgid":"<20230816014519.3053770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T01:45:19","name":"[V2] RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014519.3053770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135709,"url":"https://patchwork.plctlab.org/api/1.2/patches/135709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014822.20018-1-guojie@loongson.cn/","msgid":"<20230816014822.20018-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-08-16T01:48:22","name":"Loongarch: Fix plugin header missing install.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014822.20018-1-guojie@loongson.cn/mbox/"},{"id":135714,"url":"https://patchwork.plctlab.org/api/1.2/patches/135714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e94df26f-39d2-4426-3fd1-f88946f34378@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T02:31:11","name":"Makefile.in: Add variable TM_P_H2 for TM_P_H dependency [PR111021]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e94df26f-39d2-4426-3fd1-f88946f34378@linux.ibm.com/mbox/"},{"id":135720,"url":"https://patchwork.plctlab.org/api/1.2/patches/135720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816051756.3827494-1-pan2.li@intel.com/","msgid":"<20230816051756.3827494-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T05:17:56","name":"[v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816051756.3827494-1-pan2.li@intel.com/mbox/"},{"id":135726,"url":"https://patchwork.plctlab.org/api/1.2/patches/135726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816062057.379965-1-pan2.li@intel.com/","msgid":"<20230816062057.379965-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T06:20:57","name":"[v2] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816062057.379965-1-pan2.li@intel.com/mbox/"},{"id":135729,"url":"https://patchwork.plctlab.org/api/1.2/patches/135729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816065055.653158-1-pan2.li@intel.com/","msgid":"<20230816065055.653158-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T06:50:55","name":"[v2] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816065055.653158-1-pan2.li@intel.com/mbox/"},{"id":135732,"url":"https://patchwork.plctlab.org/api/1.2/patches/135732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816073227.934463-1-pan2.li@intel.com/","msgid":"<20230816073227.934463-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T07:32:27","name":"[v2] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816073227.934463-1-pan2.li@intel.com/mbox/"},{"id":135735,"url":"https://patchwork.plctlab.org/api/1.2/patches/135735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816081007.1211587-1-pan2.li@intel.com/","msgid":"<20230816081007.1211587-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T08:10:07","name":"[v2] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816081007.1211587-1-pan2.li@intel.com/mbox/"},{"id":135736,"url":"https://patchwork.plctlab.org/api/1.2/patches/135736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816084038.2725233-1-yanzhang.wang@intel.com/","msgid":"<20230816084038.2725233-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-08-16T08:40:38","name":"RISC-V: Support simplify (-1-x) for vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816084038.2725233-1-yanzhang.wang@intel.com/mbox/"},{"id":135739,"url":"https://patchwork.plctlab.org/api/1.2/patches/135739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816094359.2230366-1-pan2.li@intel.com/","msgid":"<20230816094359.2230366-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T09:43:59","name":"[v1] RISC-V: Fix one build error for template default arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816094359.2230366-1-pan2.li@intel.com/mbox/"},{"id":135765,"url":"https://patchwork.plctlab.org/api/1.2/patches/135765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816121909.53047-1-vultkayn@gcc.gnu.org/","msgid":"<20230816121909.53047-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-16T12:19:11","name":"[WIP,RFC,v2] analyzer: Add support of placement new and improved operator new [PR105948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816121909.53047-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135756,"url":"https://patchwork.plctlab.org/api/1.2/patches/135756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816125418.534962-1-pan2.li@intel.com/","msgid":"<20230816125418.534962-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T12:54:18","name":"[v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816125418.534962-1-pan2.li@intel.com/mbox/"},{"id":135758,"url":"https://patchwork.plctlab.org/api/1.2/patches/135758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816131205.233568-1-juzhe.zhong@rivai.ai/","msgid":"<20230816131205.233568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T13:12:05","name":"gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816131205.233568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135760,"url":"https://patchwork.plctlab.org/api/1.2/patches/135760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816132010.3628851-1-juzhe.zhong@rivai.ai/","msgid":"<20230816132010.3628851-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T13:20:10","name":"RISC-V: Add COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816132010.3628851-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135791,"url":"https://patchwork.plctlab.org/api/1.2/patches/135791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3fa64e0-bc2c-0c14-9062-d6f5c1690637@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T16:13:41","name":"[pushed,LRA] : Spill pseudos assigned to fp when fp->sp elimination became impossible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3fa64e0-bc2c-0c14-9062-d6f5c1690637@redhat.com/mbox/"},{"id":135793,"url":"https://patchwork.plctlab.org/api/1.2/patches/135793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816162354.658102-1-jwakely@redhat.com/","msgid":"<20230816162354.658102-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T16:23:45","name":"[committed] libstdc++: Fix comment naming upstream PSTL test file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816162354.658102-1-jwakely@redhat.com/mbox/"},{"id":135794,"url":"https://patchwork.plctlab.org/api/1.2/patches/135794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfS94kca5MUXS=DQaoLqeCsEY57bwo=JVz8wrn2sb4Z=Dg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T16:32:07","name":"libgccjit: Add support for `restrict` attribute on function parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfS94kca5MUXS=DQaoLqeCsEY57bwo=JVz8wrn2sb4Z=Dg@mail.gmail.com/mbox/"},{"id":135807,"url":"https://patchwork.plctlab.org/api/1.2/patches/135807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190338.709392-1-jwakely@redhat.com/","msgid":"<20230816190338.709392-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T19:03:17","name":"[committed] libstdc++: Update __cplusplus value for C++23 in version.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190338.709392-1-jwakely@redhat.com/mbox/"},{"id":135808,"url":"https://patchwork.plctlab.org/api/1.2/patches/135808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190453.709520-1-jwakely@redhat.com/","msgid":"<20230816190453.709520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T19:04:07","name":"[committed] libstdc++: Fix std::basic_string::resize_and_overwrite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190453.709520-1-jwakely@redhat.com/mbox/"},{"id":135809,"url":"https://patchwork.plctlab.org/api/1.2/patches/135809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf8ils0z.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-16T19:13:32","name":"build: Allow for Xcode 15 ld -v output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf8ils0z.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":135810,"url":"https://patchwork.plctlab.org/api/1.2/patches/135810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7j6lrpg.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-16T19:20:27","name":"fixincludes: Update darwin_flt_eval_method for macOS 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7j6lrpg.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":135817,"url":"https://patchwork.plctlab.org/api/1.2/patches/135817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0bfd1a02-eb97-4ceb-b34f-3f54b3c5cc2b-1692217001603@3c-app-gmx-bap14/","msgid":"","list_archive_url":null,"date":"2023-08-16T20:16:41","name":"[committed] Fortran: fix memleak for character,value dummy of bind(c) procedure [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0bfd1a02-eb97-4ceb-b34f-3f54b3c5cc2b-1692217001603@3c-app-gmx-bap14/mbox/"},{"id":135819,"url":"https://patchwork.plctlab.org/api/1.2/patches/135819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816202324.90806-1-slyich@gmail.com/","msgid":"<20230816202324.90806-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-08-16T20:23:24","name":"Drop unused enum vrp_mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816202324.90806-1-slyich@gmail.com/mbox/"},{"id":135830,"url":"https://patchwork.plctlab.org/api/1.2/patches/135830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816223513.3084770-1-apinski@marvell.com/","msgid":"<20230816223513.3084770-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-16T22:35:13","name":"Add libstdc++-v3/include/bits/version.h to gcc_update touch part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816223513.3084770-1-apinski@marvell.com/mbox/"},{"id":135835,"url":"https://patchwork.plctlab.org/api/1.2/patches/135835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816231403.321156-1-patrick@rivosinc.com/","msgid":"<20230816231403.321156-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-16T23:14:03","name":"RISC-V: Add rotate immediate regression test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816231403.321156-1-patrick@rivosinc.com/mbox/"},{"id":135836,"url":"https://patchwork.plctlab.org/api/1.2/patches/135836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com/","msgid":"<1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-17T00:19:21","name":"[ver,2] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com/mbox/"},{"id":135837,"url":"https://patchwork.plctlab.org/api/1.2/patches/135837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817011729.324315-1-patrick@rivosinc.com/","msgid":"<20230817011729.324315-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-17T01:17:29","name":"[v2] RISCV: Add rotate immediate regression test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817011729.324315-1-patrick@rivosinc.com/mbox/"},{"id":135838,"url":"https://patchwork.plctlab.org/api/1.2/patches/135838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817012302.2771487-1-pan2.li@intel.com/","msgid":"<20230817012302.2771487-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T01:23:02","name":"[v1] RISC-V: Support RVV VFNCVT.XU.F.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817012302.2771487-1-pan2.li@intel.com/mbox/"},{"id":135839,"url":"https://patchwork.plctlab.org/api/1.2/patches/135839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817013733.3093010-1-apinski@marvell.com/","msgid":"<20230817013733.3093010-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-17T01:37:33","name":"MATCH: Sink convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817013733.3093010-1-apinski@marvell.com/mbox/"},{"id":135840,"url":"https://patchwork.plctlab.org/api/1.2/patches/135840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817021815.3062069-1-pan2.li@intel.com/","msgid":"<20230817021815.3062069-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T02:18:15","name":"[v1] RISC-V: Support RVV VFNCVT.F.{X|XU|F}.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817021815.3062069-1-pan2.li@intel.com/mbox/"},{"id":135842,"url":"https://patchwork.plctlab.org/api/1.2/patches/135842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817030829.3352171-1-pan2.li@intel.com/","msgid":"<20230817030829.3352171-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T03:08:29","name":"[v1] RISC-V: Support RVV VFREDUSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817030829.3352171-1-pan2.li@intel.com/mbox/"},{"id":135847,"url":"https://patchwork.plctlab.org/api/1.2/patches/135847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817055906.2843802-1-juzhe.zhong@rivai.ai/","msgid":"<20230817055906.2843802-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-17T05:59:06","name":"RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817055906.2843802-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135848,"url":"https://patchwork.plctlab.org/api/1.2/patches/135848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com/","msgid":"<1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com>","list_archive_url":null,"date":"2023-08-17T06:14:56","name":"Makefile.in: Make TM_P_H depend on $(TREE_H) [PR111021]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com/mbox/"},{"id":135849,"url":"https://patchwork.plctlab.org/api/1.2/patches/135849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f30054-581d-826a-bcf4-021e2f0407b6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T06:22:26","name":"vect: Factor out the handling on scatter store having gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f30054-581d-826a-bcf4-021e2f0407b6@linux.ibm.com/mbox/"},{"id":135850,"url":"https://patchwork.plctlab.org/api/1.2/patches/135850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817062303.3727727-1-pan2.li@intel.com/","msgid":"<20230817062303.3727727-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T06:23:03","name":"[v1] RISC-V: Support RVV VFREDOSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817062303.3727727-1-pan2.li@intel.com/mbox/"},{"id":135853,"url":"https://patchwork.plctlab.org/api/1.2/patches/135853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-2-haochen.jiang@intel.com/","msgid":"<20230817065509.130068-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-17T06:55:08","name":"[1/2,1/2] Support AVX10.1 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-2-haochen.jiang@intel.com/mbox/"},{"id":135852,"url":"https://patchwork.plctlab.org/api/1.2/patches/135852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-3-haochen.jiang@intel.com/","msgid":"<20230817065509.130068-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-17T06:55:09","name":"[2/2,2/2] Support AVX10.1 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-3-haochen.jiang@intel.com/mbox/"},{"id":135854,"url":"https://patchwork.plctlab.org/api/1.2/patches/135854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072052.w62bmpzkxyktplnb@lug-owl.de/","msgid":"<20230817072052.w62bmpzkxyktplnb@lug-owl.de>","list_archive_url":null,"date":"2023-08-17T07:20:52","name":"Fix code_helper unused argument warning for fr30","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072052.w62bmpzkxyktplnb@lug-owl.de/mbox/"},{"id":135855,"url":"https://patchwork.plctlab.org/api/1.2/patches/135855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072612.4026035-1-pan2.li@intel.com/","msgid":"<20230817072612.4026035-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T07:26:12","name":"[v1] RISC-V: Support RVV VFWREDOSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072612.4026035-1-pan2.li@intel.com/mbox/"},{"id":135857,"url":"https://patchwork.plctlab.org/api/1.2/patches/135857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074625.868621-1-jwakely@redhat.com/","msgid":"<20230817074625.868621-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T07:45:05","name":"[committed] libstdc++: Fix testsuite no_pch directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074625.868621-1-jwakely@redhat.com/mbox/"},{"id":135858,"url":"https://patchwork.plctlab.org/api/1.2/patches/135858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074719.868714-1-jwakely@redhat.com/","msgid":"<20230817074719.868714-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T07:46:27","name":"[committed] libstdc++: Disable PCH for tests that rely on include order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074719.868714-1-jwakely@redhat.com/mbox/"},{"id":135859,"url":"https://patchwork.plctlab.org/api/1.2/patches/135859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817075655.165144-1-lehua.ding@rivai.ai/","msgid":"<20230817075655.165144-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T07:56:55","name":"RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817075655.165144-1-lehua.ding@rivai.ai/mbox/"},{"id":135861,"url":"https://patchwork.plctlab.org/api/1.2/patches/135861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817080558.117051-1-pan2.li@intel.com/","msgid":"<20230817080558.117051-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T08:05:58","name":"[v1] RISC-V: Support RVV VFWREDUSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817080558.117051-1-pan2.li@intel.com/mbox/"},{"id":135870,"url":"https://patchwork.plctlab.org/api/1.2/patches/135870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com/","msgid":"<3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com>","list_archive_url":null,"date":"2023-08-17T10:30:58","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com/mbox/"},{"id":135871,"url":"https://patchwork.plctlab.org/api/1.2/patches/135871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com/","msgid":"<949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com>","list_archive_url":null,"date":"2023-08-17T10:31:26","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com/mbox/"},{"id":135872,"url":"https://patchwork.plctlab.org/api/1.2/patches/135872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZN34fH4L2SfD5smj@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T10:37:48","name":"doc: Fixes to RTL-SSA sample code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZN34fH4L2SfD5smj@arm.com/mbox/"},{"id":135873,"url":"https://patchwork.plctlab.org/api/1.2/patches/135873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlee9j4hr.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T11:24:48","name":"c: Add support for [[__extension__ ...]]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlee9j4hr.fsf_-_@arm.com/mbox/"},{"id":135875,"url":"https://patchwork.plctlab.org/api/1.2/patches/135875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817114320.3083675-1-lehua.ding@rivai.ai/","msgid":"<20230817114320.3083675-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T11:43:20","name":"RISC-V: Fix XPASS slp testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817114320.3083675-1-lehua.ding@rivai.ai/mbox/"},{"id":135878,"url":"https://patchwork.plctlab.org/api/1.2/patches/135878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122131.966663-1-jwakely@redhat.com/","msgid":"<20230817122131.966663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T12:20:25","name":"[committed] libstdc++: Regenerate Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122131.966663-1-jwakely@redhat.com/mbox/"},{"id":135879,"url":"https://patchwork.plctlab.org/api/1.2/patches/135879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122226.966809-1-jwakely@redhat.com/","msgid":"<20230817122226.966809-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T12:21:50","name":"[committed] libstdc++: Fix std::format(\"{:F}\", inf) to use uppercase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122226.966809-1-jwakely@redhat.com/mbox/"},{"id":135881,"url":"https://patchwork.plctlab.org/api/1.2/patches/135881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122923.3114045-1-lehua.ding@rivai.ai/","msgid":"<20230817122923.3114045-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T12:29:23","name":"[V2] RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122923.3114045-1-lehua.ding@rivai.ai/mbox/"},{"id":135882,"url":"https://patchwork.plctlab.org/api/1.2/patches/135882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124123.22274-1-jose.marchesi@oracle.com/","msgid":"<20230817124123.22274-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-17T12:41:23","name":"[COMMITTED] bpf: support `naked'\'' function attributes in BPF targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124123.22274-1-jose.marchesi@oracle.com/mbox/"},{"id":135883,"url":"https://patchwork.plctlab.org/api/1.2/patches/135883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124354.3137796-1-lehua.ding@rivai.ai/","msgid":"<20230817124354.3137796-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T12:43:54","name":"[V2] RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin or zhinxmin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124354.3137796-1-lehua.ding@rivai.ai/mbox/"},{"id":135885,"url":"https://patchwork.plctlab.org/api/1.2/patches/135885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817132734.99FE23857016@sourceware.org/","msgid":"<20230817132734.99FE23857016@sourceware.org>","list_archive_url":null,"date":"2023-08-17T13:26:51","name":"tree-optimization/111039 - abnormals and bit test merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817132734.99FE23857016@sourceware.org/mbox/"},{"id":135889,"url":"https://patchwork.plctlab.org/api/1.2/patches/135889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com/","msgid":"<9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com>","list_archive_url":null,"date":"2023-08-17T13:32:37","name":"[committed] libgomp: call numa_available first when using libnuma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com/mbox/"},{"id":135892,"url":"https://patchwork.plctlab.org/api/1.2/patches/135892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817140513.26888-1-jose.marchesi@oracle.com/","msgid":"<20230817140513.26888-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-17T14:05:13","name":"[V4] Add warning options -W[no-]compare-distinct-pointer-types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817140513.26888-1-jose.marchesi@oracle.com/mbox/"},{"id":135912,"url":"https://patchwork.plctlab.org/api/1.2/patches/135912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com/","msgid":"<8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com>","list_archive_url":null,"date":"2023-08-17T16:02:23","name":"[pushed,LRA] : When assigning stack slots to pseudos previously assigned to fp consider other spilled pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com/mbox/"},{"id":135924,"url":"https://patchwork.plctlab.org/api/1.2/patches/135924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8da8804e-be70-a023-253c-317327ff955d@redhat.com/","msgid":"<8da8804e-be70-a023-253c-317327ff955d@redhat.com>","list_archive_url":null,"date":"2023-08-17T17:40:03","name":"[COMMITTED] PR tree-optimization/111009 - Fix range-ops operator_addr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8da8804e-be70-a023-253c-317327ff955d@redhat.com/mbox/"},{"id":135934,"url":"https://patchwork.plctlab.org/api/1.2/patches/135934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817181308.122802-2-ishitatsuyuki@gmail.com/","msgid":"<20230817181308.122802-2-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-08-17T18:12:51","name":"RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817181308.122802-2-ishitatsuyuki@gmail.com/mbox/"},{"id":136080,"url":"https://patchwork.plctlab.org/api/1.2/patches/136080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817184031.92165-1-egallager@gcc.gnu.org/","msgid":"<20230817184031.92165-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-17T18:40:32","name":"improve error when /usr/include isn'\''t found [PR90835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817184031.92165-1-egallager@gcc.gnu.org/mbox/"},{"id":136081,"url":"https://patchwork.plctlab.org/api/1.2/patches/136081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817185942.93988-1-egallager@gcc.gnu.org/","msgid":"<20230817185942.93988-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-17T18:59:43","name":"improve error when /usr/include isn'\''t found [PR90835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817185942.93988-1-egallager@gcc.gnu.org/mbox/"},{"id":135940,"url":"https://patchwork.plctlab.org/api/1.2/patches/135940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817192554.3137209-1-apinski@marvell.com/","msgid":"<20230817192554.3137209-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-17T19:25:54","name":"Document cond_neg, cond_one_cmpl, cond_len_neg and cond_len_one_cmpl standard patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817192554.3137209-1-apinski@marvell.com/mbox/"},{"id":135941,"url":"https://patchwork.plctlab.org/api/1.2/patches/135941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203052.1131293-1-jwakely@redhat.com/","msgid":"<20230817203052.1131293-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:30:31","name":"[committed] libstdc++: Define std::string::resize_and_overwrite for C++11 and COW string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203052.1131293-1-jwakely@redhat.com/mbox/"},{"id":135942,"url":"https://patchwork.plctlab.org/api/1.2/patches/135942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203100.1131311-1-jwakely@redhat.com/","msgid":"<20230817203100.1131311-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:30:53","name":"[committed] libstdc++: Optimize std::to_string using std::string::resize_and_overwrite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203100.1131311-1-jwakely@redhat.com/mbox/"},{"id":135944,"url":"https://patchwork.plctlab.org/api/1.2/patches/135944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203107.1131333-1-jwakely@redhat.com/","msgid":"<20230817203107.1131333-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:01","name":"[committed] libstdc++: Implement std::to_string in terms of std::format (P2587R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203107.1131333-1-jwakely@redhat.com/mbox/"},{"id":135946,"url":"https://patchwork.plctlab.org/api/1.2/patches/135946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203118.1131359-1-jwakely@redhat.com/","msgid":"<20230817203118.1131359-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:08","name":"[committed] libstdc++: Rework std::format support for wchar_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203118.1131359-1-jwakely@redhat.com/mbox/"},{"id":135947,"url":"https://patchwork.plctlab.org/api/1.2/patches/135947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203136.1131390-1-jwakely@redhat.com/","msgid":"<20230817203136.1131390-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:19","name":"[committed] libstdc++: Simplify chrono::__units_suffix using std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203136.1131390-1-jwakely@redhat.com/mbox/"},{"id":135949,"url":"https://patchwork.plctlab.org/api/1.2/patches/135949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203151.1131407-1-jwakely@redhat.com/","msgid":"<20230817203151.1131407-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:37","name":"[committed] libstdc++: Make __cmp_cat::__unseq constructor consteval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203151.1131407-1-jwakely@redhat.com/mbox/"},{"id":135943,"url":"https://patchwork.plctlab.org/api/1.2/patches/135943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203200.1131474-1-jwakely@redhat.com/","msgid":"<20230817203200.1131474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:52","name":"[committed] libstdc++: Fix -Wunused-parameter in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203200.1131474-1-jwakely@redhat.com/mbox/"},{"id":135951,"url":"https://patchwork.plctlab.org/api/1.2/patches/135951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203213.1131496-1-jwakely@redhat.com/","msgid":"<20230817203213.1131496-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:01","name":"[committed] libstdc++: Define std::numeric_limits<_FloatNN> before C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203213.1131496-1-jwakely@redhat.com/mbox/"},{"id":135952,"url":"https://patchwork.plctlab.org/api/1.2/patches/135952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203218.1131547-1-jwakely@redhat.com/","msgid":"<20230817203218.1131547-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:14","name":"[committed] libstdc++: Add std::formatter specializations for extended float types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203218.1131547-1-jwakely@redhat.com/mbox/"},{"id":135945,"url":"https://patchwork.plctlab.org/api/1.2/patches/135945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203223.1131562-1-jwakely@redhat.com/","msgid":"<20230817203223.1131562-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:19","name":"[committed] libstdc++: Optimize std::string::assign(Iter, Iter) [PR110945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203223.1131562-1-jwakely@redhat.com/mbox/"},{"id":135948,"url":"https://patchwork.plctlab.org/api/1.2/patches/135948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203228.1131577-1-jwakely@redhat.com/","msgid":"<20230817203228.1131577-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:24","name":"[committed] libstdc++: Micro-optimize construction of named std::locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203228.1131577-1-jwakely@redhat.com/mbox/"},{"id":135950,"url":"https://patchwork.plctlab.org/api/1.2/patches/135950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203237.1131595-1-jwakely@redhat.com/","msgid":"<20230817203237.1131595-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:29","name":"[committed] libstdc++: Reuse double overload of __convert_to_v if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203237.1131595-1-jwakely@redhat.com/mbox/"},{"id":135962,"url":"https://patchwork.plctlab.org/api/1.2/patches/135962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817232843.1231279-1-jwakely@redhat.com/","msgid":"<20230817232843.1231279-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T23:28:10","name":"[committed] libstdc++: Replace global std::string objects in tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817232843.1231279-1-jwakely@redhat.com/mbox/"},{"id":135969,"url":"https://patchwork.plctlab.org/api/1.2/patches/135969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818023050.98368-1-thiago.bauermann@linaro.org/","msgid":"<20230818023050.98368-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-18T02:30:50","name":"testsuite: Improve test in dg-require-python-h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818023050.98368-1-thiago.bauermann@linaro.org/mbox/"},{"id":135971,"url":"https://patchwork.plctlab.org/api/1.2/patches/135971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025355.3280223-1-pan2.li@intel.com/","msgid":"<20230818025355.3280223-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-18T02:53:55","name":"[v1] RISC-V: Refactor RVV class by frm_op_type template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025355.3280223-1-pan2.li@intel.com/mbox/"},{"id":135972,"url":"https://patchwork.plctlab.org/api/1.2/patches/135972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025911.1281907-1-lehua.ding@rivai.ai/","msgid":"<20230818025911.1281907-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-18T02:59:11","name":"RISC-V: Fix -march error of zhinxmin testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025911.1281907-1-lehua.ding@rivai.ai/mbox/"},{"id":135975,"url":"https://patchwork.plctlab.org/api/1.2/patches/135975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818031818.2161842-1-lipeng.zhu@intel.com/","msgid":"<20230818031818.2161842-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-08-18T03:18:19","name":"[v6] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818031818.2161842-1-lipeng.zhu@intel.com/mbox/"},{"id":135977,"url":"https://patchwork.plctlab.org/api/1.2/patches/135977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com/","msgid":"<6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-18T03:52:09","name":"[1/2] RISC-V: Add quotes to #error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135978,"url":"https://patchwork.plctlab.org/api/1.2/patches/135978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a6e92e0a6293380c619392be305ab2d5d0108d.1692330726.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T03:52:10","name":"[2/2] RISC-V: Add quotes to #error messages (all)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a6e92e0a6293380c619392be305ab2d5d0108d.1692330726.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135984,"url":"https://patchwork.plctlab.org/api/1.2/patches/135984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818060131.1416714-1-haochen.jiang@intel.com/","msgid":"<20230818060131.1416714-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-18T06:01:31","name":"i386: Add AVX2 pragma wrapper for AVX512DQVL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818060131.1416714-1-haochen.jiang@intel.com/mbox/"},{"id":135985,"url":"https://patchwork.plctlab.org/api/1.2/patches/135985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818064249.2103051-1-hongtao.liu@intel.com/","msgid":"<20230818064249.2103051-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-18T06:42:49","name":"Support -march=gracemont","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818064249.2103051-1-hongtao.liu@intel.com/mbox/"},{"id":135988,"url":"https://patchwork.plctlab.org/api/1.2/patches/135988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074607.14799138F0@imap2.suse-dmz.suse.de/","msgid":"<20230818074607.14799138F0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-18T07:46:06","name":"tree-optimization/111048 - avoid flawed logic in fold_vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074607.14799138F0@imap2.suse-dmz.suse.de/mbox/"},{"id":135989,"url":"https://patchwork.plctlab.org/api/1.2/patches/135989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074943.41754-1-manos.anagnostakis@vrull.eu/","msgid":"<20230818074943.41754-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-08-18T07:49:43","name":"aarch64: Fine-grained ldp and stp policies with test-cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074943.41754-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":135993,"url":"https://patchwork.plctlab.org/api/1.2/patches/135993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818084437.1297460-1-jwakely@redhat.com/","msgid":"<20230818084437.1297460-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T08:44:16","name":"[committed] libstdc++: Fix incomplete rework of wchar_t support in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818084437.1297460-1-jwakely@redhat.com/mbox/"},{"id":136013,"url":"https://patchwork.plctlab.org/api/1.2/patches/136013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818113147.1360843-1-jwakely@redhat.com/","msgid":"<20230818113147.1360843-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T11:31:15","name":"[committed] libstdc++: Replace non-type-dependent uses of wchar_t in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818113147.1360843-1-jwakely@redhat.com/mbox/"},{"id":136014,"url":"https://patchwork.plctlab.org/api/1.2/patches/136014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818120755.28912-1-jose.marchesi@oracle.com/","msgid":"<20230818120755.28912-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-18T12:07:55","name":"[COMMITTED] bpf: bump maximum frame size limit to 32767 bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818120755.28912-1-jose.marchesi@oracle.com/mbox/"},{"id":136015,"url":"https://patchwork.plctlab.org/api/1.2/patches/136015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818130433.D4E24138F0@imap2.suse-dmz.suse.de/","msgid":"<20230818130433.D4E24138F0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-18T13:04:33","name":"tree-optimization/111019 - invariant motion and aliasing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818130433.D4E24138F0@imap2.suse-dmz.suse.de/mbox/"},{"id":136019,"url":"https://patchwork.plctlab.org/api/1.2/patches/136019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818135351.9177-1-jose.marchesi@oracle.com/","msgid":"<20230818135351.9177-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-18T13:53:51","name":"Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818135351.9177-1-jose.marchesi@oracle.com/mbox/"},{"id":136021,"url":"https://patchwork.plctlab.org/api/1.2/patches/136021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com/","msgid":"<6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com>","list_archive_url":null,"date":"2023-08-18T13:57:16","name":"RISC-V: Enable pressure-aware scheduling by default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com/mbox/"},{"id":136029,"url":"https://patchwork.plctlab.org/api/1.2/patches/136029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818154030.64004-1-aldyh@redhat.com/","msgid":"<20230818154030.64004-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-18T15:40:11","name":"[COMMITTED,irange] Return FALSE if updated bitmask is unchanged [PR110753]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818154030.64004-1-aldyh@redhat.com/mbox/"},{"id":136044,"url":"https://patchwork.plctlab.org/api/1.2/patches/136044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YnMqdb3uQD=FxmxNwfmdc6BxAU7F7ro7tS3vF-=Hs6sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T17:12:42","name":"[committed] : i386: Use PUNPCKL?? to implement vector extend and zero_extend for TARGET_SSE2 [PR111023]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YnMqdb3uQD=FxmxNwfmdc6BxAU7F7ro7tS3vF-=Hs6sw@mail.gmail.com/mbox/"},{"id":136045,"url":"https://patchwork.plctlab.org/api/1.2/patches/136045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07c94dde-f513-0177-51d7-05267694f383@codesourcery.com/","msgid":"<07c94dde-f513-0177-51d7-05267694f383@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:15:16","name":"omp-expand.cc: Fix wrong code with non-rectangular loop nest [PR111017]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07c94dde-f513-0177-51d7-05267694f383@codesourcery.com/mbox/"},{"id":136046,"url":"https://patchwork.plctlab.org/api/1.2/patches/136046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-2-sandra@codesourcery.com/","msgid":"<20230818173938.430758-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:35","name":"[OG13,committed,1/3] OpenMP: C++ attribute syntax fixes/testcases for \"metadirective\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-2-sandra@codesourcery.com/mbox/"},{"id":136048,"url":"https://patchwork.plctlab.org/api/1.2/patches/136048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-3-sandra@codesourcery.com/","msgid":"<20230818173938.430758-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:36","name":"[OG13,committed,2/3] OpenMP: C++ attribute syntax fixes/testcases for \"declare mapper\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-3-sandra@codesourcery.com/mbox/"},{"id":136047,"url":"https://patchwork.plctlab.org/api/1.2/patches/136047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-4-sandra@codesourcery.com/","msgid":"<20230818173938.430758-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:37","name":"[OG13,committed,3/3] OpenMP: C++ attribute syntax fixes/testcases for loop transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-4-sandra@codesourcery.com/mbox/"},{"id":136054,"url":"https://patchwork.plctlab.org/api/1.2/patches/136054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T19:32:03","name":"RISC-V/testsuite: Add missing conversion tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"},{"id":136055,"url":"https://patchwork.plctlab.org/api/1.2/patches/136055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com/","msgid":"<9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com>","list_archive_url":null,"date":"2023-08-18T19:37:06","name":"RISC-V: Allow immediates 17-31 for vector shift.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com/mbox/"},{"id":136063,"url":"https://patchwork.plctlab.org/api/1.2/patches/136063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edk05b4a.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-18T20:49:57","name":"ipa-sra: Allow IPA-SRA in presence of returns which will be removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edk05b4a.fsf@suse.cz/mbox/"},{"id":136071,"url":"https://patchwork.plctlab.org/api/1.2/patches/136071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com/","msgid":"<5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T22:47:47","name":"[v7,1/5] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136073,"url":"https://patchwork.plctlab.org/api/1.2/patches/136073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b96ae3b68fdc935bfd37f8343ba57e7058126c5d.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:48","name":"[v7,2/5] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b96ae3b68fdc935bfd37f8343ba57e7058126c5d.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136075,"url":"https://patchwork.plctlab.org/api/1.2/patches/136075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af21c299f712718395612cd364f401bc0fd08416.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:49","name":"[v7,3/5] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af21c299f712718395612cd364f401bc0fd08416.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136074,"url":"https://patchwork.plctlab.org/api/1.2/patches/136074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com/","msgid":"<81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T22:47:50","name":"[v7,4/5] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136072,"url":"https://patchwork.plctlab.org/api/1.2/patches/136072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b32f791688b577bf57cefb38ad16594d17975c6c.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:51","name":"[v7,5/5] OpenMP/OpenACC: Reorganise OMP map clause handling in gimplify.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b32f791688b577bf57cefb38ad16594d17975c6c.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136076,"url":"https://patchwork.plctlab.org/api/1.2/patches/136076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818225026.1399063-1-jwakely@redhat.com/","msgid":"<20230818225026.1399063-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T22:49:56","name":"[committed] libstdc++: Revert pre-C++23 support for 16-bit float types [PR111060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818225026.1399063-1-jwakely@redhat.com/mbox/"},{"id":136083,"url":"https://patchwork.plctlab.org/api/1.2/patches/136083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f08933c-d988-c806-6a75-c8a12574c268@iki.fi/","msgid":"<8f08933c-d988-c806-6a75-c8a12574c268@iki.fi>","list_archive_url":null,"date":"2023-08-19T08:01:18","name":"[Ada] Fix syntax errors in expect.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f08933c-d988-c806-6a75-c8a12574c268@iki.fi/mbox/"},{"id":136122,"url":"https://patchwork.plctlab.org/api/1.2/patches/136122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB650764FB1A89623419FE5833BB18A@DB9PR08MB6507.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-19T11:42:10","name":"[PING] arm: Remove unsigned variant of vcaddq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB650764FB1A89623419FE5833BB18A@DB9PR08MB6507.eurprd08.prod.outlook.com/mbox/"},{"id":136234,"url":"https://patchwork.plctlab.org/api/1.2/patches/136234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820072526.3283744-1-apinski@marvell.com/","msgid":"<20230820072526.3283744-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-20T07:25:26","name":"[PATCHv2/COMMITTED] MATCH: Sink convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820072526.3283744-1-apinski@marvell.com/mbox/"},{"id":136235,"url":"https://patchwork.plctlab.org/api/1.2/patches/136235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4a132c6ba0ae8f1b670ef83f42bd8f3983577d9.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-20T07:26:26","name":"[committed] fix misleading identation breaking bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4a132c6ba0ae8f1b670ef83f42bd8f3983577d9.camel@tugraz.at/mbox/"},{"id":136242,"url":"https://patchwork.plctlab.org/api/1.2/patches/136242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820092054.380256-1-ibuclaw@gdcproject.org/","msgid":"<20230820092054.380256-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-08-20T09:20:54","name":"[committed] d: Merge upstream dmd, druntime 26f049fb26, phobos 330d6a4fd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820092054.380256-1-ibuclaw@gdcproject.org/mbox/"},{"id":136273,"url":"https://patchwork.plctlab.org/api/1.2/patches/136273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-20T15:57:29","name":"[committed] i386: Micro-optimize ix86_expand_sse_extend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com/mbox/"},{"id":136302,"url":"https://patchwork.plctlab.org/api/1.2/patches/136302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010326.395043-1-juzhe.zhong@rivai.ai/","msgid":"<20230821010326.395043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:03:26","name":"RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010326.395043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136303,"url":"https://patchwork.plctlab.org/api/1.2/patches/136303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010453.3916192-1-juzhe.zhong@rivai.ai/","msgid":"<20230821010453.3916192-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:04:53","name":"LCM: Export 2 helpful functions as global for VSETVL PASS use in RISC-V backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010453.3916192-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136304,"url":"https://patchwork.plctlab.org/api/1.2/patches/136304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821011854.33004-1-yangyujie@loongson.cn/","msgid":"<20230821011854.33004-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-21T01:18:54","name":"LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821011854.33004-1-yangyujie@loongson.cn/mbox/"},{"id":136310,"url":"https://patchwork.plctlab.org/api/1.2/patches/136310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821015951.399184-1-juzhe.zhong@rivai.ai/","msgid":"<20230821015951.399184-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:59:51","name":"RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821015951.399184-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136311,"url":"https://patchwork.plctlab.org/api/1.2/patches/136311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821021005.3798870-1-hongtao.liu@intel.com/","msgid":"<20230821021005.3798870-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-21T02:10:05","name":"Mention Intel -march=gracemont for Alderlake-N.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821021005.3798870-1-hongtao.liu@intel.com/mbox/"},{"id":136313,"url":"https://patchwork.plctlab.org/api/1.2/patches/136313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821032123.3332286-1-apinski@marvell.com/","msgid":"<20230821032123.3332286-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-21T03:21:23","name":"MATCH: [PR111002] Sink view_convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821032123.3332286-1-apinski@marvell.com/mbox/"},{"id":136334,"url":"https://patchwork.plctlab.org/api/1.2/patches/136334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com/","msgid":"<2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:44:03","name":"[PING^2,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com/mbox/"},{"id":136335,"url":"https://patchwork.plctlab.org/api/1.2/patches/136335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com/","msgid":"<8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:45:19","name":"[PING^4,3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com/mbox/"},{"id":136336,"url":"https://patchwork.plctlab.org/api/1.2/patches/136336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com/","msgid":"<9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:46:44","name":"[PING^4] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com/mbox/"},{"id":136340,"url":"https://patchwork.plctlab.org/api/1.2/patches/136340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821072627.3984748-1-pan2.li@intel.com/","msgid":"<20230821072627.3984748-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-21T07:26:27","name":"[v1] Mode-Switching: Add optional EMIT_AFTER hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821072627.3984748-1-pan2.li@intel.com/mbox/"},{"id":136349,"url":"https://patchwork.plctlab.org/api/1.2/patches/136349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821080920.40614385B800@sourceware.org/","msgid":"<20230821080920.40614385B800@sourceware.org>","list_archive_url":null,"date":"2023-08-21T08:08:36","name":"tree-optimization/111070 - fix ICE with recent ifcombine fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821080920.40614385B800@sourceware.org/mbox/"},{"id":136353,"url":"https://patchwork.plctlab.org/api/1.2/patches/136353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821091227.0E895385773C@sourceware.org/","msgid":"<20230821091227.0E895385773C@sourceware.org>","list_archive_url":null,"date":"2023-08-21T09:11:29","name":"debug/111080 - avoid outputting debug info for unused restrict qualified type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821091227.0E895385773C@sourceware.org/mbox/"},{"id":136357,"url":"https://patchwork.plctlab.org/api/1.2/patches/136357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094701.1548195-1-jwakely@redhat.com/","msgid":"<20230821094701.1548195-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-21T09:46:11","name":"[committed] libstdc++: Remove reliance on unspecified behaviour in std::rethrow_if_nested test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094701.1548195-1-jwakely@redhat.com/mbox/"},{"id":136358,"url":"https://patchwork.plctlab.org/api/1.2/patches/136358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094834.34B663836E92@sourceware.org/","msgid":"<20230821094834.34B663836E92@sourceware.org>","list_archive_url":null,"date":"2023-08-21T09:47:49","name":"tree-optimization/111082 - bogus promoted min","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094834.34B663836E92@sourceware.org/mbox/"},{"id":136362,"url":"https://patchwork.plctlab.org/api/1.2/patches/136362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821095913.1629336-1-hongtao.liu@intel.com/","msgid":"<20230821095913.1629336-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-21T09:59:13","name":"Adjust testcase for Intel GDS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821095913.1629336-1-hongtao.liu@intel.com/mbox/"},{"id":136365,"url":"https://patchwork.plctlab.org/api/1.2/patches/136365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com/","msgid":"<448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-08-21T10:32:06","name":"rs6000: Disable PCREL for unsupported targets [PR111045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com/mbox/"},{"id":136372,"url":"https://patchwork.plctlab.org/api/1.2/patches/136372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821105955.3471098-1-juzhe.zhong@rivai.ai/","msgid":"<20230821105955.3471098-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T10:59:55","name":"[V5] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821105955.3471098-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136374,"url":"https://patchwork.plctlab.org/api/1.2/patches/136374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821111301.4696A385B531@sourceware.org/","msgid":"<20230821111301.4696A385B531@sourceware.org>","list_archive_url":null,"date":"2023-08-21T11:12:15","name":"Fix gcc.dg/vect/bb-slp-46.c FAIL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821111301.4696A385B531@sourceware.org/mbox/"},{"id":136380,"url":"https://patchwork.plctlab.org/api/1.2/patches/136380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821115939.C86BE3857722@sourceware.org/","msgid":"<20230821115939.C86BE3857722@sourceware.org>","list_archive_url":null,"date":"2023-08-21T11:58:54","name":"Fix gcc.dg/vect/bb-slp-subgroups-2.c with 256bit vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821115939.C86BE3857722@sourceware.org/mbox/"},{"id":136386,"url":"https://patchwork.plctlab.org/api/1.2/patches/136386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821122540.496C5385B800@sourceware.org/","msgid":"<20230821122540.496C5385B800@sourceware.org>","list_archive_url":null,"date":"2023-08-21T12:24:55","name":"Fix FAIL: gcc.target/i386/pr87007-5.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821122540.496C5385B800@sourceware.org/mbox/"},{"id":136396,"url":"https://patchwork.plctlab.org/api/1.2/patches/136396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821134653.97329-1-aldyh@redhat.com/","msgid":"<20230821134653.97329-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-21T13:46:49","name":"[COMMITTED,frange] Return false if nothing changed in union_nans().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821134653.97329-1-aldyh@redhat.com/mbox/"},{"id":136408,"url":"https://patchwork.plctlab.org/api/1.2/patches/136408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155610.2553-2-stefansf@linux.ibm.com/","msgid":"<20230821155610.2553-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T15:56:11","name":"s390: Fix builtins vec_rli and verll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155610.2553-2-stefansf@linux.ibm.com/mbox/"},{"id":136407,"url":"https://patchwork.plctlab.org/api/1.2/patches/136407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155839.2680-2-stefansf@linux.ibm.com/","msgid":"<20230821155839.2680-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T15:58:40","name":"s390: Fix some builtin definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155839.2680-2-stefansf@linux.ibm.com/mbox/"},{"id":136410,"url":"https://patchwork.plctlab.org/api/1.2/patches/136410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821163852.988058-1-ewlu@rivosinc.com/","msgid":"<20230821163852.988058-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-21T16:37:40","name":"RISC-V: Add Types to Missing Bitmanip Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821163852.988058-1-ewlu@rivosinc.com/mbox/"},{"id":136411,"url":"https://patchwork.plctlab.org/api/1.2/patches/136411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821165230.989216-1-ewlu@rivosinc.com/","msgid":"<20230821165230.989216-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-21T16:51:58","name":"RISC-V: Add Types to Un-Typed Sync Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821165230.989216-1-ewlu@rivosinc.com/mbox/"},{"id":136414,"url":"https://patchwork.plctlab.org/api/1.2/patches/136414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com/","msgid":"<70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com>","list_archive_url":null,"date":"2023-08-21T17:04:15","name":"Fix tests sensitive to internal library allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com/mbox/"},{"id":136416,"url":"https://patchwork.plctlab.org/api/1.2/patches/136416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com/","msgid":"<0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com>","list_archive_url":null,"date":"2023-08-21T17:25:48","name":"[RISCV,committed] Remove spurious newline in ztso sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com/mbox/"},{"id":136419,"url":"https://patchwork.plctlab.org/api/1.2/patches/136419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821180718.20489-1-jose.marchesi@oracle.com/","msgid":"<20230821180718.20489-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-21T18:07:18","name":"[V2] Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821180718.20489-1-jose.marchesi@oracle.com/mbox/"},{"id":136422,"url":"https://patchwork.plctlab.org/api/1.2/patches/136422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-465e9c23-c45c-40b4-b023-d80400782239-1692647313365@3c-app-gmx-bs15/","msgid":"","list_archive_url":null,"date":"2023-08-21T19:48:33","name":"Fortran: implement vector sections in DATA statements [PR49588]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-465e9c23-c45c-40b4-b023-d80400782239-1692647313365@3c-app-gmx-bs15/mbox/"},{"id":136426,"url":"https://patchwork.plctlab.org/api/1.2/patches/136426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa9724f1b198f6416bb8e05966f57b0742201b73.1692650021.git.mirai@makinata.eu/","msgid":"","list_archive_url":null,"date":"2023-08-21T20:34:02","name":"[1/2] libstdc++: Fix '\''doc-install-info'\'' rule.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa9724f1b198f6416bb8e05966f57b0742201b73.1692650021.git.mirai@makinata.eu/mbox/"},{"id":136425,"url":"https://patchwork.plctlab.org/api/1.2/patches/136425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu/","msgid":"<450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu>","list_archive_url":null,"date":"2023-08-21T20:34:03","name":"[2/2] libstdc++: Update docbook xsl URI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu/mbox/"},{"id":136427,"url":"https://patchwork.plctlab.org/api/1.2/patches/136427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821210347.19947-1-david.faust@oracle.com/","msgid":"<20230821210347.19947-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-21T21:03:47","name":"bpf: neg instruction does not accept an immediate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821210347.19947-1-david.faust@oracle.com/mbox/"},{"id":136434,"url":"https://patchwork.plctlab.org/api/1.2/patches/136434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-1-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:22","name":"[pushed,1/6] analyzer: convert note_adding_context to annotating_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-1-dmalcolm@redhat.com/mbox/"},{"id":136437,"url":"https://patchwork.plctlab.org/api/1.2/patches/136437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-2-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:23","name":"[pushed,2/6] analyzer: add ability for context to add events to a saved_diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-2-dmalcolm@redhat.com/mbox/"},{"id":136435,"url":"https://patchwork.plctlab.org/api/1.2/patches/136435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-3-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:24","name":"[pushed,3/6] analyzer: handle NULL inner context in region_model_context_decorator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-3-dmalcolm@redhat.com/mbox/"},{"id":136438,"url":"https://patchwork.plctlab.org/api/1.2/patches/136438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-4-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:25","name":"[pushed,4/6] analyzer: replace -Wanalyzer-unterminated-string with scan_for_null_terminator [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-4-dmalcolm@redhat.com/mbox/"},{"id":136436,"url":"https://patchwork.plctlab.org/api/1.2/patches/136436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-5-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:26","name":"[pushed,5/6] analyzer: add kf_fopen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-5-dmalcolm@redhat.com/mbox/"},{"id":136439,"url":"https://patchwork.plctlab.org/api/1.2/patches/136439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-6-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:27","name":"[pushed,6/6] analyzer: check format strings for null termination [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-6-dmalcolm@redhat.com/mbox/"},{"id":136440,"url":"https://patchwork.plctlab.org/api/1.2/patches/136440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015139.1920183-1-ppalka@redhat.com/","msgid":"<20230822015139.1920183-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:51:38","name":"c++: refine CWG 2369 satisfaction vs non-dep convs [PR99599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015139.1920183-1-ppalka@redhat.com/mbox/"},{"id":136442,"url":"https://patchwork.plctlab.org/api/1.2/patches/136442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015834.3540320-1-juzhe.zhong@rivai.ai/","msgid":"<20230822015834.3540320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T01:58:34","name":"[V2] gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015834.3540320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136444,"url":"https://patchwork.plctlab.org/api/1.2/patches/136444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822022935.9877-1-xuli1@eswincomputing.com/","msgid":"<20230822022935.9877-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-08-22T02:29:35","name":"RISCV: Fix PR111074 [GCC13 BUG]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822022935.9877-1-xuli1@eswincomputing.com/mbox/"},{"id":136446,"url":"https://patchwork.plctlab.org/api/1.2/patches/136446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822025758.769581-1-hongtao.liu@intel.com/","msgid":"<20230822025758.769581-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-22T02:57:58","name":"[x86] Testcase fix.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822025758.769581-1-hongtao.liu@intel.com/mbox/"},{"id":136447,"url":"https://patchwork.plctlab.org/api/1.2/patches/136447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822030215.3566313-1-lehua.ding@rivai.ai/","msgid":"<20230822030215.3566313-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-22T03:02:15","name":"RISC-V: Change fnms testcases assertion to xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822030215.3566313-1-lehua.ding@rivai.ai/mbox/"},{"id":136451,"url":"https://patchwork.plctlab.org/api/1.2/patches/136451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822041924.1861884-1-pan2.li@intel.com/","msgid":"<20230822041924.1861884-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-22T04:19:24","name":"[v2] RISC-V: Refactor RVV class by frm_op_type template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822041924.1861884-1-pan2.li@intel.com/mbox/"},{"id":136455,"url":"https://patchwork.plctlab.org/api/1.2/patches/136455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822054128.1401166-1-lehua.ding@rivai.ai/","msgid":"<20230822054128.1401166-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-22T05:41:28","name":"RISC-V: Add conditional unary neg/abs/not autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822054128.1401166-1-lehua.ding@rivai.ai/mbox/"},{"id":136456,"url":"https://patchwork.plctlab.org/api/1.2/patches/136456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff3f47e9-ede7-edfe-c19e-ef5137f760f8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T06:28:54","name":"[PATCHv2,rs6000] Extract the element in dword0 by mfvsrd and shift/mask [PR110331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff3f47e9-ede7-edfe-c19e-ef5137f760f8@linux.ibm.com/mbox/"},{"id":136460,"url":"https://patchwork.plctlab.org/api/1.2/patches/136460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORmH6QZK45sD1b/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T07:39:11","name":"c++: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORmH6QZK45sD1b/@tucnak/mbox/"},{"id":136467,"url":"https://patchwork.plctlab.org/api/1.2/patches/136467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORuAJTB6/kkyFGG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T08:12:48","name":"c++: Fix up mangling of function/block scope static structured bindings [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORuAJTB6/kkyFGG@tucnak/mbox/"},{"id":136468,"url":"https://patchwork.plctlab.org/api/1.2/patches/136468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORukwAR0INoKBYP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T08:15:15","name":"doc: Remove obsolete sentence about _Float* not being supported in C++ [PR106652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORukwAR0INoKBYP@tucnak/mbox/"},{"id":136471,"url":"https://patchwork.plctlab.org/api/1.2/patches/136471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com/","msgid":"<31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:44:03","name":"vect: Replace DR_GROUP_STORE_COUNT with DR_GROUP_LAST_ELEMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com/mbox/"},{"id":136472,"url":"https://patchwork.plctlab.org/api/1.2/patches/136472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com/","msgid":"<8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:45:28","name":"[1/3] vect: Remove some manual release in vectorizable_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com/mbox/"},{"id":136474,"url":"https://patchwork.plctlab.org/api/1.2/patches/136474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com/","msgid":"<8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:49:33","name":"[2/3] vect: Move VMAT_LOAD_STORE_LANES handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com/mbox/"},{"id":136475,"url":"https://patchwork.plctlab.org/api/1.2/patches/136475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com/","msgid":"<1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:52:41","name":"[3/3] vect: Move VMAT_GATHER_SCATTER handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com/mbox/"},{"id":136480,"url":"https://patchwork.plctlab.org/api/1.2/patches/136480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822090549.703E9385C6E9@sourceware.org/","msgid":"<20230822090549.703E9385C6E9@sourceware.org>","list_archive_url":null,"date":"2023-08-22T09:05:00","name":"tree-optimization/94864 - vector insert of vector extract simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822090549.703E9385C6E9@sourceware.org/mbox/"},{"id":136486,"url":"https://patchwork.plctlab.org/api/1.2/patches/136486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com/","msgid":"<8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com>","list_archive_url":null,"date":"2023-08-22T09:54:14","name":"OpenMP: Handle '\''all'\'' as category in defaultmap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com/mbox/"},{"id":136495,"url":"https://patchwork.plctlab.org/api/1.2/patches/136495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com/","msgid":"<27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com>","list_archive_url":null,"date":"2023-08-22T10:16:48","name":"libgomp.c/simd-math-1.c: Test scalb{, l}n{, f} and un-XFAIL for non-nvptx/amdgcn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com/mbox/"},{"id":136500,"url":"https://patchwork.plctlab.org/api/1.2/patches/136500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:12","name":"[01/11] aarch64: AARCH64_ISA_RCPC was defined twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136505,"url":"https://patchwork.plctlab.org/api/1.2/patches/136505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:20","name":"[02/11] Handle epilogues that contain jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136504,"url":"https://patchwork.plctlab.org/api/1.2/patches/136504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:27","name":"[03/11] aarch64: Use br instead of ret for eh_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136507,"url":"https://patchwork.plctlab.org/api/1.2/patches/136507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:35","name":"[04/11] aarch64: Do not force a stack frame for EH returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136509,"url":"https://patchwork.plctlab.org/api/1.2/patches/136509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6b7c47f58a448c09714dd397ec103c3b48b8ec3.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:42","name":"[05/11] aarch64: Add eh_return compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6b7c47f58a448c09714dd397ec103c3b48b8ec3.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136501,"url":"https://patchwork.plctlab.org/api/1.2/patches/136501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9a619fcadf6e05dda1b92e83da0eb91cffb12a2.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:49","name":"[06/11] aarch64: Fix pac-ret eh_return tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9a619fcadf6e05dda1b92e83da0eb91cffb12a2.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136502,"url":"https://patchwork.plctlab.org/api/1.2/patches/136502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8186167e2c5002b818172dfb3a593c1fdd99630.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:55","name":"[07/11] aarch64: Disable branch-protection for pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8186167e2c5002b818172dfb3a593c1fdd99630.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136503,"url":"https://patchwork.plctlab.org/api/1.2/patches/136503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:03","name":"[08/11] aarch64,arm: Remove accepted_branch_protection_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136506,"url":"https://patchwork.plctlab.org/api/1.2/patches/136506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:10","name":"[09/11] aarch64,arm: Fix branch-protection= parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136508,"url":"https://patchwork.plctlab.org/api/1.2/patches/136508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:17","name":"[10/11] aarch64: Fix branch-protection error message tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136510,"url":"https://patchwork.plctlab.org/api/1.2/patches/136510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a60da3d8be440de0fe327310c61e004f2263c38f.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:39:24","name":"[11/11] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a60da3d8be440de0fe327310c61e004f2263c38f.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136511,"url":"https://patchwork.plctlab.org/api/1.2/patches/136511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822105137.1308817-1-juzhe.zhong@rivai.ai/","msgid":"<20230822105137.1308817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T10:51:37","name":"VECT: Add LEN_FOLD_EXTRACT_LAST pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822105137.1308817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136514,"url":"https://patchwork.plctlab.org/api/1.2/patches/136514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOSbwEHbsEiu3Z/z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T11:28:00","name":"[14/12] libgcc _BitInt helper documentation [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOSbwEHbsEiu3Z/z@tucnak/mbox/"},{"id":136532,"url":"https://patchwork.plctlab.org/api/1.2/patches/136532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822120219.3997652-1-rearnsha@arm.com/","msgid":"<20230822120219.3997652-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-08-22T12:02:19","name":"rtl: Forward declare rtx_code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822120219.3997652-1-rearnsha@arm.com/mbox/"},{"id":136536,"url":"https://patchwork.plctlab.org/api/1.2/patches/136536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822124214.26030-1-chenglulu@loongson.cn/","msgid":"<20230822124214.26030-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-22T12:42:14","name":"[v1] libffi: Backport of LoongArch support for libffi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822124214.26030-1-chenglulu@loongson.cn/mbox/"},{"id":136539,"url":"https://patchwork.plctlab.org/api/1.2/patches/136539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822131900.977183858D1E@sourceware.org/","msgid":"<20230822131900.977183858D1E@sourceware.org>","list_archive_url":null,"date":"2023-08-22T13:18:17","name":"Simplify intereaved store vectorization processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822131900.977183858D1E@sourceware.org/mbox/"},{"id":136573,"url":"https://patchwork.plctlab.org/api/1.2/patches/136573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4f5799e-4fd6-72f4-0882-ec0bef2f1f62@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T17:39:38","name":"[committed] RISC-V: Add multiarch support on riscv-linux-gnu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4f5799e-4fd6-72f4-0882-ec0bef2f1f62@ventanamicro.com/mbox/"},{"id":136574,"url":"https://patchwork.plctlab.org/api/1.2/patches/136574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822174031.782900-1-vineetg@rivosinc.com/","msgid":"<20230822174031.782900-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-22T17:40:31","name":"RISC-V: output Autovec params explicitly in --help ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822174031.782900-1-vineetg@rivosinc.com/mbox/"},{"id":136587,"url":"https://patchwork.plctlab.org/api/1.2/patches/136587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822180907.783650-1-vineetg@rivosinc.com/","msgid":"<20230822180907.783650-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-22T18:09:07","name":"[Committed] RISC-V: output Autovec params explicitly in --help ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822180907.783650-1-vineetg@rivosinc.com/mbox/"},{"id":136600,"url":"https://patchwork.plctlab.org/api/1.2/patches/136600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-1-jason@redhat.com/","msgid":"<20230822183639.1425752-1-jason@redhat.com>","list_archive_url":null,"date":"2023-08-22T18:36:38","name":"[pushed,1/2] c++: constrained hidden friends [PR109751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-1-jason@redhat.com/mbox/"},{"id":136599,"url":"https://patchwork.plctlab.org/api/1.2/patches/136599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-2-jason@redhat.com/","msgid":"<20230822183639.1425752-2-jason@redhat.com>","list_archive_url":null,"date":"2023-08-22T18:36:39","name":"[pushed,2/2] c++: maybe_substitute_reqs_for fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-2-jason@redhat.com/mbox/"},{"id":136609,"url":"https://patchwork.plctlab.org/api/1.2/patches/136609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822223958.2936206-1-dmalcolm@redhat.com/","msgid":"<20230822223958.2936206-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T22:39:58","name":"[pushed] analyzer: reimplement kf_strlen [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822223958.2936206-1-dmalcolm@redhat.com/mbox/"},{"id":136610,"url":"https://patchwork.plctlab.org/api/1.2/patches/136610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822230650.1383987-1-juzhe.zhong@rivai.ai/","msgid":"<20230822230650.1383987-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T23:06:50","name":"RISC-V: Add riscv-vsetvl.def to t-riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822230650.1383987-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136612,"url":"https://patchwork.plctlab.org/api/1.2/patches/136612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822232225.1385301-1-juzhe.zhong@rivai.ai/","msgid":"<20230822232225.1385301-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T23:22:25","name":"RISC-V: Clang format riscv-vsetvl.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822232225.1385301-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136615,"url":"https://patchwork.plctlab.org/api/1.2/patches/136615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823011915.3481968-1-juzhe.zhong@rivai.ai/","msgid":"<20230823011915.3481968-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T01:19:15","name":"RISC-V: Adapt live-1.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823011915.3481968-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136622,"url":"https://patchwork.plctlab.org/api/1.2/patches/136622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021106.3498134-1-juzhe.zhong@rivai.ai/","msgid":"<20230823021106.3498134-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:11:06","name":"RISC-V: Add attribute to vtype change only vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021106.3498134-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136623,"url":"https://patchwork.plctlab.org/api/1.2/patches/136623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021504.3864764-1-keithp@keithp.com/","msgid":"<20230823021504.3864764-1-keithp@keithp.com>","list_archive_url":null,"date":"2023-08-23T02:15:04","name":"libgcc/m68k: Fixes for soft float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021504.3864764-1-keithp@keithp.com/mbox/"},{"id":136624,"url":"https://patchwork.plctlab.org/api/1.2/patches/136624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823022122.3500305-1-juzhe.zhong@rivai.ai/","msgid":"<20230823022122.3500305-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:21:22","name":"RISC-V: Fix gather_load_run-12.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823022122.3500305-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136625,"url":"https://patchwork.plctlab.org/api/1.2/patches/136625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823023230.3501614-1-juzhe.zhong@rivai.ai/","msgid":"<20230823023230.3501614-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:32:30","name":"RISC-V: Fix VTYPE fuse rule bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823023230.3501614-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136626,"url":"https://patchwork.plctlab.org/api/1.2/patches/136626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823024201.3507755-1-juzhe.zhong@rivai.ai/","msgid":"<20230823024201.3507755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:42:01","name":"RISC-V: Fix potential ICE of global vsetvl elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823024201.3507755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136627,"url":"https://patchwork.plctlab.org/api/1.2/patches/136627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823025607.1848-1-chenglulu@loongson.cn/","msgid":"<20230823025607.1848-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-23T02:56:08","name":"[v2] libffi: Backport of LoongArch support for libffi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823025607.1848-1-chenglulu@loongson.cn/mbox/"},{"id":136628,"url":"https://patchwork.plctlab.org/api/1.2/patches/136628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823032846.3565511-1-lehua.ding@rivai.ai/","msgid":"<20230823032846.3565511-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T03:28:46","name":"[V2] RISC-V: Add conditional unary neg/abs/not autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823032846.3565511-1-lehua.ding@rivai.ai/mbox/"},{"id":136630,"url":"https://patchwork.plctlab.org/api/1.2/patches/136630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823043118.4118801-1-hongtao.liu@intel.com/","msgid":"<20230823043118.4118801-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-23T04:31:18","name":"Fix target_clone (\"arch=graniterapids-d\") and target_clone (\"arch=arrowlake-s\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823043118.4118801-1-hongtao.liu@intel.com/mbox/"},{"id":136632,"url":"https://patchwork.plctlab.org/api/1.2/patches/136632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/h48o7iyxs01.fsf@genoa.aus.stglabs.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T05:11:26","name":"[V1,1/2] light expander sra v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/h48o7iyxs01.fsf@genoa.aus.stglabs.ibm.com/mbox/"},{"id":136640,"url":"https://patchwork.plctlab.org/api/1.2/patches/136640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOXM6mIc0hZbwWeB@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-23T09:10:02","name":"Fix profile update in tree-ssa-reassoc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOXM6mIc0hZbwWeB@kam.mff.cuni.cz/mbox/"},{"id":136650,"url":"https://patchwork.plctlab.org/api/1.2/patches/136650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823105951.1758476-1-rearnsha@arm.com/","msgid":"<20230823105951.1758476-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-08-23T10:59:51","name":"rtl: use rtx_code for gen_ccmp_first and gen_ccmp_next","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823105951.1758476-1-rearnsha@arm.com/mbox/"},{"id":136651,"url":"https://patchwork.plctlab.org/api/1.2/patches/136651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823110317.4053846-1-lehua.ding@rivai.ai/","msgid":"<20230823110317.4053846-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T11:03:17","name":"RISC-V: Add conditional sign/zero extension and truncation autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823110317.4053846-1-lehua.ding@rivai.ai/mbox/"},{"id":136653,"url":"https://patchwork.plctlab.org/api/1.2/patches/136653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823115357.3868382-1-lehua.ding@rivai.ai/","msgid":"<20230823115357.3868382-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T11:53:57","name":"RISC-V: Add conditional convert autovec patterns between FPs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823115357.3868382-1-lehua.ding@rivai.ai/mbox/"},{"id":136656,"url":"https://patchwork.plctlab.org/api/1.2/patches/136656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122452.2137204-1-juzhe.zhong@rivai.ai/","msgid":"<20230823122452.2137204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T12:24:52","name":"[V2] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122452.2137204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136657,"url":"https://patchwork.plctlab.org/api/1.2/patches/136657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122843.23512-1-liaozhangjin@eswincomputing.com/","msgid":"<20230823122843.23512-1-liaozhangjin@eswincomputing.com>","list_archive_url":null,"date":"2023-08-23T12:28:43","name":"RISC-V:add a more appropriate type attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122843.23512-1-liaozhangjin@eswincomputing.com/mbox/"},{"id":136659,"url":"https://patchwork.plctlab.org/api/1.2/patches/136659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuVikf3frvm3t21ezn09nc-sagOpuOniaHycS44t80BL-w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T13:02:40","name":"[v5] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuVikf3frvm3t21ezn09nc-sagOpuOniaHycS44t80BL-w@mail.gmail.com/mbox/"},{"id":136663,"url":"https://patchwork.plctlab.org/api/1.2/patches/136663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823132502.72B64385482D@sourceware.org/","msgid":"<20230823132502.72B64385482D@sourceware.org>","list_archive_url":null,"date":"2023-08-23T13:24:17","name":"tree-optimization/111115 - SLP of masked stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823132502.72B64385482D@sourceware.org/mbox/"},{"id":136667,"url":"https://patchwork.plctlab.org/api/1.2/patches/136667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com/","msgid":"<80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com>","list_archive_url":null,"date":"2023-08-23T13:48:27","name":"RISC-V: Add initial pipeline description for an out-of-order core.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com/mbox/"},{"id":136670,"url":"https://patchwork.plctlab.org/api/1.2/patches/136670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-2-ams@codesourcery.com/","msgid":"<20230823141426.320160-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:21","name":"[v2,1/6] libgomp: basic pinned memory on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-2-ams@codesourcery.com/mbox/"},{"id":136669,"url":"https://patchwork.plctlab.org/api/1.2/patches/136669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-3-ams@codesourcery.com/","msgid":"<20230823141426.320160-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:22","name":"[v2,2/6] libgomp, openmp: Add ompx_pinned_mem_alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-3-ams@codesourcery.com/mbox/"},{"id":136672,"url":"https://patchwork.plctlab.org/api/1.2/patches/136672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-4-ams@codesourcery.com/","msgid":"<20230823141426.320160-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:23","name":"[v2,3/6] openmp: Add -foffload-memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-4-ams@codesourcery.com/mbox/"},{"id":136673,"url":"https://patchwork.plctlab.org/api/1.2/patches/136673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-5-ams@codesourcery.com/","msgid":"<20230823141426.320160-5-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:24","name":"[v2,4/6] openmp: -foffload-memory=pinned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-5-ams@codesourcery.com/mbox/"},{"id":136671,"url":"https://patchwork.plctlab.org/api/1.2/patches/136671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-6-ams@codesourcery.com/","msgid":"<20230823141426.320160-6-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:25","name":"[v2,5/6] libgomp, nvptx: Cuda pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-6-ams@codesourcery.com/mbox/"},{"id":136674,"url":"https://patchwork.plctlab.org/api/1.2/patches/136674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-7-ams@codesourcery.com/","msgid":"<20230823141426.320160-7-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:26","name":"[v2,6/6] libgomp: fine-grained pinned memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-7-ams@codesourcery.com/mbox/"},{"id":136683,"url":"https://patchwork.plctlab.org/api/1.2/patches/136683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982AAADB78E0FBB98E28147831CA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T14:39:13","name":"AArch64: Fix MOPS memmove operand corruption [PR111121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982AAADB78E0FBB98E28147831CA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":136686,"url":"https://patchwork.plctlab.org/api/1.2/patches/136686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y8DZejELWcKZouxNx-nQgZyCmSszaznU7xRA8RfLBKmw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T14:53:05","name":"[committed] i386: Fix register spill failure with concat RTX [PR111010]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y8DZejELWcKZouxNx-nQgZyCmSszaznU7xRA8RfLBKmw@mail.gmail.com/mbox/"},{"id":136691,"url":"https://patchwork.plctlab.org/api/1.2/patches/136691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823152209.351604-1-aldyh@redhat.com/","msgid":"<20230823152209.351604-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-23T15:22:00","name":"[frange] Relax floating point relational folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823152209.351604-1-aldyh@redhat.com/mbox/"},{"id":136698,"url":"https://patchwork.plctlab.org/api/1.2/patches/136698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823160322.237140-1-jwakely@redhat.com/","msgid":"<20230823160322.237140-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-23T16:02:05","name":"[RFC] libstdc++: Make --enable-libstdcxx-backtrace=auto default to yes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823160322.237140-1-jwakely@redhat.com/mbox/"},{"id":136706,"url":"https://patchwork.plctlab.org/api/1.2/patches/136706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffce06a5-59a8-56fd-b39e-a2bd38c609a3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T17:35:14","name":"[_GLIBCXX_INLINE_VERSION] Fix friend declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffce06a5-59a8-56fd-b39e-a2bd38c609a3@gmail.com/mbox/"},{"id":136709,"url":"https://patchwork.plctlab.org/api/1.2/patches/136709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com/","msgid":"<921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com>","list_archive_url":null,"date":"2023-08-23T18:47:53","name":"[COMMITTED,1/2] Phi analyzer - Do not create phi groups with a single phi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com/mbox/"},{"id":136710,"url":"https://patchwork.plctlab.org/api/1.2/patches/136710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com/","msgid":"<42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com>","list_archive_url":null,"date":"2023-08-23T18:48:15","name":"[COMMITTED,2/2] tree-optimization/110918 - Phi analyzer - Initialize with a range instead of a tree.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com/mbox/"},{"id":136711,"url":"https://patchwork.plctlab.org/api/1.2/patches/136711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se/","msgid":"<3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se>","list_archive_url":null,"date":"2023-08-23T18:48:25","name":"Fix for bug libstdc++/111102 pointer arithmetic on nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se/mbox/"},{"id":136715,"url":"https://patchwork.plctlab.org/api/1.2/patches/136715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-62b0634d-102b-44b5-b999-b8927b2ba50f-1692818168035@3c-app-gmx-bs30/","msgid":"","list_archive_url":null,"date":"2023-08-23T19:16:08","name":"Fortran: improve diagnostic message for COMMON with automatic object [PR32986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-62b0634d-102b-44b5-b999-b8927b2ba50f-1692818168035@3c-app-gmx-bs30/mbox/"},{"id":136718,"url":"https://patchwork.plctlab.org/api/1.2/patches/136718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823194904.1925591-1-polacek@redhat.com/","msgid":"<20230823194904.1925591-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-23T19:49:04","name":"c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823194904.1925591-1-polacek@redhat.com/mbox/"},{"id":136721,"url":"https://patchwork.plctlab.org/api/1.2/patches/136721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com/","msgid":"<66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com>","list_archive_url":null,"date":"2023-08-23T20:13:58","name":"[committed] Improve quality of code from LRA register elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com/mbox/"},{"id":136729,"url":"https://patchwork.plctlab.org/api/1.2/patches/136729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823214955.3494903-1-apinski@marvell.com/","msgid":"<20230823214955.3494903-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-23T21:49:55","name":"MATCH: [PR111109] Fix bit_ior(cond, cond) when comparisons are fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823214955.3494903-1-apinski@marvell.com/mbox/"},{"id":136734,"url":"https://patchwork.plctlab.org/api/1.2/patches/136734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824010834.1525563-1-guojiufu@linux.ibm.com/","msgid":"<20230824010834.1525563-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-24T01:08:34","name":"[V5,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824010834.1525563-1-guojiufu@linux.ibm.com/mbox/"},{"id":136737,"url":"https://patchwork.plctlab.org/api/1.2/patches/136737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824011738.5A3122040D@pchp3.se.axis.com/","msgid":"<20230824011738.5A3122040D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-24T01:17:38","name":"[committed] testsuite: Xfail gcc.dg/tree-ssa/update-threading.c for CRIS, PR110628","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824011738.5A3122040D@pchp3.se.axis.com/mbox/"},{"id":136738,"url":"https://patchwork.plctlab.org/api/1.2/patches/136738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824020836.48335-1-juzhe.zhong@rivai.ai/","msgid":"<20230824020836.48335-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T02:08:36","name":"VECT: Apply LEN_FOLD_EXTRACT_LAST into loop vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824020836.48335-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136739,"url":"https://patchwork.plctlab.org/api/1.2/patches/136739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824021925.1717486-1-juzhe.zhong@rivai.ai/","msgid":"<20230824021925.1717486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T02:19:25","name":"RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824021925.1717486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136743,"url":"https://patchwork.plctlab.org/api/1.2/patches/136743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824023815.3506414-1-apinski@marvell.com/","msgid":"<20230824023815.3506414-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T02:38:15","name":"MATCH: remove negate for 1bit types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824023815.3506414-1-apinski@marvell.com/mbox/"},{"id":136744,"url":"https://patchwork.plctlab.org/api/1.2/patches/136744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824025706.192064-1-thiago.bauermann@linaro.org/","msgid":"<20230824025706.192064-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-24T02:57:06","name":"testsuite: aarch64: Adjust SVE ACLE tests to new generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824025706.192064-1-thiago.bauermann@linaro.org/mbox/"},{"id":136746,"url":"https://patchwork.plctlab.org/api/1.2/patches/136746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-2-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:11","name":"[v5,1/6] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-2-panchenghui@loongson.cn/mbox/"},{"id":136748,"url":"https://patchwork.plctlab.org/api/1.2/patches/136748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-3-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:12","name":"[v5,2/6] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-3-panchenghui@loongson.cn/mbox/"},{"id":136750,"url":"https://patchwork.plctlab.org/api/1.2/patches/136750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-4-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:13","name":"[v5,3/6] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-4-panchenghui@loongson.cn/mbox/"},{"id":136745,"url":"https://patchwork.plctlab.org/api/1.2/patches/136745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-5-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:14","name":"[v5,4/6] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-5-panchenghui@loongson.cn/mbox/"},{"id":136751,"url":"https://patchwork.plctlab.org/api/1.2/patches/136751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-6-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:15","name":"[v5,5/6] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-6-panchenghui@loongson.cn/mbox/"},{"id":136749,"url":"https://patchwork.plctlab.org/api/1.2/patches/136749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-7-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:16","name":"[v5,6/6] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-7-panchenghui@loongson.cn/mbox/"},{"id":136757,"url":"https://patchwork.plctlab.org/api/1.2/patches/136757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824044907.4078472-1-pan2.li@intel.com/","msgid":"<20230824044907.4078472-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T04:49:07","name":"[v1] RISC-V: Support rounding mode for VFMADD/VFMACC autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824044907.4078472-1-pan2.li@intel.com/mbox/"},{"id":136760,"url":"https://patchwork.plctlab.org/api/1.2/patches/136760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824071104.298243-1-pan2.li@intel.com/","msgid":"<20230824071104.298243-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T07:11:04","name":"[v1] RISC-V: Support rounding mode for VFMSAC/VFMSUB autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824071104.298243-1-pan2.li@intel.com/mbox/"},{"id":136762,"url":"https://patchwork.plctlab.org/api/1.2/patches/136762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824073747.315274-1-pan2.li@intel.com/","msgid":"<20230824073747.315274-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T07:37:47","name":"[v1] RISC-V: Fix one typo in autovec.md pattern comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824073747.315274-1-pan2.li@intel.com/mbox/"},{"id":136765,"url":"https://patchwork.plctlab.org/api/1.2/patches/136765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824075851.2484291-1-hongtao.liu@intel.com/","msgid":"<20230824075851.2484291-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-24T07:58:51","name":"[x86] Refactor mode iterator V_128 and V_128H, V_256 and V_256H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824075851.2484291-1-hongtao.liu@intel.com/mbox/"},{"id":136768,"url":"https://patchwork.plctlab.org/api/1.2/patches/136768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824081408.340237-1-pan2.li@intel.com/","msgid":"<20230824081408.340237-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T08:14:08","name":"[v2] RISC-V: Fix one typo in autovec.md pattern comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824081408.340237-1-pan2.li@intel.com/mbox/"},{"id":136773,"url":"https://patchwork.plctlab.org/api/1.2/patches/136773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824085931.5282A385414C@sourceware.org/","msgid":"<20230824085931.5282A385414C@sourceware.org>","list_archive_url":null,"date":"2023-08-24T08:58:46","name":"testsuite/111125 - disable BB vectorization for the test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824085931.5282A385414C@sourceware.org/mbox/"},{"id":136774,"url":"https://patchwork.plctlab.org/api/1.2/patches/136774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090040.CD4F6385C422@sourceware.org/","msgid":"<20230824090040.CD4F6385C422@sourceware.org>","list_archive_url":null,"date":"2023-08-24T08:59:53","name":"tree-optimization/111128 - fix shift pattern recog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090040.CD4F6385C422@sourceware.org/mbox/"},{"id":136775,"url":"https://patchwork.plctlab.org/api/1.2/patches/136775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090320.9947D385DC19@sourceware.org/","msgid":"<20230824090320.9947D385DC19@sourceware.org>","list_archive_url":null,"date":"2023-08-24T09:02:34","name":"tree-optimization/111123 - indirect clobbers thrown away too early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090320.9947D385DC19@sourceware.org/mbox/"},{"id":136776,"url":"https://patchwork.plctlab.org/api/1.2/patches/136776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090242.2997731-1-hongyu.wang@intel.com/","msgid":"<20230824090242.2997731-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-24T09:02:42","name":"Fix avx512ne2ps2bf16 wrong code [PR 111127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090242.2997731-1-hongyu.wang@intel.com/mbox/"},{"id":136780,"url":"https://patchwork.plctlab.org/api/1.2/patches/136780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcyzcajbi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T09:19:45","name":"aarch64: Account for different Advanced SIMD fusing options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcyzcajbi.fsf@arm.com/mbox/"},{"id":136797,"url":"https://patchwork.plctlab.org/api/1.2/patches/136797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093446.651760-1-pan2.li@intel.com/","msgid":"<20230824093446.651760-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T09:34:46","name":"[v1] RISC-V: Support rounding mode for VFNMSAC/VFNMSUB autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093446.651760-1-pan2.li@intel.com/mbox/"},{"id":136798,"url":"https://patchwork.plctlab.org/api/1.2/patches/136798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093708.71A883856DD0@sourceware.org/","msgid":"<20230824093708.71A883856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-24T09:36:20","name":"tree-optimization/111125 - properly cost BB reduction remain stmt handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093708.71A883856DD0@sourceware.org/mbox/"},{"id":136801,"url":"https://patchwork.plctlab.org/api/1.2/patches/136801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824100811.2468621-1-juzhe.zhong@rivai.ai/","msgid":"<20230824100811.2468621-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T10:08:11","name":"[V2] RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824100811.2468621-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136803,"url":"https://patchwork.plctlab.org/api/1.2/patches/136803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824105505.2481018-1-lehua.ding@rivai.ai/","msgid":"<20230824105505.2481018-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-24T10:55:05","name":"RISC-V: Add conditional autovec convert(INT<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824105505.2481018-1-lehua.ding@rivai.ai/mbox/"},{"id":136805,"url":"https://patchwork.plctlab.org/api/1.2/patches/136805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824110358.ACA0D3851C20@sourceware.org/","msgid":"<20230824110358.ACA0D3851C20@sourceware.org>","list_archive_url":null,"date":"2023-08-24T11:03:06","name":"tree-optimization/111125 - avoid BB vectorization in novector loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824110358.ACA0D3851C20@sourceware.org/mbox/"},{"id":136815,"url":"https://patchwork.plctlab.org/api/1.2/patches/136815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124122.431361-1-jwakely@redhat.com/","msgid":"<20230824124122.431361-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:41:08","name":"[committed] libstdc++: Declutter std::optional and std:variant pretty printers [PR110944]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124122.431361-1-jwakely@redhat.com/mbox/"},{"id":136817,"url":"https://patchwork.plctlab.org/api/1.2/patches/136817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124152.431392-1-jwakely@redhat.com/","msgid":"<20230824124152.431392-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:41:23","name":"[committed] libstdc++: Add pretty printer for std::locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124152.431392-1-jwakely@redhat.com/mbox/"},{"id":136816,"url":"https://patchwork.plctlab.org/api/1.2/patches/136816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124231.86E373853D1F@sourceware.org/","msgid":"<20230824124231.86E373853D1F@sourceware.org>","list_archive_url":null,"date":"2023-08-24T12:41:45","name":"Fix confusion about load_p in vect_build_slp_tree_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124231.86E373853D1F@sourceware.org/mbox/"},{"id":136818,"url":"https://patchwork.plctlab.org/api/1.2/patches/136818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124524.443635-1-jwakely@redhat.com/","msgid":"<20230824124524.443635-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:44:56","name":"[committed] libstdc++: Implement new SI prefixes in for C++23 (P2734R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124524.443635-1-jwakely@redhat.com/mbox/"},{"id":136820,"url":"https://patchwork.plctlab.org/api/1.2/patches/136820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124536.443669-1-jwakely@redhat.com/","msgid":"<20230824124536.443669-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:25","name":"[committed] libstdc++: Tweak some preprocessor conditions for feature tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124536.443669-1-jwakely@redhat.com/mbox/"},{"id":136819,"url":"https://patchwork.plctlab.org/api/1.2/patches/136819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124549.443683-1-jwakely@redhat.com/","msgid":"<20230824124549.443683-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:37","name":"[committed] libstdc++: Fix -Wunused-but-set-variable in std::format_to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124549.443683-1-jwakely@redhat.com/mbox/"},{"id":136821,"url":"https://patchwork.plctlab.org/api/1.2/patches/136821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124603.443712-1-jwakely@redhat.com/","msgid":"<20230824124603.443712-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:56","name":"[committed] libstdc++: Add test for illegal pointer arithmetic in format [PR111102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124603.443712-1-jwakely@redhat.com/mbox/"},{"id":136826,"url":"https://patchwork.plctlab.org/api/1.2/patches/136826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdXuCEkw7On4xBo@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-24T13:14:32","name":"Check that passes do not forget to define profile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdXuCEkw7On4xBo@kam.mff.cuni.cz/mbox/"},{"id":136827,"url":"https://patchwork.plctlab.org/api/1.2/patches/136827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdiA7tyrtpll0FT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-24T13:58:27","name":"c++: Implement C++26 P2361R6 - Unevaluated strings [PR110342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdiA7tyrtpll0FT@tucnak/mbox/"},{"id":136829,"url":"https://patchwork.plctlab.org/api/1.2/patches/136829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdpmyv5gUOzAave@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-24T14:30:51","name":"c++: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdpmyv5gUOzAave@tucnak/mbox/"},{"id":136831,"url":"https://patchwork.plctlab.org/api/1.2/patches/136831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-2-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:55","name":"[1/9] analyzer: add logging to impl_path_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-2-dmalcolm@redhat.com/mbox/"},{"id":136837,"url":"https://patchwork.plctlab.org/api/1.2/patches/136837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-3-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:56","name":"[2/9] analyzer: handle symbolic bindings in scan_for_null_terminator [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-3-dmalcolm@redhat.com/mbox/"},{"id":136834,"url":"https://patchwork.plctlab.org/api/1.2/patches/136834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-4-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:57","name":"[3/9] analyzer: reimplement kf_strcpy [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-4-dmalcolm@redhat.com/mbox/"},{"id":136832,"url":"https://patchwork.plctlab.org/api/1.2/patches/136832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-5-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:58","name":"[4/9] analyzer: eliminate region_model::get_string_size [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-5-dmalcolm@redhat.com/mbox/"},{"id":136833,"url":"https://patchwork.plctlab.org/api/1.2/patches/136833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-6-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:59","name":"[5/9] analyzer: reimplement kf_memcpy_memmove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-6-dmalcolm@redhat.com/mbox/"},{"id":136838,"url":"https://patchwork.plctlab.org/api/1.2/patches/136838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-7-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:00","name":"[6/9] analyzer: handle strlen(INIT_VAL(STRING_REG)) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-7-dmalcolm@redhat.com/mbox/"},{"id":136839,"url":"https://patchwork.plctlab.org/api/1.2/patches/136839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-8-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-8-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:01","name":"[7/9] analyzer: handle INIT_VAL(ELEMENT_REG(STRING_REG), CONSTANT_SVAL) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-8-dmalcolm@redhat.com/mbox/"},{"id":136840,"url":"https://patchwork.plctlab.org/api/1.2/patches/136840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-9-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-9-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:02","name":"[8/9] analyzer: handle strlen(BITS_WITHIN) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-9-dmalcolm@redhat.com/mbox/"},{"id":136835,"url":"https://patchwork.plctlab.org/api/1.2/patches/136835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-10-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-10-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:03","name":"[9/9] analyzer: implement kf_strcat [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-10-dmalcolm@redhat.com/mbox/"},{"id":136844,"url":"https://patchwork.plctlab.org/api/1.2/patches/136844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdyHqxbRshejb4n@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-24T15:07:10","name":"[RFC] gimple ssa: SCCP - A new PHI optimization pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdyHqxbRshejb4n@fkdesktop.suse.cz/mbox/"},{"id":136847,"url":"https://patchwork.plctlab.org/api/1.2/patches/136847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNkyz3m7xU8FtArMmCW_nJY4WCzePdQpn_SQEmvErbwmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T15:45:12","name":"RISC-V: Fix stack_save_restore_1/2 test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNkyz3m7xU8FtArMmCW_nJY4WCzePdQpn_SQEmvErbwmg@mail.gmail.com/mbox/"},{"id":136860,"url":"https://patchwork.plctlab.org/api/1.2/patches/136860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824180459.465060-1-patrick@rivosinc.com/","msgid":"<20230824180459.465060-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-24T18:04:59","name":"RISC-V: Move vector-abi testcases into rvv/base folder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824180459.465060-1-patrick@rivosinc.com/mbox/"},{"id":136864,"url":"https://patchwork.plctlab.org/api/1.2/patches/136864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824183919.2485913-1-vultkayn@gcc.gnu.org/","msgid":"<20230824183919.2485913-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-24T18:39:20","name":"analyzer: Move gcc.dg/analyzer tests to c-c++-common (1).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824183919.2485913-1-vultkayn@gcc.gnu.org/mbox/"},{"id":136866,"url":"https://patchwork.plctlab.org/api/1.2/patches/136866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-1-apinski@marvell.com/","msgid":"<20230824191455.3547513-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:53","name":"[1/3] MATCH: Move `a ? one_zero : one_zero` matching after min/max matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-1-apinski@marvell.com/mbox/"},{"id":136865,"url":"https://patchwork.plctlab.org/api/1.2/patches/136865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-2-apinski@marvell.com/","msgid":"<20230824191455.3547513-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:54","name":"[2/3] MATCH: `a | C -> C` when we know that `a & ~C == 0`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-2-apinski@marvell.com/mbox/"},{"id":136867,"url":"https://patchwork.plctlab.org/api/1.2/patches/136867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-3-apinski@marvell.com/","msgid":"<20230824191455.3547513-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:55","name":"[3/3] PHIOPT: Allow BIT_AND and BIT_IOR in early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-3-apinski@marvell.com/mbox/"},{"id":136871,"url":"https://patchwork.plctlab.org/api/1.2/patches/136871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfe8e7a86de86b9ad1198418f93064484587b742.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T19:53:29","name":"[ver,3] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfe8e7a86de86b9ad1198418f93064484587b742.camel@us.ibm.com/mbox/"},{"id":136873,"url":"https://patchwork.plctlab.org/api/1.2/patches/136873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4afmk1bUhsEdOHumd_7h0r-1kSQhVS6=uxfh2kKKH+Hxw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T20:26:28","name":"[committed] i386: Optimize pinsrq of 0 with index 1 into movq [PR94866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4afmk1bUhsEdOHumd_7h0r-1kSQhVS6=uxfh2kKKH+Hxw@mail.gmail.com/mbox/"},{"id":136880,"url":"https://patchwork.plctlab.org/api/1.2/patches/136880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824211957.671151-1-ewlu@rivosinc.com/","msgid":"<20230824211957.671151-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-24T21:19:05","name":"[V2] RISC-V: Add Types to Un-Typed Sync Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824211957.671151-1-ewlu@rivosinc.com/mbox/"},{"id":136883,"url":"https://patchwork.plctlab.org/api/1.2/patches/136883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-805c458b-39ea-45ab-bc59-6331fd8b952e-1692912489967@3c-app-gmx-bap48/","msgid":"","list_archive_url":null,"date":"2023-08-24T21:28:10","name":"Fortran: improve bounds checking for DATA with implied-do [PR35095]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-805c458b-39ea-45ab-bc59-6331fd8b952e-1692912489967@3c-app-gmx-bap48/mbox/"},{"id":136887,"url":"https://patchwork.plctlab.org/api/1.2/patches/136887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825014833.3971482-1-pan2.li@intel.com/","msgid":"<20230825014833.3971482-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-25T01:48:33","name":"[v1] RISC-V: Support rounding mode for VFNMADD/VFNMACC autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825014833.3971482-1-pan2.li@intel.com/mbox/"},{"id":136888,"url":"https://patchwork.plctlab.org/api/1.2/patches/136888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825015919.3478297-1-juzhe.zhong@rivai.ai/","msgid":"<20230825015919.3478297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-25T01:59:19","name":"RISC-V: Add early continue for ENTRY and EXIT block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825015919.3478297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136890,"url":"https://patchwork.plctlab.org/api/1.2/patches/136890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825020520.3485365-1-lehua.ding@rivai.ai/","msgid":"<20230825020520.3485365-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-25T02:05:20","name":"[V2] RISC-V: Add conditional autovec convert(INT<->INT) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825020520.3485365-1-lehua.ding@rivai.ai/mbox/"},{"id":136892,"url":"https://patchwork.plctlab.org/api/1.2/patches/136892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825030720.3495607-1-juzhe.zhong@rivai.ai/","msgid":"<20230825030720.3495607-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-25T03:07:20","name":"[V3] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825030720.3495607-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136894,"url":"https://patchwork.plctlab.org/api/1.2/patches/136894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825040156.9209-1-chenglulu@loongson.cn/","msgid":"<20230825040156.9209-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-25T04:01:56","name":"[v1] LoongArch: Remove the symbolic extension instruction due to the SLT directive.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825040156.9209-1-chenglulu@loongson.cn/mbox/"},{"id":136895,"url":"https://patchwork.plctlab.org/api/1.2/patches/136895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044357.1669621-1-hongtao.liu@intel.com/","msgid":"<20230825044357.1669621-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-25T04:43:57","name":"Use vmaskmov{ps, pd} for VI48_128_256 when TARGET_AVX2 is not available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044357.1669621-1-hongtao.liu@intel.com/mbox/"},{"id":136896,"url":"https://patchwork.plctlab.org/api/1.2/patches/136896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044712.348608-1-yangyujie@loongson.cn/","msgid":"<20230825044712.348608-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-25T04:46:05","name":"[PING] LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044712.348608-1-yangyujie@loongson.cn/mbox/"},{"id":136898,"url":"https://patchwork.plctlab.org/api/1.2/patches/136898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825051614.2125893-1-vineetg@rivosinc.com/","msgid":"<20230825051614.2125893-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T05:16:14","name":"[v2] RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825051614.2125893-1-vineetg@rivosinc.com/mbox/"},{"id":136906,"url":"https://patchwork.plctlab.org/api/1.2/patches/136906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com/","msgid":"<68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-25T06:44:26","name":"[PATCH-1,rs6000] Enable SImode in FP register on P7 [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com/mbox/"},{"id":136907,"url":"https://patchwork.plctlab.org/api/1.2/patches/136907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfb389e5-079c-4557-fb8a-e041c4bf739e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T06:44:45","name":"[PATCH-2,rs6000] Implement 32bit inline lrint [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfb389e5-079c-4557-fb8a-e041c4bf739e@linux.ibm.com/mbox/"},{"id":136908,"url":"https://patchwork.plctlab.org/api/1.2/patches/136908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825080204.3531681-1-lehua.ding@rivai.ai/","msgid":"<20230825080204.3531681-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-25T08:02:04","name":"RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825080204.3531681-1-lehua.ding@rivai.ai/mbox/"},{"id":136909,"url":"https://patchwork.plctlab.org/api/1.2/patches/136909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825081408.C9C121340A@imap2.suse-dmz.suse.de/","msgid":"<20230825081408.C9C121340A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T08:14:08","name":"tree-optimization/111136 - STMT_VINFO_SLP_VECT_ONLY and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825081408.C9C121340A@imap2.suse-dmz.suse.de/mbox/"},{"id":136910,"url":"https://patchwork.plctlab.org/api/1.2/patches/136910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YM0vVaVE6YHFstFormuBJ-Ff+2iG9rRj8KaaRD2i5atA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T08:24:44","name":"[committed] treewide: Rename TRUE/FALSE to true/false in *.cc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YM0vVaVE6YHFstFormuBJ-Ff+2iG9rRj8KaaRD2i5atA@mail.gmail.com/mbox/"},{"id":136911,"url":"https://patchwork.plctlab.org/api/1.2/patches/136911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZNDHY-ihh-Vh72CohZ3izNgpg6L5raUogXONKTqS=2Sg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T08:26:31","name":"fortran: Rename TRUE/FALSE to true/false in *.cc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZNDHY-ihh-Vh72CohZ3izNgpg6L5raUogXONKTqS=2Sg@mail.gmail.com/mbox/"},{"id":136912,"url":"https://patchwork.plctlab.org/api/1.2/patches/136912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825093156.14808-1-chenglulu@loongson.cn/","msgid":"<20230825093156.14808-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-25T09:31:57","name":"[v2] LoongArch: Remove redundant sign extension instructions caused by SLT instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825093156.14808-1-chenglulu@loongson.cn/mbox/"},{"id":136913,"url":"https://patchwork.plctlab.org/api/1.2/patches/136913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825111532.F27E6138F9@imap2.suse-dmz.suse.de/","msgid":"<20230825111532.F27E6138F9@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T11:15:32","name":"Apply some TLC to vect_slp_analyze_instance_dependence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825111532.F27E6138F9@imap2.suse-dmz.suse.de/mbox/"},{"id":136914,"url":"https://patchwork.plctlab.org/api/1.2/patches/136914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825123728.531381340A@imap2.suse-dmz.suse.de/","msgid":"<20230825123728.531381340A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T12:37:27","name":"tree-optimization/111137 - dependence checking for SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825123728.531381340A@imap2.suse-dmz.suse.de/mbox/"},{"id":136916,"url":"https://patchwork.plctlab.org/api/1.2/patches/136916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825124433.3279791-1-dmalcolm@redhat.com/","msgid":"<20230825124433.3279791-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-25T12:44:33","name":"[pushed] analyzer: fix ICE in text art strings support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825124433.3279791-1-dmalcolm@redhat.com/mbox/"},{"id":136923,"url":"https://patchwork.plctlab.org/api/1.2/patches/136923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-2-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:23","name":"[V3,1/3] Provide counted_by attribute to flexible array member field (PR108896)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-2-qing.zhao@oracle.com/mbox/"},{"id":136924,"url":"https://patchwork.plctlab.org/api/1.2/patches/136924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-3-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:24","name":"[V3,2/3] Use the counted_by atribute info in builtin object size [PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-3-qing.zhao@oracle.com/mbox/"},{"id":136925,"url":"https://patchwork.plctlab.org/api/1.2/patches/136925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-4-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:25","name":"[V3,3/3] Use the counted_by attribute information in bound sanitizer[PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-4-qing.zhao@oracle.com/mbox/"},{"id":136926,"url":"https://patchwork.plctlab.org/api/1.2/patches/136926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825162122.3599370-1-apinski@marvell.com/","msgid":"<20230825162122.3599370-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-25T16:21:22","name":"MATCH: Move `(X & ~Y) | (~X & Y)` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825162122.3599370-1-apinski@marvell.com/mbox/"},{"id":136927,"url":"https://patchwork.plctlab.org/api/1.2/patches/136927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825163331.3231278-1-ppalka@redhat.com/","msgid":"<20230825163331.3231278-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-25T16:33:31","name":"c++: use conversion_obstack_sentinel throughout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825163331.3231278-1-ppalka@redhat.com/mbox/"},{"id":136928,"url":"https://patchwork.plctlab.org/api/1.2/patches/136928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825164447.480720-1-polacek@redhat.com/","msgid":"<20230825164447.480720-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-25T16:44:47","name":"c++: CWG 2359, wrong copy-init with designated init [PR91319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825164447.480720-1-polacek@redhat.com/mbox/"},{"id":136930,"url":"https://patchwork.plctlab.org/api/1.2/patches/136930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825174146.3372968-1-ppalka@redhat.com/","msgid":"<20230825174146.3372968-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-25T17:41:45","name":"c++: more dummy non_constant_p arg avoidance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825174146.3372968-1-ppalka@redhat.com/mbox/"},{"id":136931,"url":"https://patchwork.plctlab.org/api/1.2/patches/136931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1f0b94e-602b-6f52-090a-6baac5b61b6b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T18:17:22","name":"[wwwdocs] projects/gomp: Update implementation status and minor fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1f0b94e-602b-6f52-090a-6baac5b61b6b@codesourcery.com/mbox/"},{"id":136932,"url":"https://patchwork.plctlab.org/api/1.2/patches/136932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825183312.3604580-1-apinski@marvell.com/","msgid":"<20230825183312.3604580-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-25T18:33:12","name":"[COMMITTEDv2] MATCH: Move `a ? one_zero : one_zero` matching after min/max matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825183312.3604580-1-apinski@marvell.com/mbox/"},{"id":136933,"url":"https://patchwork.plctlab.org/api/1.2/patches/136933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825192428.2165663-1-vineetg@rivosinc.com/","msgid":"<20230825192428.2165663-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T19:24:28","name":"[Committed] RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825192428.2165663-1-vineetg@rivosinc.com/mbox/"},{"id":136934,"url":"https://patchwork.plctlab.org/api/1.2/patches/136934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-2-sandra@codesourcery.com/","msgid":"<20230825194714.627157-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:09","name":"[COMMITTED,V3,1/6] OpenMP: Add OMP_STRUCTURED_BLOCK and GIMPLE_OMP_STRUCTURED_BLOCK.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-2-sandra@codesourcery.com/mbox/"},{"id":136937,"url":"https://patchwork.plctlab.org/api/1.2/patches/136937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-3-sandra@codesourcery.com/","msgid":"<20230825194714.627157-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:10","name":"[COMMITTED,V3,2/6] OpenMP: C front end support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-3-sandra@codesourcery.com/mbox/"},{"id":136935,"url":"https://patchwork.plctlab.org/api/1.2/patches/136935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-4-sandra@codesourcery.com/","msgid":"<20230825194714.627157-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:11","name":"[COMMITTED,V3,3/6] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-4-sandra@codesourcery.com/mbox/"},{"id":136938,"url":"https://patchwork.plctlab.org/api/1.2/patches/136938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-5-sandra@codesourcery.com/","msgid":"<20230825194714.627157-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:12","name":"[COMMITTED,V3,4/6] OpenMP: New C/C++ testcases for imperfectly nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-5-sandra@codesourcery.com/mbox/"},{"id":136939,"url":"https://patchwork.plctlab.org/api/1.2/patches/136939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-6-sandra@codesourcery.com/","msgid":"<20230825194714.627157-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:13","name":"[COMMITTED,V3,5/6] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-6-sandra@codesourcery.com/mbox/"},{"id":136936,"url":"https://patchwork.plctlab.org/api/1.2/patches/136936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-7-sandra@codesourcery.com/","msgid":"<20230825194714.627157-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:14","name":"[COMMITTED,V3,6/6] OpenMP: Document support for imperfectly-nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-7-sandra@codesourcery.com/mbox/"},{"id":136940,"url":"https://patchwork.plctlab.org/api/1.2/patches/136940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkQeH+HvpO8+iFY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-25T20:35:04","name":"c++: Implement C++ DR 2406 - [[fallthrough]] attribute and iteration statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkQeH+HvpO8+iFY@tucnak/mbox/"},{"id":136941,"url":"https://patchwork.plctlab.org/api/1.2/patches/136941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825204554.2440771-1-lhyatt@gmail.com/","msgid":"<20230825204554.2440771-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-25T20:45:54","name":"testsuite: Add test for already-fixed issue with _Pragma expansion [PR90400]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825204554.2440771-1-lhyatt@gmail.com/mbox/"},{"id":136942,"url":"https://patchwork.plctlab.org/api/1.2/patches/136942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkT1OwRjZWBntFR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-25T20:49:24","name":"c++: Implement C++26 P1854R4 - Making non-encodable string literals ill-formed [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkT1OwRjZWBntFR@tucnak/mbox/"},{"id":136945,"url":"https://patchwork.plctlab.org/api/1.2/patches/136945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe44ae1c-93a9-9aea-b233-46082269f896@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T22:30:00","name":"[committed] RISC-V: Fix minor testsuite problem with zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe44ae1c-93a9-9aea-b233-46082269f896@ventanamicro.com/mbox/"},{"id":136946,"url":"https://patchwork.plctlab.org/api/1.2/patches/136946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com/","msgid":"<10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com>","list_archive_url":null,"date":"2023-08-25T22:36:22","name":"[committed] RISC-V: Make stack_save_restore tests more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com/mbox/"},{"id":136947,"url":"https://patchwork.plctlab.org/api/1.2/patches/136947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825233746.904433-1-polacek@redhat.com/","msgid":"<20230825233746.904433-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-25T23:37:46","name":"c++: tweaks for explicit conversion fns diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825233746.904433-1-polacek@redhat.com/mbox/"},{"id":136948,"url":"https://patchwork.plctlab.org/api/1.2/patches/136948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825234238.86902-1-ewlu@rivosinc.com/","msgid":"<20230825234238.86902-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T23:42:20","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825234238.86902-1-ewlu@rivosinc.com/mbox/"},{"id":136952,"url":"https://patchwork.plctlab.org/api/1.2/patches/136952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021252.3623978-1-apinski@marvell.com/","msgid":"<20230826021252.3623978-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-26T02:12:52","name":"Fix phi-opt-34.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021252.3623978-1-apinski@marvell.com/mbox/"},{"id":136953,"url":"https://patchwork.plctlab.org/api/1.2/patches/136953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021458.3624086-1-apinski@marvell.com/","msgid":"<20230826021458.3624086-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-26T02:14:58","name":"PHIOPT: Add dump for match and simplify and early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021458.3624086-1-apinski@marvell.com/mbox/"},{"id":136954,"url":"https://patchwork.plctlab.org/api/1.2/patches/136954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOndysJuo9q/Y5+8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-26T11:11:06","name":"libcpp: Small incremental patch for P1854R4 [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOndysJuo9q/Y5+8@tucnak/mbox/"},{"id":136955,"url":"https://patchwork.plctlab.org/api/1.2/patches/136955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826122219.2310080-1-vultkayn@gcc.gnu.org/","msgid":"<20230826122219.2310080-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-26T12:22:21","name":"[v2] analyzer: Move gcc.dg/analyzer tests to c-c++-common (1) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826122219.2310080-1-vultkayn@gcc.gnu.org/mbox/"},{"id":136956,"url":"https://patchwork.plctlab.org/api/1.2/patches/136956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826133634.610777-1-pan2.li@intel.com/","msgid":"<20230826133634.610777-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-26T13:36:34","name":"[v2] Mode-Switching: Add optional EMIT_AFTER hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826133634.610777-1-pan2.li@intel.com/mbox/"},{"id":136957,"url":"https://patchwork.plctlab.org/api/1.2/patches/136957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at/","msgid":"<1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:20:57","name":"[C,1/6] c: reorganize recursive type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at/mbox/"},{"id":136958,"url":"https://patchwork.plctlab.org/api/1.2/patches/136958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at/","msgid":"<97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:22:12","name":"[C,2/6] c23: recursive type checking of tagged type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at/mbox/"},{"id":136959,"url":"https://patchwork.plctlab.org/api/1.2/patches/136959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at/","msgid":"<00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:23:10","name":"[C,3/6] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at/mbox/"},{"id":136960,"url":"https://patchwork.plctlab.org/api/1.2/patches/136960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at/","msgid":"<525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:24:04","name":"[C,4/6] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at/mbox/"},{"id":136961,"url":"https://patchwork.plctlab.org/api/1.2/patches/136961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at/","msgid":"<340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:25:18","name":"[C,5/6] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at/mbox/"},{"id":136962,"url":"https://patchwork.plctlab.org/api/1.2/patches/136962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at/","msgid":"<748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:26:06","name":"[C,6/6] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at/mbox/"},{"id":136963,"url":"https://patchwork.plctlab.org/api/1.2/patches/136963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at/","msgid":"<157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:26:55","name":"[C] c: flag for tag compatibility rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at/mbox/"},{"id":136985,"url":"https://patchwork.plctlab.org/api/1.2/patches/136985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com/","msgid":"<0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T18:40:36","name":"[committed] RISC-V: Fix xtheadcondmov-indirect.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com/mbox/"},{"id":136986,"url":"https://patchwork.plctlab.org/api/1.2/patches/136986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com/","msgid":"<8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T18:54:16","name":"[committed] RISC-V: Fix spill-12 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com/mbox/"},{"id":136987,"url":"https://patchwork.plctlab.org/api/1.2/patches/136987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com/","msgid":"<8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T19:01:45","name":"[committed] RISC-V: Fix spill-11.c testsuite failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com/mbox/"},{"id":136988,"url":"https://patchwork.plctlab.org/api/1.2/patches/136988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827192246.2514665-1-mikael@gcc.gnu.org/","msgid":"<20230827192246.2514665-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-27T19:22:46","name":"fortran: Restore interface to its previous state on error [PR48776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827192246.2514665-1-mikael@gcc.gnu.org/mbox/"},{"id":136989,"url":"https://patchwork.plctlab.org/api/1.2/patches/136989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827225754.3733610-1-apinski@marvell.com/","msgid":"<20230827225754.3733610-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-27T22:57:54","name":"IFCOMBINE: Remove outer condition for two same conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827225754.3733610-1-apinski@marvell.com/mbox/"},{"id":136991,"url":"https://patchwork.plctlab.org/api/1.2/patches/136991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828014840.1421800-1-juzhe.zhong@rivai.ai/","msgid":"<20230828014840.1421800-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T01:48:40","name":"RISC-V: Fix VSETVL test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828014840.1421800-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136993,"url":"https://patchwork.plctlab.org/api/1.2/patches/136993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828030715.2310469-1-guojiufu@linux.ibm.com/","msgid":"<20230828030715.2310469-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-28T03:07:15","name":"rs6000: mark tieable between INT and FLOAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828030715.2310469-1-guojiufu@linux.ibm.com/mbox/"},{"id":136994,"url":"https://patchwork.plctlab.org/api/1.2/patches/136994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828031217.2801549-1-juzhe.zhong@rivai.ai/","msgid":"<20230828031217.2801549-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T03:12:17","name":"RISC-V: Enable vec_init testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828031217.2801549-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136995,"url":"https://patchwork.plctlab.org/api/1.2/patches/136995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034514.22681-1-chenglulu@loongson.cn/","msgid":"<20230828034514.22681-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-28T03:45:15","name":"[v1] LoongArch: Enable '\''-free'\'' starting at -O2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034514.22681-1-chenglulu@loongson.cn/mbox/"},{"id":136996,"url":"https://patchwork.plctlab.org/api/1.2/patches/136996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034652.22768-1-chenglulu@loongson.cn/","msgid":"<20230828034652.22768-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-28T03:46:53","name":"[v2] LoongArch: Enable '\''-free'\'' starting at -O2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034652.22768-1-chenglulu@loongson.cn/mbox/"},{"id":137003,"url":"https://patchwork.plctlab.org/api/1.2/patches/137003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828035253.3745942-1-apinski@marvell.com/","msgid":"<20230828035253.3745942-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T03:52:53","name":"MATCH: Remove redundant pattern for `(x | y) & ~x`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828035253.3745942-1-apinski@marvell.com/mbox/"},{"id":137005,"url":"https://patchwork.plctlab.org/api/1.2/patches/137005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828061701.466521-1-aldyh@redhat.com/","msgid":"<20230828061701.466521-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-28T06:16:31","name":"[COMMITTED,frange] Handle relations in LTGT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828061701.466521-1-aldyh@redhat.com/mbox/"},{"id":137007,"url":"https://patchwork.plctlab.org/api/1.2/patches/137007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828071421.2049438-1-juzhe.zhong@rivai.ai/","msgid":"<20230828071421.2049438-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T07:14:21","name":"[V2] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828071421.2049438-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137008,"url":"https://patchwork.plctlab.org/api/1.2/patches/137008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-2-gaofei@eswincomputing.com/","msgid":"<20230828074759.21049-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-28T07:47:58","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-2-gaofei@eswincomputing.com/mbox/"},{"id":137009,"url":"https://patchwork.plctlab.org/api/1.2/patches/137009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-3-gaofei@eswincomputing.com/","msgid":"<20230828074759.21049-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-28T07:47:59","name":"[2/2,V5,RISC-V] support cm.push cm.pop cm.popret in zcmp and resolve confilct with shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-3-gaofei@eswincomputing.com/mbox/"},{"id":137012,"url":"https://patchwork.plctlab.org/api/1.2/patches/137012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828080749.2064182-1-juzhe.zhong@rivai.ai/","msgid":"<20230828080749.2064182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T08:07:49","name":"RISC-V: Disable user vsetvl fusion into EMPTY block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828080749.2064182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137016,"url":"https://patchwork.plctlab.org/api/1.2/patches/137016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240086D3865DD3F4F4D4F99E8E0A@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-08-28T09:35:00","name":"alias-analyis: try to find ADDR_EXPR for SSA_NAME ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240086D3865DD3F4F4D4F99E8E0A@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":137017,"url":"https://patchwork.plctlab.org/api/1.2/patches/137017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828095319.2083553-1-juzhe.zhong@rivai.ai/","msgid":"<20230828095319.2083553-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T09:53:19","name":"[V2] RISC-V: Disable user vsetvl fusion into EMPTY or DIRTY (Polluted EMPTY) block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828095319.2083553-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137018,"url":"https://patchwork.plctlab.org/api/1.2/patches/137018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828101619.3023065-1-juzhe.zhong@rivai.ai/","msgid":"<20230828101619.3023065-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T10:16:19","name":"[V3] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828101619.3023065-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137026,"url":"https://patchwork.plctlab.org/api/1.2/patches/137026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114005.2100796-1-juzhe.zhong@rivai.ai/","msgid":"<20230828114005.2100796-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T11:40:05","name":"RISC-V: Fix uninitialized probability for GIMPLE IR tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114005.2100796-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137027,"url":"https://patchwork.plctlab.org/api/1.2/patches/137027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114249.2917296-1-juzhe.zhong@rivai.ai/","msgid":"<20230828114249.2917296-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T11:42:49","name":"[V4] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114249.2917296-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137037,"url":"https://patchwork.plctlab.org/api/1.2/patches/137037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyn+6C9ImVbp+TA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T13:58:19","name":"c++, v2: Fix up mangling of function/block scope static structured bindings and emit abi tags [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyn+6C9ImVbp+TA@tucnak/mbox/"},{"id":137038,"url":"https://patchwork.plctlab.org/api/1.2/patches/137038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyokMq0swI+Yqe6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T14:00:48","name":"libcpp, v2: Small incremental patch for P1854R4 [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyokMq0swI+Yqe6@tucnak/mbox/"},{"id":137043,"url":"https://patchwork.plctlab.org/api/1.2/patches/137043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOywZN6bAUr/4nqK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T14:34:12","name":"[RFC] > WIDE_INT_MAX_PREC support in wide-int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOywZN6bAUr/4nqK@tucnak/mbox/"},{"id":137044,"url":"https://patchwork.plctlab.org/api/1.2/patches/137044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828143744.7574-1-manos.anagnostakis@vrull.eu/","msgid":"<20230828143744.7574-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-08-28T14:37:44","name":"[v2] aarch64: Fine-grained ldp and stp policies with test-cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828143744.7574-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":137071,"url":"https://patchwork.plctlab.org/api/1.2/patches/137071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828190432.2530773-1-ewlu@rivosinc.com/","msgid":"<20230828190432.2530773-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-28T19:03:15","name":"RISC-V: Add Types to Un-Typed Vector Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828190432.2530773-1-ewlu@rivosinc.com/mbox/"},{"id":137076,"url":"https://patchwork.plctlab.org/api/1.2/patches/137076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828193053.3783698-1-apinski@marvell.com/","msgid":"<20230828193053.3783698-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T19:30:53","name":"Fix cond-bool-2.c on powerpc and other targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828193053.3783698-1-apinski@marvell.com/mbox/"},{"id":137077,"url":"https://patchwork.plctlab.org/api/1.2/patches/137077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com/","msgid":"<7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-28T20:00:48","name":"[ver,4] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com/mbox/"},{"id":137079,"url":"https://patchwork.plctlab.org/api/1.2/patches/137079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828201402.3786409-1-apinski@marvell.com/","msgid":"<20230828201402.3786409-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T20:14:02","name":"MATCH: Move `(x | y) & (~x ^ y)` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828201402.3786409-1-apinski@marvell.com/mbox/"},{"id":137089,"url":"https://patchwork.plctlab.org/api/1.2/patches/137089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO0syEImf05gXw9J@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-28T23:24:56","name":"[v2] c++: tweaks for explicit conversion fns diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO0syEImf05gXw9J@redhat.com/mbox/"},{"id":137091,"url":"https://patchwork.plctlab.org/api/1.2/patches/137091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023642.154907-1-juzhe.zhong@rivai.ai/","msgid":"<20230829023642.154907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T02:36:42","name":"RISC-V: Fix AVL/VL get ICE[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023642.154907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137092,"url":"https://patchwork.plctlab.org/api/1.2/patches/137092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023715.155656-1-lehua.ding@rivai.ai/","msgid":"<20230829023715.155656-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T02:37:15","name":"[COMMITTED,V3] RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023715.155656-1-lehua.ding@rivai.ai/mbox/"},{"id":137093,"url":"https://patchwork.plctlab.org/api/1.2/patches/137093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com/","msgid":"<528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com>","list_archive_url":null,"date":"2023-08-29T02:50:08","name":"[rs6000] Call vector load/store with length expand only on 64-bit Power10 [PR96762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com/mbox/"},{"id":137094,"url":"https://patchwork.plctlab.org/api/1.2/patches/137094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829032228.1277784-1-juzhe.zhong@rivai.ai/","msgid":"<20230829032228.1277784-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:22:28","name":"RISC-V: Fix ASM check of vlmax_switch_vtype-16.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829032228.1277784-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137095,"url":"https://patchwork.plctlab.org/api/1.2/patches/137095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d496232ba289fc98cac4fd7139f50826d6969548.1693279731.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T03:28:56","name":"[v2] RISC-V: Make PR 102957 tests more comprehensive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d496232ba289fc98cac4fd7139f50826d6969548.1693279731.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137096,"url":"https://patchwork.plctlab.org/api/1.2/patches/137096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com/","msgid":"<1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:31:02","name":"RISC-V: Make arch-24.c to test \"success\" case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137097,"url":"https://patchwork.plctlab.org/api/1.2/patches/137097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"<19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:39:31","name":"[v3,1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137098,"url":"https://patchwork.plctlab.org/api/1.2/patches/137098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e8da2e7c301dc17870b98c2684be1ace3a847a.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T03:39:32","name":"[v3,2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e8da2e7c301dc17870b98c2684be1ace3a847a.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137099,"url":"https://patchwork.plctlab.org/api/1.2/patches/137099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"<50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:39:33","name":"[v3,3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137100,"url":"https://patchwork.plctlab.org/api/1.2/patches/137100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com/","msgid":"<1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:40:52","name":"[1/1] RISC-V: Imply '\''Zicsr'\'' from '\''Zcmt'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137101,"url":"https://patchwork.plctlab.org/api/1.2/patches/137101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034321.174885-1-lehua.ding@rivai.ai/","msgid":"<20230829034321.174885-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:43:21","name":"[V2] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034321.174885-1-lehua.ding@rivai.ai/mbox/"},{"id":137102,"url":"https://patchwork.plctlab.org/api/1.2/patches/137102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034522.175560-1-lehua.ding@rivai.ai/","msgid":"<20230829034522.175560-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:45:22","name":"[V3] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034522.175560-1-lehua.ding@rivai.ai/mbox/"},{"id":137103,"url":"https://patchwork.plctlab.org/api/1.2/patches/137103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYYP286MB1473877CFCA93B60E1651C1BAEE7A@TYYP286MB1473.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-08-29T05:25:07","name":"doc: Add fpatchable-function-entry to Option-Summary page[PR110983]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYYP286MB1473877CFCA93B60E1651C1BAEE7A@TYYP286MB1473.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":137105,"url":"https://patchwork.plctlab.org/api/1.2/patches/137105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829065102.3279474-1-juzhe.zhong@rivai.ai/","msgid":"<20230829065102.3279474-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T06:51:02","name":"vect test: Remove xfail for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829065102.3279474-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137106,"url":"https://patchwork.plctlab.org/api/1.2/patches/137106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829075100.621-1-jinma@linux.alibaba.com/","msgid":"<20230829075100.621-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-29T07:51:00","name":"RISC-V: Added zvfh support for zfa extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829075100.621-1-jinma@linux.alibaba.com/mbox/"},{"id":137107,"url":"https://patchwork.plctlab.org/api/1.2/patches/137107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO2m/wC1le8HupRf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-29T08:06:23","name":"tree-ssa-math-opts: Improve uaddc/usubc pattern matching [PR111209]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO2m/wC1le8HupRf@tucnak/mbox/"},{"id":137109,"url":"https://patchwork.plctlab.org/api/1.2/patches/137109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-2-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:44","name":"[1/3,V6,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-2-gaofei@eswincomputing.com/mbox/"},{"id":137110,"url":"https://patchwork.plctlab.org/api/1.2/patches/137110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-3-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:45","name":"[2/3,V2,RISC-V] support cm.popretz in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-3-gaofei@eswincomputing.com/mbox/"},{"id":137108,"url":"https://patchwork.plctlab.org/api/1.2/patches/137108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-4-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:46","name":"[3/3,V2,RISC-V] support cm.mva01s cm.mvsa01 in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-4-gaofei@eswincomputing.com/mbox/"},{"id":137111,"url":"https://patchwork.plctlab.org/api/1.2/patches/137111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829093933.515708-1-juzhe.zhong@rivai.ai/","msgid":"<20230829093933.515708-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T09:39:33","name":"RISC-V: Remove movmisalign pattern for VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829093933.515708-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137113,"url":"https://patchwork.plctlab.org/api/1.2/patches/137113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829100738.2479550-1-juzhe.zhong@rivai.ai/","msgid":"<20230829100738.2479550-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T10:07:38","name":"RISC-V: Enable movmisalign for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829100738.2479550-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137114,"url":"https://patchwork.plctlab.org/api/1.2/patches/137114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829104921.4117031-1-pan2.li@intel.com/","msgid":"<20230829104921.4117031-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-29T10:49:21","name":"[v1] RISC-V: Fix one ICE for vect test vect-multitypes-5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829104921.4117031-1-pan2.li@intel.com/mbox/"},{"id":137115,"url":"https://patchwork.plctlab.org/api/1.2/patches/137115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2242694d4f868ec04c9766878762c5b466b0670.1693308232.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T11:23:53","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2242694d4f868ec04c9766878762c5b466b0670.1693308232.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137116,"url":"https://patchwork.plctlab.org/api/1.2/patches/137116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a84c14b1b71f6976614db5d92d2dfadb@gcc.mail.kapsi.fi/","msgid":"","list_archive_url":null,"date":"2023-08-29T12:04:46","name":"libstdc++: Fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a84c14b1b71f6976614db5d92d2dfadb@gcc.mail.kapsi.fi/mbox/"},{"id":137117,"url":"https://patchwork.plctlab.org/api/1.2/patches/137117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO30PQql2TablzpJ@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-29T13:35:57","name":"c++: Check for indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO30PQql2TablzpJ@Thaum.localdomain/mbox/"},{"id":137118,"url":"https://patchwork.plctlab.org/api/1.2/patches/137118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829150223.3824839-1-dmalcolm@redhat.com/","msgid":"<20230829150223.3824839-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-29T15:02:23","name":"[pushed] analyzer: improve strdup handling [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829150223.3824839-1-dmalcolm@redhat.com/mbox/"},{"id":137121,"url":"https://patchwork.plctlab.org/api/1.2/patches/137121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpMKSj-yvpWP5fyDhSivkYSwnf4zG5FLZfQ82s0m0x4+w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T15:40:30","name":"RFC: RISC-V sign extension dead code elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpMKSj-yvpWP5fyDhSivkYSwnf4zG5FLZfQ82s0m0x4+w@mail.gmail.com/mbox/"},{"id":137120,"url":"https://patchwork.plctlab.org/api/1.2/patches/137120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm356emd.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T15:40:42","name":"attribs: Use existing traits for excl_hash_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm356emd.fsf@arm.com/mbox/"},{"id":137122,"url":"https://patchwork.plctlab.org/api/1.2/patches/137122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8363377-75b2-ad5d-5388-54c585dfaf39@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T16:12:58","name":"OpenMP (C only): omp allocate - handle stack vars, improve diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8363377-75b2-ad5d-5388-54c585dfaf39@codesourcery.com/mbox/"},{"id":137123,"url":"https://patchwork.plctlab.org/api/1.2/patches/137123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829172818.3264-1-ef2648@columbia.edu/","msgid":"<20230829172818.3264-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-29T17:28:18","name":"analyzer: implement reference count checking for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829172818.3264-1-ef2648@columbia.edu/mbox/"},{"id":137124,"url":"https://patchwork.plctlab.org/api/1.2/patches/137124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829190156.56643-1-polacek@redhat.com/","msgid":"<20230829190156.56643-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-29T19:01:56","name":"c++: disallow constinit on functions [PR111173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829190156.56643-1-polacek@redhat.com/mbox/"},{"id":137125,"url":"https://patchwork.plctlab.org/api/1.2/patches/137125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO5KI3AIKG9PDiEL@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T19:42:27","name":"RFC: Introduce -fhardened to enable security-related flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO5KI3AIKG9PDiEL@redhat.com/mbox/"},{"id":137126,"url":"https://patchwork.plctlab.org/api/1.2/patches/137126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829221757.3870381-1-dmalcolm@redhat.com/","msgid":"<20230829221757.3870381-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-29T22:17:57","name":"[pushed] analyzer: new warning: -Wanalyzer-overlapping-buffers [PR99860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829221757.3870381-1-dmalcolm@redhat.com/mbox/"},{"id":137127,"url":"https://patchwork.plctlab.org/api/1.2/patches/137127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1a33efe-c43a-f4f5-ea04-38e60e4f9c83@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T23:02:27","name":"[committed] RISC-V: Use splitter to generate zicond in another case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1a33efe-c43a-f4f5-ea04-38e60e4f9c83@ventanamicro.com/mbox/"},{"id":137129,"url":"https://patchwork.plctlab.org/api/1.2/patches/137129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830011256.1898667-1-yanzhang.wang@intel.com/","msgid":"<20230830011256.1898667-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-08-30T01:09:04","name":"Bug 111071: fix the subr with -1 to not due to the simplify.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830011256.1898667-1-yanzhang.wang@intel.com/mbox/"},{"id":137132,"url":"https://patchwork.plctlab.org/api/1.2/patches/137132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-2-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:43","name":"[V3,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-2-lehua.ding@rivai.ai/mbox/"},{"id":137134,"url":"https://patchwork.plctlab.org/api/1.2/patches/137134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-3-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:44","name":"[V3,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-3-lehua.ding@rivai.ai/mbox/"},{"id":137133,"url":"https://patchwork.plctlab.org/api/1.2/patches/137133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-4-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:45","name":"[V3,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-4-lehua.ding@rivai.ai/mbox/"},{"id":137138,"url":"https://patchwork.plctlab.org/api/1.2/patches/137138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-2-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:05","name":"[v2,1/4] LoongArch: improved target configuration interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-2-yangyujie@loongson.cn/mbox/"},{"id":137137,"url":"https://patchwork.plctlab.org/api/1.2/patches/137137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-3-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:06","name":"[v2,2/4] LoongArch: define preprocessing macros \"__loongarch_{arch, tune}\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-3-yangyujie@loongson.cn/mbox/"},{"id":137136,"url":"https://patchwork.plctlab.org/api/1.2/patches/137136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-4-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:07","name":"[v2,3/4] LoongArch: add new configure option --with-strict-align-lib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-4-yangyujie@loongson.cn/mbox/"},{"id":137139,"url":"https://patchwork.plctlab.org/api/1.2/patches/137139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-5-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:08","name":"[v2,4/4] LoongArch: support loongarch*-elf target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-5-yangyujie@loongson.cn/mbox/"},{"id":137140,"url":"https://patchwork.plctlab.org/api/1.2/patches/137140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830022211.2242563-1-juzhe.zhong@rivai.ai/","msgid":"<20230830022211.2242563-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T02:22:11","name":"RISC-V: Make sure we get VL REG operand for VLMAX vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830022211.2242563-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137142,"url":"https://patchwork.plctlab.org/api/1.2/patches/137142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830031201.1901364-1-juzhe.zhong@rivai.ai/","msgid":"<20230830031201.1901364-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T03:12:01","name":"middle-end: Apply MASK_LEN_LOAD_LANES/MASK_LEN_STORE_LANES to ivopts/alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830031201.1901364-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137143,"url":"https://patchwork.plctlab.org/api/1.2/patches/137143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830050307.20356-1-palmer@rivosinc.com/","msgid":"<20230830050307.20356-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-08-30T05:03:07","name":"RISC-V: Document some -march special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830050307.20356-1-palmer@rivosinc.com/mbox/"},{"id":137145,"url":"https://patchwork.plctlab.org/api/1.2/patches/137145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com/","msgid":"<2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-30T06:44:12","name":"[RFC] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137146,"url":"https://patchwork.plctlab.org/api/1.2/patches/137146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-1-guojiufu@linux.ibm.com/","msgid":"<20230830074314.1539093-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T07:43:13","name":"[V4,1/2] rs6000: optimize moving to sf from highpart di","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-1-guojiufu@linux.ibm.com/mbox/"},{"id":137147,"url":"https://patchwork.plctlab.org/api/1.2/patches/137147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-2-guojiufu@linux.ibm.com/","msgid":"<20230830074314.1539093-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T07:43:14","name":"[V4,2/2] rs6000: use mtvsrws to move sf from si p9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-2-guojiufu@linux.ibm.com/mbox/"},{"id":137148,"url":"https://patchwork.plctlab.org/api/1.2/patches/137148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO72LPw2t5Kqbdh7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-30T07:56:28","name":"store-merging: Fix up >= 64 bit insertion [PR111015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO72LPw2t5Kqbdh7@tucnak/mbox/"},{"id":137149,"url":"https://patchwork.plctlab.org/api/1.2/patches/137149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830075653.356338-1-juzhe.zhong@rivai.ai/","msgid":"<20230830075653.356338-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T07:56:53","name":"[V5] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830075653.356338-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137150,"url":"https://patchwork.plctlab.org/api/1.2/patches/137150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830083403.3190749-1-juzhe.zhong@rivai.ai/","msgid":"<20230830083403.3190749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T08:34:03","name":"test: Add xfail for riscv_vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830083403.3190749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137151,"url":"https://patchwork.plctlab.org/api/1.2/patches/137151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO8AwqFXrkBrCAOV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-30T08:41:38","name":"tree-ssa-strlen: Fix up handling of conditionally zero memcpy [PR110914]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO8AwqFXrkBrCAOV@tucnak/mbox/"},{"id":137152,"url":"https://patchwork.plctlab.org/api/1.2/patches/137152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830084444.869230-1-hongtao.liu@intel.com/","msgid":"<20230830084444.869230-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-30T08:44:44","name":"Refactor vector HF/BF mode iterators and patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830084444.869230-1-hongtao.liu@intel.com/mbox/"},{"id":137153,"url":"https://patchwork.plctlab.org/api/1.2/patches/137153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com/","msgid":"<9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com>","list_archive_url":null,"date":"2023-08-30T09:06:17","name":"[1/8] parloops: Copy target and optimizations when creating a function clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com/mbox/"},{"id":137154,"url":"https://patchwork.plctlab.org/api/1.2/patches/137154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com/","msgid":"<0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com>","list_archive_url":null,"date":"2023-08-30T09:08:27","name":"[2/8] parloops: Allow poly nit and bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com/mbox/"},{"id":137155,"url":"https://patchwork.plctlab.org/api/1.2/patches/137155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com/","msgid":"<6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com>","list_archive_url":null,"date":"2023-08-30T09:10:10","name":"[3/8] vect: Fix vect_get_smallest_scalar_type for simd clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com/mbox/"},{"id":137156,"url":"https://patchwork.plctlab.org/api/1.2/patches/137156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49eca251-630e-b26c-5d66-4f8b322ee801@arm.com/","msgid":"<49eca251-630e-b26c-5d66-4f8b322ee801@arm.com>","list_archive_url":null,"date":"2023-08-30T09:11:55","name":"[4/8] vect: don'\''t allow fully masked loops with non-masked simd clones [PR 110485]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49eca251-630e-b26c-5d66-4f8b322ee801@arm.com/mbox/"},{"id":137157,"url":"https://patchwork.plctlab.org/api/1.2/patches/137157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d96af71e-d8e8-0bff-d502-5e54768ac774@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T09:13:27","name":"[5/8] vect: Use inbranch simdclones in masked loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d96af71e-d8e8-0bff-d502-5e54768ac774@arm.com/mbox/"},{"id":137158,"url":"https://patchwork.plctlab.org/api/1.2/patches/137158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com/","msgid":"<4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com>","list_archive_url":null,"date":"2023-08-30T09:14:38","name":"[6/8] vect: Add vector_mode paramater to simd_clone_usable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com/mbox/"},{"id":137159,"url":"https://patchwork.plctlab.org/api/1.2/patches/137159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a65c1f78-1159-d6df-c355-d6f92032ccd2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T09:17:39","name":"[PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a65c1f78-1159-d6df-c355-d6f92032ccd2@arm.com/mbox/"},{"id":137160,"url":"https://patchwork.plctlab.org/api/1.2/patches/137160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com/","msgid":"<25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com>","list_archive_url":null,"date":"2023-08-30T09:19:46","name":"[8/8] aarch64: Add SVE support for simd clones [PR 96342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com/mbox/"},{"id":137161,"url":"https://patchwork.plctlab.org/api/1.2/patches/137161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095134.3571077-1-lehua.ding@rivai.ai/","msgid":"<20230830095134.3571077-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T09:51:34","name":"RISC-V: Fix vsetvl pass ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095134.3571077-1-lehua.ding@rivai.ai/mbox/"},{"id":137162,"url":"https://patchwork.plctlab.org/api/1.2/patches/137162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095253.3571536-1-juzhe.zhong@rivai.ai/","msgid":"<20230830095253.3571536-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T09:52:53","name":"test: Fix XPASS of RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095253.3571536-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137163,"url":"https://patchwork.plctlab.org/api/1.2/patches/137163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-2-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:57","name":"[v3,1/4] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-2-manolis.tsamis@vrull.eu/mbox/"},{"id":137164,"url":"https://patchwork.plctlab.org/api/1.2/patches/137164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-3-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:58","name":"[v3,2/4] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-3-manolis.tsamis@vrull.eu/mbox/"},{"id":137166,"url":"https://patchwork.plctlab.org/api/1.2/patches/137166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-4-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-4-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:59","name":"[v3,3/4] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-4-manolis.tsamis@vrull.eu/mbox/"},{"id":137165,"url":"https://patchwork.plctlab.org/api/1.2/patches/137165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-5-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-5-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:14:00","name":"[v3,4/4] ifcvt: Remove obsolete code for subreg handling in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-5-manolis.tsamis@vrull.eu/mbox/"},{"id":137167,"url":"https://patchwork.plctlab.org/api/1.2/patches/137167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830103516.882926-1-hongtao.liu@intel.com/","msgid":"<20230830103516.882926-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-30T10:35:16","name":"Adjust costing of emulated vectorized gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830103516.882926-1-hongtao.liu@intel.com/mbox/"},{"id":137168,"url":"https://patchwork.plctlab.org/api/1.2/patches/137168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830111835.1288365-1-juzhe.zhong@rivai.ai/","msgid":"<20230830111835.1288365-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:18:35","name":"test: Adapt slp-26.c check for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830111835.1288365-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137169,"url":"https://patchwork.plctlab.org/api/1.2/patches/137169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830114941.1294882-1-juzhe.zhong@rivai.ai/","msgid":"<20230830114941.1294882-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:49:41","name":"test: Add xfail into slp-reduc-7.c for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830114941.1294882-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137170,"url":"https://patchwork.plctlab.org/api/1.2/patches/137170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115327.1296036-1-lehua.ding@rivai.ai/","msgid":"<20230830115327.1296036-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:53:27","name":"RISC-V: Refactor and clean emit_{vlmax, nonvlmax}_xxx functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115327.1296036-1-lehua.ding@rivai.ai/mbox/"},{"id":137171,"url":"https://patchwork.plctlab.org/api/1.2/patches/137171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115447.3E5611353E@imap2.suse-dmz.suse.de/","msgid":"<20230830115447.3E5611353E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-30T11:54:46","name":"tree-optimization/111228 - combine two VEC_PERM_EXPRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115447.3E5611353E@imap2.suse-dmz.suse.de/mbox/"},{"id":137172,"url":"https://patchwork.plctlab.org/api/1.2/patches/137172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830120549.1628109-1-juzhe.zhong@rivai.ai/","msgid":"<20230830120549.1628109-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T12:05:49","name":"[V6] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830120549.1628109-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137173,"url":"https://patchwork.plctlab.org/api/1.2/patches/137173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e52abe71-2364-32e7-d29a-dc05452a06f5@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T12:22:13","name":"expmed: Allow extract_bit_field via mem for low-precision modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e52abe71-2364-32e7-d29a-dc05452a06f5@gmail.com/mbox/"},{"id":137194,"url":"https://patchwork.plctlab.org/api/1.2/patches/137194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830190646.969939-1-dimitar@dinux.eu/","msgid":"<20230830190646.969939-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-08-30T19:06:46","name":"[committed] pru: Add cstore expansion patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830190646.969939-1-dimitar@dinux.eu/mbox/"},{"id":137215,"url":"https://patchwork.plctlab.org/api/1.2/patches/137215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830215708.369610-1-vineetg@rivosinc.com/","msgid":"<20230830215708.369610-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-30T21:57:08","name":"RISC-V: zicond: remove bogus opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830215708.369610-1-vineetg@rivosinc.com/mbox/"},{"id":137216,"url":"https://patchwork.plctlab.org/api/1.2/patches/137216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830222511.685346-1-apinski@marvell.com/","msgid":"<20230830222511.685346-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-30T22:25:11","name":"MATCH: extend min_value/max_value match to vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830222511.685346-1-apinski@marvell.com/mbox/"},{"id":137217,"url":"https://patchwork.plctlab.org/api/1.2/patches/137217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com/","msgid":"<36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T22:42:50","name":"rs6000: Update instruction counts to match vec_* calls [PR111228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com/mbox/"},{"id":137218,"url":"https://patchwork.plctlab.org/api/1.2/patches/137218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com/","msgid":"<2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-30T22:54:57","name":"[RFC,v2,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137221,"url":"https://patchwork.plctlab.org/api/1.2/patches/137221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831024657.57063-1-chenxiaolong@loongson.cn/","msgid":"<20230831024657.57063-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-31T02:46:57","name":"[v4] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831024657.57063-1-chenxiaolong@loongson.cn/mbox/"},{"id":137225,"url":"https://patchwork.plctlab.org/api/1.2/patches/137225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831033113.28028-1-wangfeng@eswincomputing.com/","msgid":"<20230831033113.28028-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T03:31:13","name":"[v2] RISC-V: Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831033113.28028-1-wangfeng@eswincomputing.com/mbox/"},{"id":137226,"url":"https://patchwork.plctlab.org/api/1.2/patches/137226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831050132.733545-1-claziss@gmail.com/","msgid":"<20230831050132.733545-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-08-31T05:01:32","name":"[committed] arc: Honor SWAP option for lsl16 instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831050132.733545-1-claziss@gmail.com/mbox/"},{"id":137230,"url":"https://patchwork.plctlab.org/api/1.2/patches/137230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b_iIXwWwO63ZE1ZSZHUIAdWyA2sqGsE3FM7eXfsInWogDyBZRsw8CwNsvFSDmEVmBtdq0pqb4zJ55HN2JCR7boDNramlEfne-R5PWdUXjbA=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T06:02:36","name":"[1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b_iIXwWwO63ZE1ZSZHUIAdWyA2sqGsE3FM7eXfsInWogDyBZRsw8CwNsvFSDmEVmBtdq0pqb4zJ55HN2JCR7boDNramlEfne-R5PWdUXjbA=@protonmail.com/mbox/"},{"id":137231,"url":"https://patchwork.plctlab.org/api/1.2/patches/137231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-2-gaofei@eswincomputing.com/","msgid":"<20230831062402.6810-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T06:24:01","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-2-gaofei@eswincomputing.com/mbox/"},{"id":137232,"url":"https://patchwork.plctlab.org/api/1.2/patches/137232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-3-gaofei@eswincomputing.com/","msgid":"<20230831062402.6810-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T06:24:02","name":"[2/2,RISC-V] Enalble zcmp for -Os","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-3-gaofei@eswincomputing.com/mbox/"},{"id":137233,"url":"https://patchwork.plctlab.org/api/1.2/patches/137233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com/","msgid":"<1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com>","list_archive_url":null,"date":"2023-08-31T06:46:58","name":"[2/2] c++: Extended diagnostics for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com/mbox/"},{"id":137234,"url":"https://patchwork.plctlab.org/api/1.2/patches/137234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831070257.16848-1-chenxiaolong@loongson.cn/","msgid":"<20230831070257.16848-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-31T07:02:57","name":"[v5] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831070257.16848-1-chenxiaolong@loongson.cn/mbox/"},{"id":137235,"url":"https://patchwork.plctlab.org/api/1.2/patches/137235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPA/L5yBEUC3WZxu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T07:20:15","name":"c++: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPA/L5yBEUC3WZxu@tucnak/mbox/"},{"id":137236,"url":"https://patchwork.plctlab.org/api/1.2/patches/137236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPBKZyVxYKhGMBVY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T08:08:07","name":"[RFC] c++: Diagnose [basic.scope.block]/2 violations even for block externs [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPBKZyVxYKhGMBVY@tucnak/mbox/"},{"id":137241,"url":"https://patchwork.plctlab.org/api/1.2/patches/137241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-2-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:12","name":"[01/13,APX,EGPR] middle-end: Add insn argument to base_reg_class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-2-hongyu.wang@intel.com/mbox/"},{"id":137237,"url":"https://patchwork.plctlab.org/api/1.2/patches/137237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-3-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:13","name":"[02/13,APX,EGPR] middle-end: Add index_reg_class with insn argument.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-3-hongyu.wang@intel.com/mbox/"},{"id":137240,"url":"https://patchwork.plctlab.org/api/1.2/patches/137240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-4-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:14","name":"[03/13,APX_EGPR] Initial support for APX_F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-4-hongyu.wang@intel.com/mbox/"},{"id":137245,"url":"https://patchwork.plctlab.org/api/1.2/patches/137245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-5-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:15","name":"[04/13,APX,EGPR] Add 16 new integer general purpose registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-5-hongyu.wang@intel.com/mbox/"},{"id":137243,"url":"https://patchwork.plctlab.org/api/1.2/patches/137243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-6-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:16","name":"[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-6-hongyu.wang@intel.com/mbox/"},{"id":137239,"url":"https://patchwork.plctlab.org/api/1.2/patches/137239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-7-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:17","name":"[06/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-7-hongyu.wang@intel.com/mbox/"},{"id":137244,"url":"https://patchwork.plctlab.org/api/1.2/patches/137244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-8-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:18","name":"[07/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-8-hongyu.wang@intel.com/mbox/"},{"id":137238,"url":"https://patchwork.plctlab.org/api/1.2/patches/137238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-9-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:19","name":"[08/13,APX,EGPR] Handle GPR16 only vector move insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-9-hongyu.wang@intel.com/mbox/"},{"id":137246,"url":"https://patchwork.plctlab.org/api/1.2/patches/137246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-10-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:20","name":"[09/13,APX,EGPR] Handle legacy insn that only support GPR16 (1/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-10-hongyu.wang@intel.com/mbox/"},{"id":137247,"url":"https://patchwork.plctlab.org/api/1.2/patches/137247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-11-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:21","name":"[10/13,APX,EGPR] Handle legacy insns that only support GPR16 (2/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-11-hongyu.wang@intel.com/mbox/"},{"id":137242,"url":"https://patchwork.plctlab.org/api/1.2/patches/137242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-12-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:22","name":"[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-12-hongyu.wang@intel.com/mbox/"},{"id":137248,"url":"https://patchwork.plctlab.org/api/1.2/patches/137248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-13-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:23","name":"[12/13,APX_EGPR] Handle legacy insns that only support GPR16 (4/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-13-hongyu.wang@intel.com/mbox/"},{"id":137249,"url":"https://patchwork.plctlab.org/api/1.2/patches/137249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-14-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:24","name":"[13/13,APX,EGPR] Handle vex insns that only support GPR16 (5/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-14-hongyu.wang@intel.com/mbox/"},{"id":137252,"url":"https://patchwork.plctlab.org/api/1.2/patches/137252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090547.71737-1-kito.cheng@sifive.com/","msgid":"<20230831090547.71737-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-08-31T09:05:47","name":"RISC-V: Emit .note.GNU-stack for non-linux target as well","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090547.71737-1-kito.cheng@sifive.com/mbox/"},{"id":137253,"url":"https://patchwork.plctlab.org/api/1.2/patches/137253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090621.2687116-1-lehua.ding@rivai.ai/","msgid":"<20230831090621.2687116-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-31T09:06:21","name":"RISC-V: Change vsetvl tail and mask policy to default policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090621.2687116-1-lehua.ding@rivai.ai/mbox/"},{"id":137254,"url":"https://patchwork.plctlab.org/api/1.2/patches/137254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-3-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:15","name":"[v6,2/4] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-3-panchenghui@loongson.cn/mbox/"},{"id":137255,"url":"https://patchwork.plctlab.org/api/1.2/patches/137255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-4-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:16","name":"[v6,3/4] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-4-panchenghui@loongson.cn/mbox/"},{"id":137256,"url":"https://patchwork.plctlab.org/api/1.2/patches/137256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-5-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:17","name":"[v6,4/4] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-5-panchenghui@loongson.cn/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/mbox/"},{"id":30,"url":"https://patchwork.plctlab.org/api/1.2/bundles/30/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-09/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-09","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":137303,"url":"https://patchwork.plctlab.org/api/1.2/patches/137303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedjjz1hs.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:15:59","name":"aarch64: Fix return register handling in untyped_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedjjz1hs.fsf@arm.com/mbox/"},{"id":137305,"url":"https://patchwork.plctlab.org/api/1.2/patches/137305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qfjz13s.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:24:23","name":"lra: Avoid unfolded plus-0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qfjz13s.fsf@arm.com/mbox/"},{"id":137307,"url":"https://patchwork.plctlab.org/api/1.2/patches/137307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPS5khaviCHFDt8SNrL3GRy6WKmTSUW4PRBAhVAZ5LzkSqk47w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:25:45","name":"libstdc++: Use GLIBCXX_CHECK_LINKER_FEATURES for cross-builds (PR111238)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPS5khaviCHFDt8SNrL3GRy6WKmTSUW4PRBAhVAZ5LzkSqk47w@mail.gmail.com/mbox/"},{"id":137328,"url":"https://patchwork.plctlab.org/api/1.2/patches/137328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831172410.731800-1-apinski@marvell.com/","msgid":"<20230831172410.731800-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-31T17:24:10","name":"MATCH [PR19832]: Optimize some `(a != b) ? a OP b : c`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831172410.731800-1-apinski@marvell.com/mbox/"},{"id":137331,"url":"https://patchwork.plctlab.org/api/1.2/patches/137331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173218.583040-1-ewlu@rivosinc.com/","msgid":"<20230831173218.583040-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T17:32:01","name":"RISC-V: Add Types to Un-Typed Risc-v Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173218.583040-1-ewlu@rivosinc.com/mbox/"},{"id":137332,"url":"https://patchwork.plctlab.org/api/1.2/patches/137332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173637.583424-1-ewlu@rivosinc.com/","msgid":"<20230831173637.583424-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T17:36:26","name":"RISC-V Add Types to Un-Typed Thead Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173637.583424-1-ewlu@rivosinc.com/mbox/"},{"id":137338,"url":"https://patchwork.plctlab.org/api/1.2/patches/137338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPDmi9mJYR6l8cJx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T19:14:19","name":"c++, v3: Fix up mangling of function/block scope static structured bindings and emit abi tags [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPDmi9mJYR6l8cJx@tucnak/mbox/"},{"id":137347,"url":"https://patchwork.plctlab.org/api/1.2/patches/137347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b7254ea8-17ae-420c-8b4a-756e3fe2a5f1-1693514575672@3c-app-gmx-bap28/","msgid":"","list_archive_url":null,"date":"2023-08-31T20:42:55","name":"Fortran: runtime bounds-checking in presence of array constructors [PR31059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b7254ea8-17ae-420c-8b4a-756e3fe2a5f1-1693514575672@3c-app-gmx-bap28/mbox/"},{"id":137353,"url":"https://patchwork.plctlab.org/api/1.2/patches/137353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831220452.3126200-1-vultkayn@gcc.gnu.org/","msgid":"<20230831220452.3126200-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-31T22:04:53","name":"analyzer: Add support of placement new and improved operator new [PR105948, PR94355]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831220452.3126200-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137361,"url":"https://patchwork.plctlab.org/api/1.2/patches/137361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831235713.1673863-1-ewlu@rivosinc.com/","msgid":"<20230831235713.1673863-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T23:01:43","name":"Add Types to Un-Typed Pic Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831235713.1673863-1-ewlu@rivosinc.com/mbox/"},{"id":137359,"url":"https://patchwork.plctlab.org/api/1.2/patches/137359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231000.1853225-1-juzhe.zhong@rivai.ai/","msgid":"<20230831231000.1853225-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-31T23:10:00","name":"RISC-V: Enable VECT_COMPARE_COSTS by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231000.1853225-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137360,"url":"https://patchwork.plctlab.org/api/1.2/patches/137360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231217.1853555-1-juzhe.zhong@rivai.ai/","msgid":"<20230831231217.1853555-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-31T23:12:17","name":"RISC-V: Add dynamic LMUL compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231217.1853555-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137362,"url":"https://patchwork.plctlab.org/api/1.2/patches/137362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901022632.754088-1-apinski@marvell.com/","msgid":"<20230901022632.754088-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T02:26:32","name":"MATCH: `(nop_convert)-a` into -(nop_convert)a if the negate is single use and a is known not to be signed min value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901022632.754088-1-apinski@marvell.com/mbox/"},{"id":137365,"url":"https://patchwork.plctlab.org/api/1.2/patches/137365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901032242.57839-1-chenxiaolong@loongson.cn/","msgid":"<20230901032242.57839-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-01T03:22:42","name":"[v6] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901032242.57839-1-chenxiaolong@loongson.cn/mbox/"},{"id":137366,"url":"https://patchwork.plctlab.org/api/1.2/patches/137366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901033332.1774189-1-pan2.li@intel.com/","msgid":"<20230901033332.1774189-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-01T03:33:32","name":"[v1] RISC-V: Support FP ADD/SUB/MUL/DIV autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901033332.1774189-1-pan2.li@intel.com/mbox/"},{"id":137369,"url":"https://patchwork.plctlab.org/api/1.2/patches/137369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-2-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:48","name":"[1/4] RISC-V: Adjust expand_cond_len_{unary,binop,op} api","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-2-lehua.ding@rivai.ai/mbox/"},{"id":137370,"url":"https://patchwork.plctlab.org/api/1.2/patches/137370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-3-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:49","name":"[2/4] RISC-V: Add conditional autovec convert(INT<->INT) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-3-lehua.ding@rivai.ai/mbox/"},{"id":137371,"url":"https://patchwork.plctlab.org/api/1.2/patches/137371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-4-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:50","name":"[3/4] RISC-V: Add conditional autovec convert(FP<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-4-lehua.ding@rivai.ai/mbox/"},{"id":137372,"url":"https://patchwork.plctlab.org/api/1.2/patches/137372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-5-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:51","name":"[4/4] RISC-V: Add conditional autovec convert(INT<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-5-lehua.ding@rivai.ai/mbox/"},{"id":137375,"url":"https://patchwork.plctlab.org/api/1.2/patches/137375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901091731.710880-1-guojiufu@linux.ibm.com/","msgid":"<20230901091731.710880-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-01T09:17:31","name":"[V6] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901091731.710880-1-guojiufu@linux.ibm.com/mbox/"},{"id":137376,"url":"https://patchwork.plctlab.org/api/1.2/patches/137376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c7fff1-1372-98c2-bada-3e732177262e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-01T09:55:55","name":"RISC-V: Add vec_extract for BI -> QI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c7fff1-1372-98c2-bada-3e732177262e@gmail.com/mbox/"},{"id":137377,"url":"https://patchwork.plctlab.org/api/1.2/patches/137377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901102006.511665-1-christoph.muellner@vrull.eu/","msgid":"<20230901102006.511665-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-01T10:20:06","name":"riscv: xtheadcondmov: Don'\''t run tests with -Oz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901102006.511665-1-christoph.muellner@vrull.eu/mbox/"},{"id":137379,"url":"https://patchwork.plctlab.org/api/1.2/patches/137379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105513.226352-1-jwakely@redhat.com/","msgid":"<20230901105513.226352-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:00","name":"[committed] libstdc++: Simplify __format::_Sink::_M_reset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105513.226352-1-jwakely@redhat.com/mbox/"},{"id":137378,"url":"https://patchwork.plctlab.org/api/1.2/patches/137378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105519.226612-1-jwakely@redhat.com/","msgid":"<20230901105519.226612-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:15","name":"[committed] libstdc++: Do not allow chrono::parse to overflow for %C [PR111162]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105519.226612-1-jwakely@redhat.com/mbox/"},{"id":137380,"url":"https://patchwork.plctlab.org/api/1.2/patches/137380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105526.226787-1-jwakely@redhat.com/","msgid":"<20230901105526.226787-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:20","name":"[committed] libstdc++: Fix how chrono::parse handles errors for time-of-day values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105526.226787-1-jwakely@redhat.com/mbox/"},{"id":137381,"url":"https://patchwork.plctlab.org/api/1.2/patches/137381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111713.229441-1-jwakely@redhat.com/","msgid":"<20230901111713.229441-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T11:16:53","name":"[committed] libstdc++: Avoid useless dependency on read_symlink from tzdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111713.229441-1-jwakely@redhat.com/mbox/"},{"id":137382,"url":"https://patchwork.plctlab.org/api/1.2/patches/137382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111722.229474-1-jwakely@redhat.com/","msgid":"<20230901111722.229474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T11:17:14","name":"[committed] libstdc++: Use dg-require-filesystem-ts in link test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111722.229474-1-jwakely@redhat.com/mbox/"},{"id":137383,"url":"https://patchwork.plctlab.org/api/1.2/patches/137383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-1-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:07","name":"[v5,1/4] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-1-kmatsui@gcc.gnu.org/mbox/"},{"id":137384,"url":"https://patchwork.plctlab.org/api/1.2/patches/137384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-2-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:08","name":"[v5,2/4] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137385,"url":"https://patchwork.plctlab.org/api/1.2/patches/137385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-3-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:09","name":"[v5,3/4] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137386,"url":"https://patchwork.plctlab.org/api/1.2/patches/137386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-4-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:10","name":"[v5,4/4] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-4-kmatsui@gcc.gnu.org/mbox/"},{"id":137387,"url":"https://patchwork.plctlab.org/api/1.2/patches/137387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHXiqquRCNCREoX@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:22:34","name":"[v2] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHXiqquRCNCREoX@Thaum.localdomain/mbox/"},{"id":137388,"url":"https://patchwork.plctlab.org/api/1.2/patches/137388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYXvh9dleHKnOR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:26:06","name":"[committed] testsuite: Fix up pr110915* tests on i686-linux [PR110915]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYXvh9dleHKnOR@tucnak/mbox/"},{"id":137389,"url":"https://patchwork.plctlab.org/api/1.2/patches/137389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYujtfjzFl2xR6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:27:38","name":"[committed] testsuite: Fix vectcond-1.C FAIL on i686-linux [PR19832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYujtfjzFl2xR6@tucnak/mbox/"},{"id":137392,"url":"https://patchwork.plctlab.org/api/1.2/patches/137392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17716-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:55:03","name":"AArch64 xorsign: Fix scalar xorsign lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17716-tamar@arm.com/mbox/"},{"id":137393,"url":"https://patchwork.plctlab.org/api/1.2/patches/137393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-2-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:01","name":"[v8,1/4] spec: add a spec function to join arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-2-ben.boeckel@kitware.com/mbox/"},{"id":137395,"url":"https://patchwork.plctlab.org/api/1.2/patches/137395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-3-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:02","name":"[v8,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-3-ben.boeckel@kitware.com/mbox/"},{"id":137394,"url":"https://patchwork.plctlab.org/api/1.2/patches/137394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-4-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:03","name":"[v8,3/4] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-4-ben.boeckel@kitware.com/mbox/"},{"id":137396,"url":"https://patchwork.plctlab.org/api/1.2/patches/137396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHmJl9P/CX5JViM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T13:24:54","name":"c++, v2: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHmJl9P/CX5JViM@tucnak/mbox/"},{"id":137397,"url":"https://patchwork.plctlab.org/api/1.2/patches/137397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHoWgZhqZFQP8cX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T13:34:18","name":"c++, v2: Diagnose [basic.scope.block]/2 violations even for block externs [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHoWgZhqZFQP8cX@tucnak/mbox/"},{"id":137399,"url":"https://patchwork.plctlab.org/api/1.2/patches/137399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPH2dPVbDTDFSBpr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T14:34:28","name":"c++, v3: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPH2dPVbDTDFSBpr@tucnak/mbox/"},{"id":137400,"url":"https://patchwork.plctlab.org/api/1.2/patches/137400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150244.253651-1-jwakely@redhat.com/","msgid":"<20230901150244.253651-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T15:02:19","name":"[committed] libstdc++: Use a loop in atomic_ref::compare_exchange_strong [PR111077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150244.253651-1-jwakely@redhat.com/mbox/"},{"id":137401,"url":"https://patchwork.plctlab.org/api/1.2/patches/137401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150253.253679-1-jwakely@redhat.com/","msgid":"<20230901150253.253679-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T15:02:45","name":"[committed] libstdc++: Use std::string::__resize_and_overwrite in std::filesystem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150253.253679-1-jwakely@redhat.com/mbox/"},{"id":137402,"url":"https://patchwork.plctlab.org/api/1.2/patches/137402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165608.283038-1-jwakely@redhat.com/","msgid":"<20230901165608.283038-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T16:55:51","name":"[committed] libstdc++: Add -Wno-self-move to two filesystem tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165608.283038-1-jwakely@redhat.com/mbox/"},{"id":137403,"url":"https://patchwork.plctlab.org/api/1.2/patches/137403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165613.283062-1-jwakely@redhat.com/","msgid":"<20230901165613.283062-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T16:56:09","name":"[committed] libstdc++: Fix debug-mode tests for constexpr algorithms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165613.283062-1-jwakely@redhat.com/mbox/"},{"id":137404,"url":"https://patchwork.plctlab.org/api/1.2/patches/137404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901172348.445289-1-polacek@redhat.com/","msgid":"<20230901172348.445289-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-01T17:23:48","name":"c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901172348.445289-1-polacek@redhat.com/mbox/"},{"id":137405,"url":"https://patchwork.plctlab.org/api/1.2/patches/137405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-1-apinski@marvell.com/","msgid":"<20230901173059.791894-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T17:30:58","name":"[1/2] VR-VALUES: Rename op0/op1 to op1/op2 for test_for_singularity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-1-apinski@marvell.com/mbox/"},{"id":137406,"url":"https://patchwork.plctlab.org/api/1.2/patches/137406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-2-apinski@marvell.com/","msgid":"<20230901173059.791894-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T17:30:59","name":"[2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-2-apinski@marvell.com/mbox/"},{"id":137407,"url":"https://patchwork.plctlab.org/api/1.2/patches/137407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901185011.154880-1-someguy@effective-light.com/","msgid":"<20230901185011.154880-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-01T18:50:11","name":"c: don'\''t emit -Wmissing-variable-declarations for register variables [PR110947]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901185011.154880-1-someguy@effective-light.com/mbox/"},{"id":137408,"url":"https://patchwork.plctlab.org/api/1.2/patches/137408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901190241.157034-1-someguy@effective-light.com/","msgid":"<20230901190241.157034-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-01T19:02:41","name":"[v2] c: don'\''t emit -Wmissing-variable-declarations for register variables [PR110947]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901190241.157034-1-someguy@effective-light.com/mbox/"},{"id":137409,"url":"https://patchwork.plctlab.org/api/1.2/patches/137409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901191654.320202-1-mikael@gcc.gnu.org/","msgid":"<20230901191654.320202-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T19:16:54","name":"diagnostics: Delete config pointer before overwriting it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901191654.320202-1-mikael@gcc.gnu.org/mbox/"},{"id":137410,"url":"https://patchwork.plctlab.org/api/1.2/patches/137410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195311.761131-1-vineetg@rivosinc.com/","msgid":"<20230901195311.761131-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-09-01T19:53:11","name":"[v2] RISC-V: zicond: Fix opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195311.761131-1-vineetg@rivosinc.com/mbox/"},{"id":137411,"url":"https://patchwork.plctlab.org/api/1.2/patches/137411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195905.2800474-1-vultkayn@gcc.gnu.org/","msgid":"<20230901195905.2800474-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T19:59:06","name":"analyzer: call off a superseding when diagnostics are unrelated [PR110830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195905.2800474-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137413,"url":"https://patchwork.plctlab.org/api/1.2/patches/137413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901225329.6C62533E60@hamza.pair.com/","msgid":"<20230901225329.6C62533E60@hamza.pair.com>","list_archive_url":null,"date":"2023-09-01T22:53:27","name":"[pushed] wwwdocs: gcc-12: Improve language around vectorizer and -O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901225329.6C62533E60@hamza.pair.com/mbox/"},{"id":137414,"url":"https://patchwork.plctlab.org/api/1.2/patches/137414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902000001.873118-1-polacek@redhat.com/","msgid":"<20230902000001.873118-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-02T00:00:01","name":"c++: improve verify_constant diagnostic [PR91483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902000001.873118-1-polacek@redhat.com/mbox/"},{"id":137415,"url":"https://patchwork.plctlab.org/api/1.2/patches/137415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902023238.814338-1-apinski@marvell.com/","msgid":"<20230902023238.814338-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T02:32:38","name":"ssa_name_has_boolean_range vs signed-boolean:31 types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902023238.814338-1-apinski@marvell.com/mbox/"},{"id":137416,"url":"https://patchwork.plctlab.org/api/1.2/patches/137416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902044739.28996-1-guojie@loongson.cn/","msgid":"<20230902044739.28996-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-02T04:47:39","name":"LoongArch: Support loading floating-point zero into MEM[base + index].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902044739.28996-1-guojie@loongson.cn/mbox/"},{"id":137417,"url":"https://patchwork.plctlab.org/api/1.2/patches/137417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902062433.23804-1-chenglulu@loongson.cn/","msgid":"<20230902062433.23804-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-02T06:24:33","name":"[1/2] LoongArch: Optimize switch with sign-extended index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902062433.23804-1-chenglulu@loongson.cn/mbox/"},{"id":137420,"url":"https://patchwork.plctlab.org/api/1.2/patches/137420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070005.824764-1-apinski@marvell.com/","msgid":"<20230902070005.824764-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T07:00:05","name":"MATCH: `(nop_convert)-(convert)a` into -(convert)a if we are converting from something smaller","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070005.824764-1-apinski@marvell.com/mbox/"},{"id":137421,"url":"https://patchwork.plctlab.org/api/1.2/patches/137421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070207.31651-1-guojie@loongson.cn/","msgid":"<20230902070207.31651-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-02T07:02:07","name":"[v2] LoongArch: Support storing floating-point zero into MEM[base + index].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070207.31651-1-guojie@loongson.cn/mbox/"},{"id":137422,"url":"https://patchwork.plctlab.org/api/1.2/patches/137422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902085313.801607-1-pan2.li@intel.com/","msgid":"<20230902085313.801607-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-02T08:53:13","name":"[v1] RISC-V: Support FP MAX/MIN autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902085313.801607-1-pan2.li@intel.com/mbox/"},{"id":137423,"url":"https://patchwork.plctlab.org/api/1.2/patches/137423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902120138.909B133E4B@hamza.pair.com/","msgid":"<20230902120138.909B133E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-09-02T12:01:36","name":"[pushed] wwwdocs: *: Use \"back end\" instead of \"backend\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902120138.909B133E4B@hamza.pair.com/mbox/"},{"id":137425,"url":"https://patchwork.plctlab.org/api/1.2/patches/137425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-1-apinski@marvell.com/","msgid":"<20230902150957.845269-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:55","name":"[1/3] Improve ssa_name_has_boolean_range slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-1-apinski@marvell.com/mbox/"},{"id":137424,"url":"https://patchwork.plctlab.org/api/1.2/patches/137424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-2-apinski@marvell.com/","msgid":"<20230902150957.845269-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:56","name":"[2/3] MATCH: Improve zero_one_valued_p by using ssa_name_has_boolean_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-2-apinski@marvell.com/mbox/"},{"id":137426,"url":"https://patchwork.plctlab.org/api/1.2/patches/137426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-3-apinski@marvell.com/","msgid":"<20230902150957.845269-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:57","name":"[3/3] MATCH: Replace all uses of ssa_name_has_boolean_range with zero_one_valued_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-3-apinski@marvell.com/mbox/"},{"id":137429,"url":"https://patchwork.plctlab.org/api/1.2/patches/137429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903161819.907375-1-apinski@marvell.com/","msgid":"<20230903161819.907375-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T16:18:19","name":"Improve rewrite_to_defined_overflow for lhs already the correct type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903161819.907375-1-apinski@marvell.com/mbox/"},{"id":137430,"url":"https://patchwork.plctlab.org/api/1.2/patches/137430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903162554.908044-1-apinski@marvell.com/","msgid":"<20230903162554.908044-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T16:25:54","name":"MATCH: Transform `(1 >> X) !=/== 0` into `X ==/!= 0`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903162554.908044-1-apinski@marvell.com/mbox/"},{"id":137432,"url":"https://patchwork.plctlab.org/api/1.2/patches/137432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903184706.259231-1-dkm@kataplop.net/","msgid":"<20230903184706.259231-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-03T18:47:06","name":"[v3] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903184706.259231-1-dkm@kataplop.net/mbox/"},{"id":137433,"url":"https://patchwork.plctlab.org/api/1.2/patches/137433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903204947.918766-1-apinski@marvell.com/","msgid":"<20230903204947.918766-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T20:49:47","name":"MATCH: Add pattern for `(x | y) & (x & z)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903204947.918766-1-apinski@marvell.com/mbox/"},{"id":137434,"url":"https://patchwork.plctlab.org/api/1.2/patches/137434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com/","msgid":"<3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-04T00:20:45","name":"RISC-V: Fix Zicond ICE on large constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137435,"url":"https://patchwork.plctlab.org/api/1.2/patches/137435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904002135.928111-1-apinski@marvell.com/","msgid":"<20230904002135.928111-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-04T00:21:35","name":"MATCH: Add `~MAX(~X, Y)` pattern: [PR96694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904002135.928111-1-apinski@marvell.com/mbox/"},{"id":137436,"url":"https://patchwork.plctlab.org/api/1.2/patches/137436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904012536.930677-1-apinski@marvell.com/","msgid":"<20230904012536.930677-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-04T01:25:36","name":"MATCH: Add `(x | c) & ~(y | c)` and `x & ~(y | x)` patterns [PR98710]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904012536.930677-1-apinski@marvell.com/mbox/"},{"id":137437,"url":"https://patchwork.plctlab.org/api/1.2/patches/137437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904024210.64907-1-yangyujie@loongson.cn/","msgid":"<20230904024210.64907-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-04T02:42:10","name":"[v2] LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904024210.64907-1-yangyujie@loongson.cn/mbox/"},{"id":137438,"url":"https://patchwork.plctlab.org/api/1.2/patches/137438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904044906.2546875-1-lehua.ding@rivai.ai/","msgid":"<20230904044906.2546875-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-04T04:49:06","name":"RISC-V: Add conditional sqrt autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904044906.2546875-1-lehua.ding@rivai.ai/mbox/"},{"id":137440,"url":"https://patchwork.plctlab.org/api/1.2/patches/137440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com/","msgid":"<9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T05:33:28","name":"[PATCH-1v2,rs6000] Enable SImode in FP registers on P7 [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com/mbox/"},{"id":137439,"url":"https://patchwork.plctlab.org/api/1.2/patches/137439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com/","msgid":"<45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T05:33:45","name":"[PATCH-2v2,rs6000] Implement 32bit inline lrint [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com/mbox/"},{"id":137442,"url":"https://patchwork.plctlab.org/api/1.2/patches/137442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904071737.2736869-1-pan2.li@intel.com/","msgid":"<20230904071737.2736869-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-04T07:17:37","name":"[v1] RISC-V: Support FP16 for RVV VRGATHEREI16 intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904071737.2736869-1-pan2.li@intel.com/mbox/"},{"id":137443,"url":"https://patchwork.plctlab.org/api/1.2/patches/137443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com/","msgid":"<1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T07:57:42","name":"[3/4] Improve functionality of ree pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com/mbox/"},{"id":137444,"url":"https://patchwork.plctlab.org/api/1.2/patches/137444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904090834.148723-1-juzhe.zhong@rivai.ai/","msgid":"<20230904090834.148723-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-04T09:08:34","name":"RISC-V: Fix Dynamic LMUL compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904090834.148723-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137445,"url":"https://patchwork.plctlab.org/api/1.2/patches/137445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904101510.1380787-1-hongtao.liu@intel.com/","msgid":"<20230904101510.1380787-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-04T10:15:10","name":"Generate vmovsh instead of vpblendw for specific vec_merge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904101510.1380787-1-hongtao.liu@intel.com/mbox/"},{"id":137446,"url":"https://patchwork.plctlab.org/api/1.2/patches/137446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904104725.49994-1-iain@sandoe.co.uk/","msgid":"<20230904104725.49994-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T10:47:25","name":"[pushed] Darwin, machopic: Debug printer for macho symbol flags.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904104725.49994-1-iain@sandoe.co.uk/mbox/"},{"id":137447,"url":"https://patchwork.plctlab.org/api/1.2/patches/137447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904105759.17192-1-iain@sandoe.co.uk/","msgid":"<20230904105759.17192-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T10:57:59","name":"[pushed] Darwin: Match system sections and relocs for exception tables.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904105759.17192-1-iain@sandoe.co.uk/mbox/"},{"id":137448,"url":"https://patchwork.plctlab.org/api/1.2/patches/137448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904111410.3362365-1-lehua.ding@rivai.ai/","msgid":"<20230904111410.3362365-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-04T11:14:10","name":"RISC-V: Keep vlmax vector operators in simple form until split1 pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904111410.3362365-1-lehua.ding@rivai.ai/mbox/"},{"id":137449,"url":"https://patchwork.plctlab.org/api/1.2/patches/137449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904112957.8713-1-iain@sandoe.co.uk/","msgid":"<20230904112957.8713-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T11:29:57","name":"Darwin: Place global inits in the correct section.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904112957.8713-1-iain@sandoe.co.uk/mbox/"},{"id":137450,"url":"https://patchwork.plctlab.org/api/1.2/patches/137450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904113519.8865-1-iain@sandoe.co.uk/","msgid":"<20230904113519.8865-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T11:35:19","name":"[pushed] Darwin, ppc: Add system stubs for all 32b PPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904113519.8865-1-iain@sandoe.co.uk/mbox/"},{"id":137451,"url":"https://patchwork.plctlab.org/api/1.2/patches/137451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904123113.2087352-1-christophe.lyon@linaro.org/","msgid":"<20230904123113.2087352-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-04T12:31:13","name":"testsuite: Remove unwanted '\''dg-do run'\'' from gcc.dg/vect tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904123113.2087352-1-christophe.lyon@linaro.org/mbox/"},{"id":137452,"url":"https://patchwork.plctlab.org/api/1.2/patches/137452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-09-04T12:54:26","name":"Add '\''libgomp.c-c++-common/pr100059-1.c'\'' [PR100059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":137453,"url":"https://patchwork.plctlab.org/api/1.2/patches/137453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904134745.177632-1-juzhe.zhong@rivai.ai/","msgid":"<20230904134745.177632-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-04T13:47:45","name":"RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904134745.177632-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137454,"url":"https://patchwork.plctlab.org/api/1.2/patches/137454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkehx5x1.fsf@euler.schwinge.homeip.net/","msgid":"<87bkehx5x1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-04T16:24:42","name":"[WIP] nvptx: Also allow immediate input operand to '\''bitrev2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkehx5x1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137456,"url":"https://patchwork.plctlab.org/api/1.2/patches/137456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162909.515880-1-jwakely@redhat.com/","msgid":"<20230904162909.515880-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:28:48","name":"[committed] libstdc++: Add missing target selector to std::expected test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162909.515880-1-jwakely@redhat.com/mbox/"},{"id":137458,"url":"https://patchwork.plctlab.org/api/1.2/patches/137458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162914.515900-1-jwakely@redhat.com/","msgid":"<20230904162914.515900-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:10","name":"[committed] libstdc++: Add explicit -std=gnu++98 to tests that use { target c++98_only }","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162914.515900-1-jwakely@redhat.com/mbox/"},{"id":137455,"url":"https://patchwork.plctlab.org/api/1.2/patches/137455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162918.515915-1-jwakely@redhat.com/","msgid":"<20230904162918.515915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:15","name":"[committed] libstdc++: Add { target c++98_only } to tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162918.515915-1-jwakely@redhat.com/mbox/"},{"id":137457,"url":"https://patchwork.plctlab.org/api/1.2/patches/137457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162922.515929-1-jwakely@redhat.com/","msgid":"<20230904162922.515929-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:19","name":"[committed] libstdc++: Fix filenames and comments in tests [PR26142]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162922.515929-1-jwakely@redhat.com/mbox/"},{"id":137460,"url":"https://patchwork.plctlab.org/api/1.2/patches/137460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162926.515943-1-jwakely@redhat.com/","msgid":"<20230904162926.515943-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:23","name":"[committed] libstdc++: Enable std::auto_ptr tests for C++11 and later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162926.515943-1-jwakely@redhat.com/mbox/"},{"id":137459,"url":"https://patchwork.plctlab.org/api/1.2/patches/137459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162931.515957-1-jwakely@redhat.com/","msgid":"<20230904162931.515957-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:27","name":"[committed] libstdc++: Remove dg-options \"-std=c++98\" from TR1 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162931.515957-1-jwakely@redhat.com/mbox/"},{"id":137461,"url":"https://patchwork.plctlab.org/api/1.2/patches/137461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162936.515987-1-jwakely@redhat.com/","msgid":"<20230904162936.515987-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:32","name":"[committed] libstdc++: Remove unnecessary dg-options and outdated comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162936.515987-1-jwakely@redhat.com/mbox/"},{"id":137462,"url":"https://patchwork.plctlab.org/api/1.2/patches/137462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904171858.2660517-1-vultkayn@gcc.gnu.org/","msgid":"<20230904171858.2660517-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-04T17:18:59","name":"c++: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904171858.2660517-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137463,"url":"https://patchwork.plctlab.org/api/1.2/patches/137463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904180013.2680227-1-vultkayn@gcc.gnu.org/","msgid":"<20230904180013.2680227-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-04T18:00:14","name":"analyzer: Move gcc.dg/analyzer tests to c-c++-common (2) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904180013.2680227-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137464,"url":"https://patchwork.plctlab.org/api/1.2/patches/137464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-1-someguy@effective-light.com/","msgid":"<20230904185353.204611-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T18:53:52","name":"[1/2] strlen: fold strstr() even if the length isn'\''t previously known [PR96601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-1-someguy@effective-light.com/mbox/"},{"id":137465,"url":"https://patchwork.plctlab.org/api/1.2/patches/137465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-2-someguy@effective-light.com/","msgid":"<20230904185353.204611-2-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T18:53:53","name":"[2/2] strlen: call handle_builtin_strlen() from fold_strstr_to_strncmp()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-2-someguy@effective-light.com/mbox/"},{"id":137466,"url":"https://patchwork.plctlab.org/api/1.2/patches/137466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPYzJ03Dh62ug596@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-04T19:42:31","name":"[15/12] Add further _BitInt <-> floating point tests [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPYzJ03Dh62ug596@tucnak/mbox/"},{"id":137467,"url":"https://patchwork.plctlab.org/api/1.2/patches/137467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904195446.285310-1-dkm@kataplop.net/","msgid":"<20230904195446.285310-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-04T19:54:46","name":"[COMMITED,v4] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904195446.285310-1-dkm@kataplop.net/mbox/"},{"id":137468,"url":"https://patchwork.plctlab.org/api/1.2/patches/137468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-1-someguy@effective-light.com/","msgid":"<20230904205814.222166-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T20:58:13","name":"[v2,1/2] strlen: fold strstr() even if the length isn'\''t previously known [PR96601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-1-someguy@effective-light.com/mbox/"},{"id":137469,"url":"https://patchwork.plctlab.org/api/1.2/patches/137469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-2-someguy@effective-light.com/","msgid":"<20230904205814.222166-2-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T20:58:14","name":"[v2,2/2] strlen: call handle_builtin_strlen() from fold_strstr_to_strncmp()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-2-someguy@effective-light.com/mbox/"},{"id":137470,"url":"https://patchwork.plctlab.org/api/1.2/patches/137470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jk9wsxq.fsf@euler.schwinge.homeip.net/","msgid":"<874jk9wsxq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-04T21:05:05","name":"[WIP] testsuite: Port '\''check-function-bodies'\'' to nvptx (was: Add dg test for matching function bodies)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jk9wsxq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137471,"url":"https://patchwork.plctlab.org/api/1.2/patches/137471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905021334.39124-1-ef2648@columbia.edu/","msgid":"<20230905021334.39124-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-09-05T02:13:34","name":"analyzer: implement symbolic value support for CPython plugin'\''s refcnt checker [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905021334.39124-1-ef2648@columbia.edu/mbox/"},{"id":137475,"url":"https://patchwork.plctlab.org/api/1.2/patches/137475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905060348.4207-1-chenglulu@loongson.cn/","msgid":"<20230905060348.4207-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-05T06:03:49","name":"[v1] LoongArch: Optimized multiply instruction generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905060348.4207-1-chenglulu@loongson.cn/mbox/"},{"id":137476,"url":"https://patchwork.plctlab.org/api/1.2/patches/137476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbV3yNSwdFY6khb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:16:47","name":"[16/12] _BitInt profile fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbV3yNSwdFY6khb@tucnak/mbox/"},{"id":137477,"url":"https://patchwork.plctlab.org/api/1.2/patches/137477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbYgbXPHw1TkSZD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:28:01","name":"[17/12] _BitInt a ? ~b : b match.pd fix [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbYgbXPHw1TkSZD@tucnak/mbox/"},{"id":137478,"url":"https://patchwork.plctlab.org/api/1.2/patches/137478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbZGGqmV8L+/rni@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:30:32","name":"[18/12] Handle BITINT_TYPE in build_{, minus_}one_cst [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbZGGqmV8L+/rni@tucnak/mbox/"},{"id":137479,"url":"https://patchwork.plctlab.org/api/1.2/patches/137479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbaXTuV2ARYl4ew@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:35:57","name":"[committed] tree-ssa-tail-merge: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbaXTuV2ARYl4ew@tucnak/mbox/"},{"id":137481,"url":"https://patchwork.plctlab.org/api/1.2/patches/137481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-2-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:50","name":"[V5,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-2-lehua.ding@rivai.ai/mbox/"},{"id":137480,"url":"https://patchwork.plctlab.org/api/1.2/patches/137480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-3-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:51","name":"[V5,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-3-lehua.ding@rivai.ai/mbox/"},{"id":137482,"url":"https://patchwork.plctlab.org/api/1.2/patches/137482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-4-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:52","name":"[V5,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-4-lehua.ding@rivai.ai/mbox/"},{"id":137486,"url":"https://patchwork.plctlab.org/api/1.2/patches/137486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7tt4za.fsf@euler.schwinge.homeip.net/","msgid":"<87sf7tt4za.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-05T08:10:49","name":"GNU Tools Cauldron 2023","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7tt4za.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137487,"url":"https://patchwork.plctlab.org/api/1.2/patches/137487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-1-claziss@gmail.com/","msgid":"<20230905084234.114788-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-09-05T08:42:33","name":"[committed,1/2] arc: Remove obsolete mbbit-peephole option and unused patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-1-claziss@gmail.com/mbox/"},{"id":137488,"url":"https://patchwork.plctlab.org/api/1.2/patches/137488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-2-claziss@gmail.com/","msgid":"<20230905084234.114788-2-claziss@gmail.com>","list_archive_url":null,"date":"2023-09-05T08:42:34","name":"[committed,2/2] arc: Cleanup addsi3 instruction pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-2-claziss@gmail.com/mbox/"},{"id":137489,"url":"https://patchwork.plctlab.org/api/1.2/patches/137489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084725.1212443-1-juzhe.zhong@rivai.ai/","msgid":"<20230905084725.1212443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-05T08:47:25","name":"RISC-V: Export functions as global extern preparing for dynamic LMUL patch use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084725.1212443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137490,"url":"https://patchwork.plctlab.org/api/1.2/patches/137490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905085606.1216832-1-juzhe.zhong@rivai.ai/","msgid":"<20230905085606.1216832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-05T08:56:06","name":"[V2] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905085606.1216832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137494,"url":"https://patchwork.plctlab.org/api/1.2/patches/137494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp/","msgid":"<0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp>","list_archive_url":null,"date":"2023-09-05T09:27:35","name":"xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp/mbox/"},{"id":137495,"url":"https://patchwork.plctlab.org/api/1.2/patches/137495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905103204.2267415-1-pan2.li@intel.com/","msgid":"<20230905103204.2267415-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-05T10:32:04","name":"[v1] RISC-V: Support FP SGNJ autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905103204.2267415-1-pan2.li@intel.com/mbox/"},{"id":137496,"url":"https://patchwork.plctlab.org/api/1.2/patches/137496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110741.561950-1-poulhies@adacore.com/","msgid":"<20230905110741.561950-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:41","name":"[COMMITTED] Revert \"Adjust one Ada test\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110741.561950-1-poulhies@adacore.com/mbox/"},{"id":137501,"url":"https://patchwork.plctlab.org/api/1.2/patches/137501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110751.562099-1-poulhies@adacore.com/","msgid":"<20230905110751.562099-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:51","name":"[COMMITTED] ada: Tweak comment about tasking corner case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110751.562099-1-poulhies@adacore.com/mbox/"},{"id":137497,"url":"https://patchwork.plctlab.org/api/1.2/patches/137497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110753.562161-1-poulhies@adacore.com/","msgid":"<20230905110753.562161-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:53","name":"[COMMITTED] ada: Enforce subtype conformance of interface primitives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110753.562161-1-poulhies@adacore.com/mbox/"},{"id":137507,"url":"https://patchwork.plctlab.org/api/1.2/patches/137507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110755.562222-1-poulhies@adacore.com/","msgid":"<20230905110755.562222-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:55","name":"[COMMITTED] ada: Handle GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110755.562222-1-poulhies@adacore.com/mbox/"},{"id":137498,"url":"https://patchwork.plctlab.org/api/1.2/patches/137498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110757.562283-1-poulhies@adacore.com/","msgid":"<20230905110757.562283-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:57","name":"[COMMITTED] ada: Add missing units to Makefile.rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110757.562283-1-poulhies@adacore.com/mbox/"},{"id":137499,"url":"https://patchwork.plctlab.org/api/1.2/patches/137499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110759.562386-1-poulhies@adacore.com/","msgid":"<20230905110759.562386-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:59","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110759.562386-1-poulhies@adacore.com/mbox/"},{"id":137511,"url":"https://patchwork.plctlab.org/api/1.2/patches/137511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110802.562452-1-poulhies@adacore.com/","msgid":"<20230905110802.562452-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:02","name":"[COMMITTED] ada: Fix internal error on instantiation with private component type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110802.562452-1-poulhies@adacore.com/mbox/"},{"id":137514,"url":"https://patchwork.plctlab.org/api/1.2/patches/137514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110804.562514-1-poulhies@adacore.com/","msgid":"<20230905110804.562514-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:04","name":"[COMMITTED] ada: Preserve capability validity in address arithmetic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110804.562514-1-poulhies@adacore.com/mbox/"},{"id":137517,"url":"https://patchwork.plctlab.org/api/1.2/patches/137517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110806.562575-1-poulhies@adacore.com/","msgid":"<20230905110806.562575-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:06","name":"[COMMITTED] ada: building_executable_programs_with_gnat.rst: fix -gnatw.x index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110806.562575-1-poulhies@adacore.com/mbox/"},{"id":137518,"url":"https://patchwork.plctlab.org/api/1.2/patches/137518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110808.562636-1-poulhies@adacore.com/","msgid":"<20230905110808.562636-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:08","name":"[COMMITTED] ada: Support setting task affinity on QNX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110808.562636-1-poulhies@adacore.com/mbox/"},{"id":137504,"url":"https://patchwork.plctlab.org/api/1.2/patches/137504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110810.562697-1-poulhies@adacore.com/","msgid":"<20230905110810.562697-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:10","name":"[COMMITTED] ada: Spurious warning about negative modular literal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110810.562697-1-poulhies@adacore.com/mbox/"},{"id":137502,"url":"https://patchwork.plctlab.org/api/1.2/patches/137502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110812.562762-1-poulhies@adacore.com/","msgid":"<20230905110812.562762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:12","name":"[COMMITTED] ada: Compiler hangs on invalid postcondition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110812.562762-1-poulhies@adacore.com/mbox/"},{"id":137503,"url":"https://patchwork.plctlab.org/api/1.2/patches/137503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110814.562829-1-poulhies@adacore.com/","msgid":"<20230905110814.562829-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:14","name":"[COMMITTED] ada: Crash on function returning empty Ada 2022 aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110814.562829-1-poulhies@adacore.com/mbox/"},{"id":137506,"url":"https://patchwork.plctlab.org/api/1.2/patches/137506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110816.562928-1-poulhies@adacore.com/","msgid":"<20230905110816.562928-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:16","name":"[COMMITTED] ada: Pass -msmp when linking for ppc-vx6 --RTS=rtp-smp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110816.562928-1-poulhies@adacore.com/mbox/"},{"id":137508,"url":"https://patchwork.plctlab.org/api/1.2/patches/137508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110818.562990-1-poulhies@adacore.com/","msgid":"<20230905110818.562990-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:18","name":"[COMMITTED] ada: Crash on creation of extra formals on type extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110818.562990-1-poulhies@adacore.com/mbox/"},{"id":137510,"url":"https://patchwork.plctlab.org/api/1.2/patches/137510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110820.563052-1-poulhies@adacore.com/","msgid":"<20230905110820.563052-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:20","name":"[COMMITTED] ada: Remove TBC comment, no more needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110820.563052-1-poulhies@adacore.com/mbox/"},{"id":137500,"url":"https://patchwork.plctlab.org/api/1.2/patches/137500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110822.563115-1-poulhies@adacore.com/","msgid":"<20230905110822.563115-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:22","name":"[COMMITTED] ada: Fix assertion failure on very peculiar enumeration type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110822.563115-1-poulhies@adacore.com/mbox/"},{"id":137519,"url":"https://patchwork.plctlab.org/api/1.2/patches/137519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110824.563177-1-poulhies@adacore.com/","msgid":"<20230905110824.563177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:24","name":"[COMMITTED] ada: Fix spurious warning emissions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110824.563177-1-poulhies@adacore.com/mbox/"},{"id":137505,"url":"https://patchwork.plctlab.org/api/1.2/patches/137505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110826.563238-1-poulhies@adacore.com/","msgid":"<20230905110826.563238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:26","name":"[COMMITTED] ada: Fix crash on selected component lookup in generic instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110826.563238-1-poulhies@adacore.com/mbox/"},{"id":137515,"url":"https://patchwork.plctlab.org/api/1.2/patches/137515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110828.563299-1-poulhies@adacore.com/","msgid":"<20230905110828.563299-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:28","name":"[COMMITTED] ada: Fix problematic secondary stack management in protected entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110828.563299-1-poulhies@adacore.com/mbox/"},{"id":137509,"url":"https://patchwork.plctlab.org/api/1.2/patches/137509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110832.563364-1-poulhies@adacore.com/","msgid":"<20230905110832.563364-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:32","name":"[COMMITTED] ada: Remove redundant guard against an empty list of interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110832.563364-1-poulhies@adacore.com/mbox/"},{"id":137513,"url":"https://patchwork.plctlab.org/api/1.2/patches/137513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110833.563425-1-poulhies@adacore.com/","msgid":"<20230905110833.563425-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:33","name":"[COMMITTED] ada: Add guard before querying the type for its interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110833.563425-1-poulhies@adacore.com/mbox/"},{"id":137516,"url":"https://patchwork.plctlab.org/api/1.2/patches/137516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110835.563486-1-poulhies@adacore.com/","msgid":"<20230905110835.563486-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:35","name":"[COMMITTED] ada: Remove redundant protection against empty list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110835.563486-1-poulhies@adacore.com/mbox/"},{"id":137512,"url":"https://patchwork.plctlab.org/api/1.2/patches/137512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110837.563547-1-poulhies@adacore.com/","msgid":"<20230905110837.563547-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:37","name":"[COMMITTED] ada: Fix DWARF for certain arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110837.563547-1-poulhies@adacore.com/mbox/"},{"id":137520,"url":"https://patchwork.plctlab.org/api/1.2/patches/137520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110840.563652-1-poulhies@adacore.com/","msgid":"<20230905110840.563652-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:40","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110840.563652-1-poulhies@adacore.com/mbox/"},{"id":137521,"url":"https://patchwork.plctlab.org/api/1.2/patches/137521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com/","msgid":"<37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-05T12:08:53","name":"[v2] RISC-V: Fix Zicond ICE on large constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137522,"url":"https://patchwork.plctlab.org/api/1.2/patches/137522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d143e140125ed69ab108f3623bfde61d662b4f18.1693915780.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T12:10:20","name":"[v3,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d143e140125ed69ab108f3623bfde61d662b4f18.1693915780.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137523,"url":"https://patchwork.plctlab.org/api/1.2/patches/137523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg20vmka.fsf@euler.schwinge.homeip.net/","msgid":"<87zg20vmka.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-05T12:20:21","name":"testsuite: Port '\''check-function-bodies'\'' to nvptx (was: Add dg test for matching function bodies)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg20vmka.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137524,"url":"https://patchwork.plctlab.org/api/1.2/patches/137524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPcxnxjX7quZWGNM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T13:48:15","name":"c: Don'\''t pedwarn on _FloatN{,x} or {f,F}N{,x} suffixes for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPcxnxjX7quZWGNM@tucnak/mbox/"},{"id":137525,"url":"https://patchwork.plctlab.org/api/1.2/patches/137525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f046d7d4-7dd4-28f2-10b9-6d266e3c0896@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T14:37:46","name":"contrib/gcc-changelog: Check whether revert-commit exists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f046d7d4-7dd4-28f2-10b9-6d266e3c0896@codesourcery.com/mbox/"},{"id":137528,"url":"https://patchwork.plctlab.org/api/1.2/patches/137528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com/","msgid":"<0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T14:56:09","name":"[committed] OpenMP: Avoid ICE in c_parser_omp_clause_allocate with invalid expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com/mbox/"},{"id":137529,"url":"https://patchwork.plctlab.org/api/1.2/patches/137529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905152015.9738-1-vineetg@rivosinc.com/","msgid":"<20230905152015.9738-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-09-05T15:20:15","name":"[Committed] RISC-V: zicond: Fix opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905152015.9738-1-vineetg@rivosinc.com/mbox/"},{"id":137530,"url":"https://patchwork.plctlab.org/api/1.2/patches/137530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905154234.3316144-1-christoph.muellner@vrull.eu/","msgid":"<20230905154234.3316144-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-05T15:42:34","name":"riscv: xtheadbb: Enable constant synthesis with th.srri","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905154234.3316144-1-christoph.muellner@vrull.eu/mbox/"},{"id":137540,"url":"https://patchwork.plctlab.org/api/1.2/patches/137540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9aaf9e0db1da9dc8c1e163f4c3696ef73b66a46.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:21","name":"[1/8] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9aaf9e0db1da9dc8c1e163f4c3696ef73b66a46.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137538,"url":"https://patchwork.plctlab.org/api/1.2/patches/137538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com/","msgid":"<78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:22","name":"[2/8] OpenMP: lvalue parsing for map/to/from clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137539,"url":"https://patchwork.plctlab.org/api/1.2/patches/137539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba39536bd6229408ebabfc8c99fda28b2237787f.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:23","name":"[3/8] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba39536bd6229408ebabfc8c99fda28b2237787f.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137541,"url":"https://patchwork.plctlab.org/api/1.2/patches/137541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com/","msgid":"<8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:24","name":"[4/8] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137542,"url":"https://patchwork.plctlab.org/api/1.2/patches/137542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f1336860c3f9118c9984d7a0da38653070a80e.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:25","name":"[5/8] OpenMP, Fortran: Pass list number to gfc_free_omp_namelist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f1336860c3f9118c9984d7a0da38653070a80e.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137543,"url":"https://patchwork.plctlab.org/api/1.2/patches/137543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2e6f0fe8f9827a0b176d4fa92798498ebe7fd50.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:26","name":"[6/8] OpenMP, Fortran: Per-directive control for gfc_trans_omp_clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2e6f0fe8f9827a0b176d4fa92798498ebe7fd50.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137544,"url":"https://patchwork.plctlab.org/api/1.2/patches/137544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f15d835e45a74558212895d272a9d7223b43edb6.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:27","name":"[7/8] OpenMP, Fortran: Split out OMP clause checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f15d835e45a74558212895d272a9d7223b43edb6.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137545,"url":"https://patchwork.plctlab.org/api/1.2/patches/137545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com/","msgid":"<2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:28","name":"[8/8] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137547,"url":"https://patchwork.plctlab.org/api/1.2/patches/137547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905211559.2871358-1-christoph.muellner@vrull.eu/","msgid":"<20230905211559.2871358-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-05T21:15:59","name":"riscv: Synthesize all 11-bit-rotate constants with rori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905211559.2871358-1-christoph.muellner@vrull.eu/mbox/"},{"id":137548,"url":"https://patchwork.plctlab.org/api/1.2/patches/137548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com/","msgid":"<8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com>","list_archive_url":null,"date":"2023-09-05T21:41:50","name":"[committed] RISC-V: Expose bswapsi for TARGET_64BIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com/mbox/"},{"id":137549,"url":"https://patchwork.plctlab.org/api/1.2/patches/137549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906020216.5995-1-wangfeng@eswincomputing.com/","msgid":"<20230906020216.5995-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T02:02:16","name":"[v3] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906020216.5995-1-wangfeng@eswincomputing.com/mbox/"},{"id":137551,"url":"https://patchwork.plctlab.org/api/1.2/patches/137551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com/","msgid":"<254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-06T02:38:43","name":"[COMMITTED] RISC-V: typo: add closing paren to a comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137552,"url":"https://patchwork.plctlab.org/api/1.2/patches/137552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906031931.622583-1-jason@redhat.com/","msgid":"<20230906031931.622583-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-06T03:19:31","name":"[pushed] c++: [[no_unique_address]] and cv-qualified type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906031931.622583-1-jason@redhat.com/mbox/"},{"id":137553,"url":"https://patchwork.plctlab.org/api/1.2/patches/137553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com/","msgid":"<018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-06T05:47:07","name":"[v4,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137554,"url":"https://patchwork.plctlab.org/api/1.2/patches/137554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c83c9f9f05bf5577eeaf3633c5c2e494ac0a11fd.1693991759.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T09:34:30","name":"[1/5] OpenMP, NVPTX: memcpy[23]D bias correction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c83c9f9f05bf5577eeaf3633c5c2e494ac0a11fd.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137555,"url":"https://patchwork.plctlab.org/api/1.2/patches/137555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com/","msgid":"<463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:31","name":"[2/5] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137557,"url":"https://patchwork.plctlab.org/api/1.2/patches/137557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com/","msgid":"<4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:32","name":"[3/5] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137558,"url":"https://patchwork.plctlab.org/api/1.2/patches/137558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c998e474d8ce5bf0e0507bcb1fd6550daca3ab6e.1693991759.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T09:34:33","name":"[4/5] OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c998e474d8ce5bf0e0507bcb1fd6550daca3ab6e.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137556,"url":"https://patchwork.plctlab.org/api/1.2/patches/137556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com/","msgid":"<2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:34","name":"[5/5] OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137559,"url":"https://patchwork.plctlab.org/api/1.2/patches/137559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-2-gaofei@eswincomputing.com/","msgid":"<20230906093909.32207-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T09:39:08","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-2-gaofei@eswincomputing.com/mbox/"},{"id":137560,"url":"https://patchwork.plctlab.org/api/1.2/patches/137560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-3-gaofei@eswincomputing.com/","msgid":"<20230906093909.32207-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T09:39:09","name":"[2/2,V2,RISC-V] enable muti push and pop for Zcmp when shrink-wrap-separate is ineffective","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-3-gaofei@eswincomputing.com/mbox/"},{"id":137561,"url":"https://patchwork.plctlab.org/api/1.2/patches/137561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906094759.4040203-1-juzhe.zhong@rivai.ai/","msgid":"<20230906094759.4040203-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T09:47:59","name":"RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906094759.4040203-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137562,"url":"https://patchwork.plctlab.org/api/1.2/patches/137562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095504.32204-1-julian@codesourcery.com/","msgid":"<20230906095504.32204-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:55:04","name":"OpenMP: Enable '\''declare mapper'\'' mappers for '\''target update'\'' directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095504.32204-1-julian@codesourcery.com/mbox/"},{"id":137564,"url":"https://patchwork.plctlab.org/api/1.2/patches/137564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095747.25772-1-yangyujie@loongson.cn/","msgid":"<20230906095747.25772-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-06T09:57:47","name":"LoongArch: Fix unintentional bash-ism in r14-3665.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095747.25772-1-yangyujie@loongson.cn/mbox/"},{"id":137565,"url":"https://patchwork.plctlab.org/api/1.2/patches/137565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100423.4181932-1-christoph.muellner@vrull.eu/","msgid":"<20230906100423.4181932-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T10:04:23","name":"riscv: xtheadbb: Fix xtheadbb-li-rotr test for rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100423.4181932-1-christoph.muellner@vrull.eu/mbox/"},{"id":137566,"url":"https://patchwork.plctlab.org/api/1.2/patches/137566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100628.26033-1-yangyujie@loongson.cn/","msgid":"<20230906100628.26033-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:06:28","name":"LoongArch: Link c++ header directory in the default ABI to the toplevel.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100628.26033-1-yangyujie@loongson.cn/mbox/"},{"id":137567,"url":"https://patchwork.plctlab.org/api/1.2/patches/137567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104307.37244-2-chenxiaolong@loongson.cn/","msgid":"<20230906104307.37244-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:43:04","name":"[v1,1/4] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104307.37244-2-chenxiaolong@loongson.cn/mbox/"},{"id":137568,"url":"https://patchwork.plctlab.org/api/1.2/patches/137568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104512.46432-1-chenxiaolong@loongson.cn/","msgid":"<20230906104512.46432-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:12","name":"[v1,2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104512.46432-1-chenxiaolong@loongson.cn/mbox/"},{"id":137569,"url":"https://patchwork.plctlab.org/api/1.2/patches/137569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104526.47497-1-chenxiaolong@loongson.cn/","msgid":"<20230906104526.47497-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:26","name":"[v1,3/4] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104526.47497-1-chenxiaolong@loongson.cn/mbox/"},{"id":137570,"url":"https://patchwork.plctlab.org/api/1.2/patches/137570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104537.51583-1-chenxiaolong@loongson.cn/","msgid":"<20230906104537.51583-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:37","name":"[v1,4/4] LoongArch: Add tests for Loongson SX floating-point conversion instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104537.51583-1-chenxiaolong@loongson.cn/mbox/"},{"id":137571,"url":"https://patchwork.plctlab.org/api/1.2/patches/137571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104628.51362-1-xry111@xry111.site/","msgid":"<20230906104628.51362-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-06T10:46:28","name":"LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104628.51362-1-xry111@xry111.site/mbox/"},{"id":137572,"url":"https://patchwork.plctlab.org/api/1.2/patches/137572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906121814.1445594-1-juzhe.zhong@rivai.ai/","msgid":"<20230906121814.1445594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T12:18:14","name":"RISC-V: Remove unreasonable TARGET_64BIT for VLS modes with size = 64bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906121814.1445594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137573,"url":"https://patchwork.plctlab.org/api/1.2/patches/137573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906124724.1455261-1-juzhe.zhong@rivai.ai/","msgid":"<20230906124724.1455261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T12:47:24","name":"RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906124724.1455261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137574,"url":"https://patchwork.plctlab.org/api/1.2/patches/137574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-1-shahab@synopsys.com/","msgid":"<20230906125026.16091-1-shahab@synopsys.com>","list_archive_url":null,"date":"2023-09-06T12:50:25","name":"[1/2] ARC: Use intrinsics for __builtin_add_overflow*()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-1-shahab@synopsys.com/mbox/"},{"id":137575,"url":"https://patchwork.plctlab.org/api/1.2/patches/137575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-2-shahab@synopsys.com/","msgid":"<20230906125026.16091-2-shahab@synopsys.com>","list_archive_url":null,"date":"2023-09-06T12:50:26","name":"[2/2] ARC: Use intrinsics for __builtin_sub_overflow*()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-2-shahab@synopsys.com/mbox/"},{"id":137576,"url":"https://patchwork.plctlab.org/api/1.2/patches/137576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125156.1169003-1-pan2.li@intel.com/","msgid":"<20230906125156.1169003-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-06T12:51:56","name":"[v1] RISC-V: Fix incorrect folder for VRGATHERI16 test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125156.1169003-1-pan2.li@intel.com/mbox/"},{"id":137577,"url":"https://patchwork.plctlab.org/api/1.2/patches/137577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134001.681629-1-dmalcolm@redhat.com/","msgid":"<20230906134001.681629-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:40:01","name":"ggc, jit: forcibly clear GTY roots in jit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134001.681629-1-dmalcolm@redhat.com/mbox/"},{"id":137578,"url":"https://patchwork.plctlab.org/api/1.2/patches/137578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134422.682275-1-dmalcolm@redhat.com/","msgid":"<20230906134422.682275-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:22","name":"[pushed] analyzer: add ctxt to fill_region/zero_fill_region","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134422.682275-1-dmalcolm@redhat.com/mbox/"},{"id":137579,"url":"https://patchwork.plctlab.org/api/1.2/patches/137579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134435.682348-1-dmalcolm@redhat.com/","msgid":"<20230906134435.682348-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:35","name":"[pushed] analyzer: implement kf_strncpy [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134435.682348-1-dmalcolm@redhat.com/mbox/"},{"id":137580,"url":"https://patchwork.plctlab.org/api/1.2/patches/137580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134444.682395-1-dmalcolm@redhat.com/","msgid":"<20230906134444.682395-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:44","name":"[pushed] analyzer: implement kf_strstr [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134444.682395-1-dmalcolm@redhat.com/mbox/"},{"id":137581,"url":"https://patchwork.plctlab.org/api/1.2/patches/137581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-2-arthur.cohen@embecosm.com/","msgid":"<20230906135303.3643659-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-06T13:53:02","name":"[1/2] diagnostics: add error_meta","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-2-arthur.cohen@embecosm.com/mbox/"},{"id":137582,"url":"https://patchwork.plctlab.org/api/1.2/patches/137582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-3-arthur.cohen@embecosm.com/","msgid":"<20230906135303.3643659-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-06T13:53:03","name":"[2/2] Experiment with adding an error code to an error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-3-arthur.cohen@embecosm.com/mbox/"},{"id":137583,"url":"https://patchwork.plctlab.org/api/1.2/patches/137583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906142803.499510-1-juzhe.zhong@rivai.ai/","msgid":"<20230906142803.499510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T14:28:03","name":"[Committed,V2] RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906142803.499510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137584,"url":"https://patchwork.plctlab.org/api/1.2/patches/137584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPijr7hRsYgEBADf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-06T16:07:11","name":"[committed,10/12,v2] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPijr7hRsYgEBADf@tucnak/mbox/"},{"id":137586,"url":"https://patchwork.plctlab.org/api/1.2/patches/137586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-2-christoph.muellner@vrull.eu/","msgid":"<20230906160734.2422522-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T16:07:33","name":"[v2,1/2] riscv: Add support for strlen inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-2-christoph.muellner@vrull.eu/mbox/"},{"id":137585,"url":"https://patchwork.plctlab.org/api/1.2/patches/137585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-3-christoph.muellner@vrull.eu/","msgid":"<20230906160734.2422522-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T16:07:34","name":"[v2,2/2] riscv: Add support for str(n)cmp inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-3-christoph.muellner@vrull.eu/mbox/"},{"id":137587,"url":"https://patchwork.plctlab.org/api/1.2/patches/137587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPikTdeyDMHLOY0e@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-06T16:09:49","name":"[committed,19/12] Additional _BitInt test coverage [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPikTdeyDMHLOY0e@tucnak/mbox/"},{"id":137588,"url":"https://patchwork.plctlab.org/api/1.2/patches/137588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/977be071-0361-1868-26cb-532e06dc25f9@arm.com/","msgid":"<977be071-0361-1868-26cb-532e06dc25f9@arm.com>","list_archive_url":null,"date":"2023-09-06T17:19:12","name":"[PING,1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/977be071-0361-1868-26cb-532e06dc25f9@arm.com/mbox/"},{"id":137589,"url":"https://patchwork.plctlab.org/api/1.2/patches/137589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de90d80c-96b5-c67c-4b99-e913c33906d2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T17:19:24","name":"[PING,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de90d80c-96b5-c67c-4b99-e913c33906d2@arm.com/mbox/"},{"id":137590,"url":"https://patchwork.plctlab.org/api/1.2/patches/137590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-2-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:19","name":"[1/5] RISC-V: Update Types for Vector Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-2-ewlu@rivosinc.com/mbox/"},{"id":137591,"url":"https://patchwork.plctlab.org/api/1.2/patches/137591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-3-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:20","name":"[2/5] RISC-V: Add Types for Un-Typed zc Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-3-ewlu@rivosinc.com/mbox/"},{"id":137593,"url":"https://patchwork.plctlab.org/api/1.2/patches/137593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-4-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:21","name":"[3/5] RISC-V: Add Types to Un-Typed Zicond Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-4-ewlu@rivosinc.com/mbox/"},{"id":137592,"url":"https://patchwork.plctlab.org/api/1.2/patches/137592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-5-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:22","name":"[4/5] RISC-V: Update Types for RISC-V Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-5-ewlu@rivosinc.com/mbox/"},{"id":137594,"url":"https://patchwork.plctlab.org/api/1.2/patches/137594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-6-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-6-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:23","name":"[5/5] RISC-V: Remove Assert Protecting Types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-6-ewlu@rivosinc.com/mbox/"},{"id":137595,"url":"https://patchwork.plctlab.org/api/1.2/patches/137595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfkpy=UkaKq0R3B6YKA1zBacJ_vJs=EHAnOuNa3dHQBQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T18:38:04","name":"libgo patch committed: permit $AR to include options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfkpy=UkaKq0R3B6YKA1zBacJ_vJs=EHAnOuNa3dHQBQ@mail.gmail.com/mbox/"},{"id":137596,"url":"https://patchwork.plctlab.org/api/1.2/patches/137596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906191618.3187438-1-vultkayn@gcc.gnu.org/","msgid":"<20230906191618.3187438-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-06T19:16:20","name":"[v2] analyzer: Call off a superseding when diagnostics are unrelated [PR110830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906191618.3187438-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137598,"url":"https://patchwork.plctlab.org/api/1.2/patches/137598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906220737.4049357-1-ppalka@redhat.com/","msgid":"<20230906220737.4049357-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-06T22:07:37","name":"c++: cache conversion function lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906220737.4049357-1-ppalka@redhat.com/mbox/"},{"id":137599,"url":"https://patchwork.plctlab.org/api/1.2/patches/137599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906222913.784626-1-jwakely@redhat.com/","msgid":"<20230906222913.784626-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-06T22:28:54","name":"[committed] libstdc++: Disable support by default for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906222913.784626-1-jwakely@redhat.com/mbox/"},{"id":137600,"url":"https://patchwork.plctlab.org/api/1.2/patches/137600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUnCVkWey4PYRFUumSx5zSmpv+pN4-L1sWdxF73pVwcTA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T22:32:47","name":"godump.cc patch committed: Handle _BitInt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUnCVkWey4PYRFUumSx5zSmpv+pN4-L1sWdxF73pVwcTA@mail.gmail.com/mbox/"},{"id":137602,"url":"https://patchwork.plctlab.org/api/1.2/patches/137602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907014320.1962038-1-hongtao.liu@intel.com/","msgid":"<20230907014320.1962038-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-07T01:43:20","name":"Support vpermw/vpermi2w/vpermt2w instructions for vector HF/BFmodes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907014320.1962038-1-hongtao.liu@intel.com/mbox/"},{"id":137607,"url":"https://patchwork.plctlab.org/api/1.2/patches/137607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907020245.2888379-1-guojiufu@linux.ibm.com/","msgid":"<20230907020245.2888379-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-07T02:02:45","name":"Checking undefined_p before using the vr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907020245.2888379-1-guojiufu@linux.ibm.com/mbox/"},{"id":137603,"url":"https://patchwork.plctlab.org/api/1.2/patches/137603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com/","msgid":"<3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-07T02:17:01","name":"[RFC,1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137604,"url":"https://patchwork.plctlab.org/api/1.2/patches/137604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68806e290262ac43dfaa898e883bb85eece71a6.1694053004.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T02:17:02","name":"[RFC,2/2] RISC-V: Update testsuite for type-changed builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68806e290262ac43dfaa898e883bb85eece71a6.1694053004.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137605,"url":"https://patchwork.plctlab.org/api/1.2/patches/137605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907021750.14608-1-wangfeng@eswincomputing.com/","msgid":"<20230907021750.14608-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-07T02:17:50","name":"[v4] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907021750.14608-1-wangfeng@eswincomputing.com/mbox/"},{"id":137608,"url":"https://patchwork.plctlab.org/api/1.2/patches/137608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907033553.1289393-1-juzhe.zhong@rivai.ai/","msgid":"<20230907033553.1289393-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T03:35:53","name":"RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907033553.1289393-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137610,"url":"https://patchwork.plctlab.org/api/1.2/patches/137610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907065010.36145-1-yangyujie@loongson.cn/","msgid":"<20230907065010.36145-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-07T06:50:10","name":"[v2] LoongArch: Adjust C++ multilib header layout.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907065010.36145-1-yangyujie@loongson.cn/mbox/"},{"id":137611,"url":"https://patchwork.plctlab.org/api/1.2/patches/137611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-2-chenxiaolong@loongson.cn/","msgid":"<20230907070101.22062-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:00:58","name":"[v2,1/4] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-2-chenxiaolong@loongson.cn/mbox/"},{"id":137612,"url":"https://patchwork.plctlab.org/api/1.2/patches/137612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-3-chenxiaolong@loongson.cn/","msgid":"<20230907070101.22062-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:00:59","name":"[v2,2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-3-chenxiaolong@loongson.cn/mbox/"},{"id":137613,"url":"https://patchwork.plctlab.org/api/1.2/patches/137613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070558.22563-1-chenxiaolong@loongson.cn/","msgid":"<20230907070558.22563-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:05:58","name":"[v2,3/4] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070558.22563-1-chenxiaolong@loongson.cn/mbox/"},{"id":137614,"url":"https://patchwork.plctlab.org/api/1.2/patches/137614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070613.22622-1-chenxiaolong@loongson.cn/","msgid":"<20230907070613.22622-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:06:13","name":"[v2,4/4] LoongArch:Add Loongson SX/ASX instruction support to LoongArch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070613.22622-1-chenxiaolong@loongson.cn/mbox/"},{"id":137617,"url":"https://patchwork.plctlab.org/api/1.2/patches/137617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071128.866844-1-jwakely@redhat.com/","msgid":"<20230907071128.866844-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:13","name":"[committed] libstdc++: Avoid -Wunused-parameter warning in testsuite helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071128.866844-1-jwakely@redhat.com/mbox/"},{"id":137616,"url":"https://patchwork.plctlab.org/api/1.2/patches/137616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071134.866862-1-jwakely@redhat.com/","msgid":"<20230907071134.866862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:29","name":"[committed] libstdc++: Relax range adaptors for move-only types (P2494R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071134.866862-1-jwakely@redhat.com/mbox/"},{"id":137615,"url":"https://patchwork.plctlab.org/api/1.2/patches/137615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071141.866877-1-jwakely@redhat.com/","msgid":"<20230907071141.866877-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:35","name":"[committed] libstdc++: Rename C++20 Customization Point Objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071141.866877-1-jwakely@redhat.com/mbox/"},{"id":137618,"url":"https://patchwork.plctlab.org/api/1.2/patches/137618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071146.866894-1-jwakely@redhat.com/","msgid":"<20230907071146.866894-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:42","name":"[committed] libstdc++: Simplify C++20 poison pill overloads (P2602R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071146.866894-1-jwakely@redhat.com/mbox/"},{"id":137621,"url":"https://patchwork.plctlab.org/api/1.2/patches/137621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071150.866908-1-jwakely@redhat.com/","msgid":"<20230907071150.866908-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:47","name":"[committed] libstdc++: Fix tests that fail in C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071150.866908-1-jwakely@redhat.com/mbox/"},{"id":137619,"url":"https://patchwork.plctlab.org/api/1.2/patches/137619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071155.866923-1-jwakely@redhat.com/","msgid":"<20230907071155.866923-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:51","name":"[committed] libstdc++: Fix missing/misplaced { dg-options \"-std=gnu++20\" } in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071155.866923-1-jwakely@redhat.com/mbox/"},{"id":137622,"url":"https://patchwork.plctlab.org/api/1.2/patches/137622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-2-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:09","name":"[v1,2/4] LoongArch:Add vector subtraction arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-2-chenxiaolong@loongson.cn/mbox/"},{"id":137620,"url":"https://patchwork.plctlab.org/api/1.2/patches/137620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-3-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:10","name":"[v1,3/4] LoongArch:Add vector multiplication arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-3-chenxiaolong@loongson.cn/mbox/"},{"id":137623,"url":"https://patchwork.plctlab.org/api/1.2/patches/137623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-4-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:11","name":"[v1,4/4] LoongArch:Add SX instructions for vector arithmetic operations other than multiplication, addition, and subtraction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-4-chenxiaolong@loongson.cn/mbox/"},{"id":137624,"url":"https://patchwork.plctlab.org/api/1.2/patches/137624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907072831.2168670-1-juzhe.zhong@rivai.ai/","msgid":"<20230907072831.2168670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T07:28:31","name":"RISC-V: Enable RVV scalable vectorization by default[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907072831.2168670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137625,"url":"https://patchwork.plctlab.org/api/1.2/patches/137625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b313276b-117a-0c7e-236a-876c9f96db70@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T08:56:04","name":"libgomp.texi: Fix ICV var name, document some memory management routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b313276b-117a-0c7e-236a-876c9f96db70@codesourcery.com/mbox/"},{"id":137626,"url":"https://patchwork.plctlab.org/api/1.2/patches/137626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPmWasamz75b66t1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-07T09:22:50","name":"[committed] middle-end: Avoid calling targetm.c.bitint_type_info inside of gcc_assert [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPmWasamz75b66t1@tucnak/mbox/"},{"id":137627,"url":"https://patchwork.plctlab.org/api/1.2/patches/137627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8cmpc0c.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T09:29:23","name":"Tweak language choice in config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8cmpc0c.fsf@arm.com/mbox/"},{"id":137628,"url":"https://patchwork.plctlab.org/api/1.2/patches/137628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907115526.1454562-1-juzhe.zhong@rivai.ai/","msgid":"<20230907115526.1454562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T11:55:26","name":"RISC-V: Add VLS mask modes mov patterns[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907115526.1454562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137629,"url":"https://patchwork.plctlab.org/api/1.2/patches/137629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133202.1013843-1-jwakely@redhat.com/","msgid":"<20230907133202.1013843-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T13:31:24","name":"libstdc++: Reduce output of '\''make check'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133202.1013843-1-jwakely@redhat.com/mbox/"},{"id":137631,"url":"https://patchwork.plctlab.org/api/1.2/patches/137631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-2-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:27","name":"[01/14] rust: Add skeleton support and documentation for targetrustm hooks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-2-arthur.cohen@embecosm.com/mbox/"},{"id":137630,"url":"https://patchwork.plctlab.org/api/1.2/patches/137630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-3-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:28","name":"[02/14] rust: Reintroduce TARGET_RUST_CPU_INFO hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-3-arthur.cohen@embecosm.com/mbox/"},{"id":137632,"url":"https://patchwork.plctlab.org/api/1.2/patches/137632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-4-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:29","name":"[03/14] rust: Reintroduce TARGET_RUST_OS_INFO hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-4-arthur.cohen@embecosm.com/mbox/"},{"id":137633,"url":"https://patchwork.plctlab.org/api/1.2/patches/137633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-5-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:30","name":"[04/14] rust: Implement TARGET_RUST_CPU_INFO for i[34567]86-*-* and x86_64-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-5-arthur.cohen@embecosm.com/mbox/"},{"id":137635,"url":"https://patchwork.plctlab.org/api/1.2/patches/137635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-6-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:31","name":"[05/14] rust: Implement TARGET_RUST_OS_INFO for *-*-darwin*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-6-arthur.cohen@embecosm.com/mbox/"},{"id":137637,"url":"https://patchwork.plctlab.org/api/1.2/patches/137637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-7-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:32","name":"[06/14] rust: Implement TARGET_RUST_OS_INFO for *-*-freebsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-7-arthur.cohen@embecosm.com/mbox/"},{"id":137639,"url":"https://patchwork.plctlab.org/api/1.2/patches/137639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-8-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:33","name":"[07/14] rust: Implement TARGET_RUST_OS_INFO for *-*-netbsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-8-arthur.cohen@embecosm.com/mbox/"},{"id":137641,"url":"https://patchwork.plctlab.org/api/1.2/patches/137641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-9-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:34","name":"[08/14] rust: Implement TARGET_RUST_OS_INFO for *-*-openbsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-9-arthur.cohen@embecosm.com/mbox/"},{"id":137643,"url":"https://patchwork.plctlab.org/api/1.2/patches/137643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-10-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:35","name":"[09/14] rust: Implement TARGET_RUST_OS_INFO for *-*-solaris2*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-10-arthur.cohen@embecosm.com/mbox/"},{"id":137640,"url":"https://patchwork.plctlab.org/api/1.2/patches/137640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-11-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:36","name":"[10/14] rust: Implement TARGET_RUST_OS_INFO for *-*-dragonfly*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-11-arthur.cohen@embecosm.com/mbox/"},{"id":137634,"url":"https://patchwork.plctlab.org/api/1.2/patches/137634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-12-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:37","name":"[11/14] rust: Implement TARGET_RUST_OS_INFO for *-*-vxworks*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-12-arthur.cohen@embecosm.com/mbox/"},{"id":137638,"url":"https://patchwork.plctlab.org/api/1.2/patches/137638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-13-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:38","name":"[12/14] rust: Implement TARGET_RUST_OS_INFO for *-*-fuchsia*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-13-arthur.cohen@embecosm.com/mbox/"},{"id":137636,"url":"https://patchwork.plctlab.org/api/1.2/patches/137636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-14-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:39","name":"[13/14] rust: Implement TARGET_RUST_OS_INFO for i[34567]86-*-mingw* and x86_64-*-mingw*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-14-arthur.cohen@embecosm.com/mbox/"},{"id":137642,"url":"https://patchwork.plctlab.org/api/1.2/patches/137642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-15-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:40","name":"[14/14] rust: Implement TARGET_RUST_OS_INFO for *-*-*linux*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-15-arthur.cohen@embecosm.com/mbox/"},{"id":137644,"url":"https://patchwork.plctlab.org/api/1.2/patches/137644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907140557.3378043-1-juzhe.zhong@rivai.ai/","msgid":"<20230907140557.3378043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T14:05:57","name":"RISC-V: Replace rtx REG for zero REGS operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907140557.3378043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137645,"url":"https://patchwork.plctlab.org/api/1.2/patches/137645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1ae20a6-b756-c9dd-6fed-d080de618d48@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T14:06:20","name":"[pushed,PR111225,LRA] : Don'\''t reuse chosen insn alternative with special memory constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1ae20a6-b756-c9dd-6fed-d080de618d48@redhat.com/mbox/"},{"id":137646,"url":"https://patchwork.plctlab.org/api/1.2/patches/137646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A6AA40749B74CAD14C5783EEA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T14:06:33","name":"ARM: Block predication on atomics [PR111235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A6AA40749B74CAD14C5783EEA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":137647,"url":"https://patchwork.plctlab.org/api/1.2/patches/137647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907142217.3753564-1-jcmvbkbc@gmail.com/","msgid":"<20230907142217.3753564-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-09-07T14:22:17","name":"[RFC] gcc: xtensa: use salt/saltu in xtensa_expand_scc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907142217.3753564-1-jcmvbkbc@gmail.com/mbox/"},{"id":137648,"url":"https://patchwork.plctlab.org/api/1.2/patches/137648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPnq6g4nFQzR/RKL@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T15:23:22","name":"[v2] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPnq6g4nFQzR/RKL@redhat.com/mbox/"},{"id":137649,"url":"https://patchwork.plctlab.org/api/1.2/patches/137649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160639.1038285-1-jwakely@redhat.com/","msgid":"<20230907160639.1038285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:06:32","name":"[committed] libstdc++: Disable support by default for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160639.1038285-1-jwakely@redhat.com/mbox/"},{"id":137650,"url":"https://patchwork.plctlab.org/api/1.2/patches/137650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160737.1038358-1-jwakely@redhat.com/","msgid":"<20230907160737.1038358-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:06:50","name":"[committed] libstdc++: Add autoconf checks for mkdir, chmod, chdir, and getcwd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160737.1038358-1-jwakely@redhat.com/mbox/"},{"id":137651,"url":"https://patchwork.plctlab.org/api/1.2/patches/137651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161407.27338-2-xry111@xry111.site/","msgid":"<20230907161407.27338-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-07T16:14:08","name":"LoongArch: Use LSX and LASX for block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161407.27338-2-xry111@xry111.site/mbox/"},{"id":137652,"url":"https://patchwork.plctlab.org/api/1.2/patches/137652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161837.4049453-1-sandra@codesourcery.com/","msgid":"<20230907161837.4049453-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-09-07T16:18:37","name":"OpenMP: Fix ICE in fixup_blocks_walker [PR111274]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161837.4049453-1-sandra@codesourcery.com/mbox/"},{"id":137653,"url":"https://patchwork.plctlab.org/api/1.2/patches/137653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907163336.66198-2-xry111@xry111.site/","msgid":"<20230907163336.66198-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-07T16:33:37","name":"LoongArch: Slightly simplify loongarch_block_move_straight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907163336.66198-2-xry111@xry111.site/mbox/"},{"id":137654,"url":"https://patchwork.plctlab.org/api/1.2/patches/137654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164136.1050285-1-jwakely@redhat.com/","msgid":"<20230907164136.1050285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:41:25","name":"[committed] libstdc++: Remove trailing whitespace from dejagnu files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164136.1050285-1-jwakely@redhat.com/mbox/"},{"id":137655,"url":"https://patchwork.plctlab.org/api/1.2/patches/137655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164204.1050382-1-jwakely@redhat.com/","msgid":"<20230907164204.1050382-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:41:53","name":"[committed] libstdc++: Simplify dejagnu target selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164204.1050382-1-jwakely@redhat.com/mbox/"},{"id":137656,"url":"https://patchwork.plctlab.org/api/1.2/patches/137656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65y4m3p7o.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-09-07T16:47:23","name":"math-opts: Add dbgcounter for FMA formation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65y4m3p7o.fsf@suse.cz/mbox/"},{"id":137685,"url":"https://patchwork.plctlab.org/api/1.2/patches/137685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com/","msgid":"<6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com>","list_archive_url":null,"date":"2023-09-07T19:21:20","name":"[COMMITTED] PR tree-optimization/110875 - Some ssa-names get incorrectly marked as always_current.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com/mbox/"},{"id":137686,"url":"https://patchwork.plctlab.org/api/1.2/patches/137686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi/","msgid":"<93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-09-07T19:30:00","name":"[v2] libstdc++: Fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi/mbox/"},{"id":137688,"url":"https://patchwork.plctlab.org/api/1.2/patches/137688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907221213.103635-1-aldyh@redhat.com/","msgid":"<20230907221213.103635-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:12:06","name":"[COMMITTED,irange] Fix typo in contains_zero_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907221213.103635-1-aldyh@redhat.com/mbox/"},{"id":137689,"url":"https://patchwork.plctlab.org/api/1.2/patches/137689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224930.883908-1-dmalcolm@redhat.com/","msgid":"<20230907224930.883908-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:49:30","name":"[pushed] analyzer: fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224930.883908-1-dmalcolm@redhat.com/mbox/"},{"id":137690,"url":"https://patchwork.plctlab.org/api/1.2/patches/137690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224935.883935-1-dmalcolm@redhat.com/","msgid":"<20230907224935.883935-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:49:35","name":"[pushed] analyzer: basic support for computed gotos (PR analyzer/110529)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224935.883935-1-dmalcolm@redhat.com/mbox/"},{"id":137691,"url":"https://patchwork.plctlab.org/api/1.2/patches/137691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com/","msgid":"<59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-08T01:03:13","name":"[RFC,1/1] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137692,"url":"https://patchwork.plctlab.org/api/1.2/patches/137692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908012659.6629-1-wangfeng@eswincomputing.com/","msgid":"<20230908012659.6629-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-08T01:26:59","name":"[v5] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908012659.6629-1-wangfeng@eswincomputing.com/mbox/"},{"id":137693,"url":"https://patchwork.plctlab.org/api/1.2/patches/137693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908020021.3174-1-guojie@loongson.cn/","msgid":"<20230908020021.3174-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-08T02:00:21","name":"LoongArch: Enable -fsched-pressure by default at -O1 and higher.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908020021.3174-1-guojie@loongson.cn/mbox/"},{"id":137694,"url":"https://patchwork.plctlab.org/api/1.2/patches/137694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908031918.1035385-1-hongtao.liu@intel.com/","msgid":"<20230908031918.1035385-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-08T03:19:18","name":"Remove constraint modifier % for fcmaddcph/fcmulcph since there'\''re not commutative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908031918.1035385-1-hongtao.liu@intel.com/mbox/"},{"id":137696,"url":"https://patchwork.plctlab.org/api/1.2/patches/137696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908052415.3307098-1-lehua.ding@rivai.ai/","msgid":"<20230908052415.3307098-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T05:24:15","name":"Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908052415.3307098-1-lehua.ding@rivai.ai/mbox/"},{"id":137697,"url":"https://patchwork.plctlab.org/api/1.2/patches/137697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908060044.1915195-1-christoph.muellner@vrull.eu/","msgid":"<20230908060044.1915195-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:00:44","name":"riscv: xtheadbb: Fix extendqi insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908060044.1915195-1-christoph.muellner@vrull.eu/mbox/"},{"id":137698,"url":"https://patchwork.plctlab.org/api/1.2/patches/137698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908061600.1922301-1-christoph.muellner@vrull.eu/","msgid":"<20230908061600.1922301-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:16:00","name":"riscv: thead: Fix mode attribute for extension patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908061600.1922301-1-christoph.muellner@vrull.eu/mbox/"},{"id":137699,"url":"https://patchwork.plctlab.org/api/1.2/patches/137699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065330.2367271-1-christoph.muellner@vrull.eu/","msgid":"<20230908065330.2367271-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:53:30","name":"riscv: bitmanip: Remove duplicate zero_extendhi2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065330.2367271-1-christoph.muellner@vrull.eu/mbox/"},{"id":137700,"url":"https://patchwork.plctlab.org/api/1.2/patches/137700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065402.3875730-1-lehua.ding@rivai.ai/","msgid":"<20230908065402.3875730-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T06:54:02","name":"[V2] Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065402.3875730-1-lehua.ding@rivai.ai/mbox/"},{"id":137703,"url":"https://patchwork.plctlab.org/api/1.2/patches/137703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908075203.2597443-1-juzhe.zhong@rivai.ai/","msgid":"<20230908075203.2597443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-08T07:52:03","name":"RISC-V: Fix incorrect nregs calculation for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908075203.2597443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137704,"url":"https://patchwork.plctlab.org/api/1.2/patches/137704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908082027.485267-1-juzhe.zhong@rivai.ai/","msgid":"<20230908082027.485267-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-08T08:20:27","name":"RISC-V: Suppress bogus warning for VLS types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908082027.485267-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137706,"url":"https://patchwork.plctlab.org/api/1.2/patches/137706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908084321.567591-1-christophe.lyon@linaro.org/","msgid":"<20230908084321.567591-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-08T08:43:21","name":"testsuite: Fix gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908084321.567591-1-christophe.lyon@linaro.org/mbox/"},{"id":137707,"url":"https://patchwork.plctlab.org/api/1.2/patches/137707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp/","msgid":"<010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp>","list_archive_url":null,"date":"2023-09-08T08:48:56","name":"xtensa: Optimize several boolean evaluations of EQ/NE against constant zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp/mbox/"},{"id":137708,"url":"https://patchwork.plctlab.org/api/1.2/patches/137708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908085419.494384-1-lehua.ding@rivai.ai/","msgid":"<20230908085419.494384-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T08:54:19","name":"[V3] Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908085419.494384-1-lehua.ding@rivai.ai/mbox/"},{"id":137709,"url":"https://patchwork.plctlab.org/api/1.2/patches/137709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com/","msgid":"<4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com>","list_archive_url":null,"date":"2023-09-08T09:01:45","name":"gimple-match: Do not try UNCOND optimization with COND_LEN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com/mbox/"},{"id":137711,"url":"https://patchwork.plctlab.org/api/1.2/patches/137711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908100434.541577-1-mikael@gcc.gnu.org/","msgid":"<20230908100434.541577-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-08T10:04:34","name":"fortran: Remove redundant tree walk to delete element","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908100434.541577-1-mikael@gcc.gnu.org/mbox/"},{"id":137715,"url":"https://patchwork.plctlab.org/api/1.2/patches/137715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908104923.31154-1-ishitatsuyuki@gmail.com/","msgid":"<20230908104923.31154-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-09-08T10:49:23","name":"[v2] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908104923.31154-1-ishitatsuyuki@gmail.com/mbox/"},{"id":137718,"url":"https://patchwork.plctlab.org/api/1.2/patches/137718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9fafb66-b740-4905-7c96-0a1d98cd2034@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T11:12:17","name":"[committed] Update contrib + libgomp ChangeLogs for failed reject-commit testing (was: [Patch] contrib/gcc-changelog: Check whether revert-commit exists)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9fafb66-b740-4905-7c96-0a1d98cd2034@codesourcery.com/mbox/"},{"id":137723,"url":"https://patchwork.plctlab.org/api/1.2/patches/137723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ledgzxcl.fsf@euler.schwinge.homeip.net/","msgid":"<87ledgzxcl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-08T12:02:50","name":"More '\''#ifdef ASM_OUTPUT_DEF'\'' -> '\''if (TARGET_SUPPORTS_ALIASES)'\'' etc. (was: [PATCH][v2] Introduce TARGET_SUPPORTS_ALIASES)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ledgzxcl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137726,"url":"https://patchwork.plctlab.org/api/1.2/patches/137726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPsQipogkYUxlXLK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-08T12:16:10","name":"pretty-print: Fix up pp_wide_int [PR111329]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPsQipogkYUxlXLK@tucnak/mbox/"},{"id":137731,"url":"https://patchwork.plctlab.org/api/1.2/patches/137731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908123955.1196607-1-apinski@marvell.com/","msgid":"<20230908123955.1196607-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-08T12:39:55","name":"Fix PR 111331: wrong code for `a > 28 ? MIN : 29`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908123955.1196607-1-apinski@marvell.com/mbox/"},{"id":137740,"url":"https://patchwork.plctlab.org/api/1.2/patches/137740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908125840.789518-1-arthur.cohen@embecosm.com/","msgid":"<20230908125840.789518-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T12:58:40","name":"libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908125840.789518-1-arthur.cohen@embecosm.com/mbox/"},{"id":137746,"url":"https://patchwork.plctlab.org/api/1.2/patches/137746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908142519.899241-1-arthur.cohen@embecosm.com/","msgid":"<20230908142519.899241-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T14:25:20","name":"[v2] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908142519.899241-1-arthur.cohen@embecosm.com/mbox/"},{"id":137750,"url":"https://patchwork.plctlab.org/api/1.2/patches/137750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908145908.915341-1-arthur.cohen@embecosm.com/","msgid":"<20230908145908.915341-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T14:59:09","name":"[v3] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908145908.915341-1-arthur.cohen@embecosm.com/mbox/"},{"id":137761,"url":"https://patchwork.plctlab.org/api/1.2/patches/137761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7icmxvw.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T16:29:39","name":"Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7icmxvw.fsf@arm.com/mbox/"},{"id":137763,"url":"https://patchwork.plctlab.org/api/1.2/patches/137763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908170830.1700395-1-jwakely@redhat.com/","msgid":"<20230908170830.1700395-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-08T17:06:57","name":"[committed] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908170830.1700395-1-jwakely@redhat.com/mbox/"},{"id":137766,"url":"https://patchwork.plctlab.org/api/1.2/patches/137766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com/","msgid":"<368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com>","list_archive_url":null,"date":"2023-09-08T17:54:35","name":"match: Don'\''t sink comparisons into vec_cond operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com/mbox/"},{"id":137771,"url":"https://patchwork.plctlab.org/api/1.2/patches/137771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181603.1719292-1-jwakely@redhat.com/","msgid":"<20230908181603.1719292-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-08T18:15:09","name":"[committed] libstdc++: Update outdated default -std in testing docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181603.1719292-1-jwakely@redhat.com/mbox/"},{"id":137772,"url":"https://patchwork.plctlab.org/api/1.2/patches/137772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-2-ewlu@rivosinc.com/","msgid":"<20230908181659.3345602-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-08T18:16:45","name":"[v2,1/5] RISC-V: Update Types for Vector Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-2-ewlu@rivosinc.com/mbox/"},{"id":137774,"url":"https://patchwork.plctlab.org/api/1.2/patches/137774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-3-ewlu@rivosinc.com/","msgid":"<20230908181659.3345602-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-08T18:16:46","name":"[v2,2/5] RISC-V: Add Types for Un-Typed zc Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-3-ewlu@rivosinc.com/mbox/"},{"id":137788,"url":"https://patchwork.plctlab.org/api/1.2/patches/137788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPtmwqs+Aywe6ZAR@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T18:24:02","name":"[v3] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPtmwqs+Aywe6ZAR@redhat.com/mbox/"},{"id":137796,"url":"https://patchwork.plctlab.org/api/1.2/patches/137796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908210412.817122-1-aldyh@redhat.com/","msgid":"<20230908210412.817122-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-08T21:04:07","name":"[COMMITTED,frange] Revert relation handling in LTGT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908210412.817122-1-aldyh@redhat.com/mbox/"},{"id":137820,"url":"https://patchwork.plctlab.org/api/1.2/patches/137820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043026.2001914-1-juzhe.zhong@rivai.ai/","msgid":"<20230909043026.2001914-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T04:30:26","name":"[Committed] RISC-V: Fix VLS floating-point operations predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043026.2001914-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137821,"url":"https://patchwork.plctlab.org/api/1.2/patches/137821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043814.2002924-1-juzhe.zhong@rivai.ai/","msgid":"<20230909043814.2002924-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T04:38:14","name":"RISC-V: Add VLS modes VEC_PERM support[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043814.2002924-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137824,"url":"https://patchwork.plctlab.org/api/1.2/patches/137824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0e6dc5d6e4a5cca7f2abf52f0472da0ba9b80fb.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-09-09T07:03:40","name":"Pushed: [PATCH v2] LoongArch: Use LSX and LASX for block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0e6dc5d6e4a5cca7f2abf52f0472da0ba9b80fb.camel@xry111.site/mbox/"},{"id":137825,"url":"https://patchwork.plctlab.org/api/1.2/patches/137825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909074209.1187-1-chenglulu@loongson.cn/","msgid":"<20230909074209.1187-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-09T07:42:10","name":"[v1] LoongArch: Fix bug of '\''di3_fake'\''.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909074209.1187-1-chenglulu@loongson.cn/mbox/"},{"id":137826,"url":"https://patchwork.plctlab.org/api/1.2/patches/137826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909082014.100341-1-xry111@xry111.site/","msgid":"<20230909082014.100341-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-09T08:20:14","name":"LoongArch: Fix up memcpy-vec-3.c test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909082014.100341-1-xry111@xry111.site/mbox/"},{"id":137827,"url":"https://patchwork.plctlab.org/api/1.2/patches/137827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909084652.2655745-1-manolis.tsamis@vrull.eu/","msgid":"<20230909084652.2655745-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-09-09T08:46:51","name":"[v5] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909084652.2655745-1-manolis.tsamis@vrull.eu/mbox/"},{"id":137833,"url":"https://patchwork.plctlab.org/api/1.2/patches/137833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6o3z7lr.fsf@euler.schwinge.homeip.net/","msgid":"<87h6o3z7lr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-09T15:31:12","name":"Fix false positive for -Walloc-size-larger-than, part II [PR79132] (was: [PATCH] Fix false positive for -Walloc-size-larger-than (PR, bootstrap/79132))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6o3z7lr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137848,"url":"https://patchwork.plctlab.org/api/1.2/patches/137848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909235744.1744713-1-juzhe.zhong@rivai.ai/","msgid":"<20230909235744.1744713-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T23:57:44","name":"RISC-V: Fix dump FILE of VSETVL PASS[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909235744.1744713-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137849,"url":"https://patchwork.plctlab.org/api/1.2/patches/137849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910023304.1946754-1-juzhe.zhong@rivai.ai/","msgid":"<20230910023304.1946754-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T02:33:04","name":"RISC-V: Expand fixed-vlmax/vls vector permutation in targethook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910023304.1946754-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137852,"url":"https://patchwork.plctlab.org/api/1.2/patches/137852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910035538.2034153-1-juzhe.zhong@rivai.ai/","msgid":"<20230910035538.2034153-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T03:55:38","name":"RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910035538.2034153-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137854,"url":"https://patchwork.plctlab.org/api/1.2/patches/137854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at/","msgid":"<1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at>","list_archive_url":null,"date":"2023-09-10T08:17:29","name":"[C,1/6,v2] c: reorganize recursive type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at/mbox/"},{"id":137861,"url":"https://patchwork.plctlab.org/api/1.2/patches/137861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf02c66f-a911-8ce0-9249-45bef80b418c@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-10T13:56:11","name":"[11/12/13/14,Regression] ABI break in _Hash_node_value_base since GCC 11 [PR 111050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf02c66f-a911-8ce0-9249-45bef80b418c@gmail.com/mbox/"},{"id":137862,"url":"https://patchwork.plctlab.org/api/1.2/patches/137862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910140710.2167538-1-juzhe.zhong@rivai.ai/","msgid":"<20230910140710.2167538-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T14:07:10","name":"[V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910140710.2167538-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137863,"url":"https://patchwork.plctlab.org/api/1.2/patches/137863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910141022.89898-1-iain@sandoe.co.uk/","msgid":"<20230910141022.89898-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-10T14:10:22","name":"[pushed] Darwin: Partial reversion of r14-3648 (Inits Section).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910141022.89898-1-iain@sandoe.co.uk/mbox/"},{"id":137864,"url":"https://patchwork.plctlab.org/api/1.2/patches/137864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com/","msgid":"<0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-09-10T17:28:32","name":"[v2] swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com/mbox/"},{"id":137865,"url":"https://patchwork.plctlab.org/api/1.2/patches/137865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-1-christophe.lyon@linaro.org/","msgid":"<20230910193045.3549775-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-10T19:30:44","name":"[1/2] testsuite: Add and use thread_fence effective-target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-1-christophe.lyon@linaro.org/mbox/"},{"id":137866,"url":"https://patchwork.plctlab.org/api/1.2/patches/137866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-2-christophe.lyon@linaro.org/","msgid":"<20230910193045.3549775-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-10T19:30:45","name":"[2/2] libstdc++: Add dg-require-thread-fence in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-2-christophe.lyon@linaro.org/mbox/"},{"id":137867,"url":"https://patchwork.plctlab.org/api/1.2/patches/137867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911011608.312795-1-hongtao.liu@intel.com/","msgid":"<20230911011608.312795-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-11T01:16:08","name":"Remove constraint modifier % for fcmaddcph/fmaddcph/fcmulcph since there'\''re not commutative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911011608.312795-1-hongtao.liu@intel.com/mbox/"},{"id":137868,"url":"https://patchwork.plctlab.org/api/1.2/patches/137868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911021811.1347413-1-apinski@marvell.com/","msgid":"<20230911021811.1347413-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T02:18:11","name":"MATCH: [PR111346] `X CMP MINMAX` pattern missing :c on CMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911021811.1347413-1-apinski@marvell.com/mbox/"},{"id":137870,"url":"https://patchwork.plctlab.org/api/1.2/patches/137870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032343.2482218-1-juzhe.zhong@rivai.ai/","msgid":"<20230911032343.2482218-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:23:43","name":"[Committed] RISC-V: Add missing VLS mask bool mode reg -> reg patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032343.2482218-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137871,"url":"https://patchwork.plctlab.org/api/1.2/patches/137871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032826.2483079-1-juzhe.zhong@rivai.ai/","msgid":"<20230911032826.2483079-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:28:26","name":"[Committed,V2] RISC-V: Add VLS modes VEC_PERM support[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032826.2483079-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137872,"url":"https://patchwork.plctlab.org/api/1.2/patches/137872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911033359.2484029-1-juzhe.zhong@rivai.ai/","msgid":"<20230911033359.2484029-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:33:59","name":"RISC-V: Use dominance analysis in global vsetvl elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911033359.2484029-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137874,"url":"https://patchwork.plctlab.org/api/1.2/patches/137874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-2-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:31","name":"[v3,1/9] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-2-chenxiaolong@loongson.cn/mbox/"},{"id":137873,"url":"https://patchwork.plctlab.org/api/1.2/patches/137873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-3-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:32","name":"[v3,2/9] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-3-chenxiaolong@loongson.cn/mbox/"},{"id":137876,"url":"https://patchwork.plctlab.org/api/1.2/patches/137876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-4-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:33","name":"[v3,3/9] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-4-chenxiaolong@loongson.cn/mbox/"},{"id":137877,"url":"https://patchwork.plctlab.org/api/1.2/patches/137877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-5-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:34","name":"[v3,4/9] LoongArch:Added support for SX vector floating-point instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-5-chenxiaolong@loongson.cn/mbox/"},{"id":137879,"url":"https://patchwork.plctlab.org/api/1.2/patches/137879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-6-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:35","name":"[v3,5/9] LoongArch:Add SX instructions for vector arithmetic addition operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-6-chenxiaolong@loongson.cn/mbox/"},{"id":137875,"url":"https://patchwork.plctlab.org/api/1.2/patches/137875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-7-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:36","name":"[v3,6/9] LoongArch:Add vector subtraction arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-7-chenxiaolong@loongson.cn/mbox/"},{"id":137878,"url":"https://patchwork.plctlab.org/api/1.2/patches/137878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-8-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:37","name":"[v3,7/9] LoongArch:Add vector arithmetic addition vsadd instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-8-chenxiaolong@loongson.cn/mbox/"},{"id":137880,"url":"https://patchwork.plctlab.org/api/1.2/patches/137880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-9-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:38","name":"[v3,8/9] LoongArch:Added SX vector arithmetic multiplication instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-9-chenxiaolong@loongson.cn/mbox/"},{"id":137881,"url":"https://patchwork.plctlab.org/api/1.2/patches/137881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034827.8644-1-chenxiaolong@loongson.cn/","msgid":"<20230911034827.8644-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:48:27","name":"[v3,9/9] LoongArch:Add SX instructions for vector arithmetic operations other than multiplication, addition, and subtraction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034827.8644-1-chenxiaolong@loongson.cn/mbox/"},{"id":137882,"url":"https://patchwork.plctlab.org/api/1.2/patches/137882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911075727.2536198-1-pan2.li@intel.com/","msgid":"<20230911075727.2536198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-11T07:57:27","name":"[v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911075727.2536198-1-pan2.li@intel.com/mbox/"},{"id":137883,"url":"https://patchwork.plctlab.org/api/1.2/patches/137883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911091930.2592988-1-juzhe.zhong@rivai.ai/","msgid":"<20230911091930.2592988-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:19:30","name":"RISC-V: Remove redundant functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911091930.2592988-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137884,"url":"https://patchwork.plctlab.org/api/1.2/patches/137884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911093846.3341212-1-juzhe.zhong@rivai.ai/","msgid":"<20230911093846.3341212-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:38:46","name":"[V2] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911093846.3341212-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137885,"url":"https://patchwork.plctlab.org/api/1.2/patches/137885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911094107.3342788-1-juzhe.zhong@rivai.ai/","msgid":"<20230911094107.3342788-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:41:07","name":"[V3] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911094107.3342788-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137886,"url":"https://patchwork.plctlab.org/api/1.2/patches/137886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911110740.1844291-1-jwakely@redhat.com/","msgid":"<20230911110740.1844291-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T11:06:19","name":"libstdc++: Check if getent is available in git config script [PR111359]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911110740.1844291-1-jwakely@redhat.com/mbox/"},{"id":137887,"url":"https://patchwork.plctlab.org/api/1.2/patches/137887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e368e8e6-1032-2dca-4a73-7c556b10d7f7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T11:44:07","name":"OpenMP (C only): omp allocate - extend parsing support, improve diagnostic (was: [Patch] OpenMP (C only): omp allocate - handle stack vars, improve diagnostic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e368e8e6-1032-2dca-4a73-7c556b10d7f7@codesourcery.com/mbox/"},{"id":137888,"url":"https://patchwork.plctlab.org/api/1.2/patches/137888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911123845.1870133-1-mikael@gcc.gnu.org/","msgid":"<20230911123845.1870133-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T12:38:45","name":"fortran: Undo new symbols in all namespaces [PR110996]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911123845.1870133-1-mikael@gcc.gnu.org/mbox/"},{"id":137889,"url":"https://patchwork.plctlab.org/api/1.2/patches/137889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/WBulHlEWtAC34Gaya2RM4wi1XPmBh-8mmo1nSuaXMEDszh07eeF8nzl7-GLWrO4yPF9GAa6DAiGE3IyYkgKCefnp54JfiQZGl4r-C9qy-tU=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T13:49:03","name":"[v2,1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/WBulHlEWtAC34Gaya2RM4wi1XPmBh-8mmo1nSuaXMEDszh07eeF8nzl7-GLWrO4yPF9GAa6DAiGE3IyYkgKCefnp54JfiQZGl4r-C9qy-tU=@protonmail.com/mbox/"},{"id":137890,"url":"https://patchwork.plctlab.org/api/1.2/patches/137890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911135742.1870920-1-jwakely@redhat.com/","msgid":"<20230911135742.1870920-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T13:57:08","name":"[committed] libstdc++: Formatting std::thread::id and std::stacktrace (P2693R1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911135742.1870920-1-jwakely@redhat.com/mbox/"},{"id":137891,"url":"https://patchwork.plctlab.org/api/1.2/patches/137891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911142328.1378300-1-apinski@marvell.com/","msgid":"<20230911142328.1378300-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T14:23:28","name":"MATCH: [PR111349] add missing :c to cmp in the `(a CMP CST1) ? max : a` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911142328.1378300-1-apinski@marvell.com/mbox/"},{"id":137892,"url":"https://patchwork.plctlab.org/api/1.2/patches/137892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911144243.3506767-2-arthur.cohen@embecosm.com/","msgid":"<20230911144243.3506767-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-11T14:42:25","name":"[COMMITTED] gccrs: move functions from rust-gcc-diagnostics to rust-diagnostics.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911144243.3506767-2-arthur.cohen@embecosm.com/mbox/"},{"id":137893,"url":"https://patchwork.plctlab.org/api/1.2/patches/137893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911152703.22436-1-kmatsui@gcc.gnu.org/","msgid":"<20230911152703.22436-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T15:27:03","name":"libstdc++ Use _GLIBCXX_USE_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911152703.22436-1-kmatsui@gcc.gnu.org/mbox/"},{"id":137894,"url":"https://patchwork.plctlab.org/api/1.2/patches/137894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160811.1912603-1-jwakely@redhat.com/","msgid":"<20230911160811.1912603-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:07:36","name":"[committed] libstdc++: Move __glibcxx_assert_fail to its own file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160811.1912603-1-jwakely@redhat.com/mbox/"},{"id":137895,"url":"https://patchwork.plctlab.org/api/1.2/patches/137895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160836.1912657-1-jwakely@redhat.com/","msgid":"<20230911160836.1912657-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:08:12","name":"[committed] libstdc++: Remove unconditional use of atomics in Debug Mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160836.1912657-1-jwakely@redhat.com/mbox/"},{"id":137896,"url":"https://patchwork.plctlab.org/api/1.2/patches/137896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-2-jwakely@redhat.com/","msgid":"<20230911163534.1913512-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:32","name":"[01/13] libstdc++: Add support for running tests with multiple -std options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-2-jwakely@redhat.com/mbox/"},{"id":137901,"url":"https://patchwork.plctlab.org/api/1.2/patches/137901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-3-jwakely@redhat.com/","msgid":"<20230911163534.1913512-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:33","name":"[02/13] libstdc++: Replace dg-options \"-std=c++11\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-3-jwakely@redhat.com/mbox/"},{"id":137897,"url":"https://patchwork.plctlab.org/api/1.2/patches/137897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-4-jwakely@redhat.com/","msgid":"<20230911163534.1913512-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:34","name":"[03/13] libstdc++: Replace dg-options \"-std=c++17\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-4-jwakely@redhat.com/mbox/"},{"id":137900,"url":"https://patchwork.plctlab.org/api/1.2/patches/137900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-5-jwakely@redhat.com/","msgid":"<20230911163534.1913512-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:35","name":"[04/13] libstdc++: Replace dg-options \"-std=c++20\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-5-jwakely@redhat.com/mbox/"},{"id":137905,"url":"https://patchwork.plctlab.org/api/1.2/patches/137905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-6-jwakely@redhat.com/","msgid":"<20230911163534.1913512-6-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:36","name":"[05/13] libstdc++: Remove dg-options \"-std=c++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-6-jwakely@redhat.com/mbox/"},{"id":137898,"url":"https://patchwork.plctlab.org/api/1.2/patches/137898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-7-jwakely@redhat.com/","msgid":"<20230911163534.1913512-7-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:37","name":"[06/13] libstdc++: Remove dg-options \"-std=gnu++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-7-jwakely@redhat.com/mbox/"},{"id":137902,"url":"https://patchwork.plctlab.org/api/1.2/patches/137902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-8-jwakely@redhat.com/","msgid":"<20230911163534.1913512-8-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:38","name":"[07/13] libstdc++: Remove dg-options \"-std=gnu++2a\" from constrained algo tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-8-jwakely@redhat.com/mbox/"},{"id":137906,"url":"https://patchwork.plctlab.org/api/1.2/patches/137906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-9-jwakely@redhat.com/","msgid":"<20230911163534.1913512-9-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:39","name":"[08/13] libstdc++: Remove dg-options \"-std=gnu++20\" from std::format tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-9-jwakely@redhat.com/mbox/"},{"id":137903,"url":"https://patchwork.plctlab.org/api/1.2/patches/137903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-10-jwakely@redhat.com/","msgid":"<20230911163534.1913512-10-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:40","name":"[09/13] libstdc++: Remove dg-options \"-std=gnu++20\" from std::chrono tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-10-jwakely@redhat.com/mbox/"},{"id":137908,"url":"https://patchwork.plctlab.org/api/1.2/patches/137908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-11-jwakely@redhat.com/","msgid":"<20230911163534.1913512-11-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:41","name":"[10/13] libstdc++: Remove dg-options \"-std=gnu++23\" from std::expected tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-11-jwakely@redhat.com/mbox/"},{"id":137909,"url":"https://patchwork.plctlab.org/api/1.2/patches/137909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-12-jwakely@redhat.com/","msgid":"<20230911163534.1913512-12-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:42","name":"[11/13] libstdc++: Remove dg-options \"-std=gnu++23\" from remaining tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-12-jwakely@redhat.com/mbox/"},{"id":137904,"url":"https://patchwork.plctlab.org/api/1.2/patches/137904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-13-jwakely@redhat.com/","msgid":"<20230911163534.1913512-13-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:43","name":"[12/13] libstdc++: Remove dg-options \"-std=gnu++2a\" from XFAIL std::span tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-13-jwakely@redhat.com/mbox/"},{"id":137899,"url":"https://patchwork.plctlab.org/api/1.2/patches/137899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-14-jwakely@redhat.com/","msgid":"<20230911163534.1913512-14-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:44","name":"[13/13] libstdc++: Simplify dejagnu directives for some tests using threads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-14-jwakely@redhat.com/mbox/"},{"id":137907,"url":"https://patchwork.plctlab.org/api/1.2/patches/137907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sM7F5ffvnEfFwNp0EozHTd1_YCK-4LhC7i-3HkPEZy+1Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T16:43:38","name":"RISC-V: Replace not + bitwise_imm with li + bitwise_not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sM7F5ffvnEfFwNp0EozHTd1_YCK-4LhC7i-3HkPEZy+1Q@mail.gmail.com/mbox/"},{"id":137911,"url":"https://patchwork.plctlab.org/api/1.2/patches/137911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-2-kmatsui@gcc.gnu.org/","msgid":"<20230911170828.73628-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:05:53","name":"[1/2] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137910,"url":"https://patchwork.plctlab.org/api/1.2/patches/137910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-3-kmatsui@gcc.gnu.org/","msgid":"<20230911170828.73628-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:05:54","name":"[2/2] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137912,"url":"https://patchwork.plctlab.org/api/1.2/patches/137912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9PdYVr65NKA89b@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-11T17:33:41","name":"sccvn: Avoid ICEs on _BitInt load BIT_AND_EXPR mask [PR111338]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9PdYVr65NKA89b@tucnak/mbox/"},{"id":137913,"url":"https://patchwork.plctlab.org/api/1.2/patches/137913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9RahtJvkQl7PFG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-11T17:42:02","name":"small _BitInt tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9RahtJvkQl7PFG@tucnak/mbox/"},{"id":137914,"url":"https://patchwork.plctlab.org/api/1.2/patches/137914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911174433.492082-1-vultkayn@gcc.gnu.org/","msgid":"<20230911174433.492082-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:44:34","name":"[WIP,RFC] analyzer: Move gcc.dg/analyzer tests to c-c++-common (3) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911174433.492082-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137915,"url":"https://patchwork.plctlab.org/api/1.2/patches/137915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b+HNRom4GLgp6tHZyVkQVeqH=cQpw5X0s6=iq9GmFKug@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T18:59:24","name":"[committed] i386: Handle CONST_WIDE_INT in output_pic_addr_const [PR111340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b+HNRom4GLgp6tHZyVkQVeqH=cQpw5X0s6=iq9GmFKug@mail.gmail.com/mbox/"},{"id":137916,"url":"https://patchwork.plctlab.org/api/1.2/patches/137916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911203939.1394059-1-apinski@marvell.com/","msgid":"<20230911203939.1394059-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T20:39:39","name":"MATCH: [PR111348] add missing :c to cmp in the `(a CMP b) ? minmax : minmax` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911203939.1394059-1-apinski@marvell.com/mbox/"},{"id":137932,"url":"https://patchwork.plctlab.org/api/1.2/patches/137932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-2-kmatsui@gcc.gnu.org/","msgid":"<20230911221328.26133-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T22:11:41","name":"[1/2] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137933,"url":"https://patchwork.plctlab.org/api/1.2/patches/137933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-3-kmatsui@gcc.gnu.org/","msgid":"<20230911221328.26133-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T22:11:42","name":"[2/2] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137936,"url":"https://patchwork.plctlab.org/api/1.2/patches/137936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911225308.2275313-1-ewlu@rivosinc.com/","msgid":"<20230911225308.2275313-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-11T22:52:54","name":"RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911225308.2275313-1-ewlu@rivosinc.com/mbox/"},{"id":137939,"url":"https://patchwork.plctlab.org/api/1.2/patches/137939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-2-kmatsui@gcc.gnu.org/","msgid":"<20230912001756.87388-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T00:16:05","name":"[1/2] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137940,"url":"https://patchwork.plctlab.org/api/1.2/patches/137940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-3-kmatsui@gcc.gnu.org/","msgid":"<20230912001756.87388-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T00:16:06","name":"[2/2] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137941,"url":"https://patchwork.plctlab.org/api/1.2/patches/137941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-1-ppalka@redhat.com/","msgid":"<20230912010852.1027184-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:50","name":"[1/3] libstdc++: Remove std::bind_front specialization for no bound args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-1-ppalka@redhat.com/mbox/"},{"id":137942,"url":"https://patchwork.plctlab.org/api/1.2/patches/137942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-2-ppalka@redhat.com/","msgid":"<20230912010852.1027184-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:51","name":"[2/3] libstdc++: Fix std::bind_front perfect forwarding [PR111327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-2-ppalka@redhat.com/mbox/"},{"id":137943,"url":"https://patchwork.plctlab.org/api/1.2/patches/137943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-3-ppalka@redhat.com/","msgid":"<20230912010852.1027184-3-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:52","name":"[3/3] libstdc++: Fix std::not_fn perfect forwarding [PR111327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-3-ppalka@redhat.com/mbox/"},{"id":137945,"url":"https://patchwork.plctlab.org/api/1.2/patches/137945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/addbfa6b9ff68058beb7e248812d12d408a5afe6.1694482087.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T01:28:08","name":"[1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/addbfa6b9ff68058beb7e248812d12d408a5afe6.1694482087.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137944,"url":"https://patchwork.plctlab.org/api/1.2/patches/137944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com/","msgid":"<20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-12T01:28:09","name":"[2/2] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137948,"url":"https://patchwork.plctlab.org/api/1.2/patches/137948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912020825.12497-1-xuli1@eswincomputing.com/","msgid":"<20230912020825.12497-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T02:08:25","name":"RISC-V: Add vcreate intrinsics for RVV tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912020825.12497-1-xuli1@eswincomputing.com/mbox/"},{"id":137949,"url":"https://patchwork.plctlab.org/api/1.2/patches/137949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-2-kmatsui@gcc.gnu.org/","msgid":"<20230912024920.55120-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T02:38:38","name":"[1/2] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137950,"url":"https://patchwork.plctlab.org/api/1.2/patches/137950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-3-kmatsui@gcc.gnu.org/","msgid":"<20230912024920.55120-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T02:38:39","name":"[2/2] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137952,"url":"https://patchwork.plctlab.org/api/1.2/patches/137952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912042152.1412606-1-apinski@marvell.com/","msgid":"<20230912042152.1412606-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T04:21:52","name":"MATCH: Simplify (a CMP1 b) ^ (a CMP2 b)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912042152.1412606-1-apinski@marvell.com/mbox/"},{"id":137956,"url":"https://patchwork.plctlab.org/api/1.2/patches/137956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-2-kmatsui@gcc.gnu.org/","msgid":"<20230912044638.14504-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T04:26:18","name":"[1/2] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137957,"url":"https://patchwork.plctlab.org/api/1.2/patches/137957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-3-kmatsui@gcc.gnu.org/","msgid":"<20230912044638.14504-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T04:26:19","name":"[2/2] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137968,"url":"https://patchwork.plctlab.org/api/1.2/patches/137968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912055415.5786-1-xuli1@eswincomputing.com/","msgid":"<20230912055415.5786-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T05:54:15","name":"RISC-V: Elimilate warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912055415.5786-1-xuli1@eswincomputing.com/mbox/"},{"id":137975,"url":"https://patchwork.plctlab.org/api/1.2/patches/137975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912061304.7564-1-xuli1@eswincomputing.com/","msgid":"<20230912061304.7564-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T06:13:04","name":"[v2] RISC-V: Elimilate warning in class vcreate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912061304.7564-1-xuli1@eswincomputing.com/mbox/"},{"id":137977,"url":"https://patchwork.plctlab.org/api/1.2/patches/137977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912062013.9221-1-xuli1@eswincomputing.com/","msgid":"<20230912062013.9221-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T06:20:13","name":"[v3] RISC-V: Elimilate warning in class vcreate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912062013.9221-1-xuli1@eswincomputing.com/mbox/"},{"id":137980,"url":"https://patchwork.plctlab.org/api/1.2/patches/137980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912064932.647337-1-juzhe.zhong@rivai.ai/","msgid":"<20230912064932.647337-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T06:49:32","name":"[V4] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912064932.647337-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137985,"url":"https://patchwork.plctlab.org/api/1.2/patches/137985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQANHzUrgBvCqzc2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:02:55","name":"testsuite work-around compound-assignment-1.c C++ failures on various targets [PR111377]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQANHzUrgBvCqzc2@tucnak/mbox/"},{"id":137993,"url":"https://patchwork.plctlab.org/api/1.2/patches/137993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c046d64f-b97e-c2e3-cd77-60f39cc03cf2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:18:38","name":"[PING,^0] rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c046d64f-b97e-c2e3-cd77-60f39cc03cf2@linux.ibm.com/mbox/"},{"id":137994,"url":"https://patchwork.plctlab.org/api/1.2/patches/137994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com/","msgid":"<6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com>","list_archive_url":null,"date":"2023-09-12T07:20:07","name":"[PING,^0,3/4] Improve functionality of ree pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com/mbox/"},{"id":137995,"url":"https://patchwork.plctlab.org/api/1.2/patches/137995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912072038.1230798-1-pan2.li@intel.com/","msgid":"<20230912072038.1230798-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T07:20:38","name":"[v2] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912072038.1230798-1-pan2.li@intel.com/mbox/"},{"id":137997,"url":"https://patchwork.plctlab.org/api/1.2/patches/137997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com/","msgid":"<5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com>","list_archive_url":null,"date":"2023-09-12T07:21:28","name":"[PING^5] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com/mbox/"},{"id":138003,"url":"https://patchwork.plctlab.org/api/1.2/patches/138003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-2-kmatsui@gcc.gnu.org/","msgid":"<20230912074423.5248-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T07:23:28","name":"[1/2] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-2-kmatsui@gcc.gnu.org/mbox/"},{"id":138005,"url":"https://patchwork.plctlab.org/api/1.2/patches/138005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-3-kmatsui@gcc.gnu.org/","msgid":"<20230912074423.5248-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T07:23:29","name":"[2/2] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-3-kmatsui@gcc.gnu.org/mbox/"},{"id":138007,"url":"https://patchwork.plctlab.org/api/1.2/patches/138007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba6b6653-c926-6a49-a3b3-659d4af2b3a2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:46:48","name":"[PING^3,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba6b6653-c926-6a49-a3b3-659d4af2b3a2@linux.ibm.com/mbox/"},{"id":138032,"url":"https://patchwork.plctlab.org/api/1.2/patches/138032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edj3zsns.fsf@euler.schwinge.homeip.net/","msgid":"<87edj3zsns.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T08:45:27","name":"testsuite: Port '\''check-function-bodies'\'' to nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edj3zsns.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138033,"url":"https://patchwork.plctlab.org/api/1.2/patches/138033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912084613.1552014-1-pan2.li@intel.com/","msgid":"<20230912084613.1552014-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T08:46:13","name":"[v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912084613.1552014-1-pan2.li@intel.com/mbox/"},{"id":138037,"url":"https://patchwork.plctlab.org/api/1.2/patches/138037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912085728.2155459-1-lehua.ding@rivai.ai/","msgid":"<20230912085728.2155459-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T08:57:28","name":"RISC-V: Add missed cond autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912085728.2155459-1-lehua.ding@rivai.ai/mbox/"},{"id":138040,"url":"https://patchwork.plctlab.org/api/1.2/patches/138040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bke7zrw5.fsf@euler.schwinge.homeip.net/","msgid":"<87bke7zrw5.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:02:02","name":"nvptx '\''TARGET_USE_LOCAL_THUNK_ALIAS_P'\'', '\''TARGET_SUPPORTS_ALIASES'\'' (was: [committed][nvptx] Use .alias directive for mptx >= 6.3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bke7zrw5.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138048,"url":"https://patchwork.plctlab.org/api/1.2/patches/138048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912091805.2322-1-wangfeng@eswincomputing.com/","msgid":"<20230912091805.2322-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T09:18:05","name":"[v6] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912091805.2322-1-wangfeng@eswincomputing.com/mbox/"},{"id":138062,"url":"https://patchwork.plctlab.org/api/1.2/patches/138062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y4fzqca.fsf@euler.schwinge.homeip.net/","msgid":"<875y4fzqca.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:35:33","name":"Pass '\''SYSROOT_CFLAGS_FOR_TARGET'\'' down to target libraries [PR109951] (was: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y4fzqca.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138064,"url":"https://patchwork.plctlab.org/api/1.2/patches/138064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jjzzqc2.fsf@euler.schwinge.homeip.net/","msgid":"<874jjzzqc2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:35:41","name":"libgomp: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR91884, PR109951] (was: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jjzzqc2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138077,"url":"https://patchwork.plctlab.org/api/1.2/patches/138077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-2-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-2-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:03","name":"[v2,01/11] Native complex ops : Conditional lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-2-snoiry@kalrayinc.com/mbox/"},{"id":138078,"url":"https://patchwork.plctlab.org/api/1.2/patches/138078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-3-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-3-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:04","name":"[v2,02/11] Native complex ops: Move functions to hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-3-snoiry@kalrayinc.com/mbox/"},{"id":138076,"url":"https://patchwork.plctlab.org/api/1.2/patches/138076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-4-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-4-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:05","name":"[v2,03/11] Native complex ops: Add gen_rtx_complex hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-4-snoiry@kalrayinc.com/mbox/"},{"id":138082,"url":"https://patchwork.plctlab.org/api/1.2/patches/138082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-5-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-5-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:06","name":"[v2,04/11] Native complex ops: Allow native complex regs and ops in rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-5-snoiry@kalrayinc.com/mbox/"},{"id":138085,"url":"https://patchwork.plctlab.org/api/1.2/patches/138085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-6-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-6-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:07","name":"[v2,05/11] Native complex ops: Add the conjugate op in optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-6-snoiry@kalrayinc.com/mbox/"},{"id":138080,"url":"https://patchwork.plctlab.org/api/1.2/patches/138080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-7-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-7-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:08","name":"[v2,06/11] Native complex ops: Update how complex rotations are handled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-7-snoiry@kalrayinc.com/mbox/"},{"id":138086,"url":"https://patchwork.plctlab.org/api/1.2/patches/138086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-8-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-8-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:09","name":"[v2,07/11] Native complex ops: Vectorization of native complex operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-8-snoiry@kalrayinc.com/mbox/"},{"id":138079,"url":"https://patchwork.plctlab.org/api/1.2/patches/138079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-9-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-9-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:10","name":"[v2,08/11] Native complex ops: Add explicit vector of complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-9-snoiry@kalrayinc.com/mbox/"},{"id":138083,"url":"https://patchwork.plctlab.org/api/1.2/patches/138083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-10-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-10-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:11","name":"[v2,09/11] Native complex ops: remove useless special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-10-snoiry@kalrayinc.com/mbox/"},{"id":138081,"url":"https://patchwork.plctlab.org/api/1.2/patches/138081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-11-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-11-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:12","name":"[v2,10/11] Native complex ops: Add a fast complex multiplication pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-11-snoiry@kalrayinc.com/mbox/"},{"id":138084,"url":"https://patchwork.plctlab.org/api/1.2/patches/138084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-12-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-12-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:13","name":"[v2,11/11] Native complex ops: Experimental support in x86 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-12-snoiry@kalrayinc.com/mbox/"},{"id":138095,"url":"https://patchwork.plctlab.org/api/1.2/patches/138095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qf3zmi4.fsf@euler.schwinge.homeip.net/","msgid":"<871qf3zmi4.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T10:58:27","name":"libffi: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH v5 GCC] libffi/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qf3zmi4.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138096,"url":"https://patchwork.plctlab.org/api/1.2/patches/138096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912110026.2310378-1-juzhe.zhong@rivai.ai/","msgid":"<20230912110026.2310378-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T11:00:25","name":"[V5] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912110026.2310378-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138098,"url":"https://patchwork.plctlab.org/api/1.2/patches/138098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1hby7pb.fsf@euler.schwinge.homeip.net/","msgid":"<87y1hby7pb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T11:03:28","name":"libatomic: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH v4 1/5] libatomic/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1hby7pb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138102,"url":"https://patchwork.plctlab.org/api/1.2/patches/138102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7jy73y.fsf@euler.schwinge.homeip.net/","msgid":"<87sf7jy73y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T11:16:17","name":"libgo: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH 3/4] libgo/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7jy73y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138117,"url":"https://patchwork.plctlab.org/api/1.2/patches/138117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114520.1978760-1-jwakely@redhat.com/","msgid":"<20230912114520.1978760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T11:45:08","name":"[committed] libstdc++: Format Python code according to PEP8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114520.1978760-1-jwakely@redhat.com/mbox/"},{"id":138118,"url":"https://patchwork.plctlab.org/api/1.2/patches/138118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114534.1978778-1-jwakely@redhat.com/","msgid":"<20230912114534.1978778-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T11:45:21","name":"[committed] contrib: Quote variable in test expression [PR111360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114534.1978778-1-jwakely@redhat.com/mbox/"},{"id":138167,"url":"https://patchwork.plctlab.org/api/1.2/patches/138167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912130254.1658075-1-pan2.li@intel.com/","msgid":"<20230912130254.1658075-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T13:02:54","name":"[v1] RISC-V: Remove unused structure in cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912130254.1658075-1-pan2.li@intel.com/mbox/"},{"id":138178,"url":"https://patchwork.plctlab.org/api/1.2/patches/138178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912131927.83094-1-juzhe.zhong@rivai.ai/","msgid":"<20230912131927.83094-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T13:19:27","name":"RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912131927.83094-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138184,"url":"https://patchwork.plctlab.org/api/1.2/patches/138184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912133202.94470-1-juzhe.zhong@rivai.ai/","msgid":"<20230912133202.94470-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T13:32:02","name":"[V2] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912133202.94470-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138190,"url":"https://patchwork.plctlab.org/api/1.2/patches/138190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912134044.1993413-1-jwakely@redhat.com/","msgid":"<20230912134044.1993413-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T13:39:52","name":"[14/13] libstdc++: Re-initialize static data files used by tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912134044.1993413-1-jwakely@redhat.com/mbox/"},{"id":138218,"url":"https://patchwork.plctlab.org/api/1.2/patches/138218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com/","msgid":"<10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com>","list_archive_url":null,"date":"2023-09-12T14:27:31","name":"libgomp, nvptx, amdgcn: parallel reverse offload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com/mbox/"},{"id":138249,"url":"https://patchwork.plctlab.org/api/1.2/patches/138249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-2-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:11","name":"[01/19] aarch64: Use local frame vars in shrink-wrapping code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-2-richard.sandiford@arm.com/mbox/"},{"id":138254,"url":"https://patchwork.plctlab.org/api/1.2/patches/138254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-3-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:12","name":"[02/19] aarch64: Avoid a use of callee_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-3-richard.sandiford@arm.com/mbox/"},{"id":138260,"url":"https://patchwork.plctlab.org/api/1.2/patches/138260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-4-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:13","name":"[03/19] aarch64: Explicitly handle frames with no saved registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-4-richard.sandiford@arm.com/mbox/"},{"id":138266,"url":"https://patchwork.plctlab.org/api/1.2/patches/138266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-5-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:14","name":"[04/19] aarch64: Add bytes_below_saved_regs to frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-5-richard.sandiford@arm.com/mbox/"},{"id":138252,"url":"https://patchwork.plctlab.org/api/1.2/patches/138252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-6-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:15","name":"[05/19] aarch64: Add bytes_below_hard_fp to frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-6-richard.sandiford@arm.com/mbox/"},{"id":138255,"url":"https://patchwork.plctlab.org/api/1.2/patches/138255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-7-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:16","name":"[06/19] aarch64: Tweak aarch64_save/restore_callee_saves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-7-richard.sandiford@arm.com/mbox/"},{"id":138251,"url":"https://patchwork.plctlab.org/api/1.2/patches/138251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-8-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-8-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:17","name":"[07/19] aarch64: Only calculate chain_offset if there is a chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-8-richard.sandiford@arm.com/mbox/"},{"id":138270,"url":"https://patchwork.plctlab.org/api/1.2/patches/138270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-9-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-9-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:18","name":"[08/19] aarch64: Rename locals_offset to bytes_above_locals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-9-richard.sandiford@arm.com/mbox/"},{"id":138259,"url":"https://patchwork.plctlab.org/api/1.2/patches/138259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-10-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-10-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:19","name":"[09/19] aarch64: Rename hard_fp_offset to bytes_above_hard_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-10-richard.sandiford@arm.com/mbox/"},{"id":138262,"url":"https://patchwork.plctlab.org/api/1.2/patches/138262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-11-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-11-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:20","name":"[10/19] aarch64: Tweak frame_size comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-11-richard.sandiford@arm.com/mbox/"},{"id":138258,"url":"https://patchwork.plctlab.org/api/1.2/patches/138258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-12-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-12-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:21","name":"[11/19] aarch64: Measure reg_offset from the bottom of the frame","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-12-richard.sandiford@arm.com/mbox/"},{"id":138253,"url":"https://patchwork.plctlab.org/api/1.2/patches/138253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-13-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-13-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:22","name":"[12/19] aarch64: Simplify top of frame allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-13-richard.sandiford@arm.com/mbox/"},{"id":138263,"url":"https://patchwork.plctlab.org/api/1.2/patches/138263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-14-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-14-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:23","name":"[13/19] aarch64: Minor initial adjustment tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-14-richard.sandiford@arm.com/mbox/"},{"id":138267,"url":"https://patchwork.plctlab.org/api/1.2/patches/138267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-15-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-15-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:24","name":"[14/19] aarch64: Tweak stack clash boundary condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-15-richard.sandiford@arm.com/mbox/"},{"id":138265,"url":"https://patchwork.plctlab.org/api/1.2/patches/138265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-16-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-16-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:25","name":"[15/19] aarch64: Put LR save probe in first 16 bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-16-richard.sandiford@arm.com/mbox/"},{"id":138271,"url":"https://patchwork.plctlab.org/api/1.2/patches/138271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-17-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-17-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:26","name":"[16/19] aarch64: Simplify probe of final frame allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-17-richard.sandiford@arm.com/mbox/"},{"id":138273,"url":"https://patchwork.plctlab.org/api/1.2/patches/138273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-18-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-18-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:27","name":"[17/19] aarch64: Explicitly record probe registers in frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-18-richard.sandiford@arm.com/mbox/"},{"id":138268,"url":"https://patchwork.plctlab.org/api/1.2/patches/138268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-19-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-19-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:28","name":"[18/19] aarch64: Remove below_hard_fp_saved_regs_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-19-richard.sandiford@arm.com/mbox/"},{"id":138272,"url":"https://patchwork.plctlab.org/api/1.2/patches/138272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-20-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-20-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:29","name":"[19/19] aarch64: Make stack smash canary protect saved registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-20-richard.sandiford@arm.com/mbox/"},{"id":138256,"url":"https://patchwork.plctlab.org/api/1.2/patches/138256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-1-apinski@marvell.com/","msgid":"<20230912152542.1440800-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T15:25:41","name":"[1/2] MATCH: [PR111364] Add some more minmax cmp operand simplifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-1-apinski@marvell.com/mbox/"},{"id":138274,"url":"https://patchwork.plctlab.org/api/1.2/patches/138274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-2-apinski@marvell.com/","msgid":"<20230912152542.1440800-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T15:25:42","name":"[2/2] MATCH: Move `X <= MAX(X, Y)` before `MIN (X, C1) < C2` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-2-apinski@marvell.com/mbox/"},{"id":138295,"url":"https://patchwork.plctlab.org/api/1.2/patches/138295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162514.2001863-1-lehua.ding@rivai.ai/","msgid":"<20230912162514.2001863-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:14","name":"RISC-V: Support cond vfsgnj.vv autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162514.2001863-1-lehua.ding@rivai.ai/mbox/"},{"id":138294,"url":"https://patchwork.plctlab.org/api/1.2/patches/138294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162527.2001917-1-lehua.ding@rivai.ai/","msgid":"<20230912162527.2001917-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:27","name":"RISC-V: Support cond vnsrl/vnsra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162527.2001917-1-lehua.ding@rivai.ai/mbox/"},{"id":138297,"url":"https://patchwork.plctlab.org/api/1.2/patches/138297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162540.2001990-1-lehua.ding@rivai.ai/","msgid":"<20230912162540.2001990-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:40","name":"RISC-V: Support cond vmulh.vv and vmulu.vv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162540.2001990-1-lehua.ding@rivai.ai/mbox/"},{"id":138303,"url":"https://patchwork.plctlab.org/api/1.2/patches/138303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com/","msgid":"<92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com>","list_archive_url":null,"date":"2023-09-12T16:32:44","name":"[OG13,committed] libgomp, nvptx, amdgcn: parallel reverse offload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com/mbox/"},{"id":138308,"url":"https://patchwork.plctlab.org/api/1.2/patches/138308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcff01b9-29c7-df6a-cab3-4883e7db95a3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T16:39:59","name":"[v1] rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcff01b9-29c7-df6a-cab3-4883e7db95a3@linux.ibm.com/mbox/"},{"id":138331,"url":"https://patchwork.plctlab.org/api/1.2/patches/138331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172703.1929911-1-jason@redhat.com/","msgid":"<20230912172703.1929911-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:27:03","name":"[pushed] c++: ICE with -fno-exceptions and array init [PR107198]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172703.1929911-1-jason@redhat.com/mbox/"},{"id":138333,"url":"https://patchwork.plctlab.org/api/1.2/patches/138333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172744.1930180-1-jason@redhat.com/","msgid":"<20230912172744.1930180-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:27:44","name":"[pushed] c++: __integer_pack with class argument [PR111357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172744.1930180-1-jason@redhat.com/mbox/"},{"id":138335,"url":"https://patchwork.plctlab.org/api/1.2/patches/138335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912173036.1930553-1-jason@redhat.com/","msgid":"<20230912173036.1930553-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:30:36","name":"[RFC] diagnostic: add permerror variants with opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912173036.1930553-1-jason@redhat.com/mbox/"},{"id":138381,"url":"https://patchwork.plctlab.org/api/1.2/patches/138381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912185436.314306-1-patrick@rivosinc.com/","msgid":"<20230912185436.314306-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-12T18:54:36","name":"check_GNU_style.py: Skip .md square bracket linting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912185436.314306-1-patrick@rivosinc.com/mbox/"},{"id":138390,"url":"https://patchwork.plctlab.org/api/1.2/patches/138390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sN-VprzcsPFuDwoQ+U0n+n-G+MU6+yTRqsD159qhdnsxw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T19:09:07","name":"[V2] RISC-V: Replace not + bitwise_imm with li + bitwise_not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sN-VprzcsPFuDwoQ+U0n+n-G+MU6+yTRqsD159qhdnsxw@mail.gmail.com/mbox/"},{"id":138459,"url":"https://patchwork.plctlab.org/api/1.2/patches/138459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912221013.1456582-1-apinski@marvell.com/","msgid":"<20230912221013.1456582-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T22:10:13","name":"MATCH: Simplify `(X % Y) < Y` pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912221013.1456582-1-apinski@marvell.com/mbox/"},{"id":138501,"url":"https://patchwork.plctlab.org/api/1.2/patches/138501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913003320.1896552-1-ppalka@redhat.com/","msgid":"<20230913003320.1896552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T00:33:20","name":"c++: always check arity before deduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913003320.1896552-1-ppalka@redhat.com/mbox/"},{"id":138511,"url":"https://patchwork.plctlab.org/api/1.2/patches/138511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913005422.17544-1-chenglulu@loongson.cn/","msgid":"<20230913005422.17544-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-13T00:54:23","name":"[v2] LoongArch: Fix bug of '\''di3_fake'\''.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913005422.17544-1-chenglulu@loongson.cn/mbox/"},{"id":138572,"url":"https://patchwork.plctlab.org/api/1.2/patches/138572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913031116.19464-1-chenglulu@loongson.cn/","msgid":"<20230913031116.19464-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:11:16","name":"LoongArch: Change the value of branch_cost from 2 to 6.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913031116.19464-1-chenglulu@loongson.cn/mbox/"},{"id":138576,"url":"https://patchwork.plctlab.org/api/1.2/patches/138576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913032235.2853225-1-juzhe.zhong@rivai.ai/","msgid":"<20230913032235.2853225-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T03:22:35","name":"[committed] RISC-V: Remove redundant ABI test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913032235.2853225-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138578,"url":"https://patchwork.plctlab.org/api/1.2/patches/138578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-2-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:26","name":"[v4,01/23] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-2-chenxiaolong@loongson.cn/mbox/"},{"id":138579,"url":"https://patchwork.plctlab.org/api/1.2/patches/138579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-3-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:27","name":"[v4,02/23] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-3-chenxiaolong@loongson.cn/mbox/"},{"id":138580,"url":"https://patchwork.plctlab.org/api/1.2/patches/138580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-4-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:28","name":"[v4,03/23] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-4-chenxiaolong@loongson.cn/mbox/"},{"id":138581,"url":"https://patchwork.plctlab.org/api/1.2/patches/138581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-5-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:29","name":"[v4,04/23] LoongArch: Add tests for SX vector floating-point instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-5-chenxiaolong@loongson.cn/mbox/"},{"id":138582,"url":"https://patchwork.plctlab.org/api/1.2/patches/138582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-6-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:30","name":"[v4,05/23] LoongArch: Add tests for SX vector addition instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-6-chenxiaolong@loongson.cn/mbox/"},{"id":138583,"url":"https://patchwork.plctlab.org/api/1.2/patches/138583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-7-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:31","name":"[v4,06/23] LoongArch: Add tests for SX vector subtraction instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-7-chenxiaolong@loongson.cn/mbox/"},{"id":138585,"url":"https://patchwork.plctlab.org/api/1.2/patches/138585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-8-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:32","name":"[v4,07/23] LoongArch: Add tests for SX vector addition vsadd instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-8-chenxiaolong@loongson.cn/mbox/"},{"id":138584,"url":"https://patchwork.plctlab.org/api/1.2/patches/138584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-9-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:33","name":"[v4,08/23] LoongArch: Add tests for the SX vector multiplication instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-9-chenxiaolong@loongson.cn/mbox/"},{"id":138586,"url":"https://patchwork.plctlab.org/api/1.2/patches/138586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033443.5912-1-chenxiaolong@loongson.cn/","msgid":"<20230913033443.5912-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:34:43","name":"[v4,09/23] LoongArch: Add tests for SX vector vavg/vavgr instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033443.5912-1-chenxiaolong@loongson.cn/mbox/"},{"id":138592,"url":"https://patchwork.plctlab.org/api/1.2/patches/138592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-1-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:13","name":"[v4,10/23] LoongArch: Add tests for SX vector vmax/vmaxi/vmin/vmini instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-1-chenxiaolong@loongson.cn/mbox/"},{"id":138595,"url":"https://patchwork.plctlab.org/api/1.2/patches/138595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-2-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:14","name":"[v4,11/23] LoongArch: Add tests for SX vector vexth/vextl/vldi/vneg/vsat instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-2-chenxiaolong@loongson.cn/mbox/"},{"id":138589,"url":"https://patchwork.plctlab.org/api/1.2/patches/138589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-3-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:15","name":"[v4,12/23] LoongArch: Add tests for SX vector vabsd/vmskgez/vmskltz/vmsknz/vsigncov instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-3-chenxiaolong@loongson.cn/mbox/"},{"id":138588,"url":"https://patchwork.plctlab.org/api/1.2/patches/138588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-4-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:16","name":"[v4,13/23] LoongArch: Add tests for SX vector vdiv/vmod instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-4-chenxiaolong@loongson.cn/mbox/"},{"id":138591,"url":"https://patchwork.plctlab.org/api/1.2/patches/138591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-5-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:17","name":"[v4,14/23] LoongArch: Add tests for SX vector vsll/vslli/vsrl/vsrli/vsrln/vsrlni/vsrlr /vsrlri/vslrlrn/vsrlrni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-5-chenxiaolong@loongson.cn/mbox/"},{"id":138590,"url":"https://patchwork.plctlab.org/api/1.2/patches/138590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-6-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:18","name":"[v4,15/23] LoongArch: Add tests for SX vector vrotr/vrotri/vsra/vsrai/vsran/vsrani /vsrarn/vsrarni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-6-chenxiaolong@loongson.cn/mbox/"},{"id":138594,"url":"https://patchwork.plctlab.org/api/1.2/patches/138594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-7-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:19","name":"[v4,16/23] LoongArch: Add tests for SX vector vssran/vssrani/vssrarn/vssrarni/vssrln /vssrlni/vssrlrn/vssrlrni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-7-chenxiaolong@loongson.cn/mbox/"},{"id":138600,"url":"https://patchwork.plctlab.org/api/1.2/patches/138600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-8-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:20","name":"[v4,17/23] LoongArch: Add tests for SX vector vbitclr/vbitclri/vbitrev/vbitrevi/ vbitsel/vbitseli/vbitset/vbitseti/vclo/vclz/vpcnt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-8-chenxiaolong@loongson.cn/mbox/"},{"id":138593,"url":"https://patchwork.plctlab.org/api/1.2/patches/138593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-9-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:21","name":"[v4,18/23] LoongArch: Add tests for SX vector floating point arithmetic instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-9-chenxiaolong@loongson.cn/mbox/"},{"id":138598,"url":"https://patchwork.plctlab.org/api/1.2/patches/138598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033638.6181-1-chenxiaolong@loongson.cn/","msgid":"<20230913033638.6181-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:36:37","name":"[v4,19/23] LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseqi/vsle /vslei/vslt/vslti instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033638.6181-1-chenxiaolong@loongson.cn/mbox/"},{"id":138604,"url":"https://patchwork.plctlab.org/api/1.2/patches/138604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-1-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:23","name":"[v4,20/23] LoongArch: Add tests for SX vector vfcmp instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-1-chenxiaolong@loongson.cn/mbox/"},{"id":138601,"url":"https://patchwork.plctlab.org/api/1.2/patches/138601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-2-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:24","name":"[v4,21/23] LoongArch: Add tests for SX vector handling and shuffle instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-2-chenxiaolong@loongson.cn/mbox/"},{"id":138599,"url":"https://patchwork.plctlab.org/api/1.2/patches/138599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-3-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:25","name":"[v4,22/23] LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vori/vnor/ vnori/vxor/vxori instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-3-chenxiaolong@loongson.cn/mbox/"},{"id":138602,"url":"https://patchwork.plctlab.org/api/1.2/patches/138602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-4-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:26","name":"[v4,23/23] LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-4-chenxiaolong@loongson.cn/mbox/"},{"id":138605,"url":"https://patchwork.plctlab.org/api/1.2/patches/138605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-2-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:38","name":"[v4,01/22] LoongArch: Add tests for ASX vector xvadd/xvadda/xvaddi/xvaddwev/ xvaddwodxvsadd instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-2-chenxiaolong@loongson.cn/mbox/"},{"id":138607,"url":"https://patchwork.plctlab.org/api/1.2/patches/138607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-3-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:39","name":"[v4,02/22] LoongArch: Add tests for ASX vector xvhadd/xvhaddw/xvmaddwev/xvmaddwod instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-3-chenxiaolong@loongson.cn/mbox/"},{"id":138608,"url":"https://patchwork.plctlab.org/api/1.2/patches/138608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-4-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:40","name":"[v4,03/22] LoongArch: Add tests for ASX vector subtraction instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-4-chenxiaolong@loongson.cn/mbox/"},{"id":138613,"url":"https://patchwork.plctlab.org/api/1.2/patches/138613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-5-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:41","name":"[v4,04/22] LoongArch: Add tests for ASX vector xvmul/xvmod/xvdiv instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-5-chenxiaolong@loongson.cn/mbox/"},{"id":138615,"url":"https://patchwork.plctlab.org/api/1.2/patches/138615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-6-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:42","name":"[v4,05/22] LoongArch: Add tests for ASX vector xvmax/xvmaxi/xvmin/xvmini instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-6-chenxiaolong@loongson.cn/mbox/"},{"id":138612,"url":"https://patchwork.plctlab.org/api/1.2/patches/138612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-7-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:43","name":"[v4,06/22] LoongArch: Add tests for ASX vector xvldi/xvmskgez/xvmskltz/xvmsknz/xvmuh /xvsigncov instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-7-chenxiaolong@loongson.cn/mbox/"},{"id":138617,"url":"https://patchwork.plctlab.org/api/1.2/patches/138617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-8-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:44","name":"[v4,07/22] LoongArch: Add tests for ASX vector xvand/xvandi/xvandn/xvor/xvori/ xvnor/xvnori/xvxor/xvxori instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-8-chenxiaolong@loongson.cn/mbox/"},{"id":138609,"url":"https://patchwork.plctlab.org/api/1.2/patches/138609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-9-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:45","name":"[v4,08/22] LoongArch: Add tests for ASX vector xvsll/xvsrl instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-9-chenxiaolong@loongson.cn/mbox/"},{"id":138616,"url":"https://patchwork.plctlab.org/api/1.2/patches/138616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034010.7569-1-chenxiaolong@loongson.cn/","msgid":"<20230913034010.7569-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:10","name":"[v4,09/22] LoongArch: Add tests for ASX vector xvextl/xvsra/xvsran/xvsrarn instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034010.7569-1-chenxiaolong@loongson.cn/mbox/"},{"id":138620,"url":"https://patchwork.plctlab.org/api/1.2/patches/138620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-2-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:18","name":"[v4,11/22] LoongArch: Add tests for ASX vector xvbitclr/xvbitclri/xvbitrev/xvbitrevi/ xvbitsel/xvbitseli/xvbitset/xvbitseti/xvclo/xvclz/xvpcnt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-2-chenxiaolong@loongson.cn/mbox/"},{"id":138624,"url":"https://patchwork.plctlab.org/api/1.2/patches/138624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-3-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:19","name":"[v4,12/22] LoongArch: Add tests for ASX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-3-chenxiaolong@loongson.cn/mbox/"},{"id":138622,"url":"https://patchwork.plctlab.org/api/1.2/patches/138622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-4-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:20","name":"[v4,13/22] LoongArch: Add tests for ASX xvldrepl/xvstelm instruction generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-4-chenxiaolong@loongson.cn/mbox/"},{"id":138614,"url":"https://patchwork.plctlab.org/api/1.2/patches/138614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-5-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:21","name":"[v4,14/22] LoongArch: Add tests for ASX vector floating-point operation instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-5-chenxiaolong@loongson.cn/mbox/"},{"id":138619,"url":"https://patchwork.plctlab.org/api/1.2/patches/138619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-6-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:22","name":"[v4,15/22] LoongArch: Add tests for ASX vector floating-point conversion instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-6-chenxiaolong@loongson.cn/mbox/"},{"id":138629,"url":"https://patchwork.plctlab.org/api/1.2/patches/138629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-7-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:23","name":"[v4,16/22] LoongArch: Add tests for ASX vector comparison and selection instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-7-chenxiaolong@loongson.cn/mbox/"},{"id":138631,"url":"https://patchwork.plctlab.org/api/1.2/patches/138631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-8-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:24","name":"[v4,17/22] LoongArch: Add tests for ASX vector xvfnmadd/xvfrstp/xvfstpi/xvhsubw/ xvmsub/xvrotr/xvrotri/xvld/xvst instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-8-chenxiaolong@loongson.cn/mbox/"},{"id":138621,"url":"https://patchwork.plctlab.org/api/1.2/patches/138621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-9-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:25","name":"[v4,18/22] LoongArch: Add tests for ASX vector xvabsd/xvavg/xvavgr/xvbsll/xvbsrl/xvneg/ xvsat instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-9-chenxiaolong@loongson.cn/mbox/"},{"id":138625,"url":"https://patchwork.plctlab.org/api/1.2/patches/138625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034305.8325-1-chenxiaolong@loongson.cn/","msgid":"<20230913034305.8325-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:05","name":"[v4,19/22] LoongArch: Add tests for ASX vector xvfcmp{caf/ceq/cle/clt/cne/cor/cun} instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034305.8325-1-chenxiaolong@loongson.cn/mbox/"},{"id":138628,"url":"https://patchwork.plctlab.org/api/1.2/patches/138628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-1-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:28","name":"[v4,20/22] LoongArch: Add tests for ASX vector xvfcmp{saf/seq/sle/slt/sne/sor/sun} instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-1-chenxiaolong@loongson.cn/mbox/"},{"id":138627,"url":"https://patchwork.plctlab.org/api/1.2/patches/138627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-2-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:29","name":"[v4,21/22] LoongArch: Add tests for ASX vector xvext2xv/xvexth/xvextins/xvilvh/xvilvl/xvinsgr2vr/ xvinsve0/xvprem/xvpremi instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-2-chenxiaolong@loongson.cn/mbox/"},{"id":138630,"url":"https://patchwork.plctlab.org/api/1.2/patches/138630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-3-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:30","name":"[v4,22/22] LoongArch: Add tests for ASX vector xvpackev/xvpackod/xvpickev/xvpickod/ xvpickve2gr/xvreplgr2vr/xvreplve/xvreplve0/xvreplvei/xvshuf4i/xvshuf instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-3-chenxiaolong@loongson.cn/mbox/"},{"id":138654,"url":"https://patchwork.plctlab.org/api/1.2/patches/138654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913060630.3930824-1-pan2.li@intel.com/","msgid":"<20230913060630.3930824-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-13T06:06:30","name":"[v1] RISC-V: Bugfix PR111362 for incorrect frm emit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913060630.3930824-1-pan2.li@intel.com/mbox/"},{"id":138695,"url":"https://patchwork.plctlab.org/api/1.2/patches/138695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913082312.2E6193858296@sourceware.org/","msgid":"<20230913082312.2E6193858296@sourceware.org>","list_archive_url":null,"date":"2023-09-13T08:22:15","name":"tree-optimization/111397 - missed copy propagation involving abnormal dest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913082312.2E6193858296@sourceware.org/mbox/"},{"id":138724,"url":"https://patchwork.plctlab.org/api/1.2/patches/138724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913095214.125470-1-yangyujie@loongson.cn/","msgid":"<20230913095214.125470-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-13T09:52:14","name":"LoongArch: Reimplement multilib build option handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913095214.125470-1-yangyujie@loongson.cn/mbox/"},{"id":138755,"url":"https://patchwork.plctlab.org/api/1.2/patches/138755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913114232.930E83857029@sourceware.org/","msgid":"<20230913114232.930E83857029@sourceware.org>","list_archive_url":null,"date":"2023-09-13T11:41:46","name":"tree-optimization/111387 - BB SLP and irreducible regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913114232.930E83857029@sourceware.org/mbox/"},{"id":138773,"url":"https://patchwork.plctlab.org/api/1.2/patches/138773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913121802.3521096-1-juzhe.zhong@rivai.ai/","msgid":"<20230913121802.3521096-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:18:02","name":"RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913121802.3521096-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138779,"url":"https://patchwork.plctlab.org/api/1.2/patches/138779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123117.3580126-1-lehua.ding@rivai.ai/","msgid":"<20230913123117.3580126-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:31:17","name":"[1/2] RISC-V: Cleanup redundant reduction patterns after refactor vector mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123117.3580126-1-lehua.ding@rivai.ai/mbox/"},{"id":138778,"url":"https://patchwork.plctlab.org/api/1.2/patches/138778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123137.3580445-1-lehua.ding@rivai.ai/","msgid":"<20230913123137.3580445-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:31:37","name":"[2/2] RISC-V: Refactor vector reduction patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123137.3580445-1-lehua.ding@rivai.ai/mbox/"},{"id":138780,"url":"https://patchwork.plctlab.org/api/1.2/patches/138780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123226.2083892-1-jwakely@redhat.com/","msgid":"<20230913123226.2083892-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-13T12:31:40","name":"libstdc++: Remove some more unconditional uses of atomics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123226.2083892-1-jwakely@redhat.com/mbox/"},{"id":138789,"url":"https://patchwork.plctlab.org/api/1.2/patches/138789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913130122.1145168-1-juzhe.zhong@rivai.ai/","msgid":"<20230913130122.1145168-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T13:01:22","name":"RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913130122.1145168-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138807,"url":"https://patchwork.plctlab.org/api/1.2/patches/138807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913140308.3446121-1-juzhe.zhong@rivai.ai/","msgid":"<20230913140308.3446121-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T14:03:08","name":"[V2] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913140308.3446121-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138835,"url":"https://patchwork.plctlab.org/api/1.2/patches/138835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826AB4E511294ABCE0563383F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:19:18","name":"AArch64: List official cores before codenames","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826AB4E511294ABCE0563383F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":138875,"url":"https://patchwork.plctlab.org/api/1.2/patches/138875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=3-d-Ui2h57NzeyoTWX3WTnmVKkSQa1bc=5RstoQoS-A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:50:08","name":"[AArch64,testsuite] Adjust vect_copy_lane_1.c for new code-gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=3-d-Ui2h57NzeyoTWX3WTnmVKkSQa1bc=5RstoQoS-A@mail.gmail.com/mbox/"},{"id":138877,"url":"https://patchwork.plctlab.org/api/1.2/patches/138877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89823B565A671851A16FD40B83F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:54:28","name":"AArch64: Fix __sync_val_compare_and_swap [PR111404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89823B565A671851A16FD40B83F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":138989,"url":"https://patchwork.plctlab.org/api/1.2/patches/138989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175316.4083902-1-ppalka@redhat.com/","msgid":"<20230913175316.4083902-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T17:53:16","name":"c++: unifying identical tmpls from current inst [PR108347]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175316.4083902-1-ppalka@redhat.com/mbox/"},{"id":138990,"url":"https://patchwork.plctlab.org/api/1.2/patches/138990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175331.4084179-1-ppalka@redhat.com/","msgid":"<20230913175331.4084179-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T17:53:31","name":"c++: optimize unification of class specializations [PR89231]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175331.4084179-1-ppalka@redhat.com/mbox/"},{"id":139086,"url":"https://patchwork.plctlab.org/api/1.2/patches/139086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQIiF7Ai7Ae44BxW@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T20:56:55","name":"[v4] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQIiF7Ai7Ae44BxW@redhat.com/mbox/"},{"id":139126,"url":"https://patchwork.plctlab.org/api/1.2/patches/139126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913222911.1516503-1-apinski@marvell.com/","msgid":"<20230913222911.1516503-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-13T22:29:11","name":"Improve error message for if with an else part while in switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913222911.1516503-1-apinski@marvell.com/mbox/"},{"id":139136,"url":"https://patchwork.plctlab.org/api/1.2/patches/139136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913225206.4188935-1-ppalka@redhat.com/","msgid":"<20230913225206.4188935-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T22:52:06","name":"libstdc++: Reduce integer std::to/from_chars symbol sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913225206.4188935-1-ppalka@redhat.com/mbox/"},{"id":139170,"url":"https://patchwork.plctlab.org/api/1.2/patches/139170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQJNshEZ4KETz1a+@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T00:02:58","name":"[v5] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQJNshEZ4KETz1a+@redhat.com/mbox/"},{"id":139274,"url":"https://patchwork.plctlab.org/api/1.2/patches/139274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f33aa0cf786cf49250889463947b62632cf3f205.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:50","name":"[01/10] vect: Ensure vect store is supported for some VMAT_ELEMENTWISE case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f33aa0cf786cf49250889463947b62632cf3f205.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139269,"url":"https://patchwork.plctlab.org/api/1.2/patches/139269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com/","msgid":"<1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:51","name":"[02/10] vect: Move vect_model_store_cost next to the transform in vectorizable_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139278,"url":"https://patchwork.plctlab.org/api/1.2/patches/139278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com/","msgid":"<8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:52","name":"[03/10] vect: Adjust vectorizable_store costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139270,"url":"https://patchwork.plctlab.org/api/1.2/patches/139270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com/","msgid":"<308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:53","name":"[04/10] vect: Simplify costing on vectorizable_scan_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139272,"url":"https://patchwork.plctlab.org/api/1.2/patches/139272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com/","msgid":"<2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:54","name":"[05/10] vect: Adjust vectorizable_store costing on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139271,"url":"https://patchwork.plctlab.org/api/1.2/patches/139271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com/","msgid":"<048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:55","name":"[06/10] vect: Adjust vectorizable_store costing on VMAT_LOAD_STORE_LANES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139277,"url":"https://patchwork.plctlab.org/api/1.2/patches/139277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com/","msgid":"<03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:56","name":"[07/10] vect: Adjust vectorizable_store costing on VMAT_CONTIGUOUS_PERMUTE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139275,"url":"https://patchwork.plctlab.org/api/1.2/patches/139275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc85799abb2616dcac511424a1b50b57e48c2556.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:57","name":"[PATCH/RFC,08/10] aarch64: Don'\''t use CEIL for vector_store in aarch64_stp_sequence_cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc85799abb2616dcac511424a1b50b57e48c2556.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139279,"url":"https://patchwork.plctlab.org/api/1.2/patches/139279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2f2a8081d2ffd2459b0ff161a559e502511d8a5.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:58","name":"[09/10] vect: Get rid of vect_model_store_cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2f2a8081d2ffd2459b0ff161a559e502511d8a5.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139280,"url":"https://patchwork.plctlab.org/api/1.2/patches/139280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com/","msgid":"<7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:59","name":"[10/10] vect: Consider vec_perm costing for VMAT_CONTIGUOUS_REVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com/mbox/"},{"id":139298,"url":"https://patchwork.plctlab.org/api/1.2/patches/139298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914035854.1695213-1-juzhe.zhong@rivai.ai/","msgid":"<20230914035854.1695213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T03:58:54","name":"RISC-V: Fix ICE in get_avl_or_vl_reg[PR111395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914035854.1695213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139311,"url":"https://patchwork.plctlab.org/api/1.2/patches/139311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fad1cbed-e389-f499-42ce-6c768c00dfd8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T04:29:35","name":"[committed] Limit header synopsis test to normal namespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fad1cbed-e389-f499-42ce-6c768c00dfd8@gmail.com/mbox/"},{"id":139327,"url":"https://patchwork.plctlab.org/api/1.2/patches/139327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914053350.1533941-1-apinski@marvell.com/","msgid":"<20230914053350.1533941-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-14T05:33:50","name":"MATCH: Support `(a != (CST+1)) & (a > CST)` optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914053350.1533941-1-apinski@marvell.com/mbox/"},{"id":139349,"url":"https://patchwork.plctlab.org/api/1.2/patches/139349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com/","msgid":"<28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com>","list_archive_url":null,"date":"2023-09-14T06:41:22","name":"debug/111409 - don'\''t generate COMDAT macro sections for split DWARF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com/mbox/"},{"id":139388,"url":"https://patchwork.plctlab.org/api/1.2/patches/139388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-2-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:40","name":"[v11,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-2-kmatsui@gcc.gnu.org/mbox/"},{"id":139386,"url":"https://patchwork.plctlab.org/api/1.2/patches/139386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-3-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:41","name":"[v11,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-3-kmatsui@gcc.gnu.org/mbox/"},{"id":139363,"url":"https://patchwork.plctlab.org/api/1.2/patches/139363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-4-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:42","name":"[v11,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-4-kmatsui@gcc.gnu.org/mbox/"},{"id":139390,"url":"https://patchwork.plctlab.org/api/1.2/patches/139390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-5-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:43","name":"[v11,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-5-kmatsui@gcc.gnu.org/mbox/"},{"id":139394,"url":"https://patchwork.plctlab.org/api/1.2/patches/139394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-6-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:44","name":"[v11,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-6-kmatsui@gcc.gnu.org/mbox/"},{"id":139399,"url":"https://patchwork.plctlab.org/api/1.2/patches/139399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-7-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:45","name":"[v11,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-7-kmatsui@gcc.gnu.org/mbox/"},{"id":139397,"url":"https://patchwork.plctlab.org/api/1.2/patches/139397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-8-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:46","name":"[v11,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-8-kmatsui@gcc.gnu.org/mbox/"},{"id":139393,"url":"https://patchwork.plctlab.org/api/1.2/patches/139393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-9-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:47","name":"[v11,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-9-kmatsui@gcc.gnu.org/mbox/"},{"id":139389,"url":"https://patchwork.plctlab.org/api/1.2/patches/139389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-10-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:48","name":"[v11,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-10-kmatsui@gcc.gnu.org/mbox/"},{"id":139379,"url":"https://patchwork.plctlab.org/api/1.2/patches/139379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-11-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:49","name":"[v11,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-11-kmatsui@gcc.gnu.org/mbox/"},{"id":139391,"url":"https://patchwork.plctlab.org/api/1.2/patches/139391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-12-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:50","name":"[v11,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-12-kmatsui@gcc.gnu.org/mbox/"},{"id":139407,"url":"https://patchwork.plctlab.org/api/1.2/patches/139407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-13-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:51","name":"[v11,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-13-kmatsui@gcc.gnu.org/mbox/"},{"id":139358,"url":"https://patchwork.plctlab.org/api/1.2/patches/139358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-14-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:52","name":"[v11,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-14-kmatsui@gcc.gnu.org/mbox/"},{"id":139402,"url":"https://patchwork.plctlab.org/api/1.2/patches/139402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-15-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:53","name":"[v11,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-15-kmatsui@gcc.gnu.org/mbox/"},{"id":139381,"url":"https://patchwork.plctlab.org/api/1.2/patches/139381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-16-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:54","name":"[v11,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-16-kmatsui@gcc.gnu.org/mbox/"},{"id":139396,"url":"https://patchwork.plctlab.org/api/1.2/patches/139396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-17-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:55","name":"[v11,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-17-kmatsui@gcc.gnu.org/mbox/"},{"id":139371,"url":"https://patchwork.plctlab.org/api/1.2/patches/139371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-18-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:56","name":"[v11,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-18-kmatsui@gcc.gnu.org/mbox/"},{"id":139369,"url":"https://patchwork.plctlab.org/api/1.2/patches/139369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-19-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:57","name":"[v11,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-19-kmatsui@gcc.gnu.org/mbox/"},{"id":139368,"url":"https://patchwork.plctlab.org/api/1.2/patches/139368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-20-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:58","name":"[v11,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-20-kmatsui@gcc.gnu.org/mbox/"},{"id":139406,"url":"https://patchwork.plctlab.org/api/1.2/patches/139406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-21-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:59","name":"[v11,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-21-kmatsui@gcc.gnu.org/mbox/"},{"id":139385,"url":"https://patchwork.plctlab.org/api/1.2/patches/139385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-22-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:00","name":"[v11,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-22-kmatsui@gcc.gnu.org/mbox/"},{"id":139377,"url":"https://patchwork.plctlab.org/api/1.2/patches/139377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-23-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:01","name":"[v11,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-23-kmatsui@gcc.gnu.org/mbox/"},{"id":139404,"url":"https://patchwork.plctlab.org/api/1.2/patches/139404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-24-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:02","name":"[v11,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-24-kmatsui@gcc.gnu.org/mbox/"},{"id":139364,"url":"https://patchwork.plctlab.org/api/1.2/patches/139364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-25-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:03","name":"[v11,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-25-kmatsui@gcc.gnu.org/mbox/"},{"id":139401,"url":"https://patchwork.plctlab.org/api/1.2/patches/139401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-26-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:04","name":"[v11,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-26-kmatsui@gcc.gnu.org/mbox/"},{"id":139376,"url":"https://patchwork.plctlab.org/api/1.2/patches/139376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-27-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:05","name":"[v11,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-27-kmatsui@gcc.gnu.org/mbox/"},{"id":139395,"url":"https://patchwork.plctlab.org/api/1.2/patches/139395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-28-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:06","name":"[v11,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-28-kmatsui@gcc.gnu.org/mbox/"},{"id":139398,"url":"https://patchwork.plctlab.org/api/1.2/patches/139398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-29-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:07","name":"[v11,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-29-kmatsui@gcc.gnu.org/mbox/"},{"id":139373,"url":"https://patchwork.plctlab.org/api/1.2/patches/139373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-30-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:08","name":"[v11,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-30-kmatsui@gcc.gnu.org/mbox/"},{"id":139400,"url":"https://patchwork.plctlab.org/api/1.2/patches/139400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-31-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:09","name":"[v11,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-31-kmatsui@gcc.gnu.org/mbox/"},{"id":139375,"url":"https://patchwork.plctlab.org/api/1.2/patches/139375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-32-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:10","name":"[v11,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-32-kmatsui@gcc.gnu.org/mbox/"},{"id":139384,"url":"https://patchwork.plctlab.org/api/1.2/patches/139384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-33-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:11","name":"[v11,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-33-kmatsui@gcc.gnu.org/mbox/"},{"id":139383,"url":"https://patchwork.plctlab.org/api/1.2/patches/139383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-34-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:12","name":"[v11,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-34-kmatsui@gcc.gnu.org/mbox/"},{"id":139380,"url":"https://patchwork.plctlab.org/api/1.2/patches/139380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-35-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:13","name":"[v11,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-35-kmatsui@gcc.gnu.org/mbox/"},{"id":139378,"url":"https://patchwork.plctlab.org/api/1.2/patches/139378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-36-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:14","name":"[v11,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-36-kmatsui@gcc.gnu.org/mbox/"},{"id":139360,"url":"https://patchwork.plctlab.org/api/1.2/patches/139360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-37-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:15","name":"[v11,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-37-kmatsui@gcc.gnu.org/mbox/"},{"id":139362,"url":"https://patchwork.plctlab.org/api/1.2/patches/139362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-38-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:16","name":"[v11,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-38-kmatsui@gcc.gnu.org/mbox/"},{"id":139370,"url":"https://patchwork.plctlab.org/api/1.2/patches/139370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-39-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:17","name":"[v11,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-39-kmatsui@gcc.gnu.org/mbox/"},{"id":139374,"url":"https://patchwork.plctlab.org/api/1.2/patches/139374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-40-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:18","name":"[v11,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-40-kmatsui@gcc.gnu.org/mbox/"},{"id":139403,"url":"https://patchwork.plctlab.org/api/1.2/patches/139403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-41-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:19","name":"[v11,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-41-kmatsui@gcc.gnu.org/mbox/"},{"id":139409,"url":"https://patchwork.plctlab.org/api/1.2/patches/139409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914073528.1344178-1-juzhe.zhong@rivai.ai/","msgid":"<20230914073528.1344178-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:35:28","name":"[V2] RISC-V: Fix ICE in get_avl_or_vl_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914073528.1344178-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139414,"url":"https://patchwork.plctlab.org/api/1.2/patches/139414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075213.3213806-1-juzhe.zhong@rivai.ai/","msgid":"<20230914075213.3213806-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:52:13","name":"[V3] RISC-V: Fix ICE in get_avl_or_vl_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075213.3213806-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139416,"url":"https://patchwork.plctlab.org/api/1.2/patches/139416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075437.3222179-1-juzhe.zhong@rivai.ai/","msgid":"<20230914075437.3222179-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:54:37","name":"[Committed] RISC-V: Format VSETVL PASS code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075437.3222179-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139428,"url":"https://patchwork.plctlab.org/api/1.2/patches/139428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914080321.3234794-1-juzhe.zhong@rivai.ai/","msgid":"<20230914080321.3234794-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T08:03:21","name":"[V3] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914080321.3234794-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139450,"url":"https://patchwork.plctlab.org/api/1.2/patches/139450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914090957.1896347-1-christophe.lyon@linaro.org/","msgid":"<20230914090957.1896347-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-14T09:09:57","name":"[v2,2/2] libstdc++: Add dg-require-thread-fence in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914090957.1896347-1-christophe.lyon@linaro.org/mbox/"},{"id":139492,"url":"https://patchwork.plctlab.org/api/1.2/patches/139492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0n1kpdv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T10:42:04","name":"aarch64: Coerce addresses to be suitable for LD1RQ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0n1kpdv.fsf@arm.com/mbox/"},{"id":139493,"url":"https://patchwork.plctlab.org/api/1.2/patches/139493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4eb2a39-2006-9b58-2d4e-8b5fea0076a1@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T10:45:50","name":"ira: Consider save/restore costs of callee-save registers [PR110071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4eb2a39-2006-9b58-2d4e-8b5fea0076a1@linux.vnet.ibm.com/mbox/"},{"id":139495,"url":"https://patchwork.plctlab.org/api/1.2/patches/139495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914104952.4173011-1-juzhe.zhong@rivai.ai/","msgid":"<20230914104952.4173011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T10:49:52","name":"[V4] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914104952.4173011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139507,"url":"https://patchwork.plctlab.org/api/1.2/patches/139507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914111720.32C2D3857B8E@sourceware.org/","msgid":"<20230914111720.32C2D3857B8E@sourceware.org>","list_archive_url":null,"date":"2023-09-14T11:16:35","name":"tree-optimization/111294 - better DCE after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914111720.32C2D3857B8E@sourceware.org/mbox/"},{"id":139509,"url":"https://patchwork.plctlab.org/api/1.2/patches/139509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914112102.10247-1-chenglulu@loongson.cn/","msgid":"<20230914112102.10247-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-14T11:21:02","name":"LoongArch: gcc: Modify gas uleb128 support test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914112102.10247-1-chenglulu@loongson.cn/mbox/"},{"id":139558,"url":"https://patchwork.plctlab.org/api/1.2/patches/139558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124358.2278212-1-juzhe.zhong@rivai.ai/","msgid":"<20230914124358.2278212-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T12:43:58","name":"RISC-V: Support VLS modes mask operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124358.2278212-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139562,"url":"https://patchwork.plctlab.org/api/1.2/patches/139562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124552.1950767-1-poulhies@adacore.com/","msgid":"<20230914124552.1950767-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:45:52","name":"[COMMITTED] ada: Assertion failure adding extra formals to late overriding subp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124552.1950767-1-poulhies@adacore.com/mbox/"},{"id":139563,"url":"https://patchwork.plctlab.org/api/1.2/patches/139563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124608.1950944-1-poulhies@adacore.com/","msgid":"<20230914124608.1950944-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:08","name":"[COMMITTED] ada: Fix premature finalization in loop over limited iterable container","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124608.1950944-1-poulhies@adacore.com/mbox/"},{"id":139567,"url":"https://patchwork.plctlab.org/api/1.2/patches/139567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124609.1951006-1-poulhies@adacore.com/","msgid":"<20230914124609.1951006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:09","name":"[COMMITTED] ada: Fix late finalization for function call in delta aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124609.1951006-1-poulhies@adacore.com/mbox/"},{"id":139564,"url":"https://patchwork.plctlab.org/api/1.2/patches/139564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124611.1951068-1-poulhies@adacore.com/","msgid":"<20230914124611.1951068-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:11","name":"[COMMITTED] ada: Assertion failure on for-of loop iterating on selected component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124611.1951068-1-poulhies@adacore.com/mbox/"},{"id":139566,"url":"https://patchwork.plctlab.org/api/1.2/patches/139566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124612.1951129-1-poulhies@adacore.com/","msgid":"<20230914124612.1951129-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:12","name":"[COMMITTED] ada: Assertion failure on calculation of Large_Max_Size_Mutable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124612.1951129-1-poulhies@adacore.com/mbox/"},{"id":139568,"url":"https://patchwork.plctlab.org/api/1.2/patches/139568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124614.1951192-1-poulhies@adacore.com/","msgid":"<20230914124614.1951192-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:14","name":"[COMMITTED] ada: Assertion failure on expansion of record with invariant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124614.1951192-1-poulhies@adacore.com/mbox/"},{"id":139565,"url":"https://patchwork.plctlab.org/api/1.2/patches/139565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124615.1951253-1-poulhies@adacore.com/","msgid":"<20230914124615.1951253-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:15","name":"[COMMITTED] ada: Improve detection of deactivated code for warnings with -gnatwt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124615.1951253-1-poulhies@adacore.com/mbox/"},{"id":139582,"url":"https://patchwork.plctlab.org/api/1.2/patches/139582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132401.E8C483858C3A@sourceware.org/","msgid":"<20230914132401.E8C483858C3A@sourceware.org>","list_archive_url":null,"date":"2023-09-14T13:23:13","name":"tree-optimization/111294 - backwards threader PHI costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132401.E8C483858C3A@sourceware.org/mbox/"},{"id":139584,"url":"https://patchwork.plctlab.org/api/1.2/patches/139584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132409.2381527-1-qing.zhao@oracle.com/","msgid":"<20230914132409.2381527-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-09-14T13:24:09","name":"tree optimization/111407--SSA corruption due to widening_mul opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132409.2381527-1-qing.zhao@oracle.com/mbox/"},{"id":139587,"url":"https://patchwork.plctlab.org/api/1.2/patches/139587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132728.2165656-1-jwakely@redhat.com/","msgid":"<20230914132728.2165656-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:27:09","name":"[committed] libstdc++: Remove some more unconditional uses of atomics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132728.2165656-1-jwakely@redhat.com/mbox/"},{"id":139588,"url":"https://patchwork.plctlab.org/api/1.2/patches/139588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133214.2165670-1-jwakely@redhat.com/","msgid":"<20230914133214.2165670-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:27:30","name":"[committed] libstdc++: Support dg-additional-files in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133214.2165670-1-jwakely@redhat.com/mbox/"},{"id":139589,"url":"https://patchwork.plctlab.org/api/1.2/patches/139589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133238.2165790-1-jwakely@redhat.com/","msgid":"<20230914133238.2165790-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:32:15","name":"[committed] libstdc++: Add testcase for std::make_integer_sequence bug [PR111357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133238.2165790-1-jwakely@redhat.com/mbox/"},{"id":139613,"url":"https://patchwork.plctlab.org/api/1.2/patches/139613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914141235.35160-1-ppalka@redhat.com/","msgid":"<20230914141235.35160-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-14T14:12:35","name":"libstdc++: Use C++20 constraints in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914141235.35160-1-ppalka@redhat.com/mbox/"},{"id":139616,"url":"https://patchwork.plctlab.org/api/1.2/patches/139616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu/","msgid":"<20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2023-09-14T14:24:33","name":"Harmonize headers between both dg-extract-results scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":139625,"url":"https://patchwork.plctlab.org/api/1.2/patches/139625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptled8lszh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T14:38:58","name":"aarch64: Restore SVE WHILE costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptled8lszh.fsf@arm.com/mbox/"},{"id":139643,"url":"https://patchwork.plctlab.org/api/1.2/patches/139643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982EE0BF538316B9E8F9CCE83F7A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T15:24:38","name":"AArch64: Improve immediate expansion [PR105928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982EE0BF538316B9E8F9CCE83F7A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":139644,"url":"https://patchwork.plctlab.org/api/1.2/patches/139644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe599ae1-2e91-1273-4876-5051bf2e42b1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T15:28:33","name":"[pushed,RA] : Improve cost calculation of pseudos with equivalences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe599ae1-2e91-1273-4876-5051bf2e42b1@redhat.com/mbox/"},{"id":139654,"url":"https://patchwork.plctlab.org/api/1.2/patches/139654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914155131.2352750-1-lehua.ding@rivai.ai/","msgid":"<20230914155131.2352750-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-14T15:51:31","name":"RISC-V: Support combine extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914155131.2352750-1-lehua.ding@rivai.ai/mbox/"},{"id":139706,"url":"https://patchwork.plctlab.org/api/1.2/patches/139706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi/","msgid":"<38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-09-14T16:58:47","name":"aarch64: Ensure const and sign correctness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi/mbox/"},{"id":139753,"url":"https://patchwork.plctlab.org/api/1.2/patches/139753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914174847.1564836-1-apinski@marvell.com/","msgid":"<20230914174847.1564836-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-14T17:48:47","name":"MATCH: Fix `(1 >> X) != 0` pattern for vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914174847.1564836-1-apinski@marvell.com/mbox/"},{"id":139794,"url":"https://patchwork.plctlab.org/api/1.2/patches/139794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914191050.717517-1-jcmvbkbc@gmail.com/","msgid":"<20230914191050.717517-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-09-14T19:10:50","name":"[COMMITTED] gcc: xtensa: use salt/saltu in xtensa_expand_scc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914191050.717517-1-jcmvbkbc@gmail.com/mbox/"},{"id":139820,"url":"https://patchwork.plctlab.org/api/1.2/patches/139820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0926626-0e9e-4b9d-b9cf-a33b2b7eb9bb-1694722934093@3c-app-gmx-bs48/","msgid":"","list_archive_url":null,"date":"2023-09-14T20:22:14","name":"Fortran: improve bounds-checking for array sections [PR30802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0926626-0e9e-4b9d-b9cf-a33b2b7eb9bb-1694722934093@3c-app-gmx-bs48/mbox/"},{"id":139823,"url":"https://patchwork.plctlab.org/api/1.2/patches/139823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203120.1791493-1-dmalcolm@redhat.com/","msgid":"<20230914203120.1791493-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:31:20","name":"[pushed] analyzer: use unique_ptr for rejected_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203120.1791493-1-dmalcolm@redhat.com/mbox/"},{"id":139826,"url":"https://patchwork.plctlab.org/api/1.2/patches/139826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203914.1792717-1-dmalcolm@redhat.com/","msgid":"<20230914203914.1792717-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:39:14","name":"[pushed] analyzer: fix missing return in compatible_epath_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203914.1792717-1-dmalcolm@redhat.com/mbox/"},{"id":139828,"url":"https://patchwork.plctlab.org/api/1.2/patches/139828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914204031.1792895-1-dmalcolm@redhat.com/","msgid":"<20230914204031.1792895-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:40:31","name":"[pushed] diagnostics: support multithreaded diagnostic paths","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914204031.1792895-1-dmalcolm@redhat.com/mbox/"},{"id":139952,"url":"https://patchwork.plctlab.org/api/1.2/patches/139952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915010855.1582726-1-apinski@marvell.com/","msgid":"<20230915010855.1582726-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-15T01:08:55","name":"MATCH: Improve zero_one_valued_p for cases without range information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915010855.1582726-1-apinski@marvell.com/mbox/"},{"id":139955,"url":"https://patchwork.plctlab.org/api/1.2/patches/139955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915012008.17934-1-gaofei@eswincomputing.com/","msgid":"<20230915012008.17934-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-15T01:20:08","name":"[RISC-V] fix PR 111259 invalid zcmp mov predicate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915012008.17934-1-gaofei@eswincomputing.com/mbox/"},{"id":139963,"url":"https://patchwork.plctlab.org/api/1.2/patches/139963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915013921.1868899-1-guojiufu@linux.ibm.com/","msgid":"<20230915013921.1868899-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-15T01:39:21","name":"use local range for one more pattern in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915013921.1868899-1-guojiufu@linux.ibm.com/mbox/"},{"id":140053,"url":"https://patchwork.plctlab.org/api/1.2/patches/140053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-2-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:07","name":"[v12,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140032,"url":"https://patchwork.plctlab.org/api/1.2/patches/140032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-3-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:08","name":"[v12,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140052,"url":"https://patchwork.plctlab.org/api/1.2/patches/140052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-4-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:09","name":"[v12,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140035,"url":"https://patchwork.plctlab.org/api/1.2/patches/140035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-5-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:10","name":"[v12,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140004,"url":"https://patchwork.plctlab.org/api/1.2/patches/140004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-6-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:11","name":"[v12,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140014,"url":"https://patchwork.plctlab.org/api/1.2/patches/140014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-7-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:12","name":"[v12,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140058,"url":"https://patchwork.plctlab.org/api/1.2/patches/140058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-8-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:13","name":"[v12,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140047,"url":"https://patchwork.plctlab.org/api/1.2/patches/140047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-9-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:14","name":"[v12,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140055,"url":"https://patchwork.plctlab.org/api/1.2/patches/140055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-10-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:15","name":"[v12,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140059,"url":"https://patchwork.plctlab.org/api/1.2/patches/140059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-11-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:16","name":"[v12,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140012,"url":"https://patchwork.plctlab.org/api/1.2/patches/140012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-12-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:17","name":"[v12,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140062,"url":"https://patchwork.plctlab.org/api/1.2/patches/140062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-13-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:18","name":"[v12,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140067,"url":"https://patchwork.plctlab.org/api/1.2/patches/140067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-14-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:19","name":"[v12,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140046,"url":"https://patchwork.plctlab.org/api/1.2/patches/140046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-15-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:20","name":"[v12,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140061,"url":"https://patchwork.plctlab.org/api/1.2/patches/140061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-16-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:21","name":"[v12,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140008,"url":"https://patchwork.plctlab.org/api/1.2/patches/140008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-17-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:22","name":"[v12,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140037,"url":"https://patchwork.plctlab.org/api/1.2/patches/140037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-18-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:23","name":"[v12,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140069,"url":"https://patchwork.plctlab.org/api/1.2/patches/140069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-19-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:24","name":"[v12,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140049,"url":"https://patchwork.plctlab.org/api/1.2/patches/140049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-20-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:25","name":"[v12,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140028,"url":"https://patchwork.plctlab.org/api/1.2/patches/140028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-21-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:26","name":"[v12,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140016,"url":"https://patchwork.plctlab.org/api/1.2/patches/140016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-22-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:27","name":"[v12,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140027,"url":"https://patchwork.plctlab.org/api/1.2/patches/140027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-23-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:28","name":"[v12,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140031,"url":"https://patchwork.plctlab.org/api/1.2/patches/140031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-24-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:29","name":"[v12,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140034,"url":"https://patchwork.plctlab.org/api/1.2/patches/140034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-25-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:30","name":"[v12,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140019,"url":"https://patchwork.plctlab.org/api/1.2/patches/140019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-26-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:31","name":"[v12,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140013,"url":"https://patchwork.plctlab.org/api/1.2/patches/140013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-27-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:32","name":"[v12,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140017,"url":"https://patchwork.plctlab.org/api/1.2/patches/140017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-28-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:33","name":"[v12,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140005,"url":"https://patchwork.plctlab.org/api/1.2/patches/140005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-29-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:34","name":"[v12,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140009,"url":"https://patchwork.plctlab.org/api/1.2/patches/140009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-30-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:35","name":"[v12,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140038,"url":"https://patchwork.plctlab.org/api/1.2/patches/140038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-31-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:36","name":"[v12,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140056,"url":"https://patchwork.plctlab.org/api/1.2/patches/140056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-32-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:37","name":"[v12,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140022,"url":"https://patchwork.plctlab.org/api/1.2/patches/140022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-33-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:38","name":"[v12,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140023,"url":"https://patchwork.plctlab.org/api/1.2/patches/140023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-34-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:39","name":"[v12,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140011,"url":"https://patchwork.plctlab.org/api/1.2/patches/140011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-35-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:40","name":"[v12,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140057,"url":"https://patchwork.plctlab.org/api/1.2/patches/140057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-36-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:41","name":"[v12,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140036,"url":"https://patchwork.plctlab.org/api/1.2/patches/140036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-37-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:42","name":"[v12,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140025,"url":"https://patchwork.plctlab.org/api/1.2/patches/140025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-38-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:43","name":"[v12,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140026,"url":"https://patchwork.plctlab.org/api/1.2/patches/140026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-39-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:44","name":"[v12,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140048,"url":"https://patchwork.plctlab.org/api/1.2/patches/140048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-40-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:45","name":"[v12,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140020,"url":"https://patchwork.plctlab.org/api/1.2/patches/140020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-41-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:46","name":"[v12,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140080,"url":"https://patchwork.plctlab.org/api/1.2/patches/140080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-2-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:41","name":"[v13,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140114,"url":"https://patchwork.plctlab.org/api/1.2/patches/140114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-3-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:42","name":"[v13,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140088,"url":"https://patchwork.plctlab.org/api/1.2/patches/140088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-4-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:43","name":"[v13,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140100,"url":"https://patchwork.plctlab.org/api/1.2/patches/140100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-5-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:44","name":"[v13,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140093,"url":"https://patchwork.plctlab.org/api/1.2/patches/140093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-6-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:45","name":"[v13,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140097,"url":"https://patchwork.plctlab.org/api/1.2/patches/140097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-7-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:46","name":"[v13,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140068,"url":"https://patchwork.plctlab.org/api/1.2/patches/140068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-8-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:47","name":"[v13,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140089,"url":"https://patchwork.plctlab.org/api/1.2/patches/140089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-9-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:48","name":"[v13,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140060,"url":"https://patchwork.plctlab.org/api/1.2/patches/140060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-10-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:49","name":"[v13,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140081,"url":"https://patchwork.plctlab.org/api/1.2/patches/140081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-11-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:50","name":"[v13,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140111,"url":"https://patchwork.plctlab.org/api/1.2/patches/140111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-12-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:51","name":"[v13,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140090,"url":"https://patchwork.plctlab.org/api/1.2/patches/140090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-13-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:52","name":"[v13,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140082,"url":"https://patchwork.plctlab.org/api/1.2/patches/140082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-14-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:53","name":"[v13,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140102,"url":"https://patchwork.plctlab.org/api/1.2/patches/140102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-15-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:54","name":"[v13,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140109,"url":"https://patchwork.plctlab.org/api/1.2/patches/140109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-16-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:55","name":"[v13,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140054,"url":"https://patchwork.plctlab.org/api/1.2/patches/140054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-17-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:56","name":"[v13,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140070,"url":"https://patchwork.plctlab.org/api/1.2/patches/140070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-18-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:57","name":"[v13,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140094,"url":"https://patchwork.plctlab.org/api/1.2/patches/140094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-19-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:58","name":"[v13,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140087,"url":"https://patchwork.plctlab.org/api/1.2/patches/140087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-20-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:59","name":"[v13,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140117,"url":"https://patchwork.plctlab.org/api/1.2/patches/140117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-21-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:00","name":"[v13,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140079,"url":"https://patchwork.plctlab.org/api/1.2/patches/140079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-22-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:01","name":"[v13,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140092,"url":"https://patchwork.plctlab.org/api/1.2/patches/140092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-23-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:02","name":"[v13,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140095,"url":"https://patchwork.plctlab.org/api/1.2/patches/140095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-24-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:03","name":"[v13,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140101,"url":"https://patchwork.plctlab.org/api/1.2/patches/140101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-25-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:04","name":"[v13,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140066,"url":"https://patchwork.plctlab.org/api/1.2/patches/140066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-26-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:05","name":"[v13,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140115,"url":"https://patchwork.plctlab.org/api/1.2/patches/140115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-27-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:06","name":"[v13,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140104,"url":"https://patchwork.plctlab.org/api/1.2/patches/140104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-28-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:07","name":"[v13,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140077,"url":"https://patchwork.plctlab.org/api/1.2/patches/140077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-29-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:08","name":"[v13,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140105,"url":"https://patchwork.plctlab.org/api/1.2/patches/140105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-30-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:09","name":"[v13,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140091,"url":"https://patchwork.plctlab.org/api/1.2/patches/140091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-31-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:10","name":"[v13,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140075,"url":"https://patchwork.plctlab.org/api/1.2/patches/140075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-32-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:11","name":"[v13,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140110,"url":"https://patchwork.plctlab.org/api/1.2/patches/140110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-33-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:12","name":"[v13,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140076,"url":"https://patchwork.plctlab.org/api/1.2/patches/140076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-34-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:13","name":"[v13,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140112,"url":"https://patchwork.plctlab.org/api/1.2/patches/140112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-35-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:14","name":"[v13,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140103,"url":"https://patchwork.plctlab.org/api/1.2/patches/140103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-36-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:15","name":"[v13,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140098,"url":"https://patchwork.plctlab.org/api/1.2/patches/140098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-37-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:16","name":"[v13,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140063,"url":"https://patchwork.plctlab.org/api/1.2/patches/140063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-38-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:17","name":"[v13,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140119,"url":"https://patchwork.plctlab.org/api/1.2/patches/140119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-39-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:18","name":"[v13,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140118,"url":"https://patchwork.plctlab.org/api/1.2/patches/140118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-40-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:19","name":"[v13,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140096,"url":"https://patchwork.plctlab.org/api/1.2/patches/140096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-41-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:20","name":"[v13,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140108,"url":"https://patchwork.plctlab.org/api/1.2/patches/140108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915024000.20344-1-chenglulu@loongson.cn/","msgid":"<20230915024000.20344-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T02:40:00","name":"[v1] LoongArch: Check whether binutils supports the relax function. If supported, explicit relocs are turned off by default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915024000.20344-1-chenglulu@loongson.cn/mbox/"},{"id":140121,"url":"https://patchwork.plctlab.org/api/1.2/patches/140121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915033302.21325-1-chenglulu@loongson.cn/","msgid":"<20230915033302.21325-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T03:33:03","name":"[v1] LoongArch: Add floating point conditional move support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915033302.21325-1-chenglulu@loongson.cn/mbox/"},{"id":140125,"url":"https://patchwork.plctlab.org/api/1.2/patches/140125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915035309.579545-1-juzhe.zhong@rivai.ai/","msgid":"<20230915035309.579545-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T03:53:08","name":"RISC-V: Support VLS modes vec_init auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915035309.579545-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140128,"url":"https://patchwork.plctlab.org/api/1.2/patches/140128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915040404.729860-1-mengqinggang@loongson.cn/","msgid":"<20230915040404.729860-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-15T04:04:04","name":"[v2] Modify gas uleb128 support test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915040404.729860-1-mengqinggang@loongson.cn/mbox/"},{"id":140144,"url":"https://patchwork.plctlab.org/api/1.2/patches/140144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915050613.22696-1-lehua.ding@rivai.ai/","msgid":"<20230915050613.22696-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-15T05:06:13","name":"RISC-V: Refactor expand_reduction and cleanup enum reduction_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915050613.22696-1-lehua.ding@rivai.ai/mbox/"},{"id":140156,"url":"https://patchwork.plctlab.org/api/1.2/patches/140156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915060710.23244-1-chenglulu@loongson.cn/","msgid":"<20230915060710.23244-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T06:07:11","name":"LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915060710.23244-1-chenglulu@loongson.cn/mbox/"},{"id":140178,"url":"https://patchwork.plctlab.org/api/1.2/patches/140178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915071847.135585-1-mikael@gcc.gnu.org/","msgid":"<20230915071847.135585-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T07:18:47","name":"fortran: Remove reference count update [PR108957]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915071847.135585-1-mikael@gcc.gnu.org/mbox/"},{"id":140216,"url":"https://patchwork.plctlab.org/api/1.2/patches/140216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedizludb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T08:21:20","name":"aarch64: Fix loose ldpstp check [PR111411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedizludb.fsf@arm.com/mbox/"},{"id":140237,"url":"https://patchwork.plctlab.org/api/1.2/patches/140237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915083004.2241119-1-juzhe.zhong@rivai.ai/","msgid":"<20230915083004.2241119-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T08:30:04","name":"test: Remove XPASS for RISCV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915083004.2241119-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140269,"url":"https://patchwork.plctlab.org/api/1.2/patches/140269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915090349.2249556-1-juzhe.zhong@rivai.ai/","msgid":"<20230915090349.2249556-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:03:49","name":"test: Block slp-16.c check for target support vect_strided6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915090349.2249556-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140285,"url":"https://patchwork.plctlab.org/api/1.2/patches/140285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915091636.2391436-1-juzhe.zhong@rivai.ai/","msgid":"<20230915091636.2391436-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:16:36","name":"test: Isolate slp-1.c check of target supports vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915091636.2391436-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140288,"url":"https://patchwork.plctlab.org/api/1.2/patches/140288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzsryerg.fsf@euler.schwinge.homeip.net/","msgid":"<87jzsryerg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-15T09:20:03","name":"[WIP] Re-introduce '\''TREE_USED'\'' in tree streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzsryerg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":140305,"url":"https://patchwork.plctlab.org/api/1.2/patches/140305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092647.2192116-1-jwakely@redhat.com/","msgid":"<20230915092647.2192116-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:24:41","name":"[committed] libstdc++: Add operator bool to result types (P2497R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092647.2192116-1-jwakely@redhat.com/mbox/"},{"id":140306,"url":"https://patchwork.plctlab.org/api/1.2/patches/140306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092737.2192232-1-jwakely@redhat.com/","msgid":"<20230915092737.2192232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:26:48","name":"[committed] libstdc++: Remove non-void static assertions in variant'\''s std::get [PR111172]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092737.2192232-1-jwakely@redhat.com/mbox/"},{"id":140308,"url":"https://patchwork.plctlab.org/api/1.2/patches/140308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915093220.2192265-1-jwakely@redhat.com/","msgid":"<20230915093220.2192265-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:27:38","name":"[committed] libstdc++: Fix constraints for std::variant default constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915093220.2192265-1-jwakely@redhat.com/mbox/"},{"id":140316,"url":"https://patchwork.plctlab.org/api/1.2/patches/140316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915095444.2627943-1-juzhe.zhong@rivai.ai/","msgid":"<20230915095444.2627943-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:54:44","name":"test: Block vect_strided5 for slp-34-big-array.c SLP check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915095444.2627943-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140317,"url":"https://patchwork.plctlab.org/api/1.2/patches/140317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100024.2633114-1-juzhe.zhong@rivai.ai/","msgid":"<20230915100024.2633114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T10:00:24","name":"test: Block SLP check of slp-34.c for vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100024.2633114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140325,"url":"https://patchwork.plctlab.org/api/1.2/patches/140325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100603.2648810-1-juzhe.zhong@rivai.ai/","msgid":"<20230915100603.2648810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T10:06:03","name":"test: Block SLP check of slp-35.c for vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100603.2648810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140368,"url":"https://patchwork.plctlab.org/api/1.2/patches/140368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915111342.1895618-1-lehua.ding@rivai.ai/","msgid":"<20230915111342.1895618-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-15T11:13:42","name":"RISC-V: Fix using wrong mode to get reduction insn vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915111342.1895618-1-lehua.ding@rivai.ai/mbox/"},{"id":140379,"url":"https://patchwork.plctlab.org/api/1.2/patches/140379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915115010.D2F8513251@imap2.suse-dmz.suse.de/","msgid":"<20230915115010.D2F8513251@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-15T11:50:10","name":"[RFC] middle-end/106811 - document GENERIC/GIMPLE undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915115010.D2F8513251@imap2.suse-dmz.suse.de/mbox/"},{"id":140433,"url":"https://patchwork.plctlab.org/api/1.2/patches/140433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915132302.3468514-1-pan2.li@intel.com/","msgid":"<20230915132302.3468514-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-15T13:23:02","name":"[v1] RISC-V: Support FP SGNJX autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915132302.3468514-1-pan2.li@intel.com/mbox/"},{"id":140451,"url":"https://patchwork.plctlab.org/api/1.2/patches/140451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com/","msgid":"<2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com>","list_archive_url":null,"date":"2023-09-15T14:13:47","name":"[COMMITTED,1/2] Fix indentation in range_of_phi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com/mbox/"},{"id":140452,"url":"https://patchwork.plctlab.org/api/1.2/patches/140452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f6ac788a-4c2d-8e8b-3ccd-db2183770702@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T14:14:11","name":"[COMMITTED,2/2] Always do PHI analysis before loop analysis.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f6ac788a-4c2d-8e8b-3ccd-db2183770702@redhat.com/mbox/"},{"id":140456,"url":"https://patchwork.plctlab.org/api/1.2/patches/140456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142032.2100558-1-poulhies@adacore.com/","msgid":"<20230915142032.2100558-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:32","name":"[COMMITTED] ada: Crash on creation of extra formals on type extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142032.2100558-1-poulhies@adacore.com/mbox/"},{"id":140457,"url":"https://patchwork.plctlab.org/api/1.2/patches/140457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142050.2100712-1-poulhies@adacore.com/","msgid":"<20230915142050.2100712-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:50","name":"[COMMITTED] ada: Clean up scope depth and related code (tech debt)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142050.2100712-1-poulhies@adacore.com/mbox/"},{"id":140461,"url":"https://patchwork.plctlab.org/api/1.2/patches/140461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142052.2100773-1-poulhies@adacore.com/","msgid":"<20230915142052.2100773-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:52","name":"[COMMITTED] ada: Fix internal error on expression function with Refined_Post aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142052.2100773-1-poulhies@adacore.com/mbox/"},{"id":140464,"url":"https://patchwork.plctlab.org/api/1.2/patches/140464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142054.2100872-1-poulhies@adacore.com/","msgid":"<20230915142054.2100872-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:54","name":"[COMMITTED] ada: Remove GNAT Pro details regarding mold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142054.2100872-1-poulhies@adacore.com/mbox/"},{"id":140458,"url":"https://patchwork.plctlab.org/api/1.2/patches/140458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142056.2100936-1-poulhies@adacore.com/","msgid":"<20230915142056.2100936-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:56","name":"[COMMITTED] ada: Fix internal error on aggregate nested in container aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142056.2100936-1-poulhies@adacore.com/mbox/"},{"id":140466,"url":"https://patchwork.plctlab.org/api/1.2/patches/140466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142058.2100998-1-poulhies@adacore.com/","msgid":"<20230915142058.2100998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:58","name":"[COMMITTED] ada: Fix internal error on misaligned component with variable nominal size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142058.2100998-1-poulhies@adacore.com/mbox/"},{"id":140463,"url":"https://patchwork.plctlab.org/api/1.2/patches/140463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142100.2101059-1-poulhies@adacore.com/","msgid":"<20230915142100.2101059-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:00","name":"[COMMITTED] ada: Generate runtime restrictions list when the standard library is suppressed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142100.2101059-1-poulhies@adacore.com/mbox/"},{"id":140462,"url":"https://patchwork.plctlab.org/api/1.2/patches/140462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142102.2101122-1-poulhies@adacore.com/","msgid":"<20230915142102.2101122-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:02","name":"[COMMITTED] ada: Do not perform local-exception-to-goto optimization on barrier functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142102.2101122-1-poulhies@adacore.com/mbox/"},{"id":140465,"url":"https://patchwork.plctlab.org/api/1.2/patches/140465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142104.2101183-1-poulhies@adacore.com/","msgid":"<20230915142104.2101183-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:04","name":"[COMMITTED] ada: Fix wrong optimization of extended return for discriminated record type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142104.2101183-1-poulhies@adacore.com/mbox/"},{"id":140471,"url":"https://patchwork.plctlab.org/api/1.2/patches/140471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142105.2101247-1-poulhies@adacore.com/","msgid":"<20230915142105.2101247-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:05","name":"[COMMITTED] ada: Explicitly analyze and expand null array aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142105.2101247-1-poulhies@adacore.com/mbox/"},{"id":140467,"url":"https://patchwork.plctlab.org/api/1.2/patches/140467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142107.2101308-1-poulhies@adacore.com/","msgid":"<20230915142107.2101308-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:07","name":"[COMMITTED] ada: Fix minor glitch in finish_record_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142107.2101308-1-poulhies@adacore.com/mbox/"},{"id":140481,"url":"https://patchwork.plctlab.org/api/1.2/patches/140481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db3c333e-549e-ccc7-b4ab-be57235ce389@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T14:44:55","name":"[RFC] New early __builtin_unreachable processing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db3c333e-549e-ccc7-b4ab-be57235ce389@redhat.com/mbox/"},{"id":140497,"url":"https://patchwork.plctlab.org/api/1.2/patches/140497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915150816.18190-1-polacek@redhat.com/","msgid":"<20230915150816.18190-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-15T15:08:16","name":"gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915150816.18190-1-polacek@redhat.com/mbox/"},{"id":140520,"url":"https://patchwork.plctlab.org/api/1.2/patches/140520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160301.2245349-1-ppalka@redhat.com/","msgid":"<20230915160301.2245349-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T16:03:01","name":"c++: overeager type completion in convert_to_void [PR111419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160301.2245349-1-ppalka@redhat.com/mbox/"},{"id":140521,"url":"https://patchwork.plctlab.org/api/1.2/patches/140521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160308.2245377-1-ppalka@redhat.com/","msgid":"<20230915160308.2245377-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T16:03:08","name":"c++: visibility wrt template and ptrmem targs [PR70413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160308.2245377-1-ppalka@redhat.com/mbox/"},{"id":140587,"url":"https://patchwork.plctlab.org/api/1.2/patches/140587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175311.1908421-1-dmalcolm@redhat.com/","msgid":"<20230915175311.1908421-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:11","name":"[pushed] analyzer: handle volatile ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175311.1908421-1-dmalcolm@redhat.com/mbox/"},{"id":140588,"url":"https://patchwork.plctlab.org/api/1.2/patches/140588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175322.1908473-1-dmalcolm@redhat.com/","msgid":"<20230915175322.1908473-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:22","name":"[pushed] analyzer: introduce pending_location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175322.1908473-1-dmalcolm@redhat.com/mbox/"},{"id":140589,"url":"https://patchwork.plctlab.org/api/1.2/patches/140589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175332.1908520-1-dmalcolm@redhat.com/","msgid":"<20230915175332.1908520-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:32","name":"[pushed] analyzer: support diagnostics that don'\''t have a stmt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175332.1908520-1-dmalcolm@redhat.com/mbox/"},{"id":140592,"url":"https://patchwork.plctlab.org/api/1.2/patches/140592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175534.2315315-1-ppalka@redhat.com/","msgid":"<20230915175534.2315315-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:55:34","name":"c++: constness of decltype of NTTP object [PR98820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175534.2315315-1-ppalka@redhat.com/mbox/"},{"id":140674,"url":"https://patchwork.plctlab.org/api/1.2/patches/140674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQS/ddll2R/hjMIp@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T20:32:53","name":"[v6] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQS/ddll2R/hjMIp@redhat.com/mbox/"},{"id":140689,"url":"https://patchwork.plctlab.org/api/1.2/patches/140689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915205525.2325175-1-jwakely@redhat.com/","msgid":"<20230915205525.2325175-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T20:54:51","name":"[v2,6/13] libstdc++: Remove dg-options \"-std=gnu++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915205525.2325175-1-jwakely@redhat.com/mbox/"},{"id":140750,"url":"https://patchwork.plctlab.org/api/1.2/patches/140750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230301.2328182-1-jwakely@redhat.com/","msgid":"<20230915230301.2328182-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:02:47","name":"[committed] libstdc++: Fix 29_atomics/headers/atomic/types_std_c++2a_neg.cc for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230301.2328182-1-jwakely@redhat.com/mbox/"},{"id":140751,"url":"https://patchwork.plctlab.org/api/1.2/patches/140751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230539.2328463-1-jwakely@redhat.com/","msgid":"<20230915230539.2328463-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:04:27","name":"[committed] libstdc++: Add log line to testsuite output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230539.2328463-1-jwakely@redhat.com/mbox/"},{"id":140752,"url":"https://patchwork.plctlab.org/api/1.2/patches/140752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230924.2328645-1-jwakely@redhat.com/","msgid":"<20230915230924.2328645-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:06:57","name":"[committed] libstdc++: Implement C++26 native handles for file streams (P1759R6)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230924.2328645-1-jwakely@redhat.com/mbox/"},{"id":140756,"url":"https://patchwork.plctlab.org/api/1.2/patches/140756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915231748.2348413-1-jwakely@redhat.com/","msgid":"<20230915231748.2348413-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:17:37","name":"[committed] libstdc++: Add missing tests for std::basic_filebuf::native_handle()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915231748.2348413-1-jwakely@redhat.com/mbox/"},{"id":140759,"url":"https://patchwork.plctlab.org/api/1.2/patches/140759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-1-jwakely@redhat.com/","msgid":"<20230915232009.2348586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:49","name":"[committed,01/11] libstdc++: Remove dg-options \"-std=gnu++20\" from tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-1-jwakely@redhat.com/mbox/"},{"id":140757,"url":"https://patchwork.plctlab.org/api/1.2/patches/140757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-2-jwakely@redhat.com/","msgid":"<20230915232009.2348586-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:50","name":"[committed,02/11] libstdc++: Remove dg-options \"-std=gnu++20\" from tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-2-jwakely@redhat.com/mbox/"},{"id":140760,"url":"https://patchwork.plctlab.org/api/1.2/patches/140760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-3-jwakely@redhat.com/","msgid":"<20230915232009.2348586-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:51","name":"[committed,03/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 20_utils tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-3-jwakely@redhat.com/mbox/"},{"id":140763,"url":"https://patchwork.plctlab.org/api/1.2/patches/140763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-4-jwakely@redhat.com/","msgid":"<20230915232009.2348586-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:52","name":"[committed,04/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 21_strings tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-4-jwakely@redhat.com/mbox/"},{"id":140767,"url":"https://patchwork.plctlab.org/api/1.2/patches/140767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-5-jwakely@redhat.com/","msgid":"<20230915232009.2348586-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:53","name":"[committed,05/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 23_containers tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-5-jwakely@redhat.com/mbox/"},{"id":140762,"url":"https://patchwork.plctlab.org/api/1.2/patches/140762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-6-jwakely@redhat.com/","msgid":"<20230915232009.2348586-6-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:54","name":"[committed,06/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 24_iterators tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-6-jwakely@redhat.com/mbox/"},{"id":140765,"url":"https://patchwork.plctlab.org/api/1.2/patches/140765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-7-jwakely@redhat.com/","msgid":"<20230915232009.2348586-7-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:55","name":"[committed,07/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 26_numerics tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-7-jwakely@redhat.com/mbox/"},{"id":140770,"url":"https://patchwork.plctlab.org/api/1.2/patches/140770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-8-jwakely@redhat.com/","msgid":"<20230915232009.2348586-8-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:56","name":"[committed,08/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 27_io tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-8-jwakely@redhat.com/mbox/"},{"id":140764,"url":"https://patchwork.plctlab.org/api/1.2/patches/140764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-9-jwakely@redhat.com/","msgid":"<20230915232009.2348586-9-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:57","name":"[committed,09/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 30_threads tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-9-jwakely@redhat.com/mbox/"},{"id":140766,"url":"https://patchwork.plctlab.org/api/1.2/patches/140766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-10-jwakely@redhat.com/","msgid":"<20230915232009.2348586-10-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:58","name":"[committed,10/11] libstdc++: Remove dg-options \"-std=gnu++20\" from remaining tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-10-jwakely@redhat.com/mbox/"},{"id":140768,"url":"https://patchwork.plctlab.org/api/1.2/patches/140768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-11-jwakely@redhat.com/","msgid":"<20230915232009.2348586-11-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:59","name":"[committed,11/11] libstdc++: Do not require effective target pthread for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-11-jwakely@redhat.com/mbox/"},{"id":140836,"url":"https://patchwork.plctlab.org/api/1.2/patches/140836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-2-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:47","name":"[v14,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140799,"url":"https://patchwork.plctlab.org/api/1.2/patches/140799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-3-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:48","name":"[v14,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140831,"url":"https://patchwork.plctlab.org/api/1.2/patches/140831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-4-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:49","name":"[v14,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140779,"url":"https://patchwork.plctlab.org/api/1.2/patches/140779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-5-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:50","name":"[v14,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140782,"url":"https://patchwork.plctlab.org/api/1.2/patches/140782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-6-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:51","name":"[v14,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140834,"url":"https://patchwork.plctlab.org/api/1.2/patches/140834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-7-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:52","name":"[v14,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140830,"url":"https://patchwork.plctlab.org/api/1.2/patches/140830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-8-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:53","name":"[v14,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140788,"url":"https://patchwork.plctlab.org/api/1.2/patches/140788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-9-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:54","name":"[v14,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140818,"url":"https://patchwork.plctlab.org/api/1.2/patches/140818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-10-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:55","name":"[v14,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140826,"url":"https://patchwork.plctlab.org/api/1.2/patches/140826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-11-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:56","name":"[v14,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140817,"url":"https://patchwork.plctlab.org/api/1.2/patches/140817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-12-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:57","name":"[v14,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140781,"url":"https://patchwork.plctlab.org/api/1.2/patches/140781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-13-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:58","name":"[v14,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140797,"url":"https://patchwork.plctlab.org/api/1.2/patches/140797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-14-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:59","name":"[v14,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140820,"url":"https://patchwork.plctlab.org/api/1.2/patches/140820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-15-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:00","name":"[v14,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140811,"url":"https://patchwork.plctlab.org/api/1.2/patches/140811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-16-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:01","name":"[v14,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140783,"url":"https://patchwork.plctlab.org/api/1.2/patches/140783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-17-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:02","name":"[v14,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140780,"url":"https://patchwork.plctlab.org/api/1.2/patches/140780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-18-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:03","name":"[v14,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140829,"url":"https://patchwork.plctlab.org/api/1.2/patches/140829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-19-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:04","name":"[v14,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140838,"url":"https://patchwork.plctlab.org/api/1.2/patches/140838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-20-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:05","name":"[v14,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140825,"url":"https://patchwork.plctlab.org/api/1.2/patches/140825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-21-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:06","name":"[v14,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140812,"url":"https://patchwork.plctlab.org/api/1.2/patches/140812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-22-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:07","name":"[v14,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140806,"url":"https://patchwork.plctlab.org/api/1.2/patches/140806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-23-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:08","name":"[v14,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140785,"url":"https://patchwork.plctlab.org/api/1.2/patches/140785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-24-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:09","name":"[v14,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140796,"url":"https://patchwork.plctlab.org/api/1.2/patches/140796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-25-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:10","name":"[v14,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140789,"url":"https://patchwork.plctlab.org/api/1.2/patches/140789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-26-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:11","name":"[v14,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140790,"url":"https://patchwork.plctlab.org/api/1.2/patches/140790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-27-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:12","name":"[v14,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140824,"url":"https://patchwork.plctlab.org/api/1.2/patches/140824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-28-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:13","name":"[v14,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140835,"url":"https://patchwork.plctlab.org/api/1.2/patches/140835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-29-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:14","name":"[v14,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140815,"url":"https://patchwork.plctlab.org/api/1.2/patches/140815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-30-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:15","name":"[v14,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140827,"url":"https://patchwork.plctlab.org/api/1.2/patches/140827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-31-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:16","name":"[v14,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140814,"url":"https://patchwork.plctlab.org/api/1.2/patches/140814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-32-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:17","name":"[v14,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140795,"url":"https://patchwork.plctlab.org/api/1.2/patches/140795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-33-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:18","name":"[v14,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140813,"url":"https://patchwork.plctlab.org/api/1.2/patches/140813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-34-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:19","name":"[v14,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140828,"url":"https://patchwork.plctlab.org/api/1.2/patches/140828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-35-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:20","name":"[v14,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140832,"url":"https://patchwork.plctlab.org/api/1.2/patches/140832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-36-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:21","name":"[v14,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140804,"url":"https://patchwork.plctlab.org/api/1.2/patches/140804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-37-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:22","name":"[v14,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140794,"url":"https://patchwork.plctlab.org/api/1.2/patches/140794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-38-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:23","name":"[v14,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140819,"url":"https://patchwork.plctlab.org/api/1.2/patches/140819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-39-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:24","name":"[v14,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140816,"url":"https://patchwork.plctlab.org/api/1.2/patches/140816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-40-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:25","name":"[v14,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140803,"url":"https://patchwork.plctlab.org/api/1.2/patches/140803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-41-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:26","name":"[v14,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140845,"url":"https://patchwork.plctlab.org/api/1.2/patches/140845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916010009.3672058-1-lhyatt@gmail.com/","msgid":"<20230916010009.3672058-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-09-16T01:00:09","name":"libcpp: Fix ICE on #include after a line marker directive [PR61474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916010009.3672058-1-lhyatt@gmail.com/mbox/"},{"id":140938,"url":"https://patchwork.plctlab.org/api/1.2/patches/140938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916044539.3362257-1-juzhe.zhong@rivai.ai/","msgid":"<20230916044539.3362257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-16T04:45:39","name":"internal-fn: Convert uninitialized SSA_NAME into SCRATCH rtx[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916044539.3362257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140961,"url":"https://patchwork.plctlab.org/api/1.2/patches/140961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916054920.1653864-1-apinski@marvell.com/","msgid":"<20230916054920.1653864-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-16T05:49:20","name":"MATCH: Add simplifications for `(a * zero_one) ==/!= CST`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916054920.1653864-1-apinski@marvell.com/mbox/"},{"id":141006,"url":"https://patchwork.plctlab.org/api/1.2/patches/141006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916091643.3160525-1-mengqinggang@loongson.cn/","msgid":"<20230916091643.3160525-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-16T09:16:43","name":"LoongArch: Fix lo_sum rtx cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916091643.3160525-1-mengqinggang@loongson.cn/mbox/"},{"id":141076,"url":"https://patchwork.plctlab.org/api/1.2/patches/141076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916155924.1679335-1-apinski@marvell.com/","msgid":"<20230916155924.1679335-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-16T15:59:24","name":"MATCH: Add simplifications of `(a == CST) & a`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916155924.1679335-1-apinski@marvell.com/mbox/"},{"id":141119,"url":"https://patchwork.plctlab.org/api/1.2/patches/141119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917014418.1703031-1-apinski@marvell.com/","msgid":"<20230917014418.1703031-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T01:44:18","name":"MATCH: Avoid recusive zero_one_valued_p for conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917014418.1703031-1-apinski@marvell.com/mbox/"},{"id":141121,"url":"https://patchwork.plctlab.org/api/1.2/patches/141121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917020549.973008-1-juzhe.zhong@rivai.ai/","msgid":"<20230917020549.973008-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-17T02:05:49","name":"RISC-V: Support VLS modes reduction[PR111153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917020549.973008-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141133,"url":"https://patchwork.plctlab.org/api/1.2/patches/141133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917074234.1541088-1-pan2.li@intel.com/","msgid":"<20230917074234.1541088-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-17T07:42:34","name":"[v1] RISC-V: Bugfix for scalar move with merged operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917074234.1541088-1-pan2.li@intel.com/mbox/"},{"id":141147,"url":"https://patchwork.plctlab.org/api/1.2/patches/141147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQb1FtC4Bwv26zNE@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-17T12:46:14","name":"[v2] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQb1FtC4Bwv26zNE@Thaum.localdomain/mbox/"},{"id":141152,"url":"https://patchwork.plctlab.org/api/1.2/patches/141152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917144749.1032038-1-juzhe.zhong@rivai.ai/","msgid":"<20230917144749.1032038-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-17T14:47:49","name":"[V2] internal-fn: Support undefined rtx for uninitialized SSA_NAME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917144749.1032038-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141179,"url":"https://patchwork.plctlab.org/api/1.2/patches/141179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917185140.1333132-1-ppalka@redhat.com/","msgid":"<20230917185140.1333132-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-17T18:51:40","name":"c++: non-dependent assignment checking [PR63198, PR18474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917185140.1333132-1-ppalka@redhat.com/mbox/"},{"id":141183,"url":"https://patchwork.plctlab.org/api/1.2/patches/141183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917191304.1483576-1-ppalka@redhat.com/","msgid":"<20230917191304.1483576-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-17T19:13:04","name":"c++: optimize tsubst_template_decl for function templates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917191304.1483576-1-ppalka@redhat.com/mbox/"},{"id":141191,"url":"https://patchwork.plctlab.org/api/1.2/patches/141191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917194617.928955-1-dkm@kataplop.net/","msgid":"<20230917194617.928955-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-17T19:46:17","name":"Trivial typo fix in variadic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917194617.928955-1-dkm@kataplop.net/mbox/"},{"id":141197,"url":"https://patchwork.plctlab.org/api/1.2/patches/141197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com/","msgid":"<8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com>","list_archive_url":null,"date":"2023-09-17T20:41:13","name":"[_Hashtable] Avoid redundant usage of rehash policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com/mbox/"},{"id":141201,"url":"https://patchwork.plctlab.org/api/1.2/patches/141201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214055.1752964-1-apinski@marvell.com/","msgid":"<20230917214055.1752964-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T21:40:55","name":"MATCH: Make zero_one_valued_p non-recusive fully","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214055.1752964-1-apinski@marvell.com/mbox/"},{"id":141203,"url":"https://patchwork.plctlab.org/api/1.2/patches/141203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214554.1753158-1-apinski@marvell.com/","msgid":"<20230917214554.1753158-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T21:45:54","name":"Remove xfail from gcc.dg/tree-ssa/20040204-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214554.1753158-1-apinski@marvell.com/mbox/"},{"id":141227,"url":"https://patchwork.plctlab.org/api/1.2/patches/141227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918014434.2566268-1-juzhe.zhong@rivai.ai/","msgid":"<20230918014434.2566268-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T01:44:34","name":"[V3] internal-fn: Support undefined rtx for uninitialized SSA_NAME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918014434.2566268-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141233,"url":"https://patchwork.plctlab.org/api/1.2/patches/141233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918025408.2591026-1-juzhe.zhong@rivai.ai/","msgid":"<20230918025408.2591026-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T02:54:08","name":"[Committed] RISC-V: Remove redundant codes of VLS patterns[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918025408.2591026-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141236,"url":"https://patchwork.plctlab.org/api/1.2/patches/141236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918032711.3807244-1-pan2.li@intel.com/","msgid":"<20230918032711.3807244-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-18T03:27:11","name":"[v1] RISC-V: Support VLS mode for vec_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918032711.3807244-1-pan2.li@intel.com/mbox/"},{"id":141239,"url":"https://patchwork.plctlab.org/api/1.2/patches/141239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918034008.3671734-1-jason@redhat.com/","msgid":"<20230918034008.3671734-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-18T03:40:08","name":"[pushed] doc: GTY((cache)) documentation tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918034008.3671734-1-jason@redhat.com/mbox/"},{"id":141242,"url":"https://patchwork.plctlab.org/api/1.2/patches/141242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918041925.26614-1-xuli1@eswincomputing.com/","msgid":"<20230918041925.26614-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-18T04:19:25","name":"RISC-V: Remove phase 6 of vsetvl pass in GCC13[PR111412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918041925.26614-1-xuli1@eswincomputing.com/mbox/"},{"id":141250,"url":"https://patchwork.plctlab.org/api/1.2/patches/141250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com/","msgid":"<65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com>","list_archive_url":null,"date":"2023-09-18T05:59:05","name":"PATCH v6 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com/mbox/"},{"id":141255,"url":"https://patchwork.plctlab.org/api/1.2/patches/141255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/feee9000-859a-3fae-66d5-9844be71fe3e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-18T06:26:21","name":"rs6000: Use default target option node for callee by default [PR111380]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/feee9000-859a-3fae-66d5-9844be71fe3e@linux.ibm.com/mbox/"},{"id":141256,"url":"https://patchwork.plctlab.org/api/1.2/patches/141256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com/","msgid":"<61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com>","list_archive_url":null,"date":"2023-09-18T06:26:56","name":"rs6000: Skip empty inline asm in rs6000_update_ipa_fn_target_info [PR111366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com/mbox/"},{"id":141262,"url":"https://patchwork.plctlab.org/api/1.2/patches/141262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918070713.3569601-1-juzhe.zhong@rivai.ai/","msgid":"<20230918070713.3569601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T07:07:13","name":"RISC-V: Remove autovec-vls.md file and clean up VLS move modes[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918070713.3569601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141321,"url":"https://patchwork.plctlab.org/api/1.2/patches/141321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918092351.4019900-1-liwei@loongson.cn/","msgid":"<20230918092351.4019900-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-09-18T09:23:51","name":"[v1] LoongArch: Adjust the vector cost model for better performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918092351.4019900-1-liwei@loongson.cn/mbox/"},{"id":141330,"url":"https://patchwork.plctlab.org/api/1.2/patches/141330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918095210.5373-1-gaofei@eswincomputing.com/","msgid":"<20230918095210.5373-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-18T09:52:10","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918095210.5373-1-gaofei@eswincomputing.com/mbox/"},{"id":141358,"url":"https://patchwork.plctlab.org/api/1.2/patches/141358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918110825.3134855-1-juzhe.zhong@rivai.ai/","msgid":"<20230918110825.3134855-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:08:25","name":"[Committed] RISC-V: Fix VSETVL PASS fusion bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918110825.3134855-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141361,"url":"https://patchwork.plctlab.org/api/1.2/patches/141361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918111807.2453946-1-jwakely@redhat.com/","msgid":"<20230918111807.2453946-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T11:17:47","name":"[committed] libstdc++: Minor update to installation docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918111807.2453946-1-jwakely@redhat.com/mbox/"},{"id":141365,"url":"https://patchwork.plctlab.org/api/1.2/patches/141365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918113717.3538058-1-lehua.ding@rivai.ai/","msgid":"<20230918113717.3538058-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:37:17","name":"RISC-V: Refactor and cleanup fma patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918113717.3538058-1-lehua.ding@rivai.ai/mbox/"},{"id":141368,"url":"https://patchwork.plctlab.org/api/1.2/patches/141368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918114414.3667280-1-juzhe.zhong@rivai.ai/","msgid":"<20230918114414.3667280-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:44:14","name":"[Committed] RISC-V: Support VLS reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918114414.3667280-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141393,"url":"https://patchwork.plctlab.org/api/1.2/patches/141393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918121324.3696866-1-lehua.ding@rivai.ai/","msgid":"<20230918121324.3696866-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:13:24","name":"RISC-V: Add fixed PR111255 testcase by other patch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918121324.3696866-1-lehua.ding@rivai.ai/mbox/"},{"id":141396,"url":"https://patchwork.plctlab.org/api/1.2/patches/141396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com/","msgid":"<98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com>","list_archive_url":null,"date":"2023-09-18T12:22:50","name":"OpenMP: Add ME support for '\''omp allocate'\'' stack variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com/mbox/"},{"id":141398,"url":"https://patchwork.plctlab.org/api/1.2/patches/141398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918122951.3703638-1-lehua.ding@rivai.ai/","msgid":"<20230918122951.3703638-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:29:51","name":"RISC-V: Removed misleading comments in testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918122951.3703638-1-lehua.ding@rivai.ai/mbox/"},{"id":141400,"url":"https://patchwork.plctlab.org/api/1.2/patches/141400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123141.3704086-1-juzhe.zhong@rivai.ai/","msgid":"<20230918123141.3704086-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:31:41","name":"[Committed] RISC-V: Fix bogus FAILs of vsetvl testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123141.3704086-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141401,"url":"https://patchwork.plctlab.org/api/1.2/patches/141401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123508.3705854-1-juzhe.zhong@rivai.ai/","msgid":"<20230918123508.3705854-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:35:08","name":"RISC-V: Remove redundant vec_duplicate pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123508.3705854-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141413,"url":"https://patchwork.plctlab.org/api/1.2/patches/141413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918130141.2460012-1-jwakely@redhat.com/","msgid":"<20230918130141.2460012-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T13:01:33","name":"[wwwdocs] Document libstdc++ changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918130141.2460012-1-jwakely@redhat.com/mbox/"},{"id":141415,"url":"https://patchwork.plctlab.org/api/1.2/patches/141415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918131221.2462150-1-jwakely@redhat.com/","msgid":"<20230918131221.2462150-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T13:11:28","name":"[committed] libstdc++: Update C++20 and C++23 status docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918131221.2462150-1-jwakely@redhat.com/mbox/"},{"id":141428,"url":"https://patchwork.plctlab.org/api/1.2/patches/141428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918142311.2464732-1-jwakely@redhat.com/","msgid":"<20230918142311.2464732-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T14:22:54","name":"[committed] libstdc++: Minor tweak to C++20 status docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918142311.2464732-1-jwakely@redhat.com/mbox/"},{"id":141436,"url":"https://patchwork.plctlab.org/api/1.2/patches/141436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il87bku2.fsf@euler.schwinge.homeip.net/","msgid":"<87il87bku2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:46:29","name":"LTO: Get rid of '\''lto_mode_identity_table'\'' (was: Machine Mode ICE in RISC-V when LTO)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il87bku2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141438,"url":"https://patchwork.plctlab.org/api/1.2/patches/141438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkdzy1wm.fsf@euler.schwinge.homeip.net/","msgid":"<87bkdzy1wm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:46:49","name":"Fix up '\''g++.dg/abi/nvptx-ptrmem1.C'\'' (was: [PTX] more register cleanups)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkdzy1wm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141440,"url":"https://patchwork.plctlab.org/api/1.2/patches/141440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5tjy1wa.fsf@euler.schwinge.homeip.net/","msgid":"<87a5tjy1wa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:47:01","name":"Add '\''g++.target/nvptx/nvptx.exp'\'' for nvptx-specific C++ test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5tjy1wa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141439,"url":"https://patchwork.plctlab.org/api/1.2/patches/141439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r93y1vp.fsf@euler.schwinge.homeip.net/","msgid":"<878r93y1vp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:47:22","name":"Move '\''g++.dg/abi/nvptx-[...].C'\'' -> '\''g++.target/nvptx/abi-[...].C'\'' (was: [PTX] parameters and return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r93y1vp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141451,"url":"https://patchwork.plctlab.org/api/1.2/patches/141451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153544.ECE0D33E99@hamza.pair.com/","msgid":"<20230918153544.ECE0D33E99@hamza.pair.com>","list_archive_url":null,"date":"2023-09-18T15:35:44","name":"[pushed] wwwdocs: conduct: Fix nested lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153544.ECE0D33E99@hamza.pair.com/mbox/"},{"id":141453,"url":"https://patchwork.plctlab.org/api/1.2/patches/141453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153622.1584614-1-lehua.ding@rivai.ai/","msgid":"<20230918153622.1584614-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T15:36:22","name":"RISC-V: Support combine cond extend and reduce sum to cond widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153622.1584614-1-lehua.ding@rivai.ai/mbox/"},{"id":141464,"url":"https://patchwork.plctlab.org/api/1.2/patches/141464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-1-ppalka@redhat.com/","msgid":"<20230918161202.2884010-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-18T16:12:01","name":"[v2,1/2] c++: overeager type completion in convert_to_void [PR111419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-1-ppalka@redhat.com/mbox/"},{"id":141465,"url":"https://patchwork.plctlab.org/api/1.2/patches/141465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-2-ppalka@redhat.com/","msgid":"<20230918161202.2884010-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-18T16:12:02","name":"[v2,2/2] c++: convert_to_void and volatile references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-2-ppalka@redhat.com/mbox/"},{"id":141486,"url":"https://patchwork.plctlab.org/api/1.2/patches/141486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiFCPMdK2Jrrgs1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-18T17:12:40","name":"c++, v2: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiFCPMdK2Jrrgs1@tucnak/mbox/"},{"id":141489,"url":"https://patchwork.plctlab.org/api/1.2/patches/141489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiHBe+ZImdAuuRr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-18T17:21:09","name":"c++, v2: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiHBe+ZImdAuuRr@tucnak/mbox/"},{"id":141511,"url":"https://patchwork.plctlab.org/api/1.2/patches/141511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918183614.41034-1-iain@sandoe.co.uk/","msgid":"<20230918183614.41034-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-18T18:36:14","name":"[pushed] configure, Darwin: Adjust handing of stdlib option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918183614.41034-1-iain@sandoe.co.uk/mbox/"},{"id":141514,"url":"https://patchwork.plctlab.org/api/1.2/patches/141514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918184144.41108-1-iain@sandoe.co.uk/","msgid":"<20230918184144.41108-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-18T18:41:44","name":"[pushed] Darwin, debug : Switch to DWARF 3 or 4 when dsymutil supports it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918184144.41108-1-iain@sandoe.co.uk/mbox/"},{"id":141562,"url":"https://patchwork.plctlab.org/api/1.2/patches/141562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-97d8f744-3dad-4060-bd01-4e51b565ad52-1695068821367@3c-app-gmx-bap05/","msgid":"","list_archive_url":null,"date":"2023-09-18T20:27:01","name":"fortran: fix checking of CHARACTER lengths in array constructors [PR70231]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-97d8f744-3dad-4060-bd01-4e51b565ad52-1695068821367@3c-app-gmx-bap05/mbox/"},{"id":141580,"url":"https://patchwork.plctlab.org/api/1.2/patches/141580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0624c1f6b5c97100f80c2ddf55a0498ef6bf63.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-09-18T21:26:49","name":"[C,v2] Add Walloc-size to warn about insufficient size in allocations [PR71219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0624c1f6b5c97100f80c2ddf55a0498ef6bf63.camel@tugraz.at/mbox/"},{"id":141584,"url":"https://patchwork.plctlab.org/api/1.2/patches/141584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQjEQBas/GM+yjSq@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-18T21:42:24","name":"[v7] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQjEQBas/GM+yjSq@redhat.com/mbox/"},{"id":141633,"url":"https://patchwork.plctlab.org/api/1.2/patches/141633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com/","msgid":"<375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-19T00:53:14","name":"RISC-V: Add builtin .def file dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com/mbox/"},{"id":141661,"url":"https://patchwork.plctlab.org/api/1.2/patches/141661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919022559.1879725-1-juzhe.zhong@rivai.ai/","msgid":"<20230919022559.1879725-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T02:25:59","name":"RISC-V: Fix RVV can change mode class bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919022559.1879725-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141667,"url":"https://patchwork.plctlab.org/api/1.2/patches/141667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com/","msgid":"<7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-19T02:48:03","name":"[COMMITTED] RISC-V: Fix typos on comments (SVE -> RVV)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com/mbox/"},{"id":141669,"url":"https://patchwork.plctlab.org/api/1.2/patches/141669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919025922.1898652-1-juzhe.zhong@rivai.ai/","msgid":"<20230919025922.1898652-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T02:59:22","name":"[V2] RISC-V: Fix RVV can change mode class bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919025922.1898652-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141702,"url":"https://patchwork.plctlab.org/api/1.2/patches/141702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-1-guojiufu@linux.ibm.com/","msgid":"<20230919052353.3208707-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T05:23:52","name":"[1/2] using overflow_free_p to simplify pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-1-guojiufu@linux.ibm.com/mbox/"},{"id":141703,"url":"https://patchwork.plctlab.org/api/1.2/patches/141703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-2-guojiufu@linux.ibm.com/","msgid":"<20230919052353.3208707-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T05:23:53","name":"[2/2] testcase: rename pr111303.c to pr111324.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-2-guojiufu@linux.ibm.com/mbox/"},{"id":141710,"url":"https://patchwork.plctlab.org/api/1.2/patches/141710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919070109.573374-1-mengqinggang@loongson.cn/","msgid":"<20230919070109.573374-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-19T07:01:09","name":"[v3] Modify gas uleb128 support test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919070109.573374-1-mengqinggang@loongson.cn/mbox/"},{"id":141714,"url":"https://patchwork.plctlab.org/api/1.2/patches/141714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlMfsN2tNELdv0B@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:23:42","name":"v2: small _BitInt tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlMfsN2tNELdv0B@tucnak/mbox/"},{"id":141716,"url":"https://patchwork.plctlab.org/api/1.2/patches/141716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlOhbHYG3BQ5RHI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:32:21","name":"[committed] libgomp: Handle NULL environ like pointer to NULL pointer [PR111413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlOhbHYG3BQ5RHI@tucnak/mbox/"},{"id":141720,"url":"https://patchwork.plctlab.org/api/1.2/patches/141720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlSYHDjdxvK5LtD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:48:48","name":"match.pd: Some build_nonstandard_integer_type tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlSYHDjdxvK5LtD@tucnak/mbox/"},{"id":141734,"url":"https://patchwork.plctlab.org/api/1.2/patches/141734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919081611.2696019-1-juzhe.zhong@rivai.ai/","msgid":"<20230919081611.2696019-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T08:16:11","name":"[Committed] RISC-V: Support integer FMA/FNMA VLS modes autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919081611.2696019-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141741,"url":"https://patchwork.plctlab.org/api/1.2/patches/141741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084444.2089-1-jinma@linux.alibaba.com/","msgid":"<20230919084444.2089-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-09-19T08:44:43","name":"[RFC,1/2] RISC-V: Add support for _Bfloat16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084444.2089-1-jinma@linux.alibaba.com/mbox/"},{"id":141743,"url":"https://patchwork.plctlab.org/api/1.2/patches/141743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084625.2183-1-jinma@linux.alibaba.com/","msgid":"<20230919084625.2183-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-09-19T08:46:25","name":"[RFC,2/2] RISC-V: Add '\''Zfbfmin'\'' extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084625.2183-1-jinma@linux.alibaba.com/mbox/"},{"id":141744,"url":"https://patchwork.plctlab.org/api/1.2/patches/141744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y46y2f7.fsf@euler.schwinge.homeip.net/","msgid":"<875y46y2f7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-19T08:47:56","name":"[PING] More '\''#ifdef ASM_OUTPUT_DEF'\'' -> '\''if (TARGET_SUPPORTS_ALIASES)'\'' etc. (was: [PATCH][v2] Introduce TARGET_SUPPORTS_ALIASES)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y46y2f7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141758,"url":"https://patchwork.plctlab.org/api/1.2/patches/141758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5fb2e05-9ab3-3b4f-2108-1790a708b34e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T08:59:32","name":"[v7,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5fb2e05-9ab3-3b4f-2108-1790a708b34e@linux.ibm.com/mbox/"},{"id":141774,"url":"https://patchwork.plctlab.org/api/1.2/patches/141774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com/","msgid":"<9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T09:21:16","name":"[v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com/mbox/"},{"id":141775,"url":"https://patchwork.plctlab.org/api/1.2/patches/141775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919092134.2722883-1-juzhe.zhong@rivai.ai/","msgid":"<20230919092134.2722883-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T09:21:34","name":"[Committed] RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919092134.2722883-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141813,"url":"https://patchwork.plctlab.org/api/1.2/patches/141813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919103900.A8F7D13458@imap2.suse-dmz.suse.de/","msgid":"<20230919103900.A8F7D13458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T10:39:00","name":"c/111468 - add unordered compare and pointer diff to GIMPLE FE parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919103900.A8F7D13458@imap2.suse-dmz.suse.de/mbox/"},{"id":141831,"url":"https://patchwork.plctlab.org/api/1.2/patches/141831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112311.8EC27134F3@imap2.suse-dmz.suse.de/","msgid":"<20230919112311.8EC27134F3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T11:23:11","name":"tree-optimization/111465 - bougs jump threading with no-copy src block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112311.8EC27134F3@imap2.suse-dmz.suse.de/mbox/"},{"id":141833,"url":"https://patchwork.plctlab.org/api/1.2/patches/141833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112653.539780-1-juzhe.zhong@rivai.ai/","msgid":"<20230919112653.539780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T11:26:53","name":"[Committed] RISC-V: Support VLS unary floating-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112653.539780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141834,"url":"https://patchwork.plctlab.org/api/1.2/patches/141834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112716.2265251-1-poulhies@adacore.com/","msgid":"<20230919112716.2265251-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T11:27:16","name":"[COMMITTED] ada: Crash processing type invariants on child subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112716.2265251-1-poulhies@adacore.com/mbox/"},{"id":141835,"url":"https://patchwork.plctlab.org/api/1.2/patches/141835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112727.2265405-1-poulhies@adacore.com/","msgid":"<20230919112727.2265405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T11:27:27","name":"[COMMITTED] ada: Refine upper array bound for bit packed array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112727.2265405-1-poulhies@adacore.com/mbox/"},{"id":141842,"url":"https://patchwork.plctlab.org/api/1.2/patches/141842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120342.2276062-1-poulhies@adacore.com/","msgid":"<20230919120342.2276062-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T12:03:42","name":"[COMMITTED] ada: Private extensions with the keyword \"synchronized\" are always limited.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120342.2276062-1-poulhies@adacore.com/mbox/"},{"id":141846,"url":"https://patchwork.plctlab.org/api/1.2/patches/141846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120812.2277126-1-poulhies@adacore.com/","msgid":"<20230919120812.2277126-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T12:08:12","name":"[COMMITTED] ada: TSS finalize address subprogram generation for constrained...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120812.2277126-1-poulhies@adacore.com/mbox/"},{"id":141852,"url":"https://patchwork.plctlab.org/api/1.2/patches/141852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919121858.572681-1-juzhe.zhong@rivai.ai/","msgid":"<20230919121858.572681-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T12:18:58","name":"RISC-V: Add FNMS floating-point VLS tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919121858.572681-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141859,"url":"https://patchwork.plctlab.org/api/1.2/patches/141859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17720-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T12:30:22","name":"middle-end: relax validate_subreg to allow paradoxical subregs that change mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17720-tamar@arm.com/mbox/"},{"id":141868,"url":"https://patchwork.plctlab.org/api/1.2/patches/141868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124146.3418D13458@imap2.suse-dmz.suse.de/","msgid":"<20230919124146.3418D13458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T12:41:45","name":"c/111468 - dump unordered compare operators in their GIMPLE form with -gimple","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124146.3418D13458@imap2.suse-dmz.suse.de/mbox/"},{"id":141869,"url":"https://patchwork.plctlab.org/api/1.2/patches/141869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124241.8368713458@imap2.suse-dmz.suse.de/","msgid":"<20230919124241.8368713458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T12:42:41","name":"target/30484 - testcase for exploration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124241.8368713458@imap2.suse-dmz.suse.de/mbox/"},{"id":141896,"url":"https://patchwork.plctlab.org/api/1.2/patches/141896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17717-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T13:53:51","name":"middle-end ifcvt: replace C++ sort with vec::qsort [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17717-tamar@arm.com/mbox/"},{"id":141946,"url":"https://patchwork.plctlab.org/api/1.2/patches/141946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150444.356437-1-ppalka@redhat.com/","msgid":"<20230919150444.356437-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T15:04:44","name":"c++: further optimize tsubst_template_decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150444.356437-1-ppalka@redhat.com/mbox/"},{"id":141949,"url":"https://patchwork.plctlab.org/api/1.2/patches/141949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-2-mary.bennett@embecosm.com/","msgid":"<20230919150734.2854664-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-09-19T15:07:33","name":"[1/2] RISC-V: Add support for XCVmac extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-2-mary.bennett@embecosm.com/mbox/"},{"id":141950,"url":"https://patchwork.plctlab.org/api/1.2/patches/141950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-3-mary.bennett@embecosm.com/","msgid":"<20230919150734.2854664-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-09-19T15:07:34","name":"[2/2] RISC-V: Add support for XCValu extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-3-mary.bennett@embecosm.com/mbox/"},{"id":141970,"url":"https://patchwork.plctlab.org/api/1.2/patches/141970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919152834.3988714-1-jason@redhat.com/","msgid":"<20230919152834.3988714-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-19T15:28:34","name":"[pushed] c++: inherited default constructor [CWG2799]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919152834.3988714-1-jason@redhat.com/mbox/"},{"id":141992,"url":"https://patchwork.plctlab.org/api/1.2/patches/141992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-1-aldyh@redhat.com/","msgid":"<20230919163052.865027-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:45","name":"[COMMITTED,frange] Add op2_range for operator_not_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-1-aldyh@redhat.com/mbox/"},{"id":141993,"url":"https://patchwork.plctlab.org/api/1.2/patches/141993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-2-aldyh@redhat.com/","msgid":"<20230919163052.865027-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:46","name":"[COMMITTED] Add frange::update_nan (const nan_state &).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-2-aldyh@redhat.com/mbox/"},{"id":141994,"url":"https://patchwork.plctlab.org/api/1.2/patches/141994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-3-aldyh@redhat.com/","msgid":"<20230919163052.865027-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:47","name":"[COMMITTED,frange] Remove redundant known_isnan() checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-3-aldyh@redhat.com/mbox/"},{"id":141995,"url":"https://patchwork.plctlab.org/api/1.2/patches/141995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919164055.728094-1-ppalka@redhat.com/","msgid":"<20230919164055.728094-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:40:54","name":"c++: improve class NTTP object pretty printing [PR111471]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919164055.728094-1-ppalka@redhat.com/mbox/"},{"id":142010,"url":"https://patchwork.plctlab.org/api/1.2/patches/142010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf026313-2297-4ce0-b9a1-f42ec56ba927@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T17:31:59","name":"[committed] Fix bogus operand predicate on iq2000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf026313-2297-4ce0-b9a1-f42ec56ba927@gmail.com/mbox/"},{"id":142039,"url":"https://patchwork.plctlab.org/api/1.2/patches/142039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919180423.452938-1-patrick@rivosinc.com/","msgid":"<20230919180423.452938-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-19T18:04:23","name":"RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919180423.452938-1-patrick@rivosinc.com/mbox/"},{"id":142044,"url":"https://patchwork.plctlab.org/api/1.2/patches/142044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479B004AEFB75D629A471F591FAA@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T18:16:21","name":"Fixes for profile count/probability maintenance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479B004AEFB75D629A471F591FAA@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":142045,"url":"https://patchwork.plctlab.org/api/1.2/patches/142045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479048C4F98A2BE82FEE30891FAA@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T18:16:34","name":"Remove .PHONY targets when building .fda files during autoprofiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479048C4F98A2BE82FEE30891FAA@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":142053,"url":"https://patchwork.plctlab.org/api/1.2/patches/142053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919184016.1059841-1-ppalka@redhat.com/","msgid":"<20230919184016.1059841-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T18:40:15","name":"[pushed] c++: fix cxx_print_type'\''s template-info dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919184016.1059841-1-ppalka@redhat.com/mbox/"},{"id":142091,"url":"https://patchwork.plctlab.org/api/1.2/patches/142091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com/","msgid":"<4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T21:10:49","name":"[v8,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com/mbox/"},{"id":142094,"url":"https://patchwork.plctlab.org/api/1.2/patches/142094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2154eb3-1f73-986b-c110-da910959ddab@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T21:21:03","name":"[Committed] RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2154eb3-1f73-986b-c110-da910959ddab@rivosinc.com/mbox/"},{"id":142153,"url":"https://patchwork.plctlab.org/api/1.2/patches/142153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920011557.106634-1-panchenghui@loongson.cn/","msgid":"<20230920011557.106634-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-09-20T01:15:57","name":"[v1] Update check_effective_target_vect_int_mod according to LoongArch SX/ASX capabilities.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920011557.106634-1-panchenghui@loongson.cn/mbox/"},{"id":142170,"url":"https://patchwork.plctlab.org/api/1.2/patches/142170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920022440.3404964-1-juzhe.zhong@rivai.ai/","msgid":"<20230920022440.3404964-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T02:24:40","name":"[Committed] RISC-V: Extend VLS modes in '\''VWEXTI'\'' iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920022440.3404964-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142175,"url":"https://patchwork.plctlab.org/api/1.2/patches/142175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920023059.1728132-1-pan2.li@intel.com/","msgid":"<20230920023059.1728132-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-20T02:30:59","name":"[v1] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920023059.1728132-1-pan2.li@intel.com/mbox/"},{"id":142202,"url":"https://patchwork.plctlab.org/api/1.2/patches/142202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920033736.365110-1-yanzhang.wang@intel.com/","msgid":"<20230920033736.365110-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-09-20T03:36:20","name":"RISC-V: Support simplifying x/(-1) to neg for vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920033736.365110-1-yanzhang.wang@intel.com/mbox/"},{"id":142212,"url":"https://patchwork.plctlab.org/api/1.2/patches/142212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920041202.4099349-1-lhyatt@gmail.com/","msgid":"<20230920041202.4099349-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-09-20T04:12:02","name":"libcpp: Improve the diagnostic for poisoned identifiers [PR36887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920041202.4099349-1-lhyatt@gmail.com/mbox/"},{"id":142220,"url":"https://patchwork.plctlab.org/api/1.2/patches/142220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com/","msgid":"<55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com>","list_archive_url":null,"date":"2023-09-20T04:51:05","name":"[_GLIBCXX_INLINE_VERSION] Fix ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com/mbox/"},{"id":142233,"url":"https://patchwork.plctlab.org/api/1.2/patches/142233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920053954.3454414-1-lehua.ding@rivai.ai/","msgid":"<20230920053954.3454414-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T05:39:54","name":"RISC-V: Fixed ICE caused by missing operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920053954.3454414-1-lehua.ding@rivai.ai/mbox/"},{"id":142235,"url":"https://patchwork.plctlab.org/api/1.2/patches/142235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg1he65o.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-09-20T05:59:47","name":"[v5] Introduce attribute sym_alias (was: Last call for bikeshedding on attribute sym/exalias/reverse_alias)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg1he65o.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":142249,"url":"https://patchwork.plctlab.org/api/1.2/patches/142249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqVzpk6dV9FP0LD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T06:48:46","name":"[committed] openmp: Add omp::decl attribute support [PR111392]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqVzpk6dV9FP0LD@tucnak/mbox/"},{"id":142253,"url":"https://patchwork.plctlab.org/api/1.2/patches/142253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920070311.3472141-1-lehua.ding@rivai.ai/","msgid":"<20230920070311.3472141-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T07:03:11","name":"RISC-V: Reorganize and rename combine patterns in autovec-opt.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920070311.3472141-1-lehua.ding@rivai.ai/mbox/"},{"id":142254,"url":"https://patchwork.plctlab.org/api/1.2/patches/142254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJW7-4N-CkL5mH2K+RQomL9pYmZVZvDUjYdMUHHd+5UBA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:03:39","name":"[fortran] PR68155 - ICE on initializing character array in type (len_lhs <> len_rhs)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJW7-4N-CkL5mH2K+RQomL9pYmZVZvDUjYdMUHHd+5UBA@mail.gmail.com/mbox/"},{"id":142258,"url":"https://patchwork.plctlab.org/api/1.2/patches/142258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqciCpgLlyt+ZwJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:17:28","name":"c, c++, v3: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqciCpgLlyt+ZwJ@tucnak/mbox/"},{"id":142260,"url":"https://patchwork.plctlab.org/api/1.2/patches/142260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqd7dUVlrhR6wE7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:23:25","name":"middle-end: use MAX_FIXED_MODE_SIZE instead of precidion of TImode/DImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqd7dUVlrhR6wE7@tucnak/mbox/"},{"id":142274,"url":"https://patchwork.plctlab.org/api/1.2/patches/142274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920075744.3514469-1-lehua.ding@rivai.ai/","msgid":"<20230920075744.3514469-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T07:57:44","name":"[V2] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920075744.3514469-1-lehua.ding@rivai.ai/mbox/"},{"id":142290,"url":"https://patchwork.plctlab.org/api/1.2/patches/142290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9e21160-58cb-e4a3-6cee-15ea291b8eba@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T08:49:16","name":"[rs6000] Enable vector compare for 16-byte memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9e21160-58cb-e4a3-6cee-15ea291b8eba@linux.ibm.com/mbox/"},{"id":142302,"url":"https://patchwork.plctlab.org/api/1.2/patches/142302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091921.BD9D91333E@imap2.suse-dmz.suse.de/","msgid":"<20230920091921.BD9D91333E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-20T09:19:21","name":"[1/2] tree-optimization/111489 - turn uninit limits to params","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091921.BD9D91333E@imap2.suse-dmz.suse.de/mbox/"},{"id":142303,"url":"https://patchwork.plctlab.org/api/1.2/patches/142303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091936.A39601333E@imap2.suse-dmz.suse.de/","msgid":"<20230920091936.A39601333E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-20T09:19:36","name":"[2/2] tree-optimization/111489 - raise --param uninit-max-chain-len to 8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091936.A39601333E@imap2.suse-dmz.suse.de/mbox/"},{"id":142311,"url":"https://patchwork.plctlab.org/api/1.2/patches/142311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920095748.84817-1-iain@sandoe.co.uk/","msgid":"<20230920095748.84817-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-20T09:57:48","name":"[pushed] Darwin: Move checking of the '\''shared'\'' driver spec.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920095748.84817-1-iain@sandoe.co.uk/mbox/"},{"id":142320,"url":"https://patchwork.plctlab.org/api/1.2/patches/142320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920100848.3241806-1-juzhe.zhong@rivai.ai/","msgid":"<20230920100848.3241806-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T10:08:48","name":"[Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920100848.3241806-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142360,"url":"https://patchwork.plctlab.org/api/1.2/patches/142360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b72396e437cb57d23c49260845743c03e6117bcd.1695207771.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T11:13:59","name":"[1/3,og13] OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b72396e437cb57d23c49260845743c03e6117bcd.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142359,"url":"https://patchwork.plctlab.org/api/1.2/patches/142359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com/","msgid":"<33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:14:00","name":"[2/3,og13] OpenMP, NVPTX: memcpy[23]D bias correction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142361,"url":"https://patchwork.plctlab.org/api/1.2/patches/142361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com/","msgid":"<56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:14:01","name":"[3/3,og13] OpenMP: Support accelerated 2D/3D memory copies for AMD GCN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142369,"url":"https://patchwork.plctlab.org/api/1.2/patches/142369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920114405.134100-1-julian@codesourcery.com/","msgid":"<20230920114405.134100-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:44:04","name":"OpenMP: Support accelerated 2D/3D memory copies for AMD GCN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920114405.134100-1-julian@codesourcery.com/mbox/"},{"id":142370,"url":"https://patchwork.plctlab.org/api/1.2/patches/142370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920115043.3434942-1-siddhesh@gotplt.org/","msgid":"<20230920115043.3434942-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-09-20T11:50:43","name":"Add a GCC Security policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920115043.3434942-1-siddhesh@gotplt.org/mbox/"},{"id":142375,"url":"https://patchwork.plctlab.org/api/1.2/patches/142375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-1-arthur.cohen@embecosm.com/","msgid":"<20230920120311.14892-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-20T11:59:51","name":"[1/3] librust: Add libproc_macro and build system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-1-arthur.cohen@embecosm.com/mbox/"},{"id":142376,"url":"https://patchwork.plctlab.org/api/1.2/patches/142376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-3-arthur.cohen@embecosm.com/","msgid":"<20230920120311.14892-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-20T11:59:53","name":"[2/3] build: Add libgrust as compilation modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-3-arthur.cohen@embecosm.com/mbox/"},{"id":142391,"url":"https://patchwork.plctlab.org/api/1.2/patches/142391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920123934.167085-1-juzhe.zhong@rivai.ai/","msgid":"<20230920123934.167085-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T12:39:34","name":"[Committed] RISC-V: Support VLS floating-point extend/truncate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920123934.167085-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142401,"url":"https://patchwork.plctlab.org/api/1.2/patches/142401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130904.2329151-1-lehua.ding@rivai.ai/","msgid":"<20230920130904.2329151-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T13:09:04","name":"[1/2] match.pd: Support combine cond_len_op + vec_cond similar to cond_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130904.2329151-1-lehua.ding@rivai.ai/mbox/"},{"id":142402,"url":"https://patchwork.plctlab.org/api/1.2/patches/142402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130928.2479134-1-lehua.ding@rivai.ai/","msgid":"<20230920130928.2479134-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T13:09:28","name":"[2/2] RISC-V: Add assert of the number of vmerge in autovec cond testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130928.2479134-1-lehua.ding@rivai.ai/mbox/"},{"id":142416,"url":"https://patchwork.plctlab.org/api/1.2/patches/142416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A64BB093DE2368050A9583F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T13:50:12","name":"AArch64: Fix strict-align cpymem/setmem [PR103100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A64BB093DE2368050A9583F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142418,"url":"https://patchwork.plctlab.org/api/1.2/patches/142418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com/","msgid":"<0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com>","list_archive_url":null,"date":"2023-09-20T13:51:02","name":"ifcvt/vect: Emit COND_ADD for conditional scalar reduction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com/mbox/"},{"id":142430,"url":"https://patchwork.plctlab.org/api/1.2/patches/142430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920143747.1479843-1-ppalka@redhat.com/","msgid":"<20230920143747.1479843-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-20T14:37:46","name":"c++: missing SFINAE in grok_array_decl [PR111493]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920143747.1479843-1-ppalka@redhat.com/mbox/"},{"id":142476,"url":"https://patchwork.plctlab.org/api/1.2/patches/142476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920145849.1118927-1-juzhe.zhong@rivai.ai/","msgid":"<20230920145849.1118927-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T14:58:49","name":"[Committed,V4] internal-fn: Support undefined rtx for uninitialized SSA_NAME[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920145849.1118927-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142483,"url":"https://patchwork.plctlab.org/api/1.2/patches/142483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920151234.1015328-1-aldyh@redhat.com/","msgid":"<20230920151234.1015328-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-20T15:12:21","name":"[frange] Remove special casing from unordered operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920151234.1015328-1-aldyh@redhat.com/mbox/"},{"id":142500,"url":"https://patchwork.plctlab.org/api/1.2/patches/142500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89820CEB177EEA9CA6597E2C83F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T16:07:53","name":"[v2] AArch64: Fix memmove operand corruption [PR111121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89820CEB177EEA9CA6597E2C83F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142528,"url":"https://patchwork.plctlab.org/api/1.2/patches/142528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920170601.472906-1-patrick@rivosinc.com/","msgid":"<20230920170601.472906-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-20T17:06:01","name":"RISC-V: Remove math.h import to resolve missing stubs failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920170601.472906-1-patrick@rivosinc.com/mbox/"},{"id":142530,"url":"https://patchwork.plctlab.org/api/1.2/patches/142530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920171026.1875871-1-ppalka@redhat.com/","msgid":"<20230920171026.1875871-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-20T17:10:26","name":"c++: constraint rewriting during ttp coercion [PR111485]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920171026.1875871-1-ppalka@redhat.com/mbox/"},{"id":142567,"url":"https://patchwork.plctlab.org/api/1.2/patches/142567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8506f4a-8320-203e-6810-6fa3c77143b7@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T19:29:57","name":"[COMMITTED] Tweak ssa_cache::merge_range API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8506f4a-8320-203e-6810-6fa3c77143b7@redhat.com/mbox/"},{"id":142679,"url":"https://patchwork.plctlab.org/api/1.2/patches/142679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011137.9105-1-guojie@loongson.cn/","msgid":"<20230921011137.9105-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-21T01:11:37","name":"LoongArch: Optimizations of vector construction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011137.9105-1-guojie@loongson.cn/mbox/"},{"id":142680,"url":"https://patchwork.plctlab.org/api/1.2/patches/142680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011918.9384-1-guojie@loongson.cn/","msgid":"<20230921011918.9384-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-21T01:19:18","name":"LoongArch: Optimizations of vector construction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011918.9384-1-guojie@loongson.cn/mbox/"},{"id":142694,"url":"https://patchwork.plctlab.org/api/1.2/patches/142694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921021746.3586923-1-juzhe.zhong@rivai.ai/","msgid":"<20230921021746.3586923-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T02:17:46","name":"[Committed] RISC-V: Support VLS INT <-> FP conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921021746.3586923-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142695,"url":"https://patchwork.plctlab.org/api/1.2/patches/142695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921023138.1789221-1-guojiufu@linux.ibm.com/","msgid":"<20230921023138.1789221-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-21T02:31:38","name":"check undefine_p for one more vr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921023138.1789221-1-guojiufu@linux.ibm.com/mbox/"},{"id":142697,"url":"https://patchwork.plctlab.org/api/1.2/patches/142697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921024313.1941378-1-apinski@marvell.com/","msgid":"<20230921024313.1941378-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-21T02:43:13","name":"MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921024313.1941378-1-apinski@marvell.com/mbox/"},{"id":142707,"url":"https://patchwork.plctlab.org/api/1.2/patches/142707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921031221.14656-1-xuli1@eswincomputing.com/","msgid":"<20230921031221.14656-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-21T03:12:21","name":"RISC-V: Optimized for strided load/store with stride == element width[PR111450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921031221.14656-1-xuli1@eswincomputing.com/mbox/"},{"id":142714,"url":"https://patchwork.plctlab.org/api/1.2/patches/142714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921034443.3671012-1-lehua.ding@rivai.ai/","msgid":"<20230921034443.3671012-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T03:44:43","name":"RISC-V: Rename predicate vector_gs_scale_operand_16/32 to more generic names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921034443.3671012-1-lehua.ding@rivai.ai/mbox/"},{"id":142735,"url":"https://patchwork.plctlab.org/api/1.2/patches/142735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921053259.1382886-1-lehua.ding@rivai.ai/","msgid":"<20230921053259.1382886-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T05:32:59","name":"[V3] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921053259.1382886-1-lehua.ding@rivai.ai/mbox/"},{"id":142745,"url":"https://patchwork.plctlab.org/api/1.2/patches/142745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orled0dnm0.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-09-21T06:52:39","name":"[v2] Re: Introduce -finline-stringops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orled0dnm0.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":142747,"url":"https://patchwork.plctlab.org/api/1.2/patches/142747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921065433.3298121-1-juzhe.zhong@rivai.ai/","msgid":"<20230921065433.3298121-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T06:54:33","name":"RISC-V: Fix SUBREG move of VLS mode[PR111486]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921065433.3298121-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142750,"url":"https://patchwork.plctlab.org/api/1.2/patches/142750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921071118.3321383-1-lehua.ding@rivai.ai/","msgid":"<20230921071118.3321383-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T07:11:18","name":"RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921071118.3321383-1-lehua.ding@rivai.ai/mbox/"},{"id":142753,"url":"https://patchwork.plctlab.org/api/1.2/patches/142753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-2-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-2-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:56","name":"[01/18] Initial support for -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-2-lin1.hu@intel.com/mbox/"},{"id":142759,"url":"https://patchwork.plctlab.org/api/1.2/patches/142759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-4-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-4-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:58","name":"[03/18,2/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-4-lin1.hu@intel.com/mbox/"},{"id":142766,"url":"https://patchwork.plctlab.org/api/1.2/patches/142766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-5-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-5-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:59","name":"[04/18,3/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-5-lin1.hu@intel.com/mbox/"},{"id":142762,"url":"https://patchwork.plctlab.org/api/1.2/patches/142762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-6-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-6-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:00","name":"[05/18,4/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-6-lin1.hu@intel.com/mbox/"},{"id":142769,"url":"https://patchwork.plctlab.org/api/1.2/patches/142769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-7-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-7-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:01","name":"[06/18,5/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-7-lin1.hu@intel.com/mbox/"},{"id":142763,"url":"https://patchwork.plctlab.org/api/1.2/patches/142763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-8-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-8-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:02","name":"[07/18,1/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-8-lin1.hu@intel.com/mbox/"},{"id":142754,"url":"https://patchwork.plctlab.org/api/1.2/patches/142754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-9-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-9-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:03","name":"[08/18,2/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-9-lin1.hu@intel.com/mbox/"},{"id":142757,"url":"https://patchwork.plctlab.org/api/1.2/patches/142757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-10-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-10-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:04","name":"[09/18,3/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-10-lin1.hu@intel.com/mbox/"},{"id":142764,"url":"https://patchwork.plctlab.org/api/1.2/patches/142764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-11-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-11-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:05","name":"[10/18,4/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-11-lin1.hu@intel.com/mbox/"},{"id":142770,"url":"https://patchwork.plctlab.org/api/1.2/patches/142770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-12-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-12-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:06","name":"[11/18,5/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-12-lin1.hu@intel.com/mbox/"},{"id":142767,"url":"https://patchwork.plctlab.org/api/1.2/patches/142767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-13-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-13-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:07","name":"[12/18] Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-13-lin1.hu@intel.com/mbox/"},{"id":142768,"url":"https://patchwork.plctlab.org/api/1.2/patches/142768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-14-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-14-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:08","name":"[13/18] Support -mevex512 for AVX512F intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-14-lin1.hu@intel.com/mbox/"},{"id":142756,"url":"https://patchwork.plctlab.org/api/1.2/patches/142756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-15-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-15-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:09","name":"[14/18] Support -mevex512 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-15-lin1.hu@intel.com/mbox/"},{"id":142765,"url":"https://patchwork.plctlab.org/api/1.2/patches/142765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-16-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-16-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:10","name":"[15/18] Support -mevex512 for AVX512BW intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-16-lin1.hu@intel.com/mbox/"},{"id":142755,"url":"https://patchwork.plctlab.org/api/1.2/patches/142755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-17-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-17-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:11","name":"[16/18] Support -mevex512 for AVX512{IFMA, VBMI, VNNI, BF16, VPOPCNTDQ, VBMI2, BITALG, VP2INTERSECT}, VAES, GFNI, VPCLMULQDQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-17-lin1.hu@intel.com/mbox/"},{"id":142760,"url":"https://patchwork.plctlab.org/api/1.2/patches/142760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-18-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-18-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:12","name":"[17/18] Support -mevex512 for AVX512FP16 intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-18-lin1.hu@intel.com/mbox/"},{"id":142758,"url":"https://patchwork.plctlab.org/api/1.2/patches/142758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-19-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-19-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:13","name":"[18/18] Allow -mno-evex512 usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-19-lin1.hu@intel.com/mbox/"},{"id":142772,"url":"https://patchwork.plctlab.org/api/1.2/patches/142772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921080931.1954219-1-apinski@marvell.com/","msgid":"<20230921080931.1954219-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-21T08:09:31","name":"PHIOPT: Fix minmax_replacement for three way","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921080931.1954219-1-apinski@marvell.com/mbox/"},{"id":142774,"url":"https://patchwork.plctlab.org/api/1.2/patches/142774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921082017.1456735-1-juzhe.zhong@rivai.ai/","msgid":"<20230921082017.1456735-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T08:20:17","name":"RISC-V: Enable undefined support for RVV auto-vectorization[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921082017.1456735-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142777,"url":"https://patchwork.plctlab.org/api/1.2/patches/142777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921084600.40546-2-arthur.cohen@embecosm.com/","msgid":"<20230921084600.40546-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-21T08:44:30","name":"[3/3] build: Regenerate build files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921084600.40546-2-arthur.cohen@embecosm.com/mbox/"},{"id":142782,"url":"https://patchwork.plctlab.org/api/1.2/patches/142782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aaf9d765-ca62-487d-974a-9984d120235d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T09:22:00","name":"[wwwdocs] OpenMP: gcc-14/changes.html and projects/gomp/ update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aaf9d765-ca62-487d-974a-9984d120235d@codesourcery.com/mbox/"},{"id":142784,"url":"https://patchwork.plctlab.org/api/1.2/patches/142784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921093415.128457-4-arthur.cohen@embecosm.com/","msgid":"<20230921093415.128457-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-21T09:32:49","name":"[3/3,v2] build: Regenerate build files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921093415.128457-4-arthur.cohen@embecosm.com/mbox/"},{"id":142785,"url":"https://patchwork.plctlab.org/api/1.2/patches/142785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921095027.143005-1-lehua.ding@rivai.ai/","msgid":"<20230921095027.143005-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T09:50:27","name":"[V2] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921095027.143005-1-lehua.ding@rivai.ai/mbox/"},{"id":142794,"url":"https://patchwork.plctlab.org/api/1.2/patches/142794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921103209.819164-1-pan2.li@intel.com/","msgid":"<20230921103209.819164-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-21T10:32:09","name":"[v2] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921103209.819164-1-pan2.li@intel.com/mbox/"},{"id":142798,"url":"https://patchwork.plctlab.org/api/1.2/patches/142798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921115410.1393445-1-juzhe.zhong@rivai.ai/","msgid":"<20230921115410.1393445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T11:54:10","name":"[Committed] RISC-V: Support VLS mult high","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921115410.1393445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142800,"url":"https://patchwork.plctlab.org/api/1.2/patches/142800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921123333.3451981-1-juzhe.zhong@rivai.ai/","msgid":"<20230921123333.3451981-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T12:33:33","name":"[Committed] RISC-V: Add more VLS unary tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921123333.3451981-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142801,"url":"https://patchwork.plctlab.org/api/1.2/patches/142801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQxIGK4oIxNMun2i@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-21T13:41:44","name":"[v3] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQxIGK4oIxNMun2i@Thaum.localdomain/mbox/"},{"id":142802,"url":"https://patchwork.plctlab.org/api/1.2/patches/142802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FFA5F943B02C53858EAD83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T14:24:44","name":"[v2] AArch64: Fix strict-align cpymem/setmem [PR103100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FFA5F943B02C53858EAD83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142804,"url":"https://patchwork.plctlab.org/api/1.2/patches/142804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921151850.1697755-1-pan2.li@intel.com/","msgid":"<20230921151850.1697755-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-21T15:18:50","name":"[v3] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921151850.1697755-1-pan2.li@intel.com/mbox/"},{"id":142806,"url":"https://patchwork.plctlab.org/api/1.2/patches/142806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982074EA9925BC24E2DC43A83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T16:19:51","name":"AArch64: Add inline memmove expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982074EA9925BC24E2DC43A83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142971,"url":"https://patchwork.plctlab.org/api/1.2/patches/142971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921224722.3070110-1-juzhe.zhong@rivai.ai/","msgid":"<20230921224722.3070110-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T22:47:22","name":"[Committed] RISC-V: Add VLS integer ABS support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921224722.3070110-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143023,"url":"https://patchwork.plctlab.org/api/1.2/patches/143023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922001238.97411-1-pan2.li@intel.com/","msgid":"<20230922001238.97411-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T00:12:38","name":"[v4] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922001238.97411-1-pan2.li@intel.com/mbox/"},{"id":143055,"url":"https://patchwork.plctlab.org/api/1.2/patches/143055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922011251.335382-1-pan2.li@intel.com/","msgid":"<20230922011251.335382-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T01:12:51","name":"[v1] RISC-V: Leverage __builtin_xx instead of math.h for test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922011251.335382-1-pan2.li@intel.com/mbox/"},{"id":143069,"url":"https://patchwork.plctlab.org/api/1.2/patches/143069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922013309.21359-1-xuli1@eswincomputing.com/","msgid":"<20230922013309.21359-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-22T01:33:09","name":"RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922013309.21359-1-xuli1@eswincomputing.com/mbox/"},{"id":143105,"url":"https://patchwork.plctlab.org/api/1.2/patches/143105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922023743.332-1-xuli1@eswincomputing.com/","msgid":"<20230922023743.332-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-22T02:37:43","name":"[V2] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922023743.332-1-xuli1@eswincomputing.com/mbox/"},{"id":143123,"url":"https://patchwork.plctlab.org/api/1.2/patches/143123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030007.197448-1-lehua.ding@rivai.ai/","msgid":"<20230922030007.197448-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-22T03:00:07","name":"[COMMITTED] RISC-V: Split VLS avl_type from NONVLMAX avl_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030007.197448-1-lehua.ding@rivai.ai/mbox/"},{"id":143124,"url":"https://patchwork.plctlab.org/api/1.2/patches/143124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030026.197559-1-lehua.ding@rivai.ai/","msgid":"<20230922030026.197559-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-22T03:00:26","name":"[COMMITTED,V4] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030026.197559-1-lehua.ding@rivai.ai/mbox/"},{"id":143146,"url":"https://patchwork.plctlab.org/api/1.2/patches/143146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922033959.814278-1-pan2.li@intel.com/","msgid":"<20230922033959.814278-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T03:39:59","name":"[v1] RISC-V: Remove arch and abi option for run test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922033959.814278-1-pan2.li@intel.com/mbox/"},{"id":143149,"url":"https://patchwork.plctlab.org/api/1.2/patches/143149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922034644.843601-1-pan2.li@intel.com/","msgid":"<20230922034644.843601-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T03:46:44","name":"[v1] RISC-V: Rename the test macro for math autovec test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922034644.843601-1-pan2.li@intel.com/mbox/"},{"id":143206,"url":"https://patchwork.plctlab.org/api/1.2/patches/143206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922062306.1220795-1-pan2.li@intel.com/","msgid":"<20230922062306.1220795-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T06:23:06","name":"[v1] RISCV-V: Suport FP floor auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922062306.1220795-1-pan2.li@intel.com/mbox/"},{"id":143224,"url":"https://patchwork.plctlab.org/api/1.2/patches/143224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com/","msgid":"<47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-22T07:11:16","name":"[1/2] RISC-V: Define not broken prefetch builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com/mbox/"},{"id":143225,"url":"https://patchwork.plctlab.org/api/1.2/patches/143225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com/","msgid":"<8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-22T07:11:17","name":"[2/2] RISC-V: Fix ICE by expansion and register coercion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com/mbox/"},{"id":143240,"url":"https://patchwork.plctlab.org/api/1.2/patches/143240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922075153.2220810-1-juzhe.zhong@rivai.ai/","msgid":"<20230922075153.2220810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-22T07:51:53","name":"RISC-V: Add VLS conditional patterns support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922075153.2220810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143247,"url":"https://patchwork.plctlab.org/api/1.2/patches/143247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-1-andrea.corallo@arm.com/","msgid":"<20230922080703.93612-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-09-22T08:07:01","name":"[1/3] recog: Improve parser for pattern new compact syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-1-andrea.corallo@arm.com/mbox/"},{"id":143246,"url":"https://patchwork.plctlab.org/api/1.2/patches/143246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-2-andrea.corallo@arm.com/","msgid":"<20230922080703.93612-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-09-22T08:07:02","name":"[2/3] recog: Support space in \"[ cons\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-2-andrea.corallo@arm.com/mbox/"},{"id":143259,"url":"https://patchwork.plctlab.org/api/1.2/patches/143259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922083057.980029-1-juzhe.zhong@rivai.ai/","msgid":"<20230922083057.980029-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-22T08:30:57","name":"[Committed] RISC-V: Remove @ of vec_duplicate pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922083057.980029-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143281,"url":"https://patchwork.plctlab.org/api/1.2/patches/143281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922091158.1592808-1-pan2.li@intel.com/","msgid":"<20230922091158.1592808-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T09:11:58","name":"[v1] RISC-V: Move ceil test cases to unop folder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922091158.1592808-1-pan2.li@intel.com/mbox/"},{"id":143338,"url":"https://patchwork.plctlab.org/api/1.2/patches/143338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922102904.2270325-1-guojiufu@linux.ibm.com/","msgid":"<20230922102904.2270325-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-22T10:29:04","name":"light expander sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922102904.2270325-1-guojiufu@linux.ibm.com/mbox/"},{"id":143351,"url":"https://patchwork.plctlab.org/api/1.2/patches/143351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-2-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:19","name":"[01/13,APX,EGPR] middle-end: Add insn argument to base_reg_class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-2-hongyu.wang@intel.com/mbox/"},{"id":143347,"url":"https://patchwork.plctlab.org/api/1.2/patches/143347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-3-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:20","name":"[02/13,APX,EGPR] middle-end: Add index_reg_class with insn argument.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-3-hongyu.wang@intel.com/mbox/"},{"id":143350,"url":"https://patchwork.plctlab.org/api/1.2/patches/143350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-4-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:21","name":"[03/13,APX_EGPR] Initial support for APX_F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-4-hongyu.wang@intel.com/mbox/"},{"id":143355,"url":"https://patchwork.plctlab.org/api/1.2/patches/143355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-5-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:22","name":"[04/13,APX,EGPR] Add 16 new integer general purpose registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-5-hongyu.wang@intel.com/mbox/"},{"id":143348,"url":"https://patchwork.plctlab.org/api/1.2/patches/143348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-6-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:23","name":"[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-6-hongyu.wang@intel.com/mbox/"},{"id":143356,"url":"https://patchwork.plctlab.org/api/1.2/patches/143356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-7-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:24","name":"[06/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-7-hongyu.wang@intel.com/mbox/"},{"id":143349,"url":"https://patchwork.plctlab.org/api/1.2/patches/143349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-8-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:25","name":"[07/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-8-hongyu.wang@intel.com/mbox/"},{"id":143354,"url":"https://patchwork.plctlab.org/api/1.2/patches/143354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-12-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:29","name":"[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-12-hongyu.wang@intel.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-09/mbox/"},{"id":32,"url":"https://patchwork.plctlab.org/api/1.2/bundles/32/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-10/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-10","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":146975,"url":"https://patchwork.plctlab.org/api/1.2/patches/146975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCr7wp7BF3ifNTRb4dD=ib_-n7Av_0SD0QG7NStL+7CjWA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-30T20:30:45","name":"RFA: RISC-V: Make riscv_vector::legitimize_move adjust SRC in the caller. (Was: Remove mem-to-mem VLS move pattern[PR111566])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCr7wp7BF3ifNTRb4dD=ib_-n7Av_0SD0QG7NStL+7CjWA@mail.gmail.com/mbox/"},{"id":146979,"url":"https://patchwork.plctlab.org/api/1.2/patches/146979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930204910.3544331-1-slyich@gmail.com/","msgid":"<20230930204910.3544331-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-09-30T20:49:10","name":"rtl: fix buidl failure on -fchecking=2 [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930204910.3544331-1-slyich@gmail.com/mbox/"},{"id":146981,"url":"https://patchwork.plctlab.org/api/1.2/patches/146981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930210254.3750973-1-slyich@gmail.com/","msgid":"<20230930210254.3750973-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-09-30T21:02:54","name":"[v2] rtl: fix build failure on -fchecking=2 [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930210254.3750973-1-slyich@gmail.com/mbox/"},{"id":147001,"url":"https://patchwork.plctlab.org/api/1.2/patches/147001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930230019.865326-1-patrick@rivosinc.com/","msgid":"<20230930230019.865326-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-30T23:00:19","name":"RISC-V: Use safe_grow_cleared for vector info [PR111469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930230019.865326-1-patrick@rivosinc.com/mbox/"},{"id":147002,"url":"https://patchwork.plctlab.org/api/1.2/patches/147002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da3d1e8c-3df2-2008-ad14-a3036b6f6665@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-09-30T23:13:05","name":"[Committed] RISC-V: Use safe_grow_cleared for vector info [PR111469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da3d1e8c-3df2-2008-ad14-a3036b6f6665@rivosinc.com/mbox/"},{"id":147076,"url":"https://patchwork.plctlab.org/api/1.2/patches/147076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001113827.54547-1-alx@kernel.org/","msgid":"<20231001113827.54547-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T11:38:28","name":"[v3] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001113827.54547-1-alx@kernel.org/mbox/"},{"id":147077,"url":"https://patchwork.plctlab.org/api/1.2/patches/147077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001114120.54695-1-alx@kernel.org/","msgid":"<20231001114120.54695-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T11:41:21","name":"[v4] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001114120.54695-1-alx@kernel.org/mbox/"},{"id":147131,"url":"https://patchwork.plctlab.org/api/1.2/patches/147131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001162400.68141-1-alx@kernel.org/","msgid":"<20231001162400.68141-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T16:24:00","name":"[v5] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001162400.68141-1-alx@kernel.org/mbox/"},{"id":147148,"url":"https://patchwork.plctlab.org/api/1.2/patches/147148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192742.145518-1-pinskia@gmail.com/","msgid":"<20231001192742.145518-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-01T19:27:43","name":"[COMMITTED/13] Fix PR 110386: backprop vs ABSU_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192742.145518-1-pinskia@gmail.com/mbox/"},{"id":147149,"url":"https://patchwork.plctlab.org/api/1.2/patches/147149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192943.3473530-1-slyich@gmail.com/","msgid":"<20231001192943.3473530-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-01T19:29:43","name":"[v2] ipa-utils: avoid uninitialized probabilities on ICF [PR111559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192943.3473530-1-slyich@gmail.com/mbox/"},{"id":147152,"url":"https://patchwork.plctlab.org/api/1.2/patches/147152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-2-sandra@codesourcery.com/","msgid":"<20231001201021.785572-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:18","name":"[WIP,1/4] openacc: Rename OMP_CLAUSE_TILE to OMP_CLAUSE_OACC_TILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-2-sandra@codesourcery.com/mbox/"},{"id":147153,"url":"https://patchwork.plctlab.org/api/1.2/patches/147153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-3-sandra@codesourcery.com/","msgid":"<20231001201021.785572-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:19","name":"[WIP,2/4] OpenMP: Language-independent parts of loop transform support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-3-sandra@codesourcery.com/mbox/"},{"id":147154,"url":"https://patchwork.plctlab.org/api/1.2/patches/147154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-4-sandra@codesourcery.com/","msgid":"<20231001201021.785572-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:20","name":"[WIP,3/4] OpenMP: Fortran front-end support for loop transforms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-4-sandra@codesourcery.com/mbox/"},{"id":147155,"url":"https://patchwork.plctlab.org/api/1.2/patches/147155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-5-sandra@codesourcery.com/","msgid":"<20231001201021.785572-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:21","name":"[WIP,4/4] OpenMP: C and C++ front-end support for loop transforms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-5-sandra@codesourcery.com/mbox/"},{"id":147157,"url":"https://patchwork.plctlab.org/api/1.2/patches/147157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001202315.324838-1-pinskia@gmail.com/","msgid":"<20231001202315.324838-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-01T20:23:15","name":"[COMMITTED/13] Fix PR 111331: wrong code for `a > 28 ? MIN : 29`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001202315.324838-1-pinskia@gmail.com/mbox/"},{"id":147165,"url":"https://patchwork.plctlab.org/api/1.2/patches/147165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqsxXsNQTsuEb5-TdeoqmK0njOOYBV-BN0-arSB2CRpZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-01T22:00:33","name":"Committed: Fix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqsxXsNQTsuEb5-TdeoqmK0njOOYBV-BN0-arSB2CRpZA@mail.gmail.com/mbox/"},{"id":147183,"url":"https://patchwork.plctlab.org/api/1.2/patches/147183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRonlN279jCTl5fZ@dj3ntoo/","msgid":"","list_archive_url":null,"date":"2023-10-02T02:14:44","name":"C/C++: add hints for strerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRonlN279jCTl5fZ@dj3ntoo/mbox/"},{"id":147186,"url":"https://patchwork.plctlab.org/api/1.2/patches/147186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpyPBkF-3hj2DiBLPm0TTP8R9RmyPqMEYjmk10MFp3qoQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T02:43:45","name":"[RISC-V] : Re: cpymem for RISCV with v extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpyPBkF-3hj2DiBLPm0TTP8R9RmyPqMEYjmk10MFp3qoQ@mail.gmail.com/mbox/"},{"id":147193,"url":"https://patchwork.plctlab.org/api/1.2/patches/147193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkdhpmpn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T06:23:00","name":"[pushed] Fix profiledbootstrap poly_int fallout [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkdhpmpn.fsf@arm.com/mbox/"},{"id":147197,"url":"https://patchwork.plctlab.org/api/1.2/patches/147197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002070154.71161-1-iain@sandoe.co.uk/","msgid":"<20231002070154.71161-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-02T07:01:54","name":"[pushed] testsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002070154.71161-1-iain@sandoe.co.uk/mbox/"},{"id":147202,"url":"https://patchwork.plctlab.org/api/1.2/patches/147202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17789-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:41:14","name":"[1/3] middle-end: Refactor vectorizer loop conditionals and separate out IV to new variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17789-tamar@arm.com/mbox/"},{"id":147204,"url":"https://patchwork.plctlab.org/api/1.2/patches/147204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0Q7ovA3FweWk4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:41:55","name":"[2/3] middle-end: updated niters analysis to handle multiple exits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0Q7ovA3FweWk4@arm.com/mbox/"},{"id":147205,"url":"https://patchwork.plctlab.org/api/1.2/patches/147205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0VD9Z6w4st7GM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:42:12","name":"[3/3] middle-end: maintain LCSSA throughout loop peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0VD9Z6w4st7GM@arm.com/mbox/"},{"id":147206,"url":"https://patchwork.plctlab.org/api/1.2/patches/147206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002080244.105205-1-kito.cheng@sifive.com/","msgid":"<20231002080244.105205-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-02T08:02:44","name":"options: Prevent multidimensional arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002080244.105205-1-kito.cheng@sifive.com/mbox/"},{"id":147256,"url":"https://patchwork.plctlab.org/api/1.2/patches/147256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002120545.1524306-1-slyich@gmail.com/","msgid":"<20231002120545.1524306-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-02T12:05:45","name":"Makefile.tpl: disable -Werror for feedback stage [PR111663]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002120545.1524306-1-slyich@gmail.com/mbox/"},{"id":147275,"url":"https://patchwork.plctlab.org/api/1.2/patches/147275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17792-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T12:38:53","name":"middle-end: Recursively check is_trivially_copyable_or_pair in vec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17792-tamar@arm.com/mbox/"},{"id":147370,"url":"https://patchwork.plctlab.org/api/1.2/patches/147370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163308.4034749-1-dmalcolm@redhat.com/","msgid":"<20231002163308.4034749-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:08","name":"[pushed] diagnostics: fix missing init of set_locations_cb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163308.4034749-1-dmalcolm@redhat.com/mbox/"},{"id":147372,"url":"https://patchwork.plctlab.org/api/1.2/patches/147372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163315.4034790-1-dmalcolm@redhat.com/","msgid":"<20231002163315.4034790-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:15","name":"[pushed] diagnostics: group together source printing fields of diagnostic_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163315.4034790-1-dmalcolm@redhat.com/mbox/"},{"id":147371,"url":"https://patchwork.plctlab.org/api/1.2/patches/147371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163319.4034817-1-dmalcolm@redhat.com/","msgid":"<20231002163319.4034817-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:19","name":"[pushed] diagnostics: add diagnostic_output_format class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163319.4034817-1-dmalcolm@redhat.com/mbox/"},{"id":147420,"url":"https://patchwork.plctlab.org/api/1.2/patches/147420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002182429.87779-1-iain@sandoe.co.uk/","msgid":"<20231002182429.87779-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-02T18:24:29","name":"[pushed] contrib: Update Darwin entries in config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002182429.87779-1-iain@sandoe.co.uk/mbox/"},{"id":147440,"url":"https://patchwork.plctlab.org/api/1.2/patches/147440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002193738.3900509-1-ppalka@redhat.com/","msgid":"<20231002193738.3900509-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-02T19:37:38","name":"c++: merge tsubst_copy into tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002193738.3900509-1-ppalka@redhat.com/mbox/"},{"id":147462,"url":"https://patchwork.plctlab.org/api/1.2/patches/147462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsqv4QBkKMm-FN8@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:40:31","name":"[committed] Increase timeout factor for hppa*-*-* in gcc.dg/long_branch.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsqv4QBkKMm-FN8@mx3210.localdomain/mbox/"},{"id":147463,"url":"https://patchwork.plctlab.org/api/1.2/patches/147463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrTLV0PNuDW7Jl@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:42:52","name":"[committed] Require target lra in gcc.dg/pr108095.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrTLV0PNuDW7Jl@mx3210.localdomain/mbox/"},{"id":147465,"url":"https://patchwork.plctlab.org/api/1.2/patches/147465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrzoAdPY_HsVnj@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:45:02","name":"[committed] Add hppa*-*-* to dg-error targets at line 5 in gfortran.dg/pr95690.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrzoAdPY_HsVnj@mx3210.localdomain/mbox/"},{"id":147529,"url":"https://patchwork.plctlab.org/api/1.2/patches/147529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002222344.2714786-1-lhyatt@gmail.com/","msgid":"<20231002222344.2714786-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-10-02T22:23:44","name":"libcpp: testsuite: Add test for fixed _Pragma bug [PR82335]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002222344.2714786-1-lhyatt@gmail.com/mbox/"},{"id":147596,"url":"https://patchwork.plctlab.org/api/1.2/patches/147596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003022724.2875-1-kito.cheng@sifive.com/","msgid":"<20231003022724.2875-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T02:27:24","name":"RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003022724.2875-1-kito.cheng@sifive.com/mbox/"},{"id":147601,"url":"https://patchwork.plctlab.org/api/1.2/patches/147601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003034619.15383-1-xry111@xry111.site/","msgid":"<20231003034619.15383-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-03T03:46:03","name":"LoongArch: Replace UNSPEC_FCOPYSIGN with copysign RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003034619.15383-1-xry111@xry111.site/mbox/"},{"id":147764,"url":"https://patchwork.plctlab.org/api/1.2/patches/147764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-2-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:31","name":"[v1,1/4] options: Define TARGET__P and TARGET__OPTS_P macro for Mask and InverseMask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-2-kito.cheng@sifive.com/mbox/"},{"id":147765,"url":"https://patchwork.plctlab.org/api/1.2/patches/147765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-3-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:32","name":"[v1,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-3-kito.cheng@sifive.com/mbox/"},{"id":147771,"url":"https://patchwork.plctlab.org/api/1.2/patches/147771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-4-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:33","name":"[v1,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-4-kito.cheng@sifive.com/mbox/"},{"id":147766,"url":"https://patchwork.plctlab.org/api/1.2/patches/147766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-5-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:34","name":"[v1,4/4] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-5-kito.cheng@sifive.com/mbox/"},{"id":147796,"url":"https://patchwork.plctlab.org/api/1.2/patches/147796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a06f5460-e3fa-4788-9a9d-e41b7c711890@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-03T09:42:41","name":"[GCC] aarch64: Enable Cortex-X4 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a06f5460-e3fa-4788-9a9d-e41b7c711890@arm.com/mbox/"},{"id":147847,"url":"https://patchwork.plctlab.org/api/1.2/patches/147847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003114532.2285429-1-manolis.tsamis@vrull.eu/","msgid":"<20231003114532.2285429-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-10-03T11:45:32","name":"[v6] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003114532.2285429-1-manolis.tsamis@vrull.eu/mbox/"},{"id":147849,"url":"https://patchwork.plctlab.org/api/1.2/patches/147849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edibkj6n.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-03T12:02:40","name":"contrib/mklog.py: Fix issues reported by flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edibkj6n.fsf@suse.cz/mbox/"},{"id":147896,"url":"https://patchwork.plctlab.org/api/1.2/patches/147896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003134455.4176066-1-dmalcolm@redhat.com/","msgid":"<20231003134455.4176066-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-03T13:44:54","name":"[pushed] diagnostics: add ctors to text_info; add m_ prefixes to fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003134455.4176066-1-dmalcolm@redhat.com/mbox/"},{"id":147902,"url":"https://patchwork.plctlab.org/api/1.2/patches/147902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com/","msgid":"<785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-10-03T14:07:25","name":"ira: Scale save/restore costs of callee save registers with block frequency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com/mbox/"},{"id":147910,"url":"https://patchwork.plctlab.org/api/1.2/patches/147910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ff7d585-b793-a586-efe5-27874242742f@redhat.com/","msgid":"<6ff7d585-b793-a586-efe5-27874242742f@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:31:33","name":"[COMMITTED] Return TRUE only when a global value is updated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ff7d585-b793-a586-efe5-27874242742f@redhat.com/mbox/"},{"id":147911,"url":"https://patchwork.plctlab.org/api/1.2/patches/147911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com/","msgid":"<248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:32:01","name":"[COMMITTED] Remove pass counting in VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com/mbox/"},{"id":148303,"url":"https://patchwork.plctlab.org/api/1.2/patches/148303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004124718.3237337-1-jwakely@redhat.com/","msgid":"<20231004124718.3237337-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:45:57","name":"wwwdocs: Add ADL to C++ non-bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004124718.3237337-1-jwakely@redhat.com/mbox/"},{"id":147959,"url":"https://patchwork.plctlab.org/api/1.2/patches/147959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-2-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:32","name":"[1/6] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-2-victor.donascimento@arm.com/mbox/"},{"id":147957,"url":"https://patchwork.plctlab.org/api/1.2/patches/147957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-3-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:33","name":"[2/6] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-3-victor.donascimento@arm.com/mbox/"},{"id":147960,"url":"https://patchwork.plctlab.org/api/1.2/patches/147960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-4-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:34","name":"[3/6] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-4-victor.donascimento@arm.com/mbox/"},{"id":147956,"url":"https://patchwork.plctlab.org/api/1.2/patches/147956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-5-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:35","name":"[4/6] aarch64: Add basic target_print_operand support for CONST_STRING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-5-victor.donascimento@arm.com/mbox/"},{"id":147958,"url":"https://patchwork.plctlab.org/api/1.2/patches/147958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-6-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:36","name":"[5/6] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-6-victor.donascimento@arm.com/mbox/"},{"id":147955,"url":"https://patchwork.plctlab.org/api/1.2/patches/147955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-7-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:37","name":"[6/6] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-7-victor.donascimento@arm.com/mbox/"},{"id":148006,"url":"https://patchwork.plctlab.org/api/1.2/patches/148006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003164812.13294-1-dmalcolm@redhat.com/","msgid":"<20231003164812.13294-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-03T16:48:12","name":"c++: print source code in print_instantiation_partial_context_line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003164812.13294-1-dmalcolm@redhat.com/mbox/"},{"id":148008,"url":"https://patchwork.plctlab.org/api/1.2/patches/148008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1gjiqgj.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:08:28","name":"[committed] ipa-modref: Fix dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1gjiqgj.fsf@suse.cz/mbox/"},{"id":148022,"url":"https://patchwork.plctlab.org/api/1.2/patches/148022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-2-tromey@adacore.com/","msgid":"<20231003171851.1161340-2-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-03T17:18:50","name":"[1/2] libstdc++: Define _versioned_namespace in xmethods.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-2-tromey@adacore.com/mbox/"},{"id":148010,"url":"https://patchwork.plctlab.org/api/1.2/patches/148010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-3-tromey@adacore.com/","msgid":"<20231003171851.1161340-3-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-03T17:18:51","name":"[2/2] libstdc++: _versioned_namespace is always non-None","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-3-tromey@adacore.com/mbox/"},{"id":148015,"url":"https://patchwork.plctlab.org/api/1.2/patches/148015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxRdeneRzguiH9R@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:37:57","name":"match.pd: Fix up a ? cst1 : cst2 regression on signed bool [PR111668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxRdeneRzguiH9R@tucnak/mbox/"},{"id":148016,"url":"https://patchwork.plctlab.org/api/1.2/patches/148016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxT3SAIdOD6/VGB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:48:13","name":"match.pd: Avoid other build_nonstandard_integer_type calls [PR111369]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxT3SAIdOD6/VGB@tucnak/mbox/"},{"id":148031,"url":"https://patchwork.plctlab.org/api/1.2/patches/148031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003190414.23822-1-bshanks@codeweavers.com/","msgid":"<20231003190414.23822-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-10-03T18:58:14","name":"[v2] libiberty: Use posix_spawn in pex-unix when available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003190414.23822-1-bshanks@codeweavers.com/mbox/"},{"id":148052,"url":"https://patchwork.plctlab.org/api/1.2/patches/148052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003201945.907116-1-patrick@rivosinc.com/","msgid":"<20231003201945.907116-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T20:19:45","name":"RISC-V: Unescape chars in pr111566.f90 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003201945.907116-1-patrick@rivosinc.com/mbox/"},{"id":148059,"url":"https://patchwork.plctlab.org/api/1.2/patches/148059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003210916.1027930-1-jason@redhat.com/","msgid":"<20231003210916.1027930-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-03T21:09:16","name":"[v2,RFA] diagnostic: add permerror variants with opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003210916.1027930-1-jason@redhat.com/mbox/"},{"id":148061,"url":"https://patchwork.plctlab.org/api/1.2/patches/148061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com/","msgid":"<0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com>","list_archive_url":null,"date":"2023-10-03T21:17:21","name":"[COMMITTED] Don'\''t use range_info_get_range for pointers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com/mbox/"},{"id":148075,"url":"https://patchwork.plctlab.org/api/1.2/patches/148075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-2-patrick@rivosinc.com/","msgid":"<20231003222700.909771-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:26:58","name":"[RFC,gcc13,backport,1/3] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-2-patrick@rivosinc.com/mbox/"},{"id":148074,"url":"https://patchwork.plctlab.org/api/1.2/patches/148074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-3-patrick@rivosinc.com/","msgid":"<20231003222700.909771-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:26:59","name":"[RFC,gcc13,backport,2/3] RISC-V: Specify -mabi for ztso testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-3-patrick@rivosinc.com/mbox/"},{"id":148073,"url":"https://patchwork.plctlab.org/api/1.2/patches/148073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-4-patrick@rivosinc.com/","msgid":"<20231003222700.909771-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:27:00","name":"[RFC,gcc13,backport,3/3,RISCV,committed] Remove spurious newline in ztso sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-4-patrick@rivosinc.com/mbox/"},{"id":148147,"url":"https://patchwork.plctlab.org/api/1.2/patches/148147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004025538.489F220439@pchp3.se.axis.com/","msgid":"<20231004025538.489F220439@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T02:55:38","name":"[1/2] testsuite: Add dg-require-atomic-exchange non-atomic code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004025538.489F220439@pchp3.se.axis.com/mbox/"},{"id":148150,"url":"https://patchwork.plctlab.org/api/1.2/patches/148150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004031136.8B8BA2042A@pchp3.se.axis.com/","msgid":"<20231004031136.8B8BA2042A@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T03:11:36","name":"[2/2] testsuite: Replace many dg-require-thread-fence with dg-require-atomic-exchange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004031136.8B8BA2042A@pchp3.se.axis.com/mbox/"},{"id":148167,"url":"https://patchwork.plctlab.org/api/1.2/patches/148167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004074906.15805-1-cooper.qu@linux.alibaba.com/","msgid":"<20231004074906.15805-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-10-04T07:49:06","name":"RISC-V: THead: Fix missing CFI directives for th.sdd in prologue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004074906.15805-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":148200,"url":"https://patchwork.plctlab.org/api/1.2/patches/148200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004092406.2F51A38618BF@sourceware.org/","msgid":"<20231004092406.2F51A38618BF@sourceware.org>","list_archive_url":null,"date":"2023-10-04T09:23:28","name":"ipa/111643 - clarify flatten attribute documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004092406.2F51A38618BF@sourceware.org/mbox/"},{"id":148218,"url":"https://patchwork.plctlab.org/api/1.2/patches/148218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMm2O=bSQBen=Mn7QdPKQEcJwRMs3MV8+wMuR7hvBr5n-w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-04T10:16:14","name":"PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMm2O=bSQBen=Mn7QdPKQEcJwRMs3MV8+wMuR7hvBr5n-w@mail.gmail.com/mbox/"},{"id":148227,"url":"https://patchwork.plctlab.org/api/1.2/patches/148227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com/","msgid":"<1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com>","list_archive_url":null,"date":"2023-10-04T11:08:15","name":"libgomp.texi: Clarify that no other OpenMP context selectors are implemented","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com/mbox/"},{"id":148239,"url":"https://patchwork.plctlab.org/api/1.2/patches/148239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004112855.3297083-1-jwakely@redhat.com/","msgid":"<20231004112855.3297083-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-04T11:28:36","name":"[committed,gcc-11] libstdc++: Fix testsuite failures with -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004112855.3297083-1-jwakely@redhat.com/mbox/"},{"id":148286,"url":"https://patchwork.plctlab.org/api/1.2/patches/148286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-2-j@lambda.is/","msgid":"<20231004123921.634024-2-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:01","name":"[01/22] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-2-j@lambda.is/mbox/"},{"id":148279,"url":"https://patchwork.plctlab.org/api/1.2/patches/148279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-3-j@lambda.is/","msgid":"<20231004123921.634024-3-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:02","name":"[02/22] Add \"Condition coverage profiling\" term to --help","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-3-j@lambda.is/mbox/"},{"id":148280,"url":"https://patchwork.plctlab.org/api/1.2/patches/148280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-4-j@lambda.is/","msgid":"<20231004123921.634024-4-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:03","name":"[03/22] Mention relevant flags in condition coverage docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-4-j@lambda.is/mbox/"},{"id":148282,"url":"https://patchwork.plctlab.org/api/1.2/patches/148282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-5-j@lambda.is/","msgid":"<20231004123921.634024-5-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:04","name":"[04/22] Describe, remove ATTRIBUTE_UNUSED from tag_conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-5-j@lambda.is/mbox/"},{"id":148281,"url":"https://patchwork.plctlab.org/api/1.2/patches/148281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-6-j@lambda.is/","msgid":"<20231004123921.634024-6-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:05","name":"[05/22] Describe condition_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-6-j@lambda.is/mbox/"},{"id":148283,"url":"https://patchwork.plctlab.org/api/1.2/patches/148283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-7-j@lambda.is/","msgid":"<20231004123921.634024-7-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:06","name":"[06/22] Use popcount_hwi rather than builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-7-j@lambda.is/mbox/"},{"id":148288,"url":"https://patchwork.plctlab.org/api/1.2/patches/148288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-8-j@lambda.is/","msgid":"<20231004123921.634024-8-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:07","name":"[07/22] Describe add_condition_counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-8-j@lambda.is/mbox/"},{"id":148293,"url":"https://patchwork.plctlab.org/api/1.2/patches/148293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-9-j@lambda.is/","msgid":"<20231004123921.634024-9-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:08","name":"[08/22] Describe output_conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-9-j@lambda.is/mbox/"},{"id":148297,"url":"https://patchwork.plctlab.org/api/1.2/patches/148297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-10-j@lambda.is/","msgid":"<20231004123921.634024-10-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:09","name":"[09/22] Find reachable conditions unbounded by dominators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-10-j@lambda.is/mbox/"},{"id":148284,"url":"https://patchwork.plctlab.org/api/1.2/patches/148284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-11-j@lambda.is/","msgid":"<20231004123921.634024-11-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:10","name":"[10/22] Prune search for boolean expr on goto, return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-11-j@lambda.is/mbox/"},{"id":148299,"url":"https://patchwork.plctlab.org/api/1.2/patches/148299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-12-j@lambda.is/","msgid":"<20231004123921.634024-12-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:11","name":"[11/22] Add test case showing cross-decision fusing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-12-j@lambda.is/mbox/"},{"id":148289,"url":"https://patchwork.plctlab.org/api/1.2/patches/148289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-13-j@lambda.is/","msgid":"<20231004123921.634024-13-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:12","name":"[12/22] Do two-phase filtering in expr isolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-13-j@lambda.is/mbox/"},{"id":148295,"url":"https://patchwork.plctlab.org/api/1.2/patches/148295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-14-j@lambda.is/","msgid":"<20231004123921.634024-14-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:13","name":"[13/22] Handle split-outcome with intrusive flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-14-j@lambda.is/mbox/"},{"id":148298,"url":"https://patchwork.plctlab.org/api/1.2/patches/148298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-15-j@lambda.is/","msgid":"<20231004123921.634024-15-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:14","name":"[14/22] Unify expression candidate set refinement logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-15-j@lambda.is/mbox/"},{"id":148287,"url":"https://patchwork.plctlab.org/api/1.2/patches/148287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-16-j@lambda.is/","msgid":"<20231004123921.634024-16-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:15","name":"[15/22] Fix candidate, neighborhood set reduction phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-16-j@lambda.is/mbox/"},{"id":148285,"url":"https://patchwork.plctlab.org/api/1.2/patches/148285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-17-j@lambda.is/","msgid":"<20231004123921.634024-17-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:16","name":"[16/22] Rename pathological -> setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-17-j@lambda.is/mbox/"},{"id":148301,"url":"https://patchwork.plctlab.org/api/1.2/patches/148301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-18-j@lambda.is/","msgid":"<20231004123921.634024-18-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:17","name":"[17/22] Mark contracted-past nodes in reachable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-18-j@lambda.is/mbox/"},{"id":148290,"url":"https://patchwork.plctlab.org/api/1.2/patches/148290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-19-j@lambda.is/","msgid":"<20231004123921.634024-19-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:18","name":"[18/22] Don'\''t contract into random edge in multi-succ node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-19-j@lambda.is/mbox/"},{"id":148294,"url":"https://patchwork.plctlab.org/api/1.2/patches/148294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-20-j@lambda.is/","msgid":"<20231004123921.634024-20-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:19","name":"[19/22] Beautify assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-20-j@lambda.is/mbox/"},{"id":148296,"url":"https://patchwork.plctlab.org/api/1.2/patches/148296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-21-j@lambda.is/","msgid":"<20231004123921.634024-21-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:20","name":"[20/22] Don'\''t try to reduce NG from dominators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-21-j@lambda.is/mbox/"},{"id":148302,"url":"https://patchwork.plctlab.org/api/1.2/patches/148302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-22-j@lambda.is/","msgid":"<20231004123921.634024-22-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:21","name":"[21/22] Walk the cfg in topological order, not depth-first","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-22-j@lambda.is/mbox/"},{"id":148300,"url":"https://patchwork.plctlab.org/api/1.2/patches/148300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-23-j@lambda.is/","msgid":"<20231004123921.634024-23-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:22","name":"[22/22] Return value on separate line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-23-j@lambda.is/mbox/"},{"id":148355,"url":"https://patchwork.plctlab.org/api/1.2/patches/148355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004150115.221636-1-juzhe.zhong@rivai.ai/","msgid":"<20231004150115.221636-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-04T15:01:15","name":"RISC-V: Remove @ of vec_series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004150115.221636-1-juzhe.zhong@rivai.ai/mbox/"},{"id":148404,"url":"https://patchwork.plctlab.org/api/1.2/patches/148404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004151005.1676194-1-tromey@adacore.com/","msgid":"<20231004151005.1676194-1-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T15:10:05","name":"libstdc++: Correctly call _string_types function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004151005.1676194-1-tromey@adacore.com/mbox/"},{"id":148428,"url":"https://patchwork.plctlab.org/api/1.2/patches/148428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-2-tromey@adacore.com/","msgid":"<20231004165832.1750191-2-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T16:58:31","name":"[RFC,1/2] libstdc++: Use '\''black'\'' and '\''isort'\'' in pretty printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-2-tromey@adacore.com/mbox/"},{"id":148424,"url":"https://patchwork.plctlab.org/api/1.2/patches/148424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-3-tromey@adacore.com/","msgid":"<20231004165832.1750191-3-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T16:58:32","name":"[RFC,2/2] libstdc++: Add flake8 configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-3-tromey@adacore.com/mbox/"},{"id":148526,"url":"https://patchwork.plctlab.org/api/1.2/patches/148526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170455.76C1A2043D@pchp3.se.axis.com/","msgid":"<20231004170455.76C1A2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T17:04:55","name":"[v2,1/2] testsuite: Add dg-require-atomic-cmpxchg-word","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170455.76C1A2043D@pchp3.se.axis.com/mbox/"},{"id":148465,"url":"https://patchwork.plctlab.org/api/1.2/patches/148465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170816.CAD8D20424@pchp3.se.axis.com/","msgid":"<20231004170816.CAD8D20424@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T17:08:16","name":"[v2,2/2] testsuite: Replace many dg-require-thread-fence with dg-require-atomic-cmpxchg-word","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170816.CAD8D20424@pchp3.se.axis.com/mbox/"},{"id":148448,"url":"https://patchwork.plctlab.org/api/1.2/patches/148448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004183004.29161-1-bshanks@codeweavers.com/","msgid":"<20231004183004.29161-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-10-04T18:28:28","name":"[v3] libiberty: Use posix_spawn in pex-unix when available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004183004.29161-1-bshanks@codeweavers.com/mbox/"},{"id":148568,"url":"https://patchwork.plctlab.org/api/1.2/patches/148568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004192318.769779-1-ppalka@redhat.com/","msgid":"<20231004192318.769779-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-04T19:23:18","name":"[2/1] c++: rename tsubst_copy_and_build and tsubst_expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004192318.769779-1-ppalka@redhat.com/mbox/"},{"id":148585,"url":"https://patchwork.plctlab.org/api/1.2/patches/148585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004215742.929536-1-patrick@rivosinc.com/","msgid":"<20231004215742.929536-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-04T21:57:42","name":"RISC-V: xfail gcc.dg/pr90263.c for riscv_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004215742.929536-1-patrick@rivosinc.com/mbox/"},{"id":148605,"url":"https://patchwork.plctlab.org/api/1.2/patches/148605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com/","msgid":"<012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-04T22:19:33","name":"Support g++ 4.8 as a host compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com/mbox/"},{"id":148641,"url":"https://patchwork.plctlab.org/api/1.2/patches/148641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004225527.930610-1-patrick@rivosinc.com/","msgid":"<20231004225527.930610-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-04T22:55:27","name":"[v2] RISC-V: Test memcpy inlined on riscv_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004225527.930610-1-patrick@rivosinc.com/mbox/"},{"id":148672,"url":"https://patchwork.plctlab.org/api/1.2/patches/148672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-1-guojiufu@linux.ibm.com/","msgid":"<20231005041346.3625108-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T04:13:45","name":"[V5,1/2] rs6000: optimize moving to sf from highpart di","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-1-guojiufu@linux.ibm.com/mbox/"},{"id":148671,"url":"https://patchwork.plctlab.org/api/1.2/patches/148671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-2-guojiufu@linux.ibm.com/","msgid":"<20231005041346.3625108-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T04:13:46","name":"[V5,2/2] rs6000: use mtvsrws to move sf from si p9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-2-guojiufu@linux.ibm.com/mbox/"},{"id":148673,"url":"https://patchwork.plctlab.org/api/1.2/patches/148673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005064628.458478-1-stefansf@linux.ibm.com/","msgid":"<20231005064628.458478-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T06:46:28","name":"s390: Make use of new copysign RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005064628.458478-1-stefansf@linux.ibm.com/mbox/"},{"id":148674,"url":"https://patchwork.plctlab.org/api/1.2/patches/148674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005082559.8C3A83857C66@sourceware.org/","msgid":"<20231005082559.8C3A83857C66@sourceware.org>","list_archive_url":null,"date":"2023-10-05T08:25:06","name":"Avoid left around copies when value-numbering BBs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005082559.8C3A83857C66@sourceware.org/mbox/"},{"id":148676,"url":"https://patchwork.plctlab.org/api/1.2/patches/148676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com/","msgid":"<00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-05T09:06:33","name":"[X86] Split lea into shorter left shift by 2 or 3 bits with -Oz.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com/mbox/"},{"id":148677,"url":"https://patchwork.plctlab.org/api/1.2/patches/148677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005113731.454013856DD0@sourceware.org/","msgid":"<20231005113731.454013856DD0@sourceware.org>","list_archive_url":null,"date":"2023-10-05T11:37:06","name":"Fix SIMD call SLP discovery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005113731.454013856DD0@sourceware.org/mbox/"},{"id":148678,"url":"https://patchwork.plctlab.org/api/1.2/patches/148678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-1-claziss@gmail.com/","msgid":"<20231005114345.1707504-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:41","name":"[committed,1/5] arc: Remove unused/incomplete alignment assembly annotation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-1-claziss@gmail.com/mbox/"},{"id":148679,"url":"https://patchwork.plctlab.org/api/1.2/patches/148679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-2-claziss@gmail.com/","msgid":"<20231005114345.1707504-2-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:42","name":"[committed,2/5] arc: Update/remove ARC specific tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-2-claziss@gmail.com/mbox/"},{"id":148680,"url":"https://patchwork.plctlab.org/api/1.2/patches/148680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-3-claziss@gmail.com/","msgid":"<20231005114345.1707504-3-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:43","name":"[committed,3/5] arc: Remove '\''^'\'' print punct character","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-3-claziss@gmail.com/mbox/"},{"id":148682,"url":"https://patchwork.plctlab.org/api/1.2/patches/148682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-4-claziss@gmail.com/","msgid":"<20231005114345.1707504-4-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:44","name":"[committed,4/5] arc: Remove obsolete ccfsm instruction predication mechanism","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-4-claziss@gmail.com/mbox/"},{"id":148681,"url":"https://patchwork.plctlab.org/api/1.2/patches/148681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-5-claziss@gmail.com/","msgid":"<20231005114345.1707504-5-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:45","name":"[committed,5/5] arc: Update tests predicates when using linux toolchain.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-5-claziss@gmail.com/mbox/"},{"id":148683,"url":"https://patchwork.plctlab.org/api/1.2/patches/148683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005115500.9B1F333EA4@hamza.pair.com/","msgid":"<20231005115500.9B1F333EA4@hamza.pair.com>","list_archive_url":null,"date":"2023-10-05T11:54:58","name":"[pushed] wwwdocs: conduct: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005115500.9B1F333EA4@hamza.pair.com/mbox/"},{"id":148684,"url":"https://patchwork.plctlab.org/api/1.2/patches/148684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edi9i8jw.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T11:59:47","name":"Revert \"ipa: Self-DCE of uses of removed call LHSs (PR 108007)\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edi9i8jw.fsf@suse.cz/mbox/"},{"id":148685,"url":"https://patchwork.plctlab.org/api/1.2/patches/148685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f78f2739548afede5888c2b9f91b82eb2f151e93.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[1/3] ipa-cp: Templatize filtering of m_agg_values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f78f2739548afede5888c2b9f91b82eb2f151e93.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148687,"url":"https://patchwork.plctlab.org/api/1.2/patches/148687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5e5ac1cac6611bdf4873011582c63347ee62fe1.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[2/3] ipa: Prune any IPA-CP aggregate constants known by modref to be killed (111157)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5e5ac1cac6611bdf4873011582c63347ee62fe1.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148686,"url":"https://patchwork.plctlab.org/api/1.2/patches/148686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dce484200c834821ecf57f8fe1b4610e8e64b841.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[3/3] ipa: Limit pruning of IPA-CP aggregate constants if there are loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dce484200c834821ecf57f8fe1b4610e8e64b841.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148688,"url":"https://patchwork.plctlab.org/api/1.2/patches/148688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6rbAKYvtP+kIzu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:26:20","name":"ipa: Remove ipa_bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6rbAKYvtP+kIzu@tucnak/mbox/"},{"id":148689,"url":"https://patchwork.plctlab.org/api/1.2/patches/148689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6sokqvC68SZNrT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:31:30","name":"[committed] sreal: Fix typo in function name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6sokqvC68SZNrT@tucnak/mbox/"},{"id":148691,"url":"https://patchwork.plctlab.org/api/1.2/patches/148691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de/","msgid":"<8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de>","list_archive_url":null,"date":"2023-10-05T13:05:49","name":"[avr,committed] Use monic denominator polynomials to save a multiplication.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de/mbox/"},{"id":148692,"url":"https://patchwork.plctlab.org/api/1.2/patches/148692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR62FFoMl3B8i88F@nz/","msgid":"","list_archive_url":null,"date":"2023-10-05T13:11:48","name":"[v4] ipa-utils: avoid uninitialized probabilities on ICF [PR111559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR62FFoMl3B8i88F@nz/mbox/"},{"id":148693,"url":"https://patchwork.plctlab.org/api/1.2/patches/148693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de/","msgid":"<8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de>","list_archive_url":null,"date":"2023-10-05T13:29:48","name":"[avr,committed] Remove all uses of attribute pure from LibF7.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de/mbox/"},{"id":148716,"url":"https://patchwork.plctlab.org/api/1.2/patches/148716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005141023.1835802-1-j@lambda.is/","msgid":"<20231005141023.1835802-1-j@lambda.is>","list_archive_url":null,"date":"2023-10-05T14:10:23","name":"[v5] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005141023.1835802-1-j@lambda.is/mbox/"},{"id":148799,"url":"https://patchwork.plctlab.org/api/1.2/patches/148799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR7SBqJieJmTt5PG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T15:11:02","name":"[RFC] > WIDE_INT_MAX_PREC support in wide_int and widest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR7SBqJieJmTt5PG@tucnak/mbox/"},{"id":148813,"url":"https://patchwork.plctlab.org/api/1.2/patches/148813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bZgF-8HFxiU18ouCv7SCgSkks2XP2xnwiz=h+WB8AmvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T15:45:34","name":"[COMMITTED] i386: Improve memory copy from named address space [PR111657]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bZgF-8HFxiU18ouCv7SCgSkks2XP2xnwiz=h+WB8AmvQ@mail.gmail.com/mbox/"},{"id":148815,"url":"https://patchwork.plctlab.org/api/1.2/patches/148815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005154745.2663497-1-andrea.corallo@arm.com/","msgid":"<20231005154745.2663497-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-10-05T15:47:45","name":"[committed] contrib: add mdcompact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005154745.2663497-1-andrea.corallo@arm.com/mbox/"},{"id":148852,"url":"https://patchwork.plctlab.org/api/1.2/patches/148852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-2-siddhesh@gotplt.org/","msgid":"<20231005160516.13565-2-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-10-05T16:05:15","name":"[committed,1/2] secpol: add grammatically missing commas / remove one excess instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-2-siddhesh@gotplt.org/mbox/"},{"id":148854,"url":"https://patchwork.plctlab.org/api/1.2/patches/148854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-3-siddhesh@gotplt.org/","msgid":"<20231005160516.13565-3-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-10-05T16:05:16","name":"[committed,2/2] secpol: consistent indentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-3-siddhesh@gotplt.org/mbox/"},{"id":148976,"url":"https://patchwork.plctlab.org/api/1.2/patches/148976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com/","msgid":"<1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com>","list_archive_url":null,"date":"2023-10-05T17:03:36","name":"[_GLIBCXX_INLINE_VERSION] Add missing symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com/mbox/"},{"id":148958,"url":"https://patchwork.plctlab.org/api/1.2/patches/148958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com/","msgid":"<024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com>","list_archive_url":null,"date":"2023-10-05T17:34:03","name":"libgomp.texi: Document some of the device-memory routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com/mbox/"},{"id":148973,"url":"https://patchwork.plctlab.org/api/1.2/patches/148973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17810-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:20:03","name":"middle-end ifcvt: Allow any const IFN in conditional blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17810-tamar@arm.com/mbox/"},{"id":148974,"url":"https://patchwork.plctlab.org/api/1.2/patches/148974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17811-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:20:43","name":"AArch64 Handle copysign (x, -1) expansion efficiently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17811-tamar@arm.com/mbox/"},{"id":148977,"url":"https://patchwork.plctlab.org/api/1.2/patches/148977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17809-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:21:21","name":"middle-end ifcvt: Add support for conditional copysign","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17809-tamar@arm.com/mbox/"},{"id":148978,"url":"https://patchwork.plctlab.org/api/1.2/patches/148978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17812-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:21:55","name":"AArch64 Add SVE implementation for cond_copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17812-tamar@arm.com/mbox/"},{"id":148991,"url":"https://patchwork.plctlab.org/api/1.2/patches/148991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com/","msgid":"<490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com>","list_archive_url":null,"date":"2023-10-05T19:04:37","name":"[COMMITTED,1/3] Add outgoing range vector calculation API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com/mbox/"},{"id":148990,"url":"https://patchwork.plctlab.org/api/1.2/patches/148990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffda943e-6747-240c-8e45-ccbf24bf0783@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T19:04:45","name":"[COMMITTED,2/3] Add a dom based ranger for fast VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffda943e-6747-240c-8e45-ccbf24bf0783@redhat.com/mbox/"},{"id":148992,"url":"https://patchwork.plctlab.org/api/1.2/patches/148992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef20c273-c1a9-f145-6097-305d72bac940@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T19:04:58","name":"[COMMITTED,3/3] Create a fast VRP pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef20c273-c1a9-f145-6097-305d72bac940@redhat.com/mbox/"},{"id":149022,"url":"https://patchwork.plctlab.org/api/1.2/patches/149022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR8ZiMdxwDS6cRJ0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-05T20:16:08","name":"[committed] hppa: Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR8ZiMdxwDS6cRJ0@mx3210.localdomain/mbox/"},{"id":149057,"url":"https://patchwork.plctlab.org/api/1.2/patches/149057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005231446.400239-1-pinskia@gmail.com/","msgid":"<20231005231446.400239-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-05T23:14:46","name":"MATCH: Fix infinite loop between `vec_cond(vec_cond(a, b, 0), c, d)` and `a & b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005231446.400239-1-pinskia@gmail.com/mbox/"},{"id":149063,"url":"https://patchwork.plctlab.org/api/1.2/patches/149063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005234552.954487-1-patrick@rivosinc.com/","msgid":"<20231005234552.954487-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-05T23:45:52","name":"[v2] RISC-V: Use stdint-gcc.h in rvv testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005234552.954487-1-patrick@rivosinc.com/mbox/"},{"id":149087,"url":"https://patchwork.plctlab.org/api/1.2/patches/149087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006023847.428045-1-pan2.li@intel.com/","msgid":"<20231006023847.428045-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-06T02:38:47","name":"[v1] RISC-V: Update comments for FP rounding related autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006023847.428045-1-pan2.li@intel.com/mbox/"},{"id":149145,"url":"https://patchwork.plctlab.org/api/1.2/patches/149145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006074530.465276-2-stefansf@linux.ibm.com/","msgid":"<20231006074530.465276-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-06T07:45:31","name":"combine: Fix handling of unsigned constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006074530.465276-2-stefansf@linux.ibm.com/mbox/"},{"id":149165,"url":"https://patchwork.plctlab.org/api/1.2/patches/149165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-2-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:44","name":"[1/3,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-2-Ezra.Sitorus@arm.com/mbox/"},{"id":149166,"url":"https://patchwork.plctlab.org/api/1.2/patches/149166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-3-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:45","name":"[2/3,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-3-Ezra.Sitorus@arm.com/mbox/"},{"id":149167,"url":"https://patchwork.plctlab.org/api/1.2/patches/149167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-4-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:46","name":"[3/3,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-4-Ezra.Sitorus@arm.com/mbox/"},{"id":149208,"url":"https://patchwork.plctlab.org/api/1.2/patches/149208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-2-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:55:58","name":"[1/3,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-2-Ezra.Sitorus@arm.com/mbox/"},{"id":149209,"url":"https://patchwork.plctlab.org/api/1.2/patches/149209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-3-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:55:59","name":"[2/3,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-3-Ezra.Sitorus@arm.com/mbox/"},{"id":149210,"url":"https://patchwork.plctlab.org/api/1.2/patches/149210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-4-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:56:00","name":"[3/3,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-4-Ezra.Sitorus@arm.com/mbox/"},{"id":149243,"url":"https://patchwork.plctlab.org/api/1.2/patches/149243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com/","msgid":"<8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T13:18:14","name":"[committed] amdgcn: silence warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com/mbox/"},{"id":149270,"url":"https://patchwork.plctlab.org/api/1.2/patches/149270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006140501.3370874-3-arsen@aarsen.me/","msgid":"<20231006140501.3370874-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-10-06T13:50:26","name":"[v2,2/2] *: add modern gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006140501.3370874-3-arsen@aarsen.me/mbox/"},{"id":149271,"url":"https://patchwork.plctlab.org/api/1.2/patches/149271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86070729-25e3-4425-9092-f0f678440825@codesourcery.com/","msgid":"<86070729-25e3-4425-9092-f0f678440825@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T14:11:46","name":"[committed] amdgcn: switch mov insns to compact syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86070729-25e3-4425-9092-f0f678440825@codesourcery.com/mbox/"},{"id":149329,"url":"https://patchwork.plctlab.org/api/1.2/patches/149329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006161555.2222785-1-sandra@codesourcery.com/","msgid":"<20231006161555.2222785-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T16:15:55","name":"[COMMITTED] Docs: Minimally document standard C/C++ attribute syntax.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006161555.2222785-1-sandra@codesourcery.com/mbox/"},{"id":149365,"url":"https://patchwork.plctlab.org/api/1.2/patches/149365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSBGwlLkLAukQYTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-06T17:41:22","name":"[RFC] > WIDE_INT_MAX_PREC support in wide_int and widest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSBGwlLkLAukQYTu@tucnak/mbox/"},{"id":149375,"url":"https://patchwork.plctlab.org/api/1.2/patches/149375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006174954.392381-1-vineetg@rivosinc.com/","msgid":"<20231006174954.392381-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-06T17:49:54","name":"[v2] RISC-V: const: hide mvconst splitter from IRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006174954.392381-1-vineetg@rivosinc.com/mbox/"},{"id":149377,"url":"https://patchwork.plctlab.org/api/1.2/patches/149377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006182250.393162-1-vineetg@rivosinc.com/","msgid":"<20231006182250.393162-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-06T18:22:50","name":"[COMMITTED] RISC-V: const: hide mvconst splitter from IRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006182250.393162-1-vineetg@rivosinc.com/mbox/"},{"id":149435,"url":"https://patchwork.plctlab.org/api/1.2/patches/149435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ab7a8fa-f054-4fbe-9f1c-b94e11b2a38d-1696624686073@3c-app-gmx-bap40/","msgid":"","list_archive_url":null,"date":"2023-10-06T20:38:06","name":"fortran: fix handling of options -ffpe-trap and -ffpe-summary [PR110957]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ab7a8fa-f054-4fbe-9f1c-b94e11b2a38d-1696624686073@3c-app-gmx-bap40/mbox/"},{"id":149489,"url":"https://patchwork.plctlab.org/api/1.2/patches/149489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007031818.793-1-xuli1@eswincomputing.com/","msgid":"<20231007031818.793-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-10-07T03:18:18","name":"RISC-V: Fix scan-assembler-times of RVV test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007031818.793-1-xuli1@eswincomputing.com/mbox/"},{"id":149504,"url":"https://patchwork.plctlab.org/api/1.2/patches/149504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007044943.4153909-1-pan2.li@intel.com/","msgid":"<20231007044943.4153909-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-07T04:49:43","name":"[v1] RISC-V: Bugfix for legitimize address PR/111634","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007044943.4153909-1-pan2.li@intel.com/mbox/"},{"id":149508,"url":"https://patchwork.plctlab.org/api/1.2/patches/149508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007062530.20048-1-pan2.li@intel.com/","msgid":"<20231007062530.20048-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-07T06:25:30","name":"[v1] RISC-V: Add more run test for FP rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007062530.20048-1-pan2.li@intel.com/mbox/"},{"id":149509,"url":"https://patchwork.plctlab.org/api/1.2/patches/149509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007063452.3605029-1-haochen.jiang@intel.com/","msgid":"<20231007063452.3605029-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-07T06:34:52","name":"[v2,01/18] Initial support for -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007063452.3605029-1-haochen.jiang@intel.com/mbox/"},{"id":149511,"url":"https://patchwork.plctlab.org/api/1.2/patches/149511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef21a10b-4b6f-b195-d1df-c2d8c43cce33@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T06:42:50","name":"[v1] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef21a10b-4b6f-b195-d1df-c2d8c43cce33@linux.ibm.com/mbox/"},{"id":149516,"url":"https://patchwork.plctlab.org/api/1.2/patches/149516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007070458.460506-1-juzhe.zhong@rivai.ai/","msgid":"<20231007070458.460506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T07:04:58","name":"RISC-V: Enable more tests of \"vect\" for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007070458.460506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149542,"url":"https://patchwork.plctlab.org/api/1.2/patches/149542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007085012.3852069-3-yangyujie@loongson.cn/","msgid":"<20231007085012.3852069-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-10-07T08:50:14","name":"LoongArch: Adjust makefile dependency for loongarch headers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007085012.3852069-3-yangyujie@loongson.cn/mbox/"},{"id":149543,"url":"https://patchwork.plctlab.org/api/1.2/patches/149543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007092331.2590950-1-juzhe.zhong@rivai.ai/","msgid":"<20231007092331.2590950-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T09:23:31","name":"TEST: Fix XPASS of TSVC testsuites for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007092331.2590950-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149552,"url":"https://patchwork.plctlab.org/api/1.2/patches/149552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007113225.3196037-1-yanzhang.wang@intel.com/","msgid":"<20231007113225.3196037-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-10-07T11:32:25","name":"RISC-V: add static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007113225.3196037-1-yanzhang.wang@intel.com/mbox/"},{"id":149557,"url":"https://patchwork.plctlab.org/api/1.2/patches/149557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007114543.2455622-1-juzhe.zhong@rivai.ai/","msgid":"<20231007114543.2455622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T11:45:43","name":"TEST: Fix vect_cond_arith_* dump checks for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007114543.2455622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149594,"url":"https://patchwork.plctlab.org/api/1.2/patches/149594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ced6c74e-f5ac-4b8e-b702-501596e91a03@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T15:40:10","name":"Fortran/OpenMP: Fix handling of strictly structured blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ced6c74e-f5ac-4b8e-b702-501596e91a03@codesourcery.com/mbox/"},{"id":149638,"url":"https://patchwork.plctlab.org/api/1.2/patches/149638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef0c54a5-c35c-3519-f062-9ac78ee66b81@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T19:04:27","name":"[v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef0c54a5-c35c-3519-f062-9ac78ee66b81@linux.ibm.com/mbox/"},{"id":149666,"url":"https://patchwork.plctlab.org/api/1.2/patches/149666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008013346.2374788-1-juzhe.zhong@rivai.ai/","msgid":"<20231008013346.2374788-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T01:33:46","name":"[V2] TEST: Fix vect_cond_arith_* dump checks for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008013346.2374788-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149670,"url":"https://patchwork.plctlab.org/api/1.2/patches/149670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008015408.2865454-1-hongyu.wang@intel.com/","msgid":"<20231008015408.2865454-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-08T01:54:08","name":"[i386] Fix apx test fails on 32bit target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008015408.2865454-1-hongyu.wang@intel.com/mbox/"},{"id":149675,"url":"https://patchwork.plctlab.org/api/1.2/patches/149675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-1-hongtao.liu@intel.com/","msgid":"<20231008022727.2896829-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-08T02:27:26","name":"[1/2,x86] Support smin/smax for V2HF/V4HF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-1-hongtao.liu@intel.com/mbox/"},{"id":149676,"url":"https://patchwork.plctlab.org/api/1.2/patches/149676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-2-hongtao.liu@intel.com/","msgid":"<20231008022727.2896829-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-08T02:27:27","name":"[2/2] Support signbit/xorsign/copysign/abs/neg/and/xor/ior/andn for V2HF/V4HF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-2-hongtao.liu@intel.com/mbox/"},{"id":149697,"url":"https://patchwork.plctlab.org/api/1.2/patches/149697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008072147.3030011-1-juzhe.zhong@rivai.ai/","msgid":"<20231008072147.3030011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T07:21:47","name":"RISC-V: Support movmisalign of RVV VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008072147.3030011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149707,"url":"https://patchwork.plctlab.org/api/1.2/patches/149707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008082005.3410115-1-juzhe.zhong@rivai.ai/","msgid":"<20231008082005.3410115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T08:20:05","name":"TEST: Fix dump FAIL for RVV (RISCV-V vector)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008082005.3410115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149735,"url":"https://patchwork.plctlab.org/api/1.2/patches/149735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008113531.3905091-1-juzhe.zhong@rivai.ai/","msgid":"<20231008113531.3905091-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T11:35:31","name":"TEST: Fix dump FAIL of vect-multitypes-16.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008113531.3905091-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149736,"url":"https://patchwork.plctlab.org/api/1.2/patches/149736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008120257.4184631-1-juzhe.zhong@rivai.ai/","msgid":"<20231008120257.4184631-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T12:02:57","name":"TEST: Fix dump FAIL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008120257.4184631-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149737,"url":"https://patchwork.plctlab.org/api/1.2/patches/149737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008123106.412529-1-juzhe.zhong@rivai.ai/","msgid":"<20231008123106.412529-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T12:31:06","name":"TEST: Fix XPASS of outer loop vectorization tests for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008123106.412529-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149745,"url":"https://patchwork.plctlab.org/api/1.2/patches/149745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8cddbaa-9a23-41dc-860b-f162f26e94ce@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-08T13:13:02","name":"openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8cddbaa-9a23-41dc-860b-f162f26e94ce@codesourcery.com/mbox/"},{"id":149770,"url":"https://patchwork.plctlab.org/api/1.2/patches/149770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com/","msgid":"<002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-08T19:07:11","name":"[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com/mbox/"},{"id":149779,"url":"https://patchwork.plctlab.org/api/1.2/patches/149779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225837.783598-1-dmalcolm@redhat.com/","msgid":"<20231008225837.783598-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:37","name":"[pushed] diagnostics: fix ICE on sarif output when source file is unreadable [PR111700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225837.783598-1-dmalcolm@redhat.com/mbox/"},{"id":149780,"url":"https://patchwork.plctlab.org/api/1.2/patches/149780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225843.783633-1-dmalcolm@redhat.com/","msgid":"<20231008225843.783633-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:43","name":"[pushed] libcpp: \"const\" and other cleanups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225843.783633-1-dmalcolm@redhat.com/mbox/"},{"id":149781,"url":"https://patchwork.plctlab.org/api/1.2/patches/149781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225848.783654-1-dmalcolm@redhat.com/","msgid":"<20231008225848.783654-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:48","name":"[pushed] libcpp: eliminate COMBINE_LOCATION_DATA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225848.783654-1-dmalcolm@redhat.com/mbox/"},{"id":149784,"url":"https://patchwork.plctlab.org/api/1.2/patches/149784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225854.783706-1-dmalcolm@redhat.com/","msgid":"<20231008225854.783706-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:54","name":"[pushed] analyzer: improvements to out-of-bounds diagrams [PR111155]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225854.783706-1-dmalcolm@redhat.com/mbox/"},{"id":149782,"url":"https://patchwork.plctlab.org/api/1.2/patches/149782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225859.783728-1-dmalcolm@redhat.com/","msgid":"<20231008225859.783728-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:59","name":"[pushed] libcpp: eliminate LINEMAPS_LAST_ALLOCATED{, _ORDINARY, _MACRO}_MAP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225859.783728-1-dmalcolm@redhat.com/mbox/"},{"id":149783,"url":"https://patchwork.plctlab.org/api/1.2/patches/149783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225903.783838-1-dmalcolm@redhat.com/","msgid":"<20231008225903.783838-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:59:03","name":"[pushed] libcpp: eliminate LINEMAPS_{,ORDINARY_,MACRO_}CACHE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225903.783838-1-dmalcolm@redhat.com/mbox/"},{"id":149785,"url":"https://patchwork.plctlab.org/api/1.2/patches/149785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225908.783859-1-dmalcolm@redhat.com/","msgid":"<20231008225908.783859-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:59:08","name":"[pushed] libcpp: eliminate LINEMAPS_{ORDINARY,MACRO}_MAPS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225908.783859-1-dmalcolm@redhat.com/mbox/"},{"id":149804,"url":"https://patchwork.plctlab.org/api/1.2/patches/149804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65235160.170a0220.4cbca.5c7d@mx.google.com/","msgid":"<65235160.170a0220.4cbca.5c7d@mx.google.com>","list_archive_url":null,"date":"2023-10-09T01:03:23","name":"[v4] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65235160.170a0220.4cbca.5c7d@mx.google.com/mbox/"},{"id":149806,"url":"https://patchwork.plctlab.org/api/1.2/patches/149806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009020303.929293-1-hongyu.wang@intel.com/","msgid":"<20231009020303.929293-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-09T02:03:03","name":"[i386] APX EGPR: fix missing pattern that prohibits egpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009020303.929293-1-hongyu.wang@intel.com/mbox/"},{"id":149810,"url":"https://patchwork.plctlab.org/api/1.2/patches/149810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009022928.1499099-1-hongyu.wang@intel.com/","msgid":"<20231009022928.1499099-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-09T02:29:28","name":"[i386] APX EGPR: fix missing pattern that prohibits egpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009022928.1499099-1-hongyu.wang@intel.com/mbox/"},{"id":149811,"url":"https://patchwork.plctlab.org/api/1.2/patches/149811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com/","msgid":"<8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com>","list_archive_url":null,"date":"2023-10-09T02:30:15","name":"[PATCH-1,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com/mbox/"},{"id":149812,"url":"https://patchwork.plctlab.org/api/1.2/patches/149812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa42d6bc-151e-515b-81a6-d08925c047ac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-09T02:30:38","name":"[PATCH-2,rs6000] Enable vector mode for memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa42d6bc-151e-515b-81a6-d08925c047ac@linux.ibm.com/mbox/"},{"id":149878,"url":"https://patchwork.plctlab.org/api/1.2/patches/149878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009085135.2038604-1-pan2.li@intel.com/","msgid":"<20231009085135.2038604-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-09T08:51:35","name":"[v1] RISC-V: Refine bswap16 auto vectorization code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009085135.2038604-1-pan2.li@intel.com/mbox/"},{"id":149920,"url":"https://patchwork.plctlab.org/api/1.2/patches/149920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6523cffe.170a0220.653b.72b9@mx.google.com/","msgid":"<6523cffe.170a0220.653b.72b9@mx.google.com>","list_archive_url":null,"date":"2023-10-09T10:03:36","name":"c++: Improve diagnostics for constexpr cast from void*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6523cffe.170a0220.653b.72b9@mx.google.com/mbox/"},{"id":149944,"url":"https://patchwork.plctlab.org/api/1.2/patches/149944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSPcBmLxejYfgyGq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-09T10:55:02","name":"wide-int: Allow up to 16320 bits wide_int and change widest_int precision to 32640 bits [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSPcBmLxejYfgyGq@tucnak/mbox/"},{"id":149951,"url":"https://patchwork.plctlab.org/api/1.2/patches/149951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009111403.221E8385B53E@sourceware.org/","msgid":"<20231009111403.221E8385B53E@sourceware.org>","list_archive_url":null,"date":"2023-10-09T11:13:38","name":"tree-optimization/111715 - improve TBAA for access paths with pun","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009111403.221E8385B53E@sourceware.org/mbox/"},{"id":149991,"url":"https://patchwork.plctlab.org/api/1.2/patches/149991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009120707.2746-1-juzhe.zhong@rivai.ai/","msgid":"<20231009120707.2746-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T12:07:07","name":"[V2] RISC-V: Support movmisalign of RVV VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009120707.2746-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150036,"url":"https://patchwork.plctlab.org/api/1.2/patches/150036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009122451.8478-1-juzhe.zhong@rivai.ai/","msgid":"<20231009122451.8478-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T12:24:51","name":"RISC-V Regression test: Fix FAIL of fast-math-slp-38.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009122451.8478-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150076,"url":"https://patchwork.plctlab.org/api/1.2/patches/150076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130218.20525-1-juzhe.zhong@rivai.ai/","msgid":"<20231009130218.20525-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:02:18","name":"RISC-V Regression test: Fix FAIL of pr45752.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130218.20525-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150087,"url":"https://patchwork.plctlab.org/api/1.2/patches/150087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130929.2237485-1-pan2.li@intel.com/","msgid":"<20231009130929.2237485-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-09T13:09:29","name":"[v2] RISC-V: Refine bswap16 auto vectorization code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130929.2237485-1-pan2.li@intel.com/mbox/"},{"id":150101,"url":"https://patchwork.plctlab.org/api/1.2/patches/150101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009131530.24496-1-juzhe.zhong@rivai.ai/","msgid":"<20231009131530.24496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:15:30","name":"RISC-V Regression tests: Fix FAIL of pr97832* for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009131530.24496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150102,"url":"https://patchwork.plctlab.org/api/1.2/patches/150102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133508.28747-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133508.28747-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:35:08","name":"RISC-V Regression test: Fix FAIL of slp-12a.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133508.28747-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150104,"url":"https://patchwork.plctlab.org/api/1.2/patches/150104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133707.29265-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133707.29265-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:37:07","name":"RISC-V Regression test: Adapt SLP tests like ARM SVE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133707.29265-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150110,"url":"https://patchwork.plctlab.org/api/1.2/patches/150110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133925.29739-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133925.29739-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:39:25","name":"RISC-V Regression test: Fix slp-perm-4.c FAIL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133925.29739-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150111,"url":"https://patchwork.plctlab.org/api/1.2/patches/150111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009134123.30601-1-juzhe.zhong@rivai.ai/","msgid":"<20231009134123.30601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:41:23","name":"RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009134123.30601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150135,"url":"https://patchwork.plctlab.org/api/1.2/patches/150135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSQVTcoN+gxgCJCF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-09T14:59:25","name":"wide-int: Remove rwide_int, introduce dw_wide_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSQVTcoN+gxgCJCF@tucnak/mbox/"},{"id":150136,"url":"https://patchwork.plctlab.org/api/1.2/patches/150136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009145957.51655-1-juzhe.zhong@rivai.ai/","msgid":"<20231009145957.51655-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T14:59:57","name":"TEST: Add vectorization check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009145957.51655-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150216,"url":"https://patchwork.plctlab.org/api/1.2/patches/150216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com/","msgid":"<05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com>","list_archive_url":null,"date":"2023-10-09T17:10:28","name":"[COMMITTED] Remove unused get_identity_relation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com/mbox/"},{"id":150217,"url":"https://patchwork.plctlab.org/api/1.2/patches/150217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com/","msgid":"<21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com>","list_archive_url":null,"date":"2023-10-09T17:10:35","name":"[COMMITTED] PR tree-optimization/111694 - Ensure float equivalences include + and - zero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com/mbox/"},{"id":150328,"url":"https://patchwork.plctlab.org/api/1.2/patches/150328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009210250.947831-1-ewlu@rivosinc.com/","msgid":"<20231009210250.947831-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-10-09T21:02:09","name":"[RFC] RISC-V: Handle new types in scheduling descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009210250.947831-1-ewlu@rivosinc.com/mbox/"},{"id":150360,"url":"https://patchwork.plctlab.org/api/1.2/patches/150360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009212751.474885-1-pinskia@gmail.com/","msgid":"<20231009212751.474885-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-09T21:27:51","name":"MATCH: [PR111679] Add alternative simplification of `a | ((~a) ^ b)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009212751.474885-1-pinskia@gmail.com/mbox/"},{"id":150369,"url":"https://patchwork.plctlab.org/api/1.2/patches/150369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310092151030.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-10-09T21:52:59","name":"RISC-V/testsuite: Enable `vect_pack_trunc'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310092151030.5892@tpp.orcam.me.uk/mbox/"},{"id":150379,"url":"https://patchwork.plctlab.org/api/1.2/patches/150379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009224711.1105509-1-christoph.muellner@vrull.eu/","msgid":"<20231009224711.1105509-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-09T22:47:11","name":"RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009224711.1105509-1-christoph.muellner@vrull.eu/mbox/"},{"id":150418,"url":"https://patchwork.plctlab.org/api/1.2/patches/150418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009232326.91336-1-juzhe.zhong@rivai.ai/","msgid":"<20231009232326.91336-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T23:23:26","name":"RISC-V: Add available vector size for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009232326.91336-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150433,"url":"https://patchwork.plctlab.org/api/1.2/patches/150433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010011638.103019-1-juzhe.zhong@rivai.ai/","msgid":"<20231010011638.103019-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T01:16:38","name":"RISC-V Regression: Fix dump check of bb-slp-68.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010011638.103019-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150439,"url":"https://patchwork.plctlab.org/api/1.2/patches/150439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010013904.105336-1-juzhe.zhong@rivai.ai/","msgid":"<20231010013904.105336-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T01:39:04","name":"RISC-V Regression: Fix FAIL of bb-slp-pr65935.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010013904.105336-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150447,"url":"https://patchwork.plctlab.org/api/1.2/patches/150447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010021840.3443697-1-guojiufu@linux.ibm.com/","msgid":"<20231010021840.3443697-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-10T02:18:39","name":"[V1] introduce light expander sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010021840.3443697-1-guojiufu@linux.ibm.com/mbox/"},{"id":150450,"url":"https://patchwork.plctlab.org/api/1.2/patches/150450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010024742.3092307-1-juzhe.zhong@rivai.ai/","msgid":"<20231010024742.3092307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T02:47:42","name":"RISC-V Regression: Make match patterns more accurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010024742.3092307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150451,"url":"https://patchwork.plctlab.org/api/1.2/patches/150451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025311.3642757-1-guojiufu@linux.ibm.com/","msgid":"<20231010025311.3642757-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-10T02:53:11","name":"use get_range_query to replace get_global_range_query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025311.3642757-1-guojiufu@linux.ibm.com/mbox/"},{"id":150452,"url":"https://patchwork.plctlab.org/api/1.2/patches/150452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025835.3109227-1-juzhe.zhong@rivai.ai/","msgid":"<20231010025835.3109227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T02:58:35","name":"RISC-V Regression: Fix FAIL of predcom-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025835.3109227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150460,"url":"https://patchwork.plctlab.org/api/1.2/patches/150460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-1-ppalka@redhat.com/","msgid":"<20231010032300.1057862-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-10T03:22:59","name":"[1/2] c++: sort candidates according to viability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-1-ppalka@redhat.com/mbox/"},{"id":150461,"url":"https://patchwork.plctlab.org/api/1.2/patches/150461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-2-ppalka@redhat.com/","msgid":"<20231010032300.1057862-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-10T03:23:00","name":"[2/2] c++: note other candidates when diagnosing deletedness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-2-ppalka@redhat.com/mbox/"},{"id":150474,"url":"https://patchwork.plctlab.org/api/1.2/patches/150474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-2-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:02","name":"[v2,1/4] options: Define TARGET__P and TARGET__OPTS_P macro for Mask and InverseMask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-2-kito.cheng@sifive.com/mbox/"},{"id":150475,"url":"https://patchwork.plctlab.org/api/1.2/patches/150475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-3-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:03","name":"[v2,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-3-kito.cheng@sifive.com/mbox/"},{"id":150477,"url":"https://patchwork.plctlab.org/api/1.2/patches/150477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-4-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:04","name":"[v2,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-4-kito.cheng@sifive.com/mbox/"},{"id":150476,"url":"https://patchwork.plctlab.org/api/1.2/patches/150476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-5-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:05","name":"[v2,4/4] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-5-kito.cheng@sifive.com/mbox/"},{"id":150480,"url":"https://patchwork.plctlab.org/api/1.2/patches/150480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010045952.572596-1-jun.zhang@intel.com/","msgid":"<20231010045952.572596-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-10-10T04:59:52","name":"x86: set spincount 1 for x86 hybrid platform [PR109812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010045952.572596-1-jun.zhang@intel.com/mbox/"},{"id":150501,"url":"https://patchwork.plctlab.org/api/1.2/patches/150501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010064852.1108058-1-hongyu.wang@intel.com/","msgid":"<20231010064852.1108058-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-10T06:48:52","name":"[APX] Support Intel APX PUSH2POP2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010064852.1108058-1-hongyu.wang@intel.com/mbox/"},{"id":150502,"url":"https://patchwork.plctlab.org/api/1.2/patches/150502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010065945.1234266-1-hongtao.liu@intel.com/","msgid":"<20231010065945.1234266-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-10T06:59:45","name":"[x86] Refine predicate of operands[2] in divv4hf3 with register_operand.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010065945.1234266-1-hongtao.liu@intel.com/mbox/"},{"id":150527,"url":"https://patchwork.plctlab.org/api/1.2/patches/150527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010074645.1392417-1-lin1.hu@intel.com/","msgid":"<20231010074645.1392417-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-10-10T07:46:45","name":"Support Intel USER_MSR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010074645.1392417-1-lin1.hu@intel.com/mbox/"},{"id":150569,"url":"https://patchwork.plctlab.org/api/1.2/patches/150569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010083950.1549239-1-claziss@gmail.com/","msgid":"<20231010083950.1549239-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-10T08:39:50","name":"[committed] arc: Refurbish add.f combiner patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010083950.1549239-1-claziss@gmail.com/mbox/"},{"id":150628,"url":"https://patchwork.plctlab.org/api/1.2/patches/150628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-2-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:15","name":"[v15,01/39] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-2-kmatsui@gcc.gnu.org/mbox/"},{"id":150630,"url":"https://patchwork.plctlab.org/api/1.2/patches/150630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-3-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:16","name":"[v15,02/39] c-family, c++: Look up traits through gperf instead of enum rid.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-3-kmatsui@gcc.gnu.org/mbox/"},{"id":150629,"url":"https://patchwork.plctlab.org/api/1.2/patches/150629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-4-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:17","name":"[v15,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-4-kmatsui@gcc.gnu.org/mbox/"},{"id":150631,"url":"https://patchwork.plctlab.org/api/1.2/patches/150631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-5-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:18","name":"[v15,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-5-kmatsui@gcc.gnu.org/mbox/"},{"id":150632,"url":"https://patchwork.plctlab.org/api/1.2/patches/150632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-6-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:19","name":"[v15,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-6-kmatsui@gcc.gnu.org/mbox/"},{"id":150633,"url":"https://patchwork.plctlab.org/api/1.2/patches/150633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-7-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:20","name":"[v15,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-7-kmatsui@gcc.gnu.org/mbox/"},{"id":150634,"url":"https://patchwork.plctlab.org/api/1.2/patches/150634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-8-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:21","name":"[v15,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-8-kmatsui@gcc.gnu.org/mbox/"},{"id":150635,"url":"https://patchwork.plctlab.org/api/1.2/patches/150635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-9-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:22","name":"[v15,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-9-kmatsui@gcc.gnu.org/mbox/"},{"id":150636,"url":"https://patchwork.plctlab.org/api/1.2/patches/150636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-10-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:23","name":"[v15,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-10-kmatsui@gcc.gnu.org/mbox/"},{"id":150638,"url":"https://patchwork.plctlab.org/api/1.2/patches/150638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-11-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:24","name":"[v15,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-11-kmatsui@gcc.gnu.org/mbox/"},{"id":150637,"url":"https://patchwork.plctlab.org/api/1.2/patches/150637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-12-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:25","name":"[v15,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-12-kmatsui@gcc.gnu.org/mbox/"},{"id":150639,"url":"https://patchwork.plctlab.org/api/1.2/patches/150639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-13-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:26","name":"[v15,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-13-kmatsui@gcc.gnu.org/mbox/"},{"id":150640,"url":"https://patchwork.plctlab.org/api/1.2/patches/150640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-14-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:27","name":"[v15,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-14-kmatsui@gcc.gnu.org/mbox/"},{"id":150643,"url":"https://patchwork.plctlab.org/api/1.2/patches/150643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-15-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:28","name":"[v15,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-15-kmatsui@gcc.gnu.org/mbox/"},{"id":150642,"url":"https://patchwork.plctlab.org/api/1.2/patches/150642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-16-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:29","name":"[v15,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-16-kmatsui@gcc.gnu.org/mbox/"},{"id":150645,"url":"https://patchwork.plctlab.org/api/1.2/patches/150645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-17-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:30","name":"[v15,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-17-kmatsui@gcc.gnu.org/mbox/"},{"id":150646,"url":"https://patchwork.plctlab.org/api/1.2/patches/150646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-18-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:31","name":"[v15,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-18-kmatsui@gcc.gnu.org/mbox/"},{"id":150647,"url":"https://patchwork.plctlab.org/api/1.2/patches/150647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-19-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:32","name":"[v15,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-19-kmatsui@gcc.gnu.org/mbox/"},{"id":150650,"url":"https://patchwork.plctlab.org/api/1.2/patches/150650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-20-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:33","name":"[v15,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-20-kmatsui@gcc.gnu.org/mbox/"},{"id":150651,"url":"https://patchwork.plctlab.org/api/1.2/patches/150651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-21-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:34","name":"[v15,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-21-kmatsui@gcc.gnu.org/mbox/"},{"id":150653,"url":"https://patchwork.plctlab.org/api/1.2/patches/150653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-22-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:35","name":"[v15,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-22-kmatsui@gcc.gnu.org/mbox/"},{"id":150654,"url":"https://patchwork.plctlab.org/api/1.2/patches/150654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-23-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:36","name":"[v15,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-23-kmatsui@gcc.gnu.org/mbox/"},{"id":150656,"url":"https://patchwork.plctlab.org/api/1.2/patches/150656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-24-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:37","name":"[v15,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-24-kmatsui@gcc.gnu.org/mbox/"},{"id":150655,"url":"https://patchwork.plctlab.org/api/1.2/patches/150655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-25-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:38","name":"[v15,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-25-kmatsui@gcc.gnu.org/mbox/"},{"id":150657,"url":"https://patchwork.plctlab.org/api/1.2/patches/150657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-26-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:39","name":"[v15,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-26-kmatsui@gcc.gnu.org/mbox/"},{"id":150658,"url":"https://patchwork.plctlab.org/api/1.2/patches/150658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-27-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:40","name":"[v15,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-27-kmatsui@gcc.gnu.org/mbox/"},{"id":150661,"url":"https://patchwork.plctlab.org/api/1.2/patches/150661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-28-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:41","name":"[v15,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-28-kmatsui@gcc.gnu.org/mbox/"},{"id":150659,"url":"https://patchwork.plctlab.org/api/1.2/patches/150659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-29-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:42","name":"[v15,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-29-kmatsui@gcc.gnu.org/mbox/"},{"id":150664,"url":"https://patchwork.plctlab.org/api/1.2/patches/150664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-30-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:43","name":"[v15,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-30-kmatsui@gcc.gnu.org/mbox/"},{"id":150671,"url":"https://patchwork.plctlab.org/api/1.2/patches/150671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-31-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:44","name":"[v15,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-31-kmatsui@gcc.gnu.org/mbox/"},{"id":150660,"url":"https://patchwork.plctlab.org/api/1.2/patches/150660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-32-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:45","name":"[v15,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-32-kmatsui@gcc.gnu.org/mbox/"},{"id":150663,"url":"https://patchwork.plctlab.org/api/1.2/patches/150663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-33-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:46","name":"[v15,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-33-kmatsui@gcc.gnu.org/mbox/"},{"id":150672,"url":"https://patchwork.plctlab.org/api/1.2/patches/150672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-34-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:47","name":"[v15,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-34-kmatsui@gcc.gnu.org/mbox/"},{"id":150667,"url":"https://patchwork.plctlab.org/api/1.2/patches/150667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-35-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:48","name":"[v15,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-35-kmatsui@gcc.gnu.org/mbox/"},{"id":150665,"url":"https://patchwork.plctlab.org/api/1.2/patches/150665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-36-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:49","name":"[v15,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-36-kmatsui@gcc.gnu.org/mbox/"},{"id":150669,"url":"https://patchwork.plctlab.org/api/1.2/patches/150669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-37-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:50","name":"[v15,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-37-kmatsui@gcc.gnu.org/mbox/"},{"id":150666,"url":"https://patchwork.plctlab.org/api/1.2/patches/150666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-38-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:51","name":"[v15,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-38-kmatsui@gcc.gnu.org/mbox/"},{"id":150668,"url":"https://patchwork.plctlab.org/api/1.2/patches/150668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-39-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:52","name":"[v15,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-39-kmatsui@gcc.gnu.org/mbox/"},{"id":150670,"url":"https://patchwork.plctlab.org/api/1.2/patches/150670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-40-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:53","name":"[v15,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-40-kmatsui@gcc.gnu.org/mbox/"},{"id":150680,"url":"https://patchwork.plctlab.org/api/1.2/patches/150680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010103846.F1467383C8FA@sourceware.org/","msgid":"<20231010103846.F1467383C8FA@sourceware.org>","list_archive_url":null,"date":"2023-10-10T10:38:20","name":"Fix missed CSE with a BLKmode entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010103846.F1467383C8FA@sourceware.org/mbox/"},{"id":150681,"url":"https://patchwork.plctlab.org/api/1.2/patches/150681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010104929.D13B53857709@sourceware.org/","msgid":"<20231010104929.D13B53857709@sourceware.org>","list_archive_url":null,"date":"2023-10-10T10:49:04","name":"tree-optimization/111519 - strlen optimization skips clobbering store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010104929.D13B53857709@sourceware.org/mbox/"},{"id":150692,"url":"https://patchwork.plctlab.org/api/1.2/patches/150692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010114901.4178775-1-juzhe.zhong@rivai.ai/","msgid":"<20231010114901.4178775-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T11:49:01","name":"[Committed] RISC-V: Add testcase for SCCVN optimization[PR111751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010114901.4178775-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150719,"url":"https://patchwork.plctlab.org/api/1.2/patches/150719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121445.3888198-1-poulhies@adacore.com/","msgid":"<20231010121445.3888198-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:45","name":"[COMMITTED] ada: Crash processing pragmas Compile_Time_Error and Compile_Time_Warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121445.3888198-1-poulhies@adacore.com/mbox/"},{"id":150723,"url":"https://patchwork.plctlab.org/api/1.2/patches/150723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121449.3888260-1-poulhies@adacore.com/","msgid":"<20231010121449.3888260-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:49","name":"[COMMITTED] ada: Tweak documentation comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121449.3888260-1-poulhies@adacore.com/mbox/"},{"id":150729,"url":"https://patchwork.plctlab.org/api/1.2/patches/150729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121451.3888321-1-poulhies@adacore.com/","msgid":"<20231010121451.3888321-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:51","name":"[COMMITTED] ada: Fix filesystem entry filtering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121451.3888321-1-poulhies@adacore.com/mbox/"},{"id":150726,"url":"https://patchwork.plctlab.org/api/1.2/patches/150726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121452.3888382-1-poulhies@adacore.com/","msgid":"<20231010121452.3888382-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:52","name":"[COMMITTED] ada: Fix infinite loop with multiple limited with clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121452.3888382-1-poulhies@adacore.com/mbox/"},{"id":150720,"url":"https://patchwork.plctlab.org/api/1.2/patches/150720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121454.3888482-1-poulhies@adacore.com/","msgid":"<20231010121454.3888482-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:54","name":"[COMMITTED] ada: Fix bad finalization of limited aggregate in conditional expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121454.3888482-1-poulhies@adacore.com/mbox/"},{"id":150722,"url":"https://patchwork.plctlab.org/api/1.2/patches/150722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121455.3888544-1-poulhies@adacore.com/","msgid":"<20231010121455.3888544-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:55","name":"[COMMITTED] ada: Remove superfluous setter procedure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121455.3888544-1-poulhies@adacore.com/mbox/"},{"id":150725,"url":"https://patchwork.plctlab.org/api/1.2/patches/150725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121457.3888606-1-poulhies@adacore.com/","msgid":"<20231010121457.3888606-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:57","name":"[COMMITTED] ada: Tweak internal subprogram in Ada.Directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121457.3888606-1-poulhies@adacore.com/mbox/"},{"id":150727,"url":"https://patchwork.plctlab.org/api/1.2/patches/150727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121459.3888667-1-poulhies@adacore.com/","msgid":"<20231010121459.3888667-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:59","name":"[COMMITTED] ada: Fix internal error on too large representation clause for small component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121459.3888667-1-poulhies@adacore.com/mbox/"},{"id":150732,"url":"https://patchwork.plctlab.org/api/1.2/patches/150732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121909.1803189-1-juzhe.zhong@rivai.ai/","msgid":"<20231010121909.1803189-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T12:19:09","name":"[Committed] RISC-V: Add VLS BOOL mode vcond_mask[PR111751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121909.1803189-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150731,"url":"https://patchwork.plctlab.org/api/1.2/patches/150731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121947.551323882004@sourceware.org/","msgid":"<20231010121947.551323882004@sourceware.org>","list_archive_url":null,"date":"2023-10-10T12:19:18","name":"tree-optimization/111751 - support 1024 bit vector constant reinterpretation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121947.551323882004@sourceware.org/mbox/"},{"id":150739,"url":"https://patchwork.plctlab.org/api/1.2/patches/150739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com/","msgid":"<049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-10T12:28:29","name":"Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com/mbox/"},{"id":150749,"url":"https://patchwork.plctlab.org/api/1.2/patches/150749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010124032.103935-1-christoph.muellner@vrull.eu/","msgid":"<20231010124032.103935-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-10T12:40:32","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010124032.103935-1-christoph.muellner@vrull.eu/mbox/"},{"id":150750,"url":"https://patchwork.plctlab.org/api/1.2/patches/150750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b126b63b-258b-e63a-6d6e-fa79aefd90e8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-10T12:44:00","name":"PATCH v3] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b126b63b-258b-e63a-6d6e-fa79aefd90e8@linux.ibm.com/mbox/"},{"id":150755,"url":"https://patchwork.plctlab.org/api/1.2/patches/150755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010125547.3682032-1-juzhe.zhong@rivai.ai/","msgid":"<20231010125547.3682032-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T12:55:47","name":"RISC-V Regression: Fix FAIL of pr65947-8.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010125547.3682032-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150795,"url":"https://patchwork.plctlab.org/api/1.2/patches/150795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSVUz5PH36aJ3en2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-10T13:42:39","name":"dwarf2out: Stop using wide_int in GC structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSVUz5PH36aJ3en2@tucnak/mbox/"},{"id":150804,"url":"https://patchwork.plctlab.org/api/1.2/patches/150804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65255623.620a0220.39bb2.41d9@mx.google.com/","msgid":"<65255623.620a0220.39bb2.41d9@mx.google.com>","list_archive_url":null,"date":"2023-10-10T13:48:12","name":"[v5] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65255623.620a0220.39bb2.41d9@mx.google.com/mbox/"},{"id":150808,"url":"https://patchwork.plctlab.org/api/1.2/patches/150808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-2-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:43","name":"[1/3,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-2-Ezra.Sitorus@arm.com/mbox/"},{"id":150807,"url":"https://patchwork.plctlab.org/api/1.2/patches/150807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-3-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:44","name":"[2/3,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-3-Ezra.Sitorus@arm.com/mbox/"},{"id":150809,"url":"https://patchwork.plctlab.org/api/1.2/patches/150809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-4-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:45","name":"[3/3,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-4-Ezra.Sitorus@arm.com/mbox/"},{"id":150830,"url":"https://patchwork.plctlab.org/api/1.2/patches/150830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010144913.2245394-1-juzhe.zhong@rivai.ai/","msgid":"<20231010144913.2245394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T14:49:13","name":"RISC-V Regression: Fix FAIL of vect-multitypes-16.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010144913.2245394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150834,"url":"https://patchwork.plctlab.org/api/1.2/patches/150834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010145746.2247025-1-juzhe.zhong@rivai.ai/","msgid":"<20231010145746.2247025-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T14:57:46","name":"RISC-V Regression: Make pattern match more accurate of vect-live-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010145746.2247025-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150872,"url":"https://patchwork.plctlab.org/api/1.2/patches/150872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com/","msgid":"<457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com>","list_archive_url":null,"date":"2023-10-10T16:46:35","name":"Fortran: Support OpenMP'\''s '\''allocate'\'' directive for stack vars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com/mbox/"},{"id":150883,"url":"https://patchwork.plctlab.org/api/1.2/patches/150883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSWHycEfs6r1Wvki@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-10T17:20:09","name":"[v2] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSWHycEfs6r1Wvki@redhat.com/mbox/"},{"id":150972,"url":"https://patchwork.plctlab.org/api/1.2/patches/150972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010212305.121636-1-jason@redhat.com/","msgid":"<20231010212305.121636-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-10T21:23:05","name":"[pushed] c++: mangle multiple levels of template parms [PR109422]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010212305.121636-1-jason@redhat.com/mbox/"},{"id":150989,"url":"https://patchwork.plctlab.org/api/1.2/patches/150989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-2-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:52","name":"[v16,01/39] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-2-kmatsui@gcc.gnu.org/mbox/"},{"id":150990,"url":"https://patchwork.plctlab.org/api/1.2/patches/150990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-3-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:53","name":"[v16,02/39] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-3-kmatsui@gcc.gnu.org/mbox/"},{"id":150991,"url":"https://patchwork.plctlab.org/api/1.2/patches/150991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-4-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:54","name":"[v16,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-4-kmatsui@gcc.gnu.org/mbox/"},{"id":150992,"url":"https://patchwork.plctlab.org/api/1.2/patches/150992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-5-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:55","name":"[v16,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-5-kmatsui@gcc.gnu.org/mbox/"},{"id":150993,"url":"https://patchwork.plctlab.org/api/1.2/patches/150993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-6-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:56","name":"[v16,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-6-kmatsui@gcc.gnu.org/mbox/"},{"id":150994,"url":"https://patchwork.plctlab.org/api/1.2/patches/150994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-7-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:57","name":"[v16,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-7-kmatsui@gcc.gnu.org/mbox/"},{"id":150995,"url":"https://patchwork.plctlab.org/api/1.2/patches/150995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-8-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:58","name":"[v16,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-8-kmatsui@gcc.gnu.org/mbox/"},{"id":150996,"url":"https://patchwork.plctlab.org/api/1.2/patches/150996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-9-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:59","name":"[v16,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-9-kmatsui@gcc.gnu.org/mbox/"},{"id":151000,"url":"https://patchwork.plctlab.org/api/1.2/patches/151000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-10-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:00","name":"[v16,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-10-kmatsui@gcc.gnu.org/mbox/"},{"id":151008,"url":"https://patchwork.plctlab.org/api/1.2/patches/151008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-11-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:01","name":"[v16,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-11-kmatsui@gcc.gnu.org/mbox/"},{"id":151009,"url":"https://patchwork.plctlab.org/api/1.2/patches/151009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-12-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:02","name":"[v16,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-12-kmatsui@gcc.gnu.org/mbox/"},{"id":151011,"url":"https://patchwork.plctlab.org/api/1.2/patches/151011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-13-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:03","name":"[v16,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-13-kmatsui@gcc.gnu.org/mbox/"},{"id":151010,"url":"https://patchwork.plctlab.org/api/1.2/patches/151010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-14-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:04","name":"[v16,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-14-kmatsui@gcc.gnu.org/mbox/"},{"id":151013,"url":"https://patchwork.plctlab.org/api/1.2/patches/151013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-15-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:05","name":"[v16,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-15-kmatsui@gcc.gnu.org/mbox/"},{"id":151014,"url":"https://patchwork.plctlab.org/api/1.2/patches/151014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-16-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:06","name":"[v16,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-16-kmatsui@gcc.gnu.org/mbox/"},{"id":151016,"url":"https://patchwork.plctlab.org/api/1.2/patches/151016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-17-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:07","name":"[v16,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-17-kmatsui@gcc.gnu.org/mbox/"},{"id":151015,"url":"https://patchwork.plctlab.org/api/1.2/patches/151015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-18-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:08","name":"[v16,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-18-kmatsui@gcc.gnu.org/mbox/"},{"id":151018,"url":"https://patchwork.plctlab.org/api/1.2/patches/151018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-19-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:09","name":"[v16,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-19-kmatsui@gcc.gnu.org/mbox/"},{"id":151017,"url":"https://patchwork.plctlab.org/api/1.2/patches/151017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-20-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:10","name":"[v16,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-20-kmatsui@gcc.gnu.org/mbox/"},{"id":151021,"url":"https://patchwork.plctlab.org/api/1.2/patches/151021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-21-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:11","name":"[v16,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-21-kmatsui@gcc.gnu.org/mbox/"},{"id":151024,"url":"https://patchwork.plctlab.org/api/1.2/patches/151024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-22-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:12","name":"[v16,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-22-kmatsui@gcc.gnu.org/mbox/"},{"id":151031,"url":"https://patchwork.plctlab.org/api/1.2/patches/151031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-23-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:13","name":"[v16,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-23-kmatsui@gcc.gnu.org/mbox/"},{"id":151020,"url":"https://patchwork.plctlab.org/api/1.2/patches/151020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-24-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:14","name":"[v16,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-24-kmatsui@gcc.gnu.org/mbox/"},{"id":151019,"url":"https://patchwork.plctlab.org/api/1.2/patches/151019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-25-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:15","name":"[v16,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-25-kmatsui@gcc.gnu.org/mbox/"},{"id":151023,"url":"https://patchwork.plctlab.org/api/1.2/patches/151023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-26-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:16","name":"[v16,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-26-kmatsui@gcc.gnu.org/mbox/"},{"id":151022,"url":"https://patchwork.plctlab.org/api/1.2/patches/151022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-27-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:17","name":"[v16,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-27-kmatsui@gcc.gnu.org/mbox/"},{"id":151026,"url":"https://patchwork.plctlab.org/api/1.2/patches/151026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-28-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:18","name":"[v16,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-28-kmatsui@gcc.gnu.org/mbox/"},{"id":151030,"url":"https://patchwork.plctlab.org/api/1.2/patches/151030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-29-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:19","name":"[v16,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-29-kmatsui@gcc.gnu.org/mbox/"},{"id":151025,"url":"https://patchwork.plctlab.org/api/1.2/patches/151025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-30-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:20","name":"[v16,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-30-kmatsui@gcc.gnu.org/mbox/"},{"id":151028,"url":"https://patchwork.plctlab.org/api/1.2/patches/151028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-31-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:21","name":"[v16,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-31-kmatsui@gcc.gnu.org/mbox/"},{"id":151033,"url":"https://patchwork.plctlab.org/api/1.2/patches/151033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-32-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:22","name":"[v16,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-32-kmatsui@gcc.gnu.org/mbox/"},{"id":151032,"url":"https://patchwork.plctlab.org/api/1.2/patches/151032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-33-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:23","name":"[v16,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-33-kmatsui@gcc.gnu.org/mbox/"},{"id":151038,"url":"https://patchwork.plctlab.org/api/1.2/patches/151038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-34-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:24","name":"[v16,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-34-kmatsui@gcc.gnu.org/mbox/"},{"id":151035,"url":"https://patchwork.plctlab.org/api/1.2/patches/151035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-35-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:25","name":"[v16,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-35-kmatsui@gcc.gnu.org/mbox/"},{"id":151034,"url":"https://patchwork.plctlab.org/api/1.2/patches/151034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-36-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:26","name":"[v16,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-36-kmatsui@gcc.gnu.org/mbox/"},{"id":151036,"url":"https://patchwork.plctlab.org/api/1.2/patches/151036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-37-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:27","name":"[v16,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-37-kmatsui@gcc.gnu.org/mbox/"},{"id":151037,"url":"https://patchwork.plctlab.org/api/1.2/patches/151037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-38-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:28","name":"[v16,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-38-kmatsui@gcc.gnu.org/mbox/"},{"id":151039,"url":"https://patchwork.plctlab.org/api/1.2/patches/151039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-39-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:29","name":"[v16,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-39-kmatsui@gcc.gnu.org/mbox/"},{"id":151040,"url":"https://patchwork.plctlab.org/api/1.2/patches/151040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-40-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:30","name":"[v16,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-40-kmatsui@gcc.gnu.org/mbox/"},{"id":150988,"url":"https://patchwork.plctlab.org/api/1.2/patches/150988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com/","msgid":"<001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com>","list_archive_url":null,"date":"2023-10-10T22:11:21","name":"[committed,PR,target/93062] RISC-V: Handle long conditional branches for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com/mbox/"},{"id":151055,"url":"https://patchwork.plctlab.org/api/1.2/patches/151055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6525e4d7.170a0220.2ad8c.28d8@mx.google.com/","msgid":"<6525e4d7.170a0220.2ad8c.28d8@mx.google.com>","list_archive_url":null,"date":"2023-10-10T23:57:06","name":"[v2] c++: Improve diagnostics for constexpr cast from void*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6525e4d7.170a0220.2ad8c.28d8@mx.google.com/mbox/"},{"id":151090,"url":"https://patchwork.plctlab.org/api/1.2/patches/151090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011003602.80416-1-guojiufu@linux.ibm.com/","msgid":"<20231011003602.80416-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T00:36:02","name":"[V1] use more get_range_query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011003602.80416-1-guojiufu@linux.ibm.com/mbox/"},{"id":151091,"url":"https://patchwork.plctlab.org/api/1.2/patches/151091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011004537.3582095-1-pinskia@gmail.com/","msgid":"<20231011004537.3582095-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-11T00:45:37","name":"MATCH: [PR111282] Simplify `a & (b ^ ~a)` to `a & b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011004537.3582095-1-pinskia@gmail.com/mbox/"},{"id":151093,"url":"https://patchwork.plctlab.org/api/1.2/patches/151093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011012934.1370966-1-guojiufu@linux.ibm.com/","msgid":"<20231011012934.1370966-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T01:29:34","name":"early outs for functions in rs6000.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011012934.1370966-1-guojiufu@linux.ibm.com/mbox/"},{"id":151106,"url":"https://patchwork.plctlab.org/api/1.2/patches/151106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011032507.1755127-1-juzhe.zhong@rivai.ai/","msgid":"<20231011032507.1755127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T03:25:07","name":"RISC-V: Remove XFAIL of ssa-dom-cse-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011032507.1755127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151117,"url":"https://patchwork.plctlab.org/api/1.2/patches/151117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011051502.1695577-1-juzhe.zhong@rivai.ai/","msgid":"<20231011051502.1695577-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T05:15:02","name":"RISC-V: Enable full coverage vect tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011051502.1695577-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151208,"url":"https://patchwork.plctlab.org/api/1.2/patches/151208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011083928.2535012-1-jun.zhang@intel.com/","msgid":"<20231011083928.2535012-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-10-11T08:39:28","name":"[v2] x86: set spincount 1 for x86 hybrid platform","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011083928.2535012-1-jun.zhang@intel.com/mbox/"},{"id":151209,"url":"https://patchwork.plctlab.org/api/1.2/patches/151209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084125.3027928-1-panchenghui@loongson.cn/","msgid":"<20231011084125.3027928-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-10-11T08:41:25","name":"[v1] LoongArch: Fix vec_initv32qiv16qi template to avoid ICE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084125.3027928-1-panchenghui@loongson.cn/mbox/"},{"id":151216,"url":"https://patchwork.plctlab.org/api/1.2/patches/151216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084703.2535206-1-lin1.hu@intel.com/","msgid":"<20231011084703.2535206-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-10-11T08:47:03","name":"Fix testcases that are raised by support -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084703.2535206-1-lin1.hu@intel.com/mbox/"},{"id":151217,"url":"https://patchwork.plctlab.org/api/1.2/patches/151217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+NVx6b0ZtQ7gK8wHAA1o0Rrr6JUy82H0xV0gfv7VqcvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T08:48:17","name":"[fortran] PR67740 - Wrong association status of allocatable character pointer in derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+NVx6b0ZtQ7gK8wHAA1o0Rrr6JUy82H0xV0gfv7VqcvQ@mail.gmail.com/mbox/"},{"id":151218,"url":"https://patchwork.plctlab.org/api/1.2/patches/151218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084953.3748731-1-pan2.li@intel.com/","msgid":"<20231011084953.3748731-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-11T08:49:53","name":"[v1] RISC-V: Support FP lrint/lrintf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084953.3748731-1-pan2.li@intel.com/mbox/"},{"id":151232,"url":"https://patchwork.plctlab.org/api/1.2/patches/151232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011090309.2987108-1-juzhe.zhong@rivai.ai/","msgid":"<20231011090309.2987108-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:03:09","name":"RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011090309.2987108-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151234,"url":"https://patchwork.plctlab.org/api/1.2/patches/151234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com/","msgid":"<88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T09:05:59","name":"[PATCH-1v2,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com/mbox/"},{"id":151237,"url":"https://patchwork.plctlab.org/api/1.2/patches/151237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com/","msgid":"<19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T09:06:23","name":"[PATCH-2v2,rs6000] Enable vector mode for memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com/mbox/"},{"id":151239,"url":"https://patchwork.plctlab.org/api/1.2/patches/151239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011093631.2993626-1-juzhe.zhong@rivai.ai/","msgid":"<20231011093631.2993626-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:36:31","name":"[V2] RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011093631.2993626-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151240,"url":"https://patchwork.plctlab.org/api/1.2/patches/151240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095444.2997562-1-juzhe.zhong@rivai.ai/","msgid":"<20231011095444.2997562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:54:44","name":"[V3] RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095444.2997562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151242,"url":"https://patchwork.plctlab.org/api/1.2/patches/151242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095953.3184215-1-yangyujie@loongson.cn/","msgid":"<20231011095953.3184215-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-10-11T09:59:53","name":"[v2] LoongArch: Adjust makefile dependency for loongarch headers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095953.3184215-1-yangyujie@loongson.cn/mbox/"},{"id":151326,"url":"https://patchwork.plctlab.org/api/1.2/patches/151326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com/","msgid":"<402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-10-11T11:50:09","name":"[v2] rs6000: Change bitwise xor to an equality operator [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com/mbox/"},{"id":151332,"url":"https://patchwork.plctlab.org/api/1.2/patches/151332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-2-mary.bennett@embecosm.com/","msgid":"<20231011120608.242927-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-11T12:06:07","name":"[v4,1/2] RISC-V: Add support for XCVmac extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-2-mary.bennett@embecosm.com/mbox/"},{"id":151333,"url":"https://patchwork.plctlab.org/api/1.2/patches/151333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-3-mary.bennett@embecosm.com/","msgid":"<20231011120608.242927-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-11T12:06:08","name":"[v4,2/2] RISC-V: Add support for XCValu extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-3-mary.bennett@embecosm.com/mbox/"},{"id":151410,"url":"https://patchwork.plctlab.org/api/1.2/patches/151410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011122715.3017753-1-juzhe.zhong@rivai.ai/","msgid":"<20231011122715.3017753-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T12:27:15","name":"VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011122715.3017753-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151466,"url":"https://patchwork.plctlab.org/api/1.2/patches/151466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5spun4n.fsf@oldenburg.str.redhat.com/","msgid":"<87a5spun4n.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:42:16","name":"C99 test suite readiness: Mark some C89 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5spun4n.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151473,"url":"https://patchwork.plctlab.org/api/1.2/patches/151473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSbRqzsy4z0zH0O9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-11T16:47:39","name":"wide-int: Allow up to 16320 bits wide_int and change widest_int precision to 32640 bits [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSbRqzsy4z0zH0O9@tucnak/mbox/"},{"id":151476,"url":"https://patchwork.plctlab.org/api/1.2/patches/151476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0pt80z.fsf@oldenburg.str.redhat.com/","msgid":"<87zg0pt80z.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:53:48","name":"C99 test suite conversation: Some unverified test case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0pt80z.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151478,"url":"https://patchwork.plctlab.org/api/1.2/patches/151478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0m1t7yc.fsf@oldenburg.str.redhat.com/","msgid":"<87r0m1t7yc.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:55:23","name":"C99 testsuite readiness: Some verified test case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0m1t7yc.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151554,"url":"https://patchwork.plctlab.org/api/1.2/patches/151554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5be9e4b-fb8b-f385-ec81-cc7bede3fb5d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T20:48:02","name":"[COMMITTED,GCC13] PR tree-optimization/111694 - Ensure float equivalences include + and - zero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5be9e4b-fb8b-f385-ec81-cc7bede3fb5d@redhat.com/mbox/"},{"id":151555,"url":"https://patchwork.plctlab.org/api/1.2/patches/151555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZScKIRt2x6B2uAIB@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T20:48:33","name":"[v2] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZScKIRt2x6B2uAIB@redhat.com/mbox/"},{"id":151567,"url":"https://patchwork.plctlab.org/api/1.2/patches/151567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-2-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:37","name":"[v17,01/39] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-2-kmatsui@gcc.gnu.org/mbox/"},{"id":151569,"url":"https://patchwork.plctlab.org/api/1.2/patches/151569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-3-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:38","name":"[v17,02/39] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-3-kmatsui@gcc.gnu.org/mbox/"},{"id":151574,"url":"https://patchwork.plctlab.org/api/1.2/patches/151574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-4-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:39","name":"[v17,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-4-kmatsui@gcc.gnu.org/mbox/"},{"id":151570,"url":"https://patchwork.plctlab.org/api/1.2/patches/151570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-5-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:40","name":"[v17,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-5-kmatsui@gcc.gnu.org/mbox/"},{"id":151575,"url":"https://patchwork.plctlab.org/api/1.2/patches/151575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-6-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:41","name":"[v17,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-6-kmatsui@gcc.gnu.org/mbox/"},{"id":151572,"url":"https://patchwork.plctlab.org/api/1.2/patches/151572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-7-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:42","name":"[v17,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-7-kmatsui@gcc.gnu.org/mbox/"},{"id":151588,"url":"https://patchwork.plctlab.org/api/1.2/patches/151588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-8-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:43","name":"[v17,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-8-kmatsui@gcc.gnu.org/mbox/"},{"id":151580,"url":"https://patchwork.plctlab.org/api/1.2/patches/151580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-9-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:44","name":"[v17,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-9-kmatsui@gcc.gnu.org/mbox/"},{"id":151595,"url":"https://patchwork.plctlab.org/api/1.2/patches/151595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-10-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:45","name":"[v17,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-10-kmatsui@gcc.gnu.org/mbox/"},{"id":151581,"url":"https://patchwork.plctlab.org/api/1.2/patches/151581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-11-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:46","name":"[v17,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-11-kmatsui@gcc.gnu.org/mbox/"},{"id":151587,"url":"https://patchwork.plctlab.org/api/1.2/patches/151587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-12-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:47","name":"[v17,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-12-kmatsui@gcc.gnu.org/mbox/"},{"id":151577,"url":"https://patchwork.plctlab.org/api/1.2/patches/151577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-13-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:48","name":"[v17,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-13-kmatsui@gcc.gnu.org/mbox/"},{"id":151576,"url":"https://patchwork.plctlab.org/api/1.2/patches/151576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-14-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:49","name":"[v17,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-14-kmatsui@gcc.gnu.org/mbox/"},{"id":151599,"url":"https://patchwork.plctlab.org/api/1.2/patches/151599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-15-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:50","name":"[v17,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-15-kmatsui@gcc.gnu.org/mbox/"},{"id":151604,"url":"https://patchwork.plctlab.org/api/1.2/patches/151604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-16-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:51","name":"[v17,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-16-kmatsui@gcc.gnu.org/mbox/"},{"id":151586,"url":"https://patchwork.plctlab.org/api/1.2/patches/151586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-17-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:52","name":"[v17,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-17-kmatsui@gcc.gnu.org/mbox/"},{"id":151579,"url":"https://patchwork.plctlab.org/api/1.2/patches/151579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-18-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:53","name":"[v17,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-18-kmatsui@gcc.gnu.org/mbox/"},{"id":151596,"url":"https://patchwork.plctlab.org/api/1.2/patches/151596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-19-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:54","name":"[v17,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-19-kmatsui@gcc.gnu.org/mbox/"},{"id":151597,"url":"https://patchwork.plctlab.org/api/1.2/patches/151597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-20-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:55","name":"[v17,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-20-kmatsui@gcc.gnu.org/mbox/"},{"id":151601,"url":"https://patchwork.plctlab.org/api/1.2/patches/151601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-21-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:56","name":"[v17,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-21-kmatsui@gcc.gnu.org/mbox/"},{"id":151585,"url":"https://patchwork.plctlab.org/api/1.2/patches/151585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-22-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:57","name":"[v17,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-22-kmatsui@gcc.gnu.org/mbox/"},{"id":151612,"url":"https://patchwork.plctlab.org/api/1.2/patches/151612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-23-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:58","name":"[v17,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-23-kmatsui@gcc.gnu.org/mbox/"},{"id":151608,"url":"https://patchwork.plctlab.org/api/1.2/patches/151608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-24-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:59","name":"[v17,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-24-kmatsui@gcc.gnu.org/mbox/"},{"id":151607,"url":"https://patchwork.plctlab.org/api/1.2/patches/151607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-25-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:00","name":"[v17,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-25-kmatsui@gcc.gnu.org/mbox/"},{"id":151610,"url":"https://patchwork.plctlab.org/api/1.2/patches/151610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-26-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:01","name":"[v17,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-26-kmatsui@gcc.gnu.org/mbox/"},{"id":151603,"url":"https://patchwork.plctlab.org/api/1.2/patches/151603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-27-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:02","name":"[v17,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-27-kmatsui@gcc.gnu.org/mbox/"},{"id":151605,"url":"https://patchwork.plctlab.org/api/1.2/patches/151605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-28-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:03","name":"[v17,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-28-kmatsui@gcc.gnu.org/mbox/"},{"id":151582,"url":"https://patchwork.plctlab.org/api/1.2/patches/151582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-29-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:04","name":"[v17,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-29-kmatsui@gcc.gnu.org/mbox/"},{"id":151611,"url":"https://patchwork.plctlab.org/api/1.2/patches/151611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-30-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:05","name":"[v17,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-30-kmatsui@gcc.gnu.org/mbox/"},{"id":151606,"url":"https://patchwork.plctlab.org/api/1.2/patches/151606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-31-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:06","name":"[v17,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-31-kmatsui@gcc.gnu.org/mbox/"},{"id":151602,"url":"https://patchwork.plctlab.org/api/1.2/patches/151602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-32-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:07","name":"[v17,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-32-kmatsui@gcc.gnu.org/mbox/"},{"id":151598,"url":"https://patchwork.plctlab.org/api/1.2/patches/151598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-33-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:08","name":"[v17,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-33-kmatsui@gcc.gnu.org/mbox/"},{"id":151613,"url":"https://patchwork.plctlab.org/api/1.2/patches/151613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-34-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:09","name":"[v17,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-34-kmatsui@gcc.gnu.org/mbox/"},{"id":151590,"url":"https://patchwork.plctlab.org/api/1.2/patches/151590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-35-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:10","name":"[v17,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-35-kmatsui@gcc.gnu.org/mbox/"},{"id":151584,"url":"https://patchwork.plctlab.org/api/1.2/patches/151584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-36-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:11","name":"[v17,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-36-kmatsui@gcc.gnu.org/mbox/"},{"id":151609,"url":"https://patchwork.plctlab.org/api/1.2/patches/151609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-37-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:12","name":"[v17,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-37-kmatsui@gcc.gnu.org/mbox/"},{"id":151600,"url":"https://patchwork.plctlab.org/api/1.2/patches/151600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-38-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:13","name":"[v17,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-38-kmatsui@gcc.gnu.org/mbox/"},{"id":151578,"url":"https://patchwork.plctlab.org/api/1.2/patches/151578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-39-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:14","name":"[v17,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-39-kmatsui@gcc.gnu.org/mbox/"},{"id":151589,"url":"https://patchwork.plctlab.org/api/1.2/patches/151589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-40-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:15","name":"[v17,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-40-kmatsui@gcc.gnu.org/mbox/"},{"id":151614,"url":"https://patchwork.plctlab.org/api/1.2/patches/151614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com/","msgid":"<04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com>","list_archive_url":null,"date":"2023-10-11T22:26:41","name":"[committed] RISC-V: Adjust long unconditional branch sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com/mbox/"},{"id":151629,"url":"https://patchwork.plctlab.org/api/1.2/patches/151629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011232317.5803-1-kito.cheng@sifive.com/","msgid":"<20231011232317.5803-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-11T23:23:17","name":"[committed] RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011232317.5803-1-kito.cheng@sifive.com/mbox/"},{"id":151639,"url":"https://patchwork.plctlab.org/api/1.2/patches/151639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012015233.2918814-1-pan2.li@intel.com/","msgid":"<20231012015233.2918814-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T01:52:33","name":"[v1] RISC-V: Support FP irintf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012015233.2918814-1-pan2.li@intel.com/mbox/"},{"id":151680,"url":"https://patchwork.plctlab.org/api/1.2/patches/151680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012032825.378244-1-pan2.li@intel.com/","msgid":"<20231012032825.378244-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T03:28:25","name":"[v1] RISC-V: Support FP llrint auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012032825.378244-1-pan2.li@intel.com/mbox/"},{"id":151760,"url":"https://patchwork.plctlab.org/api/1.2/patches/151760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-1-hongtao.liu@intel.com/","msgid":"<20231012060209.4130200-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-12T06:02:08","name":"[1/2] Enable vectorization for V2HF/V4HF rounding operations and sqrt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-1-hongtao.liu@intel.com/mbox/"},{"id":151759,"url":"https://patchwork.plctlab.org/api/1.2/patches/151759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-2-hongtao.liu@intel.com/","msgid":"<20231012060209.4130200-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-12T06:02:09","name":"[2/2] Support 32/64-bit vectorization for conversion between _Float16 and integer/float.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-2-hongtao.liu@intel.com/mbox/"},{"id":151780,"url":"https://patchwork.plctlab.org/api/1.2/patches/151780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012064137.733900-1-juzhe.zhong@rivai.ai/","msgid":"<20231012064137.733900-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-12T06:41:37","name":"[V2] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012064137.733900-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151792,"url":"https://patchwork.plctlab.org/api/1.2/patches/151792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012070007.22047-1-chenglulu@loongson.cn/","msgid":"<20231012070007.22047-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-10-12T07:00:08","name":"[v2] LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012070007.22047-1-chenglulu@loongson.cn/mbox/"},{"id":151873,"url":"https://patchwork.plctlab.org/api/1.2/patches/151873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSemG6R7RSlzJUnI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-12T07:54:03","name":"libstdc++: Fix tr1/8_c_compatibility/cstdio/functions.cc regression with recent glibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSemG6R7RSlzJUnI@tucnak/mbox/"},{"id":151815,"url":"https://patchwork.plctlab.org/api/1.2/patches/151815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012082153.E485B385CCA7@sourceware.org/","msgid":"<20231012082153.E485B385CCA7@sourceware.org>","list_archive_url":null,"date":"2023-10-12T08:21:05","name":"tree-optimization/111764 - wrong reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012082153.E485B385CCA7@sourceware.org/mbox/"},{"id":151816,"url":"https://patchwork.plctlab.org/api/1.2/patches/151816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSetIEIRNdLqvikN@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-12T08:24:00","name":"PR target/111778 - Fix undefined shifts in PowerPC compiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSetIEIRNdLqvikN@cowardly-lion.the-meissners.org/mbox/"},{"id":151832,"url":"https://patchwork.plctlab.org/api/1.2/patches/151832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com/","msgid":"<79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T08:42:38","name":"[v8] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com/mbox/"},{"id":151834,"url":"https://patchwork.plctlab.org/api/1.2/patches/151834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6527b428.170a0220.810bd.457e@mx.google.com/","msgid":"<6527b428.170a0220.810bd.457e@mx.google.com>","list_archive_url":null,"date":"2023-10-12T08:53:55","name":"[v6] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6527b428.170a0220.810bd.457e@mx.google.com/mbox/"},{"id":151835,"url":"https://patchwork.plctlab.org/api/1.2/patches/151835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012085945.1057439-1-pan2.li@intel.com/","msgid":"<20231012085945.1057439-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T08:59:45","name":"[v1] RISC-V: Support FP lround/lroundf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012085945.1057439-1-pan2.li@intel.com/mbox/"},{"id":151837,"url":"https://patchwork.plctlab.org/api/1.2/patches/151837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012090145.196C73856DC8@sourceware.org/","msgid":"<20231012090145.196C73856DC8@sourceware.org>","list_archive_url":null,"date":"2023-10-12T09:01:17","name":"tree-optimization/111773 - avoid CD-DCE of noreturn special calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012090145.196C73856DC8@sourceware.org/mbox/"},{"id":151876,"url":"https://patchwork.plctlab.org/api/1.2/patches/151876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSe/UjWPIHPPUGyw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T09:41:38","name":"reg-notes.def: Fix up description of REG_NOALIAS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSe/UjWPIHPPUGyw@arm.com/mbox/"},{"id":151899,"url":"https://patchwork.plctlab.org/api/1.2/patches/151899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012100525.3355849-1-mary.bennett@embecosm.com/","msgid":"<20231012100525.3355849-1-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-12T10:05:25","name":"RISCV: Bugfix for incorrect documentation heading nesting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012100525.3355849-1-mary.bennett@embecosm.com/mbox/"},{"id":151920,"url":"https://patchwork.plctlab.org/api/1.2/patches/151920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012104523.2F2793858281@sourceware.org/","msgid":"<20231012104523.2F2793858281@sourceware.org>","list_archive_url":null,"date":"2023-10-12T10:44:46","name":"tree-optimization/111779 - Handle some BIT_FIELD_REFs in SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012104523.2F2793858281@sourceware.org/mbox/"},{"id":151922,"url":"https://patchwork.plctlab.org/api/1.2/patches/151922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae4dd96a-3b88-40dd-838b-cadcbac9d763@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T10:53:19","name":"libgomp.texi: Note to '\''Memory allocation'\'' sect and missing mem-memory routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae4dd96a-3b88-40dd-838b-cadcbac9d763@codesourcery.com/mbox/"},{"id":152003,"url":"https://patchwork.plctlab.org/api/1.2/patches/152003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com/","msgid":"<902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T12:32:53","name":"[v9] Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com/mbox/"},{"id":152005,"url":"https://patchwork.plctlab.org/api/1.2/patches/152005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com/","msgid":"<4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T12:35:36","name":"[v9] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com/mbox/"},{"id":152009,"url":"https://patchwork.plctlab.org/api/1.2/patches/152009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012130644.561301-1-christoph.muellner@vrull.eu/","msgid":"<20231012130644.561301-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-12T13:06:44","name":"[v2] RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012130644.561301-1-christoph.muellner@vrull.eu/mbox/"},{"id":152015,"url":"https://patchwork.plctlab.org/api/1.2/patches/152015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4e22a9c-1917-d868-9171-866c6625888a@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-10-12T13:38:52","name":"[avr,committed] Implement atan2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4e22a9c-1917-d868-9171-866c6625888a@gjlay.de/mbox/"},{"id":152022,"url":"https://patchwork.plctlab.org/api/1.2/patches/152022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012141711.1303539-1-pan2.li@intel.com/","msgid":"<20231012141711.1303539-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T14:17:11","name":"[v1] RISC-V: Support FP lceil/lceilf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012141711.1303539-1-pan2.li@intel.com/mbox/"},{"id":152024,"url":"https://patchwork.plctlab.org/api/1.2/patches/152024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17819-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T14:24:05","name":"[5/6] AArch64: Fix Armv9-a warnings that get emitted whenever a ACLE header is used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17819-tamar@arm.com/mbox/"},{"id":152036,"url":"https://patchwork.plctlab.org/api/1.2/patches/152036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSgQeSv80fEpkeFW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-12T15:27:53","name":"[committed] wide-int: Fix build with gcc < 12 or clang++ [PR111787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSgQeSv80fEpkeFW@tucnak/mbox/"},{"id":152056,"url":"https://patchwork.plctlab.org/api/1.2/patches/152056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com/","msgid":"<2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com>","list_archive_url":null,"date":"2023-10-12T16:37:00","name":"libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com/mbox/"},{"id":152117,"url":"https://patchwork.plctlab.org/api/1.2/patches/152117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012184029.21114-1-kito.cheng@sifive.com/","msgid":"<20231012184029.21114-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-12T18:40:29","name":"[v2] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012184029.21114-1-kito.cheng@sifive.com/mbox/"},{"id":152183,"url":"https://patchwork.plctlab.org/api/1.2/patches/152183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0f7bdc-d236-4f5b-9504-d5bfb215d023@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T20:45:23","name":"genemit: Split insn-emit.cc into ten files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0f7bdc-d236-4f5b-9504-d5bfb215d023@gmail.com/mbox/"},{"id":152188,"url":"https://patchwork.plctlab.org/api/1.2/patches/152188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012210426.755503-1-polacek@redhat.com/","msgid":"<20231012210426.755503-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-12T21:04:26","name":"c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012210426.755503-1-polacek@redhat.com/mbox/"},{"id":152243,"url":"https://patchwork.plctlab.org/api/1.2/patches/152243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013013803.3680171-1-pan2.li@intel.com/","msgid":"<20231013013803.3680171-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T01:38:03","name":"[v1] RISC-V: Support FP lfloor/lfloorf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013013803.3680171-1-pan2.li@intel.com/mbox/"},{"id":152255,"url":"https://patchwork.plctlab.org/api/1.2/patches/152255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013022224.3837020-1-pan2.li@intel.com/","msgid":"<20231013022224.3837020-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T02:22:24","name":"[v1] RISC-V: Leverage stdint-gcc.h for RVV test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013022224.3837020-1-pan2.li@intel.com/mbox/"},{"id":152307,"url":"https://patchwork.plctlab.org/api/1.2/patches/152307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013042926.201415-1-juzhe.zhong@rivai.ai/","msgid":"<20231013042926.201415-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T04:29:26","name":"[V3] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013042926.201415-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152311,"url":"https://patchwork.plctlab.org/api/1.2/patches/152311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013053347.1530185-1-pan2.li@intel.com/","msgid":"<20231013053347.1530185-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T05:33:47","name":"[v1] RISC-V: Add test for FP iroundf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013053347.1530185-1-pan2.li@intel.com/mbox/"},{"id":152315,"url":"https://patchwork.plctlab.org/api/1.2/patches/152315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013054519.461486-1-juzhe.zhong@rivai.ai/","msgid":"<20231013054519.461486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T05:45:19","name":"RISC-V Regression: Fix FAIL of bb-slp-pr69907.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013054519.461486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152320,"url":"https://patchwork.plctlab.org/api/1.2/patches/152320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013060126.503655-1-juzhe.zhong@rivai.ai/","msgid":"<20231013060126.503655-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T06:01:26","name":"RISC-V Regression: Fix FAIL of bb-slp-68.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013060126.503655-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152331,"url":"https://patchwork.plctlab.org/api/1.2/patches/152331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013061522.1647330-1-pan2.li@intel.com/","msgid":"<20231013061522.1647330-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T06:15:22","name":"[v1] RISC-V: Add test for FP llround auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013061522.1647330-1-pan2.li@intel.com/mbox/"},{"id":152352,"url":"https://patchwork.plctlab.org/api/1.2/patches/152352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013072027.1687701-1-pan2.li@intel.com/","msgid":"<20231013072027.1687701-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T07:20:27","name":"[v1] RISC-V: Add test for FP llceil auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013072027.1687701-1-pan2.li@intel.com/mbox/"},{"id":152354,"url":"https://patchwork.plctlab.org/api/1.2/patches/152354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSjw33JtzEa4fWkt@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-13T07:25:19","name":"middle-end: Allow _BitInt(65535) [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSjw33JtzEa4fWkt@tucnak/mbox/"},{"id":152375,"url":"https://patchwork.plctlab.org/api/1.2/patches/152375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013080643.1813480-1-pan2.li@intel.com/","msgid":"<20231013080643.1813480-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T08:06:43","name":"[v1] RISC-V: Add test for FP iceil auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013080643.1813480-1-pan2.li@intel.com/mbox/"},{"id":152380,"url":"https://patchwork.plctlab.org/api/1.2/patches/152380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013082336.1845369-1-pan2.li@intel.com/","msgid":"<20231013082336.1845369-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T08:23:36","name":"[v1] RISC-V: Add test for FP ifloor auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013082336.1845369-1-pan2.li@intel.com/mbox/"},{"id":152445,"url":"https://patchwork.plctlab.org/api/1.2/patches/152445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4bf18e0-cf23-7915-30aa-7bef24593d68@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T09:32:45","name":"PATCH-1v3, expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4bf18e0-cf23-7915-30aa-7bef24593d68@linux.ibm.com/mbox/"},{"id":152446,"url":"https://patchwork.plctlab.org/api/1.2/patches/152446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSkPSjC21gLSx2mI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-13T09:35:06","name":"middle-end, v2: Allow _BitInt(65535) [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSkPSjC21gLSx2mI@tucnak/mbox/"},{"id":152468,"url":"https://patchwork.plctlab.org/api/1.2/patches/152468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013094956.1888999-1-pan2.li@intel.com/","msgid":"<20231013094956.1888999-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T09:49:56","name":"[v1] RISC-V: Add test for FP llfloor auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013094956.1888999-1-pan2.li@intel.com/mbox/"},{"id":152469,"url":"https://patchwork.plctlab.org/api/1.2/patches/152469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013095247.BEA251358F@imap2.suse-dmz.suse.de/","msgid":"<20231013095247.BEA251358F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-13T09:52:37","name":"Add support for SLP vectorization of OpenMP SIMD clone calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013095247.BEA251358F@imap2.suse-dmz.suse.de/mbox/"},{"id":152510,"url":"https://patchwork.plctlab.org/api/1.2/patches/152510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013113541.1954338-1-pan2.li@intel.com/","msgid":"<20231013113541.1954338-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T11:35:41","name":"[v1] RISC-V: Refine run test cases of math autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013113541.1954338-1-pan2.li@intel.com/mbox/"},{"id":152553,"url":"https://patchwork.plctlab.org/api/1.2/patches/152553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de/","msgid":"<20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-13T12:00:55","name":"OMP SIMD inbranch call vectorization for AVX512 style masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de/mbox/"},{"id":152581,"url":"https://patchwork.plctlab.org/api/1.2/patches/152581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72519953-7b2c-5156-485d-75904da5a90a@redhat.com/","msgid":"<72519953-7b2c-5156-485d-75904da5a90a@redhat.com>","list_archive_url":null,"date":"2023-10-13T13:24:24","name":"[COMMITTED,GCC13] PR tree-optimization/111622 - Do not add partial equivalences with no uses.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72519953-7b2c-5156-485d-75904da5a90a@redhat.com/mbox/"},{"id":152700,"url":"https://patchwork.plctlab.org/api/1.2/patches/152700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSmSDSf6kFZcyjKH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T18:53:01","name":"[v2] c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSmSDSf6kFZcyjKH@redhat.com/mbox/"},{"id":152737,"url":"https://patchwork.plctlab.org/api/1.2/patches/152737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-2-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:57","name":"[v18,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-2-kmatsui@gcc.gnu.org/mbox/"},{"id":152738,"url":"https://patchwork.plctlab.org/api/1.2/patches/152738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-3-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:58","name":"[v18,02/40] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-3-kmatsui@gcc.gnu.org/mbox/"},{"id":152739,"url":"https://patchwork.plctlab.org/api/1.2/patches/152739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-4-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:59","name":"[v18,03/40] c++: Accept the use of non-function-like built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-4-kmatsui@gcc.gnu.org/mbox/"},{"id":152740,"url":"https://patchwork.plctlab.org/api/1.2/patches/152740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-5-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:00","name":"[v18,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-5-kmatsui@gcc.gnu.org/mbox/"},{"id":152743,"url":"https://patchwork.plctlab.org/api/1.2/patches/152743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-6-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:01","name":"[v18,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-6-kmatsui@gcc.gnu.org/mbox/"},{"id":152742,"url":"https://patchwork.plctlab.org/api/1.2/patches/152742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-7-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:02","name":"[v18,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-7-kmatsui@gcc.gnu.org/mbox/"},{"id":152741,"url":"https://patchwork.plctlab.org/api/1.2/patches/152741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-8-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:03","name":"[v18,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-8-kmatsui@gcc.gnu.org/mbox/"},{"id":152746,"url":"https://patchwork.plctlab.org/api/1.2/patches/152746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-9-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:04","name":"[v18,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-9-kmatsui@gcc.gnu.org/mbox/"},{"id":152747,"url":"https://patchwork.plctlab.org/api/1.2/patches/152747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-10-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:05","name":"[v18,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-10-kmatsui@gcc.gnu.org/mbox/"},{"id":152745,"url":"https://patchwork.plctlab.org/api/1.2/patches/152745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-11-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:06","name":"[v18,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-11-kmatsui@gcc.gnu.org/mbox/"},{"id":152749,"url":"https://patchwork.plctlab.org/api/1.2/patches/152749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-12-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:07","name":"[v18,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-12-kmatsui@gcc.gnu.org/mbox/"},{"id":152748,"url":"https://patchwork.plctlab.org/api/1.2/patches/152748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-13-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:08","name":"[v18,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-13-kmatsui@gcc.gnu.org/mbox/"},{"id":152750,"url":"https://patchwork.plctlab.org/api/1.2/patches/152750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-14-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:09","name":"[v18,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-14-kmatsui@gcc.gnu.org/mbox/"},{"id":152751,"url":"https://patchwork.plctlab.org/api/1.2/patches/152751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-15-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:10","name":"[v18,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-15-kmatsui@gcc.gnu.org/mbox/"},{"id":152753,"url":"https://patchwork.plctlab.org/api/1.2/patches/152753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-16-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:11","name":"[v18,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-16-kmatsui@gcc.gnu.org/mbox/"},{"id":152752,"url":"https://patchwork.plctlab.org/api/1.2/patches/152752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-17-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:12","name":"[v18,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-17-kmatsui@gcc.gnu.org/mbox/"},{"id":152754,"url":"https://patchwork.plctlab.org/api/1.2/patches/152754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-18-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:13","name":"[v18,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-18-kmatsui@gcc.gnu.org/mbox/"},{"id":152756,"url":"https://patchwork.plctlab.org/api/1.2/patches/152756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-19-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:14","name":"[v18,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-19-kmatsui@gcc.gnu.org/mbox/"},{"id":152755,"url":"https://patchwork.plctlab.org/api/1.2/patches/152755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-20-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:15","name":"[v18,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-20-kmatsui@gcc.gnu.org/mbox/"},{"id":152758,"url":"https://patchwork.plctlab.org/api/1.2/patches/152758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-21-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:16","name":"[v18,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-21-kmatsui@gcc.gnu.org/mbox/"},{"id":152757,"url":"https://patchwork.plctlab.org/api/1.2/patches/152757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-22-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:17","name":"[v18,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-22-kmatsui@gcc.gnu.org/mbox/"},{"id":152759,"url":"https://patchwork.plctlab.org/api/1.2/patches/152759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-23-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:18","name":"[v18,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-23-kmatsui@gcc.gnu.org/mbox/"},{"id":152760,"url":"https://patchwork.plctlab.org/api/1.2/patches/152760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-24-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:19","name":"[v18,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-24-kmatsui@gcc.gnu.org/mbox/"},{"id":152763,"url":"https://patchwork.plctlab.org/api/1.2/patches/152763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-25-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:20","name":"[v18,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-25-kmatsui@gcc.gnu.org/mbox/"},{"id":152762,"url":"https://patchwork.plctlab.org/api/1.2/patches/152762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-26-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:21","name":"[v18,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-26-kmatsui@gcc.gnu.org/mbox/"},{"id":152764,"url":"https://patchwork.plctlab.org/api/1.2/patches/152764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-27-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:22","name":"[v18,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-27-kmatsui@gcc.gnu.org/mbox/"},{"id":152765,"url":"https://patchwork.plctlab.org/api/1.2/patches/152765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-28-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:23","name":"[v18,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-28-kmatsui@gcc.gnu.org/mbox/"},{"id":152766,"url":"https://patchwork.plctlab.org/api/1.2/patches/152766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-29-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:24","name":"[v18,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-29-kmatsui@gcc.gnu.org/mbox/"},{"id":152768,"url":"https://patchwork.plctlab.org/api/1.2/patches/152768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-30-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:25","name":"[v18,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-30-kmatsui@gcc.gnu.org/mbox/"},{"id":152769,"url":"https://patchwork.plctlab.org/api/1.2/patches/152769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-31-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:26","name":"[v18,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-31-kmatsui@gcc.gnu.org/mbox/"},{"id":152770,"url":"https://patchwork.plctlab.org/api/1.2/patches/152770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-32-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:27","name":"[v18,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-32-kmatsui@gcc.gnu.org/mbox/"},{"id":152771,"url":"https://patchwork.plctlab.org/api/1.2/patches/152771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-33-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:28","name":"[v18,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-33-kmatsui@gcc.gnu.org/mbox/"},{"id":152772,"url":"https://patchwork.plctlab.org/api/1.2/patches/152772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-34-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:29","name":"[v18,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-34-kmatsui@gcc.gnu.org/mbox/"},{"id":152774,"url":"https://patchwork.plctlab.org/api/1.2/patches/152774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-35-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:30","name":"[v18,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-35-kmatsui@gcc.gnu.org/mbox/"},{"id":152773,"url":"https://patchwork.plctlab.org/api/1.2/patches/152773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-36-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:31","name":"[v18,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-36-kmatsui@gcc.gnu.org/mbox/"},{"id":152775,"url":"https://patchwork.plctlab.org/api/1.2/patches/152775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-37-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:32","name":"[v18,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-37-kmatsui@gcc.gnu.org/mbox/"},{"id":152776,"url":"https://patchwork.plctlab.org/api/1.2/patches/152776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-38-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:33","name":"[v18,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-38-kmatsui@gcc.gnu.org/mbox/"},{"id":152777,"url":"https://patchwork.plctlab.org/api/1.2/patches/152777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-39-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:34","name":"[v18,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-39-kmatsui@gcc.gnu.org/mbox/"},{"id":152778,"url":"https://patchwork.plctlab.org/api/1.2/patches/152778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-40-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:35","name":"[v18,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-40-kmatsui@gcc.gnu.org/mbox/"},{"id":152779,"url":"https://patchwork.plctlab.org/api/1.2/patches/152779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-41-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:36","name":"[v18,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-41-kmatsui@gcc.gnu.org/mbox/"},{"id":152761,"url":"https://patchwork.plctlab.org/api/1.2/patches/152761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013212840.GA21815@ldh-imac.local/","msgid":"<20231013212840.GA21815@ldh-imac.local>","list_archive_url":null,"date":"2023-10-13T21:28:40","name":"ping: [PATCH] preprocessor: c++: Support `#pragma GCC target'\'' macros [PR87299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013212840.GA21815@ldh-imac.local/mbox/"},{"id":152789,"url":"https://patchwork.plctlab.org/api/1.2/patches/152789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013221552.518072-1-polacek@redhat.com/","msgid":"<20231013221552.518072-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-13T22:15:52","name":"c++: fix truncated diagnostic in C++23 [PR111272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013221552.518072-1-polacek@redhat.com/mbox/"},{"id":152792,"url":"https://patchwork.plctlab.org/api/1.2/patches/152792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-2-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:15","name":"[v19,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-2-kmatsui@gcc.gnu.org/mbox/"},{"id":152793,"url":"https://patchwork.plctlab.org/api/1.2/patches/152793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-3-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:16","name":"[v19,02/40] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-3-kmatsui@gcc.gnu.org/mbox/"},{"id":152794,"url":"https://patchwork.plctlab.org/api/1.2/patches/152794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-4-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:17","name":"[v19,03/40] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-4-kmatsui@gcc.gnu.org/mbox/"},{"id":152842,"url":"https://patchwork.plctlab.org/api/1.2/patches/152842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-5-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:18","name":"[v19,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-5-kmatsui@gcc.gnu.org/mbox/"},{"id":152799,"url":"https://patchwork.plctlab.org/api/1.2/patches/152799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-6-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:19","name":"[v19,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-6-kmatsui@gcc.gnu.org/mbox/"},{"id":152850,"url":"https://patchwork.plctlab.org/api/1.2/patches/152850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-7-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:20","name":"[v19,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-7-kmatsui@gcc.gnu.org/mbox/"},{"id":152804,"url":"https://patchwork.plctlab.org/api/1.2/patches/152804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-8-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:21","name":"[v19,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-8-kmatsui@gcc.gnu.org/mbox/"},{"id":152803,"url":"https://patchwork.plctlab.org/api/1.2/patches/152803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-9-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:22","name":"[v19,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-9-kmatsui@gcc.gnu.org/mbox/"},{"id":152846,"url":"https://patchwork.plctlab.org/api/1.2/patches/152846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-10-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:23","name":"[v19,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-10-kmatsui@gcc.gnu.org/mbox/"},{"id":152857,"url":"https://patchwork.plctlab.org/api/1.2/patches/152857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-11-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:24","name":"[v19,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-11-kmatsui@gcc.gnu.org/mbox/"},{"id":152801,"url":"https://patchwork.plctlab.org/api/1.2/patches/152801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-12-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:25","name":"[v19,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-12-kmatsui@gcc.gnu.org/mbox/"},{"id":152805,"url":"https://patchwork.plctlab.org/api/1.2/patches/152805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-13-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:26","name":"[v19,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-13-kmatsui@gcc.gnu.org/mbox/"},{"id":152813,"url":"https://patchwork.plctlab.org/api/1.2/patches/152813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-14-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:27","name":"[v19,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-14-kmatsui@gcc.gnu.org/mbox/"},{"id":152852,"url":"https://patchwork.plctlab.org/api/1.2/patches/152852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-15-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:28","name":"[v19,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-15-kmatsui@gcc.gnu.org/mbox/"},{"id":152827,"url":"https://patchwork.plctlab.org/api/1.2/patches/152827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-16-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:29","name":"[v19,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-16-kmatsui@gcc.gnu.org/mbox/"},{"id":152834,"url":"https://patchwork.plctlab.org/api/1.2/patches/152834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-17-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:30","name":"[v19,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-17-kmatsui@gcc.gnu.org/mbox/"},{"id":152807,"url":"https://patchwork.plctlab.org/api/1.2/patches/152807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-18-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:31","name":"[v19,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-18-kmatsui@gcc.gnu.org/mbox/"},{"id":152809,"url":"https://patchwork.plctlab.org/api/1.2/patches/152809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-19-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:32","name":"[v19,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-19-kmatsui@gcc.gnu.org/mbox/"},{"id":152853,"url":"https://patchwork.plctlab.org/api/1.2/patches/152853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-20-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:33","name":"[v19,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-20-kmatsui@gcc.gnu.org/mbox/"},{"id":152841,"url":"https://patchwork.plctlab.org/api/1.2/patches/152841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-21-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:34","name":"[v19,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-21-kmatsui@gcc.gnu.org/mbox/"},{"id":152802,"url":"https://patchwork.plctlab.org/api/1.2/patches/152802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-22-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:35","name":"[v19,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-22-kmatsui@gcc.gnu.org/mbox/"},{"id":152854,"url":"https://patchwork.plctlab.org/api/1.2/patches/152854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-23-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:36","name":"[v19,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-23-kmatsui@gcc.gnu.org/mbox/"},{"id":152806,"url":"https://patchwork.plctlab.org/api/1.2/patches/152806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-24-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:37","name":"[v19,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-24-kmatsui@gcc.gnu.org/mbox/"},{"id":152825,"url":"https://patchwork.plctlab.org/api/1.2/patches/152825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-25-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:38","name":"[v19,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-25-kmatsui@gcc.gnu.org/mbox/"},{"id":152800,"url":"https://patchwork.plctlab.org/api/1.2/patches/152800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-26-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:39","name":"[v19,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-26-kmatsui@gcc.gnu.org/mbox/"},{"id":152810,"url":"https://patchwork.plctlab.org/api/1.2/patches/152810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-27-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:40","name":"[v19,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-27-kmatsui@gcc.gnu.org/mbox/"},{"id":152837,"url":"https://patchwork.plctlab.org/api/1.2/patches/152837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-28-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:41","name":"[v19,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-28-kmatsui@gcc.gnu.org/mbox/"},{"id":152795,"url":"https://patchwork.plctlab.org/api/1.2/patches/152795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-29-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:42","name":"[v19,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-29-kmatsui@gcc.gnu.org/mbox/"},{"id":152856,"url":"https://patchwork.plctlab.org/api/1.2/patches/152856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-30-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:43","name":"[v19,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-30-kmatsui@gcc.gnu.org/mbox/"},{"id":152840,"url":"https://patchwork.plctlab.org/api/1.2/patches/152840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-31-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:44","name":"[v19,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-31-kmatsui@gcc.gnu.org/mbox/"},{"id":152808,"url":"https://patchwork.plctlab.org/api/1.2/patches/152808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-32-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:45","name":"[v19,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-32-kmatsui@gcc.gnu.org/mbox/"},{"id":152847,"url":"https://patchwork.plctlab.org/api/1.2/patches/152847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-33-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:46","name":"[v19,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-33-kmatsui@gcc.gnu.org/mbox/"},{"id":152844,"url":"https://patchwork.plctlab.org/api/1.2/patches/152844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-34-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:47","name":"[v19,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-34-kmatsui@gcc.gnu.org/mbox/"},{"id":152851,"url":"https://patchwork.plctlab.org/api/1.2/patches/152851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-35-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:48","name":"[v19,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-35-kmatsui@gcc.gnu.org/mbox/"},{"id":152839,"url":"https://patchwork.plctlab.org/api/1.2/patches/152839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-36-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:49","name":"[v19,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-36-kmatsui@gcc.gnu.org/mbox/"},{"id":152796,"url":"https://patchwork.plctlab.org/api/1.2/patches/152796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-37-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:50","name":"[v19,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-37-kmatsui@gcc.gnu.org/mbox/"},{"id":152849,"url":"https://patchwork.plctlab.org/api/1.2/patches/152849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-38-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:51","name":"[v19,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-38-kmatsui@gcc.gnu.org/mbox/"},{"id":152797,"url":"https://patchwork.plctlab.org/api/1.2/patches/152797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-39-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:52","name":"[v19,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-39-kmatsui@gcc.gnu.org/mbox/"},{"id":152798,"url":"https://patchwork.plctlab.org/api/1.2/patches/152798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-40-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:53","name":"[v19,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-40-kmatsui@gcc.gnu.org/mbox/"},{"id":152848,"url":"https://patchwork.plctlab.org/api/1.2/patches/152848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-41-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:54","name":"[v19,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-41-kmatsui@gcc.gnu.org/mbox/"},{"id":152867,"url":"https://patchwork.plctlab.org/api/1.2/patches/152867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+fa515rWJR1LcL6ad-GBBBLGqmv0b1fwA=DVbK4sRZ7Ng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T23:32:59","name":"libstdc++: Workaround for LLVM-61763 in ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+fa515rWJR1LcL6ad-GBBBLGqmv0b1fwA=DVbK4sRZ7Ng@mail.gmail.com/mbox/"},{"id":152860,"url":"https://patchwork.plctlab.org/api/1.2/patches/152860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSnVmfS6Mi4n6V7C@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-13T23:41:13","name":"Power10: Add options to disable load and store vector pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSnVmfS6Mi4n6V7C@cowardly-lion.the-meissners.org/mbox/"},{"id":152868,"url":"https://patchwork.plctlab.org/api/1.2/patches/152868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014005713.2702564-1-pinskia@gmail.com/","msgid":"<20231014005713.2702564-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-14T00:57:13","name":"MATCH: [PR111432] Simplify `a & (x | CST)` to a when we know that (a & ~CST) == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014005713.2702564-1-pinskia@gmail.com/mbox/"},{"id":152886,"url":"https://patchwork.plctlab.org/api/1.2/patches/152886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014030602.3813735-1-juzhe.zhong@rivai.ai/","msgid":"<20231014030602.3813735-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-14T03:06:02","name":"[Committed] RISC-V: Remove redundant iterators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014030602.3813735-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152915,"url":"https://patchwork.plctlab.org/api/1.2/patches/152915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpPVW+zyc9egEwc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-14T08:20:37","name":"wide-int: Fix estimation of buffer sizes for wide_int printing [PR111800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpPVW+zyc9egEwc@tucnak/mbox/"},{"id":152923,"url":"https://patchwork.plctlab.org/api/1.2/patches/152923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpkVdv/G5isFzXv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-14T09:50:13","name":"wide-int, v2: Fix estimation of buffer sizes for wide_int printing [PR111800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpkVdv/G5isFzXv@tucnak/mbox/"},{"id":152939,"url":"https://patchwork.plctlab.org/api/1.2/patches/152939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122352.1665945-1-ibuclaw@gdcproject.org/","msgid":"<20231014122352.1665945-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-14T12:23:52","name":"[committed] d: Reduce code duplication of writing generated files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122352.1665945-1-ibuclaw@gdcproject.org/mbox/"},{"id":152940,"url":"https://patchwork.plctlab.org/api/1.2/patches/152940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122601.1667638-1-ibuclaw@gdcproject.org/","msgid":"<20231014122601.1667638-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-14T12:26:01","name":"[committed] Fix ICE in set_cell_span, at text-art/table.cc:148 with D front-end and -fanalyzer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122601.1667638-1-ibuclaw@gdcproject.org/mbox/"},{"id":152941,"url":"https://patchwork.plctlab.org/api/1.2/patches/152941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at/","msgid":"<8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at>","list_archive_url":null,"date":"2023-10-14T12:28:30","name":"[C] error for function with external and internal linkage [PR111708]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at/mbox/"},{"id":152954,"url":"https://patchwork.plctlab.org/api/1.2/patches/152954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com/","msgid":"<716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com>","list_archive_url":null,"date":"2023-10-14T19:38:44","name":"[committed] libgomp.fortran/allocate-6.f90: Run with -fdump-tree-gimple (was: [Patch] OpenMP: Add ME support for '\''omp allocate'\'' stack variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com/mbox/"},{"id":152956,"url":"https://patchwork.plctlab.org/api/1.2/patches/152956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com/","msgid":"<507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com>","list_archive_url":null,"date":"2023-10-14T19:43:14","name":"libgomp.texi: Update \"Enabling OpenMP\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com/mbox/"},{"id":152957,"url":"https://patchwork.plctlab.org/api/1.2/patches/152957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f10a9a67-1e27-4c1e-a8c9-052685a02103@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-14T19:51:43","name":"libgomp.texi: Improve \"OpenACC Environment Variables\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f10a9a67-1e27-4c1e-a8c9-052685a02103@codesourcery.com/mbox/"},{"id":152972,"url":"https://patchwork.plctlab.org/api/1.2/patches/152972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com/","msgid":"<01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-14T22:14:29","name":"PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com/mbox/"},{"id":152976,"url":"https://patchwork.plctlab.org/api/1.2/patches/152976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com/","msgid":"<020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-14T23:32:58","name":"Improved RTL expansion of 1LL << x.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com/mbox/"},{"id":152981,"url":"https://patchwork.plctlab.org/api/1.2/patches/152981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-1-pinskia@gmail.com/","msgid":"<20231015011648.1608638-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T01:16:47","name":"[1/2] Fix ICE due to c_safe_arg_type_equiv_p not checking for error_mark node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-1-pinskia@gmail.com/mbox/"},{"id":152980,"url":"https://patchwork.plctlab.org/api/1.2/patches/152980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-2-pinskia@gmail.com/","msgid":"<20231015011648.1608638-2-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T01:16:48","name":"[2/2,c] Fix PR 101364: ICE after error due to diagnose_arglist_conflict not checking for error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-2-pinskia@gmail.com/mbox/"},{"id":152982,"url":"https://patchwork.plctlab.org/api/1.2/patches/152982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015030831.3921333-1-juzhe.zhong@rivai.ai/","msgid":"<20231015030831.3921333-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-15T03:08:31","name":"[Committed] RISC-V: Fix vsingle attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015030831.3921333-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152995,"url":"https://patchwork.plctlab.org/api/1.2/patches/152995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com/","msgid":"<3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com>","list_archive_url":null,"date":"2023-10-15T10:39:50","name":"libgomp.texi: Use present not future tense (was: [Patch] libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com/mbox/"},{"id":152996,"url":"https://patchwork.plctlab.org/api/1.2/patches/152996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com/","msgid":"<7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com>","list_archive_url":null,"date":"2023-10-15T10:42:31","name":"libgomp.texi: Update \"Enabling OpenMP\" + OpenACC / invoke.texi: -fopenacc/-fopenmp update (was: Re: [patch] libgomp.texi: Update \"Enabling OpenMP\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com/mbox/"},{"id":153006,"url":"https://patchwork.plctlab.org/api/1.2/patches/153006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com/","msgid":"<9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:11:45","name":"[PING,^0,v3] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com/mbox/"},{"id":153007,"url":"https://patchwork.plctlab.org/api/1.2/patches/153007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com/","msgid":"<9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:13:24","name":"[PING,^0,v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com/mbox/"},{"id":153008,"url":"https://patchwork.plctlab.org/api/1.2/patches/153008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com/","msgid":"<316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:43:40","name":"[PING,^0,v8,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com/mbox/"},{"id":153009,"url":"https://patchwork.plctlab.org/api/1.2/patches/153009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com/","msgid":"<10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:58:51","name":"[PING,^0,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com/mbox/"},{"id":153022,"url":"https://patchwork.plctlab.org/api/1.2/patches/153022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144052.50FF533ED2@hamza.pair.com/","msgid":"<20231015144052.50FF533ED2@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T14:40:49","name":"[pushed] wwwdocs: conduct: Link creativecommons.org via https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144052.50FF533ED2@hamza.pair.com/mbox/"},{"id":153023,"url":"https://patchwork.plctlab.org/api/1.2/patches/153023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144207.F0A8F33ED2@hamza.pair.com/","msgid":"<20231015144207.F0A8F33ED2@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T14:42:06","name":"[pushed] wwwdocs: gcc-9: Editorial changes to porting_to.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144207.F0A8F33ED2@hamza.pair.com/mbox/"},{"id":153039,"url":"https://patchwork.plctlab.org/api/1.2/patches/153039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015165629.19722-1-vapier@gentoo.org/","msgid":"<20231015165629.19722-1-vapier@gentoo.org>","list_archive_url":null,"date":"2023-10-15T16:56:29","name":"[PATCH/committed] sim: add distclean dep for gnulib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015165629.19722-1-vapier@gentoo.org/mbox/"},{"id":153048,"url":"https://patchwork.plctlab.org/api/1.2/patches/153048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015181644.886680-1-vineetg@rivosinc.com/","msgid":"<20231015181644.886680-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-15T18:16:44","name":"RISC-V/testsuite: add a default march (lacking zfa) to some fp tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015181644.886680-1-vineetg@rivosinc.com/mbox/"},{"id":153074,"url":"https://patchwork.plctlab.org/api/1.2/patches/153074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214241.B37BB33EB9@hamza.pair.com/","msgid":"<20231015214241.B37BB33EB9@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T21:42:39","name":"[pushed] wwwdocs: *: Remove unused buildstat pages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214241.B37BB33EB9@hamza.pair.com/mbox/"},{"id":153075,"url":"https://patchwork.plctlab.org/api/1.2/patches/153075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214627.3470F33ECF@hamza.pair.com/","msgid":"<20231015214627.3470F33ECF@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T21:46:25","name":"[pushed] wwwdocs: buildstat: Don'\''t reference buildstats we no longer carry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214627.3470F33ECF@hamza.pair.com/mbox/"},{"id":153076,"url":"https://patchwork.plctlab.org/api/1.2/patches/153076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015215956.512326-1-pinskia@gmail.com/","msgid":"<20231015215956.512326-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T21:59:56","name":"MATCH: Improve `A CMP 0 ? A : -A` set of patterns to use bitwise_equal_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015215956.512326-1-pinskia@gmail.com/mbox/"},{"id":153078,"url":"https://patchwork.plctlab.org/api/1.2/patches/153078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016000138.2235395-1-pinskia@gmail.com/","msgid":"<20231016000138.2235395-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-16T00:01:38","name":"Improve factor_out_conditional_operation for conversions and constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016000138.2235395-1-pinskia@gmail.com/mbox/"},{"id":153079,"url":"https://patchwork.plctlab.org/api/1.2/patches/153079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-2-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:45","name":"[v20,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-2-kmatsui@gcc.gnu.org/mbox/"},{"id":153081,"url":"https://patchwork.plctlab.org/api/1.2/patches/153081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-3-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:46","name":"[v20,02/40] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-3-kmatsui@gcc.gnu.org/mbox/"},{"id":153083,"url":"https://patchwork.plctlab.org/api/1.2/patches/153083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-4-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:47","name":"[v20,03/40] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-4-kmatsui@gcc.gnu.org/mbox/"},{"id":153116,"url":"https://patchwork.plctlab.org/api/1.2/patches/153116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-5-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:48","name":"[v20,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-5-kmatsui@gcc.gnu.org/mbox/"},{"id":153088,"url":"https://patchwork.plctlab.org/api/1.2/patches/153088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-6-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:49","name":"[v20,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-6-kmatsui@gcc.gnu.org/mbox/"},{"id":153095,"url":"https://patchwork.plctlab.org/api/1.2/patches/153095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-7-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:50","name":"[v20,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-7-kmatsui@gcc.gnu.org/mbox/"},{"id":153117,"url":"https://patchwork.plctlab.org/api/1.2/patches/153117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-8-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:51","name":"[v20,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-8-kmatsui@gcc.gnu.org/mbox/"},{"id":153099,"url":"https://patchwork.plctlab.org/api/1.2/patches/153099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-9-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:52","name":"[v20,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-9-kmatsui@gcc.gnu.org/mbox/"},{"id":153100,"url":"https://patchwork.plctlab.org/api/1.2/patches/153100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-10-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:53","name":"[v20,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-10-kmatsui@gcc.gnu.org/mbox/"},{"id":153087,"url":"https://patchwork.plctlab.org/api/1.2/patches/153087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-11-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:54","name":"[v20,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-11-kmatsui@gcc.gnu.org/mbox/"},{"id":153096,"url":"https://patchwork.plctlab.org/api/1.2/patches/153096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-12-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:55","name":"[v20,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-12-kmatsui@gcc.gnu.org/mbox/"},{"id":153092,"url":"https://patchwork.plctlab.org/api/1.2/patches/153092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-13-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:56","name":"[v20,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-13-kmatsui@gcc.gnu.org/mbox/"},{"id":153106,"url":"https://patchwork.plctlab.org/api/1.2/patches/153106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-14-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:57","name":"[v20,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-14-kmatsui@gcc.gnu.org/mbox/"},{"id":153089,"url":"https://patchwork.plctlab.org/api/1.2/patches/153089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-15-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:58","name":"[v20,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-15-kmatsui@gcc.gnu.org/mbox/"},{"id":153085,"url":"https://patchwork.plctlab.org/api/1.2/patches/153085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-16-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:59","name":"[v20,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-16-kmatsui@gcc.gnu.org/mbox/"},{"id":153091,"url":"https://patchwork.plctlab.org/api/1.2/patches/153091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-17-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:00","name":"[v20,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-17-kmatsui@gcc.gnu.org/mbox/"},{"id":153097,"url":"https://patchwork.plctlab.org/api/1.2/patches/153097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-18-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:01","name":"[v20,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-18-kmatsui@gcc.gnu.org/mbox/"},{"id":153082,"url":"https://patchwork.plctlab.org/api/1.2/patches/153082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-19-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:02","name":"[v20,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-19-kmatsui@gcc.gnu.org/mbox/"},{"id":153090,"url":"https://patchwork.plctlab.org/api/1.2/patches/153090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-20-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:03","name":"[v20,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-20-kmatsui@gcc.gnu.org/mbox/"},{"id":153109,"url":"https://patchwork.plctlab.org/api/1.2/patches/153109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-21-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:04","name":"[v20,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-21-kmatsui@gcc.gnu.org/mbox/"},{"id":153114,"url":"https://patchwork.plctlab.org/api/1.2/patches/153114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-22-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:05","name":"[v20,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-22-kmatsui@gcc.gnu.org/mbox/"},{"id":153115,"url":"https://patchwork.plctlab.org/api/1.2/patches/153115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-23-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:06","name":"[v20,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-23-kmatsui@gcc.gnu.org/mbox/"},{"id":153084,"url":"https://patchwork.plctlab.org/api/1.2/patches/153084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-24-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:07","name":"[v20,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-24-kmatsui@gcc.gnu.org/mbox/"},{"id":153111,"url":"https://patchwork.plctlab.org/api/1.2/patches/153111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-25-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:08","name":"[v20,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-25-kmatsui@gcc.gnu.org/mbox/"},{"id":153103,"url":"https://patchwork.plctlab.org/api/1.2/patches/153103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-26-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:09","name":"[v20,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-26-kmatsui@gcc.gnu.org/mbox/"},{"id":153105,"url":"https://patchwork.plctlab.org/api/1.2/patches/153105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-27-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:10","name":"[v20,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-27-kmatsui@gcc.gnu.org/mbox/"},{"id":153102,"url":"https://patchwork.plctlab.org/api/1.2/patches/153102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-28-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:11","name":"[v20,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-28-kmatsui@gcc.gnu.org/mbox/"},{"id":153104,"url":"https://patchwork.plctlab.org/api/1.2/patches/153104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-29-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:12","name":"[v20,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-29-kmatsui@gcc.gnu.org/mbox/"},{"id":153118,"url":"https://patchwork.plctlab.org/api/1.2/patches/153118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-30-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:13","name":"[v20,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-30-kmatsui@gcc.gnu.org/mbox/"},{"id":153086,"url":"https://patchwork.plctlab.org/api/1.2/patches/153086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-31-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:14","name":"[v20,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-31-kmatsui@gcc.gnu.org/mbox/"},{"id":153112,"url":"https://patchwork.plctlab.org/api/1.2/patches/153112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-32-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:15","name":"[v20,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-32-kmatsui@gcc.gnu.org/mbox/"},{"id":153098,"url":"https://patchwork.plctlab.org/api/1.2/patches/153098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-33-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:16","name":"[v20,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-33-kmatsui@gcc.gnu.org/mbox/"},{"id":153094,"url":"https://patchwork.plctlab.org/api/1.2/patches/153094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-34-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:17","name":"[v20,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-34-kmatsui@gcc.gnu.org/mbox/"},{"id":153101,"url":"https://patchwork.plctlab.org/api/1.2/patches/153101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-35-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:18","name":"[v20,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-35-kmatsui@gcc.gnu.org/mbox/"},{"id":153113,"url":"https://patchwork.plctlab.org/api/1.2/patches/153113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-36-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:19","name":"[v20,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-36-kmatsui@gcc.gnu.org/mbox/"},{"id":153080,"url":"https://patchwork.plctlab.org/api/1.2/patches/153080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-37-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:20","name":"[v20,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-37-kmatsui@gcc.gnu.org/mbox/"},{"id":153108,"url":"https://patchwork.plctlab.org/api/1.2/patches/153108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-38-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:21","name":"[v20,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-38-kmatsui@gcc.gnu.org/mbox/"},{"id":153110,"url":"https://patchwork.plctlab.org/api/1.2/patches/153110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-39-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:22","name":"[v20,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-39-kmatsui@gcc.gnu.org/mbox/"},{"id":153093,"url":"https://patchwork.plctlab.org/api/1.2/patches/153093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-40-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:23","name":"[v20,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-40-kmatsui@gcc.gnu.org/mbox/"},{"id":153107,"url":"https://patchwork.plctlab.org/api/1.2/patches/153107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-41-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:24","name":"[v20,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-41-kmatsui@gcc.gnu.org/mbox/"},{"id":153135,"url":"https://patchwork.plctlab.org/api/1.2/patches/153135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-2-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:12","name":"[1/3] LoongArch:Implement avg and sad standard names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-2-xujiahao@loongson.cn/mbox/"},{"id":153136,"url":"https://patchwork.plctlab.org/api/1.2/patches/153136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-3-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:13","name":"[2/3] LoongArch:Implement vec_widen standard names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-3-xujiahao@loongson.cn/mbox/"},{"id":153134,"url":"https://patchwork.plctlab.org/api/1.2/patches/153134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-4-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:14","name":"[3/3] LoongArch:Implement the new vector cost model framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-4-xujiahao@loongson.cn/mbox/"},{"id":153144,"url":"https://patchwork.plctlab.org/api/1.2/patches/153144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016023357.3394538-1-pinskia@gmail.com/","msgid":"<20231016023357.3394538-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-16T02:33:57","name":"[PR31531] MATCH: Improve ~a < ~b and ~a < CST, allow a nop cast inbetween ~ and a/b","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016023357.3394538-1-pinskia@gmail.com/mbox/"},{"id":153174,"url":"https://patchwork.plctlab.org/api/1.2/patches/153174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+cCGjnitL1eoxnkA0XML-NKqwJCUpx1dZiXAfezX-w1Tg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T03:55:36","name":"[v2] libstdc++: Workaround for LLVM-61763 in ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+cCGjnitL1eoxnkA0XML-NKqwJCUpx1dZiXAfezX-w1Tg@mail.gmail.com/mbox/"},{"id":153170,"url":"https://patchwork.plctlab.org/api/1.2/patches/153170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016035709.1390097-1-juzhe.zhong@rivai.ai/","msgid":"<20231016035709.1390097-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T03:57:09","name":"RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016035709.1390097-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153175,"url":"https://patchwork.plctlab.org/api/1.2/patches/153175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016050412.9960-1-ishitatsuyuki@gmail.com/","msgid":"<20231016050412.9960-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-10-16T05:04:12","name":"Do not prepend target triple to -fuse-ld=lld,mold.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016050412.9960-1-ishitatsuyuki@gmail.com/mbox/"},{"id":153208,"url":"https://patchwork.plctlab.org/api/1.2/patches/153208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-2-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:38","name":"[1/3] Initial Clear Water Forest Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-2-haochen.jiang@intel.com/mbox/"},{"id":153207,"url":"https://patchwork.plctlab.org/api/1.2/patches/153207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-3-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:39","name":"[2/3] x86: Add m_CORE_HYBRID for hybrid clients tuning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-3-haochen.jiang@intel.com/mbox/"},{"id":153209,"url":"https://patchwork.plctlab.org/api/1.2/patches/153209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-4-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:40","name":"[3/3] Initial Panther Lake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-4-haochen.jiang@intel.com/mbox/"},{"id":153258,"url":"https://patchwork.plctlab.org/api/1.2/patches/153258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016082715.3417414-1-juzhe.zhong@rivai.ai/","msgid":"<20231016082715.3417414-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T08:27:15","name":"RISC-V: Use VLS modes if the NITERS is known and smaller than VLS mode elements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016082715.3417414-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153278,"url":"https://patchwork.plctlab.org/api/1.2/patches/153278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com/","msgid":"<928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com>","list_archive_url":null,"date":"2023-10-16T09:18:45","name":"nvptx: Use fatal_error when -march= is missing not an assert [PR111093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com/mbox/"},{"id":153285,"url":"https://patchwork.plctlab.org/api/1.2/patches/153285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310160141130.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-10-16T09:41:26","name":"[RFA] PR target/111815: VAX: Only accept the index scaler as the RHS operand to ASHIFT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310160141130.5892@tpp.orcam.me.uk/mbox/"},{"id":153329,"url":"https://patchwork.plctlab.org/api/1.2/patches/153329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016110256.D4FF03858422@sourceware.org/","msgid":"<20231016110256.D4FF03858422@sourceware.org>","list_archive_url":null,"date":"2023-10-16T11:02:29","name":"tree-optimization/111807 - ICE in verify_sra_access_forest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016110256.D4FF03858422@sourceware.org/mbox/"},{"id":153343,"url":"https://patchwork.plctlab.org/api/1.2/patches/153343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016112013.512552-1-stefansf@linux.ibm.com/","msgid":"<20231016112013.512552-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-16T11:20:13","name":"s390: Fix expander popcountv8hi2_vx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016112013.512552-1-stefansf@linux.ibm.com/mbox/"},{"id":153349,"url":"https://patchwork.plctlab.org/api/1.2/patches/153349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016113108.877163-1-juzhe.zhong@rivai.ai/","msgid":"<20231016113108.877163-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T11:31:08","name":"[V2] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016113108.877163-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153365,"url":"https://patchwork.plctlab.org/api/1.2/patches/153365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898291CAEA27140073ADE93983D7A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T12:27:05","name":"[v2] AArch64: Add inline memmove expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898291CAEA27140073ADE93983D7A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":153406,"url":"https://patchwork.plctlab.org/api/1.2/patches/153406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/B5F16FC8-9E24-4826-9B7D-42404146DC27@pushface.org/","msgid":"","list_archive_url":null,"date":"2023-10-16T13:32:43","name":"Fix PR ada/111813 (Inconsistent limit in Ada.Calendar.Formatting)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/B5F16FC8-9E24-4826-9B7D-42404146DC27@pushface.org/mbox/"},{"id":153483,"url":"https://patchwork.plctlab.org/api/1.2/patches/153483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016141446.1942361-1-juzhe.zhong@rivai.ai/","msgid":"<20231016141446.1942361-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T14:14:46","name":"[V3] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016141446.1942361-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153493,"url":"https://patchwork.plctlab.org/api/1.2/patches/153493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016145250.139806-1-lehua.ding@rivai.ai/","msgid":"<20231016145250.139806-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-16T14:52:50","name":"RISC-V: Refactor and cleanup vsetvl pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016145250.139806-1-lehua.ding@rivai.ai/mbox/"},{"id":153495,"url":"https://patchwork.plctlab.org/api/1.2/patches/153495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016151048.1238073-1-jason@redhat.com/","msgid":"<20231016151048.1238073-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-16T15:10:48","name":"[pushed] c++: improve fold-expr location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016151048.1238073-1-jason@redhat.com/mbox/"},{"id":153695,"url":"https://patchwork.plctlab.org/api/1.2/patches/153695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a663b83c-356a-410c-871b-1897d12fd76a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T17:11:46","name":"fortran/intrinsic.texi: Add '\''passed by value'\'' to signal handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a663b83c-356a-410c-871b-1897d12fd76a@codesourcery.com/mbox/"},{"id":153712,"url":"https://patchwork.plctlab.org/api/1.2/patches/153712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016180107.2019608-1-manolis.tsamis@vrull.eu/","msgid":"<20231016180107.2019608-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-10-16T18:01:07","name":"[v7] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016180107.2019608-1-manolis.tsamis@vrull.eu/mbox/"},{"id":153714,"url":"https://patchwork.plctlab.org/api/1.2/patches/153714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182138.1304513-1-maskray@google.com/","msgid":"<20231016182138.1304513-1-maskray@google.com>","list_archive_url":null,"date":"2023-10-16T18:21:38","name":"[v5] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182138.1304513-1-maskray@google.com/mbox/"},{"id":153716,"url":"https://patchwork.plctlab.org/api/1.2/patches/153716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182447.bticawp4aps7tsso@google.com/","msgid":"<20231016182447.bticawp4aps7tsso@google.com>","list_archive_url":null,"date":"2023-10-16T18:24:47","name":"[v5] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182447.bticawp4aps7tsso@google.com/mbox/"},{"id":153721,"url":"https://patchwork.plctlab.org/api/1.2/patches/153721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-327edd0e-7e3a-45b6-9546-0df8a1315f96-1697483503726@3c-app-gmx-bap45/","msgid":"","list_archive_url":null,"date":"2023-10-16T19:11:43","name":"Fortran: out of bounds access with nested implied-do IO [PR111837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-327edd0e-7e3a-45b6-9546-0df8a1315f96-1697483503726@3c-app-gmx-bap45/mbox/"},{"id":153723,"url":"https://patchwork.plctlab.org/api/1.2/patches/153723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016194800.936405-1-vineetg@rivosinc.com/","msgid":"<20231016194800.936405-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-16T19:48:00","name":"[COMMITTED] RISC-V/testsuite: add a default march (lacking zfa) to some fp tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016194800.936405-1-vineetg@rivosinc.com/mbox/"},{"id":153727,"url":"https://patchwork.plctlab.org/api/1.2/patches/153727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com/","msgid":"<26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com>","list_archive_url":null,"date":"2023-10-16T20:04:47","name":"[committed] RISC-V: NFC: Move scalar block move expansion code into riscv-string.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com/mbox/"},{"id":153803,"url":"https://patchwork.plctlab.org/api/1.2/patches/153803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231028.60866-1-dmalcolm@redhat.com/","msgid":"<20231016231028.60866-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-16T23:10:28","name":"[pushed] diagnostics: fix missing initialization of context->extra_output_kind","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231028.60866-1-dmalcolm@redhat.com/mbox/"},{"id":153804,"url":"https://patchwork.plctlab.org/api/1.2/patches/153804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231032.60929-1-dmalcolm@redhat.com/","msgid":"<20231016231032.60929-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-16T23:10:32","name":"[pushed] diagnostics: special-case -fdiagnostics-text-art-charset=ascii for LANG=C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231032.60929-1-dmalcolm@redhat.com/mbox/"},{"id":153805,"url":"https://patchwork.plctlab.org/api/1.2/patches/153805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com/","msgid":"<6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com>","list_archive_url":null,"date":"2023-10-16T23:16:55","name":"[committed] Fix minor problem in stack probing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com/mbox/"},{"id":153806,"url":"https://patchwork.plctlab.org/api/1.2/patches/153806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232038.353641-1-juzhe.zhong@rivai.ai/","msgid":"<20231016232038.353641-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T23:20:38","name":"[V4] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232038.353641-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153819,"url":"https://patchwork.plctlab.org/api/1.2/patches/153819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232939.91393-1-egallager@gcc.gnu.org/","msgid":"<20231016232939.91393-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T23:29:40","name":"Add files to discourage submissions of PRs to the GitHub mirror.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232939.91393-1-egallager@gcc.gnu.org/mbox/"},{"id":153825,"url":"https://patchwork.plctlab.org/api/1.2/patches/153825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017002328.3165172-1-ibuclaw@gdcproject.org/","msgid":"<20231017002328.3165172-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-17T00:23:28","name":"[committed] d: Forbid taking the address of an intrinsic with no implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017002328.3165172-1-ibuclaw@gdcproject.org/mbox/"},{"id":153833,"url":"https://patchwork.plctlab.org/api/1.2/patches/153833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS3X2OsF1uE/DRW4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T00:39:52","name":"[v3] c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS3X2OsF1uE/DRW4@redhat.com/mbox/"},{"id":153897,"url":"https://patchwork.plctlab.org/api/1.2/patches/153897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017051327.110300-1-hongtao.liu@intel.com/","msgid":"<20231017051327.110300-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-17T05:13:27","name":"Support 32/64-bit vectorization for _Float16 fma related operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017051327.110300-1-hongtao.liu@intel.com/mbox/"},{"id":153928,"url":"https://patchwork.plctlab.org/api/1.2/patches/153928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017062640.9AACF3858C3A@sourceware.org/","msgid":"<20231017062640.9AACF3858C3A@sourceware.org>","list_archive_url":null,"date":"2023-10-17T06:26:07","name":"middle-end/111818 - failed DECL_NOT_GIMPLE_REG_P setting of volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017062640.9AACF3858C3A@sourceware.org/mbox/"},{"id":153929,"url":"https://patchwork.plctlab.org/api/1.2/patches/153929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017064324.1023901-1-juzhe.zhong@rivai.ai/","msgid":"<20231017064324.1023901-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-17T06:43:24","name":"[V4] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017064324.1023901-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153951,"url":"https://patchwork.plctlab.org/api/1.2/patches/153951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017073039.1485182-1-juzhe.zhong@rivai.ai/","msgid":"<20231017073039.1485182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-17T07:30:39","name":"RISC-V: Enable more tests for dynamic LMUL and bug fix[PR111832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017073039.1485182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153955,"url":"https://patchwork.plctlab.org/api/1.2/patches/153955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com/","msgid":"<33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com>","list_archive_url":null,"date":"2023-10-17T07:47:38","name":"fortran/intrinsic.texi: Improve SIGNAL intrinsic entry (was: [patch] fortran/intrinsic.texi: Add '\''passed by value'\'' to signal handler)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com/mbox/"},{"id":153960,"url":"https://patchwork.plctlab.org/api/1.2/patches/153960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS5B3eGzU6A8nMqW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-17T08:12:13","name":"wide-int-print: Don'\''t print large numbers hexadecimally for print_dec{,s,u}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS5B3eGzU6A8nMqW@tucnak/mbox/"},{"id":154021,"url":"https://patchwork.plctlab.org/api/1.2/patches/154021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de/","msgid":"<1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de>","list_archive_url":null,"date":"2023-10-17T09:52:17","name":"[avr,committed] Implement fma, fmal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de/mbox/"},{"id":154023,"url":"https://patchwork.plctlab.org/api/1.2/patches/154023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017095738.1081807-1-lehua.ding@rivai.ai/","msgid":"<20231017095738.1081807-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T09:57:38","name":"RISC-V: Fix failed testcase when use -cmodel=medany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017095738.1081807-1-lehua.ding@rivai.ai/mbox/"},{"id":154053,"url":"https://patchwork.plctlab.org/api/1.2/patches/154053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/652e636e.170a0220.9f5ea.3365@mx.google.com/","msgid":"<652e636e.170a0220.9f5ea.3365@mx.google.com>","list_archive_url":null,"date":"2023-10-17T10:35:21","name":"c++: Add missing auto_diagnostic_groups to constexpr.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/652e636e.170a0220.9f5ea.3365@mx.google.com/mbox/"},{"id":154089,"url":"https://patchwork.plctlab.org/api/1.2/patches/154089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-2-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:32","name":"[v21,01/30] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-2-kmatsui@gcc.gnu.org/mbox/"},{"id":154090,"url":"https://patchwork.plctlab.org/api/1.2/patches/154090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-3-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:33","name":"[v21,02/30] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-3-kmatsui@gcc.gnu.org/mbox/"},{"id":154098,"url":"https://patchwork.plctlab.org/api/1.2/patches/154098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-4-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:34","name":"[v21,03/30] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-4-kmatsui@gcc.gnu.org/mbox/"},{"id":154111,"url":"https://patchwork.plctlab.org/api/1.2/patches/154111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-5-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:35","name":"[v21,04/30] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-5-kmatsui@gcc.gnu.org/mbox/"},{"id":154102,"url":"https://patchwork.plctlab.org/api/1.2/patches/154102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-6-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:36","name":"[v21,05/30] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-6-kmatsui@gcc.gnu.org/mbox/"},{"id":154114,"url":"https://patchwork.plctlab.org/api/1.2/patches/154114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-7-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:37","name":"[v21,06/30] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-7-kmatsui@gcc.gnu.org/mbox/"},{"id":154110,"url":"https://patchwork.plctlab.org/api/1.2/patches/154110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-8-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:38","name":"[v21,07/30] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-8-kmatsui@gcc.gnu.org/mbox/"},{"id":154101,"url":"https://patchwork.plctlab.org/api/1.2/patches/154101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-9-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:39","name":"[v21,08/30] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-9-kmatsui@gcc.gnu.org/mbox/"},{"id":154117,"url":"https://patchwork.plctlab.org/api/1.2/patches/154117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-10-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:40","name":"[v21,09/30] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-10-kmatsui@gcc.gnu.org/mbox/"},{"id":154112,"url":"https://patchwork.plctlab.org/api/1.2/patches/154112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-11-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:41","name":"[v21,10/30] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-11-kmatsui@gcc.gnu.org/mbox/"},{"id":154124,"url":"https://patchwork.plctlab.org/api/1.2/patches/154124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-12-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:42","name":"[v21,11/30] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-12-kmatsui@gcc.gnu.org/mbox/"},{"id":154127,"url":"https://patchwork.plctlab.org/api/1.2/patches/154127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-13-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:43","name":"[v21,12/30] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-13-kmatsui@gcc.gnu.org/mbox/"},{"id":154109,"url":"https://patchwork.plctlab.org/api/1.2/patches/154109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-14-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:44","name":"[v21,13/30] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-14-kmatsui@gcc.gnu.org/mbox/"},{"id":154121,"url":"https://patchwork.plctlab.org/api/1.2/patches/154121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-15-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:45","name":"[v21,14/30] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-15-kmatsui@gcc.gnu.org/mbox/"},{"id":154104,"url":"https://patchwork.plctlab.org/api/1.2/patches/154104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-16-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:46","name":"[v21,15/30] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-16-kmatsui@gcc.gnu.org/mbox/"},{"id":154145,"url":"https://patchwork.plctlab.org/api/1.2/patches/154145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-17-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:47","name":"[v21,16/30] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-17-kmatsui@gcc.gnu.org/mbox/"},{"id":154142,"url":"https://patchwork.plctlab.org/api/1.2/patches/154142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-18-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:48","name":"[v21,17/30] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-18-kmatsui@gcc.gnu.org/mbox/"},{"id":154151,"url":"https://patchwork.plctlab.org/api/1.2/patches/154151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-19-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:49","name":"[v21,18/30] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-19-kmatsui@gcc.gnu.org/mbox/"},{"id":154119,"url":"https://patchwork.plctlab.org/api/1.2/patches/154119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-20-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:50","name":"[v21,19/30] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-20-kmatsui@gcc.gnu.org/mbox/"},{"id":154108,"url":"https://patchwork.plctlab.org/api/1.2/patches/154108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-21-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:51","name":"[v21,20/30] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-21-kmatsui@gcc.gnu.org/mbox/"},{"id":154134,"url":"https://patchwork.plctlab.org/api/1.2/patches/154134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-22-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:52","name":"[v21,21/30] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-22-kmatsui@gcc.gnu.org/mbox/"},{"id":154138,"url":"https://patchwork.plctlab.org/api/1.2/patches/154138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-23-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:53","name":"[v21,22/30] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-23-kmatsui@gcc.gnu.org/mbox/"},{"id":154148,"url":"https://patchwork.plctlab.org/api/1.2/patches/154148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-24-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:54","name":"[v21,23/30] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-24-kmatsui@gcc.gnu.org/mbox/"},{"id":154097,"url":"https://patchwork.plctlab.org/api/1.2/patches/154097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-25-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:55","name":"[v21,24/30] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-25-kmatsui@gcc.gnu.org/mbox/"},{"id":154132,"url":"https://patchwork.plctlab.org/api/1.2/patches/154132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-26-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:56","name":"[v21,25/30] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-26-kmatsui@gcc.gnu.org/mbox/"},{"id":154120,"url":"https://patchwork.plctlab.org/api/1.2/patches/154120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-27-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:57","name":"[v21,26/30] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-27-kmatsui@gcc.gnu.org/mbox/"},{"id":154125,"url":"https://patchwork.plctlab.org/api/1.2/patches/154125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-28-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:58","name":"[v21,27/30] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-28-kmatsui@gcc.gnu.org/mbox/"},{"id":154131,"url":"https://patchwork.plctlab.org/api/1.2/patches/154131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-29-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:59","name":"[v21,28/30] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-29-kmatsui@gcc.gnu.org/mbox/"},{"id":154115,"url":"https://patchwork.plctlab.org/api/1.2/patches/154115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-30-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:28:00","name":"[v21,29/30] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-30-kmatsui@gcc.gnu.org/mbox/"},{"id":154099,"url":"https://patchwork.plctlab.org/api/1.2/patches/154099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-31-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:28:01","name":"[v21,30/30] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-31-kmatsui@gcc.gnu.org/mbox/"},{"id":154091,"url":"https://patchwork.plctlab.org/api/1.2/patches/154091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-2-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:47","name":"[V2,01/14] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-2-lehua.ding@rivai.ai/mbox/"},{"id":154095,"url":"https://patchwork.plctlab.org/api/1.2/patches/154095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-3-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:48","name":"[V2,02/14] RISC-V: P2: Refactor and cleanup demand system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-3-lehua.ding@rivai.ai/mbox/"},{"id":154092,"url":"https://patchwork.plctlab.org/api/1.2/patches/154092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-4-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:49","name":"[V2,03/14] RISC-V: P3: Refactor vector_infos_manager","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-4-lehua.ding@rivai.ai/mbox/"},{"id":154094,"url":"https://patchwork.plctlab.org/api/1.2/patches/154094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-5-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:50","name":"[V2,04/14] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-5-lehua.ding@rivai.ai/mbox/"},{"id":154093,"url":"https://patchwork.plctlab.org/api/1.2/patches/154093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-6-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:51","name":"[V2,05/14] RISC-V: P5: combine phase 1 and 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-6-lehua.ding@rivai.ai/mbox/"},{"id":154100,"url":"https://patchwork.plctlab.org/api/1.2/patches/154100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-7-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:52","name":"[V2,06/14] RISC-V: P6: Add computing reaching definition data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-7-lehua.ding@rivai.ai/mbox/"},{"id":154096,"url":"https://patchwork.plctlab.org/api/1.2/patches/154096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-8-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:53","name":"[V2,07/14] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-8-lehua.ding@rivai.ai/mbox/"},{"id":154106,"url":"https://patchwork.plctlab.org/api/1.2/patches/154106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-9-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-9-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:54","name":"[V2,08/14] RISC-V: P8: Unified insert and delete of vsetvl insn into Phase 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-9-lehua.ding@rivai.ai/mbox/"},{"id":154103,"url":"https://patchwork.plctlab.org/api/1.2/patches/154103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-10-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-10-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:55","name":"[V2,09/14] RISC-V: P9: Cleanup post optimize phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-10-lehua.ding@rivai.ai/mbox/"},{"id":154118,"url":"https://patchwork.plctlab.org/api/1.2/patches/154118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-11-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-11-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:56","name":"[V2,10/14] RISC-V: P10: Cleanup helper functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-11-lehua.ding@rivai.ai/mbox/"},{"id":154113,"url":"https://patchwork.plctlab.org/api/1.2/patches/154113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-12-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-12-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:57","name":"[V2,11/14] RISC-V: P11: Adjust vector_block_info to vsetvl_block_info class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-12-lehua.ding@rivai.ai/mbox/"},{"id":154105,"url":"https://patchwork.plctlab.org/api/1.2/patches/154105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-13-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-13-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:58","name":"[V2,12/14] RISC-V: P12: Delete riscv-vsetvl.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-13-lehua.ding@rivai.ai/mbox/"},{"id":154128,"url":"https://patchwork.plctlab.org/api/1.2/patches/154128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-14-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-14-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:59","name":"[V2,13/14] RISC-V: P13: Reorganize functions used to modify RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-14-lehua.ding@rivai.ai/mbox/"},{"id":154123,"url":"https://patchwork.plctlab.org/api/1.2/patches/154123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-15-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-15-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:35:00","name":"[V2,14/14] RISC-V: P14: Adjust and add testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-15-lehua.ding@rivai.ai/mbox/"},{"id":154130,"url":"https://patchwork.plctlab.org/api/1.2/patches/154130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-2-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:22","name":"[v22,01/31] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-2-kmatsui@gcc.gnu.org/mbox/"},{"id":154107,"url":"https://patchwork.plctlab.org/api/1.2/patches/154107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-3-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:23","name":"[v22,02/31] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-3-kmatsui@gcc.gnu.org/mbox/"},{"id":154137,"url":"https://patchwork.plctlab.org/api/1.2/patches/154137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-4-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:24","name":"[v22,03/31] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-4-kmatsui@gcc.gnu.org/mbox/"},{"id":154155,"url":"https://patchwork.plctlab.org/api/1.2/patches/154155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-5-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:25","name":"[v22,04/31] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-5-kmatsui@gcc.gnu.org/mbox/"},{"id":154116,"url":"https://patchwork.plctlab.org/api/1.2/patches/154116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-6-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:26","name":"[v22,05/31] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-6-kmatsui@gcc.gnu.org/mbox/"},{"id":154133,"url":"https://patchwork.plctlab.org/api/1.2/patches/154133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-7-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:27","name":"[v22,06/31] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-7-kmatsui@gcc.gnu.org/mbox/"},{"id":154122,"url":"https://patchwork.plctlab.org/api/1.2/patches/154122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-8-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:28","name":"[v22,07/31] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-8-kmatsui@gcc.gnu.org/mbox/"},{"id":154135,"url":"https://patchwork.plctlab.org/api/1.2/patches/154135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-9-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:29","name":"[v22,08/31] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-9-kmatsui@gcc.gnu.org/mbox/"},{"id":154153,"url":"https://patchwork.plctlab.org/api/1.2/patches/154153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-10-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:30","name":"[v22,09/31] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-10-kmatsui@gcc.gnu.org/mbox/"},{"id":154141,"url":"https://patchwork.plctlab.org/api/1.2/patches/154141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-11-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:31","name":"[v22,10/31] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-11-kmatsui@gcc.gnu.org/mbox/"},{"id":154162,"url":"https://patchwork.plctlab.org/api/1.2/patches/154162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-12-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:32","name":"[v22,11/31] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-12-kmatsui@gcc.gnu.org/mbox/"},{"id":154129,"url":"https://patchwork.plctlab.org/api/1.2/patches/154129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-13-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:33","name":"[v22,12/31] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-13-kmatsui@gcc.gnu.org/mbox/"},{"id":154154,"url":"https://patchwork.plctlab.org/api/1.2/patches/154154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-14-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:34","name":"[v22,13/31] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-14-kmatsui@gcc.gnu.org/mbox/"},{"id":154143,"url":"https://patchwork.plctlab.org/api/1.2/patches/154143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-15-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:35","name":"[v22,14/31] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-15-kmatsui@gcc.gnu.org/mbox/"},{"id":154157,"url":"https://patchwork.plctlab.org/api/1.2/patches/154157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-16-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:36","name":"[v22,15/31] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-16-kmatsui@gcc.gnu.org/mbox/"},{"id":154147,"url":"https://patchwork.plctlab.org/api/1.2/patches/154147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-17-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:37","name":"[v22,16/31] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-17-kmatsui@gcc.gnu.org/mbox/"},{"id":154159,"url":"https://patchwork.plctlab.org/api/1.2/patches/154159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-18-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:38","name":"[v22,17/31] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-18-kmatsui@gcc.gnu.org/mbox/"},{"id":154152,"url":"https://patchwork.plctlab.org/api/1.2/patches/154152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-19-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:39","name":"[v22,18/31] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-19-kmatsui@gcc.gnu.org/mbox/"},{"id":154144,"url":"https://patchwork.plctlab.org/api/1.2/patches/154144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-20-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:40","name":"[v22,19/31] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-20-kmatsui@gcc.gnu.org/mbox/"},{"id":154158,"url":"https://patchwork.plctlab.org/api/1.2/patches/154158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-21-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:41","name":"[v22,20/31] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-21-kmatsui@gcc.gnu.org/mbox/"},{"id":154136,"url":"https://patchwork.plctlab.org/api/1.2/patches/154136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-22-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:42","name":"[v22,21/31] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-22-kmatsui@gcc.gnu.org/mbox/"},{"id":154160,"url":"https://patchwork.plctlab.org/api/1.2/patches/154160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-23-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:43","name":"[v22,22/31] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-23-kmatsui@gcc.gnu.org/mbox/"},{"id":154140,"url":"https://patchwork.plctlab.org/api/1.2/patches/154140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-24-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:44","name":"[v22,23/31] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-24-kmatsui@gcc.gnu.org/mbox/"},{"id":154146,"url":"https://patchwork.plctlab.org/api/1.2/patches/154146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-25-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:45","name":"[v22,24/31] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-25-kmatsui@gcc.gnu.org/mbox/"},{"id":154156,"url":"https://patchwork.plctlab.org/api/1.2/patches/154156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-26-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:46","name":"[v22,25/31] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-26-kmatsui@gcc.gnu.org/mbox/"},{"id":154150,"url":"https://patchwork.plctlab.org/api/1.2/patches/154150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-27-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:47","name":"[v22,26/31] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-27-kmatsui@gcc.gnu.org/mbox/"},{"id":154126,"url":"https://patchwork.plctlab.org/api/1.2/patches/154126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-28-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:48","name":"[v22,27/31] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-28-kmatsui@gcc.gnu.org/mbox/"},{"id":154161,"url":"https://patchwork.plctlab.org/api/1.2/patches/154161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-29-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:49","name":"[v22,28/31] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-29-kmatsui@gcc.gnu.org/mbox/"},{"id":154139,"url":"https://patchwork.plctlab.org/api/1.2/patches/154139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-30-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:50","name":"[v22,29/31] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-30-kmatsui@gcc.gnu.org/mbox/"},{"id":154149,"url":"https://patchwork.plctlab.org/api/1.2/patches/154149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-31-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:51","name":"[v22,30/31] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-31-kmatsui@gcc.gnu.org/mbox/"},{"id":154163,"url":"https://patchwork.plctlab.org/api/1.2/patches/154163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-32-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:52","name":"[v22,31/31] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-32-kmatsui@gcc.gnu.org/mbox/"},{"id":154250,"url":"https://patchwork.plctlab.org/api/1.2/patches/154250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017122742.0FFAB385C6DB@sourceware.org/","msgid":"<20231017122742.0FFAB385C6DB@sourceware.org>","list_archive_url":null,"date":"2023-10-17T12:27:11","name":"tree-optimization/111846 - put simd-clone-info into SLP tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017122742.0FFAB385C6DB@sourceware.org/mbox/"},{"id":154265,"url":"https://patchwork.plctlab.org/api/1.2/patches/154265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com/","msgid":"<007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-17T13:08:57","name":"[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com/mbox/"},{"id":154294,"url":"https://patchwork.plctlab.org/api/1.2/patches/154294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com/","msgid":"<319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com>","list_archive_url":null,"date":"2023-10-17T13:21:56","name":"[v10] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com/mbox/"},{"id":154300,"url":"https://patchwork.plctlab.org/api/1.2/patches/154300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017140706.21281-1-xry111@xry111.site/","msgid":"<20231017140706.21281-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-17T14:06:47","name":"LoongArch: Use fcmp.caf.s instead of movgr2cf for zeroing a fcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017140706.21281-1-xry111@xry111.site/mbox/"},{"id":154408,"url":"https://patchwork.plctlab.org/api/1.2/patches/154408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017180728.11846-1-vineetg@rivosinc.com/","msgid":"<20231017180728.11846-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T18:07:28","name":"RISC-V/testsuite/pr111466.c: fix expected output to not detect SEXT.W","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017180728.11846-1-vineetg@rivosinc.com/mbox/"},{"id":154417,"url":"https://patchwork.plctlab.org/api/1.2/patches/154417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017185153.90833-1-vineetg@rivosinc.com/","msgid":"<20231017185153.90833-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T18:51:53","name":"[v2] RISC-V/testsuite/pr111466.c: update test and expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017185153.90833-1-vineetg@rivosinc.com/mbox/"},{"id":154425,"url":"https://patchwork.plctlab.org/api/1.2/patches/154425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com/","msgid":"<022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-17T19:05:49","name":"[x86] PR target/110511: Fix reg allocation for widening multiplications.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com/mbox/"},{"id":154491,"url":"https://patchwork.plctlab.org/api/1.2/patches/154491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017201425.98668-1-vineetg@rivosinc.com/","msgid":"<20231017201425.98668-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T20:14:25","name":"[COMMITTED] RISC-V/testsuite/pr111466.c: update test and expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017201425.98668-1-vineetg@rivosinc.com/mbox/"},{"id":154519,"url":"https://patchwork.plctlab.org/api/1.2/patches/154519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yiPmkNmgUNDrh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:00","name":"[01/11] rtl-ssa: Fix bug in function_info::add_insn_after","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yiPmkNmgUNDrh@arm.com/mbox/"},{"id":154524,"url":"https://patchwork.plctlab.org/api/1.2/patches/154524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yomVmZjy4PJK1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:26","name":"[02/11] rtl-ssa: Add drop_memory_access helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yomVmZjy4PJK1@arm.com/mbox/"},{"id":154525,"url":"https://patchwork.plctlab.org/api/1.2/patches/154525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yvoPreGQ+BDt5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:54","name":"[03/11] rtl-ssa: Add entry point to allow re-parenting uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yvoPreGQ+BDt5@arm.com/mbox/"},{"id":154526,"url":"https://patchwork.plctlab.org/api/1.2/patches/154526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y4oIFl/ju3DZu@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:47:30","name":"[04/11] rtl-ssa: Support inferring uses of mem in change_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y4oIFl/ju3DZu@arm.com/mbox/"},{"id":154527,"url":"https://patchwork.plctlab.org/api/1.2/patches/154527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y+bf7KQk28SIH@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:47:53","name":"[05/11] rtl-ssa: Support for inserting new insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y+bf7KQk28SIH@arm.com/mbox/"},{"id":154528,"url":"https://patchwork.plctlab.org/api/1.2/patches/154528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zE+uo4mdL6dr4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:48:19","name":"[06/11] haifa-sched: Allow for NOTE_INSN_DELETED at start of epilogue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zE+uo4mdL6dr4@arm.com/mbox/"},{"id":154529,"url":"https://patchwork.plctlab.org/api/1.2/patches/154529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zMtkX9y9QzmO6@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:48:50","name":"[07/11] aarch64, testsuite: Prevent stp in lr_free_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zMtkX9y9QzmO6@arm.com/mbox/"},{"id":154530,"url":"https://patchwork.plctlab.org/api/1.2/patches/154530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zS9xTDJNnjpQl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:49:15","name":"[08/11] aarch64, testsuite: Tweak sve/pcs/args_9.c to allow stps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zS9xTDJNnjpQl@arm.com/mbox/"},{"id":154531,"url":"https://patchwork.plctlab.org/api/1.2/patches/154531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zZtFfaT6+QUen@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:49:42","name":"[09/11] aarch64, testsuite: Fix up pr71727.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zZtFfaT6+QUen@arm.com/mbox/"},{"id":154532,"url":"https://patchwork.plctlab.org/api/1.2/patches/154532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7ziVpbMVpY2aU6@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:50:17","name":"[10/11] aarch64: Generalise TFmode load/store pair patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7ziVpbMVpY2aU6@arm.com/mbox/"},{"id":154534,"url":"https://patchwork.plctlab.org/api/1.2/patches/154534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zrn0Hp4EWRvav@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:50:54","name":"[11/11] aarch64: Add new load/store pair fusion pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zrn0Hp4EWRvav@arm.com/mbox/"},{"id":154576,"url":"https://patchwork.plctlab.org/api/1.2/patches/154576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213110.1485201-1-jason@redhat.com/","msgid":"<20231017213110.1485201-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-17T21:31:10","name":"[pushed] c++: mangling tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213110.1485201-1-jason@redhat.com/mbox/"},{"id":154577,"url":"https://patchwork.plctlab.org/api/1.2/patches/154577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213826.1040138-1-polacek@redhat.com/","msgid":"<20231017213826.1040138-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-17T21:38:26","name":"c++: accepts-invalid with =delete(\"\") [PR111840]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213826.1040138-1-polacek@redhat.com/mbox/"},{"id":154584,"url":"https://patchwork.plctlab.org/api/1.2/patches/154584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cnk3ly6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:48:01","name":"[1/2] aarch64: Use vecs to store register save order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cnk3ly6.fsf@arm.com/mbox/"},{"id":154585,"url":"https://patchwork.plctlab.org/api/1.2/patches/154585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qds3lwq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:48:53","name":"[2/2] aarch64: Put LR save slot first in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qds3lwq.fsf@arm.com/mbox/"},{"id":154602,"url":"https://patchwork.plctlab.org/api/1.2/patches/154602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620B67E5DAFB16E5BE35BF4ACD6A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:50:40","name":"libstdc++: testsuite: Enhance codecvt_unicode with tests for length()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620B67E5DAFB16E5BE35BF4ACD6A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":154609,"url":"https://patchwork.plctlab.org/api/1.2/patches/154609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018012009.849697-1-pan2.li@intel.com/","msgid":"<20231018012009.849697-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-18T01:20:09","name":"[v1] RISC-V: Remove the type size restriction of vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018012009.849697-1-pan2.li@intel.com/mbox/"},{"id":154626,"url":"https://patchwork.plctlab.org/api/1.2/patches/154626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018043259.1873023-1-juzhe.zhong@rivai.ai/","msgid":"<20231018043259.1873023-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T04:32:59","name":"RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018043259.1873023-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154660,"url":"https://patchwork.plctlab.org/api/1.2/patches/154660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb808aab-2d4b-0d0d-8fa2-f3693bcd4bf1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T05:09:15","name":"vect: Cost adjacent vector loads/stores together [PR111784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb808aab-2d4b-0d0d-8fa2-f3693bcd4bf1@linux.ibm.com/mbox/"},{"id":154743,"url":"https://patchwork.plctlab.org/api/1.2/patches/154743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081020.1919314-1-haochen.jiang@intel.com/","msgid":"<20231018081020.1919314-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-18T08:10:20","name":"x86: Correct ISA enabled for clients since Arrow Lake","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081020.1919314-1-haochen.jiang@intel.com/mbox/"},{"id":154745,"url":"https://patchwork.plctlab.org/api/1.2/patches/154745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081831.A7A333856943@sourceware.org/","msgid":"<20231018081831.A7A333856943@sourceware.org>","list_archive_url":null,"date":"2023-10-18T08:17:55","name":"Re-instantiate integer mask to traditional vector mask support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081831.A7A333856943@sourceware.org/mbox/"},{"id":154755,"url":"https://patchwork.plctlab.org/api/1.2/patches/154755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018083259.2386650-1-hongtao.liu@intel.com/","msgid":"<20231018083259.2386650-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-18T08:32:59","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big. 65; 6800; 1c There'\''s loop in vect_peel_nonlinear_iv_init to get init_expr * pow (step_expr, skip_niters). When skipn_iters is to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018083259.2386650-1-hongtao.liu@intel.com/mbox/"},{"id":154770,"url":"https://patchwork.plctlab.org/api/1.2/patches/154770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01d52528-7616-422a-8e8f-6073af049b39@gmail.com/","msgid":"<01d52528-7616-422a-8e8f-6073af049b39@gmail.com>","list_archive_url":null,"date":"2023-10-18T09:20:04","name":"RISC-V: Add popcount fallback expander.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01d52528-7616-422a-8e8f-6073af049b39@gmail.com/mbox/"},{"id":154786,"url":"https://patchwork.plctlab.org/api/1.2/patches/154786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018094044.66965-1-iain@sandoe.co.uk/","msgid":"<20231018094044.66965-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-18T09:40:44","name":"[pushed] Darwin: Check as for .build_version support and use it if available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018094044.66965-1-iain@sandoe.co.uk/mbox/"},{"id":154790,"url":"https://patchwork.plctlab.org/api/1.2/patches/154790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS+tXfdF8uqZRvjQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-18T10:03:09","name":"tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS+tXfdF8uqZRvjQ@tucnak/mbox/"},{"id":154794,"url":"https://patchwork.plctlab.org/api/1.2/patches/154794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102149.2634849-1-juzhe.zhong@rivai.ai/","msgid":"<20231018102149.2634849-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T10:21:49","name":"RISC-V: Fix failed hoist in LICM of vmv.v.x instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102149.2634849-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154795,"url":"https://patchwork.plctlab.org/api/1.2/patches/154795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102533.2643245-1-juzhe.zhong@rivai.ai/","msgid":"<20231018102533.2643245-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T10:25:33","name":"[V2] RISC-V: Fix failed hoist in LICM of vmv.v.x instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102533.2643245-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154854,"url":"https://patchwork.plctlab.org/api/1.2/patches/154854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB162045D122DE0DE016CE0A26ACD5A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-10-18T10:52:20","name":"[v2] libstdc++: testsuite: Enhance codecvt_unicode with tests for length()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB162045D122DE0DE016CE0A26ACD5A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":154813,"url":"https://patchwork.plctlab.org/api/1.2/patches/154813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com/","msgid":"<8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com>","list_archive_url":null,"date":"2023-10-18T10:56:01","name":"OpenMP: Avoid ICE with LTO and '\''omp allocate (was: [Patch] Fortran: Support OpenMP'\''s '\''allocate'\'' directive for stack vars)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com/mbox/"},{"id":154867,"url":"https://patchwork.plctlab.org/api/1.2/patches/154867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018123642.427403-1-juzhe.zhong@rivai.ai/","msgid":"<20231018123642.427403-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T12:36:42","name":"[V5] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018123642.427403-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154904,"url":"https://patchwork.plctlab.org/api/1.2/patches/154904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8a4dc84-c867-441a-93d6-8a3c932f0fa6@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T14:19:22","name":"vect: Allow same precision for bit-precision conversions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8a4dc84-c867-441a-93d6-8a3c932f0fa6@gmail.com/mbox/"},{"id":154910,"url":"https://patchwork.plctlab.org/api/1.2/patches/154910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com/","msgid":"<8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com>","list_archive_url":null,"date":"2023-10-18T14:41:17","name":"[PATCH6/8] omp: Reorder call for TARGET_SIMD_CLONE_ADJUST (was Re: [PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com/mbox/"},{"id":154909,"url":"https://patchwork.plctlab.org/api/1.2/patches/154909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f996e7f4-316f-4e76-b2b6-a83b4cd088f1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T14:41:30","name":"[0/8] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f996e7f4-316f-4e76-b2b6-a83b4cd088f1@arm.com/mbox/"},{"id":154920,"url":"https://patchwork.plctlab.org/api/1.2/patches/154920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-2-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:42","name":"[V2,1/7] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-2-victor.donascimento@arm.com/mbox/"},{"id":154922,"url":"https://patchwork.plctlab.org/api/1.2/patches/154922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-3-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:43","name":"[V2,2/7] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-3-victor.donascimento@arm.com/mbox/"},{"id":154924,"url":"https://patchwork.plctlab.org/api/1.2/patches/154924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-4-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:44","name":"[V2,3/7] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-4-victor.donascimento@arm.com/mbox/"},{"id":154918,"url":"https://patchwork.plctlab.org/api/1.2/patches/154918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-5-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:45","name":"[V2,4/7] aarch64: Add basic target_print_operand support for CONST_STRING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-5-victor.donascimento@arm.com/mbox/"},{"id":154919,"url":"https://patchwork.plctlab.org/api/1.2/patches/154919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-6-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:46","name":"[V2,5/7] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-6-victor.donascimento@arm.com/mbox/"},{"id":154923,"url":"https://patchwork.plctlab.org/api/1.2/patches/154923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-7-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:47","name":"[V2,6/7] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-7-victor.donascimento@arm.com/mbox/"},{"id":154921,"url":"https://patchwork.plctlab.org/api/1.2/patches/154921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-8-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-8-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:48","name":"[V2,7/7] aarch64: Add system register duplication check selftest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-8-victor.donascimento@arm.com/mbox/"},{"id":154933,"url":"https://patchwork.plctlab.org/api/1.2/patches/154933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com/","msgid":"<90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:24:36","name":"aarch64: Replace duplicated selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com/mbox/"},{"id":154936,"url":"https://patchwork.plctlab.org/api/1.2/patches/154936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com/","msgid":"<2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:42:36","name":"[1/3] Add support for target_version attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com/mbox/"},{"id":154937,"url":"https://patchwork.plctlab.org/api/1.2/patches/154937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com/","msgid":"<3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:44:08","name":"[2/3,aarch64] Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com/mbox/"},{"id":154938,"url":"https://patchwork.plctlab.org/api/1.2/patches/154938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com/","msgid":"<36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:44:55","name":"[3/3] WIP/RFC: Fix name mangling for target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com/mbox/"},{"id":154973,"url":"https://patchwork.plctlab.org/api/1.2/patches/154973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018162838.3531886-1-ppalka@redhat.com/","msgid":"<20231018162838.3531886-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-18T16:28:38","name":"c++/modules: ICE with lambda initializing local var [PR105322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018162838.3531886-1-ppalka@redhat.com/mbox/"},{"id":154982,"url":"https://patchwork.plctlab.org/api/1.2/patches/154982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de/","msgid":"<4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de>","list_archive_url":null,"date":"2023-10-18T17:03:57","name":"[avr,committed] LibF7: Implement a function that was missing for devices without MUL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de/mbox/"},{"id":155022,"url":"https://patchwork.plctlab.org/api/1.2/patches/155022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018171842.266046-1-dimitar@dinux.eu/","msgid":"<20231018171842.266046-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-10-18T17:18:42","name":"[committed] pru: Implement TARGET_INSN_COST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018171842.266046-1-dimitar@dinux.eu/mbox/"},{"id":155192,"url":"https://patchwork.plctlab.org/api/1.2/patches/155192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018211542.1516517-1-lhyatt@gmail.com/","msgid":"<20231018211542.1516517-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-10-18T21:15:42","name":"c++: Make -Wunknown-pragmas controllable by #pragma GCC diagnostic [PR89038]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018211542.1516517-1-lhyatt@gmail.com/mbox/"},{"id":155201,"url":"https://patchwork.plctlab.org/api/1.2/patches/155201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018223432.2519596-1-pinskia@gmail.com/","msgid":"<20231018223432.2519596-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-18T22:34:32","name":"[COMMITTED] Fix expansion of `(a & 2) != 1`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018223432.2519596-1-pinskia@gmail.com/mbox/"},{"id":155233,"url":"https://patchwork.plctlab.org/api/1.2/patches/155233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBxkkoelVIxvnEy@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:00:18","name":"[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBxkkoelVIxvnEy@cowardly-lion.the-meissners.org/mbox/"},{"id":155234,"url":"https://patchwork.plctlab.org/api/1.2/patches/155234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBx8rGikeUfgp1c@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:01:54","name":"[3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBx8rGikeUfgp1c@cowardly-lion.the-meissners.org/mbox/"},{"id":155235,"url":"https://patchwork.plctlab.org/api/1.2/patches/155235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTByNkF+jxxDIyEK@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:03:02","name":"[4/6] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTByNkF+jxxDIyEK@cowardly-lion.the-meissners.org/mbox/"},{"id":155236,"url":"https://patchwork.plctlab.org/api/1.2/patches/155236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBynMSpnS9pUvel@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:04:44","name":"[5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBynMSpnS9pUvel@cowardly-lion.the-meissners.org/mbox/"},{"id":155237,"url":"https://patchwork.plctlab.org/api/1.2/patches/155237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBy/OekceZLGEAo@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:06:20","name":"[6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBy/OekceZLGEAo@cowardly-lion.the-meissners.org/mbox/"},{"id":155279,"url":"https://patchwork.plctlab.org/api/1.2/patches/155279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019040519.2655598-1-pinskia@gmail.com/","msgid":"<20231019040519.2655598-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T04:05:19","name":"aarch64: [PR110986] Emit csinv again for `a ? ~b : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019040519.2655598-1-pinskia@gmail.com/mbox/"},{"id":155319,"url":"https://patchwork.plctlab.org/api/1.2/patches/155319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f61f9026-94b3-497b-bbe5-807054399500@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T04:55:48","name":"[_Hashtable] Fix merge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f61f9026-94b3-497b-bbe5-807054399500@gmail.com/mbox/"},{"id":155326,"url":"https://patchwork.plctlab.org/api/1.2/patches/155326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019061422.281377-1-hongtao.liu@intel.com/","msgid":"<20231019061422.281377-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-19T06:14:22","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019061422.281377-1-hongtao.liu@intel.com/mbox/"},{"id":155328,"url":"https://patchwork.plctlab.org/api/1.2/patches/155328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019063128.512979-1-haochen.jiang@intel.com/","msgid":"<20231019063128.512979-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-19T06:31:28","name":"[v2] x86: Correct ISA enabled for clients since Arrow Lake","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019063128.512979-1-haochen.jiang@intel.com/mbox/"},{"id":155358,"url":"https://patchwork.plctlab.org/api/1.2/patches/155358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhrdowb.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T07:58:44","name":"return edge in make_eh_edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhrdowb.fsf@lxoliva.fsfla.org/mbox/"},{"id":155372,"url":"https://patchwork.plctlab.org/api/1.2/patches/155372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-2-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:23","name":"[V3,01/11] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info/vector_block_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-2-lehua.ding@rivai.ai/mbox/"},{"id":155369,"url":"https://patchwork.plctlab.org/api/1.2/patches/155369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-3-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:24","name":"[V3,02/11] RISC-V: P2: Refactor and cleanup demand system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-3-lehua.ding@rivai.ai/mbox/"},{"id":155373,"url":"https://patchwork.plctlab.org/api/1.2/patches/155373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-4-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:25","name":"[V3,03/11] RISC-V: P3: Refactor vector_infos_manager","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-4-lehua.ding@rivai.ai/mbox/"},{"id":155371,"url":"https://patchwork.plctlab.org/api/1.2/patches/155371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-5-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:26","name":"[V3,04/11] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-5-lehua.ding@rivai.ai/mbox/"},{"id":155374,"url":"https://patchwork.plctlab.org/api/1.2/patches/155374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-6-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:27","name":"[V3,05/11] RISC-V: P5: Combine phase 1 and 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-6-lehua.ding@rivai.ai/mbox/"},{"id":155380,"url":"https://patchwork.plctlab.org/api/1.2/patches/155380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-7-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:28","name":"[V3,06/11] RISC-V: P6: Add computing reaching definition data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-7-lehua.ding@rivai.ai/mbox/"},{"id":155379,"url":"https://patchwork.plctlab.org/api/1.2/patches/155379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-8-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:29","name":"[V3,07/11] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-8-lehua.ding@rivai.ai/mbox/"},{"id":155376,"url":"https://patchwork.plctlab.org/api/1.2/patches/155376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-9-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-9-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:30","name":"[V3,08/11] RISC-V: P8: Refactor emit-vsetvl phase and delete post optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-9-lehua.ding@rivai.ai/mbox/"},{"id":155378,"url":"https://patchwork.plctlab.org/api/1.2/patches/155378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-10-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-10-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:31","name":"[V3,09/11] RISC-V: P9: Cleanup and reorganize helper functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-10-lehua.ding@rivai.ai/mbox/"},{"id":155382,"url":"https://patchwork.plctlab.org/api/1.2/patches/155382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-11-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-11-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:32","name":"[V3,10/11] RISC-V: P10: Delete riscv-vsetvl.h and adjust riscv-vsetvl.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-11-lehua.ding@rivai.ai/mbox/"},{"id":155381,"url":"https://patchwork.plctlab.org/api/1.2/patches/155381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-12-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-12-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:33","name":"[V3,11/11] RISC-V: P11: Adjust and add testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-12-lehua.ding@rivai.ai/mbox/"},{"id":155395,"url":"https://patchwork.plctlab.org/api/1.2/patches/155395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il73rohj.fsf@oldenburg.str.redhat.com/","msgid":"<87il73rohj.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-19T08:43:52","name":"c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il73rohj.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155396,"url":"https://patchwork.plctlab.org/api/1.2/patches/155396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b46ca497-0070-47c5-bdde-7d69390d35fb@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T08:58:13","name":"[committed] amdgcn: deprecate Fiji device and multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b46ca497-0070-47c5-bdde-7d69390d35fb@codesourcery.com/mbox/"},{"id":155406,"url":"https://patchwork.plctlab.org/api/1.2/patches/155406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8b37ye7.fsf@euler.schwinge.homeip.net/","msgid":"<87v8b37ye7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-10-19T09:30:08","name":"Enable top-level recursive '\''autoreconf'\'' (was: Hints on reconfiguring GCC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8b37ye7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":155416,"url":"https://patchwork.plctlab.org/api/1.2/patches/155416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b430291b-4cb0-4a81-8d58-9d5268d17c95@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T09:49:14","name":"wwwdocs: gcc-14: mark amdgcn fiji deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b430291b-4cb0-4a81-8d58-9d5268d17c95@codesourcery.com/mbox/"},{"id":155457,"url":"https://patchwork.plctlab.org/api/1.2/patches/155457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114725.E7DBE385840A@sourceware.org/","msgid":"<20231019114725.E7DBE385840A@sourceware.org>","list_archive_url":null,"date":"2023-10-19T11:46:58","name":"[1/2] Refactor x86 vectorized gather path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114725.E7DBE385840A@sourceware.org/mbox/"},{"id":155458,"url":"https://patchwork.plctlab.org/api/1.2/patches/155458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114804.055643858438@sourceware.org/","msgid":"<20231019114804.055643858438@sourceware.org>","list_archive_url":null,"date":"2023-10-19T11:47:14","name":"[2/2] tree-optimization/111131 - SLP for non-IFN gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114804.055643858438@sourceware.org/mbox/"},{"id":155494,"url":"https://patchwork.plctlab.org/api/1.2/patches/155494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17859-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:29:54","name":"middle-end: don'\''t create LC-SSA PHI variables for PHI nodes who dominate loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17859-tamar@arm.com/mbox/"},{"id":155500,"url":"https://patchwork.plctlab.org/api/1.2/patches/155500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89829CCDE1529CE888C094AF83D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:43:00","name":"AArch64: Improve immediate generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89829CCDE1529CE888C094AF83D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":155502,"url":"https://patchwork.plctlab.org/api/1.2/patches/155502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898262EC1D06EA3207A4372483D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:51:14","name":"AArch64: Cleanup memset expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898262EC1D06EA3207A4372483D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":155569,"url":"https://patchwork.plctlab.org/api/1.2/patches/155569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-2-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:25","name":"[1/3,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-2-Ezra.Sitorus@arm.com/mbox/"},{"id":155570,"url":"https://patchwork.plctlab.org/api/1.2/patches/155570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-3-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:26","name":"[2/3,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-3-Ezra.Sitorus@arm.com/mbox/"},{"id":155567,"url":"https://patchwork.plctlab.org/api/1.2/patches/155567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-4-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:27","name":"[3/3,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-4-Ezra.Sitorus@arm.com/mbox/"},{"id":155582,"url":"https://patchwork.plctlab.org/api/1.2/patches/155582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-2-xry111@xry111.site/","msgid":"<20231019140300.50323-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:56","name":"[1/5] LoongArch: Add enum-style -mexplicit-relocs= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-2-xry111@xry111.site/mbox/"},{"id":155586,"url":"https://patchwork.plctlab.org/api/1.2/patches/155586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-3-xry111@xry111.site/","msgid":"<20231019140300.50323-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:57","name":"[2/5] LoongArch: Use explicit relocs for GOT access when -mexplicit-relocs=auto and LTO during a final link with linker plugin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-3-xry111@xry111.site/mbox/"},{"id":155580,"url":"https://patchwork.plctlab.org/api/1.2/patches/155580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140257.360669-1-dmalcolm@redhat.com/","msgid":"<20231019140257.360669-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-19T14:02:57","name":"[RFC] Add function attribute: null_terminated_string_arg(PARAM_IDX)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140257.360669-1-dmalcolm@redhat.com/mbox/"},{"id":155583,"url":"https://patchwork.plctlab.org/api/1.2/patches/155583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-4-xry111@xry111.site/","msgid":"<20231019140300.50323-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:58","name":"[3/5] LoongArch: Use explicit relocs for TLS access with -mexplicit-relocs=auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-4-xry111@xry111.site/mbox/"},{"id":155585,"url":"https://patchwork.plctlab.org/api/1.2/patches/155585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-6-xry111@xry111.site/","msgid":"<20231019140300.50323-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:03:00","name":"[5/5] LoongArch: Document -mexplicit-relocs={auto,none,always}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-6-xry111@xry111.site/mbox/"},{"id":155623,"url":"https://patchwork.plctlab.org/api/1.2/patches/155623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144130.339314-1-poulhies@adacore.com/","msgid":"<20231019144130.339314-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:30","name":"[COMMITTED] ada: Simplify \"not Present\" with \"No\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144130.339314-1-poulhies@adacore.com/mbox/"},{"id":155624,"url":"https://patchwork.plctlab.org/api/1.2/patches/155624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144150.339469-1-poulhies@adacore.com/","msgid":"<20231019144150.339469-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:50","name":"[COMMITTED] ada: Seize opportunity to reuse List_Length","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144150.339469-1-poulhies@adacore.com/mbox/"},{"id":155625,"url":"https://patchwork.plctlab.org/api/1.2/patches/155625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144156.339532-1-poulhies@adacore.com/","msgid":"<20231019144156.339532-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:53","name":"[COMMITTED] ada: Document gnatbind -Q switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144156.339532-1-poulhies@adacore.com/mbox/"},{"id":155626,"url":"https://patchwork.plctlab.org/api/1.2/patches/155626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144159.339597-1-poulhies@adacore.com/","msgid":"<20231019144159.339597-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:58","name":"[COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144159.339597-1-poulhies@adacore.com/mbox/"},{"id":155627,"url":"https://patchwork.plctlab.org/api/1.2/patches/155627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144202.339662-1-poulhies@adacore.com/","msgid":"<20231019144202.339662-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:42:02","name":"[COMMITTED] ada: Refactor code to remove GNATcheck violation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144202.339662-1-poulhies@adacore.com/mbox/"},{"id":155628,"url":"https://patchwork.plctlab.org/api/1.2/patches/155628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144206.339725-1-poulhies@adacore.com/","msgid":"<20231019144206.339725-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:42:04","name":"[COMMITTED] ada: Support new SPARK aspect Side_Effects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144206.339725-1-poulhies@adacore.com/mbox/"},{"id":155630,"url":"https://patchwork.plctlab.org/api/1.2/patches/155630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTFDa/6aOhyZIAMz@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T14:55:39","name":"[v2,11/11] aarch64: Add new load/store pair fusion pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTFDa/6aOhyZIAMz@arm.com/mbox/"},{"id":155631,"url":"https://patchwork.plctlab.org/api/1.2/patches/155631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019151130.1929663-1-jason@redhat.com/","msgid":"<20231019151130.1929663-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:11:30","name":"ABOUT-GCC-NLS: add usage guidance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019151130.1929663-1-jason@redhat.com/mbox/"},{"id":155632,"url":"https://patchwork.plctlab.org/api/1.2/patches/155632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153158.1937301-1-jason@redhat.com/","msgid":"<20231019153158.1937301-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:31:58","name":"[pushed] c++: use G_ instead of _","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153158.1937301-1-jason@redhat.com/mbox/"},{"id":155637,"url":"https://patchwork.plctlab.org/api/1.2/patches/155637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153731.1394423-1-pinskia@gmail.com/","msgid":"<20231019153731.1394423-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T15:37:31","name":"c: [PR104822] Don'\''t warn about converting NULL to different sso endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153731.1394423-1-pinskia@gmail.com/mbox/"},{"id":155638,"url":"https://patchwork.plctlab.org/api/1.2/patches/155638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153857.1248815-1-pinskia@gmail.com/","msgid":"<20231019153857.1248815-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T15:38:57","name":"c: [PR100532] Fix ICE when an agrgument was an error mark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153857.1248815-1-pinskia@gmail.com/mbox/"},{"id":155639,"url":"https://patchwork.plctlab.org/api/1.2/patches/155639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019154501.1939309-1-jason@redhat.com/","msgid":"<20231019154501.1939309-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:45:01","name":"[RFA] diagnostic: rename new permerror overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019154501.1939309-1-jason@redhat.com/mbox/"},{"id":155642,"url":"https://patchwork.plctlab.org/api/1.2/patches/155642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de/","msgid":"<817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de>","list_archive_url":null,"date":"2023-10-19T15:55:46","name":"[libgcc,contrib] : Add some auto-generated files deps to gcc_update.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de/mbox/"},{"id":155696,"url":"https://patchwork.plctlab.org/api/1.2/patches/155696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com/","msgid":"<17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com>","list_archive_url":null,"date":"2023-10-19T19:48:18","name":"omp_lib.f90.in: Deprecate omp_lock_hint_* for OpenMP 5.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com/mbox/"},{"id":155705,"url":"https://patchwork.plctlab.org/api/1.2/patches/155705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019201738.653232-1-polacek@redhat.com/","msgid":"<20231019201738.653232-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-19T20:17:37","name":"[pushed] doc: Update contrib.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019201738.653232-1-polacek@redhat.com/mbox/"},{"id":155708,"url":"https://patchwork.plctlab.org/api/1.2/patches/155708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs26pbh2.fsf@oldenburg.str.redhat.com/","msgid":"<87fs26pbh2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-19T21:07:53","name":"c: Add -Wreturn-mismatch warning, split from -Wreturn-type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs26pbh2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155761,"url":"https://patchwork.plctlab.org/api/1.2/patches/155761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020021855.482999-1-hongtao.liu@intel.com/","msgid":"<20231020021855.482999-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-20T02:18:55","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020021855.482999-1-hongtao.liu@intel.com/mbox/"},{"id":155775,"url":"https://patchwork.plctlab.org/api/1.2/patches/155775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0lqc7at.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T03:16:26","name":"testsuite: check for and use -mno-strict-align where needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0lqc7at.fsf@lxoliva.fsfla.org/mbox/"},{"id":155812,"url":"https://patchwork.plctlab.org/api/1.2/patches/155812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhpdg3z.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T05:20:48","name":"[v3] Control flow redundancy hardening","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhpdg3z.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155813,"url":"https://patchwork.plctlab.org/api/1.2/patches/155813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5sddfmu.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T05:31:05","name":"[v4] Introduce hardbool attribute for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5sddfmu.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155818,"url":"https://patchwork.plctlab.org/api/1.2/patches/155818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y31de5m.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T06:03:01","name":"[v4] Introduce strub: machine-independent stack scrubbing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y31de5m.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155819,"url":"https://patchwork.plctlab.org/api/1.2/patches/155819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1fxbza4.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T06:09:39","name":"rename make_eh_edges to make_eh_edge (was: return edge in make_eh_edges)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1fxbza4.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155825,"url":"https://patchwork.plctlab.org/api/1.2/patches/155825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020062050.971264-1-haochen.jiang@intel.com/","msgid":"<20231020062050.971264-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-20T06:20:50","name":"i386: Prevent splitting to xmm16+ when !TARGET_AVX512VL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020062050.971264-1-haochen.jiang@intel.com/mbox/"},{"id":155847,"url":"https://patchwork.plctlab.org/api/1.2/patches/155847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734y523et.fsf@oldenburg.str.redhat.com/","msgid":"<8734y523et.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T06:50:34","name":"[v2] c: Add -Wreturn-mismatch warning, split from -Wreturn-type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734y523et.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155846,"url":"https://patchwork.plctlab.org/api/1.2/patches/155846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com/","msgid":"<32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com>","list_archive_url":null,"date":"2023-10-20T06:50:44","name":"[v9,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com/mbox/"},{"id":155848,"url":"https://patchwork.plctlab.org/api/1.2/patches/155848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1fxzszn.fsf@oldenburg.str.redhat.com/","msgid":"<87y1fxzszn.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T06:51:40","name":"c: -Wint-conversion should cover pointer/integer mismatches in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1fxzszn.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155849,"url":"https://patchwork.plctlab.org/api/1.2/patches/155849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020065401.1086359-1-hongtao.liu@intel.com/","msgid":"<20231020065401.1086359-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-20T06:54:01","name":"[x86] Remove unused mmx_pinsrw.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020065401.1086359-1-hongtao.liu@intel.com/mbox/"},{"id":155851,"url":"https://patchwork.plctlab.org/api/1.2/patches/155851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020071506.27021-1-chenglulu@loongson.cn/","msgid":"<20231020071506.27021-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-10-20T07:15:06","name":"LoongArch: Define macro CLEAR_INSN_CACHE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020071506.27021-1-chenglulu@loongson.cn/mbox/"},{"id":155858,"url":"https://patchwork.plctlab.org/api/1.2/patches/155858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com/","msgid":"<992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com>","list_archive_url":null,"date":"2023-10-20T07:22:52","name":"[PATCH-1v4,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com/mbox/"},{"id":155863,"url":"https://patchwork.plctlab.org/api/1.2/patches/155863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020073748.2172313584@imap2.suse-dmz.suse.de/","msgid":"<20231020073748.2172313584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T07:37:47","name":"Fixup vect_get_and_check_slp_defs for gathers and .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020073748.2172313584@imap2.suse-dmz.suse.de/mbox/"},{"id":155873,"url":"https://patchwork.plctlab.org/api/1.2/patches/155873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020082557.2104496-1-juzhe.zhong@rivai.ai/","msgid":"<20231020082557.2104496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-20T08:25:57","name":"RISC-V: Rename some variables of vector_block_info[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020082557.2104496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":155878,"url":"https://patchwork.plctlab.org/api/1.2/patches/155878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020083442.4148800-1-pan2.li@intel.com/","msgid":"<20231020083442.4148800-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-20T08:34:42","name":"[v1] RISC-V: Support partial VLS mode when preference fixed-vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020083442.4148800-1-pan2.li@intel.com/mbox/"},{"id":155893,"url":"https://patchwork.plctlab.org/api/1.2/patches/155893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm19znaa.fsf@oldenburg.str.redhat.com/","msgid":"<87pm19znaa.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T08:54:53","name":"c: -Wincompatible-pointer-types should cover mismatches in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm19znaa.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155915,"url":"https://patchwork.plctlab.org/api/1.2/patches/155915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020092327.C732A13584@imap2.suse-dmz.suse.de/","msgid":"<20231020092327.C732A13584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T09:23:27","name":"Rewrite more refs for epilogue vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020092327.C732A13584@imap2.suse-dmz.suse.de/mbox/"},{"id":155943,"url":"https://patchwork.plctlab.org/api/1.2/patches/155943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTJLpun/ghfYhY2d@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T09:43:02","name":"rtl-ssa: Don'\''t leave NOTE_INSN_DELETED around","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTJLpun/ghfYhY2d@arm.com/mbox/"},{"id":155948,"url":"https://patchwork.plctlab.org/api/1.2/patches/155948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-2-christoph.muellner@vrull.eu/","msgid":"<20231020095348.2455729-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-20T09:53:47","name":"[v2,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-2-christoph.muellner@vrull.eu/mbox/"},{"id":155947,"url":"https://patchwork.plctlab.org/api/1.2/patches/155947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-3-christoph.muellner@vrull.eu/","msgid":"<20231020095348.2455729-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-20T09:53:48","name":"[v2,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-3-christoph.muellner@vrull.eu/mbox/"},{"id":155949,"url":"https://patchwork.plctlab.org/api/1.2/patches/155949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020100130.D526713584@imap2.suse-dmz.suse.de/","msgid":"<20231020100130.D526713584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T10:01:30","name":"Document {L,R}ROTATE_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020100130.D526713584@imap2.suse-dmz.suse.de/mbox/"},{"id":155998,"url":"https://patchwork.plctlab.org/api/1.2/patches/155998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17865-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T10:50:19","name":"middle-end: don'\''t pass loop_vinfo to vect_set_loop_condition during prolog peeling [PR111866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17865-tamar@arm.com/mbox/"},{"id":156012,"url":"https://patchwork.plctlab.org/api/1.2/patches/156012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020111940.8FD0A13584@imap2.suse-dmz.suse.de/","msgid":"<20231020111940.8FD0A13584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T11:19:40","name":"tree-optimization/111000 - restrict invariant motion of shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020111940.8FD0A13584@imap2.suse-dmz.suse.de/mbox/"},{"id":156081,"url":"https://patchwork.plctlab.org/api/1.2/patches/156081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b99badf1-895a-4ff1-b68f-abc665a85625@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T11:51:03","name":"[committed] amdgcn: add -march=gfx1030 EXPERIMENTAL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b99badf1-895a-4ff1-b68f-abc665a85625@codesourcery.com/mbox/"},{"id":156089,"url":"https://patchwork.plctlab.org/api/1.2/patches/156089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020121357.9F55713584@imap2.suse-dmz.suse.de/","msgid":"<20231020121357.9F55713584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T12:13:57","name":"tree-optimization/111891 - fix assert in vectorizable_simd_clone_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020121357.9F55713584@imap2.suse-dmz.suse.de/mbox/"},{"id":156095,"url":"https://patchwork.plctlab.org/api/1.2/patches/156095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020125951.114236-1-pan2.li@intel.com/","msgid":"<20231020125951.114236-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-20T12:59:51","name":"[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020125951.114236-1-pan2.li@intel.com/mbox/"},{"id":156102,"url":"https://patchwork.plctlab.org/api/1.2/patches/156102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131353.7E572138E2@imap2.suse-dmz.suse.de/","msgid":"<20231020131353.7E572138E2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:13:53","name":"tree-optimization/110243 - IVOPTs introducing undefined overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131353.7E572138E2@imap2.suse-dmz.suse.de/mbox/"},{"id":156103,"url":"https://patchwork.plctlab.org/api/1.2/patches/156103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131810.0AC64138E2@imap2.suse-dmz.suse.de/","msgid":"<20231020131810.0AC64138E2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:18:09","name":"tree-optimization/111445 - simple_iv simplification fault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131810.0AC64138E2@imap2.suse-dmz.suse.de/mbox/"},{"id":156113,"url":"https://patchwork.plctlab.org/api/1.2/patches/156113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTKFoVCHmwalBmVD@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-20T13:50:25","name":"A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTKFoVCHmwalBmVD@fkdesktop.suse.cz/mbox/"},{"id":156114,"url":"https://patchwork.plctlab.org/api/1.2/patches/156114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135259.F1B4613584@imap2.suse-dmz.suse.de/","msgid":"<20231020135259.F1B4613584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:52:59","name":"tree-optimization/111383 - testcase for fixed PR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135259.F1B4613584@imap2.suse-dmz.suse.de/mbox/"},{"id":156116,"url":"https://patchwork.plctlab.org/api/1.2/patches/156116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-2-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:20","name":"[v23,01/33] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-2-kmatsui@gcc.gnu.org/mbox/"},{"id":156118,"url":"https://patchwork.plctlab.org/api/1.2/patches/156118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-3-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:21","name":"[v23,02/33] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-3-kmatsui@gcc.gnu.org/mbox/"},{"id":156121,"url":"https://patchwork.plctlab.org/api/1.2/patches/156121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-4-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:22","name":"[v23,03/33] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-4-kmatsui@gcc.gnu.org/mbox/"},{"id":156122,"url":"https://patchwork.plctlab.org/api/1.2/patches/156122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-5-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:23","name":"[v23,04/33] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-5-kmatsui@gcc.gnu.org/mbox/"},{"id":156131,"url":"https://patchwork.plctlab.org/api/1.2/patches/156131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-6-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:24","name":"[v23,05/33] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-6-kmatsui@gcc.gnu.org/mbox/"},{"id":156144,"url":"https://patchwork.plctlab.org/api/1.2/patches/156144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-7-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:25","name":"[v23,06/33] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-7-kmatsui@gcc.gnu.org/mbox/"},{"id":156139,"url":"https://patchwork.plctlab.org/api/1.2/patches/156139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-8-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:26","name":"[v23,07/33] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-8-kmatsui@gcc.gnu.org/mbox/"},{"id":156148,"url":"https://patchwork.plctlab.org/api/1.2/patches/156148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-9-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:27","name":"[v23,08/33] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-9-kmatsui@gcc.gnu.org/mbox/"},{"id":156125,"url":"https://patchwork.plctlab.org/api/1.2/patches/156125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-10-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:28","name":"[v23,09/33] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-10-kmatsui@gcc.gnu.org/mbox/"},{"id":156126,"url":"https://patchwork.plctlab.org/api/1.2/patches/156126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-11-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:29","name":"[v23,10/33] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-11-kmatsui@gcc.gnu.org/mbox/"},{"id":156127,"url":"https://patchwork.plctlab.org/api/1.2/patches/156127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-12-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:30","name":"[v23,11/33] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-12-kmatsui@gcc.gnu.org/mbox/"},{"id":156141,"url":"https://patchwork.plctlab.org/api/1.2/patches/156141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-13-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:31","name":"[v23,12/33] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-13-kmatsui@gcc.gnu.org/mbox/"},{"id":156128,"url":"https://patchwork.plctlab.org/api/1.2/patches/156128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-14-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:32","name":"[v23,13/33] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-14-kmatsui@gcc.gnu.org/mbox/"},{"id":156149,"url":"https://patchwork.plctlab.org/api/1.2/patches/156149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-15-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:33","name":"[v23,14/33] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-15-kmatsui@gcc.gnu.org/mbox/"},{"id":156124,"url":"https://patchwork.plctlab.org/api/1.2/patches/156124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-16-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:34","name":"[v23,15/33] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-16-kmatsui@gcc.gnu.org/mbox/"},{"id":156146,"url":"https://patchwork.plctlab.org/api/1.2/patches/156146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-17-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:35","name":"[v23,16/33] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-17-kmatsui@gcc.gnu.org/mbox/"},{"id":156130,"url":"https://patchwork.plctlab.org/api/1.2/patches/156130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-18-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:36","name":"[v23,17/33] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-18-kmatsui@gcc.gnu.org/mbox/"},{"id":156145,"url":"https://patchwork.plctlab.org/api/1.2/patches/156145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-19-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:37","name":"[v23,18/33] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-19-kmatsui@gcc.gnu.org/mbox/"},{"id":156133,"url":"https://patchwork.plctlab.org/api/1.2/patches/156133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-20-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:38","name":"[v23,19/33] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-20-kmatsui@gcc.gnu.org/mbox/"},{"id":156147,"url":"https://patchwork.plctlab.org/api/1.2/patches/156147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-21-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:39","name":"[v23,20/33] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-21-kmatsui@gcc.gnu.org/mbox/"},{"id":156137,"url":"https://patchwork.plctlab.org/api/1.2/patches/156137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-22-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:40","name":"[v23,21/33] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-22-kmatsui@gcc.gnu.org/mbox/"},{"id":156132,"url":"https://patchwork.plctlab.org/api/1.2/patches/156132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-23-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:41","name":"[v23,22/33] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-23-kmatsui@gcc.gnu.org/mbox/"},{"id":156153,"url":"https://patchwork.plctlab.org/api/1.2/patches/156153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-24-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:42","name":"[v23,23/33] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-24-kmatsui@gcc.gnu.org/mbox/"},{"id":156143,"url":"https://patchwork.plctlab.org/api/1.2/patches/156143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-25-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:43","name":"[v23,24/33] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-25-kmatsui@gcc.gnu.org/mbox/"},{"id":156123,"url":"https://patchwork.plctlab.org/api/1.2/patches/156123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-26-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:44","name":"[v23,25/33] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-26-kmatsui@gcc.gnu.org/mbox/"},{"id":156142,"url":"https://patchwork.plctlab.org/api/1.2/patches/156142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-27-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:45","name":"[v23,26/33] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-27-kmatsui@gcc.gnu.org/mbox/"},{"id":156151,"url":"https://patchwork.plctlab.org/api/1.2/patches/156151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-28-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:46","name":"[v23,27/33] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-28-kmatsui@gcc.gnu.org/mbox/"},{"id":156140,"url":"https://patchwork.plctlab.org/api/1.2/patches/156140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-29-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:47","name":"[v23,28/33] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-29-kmatsui@gcc.gnu.org/mbox/"},{"id":156155,"url":"https://patchwork.plctlab.org/api/1.2/patches/156155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-30-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:48","name":"[v23,29/33] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-30-kmatsui@gcc.gnu.org/mbox/"},{"id":156134,"url":"https://patchwork.plctlab.org/api/1.2/patches/156134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-31-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:49","name":"[v23,30/33] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-31-kmatsui@gcc.gnu.org/mbox/"},{"id":156150,"url":"https://patchwork.plctlab.org/api/1.2/patches/156150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-32-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:50","name":"[v23,31/33] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-32-kmatsui@gcc.gnu.org/mbox/"},{"id":156154,"url":"https://patchwork.plctlab.org/api/1.2/patches/156154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-33-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:51","name":"[v23,32/33] c++: Implement __is_invocable built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-33-kmatsui@gcc.gnu.org/mbox/"},{"id":156152,"url":"https://patchwork.plctlab.org/api/1.2/patches/156152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-34-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:52","name":"[v23,33/33] libstdc++: Optimize std::is_invocable compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-34-kmatsui@gcc.gnu.org/mbox/"},{"id":156115,"url":"https://patchwork.plctlab.org/api/1.2/patches/156115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17863-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T13:55:57","name":"middle-end: don'\''t keep .MEM guard nodes for PHI nodes who dominate loop [PR111860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17863-tamar@arm.com/mbox/"},{"id":156120,"url":"https://patchwork.plctlab.org/api/1.2/patches/156120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com/","msgid":"<6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com>","list_archive_url":null,"date":"2023-10-20T14:02:39","name":"Fortran: Fix incompatible types between INTEGER(8) and TYPE(c_ptr)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com/mbox/"},{"id":156198,"url":"https://patchwork.plctlab.org/api/1.2/patches/156198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com/","msgid":"<63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com>","list_archive_url":null,"date":"2023-10-20T15:48:54","name":"vect: Don'\''t set excess bits in unform masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com/mbox/"},{"id":156225,"url":"https://patchwork.plctlab.org/api/1.2/patches/156225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020162115.2307797-34-kmatsui@gcc.gnu.org/","msgid":"<20231020162115.2307797-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T16:17:02","name":"[v24,33/33] libstdc++: Optimize std::is_invocable compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020162115.2307797-34-kmatsui@gcc.gnu.org/mbox/"},{"id":156226,"url":"https://patchwork.plctlab.org/api/1.2/patches/156226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163121.25120-1-polacek@redhat.com/","msgid":"<20231020163121.25120-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-20T16:31:21","name":"c-family: char8_t and aliasing in C vs C++ [PR111884]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163121.25120-1-polacek@redhat.com/mbox/"},{"id":156246,"url":"https://patchwork.plctlab.org/api/1.2/patches/156246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163413.25404-1-polacek@redhat.com/","msgid":"<20231020163413.25404-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-20T16:34:13","name":"[pushed] libstdc++: add casts to from_chars in [PR111883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163413.25404-1-polacek@redhat.com/mbox/"},{"id":156229,"url":"https://patchwork.plctlab.org/api/1.2/patches/156229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc154f12-bd63-4223-9baf-19fa092be4a9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T16:49:58","name":"OpenMP: Add C++ support for '\''omp allocate'\'' with stack variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc154f12-bd63-4223-9baf-19fa092be4a9@codesourcery.com/mbox/"},{"id":156239,"url":"https://patchwork.plctlab.org/api/1.2/patches/156239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMkP2ZTUq9_YN+4_kCzfPBDroFE-YUVSS4h9=NFWxhetwA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T17:25:44","name":"PR111754","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMkP2ZTUq9_YN+4_kCzfPBDroFE-YUVSS4h9=NFWxhetwA@mail.gmail.com/mbox/"},{"id":156245,"url":"https://patchwork.plctlab.org/api/1.2/patches/156245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020173630.2328347-1-ppalka@redhat.com/","msgid":"<20231020173630.2328347-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-20T17:36:30","name":"rust: build failure after NON_DEPENDENT_EXPR removal [PR111899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020173630.2328347-1-ppalka@redhat.com/mbox/"},{"id":156272,"url":"https://patchwork.plctlab.org/api/1.2/patches/156272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf65w1v0.fsf@oldenburg.str.redhat.com/","msgid":"<87sf65w1v0.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T19:05:55","name":"C99 testsuite readiness: Some unverified test case reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf65w1v0.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156273,"url":"https://patchwork.plctlab.org/api/1.2/patches/156273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gtw1uo.fsf@oldenburg.str.redhat.com/","msgid":"<87o7gtw1uo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T19:06:07","name":"C99 testsuite readiness: Compile more tests with -std=gnu89","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gtw1uo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156303,"url":"https://patchwork.plctlab.org/api/1.2/patches/156303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020202953.2247779-1-jason@redhat.com/","msgid":"<20231020202953.2247779-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T20:29:53","name":"[pushed] c++: fix tourney logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020202953.2247779-1-jason@redhat.com/mbox/"},{"id":156304,"url":"https://patchwork.plctlab.org/api/1.2/patches/156304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020203019.2248454-1-jason@redhat.com/","msgid":"<20231020203019.2248454-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T20:30:19","name":"[pushed] testsuite: constexpr-diag1.C and implicit constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020203019.2248454-1-jason@redhat.com/mbox/"},{"id":156352,"url":"https://patchwork.plctlab.org/api/1.2/patches/156352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020215043.2277730-1-jason@redhat.com/","msgid":"<20231020215043.2277730-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T21:50:43","name":"[pushed] c++: abstract class and overload resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020215043.2277730-1-jason@redhat.com/mbox/"},{"id":156392,"url":"https://patchwork.plctlab.org/api/1.2/patches/156392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb6a45366c1c1cc8a317c9bd7a58d4f6d3b74615.1697866322.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-21T05:32:22","name":"RISC-V: '\''Zfa'\'' extension is now ratified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb6a45366c1c1cc8a317c9bd7a58d4f6d3b74615.1697866322.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156393,"url":"https://patchwork.plctlab.org/api/1.2/patches/156393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com/","msgid":"<92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-21T05:32:56","name":"RISC-V: Prohibit combination of '\''E'\'' and '\''H'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156396,"url":"https://patchwork.plctlab.org/api/1.2/patches/156396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qdoculr.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-21T07:17:36","name":"[PR111520] set hardcmp eh probs (was: rename make_eh_edges to make_eh_edge)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qdoculr.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":156430,"url":"https://patchwork.plctlab.org/api/1.2/patches/156430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eaddf187-4d16-4fc8-8b16-99931bca1220@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-21T10:21:59","name":"[v10,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eaddf187-4d16-4fc8-8b16-99931bca1220@linux.ibm.com/mbox/"},{"id":156443,"url":"https://patchwork.plctlab.org/api/1.2/patches/156443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021110910.155119-1-jwakely@redhat.com/","msgid":"<20231021110910.155119-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-21T10:54:37","name":"[committed] libstdc++: Fix formatting of filesystem directory iterators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021110910.155119-1-jwakely@redhat.com/mbox/"},{"id":156436,"url":"https://patchwork.plctlab.org/api/1.2/patches/156436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at/","msgid":"<564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at>","list_archive_url":null,"date":"2023-10-21T11:09:42","name":"[PING,2,C] Synthesize nonnull attribute for parameters declared with static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at/mbox/"},{"id":156447,"url":"https://patchwork.plctlab.org/api/1.2/patches/156447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021132749.1053942-1-j@lambda.is/","msgid":"<20231021132749.1053942-1-j@lambda.is>","list_archive_url":null,"date":"2023-10-21T13:27:49","name":"[v6] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021132749.1053942-1-j@lambda.is/mbox/"},{"id":156485,"url":"https://patchwork.plctlab.org/api/1.2/patches/156485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021180712.370694-1-pinskia@gmail.com/","msgid":"<20231021180712.370694-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-21T18:07:12","name":"convert_to_complex vs invalid_conversion [PR111903]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021180712.370694-1-pinskia@gmail.com/mbox/"},{"id":156509,"url":"https://patchwork.plctlab.org/api/1.2/patches/156509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022001232.2713374-1-pinskia@gmail.com/","msgid":"<20231022001232.2713374-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T00:12:33","name":"[PATCHv2] move the (a-b) CMP 0 ? (a-b) : (b-a) optimization from fold_cond_expr_with_comparison to match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022001232.2713374-1-pinskia@gmail.com/mbox/"},{"id":156514,"url":"https://patchwork.plctlab.org/api/1.2/patches/156514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e302a7008b07633f19c308d495968dba5f00f147.1697946445.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-22T03:49:22","name":"[RFC] RISC-V: Initial RV64E and LP64E support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e302a7008b07633f19c308d495968dba5f00f147.1697946445.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156521,"url":"https://patchwork.plctlab.org/api/1.2/patches/156521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jijje0h.fsf@oldenburg.str.redhat.com/","msgid":"<874jijje0h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-22T07:46:22","name":"gcc.c-torture/execute/builtins/pr93262-chk.c: Remove return statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jijje0h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156522,"url":"https://patchwork.plctlab.org/api/1.2/patches/156522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0bhzep.fsf@oldenburg.str.redhat.com/","msgid":"<87zg0bhzep.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-22T07:47:10","name":"gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0bhzep.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156600,"url":"https://patchwork.plctlab.org/api/1.2/patches/156600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022201500.2802972-1-ppalka@redhat.com/","msgid":"<20231022201500.2802972-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-22T20:15:00","name":"[pushed] objc++: type/expr tsubst conflation [PR111920]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022201500.2802972-1-ppalka@redhat.com/mbox/"},{"id":156604,"url":"https://patchwork.plctlab.org/api/1.2/patches/156604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022210050.1359773-1-ibuclaw@gdcproject.org/","msgid":"<20231022210050.1359773-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-22T21:00:50","name":"[committed] d: Merge upstream dmd f4be7f6f7b.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022210050.1359773-1-ibuclaw@gdcproject.org/mbox/"},{"id":156608,"url":"https://patchwork.plctlab.org/api/1.2/patches/156608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022222230.1633485-1-pinskia@gmail.com/","msgid":"<20231022222230.1633485-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T22:22:30","name":"Use error_mark_node after error in convert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022222230.1633485-1-pinskia@gmail.com/mbox/"},{"id":156610,"url":"https://patchwork.plctlab.org/api/1.2/patches/156610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022223205.1646902-1-pinskia@gmail.com/","msgid":"<20231022223205.1646902-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T22:32:05","name":"[Committedv2] aarch64: [PR110986] Emit csinv again for `a ? ~b : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022223205.1646902-1-pinskia@gmail.com/mbox/"},{"id":156611,"url":"https://patchwork.plctlab.org/api/1.2/patches/156611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022224643.1445215-1-juzhe.zhong@rivai.ai/","msgid":"<20231022224643.1445215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-22T22:46:43","name":"RISC-V: Fix AVL_TYPE attribute of tuple mode mov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022224643.1445215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156616,"url":"https://patchwork.plctlab.org/api/1.2/patches/156616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-1-mark@harmstone.com/","msgid":"<20231023005531.19921-1-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:27","name":"[1/5] Remove obsolete debugging formats from names list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-1-mark@harmstone.com/mbox/"},{"id":156621,"url":"https://patchwork.plctlab.org/api/1.2/patches/156621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-2-mark@harmstone.com/","msgid":"<20231023005531.19921-2-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:28","name":"[2/5] Support for CodeView debugging format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-2-mark@harmstone.com/mbox/"},{"id":156619,"url":"https://patchwork.plctlab.org/api/1.2/patches/156619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-3-mark@harmstone.com/","msgid":"<20231023005531.19921-3-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:29","name":"[3/5] Output file checksums in CodeView section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-3-mark@harmstone.com/mbox/"},{"id":156620,"url":"https://patchwork.plctlab.org/api/1.2/patches/156620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-4-mark@harmstone.com/","msgid":"<20231023005531.19921-4-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:30","name":"[4/5] Output line numbers in CodeView section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-4-mark@harmstone.com/mbox/"},{"id":156617,"url":"https://patchwork.plctlab.org/api/1.2/patches/156617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-5-mark@harmstone.com/","msgid":"<20231023005531.19921-5-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:31","name":"[5/5] Output S_COMPILE3 symbol in CodeView debug section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-5-mark@harmstone.com/mbox/"},{"id":156626,"url":"https://patchwork.plctlab.org/api/1.2/patches/156626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023012614.1420783-1-pan2.li@intel.com/","msgid":"<20231023012614.1420783-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T01:26:14","name":"[v1] RISC-V: Bugfix for merging undefined tmp register in math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023012614.1420783-1-pan2.li@intel.com/mbox/"},{"id":156630,"url":"https://patchwork.plctlab.org/api/1.2/patches/156630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQBLOre=--Mu_0onwxCETNX=3PP+eJL6j6Gch865pkew@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:44:15","name":"Go patch committed: pass Gogo to more passes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQBLOre=--Mu_0onwxCETNX=3PP+eJL6j6Gch865pkew@mail.gmail.com/mbox/"},{"id":156631,"url":"https://patchwork.plctlab.org/api/1.2/patches/156631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVurV48N+2u7+w3O4VH_W6v74+1J7kRCHO720bNrJM1PQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:46:23","name":"Go patch committed: Remove name_ field from Type_switch_statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVurV48N+2u7+w3O4VH_W6v74+1J7kRCHO720bNrJM1PQ@mail.gmail.com/mbox/"},{"id":156632,"url":"https://patchwork.plctlab.org/api/1.2/patches/156632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXa-YSZDONvOPW6qhr0GOJV9qkJ-635zrnk3Jy5JnhHkg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:48:48","name":"Go patch committed: Remove the traverse_assignments code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXa-YSZDONvOPW6qhr0GOJV9qkJ-635zrnk3Jy5JnhHkg@mail.gmail.com/mbox/"},{"id":156637,"url":"https://patchwork.plctlab.org/api/1.2/patches/156637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021324.2767717-1-panchenghui@loongson.cn/","msgid":"<20231023021324.2767717-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-10-23T02:13:24","name":"[v1] LoongArch: Fix vfrint-releated comments in lsxintrin.h and lasxintrin.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021324.2767717-1-panchenghui@loongson.cn/mbox/"},{"id":156640,"url":"https://patchwork.plctlab.org/api/1.2/patches/156640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021810.2134824-1-haochen.jiang@intel.com/","msgid":"<20231023021810.2134824-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-23T02:18:10","name":"[gccwwwdocs] gcc-13/14: Mention Intel new ISA and march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021810.2134824-1-haochen.jiang@intel.com/mbox/"},{"id":156642,"url":"https://patchwork.plctlab.org/api/1.2/patches/156642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023023904.1881908-1-pan2.li@intel.com/","msgid":"<20231023023904.1881908-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T02:39:04","name":"[v1] RISC-V: Remove unnecessary asm check for rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023023904.1881908-1-pan2.li@intel.com/mbox/"},{"id":156658,"url":"https://patchwork.plctlab.org/api/1.2/patches/156658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67O4wsQBw_VYTr9WjYYUCU8aNixuqjc4QJvNvafH35NZrA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T03:32:42","name":"[WIP] libiberty: Support for relocation output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67O4wsQBw_VYTr9WjYYUCU8aNixuqjc4QJvNvafH35NZrA@mail.gmail.com/mbox/"},{"id":156660,"url":"https://patchwork.plctlab.org/api/1.2/patches/156660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67NDE_iQ4d7RNVuMfwPt57-7+8+pgov=VapZ0og97+ieHg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T03:36:42","name":"[WIP] dwarf2out: extend to output debug section directly to object file during debug_early phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67NDE_iQ4d7RNVuMfwPt57-7+8+pgov=VapZ0og97+ieHg@mail.gmail.com/mbox/"},{"id":156673,"url":"https://patchwork.plctlab.org/api/1.2/patches/156673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023054851.1205436-1-neal.frager@amd.com/","msgid":"<20231023054851.1205436-1-neal.frager@amd.com>","list_archive_url":null,"date":"2023-10-23T05:48:51","name":"[v1,1/1] gcc: config: microblaze: fix cpu version check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023054851.1205436-1-neal.frager@amd.com/mbox/"},{"id":156674,"url":"https://patchwork.plctlab.org/api/1.2/patches/156674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023060110.2603191-1-pan2.li@intel.com/","msgid":"<20231023060110.2603191-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T06:01:10","name":"[v1] RISC-V: Remove unnecessary asm check for binop constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023060110.2603191-1-pan2.li@intel.com/mbox/"},{"id":156684,"url":"https://patchwork.plctlab.org/api/1.2/patches/156684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com/","msgid":"<1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-23T06:43:18","name":"[V11] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com/mbox/"},{"id":156695,"url":"https://patchwork.plctlab.org/api/1.2/patches/156695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77808ffa394b3d5a322d4d1a83aca13004190cd.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T07:22:52","name":"[1/4] RISC-V: Recategorize \"prefetch\" availabilities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77808ffa394b3d5a322d4d1a83aca13004190cd.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156694,"url":"https://patchwork.plctlab.org/api/1.2/patches/156694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023072252.1716510-1-juzhe.zhong@rivai.ai/","msgid":"<20231023072252.1716510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T07:22:52","name":"[Committed] RISC-V: Fix typo[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023072252.1716510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156696,"url":"https://patchwork.plctlab.org/api/1.2/patches/156696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"<68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-23T07:22:53","name":"[2/4] RISC-V: Remove broken __builtin_riscv_zicbop_cbo_prefetchi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156697,"url":"https://patchwork.plctlab.org/api/1.2/patches/156697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"<671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-23T07:22:54","name":"[3/4] RISC-V: Add not broken RW prefetch RTL instructions without offsets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156698,"url":"https://patchwork.plctlab.org/api/1.2/patches/156698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1156590d83afbb22bed387ace4ed9a743df0340.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T07:22:55","name":"[4/4] RISC-V: Fix ICE by expansion and register coercion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1156590d83afbb22bed387ace4ed9a743df0340.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156713,"url":"https://patchwork.plctlab.org/api/1.2/patches/156713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023075335.3063731-1-pan2.li@intel.com/","msgid":"<20231023075335.3063731-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T07:53:35","name":"[v1] RISC-V: Bugfix for merging undef tmp register for trunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023075335.3063731-1-pan2.li@intel.com/mbox/"},{"id":156746,"url":"https://patchwork.plctlab.org/api/1.2/patches/156746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com/","msgid":"<79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com>","list_archive_url":null,"date":"2023-10-23T08:32:34","name":"[PING,^1,v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com/mbox/"},{"id":156747,"url":"https://patchwork.plctlab.org/api/1.2/patches/156747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jihybsu.fsf@oldenburg.str.redhat.com/","msgid":"<874jihybsu.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-23T08:37:21","name":"[v2] gcc.c-torture/execute/builtins/fputs.c: fputs_unlocked prototype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jihybsu.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156753,"url":"https://patchwork.plctlab.org/api/1.2/patches/156753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023084803.1600456-1-hongtao.liu@intel.com/","msgid":"<20231023084803.1600456-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-23T08:48:03","name":"Support vec_cmpmn/vcondmn for v2hf/v4hf.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023084803.1600456-1-hongtao.liu@intel.com/mbox/"},{"id":156761,"url":"https://patchwork.plctlab.org/api/1.2/patches/156761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023090401.1724890-1-juzhe.zhong@rivai.ai/","msgid":"<20231023090401.1724890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T09:04:01","name":"RISC-V: Fix ICE for the fusion case from vsetvl to scalar move[PR111927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023090401.1724890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156766,"url":"https://patchwork.plctlab.org/api/1.2/patches/156766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023091915.385-1-xujiahao@loongson.cn/","msgid":"<20231023091915.385-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T09:19:15","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023091915.385-1-xujiahao@loongson.cn/mbox/"},{"id":156784,"url":"https://patchwork.plctlab.org/api/1.2/patches/156784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094034.1728130-1-juzhe.zhong@rivai.ai/","msgid":"<20231023094034.1728130-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T09:40:34","name":"[V2] RISC-V: Fix ICE for the fusion case from vsetvl to scalar move[PR111927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094034.1728130-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156794,"url":"https://patchwork.plctlab.org/api/1.2/patches/156794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094629.5189-1-xujiahao@loongson.cn/","msgid":"<20231023094629.5189-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T09:46:29","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094629.5189-1-xujiahao@loongson.cn/mbox/"},{"id":156800,"url":"https://patchwork.plctlab.org/api/1.2/patches/156800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023095457.3675888-1-pan2.li@intel.com/","msgid":"<20231023095457.3675888-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T09:54:57","name":"[v1] RISC-V: Remove unnecessary asm check for vec cvt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023095457.3675888-1-pan2.li@intel.com/mbox/"},{"id":156818,"url":"https://patchwork.plctlab.org/api/1.2/patches/156818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100054.6387-1-xujiahao@loongson.cn/","msgid":"<20231023100054.6387-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T10:00:54","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100054.6387-1-xujiahao@loongson.cn/mbox/"},{"id":156820,"url":"https://patchwork.plctlab.org/api/1.2/patches/156820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100319.7208-1-xujiahao@loongson.cn/","msgid":"<20231023100319.7208-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T10:03:19","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100319.7208-1-xujiahao@loongson.cn/mbox/"},{"id":156821,"url":"https://patchwork.plctlab.org/api/1.2/patches/156821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6274430-da03-4c9f-88e3-6780dee79850@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T10:03:41","name":"[V12,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6274430-da03-4c9f-88e3-6780dee79850@linux.ibm.com/mbox/"},{"id":156834,"url":"https://patchwork.plctlab.org/api/1.2/patches/156834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023103504.0C30D3858414@sourceware.org/","msgid":"<20231023103504.0C30D3858414@sourceware.org>","list_archive_url":null,"date":"2023-10-23T10:34:36","name":"tree-optimization/111917 - bougs IL after guard hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023103504.0C30D3858414@sourceware.org/mbox/"},{"id":156860,"url":"https://patchwork.plctlab.org/api/1.2/patches/156860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023124350.432036-1-slyich@gmail.com/","msgid":"<20231023124350.432036-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-23T12:43:50","name":"libgcc: make heap-based trampolines conditional on libc presence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023124350.432036-1-slyich@gmail.com/mbox/"},{"id":156867,"url":"https://patchwork.plctlab.org/api/1.2/patches/156867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023131839.6244-1-iain@sandoe.co.uk/","msgid":"<20231023131839.6244-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-23T13:18:39","name":"[pushed] configure, libquadmath: Remove unintended AC_CHECK_LIBM [PR111928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023131839.6244-1-iain@sandoe.co.uk/mbox/"},{"id":156881,"url":"https://patchwork.plctlab.org/api/1.2/patches/156881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a684f28033020f45021de3ef40a1599e78fececf.camel@t-online.de/","msgid":"","list_archive_url":null,"date":"2023-10-23T13:28:15","name":"[SH,committed] Fix PR 111001","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a684f28033020f45021de3ef40a1599e78fececf.camel@t-online.de/mbox/"},{"id":156887,"url":"https://patchwork.plctlab.org/api/1.2/patches/156887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTZ1wAAwCWg0hFMH@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T13:31:44","name":"Backport PR106878 fixes to GCC 12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTZ1wAAwCWg0hFMH@arm.com/mbox/"},{"id":156885,"url":"https://patchwork.plctlab.org/api/1.2/patches/156885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133225.B77493857707@sourceware.org/","msgid":"<20231023133225.B77493857707@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:00","name":"ipa/111914 - perform parameter init after remapping types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133225.B77493857707@sourceware.org/mbox/"},{"id":156886,"url":"https://patchwork.plctlab.org/api/1.2/patches/156886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133240.CF3AB3858C60@sourceware.org/","msgid":"<20231023133240.CF3AB3858C60@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:14","name":"tree-optimization/111915 - mixing grouped and non-grouped accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133240.CF3AB3858C60@sourceware.org/mbox/"},{"id":156889,"url":"https://patchwork.plctlab.org/api/1.2/patches/156889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133328.EC8E53857012@sourceware.org/","msgid":"<20231023133328.EC8E53857012@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:29","name":"tree-optimization/111916 - SRA of BIT_FIELD_REF of constant pool entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133328.EC8E53857012@sourceware.org/mbox/"},{"id":156927,"url":"https://patchwork.plctlab.org/api/1.2/patches/156927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com/","msgid":"<008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-23T14:47:43","name":"[x86] Fine tune STV register conversion costs for -Os.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com/mbox/"},{"id":156964,"url":"https://patchwork.plctlab.org/api/1.2/patches/156964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9b33876-cf75-417e-85b3-89e00e17435f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T16:09:58","name":"internal-fn: Add VCOND_MASK_LEN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9b33876-cf75-417e-85b3-89e00e17435f@gmail.com/mbox/"},{"id":157072,"url":"https://patchwork.plctlab.org/api/1.2/patches/157072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTbIxWiL27+PeZAG@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T19:25:57","name":"[v3] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTbIxWiL27+PeZAG@redhat.com/mbox/"},{"id":157097,"url":"https://patchwork.plctlab.org/api/1.2/patches/157097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU493DggQLbcvZK9CJ7aNeXQb2pHqdKbKp8_bbO0+1qMw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:03:49","name":"libgo patch committed: Add missing type conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU493DggQLbcvZK9CJ7aNeXQb2pHqdKbKp8_bbO0+1qMw@mail.gmail.com/mbox/"},{"id":157098,"url":"https://patchwork.plctlab.org/api/1.2/patches/157098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU3j0sDsO0Q9pav_ZmDXoo-3qs7LqB9PFcjD2+K-BbaBQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:06:13","name":"Go patch committed: Add Expression::is_untyped method","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU3j0sDsO0Q9pav_ZmDXoo-3qs7LqB9PFcjD2+K-BbaBQ@mail.gmail.com/mbox/"},{"id":157108,"url":"https://patchwork.plctlab.org/api/1.2/patches/157108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV=onhFGYmqDYM1j27sW3vNziwuGn-NdOS2MJSzAF9NTQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:08:51","name":"Go patch committed: Pass Gogo to Runtime::make_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV=onhFGYmqDYM1j27sW3vNziwuGn-NdOS2MJSzAF9NTQ@mail.gmail.com/mbox/"},{"id":157110,"url":"https://patchwork.plctlab.org/api/1.2/patches/157110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVGOxZRUakFJ97=rj3W6mxfJF3AgjvkcjWzDrvEMw4gjA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:14:28","name":"Go patch committed: Make xx_constant_value methods non-const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVGOxZRUakFJ97=rj3W6mxfJF3AgjvkcjWzDrvEMw4gjA@mail.gmail.com/mbox/"},{"id":157111,"url":"https://patchwork.plctlab.org/api/1.2/patches/157111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW0wZAzZJKOQZpVDesbprupOf47Vum=fTqWu9jvorzT2Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:16:53","name":"Go patch committed: Move Selector_expression up in file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW0wZAzZJKOQZpVDesbprupOf47Vum=fTqWu9jvorzT2Q@mail.gmail.com/mbox/"},{"id":157131,"url":"https://patchwork.plctlab.org/api/1.2/patches/157131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023230348.606997-1-pinskia@gmail.com/","msgid":"<20231023230348.606997-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-23T23:03:48","name":"match: Fix the `popcnt(a&b) + popcnt(a|b)` patthern for types [PR111913]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023230348.606997-1-pinskia@gmail.com/mbox/"},{"id":157142,"url":"https://patchwork.plctlab.org/api/1.2/patches/157142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023234924.2971461-1-ppalka@redhat.com/","msgid":"<20231023234924.2971461-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:49:24","name":"c++: cp_stabilize_reference and non-dep exprs [PR111919]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023234924.2971461-1-ppalka@redhat.com/mbox/"},{"id":157143,"url":"https://patchwork.plctlab.org/api/1.2/patches/157143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-1-ppalka@redhat.com/","msgid":"<20231023235154.2971561-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:52","name":"[v2,1/3] c++: sort candidates according to viability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-1-ppalka@redhat.com/mbox/"},{"id":157144,"url":"https://patchwork.plctlab.org/api/1.2/patches/157144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-2-ppalka@redhat.com/","msgid":"<20231023235154.2971561-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:53","name":"[v2,2/3] c++: remember candidates that we ignored","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-2-ppalka@redhat.com/mbox/"},{"id":157145,"url":"https://patchwork.plctlab.org/api/1.2/patches/157145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-3-ppalka@redhat.com/","msgid":"<20231023235154.2971561-3-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:54","name":"[v2,3/3] c++: note other candidates when diagnosing deletedness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-3-ppalka@redhat.com/mbox/"},{"id":157200,"url":"https://patchwork.plctlab.org/api/1.2/patches/157200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-2-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:44","name":"[v25,01/33] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-2-kmatsui@gcc.gnu.org/mbox/"},{"id":157195,"url":"https://patchwork.plctlab.org/api/1.2/patches/157195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-3-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:45","name":"[v25,02/33] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-3-kmatsui@gcc.gnu.org/mbox/"},{"id":157199,"url":"https://patchwork.plctlab.org/api/1.2/patches/157199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-4-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:46","name":"[v25,03/33] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-4-kmatsui@gcc.gnu.org/mbox/"},{"id":157197,"url":"https://patchwork.plctlab.org/api/1.2/patches/157197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-5-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:47","name":"[v25,04/33] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-5-kmatsui@gcc.gnu.org/mbox/"},{"id":157196,"url":"https://patchwork.plctlab.org/api/1.2/patches/157196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-6-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:48","name":"[v25,05/33] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-6-kmatsui@gcc.gnu.org/mbox/"},{"id":157201,"url":"https://patchwork.plctlab.org/api/1.2/patches/157201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-9-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:51","name":"[v25,08/33] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-9-kmatsui@gcc.gnu.org/mbox/"},{"id":157203,"url":"https://patchwork.plctlab.org/api/1.2/patches/157203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-11-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:53","name":"[v25,10/33] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-11-kmatsui@gcc.gnu.org/mbox/"},{"id":157202,"url":"https://patchwork.plctlab.org/api/1.2/patches/157202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-23-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:01:05","name":"[v25,22/33] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-23-kmatsui@gcc.gnu.org/mbox/"},{"id":157198,"url":"https://patchwork.plctlab.org/api/1.2/patches/157198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-24-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:01:06","name":"[v25,23/33] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-24-kmatsui@gcc.gnu.org/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-10/mbox/"},{"id":39,"url":"https://patchwork.plctlab.org/api/1.2/bundles/39/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-11/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-11","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":160173,"url":"https://patchwork.plctlab.org/api/1.2/patches/160173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com/","msgid":"<27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com>","list_archive_url":null,"date":"2023-10-31T15:47:00","name":"[pushed,PR111917,RA] : Fixing LRA cycling for multi-reg variable containing a fixed reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com/mbox/"},{"id":160285,"url":"https://patchwork.plctlab.org/api/1.2/patches/160285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-1-christoph.muellner@vrull.eu/","msgid":"<20231031171123.569951-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-31T17:11:22","name":"[committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-1-christoph.muellner@vrull.eu/mbox/"},{"id":160284,"url":"https://patchwork.plctlab.org/api/1.2/patches/160284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-2-christoph.muellner@vrull.eu/","msgid":"<20231031171123.569951-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-31T17:11:23","name":"[committed,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-2-christoph.muellner@vrull.eu/mbox/"},{"id":160306,"url":"https://patchwork.plctlab.org/api/1.2/patches/160306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031181726.3944801-1-ppalka@redhat.com/","msgid":"<20231031181726.3944801-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-31T18:17:26","name":"c++: constantness of local var in constexpr fn [PR111703, PR112269]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031181726.3944801-1-ppalka@redhat.com/mbox/"},{"id":160309,"url":"https://patchwork.plctlab.org/api/1.2/patches/160309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031183504.832611-1-vineetg@rivosinc.com/","msgid":"<20231031183504.832611-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T18:35:04","name":"RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031183504.832611-1-vineetg@rivosinc.com/mbox/"},{"id":160311,"url":"https://patchwork.plctlab.org/api/1.2/patches/160311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b56c707834dbf0434545d5f66a92f4426bfa4d35.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-10-31T19:05:09","name":"Reduce false positives for -Wnonnull for VLA parameters [PR98541]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b56c707834dbf0434545d5f66a92f4426bfa4d35.camel@tugraz.at/mbox/"},{"id":160348,"url":"https://patchwork.plctlab.org/api/1.2/patches/160348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211552.1907869-1-dmalcolm@redhat.com/","msgid":"<20231031211552.1907869-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:52","name":"[pushed] pretty-print: gracefully handle null URLs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211552.1907869-1-dmalcolm@redhat.com/mbox/"},{"id":160349,"url":"https://patchwork.plctlab.org/api/1.2/patches/160349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211556.1907893-1-dmalcolm@redhat.com/","msgid":"<20231031211556.1907893-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:56","name":"[pushed] opts.cc: fix comment about DOCUMENTATION_ROOT_URL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211556.1907893-1-dmalcolm@redhat.com/mbox/"},{"id":160350,"url":"https://patchwork.plctlab.org/api/1.2/patches/160350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211559.1907917-1-dmalcolm@redhat.com/","msgid":"<20231031211559.1907917-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:59","name":"[pushed] libcpp: eliminate MACRO_MAP_EXPANSION_POINT_LOCATION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211559.1907917-1-dmalcolm@redhat.com/mbox/"},{"id":160351,"url":"https://patchwork.plctlab.org/api/1.2/patches/160351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211604.1907952-1-dmalcolm@redhat.com/","msgid":"<20231031211604.1907952-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:16:04","name":"[pushed] analyzer: move class record_layout to its own .h/.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211604.1907952-1-dmalcolm@redhat.com/mbox/"},{"id":160379,"url":"https://patchwork.plctlab.org/api/1.2/patches/160379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031225144.24448-1-ewlu@rivosinc.com/","msgid":"<20231031225144.24448-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T22:51:44","name":"[RFC] Make genautomata.cc output reflect insn-attr.h expectation:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031225144.24448-1-ewlu@rivosinc.com/mbox/"},{"id":160382,"url":"https://patchwork.plctlab.org/api/1.2/patches/160382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031232525.27391-1-patrick@rivosinc.com/","msgid":"<20231031232525.27391-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T23:25:25","name":"[v2] RISC-V: Enable ztso tests on rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031232525.27391-1-patrick@rivosinc.com/mbox/"},{"id":160414,"url":"https://patchwork.plctlab.org/api/1.2/patches/160414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101005051.607257-1-juzhe.zhong@rivai.ai/","msgid":"<20231101005051.607257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T00:50:51","name":"[Committed] NFC: Fix whitespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101005051.607257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160419,"url":"https://patchwork.plctlab.org/api/1.2/patches/160419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101014302.2457445-1-juzhe.zhong@rivai.ai/","msgid":"<20231101014302.2457445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T01:43:02","name":"[Commit,Pending,V2] RISC-V: Support strided load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101014302.2457445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160437,"url":"https://patchwork.plctlab.org/api/1.2/patches/160437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101050512.33961-1-patrick@rivosinc.com/","msgid":"<20231101050512.33961-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T05:05:12","name":"RISC-V: Use riscv_subword_address for atomic_test_and_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101050512.33961-1-patrick@rivosinc.com/mbox/"},{"id":160443,"url":"https://patchwork.plctlab.org/api/1.2/patches/160443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101063519.33245-1-xuli1@eswincomputing.com/","msgid":"<20231101063519.33245-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-01T06:35:19","name":"RISC-V: Support vundefine intrinsics for tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101063519.33245-1-xuli1@eswincomputing.com/mbox/"},{"id":160449,"url":"https://patchwork.plctlab.org/api/1.2/patches/160449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101065639.158911-1-juzhe.zhong@rivai.ai/","msgid":"<20231101065639.158911-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T06:56:39","name":"RISC-V: Allow dest operand and accumulator operand overlap of widen reduction instruction[PR112327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101065639.158911-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160493,"url":"https://patchwork.plctlab.org/api/1.2/patches/160493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at/","msgid":"<01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-01T09:39:16","name":"RFC [PATCH] c: Add missing cases where vla sizes are not instrumented by UBSan [PR98608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at/mbox/"},{"id":160495,"url":"https://patchwork.plctlab.org/api/1.2/patches/160495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bgAW=cxxv=H1N-gsfmeGM8uqC7wkfRCOw+x_D+EsM6hw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-01T09:45:37","name":"[PUSHED] i386: Improve stack protector patterns and peephole2s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bgAW=cxxv=H1N-gsfmeGM8uqC7wkfRCOw+x_D+EsM6hw@mail.gmail.com/mbox/"},{"id":160500,"url":"https://patchwork.plctlab.org/api/1.2/patches/160500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101100822.2126091-1-hongtao.liu@intel.com/","msgid":"<20231101100822.2126091-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-01T10:08:22","name":"Support cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101100822.2126091-1-hongtao.liu@intel.com/mbox/"},{"id":160597,"url":"https://patchwork.plctlab.org/api/1.2/patches/160597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101161439.41429-1-patrick@rivosinc.com/","msgid":"<20231101161439.41429-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T16:14:39","name":"[v2] RISC-V: Use riscv_subword_address for atomic_test_and_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101161439.41429-1-patrick@rivosinc.com/mbox/"},{"id":160647,"url":"https://patchwork.plctlab.org/api/1.2/patches/160647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101181713.54765-1-ewlu@rivosinc.com/","msgid":"<20231101181713.54765-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T18:17:13","name":"RISC-V: Add check for types without insn reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101181713.54765-1-ewlu@rivosinc.com/mbox/"},{"id":160695,"url":"https://patchwork.plctlab.org/api/1.2/patches/160695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215132.879718-1-vineetg@rivosinc.com/","msgid":"<20231101215132.879718-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T21:51:32","name":"[[Committed] ] RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215132.879718-1-vineetg@rivosinc.com/mbox/"},{"id":160696,"url":"https://patchwork.plctlab.org/api/1.2/patches/160696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215457.3935908-1-lhyatt@gmail.com/","msgid":"<20231101215457.3935908-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-11-01T21:54:57","name":"preprocessor: Reinitialize frontend parser after loading a PCH [PR112319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215457.3935908-1-lhyatt@gmail.com/mbox/"},{"id":160743,"url":"https://patchwork.plctlab.org/api/1.2/patches/160743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005432.21119-1-xuli1@eswincomputing.com/","msgid":"<20231102005432.21119-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-02T00:54:32","name":"RISC-V: Support vcreate intrinsics for non-tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005432.21119-1-xuli1@eswincomputing.com/mbox/"},{"id":160744,"url":"https://patchwork.plctlab.org/api/1.2/patches/160744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005737.2418307-1-juzhe.zhong@rivai.ai/","msgid":"<20231102005737.2418307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T00:57:37","name":"[tree-optimization/111721] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005737.2418307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160745,"url":"https://patchwork.plctlab.org/api/1.2/patches/160745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvxnemj.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-02T01:11:16","name":"testsuite: introduce hostedlib effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvxnemj.fsf@lxoliva.fsfla.org/mbox/"},{"id":160752,"url":"https://patchwork.plctlab.org/api/1.2/patches/160752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102024651.2347027-1-juzhe.zhong@rivai.ai/","msgid":"<20231102024651.2347027-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T02:46:51","name":"[Committed] RISC-V: Fix redundant attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102024651.2347027-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160764,"url":"https://patchwork.plctlab.org/api/1.2/patches/160764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102030611.2653544-1-juzhe.zhong@rivai.ai/","msgid":"<20231102030611.2653544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T03:06:11","name":"RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102030611.2653544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160767,"url":"https://patchwork.plctlab.org/api/1.2/patches/160767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102031423.3751965-1-pan2.li@intel.com/","msgid":"<20231102031423.3751965-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-02T03:14:23","name":"[v1] EXPMED: Allow vector mode for DSE extract_low_bits [PR111720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102031423.3751965-1-pan2.li@intel.com/mbox/"},{"id":160778,"url":"https://patchwork.plctlab.org/api/1.2/patches/160778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102033427.178709-1-juzhe.zhong@rivai.ai/","msgid":"<20231102033427.178709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T03:34:27","name":"[V2] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102033427.178709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160799,"url":"https://patchwork.plctlab.org/api/1.2/patches/160799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102075019.4111564-1-yunqiang.su@cipunited.com/","msgid":"<20231102075019.4111564-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-02T07:50:19","name":"MIPS: Use -mnan value for -mabs if not specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102075019.4111564-1-yunqiang.su@cipunited.com/mbox/"},{"id":160807,"url":"https://patchwork.plctlab.org/api/1.2/patches/160807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-1-sam@gentoo.org/","msgid":"<20231102084058.1142941-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:05","name":"[1/4] contrib: add generate_snapshot_index.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-1-sam@gentoo.org/mbox/"},{"id":160808,"url":"https://patchwork.plctlab.org/api/1.2/patches/160808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-2-sam@gentoo.org/","msgid":"<20231102084058.1142941-2-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:06","name":"[2/4] maintainer-scripts/gcc_release: create index between snapshots <-> commits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-2-sam@gentoo.org/mbox/"},{"id":160809,"url":"https://patchwork.plctlab.org/api/1.2/patches/160809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-3-sam@gentoo.org/","msgid":"<20231102084058.1142941-3-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:07","name":"[3/4] maintainer-scripts/gcc_release: use HTTPS for links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-3-sam@gentoo.org/mbox/"},{"id":160810,"url":"https://patchwork.plctlab.org/api/1.2/patches/160810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-4-sam@gentoo.org/","msgid":"<20231102084058.1142941-4-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:08","name":"[4/4] maintainer-scripts/gcc_release: cleanup whitespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-4-sam@gentoo.org/mbox/"},{"id":160811,"url":"https://patchwork.plctlab.org/api/1.2/patches/160811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084540.2869665-1-arsen@aarsen.me/","msgid":"<20231102084540.2869665-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-02T08:45:37","name":"[v3,2/2] *: add modern gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084540.2869665-1-arsen@aarsen.me/mbox/"},{"id":160812,"url":"https://patchwork.plctlab.org/api/1.2/patches/160812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102090234.1145382-1-sam@gentoo.org/","msgid":"<20231102090234.1145382-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T09:02:30","name":"doc: explicitly say '\''lifetime'\'' for DCE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102090234.1145382-1-sam@gentoo.org/mbox/"},{"id":160822,"url":"https://patchwork.plctlab.org/api/1.2/patches/160822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102103109.E2A02385B522@sourceware.org/","msgid":"<20231102103109.E2A02385B522@sourceware.org>","list_archive_url":null,"date":"2023-11-02T10:30:36","name":"tree-optimization/112320 - bougs debug IL after SCCP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102103109.E2A02385B522@sourceware.org/mbox/"},{"id":160838,"url":"https://patchwork.plctlab.org/api/1.2/patches/160838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102113023.2225297-1-juzhe.zhong@rivai.ai/","msgid":"<20231102113023.2225297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T11:30:23","name":"RISC-V: Fix bug of AVL propagation PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102113023.2225297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160851,"url":"https://patchwork.plctlab.org/api/1.2/patches/160851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102114802.17020-1-pan2.li@intel.com/","msgid":"<20231102114802.17020-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-02T11:48:02","name":"[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102114802.17020-1-pan2.li@intel.com/mbox/"},{"id":160852,"url":"https://patchwork.plctlab.org/api/1.2/patches/160852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com/","msgid":"<025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-02T11:50:38","name":"[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com/mbox/"},{"id":160853,"url":"https://patchwork.plctlab.org/api/1.2/patches/160853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026501da0d83$457b0d20$d0712760$@nextmovesoftware.com/","msgid":"<026501da0d83$457b0d20$d0712760$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-02T11:54:00","name":"[AVR] Improvements to SImode and PSImode shifts by constants.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026501da0d83$457b0d20$d0712760$@nextmovesoftware.com/mbox/"},{"id":160869,"url":"https://patchwork.plctlab.org/api/1.2/patches/160869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124852.2156995-1-dmalcolm@redhat.com/","msgid":"<20231102124852.2156995-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T12:48:52","name":"[pushed] analyzer: fix clang warnings [PR112317]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124852.2156995-1-dmalcolm@redhat.com/mbox/"},{"id":160870,"url":"https://patchwork.plctlab.org/api/1.2/patches/160870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124855.3226695-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231102124855.3226695-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-02T12:48:55","name":"Format gotools.sum closer to what DejaGnu does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124855.3226695-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":160872,"url":"https://patchwork.plctlab.org/api/1.2/patches/160872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUOdUqCW0a8NIAuf@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-11-02T13:00:02","name":"[v2] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUOdUqCW0a8NIAuf@fkdesktop.suse.cz/mbox/"},{"id":160878,"url":"https://patchwork.plctlab.org/api/1.2/patches/160878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-2-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:30","name":"[1/4] c/c++: rework pragma parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-2-dmalcolm@redhat.com/mbox/"},{"id":160877,"url":"https://patchwork.plctlab.org/api/1.2/patches/160877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-3-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:31","name":"[2/4] c: add #pragma GCC show_layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-3-dmalcolm@redhat.com/mbox/"},{"id":160876,"url":"https://patchwork.plctlab.org/api/1.2/patches/160876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-4-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:32","name":"[3/4] diagnostics: add automatic URL-ification within messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-4-dmalcolm@redhat.com/mbox/"},{"id":160879,"url":"https://patchwork.plctlab.org/api/1.2/patches/160879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-5-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:33","name":"[4/4] RFC: add contrib/regenerate-index-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-5-dmalcolm@redhat.com/mbox/"},{"id":160881,"url":"https://patchwork.plctlab.org/api/1.2/patches/160881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2697c64-9453-4b2b-9419-be4bf594d54e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T13:34:13","name":"[committed] Improve H8 sequences for single bit sign extractions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2697c64-9453-4b2b-9419-be4bf594d54e@gmail.com/mbox/"},{"id":160911,"url":"https://patchwork.plctlab.org/api/1.2/patches/160911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135439.2777314-1-jwakely@redhat.com/","msgid":"<20231102135439.2777314-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:53:56","name":"[committed] libstdc++: Fix warning during configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135439.2777314-1-jwakely@redhat.com/mbox/"},{"id":160886,"url":"https://patchwork.plctlab.org/api/1.2/patches/160886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135719.33814-1-ibuclaw@gdcproject.org/","msgid":"<20231102135719.33814-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-02T13:57:19","name":"[committed] d: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e7","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135719.33814-1-ibuclaw@gdcproject.org/mbox/"},{"id":160971,"url":"https://patchwork.plctlab.org/api/1.2/patches/160971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145434.2812083-1-jwakely@redhat.com/","msgid":"<20231102145434.2812083-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T14:54:01","name":"[committed] libstdc++: Add assertion to std::string_view::remove_suffix [PR112314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145434.2812083-1-jwakely@redhat.com/mbox/"},{"id":160972,"url":"https://patchwork.plctlab.org/api/1.2/patches/160972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145522.2813330-1-jwakely@redhat.com/","msgid":"<20231102145522.2813330-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T14:54:59","name":"libstdc++: Improve static assert messages for monadic operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145522.2813330-1-jwakely@redhat.com/mbox/"},{"id":160910,"url":"https://patchwork.plctlab.org/api/1.2/patches/160910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/962ec283-a600-42e9-942a-7811d10f8f7b@arm.com/","msgid":"<962ec283-a600-42e9-942a-7811d10f8f7b@arm.com>","list_archive_url":null,"date":"2023-11-02T14:58:11","name":"vect: allow using inbranch simdclones for masked loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/962ec283-a600-42e9-942a-7811d10f8f7b@arm.com/mbox/"},{"id":160942,"url":"https://patchwork.plctlab.org/api/1.2/patches/160942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUPAK/ZeelV4yAIa@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T15:28:43","name":"[v3] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUPAK/ZeelV4yAIa@redhat.com/mbox/"},{"id":160989,"url":"https://patchwork.plctlab.org/api/1.2/patches/160989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-2-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:29","name":"[V3,1/6] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-2-victor.donascimento@arm.com/mbox/"},{"id":160987,"url":"https://patchwork.plctlab.org/api/1.2/patches/160987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-3-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:30","name":"[V3,2/6] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-3-victor.donascimento@arm.com/mbox/"},{"id":160991,"url":"https://patchwork.plctlab.org/api/1.2/patches/160991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-4-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:31","name":"[V3,3/6] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-4-victor.donascimento@arm.com/mbox/"},{"id":160990,"url":"https://patchwork.plctlab.org/api/1.2/patches/160990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-5-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:32","name":"[V3,4/6] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-5-victor.donascimento@arm.com/mbox/"},{"id":160986,"url":"https://patchwork.plctlab.org/api/1.2/patches/160986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-6-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:33","name":"[V3,5/6] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-6-victor.donascimento@arm.com/mbox/"},{"id":160988,"url":"https://patchwork.plctlab.org/api/1.2/patches/160988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-7-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:34","name":"[V3,6/6] aarch64: Add system register duplication check selftest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-7-victor.donascimento@arm.com/mbox/"},{"id":161092,"url":"https://patchwork.plctlab.org/api/1.2/patches/161092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102190911.66763-1-patrick@rivosinc.com/","msgid":"<20231102190911.66763-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-02T19:09:11","name":"gfortran: Rely on dg-do-what-default to avoid running pr85853.f90, pr107254.f90 and vect-alias-check-1.F90 on non-vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102190911.66763-1-patrick@rivosinc.com/mbox/"},{"id":161110,"url":"https://patchwork.plctlab.org/api/1.2/patches/161110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102195652.9965-1-ben.sherman@chicagotrading.com/","msgid":"<20231102195652.9965-1-ben.sherman@chicagotrading.com>","list_archive_url":null,"date":"2023-11-02T19:56:53","name":"libstdc++: avoid uninitialized read in basic_string constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102195652.9965-1-ben.sherman@chicagotrading.com/mbox/"},{"id":161111,"url":"https://patchwork.plctlab.org/api/1.2/patches/161111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200104.723881-1-jason@redhat.com/","msgid":"<20231102200104.723881-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-02T20:01:04","name":"[pushed] c++: retval dtor on rethrow [PR112301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200104.723881-1-jason@redhat.com/mbox/"},{"id":161112,"url":"https://patchwork.plctlab.org/api/1.2/patches/161112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200129.724441-1-jason@redhat.com/","msgid":"<20231102200129.724441-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-02T20:01:29","name":"[pushed] c++: use hash_set in nrv_data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200129.724441-1-jason@redhat.com/mbox/"},{"id":161122,"url":"https://patchwork.plctlab.org/api/1.2/patches/161122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed1ab120-cb87-4f1f-a219-0e0c6e8929e2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T20:50:21","name":"tree-optimization: Add register pressure heuristics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed1ab120-cb87-4f1f-a219-0e0c6e8929e2@linux.ibm.com/mbox/"},{"id":161142,"url":"https://patchwork.plctlab.org/api/1.2/patches/161142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102234527.77231-1-patrick@rivosinc.com/","msgid":"<20231102234527.77231-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-02T23:45:27","name":"g++: Rely on dg-do-what-default to avoid running pr102788.cc on non-vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102234527.77231-1-patrick@rivosinc.com/mbox/"},{"id":161145,"url":"https://patchwork.plctlab.org/api/1.2/patches/161145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103003603.3613011-1-juzhe.zhong@rivai.ai/","msgid":"<20231103003603.3613011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T00:36:03","name":"[Committed,V3] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103003603.3613011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161147,"url":"https://patchwork.plctlab.org/api/1.2/patches/161147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65444a6a.170a0220.5f247.11c7@mx.google.com/","msgid":"<65444a6a.170a0220.5f247.11c7@mx.google.com>","list_archive_url":null,"date":"2023-11-03T01:18:29","name":"c++: End lifetime of objects in constexpr after destructor call [PR71093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65444a6a.170a0220.5f247.11c7@mx.google.com/mbox/"},{"id":161152,"url":"https://patchwork.plctlab.org/api/1.2/patches/161152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVP8wFc_SLyWMjhD8sGeNk5XH=XSP7PN2MEY0e8cqWbmA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T03:04:26","name":"libstdc++ patch RFA: Fix dl_iterate_phdr configury for libbacktrace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVP8wFc_SLyWMjhD8sGeNk5XH=XSP7PN2MEY0e8cqWbmA@mail.gmail.com/mbox/"},{"id":161155,"url":"https://patchwork.plctlab.org/api/1.2/patches/161155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103032634.2983364-1-pan2.li@intel.com/","msgid":"<20231103032634.2983364-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-03T03:26:34","name":"[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103032634.2983364-1-pan2.li@intel.com/mbox/"},{"id":161169,"url":"https://patchwork.plctlab.org/api/1.2/patches/161169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103061849.79159-1-patrick@rivosinc.com/","msgid":"<20231103061849.79159-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-03T06:18:49","name":"g++: Add require-effective-target to multi-input file testcase pr95401.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103061849.79159-1-patrick@rivosinc.com/mbox/"},{"id":161170,"url":"https://patchwork.plctlab.org/api/1.2/patches/161170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103064113.823617-1-juzhe.zhong@rivai.ai/","msgid":"<20231103064113.823617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T06:41:13","name":"[tree-optimization/111721,V2] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103064113.823617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161191,"url":"https://patchwork.plctlab.org/api/1.2/patches/161191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKWiCVkVTrPbyRWExyg1vL3xqfBYk6_h0_o9s3Hpva1gg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T06:44:35","name":"[fortran] PR112316 - [13 Regression] Fix for PR87477 rejects valid code with a bogus error...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKWiCVkVTrPbyRWExyg1vL3xqfBYk6_h0_o9s3Hpva1gg@mail.gmail.com/mbox/"},{"id":161179,"url":"https://patchwork.plctlab.org/api/1.2/patches/161179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103071105.DE25413907@imap2.suse-dmz.suse.de/","msgid":"<20231103071105.DE25413907@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T07:11:05","name":"[doc] middle-end/112296 - __builtin_constant_p and side-effects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103071105.DE25413907@imap2.suse-dmz.suse.de/mbox/"},{"id":161190,"url":"https://patchwork.plctlab.org/api/1.2/patches/161190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee5ebd2a-2702-4c10-9efa-96672506e666@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T07:44:22","name":"[v3] rs6000/p8swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee5ebd2a-2702-4c10-9efa-96672506e666@linux.vnet.ibm.com/mbox/"},{"id":161206,"url":"https://patchwork.plctlab.org/api/1.2/patches/161206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103084827.1306269-1-juzhe.zhong@rivai.ai/","msgid":"<20231103084827.1306269-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T08:48:27","name":"OPTAB: Add mask_len_strided_load/mask_len_strided_store optab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103084827.1306269-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161203,"url":"https://patchwork.plctlab.org/api/1.2/patches/161203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103090136.1672669-1-panchenghui@loongson.cn/","msgid":"<20231103090136.1672669-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-11-03T09:01:36","name":"[v1] LoongArch: Fix instruction name typo in lsx_vreplgr2vr_ template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103090136.1672669-1-panchenghui@loongson.cn/mbox/"},{"id":161227,"url":"https://patchwork.plctlab.org/api/1.2/patches/161227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bKQg28H+6fx4KtT9OFGMOf9xK1OiV4oPhyt3gJiG4k9g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T10:34:12","name":"[RFC,RFA] i386: Handle multiple address register classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bKQg28H+6fx4KtT9OFGMOf9xK1OiV4oPhyt3gJiG4k9g@mail.gmail.com/mbox/"},{"id":161228,"url":"https://patchwork.plctlab.org/api/1.2/patches/161228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103103446.1B3F31348C@imap2.suse-dmz.suse.de/","msgid":"<20231103103446.1B3F31348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T10:34:45","name":"tree-optimization/112310 - code hoisting undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103103446.1B3F31348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161238,"url":"https://patchwork.plctlab.org/api/1.2/patches/161238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103110048.9D5211348C@imap2.suse-dmz.suse.de/","msgid":"<20231103110048.9D5211348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T11:00:48","name":"tree-optimization/112366 - remove assert for failed live lane code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103110048.9D5211348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161239,"url":"https://patchwork.plctlab.org/api/1.2/patches/161239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvvt7yt.fsf@euler.schwinge.homeip.net/","msgid":"<87msvvt7yt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:03:06","name":"Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvvt7yt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161241,"url":"https://patchwork.plctlab.org/api/1.2/patches/161241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqzt7qb.fsf@euler.schwinge.homeip.net/","msgid":"<87jzqzt7qb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:08:12","name":"Skip a number of '\''g++.dg/compat/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqzt7qb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161242,"url":"https://patchwork.plctlab.org/api/1.2/patches/161242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6m3t7mk.fsf@euler.schwinge.homeip.net/","msgid":"<87h6m3t7mk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:10:27","name":"Skip a number of '\''g++.dg/lto/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) te","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6m3t7mk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161243,"url":"https://patchwork.plctlab.org/api/1.2/patches/161243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edh7t7ir.fsf@euler.schwinge.homeip.net/","msgid":"<87edh7t7ir.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:12:44","name":"Skip a number of '\''g++.dg/tree-prof/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edh7t7ir.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161272,"url":"https://patchwork.plctlab.org/api/1.2/patches/161272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7fatws.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T12:44:03","name":"[pushed] aarch64: Remove unnecessary can_create_pseudo_p condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7fatws.fsf@arm.com/mbox/"},{"id":161274,"url":"https://patchwork.plctlab.org/api/1.2/patches/161274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103125401.3238220-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231103125401.3238220-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-03T12:54:01","name":"[v2] Format gotools.sum closer to what DejaGnu does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103125401.3238220-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":161273,"url":"https://patchwork.plctlab.org/api/1.2/patches/161273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-03T12:54:33","name":"Fortran: Fix generate_error library function fnspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":161319,"url":"https://patchwork.plctlab.org/api/1.2/patches/161319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103141615.6FD4913907@imap2.suse-dmz.suse.de/","msgid":"<20231103141615.6FD4913907@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T14:16:15","name":"Cleanup vectorizable_live_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103141615.6FD4913907@imap2.suse-dmz.suse.de/mbox/"},{"id":161330,"url":"https://patchwork.plctlab.org/api/1.2/patches/161330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103145431.910551348C@imap2.suse-dmz.suse.de/","msgid":"<20231103145431.910551348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T14:54:31","name":"Testcases for vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103145431.910551348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161331,"url":"https://patchwork.plctlab.org/api/1.2/patches/161331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gavqdx.fsf@euler.schwinge.homeip.net/","msgid":"<87o7gavqdx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T14:54:34","name":"GCN: Address undeclared '\''NULL'\'' usage in '\''libgcc/config/gcn/gthr-gcn.h:__gthread_getspecific'\'' (was: [PATCH 1/3] Create GCN-specific gthreads)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gavqdx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161337,"url":"https://patchwork.plctlab.org/api/1.2/patches/161337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:08","name":"[v2,1/7] aarch64: Use br instead of ret for eh_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161341,"url":"https://patchwork.plctlab.org/api/1.2/patches/161341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae13c81e51afd2f628af10485d286b3dc7ab8daa.1699025214.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:36:14","name":"[v2,2/7] aarch64: Do not force a stack frame for EH returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae13c81e51afd2f628af10485d286b3dc7ab8daa.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161339,"url":"https://patchwork.plctlab.org/api/1.2/patches/161339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:20","name":"[v2,3/7] aarch64: Add eh_return compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161342,"url":"https://patchwork.plctlab.org/api/1.2/patches/161342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:26","name":"[v2,4/7] aarch64: Disable branch-protection for pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161338,"url":"https://patchwork.plctlab.org/api/1.2/patches/161338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:32","name":"[v2,5/7] aarch64,arm: Remove accepted_branch_protection_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161340,"url":"https://patchwork.plctlab.org/api/1.2/patches/161340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb77dcc324aba915b045d65857d1f093e7d6815d.1699025215.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:36:38","name":"[v2,6/7] aarch64,arm: Fix branch-protection= parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb77dcc324aba915b045d65857d1f093e7d6815d.1699025215.git.szabolcs.nagy@arm.com/mbox/"},{"id":161343,"url":"https://patchwork.plctlab.org/api/1.2/patches/161343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com/","msgid":"<69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:44","name":"[v2,7/7] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com/mbox/"},{"id":161344,"url":"https://patchwork.plctlab.org/api/1.2/patches/161344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+=T6VRyKwhOaPv3mBVJyv9b9d5UKb-n-GroRCUuzRJQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:39:42","name":"[COMMITTED] : i386: Handle multiple address register classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+=T6VRyKwhOaPv3mBVJyv9b9d5UKb-n-GroRCUuzRJQ@mail.gmail.com/mbox/"},{"id":161373,"url":"https://patchwork.plctlab.org/api/1.2/patches/161373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/14b069dc-711f-4643-97a0-b64142017f24@redhat.com/","msgid":"<14b069dc-711f-4643-97a0-b64142017f24@redhat.com>","list_archive_url":null,"date":"2023-11-03T17:14:19","name":"[COMMITTED,1/2] Remove simple ranges from trailing zero bitmasks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/14b069dc-711f-4643-97a0-b64142017f24@redhat.com/mbox/"},{"id":161374,"url":"https://patchwork.plctlab.org/api/1.2/patches/161374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9134381d-fb7e-4422-9435-d2709d109a36@redhat.com/","msgid":"<9134381d-fb7e-4422-9435-d2709d109a36@redhat.com>","list_archive_url":null,"date":"2023-11-03T17:14:32","name":"[COMMITTED,2/2] PR tree-optimization/111766 - Adjust operators equal and not_equal to check bitmasks against constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9134381d-fb7e-4422-9435-d2709d109a36@redhat.com/mbox/"},{"id":161389,"url":"https://patchwork.plctlab.org/api/1.2/patches/161389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103180241.2338051-1-dmalcolm@redhat.com/","msgid":"<20231103180241.2338051-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-03T18:02:41","name":"[pushed] diagnostics: consolidate group-handling fields in diagnostic_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103180241.2338051-1-dmalcolm@redhat.com/mbox/"},{"id":161414,"url":"https://patchwork.plctlab.org/api/1.2/patches/161414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUVGA1bODUejH+jE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-03T19:12:03","name":"attribs: Fix ICE with -Wno-attributes= [PR112339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUVGA1bODUejH+jE@tucnak/mbox/"},{"id":161421,"url":"https://patchwork.plctlab.org/api/1.2/patches/161421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com/","msgid":"<00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-03T19:43:08","name":"[ARC] Provide a TARGET_FOLD_BUILTIN target hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com/mbox/"},{"id":161454,"url":"https://patchwork.plctlab.org/api/1.2/patches/161454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUV5ZDgmrPJlLSdd@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T22:51:16","name":"[v4] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUV5ZDgmrPJlLSdd@redhat.com/mbox/"},{"id":161509,"url":"https://patchwork.plctlab.org/api/1.2/patches/161509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104014106.2914085-1-pan2.li@intel.com/","msgid":"<20231104014106.2914085-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-04T01:41:06","name":"[v1] RISC-V: Remove HF modes of FP to INT rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104014106.2914085-1-pan2.li@intel.com/mbox/"},{"id":161510,"url":"https://patchwork.plctlab.org/api/1.2/patches/161510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015331.2388202-1-dmalcolm@redhat.com/","msgid":"<20231104015331.2388202-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-04T01:53:31","name":"[pushed] diagnostics: convert diagnostic_context to a class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015331.2388202-1-dmalcolm@redhat.com/mbox/"},{"id":161511,"url":"https://patchwork.plctlab.org/api/1.2/patches/161511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015955.2389603-1-dmalcolm@redhat.com/","msgid":"<20231104015955.2389603-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-04T01:59:55","name":"[pushed] diagnostics: add automatic URL-ification within messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015955.2389603-1-dmalcolm@redhat.com/mbox/"},{"id":161540,"url":"https://patchwork.plctlab.org/api/1.2/patches/161540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX9vqowoNJhBq3L@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-04T08:15:58","name":"[committed] openmp: Add support for omp::directive and omp::sequence attributes in C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX9vqowoNJhBq3L@tucnak/mbox/"},{"id":161541,"url":"https://patchwork.plctlab.org/api/1.2/patches/161541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX99pqtT+0bL/8t@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-04T08:16:54","name":"[committed] openmp: Add omp::decl support for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX99pqtT+0bL/8t@tucnak/mbox/"},{"id":161557,"url":"https://patchwork.plctlab.org/api/1.2/patches/161557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104083347.3015361-1-jwakely@redhat.com/","msgid":"<20231104083347.3015361-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-04T08:33:03","name":"[committed] libstdc++: Replace \"_N\" in examples of naming conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104083347.3015361-1-jwakely@redhat.com/mbox/"},{"id":161558,"url":"https://patchwork.plctlab.org/api/1.2/patches/161558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104084442.3016638-1-jwakely@redhat.com/","msgid":"<20231104084442.3016638-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-04T08:44:11","name":"[committed] libstdc++: Use strerror_r in std::generic_category()::message(int) [PR110133]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104084442.3016638-1-jwakely@redhat.com/mbox/"},{"id":161595,"url":"https://patchwork.plctlab.org/api/1.2/patches/161595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104162318.4142088-1-slyich@gmail.com/","msgid":"<20231104162318.4142088-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-11-04T16:23:18","name":"diagnostics: fix gcc-urlifier.cc bootstrap failure [PR112379]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104162318.4142088-1-slyich@gmail.com/mbox/"},{"id":161615,"url":"https://patchwork.plctlab.org/api/1.2/patches/161615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105023744.2158302-1-juzhe.zhong@rivai.ai/","msgid":"<20231105023744.2158302-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-05T02:37:44","name":"[Committed] RISC-V: Fix bug of vlds attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105023744.2158302-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161624,"url":"https://patchwork.plctlab.org/api/1.2/patches/161624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105093011.2038618-1-pan2.li@intel.com/","msgid":"<20231105093011.2038618-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-05T09:30:11","name":"[v1] RISC-V: Support FP rint to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105093011.2038618-1-pan2.li@intel.com/mbox/"},{"id":161647,"url":"https://patchwork.plctlab.org/api/1.2/patches/161647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZG2WDVCdLtacVkulha-uk_Zc_jGWnffHmnXdaLViuAxMIESijh7Y6-Y-dxnq6e7njeAU47WSBVbTYkBKvY-U8G3xemu8dCalJ9bdv4eqo5E=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:06:09","name":"[v4,1/2] c++: Initial support for P0847R7 (Deducing this) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZG2WDVCdLtacVkulha-uk_Zc_jGWnffHmnXdaLViuAxMIESijh7Y6-Y-dxnq6e7njeAU47WSBVbTYkBKvY-U8G3xemu8dCalJ9bdv4eqo5E=@protonmail.com/mbox/"},{"id":161648,"url":"https://patchwork.plctlab.org/api/1.2/patches/161648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/RqBEJfZ4EpHLvN6GOqUoQV6JJ5d2ahvs7gLHynIQOKulN-kWOn0MN9lUwk82_hKCpdsZKyK8FS2KYmdTY2K7WQsqsXzy5p7IdFtX7sE5O-0=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:06:36","name":"[v4,2/2] c++: Diagnostics for P0847R7 (Deducing this) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/RqBEJfZ4EpHLvN6GOqUoQV6JJ5d2ahvs7gLHynIQOKulN-kWOn0MN9lUwk82_hKCpdsZKyK8FS2KYmdTY2K7WQsqsXzy5p7IdFtX7sE5O-0=@protonmail.com/mbox/"},{"id":161649,"url":"https://patchwork.plctlab.org/api/1.2/patches/161649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPhjCZKFuOB+84b-b_0a_uMq=bsT3HUks6Q7eCaJpDrrDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:38:25","name":"Remove unnecessary \"& 1\" in year_month_day_last::day()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPhjCZKFuOB+84b-b_0a_uMq=bsT3HUks6Q7eCaJpDrrDQ@mail.gmail.com/mbox/"},{"id":161739,"url":"https://patchwork.plctlab.org/api/1.2/patches/161739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfS8IgWPHbXxQpU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:37:52","name":"[committed] openmp: Adjust handling of __has_attribute (omp::directive)/sequence and add omp::decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfS8IgWPHbXxQpU@tucnak/mbox/"},{"id":161740,"url":"https://patchwork.plctlab.org/api/1.2/patches/161740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfTGznWFGz3Db61@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:38:35","name":"[committed] openmp: Mention C attribute syntax in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfTGznWFGz3Db61@tucnak/mbox/"},{"id":161741,"url":"https://patchwork.plctlab.org/api/1.2/patches/161741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfUB5r2Y7J3GPbv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:42:31","name":"c++: Fix error recovery ICE [PR112365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfUB5r2Y7J3GPbv@tucnak/mbox/"},{"id":161748,"url":"https://patchwork.plctlab.org/api/1.2/patches/161748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPjargvCuk4KNC+7Hs719JFmWeW9Fwx43nG9NH0AYWhBWw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:01:43","name":"Simplify year::is_leap().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPjargvCuk4KNC+7Hs719JFmWeW9Fwx43nG9NH0AYWhBWw@mail.gmail.com/mbox/"},{"id":161750,"url":"https://patchwork.plctlab.org/api/1.2/patches/161750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l49hu0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:27:03","name":"[pushed] read-rtl: Fix infinite loop while parsing [...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l49hu0.fsf@arm.com/mbox/"},{"id":161751,"url":"https://patchwork.plctlab.org/api/1.2/patches/161751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlebc9hnb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:31:04","name":"[pushed] mode-switching: Remove unused bbnum field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlebc9hnb.fsf@arm.com/mbox/"},{"id":161752,"url":"https://patchwork.plctlab.org/api/1.2/patches/161752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k9hla.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:32:17","name":"explow: Allow dynamic allocations after vregs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k9hla.fsf@arm.com/mbox/"},{"id":161753,"url":"https://patchwork.plctlab.org/api/1.2/patches/161753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs9hjr.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:33:12","name":"explow: Avoid unnecessary alignment operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs9hjr.fsf@arm.com/mbox/"},{"id":161756,"url":"https://patchwork.plctlab.org/api/1.2/patches/161756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuw82dh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:46:18","name":"[01/12] mode-switching: Tweak the macro/hook documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuw82dh.fsf@arm.com/mbox/"},{"id":161757,"url":"https://patchwork.plctlab.org/api/1.2/patches/161757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l482cv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:46:40","name":"[02/12] mode-switching: Add note problem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l482cv.fsf@arm.com/mbox/"},{"id":161758,"url":"https://patchwork.plctlab.org/api/1.2/patches/161758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k82bn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:47:24","name":"[04/12] mode-switching: Fix the mode passed to the emit hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k82bn.fsf@arm.com/mbox/"},{"id":161759,"url":"https://patchwork.plctlab.org/api/1.2/patches/161759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs82b3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:47:44","name":"[05/12] mode-switching: Simplify recording of transparency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs82b3.fsf@arm.com/mbox/"},{"id":161760,"url":"https://patchwork.plctlab.org/api/1.2/patches/161760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4ji082ag.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:07","name":"[06/12] mode-switching: Tweak entry/exit handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4ji082ag.fsf@arm.com/mbox/"},{"id":161761,"url":"https://patchwork.plctlab.org/api/1.2/patches/161761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1fc6npe.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:29","name":"[07/12] mode-switching: Allow targets to set the mode for EH handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1fc6npe.fsf@arm.com/mbox/"},{"id":161762,"url":"https://patchwork.plctlab.org/api/1.2/patches/161762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf5k6nos.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:51","name":"[08/12] mode-switching: Pass set of live registers to the needed hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf5k6nos.fsf@arm.com/mbox/"},{"id":161763,"url":"https://patchwork.plctlab.org/api/1.2/patches/161763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvs6nnx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:49:22","name":"[09/12] mode-switching: Pass the set of live registers to the after hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvs6nnx.fsf@arm.com/mbox/"},{"id":161764,"url":"https://patchwork.plctlab.org/api/1.2/patches/161764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6m06nne.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:49:41","name":"[10/12] mode-switching: Use 1-based edge aux fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6m06nne.fsf@arm.com/mbox/"},{"id":161765,"url":"https://patchwork.plctlab.org/api/1.2/patches/161765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkc86nmt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:50:02","name":"[11/12] mode-switching: Add a target-configurable confluence operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkc86nmt.fsf@arm.com/mbox/"},{"id":161766,"url":"https://patchwork.plctlab.org/api/1.2/patches/161766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y2g6nm9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:50:22","name":"[12/12] mode-switching: Add a backprop hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y2g6nm9.fsf@arm.com/mbox/"},{"id":161772,"url":"https://patchwork.plctlab.org/api/1.2/patches/161772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aMEf2bBVU2-Fvy66v9kAESOKrJSe_SWNwc-tB3UABuXw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T20:02:18","name":"[committed] i386: Add LEGACY_INDEX_REG register class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aMEf2bBVU2-Fvy66v9kAESOKrJSe_SWNwc-tB3UABuXw@mail.gmail.com/mbox/"},{"id":161806,"url":"https://patchwork.plctlab.org/api/1.2/patches/161806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com/","msgid":"<92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T02:36:03","name":"[PATCH-2,rs6000] Enable vector mode for by pieces equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com/mbox/"},{"id":161807,"url":"https://patchwork.plctlab.org/api/1.2/patches/161807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com/","msgid":"<35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T02:38:57","name":"[PATCH-3,rs6000] Enable 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com/mbox/"},{"id":161820,"url":"https://patchwork.plctlab.org/api/1.2/patches/161820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106033426.45920-1-juzhe.zhong@rivai.ai/","msgid":"<20231106033426.45920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T03:34:26","name":"RISC-V: Enhance AVL propagation for complicate reduction auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106033426.45920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161833,"url":"https://patchwork.plctlab.org/api/1.2/patches/161833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065205.290215-1-juzhe.zhong@rivai.ai/","msgid":"<20231106065205.290215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T06:52:04","name":"[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065205.290215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161834,"url":"https://patchwork.plctlab.org/api/1.2/patches/161834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065508.305413-1-juzhe.zhong@rivai.ai/","msgid":"<20231106065508.305413-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T06:55:08","name":"[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065508.305413-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161840,"url":"https://patchwork.plctlab.org/api/1.2/patches/161840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106072004.3002543-1-guojiufu@linux.ibm.com/","msgid":"<20231106072004.3002543-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T07:20:04","name":"rs6000, testcase: Add require-effective-target has_arch_ppc64 to pr106550_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106072004.3002543-1-guojiufu@linux.ibm.com/mbox/"},{"id":161845,"url":"https://patchwork.plctlab.org/api/1.2/patches/161845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXqW9l8x4XH8wZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:13","name":"[1/21] middle-end testsuite: Add more pragma novector to new tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXqW9l8x4XH8wZ@arm.com/mbox/"},{"id":161849,"url":"https://patchwork.plctlab.org/api/1.2/patches/161849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXvMPNnRWVys7f@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:32","name":"[2/21] middle-end testsuite: Add tests for early break vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXvMPNnRWVys7f@arm.com/mbox/"},{"id":161848,"url":"https://patchwork.plctlab.org/api/1.2/patches/161848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiX060rI5bvYKzL@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:55","name":"[3/21] middle-end: Implement code motion and dependency analysis for early breaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiX060rI5bvYKzL@arm.com/mbox/"},{"id":161850,"url":"https://patchwork.plctlab.org/api/1.2/patches/161850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYCIg0KPALrH50@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:38:48","name":"[6/21] middle-end: support multiple exits in loop versioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYCIg0KPALrH50@arm.com/mbox/"},{"id":161851,"url":"https://patchwork.plctlab.org/api/1.2/patches/161851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYG7mRzlNStIYa@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:07","name":"[7/21] middle-end: update IV update code to support early breaks and arbitrary exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYG7mRzlNStIYa@arm.com/mbox/"},{"id":161852,"url":"https://patchwork.plctlab.org/api/1.2/patches/161852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYLW1r3kBr9Vvh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:25","name":"[8/21] middle-end: update vectorizable_live_reduction with support for multiple exits and different exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYLW1r3kBr9Vvh@arm.com/mbox/"},{"id":161853,"url":"https://patchwork.plctlab.org/api/1.2/patches/161853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYTRUsWotTs677@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:57","name":"[10/21] middle-end: implement relevancy analysis support for control flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYTRUsWotTs677@arm.com/mbox/"},{"id":161904,"url":"https://patchwork.plctlab.org/api/1.2/patches/161904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYcOPCGYeyht2/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:40:32","name":"[12/21] middle-end: Add remaining changes to peeling and vectorizer to support early breaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYcOPCGYeyht2/@arm.com/mbox/"},{"id":161905,"url":"https://patchwork.plctlab.org/api/1.2/patches/161905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYgMOPSBbV8F+/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:40:48","name":"[13/21] middle-end: Update loop form analysis to support early break","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYgMOPSBbV8F+/@arm.com/mbox/"},{"id":161897,"url":"https://patchwork.plctlab.org/api/1.2/patches/161897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYlM8SDtLV3SaA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:08","name":"[14/21] middle-end: Change loop analysis from looking at at number of BB to actual cfg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYlM8SDtLV3SaA@arm.com/mbox/"},{"id":161854,"url":"https://patchwork.plctlab.org/api/1.2/patches/161854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYpncaG9ka5vKl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:26","name":"[15/21] middle-end: [RFC] conditionally support forcing final edge for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYpncaG9ka5vKl@arm.com/mbox/"},{"id":161894,"url":"https://patchwork.plctlab.org/api/1.2/patches/161894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYubLqDwbtatgQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:45","name":"[16/21] middle-end testsuite: un-xfail TSVC loops that check for exit control flow vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYubLqDwbtatgQ@arm.com/mbox/"},{"id":161910,"url":"https://patchwork.plctlab.org/api/1.2/patches/161910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYxpi9sMkZCiZ5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:58","name":"[17/21] AArch64: Add implementation for vector cbranch for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYxpi9sMkZCiZ5@arm.com/mbox/"},{"id":161895,"url":"https://patchwork.plctlab.org/api/1.2/patches/161895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY17ZhkfUlc4tp@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:15","name":"[18/21] AArch64: Add optimization for vector != cbranch fed into compare with 0 for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY17ZhkfUlc4tp@arm.com/mbox/"},{"id":161909,"url":"https://patchwork.plctlab.org/api/1.2/patches/161909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY5kCaDxBhT5V/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:30","name":"[19/21] AArch64: Add optimization for vector cbranch combining SVE and Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY5kCaDxBhT5V/@arm.com/mbox/"},{"id":161911,"url":"https://patchwork.plctlab.org/api/1.2/patches/161911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY9RNjyt2BLJ/t@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:45","name":"[20/21] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY9RNjyt2BLJ/t@arm.com/mbox/"},{"id":161855,"url":"https://patchwork.plctlab.org/api/1.2/patches/161855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiZBGiekebMPwxn@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:43:00","name":"[21/21] Arm: Add MVE cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiZBGiekebMPwxn@arm.com/mbox/"},{"id":161856,"url":"https://patchwork.plctlab.org/api/1.2/patches/161856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075511.1165228-1-xry111@xry111.site/","msgid":"<20231106075511.1165228-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T07:50:25","name":"LoongArch: Disable relaxation if the assembler don'\''t support conditional branch relaxation [PR112330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075511.1165228-1-xry111@xry111.site/mbox/"},{"id":161858,"url":"https://patchwork.plctlab.org/api/1.2/patches/161858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075720.1166450-1-xry111@xry111.site/","msgid":"<20231106075720.1166450-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T07:57:02","name":"LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075720.1166450-1-xry111@xry111.site/mbox/"},{"id":161879,"url":"https://patchwork.plctlab.org/api/1.2/patches/161879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106083302.2361300-1-pan2.li@intel.com/","msgid":"<20231106083302.2361300-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-06T08:33:02","name":"[v1] RISC-V: Adjust FP rint round tests for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106083302.2361300-1-pan2.li@intel.com/mbox/"},{"id":161898,"url":"https://patchwork.plctlab.org/api/1.2/patches/161898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106085622.5B5C93858439@sourceware.org/","msgid":"<20231106085622.5B5C93858439@sourceware.org>","list_archive_url":null,"date":"2023-11-06T08:55:58","name":"tree-optimization/112369 - strip_float_extensions and vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106085622.5B5C93858439@sourceware.org/mbox/"},{"id":161912,"url":"https://patchwork.plctlab.org/api/1.2/patches/161912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com/","msgid":"<201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T09:47:53","name":"[PATCH-3v2,rs6000] Enable 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com/mbox/"},{"id":161922,"url":"https://patchwork.plctlab.org/api/1.2/patches/161922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17982-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T10:20:01","name":"[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17982-tamar@arm.com/mbox/"},{"id":161923,"url":"https://patchwork.plctlab.org/api/1.2/patches/161923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUi94WJQcd9fq5vi@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T10:20:17","name":"[v3,2/2] middle-end match.pd: optimize fneg (fabs (x)) to copysign (x, -1) [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUi94WJQcd9fq5vi@arm.com/mbox/"},{"id":161932,"url":"https://patchwork.plctlab.org/api/1.2/patches/161932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106103103.3374589-1-hongtao.liu@intel.com/","msgid":"<20231106103103.3374589-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-06T10:31:03","name":"Avoid generating RTL code when d->testing_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106103103.3374589-1-hongtao.liu@intel.com/mbox/"},{"id":161940,"url":"https://patchwork.plctlab.org/api/1.2/patches/161940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com/","msgid":"<3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com>","list_archive_url":null,"date":"2023-11-06T10:53:21","name":"[committed] libgfortran: Fix calloc call by swapping arg order [PR112364]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com/mbox/"},{"id":161941,"url":"https://patchwork.plctlab.org/api/1.2/patches/161941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106105831.3861671-1-poulhies@adacore.com/","msgid":"<20231106105831.3861671-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T10:57:16","name":"testsuite: skip gcc.target/i386/pr106910-1.c test when using newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106105831.3861671-1-poulhies@adacore.com/mbox/"},{"id":161942,"url":"https://patchwork.plctlab.org/api/1.2/patches/161942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110013.3862412-1-poulhies@adacore.com/","msgid":"<20231106110013.3862412-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T10:59:18","name":"testsuite: require avx_runtime for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110013.3862412-1-poulhies@adacore.com/mbox/"},{"id":161945,"url":"https://patchwork.plctlab.org/api/1.2/patches/161945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110153.3863209-1-poulhies@adacore.com/","msgid":"<20231106110153.3863209-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T11:01:17","name":"testsuite: refine gcc.dg/analyzer/fd-4.c test for newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110153.3863209-1-poulhies@adacore.com/mbox/"},{"id":161949,"url":"https://patchwork.plctlab.org/api/1.2/patches/161949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com/","msgid":"<701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com>","list_archive_url":null,"date":"2023-11-06T11:20:00","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com/mbox/"},{"id":161950,"url":"https://patchwork.plctlab.org/api/1.2/patches/161950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com/","msgid":"<21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com>","list_archive_url":null,"date":"2023-11-06T11:20:06","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com/mbox/"},{"id":161952,"url":"https://patchwork.plctlab.org/api/1.2/patches/161952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106113809.1193236-1-xry111@xry111.site/","msgid":"<20231106113809.1193236-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T11:36:04","name":"LoongArch: Remove redundant barrier instructions before LL-SC loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106113809.1193236-1-xry111@xry111.site/mbox/"},{"id":161954,"url":"https://patchwork.plctlab.org/api/1.2/patches/161954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-2-mikael@gcc.gnu.org/","msgid":"<20231106114325.828968-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-06T11:43:24","name":"[1/2] libgfortran: Remove early return if extent is zero [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-2-mikael@gcc.gnu.org/mbox/"},{"id":161953,"url":"https://patchwork.plctlab.org/api/1.2/patches/161953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-3-mikael@gcc.gnu.org/","msgid":"<20231106114325.828968-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-06T11:43:25","name":"[2/2] libgfortran: Remove empty array descriptor first dimension overwrite [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-3-mikael@gcc.gnu.org/mbox/"},{"id":161956,"url":"https://patchwork.plctlab.org/api/1.2/patches/161956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106115232.8F584385842C@sourceware.org/","msgid":"<20231106115232.8F584385842C@sourceware.org>","list_archive_url":null,"date":"2023-11-06T11:52:08","name":"libstdc++/112351 - deal with __gthread_once failure during locale init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106115232.8F584385842C@sourceware.org/mbox/"},{"id":161993,"url":"https://patchwork.plctlab.org/api/1.2/patches/161993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7bcbp5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:23:34","name":"[1/3] attribs: Cache the gnu namespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7bcbp5.fsf@arm.com/mbox/"},{"id":161994,"url":"https://patchwork.plctlab.org/api/1.2/patches/161994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuvax2x.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:24:38","name":"[3/3] attribs: Namespace-aware lookup_attribute_spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuvax2x.fsf@arm.com/mbox/"},{"id":161995,"url":"https://patchwork.plctlab.org/api/1.2/patches/161995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106122643.3639195-1-juzhe.zhong@rivai.ai/","msgid":"<20231106122643.3639195-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T12:26:43","name":"RISC-V: Early expand DImode vec_duplicate in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106122643.3639195-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161996,"url":"https://patchwork.plctlab.org/api/1.2/patches/161996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvrawsm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:30:49","name":"Ping: [PATCH] Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvrawsm.fsf@arm.com/mbox/"},{"id":162007,"url":"https://patchwork.plctlab.org/api/1.2/patches/162007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130145.3265828-1-maxim.a.blinov@gmail.com/","msgid":"<20231106130145.3265828-1-maxim.a.blinov@gmail.com>","list_archive_url":null,"date":"2023-11-06T13:01:45","name":"RISC-V: VECT: Remember to assert any_known_not_updated_vssa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130145.3265828-1-maxim.a.blinov@gmail.com/mbox/"},{"id":162009,"url":"https://patchwork.plctlab.org/api/1.2/patches/162009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130916.CCDC43875DF2@sourceware.org/","msgid":"<20231106130916.CCDC43875DF2@sourceware.org>","list_archive_url":null,"date":"2023-11-06T13:08:53","name":"tree-optimization/112404 - two issues with SLP of .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130916.CCDC43875DF2@sourceware.org/mbox/"},{"id":162013,"url":"https://patchwork.plctlab.org/api/1.2/patches/162013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106131540.54A2C3836E85@sourceware.org/","msgid":"<20231106131540.54A2C3836E85@sourceware.org>","list_archive_url":null,"date":"2023-11-06T13:14:23","name":"tree-optimization/111950 - vectorizer loop copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106131540.54A2C3836E85@sourceware.org/mbox/"},{"id":162025,"url":"https://patchwork.plctlab.org/api/1.2/patches/162025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhzgemo.fsf@oldenburg.str.redhat.com/","msgid":"<874jhzgemo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T14:06:39","name":"[v2] c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhzgemo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162027,"url":"https://patchwork.plctlab.org/api/1.2/patches/162027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141248.1378051-1-juzhe.zhong@rivai.ai/","msgid":"<20231106141248.1378051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T14:12:48","name":"[V2] RISC-V: Early expand DImode vec_duplicate in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141248.1378051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162028,"url":"https://patchwork.plctlab.org/api/1.2/patches/162028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141623.3076456-1-pan2.li@intel.com/","msgid":"<20231106141623.3076456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-06T14:16:23","name":"[v1] RISC-V: Support FP round to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141623.3076456-1-pan2.li@intel.com/mbox/"},{"id":162038,"url":"https://patchwork.plctlab.org/api/1.2/patches/162038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106143107.F09F23861824@sourceware.org/","msgid":"<20231106143107.F09F23861824@sourceware.org>","list_archive_url":null,"date":"2023-11-06T14:30:41","name":"tree-optimization/112405 - SIMD clone calls with (loop) mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106143107.F09F23861824@sourceware.org/mbox/"},{"id":162043,"url":"https://patchwork.plctlab.org/api/1.2/patches/162043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqvudxr.fsf@euler.schwinge.homeip.net/","msgid":"<87jzqvudxr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-06T14:57:52","name":"nvptx: Use the usual '\''#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)'\'' (was: libstdc++ \"freestanding\" ('\''--disable-hosted-libstdcxx'\'') with '\''-fno-rtti'\'', '\''-fno-exceptions'\'': '\''libstdc++-v3/libsupc++/tinfo.cc'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqvudxr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":162044,"url":"https://patchwork.plctlab.org/api/1.2/patches/162044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f232d697-dff3-8aed-2e27-516903bcfe8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T15:03:25","name":"[committed] c: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR107954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f232d697-dff3-8aed-2e27-516903bcfe8@codesourcery.com/mbox/"},{"id":162049,"url":"https://patchwork.plctlab.org/api/1.2/patches/162049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4agoL5PDAy+7_OOi32LBWgTyBk53bcFN7cS2D=LqAfXPQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T15:31:10","name":"[committed] i386: Use \"addr\" attribute to limit address regclass to non-REX regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4agoL5PDAy+7_OOi32LBWgTyBk53bcFN7cS2D=LqAfXPQ@mail.gmail.com/mbox/"},{"id":162068,"url":"https://patchwork.plctlab.org/api/1.2/patches/162068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com/","msgid":"<05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com>","list_archive_url":null,"date":"2023-11-06T16:05:02","name":"libgomp.texi: Update OpenMP 6.0-preview implementation-status list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com/mbox/"},{"id":162091,"url":"https://patchwork.plctlab.org/api/1.2/patches/162091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-06T17:03:05","name":"Fix configure script comments(!?!) (Was: Re: [PATCH] genemit: Split insn-emit.cc into ten files)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":162095,"url":"https://patchwork.plctlab.org/api/1.2/patches/162095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com/","msgid":"<01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-06T17:30:06","name":"[ARC] Improved DImode rotates and right shifts by one bit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com/mbox/"},{"id":162096,"url":"https://patchwork.plctlab.org/api/1.2/patches/162096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvqeqbc.fsf@oldenburg.str.redhat.com/","msgid":"<87msvqeqbc.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T17:37:11","name":"c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvqeqbc.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162097,"url":"https://patchwork.plctlab.org/api/1.2/patches/162097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il6eeq9v.fsf@oldenburg.str.redhat.com/","msgid":"<87il6eeq9v.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T17:38:04","name":"Avoid undeclared use of abort in gcc.dg/cpp/wchar-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il6eeq9v.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162108,"url":"https://patchwork.plctlab.org/api/1.2/patches/162108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb7ee1e7-ffae-4aeb-9bc3-d2483d1c8394@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T18:15:06","name":"[GCC13] PR tree-optimization/105834 - Choose better initial values for ranger.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb7ee1e7-ffae-4aeb-9bc3-d2483d1c8394@redhat.com/mbox/"},{"id":162122,"url":"https://patchwork.plctlab.org/api/1.2/patches/162122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com/","msgid":"<02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-06T18:37:15","name":"[ARC] Consistent use of whitespace in assembler templates.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com/mbox/"},{"id":162151,"url":"https://patchwork.plctlab.org/api/1.2/patches/162151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194442.1446416-1-christoph.muellner@vrull.eu/","msgid":"<20231106194442.1446416-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-06T19:44:42","name":"RISC-V: Add ABI requirement for XTheadFMemIdx tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194442.1446416-1-christoph.muellner@vrull.eu/mbox/"},{"id":162153,"url":"https://patchwork.plctlab.org/api/1.2/patches/162153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-1-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:32","name":"[pushed,1/4] diagnostics: eliminate diagnostic_kind_count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-1-dmalcolm@redhat.com/mbox/"},{"id":162152,"url":"https://patchwork.plctlab.org/api/1.2/patches/162152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-2-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:33","name":"[pushed,2/4] diagnostics: make diagnostic_context::m_urlifier private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-2-dmalcolm@redhat.com/mbox/"},{"id":162154,"url":"https://patchwork.plctlab.org/api/1.2/patches/162154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-3-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:34","name":"[pushed,3/4] diagnostics: introduce class diagnostic_option_classifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-3-dmalcolm@redhat.com/mbox/"},{"id":162155,"url":"https://patchwork.plctlab.org/api/1.2/patches/162155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-4-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:35","name":"[pushed,4/4] diagnostics: split out struct diagnostic_source_printing_options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-4-dmalcolm@redhat.com/mbox/"},{"id":162181,"url":"https://patchwork.plctlab.org/api/1.2/patches/162181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlUVdALm2uEQCcE@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-06T21:02:13","name":"[committed] hppa: Enable generation of GNU stack notes on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlUVdALm2uEQCcE@mx3210.localdomain/mbox/"},{"id":162185,"url":"https://patchwork.plctlab.org/api/1.2/patches/162185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlVN8QURPmBlipa@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-06T21:05:59","name":"[committed] hppa: Fix typo in PA 2.0 trampoline template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlVN8QURPmBlipa@mx3210.localdomain/mbox/"},{"id":162206,"url":"https://patchwork.plctlab.org/api/1.2/patches/162206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106222959.2707741-3-dmalcolm@redhat.com/","msgid":"<20231106222959.2707741-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T22:29:58","name":"[2/2] libdiagnostics: work-in-progress implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106222959.2707741-3-dmalcolm@redhat.com/mbox/"},{"id":162208,"url":"https://patchwork.plctlab.org/api/1.2/patches/162208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlp93ZwnARyoEia@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T22:34:31","name":"[v4] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlp93ZwnARyoEia@redhat.com/mbox/"},{"id":162207,"url":"https://patchwork.plctlab.org/api/1.2/patches/162207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223503.3271116-1-juzhe.zhong@rivai.ai/","msgid":"<20231106223503.3271116-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T22:35:03","name":"test: Fix XPASS of bb-slp-43.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223503.3271116-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162209,"url":"https://patchwork.plctlab.org/api/1.2/patches/162209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223531.3271166-1-juzhe.zhong@rivai.ai/","msgid":"<20231106223531.3271166-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T22:35:31","name":"test: Fix XPASS of bb-slp-43.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223531.3271166-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162223,"url":"https://patchwork.plctlab.org/api/1.2/patches/162223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106230343.3273494-1-juzhe.zhong@rivai.ai/","msgid":"<20231106230343.3273494-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T23:03:43","name":"test: Fix FAIL of bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106230343.3273494-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162238,"url":"https://patchwork.plctlab.org/api/1.2/patches/162238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7a8cc9f-bd7c-7d56-61d3-e5a95f2ee7af@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-07T00:20:43","name":"c: Refer more consistently to C23 not C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7a8cc9f-bd7c-7d56-61d3-e5a95f2ee7af@codesourcery.com/mbox/"},{"id":162243,"url":"https://patchwork.plctlab.org/api/1.2/patches/162243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107022734.368277-1-haochen.jiang@intel.com/","msgid":"<20231107022734.368277-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-07T02:27:34","name":"i386: Fix isa attribute for TI/TF andnot mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107022734.368277-1-haochen.jiang@intel.com/mbox/"},{"id":162244,"url":"https://patchwork.plctlab.org/api/1.2/patches/162244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107023212.3383839-1-juzhe.zhong@rivai.ai/","msgid":"<20231107023212.3383839-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T02:32:12","name":"RISC-V regression test: Fix FAIL of bb-slp-39.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107023212.3383839-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162251,"url":"https://patchwork.plctlab.org/api/1.2/patches/162251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107030415.1105-1-jinma@linux.alibaba.com/","msgid":"<20231107030415.1105-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-07T03:04:15","name":"riscv: thead: Add support for the XTheadInt ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107030415.1105-1-jinma@linux.alibaba.com/mbox/"},{"id":162255,"url":"https://patchwork.plctlab.org/api/1.2/patches/162255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107033644.3733354-1-juzhe.zhong@rivai.ai/","msgid":"<20231107033644.3733354-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T03:36:44","name":"test: Fix FAIL of SAD tests for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107033644.3733354-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162256,"url":"https://patchwork.plctlab.org/api/1.2/patches/162256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035014.3880317-1-juzhe.zhong@rivai.ai/","msgid":"<20231107035014.3880317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T03:50:14","name":"test: Fix FAIL of vect-sdiv-pow2-1.c for RVV test: Fix FAIL of vect-sdiv-pow2-1.c for RVV#","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035014.3880317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162259,"url":"https://patchwork.plctlab.org/api/1.2/patches/162259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035339.28242-1-chenxiaolong@loongson.cn/","msgid":"<20231107035339.28242-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-07T03:53:39","name":"[v1] LoongArch: Add instructions for the use of vector functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035339.28242-1-chenxiaolong@loongson.cn/mbox/"},{"id":162260,"url":"https://patchwork.plctlab.org/api/1.2/patches/162260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107040606.332-1-chenxiaolong@loongson.cn/","msgid":"<20231107040606.332-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-07T04:06:06","name":"[v1] LoongArch: Add modifiers for lsx and lasx.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107040606.332-1-chenxiaolong@loongson.cn/mbox/"},{"id":162276,"url":"https://patchwork.plctlab.org/api/1.2/patches/162276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107060539.443303-1-hongtao.liu@intel.com/","msgid":"<20231107060539.443303-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-07T06:05:39","name":"[V2] Handle bitop with INTEGER_CST in analyze_and_compute_bitop_with_inv_effect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107060539.443303-1-hongtao.liu@intel.com/mbox/"},{"id":162284,"url":"https://patchwork.plctlab.org/api/1.2/patches/162284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107064115.1848826-1-pan2.li@intel.com/","msgid":"<20231107064115.1848826-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-07T06:41:15","name":"[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107064115.1848826-1-pan2.li@intel.com/mbox/"},{"id":162294,"url":"https://patchwork.plctlab.org/api/1.2/patches/162294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107073321.479349-1-hongyu.wang@intel.com/","msgid":"<20231107073321.479349-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-07T07:33:21","name":"[i386] APX: Fix ICE due to movti postreload splitter [PR112394]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107073321.479349-1-hongyu.wang@intel.com/mbox/"},{"id":162295,"url":"https://patchwork.plctlab.org/api/1.2/patches/162295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074451.3990710-1-juzhe.zhong@rivai.ai/","msgid":"<20231107074451.3990710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T07:44:51","name":"test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074451.3990710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162296,"url":"https://patchwork.plctlab.org/api/1.2/patches/162296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074933.4025916-1-lehua.ding@rivai.ai/","msgid":"<20231107074933.4025916-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-07T07:49:33","name":"RISC-V: Fixed failed rvv combine testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074933.4025916-1-lehua.ding@rivai.ai/mbox/"},{"id":162301,"url":"https://patchwork.plctlab.org/api/1.2/patches/162301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107080627.4178732-1-juzhe.zhong@rivai.ai/","msgid":"<20231107080627.4178732-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T08:06:27","name":"RISC-V regression test: Fix FAIL bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107080627.4178732-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162317,"url":"https://patchwork.plctlab.org/api/1.2/patches/162317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107084725.178816-1-juzhe.zhong@rivai.ai/","msgid":"<20231107084725.178816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T08:47:25","name":"test: Fix bb-slp-33.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107084725.178816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162324,"url":"https://patchwork.plctlab.org/api/1.2/patches/162324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091854.3904987-1-poulhies@adacore.com/","msgid":"<20231107091854.3904987-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:18:54","name":"[COMMITTED] ada: Fix internal error on address of element of packed array component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091854.3904987-1-poulhies@adacore.com/mbox/"},{"id":162325,"url":"https://patchwork.plctlab.org/api/1.2/patches/162325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091907.3905160-1-poulhies@adacore.com/","msgid":"<20231107091907.3905160-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:06","name":"[COMMITTED] ada: Fix scope of semantic style_check pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091907.3905160-1-poulhies@adacore.com/mbox/"},{"id":162328,"url":"https://patchwork.plctlab.org/api/1.2/patches/162328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091912.3905235-1-poulhies@adacore.com/","msgid":"<20231107091912.3905235-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:12","name":"[COMMITTED] ada: Simplify code for Ignore_Style_Checks_Pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091912.3905235-1-poulhies@adacore.com/mbox/"},{"id":162329,"url":"https://patchwork.plctlab.org/api/1.2/patches/162329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091915.3905306-1-poulhies@adacore.com/","msgid":"<20231107091915.3905306-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:15","name":"[COMMITTED] ada: Fix handling of actual subtypes for expanded names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091915.3905306-1-poulhies@adacore.com/mbox/"},{"id":162326,"url":"https://patchwork.plctlab.org/api/1.2/patches/162326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091919.3905379-1-poulhies@adacore.com/","msgid":"<20231107091919.3905379-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:19","name":"[COMMITTED] ada: Cleanup getting of actual subtypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091919.3905379-1-poulhies@adacore.com/mbox/"},{"id":162327,"url":"https://patchwork.plctlab.org/api/1.2/patches/162327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091929.3905481-1-poulhies@adacore.com/","msgid":"<20231107091929.3905481-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:29","name":"[COMMITTED] ada: Fix style in declaration of routine for expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091929.3905481-1-poulhies@adacore.com/mbox/"},{"id":162331,"url":"https://patchwork.plctlab.org/api/1.2/patches/162331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091932.3905575-1-poulhies@adacore.com/","msgid":"<20231107091932.3905575-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:32","name":"[COMMITTED] ada: Change local variables to constants in expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091932.3905575-1-poulhies@adacore.com/mbox/"},{"id":162335,"url":"https://patchwork.plctlab.org/api/1.2/patches/162335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091937.3905649-1-poulhies@adacore.com/","msgid":"<20231107091937.3905649-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:37","name":"[COMMITTED] ada: Simplify handling of known values in expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091937.3905649-1-poulhies@adacore.com/mbox/"},{"id":162333,"url":"https://patchwork.plctlab.org/api/1.2/patches/162333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091942.3905723-1-poulhies@adacore.com/","msgid":"<20231107091942.3905723-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:42","name":"[COMMITTED] ada: Avoid extra conversion in expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091942.3905723-1-poulhies@adacore.com/mbox/"},{"id":162337,"url":"https://patchwork.plctlab.org/api/1.2/patches/162337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091945.3905796-1-poulhies@adacore.com/","msgid":"<20231107091945.3905796-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:45","name":"[COMMITTED] ada: Fix extra whitespace after END keywords","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091945.3905796-1-poulhies@adacore.com/mbox/"},{"id":162334,"url":"https://patchwork.plctlab.org/api/1.2/patches/162334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091951.3905875-1-poulhies@adacore.com/","msgid":"<20231107091951.3905875-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:51","name":"[COMMITTED] ada: Simplify expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091951.3905875-1-poulhies@adacore.com/mbox/"},{"id":162340,"url":"https://patchwork.plctlab.org/api/1.2/patches/162340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091954.3905945-1-poulhies@adacore.com/","msgid":"<20231107091954.3905945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:54","name":"[COMMITTED] ada: Remove duplicated code for expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091954.3905945-1-poulhies@adacore.com/mbox/"},{"id":162330,"url":"https://patchwork.plctlab.org/api/1.2/patches/162330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091958.3906017-1-poulhies@adacore.com/","msgid":"<20231107091958.3906017-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:58","name":"[COMMITTED] ada: Error in prefix-notation call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091958.3906017-1-poulhies@adacore.com/mbox/"},{"id":162347,"url":"https://patchwork.plctlab.org/api/1.2/patches/162347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092005.3906089-1-poulhies@adacore.com/","msgid":"<20231107092005.3906089-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:01","name":"[COMMITTED] ada: New Local_Restrictions and User_Aspect aspects.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092005.3906089-1-poulhies@adacore.com/mbox/"},{"id":162339,"url":"https://patchwork.plctlab.org/api/1.2/patches/162339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092009.3906170-1-poulhies@adacore.com/","msgid":"<20231107092009.3906170-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:09","name":"[COMMITTED] ada: Fix documentation of -gnatwc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092009.3906170-1-poulhies@adacore.com/mbox/"},{"id":162343,"url":"https://patchwork.plctlab.org/api/1.2/patches/162343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092012.3906244-1-poulhies@adacore.com/","msgid":"<20231107092012.3906244-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:12","name":"[COMMITTED] ada: Cleanup more \"not Present\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092012.3906244-1-poulhies@adacore.com/mbox/"},{"id":162341,"url":"https://patchwork.plctlab.org/api/1.2/patches/162341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092015.3906320-1-poulhies@adacore.com/","msgid":"<20231107092015.3906320-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:15","name":"[COMMITTED] ada: Cleanup \"not Present\" on List_Id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092015.3906320-1-poulhies@adacore.com/mbox/"},{"id":162348,"url":"https://patchwork.plctlab.org/api/1.2/patches/162348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092018.3906393-1-poulhies@adacore.com/","msgid":"<20231107092018.3906393-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:18","name":"[COMMITTED] ada: Minor tweaks for comparison operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092018.3906393-1-poulhies@adacore.com/mbox/"},{"id":162349,"url":"https://patchwork.plctlab.org/api/1.2/patches/162349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092022.3906466-1-poulhies@adacore.com/","msgid":"<20231107092022.3906466-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:21","name":"[COMMITTED] ada: Implement Aspects as fields under nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092022.3906466-1-poulhies@adacore.com/mbox/"},{"id":162350,"url":"https://patchwork.plctlab.org/api/1.2/patches/162350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092027.3906542-1-poulhies@adacore.com/","msgid":"<20231107092027.3906542-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:27","name":"[COMMITTED] ada: Rename Is_Limited_View to reflect actual query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092027.3906542-1-poulhies@adacore.com/mbox/"},{"id":162332,"url":"https://patchwork.plctlab.org/api/1.2/patches/162332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092031.3906616-1-poulhies@adacore.com/","msgid":"<20231107092031.3906616-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:31","name":"[COMMITTED] ada: Fix expansion of type aspects with handling of aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092031.3906616-1-poulhies@adacore.com/mbox/"},{"id":162345,"url":"https://patchwork.plctlab.org/api/1.2/patches/162345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092034.3906691-1-poulhies@adacore.com/","msgid":"<20231107092034.3906691-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:33","name":"[COMMITTED] ada: Elide temporary for aliased array with unconstrained nominal subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092034.3906691-1-poulhies@adacore.com/mbox/"},{"id":162346,"url":"https://patchwork.plctlab.org/api/1.2/patches/162346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092036.3906764-1-poulhies@adacore.com/","msgid":"<20231107092036.3906764-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:36","name":"[COMMITTED] ada: Fix Ada.Directories.Modification_Time on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092036.3906764-1-poulhies@adacore.com/mbox/"},{"id":162336,"url":"https://patchwork.plctlab.org/api/1.2/patches/162336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092039.3906837-1-poulhies@adacore.com/","msgid":"<20231107092039.3906837-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:39","name":"[COMMITTED] ada: Fix incorrect resolution of overloaded function call in instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092039.3906837-1-poulhies@adacore.com/mbox/"},{"id":162351,"url":"https://patchwork.plctlab.org/api/1.2/patches/162351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092042.3906911-1-poulhies@adacore.com/","msgid":"<20231107092042.3906911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:42","name":"[COMMITTED] ada: Update the logo in the gnat doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092042.3906911-1-poulhies@adacore.com/mbox/"},{"id":162342,"url":"https://patchwork.plctlab.org/api/1.2/patches/162342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092045.3906982-1-poulhies@adacore.com/","msgid":"<20231107092045.3906982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:45","name":"[COMMITTED] ada: Compiler crash on early alignment clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092045.3906982-1-poulhies@adacore.com/mbox/"},{"id":162352,"url":"https://patchwork.plctlab.org/api/1.2/patches/162352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092047.3907065-1-poulhies@adacore.com/","msgid":"<20231107092047.3907065-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:47","name":"[COMMITTED] ada: Fix spurious -Wstringop-overflow with link time optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092047.3907065-1-poulhies@adacore.com/mbox/"},{"id":162338,"url":"https://patchwork.plctlab.org/api/1.2/patches/162338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092050.3907141-1-poulhies@adacore.com/","msgid":"<20231107092050.3907141-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:50","name":"[COMMITTED] ada: Fix debug info for aliased packed array with unconstrained nominal subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092050.3907141-1-poulhies@adacore.com/mbox/"},{"id":162344,"url":"https://patchwork.plctlab.org/api/1.2/patches/162344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092317.732045-1-juzhe.zhong@rivai.ai/","msgid":"<20231107092317.732045-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T09:23:17","name":"test: Fix FAIL of pr65518.c for RVV[PR112420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092317.732045-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162354,"url":"https://patchwork.plctlab.org/api/1.2/patches/162354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107094519.1822582-1-christoph.muellner@vrull.eu/","msgid":"<20231107094519.1822582-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-07T09:45:19","name":"RISC-V: Use stdint-gcc.h in rvv testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107094519.1822582-1-christoph.muellner@vrull.eu/mbox/"},{"id":162370,"url":"https://patchwork.plctlab.org/api/1.2/patches/162370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-2-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:02","name":"[v2,1/3] libgfortran: Don'\''t skip allocation if size is zero [PR112412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-2-mikael@gcc.gnu.org/mbox/"},{"id":162437,"url":"https://patchwork.plctlab.org/api/1.2/patches/162437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-3-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:03","name":"[v2,2/3] libgfortran: Remove early return if extent is zero [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-3-mikael@gcc.gnu.org/mbox/"},{"id":162438,"url":"https://patchwork.plctlab.org/api/1.2/patches/162438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-4-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:04","name":"[v2,3/3] libgfortran: Remove empty array descriptor first dimension overwrite [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-4-mikael@gcc.gnu.org/mbox/"},{"id":162392,"url":"https://patchwork.plctlab.org/api/1.2/patches/162392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107103211.2837188-2-victor.donascimento@arm.com/","msgid":"<20231107103211.2837188-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-07T10:30:10","name":"[1/5] aarch64: Add march flags for +the and +d128 arch extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107103211.2837188-2-victor.donascimento@arm.com/mbox/"},{"id":162435,"url":"https://patchwork.plctlab.org/api/1.2/patches/162435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107114814.851059-1-juzhe.zhong@rivai.ai/","msgid":"<20231107114814.851059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T11:48:14","name":"RISC-V: Add RISC-V into vect_cmdline_needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107114814.851059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162442,"url":"https://patchwork.plctlab.org/api/1.2/patches/162442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107120927.1675589-1-juzhe.zhong@rivai.ai/","msgid":"<20231107120927.1675589-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T12:09:27","name":"[V2] test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107120927.1675589-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162517,"url":"https://patchwork.plctlab.org/api/1.2/patches/162517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107143054.3011942-1-pan2.li@intel.com/","msgid":"<20231107143054.3011942-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-07T14:30:54","name":"[v1] ISC-V: Support FP floor to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107143054.3011942-1-pan2.li@intel.com/mbox/"},{"id":162518,"url":"https://patchwork.plctlab.org/api/1.2/patches/162518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107144505.2879197-1-juzhe.zhong@rivai.ai/","msgid":"<20231107144505.2879197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T14:45:05","name":"test: Recover sdiv_pow2 check and remove test of RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107144505.2879197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162582,"url":"https://patchwork.plctlab.org/api/1.2/patches/162582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107150838.1031324-1-ppalka@redhat.com/","msgid":"<20231107150838.1031324-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T15:08:38","name":"c++: fix tf_decltype manipulation for COMPOUND_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107150838.1031324-1-ppalka@redhat.com/mbox/"},{"id":162575,"url":"https://patchwork.plctlab.org/api/1.2/patches/162575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151315.2881621-1-juzhe.zhong@rivai.ai/","msgid":"<20231107151315.2881621-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T15:13:15","name":"[V2] test: Fix bb-slp-33.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151315.2881621-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162621,"url":"https://patchwork.plctlab.org/api/1.2/patches/162621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151859.2882293-1-juzhe.zhong@rivai.ai/","msgid":"<20231107151859.2882293-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T15:18:59","name":"[V3] test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151859.2882293-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162639,"url":"https://patchwork.plctlab.org/api/1.2/patches/162639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ada8og.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-07T15:23:59","name":"[pushed] aarch64: Add a %Z operand modifier for SVE registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ada8og.fsf@arm.com/mbox/"},{"id":162642,"url":"https://patchwork.plctlab.org/api/1.2/patches/162642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com/","msgid":"<483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com>","list_archive_url":null,"date":"2023-11-07T15:30:27","name":"[committed] OpenMP: invoke.texi - mention C attribute syntax for -fopenmp(-simd)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com/mbox/"},{"id":162681,"url":"https://patchwork.plctlab.org/api/1.2/patches/162681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107172931.25778-1-manos.anagnostakis@vrull.eu/","msgid":"<20231107172931.25778-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-11-07T17:29:31","name":"aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107172931.25778-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":162687,"url":"https://patchwork.plctlab.org/api/1.2/patches/162687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-07T17:52:35","name":"gcc/configure: Regenerate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":162695,"url":"https://patchwork.plctlab.org/api/1.2/patches/162695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf5h9y7h.fsf@oldenburg.str.redhat.com/","msgid":"<87sf5h9y7h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-07T19:10:10","name":"[v3] c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf5h9y7h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162701,"url":"https://patchwork.plctlab.org/api/1.2/patches/162701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195237.1658753-1-ppalka@redhat.com/","msgid":"<20231107195237.1658753-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T19:52:37","name":"c++: decltype of capture proxy [PR79378, PR96917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195237.1658753-1-ppalka@redhat.com/mbox/"},{"id":162702,"url":"https://patchwork.plctlab.org/api/1.2/patches/162702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195244.1658781-1-ppalka@redhat.com/","msgid":"<20231107195244.1658781-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T19:52:44","name":"c++: decltype of (by-value captured reference) [PR79620]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195244.1658781-1-ppalka@redhat.com/mbox/"},{"id":162704,"url":"https://patchwork.plctlab.org/api/1.2/patches/162704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com/","msgid":"<958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com>","list_archive_url":null,"date":"2023-11-07T20:04:21","name":"[committed] c: Change T2X_* format checking macros to T23_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com/mbox/"},{"id":162834,"url":"https://patchwork.plctlab.org/api/1.2/patches/162834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com/","msgid":"<66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com>","list_archive_url":null,"date":"2023-11-08T00:22:07","name":"[committed] testsuite: Rename c2x-*, gnu2x-* tests to c23-*, gnu23-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com/mbox/"},{"id":162875,"url":"https://patchwork.plctlab.org/api/1.2/patches/162875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-2-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:34","name":"[1/7] ira: Refactor the handling of register conflicts to make it more general","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-2-lehua.ding@rivai.ai/mbox/"},{"id":162877,"url":"https://patchwork.plctlab.org/api/1.2/patches/162877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-4-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:36","name":"[3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-4-lehua.ding@rivai.ai/mbox/"},{"id":162878,"url":"https://patchwork.plctlab.org/api/1.2/patches/162878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-5-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:37","name":"[4/7] ira: Support subreg copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-5-lehua.ding@rivai.ai/mbox/"},{"id":162876,"url":"https://patchwork.plctlab.org/api/1.2/patches/162876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-6-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:38","name":"[5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-6-lehua.ding@rivai.ai/mbox/"},{"id":162889,"url":"https://patchwork.plctlab.org/api/1.2/patches/162889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108061035.3975866-1-juzhe.zhong@rivai.ai/","msgid":"<20231108061035.3975866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T06:10:35","name":"RISC-V: Normalize user vsetvl intrinsics[PR112092]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108061035.3975866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162899,"url":"https://patchwork.plctlab.org/api/1.2/patches/162899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUsw14bVvAyCni7X@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-08T06:55:19","name":"libgcc: Add {unsigned ,}__int128 <-> _Decimal{32,64,128} conversion support [PR65833]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUsw14bVvAyCni7X@tucnak/mbox/"},{"id":162916,"url":"https://patchwork.plctlab.org/api/1.2/patches/162916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cmsaanz.fsf@oldenburg.str.redhat.com/","msgid":"<877cmsaanz.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T08:53:20","name":"gcc.dg/Wmissing-parameter-type*: Test the intended warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cmsaanz.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162918,"url":"https://patchwork.plctlab.org/api/1.2/patches/162918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108090938.8206-1-xuli1@eswincomputing.com/","msgid":"<20231108090938.8206-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-08T09:09:38","name":"RISC-V: Eliminate unused parameter warning.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108090938.8206-1-xuli1@eswincomputing.com/mbox/"},{"id":162924,"url":"https://patchwork.plctlab.org/api/1.2/patches/162924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqs8s4h.fsf@oldenburg.str.redhat.com/","msgid":"<87jzqs8s4h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T10:19:10","name":"Improve C99 compatibility of gcc.dg/setjmp-7.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqs8s4h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162947,"url":"https://patchwork.plctlab.org/api/1.2/patches/162947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108105317.1786716-1-juzhe.zhong@rivai.ai/","msgid":"<20231108105317.1786716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T10:53:17","name":"Middle-end: Fix bug of induction variable vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108105317.1786716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162950,"url":"https://patchwork.plctlab.org/api/1.2/patches/162950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-2-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:12","name":"[1/3] RISC-V: Add support for XCVelw extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-2-mary.bennett@embecosm.com/mbox/"},{"id":162951,"url":"https://patchwork.plctlab.org/api/1.2/patches/162951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-3-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:13","name":"[2/3] RISC-V: Update XCValu constraints to match other vendors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-3-mary.bennett@embecosm.com/mbox/"},{"id":162952,"url":"https://patchwork.plctlab.org/api/1.2/patches/162952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-4-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-4-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:14","name":"[3/3] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-4-mary.bennett@embecosm.com/mbox/"},{"id":162989,"url":"https://patchwork.plctlab.org/api/1.2/patches/162989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108113306.1820431-1-juzhe.zhong@rivai.ai/","msgid":"<20231108113306.1820431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T11:33:06","name":"[Committed] RISC-V: Fix VSETVL VL check condition bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108113306.1820431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162994,"url":"https://patchwork.plctlab.org/api/1.2/patches/162994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de/","msgid":"<3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de>","list_archive_url":null,"date":"2023-11-08T11:53:28","name":"[avr,committed] Tweak IEEE double multiplication","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de/mbox/"},{"id":163026,"url":"https://patchwork.plctlab.org/api/1.2/patches/163026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108131237.3672914-1-chenyixuan@iscas.ac.cn/","msgid":"<20231108131237.3672914-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-08T13:12:37","name":"minimal support for xtheadv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108131237.3672914-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":163030,"url":"https://patchwork.plctlab.org/api/1.2/patches/163030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108132725.1331224-1-lehua.ding@rivai.ai/","msgid":"<20231108132725.1331224-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T13:27:25","name":"RISC-V: Removed unnecessary sign-extend for vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108132725.1331224-1-lehua.ding@rivai.ai/mbox/"},{"id":163075,"url":"https://patchwork.plctlab.org/api/1.2/patches/163075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y2c8fca.fsf@oldenburg.str.redhat.com/","msgid":"<875y2c8fca.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T14:55:17","name":"i386: Fix C99 compatibility issues in the x86-64 AVX ABI test suite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y2c8fca.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163077,"url":"https://patchwork.plctlab.org/api/1.2/patches/163077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com/","msgid":"<908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com>","list_archive_url":null,"date":"2023-11-08T15:00:23","name":"tree-ssa-loop-ivopts : Add live analysis in regs used in decision making","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com/mbox/"},{"id":163078,"url":"https://patchwork.plctlab.org/api/1.2/patches/163078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:02:54","name":"[1/4] Fix SLP of masked loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163079,"url":"https://patchwork.plctlab.org/api/1.2/patches/163079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150309.85118133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150309.85118133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:09","name":"[2/4] TLC to vect_check_store_rhs and vect_slp_child_index_for_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150309.85118133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163080,"url":"https://patchwork.plctlab.org/api/1.2/patches/163080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:24","name":"[3/4] Fix SLP of emulated gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163081,"url":"https://patchwork.plctlab.org/api/1.2/patches/163081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150336.96BCC133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150336.96BCC133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:36","name":"[4/4] Refactor x86 decl based scatter vectorization, prepare SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150336.96BCC133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163088,"url":"https://patchwork.plctlab.org/api/1.2/patches/163088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108153646.5100A138F2@imap2.suse-dmz.suse.de/","msgid":"<20231108153646.5100A138F2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:36:45","name":"Fix SIMD clone SLP a bit more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108153646.5100A138F2@imap2.suse-dmz.suse.de/mbox/"},{"id":163094,"url":"https://patchwork.plctlab.org/api/1.2/patches/163094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qd0jlac.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:51:23","name":"skip debug stmts when assigning locus discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qd0jlac.fsf@lxoliva.fsfla.org/mbox/"},{"id":163095,"url":"https://patchwork.plctlab.org/api/1.2/patches/163095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmusi6j2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:55:29","name":"testsuite: arg-pushing reqs -mno-accumulate-outgoing-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmusi6j2.fsf@lxoliva.fsfla.org/mbox/"},{"id":163096,"url":"https://patchwork.plctlab.org/api/1.2/patches/163096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf5gi6gz.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:56:44","name":"testsuite: adjust gomp test for x86 -m32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf5gi6gz.fsf@lxoliva.fsfla.org/mbox/"},{"id":163097,"url":"https://patchwork.plctlab.org/api/1.2/patches/163097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7g4i6fr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:57:28","name":"testsuite: force PIC/PIE off for pr58245-1.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7g4i6fr.fsf@lxoliva.fsfla.org/mbox/"},{"id":163118,"url":"https://patchwork.plctlab.org/api/1.2/patches/163118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCohe0qW4BGjbXSvBauJeAzkqoNNbSU+rCZV-jJgo+uAKg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:00:58","name":"RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCohe0qW4BGjbXSvBauJeAzkqoNNbSU+rCZV-jJgo+uAKg@mail.gmail.com/mbox/"},{"id":163098,"url":"https://patchwork.plctlab.org/api/1.2/patches/163098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzqsi68k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:01:47","name":"testsuite: xfail scev-[35].c on ia32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzqsi68k.fsf@lxoliva.fsfla.org/mbox/"},{"id":163119,"url":"https://patchwork.plctlab.org/api/1.2/patches/163119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1gi5ud.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:10:18","name":"libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1gi5ud.fsf@lxoliva.fsfla.org/mbox/"},{"id":163101,"url":"https://patchwork.plctlab.org/api/1.2/patches/163101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzfzogq0h.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:37:34","name":"[v2] i386 PIE: accept @GOTOFF in load/store multi base address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzfzogq0h.fsf@lxoliva.fsfla.org/mbox/"},{"id":163105,"url":"https://patchwork.plctlab.org/api/1.2/patches/163105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8acgpru.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:42:45","name":"[v2,PR83782] ifunc: back-propagate ifunc_resolver to aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8acgpru.fsf@lxoliva.fsfla.org/mbox/"},{"id":163109,"url":"https://patchwork.plctlab.org/api/1.2/patches/163109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com/","msgid":"<60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com>","list_archive_url":null,"date":"2023-11-08T16:58:10","name":"OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com/mbox/"},{"id":163174,"url":"https://patchwork.plctlab.org/api/1.2/patches/163174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108215904.2779753-1-ppalka@redhat.com/","msgid":"<20231108215904.2779753-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-08T21:59:04","name":"c++: non-dependent .* folding [PR112427]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108215904.2779753-1-ppalka@redhat.com/mbox/"},{"id":163208,"url":"https://patchwork.plctlab.org/api/1.2/patches/163208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvnhgj2.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:17:05","name":"[v2] libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvnhgj2.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":163196,"url":"https://patchwork.plctlab.org/api/1.2/patches/163196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com/","msgid":"<7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T01:31:52","name":"[PATCH-2v2,rs6000] Enable vector mode for by pieces equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com/mbox/"},{"id":163197,"url":"https://patchwork.plctlab.org/api/1.2/patches/163197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com/","msgid":"<4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T01:32:07","name":"[PATCH-3v3,rs6000] Fix regression cases caused 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com/mbox/"},{"id":163198,"url":"https://patchwork.plctlab.org/api/1.2/patches/163198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1fhf0k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:49:47","name":"testsuite: tsan: add fallback overload for pthread_cond_clockwait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1fhf0k.fsf@lxoliva.fsfla.org/mbox/"},{"id":163199,"url":"https://patchwork.plctlab.org/api/1.2/patches/163199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109015537.3967177-1-juzhe.zhong@rivai.ai/","msgid":"<20231109015537.3967177-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T01:55:37","name":"[Committed] RISC-V: Fix dynamic tests [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109015537.3967177-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163200,"url":"https://patchwork.plctlab.org/api/1.2/patches/163200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkc3heqh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:55:50","name":"libsupc++: try cxa_thread_atexit_impl at runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkc3heqh.fsf@lxoliva.fsfla.org/mbox/"},{"id":163205,"url":"https://patchwork.plctlab.org/api/1.2/patches/163205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109023917.3985192-1-juzhe.zhong@rivai.ai/","msgid":"<20231109023917.3985192-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T02:39:17","name":"RISC-V: Fix dynamic LMUL cost model ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109023917.3985192-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163215,"url":"https://patchwork.plctlab.org/api/1.2/patches/163215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cmrha2f.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T03:36:40","name":"[v3] libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cmrha2f.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":163226,"url":"https://patchwork.plctlab.org/api/1.2/patches/163226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8fef393-68f9-4ea8-8903-fb280e0f46d3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-09T05:41:18","name":"[expand] Call misaligned memory reference in expand_builtin_return [PR112417]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8fef393-68f9-4ea8-8903-fb280e0f46d3@linux.ibm.com/mbox/"},{"id":163242,"url":"https://patchwork.plctlab.org/api/1.2/patches/163242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109060858.3067686-1-pan2.li@intel.com/","msgid":"<20231109060858.3067686-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T06:08:58","name":"[v2] DSE: Allow vector type for get_stored_val when read < store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109060858.3067686-1-pan2.li@intel.com/mbox/"},{"id":163250,"url":"https://patchwork.plctlab.org/api/1.2/patches/163250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109065057.3179104-1-pan2.li@intel.com/","msgid":"<20231109065057.3179104-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T06:50:57","name":"[v1] RISC-V: Refine frm emit after bb end in succ edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109065057.3179104-1-pan2.li@intel.com/mbox/"},{"id":163257,"url":"https://patchwork.plctlab.org/api/1.2/patches/163257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109071457.2574044-1-lin1.hu@intel.com/","msgid":"<20231109071457.2574044-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-11-09T07:14:57","name":"Avoid generate vblendps with ymm16+","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109071457.2574044-1-lin1.hu@intel.com/mbox/"},{"id":163271,"url":"https://patchwork.plctlab.org/api/1.2/patches/163271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109074008.580-1-jinma@linux.alibaba.com/","msgid":"<20231109074008.580-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-09T07:40:08","name":"RISC-V: Fix the illegal operands for the XTheadMemidx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109074008.580-1-jinma@linux.alibaba.com/mbox/"},{"id":163278,"url":"https://patchwork.plctlab.org/api/1.2/patches/163278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082123.3120267-1-hongtao.liu@intel.com/","msgid":"<20231109082123.3120267-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-09T08:21:23","name":"Fix wrong code due to vec_merge + pcmp to blendvb splitter.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082123.3120267-1-hongtao.liu@intel.com/mbox/"},{"id":163280,"url":"https://patchwork.plctlab.org/api/1.2/patches/163280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-1-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:09","name":"[1/3] s390: Recognize further vpdi and vmr{l,h} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-1-stefansf@linux.ibm.com/mbox/"},{"id":163286,"url":"https://patchwork.plctlab.org/api/1.2/patches/163286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-2-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:10","name":"[2/3] s390: Add expand_perm_reverse_elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-2-stefansf@linux.ibm.com/mbox/"},{"id":163281,"url":"https://patchwork.plctlab.org/api/1.2/patches/163281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-3-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-3-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:11","name":"[3/3] s390: Revise vector reverse elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-3-stefansf@linux.ibm.com/mbox/"},{"id":163285,"url":"https://patchwork.plctlab.org/api/1.2/patches/163285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082409.2890-1-stefansf@linux.ibm.com/","msgid":"<20231109082409.2890-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:24:09","name":"s390: Reduce number of patterns where the condition is false anyway","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082409.2890-1-stefansf@linux.ibm.com/mbox/"},{"id":163342,"url":"https://patchwork.plctlab.org/api/1.2/patches/163342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103037.281290-1-yunqiang.su@cipunited.com/","msgid":"<20231109103037.281290-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-09T10:30:36","name":"[committed] MIPS: Use -mnan value for -mabs if not specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103037.281290-1-yunqiang.su@cipunited.com/mbox/"},{"id":163343,"url":"https://patchwork.plctlab.org/api/1.2/patches/163343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103201.286626-1-yunqiang.su@cipunited.com/","msgid":"<20231109103201.286626-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-09T10:32:01","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103201.286626-1-yunqiang.su@cipunited.com/mbox/"},{"id":163346,"url":"https://patchwork.plctlab.org/api/1.2/patches/163346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105114.3A7EC385B800@sourceware.org/","msgid":"<20231109105114.3A7EC385B800@sourceware.org>","list_archive_url":null,"date":"2023-11-09T10:50:48","name":"tree-optimization/112444 - avoid bougs PHI value-numbering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105114.3A7EC385B800@sourceware.org/mbox/"},{"id":163347,"url":"https://patchwork.plctlab.org/api/1.2/patches/163347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105542.4013483-2-mary.bennett@embecosm.com/","msgid":"<20231109105542.4013483-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T10:55:42","name":"[1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105542.4013483-2-mary.bennett@embecosm.com/mbox/"},{"id":163350,"url":"https://patchwork.plctlab.org/api/1.2/patches/163350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com/","msgid":"<74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-09T11:26:27","name":"[2/4] aarch64: Fix tme intrinsic availability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com/mbox/"},{"id":163351,"url":"https://patchwork.plctlab.org/api/1.2/patches/163351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com/","msgid":"<9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-09T11:26:55","name":"[3/4] aarch64: Fix memtag intrinsic availability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com/mbox/"},{"id":163358,"url":"https://patchwork.plctlab.org/api/1.2/patches/163358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109113650.EB1D63858296@sourceware.org/","msgid":"<20231109113650.EB1D63858296@sourceware.org>","list_archive_url":null,"date":"2023-11-09T11:36:24","name":"tree-optimization/112450 - avoid AVX512 style masking for BImode masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109113650.EB1D63858296@sourceware.org/mbox/"},{"id":163378,"url":"https://patchwork.plctlab.org/api/1.2/patches/163378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109115736.541131-2-mary.bennett@embecosm.com/","msgid":"<20231109115736.541131-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T11:57:36","name":"[1/1] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109115736.541131-2-mary.bennett@embecosm.com/mbox/"},{"id":163385,"url":"https://patchwork.plctlab.org/api/1.2/patches/163385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109120038.109612-1-juzhe.zhong@rivai.ai/","msgid":"<20231109120038.109612-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T12:00:38","name":"[Committed] RISC-V: Add PR112450 test to avoid regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109120038.109612-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163391,"url":"https://patchwork.plctlab.org/api/1.2/patches/163391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109124219.966619-2-mary.bennett@embecosm.com/","msgid":"<20231109124219.966619-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T12:42:19","name":"[1/1] RISC-V: Add support for XCVmem extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109124219.966619-2-mary.bennett@embecosm.com/mbox/"},{"id":163407,"url":"https://patchwork.plctlab.org/api/1.2/patches/163407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109143338.307725-1-pan2.li@intel.com/","msgid":"<20231109143338.307725-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T14:33:38","name":"[v1] Internal-fn: Add FLOATN support for l/ll round and rint [PR/112432]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109143338.307725-1-pan2.li@intel.com/mbox/"},{"id":163411,"url":"https://patchwork.plctlab.org/api/1.2/patches/163411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUz0fdighFsO3Na6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-09T15:02:21","name":"Add type-generic clz/ctz/clrsb/ffs/parity/popcount builtins [PR111309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUz0fdighFsO3Na6@tucnak/mbox/"},{"id":163523,"url":"https://patchwork.plctlab.org/api/1.2/patches/163523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109160028.2829009-1-ppalka@redhat.com/","msgid":"<20231109160028.2829009-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-09T16:00:28","name":"libstdc++: Fix forwarding in __take/drop_of_repeat_view [PR112453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109160028.2829009-1-ppalka@redhat.com/mbox/"},{"id":163537,"url":"https://patchwork.plctlab.org/api/1.2/patches/163537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com/","msgid":"<0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com>","list_archive_url":null,"date":"2023-11-09T18:25:44","name":"[pushed,IRA] : Fixing conflict calculation from region landing pads.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com/mbox/"},{"id":163581,"url":"https://patchwork.plctlab.org/api/1.2/patches/163581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109193009.2391070-1-arsen@aarsen.me/","msgid":"<20231109193009.2391070-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-09T19:25:34","name":"[1/2] libstdc++: declare std::allocator in !HOSTED as an extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109193009.2391070-1-arsen@aarsen.me/mbox/"},{"id":163623,"url":"https://patchwork.plctlab.org/api/1.2/patches/163623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109223140.2989474-1-dmalcolm@redhat.com/","msgid":"<20231109223140.2989474-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-09T22:31:40","name":"[pushed] diagnostics: cleanups to diagnostic-show-locus.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109223140.2989474-1-dmalcolm@redhat.com/mbox/"},{"id":163633,"url":"https://patchwork.plctlab.org/api/1.2/patches/163633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109233325.2189755-1-juzhe.zhong@rivai.ai/","msgid":"<20231109233325.2189755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T23:33:25","name":"RISC-V: Move cond_copysign from combine pattern to autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109233325.2189755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163634,"url":"https://patchwork.plctlab.org/api/1.2/patches/163634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109234945.4108-1-jose.marchesi@oracle.com/","msgid":"<20231109234945.4108-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-09T23:49:45","name":"[COMMITED] bpf: testsuite: fix expected regexp in gcc.target/bpf/ldxdw.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109234945.4108-1-jose.marchesi@oracle.com/mbox/"},{"id":163690,"url":"https://patchwork.plctlab.org/api/1.2/patches/163690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110001720.20880-1-jose.marchesi@oracle.com/","msgid":"<20231110001720.20880-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-10T00:17:20","name":"[COMMITTED] bpf: fix pseudo-c asm emitted for *mulsidi3_zeroextend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110001720.20880-1-jose.marchesi@oracle.com/mbox/"},{"id":163717,"url":"https://patchwork.plctlab.org/api/1.2/patches/163717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110014158.371690-2-haochen.jiang@intel.com/","msgid":"<20231110014158.371690-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-10T01:41:58","name":"Initial support for AVX10.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110014158.371690-2-haochen.jiang@intel.com/mbox/"},{"id":163719,"url":"https://patchwork.plctlab.org/api/1.2/patches/163719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110015202.650942-1-hongtao.liu@intel.com/","msgid":"<20231110015202.650942-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T01:52:02","name":"Simplify vector ((VCE?(a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE:a cmp VCE:b) ? c : d.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110015202.650942-1-hongtao.liu@intel.com/mbox/"},{"id":163763,"url":"https://patchwork.plctlab.org/api/1.2/patches/163763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033316.1126689-1-juzhe.zhong@rivai.ai/","msgid":"<20231110033316.1126689-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T03:33:16","name":"RISC-V: Robustify vec_init pattern[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033316.1126689-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163771,"url":"https://patchwork.plctlab.org/api/1.2/patches/163771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033651.1127125-1-juzhe.zhong@rivai.ai/","msgid":"<20231110033651.1127125-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T03:36:51","name":"RISC-V: Add combine optimization by slideup for vec_init vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033651.1127125-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163772,"url":"https://patchwork.plctlab.org/api/1.2/patches/163772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033900.246872-1-hongtao.liu@intel.com/","msgid":"<20231110033900.246872-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T03:39:00","name":"Support vec_set/vec_extract/vec_init for V4HF/V2HF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033900.246872-1-hongtao.liu@intel.com/mbox/"},{"id":163775,"url":"https://patchwork.plctlab.org/api/1.2/patches/163775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110061228.1411882-1-hongtao.liu@intel.com/","msgid":"<20231110061228.1411882-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T06:12:28","name":"Simplify vector ((VCE?(a cmp b ? -1 : 0)) < 0) ? c : d to just VCE:((a cmp b) ? (VCE c) : (VCE d)).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110061228.1411882-1-hongtao.liu@intel.com/mbox/"},{"id":163776,"url":"https://patchwork.plctlab.org/api/1.2/patches/163776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110062237.3267408-1-pan2.li@intel.com/","msgid":"<20231110062237.3267408-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-10T06:22:37","name":"[v1] RISC-V: Support vec_init for trailing same element","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110062237.3267408-1-pan2.li@intel.com/mbox/"},{"id":163777,"url":"https://patchwork.plctlab.org/api/1.2/patches/163777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com/","msgid":"<6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T07:09:02","name":"[PING,^1,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com/mbox/"},{"id":163778,"url":"https://patchwork.plctlab.org/api/1.2/patches/163778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110071431.1580-1-jinma@linux.alibaba.com/","msgid":"<20231110071431.1580-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-10T07:14:31","name":"RISC-V: Fix bug that XTheadMemPair extension caused fcsr not to be saved and restored before and after interrupt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110071431.1580-1-jinma@linux.alibaba.com/mbox/"},{"id":163788,"url":"https://patchwork.plctlab.org/api/1.2/patches/163788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com/","msgid":"<3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T07:58:58","name":"[PING,V15,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com/mbox/"},{"id":163790,"url":"https://patchwork.plctlab.org/api/1.2/patches/163790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110081435.3963830-1-pan2.li@intel.com/","msgid":"<20231110081435.3963830-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-10T08:14:35","name":"[v1] RISC-V: Add HFmode for l/ll round and rint autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110081435.3963830-1-pan2.li@intel.com/mbox/"},{"id":163791,"url":"https://patchwork.plctlab.org/api/1.2/patches/163791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com/","msgid":"<3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T09:22:41","name":"[PATCH-3v4,rs6000] Fix regression cases caused 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com/mbox/"},{"id":163793,"url":"https://patchwork.plctlab.org/api/1.2/patches/163793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com/","msgid":"<49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com>","list_archive_url":null,"date":"2023-11-10T10:15:42","name":"[committed] amdgcn: Fix vector min/max ICE (pr112313)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com/mbox/"},{"id":163794,"url":"https://patchwork.plctlab.org/api/1.2/patches/163794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kx6eez.fsf@oldenburg.str.redhat.com/","msgid":"<87r0kx6eez.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T11:22:44","name":"aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kx6eez.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163795,"url":"https://patchwork.plctlab.org/api/1.2/patches/163795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110122011.3626658-1-juzhe.zhong@rivai.ai/","msgid":"<20231110122011.3626658-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T12:20:11","name":"[V2] Middle-end: Fix bug of induction variable vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110122011.3626658-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163797,"url":"https://patchwork.plctlab.org/api/1.2/patches/163797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110131658.09A5D13398@imap2.suse-dmz.suse.de/","msgid":"<20231110131658.09A5D13398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-10T13:16:57","name":"tree-optimization/110221 - SLP and loop mask/len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110131658.09A5D13398@imap2.suse-dmz.suse.de/mbox/"},{"id":163798,"url":"https://patchwork.plctlab.org/api/1.2/patches/163798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca309ae63920109cf88da3e4106a8a24576302fc.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-10T16:02:17","name":"libgccjit: Fix GGC segfault when using -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca309ae63920109cf88da3e4106a8a24576302fc.camel@zoho.com/mbox/"},{"id":163799,"url":"https://patchwork.plctlab.org/api/1.2/patches/163799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com/","msgid":"<6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com>","list_archive_url":null,"date":"2023-11-10T16:48:25","name":"[pushed,PR112337,IRA] : Check autoinc and memory address after temporary equivalence substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com/mbox/"},{"id":163913,"url":"https://patchwork.plctlab.org/api/1.2/patches/163913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht5tsq.fsf@oldenburg.str.redhat.com/","msgid":"<874jht5tsq.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T18:48:05","name":"aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht5tsq.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163998,"url":"https://patchwork.plctlab.org/api/1.2/patches/163998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-2-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:44","name":"[1/3] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-2-dmalcolm@redhat.com/mbox/"},{"id":163999,"url":"https://patchwork.plctlab.org/api/1.2/patches/163999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-3-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:45","name":"[2/3] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-3-dmalcolm@redhat.com/mbox/"},{"id":163997,"url":"https://patchwork.plctlab.org/api/1.2/patches/163997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-4-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:46","name":"[3/3] diagnostics: use the .opt.urls files to urlify quoted text","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-4-dmalcolm@redhat.com/mbox/"},{"id":164000,"url":"https://patchwork.plctlab.org/api/1.2/patches/164000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311101822270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-10T21:54:07","name":"[committed] RISC-V: Fix indentation of \"length\" attribute for branches and jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311101822270.5892@tpp.orcam.me.uk/mbox/"},{"id":164001,"url":"https://patchwork.plctlab.org/api/1.2/patches/164001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leb5462f.fsf@oldenburg.str.redhat.com/","msgid":"<87leb5462f.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:00","name":"C99 testsuite readiness: -fpermissive tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leb5462f.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164002,"url":"https://patchwork.plctlab.org/api/1.2/patches/164002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6lt461j.fsf@oldenburg.str.redhat.com/","msgid":"<87h6lt461j.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:32","name":"C99 testsuite readiness: Verified un-reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6lt461j.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164003,"url":"https://patchwork.plctlab.org/api/1.2/patches/164003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cywh460x.fsf@oldenburg.str.redhat.com/","msgid":"<87cywh460x.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:54","name":"C99 testsuite readiness: More unverified testcase un-reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cywh460x.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164004,"url":"https://patchwork.plctlab.org/api/1.2/patches/164004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r75460h.fsf@oldenburg.str.redhat.com/","msgid":"<878r75460h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:10","name":"C99 testsuite readiness: Compile more tests with -std=gnu89","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r75460h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164006,"url":"https://patchwork.plctlab.org/api/1.2/patches/164006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht45zo.fsf@oldenburg.str.redhat.com/","msgid":"<874jht45zo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:39","name":"C99 testsuite readiness: Add missing abort, exit declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht45zo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164005,"url":"https://patchwork.plctlab.org/api/1.2/patches/164005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfzl2res.fsf@oldenburg.str.redhat.com/","msgid":"<87zfzl2res.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:55","name":"C99 testsuite readiness: Cleanup of execute tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfzl2res.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164021,"url":"https://patchwork.plctlab.org/api/1.2/patches/164021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU60wCU3w1RkyOY/@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T22:54:56","name":"[V2] Power10: Add options to disable load and store vector pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU60wCU3w1RkyOY/@cowardly-lion.the-meissners.org/mbox/"},{"id":164022,"url":"https://patchwork.plctlab.org/api/1.2/patches/164022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64KEIl6pE7e0sm@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:09:28","name":"[1/4] Add support for floating point vector pair built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64KEIl6pE7e0sm@cowardly-lion.the-meissners.org/mbox/"},{"id":164025,"url":"https://patchwork.plctlab.org/api/1.2/patches/164025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64mCbRp3nb8OJL@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:11:20","name":"[2/4] Add support for integer vector pair built-ins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64mCbRp3nb8OJL@cowardly-lion.the-meissners.org/mbox/"},{"id":164023,"url":"https://patchwork.plctlab.org/api/1.2/patches/164023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU6472jUQslwl1Fe@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:12:47","name":"[3/4] Add support for initializing and extracting from vector pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU6472jUQslwl1Fe@cowardly-lion.the-meissners.org/mbox/"},{"id":164024,"url":"https://patchwork.plctlab.org/api/1.2/patches/164024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU65NlATqRKTwKDO@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:13:58","name":"[4/4] Add support for doing a horizontal add on vector pair elements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU65NlATqRKTwKDO@cowardly-lion.the-meissners.org/mbox/"},{"id":164026,"url":"https://patchwork.plctlab.org/api/1.2/patches/164026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110232754.1399391-1-juzhe.zhong@rivai.ai/","msgid":"<20231110232754.1399391-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T23:27:54","name":"[Committed] RISC-V: Add test for PR112469","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110232754.1399391-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164040,"url":"https://patchwork.plctlab.org/api/1.2/patches/164040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111003846.496197-1-polacek@redhat.com/","msgid":"<20231111003846.496197-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:38:46","name":"[pushed] testsuite: fix lambda-decltype3.C in C++11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111003846.496197-1-polacek@redhat.com/mbox/"},{"id":164059,"url":"https://patchwork.plctlab.org/api/1.2/patches/164059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004433.66232-1-jwakely@redhat.com/","msgid":"<20231111004433.66232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:43:48","name":"[committed] libstdc++: Remove handling for underscore-prefixed libm functions [PR111638]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004433.66232-1-jwakely@redhat.com/mbox/"},{"id":164048,"url":"https://patchwork.plctlab.org/api/1.2/patches/164048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004440.77760-1-jwakely@redhat.com/","msgid":"<20231111004440.77760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:35","name":"[committed] libstdc++: Add [[nodiscard]] to std::span members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004440.77760-1-jwakely@redhat.com/mbox/"},{"id":164047,"url":"https://patchwork.plctlab.org/api/1.2/patches/164047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004446.77907-1-jwakely@redhat.com/","msgid":"<20231111004446.77907-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:41","name":"[committed] libstdc++: Add [[nodiscard]] to lock types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004446.77907-1-jwakely@redhat.com/mbox/"},{"id":164046,"url":"https://patchwork.plctlab.org/api/1.2/patches/164046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004453.78040-1-jwakely@redhat.com/","msgid":"<20231111004453.78040-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:47","name":"[committed] libstdc++: Deprecate std::atomic_xxx overloads for std::shared_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004453.78040-1-jwakely@redhat.com/mbox/"},{"id":164041,"url":"https://patchwork.plctlab.org/api/1.2/patches/164041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004458.78235-1-jwakely@redhat.com/","msgid":"<20231111004458.78235-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:54","name":"[committed] libstdc++: Fix test that fails with -ffreestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004458.78235-1-jwakely@redhat.com/mbox/"},{"id":164052,"url":"https://patchwork.plctlab.org/api/1.2/patches/164052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004505.78351-1-jwakely@redhat.com/","msgid":"<20231111004505.78351-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:59","name":"[committed] libstdc++: Add static_assert to std::integer_sequence [PR112473]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004505.78351-1-jwakely@redhat.com/mbox/"},{"id":164050,"url":"https://patchwork.plctlab.org/api/1.2/patches/164050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004510.78546-1-jwakely@redhat.com/","msgid":"<20231111004510.78546-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:45:06","name":"[committed] libstdc++: Fix broken tests for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004510.78546-1-jwakely@redhat.com/mbox/"},{"id":164051,"url":"https://patchwork.plctlab.org/api/1.2/patches/164051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111005834.93376-1-jwakely@redhat.com/","msgid":"<20231111005834.93376-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:58:14","name":"[committed] libstdc++: Do not use assume attribute for Clang [PR112467]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111005834.93376-1-jwakely@redhat.com/mbox/"},{"id":164043,"url":"https://patchwork.plctlab.org/api/1.2/patches/164043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU7VOhuVUvCPnqqG@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-11T01:13:30","name":"[v2] c++: fix parsing with auto(x) [PR112410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU7VOhuVUvCPnqqG@redhat.com/mbox/"},{"id":164102,"url":"https://patchwork.plctlab.org/api/1.2/patches/164102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU854tpVwxxWwFRX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:22:58","name":"c, c++: Add new value for vector types for __builtin_classify_type (type)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU854tpVwxxWwFRX@tucnak/mbox/"},{"id":164103,"url":"https://patchwork.plctlab.org/api/1.2/patches/164103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU864Q9ltkW8n94Z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:27:13","name":"tree-ssa-math-opts: Fix up gsi_remove order in match_uaddc_usubc [PR112430]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU864Q9ltkW8n94Z@tucnak/mbox/"},{"id":164104,"url":"https://patchwork.plctlab.org/api/1.2/patches/164104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU885F2AArMH9y5M@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:35:48","name":"gimple-range-cache: Fix ICEs when dumping details [PR111967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU885F2AArMH9y5M@tucnak/mbox/"},{"id":164110,"url":"https://patchwork.plctlab.org/api/1.2/patches/164110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJ9KDmOZqgHH9eM1ytPGTtjG_-F+ekP0f5w46OjcEZNkw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-11T10:15:45","name":"[fortran] PR112459 - gfortran -w option causes derived-type finalization at creation time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJ9KDmOZqgHH9eM1ytPGTtjG_-F+ekP0f5w46OjcEZNkw@mail.gmail.com/mbox/"},{"id":164122,"url":"https://patchwork.plctlab.org/api/1.2/patches/164122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111110039.143319-1-xry111@xry111.site/","msgid":"<20231111110039.143319-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-11T10:58:19","name":"[v2] LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111110039.143319-1-xry111@xry111.site/mbox/"},{"id":164132,"url":"https://patchwork.plctlab.org/api/1.2/patches/164132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2245595.iZASKD2KPV@fomalhaut/","msgid":"<2245595.iZASKD2KPV@fomalhaut>","list_archive_url":null,"date":"2023-11-11T12:11:28","name":"Handle addresses of more constants in IPA-CP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2245595.iZASKD2KPV@fomalhaut/mbox/"},{"id":164172,"url":"https://patchwork.plctlab.org/api/1.2/patches/164172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111231146.31932-1-bshanks@codeweavers.com/","msgid":"<20231111231146.31932-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-11-11T23:11:12","name":"testsuite: Fix bad-mapper-1.C test failures with posix_spawn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111231146.31932-1-bshanks@codeweavers.com/mbox/"},{"id":164175,"url":"https://patchwork.plctlab.org/api/1.2/patches/164175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112010047.496937-1-xry111@xry111.site/","msgid":"<20231112010047.496937-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-12T01:00:13","name":"LoongArch: Use simplify_gen_subreg instead of gen_rtx_SUBREG in loongarch_expand_vec_cond_mask_expr [PR112476]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112010047.496937-1-xry111@xry111.site/mbox/"},{"id":164242,"url":"https://patchwork.plctlab.org/api/1.2/patches/164242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-4-lehua.ding@rivai.ai/","msgid":"<20231112095858.3669003-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T09:58:54","name":"[V2,3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-4-lehua.ding@rivai.ai/mbox/"},{"id":164243,"url":"https://patchwork.plctlab.org/api/1.2/patches/164243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-6-lehua.ding@rivai.ai/","msgid":"<20231112095858.3669003-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T09:58:56","name":"[V2,5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-6-lehua.ding@rivai.ai/mbox/"},{"id":164246,"url":"https://patchwork.plctlab.org/api/1.2/patches/164246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-3-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:12","name":"[V3,2/7] ira: Switch to live_subreg data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-3-lehua.ding@rivai.ai/mbox/"},{"id":164249,"url":"https://patchwork.plctlab.org/api/1.2/patches/164249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-4-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:13","name":"[V3,3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-4-lehua.ding@rivai.ai/mbox/"},{"id":164247,"url":"https://patchwork.plctlab.org/api/1.2/patches/164247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-5-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:14","name":"[V3,4/7] ira: Support subreg copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-5-lehua.ding@rivai.ai/mbox/"},{"id":164250,"url":"https://patchwork.plctlab.org/api/1.2/patches/164250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-6-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:15","name":"[V3,5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-6-lehua.ding@rivai.ai/mbox/"},{"id":164248,"url":"https://patchwork.plctlab.org/api/1.2/patches/164248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-7-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:16","name":"[V3,6/7] lra: Switch to live_subreg data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-7-lehua.ding@rivai.ai/mbox/"},{"id":164251,"url":"https://patchwork.plctlab.org/api/1.2/patches/164251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-8-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:17","name":"[V3,7/7] lra: Support subreg live range track and conflict detect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-8-lehua.ding@rivai.ai/mbox/"},{"id":164252,"url":"https://patchwork.plctlab.org/api/1.2/patches/164252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112134751.2972640-1-pan2.li@intel.com/","msgid":"<20231112134751.2972640-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-12T13:47:51","name":"[v1] RISC-V: Support FP l/ll round and rint HF mode autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112134751.2972640-1-pan2.li@intel.com/mbox/"},{"id":164254,"url":"https://patchwork.plctlab.org/api/1.2/patches/164254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-5-richard.sandiford@arm.com/","msgid":"<20231112145229.2924713-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-11-12T14:52:28","name":"[4/5] ira: Handle register filters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-5-richard.sandiford@arm.com/mbox/"},{"id":164255,"url":"https://patchwork.plctlab.org/api/1.2/patches/164255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-6-richard.sandiford@arm.com/","msgid":"<20231112145229.2924713-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-11-12T14:52:29","name":"[5/5] Add an aligned_register_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-6-richard.sandiford@arm.com/mbox/"},{"id":164286,"url":"https://patchwork.plctlab.org/api/1.2/patches/164286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112202603.228074-2-xry111@xry111.site/","msgid":"<20231112202603.228074-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-12T20:25:26","name":"Fix (fcopysign x, NEGATIVE_CONST) -> (fneg (fabs x)) simplification [PR112483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112202603.228074-2-xry111@xry111.site/mbox/"},{"id":164291,"url":"https://patchwork.plctlab.org/api/1.2/patches/164291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com/","msgid":"<015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-12T23:24:25","name":"PR112380: Defend against CLOBBERs in RTX expressions in combine.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com/mbox/"},{"id":164340,"url":"https://patchwork.plctlab.org/api/1.2/patches/164340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113031001.1370500-1-pan2.li@intel.com/","msgid":"<20231113031001.1370500-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-13T03:10:01","name":"[v1] RISC-V: Fix RVV dynamic frm tests failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113031001.1370500-1-pan2.li@intel.com/mbox/"},{"id":164341,"url":"https://patchwork.plctlab.org/api/1.2/patches/164341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113032237.1379330-1-pan2.li@intel.com/","msgid":"<20231113032237.1379330-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-13T03:22:37","name":"[v4] DSE: Allow vector type for get_stored_val when read < store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113032237.1379330-1-pan2.li@intel.com/mbox/"},{"id":164345,"url":"https://patchwork.plctlab.org/api/1.2/patches/164345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113033706.175135-1-juzhe.zhong@rivai.ai/","msgid":"<20231113033706.175135-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T03:37:06","name":"RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113033706.175135-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164648,"url":"https://patchwork.plctlab.org/api/1.2/patches/164648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/becd09c9-1353-40ed-a085-be4f938ddf0b@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T08:06:35","name":"RISC-V: vsetvl: Refine REG_EQUAL equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/becd09c9-1353-40ed-a085-be4f938ddf0b@gmail.com/mbox/"},{"id":164366,"url":"https://patchwork.plctlab.org/api/1.2/patches/164366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113084158.829807-1-juzhe.zhong@rivai.ai/","msgid":"<20231113084158.829807-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T08:41:58","name":"[V2] RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113084158.829807-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164367,"url":"https://patchwork.plctlab.org/api/1.2/patches/164367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVHjzAPbjBAPIYhK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-13T08:52:28","name":"[committed] i386: Remove j constraint letter from list of unused letters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVHjzAPbjBAPIYhK@tucnak/mbox/"},{"id":164388,"url":"https://patchwork.plctlab.org/api/1.2/patches/164388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com/","msgid":"<02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com>","list_archive_url":null,"date":"2023-11-13T09:32:09","name":"[wwwdocs,committed] projects/gomp: Update for TR12, update impl. status","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com/mbox/"},{"id":164407,"url":"https://patchwork.plctlab.org/api/1.2/patches/164407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113110636.149485-1-juzhe.zhong@rivai.ai/","msgid":"<20231113110636.149485-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T11:06:36","name":"[Committed,V3] RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113110636.149485-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164412,"url":"https://patchwork.plctlab.org/api/1.2/patches/164412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhp3nwf.fsf@oldenburg.str.redhat.com/","msgid":"<874jhp3nwf.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-13T11:15:12","name":"gm2: Add missing declaration of m2pim_M2RTS_Terminate to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhp3nwf.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164439,"url":"https://patchwork.plctlab.org/api/1.2/patches/164439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVINdo+Hef8H+H5w@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-13T11:50:14","name":"c++: Implement C++26 P2864R2 - Remove Deprecated Arithmetic Conversion on Enumerations From C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVINdo+Hef8H+H5w@tucnak/mbox/"},{"id":164443,"url":"https://patchwork.plctlab.org/api/1.2/patches/164443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113120050.608605-1-juzhe.zhong@rivai.ai/","msgid":"<20231113120050.608605-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T12:00:50","name":"[Committed] RISC-V: Adapt VLS init tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113120050.608605-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164454,"url":"https://patchwork.plctlab.org/api/1.2/patches/164454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113123958.22A821358C@imap2.suse-dmz.suse.de/","msgid":"<20231113123958.22A821358C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T12:39:57","name":"tree-optimization/111792 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113123958.22A821358C@imap2.suse-dmz.suse.de/mbox/"},{"id":164472,"url":"https://patchwork.plctlab.org/api/1.2/patches/164472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7ee58c567233aab1b36b9d09f79af6d0108a98b.1699879818.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T13:09:57","name":"[1/6] c-family: Introduce pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7ee58c567233aab1b36b9d09f79af6d0108a98b.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164473,"url":"https://patchwork.plctlab.org/api/1.2/patches/164473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com/","msgid":"<5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:10:34","name":"[2/6] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164474,"url":"https://patchwork.plctlab.org/api/1.2/patches/164474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com/","msgid":"<309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:11:05","name":"[4/6] c: Turn -Wimplicit-int into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164476,"url":"https://patchwork.plctlab.org/api/1.2/patches/164476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f036ee4b116bfe608ff3cf094f1f42f2c8235761.1699879818.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T13:11:14","name":"[5/6] c: Turn -Wreturn-mismatch into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f036ee4b116bfe608ff3cf094f1f42f2c8235761.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164478,"url":"https://patchwork.plctlab.org/api/1.2/patches/164478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com/","msgid":"<212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:11:21","name":"[6/6] c: Turn -Wincompatible-pointer-types into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164490,"url":"https://patchwork.plctlab.org/api/1.2/patches/164490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133830.E0A6613398@imap2.suse-dmz.suse.de/","msgid":"<20231113133830.E0A6613398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T13:38:30","name":"tree-optimization/112495 - alias versioning and address spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133830.E0A6613398@imap2.suse-dmz.suse.de/mbox/"},{"id":164491,"url":"https://patchwork.plctlab.org/api/1.2/patches/164491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133844.16AD213398@imap2.suse-dmz.suse.de/","msgid":"<20231113133844.16AD213398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T13:38:43","name":"middle-end/112487 - inline and parameter mismatch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133844.16AD213398@imap2.suse-dmz.suse.de/mbox/"},{"id":164501,"url":"https://patchwork.plctlab.org/api/1.2/patches/164501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-2-rearnsha@arm.com/","msgid":"<20231113142658.69039-2-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:37","name":"[committed,01/22] arm: testsuite: correctly detect armv6t2 hardware for acle execution tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-2-rearnsha@arm.com/mbox/"},{"id":164502,"url":"https://patchwork.plctlab.org/api/1.2/patches/164502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-3-rearnsha@arm.com/","msgid":"<20231113142658.69039-3-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:38","name":"[committed,02/22] arm: testsuite: correctly detect hard_float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-3-rearnsha@arm.com/mbox/"},{"id":164504,"url":"https://patchwork.plctlab.org/api/1.2/patches/164504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-5-rearnsha@arm.com/","msgid":"<20231113142658.69039-5-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:40","name":"[committed,04/22] arm: testsuite: avoid problems with -mfpu=auto in pacbti-m-predef-11.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-5-rearnsha@arm.com/mbox/"},{"id":164506,"url":"https://patchwork.plctlab.org/api/1.2/patches/164506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-6-rearnsha@arm.com/","msgid":"<20231113142658.69039-6-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:41","name":"[committed,05/22] arm: testsuite: avoid problems with -mfpu=auto in attr-crypto.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-6-rearnsha@arm.com/mbox/"},{"id":164509,"url":"https://patchwork.plctlab.org/api/1.2/patches/164509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-10-rearnsha@arm.com/","msgid":"<20231113142658.69039-10-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:45","name":"[committed,09/22] arm: testsuite: tidy up pr65647-2.c pre-checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-10-rearnsha@arm.com/mbox/"},{"id":164503,"url":"https://patchwork.plctlab.org/api/1.2/patches/164503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-11-rearnsha@arm.com/","msgid":"<20231113142658.69039-11-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:46","name":"[committed,10/22] arm: testsuite: improve compatibility of arm/pr78353-*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-11-rearnsha@arm.com/mbox/"},{"id":164505,"url":"https://patchwork.plctlab.org/api/1.2/patches/164505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-12-rearnsha@arm.com/","msgid":"<20231113142658.69039-12-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:47","name":"[committed,11/22] arm: testsuite: improve compatibility of pr88648-asm-syntax-unified.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-12-rearnsha@arm.com/mbox/"},{"id":164507,"url":"https://patchwork.plctlab.org/api/1.2/patches/164507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-13-rearnsha@arm.com/","msgid":"<20231113142658.69039-13-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:48","name":"[committed,12/22] arm: testsuite: improve compatibility of pragma_arch_attribute*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-13-rearnsha@arm.com/mbox/"},{"id":164512,"url":"https://patchwork.plctlab.org/api/1.2/patches/164512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-16-rearnsha@arm.com/","msgid":"<20231113142658.69039-16-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:51","name":"[committed,15/22] arm: testsuite: improve compatibility of ftest-armv7m-thumb.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-16-rearnsha@arm.com/mbox/"},{"id":164511,"url":"https://patchwork.plctlab.org/api/1.2/patches/164511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-17-rearnsha@arm.com/","msgid":"<20231113142658.69039-17-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:52","name":"[committed,16/22] arm: testsuite: improve compatibility of gcc.target/arm/macro_defs*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-17-rearnsha@arm.com/mbox/"},{"id":164513,"url":"https://patchwork.plctlab.org/api/1.2/patches/164513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-19-rearnsha@arm.com/","msgid":"<20231113142658.69039-19-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:54","name":"[committed,18/22] arm: testsuite: improve compatibility of gcc.target/arm/pr19599.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-19-rearnsha@arm.com/mbox/"},{"id":164508,"url":"https://patchwork.plctlab.org/api/1.2/patches/164508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-20-rearnsha@arm.com/","msgid":"<20231113142658.69039-20-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:55","name":"[committed,19/22] arm: testsuite: improve compatibility of gcc.target/arm/pr59575.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-20-rearnsha@arm.com/mbox/"},{"id":164510,"url":"https://patchwork.plctlab.org/api/1.2/patches/164510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-21-rearnsha@arm.com/","msgid":"<20231113142658.69039-21-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:56","name":"[committed,20/22] testsuite: arm: tighten up mode-specific ISA tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-21-rearnsha@arm.com/mbox/"},{"id":164514,"url":"https://patchwork.plctlab.org/api/1.2/patches/164514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-23-rearnsha@arm.com/","msgid":"<20231113142658.69039-23-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:58","name":"[committed,22/22] arm: testsuite: improve compatibility of gcc.dg/debug/pr57351.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-23-rearnsha@arm.com/mbox/"},{"id":164602,"url":"https://patchwork.plctlab.org/api/1.2/patches/164602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113190401.759232-1-jwakely@redhat.com/","msgid":"<20231113190401.759232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T19:01:18","name":"c++: Link extended FP conversion pedwarns to -Wnarrowing [PR111842]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113190401.759232-1-jwakely@redhat.com/mbox/"},{"id":164637,"url":"https://patchwork.plctlab.org/api/1.2/patches/164637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113200840.339229-1-xry111@xry111.site/","msgid":"<20231113200840.339229-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-13T20:07:14","name":"LoongArch: Handle vectorized copysign (x, -1) expansion efficiently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113200840.339229-1-xry111@xry111.site/mbox/"},{"id":164656,"url":"https://patchwork.plctlab.org/api/1.2/patches/164656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223542.11562-1-cupertino.miranda@oracle.com/","msgid":"<20231113223542.11562-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:35:42","name":"bpf: Delayed the removal of the parser enum plugin handler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223542.11562-1-cupertino.miranda@oracle.com/mbox/"},{"id":164657,"url":"https://patchwork.plctlab.org/api/1.2/patches/164657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223638.11660-1-cupertino.miranda@oracle.com/","msgid":"<20231113223638.11660-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:36:38","name":"bpf: Corrected condition in core_mark_as_access_index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223638.11660-1-cupertino.miranda@oracle.com/mbox/"},{"id":164658,"url":"https://patchwork.plctlab.org/api/1.2/patches/164658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223723.11760-1-cupertino.miranda@oracle.com/","msgid":"<20231113223723.11760-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:37:23","name":"bpf: Forces __buildin_memcmp not to generate a call upto 1024 bytes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223723.11760-1-cupertino.miranda@oracle.com/mbox/"},{"id":164659,"url":"https://patchwork.plctlab.org/api/1.2/patches/164659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223739.11844-1-cupertino.miranda@oracle.com/","msgid":"<20231113223739.11844-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:37:39","name":"Fixed problem with BTF defining smaller enums.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223739.11844-1-cupertino.miranda@oracle.com/mbox/"},{"id":164674,"url":"https://patchwork.plctlab.org/api/1.2/patches/164674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113231837.369907-1-xry111@xry111.site/","msgid":"<20231113231837.369907-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-13T23:18:02","name":"LoongArch: Use finer-grained DBAR hints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113231837.369907-1-xry111@xry111.site/mbox/"},{"id":164689,"url":"https://patchwork.plctlab.org/api/1.2/patches/164689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232313.809520-1-jwakely@redhat.com/","msgid":"<20231113232313.809520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T23:22:54","name":"[committed] libstdc++: Micro-optimization for std::optional [PR112480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232313.809520-1-jwakely@redhat.com/mbox/"},{"id":164675,"url":"https://patchwork.plctlab.org/api/1.2/patches/164675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232322.809541-1-jwakely@redhat.com/","msgid":"<20231113232322.809541-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T23:23:14","name":"[committed] libstdc++: Add dg-timeout-factor to remaining IO tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232322.809541-1-jwakely@redhat.com/mbox/"},{"id":164687,"url":"https://patchwork.plctlab.org/api/1.2/patches/164687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114001304.3290842-1-arsen@aarsen.me/","msgid":"<20231114001304.3290842-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-14T00:12:37","name":"[committed] libcpp: Regenerate config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114001304.3290842-1-arsen@aarsen.me/mbox/"},{"id":164693,"url":"https://patchwork.plctlab.org/api/1.2/patches/164693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114005555.2139904-1-hongtao.liu@intel.com/","msgid":"<20231114005555.2139904-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-14T00:55:55","name":"Fix ICE in vectorizable_nonlinear_induction with bitfield.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114005555.2139904-1-hongtao.liu@intel.com/mbox/"},{"id":164710,"url":"https://patchwork.plctlab.org/api/1.2/patches/164710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032116.3273076-1-juzhe.zhong@rivai.ai/","msgid":"<20231114032116.3273076-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:21:16","name":"[Committed] RISC-V: Fix init-2.c assembly check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032116.3273076-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164711,"url":"https://patchwork.plctlab.org/api/1.2/patches/164711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032837.1687779-1-juzhe.zhong@rivai.ai/","msgid":"<20231114032837.1687779-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:28:37","name":"[Commit,QUEUE,V3] RISC-V: Support strided load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032837.1687779-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164713,"url":"https://patchwork.plctlab.org/api/1.2/patches/164713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114033932.1696221-1-juzhe.zhong@rivai.ai/","msgid":"<20231114033932.1696221-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:39:32","name":"DOC/IFN/OPTAB: Add mask_len_strided_load/mask_len_strided_store DOC/OPTAB/IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114033932.1696221-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164715,"url":"https://patchwork.plctlab.org/api/1.2/patches/164715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114034614.1697097-1-juzhe.zhong@rivai.ai/","msgid":"<20231114034614.1697097-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:46:14","name":"VECT: Add MASK_LEN_STRIDED_LOAD/MASK_LEN_STRIDED_STORE into loop vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114034614.1697097-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164743,"url":"https://patchwork.plctlab.org/api/1.2/patches/164743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMfGw8fJRZnO0Fg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T07:17:47","name":"tree: Handle BITINT_TYPE in type_contains_placeholder_1 [PR112511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMfGw8fJRZnO0Fg@tucnak/mbox/"},{"id":164745,"url":"https://patchwork.plctlab.org/api/1.2/patches/164745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMi4s6J4BoYPbJc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T07:33:54","name":"libcpp, contrib: Update to Unicode 15.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMi4s6J4BoYPbJc@tucnak/mbox/"},{"id":164778,"url":"https://patchwork.plctlab.org/api/1.2/patches/164778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114090044.1452311-1-lehua.ding@rivai.ai/","msgid":"<20231114090044.1452311-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-14T09:00:44","name":"x86: Make testcase apx-spill_to_egprs-1.c more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114090044.1452311-1-lehua.ding@rivai.ai/mbox/"},{"id":164796,"url":"https://patchwork.plctlab.org/api/1.2/patches/164796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114094500.8160-1-chenglulu@loongson.cn/","msgid":"<20231114094500.8160-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-14T09:45:01","name":"[v1] LoongArch: Added code generation support for call36 function calls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114094500.8160-1-chenglulu@loongson.cn/mbox/"},{"id":164802,"url":"https://patchwork.plctlab.org/api/1.2/patches/164802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114100320.47373-1-xry111@xry111.site/","msgid":"<20231114100320.47373-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-14T09:59:44","name":"Only allow (copysign x, NEG_CONST) -> (fneg (fabs x)) simplification for constant folding [PR112483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114100320.47373-1-xry111@xry111.site/mbox/"},{"id":164812,"url":"https://patchwork.plctlab.org/api/1.2/patches/164812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de/","msgid":"<36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de>","list_archive_url":null,"date":"2023-11-14T10:15:02","name":"[avr,committed] Libf7: Use paper-pencil algorithm for sqrt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de/mbox/"},{"id":164822,"url":"https://patchwork.plctlab.org/api/1.2/patches/164822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105118.303519-1-krebbel@linux.ibm.com/","msgid":"<20231114105118.303519-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T10:51:18","name":"[Committed] IBM Z: Fix ICE with overloading and checking enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105118.303519-1-krebbel@linux.ibm.com/mbox/"},{"id":164823,"url":"https://patchwork.plctlab.org/api/1.2/patches/164823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105127.303538-1-krebbel@linux.ibm.com/","msgid":"<20231114105127.303538-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T10:51:27","name":"[Committed] IBM Z: Add GTY marker to builtin data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105127.303538-1-krebbel@linux.ibm.com/mbox/"},{"id":164868,"url":"https://patchwork.plctlab.org/api/1.2/patches/164868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114113803.4192929-1-juzhe.zhong@rivai.ai/","msgid":"<20231114113803.4192929-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T11:38:03","name":"RISC-V: Support trailing vec_init optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114113803.4192929-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164871,"url":"https://patchwork.plctlab.org/api/1.2/patches/164871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114114454.557933-2-stefansf@linux.ibm.com/","msgid":"<20231114114454.557933-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T11:44:55","name":"s390: Fix vec_scatter_element for vectors of floats","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114114454.557933-2-stefansf@linux.ibm.com/mbox/"},{"id":164875,"url":"https://patchwork.plctlab.org/api/1.2/patches/164875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115933.833533857342@sourceware.org/","msgid":"<20231114115933.833533857342@sourceware.org>","list_archive_url":null,"date":"2023-11-14T11:59:04","name":"tree-optimization/112281 - loop distribution and zero dependence distances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115933.833533857342@sourceware.org/mbox/"},{"id":164876,"url":"https://patchwork.plctlab.org/api/1.2/patches/164876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115941.5B7D13856DE7@sourceware.org/","msgid":"<20231114115941.5B7D13856DE7@sourceware.org>","list_archive_url":null,"date":"2023-11-14T11:59:16","name":"Loop distribution fix for SCC detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115941.5B7D13856DE7@sourceware.org/mbox/"},{"id":164877,"url":"https://patchwork.plctlab.org/api/1.2/patches/164877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVNi36Ljh1Rhi27B@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T12:06:55","name":"i386: Fix up 3_doubleword_lowpart [PR112523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVNi36Ljh1Rhi27B@tucnak/mbox/"},{"id":164926,"url":"https://patchwork.plctlab.org/api/1.2/patches/164926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141352.F3BC2385840E@sourceware.org/","msgid":"<20231114141352.F3BC2385840E@sourceware.org>","list_archive_url":null,"date":"2023-11-14T14:13:27","name":"tree-optimization/111233 - loop splitting miscompile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141352.F3BC2385840E@sourceware.org/mbox/"},{"id":164942,"url":"https://patchwork.plctlab.org/api/1.2/patches/164942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141455.24465-1-kito.cheng@sifive.com/","msgid":"<20231114141455.24465-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-14T14:14:55","name":"RISC-V: Save/restore ra register correctly [PR112478]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141455.24465-1-kito.cheng@sifive.com/mbox/"},{"id":164943,"url":"https://patchwork.plctlab.org/api/1.2/patches/164943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141513.24515-1-kito.cheng@sifive.com/","msgid":"<20231114141513.24515-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-14T14:15:13","name":"[v2] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141513.24515-1-kito.cheng@sifive.com/mbox/"},{"id":164990,"url":"https://patchwork.plctlab.org/api/1.2/patches/164990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114151958.575444-2-stefansf@linux.ibm.com/","msgid":"<20231114151958.575444-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T15:19:59","name":"s390: Fix builtins floating-point convert to/from fixed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114151958.575444-2-stefansf@linux.ibm.com/mbox/"},{"id":164998,"url":"https://patchwork.plctlab.org/api/1.2/patches/164998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/755c6708-2200-4a22-a065-45b721bf692a@redhat.com/","msgid":"<755c6708-2200-4a22-a065-45b721bf692a@redhat.com>","list_archive_url":null,"date":"2023-11-14T15:33:46","name":"[COMMITTED] PR tree-optimization/112509 - Use case label type to create case range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/755c6708-2200-4a22-a065-45b721bf692a@redhat.com/mbox/"},{"id":165026,"url":"https://patchwork.plctlab.org/api/1.2/patches/165026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114155848.892568-1-jwakely@redhat.com/","msgid":"<20231114155848.892568-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T15:58:29","name":"[committed] libstdc++: Fix std::deque::size() Xmethod [PR112491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114155848.892568-1-jwakely@redhat.com/mbox/"},{"id":165011,"url":"https://patchwork.plctlab.org/api/1.2/patches/165011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114161044.985367-1-ppalka@redhat.com/","msgid":"<20231114161044.985367-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:10:44","name":"c++: decltype of (non-captured variable) [PR83167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114161044.985367-1-ppalka@redhat.com/mbox/"},{"id":165013,"url":"https://patchwork.plctlab.org/api/1.2/patches/165013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163215.3689629-1-dmalcolm@redhat.com/","msgid":"<20231114163215.3689629-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:32:15","name":"[pushed] json: reduce use of naked new in json-building code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163215.3689629-1-dmalcolm@redhat.com/mbox/"},{"id":165014,"url":"https://patchwork.plctlab.org/api/1.2/patches/165014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163219.3689663-1-dmalcolm@redhat.com/","msgid":"<20231114163219.3689663-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:32:19","name":"[pushed] input.h: eliminate implicit users of global_dc'\''s file_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163219.3689663-1-dmalcolm@redhat.com/mbox/"},{"id":165018,"url":"https://patchwork.plctlab.org/api/1.2/patches/165018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163536.1208039-1-ppalka@redhat.com/","msgid":"<20231114163536.1208039-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:35:36","name":"c++: direct enum init from type-dep elt [PR112515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163536.1208039-1-ppalka@redhat.com/mbox/"},{"id":165027,"url":"https://patchwork.plctlab.org/api/1.2/patches/165027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVOwnzHtcJahNKGh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:38:39","name":"c++, v2: Implement C++26 P2864R2 - Remove Deprecated Arithmetic Conversion on Enumerations From C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVOwnzHtcJahNKGh@tucnak/mbox/"},{"id":165033,"url":"https://patchwork.plctlab.org/api/1.2/patches/165033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com/","msgid":"<8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:16","name":"[v2,1/8] Add tests for validating future C permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165034,"url":"https://patchwork.plctlab.org/api/1.2/patches/165034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com/","msgid":"<64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:26","name":"[v2,2/8] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165035,"url":"https://patchwork.plctlab.org/api/1.2/patches/165035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8fa47abb2dcfb91f8707178973db942fdd0f3c2.1699983736.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:50:35","name":"[v2,3/8] c: Turn -Wimplicit-function-declaration into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8fa47abb2dcfb91f8707178973db942fdd0f3c2.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165038,"url":"https://patchwork.plctlab.org/api/1.2/patches/165038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com/","msgid":"<78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:44","name":"[v2,5/8] c: Do not ignore some forms of -Wimplicit-int in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165036,"url":"https://patchwork.plctlab.org/api/1.2/patches/165036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com/","msgid":"<84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:48","name":"[v2,6/8] c: Turn -Wreturn-mismatch into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165037,"url":"https://patchwork.plctlab.org/api/1.2/patches/165037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com/","msgid":"<3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:53","name":"[v2,7/8] c: Turn -Wincompatible-pointer-types into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165039,"url":"https://patchwork.plctlab.org/api/1.2/patches/165039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5f0cb7b4691598e5f61634f08d162f5d7e90d38.1699983736.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:50:58","name":"[v2,8/8] c: Add new -Wdeclaration-missing-parameter-type permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5f0cb7b4691598e5f61634f08d162f5d7e90d38.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165056,"url":"https://patchwork.plctlab.org/api/1.2/patches/165056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191309.3709363-1-dmalcolm@redhat.com/","msgid":"<20231114191309.3709363-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:09","name":"[pushed] diagnostics: convert diagnostic_ready_p to an inline function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191309.3709363-1-dmalcolm@redhat.com/mbox/"},{"id":165057,"url":"https://patchwork.plctlab.org/api/1.2/patches/165057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191313.3709388-1-dmalcolm@redhat.com/","msgid":"<20231114191313.3709388-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:13","name":"[pushed] diagnostics: make m_text_callbacks private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191313.3709388-1-dmalcolm@redhat.com/mbox/"},{"id":165058,"url":"https://patchwork.plctlab.org/api/1.2/patches/165058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191319.3709422-1-dmalcolm@redhat.com/","msgid":"<20231114191319.3709422-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:19","name":"[pushed] diagnostics: make option-handling callbacks private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191319.3709422-1-dmalcolm@redhat.com/mbox/"},{"id":165063,"url":"https://patchwork.plctlab.org/api/1.2/patches/165063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114200014.2394259-1-dimitar@dinux.eu/","msgid":"<20231114200014.2394259-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-11-14T20:00:14","name":"[committed] testsuite: Ignore warning for unsupported option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114200014.2394259-1-dimitar@dinux.eu/mbox/"},{"id":165081,"url":"https://patchwork.plctlab.org/api/1.2/patches/165081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114205638.3720804-1-dmalcolm@redhat.com/","msgid":"<20231114205638.3720804-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T20:56:38","name":"[pushed] analyzer: enable taint state machine by default [PR103533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114205638.3720804-1-dmalcolm@redhat.com/mbox/"},{"id":165087,"url":"https://patchwork.plctlab.org/api/1.2/patches/165087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114210445.1469279-1-ppalka@redhat.com/","msgid":"<20231114210445.1469279-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T21:04:45","name":"c++: partially inst requires-expr in noexcept-spec [PR101043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114210445.1469279-1-ppalka@redhat.com/mbox/"},{"id":165101,"url":"https://patchwork.plctlab.org/api/1.2/patches/165101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114215404.163508-2-xry111@xry111.site/","msgid":"<20231114215404.163508-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-14T21:52:28","name":"[v2] LoongArch: Remove redundant barrier instructions before LL-SC loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114215404.163508-2-xry111@xry111.site/mbox/"},{"id":165107,"url":"https://patchwork.plctlab.org/api/1.2/patches/165107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114220825.22074-4-sebastian.huber@embedded-brains.de/","msgid":"<20231114220825.22074-4-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-14T22:08:24","name":"[3/4] gcov: Add gen_counter_update()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114220825.22074-4-sebastian.huber@embedded-brains.de/mbox/"},{"id":165129,"url":"https://patchwork.plctlab.org/api/1.2/patches/165129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114223251.951537-1-jwakely@redhat.com/","msgid":"<20231114223251.951537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T22:32:21","name":"[committed] libstdc++: Fix std::hash [PR112348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114223251.951537-1-jwakely@redhat.com/mbox/"},{"id":165131,"url":"https://patchwork.plctlab.org/api/1.2/patches/165131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114224539.988344-1-jwakely@redhat.com/","msgid":"<20231114224539.988344-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T22:45:23","name":"[committed] libstdc++: Fix uses of signed types with functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114224539.988344-1-jwakely@redhat.com/mbox/"},{"id":165132,"url":"https://patchwork.plctlab.org/api/1.2/patches/165132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115002128.2143444-1-vineetg@rivosinc.com/","msgid":"<20231115002128.2143444-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T00:21:28","name":"[RESEND,v4] RISC-V: elide unnecessary sign extend when expanding cmp_and_jump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115002128.2143444-1-vineetg@rivosinc.com/mbox/"},{"id":165134,"url":"https://patchwork.plctlab.org/api/1.2/patches/165134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005203.3748210-1-dmalcolm@redhat.com/","msgid":"<20231115005203.3748210-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-15T00:52:03","name":"[pushed] json.cc: use SELFTEST_LOCATION in selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005203.3748210-1-dmalcolm@redhat.com/mbox/"},{"id":165135,"url":"https://patchwork.plctlab.org/api/1.2/patches/165135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005457.3748674-1-dmalcolm@redhat.com/","msgid":"<20231115005457.3748674-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-15T00:54:57","name":"[PATCH/RFC] json.cc: format JSON output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005457.3748674-1-dmalcolm@redhat.com/mbox/"},{"id":165142,"url":"https://patchwork.plctlab.org/api/1.2/patches/165142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115013317.88282-1-patrick@rivosinc.com/","msgid":"<20231115013317.88282-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T01:33:17","name":"RISC-V: Fix ICE in non-canonical march parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115013317.88282-1-patrick@rivosinc.com/mbox/"},{"id":165140,"url":"https://patchwork.plctlab.org/api/1.2/patches/165140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com/","msgid":"<4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T02:24:10","name":"Clean up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com/mbox/"},{"id":165141,"url":"https://patchwork.plctlab.org/api/1.2/patches/165141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com/","msgid":"<87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T02:26:28","name":"Clean up by_pieces_ninsns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com/mbox/"},{"id":165144,"url":"https://patchwork.plctlab.org/api/1.2/patches/165144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd6311b1-9371-4c3f-b023-d3400c70fea6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T03:01:26","name":"rs6000: Only enable PCREL on supported ABIs [PR111045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd6311b1-9371-4c3f-b023-d3400c70fea6@linux.ibm.com/mbox/"},{"id":165145,"url":"https://patchwork.plctlab.org/api/1.2/patches/165145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-1-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:35","name":"[V2,1/3] rs6000: update num_insns_constant for 2 insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-1-guojiufu@linux.ibm.com/mbox/"},{"id":165147,"url":"https://patchwork.plctlab.org/api/1.2/patches/165147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-2-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:36","name":"[V2,2/3] Using pli to split 34bits constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-2-guojiufu@linux.ibm.com/mbox/"},{"id":165146,"url":"https://patchwork.plctlab.org/api/1.2/patches/165146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-3-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:37","name":"[V2,3/3] split complicate constant to memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-3-guojiufu@linux.ibm.com/mbox/"},{"id":165179,"url":"https://patchwork.plctlab.org/api/1.2/patches/165179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115034801.979185-1-pan2.li@intel.com/","msgid":"<20231115034801.979185-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-15T03:48:01","name":"[v1] RISC-V: Refine the mask generation for vec_init case 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115034801.979185-1-pan2.li@intel.com/mbox/"},{"id":165186,"url":"https://patchwork.plctlab.org/api/1.2/patches/165186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115053014.166349-1-tom@tromey.com/","msgid":"<20231115053014.166349-1-tom@tromey.com>","list_archive_url":null,"date":"2023-11-15T05:30:14","name":"Fix crash in libcc1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115053014.166349-1-tom@tromey.com/mbox/"},{"id":165188,"url":"https://patchwork.plctlab.org/api/1.2/patches/165188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115064107.2151843-1-vineetg@rivosinc.com/","msgid":"<20231115064107.2151843-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T06:41:07","name":"RISC-V: fix vsetvli pass testsuite failure [PR/112447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115064107.2151843-1-vineetg@rivosinc.com/mbox/"},{"id":165191,"url":"https://patchwork.plctlab.org/api/1.2/patches/165191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071236.1250103-1-pan2.li@intel.com/","msgid":"<20231115071236.1250103-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-15T07:12:36","name":"[v2] RISC-V: Refine the mask generation for vec_init case 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071236.1250103-1-pan2.li@intel.com/mbox/"},{"id":165192,"url":"https://patchwork.plctlab.org/api/1.2/patches/165192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071508.3273813-1-juzhe.zhong@rivai.ai/","msgid":"<20231115071508.3273813-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-15T07:15:08","name":"RISC-V: Disallow RVV mode address for any load/store[PR112535]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071508.3273813-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165195,"url":"https://patchwork.plctlab.org/api/1.2/patches/165195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVR6Ggrw8q5oUsi7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T07:58:18","name":"[committed] testsuite: Adjust gcc.dg/cpp/if-2.c for 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVR6Ggrw8q5oUsi7@tucnak/mbox/"},{"id":165202,"url":"https://patchwork.plctlab.org/api/1.2/patches/165202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be4a62d2-32eb-eb3b-56de-801d602e364d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T09:01:46","name":"sched: Remove debug counter sched_block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be4a62d2-32eb-eb3b-56de-801d602e364d@linux.ibm.com/mbox/"},{"id":165219,"url":"https://patchwork.plctlab.org/api/1.2/patches/165219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7b0d8fb-64a0-2ed2-f333-06b79133e68f@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T09:16:15","name":"rs6000: New pass to mitigate SP float load perf issue on Power10","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7b0d8fb-64a0-2ed2-f333-06b79133e68f@linux.ibm.com/mbox/"},{"id":165228,"url":"https://patchwork.plctlab.org/api/1.2/patches/165228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094327.3976469-1-hongyu.wang@intel.com/","msgid":"<20231115094327.3976469-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:43:27","name":"[i386] APX: Fix EGPR usage in several patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094327.3976469-1-hongyu.wang@intel.com/mbox/"},{"id":165232,"url":"https://patchwork.plctlab.org/api/1.2/patches/165232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-2-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:50","name":"[01/16,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-2-hongyu.wang@intel.com/mbox/"},{"id":165229,"url":"https://patchwork.plctlab.org/api/1.2/patches/165229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-3-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:51","name":"[02/16,APX,NDD] Restrict TImode register usage when NDD enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-3-hongyu.wang@intel.com/mbox/"},{"id":165235,"url":"https://patchwork.plctlab.org/api/1.2/patches/165235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-4-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:52","name":"[03/16,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-4-hongyu.wang@intel.com/mbox/"},{"id":165230,"url":"https://patchwork.plctlab.org/api/1.2/patches/165230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-5-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:53","name":"[04/16,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-5-hongyu.wang@intel.com/mbox/"},{"id":165238,"url":"https://patchwork.plctlab.org/api/1.2/patches/165238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-6-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:54","name":"[05/16,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-6-hongyu.wang@intel.com/mbox/"},{"id":165231,"url":"https://patchwork.plctlab.org/api/1.2/patches/165231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-7-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:55","name":"[06/16,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-7-hongyu.wang@intel.com/mbox/"},{"id":165239,"url":"https://patchwork.plctlab.org/api/1.2/patches/165239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-8-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:56","name":"[07/16,APX,NDD] Support APX NDD for sbb insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-8-hongyu.wang@intel.com/mbox/"},{"id":165233,"url":"https://patchwork.plctlab.org/api/1.2/patches/165233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-9-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:57","name":"[08/16,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-9-hongyu.wang@intel.com/mbox/"},{"id":165236,"url":"https://patchwork.plctlab.org/api/1.2/patches/165236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-10-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:58","name":"[09/16,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-10-hongyu.wang@intel.com/mbox/"},{"id":165241,"url":"https://patchwork.plctlab.org/api/1.2/patches/165241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-11-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:59","name":"[10/16,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-11-hongyu.wang@intel.com/mbox/"},{"id":165242,"url":"https://patchwork.plctlab.org/api/1.2/patches/165242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-12-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:00","name":"[11/16,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-12-hongyu.wang@intel.com/mbox/"},{"id":165237,"url":"https://patchwork.plctlab.org/api/1.2/patches/165237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-13-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:01","name":"[12/16,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-13-hongyu.wang@intel.com/mbox/"},{"id":165244,"url":"https://patchwork.plctlab.org/api/1.2/patches/165244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-14-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:02","name":"[13/16,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-14-hongyu.wang@intel.com/mbox/"},{"id":165234,"url":"https://patchwork.plctlab.org/api/1.2/patches/165234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-15-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:03","name":"[14/16,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-15-hongyu.wang@intel.com/mbox/"},{"id":165243,"url":"https://patchwork.plctlab.org/api/1.2/patches/165243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-16-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:04","name":"[15/16,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-16-hongyu.wang@intel.com/mbox/"},{"id":165240,"url":"https://patchwork.plctlab.org/api/1.2/patches/165240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-17-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:05","name":"[16/16,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-17-hongyu.wang@intel.com/mbox/"},{"id":165275,"url":"https://patchwork.plctlab.org/api/1.2/patches/165275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115104854.1784462-1-rearnsha@arm.com/","msgid":"<20231115104854.1784462-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-15T10:48:54","name":"[committed] arm: testsuite: fix test for armv6t2 hardware","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115104854.1784462-1-rearnsha@arm.com/mbox/"},{"id":165278,"url":"https://patchwork.plctlab.org/api/1.2/patches/165278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkIHRolM2qc0o4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T10:57:36","name":"[2/4] libsanitizer: Apply local patches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkIHRolM2qc0o4@tucnak/mbox/"},{"id":165279,"url":"https://patchwork.plctlab.org/api/1.2/patches/165279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkgWx1fGtpCl07@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T10:59:13","name":"[3/4] libsanitizer: Adjust the asan/sanity-check-pure-c-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkgWx1fGtpCl07@tucnak/mbox/"},{"id":165280,"url":"https://patchwork.plctlab.org/api/1.2/patches/165280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlPz/p3ZzphPeF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T11:02:23","name":"[4/4] libsanitizer: Readd __ubsan_handle_function_type_mismatch_v1{,_abort}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlPz/p3ZzphPeF@tucnak/mbox/"},{"id":165281,"url":"https://patchwork.plctlab.org/api/1.2/patches/165281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlSHRh9Q1vGvMH@localhost.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-15T11:02:32","name":"[PING,v2] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlSHRh9Q1vGvMH@localhost.localdomain/mbox/"},{"id":165331,"url":"https://patchwork.plctlab.org/api/1.2/patches/165331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113001.1048257-1-jwakely@redhat.com/","msgid":"<20231115113001.1048257-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-15T11:28:38","name":"[committed] libstdc++: std::stacktrace tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113001.1048257-1-jwakely@redhat.com/mbox/"},{"id":165343,"url":"https://patchwork.plctlab.org/api/1.2/patches/165343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113019.1048370-1-jwakely@redhat.com/","msgid":"<20231115113019.1048370-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-15T11:30:03","name":"[committed] libstdc++: Fix std::deque::operator[] Xmethod [PR112491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113019.1048370-1-jwakely@redhat.com/mbox/"},{"id":165321,"url":"https://patchwork.plctlab.org/api/1.2/patches/165321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121204.1B4C5385C410@sourceware.org/","msgid":"<20231115121204.1B4C5385C410@sourceware.org>","list_archive_url":null,"date":"2023-11-15T12:11:35","name":"Fix ICE with SLP and -fdbg-cnt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121204.1B4C5385C410@sourceware.org/mbox/"},{"id":165322,"url":"https://patchwork.plctlab.org/api/1.2/patches/165322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121218.09387385B531@sourceware.org/","msgid":"<20231115121218.09387385B531@sourceware.org>","list_archive_url":null,"date":"2023-11-15T12:11:50","name":"tree-optimization/112282 - wrong-code with ifcvt hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121218.09387385B531@sourceware.org/mbox/"},{"id":165344,"url":"https://patchwork.plctlab.org/api/1.2/patches/165344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131252.25924-1-jchrist@linux.ibm.com/","msgid":"<20231115131252.25924-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:12:52","name":"s390: Fix ICE in testcase pr89233","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131252.25924-1-jchrist@linux.ibm.com/mbox/"},{"id":165345,"url":"https://patchwork.plctlab.org/api/1.2/patches/165345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131519.26144-1-jchrist@linux.ibm.com/","msgid":"<20231115131519.26144-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:15:19","name":"s390: split int128 load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131519.26144-1-jchrist@linux.ibm.com/mbox/"},{"id":165346,"url":"https://patchwork.plctlab.org/api/1.2/patches/165346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131525.26166-1-jchrist@linux.ibm.com/","msgid":"<20231115131525.26166-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:15:25","name":"s390: implement flags output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131525.26166-1-jchrist@linux.ibm.com/mbox/"},{"id":165363,"url":"https://patchwork.plctlab.org/api/1.2/patches/165363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115132949.1726209-1-stefansf@linux.ibm.com/","msgid":"<20231115132949.1726209-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:29:49","name":"s390: Fix generation of s390-gen-builtins.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115132949.1726209-1-stefansf@linux.ibm.com/mbox/"},{"id":165392,"url":"https://patchwork.plctlab.org/api/1.2/patches/165392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com/","msgid":"<8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com>","list_archive_url":null,"date":"2023-11-15T14:09:36","name":"[committed] amdgcn: simplify secondary reload patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com/mbox/"},{"id":165393,"url":"https://patchwork.plctlab.org/api/1.2/patches/165393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd91ab4e-7e7a-46a7-a4df-207b323140b9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T14:10:47","name":"[committed] amdgcn: Add Accelerator VGPR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd91ab4e-7e7a-46a7-a4df-207b323140b9@codesourcery.com/mbox/"},{"id":165399,"url":"https://patchwork.plctlab.org/api/1.2/patches/165399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5rfum3v.fsf@euler.schwinge.homeip.net/","msgid":"<87a5rfum3v.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-15T14:28:36","name":"nvptx: Extend '\''brev'\'' test cases (was: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5rfum3v.fsf@euler.schwinge.homeip.net/mbox/"},{"id":165407,"url":"https://patchwork.plctlab.org/api/1.2/patches/165407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y23ulq5.fsf@euler.schwinge.homeip.net/","msgid":"<875y23ulq5.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-15T14:36:50","name":"nvptx: Fix copy'\''n'\''paste-o in '\''__builtin_nvptx_brev'\'' description (was: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y23ulq5.fsf@euler.schwinge.homeip.net/mbox/"},{"id":165497,"url":"https://patchwork.plctlab.org/api/1.2/patches/165497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com/","msgid":"<4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com>","list_archive_url":null,"date":"2023-11-15T16:51:20","name":"Fortran: fix reallocation on assignment of polymorphic variables [PR110415]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com/mbox/"},{"id":165502,"url":"https://patchwork.plctlab.org/api/1.2/patches/165502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18011-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:02:10","name":"AArch64: only discount MLA for vector and scalar statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18011-tamar@arm.com/mbox/"},{"id":165509,"url":"https://patchwork.plctlab.org/api/1.2/patches/165509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT6y12WEa9cwQqo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:07:23","name":"[2/6] AArch64: Remove special handling of generic cpu.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT6y12WEa9cwQqo@arm.com/mbox/"},{"id":165512,"url":"https://patchwork.plctlab.org/api/1.2/patches/165512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT7EuX7I1X0+xfV@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:08:34","name":"[6/6] AArch64: only emit mismatch error when features would be disabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT7EuX7I1X0+xfV@arm.com/mbox/"},{"id":165525,"url":"https://patchwork.plctlab.org/api/1.2/patches/165525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173706.2159712-1-vineetg@rivosinc.com/","msgid":"<20231115173706.2159712-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T17:37:06","name":"[Committed] RISC-V: elide unnecessary sign extend when expanding cmp_and_jump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173706.2159712-1-vineetg@rivosinc.com/mbox/"},{"id":165540,"url":"https://patchwork.plctlab.org/api/1.2/patches/165540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173913.2159755-1-vineetg@rivosinc.com/","msgid":"<20231115173913.2159755-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T17:39:13","name":"[Committed] RISC-V: fix vsetvli pass testsuite failure [PR/112447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173913.2159755-1-vineetg@rivosinc.com/mbox/"},{"id":165543,"url":"https://patchwork.plctlab.org/api/1.2/patches/165543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115180350.2126787-1-ppalka@redhat.com/","msgid":"<20231115180350.2126787-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-15T18:03:49","name":"c++: constantness of call to function pointer [PR111703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115180350.2126787-1-ppalka@redhat.com/mbox/"},{"id":165545,"url":"https://patchwork.plctlab.org/api/1.2/patches/165545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115182815.98917-1-patrick@rivosinc.com/","msgid":"<20231115182815.98917-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T18:28:15","name":"[Committed] RISC-V: Fix ICE in non-canonical march parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115182815.98917-1-patrick@rivosinc.com/mbox/"},{"id":165560,"url":"https://patchwork.plctlab.org/api/1.2/patches/165560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115193125.1888314-1-mjw@redhat.com/","msgid":"<20231115193125.1888314-1-mjw@redhat.com>","list_archive_url":null,"date":"2023-11-15T19:31:25","name":"[COMMITTED] Regenerate libiberty/aclocal.m4 with aclocal 1.15.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115193125.1888314-1-mjw@redhat.com/mbox/"},{"id":165627,"url":"https://patchwork.plctlab.org/api/1.2/patches/165627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVVFBevWkXfRbaVe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T22:24:05","name":"[v3] c++: fix parsing with auto(x) [PR112410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVVFBevWkXfRbaVe@redhat.com/mbox/"},{"id":165629,"url":"https://patchwork.plctlab.org/api/1.2/patches/165629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115233042.557245-1-ewlu@rivosinc.com/","msgid":"<20231115233042.557245-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T23:30:42","name":"RISC-V: Change unaligned fast/slow/avoid macros to misaligned [PR111557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115233042.557245-1-ewlu@rivosinc.com/mbox/"},{"id":165631,"url":"https://patchwork.plctlab.org/api/1.2/patches/165631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com/","msgid":"<1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T23:50:17","name":"rs6000: Disassemble opaque modes using subregs to allow optimizations [PR109116]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com/mbox/"},{"id":165690,"url":"https://patchwork.plctlab.org/api/1.2/patches/165690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116040907.1647406-1-juzhe.zhong@rivai.ai/","msgid":"<20231116040907.1647406-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-16T04:09:07","name":"VECT: Clear LOOP_VINFO_USING_SELECT_VL_P when loop is not partial vectorized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116040907.1647406-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165698,"url":"https://patchwork.plctlab.org/api/1.2/patches/165698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116053614.3352917-1-hongtao.liu@intel.com/","msgid":"<20231116053614.3352917-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-16T05:36:14","name":"Fix ICE of unrecognizable insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116053614.3352917-1-hongtao.liu@intel.com/mbox/"},{"id":165700,"url":"https://patchwork.plctlab.org/api/1.2/patches/165700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061551.1218932-1-philipp.tomsich@vrull.eu/","msgid":"<20231116061551.1218932-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-11-16T06:15:51","name":"aarch64: costs: update for TARGET_CSSC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061551.1218932-1-philipp.tomsich@vrull.eu/mbox/"},{"id":165701,"url":"https://patchwork.plctlab.org/api/1.2/patches/165701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061607.1218967-1-philipp.tomsich@vrull.eu/","msgid":"<20231116061607.1218967-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-11-16T06:16:07","name":"aarch64: Add support for Ampere-1B (-mcpu=ampere1b) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061607.1218967-1-philipp.tomsich@vrull.eu/mbox/"},{"id":165702,"url":"https://patchwork.plctlab.org/api/1.2/patches/165702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061709.9897-1-xujiahao@loongson.cn/","msgid":"<20231116061709.9897-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T06:17:09","name":"LoongArch: Increase cost of vector aligned store/load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061709.9897-1-xujiahao@loongson.cn/mbox/"},{"id":165712,"url":"https://patchwork.plctlab.org/api/1.2/patches/165712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVW+SSY4R6bixlAJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-16T07:01:29","name":"slp: Fix handling of IFN_CLZ/CTZ [PR112536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVW+SSY4R6bixlAJ@tucnak/mbox/"},{"id":165714,"url":"https://patchwork.plctlab.org/api/1.2/patches/165714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVXBySqtaPRGHAmX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-16T07:16:25","name":"i386: Fix mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi peephole2 [PR112526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVXBySqtaPRGHAmX@tucnak/mbox/"},{"id":165717,"url":"https://patchwork.plctlab.org/api/1.2/patches/165717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116072745.6177-1-chenglulu@loongson.cn/","msgid":"<20231116072745.6177-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-16T07:27:46","name":"[v2] LoongArch: Add code generation support for call36 function calls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116072745.6177-1-chenglulu@loongson.cn/mbox/"},{"id":165719,"url":"https://patchwork.plctlab.org/api/1.2/patches/165719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080113.1250131-1-yangyujie@loongson.cn/","msgid":"<20231116080113.1250131-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-16T08:01:13","name":"libsanitizer: adjust triplet pattern to allow loongarch64-linux* targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080113.1250131-1-yangyujie@loongson.cn/mbox/"},{"id":165735,"url":"https://patchwork.plctlab.org/api/1.2/patches/165735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-1-jwakely@redhat.com/","msgid":"<20231116080314.1218556-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:02:20","name":"[committed,1/2] libstdc++: Adjust feature test in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-1-jwakely@redhat.com/mbox/"},{"id":165720,"url":"https://patchwork.plctlab.org/api/1.2/patches/165720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-2-jwakely@redhat.com/","msgid":"<20231116080314.1218556-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:02:21","name":"[committed,2/2] libstdc++: Use 202100L as feature test check for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-2-jwakely@redhat.com/mbox/"},{"id":165743,"url":"https://patchwork.plctlab.org/api/1.2/patches/165743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-1-jwakely@redhat.com/","msgid":"<20231116081135.1220930-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:11:00","name":"[committed,1/2] libstdc++: Test for feature test macros more accurately","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-1-jwakely@redhat.com/mbox/"},{"id":165742,"url":"https://patchwork.plctlab.org/api/1.2/patches/165742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-2-jwakely@redhat.com/","msgid":"<20231116081135.1220930-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:11:01","name":"[committed,2/2] libstdc++: Only declare feature test macros in standard headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-2-jwakely@redhat.com/mbox/"},{"id":165736,"url":"https://patchwork.plctlab.org/api/1.2/patches/165736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081324.1221069-1-jwakely@redhat.com/","msgid":"<20231116081324.1221069-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:12:39","name":"[committed] libstdc++: Implement std::out_ptr and std::inout_ptr for C++23 [PR111667]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081324.1221069-1-jwakely@redhat.com/mbox/"},{"id":165723,"url":"https://patchwork.plctlab.org/api/1.2/patches/165723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116082744.5839-1-xujiahao@loongson.cn/","msgid":"<20231116082744.5839-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T08:27:44","name":"[1/2] LoongArch: Increase cost of vector aligned store/load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116082744.5839-1-xujiahao@loongson.cn/mbox/"},{"id":165737,"url":"https://patchwork.plctlab.org/api/1.2/patches/165737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e07b1b73-b64d-469a-8d45-3e0e6b967791@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T09:33:39","name":"[V2] tree-optimization: Add register pressure heuristics and appropriate use of profile data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e07b1b73-b64d-469a-8d45-3e0e6b967791@linux.ibm.com/mbox/"},{"id":165744,"url":"https://patchwork.plctlab.org/api/1.2/patches/165744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116100155.2460745-1-yangyujie@loongson.cn/","msgid":"<20231116100155.2460745-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-16T10:01:55","name":"libphobos: Fix static build.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116100155.2460745-1-yangyujie@loongson.cn/mbox/"},{"id":165755,"url":"https://patchwork.plctlab.org/api/1.2/patches/165755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116104710.1279964-1-hongtao.liu@intel.com/","msgid":"<20231116104710.1279964-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-16T10:47:10","name":"[V2] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VCE d))).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116104710.1279964-1-hongtao.liu@intel.com/mbox/"},{"id":165786,"url":"https://patchwork.plctlab.org/api/1.2/patches/165786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120730.1312100-1-stefansf@linux.ibm.com/","msgid":"<20231116120730.1312100-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-16T12:07:30","name":"s390: Streamline NNPA builtins with their LLVM counterparts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120730.1312100-1-stefansf@linux.ibm.com/mbox/"},{"id":165781,"url":"https://patchwork.plctlab.org/api/1.2/patches/165781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120815.23279-1-xujiahao@loongson.cn/","msgid":"<20231116120815.23279-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:08:15","name":"LoongArch: Fix scan-assembler-times of lasx/lsx test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120815.23279-1-xujiahao@loongson.cn/mbox/"},{"id":165788,"url":"https://patchwork.plctlab.org/api/1.2/patches/165788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123004.3731806-1-liwei@loongson.cn/","msgid":"<20231116123004.3731806-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:30:04","name":"[v1] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123004.3731806-1-liwei@loongson.cn/mbox/"},{"id":165789,"url":"https://patchwork.plctlab.org/api/1.2/patches/165789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123109.41084-1-xujiahao@loongson.cn/","msgid":"<20231116123109.41084-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:31:09","name":"LoongArch: Fix scan-assembler-times of lasx/lsx test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123109.41084-1-xujiahao@loongson.cn/mbox/"},{"id":165794,"url":"https://patchwork.plctlab.org/api/1.2/patches/165794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce3c556f-a63e-4328-bab3-6530126f5187@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T13:01:38","name":"Fortran: Accept -std=f2023 support, update line-length for Fortran 2023","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce3c556f-a63e-4328-bab3-6530126f5187@codesourcery.com/mbox/"},{"id":165806,"url":"https://patchwork.plctlab.org/api/1.2/patches/165806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-3-xry111@xry111.site/","msgid":"<20231116131836.504699-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:33","name":"[1/5] LoongArch: Switch loongarch-def to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-3-xry111@xry111.site/mbox/"},{"id":165805,"url":"https://patchwork.plctlab.org/api/1.2/patches/165805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-4-xry111@xry111.site/","msgid":"<20231116131836.504699-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:34","name":"[2/5] LoongArch: genopts: Add infrastructure to generate code for new features in ISA evolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-4-xry111@xry111.site/mbox/"},{"id":165803,"url":"https://patchwork.plctlab.org/api/1.2/patches/165803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-5-xry111@xry111.site/","msgid":"<20231116131836.504699-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:35","name":"[3/5] LoongArch: Take the advantage of -mdiv32 if it'\''s enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-5-xry111@xry111.site/mbox/"},{"id":165804,"url":"https://patchwork.plctlab.org/api/1.2/patches/165804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-6-xry111@xry111.site/","msgid":"<20231116131836.504699-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:36","name":"[4/5] LoongArch: Don'\''t emit dbar 0x700 if -mld-seq-sa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-6-xry111@xry111.site/mbox/"},{"id":165807,"url":"https://patchwork.plctlab.org/api/1.2/patches/165807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-7-xry111@xry111.site/","msgid":"<20231116131836.504699-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:37","name":"[5/5] LoongArch: Add -march=la664 and -mtune=la664","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-7-xry111@xry111.site/mbox/"},{"id":165809,"url":"https://patchwork.plctlab.org/api/1.2/patches/165809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116133643.3989600-1-dmalcolm@redhat.com/","msgid":"<20231116133643.3989600-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:36:43","name":"[pushed] diagnostics: make m_lang_mask private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116133643.3989600-1-dmalcolm@redhat.com/mbox/"},{"id":165819,"url":"https://patchwork.plctlab.org/api/1.2/patches/165819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-1-jwakely@redhat.com/","msgid":"<20231116134736.1287539-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:45:37","name":"[1/2] libstdc++: Atomic wait/notify ABI stabilization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-1-jwakely@redhat.com/mbox/"},{"id":165853,"url":"https://patchwork.plctlab.org/api/1.2/patches/165853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-2-jwakely@redhat.com/","msgid":"<20231116134736.1287539-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:45:38","name":"[2/2] libstdc++: Pass __wait_args to internal API by const pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-2-jwakely@redhat.com/mbox/"},{"id":165831,"url":"https://patchwork.plctlab.org/api/1.2/patches/165831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8a1rdwy.fsf@oldenburg.str.redhat.com/","msgid":"<87v8a1rdwy.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-16T14:06:05","name":"[COMMITTED] gcc.c-torture/execute/931004-13.c: Fix declaration of main","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8a1rdwy.fsf@oldenburg.str.redhat.com/mbox/"},{"id":165837,"url":"https://patchwork.plctlab.org/api/1.2/patches/165837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-2-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:55","name":"[1/4] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-2-dmalcolm@redhat.com/mbox/"},{"id":165842,"url":"https://patchwork.plctlab.org/api/1.2/patches/165842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-3-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:56","name":"[2/4] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-3-dmalcolm@redhat.com/mbox/"},{"id":165840,"url":"https://patchwork.plctlab.org/api/1.2/patches/165840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-4-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:57","name":"[3/4] opts: add logic to generate options-urls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-4-dmalcolm@redhat.com/mbox/"},{"id":165839,"url":"https://patchwork.plctlab.org/api/1.2/patches/165839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-5-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:58","name":"[4/4] options: wire up options-urls.cc into gcc_urlifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-5-dmalcolm@redhat.com/mbox/"},{"id":165854,"url":"https://patchwork.plctlab.org/api/1.2/patches/165854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-1-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:12","name":"[1/6] arm: Fix arm_simd_types and MVE scalar_types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-1-christophe.lyon@linaro.org/mbox/"},{"id":165856,"url":"https://patchwork.plctlab.org/api/1.2/patches/165856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-2-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:13","name":"[2/6] arm: [MVE intrinsics] Add support for void and load/store pointers as argument types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-2-christophe.lyon@linaro.org/mbox/"},{"id":165858,"url":"https://patchwork.plctlab.org/api/1.2/patches/165858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-3-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:14","name":"[3/6] arm: [MVE intrinsics] Add support for contiguous loads and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-3-christophe.lyon@linaro.org/mbox/"},{"id":165855,"url":"https://patchwork.plctlab.org/api/1.2/patches/165855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-4-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:15","name":"[4/6] arm: [MVE intrinsics] add load and store shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-4-christophe.lyon@linaro.org/mbox/"},{"id":165857,"url":"https://patchwork.plctlab.org/api/1.2/patches/165857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-5-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:16","name":"[5/6] arm: [MVE intrinsics] fix vst1 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-5-christophe.lyon@linaro.org/mbox/"},{"id":165859,"url":"https://patchwork.plctlab.org/api/1.2/patches/165859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-6-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:17","name":"[6/6] arm: [MVE intrinsics] rework vldq1 vst1q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-6-christophe.lyon@linaro.org/mbox/"},{"id":165883,"url":"https://patchwork.plctlab.org/api/1.2/patches/165883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116155108.2207222-1-ppalka@redhat.com/","msgid":"<20231116155108.2207222-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-16T15:51:07","name":"[pushed] c++: add fixed testcases [PR98614, PR104802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116155108.2207222-1-ppalka@redhat.com/mbox/"},{"id":165898,"url":"https://patchwork.plctlab.org/api/1.2/patches/165898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-16T16:49:55","name":"sra: SRA of non-escaped aggregates passed by reference to calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":165901,"url":"https://patchwork.plctlab.org/api/1.2/patches/165901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/jghdu6aruqa5acmjpeb32o2tskao4t27c6xcyt7vfhj4cnxare@4vxlgjyirna4/","msgid":"","list_archive_url":null,"date":"2023-11-16T17:15:34","name":"[COMMITTED] Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/jghdu6aruqa5acmjpeb32o2tskao4t27c6xcyt7vfhj4cnxare@4vxlgjyirna4/mbox/"},{"id":165908,"url":"https://patchwork.plctlab.org/api/1.2/patches/165908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZXWV_WT5f9H4v5@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-16T17:54:33","name":"[committed] hppa: Revise REG+D address support to allow long displacements before reload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZXWV_WT5f9H4v5@mx3210.localdomain/mbox/"},{"id":165910,"url":"https://patchwork.plctlab.org/api/1.2/patches/165910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaRu6BvaxQVqJ4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:07:02","name":"[02/11] rtl-ssa: Add some helpers for removing accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaRu6BvaxQVqJ4@arm.com/mbox/"},{"id":165911,"url":"https://patchwork.plctlab.org/api/1.2/patches/165911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaXJY/K04w2ojw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:07:24","name":"[03/11] aarch64, testsuite: Fix up auto-init-padding tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaXJY/K04w2ojw@arm.com/mbox/"},{"id":165915,"url":"https://patchwork.plctlab.org/api/1.2/patches/165915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbB0KHxzDkN0ci@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:10:15","name":"[09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbB0KHxzDkN0ci@arm.com/mbox/"},{"id":165917,"url":"https://patchwork.plctlab.org/api/1.2/patches/165917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbYrRa/M+jTFcm@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:11:46","name":"[11/11] aarch64: Use individual loads/stores for mem{cpy,set} expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbYrRa/M+jTFcm@arm.com/mbox/"},{"id":165938,"url":"https://patchwork.plctlab.org/api/1.2/patches/165938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVaAylotDULKTs/N@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T20:51:22","name":"[v5] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVaAylotDULKTs/N@redhat.com/mbox/"},{"id":165942,"url":"https://patchwork.plctlab.org/api/1.2/patches/165942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at/","msgid":"<3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-16T21:38:08","name":"[1/4] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at/mbox/"},{"id":165943,"url":"https://patchwork.plctlab.org/api/1.2/patches/165943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb7bd855a76bcf89b5b0823882a8ec0d828c7291.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-16T21:38:47","name":"[2/4] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb7bd855a76bcf89b5b0823882a8ec0d828c7291.camel@tugraz.at/mbox/"},{"id":165944,"url":"https://patchwork.plctlab.org/api/1.2/patches/165944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at/","msgid":"<223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-16T21:39:26","name":"[3/4] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at/mbox/"},{"id":165945,"url":"https://patchwork.plctlab.org/api/1.2/patches/165945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e926b4d4153c5feb41a22ba10f54f571bc38a19b.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-16T21:40:09","name":"[4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e926b4d4153c5feb41a22ba10f54f571bc38a19b.camel@tugraz.at/mbox/"},{"id":165947,"url":"https://patchwork.plctlab.org/api/1.2/patches/165947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/531885fa576a672454e6630549858842588c800e.camel@zoho.com/","msgid":"<531885fa576a672454e6630549858842588c800e.camel@zoho.com>","list_archive_url":null,"date":"2023-11-16T22:28:05","name":"libgccjit: Fix ira cost segfault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/531885fa576a672454e6630549858842588c800e.camel@zoho.com/mbox/"},{"id":165953,"url":"https://patchwork.plctlab.org/api/1.2/patches/165953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7ffe995942c43dd8f462b16d234e475a73e4e86.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T22:36:36","name":"libgccjit Fix a RTL bug for libgccjit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7ffe995942c43dd8f462b16d234e475a73e4e86.camel@zoho.com/mbox/"},{"id":165965,"url":"https://patchwork.plctlab.org/api/1.2/patches/165965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-1-hongtao.liu@intel.com/","msgid":"<20231117000934.2301995-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T00:09:33","name":"[1/2] Support reduc_{plus, xor, and, ior}_scal_m for vector integer mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-1-hongtao.liu@intel.com/mbox/"},{"id":165964,"url":"https://patchwork.plctlab.org/api/1.2/patches/165964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-2-hongtao.liu@intel.com/","msgid":"<20231117000934.2301995-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T00:09:34","name":"[2/2] Add i?86-*-* and x86_64-*-* to vect_logical_reduc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-2-hongtao.liu@intel.com/mbox/"},{"id":165976,"url":"https://patchwork.plctlab.org/api/1.2/patches/165976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117023802.476523-1-liwei@loongson.cn/","msgid":"<20231117023802.476523-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-17T02:38:02","name":"[v2] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117023802.476523-1-liwei@loongson.cn/mbox/"},{"id":165977,"url":"https://patchwork.plctlab.org/api/1.2/patches/165977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com/","msgid":"<408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-17T02:53:05","name":"[v2,2/5] c-family: Simplify attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com/mbox/"},{"id":165978,"url":"https://patchwork.plctlab.org/api/1.2/patches/165978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com/","msgid":"<10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-17T02:54:17","name":"[v2,3/5] ada: Improve attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com/mbox/"},{"id":165980,"url":"https://patchwork.plctlab.org/api/1.2/patches/165980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117044319.3912782-1-juzhe.zhong@rivai.ai/","msgid":"<20231117044319.3912782-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T04:43:19","name":"RISC-V: Optimize VLA SLP with duplicate VLA shuffle indice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117044319.3912782-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165983,"url":"https://patchwork.plctlab.org/api/1.2/patches/165983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051058.535141-1-hongtao.liu@intel.com/","msgid":"<20231117051058.535141-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T05:10:58","name":"Support cbranchm for Vector HI/QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051058.535141-1-hongtao.liu@intel.com/mbox/"},{"id":165984,"url":"https://patchwork.plctlab.org/api/1.2/patches/165984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051232.10396-1-xuli1@eswincomputing.com/","msgid":"<20231117051232.10396-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-17T05:12:32","name":"RISC-V: Implement -mmemcpy-strategy= options[PR112537]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051232.10396-1-xuli1@eswincomputing.com/mbox/"},{"id":165990,"url":"https://patchwork.plctlab.org/api/1.2/patches/165990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117063640.1242505-1-yangyujie@loongson.cn/","msgid":"<20231117063640.1242505-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-17T06:36:40","name":"LoongArch: Fix eh_return epilogue for normal returns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117063640.1242505-1-yangyujie@loongson.cn/mbox/"},{"id":166001,"url":"https://patchwork.plctlab.org/api/1.2/patches/166001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f97dabfe-37f9-4b83-b293-64d0421782a4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T07:25:23","name":"[V12] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f97dabfe-37f9-4b83-b293-64d0421782a4@linux.ibm.com/mbox/"},{"id":166002,"url":"https://patchwork.plctlab.org/api/1.2/patches/166002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117072548.3543202-1-hongyu.wang@intel.com/","msgid":"<20231117072548.3543202-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-17T07:25:48","name":"[APX,PPX] Support Intel APX PPX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117072548.3543202-1-hongyu.wang@intel.com/mbox/"},{"id":166005,"url":"https://patchwork.plctlab.org/api/1.2/patches/166005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117073549.1841897-1-juzhe.zhong@rivai.ai/","msgid":"<20231117073549.1841897-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T07:35:49","name":"RISC-V: Fix bug of tuple move splitter[PR112561]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117073549.1841897-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166006,"url":"https://patchwork.plctlab.org/api/1.2/patches/166006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com/","msgid":"<2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com>","list_archive_url":null,"date":"2023-11-17T07:46:40","name":"[V3] tree-optimization: Add register pressure heuristics and appropriate use of profile data.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com/mbox/"},{"id":166926,"url":"https://patchwork.plctlab.org/api/1.2/patches/166926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117090021.16805-1-xujiahao@loongson.cn/","msgid":"<20231117090021.16805-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-17T09:00:21","name":"LoongArch: Add support for xorsign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117090021.16805-1-xujiahao@loongson.cn/mbox/"},{"id":166148,"url":"https://patchwork.plctlab.org/api/1.2/patches/166148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/69673087-0686-4642-adaf-70d40c08db6c@gjlay.de/","msgid":"<69673087-0686-4642-adaf-70d40c08db6c@gjlay.de>","list_archive_url":null,"date":"2023-11-17T12:21:12","name":"[avr,committed] PR target/53372: Don'\''t ignore section attribute with address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/69673087-0686-4642-adaf-70d40c08db6c@gjlay.de/mbox/"},{"id":166178,"url":"https://patchwork.plctlab.org/api/1.2/patches/166178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdsZJor+tYlrQKm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T13:36:36","name":"vect: Fix check_reduction_path [PR112374]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdsZJor+tYlrQKm@tucnak/mbox/"},{"id":166179,"url":"https://patchwork.plctlab.org/api/1.2/patches/166179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdu8BjuGofK3TeU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T13:47:28","name":"match.pd: Optimize ctz/popcount/parity/ffs on extended argument [PR112566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdu8BjuGofK3TeU@tucnak/mbox/"},{"id":166180,"url":"https://patchwork.plctlab.org/api/1.2/patches/166180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117134800.1004906-1-juzhe.zhong@rivai.ai/","msgid":"<20231117134800.1004906-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T13:48:00","name":"[V2] RISC-V: Fix bug of tuple move splitter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117134800.1004906-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166181,"url":"https://patchwork.plctlab.org/api/1.2/patches/166181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de/","msgid":"<20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-17T13:50:55","name":"tree-optimization/112585 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de/mbox/"},{"id":166182,"url":"https://patchwork.plctlab.org/api/1.2/patches/166182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdyIFfKpN9rkOWh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T14:01:04","name":"tree-ssa-math-opts: popcount (X) == 1 to (X ^ (X - 1)) > (X - 1) optimization [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdyIFfKpN9rkOWh@tucnak/mbox/"},{"id":166183,"url":"https://patchwork.plctlab.org/api/1.2/patches/166183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdy3Dpq5YryeUpb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T14:04:12","name":"middle-end, v2: Add new value for vector types for __builtin_classify_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdy3Dpq5YryeUpb@tucnak/mbox/"},{"id":166237,"url":"https://patchwork.plctlab.org/api/1.2/patches/166237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144156.1469262-1-jwakely@redhat.com/","msgid":"<20231117144156.1469262-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:41:43","name":"[committed] libstdc++: Fix Doxygen markup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144156.1469262-1-jwakely@redhat.com/mbox/"},{"id":166240,"url":"https://patchwork.plctlab.org/api/1.2/patches/166240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144838.1478158-1-jwakely@redhat.com/","msgid":"<20231117144838.1478158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:48:19","name":"[committed] libstdc++: Add more Doxygen comments and another test for std::out_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144838.1478158-1-jwakely@redhat.com/mbox/"},{"id":166250,"url":"https://patchwork.plctlab.org/api/1.2/patches/166250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144911.1481829-1-jwakely@redhat.com/","msgid":"<20231117144911.1481829-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:49:05","name":"[committed] libstdc++: Adjust std::in_range template parameter name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144911.1481829-1-jwakely@redhat.com/mbox/"},{"id":166218,"url":"https://patchwork.plctlab.org/api/1.2/patches/166218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf541jy9.fsf@euler.schwinge.homeip.net/","msgid":"<87sf541jy9.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-17T15:24:46","name":"Add '\''libgomp.c++/static-local-variable-1.C'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf541jy9.fsf@euler.schwinge.homeip.net/mbox/"},{"id":166259,"url":"https://patchwork.plctlab.org/api/1.2/patches/166259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117153138.1510158-1-jwakely@redhat.com/","msgid":"<20231117153138.1510158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:29:17","name":"[committed] libstdc++: Define C++26 saturation arithmetic functions (P0543R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117153138.1510158-1-jwakely@redhat.com/mbox/"},{"id":166274,"url":"https://patchwork.plctlab.org/api/1.2/patches/166274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117154139.1510875-1-jwakely@redhat.com/","msgid":"<20231117154139.1510875-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:41:29","name":"[committed] libstdc++: Regenerate config.h.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117154139.1510875-1-jwakely@redhat.com/mbox/"},{"id":166275,"url":"https://patchwork.plctlab.org/api/1.2/patches/166275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155300.1513586-1-jwakely@redhat.com/","msgid":"<20231117155300.1513586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:49:47","name":"libstdc++: Define std::ranges::to for C++23 (P1206R7) [PR111055]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155300.1513586-1-jwakely@redhat.com/mbox/"},{"id":166238,"url":"https://patchwork.plctlab.org/api/1.2/patches/166238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155420.1513704-1-jwakely@redhat.com/","msgid":"<20231117155420.1513704-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:53:15","name":"libstdc++: Add fast path for std::format(\"{}\", x) [PR110801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155420.1513704-1-jwakely@redhat.com/mbox/"},{"id":166276,"url":"https://patchwork.plctlab.org/api/1.2/patches/166276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-1-jwakely@redhat.com/","msgid":"<20231117160320.1513815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:54:38","name":"[1/2] libstdc++: Implement C++23 header [PR107760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-1-jwakely@redhat.com/mbox/"},{"id":166239,"url":"https://patchwork.plctlab.org/api/1.2/patches/166239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-2-jwakely@redhat.com/","msgid":"<20231117160320.1513815-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:54:39","name":"[2/2] libstdc++: Ensure valid UTF-8 in std::vprint_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-2-jwakely@redhat.com/mbox/"},{"id":166281,"url":"https://patchwork.plctlab.org/api/1.2/patches/166281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rcqnyq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T17:38:53","name":"[1/5] aarch64: Add +sme2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rcqnyq.fsf@arm.com/mbox/"},{"id":166315,"url":"https://patchwork.plctlab.org/api/1.2/patches/166315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz/","msgid":"<81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:16:37","name":"[1/7] lto: Skip flag OPT_fltrans_output_list_.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz/mbox/"},{"id":166316,"url":"https://patchwork.plctlab.org/api/1.2/patches/166316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz/","msgid":"<1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:16:52","name":"[2/7] lto: Remove random_seed from section name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz/mbox/"},{"id":166318,"url":"https://patchwork.plctlab.org/api/1.2/patches/166318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0af7bafad94bf9d146be76842d41fadfe24be23.1700222403.git.mjires@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-11-17T20:17:01","name":"[3/7] Lockfile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0af7bafad94bf9d146be76842d41fadfe24be23.1700222403.git.mjires@suse.cz/mbox/"},{"id":166317,"url":"https://patchwork.plctlab.org/api/1.2/patches/166317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz/","msgid":"<788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:11","name":"[4/7] lto: Implement ltrans cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz/mbox/"},{"id":166321,"url":"https://patchwork.plctlab.org/api/1.2/patches/166321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz/","msgid":"<6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:18","name":"[5/7] lto: Implement cache partitioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz/mbox/"},{"id":166327,"url":"https://patchwork.plctlab.org/api/1.2/patches/166327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz/","msgid":"<1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:26","name":"[6/7] lto: squash order of symbols in partitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz/mbox/"},{"id":166329,"url":"https://patchwork.plctlab.org/api/1.2/patches/166329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz/","msgid":"<7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:34","name":"[7/7] lto: partition specific lto_clone_numbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz/mbox/"},{"id":166331,"url":"https://patchwork.plctlab.org/api/1.2/patches/166331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-3-xry111@xry111.site/","msgid":"<20231117204323.453536-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:19","name":"[v2,2/6] LoongArch: genopts: Add infrastructure to generate code for new features in ISA evolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-3-xry111@xry111.site/mbox/"},{"id":166335,"url":"https://patchwork.plctlab.org/api/1.2/patches/166335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-4-xry111@xry111.site/","msgid":"<20231117204323.453536-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:20","name":"[v2,3/6] LoongArch: Add evolution features of base ISA revisions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-4-xry111@xry111.site/mbox/"},{"id":166334,"url":"https://patchwork.plctlab.org/api/1.2/patches/166334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-5-xry111@xry111.site/","msgid":"<20231117204323.453536-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:21","name":"[v2,4/6] LoongArch: Take the advantage of -mdiv32 if it'\''s enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-5-xry111@xry111.site/mbox/"},{"id":166332,"url":"https://patchwork.plctlab.org/api/1.2/patches/166332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-6-xry111@xry111.site/","msgid":"<20231117204323.453536-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:22","name":"[v2,5/6] LoongArch: Don'\''t emit dbar 0x700 if -mld-seq-sa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-6-xry111@xry111.site/mbox/"},{"id":166333,"url":"https://patchwork.plctlab.org/api/1.2/patches/166333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-7-xry111@xry111.site/","msgid":"<20231117204323.453536-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:23","name":"[v2,6/6] LoongArch: Add fine-grained control for LAM_BH and LAMCAS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-7-xry111@xry111.site/mbox/"},{"id":166336,"url":"https://patchwork.plctlab.org/api/1.2/patches/166336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204818.454828-3-xry111@xry111.site/","msgid":"<20231117204818.454828-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:48:20","name":"LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204818.454828-3-xry111@xry111.site/mbox/"},{"id":166402,"url":"https://patchwork.plctlab.org/api/1.2/patches/166402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117214610.173872-1-polacek@redhat.com/","msgid":"<20231117214610.173872-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-11-17T21:46:10","name":"c++: P2280R4, Using unknown refs in constant expr [PR106650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117214610.173872-1-polacek@redhat.com/mbox/"},{"id":166416,"url":"https://patchwork.plctlab.org/api/1.2/patches/166416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fedb53cc48e2062a25d9ba401f96735f42b0e9c8.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T22:36:50","name":"libgccjit: Add vector permutation and vector access operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fedb53cc48e2062a25d9ba401f96735f42b0e9c8.camel@zoho.com/mbox/"},{"id":166419,"url":"https://patchwork.plctlab.org/api/1.2/patches/166419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118010347.39147-1-dmalcolm@redhat.com/","msgid":"<20231118010347.39147-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-18T01:03:47","name":"[pushed] analyzer: new warning: -Wanalyzer-infinite-loop [PR106147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118010347.39147-1-dmalcolm@redhat.com/mbox/"},{"id":166431,"url":"https://patchwork.plctlab.org/api/1.2/patches/166431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031149.1010835-1-juzhe.zhong@rivai.ai/","msgid":"<20231118031149.1010835-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-18T03:11:49","name":"RISC-V: Refactor RVV iterators[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031149.1010835-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166432,"url":"https://patchwork.plctlab.org/api/1.2/patches/166432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031513.31109-1-chenglulu@loongson.cn/","msgid":"<20231118031513.31109-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-18T03:15:13","name":"LoongArch: Modify MUSL_DYNAMIC_LINKER.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031513.31109-1-chenglulu@loongson.cn/mbox/"},{"id":166457,"url":"https://patchwork.plctlab.org/api/1.2/patches/166457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118065916.14855-1-guojie@loongson.cn/","msgid":"<20231118065916.14855-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-18T06:59:16","name":"LoongArch: Optimize the loading of immediate numbers with the same high and low 32-bit values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118065916.14855-1-guojie@loongson.cn/mbox/"},{"id":166470,"url":"https://patchwork.plctlab.org/api/1.2/patches/166470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com/","msgid":"<1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com>","list_archive_url":null,"date":"2023-11-18T08:36:14","name":"tree-optimization: Add register pressure in LICM at tree-ssa level optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com/mbox/"},{"id":166481,"url":"https://patchwork.plctlab.org/api/1.2/patches/166481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZViRqiN7i3waSY2v@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T10:27:54","name":"tree-ssa-math-opts: popcount (X) == 1 to (X ^ (X - 1)) > (X - 1) optimization for direct optab [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZViRqiN7i3waSY2v@tucnak/mbox/"},{"id":166494,"url":"https://patchwork.plctlab.org/api/1.2/patches/166494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118104248.11513-1-kito.cheng@sifive.com/","msgid":"<20231118104248.11513-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-18T10:42:48","name":"[committed] RISC-V: Fix mismatched new delete for unique_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118104248.11513-1-kito.cheng@sifive.com/mbox/"},{"id":166584,"url":"https://patchwork.plctlab.org/api/1.2/patches/166584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171637280.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-18T16:50:43","name":"[13/44] RISC-V/testsuite: Add branchless cases for FP cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171637280.5892@tpp.orcam.me.uk/mbox/"},{"id":166608,"url":"https://patchwork.plctlab.org/api/1.2/patches/166608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118174554.25661-2-xry111@xry111.site/","msgid":"<20231118174554.25661-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-18T17:45:55","name":"LoongArch: Fix \"-mexplict-relocs=none -mcmodel=medium\" producing %call36 when the assembler does not support it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118174554.25661-2-xry111@xry111.site/mbox/"},{"id":166649,"url":"https://patchwork.plctlab.org/api/1.2/patches/166649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118195008.579211-1-arsen@aarsen.me/","msgid":"<20231118195008.579211-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-18T18:46:56","name":"libstdc++: implement std::generator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118195008.579211-1-arsen@aarsen.me/mbox/"},{"id":166626,"url":"https://patchwork.plctlab.org/api/1.2/patches/166626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkQ8KJMpceSkrbj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:30:56","name":"c-family, middle-end: Add __builtin_c[lt]zg (arg, 0ULL) exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkQ8KJMpceSkrbj@tucnak/mbox/"},{"id":166647,"url":"https://patchwork.plctlab.org/api/1.2/patches/166647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkSgmHeKHwnznyf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:37:38","name":"c: Add __builtin_bit_complement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkSgmHeKHwnznyf@tucnak/mbox/"},{"id":166648,"url":"https://patchwork.plctlab.org/api/1.2/patches/166648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkTsF8twXnINNrz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:42:40","name":"c: Add __builtin_stdc_bit_{width,floor,ceil} builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkTsF8twXnINNrz@tucnak/mbox/"},{"id":166650,"url":"https://patchwork.plctlab.org/api/1.2/patches/166650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c179e0ea10f1d14b56ada367b0cda0fafe5b5632.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:12:32","name":"[1/4] c: runtime checking for assigment of VM types 1/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c179e0ea10f1d14b56ada367b0cda0fafe5b5632.camel@tugraz.at/mbox/"},{"id":166651,"url":"https://patchwork.plctlab.org/api/1.2/patches/166651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at/","msgid":"<2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-18T21:13:03","name":"[2/4] c: runtime checking for assigment of VM types 2/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at/mbox/"},{"id":166652,"url":"https://patchwork.plctlab.org/api/1.2/patches/166652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at/","msgid":"<5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-18T21:13:44","name":"[3/4] c: runtime checking for assigment of VM types 3/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at/mbox/"},{"id":166653,"url":"https://patchwork.plctlab.org/api/1.2/patches/166653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec98368eda9967482368e0bdf0cfb7ed7790c3c3.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:14:17","name":"[4/4] c: runtime checking for assigment of VM types 4/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec98368eda9967482368e0bdf0cfb7ed7790c3c3.camel@tugraz.at/mbox/"},{"id":166654,"url":"https://patchwork.plctlab.org/api/1.2/patches/166654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqQpP8SQeLwAgsmXDt47dFL5MTxLOpx73wGjSy7-7jnmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:42:02","name":"RFA: RISC-V: Add support for XCVhwlp extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqQpP8SQeLwAgsmXDt47dFL5MTxLOpx73wGjSy7-7jnmg@mail.gmail.com/mbox/"},{"id":166656,"url":"https://patchwork.plctlab.org/api/1.2/patches/166656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214432.1636488-1-jwakely@redhat.com/","msgid":"<20231118214432.1636488-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-18T21:44:02","name":"[committed,v2] libstdc++: Add fast path for std::format(\"{}\", x) [PR110801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214432.1636488-1-jwakely@redhat.com/mbox/"},{"id":166657,"url":"https://patchwork.plctlab.org/api/1.2/patches/166657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214511.1636561-1-jwakely@redhat.com/","msgid":"<20231118214511.1636561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-18T21:44:36","name":"[committed] libstdc++: Check string value_type in std::make_format_args [PR112607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214511.1636561-1-jwakely@redhat.com/mbox/"},{"id":166658,"url":"https://patchwork.plctlab.org/api/1.2/patches/166658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVljEevbGcssSuh8@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-19T01:21:21","name":"Propagate value ranges of return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVljEevbGcssSuh8@kam.mff.cuni.cz/mbox/"},{"id":166659,"url":"https://patchwork.plctlab.org/api/1.2/patches/166659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014318.203251-1-dmalcolm@redhat.com/","msgid":"<20231119014318.203251-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-19T01:43:18","name":"[pushed] analyzer: new warning: -Wanalyzer-undefined-behavior-strtok [PR107573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014318.203251-1-dmalcolm@redhat.com/mbox/"},{"id":166660,"url":"https://patchwork.plctlab.org/api/1.2/patches/166660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014533.1838815-1-juzhe.zhong@rivai.ai/","msgid":"<20231119014533.1838815-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-19T01:45:33","name":"[Committed,V3] RISC-V: Fix bug of tuple move splitter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014533.1838815-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166673,"url":"https://patchwork.plctlab.org/api/1.2/patches/166673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171317470.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:21","name":"[01/44] testsuite: Add cases for conditional-move and conditional-add operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171317470.5892@tpp.orcam.me.uk/mbox/"},{"id":166674,"url":"https://patchwork.plctlab.org/api/1.2/patches/166674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171344110.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:39","name":"[02/44] RISC-V/testsuite: Add cases for integer SFB cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171344110.5892@tpp.orcam.me.uk/mbox/"},{"id":166675,"url":"https://patchwork.plctlab.org/api/1.2/patches/166675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171356430.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:53","name":"[03/44] RISC-V: Reorder comment on SFB patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171356430.5892@tpp.orcam.me.uk/mbox/"},{"id":166676,"url":"https://patchwork.plctlab.org/api/1.2/patches/166676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171401210.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:03","name":"[04/44] RISC-V: Sanitise NEED_EQ_NE_P case with `riscv_emit_int_compare'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171401210.5892@tpp.orcam.me.uk/mbox/"},{"id":166677,"url":"https://patchwork.plctlab.org/api/1.2/patches/166677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171416130.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:12","name":"[05/44] RISC-V: Fix `mode'\'' usage in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171416130.5892@tpp.orcam.me.uk/mbox/"},{"id":166678,"url":"https://patchwork.plctlab.org/api/1.2/patches/166678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171423450.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:21","name":"[06/44] RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171423450.5892@tpp.orcam.me.uk/mbox/"},{"id":166680,"url":"https://patchwork.plctlab.org/api/1.2/patches/166680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171447330.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:31","name":"[07/44] RISC-V: Use `nullptr'\'' in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171447330.5892@tpp.orcam.me.uk/mbox/"},{"id":166679,"url":"https://patchwork.plctlab.org/api/1.2/patches/166679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171455150.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:41","name":"[08/44] RISC-V: Simplify EQ vs NE selection in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171455150.5892@tpp.orcam.me.uk/mbox/"},{"id":166681,"url":"https://patchwork.plctlab.org/api/1.2/patches/166681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171501110.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:52","name":"[09/44] RISC-V: Rework branch costing model for if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171501110.5892@tpp.orcam.me.uk/mbox/"},{"id":166682,"url":"https://patchwork.plctlab.org/api/1.2/patches/166682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171516550.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:06","name":"[10/44] RISC-V/testsuite: Add branched cases for integer cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171516550.5892@tpp.orcam.me.uk/mbox/"},{"id":166683,"url":"https://patchwork.plctlab.org/api/1.2/patches/166683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171619400.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:20","name":"[11/44] RISC-V/testsuite: Add branchless cases for integer cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171619400.5892@tpp.orcam.me.uk/mbox/"},{"id":166685,"url":"https://patchwork.plctlab.org/api/1.2/patches/166685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171632580.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:34","name":"[12/44] RISC-V/testsuite: Add branched cases for FP cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171632580.5892@tpp.orcam.me.uk/mbox/"},{"id":166687,"url":"https://patchwork.plctlab.org/api/1.2/patches/166687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171722590.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:04","name":"[14/44] RISC-V: Also invert the cond-move condition for GEU and LEU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171722590.5892@tpp.orcam.me.uk/mbox/"},{"id":166691,"url":"https://patchwork.plctlab.org/api/1.2/patches/166691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180358190.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:13","name":"[15/44] RISC-V/testsuite: Add branched cases for GEU and LEU cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180358190.5892@tpp.orcam.me.uk/mbox/"},{"id":166686,"url":"https://patchwork.plctlab.org/api/1.2/patches/166686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180416250.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:24","name":"[16/44] RISC-V/testsuite: Add branchless cases for GEU and LEU cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180416250.5892@tpp.orcam.me.uk/mbox/"},{"id":166688,"url":"https://patchwork.plctlab.org/api/1.2/patches/166688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180424040.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:35","name":"[17/44] RISC-V: Avoid extraneous EQ or NE operation in cond-move expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180424040.5892@tpp.orcam.me.uk/mbox/"},{"id":166689,"url":"https://patchwork.plctlab.org/api/1.2/patches/166689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181735420.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:47","name":"[18/44] RISC-V/testsuite: Add branched cases for equality cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181735420.5892@tpp.orcam.me.uk/mbox/"},{"id":166690,"url":"https://patchwork.plctlab.org/api/1.2/patches/166690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181747220.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:00","name":"[19/44] RISC-V/testsuite: Add branchless cases for equality cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181747220.5892@tpp.orcam.me.uk/mbox/"},{"id":166692,"url":"https://patchwork.plctlab.org/api/1.2/patches/166692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181755221.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:13","name":"[20/44] RISC-V: Also accept constants for T-Head cond-move comparison operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181755221.5892@tpp.orcam.me.uk/mbox/"},{"id":166693,"url":"https://patchwork.plctlab.org/api/1.2/patches/166693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181804140.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:25","name":"[21/44] RISC-V: Also accept constants for T-Head cond-move data input operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181804140.5892@tpp.orcam.me.uk/mbox/"},{"id":166694,"url":"https://patchwork.plctlab.org/api/1.2/patches/166694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181813500.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:03","name":"[22/44] RISC-V: Fold all the cond-move variants together","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181813500.5892@tpp.orcam.me.uk/mbox/"},{"id":166695,"url":"https://patchwork.plctlab.org/api/1.2/patches/166695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181823240.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:13","name":"[23/44] RISC-V/testsuite: Add branched cases for T-Head non-equality cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181823240.5892@tpp.orcam.me.uk/mbox/"},{"id":166697,"url":"https://patchwork.plctlab.org/api/1.2/patches/166697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181827560.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:26","name":"[24/44] RISC-V/testsuite: Add branchless cases for T-Head non-equality cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181827560.5892@tpp.orcam.me.uk/mbox/"},{"id":166696,"url":"https://patchwork.plctlab.org/api/1.2/patches/166696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181830580.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:38","name":"[25/44] RISC-V: Implement `riscv_emit_unary'\'' helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181830580.5892@tpp.orcam.me.uk/mbox/"},{"id":166698,"url":"https://patchwork.plctlab.org/api/1.2/patches/166698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181833450.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:48","name":"[26/44] RISC-V: Add `movMODEcc'\'' implementation for generic targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181833450.5892@tpp.orcam.me.uk/mbox/"},{"id":166701,"url":"https://patchwork.plctlab.org/api/1.2/patches/166701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182042320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:59","name":"[27/44] RISC-V/testsuite: Add branched cases for generic integer cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182042320.5892@tpp.orcam.me.uk/mbox/"},{"id":166699,"url":"https://patchwork.plctlab.org/api/1.2/patches/166699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182049270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:12","name":"[28/44] RISC-V/testsuite: Add branchless cases for generic integer cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182049270.5892@tpp.orcam.me.uk/mbox/"},{"id":166704,"url":"https://patchwork.plctlab.org/api/1.2/patches/166704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182054440.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:24","name":"[29/44] RISC-V: Add `addMODEcc'\'' implementation for generic targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182054440.5892@tpp.orcam.me.uk/mbox/"},{"id":166700,"url":"https://patchwork.plctlab.org/api/1.2/patches/166700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182112500.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:33","name":"[30/44] RISC-V/testsuite: Add branched cases for generic integer cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182112500.5892@tpp.orcam.me.uk/mbox/"},{"id":166702,"url":"https://patchwork.plctlab.org/api/1.2/patches/166702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182117360.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:47","name":"[31/44] RISC-V/testsuite: Add branchless cases for generic integer cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182117360.5892@tpp.orcam.me.uk/mbox/"},{"id":166706,"url":"https://patchwork.plctlab.org/api/1.2/patches/166706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182127160.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:01","name":"[32/44] RISC-V: Only use SUBREG if applicable in `riscv_expand_float_scc'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182127160.5892@tpp.orcam.me.uk/mbox/"},{"id":166703,"url":"https://patchwork.plctlab.org/api/1.2/patches/166703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182143010.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:13","name":"[33/44] RISC-V: Also allow FP conditions in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182143010.5892@tpp.orcam.me.uk/mbox/"},{"id":166705,"url":"https://patchwork.plctlab.org/api/1.2/patches/166705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182155320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:23","name":"[34/44] RISC-V: Provide FP conditional-branch instructions for if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182155320.5892@tpp.orcam.me.uk/mbox/"},{"id":166708,"url":"https://patchwork.plctlab.org/api/1.2/patches/166708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182249380.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:37","name":"[35/44] RISC-V: Avoid extraneous integer comparison for FP comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182249380.5892@tpp.orcam.me.uk/mbox/"},{"id":166710,"url":"https://patchwork.plctlab.org/api/1.2/patches/166710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182330230.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:48","name":"[36/44] RISC-V/testsuite: Add branched cases for generic FP cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182330230.5892@tpp.orcam.me.uk/mbox/"},{"id":166707,"url":"https://patchwork.plctlab.org/api/1.2/patches/166707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182335270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:00","name":"[37/44] RISC-V/testsuite: Add branchless cases for generic FP cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182335270.5892@tpp.orcam.me.uk/mbox/"},{"id":166709,"url":"https://patchwork.plctlab.org/api/1.2/patches/166709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182342520.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:09","name":"[38/44] RISC-V/testsuite: Add branched cases for generic FP cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182342520.5892@tpp.orcam.me.uk/mbox/"},{"id":166712,"url":"https://patchwork.plctlab.org/api/1.2/patches/166712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190132400.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:21","name":"[39/44] RISC-V/testsuite: Add branchless cases for generic FP cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190132400.5892@tpp.orcam.me.uk/mbox/"},{"id":166711,"url":"https://patchwork.plctlab.org/api/1.2/patches/166711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190143100.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:34","name":"[40/44] RISC-V: Handle FP NE operator via inversion in cond-operation expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190143100.5892@tpp.orcam.me.uk/mbox/"},{"id":166713,"url":"https://patchwork.plctlab.org/api/1.2/patches/166713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190156200.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:45","name":"[41/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190156200.5892@tpp.orcam.me.uk/mbox/"},{"id":166714,"url":"https://patchwork.plctlab.org/api/1.2/patches/166714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190204040.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:56","name":"[42/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190204040.5892@tpp.orcam.me.uk/mbox/"},{"id":166715,"url":"https://patchwork.plctlab.org/api/1.2/patches/166715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190216320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:44:07","name":"[43/44] RISC-V/testsuite: Add branched cases for FP NE cond-add operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190216320.5892@tpp.orcam.me.uk/mbox/"},{"id":166716,"url":"https://patchwork.plctlab.org/api/1.2/patches/166716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190221350.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:44:17","name":"[44/44] RISC-V/testsuite: Add branchless cases for FP NE cond-add operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190221350.5892@tpp.orcam.me.uk/mbox/"},{"id":166717,"url":"https://patchwork.plctlab.org/api/1.2/patches/166717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119070102.3053-2-xry111@xry111.site/","msgid":"<20231119070102.3053-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T07:01:03","name":"LoongArch: Optimize LSX vector shuffle on floating-point vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119070102.3053-2-xry111@xry111.site/mbox/"},{"id":166758,"url":"https://patchwork.plctlab.org/api/1.2/patches/166758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190609100.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T11:24:37","name":"RISC-V: Remove duplicate `order_operator'\'' predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190609100.5892@tpp.orcam.me.uk/mbox/"},{"id":166759,"url":"https://patchwork.plctlab.org/api/1.2/patches/166759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190446360.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T11:27:02","name":"testsuite: Fix subexpressions with `scan-assembler-times'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190446360.5892@tpp.orcam.me.uk/mbox/"},{"id":166786,"url":"https://patchwork.plctlab.org/api/1.2/patches/166786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119113331.265881-1-dmalcolm@redhat.com/","msgid":"<20231119113331.265881-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-19T11:33:31","name":"[pushed] libcpp: split decls out to rich-location.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119113331.265881-1-dmalcolm@redhat.com/mbox/"},{"id":166811,"url":"https://patchwork.plctlab.org/api/1.2/patches/166811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119140803.4168318-1-juzhe.zhong@rivai.ai/","msgid":"<20231119140803.4168318-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-19T14:08:03","name":"[Committed,V2] RISC-V: Optimize constant AVL for LRA pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119140803.4168318-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166816,"url":"https://patchwork.plctlab.org/api/1.2/patches/166816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-2-xry111@xry111.site/","msgid":"<20231119143037.16443-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:35","name":"[v2,1/3] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-2-xry111@xry111.site/mbox/"},{"id":166814,"url":"https://patchwork.plctlab.org/api/1.2/patches/166814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-3-xry111@xry111.site/","msgid":"<20231119143037.16443-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:36","name":"[v2,2/3] LoongArch: Use standard pattern name and RTX code for LSX/LASX muh instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-3-xry111@xry111.site/mbox/"},{"id":166815,"url":"https://patchwork.plctlab.org/api/1.2/patches/166815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-4-xry111@xry111.site/","msgid":"<20231119143037.16443-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:37","name":"[v2,3/3] LoongArch: Use standard pattern name and RTX code for LSX/LASX rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-4-xry111@xry111.site/mbox/"},{"id":166889,"url":"https://patchwork.plctlab.org/api/1.2/patches/166889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com/","msgid":"<289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com>","list_archive_url":null,"date":"2023-11-19T21:19:50","name":"[committed] RISC-V: Infrastructure for instruction fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com/mbox/"},{"id":166906,"url":"https://patchwork.plctlab.org/api/1.2/patches/166906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVqD4QG/X2nj6GrP@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-19T21:53:37","name":"libstdc++: Speed up push_back","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVqD4QG/X2nj6GrP@kam.mff.cuni.cz/mbox/"},{"id":166910,"url":"https://patchwork.plctlab.org/api/1.2/patches/166910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-2-xry111@xry111.site/","msgid":"<20231120004728.205167-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:24","name":"[v3,1/5] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-2-xry111@xry111.site/mbox/"},{"id":166911,"url":"https://patchwork.plctlab.org/api/1.2/patches/166911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-3-xry111@xry111.site/","msgid":"<20231120004728.205167-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:25","name":"[v3,2/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX muh instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-3-xry111@xry111.site/mbox/"},{"id":166912,"url":"https://patchwork.plctlab.org/api/1.2/patches/166912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-4-xry111@xry111.site/","msgid":"<20231120004728.205167-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:26","name":"[v3,3/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-4-xry111@xry111.site/mbox/"},{"id":166913,"url":"https://patchwork.plctlab.org/api/1.2/patches/166913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-5-xry111@xry111.site/","msgid":"<20231120004728.205167-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:27","name":"[v3,4/5] LoongArch: Remove lrint_allow_inexact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-5-xry111@xry111.site/mbox/"},{"id":166914,"url":"https://patchwork.plctlab.org/api/1.2/patches/166914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-6-xry111@xry111.site/","msgid":"<20231120004728.205167-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:28","name":"[v3,5/5] LoongArch: Use LSX for scalar FP rounding with explicit rounding mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-6-xry111@xry111.site/mbox/"},{"id":166915,"url":"https://patchwork.plctlab.org/api/1.2/patches/166915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com/","msgid":"<6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com>","list_archive_url":null,"date":"2023-11-20T00:47:56","name":"[RFA] New pass for sign/zero extension elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com/mbox/"},{"id":166923,"url":"https://patchwork.plctlab.org/api/1.2/patches/166923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025356.2937834-1-jason@redhat.com/","msgid":"<20231120025356.2937834-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:53:56","name":"[pushed] c++: add DECL_IMPLICIT_TEMPLATE_PARM_P macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025356.2937834-1-jason@redhat.com/mbox/"},{"id":166924,"url":"https://patchwork.plctlab.org/api/1.2/patches/166924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025415.2938041-1-jason@redhat.com/","msgid":"<20231120025415.2938041-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:54:15","name":"[pushed] c++: compare one level of template parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025415.2938041-1-jason@redhat.com/mbox/"},{"id":166925,"url":"https://patchwork.plctlab.org/api/1.2/patches/166925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025517.1678251-1-hongtao.liu@intel.com/","msgid":"<20231120025517.1678251-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-20T02:55:17","name":"[x86] Support reduc_{and, ior, xor}_scal_m for V4HI/V8QI/V4QImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025517.1678251-1-hongtao.liu@intel.com/mbox/"},{"id":166935,"url":"https://patchwork.plctlab.org/api/1.2/patches/166935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025547.2938444-1-jason@redhat.com/","msgid":"<20231120025547.2938444-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:55:47","name":"[RFC] c++: mangle function template constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025547.2938444-1-jason@redhat.com/mbox/"},{"id":166936,"url":"https://patchwork.plctlab.org/api/1.2/patches/166936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120041211.3957366-1-juzhe.zhong@rivai.ai/","msgid":"<20231120041211.3957366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T04:12:11","name":"[BUG,FIX] RISC-V: Fix VLS DI mode of slide1 instruction attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120041211.3957366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166943,"url":"https://patchwork.plctlab.org/api/1.2/patches/166943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfJWSMWzTwLWDu@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:23:01","name":"[1/4] Add vector pair modes to PowerPC (patch attached)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfJWSMWzTwLWDu@cowardly-lion.the-meissners.org/mbox/"},{"id":166944,"url":"https://patchwork.plctlab.org/api/1.2/patches/166944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfXZj3iaioq8FP@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:23:57","name":"[2/4] Vector pair floating point support for PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfXZj3iaioq8FP@cowardly-lion.the-meissners.org/mbox/"},{"id":166945,"url":"https://patchwork.plctlab.org/api/1.2/patches/166945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrf21be5Lm4hvRF@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:26:03","name":"[3/4] Add integer vector pair mode support to PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrf21be5Lm4hvRF@cowardly-lion.the-meissners.org/mbox/"},{"id":166946,"url":"https://patchwork.plctlab.org/api/1.2/patches/166946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrgEJGzDEnnQiH5@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:26:56","name":"[4/4] Add vector pair tests to PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrgEJGzDEnnQiH5@cowardly-lion.the-meissners.org/mbox/"},{"id":166982,"url":"https://patchwork.plctlab.org/api/1.2/patches/166982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/944137EFF18E5234+2023112016463085631915@rivai.ai/","msgid":"<944137EFF18E5234+2023112016463085631915@rivai.ai>","list_archive_url":null,"date":"2023-11-20T08:46:31","name":"??????: Re: [PATCH] DOC/IFN/OPTAB: Add mask_len_strided_load/mask_len_strided_store DOC/OPTAB/IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/944137EFF18E5234+2023112016463085631915@rivai.ai/mbox/"},{"id":166986,"url":"https://patchwork.plctlab.org/api/1.2/patches/166986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5r8kdei.fsf@euler.schwinge.homeip.net/","msgid":"<87a5r8kdei.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-20T09:00:21","name":"GCC developer room at FOSDEM 2024: Call for Participation open","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5r8kdei.fsf@euler.schwinge.homeip.net/mbox/"},{"id":167015,"url":"https://patchwork.plctlab.org/api/1.2/patches/167015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com/","msgid":"<6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:55:49","name":"[v3,01/11] aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167016,"url":"https://patchwork.plctlab.org/api/1.2/patches/167016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcab4866c14b323b00d92348ddb975d79f713ef9.1700473918.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-20T09:55:54","name":"[v3,02/11] aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcab4866c14b323b00d92348ddb975d79f713ef9.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167019,"url":"https://patchwork.plctlab.org/api/1.2/patches/167019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2be3b364f48b17c37fe882e45c0569cd73c481e.1700473918.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-20T09:55:59","name":"[v3,03/11] gm2: Add missing declaration of m2pim_M2RTS_Terminate to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2be3b364f48b17c37fe882e45c0569cd73c481e.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167021,"url":"https://patchwork.plctlab.org/api/1.2/patches/167021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com/","msgid":"<39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:03","name":"[v3,04/11] Add tests for validating future C permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167022,"url":"https://patchwork.plctlab.org/api/1.2/patches/167022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com/","msgid":"<145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:09","name":"[v3,05/11] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167020,"url":"https://patchwork.plctlab.org/api/1.2/patches/167020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com/","msgid":"<7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:26","name":"[v3,08/11] c: Do not ignore some forms of -Wimplicit-int in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167023,"url":"https://patchwork.plctlab.org/api/1.2/patches/167023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com/","msgid":"<2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:30","name":"[v3,09/11] c: Turn -Wreturn-mismatch into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167025,"url":"https://patchwork.plctlab.org/api/1.2/patches/167025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com/","msgid":"<9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:36","name":"[v3,10/11] c: Turn -Wincompatible-pointer-types into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167024,"url":"https://patchwork.plctlab.org/api/1.2/patches/167024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com/","msgid":"<700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:42","name":"[v3,11/11] c: Add new -Wdeclaration-missing-parameter-type permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167031,"url":"https://patchwork.plctlab.org/api/1.2/patches/167031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120104158.4141376-1-juzhe.zhong@rivai.ai/","msgid":"<20231120104158.4141376-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T10:41:58","name":"RISC-V Regression: Remove scalable compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120104158.4141376-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167032,"url":"https://patchwork.plctlab.org/api/1.2/patches/167032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com/","msgid":"<545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com>","list_archive_url":null,"date":"2023-11-20T10:42:02","name":"OpenMP: Add uses_allocators support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com/mbox/"},{"id":167095,"url":"https://patchwork.plctlab.org/api/1.2/patches/167095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120120649.672893-2-maxim.kuvyrkov@linaro.org/","msgid":"<20231120120649.672893-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-20T12:06:49","name":"[1/1] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120120649.672893-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":167114,"url":"https://patchwork.plctlab.org/api/1.2/patches/167114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131114.2801087-1-juzhe.zhong@rivai.ai/","msgid":"<20231120131114.2801087-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T13:11:14","name":"[BUG,FIX] RISC-V: Fix intermediate mode on slide1 instruction for SEW64 on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131114.2801087-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167190,"url":"https://patchwork.plctlab.org/api/1.2/patches/167190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131237.1825680-1-jwakely@redhat.com/","msgid":"<20231120131237.1825680-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-20T13:12:29","name":"[wwwdocs] Add new libstdc++ features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131237.1825680-1-jwakely@redhat.com/mbox/"},{"id":167256,"url":"https://patchwork.plctlab.org/api/1.2/patches/167256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131726.52280-1-ishitatsuyuki@gmail.com/","msgid":"<20231120131726.52280-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-11-20T13:17:26","name":"[v3] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131726.52280-1-ishitatsuyuki@gmail.com/mbox/"},{"id":167129,"url":"https://patchwork.plctlab.org/api/1.2/patches/167129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120132659.3577496-1-ben.boeckel@kitware.com/","msgid":"<20231120132659.3577496-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T13:26:59","name":"[1/1] gcc-14: document P1689R5 scanning output support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120132659.3577496-1-ben.boeckel@kitware.com/mbox/"},{"id":167147,"url":"https://patchwork.plctlab.org/api/1.2/patches/167147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140023.591B83891C17@sourceware.org/","msgid":"<20231120140023.591B83891C17@sourceware.org>","list_archive_url":null,"date":"2023-11-20T13:59:56","name":"tree-optimization/112618 - unused .MASK_CALL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140023.591B83891C17@sourceware.org/mbox/"},{"id":167148,"url":"https://patchwork.plctlab.org/api/1.2/patches/167148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140036.CEB293882060@sourceware.org/","msgid":"<20231120140036.CEB293882060@sourceware.org>","list_archive_url":null,"date":"2023-11-20T14:00:09","name":"tree-optimization/112281 - loop distribution and zero dependence distances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140036.CEB293882060@sourceware.org/mbox/"},{"id":167149,"url":"https://patchwork.plctlab.org/api/1.2/patches/167149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140107.821F83890433@sourceware.org/","msgid":"<20231120140107.821F83890433@sourceware.org>","list_archive_url":null,"date":"2023-11-20T14:00:25","name":"middle-end/112622 - convert and vector-to-float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140107.821F83890433@sourceware.org/mbox/"},{"id":167207,"url":"https://patchwork.plctlab.org/api/1.2/patches/167207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120144854.676590-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231120144854.676590-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-20T14:48:54","name":"[v2] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120144854.676590-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":167254,"url":"https://patchwork.plctlab.org/api/1.2/patches/167254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162225.3620105-1-ben.boeckel@kitware.com/","msgid":"<20231120162225.3620105-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T16:22:25","name":"[1/1] email: fix bug and patch email addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162225.3620105-1-ben.boeckel@kitware.com/mbox/"},{"id":167255,"url":"https://patchwork.plctlab.org/api/1.2/patches/167255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162256.3620350-1-ben.boeckel@kitware.com/","msgid":"<20231120162256.3620350-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T16:22:56","name":"[1/1] gcc-14: document P1689R5 scanning output support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162256.3620350-1-ben.boeckel@kitware.com/mbox/"},{"id":167370,"url":"https://patchwork.plctlab.org/api/1.2/patches/167370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120191447.2189928-1-jiawei@iscas.ac.cn/","msgid":"<20231120191447.2189928-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-20T19:14:47","name":"[RFC] RISC-V: Support RISC-V Profiles in -march option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120191447.2189928-1-jiawei@iscas.ac.cn/mbox/"},{"id":167473,"url":"https://patchwork.plctlab.org/api/1.2/patches/167473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121021837.1558057-1-juzhe.zhong@rivai.ai/","msgid":"<20231121021837.1558057-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T02:18:37","name":"[Committed] RISC-V: Fix reduc_run-9.c test value check bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121021837.1558057-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167485,"url":"https://patchwork.plctlab.org/api/1.2/patches/167485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1fe7bb89af19e0cb17386057431ffa4e908b8ff.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-11-21T03:09:58","name":"Pushed: LoongArch: Fix libgcc build failure when libc is not available (was Re: genopts: Add infrastructure to generate code for new features in ISA evolution)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1fe7bb89af19e0cb17386057431ffa4e908b8ff.camel@xry111.site/mbox/"},{"id":167491,"url":"https://patchwork.plctlab.org/api/1.2/patches/167491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-1-ben.boeckel@kitware.com/","msgid":"<20231121043959.3683025-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-21T04:39:58","name":"[1/1] email: fix bug and patch email addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-1-ben.boeckel@kitware.com/mbox/"},{"id":167492,"url":"https://patchwork.plctlab.org/api/1.2/patches/167492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-2-ben.boeckel@kitware.com/","msgid":"<20231121043959.3683025-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-21T04:39:59","name":"[2/2] bugzilla: remove `gcc-bugs@` mailing list address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-2-ben.boeckel@kitware.com/mbox/"},{"id":167519,"url":"https://patchwork.plctlab.org/api/1.2/patches/167519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121072042.A6D4E3858C2F@sourceware.org/","msgid":"<20231121072042.A6D4E3858C2F@sourceware.org>","list_archive_url":null,"date":"2023-11-21T07:20:16","name":"tree-optimization/111970 - fix issue with SLP of emulated gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121072042.A6D4E3858C2F@sourceware.org/mbox/"},{"id":167527,"url":"https://patchwork.plctlab.org/api/1.2/patches/167527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121074133.359B43858C2B@sourceware.org/","msgid":"<20231121074133.359B43858C2B@sourceware.org>","list_archive_url":null,"date":"2023-11-21T07:41:07","name":"middle-end/112622 - adjust arm testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121074133.359B43858C2B@sourceware.org/mbox/"},{"id":167534,"url":"https://patchwork.plctlab.org/api/1.2/patches/167534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxnFzQjWHKc90u9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T08:15:21","name":"builtins: Fix fold_builtin_query clzg/ctzg side-effects handling [PR112639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxnFzQjWHKc90u9@tucnak/mbox/"},{"id":167552,"url":"https://patchwork.plctlab.org/api/1.2/patches/167552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com/","msgid":"<033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com>","list_archive_url":null,"date":"2023-11-21T08:30:17","name":"rtl-optimization: Modify loop live data with livein of loop header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com/mbox/"},{"id":167558,"url":"https://patchwork.plctlab.org/api/1.2/patches/167558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxuwE3jA7cIIf71@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T08:48:00","name":"testsuite: Fix up pr111309-2.c on arm [PR111309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxuwE3jA7cIIf71@tucnak/mbox/"},{"id":167610,"url":"https://patchwork.plctlab.org/api/1.2/patches/167610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121100209.315304-1-juzhe.zhong@rivai.ai/","msgid":"<20231121100209.315304-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T10:02:09","name":"[BUG,FIX] RISC-V: Disallow COSNT_VECTOR for DI on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121100209.315304-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167633,"url":"https://patchwork.plctlab.org/api/1.2/patches/167633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121102958.53303-1-sebastian.huber@embedded-brains.de/","msgid":"<20231121102958.53303-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-21T10:29:58","name":"[v2] gcov: Fix integer types in gen_counter_update()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121102958.53303-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":167661,"url":"https://patchwork.plctlab.org/api/1.2/patches/167661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89v5pnp.fsf@euler.schwinge.homeip.net/","msgid":"<87v89v5pnp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-21T11:09:14","name":"Fix '\''gcc.dg/tree-ssa/return-value-range-1.c'\'' (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89v5pnp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":167742,"url":"https://patchwork.plctlab.org/api/1.2/patches/167742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121125642.2665901-1-juzhe.zhong@rivai.ai/","msgid":"<20231121125642.2665901-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T12:56:42","name":"[Committed] RISC-V: Add missing dump check of pr112438.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121125642.2665901-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167745,"url":"https://patchwork.plctlab.org/api/1.2/patches/167745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dWYu-AKeY4Tx7EvAMCbTpi8vcvr8Xl_o3ZRez4jYtClI9TD5vOf8Qk41sEh6gBbyjlvCOQHPI1woLPVnHY9g9JJu8FRm6eqUtE2L0hsNc=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-21T13:04:35","name":"[v5,1/1] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dWYu-AKeY4Tx7EvAMCbTpi8vcvr8Xl_o3ZRez4jYtClI9TD5vOf8Qk41sEh6gBbyjlvCOQHPI1woLPVnHY9g9JJu8FRm6eqUtE2L0hsNc=@protonmail.com/mbox/"},{"id":167746,"url":"https://patchwork.plctlab.org/api/1.2/patches/167746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121133224.105698-1-ibuclaw@gdcproject.org/","msgid":"<20231121133224.105698-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-21T13:32:24","name":"[committed] d: Merge upstream dmd 65a3da148c, phobos fc06c514a.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121133224.105698-1-ibuclaw@gdcproject.org/mbox/"},{"id":167777,"url":"https://patchwork.plctlab.org/api/1.2/patches/167777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121140827.109435-1-ibuclaw@gdcproject.org/","msgid":"<20231121140827.109435-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-21T14:08:27","name":"[committed] d: Merge upstream dmd ff57fec515, druntime ff57fec515, phobos 17bafda79.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121140827.109435-1-ibuclaw@gdcproject.org/mbox/"},{"id":167794,"url":"https://patchwork.plctlab.org/api/1.2/patches/167794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143505.AA1DA3858401@sourceware.org/","msgid":"<20231121143505.AA1DA3858401@sourceware.org>","list_archive_url":null,"date":"2023-11-21T14:34:36","name":"Move VF based dependence check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143505.AA1DA3858401@sourceware.org/mbox/"},{"id":167795,"url":"https://patchwork.plctlab.org/api/1.2/patches/167795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143529.5B1003858C30@sourceware.org/","msgid":"<20231121143529.5B1003858C30@sourceware.org>","list_archive_url":null,"date":"2023-11-21T14:35:02","name":"tree-optimization/112623 - forwprop VEC_PACK_TRUNC generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143529.5B1003858C30@sourceware.org/mbox/"},{"id":167800,"url":"https://patchwork.plctlab.org/api/1.2/patches/167800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhfi2k2.fsf@oldenburg.str.redhat.com/","msgid":"<874jhfi2k2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-21T14:49:49","name":"gcc.misc-tests/linkage-y.c: Compatibility with C99+ system compilers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhfi2k2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":167815,"url":"https://patchwork.plctlab.org/api/1.2/patches/167815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160633.2174974-1-rearnsha@arm.com/","msgid":"<20231121160633.2174974-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-21T16:06:33","name":"arm: libgcc: provide implementations of __sync_synchronize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160633.2174974-1-rearnsha@arm.com/mbox/"},{"id":167858,"url":"https://patchwork.plctlab.org/api/1.2/patches/167858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160845.2030365-1-jwakely@redhat.com/","msgid":"<20231121160845.2030365-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:08:14","name":"[committed] libstdc++: Fix std::tr2::dynamic_bitset support for alternate characters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160845.2030365-1-jwakely@redhat.com/mbox/"},{"id":167859,"url":"https://patchwork.plctlab.org/api/1.2/patches/167859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161026.2031101-1-jwakely@redhat.com/","msgid":"<20231121161026.2031101-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:10:17","name":"[committed] libstdc++: Add std::span::at for C++26 (P2821R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161026.2031101-1-jwakely@redhat.com/mbox/"},{"id":167860,"url":"https://patchwork.plctlab.org/api/1.2/patches/167860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161105.2031146-1-jwakely@redhat.com/","msgid":"<20231121161105.2031146-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:10:27","name":"[committed] libstdc++: Add freestanding feature test macros (P2407R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161105.2031146-1-jwakely@redhat.com/mbox/"},{"id":167856,"url":"https://patchwork.plctlab.org/api/1.2/patches/167856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161136.2031190-1-jwakely@redhat.com/","msgid":"<20231121161136.2031190-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:11:07","name":"[committed] libstdc++: Do not declare strtok for C++26 freestanding (P2937R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161136.2031190-1-jwakely@redhat.com/mbox/"},{"id":167855,"url":"https://patchwork.plctlab.org/api/1.2/patches/167855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzZptbmO3+I4mZt@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-21T16:24:06","name":"libstdc++: Turn memmove to memcpy in vector reallocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzZptbmO3+I4mZt@kam.mff.cuni.cz/mbox/"},{"id":167849,"url":"https://patchwork.plctlab.org/api/1.2/patches/167849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzmDvmAqHI4SulJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T17:17:02","name":"c++, v3: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzmDvmAqHI4SulJ@tucnak/mbox/"},{"id":167863,"url":"https://patchwork.plctlab.org/api/1.2/patches/167863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180054.3949602-1-manolis.tsamis@vrull.eu/","msgid":"<20231121180054.3949602-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-11-21T18:00:54","name":"[v2] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180054.3949602-1-manolis.tsamis@vrull.eu/mbox/"},{"id":167867,"url":"https://patchwork.plctlab.org/api/1.2/patches/167867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180434.3991921-1-manolis.tsamis@vrull.eu/","msgid":"<20231121180434.3991921-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-11-21T18:04:34","name":"[v2] ifcvt: Remove obsolete code for subreg handling in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180434.3991921-1-manolis.tsamis@vrull.eu/mbox/"},{"id":167920,"url":"https://patchwork.plctlab.org/api/1.2/patches/167920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV0NjIfSpsMuqr7+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T20:05:32","name":"[committed] sanitizer: Fix build on SPARC/Solaris with Solaris as [PR112562]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV0NjIfSpsMuqr7+@tucnak/mbox/"},{"id":167957,"url":"https://patchwork.plctlab.org/api/1.2/patches/167957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kiu7f3.fsf@euler.schwinge.homeip.net/","msgid":"<87r0kiu7f3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-21T21:24:00","name":"Fix '\''gcc.dg/tree-ssa/return-value-range-1.c'\'' for '\''char'\'' defaulting to '\''unsigned'\'' (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kiu7f3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":168007,"url":"https://patchwork.plctlab.org/api/1.2/patches/168007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-2-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:14","name":"[1/5] libdiagnostics v2: header and examples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-2-dmalcolm@redhat.com/mbox/"},{"id":168005,"url":"https://patchwork.plctlab.org/api/1.2/patches/168005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-6-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:18","name":"[5/5] diagnostics: don'\''t print annotation lines when there'\''s no column info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-6-dmalcolm@redhat.com/mbox/"},{"id":168010,"url":"https://patchwork.plctlab.org/api/1.2/patches/168010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-7-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:19","name":"binutils: v2: experimental use of libdiagnostics in gas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-7-dmalcolm@redhat.com/mbox/"},{"id":168035,"url":"https://patchwork.plctlab.org/api/1.2/patches/168035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121232704.12336-3-palmer@rivosinc.com/","msgid":"<20231121232704.12336-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-11-21T23:27:05","name":"[1/2] testsuite/unroll-8: Avoid triggering undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121232704.12336-3-palmer@rivosinc.com/mbox/"},{"id":168058,"url":"https://patchwork.plctlab.org/api/1.2/patches/168058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311220044380.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-22T01:40:48","name":"ARM/testsuite: Use non-capturing parentheses with pr53447-5.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311220044380.5892@tpp.orcam.me.uk/mbox/"},{"id":168062,"url":"https://patchwork.plctlab.org/api/1.2/patches/168062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122020423.4699F20424@pchp3.se.axis.com/","msgid":"<20231122020423.4699F20424@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-22T02:04:23","name":"testsuite: Tweak xfail bogus g++.dg/warn/Wstringop-overflow-4.C:144, PR106120","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122020423.4699F20424@pchp3.se.axis.com/mbox/"},{"id":168076,"url":"https://patchwork.plctlab.org/api/1.2/patches/168076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031652.3403525-1-quic_apinski@quicinc.com/","msgid":"<20231122031652.3403525-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-22T03:16:52","name":"Fix gcc.target/aarch64/movk.c testcase after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031652.3403525-1-quic_apinski@quicinc.com/mbox/"},{"id":168077,"url":"https://patchwork.plctlab.org/api/1.2/patches/168077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031756.3403606-1-quic_apinski@quicinc.com/","msgid":"<20231122031756.3403606-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-22T03:17:56","name":"Fix gcc.target/aarch64/movk.c testcase after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031756.3403606-1-quic_apinski@quicinc.com/mbox/"},{"id":168082,"url":"https://patchwork.plctlab.org/api/1.2/patches/168082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033108.3654950-1-hongyu.wang@intel.com/","msgid":"<20231122033108.3654950-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-22T03:31:08","name":"[APX,PUSH2POP2] Adjust operand order for PUSH2POP2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033108.3654950-1-hongyu.wang@intel.com/mbox/"},{"id":168090,"url":"https://patchwork.plctlab.org/api/1.2/patches/168090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033729.3335056-1-jason@redhat.com/","msgid":"<20231122033729.3335056-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T03:37:29","name":"[pushed] c++: start_preparsed_function tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033729.3335056-1-jason@redhat.com/mbox/"},{"id":168095,"url":"https://patchwork.plctlab.org/api/1.2/patches/168095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122041548.3655374-1-hongtao.liu@intel.com/","msgid":"<20231122041548.3655374-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-22T04:15:48","name":"Set AVOID_256FMA_CHAINS TO m_GENERIC as it'\''s generally good to new platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122041548.3655374-1-hongtao.liu@intel.com/mbox/"},{"id":168108,"url":"https://patchwork.plctlab.org/api/1.2/patches/168108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122061201.3690516-1-juzhe.zhong@rivai.ai/","msgid":"<20231122061201.3690516-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-22T06:12:01","name":"RISC-V: Fix permutation indice mode bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122061201.3690516-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168262,"url":"https://patchwork.plctlab.org/api/1.2/patches/168262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122095455.2215921-1-christophe.lyon@linaro.org/","msgid":"<20231122095455.2215921-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-22T09:54:55","name":"arm: [MVE intrinsics] Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122095455.2215921-1-christophe.lyon@linaro.org/mbox/"},{"id":168268,"url":"https://patchwork.plctlab.org/api/1.2/patches/168268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3RVUdjeIKL0c6x@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:00:53","name":"c++, v4: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3RVUdjeIKL0c6x@tucnak/mbox/"},{"id":168292,"url":"https://patchwork.plctlab.org/api/1.2/patches/168292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3YF+HaB1/Zj9N6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:29:43","name":"tree: Fix up try_catch_may_fallthru [PR112619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3YF+HaB1/Zj9N6@tucnak/mbox/"},{"id":168295,"url":"https://patchwork.plctlab.org/api/1.2/patches/168295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3ZKmCC+HrLTXwP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:34:18","name":"[committed] testsuite: Add testcase for already fixed PR112518","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3ZKmCC+HrLTXwP@tucnak/mbox/"},{"id":168303,"url":"https://patchwork.plctlab.org/api/1.2/patches/168303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122105322.1478693-1-juzhe.zhong@rivai.ai/","msgid":"<20231122105322.1478693-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-22T10:53:22","name":"RISC-V: Fix incorrect use of vcompress in permutation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122105322.1478693-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168311,"url":"https://patchwork.plctlab.org/api/1.2/patches/168311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-2-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:08","name":"[v3,1/8] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168314,"url":"https://patchwork.plctlab.org/api/1.2/patches/168314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-3-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-3-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:09","name":"[v3,2/8] Unify implementations of print_hard_reg_set()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-3-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168315,"url":"https://patchwork.plctlab.org/api/1.2/patches/168315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-4-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-4-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:10","name":"[v3,3/8] Simplify handling of INSN_ and EXPR_LISTs in sched-rgn.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-4-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168316,"url":"https://patchwork.plctlab.org/api/1.2/patches/168316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-5-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-5-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:11","name":"[v3,4/8] Improve and fix sched-deps.cc: dump_dep() and dump_lists().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-5-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168312,"url":"https://patchwork.plctlab.org/api/1.2/patches/168312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-6-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-6-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:12","name":"[v3,5/8] Add a bit more logging scheduler'\''s dependency analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-6-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168313,"url":"https://patchwork.plctlab.org/api/1.2/patches/168313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-7-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-7-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:13","name":"[v3,6/8] sched_deps.cc: Simplify initialization of dependency contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-7-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168317,"url":"https://patchwork.plctlab.org/api/1.2/patches/168317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-8-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-8-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:14","name":"[v3,7/8] Improve logging of register data in scheduler dependency analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-8-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168386,"url":"https://patchwork.plctlab.org/api/1.2/patches/168386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com/","msgid":"<7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com>","list_archive_url":null,"date":"2023-11-22T14:06:10","name":"[pushed,PR112610,IRA] : Fix using undefined dump file in IRA code during insn scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com/mbox/"},{"id":168396,"url":"https://patchwork.plctlab.org/api/1.2/patches/168396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f840b1c7-581e-4132-8c7c-bf60bf9e18b9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-22T14:27:55","name":"[committed] amdgcn: Fix vector TImode reload loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f840b1c7-581e-4132-8c7c-bf60bf9e18b9@codesourcery.com/mbox/"},{"id":168402,"url":"https://patchwork.plctlab.org/api/1.2/patches/168402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122143911.16620-1-jose.marchesi@oracle.com/","msgid":"<20231122143911.16620-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-22T14:39:11","name":"libgcc: mark __hardcfr_check_fail as always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122143911.16620-1-jose.marchesi@oracle.com/mbox/"},{"id":168403,"url":"https://patchwork.plctlab.org/api/1.2/patches/168403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122144041.C53983858C33@sourceware.org/","msgid":"<20231122144041.C53983858C33@sourceware.org>","list_archive_url":null,"date":"2023-11-22T14:40:16","name":"tree-optimization/112344 - wrong final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122144041.C53983858C33@sourceware.org/mbox/"},{"id":168409,"url":"https://patchwork.plctlab.org/api/1.2/patches/168409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311221501050.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-22T15:21:27","name":"AArch64/testsuite: Use non-capturing parentheses with ccmp_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311221501050.5892@tpp.orcam.me.uk/mbox/"},{"id":168486,"url":"https://patchwork.plctlab.org/api/1.2/patches/168486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leapu2sq.fsf@euler.schwinge.homeip.net/","msgid":"<87leapu2sq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-22T17:16:05","name":"Adjust '\''libgomp.c/declare-variant-{3,4}-[...]'\'' for inter-procedural value range propagation (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leapu2sq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":168491,"url":"https://patchwork.plctlab.org/api/1.2/patches/168491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122172657.542419-1-ppalka@redhat.com/","msgid":"<20231122172657.542419-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-22T17:26:57","name":"c++: alias template of non-template class [PR112633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122172657.542419-1-ppalka@redhat.com/mbox/"},{"id":168548,"url":"https://patchwork.plctlab.org/api/1.2/patches/168548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5ih3BNkEn-7As4@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-22T20:20:23","name":"[committed] hppa: Fix integer REG+D address reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5ih3BNkEn-7As4@mx3210.localdomain/mbox/"},{"id":168549,"url":"https://patchwork.plctlab.org/api/1.2/patches/168549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5j6Akii0sC2caT@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-22T20:26:16","name":"[committed] hppa: Define MAX_FIXED_MODE_SIZE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5j6Akii0sC2caT@mx3210.localdomain/mbox/"},{"id":168596,"url":"https://patchwork.plctlab.org/api/1.2/patches/168596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-1-jason@redhat.com/","msgid":"<20231122211235.3503229-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T21:12:34","name":"[1/2] c-family: -Waddress-of-packed-member and casts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-1-jason@redhat.com/mbox/"},{"id":168597,"url":"https://patchwork.plctlab.org/api/1.2/patches/168597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-2-jason@redhat.com/","msgid":"<20231122211235.3503229-2-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T21:12:35","name":"[2/2] c-family: rename warn_for_address_or_pointer_of_packed_member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-2-jason@redhat.com/mbox/"},{"id":168631,"url":"https://patchwork.plctlab.org/api/1.2/patches/168631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122220731.1121607-1-ppalka@redhat.com/","msgid":"<20231122220731.1121607-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-22T22:07:31","name":"c++: Implement P2582R1, CTAD from inherited constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122220731.1121607-1-ppalka@redhat.com/mbox/"},{"id":168661,"url":"https://patchwork.plctlab.org/api/1.2/patches/168661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232350.1C78333ECB@hamza.pair.com/","msgid":"<20231122232350.1C78333ECB@hamza.pair.com>","list_archive_url":null,"date":"2023-11-22T23:23:48","name":"[pushed] wwwdocs: branching: No longer refer to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232350.1C78333ECB@hamza.pair.com/mbox/"},{"id":168664,"url":"https://patchwork.plctlab.org/api/1.2/patches/168664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232520.39C4733E8D@hamza.pair.com/","msgid":"<20231122232520.39C4733E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-22T23:25:18","name":"[pushed] wwwdocs: releasing: No longer refer to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232520.39C4733E8D@hamza.pair.com/mbox/"},{"id":168671,"url":"https://patchwork.plctlab.org/api/1.2/patches/168671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123004751.7797533EC4@hamza.pair.com/","msgid":"<20231123004751.7797533EC4@hamza.pair.com>","list_archive_url":null,"date":"2023-11-23T00:47:49","name":"[pushed] wwwdocs: faq: Refer to gcc-testresults instead of buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123004751.7797533EC4@hamza.pair.com/mbox/"},{"id":168680,"url":"https://patchwork.plctlab.org/api/1.2/patches/168680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com/","msgid":"<447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com>","list_archive_url":null,"date":"2023-11-23T01:22:30","name":"[PATCHv2] Clean up by_pieces_ninsns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com/mbox/"},{"id":168709,"url":"https://patchwork.plctlab.org/api/1.2/patches/168709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030417.29993-1-guojie@loongson.cn/","msgid":"<20231123030417.29993-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-23T03:04:17","name":"[v2] LoongArch: Optimize the loading of immediate numbers with the same high and low 32-bit values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030417.29993-1-guojie@loongson.cn/mbox/"},{"id":168711,"url":"https://patchwork.plctlab.org/api/1.2/patches/168711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030556.31356-1-guojie@loongson.cn/","msgid":"<20231123030556.31356-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-23T03:05:56","name":"LoongArch: Fix runtime error in a gcc build with --with-build-config=bootstrap-ubsan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030556.31356-1-guojie@loongson.cn/mbox/"},{"id":168719,"url":"https://patchwork.plctlab.org/api/1.2/patches/168719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123054758.28829-1-wangfeng@eswincomputing.com/","msgid":"<20231123054758.28829-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-23T05:47:58","name":"gimple-vr-values:Add constraint for gimple-cond optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123054758.28829-1-wangfeng@eswincomputing.com/mbox/"},{"id":168720,"url":"https://patchwork.plctlab.org/api/1.2/patches/168720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123060949.618089-1-haochen.jiang@intel.com/","msgid":"<20231123060949.618089-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-23T06:09:49","name":"i386: Fix AVX512 and AVX10 option issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123060949.618089-1-haochen.jiang@intel.com/mbox/"},{"id":168768,"url":"https://patchwork.plctlab.org/api/1.2/patches/168768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123080116.2449B3858426@sourceware.org/","msgid":"<20231123080116.2449B3858426@sourceware.org>","list_archive_url":null,"date":"2023-11-23T08:00:49","name":"middle-end/32667 - document cpymem and memcpy exact overlap requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123080116.2449B3858426@sourceware.org/mbox/"},{"id":168825,"url":"https://patchwork.plctlab.org/api/1.2/patches/168825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8eh+8HZl/ejibp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T09:42:31","name":"lower-bitint: Fix up -fnon-call-exceptions bit-field load lowering [PR112668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8eh+8HZl/ejibp@tucnak/mbox/"},{"id":168840,"url":"https://patchwork.plctlab.org/api/1.2/patches/168840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8jppJSXdScNAjH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T10:04:22","name":"expr: Fix &bitint_var handling in initializers [PR112336]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8jppJSXdScNAjH@tucnak/mbox/"},{"id":168897,"url":"https://patchwork.plctlab.org/api/1.2/patches/168897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105527.2347252-1-jwakely@redhat.com/","msgid":"<20231123105527.2347252-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T10:54:56","name":"c++: Make g++.dg/opt/pr110879.C require C++11 [PR110879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105527.2347252-1-jwakely@redhat.com/mbox/"},{"id":168867,"url":"https://patchwork.plctlab.org/api/1.2/patches/168867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105503.3913200-1-juzhe.zhong@rivai.ai/","msgid":"<20231123105503.3913200-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T10:55:03","name":"[Committed] RISC-V: Refine some codes of riscv-v.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105503.3913200-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168873,"url":"https://patchwork.plctlab.org/api/1.2/patches/168873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123110409.3914102-1-juzhe.zhong@rivai.ai/","msgid":"<20231123110409.3914102-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T11:04:09","name":"RISC-V: Disable AVL propagation of vrgather instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123110409.3914102-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168888,"url":"https://patchwork.plctlab.org/api/1.2/patches/168888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmxC+Lk1Fk7o4iGhy0G=svOB3ZoYfAdf835-PUvc5rMZw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-23T11:36:24","name":"[aarch64] PR111702 - ICE in insert_regs after interleave+zip1 vector initialization patch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmxC+Lk1Fk7o4iGhy0G=svOB3ZoYfAdf835-PUvc5rMZw@mail.gmail.com/mbox/"},{"id":168898,"url":"https://patchwork.plctlab.org/api/1.2/patches/168898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123115952.1502588-1-juzhe.zhong@rivai.ai/","msgid":"<20231123115952.1502588-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T11:59:52","name":"[Committed,V2] RISC-V: Disable AVL propagation of vrgather instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123115952.1502588-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168902,"url":"https://patchwork.plctlab.org/api/1.2/patches/168902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123120735.1632594-1-juzhe.zhong@rivai.ai/","msgid":"<20231123120735.1632594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T12:07:35","name":"[Committed] RISC-V: Add wrapper for emit vec_extract[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123120735.1632594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168925,"url":"https://patchwork.plctlab.org/api/1.2/patches/168925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123125910.1889955-1-juzhe.zhong@rivai.ai/","msgid":"<20231123125910.1889955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T12:59:10","name":"RISC-V: Optimize a special case of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123125910.1889955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168948,"url":"https://patchwork.plctlab.org/api/1.2/patches/168948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123134751.25302-1-sebastian.huber@embedded-brains.de/","msgid":"<20231123134751.25302-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-23T13:47:51","name":"gcov: No atomic ops for -fprofile-update=single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123134751.25302-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":168952,"url":"https://patchwork.plctlab.org/api/1.2/patches/168952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV9aCyCiwKDkpvwy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T13:56:27","name":"lower-bitint, v3: Fix up -fnon-call-exceptions bit-field load lowering [PR112668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV9aCyCiwKDkpvwy@tucnak/mbox/"},{"id":168955,"url":"https://patchwork.plctlab.org/api/1.2/patches/168955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com/","msgid":"<43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com>","list_archive_url":null,"date":"2023-11-23T14:21:41","name":"OpenMP: Accept argument to depobj'\''s destroy clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com/mbox/"},{"id":168977,"url":"https://patchwork.plctlab.org/api/1.2/patches/168977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123151656.30332-1-jose.marchesi@oracle.com/","msgid":"<20231123151656.30332-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-23T15:16:56","name":"[V2] libgcc: mark __hardcfr_check_fail as always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123151656.30332-1-jose.marchesi@oracle.com/mbox/"},{"id":169011,"url":"https://patchwork.plctlab.org/api/1.2/patches/169011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123155627.2335026-1-christophe.lyon@linaro.org/","msgid":"<20231123155627.2335026-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-23T15:56:27","name":"arm: [MVE intrinsics] Add default clause to full_width_access::memory_vector_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123155627.2335026-1-christophe.lyon@linaro.org/mbox/"},{"id":169027,"url":"https://patchwork.plctlab.org/api/1.2/patches/169027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV+B5aYQheJ347xT@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-23T16:46:29","name":"[v5] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV+B5aYQheJ347xT@redhat.com/mbox/"},{"id":169054,"url":"https://patchwork.plctlab.org/api/1.2/patches/169054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170736.40CD020427@pchp3.se.axis.com/","msgid":"<20231123170736.40CD020427@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:07:36","name":"[1/3] contrib/regression/btest-gcc.sh: Handle multiple options.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170736.40CD020427@pchp3.se.axis.com/mbox/"},{"id":169056,"url":"https://patchwork.plctlab.org/api/1.2/patches/169056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170820.5BB4120432@pchp3.se.axis.com/","msgid":"<20231123170820.5BB4120432@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:08:20","name":"[2/3] contrib/regression/btest-gcc.sh: Simplify option handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170820.5BB4120432@pchp3.se.axis.com/mbox/"},{"id":169057,"url":"https://patchwork.plctlab.org/api/1.2/patches/169057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170926.D33BA20432@pchp3.se.axis.com/","msgid":"<20231123170926.D33BA20432@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:09:26","name":"[3/3] contrib/regression/btest-gcc.sh: Optionally handle XPASS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170926.D33BA20432@pchp3.se.axis.com/mbox/"},{"id":169088,"url":"https://patchwork.plctlab.org/api/1.2/patches/169088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123174450.2450203-1-jwakely@redhat.com/","msgid":"<20231123174450.2450203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T17:44:37","name":"[committed] libstdc++: Fix access error in __gnu_test::uneq_allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123174450.2450203-1-jwakely@redhat.com/mbox/"},{"id":169087,"url":"https://patchwork.plctlab.org/api/1.2/patches/169087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123175247.2451163-1-jwakely@redhat.com/","msgid":"<20231123175247.2451163-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T17:51:38","name":"[committed,v2] libstdc++: Define std::ranges::to for C++23 (P1206R7) [PR111055]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123175247.2451163-1-jwakely@redhat.com/mbox/"},{"id":169084,"url":"https://patchwork.plctlab.org/api/1.2/patches/169084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7b2e5fb-593d-45ac-999c-20811a75467d@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-11-23T18:09:51","name":"[avr,committed] Fix PR86776","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7b2e5fb-593d-45ac-999c-20811a75467d@gjlay.de/mbox/"},{"id":169089,"url":"https://patchwork.plctlab.org/api/1.2/patches/169089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-mtaDZJhqKnOgs@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T19:23:33","name":"[committed] hppa: Don'\''t skip check for warning at line 411 in Wattributes.c on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-mtaDZJhqKnOgs@mx3210.localdomain/mbox/"},{"id":169090,"url":"https://patchwork.plctlab.org/api/1.2/patches/169090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-noM-Cr2S9p5VU@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T19:27:28","name":"[committed] hppa: xfail scan-assembler-not check in g++.dg/cpp0x/initlist-const1.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-noM-Cr2S9p5VU@mx3210.localdomain/mbox/"},{"id":169120,"url":"https://patchwork.plctlab.org/api/1.2/patches/169120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-7qGTqufuUgo4P@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:52:56","name":"[committed] hppa: Export main in pr104869.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-7qGTqufuUgo4P@mx3210.localdomain/mbox/"},{"id":169121,"url":"https://patchwork.plctlab.org/api/1.2/patches/169121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-8ZH8myH1bUMhj@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:56:04","name":"[committed] hppa: Fix gcc.dg/analyzer/fd-4.c on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-8ZH8myH1bUMhj@mx3210.localdomain/mbox/"},{"id":169122,"url":"https://patchwork.plctlab.org/api/1.2/patches/169122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-9DtsY8vncIp5V@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:58:54","name":"[committed] hppa: Fix g++.dg/modules/bad-mapper-1.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-9DtsY8vncIp5V@mx3210.localdomain/mbox/"},{"id":169124,"url":"https://patchwork.plctlab.org/api/1.2/patches/169124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123213854.2B7D333E9E@hamza.pair.com/","msgid":"<20231123213854.2B7D333E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-11-23T21:38:51","name":"[pushed] wwwdocs: conduct: Use licensebuttons.net","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123213854.2B7D333E9E@hamza.pair.com/mbox/"},{"id":169132,"url":"https://patchwork.plctlab.org/api/1.2/patches/169132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123231800.3823357-1-juzhe.zhong@rivai.ai/","msgid":"<20231123231800.3823357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T23:18:00","name":"[V2] RISC-V: Optimize a special case of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123231800.3823357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169171,"url":"https://patchwork.plctlab.org/api/1.2/patches/169171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124050418.1547599-1-juzhe.zhong@rivai.ai/","msgid":"<20231124050418.1547599-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-24T05:04:18","name":"[Committed] RISC-V: Disable BSWAP optimization for NUNITS < 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124050418.1547599-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169173,"url":"https://patchwork.plctlab.org/api/1.2/patches/169173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124053241.64194-1-xry111@xry111.site/","msgid":"<20231124053241.64194-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-24T05:28:22","name":"Only allow (int)trunc(x) to (int)x simplification with -ffp-int-builtin-inexact [PR107723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124053241.64194-1-xry111@xry111.site/mbox/"},{"id":169220,"url":"https://patchwork.plctlab.org/api/1.2/patches/169220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124070128.0F706132E2@imap2.dmz-prg2.suse.org/","msgid":"<20231124070128.0F706132E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-11-24T07:01:27","name":"tree-optimization/112344 - relax final value-replacement fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124070128.0F706132E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":169275,"url":"https://patchwork.plctlab.org/api/1.2/patches/169275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBbkuhQ8TzBgrhU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:15:14","name":"lower-bitint: Lower FLOAT_EXPR from BITINT_TYPE INTEGER_CST [PR112679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBbkuhQ8TzBgrhU@tucnak/mbox/"},{"id":169276,"url":"https://patchwork.plctlab.org/api/1.2/patches/169276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBdDpASQrBk+5+0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:21:34","name":"match.pd: Avoid simplification into invalid BIT_FIELD_REFs [PR112673]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBdDpASQrBk+5+0@tucnak/mbox/"},{"id":169278,"url":"https://patchwork.plctlab.org/api/1.2/patches/169278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBfOrpCVK8K1m34@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:30:50","name":"i386: Fix ICE during cbranchv16qi4 expansion [PR112681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBfOrpCVK8K1m34@tucnak/mbox/"},{"id":169279,"url":"https://patchwork.plctlab.org/api/1.2/patches/169279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124083428.3153486-1-juzhe.zhong@rivai.ai/","msgid":"<20231124083428.3153486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-24T08:34:28","name":"RISC-V: Fix inconsistency among all vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124083428.3153486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169280,"url":"https://patchwork.plctlab.org/api/1.2/patches/169280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBgF6OXcpQ8HMAM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:34:31","name":"c++, v3: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBgF6OXcpQ8HMAM@tucnak/mbox/"},{"id":169297,"url":"https://patchwork.plctlab.org/api/1.2/patches/169297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com/","msgid":"<2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com>","list_archive_url":null,"date":"2023-11-24T08:42:50","name":"[Binutils] AArch64: Enable Debug (FEAT_DEBUGv8p9) extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com/mbox/"},{"id":169378,"url":"https://patchwork.plctlab.org/api/1.2/patches/169378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7836aa028e374b3d127fcd4ab01655697db94be.1700821042.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T10:18:13","name":"[v1,1/1] RISC-V: Initial RV64E and LP64E support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7836aa028e374b3d127fcd4ab01655697db94be.1700821042.git.research_trasio@irq.a4lg.com/mbox/"},{"id":169379,"url":"https://patchwork.plctlab.org/api/1.2/patches/169379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org/","msgid":"<20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-11-24T10:25:32","name":"tree-optimization/112677 - stack corruption with .COND_* reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":169402,"url":"https://patchwork.plctlab.org/api/1.2/patches/169402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45565a8-53d6-49a8-a46a-7b885f4e6188@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T12:24:43","name":"[v3] OpenMP: Accept argument to depobj'\''s destroy clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45565a8-53d6-49a8-a46a-7b885f4e6188@codesourcery.com/mbox/"},{"id":169406,"url":"https://patchwork.plctlab.org/api/1.2/patches/169406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ens4hq.fsf@euler.schwinge.homeip.net/","msgid":"<87y1ens4hq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T12:46:57","name":"testsuite: Add '\''only_for_offload_target'\'' wrapper for '\''scan-offload-tree-dump'\'' etc. (was: drop -aux{dir,base}, revamp -dump{dir,base})","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ens4hq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169435,"url":"https://patchwork.plctlab.org/api/1.2/patches/169435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com/","msgid":"<958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T13:51:28","name":"OpenMP: Add -Wopenmp and use it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com/mbox/"},{"id":169452,"url":"https://patchwork.plctlab.org/api/1.2/patches/169452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89rryiv.fsf@euler.schwinge.homeip.net/","msgid":"<87v89rryiv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T14:55:52","name":"GCN: Tag '\''-march=[...]'\'', '\''-mtune=[...]'\'' as '\''Negative'\'' of themselves [PR112669] (was: [gcn][patch] Add -mgpu option and plumb in assembler/linker)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89rryiv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169459,"url":"https://patchwork.plctlab.org/api/1.2/patches/169459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf4vry1i.fsf@euler.schwinge.homeip.net/","msgid":"<87sf4vry1i.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T15:06:17","name":"GCN: Remove '\''last_arg'\'' spec function (was: GCN: Tag '\''-march=[...]'\'', '\''-mtune=[...]'\'' as '\''Negative'\'' of themselves [PR112669])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf4vry1i.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169484,"url":"https://patchwork.plctlab.org/api/1.2/patches/169484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDHDJ9ih0esQnlM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T15:53:48","name":"mips: Fix up mips*-sde-elf* build [PR112300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDHDJ9ih0esQnlM@tucnak/mbox/"},{"id":169486,"url":"https://patchwork.plctlab.org/api/1.2/patches/169486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be2d7503-cf71-47ea-9fb5-5f069e3cdd9c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T16:07:50","name":"[GCN] install.texi: Update GCN entry - @uref and LLVM version remark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be2d7503-cf71-47ea-9fb5-5f069e3cdd9c@codesourcery.com/mbox/"},{"id":169491,"url":"https://patchwork.plctlab.org/api/1.2/patches/169491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com/","msgid":"<9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T16:20:27","name":"[wwwdocs,GCN] gcc-14/changes.html: GCN - Mention improvements due to VGPR register use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com/mbox/"},{"id":169492,"url":"https://patchwork.plctlab.org/api/1.2/patches/169492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9847458-8898-4a5b-a461-659ea771fbec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T16:22:22","name":"[wwwdocs,OpenACC] gcc-14/changes.html: OpenACC - mention support for first 2.7 features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9847458-8898-4a5b-a461-659ea771fbec@codesourcery.com/mbox/"},{"id":169494,"url":"https://patchwork.plctlab.org/api/1.2/patches/169494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cm7jex5.fsf@oracle.com/","msgid":"<877cm7jex5.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-24T16:26:30","name":"bpf: Throw error when external libcalls are generated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cm7jex5.fsf@oracle.com/mbox/"},{"id":169495,"url":"https://patchwork.plctlab.org/api/1.2/patches/169495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com/","msgid":"<13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T16:26:44","name":"[wwwdocs,OpenMP] gcc-14/changes.html + projects/gomp/: OpenMP update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com/mbox/"},{"id":169519,"url":"https://patchwork.plctlab.org/api/1.2/patches/169519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com/","msgid":"<96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com>","list_archive_url":null,"date":"2023-11-24T16:53:04","name":"PR tree-optimization/111922 - Ensure wi_fold arguments match precisions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com/mbox/"},{"id":169532,"url":"https://patchwork.plctlab.org/api/1.2/patches/169532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDd6GTD5UUV50Ht@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-24T17:31:20","name":"[committed] hppa: Use INT14_OK_STRICT in a couple of places in pa_emit_move_sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDd6GTD5UUV50Ht@mx3210.localdomain/mbox/"},{"id":169535,"url":"https://patchwork.plctlab.org/api/1.2/patches/169535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDmZeOZWcb9K2N0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T18:07:33","name":"aarch64: Fix up aarch64_simd_stp [PR109977]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDmZeOZWcb9K2N0@tucnak/mbox/"},{"id":169536,"url":"https://patchwork.plctlab.org/api/1.2/patches/169536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124180922.1302655-1-ppalka@redhat.com/","msgid":"<20231124180922.1302655-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-24T18:09:22","name":"c++/modules: alias CTAD and specializations table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124180922.1302655-1-ppalka@redhat.com/mbox/"},{"id":169547,"url":"https://patchwork.plctlab.org/api/1.2/patches/169547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7574843-ce81-4fdd-abf9-186640112a69@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T18:56:21","name":"[committed] c-family/c.opt (-Wopenmp): Add missing tailing '\''.'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7574843-ce81-4fdd-abf9-186640112a69@codesourcery.com/mbox/"},{"id":169629,"url":"https://patchwork.plctlab.org/api/1.2/patches/169629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125031536.DA3EE2042A@pchp3.se.axis.com/","msgid":"<20231125031536.DA3EE2042A@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-25T03:15:36","name":"testsuite/gcc.dg/uninit-pred-9_b.c:20: Fix XPASS for various targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125031536.DA3EE2042A@pchp3.se.axis.com/mbox/"},{"id":169637,"url":"https://patchwork.plctlab.org/api/1.2/patches/169637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWGf3nsyohGl2pLd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-25T07:18:54","name":"i386: Fix up *jcc_bt*_mask{,_1} [PR111408]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWGf3nsyohGl2pLd@tucnak/mbox/"},{"id":169659,"url":"https://patchwork.plctlab.org/api/1.2/patches/169659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125082432.630165-1-juzhe.zhong@rivai.ai/","msgid":"<20231125082432.630165-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-25T08:24:32","name":"RISC-V: Remove incorrect function gate gather_scatter_valid_offset_mode_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125082432.630165-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169688,"url":"https://patchwork.plctlab.org/api/1.2/patches/169688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125094721.18913-1-jose.marchesi@oracle.com/","msgid":"<20231125094721.18913-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-25T09:47:21","name":"Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125094721.18913-1-jose.marchesi@oracle.com/mbox/"},{"id":169689,"url":"https://patchwork.plctlab.org/api/1.2/patches/169689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com/","msgid":"<3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com>","list_archive_url":null,"date":"2023-11-25T09:50:38","name":"[pushed] wwwdocs: readings: Update OpenPOWER link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com/mbox/"},{"id":169693,"url":"https://patchwork.plctlab.org/api/1.2/patches/169693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWHJzN4hJHFSZ28f@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-25T10:17:48","name":"rs6000: Canonicalize copysign (x, -1) back to -abs (x) in the backend [PR112606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWHJzN4hJHFSZ28f@tucnak/mbox/"},{"id":169700,"url":"https://patchwork.plctlab.org/api/1.2/patches/169700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125111907.5731533E8D@hamza.pair.com/","msgid":"<20231125111907.5731533E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T11:19:05","name":"[pushed] doc: Update ISO C++ reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125111907.5731533E8D@hamza.pair.com/mbox/"},{"id":169701,"url":"https://patchwork.plctlab.org/api/1.2/patches/169701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125112534.13312-1-sebastian.huber@embedded-brains.de/","msgid":"<20231125112534.13312-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-25T11:25:34","name":"Update GMP/MPFR/MPC/ISL/gettext to latest release","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125112534.13312-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":169714,"url":"https://patchwork.plctlab.org/api/1.2/patches/169714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125123348.19E1633EA0@hamza.pair.com/","msgid":"<20231125123348.19E1633EA0@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T12:33:46","name":"[pushed] doc: Remove obsolete notes on GCC 4.x on FreeBSD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125123348.19E1633EA0@hamza.pair.com/mbox/"},{"id":169731,"url":"https://patchwork.plctlab.org/api/1.2/patches/169731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125131103.A4C0833E8B@hamza.pair.com/","msgid":"<20231125131103.A4C0833E8B@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T13:11:02","name":"[pushed] doc: Complete and sort the list of front ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125131103.A4C0833E8B@hamza.pair.com/mbox/"},{"id":169747,"url":"https://patchwork.plctlab.org/api/1.2/patches/169747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144320.855A033EA0@hamza.pair.com/","msgid":"<20231125144320.855A033EA0@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T14:43:18","name":"[pushed] wwwdocs: gcc-13: Refer to GCC (instead of gcc)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144320.855A033EA0@hamza.pair.com/mbox/"},{"id":169748,"url":"https://patchwork.plctlab.org/api/1.2/patches/169748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144527.2699733E8D@hamza.pair.com/","msgid":"<20231125144527.2699733E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T14:45:25","name":"[pushed] wwwdocs: reading: Update the MicroBlaze section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144527.2699733E8D@hamza.pair.com/mbox/"},{"id":169814,"url":"https://patchwork.plctlab.org/api/1.2/patches/169814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126004616.2690148-1-juzhe.zhong@rivai.ai/","msgid":"<20231126004616.2690148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-26T00:46:16","name":"[Committed] RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126004616.2690148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169826,"url":"https://patchwork.plctlab.org/api/1.2/patches/169826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-1-quic_apinski@quicinc.com/","msgid":"<20231126025800.1381015-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T02:57:59","name":"[1/2] Fix contracts-tmpl-spec2.C on targets where plain char is unsigned by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-1-quic_apinski@quicinc.com/mbox/"},{"id":169827,"url":"https://patchwork.plctlab.org/api/1.2/patches/169827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-2-quic_apinski@quicinc.com/","msgid":"<20231126025800.1381015-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T02:58:00","name":"[2/2] Fix gcc.target/aarch64/simd/vmulxd_{f64, f32}_2.c after after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-2-quic_apinski@quicinc.com/mbox/"},{"id":169829,"url":"https://patchwork.plctlab.org/api/1.2/patches/169829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126043003.1412233-1-quic_apinski@quicinc.com/","msgid":"<20231126043003.1412233-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T04:30:03","name":"[COMMITTED] Fix gcc.dg/vla-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126043003.1412233-1-quic_apinski@quicinc.com/mbox/"},{"id":169845,"url":"https://patchwork.plctlab.org/api/1.2/patches/169845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126091355.2309349-1-juzhe.zhong@rivai.ai/","msgid":"<20231126091355.2309349-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-26T09:13:55","name":"[Committed] RISC-V: Disable AVL propagation of slidedown instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126091355.2309349-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169889,"url":"https://patchwork.plctlab.org/api/1.2/patches/169889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN0hSsiN29KT7J4@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:38:29","name":"[committed] hppa: Really fix g++.dg/modules/bad-mapper-1.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN0hSsiN29KT7J4@mx3210.localdomain/mbox/"},{"id":169890,"url":"https://patchwork.plctlab.org/api/1.2/patches/169890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126163858.9328-1-amonakov@ispras.ru/","msgid":"<20231126163858.9328-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-11-26T16:38:58","name":"[committed] sort.cc: fix mentions of sorting networks in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126163858.9328-1-amonakov@ispras.ru/mbox/"},{"id":169891,"url":"https://patchwork.plctlab.org/api/1.2/patches/169891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN1Oz2R-p6TXRsf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:41:31","name":"[committed] hppa: Fix pr104869.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN1Oz2R-p6TXRsf@mx3210.localdomain/mbox/"},{"id":169892,"url":"https://patchwork.plctlab.org/api/1.2/patches/169892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2NbuWyWNxe4ce@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:45:41","name":"[committed] Skip analyzer socket tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2NbuWyWNxe4ce@mx3210.localdomain/mbox/"},{"id":169893,"url":"https://patchwork.plctlab.org/api/1.2/patches/169893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2twQpxjbt_yhY@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:47:51","name":"[committed] Skip analyzer strndup test on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2twQpxjbt_yhY@mx3210.localdomain/mbox/"},{"id":169916,"url":"https://patchwork.plctlab.org/api/1.2/patches/169916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126233154.3D67420425@pchp3.se.axis.com/","msgid":"<20231126233154.3D67420425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-26T23:31:54","name":"[Committed] testsuite/gcc.dg/uninit-pred-9_b.c:23: Un-xfail for MMIX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126233154.3D67420425@pchp3.se.axis.com/mbox/"},{"id":169967,"url":"https://patchwork.plctlab.org/api/1.2/patches/169967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127043333.1955900-1-quic_apinski@quicinc.com/","msgid":"<20231127043333.1955900-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T04:33:33","name":"aarch64: Improve cost of `a ? {-,}1 : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127043333.1955900-1-quic_apinski@quicinc.com/mbox/"},{"id":169968,"url":"https://patchwork.plctlab.org/api/1.2/patches/169968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com/","msgid":"<56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T04:40:11","name":"[PING^2,V15,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com/mbox/"},{"id":169969,"url":"https://patchwork.plctlab.org/api/1.2/patches/169969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8cc83-b615-43ed-929a-8b6c35842cc3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T04:43:31","name":"[PING,^2,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8cc83-b615-43ed-929a-8b6c35842cc3@linux.ibm.com/mbox/"},{"id":170005,"url":"https://patchwork.plctlab.org/api/1.2/patches/170005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127062618.21624-1-jose.marchesi@oracle.com/","msgid":"<20231127062618.21624-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-27T06:26:18","name":"[COMMITTED] bpf: remove bpf-helpers.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127062618.21624-1-jose.marchesi@oracle.com/mbox/"},{"id":170050,"url":"https://patchwork.plctlab.org/api/1.2/patches/170050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127083458.307226-1-shihua@iscas.ac.cn/","msgid":"<20231127083458.307226-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-27T08:34:57","name":"Add C intrinsics for scalar crypto extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127083458.307226-1-shihua@iscas.ac.cn/mbox/"},{"id":170068,"url":"https://patchwork.plctlab.org/api/1.2/patches/170068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127094330.EB06E3857BBB@sourceware.org/","msgid":"<20231127094330.EB06E3857BBB@sourceware.org>","list_archive_url":null,"date":"2023-11-27T09:42:59","name":"tree-optimization/112706 - missed simplification of condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127094330.EB06E3857BBB@sourceware.org/mbox/"},{"id":170069,"url":"https://patchwork.plctlab.org/api/1.2/patches/170069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127095355.1535636-2-stefansf@linux.ibm.com/","msgid":"<20231127095355.1535636-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T09:53:56","name":"s390: Fixup builtins vec_rli and verll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127095355.1535636-2-stefansf@linux.ibm.com/mbox/"},{"id":170104,"url":"https://patchwork.plctlab.org/api/1.2/patches/170104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4rxun8.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T12:12:11","name":"Treat \"p\" in asms as addressing VOIDmode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4rxun8.fsf@arm.com/mbox/"},{"id":170117,"url":"https://patchwork.plctlab.org/api/1.2/patches/170117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127123819.1772162-2-stefansf@linux.ibm.com/","msgid":"<20231127123819.1772162-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T12:38:20","name":"s390: Add missing builtin type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127123819.1772162-2-stefansf@linux.ibm.com/mbox/"},{"id":170131,"url":"https://patchwork.plctlab.org/api/1.2/patches/170131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzfyzz75d.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-11-27T12:56:46","name":"libsanitizer: Check assembler support for symbol assignment [PR112563]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzfyzz75d.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":170134,"url":"https://patchwork.plctlab.org/api/1.2/patches/170134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7e3bc8332cd58ce6039292b92e112b6d2a9dd84.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-27T13:16:48","name":"[V4,4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7e3bc8332cd58ce6039292b92e112b6d2a9dd84.camel@tugraz.at/mbox/"},{"id":170137,"url":"https://patchwork.plctlab.org/api/1.2/patches/170137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127132412.2440640-1-juzhe.zhong@rivai.ai/","msgid":"<20231127132412.2440640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-27T13:24:12","name":"RISC-V: Fix VSETVL PASS regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127132412.2440640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":170138,"url":"https://patchwork.plctlab.org/api/1.2/patches/170138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com/","msgid":"<4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com>","list_archive_url":null,"date":"2023-11-27T13:38:48","name":"[committed] amdgcn: Disallow TImode vector permute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com/mbox/"},{"id":170188,"url":"https://patchwork.plctlab.org/api/1.2/patches/170188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127143154.6FA693857735@sourceware.org/","msgid":"<20231127143154.6FA693857735@sourceware.org>","list_archive_url":null,"date":"2023-11-27T14:31:22","name":"tree-optimization/112653 - PTA and return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127143154.6FA693857735@sourceware.org/mbox/"},{"id":170208,"url":"https://patchwork.plctlab.org/api/1.2/patches/170208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzb6pc.fsf@oracle.com/","msgid":"<87msuzb6pc.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-27T14:40:15","name":"bpf: Throw error when external libcalls are generated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzb6pc.fsf@oracle.com/mbox/"},{"id":170210,"url":"https://patchwork.plctlab.org/api/1.2/patches/170210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttp7w8zx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T14:45:06","name":"[pushed] aarch64: Move and generalise vect_all_same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttp7w8zx.fsf@arm.com/mbox/"},{"id":170211,"url":"https://patchwork.plctlab.org/api/1.2/patches/170211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7ffw8yv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T14:45:44","name":"[pushed] aarch64: Remove redundant zeroing/merging in SVE intrinsics [PR106326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7ffw8yv.fsf@arm.com/mbox/"},{"id":170212,"url":"https://patchwork.plctlab.org/api/1.2/patches/170212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzs14u.fsf@euler.schwinge.homeip.net/","msgid":"<87msuzs14u.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-27T14:48:33","name":"hurd: Add multilib paths for gnu-x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzs14u.fsf@euler.schwinge.homeip.net/mbox/"},{"id":170217,"url":"https://patchwork.plctlab.org/api/1.2/patches/170217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3s0z1.fsf@euler.schwinge.homeip.net/","msgid":"<87jzq3s0z1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-27T14:52:02","name":"hurd: Ad default-pie and static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3s0z1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":170344,"url":"https://patchwork.plctlab.org/api/1.2/patches/170344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3az8b.fsf@oracle.com/","msgid":"<87jzq3az8b.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-27T17:21:40","name":"[v2] Fixed problem with BTF defining smaller enums.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3az8b.fsf@oracle.com/mbox/"},{"id":170348,"url":"https://patchwork.plctlab.org/api/1.2/patches/170348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com/","msgid":"<4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com>","list_archive_url":null,"date":"2023-11-27T17:35:22","name":"[v2] Fortran: fix reallocation on assignment of polymorphic variables [PR110415]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com/mbox/"},{"id":170352,"url":"https://patchwork.plctlab.org/api/1.2/patches/170352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127180209.548531-1-rearnsha@arm.com/","msgid":"<20231127180209.548531-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-27T18:02:09","name":"[committed] arm: libgcc: tweak warning from __sync_synchronize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127180209.548531-1-rearnsha@arm.com/mbox/"},{"id":170357,"url":"https://patchwork.plctlab.org/api/1.2/patches/170357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-27T18:16:17","name":"tree-sra: Avoid returns of references to SRA candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":170486,"url":"https://patchwork.plctlab.org/api/1.2/patches/170486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18033-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T22:40:37","name":"middle-end: prevent LIM from hoising vector compares from gconds if target does not support it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18033-tamar@arm.com/mbox/"},{"id":170487,"url":"https://patchwork.plctlab.org/api/1.2/patches/170487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18034-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T22:40:58","name":"middle-end: refactor vectorizable_live_operation into helper method for codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18034-tamar@arm.com/mbox/"},{"id":170495,"url":"https://patchwork.plctlab.org/api/1.2/patches/170495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127225818.613815-1-quic_apinski@quicinc.com/","msgid":"<20231127225818.613815-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T22:58:18","name":"[COMMITTED] Fix time-profiler-3.c after r14-5628-g53ba8d669550d3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127225818.613815-1-quic_apinski@quicinc.com/mbox/"},{"id":170496,"url":"https://patchwork.plctlab.org/api/1.2/patches/170496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127230845.615689-1-quic_apinski@quicinc.com/","msgid":"<20231127230845.615689-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T23:08:45","name":"aarch64: Improve cost of `a ? {-,}1 : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127230845.615689-1-quic_apinski@quicinc.com/mbox/"},{"id":170509,"url":"https://patchwork.plctlab.org/api/1.2/patches/170509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWUreYSYOpXs0jze@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-27T23:51:21","name":"fold-mem-offsets: Fix powerpc64le-linux profiledbootstrap [PR111601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWUreYSYOpXs0jze@tucnak/mbox/"},{"id":170521,"url":"https://patchwork.plctlab.org/api/1.2/patches/170521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128023227.36200-1-gaofei@eswincomputing.com/","msgid":"<20231128023227.36200-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T02:32:24","name":"[1/4,RISC-V] prefer Zicond primitive semantics to SFB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128023227.36200-1-gaofei@eswincomputing.com/mbox/"},{"id":170522,"url":"https://patchwork.plctlab.org/api/1.2/patches/170522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128025527.36740-1-wangfeng@eswincomputing.com/","msgid":"<20231128025527.36740-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T02:55:27","name":"[v2] gimple-match.pd Add more optimization for gimple_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128025527.36740-1-wangfeng@eswincomputing.com/mbox/"},{"id":170530,"url":"https://patchwork.plctlab.org/api/1.2/patches/170530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128044326.734466-1-quic_apinski@quicinc.com/","msgid":"<20231128044326.734466-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-28T04:43:26","name":"MATCH: Fix invalid signed boolean type usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128044326.734466-1-quic_apinski@quicinc.com/mbox/"},{"id":170574,"url":"https://patchwork.plctlab.org/api/1.2/patches/170574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073837.2451935-1-liwei@loongson.cn/","msgid":"<20231128073837.2451935-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:38:37","name":"[v1,1/2] LoongArch: Accelerate optimization of scalar signed/unsigned popcount.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073837.2451935-1-liwei@loongson.cn/mbox/"},{"id":170575,"url":"https://patchwork.plctlab.org/api/1.2/patches/170575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073900.2452086-1-liwei@loongson.cn/","msgid":"<20231128073900.2452086-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:39:00","name":"[v1,2/2] LoongArch: Optimize vector constant extract-{even/odd} permutation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073900.2452086-1-liwei@loongson.cn/mbox/"},{"id":170576,"url":"https://patchwork.plctlab.org/api/1.2/patches/170576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/deee9182-fe94-42a3-b53a-6336f6b1bec3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-28T07:43:21","name":"Expand: Pass down equality only flag to cmpmem expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/deee9182-fe94-42a3-b53a-6336f6b1bec3@linux.ibm.com/mbox/"},{"id":170579,"url":"https://patchwork.plctlab.org/api/1.2/patches/170579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075212.3526692-1-hongtao.liu@intel.com/","msgid":"<20231128075212.3526692-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-28T07:52:12","name":"Take register pressure into account for vec_construct when the components are not loaded from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075212.3526692-1-hongtao.liu@intel.com/mbox/"},{"id":170580,"url":"https://patchwork.plctlab.org/api/1.2/patches/170580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075424.18703-1-chenxiaolong@loongson.cn/","msgid":"<20231128075424.18703-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:54:24","name":"[v1] LoongArch: Added vectorized hardware inspection for testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075424.18703-1-chenxiaolong@loongson.cn/mbox/"},{"id":170582,"url":"https://patchwork.plctlab.org/api/1.2/patches/170582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075635.2484351-1-liwei@loongson.cn/","msgid":"<20231128075635.2484351-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:56:35","name":"[v1] LoongArch: Remove duplicate definition of CLZ_DEFINED_VALUE_AT_ZERO.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075635.2484351-1-liwei@loongson.cn/mbox/"},{"id":170584,"url":"https://patchwork.plctlab.org/api/1.2/patches/170584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128080033.1105900-1-juzhe.zhong@rivai.ai/","msgid":"<20231128080033.1105900-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-28T08:00:33","name":"RISC-V: Disallow poly (1,1) VLA SLP interleave vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128080033.1105900-1-juzhe.zhong@rivai.ai/mbox/"},{"id":170600,"url":"https://patchwork.plctlab.org/api/1.2/patches/170600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWjN0dxBKkIod2F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:22:15","name":"c++: Fix up __has_extension (cxx_init_captures)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWjN0dxBKkIod2F@tucnak/mbox/"},{"id":170602,"url":"https://patchwork.plctlab.org/api/1.2/patches/170602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128082716.1437220-1-dmalcolm@redhat.com/","msgid":"<20231128082716.1437220-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-28T08:27:15","name":"[pushed] analyzer: install header files for use by plugins [PR109077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128082716.1437220-1-dmalcolm@redhat.com/mbox/"},{"id":170605,"url":"https://patchwork.plctlab.org/api/1.2/patches/170605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWk9ObmRt5RlIuV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:29:40","name":"match.pd: Fix popcount (X) + popcount (Y) simplification [PR112719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWk9ObmRt5RlIuV@tucnak/mbox/"},{"id":170618,"url":"https://patchwork.plctlab.org/api/1.2/patches/170618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWmdfKznvpqZ2Ua@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:36:05","name":"match.pd: Fix parity (X) ^ parity (Y) simplification [PR112719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWmdfKznvpqZ2Ua@tucnak/mbox/"},{"id":170637,"url":"https://patchwork.plctlab.org/api/1.2/patches/170637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWrgW9blojZXhV1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:57:37","name":"testsuite: Fix up pr111754.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWrgW9blojZXhV1@tucnak/mbox/"},{"id":170643,"url":"https://patchwork.plctlab.org/api/1.2/patches/170643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093809.2970405-1-poulhies@adacore.com/","msgid":"<20231128093809.2970405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:09","name":"[COMMITTED] ada: Fix predicate failure that occurred in a test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093809.2970405-1-poulhies@adacore.com/mbox/"},{"id":170644,"url":"https://patchwork.plctlab.org/api/1.2/patches/170644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093829.2970640-1-poulhies@adacore.com/","msgid":"<20231128093829.2970640-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:29","name":"[COMMITTED] ada: Remove dependency on System.Val_Bool in System.Img_Bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093829.2970640-1-poulhies@adacore.com/mbox/"},{"id":170646,"url":"https://patchwork.plctlab.org/api/1.2/patches/170646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093842.2970706-1-poulhies@adacore.com/","msgid":"<20231128093842.2970706-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:42","name":"[COMMITTED] ada: Handle unchecked conversion in bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093842.2970706-1-poulhies@adacore.com/mbox/"},{"id":170648,"url":"https://patchwork.plctlab.org/api/1.2/patches/170648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093851.2970777-1-poulhies@adacore.com/","msgid":"<20231128093851.2970777-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:51","name":"[COMMITTED] ada: Fix internal error on declare expression in expression function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093851.2970777-1-poulhies@adacore.com/mbox/"},{"id":170647,"url":"https://patchwork.plctlab.org/api/1.2/patches/170647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093900.2970843-1-poulhies@adacore.com/","msgid":"<20231128093900.2970843-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:00","name":"[COMMITTED] ada: Type error on container aggregate with loop_parameter_specification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093900.2970843-1-poulhies@adacore.com/mbox/"},{"id":170649,"url":"https://patchwork.plctlab.org/api/1.2/patches/170649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093912.2970916-1-poulhies@adacore.com/","msgid":"<20231128093912.2970916-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:12","name":"[COMMITTED] ada: Add new predicate Is_Address_Compatible_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093912.2970916-1-poulhies@adacore.com/mbox/"},{"id":170650,"url":"https://patchwork.plctlab.org/api/1.2/patches/170650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093921.2970982-1-poulhies@adacore.com/","msgid":"<20231128093921.2970982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:21","name":"[COMMITTED] ada: Fix premature finalization for nested return within extended one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093921.2970982-1-poulhies@adacore.com/mbox/"},{"id":170653,"url":"https://patchwork.plctlab.org/api/1.2/patches/170653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093931.2971051-1-poulhies@adacore.com/","msgid":"<20231128093931.2971051-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:31","name":"[COMMITTED] ada: Fix incorrect quoting in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093931.2971051-1-poulhies@adacore.com/mbox/"},{"id":170652,"url":"https://patchwork.plctlab.org/api/1.2/patches/170652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093940.2971116-1-poulhies@adacore.com/","msgid":"<20231128093940.2971116-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:40","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093940.2971116-1-poulhies@adacore.com/mbox/"},{"id":170656,"url":"https://patchwork.plctlab.org/api/1.2/patches/170656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093950.2971184-1-poulhies@adacore.com/","msgid":"<20231128093950.2971184-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:50","name":"[COMMITTED] ada: False alarms from -gnatw.t with generic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093950.2971184-1-poulhies@adacore.com/mbox/"},{"id":170654,"url":"https://patchwork.plctlab.org/api/1.2/patches/170654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093959.2971252-1-poulhies@adacore.com/","msgid":"<20231128093959.2971252-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:59","name":"[COMMITTED] ada: Errors on instance of Multiway_Trees with discriminated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093959.2971252-1-poulhies@adacore.com/mbox/"},{"id":170655,"url":"https://patchwork.plctlab.org/api/1.2/patches/170655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128094008.2971318-1-poulhies@adacore.com/","msgid":"<20231128094008.2971318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:40:08","name":"[COMMITTED] ada: Error compiling reduction expression with overloaded reducer subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128094008.2971318-1-poulhies@adacore.com/mbox/"},{"id":170670,"url":"https://patchwork.plctlab.org/api/1.2/patches/170670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128101047.12989-1-gaofei@eswincomputing.com/","msgid":"<20231128101047.12989-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T10:10:47","name":"[ifcvt,V2] optimize x=c ? (y and z) : y, where z is a reg or imm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128101047.12989-1-gaofei@eswincomputing.com/mbox/"},{"id":170735,"url":"https://patchwork.plctlab.org/api/1.2/patches/170735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e15951ed-3430-46bf-9a5f-2d57c16452d0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-28T11:28:05","name":"OpenMP: Support acquires/release in '\''omp require atomic_default_mem_order'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e15951ed-3430-46bf-9a5f-2d57c16452d0@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-11/mbox/"},{"id":46,"url":"https://patchwork.plctlab.org/api/1.2/bundles/46/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-12","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":172177,"url":"https://patchwork.plctlab.org/api/1.2/patches/172177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129114905.3057404-1-christoph.muellner@vrull.eu/","msgid":"<20231129114905.3057404-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-29T11:49:05","name":"[RFC] RISC-V: Remove f{r,s}flags builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129114905.3057404-1-christoph.muellner@vrull.eu/mbox/"},{"id":171653,"url":"https://patchwork.plctlab.org/api/1.2/patches/171653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129231446.204221-1-juzhe.zhong@rivai.ai/","msgid":"<20231129231446.204221-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-29T23:14:46","name":"[Committed] RISC-V: Rename vconstraint into group_overlap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129231446.204221-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171654,"url":"https://patchwork.plctlab.org/api/1.2/patches/171654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org/","msgid":"<4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org>","list_archive_url":null,"date":"2023-11-29T23:46:07","name":": gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org/mbox/"},{"id":171655,"url":"https://patchwork.plctlab.org/api/1.2/patches/171655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130000547.GA62552@ldh-imac.local/","msgid":"<20231130000547.GA62552@ldh-imac.local>","list_archive_url":null,"date":"2023-11-30T00:05:47","name":"ping: [PATCH] diagnostics: Fix behavior of permerror options after diagnostic pop [PR111918]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130000547.GA62552@ldh-imac.local/mbox/"},{"id":171704,"url":"https://patchwork.plctlab.org/api/1.2/patches/171704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130023842.2332222-1-juzhe.zhong@rivai.ai/","msgid":"<20231130023842.2332222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T02:38:42","name":"[Committed] RISC-V: Support highpart overlap for floating-point widen instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130023842.2332222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171718,"url":"https://patchwork.plctlab.org/api/1.2/patches/171718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc7b70fa3497664a58b3c0b36fa94f9ec87d4f22.1701312907.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T02:55:44","name":"[committed,(pre-approved)] RISC-V: Fix '\''E'\'' extension version to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc7b70fa3497664a58b3c0b36fa94f9ec87d4f22.1701312907.git.research_trasio@irq.a4lg.com/mbox/"},{"id":171722,"url":"https://patchwork.plctlab.org/api/1.2/patches/171722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130032206.17968-1-chenglulu@loongson.cn/","msgid":"<20231130032206.17968-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-30T03:22:06","name":"[v2] LoongArch: Add intrinsic function descriptions for LSX and LASX instructions to doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130032206.17968-1-chenglulu@loongson.cn/mbox/"},{"id":171734,"url":"https://patchwork.plctlab.org/api/1.2/patches/171734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130050027.700656-1-jason@redhat.com/","msgid":"<20231130050027.700656-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-30T05:00:27","name":"[pushed] c++: remove LAMBDA_EXPR_MUTABLE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130050027.700656-1-jason@redhat.com/mbox/"},{"id":171742,"url":"https://patchwork.plctlab.org/api/1.2/patches/171742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130061652.1382-1-wangfeng@eswincomputing.com/","msgid":"<20231130061652.1382-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-30T06:16:52","name":"RISC-V: Update crypto vector ISA info with latest spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130061652.1382-1-wangfeng@eswincomputing.com/mbox/"},{"id":171748,"url":"https://patchwork.plctlab.org/api/1.2/patches/171748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130064905.2716758-1-juzhe.zhong@rivai.ai/","msgid":"<20231130064905.2716758-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T06:49:05","name":"RISC-V: Support widening register overlap for vf4/vf8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130064905.2716758-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171750,"url":"https://patchwork.plctlab.org/api/1.2/patches/171750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130072105.2462309-1-pan2.li@intel.com/","msgid":"<20231130072105.2462309-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-30T07:21:05","name":"[v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130072105.2462309-1-pan2.li@intel.com/mbox/"},{"id":171762,"url":"https://patchwork.plctlab.org/api/1.2/patches/171762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qc71xqw.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-30T07:55:19","name":"hardcfr: libgcc sym versioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qc71xqw.fsf@lxoliva.fsfla.org/mbox/"},{"id":171771,"url":"https://patchwork.plctlab.org/api/1.2/patches/171771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240A5E3CCDD06E80624CE9BE882A@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T08:27:33","name":"aarch64: modify Ampere CPU tunings on reassociation/FMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240A5E3CCDD06E80624CE9BE882A@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":171792,"url":"https://patchwork.plctlab.org/api/1.2/patches/171792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130094623.14211-1-xry111@xry111.site/","msgid":"<20231130094623.14211-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-30T09:46:18","name":"doc: Update the status of build directory not fully separated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130094623.14211-1-xry111@xry111.site/mbox/"},{"id":171798,"url":"https://patchwork.plctlab.org/api/1.2/patches/171798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101545.3206213-1-christophe.lyon@linaro.org/","msgid":"<20231130101545.3206213-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-30T10:15:45","name":"testsuite/arm: Fix bfloat16_vector_typecheck_[12].c tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101545.3206213-1-christophe.lyon@linaro.org/mbox/"},{"id":171799,"url":"https://patchwork.plctlab.org/api/1.2/patches/171799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101848.3093719-1-poulhies@adacore.com/","msgid":"<20231130101848.3093719-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:18:47","name":"[COMMITTED] ada: Constant_Indexing used when context requires a variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101848.3093719-1-poulhies@adacore.com/mbox/"},{"id":171800,"url":"https://patchwork.plctlab.org/api/1.2/patches/171800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101900.3093876-1-poulhies@adacore.com/","msgid":"<20231130101900.3093876-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:00","name":"[COMMITTED] ada: Fix wrong finalization for qualified aggregate of limited type in allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101900.3093876-1-poulhies@adacore.com/mbox/"},{"id":171801,"url":"https://patchwork.plctlab.org/api/1.2/patches/171801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101902.3093945-1-poulhies@adacore.com/","msgid":"<20231130101902.3093945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:02","name":"[COMMITTED] ada: Fix predicate check failure in Expand_Allocator_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101902.3093945-1-poulhies@adacore.com/mbox/"},{"id":171805,"url":"https://patchwork.plctlab.org/api/1.2/patches/171805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101904.3094006-1-poulhies@adacore.com/","msgid":"<20231130101904.3094006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:03","name":"[COMMITTED] ada: Too-strict conformance checking for formal discriminated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101904.3094006-1-poulhies@adacore.com/mbox/"},{"id":171802,"url":"https://patchwork.plctlab.org/api/1.2/patches/171802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101905.3094070-1-poulhies@adacore.com/","msgid":"<20231130101905.3094070-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:05","name":"[COMMITTED] ada: Add comment describing Partition_Elaboration_Policy dependency.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101905.3094070-1-poulhies@adacore.com/mbox/"},{"id":171806,"url":"https://patchwork.plctlab.org/api/1.2/patches/171806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101909.3094195-1-poulhies@adacore.com/","msgid":"<20231130101909.3094195-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:09","name":"[COMMITTED] ada: Crash initializing component of private record type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101909.3094195-1-poulhies@adacore.com/mbox/"},{"id":171814,"url":"https://patchwork.plctlab.org/api/1.2/patches/171814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101910.3094256-1-poulhies@adacore.com/","msgid":"<20231130101910.3094256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:10","name":"[COMMITTED] ada: Fix spelling of functions with(out) \"side effects\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101910.3094256-1-poulhies@adacore.com/mbox/"},{"id":171815,"url":"https://patchwork.plctlab.org/api/1.2/patches/171815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101912.3094317-1-poulhies@adacore.com/","msgid":"<20231130101912.3094317-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:12","name":"[COMMITTED] ada: Ignore defered compile time errors without backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101912.3094317-1-poulhies@adacore.com/mbox/"},{"id":171811,"url":"https://patchwork.plctlab.org/api/1.2/patches/171811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101914.3094378-1-poulhies@adacore.com/","msgid":"<20231130101914.3094378-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:14","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101914.3094378-1-poulhies@adacore.com/mbox/"},{"id":171819,"url":"https://patchwork.plctlab.org/api/1.2/patches/171819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101916.3094439-1-poulhies@adacore.com/","msgid":"<20231130101916.3094439-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:16","name":"[COMMITTED] ada: Remove SPARK legality checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101916.3094439-1-poulhies@adacore.com/mbox/"},{"id":171816,"url":"https://patchwork.plctlab.org/api/1.2/patches/171816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101918.3094500-1-poulhies@adacore.com/","msgid":"<20231130101918.3094500-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:17","name":"[COMMITTED] ada: Support Put_Image for types in user-defined instances of predefined generics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101918.3094500-1-poulhies@adacore.com/mbox/"},{"id":171817,"url":"https://patchwork.plctlab.org/api/1.2/patches/171817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101919.3094562-1-poulhies@adacore.com/","msgid":"<20231130101919.3094562-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:19","name":"[COMMITTED] ada: Rework fix for wrong finalization of qualified aggregate in allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101919.3094562-1-poulhies@adacore.com/mbox/"},{"id":171820,"url":"https://patchwork.plctlab.org/api/1.2/patches/171820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130102014.3198938-1-juzhe.zhong@rivai.ai/","msgid":"<20231130102014.3198938-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T10:20:14","name":"RISC-V: Remove earlyclobber for wx/wf instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130102014.3198938-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171884,"url":"https://patchwork.plctlab.org/api/1.2/patches/171884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130134205.12445-1-xry111@xry111.site/","msgid":"<20231130134205.12445-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-30T13:41:07","name":"[v2] doc: Update the status of build directory not fully separated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130134205.12445-1-xry111@xry111.site/mbox/"},{"id":171927,"url":"https://patchwork.plctlab.org/api/1.2/patches/171927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt34wne3hn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:10:28","name":"Ping: [PATCH] Add a late-combine pass [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt34wne3hn.fsf@arm.com/mbox/"},{"id":171928,"url":"https://patchwork.plctlab.org/api/1.2/patches/171928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmtzcous.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:11:55","name":"Ping: [PATCH] Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmtzcous.fsf@arm.com/mbox/"},{"id":171943,"url":"https://patchwork.plctlab.org/api/1.2/patches/171943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWihkd4+/v4UmLkD@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:52:01","name":"[wwwdocs] gcc-14/changes.html: Update C++ news for GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWihkd4+/v4UmLkD@redhat.com/mbox/"},{"id":171944,"url":"https://patchwork.plctlab.org/api/1.2/patches/171944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qv5lwl.fsf@euler.schwinge.homeip.net/","msgid":"<87a5qv5lwl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-30T14:57:30","name":"In '\''libgomp.c/declare-variant-{3,4}-*.c'\'', restrict '\''scan-offload-tree-dump'\''s to '\''only_for_offload_target [...]'\'' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qv5lwl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":171949,"url":"https://patchwork.plctlab.org/api/1.2/patches/171949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877clz5lta.fsf@euler.schwinge.homeip.net/","msgid":"<877clz5lta.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-30T14:59:29","name":"Spin '\''dg-do run'\'' part of '\''libgomp.c/declare-variant-3-sm30.c'\'' off into new '\''libgomp.c/declare-variant-3.c'\'' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877clz5lta.fsf@euler.schwinge.homeip.net/mbox/"},{"id":171952,"url":"https://patchwork.plctlab.org/api/1.2/patches/171952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-11-30T15:15:04","name":"Fix '\''libgomp.c/declare-variant-4-*.c'\'', add '\''libgomp.c/declare-variant-4.c'\'' (was: [PATCH] amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":171965,"url":"https://patchwork.plctlab.org/api/1.2/patches/171965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154547.17694-1-jchrist@linux.ibm.com/","msgid":"<20231130154547.17694-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-30T15:45:47","name":"s390x: Fix PR112753","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154547.17694-1-jchrist@linux.ibm.com/mbox/"},{"id":172016,"url":"https://patchwork.plctlab.org/api/1.2/patches/172016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154744.74164-1-jwakely@redhat.com/","msgid":"<20231130154744.74164-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:47:24","name":"[committed] libstdc++: Fix std::ranges::to errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154744.74164-1-jwakely@redhat.com/mbox/"},{"id":171966,"url":"https://patchwork.plctlab.org/api/1.2/patches/171966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155041.74365-1-jwakely@redhat.com/","msgid":"<20231130155041.74365-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:49:59","name":"libstdc++: Implement LGW 4016 for std::ranges::to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155041.74365-1-jwakely@redhat.com/mbox/"},{"id":172003,"url":"https://patchwork.plctlab.org/api/1.2/patches/172003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155155.74430-1-jwakely@redhat.com/","msgid":"<20231130155155.74430-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:50:50","name":"libstdc++: Add workaround to std::ranges::subrange [PR111948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155155.74430-1-jwakely@redhat.com/mbox/"},{"id":171990,"url":"https://patchwork.plctlab.org/api/1.2/patches/171990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130162054.89738-1-sebastian.huber@embedded-brains.de/","msgid":"<20231130162054.89738-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-30T16:20:54","name":"gcov: Fix __LIBGCC_HAVE_LIBATOMIC definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130162054.89738-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":172081,"url":"https://patchwork.plctlab.org/api/1.2/patches/172081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org/","msgid":"<5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org>","list_archive_url":null,"date":"2023-11-30T17:59:56","name":"htdocs/git.html: correct spelling and use git in example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org/mbox/"},{"id":172118,"url":"https://patchwork.plctlab.org/api/1.2/patches/172118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130192252.3123291-1-ppalka@redhat.com/","msgid":"<20231130192252.3123291-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-30T19:22:52","name":"libstdc++: Simplify ranges::to closure objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130192252.3123291-1-ppalka@redhat.com/mbox/"},{"id":172160,"url":"https://patchwork.plctlab.org/api/1.2/patches/172160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130213149.25254-1-manos.anagnostakis@vrull.eu/","msgid":"<20231130213149.25254-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-11-30T21:31:49","name":"[v3] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130213149.25254-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":172145,"url":"https://patchwork.plctlab.org/api/1.2/patches/172145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221727.3044519-1-indu.bhagat@oracle.com/","msgid":"<20231130221727.3044519-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-11-30T22:17:27","name":"btf: fix PR debug/112768","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221727.3044519-1-indu.bhagat@oracle.com/mbox/"},{"id":172147,"url":"https://patchwork.plctlab.org/api/1.2/patches/172147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221818.3044556-1-indu.bhagat@oracle.com/","msgid":"<20231130221818.3044556-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-11-30T22:18:18","name":"btf: fix PR debug/112656","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221818.3044556-1-indu.bhagat@oracle.com/mbox/"},{"id":172146,"url":"https://patchwork.plctlab.org/api/1.2/patches/172146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com/","msgid":"<2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com>","list_archive_url":null,"date":"2023-11-30T22:22:35","name":"RISC-V: Vectorized str(n)cmp and strlen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com/mbox/"},{"id":172194,"url":"https://patchwork.plctlab.org/api/1.2/patches/172194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201005110.2689714-1-juzhe.zhong@rivai.ai/","msgid":"<20231201005110.2689714-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T00:51:10","name":"RISC-V: Fix VSETVL PASS regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201005110.2689714-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172217,"url":"https://patchwork.plctlab.org/api/1.2/patches/172217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201022100.955917-2-haochen.jiang@intel.com/","msgid":"<20231201022100.955917-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-01T02:21:00","name":"i386: Mark Xeon Phi ISAs as deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201022100.955917-2-haochen.jiang@intel.com/mbox/"},{"id":172220,"url":"https://patchwork.plctlab.org/api/1.2/patches/172220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201023850.1118763-1-hongtao.liu@intel.com/","msgid":"<20231201023850.1118763-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-01T02:38:50","name":"Take register pressure into account for vec_construct/scalar_to_vec when the components are not loaded from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201023850.1118763-1-hongtao.liu@intel.com/mbox/"},{"id":172222,"url":"https://patchwork.plctlab.org/api/1.2/patches/172222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com/","msgid":"<770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com>","list_archive_url":null,"date":"2023-12-01T02:41:43","name":"[patch-1,rs6000] enable fctiw on old archs [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com/mbox/"},{"id":172221,"url":"https://patchwork.plctlab.org/api/1.2/patches/172221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com/","msgid":"<85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com>","list_archive_url":null,"date":"2023-12-01T02:42:03","name":"[patch-2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com/mbox/"},{"id":172235,"url":"https://patchwork.plctlab.org/api/1.2/patches/172235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201035003.857697-1-jason@redhat.com/","msgid":"<20231201035003.857697-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-01T03:50:03","name":"c++: lambda capture and explicit object parm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201035003.857697-1-jason@redhat.com/mbox/"},{"id":172286,"url":"https://patchwork.plctlab.org/api/1.2/patches/172286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201070027.581910-1-juzhe.zhong@rivai.ai/","msgid":"<20231201070027.581910-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T07:00:27","name":"RISC-V: Support highpart register overlap for widen vx/vf instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201070027.581910-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172301,"url":"https://patchwork.plctlab.org/api/1.2/patches/172301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmLSvbSQY8TVNnp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:29:14","name":"lower-bitint: Fix _BitInt .{ADD,SUB}_OVERFLOW lowering [PR112750]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmLSvbSQY8TVNnp@tucnak/mbox/"},{"id":172302,"url":"https://patchwork.plctlab.org/api/1.2/patches/172302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmMi5qkXwmNgBYY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:34:35","name":"lower-bitint: Fix ICE on bitint-39.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmMi5qkXwmNgBYY@tucnak/mbox/"},{"id":172304,"url":"https://patchwork.plctlab.org/api/1.2/patches/172304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-2-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:24","name":"[v2,1/3] LoongArch: Adjust D version strings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-2-yangyujie@loongson.cn/mbox/"},{"id":172306,"url":"https://patchwork.plctlab.org/api/1.2/patches/172306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-3-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:25","name":"[v2,2/3] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-3-yangyujie@loongson.cn/mbox/"},{"id":172305,"url":"https://patchwork.plctlab.org/api/1.2/patches/172305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-4-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:26","name":"[v2,3/3] libphobos: LoongArch hardware support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-4-yangyujie@loongson.cn/mbox/"},{"id":172307,"url":"https://patchwork.plctlab.org/api/1.2/patches/172307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201075235.2345384-1-pan2.li@intel.com/","msgid":"<20231201075235.2345384-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-01T07:52:35","name":"[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201075235.2345384-1-pan2.li@intel.com/mbox/"},{"id":172308,"url":"https://patchwork.plctlab.org/api/1.2/patches/172308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmSCTzJaaBoRJjq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:58:01","name":"lower-bitint: Fix up maximum addition/subtraction/multiplication result computations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmSCTzJaaBoRJjq@tucnak/mbox/"},{"id":172310,"url":"https://patchwork.plctlab.org/api/1.2/patches/172310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmTzwDzPS0bLtv9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T08:05:35","name":"lower-bitint: Fix up handle_operand_addr for 0 constants [PR112771]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmTzwDzPS0bLtv9@tucnak/mbox/"},{"id":172311,"url":"https://patchwork.plctlab.org/api/1.2/patches/172311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmU57saVAdB1wGp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T08:10:15","name":"lower-bitint: Fix lowering of middle sized _BitInt operations which can throw [PR112770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmU57saVAdB1wGp@tucnak/mbox/"},{"id":172312,"url":"https://patchwork.plctlab.org/api/1.2/patches/172312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081410.1441609-1-juzhe.zhong@rivai.ai/","msgid":"<20231201081410.1441609-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T08:14:10","name":"RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081410.1441609-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172313,"url":"https://patchwork.plctlab.org/api/1.2/patches/172313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081902.33740-1-sebastian.huber@embedded-brains.de/","msgid":"<20231201081902.33740-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-12-01T08:19:02","name":"gcov: Fix use of __LIBGCC_HAVE_LIBATOMIC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081902.33740-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":172337,"url":"https://patchwork.plctlab.org/api/1.2/patches/172337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com/","msgid":"<004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-01T09:22:44","name":"[RISC-V] Improve style to work around PR 60994 in host compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com/mbox/"},{"id":172380,"url":"https://patchwork.plctlab.org/api/1.2/patches/172380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201094726.14266-1-jose.marchesi@oracle.com/","msgid":"<20231201094726.14266-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-12-01T09:47:26","name":"[COMMITTED] bpf: quote section names whenever necessary in assembly output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201094726.14266-1-jose.marchesi@oracle.com/mbox/"},{"id":172386,"url":"https://patchwork.plctlab.org/api/1.2/patches/172386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201095524.1896396-1-mengqinggang@loongson.cn/","msgid":"<20231201095524.1896396-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-12-01T09:55:24","name":"LoongArch: Add support for TLS descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201095524.1896396-1-mengqinggang@loongson.cn/mbox/"},{"id":172399,"url":"https://patchwork.plctlab.org/api/1.2/patches/172399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-2-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:25","name":"[v3,1/3] LoongArch: Adjust D version strings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-2-yangyujie@loongson.cn/mbox/"},{"id":172401,"url":"https://patchwork.plctlab.org/api/1.2/patches/172401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-3-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:26","name":"[v3,2/3] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-3-yangyujie@loongson.cn/mbox/"},{"id":172400,"url":"https://patchwork.plctlab.org/api/1.2/patches/172400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-4-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:27","name":"[v3,3/3] libruntime: Add fiber context switch code for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-4-yangyujie@loongson.cn/mbox/"},{"id":172402,"url":"https://patchwork.plctlab.org/api/1.2/patches/172402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201101158.2774595-1-pan2.li@intel.com/","msgid":"<20231201101158.2774595-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-01T10:11:58","name":"[v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201101158.2774595-1-pan2.li@intel.com/mbox/"},{"id":172404,"url":"https://patchwork.plctlab.org/api/1.2/patches/172404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWm00S+EZNfpqn2l@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T10:26:25","name":"extend.texi: Fix up defbuiltin* with spaces in return type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWm00S+EZNfpqn2l@tucnak/mbox/"},{"id":172448,"url":"https://patchwork.plctlab.org/api/1.2/patches/172448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuuyxkj.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T11:25:00","name":"[v7] Introduce attribute sym_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuuyxkj.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":172449,"url":"https://patchwork.plctlab.org/api/1.2/patches/172449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWnDFz+FcrkpsHzE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T11:27:19","name":"testsuite: Tweak some further tests for modern C changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWnDFz+FcrkpsHzE@tucnak/mbox/"},{"id":172450,"url":"https://patchwork.plctlab.org/api/1.2/patches/172450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201112739.7352F13928@imap2.dmz-prg2.suse.org/","msgid":"<20231201112739.7352F13928@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-01T11:27:38","name":"Fix ambiguity between vect_get_vec_defs with/without vectype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201112739.7352F13928@imap2.dmz-prg2.suse.org/mbox/"},{"id":172474,"url":"https://patchwork.plctlab.org/api/1.2/patches/172474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201123150.1940367-1-juzhe.zhong@rivai.ai/","msgid":"<20231201123150.1940367-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T12:31:50","name":"RISC-V: Fix incorrect combine of extended scalar pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201123150.1940367-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172478,"url":"https://patchwork.plctlab.org/api/1.2/patches/172478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oril5iytae.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T12:57:29","name":"hardcfr: make builtin_return tests more portable [PR112334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oril5iytae.fsf@lxoliva.fsfla.org/mbox/"},{"id":172497,"url":"https://patchwork.plctlab.org/api/1.2/patches/172497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-1-dmalcolm@redhat.com/","msgid":"<20231201135851.1841421-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-01T13:58:49","name":"[pushed] docs: remove stray reference to -fanalyzer-checker=taint [PR103533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-1-dmalcolm@redhat.com/mbox/"},{"id":172499,"url":"https://patchwork.plctlab.org/api/1.2/patches/172499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-2-dmalcolm@redhat.com/","msgid":"<20231201135851.1841421-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-01T13:58:50","name":"[pushed] diagnostics, analyzer: add optional per-diagnostic property bags to SARIF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-2-dmalcolm@redhat.com/mbox/"},{"id":172523,"url":"https://patchwork.plctlab.org/api/1.2/patches/172523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg6yn48.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:10:47","name":"untyped calls: enable target switching [PR112334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg6yn48.fsf@lxoliva.fsfla.org/mbox/"},{"id":172524,"url":"https://patchwork.plctlab.org/api/1.2/patches/172524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddfs0mt0oc.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:14:27","name":"ada: Fix Ada bootstrap on macOS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddfs0mt0oc.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":172539,"url":"https://patchwork.plctlab.org/api/1.2/patches/172539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9eef014-3fc1-45d2-88bf-6aa4bb0b2fe8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:20:30","name":"RISC-V: Fix rawmemchr implementation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9eef014-3fc1-45d2-88bf-6aa4bb0b2fe8@gmail.com/mbox/"},{"id":172540,"url":"https://patchwork.plctlab.org/api/1.2/patches/172540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com/","msgid":"<10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com>","list_archive_url":null,"date":"2023-12-01T15:21:10","name":"RISC-V: Rename and unify stringop strategy handling [NFC].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com/mbox/"},{"id":172541,"url":"https://patchwork.plctlab.org/api/1.2/patches/172541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com/","msgid":"<072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com>","list_archive_url":null,"date":"2023-12-01T15:21:47","name":"RISC-V: Add vectorized strlen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com/mbox/"},{"id":172542,"url":"https://patchwork.plctlab.org/api/1.2/patches/172542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da68b14f-5562-4533-b583-6469c1e0414e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:23:13","name":"RISC-V: Add vectorized strcmp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da68b14f-5562-4533-b583-6469c1e0414e@gmail.com/mbox/"},{"id":172547,"url":"https://patchwork.plctlab.org/api/1.2/patches/172547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs0luded.fsf@euler.schwinge.homeip.net/","msgid":"<87fs0luded.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-01T15:54:18","name":"c: Turn -Wimplicit-function-declaration into a permerror: Fix '\''gcc.dg/gnu23-builtins-no-dfp-1.c'\'' (was: [PATCH v3 06/11] c: Turn -Wimplicit-function-declaration into a permerror)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs0luded.fsf@euler.schwinge.homeip.net/mbox/"},{"id":172603,"url":"https://patchwork.plctlab.org/api/1.2/patches/172603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172428.C114A33E6C@hamza.pair.com/","msgid":"<20231201172428.C114A33E6C@hamza.pair.com>","list_archive_url":null,"date":"2023-12-01T17:24:26","name":"[pushed] wwwdocs: conduct: Change further creativecommons.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172428.C114A33E6C@hamza.pair.com/mbox/"},{"id":172612,"url":"https://patchwork.plctlab.org/api/1.2/patches/172612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172837.8BA1633E4C@hamza.pair.com/","msgid":"<20231201172837.8BA1633E4C@hamza.pair.com>","list_archive_url":null,"date":"2023-12-01T17:28:34","name":"[pushed] wwwdocs: benchmarks: Remove http://annwm.lbl.gov/bench/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172837.8BA1633E4C@hamza.pair.com/mbox/"},{"id":172615,"url":"https://patchwork.plctlab.org/api/1.2/patches/172615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com/","msgid":"<04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com>","list_archive_url":null,"date":"2023-12-01T18:02:21","name":"[pushed,PR112445,LRA] : Fix \"unable to find a register to spill\" error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com/mbox/"},{"id":172630,"url":"https://patchwork.plctlab.org/api/1.2/patches/172630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com/","msgid":"<6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com>","list_archive_url":null,"date":"2023-12-01T19:13:53","name":"[COMMITTED] Use range_compatible_p in check_operands_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com/mbox/"},{"id":172631,"url":"https://patchwork.plctlab.org/api/1.2/patches/172631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201193359.108618-1-polacek@redhat.com/","msgid":"<20231201193359.108618-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-01T19:33:59","name":"gcc: Disallow trampolines when -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201193359.108618-1-polacek@redhat.com/mbox/"},{"id":172686,"url":"https://patchwork.plctlab.org/api/1.2/patches/172686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWpuJTrUXSL9nSPS@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T23:37:09","name":"[v6] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWpuJTrUXSL9nSPS@redhat.com/mbox/"},{"id":172731,"url":"https://patchwork.plctlab.org/api/1.2/patches/172731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202005914.3621843-1-pan2.li@intel.com/","msgid":"<20231202005914.3621843-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-02T00:59:14","name":"[v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202005914.3621843-1-pan2.li@intel.com/mbox/"},{"id":172739,"url":"https://patchwork.plctlab.org/api/1.2/patches/172739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-2-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:23","name":"[1/3] MATCH: Fix zero_one_valued_p'\''s convert pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-2-quic_apinski@quicinc.com/mbox/"},{"id":172740,"url":"https://patchwork.plctlab.org/api/1.2/patches/172740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-3-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-3-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:24","name":"[2/3] Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-3-quic_apinski@quicinc.com/mbox/"},{"id":172741,"url":"https://patchwork.plctlab.org/api/1.2/patches/172741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-4-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-4-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:25","name":"[3/3] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-4-quic_apinski@quicinc.com/mbox/"},{"id":172751,"url":"https://patchwork.plctlab.org/api/1.2/patches/172751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-2-chenglulu@loongson.cn/","msgid":"<20231202081441.4799-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-02T08:14:40","name":"[v1,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-2-chenglulu@loongson.cn/mbox/"},{"id":172750,"url":"https://patchwork.plctlab.org/api/1.2/patches/172750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-3-chenglulu@loongson.cn/","msgid":"<20231202081441.4799-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-02T08:14:41","name":"[v1,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-3-chenglulu@loongson.cn/mbox/"},{"id":172802,"url":"https://patchwork.plctlab.org/api/1.2/patches/172802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsKeJlGr1NLWweo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T10:44:08","name":"pro_and_epilogue: Call df_note_add_problem () if SHRINK_WRAPPING_ENABLED [PR112760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsKeJlGr1NLWweo@tucnak/mbox/"},{"id":172805,"url":"https://patchwork.plctlab.org/api/1.2/patches/172805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsMN6iX/Cp+B5qJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T10:51:35","name":"c++: #pragma GCC unroll C++ fixes [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsMN6iX/Cp+B5qJ@tucnak/mbox/"},{"id":172806,"url":"https://patchwork.plctlab.org/api/1.2/patches/172806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsPafxjNGE9t0M1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T11:05:13","name":"lower-bitint: Fix up lower_addsub_overflow [PR112807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsPafxjNGE9t0M1@tucnak/mbox/"},{"id":172816,"url":"https://patchwork.plctlab.org/api/1.2/patches/172816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0df7f13-58a2-42fd-9180-87d8bd6f3163@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-12-02T11:57:52","name":"htdocs/contribute.html: correct disctinct->distinct spelling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0df7f13-58a2-42fd-9180-87d8bd6f3163@jguk.org/mbox/"},{"id":172829,"url":"https://patchwork.plctlab.org/api/1.2/patches/172829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edg4epw5.fsf@oldenburg.str.redhat.com/","msgid":"<87edg4epw5.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-12-02T12:43:22","name":"libgcov: Call __builtin_fork instead of fork","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edg4epw5.fsf@oldenburg.str.redhat.com/mbox/"},{"id":172859,"url":"https://patchwork.plctlab.org/api/1.2/patches/172859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202155249.1334525-1-arsen@aarsen.me/","msgid":"<20231202155249.1334525-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-02T15:47:56","name":"download_prerequisites: add --only-gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202155249.1334525-1-arsen@aarsen.me/mbox/"},{"id":172867,"url":"https://patchwork.plctlab.org/api/1.2/patches/172867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuswkss.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-02T17:56:03","name":"[v5] Introduce strub: machine-independent stack scrubbing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuswkss.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":172875,"url":"https://patchwork.plctlab.org/api/1.2/patches/172875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202211554.2319770-1-christoph.muellner@vrull.eu/","msgid":"<20231202211554.2319770-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-02T21:15:54","name":"RISC-V: Document optimization parameter riscv-strcmp-inline-limit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202211554.2319770-1-christoph.muellner@vrull.eu/mbox/"},{"id":172894,"url":"https://patchwork.plctlab.org/api/1.2/patches/172894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddc1341d-9c7c-46e2-a1d4-50223f31c089@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-12-03T00:17:40","name":"gcc/doc: spelling mistakes and example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddc1341d-9c7c-46e2-a1d4-50223f31c089@jguk.org/mbox/"},{"id":172897,"url":"https://patchwork.plctlab.org/api/1.2/patches/172897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-2-ams@codesourcery.com/","msgid":"<20231203003224.1638841-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:22","name":"[v3,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-2-ams@codesourcery.com/mbox/"},{"id":172896,"url":"https://patchwork.plctlab.org/api/1.2/patches/172896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-3-ams@codesourcery.com/","msgid":"<20231203003224.1638841-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:23","name":"[v3,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-3-ams@codesourcery.com/mbox/"},{"id":172898,"url":"https://patchwork.plctlab.org/api/1.2/patches/172898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-4-ams@codesourcery.com/","msgid":"<20231203003224.1638841-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:24","name":"[v3,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-4-ams@codesourcery.com/mbox/"},{"id":172895,"url":"https://patchwork.plctlab.org/api/1.2/patches/172895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org/","msgid":"<367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org>","list_archive_url":null,"date":"2023-12-03T00:32:29","name":"wwwdocs: spelling mistakes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org/mbox/"},{"id":172904,"url":"https://patchwork.plctlab.org/api/1.2/patches/172904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca9c93a6-d9f2-4cd8-87b5-d7b0b68502c1@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:00:19","name":"[committed] Fix frv build after C99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca9c93a6-d9f2-4cd8-87b5-d7b0b68502c1@gmail.com/mbox/"},{"id":172905,"url":"https://patchwork.plctlab.org/api/1.2/patches/172905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbb5313e-ba18-42c0-b310-9f9b41a8abbe@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:04:52","name":"[committed] Fix minor testsuite problems on H8 after C99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbb5313e-ba18-42c0-b310-9f9b41a8abbe@gmail.com/mbox/"},{"id":172906,"url":"https://patchwork.plctlab.org/api/1.2/patches/172906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fdadd430-7724-4c18-be25-936147176a4a@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:10:16","name":"[committed] Fix rx build failure in libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fdadd430-7724-4c18-be25-936147176a4a@gmail.com/mbox/"},{"id":172907,"url":"https://patchwork.plctlab.org/api/1.2/patches/172907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com/","msgid":"<012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:14:49","name":"[committed] Fix nios2 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com/mbox/"},{"id":172909,"url":"https://patchwork.plctlab.org/api/1.2/patches/172909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com/","msgid":"<3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:25:02","name":"[committed] Fix a few arc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com/mbox/"},{"id":172911,"url":"https://patchwork.plctlab.org/api/1.2/patches/172911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c39d1bb0-a8fe-4644-ae0e-0977a430f183@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:33:57","name":"[committed] Fix comp-goto-1.c on 16 bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c39d1bb0-a8fe-4644-ae0e-0977a430f183@gmail.com/mbox/"},{"id":172912,"url":"https://patchwork.plctlab.org/api/1.2/patches/172912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d38084ec-7007-4454-9f0a-5f5f9e8dac40@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:41:48","name":"[committed] Fix pr65369.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d38084ec-7007-4454-9f0a-5f5f9e8dac40@gmail.com/mbox/"},{"id":172913,"url":"https://patchwork.plctlab.org/api/1.2/patches/172913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com/","msgid":"<66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:47:30","name":"[committed] Fix build of libgcc on ports using FDPIC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com/mbox/"},{"id":172914,"url":"https://patchwork.plctlab.org/api/1.2/patches/172914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com/","msgid":"<3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:55:58","name":"[committed] Fix gnu23-builtins-no-dfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com/mbox/"},{"id":172926,"url":"https://patchwork.plctlab.org/api/1.2/patches/172926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7clva91r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T10:13:04","name":"lra: Updates of biggest mode for hard regs [PR112278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7clva91r.fsf@arm.com/mbox/"},{"id":172944,"url":"https://patchwork.plctlab.org/api/1.2/patches/172944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/656c78b2.170a0220.62689.59e8@mx.google.com/","msgid":"<656c78b2.170a0220.62689.59e8@mx.google.com>","list_archive_url":null,"date":"2023-12-03T12:46:36","name":"c++/modules: Prevent treating suppressed debug info as extern template [PR112820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/656c78b2.170a0220.62689.59e8@mx.google.com/mbox/"},{"id":172970,"url":"https://patchwork.plctlab.org/api/1.2/patches/172970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzJot9+UHOofuSX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-03T18:32:02","name":"testsuite: Fix up gcc.target/aarch64/pr112406.c for modern C [PR112406]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzJot9+UHOofuSX@tucnak/mbox/"},{"id":172971,"url":"https://patchwork.plctlab.org/api/1.2/patches/172971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzKks5+qQ/i4t2A@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-03T18:36:02","name":"testsuite: Fix up gcc.target/s390/pr96127.c test for modern C [PR96127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzKks5+qQ/i4t2A@tucnak/mbox/"},{"id":173020,"url":"https://patchwork.plctlab.org/api/1.2/patches/173020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203224741.3438009-1-juzhe.zhong@rivai.ai/","msgid":"<20231203224741.3438009-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-03T22:47:41","name":"[Committed] RISC-V: Robostify the W43, W86, W87 constraint enabled attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203224741.3438009-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173027,"url":"https://patchwork.plctlab.org/api/1.2/patches/173027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com/","msgid":"<006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-03T23:24:12","name":"Workaround array_slice constructor portability issues (with older g++).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com/mbox/"},{"id":173049,"url":"https://patchwork.plctlab.org/api/1.2/patches/173049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-2-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:04","name":"[2/7] RISC-V: Add intrinsic functions for crypto vector Zvbc extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-2-wangfeng@eswincomputing.com/mbox/"},{"id":173050,"url":"https://patchwork.plctlab.org/api/1.2/patches/173050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-3-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:05","name":"[3/7] RISC-V: Add intrinsic functions for crypto vector Zvkg extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-3-wangfeng@eswincomputing.com/mbox/"},{"id":173051,"url":"https://patchwork.plctlab.org/api/1.2/patches/173051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-4-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:06","name":"[4/7] RISC-V: Add intrinsic functions for crypto vector Zvkned extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-4-wangfeng@eswincomputing.com/mbox/"},{"id":173053,"url":"https://patchwork.plctlab.org/api/1.2/patches/173053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-5-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-5-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:07","name":"[5/7] RISC-V: Add intrinsic functions for crypto vector Zvknh[ab] extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-5-wangfeng@eswincomputing.com/mbox/"},{"id":173052,"url":"https://patchwork.plctlab.org/api/1.2/patches/173052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-6-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-6-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:08","name":"[6/7] RISC-V: Add intrinsic functions for crypto vector Zvksed extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-6-wangfeng@eswincomputing.com/mbox/"},{"id":173054,"url":"https://patchwork.plctlab.org/api/1.2/patches/173054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-7-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-7-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:09","name":"[7/7] RISC-V: Add intrinsic functions for crypto vector Zvksh extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-7-wangfeng@eswincomputing.com/mbox/"},{"id":173067,"url":"https://patchwork.plctlab.org/api/1.2/patches/173067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204043945.367103-1-juzhe.zhong@rivai.ai/","msgid":"<20231204043945.367103-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T04:39:45","name":"RISC-V: Fix overlap group incorrect overlap on v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204043945.367103-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173068,"url":"https://patchwork.plctlab.org/api/1.2/patches/173068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204053208.908533-1-hongtao.liu@intel.com/","msgid":"<20231204053208.908533-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-04T05:32:08","name":"Don'\''t vectorize when vector stmts are only vec_contruct and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204053208.908533-1-hongtao.liu@intel.com/mbox/"},{"id":173074,"url":"https://patchwork.plctlab.org/api/1.2/patches/173074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064003.80016-1-kito.cheng@sifive.com/","msgid":"<20231204064003.80016-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:03","name":"[committed] RISC-V: Refine riscv_subset_list::parse [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064003.80016-1-kito.cheng@sifive.com/mbox/"},{"id":173075,"url":"https://patchwork.plctlab.org/api/1.2/patches/173075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064010.80032-1-kito.cheng@sifive.com/","msgid":"<20231204064010.80032-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:10","name":"[committed] RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional implication [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064010.80032-1-kito.cheng@sifive.com/mbox/"},{"id":173076,"url":"https://patchwork.plctlab.org/api/1.2/patches/173076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064018.80048-1-kito.cheng@sifive.com/","msgid":"<20231204064018.80048-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:18","name":"[committed] RISC-V: Add sifive-x280 to -mcpu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064018.80048-1-kito.cheng@sifive.com/mbox/"},{"id":173078,"url":"https://patchwork.plctlab.org/api/1.2/patches/173078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064319.30859-1-wangfeng@eswincomputing.com/","msgid":"<20231204064319.30859-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T06:43:19","name":"[v2] RISC-V: Update crypto vector ISA info with latest spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064319.30859-1-wangfeng@eswincomputing.com/mbox/"},{"id":173080,"url":"https://patchwork.plctlab.org/api/1.2/patches/173080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204070118.1092995-1-hongtao.liu@intel.com/","msgid":"<20231204070118.1092995-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-04T07:01:18","name":"Support udot_prodv*qi with emulation sdot_prodv*hi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204070118.1092995-1-hongtao.liu@intel.com/mbox/"},{"id":173090,"url":"https://patchwork.plctlab.org/api/1.2/patches/173090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2BNARKl5/NbRVg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:35:16","name":"i386: Fix up signbit2 expander [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2BNARKl5/NbRVg@tucnak/mbox/"},{"id":173091,"url":"https://patchwork.plctlab.org/api/1.2/patches/173091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2Bmkzh2VZDhtT9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:36:58","name":"extend.texi: Mark builtin arguments with @var{...}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2Bmkzh2VZDhtT9@tucnak/mbox/"},{"id":173093,"url":"https://patchwork.plctlab.org/api/1.2/patches/173093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2CrlKlvGbe8zpT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:41:34","name":"i386: Fix rtl checking ICE in ix86_elim_entry_set_got [PR112837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2CrlKlvGbe8zpT@tucnak/mbox/"},{"id":173096,"url":"https://patchwork.plctlab.org/api/1.2/patches/173096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204074823.17970-1-kito.cheng@sifive.com/","msgid":"<20231204074823.17970-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T07:48:23","name":"RISC-V: Check if zcd conflicts with zcmt and zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204074823.17970-1-kito.cheng@sifive.com/mbox/"},{"id":173123,"url":"https://patchwork.plctlab.org/api/1.2/patches/173123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204080907.444794-1-pan2.li@intel.com/","msgid":"<20231204080907.444794-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-04T08:09:07","name":"[v1] RISC-V: Add test case for bug PR112813","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204080907.444794-1-pan2.li@intel.com/mbox/"},{"id":173140,"url":"https://patchwork.plctlab.org/api/1.2/patches/173140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204085106.400729-1-juzhe.zhong@rivai.ai/","msgid":"<20231204085106.400729-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T08:51:06","name":"RISC-V: Remove earlyclobber from widen reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204085106.400729-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173150,"url":"https://patchwork.plctlab.org/api/1.2/patches/173150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093506.E9DA913588@imap2.dmz-prg2.suse.org/","msgid":"<20231204093506.E9DA913588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T09:35:06","name":"[1/2,RFC] middle-end/112830 - memcpy expansion drops address-spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093506.E9DA913588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173153,"url":"https://patchwork.plctlab.org/api/1.2/patches/173153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093538.661DF13588@imap2.dmz-prg2.suse.org/","msgid":"<20231204093538.661DF13588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T09:35:38","name":"[2/2] middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093538.661DF13588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173180,"url":"https://patchwork.plctlab.org/api/1.2/patches/173180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b40da958-d5ee-817b-3e0c-30cb4bc3a091@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T09:49:17","name":"range: Workaround different type precision issue between _Float128 and long double [PR112788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b40da958-d5ee-817b-3e0c-30cb4bc3a091@linux.ibm.com/mbox/"},{"id":173183,"url":"https://patchwork.plctlab.org/api/1.2/patches/173183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204095500.1569673-1-christoph.muellner@vrull.eu/","msgid":"<20231204095500.1569673-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-04T09:55:00","name":"[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204095500.1569673-1-christoph.muellner@vrull.eu/mbox/"},{"id":173189,"url":"https://patchwork.plctlab.org/api/1.2/patches/173189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR0102MB348749DE7F642DFC46298CEBE186A@SN6PR0102MB3487.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:05:05","name":"tree-optimization/PR112774 - SCEV: extend the chrec tree with a nonwrapping flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR0102MB348749DE7F642DFC46298CEBE186A@SN6PR0102MB3487.prod.exchangelabs.com/mbox/"},{"id":173195,"url":"https://patchwork.plctlab.org/api/1.2/patches/173195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101142.411128-1-juzhe.zhong@rivai.ai/","msgid":"<20231204101142.411128-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T10:11:42","name":"RISC-V: Support highest-number regno overlap for widen ternary vx instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101142.411128-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173200,"url":"https://patchwork.plctlab.org/api/1.2/patches/173200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101408.570468-1-stefansf@linux.ibm.com/","msgid":"<20231204101408.570468-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-12-04T10:14:08","name":"s390: Fix expansion of vec_step","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101408.570468-1-stefansf@linux.ibm.com/mbox/"},{"id":173209,"url":"https://patchwork.plctlab.org/api/1.2/patches/173209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddwmtus1y1.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:21:26","name":"libiberty: Fix pex_unix_wait return type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddwmtus1y1.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173216,"url":"https://patchwork.plctlab.org/api/1.2/patches/173216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf4is1p2.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:26:49","name":"gm2: Fix mc/mc.flex compilation on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf4is1p2.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173217,"url":"https://patchwork.plctlab.org/api/1.2/patches/173217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddleaas1e1.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:33:26","name":"ada: Fix Ada bootstrap on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddleaas1e1.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173218,"url":"https://patchwork.plctlab.org/api/1.2/patches/173218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddh6kys0zi.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:42:09","name":"libssp: Fix gets-chk.c compilation on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddh6kys0zi.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173221,"url":"https://patchwork.plctlab.org/api/1.2/patches/173221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com/","msgid":"<005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com>","list_archive_url":null,"date":"2023-12-04T10:55:14","name":"expmed: Perform mask extraction via QImode [PR112773].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com/mbox/"},{"id":173235,"url":"https://patchwork.plctlab.org/api/1.2/patches/173235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204115340.CA9C813588@imap2.dmz-prg2.suse.org/","msgid":"<20231204115340.CA9C813588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T11:53:40","name":"tree-optimization/112827 - corrupt SCEV cache during SCCP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204115340.CA9C813588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173257,"url":"https://patchwork.plctlab.org/api/1.2/patches/173257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204121433.54245-1-chenxiaolong@loongson.cn/","msgid":"<20231204121433.54245-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-04T12:14:33","name":"[v1] LoongArch: Modify the check type of the vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204121433.54245-1-chenxiaolong@loongson.cn/mbox/"},{"id":173271,"url":"https://patchwork.plctlab.org/api/1.2/patches/173271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org/","msgid":"<20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T12:34:44","name":"c/86869 - preserve address-space info when building qualified ARRAY_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":173302,"url":"https://patchwork.plctlab.org/api/1.2/patches/173302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/157b3c54-d18f-4908-b20b-b6726545b999@gmail.com/","msgid":"<157b3c54-d18f-4908-b20b-b6726545b999@gmail.com>","list_archive_url":null,"date":"2023-12-04T13:17:43","name":"RISC-V: Fix two testscases related to -std changes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/157b3c54-d18f-4908-b20b-b6726545b999@gmail.com/mbox/"},{"id":173303,"url":"https://patchwork.plctlab.org/api/1.2/patches/173303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleaa6r6u.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T13:19:21","name":"Restore build with GCC 4.8 to GCC 5 (was Re: [PATCH] Workaround array_slice constructor portability issues (with older g++).)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleaa6r6u.fsf_-_@arm.com/mbox/"},{"id":173320,"url":"https://patchwork.plctlab.org/api/1.2/patches/173320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org/","msgid":"<20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T13:24:29","name":"c/89270 - honor registered_builtin_types in type_for_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173330,"url":"https://patchwork.plctlab.org/api/1.2/patches/173330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132549.809D513588@imap2.dmz-prg2.suse.org/","msgid":"<20231204132549.809D513588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T13:25:49","name":"tree-optimization/112818 - re-instantiate vector type size check for bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132549.809D513588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173337,"url":"https://patchwork.plctlab.org/api/1.2/patches/173337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204133206.444790-1-juzhe.zhong@rivai.ai/","msgid":"<20231204133206.444790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T13:32:06","name":"[V2] RISC-V: Support highest-number regno overlap for widen ternary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204133206.444790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173344,"url":"https://patchwork.plctlab.org/api/1.2/patches/173344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204134456.453587-1-juzhe.zhong@rivai.ai/","msgid":"<20231204134456.453587-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T13:44:56","name":"[Committed,V2] RISC-V: Fix overlap group incorrect overlap on v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204134456.453587-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173402,"url":"https://patchwork.plctlab.org/api/1.2/patches/173402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org/","msgid":"<20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T14:33:41","name":"middle-end/112785 - guard against last_clique overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":173486,"url":"https://patchwork.plctlab.org/api/1.2/patches/173486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204164231.784822-1-hawkinsw@obs.cr/","msgid":"<20231204164231.784822-1-hawkinsw@obs.cr>","list_archive_url":null,"date":"2023-12-04T16:42:31","name":"libstdc++: Add test for LWG Issue 3897","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204164231.784822-1-hawkinsw@obs.cr/mbox/"},{"id":173464,"url":"https://patchwork.plctlab.org/api/1.2/patches/173464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com/","msgid":"<2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com>","list_archive_url":null,"date":"2023-12-04T17:09:19","name":"[committed] Fix HImode load mnemonic on microblaze port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com/mbox/"},{"id":173490,"url":"https://patchwork.plctlab.org/api/1.2/patches/173490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204180042.12450-1-manos.anagnostakis@vrull.eu/","msgid":"<20231204180042.12450-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-04T18:00:42","name":"[v4] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204180042.12450-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":173565,"url":"https://patchwork.plctlab.org/api/1.2/patches/173565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW41P9Vh3DjB0BYE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T20:23:27","name":"[v7] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW41P9Vh3DjB0BYE@redhat.com/mbox/"},{"id":173604,"url":"https://patchwork.plctlab.org/api/1.2/patches/173604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234129.1445044-1-jason@redhat.com/","msgid":"<20231204234129.1445044-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-04T23:41:29","name":"[pushed] c++: fix constexpr noreturn diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234129.1445044-1-jason@redhat.com/mbox/"},{"id":173605,"url":"https://patchwork.plctlab.org/api/1.2/patches/173605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234715.9773-1-david.faust@oracle.com/","msgid":"<20231204234715.9773-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-12-04T23:47:15","name":"btf: avoid wrong DATASEC entries for extern vars [PR112849]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234715.9773-1-david.faust@oracle.com/mbox/"},{"id":173626,"url":"https://patchwork.plctlab.org/api/1.2/patches/173626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW5yUyoZa6jJUfzU@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T00:44:03","name":"[v8] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW5yUyoZa6jJUfzU@redhat.com/mbox/"},{"id":173627,"url":"https://patchwork.plctlab.org/api/1.2/patches/173627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205005541.38072-1-vincenzopalazzodev@gmail.com/","msgid":"<20231205005541.38072-1-vincenzopalazzodev@gmail.com>","list_archive_url":null,"date":"2023-12-05T00:55:37","name":"[RFC,1/1] nix: add a simple flake nix shell","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205005541.38072-1-vincenzopalazzodev@gmail.com/mbox/"},{"id":173688,"url":"https://patchwork.plctlab.org/api/1.2/patches/173688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-2-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:32","name":"[01/17,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-2-hongyu.wang@intel.com/mbox/"},{"id":173685,"url":"https://patchwork.plctlab.org/api/1.2/patches/173685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-3-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:33","name":"[02/17,APX,NDD] Restrict TImode register usage when NDD enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-3-hongyu.wang@intel.com/mbox/"},{"id":173681,"url":"https://patchwork.plctlab.org/api/1.2/patches/173681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-4-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:34","name":"[03/17,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-4-hongyu.wang@intel.com/mbox/"},{"id":173677,"url":"https://patchwork.plctlab.org/api/1.2/patches/173677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-5-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:35","name":"[04/17,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-5-hongyu.wang@intel.com/mbox/"},{"id":173690,"url":"https://patchwork.plctlab.org/api/1.2/patches/173690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-6-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:36","name":"[05/17,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-6-hongyu.wang@intel.com/mbox/"},{"id":173679,"url":"https://patchwork.plctlab.org/api/1.2/patches/173679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-7-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:37","name":"[06/17,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-7-hongyu.wang@intel.com/mbox/"},{"id":173682,"url":"https://patchwork.plctlab.org/api/1.2/patches/173682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-9-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:39","name":"[08/17,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-9-hongyu.wang@intel.com/mbox/"},{"id":173686,"url":"https://patchwork.plctlab.org/api/1.2/patches/173686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-10-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:40","name":"[09/17,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-10-hongyu.wang@intel.com/mbox/"},{"id":173689,"url":"https://patchwork.plctlab.org/api/1.2/patches/173689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-11-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:41","name":"[10/17,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-11-hongyu.wang@intel.com/mbox/"},{"id":173687,"url":"https://patchwork.plctlab.org/api/1.2/patches/173687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-12-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:42","name":"[11/17,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-12-hongyu.wang@intel.com/mbox/"},{"id":173695,"url":"https://patchwork.plctlab.org/api/1.2/patches/173695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-13-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:43","name":"[12/17,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-13-hongyu.wang@intel.com/mbox/"},{"id":173706,"url":"https://patchwork.plctlab.org/api/1.2/patches/173706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-14-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:44","name":"[13/17,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-14-hongyu.wang@intel.com/mbox/"},{"id":173694,"url":"https://patchwork.plctlab.org/api/1.2/patches/173694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-15-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:45","name":"[14/17,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-15-hongyu.wang@intel.com/mbox/"},{"id":173703,"url":"https://patchwork.plctlab.org/api/1.2/patches/173703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-16-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:46","name":"[15/17,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-16-hongyu.wang@intel.com/mbox/"},{"id":173680,"url":"https://patchwork.plctlab.org/api/1.2/patches/173680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-17-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:47","name":"[16/17,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-17-hongyu.wang@intel.com/mbox/"},{"id":173691,"url":"https://patchwork.plctlab.org/api/1.2/patches/173691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-18-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-18-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:48","name":"[17/17,APX,NDD] Support TImode shift for NDD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-18-hongyu.wang@intel.com/mbox/"},{"id":173676,"url":"https://patchwork.plctlab.org/api/1.2/patches/173676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-2-chenglulu@loongson.cn/","msgid":"<20231205023019.32452-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-05T02:30:18","name":"[v2,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-2-chenglulu@loongson.cn/mbox/"},{"id":173678,"url":"https://patchwork.plctlab.org/api/1.2/patches/173678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-3-chenglulu@loongson.cn/","msgid":"<20231205023019.32452-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-05T02:30:19","name":"[v2,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-3-chenglulu@loongson.cn/mbox/"},{"id":173712,"url":"https://patchwork.plctlab.org/api/1.2/patches/173712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205032250.1270125-1-juzhe.zhong@rivai.ai/","msgid":"<20231205032250.1270125-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-05T03:22:50","name":"RISC-V: Add blocker for gather/scatter auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205032250.1270125-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173740,"url":"https://patchwork.plctlab.org/api/1.2/patches/173740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205064435.61292-1-chenxiaolong@loongson.cn/","msgid":"<20231205064435.61292-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-05T06:44:35","name":"[v2] LoongArch: Add asm modifiers to the LSX and LASX directives in the doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205064435.61292-1-chenxiaolong@loongson.cn/mbox/"},{"id":173742,"url":"https://patchwork.plctlab.org/api/1.2/patches/173742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7JaQLM06KIRzzO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T06:55:37","name":"c++: Further #pragma GCC unroll C++ fix [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7JaQLM06KIRzzO@tucnak/mbox/"},{"id":173748,"url":"https://patchwork.plctlab.org/api/1.2/patches/173748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7KsNfUi1xWiLqA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:01:04","name":"i386: Improve code generation for vector __builtin_signbit (x.x[i]) ? -1 : 0 [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7KsNfUi1xWiLqA@tucnak/mbox/"},{"id":173751,"url":"https://patchwork.plctlab.org/api/1.2/patches/173751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-2-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:43","name":"[v2,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-2-xujiahao@loongson.cn/mbox/"},{"id":173750,"url":"https://patchwork.plctlab.org/api/1.2/patches/173750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-3-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:44","name":"[v2,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-3-xujiahao@loongson.cn/mbox/"},{"id":173752,"url":"https://patchwork.plctlab.org/api/1.2/patches/173752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-4-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:45","name":"[v2,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-4-xujiahao@loongson.cn/mbox/"},{"id":173753,"url":"https://patchwork.plctlab.org/api/1.2/patches/173753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-5-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-5-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:46","name":"[v2,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-5-xujiahao@loongson.cn/mbox/"},{"id":173754,"url":"https://patchwork.plctlab.org/api/1.2/patches/173754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-6-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-6-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:47","name":"[v2,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-6-xujiahao@loongson.cn/mbox/"},{"id":173749,"url":"https://patchwork.plctlab.org/api/1.2/patches/173749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070152.38360-1-ishitatsuyuki@gmail.com/","msgid":"<20231205070152.38360-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-12-05T07:01:52","name":"[v4] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070152.38360-1-ishitatsuyuki@gmail.com/mbox/"},{"id":173756,"url":"https://patchwork.plctlab.org/api/1.2/patches/173756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Pa/CMxK3y4X/q@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:21:15","name":"lower-bitint: Make temporarily wrong IL less wrong [PR112843]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Pa/CMxK3y4X/q@tucnak/mbox/"},{"id":173758,"url":"https://patchwork.plctlab.org/api/1.2/patches/173758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205072952.8E9B63857022@sourceware.org/","msgid":"<20231205072952.8E9B63857022@sourceware.org>","list_archive_url":null,"date":"2023-12-05T07:25:43","name":"tree-optimization/112827 - more SCEV cprop fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205072952.8E9B63857022@sourceware.org/mbox/"},{"id":173757,"url":"https://patchwork.plctlab.org/api/1.2/patches/173757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Q+r/AEiTcoPYO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:27:54","name":"i386: Fix -fcf-protection -Os ICE due to movabsq peephole2 [PR112845]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Q+r/AEiTcoPYO@tucnak/mbox/"},{"id":173767,"url":"https://patchwork.plctlab.org/api/1.2/patches/173767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7T8HZqnnI2FXJQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:40:32","name":"c++: Implement C++ DR 2262 - Attributes for asm-definition [PR110734]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7T8HZqnnI2FXJQ@tucnak/mbox/"},{"id":173775,"url":"https://patchwork.plctlab.org/api/1.2/patches/173775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Wl3w5VO475hHc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:51:51","name":"c++: Fix parsing [[]][[]];","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Wl3w5VO475hHc@tucnak/mbox/"},{"id":173779,"url":"https://patchwork.plctlab.org/api/1.2/patches/173779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Zs6KdXyx1k+K1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T08:05:07","name":"lower-bitint, v2: Make temporarily wrong IL less wrong [PR112843]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Zs6KdXyx1k+K1@tucnak/mbox/"},{"id":173788,"url":"https://patchwork.plctlab.org/api/1.2/patches/173788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-1-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:44","name":"[1/5,V3,ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-1-gaofei@eswincomputing.com/mbox/"},{"id":173789,"url":"https://patchwork.plctlab.org/api/1.2/patches/173789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-3-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:46","name":"[3/5,ifcvt] optimize x=c ? (y AND z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-3-gaofei@eswincomputing.com/mbox/"},{"id":173790,"url":"https://patchwork.plctlab.org/api/1.2/patches/173790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-4-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:47","name":"[4/5,ifcvt] optimize x=c ? (y op const_int) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-4-gaofei@eswincomputing.com/mbox/"},{"id":173791,"url":"https://patchwork.plctlab.org/api/1.2/patches/173791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-5-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-5-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:48","name":"[5/5,ifcvt] optimize extension for x=c ? (y op z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-5-gaofei@eswincomputing.com/mbox/"},{"id":173792,"url":"https://patchwork.plctlab.org/api/1.2/patches/173792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205082237.16713-1-xuli1@eswincomputing.com/","msgid":"<20231205082237.16713-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:22:37","name":"RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205082237.16713-1-xuli1@eswincomputing.com/mbox/"},{"id":173797,"url":"https://patchwork.plctlab.org/api/1.2/patches/173797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083139.5D23C384F9BB@sourceware.org/","msgid":"<20231205083139.5D23C384F9BB@sourceware.org>","list_archive_url":null,"date":"2023-12-05T08:27:18","name":"tree-optimization/112843 - update_stmt doing wrong things","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083139.5D23C384F9BB@sourceware.org/mbox/"},{"id":173805,"url":"https://patchwork.plctlab.org/api/1.2/patches/173805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083804.27652-1-xuli1@eswincomputing.com/","msgid":"<20231205083804.27652-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:38:04","name":"[v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083804.27652-1-xuli1@eswincomputing.com/mbox/"},{"id":173831,"url":"https://patchwork.plctlab.org/api/1.2/patches/173831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5qp3shy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:31:37","name":"[pushed] Allow prologues and epilogues to be inserted later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5qp3shy.fsf@arm.com/mbox/"},{"id":173832,"url":"https://patchwork.plctlab.org/api/1.2/patches/173832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qc15728.fsf@euler.schwinge.homeip.net/","msgid":"<871qc15728.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-05T09:31:43","name":"[v2] c: Turn -Wimplicit-function-declaration into a permerror: Fix '\''gcc.dg/gnu23-builtins-no-dfp-1.c'\'' (was: [committed] Fix gnu23-builtins-no-dfp)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qc15728.fsf@euler.schwinge.homeip.net/mbox/"},{"id":173841,"url":"https://patchwork.plctlab.org/api/1.2/patches/173841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wmtt3sam.fsf@euler.schwinge.homeip.net/","msgid":"<87wmtt3sam.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-05T09:36:01","name":"Modula-2: Support '\''-isysroot [...]'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wmtt3sam.fsf@euler.schwinge.homeip.net/mbox/"},{"id":173842,"url":"https://patchwork.plctlab.org/api/1.2/patches/173842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jgx3s8r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:37:08","name":"Add a target hook for sibcall epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jgx3s8r.fsf@arm.com/mbox/"},{"id":173851,"url":"https://patchwork.plctlab.org/api/1.2/patches/173851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1e92da6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:45:37","name":"Add a new target hook: TARGET_START_CALL_ARGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1e92da6.fsf@arm.com/mbox/"},{"id":173862,"url":"https://patchwork.plctlab.org/api/1.2/patches/173862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4h2cuo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:54:55","name":"[pushed] Allow targets to add USEs to asms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4h2cuo.fsf@arm.com/mbox/"},{"id":173894,"url":"https://patchwork.plctlab.org/api/1.2/patches/173894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-2-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:12:59","name":"[pushed,v2,01/25] aarch64: Generalise require_immediate_lane_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-2-richard.sandiford@arm.com/mbox/"},{"id":173896,"url":"https://patchwork.plctlab.org/api/1.2/patches/173896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-3-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:00","name":"[pushed,v2,02/25] aarch64: Use SVE'\''s RDVL instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-3-richard.sandiford@arm.com/mbox/"},{"id":173895,"url":"https://patchwork.plctlab.org/api/1.2/patches/173895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-4-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:01","name":"[pushed,v2,03/25] aarch64: Make AARCH64_FL_SVE requirements explicit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-4-richard.sandiford@arm.com/mbox/"},{"id":173897,"url":"https://patchwork.plctlab.org/api/1.2/patches/173897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-5-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:02","name":"[pushed,v2,04/25] aarch64: Add group suffixes to SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-5-richard.sandiford@arm.com/mbox/"},{"id":173903,"url":"https://patchwork.plctlab.org/api/1.2/patches/173903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-7-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:04","name":"[pushed,v2,06/25] aarch64: Generalise some SVE ACLE error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-7-richard.sandiford@arm.com/mbox/"},{"id":173902,"url":"https://patchwork.plctlab.org/api/1.2/patches/173902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-8-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-8-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:05","name":"[pushed,v2,07/25] aarch64: Replace vague \"previous arguments\" message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-8-richard.sandiford@arm.com/mbox/"},{"id":173899,"url":"https://patchwork.plctlab.org/api/1.2/patches/173899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-10-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-10-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:07","name":"[pushed,v2,09/25] aarch64: Tweak error message for (tuple, vector) pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-10-richard.sandiford@arm.com/mbox/"},{"id":173900,"url":"https://patchwork.plctlab.org/api/1.2/patches/173900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-11-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-11-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:08","name":"[pushed,v2,10/25] aarch64: Add tuple forms of svreinterpret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-11-richard.sandiford@arm.com/mbox/"},{"id":173904,"url":"https://patchwork.plctlab.org/api/1.2/patches/173904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-12-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-12-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:09","name":"[pushed,v2,11/25] aarch64: Add arm_streaming(_compatible) attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-12-richard.sandiford@arm.com/mbox/"},{"id":173907,"url":"https://patchwork.plctlab.org/api/1.2/patches/173907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-14-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-14-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:11","name":"[pushed,v2,13/25] aarch64: Distinguish streaming-compatible AdvSIMD insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-14-richard.sandiford@arm.com/mbox/"},{"id":173912,"url":"https://patchwork.plctlab.org/api/1.2/patches/173912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-15-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-15-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:12","name":"[pushed,v2,14/25] aarch64: Mark relevant SVE instructions as non-streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-15-richard.sandiford@arm.com/mbox/"},{"id":173908,"url":"https://patchwork.plctlab.org/api/1.2/patches/173908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-16-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-16-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:13","name":"[pushed,v2,15/25] aarch64: Switch PSTATE.SM around calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-16-richard.sandiford@arm.com/mbox/"},{"id":173910,"url":"https://patchwork.plctlab.org/api/1.2/patches/173910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-17-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-17-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:14","name":"[pushed,v2,16/25] aarch64: Add support for SME ZA attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-17-richard.sandiford@arm.com/mbox/"},{"id":173905,"url":"https://patchwork.plctlab.org/api/1.2/patches/173905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-18-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-18-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:15","name":"[pushed,v2,17/25] aarch64: Add a register class for w12-w15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-18-richard.sandiford@arm.com/mbox/"},{"id":173906,"url":"https://patchwork.plctlab.org/api/1.2/patches/173906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-19-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-19-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:16","name":"[pushed,v2,18/25] aarch64: Add a VNx1TI mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-19-richard.sandiford@arm.com/mbox/"},{"id":173911,"url":"https://patchwork.plctlab.org/api/1.2/patches/173911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-20-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-20-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:17","name":"[pushed,v2,19/25] aarch64: Generalise unspec_based_function_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-20-richard.sandiford@arm.com/mbox/"},{"id":173915,"url":"https://patchwork.plctlab.org/api/1.2/patches/173915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-21-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-21-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:18","name":"[pushed,v2,20/25] aarch64: Generalise _m rules for SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-21-richard.sandiford@arm.com/mbox/"},{"id":173917,"url":"https://patchwork.plctlab.org/api/1.2/patches/173917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-22-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-22-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:19","name":"[pushed,v2,21/25] aarch64: Add support for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-22-richard.sandiford@arm.com/mbox/"},{"id":173901,"url":"https://patchwork.plctlab.org/api/1.2/patches/173901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-23-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-23-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:20","name":"[pushed,v2,22/25] aarch64: Add support for __arm_locally_streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-23-richard.sandiford@arm.com/mbox/"},{"id":173913,"url":"https://patchwork.plctlab.org/api/1.2/patches/173913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-24-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-24-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:21","name":"[pushed,v2,23/25] aarch64: Handle PSTATE.SM across abnormal edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-24-richard.sandiford@arm.com/mbox/"},{"id":173914,"url":"https://patchwork.plctlab.org/api/1.2/patches/173914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-25-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-25-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:22","name":"[pushed,v2,24/25] aarch64: Enforce inlining restrictions for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-25-richard.sandiford@arm.com/mbox/"},{"id":173916,"url":"https://patchwork.plctlab.org/api/1.2/patches/173916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-26-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-26-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:23","name":"[pushed,v2,25/25] aarch64: Update sibcall handling for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-26-richard.sandiford@arm.com/mbox/"},{"id":173918,"url":"https://patchwork.plctlab.org/api/1.2/patches/173918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-2-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:24:59","name":"[pushed,v2,1/5] aarch64: Add +sme2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-2-richard.sandiford@arm.com/mbox/"},{"id":173920,"url":"https://patchwork.plctlab.org/api/1.2/patches/173920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-3-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:00","name":"[pushed,v2,2/5] aarch64: Add svcount_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-3-richard.sandiford@arm.com/mbox/"},{"id":173919,"url":"https://patchwork.plctlab.org/api/1.2/patches/173919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-4-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:01","name":"[pushed,v2,3/5] aarch64: Add svboolx2_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-4-richard.sandiford@arm.com/mbox/"},{"id":173921,"url":"https://patchwork.plctlab.org/api/1.2/patches/173921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-5-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:02","name":"[pushed,v2,4/5] aarch64: Add ZT0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-5-richard.sandiford@arm.com/mbox/"},{"id":173922,"url":"https://patchwork.plctlab.org/api/1.2/patches/173922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW78YWaxl9JCrqMh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:33:05","name":"libgfortran: Fix -Wincompatible-pointer-types errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW78YWaxl9JCrqMh@tucnak/mbox/"},{"id":173960,"url":"https://patchwork.plctlab.org/api/1.2/patches/173960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8BTQWe6/1wk+Qo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:54:05","name":"[v2,06/11] aarch64: Fix up aarch64_print_operand xzr/wzr case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8BTQWe6/1wk+Qo@arm.com/mbox/"},{"id":173964,"url":"https://patchwork.plctlab.org/api/1.2/patches/173964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CJOWPBqyA/uqm@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:57:40","name":"[v2,09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CJOWPBqyA/uqm@arm.com/mbox/"},{"id":173963,"url":"https://patchwork.plctlab.org/api/1.2/patches/173963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CM4RO7kxacSjh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:57:55","name":"driver: Fix bootstrap with --enable-default-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CM4RO7kxacSjh@tucnak/mbox/"},{"id":173980,"url":"https://patchwork.plctlab.org/api/1.2/patches/173980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8HrtwZd4pBIjty@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T11:21:18","name":"[v2,08/11] aarch64: Generalize writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8HrtwZd4pBIjty@arm.com/mbox/"},{"id":174017,"url":"https://patchwork.plctlab.org/api/1.2/patches/174017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-2-shihua@iscas.ac.cn/","msgid":"<20231205120312.2821765-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-05T12:03:11","name":"[1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-2-shihua@iscas.ac.cn/mbox/"},{"id":174018,"url":"https://patchwork.plctlab.org/api/1.2/patches/174018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-3-shihua@iscas.ac.cn/","msgid":"<20231205120312.2821765-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-05T12:03:12","name":"[2/2] RISC-V: Add C intrinsics of Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-3-shihua@iscas.ac.cn/mbox/"},{"id":174042,"url":"https://patchwork.plctlab.org/api/1.2/patches/174042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205125727.1805615-1-juzhe.zhong@rivai.ai/","msgid":"<20231205125727.1805615-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-05T12:57:27","name":"RISC-V: Block VLSmodes according to TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205125727.1805615-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174047,"url":"https://patchwork.plctlab.org/api/1.2/patches/174047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131449.71AAD3857437@sourceware.org/","msgid":"<20231205131449.71AAD3857437@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:10:39","name":"tree-optimization/112856 - fix LC SSA after loop header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131449.71AAD3857437@sourceware.org/mbox/"},{"id":174048,"url":"https://patchwork.plctlab.org/api/1.2/patches/174048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131539.8FFE73857BA7@sourceware.org/","msgid":"<20231205131539.8FFE73857BA7@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:11:27","name":"middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131539.8FFE73857BA7@sourceware.org/mbox/"},{"id":174057,"url":"https://patchwork.plctlab.org/api/1.2/patches/174057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135854.970253858032@sourceware.org/","msgid":"<20231205135854.970253858032@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:54:45","name":"ipa/92606 - IPA ICF merging variables in different address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135854.970253858032@sourceware.org/mbox/"},{"id":174058,"url":"https://patchwork.plctlab.org/api/1.2/patches/174058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135923.72256385C6FD@sourceware.org/","msgid":"<20231205135923.72256385C6FD@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:55:05","name":"sanitizer/111736 - skip ASAN for globals in alternate address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135923.72256385C6FD@sourceware.org/mbox/"},{"id":174059,"url":"https://patchwork.plctlab.org/api/1.2/patches/174059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com/","msgid":"<007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-05T13:59:48","name":"[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com/mbox/"},{"id":174063,"url":"https://patchwork.plctlab.org/api/1.2/patches/174063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205142220.CDC273853337@sourceware.org/","msgid":"<20231205142220.CDC273853337@sourceware.org>","list_archive_url":null,"date":"2023-12-05T14:18:05","name":"middle-end/112860 - -fgimple can skip ISEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205142220.CDC273853337@sourceware.org/mbox/"},{"id":174065,"url":"https://patchwork.plctlab.org/api/1.2/patches/174065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205143016.17956-1-manos.anagnostakis@vrull.eu/","msgid":"<20231205143016.17956-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-05T14:30:16","name":"[v5] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205143016.17956-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":174073,"url":"https://patchwork.plctlab.org/api/1.2/patches/174073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205150946.3542939-1-victor.donascimento@arm.com/","msgid":"<20231205150946.3542939-1-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-12-05T15:09:41","name":"[v3] aarch64: Implement the ACLE instruction/data prefetch functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205150946.3542939-1-victor.donascimento@arm.com/mbox/"},{"id":174075,"url":"https://patchwork.plctlab.org/api/1.2/patches/174075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com/","msgid":"<6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com>","list_archive_url":null,"date":"2023-12-05T15:13:22","name":"RISC-V: Add vec_init expander for masks [PR112854].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com/mbox/"},{"id":174077,"url":"https://patchwork.plctlab.org/api/1.2/patches/174077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151631.3202932-1-christoph.muellner@vrull.eu/","msgid":"<20231205151631.3202932-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-05T15:16:31","name":"RISC-V: xtheadfmemidx: Disable if xtheadmemidx is not available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151631.3202932-1-christoph.muellner@vrull.eu/mbox/"},{"id":174078,"url":"https://patchwork.plctlab.org/api/1.2/patches/174078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151644.3203029-1-christoph.muellner@vrull.eu/","msgid":"<20231205151644.3203029-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-05T15:16:44","name":"RISC-V: xtheadmemidx: Document inline asm issue with memory constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151644.3203029-1-christoph.muellner@vrull.eu/mbox/"},{"id":174106,"url":"https://patchwork.plctlab.org/api/1.2/patches/174106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9JwlgLTEUHgY/y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T16:03:14","name":"c++, v2: Further #pragma GCC unroll C++ fix [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9JwlgLTEUHgY/y@tucnak/mbox/"},{"id":174112,"url":"https://patchwork.plctlab.org/api/1.2/patches/174112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205164151.27101-1-egallager@gcc.gnu.org/","msgid":"<20231205164151.27101-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-05T16:41:52","name":"remove qmtest-related Makefile targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205164151.27101-1-egallager@gcc.gnu.org/mbox/"},{"id":174151,"url":"https://patchwork.plctlab.org/api/1.2/patches/174151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205165002.565846-1-jwakely@redhat.com/","msgid":"<20231205165002.565846-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-05T16:49:40","name":"[committed] libstdc++: Disable std::formatter::set_debug_format [PR112832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205165002.565846-1-jwakely@redhat.com/mbox/"},{"id":174138,"url":"https://patchwork.plctlab.org/api/1.2/patches/174138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9XL+ac5rY9XbF9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T17:00:31","name":"c++, v2: Fix parsing [[]][[]];","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9XL+ac5rY9XbF9@tucnak/mbox/"},{"id":174147,"url":"https://patchwork.plctlab.org/api/1.2/patches/174147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com/","msgid":"<4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com>","list_archive_url":null,"date":"2023-12-05T17:29:10","name":"tsystem.h: Declare calloc/realloc #ifdef inhibit_libc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com/mbox/"},{"id":174169,"url":"https://patchwork.plctlab.org/api/1.2/patches/174169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205184929.76195-1-polacek@redhat.com/","msgid":"<20231205184929.76195-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-05T18:49:29","name":"build: unbreak bootstrap on uclinux targets [PR112762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205184929.76195-1-polacek@redhat.com/mbox/"},{"id":174175,"url":"https://patchwork.plctlab.org/api/1.2/patches/174175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com/","msgid":"<206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:30:14","name":"aarch64: Add missing driver-aarch64 dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com/mbox/"},{"id":174176,"url":"https://patchwork.plctlab.org/api/1.2/patches/174176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com/","msgid":"<0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:32:43","name":"aarch64 testsuite: Check entire .arch string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com/mbox/"},{"id":174178,"url":"https://patchwork.plctlab.org/api/1.2/patches/174178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com/","msgid":"<58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:33:33","name":"aarch64: Fix +nocrypto handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com/mbox/"},{"id":174180,"url":"https://patchwork.plctlab.org/api/1.2/patches/174180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd8d2cd0-35b7-f32d-2c9a-f9ddfb924530@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T19:34:21","name":"aarch64: Fix +nopredres, +nols64 and +nomops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd8d2cd0-35b7-f32d-2c9a-f9ddfb924530@e124511.cambridge.arm.com/mbox/"},{"id":174184,"url":"https://patchwork.plctlab.org/api/1.2/patches/174184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205195619.547273-1-j@lambda.is/","msgid":"<20231205195619.547273-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-05T19:56:19","name":"[v7] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205195619.547273-1-j@lambda.is/mbox/"},{"id":174188,"url":"https://patchwork.plctlab.org/api/1.2/patches/174188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205203136.94832-1-polacek@redhat.com/","msgid":"<20231205203136.94832-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-05T20:31:36","name":"c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205203136.94832-1-polacek@redhat.com/mbox/"},{"id":174208,"url":"https://patchwork.plctlab.org/api/1.2/patches/174208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-2-indu.bhagat@oracle.com/","msgid":"<20231205213632.947369-2-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-12-05T21:36:31","name":"[[PATCH,GCC13] 1/2] bfd: linker: merge .sframe sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-2-indu.bhagat@oracle.com/mbox/"},{"id":174209,"url":"https://patchwork.plctlab.org/api/1.2/patches/174209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-3-indu.bhagat@oracle.com/","msgid":"<20231205213632.947369-3-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-12-05T21:36:32","name":"[[PATCH,GCC13] 2/2] toplevel: Makefile.def: add install-strip dependency on libsframe","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-3-indu.bhagat@oracle.com/mbox/"},{"id":174217,"url":"https://patchwork.plctlab.org/api/1.2/patches/174217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+e17v8kftQKh57@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:06:15","name":"libiberty: Fix build with GCC < 7","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+e17v8kftQKh57@tucnak/mbox/"},{"id":174220,"url":"https://patchwork.plctlab.org/api/1.2/patches/174220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+hoNiyGaXIYKV8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:18:08","name":"lower-bitint: Fix arithmetics followed by extension by many bits [PR112809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+hoNiyGaXIYKV8@tucnak/mbox/"},{"id":174222,"url":"https://patchwork.plctlab.org/api/1.2/patches/174222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+i2GmeDAwxA0ZB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:23:20","name":"i386: Move vzeroupper pass from after reload pass to after postreload_cse [PR112760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+i2GmeDAwxA0ZB@tucnak/mbox/"},{"id":174238,"url":"https://patchwork.plctlab.org/api/1.2/patches/174238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205233450.614809-1-jwakely@redhat.com/","msgid":"<20231205233450.614809-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-05T23:34:27","name":"[committed] libstdc++: Redefine __glibcxx_assert to work in C++23 constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205233450.614809-1-jwakely@redhat.com/mbox/"},{"id":174243,"url":"https://patchwork.plctlab.org/api/1.2/patches/174243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206003906.2945650-1-ewlu@rivosinc.com/","msgid":"<20231206003906.2945650-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-06T00:39:06","name":"RISC-V: Remove xfail from ssa-fre-3.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206003906.2945650-1-ewlu@rivosinc.com/mbox/"},{"id":174270,"url":"https://patchwork.plctlab.org/api/1.2/patches/174270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206015211.682650-1-lhyatt@gmail.com/","msgid":"<20231206015211.682650-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-06T01:52:11","name":"c-family: Fix ICE with large column number after restoring a PCH [PR105608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206015211.682650-1-lhyatt@gmail.com/mbox/"},{"id":174273,"url":"https://patchwork.plctlab.org/api/1.2/patches/174273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg0rshb.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-06T02:10:24","name":"[v8] Introduce attribute sym_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg0rshb.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":174289,"url":"https://patchwork.plctlab.org/api/1.2/patches/174289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022101.1695009-1-jason@redhat.com/","msgid":"<20231206022101.1695009-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-06T02:21:01","name":"[RFA,(libstdc++)] c++: partial ordering of object parameter [PR53499]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022101.1695009-1-jason@redhat.com/mbox/"},{"id":174275,"url":"https://patchwork.plctlab.org/api/1.2/patches/174275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022931.33437-1-yangyujie@loongson.cn/","msgid":"<20231206022931.33437-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-06T02:29:31","name":"testsuite: Adjust for the new permerror -Wincompatible-pointer-types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022931.33437-1-yangyujie@loongson.cn/mbox/"},{"id":174276,"url":"https://patchwork.plctlab.org/api/1.2/patches/174276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-1-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:21","name":"[1/4] RISC-V: Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-1-wangfeng@eswincomputing.com/mbox/"},{"id":174277,"url":"https://patchwork.plctlab.org/api/1.2/patches/174277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-2-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:22","name":"[2/4] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-2-wangfeng@eswincomputing.com/mbox/"},{"id":174278,"url":"https://patchwork.plctlab.org/api/1.2/patches/174278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-3-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:23","name":"[3/4] RISC-V: Add crypto vector machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-3-wangfeng@eswincomputing.com/mbox/"},{"id":174279,"url":"https://patchwork.plctlab.org/api/1.2/patches/174279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-4-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:24","name":"[4/4] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-4-wangfeng@eswincomputing.com/mbox/"},{"id":174290,"url":"https://patchwork.plctlab.org/api/1.2/patches/174290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18055-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T04:03:00","name":"middle-end: correct loop bounds for early breaks and peeled vector loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18055-tamar@arm.com/mbox/"},{"id":174291,"url":"https://patchwork.plctlab.org/api/1.2/patches/174291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18056-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T04:03:33","name":"middle-end: Fix peeled vect loop IV values.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18056-tamar@arm.com/mbox/"},{"id":174293,"url":"https://patchwork.plctlab.org/api/1.2/patches/174293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206044936.16515-1-xuli1@eswincomputing.com/","msgid":"<20231206044936.16515-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T04:49:36","name":"RISC-V: Remove useless modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206044936.16515-1-xuli1@eswincomputing.com/mbox/"},{"id":174295,"url":"https://patchwork.plctlab.org/api/1.2/patches/174295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-1-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:25","name":"[V3,1/3] rs6000: update num_insns_constant for 2 insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-1-guojiufu@linux.ibm.com/mbox/"},{"id":174296,"url":"https://patchwork.plctlab.org/api/1.2/patches/174296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-2-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:26","name":"[V3,2/3] Using pli for constant splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-2-guojiufu@linux.ibm.com/mbox/"},{"id":174297,"url":"https://patchwork.plctlab.org/api/1.2/patches/174297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-3-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:27","name":"[V3,3/3] split complicate constant to memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-3-guojiufu@linux.ibm.com/mbox/"},{"id":174332,"url":"https://patchwork.plctlab.org/api/1.2/patches/174332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206064416.1450871-1-yangyujie@loongson.cn/","msgid":"<20231206064416.1450871-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-06T06:44:16","name":"[v2] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206064416.1450871-1-yangyujie@loongson.cn/mbox/"},{"id":174335,"url":"https://patchwork.plctlab.org/api/1.2/patches/174335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-2-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:49","name":"[v3,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-2-xujiahao@loongson.cn/mbox/"},{"id":174338,"url":"https://patchwork.plctlab.org/api/1.2/patches/174338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-3-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:50","name":"[v3,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-3-xujiahao@loongson.cn/mbox/"},{"id":174336,"url":"https://patchwork.plctlab.org/api/1.2/patches/174336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-4-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:51","name":"[v3,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-4-xujiahao@loongson.cn/mbox/"},{"id":174339,"url":"https://patchwork.plctlab.org/api/1.2/patches/174339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-5-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-5-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:52","name":"[v3,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-5-xujiahao@loongson.cn/mbox/"},{"id":174337,"url":"https://patchwork.plctlab.org/api/1.2/patches/174337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-6-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-6-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:53","name":"[v3,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-6-xujiahao@loongson.cn/mbox/"},{"id":174383,"url":"https://patchwork.plctlab.org/api/1.2/patches/174383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-2-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:21","name":"[01/16,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-2-hongyu.wang@intel.com/mbox/"},{"id":174396,"url":"https://patchwork.plctlab.org/api/1.2/patches/174396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-3-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:22","name":"[02/16,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-3-hongyu.wang@intel.com/mbox/"},{"id":174385,"url":"https://patchwork.plctlab.org/api/1.2/patches/174385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-4-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:23","name":"[03/16,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-4-hongyu.wang@intel.com/mbox/"},{"id":174390,"url":"https://patchwork.plctlab.org/api/1.2/patches/174390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-5-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:24","name":"[04/16,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-5-hongyu.wang@intel.com/mbox/"},{"id":174399,"url":"https://patchwork.plctlab.org/api/1.2/patches/174399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-6-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:25","name":"[05/16,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-6-hongyu.wang@intel.com/mbox/"},{"id":174391,"url":"https://patchwork.plctlab.org/api/1.2/patches/174391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-7-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:26","name":"[06/16,APX,NDD] Support APX NDD for sbb insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-7-hongyu.wang@intel.com/mbox/"},{"id":174393,"url":"https://patchwork.plctlab.org/api/1.2/patches/174393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-8-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:27","name":"[07/16,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-8-hongyu.wang@intel.com/mbox/"},{"id":174382,"url":"https://patchwork.plctlab.org/api/1.2/patches/174382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-9-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:28","name":"[08/16,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-9-hongyu.wang@intel.com/mbox/"},{"id":174392,"url":"https://patchwork.plctlab.org/api/1.2/patches/174392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-10-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:29","name":"[09/16,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-10-hongyu.wang@intel.com/mbox/"},{"id":174389,"url":"https://patchwork.plctlab.org/api/1.2/patches/174389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-11-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:30","name":"[10/16,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-11-hongyu.wang@intel.com/mbox/"},{"id":174397,"url":"https://patchwork.plctlab.org/api/1.2/patches/174397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-12-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:31","name":"[11/16,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-12-hongyu.wang@intel.com/mbox/"},{"id":174398,"url":"https://patchwork.plctlab.org/api/1.2/patches/174398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-13-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:32","name":"[12/16,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-13-hongyu.wang@intel.com/mbox/"},{"id":174401,"url":"https://patchwork.plctlab.org/api/1.2/patches/174401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-14-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:33","name":"[13/16,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-14-hongyu.wang@intel.com/mbox/"},{"id":174395,"url":"https://patchwork.plctlab.org/api/1.2/patches/174395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-15-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:34","name":"[14/16,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-15-hongyu.wang@intel.com/mbox/"},{"id":174394,"url":"https://patchwork.plctlab.org/api/1.2/patches/174394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-16-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:35","name":"[15/16,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-16-hongyu.wang@intel.com/mbox/"},{"id":174400,"url":"https://patchwork.plctlab.org/api/1.2/patches/174400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-17-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:36","name":"[16/16,APX,NDD] Support TImode shift for NDD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-17-hongyu.wang@intel.com/mbox/"},{"id":174406,"url":"https://patchwork.plctlab.org/api/1.2/patches/174406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df01d123-2ae1-4d43-b0c9-2e2f9b5d29e1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T08:13:08","name":"[patch-1v2,rs6000] enable fctiw on old archs [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df01d123-2ae1-4d43-b0c9-2e2f9b5d29e1@linux.ibm.com/mbox/"},{"id":174407,"url":"https://patchwork.plctlab.org/api/1.2/patches/174407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com/","msgid":"<98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T08:13:49","name":"[patch-2v2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com/mbox/"},{"id":174440,"url":"https://patchwork.plctlab.org/api/1.2/patches/174440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206092758.1000447-1-guojiufu@linux.ibm.com/","msgid":"<20231206092758.1000447-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T09:27:58","name":"treat argp-based mem as frame related in dse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206092758.1000447-1-guojiufu@linux.ibm.com/mbox/"},{"id":174441,"url":"https://patchwork.plctlab.org/api/1.2/patches/174441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXBHF0Qggxkoz/ej@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-06T10:04:07","name":"libgcc: Avoid -Wbuiltin-declaration-mismatch warnings in emutls.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXBHF0Qggxkoz/ej@tucnak/mbox/"},{"id":174562,"url":"https://patchwork.plctlab.org/api/1.2/patches/174562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f622a1-4d4d-e79d-8886-339e56b30b7d@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T12:44:26","name":"[1/5] aarch64: Add cpu feature detection to libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f622a1-4d4d-e79d-8886-339e56b30b7d@e124511.cambridge.arm.com/mbox/"},{"id":174563,"url":"https://patchwork.plctlab.org/api/1.2/patches/174563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com/","msgid":"<53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-06T12:45:08","name":"[v3,2/5] c-family: Simplify attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com/mbox/"},{"id":174564,"url":"https://patchwork.plctlab.org/api/1.2/patches/174564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e195769a-c51a-83c1-9b64-42bdd7f21155@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T12:45:53","name":"[v3,3/5] ada: Improve attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e195769a-c51a-83c1-9b64-42bdd7f21155@e124511.cambridge.arm.com/mbox/"},{"id":174565,"url":"https://patchwork.plctlab.org/api/1.2/patches/174565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com/","msgid":"<2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-06T12:47:15","name":"[v3,5/5] aarch64: Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com/mbox/"},{"id":174570,"url":"https://patchwork.plctlab.org/api/1.2/patches/174570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206130351.2573949-1-juzhe.zhong@rivai.ai/","msgid":"<20231206130351.2573949-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T13:03:50","name":"RISC-V: Fix VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206130351.2573949-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174577,"url":"https://patchwork.plctlab.org/api/1.2/patches/174577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206134653.29261-1-manos.anagnostakis@vrull.eu/","msgid":"<20231206134653.29261-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-06T13:46:53","name":"[v6] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206134653.29261-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":174593,"url":"https://patchwork.plctlab.org/api/1.2/patches/174593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCA4SDkDbMT4Gaa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-06T14:10:41","name":"c++: Don'\''t diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCA4SDkDbMT4Gaa@tucnak/mbox/"},{"id":174666,"url":"https://patchwork.plctlab.org/api/1.2/patches/174666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142930.739485-1-jwakely@redhat.com/","msgid":"<20231206142930.739485-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-06T14:18:12","name":"libstdc++: Make __gnu_debug::vector usable in constant expressions [PR109536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142930.739485-1-jwakely@redhat.com/mbox/"},{"id":174601,"url":"https://patchwork.plctlab.org/api/1.2/patches/174601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142646.3402479-1-juzhe.zhong@rivai.ai/","msgid":"<20231206142646.3402479-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T14:26:46","name":"[Committed,V2] RISC-V: Fix VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142646.3402479-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174602,"url":"https://patchwork.plctlab.org/api/1.2/patches/174602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206143444.2760326-1-gb.devel@gmail.com/","msgid":"<20231206143444.2760326-1-gb.devel@gmail.com>","list_archive_url":null,"date":"2023-12-06T14:34:44","name":"libstdc++: Fix testsuite with -Wformat","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206143444.2760326-1-gb.devel@gmail.com/mbox/"},{"id":174644,"url":"https://patchwork.plctlab.org/api/1.2/patches/174644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCWo0zhECpJlU9A@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-06T15:43:31","name":"[committed] Fix c-c++-common/fhardened-[12].c test fails on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCWo0zhECpJlU9A@mx3210.localdomain/mbox/"},{"id":174646,"url":"https://patchwork.plctlab.org/api/1.2/patches/174646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206154833.2878478-1-gb.devel@gmail.com/","msgid":"<20231206154833.2878478-1-gb.devel@gmail.com>","list_archive_url":null,"date":"2023-12-06T15:48:33","name":"c++: Handle '\''#pragma GCC target optimize'\'' early [PR48026]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206154833.2878478-1-gb.devel@gmail.com/mbox/"},{"id":174667,"url":"https://patchwork.plctlab.org/api/1.2/patches/174667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLZaogJSoL7S2T_JKfMU=NAmEee15064K2aktPGttvUow@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T16:09:36","name":"{Patch, fortran] PR112834 - Class array function selector causes chain of syntax and other spurious errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLZaogJSoL7S2T_JKfMU=NAmEee15064K2aktPGttvUow@mail.gmail.com/mbox/"},{"id":174673,"url":"https://patchwork.plctlab.org/api/1.2/patches/174673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com/","msgid":"<24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com>","list_archive_url":null,"date":"2023-12-06T16:50:48","name":"libiberty/buildargv: POSIX behaviour for backslash handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com/mbox/"},{"id":174677,"url":"https://patchwork.plctlab.org/api/1.2/patches/174677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-2-ams@codesourcery.com/","msgid":"<20231206170020.1675302-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:18","name":"[committed,v4,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-2-ams@codesourcery.com/mbox/"},{"id":174675,"url":"https://patchwork.plctlab.org/api/1.2/patches/174675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-3-ams@codesourcery.com/","msgid":"<20231206170020.1675302-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:19","name":"[committed,v4,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-3-ams@codesourcery.com/mbox/"},{"id":174676,"url":"https://patchwork.plctlab.org/api/1.2/patches/174676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-4-ams@codesourcery.com/","msgid":"<20231206170020.1675302-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:20","name":"[committed,v4,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-4-ams@codesourcery.com/mbox/"},{"id":174683,"url":"https://patchwork.plctlab.org/api/1.2/patches/174683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206174245.2462114-1-dmalcolm@redhat.com/","msgid":"<20231206174245.2462114-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-06T17:42:45","name":"[pushed] diagnostics: use const and references for diagnostic_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206174245.2462114-1-dmalcolm@redhat.com/mbox/"},{"id":174687,"url":"https://patchwork.plctlab.org/api/1.2/patches/174687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206175011.2462694-1-dmalcolm@redhat.com/","msgid":"<20231206175011.2462694-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-06T17:50:11","name":"[pushed] v2: diagnostics: prettify JSON output formats","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206175011.2462694-1-dmalcolm@redhat.com/mbox/"},{"id":174707,"url":"https://patchwork.plctlab.org/api/1.2/patches/174707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3350dc3b-3471-453b-b631-810939609ba9@arm.com/","msgid":"<3350dc3b-3471-453b-b631-810939609ba9@arm.com>","list_archive_url":null,"date":"2023-12-06T18:49:23","name":"veclower: improve selection of vector mode when lowering [PR 112787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3350dc3b-3471-453b-b631-810939609ba9@arm.com/mbox/"},{"id":174742,"url":"https://patchwork.plctlab.org/api/1.2/patches/174742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca36c23-78f7-478f-bdce-6bfe0afaf92b-1701894736658@3c-app-gmx-bap48/","msgid":"","list_archive_url":null,"date":"2023-12-06T20:32:16","name":"Fortran: function returning contiguous class array [PR105543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca36c23-78f7-478f-bdce-6bfe0afaf92b-1701894736658@3c-app-gmx-bap48/mbox/"},{"id":174749,"url":"https://patchwork.plctlab.org/api/1.2/patches/174749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org/","msgid":"<9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org>","list_archive_url":null,"date":"2023-12-06T22:33:14","name":"htdocs: correct spelling and use https in examples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org/mbox/"},{"id":174750,"url":"https://patchwork.plctlab.org/api/1.2/patches/174750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206223502.2323591-1-juzhe.zhong@rivai.ai/","msgid":"<20231206223502.2323591-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T22:35:02","name":"[Committed] RISC-V: Fix PR112888 ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206223502.2323591-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174780,"url":"https://patchwork.plctlab.org/api/1.2/patches/174780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206235431.69392-1-polacek@redhat.com/","msgid":"<20231206235431.69392-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-06T23:54:31","name":"aarch64: add -fno-stack-protector to tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206235431.69392-1-polacek@redhat.com/mbox/"},{"id":174815,"url":"https://patchwork.plctlab.org/api/1.2/patches/174815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207002822.2498142-1-dmalcolm@redhat.com/","msgid":"<20231207002822.2498142-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-07T00:28:22","name":"[pushed] analyzer: fix taint false positives with UNKNOWN [PR112850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207002822.2498142-1-dmalcolm@redhat.com/mbox/"},{"id":174872,"url":"https://patchwork.plctlab.org/api/1.2/patches/174872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207014011.1512-2-yangyujie@loongson.cn/","msgid":"<20231207014011.1512-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-07T01:40:11","name":"[v3] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207014011.1512-2-yangyujie@loongson.cn/mbox/"},{"id":174877,"url":"https://patchwork.plctlab.org/api/1.2/patches/174877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-1-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:11","name":"[1/4,v2] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-1-wangfeng@eswincomputing.com/mbox/"},{"id":174879,"url":"https://patchwork.plctlab.org/api/1.2/patches/174879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-2-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:12","name":"[2/4,v2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-2-wangfeng@eswincomputing.com/mbox/"},{"id":174880,"url":"https://patchwork.plctlab.org/api/1.2/patches/174880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-3-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:13","name":"[3/4,v2] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-3-wangfeng@eswincomputing.com/mbox/"},{"id":174881,"url":"https://patchwork.plctlab.org/api/1.2/patches/174881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-4-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:14","name":"[4/4,v2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-4-wangfeng@eswincomputing.com/mbox/"},{"id":174895,"url":"https://patchwork.plctlab.org/api/1.2/patches/174895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpqd6u0.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-07T03:33:59","name":"strub: enable conditional support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpqd6u0.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":174924,"url":"https://patchwork.plctlab.org/api/1.2/patches/174924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-2-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:56","name":"[v26,01/23] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-2-kmatsui@gcc.gnu.org/mbox/"},{"id":174925,"url":"https://patchwork.plctlab.org/api/1.2/patches/174925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-3-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:57","name":"[v26,02/23] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-3-kmatsui@gcc.gnu.org/mbox/"},{"id":174926,"url":"https://patchwork.plctlab.org/api/1.2/patches/174926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-4-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:58","name":"[v26,03/23] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-4-kmatsui@gcc.gnu.org/mbox/"},{"id":174927,"url":"https://patchwork.plctlab.org/api/1.2/patches/174927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-5-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:59","name":"[v26,04/23] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-5-kmatsui@gcc.gnu.org/mbox/"},{"id":174928,"url":"https://patchwork.plctlab.org/api/1.2/patches/174928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-6-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:00","name":"[v26,05/23] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-6-kmatsui@gcc.gnu.org/mbox/"},{"id":174929,"url":"https://patchwork.plctlab.org/api/1.2/patches/174929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-7-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:01","name":"[v26,06/23] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-7-kmatsui@gcc.gnu.org/mbox/"},{"id":174930,"url":"https://patchwork.plctlab.org/api/1.2/patches/174930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-8-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:02","name":"[v26,07/23] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-8-kmatsui@gcc.gnu.org/mbox/"},{"id":174931,"url":"https://patchwork.plctlab.org/api/1.2/patches/174931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-9-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:03","name":"[v26,08/23] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-9-kmatsui@gcc.gnu.org/mbox/"},{"id":174932,"url":"https://patchwork.plctlab.org/api/1.2/patches/174932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-10-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:04","name":"[v26,09/23] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-10-kmatsui@gcc.gnu.org/mbox/"},{"id":174933,"url":"https://patchwork.plctlab.org/api/1.2/patches/174933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-11-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:05","name":"[v26,10/23] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-11-kmatsui@gcc.gnu.org/mbox/"},{"id":174934,"url":"https://patchwork.plctlab.org/api/1.2/patches/174934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-12-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:06","name":"[v26,11/23] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-12-kmatsui@gcc.gnu.org/mbox/"},{"id":174935,"url":"https://patchwork.plctlab.org/api/1.2/patches/174935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-13-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:07","name":"[v26,12/23] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-13-kmatsui@gcc.gnu.org/mbox/"},{"id":174936,"url":"https://patchwork.plctlab.org/api/1.2/patches/174936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-14-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:08","name":"[v26,13/23] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-14-kmatsui@gcc.gnu.org/mbox/"},{"id":174937,"url":"https://patchwork.plctlab.org/api/1.2/patches/174937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-15-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:09","name":"[v26,14/23] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-15-kmatsui@gcc.gnu.org/mbox/"},{"id":174938,"url":"https://patchwork.plctlab.org/api/1.2/patches/174938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-16-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:10","name":"[v26,15/23] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-16-kmatsui@gcc.gnu.org/mbox/"},{"id":174939,"url":"https://patchwork.plctlab.org/api/1.2/patches/174939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-17-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:11","name":"[v26,16/23] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-17-kmatsui@gcc.gnu.org/mbox/"},{"id":174940,"url":"https://patchwork.plctlab.org/api/1.2/patches/174940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-18-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:12","name":"[v26,17/23] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-18-kmatsui@gcc.gnu.org/mbox/"},{"id":174941,"url":"https://patchwork.plctlab.org/api/1.2/patches/174941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-19-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:13","name":"[v26,18/23] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-19-kmatsui@gcc.gnu.org/mbox/"},{"id":174943,"url":"https://patchwork.plctlab.org/api/1.2/patches/174943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-20-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:14","name":"[v26,19/23] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-20-kmatsui@gcc.gnu.org/mbox/"},{"id":174942,"url":"https://patchwork.plctlab.org/api/1.2/patches/174942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-21-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:15","name":"[v26,20/23] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-21-kmatsui@gcc.gnu.org/mbox/"},{"id":174945,"url":"https://patchwork.plctlab.org/api/1.2/patches/174945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-22-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:16","name":"[v26,21/23] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-22-kmatsui@gcc.gnu.org/mbox/"},{"id":174944,"url":"https://patchwork.plctlab.org/api/1.2/patches/174944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-23-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:17","name":"[v26,22/23] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-23-kmatsui@gcc.gnu.org/mbox/"},{"id":174946,"url":"https://patchwork.plctlab.org/api/1.2/patches/174946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-24-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:18","name":"[v26,23/23] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-24-kmatsui@gcc.gnu.org/mbox/"},{"id":174981,"url":"https://patchwork.plctlab.org/api/1.2/patches/174981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5JuY6sJleFmQu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:49:58","name":"tree-ssa-dce: Fix up maybe_optimize_arith_overflow for BITINT_TYPE [PR112880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5JuY6sJleFmQu@tucnak/mbox/"},{"id":174982,"url":"https://patchwork.plctlab.org/api/1.2/patches/174982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5iPc/yqEcx8yS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:51:36","name":"expr: Handle BITINT_TYPE in count_type_elements [PR112881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5iPc/yqEcx8yS@tucnak/mbox/"},{"id":174983,"url":"https://patchwork.plctlab.org/api/1.2/patches/174983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF6Afn0+K3Mx+I7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:53:37","name":"c-family: Fix up -fno-debug-cpp [PR111965]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF6Afn0+K3Mx+I7@tucnak/mbox/"},{"id":175017,"url":"https://patchwork.plctlab.org/api/1.2/patches/175017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEBmzbYlbFIlyv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:36:22","name":"Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEBmzbYlbFIlyv@tucnak/mbox/"},{"id":175021,"url":"https://patchwork.plctlab.org/api/1.2/patches/175021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEqWQnsyIHljTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:39:05","name":"v2: Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEqWQnsyIHljTu@tucnak/mbox/"},{"id":175023,"url":"https://patchwork.plctlab.org/api/1.2/patches/175023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGHrGaIVD5gZxbz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:51:56","name":"[committed] testsuite: Add testcase for already fixed PR [PR111068]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGHrGaIVD5gZxbz@tucnak/mbox/"},{"id":175061,"url":"https://patchwork.plctlab.org/api/1.2/patches/175061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGQVwm2w+l5T3RC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T09:28:55","name":"c++: Unshare folded SAVE_EXPR arguments during cp_fold [PR112727]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGQVwm2w+l5T3RC@tucnak/mbox/"},{"id":175071,"url":"https://patchwork.plctlab.org/api/1.2/patches/175071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101526.3649249-1-juzhe.zhong@rivai.ai/","msgid":"<20231207101526.3649249-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T10:15:26","name":"RISC-V: Support interleave vector with different step sequence for VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101526.3649249-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175072,"url":"https://patchwork.plctlab.org/api/1.2/patches/175072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-2-shihua@iscas.ac.cn/","msgid":"<20231207101639.3695340-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-07T10:16:38","name":"[V2,1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-2-shihua@iscas.ac.cn/mbox/"},{"id":175073,"url":"https://patchwork.plctlab.org/api/1.2/patches/175073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-3-shihua@iscas.ac.cn/","msgid":"<20231207101639.3695340-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-07T10:16:39","name":"[V2,2/2] RISC-V: Add C intrinsics of Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-3-shihua@iscas.ac.cn/mbox/"},{"id":175074,"url":"https://patchwork.plctlab.org/api/1.2/patches/175074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207102440.3721252-1-juzhe.zhong@rivai.ai/","msgid":"<20231207102440.3721252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T10:24:40","name":"RISC-V: Support interleave vector with different step sequence for VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207102440.3721252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175100,"url":"https://patchwork.plctlab.org/api/1.2/patches/175100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-2-iii@linux.ibm.com/","msgid":"<20231207121005.3425208-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2023-12-07T12:08:26","name":"[1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-2-iii@linux.ibm.com/mbox/"},{"id":175101,"url":"https://patchwork.plctlab.org/api/1.2/patches/175101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-3-iii@linux.ibm.com/","msgid":"<20231207121005.3425208-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2023-12-07T12:08:27","name":"[2/2] asan: Align .LASANPC on function boundary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-3-iii@linux.ibm.com/mbox/"},{"id":175102,"url":"https://patchwork.plctlab.org/api/1.2/patches/175102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121220.3351398-1-juzhe.zhong@rivai.ai/","msgid":"<20231207121220.3351398-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T12:12:20","name":"RISC-V: Fix AVL propagation ICE for vleff/vlsegff","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121220.3351398-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175103,"url":"https://patchwork.plctlab.org/api/1.2/patches/175103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121727.1940-1-wangfeng@eswincomputing.com/","msgid":"<20231207121727.1940-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T12:17:27","name":"RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121727.1940-1-wangfeng@eswincomputing.com/mbox/"},{"id":175112,"url":"https://patchwork.plctlab.org/api/1.2/patches/175112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207122014.19826-2-xry111@xry111.site/","msgid":"<20231207122014.19826-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-07T12:20:15","name":"LoongArch: Allow -mcmodel=extreme and model attribute with -mexplicit-relocs=auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207122014.19826-2-xry111@xry111.site/mbox/"},{"id":175187,"url":"https://patchwork.plctlab.org/api/1.2/patches/175187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHaEK7W9JFjejWQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:43:28","name":"[v3,08/11] aarch64: Generalize writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHaEK7W9JFjejWQ@arm.com/mbox/"},{"id":175188,"url":"https://patchwork.plctlab.org/api/1.2/patches/175188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHamDMfAEnFxERI@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:45:44","name":"[v3,09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHamDMfAEnFxERI@arm.com/mbox/"},{"id":175189,"url":"https://patchwork.plctlab.org/api/1.2/patches/175189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHbUKrMdYHxJ7Dg@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:48:48","name":"[v3,10/11] aarch64: Add new load/store pair fusion pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHbUKrMdYHxJ7Dg@arm.com/mbox/"},{"id":175205,"url":"https://patchwork.plctlab.org/api/1.2/patches/175205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-2-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:54","name":"[v2,1/3,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175204,"url":"https://patchwork.plctlab.org/api/1.2/patches/175204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-3-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:55","name":"[v2,2/3,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175203,"url":"https://patchwork.plctlab.org/api/1.2/patches/175203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-4-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:56","name":"[v2,3/3,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175209,"url":"https://patchwork.plctlab.org/api/1.2/patches/175209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-2-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:42","name":"[v2,1/3,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175208,"url":"https://patchwork.plctlab.org/api/1.2/patches/175208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-3-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:43","name":"[v2,2/3,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175210,"url":"https://patchwork.plctlab.org/api/1.2/patches/175210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-4-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:44","name":"[v2,3/3,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175213,"url":"https://patchwork.plctlab.org/api/1.2/patches/175213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-2-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:50","name":"[v2,1/3,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175211,"url":"https://patchwork.plctlab.org/api/1.2/patches/175211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-3-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:51","name":"[v2,2/3,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175212,"url":"https://patchwork.plctlab.org/api/1.2/patches/175212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-4-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:52","name":"[v2,3/3,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175216,"url":"https://patchwork.plctlab.org/api/1.2/patches/175216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-2-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:04","name":"[v2,1/3,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175215,"url":"https://patchwork.plctlab.org/api/1.2/patches/175215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-3-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:05","name":"[v2,2/3,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175214,"url":"https://patchwork.plctlab.org/api/1.2/patches/175214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-4-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:06","name":"[v2,3/3,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175256,"url":"https://patchwork.plctlab.org/api/1.2/patches/175256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-2-sandra@codesourcery.com/","msgid":"<20231207155247.372718-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:44","name":"[V3,1/4] OpenMP: Introduce accessor macros and constructors for context selectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-2-sandra@codesourcery.com/mbox/"},{"id":175249,"url":"https://patchwork.plctlab.org/api/1.2/patches/175249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-3-sandra@codesourcery.com/","msgid":"<20231207155247.372718-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:45","name":"[V3,2/4] OpenMP: Unify representation of name-list properties.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-3-sandra@codesourcery.com/mbox/"},{"id":175264,"url":"https://patchwork.plctlab.org/api/1.2/patches/175264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-4-sandra@codesourcery.com/","msgid":"<20231207155247.372718-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:46","name":"[V3,3/4] OpenMP: Use enumerators for names of trait-sets and traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-4-sandra@codesourcery.com/mbox/"},{"id":175257,"url":"https://patchwork.plctlab.org/api/1.2/patches/175257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-5-sandra@codesourcery.com/","msgid":"<20231207155247.372718-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:47","name":"[V3,4/4] OpenMP: Permit additional selector properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-5-sandra@codesourcery.com/mbox/"},{"id":175276,"url":"https://patchwork.plctlab.org/api/1.2/patches/175276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162651.685329-1-poulhies@adacore.com/","msgid":"<20231207162651.685329-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-07T16:25:39","name":"testsuite: add missing dg-require ifunc in pr105554.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162651.685329-1-poulhies@adacore.com/mbox/"},{"id":175278,"url":"https://patchwork.plctlab.org/api/1.2/patches/175278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162817.686879-1-poulhies@adacore.com/","msgid":"<20231207162817.686879-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-07T16:28:09","name":"testsuite: require avx_runtime for vect-simd-clone-17f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162817.686879-1-poulhies@adacore.com/mbox/"},{"id":175288,"url":"https://patchwork.plctlab.org/api/1.2/patches/175288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:46:38","name":"[2/4] libgcc: aarch64: Configure check for __getauxval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175289,"url":"https://patchwork.plctlab.org/api/1.2/patches/175289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:46:51","name":"[3/4] libgcc: aarch64: Add SME runtime support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175291,"url":"https://patchwork.plctlab.org/api/1.2/patches/175291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:47:05","name":"[4/4] libgcc: aarch64: Add SME unwinder support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175313,"url":"https://patchwork.plctlab.org/api/1.2/patches/175313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or34wddhnw.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-07T17:52:19","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or34wddhnw.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":175363,"url":"https://patchwork.plctlab.org/api/1.2/patches/175363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlea5x05m.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T19:50:13","name":"[pushed,v2] aarch64: Add an early RA for strided registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlea5x05m.fsf@arm.com/mbox/"},{"id":175367,"url":"https://patchwork.plctlab.org/api/1.2/patches/175367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207200046.79350-1-ewlu@rivosinc.com/","msgid":"<20231207200046.79350-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-07T20:00:46","name":"RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207200046.79350-1-ewlu@rivosinc.com/mbox/"},{"id":175450,"url":"https://patchwork.plctlab.org/api/1.2/patches/175450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205558.950070-1-jwakely@redhat.com/","msgid":"<20231207205558.950070-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:55:45","name":"[committed] libstdc++: Fix recent changes to __glibcxx_assert [PR112882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205558.950070-1-jwakely@redhat.com/mbox/"},{"id":175464,"url":"https://patchwork.plctlab.org/api/1.2/patches/175464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205625.950093-1-jwakely@redhat.com/","msgid":"<20231207205625.950093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:56:00","name":"[committed] libstdc++: Use instead of in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205625.950093-1-jwakely@redhat.com/mbox/"},{"id":175455,"url":"https://patchwork.plctlab.org/api/1.2/patches/175455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205720.950537-1-jwakely@redhat.com/","msgid":"<20231207205720.950537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:57:07","name":"[committed] libstdc++: Fix misleading typedef name in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205720.950537-1-jwakely@redhat.com/mbox/"},{"id":175451,"url":"https://patchwork.plctlab.org/api/1.2/patches/175451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207220910.3487816-1-juzhe.zhong@rivai.ai/","msgid":"<20231207220910.3487816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T22:09:10","name":"[Committed,V2] RISC-V: Support interleave vector with different step sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207220910.3487816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175457,"url":"https://patchwork.plctlab.org/api/1.2/patches/175457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com/","msgid":"<295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:26:01","name":"libgccjit: Fix get_size of size_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com/mbox/"},{"id":175467,"url":"https://patchwork.plctlab.org/api/1.2/patches/175467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com/","msgid":"<2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:29:55","name":"libgccjit: Make new_array_type take unsigned long","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com/mbox/"},{"id":175465,"url":"https://patchwork.plctlab.org/api/1.2/patches/175465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com/","msgid":"<2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:32:06","name":"libgccjit: Make is_int return false on vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com/mbox/"},{"id":175466,"url":"https://patchwork.plctlab.org/api/1.2/patches/175466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com/","msgid":"<447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:34:23","name":"libgccjit: Add type checks in gcc_jit_block_add_assignment_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com/mbox/"},{"id":175528,"url":"https://patchwork.plctlab.org/api/1.2/patches/175528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208021655.1595917-1-hongtao.liu@intel.com/","msgid":"<20231208021655.1595917-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-08T02:16:55","name":"Don'\''t assume it'\''s AVX_U128_CLEAN after call_insn whose abi.mode_clobber(V4DImode) deosn'\''t contains all SSE_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208021655.1595917-1-hongtao.liu@intel.com/mbox/"},{"id":175533,"url":"https://patchwork.plctlab.org/api/1.2/patches/175533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208024439.10538-1-wangfeng@eswincomputing.com/","msgid":"<20231208024439.10538-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-08T02:44:39","name":"[v2] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208024439.10538-1-wangfeng@eswincomputing.com/mbox/"},{"id":175611,"url":"https://patchwork.plctlab.org/api/1.2/patches/175611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208063510.1806832-1-juzhe.zhong@rivai.ai/","msgid":"<20231208063510.1806832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-08T06:35:10","name":"[Committed] RISC-V: Remove redundant check of better_main_loop_than_p in COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208063510.1806832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175635,"url":"https://patchwork.plctlab.org/api/1.2/patches/175635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208070250.2837967-1-haochen.jiang@intel.com/","msgid":"<20231208070250.2837967-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-08T07:02:50","name":"[gcc-wwwdocs] gcc-13/14: Mention recent update for x86_64 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208070250.2837967-1-haochen.jiang@intel.com/mbox/"},{"id":175642,"url":"https://patchwork.plctlab.org/api/1.2/patches/175642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208071200.3238127-1-hongtao.liu@intel.com/","msgid":"<20231208071200.3238127-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-08T07:12:00","name":"[ICE] Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208071200.3238127-1-hongtao.liu@intel.com/mbox/"},{"id":175654,"url":"https://patchwork.plctlab.org/api/1.2/patches/175654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLHoMaZQbNKF3vh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:37:04","name":"haifa-sched: Avoid overflows in extend_h_i_d [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLHoMaZQbNKF3vh@tucnak/mbox/"},{"id":175661,"url":"https://patchwork.plctlab.org/api/1.2/patches/175661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLInnHKUBvv3lkg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:41:18","name":"vr-values: Avoid ICEs on large _BitInt cast to floating point [PR112901]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLInnHKUBvv3lkg@tucnak/mbox/"},{"id":175671,"url":"https://patchwork.plctlab.org/api/1.2/patches/175671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLMEHNbRSol8kS2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:56:00","name":"lower-bitint: Avoid merging non-mergeable stmt with cast and mergeable stmt [PR112902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLMEHNbRSol8kS2@tucnak/mbox/"},{"id":175673,"url":"https://patchwork.plctlab.org/api/1.2/patches/175673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208080047.875024-1-pan2.li@intel.com/","msgid":"<20231208080047.875024-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-08T08:00:47","name":"[v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208080047.875024-1-pan2.li@intel.com/mbox/"},{"id":175675,"url":"https://patchwork.plctlab.org/api/1.2/patches/175675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208082037.6960F138FF@imap2.dmz-prg2.suse.org/","msgid":"<20231208082037.6960F138FF@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-08T08:20:36","name":"Shrink out-of-SSA dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208082037.6960F138FF@imap2.dmz-prg2.suse.org/mbox/"},{"id":175714,"url":"https://patchwork.plctlab.org/api/1.2/patches/175714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208095446.344402-1-yangyujie@loongson.cn/","msgid":"<20231208095446.344402-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T09:54:46","name":"[v4] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208095446.344402-1-yangyujie@loongson.cn/mbox/"},{"id":175716,"url":"https://patchwork.plctlab.org/api/1.2/patches/175716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100118.344571-1-yangyujie@loongson.cn/","msgid":"<20231208100118.344571-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:01:18","name":"[v5] LoongArch: Fix eh_return epilogue for normal returns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100118.344571-1-yangyujie@loongson.cn/mbox/"},{"id":175722,"url":"https://patchwork.plctlab.org/api/1.2/patches/175722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-2-yangyujie@loongson.cn/","msgid":"<20231208100942.344748-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:09:41","name":"[v3,1/2] libruntime: Add fiber context switch code for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-2-yangyujie@loongson.cn/mbox/"},{"id":175723,"url":"https://patchwork.plctlab.org/api/1.2/patches/175723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-3-yangyujie@loongson.cn/","msgid":"<20231208100942.344748-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:09:42","name":"[v3,2/2] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-3-yangyujie@loongson.cn/mbox/"},{"id":175789,"url":"https://patchwork.plctlab.org/api/1.2/patches/175789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2066e8c2-df88-4d25-a5f0-60fe92102486-1702031284725@3c-app-gmx-bs48/","msgid":"","list_archive_url":null,"date":"2023-12-08T10:28:04","name":"Fortran: allow NULL() for POINTER, OPTIONAL, CONTIGUOUS dummy [PR111503]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2066e8c2-df88-4d25-a5f0-60fe92102486-1702031284725@3c-app-gmx-bs48/mbox/"},{"id":175756,"url":"https://patchwork.plctlab.org/api/1.2/patches/175756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208103109.A8303138FF@imap2.dmz-prg2.suse.org/","msgid":"<20231208103109.A8303138FF@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-08T10:31:09","name":"tree-optimization/112909 - uninit diagnostic with abnormal copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208103109.A8303138FF@imap2.dmz-prg2.suse.org/mbox/"},{"id":175776,"url":"https://patchwork.plctlab.org/api/1.2/patches/175776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXL1MK1Bt7gCzwXx@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T10:51:28","name":"[v2] libgcc: aarch64: Add SME runtime support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXL1MK1Bt7gCzwXx@arm.com/mbox/"},{"id":175801,"url":"https://patchwork.plctlab.org/api/1.2/patches/175801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208123737.3611857-1-szabolcs.nagy@arm.com/","msgid":"<20231208123737.3611857-1-szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-08T12:37:37","name":"[committed] libgcc: Fix config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208123737.3611857-1-szabolcs.nagy@arm.com/mbox/"},{"id":175814,"url":"https://patchwork.plctlab.org/api/1.2/patches/175814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208134950.14883-2-amonakov@ispras.ru/","msgid":"<20231208134950.14883-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-12-08T13:49:50","name":"[1/1] object lifetime instrumentation for Valgrind [PR66487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208134950.14883-2-amonakov@ispras.ru/mbox/"},{"id":175820,"url":"https://patchwork.plctlab.org/api/1.2/patches/175820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c45f7b80-b8d6-4f5c-ab3b-5841c04e2c46@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T14:28:59","name":"OpenMP: Handle same-directive mapped vars with pointer predefined firstprivate [PR110639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c45f7b80-b8d6-4f5c-ab3b-5841c04e2c46@codesourcery.com/mbox/"},{"id":175873,"url":"https://patchwork.plctlab.org/api/1.2/patches/175873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXMzFgCxnBWu6Cen@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-12-08T15:15:34","name":"[v3] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXMzFgCxnBWu6Cen@fkdesktop.suse.cz/mbox/"},{"id":175933,"url":"https://patchwork.plctlab.org/api/1.2/patches/175933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at/","msgid":"<6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-08T16:43:50","name":"[C] Fix regression causing ICE for structs with VLAs [PR 112488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at/mbox/"},{"id":175982,"url":"https://patchwork.plctlab.org/api/1.2/patches/175982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXNX/AUfHDOf+57y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T17:53:00","name":"c++, v2: Don'\''t diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXNX/AUfHDOf+57y@tucnak/mbox/"},{"id":176005,"url":"https://patchwork.plctlab.org/api/1.2/patches/176005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208184624.90158-1-polacek@redhat.com/","msgid":"<20231208184624.90158-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-08T18:46:24","name":"[pushed] c++: Add fixed test [PR88848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208184624.90158-1-polacek@redhat.com/mbox/"},{"id":176030,"url":"https://patchwork.plctlab.org/api/1.2/patches/176030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com/","msgid":"<85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com>","list_archive_url":null,"date":"2023-12-08T20:53:26","name":"[pushed,PR112875,LRA] : Fix an assert in lra elimination code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com/mbox/"},{"id":176031,"url":"https://patchwork.plctlab.org/api/1.2/patches/176031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210256.2705893-1-dmalcolm@redhat.com/","msgid":"<20231208210256.2705893-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-08T21:02:56","name":"[pushed] analyzer: fix ICE on infoleak with poisoned size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210256.2705893-1-dmalcolm@redhat.com/mbox/"},{"id":176033,"url":"https://patchwork.plctlab.org/api/1.2/patches/176033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210304.2705943-1-dmalcolm@redhat.com/","msgid":"<20231208210304.2705943-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-08T21:03:04","name":"[pushed] analyzer: avoid taint for (TAINTED % NON_TAINTED)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210304.2705943-1-dmalcolm@redhat.com/mbox/"},{"id":176043,"url":"https://patchwork.plctlab.org/api/1.2/patches/176043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXOHWR4pNh5gNs2C@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T21:15:05","name":"[v2] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXOHWR4pNh5gNs2C@redhat.com/mbox/"},{"id":176078,"url":"https://patchwork.plctlab.org/api/1.2/patches/176078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208233759.2732806-1-ewlu@rivosinc.com/","msgid":"<20231208233759.2732806-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-08T23:37:59","name":"[V2] RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208233759.2732806-1-ewlu@rivosinc.com/mbox/"},{"id":176088,"url":"https://patchwork.plctlab.org/api/1.2/patches/176088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209004356.67577-1-mark@klomp.org/","msgid":"<20231209004356.67577-1-mark@klomp.org>","list_archive_url":null,"date":"2023-12-09T00:43:56","name":"[gcc-wwwdocs,COMMITTED] Disallow /cgit for web robots","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209004356.67577-1-mark@klomp.org/mbox/"},{"id":176110,"url":"https://patchwork.plctlab.org/api/1.2/patches/176110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkb0b00e.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:08:49","name":"strub: add note on attribute access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkb0b00e.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":176111,"url":"https://patchwork.plctlab.org/api/1.2/patches/176111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1e49kpn.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:24:36","name":"-finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1e49kpn.fsf@lxoliva.fsfla.org/mbox/"},{"id":176112,"url":"https://patchwork.plctlab.org/api/1.2/patches/176112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttos9kni.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:25:53","name":"-finline-stringops: don'\''t assume ptr_mode ptr in memset [PR112804]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttos9kni.fsf@lxoliva.fsfla.org/mbox/"},{"id":176113,"url":"https://patchwork.plctlab.org/api/1.2/patches/176113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplzg9jqu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:45:29","name":"-finline-stringops: check base blksize for memset [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplzg9jqu.fsf@lxoliva.fsfla.org/mbox/"},{"id":176114,"url":"https://patchwork.plctlab.org/api/1.2/patches/176114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea49jm5.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:48:18","name":"multiflags: fix doc warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea49jm5.fsf@lxoliva.fsfla.org/mbox/"},{"id":176117,"url":"https://patchwork.plctlab.org/api/1.2/patches/176117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209040629.1104489-1-juzhe.zhong@rivai.ai/","msgid":"<20231209040629.1104489-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-09T04:06:29","name":"RISC-V: Support highest overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209040629.1104489-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176132,"url":"https://patchwork.plctlab.org/api/1.2/patches/176132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyvfambh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T07:04:34","name":"[v2] -finline-stringops: check base blksize for memset [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyvfambh.fsf@lxoliva.fsfla.org/mbox/"},{"id":176148,"url":"https://patchwork.plctlab.org/api/1.2/patches/176148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209083153.1131680-1-juzhe.zhong@rivai.ai/","msgid":"<20231209083153.1131680-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-09T08:31:53","name":"[Committed] RISC-V: Fix VLS mode movmiaslign bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209083153.1131680-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176151,"url":"https://patchwork.plctlab.org/api/1.2/patches/176151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXQ0yJgLGWxAYnm0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-09T09:35:04","name":"phiopt: Fix ICE with large --param l1-cache-line-size= [PR112887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXQ0yJgLGWxAYnm0@tucnak/mbox/"},{"id":176178,"url":"https://patchwork.plctlab.org/api/1.2/patches/176178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5cad739-77d0-4712-ac59-ec5b853bd964@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-09T13:18:36","name":"RISC-V: Recognize stepped series in expand_vec_perm_const.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5cad739-77d0-4712-ac59-ec5b853bd964@gmail.com/mbox/"},{"id":176191,"url":"https://patchwork.plctlab.org/api/1.2/patches/176191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140706.1100111-1-jwakely@redhat.com/","msgid":"<20231209140706.1100111-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-09T14:06:50","name":"[committed] libstdc++: Fix resolution of LWG 4016 for std::ranges::to [PR112876]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140706.1100111-1-jwakely@redhat.com/mbox/"},{"id":176193,"url":"https://patchwork.plctlab.org/api/1.2/patches/176193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140830.1100203-1-jwakely@redhat.com/","msgid":"<20231209140830.1100203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-09T14:07:26","name":"[committed] libstdc++: Fix value of __cpp_lib_format macro [PR111826]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140830.1100203-1-jwakely@redhat.com/mbox/"},{"id":176189,"url":"https://patchwork.plctlab.org/api/1.2/patches/176189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXR6bqrAb2qXdjuU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-09T14:32:14","name":"[committed] testsuite: Add testcase for already fixed PR [PR112924]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXR6bqrAb2qXdjuU@tucnak/mbox/"},{"id":176192,"url":"https://patchwork.plctlab.org/api/1.2/patches/176192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209153944.3746165-1-lipeng.zhu@intel.com/","msgid":"<20231209153944.3746165-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-12-09T15:39:45","name":"[v7] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209153944.3746165-1-lipeng.zhu@intel.com/mbox/"},{"id":176196,"url":"https://patchwork.plctlab.org/api/1.2/patches/176196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209163831.5320-1-xry111@xry111.site/","msgid":"<20231209163831.5320-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T16:38:11","name":"LoongArch: Fix warnings building libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209163831.5320-1-xry111@xry111.site/mbox/"},{"id":176200,"url":"https://patchwork.plctlab.org/api/1.2/patches/176200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-3-xry111@xry111.site/","msgid":"<20231209170347.12601-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:46","name":"[1/3] LoongArch: Include rtl.h for COSTS_N_INSNS instead of hard coding our own","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-3-xry111@xry111.site/mbox/"},{"id":176199,"url":"https://patchwork.plctlab.org/api/1.2/patches/176199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-4-xry111@xry111.site/","msgid":"<20231209170347.12601-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:47","name":"[2/3] LoongArch: Fix instruction costs [PR112936]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-4-xry111@xry111.site/mbox/"},{"id":176201,"url":"https://patchwork.plctlab.org/api/1.2/patches/176201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-5-xry111@xry111.site/","msgid":"<20231209170347.12601-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:48","name":"[3/3] LoongArch: Add alslsi3_extend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-5-xry111@xry111.site/mbox/"},{"id":176224,"url":"https://patchwork.plctlab.org/api/1.2/patches/176224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at/","msgid":"<7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-09T19:58:11","name":"v2 [C PATCH] Fix regression causing ICE for structs with VLAs [PR 112488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at/mbox/"},{"id":176241,"url":"https://patchwork.plctlab.org/api/1.2/patches/176241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209205653.3930232-1-tom@tromey.com/","msgid":"<20231209205653.3930232-1-tom@tromey.com>","list_archive_url":null,"date":"2023-12-09T20:56:53","name":"Add some new DW_IDX_* constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209205653.3930232-1-tom@tromey.com/mbox/"},{"id":176309,"url":"https://patchwork.plctlab.org/api/1.2/patches/176309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210085546.1531375-1-quic_apinski@quicinc.com/","msgid":"<20231210085546.1531375-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T08:55:46","name":"aarch64: Fix wrong code for bfloat when f16 is enabled [PR 111867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210085546.1531375-1-quic_apinski@quicinc.com/mbox/"},{"id":176315,"url":"https://patchwork.plctlab.org/api/1.2/patches/176315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210092125.1535761-1-quic_apinski@quicinc.com/","msgid":"<20231210092125.1535761-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T09:21:25","name":"expr: catch more `a*bool` while expanding [PR 112935]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210092125.1535761-1-quic_apinski@quicinc.com/mbox/"},{"id":176349,"url":"https://patchwork.plctlab.org/api/1.2/patches/176349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT37r+cbCfdcvS1naPELSSyeveg_ueSdzNB-dS+8AaybHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T14:59:47","name":"tree-cfg: Fix misleading error message in verify_gimple_assign_single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT37r+cbCfdcvS1naPELSSyeveg_ueSdzNB-dS+8AaybHA@mail.gmail.com/mbox/"},{"id":176361,"url":"https://patchwork.plctlab.org/api/1.2/patches/176361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210152015.126126-2-xndchn@gmail.com/","msgid":"<20231210152015.126126-2-xndchn@gmail.com>","list_archive_url":null,"date":"2023-12-10T15:20:15","name":"tree-cfg: Fix misleading error message in verify_gimple_assign_single.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210152015.126126-2-xndchn@gmail.com/mbox/"},{"id":176368,"url":"https://patchwork.plctlab.org/api/1.2/patches/176368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8bce888-17ba-4349-9d69-ef7ca66b0923@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T16:36:10","name":"[committed] Fix length computation for logical shifts on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8bce888-17ba-4349-9d69-ef7ca66b0923@gmail.com/mbox/"},{"id":176370,"url":"https://patchwork.plctlab.org/api/1.2/patches/176370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com/","msgid":"<52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com>","list_archive_url":null,"date":"2023-12-10T17:08:15","name":"[committed] Fix length computation of single bit bitfield extraction on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com/mbox/"},{"id":176376,"url":"https://patchwork.plctlab.org/api/1.2/patches/176376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b20a943c-30b3-4b6a-a045-08b3f5a99dd7@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T17:33:01","name":"[committed] Provide patterns for signed bitfield extractions on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b20a943c-30b3-4b6a-a045-08b3f5a99dd7@gmail.com/mbox/"},{"id":176379,"url":"https://patchwork.plctlab.org/api/1.2/patches/176379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03662208-651f-458c-93a9-7aebdbc02586@gmail.com/","msgid":"<03662208-651f-458c-93a9-7aebdbc02586@gmail.com>","list_archive_url":null,"date":"2023-12-10T17:44:00","name":"[committed] Support uaddv and usubv on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03662208-651f-458c-93a9-7aebdbc02586@gmail.com/mbox/"},{"id":176394,"url":"https://patchwork.plctlab.org/api/1.2/patches/176394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzfyhkf6g.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:53:11","name":"[pushed] aarch64: Add -funwind-tables to some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzfyhkf6g.fsf@arm.com/mbox/"},{"id":176395,"url":"https://patchwork.plctlab.org/api/1.2/patches/176395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf49kf5l.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:53:42","name":"[pushed] aarch64: Skip some SME register save tests on BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf49kf5l.fsf@arm.com/mbox/"},{"id":176396,"url":"https://patchwork.plctlab.org/api/1.2/patches/176396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsuhkf4r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:54:12","name":"[pushed] aarch64: XFAIL some SME tests for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsuhkf4r.fsf@arm.com/mbox/"},{"id":176397,"url":"https://patchwork.plctlab.org/api/1.2/patches/176397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6kpkf3r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:54:48","name":"[pushed] aarch64: Fix SMSTART/SMSTOP save/restore for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6kpkf3r.fsf@arm.com/mbox/"},{"id":176399,"url":"https://patchwork.plctlab.org/api/1.2/patches/176399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-2-quic_apinski@quicinc.com/","msgid":"<20231210195650.1772459-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T19:56:49","name":"[1/2] analyzer: Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-2-quic_apinski@quicinc.com/mbox/"},{"id":176398,"url":"https://patchwork.plctlab.org/api/1.2/patches/176398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-3-quic_apinski@quicinc.com/","msgid":"<20231210195650.1772459-3-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T19:56:50","name":"[PATCHv2,2/2] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-3-quic_apinski@quicinc.com/mbox/"},{"id":176417,"url":"https://patchwork.plctlab.org/api/1.2/patches/176417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211011417.18263-1-wangfeng@eswincomputing.com/","msgid":"<20231211011417.18263-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-11T01:14:17","name":"[v3] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211011417.18263-1-wangfeng@eswincomputing.com/mbox/"},{"id":176421,"url":"https://patchwork.plctlab.org/api/1.2/patches/176421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com/","msgid":"<1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T01:49:26","name":"[rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com/mbox/"},{"id":176436,"url":"https://patchwork.plctlab.org/api/1.2/patches/176436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3179721-0e0a-4790-b244-55c95465ecc3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T02:54:32","name":"[rs6000] Clean up pre-checking of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3179721-0e0a-4790-b244-55c95465ecc3@linux.ibm.com/mbox/"},{"id":176447,"url":"https://patchwork.plctlab.org/api/1.2/patches/176447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-1-guojiufu@linux.ibm.com/","msgid":"<20231211032604.3299841-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T03:26:03","name":"[V4,1/3] rs6000: accurate num_insns_constant_gpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-1-guojiufu@linux.ibm.com/mbox/"},{"id":176448,"url":"https://patchwork.plctlab.org/api/1.2/patches/176448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-2-guojiufu@linux.ibm.com/","msgid":"<20231211032604.3299841-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T03:26:04","name":"[V4,2/3] Using pli for constant splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-2-guojiufu@linux.ibm.com/mbox/"},{"id":176475,"url":"https://patchwork.plctlab.org/api/1.2/patches/176475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211051919.3236502-1-juzhe.zhong@rivai.ai/","msgid":"<20231211051919.3236502-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T05:19:19","name":"RISC-V: Remove poly selftest when --preference=fixed-vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211051919.3236502-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176503,"url":"https://patchwork.plctlab.org/api/1.2/patches/176503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211064939.1751320-1-hongtao.liu@intel.com/","msgid":"<20231211064939.1751320-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-11T06:49:39","name":"[v3] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VCE d))).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211064939.1751320-1-hongtao.liu@intel.com/mbox/"},{"id":176511,"url":"https://patchwork.plctlab.org/api/1.2/patches/176511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211073019.2352703-1-juzhe.zhong@rivai.ai/","msgid":"<20231211073019.2352703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T07:30:19","name":"[Committed] RISC-V: Fix ICE in extract_single_source","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211073019.2352703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176533,"url":"https://patchwork.plctlab.org/api/1.2/patches/176533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211083734.2548970-1-juzhe.zhong@rivai.ai/","msgid":"<20231211083734.2548970-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T08:37:34","name":"RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211083734.2548970-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176534,"url":"https://patchwork.plctlab.org/api/1.2/patches/176534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXbK8qYENq521KSd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-11T08:40:18","name":"testsuite: Disable -fstack-protector* for some strub tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXbK8qYENq521KSd@tucnak/mbox/"},{"id":176553,"url":"https://patchwork.plctlab.org/api/1.2/patches/176553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211091928.D2392385840C@sourceware.org/","msgid":"<20231211091928.D2392385840C@sourceware.org>","list_archive_url":null,"date":"2023-12-11T09:17:58","name":"ipa/92606 - properly handle no_icf attribute for variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211091928.D2392385840C@sourceware.org/mbox/"},{"id":176557,"url":"https://patchwork.plctlab.org/api/1.2/patches/176557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c41ae3-d053-41b9-8b66-35e88d1590e7@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-12-11T09:28:31","name":"[avr] PR112944: Support .rodata in RAM for AVR64* and AVR128* devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c41ae3-d053-41b9-8b66-35e88d1590e7@gjlay.de/mbox/"},{"id":176564,"url":"https://patchwork.plctlab.org/api/1.2/patches/176564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-2-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-2-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:26","name":"[1/3] RISC-V: movmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-2-slewis@rivosinc.com/mbox/"},{"id":176565,"url":"https://patchwork.plctlab.org/api/1.2/patches/176565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-3-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-3-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:27","name":"[2/3] RISC-V: setmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-3-slewis@rivosinc.com/mbox/"},{"id":176566,"url":"https://patchwork.plctlab.org/api/1.2/patches/176566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-4-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-4-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:28","name":"[3/3] RISC-V: cmpmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-4-slewis@rivosinc.com/mbox/"},{"id":176576,"url":"https://patchwork.plctlab.org/api/1.2/patches/176576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211100710.348988-1-ibuclaw@gdcproject.org/","msgid":"<20231211100710.348988-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-12-11T10:07:10","name":"[committed] d: Merge upstream dmd, druntime 2bbf64907c, phobos b64bfbf91","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211100710.348988-1-ibuclaw@gdcproject.org/mbox/"},{"id":176586,"url":"https://patchwork.plctlab.org/api/1.2/patches/176586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd5y15qbec.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-11T10:30:35","name":"ada: Fix Ada bootstrap on FreeBSD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd5y15qbec.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":176613,"url":"https://patchwork.plctlab.org/api/1.2/patches/176613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com/","msgid":"<16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T11:45:27","name":"OpenMP: Minor '\''!$omp allocators'\'' cleanup - and still: Re: [patch] OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com/mbox/"},{"id":176634,"url":"https://patchwork.plctlab.org/api/1.2/patches/176634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211120156.1720292-1-juzhe.zhong@rivai.ai/","msgid":"<20231211120156.1720292-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T12:01:56","name":"RISC-V: Robostify shuffle index used by vrgather and fix regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211120156.1720292-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176654,"url":"https://patchwork.plctlab.org/api/1.2/patches/176654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211121903.1864526-1-juzhe.zhong@rivai.ai/","msgid":"<20231211121903.1864526-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T12:19:03","name":"[COMMITTED,V2] RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211121903.1864526-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176671,"url":"https://patchwork.plctlab.org/api/1.2/patches/176671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211122020.3645581-1-hongyu.wang@intel.com/","msgid":"<20231211122020.3645581-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-11T12:20:20","name":"i386: Fix missed APX_NDD check for shift/rotate expanders [PR 112943]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211122020.3645581-1-hongyu.wang@intel.com/mbox/"},{"id":176696,"url":"https://patchwork.plctlab.org/api/1.2/patches/176696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211125158.2872910-2-mikpelinux@gmail.com/","msgid":"<20231211125158.2872910-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-12-11T12:51:39","name":"wrong code on m68k with -mlong-jump-table-offsets and -malign-int (PR target/112413)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211125158.2872910-2-mikpelinux@gmail.com/mbox/"},{"id":176722,"url":"https://patchwork.plctlab.org/api/1.2/patches/176722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211135401.1227845-1-poulhies@adacore.com/","msgid":"<20231211135401.1227845-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-11T13:35:52","name":"[v2] testsuite: adjust call to abort in excess-precision-12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211135401.1227845-1-poulhies@adacore.com/mbox/"},{"id":176721,"url":"https://patchwork.plctlab.org/api/1.2/patches/176721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com/","msgid":"<76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com>","list_archive_url":null,"date":"2023-12-11T13:40:37","name":"RISC-V: testsuite: Fix strcmp-run.c test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com/mbox/"},{"id":176728,"url":"https://patchwork.plctlab.org/api/1.2/patches/176728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com/","msgid":"<20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com>","list_archive_url":null,"date":"2023-12-11T14:21:30","name":"Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com/mbox/"},{"id":176741,"url":"https://patchwork.plctlab.org/api/1.2/patches/176741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com/","msgid":"<3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com>","list_archive_url":null,"date":"2023-12-11T15:13:03","name":"[v4] aarch64: SVE/NEON Bridging intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com/mbox/"},{"id":176742,"url":"https://patchwork.plctlab.org/api/1.2/patches/176742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y14g3vt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T15:23:02","name":"Ping: [PATCH] Treat \"p\" in asms as addressing VOIDmode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y14g3vt.fsf@arm.com/mbox/"},{"id":176743,"url":"https://patchwork.plctlab.org/api/1.2/patches/176743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttooepa1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T15:23:50","name":"Ping: [PATCH] Add a late-combine pass [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttooepa1.fsf@arm.com/mbox/"},{"id":176809,"url":"https://patchwork.plctlab.org/api/1.2/patches/176809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170004.1393588-1-ppalka@redhat.com/","msgid":"<20231211170004.1393588-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-11T17:00:04","name":"[pushed] c++: add fixed testcase [PR63378]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170004.1393588-1-ppalka@redhat.com/mbox/"},{"id":176810,"url":"https://patchwork.plctlab.org/api/1.2/patches/176810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-2-ams@codesourcery.com/","msgid":"<20231211170405.2538247-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:00","name":"[v3,1/6] libgomp: basic pinned memory on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-2-ams@codesourcery.com/mbox/"},{"id":176811,"url":"https://patchwork.plctlab.org/api/1.2/patches/176811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-3-ams@codesourcery.com/","msgid":"<20231211170405.2538247-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:01","name":"[v3,2/6] libgomp, openmp: Add ompx_pinned_mem_alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-3-ams@codesourcery.com/mbox/"},{"id":176812,"url":"https://patchwork.plctlab.org/api/1.2/patches/176812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-4-ams@codesourcery.com/","msgid":"<20231211170405.2538247-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:02","name":"[v3,3/6] openmp: Add -foffload-memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-4-ams@codesourcery.com/mbox/"},{"id":176814,"url":"https://patchwork.plctlab.org/api/1.2/patches/176814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-5-ams@codesourcery.com/","msgid":"<20231211170405.2538247-5-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:03","name":"[v3,4/6] openmp: -foffload-memory=pinned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-5-ams@codesourcery.com/mbox/"},{"id":176813,"url":"https://patchwork.plctlab.org/api/1.2/patches/176813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-6-ams@codesourcery.com/","msgid":"<20231211170405.2538247-6-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:04","name":"[v3,5/6] libgomp, nvptx: Cuda pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-6-ams@codesourcery.com/mbox/"},{"id":176815,"url":"https://patchwork.plctlab.org/api/1.2/patches/176815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-7-ams@codesourcery.com/","msgid":"<20231211170405.2538247-7-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:05","name":"[v3,6/6] libgomp: fine-grained pinned memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-7-ams@codesourcery.com/mbox/"},{"id":176856,"url":"https://patchwork.plctlab.org/api/1.2/patches/176856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkaw8vlx.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-11T18:03:38","name":"[v2,FYI] -finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkaw8vlx.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":176892,"url":"https://patchwork.plctlab.org/api/1.2/patches/176892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211191039.957070-1-jason@redhat.com/","msgid":"<20231211191039.957070-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-11T19:10:39","name":"[pushed] testsuite: update mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211191039.957070-1-jason@redhat.com/mbox/"},{"id":176917,"url":"https://patchwork.plctlab.org/api/1.2/patches/176917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211212240.3029438-1-dmalcolm@redhat.com/","msgid":"<20231211212240.3029438-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-11T21:22:40","name":"analyzer: fix uninitialized bitmap [PR112955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211212240.3029438-1-dmalcolm@redhat.com/mbox/"},{"id":177005,"url":"https://patchwork.plctlab.org/api/1.2/patches/177005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttoo6wb7.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T01:31:24","name":"multiflags: fix doc warning properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttoo6wb7.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177006,"url":"https://patchwork.plctlab.org/api/1.2/patches/177006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea06uut.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T02:02:50","name":"[#1/2] strub: handle volatile promoted args in internal strub [PR112938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea06uut.fsf@lxoliva.fsfla.org/mbox/"},{"id":177009,"url":"https://patchwork.plctlab.org/api/1.2/patches/177009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020310.21388-1-wangfeng@eswincomputing.com/","msgid":"<20231212020310.21388-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:03:10","name":"[committed] MAINTAINERS: Add myself to write after approval and DCO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020310.21388-1-wangfeng@eswincomputing.com/mbox/"},{"id":177011,"url":"https://patchwork.plctlab.org/api/1.2/patches/177011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020638.4131759-1-juzhe.zhong@rivai.ai/","msgid":"<20231212020638.4131759-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T02:06:38","name":"[Committed] RISC-V: Move RVV POLY VALUE estimation from riscv.cc to riscv-v.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020638.4131759-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177012,"url":"https://patchwork.plctlab.org/api/1.2/patches/177012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021326.36564-1-wangfeng@eswincomputing.com/","msgid":"<20231212021326.36564-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:13:26","name":"[committed] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021326.36564-1-wangfeng@eswincomputing.com/mbox/"},{"id":177013,"url":"https://patchwork.plctlab.org/api/1.2/patches/177013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021910.8078-1-wangfeng@eswincomputing.com/","msgid":"<20231212021910.8078-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:19:10","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021910.8078-1-wangfeng@eswincomputing.com/mbox/"},{"id":177050,"url":"https://patchwork.plctlab.org/api/1.2/patches/177050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212023259.3053155-1-dmalcolm@redhat.com/","msgid":"<20231212023259.3053155-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-12T02:32:59","name":"[pushed] analyzer: add more test coverage for tainted modulus","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212023259.3053155-1-dmalcolm@redhat.com/mbox/"},{"id":177060,"url":"https://patchwork.plctlab.org/api/1.2/patches/177060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6ko6sr3.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T02:48:16","name":"[#2/2] strub: drop volatile from wrapper args [PR112938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6ko6sr3.fsf@lxoliva.fsfla.org/mbox/"},{"id":177062,"url":"https://patchwork.plctlab.org/api/1.2/patches/177062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212030031.1023808-1-jason@redhat.com/","msgid":"<20231212030031.1023808-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-12T03:00:31","name":"contrib: add git gcc-style alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212030031.1023808-1-jason@redhat.com/mbox/"},{"id":177104,"url":"https://patchwork.plctlab.org/api/1.2/patches/177104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212061208.234184-1-hongtao.liu@intel.com/","msgid":"<20231212061208.234184-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-12T06:12:08","name":"Adjust vectorized cost for reduction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212061208.234184-1-hongtao.liu@intel.com/mbox/"},{"id":177106,"url":"https://patchwork.plctlab.org/api/1.2/patches/177106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212064754.6623-1-xry111@xry111.site/","msgid":"<20231212064754.6623-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-12T06:47:28","name":"LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212064754.6623-1-xry111@xry111.site/mbox/"},{"id":177110,"url":"https://patchwork.plctlab.org/api/1.2/patches/177110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55a3078-56d0-1646-a96c-4e923a90833d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T07:02:49","name":"[draft,v2] sched: Don'\''t skip empty block in scheduling [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55a3078-56d0-1646-a96c-4e923a90833d@linux.ibm.com/mbox/"},{"id":177114,"url":"https://patchwork.plctlab.org/api/1.2/patches/177114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212071552.2CAE4385AC1C@sourceware.org/","msgid":"<20231212071552.2CAE4385AC1C@sourceware.org>","list_archive_url":null,"date":"2023-12-12T07:14:23","name":"tree-optimization/112939 - VN PHI visiting and -ftrivial-auto-var-init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212071552.2CAE4385AC1C@sourceware.org/mbox/"},{"id":177132,"url":"https://patchwork.plctlab.org/api/1.2/patches/177132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXgVTUV4I01zdMRS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T08:09:49","name":"[committed] libquadmath: Restore linking against -lm on most targets [PR112963]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXgVTUV4I01zdMRS@tucnak/mbox/"},{"id":177137,"url":"https://patchwork.plctlab.org/api/1.2/patches/177137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082129.2556235-1-quic_apinski@quicinc.com/","msgid":"<20231212082129.2556235-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-12T08:21:29","name":"aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082129.2556235-1-quic_apinski@quicinc.com/mbox/"},{"id":177175,"url":"https://patchwork.plctlab.org/api/1.2/patches/177175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082849.1845268-1-pan2.li@intel.com/","msgid":"<20231212082849.1845268-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-12T08:28:49","name":"[v1] RISC-V: Disable RVV VCOMPRESS avl propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082849.1845268-1-pan2.li@intel.com/mbox/"},{"id":177208,"url":"https://patchwork.plctlab.org/api/1.2/patches/177208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212095006.12830-1-xujiahao@loongson.cn/","msgid":"<20231212095006.12830-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-12T09:50:06","name":"LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212095006.12830-1-xujiahao@loongson.cn/mbox/"},{"id":177215,"url":"https://patchwork.plctlab.org/api/1.2/patches/177215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212100132.3006956-1-demin.han@starfivetech.com/","msgid":"<20231212100132.3006956-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-12T10:01:32","name":"RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212100132.3006956-1-demin.han@starfivetech.com/mbox/"},{"id":177234,"url":"https://patchwork.plctlab.org/api/1.2/patches/177234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105315.55F403857BA4@sourceware.org/","msgid":"<20231212105315.55F403857BA4@sourceware.org>","list_archive_url":null,"date":"2023-12-12T10:51:40","name":"tree-optimization/112736 - avoid overread with non-grouped SLP load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105315.55F403857BA4@sourceware.org/mbox/"},{"id":177235,"url":"https://patchwork.plctlab.org/api/1.2/patches/177235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105411.1184445-1-juzhe.zhong@rivai.ai/","msgid":"<20231212105411.1184445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T10:54:11","name":"RISC-V: Refactor Dynamic LMUL codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105411.1184445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177261,"url":"https://patchwork.plctlab.org/api/1.2/patches/177261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212111412.29351-1-xujiahao@loongson.cn/","msgid":"<20231212111412.29351-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-12T11:14:12","name":"[v2] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212111412.29351-1-xujiahao@loongson.cn/mbox/"},{"id":177275,"url":"https://patchwork.plctlab.org/api/1.2/patches/177275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-1-j@lambda.is/","msgid":"<20231212114125.1998866-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-12T11:41:24","name":"[v8,1/2] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-1-j@lambda.is/mbox/"},{"id":177274,"url":"https://patchwork.plctlab.org/api/1.2/patches/177274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-2-j@lambda.is/","msgid":"<20231212114125.1998866-2-j@lambda.is>","list_archive_url":null,"date":"2023-12-12T11:41:25","name":"[v8,2/2] Add gcov MC/DC tests for GDC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-2-j@lambda.is/mbox/"},{"id":177288,"url":"https://patchwork.plctlab.org/api/1.2/patches/177288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212120809.13996-1-jiawei@iscas.ac.cn/","msgid":"<20231212120809.13996-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-12T12:08:09","name":"[v2] RISC-V: Supports RISC-V Profiles in '\''-march'\'' option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212120809.13996-1-jiawei@iscas.ac.cn/mbox/"},{"id":177289,"url":"https://patchwork.plctlab.org/api/1.2/patches/177289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T12:09:22","name":"[committed] testsuite: Fix up test directive syntax errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"},{"id":177419,"url":"https://patchwork.plctlab.org/api/1.2/patches/177419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745200.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:04:33","name":"[DejaGNU,1/1] Support per-test execution timeout factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745200.5892@tpp.orcam.me.uk/mbox/"},{"id":177370,"url":"https://patchwork.plctlab.org/api/1.2/patches/177370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745330.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:04:51","name":"[GCC,1/1] testsuite: Support test execution timeout factor as a keyword","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745330.5892@tpp.orcam.me.uk/mbox/"},{"id":177374,"url":"https://patchwork.plctlab.org/api/1.2/patches/177374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212141410.8B98C385C419@sourceware.org/","msgid":"<20231212141410.8B98C385C419@sourceware.org>","list_archive_url":null,"date":"2023-12-12T14:12:39","name":"tree-optimization/112961 - include latch in if-conversion CSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212141410.8B98C385C419@sourceware.org/mbox/"},{"id":177377,"url":"https://patchwork.plctlab.org/api/1.2/patches/177377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212142552.102285-1-juzhe.zhong@rivai.ai/","msgid":"<20231212142552.102285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T14:25:52","name":"RISC-V: Apply vla vs. vls mode heuristic vector COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212142552.102285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177382,"url":"https://patchwork.plctlab.org/api/1.2/patches/177382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhwQVQzBiy2hv89@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:37:53","name":"Disable FMADD in chains for Zen4 and generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhwQVQzBiy2hv89@kam.mff.cuni.cz/mbox/"},{"id":177405,"url":"https://patchwork.plctlab.org/api/1.2/patches/177405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212152258.4164170-1-szabolcs.nagy@arm.com/","msgid":"<20231212152258.4164170-1-szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-12T15:22:58","name":"[v3] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212152258.4164170-1-szabolcs.nagy@arm.com/mbox/"},{"id":177468,"url":"https://patchwork.plctlab.org/api/1.2/patches/177468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-12-12T16:50:19","name":"SRA: Force gimple operand in an additional corner case (PR 112822)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":177502,"url":"https://patchwork.plctlab.org/api/1.2/patches/177502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212174845.1197227-1-jason@redhat.com/","msgid":"<20231212174845.1197227-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-12T17:48:45","name":"[pushed] testsuite: fix is_nothrow_default_constructible8.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212174845.1197227-1-jason@redhat.com/mbox/"},{"id":177508,"url":"https://patchwork.plctlab.org/api/1.2/patches/177508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184037.3040106-1-ppalka@redhat.com/","msgid":"<20231212184037.3040106-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-12T18:40:37","name":"c++: unifying FUNCTION_DECLs [PR93740]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184037.3040106-1-ppalka@redhat.com/mbox/"},{"id":177509,"url":"https://patchwork.plctlab.org/api/1.2/patches/177509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184436.64547-1-xry111@xry111.site/","msgid":"<20231212184436.64547-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-12T18:43:36","name":"[pushed] LoongArch: testsuite: Remove XFAIL in vect-ftint-no-inexact.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184436.64547-1-xry111@xry111.site/mbox/"},{"id":177530,"url":"https://patchwork.plctlab.org/api/1.2/patches/177530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6a844a01ebf4b6bb72efbc5f1c3e919@DRWHoldings.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T19:29:40","name":"c++: Fix warmth propagation for member function templates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6a844a01ebf4b6bb72efbc5f1c3e919@DRWHoldings.com/mbox/"},{"id":177533,"url":"https://patchwork.plctlab.org/api/1.2/patches/177533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-2-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:51","name":"[v4,1/3] RISC-V: Add support for XCVelw extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-2-mary.bennett@embecosm.com/mbox/"},{"id":177534,"url":"https://patchwork.plctlab.org/api/1.2/patches/177534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-3-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:52","name":"[v4,2/3] RISC-V: Update XCValu constraints to match other vendors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-3-mary.bennett@embecosm.com/mbox/"},{"id":177535,"url":"https://patchwork.plctlab.org/api/1.2/patches/177535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-4-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-4-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:53","name":"[v4,3/3] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-4-mary.bennett@embecosm.com/mbox/"},{"id":177602,"url":"https://patchwork.plctlab.org/api/1.2/patches/177602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212212143.64983-1-ppalka@redhat.com/","msgid":"<20231212212143.64983-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-12T21:21:43","name":"c++: unifying constants vs their type [PR99186, PR104867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212212143.64983-1-ppalka@redhat.com/mbox/"},{"id":177634,"url":"https://patchwork.plctlab.org/api/1.2/patches/177634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212223511.15390-1-david.faust@oracle.com/","msgid":"<20231212223511.15390-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-12-12T22:35:11","name":"btf: change encoding of forward-declared enums [PR111735]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212223511.15390-1-david.faust@oracle.com/mbox/"},{"id":177690,"url":"https://patchwork.plctlab.org/api/1.2/patches/177690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224646.1518312-1-jwakely@redhat.com/","msgid":"<20231212224646.1518312-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:18","name":"[committed] libstdc++: Remove redundant -std flags from Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224646.1518312-1-jwakely@redhat.com/mbox/"},{"id":177673,"url":"https://patchwork.plctlab.org/api/1.2/patches/177673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224654.1518338-1-jwakely@redhat.com/","msgid":"<20231212224654.1518338-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:47","name":"[committed] libstdc++: Fix std::format output of %C for negative years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224654.1518338-1-jwakely@redhat.com/mbox/"},{"id":177716,"url":"https://patchwork.plctlab.org/api/1.2/patches/177716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224702.1518352-1-jwakely@redhat.com/","msgid":"<20231212224702.1518352-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:55","name":"[committed] libstdc++: Fix std::format(\"{}\", '\''c'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224702.1518352-1-jwakely@redhat.com/mbox/"},{"id":177635,"url":"https://patchwork.plctlab.org/api/1.2/patches/177635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXjjT8Yn80pq7Bky@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T22:48:47","name":"[v3] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXjjT8Yn80pq7Bky@redhat.com/mbox/"},{"id":177668,"url":"https://patchwork.plctlab.org/api/1.2/patches/177668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212231803.339670-1-lhyatt@gmail.com/","msgid":"<20231212231803.339670-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-12T23:18:03","name":"libcpp: Fix macro expansion for argument of __has_include [PR110558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212231803.339670-1-lhyatt@gmail.com/mbox/"},{"id":177735,"url":"https://patchwork.plctlab.org/api/1.2/patches/177735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213013107.34464-1-chenxiaolong@loongson.cn/","msgid":"<20231213013107.34464-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-13T01:31:07","name":"[v2] LoongArch: Modify the check type of the vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213013107.34464-1-chenxiaolong@loongson.cn/mbox/"},{"id":177752,"url":"https://patchwork.plctlab.org/api/1.2/patches/177752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213021752.348476-1-haochen.jiang@intel.com/","msgid":"<20231213021752.348476-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-13T02:17:52","name":"i386: Fix PR110790 testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213021752.348476-1-haochen.jiang@intel.com/mbox/"},{"id":177759,"url":"https://patchwork.plctlab.org/api/1.2/patches/177759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkau6bvu.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-13T03:04:53","name":"[#2a/2] ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkau6bvu.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177760,"url":"https://patchwork.plctlab.org/api/1.2/patches/177760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5qe6btb.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-13T03:06:24","name":"[#2a/2] strub: indirect volatile parms in wrappers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5qe6btb.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177766,"url":"https://patchwork.plctlab.org/api/1.2/patches/177766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213032451.8054-1-zengxiao@eswincomputing.com/","msgid":"<20231213032451.8054-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T03:24:51","name":"RISC-V: Add Zvfbfmin extension to the -march= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213032451.8054-1-zengxiao@eswincomputing.com/mbox/"},{"id":177769,"url":"https://patchwork.plctlab.org/api/1.2/patches/177769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213035405.2118-1-palmer@rivosinc.com/","msgid":"<20231213035405.2118-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-13T03:54:05","name":"RISC-V: Don'\''t make Ztso imply A","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213035405.2118-1-palmer@rivosinc.com/mbox/"},{"id":177782,"url":"https://patchwork.plctlab.org/api/1.2/patches/177782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213054811.331836-1-juzhe.zhong@rivai.ai/","msgid":"<20231213054811.331836-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-13T05:48:11","name":"RISC-V: Postpone full available optimization [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213054811.331836-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177807,"url":"https://patchwork.plctlab.org/api/1.2/patches/177807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213072558.805297-1-demin.han@starfivetech.com/","msgid":"<20231213072558.805297-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-13T07:25:58","name":"RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213072558.805297-1-demin.han@starfivetech.com/mbox/"},{"id":177811,"url":"https://patchwork.plctlab.org/api/1.2/patches/177811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213080009.3E0F4385AE43@sourceware.org/","msgid":"<20231213080009.3E0F4385AE43@sourceware.org>","list_archive_url":null,"date":"2023-12-13T07:58:40","name":"middle-end/111591 - explain why TBAA doesn'\''t need adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213080009.3E0F4385AE43@sourceware.org/mbox/"},{"id":177814,"url":"https://patchwork.plctlab.org/api/1.2/patches/177814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213082244.3760797-1-shihua@iscas.ac.cn/","msgid":"<20231213082244.3760797-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-13T08:22:44","name":"RISC-V: fix scalar crypto pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213082244.3760797-1-shihua@iscas.ac.cn/mbox/"},{"id":177815,"url":"https://patchwork.plctlab.org/api/1.2/patches/177815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlqLxcI69T1ypbA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:24:15","name":"attribs: Fix valgrind failures on -Wno-attributes* tests [PR112953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlqLxcI69T1ypbA@tucnak/mbox/"},{"id":177817,"url":"https://patchwork.plctlab.org/api/1.2/patches/177817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXltpRf/CIlKnbxD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:39:01","name":"libcpp: Fix valgrind errors on pr88974.c [PR112956]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXltpRf/CIlKnbxD@tucnak/mbox/"},{"id":177818,"url":"https://patchwork.plctlab.org/api/1.2/patches/177818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084337.89B8A385B534@sourceware.org/","msgid":"<20231213084337.89B8A385B534@sourceware.org>","list_archive_url":null,"date":"2023-12-13T08:42:09","name":"tree-optimization/112991 - re-do PR112961 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084337.89B8A385B534@sourceware.org/mbox/"},{"id":177819,"url":"https://patchwork.plctlab.org/api/1.2/patches/177819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlu12NJxQVbvYfG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:44:07","name":"i386: Fix ICE on __builtin_ia32_pabsd128 without lhs [PR112962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlu12NJxQVbvYfG@tucnak/mbox/"},{"id":177820,"url":"https://patchwork.plctlab.org/api/1.2/patches/177820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084617.687873860745@sourceware.org/","msgid":"<20231213084617.687873860745@sourceware.org>","list_archive_url":null,"date":"2023-12-13T08:44:50","name":"tree-optimization/112990 - unsupported VEC_PERM from match pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084617.687873860745@sourceware.org/mbox/"},{"id":177823,"url":"https://patchwork.plctlab.org/api/1.2/patches/177823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213090800.5F671385B526@sourceware.org/","msgid":"<20231213090800.5F671385B526@sourceware.org>","list_archive_url":null,"date":"2023-12-13T09:06:20","name":"Avoid losing MEM_REF offset in MEM_EXPR adjustment for stack slot sharing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213090800.5F671385B526@sourceware.org/mbox/"},{"id":177826,"url":"https://patchwork.plctlab.org/api/1.2/patches/177826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-1-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:47","name":"[v2,1/4] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-1-wangfeng@eswincomputing.com/mbox/"},{"id":177827,"url":"https://patchwork.plctlab.org/api/1.2/patches/177827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-2-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:48","name":"[v3,2/4] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-2-wangfeng@eswincomputing.com/mbox/"},{"id":177828,"url":"https://patchwork.plctlab.org/api/1.2/patches/177828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-3-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:49","name":"[v3,3/4] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-3-wangfeng@eswincomputing.com/mbox/"},{"id":177829,"url":"https://patchwork.plctlab.org/api/1.2/patches/177829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-4-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:50","name":"[v3,4/4] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-4-wangfeng@eswincomputing.com/mbox/"},{"id":177831,"url":"https://patchwork.plctlab.org/api/1.2/patches/177831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213092107.191733-1-juzhe.zhong@rivai.ai/","msgid":"<20231213092107.191733-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-13T09:21:07","name":"Middle-end: Adjust decrement IV style partial vectorization COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213092107.191733-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177832,"url":"https://patchwork.plctlab.org/api/1.2/patches/177832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl3pyJVPCP9L521@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T09:21:43","name":"i386: Make most MD builtins nothrow, leaf [PR112962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl3pyJVPCP9L521@tucnak/mbox/"},{"id":177841,"url":"https://patchwork.plctlab.org/api/1.2/patches/177841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl+DgQFUfnH5dJY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T09:49:02","name":"c++: Fix tinst_level::to_list [PR112968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl+DgQFUfnH5dJY@tucnak/mbox/"},{"id":177843,"url":"https://patchwork.plctlab.org/api/1.2/patches/177843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXmAzPc15GJrckZM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T10:00:44","name":"lower-bitint: Fix lowering of non-_BitInt to _BitInt cast merged with some wider cast [PR112940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXmAzPc15GJrckZM@tucnak/mbox/"},{"id":177881,"url":"https://patchwork.plctlab.org/api/1.2/patches/177881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213110733.4089129-1-c@jia.je/","msgid":"<20231213110733.4089129-1-c@jia.je>","list_archive_url":null,"date":"2023-12-13T11:07:22","name":"extend.texi: Fix typos in LSX intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213110733.4089129-1-c@jia.je/mbox/"},{"id":177890,"url":"https://patchwork.plctlab.org/api/1.2/patches/177890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213111203.618197-1-demin.han@starfivetech.com/","msgid":"<20231213111203.618197-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-13T11:12:03","name":"[v2] RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213111203.618197-1-demin.han@starfivetech.com/mbox/"},{"id":178036,"url":"https://patchwork.plctlab.org/api/1.2/patches/178036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123140.1610945-1-jwakely@redhat.com/","msgid":"<20231213123140.1610945-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-13T12:30:35","name":"[committed] libstdc++: Fix regression in std::format output of %Y for negative years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123140.1610945-1-jwakely@redhat.com/mbox/"},{"id":177942,"url":"https://patchwork.plctlab.org/api/1.2/patches/177942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123224.0020C385332C@sourceware.org/","msgid":"<20231213123224.0020C385332C@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:30:52","name":"[1/6] Reduce the number of get_vectype_for_scalar_type calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123224.0020C385332C@sourceware.org/mbox/"},{"id":177944,"url":"https://patchwork.plctlab.org/api/1.2/patches/177944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123257.BA2D6384DEF7@sourceware.org/","msgid":"<20231213123257.BA2D6384DEF7@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:30:59","name":"[2/6] Set LOOP_VINFO_VECT_FACTOR only when it is final","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123257.BA2D6384DEF7@sourceware.org/mbox/"},{"id":177946,"url":"https://patchwork.plctlab.org/api/1.2/patches/177946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123306.2BC39388300A@sourceware.org/","msgid":"<20231213123306.2BC39388300A@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:05","name":"[3/6] Query an appropriate offset vector type in vect_gather_scatter_fn_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123306.2BC39388300A@sourceware.org/mbox/"},{"id":177943,"url":"https://patchwork.plctlab.org/api/1.2/patches/177943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123246.16BE53845159@sourceware.org/","msgid":"<20231213123246.16BE53845159@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:12","name":"[4/6] More explicit vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123246.16BE53845159@sourceware.org/mbox/"},{"id":177945,"url":"https://patchwork.plctlab.org/api/1.2/patches/177945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123300.DFB4D387543C@sourceware.org/","msgid":"<20231213123300.DFB4D387543C@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:20","name":"[5/6] Allow poly_uint64 for group_size args to vector type query routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123300.DFB4D387543C@sourceware.org/mbox/"},{"id":177947,"url":"https://patchwork.plctlab.org/api/1.2/patches/177947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123336.4544D3858D39@sourceware.org/","msgid":"<20231213123336.4544D3858D39@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:27","name":"[6/6] Defer assigning vector types until after VF is determined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123336.4544D3858D39@sourceware.org/mbox/"},{"id":177985,"url":"https://patchwork.plctlab.org/api/1.2/patches/177985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213131748.35135-1-wangfeng@eswincomputing.com/","msgid":"<20231213131748.35135-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T13:17:48","name":"[committed] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213131748.35135-1-wangfeng@eswincomputing.com/mbox/"},{"id":177993,"url":"https://patchwork.plctlab.org/api/1.2/patches/177993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213134927.3453856-1-pan2.li@intel.com/","msgid":"<20231213134927.3453856-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-13T13:49:27","name":"[v1] RISC-V: Refine test cases for both PR112929 and PR112988","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213134927.3453856-1-pan2.li@intel.com/mbox/"},{"id":178043,"url":"https://patchwork.plctlab.org/api/1.2/patches/178043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213142240.7974-1-xry111@xry111.site/","msgid":"<20231213142240.7974-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-13T14:20:09","name":"LoongArch: Use the movcf2gr instruction to implement cstore4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213142240.7974-1-xry111@xry111.site/mbox/"},{"id":178065,"url":"https://patchwork.plctlab.org/api/1.2/patches/178065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2ebaca6-7bae-7130-a160-33c4e7152670@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T14:47:47","name":"[committed,v2] aarch64: Add missing driver-aarch64 dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2ebaca6-7bae-7130-a160-33c4e7152670@e124511.cambridge.arm.com/mbox/"},{"id":178066,"url":"https://patchwork.plctlab.org/api/1.2/patches/178066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com/","msgid":"<4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-13T14:49:50","name":"[committed,v2] aarch64 testsuite: Check entire .arch string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com/mbox/"},{"id":178067,"url":"https://patchwork.plctlab.org/api/1.2/patches/178067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com/","msgid":"<4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-13T14:52:26","name":"[v2] aarch64: Fix +nocrypto handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com/mbox/"},{"id":178069,"url":"https://patchwork.plctlab.org/api/1.2/patches/178069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bffc7bdd-e883-697a-d210-729aab43d67d@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T14:58:45","name":"[v2] aarch64: Fix +nopredres, +nols64 and +nomops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bffc7bdd-e883-697a-d210-729aab43d67d@e124511.cambridge.arm.com/mbox/"},{"id":178085,"url":"https://patchwork.plctlab.org/api/1.2/patches/178085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c65c1f10-1591-40c2-a3a8-2281ab5a7ff3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T15:17:52","name":"[wwwdocs] gcc-14/changes.html + project/gomp/: Update OpenMP status","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c65c1f10-1591-40c2-a3a8-2281ab5a7ff3@codesourcery.com/mbox/"},{"id":178101,"url":"https://patchwork.plctlab.org/api/1.2/patches/178101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213152615.4132230-1-c@jia.je/","msgid":"<20231213152615.4132230-1-c@jia.je>","list_archive_url":null,"date":"2023-12-13T15:26:01","name":"[v2] extend.texi: Fix typos in LSX intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213152615.4132230-1-c@jia.je/mbox/"},{"id":178142,"url":"https://patchwork.plctlab.org/api/1.2/patches/178142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4031e78-a5a0-4856-b951-643c4cc9de07@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T15:46:45","name":"[committed] amdgcn: XNACK support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4031e78-a5a0-4856-b951-643c4cc9de07@codesourcery.com/mbox/"},{"id":178147,"url":"https://patchwork.plctlab.org/api/1.2/patches/178147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXnX24ZRkpHr7B-m@localhost.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-13T16:12:11","name":"[v4] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXnX24ZRkpHr7B-m@localhost.localdomain/mbox/"},{"id":178172,"url":"https://patchwork.plctlab.org/api/1.2/patches/178172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-1-jason@redhat.com/","msgid":"<20231213164740.1591535-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:37","name":"[pushed,1/4] c++: copy location to AGGR_INIT_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-1-jason@redhat.com/mbox/"},{"id":178175,"url":"https://patchwork.plctlab.org/api/1.2/patches/178175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-2-jason@redhat.com/","msgid":"<20231213164740.1591535-2-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:38","name":"[pushed,2/4] c++: constant direct-initialization [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-2-jason@redhat.com/mbox/"},{"id":178173,"url":"https://patchwork.plctlab.org/api/1.2/patches/178173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-3-jason@redhat.com/","msgid":"<20231213164740.1591535-3-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:39","name":"[pushed,3/4] c++: fix in-charge parm in constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-3-jason@redhat.com/mbox/"},{"id":178174,"url":"https://patchwork.plctlab.org/api/1.2/patches/178174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-4-jason@redhat.com/","msgid":"<20231213164740.1591535-4-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:40","name":"[pushed,4/4] c++: End lifetime of objects in constexpr after destructor call [PR71093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-4-jason@redhat.com/mbox/"},{"id":178176,"url":"https://patchwork.plctlab.org/api/1.2/patches/178176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213165100.3260078-1-quic_apinski@quicinc.com/","msgid":"<20231213165100.3260078-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-13T16:51:00","name":"middle-end: Fix up constant handling in emit_conditional_move [PR111260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213165100.3260078-1-quic_apinski@quicinc.com/mbox/"},{"id":178291,"url":"https://patchwork.plctlab.org/api/1.2/patches/178291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213200622.1648999-1-jason@redhat.com/","msgid":"<20231213200622.1648999-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T20:06:22","name":"[pushed] c++: TARGET_EXPR location in default arg [PR96997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213200622.1648999-1-jason@redhat.com/mbox/"},{"id":178292,"url":"https://patchwork.plctlab.org/api/1.2/patches/178292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qd97s2.fsf@euler.schwinge.homeip.net/","msgid":"<87a5qd97s2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-13T20:17:33","name":"Fix '\''libgomp/config/linux/allocator.c'\'' '\''size_t'\'' vs. '\''%ld'\'' format string mismatch (was: Build breakage)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qd97s2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178303,"url":"https://patchwork.plctlab.org/api/1.2/patches/178303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXob/Cn/URXcaNVP@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T21:02:52","name":"[2/2] aarch64: Handle autoinc addresses in ld1rq splitter [PR112906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXob/Cn/URXcaNVP@arm.com/mbox/"},{"id":178304,"url":"https://patchwork.plctlab.org/api/1.2/patches/178304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213210754.2641613-1-ewlu@rivosinc.com/","msgid":"<20231213210754.2641613-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-13T21:07:54","name":"[V3] RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213210754.2641613-1-ewlu@rivosinc.com/mbox/"},{"id":178383,"url":"https://patchwork.plctlab.org/api/1.2/patches/178383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39c1ec0-e16d-4235-9f6d-77f61cb3162b@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T00:26:20","name":"[committed] Minor testsuite fallout from c99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39c1ec0-e16d-4235-9f6d-77f61cb3162b@gmail.com/mbox/"},{"id":178415,"url":"https://patchwork.plctlab.org/api/1.2/patches/178415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214010904.1724915-1-jwakely@redhat.com/","msgid":"<20231214010904.1724915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-14T01:07:32","name":"libstdc++: Optimize std::is_trivially_destructible_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214010904.1724915-1-jwakely@redhat.com/mbox/"},{"id":178402,"url":"https://patchwork.plctlab.org/api/1.2/patches/178402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214012301.2193148-1-vladimir.mezentsev@oracle.com/","msgid":"<20231214012301.2193148-1-vladimir.mezentsev@oracle.com>","list_archive_url":null,"date":"2023-12-14T01:23:01","name":"gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214012301.2193148-1-vladimir.mezentsev@oracle.com/mbox/"},{"id":178427,"url":"https://patchwork.plctlab.org/api/1.2/patches/178427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214025530.2007037-1-haochen.jiang@intel.com/","msgid":"<20231214025530.2007037-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-14T02:55:30","name":"i386: Remove RAO-INT from Grand Ridge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214025530.2007037-1-haochen.jiang@intel.com/mbox/"},{"id":178440,"url":"https://patchwork.plctlab.org/api/1.2/patches/178440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214032343.124505-1-juzhe.zhong@rivai.ai/","msgid":"<20231214032343.124505-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T03:23:43","name":"RISC-V: Add RVV builtin vectorization cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214032343.124505-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178560,"url":"https://patchwork.plctlab.org/api/1.2/patches/178560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqrcOiMerjD2VnT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:14:56","name":"[committed] testsuite: Fix up target-enter-data-1.c on 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqrcOiMerjD2VnT@tucnak/mbox/"},{"id":178542,"url":"https://patchwork.plctlab.org/api/1.2/patches/178542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwHvSUCdIHr3tp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:34:54","name":"match.pd: Simplify (t * u) / v -> t * (u / v) [PR112994]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwHvSUCdIHr3tp@tucnak/mbox/"},{"id":178544,"url":"https://patchwork.plctlab.org/api/1.2/patches/178544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwuCz6am3WB+9c@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:37:28","name":"match.pd: Simplify (t * u) / (t * v) [PR112994]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwuCz6am3WB+9c@tucnak/mbox/"},{"id":178549,"url":"https://patchwork.plctlab.org/api/1.2/patches/178549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org/","msgid":"<20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T07:41:00","name":"tree-optimization/110640 - testcase for fixed bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org/mbox/"},{"id":178555,"url":"https://patchwork.plctlab.org/api/1.2/patches/178555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074752.6196-1-juzhe.zhong@rivai.ai/","msgid":"<20231214074752.6196-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T07:47:52","name":"[Committed] RISC-V: Add failed SLP testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074752.6196-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178556,"url":"https://patchwork.plctlab.org/api/1.2/patches/178556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214075402.464671-1-hongyu.wang@intel.com/","msgid":"<20231214075402.464671-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-14T07:54:02","name":"i386: Sync move_max/store_max with prefer-vector-width [PR112824]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214075402.464671-1-hongyu.wang@intel.com/mbox/"},{"id":178561,"url":"https://patchwork.plctlab.org/api/1.2/patches/178561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com/","msgid":"<67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com>","list_archive_url":null,"date":"2023-12-14T08:18:47","name":"expmed: Get vec_extract element mode from insn_data, [PR112999]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com/mbox/"},{"id":178670,"url":"https://patchwork.plctlab.org/api/1.2/patches/178670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214112645.6454-1-xujiahao@loongson.cn/","msgid":"<20231214112645.6454-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-14T11:26:45","name":"LoongArch: Fix incorrect code generation for sad pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214112645.6454-1-xujiahao@loongson.cn/mbox/"},{"id":178697,"url":"https://patchwork.plctlab.org/api/1.2/patches/178697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214120713.23896-1-wangfeng@eswincomputing.com/","msgid":"<20231214120713.23896-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-14T12:07:13","name":"Revert \"RISC-V: Add avail interface into function_group_info\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214120713.23896-1-wangfeng@eswincomputing.com/mbox/"},{"id":178712,"url":"https://patchwork.plctlab.org/api/1.2/patches/178712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214124904.5801-1-xujiahao@loongson.cn/","msgid":"<20231214124904.5801-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-14T12:49:04","name":"[v2] LoongArch: Fix incorrect code generation for sad pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214124904.5801-1-xujiahao@loongson.cn/mbox/"},{"id":178714,"url":"https://patchwork.plctlab.org/api/1.2/patches/178714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214125453.9824-1-wangfeng@eswincomputing.com/","msgid":"<20231214125453.9824-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-14T12:54:53","name":"[committed] Revert \"RISC-V: Add avail interface into function_group_info\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214125453.9824-1-wangfeng@eswincomputing.com/mbox/"},{"id":178725,"url":"https://patchwork.plctlab.org/api/1.2/patches/178725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfyc7wc1.fsf@euler.schwinge.homeip.net/","msgid":"<87zfyc7wc1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-14T13:22:22","name":"In '\''gcc/gimple-ssa-sccopy.cc'\'', '\''#define INCLUDE_ALGORITHM'\'' instead of '\''#include '\'' (was: [PATCH v4] A new copy propagation and PHI elimination pass)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfyc7wc1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178738,"url":"https://patchwork.plctlab.org/api/1.2/patches/178738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f530c44f-450a-43b9-98ed-d390ebf5f3c8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T13:33:24","name":"[committed] Fix m68k testcase for c99","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f530c44f-450a-43b9-98ed-d390ebf5f3c8@gmail.com/mbox/"},{"id":178743,"url":"https://patchwork.plctlab.org/api/1.2/patches/178743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214134559.137710-1-juzhe.zhong@rivai.ai/","msgid":"<20231214134559.137710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T13:45:59","name":"Middle-end: Do not model address cost for SELECT_VL style vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214134559.137710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178744,"url":"https://patchwork.plctlab.org/api/1.2/patches/178744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y10vqun.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T13:46:56","name":"aarch64: Improve handling of accumulators in early-ra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y10vqun.fsf@arm.com/mbox/"},{"id":178747,"url":"https://patchwork.plctlab.org/api/1.2/patches/178747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214141340.3301765-1-dmalcolm@redhat.com/","msgid":"<20231214141340.3301765-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T14:13:40","name":"[pushed] analyzer: cleanups [PR112655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214141340.3301765-1-dmalcolm@redhat.com/mbox/"},{"id":178769,"url":"https://patchwork.plctlab.org/api/1.2/patches/178769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-2-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:40","name":"[1/4;,v3] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-2-dmalcolm@redhat.com/mbox/"},{"id":178771,"url":"https://patchwork.plctlab.org/api/1.2/patches/178771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-3-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:41","name":"[2/4;,v3] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-3-dmalcolm@redhat.com/mbox/"},{"id":178766,"url":"https://patchwork.plctlab.org/api/1.2/patches/178766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-4-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:42","name":"[3/4;,v2] opts: add logic to generate options-urls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-4-dmalcolm@redhat.com/mbox/"},{"id":178767,"url":"https://patchwork.plctlab.org/api/1.2/patches/178767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-5-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:43","name":"[4/4;,v2] options: wire up options-urls.cc into gcc_urlifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-5-dmalcolm@redhat.com/mbox/"},{"id":178768,"url":"https://patchwork.plctlab.org/api/1.2/patches/178768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-2-arthur.cohen@embecosm.com/","msgid":"<20231214150539.12345-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-12-14T15:05:37","name":"[COMMITTED,1/4] libgrust: Add ChangeLog file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-2-arthur.cohen@embecosm.com/mbox/"},{"id":178770,"url":"https://patchwork.plctlab.org/api/1.2/patches/178770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-3-arthur.cohen@embecosm.com/","msgid":"<20231214150539.12345-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-12-14T15:05:39","name":"[COMMITTED,2/4] libgrust: Add entry for maintainers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-3-arthur.cohen@embecosm.com/mbox/"},{"id":178776,"url":"https://patchwork.plctlab.org/api/1.2/patches/178776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150806.519A1134B0@imap2.dmz-prg2.suse.org/","msgid":"<20231214150806.519A1134B0@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T15:08:05","name":"tree-optimization/112793 - SLP of constant/external code-generated twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150806.519A1134B0@imap2.dmz-prg2.suse.org/mbox/"},{"id":178786,"url":"https://patchwork.plctlab.org/api/1.2/patches/178786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214155543.0B013138F2@imap2.dmz-prg2.suse.org/","msgid":"<20231214155543.0B013138F2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T15:55:42","name":"tree-optimization/113018 - ICE with BB reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214155543.0B013138F2@imap2.dmz-prg2.suse.org/mbox/"},{"id":178881,"url":"https://patchwork.plctlab.org/api/1.2/patches/178881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191719.1941342-1-ppalka@redhat.com/","msgid":"<20231214191719.1941342-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-14T19:17:19","name":"c++: abi_tag attribute on templates [PR109715]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191719.1941342-1-ppalka@redhat.com/mbox/"},{"id":178882,"url":"https://patchwork.plctlab.org/api/1.2/patches/178882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191725.1941372-1-ppalka@redhat.com/","msgid":"<20231214191725.1941372-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-14T19:17:25","name":"c++: section attribute on templates [PR70435, PR88061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191725.1941372-1-ppalka@redhat.com/mbox/"},{"id":178887,"url":"https://patchwork.plctlab.org/api/1.2/patches/178887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmtg36na.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:50:49","name":"hardened: use LD_PIE_SPEC only if defined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmtg36na.fsf@lxoliva.fsfla.org/mbox/"},{"id":178888,"url":"https://patchwork.plctlab.org/api/1.2/patches/178888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf4436ki.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:52:29","name":"strub: avoid lto inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf4436ki.fsf@lxoliva.fsfla.org/mbox/"},{"id":178890,"url":"https://patchwork.plctlab.org/api/1.2/patches/178890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7es36hr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:54:08","name":"strub: use opt_for_fn during ipa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7es36hr.fsf@lxoliva.fsfla.org/mbox/"},{"id":178894,"url":"https://patchwork.plctlab.org/api/1.2/patches/178894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpg35fe.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T20:17:09","name":"[#1/2] strub: sparc: omit frame in strub_leave [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpg35fe.fsf@lxoliva.fsfla.org/mbox/"},{"id":178901,"url":"https://patchwork.plctlab.org/api/1.2/patches/178901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXttN88kOtvRVn4t@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T21:01:43","name":"[v4] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXttN88kOtvRVn4t@redhat.com/mbox/"},{"id":178902,"url":"https://patchwork.plctlab.org/api/1.2/patches/178902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214210227.1190177-1-polacek@redhat.com/","msgid":"<20231214210227.1190177-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-14T21:02:27","name":"c++: fix parsing with auto(x) at block scope [PR112482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214210227.1190177-1-polacek@redhat.com/mbox/"},{"id":178903,"url":"https://patchwork.plctlab.org/api/1.2/patches/178903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il504hnr.fsf@euler.schwinge.homeip.net/","msgid":"<87il504hnr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-14T21:07:36","name":"Update '\''gcc.dg/vect/vect-simd-clone-*.c'\'' GCN '\''dg-warning'\''s (was: [PATCH] aarch64: enable mixed-types for aarch64 simdclones)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il504hnr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178911,"url":"https://patchwork.plctlab.org/api/1.2/patches/178911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs04324k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T21:28:27","name":"[#2/2] strub: sparc64: unbias the stack address [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs04324k.fsf@lxoliva.fsfla.org/mbox/"},{"id":178912,"url":"https://patchwork.plctlab.org/api/1.2/patches/178912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213201.180346-1-patrick@rivosinc.com/","msgid":"<20231214213201.180346-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-12-14T21:32:01","name":"RISC-V: Add -fno-vect-cost-model to pr112773 testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213201.180346-1-patrick@rivosinc.com/mbox/"},{"id":178914,"url":"https://patchwork.plctlab.org/api/1.2/patches/178914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213800.796944-1-quic_apinski@quicinc.com/","msgid":"<20231214213800.796944-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-14T21:38:00","name":"[COMMITTED] middle-end: Fix up constant handling in emit_conditional_move [PR111260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213800.796944-1-quic_apinski@quicinc.com/mbox/"},{"id":178929,"url":"https://patchwork.plctlab.org/api/1.2/patches/178929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214215544.3328245-1-dmalcolm@redhat.com/","msgid":"<20231214215544.3328245-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T21:55:44","name":"[pushed] testsuite: move more analyzer test cases to c-c++-common (3) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214215544.3328245-1-dmalcolm@redhat.com/mbox/"},{"id":178932,"url":"https://patchwork.plctlab.org/api/1.2/patches/178932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt+RP0GTiKhocIW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:14:28","name":"lower-bitint: Fix .{ADD,SUB,MUL}_OVERFLOW with _BitInt large/huge INTEGER_CST arguments [PR113003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt+RP0GTiKhocIW@tucnak/mbox/"},{"id":178934,"url":"https://patchwork.plctlab.org/api/1.2/patches/178934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt/yRs1g4MhLj+W@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:20:57","name":"bitint: Introduce abi_limb_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt/yRs1g4MhLj+W@tucnak/mbox/"},{"id":178936,"url":"https://patchwork.plctlab.org/api/1.2/patches/178936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222206.59796-1-juzhe.zhong@rivai.ai/","msgid":"<20231214222206.59796-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T22:22:06","name":"[Committed] RISC-V: Adjust test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222206.59796-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178940,"url":"https://patchwork.plctlab.org/api/1.2/patches/178940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222432.60088-1-juzhe.zhong@rivai.ai/","msgid":"<20231214222432.60088-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T22:24:32","name":"[Committed] RISC-V: Tweak generic vector COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222432.60088-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178942,"url":"https://patchwork.plctlab.org/api/1.2/patches/178942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXuBaGAdwlccjKq8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:27:52","name":"match.pd: Optimize sign-extension followed by truncation [PR113024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXuBaGAdwlccjKq8@tucnak/mbox/"},{"id":178986,"url":"https://patchwork.plctlab.org/api/1.2/patches/178986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000208.2068561-1-jwakely@redhat.com/","msgid":"<20231215000208.2068561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:01:46","name":"[committed] libstdc++: Fix %S format of duration with floating-point rep","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000208.2068561-1-jwakely@redhat.com/mbox/"},{"id":178985,"url":"https://patchwork.plctlab.org/api/1.2/patches/178985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000216.2068946-1-jwakely@redhat.com/","msgid":"<20231215000216.2068946-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:09","name":"[committed] libstdc++: Add dg-output to two tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000216.2068946-1-jwakely@redhat.com/mbox/"},{"id":178988,"url":"https://patchwork.plctlab.org/api/1.2/patches/178988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000224.2069098-1-jwakely@redhat.com/","msgid":"<20231215000224.2069098-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:17","name":"[committed] libstdc++: Tweaks for std::format fast path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000224.2069098-1-jwakely@redhat.com/mbox/"},{"id":178987,"url":"https://patchwork.plctlab.org/api/1.2/patches/178987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000243.2069266-1-jwakely@redhat.com/","msgid":"<20231215000243.2069266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:25","name":"[committed] libstdc++: Fix filebuf::native_handle() for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000243.2069266-1-jwakely@redhat.com/mbox/"},{"id":178993,"url":"https://patchwork.plctlab.org/api/1.2/patches/178993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000350.2069578-1-jwakely@redhat.com/","msgid":"<20231215000350.2069578-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:44","name":"[committed] libstdc++: Implement C++23 header [PR107760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000350.2069578-1-jwakely@redhat.com/mbox/"},{"id":178989,"url":"https://patchwork.plctlab.org/api/1.2/patches/178989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215012258.31512-1-zengxiao@eswincomputing.com/","msgid":"<20231215012258.31512-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-12-15T01:22:58","name":"[PING^1] RISC-V: Add Zvfbfmin extension to the -march= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215012258.31512-1-zengxiao@eswincomputing.com/mbox/"},{"id":178996,"url":"https://patchwork.plctlab.org/api/1.2/patches/178996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215023314.2708937-1-haochen.jiang@intel.com/","msgid":"<20231215023314.2708937-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-15T02:33:14","name":"i386: Allow 64 bit mask register for -mno-evex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215023314.2708937-1-haochen.jiang@intel.com/mbox/"},{"id":179019,"url":"https://patchwork.plctlab.org/api/1.2/patches/179019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215025750.159162-1-juzhe.zhong@rivai.ai/","msgid":"<20231215025750.159162-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T02:57:50","name":"RISC-V: Fix vmerge optimization bug in vec_perm vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215025750.159162-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179020,"url":"https://patchwork.plctlab.org/api/1.2/patches/179020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215030115.2757951-1-hongyu.wang@intel.com/","msgid":"<20231215030115.2757951-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-15T03:01:15","name":"testsuite: Require dfp for pr112943.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215030115.2757951-1-hongyu.wang@intel.com/mbox/"},{"id":179085,"url":"https://patchwork.plctlab.org/api/1.2/patches/179085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215080610.92416-1-juzhe.zhong@rivai.ai/","msgid":"<20231215080610.92416-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T08:06:10","name":"[Committed] RISC-V: Remove xfail for some of the SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215080610.92416-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179095,"url":"https://patchwork.plctlab.org/api/1.2/patches/179095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082234.421EE33E93@hamza.pair.com/","msgid":"<20231215082234.421EE33E93@hamza.pair.com>","list_archive_url":null,"date":"2023-12-15T08:22:28","name":"[pushed] doc: Update nvptx-tools Github link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082234.421EE33E93@hamza.pair.com/mbox/"},{"id":179098,"url":"https://patchwork.plctlab.org/api/1.2/patches/179098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082512.7FF7633E7A@hamza.pair.com/","msgid":"<20231215082512.7FF7633E7A@hamza.pair.com>","list_archive_url":null,"date":"2023-12-15T08:25:07","name":"[pushed] wwwdocs: projects/cli: Update ECMA reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082512.7FF7633E7A@hamza.pair.com/mbox/"},{"id":179111,"url":"https://patchwork.plctlab.org/api/1.2/patches/179111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com/","msgid":"<834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com>","list_archive_url":null,"date":"2023-12-15T08:52:01","name":"sel-sched: Verify change before replacing dest in EXPR_INSN_RTX [PR112995]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com/mbox/"},{"id":179117,"url":"https://patchwork.plctlab.org/api/1.2/patches/179117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215090223.3311-1-xry111@xry111.site/","msgid":"<20231215090223.3311-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-15T08:57:31","name":"[v2] LoongArch: Implement FCCmode reload and cstore4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215090223.3311-1-xry111@xry111.site/mbox/"},{"id":179196,"url":"https://patchwork.plctlab.org/api/1.2/patches/179196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215112809.0EBC513912@imap2.dmz-prg2.suse.org/","msgid":"<20231215112809.0EBC513912@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-15T11:28:08","name":"tree-optimization/113026 - avoid vector epilog in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215112809.0EBC513912@imap2.dmz-prg2.suse.org/mbox/"},{"id":179258,"url":"https://patchwork.plctlab.org/api/1.2/patches/179258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125531.279066-1-juzhe.zhong@rivai.ai/","msgid":"<20231215125531.279066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T12:55:31","name":"[V2] RISC-V: Fix vmerge optimization bug in vec_perm vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125531.279066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179262,"url":"https://patchwork.plctlab.org/api/1.2/patches/179262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125727.308264-1-xry111@xry111.site/","msgid":"<20231215125727.308264-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-15T12:56:35","name":"LoongArch: Remove constraint z from movsi_internal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125727.308264-1-xry111@xry111.site/mbox/"},{"id":179346,"url":"https://patchwork.plctlab.org/api/1.2/patches/179346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132227.2139454-1-jwakely@redhat.com/","msgid":"<20231215132227.2139454-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:21:51","name":"[committed] libstdc++: Do not add padding for std::print to std::ostream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132227.2139454-1-jwakely@redhat.com/mbox/"},{"id":179347,"url":"https://patchwork.plctlab.org/api/1.2/patches/179347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132244.2139474-1-jwakely@redhat.com/","msgid":"<20231215132244.2139474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:22:28","name":"[committed] libstdc++: Simplify std::vprint_unicode for non-Windows targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132244.2139474-1-jwakely@redhat.com/mbox/"},{"id":179284,"url":"https://patchwork.plctlab.org/api/1.2/patches/179284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132254.2139490-1-jwakely@redhat.com/","msgid":"<20231215132254.2139490-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:22:45","name":"[committed] libstdc++: Fix std::print test case for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132254.2139490-1-jwakely@redhat.com/mbox/"},{"id":179514,"url":"https://patchwork.plctlab.org/api/1.2/patches/179514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-2-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:26","name":"[1/3,RFC] RISC-V: Add non-vector types to pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-2-ewlu@rivosinc.com/mbox/"},{"id":179515,"url":"https://patchwork.plctlab.org/api/1.2/patches/179515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-3-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:27","name":"[2/3,RFC] RISC-V: Add vector related reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-3-ewlu@rivosinc.com/mbox/"},{"id":179516,"url":"https://patchwork.plctlab.org/api/1.2/patches/179516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-4-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:28","name":"[3/3,RFC] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-4-ewlu@rivosinc.com/mbox/"},{"id":179678,"url":"https://patchwork.plctlab.org/api/1.2/patches/179678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/657ced36.170a0220.f138a.ff27@mx.google.com/","msgid":"<657ced36.170a0220.f138a.ff27@mx.google.com>","list_archive_url":null,"date":"2023-12-16T00:20:02","name":"c++: Fix unchecked use of CLASSTYPE_AS_BASE [PR113031]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/657ced36.170a0220.f138a.ff27@mx.google.com/mbox/"},{"id":179720,"url":"https://patchwork.plctlab.org/api/1.2/patches/179720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com/","msgid":"<3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-16T00:47:23","name":"[committed,v4,5/5] aarch64: Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com/mbox/"},{"id":179852,"url":"https://patchwork.plctlab.org/api/1.2/patches/179852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216140544.3424839-1-dmalcolm@redhat.com/","msgid":"<20231216140544.3424839-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T14:05:44","name":"[pushed] analyzer: use bit-level granularity for concrete bounds-checking [PR112792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216140544.3424839-1-dmalcolm@redhat.com/mbox/"},{"id":179864,"url":"https://patchwork.plctlab.org/api/1.2/patches/179864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216155609.562884-1-hjl.tools@gmail.com/","msgid":"<20231216155609.562884-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-12-16T15:56:09","name":"x86: Get the previous shadow stack pointer from the restore token","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216155609.562884-1-hjl.tools@gmail.com/mbox/"},{"id":179915,"url":"https://patchwork.plctlab.org/api/1.2/patches/179915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-aad8c14c-b211-4687-96a9-db32950c47a1-1702751317953@3c-app-gmx-bs38/","msgid":"","list_archive_url":null,"date":"2023-12-16T18:28:37","name":"Fortran: fix argument passing to CONTIGUOUS,TARGET dummy [PR97592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-aad8c14c-b211-4687-96a9-db32950c47a1-1702751317953@3c-app-gmx-bs38/mbox/"},{"id":179916,"url":"https://patchwork.plctlab.org/api/1.2/patches/179916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216184406.1779682-1-hjl.tools@gmail.com/","msgid":"<20231216184406.1779682-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-12-16T18:44:06","name":"libstdc++: Update some baseline_symbols.txt (x32)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216184406.1779682-1-hjl.tools@gmail.com/mbox/"},{"id":179921,"url":"https://patchwork.plctlab.org/api/1.2/patches/179921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKqmYPYDrC+fm=WdDj6x=9xkZT3FfWgyUBH0L-7yz_yScAN7Qg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-16T20:10:33","name":"PR libstdc++/112682 More efficient std::basic_string move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKqmYPYDrC+fm=WdDj6x=9xkZT3FfWgyUBH0L-7yz_yScAN7Qg@mail.gmail.com/mbox/"},{"id":179926,"url":"https://patchwork.plctlab.org/api/1.2/patches/179926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212341.3443227-1-dmalcolm@redhat.com/","msgid":"<20231216212341.3443227-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T21:23:41","name":"[pushed] json: fix escaping of object keys","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212341.3443227-1-dmalcolm@redhat.com/mbox/"},{"id":179927,"url":"https://patchwork.plctlab.org/api/1.2/patches/179927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212347.3443252-1-dmalcolm@redhat.com/","msgid":"<20231216212347.3443252-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T21:23:47","name":"[pushed] analyzer: add sarif properties for bounds checking diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212347.3443252-1-dmalcolm@redhat.com/mbox/"},{"id":179929,"url":"https://patchwork.plctlab.org/api/1.2/patches/179929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225519.2306598-1-jwakely@redhat.com/","msgid":"<20231216225519.2306598-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-16T22:54:40","name":"[wwwdocs] Document std::print and std::ranges::to for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225519.2306598-1-jwakely@redhat.com/mbox/"},{"id":179936,"url":"https://patchwork.plctlab.org/api/1.2/patches/179936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225604.2306724-1-jwakely@redhat.com/","msgid":"<20231216225604.2306724-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-16T22:55:55","name":"[wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225604.2306724-1-jwakely@redhat.com/mbox/"},{"id":179931,"url":"https://patchwork.plctlab.org/api/1.2/patches/179931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217000341.2325821-1-jwakely@redhat.com/","msgid":"<20231217000341.2325821-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-17T00:03:24","name":"[committed] libstdc++: Fix bootstrap on AIX due to fileno macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217000341.2325821-1-jwakely@redhat.com/mbox/"},{"id":179941,"url":"https://patchwork.plctlab.org/api/1.2/patches/179941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217012149.AA1DE33E9F@hamza.pair.com/","msgid":"<20231217012149.AA1DE33E9F@hamza.pair.com>","list_archive_url":null,"date":"2023-12-17T01:21:44","name":"[pushed] doc: Remove references to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217012149.AA1DE33E9F@hamza.pair.com/mbox/"},{"id":179942,"url":"https://patchwork.plctlab.org/api/1.2/patches/179942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com/","msgid":"<4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com>","list_archive_url":null,"date":"2023-12-17T01:35:24","name":"install: Streamline the hppa*-hp-hpux* section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com/mbox/"},{"id":179966,"url":"https://patchwork.plctlab.org/api/1.2/patches/179966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217072809.A836633EA9@hamza.pair.com/","msgid":"<20231217072809.A836633EA9@hamza.pair.com>","list_archive_url":null,"date":"2023-12-17T07:28:04","name":"[doc] install: Drop hppa*-hp-hpux10, remove old notes on hppa*-hp-hpux11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217072809.A836633EA9@hamza.pair.com/mbox/"},{"id":180031,"url":"https://patchwork.plctlab.org/api/1.2/patches/180031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151309.4128-2-xry111@xry111.site/","msgid":"<20231217151309.4128-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-17T15:12:18","name":"LoongArch: Fix FP vector comparsons [PR113034]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151309.4128-2-xry111@xry111.site/mbox/"},{"id":180032,"url":"https://patchwork.plctlab.org/api/1.2/patches/180032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151713.4959-1-xry111@xry111.site/","msgid":"<20231217151713.4959-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-17T15:16:37","name":"LoongArch: Add sign_extend pattern for 32-bit rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151713.4959-1-xry111@xry111.site/mbox/"},{"id":180036,"url":"https://patchwork.plctlab.org/api/1.2/patches/180036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfk6dr6.fsf@oldenburg.str.redhat.com/","msgid":"<87edfk6dr6.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-12-17T15:38:05","name":"c-family: Use -Wdiscarded-qualifiers for ignored qualifiers in __atomic_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfk6dr6.fsf@oldenburg.str.redhat.com/mbox/"},{"id":180051,"url":"https://patchwork.plctlab.org/api/1.2/patches/180051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at/","msgid":"<0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:41:50","name":"[V5,C,1/4] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at/mbox/"},{"id":180052,"url":"https://patchwork.plctlab.org/api/1.2/patches/180052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at/","msgid":"<28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:02","name":"[V5,C,2/4] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at/mbox/"},{"id":180053,"url":"https://patchwork.plctlab.org/api/1.2/patches/180053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at/","msgid":"<4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:29","name":"[V5,C,3/4] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at/mbox/"},{"id":180054,"url":"https://patchwork.plctlab.org/api/1.2/patches/180054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at/","msgid":"<65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:41","name":"[V5,C,4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at/mbox/"},{"id":180057,"url":"https://patchwork.plctlab.org/api/1.2/patches/180057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190242.4132478-1-sandra@codesourcery.com/","msgid":"<20231217190242.4132478-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-17T19:02:41","name":"[V4,3/5] OpenMP: Use enumerators for names of trait-sets and traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190242.4132478-1-sandra@codesourcery.com/mbox/"},{"id":180058,"url":"https://patchwork.plctlab.org/api/1.2/patches/180058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190310.4132740-1-sandra@codesourcery.com/","msgid":"<20231217190310.4132740-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-17T19:03:10","name":"[5/5] OpenMP: Add prettyprinter support for context selectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190310.4132740-1-sandra@codesourcery.com/mbox/"},{"id":180076,"url":"https://patchwork.plctlab.org/api/1.2/patches/180076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/657f6d54.170a0220.7e557.2d05@mx.google.com/","msgid":"<657f6d54.170a0220.7e557.2d05@mx.google.com>","list_archive_url":null,"date":"2023-12-17T21:51:11","name":"c++: Check null pointer deref when calling memfn in constexpr [PR102420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/657f6d54.170a0220.7e557.2d05@mx.google.com/mbox/"},{"id":180097,"url":"https://patchwork.plctlab.org/api/1.2/patches/180097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218002223.2899237-1-pan2.li@intel.com/","msgid":"<20231218002223.2899237-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T00:22:23","name":"[v1] RISC-V: Fix POLY INT handle bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218002223.2899237-1-pan2.li@intel.com/mbox/"},{"id":180107,"url":"https://patchwork.plctlab.org/api/1.2/patches/180107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com/","msgid":"<17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T02:43:40","name":"[Patchv2,rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com/mbox/"},{"id":180108,"url":"https://patchwork.plctlab.org/api/1.2/patches/180108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com/","msgid":"<15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T02:44:09","name":"[Patchv2,rs6000] Clean up pre-checkings of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com/mbox/"},{"id":180128,"url":"https://patchwork.plctlab.org/api/1.2/patches/180128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032013.99095-1-juzhe.zhong@rivai.ai/","msgid":"<20231218032013.99095-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T03:20:13","name":"RISC-V: Fix natural regsize for fixed-vlmax of -march=rv64gc_zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032013.99095-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180131,"url":"https://patchwork.plctlab.org/api/1.2/patches/180131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032800.18938-1-wangfeng@eswincomputing.com/","msgid":"<20231218032800.18938-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T03:28:00","name":"RISC-V: Add required_extensions in function_group","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032800.18938-1-wangfeng@eswincomputing.com/mbox/"},{"id":180132,"url":"https://patchwork.plctlab.org/api/1.2/patches/180132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-1-syq@gcc.gnu.org/","msgid":"<20231218034422.2668628-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-18T03:44:21","name":"[1/2] MIPS: host_detect_local_cpu, init ret with concat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-1-syq@gcc.gnu.org/mbox/"},{"id":180133,"url":"https://patchwork.plctlab.org/api/1.2/patches/180133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-2-syq@gcc.gnu.org/","msgid":"<20231218034422.2668628-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-18T03:44:22","name":"[2/2] libiberty/reconcat: Add note about append string to NULL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-2-syq@gcc.gnu.org/mbox/"},{"id":180155,"url":"https://patchwork.plctlab.org/api/1.2/patches/180155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218064035.36034-1-xuli1@eswincomputing.com/","msgid":"<20231218064035.36034-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T06:40:35","name":"testsuite: Fix cpymem-1.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218064035.36034-1-xuli1@eswincomputing.com/mbox/"},{"id":180161,"url":"https://patchwork.plctlab.org/api/1.2/patches/180161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218065256.203306-1-juzhe.zhong@rivai.ai/","msgid":"<20231218065256.203306-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T06:52:56","name":"RISC-V: Enable vect test for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218065256.203306-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180163,"url":"https://patchwork.plctlab.org/api/1.2/patches/180163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070433.2000339-1-pan2.li@intel.com/","msgid":"<20231218070433.2000339-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T07:04:33","name":"[v1] RISC-V: Bugfix for the RVV const vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070433.2000339-1-pan2.li@intel.com/mbox/"},{"id":180165,"url":"https://patchwork.plctlab.org/api/1.2/patches/180165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070502.11111-1-xuli1@eswincomputing.com/","msgid":"<20231218070502.11111-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T07:05:02","name":"[v2] testsuite: Fix cpymem-1.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070502.11111-1-xuli1@eswincomputing.com/mbox/"},{"id":180177,"url":"https://patchwork.plctlab.org/api/1.2/patches/180177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218073557.2020740-1-pan2.li@intel.com/","msgid":"<20231218073557.2020740-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T07:35:57","name":"[v2] RISC-V: Bugfix for the RVV const vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218073557.2020740-1-pan2.li@intel.com/mbox/"},{"id":180202,"url":"https://patchwork.plctlab.org/api/1.2/patches/180202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAEH+Oi9+15lmzw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T08:34:39","name":"tree-object-size: Robustify alloc_size attribute handling [PR113013]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAEH+Oi9+15lmzw@tucnak/mbox/"},{"id":180209,"url":"https://patchwork.plctlab.org/api/1.2/patches/180209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r5r99or.fsf@calavera/","msgid":"<878r5r99or.fsf@calavera>","list_archive_url":null,"date":"2023-12-18T08:36:37","name":"Patch: Remove unneeded double operation in libstdc++-v3/src/c++17/fs_path.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r5r99or.fsf@calavera/mbox/"},{"id":180210,"url":"https://patchwork.plctlab.org/api/1.2/patches/180210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAIw7rXF2tx9CBg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T08:54:27","name":"[committed] testsuite: Fix up abi-tag25a.C test for C++11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAIw7rXF2tx9CBg@tucnak/mbox/"},{"id":180230,"url":"https://patchwork.plctlab.org/api/1.2/patches/180230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218094908.54114-1-juzhe.zhong@rivai.ai/","msgid":"<20231218094908.54114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T09:49:08","name":"[V2] RISC-V: Enable vect test for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218094908.54114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180277,"url":"https://patchwork.plctlab.org/api/1.2/patches/180277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218105929.65434-1-juzhe.zhong@rivai.ai/","msgid":"<20231218105929.65434-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T10:59:29","name":"RISC-V: Support one more overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218105929.65434-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180278,"url":"https://patchwork.plctlab.org/api/1.2/patches/180278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAnI7An6G6XWFSm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T11:04:03","name":"[committed] libgomp: Make libgomp.c/declare-variant-1.c test x86 specific","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAnI7An6G6XWFSm@tucnak/mbox/"},{"id":180287,"url":"https://patchwork.plctlab.org/api/1.2/patches/180287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218113521.71738-1-juzhe.zhong@rivai.ai/","msgid":"<20231218113521.71738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T11:35:21","name":"[V2] RISC-V: Support one more overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218113521.71738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180316,"url":"https://patchwork.plctlab.org/api/1.2/patches/180316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115144.23CE43857C63@sourceware.org/","msgid":"<20231218115144.23CE43857C63@sourceware.org>","list_archive_url":null,"date":"2023-12-18T11:50:06","name":"c/111975 - GIMPLE FE dumping and parsing of TARGET_MEM_REF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115144.23CE43857C63@sourceware.org/mbox/"},{"id":180326,"url":"https://patchwork.plctlab.org/api/1.2/patches/180326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-2-andre.simoesdiasvieira@arm.com/","msgid":"<20231218115323.15980-2-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2023-12-18T11:53:22","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-2-andre.simoesdiasvieira@arm.com/mbox/"},{"id":180328,"url":"https://patchwork.plctlab.org/api/1.2/patches/180328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-3-andre.simoesdiasvieira@arm.com/","msgid":"<20231218115323.15980-3-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2023-12-18T11:53:23","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-3-andre.simoesdiasvieira@arm.com/mbox/"},{"id":180428,"url":"https://patchwork.plctlab.org/api/1.2/patches/180428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134251.1513432-1-xry111@xry111.site/","msgid":"<20231218134251.1513432-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-18T13:42:02","name":"middle-end: Call negate_rtx instead of simplify_gen_unary expanding rotate shift [PR113033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134251.1513432-1-xry111@xry111.site/mbox/"},{"id":180430,"url":"https://patchwork.plctlab.org/api/1.2/patches/180430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134414.1513666-1-xry111@xry111.site/","msgid":"<20231218134414.1513666-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-18T13:43:43","name":"LoongArch: Expand left rotate to right rotate with negated amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134414.1513666-1-xry111@xry111.site/mbox/"},{"id":180450,"url":"https://patchwork.plctlab.org/api/1.2/patches/180450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218141024.89DCC3857C56@sourceware.org/","msgid":"<20231218141024.89DCC3857C56@sourceware.org>","list_archive_url":null,"date":"2023-12-18T14:08:49","name":"middle-end/111975 - dump -> GIMPLE FE roundtrip improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218141024.89DCC3857C56@sourceware.org/mbox/"},{"id":180456,"url":"https://patchwork.plctlab.org/api/1.2/patches/180456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org/","msgid":"<610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org>","list_archive_url":null,"date":"2023-12-18T14:35:06","name":"SECURITY.txt: Drop \"exploitable\" in reference to hardening issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org/mbox/"},{"id":180553,"url":"https://patchwork.plctlab.org/api/1.2/patches/180553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218163424.1066771-1-quic_apinski@quicinc.com/","msgid":"<20231218163424.1066771-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-18T16:34:24","name":"[COMMITTED] SCCP: Fix ODR issues when compiling with LTO [PR 113054}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218163424.1066771-1-quic_apinski@quicinc.com/mbox/"},{"id":180558,"url":"https://patchwork.plctlab.org/api/1.2/patches/180558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218164252.1963249-1-siddhesh@gotplt.org/","msgid":"<20231218164252.1963249-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-12-18T16:42:52","name":"tree-object-size: Always set computed bit for bdos [PR113012]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218164252.1963249-1-siddhesh@gotplt.org/mbox/"},{"id":180570,"url":"https://patchwork.plctlab.org/api/1.2/patches/180570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218165221.44037-2-xndchn@gmail.com/","msgid":"<20231218165221.44037-2-xndchn@gmail.com>","list_archive_url":null,"date":"2023-12-18T16:52:21","name":"gimple-fold.cc: enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contain padding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218165221.44037-2-xndchn@gmail.com/mbox/"},{"id":180571,"url":"https://patchwork.plctlab.org/api/1.2/patches/180571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6kfsazx.fsf@euler.schwinge.homeip.net/","msgid":"<87h6kfsazx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-18T16:58:58","name":"libgrust: '\''AM_ENABLE_MULTILIB'\'' only for target builds [PR113056] (was: [PATCH v2 2/4] libgrust: Add libproc_macro and build system)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6kfsazx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":180587,"url":"https://patchwork.plctlab.org/api/1.2/patches/180587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01db01da31d6$33055200$990ff600$@nextmovesoftware.com/","msgid":"<01db01da31d6$33055200$990ff600$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-18T17:18:19","name":"[x86] Improved TImode (128-bit) integer constants on x86_64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01db01da31d6$33055200$990ff600$@nextmovesoftware.com/mbox/"},{"id":180627,"url":"https://patchwork.plctlab.org/api/1.2/patches/180627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6dbf6f4f-922c-4228-a34b-1b17489db6cd-1702923119190@3c-app-gmx-bs40/","msgid":"","list_archive_url":null,"date":"2023-12-18T18:11:59","name":"Fortran: update DATE_AND_TIME intrinsic for Fortran 2018 [PR96580]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6dbf6f4f-922c-4228-a34b-1b17489db6cd-1702923119190@3c-app-gmx-bs40/mbox/"},{"id":180620,"url":"https://patchwork.plctlab.org/api/1.2/patches/180620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218185251.57671-1-krebbel@linux.ibm.com/","msgid":"<20231218185251.57671-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T18:52:51","name":"[Committed] IBM Z: Cover weak symbols with -munaligned-symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218185251.57671-1-krebbel@linux.ibm.com/mbox/"},{"id":180626,"url":"https://patchwork.plctlab.org/api/1.2/patches/180626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYCaIpyzJkqFTJBq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T19:14:42","name":"c: Split -Wcalloc-transposed-args warning from -Walloc-size, -Walloc-size fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYCaIpyzJkqFTJBq@tucnak/mbox/"},{"id":180637,"url":"https://patchwork.plctlab.org/api/1.2/patches/180637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195004.1238589-1-ppalka@redhat.com/","msgid":"<20231218195004.1238589-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:04","name":"c++: [[deprecated]] on template redecl [PR84542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195004.1238589-1-ppalka@redhat.com/mbox/"},{"id":180638,"url":"https://patchwork.plctlab.org/api/1.2/patches/180638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45c5452-1b17-43fe-a858-7bce23ee88f1@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T19:50:09","name":"fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45c5452-1b17-43fe-a858-7bce23ee88f1@gmail.com/mbox/"},{"id":180639,"url":"https://patchwork.plctlab.org/api/1.2/patches/180639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195013.1241371-1-ppalka@redhat.com/","msgid":"<20231218195013.1241371-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:13","name":"c++: local class memfn synth from uneval context [PR113063]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195013.1241371-1-ppalka@redhat.com/mbox/"},{"id":180640,"url":"https://patchwork.plctlab.org/api/1.2/patches/180640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195021.1244349-1-ppalka@redhat.com/","msgid":"<20231218195021.1244349-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:21","name":"c++: bad direct reference binding [PR113064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195021.1244349-1-ppalka@redhat.com/mbox/"},{"id":180654,"url":"https://patchwork.plctlab.org/api/1.2/patches/180654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z2AumLYtfSzYa_c=O5L35Q-C4ChERqj0ixXRsH+Khp_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T21:27:19","name":"[committed] i386: Eliminate redundant compare between set{z, nz} and j{z, nz}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z2AumLYtfSzYa_c=O5L35Q-C4ChERqj0ixXRsH+Khp_g@mail.gmail.com/mbox/"},{"id":180656,"url":"https://patchwork.plctlab.org/api/1.2/patches/180656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218213135.2720773-1-jason@redhat.com/","msgid":"<20231218213135.2720773-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-18T21:31:35","name":"[RFC] c++/modules: __class_type_info and modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218213135.2720773-1-jason@redhat.com/mbox/"},{"id":180667,"url":"https://patchwork.plctlab.org/api/1.2/patches/180667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/269d021e-7aad-22de-1469-f332abbfede9@redhat.com/","msgid":"<269d021e-7aad-22de-1469-f332abbfede9@redhat.com>","list_archive_url":null,"date":"2023-12-18T22:16:38","name":"[pushed,PR112918,LRA] : Fixing IRA ICE on m68k","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/269d021e-7aad-22de-1469-f332abbfede9@redhat.com/mbox/"},{"id":180670,"url":"https://patchwork.plctlab.org/api/1.2/patches/180670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYDHvnz5bi//bzdQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T22:29:18","name":"aarch64: Fix parens in aarch64_stp_reg_operand [PR113061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYDHvnz5bi//bzdQ@arm.com/mbox/"},{"id":180683,"url":"https://patchwork.plctlab.org/api/1.2/patches/180683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218230631.1779040-1-ppalka@redhat.com/","msgid":"<20231218230631.1779040-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T23:06:31","name":"[pushed] libstdc++: Make ranges::to closure objects SFINAE-friendly [PR112802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218230631.1779040-1-ppalka@redhat.com/mbox/"},{"id":180702,"url":"https://patchwork.plctlab.org/api/1.2/patches/180702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219012341.11792-1-wangfeng@eswincomputing.com/","msgid":"<20231219012341.11792-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T01:23:41","name":"[committed] RISC-V: Add required_extensions in function_group","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219012341.11792-1-wangfeng@eswincomputing.com/mbox/"},{"id":180705,"url":"https://patchwork.plctlab.org/api/1.2/patches/180705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219013049.3165982-1-syq@gcc.gnu.org/","msgid":"<20231219013049.3165982-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-19T01:30:49","name":"[v2] MIPS: Put the ret to the end of args of reconcat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219013049.3165982-1-syq@gcc.gnu.org/mbox/"},{"id":180709,"url":"https://patchwork.plctlab.org/api/1.2/patches/180709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219014455.33713-1-xuli1@eswincomputing.com/","msgid":"<20231219014455.33713-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T01:44:55","name":"testsuite: Fix cpymem-2.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219014455.33713-1-xuli1@eswincomputing.com/mbox/"},{"id":180738,"url":"https://patchwork.plctlab.org/api/1.2/patches/180738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219041633.209503-1-juzhe.zhong@rivai.ai/","msgid":"<20231219041633.209503-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T04:16:33","name":"[Committed] RISC-V: Remove 256/512/1024 VLS vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219041633.209503-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180748,"url":"https://patchwork.plctlab.org/api/1.2/patches/180748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219043523.215375-1-juzhe.zhong@rivai.ai/","msgid":"<20231219043523.215375-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T04:35:23","name":"[Committed] RISC-V: Fix FAIL of dynamic-lmul2-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219043523.215375-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180759,"url":"https://patchwork.plctlab.org/api/1.2/patches/180759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053000.2741-1-xuli1@eswincomputing.com/","msgid":"<20231219053000.2741-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T05:30:00","name":"testsuite: Fix dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053000.2741-1-xuli1@eswincomputing.com/mbox/"},{"id":180761,"url":"https://patchwork.plctlab.org/api/1.2/patches/180761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053853.3764283-1-hongtao.liu@intel.com/","msgid":"<20231219053853.3764283-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-19T05:38:53","name":"Optimize A < B ? A : B to MIN_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053853.3764283-1-hongtao.liu@intel.com/mbox/"},{"id":180788,"url":"https://patchwork.plctlab.org/api/1.2/patches/180788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-2-xry111@xry111.site/","msgid":"<20231219065957.70665-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-19T06:59:56","name":"[1/2] LoongArch: Use force_reg instead of gen_reg_rtx + emit_move_insn in vec_init expander [PR113033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-2-xry111@xry111.site/mbox/"},{"id":180789,"url":"https://patchwork.plctlab.org/api/1.2/patches/180789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-3-xry111@xry111.site/","msgid":"<20231219065957.70665-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-19T06:59:57","name":"[2/2] LoongArch: Clean up vec_init expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-3-xry111@xry111.site/mbox/"},{"id":180828,"url":"https://patchwork.plctlab.org/api/1.2/patches/180828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084231.1758550-1-juzhe.zhong@rivai.ai/","msgid":"<20231219084231.1758550-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T08:42:30","name":"[Committed] RISC-V: Force scalable vector on all vsetvl tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084231.1758550-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180827,"url":"https://patchwork.plctlab.org/api/1.2/patches/180827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084317.58579-1-chenxiaolong@loongson.cn/","msgid":"<20231219084317.58579-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-19T08:43:17","name":"[v1] LoongArch: Fix builtin function prototypes for LASX in doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084317.58579-1-chenxiaolong@loongson.cn/mbox/"},{"id":180839,"url":"https://patchwork.plctlab.org/api/1.2/patches/180839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFbkrzkdwHhPghN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-19T09:00:02","name":"i386: Fix mmx.md signbit expanders [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFbkrzkdwHhPghN@tucnak/mbox/"},{"id":180844,"url":"https://patchwork.plctlab.org/api/1.2/patches/180844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFgN6TSlhCDc6xA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-19T09:19:51","name":"aarch64: Validate register operands early in ldp fusion pass [PR113062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFgN6TSlhCDc6xA@arm.com/mbox/"},{"id":180851,"url":"https://patchwork.plctlab.org/api/1.2/patches/180851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-2-slewis@rivosinc.com/","msgid":"<20231219095348.356551-2-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:46","name":"[v2,1/3] RISC-V: movmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-2-slewis@rivosinc.com/mbox/"},{"id":180853,"url":"https://patchwork.plctlab.org/api/1.2/patches/180853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-3-slewis@rivosinc.com/","msgid":"<20231219095348.356551-3-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:47","name":"[v2,2/3] RISC-V: setmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-3-slewis@rivosinc.com/mbox/"},{"id":180852,"url":"https://patchwork.plctlab.org/api/1.2/patches/180852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-4-slewis@rivosinc.com/","msgid":"<20231219095348.356551-4-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:48","name":"[v2,3/3] RISC-V: cmpmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-4-slewis@rivosinc.com/mbox/"},{"id":180862,"url":"https://patchwork.plctlab.org/api/1.2/patches/180862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219105635.2566878-1-juzhe.zhong@rivai.ai/","msgid":"<20231219105635.2566878-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T10:56:35","name":"[Committed] RISC-V: Refine some codes of expand_const_vector [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219105635.2566878-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180872,"url":"https://patchwork.plctlab.org/api/1.2/patches/180872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219110449.30805-1-chenglulu@loongson.cn/","msgid":"<20231219110449.30805-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-19T11:04:50","name":"LoongArch: Added TLS Le Relax support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219110449.30805-1-chenglulu@loongson.cn/mbox/"},{"id":180876,"url":"https://patchwork.plctlab.org/api/1.2/patches/180876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219111913.2568903-1-juzhe.zhong@rivai.ai/","msgid":"<20231219111913.2568903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T11:19:13","name":"Regression FIX: Remove vect_variable_length XFAIL from some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219111913.2568903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180877,"url":"https://patchwork.plctlab.org/api/1.2/patches/180877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net/","msgid":"<87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-19T11:20:01","name":"Unify OpenACC/C and C++ behavior re duplicate OpenACC '\''declare'\'' directives for '\''extern'\'' variables [PR90868] (was: [committed] [PR90868] Document status quo for duplicate OpenACC '\''declare'\'' directives for '\''extern'\'' variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net/mbox/"},{"id":180883,"url":"https://patchwork.plctlab.org/api/1.2/patches/180883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219114048.2570818-1-juzhe.zhong@rivai.ai/","msgid":"<20231219114048.2570818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T11:40:48","name":"RISC-V: Fix FAIL of bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219114048.2570818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180904,"url":"https://patchwork.plctlab.org/api/1.2/patches/180904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123235.08F453861816@sourceware.org/","msgid":"<20231219123235.08F453861816@sourceware.org>","list_archive_url":null,"date":"2023-12-19T12:30:58","name":"tree-optimization/113073 - amend PR112736 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123235.08F453861816@sourceware.org/mbox/"},{"id":180905,"url":"https://patchwork.plctlab.org/api/1.2/patches/180905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123251.29740386076C@sourceware.org/","msgid":"<20231219123251.29740386076C@sourceware.org>","list_archive_url":null,"date":"2023-12-19T12:31:13","name":"tree-optimization/113080 - missing final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123251.29740386076C@sourceware.org/mbox/"},{"id":180987,"url":"https://patchwork.plctlab.org/api/1.2/patches/180987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219142956.454370-1-poulhies@adacore.com/","msgid":"<20231219142956.454370-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:29:56","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219142956.454370-1-poulhies@adacore.com/mbox/"},{"id":180988,"url":"https://patchwork.plctlab.org/api/1.2/patches/180988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143005.454530-1-poulhies@adacore.com/","msgid":"<20231219143005.454530-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:05","name":"[COMMITTED] ada: Illegal instance of Generic_1.Generic_2 incorrectly accepted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143005.454530-1-poulhies@adacore.com/mbox/"},{"id":180990,"url":"https://patchwork.plctlab.org/api/1.2/patches/180990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143008.454633-1-poulhies@adacore.com/","msgid":"<20231219143008.454633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:08","name":"[COMMITTED] ada: Cleanup SPARK legality checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143008.454633-1-poulhies@adacore.com/mbox/"},{"id":181014,"url":"https://patchwork.plctlab.org/api/1.2/patches/181014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143027.454697-1-poulhies@adacore.com/","msgid":"<20231219143027.454697-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:10","name":"[COMMITTED] ada: Do not issue SPARK legality error if SPARK_Mode ignored","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143027.454697-1-poulhies@adacore.com/mbox/"},{"id":180992,"url":"https://patchwork.plctlab.org/api/1.2/patches/180992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143030.454782-1-poulhies@adacore.com/","msgid":"<20231219143030.454782-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:30","name":"[COMMITTED] ada: Restore object constraint optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143030.454782-1-poulhies@adacore.com/mbox/"},{"id":180995,"url":"https://patchwork.plctlab.org/api/1.2/patches/180995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143032.454847-1-poulhies@adacore.com/","msgid":"<20231219143032.454847-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:32","name":"[COMMITTED] ada: Cope with Sem_Util.Enclosing_Declaration oddness.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143032.454847-1-poulhies@adacore.com/mbox/"},{"id":180993,"url":"https://patchwork.plctlab.org/api/1.2/patches/180993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143034.454911-1-poulhies@adacore.com/","msgid":"<20231219143034.454911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:33","name":"[COMMITTED] ada: Plug small loophole in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143034.454911-1-poulhies@adacore.com/mbox/"},{"id":180997,"url":"https://patchwork.plctlab.org/api/1.2/patches/180997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143035.454977-1-poulhies@adacore.com/","msgid":"<20231219143035.454977-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:35","name":"[COMMITTED] ada: Fix spurious visibility error on parent'\''s component in instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143035.454977-1-poulhies@adacore.com/mbox/"},{"id":181015,"url":"https://patchwork.plctlab.org/api/1.2/patches/181015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143037.455041-1-poulhies@adacore.com/","msgid":"<20231219143037.455041-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:37","name":"[COMMITTED] ada: Add missing guard to previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143037.455041-1-poulhies@adacore.com/mbox/"},{"id":180998,"url":"https://patchwork.plctlab.org/api/1.2/patches/180998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143039.455106-1-poulhies@adacore.com/","msgid":"<20231219143039.455106-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:39","name":"[COMMITTED] ada: Fix SPARK expansion of container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143039.455106-1-poulhies@adacore.com/mbox/"},{"id":181008,"url":"https://patchwork.plctlab.org/api/1.2/patches/181008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143041.455170-1-poulhies@adacore.com/","msgid":"<20231219143041.455170-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:41","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143041.455170-1-poulhies@adacore.com/mbox/"},{"id":181004,"url":"https://patchwork.plctlab.org/api/1.2/patches/181004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143043.455234-1-poulhies@adacore.com/","msgid":"<20231219143043.455234-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:43","name":"[COMMITTED] ada: Fix crash on concurrent type aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143043.455234-1-poulhies@adacore.com/mbox/"},{"id":180996,"url":"https://patchwork.plctlab.org/api/1.2/patches/180996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143045.455298-1-poulhies@adacore.com/","msgid":"<20231219143045.455298-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:45","name":"[COMMITTED] ada: Adapt Ada.Command_Line to work on configurable runtimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143045.455298-1-poulhies@adacore.com/mbox/"},{"id":181001,"url":"https://patchwork.plctlab.org/api/1.2/patches/181001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143047.455362-1-poulhies@adacore.com/","msgid":"<20231219143047.455362-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:47","name":"[COMMITTED] ada: Remove No_Dynamic_Priorities from Restricted_Tasking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143047.455362-1-poulhies@adacore.com/mbox/"},{"id":181016,"url":"https://patchwork.plctlab.org/api/1.2/patches/181016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143049.455426-1-poulhies@adacore.com/","msgid":"<20231219143049.455426-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:49","name":"[COMMITTED] ada: Rename Is_Constr_Subt_For_UN_Aliased flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143049.455426-1-poulhies@adacore.com/mbox/"},{"id":181003,"url":"https://patchwork.plctlab.org/api/1.2/patches/181003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143050.455490-1-poulhies@adacore.com/","msgid":"<20231219143050.455490-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:50","name":"[COMMITTED] ada: Ignore unconstrained components as inputs for Depends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143050.455490-1-poulhies@adacore.com/mbox/"},{"id":181011,"url":"https://patchwork.plctlab.org/api/1.2/patches/181011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143052.455554-1-poulhies@adacore.com/","msgid":"<20231219143052.455554-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:52","name":"[COMMITTED] ada: Optimize performance and remove dynamic frame requirement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143052.455554-1-poulhies@adacore.com/mbox/"},{"id":181017,"url":"https://patchwork.plctlab.org/api/1.2/patches/181017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143054.455618-1-poulhies@adacore.com/","msgid":"<20231219143054.455618-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:54","name":"[COMMITTED] ada: gnatbind: Do not generate Ada.Command_Line references when not used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143054.455618-1-poulhies@adacore.com/mbox/"},{"id":181006,"url":"https://patchwork.plctlab.org/api/1.2/patches/181006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143056.455682-1-poulhies@adacore.com/","msgid":"<20231219143056.455682-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:56","name":"[COMMITTED] ada: Remove unreferenced utility routine Get_Logical_Line_Number_Img","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143056.455682-1-poulhies@adacore.com/mbox/"},{"id":181007,"url":"https://patchwork.plctlab.org/api/1.2/patches/181007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143057.455747-1-poulhies@adacore.com/","msgid":"<20231219143057.455747-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:57","name":"[COMMITTED] ada: Fix style and typos in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143057.455747-1-poulhies@adacore.com/mbox/"},{"id":181009,"url":"https://patchwork.plctlab.org/api/1.2/patches/181009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143059.455817-1-poulhies@adacore.com/","msgid":"<20231219143059.455817-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:59","name":"[COMMITTED] ada: Compiler hangs on container aggregate with function call as key expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143059.455817-1-poulhies@adacore.com/mbox/"},{"id":181013,"url":"https://patchwork.plctlab.org/api/1.2/patches/181013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143101.455881-1-poulhies@adacore.com/","msgid":"<20231219143101.455881-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:01","name":"[COMMITTED] ada: Rework comment in Expand_Ctrl_Function_Call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143101.455881-1-poulhies@adacore.com/mbox/"},{"id":181018,"url":"https://patchwork.plctlab.org/api/1.2/patches/181018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143103.455945-1-poulhies@adacore.com/","msgid":"<20231219143103.455945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:03","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143103.455945-1-poulhies@adacore.com/mbox/"},{"id":181020,"url":"https://patchwork.plctlab.org/api/1.2/patches/181020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143104.456009-1-poulhies@adacore.com/","msgid":"<20231219143104.456009-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:04","name":"[COMMITTED] ada: Missing error on positional container aggregates for types with Add_Named","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143104.456009-1-poulhies@adacore.com/mbox/"},{"id":181010,"url":"https://patchwork.plctlab.org/api/1.2/patches/181010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143106.456073-1-poulhies@adacore.com/","msgid":"<20231219143106.456073-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:06","name":"[COMMITTED] ada: Check all interfaces for valid iterator type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143106.456073-1-poulhies@adacore.com/mbox/"},{"id":181023,"url":"https://patchwork.plctlab.org/api/1.2/patches/181023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143108.456179-1-poulhies@adacore.com/","msgid":"<20231219143108.456179-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:08","name":"[COMMITTED] ada: Fix internal error on call with parameter of predicated subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143108.456179-1-poulhies@adacore.com/mbox/"},{"id":181005,"url":"https://patchwork.plctlab.org/api/1.2/patches/181005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143109.456243-1-poulhies@adacore.com/","msgid":"<20231219143109.456243-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:09","name":"[COMMITTED] ada: Add makefile targets for building/installing html doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143109.456243-1-poulhies@adacore.com/mbox/"},{"id":181130,"url":"https://patchwork.plctlab.org/api/1.2/patches/181130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219172153.2298161-1-siddhesh@gotplt.org/","msgid":"<20231219172153.2298161-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-12-19T17:21:53","name":"tree-object-size: Clean up unknown propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219172153.2298161-1-siddhesh@gotplt.org/mbox/"},{"id":181258,"url":"https://patchwork.plctlab.org/api/1.2/patches/181258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com/","msgid":"<42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com>","list_archive_url":null,"date":"2023-12-19T20:54:34","name":"gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com/mbox/"},{"id":181308,"url":"https://patchwork.plctlab.org/api/1.2/patches/181308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221731.2944661-1-jason@redhat.com/","msgid":"<20231219221731.2944661-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-19T22:17:31","name":"[RFA] opts: -Werror=foo always implies -Wfoo [PR106213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221731.2944661-1-jason@redhat.com/mbox/"},{"id":181309,"url":"https://patchwork.plctlab.org/api/1.2/patches/181309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221935.79287-1-polacek@redhat.com/","msgid":"<20231219221935.79287-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-19T22:19:35","name":"sccopy: remove unused data member [PR113069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221935.79287-1-polacek@redhat.com/mbox/"},{"id":181343,"url":"https://patchwork.plctlab.org/api/1.2/patches/181343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplz13g5q.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-19T23:51:13","name":"[#2v2/2] strub: sparc64: unbias the stack address [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplz13g5q.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":181422,"url":"https://patchwork.plctlab.org/api/1.2/patches/181422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6kd38ob.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T02:32:52","name":"[FYI] -finline-stringops: copy timeout factor from memcmp-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6kd38ob.fsf@lxoliva.fsfla.org/mbox/"},{"id":181423,"url":"https://patchwork.plctlab.org/api/1.2/patches/181423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220023922.1076198-1-pan2.li@intel.com/","msgid":"<20231220023922.1076198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T02:39:22","name":"[v1] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220023922.1076198-1-pan2.li@intel.com/mbox/"},{"id":181429,"url":"https://patchwork.plctlab.org/api/1.2/patches/181429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyv137pa.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T02:53:53","name":"-finline-stringops: allow expansion into edges [PR113002]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyv137pa.fsf@lxoliva.fsfla.org/mbox/"},{"id":181453,"url":"https://patchwork.plctlab.org/api/1.2/patches/181453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com/","msgid":"<346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com>","list_archive_url":null,"date":"2023-12-20T04:25:23","name":"[committed] Stop forcing unsigned bitfields on mcore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com/mbox/"},{"id":181455,"url":"https://patchwork.plctlab.org/api/1.2/patches/181455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com/","msgid":"<4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com>","list_archive_url":null,"date":"2023-12-20T04:29:12","name":"[committed,gcc-wwwdocs] Add blurb about bitfield signedness on mcore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com/mbox/"},{"id":181461,"url":"https://patchwork.plctlab.org/api/1.2/patches/181461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFmAMQ214FmTReOkMaxCuxEiCKO7gWGAittA=H08K3x8ewTJbw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T04:32:37","name":"Fortran: Use non conflicting file extensions for intermediates [PR81615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFmAMQ214FmTReOkMaxCuxEiCKO7gWGAittA=H08K3x8ewTJbw@mail.gmail.com/mbox/"},{"id":181481,"url":"https://patchwork.plctlab.org/api/1.2/patches/181481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8r5p2xmp.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T06:31:26","name":"compare_tests: distinguish c-c++-common results by tool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8r5p2xmp.fsf@lxoliva.fsfla.org/mbox/"},{"id":181485,"url":"https://patchwork.plctlab.org/api/1.2/patches/181485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065011.2696544-1-juzhe.zhong@rivai.ai/","msgid":"<20231220065011.2696544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T06:50:11","name":"RISC-V: Fix bug of VSETVL fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065011.2696544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181486,"url":"https://patchwork.plctlab.org/api/1.2/patches/181486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065526.2698027-1-juzhe.zhong@rivai.ai/","msgid":"<20231220065526.2698027-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T06:55:26","name":"RISC-V: Optimize SELECT_VL codegen when length is known as smaller than VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065526.2698027-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181488,"url":"https://patchwork.plctlab.org/api/1.2/patches/181488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065606.2695737-1-pan2.li@intel.com/","msgid":"<20231220065606.2695737-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T06:56:06","name":"[v2] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065606.2695737-1-pan2.li@intel.com/mbox/"},{"id":181490,"url":"https://patchwork.plctlab.org/api/1.2/patches/181490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-1-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:28","name":"[v4,1/3] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-1-wangfeng@eswincomputing.com/mbox/"},{"id":181491,"url":"https://patchwork.plctlab.org/api/1.2/patches/181491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-2-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:29","name":"[v4,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-2-wangfeng@eswincomputing.com/mbox/"},{"id":181492,"url":"https://patchwork.plctlab.org/api/1.2/patches/181492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-3-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:30","name":"[v4,3/3] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-3-wangfeng@eswincomputing.com/mbox/"},{"id":181521,"url":"https://patchwork.plctlab.org/api/1.2/patches/181521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220081537.2013818-1-demin.han@starfivetech.com/","msgid":"<20231220081537.2013818-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-20T08:15:37","name":"RISC-V: Fix calculation of max live vregs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220081537.2013818-1-demin.han@starfivetech.com/mbox/"},{"id":181522,"url":"https://patchwork.plctlab.org/api/1.2/patches/181522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv88tz3v8.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:15:39","name":"[FYI] www: new AdaCore-contributed hardening features in gcc 13 and 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv88tz3v8.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":181525,"url":"https://patchwork.plctlab.org/api/1.2/patches/181525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220082040.2920483-1-juzhe.zhong@rivai.ai/","msgid":"<20231220082040.2920483-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T08:20:40","name":"[Committed] RISC-V: Fix ICE of moving SUBREG of vector mode to DImode scalar register on RV32 system.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220082040.2920483-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181531,"url":"https://patchwork.plctlab.org/api/1.2/patches/181531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7Ut6SzciCSpBkUvpN=Rook1q4pOWPZ3uC+tprZRa4YdMQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:39:24","name":"RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7Ut6SzciCSpBkUvpN=Rook1q4pOWPZ3uC+tprZRa4YdMQ@mail.gmail.com/mbox/"},{"id":181545,"url":"https://patchwork.plctlab.org/api/1.2/patches/181545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c10d0643-4cab-42a7-96ac-3fee9106f46a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:51:19","name":"[Patchv3,rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c10d0643-4cab-42a7-96ac-3fee9106f46a@linux.ibm.com/mbox/"},{"id":181546,"url":"https://patchwork.plctlab.org/api/1.2/patches/181546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f440fe00-9ac5-48b8-a33e-b0672cf5be94@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:56:26","name":"[rs6000] Call library for block memory compare when optimizing for size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f440fe00-9ac5-48b8-a33e-b0672cf5be94@linux.ibm.com/mbox/"},{"id":181551,"url":"https://patchwork.plctlab.org/api/1.2/patches/181551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com/","msgid":"<3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com>","list_archive_url":null,"date":"2023-12-20T09:25:42","name":"sched: Don'\''t skip empty block by removing no_real_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com/mbox/"},{"id":181552,"url":"https://patchwork.plctlab.org/api/1.2/patches/181552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYKz2fbKlwr0hIHC@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T09:28:57","name":"[v2] aarch64: Validate register operands early in ldp fusion pass [PR113062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYKz2fbKlwr0hIHC@arm.com/mbox/"},{"id":181554,"url":"https://patchwork.plctlab.org/api/1.2/patches/181554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220093533.3390676-1-pan2.li@intel.com/","msgid":"<20231220093533.3390676-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T09:35:33","name":"[v3] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220093533.3390676-1-pan2.li@intel.com/mbox/"},{"id":181597,"url":"https://patchwork.plctlab.org/api/1.2/patches/181597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYLAaEykjTR0a36e@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-20T10:22:32","name":"lower-bitint: Fix up handling of nested casts in mergeable stmt handling [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYLAaEykjTR0a36e@tucnak/mbox/"},{"id":181629,"url":"https://patchwork.plctlab.org/api/1.2/patches/181629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123039.502-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231220123039.502-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-20T12:30:39","name":"[v3,3/6] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123039.502-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":181630,"url":"https://patchwork.plctlab.org/api/1.2/patches/181630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123419.608-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231220123419.608-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-20T12:34:19","name":"[v3,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123419.608-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":181643,"url":"https://patchwork.plctlab.org/api/1.2/patches/181643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220134450.CBA93386181E@sourceware.org/","msgid":"<20231220134450.CBA93386181E@sourceware.org>","list_archive_url":null,"date":"2023-12-20T13:43:13","name":"Improve DCE of dead parts of a permute chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220134450.CBA93386181E@sourceware.org/mbox/"},{"id":181661,"url":"https://patchwork.plctlab.org/api/1.2/patches/181661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfhrmf2.fsf@euler.schwinge.homeip.net/","msgid":"<87edfhrmf2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-20T14:14:25","name":"No libstdc++ for GCN (was: No libstdc++ for nvptx)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfhrmf2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":181665,"url":"https://patchwork.plctlab.org/api/1.2/patches/181665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220144829.765056-1-abidh@codesourcery.com/","msgid":"<20231220144829.765056-1-abidh@codesourcery.com>","list_archive_url":null,"date":"2023-12-20T14:48:29","name":"[OpenACC] Add tests for implied copy of variables in reduction clause.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220144829.765056-1-abidh@codesourcery.com/mbox/"},{"id":181741,"url":"https://patchwork.plctlab.org/api/1.2/patches/181741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173104.3105138-1-jason@redhat.com/","msgid":"<20231220173104.3105138-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-20T17:31:04","name":"[pushed] c++: xvalue array subscript [PR103185]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173104.3105138-1-jason@redhat.com/mbox/"},{"id":181742,"url":"https://patchwork.plctlab.org/api/1.2/patches/181742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173117.3105333-1-jason@redhat.com/","msgid":"<20231220173117.3105333-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-20T17:31:17","name":"[pushed] c++: throwing dtor and empty try [PR113088]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173117.3105333-1-jason@redhat.com/mbox/"},{"id":181745,"url":"https://patchwork.plctlab.org/api/1.2/patches/181745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220180836.24936-1-palmer@rivosinc.com/","msgid":"<20231220180836.24936-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:08:36","name":"RISC-V: Document -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220180836.24936-1-palmer@rivosinc.com/mbox/"},{"id":181746,"url":"https://patchwork.plctlab.org/api/1.2/patches/181746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220181639.25609-2-palmer@rivosinc.com/","msgid":"<20231220181639.25609-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:16:40","name":"[wwwdocs] RISC-V: Add -mcmodel=large for GCC-14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220181639.25609-2-palmer@rivosinc.com/mbox/"},{"id":181747,"url":"https://patchwork.plctlab.org/api/1.2/patches/181747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220184109.27977-1-palmer@rivosinc.com/","msgid":"<20231220184109.27977-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:41:09","name":"RISC-V: Add --with-cmodel configure-time argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220184109.27977-1-palmer@rivosinc.com/mbox/"},{"id":181749,"url":"https://patchwork.plctlab.org/api/1.2/patches/181749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220190824.399818-1-kmatsui@gcc.gnu.org/","msgid":"<20231220190824.399818-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-20T19:08:24","name":"testsuite: Remove testsuite_tr1.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220190824.399818-1-kmatsui@gcc.gnu.org/mbox/"},{"id":181750,"url":"https://patchwork.plctlab.org/api/1.2/patches/181750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYM+cZIJOmWDZTSH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-20T19:20:17","name":"c++: Enable -Walloc-size and -Wcalloc-transposed-args warnings for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYM+cZIJOmWDZTSH@tucnak/mbox/"},{"id":181789,"url":"https://patchwork.plctlab.org/api/1.2/patches/181789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220220749.632100-1-ppalka@redhat.com/","msgid":"<20231220220749.632100-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-20T22:07:49","name":"c++: fix -Wparentheses with boolean-like class types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220220749.632100-1-ppalka@redhat.com/mbox/"},{"id":181940,"url":"https://patchwork.plctlab.org/api/1.2/patches/181940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com/","msgid":"<138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com>","list_archive_url":null,"date":"2023-12-21T01:37:52","name":"[Patchv3,rs6000] Clean up pre-checkings of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com/mbox/"},{"id":181942,"url":"https://patchwork.plctlab.org/api/1.2/patches/181942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221020627.3266898-1-jason@redhat.com/","msgid":"<20231221020627.3266898-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-21T02:06:27","name":"[pushed] c++: computed goto warning [PR37722]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221020627.3266898-1-jason@redhat.com/mbox/"},{"id":181944,"url":"https://patchwork.plctlab.org/api/1.2/patches/181944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221022518.4175834-1-pan2.li@intel.com/","msgid":"<20231221022518.4175834-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-21T02:25:18","name":"[v1] RISC-V: XFail the signbit-5 run test for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221022518.4175834-1-pan2.li@intel.com/mbox/"},{"id":181951,"url":"https://patchwork.plctlab.org/api/1.2/patches/181951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221024805.7671-1-wangfeng@eswincomputing.com/","msgid":"<20231221024805.7671-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-21T02:48:05","name":"[v5,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221024805.7671-1-wangfeng@eswincomputing.com/mbox/"},{"id":182005,"url":"https://patchwork.plctlab.org/api/1.2/patches/182005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredfgytmv.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-21T06:08:56","name":"[2/2,FYI] -finline-stringops: drop obsolete comment [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredfgytmv.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":182017,"url":"https://patchwork.plctlab.org/api/1.2/patches/182017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPidUHpLRVI4+tY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-21T07:00:05","name":"lower-bitint: Avoid nested casts in muldiv/float operands [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPidUHpLRVI4+tY@tucnak/mbox/"},{"id":182018,"url":"https://patchwork.plctlab.org/api/1.2/patches/182018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPjpltT0cX5jauL@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-21T07:05:10","name":"ubsan: Add workaround for missing bitint libubsan support for shifts [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPjpltT0cX5jauL@tucnak/mbox/"},{"id":182045,"url":"https://patchwork.plctlab.org/api/1.2/patches/182045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221082558.449203-1-haochen.jiang@intel.com/","msgid":"<20231221082558.449203-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-21T08:25:58","name":"[gcc-wwwdocs,v2] gcc-13/14: Mention recent update for x86_64 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221082558.449203-1-haochen.jiang@intel.com/mbox/"},{"id":182060,"url":"https://patchwork.plctlab.org/api/1.2/patches/182060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221085750.3541650-1-juzhe.zhong@rivai.ai/","msgid":"<20231221085750.3541650-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-21T08:57:50","name":"[Committed] RISC-V: Add dynamic LMUL test for x264","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221085750.3541650-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182142,"url":"https://patchwork.plctlab.org/api/1.2/patches/182142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfrzvluu4.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T10:21:23","name":"[pushed] aarch64: Fix cut-&-pasto in early RA pass [PR112948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfrzvluu4.fsf@arm.com/mbox/"},{"id":182143,"url":"https://patchwork.plctlab.org/api/1.2/patches/182143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5q3lut9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T10:21:54","name":"[pushed] aarch64: Fix early RA handling of deleted insns [PR113094]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5q3lut9.fsf@arm.com/mbox/"},{"id":182172,"url":"https://patchwork.plctlab.org/api/1.2/patches/182172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221123750.2303405-1-lhyatt@gmail.com/","msgid":"<20231221123750.2303405-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-21T12:37:50","name":"libcpp: Fix __has_include_next ICE in the last directory of the path [PR80755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221123750.2303405-1-lhyatt@gmail.com/mbox/"},{"id":182229,"url":"https://patchwork.plctlab.org/api/1.2/patches/182229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com/","msgid":"<9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com>","list_archive_url":null,"date":"2023-12-21T13:33:39","name":"libgccjit: Allow comparing aligned int types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com/mbox/"},{"id":182247,"url":"https://patchwork.plctlab.org/api/1.2/patches/182247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com/","msgid":"<455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com>","list_archive_url":null,"date":"2023-12-21T13:42:11","name":"libgccjit: Support signed char flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com/mbox/"},{"id":182287,"url":"https://patchwork.plctlab.org/api/1.2/patches/182287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZfQ=uDLqEoutbKMj5Y3qOT0T4GcBNrNybT3jP6+oNEEA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T15:02:58","name":"[committed] i386: Fix shifts with high register input operand [PR113044]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZfQ=uDLqEoutbKMj5Y3qOT0T4GcBNrNybT3jP6+oNEEA@mail.gmail.com/mbox/"},{"id":182388,"url":"https://patchwork.plctlab.org/api/1.2/patches/182388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221164914.943125-1-christophe.lyon@linaro.org/","msgid":"<20231221164914.943125-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-12-21T16:49:14","name":"Allow overriding EXPECT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221164914.943125-1-christophe.lyon@linaro.org/mbox/"},{"id":182362,"url":"https://patchwork.plctlab.org/api/1.2/patches/182362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5e30c7a9f9d27a2ef19d1f7ee5335aa14c7860e.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T16:59:45","name":"libgccjit: Allow sending a const pointer as argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5e30c7a9f9d27a2ef19d1f7ee5335aa14c7860e.camel@zoho.com/mbox/"},{"id":182432,"url":"https://patchwork.plctlab.org/api/1.2/patches/182432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221193243.368541-1-arsen@aarsen.me/","msgid":"<20231221193243.368541-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T19:19:29","name":"toplevel: don'\''t override gettext-runtime/configure-discovered build args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221193243.368541-1-arsen@aarsen.me/mbox/"},{"id":182454,"url":"https://patchwork.plctlab.org/api/1.2/patches/182454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-2-arsen@aarsen.me/","msgid":"<20231221211909.371736-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T20:01:31","name":"[v2,1/2] libstdc++: add missing include in ranges_util.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-2-arsen@aarsen.me/mbox/"},{"id":182464,"url":"https://patchwork.plctlab.org/api/1.2/patches/182464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-3-arsen@aarsen.me/","msgid":"<20231221211909.371736-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T20:01:32","name":"[v2,2/2] libstdc++: implement std::generator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-3-arsen@aarsen.me/mbox/"},{"id":182445,"url":"https://patchwork.plctlab.org/api/1.2/patches/182445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221201041.2709909-1-quic_apinski@quicinc.com/","msgid":"<20231221201041.2709909-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-21T20:10:41","name":"Document cond_copysign and cond_len_copysign optabs [PR112951]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221201041.2709909-1-quic_apinski@quicinc.com/mbox/"},{"id":182451,"url":"https://patchwork.plctlab.org/api/1.2/patches/182451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b963fdad41d8b038e9da2e85319427c9472cff57.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T21:01:27","name":"libgccjit: Add convert vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b963fdad41d8b038e9da2e85319427c9472cff57.camel@zoho.com/mbox/"},{"id":182455,"url":"https://patchwork.plctlab.org/api/1.2/patches/182455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at/","msgid":"<9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-21T21:47:59","name":"[V6] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at/mbox/"},{"id":182490,"url":"https://patchwork.plctlab.org/api/1.2/patches/182490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222001945.3536355-1-jason@redhat.com/","msgid":"<20231222001945.3536355-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T00:19:45","name":"[pushed] testsuite: suppress mangling compatibility aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222001945.3536355-1-jason@redhat.com/mbox/"},{"id":182491,"url":"https://patchwork.plctlab.org/api/1.2/patches/182491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222002002.3536507-1-jason@redhat.com/","msgid":"<20231222002002.3536507-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T00:20:02","name":"[pushed] c++: sizeof... mangling with alias template [PR95298]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222002002.3536507-1-jason@redhat.com/mbox/"},{"id":182495,"url":"https://patchwork.plctlab.org/api/1.2/patches/182495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222005914.13748-1-wangfeng@eswincomputing.com/","msgid":"<20231222005914.13748-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T00:59:14","name":"[v6,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222005914.13748-1-wangfeng@eswincomputing.com/mbox/"},{"id":182500,"url":"https://patchwork.plctlab.org/api/1.2/patches/182500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222013806.5853-1-wangfeng@eswincomputing.com/","msgid":"<20231222013806.5853-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T01:38:06","name":"[v7,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222013806.5853-1-wangfeng@eswincomputing.com/mbox/"},{"id":182505,"url":"https://patchwork.plctlab.org/api/1.2/patches/182505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222015936.8935-1-wangfeng@eswincomputing.com/","msgid":"<20231222015936.8935-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T01:59:36","name":"RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222015936.8935-1-wangfeng@eswincomputing.com/mbox/"},{"id":182508,"url":"https://patchwork.plctlab.org/api/1.2/patches/182508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222022901.1253705-1-sandra@codesourcery.com/","msgid":"<20231222022901.1253705-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-22T02:29:01","name":"[Committed,obvious] Testsuite: Fix failures in g++.dg/analyzer/placement-new-size.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222022901.1253705-1-sandra@codesourcery.com/mbox/"},{"id":182512,"url":"https://patchwork.plctlab.org/api/1.2/patches/182512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222023605.3894839-1-lipeng.zhu@intel.com/","msgid":"<20231222023605.3894839-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-12-22T02:36:06","name":"libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222023605.3894839-1-lipeng.zhu@intel.com/mbox/"},{"id":182511,"url":"https://patchwork.plctlab.org/api/1.2/patches/182511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222031754.3556161-1-jason@redhat.com/","msgid":"<20231222031754.3556161-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T03:17:54","name":"[pushed] c++: computed goto from catch block [PR81438]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222031754.3556161-1-jason@redhat.com/mbox/"},{"id":182587,"url":"https://patchwork.plctlab.org/api/1.2/patches/182587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVE5zMA/0hCcNxV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:12:23","name":"lower-bitint: Fix handle_cast ICE [PR113102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVE5zMA/0hCcNxV@tucnak/mbox/"},{"id":182588,"url":"https://patchwork.plctlab.org/api/1.2/patches/182588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVGEs0RMZelMjez@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:17:22","name":"lower-bitint: Handle unreleased SSA_NAMEs from earlier passes gracefully [PR113102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVGEs0RMZelMjez@tucnak/mbox/"},{"id":182589,"url":"https://patchwork.plctlab.org/api/1.2/patches/182589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222081844.782313-1-panchenghui@loongson.cn/","msgid":"<20231222081844.782313-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-12-22T08:18:44","name":"[v1] LoongArch: Fix ICE when passing two same vector argument consecutively","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222081844.782313-1-panchenghui@loongson.cn/mbox/"},{"id":182591,"url":"https://patchwork.plctlab.org/api/1.2/patches/182591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVHCsf63PsOhpIS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:21:30","name":"symtab-thunks: Use aggregate_value_p even on is_gimple_reg_type returns [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVHCsf63PsOhpIS@tucnak/mbox/"},{"id":182592,"url":"https://patchwork.plctlab.org/api/1.2/patches/182592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222082203.888077-1-panchenghui@loongson.cn/","msgid":"<20231222082203.888077-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-12-22T08:22:03","name":"[v1] LoongArch: Fix insn output of vec_concat templates for LASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222082203.888077-1-panchenghui@loongson.cn/mbox/"},{"id":182595,"url":"https://patchwork.plctlab.org/api/1.2/patches/182595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVKa0ZMbjsP+n1h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:35:55","name":"combine: Don'\''t optimize paradoxical SUBREG AND CONST_INT on WORD_REGISTER_OPERATIONS targets [PR112758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVKa0ZMbjsP+n1h@tucnak/mbox/"},{"id":182596,"url":"https://patchwork.plctlab.org/api/1.2/patches/182596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7U-33VeGbCXsu2Xo2=5=aESTZTw8DEE7t1xQ_eogp=cNA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-22T09:23:13","name":"RISC-V: Support -m[no-]unaligned-access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7U-33VeGbCXsu2Xo2=5=aESTZTw8DEE7t1xQ_eogp=cNA@mail.gmail.com/mbox/"},{"id":182602,"url":"https://patchwork.plctlab.org/api/1.2/patches/182602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222095156.304068-1-juzhe.zhong@rivai.ai/","msgid":"<20231222095156.304068-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-22T09:51:56","name":"RISC-V: Make PHI initial value occupy live V_REG in dynamic LMUL cost model analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222095156.304068-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182608,"url":"https://patchwork.plctlab.org/api/1.2/patches/182608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222100547.454123-1-kmatsui@gcc.gnu.org/","msgid":"<20231222100547.454123-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-22T10:05:47","name":"[committed] c++: testsuite: Remove testsuite_tr1.h includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222100547.454123-1-kmatsui@gcc.gnu.org/mbox/"},{"id":182612,"url":"https://patchwork.plctlab.org/api/1.2/patches/182612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com/","msgid":"<026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-22T10:14:06","name":"[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com/mbox/"},{"id":182614,"url":"https://patchwork.plctlab.org/api/1.2/patches/182614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com/","msgid":"<027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-22T10:25:39","name":"[x86_64] PR target/112992: Optimize mode for broadcast of constants.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com/mbox/"},{"id":182676,"url":"https://patchwork.plctlab.org/api/1.2/patches/182676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222141038.6657-1-amonakov@ispras.ru/","msgid":"<20231222141038.6657-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-12-22T14:10:38","name":"[v2] object lifetime instrumentation for Valgrind [PR66487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222141038.6657-1-amonakov@ispras.ru/mbox/"},{"id":182679,"url":"https://patchwork.plctlab.org/api/1.2/patches/182679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e0f36d10599dcbda88502b9631c3aae1119644.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-22T14:39:48","name":"libgccjit: Add missing builtins needed by optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e0f36d10599dcbda88502b9631c3aae1119644.camel@zoho.com/mbox/"},{"id":182702,"url":"https://patchwork.plctlab.org/api/1.2/patches/182702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com/","msgid":"<8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com>","list_archive_url":null,"date":"2023-12-22T15:25:41","name":"libgccjit: Implement sizeof operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com/mbox/"},{"id":182770,"url":"https://patchwork.plctlab.org/api/1.2/patches/182770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222194513.294048-1-vineetg@rivosinc.com/","msgid":"<20231222194513.294048-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-12-22T19:45:13","name":"RISC-V: RVV: add toggle to control vsetvl pass behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222194513.294048-1-vineetg@rivosinc.com/mbox/"},{"id":182787,"url":"https://patchwork.plctlab.org/api/1.2/patches/182787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222205230.182419-1-mark@klomp.org/","msgid":"<20231222205230.182419-1-mark@klomp.org>","list_archive_url":null,"date":"2023-12-22T20:52:30","name":"[COMMITTED] robots.txt: Disallow a few more bugzilla queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222205230.182419-1-mark@klomp.org/mbox/"},{"id":182803,"url":"https://patchwork.plctlab.org/api/1.2/patches/182803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222230742.1807755-1-juzhe.zhong@rivai.ai/","msgid":"<20231222230742.1807755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-22T23:07:42","name":"[Committed] RISC-V: Make PHI initial value occupy live V_REG in dynamic LMUL cost model analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222230742.1807755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182938,"url":"https://patchwork.plctlab.org/api/1.2/patches/182938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-1-syq@gcc.gnu.org/","msgid":"<20231223084835.4135176-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:48:34","name":"[commit,v3,1/2] MIPS: Put the ret to the end of args of reconcat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-1-syq@gcc.gnu.org/mbox/"},{"id":182939,"url":"https://patchwork.plctlab.org/api/1.2/patches/182939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-2-syq@gcc.gnu.org/","msgid":"<20231223084835.4135176-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:48:35","name":"[commit,v3,2/2] MIPS: Don'\''t add nan2008 option for -mtune=native","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-2-syq@gcc.gnu.org/mbox/"},{"id":182940,"url":"https://patchwork.plctlab.org/api/1.2/patches/182940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223085858.4136369-1-syq@gcc.gnu.org/","msgid":"<20231223085858.4136369-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:58:58","name":"[v3] EXPR: Emit an truncate if 31+ bits polluted for SImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223085858.4136369-1-syq@gcc.gnu.org/mbox/"},{"id":182949,"url":"https://patchwork.plctlab.org/api/1.2/patches/182949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223110733.2565292-1-pan2.li@intel.com/","msgid":"<20231223110733.2565292-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-23T11:07:33","name":"[v1] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223110733.2565292-1-pan2.li@intel.com/mbox/"},{"id":182955,"url":"https://patchwork.plctlab.org/api/1.2/patches/182955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223123957.2652658-1-pan2.li@intel.com/","msgid":"<20231223123957.2652658-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-23T12:39:57","name":"[v2] RISC-V: XFail the signbit-5 run test for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223123957.2652658-1-pan2.li@intel.com/mbox/"},{"id":183001,"url":"https://patchwork.plctlab.org/api/1.2/patches/183001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223183516.3712049-1-quic_apinski@quicinc.com/","msgid":"<20231223183516.3712049-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-23T18:35:16","name":"reassoc vs uninitialized variable {PR112581]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223183516.3712049-1-quic_apinski@quicinc.com/mbox/"},{"id":183008,"url":"https://patchwork.plctlab.org/api/1.2/patches/183008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-2-kmatsui@gcc.gnu.org/","msgid":"<20231223213542.448971-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T21:20:26","name":"[1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-2-kmatsui@gcc.gnu.org/mbox/"},{"id":183009,"url":"https://patchwork.plctlab.org/api/1.2/patches/183009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-3-kmatsui@gcc.gnu.org/","msgid":"<20231223213542.448971-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T21:20:27","name":"[2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-3-kmatsui@gcc.gnu.org/mbox/"},{"id":183010,"url":"https://patchwork.plctlab.org/api/1.2/patches/183010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-2-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:42","name":"[v2,1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-2-kmatsui@gcc.gnu.org/mbox/"},{"id":183011,"url":"https://patchwork.plctlab.org/api/1.2/patches/183011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-3-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:43","name":"[v2,2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-3-kmatsui@gcc.gnu.org/mbox/"},{"id":183012,"url":"https://patchwork.plctlab.org/api/1.2/patches/183012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-4-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:44","name":"[v2,3/8] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-4-kmatsui@gcc.gnu.org/mbox/"},{"id":183013,"url":"https://patchwork.plctlab.org/api/1.2/patches/183013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-5-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:45","name":"[v2,4/8] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-5-kmatsui@gcc.gnu.org/mbox/"},{"id":183015,"url":"https://patchwork.plctlab.org/api/1.2/patches/183015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-6-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:46","name":"[v2,5/8] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-6-kmatsui@gcc.gnu.org/mbox/"},{"id":183014,"url":"https://patchwork.plctlab.org/api/1.2/patches/183014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-7-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:47","name":"[v2,6/8] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-7-kmatsui@gcc.gnu.org/mbox/"},{"id":183016,"url":"https://patchwork.plctlab.org/api/1.2/patches/183016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-8-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:48","name":"[v2,7/8] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-8-kmatsui@gcc.gnu.org/mbox/"},{"id":183017,"url":"https://patchwork.plctlab.org/api/1.2/patches/183017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-9-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:49","name":"[v2,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-9-kmatsui@gcc.gnu.org/mbox/"},{"id":183022,"url":"https://patchwork.plctlab.org/api/1.2/patches/183022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223230558.849031-1-kmatsui@gcc.gnu.org/","msgid":"<20231223230558.849031-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T23:05:58","name":"[v2] libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223230558.849031-1-kmatsui@gcc.gnu.org/mbox/"},{"id":183023,"url":"https://patchwork.plctlab.org/api/1.2/patches/183023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com/","msgid":"<013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-23T23:37:50","name":"[ARC] Table-driven ashlsi implementation for better code/rtx_costs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com/mbox/"},{"id":183026,"url":"https://patchwork.plctlab.org/api/1.2/patches/183026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224004716.6D2D62043F@pchp3.se.axis.com/","msgid":"<20231224004716.6D2D62043F@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-12-24T00:47:16","name":"[committed] CRIS: Fix PR middle-end/113109; \"throw\" failing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224004716.6D2D62043F@pchp3.se.axis.com/mbox/"},{"id":183051,"url":"https://patchwork.plctlab.org/api/1.2/patches/183051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224123608.6650-1-xry111@xry111.site/","msgid":"<20231224123608.6650-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-24T12:33:14","name":"[v2] LoongArch: Expand left rotate to right rotate with negated amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224123608.6650-1-xry111@xry111.site/mbox/"},{"id":183109,"url":"https://patchwork.plctlab.org/api/1.2/patches/183109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYiCY3BstREB_3Yy@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-24T19:11:31","name":"[committed] hppa: Fix pr110279-1.c on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYiCY3BstREB_3Yy@mx3210.localdomain/mbox/"},{"id":183110,"url":"https://patchwork.plctlab.org/api/1.2/patches/183110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18110-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-24T19:15:33","name":"[testsuite] : Add more pragma novector to new tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18110-tamar@arm.com/mbox/"},{"id":183117,"url":"https://patchwork.plctlab.org/api/1.2/patches/183117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225032023.3061334-1-liwei@loongson.cn/","msgid":"<20231225032023.3061334-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-25T03:20:23","name":"[v1] LoongArch: Fixed bug in *bstrins__for_ior_mask template.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225032023.3061334-1-liwei@loongson.cn/mbox/"},{"id":183118,"url":"https://patchwork.plctlab.org/api/1.2/patches/183118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225040034.251374-1-quic_apinski@quicinc.com/","msgid":"<20231225040034.251374-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-25T04:00:34","name":"[COMMITTED] match: Improve `(a != b) ? (a + b) : (2 * a)` pattern [PR19832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225040034.251374-1-quic_apinski@quicinc.com/mbox/"},{"id":183129,"url":"https://patchwork.plctlab.org/api/1.2/patches/183129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225061952.897770-1-juzhe.zhong@rivai.ai/","msgid":"<20231225061952.897770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-25T06:19:52","name":"[Committed] RISC-V: Add one more ASM check in PR113112-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225061952.897770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183130,"url":"https://patchwork.plctlab.org/api/1.2/patches/183130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225062939.767-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231225062939.767-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-25T06:29:39","name":"[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225062939.767-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183161,"url":"https://patchwork.plctlab.org/api/1.2/patches/183161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225084521.78251-1-kito.cheng@sifive.com/","msgid":"<20231225084521.78251-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-25T08:45:21","name":"RISC-V: Fix misaligned stack offset for interrupt function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225084521.78251-1-kito.cheng@sifive.com/mbox/"},{"id":183164,"url":"https://patchwork.plctlab.org/api/1.2/patches/183164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225091725.1574738-1-juzhe.zhong@rivai.ai/","msgid":"<20231225091725.1574738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-25T09:17:25","name":"RISC-V: Move RVV V_REGS liveness computation into analyze_loop_vinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225091725.1574738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183222,"url":"https://patchwork.plctlab.org/api/1.2/patches/183222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225161723.3197-1-xry111@xry111.site/","msgid":"<20231225161723.3197-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-25T16:14:02","name":"[v2] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225161723.3197-1-xry111@xry111.site/mbox/"},{"id":183271,"url":"https://patchwork.plctlab.org/api/1.2/patches/183271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-2-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:04","name":"[V3,1/3] RISC-V: Remove the Scalar Bitmanip and Crypto Built-In function testsuites","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-2-shihua@iscas.ac.cn/mbox/"},{"id":183272,"url":"https://patchwork.plctlab.org/api/1.2/patches/183272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-3-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:05","name":"[V3,2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-3-shihua@iscas.ac.cn/mbox/"},{"id":183273,"url":"https://patchwork.plctlab.org/api/1.2/patches/183273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-4-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:06","name":"[V3,3/3] RISC-V: Add C intrinsic for Scalar Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-4-shihua@iscas.ac.cn/mbox/"},{"id":183286,"url":"https://patchwork.plctlab.org/api/1.2/patches/183286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226084227.2466936-1-juzhe.zhong@rivai.ai/","msgid":"<20231226084227.2466936-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-26T08:42:27","name":"[Committed] RISC-V: Some minior tweak on dynamic LMUL cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226084227.2466936-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183288,"url":"https://patchwork.plctlab.org/api/1.2/patches/183288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226093445.1860961-1-pan2.li@intel.com/","msgid":"<20231226093445.1860961-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-26T09:34:45","name":"[v2] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226093445.1860961-1-pan2.li@intel.com/mbox/"},{"id":183306,"url":"https://patchwork.plctlab.org/api/1.2/patches/183306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226105349.2755983-1-juzhe.zhong@rivai.ai/","msgid":"<20231226105349.2755983-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-26T10:53:49","name":"[Committed] RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226105349.2755983-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183381,"url":"https://patchwork.plctlab.org/api/1.2/patches/183381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226223818.128525-1-xry111@xry111.site/","msgid":"<20231226223818.128525-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-26T22:37:20","name":"LoongArch: Fix infinite secondary reloading of FCCmode [PR113148]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226223818.128525-1-xry111@xry111.site/mbox/"},{"id":183390,"url":"https://patchwork.plctlab.org/api/1.2/patches/183390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227015222.3393770-1-juzhe.zhong@rivai.ai/","msgid":"<20231227015222.3393770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T01:52:22","name":"RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length is in range [0, 31]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227015222.3393770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183393,"url":"https://patchwork.plctlab.org/api/1.2/patches/183393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227023826.226460-1-juzhe.zhong@rivai.ai/","msgid":"<20231227023826.226460-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T02:38:26","name":"[V2] RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length is in range [0, 31]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227023826.226460-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183436,"url":"https://patchwork.plctlab.org/api/1.2/patches/183436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227081641.1031426-1-juzhe.zhong@rivai.ai/","msgid":"<20231227081641.1031426-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T08:16:41","name":"[Committed] RISC-V: Make known NITERS loop be aware of dynamic lmul cost model liveness information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227081641.1031426-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183438,"url":"https://patchwork.plctlab.org/api/1.2/patches/183438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-2-chenglulu@loongson.cn/","msgid":"<20231227084654.20614-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-27T08:46:53","name":"[1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-2-chenglulu@loongson.cn/mbox/"},{"id":183437,"url":"https://patchwork.plctlab.org/api/1.2/patches/183437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-3-chenglulu@loongson.cn/","msgid":"<20231227084654.20614-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-27T08:46:54","name":"[2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-3-chenglulu@loongson.cn/mbox/"},{"id":183456,"url":"https://patchwork.plctlab.org/api/1.2/patches/183456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240670EE838D161E6A3810BE89FA@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-27T10:40:57","name":"aarch64: add '\''AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240670EE838D161E6A3810BE89FA@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":183552,"url":"https://patchwork.plctlab.org/api/1.2/patches/183552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at/","msgid":"<8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-27T19:23:50","name":"[C] C: Fix type compatibility for structs with variable sized fields.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at/mbox/"},{"id":183601,"url":"https://patchwork.plctlab.org/api/1.2/patches/183601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228013332.1707891-1-juzhe.zhong@rivai.ai/","msgid":"<20231228013332.1707891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-28T01:33:32","name":"[Committed] RISC-V: Make dynamic LMUL cost model more accurate for conversion codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228013332.1707891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183660,"url":"https://patchwork.plctlab.org/api/1.2/patches/183660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228065906.3356210-1-liwei@loongson.cn/","msgid":"<20231228065906.3356210-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-28T06:59:06","name":"[v1] LoongArch: Merge constant vector permuatation implementations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228065906.3356210-1-liwei@loongson.cn/mbox/"},{"id":183699,"url":"https://patchwork.plctlab.org/api/1.2/patches/183699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZD_jCdu6jTbHVyh3=u_kt7cbzZgBT5Ejdr8E8nhoyLaQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-28T11:33:13","name":"[committed] i386: Cleanup ix86_expand_{unary|binary}_operator issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZD_jCdu6jTbHVyh3=u_kt7cbzZgBT5Ejdr8E8nhoyLaQ@mail.gmail.com/mbox/"},{"id":183714,"url":"https://patchwork.plctlab.org/api/1.2/patches/183714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228122646.2594388-1-liwei@loongson.cn/","msgid":"<20231228122646.2594388-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-28T12:26:46","name":"[v2] LoongArch: Merge constant vector permuatation implementations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228122646.2594388-1-liwei@loongson.cn/mbox/"},{"id":183736,"url":"https://patchwork.plctlab.org/api/1.2/patches/183736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228135631.3581609-1-syq@gcc.gnu.org/","msgid":"<20231228135631.3581609-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-28T13:56:31","name":"MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228135631.3581609-1-syq@gcc.gnu.org/mbox/"},{"id":183754,"url":"https://patchwork.plctlab.org/api/1.2/patches/183754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005901da399e$7d13b330$773b1990$@nextmovesoftware.com/","msgid":"<005901da399e$7d13b330$773b1990$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-28T14:59:40","name":"Improved RTL expansion of field assignments into promoted registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005901da399e$7d13b330$773b1990$@nextmovesoftware.com/mbox/"},{"id":183776,"url":"https://patchwork.plctlab.org/api/1.2/patches/183776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228161611.10555-1-xry111@xry111.site/","msgid":"<20231228161611.10555-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-28T16:11:51","name":"[v3] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228161611.10555-1-xry111@xry111.site/mbox/"},{"id":183816,"url":"https://patchwork.plctlab.org/api/1.2/patches/183816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229012102.2424314-1-juzhe.zhong@rivai.ai/","msgid":"<20231229012102.2424314-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-29T01:21:02","name":"RISC-V: Count pointer type SSA into RVV regs liveness for dynamic LMUL cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229012102.2424314-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183817,"url":"https://patchwork.plctlab.org/api/1.2/patches/183817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229013936.2576234-1-juzhe.zhong@rivai.ai/","msgid":"<20231229013936.2576234-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-29T01:39:36","name":"[Committed] RISC-V: Robostify testcase pr113112-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229013936.2576234-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183819,"url":"https://patchwork.plctlab.org/api/1.2/patches/183819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014515.40945-1-chenxiaolong@loongson.cn/","msgid":"<20231229014515.40945-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T01:45:15","name":"[v1] LoongArch: testsuite:Fix FAIL in lasx-xvstelm.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014515.40945-1-chenxiaolong@loongson.cn/mbox/"},{"id":183820,"url":"https://patchwork.plctlab.org/api/1.2/patches/183820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014634.926-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229014634.926-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T01:46:34","name":"[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014634.926-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183821,"url":"https://patchwork.plctlab.org/api/1.2/patches/183821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014923.979-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229014923.979-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T01:49:23","name":"[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014923.979-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183823,"url":"https://patchwork.plctlab.org/api/1.2/patches/183823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com/","msgid":"<291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:09:51","name":"?????????[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183824,"url":"https://patchwork.plctlab.org/api/1.2/patches/183824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com/","msgid":"<60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:11:10","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183826,"url":"https://patchwork.plctlab.org/api/1.2/patches/183826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021222.24002-1-chenxiaolong@loongson.cn/","msgid":"<20231229021222.24002-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:22","name":"[v1,1/8] LoongArch: testsuite:Add detection procedures supported by the target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021222.24002-1-chenxiaolong@loongson.cn/mbox/"},{"id":183827,"url":"https://patchwork.plctlab.org/api/1.2/patches/183827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021235.24065-1-chenxiaolong@loongson.cn/","msgid":"<20231229021235.24065-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:35","name":"[v1,2/8] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021235.24065-1-chenxiaolong@loongson.cn/mbox/"},{"id":183831,"url":"https://patchwork.plctlab.org/api/1.2/patches/183831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021246.24122-1-chenxiaolong@loongson.cn/","msgid":"<20231229021246.24122-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:46","name":"[v1,3/8] LoongArch: testsuite:Added test support for vect-{82, 83}.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021246.24122-1-chenxiaolong@loongson.cn/mbox/"},{"id":183832,"url":"https://patchwork.plctlab.org/api/1.2/patches/183832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021256.24210-1-chenxiaolong@loongson.cn/","msgid":"<20231229021256.24210-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:56","name":"[v1,4/8] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021256.24210-1-chenxiaolong@loongson.cn/mbox/"},{"id":183828,"url":"https://patchwork.plctlab.org/api/1.2/patches/183828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021308.24800-1-chenxiaolong@loongson.cn/","msgid":"<20231229021308.24800-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:08","name":"[v1,5/8] LoongArch: testsuite:Modify the test behavior in file pr60510.f.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021308.24800-1-chenxiaolong@loongson.cn/mbox/"},{"id":183830,"url":"https://patchwork.plctlab.org/api/1.2/patches/183830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021318.28603-1-chenxiaolong@loongson.cn/","msgid":"<20231229021318.28603-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:18","name":"[v1,6/8] LoongArch: testsuite:Added additional vectorization \"-mlasx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021318.28603-1-chenxiaolong@loongson.cn/mbox/"},{"id":183829,"url":"https://patchwork.plctlab.org/api/1.2/patches/183829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021327.30356-1-chenxiaolong@loongson.cn/","msgid":"<20231229021327.30356-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:27","name":"[v1,7/8] LoongArch: testsuite:Added additional vectorization \"-mlsx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021327.30356-1-chenxiaolong@loongson.cn/mbox/"},{"id":183833,"url":"https://patchwork.plctlab.org/api/1.2/patches/183833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021337.32306-1-chenxiaolong@loongson.cn/","msgid":"<20231229021337.32306-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:37","name":"[v1,8/8] LoongArch: testsuite:Modify the result check in the FMA file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021337.32306-1-chenxiaolong@loongson.cn/mbox/"},{"id":183834,"url":"https://patchwork.plctlab.org/api/1.2/patches/183834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com/","msgid":"<3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:17:24","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183835,"url":"https://patchwork.plctlab.org/api/1.2/patches/183835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b64626-1ddc-4d85-8ba9-2a5927045ba3.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T02:25:04","name":"Re???Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b64626-1ddc-4d85-8ba9-2a5927045ba3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183838,"url":"https://patchwork.plctlab.org/api/1.2/patches/183838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d093d0eb-0fa5-4567-88f8-c2d45e4b5241.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T02:30:57","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d093d0eb-0fa5-4567-88f8-c2d45e4b5241.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183845,"url":"https://patchwork.plctlab.org/api/1.2/patches/183845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040015.6275-1-chenxiaolong@loongson.cn/","msgid":"<20231229040015.6275-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T04:00:15","name":"[v1] LoongArch: testsuite:Add the \"-ffast-math\" compilation option for the file vect-fmin-3.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040015.6275-1-chenxiaolong@loongson.cn/mbox/"},{"id":183846,"url":"https://patchwork.plctlab.org/api/1.2/patches/183846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040517.1100-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229040517.1100-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:05:17","name":"[v4] RISC-V: Refactor riscv-vector-builtins-bases.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040517.1100-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183847,"url":"https://patchwork.plctlab.org/api/1.2/patches/183847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229041355.1313-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229041355.1313-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:13:55","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229041355.1313-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183848,"url":"https://patchwork.plctlab.org/api/1.2/patches/183848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042114.1419-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229042114.1419-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:21:14","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042114.1419-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183849,"url":"https://patchwork.plctlab.org/api/1.2/patches/183849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042158.1472-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229042158.1472-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:21:58","name":"[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042158.1472-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183850,"url":"https://patchwork.plctlab.org/api/1.2/patches/183850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229044849.2340165-1-quic_apinski@quicinc.com/","msgid":"<20231229044849.2340165-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-29T04:48:49","name":"Fix gen-vect-26.c testcase after loops with multiple exits [PR113167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229044849.2340165-1-quic_apinski@quicinc.com/mbox/"},{"id":183861,"url":"https://patchwork.plctlab.org/api/1.2/patches/183861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074417.19547-1-chenxiaolong@loongson.cn/","msgid":"<20231229074417.19547-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T07:44:17","name":"[v1] LoongArch: testsuite:Add loongarch to gcc.dg/vect/slp-21.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074417.19547-1-chenxiaolong@loongson.cn/mbox/"},{"id":183865,"url":"https://patchwork.plctlab.org/api/1.2/patches/183865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074806.20549-1-chenxiaolong@loongson.cn/","msgid":"<20231229074806.20549-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T07:48:06","name":"[v1] LoongArch: testsuite:Add loongarch to gcc.dg/vect/slp-26.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074806.20549-1-chenxiaolong@loongson.cn/mbox/"},{"id":183876,"url":"https://patchwork.plctlab.org/api/1.2/patches/183876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZoDVk7zoznZbtrwuog-VGHfvk-arfVse1MRsWgFTkVCQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T08:55:39","name":"[committed] i386: Fix TARGET_USE_VECTOR_FP_CONVERTS SF->DF float_extend splitter [PR113133]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZoDVk7zoznZbtrwuog-VGHfvk-arfVse1MRsWgFTkVCQ@mail.gmail.com/mbox/"},{"id":183889,"url":"https://patchwork.plctlab.org/api/1.2/patches/183889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A0BE148A219601098F3CF79DA@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T10:28:38","name":"Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A0BE148A219601098F3CF79DA@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":183891,"url":"https://patchwork.plctlab.org/api/1.2/patches/183891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-1-syq@gcc.gnu.org/","msgid":"<20231229110004.2724974-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T11:00:03","name":"[1/2] MIPS: add pattern insqisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-1-syq@gcc.gnu.org/mbox/"},{"id":183892,"url":"https://patchwork.plctlab.org/api/1.2/patches/183892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-2-syq@gcc.gnu.org/","msgid":"<20231229110004.2724974-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T11:00:04","name":"[2/2] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-2-syq@gcc.gnu.org/mbox/"},{"id":183899,"url":"https://patchwork.plctlab.org/api/1.2/patches/183899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5d29a764f3cc8357e0dd344b96b2861335b9588.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-12-29T12:11:36","name":"Pushed: [PATCH v4] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5d29a764f3cc8357e0dd344b96b2861335b9588.camel@xry111.site/mbox/"},{"id":183900,"url":"https://patchwork.plctlab.org/api/1.2/patches/183900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229121301.47289-1-xry111@xry111.site/","msgid":"<20231229121301.47289-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-29T12:12:38","name":"[pushed] LoongArch: Fix the format of bstrins__for_ior_mask condition (NFC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229121301.47289-1-xry111@xry111.site/mbox/"},{"id":183915,"url":"https://patchwork.plctlab.org/api/1.2/patches/183915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18115-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T14:41:08","name":"AArch64 Update costing for vector conversions [PR110625]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18115-tamar@arm.com/mbox/"},{"id":183916,"url":"https://patchwork.plctlab.org/api/1.2/patches/183916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17512-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T14:42:52","name":"[20/21] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17512-tamar@arm.com/mbox/"},{"id":183922,"url":"https://patchwork.plctlab.org/api/1.2/patches/183922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-1-syq@gcc.gnu.org/","msgid":"<20231229161754.2802162-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T16:17:53","name":"[v2,1/2] MIPS: add pattern insqisi_extended and inshisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-1-syq@gcc.gnu.org/mbox/"},{"id":183923,"url":"https://patchwork.plctlab.org/api/1.2/patches/183923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-2-syq@gcc.gnu.org/","msgid":"<20231229161754.2802162-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T16:17:54","name":"[v2,2/2] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-2-syq@gcc.gnu.org/mbox/"},{"id":183927,"url":"https://patchwork.plctlab.org/api/1.2/patches/183927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-1-syq@gcc.gnu.org/","msgid":"<20231229174649.2811234-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T17:46:48","name":"[1/2] RTX_COST: Count instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-1-syq@gcc.gnu.org/mbox/"},{"id":183928,"url":"https://patchwork.plctlab.org/api/1.2/patches/183928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-2-syq@gcc.gnu.org/","msgid":"<20231229174649.2811234-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T17:46:49","name":"[2/2] MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-2-syq@gcc.gnu.org/mbox/"},{"id":183974,"url":"https://patchwork.plctlab.org/api/1.2/patches/183974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk/","msgid":"<91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk>","list_archive_url":null,"date":"2023-12-30T00:29:43","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk/mbox/"},{"id":183976,"url":"https://patchwork.plctlab.org/api/1.2/patches/183976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292020210.28105@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-12-30T01:23:31","name":"libstdc++ testsuite/20_util/hash/quality.cc: Increase timeout 3x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292020210.28105@arjuna.pair.com/mbox/"},{"id":183977,"url":"https://patchwork.plctlab.org/api/1.2/patches/183977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292023350.28105@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-12-30T01:41:26","name":"libstdc++ testsuite/std/ranges/iota/max_size_type.cc: Reduce /10 for simulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292023350.28105@arjuna.pair.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/mbox/"},{"id":56,"url":"https://patchwork.plctlab.org/api/1.2/bundles/56/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2024-01","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":184129,"url":"https://patchwork.plctlab.org/api/1.2/patches/184129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-1-j@lambda.is/","msgid":"<20231231155127.506883-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-31T15:51:26","name":"[v9,1/2] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-1-j@lambda.is/mbox/"},{"id":184128,"url":"https://patchwork.plctlab.org/api/1.2/patches/184128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-2-j@lambda.is/","msgid":"<20231231155127.506883-2-j@lambda.is>","list_archive_url":null,"date":"2023-12-31T15:51:27","name":"[v9,2/2] Add gcov MC/DC tests for GDC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-2-j@lambda.is/mbox/"},{"id":184130,"url":"https://patchwork.plctlab.org/api/1.2/patches/184130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com/","msgid":"<04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-31T16:23:18","name":"[middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com/mbox/"},{"id":184142,"url":"https://patchwork.plctlab.org/api/1.2/patches/184142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231191738.126529-1-xry111@xry111.site/","msgid":"<20231231191738.126529-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-31T19:15:10","name":"LoongArch: Provide fmin/fmax RTL pattern for vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231191738.126529-1-xry111@xry111.site/mbox/"},{"id":184154,"url":"https://patchwork.plctlab.org/api/1.2/patches/184154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101040329.3895909-1-quic_apinski@quicinc.com/","msgid":"<20240101040329.3895909-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-01T04:03:29","name":"Match: Improve inverted_equal_p for bool and `^` and `==` [PR113186]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101040329.3895909-1-quic_apinski@quicinc.com/mbox/"},{"id":184161,"url":"https://patchwork.plctlab.org/api/1.2/patches/184161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-1-bugaevc@gmail.com/","msgid":"<20240101115356.614446-1-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:54","name":"[gcc,1/3] Move GNU/Hurd startfile spec from config/i386/gnu.h to config/gnu.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-1-bugaevc@gmail.com/mbox/"},{"id":184160,"url":"https://patchwork.plctlab.org/api/1.2/patches/184160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-2-bugaevc@gmail.com/","msgid":"<20240101115356.614446-2-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:55","name":"[gcc,2/3] aarch64: Add support for aarch64-gnu (GNU/Hurd on AArch64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-2-bugaevc@gmail.com/mbox/"},{"id":184158,"url":"https://patchwork.plctlab.org/api/1.2/patches/184158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-3-bugaevc@gmail.com/","msgid":"<20240101115356.614446-3-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:56","name":"[gcc,3/3] libgcc: Add basic support for aarch64-gnu (GNU/Hurd on AArch64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-3-bugaevc@gmail.com/mbox/"},{"id":184175,"url":"https://patchwork.plctlab.org/api/1.2/patches/184175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101164807.3812140-1-syq@gcc.gnu.org/","msgid":"<20240101164807.3812140-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-01T16:48:07","name":"config-ml.in: Fix multi-os-dir search","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101164807.3812140-1-syq@gcc.gnu.org/mbox/"},{"id":184182,"url":"https://patchwork.plctlab.org/api/1.2/patches/184182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com/","msgid":"<49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com>","list_archive_url":null,"date":"2024-01-01T21:04:42","name":"[RFA,V3] new pass for sign/zero extension elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com/mbox/"},{"id":184189,"url":"https://patchwork.plctlab.org/api/1.2/patches/184189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102012032.21154-1-wangfeng@eswincomputing.com/","msgid":"<20240102012032.21154-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T01:20:32","name":"[committed] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102012032.21154-1-wangfeng@eswincomputing.com/mbox/"},{"id":184193,"url":"https://patchwork.plctlab.org/api/1.2/patches/184193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102015204.2146749-1-juzhe.zhong@rivai.ai/","msgid":"<20240102015204.2146749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T01:52:04","name":"[Committed] RISC-V: Declare STMT_VINFO_TYPE (...) as local variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102015204.2146749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184199,"url":"https://patchwork.plctlab.org/api/1.2/patches/184199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102022513.29490-1-wangfeng@eswincomputing.com/","msgid":"<20240102022513.29490-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T02:25:13","name":"[committed] RISC-V: Modify copyright year of vector-crypto.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102022513.29490-1-wangfeng@eswincomputing.com/mbox/"},{"id":184206,"url":"https://patchwork.plctlab.org/api/1.2/patches/184206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com/","msgid":"<3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T03:03:11","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184207,"url":"https://patchwork.plctlab.org/api/1.2/patches/184207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2401012219490.56278@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2024-01-02T03:22:53","name":"testsuite: Reduce gcc.dg/torture/inline-mem-cpy-1.c by 11 for simulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2401012219490.56278@arjuna.pair.com/mbox/"},{"id":184208,"url":"https://patchwork.plctlab.org/api/1.2/patches/184208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102033743.2158114-1-juzhe.zhong@rivai.ai/","msgid":"<20240102033743.2158114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T03:37:43","name":"RISC-V: Make liveness be aware of rgroup number of LENS[dynamic LMUL]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102033743.2158114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184209,"url":"https://patchwork.plctlab.org/api/1.2/patches/184209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com/","msgid":"<6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T03:40:01","name":"Re???Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184268,"url":"https://patchwork.plctlab.org/api/1.2/patches/184268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102072655.1533350-1-juzhe.zhong@rivai.ai/","msgid":"<20240102072655.1533350-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T07:26:55","name":"[Committed] RISC-V: Add simplification of dummy len and dummy mask COND_LEN_xxx pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102072655.1533350-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184274,"url":"https://patchwork.plctlab.org/api/1.2/patches/184274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-1-wangfeng@eswincomputing.com/","msgid":"<20240102074706.35947-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T07:47:05","name":"[v5,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-1-wangfeng@eswincomputing.com/mbox/"},{"id":184275,"url":"https://patchwork.plctlab.org/api/1.2/patches/184275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-2-wangfeng@eswincomputing.com/","msgid":"<20240102074706.35947-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T07:47:06","name":"[v5,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-2-wangfeng@eswincomputing.com/mbox/"},{"id":184289,"url":"https://patchwork.plctlab.org/api/1.2/patches/184289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102091814.8445-1-wangfeng@eswincomputing.com/","msgid":"<20240102091814.8445-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T09:18:14","name":"[v6,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102091814.8445-1-wangfeng@eswincomputing.com/mbox/"},{"id":184291,"url":"https://patchwork.plctlab.org/api/1.2/patches/184291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-2-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:34","name":"[v3,01/12,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-2-Ezra.Sitorus@arm.com/mbox/"},{"id":184298,"url":"https://patchwork.plctlab.org/api/1.2/patches/184298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-3-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:35","name":"[v3,02/12,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-3-Ezra.Sitorus@arm.com/mbox/"},{"id":184292,"url":"https://patchwork.plctlab.org/api/1.2/patches/184292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-4-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:36","name":"[v3,03/12,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-4-Ezra.Sitorus@arm.com/mbox/"},{"id":184296,"url":"https://patchwork.plctlab.org/api/1.2/patches/184296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-5-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-5-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:37","name":"[v3,04/12,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-5-Ezra.Sitorus@arm.com/mbox/"},{"id":184293,"url":"https://patchwork.plctlab.org/api/1.2/patches/184293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-6-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-6-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:38","name":"[v3,05/12,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-6-Ezra.Sitorus@arm.com/mbox/"},{"id":184300,"url":"https://patchwork.plctlab.org/api/1.2/patches/184300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-7-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-7-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:39","name":"[v3,06/12,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-7-Ezra.Sitorus@arm.com/mbox/"},{"id":184297,"url":"https://patchwork.plctlab.org/api/1.2/patches/184297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-8-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-8-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:40","name":"[v3,07/12,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-8-Ezra.Sitorus@arm.com/mbox/"},{"id":184301,"url":"https://patchwork.plctlab.org/api/1.2/patches/184301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-9-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-9-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:41","name":"[v3,08/12,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-9-Ezra.Sitorus@arm.com/mbox/"},{"id":184299,"url":"https://patchwork.plctlab.org/api/1.2/patches/184299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-10-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-10-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:42","name":"[v3,09/12,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-10-Ezra.Sitorus@arm.com/mbox/"},{"id":184294,"url":"https://patchwork.plctlab.org/api/1.2/patches/184294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-11-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-11-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:43","name":"[v3,10/12,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-11-Ezra.Sitorus@arm.com/mbox/"},{"id":184302,"url":"https://patchwork.plctlab.org/api/1.2/patches/184302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-12-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-12-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:44","name":"[v3,11/12,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-12-Ezra.Sitorus@arm.com/mbox/"},{"id":184303,"url":"https://patchwork.plctlab.org/api/1.2/patches/184303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-13-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-13-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:45","name":"[v3,12/12,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-13-Ezra.Sitorus@arm.com/mbox/"},{"id":184305,"url":"https://patchwork.plctlab.org/api/1.2/patches/184305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8655609-aa36-4d1d-845e-da3f7fa3be89.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-02T09:48:38","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8655609-aa36-4d1d-845e-da3f7fa3be89.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184348,"url":"https://patchwork.plctlab.org/api/1.2/patches/184348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102115538.1471137-1-pan2.li@intel.com/","msgid":"<20240102115538.1471137-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-02T11:55:38","name":"[v3] RISC-V: Bugfix for doesn'\''t honor no-signed-zeros option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102115538.1471137-1-pan2.li@intel.com/mbox/"},{"id":184319,"url":"https://patchwork.plctlab.org/api/1.2/patches/184319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102123943.1525-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240102123943.1525-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T12:39:43","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102123943.1525-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184357,"url":"https://patchwork.plctlab.org/api/1.2/patches/184357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmil4bj0t1.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2024-01-02T13:56:58","name":"libsanitizer: Enable LSan and TSan for riscv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmil4bj0t1.fsf@suse.de/mbox/"},{"id":184392,"url":"https://patchwork.plctlab.org/api/1.2/patches/184392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw/","msgid":"<1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw>","list_archive_url":null,"date":"2024-01-02T15:21:21","name":"[OpenACC,2.7] Implement reductions for arrays and structs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw/mbox/"},{"id":184431,"url":"https://patchwork.plctlab.org/api/1.2/patches/184431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102174826.1868173-1-ppalka@redhat.com/","msgid":"<20240102174826.1868173-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-02T17:48:26","name":"libstdc++: testsuite: reduce max_size_type.cc exec time [PR113175]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102174826.1868173-1-ppalka@redhat.com/mbox/"},{"id":184440,"url":"https://patchwork.plctlab.org/api/1.2/patches/184440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-2-iii@linux.ibm.com/","msgid":"<20240102194511.3171559-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-02T19:41:37","name":"[v2,1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-2-iii@linux.ibm.com/mbox/"},{"id":184439,"url":"https://patchwork.plctlab.org/api/1.2/patches/184439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-3-iii@linux.ibm.com/","msgid":"<20240102194511.3171559-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-02T19:41:38","name":"[v2,2/2] asan: Align .LASANPC on function boundary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-3-iii@linux.ibm.com/mbox/"},{"id":184443,"url":"https://patchwork.plctlab.org/api/1.2/patches/184443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102201720.1526-1-trdthg47@gmail.com/","msgid":"<20240102201720.1526-1-trdthg47@gmail.com>","list_archive_url":null,"date":"2024-01-02T20:17:20","name":"RISC-V: Implement ZACAS extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102201720.1526-1-trdthg47@gmail.com/mbox/"},{"id":184534,"url":"https://patchwork.plctlab.org/api/1.2/patches/184534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659490fd.170a0220.1ce2e.503a@mx.google.com/","msgid":"<659490fd.170a0220.1ce2e.503a@mx.google.com>","list_archive_url":null,"date":"2024-01-02T22:40:55","name":"c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659490fd.170a0220.1ce2e.503a@mx.google.com/mbox/"},{"id":184535,"url":"https://patchwork.plctlab.org/api/1.2/patches/184535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659491a5.170a0220.6af69.6797@mx.google.com/","msgid":"<659491a5.170a0220.6af69.6797@mx.google.com>","list_archive_url":null,"date":"2024-01-02T22:43:44","name":"c++/modules: Fix ICE when writing nontrivial variable initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659491a5.170a0220.6af69.6797@mx.google.com/mbox/"},{"id":184540,"url":"https://patchwork.plctlab.org/api/1.2/patches/184540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102233830.339489-1-dmalcolm@redhat.com/","msgid":"<20240102233830.339489-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-02T23:38:30","name":"[1/4;,v4] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102233830.339489-1-dmalcolm@redhat.com/mbox/"},{"id":184548,"url":"https://patchwork.plctlab.org/api/1.2/patches/184548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103010109.21997-1-wangfeng@eswincomputing.com/","msgid":"<20240103010109.21997-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-03T01:01:09","name":"[v6,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103010109.21997-1-wangfeng@eswincomputing.com/mbox/"},{"id":184554,"url":"https://patchwork.plctlab.org/api/1.2/patches/184554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103012828.2446443-3-victor.donascimento@arm.com/","msgid":"<20240103012828.2446443-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2024-01-03T01:28:19","name":"[v3,2/3] libatomic: Enable LSE128 128-bit atomics for armv9.4-a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103012828.2446443-3-victor.donascimento@arm.com/mbox/"},{"id":184628,"url":"https://patchwork.plctlab.org/api/1.2/patches/184628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103052145.28042-1-wangfeng@eswincomputing.com/","msgid":"<20240103052145.28042-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-03T05:21:45","name":"[v7,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103052145.28042-1-wangfeng@eswincomputing.com/mbox/"},{"id":184630,"url":"https://patchwork.plctlab.org/api/1.2/patches/184630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103061535.1737-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240103061535.1737-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-03T06:15:35","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103061535.1737-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184689,"url":"https://patchwork.plctlab.org/api/1.2/patches/184689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65953088.050a0220.d187.0c52@mx.google.com/","msgid":"<65953088.050a0220.d187.0c52@mx.google.com>","list_archive_url":null,"date":"2024-01-03T10:01:38","name":"c++: Export usings referring to global module fragment [PR109679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65953088.050a0220.d187.0c52@mx.google.com/mbox/"},{"id":184691,"url":"https://patchwork.plctlab.org/api/1.2/patches/184691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103100652.3891154-1-juzhe.zhong@rivai.ai/","msgid":"<20240103100652.3891154-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T10:06:52","name":"RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103100652.3891154-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184702,"url":"https://patchwork.plctlab.org/api/1.2/patches/184702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103105058.3068052-1-juzhe.zhong@rivai.ai/","msgid":"<20240103105058.3068052-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T10:50:58","name":"[V2] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103105058.3068052-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184713,"url":"https://patchwork.plctlab.org/api/1.2/patches/184713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZVH3QTlOXjznnGf@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-03T11:41:17","name":"[committed] Small tweaks for update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZVH3QTlOXjznnGf@tucnak/mbox/"},{"id":184733,"url":"https://patchwork.plctlab.org/api/1.2/patches/184733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65955649.170a0220.e1f37.25c3@mx.google.com/","msgid":"<65955649.170a0220.e1f37.25c3@mx.google.com>","list_archive_url":null,"date":"2024-01-03T12:42:43","name":"[v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65955649.170a0220.e1f37.25c3@mx.google.com/mbox/"},{"id":184774,"url":"https://patchwork.plctlab.org/api/1.2/patches/184774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com/","msgid":"<79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T14:47:54","name":"[committed] Re: [PATCH] openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com/mbox/"},{"id":184784,"url":"https://patchwork.plctlab.org/api/1.2/patches/184784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT2zjNN6Pf88rkKw5c0P0k4McCeYpkKO9-VCE1bvB4tmAg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-03T15:42:58","name":"Ping: [PATCH] enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contains padding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT2zjNN6Pf88rkKw5c0P0k4McCeYpkKO9-VCE1bvB4tmAg@mail.gmail.com/mbox/"},{"id":184786,"url":"https://patchwork.plctlab.org/api/1.2/patches/184786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com/","msgid":"<598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T15:54:13","name":"[committed] Re: [PATCH] openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com/mbox/"},{"id":184817,"url":"https://patchwork.plctlab.org/api/1.2/patches/184817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com/","msgid":"<7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T18:31:25","name":"libgomp.texi: Document omp_display_env","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com/mbox/"},{"id":184822,"url":"https://patchwork.plctlab.org/api/1.2/patches/184822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103184906.2568371-1-ppalka@redhat.com/","msgid":"<20240103184906.2568371-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-03T18:49:06","name":"c++: explicit inst w/ many constrained partial specs [PR104634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103184906.2568371-1-ppalka@redhat.com/mbox/"},{"id":184826,"url":"https://patchwork.plctlab.org/api/1.2/patches/184826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103200628.2795374-1-ppalka@redhat.com/","msgid":"<20240103200628.2795374-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-03T20:06:28","name":"[2/1] c++: access of class-scope partial tmpl spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103200628.2795374-1-ppalka@redhat.com/mbox/"},{"id":184857,"url":"https://patchwork.plctlab.org/api/1.2/patches/184857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103223843.2236692-1-juzhe.zhong@rivai.ai/","msgid":"<20240103223843.2236692-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T22:38:43","name":"[Committed,V3] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103223843.2236692-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184858,"url":"https://patchwork.plctlab.org/api/1.2/patches/184858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103224331.2237500-1-juzhe.zhong@rivai.ai/","msgid":"<20240103224331.2237500-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T22:43:31","name":"[Committed] RISC-V: Fix indent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103224331.2237500-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184890,"url":"https://patchwork.plctlab.org/api/1.2/patches/184890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-1-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:16","name":"[committed] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-1-syq@gcc.gnu.org/mbox/"},{"id":184891,"url":"https://patchwork.plctlab.org/api/1.2/patches/184891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-2-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:17","name":"[committed] MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-2-syq@gcc.gnu.org/mbox/"},{"id":184892,"url":"https://patchwork.plctlab.org/api/1.2/patches/184892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-3-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-3-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:18","name":"[committed] MIPS: Add pattern insqisi_extended and inshisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-3-syq@gcc.gnu.org/mbox/"},{"id":184893,"url":"https://patchwork.plctlab.org/api/1.2/patches/184893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-4-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-4-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:19","name":"[committed] MIPS/testsuite: Include stdio.h in mipscop tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-4-syq@gcc.gnu.org/mbox/"},{"id":184895,"url":"https://patchwork.plctlab.org/api/1.2/patches/184895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104022912.1896-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104022912.1896-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T02:29:12","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104022912.1896-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184897,"url":"https://patchwork.plctlab.org/api/1.2/patches/184897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023407.1949-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104023407.1949-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T02:34:07","name":"[v4] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023407.1949-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184898,"url":"https://patchwork.plctlab.org/api/1.2/patches/184898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023753.22590-1-chenglulu@loongson.cn/","msgid":"<20240104023753.22590-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-04T02:37:53","name":"LoongArch: Fixed the problem of incorrect judgment of the immediate field of the [x]vld/[x]vst instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023753.22590-1-chenglulu@loongson.cn/mbox/"},{"id":184908,"url":"https://patchwork.plctlab.org/api/1.2/patches/184908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104044835.1088123-1-sandra@codesourcery.com/","msgid":"<20240104044835.1088123-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-04T04:48:35","name":"[committed,obvious] OpenMP: trivial cleanups to omp-general.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104044835.1088123-1-sandra@codesourcery.com/mbox/"},{"id":184916,"url":"https://patchwork.plctlab.org/api/1.2/patches/184916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104065233.3958-1-juzhe.zhong@rivai.ai/","msgid":"<20240104065233.3958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T06:52:33","name":"[Committed] RISC-V: Refine LMUL computation for MASK_LEN_LOAD/MASK_LEN_STORE IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104065233.3958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184935,"url":"https://patchwork.plctlab.org/api/1.2/patches/184935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104082726.16368-1-juzhe.zhong@rivai.ai/","msgid":"<20240104082726.16368-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T08:27:26","name":"RISC-V: Teach liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104082726.16368-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184944,"url":"https://patchwork.plctlab.org/api/1.2/patches/184944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104084606.220114-1-juzhe.zhong@rivai.ai/","msgid":"<20240104084606.220114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T08:46:06","name":"[Committed,V2] RISC-V: Make liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104084606.220114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184945,"url":"https://patchwork.plctlab.org/api/1.2/patches/184945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZw8ospwLFcL1GR@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T08:48:50","name":"lower-bitint: Punt .*_OVERFLOW optimization if cast from IMAGPART_EXPR appears before REALPART_EXPR [PR113119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZw8ospwLFcL1GR@tucnak/mbox/"},{"id":184947,"url":"https://patchwork.plctlab.org/api/1.2/patches/184947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZzov90j4WZ/03I@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:00:18","name":"lower-bitint: Fix up lowering of huge _BitInt 0 PHI args [PR113120]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZzov90j4WZ/03I@tucnak/mbox/"},{"id":184955,"url":"https://patchwork.plctlab.org/api/1.2/patches/184955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ2PI1JG//L1n0m@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:11:24","name":"Improve __builtin_popcount* (x) == 1 generation if x is known != 0 [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ2PI1JG//L1n0m@tucnak/mbox/"},{"id":184957,"url":"https://patchwork.plctlab.org/api/1.2/patches/184957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092425.1844-2-mikpelinux@gmail.com/","msgid":"<20240104092425.1844-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2024-01-04T09:23:53","name":"Avoid ICE with m68k-elf -malign-int and libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092425.1844-2-mikpelinux@gmail.com/mbox/"},{"id":184959,"url":"https://patchwork.plctlab.org/api/1.2/patches/184959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092833.1116-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104092833.1116-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T09:28:33","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092833.1116-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184962,"url":"https://patchwork.plctlab.org/api/1.2/patches/184962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ7vGAu19HuMlge@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:34:52","name":"scev: Avoid ICE on results used in abnormal PHI args [PR113201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ7vGAu19HuMlge@tucnak/mbox/"},{"id":184983,"url":"https://patchwork.plctlab.org/api/1.2/patches/184983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104122915.3580970-1-juzhe.zhong@rivai.ai/","msgid":"<20240104122915.3580970-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T12:29:15","name":"[Committed,V3] RISC-V: Make liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104122915.3580970-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185013,"url":"https://patchwork.plctlab.org/api/1.2/patches/185013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104140724.3053486-1-jwakely@redhat.com/","msgid":"<20240104140724.3053486-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:06:49","name":"contrib: Add script name to usage error in gen_wcwidth.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104140724.3053486-1-jwakely@redhat.com/mbox/"},{"id":185021,"url":"https://patchwork.plctlab.org/api/1.2/patches/185021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142701.427320-1-dmalcolm@redhat.com/","msgid":"<20240104142701.427320-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:01","name":"[pushed] analyzer: handle arrays of unknown size in access diagrams [PR113222]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142701.427320-1-dmalcolm@redhat.com/mbox/"},{"id":185022,"url":"https://patchwork.plctlab.org/api/1.2/patches/185022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142716.427365-1-dmalcolm@redhat.com/","msgid":"<20240104142716.427365-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:16","name":"[pushed] analyzer: fix deref-before-check false positives due to inlining [PR112790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142716.427365-1-dmalcolm@redhat.com/mbox/"},{"id":185023,"url":"https://patchwork.plctlab.org/api/1.2/patches/185023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142728.427423-1-dmalcolm@redhat.com/","msgid":"<20240104142728.427423-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:28","name":"[pushed] analyzer: add sarif properties for checker events","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142728.427423-1-dmalcolm@redhat.com/mbox/"},{"id":185030,"url":"https://patchwork.plctlab.org/api/1.2/patches/185030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZbHOli2kMYK3n6r@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2024-01-04T14:56:58","name":"Add -falign-all-functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZbHOli2kMYK3n6r@kam.mff.cuni.cz/mbox/"},{"id":185035,"url":"https://patchwork.plctlab.org/api/1.2/patches/185035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104150405.3055716-1-jwakely@redhat.com/","msgid":"<20240104150405.3055716-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-04T15:02:51","name":"contrib: Remove C-style comments from Python files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104150405.3055716-1-jwakely@redhat.com/mbox/"},{"id":185052,"url":"https://patchwork.plctlab.org/api/1.2/patches/185052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104153735.2356348-2-arthur.cohen@embecosm.com/","msgid":"<20240104153735.2356348-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-04T15:33:53","name":"[COMMITTED] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104153735.2356348-2-arthur.cohen@embecosm.com/mbox/"},{"id":185064,"url":"https://patchwork.plctlab.org/api/1.2/patches/185064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de/","msgid":"<83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de>","list_archive_url":null,"date":"2024-01-04T16:28:02","name":"[avr,applied] PR target/112952 Fix attribute \"io\" et al. handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de/mbox/"},{"id":185122,"url":"https://patchwork.plctlab.org/api/1.2/patches/185122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-1-arsen@aarsen.me/","msgid":"<20240104185321.3276425-1-arsen@aarsen.me>","list_archive_url":null,"date":"2024-01-04T18:52:58","name":"[pushed,1/2] libstdc++: rename _A badname in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-1-arsen@aarsen.me/mbox/"},{"id":185121,"url":"https://patchwork.plctlab.org/api/1.2/patches/185121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-2-arsen@aarsen.me/","msgid":"<20240104185321.3276425-2-arsen@aarsen.me>","list_archive_url":null,"date":"2024-01-04T18:52:59","name":"[pushed,2/2] libstdc++: fix typo in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-2-arsen@aarsen.me/mbox/"},{"id":185124,"url":"https://patchwork.plctlab.org/api/1.2/patches/185124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea/","msgid":"<2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea>","list_archive_url":null,"date":"2024-01-04T19:16:27","name":":Re: [PATCH v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea/mbox/"},{"id":185161,"url":"https://patchwork.plctlab.org/api/1.2/patches/185161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8ae8f6f-97c3-4c93-b253-db8d653b560e@hazardy.de/","msgid":"","list_archive_url":null,"date":"2024-01-04T22:33:28","name":"[5/4] libbacktrace: improve getting debug information for loaded dlls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8ae8f6f-97c3-4c93-b253-db8d653b560e@hazardy.de/mbox/"},{"id":185175,"url":"https://patchwork.plctlab.org/api/1.2/patches/185175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105004732.1804-1-wangfeng@eswincomputing.com/","msgid":"<20240105004732.1804-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T00:47:32","name":"[committed] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105004732.1804-1-wangfeng@eswincomputing.com/mbox/"},{"id":185176,"url":"https://patchwork.plctlab.org/api/1.2/patches/185176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105005044.4712-1-wangfeng@eswincomputing.com/","msgid":"<20240105005044.4712-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T00:50:44","name":"[committed] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105005044.4712-1-wangfeng@eswincomputing.com/mbox/"},{"id":185186,"url":"https://patchwork.plctlab.org/api/1.2/patches/185186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105014325.1490280-1-lipeng.zhu@intel.com/","msgid":"<20240105014325.1490280-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2024-01-05T01:43:26","name":"[v2] libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105014325.1490280-1-lipeng.zhu@intel.com/mbox/"},{"id":185191,"url":"https://patchwork.plctlab.org/api/1.2/patches/185191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105015335.2892020-1-juzhe.zhong@rivai.ai/","msgid":"<20240105015335.2892020-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-05T01:53:35","name":"RISC-V: Teach liveness computation loop invariant shift amount[Dynamic LMUL]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105015335.2892020-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185207,"url":"https://patchwork.plctlab.org/api/1.2/patches/185207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-2-chenglulu@loongson.cn/","msgid":"<20240105034021.30177-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:40:20","name":"[v2,1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-2-chenglulu@loongson.cn/mbox/"},{"id":185206,"url":"https://patchwork.plctlab.org/api/1.2/patches/185206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-3-chenglulu@loongson.cn/","msgid":"<20240105034021.30177-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:40:21","name":"[v2,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-3-chenglulu@loongson.cn/mbox/"},{"id":185210,"url":"https://patchwork.plctlab.org/api/1.2/patches/185210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-2-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:23","name":"[v2,1/7] LoongArch: testsuite:Added support for vector object detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-2-chenxiaolong@loongson.cn/mbox/"},{"id":185208,"url":"https://patchwork.plctlab.org/api/1.2/patches/185208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-3-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:24","name":"[v2,2/7] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-3-chenxiaolong@loongson.cn/mbox/"},{"id":185211,"url":"https://patchwork.plctlab.org/api/1.2/patches/185211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-4-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:25","name":"[v2,3/7] LoongArch: testsuite:Added detection support for LoongArch architecture in vect-{82, 83}.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-4-chenxiaolong@loongson.cn/mbox/"},{"id":185212,"url":"https://patchwork.plctlab.org/api/1.2/patches/185212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-5-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:26","name":"[v2,4/7] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-5-chenxiaolong@loongson.cn/mbox/"},{"id":185213,"url":"https://patchwork.plctlab.org/api/1.2/patches/185213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-6-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:27","name":"[v2,5/7] LoongArch: testsuite:Delete the default run behavior in pr60510.f.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-6-chenxiaolong@loongson.cn/mbox/"},{"id":185214,"url":"https://patchwork.plctlab.org/api/1.2/patches/185214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-7-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:28","name":"[v2,6/7] LoongArch: testsuite:Added additional vectorization \"-mlasx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-7-chenxiaolong@loongson.cn/mbox/"},{"id":185209,"url":"https://patchwork.plctlab.org/api/1.2/patches/185209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-8-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:29","name":"[v2,7/7] LoongArch: testsuite:Give up the detection of the gcc.dg/fma-{3, 4, 6, 7}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-8-chenxiaolong@loongson.cn/mbox/"},{"id":185216,"url":"https://patchwork.plctlab.org/api/1.2/patches/185216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105040711.2146204-1-juzhe.zhong@rivai.ai/","msgid":"<20240105040711.2146204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-05T04:07:11","name":"RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105040711.2146204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185219,"url":"https://patchwork.plctlab.org/api/1.2/patches/185219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105050300.3455412-1-admin@levyhsu.com/","msgid":"<20240105050300.3455412-1-admin@levyhsu.com>","list_archive_url":null,"date":"2024-01-05T05:03:00","name":"[x86_64] PR target/107563: Add 3-instruction subroutine vector shift in ix86_expand_vec_perm_const_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105050300.3455412-1-admin@levyhsu.com/mbox/"},{"id":185228,"url":"https://patchwork.plctlab.org/api/1.2/patches/185228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105060522.26253-1-chenxiaolong@loongson.cn/","msgid":"<20240105060522.26253-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:05:22","name":"[v3] LoongArch: testsuite:Added support for vector object detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105060522.26253-1-chenxiaolong@loongson.cn/mbox/"},{"id":185239,"url":"https://patchwork.plctlab.org/api/1.2/patches/185239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-2-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:32","name":"[1/4] LoongArch: Handle ISA evolution switches along with other options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-2-yangyujie@loongson.cn/mbox/"},{"id":185238,"url":"https://patchwork.plctlab.org/api/1.2/patches/185238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-3-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:33","name":"[2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-3-yangyujie@loongson.cn/mbox/"},{"id":185242,"url":"https://patchwork.plctlab.org/api/1.2/patches/185242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-4-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:34","name":"[3/4] LoongArch: Use enums for constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-4-yangyujie@loongson.cn/mbox/"},{"id":185241,"url":"https://patchwork.plctlab.org/api/1.2/patches/185241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-5-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:35","name":"[4/4] LoongArch: Simplify -mexplicit-reloc definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-5-yangyujie@loongson.cn/mbox/"},{"id":185247,"url":"https://patchwork.plctlab.org/api/1.2/patches/185247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-1-cederman@gaisler.com/","msgid":"<20240105071913.593978-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:10","name":"sparc: Char arrays are 64-bit aligned on SPARC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-1-cederman@gaisler.com/mbox/"},{"id":185248,"url":"https://patchwork.plctlab.org/api/1.2/patches/185248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-2-cederman@gaisler.com/","msgid":"<20240105071913.593978-2-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:11","name":"[1/2] sparc: Revert membar optimization that is not suitable for LEON5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-2-cederman@gaisler.com/mbox/"},{"id":185249,"url":"https://patchwork.plctlab.org/api/1.2/patches/185249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-3-cederman@gaisler.com/","msgid":"<20240105071913.593978-3-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:12","name":"sparc: Treat instructions with length 0 as empty","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-3-cederman@gaisler.com/mbox/"},{"id":185250,"url":"https://patchwork.plctlab.org/api/1.2/patches/185250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-4-cederman@gaisler.com/","msgid":"<20240105071913.593978-4-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:13","name":"[2/2] sparc: Add errata workaround to membar patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-4-cederman@gaisler.com/mbox/"},{"id":185251,"url":"https://patchwork.plctlab.org/api/1.2/patches/185251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073713.1799828-1-xujiahao@loongson.cn/","msgid":"<20240105073713.1799828-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:37:13","name":"LoongArch: Improve lasx_xvpermi_q_ insn pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073713.1799828-1-xujiahao@loongson.cn/mbox/"},{"id":185252,"url":"https://patchwork.plctlab.org/api/1.2/patches/185252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073744.1800307-1-xujiahao@loongson.cn/","msgid":"<20240105073744.1800307-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:37:44","name":"LoongArch: Optimize zero_extendqisi2 and zero_extendqidi2 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073744.1800307-1-xujiahao@loongson.cn/mbox/"},{"id":185253,"url":"https://patchwork.plctlab.org/api/1.2/patches/185253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073825.1806927-1-xujiahao@loongson.cn/","msgid":"<20240105073825.1806927-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:38:25","name":"LoongArch: Implenment vec_init where N is a LSX vector mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073825.1806927-1-xujiahao@loongson.cn/mbox/"},{"id":185254,"url":"https://patchwork.plctlab.org/api/1.2/patches/185254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074330.2309587-1-quic_apinski@quicinc.com/","msgid":"<20240105074330.2309587-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-05T07:43:30","name":"[PATCHv2] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074330.2309587-1-quic_apinski@quicinc.com/mbox/"},{"id":185256,"url":"https://patchwork.plctlab.org/api/1.2/patches/185256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-2-chenglulu@loongson.cn/","msgid":"<20240105074412.14096-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:44:11","name":"[v3,1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-2-chenglulu@loongson.cn/mbox/"},{"id":185255,"url":"https://patchwork.plctlab.org/api/1.2/patches/185255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-3-chenglulu@loongson.cn/","msgid":"<20240105074412.14096-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:44:12","name":"[v3,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-3-chenglulu@loongson.cn/mbox/"},{"id":185285,"url":"https://patchwork.plctlab.org/api/1.2/patches/185285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083908.349586-1-kito.cheng@sifive.com/","msgid":"<20240105083908.349586-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-05T08:39:08","name":"[committed] RISC-V: Clean up testsuite for multi-lib testing [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083908.349586-1-kito.cheng@sifive.com/mbox/"},{"id":185286,"url":"https://patchwork.plctlab.org/api/1.2/patches/185286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083923.349630-1-kito.cheng@sifive.com/","msgid":"<20240105083923.349630-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-05T08:39:23","name":"[committed] RISC-V: Clean up unused variable [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083923.349630-1-kito.cheng@sifive.com/mbox/"},{"id":185296,"url":"https://patchwork.plctlab.org/api/1.2/patches/185296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105085152.18530-1-wangfeng@eswincomputing.com/","msgid":"<20240105085152.18530-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T08:51:52","name":"[v7,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105085152.18530-1-wangfeng@eswincomputing.com/mbox/"},{"id":185316,"url":"https://patchwork.plctlab.org/api/1.2/patches/185316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105092344.23778-1-wangfeng@eswincomputing.com/","msgid":"<20240105092344.23778-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T09:23:44","name":"RISC-V: Fix avl-type operand index error for ZVBC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105092344.23778-1-wangfeng@eswincomputing.com/mbox/"},{"id":185355,"url":"https://patchwork.plctlab.org/api/1.2/patches/185355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102432.3180887-1-jwakely@redhat.com/","msgid":"<20240105102432.3180887-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:23:48","name":"[committed] libstdc++: Use if-constexpr in std::__try_use_facet [PR113099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102432.3180887-1-jwakely@redhat.com/mbox/"},{"id":185359,"url":"https://patchwork.plctlab.org/api/1.2/patches/185359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102514.3180917-1-jwakely@redhat.com/","msgid":"<20240105102514.3180917-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:24:33","name":"[committed] libstdc++: Remove UB from month and weekday additions and subtractions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102514.3180917-1-jwakely@redhat.com/mbox/"},{"id":185374,"url":"https://patchwork.plctlab.org/api/1.2/patches/185374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102537.3180942-1-jwakely@redhat.com/","msgid":"<20240105102537.3180942-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:25:15","name":"[committed] libstdc++: Fix std::char_traits::move [PR113200]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102537.3180942-1-jwakely@redhat.com/mbox/"},{"id":185390,"url":"https://patchwork.plctlab.org/api/1.2/patches/185390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105124815.2739660-1-yangyujie@loongson.cn/","msgid":"<20240105124815.2739660-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T12:48:15","name":"LoongArch: Implement option save/restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105124815.2739660-1-yangyujie@loongson.cn/mbox/"},{"id":185434,"url":"https://patchwork.plctlab.org/api/1.2/patches/185434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105142815.3250409-1-jwakely@redhat.com/","msgid":"<20240105142815.3250409-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:27:41","name":"[committed] libstdc++: Do not use __is_convertible unconditionally [PR113241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105142815.3250409-1-jwakely@redhat.com/mbox/"},{"id":185450,"url":"https://patchwork.plctlab.org/api/1.2/patches/185450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144120.3257340-1-jwakely@redhat.com/","msgid":"<20240105144120.3257340-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:36:32","name":"libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144120.3257340-1-jwakely@redhat.com/mbox/"},{"id":185445,"url":"https://patchwork.plctlab.org/api/1.2/patches/185445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144324.3257646-1-jwakely@redhat.com/","msgid":"<20240105144324.3257646-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:42:56","name":"[committed] libstdc++: Avoid overflow when appending to std::filesystem::path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144324.3257646-1-jwakely@redhat.com/mbox/"},{"id":185455,"url":"https://patchwork.plctlab.org/api/1.2/patches/185455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0iv4uh5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-05T16:26:30","name":"[pushed] aarch64: Extend VECT_COMPARE_COSTS to !SVE [PR113104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0iv4uh5.fsf@arm.com/mbox/"},{"id":185457,"url":"https://patchwork.plctlab.org/api/1.2/patches/185457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9z4u9z.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-05T16:30:48","name":"aarch64: Rework uxtl->zip optimisation [PR113196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9z4u9z.fsf@arm.com/mbox/"},{"id":185467,"url":"https://patchwork.plctlab.org/api/1.2/patches/185467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105165056.571235-1-ppalka@redhat.com/","msgid":"<20240105165056.571235-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-05T16:50:56","name":"c++: address of NTTP object as targ [PR113242]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105165056.571235-1-ppalka@redhat.com/mbox/"},{"id":185470,"url":"https://patchwork.plctlab.org/api/1.2/patches/185470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com/","msgid":"<0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com>","list_archive_url":null,"date":"2024-01-05T17:09:15","name":"libgccjit: Add support for setting the comment ident","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com/mbox/"},{"id":185476,"url":"https://patchwork.plctlab.org/api/1.2/patches/185476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105175224.3012-3-andre.simoesdiasvieira@arm.com/","msgid":"<20240105175224.3012-3-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2024-01-05T17:52:24","name":"[v2,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105175224.3012-3-andre.simoesdiasvieira@arm.com/mbox/"},{"id":185516,"url":"https://patchwork.plctlab.org/api/1.2/patches/185516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com/","msgid":"<0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com>","list_archive_url":null,"date":"2024-01-05T18:55:56","name":"omp_target_is_accessible (was: [patch] libgomp.texi: Document omp_display_env)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com/mbox/"},{"id":185532,"url":"https://patchwork.plctlab.org/api/1.2/patches/185532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105200116.1382389-1-ppalka@redhat.com/","msgid":"<20240105200116.1382389-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-05T20:01:16","name":"c++: reference variable as default targ [PR101463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105200116.1382389-1-ppalka@redhat.com/mbox/"},{"id":185554,"url":"https://patchwork.plctlab.org/api/1.2/patches/185554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-49bdfa50-9653-4b2e-837d-7e0f676da71f-1704490707716@3c-app-gmx-bs15/","msgid":"","list_archive_url":null,"date":"2024-01-05T21:38:27","name":"Fortran: bogus warnings with REPEAT intrinsic and -Wconversion-extra [PR96724]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-49bdfa50-9653-4b2e-837d-7e0f676da71f-1704490707716@3c-app-gmx-bs15/mbox/"},{"id":185551,"url":"https://patchwork.plctlab.org/api/1.2/patches/185551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiAHl_TMOICKNPx@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T22:18:06","name":"PR target/112886, Add %S to print_operand for vector pair support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiAHl_TMOICKNPx@cowardly-lion.the-meissners.org/mbox/"},{"id":185564,"url":"https://patchwork.plctlab.org/api/1.2/patches/185564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSSeBqMdd64W7V@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:35:37","name":"Repost [PATCH 1/6] Add -mcpu=future","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSSeBqMdd64W7V@cowardly-lion.the-meissners.org/mbox/"},{"id":185565,"url":"https://patchwork.plctlab.org/api/1.2/patches/185565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSrcdY46vL40E4@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:37:17","name":"Repost [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSrcdY46vL40E4@cowardly-lion.the-meissners.org/mbox/"},{"id":185566,"url":"https://patchwork.plctlab.org/api/1.2/patches/185566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiS7-05Y1n48bjk@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:38:23","name":"Repost [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiS7-05Y1n48bjk@cowardly-lion.the-meissners.org/mbox/"},{"id":185567,"url":"https://patchwork.plctlab.org/api/1.2/patches/185567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTS0adUUPx7wjY@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:39:55","name":"Repost [PATCH 4/6] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTS0adUUPx7wjY@cowardly-lion.the-meissners.org/mbox/"},{"id":185568,"url":"https://patchwork.plctlab.org/api/1.2/patches/185568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTiojbYNzVvJEV@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:40:58","name":"Repost [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTiojbYNzVvJEV@cowardly-lion.the-meissners.org/mbox/"},{"id":185569,"url":"https://patchwork.plctlab.org/api/1.2/patches/185569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTyrsBFO92FG84@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:42:02","name":"Repost [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTyrsBFO92FG84@cowardly-lion.the-meissners.org/mbox/"},{"id":185572,"url":"https://patchwork.plctlab.org/api/1.2/patches/185572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106003223.910964-1-mark@klomp.org/","msgid":"<20240106003223.910964-1-mark@klomp.org>","list_archive_url":null,"date":"2024-01-06T00:32:23","name":"[COMMITTED] Regenerate libgomp/configure for copyright year update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106003223.910964-1-mark@klomp.org/mbox/"},{"id":185575,"url":"https://patchwork.plctlab.org/api/1.2/patches/185575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106020855.1556409-1-juzhe.zhong@rivai.ai/","msgid":"<20240106020855.1556409-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T02:08:55","name":"[Committed,V2] RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106020855.1556409-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185576,"url":"https://patchwork.plctlab.org/api/1.2/patches/185576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106022921.1714868-1-juzhe.zhong@rivai.ai/","msgid":"<20240106022921.1714868-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T02:29:21","name":"[Committed,V2] RISC-V: Teach liveness computation loop invariant shift amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106022921.1714868-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185588,"url":"https://patchwork.plctlab.org/api/1.2/patches/185588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-2-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:35","name":"[v3,1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-2-kmatsui@gcc.gnu.org/mbox/"},{"id":185582,"url":"https://patchwork.plctlab.org/api/1.2/patches/185582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-3-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:36","name":"[v3,2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-3-kmatsui@gcc.gnu.org/mbox/"},{"id":185583,"url":"https://patchwork.plctlab.org/api/1.2/patches/185583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-4-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:37","name":"[v3,3/8] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-4-kmatsui@gcc.gnu.org/mbox/"},{"id":185584,"url":"https://patchwork.plctlab.org/api/1.2/patches/185584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-5-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:38","name":"[v3,4/8] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-5-kmatsui@gcc.gnu.org/mbox/"},{"id":185586,"url":"https://patchwork.plctlab.org/api/1.2/patches/185586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-6-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:39","name":"[v3,5/8] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-6-kmatsui@gcc.gnu.org/mbox/"},{"id":185587,"url":"https://patchwork.plctlab.org/api/1.2/patches/185587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-7-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:40","name":"[v3,6/8] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-7-kmatsui@gcc.gnu.org/mbox/"},{"id":185585,"url":"https://patchwork.plctlab.org/api/1.2/patches/185585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-8-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:41","name":"[v3,7/8] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-8-kmatsui@gcc.gnu.org/mbox/"},{"id":185589,"url":"https://patchwork.plctlab.org/api/1.2/patches/185589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-9-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:42","name":"[v3,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-9-kmatsui@gcc.gnu.org/mbox/"},{"id":185590,"url":"https://patchwork.plctlab.org/api/1.2/patches/185590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106051038.213211-1-juzhe.zhong@rivai.ai/","msgid":"<20240106051038.213211-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T05:10:38","name":"[Committed] RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106051038.213211-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185618,"url":"https://patchwork.plctlab.org/api/1.2/patches/185618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkSSMmtFTYYKjAE@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-06T08:41:44","name":"gimplify: Fix ICE in recalculate_side_effects [PR113228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkSSMmtFTYYKjAE@tucnak/mbox/"},{"id":185621,"url":"https://patchwork.plctlab.org/api/1.2/patches/185621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-1-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:07","name":"[1/3] LoongArch: Optimized some of the symbolic expansion instructions generated during bitwise operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-1-chenglulu@loongson.cn/mbox/"},{"id":185620,"url":"https://patchwork.plctlab.org/api/1.2/patches/185620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-2-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:08","name":"[2/3] LoongArch: Redundant sign extension elimination optimization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-2-chenglulu@loongson.cn/mbox/"},{"id":185622,"url":"https://patchwork.plctlab.org/api/1.2/patches/185622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-3-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:09","name":"[3/3] LoongArch: Redundant sign extension elimination optimization 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-3-chenglulu@loongson.cn/mbox/"},{"id":185623,"url":"https://patchwork.plctlab.org/api/1.2/patches/185623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkWh7Sz1/ugsVjU@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-06T08:59:51","name":"vect: Fix ICE in vect_analyze_loop_costing [PR113210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkWh7Sz1/ugsVjU@tucnak/mbox/"},{"id":185634,"url":"https://patchwork.plctlab.org/api/1.2/patches/185634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com/","msgid":"<03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-06T13:30:34","name":"[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com/mbox/"},{"id":185657,"url":"https://patchwork.plctlab.org/api/1.2/patches/185657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106151802.3356059-1-jwakely@redhat.com/","msgid":"<20240106151802.3356059-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-06T15:17:49","name":"[v2] libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106151802.3356059-1-jwakely@redhat.com/mbox/"},{"id":185663,"url":"https://patchwork.plctlab.org/api/1.2/patches/185663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLh4RyAki7FV8vVLJDZydqT3hcaLKyMFjt4qvkEmWQiLg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-06T17:26:16","name":"[Patch, fortran PR89645/99065 No IMPLICIT type error with: ASSOCIATE( X => function() )","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLh4RyAki7FV8vVLJDZydqT3hcaLKyMFjt4qvkEmWQiLg@mail.gmail.com/mbox/"},{"id":185669,"url":"https://patchwork.plctlab.org/api/1.2/patches/185669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de/","msgid":"<74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de>","list_archive_url":null,"date":"2024-01-06T18:36:05","name":"[testsuite,applied] PR52641: Fix more sloppy tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de/mbox/"},{"id":185670,"url":"https://patchwork.plctlab.org/api/1.2/patches/185670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-2-sandra@codesourcery.com/","msgid":"<20240106185257.126445-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:49","name":"[1/8] OpenMP: metadirective tree data structures and front-end interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-2-sandra@codesourcery.com/mbox/"},{"id":185671,"url":"https://patchwork.plctlab.org/api/1.2/patches/185671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-3-sandra@codesourcery.com/","msgid":"<20240106185257.126445-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:50","name":"[2/8] OpenMP: middle-end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-3-sandra@codesourcery.com/mbox/"},{"id":185672,"url":"https://patchwork.plctlab.org/api/1.2/patches/185672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-4-sandra@codesourcery.com/","msgid":"<20240106185257.126445-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:51","name":"[3/8] libgomp: runtime support for target_device selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-4-sandra@codesourcery.com/mbox/"},{"id":185673,"url":"https://patchwork.plctlab.org/api/1.2/patches/185673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-5-sandra@codesourcery.com/","msgid":"<20240106185257.126445-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:52","name":"[4/8] OpenMP: C front end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-5-sandra@codesourcery.com/mbox/"},{"id":185674,"url":"https://patchwork.plctlab.org/api/1.2/patches/185674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-6-sandra@codesourcery.com/","msgid":"<20240106185257.126445-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:53","name":"[5/8] OpenMP: C++ front-end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-6-sandra@codesourcery.com/mbox/"},{"id":185677,"url":"https://patchwork.plctlab.org/api/1.2/patches/185677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-7-sandra@codesourcery.com/","msgid":"<20240106185257.126445-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:54","name":"[6/8] OpenMP: common c/c++ testcases for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-7-sandra@codesourcery.com/mbox/"},{"id":185675,"url":"https://patchwork.plctlab.org/api/1.2/patches/185675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-8-sandra@codesourcery.com/","msgid":"<20240106185257.126445-8-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:55","name":"[7/8] OpenMP: Fortran front-end support for metadirectives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-8-sandra@codesourcery.com/mbox/"},{"id":185676,"url":"https://patchwork.plctlab.org/api/1.2/patches/185676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-9-sandra@codesourcery.com/","msgid":"<20240106185257.126445-9-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:56","name":"[8/8] OpenMP: Update documentation of metadirective implementation status.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-9-sandra@codesourcery.com/mbox/"},{"id":185685,"url":"https://patchwork.plctlab.org/api/1.2/patches/185685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f09b2f16-ea11-45d9-b74c-a983be908e91@net-b.de/","msgid":"","list_archive_url":null,"date":"2024-01-06T21:20:48","name":"gcn.h: Add builtin_define (\"__gfx1030\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f09b2f16-ea11-45d9-b74c-a983be908e91@net-b.de/mbox/"},{"id":185696,"url":"https://patchwork.plctlab.org/api/1.2/patches/185696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/qFJs-vqcMVgr5VFvNrULQ3BL2GM2v_qgabqCA6KH3aDONEBK2La5VDARf_AJplVr5hafQ2T7SO6eQLh3omCRDfONNa2_p_mcsZWmPmM0Ajc=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-07T00:00:10","name":"[v8,1/4] c++: P0847R7 (deducing this) - prerequisite changes. [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/qFJs-vqcMVgr5VFvNrULQ3BL2GM2v_qgabqCA6KH3aDONEBK2La5VDARf_AJplVr5hafQ2T7SO6eQLh3omCRDfONNa2_p_mcsZWmPmM0Ajc=@protonmail.com/mbox/"},{"id":185697,"url":"https://patchwork.plctlab.org/api/1.2/patches/185697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/O5vVsH8QiXR-oPGrQJkZJA5M1iFbHewAJ3RfeDGvo-sXwz2qRjs7QyevmuzV792p3A8S8wQsubjri-Sy1DJtePA7NuEJhA_15EWsOrqd0Dg=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-07T00:03:19","name":"[v8,3/4] c++: P0847R7 (deducing this) - diagnostics. [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/O5vVsH8QiXR-oPGrQJkZJA5M1iFbHewAJ3RfeDGvo-sXwz2qRjs7QyevmuzV792p3A8S8wQsubjri-Sy1DJtePA7NuEJhA_15EWsOrqd0Dg=@protonmail.com/mbox/"},{"id":185702,"url":"https://patchwork.plctlab.org/api/1.2/patches/185702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107003654.1629705-1-juzhe.zhong@rivai.ai/","msgid":"<20240107003654.1629705-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-07T00:36:54","name":"[Committed] RISC-V: Use MAX instead of std::max [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107003654.1629705-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185707,"url":"https://patchwork.plctlab.org/api/1.2/patches/185707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010049.3402703-1-jwakely@redhat.com/","msgid":"<20240107010049.3402703-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-07T01:00:27","name":"[committed] libstdc++: Remove dg-timeout-factor from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010049.3402703-1-jwakely@redhat.com/mbox/"},{"id":185704,"url":"https://patchwork.plctlab.org/api/1.2/patches/185704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010056.3402724-1-jwakely@redhat.com/","msgid":"<20240107010056.3402724-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-07T01:00:51","name":"[committed] libstdc++: Avoid conflicting declaration in eh_call.cc [PR112997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010056.3402724-1-jwakely@redhat.com/mbox/"},{"id":185725,"url":"https://patchwork.plctlab.org/api/1.2/patches/185725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc7da78e-c215-4129-94ce-442277596802@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T12:14:10","name":"[testsuite,applied] PR52641: Fix more fallout from sloppy tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc7da78e-c215-4129-94ce-442277596802@gjlay.de/mbox/"},{"id":185736,"url":"https://patchwork.plctlab.org/api/1.2/patches/185736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com/","msgid":"<9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com>","list_archive_url":null,"date":"2024-01-07T12:56:48","name":"Add __cow_string C string constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com/mbox/"},{"id":185742,"url":"https://patchwork.plctlab.org/api/1.2/patches/185742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5db37f0-9e5e-471a-9ac3-16176d215e33@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T15:53:04","name":"[testsuite,applied] PR52641 Fix more fallout from sloppy tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5db37f0-9e5e-471a-9ac3-16176d215e33@gjlay.de/mbox/"},{"id":185747,"url":"https://patchwork.plctlab.org/api/1.2/patches/185747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com/","msgid":"<51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com>","list_archive_url":null,"date":"2024-01-07T16:55:01","name":"[committed] Fix typo in last change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com/mbox/"},{"id":185757,"url":"https://patchwork.plctlab.org/api/1.2/patches/185757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b53b0b78-c963-4d4f-83c5-2aa6071f5163@net-b.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T19:20:19","name":"GCN: Add pre-initial support for gfx1100","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b53b0b78-c963-4d4f-83c5-2aa6071f5163@net-b.de/mbox/"},{"id":185760,"url":"https://patchwork.plctlab.org/api/1.2/patches/185760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de/","msgid":"<2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de>","list_archive_url":null,"date":"2024-01-07T20:12:01","name":"[avr,applied] Fix some avr test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de/mbox/"},{"id":185761,"url":"https://patchwork.plctlab.org/api/1.2/patches/185761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107203259.1705373-1-ppalka@redhat.com/","msgid":"<20240107203259.1705373-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-07T20:32:59","name":"libstdc++: reduce std::variant template instantiation depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107203259.1705373-1-ppalka@redhat.com/mbox/"},{"id":185771,"url":"https://patchwork.plctlab.org/api/1.2/patches/185771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401072322250.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-08T00:06:20","name":"RISC-V: Also handle sign extension in branch costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401072322250.5892@tpp.orcam.me.uk/mbox/"},{"id":185776,"url":"https://patchwork.plctlab.org/api/1.2/patches/185776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108005831.35467-1-wangfeng@eswincomputing.com/","msgid":"<20240108005831.35467-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T00:58:31","name":"[committed] RISC-V: Fix avl-type operand index error for ZVBC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108005831.35467-1-wangfeng@eswincomputing.com/mbox/"},{"id":185777,"url":"https://patchwork.plctlab.org/api/1.2/patches/185777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT3=TCsF2GcsawmbOReDjwVPmxpSLw1_CTZX5NE6HUtu+g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T01:01:48","name":"libstdc++: atomic: Add missing clear_padding in __atomic_float constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT3=TCsF2GcsawmbOReDjwVPmxpSLw1_CTZX5NE6HUtu+g@mail.gmail.com/mbox/"},{"id":185782,"url":"https://patchwork.plctlab.org/api/1.2/patches/185782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-2-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:07","name":"[v2,1/4] LoongArch: Handle ISA evolution switches along with other options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-2-yangyujie@loongson.cn/mbox/"},{"id":185783,"url":"https://patchwork.plctlab.org/api/1.2/patches/185783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-3-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:08","name":"[v2,2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-3-yangyujie@loongson.cn/mbox/"},{"id":185779,"url":"https://patchwork.plctlab.org/api/1.2/patches/185779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-4-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:09","name":"[v2,3/4] LoongArch: Use enums for constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-4-yangyujie@loongson.cn/mbox/"},{"id":185780,"url":"https://patchwork.plctlab.org/api/1.2/patches/185780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-5-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:10","name":"[v2,4/4] LoongArch: Simplify -mexplicit-reloc definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-5-yangyujie@loongson.cn/mbox/"},{"id":185791,"url":"https://patchwork.plctlab.org/api/1.2/patches/185791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011621.3670359-1-jwakely@redhat.com/","msgid":"<20240108011621.3670359-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:15:50","name":"[committed] libstdc++: Implement P2909R4 (\"Dude, where'\''s my char?\") for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011621.3670359-1-jwakely@redhat.com/mbox/"},{"id":185797,"url":"https://patchwork.plctlab.org/api/1.2/patches/185797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011829.3670492-1-jwakely@redhat.com/","msgid":"<20240108011829.3670492-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:17:14","name":"[committed,V3] libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011829.3670492-1-jwakely@redhat.com/mbox/"},{"id":185796,"url":"https://patchwork.plctlab.org/api/1.2/patches/185796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-1-jwakely@redhat.com/","msgid":"<20240108011930.3670651-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:19:01","name":"[committed,1/2] libstdc++: Implement P2905R2 \"Runtime format strings\" for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-1-jwakely@redhat.com/mbox/"},{"id":185778,"url":"https://patchwork.plctlab.org/api/1.2/patches/185778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-2-jwakely@redhat.com/","msgid":"<20240108011930.3670651-2-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:19:02","name":"[committed,2/2] libstdc++: Implement P2918R0 \"Runtime format strings II\" for C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-2-jwakely@redhat.com/mbox/"},{"id":185792,"url":"https://patchwork.plctlab.org/api/1.2/patches/185792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com/","msgid":"<91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com>","list_archive_url":null,"date":"2024-01-08T02:35:07","name":"strub: Only unbias stack point for SPARC_STACK_BOUNDARY_HACK [PR113100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com/mbox/"},{"id":185793,"url":"https://patchwork.plctlab.org/api/1.2/patches/185793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d768bc05-07db-9bd3-eade-f264e81ae952@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:23","name":"testsuite, rs6000: Adjust pcrel-sibcall-1.c with noipa [PR112751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d768bc05-07db-9bd3-eade-f264e81ae952@linux.ibm.com/mbox/"},{"id":185794,"url":"https://patchwork.plctlab.org/api/1.2/patches/185794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de211e8d-761f-8b37-745e-138ed9284013@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:46","name":"rs6000: Eliminate zext fed by vclzlsbb [PR111480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de211e8d-761f-8b37-745e-138ed9284013@linux.ibm.com/mbox/"},{"id":185795,"url":"https://patchwork.plctlab.org/api/1.2/patches/185795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4bc12b8-2d66-3227-6101-bbb0bcb1e3b1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:52","name":"rs6000: Make copysign (x, -1) back to -abs (x) for IEEE128 float [PR112606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4bc12b8-2d66-3227-6101-bbb0bcb1e3b1@linux.ibm.com/mbox/"},{"id":185798,"url":"https://patchwork.plctlab.org/api/1.2/patches/185798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108030830.1303730-1-hongyu.wang@intel.com/","msgid":"<20240108030830.1303730-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-08T03:08:30","name":"i386: [APX] Add missing document for APX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108030830.1303730-1-hongyu.wang@intel.com/mbox/"},{"id":185813,"url":"https://patchwork.plctlab.org/api/1.2/patches/185813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108061126.792885-1-kito.cheng@sifive.com/","msgid":"<20240108061126.792885-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T06:11:26","name":"[committed] RISC-V: Fix testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108061126.792885-1-kito.cheng@sifive.com/mbox/"},{"id":185814,"url":"https://patchwork.plctlab.org/api/1.2/patches/185814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com/","msgid":"<05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com>","list_archive_url":null,"date":"2024-01-08T06:15:54","name":"[1/2] arm: Add cortex-m52 core","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com/mbox/"},{"id":185816,"url":"https://patchwork.plctlab.org/api/1.2/patches/185816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com/","msgid":"<0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com>","list_archive_url":null,"date":"2024-01-08T06:16:37","name":"[2/2] arm: Add cortex-m52 doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com/mbox/"},{"id":185839,"url":"https://patchwork.plctlab.org/api/1.2/patches/185839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108082029.751159-1-cederman@gaisler.com/","msgid":"<20240108082029.751159-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-08T08:20:29","name":"testsuite: Skip ifcvt-4.c for SPARC V8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108082029.751159-1-cederman@gaisler.com/mbox/"},{"id":185843,"url":"https://patchwork.plctlab.org/api/1.2/patches/185843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108084049.2591110-1-haochen.jiang@intel.com/","msgid":"<20240108084049.2591110-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-08T08:40:49","name":"i386: Fix recent testcase fail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108084049.2591110-1-haochen.jiang@intel.com/mbox/"},{"id":185862,"url":"https://patchwork.plctlab.org/api/1.2/patches/185862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-1-wangfeng@eswincomputing.com/","msgid":"<20240108091201.8087-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T09:12:00","name":"[v8,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-1-wangfeng@eswincomputing.com/mbox/"},{"id":185863,"url":"https://patchwork.plctlab.org/api/1.2/patches/185863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-2-wangfeng@eswincomputing.com/","msgid":"<20240108091201.8087-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T09:12:01","name":"[v7,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-2-wangfeng@eswincomputing.com/mbox/"},{"id":185871,"url":"https://patchwork.plctlab.org/api/1.2/patches/185871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108092434.554918-1-iii@linux.ibm.com/","msgid":"<20240108092434.554918-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-08T09:22:57","name":"asan: Do not call asan_function_start () without the current function [PR113251]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108092434.554918-1-iii@linux.ibm.com/mbox/"},{"id":185878,"url":"https://patchwork.plctlab.org/api/1.2/patches/185878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108095641.D66D8385842A@sourceware.org/","msgid":"<20240108095641.D66D8385842A@sourceware.org>","list_archive_url":null,"date":"2024-01-08T09:50:44","name":"Clarify -mmovbe documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108095641.D66D8385842A@sourceware.org/mbox/"},{"id":185879,"url":"https://patchwork.plctlab.org/api/1.2/patches/185879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659bc714.170a0220.c04dd.cc6a@mx.google.com/","msgid":"<659bc714.170a0220.c04dd.cc6a@mx.google.com>","list_archive_url":null,"date":"2024-01-08T09:57:35","name":"[v2] c++/modules: Differentiate extern templates and TYPE_DECL_SUPPRESS_DEBUG [PR112820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659bc714.170a0220.c04dd.cc6a@mx.google.com/mbox/"},{"id":185886,"url":"https://patchwork.plctlab.org/api/1.2/patches/185886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com/","msgid":"<49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com>","list_archive_url":null,"date":"2024-01-08T10:01:23","name":"[committed] amdgcn: Don'\''t double-count AVGPRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com/mbox/"},{"id":185887,"url":"https://patchwork.plctlab.org/api/1.2/patches/185887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbb77a85-a528-4ba0-bf50-8515bca5e4a7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T10:03:48","name":"[committed] amdgcn: Match new XNACK defaults in mkoffload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbb77a85-a528-4ba0-bf50-8515bca5e4a7@codesourcery.com/mbox/"},{"id":185907,"url":"https://patchwork.plctlab.org/api/1.2/patches/185907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108105552.714778-1-cupertino.miranda@oracle.com/","msgid":"<20240108105552.714778-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2024-01-08T10:55:52","name":"btf: print string position as comment for validation and testing purposes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108105552.714778-1-cupertino.miranda@oracle.com/mbox/"},{"id":185895,"url":"https://patchwork.plctlab.org/api/1.2/patches/185895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108110505.715284-1-cupertino.miranda@oracle.com/","msgid":"<20240108110505.715284-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2024-01-08T11:05:05","name":"bpf: Correct BTF for kernel_helper attributed decls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108110505.715284-1-cupertino.miranda@oracle.com/mbox/"},{"id":185917,"url":"https://patchwork.plctlab.org/api/1.2/patches/185917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108113513.554483858CDB@sourceware.org/","msgid":"<20240108113513.554483858CDB@sourceware.org>","list_archive_url":null,"date":"2024-01-08T11:29:24","name":"tree-optimization/113026 - avoid vector epilog in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108113513.554483858CDB@sourceware.org/mbox/"},{"id":185985,"url":"https://patchwork.plctlab.org/api/1.2/patches/185985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18133-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T12:56:38","name":"[frontend] : don'\''t ice with pragma NOVECTOR if loop in C has no condition [PR113267]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18133-tamar@arm.com/mbox/"},{"id":185992,"url":"https://patchwork.plctlab.org/api/1.2/patches/185992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108131456.803003-2-mary.bennett@embecosm.com/","msgid":"<20240108131456.803003-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-08T13:14:56","name":"[v5,1/1] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108131456.803003-2-mary.bennett@embecosm.com/mbox/"},{"id":186006,"url":"https://patchwork.plctlab.org/api/1.2/patches/186006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-2-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:34","name":"[1/5] RISC-V: Extract part parsing base ISA logic into a standalone function [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-2-kito.cheng@sifive.com/mbox/"},{"id":186007,"url":"https://patchwork.plctlab.org/api/1.2/patches/186007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-3-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:35","name":"[2/5] RISC-V: Relax the -march string for accept any order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-3-kito.cheng@sifive.com/mbox/"},{"id":186008,"url":"https://patchwork.plctlab.org/api/1.2/patches/186008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-4-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:36","name":"[3/5] RISC-V: Remove unused function in riscv_subset_list [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-4-kito.cheng@sifive.com/mbox/"},{"id":186012,"url":"https://patchwork.plctlab.org/api/1.2/patches/186012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-5-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:37","name":"[4/5] RISC-V: Update testsuite due to -march string relaxation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-5-kito.cheng@sifive.com/mbox/"},{"id":186015,"url":"https://patchwork.plctlab.org/api/1.2/patches/186015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-6-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-6-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:38","name":"[5/5] RISC-V: Document the syntax of -march","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-6-kito.cheng@sifive.com/mbox/"},{"id":186065,"url":"https://patchwork.plctlab.org/api/1.2/patches/186065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com/","msgid":"<00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-08T16:07:29","name":"[libatomic] Fix testsuite regressions on ARM [raspberry pi].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com/mbox/"},{"id":186072,"url":"https://patchwork.plctlab.org/api/1.2/patches/186072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108161333.3785051-1-jwakely@redhat.com/","msgid":"<20240108161333.3785051-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T16:13:05","name":"[committed] libstdc++: Remove std::__unicode::__null_sentinel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108161333.3785051-1-jwakely@redhat.com/mbox/"},{"id":186101,"url":"https://patchwork.plctlab.org/api/1.2/patches/186101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108184010.2235409-1-ppalka@redhat.com/","msgid":"<20240108184010.2235409-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:40:10","name":"c++: non-dep array list-init w/ non-triv dtor [PR109899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108184010.2235409-1-ppalka@redhat.com/mbox/"},{"id":186106,"url":"https://patchwork.plctlab.org/api/1.2/patches/186106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com/","msgid":"<815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:53:21","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com/mbox/"},{"id":186110,"url":"https://patchwork.plctlab.org/api/1.2/patches/186110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com/","msgid":"<28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:59:38","name":"[committed] steering.html: Update my affiliation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com/mbox/"},{"id":186139,"url":"https://patchwork.plctlab.org/api/1.2/patches/186139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZxdVv8wUQ0dVY55@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T20:38:46","name":"[committed] hppa: Fix bind_c_coms.f90 and bind_c_vars.f90 tests on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZxdVv8wUQ0dVY55@mx3210.localdomain/mbox/"},{"id":186146,"url":"https://patchwork.plctlab.org/api/1.2/patches/186146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx2CtWx8EMNjxS0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T22:24:10","name":"[committed] Skip gfortran.dg/dec_math.f90 on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx2CtWx8EMNjxS0@mx3210.localdomain/mbox/"},{"id":186147,"url":"https://patchwork.plctlab.org/api/1.2/patches/186147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx4jvGxSRkS0vAw@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T22:34:54","name":"[committed] xfail dg-final \"Sunk statements: 5\" on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx4jvGxSRkS0vAw@mx3210.localdomain/mbox/"},{"id":186171,"url":"https://patchwork.plctlab.org/api/1.2/patches/186171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV3P223MB091644C520D34FF0A7166513D66B2@LV3P223MB0916.NAMP223.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2024-01-08T23:32:16","name":"Resolve issue with Canadian build for x86_64-w64-mingw32 multilibs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV3P223MB091644C520D34FF0A7166513D66B2@LV3P223MB0916.NAMP223.PROD.OUTLOOK.COM/mbox/"},{"id":186187,"url":"https://patchwork.plctlab.org/api/1.2/patches/186187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109012453.675353-1-juzhe.zhong@rivai.ai/","msgid":"<20240109012453.675353-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T01:24:53","name":"RISC-V: Fix loop invariant check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109012453.675353-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186188,"url":"https://patchwork.plctlab.org/api/1.2/patches/186188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090941460629701@eswincomputing.com/","msgid":"<202401090941460629701@eswincomputing.com>","list_archive_url":null,"date":"2024-01-09T01:41:46","name":"??????: Re: [PATCH v8 2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090941460629701@eswincomputing.com/mbox/"},{"id":186189,"url":"https://patchwork.plctlab.org/api/1.2/patches/186189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090942058650372@eswincomputing.com/","msgid":"<202401090942058650372@eswincomputing.com>","list_archive_url":null,"date":"2024-01-09T01:42:06","name":"??????: Re: [PATCH v7 1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090942058650372@eswincomputing.com/mbox/"},{"id":186190,"url":"https://patchwork.plctlab.org/api/1.2/patches/186190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021054.1095824-1-juzhe.zhong@rivai.ai/","msgid":"<20240109021054.1095824-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T02:10:54","name":"[Committed] RISC-V: Fix comments of segment load/store intrinsic[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021054.1095824-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186191,"url":"https://patchwork.plctlab.org/api/1.2/patches/186191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com/","msgid":"<2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T02:12:26","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186192,"url":"https://patchwork.plctlab.org/api/1.2/patches/186192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021340.1129665-1-juzhe.zhong@rivai.ai/","msgid":"<20240109021340.1129665-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T02:13:40","name":"[Committed] RISC-V: Fix comments of segment load/store intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021340.1129665-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186197,"url":"https://patchwork.plctlab.org/api/1.2/patches/186197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109031851.1026-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240109031851.1026-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T03:18:51","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109031851.1026-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186198,"url":"https://patchwork.plctlab.org/api/1.2/patches/186198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com/","msgid":"<8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T03:23:05","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186227,"url":"https://patchwork.plctlab.org/api/1.2/patches/186227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070211.325219-1-haochen.jiang@intel.com/","msgid":"<20240109070211.325219-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:02:11","name":"Add -mevex512 into invoke.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070211.325219-1-haochen.jiang@intel.com/mbox/"},{"id":186229,"url":"https://patchwork.plctlab.org/api/1.2/patches/186229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070702.413866-1-hongyu.wang@intel.com/","msgid":"<20240109070702.413866-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:07:02","name":"i386: [APX] Document inline asm behavior and new switch for APX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070702.413866-1-hongyu.wang@intel.com/mbox/"},{"id":186230,"url":"https://patchwork.plctlab.org/api/1.2/patches/186230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109071205.417812-1-hongyu.wang@intel.com/","msgid":"<20240109071205.417812-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:12:04","name":"[wwwdocs] gcc-14/changes: Update APX inline asm behavior for x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109071205.417812-1-hongyu.wang@intel.com/mbox/"},{"id":186249,"url":"https://patchwork.plctlab.org/api/1.2/patches/186249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSk8vgLAXGVJb_TZq+yJL1EEZ2B9x6yFnDDkruu5tTUUZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:20:02","name":"c++: side effect in nullptr_t conversion fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSk8vgLAXGVJb_TZq+yJL1EEZ2B9x6yFnDDkruu5tTUUZA@mail.gmail.com/mbox/"},{"id":186277,"url":"https://patchwork.plctlab.org/api/1.2/patches/186277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0HuOnrY+ZxfYQu@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:45:44","name":"vect: Ensure both NITERSM1 and NITERS are INTEGER_CSTs or neither of them [PR113210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0HuOnrY+ZxfYQu@tucnak/mbox/"},{"id":186283,"url":"https://patchwork.plctlab.org/api/1.2/patches/186283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0JQX+D1CeEH9aB@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:52:17","name":"c-family: copy attribute diagnostic fixes [PR113262]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0JQX+D1CeEH9aB@tucnak/mbox/"},{"id":186284,"url":"https://patchwork.plctlab.org/api/1.2/patches/186284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0LVCjnhnI4r5qs@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T09:01:08","name":"[committed] libgomp: Use absolute pathname to testsuite/flock [PR113192]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0LVCjnhnI4r5qs@tucnak/mbox/"},{"id":186297,"url":"https://patchwork.plctlab.org/api/1.2/patches/186297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3275505.44csPzL39Z@fomalhaut/","msgid":"<3275505.44csPzL39Z@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:16:22","name":"Fix PR rtl-optimization/113140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3275505.44csPzL39Z@fomalhaut/mbox/"},{"id":186298,"url":"https://patchwork.plctlab.org/api/1.2/patches/186298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3783379.kQq0lBPeGt@fomalhaut/","msgid":"<3783379.kQq0lBPeGt@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:23:44","name":"[Ada] Fix PR ada/113195","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3783379.kQq0lBPeGt@fomalhaut/mbox/"},{"id":186296,"url":"https://patchwork.plctlab.org/api/1.2/patches/186296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5902287.MhkbZ0Pkbq@fomalhaut/","msgid":"<5902287.MhkbZ0Pkbq@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:27:10","name":"Fix PR rtl-optimization/113140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5902287.MhkbZ0Pkbq@fomalhaut/mbox/"},{"id":186302,"url":"https://patchwork.plctlab.org/api/1.2/patches/186302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2177833.Mh6RI2rZIc@fomalhaut/","msgid":"<2177833.Mh6RI2rZIc@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:50:27","name":"[Ada] Fix PR ada/112781 (1/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2177833.Mh6RI2rZIc@fomalhaut/mbox/"},{"id":186307,"url":"https://patchwork.plctlab.org/api/1.2/patches/186307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2180612.Icojqenx9y@fomalhaut/","msgid":"<2180612.Icojqenx9y@fomalhaut>","list_archive_url":null,"date":"2024-01-09T10:07:46","name":"[Ada] Fix PR ada/112781 (2/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2180612.Icojqenx9y@fomalhaut/mbox/"},{"id":186311,"url":"https://patchwork.plctlab.org/api/1.2/patches/186311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109104648.675293-1-hongtao.liu@intel.com/","msgid":"<20240109104648.675293-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-09T10:46:48","name":"Optimize A < B ? A : B to MIN_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109104648.675293-1-hongtao.liu@intel.com/mbox/"},{"id":186317,"url":"https://patchwork.plctlab.org/api/1.2/patches/186317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109105253.332676-1-iii@linux.ibm.com/","msgid":"<20240109105253.332676-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-09T10:51:16","name":"rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109105253.332676-1-iii@linux.ibm.com/mbox/"},{"id":186323,"url":"https://patchwork.plctlab.org/api/1.2/patches/186323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccb585d7-8db8-4500-9a19-2c4e47f5bcfa@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T11:14:36","name":"rs6000: New pass for replacement of adjacent lxv with lxvp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccb585d7-8db8-4500-9a19-2c4e47f5bcfa@linux.ibm.com/mbox/"},{"id":186349,"url":"https://patchwork.plctlab.org/api/1.2/patches/186349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109123646.555D13858292@sourceware.org/","msgid":"<20240109123646.555D13858292@sourceware.org>","list_archive_url":null,"date":"2024-01-09T12:31:00","name":"tree-optimization/113026 - fix vector epilogue maximum iter bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109123646.555D13858292@sourceware.org/mbox/"},{"id":186393,"url":"https://patchwork.plctlab.org/api/1.2/patches/186393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109124340.3886305-1-jwakely@redhat.com/","msgid":"<20240109124340.3886305-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T12:33:10","name":"[gcc-13] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109124340.3886305-1-jwakely@redhat.com/mbox/"},{"id":186361,"url":"https://patchwork.plctlab.org/api/1.2/patches/186361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ1FgF0xzHtfSefX@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T13:09:20","name":"[committed] aarch64: Fix up GC of aarch64_simd_types [PR113270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ1FgF0xzHtfSefX@tucnak/mbox/"},{"id":186366,"url":"https://patchwork.plctlab.org/api/1.2/patches/186366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131529.743785-1-poulhies@adacore.com/","msgid":"<20240109131529.743785-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:29","name":"[COMMITTED] ada: Avoid xref on out params of TSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131529.743785-1-poulhies@adacore.com/mbox/"},{"id":186369,"url":"https://patchwork.plctlab.org/api/1.2/patches/186369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131530.743848-1-poulhies@adacore.com/","msgid":"<20240109131530.743848-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:30","name":"[COMMITTED] ada: Remove unreachable code in Resolve_Extension_Aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131530.743848-1-poulhies@adacore.com/mbox/"},{"id":186364,"url":"https://patchwork.plctlab.org/api/1.2/patches/186364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131532.743911-1-poulhies@adacore.com/","msgid":"<20240109131532.743911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:32","name":"[COMMITTED] ada: Fix precondition in Interfaces.C.Strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131532.743911-1-poulhies@adacore.com/mbox/"},{"id":186365,"url":"https://patchwork.plctlab.org/api/1.2/patches/186365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131533.744010-1-poulhies@adacore.com/","msgid":"<20240109131533.744010-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:33","name":"[COMMITTED] ada: Error compiling Ada 2022 object renaming with no subtype mark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131533.744010-1-poulhies@adacore.com/mbox/"},{"id":186368,"url":"https://patchwork.plctlab.org/api/1.2/patches/186368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131535.744072-1-poulhies@adacore.com/","msgid":"<20240109131535.744072-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:35","name":"[COMMITTED] ada: Fix bug in Sem_Util.Enclosing_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131535.744072-1-poulhies@adacore.com/mbox/"},{"id":186367,"url":"https://patchwork.plctlab.org/api/1.2/patches/186367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131537.744133-1-poulhies@adacore.com/","msgid":"<20240109131537.744133-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:37","name":"[COMMITTED] ada: Fix uses of not Present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131537.744133-1-poulhies@adacore.com/mbox/"},{"id":186375,"url":"https://patchwork.plctlab.org/api/1.2/patches/186375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131538.744194-1-poulhies@adacore.com/","msgid":"<20240109131538.744194-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:38","name":"[COMMITTED] ada: Remove dead code for GNATprove inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131538.744194-1-poulhies@adacore.com/mbox/"},{"id":186378,"url":"https://patchwork.plctlab.org/api/1.2/patches/186378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131540.744255-1-poulhies@adacore.com/","msgid":"<20240109131540.744255-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:40","name":"[COMMITTED] ada: Remove dead detection of recursive inlined subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131540.744255-1-poulhies@adacore.com/mbox/"},{"id":186380,"url":"https://patchwork.plctlab.org/api/1.2/patches/186380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131542.744317-1-poulhies@adacore.com/","msgid":"<20240109131542.744317-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:42","name":"[COMMITTED] ada: More aggressive inlining of subprogram calls in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131542.744317-1-poulhies@adacore.com/mbox/"},{"id":186374,"url":"https://patchwork.plctlab.org/api/1.2/patches/186374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131544.744378-1-poulhies@adacore.com/","msgid":"<20240109131544.744378-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:44","name":"[COMMITTED] ada: Remove side effects depending on the context of subtype declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131544.744378-1-poulhies@adacore.com/mbox/"},{"id":186370,"url":"https://patchwork.plctlab.org/api/1.2/patches/186370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131545.744441-1-poulhies@adacore.com/","msgid":"<20240109131545.744441-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:45","name":"[COMMITTED] ada: Cannot requeue to a procedure implemented by an entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131545.744441-1-poulhies@adacore.com/mbox/"},{"id":186373,"url":"https://patchwork.plctlab.org/api/1.2/patches/186373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131547.744502-1-poulhies@adacore.com/","msgid":"<20240109131547.744502-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:47","name":"[COMMITTED] ada: Add __atomic_store_n binding to System.Atomic_Primitives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131547.744502-1-poulhies@adacore.com/mbox/"},{"id":186377,"url":"https://patchwork.plctlab.org/api/1.2/patches/186377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131549.744564-1-poulhies@adacore.com/","msgid":"<20240109131549.744564-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:49","name":"[COMMITTED] ada: Fix internal error on class-wide allocator inside if-expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131549.744564-1-poulhies@adacore.com/mbox/"},{"id":186376,"url":"https://patchwork.plctlab.org/api/1.2/patches/186376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131551.744625-1-poulhies@adacore.com/","msgid":"<20240109131551.744625-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:51","name":"[COMMITTED] ada: Fix limited_with in Check_Scil; allow for <> in pp of aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131551.744625-1-poulhies@adacore.com/mbox/"},{"id":186381,"url":"https://patchwork.plctlab.org/api/1.2/patches/186381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131553.744686-1-poulhies@adacore.com/","msgid":"<20240109131553.744686-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:53","name":"[COMMITTED] ada: Remove unused runtime entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131553.744686-1-poulhies@adacore.com/mbox/"},{"id":186372,"url":"https://patchwork.plctlab.org/api/1.2/patches/186372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131554.744749-1-poulhies@adacore.com/","msgid":"<20240109131554.744749-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:54","name":"[COMMITTED] ada: Excess elements created for indexed aggregates with iterator_specifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131554.744749-1-poulhies@adacore.com/mbox/"},{"id":186382,"url":"https://patchwork.plctlab.org/api/1.2/patches/186382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131556.744810-1-poulhies@adacore.com/","msgid":"<20240109131556.744810-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:56","name":"[COMMITTED] ada: Allow passing private types to generic formal incomplete types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131556.744810-1-poulhies@adacore.com/mbox/"},{"id":186371,"url":"https://patchwork.plctlab.org/api/1.2/patches/186371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131557.744875-1-poulhies@adacore.com/","msgid":"<20240109131557.744875-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:57","name":"[COMMITTED] ada: Minor change replacing \"not Present\" tests with \"No\" tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131557.744875-1-poulhies@adacore.com/mbox/"},{"id":186383,"url":"https://patchwork.plctlab.org/api/1.2/patches/186383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131559.744937-1-poulhies@adacore.com/","msgid":"<20240109131559.744937-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:59","name":"[COMMITTED] ada: Do not count comparison of addresses as a modification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131559.744937-1-poulhies@adacore.com/mbox/"},{"id":186379,"url":"https://patchwork.plctlab.org/api/1.2/patches/186379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131601.744998-1-poulhies@adacore.com/","msgid":"<20240109131601.744998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:16:00","name":"[COMMITTED] ada: Preliminary cleanup in aliasing support code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131601.744998-1-poulhies@adacore.com/mbox/"},{"id":186384,"url":"https://patchwork.plctlab.org/api/1.2/patches/186384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131602.745077-1-poulhies@adacore.com/","msgid":"<20240109131602.745077-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:16:02","name":"[COMMITTED] ada: Fix bogus Constraint_Error on allocator for access to array of access type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131602.745077-1-poulhies@adacore.com/mbox/"},{"id":186389,"url":"https://patchwork.plctlab.org/api/1.2/patches/186389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109133640.752216-1-poulhies@adacore.com/","msgid":"<20240109133640.752216-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:36:21","name":"[COMMITTED] ada: Document new SPARK aspect and pragma Always_Terminates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109133640.752216-1-poulhies@adacore.com/mbox/"},{"id":186463,"url":"https://patchwork.plctlab.org/api/1.2/patches/186463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109164659.1822407-1-hjl.tools@gmail.com/","msgid":"<20240109164659.1822407-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2024-01-09T16:46:59","name":"hwasan: Check if Intel LAM_U57 is enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109164659.1822407-1-hjl.tools@gmail.com/mbox/"},{"id":186469,"url":"https://patchwork.plctlab.org/api/1.2/patches/186469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ymbmewlenjtl77ddxvqzcdwpulgspxbimddcbnloo7hsfdpw6y@y5gsaomrxx6b/","msgid":"","list_archive_url":null,"date":"2024-01-09T16:49:34","name":"[2/7,v2] lto: Remove random_seed from section name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ymbmewlenjtl77ddxvqzcdwpulgspxbimddcbnloo7hsfdpw6y@y5gsaomrxx6b/mbox/"},{"id":186471,"url":"https://patchwork.plctlab.org/api/1.2/patches/186471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb5f51fa-dbbc-463f-968d-a28a71ecc535@gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T17:10:45","name":"[committed] Fix minor bug on mn103 port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb5f51fa-dbbc-463f-968d-a28a71ecc535@gmail.com/mbox/"},{"id":186473,"url":"https://patchwork.plctlab.org/api/1.2/patches/186473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d45fd0b5-9706-48a8-88df-f355904954a3@gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T17:19:37","name":"[committed] Fix minor bug in epiphany port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d45fd0b5-9706-48a8-88df-f355904954a3@gmail.com/mbox/"},{"id":186511,"url":"https://patchwork.plctlab.org/api/1.2/patches/186511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109172054.3968493-1-jwakely@redhat.com/","msgid":"<20240109172054.3968493-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T17:20:39","name":"[committed] libstdc++: Simplify some chrono formatters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109172054.3968493-1-jwakely@redhat.com/mbox/"},{"id":186562,"url":"https://patchwork.plctlab.org/api/1.2/patches/186562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3238326.AJdgDx1Vlc@fomalhaut/","msgid":"<3238326.AJdgDx1Vlc@fomalhaut>","list_archive_url":null,"date":"2024-01-09T20:17:29","name":"Fix debug info for enumeration types with reverse Scalar_Storage_Order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3238326.AJdgDx1Vlc@fomalhaut/mbox/"},{"id":186572,"url":"https://patchwork.plctlab.org/api/1.2/patches/186572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87plyauqmd.fsf@igel.home/","msgid":"<87plyauqmd.fsf@igel.home>","list_archive_url":null,"date":"2024-01-09T21:46:34","name":"Fix spurious match in extract_symvers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87plyauqmd.fsf@igel.home/mbox/"},{"id":186595,"url":"https://patchwork.plctlab.org/api/1.2/patches/186595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109215933.4054953-1-jwakely@redhat.com/","msgid":"<20240109215933.4054953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T21:57:25","name":"libstdc++: Prefer posix_memalign for aligned-new [PR113258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109215933.4054953-1-jwakely@redhat.com/mbox/"},{"id":186637,"url":"https://patchwork.plctlab.org/api/1.2/patches/186637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109234450.4142610-1-jwakely@redhat.com/","msgid":"<20240109234450.4142610-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T23:44:34","name":"[committed] libstdc++: Fix Unicode property detection functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109234450.4142610-1-jwakely@redhat.com/mbox/"},{"id":186625,"url":"https://patchwork.plctlab.org/api/1.2/patches/186625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109235210.605208-1-iii@linux.ibm.com/","msgid":"<20240109235210.605208-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-09T23:47:39","name":"[v2] rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109235210.605208-1-iii@linux.ibm.com/mbox/"},{"id":186641,"url":"https://patchwork.plctlab.org/api/1.2/patches/186641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110010005.463710-1-juzhe.zhong@rivai.ai/","msgid":"<20240110010005.463710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T01:00:05","name":"[Committed] RISC-V: Robostify dynamic lmul test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110010005.463710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186662,"url":"https://patchwork.plctlab.org/api/1.2/patches/186662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-2-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:56","name":"[V2,1/4,RFC] RISC-V: Add non-vector types to dfa pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-2-ewlu@rivosinc.com/mbox/"},{"id":186660,"url":"https://patchwork.plctlab.org/api/1.2/patches/186660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-3-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:57","name":"[V2,2/4,RFC] RISC-V: Add vector related reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-3-ewlu@rivosinc.com/mbox/"},{"id":186663,"url":"https://patchwork.plctlab.org/api/1.2/patches/186663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-4-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:58","name":"[V2,3/4,RFC] RISC-V: Use default cost model for insn scheduling for tests affected in PR113249","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-4-ewlu@rivosinc.com/mbox/"},{"id":186661,"url":"https://patchwork.plctlab.org/api/1.2/patches/186661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-5-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:59","name":"[V2,4/4,RFC] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-5-ewlu@rivosinc.com/mbox/"},{"id":186664,"url":"https://patchwork.plctlab.org/api/1.2/patches/186664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com/","msgid":"<1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com>","list_archive_url":null,"date":"2024-01-10T01:35:24","name":"[rs6000] Refactor expand_compare_loop and split it to two functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com/mbox/"},{"id":186665,"url":"https://patchwork.plctlab.org/api/1.2/patches/186665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013802.912942-1-juzhe.zhong@rivai.ai/","msgid":"<20240110013802.912942-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T01:38:02","name":"RISC-V: Minor tweak dynamic cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013802.912942-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186666,"url":"https://patchwork.plctlab.org/api/1.2/patches/186666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020210.2062140-1-hongtao.liu@intel.com/","msgid":"<20240110020210.2062140-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-10T02:02:10","name":"Update documents for fcf-protection=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020210.2062140-1-hongtao.liu@intel.com/mbox/"},{"id":186667,"url":"https://patchwork.plctlab.org/api/1.2/patches/186667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020445.23201-1-vapier@gentoo.org/","msgid":"<20240110020445.23201-1-vapier@gentoo.org>","list_archive_url":null,"date":"2024-01-10T02:04:45","name":"config: delete unused CYG_AC_PATH_LIBERTY macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020445.23201-1-vapier@gentoo.org/mbox/"},{"id":186669,"url":"https://patchwork.plctlab.org/api/1.2/patches/186669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110022249.1079-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110022249.1079-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T02:22:49","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110022249.1079-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186671,"url":"https://patchwork.plctlab.org/api/1.2/patches/186671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110023452.2312519-1-haochen.jiang@intel.com/","msgid":"<20240110023452.2312519-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-10T02:34:52","name":"Add -mevex512 into invoke.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110023452.2312519-1-haochen.jiang@intel.com/mbox/"},{"id":186674,"url":"https://patchwork.plctlab.org/api/1.2/patches/186674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com/","msgid":"<634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T02:57:39","name":"Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186677,"url":"https://patchwork.plctlab.org/api/1.2/patches/186677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110030650.1338056-1-juzhe.zhong@rivai.ai/","msgid":"<20240110030650.1338056-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T03:06:50","name":"[V2] RISC-V: Minor tweak dynamic cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110030650.1338056-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186683,"url":"https://patchwork.plctlab.org/api/1.2/patches/186683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110050538.2465410-1-juzhe.zhong@rivai.ai/","msgid":"<20240110050538.2465410-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T05:05:38","name":"RISC-V: Refine unsigned avg_floor/avg_ceil","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110050538.2465410-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186694,"url":"https://patchwork.plctlab.org/api/1.2/patches/186694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com/","msgid":"<446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com>","list_archive_url":null,"date":"2024-01-10T07:06:55","name":"[wwwdoc] gcc-14: Add arm cortex-m52 cpu support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com/mbox/"},{"id":186701,"url":"https://patchwork.plctlab.org/api/1.2/patches/186701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com/","msgid":"<5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T07:16:43","name":"Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186704,"url":"https://patchwork.plctlab.org/api/1.2/patches/186704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072459.8851-1-chenxiaolong@loongson.cn/","msgid":"<20240110072459.8851-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-10T07:24:59","name":"[v1] LoongArch: testsuite:Fixed a bug that added a target check error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072459.8851-1-chenxiaolong@loongson.cn/mbox/"},{"id":186703,"url":"https://patchwork.plctlab.org/api/1.2/patches/186703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072521.8916-1-chenxiaolong@loongson.cn/","msgid":"<20240110072521.8916-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-10T07:25:21","name":"[v2] LoongArch: testsuite:Added support for loongarch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072521.8916-1-chenxiaolong@loongson.cn/mbox/"},{"id":186705,"url":"https://patchwork.plctlab.org/api/1.2/patches/186705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d06bcdaa-52c5-4e43-9679-cff63bf4938c.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T07:26:44","name":"?????????Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d06bcdaa-52c5-4e43-9679-cff63bf4938c.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186706,"url":"https://patchwork.plctlab.org/api/1.2/patches/186706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cd3b62c3-1f15-4f8b-af72-eeb5b1f0376c.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T07:28:22","name":"Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cd3b62c3-1f15-4f8b-af72-eeb5b1f0376c.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186708,"url":"https://patchwork.plctlab.org/api/1.2/patches/186708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110073455.1656619-1-haochen.jiang@intel.com/","msgid":"<20240110073455.1656619-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-10T07:34:55","name":"i386: Add AVX10.1 related macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110073455.1656619-1-haochen.jiang@intel.com/mbox/"},{"id":186710,"url":"https://patchwork.plctlab.org/api/1.2/patches/186710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110074457.1749380-1-hongtao.liu@intel.com/","msgid":"<20240110074457.1749380-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-10T07:44:57","name":"Document refactoring of the option -fcf-protection=x.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110074457.1749380-1-hongtao.liu@intel.com/mbox/"},{"id":187019,"url":"https://patchwork.plctlab.org/api/1.2/patches/187019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-2-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:52","name":"[01/14] c++: Implement __is_integral built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187018,"url":"https://patchwork.plctlab.org/api/1.2/patches/187018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-3-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:53","name":"[02/14] libstdc++: Optimize std::is_integral compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-3-kmatsui@gcc.gnu.org/mbox/"},{"id":187020,"url":"https://patchwork.plctlab.org/api/1.2/patches/187020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-4-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:54","name":"[03/14] c++: Implement __is_floating_point built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-4-kmatsui@gcc.gnu.org/mbox/"},{"id":187010,"url":"https://patchwork.plctlab.org/api/1.2/patches/187010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-5-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:55","name":"[04/14] libstdc++: Optimize std::is_floating_point compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-5-kmatsui@gcc.gnu.org/mbox/"},{"id":187022,"url":"https://patchwork.plctlab.org/api/1.2/patches/187022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-6-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:56","name":"[05/14] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-6-kmatsui@gcc.gnu.org/mbox/"},{"id":187011,"url":"https://patchwork.plctlab.org/api/1.2/patches/187011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-7-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:57","name":"[06/14] libstdc++: Optimize std::is_arithmetic compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-7-kmatsui@gcc.gnu.org/mbox/"},{"id":187017,"url":"https://patchwork.plctlab.org/api/1.2/patches/187017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-8-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:58","name":"[07/14] libstdc++: Optimize std::is_fundamental compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-8-kmatsui@gcc.gnu.org/mbox/"},{"id":187016,"url":"https://patchwork.plctlab.org/api/1.2/patches/187016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-9-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:59","name":"[08/14] libstdc++: Optimize std::is_compound compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-9-kmatsui@gcc.gnu.org/mbox/"},{"id":187013,"url":"https://patchwork.plctlab.org/api/1.2/patches/187013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-10-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:00","name":"[09/14] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-10-kmatsui@gcc.gnu.org/mbox/"},{"id":187009,"url":"https://patchwork.plctlab.org/api/1.2/patches/187009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-11-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:01","name":"[10/14] libstdc++: Optimize std::is_unsigned compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-11-kmatsui@gcc.gnu.org/mbox/"},{"id":187015,"url":"https://patchwork.plctlab.org/api/1.2/patches/187015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-12-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:02","name":"[11/14] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-12-kmatsui@gcc.gnu.org/mbox/"},{"id":187021,"url":"https://patchwork.plctlab.org/api/1.2/patches/187021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-13-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:03","name":"[12/14] libstdc++: Optimize std::is_signed compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-13-kmatsui@gcc.gnu.org/mbox/"},{"id":187012,"url":"https://patchwork.plctlab.org/api/1.2/patches/187012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-14-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:04","name":"[13/14] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-14-kmatsui@gcc.gnu.org/mbox/"},{"id":187014,"url":"https://patchwork.plctlab.org/api/1.2/patches/187014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-15-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:05","name":"[14/14] libstdc++: Optimize std::is_scalar compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-15-kmatsui@gcc.gnu.org/mbox/"},{"id":186725,"url":"https://patchwork.plctlab.org/api/1.2/patches/186725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110092737.1238-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110092737.1238-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:27:36","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110092737.1238-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186726,"url":"https://patchwork.plctlab.org/api/1.2/patches/186726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110093141.1291-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110093141.1291-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:31:41","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110093141.1291-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186728,"url":"https://patchwork.plctlab.org/api/1.2/patches/186728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ5m3bq5IlVoU9fK@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T09:43:57","name":"sra: Partial fix for BITINT_TYPEs [PR113120]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ5m3bq5IlVoU9fK@tucnak/mbox/"},{"id":186744,"url":"https://patchwork.plctlab.org/api/1.2/patches/186744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com/","msgid":"<4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:55:16","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186748,"url":"https://patchwork.plctlab.org/api/1.2/patches/186748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110095828.3863165-1-juzhe.zhong@rivai.ai/","msgid":"<20240110095828.3863165-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T09:58:28","name":"RISC-V: Switch RVV cost model to generic vector cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110095828.3863165-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186794,"url":"https://patchwork.plctlab.org/api/1.2/patches/186794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com/","msgid":"<09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T11:06:06","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186798,"url":"https://patchwork.plctlab.org/api/1.2/patches/186798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3295706-8095-4dc3-8a8e-26c9a9bb50f1.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T11:08:53","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3295706-8095-4dc3-8a8e-26c9a9bb50f1.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186805,"url":"https://patchwork.plctlab.org/api/1.2/patches/186805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com/","msgid":"<514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T11:14:12","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186804,"url":"https://patchwork.plctlab.org/api/1.2/patches/186804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ58BGhG67Pw0tY6@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T11:14:12","name":"libgomp, v2: Use absolute pathname to testsuite/flock [PR113192]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ58BGhG67Pw0tY6@tucnak/mbox/"},{"id":186857,"url":"https://patchwork.plctlab.org/api/1.2/patches/186857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ6MFMMbnTl6jlOk@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T12:22:44","name":"[v2] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ6MFMMbnTl6jlOk@arm.com/mbox/"},{"id":186862,"url":"https://patchwork.plctlab.org/api/1.2/patches/186862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110130318.976927-1-julian@codesourcery.com/","msgid":"<20240110130318.976927-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-10T13:03:18","name":"OpenMP: Fix new lvalue-parsing map/to/from tests for 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110130318.976927-1-julian@codesourcery.com/mbox/"},{"id":186864,"url":"https://patchwork.plctlab.org/api/1.2/patches/186864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110131448.989596-1-julian@codesourcery.com/","msgid":"<20240110131448.989596-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-10T13:14:48","name":"OpenMP: Fix g++.dg/gomp/bad-array-section-10.C for C++23 and up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110131448.989596-1-julian@codesourcery.com/mbox/"},{"id":186882,"url":"https://patchwork.plctlab.org/api/1.2/patches/186882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-1-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:03","name":"[pushed,1/3] pretty-print: add selftest coverage for numbered args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-1-dmalcolm@redhat.com/mbox/"},{"id":186884,"url":"https://patchwork.plctlab.org/api/1.2/patches/186884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-2-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:04","name":"[pushed,2/3] pretty-print: support urlification in phase 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-2-dmalcolm@redhat.com/mbox/"},{"id":186883,"url":"https://patchwork.plctlab.org/api/1.2/patches/186883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-3-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:05","name":"[pushed,3/3] gcc-urlifier: handle option prefixes such as '\''-fno-'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-3-dmalcolm@redhat.com/mbox/"},{"id":186917,"url":"https://patchwork.plctlab.org/api/1.2/patches/186917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110142702.6AEDA3857C62@sourceware.org/","msgid":"<20240110142702.6AEDA3857C62@sourceware.org>","list_archive_url":null,"date":"2024-01-10T14:21:13","name":"tree-optimization/113078 - conditional subtraction reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110142702.6AEDA3857C62@sourceware.org/mbox/"},{"id":186920,"url":"https://patchwork.plctlab.org/api/1.2/patches/186920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110143244.7CF7C385DC1C@sourceware.org/","msgid":"<20240110143244.7CF7C385DC1C@sourceware.org>","list_archive_url":null,"date":"2024-01-10T14:25:57","name":"middle-end/112740 - vector boolean CTOR expansion issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110143244.7CF7C385DC1C@sourceware.org/mbox/"},{"id":186941,"url":"https://patchwork.plctlab.org/api/1.2/patches/186941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110154521.146111-1-juzhe.zhong@rivai.ai/","msgid":"<20240110154521.146111-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T15:45:21","name":"[V2] RISC-V: Switch RVV cost model.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110154521.146111-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186948,"url":"https://patchwork.plctlab.org/api/1.2/patches/186948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ7D2DRQbU1cWJcp@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T16:20:40","name":"[committed] testsuite: Add testcase for already fixed PR [PR112734]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ7D2DRQbU1cWJcp@tucnak/mbox/"},{"id":186954,"url":"https://patchwork.plctlab.org/api/1.2/patches/186954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401101525220.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-10T16:40:55","name":"[committed] RISC-V/testsuite: Fix comment termination in pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401101525220.5892@tpp.orcam.me.uk/mbox/"},{"id":187086,"url":"https://patchwork.plctlab.org/api/1.2/patches/187086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ8H6HIA1GDmR2T/@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T21:11:04","name":"[v3] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ8H6HIA1GDmR2T/@arm.com/mbox/"},{"id":187090,"url":"https://patchwork.plctlab.org/api/1.2/patches/187090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659F0AAE000252DE0C340001@message.bloomberg.net/","msgid":"<659F0AAE000252DE0C340001@message.bloomberg.net>","list_archive_url":null,"date":"2024-01-10T21:22:54","name":"libstdc++: std/ranges - Remove a duplicate define directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659F0AAE000252DE0C340001@message.bloomberg.net/mbox/"},{"id":187091,"url":"https://patchwork.plctlab.org/api/1.2/patches/187091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b294d87f-8994-4d8d-8498-943784df4415@jguk.org/","msgid":"","list_archive_url":null,"date":"2024-01-10T21:25:28","name":"[v2] gcc/doc: spelling mistakes and example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b294d87f-8994-4d8d-8498-943784df4415@jguk.org/mbox/"},{"id":187092,"url":"https://patchwork.plctlab.org/api/1.2/patches/187092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org/","msgid":"<74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org>","list_archive_url":null,"date":"2024-01-10T21:28:09","name":"[v2] : gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org/mbox/"},{"id":187102,"url":"https://patchwork.plctlab.org/api/1.2/patches/187102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110214007.2478417-1-ppalka@redhat.com/","msgid":"<20240110214007.2478417-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-10T21:40:07","name":"libstdc++/ranges: Use perfect forwarding in _Pipe and _Partial ctors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110214007.2478417-1-ppalka@redhat.com/mbox/"},{"id":187104,"url":"https://patchwork.plctlab.org/api/1.2/patches/187104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110220813.2501087-1-ppalka@redhat.com/","msgid":"<20240110220813.2501087-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-10T22:08:13","name":"libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT for _Nth_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110220813.2501087-1-ppalka@redhat.com/mbox/"},{"id":187099,"url":"https://patchwork.plctlab.org/api/1.2/patches/187099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-80e5478a-8a63-4954-a58d-6a37b29fc223-1704925462311@3c-app-gmx-bap04/","msgid":"","list_archive_url":null,"date":"2024-01-10T22:24:22","name":"Fortran: annotations for DO CONCURRENT loops [PR113305]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-80e5478a-8a63-4954-a58d-6a37b29fc223-1704925462311@3c-app-gmx-bap04/mbox/"},{"id":187115,"url":"https://patchwork.plctlab.org/api/1.2/patches/187115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A8288448AC9BB7DA2517F7692@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T23:42:45","name":"PING: [PATCH] Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A8288448AC9BB7DA2517F7692@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":187123,"url":"https://patchwork.plctlab.org/api/1.2/patches/187123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111002623.2514687-1-ppalka@redhat.com/","msgid":"<20240111002623.2514687-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-11T00:26:23","name":"libstdc++/ranges: Use C++23 deducing this for _Pipe and _Partial","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111002623.2514687-1-ppalka@redhat.com/mbox/"},{"id":187120,"url":"https://patchwork.plctlab.org/api/1.2/patches/187120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111010710.354540-1-yangyujie@loongson.cn/","msgid":"<20240111010710.354540-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:07:10","name":"[v2] LoongArch: Implement option save/restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111010710.354540-1-yangyujie@loongson.cn/mbox/"},{"id":187124,"url":"https://patchwork.plctlab.org/api/1.2/patches/187124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012045.354659-1-yangyujie@loongson.cn/","msgid":"<20240111012045.354659-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:20:45","name":"LoongArch: Split loongarch_option_override_internal into smaller procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012045.354659-1-yangyujie@loongson.cn/mbox/"},{"id":187130,"url":"https://patchwork.plctlab.org/api/1.2/patches/187130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012810.354901-1-yangyujie@loongson.cn/","msgid":"<20240111012810.354901-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:28:10","name":"[v2] LoongArch: Split loongarch_option_override_internal into smaller procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012810.354901-1-yangyujie@loongson.cn/mbox/"},{"id":187119,"url":"https://patchwork.plctlab.org/api/1.2/patches/187119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111013842.925454-1-pan2.li@intel.com/","msgid":"<20240111013842.925454-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-11T01:38:42","name":"[v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111013842.925454-1-pan2.li@intel.com/mbox/"},{"id":187148,"url":"https://patchwork.plctlab.org/api/1.2/patches/187148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111024223.264227-1-juzhe.zhong@rivai.ai/","msgid":"<20240111024223.264227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T02:42:23","name":"RISC-V: VLA preempts VLS on unknown NITERS loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111024223.264227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187154,"url":"https://patchwork.plctlab.org/api/1.2/patches/187154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111034415.431657-1-maskray@google.com/","msgid":"<20240111034415.431657-1-maskray@google.com>","list_archive_url":null,"date":"2024-01-11T03:44:15","name":"i386: Add \"z\" constraint for symbolic address/label reference [PR105576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111034415.431657-1-maskray@google.com/mbox/"},{"id":187163,"url":"https://patchwork.plctlab.org/api/1.2/patches/187163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111041416.4172875-1-kmatsui@gcc.gnu.org/","msgid":"<20240111041416.4172875-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T04:14:16","name":"[committed] libstdc++: Optimize std::is_compound compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111041416.4172875-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187166,"url":"https://patchwork.plctlab.org/api/1.2/patches/187166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111042343.1172849-1-quic_apinski@quicinc.com/","msgid":"<20240111042343.1172849-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-11T04:23:43","name":"match: Delay folding of 1/x into `(x+1u)<2u?x:0` until late [PR113301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111042343.1172849-1-quic_apinski@quicinc.com/mbox/"},{"id":187174,"url":"https://patchwork.plctlab.org/api/1.2/patches/187174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659f86dd.050a0220.c8110.0a09@mx.google.com/","msgid":"<659f86dd.050a0220.c8110.0a09@mx.google.com>","list_archive_url":null,"date":"2024-01-11T06:12:41","name":"c++/modules: Support thread_local statics in header modules [PR113292]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659f86dd.050a0220.c8110.0a09@mx.google.com/mbox/"},{"id":187179,"url":"https://patchwork.plctlab.org/api/1.2/patches/187179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111062222.525186-1-kmatsui@gcc.gnu.org/","msgid":"<20240111062222.525186-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T06:22:22","name":"libstdc++: Fix error handling for std::filesystem::equivalent [PR113250]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111062222.525186-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187220,"url":"https://patchwork.plctlab.org/api/1.2/patches/187220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111075915.45BB13861821@sourceware.org/","msgid":"<20240111075915.45BB13861821@sourceware.org>","list_archive_url":null,"date":"2024-01-11T07:53:27","name":"tree-optimization/111003 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111075915.45BB13861821@sourceware.org/mbox/"},{"id":187223,"url":"https://patchwork.plctlab.org/api/1.2/patches/187223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ+kwBq3N0gXC/LO@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-11T08:20:16","name":"libgcc: Use may_alias attribute in bitint handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ+kwBq3N0gXC/LO@tucnak/mbox/"},{"id":187234,"url":"https://patchwork.plctlab.org/api/1.2/patches/187234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111082329.1198064-1-juzhe.zhong@rivai.ai/","msgid":"<20240111082329.1198064-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T08:23:29","name":"RISC-V: Increase scalar_to_vec_cost from 1 to 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111082329.1198064-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187236,"url":"https://patchwork.plctlab.org/api/1.2/patches/187236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/edc970c5-024a-4466-a0fe-9d237b9316c2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T08:28:59","name":"[rs6000] Eliminate unnecessary byte swaps for block clear on P8 LE [PR113325]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/edc970c5-024a-4466-a0fe-9d237b9316c2@linux.ibm.com/mbox/"},{"id":187241,"url":"https://patchwork.plctlab.org/api/1.2/patches/187241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111084640.1397-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111084640.1397-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T08:46:40","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111084640.1397-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187242,"url":"https://patchwork.plctlab.org/api/1.2/patches/187242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111085043.1246942-1-pan2.li@intel.com/","msgid":"<20240111085043.1246942-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-11T08:50:43","name":"[v5] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111085043.1246942-1-pan2.li@intel.com/mbox/"},{"id":187260,"url":"https://patchwork.plctlab.org/api/1.2/patches/187260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111090609.1043115-1-kito.cheng@sifive.com/","msgid":"<20240111090609.1043115-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-11T09:06:09","name":"RISC-V: Documnet the list of supported extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111090609.1043115-1-kito.cheng@sifive.com/mbox/"},{"id":187261,"url":"https://patchwork.plctlab.org/api/1.2/patches/187261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a25951ff-b66f-46ff-ad4f-46398f32cae6.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:11:09","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a25951ff-b66f-46ff-ad4f-46398f32cae6.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187262,"url":"https://patchwork.plctlab.org/api/1.2/patches/187262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5c1ab2b-5a15-4dd9-9bc1-c69d5b852f73.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:14:23","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5c1ab2b-5a15-4dd9-9bc1-c69d5b852f73.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187263,"url":"https://patchwork.plctlab.org/api/1.2/patches/187263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b04e4d2b-e8b3-4233-8a32-66144d8a5c3d.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:21:48","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b04e4d2b-e8b3-4233-8a32-66144d8a5c3d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187265,"url":"https://patchwork.plctlab.org/api/1.2/patches/187265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff66ca2e-d5c5-474d-af6c-7dcf37efb07e.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:26:20","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff66ca2e-d5c5-474d-af6c-7dcf37efb07e.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187266,"url":"https://patchwork.plctlab.org/api/1.2/patches/187266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com/","msgid":"<0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:29:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187269,"url":"https://patchwork.plctlab.org/api/1.2/patches/187269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d99c1d06-b029-4997-bb0b-9b886901220b.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:35:39","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d99c1d06-b029-4997-bb0b-9b886901220b.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187270,"url":"https://patchwork.plctlab.org/api/1.2/patches/187270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com/","msgid":"<5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:38:00","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187271,"url":"https://patchwork.plctlab.org/api/1.2/patches/187271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-1-kmatsui@gcc.gnu.org/","msgid":"<20240111094038.876653-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:40:37","name":"[v2,1/2] libstdc++: Fix error handling in filesystem::equivalent [PR113250]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187272,"url":"https://patchwork.plctlab.org/api/1.2/patches/187272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-2-kmatsui@gcc.gnu.org/","msgid":"<20240111094038.876653-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:40:38","name":"[v2,2/2] libstdc++: Use using instead of typedef in opts-common.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187275,"url":"https://patchwork.plctlab.org/api/1.2/patches/187275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095210.1450-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111095210.1450-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:52:10","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095210.1450-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187276,"url":"https://patchwork.plctlab.org/api/1.2/patches/187276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6c4cd7-993d-43f2-a3c2-541f13bbbf1f.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:54:09","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6c4cd7-993d-43f2-a3c2-541f13bbbf1f.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187277,"url":"https://patchwork.plctlab.org/api/1.2/patches/187277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095922.2148110-1-syq@gcc.gnu.org/","msgid":"<20240111095922.2148110-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:59:21","name":"[commit] MIPS: Add ATTRIBUTE_UNUSED to mips_start_function_definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095922.2148110-1-syq@gcc.gnu.org/mbox/"},{"id":187280,"url":"https://patchwork.plctlab.org/api/1.2/patches/187280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111101202.952224-2-kmatsui@gcc.gnu.org/","msgid":"<20240111101202.952224-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T10:12:02","name":"[v3,2/2] libstdc++: Use using instead of typedef in opts-common.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111101202.952224-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187284,"url":"https://patchwork.plctlab.org/api/1.2/patches/187284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111103217.1306207-1-quic_apinski@quicinc.com/","msgid":"<20240111103217.1306207-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-11T10:32:17","name":"expr: Limit the store flag optimization for single bit to non-vectors [PR113322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111103217.1306207-1-quic_apinski@quicinc.com/mbox/"},{"id":187298,"url":"https://patchwork.plctlab.org/api/1.2/patches/187298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e75feb-9a34-4fce-845e-536ae3ed43c0.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T10:54:50","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e75feb-9a34-4fce-845e-536ae3ed43c0.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187305,"url":"https://patchwork.plctlab.org/api/1.2/patches/187305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111110322.1503-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111110322.1503-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T11:03:22","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111110322.1503-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187314,"url":"https://patchwork.plctlab.org/api/1.2/patches/187314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113619.2063055-1-liwei@loongson.cn/","msgid":"<20240111113619.2063055-1-liwei@loongson.cn>","list_archive_url":null,"date":"2024-01-11T11:36:19","name":"[v2,1/2] LoongArch: Redundant sign extension elimination optimization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113619.2063055-1-liwei@loongson.cn/mbox/"},{"id":187315,"url":"https://patchwork.plctlab.org/api/1.2/patches/187315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113633.2063159-1-liwei@loongson.cn/","msgid":"<20240111113633.2063159-1-liwei@loongson.cn>","list_archive_url":null,"date":"2024-01-11T11:36:33","name":"[v2,2/2] LoongArch: Redundant sign extension elimination optimization 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113633.2063159-1-liwei@loongson.cn/mbox/"},{"id":187317,"url":"https://patchwork.plctlab.org/api/1.2/patches/187317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ_Tlecj-1lW6uN_@elastic.org/","msgid":"","list_archive_url":null,"date":"2024-01-11T11:40:05","name":"[wwwdocs] tweak for sourceware account request alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ_Tlecj-1lW6uN_@elastic.org/mbox/"},{"id":187347,"url":"https://patchwork.plctlab.org/api/1.2/patches/187347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com/","msgid":"<801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T12:05:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187359,"url":"https://patchwork.plctlab.org/api/1.2/patches/187359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c51e9768-8ff2-498b-aac7-5b2a4cd26142.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T12:18:22","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c51e9768-8ff2-498b-aac7-5b2a4cd26142.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187364,"url":"https://patchwork.plctlab.org/api/1.2/patches/187364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com/","msgid":"<2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T12:31:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187365,"url":"https://patchwork.plctlab.org/api/1.2/patches/187365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf5f8efe-48aa-4488-92c3-fed6cf5d80a3.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T12:36:52","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf5f8efe-48aa-4488-92c3-fed6cf5d80a3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187399,"url":"https://patchwork.plctlab.org/api/1.2/patches/187399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111124909.208285-1-jwakely@redhat.com/","msgid":"<20240111124909.208285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T12:48:32","name":"[wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111124909.208285-1-jwakely@redhat.com/mbox/"},{"id":187396,"url":"https://patchwork.plctlab.org/api/1.2/patches/187396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111125046.208397-1-jwakely@redhat.com/","msgid":"<20240111125046.208397-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T12:49:20","name":"[wwwdocs] Document additional symbols in libstdc++exp.a for GCC 13.3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111125046.208397-1-jwakely@redhat.com/mbox/"},{"id":187382,"url":"https://patchwork.plctlab.org/api/1.2/patches/187382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de/","msgid":"<693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de>","list_archive_url":null,"date":"2024-01-11T13:39:20","name":"[avr,applied] Small improvements to texi documentation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de/mbox/"},{"id":187384,"url":"https://patchwork.plctlab.org/api/1.2/patches/187384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111135012.8A68B3857BB0@sourceware.org/","msgid":"<20240111135012.8A68B3857BB0@sourceware.org>","list_archive_url":null,"date":"2024-01-11T13:44:18","name":"tree-optimization/112636 - estimate niters before header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111135012.8A68B3857BB0@sourceware.org/mbox/"},{"id":187385,"url":"https://patchwork.plctlab.org/api/1.2/patches/187385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111134948.3112510-1-juzhe.zhong@rivai.ai/","msgid":"<20240111134948.3112510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T13:49:48","name":"[V2] RISC-V: Adjust scalar_to_vec cost accurately","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111134948.3112510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187392,"url":"https://patchwork.plctlab.org/api/1.2/patches/187392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111140407.E34013857BB0@sourceware.org/","msgid":"<20240111140407.E34013857BB0@sourceware.org>","list_archive_url":null,"date":"2024-01-11T13:58:23","name":"[s390] target/112280 - properly guard permute query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111140407.E34013857BB0@sourceware.org/mbox/"},{"id":187394,"url":"https://patchwork.plctlab.org/api/1.2/patches/187394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141328.AB719386186A@sourceware.org/","msgid":"<20240111141328.AB719386186A@sourceware.org>","list_archive_url":null,"date":"2024-01-11T14:07:34","name":"tree-optimization/112505 - bit-precision induction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141328.AB719386186A@sourceware.org/mbox/"},{"id":187395,"url":"https://patchwork.plctlab.org/api/1.2/patches/187395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141340.7F7D738618AB@sourceware.org/","msgid":"<20240111141340.7F7D738618AB@sourceware.org>","list_archive_url":null,"date":"2024-01-11T14:07:45","name":"tree-optimization/113126 - vector extension compare optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141340.7F7D738618AB@sourceware.org/mbox/"},{"id":187393,"url":"https://patchwork.plctlab.org/api/1.2/patches/187393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c05200b5-0d3d-4a9c-b67b-f9a98bc24c2e.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T14:11:11","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c05200b5-0d3d-4a9c-b67b-f9a98bc24c2e.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187401,"url":"https://patchwork.plctlab.org/api/1.2/patches/187401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-3-arthur.cohen@embecosm.com/","msgid":"<20240111142355.1110429-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:22:08","name":"[1/2] gccrs: fixup: Fix bootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-3-arthur.cohen@embecosm.com/mbox/"},{"id":187400,"url":"https://patchwork.plctlab.org/api/1.2/patches/187400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-4-arthur.cohen@embecosm.com/","msgid":"<20240111142355.1110429-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:22:09","name":"[2/2] gccrs: fixup: Fix missing build dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-4-arthur.cohen@embecosm.com/mbox/"},{"id":187402,"url":"https://patchwork.plctlab.org/api/1.2/patches/187402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com/","msgid":"<937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com>","list_archive_url":null,"date":"2024-01-11T14:35:10","name":"[pushed,PR112918,LRA] : Fixing IRA ICE on m68k","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com/mbox/"},{"id":187407,"url":"https://patchwork.plctlab.org/api/1.2/patches/187407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111144118.274895-2-mary.bennett@embecosm.com/","msgid":"<20240111144118.274895-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:41:18","name":"[v2,1/1] RISC-V: Add support for XCVmem extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111144118.274895-2-mary.bennett@embecosm.com/mbox/"},{"id":187425,"url":"https://patchwork.plctlab.org/api/1.2/patches/187425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de/","msgid":"<7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de>","list_archive_url":null,"date":"2024-01-11T15:35:53","name":"[avr,applied] invoke.texi: Move avr internal options to their own @subsubsection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de/mbox/"},{"id":187429,"url":"https://patchwork.plctlab.org/api/1.2/patches/187429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111155202.1518245-1-jason@redhat.com/","msgid":"<20240111155202.1518245-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T15:52:02","name":"testsuite: remove xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111155202.1518245-1-jason@redhat.com/mbox/"},{"id":187461,"url":"https://patchwork.plctlab.org/api/1.2/patches/187461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com/","msgid":"<1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com>","list_archive_url":null,"date":"2024-01-11T16:03:15","name":"libstdc++: use updated type for __unexpected_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com/mbox/"},{"id":187459,"url":"https://patchwork.plctlab.org/api/1.2/patches/187459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaAlc7laA0EbGjRn@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-11T17:29:23","name":"[V2] PR target/112886, Add %S to print_operand for vector pair support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaAlc7laA0EbGjRn@cowardly-lion.the-meissners.org/mbox/"},{"id":187471,"url":"https://patchwork.plctlab.org/api/1.2/patches/187471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111175837.420604-1-jwakely@redhat.com/","msgid":"<20240111175837.420604-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T17:56:46","name":"[committed] libstdc++: Add GDB printer for std::integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111175837.420604-1-jwakely@redhat.com/mbox/"},{"id":187474,"url":"https://patchwork.plctlab.org/api/1.2/patches/187474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111180442.421194-1-jwakely@redhat.com/","msgid":"<20240111180442.421194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T18:03:21","name":"libstdc++: Make PSTL algorithms accept C++20 iterators [PR110512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111180442.421194-1-jwakely@redhat.com/mbox/"},{"id":187469,"url":"https://patchwork.plctlab.org/api/1.2/patches/187469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111182425.547195-1-maskray@google.com/","msgid":"<20240111182425.547195-1-maskray@google.com>","list_archive_url":null,"date":"2024-01-11T18:24:25","name":"i386: Add \"Ws\" constraint for symbolic address/label reference [PR105576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111182425.547195-1-maskray@google.com/mbox/"},{"id":187481,"url":"https://patchwork.plctlab.org/api/1.2/patches/187481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201346.566341-1-julian@codesourcery.com/","msgid":"<20240111201346.566341-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-11T20:13:46","name":"OpenMP 5.1: WIP delimited (begin/end) '\''declare variant'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201346.566341-1-julian@codesourcery.com/mbox/"},{"id":187492,"url":"https://patchwork.plctlab.org/api/1.2/patches/187492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201900.491691-1-jwakely@redhat.com/","msgid":"<20240111201900.491691-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T20:18:29","name":"[committed] libstdc++: Document addition of libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201900.491691-1-jwakely@redhat.com/mbox/"},{"id":187496,"url":"https://patchwork.plctlab.org/api/1.2/patches/187496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111202352.513513-1-jwakely@redhat.com/","msgid":"<20240111202352.513513-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T20:23:07","name":"libstdc++: Fix std::runtime_format deviations from the spec [PR113320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111202352.513513-1-jwakely@redhat.com/mbox/"},{"id":187487,"url":"https://patchwork.plctlab.org/api/1.2/patches/187487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSmw7cVkTP6w9gwQDH2u48XQCciJLGr2G3qABzMpq2PmMQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T20:34:33","name":"[v2] c++: side effect in nullptr_t conversion fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSmw7cVkTP6w9gwQDH2u48XQCciJLGr2G3qABzMpq2PmMQ@mail.gmail.com/mbox/"},{"id":187503,"url":"https://patchwork.plctlab.org/api/1.2/patches/187503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111212819.533282-1-jwakely@redhat.com/","msgid":"<20240111212819.533282-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T21:26:52","name":"[committed] libstdc++: Fix spelling mistake in new doc addition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111212819.533282-1-jwakely@redhat.com/mbox/"},{"id":187497,"url":"https://patchwork.plctlab.org/api/1.2/patches/187497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111213310.1566285-1-jason@redhat.com/","msgid":"<20240111213310.1566285-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T21:33:10","name":"[RFC] codingconventions: add lambda guidelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111213310.1566285-1-jason@redhat.com/mbox/"},{"id":187502,"url":"https://patchwork.plctlab.org/api/1.2/patches/187502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111220148.1575375-1-jason@redhat.com/","msgid":"<20240111220148.1575375-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T22:01:48","name":"[pushed] c++: corresponding object parms [PR113191]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111220148.1575375-1-jason@redhat.com/mbox/"},{"id":187508,"url":"https://patchwork.plctlab.org/api/1.2/patches/187508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111221651.585639-1-jwakely@redhat.com/","msgid":"<20240111221651.585639-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T22:16:35","name":"libstdc++: Implement P2255R2 dangling checks for std::tuple [PR108822]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111221651.585639-1-jwakely@redhat.com/mbox/"},{"id":187505,"url":"https://patchwork.plctlab.org/api/1.2/patches/187505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111230548.623208-1-jwakely@redhat.com/","msgid":"<20240111230548.623208-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T23:04:29","name":"libstdc++: Fix non-portable results from 64-bit std::subtract_with_carry_engine [PR107466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111230548.623208-1-jwakely@redhat.com/mbox/"},{"id":187510,"url":"https://patchwork.plctlab.org/api/1.2/patches/187510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112306560.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:35:37","name":"[1/2] RISC-V/testsuite: Widen coverage for pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112306560.5892@tpp.orcam.me.uk/mbox/"},{"id":187511,"url":"https://patchwork.plctlab.org/api/1.2/patches/187511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112325170.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:35:49","name":"[2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112325170.5892@tpp.orcam.me.uk/mbox/"},{"id":187515,"url":"https://patchwork.plctlab.org/api/1.2/patches/187515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce5b809b30de16c037120c35859e5180903aa949.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:42:43","name":"libgccjit: Fix float playback for cross-compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce5b809b30de16c037120c35859e5180903aa949.camel@zoho.com/mbox/"},{"id":187528,"url":"https://patchwork.plctlab.org/api/1.2/patches/187528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com/","msgid":"<98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T00:49:58","name":"?????????Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187533,"url":"https://patchwork.plctlab.org/api/1.2/patches/187533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112013511.24964-1-wangfeng@eswincomputing.com/","msgid":"<20240112013511.24964-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-12T01:35:11","name":"RISC-V: Modify ABI-name length of vfloat16m8_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112013511.24964-1-wangfeng@eswincomputing.com/mbox/"},{"id":187542,"url":"https://patchwork.plctlab.org/api/1.2/patches/187542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015205.4402-1-chenxiaolong@loongson.cn/","msgid":"<20240112015205.4402-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-12T01:52:05","name":"[v1] LoongArch: testsuite:Added additional vectorization \"-mlsx\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015205.4402-1-chenxiaolong@loongson.cn/mbox/"},{"id":187543,"url":"https://patchwork.plctlab.org/api/1.2/patches/187543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015224.4476-1-chenxiaolong@loongson.cn/","msgid":"<20240112015224.4476-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-12T01:52:24","name":"[v1] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015224.4476-1-chenxiaolong@loongson.cn/mbox/"},{"id":187548,"url":"https://patchwork.plctlab.org/api/1.2/patches/187548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112022543.1380261-1-haochen.jiang@intel.com/","msgid":"<20240112022543.1380261-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-12T02:25:43","name":"i386: Remove redundant move in vnni pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112022543.1380261-1-haochen.jiang@intel.com/mbox/"},{"id":187554,"url":"https://patchwork.plctlab.org/api/1.2/patches/187554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112025215.1776738-1-pan2.li@intel.com/","msgid":"<20240112025215.1776738-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-12T02:52:15","name":"[v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112025215.1776738-1-pan2.li@intel.com/mbox/"},{"id":187557,"url":"https://patchwork.plctlab.org/api/1.2/patches/187557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032029.1609-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240112032029.1609-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:20:29","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032029.1609-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187558,"url":"https://patchwork.plctlab.org/api/1.2/patches/187558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032210.1715-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240112032210.1715-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:22:10","name":"[v6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032210.1715-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187559,"url":"https://patchwork.plctlab.org/api/1.2/patches/187559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com/","msgid":"<9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:26:35","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187567,"url":"https://patchwork.plctlab.org/api/1.2/patches/187567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112045633.2643599-1-sandra@codesourcery.com/","msgid":"<20240112045633.2643599-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-12T04:56:32","name":"[Committed] libgcc, nios2: Fix exception handling on nios2 with -fpic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112045633.2643599-1-sandra@codesourcery.com/mbox/"},{"id":187584,"url":"https://patchwork.plctlab.org/api/1.2/patches/187584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com/","msgid":"<166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com>","list_archive_url":null,"date":"2024-01-12T06:48:44","name":"[rs6000] Enable block compare expand on P9 with m32 and mpowerpc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com/mbox/"},{"id":187600,"url":"https://patchwork.plctlab.org/api/1.2/patches/187600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112074035.3683903-1-juzhe.zhong@rivai.ai/","msgid":"<20240112074035.3683903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-12T07:40:35","name":"[Committed] RISC-V: Enhance a testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112074035.3683903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187602,"url":"https://patchwork.plctlab.org/api/1.2/patches/187602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112085025.641DA136A4@imap1.dmz-prg2.suse.org/","msgid":"<20240112085025.641DA136A4@imap1.dmz-prg2.suse.org>","list_archive_url":null,"date":"2024-01-12T08:50:16","name":"middle-end/113344 - is_truth_type_for vs GENERIC tcc_comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112085025.641DA136A4@imap1.dmz-prg2.suse.org/mbox/"},{"id":187625,"url":"https://patchwork.plctlab.org/api/1.2/patches/187625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112092844.260890-1-juzhe.zhong@rivai.ai/","msgid":"<20240112092844.260890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-12T09:28:44","name":"[V3] RISC-V: Adjust scalar_to_vec cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112092844.260890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187627,"url":"https://patchwork.plctlab.org/api/1.2/patches/187627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEGUldmPTM5d31b@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:28:51","name":"c: Avoid _BitInt indexes > sizetype in ARRAY_REFs [PR113315]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEGUldmPTM5d31b@tucnak/mbox/"},{"id":187628,"url":"https://patchwork.plctlab.org/api/1.2/patches/187628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEHikflGhduPrnv@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:34:04","name":"lower-bitint: Fix up handling of uninitialized large/huge _BitInt call arguments [PR113316]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEHikflGhduPrnv@tucnak/mbox/"},{"id":187630,"url":"https://patchwork.plctlab.org/api/1.2/patches/187630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEIaLhkFP2KOwCC@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:37:46","name":"lower-bitint: Fix a typo in a condition [PR113323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEIaLhkFP2KOwCC@tucnak/mbox/"},{"id":187631,"url":"https://patchwork.plctlab.org/api/1.2/patches/187631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:43:27","name":"sra: Punt for too large _BitInt accesses [PR113330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"},{"id":187700,"url":"https://patchwork.plctlab.org/api/1.2/patches/187700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094507.683543-1-jwakely@redhat.com/","msgid":"<20240112094507.683543-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T09:44:52","name":"[committed] libstdc++: Fix incorrect PR number in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094507.683543-1-jwakely@redhat.com/mbox/"},{"id":187707,"url":"https://patchwork.plctlab.org/api/1.2/patches/187707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094855.684825-1-jwakely@redhat.com/","msgid":"<20240112094855.684825-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T09:48:20","name":"[committed] libstdc++: Implement C++23 P1951R1 (Default Args for pair'\''s Forwarding Ctor) [PR105505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094855.684825-1-jwakely@redhat.com/mbox/"},{"id":187649,"url":"https://patchwork.plctlab.org/api/1.2/patches/187649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaELkogkBMt9fsWx@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:51:14","name":"[committed] testsuite: Fix up preprocessor conditions in bitint-31.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaELkogkBMt9fsWx@tucnak/mbox/"},{"id":187657,"url":"https://patchwork.plctlab.org/api/1.2/patches/187657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEMw1B73Ngv3ie1@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:56:19","name":"lower-bitint: Fix up handling of unsigned INTEGER_CSTs operands with lots of 1s in the upper bits [PR113334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEMw1B73Ngv3ie1@tucnak/mbox/"},{"id":187660,"url":"https://patchwork.plctlab.org/api/1.2/patches/187660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEOgF4jwjfK6QwE@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T10:03:44","name":"varasm: Fix up process_pending_assemble_externals [PR113182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEOgF4jwjfK6QwE@tucnak/mbox/"},{"id":187718,"url":"https://patchwork.plctlab.org/api/1.2/patches/187718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzoespp0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:26:19","name":"[PATCHv3] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzoespp0.fsf@arm.com/mbox/"},{"id":187719,"url":"https://patchwork.plctlab.org/api/1.2/patches/187719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9qspgy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:31:09","name":"[1/2] aarch64: Use a separate group for SME builtins [PR112989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9qspgy.fsf@arm.com/mbox/"},{"id":187720,"url":"https://patchwork.plctlab.org/api/1.2/patches/187720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jfispfv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:31:48","name":"[2/2] aarch64: Use a global map to detect duplicated overloads [PR112989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jfispfv.fsf@arm.com/mbox/"},{"id":187721,"url":"https://patchwork.plctlab.org/api/1.2/patches/187721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmseraih.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:39:34","name":"[pushed] aarch64: Rework uxtl->zip optimisation [PR113196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmseraih.fsf@arm.com/mbox/"},{"id":187724,"url":"https://patchwork.plctlab.org/api/1.2/patches/187724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaE0eq4+3Fn78jqj@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:45:46","name":"c++, demangle: Implement https://github.com/itanium-cxx-abi/cxx-abi/issues/148 non-proposal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaE0eq4+3Fn78jqj@tucnak/mbox/"},{"id":187726,"url":"https://patchwork.plctlab.org/api/1.2/patches/187726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de/","msgid":"<238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de>","list_archive_url":null,"date":"2024-01-12T12:51:41","name":"[avr,applied] Fix PR107201 -nodevicelib not working for all devices.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de/mbox/"},{"id":187742,"url":"https://patchwork.plctlab.org/api/1.2/patches/187742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bk9q8xac.fsf@euler.schwinge.homeip.net/","msgid":"<87bk9q8xac.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2024-01-12T14:02:35","name":"GCN: Enable effective-target '\''vect_early_break'\'', '\''vect_early_break_hw'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bk9q8xac.fsf@euler.schwinge.homeip.net/mbox/"},{"id":187744,"url":"https://patchwork.plctlab.org/api/1.2/patches/187744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112140658.62598-1-iain@sandoe.co.uk/","msgid":"<20240112140658.62598-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-12T14:06:58","name":"[pushed] Darwin, powerpc: Fix bootstrap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112140658.62598-1-iain@sandoe.co.uk/mbox/"},{"id":187748,"url":"https://patchwork.plctlab.org/api/1.2/patches/187748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141230.62685-1-iain@sandoe.co.uk/","msgid":"<20240112141230.62685-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-12T14:12:30","name":"[pushed] Objective-C, Darwin: Fix a regression in handling bad receivers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141230.62685-1-iain@sandoe.co.uk/mbox/"},{"id":187749,"url":"https://patchwork.plctlab.org/api/1.2/patches/187749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141616.353D913782@imap1.dmz-prg2.suse.org/","msgid":"<20240112141616.353D913782@imap1.dmz-prg2.suse.org>","list_archive_url":null,"date":"2024-01-12T14:16:11","name":"tree-optimization/109893 - allow more backwards jump threading","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141616.353D913782@imap1.dmz-prg2.suse.org/mbox/"},{"id":187802,"url":"https://patchwork.plctlab.org/api/1.2/patches/187802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0409d57-9d8f-4f45-85f1-e8204f464245@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-12T17:52:36","name":"[avr,applied] Fix documentation for attribute \"address\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0409d57-9d8f-4f45-85f1-e8204f464245@gjlay.de/mbox/"},{"id":187803,"url":"https://patchwork.plctlab.org/api/1.2/patches/187803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de/","msgid":"<0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de>","list_archive_url":null,"date":"2024-01-12T18:07:01","name":"[avr,applied] Add link to sample ld-script in avr-gcc wiki.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de/mbox/"},{"id":187809,"url":"https://patchwork.plctlab.org/api/1.2/patches/187809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-2-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:40","name":"[V3,1/4] RISC-V: Add non-vector types to dfa pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-2-ewlu@rivosinc.com/mbox/"},{"id":187810,"url":"https://patchwork.plctlab.org/api/1.2/patches/187810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-3-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:41","name":"[V3,2/4] RISC-V: Add vector related pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-3-ewlu@rivosinc.com/mbox/"},{"id":187812,"url":"https://patchwork.plctlab.org/api/1.2/patches/187812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-4-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:42","name":"[V3,3/4] RISC-V: Use default cost model for insn scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-4-ewlu@rivosinc.com/mbox/"},{"id":187811,"url":"https://patchwork.plctlab.org/api/1.2/patches/187811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-5-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:43","name":"[V3,4/4] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-5-ewlu@rivosinc.com/mbox/"},{"id":187819,"url":"https://patchwork.plctlab.org/api/1.2/patches/187819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de/","msgid":"<5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de>","list_archive_url":null,"date":"2024-01-12T19:23:20","name":"[v2] Fortran: annotations for DO CONCURRENT loops [PR113305]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de/mbox/"},{"id":187827,"url":"https://patchwork.plctlab.org/api/1.2/patches/187827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-1-ppalka@redhat.com/","msgid":"<20240112200909.2649164-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-12T20:09:08","name":"[1/2] libstdc++: Use C++23 deducing this in std::bind_front","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-1-ppalka@redhat.com/mbox/"},{"id":187828,"url":"https://patchwork.plctlab.org/api/1.2/patches/187828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-2-ppalka@redhat.com/","msgid":"<20240112200909.2649164-2-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-12T20:09:09","name":"[2/2] libstdc++: Implement C++23 std::bind_pack from P2387R3 [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-2-ppalka@redhat.com/mbox/"},{"id":187845,"url":"https://patchwork.plctlab.org/api/1.2/patches/187845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112224145.1090544-1-jwakely@redhat.com/","msgid":"<20240112224145.1090544-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T22:29:03","name":"[WIP] libstdc++: Implement C++26 std::text_encoding [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112224145.1090544-1-jwakely@redhat.com/mbox/"},{"id":187846,"url":"https://patchwork.plctlab.org/api/1.2/patches/187846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112225924.1097416-1-jwakely@redhat.com/","msgid":"<20240112225924.1097416-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T22:58:29","name":"libstdc++: Update tzdata to 2023d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112225924.1097416-1-jwakely@redhat.com/mbox/"},{"id":187856,"url":"https://patchwork.plctlab.org/api/1.2/patches/187856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113005515.1029712-1-thiago.bauermann@linaro.org/","msgid":"<20240113005515.1029712-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2024-01-13T00:55:15","name":"testsuite: Fix fallout of turning warnings into errors on 32-bit Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113005515.1029712-1-thiago.bauermann@linaro.org/mbox/"},{"id":187859,"url":"https://patchwork.plctlab.org/api/1.2/patches/187859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113015133.741517-1-juzhe.zhong@rivai.ai/","msgid":"<20240113015133.741517-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-13T01:51:33","name":"RISC-V: Adjust loop len by costing 1 when NITER < VF [GCC 14 regression]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113015133.741517-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187869,"url":"https://patchwork.plctlab.org/api/1.2/patches/187869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113043706.2216775-1-quic_apinski@quicinc.com/","msgid":"<20240113043706.2216775-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-13T04:37:06","name":"[COMMITTED] Add a few testcases for fix missed optimization regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113043706.2216775-1-quic_apinski@quicinc.com/mbox/"},{"id":187872,"url":"https://patchwork.plctlab.org/api/1.2/patches/187872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113063709.19072-1-chenglulu@loongson.cn/","msgid":"<20240113063709.19072-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-13T06:37:09","name":"LoongArch: Assign the '\''/u'\'' attribute to the mem to which the global offset table belongs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113063709.19072-1-chenglulu@loongson.cn/mbox/"},{"id":187874,"url":"https://patchwork.plctlab.org/api/1.2/patches/187874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072817.31932-1-chenxiaolong@loongson.cn/","msgid":"<20240113072817.31932-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-13T07:28:17","name":"[v2] LoongArch: testsuite:Added additional vectorization \"-mlsx\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072817.31932-1-chenxiaolong@loongson.cn/mbox/"},{"id":187875,"url":"https://patchwork.plctlab.org/api/1.2/patches/187875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072834.32021-1-chenxiaolong@loongson.cn/","msgid":"<20240113072834.32021-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-13T07:28:34","name":"[v2] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072834.32021-1-chenxiaolong@loongson.cn/mbox/"},{"id":187881,"url":"https://patchwork.plctlab.org/api/1.2/patches/187881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaJbBs0d2PeCzubq@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-13T09:42:30","name":"lower-bitint: Fix up handle_operand_addr INTEGER_CST handling [PR113361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaJbBs0d2PeCzubq@tucnak/mbox/"},{"id":187898,"url":"https://patchwork.plctlab.org/api/1.2/patches/187898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4mkmPfFHVrzEHg6SA_o8YMs3QHv2dpX_f3E+rrdv4iYuA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T11:18:37","name":"[v2] libstdc++: Update tzdata to 2023d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4mkmPfFHVrzEHg6SA_o8YMs3QHv2dpX_f3E+rrdv4iYuA@mail.gmail.com/mbox/"},{"id":187902,"url":"https://patchwork.plctlab.org/api/1.2/patches/187902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113124834.1296437-1-jwakely@redhat.com/","msgid":"<20240113124834.1296437-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-13T12:44:01","name":"[v2] libstdc++: Implement C++26 std::text_encoding [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113124834.1296437-1-jwakely@redhat.com/mbox/"},{"id":187903,"url":"https://patchwork.plctlab.org/api/1.2/patches/187903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-2-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-2-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:15","name":"[1/4] testsuite, jit: test-alias-attribute.c requires alias support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-2-iain@sandoe.co.uk/mbox/"},{"id":187904,"url":"https://patchwork.plctlab.org/api/1.2/patches/187904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-3-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-3-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:16","name":"[2/4] testsuite, jit: Handle whitespace in test-link-section-assembler.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-3-iain@sandoe.co.uk/mbox/"},{"id":187906,"url":"https://patchwork.plctlab.org/api/1.2/patches/187906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-4-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-4-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:17","name":"[3/4] testsuite, jit: Allow for target-specific assembler scans.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-4-iain@sandoe.co.uk/mbox/"},{"id":187905,"url":"https://patchwork.plctlab.org/api/1.2/patches/187905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-5-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-5-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:18","name":"[4/4] testsuite,jit: Handle Darwin/Mach-O in assembler tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-5-iain@sandoe.co.uk/mbox/"},{"id":187921,"url":"https://patchwork.plctlab.org/api/1.2/patches/187921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKv0rFkGjlDO14D@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T15:44:18","name":"[2/4] rtl-ssa: Support for creating new uses [PR113070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKv0rFkGjlDO14D@arm.com/mbox/"},{"id":187922,"url":"https://patchwork.plctlab.org/api/1.2/patches/187922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKwCA4MBjcT5ViR@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T15:45:12","name":"[3/4] rtl-ssa: Ensure new defs get inserted [PR113070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKwCA4MBjcT5ViR@arm.com/mbox/"},{"id":187926,"url":"https://patchwork.plctlab.org/api/1.2/patches/187926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaLSbt_K2DroYebC@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-13T18:11:58","name":"[committed] hppa64: Fix fmt_f_default_field_width_3.f90 and fmt_g_default_field_width_3.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaLSbt_K2DroYebC@mx3210.localdomain/mbox/"},{"id":187933,"url":"https://patchwork.plctlab.org/api/1.2/patches/187933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113204655.1052804-1-thiago.bauermann@linaro.org/","msgid":"<20240113204655.1052804-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2024-01-13T20:46:55","name":"testsuite: Turn errors back into warnings in arm/acle/cde-mve-error-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113204655.1052804-1-thiago.bauermann@linaro.org/mbox/"},{"id":187934,"url":"https://patchwork.plctlab.org/api/1.2/patches/187934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a5fb737b-a44a-44b3-a0a0-599d2c1f89bf-1705180362791@3c-app-gmx-bs12/","msgid":"","list_archive_url":null,"date":"2024-01-13T21:12:42","name":"Fortran: intrinsic ISHFTC and missing optional argument SIZE [PR67277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a5fb737b-a44a-44b3-a0a0-599d2c1f89bf-1705180362791@3c-app-gmx-bs12/mbox/"},{"id":187936,"url":"https://patchwork.plctlab.org/api/1.2/patches/187936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113221251.2180315-1-lhyatt@gmail.com/","msgid":"<20240113221251.2180315-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2024-01-13T22:12:51","name":"libcpp: Support extended characters for #pragma {push, pop}_macro [PR109704]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113221251.2180315-1-lhyatt@gmail.com/mbox/"},{"id":187939,"url":"https://patchwork.plctlab.org/api/1.2/patches/187939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240114000534.1775261-1-me@jdemille.com/","msgid":"<20240114000534.1775261-1-me@jdemille.com>","list_archive_url":null,"date":"2024-01-14T00:05:27","name":"libsupc++: Fix UB terminating on foreign exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240114000534.1775261-1-me@jdemille.com/mbox/"},{"id":187961,"url":"https://patchwork.plctlab.org/api/1.2/patches/187961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de/","msgid":"<3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de>","list_archive_url":null,"date":"2024-01-14T13:05:11","name":"[avr,ping,#3] PR target/112944: Support .rodata in RAM for AVR64* and AVR128* devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de/mbox/"},{"id":187963,"url":"https://patchwork.plctlab.org/api/1.2/patches/187963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98216ca7-6a10-4342-b510-1f362127f619@net-b.de/","msgid":"<98216ca7-6a10-4342-b510-1f362127f619@net-b.de>","list_archive_url":null,"date":"2024-01-14T14:26:59","name":"libgomp.texi: Document omp_pause_resource{,_all}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98216ca7-6a10-4342-b510-1f362127f619@net-b.de/mbox/"},{"id":187973,"url":"https://patchwork.plctlab.org/api/1.2/patches/187973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4131a17-61dd-4720-8667-b20ec240d1f0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-14T15:25:39","name":"[V1] rs6000: New pass for replacement of adjacent (load) lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4131a17-61dd-4720-8667-b20ec240d1f0@linux.ibm.com/mbox/"},{"id":187976,"url":"https://patchwork.plctlab.org/api/1.2/patches/187976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQn8iXTqDDMPQUN@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T18:29:06","name":"[committed] Skip several analyzer socket tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQn8iXTqDDMPQUN@mx3210.localdomain/mbox/"},{"id":187978,"url":"https://patchwork.plctlab.org/api/1.2/patches/187978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de/","msgid":"<61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de>","list_archive_url":null,"date":"2024-01-14T18:41:30","name":"[wwwdocs,avr,applied] Add AVR news for v14.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de/mbox/"},{"id":187979,"url":"https://patchwork.plctlab.org/api/1.2/patches/187979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQsIUJHRKtUzBiP@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T18:46:57","name":"[committed] Fix dg-warning on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQsIUJHRKtUzBiP@mx3210.localdomain/mbox/"},{"id":187981,"url":"https://patchwork.plctlab.org/api/1.2/patches/187981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com/","msgid":"<00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-14T19:32:18","name":"[PATCH/RFC] Add --with-dwarf4 configure option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com/mbox/"},{"id":187984,"url":"https://patchwork.plctlab.org/api/1.2/patches/187984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRFHhlb7Ncc_lTW@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T20:33:34","name":"[committed] Skip several gcc.dg/builtin-dynamic-object-size tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRFHhlb7Ncc_lTW@mx3210.localdomain/mbox/"},{"id":187985,"url":"https://patchwork.plctlab.org/api/1.2/patches/187985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRJ2yYFlRieBHVD@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T20:53:47","name":"[committed] Disable tests for strdup/strndup on __hpux__ in various builtin-object-size tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRJ2yYFlRieBHVD@mx3210.localdomain/mbox/"},{"id":187992,"url":"https://patchwork.plctlab.org/api/1.2/patches/187992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de/","msgid":"<301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de>","list_archive_url":null,"date":"2024-01-14T23:15:32","name":"libgomp.texi: Document omp_pause_resource{,_all} and omp_target_memcpy* (was: [Patch] libgomp.texi: Document omp_pause_resource{,_all})","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de/mbox/"},{"id":188009,"url":"https://patchwork.plctlab.org/api/1.2/patches/188009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115012240.3180569-1-juzhe.zhong@rivai.ai/","msgid":"<20240115012240.3180569-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T01:22:40","name":"RISC-V: Adjust loop len by costing 1 when NITER < VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115012240.3180569-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188010,"url":"https://patchwork.plctlab.org/api/1.2/patches/188010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115024953.4166360-1-juzhe.zhong@rivai.ai/","msgid":"<20240115024953.4166360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T02:49:53","name":"RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115024953.4166360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188028,"url":"https://patchwork.plctlab.org/api/1.2/patches/188028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115055420.2427723-1-syq@gcc.gnu.org/","msgid":"<20240115055420.2427723-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-15T05:54:20","name":"MIPS: avoid $gp store if global_pointer is not $gp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115055420.2427723-1-syq@gcc.gnu.org/mbox/"},{"id":188029,"url":"https://patchwork.plctlab.org/api/1.2/patches/188029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-1-yanzhang.wang@intel.com/","msgid":"<20240115060515.1603031-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2024-01-15T06:00:30","name":"[1/2] RISC-V: delete all the vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-1-yanzhang.wang@intel.com/mbox/"},{"id":188031,"url":"https://patchwork.plctlab.org/api/1.2/patches/188031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-2-yanzhang.wang@intel.com/","msgid":"<20240115060515.1603031-2-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2024-01-15T06:00:31","name":"[2/2] RISC-V: delete vector abi checking in all relevant tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-2-yanzhang.wang@intel.com/mbox/"},{"id":188037,"url":"https://patchwork.plctlab.org/api/1.2/patches/188037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115065738.869086-1-juzhe.zhong@rivai.ai/","msgid":"<20240115065738.869086-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T06:57:38","name":"[Committed] RISC-V: Fix attributes bug configuration of ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115065738.869086-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188070,"url":"https://patchwork.plctlab.org/api/1.2/patches/188070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-3-shihua@iscas.ac.cn/","msgid":"<20240115083135.2120665-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2024-01-15T08:31:34","name":"[v4,2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-3-shihua@iscas.ac.cn/mbox/"},{"id":188071,"url":"https://patchwork.plctlab.org/api/1.2/patches/188071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-4-shihua@iscas.ac.cn/","msgid":"<20240115083135.2120665-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2024-01-15T08:31:35","name":"[v4,3/3] RISC-V: Add C intrinsic for Scalar Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-4-shihua@iscas.ac.cn/mbox/"},{"id":188068,"url":"https://patchwork.plctlab.org/api/1.2/patches/188068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaTt3wGIOZSH4AaT@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-15T08:33:35","name":"lower-bitint: Fix up handling of INTEGER_CSTs in handle_operand in right shifts or comparisons [PR113370]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaTt3wGIOZSH4AaT@tucnak/mbox/"},{"id":188081,"url":"https://patchwork.plctlab.org/api/1.2/patches/188081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115092537.1706919-1-iii@linux.ibm.com/","msgid":"<20240115092537.1706919-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-15T09:22:28","name":"Mark ASM_OUTPUT_FUNCTION_LABEL ()'\''s DECL argument as used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115092537.1706919-1-iii@linux.ibm.com/mbox/"},{"id":188091,"url":"https://patchwork.plctlab.org/api/1.2/patches/188091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a4fdbe.050a0220.b4d36.7277@mx.google.com/","msgid":"<65a4fdbe.050a0220.b4d36.7277@mx.google.com>","list_archive_url":null,"date":"2024-01-15T09:41:14","name":"c++: Fix ENABLE_SCOPE_CHECKING printing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a4fdbe.050a0220.b4d36.7277@mx.google.com/mbox/"},{"id":188093,"url":"https://patchwork.plctlab.org/api/1.2/patches/188093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2200ee1-d467-41ec-b380-dd437586a6ed@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-15T09:50:03","name":"[avr,applied] Fix PR target/113156 - ICE when building libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2200ee1-d467-41ec-b380-dd437586a6ed@gjlay.de/mbox/"},{"id":188094,"url":"https://patchwork.plctlab.org/api/1.2/patches/188094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115095050.1870115-1-juzhe.zhong@rivai.ai/","msgid":"<20240115095050.1870115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T09:50:50","name":"[Committed] RISC-V: Add optimized dump check of VLS reduc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115095050.1870115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188112,"url":"https://patchwork.plctlab.org/api/1.2/patches/188112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115113240.B85A03857B8B@sourceware.org/","msgid":"<20240115113240.B85A03857B8B@sourceware.org>","list_archive_url":null,"date":"2024-01-15T11:26:48","name":"tree-optimization/113385 - wrong loop father with early exit vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115113240.B85A03857B8B@sourceware.org/mbox/"},{"id":188115,"url":"https://patchwork.plctlab.org/api/1.2/patches/188115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115114348.3149415-1-juzhe.zhong@rivai.ai/","msgid":"<20240115114348.3149415-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T11:43:48","name":"[Committed,V3] RISC-V: Adjust loop len by costing 1 when NITER < VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115114348.3149415-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188116,"url":"https://patchwork.plctlab.org/api/1.2/patches/188116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115120014.3526204-1-juzhe.zhong@rivai.ai/","msgid":"<20240115120014.3526204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T12:00:14","name":"[Committed,V2] RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115120014.3526204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188164,"url":"https://patchwork.plctlab.org/api/1.2/patches/188164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134013.752A73858C54@sourceware.org/","msgid":"<20240115134013.752A73858C54@sourceware.org>","list_archive_url":null,"date":"2024-01-15T13:34:23","name":"[1/2] rtl-optimization/113255 - base_alias_check vs. pointer difference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134013.752A73858C54@sourceware.org/mbox/"},{"id":188167,"url":"https://patchwork.plctlab.org/api/1.2/patches/188167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134112.E83AB3858418@sourceware.org/","msgid":"<20240115134112.E83AB3858418@sourceware.org>","list_archive_url":null,"date":"2024-01-15T13:34:28","name":"[2/2] find_base_value part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134112.E83AB3858418@sourceware.org/mbox/"},{"id":188226,"url":"https://patchwork.plctlab.org/api/1.2/patches/188226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2719a083-baca-3671-7a49-e7796d68adfb@redhat.com/","msgid":"<2719a083-baca-3671-7a49-e7796d68adfb@redhat.com>","list_archive_url":null,"date":"2024-01-15T15:26:48","name":"[pushed,PR113354,LRA] : Fixing LRA failure on building MIPS GCC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2719a083-baca-3671-7a49-e7796d68adfb@redhat.com/mbox/"},{"id":188240,"url":"https://patchwork.plctlab.org/api/1.2/patches/188240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e03910-0224-4717-aa4c-66466ded245a@gjlay.de/","msgid":"<59e03910-0224-4717-aa4c-66466ded245a@gjlay.de>","list_archive_url":null,"date":"2024-01-15T16:11:59","name":"[avr,applied] Document -mskip-bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e03910-0224-4717-aa4c-66466ded245a@gjlay.de/mbox/"},{"id":188257,"url":"https://patchwork.plctlab.org/api/1.2/patches/188257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaVfSC1DDWgeXD44@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-15T16:37:28","name":"[committed] testsuite: Add testcase for already fixed PR [PR113048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaVfSC1DDWgeXD44@tucnak/mbox/"},{"id":188269,"url":"https://patchwork.plctlab.org/api/1.2/patches/188269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115171829.1500537-1-jwakely@redhat.com/","msgid":"<20240115171829.1500537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-15T17:18:11","name":"[committed] libstdc++: Use variable template to fix -fconcepts-ts error [PR113366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115171829.1500537-1-jwakely@redhat.com/mbox/"},{"id":188324,"url":"https://patchwork.plctlab.org/api/1.2/patches/188324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115184920.2752407-1-ppalka@redhat.com/","msgid":"<20240115184920.2752407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-15T18:49:20","name":"libstdc++: Implement P2836R1 changes to const_iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115184920.2752407-1-ppalka@redhat.com/mbox/"},{"id":188317,"url":"https://patchwork.plctlab.org/api/1.2/patches/188317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115191841.1208268-1-hjl.tools@gmail.com/","msgid":"<20240115191841.1208268-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2024-01-15T19:18:41","name":"Remove --save-temps from some compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115191841.1208268-1-hjl.tools@gmail.com/mbox/"},{"id":188343,"url":"https://patchwork.plctlab.org/api/1.2/patches/188343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115204803.1550804-1-jwakely@redhat.com/","msgid":"<20240115204803.1550804-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-15T20:45:33","name":"[v3] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115204803.1550804-1-jwakely@redhat.com/mbox/"},{"id":188344,"url":"https://patchwork.plctlab.org/api/1.2/patches/188344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221448.498382-1-polacek@redhat.com/","msgid":"<20240115221448.498382-1-polacek@redhat.com>","list_archive_url":null,"date":"2024-01-15T22:14:48","name":"c++: ICE with auto in template arg [PR110065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221448.498382-1-polacek@redhat.com/mbox/"},{"id":188345,"url":"https://patchwork.plctlab.org/api/1.2/patches/188345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221905.3644823-1-quic_apinski@quicinc.com/","msgid":"<20240115221905.3644823-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-15T22:19:05","name":"[COMMITTED] Add myself to the DCO section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221905.3644823-1-quic_apinski@quicinc.com/mbox/"},{"id":188351,"url":"https://patchwork.plctlab.org/api/1.2/patches/188351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000540.1054362-1-dmalcolm@redhat.com/","msgid":"<20240116000540.1054362-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-16T00:05:40","name":"[pushed] analyzer: casting all zeroes should give all zeroes [PR113333]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000540.1054362-1-dmalcolm@redhat.com/mbox/"},{"id":188352,"url":"https://patchwork.plctlab.org/api/1.2/patches/188352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000550.1054419-1-dmalcolm@redhat.com/","msgid":"<20240116000550.1054419-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-16T00:05:50","name":"[pushed] analyzer: fix false +ves from -Wanalyzer-tainted-array-index with unsigned char index [PR106229]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000550.1054419-1-dmalcolm@redhat.com/mbox/"},{"id":188353,"url":"https://patchwork.plctlab.org/api/1.2/patches/188353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022001da4819$20d652b0$6282f810$@nextmovesoftware.com/","msgid":"<022001da4819$20d652b0$6282f810$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-16T01:12:50","name":"PR rtl-optimization/111267: Improved forward propagation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022001da4819$20d652b0$6282f810$@nextmovesoftware.com/mbox/"},{"id":188357,"url":"https://patchwork.plctlab.org/api/1.2/patches/188357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com/","msgid":"<4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com>","list_archive_url":null,"date":"2024-01-16T02:04:38","name":"[expand] Add const0 move checking for CLEAR_BY_PIECES optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com/mbox/"},{"id":188364,"url":"https://patchwork.plctlab.org/api/1.2/patches/188364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022320.51782-1-xujiahao@loongson.cn/","msgid":"<20240116022320.51782-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:23:20","name":"LoongArch: Split vec_selects of bottom elements into simple move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022320.51782-1-xujiahao@loongson.cn/mbox/"},{"id":188365,"url":"https://patchwork.plctlab.org/api/1.2/patches/188365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022417.51862-1-xujiahao@loongson.cn/","msgid":"<20240116022417.51862-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:24:17","name":"LoongArch: Fix pattern vec_concatz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022417.51862-1-xujiahao@loongson.cn/mbox/"},{"id":188366,"url":"https://patchwork.plctlab.org/api/1.2/patches/188366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116023231.53164-1-xujiahao@loongson.cn/","msgid":"<20240116023231.53164-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:32:31","name":"[v3] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116023231.53164-1-xujiahao@loongson.cn/mbox/"},{"id":188367,"url":"https://patchwork.plctlab.org/api/1.2/patches/188367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com/","msgid":"<53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com>","list_archive_url":null,"date":"2024-01-16T02:42:29","name":"testsuite: Fix vect_long_mult on Power [PR109705]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com/mbox/"},{"id":188368,"url":"https://patchwork.plctlab.org/api/1.2/patches/188368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116030449.379762-1-juzhe.zhong@rivai.ai/","msgid":"<20240116030449.379762-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T03:04:49","name":"RISC-V: Report Sorry when users enable RVV in big-endian mode [PR113404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116030449.379762-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188427,"url":"https://patchwork.plctlab.org/api/1.2/patches/188427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116063510.3692246-1-juzhe.zhong@rivai.ai/","msgid":"<20240116063510.3692246-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T06:35:10","name":"test regression fix: Remove xfail for variable length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116063510.3692246-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188430,"url":"https://patchwork.plctlab.org/api/1.2/patches/188430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116065216.3834327-1-juzhe.zhong@rivai.ai/","msgid":"<20240116065216.3834327-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T06:52:16","name":"test regression fix: Remove xfail for variable length targets of bb-slp-subgroups-3.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116065216.3834327-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188448,"url":"https://patchwork.plctlab.org/api/1.2/patches/188448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116080400.4059284-1-juzhe.zhong@rivai.ai/","msgid":"<20240116080400.4059284-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T08:04:00","name":"[v2] test regression fix: Add vect128 for bb-slp-43.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116080400.4059284-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188450,"url":"https://patchwork.plctlab.org/api/1.2/patches/188450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY7tdB4aoXBPNql@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-16T08:17:57","name":"cfgexpand: Workaround CSE of ADDR_EXPRs in VAR_DECL partitioning [PR113372]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY7tdB4aoXBPNql@tucnak/mbox/"},{"id":188452,"url":"https://patchwork.plctlab.org/api/1.2/patches/188452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY8/lXoOQ82jN//@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-16T08:23:26","name":"libgcc: Fix __builtin_nested_func_ptr_{created,deleted} symbol versions [PR113402]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY8/lXoOQ82jN//@tucnak/mbox/"},{"id":188485,"url":"https://patchwork.plctlab.org/api/1.2/patches/188485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d497e5d1-108b-48af-9eaf-e5bd089db414@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-16T10:42:16","name":"[avr,applied] Add support for AVR16EB, ABR16EA and AVR32EA devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d497e5d1-108b-48af-9eaf-e5bd089db414@gjlay.de/mbox/"},{"id":188494,"url":"https://patchwork.plctlab.org/api/1.2/patches/188494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116110523.2365505-1-tejas.belagod@arm.com/","msgid":"<20240116110523.2365505-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2024-01-16T11:05:23","name":"AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116110523.2365505-1-tejas.belagod@arm.com/mbox/"},{"id":188497,"url":"https://patchwork.plctlab.org/api/1.2/patches/188497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111025.14659-1-iain@sandoe.co.uk/","msgid":"<20240116111025.14659-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:10:25","name":"jit, Darwin: Implement library exports list.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111025.14659-1-iain@sandoe.co.uk/mbox/"},{"id":188500,"url":"https://patchwork.plctlab.org/api/1.2/patches/188500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111213.42899-1-iain@sandoe.co.uk/","msgid":"<20240116111213.42899-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:12:13","name":"testsuite, jit: Stabilize error output.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111213.42899-1-iain@sandoe.co.uk/mbox/"},{"id":188501,"url":"https://patchwork.plctlab.org/api/1.2/patches/188501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111335.55596-1-iain@sandoe.co.uk/","msgid":"<20240116111335.55596-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:13:35","name":"testsuite, jit, Darwin: Add libSystem to a test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111335.55596-1-iain@sandoe.co.uk/mbox/"},{"id":188503,"url":"https://patchwork.plctlab.org/api/1.2/patches/188503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2170135.irdbgypaU6@fomalhaut/","msgid":"<2170135.irdbgypaU6@fomalhaut>","list_archive_url":null,"date":"2024-01-16T11:17:56","name":"[c-family] Fix PR ada/113397","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2170135.irdbgypaU6@fomalhaut/mbox/"},{"id":188517,"url":"https://patchwork.plctlab.org/api/1.2/patches/188517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2024-01-16T12:39:27","name":"ipa: Self-DCE of uses of removed call LHSs (PR 108007)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":188530,"url":"https://patchwork.plctlab.org/api/1.2/patches/188530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116140500.43D0D3858C29@sourceware.org/","msgid":"<20240116140500.43D0D3858C29@sourceware.org>","list_archive_url":null,"date":"2024-01-16T13:59:00","name":"tree-optimization/113371 - avoid prologue peeling for peeled early exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116140500.43D0D3858C29@sourceware.org/mbox/"},{"id":188548,"url":"https://patchwork.plctlab.org/api/1.2/patches/188548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaaNfgr8IuHDy4F5@zen.kayari.org/","msgid":"","list_archive_url":null,"date":"2024-01-16T14:06:54","name":"[v4] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaaNfgr8IuHDy4F5@zen.kayari.org/mbox/"},{"id":188535,"url":"https://patchwork.plctlab.org/api/1.2/patches/188535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116141139.3477027-1-cederman@gaisler.com/","msgid":"<20240116141139.3477027-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-16T14:11:39","name":"libsanitizer: Replace memcpy with internal version in sanitizer_common","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116141139.3477027-1-cederman@gaisler.com/mbox/"},{"id":188556,"url":"https://patchwork.plctlab.org/api/1.2/patches/188556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116143818.3336042-1-ppalka@redhat.com/","msgid":"<20240116143818.3336042-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-16T14:38:18","name":"libstdc++: Implement P2540R1 change to views::cartesian_product()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116143818.3336042-1-ppalka@redhat.com/mbox/"},{"id":188540,"url":"https://patchwork.plctlab.org/api/1.2/patches/188540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116144916.8449F386180D@sourceware.org/","msgid":"<20240116144916.8449F386180D@sourceware.org>","list_archive_url":null,"date":"2024-01-16T14:43:15","name":"tree-optimization/113373 - work around early exit vect missing LC PHI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116144916.8449F386180D@sourceware.org/mbox/"},{"id":188541,"url":"https://patchwork.plctlab.org/api/1.2/patches/188541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116150016.3471-1-iain@sandoe.co.uk/","msgid":"<20240116150016.3471-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T15:00:16","name":"lto, Darwin: Fix offload section names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116150016.3471-1-iain@sandoe.co.uk/mbox/"},{"id":188551,"url":"https://patchwork.plctlab.org/api/1.2/patches/188551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr/","msgid":"<3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr>","list_archive_url":null,"date":"2024-01-16T15:25:10","name":"Spec Files: remove documentation about obsolete spec strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr/mbox/"},{"id":188559,"url":"https://patchwork.plctlab.org/api/1.2/patches/188559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116162552.461635-2-mary.bennett@embecosm.com/","msgid":"<20240116162552.461635-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:25:52","name":"[v2,1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116162552.461635-2-mary.bennett@embecosm.com/mbox/"},{"id":188565,"url":"https://patchwork.plctlab.org/api/1.2/patches/188565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-2-mary.bennett@embecosm.com/","msgid":"<20240116163529.623568-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:35:28","name":"[v2,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-2-mary.bennett@embecosm.com/mbox/"},{"id":188564,"url":"https://patchwork.plctlab.org/api/1.2/patches/188564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-3-mary.bennett@embecosm.com/","msgid":"<20240116163529.623568-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:35:29","name":"[v2,2/2] RISC-V: Fix XCValu test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-3-mary.bennett@embecosm.com/mbox/"},{"id":188572,"url":"https://patchwork.plctlab.org/api/1.2/patches/188572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-2-mary.bennett@embecosm.com/","msgid":"<20240116171351.913881-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T17:13:50","name":"[v3,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-2-mary.bennett@embecosm.com/mbox/"},{"id":188571,"url":"https://patchwork.plctlab.org/api/1.2/patches/188571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-3-mary.bennett@embecosm.com/","msgid":"<20240116171351.913881-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T17:13:51","name":"[v3,2/2] RISC-V: Fix XCValu test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-3-mary.bennett@embecosm.com/mbox/"},{"id":188574,"url":"https://patchwork.plctlab.org/api/1.2/patches/188574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826A88BC9275089F005A3D83732@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2024-01-16T17:23:17","name":"AArch64: Add -mcpu=cobalt-100","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826A88BC9275089F005A3D83732@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":188590,"url":"https://patchwork.plctlab.org/api/1.2/patches/188590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zaba3-29rbMcC2pR@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T19:37:03","name":"[committed] xfail all scan-tree-dump-times checks on hppa*64*-*-* in sra-17.c and sra-18.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zaba3-29rbMcC2pR@mx3210.localdomain/mbox/"},{"id":188592,"url":"https://patchwork.plctlab.org/api/1.2/patches/188592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZabkNqYZVt-rC5ng@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T20:16:54","name":"[committed] Skip various cmp-mem-const tests on lp64 hppa*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZabkNqYZVt-rC5ng@mx3210.localdomain/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/mbox/"}]' ++ jq -rc '.[].name' ++ echo '[{"id":4,"url":"https://patchwork.plctlab.org/api/1.2/bundles/4/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-10/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-10","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":1618,"url":"https://patchwork.plctlab.org/api/1.2/patches/1618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001005720.28208-1-palmer@rivosinc.com/","msgid":"<20221001005720.28208-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-01T00:57:20","name":"Fix the build of record_edge_info()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001005720.28208-1-palmer@rivosinc.com/mbox/"},{"id":1621,"url":"https://patchwork.plctlab.org/api/1.2/patches/1621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041443.2211752-1-jason@redhat.com/","msgid":"<20221001041443.2211752-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-01T04:14:43","name":"[pushed] c++: cast split_nonconstant_init return val to void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041443.2211752-1-jason@redhat.com/mbox/"},{"id":1622,"url":"https://patchwork.plctlab.org/api/1.2/patches/1622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041502.2211988-1-jason@redhat.com/","msgid":"<20221001041502.2211988-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-01T04:15:02","name":"[pushed] c++: loop through array CONSTRUCTOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041502.2211988-1-jason@redhat.com/mbox/"},{"id":1624,"url":"https://patchwork.plctlab.org/api/1.2/patches/1624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com/","msgid":"<36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com>","list_archive_url":null,"date":"2022-10-01T04:52:12","name":"[committed] Improve Z flag handling on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com/mbox/"},{"id":1628,"url":"https://patchwork.plctlab.org/api/1.2/patches/1628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001075659.63410-1-julian@codesourcery.com/","msgid":"<20221001075659.63410-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-01T07:56:59","name":"OpenACC: Fix struct-component-kind-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001075659.63410-1-julian@codesourcery.com/mbox/"},{"id":1629,"url":"https://patchwork.plctlab.org/api/1.2/patches/1629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com/","msgid":"<0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com>","list_archive_url":null,"date":"2022-10-01T18:34:45","name":"Adding a new thread model to GCC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com/mbox/"},{"id":1630,"url":"https://patchwork.plctlab.org/api/1.2/patches/1630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001184004.3599748-1-arsen@aarsen.me/","msgid":"<20221001184004.3599748-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-01T18:40:05","name":"libstdc++: Use ///< for inline documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001184004.3599748-1-arsen@aarsen.me/mbox/"},{"id":1632,"url":"https://patchwork.plctlab.org/api/1.2/patches/1632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzl3afY3XTnM7sQ+@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-02T11:35:05","name":"c++: Disallow jumps into statement expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzl3afY3XTnM7sQ+@tucnak/mbox/"},{"id":1633,"url":"https://patchwork.plctlab.org/api/1.2/patches/1633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzmjs5JhXasdpTx4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-02T14:44:03","name":"[committed] tree-cfg: Fix a verification diagnostic typo [PR107121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzmjs5JhXasdpTx4@tucnak/mbox/"},{"id":1634,"url":"https://patchwork.plctlab.org/api/1.2/patches/1634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd6be261-fe0d-5b35-cffc-3eafded00bec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-02T17:47:18","name":"Fortran: Add OpenMP'\''s assume(s) directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd6be261-fe0d-5b35-cffc-3eafded00bec@codesourcery.com/mbox/"},{"id":1636,"url":"https://patchwork.plctlab.org/api/1.2/patches/1636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5bb46ca-bb5f-f177-5082-b16f38004ecb@netcologne.de/","msgid":"","list_archive_url":null,"date":"2022-10-02T20:07:34","name":"[RFC.,Fortran] Some clobbering for INTENT(OUT) arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5bb46ca-bb5f-f177-5082-b16f38004ecb@netcologne.de/mbox/"},{"id":1639,"url":"https://patchwork.plctlab.org/api/1.2/patches/1639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542EFA4C26432C5D92ADA04915B9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T06:08:37","name":"Set discriminators for call stmts on the same line within the same basic block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542EFA4C26432C5D92ADA04915B9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1645,"url":"https://patchwork.plctlab.org/api/1.2/patches/1645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003104351.408835-1-christophe.lyon@arm.com/","msgid":"<20221003104351.408835-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-10-03T10:43:51","name":"arm: Add missing early clobber to MVE vrev64q_m patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003104351.408835-1-christophe.lyon@arm.com/mbox/"},{"id":1650,"url":"https://patchwork.plctlab.org/api/1.2/patches/1650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-1-aldyh@redhat.com/","msgid":"<20221003110815.1075975-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:12","name":"[COMMITTED] Do not compare incompatible ranges in ipa-prop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-1-aldyh@redhat.com/mbox/"},{"id":1653,"url":"https://patchwork.plctlab.org/api/1.2/patches/1653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-2-aldyh@redhat.com/","msgid":"<20221003110815.1075975-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:13","name":"[COMMITTED] Do not compare nonzero masks for varying.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-2-aldyh@redhat.com/mbox/"},{"id":1651,"url":"https://patchwork.plctlab.org/api/1.2/patches/1651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-3-aldyh@redhat.com/","msgid":"<20221003110815.1075975-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:14","name":"[COMMITTED] Avoid comparing ranges when sub-ranges is 0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-3-aldyh@redhat.com/mbox/"},{"id":1652,"url":"https://patchwork.plctlab.org/api/1.2/patches/1652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-4-aldyh@redhat.com/","msgid":"<20221003110815.1075975-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:15","name":"[COMMITTED] Do not pessimize range in set_nonzero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-4-aldyh@redhat.com/mbox/"},{"id":1654,"url":"https://patchwork.plctlab.org/api/1.2/patches/1654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003114641.367692-1-jwakely@redhat.com/","msgid":"<20221003114641.367692-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:46:41","name":"[committed] libstdc++: Fix tests broken by C++23 P2266R3 \"Simpler implicit move\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003114641.367692-1-jwakely@redhat.com/mbox/"},{"id":1655,"url":"https://patchwork.plctlab.org/api/1.2/patches/1655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddy1txazmv.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-10-03T11:57:12","name":"[COMMITTED] libsanitizer: Fix Solaris 11.3 compilation of sanitizer_procmaps_solaris.cpp [PR105531]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddy1txazmv.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":1657,"url":"https://patchwork.plctlab.org/api/1.2/patches/1657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210031311260.789254@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-03T13:12:04","name":"[committed] c: Adjust LDBL_EPSILON for C2x for IBM long double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210031311260.789254@digraph.polyomino.org.uk/mbox/"},{"id":1658,"url":"https://patchwork.plctlab.org/api/1.2/patches/1658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39a8cab-7d04-ddc2-0e46-540325c6e84e@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T14:14:22","name":"PR tree-optimization/107109 - Don'\''t process undefined range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39a8cab-7d04-ddc2-0e46-540325c6e84e@redhat.com/mbox/"},{"id":1661,"url":"https://patchwork.plctlab.org/api/1.2/patches/1661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzs2gj1TqcWkldfN@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-03T19:22:42","name":"c++, c, v2: Implement C++23 P1774R8 - Portable assumptions [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzs2gj1TqcWkldfN@tucnak/mbox/"},{"id":1662,"url":"https://patchwork.plctlab.org/api/1.2/patches/1662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003203543.154431-1-arsen@aarsen.me/","msgid":"<20221003203543.154431-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-03T20:35:44","name":"elf: ELF toolchain --without-{headers, newlib} should provide stdint.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003203543.154431-1-arsen@aarsen.me/mbox/"},{"id":1663,"url":"https://patchwork.plctlab.org/api/1.2/patches/1663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003210247.457336-1-jwakely@redhat.com/","msgid":"<20221003210247.457336-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-03T21:02:47","name":"[committed] libstdc++: Update status docs for compare_exchange padding bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003210247.457336-1-jwakely@redhat.com/mbox/"},{"id":1664,"url":"https://patchwork.plctlab.org/api/1.2/patches/1664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212402.3337669-1-philipp.tomsich@vrull.eu/","msgid":"<20221003212402.3337669-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-03T21:24:02","name":"aarch64: update Ampere-1 core definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212402.3337669-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1665,"url":"https://patchwork.plctlab.org/api/1.2/patches/1665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212419.3337714-1-philipp.tomsich@vrull.eu/","msgid":"<20221003212419.3337714-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-03T21:24:19","name":"aarch64: fix off-by-one in reading cpuinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212419.3337714-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1666,"url":"https://patchwork.plctlab.org/api/1.2/patches/1666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ead367999f6136b51ae6206184a1193864b234aa.1664836268.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T22:32:14","name":"diagnostics: Add test for fixed _Pragma location issue [PR91669]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ead367999f6136b51ae6206184a1193864b234aa.1664836268.git.lhyatt@gmail.com/mbox/"},{"id":1667,"url":"https://patchwork.plctlab.org/api/1.2/patches/1667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004004216.1994023-1-ppalka@redhat.com/","msgid":"<20221004004216.1994023-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T00:42:16","name":"c++: install cp-trait.def as part of plugin headers [PR107136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004004216.1994023-1-ppalka@redhat.com/mbox/"},{"id":1668,"url":"https://patchwork.plctlab.org/api/1.2/patches/1668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004011115.2009591-1-ppalka@redhat.com/","msgid":"<20221004011115.2009591-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T01:11:15","name":"libstdc++: Implement ranges::join_with_view from P2441R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004011115.2009591-1-ppalka@redhat.com/mbox/"},{"id":1669,"url":"https://patchwork.plctlab.org/api/1.2/patches/1669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004042831.1419926-1-aldyh@redhat.com/","msgid":"<20221004042831.1419926-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T04:28:31","name":"[COMMITTED,PR107130] range-ops: Separate out ffs and popcount optimizations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004042831.1419926-1-aldyh@redhat.com/mbox/"},{"id":1670,"url":"https://patchwork.plctlab.org/api/1.2/patches/1670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004073530.1461390-1-aldyh@redhat.com/","msgid":"<20221004073530.1461390-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T07:35:30","name":"[COMMITTED] Convert nonzero mask in irange to wide_int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004073530.1461390-1-aldyh@redhat.com/mbox/"},{"id":1674,"url":"https://patchwork.plctlab.org/api/1.2/patches/1674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv3kyZFBYlJpeyL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-04T09:06:27","name":"middle-end, c++, i386, libgcc: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv3kyZFBYlJpeyL@tucnak/mbox/"},{"id":1675,"url":"https://patchwork.plctlab.org/api/1.2/patches/1675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv4q6gMMgJnAMQj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-04T09:11:07","name":"attribs: Add missing auto_diagnostic_group 3 times","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv4q6gMMgJnAMQj@tucnak/mbox/"},{"id":1680,"url":"https://patchwork.plctlab.org/api/1.2/patches/1680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004112849.27678-1-stefansf@linux.ibm.com/","msgid":"<20221004112849.27678-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2022-10-04T11:28:50","name":"cselib: Skip BImode while keeping track of subvalue relations [PR107088]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004112849.27678-1-stefansf@linux.ibm.com/mbox/"},{"id":1685,"url":"https://patchwork.plctlab.org/api/1.2/patches/1685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-1-jwakely@redhat.com/","msgid":"<20221004141138.530214-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:35","name":"[committed] libstdc++: Define functions for freestanding [PR107135]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-1-jwakely@redhat.com/mbox/"},{"id":1683,"url":"https://patchwork.plctlab.org/api/1.2/patches/1683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-2-jwakely@redhat.com/","msgid":"<20221004141138.530214-2-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:36","name":"[committed] libstdc++: Make work freestanding [PR107134]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-2-jwakely@redhat.com/mbox/"},{"id":1682,"url":"https://patchwork.plctlab.org/api/1.2/patches/1682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-3-jwakely@redhat.com/","msgid":"<20221004141138.530214-3-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:37","name":"[committed] libstdc++: Enable std::hash> [PR107139]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-3-jwakely@redhat.com/mbox/"},{"id":1684,"url":"https://patchwork.plctlab.org/api/1.2/patches/1684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-4-jwakely@redhat.com/","msgid":"<20221004141138.530214-4-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:38","name":"[committed] libstdc++: Disable test for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-4-jwakely@redhat.com/mbox/"},{"id":1686,"url":"https://patchwork.plctlab.org/api/1.2/patches/1686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004151200.1275636-2-ben.boeckel@kitware.com/","msgid":"<20221004151200.1275636-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-04T15:12:00","name":"[RESEND,1/1] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004151200.1275636-2-ben.boeckel@kitware.com/mbox/"},{"id":1687,"url":"https://patchwork.plctlab.org/api/1.2/patches/1687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152132.GA1906@delia.home/","msgid":"<20221004152132.GA1906@delia.home>","list_archive_url":null,"date":"2022-10-04T15:21:33","name":"Add --without-makeinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152132.GA1906@delia.home/mbox/"},{"id":1688,"url":"https://patchwork.plctlab.org/api/1.2/patches/1688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-2-qing.zhao@oracle.com/","msgid":"<20221004152154.1665626-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-04T15:21:52","name":"[GCC13,V5,1/2] Add a new option -fstrict-flex-arrays[=n] and new attribute strict_flex_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-2-qing.zhao@oracle.com/mbox/"},{"id":1689,"url":"https://patchwork.plctlab.org/api/1.2/patches/1689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-3-qing.zhao@oracle.com/","msgid":"<20221004152154.1665626-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-04T15:21:53","name":"[GCC13,V5,2/2] Use array_at_struct_end_p in __builtin_object_size [PR101836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-3-qing.zhao@oracle.com/mbox/"},{"id":1692,"url":"https://patchwork.plctlab.org/api/1.2/patches/1692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0znk0h0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T16:38:51","name":"aarch64: Define __ARM_FEATURE_RCPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0znk0h0.fsf@arm.com/mbox/"},{"id":1693,"url":"https://patchwork.plctlab.org/api/1.2/patches/1693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164624.558722-1-jwakely@redhat.com/","msgid":"<20221004164624.558722-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:24","name":"[committed] libstdc++: Refactor seed sequence constraints in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164624.558722-1-jwakely@redhat.com/mbox/"},{"id":1694,"url":"https://patchwork.plctlab.org/api/1.2/patches/1694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164631.558750-1-jwakely@redhat.com/","msgid":"<20221004164631.558750-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:31","name":"[committed] libstdc++: Use new built-ins __remove_cv, __remove_reference etc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164631.558750-1-jwakely@redhat.com/mbox/"},{"id":1695,"url":"https://patchwork.plctlab.org/api/1.2/patches/1695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164637.558771-1-jwakely@redhat.com/","msgid":"<20221004164637.558771-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:37","name":"[committed] libstdc++: Fix test FAIL for old std::string ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164637.558771-1-jwakely@redhat.com/mbox/"},{"id":1696,"url":"https://patchwork.plctlab.org/api/1.2/patches/1696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004165109.559028-1-jwakely@redhat.com/","msgid":"<20221004165109.559028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:51:09","name":"[RFC] libstdc++: Generate error_constants.h from [PR104883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004165109.559028-1-jwakely@redhat.com/mbox/"},{"id":1697,"url":"https://patchwork.plctlab.org/api/1.2/patches/1697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFFmr-7NZef+QOtv2rzcvu4Sc66sTsikGf_gju_fFgGGwi0m_w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T17:06:21","name":"improved const shifts for AVR targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFFmr-7NZef+QOtv2rzcvu4Sc66sTsikGf_gju_fFgGGwi0m_w@mail.gmail.com/mbox/"},{"id":1698,"url":"https://patchwork.plctlab.org/api/1.2/patches/1698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901CEA2D310CDB76A47600C835A9@AS4PR08MB7901.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T17:22:35","name":"[AArch64] Improve immediate expansion [PR106583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901CEA2D310CDB76A47600C835A9@AS4PR08MB7901.eurprd08.prod.outlook.com/mbox/"},{"id":1699,"url":"https://patchwork.plctlab.org/api/1.2/patches/1699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004173631.2958133-1-ppalka@redhat.com/","msgid":"<20221004173631.2958133-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T17:36:31","name":"c++ modules: lazy loading from within template [PR99377]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004173631.2958133-1-ppalka@redhat.com/mbox/"},{"id":1700,"url":"https://patchwork.plctlab.org/api/1.2/patches/1700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004175221.1493497-1-aldyh@redhat.com/","msgid":"<20221004175221.1493497-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T17:52:21","name":"[COMMITTED] Remove assert from set_nonzero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004175221.1493497-1-aldyh@redhat.com/mbox/"},{"id":1701,"url":"https://patchwork.plctlab.org/api/1.2/patches/1701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6d934a50-8304-4704-bce4-36a2afbc687e-1664911631690@3c-app-gmx-bs14/","msgid":"","list_archive_url":null,"date":"2022-10-04T19:27:11","name":"Fortran: reject procedures and procedure pointers as output item [PR107074]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6d934a50-8304-4704-bce4-36a2afbc687e-1664911631690@3c-app-gmx-bs14/mbox/"},{"id":1703,"url":"https://patchwork.plctlab.org/api/1.2/patches/1703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-79a6df2f-08a1-4f6d-9431-70f884d1c05c-1664918395982@3c-app-gmx-bs23/","msgid":"","list_archive_url":null,"date":"2022-10-04T21:19:56","name":"Fortran: error recovery for invalid types in array constructors [PR107000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-79a6df2f-08a1-4f6d-9431-70f884d1c05c-1664918395982@3c-app-gmx-bs23/mbox/"},{"id":1704,"url":"https://patchwork.plctlab.org/api/1.2/patches/1704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004225229.3104706-1-jason@redhat.com/","msgid":"<20221004225229.3104706-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-04T22:52:29","name":"[pushed] c++: fix debug info for array temporary [PR107154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004225229.3104706-1-jason@redhat.com/mbox/"},{"id":1705,"url":"https://patchwork.plctlab.org/api/1.2/patches/1705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzy8bdzUiCfLImkn@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T23:06:21","name":"[v2] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzy8bdzUiCfLImkn@redhat.com/mbox/"},{"id":1706,"url":"https://patchwork.plctlab.org/api/1.2/patches/1706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002418.710712-1-dmalcolm@redhat.com/","msgid":"<20221005002418.710712-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:18","name":"[committed] analyzer: widening_svalues take a function_point rather than a program_point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002418.710712-1-dmalcolm@redhat.com/mbox/"},{"id":1707,"url":"https://patchwork.plctlab.org/api/1.2/patches/1707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002423.710736-1-dmalcolm@redhat.com/","msgid":"<20221005002423.710736-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:23","name":"[committed] analyzer: fold -(-(VAL)) to VAL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002423.710736-1-dmalcolm@redhat.com/mbox/"},{"id":1709,"url":"https://patchwork.plctlab.org/api/1.2/patches/1709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002427.710760-1-dmalcolm@redhat.com/","msgid":"<20221005002427.710760-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:27","name":"[committed] analyzer: move region_model_manager decl to its own header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002427.710760-1-dmalcolm@redhat.com/mbox/"},{"id":1708,"url":"https://patchwork.plctlab.org/api/1.2/patches/1708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002431.710784-1-dmalcolm@redhat.com/","msgid":"<20221005002431.710784-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:31","name":"[committed] analyzer: revamp side-effects of call summaries [PR107072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002431.710784-1-dmalcolm@redhat.com/mbox/"},{"id":1720,"url":"https://patchwork.plctlab.org/api/1.2/patches/1720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1UiUPXZGIGXRJV@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-05T09:55:21","name":"c++, c, v3: Implement C++23 P1774R8 - Portable assumptions [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1UiUPXZGIGXRJV@tucnak/mbox/"},{"id":1721,"url":"https://patchwork.plctlab.org/api/1.2/patches/1721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz/","msgid":"<52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz>","list_archive_url":null,"date":"2022-10-05T10:15:33","name":"[pushed] testsuite: mark a test with xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz/mbox/"},{"id":1722,"url":"https://patchwork.plctlab.org/api/1.2/patches/1722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz/","msgid":"<7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz>","list_archive_url":null,"date":"2022-10-05T11:35:10","name":"[pushed] analyzer: remove unused variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz/mbox/"},{"id":1723,"url":"https://patchwork.plctlab.org/api/1.2/patches/1723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df64a08d-7bbf-8270-b922-bf7016f874de@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-05T11:41:37","name":"IPA: support -flto + -flive-patching=inline-clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df64a08d-7bbf-8270-b922-bf7016f874de@suse.cz/mbox/"},{"id":1724,"url":"https://patchwork.plctlab.org/api/1.2/patches/1724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6876baac-15f9-0450-72ec-1f0b85348392@suse.cz/","msgid":"<6876baac-15f9-0450-72ec-1f0b85348392@suse.cz>","list_archive_url":null,"date":"2022-10-05T11:42:37","name":"c: support attribs starting with '\''_'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6876baac-15f9-0450-72ec-1f0b85348392@suse.cz/mbox/"},{"id":1725,"url":"https://patchwork.plctlab.org/api/1.2/patches/1725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eea8eca0-6b5d-c5fa-e5bd-aa5409bd78c6@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-05T11:49:40","name":"c: support attribs starting with '\''_'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eea8eca0-6b5d-c5fa-e5bd-aa5409bd78c6@suse.cz/mbox/"},{"id":1728,"url":"https://patchwork.plctlab.org/api/1.2/patches/1728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-05T12:04:02","name":"[1/2] gcov: test switch/break line counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1726,"url":"https://patchwork.plctlab.org/api/1.2/patches/1726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-05T12:04:03","name":"[2/2] Split edge when edge locus and dest don'\''t match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1727,"url":"https://patchwork.plctlab.org/api/1.2/patches/1727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1y4yx9FYrPBeEw@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-05T12:04:51","name":"c++: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1y4yx9FYrPBeEw@tucnak/mbox/"},{"id":1729,"url":"https://patchwork.plctlab.org/api/1.2/patches/1729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122154.1579701-1-aldyh@redhat.com/","msgid":"<20221005122154.1579701-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:21:53","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Pass nonzero masks through cast.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122154.1579701-1-aldyh@redhat.com/mbox/"},{"id":1730,"url":"https://patchwork.plctlab.org/api/1.2/patches/1730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-1-aldyh@redhat.com/","msgid":"<20221005122236.1579762-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:22:35","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Pass nonzero masks through cast.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-1-aldyh@redhat.com/mbox/"},{"id":1731,"url":"https://patchwork.plctlab.org/api/1.2/patches/1731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-2-aldyh@redhat.com/","msgid":"<20221005122236.1579762-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:22:36","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Take into account nonzero mask in popcount.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-2-aldyh@redhat.com/mbox/"},{"id":1732,"url":"https://patchwork.plctlab.org/api/1.2/patches/1732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901314F7E77FB81A079AE5F835D9@AS4PR08MB7901.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-05T12:30:22","name":"[AArch64] Improve bit tests [PR105773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901314F7E77FB81A079AE5F835D9@AS4PR08MB7901.eurprd08.prod.outlook.com/mbox/"},{"id":1733,"url":"https://patchwork.plctlab.org/api/1.2/patches/1733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005124628.701564-1-jwakely@redhat.com/","msgid":"<20221005124628.701564-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:46:28","name":"[committed] libstdc++: Guard use of new built-in with __has_builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005124628.701564-1-jwakely@redhat.com/mbox/"},{"id":1734,"url":"https://patchwork.plctlab.org/api/1.2/patches/1734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005131611.703378-1-jwakely@redhat.com/","msgid":"<20221005131611.703378-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-05T13:16:11","name":"[committed] libtdc++: Regenerate Makefile.in after freestanding header changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005131611.703378-1-jwakely@redhat.com/mbox/"},{"id":1735,"url":"https://patchwork.plctlab.org/api/1.2/patches/1735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005134932.1584257-1-aldyh@redhat.com/","msgid":"<20221005134932.1584257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T13:49:32","name":"[COMMITTED] range-op: Keep nonzero mask up to date with truncating casts.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005134932.1584257-1-aldyh@redhat.com/mbox/"},{"id":1736,"url":"https://patchwork.plctlab.org/api/1.2/patches/1736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005141023.3206443-1-jason@redhat.com/","msgid":"<20221005141023.3206443-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-05T14:10:23","name":"[pushed] c++: lvalue_kind tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005141023.3206443-1-jason@redhat.com/mbox/"},{"id":1737,"url":"https://patchwork.plctlab.org/api/1.2/patches/1737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005145639.273140-1-torbjorn.svensson@foss.st.com/","msgid":"<20221005145639.273140-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-05T14:56:39","name":"[v2] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005145639.273140-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1738,"url":"https://patchwork.plctlab.org/api/1.2/patches/1738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4094054.1IzOArtZ34@fomalhaut/","msgid":"<4094054.1IzOArtZ34@fomalhaut>","list_archive_url":null,"date":"2022-10-05T15:36:48","name":"Fix wrong code generated by unroll-and-jam pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4094054.1IzOArtZ34@fomalhaut/mbox/"},{"id":1739,"url":"https://patchwork.plctlab.org/api/1.2/patches/1739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175630.748655-1-dmalcolm@redhat.com/","msgid":"<20221005175630.748655-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T17:56:30","name":"[committed] analyzer: fix ICEs seen with call summaries on PR 107060","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175630.748655-1-dmalcolm@redhat.com/mbox/"},{"id":1740,"url":"https://patchwork.plctlab.org/api/1.2/patches/1740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175634.748680-1-dmalcolm@redhat.com/","msgid":"<20221005175634.748680-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T17:56:34","name":"[committed] analyzer: simplify some includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175634.748680-1-dmalcolm@redhat.com/mbox/"},{"id":1741,"url":"https://patchwork.plctlab.org/api/1.2/patches/1741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005181127.749161-1-dmalcolm@redhat.com/","msgid":"<20221005181127.749161-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T18:11:27","name":"[committed] analyzer: add regression test for PR 107158","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005181127.749161-1-dmalcolm@redhat.com/mbox/"},{"id":1742,"url":"https://patchwork.plctlab.org/api/1.2/patches/1742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz/","msgid":"<29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz>","list_archive_url":null,"date":"2022-10-05T18:41:48","name":"[pushed] contrib: run fetch before pushing Daily bump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz/mbox/"},{"id":1744,"url":"https://patchwork.plctlab.org/api/1.2/patches/1744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org/","msgid":"<19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2022-10-05T19:08:39","name":"[1/3] rs6000: Remove \"wD\" from *vsx_extract__store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1743,"url":"https://patchwork.plctlab.org/api/1.2/patches/1743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe062c35be96fbcac92681f9e986745f4be78b6f.1664994970.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-05T19:08:40","name":"[2/3] rs6000: Rework vsx_extract_","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe062c35be96fbcac92681f9e986745f4be78b6f.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1745,"url":"https://patchwork.plctlab.org/api/1.2/patches/1745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org/","msgid":"<0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2022-10-05T19:08:41","name":"[3/3] rs6000: Remove the wD constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1747,"url":"https://patchwork.plctlab.org/api/1.2/patches/1747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-2-qing.zhao@oracle.com/","msgid":"<20221005191320.2087486-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-05T19:13:19","name":"[GCC13,V6,1/2] Add a new option -fstrict-flex-arrays[=n] and new attribute strict_flex_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-2-qing.zhao@oracle.com/mbox/"},{"id":1746,"url":"https://patchwork.plctlab.org/api/1.2/patches/1746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-3-qing.zhao@oracle.com/","msgid":"<20221005191320.2087486-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-05T19:13:20","name":"[GCC13,V6,2/2] Use array_at_struct_end_p in __builtin_object_size [PR101836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-3-qing.zhao@oracle.com/mbox/"},{"id":1748,"url":"https://patchwork.plctlab.org/api/1.2/patches/1748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005212744.640285-1-polacek@redhat.com/","msgid":"<20221005212744.640285-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-05T21:27:44","name":"c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005212744.640285-1-polacek@redhat.com/mbox/"},{"id":1749,"url":"https://patchwork.plctlab.org/api/1.2/patches/1749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210060120550.917581@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-06T01:21:22","name":"c: C2x typeof","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210060120550.917581@digraph.polyomino.org.uk/mbox/"},{"id":1750,"url":"https://patchwork.plctlab.org/api/1.2/patches/1750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006020226.3629040-1-ppalka@redhat.com/","msgid":"<20221006020226.3629040-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-06T02:02:26","name":"c++: remove optimize_specialization_lookup_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006020226.3629040-1-ppalka@redhat.com/mbox/"},{"id":1753,"url":"https://patchwork.plctlab.org/api/1.2/patches/1753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-1-aldyh@redhat.com/","msgid":"<20221006062318.1709996-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:16","name":"[COMMITTED] Do not double print INF and NAN in frange pretty printer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-1-aldyh@redhat.com/mbox/"},{"id":1755,"url":"https://patchwork.plctlab.org/api/1.2/patches/1755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-2-aldyh@redhat.com/","msgid":"<20221006062318.1709996-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:17","name":"[COMMITTED] Do not check finite_operands_p twice in range-ops-float.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-2-aldyh@redhat.com/mbox/"},{"id":1754,"url":"https://patchwork.plctlab.org/api/1.2/patches/1754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-3-aldyh@redhat.com/","msgid":"<20221006062318.1709996-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:18","name":"[COMMITTED] Setting explicit NANs sets UNDEFINED for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-3-aldyh@redhat.com/mbox/"},{"id":1756,"url":"https://patchwork.plctlab.org/api/1.2/patches/1756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz6VAi7u7pMLbb4K@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T08:42:42","name":"[committed] openmp: Map holds clause to IFN_ASSUME for C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz6VAi7u7pMLbb4K@tucnak/mbox/"},{"id":1757,"url":"https://patchwork.plctlab.org/api/1.2/patches/1757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006091056.1480675-1-claziss@gmail.com/","msgid":"<20221006091056.1480675-1-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-06T09:10:56","name":"[committed] arc: Remove max-page-size and common-page-size forced setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006091056.1480675-1-claziss@gmail.com/mbox/"},{"id":1758,"url":"https://patchwork.plctlab.org/api/1.2/patches/1758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz/","msgid":"<045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz>","list_archive_url":null,"date":"2022-10-06T09:16:17","name":"[pushed] git_update_version: add robust logging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz/mbox/"},{"id":1759,"url":"https://patchwork.plctlab.org/api/1.2/patches/1759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092544.260196-1-poulhies@adacore.com/","msgid":"<20221006092544.260196-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:25:44","name":"[COMMITED] ada: Fix spurious warning on unreferenced refinement constituents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092544.260196-1-poulhies@adacore.com/mbox/"},{"id":1760,"url":"https://patchwork.plctlab.org/api/1.2/patches/1760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092643.260420-1-poulhies@adacore.com/","msgid":"<20221006092643.260420-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:26:43","name":"[COMMITED] ada: Disable slice-of-component optimization in some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092643.260420-1-poulhies@adacore.com/mbox/"},{"id":1761,"url":"https://patchwork.plctlab.org/api/1.2/patches/1761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092734.260579-1-poulhies@adacore.com/","msgid":"<20221006092734.260579-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:27:34","name":"[COMMITED] ada: Do not issue compiler warnings in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092734.260579-1-poulhies@adacore.com/mbox/"},{"id":1762,"url":"https://patchwork.plctlab.org/api/1.2/patches/1762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092810.260715-1-poulhies@adacore.com/","msgid":"<20221006092810.260715-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:28:10","name":"[COMMITED] ada: Clean up slice-of-component optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092810.260715-1-poulhies@adacore.com/mbox/"},{"id":1763,"url":"https://patchwork.plctlab.org/api/1.2/patches/1763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092840.607374-1-philipp.tomsich@vrull.eu/","msgid":"<20221006092840.607374-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-06T09:28:39","name":"[v2] aarch64: fix off-by-one in reading cpuinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092840.607374-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1764,"url":"https://patchwork.plctlab.org/api/1.2/patches/1764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092847.260877-1-poulhies@adacore.com/","msgid":"<20221006092847.260877-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:28:47","name":"[COMMITED] ada: Accessibility error incorrectly flagged on call within Pre'\''Class expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092847.260877-1-poulhies@adacore.com/mbox/"},{"id":1765,"url":"https://patchwork.plctlab.org/api/1.2/patches/1765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092929.261152-1-poulhies@adacore.com/","msgid":"<20221006092929.261152-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:29","name":"[COMMITED] ada: Incorrect inferences drawn from if/elsif/while conditions with -gnatVo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092929.261152-1-poulhies@adacore.com/mbox/"},{"id":1767,"url":"https://patchwork.plctlab.org/api/1.2/patches/1767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092943.261301-1-poulhies@adacore.com/","msgid":"<20221006092943.261301-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:43","name":"[COMMITED] ada: Add C declarations for Storage Model support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092943.261301-1-poulhies@adacore.com/mbox/"},{"id":1768,"url":"https://patchwork.plctlab.org/api/1.2/patches/1768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.607412-1-philipp.tomsich@vrull.eu/","msgid":"<20221006092951.607412-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-06T09:29:51","name":"[v2] aarch64: update Ampere-1 core definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.607412-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1766,"url":"https://patchwork.plctlab.org/api/1.2/patches/1766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.261362-1-poulhies@adacore.com/","msgid":"<20221006092951.261362-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:51","name":"[COMMITED] ada: Fix inserting of validity checks in lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.261362-1-poulhies@adacore.com/mbox/"},{"id":1772,"url":"https://patchwork.plctlab.org/api/1.2/patches/1772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093006.261475-1-poulhies@adacore.com/","msgid":"<20221006093006.261475-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:30:06","name":"[COMMITED] ada: stack scrubbing: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093006.261475-1-poulhies@adacore.com/mbox/"},{"id":1769,"url":"https://patchwork.plctlab.org/api/1.2/patches/1769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093051.261719-1-poulhies@adacore.com/","msgid":"<20221006093051.261719-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:30:51","name":"[COMMITED] ada: hardened booleans: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093051.261719-1-poulhies@adacore.com/mbox/"},{"id":1770,"url":"https://patchwork.plctlab.org/api/1.2/patches/1770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093108.261899-1-poulhies@adacore.com/","msgid":"<20221006093108.261899-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:08","name":"[COMMITED] ada: hardened conditionals: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093108.261899-1-poulhies@adacore.com/mbox/"},{"id":1771,"url":"https://patchwork.plctlab.org/api/1.2/patches/1771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093112.261959-1-poulhies@adacore.com/","msgid":"<20221006093112.261959-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:12","name":"[COMMITED] ada: Cleanup related to lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093112.261959-1-poulhies@adacore.com/mbox/"},{"id":1773,"url":"https://patchwork.plctlab.org/api/1.2/patches/1773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093127.262068-1-poulhies@adacore.com/","msgid":"<20221006093127.262068-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:27","name":"[COMMITED] ada: Reject conditional goto in lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093127.262068-1-poulhies@adacore.com/mbox/"},{"id":1774,"url":"https://patchwork.plctlab.org/api/1.2/patches/1774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093142.262226-1-poulhies@adacore.com/","msgid":"<20221006093142.262226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:42","name":"[COMMITED] ada: Minor potential bug in sem_ch6.adb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093142.262226-1-poulhies@adacore.com/mbox/"},{"id":1775,"url":"https://patchwork.plctlab.org/api/1.2/patches/1775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093147.262286-1-poulhies@adacore.com/","msgid":"<20221006093147.262286-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:47","name":"[COMMITED] ada: Implementation of support for storage models in gigi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093147.262286-1-poulhies@adacore.com/mbox/"},{"id":1778,"url":"https://patchwork.plctlab.org/api/1.2/patches/1778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006100752.1E029383FB9B@sourceware.org/","msgid":"<20221006100752.1E029383FB9B@sourceware.org>","list_archive_url":null,"date":"2022-10-06T10:07:08","name":"tree-optimization/107107 - tail-merging VN wrong-code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006100752.1E029383FB9B@sourceware.org/mbox/"},{"id":1779,"url":"https://patchwork.plctlab.org/api/1.2/patches/1779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006105110.1719060-1-aldyh@redhat.com/","msgid":"<20221006105110.1719060-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T10:51:10","name":"[RFC] Add op1_range for __builtin_signbit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006105110.1719060-1-aldyh@redhat.com/mbox/"},{"id":1780,"url":"https://patchwork.plctlab.org/api/1.2/patches/1780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e747364c-f716-1661-2570-590a4c47820c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T10:55:01","name":"openmp: Map holds clause to IFN_ASSUME for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e747364c-f716-1661-2570-590a4c47820c@codesourcery.com/mbox/"},{"id":1782,"url":"https://patchwork.plctlab.org/api/1.2/patches/1782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006122037.48AAF3839DFC@sourceware.org/","msgid":"<20221006122037.48AAF3839DFC@sourceware.org>","list_archive_url":null,"date":"2022-10-06T12:19:53","name":"middle-end/107115 - avoid bogus redundant store removal during RTL expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006122037.48AAF3839DFC@sourceware.org/mbox/"},{"id":1783,"url":"https://patchwork.plctlab.org/api/1.2/patches/1783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu/","msgid":"<20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2022-10-06T14:34:00","name":"[RFC] c++: parser - Support for target address spaces in C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":1784,"url":"https://patchwork.plctlab.org/api/1.2/patches/1784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz7rBzPwUuBl4VQb@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T14:49:43","name":"[v2] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz7rBzPwUuBl4VQb@redhat.com/mbox/"},{"id":1785,"url":"https://patchwork.plctlab.org/api/1.2/patches/1785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com/","msgid":"<55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com>","list_archive_url":null,"date":"2022-10-06T16:01:36","name":"gcc-12: FTBFS on hurd-i386","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com/mbox/"},{"id":1786,"url":"https://patchwork.plctlab.org/api/1.2/patches/1786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006161916.4118820-1-ppalka@redhat.com/","msgid":"<20221006161916.4118820-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-06T16:19:16","name":"c++ modules: static var in inline function [PR104433]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006161916.4118820-1-ppalka@redhat.com/mbox/"},{"id":1787,"url":"https://patchwork.plctlab.org/api/1.2/patches/1787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ObKI+7c+ai+g4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T17:20:44","name":"c++, v2: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ObKI+7c+ai+g4@tucnak/mbox/"},{"id":1788,"url":"https://patchwork.plctlab.org/api/1.2/patches/1788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2601473.BddDVKsqQX@fomalhaut/","msgid":"<2601473.BddDVKsqQX@fomalhaut>","list_archive_url":null,"date":"2022-10-06T17:25:53","name":"Reduce DF computation at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2601473.BddDVKsqQX@fomalhaut/mbox/"},{"id":1789,"url":"https://patchwork.plctlab.org/api/1.2/patches/1789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com/","msgid":"<4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com>","list_archive_url":null,"date":"2022-10-06T17:38:09","name":"Fix gdb FilteringTypePrinter (again)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com/mbox/"},{"id":1790,"url":"https://patchwork.plctlab.org/api/1.2/patches/1790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006182251.3453018-1-jason@redhat.com/","msgid":"<20221006182251.3453018-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-06T18:22:51","name":"[RFA] gimplify: prevent some C++ temporary elision","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006182251.3453018-1-jason@redhat.com/mbox/"},{"id":1791,"url":"https://patchwork.plctlab.org/api/1.2/patches/1791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ecbP4fDo7NivD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T18:29:05","name":"c++, v3: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ecbP4fDo7NivD@tucnak/mbox/"},{"id":1792,"url":"https://patchwork.plctlab.org/api/1.2/patches/1792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006190255.361385-1-cf.natali@gmail.com/","msgid":"<20221006190255.361385-1-cf.natali@gmail.com>","list_archive_url":null,"date":"2022-10-06T19:02:56","name":"[v2] libstdc++: basic_filebuf: don'\''t flush more often than necessary.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006190255.361385-1-cf.natali@gmail.com/mbox/"},{"id":1794,"url":"https://patchwork.plctlab.org/api/1.2/patches/1794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195038.807580-1-dmalcolm@redhat.com/","msgid":"<20221006195038.807580-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-06T19:50:38","name":"[committed] analyzer: fixes to call_summary_replay::dump_to_pp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195038.807580-1-dmalcolm@redhat.com/mbox/"},{"id":1793,"url":"https://patchwork.plctlab.org/api/1.2/patches/1793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195043.807604-1-dmalcolm@redhat.com/","msgid":"<20221006195043.807604-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-06T19:50:43","name":"[committed] analyzer: fix another ICE in PR 107158","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195043.807604-1-dmalcolm@redhat.com/mbox/"},{"id":1795,"url":"https://patchwork.plctlab.org/api/1.2/patches/1795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006204035.1796190-1-aldyh@redhat.com/","msgid":"<20221006204035.1796190-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T20:40:35","name":"[COMMITTED,PR107170] Avoid copying incompatible types in legacy VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006204035.1796190-1-aldyh@redhat.com/mbox/"},{"id":1796,"url":"https://patchwork.plctlab.org/api/1.2/patches/1796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2128dcf14408b394358f51802e73bcc9d922889.camel@vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T21:29:57","name":"[rs6000] Fix addg6s builtin with long long parameters. (PR100693)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2128dcf14408b394358f51802e73bcc9d922889.camel@vnet.ibm.com/mbox/"},{"id":1797,"url":"https://patchwork.plctlab.org/api/1.2/patches/1797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9L+2VE5evyna+Z@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T21:43:23","name":"[v3] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9L+2VE5evyna+Z@redhat.com/mbox/"},{"id":1798,"url":"https://patchwork.plctlab.org/api/1.2/patches/1798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9UXQV4MrH5TbOC@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T22:19:09","name":"[committed] libgcc, arc: Fix build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9UXQV4MrH5TbOC@tucnak/mbox/"},{"id":1799,"url":"https://patchwork.plctlab.org/api/1.2/patches/1799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz+LH/upS8aybRBM@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T02:12:47","name":"[v3] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz+LH/upS8aybRBM@redhat.com/mbox/"},{"id":1800,"url":"https://patchwork.plctlab.org/api/1.2/patches/1800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXeSRifWKVEE3vW87v7CMJ--04uB=0i=dxKBA=8piwKcA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T02:15:39","name":"Go patch committed: better argument checking for builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXeSRifWKVEE3vW87v7CMJ--04uB=0i=dxKBA=8piwKcA@mail.gmail.com/mbox/"},{"id":1802,"url":"https://patchwork.plctlab.org/api/1.2/patches/1802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007040325.21276-1-kito.cheng@sifive.com/","msgid":"<20221007040325.21276-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-07T04:03:25","name":"PR middle-end/88345: Honor -falign-functions=N even optimized for size.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007040325.21276-1-kito.cheng@sifive.com/mbox/"},{"id":1804,"url":"https://patchwork.plctlab.org/api/1.2/patches/1804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz/REPRnQs0T2CXz@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-07T07:11:12","name":"[committed] Fix comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz/REPRnQs0T2CXz@tucnak/mbox/"},{"id":1805,"url":"https://patchwork.plctlab.org/api/1.2/patches/1805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbd6fff8-30fe-c840-ddf9-56f5bfaa6e16@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-07T08:11:39","name":"[pushed] remove dead variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbd6fff8-30fe-c840-ddf9-56f5bfaa6e16@suse.cz/mbox/"},{"id":1806,"url":"https://patchwork.plctlab.org/api/1.2/patches/1806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz/","msgid":"<4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz>","list_archive_url":null,"date":"2022-10-07T08:24:17","name":"[pushed] fix clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz/mbox/"},{"id":1807,"url":"https://patchwork.plctlab.org/api/1.2/patches/1807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz/","msgid":"<844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz>","list_archive_url":null,"date":"2022-10-07T08:35:35","name":"[pushed] libdecnumber: remove unused variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz/mbox/"},{"id":1808,"url":"https://patchwork.plctlab.org/api/1.2/patches/1808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz/","msgid":"<22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz>","list_archive_url":null,"date":"2022-10-07T09:36:24","name":"[pushed] contrib: remove extra fetch from git_update_version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz/mbox/"},{"id":1809,"url":"https://patchwork.plctlab.org/api/1.2/patches/1809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007114350.1212377-1-jwakely@redhat.com/","msgid":"<20221007114350.1212377-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:43:50","name":"[committed] libstdc++: Use bold style for DR titles in the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007114350.1212377-1-jwakely@redhat.com/mbox/"},{"id":1810,"url":"https://patchwork.plctlab.org/api/1.2/patches/1810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115701.1226696-1-jwakely@redhat.com/","msgid":"<20221007115701.1226696-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:57:01","name":"[committed] libstdc++: Shuffle header dependencies of ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115701.1226696-1-jwakely@redhat.com/mbox/"},{"id":1811,"url":"https://patchwork.plctlab.org/api/1.2/patches/1811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115713.1226717-1-jwakely@redhat.com/","msgid":"<20221007115713.1226717-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:57:13","name":"[committed] libstdc++: Add --disable-libstdcxx-hosted as an alias for hosted-libstdcxx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115713.1226717-1-jwakely@redhat.com/mbox/"},{"id":1812,"url":"https://patchwork.plctlab.org/api/1.2/patches/1812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007122659.274CA13A3D@imap2.suse-dmz.suse.de/","msgid":"<20221007122659.274CA13A3D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-07T12:26:56","name":"tree-optimization/107153 - autopar SSA update issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007122659.274CA13A3D@imap2.suse-dmz.suse.de/mbox/"},{"id":1813,"url":"https://patchwork.plctlab.org/api/1.2/patches/1813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org/","msgid":"<44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org>","list_archive_url":null,"date":"2022-10-07T12:27:40","name":"c++: Lambda context mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org/mbox/"},{"id":1814,"url":"https://patchwork.plctlab.org/api/1.2/patches/1814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007132828.335317-1-torbjorn.svensson@foss.st.com/","msgid":"<20221007132828.335317-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-07T13:28:29","name":"[v3] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007132828.335317-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1815,"url":"https://patchwork.plctlab.org/api/1.2/patches/1815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007134901.5078-1-palmer@rivosinc.com/","msgid":"<20221007134901.5078-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-07T13:49:01","name":"doc: -falign-functions doesn'\''t override the __attribute__((align(N)))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007134901.5078-1-palmer@rivosinc.com/mbox/"},{"id":1816,"url":"https://patchwork.plctlab.org/api/1.2/patches/1816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org/","msgid":"<7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org>","list_archive_url":null,"date":"2022-10-07T14:22:18","name":"libiberty: Demangle variadic template lambdas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org/mbox/"},{"id":1817,"url":"https://patchwork.plctlab.org/api/1.2/patches/1817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com/","msgid":"<798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com>","list_archive_url":null,"date":"2022-10-07T14:26:58","name":"[v5] libgomp/nvptx: Prepare for reverse-offload callback handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com/mbox/"},{"id":1818,"url":"https://patchwork.plctlab.org/api/1.2/patches/1818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007150952.102429-1-ppalka@redhat.com/","msgid":"<20221007150952.102429-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-07T15:09:52","name":"c++ modules: ICE with bitfield member in class template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007150952.102429-1-ppalka@redhat.com/mbox/"},{"id":1819,"url":"https://patchwork.plctlab.org/api/1.2/patches/1819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007155452.1299670-1-jwakely@redhat.com/","msgid":"<20221007155452.1299670-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T15:54:52","name":"libstdc++: Allow emergency EH alloc pool size to be tuned [PR68606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007155452.1299670-1-jwakely@redhat.com/mbox/"},{"id":1820,"url":"https://patchwork.plctlab.org/api/1.2/patches/1820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0BPdGc2AH9/gUtn@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T16:10:28","name":"[v4] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0BPdGc2AH9/gUtn@redhat.com/mbox/"},{"id":1821,"url":"https://patchwork.plctlab.org/api/1.2/patches/1821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007164509.854924-1-dmalcolm@redhat.com/","msgid":"<20221007164509.854924-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-07T16:45:09","name":"[committed] analyzer: extract bits from integer constants [PR105783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007164509.854924-1-dmalcolm@redhat.com/mbox/"},{"id":1822,"url":"https://patchwork.plctlab.org/api/1.2/patches/1822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr/","msgid":"<43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr>","list_archive_url":null,"date":"2022-10-07T20:26:18","name":"[v3] Fortran: error recovery for invalid types in array constructors [PR107000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr/mbox/"},{"id":1823,"url":"https://patchwork.plctlab.org/api/1.2/patches/1823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007204506.cokw3lkkn5aequ5h@begin/","msgid":"<20221007204506.cokw3lkkn5aequ5h@begin>","list_archive_url":null,"date":"2022-10-07T20:45:06","name":"[PATCHv2] libstdc++: Mark pieces of gnu-linux/os_support.h linux-specific","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007204506.cokw3lkkn5aequ5h@begin/mbox/"},{"id":1824,"url":"https://patchwork.plctlab.org/api/1.2/patches/1824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CVRvVh+I5pixLz@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T21:08:22","name":"[v4] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CVRvVh+I5pixLz@redhat.com/mbox/"},{"id":1825,"url":"https://patchwork.plctlab.org/api/1.2/patches/1825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CZa5mUxrBQ1WEL@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T21:26:03","name":"[v5] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CZa5mUxrBQ1WEL@redhat.com/mbox/"},{"id":1826,"url":"https://patchwork.plctlab.org/api/1.2/patches/1826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221008002758.3749441-1-jason@redhat.com/","msgid":"<20221008002758.3749441-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-08T00:27:58","name":"[pushed] c++: track whether we expect a TARGET_EXPR to be elided","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221008002758.3749441-1-jason@redhat.com/mbox/"},{"id":1835,"url":"https://patchwork.plctlab.org/api/1.2/patches/1835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com/","msgid":"<5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-08T21:18:04","name":"preprocessor: Fix tracking of system header state [PR60014, PR60723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com/mbox/"},{"id":1837,"url":"https://patchwork.plctlab.org/api/1.2/patches/1837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-1-dimitar@dinux.eu/","msgid":"<20221009114049.29943-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-10-09T11:40:48","name":"[committed] pru: Optimize DI shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-1-dimitar@dinux.eu/mbox/"},{"id":1838,"url":"https://patchwork.plctlab.org/api/1.2/patches/1838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-2-dimitar@dinux.eu/","msgid":"<20221009114049.29943-2-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-10-09T11:40:49","name":"[committed] pru: Add cbranchdi4 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-2-dimitar@dinux.eu/mbox/"},{"id":1839,"url":"https://patchwork.plctlab.org/api/1.2/patches/1839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1246dffc-383d-4eea-b3f8-03d5ac39aece-1665341826741@3c-app-gmx-bs08/","msgid":"","list_archive_url":null,"date":"2022-10-09T18:57:06","name":"Fortran: fix check of polymorphic elements in data transfers [PR100971]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1246dffc-383d-4eea-b3f8-03d5ac39aece-1665341826741@3c-app-gmx-bs08/mbox/"},{"id":1840,"url":"https://patchwork.plctlab.org/api/1.2/patches/1840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4cb5dc305cb30c0c9983e2048c66a31199be892.1665351784.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-09T21:51:34","name":"[v4,1/4] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4cb5dc305cb30c0c9983e2048c66a31199be892.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1841,"url":"https://patchwork.plctlab.org/api/1.2/patches/1841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com/","msgid":"<8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:35","name":"[v4,2/4] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1843,"url":"https://patchwork.plctlab.org/api/1.2/patches/1843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com/","msgid":"<2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:36","name":"[v4,3/4] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1842,"url":"https://patchwork.plctlab.org/api/1.2/patches/1842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com/","msgid":"<3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:37","name":"[v4,4/4] OpenMP/OpenACC: Unordered/non-constant component offset struct mapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com/mbox/"},{"id":1846,"url":"https://patchwork.plctlab.org/api/1.2/patches/1846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010012601.2741373-1-hongtao.liu@intel.com/","msgid":"<20221010012601.2741373-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-10T01:26:01","name":"[x86] Fix unrecognizable insn of cvtss2si.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010012601.2741373-1-hongtao.liu@intel.com/mbox/"},{"id":1847,"url":"https://patchwork.plctlab.org/api/1.2/patches/1847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-1-claziss@gmail.com/","msgid":"<20221010072902.3669746-1-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:28:58","name":"[committed,1/5] arc: Fix enter pattern instruction'\''s offsets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-1-claziss@gmail.com/mbox/"},{"id":1848,"url":"https://patchwork.plctlab.org/api/1.2/patches/1848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-2-claziss@gmail.com/","msgid":"<20221010072902.3669746-2-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:28:59","name":"[committed,2/5] arc: Remove Rcr constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-2-claziss@gmail.com/mbox/"},{"id":1850,"url":"https://patchwork.plctlab.org/api/1.2/patches/1850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-3-claziss@gmail.com/","msgid":"<20221010072902.3669746-3-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:00","name":"[committed,3/5] arc: Remove Rcw constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-3-claziss@gmail.com/mbox/"},{"id":1851,"url":"https://patchwork.plctlab.org/api/1.2/patches/1851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-4-claziss@gmail.com/","msgid":"<20221010072902.3669746-4-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:01","name":"[committed,4/5] arc: Remove Rcq constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-4-claziss@gmail.com/mbox/"},{"id":1849,"url":"https://patchwork.plctlab.org/api/1.2/patches/1849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-5-claziss@gmail.com/","msgid":"<20221010072902.3669746-5-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:02","name":"[committed,5/5] arc: Remove obsolete mRcq and mRcw options.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-5-claziss@gmail.com/mbox/"},{"id":1852,"url":"https://patchwork.plctlab.org/api/1.2/patches/1852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0PMXoRzh+dg/a1n@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T07:40:14","name":"[committed] openmp, fortran: Fix up IFN_ASSUME call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0PMXoRzh+dg/a1n@tucnak/mbox/"},{"id":1853,"url":"https://patchwork.plctlab.org/api/1.2/patches/1853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af86e552-974d-4233-8943-4dd155b00594@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T08:20:38","name":"[GCC] arm: Add cde feature support for Cortex-M55 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af86e552-974d-4233-8943-4dd155b00594@AZ-NEU-EX04.Arm.com/mbox/"},{"id":1854,"url":"https://patchwork.plctlab.org/api/1.2/patches/1854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Pd0i4FCMyx6ukZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T08:54:42","name":"middle-end IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Pd0i4FCMyx6ukZ@tucnak/mbox/"},{"id":1855,"url":"https://patchwork.plctlab.org/api/1.2/patches/1855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Puy8QL8/9zgNXp@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T10:07:07","name":"Require fgraphite effective target for pr107153.c test [PR107153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Puy8QL8/9zgNXp@tucnak/mbox/"},{"id":1856,"url":"https://patchwork.plctlab.org/api/1.2/patches/1856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010110339.E9E2513479@imap2.suse-dmz.suse.de/","msgid":"<20221010110339.E9E2513479@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-10T11:03:39","name":"[RFT] Vectorization of first-order recurrences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010110339.E9E2513479@imap2.suse-dmz.suse.de/mbox/"},{"id":1857,"url":"https://patchwork.plctlab.org/api/1.2/patches/1857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010112005.1523979-1-jwakely@redhat.com/","msgid":"<20221010112005.1523979-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-10T11:20:05","name":"[committed] libstdc++: std::make_signed_t should be ill-formed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010112005.1523979-1-jwakely@redhat.com/mbox/"},{"id":1862,"url":"https://patchwork.plctlab.org/api/1.2/patches/1862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-1-aldyh@redhat.com/","msgid":"<20221010124946.154152-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:42","name":"[COMMITTED] Return non-legacy ranges in range.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-1-aldyh@redhat.com/mbox/"},{"id":1859,"url":"https://patchwork.plctlab.org/api/1.2/patches/1859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-2-aldyh@redhat.com/","msgid":"<20221010124946.154152-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:43","name":"[COMMITTED] x UNORD x should set NAN on the TRUE side (and !NAN on the FALSE side).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-2-aldyh@redhat.com/mbox/"},{"id":1858,"url":"https://patchwork.plctlab.org/api/1.2/patches/1858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-3-aldyh@redhat.com/","msgid":"<20221010124946.154152-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:44","name":"[COMMITTED] The true side of x != x should set NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-3-aldyh@redhat.com/mbox/"},{"id":1861,"url":"https://patchwork.plctlab.org/api/1.2/patches/1861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-4-aldyh@redhat.com/","msgid":"<20221010124946.154152-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:45","name":"[COMMITTED] Add frange::maybe_isnan (bool sign).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-4-aldyh@redhat.com/mbox/"},{"id":1860,"url":"https://patchwork.plctlab.org/api/1.2/patches/1860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-5-aldyh@redhat.com/","msgid":"<20221010124946.154152-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:46","name":"[COMMITTED] Make range-op-float entries public.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-5-aldyh@redhat.com/mbox/"},{"id":1863,"url":"https://patchwork.plctlab.org/api/1.2/patches/1863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131315.13580-1-kito.cheng@sifive.com/","msgid":"<20221010131315.13580-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:13:15","name":"[committed] RISC-V: Add newline to the end of file [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131315.13580-1-kito.cheng@sifive.com/mbox/"},{"id":1864,"url":"https://patchwork.plctlab.org/api/1.2/patches/1864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131418.13632-1-kito.cheng@sifive.com/","msgid":"<20221010131418.13632-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:14:18","name":"[committed] RISC-V: Adjust testcase for rvv/base/user-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131418.13632-1-kito.cheng@sifive.com/mbox/"},{"id":1865,"url":"https://patchwork.plctlab.org/api/1.2/patches/1865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131436.13678-1-kito.cheng@sifive.com/","msgid":"<20221010131436.13678-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:14:36","name":"[committed] RISC-V: Add riscv_vector.h wrapper in testsuite to prevent pull in stdint.h from C library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131436.13678-1-kito.cheng@sifive.com/mbox/"},{"id":1866,"url":"https://patchwork.plctlab.org/api/1.2/patches/1866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134322.169275-1-juzhe.zhong@rivai.ai/","msgid":"<20221010134322.169275-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:43:22","name":"RISC-V: Add missing vsetvl instruction type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134322.169275-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1867,"url":"https://patchwork.plctlab.org/api/1.2/patches/1867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134928.171673-1-juzhe.zhong@rivai.ai/","msgid":"<20221010134928.171673-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:49:28","name":"RISC-V: move struct vector_type_info from *.h to *.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134928.171673-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1868,"url":"https://patchwork.plctlab.org/api/1.2/patches/1868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010135721.173181-1-juzhe.zhong@rivai.ai/","msgid":"<20221010135721.173181-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:57:21","name":"RISC-V: move struct vector_type_info from *.h to *.cc and change \"user_name\" into \"name\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010135721.173181-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1869,"url":"https://patchwork.plctlab.org/api/1.2/patches/1869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu/","msgid":"<20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2022-10-10T14:11:41","name":"[RFC] Add support for vectors in comparisons (like the C++ frontend does)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":1870,"url":"https://patchwork.plctlab.org/api/1.2/patches/1870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsfviww8.fsf@euler.schwinge.homeip.net/","msgid":"<87fsfviww8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-10T14:19:35","name":"Restore default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'' (was: [PATCH 1/3] STABS: remove -gstabs and -gxcoff functionality)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsfviww8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":1874,"url":"https://patchwork.plctlab.org/api/1.2/patches/1874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00Blzp-Rc@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:18","name":"2/19 modula2 front end: Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00Blzp-Rc@lancelot/mbox/"},{"id":1876,"url":"https://patchwork.plctlab.org/api/1.2/patches/1876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00BlzX-GX@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:18","name":"1/19 modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00BlzX-GX@lancelot/mbox/"},{"id":1882,"url":"https://patchwork.plctlab.org/api/1.2/patches/1882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm0N-LJ@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:19","name":"4/19 modula2 front end: libgm2/libm2pim contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm0N-LJ@lancelot/mbox/"},{"id":1872,"url":"https://patchwork.plctlab.org/api/1.2/patches/1872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm08-7e@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:19","name":"3/19 modula2 front end: gm2 driver files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm08-7e@lancelot/mbox/"},{"id":1871,"url":"https://patchwork.plctlab.org/api/1.2/patches/1871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm11-Pu@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"7/19 modula2 front end: libgm2/libm2log contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm11-Pu@lancelot/mbox/"},{"id":1881,"url":"https://patchwork.plctlab.org/api/1.2/patches/1881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0a-3R@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"5/19 modula2 front end: libgm2/libm2iso contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0a-3R@lancelot/mbox/"},{"id":1873,"url":"https://patchwork.plctlab.org/api/1.2/patches/1873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0n-FL@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"6/19 modula2 front end: libgm2/libm2min contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0n-FL@lancelot/mbox/"},{"id":1877,"url":"https://patchwork.plctlab.org/api/1.2/patches/1877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1X-Kn@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:21","name":"9/19 modula2 front end: plugin source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1X-Kn@lancelot/mbox/"},{"id":1875,"url":"https://patchwork.plctlab.org/api/1.2/patches/1875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1G-6p@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:21","name":"8/19 modula2 front end: libgm2 contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1G-6p@lancelot/mbox/"},{"id":1883,"url":"https://patchwork.plctlab.org/api/1.2/patches/1883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm2V-Q5@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:22","name":"11/19 modula2 front end: gimple interface *[a-d]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm2V-Q5@lancelot/mbox/"},{"id":1884,"url":"https://patchwork.plctlab.org/api/1.2/patches/1884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm22-62@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:22","name":"10/19 modula2 front end: gimple interface header files *.h and *.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm22-62@lancelot/mbox/"},{"id":1887,"url":"https://patchwork.plctlab.org/api/1.2/patches/1887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukV-00Bm34-D9@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:23","name":"12/19 modula2 front end: gimple interface *[e-f]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukV-00Bm34-D9@lancelot/mbox/"},{"id":1879,"url":"https://patchwork.plctlab.org/api/1.2/patches/1879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3W-F9@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:24","name":"14/19 modula2 front end: gimple interface remainder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3W-F9@lancelot/mbox/"},{"id":1878,"url":"https://patchwork.plctlab.org/api/1.2/patches/1878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3H-01@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:24","name":"13/19 modula2 front end: gimple interface *[g-m]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3H-01@lancelot/mbox/"},{"id":1885,"url":"https://patchwork.plctlab.org/api/1.2/patches/1885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm41-MC@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:25","name":"16/19 modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm41-MC@lancelot/mbox/"},{"id":1886,"url":"https://patchwork.plctlab.org/api/1.2/patches/1886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm3i-29@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:25","name":"15/19 modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm3i-29@lancelot/mbox/"},{"id":1880,"url":"https://patchwork.plctlab.org/api/1.2/patches/1880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukY-00Bm4O-2a@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:26","name":"17/19 modula2 front end: dejagnu expect library scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukY-00Bm4O-2a@lancelot/mbox/"},{"id":1888,"url":"https://patchwork.plctlab.org/api/1.2/patches/1888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010185829.312666-1-aldyh@redhat.com/","msgid":"<20221010185829.312666-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T18:58:29","name":"Avoid calling tracer.trailer() twice.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010185829.312666-1-aldyh@redhat.com/mbox/"},{"id":1889,"url":"https://patchwork.plctlab.org/api/1.2/patches/1889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Rv6e2hgWpo77D/@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T19:18:01","name":"[v5] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Rv6e2hgWpo77D/@redhat.com/mbox/"},{"id":1891,"url":"https://patchwork.plctlab.org/api/1.2/patches/1891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVgcPODk5EbUiTnNtFH3cQikzcpC=_WU0fTUABPLxG_AQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T21:27:29","name":"Go patch committed: Only build thunk struct type when needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVgcPODk5EbUiTnNtFH3cQikzcpC=_WU0fTUABPLxG_AQ@mail.gmail.com/mbox/"},{"id":1892,"url":"https://patchwork.plctlab.org/api/1.2/patches/1892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW9LELz-3fnT05qAkV8POsV0omaCvxvugYX=SWat7iKyg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T21:46:29","name":"Go patch committed: Treat S(\"\") as a string constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW9LELz-3fnT05qAkV8POsV0omaCvxvugYX=SWat7iKyg@mail.gmail.com/mbox/"},{"id":1896,"url":"https://patchwork.plctlab.org/api/1.2/patches/1896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354293045D32BFB1659CB2D691239@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T00:36:59","name":"[ICE] Fix for PR107193.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354293045D32BFB1659CB2D691239@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1898,"url":"https://patchwork.plctlab.org/api/1.2/patches/1898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011025113.624107-1-ppalka@redhat.com/","msgid":"<20221011025113.624107-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-11T02:51:13","name":"libstdc++: Implement ranges::repeat_view from P2474R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011025113.624107-1-ppalka@redhat.com/mbox/"},{"id":1899,"url":"https://patchwork.plctlab.org/api/1.2/patches/1899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db08f7bd-9bb5-5ab4-ca1c-0cb5dbe851f5@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T04:46:35","name":"[committed,PR,rtl-optimization/107182] Clear EDGE_CROSSING for jump->ret optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db08f7bd-9bb5-5ab4-ca1c-0cb5dbe851f5@gmail.com/mbox/"},{"id":1900,"url":"https://patchwork.plctlab.org/api/1.2/patches/1900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011044820.312228-1-juzhe.zhong@rivai.ai/","msgid":"<20221011044820.312228-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T04:48:20","name":"RISC-V: Move function place to make it looks better.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011044820.312228-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1901,"url":"https://patchwork.plctlab.org/api/1.2/patches/1901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011061521.65729-1-juzhe.zhong@rivai.ai/","msgid":"<20221011061521.65729-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:15:21","name":"RISC-V: Refine register_builtin_types function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011061521.65729-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1902,"url":"https://patchwork.plctlab.org/api/1.2/patches/1902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062159.69697-1-juzhe.zhong@rivai.ai/","msgid":"<20221011062159.69697-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:21:59","name":"RISC-V: Clang-format add_vector_attribute function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062159.69697-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1903,"url":"https://patchwork.plctlab.org/api/1.2/patches/1903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062333.70907-1-juzhe.zhong@rivai.ai/","msgid":"<20221011062333.70907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:23:33","name":"RISC-V: Remove TUPLE size macro define.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062333.70907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1904,"url":"https://patchwork.plctlab.org/api/1.2/patches/1904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063156.115984-1-juzhe.zhong@rivai.ai/","msgid":"<20221011063156.115984-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:31:56","name":"RISC-V: Refine riscv-vector-builtins.o include files and makefile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063156.115984-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1905,"url":"https://patchwork.plctlab.org/api/1.2/patches/1905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063627.131177-1-juzhe.zhong@rivai.ai/","msgid":"<20221011063627.131177-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:36:27","name":"RISC-V: Clang-format vector_type_index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063627.131177-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1906,"url":"https://patchwork.plctlab.org/api/1.2/patches/1906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz/","msgid":"<746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz>","list_archive_url":null,"date":"2022-10-11T06:54:25","name":"[(pushed)] ranger: add override keyword","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz/mbox/"},{"id":1907,"url":"https://patchwork.plctlab.org/api/1.2/patches/1907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1acd025-c91f-58b7-3b34-40635bb38cac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T07:38:48","name":"[PATCH-1,rs6000] Generate permute index directly for little endian target [PR100866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1acd025-c91f-58b7-3b34-40635bb38cac@linux.ibm.com/mbox/"},{"id":1908,"url":"https://patchwork.plctlab.org/api/1.2/patches/1908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011080316.1778261-1-hongtao.liu@intel.com/","msgid":"<20221011080316.1778261-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-11T08:03:16","name":"[x86] Add define_insn_and_split to support general version of \"kxnor\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011080316.1778261-1-hongtao.liu@intel.com/mbox/"},{"id":1909,"url":"https://patchwork.plctlab.org/api/1.2/patches/1909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011083137.336470-1-aldyh@redhat.com/","msgid":"<20221011083137.336470-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T08:31:37","name":"[COMMITTED,PR107195] Set range to zero when nonzero mask is 0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011083137.336470-1-aldyh@redhat.com/mbox/"},{"id":1913,"url":"https://patchwork.plctlab.org/api/1.2/patches/1913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com/","msgid":"<45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:03","name":"[committed,1/6] amdgcn: add multiple vector sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1910,"url":"https://patchwork.plctlab.org/api/1.2/patches/1910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com/","msgid":"<0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:04","name":"[committed,2/6] amdgcn: Resolve insn conditions at compile time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1911,"url":"https://patchwork.plctlab.org/api/1.2/patches/1911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com/","msgid":"<5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:05","name":"[committed,3/6] amdgcn: Add vec_extract for partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1912,"url":"https://patchwork.plctlab.org/api/1.2/patches/1912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com/","msgid":"<769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:06","name":"[committed,4/6] amdgcn: vec_init for multiple vector sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1914,"url":"https://patchwork.plctlab.org/api/1.2/patches/1914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf6b5c74a6f1927174091c73aa51401895ef92f0.1665485382.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T11:02:07","name":"[committed,5/6] amdgcn: Add vector integer negate insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf6b5c74a6f1927174091c73aa51401895ef92f0.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1915,"url":"https://patchwork.plctlab.org/api/1.2/patches/1915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9a05594d227cde79a67dc715bd9d82e9c464e9.1665485382.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T11:02:08","name":"[committed,6/6] amdgcn: vector testsuite tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9a05594d227cde79a67dc715bd9d82e9c464e9.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1916,"url":"https://patchwork.plctlab.org/api/1.2/patches/1916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011111653.6CDD23857B99@sourceware.org/","msgid":"<20221011111653.6CDD23857B99@sourceware.org>","list_archive_url":null,"date":"2022-10-11T11:15:24","name":"tree-optimization/107212 - SLP reduction of reduction paths","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011111653.6CDD23857B99@sourceware.org/mbox/"},{"id":1917,"url":"https://patchwork.plctlab.org/api/1.2/patches/1917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org/","msgid":"<84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org>","list_archive_url":null,"date":"2022-10-11T11:41:02","name":"libiberty: Demangling '\''M'\'' prefixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org/mbox/"},{"id":1918,"url":"https://patchwork.plctlab.org/api/1.2/patches/1918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-11T12:43:02","name":"[1/2] gcov: test switch/break line counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1919,"url":"https://patchwork.plctlab.org/api/1.2/patches/1919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-11T12:43:03","name":"[2/2] gcov: test line count for label in then/else block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1920,"url":"https://patchwork.plctlab.org/api/1.2/patches/1920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VwowKL1r/QXhLo@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-11T13:33:23","name":"c++: Implement excess precision support for C++ [PR107097, PR323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VwowKL1r/QXhLo@tucnak/mbox/"},{"id":1921,"url":"https://patchwork.plctlab.org/api/1.2/patches/1921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VxcOxwjGbN6rKl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-11T13:36:48","name":"middle-end, v2: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VxcOxwjGbN6rKl@tucnak/mbox/"},{"id":1922,"url":"https://patchwork.plctlab.org/api/1.2/patches/1922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-1-aldyh@redhat.com/","msgid":"<20221011135136.369644-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:33","name":"[COMMITTED] Move TRUE case first in range-op.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-1-aldyh@redhat.com/mbox/"},{"id":1923,"url":"https://patchwork.plctlab.org/api/1.2/patches/1923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-2-aldyh@redhat.com/","msgid":"<20221011135136.369644-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:34","name":"[COMMITTED] Share common ordered comparison code with UN*_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-2-aldyh@redhat.com/mbox/"},{"id":1925,"url":"https://patchwork.plctlab.org/api/1.2/patches/1925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-3-aldyh@redhat.com/","msgid":"<20221011135136.369644-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:35","name":"[COMMITTED] Implement op1_range operators for unordered comparisons.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-3-aldyh@redhat.com/mbox/"},{"id":1924,"url":"https://patchwork.plctlab.org/api/1.2/patches/1924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-4-aldyh@redhat.com/","msgid":"<20221011135136.369644-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:36","name":"[COMMITTED] Implement ABS_EXPR operator for frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-4-aldyh@redhat.com/mbox/"},{"id":1926,"url":"https://patchwork.plctlab.org/api/1.2/patches/1926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011153507.784631-1-ppalka@redhat.com/","msgid":"<20221011153507.784631-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-11T15:35:07","name":"c++ modules: ICE with templated friend and std namespace [PR100134]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011153507.784631-1-ppalka@redhat.com/mbox/"},{"id":1927,"url":"https://patchwork.plctlab.org/api/1.2/patches/1927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011165750.328974-1-polacek@redhat.com/","msgid":"<20221011165750.328974-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-11T16:57:50","name":"testsuite: Only run -fcf-protection test on i?86/x86_64 [PR107213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011165750.328974-1-polacek@redhat.com/mbox/"},{"id":1930,"url":"https://patchwork.plctlab.org/api/1.2/patches/1930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-87876f1f-d6af-46cb-899e-014572306581-1665514076911@3c-app-gmx-bap36/","msgid":"","list_archive_url":null,"date":"2022-10-11T18:47:56","name":"Fortran: check types of source expressions before conversion [PR107215]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-87876f1f-d6af-46cb-899e-014572306581-1665514076911@3c-app-gmx-bap36/mbox/"},{"id":1931,"url":"https://patchwork.plctlab.org/api/1.2/patches/1931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011200003.695682-1-polacek@redhat.com/","msgid":"<20221011200003.695682-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-11T20:00:03","name":"c++: ICE with VEC_INIT_EXPR and defarg [PR106925]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011200003.695682-1-polacek@redhat.com/mbox/"},{"id":1932,"url":"https://patchwork.plctlab.org/api/1.2/patches/1932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-820c5571-4877-4f7c-bb95-3c9a5487d6a6-1665519780978@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2022-10-11T20:23:01","name":"Fortran: check types of operands of arithmetic binary operations [PR107217]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-820c5571-4877-4f7c-bb95-3c9a5487d6a6-1665519780978@3c-app-gmx-bs49/mbox/"},{"id":1933,"url":"https://patchwork.plctlab.org/api/1.2/patches/1933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-2-palmer@rivosinc.com/","msgid":"<20221011210156.7710-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:54","name":"[v2,1/3] doc: -falign-functions doesn'\''t override the __attribute__((align(N)))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-2-palmer@rivosinc.com/mbox/"},{"id":1935,"url":"https://patchwork.plctlab.org/api/1.2/patches/1935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-3-palmer@rivosinc.com/","msgid":"<20221011210156.7710-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:55","name":"[v2,2/3] doc: -falign-functions is ignored under -Os","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-3-palmer@rivosinc.com/mbox/"},{"id":1934,"url":"https://patchwork.plctlab.org/api/1.2/patches/1934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-4-palmer@rivosinc.com/","msgid":"<20221011210156.7710-4-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:56","name":"[v2,3/3] doc: -falign-functions is ignored for cold/size-optimized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-4-palmer@rivosinc.com/mbox/"},{"id":1936,"url":"https://patchwork.plctlab.org/api/1.2/patches/1936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011215831.67154-1-iain@sandoe.co.uk/","msgid":"<20221011215831.67154-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-10-11T21:58:31","name":"coroutines: Use cp_build_init_expr consistently.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011215831.67154-1-iain@sandoe.co.uk/mbox/"},{"id":1937,"url":"https://patchwork.plctlab.org/api/1.2/patches/1937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2257020.ElGaqSPkdT@fomalhaut/","msgid":"<2257020.ElGaqSPkdT@fomalhaut>","list_archive_url":null,"date":"2022-10-11T22:42:30","name":"[Ada] Enable support for atomic primitives on SPARC/Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2257020.ElGaqSPkdT@fomalhaut/mbox/"},{"id":1938,"url":"https://patchwork.plctlab.org/api/1.2/patches/1938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1908900.PYKUYFuaPT@fomalhaut/","msgid":"<1908900.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2022-10-11T22:57:58","name":"Fix emit_group_store regression on big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1908900.PYKUYFuaPT@fomalhaut/mbox/"},{"id":1939,"url":"https://patchwork.plctlab.org/api/1.2/patches/1939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012014236.301092-1-juzhe.zhong@rivai.ai/","msgid":"<20221012014236.301092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-12T01:42:36","name":"RISC-V: Add new line at end of file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012014236.301092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1940,"url":"https://patchwork.plctlab.org/api/1.2/patches/1940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012025945.578-1-lili.cui@intel.com/","msgid":"<20221012025945.578-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-12T02:59:45","name":"Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012025945.578-1-lili.cui@intel.com/mbox/"},{"id":1942,"url":"https://patchwork.plctlab.org/api/1.2/patches/1942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012031605.2071672-1-chenglulu@loongson.cn/","msgid":"<20221012031605.2071672-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-12T03:16:06","name":"LoongArch: Fixed a bug in the loongarch architecture of libitm package.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012031605.2071672-1-chenglulu@loongson.cn/mbox/"},{"id":1943,"url":"https://patchwork.plctlab.org/api/1.2/patches/1943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012064820.151529-1-guojiufu@linux.ibm.com/","msgid":"<20221012064820.151529-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-12T06:48:20","name":"[V4] rs6000: cannot_force_const_mem for HIGH code rtx[PR106460]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012064820.151529-1-guojiufu@linux.ibm.com/mbox/"},{"id":1945,"url":"https://patchwork.plctlab.org/api/1.2/patches/1945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-1-aldyh@redhat.com/","msgid":"<20221012065050.412900-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:46","name":"[COMMITTED] Add default relation_kind to floating point range-op entries.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-1-aldyh@redhat.com/mbox/"},{"id":1948,"url":"https://patchwork.plctlab.org/api/1.2/patches/1948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-2-aldyh@redhat.com/","msgid":"<20221012065050.412900-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:47","name":"[COMMITTED] Add an frange(type) constructor analogous to the irange version.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-2-aldyh@redhat.com/mbox/"},{"id":1946,"url":"https://patchwork.plctlab.org/api/1.2/patches/1946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-3-aldyh@redhat.com/","msgid":"<20221012065050.412900-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:48","name":"[COMMITTED] Disable tree to bool conversion in frange::update_nan.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-3-aldyh@redhat.com/mbox/"},{"id":1944,"url":"https://patchwork.plctlab.org/api/1.2/patches/1944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-4-aldyh@redhat.com/","msgid":"<20221012065050.412900-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:49","name":"[COMMITTED] Add method to query the sign of a NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-4-aldyh@redhat.com/mbox/"},{"id":1947,"url":"https://patchwork.plctlab.org/api/1.2/patches/1947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-5-aldyh@redhat.com/","msgid":"<20221012065050.412900-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:50","name":"[COMMITTED] Add stubs for floating point range-op tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-5-aldyh@redhat.com/mbox/"},{"id":1949,"url":"https://patchwork.plctlab.org/api/1.2/patches/1949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fb389c8-a541-ed41-1786-6325decae530@suse.cz/","msgid":"<6fb389c8-a541-ed41-1786-6325decae530@suse.cz>","list_archive_url":null,"date":"2022-10-12T07:32:30","name":"[(pushed)] regenerate configure files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fb389c8-a541-ed41-1786-6325decae530@suse.cz/mbox/"},{"id":1950,"url":"https://patchwork.plctlab.org/api/1.2/patches/1950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012075014.2922-1-lili.cui@intel.com/","msgid":"<20221012075014.2922-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-12T07:50:14","name":"MAINTAINERS: Add myself for write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012075014.2922-1-lili.cui@intel.com/mbox/"},{"id":1951,"url":"https://patchwork.plctlab.org/api/1.2/patches/1951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com/","msgid":"<63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com>","list_archive_url":null,"date":"2022-10-12T08:12:21","name":"[v2] rs6000: Rework option -mpowerpc64 handling [PR106680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com/mbox/"},{"id":1952,"url":"https://patchwork.plctlab.org/api/1.2/patches/1952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Z5lozuTufmyMpL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T08:23:50","name":"machmode: Introduce GET_MODE_NEXT_MODE with previous GET_MODE_WIDER_MODE meaning, add new GET_MODE_WIDER_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Z5lozuTufmyMpL@tucnak/mbox/"},{"id":1953,"url":"https://patchwork.plctlab.org/api/1.2/patches/1953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz/","msgid":"<75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz>","list_archive_url":null,"date":"2022-10-12T08:52:47","name":"[COMMITTED] gcov: rename gcov_write_summary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz/mbox/"},{"id":1954,"url":"https://patchwork.plctlab.org/api/1.2/patches/1954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-12T10:16:19","name":"Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1955,"url":"https://patchwork.plctlab.org/api/1.2/patches/1955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0af9v/wVgkAk3SW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T11:07:34","name":"machmode, v2: Introduce GET_MODE_NEXT_MODE with previous GET_MODE_WIDER_MODE meaning, add new GET_MODE_WIDER_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0af9v/wVgkAk3SW@tucnak/mbox/"},{"id":1956,"url":"https://patchwork.plctlab.org/api/1.2/patches/1956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012115252.1881060-1-jwakely@redhat.com/","msgid":"<20221012115252.1881060-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-12T11:52:52","name":"libgcc: Quote variable in Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012115252.1881060-1-jwakely@redhat.com/mbox/"},{"id":1957,"url":"https://patchwork.plctlab.org/api/1.2/patches/1957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebcb6977-c445-264e-ce06-d56beb4bbcc0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T14:05:32","name":"libgomp: Add offload_device_gcn check, add requires-4a.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebcb6977-c445-264e-ce06-d56beb4bbcc0@codesourcery.com/mbox/"},{"id":1958,"url":"https://patchwork.plctlab.org/api/1.2/patches/1958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012142300.16833-1-xry111@xry111.site/","msgid":"<20221012142300.16833-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-10-12T14:23:00","name":"LoongArch: implement count_{leading,trailing}_zeros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012142300.16833-1-xry111@xry111.site/mbox/"},{"id":1959,"url":"https://patchwork.plctlab.org/api/1.2/patches/1959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012153752.427563-1-jason@redhat.com/","msgid":"<20221012153752.427563-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-12T15:37:52","name":"[pushed] c++: defer all consteval in default args [DR2631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012153752.427563-1-jason@redhat.com/mbox/"},{"id":1960,"url":"https://patchwork.plctlab.org/api/1.2/patches/1960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bq9gWcofbF1jVr@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:27:34","name":"[v2] c++: ICE with VEC_INIT_EXPR and defarg [PR106925]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bq9gWcofbF1jVr@redhat.com/mbox/"},{"id":1961,"url":"https://patchwork.plctlab.org/api/1.2/patches/1961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwi5uCACMPSzN/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:51:23","name":"[committed] libgomp: Fix up creation of artificial teams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwi5uCACMPSzN/@tucnak/mbox/"},{"id":1962,"url":"https://patchwork.plctlab.org/api/1.2/patches/1962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwv5mXC2V8Hu1s@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:52:15","name":"[committed] libgomp: Add omp_in_explicit_task support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwv5mXC2V8Hu1s@tucnak/mbox/"},{"id":1963,"url":"https://patchwork.plctlab.org/api/1.2/patches/1963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bw7VWQp+vGpCoe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:53:01","name":"[committed] libgomp: Fix up OpenMP 5.2 feature bullet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bw7VWQp+vGpCoe@tucnak/mbox/"},{"id":1965,"url":"https://patchwork.plctlab.org/api/1.2/patches/1965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com/","msgid":"<3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com>","list_archive_url":null,"date":"2022-10-12T17:29:02","name":"vect: Don'\''t pattern match BITFIELD_REF'\''s of non-integrals [PR107226]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com/mbox/"},{"id":1964,"url":"https://patchwork.plctlab.org/api/1.2/patches/1964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f84887dd-1d9e-e53f-b171-494426634026@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T17:29:07","name":"ifcvt: Fix bitpos calculation in bitfield lowering [PR107229]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f84887dd-1d9e-e53f-b171-494426634026@arm.com/mbox/"},{"id":1966,"url":"https://patchwork.plctlab.org/api/1.2/patches/1966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012182748.424078-1-aldyh@redhat.com/","msgid":"<20221012182748.424078-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T18:27:49","name":"[COMMITTED] Add range-op entry for floating point NEGATE_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012182748.424078-1-aldyh@redhat.com/mbox/"},{"id":1967,"url":"https://patchwork.plctlab.org/api/1.2/patches/1967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com/","msgid":"<1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com>","list_archive_url":null,"date":"2022-10-12T19:23:46","name":"xtensa: Add workaround for pSRAM cache issue in ESP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com/mbox/"},{"id":1968,"url":"https://patchwork.plctlab.org/api/1.2/patches/1968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0cX0wQJBbmESbG1@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T19:38:59","name":"[wwwdocs] porting_to: Two-stage overload resolution for implicit move removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0cX0wQJBbmESbG1@redhat.com/mbox/"},{"id":1969,"url":"https://patchwork.plctlab.org/api/1.2/patches/1969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c0a8c36e-266b-4a31-89b5-242246403fc5-1665603941818@3c-app-gmx-bs25/","msgid":"","list_archive_url":null,"date":"2022-10-12T19:45:41","name":"Fortran: simplify array constructors with typespec [PR93483, PR107216, PR107219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c0a8c36e-266b-4a31-89b5-242246403fc5-1665603941818@3c-app-gmx-bs25/mbox/"},{"id":1970,"url":"https://patchwork.plctlab.org/api/1.2/patches/1970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012194734.85319-1-arsen@aarsen.me/","msgid":"<20221012194734.85319-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-12T19:47:35","name":"libstdc++: respect with-{headers, newlib} for default hosted value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012194734.85319-1-arsen@aarsen.me/mbox/"},{"id":1971,"url":"https://patchwork.plctlab.org/api/1.2/patches/1971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8266b5be-256c-4be2-84db-3a880e849d41@gmail.com/","msgid":"<8266b5be-256c-4be2-84db-3a880e849d41@gmail.com>","list_archive_url":null,"date":"2022-10-12T20:18:37","name":"PR 107189 Remove useless _Alloc_node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8266b5be-256c-4be2-84db-3a880e849d41@gmail.com/mbox/"},{"id":1972,"url":"https://patchwork.plctlab.org/api/1.2/patches/1972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210130113580.2063768@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-13T01:14:35","name":"[committed] c: Do not use *_IS_IEC_60559 == 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210130113580.2063768@digraph.polyomino.org.uk/mbox/"},{"id":1973,"url":"https://patchwork.plctlab.org/api/1.2/patches/1973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031009.60175-1-liwei.xu@intel.com/","msgid":"<20221013031009.60175-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-13T03:10:09","name":"Optimize indentical permuation in my last r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031009.60175-1-liwei.xu@intel.com/mbox/"},{"id":1974,"url":"https://patchwork.plctlab.org/api/1.2/patches/1974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031518.66289-1-liwei.xu@intel.com/","msgid":"<20221013031518.66289-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-13T03:15:18","name":"Optimize identical permutation in my last r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031518.66289-1-liwei.xu@intel.com/mbox/"},{"id":1975,"url":"https://patchwork.plctlab.org/api/1.2/patches/1975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0e1QH++UvHO7MtJ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T06:50:40","name":"middle-end, v3: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0e1QH++UvHO7MtJ@tucnak/mbox/"},{"id":1995,"url":"https://patchwork.plctlab.org/api/1.2/patches/1995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d77b6541-1a2a-f15d-6855-14e206081fa4@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-13T09:37:47","name":"[DOCS] Python Language Conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d77b6541-1a2a-f15d-6855-14e206081fa4@suse.cz/mbox/"},{"id":2016,"url":"https://patchwork.plctlab.org/api/1.2/patches/2016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013110318.34FB413AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013110318.34FB413AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T11:03:17","name":"Diagnose return statement in match.pd (with { ... } expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013110318.34FB413AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2033,"url":"https://patchwork.plctlab.org/api/1.2/patches/2033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3194055.aeNJFYEL58@fomalhaut/","msgid":"<3194055.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2022-10-13T12:06:15","name":"Fix bogus -Wstringop-overflow warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3194055.aeNJFYEL58@fomalhaut/mbox/"},{"id":2037,"url":"https://patchwork.plctlab.org/api/1.2/patches/2037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013121701.473585-1-aldyh@redhat.com/","msgid":"<20221013121701.473585-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-13T12:17:01","name":"[COMMITTED] Add op1_op2_relation for float operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013121701.473585-1-aldyh@redhat.com/mbox/"},{"id":2040,"url":"https://patchwork.plctlab.org/api/1.2/patches/2040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013123649.474497-1-aldyh@redhat.com/","msgid":"<20221013123649.474497-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-13T12:36:49","name":"[PR24021] Implement PLUS_EXPR range-op entry for floats.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013123649.474497-1-aldyh@redhat.com/mbox/"},{"id":2049,"url":"https://patchwork.plctlab.org/api/1.2/patches/2049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131632.1017D13AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013131632.1017D13AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T13:16:31","name":"tree-optimization/107160 - avoid reusing multiple accumulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131632.1017D13AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2052,"url":"https://patchwork.plctlab.org/api/1.2/patches/2052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131957.8C67013AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013131957.8C67013AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T13:19:56","name":"tree-optimization/107247 - reduce SLP reduction accumulator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131957.8C67013AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2057,"url":"https://patchwork.plctlab.org/api/1.2/patches/2057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013140152.29237-1-shiyulong@iscas.ac.cn/","msgid":"<20221013140152.29237-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-13T14:01:52","name":"[V1] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013140152.29237-1-shiyulong@iscas.ac.cn/mbox/"},{"id":2061,"url":"https://patchwork.plctlab.org/api/1.2/patches/2061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz/","msgid":"<79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz>","list_archive_url":null,"date":"2022-10-13T14:25:52","name":"use proper DECL_INITIAL for VTV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz/mbox/"},{"id":2073,"url":"https://patchwork.plctlab.org/api/1.2/patches/2073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com/","msgid":"<8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:30:29","name":"[COMMITTED,1/4] Add partial equivalence support to the relation oracle.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com/mbox/"},{"id":2074,"url":"https://patchwork.plctlab.org/api/1.2/patches/2074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com/","msgid":"<70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:30:55","name":"[COMMITTED,2/4] Add equivalence iterator to relation oracle.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com/mbox/"},{"id":2076,"url":"https://patchwork.plctlab.org/api/1.2/patches/2076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c37a5a77-af50-e266-b29b-b05190546f0d@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-13T15:31:23","name":"[COMMITTED,3/4] Add partial equivalence recognition to cast and bitwise and.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c37a5a77-af50-e266-b29b-b05190546f0d@redhat.com/mbox/"},{"id":2075,"url":"https://patchwork.plctlab.org/api/1.2/patches/2075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com/","msgid":"<8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:31:40","name":"[COMMITTED,4/4] PR tree-optimization/102540 - propagate partial equivs in the cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com/mbox/"},{"id":2077,"url":"https://patchwork.plctlab.org/api/1.2/patches/2077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013153921.3795800-1-ppalka@redhat.com/","msgid":"<20221013153921.3795800-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:39:21","name":"c++ modules: verify_type failure with typedef enum [PR106848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013153921.3795800-1-ppalka@redhat.com/mbox/"},{"id":2091,"url":"https://patchwork.plctlab.org/api/1.2/patches/2091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0g/g0JYbV33TZiW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:40:35","name":"c++, v2: Implement excess precision support for C++ [PR107097, PR323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0g/g0JYbV33TZiW@tucnak/mbox/"},{"id":2094,"url":"https://patchwork.plctlab.org/api/1.2/patches/2094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hAqDSTjECCqE9j@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:45:28","name":"c++: Excess precision for ? int : float or int == float [PR107097, PR82071, PR87390]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hAqDSTjECCqE9j@tucnak/mbox/"},{"id":2095,"url":"https://patchwork.plctlab.org/api/1.2/patches/2095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hB6+3EJYPYkHkN@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:50:51","name":"middle-end, c++, i386, libgcc, v2: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hB6+3EJYPYkHkN@tucnak/mbox/"},{"id":2099,"url":"https://patchwork.plctlab.org/api/1.2/patches/2099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com/","msgid":"<8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com>","list_archive_url":null,"date":"2022-10-13T17:02:06","name":"testsuite: Fix failure in test pr105586.c [PR107171]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com/mbox/"},{"id":2242,"url":"https://patchwork.plctlab.org/api/1.2/patches/2242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d66ffad0-41c4-dd43-4b8f-d37b41f04668@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-13T18:10:47","name":"libgomp: Add Fortran testcases for omp_in_explicit_task","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d66ffad0-41c4-dd43-4b8f-d37b41f04668@codesourcery.com/mbox/"},{"id":2343,"url":"https://patchwork.plctlab.org/api/1.2/patches/2343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013190427.181432-1-ppalka@redhat.com/","msgid":"<20221013190427.181432-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-13T19:04:27","name":"c++ modules: ICE with dynamic_cast [PR106304]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013190427.181432-1-ppalka@redhat.com/mbox/"},{"id":2353,"url":"https://patchwork.plctlab.org/api/1.2/patches/2353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013201332.1157829-1-dmalcolm@redhat.com/","msgid":"<20221013201332.1157829-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-13T20:13:32","name":"[committed] analyzer: fix ICE introduced in r13-3168 [PR107210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013201332.1157829-1-dmalcolm@redhat.com/mbox/"},{"id":2447,"url":"https://patchwork.plctlab.org/api/1.2/patches/2447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9063ef11e8eff2f1aa24d949235e687de4ce968.1665699882.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-13T23:56:03","name":"Always enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9063ef11e8eff2f1aa24d949235e687de4ce968.1665699882.git.segher@kernel.crashing.org/mbox/"},{"id":2463,"url":"https://patchwork.plctlab.org/api/1.2/patches/2463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210140219040.2099903@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-14T02:19:37","name":"[committed] c: C2x storage class specifiers in compound literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210140219040.2099903@digraph.polyomino.org.uk/mbox/"},{"id":2465,"url":"https://patchwork.plctlab.org/api/1.2/patches/2465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014023219.1395533-1-chenglulu@loongson.cn/","msgid":"<20221014023219.1395533-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-14T02:32:20","name":"[v2] LoongArch: Optimize the implementation of stack check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014023219.1395533-1-chenglulu@loongson.cn/mbox/"},{"id":2480,"url":"https://patchwork.plctlab.org/api/1.2/patches/2480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014031748.55813-1-guojiufu@linux.ibm.com/","msgid":"<20221014031748.55813-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-14T03:17:48","name":"rs6000: Enable const_anchor for '\''addi'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014031748.55813-1-guojiufu@linux.ibm.com/mbox/"},{"id":2530,"url":"https://patchwork.plctlab.org/api/1.2/patches/2530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014062821.BE43833EEA@hamza.pair.com/","msgid":"<20221014062821.BE43833EEA@hamza.pair.com>","list_archive_url":null,"date":"2022-10-14T06:28:16","name":"[committed] wwwdocs: *: Consistently format around ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014062821.BE43833EEA@hamza.pair.com/mbox/"},{"id":2550,"url":"https://patchwork.plctlab.org/api/1.2/patches/2550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-2-haochen.jiang@intel.com/","msgid":"<20221014074058.7709-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:40:57","name":"[1/2] Initial Raptorlake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-2-haochen.jiang@intel.com/mbox/"},{"id":2549,"url":"https://patchwork.plctlab.org/api/1.2/patches/2549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-3-haochen.jiang@intel.com/","msgid":"<20221014074058.7709-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:40:58","name":"[2/2] Initial Meteorlake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-3-haochen.jiang@intel.com/mbox/"},{"id":2553,"url":"https://patchwork.plctlab.org/api/1.2/patches/2553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-2-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:40","name":"[1/6] Support Intel AVX-IFMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-2-haochen.jiang@intel.com/mbox/"},{"id":2556,"url":"https://patchwork.plctlab.org/api/1.2/patches/2556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-3-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:41","name":"[2/6] Support Intel AVX-VNNI-INT8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-3-haochen.jiang@intel.com/mbox/"},{"id":2554,"url":"https://patchwork.plctlab.org/api/1.2/patches/2554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-4-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:42","name":"[3/6] i386: Add intrinsic for vector __bf16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-4-haochen.jiang@intel.com/mbox/"},{"id":2559,"url":"https://patchwork.plctlab.org/api/1.2/patches/2559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-5-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:43","name":"[4/6] Support Intel AVX-NE-CONVERT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-5-haochen.jiang@intel.com/mbox/"},{"id":2558,"url":"https://patchwork.plctlab.org/api/1.2/patches/2558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-6-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-6-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:44","name":"[5/6] Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-6-haochen.jiang@intel.com/mbox/"},{"id":2555,"url":"https://patchwork.plctlab.org/api/1.2/patches/2555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-7-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-7-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:45","name":"[6/6] Initial Sierra Forest Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-7-haochen.jiang@intel.com/mbox/"},{"id":2563,"url":"https://patchwork.plctlab.org/api/1.2/patches/2563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075843.8074-1-haochen.jiang@intel.com/","msgid":"<20221014075843.8074-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:58:43","name":"Support Intel AMX-FP16 ISA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075843.8074-1-haochen.jiang@intel.com/mbox/"},{"id":2571,"url":"https://patchwork.plctlab.org/api/1.2/patches/2571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-2-haochen.jiang@intel.com/","msgid":"<20221014081945.8318-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:19:44","name":"[1/3] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-2-haochen.jiang@intel.com/mbox/"},{"id":2570,"url":"https://patchwork.plctlab.org/api/1.2/patches/2570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-3-haochen.jiang@intel.com/","msgid":"<20221014081945.8318-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:19:45","name":"[2/3] Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-3-haochen.jiang@intel.com/mbox/"},{"id":2583,"url":"https://patchwork.plctlab.org/api/1.2/patches/2583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-2-haochen.jiang@intel.com/","msgid":"<20221014083406.8406-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:34:05","name":"[1/2] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-2-haochen.jiang@intel.com/mbox/"},{"id":2582,"url":"https://patchwork.plctlab.org/api/1.2/patches/2582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-3-haochen.jiang@intel.com/","msgid":"<20221014083406.8406-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:34:06","name":"[2/2] Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-3-haochen.jiang@intel.com/mbox/"},{"id":2600,"url":"https://patchwork.plctlab.org/api/1.2/patches/2600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014091135.2477155-1-jwakely@redhat.com/","msgid":"<20221014091135.2477155-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T09:11:35","name":"[committed] libstdc++: Use markdown in Doxygen comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014091135.2477155-1-jwakely@redhat.com/mbox/"},{"id":2629,"url":"https://patchwork.plctlab.org/api/1.2/patches/2629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014095120.D070313A4A@imap2.suse-dmz.suse.de/","msgid":"<20221014095120.D070313A4A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-14T09:51:20","name":"tree-optimization/107254 - check and support live lanes from permutes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014095120.D070313A4A@imap2.suse-dmz.suse.de/mbox/"},{"id":2634,"url":"https://patchwork.plctlab.org/api/1.2/patches/2634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2850050.e9J7NaK4W3@fomalhaut/","msgid":"<2850050.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2022-10-14T10:00:44","name":"[SPARC] Fix PR target/107248","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2850050.e9J7NaK4W3@fomalhaut/mbox/"},{"id":2635,"url":"https://patchwork.plctlab.org/api/1.2/patches/2635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014100316.568795-1-aldyh@redhat.com/","msgid":"<20221014100316.568795-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T10:03:16","name":"[COMMITTED] Add cases for CFN_BUILT_IN_SIGNBIT[FL].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014100316.568795-1-aldyh@redhat.com/mbox/"},{"id":2653,"url":"https://patchwork.plctlab.org/api/1.2/patches/2653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp/","msgid":"<3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-14T11:06:08","name":"xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp/mbox/"},{"id":2696,"url":"https://patchwork.plctlab.org/api/1.2/patches/2696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-1-julian@codesourcery.com/","msgid":"<20221014133856.3388109-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-14T13:38:55","name":"[og12] amdgcn: Use FLAT addressing for all functions with pointer arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-1-julian@codesourcery.com/mbox/"},{"id":2697,"url":"https://patchwork.plctlab.org/api/1.2/patches/2697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-2-julian@codesourcery.com/","msgid":"<20221014133856.3388109-2-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-14T13:38:56","name":"[og12] OpenACC: Don'\''t gang-privatize artificial variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-2-julian@codesourcery.com/mbox/"},{"id":2703,"url":"https://patchwork.plctlab.org/api/1.2/patches/2703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-1-aldyh@redhat.com/","msgid":"<20221014142652.671475-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:50","name":"[COMMITTED] Drop -0.0 in frange::set() for !HONOR_SIGNED_ZEROS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-1-aldyh@redhat.com/mbox/"},{"id":2702,"url":"https://patchwork.plctlab.org/api/1.2/patches/2702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-2-aldyh@redhat.com/","msgid":"<20221014142652.671475-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:51","name":"[COMMITTED] Normalize ranges over the range for both bounds when -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-2-aldyh@redhat.com/mbox/"},{"id":2704,"url":"https://patchwork.plctlab.org/api/1.2/patches/2704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-3-aldyh@redhat.com/","msgid":"<20221014142652.671475-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:52","name":"[COMMITTED] Replace CFN_BUILTIN_SIGNBIT* cases with CASE_FLT_FN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-3-aldyh@redhat.com/mbox/"},{"id":2705,"url":"https://patchwork.plctlab.org/api/1.2/patches/2705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143047.672008-1-aldyh@redhat.com/","msgid":"<20221014143047.672008-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:30:47","name":"Check rvc_normal in real_isdenormal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143047.672008-1-aldyh@redhat.com/mbox/"},{"id":2714,"url":"https://patchwork.plctlab.org/api/1.2/patches/2714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143602.2512815-1-jwakely@redhat.com/","msgid":"<20221014143602.2512815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:36:02","name":"[committed] libstdc++: Simplify print_raw function for debug assertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143602.2512815-1-jwakely@redhat.com/mbox/"},{"id":2715,"url":"https://patchwork.plctlab.org/api/1.2/patches/2715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143655.2512929-1-jwakely@redhat.com/","msgid":"<20221014143655.2512929-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:36:55","name":"[committed] libstdc++: Disable all emergency EH pool code if obj-count == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143655.2512929-1-jwakely@redhat.com/mbox/"},{"id":2724,"url":"https://patchwork.plctlab.org/api/1.2/patches/2724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014150851.677560-1-aldyh@redhat.com/","msgid":"<20221014150851.677560-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T15:08:51","name":"Implement range-op entry for __builtin_copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014150851.677560-1-aldyh@redhat.com/mbox/"},{"id":2754,"url":"https://patchwork.plctlab.org/api/1.2/patches/2754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c57bf84c-383e-1591-1c44-1b652fc1499f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T16:38:09","name":"[committed] gfortran.dg/c-interop/deferred-character-2.f90: Fix dg-do","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c57bf84c-383e-1591-1c44-1b652fc1499f@codesourcery.com/mbox/"},{"id":2756,"url":"https://patchwork.plctlab.org/api/1.2/patches/2756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jw6mk1s.fsf@oldenburg.str.redhat.com/","msgid":"<874jw6mk1s.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-14T16:44:47","name":"libgcc: Move cfa_how into potential padding in struct frame_state_reg_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jw6mk1s.fsf@oldenburg.str.redhat.com/mbox/"},{"id":2757,"url":"https://patchwork.plctlab.org/api/1.2/patches/2757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014170018.892575-1-ppalka@redhat.com/","msgid":"<20221014170018.892575-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-14T17:00:18","name":"c++ modules: streaming constexpr_fundef [PR101449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014170018.892575-1-ppalka@redhat.com/mbox/"},{"id":2759,"url":"https://patchwork.plctlab.org/api/1.2/patches/2759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c72ceaca-53e4-3deb-c0a6-57af9b2935a4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T17:04:06","name":"libgomp: fix hang on fatal error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c72ceaca-53e4-3deb-c0a6-57af9b2935a4@codesourcery.com/mbox/"},{"id":2784,"url":"https://patchwork.plctlab.org/api/1.2/patches/2784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014180945.697F933E53@hamza.pair.com/","msgid":"<20221014180945.697F933E53@hamza.pair.com>","list_archive_url":null,"date":"2022-10-14T18:09:38","name":"[committed] wwwdocs: *: Omit trailing slash for CSS references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014180945.697F933E53@hamza.pair.com/mbox/"},{"id":2859,"url":"https://patchwork.plctlab.org/api/1.2/patches/2859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014195648.8865-1-palmer@rivosinc.com/","msgid":"<20221014195648.8865-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-14T19:56:48","name":"[v2] RISC-V: Implement __clear_cache via __builtin___clear_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014195648.8865-1-palmer@rivosinc.com/mbox/"},{"id":2833,"url":"https://patchwork.plctlab.org/api/1.2/patches/2833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7e998fb-2ab6-71a2-7e58-c72a08a453a7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T21:18:15","name":"Fortran: Fixes for kind=4 characters strings [PR107266]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7e998fb-2ab6-71a2-7e58-c72a08a453a7@codesourcery.com/mbox/"},{"id":2889,"url":"https://patchwork.plctlab.org/api/1.2/patches/2889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014230236.134044-1-juzhe.zhong@rivai.ai/","msgid":"<20221014230236.134044-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-14T23:02:36","name":"RISC-V: Reorganize mangle_builtin_type.[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014230236.134044-1-juzhe.zhong@rivai.ai/mbox/"},{"id":2890,"url":"https://patchwork.plctlab.org/api/1.2/patches/2890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210142309130.2164505@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-14T23:10:11","name":"[committed] preprocessor: C2x identifier rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210142309130.2164505@digraph.polyomino.org.uk/mbox/"},{"id":2903,"url":"https://patchwork.plctlab.org/api/1.2/patches/2903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015035548.274704-1-guillermo.e.martinez@oracle.com/","msgid":"<20221015035548.274704-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-10-15T03:55:48","name":"[v3] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015035548.274704-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":2920,"url":"https://patchwork.plctlab.org/api/1.2/patches/2920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfjps6kf.fsf@euler.schwinge.homeip.net/","msgid":"<87sfjps6kf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-15T10:51:44","name":"libstdc++: Address '\''-Wunused-function'\'' for '\''print_raw'\'' (was: [committed] libstdc++: Simplify print_raw function for debug assertions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfjps6kf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":2971,"url":"https://patchwork.plctlab.org/api/1.2/patches/2971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202210.2687628-1-jwakely@redhat.com/","msgid":"<20221015202210.2687628-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-15T20:22:10","name":"[committed] libstdc++: Fix uses_allocator_construction args for cv pair (LWG 3677)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202210.2687628-1-jwakely@redhat.com/mbox/"},{"id":2972,"url":"https://patchwork.plctlab.org/api/1.2/patches/2972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202518.2687700-1-jwakely@redhat.com/","msgid":"<20221015202518.2687700-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-15T20:25:18","name":"[committed] libstdc++: Implement constexpr std::to_chars for C++23 (P2291R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202518.2687700-1-jwakely@redhat.com/mbox/"},{"id":2979,"url":"https://patchwork.plctlab.org/api/1.2/patches/2979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com/","msgid":"<81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com>","list_archive_url":null,"date":"2022-10-16T03:41:42","name":"[committed] Fix bug in register move costing on H8/300","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com/mbox/"},{"id":2998,"url":"https://patchwork.plctlab.org/api/1.2/patches/2998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vYOUijciWziskx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-16T10:09:39","name":"builtins: Add various __builtin_*f{16,32,64,128,32x,64x,128x} builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vYOUijciWziskx@tucnak/mbox/"},{"id":2999,"url":"https://patchwork.plctlab.org/api/1.2/patches/2999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vayeXfX4DsqW6g@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-16T10:20:10","name":"[RFC] libstdc++, v2: Partial library support for std::float{16,32,64,128}_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vayeXfX4DsqW6g@tucnak/mbox/"},{"id":3043,"url":"https://patchwork.plctlab.org/api/1.2/patches/3043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7c1fd20-0448-af53-0ca2-255ba184ebde@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-16T15:04:04","name":"[committed] Rename \"Z\" constraint on H8/300 to \"Zz\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7c1fd20-0448-af53-0ca2-255ba184ebde@gmail.com/mbox/"},{"id":3073,"url":"https://patchwork.plctlab.org/api/1.2/patches/3073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com/","msgid":"<11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com>","list_archive_url":null,"date":"2022-10-16T16:51:52","name":"[committed] Add new constraints for upcoming autoinc fixes on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com/mbox/"},{"id":3142,"url":"https://patchwork.plctlab.org/api/1.2/patches/3142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221016181531.225006-1-ovpanait@gmail.com/","msgid":"<20221016181531.225006-1-ovpanait@gmail.com>","list_archive_url":null,"date":"2022-10-16T18:15:31","name":"microblaze: use strverscmp() in MICROBLAZE_VERSION_COMPARE()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221016181531.225006-1-ovpanait@gmail.com/mbox/"},{"id":3146,"url":"https://patchwork.plctlab.org/api/1.2/patches/3146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-691dab4a-f7d3-4e48-a67b-488e2f830917-1665945998916@3c-app-gmx-bap23/","msgid":"","list_archive_url":null,"date":"2022-10-16T18:46:38","name":"Fortran: check type of operands of logical operations, comparisons [PR107272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-691dab4a-f7d3-4e48-a67b-488e2f830917-1665945998916@3c-app-gmx-bap23/mbox/"},{"id":3148,"url":"https://patchwork.plctlab.org/api/1.2/patches/3148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F829E8CE4F809219707791269@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-16T20:24:53","name":"Don'\''t print discriminators for -fcompare-debug.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F829E8CE4F809219707791269@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":3199,"url":"https://patchwork.plctlab.org/api/1.2/patches/3199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017032429.282693-1-liwei.xu@intel.com/","msgid":"<20221017032429.282693-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-17T03:24:29","name":"Move scanning pass of forwprop-19.c to dse1 for r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017032429.282693-1-liwei.xu@intel.com/mbox/"},{"id":3252,"url":"https://patchwork.plctlab.org/api/1.2/patches/3252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017073047.117398-1-juzhe.zhong@rivai.ai/","msgid":"<20221017073047.117398-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T07:30:47","name":"RISC-V: Fix format[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017073047.117398-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3257,"url":"https://patchwork.plctlab.org/api/1.2/patches/3257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rlej3o6.fsf@euler.schwinge.homeip.net/","msgid":"<878rlej3o6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T07:43:37","name":"Add '\''c-c++-common/torture/pr107195-1.c'\'' [PR107195] (was: [COMMITTED] [PR107195] Set range to zero when nonzero mask is 0.)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rlej3o6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3271,"url":"https://patchwork.plctlab.org/api/1.2/patches/3271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017082043.114653-1-juzhe.zhong@rivai.ai/","msgid":"<20221017082043.114653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T08:20:43","name":"RISC-V: Add RVV intrinsic basic framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017082043.114653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3280,"url":"https://patchwork.plctlab.org/api/1.2/patches/3280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017083642.184867-1-juzhe.zhong@rivai.ai/","msgid":"<20221017083642.184867-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T08:36:42","name":"RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017083642.184867-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3295,"url":"https://patchwork.plctlab.org/api/1.2/patches/3295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgdun7ja.fsf@oldenburg.str.redhat.com/","msgid":"<87zgdun7ja.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-17T09:06:33","name":"libgcc: Special-case BFD ld unwind table encodings in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgdun7ja.fsf@oldenburg.str.redhat.com/mbox/"},{"id":3408,"url":"https://patchwork.plctlab.org/api/1.2/patches/3408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875ygiirt6.fsf@euler.schwinge.homeip.net/","msgid":"<875ygiirt6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T11:59:49","name":"Fix nvptx-specific '\''-foffload-options'\'' syntax in '\''libgomp.c/reverse-offload-sm30.c'\'' (was: [Patch] nvptx/mkoffload.cc: Warn instead of error when reverse offload is not possible)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875ygiirt6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3411,"url":"https://patchwork.plctlab.org/api/1.2/patches/3411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qr6ire8.fsf@euler.schwinge.homeip.net/","msgid":"<871qr6ire8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T12:08:47","name":"Tag '\''gcc/gimple-expr.cc:mark_addressable_2'\'' as '\''static'\'' (was: [PR67891] drop is_gimple_reg test from set_parm_rtl)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qr6ire8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3423,"url":"https://patchwork.plctlab.org/api/1.2/patches/3423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8oihc0c.fsf@euler.schwinge.homeip.net/","msgid":"<87v8oihc0c.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T12:26:27","name":"GCN: Restore build with GCC 4.8 (was: [committed 1/6] amdgcn: add multiple vector sizes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8oihc0c.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3434,"url":"https://patchwork.plctlab.org/api/1.2/patches/3434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edv6mwp5.fsf@oldenburg.str.redhat.com/","msgid":"<87edv6mwp5.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-17T13:00:38","name":"libgcc: Mostly vectorize CIE encoding extraction for FDEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edv6mwp5.fsf@oldenburg.str.redhat.com/mbox/"},{"id":3456,"url":"https://patchwork.plctlab.org/api/1.2/patches/3456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cddfdaaa-5384-a4bc-ace5-5319962c4443@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-17T13:25:04","name":"[COMMITTED] Don'\''t set useless relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cddfdaaa-5384-a4bc-ace5-5319962c4443@redhat.com/mbox/"},{"id":3457,"url":"https://patchwork.plctlab.org/api/1.2/patches/3457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com/","msgid":"<03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:24","name":"[COMMITTED] Fix nan updating in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com/mbox/"},{"id":3458,"url":"https://patchwork.plctlab.org/api/1.2/patches/3458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com/","msgid":"<0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:40","name":"[COMMITTED] Add relation_trio class for range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com/mbox/"},{"id":3459,"url":"https://patchwork.plctlab.org/api/1.2/patches/3459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com/","msgid":"<65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:59","name":"[COMMITTED] Add 3 floating NAN tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com/mbox/"},{"id":3462,"url":"https://patchwork.plctlab.org/api/1.2/patches/3462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017132838.24693-1-aldyh@redhat.com/","msgid":"<20221017132838.24693-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:28:38","name":"[COMMITTED] Do not test for -Inf when flag_finite_math_only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017132838.24693-1-aldyh@redhat.com/mbox/"},{"id":3464,"url":"https://patchwork.plctlab.org/api/1.2/patches/3464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017133925.34686-1-aldyh@redhat.com/","msgid":"<20221017133925.34686-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:39:25","name":"[COMMITTED,PR10582] Add test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017133925.34686-1-aldyh@redhat.com/mbox/"},{"id":3484,"url":"https://patchwork.plctlab.org/api/1.2/patches/3484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017144437.157424-1-jwjagersma@gmail.com/","msgid":"<20221017144437.157424-1-jwjagersma@gmail.com>","list_archive_url":null,"date":"2022-10-17T14:44:37","name":"i386: Allow setting target attribute from conditional expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017144437.157424-1-jwjagersma@gmail.com/mbox/"},{"id":3572,"url":"https://patchwork.plctlab.org/api/1.2/patches/3572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y014Rs9LF2AT3Dow@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-17T15:44:06","name":"middle-end, v4: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y014Rs9LF2AT3Dow@tucnak/mbox/"},{"id":3589,"url":"https://patchwork.plctlab.org/api/1.2/patches/3589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y02CFLLygVNSOmL2@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-17T16:25:56","name":"libstdc++, v3: Partial library support for std::float{16,32,64,128}_t and std::bfloat16_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y02CFLLygVNSOmL2@tucnak/mbox/"},{"id":3590,"url":"https://patchwork.plctlab.org/api/1.2/patches/3590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017162632.1085359-1-ppalka@redhat.com/","msgid":"<20221017162632.1085359-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-17T16:26:32","name":"libstdc++: Redefine __from_chars_alnum_to_val'\''s table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017162632.1085359-1-ppalka@redhat.com/mbox/"},{"id":3648,"url":"https://patchwork.plctlab.org/api/1.2/patches/3648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017180844.3492051-1-ibuclaw@gdcproject.org/","msgid":"<20221017180844.3492051-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-10-17T18:08:44","name":"d: Remove D-specific version definitions from target headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017180844.3492051-1-ibuclaw@gdcproject.org/mbox/"},{"id":3656,"url":"https://patchwork.plctlab.org/api/1.2/patches/3656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017185618.78502-1-aldyh@redhat.com/","msgid":"<20221017185618.78502-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T18:56:18","name":"[COMMITTED] Make sure exported range for SSA post-dominates the DEF in set_global_ranges_from_unreachable_edges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017185618.78502-1-aldyh@redhat.com/mbox/"},{"id":3696,"url":"https://patchwork.plctlab.org/api/1.2/patches/3696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017200926.1230070-1-ppalka@redhat.com/","msgid":"<20221017200926.1230070-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-17T20:09:26","name":"libstdc++: Implement ranges::stride_view from P1899R3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017200926.1230070-1-ppalka@redhat.com/mbox/"},{"id":3824,"url":"https://patchwork.plctlab.org/api/1.2/patches/3824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0111671-f8c5-0daf-8fe6-03a38055e9b0@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-17T23:25:39","name":"[committed] Add missing splitter for H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0111671-f8c5-0daf-8fe6-03a38055e9b0@gmail.com/mbox/"},{"id":3827,"url":"https://patchwork.plctlab.org/api/1.2/patches/3827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com/","msgid":"<0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:38:11","name":"[committed] Enable REE for H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com/mbox/"},{"id":3828,"url":"https://patchwork.plctlab.org/api/1.2/patches/3828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com/","msgid":"<3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:47:16","name":"[committed] More infrastructure to avoid bogus RTL on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com/mbox/"},{"id":3832,"url":"https://patchwork.plctlab.org/api/1.2/patches/3832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com/","msgid":"<1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:55:05","name":"[committed,PR,target/101697] Fix bogus RTL on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com/mbox/"},{"id":3859,"url":"https://patchwork.plctlab.org/api/1.2/patches/3859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab0052a8-e12a-a761-c71f-4ca5c4a355e2@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T01:05:17","name":"[COMMITTED] PR tree-optimization/107273 - Merge partial relation precisions properly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab0052a8-e12a-a761-c71f-4ca5c4a355e2@redhat.com/mbox/"},{"id":3913,"url":"https://patchwork.plctlab.org/api/1.2/patches/3913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1609279-d845-30a1-1ec6-ed0ca6c60a68@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-18T02:57:31","name":"[v2] xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1609279-d845-30a1-1ec6-ed0ca6c60a68@yahoo.co.jp/mbox/"},{"id":4008,"url":"https://patchwork.plctlab.org/api/1.2/patches/4008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018083022.2B11F139D2@imap2.suse-dmz.suse.de/","msgid":"<20221018083022.2B11F139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-18T08:30:21","name":"tree-optimization/107301 - check if we can duplicate block before doing so","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018083022.2B11F139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":4009,"url":"https://patchwork.plctlab.org/api/1.2/patches/4009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0888cc2d-2040-52c3-1201-16400567300b@arm.com/","msgid":"<0888cc2d-2040-52c3-1201-16400567300b@arm.com>","list_archive_url":null,"date":"2022-10-18T08:35:15","name":"ifcvt: Do not lower bitfields if we can'\''t analyze dr'\''s [PR107275]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0888cc2d-2040-52c3-1201-16400567300b@arm.com/mbox/"},{"id":4043,"url":"https://patchwork.plctlab.org/api/1.2/patches/4043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091050.82778-1-haochen.jiang@intel.com/","msgid":"<20221018091050.82778-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:10:50","name":"[v2] Support Intel AVX-VNNI-INT8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091050.82778-1-haochen.jiang@intel.com/mbox/"},{"id":4046,"url":"https://patchwork.plctlab.org/api/1.2/patches/4046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091727.82856-1-haochen.jiang@intel.com/","msgid":"<20221018091727.82856-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:17:27","name":"i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091727.82856-1-haochen.jiang@intel.com/mbox/"},{"id":4047,"url":"https://patchwork.plctlab.org/api/1.2/patches/4047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018092024.84082-1-haochen.jiang@intel.com/","msgid":"<20221018092024.84082-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:20:24","name":"[v2] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018092024.84082-1-haochen.jiang@intel.com/mbox/"},{"id":4055,"url":"https://patchwork.plctlab.org/api/1.2/patches/4055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0z5jws2.fsf@oldenburg.str.redhat.com/","msgid":"<87r0z5jws2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T09:39:25","name":"libsanitizer: Avoid implicit function declaration in configure test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0z5jws2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4065,"url":"https://patchwork.plctlab.org/api/1.2/patches/4065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h701jvk2.fsf@oldenburg.str.redhat.com/","msgid":"<87h701jvk2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T10:05:49","name":"libiberty: Fix C89-isms in configure tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h701jvk2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4075,"url":"https://patchwork.plctlab.org/api/1.2/patches/4075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2eae96f7642b974a6c0fd3d90fec80e9f65936f.1666088224.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T10:39:02","name":"[v5,1/4] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2eae96f7642b974a6c0fd3d90fec80e9f65936f.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4077,"url":"https://patchwork.plctlab.org/api/1.2/patches/4077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com/","msgid":"<8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:03","name":"[v5,2/4] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4074,"url":"https://patchwork.plctlab.org/api/1.2/patches/4074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com/","msgid":"<80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:04","name":"[v5,3/4] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4076,"url":"https://patchwork.plctlab.org/api/1.2/patches/4076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com/","msgid":"<83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:05","name":"[v5,4/4] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4078,"url":"https://patchwork.plctlab.org/api/1.2/patches/4078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018104758.20724139D2@imap2.suse-dmz.suse.de/","msgid":"<20221018104758.20724139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-18T10:47:57","name":"tree-optimization/107302 - fix vec_perm placement for recurrence vect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018104758.20724139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":4093,"url":"https://patchwork.plctlab.org/api/1.2/patches/4093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y06KvPa5EeXFijaV@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T11:15:08","name":"[ping,wwwdocs] Add reference to pp_format to Coding Conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y06KvPa5EeXFijaV@redhat.com/mbox/"},{"id":4180,"url":"https://patchwork.plctlab.org/api/1.2/patches/4180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6czap6y5j.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-18T13:48:08","name":"SRA: Limit replacement creation for accesses propagated from LHSs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6czap6y5j.fsf@suse.cz/mbox/"},{"id":4185,"url":"https://patchwork.plctlab.org/api/1.2/patches/4185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210181407500.2354457@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-18T14:08:40","name":"[committed] c: C2x enums wider than int [PR36113]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210181407500.2354457@digraph.polyomino.org.uk/mbox/"},{"id":4187,"url":"https://patchwork.plctlab.org/api/1.2/patches/4187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8ohi5ng.fsf@oldenburg.str.redhat.com/","msgid":"<87v8ohi5ng.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T14:10:43","name":"[v2] libiberty: Fix C89-isms in configure tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8ohi5ng.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4191,"url":"https://patchwork.plctlab.org/api/1.2/patches/4191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018141310.3139378-1-ppalka@redhat.com/","msgid":"<20221018141310.3139378-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T14:13:10","name":"c++ modules: stream non-trailing default targs [PR105045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018141310.3139378-1-ppalka@redhat.com/mbox/"},{"id":4214,"url":"https://patchwork.plctlab.org/api/1.2/patches/4214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018151212.1523137-1-manolis.tsamis@vrull.eu/","msgid":"<20221018151212.1523137-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-10-18T15:12:12","name":"[v2] Enable shrink wrapping for the RISC-V target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018151212.1523137-1-manolis.tsamis@vrull.eu/mbox/"},{"id":4269,"url":"https://patchwork.plctlab.org/api/1.2/patches/4269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018173829.392773-1-polacek@redhat.com/","msgid":"<20221018173829.392773-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-18T17:38:29","name":"c++: Mitigate -Wuseless-cast with classes [PR85043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018173829.392773-1-polacek@redhat.com/mbox/"},{"id":4275,"url":"https://patchwork.plctlab.org/api/1.2/patches/4275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-1-ppalka@redhat.com/","msgid":"<20221018181050.1629201-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T18:10:49","name":"[1/2] c++ modules: streaming enum with no enumerators [PR102600]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-1-ppalka@redhat.com/mbox/"},{"id":4276,"url":"https://patchwork.plctlab.org/api/1.2/patches/4276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-2-ppalka@redhat.com/","msgid":"<20221018181050.1629201-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T18:10:50","name":"[2/2] c++ modules: always stream TYPE_MIN/MAX_VALUE for enums [PR106848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-2-ppalka@redhat.com/mbox/"},{"id":4303,"url":"https://patchwork.plctlab.org/api/1.2/patches/4303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com/","msgid":"<9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T19:27:04","name":"OpenMP: Fix reverse offload GOMP_TARGET_REV IFN corner cases [PR107236]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com/mbox/"},{"id":4322,"url":"https://patchwork.plctlab.org/api/1.2/patches/4322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018211204.0BCA533E4A@hamza.pair.com/","msgid":"<20221018211204.0BCA533E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-18T21:12:00","name":"[committed] wwwdocs: *: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018211204.0BCA533E4A@hamza.pair.com/mbox/"},{"id":4342,"url":"https://patchwork.plctlab.org/api/1.2/patches/4342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa605ce17fbe4783b46a2cea7b3fa6d99d2cbfe6.1666131048.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T22:14:54","name":"pch: Fix streaming of strings with embedded null bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa605ce17fbe4783b46a2cea7b3fa6d99d2cbfe6.1666131048.git.lhyatt@gmail.com/mbox/"},{"id":4364,"url":"https://patchwork.plctlab.org/api/1.2/patches/4364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018232301.264776-1-hongtao.liu@intel.com/","msgid":"<20221018232301.264776-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-18T23:23:01","name":"Canonicalize vec_perm index to make the first index come from the first vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018232301.264776-1-hongtao.liu@intel.com/mbox/"},{"id":4365,"url":"https://patchwork.plctlab.org/api/1.2/patches/4365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210182326090.2363097@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-18T23:26:40","name":"[committed] c: Diagnose \"enum tag;\" after definition [PR107164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210182326090.2363097@digraph.polyomino.org.uk/mbox/"},{"id":4421,"url":"https://patchwork.plctlab.org/api/1.2/patches/4421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com/","msgid":"<31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com>","list_archive_url":null,"date":"2022-10-19T03:18:42","name":"vect: Try folding first for shifted value generation [PR107240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com/mbox/"},{"id":4422,"url":"https://patchwork.plctlab.org/api/1.2/patches/4422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3c052a5-70d2-56e7-226d-5b148924df6b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T03:19:00","name":"rs6000/test: Support vect_long_long effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3c052a5-70d2-56e7-226d-5b148924df6b@linux.ibm.com/mbox/"},{"id":4441,"url":"https://patchwork.plctlab.org/api/1.2/patches/4441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019060321.61112-1-hongyu.wang@intel.com/","msgid":"<20221019060321.61112-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-10-19T06:03:21","name":"Support Intel AVX-IFMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019060321.61112-1-hongyu.wang@intel.com/mbox/"},{"id":4445,"url":"https://patchwork.plctlab.org/api/1.2/patches/4445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6f0093a-cba8-6b60-aacc-ca02f781844b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T06:22:11","name":"s390: Fix bootstrap error with checking and -m31","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6f0093a-cba8-6b60-aacc-ca02f781844b@linux.ibm.com/mbox/"},{"id":4467,"url":"https://patchwork.plctlab.org/api/1.2/patches/4467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+rxzMBPmFcWzqe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T07:48:23","name":"c++: Don'\''t shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_constant_expression [PR107295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+rxzMBPmFcWzqe@tucnak/mbox/"},{"id":4468,"url":"https://patchwork.plctlab.org/api/1.2/patches/4468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+tShfF4ku2nMoM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T07:54:50","name":"expr: Fix ICE on BFmode -> SFmode conversion of constant [PR107262]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+tShfF4ku2nMoM@tucnak/mbox/"},{"id":4469,"url":"https://patchwork.plctlab.org/api/1.2/patches/4469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+upcPTOYp9/pFM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:00:37","name":"c++: Fix up mangling ICE with void{} [PR106863]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+upcPTOYp9/pFM@tucnak/mbox/"},{"id":4470,"url":"https://patchwork.plctlab.org/api/1.2/patches/4470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+vA4HZAdC68eE4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:02:11","name":"match.pd: Add 2 TYPE_OVERFLOW_SANITIZED checks [PR106990]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+vA4HZAdC68eE4@tucnak/mbox/"},{"id":4476,"url":"https://patchwork.plctlab.org/api/1.2/patches/4476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp/","msgid":"<3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-19T08:16:24","name":"[v3] xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp/mbox/"},{"id":4479,"url":"https://patchwork.plctlab.org/api/1.2/patches/4479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+z9IfvRybw/D2c@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:23:16","name":"libstdc++-v3: Implement {,b}float16_t nextafter and some fixes [PR106652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+z9IfvRybw/D2c@tucnak/mbox/"},{"id":4582,"url":"https://patchwork.plctlab.org/api/1.2/patches/4582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+6OPW020p5Zran@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:50:00","name":"i386: Fix up __bf16 handling on ia32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+6OPW020p5Zran@tucnak/mbox/"},{"id":4605,"url":"https://patchwork.plctlab.org/api/1.2/patches/4605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019085530.9691513345@imap2.suse-dmz.suse.de/","msgid":"<20221019085530.9691513345@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-19T08:55:30","name":"tree-optimization/106781 - adjust cgraph lhs removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019085530.9691513345@imap2.suse-dmz.suse.de/mbox/"},{"id":4918,"url":"https://patchwork.plctlab.org/api/1.2/patches/4918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019094214.1734353-1-torbjorn.svensson@foss.st.com/","msgid":"<20221019094214.1734353-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-19T09:42:15","name":"arm: Allow to override location of .gnu.sgstubs section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019094214.1734353-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":5239,"url":"https://patchwork.plctlab.org/api/1.2/patches/5239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5888ab6-564e-33ad-452b-f69e52c66b31@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T11:27:22","name":"Fortran: Fix non_negative_strides_array_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5888ab6-564e-33ad-452b-f69e52c66b31@codesourcery.com/mbox/"},{"id":5406,"url":"https://patchwork.plctlab.org/api/1.2/patches/5406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0/0mF4j3680bCG8@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T12:59:04","name":"libstdc++-v3: Some std::*float*_t charconv and i/ostream overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0/0mF4j3680bCG8@tucnak/mbox/"},{"id":5444,"url":"https://patchwork.plctlab.org/api/1.2/patches/5444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a41c1abe-3bd4-9079-6d06-a7a00b5aa3ef@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-19T13:24:43","name":"[(pushed)] avr: remove useless @tie{} directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a41c1abe-3bd4-9079-6d06-a7a00b5aa3ef@suse.cz/mbox/"},{"id":5536,"url":"https://patchwork.plctlab.org/api/1.2/patches/5536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019140212.44796-1-aldyh@redhat.com/","msgid":"<20221019140212.44796-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-19T14:02:12","name":"[COMMITTED,PR,tree-optimization/107312] Make range_true_and_false work with 1-bit signed types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019140212.44796-1-aldyh@redhat.com/mbox/"},{"id":5573,"url":"https://patchwork.plctlab.org/api/1.2/patches/5573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141341.3218C33E1B@hamza.pair.com/","msgid":"<20221019141341.3218C33E1B@hamza.pair.com>","list_archive_url":null,"date":"2022-10-19T14:13:38","name":"[committed] wwwdocs: codingconventions: Fix two typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141341.3218C33E1B@hamza.pair.com/mbox/"},{"id":5587,"url":"https://patchwork.plctlab.org/api/1.2/patches/5587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c64b0db5-9acb-ac22-1473-8759c1188a90@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T14:18:42","name":"[OG12,committed] Fortran: Fix delinearization regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c64b0db5-9acb-ac22-1473-8759c1188a90@codesourcery.com/mbox/"},{"id":5591,"url":"https://patchwork.plctlab.org/api/1.2/patches/5591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141949.1741947-1-torbjorn.svensson@foss.st.com/","msgid":"<20221019141949.1741947-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-19T14:19:50","name":"[v4] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141949.1741947-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":5594,"url":"https://patchwork.plctlab.org/api/1.2/patches/5594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019143141.248710-1-ppalka@redhat.com/","msgid":"<20221019143141.248710-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-19T14:31:41","name":"libstdc++: Fix typo in stride_view'\''s operator- [PR107313]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019143141.248710-1-ppalka@redhat.com/mbox/"},{"id":5693,"url":"https://patchwork.plctlab.org/api/1.2/patches/5693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AXafpqS9xxvvTp@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T15:27:37","name":"testsuite: Default make check-g++ vs. tests for newest C++ standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AXafpqS9xxvvTp@tucnak/mbox/"},{"id":5695,"url":"https://patchwork.plctlab.org/api/1.2/patches/5695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca0fe26c-5422-d5ee-27b0-cdfbee80b0dc@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T15:37:17","name":"[OG12,committed] Fix omp-expand.cc'\''s expand_omp_target for OpenACC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca0fe26c-5422-d5ee-27b0-cdfbee80b0dc@codesourcery.com/mbox/"},{"id":5725,"url":"https://patchwork.plctlab.org/api/1.2/patches/5725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com/","msgid":"<0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com>","list_archive_url":null,"date":"2022-10-19T16:04:03","name":"[COMMITTED] Use Value_Range when applying inferred ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com/mbox/"},{"id":5741,"url":"https://patchwork.plctlab.org/api/1.2/patches/5741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AkY7V2xil5Wpub@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T16:22:59","name":"testsuite: Fix up c2x-enum-1.c for 32-bit arches [PR107311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AkY7V2xil5Wpub@tucnak/mbox/"},{"id":5742,"url":"https://patchwork.plctlab.org/api/1.2/patches/5742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1An8APGvWejfjHX@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T16:38:08","name":"[v2] c++: Mitigate -Wuseless-cast with classes [PR85043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1An8APGvWejfjHX@redhat.com/mbox/"},{"id":5744,"url":"https://patchwork.plctlab.org/api/1.2/patches/5744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019164645.301739-1-ppalka@redhat.com/","msgid":"<20221019164645.301739-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-19T16:46:45","name":"libstdc++: Implement P2474R2 changes to views::take/drop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019164645.301739-1-ppalka@redhat.com/mbox/"},{"id":5821,"url":"https://patchwork.plctlab.org/api/1.2/patches/5821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019191929.3262862-1-arsen@aarsen.me/","msgid":"<20221019191929.3262862-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-19T19:19:31","name":"libstdc++: Enable _GLIBCXX_WEAK_DEFINITION on more platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019191929.3262862-1-arsen@aarsen.me/mbox/"},{"id":5839,"url":"https://patchwork.plctlab.org/api/1.2/patches/5839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d13d78b2-088f-400d-978c-b700912aeb30-1666212584693@3c-app-gmx-bap39/","msgid":"","list_archive_url":null,"date":"2022-10-19T20:49:44","name":"Fortran: error recovery with references of bad array constructors [PR105633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d13d78b2-088f-400d-978c-b700912aeb30-1666212584693@3c-app-gmx-bap39/mbox/"},{"id":5849,"url":"https://patchwork.plctlab.org/api/1.2/patches/5849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019205249.1502419-1-dmalcolm@redhat.com/","msgid":"<20221019205249.1502419-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-19T20:52:49","name":"[committed] analyzer: fix ICE on __builtin_ms_va_copy [PR105765]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019205249.1502419-1-dmalcolm@redhat.com/mbox/"},{"id":5851,"url":"https://patchwork.plctlab.org/api/1.2/patches/5851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019211550.135116-1-aldyh@redhat.com/","msgid":"<20221019211550.135116-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-19T21:15:50","name":"[COMMITTED] Always check result from build_ in range-op-float.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019211550.135116-1-aldyh@redhat.com/mbox/"},{"id":5855,"url":"https://patchwork.plctlab.org/api/1.2/patches/5855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210192155530.14960@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-19T21:56:41","name":"[committed] c: C2x %wN, %wfN format checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210192155530.14960@digraph.polyomino.org.uk/mbox/"},{"id":5866,"url":"https://patchwork.plctlab.org/api/1.2/patches/5866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019220638.13422-1-david.faust@oracle.com/","msgid":"<20221019220638.13422-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-19T22:06:38","name":"bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019220638.13422-1-david.faust@oracle.com/mbox/"},{"id":5930,"url":"https://patchwork.plctlab.org/api/1.2/patches/5930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com/","msgid":"<06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-19T23:08:54","name":"diagnostics: Allow FEs to keep customizations for middle end [PR101551, PR106274]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com/mbox/"},{"id":5942,"url":"https://patchwork.plctlab.org/api/1.2/patches/5942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020000559.371886-1-whh8b@obs.cr/","msgid":"<20221020000559.371886-1-whh8b@obs.cr>","list_archive_url":null,"date":"2022-10-20T00:05:59","name":"libstdc++: Refactor implementation of operator+ for std::string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020000559.371886-1-whh8b@obs.cr/mbox/"},{"id":5945,"url":"https://patchwork.plctlab.org/api/1.2/patches/5945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com/","msgid":"<8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com>","list_archive_url":null,"date":"2022-10-20T00:37:57","name":"[COMMITTED] PR c++/106654 - Add assume support to VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com/mbox/"},{"id":5957,"url":"https://patchwork.plctlab.org/api/1.2/patches/5957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020020507.616781-1-guillermo.e.martinez@oracle.com/","msgid":"<20221020020507.616781-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-10-20T02:05:07","name":"[v4] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020020507.616781-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":6097,"url":"https://patchwork.plctlab.org/api/1.2/patches/6097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020092917.358DD13494@imap2.suse-dmz.suse.de/","msgid":"<20221020092917.358DD13494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-20T09:29:16","name":"c/107305 - avoid ICEing with invalid GIMPLE input to the GIMPLE FE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020092917.358DD13494@imap2.suse-dmz.suse.de/mbox/"},{"id":6102,"url":"https://patchwork.plctlab.org/api/1.2/patches/6102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-2-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:32","name":"[v4,1/4] RISC-V: Minimal support of z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-2-jiawei@iscas.ac.cn/mbox/"},{"id":6103,"url":"https://patchwork.plctlab.org/api/1.2/patches/6103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-3-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:33","name":"[v4,2/4] RISC-V: Target support for z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-3-jiawei@iscas.ac.cn/mbox/"},{"id":6105,"url":"https://patchwork.plctlab.org/api/1.2/patches/6105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-4-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:34","name":"[v4,3/4] RISC-V: Limit regs use for z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-4-jiawei@iscas.ac.cn/mbox/"},{"id":6104,"url":"https://patchwork.plctlab.org/api/1.2/patches/6104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-5-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-5-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:35","name":"[v4,4/4] RISC-V: Add zhinx/zhinxmin testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-5-jiawei@iscas.ac.cn/mbox/"},{"id":6108,"url":"https://patchwork.plctlab.org/api/1.2/patches/6108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0z27s0v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:39:44","name":"[pushed] aarch64: Fix matching of BRKNS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0z27s0v.fsf@arm.com/mbox/"},{"id":6109,"url":"https://patchwork.plctlab.org/api/1.2/patches/6109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk04u7rz0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:40:51","name":"[pushed] aarch64: Prevent generation of /M BRKAS and BRKBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk04u7rz0.fsf@arm.com/mbox/"},{"id":6111,"url":"https://patchwork.plctlab.org/api/1.2/patches/6111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedv27ry0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:41:27","name":"[pushed] aarch64: Replace CONSTEXPR with constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedv27ry0.fsf@arm.com/mbox/"},{"id":6112,"url":"https://patchwork.plctlab.org/api/1.2/patches/6112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rla7rwz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:42:04","name":"[pushed] aarch64: Use using directives to inherit constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rla7rwz.fsf@arm.com/mbox/"},{"id":6110,"url":"https://patchwork.plctlab.org/api/1.2/patches/6110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35bi7rw0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:42:39","name":"[pushed] aarch64: Commonise some folding code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35bi7rw0.fsf@arm.com/mbox/"},{"id":6113,"url":"https://patchwork.plctlab.org/api/1.2/patches/6113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7u6hl7c.fsf@euler.schwinge.homeip.net/","msgid":"<87o7u6hl7c.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T09:56:55","name":"Make '\''autoreconf'\'' work for '\''gcc'\'', '\''libobjc'\'' (was: [PATCH] regenerate configure files and config.h.in files)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7u6hl7c.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6128,"url":"https://patchwork.plctlab.org/api/1.2/patches/6128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lepahkt3.fsf@euler.schwinge.homeip.net/","msgid":"<87lepahkt3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T10:05:28","name":"amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421] (was: [PATCH] [og12] amdgcn: Use FLAT addressing for all functions with pointer arguments)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lepahkt3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6140,"url":"https://patchwork.plctlab.org/api/1.2/patches/6140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zyhk5r.fsf@euler.schwinge.homeip.net/","msgid":"<87h6zyhk5r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T10:19:28","name":"Add '\''libgomp.oacc-c-c++-common/private-big-1.c'\'' [PR105421] (was: amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zyhk5r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6151,"url":"https://patchwork.plctlab.org/api/1.2/patches/6151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de/","msgid":"<20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-20T10:49:42","name":"Avoid PHI - PHI recurrence in vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de/mbox/"},{"id":6154,"url":"https://patchwork.plctlab.org/api/1.2/patches/6154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020110305.23A3033E79@hamza.pair.com/","msgid":"<20221020110305.23A3033E79@hamza.pair.com>","list_archive_url":null,"date":"2022-10-20T11:03:03","name":"[committed] wwwdocs: *: Omit trailing slash for tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020110305.23A3033E79@hamza.pair.com/mbox/"},{"id":6155,"url":"https://patchwork.plctlab.org/api/1.2/patches/6155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a65qhhk0.fsf@euler.schwinge.homeip.net/","msgid":"<87a65qhhk0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T11:15:43","name":"Remove support for Intel MIC offloading (was: [PATCH] Remove dead code.)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a65qhhk0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6162,"url":"https://patchwork.plctlab.org/api/1.2/patches/6162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-10-20T11:38:43","name":"Add '\''gcc.dg/tree-ssa/pr107195-3.c'\'' [PR107195] (was: Add '\''c-c++-common/torture/pr107195-1.c'\'' [PR107195] (was: [COMMITTED] [PR107195] Set range to zero when nonzero mask is 0.))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":6171,"url":"https://patchwork.plctlab.org/api/1.2/patches/6171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5Qw0au5ahZKvj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:04:19","name":"[committed] passes: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5Qw0au5ahZKvj@tucnak/mbox/"},{"id":6172,"url":"https://patchwork.plctlab.org/api/1.2/patches/6172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5fSXzOgOZcX67@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:05:17","name":"[committed] testsuite: Add some missing -Wno-psabi options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5fSXzOgOZcX67@tucnak/mbox/"},{"id":6182,"url":"https://patchwork.plctlab.org/api/1.2/patches/6182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FDkdIxfNGPH7KZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:48:17","name":"match.pd: Fix up gcc.dg/pr54346.c on i686-linux [PR54346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FDkdIxfNGPH7KZ@tucnak/mbox/"},{"id":6183,"url":"https://patchwork.plctlab.org/api/1.2/patches/6183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020125615.2198195-1-arsen@aarsen.me/","msgid":"<20221020125615.2198195-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T12:56:16","name":"libstdc++: Don'\''t use gstdint.h anymore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020125615.2198195-1-arsen@aarsen.me/mbox/"},{"id":6210,"url":"https://patchwork.plctlab.org/api/1.2/patches/6210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f65c009b-bbff-3358-b3f4-c4ce73f01d7c@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T13:58:09","name":"vect: Fix vectype when widening container type in bitfield pattern [PR107326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f65c009b-bbff-3358-b3f4-c4ce73f01d7c@arm.com/mbox/"},{"id":6211,"url":"https://patchwork.plctlab.org/api/1.2/patches/6211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020140740.415427-1-ppalka@redhat.com/","msgid":"<20221020140740.415427-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:07:40","name":"c++ modules: handle CONCEPT_DECL in node_template_info [PR102963]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020140740.415427-1-ppalka@redhat.com/mbox/"},{"id":6215,"url":"https://patchwork.plctlab.org/api/1.2/patches/6215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-1-aldyh@redhat.com/","msgid":"<20221020141336.228799-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:13:35","name":"[COMMITTED] Replace finite_operands_p with maybe_isnan.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-1-aldyh@redhat.com/mbox/"},{"id":6214,"url":"https://patchwork.plctlab.org/api/1.2/patches/6214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-2-aldyh@redhat.com/","msgid":"<20221020141336.228799-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:13:36","name":"[COMMITTED] Do not set NAN flags for VARYING ranges when !HONOR_NANS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-2-aldyh@redhat.com/mbox/"},{"id":6221,"url":"https://patchwork.plctlab.org/api/1.2/patches/6221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020142019.2418744-1-arsen@aarsen.me/","msgid":"<20221020142019.2418744-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T14:20:19","name":"[v2] libstdc++: Don'\''t use gstdint.h anymore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020142019.2418744-1-arsen@aarsen.me/mbox/"},{"id":6224,"url":"https://patchwork.plctlab.org/api/1.2/patches/6224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FdaWQjQMbkJ3rB@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T14:38:33","name":"c++, v2: Fix up mangling ICE with void{} [PR106863]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FdaWQjQMbkJ3rB@tucnak/mbox/"},{"id":6235,"url":"https://patchwork.plctlab.org/api/1.2/patches/6235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020145849.2459976-1-arsen@aarsen.me/","msgid":"<20221020145849.2459976-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T14:58:53","name":"libstdc++: Make placeholders inline when inline variables are available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020145849.2459976-1-arsen@aarsen.me/mbox/"},{"id":6265,"url":"https://patchwork.plctlab.org/api/1.2/patches/6265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020154948.2511787-1-arsen@aarsen.me/","msgid":"<20221020154948.2511787-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T15:49:50","name":"libstdc++: Enable building libstdc++.{a,so} when !HOSTED","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020154948.2511787-1-arsen@aarsen.me/mbox/"},{"id":6282,"url":"https://patchwork.plctlab.org/api/1.2/patches/6282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz/","msgid":"<33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz>","list_archive_url":null,"date":"2022-10-20T16:07:38","name":"[(pushed)] Remove dead link to Buildbot.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz/mbox/"},{"id":6284,"url":"https://patchwork.plctlab.org/api/1.2/patches/6284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020161414.7430-1-julian@codesourcery.com/","msgid":"<20221020161414.7430-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-20T16:14:13","name":"OpenMP: Duplicate checking for map clauses in Fortran (PR107214)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020161414.7430-1-julian@codesourcery.com/mbox/"},{"id":6298,"url":"https://patchwork.plctlab.org/api/1.2/patches/6298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfSSoVe+gmnco1uwJiE6=VFHboNXweEehqLsw763c5OwwA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T16:33:40","name":"PATCH: c++tools: fix compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfSSoVe+gmnco1uwJiE6=VFHboNXweEehqLsw763c5OwwA@mail.gmail.com/mbox/"},{"id":6299,"url":"https://patchwork.plctlab.org/api/1.2/patches/6299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020164633.256422-1-aldyh@redhat.com/","msgid":"<20221020164633.256422-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T16:46:33","name":"[COMMITTED] A false UNORDERED_ means neither operand can be a NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020164633.256422-1-aldyh@redhat.com/mbox/"},{"id":6300,"url":"https://patchwork.plctlab.org/api/1.2/patches/6300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com/","msgid":"<562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com>","list_archive_url":null,"date":"2022-10-20T16:50:44","name":"Fix uninitialized variable warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com/mbox/"},{"id":6303,"url":"https://patchwork.plctlab.org/api/1.2/patches/6303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020165734.1113688-1-hjl.tools@gmail.com/","msgid":"<20221020165734.1113688-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-20T16:57:34","name":"Always use TYPE_MODE instead of DECL_MODE for vector field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020165734.1113688-1-hjl.tools@gmail.com/mbox/"},{"id":6312,"url":"https://patchwork.plctlab.org/api/1.2/patches/6312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffef327d-54c2-1c52-319a-419d11c60bf0@eagerm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T17:35:37","name":"Microblaze: Fix uninitialized variable warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffef327d-54c2-1c52-319a-419d11c60bf0@eagerm.com/mbox/"},{"id":6313,"url":"https://patchwork.plctlab.org/api/1.2/patches/6313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com/","msgid":"<3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com>","list_archive_url":null,"date":"2022-10-20T17:38:08","name":"[OG12] libgomp.c-c++-common/requires-4.c: dg-xfail-run-if for USM with -foffload-memory=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com/mbox/"},{"id":6315,"url":"https://patchwork.plctlab.org/api/1.2/patches/6315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdea12bb-4d15-62a1-5e55-5948434568ab@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T17:41:53","name":"[OG12] omp-oacc-kernels-decompose.cc: fix -fcompare-debug with GIMPLE_DEBUG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdea12bb-4d15-62a1-5e55-5948434568ab@codesourcery.com/mbox/"},{"id":6364,"url":"https://patchwork.plctlab.org/api/1.2/patches/6364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194222.259811-1-aldyh@redhat.com/","msgid":"<20221020194222.259811-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T19:42:22","name":"[COMMITTED] Add op[12]_range for UNORDERED_LT entries in range-op.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194222.259811-1-aldyh@redhat.com/mbox/"},{"id":6366,"url":"https://patchwork.plctlab.org/api/1.2/patches/6366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194326.260151-1-aldyh@redhat.com/","msgid":"<20221020194326.260151-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T19:43:26","name":"[COMMITTED,PR,c++/106654] Handle non-irange ranges in get_range_global for default defs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194326.260151-1-aldyh@redhat.com/mbox/"},{"id":6376,"url":"https://patchwork.plctlab.org/api/1.2/patches/6376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020202053.3389227-1-jason@redhat.com/","msgid":"<20221020202053.3389227-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-20T20:20:53","name":"[RFA] tree: add build_string_literal overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020202053.3389227-1-jason@redhat.com/mbox/"},{"id":6397,"url":"https://patchwork.plctlab.org/api/1.2/patches/6397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020204825.3248771-1-torbjorn.svensson@foss.st.com/","msgid":"<20221020204825.3248771-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-20T20:48:26","name":"cpp/remap: Only override if string matched","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020204825.3248771-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":6423,"url":"https://patchwork.plctlab.org/api/1.2/patches/6423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020215402.ED7CC33E63@hamza.pair.com/","msgid":"<20221020215402.ED7CC33E63@hamza.pair.com>","list_archive_url":null,"date":"2022-10-20T21:54:01","name":"[committed] wwwdocs: *: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020215402.ED7CC33E63@hamza.pair.com/mbox/"},{"id":6471,"url":"https://patchwork.plctlab.org/api/1.2/patches/6471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ0PR11MB5600A9CDD52DBEC97E81257D9E2D9@SJ0PR11MB5600.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-21T01:52:06","name":"Ping^3 [PATCH V2] Add attribute hot judgement for INLINE_HINT_known_hot hint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ0PR11MB5600A9CDD52DBEC97E81257D9E2D9@SJ0PR11MB5600.namprd11.prod.outlook.com/mbox/"},{"id":6491,"url":"https://patchwork.plctlab.org/api/1.2/patches/6491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/faee7f9c-aef5-33e7-5f22-a52464ee4c35@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-21T02:58:35","name":"xtensa: Make register A0 allocable for the CALL0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/faee7f9c-aef5-33e7-5f22-a52464ee4c35@yahoo.co.jp/mbox/"},{"id":6510,"url":"https://patchwork.plctlab.org/api/1.2/patches/6510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021050159.121335-1-monk.chiang@sifive.com/","msgid":"<20221021050159.121335-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2022-10-21T05:01:59","name":"RISC-V: Add type attribute for atomic instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021050159.121335-1-monk.chiang@sifive.com/mbox/"},{"id":6532,"url":"https://patchwork.plctlab.org/api/1.2/patches/6532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021065447.GA10032@delia/","msgid":"<20221021065447.GA10032@delia>","list_archive_url":null,"date":"2022-10-21T06:54:48","name":"[committed] Don'\''t build readline/libreadline.a, when --with-system-readline is supplied","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021065447.GA10032@delia/mbox/"},{"id":6533,"url":"https://patchwork.plctlab.org/api/1.2/patches/6533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021071435.00F4633E4A@hamza.pair.com/","msgid":"<20221021071435.00F4633E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-21T07:14:31","name":"[committed] wwwdocs: style: Simplify handling of containers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021071435.00F4633E4A@hamza.pair.com/mbox/"},{"id":6534,"url":"https://patchwork.plctlab.org/api/1.2/patches/6534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JHE6thlGROTB36@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:15:31","name":"i386: Fix up BFmode comparisons in conditional moves [PR107322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JHE6thlGROTB36@tucnak/mbox/"},{"id":6537,"url":"https://patchwork.plctlab.org/api/1.2/patches/6537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JI5QFI4PPKRDJk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:23:17","name":"builtins: Add __builtin_nextafterf16b builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JI5QFI4PPKRDJk@tucnak/mbox/"},{"id":6540,"url":"https://patchwork.plctlab.org/api/1.2/patches/6540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKSqMSPD9xR8qk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:29:14","name":"libstdc++: Small extended float support tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKSqMSPD9xR8qk@tucnak/mbox/"},{"id":6541,"url":"https://patchwork.plctlab.org/api/1.2/patches/6541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKrxD7/o9itqqG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:30:55","name":"c++, v2: Don'\''t shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_constant_expression [PR107295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKrxD7/o9itqqG@tucnak/mbox/"},{"id":6542,"url":"https://patchwork.plctlab.org/api/1.2/patches/6542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0z1ljk2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:31:09","name":"[zero-call-used-regs] Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0z1ljk2.fsf@lxoliva.fsfla.org/mbox/"},{"id":6599,"url":"https://patchwork.plctlab.org/api/1.2/patches/6599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021091621.335F21331A@imap2.suse-dmz.suse.de/","msgid":"<20221021091621.335F21331A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-21T09:16:20","name":"tree-optimization/107323 - loop distribution partition ordering issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021091621.335F21331A@imap2.suse-dmz.suse.de/mbox/"},{"id":6607,"url":"https://patchwork.plctlab.org/api/1.2/patches/6607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021095119.473425-1-jwakely@redhat.com/","msgid":"<20221021095119.473425-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-21T09:51:19","name":"[committed] libstdc++: Fix std::move_only_function for incomplete parameter types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021095119.473425-1-jwakely@redhat.com/mbox/"},{"id":6668,"url":"https://patchwork.plctlab.org/api/1.2/patches/6668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021122414.3375395-1-torbjorn.svensson@foss.st.com/","msgid":"<20221021122414.3375395-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-21T12:24:15","name":"lto: Always quote path to touch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021122414.3375395-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":6709,"url":"https://patchwork.plctlab.org/api/1.2/patches/6709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021131426.308205-1-aldyh@redhat.com/","msgid":"<20221021131426.308205-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-21T13:14:26","name":"Rename nonzero_bits to known_zero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021131426.308205-1-aldyh@redhat.com/mbox/"},{"id":6729,"url":"https://patchwork.plctlab.org/api/1.2/patches/6729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-2-dimitrije.milosevic@syrmia.com/","msgid":"<20221021135203.626255-2-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-10-21T13:52:02","name":"[1/2] ivopts: Revert computation of address cost complexity.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-2-dimitrije.milosevic@syrmia.com/mbox/"},{"id":6731,"url":"https://patchwork.plctlab.org/api/1.2/patches/6731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-3-dimitrije.milosevic@syrmia.com/","msgid":"<20221021135203.626255-3-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-10-21T13:52:03","name":"[2/2] ivopts: Consider number of invariants when calculating register pressure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-3-dimitrije.milosevic@syrmia.com/mbox/"},{"id":6800,"url":"https://patchwork.plctlab.org/api/1.2/patches/6800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1K9+NDQQlJp87YK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T15:42:48","name":"builtins: Add various complex builtins for _Float{16,32,64,128,32x,64x,128x}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1K9+NDQQlJp87YK@tucnak/mbox/"},{"id":6804,"url":"https://patchwork.plctlab.org/api/1.2/patches/6804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1LBm4u+R3Ka28Dj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T15:58:19","name":"libstdc++-v3: support for extended floating point types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1LBm4u+R3Ka28Dj@tucnak/mbox/"},{"id":6805,"url":"https://patchwork.plctlab.org/api/1.2/patches/6805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-1-dmalcolm@redhat.com/","msgid":"<20221021160150.1600351-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-21T16:01:49","name":"[1/2] Add gcc/make-unique.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-1-dmalcolm@redhat.com/mbox/"},{"id":6806,"url":"https://patchwork.plctlab.org/api/1.2/patches/6806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-2-dmalcolm@redhat.com/","msgid":"<20221021160150.1600351-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-21T16:01:50","name":"[2/2] analyzer: use std::unique_ptr for pending_diagnostic/note","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-2-dmalcolm@redhat.com/mbox/"},{"id":6863,"url":"https://patchwork.plctlab.org/api/1.2/patches/6863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com/","msgid":"<129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com>","list_archive_url":null,"date":"2022-10-21T16:42:31","name":"vect: Make vect_check_gather_scatter reject offsets that aren'\''t multiples of BITS_PER_UNIT [PR107346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com/mbox/"},{"id":7021,"url":"https://patchwork.plctlab.org/api/1.2/patches/7021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210212214320.150427@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-21T22:15:11","name":"c: tree: target: C2x (...) function prototypes and va_start relaxation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210212214320.150427@digraph.polyomino.org.uk/mbox/"},{"id":7022,"url":"https://patchwork.plctlab.org/api/1.2/patches/7022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfa5eafc-d6a9-dfe3-7bb5-e82932de0add@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-21T22:46:13","name":"[v2] xtensa: Make register A0 allocable for the CALL0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfa5eafc-d6a9-dfe3-7bb5-e82932de0add@yahoo.co.jp/mbox/"},{"id":7023,"url":"https://patchwork.plctlab.org/api/1.2/patches/7023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232824.1093138-1-polacek@redhat.com/","msgid":"<20221021232824.1093138-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-21T23:28:24","name":"c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232824.1093138-1-polacek@redhat.com/mbox/"},{"id":7024,"url":"https://patchwork.plctlab.org/api/1.2/patches/7024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232922.1093229-1-polacek@redhat.com/","msgid":"<20221021232922.1093229-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-21T23:29:22","name":"c++: ICE with invalid structured bindings [PR107276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232922.1093229-1-polacek@redhat.com/mbox/"},{"id":7880,"url":"https://patchwork.plctlab.org/api/1.2/patches/7880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com/","msgid":"<9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com>","list_archive_url":null,"date":"2022-10-22T11:54:20","name":"libgcc: Update '\''gthr-mcf.h'\'' to include a dedicated header for libobjc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com/mbox/"},{"id":7893,"url":"https://patchwork.plctlab.org/api/1.2/patches/7893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022142529.376406-1-aldyh@redhat.com/","msgid":"<20221022142529.376406-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-22T14:25:29","name":"[COMMITTED] Update selftest such that [-Inf, +Inf] is always VARYING for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022142529.376406-1-aldyh@redhat.com/mbox/"},{"id":7917,"url":"https://patchwork.plctlab.org/api/1.2/patches/7917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022175911.08E2733ED8@hamza.pair.com/","msgid":"<20221022175911.08E2733ED8@hamza.pair.com>","list_archive_url":null,"date":"2022-10-22T17:59:08","name":"[committed] wwwdocs: index: Rotate news from 2018-08 to 2020-12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022175911.08E2733ED8@hamza.pair.com/mbox/"},{"id":7967,"url":"https://patchwork.plctlab.org/api/1.2/patches/7967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023093454.7et6anfgzksfssxg@begin/","msgid":"<20221023093454.7et6anfgzksfssxg@begin>","list_archive_url":null,"date":"2022-10-23T09:34:54","name":": Fix static-pie on Hurd target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023093454.7et6anfgzksfssxg@begin/mbox/"},{"id":8042,"url":"https://patchwork.plctlab.org/api/1.2/patches/8042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023145633.501586-1-aldyh@redhat.com/","msgid":"<20221023145633.501586-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-23T14:56:33","name":"[PR,tree-optimization/107365] Check HONOR_NANS instead of flag_finite_math_only in frange:verify_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023145633.501586-1-aldyh@redhat.com/mbox/"},{"id":8060,"url":"https://patchwork.plctlab.org/api/1.2/patches/8060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023165224.97237-1-keegan@undefinedbehaviour.org/","msgid":"<20221023165224.97237-1-keegan@undefinedbehaviour.org>","list_archive_url":null,"date":"2022-10-23T16:52:24","name":"c: If -fplan9-extensions, allow duplicate field declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023165224.97237-1-keegan@undefinedbehaviour.org/mbox/"},{"id":8102,"url":"https://patchwork.plctlab.org/api/1.2/patches/8102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024002828.28861-1-mark@harmstone.com/","msgid":"<20221024002828.28861-1-mark@harmstone.com>","list_archive_url":null,"date":"2022-10-24T00:28:28","name":"Add -gcodeview option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024002828.28861-1-mark@harmstone.com/mbox/"},{"id":8110,"url":"https://patchwork.plctlab.org/api/1.2/patches/8110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024013916.14043-1-juzhe.zhong@rivai.ai/","msgid":"<20221024013916.14043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T01:39:16","name":"RISC-V: Fix REG_CLASS_CONTENTS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024013916.14043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8115,"url":"https://patchwork.plctlab.org/api/1.2/patches/8115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024015344.22546-1-juzhe.zhong@rivai.ai/","msgid":"<20221024015344.22546-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T01:53:44","name":"RISC-V: Support (set (mem) (const_poly_int)) handling and remove TI/TF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024015344.22546-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8116,"url":"https://patchwork.plctlab.org/api/1.2/patches/8116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020312.26851-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020312.26851-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:03:12","name":"RISC-V: Support (set (mem) (const_poly_int))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020312.26851-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8121,"url":"https://patchwork.plctlab.org/api/1.2/patches/8121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020524.27704-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020524.27704-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:05:24","name":"RISC-V: Remove unused TI/TF vector modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020524.27704-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8122,"url":"https://patchwork.plctlab.org/api/1.2/patches/8122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020853.29547-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020853.29547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:08:53","name":"RISC-V: Support load/store in mov pattern for RVV modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020853.29547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8125,"url":"https://patchwork.plctlab.org/api/1.2/patches/8125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022028.197505-1-juzhe.zhong@rivai.ai/","msgid":"<20221024022028.197505-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:20:28","name":"RISC-V: Replace CONSTEXPR with constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022028.197505-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8127,"url":"https://patchwork.plctlab.org/api/1.2/patches/8127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022737.52627-1-juzhe.zhong@rivai.ai/","msgid":"<20221024022737.52627-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:27:37","name":"RISC-V: Support (set (mem) (const_poly_int))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022737.52627-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8129,"url":"https://patchwork.plctlab.org/api/1.2/patches/8129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024024604.18324-1-lili.cui@intel.com/","msgid":"<20221024024604.18324-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-24T02:46:04","name":"ix86: Suggest unroll factor for loop vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024024604.18324-1-lili.cui@intel.com/mbox/"},{"id":8137,"url":"https://patchwork.plctlab.org/api/1.2/patches/8137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4b84496-105a-200f-3a88-2b0a33ce638d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T03:14:20","name":"[PATCH-2,rs6000] Reverse V8HI on Power8 by vector rotation [PR100866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4b84496-105a-200f-3a88-2b0a33ce638d@linux.ibm.com/mbox/"},{"id":8181,"url":"https://patchwork.plctlab.org/api/1.2/patches/8181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y8dfwmYoaac6EW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-24T07:19:17","name":"c, c++: Fix up excess precision handling of scalar_to_vector conversion [PR107358]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y8dfwmYoaac6EW@tucnak/mbox/"},{"id":8184,"url":"https://patchwork.plctlab.org/api/1.2/patches/8184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y+XfMW7lkamX2r@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-24T07:27:25","name":"c++: Fix up constexpr handling of char/signed char/short pre/post inc/decrement [PR105774]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y+XfMW7lkamX2r@tucnak/mbox/"},{"id":8228,"url":"https://patchwork.plctlab.org/api/1.2/patches/8228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1910003.PYKUYFuaPT@fomalhaut/","msgid":"<1910003.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:25:10","name":"Relax assertion in profile.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1910003.PYKUYFuaPT@fomalhaut/mbox/"},{"id":8247,"url":"https://patchwork.plctlab.org/api/1.2/patches/8247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3519176.R56niFO833@fomalhaut/","msgid":"<3519176.R56niFO833@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:54:55","name":"ARM: Make ARMv8-M attribute cmse_nonsecure_call work in Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3519176.R56niFO833@fomalhaut/mbox/"},{"id":8248,"url":"https://patchwork.plctlab.org/api/1.2/patches/8248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1806820.atdPhlSkOF@fomalhaut/","msgid":"<1806820.atdPhlSkOF@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:57:31","name":"Aarch64: Do not define DONT_USE_BUILTIN_SETJMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1806820.atdPhlSkOF@fomalhaut/mbox/"},{"id":8252,"url":"https://patchwork.plctlab.org/api/1.2/patches/8252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024090125.16371-1-haochen.jiang@intel.com/","msgid":"<20221024090125.16371-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-24T09:01:25","name":"Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024090125.16371-1-haochen.jiang@intel.com/mbox/"},{"id":8288,"url":"https://patchwork.plctlab.org/api/1.2/patches/8288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024095530.16284-1-kito.cheng@sifive.com/","msgid":"<20221024095530.16284-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-24T09:55:30","name":"RISC-V: Add h extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024095530.16284-1-kito.cheng@sifive.com/mbox/"},{"id":8324,"url":"https://patchwork.plctlab.org/api/1.2/patches/8324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com/","msgid":"<95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com>","list_archive_url":null,"date":"2022-10-24T10:43:08","name":"vect: Fix wrong shift_n after widening on BE [PR107338]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com/mbox/"},{"id":9131,"url":"https://patchwork.plctlab.org/api/1.2/patches/9131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024133316.33026-1-aldyh@redhat.com/","msgid":"<20221024133316.33026-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-24T13:33:16","name":"[PR,tree-optimization/107355] Handle NANs in abs range-op entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024133316.33026-1-aldyh@redhat.com/mbox/"},{"id":9516,"url":"https://patchwork.plctlab.org/api/1.2/patches/9516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024142414.161380-1-juzhe.zhong@rivai.ai/","msgid":"<20221024142414.161380-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T14:24:14","name":"RISC-V: Fix typo.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024142414.161380-1-juzhe.zhong@rivai.ai/mbox/"},{"id":9688,"url":"https://patchwork.plctlab.org/api/1.2/patches/9688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com/","msgid":"<7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com>","list_archive_url":null,"date":"2022-10-24T16:26:44","name":"[OG12,commit] amdgcn, libgomp: USM allocation update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com/mbox/"},{"id":9689,"url":"https://patchwork.plctlab.org/api/1.2/patches/9689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024162726.3463437-1-ppalka@redhat.com/","msgid":"<20221024162726.3463437-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-24T16:27:26","name":"c++: remove use_default_args parm of coerce_template_parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024162726.3463437-1-ppalka@redhat.com/mbox/"},{"id":9730,"url":"https://patchwork.plctlab.org/api/1.2/patches/9730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9795e65-9425-9216-0556-a82266b7c336@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T16:38:23","name":"[OG12,commit] amdgcn: disallow USM on gfx908","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9795e65-9425-9216-0556-a82266b7c336@codesourcery.com/mbox/"},{"id":9771,"url":"https://patchwork.plctlab.org/api/1.2/patches/9771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com/","msgid":"<264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com>","list_archive_url":null,"date":"2022-10-24T16:50:40","name":"[OG12,commit] vect: WORKAROUND vectorizer bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com/mbox/"},{"id":9870,"url":"https://patchwork.plctlab.org/api/1.2/patches/9870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1bHteXKidcJWWie@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T17:13:25","name":"[v2] c++: ICE with invalid structured bindings [PR107276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1bHteXKidcJWWie@redhat.com/mbox/"},{"id":9925,"url":"https://patchwork.plctlab.org/api/1.2/patches/9925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd09944-8210-be23-dc1b-5a435f8eae26@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-24T18:24:22","name":"[(pushed)] x86: fix VENDOR_MAX enum value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd09944-8210-be23-dc1b-5a435f8eae26@suse.cz/mbox/"},{"id":10070,"url":"https://patchwork.plctlab.org/api/1.2/patches/10070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt9lvw3y.fsf@euler.schwinge.homeip.net/","msgid":"<87mt9lvw3y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-24T19:51:13","name":"libgomp/nvptx: Prepare for reverse-offload callback handling, resolve spurious SIGSEGVs (was: [Patch][v5] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt9lvw3y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":10136,"url":"https://patchwork.plctlab.org/api/1.2/patches/10136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024201927.300C733E59@hamza.pair.com/","msgid":"<20221024201927.300C733E59@hamza.pair.com>","list_archive_url":null,"date":"2022-10-24T20:19:24","name":"[committed] wwwdocs: search: Remove trailing slashes on tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024201927.300C733E59@hamza.pair.com/mbox/"},{"id":10275,"url":"https://patchwork.plctlab.org/api/1.2/patches/10275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205233.1760101-1-dmalcolm@redhat.com/","msgid":"<20221024205233.1760101-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:52:33","name":"[committed] analyzer: handle \"pipe\" and \"pipe2\" [PR106300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205233.1760101-1-dmalcolm@redhat.com/mbox/"},{"id":10276,"url":"https://patchwork.plctlab.org/api/1.2/patches/10276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205312.1760173-1-dmalcolm@redhat.com/","msgid":"<20221024205312.1760173-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:53:12","name":"[committed] analyzer: simplify sm_state_map lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205312.1760173-1-dmalcolm@redhat.com/mbox/"},{"id":10277,"url":"https://patchwork.plctlab.org/api/1.2/patches/10277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205348.1760258-1-dmalcolm@redhat.com/","msgid":"<20221024205348.1760258-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:53:48","name":"[committed] analyzer: handle (NULL == &VAR) [PR107345]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205348.1760258-1-dmalcolm@redhat.com/mbox/"},{"id":10278,"url":"https://patchwork.plctlab.org/api/1.2/patches/10278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205453.1760357-1-dmalcolm@redhat.com/","msgid":"<20221024205453.1760357-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:54:53","name":"[committed] diagnostics: fix ICE in sarif output with NULL filename [PR107366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205453.1760357-1-dmalcolm@redhat.com/mbox/"},{"id":10279,"url":"https://patchwork.plctlab.org/api/1.2/patches/10279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205554.1760903-1-dmalcolm@redhat.com/","msgid":"<20221024205554.1760903-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:55:54","name":"[commited] analyzer: fix ICE on va_copy [PR107349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205554.1760903-1-dmalcolm@redhat.com/mbox/"},{"id":10477,"url":"https://patchwork.plctlab.org/api/1.2/patches/10477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025032238.322211-1-juzhe.zhong@rivai.ai/","msgid":"<20221025032238.322211-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-25T03:22:38","name":"RISC-V: ADJUST_NUNITS according to -march.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025032238.322211-1-juzhe.zhong@rivai.ai/mbox/"},{"id":10484,"url":"https://patchwork.plctlab.org/api/1.2/patches/10484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz/","msgid":"<766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz>","list_archive_url":null,"date":"2022-10-25T04:23:53","name":"[pushed] i386: fix pedantic warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz/mbox/"},{"id":10485,"url":"https://patchwork.plctlab.org/api/1.2/patches/10485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz/","msgid":"<1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz>","list_archive_url":null,"date":"2022-10-25T05:01:02","name":"riscv: fix cross compiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz/mbox/"},{"id":10510,"url":"https://patchwork.plctlab.org/api/1.2/patches/10510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025061733.41146-1-monk.chiang@sifive.com/","msgid":"<20221025061733.41146-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2022-10-25T06:17:33","name":"RISC-V: Recognized Svinval and Svnapot extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025061733.41146-1-monk.chiang@sifive.com/mbox/"},{"id":10577,"url":"https://patchwork.plctlab.org/api/1.2/patches/10577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025080230.C01D613A64@imap2.suse-dmz.suse.de/","msgid":"<20221025080230.C01D613A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T08:02:30","name":"tree-optimization/100756 - niter analysis and folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025080230.C01D613A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10591,"url":"https://patchwork.plctlab.org/api/1.2/patches/10591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1eiocGGtzckn57A@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:47:29","name":"[committed] gimplify: Don'\''t add GIMPLE_ASSUME if errors were seen [PR107369]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1eiocGGtzckn57A@tucnak/mbox/"},{"id":10592,"url":"https://patchwork.plctlab.org/api/1.2/patches/10592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ei1ZtN132Hr3h3@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:48:21","name":"[committed] gimplify: Call gimple_boolify on IFN_ASSUME argument [PR107368]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ei1ZtN132Hr3h3@tucnak/mbox/"},{"id":10593,"url":"https://patchwork.plctlab.org/api/1.2/patches/10593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ejAIVkd8y4CNJW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:49:04","name":"[committed] gimplify: Fix comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ejAIVkd8y4CNJW@tucnak/mbox/"},{"id":10640,"url":"https://patchwork.plctlab.org/api/1.2/patches/10640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de/","msgid":"<20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T09:15:09","name":"Move NOP stripping in SCEV analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de/mbox/"},{"id":10685,"url":"https://patchwork.plctlab.org/api/1.2/patches/10685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025100103.1736564-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025100103.1736564-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T10:01:04","name":"IRA: Make sure array is big enough","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025100103.1736564-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10697,"url":"https://patchwork.plctlab.org/api/1.2/patches/10697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025101132.58E5F13A64@imap2.suse-dmz.suse.de/","msgid":"<20221025101132.58E5F13A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T10:11:31","name":"tree-optimization/107176 - SCEV analysis association issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025101132.58E5F13A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10780,"url":"https://patchwork.plctlab.org/api/1.2/patches/10780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025130926.6319B13A64@imap2.suse-dmz.suse.de/","msgid":"<20221025130926.6319B13A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T13:09:26","name":"unswitch most profitable condition first","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025130926.6319B13A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10790,"url":"https://patchwork.plctlab.org/api/1.2/patches/10790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025135323.98303-1-juzhe.zhong@rivai.ai/","msgid":"<20221025135323.98303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-25T13:53:23","name":"RISC-V: Fix a mistake in previous patch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025135323.98303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":10831,"url":"https://patchwork.plctlab.org/api/1.2/patches/10831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025141919.1789727-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025141919.1789727-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T14:19:20","name":"c++: Use in-process client when networking is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025141919.1789727-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10860,"url":"https://patchwork.plctlab.org/api/1.2/patches/10860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025151512.1791109-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025151512.1791109-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T15:15:13","name":"testsuite: Windows paths use \\ and not /","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025151512.1791109-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10866,"url":"https://patchwork.plctlab.org/api/1.2/patches/10866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1f+66oVJSTeTkCc@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T15:21:15","name":"[v2] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1f+66oVJSTeTkCc@redhat.com/mbox/"},{"id":10882,"url":"https://patchwork.plctlab.org/api/1.2/patches/10882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0ac4d330fe0803b052aa11e07ac078849a6a828.1666652978.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-25T16:29:21","name":"rs6000: Add CCANY; replace signed by ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0ac4d330fe0803b052aa11e07ac078849a6a828.1666652978.git.segher@kernel.crashing.org/mbox/"},{"id":10886,"url":"https://patchwork.plctlab.org/api/1.2/patches/10886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163709.95817-1-jason@redhat.com/","msgid":"<20221025163709.95817-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T16:37:09","name":"[pushed] c++: improve failed constexpr assume diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163709.95817-1-jason@redhat.com/mbox/"},{"id":10887,"url":"https://patchwork.plctlab.org/api/1.2/patches/10887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163750.96139-1-jason@redhat.com/","msgid":"<20221025163750.96139-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T16:37:50","name":"[pushed] c++: constexpr-evaluate more assumes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163750.96139-1-jason@redhat.com/mbox/"},{"id":10899,"url":"https://patchwork.plctlab.org/api/1.2/patches/10899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025172443.6732-1-david.faust@oracle.com/","msgid":"<20221025172443.6732-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-25T17:24:43","name":"[v2] bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025172443.6732-1-david.faust@oracle.com/mbox/"},{"id":10912,"url":"https://patchwork.plctlab.org/api/1.2/patches/10912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJbH2PyhVRnAgtEPnHc+3-XpdXVVbmV70V2rNmxFh5YRDmb1tw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T17:39:33","name":"tsan: fix test for machines without pthread_cond_clockwait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJbH2PyhVRnAgtEPnHc+3-XpdXVVbmV70V2rNmxFh5YRDmb1tw@mail.gmail.com/mbox/"},{"id":10914,"url":"https://patchwork.plctlab.org/api/1.2/patches/10914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025180506.108938-1-jason@redhat.com/","msgid":"<20221025180506.108938-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T18:05:06","name":"[pushed] c++: correct fold_operand change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025180506.108938-1-jason@redhat.com/mbox/"},{"id":10939,"url":"https://patchwork.plctlab.org/api/1.2/patches/10939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025185733.F0F3A33E37@hamza.pair.com/","msgid":"<20221025185733.F0F3A33E37@hamza.pair.com>","list_archive_url":null,"date":"2022-10-25T18:57:30","name":"[committed] wwwdocs: contribute: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025185733.F0F3A33E37@hamza.pair.com/mbox/"},{"id":10973,"url":"https://patchwork.plctlab.org/api/1.2/patches/10973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f068e565-e2a0-2b51-cb63-952e16b7c024@acm.org/","msgid":"","list_archive_url":null,"date":"2022-10-25T20:16:11","name":"c++: Adjust synthetic template parm creation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f068e565-e2a0-2b51-cb63-952e16b7c024@acm.org/mbox/"},{"id":10984,"url":"https://patchwork.plctlab.org/api/1.2/patches/10984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025205901.125058-1-aldyh@redhat.com/","msgid":"<20221025205901.125058-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-25T20:59:01","name":"Convert flag_finite_math_only uses in frange to HONOR_*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025205901.125058-1-aldyh@redhat.com/mbox/"},{"id":10985,"url":"https://patchwork.plctlab.org/api/1.2/patches/10985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025210140.125230-1-aldyh@redhat.com/","msgid":"<20221025210140.125230-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-25T21:01:40","name":"[PR,tree-optimization/107394] Canonicalize global franges as they are read back.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025210140.125230-1-aldyh@redhat.com/mbox/"},{"id":10986,"url":"https://patchwork.plctlab.org/api/1.2/patches/10986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E4C2614134D89E599B691319@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T21:06:59","name":"[PUSHED] Start using discriminators in AutoFDO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E4C2614134D89E599B691319@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":11024,"url":"https://patchwork.plctlab.org/api/1.2/patches/11024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3525A6EC99FBB9619679FDBB91309@DS7PR21MB3525.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T00:38:12","name":"[PUSHED] Don'\''t force DWARF4 for AutoFDO tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3525A6EC99FBB9619679FDBB91309@DS7PR21MB3525.namprd21.prod.outlook.com/mbox/"},{"id":11037,"url":"https://patchwork.plctlab.org/api/1.2/patches/11037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026022847.2932438-1-hongtao.liu@intel.com/","msgid":"<20221026022847.2932438-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-26T02:28:47","name":"[x86] Enable V4BFmode and V2BFmode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026022847.2932438-1-hongtao.liu@intel.com/mbox/"},{"id":11070,"url":"https://patchwork.plctlab.org/api/1.2/patches/11070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026055248.94100-1-hongyu.wang@intel.com/","msgid":"<20221026055248.94100-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-10-26T05:52:48","name":"i386: Enable small loop unrolling for O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026055248.94100-1-hongyu.wang@intel.com/mbox/"},{"id":11074,"url":"https://patchwork.plctlab.org/api/1.2/patches/11074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp/","msgid":"<9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-26T06:27:51","name":"xtensa: Fix out-of-bounds array access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp/mbox/"},{"id":11102,"url":"https://patchwork.plctlab.org/api/1.2/patches/11102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026074950.10462-1-sebastian.huber@embedded-brains.de/","msgid":"<20221026074950.10462-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-10-26T07:49:50","name":"riscv/RTEMS: Add RISCV_GCOV_TYPE_SIZE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026074950.10462-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":11104,"url":"https://patchwork.plctlab.org/api/1.2/patches/11104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-2-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:26","name":"[Rust,front-end,v3,01/46] Use DW_ATE_UTF for the Rust '\''char'\'' type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-2-arthur.cohen@embecosm.com/mbox/"},{"id":11109,"url":"https://patchwork.plctlab.org/api/1.2/patches/11109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-3-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:27","name":"[Rust,front-end,v3,02/46] gccrs: Add nessecary hooks for a Rust front-end testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-3-arthur.cohen@embecosm.com/mbox/"},{"id":11112,"url":"https://patchwork.plctlab.org/api/1.2/patches/11112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-4-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:28","name":"[Rust,front-end,v3,03/46] gccrs: Add Debug info testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-4-arthur.cohen@embecosm.com/mbox/"},{"id":11108,"url":"https://patchwork.plctlab.org/api/1.2/patches/11108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-5-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:29","name":"[Rust,front-end,v3,04/46] gccrs: Add link cases testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-5-arthur.cohen@embecosm.com/mbox/"},{"id":11116,"url":"https://patchwork.plctlab.org/api/1.2/patches/11116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-6-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:30","name":"[Rust,front-end,v3,05/46] gccrs: Add general compilation test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-6-arthur.cohen@embecosm.com/mbox/"},{"id":11107,"url":"https://patchwork.plctlab.org/api/1.2/patches/11107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-7-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:31","name":"[Rust,front-end,v3,06/46] gccrs: Add execution test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-7-arthur.cohen@embecosm.com/mbox/"},{"id":11111,"url":"https://patchwork.plctlab.org/api/1.2/patches/11111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-8-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:32","name":"[Rust,front-end,v3,07/46] gccrs: Add gcc-check-target check-rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-8-arthur.cohen@embecosm.com/mbox/"},{"id":11121,"url":"https://patchwork.plctlab.org/api/1.2/patches/11121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-9-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:33","name":"[Rust,front-end,v3,08/46] gccrs: Add Rust front-end base AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-9-arthur.cohen@embecosm.com/mbox/"},{"id":11114,"url":"https://patchwork.plctlab.org/api/1.2/patches/11114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-10-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:34","name":"[Rust,front-end,v3,09/46] gccrs: Add definitions of Rust Items in AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-10-arthur.cohen@embecosm.com/mbox/"},{"id":11127,"url":"https://patchwork.plctlab.org/api/1.2/patches/11127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-11-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:35","name":"[Rust,front-end,v3,10/46] gccrs: Add full definitions of Rust AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-11-arthur.cohen@embecosm.com/mbox/"},{"id":11110,"url":"https://patchwork.plctlab.org/api/1.2/patches/11110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-12-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:36","name":"[Rust,front-end,v3,11/46] gccrs: Add Rust AST visitors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-12-arthur.cohen@embecosm.com/mbox/"},{"id":11113,"url":"https://patchwork.plctlab.org/api/1.2/patches/11113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-13-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:37","name":"[Rust,front-end,v3,12/46] gccrs: Add Lexer for Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-13-arthur.cohen@embecosm.com/mbox/"},{"id":11115,"url":"https://patchwork.plctlab.org/api/1.2/patches/11115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-14-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:38","name":"[Rust,front-end,v3,13/46] gccrs: Add Parser for Rust front-end pt.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-14-arthur.cohen@embecosm.com/mbox/"},{"id":11118,"url":"https://patchwork.plctlab.org/api/1.2/patches/11118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-15-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:39","name":"[Rust,front-end,v3,14/46] gccrs: Add Parser for Rust front-end pt.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-15-arthur.cohen@embecosm.com/mbox/"},{"id":11123,"url":"https://patchwork.plctlab.org/api/1.2/patches/11123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-16-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:40","name":"[Rust,front-end,v3,15/46] gccrs: Add expansion pass for the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-16-arthur.cohen@embecosm.com/mbox/"},{"id":11119,"url":"https://patchwork.plctlab.org/api/1.2/patches/11119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-17-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:41","name":"[Rust,front-end,v3,16/46] gccrs: Add name resolution pass to the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-17-arthur.cohen@embecosm.com/mbox/"},{"id":11122,"url":"https://patchwork.plctlab.org/api/1.2/patches/11122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-18-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:42","name":"[Rust,front-end,v3,17/46] gccrs: Add declarations for Rust HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-18-arthur.cohen@embecosm.com/mbox/"},{"id":11124,"url":"https://patchwork.plctlab.org/api/1.2/patches/11124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-19-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:43","name":"[Rust,front-end,v3,18/46] gccrs: Add HIR definitions and visitor framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-19-arthur.cohen@embecosm.com/mbox/"},{"id":11128,"url":"https://patchwork.plctlab.org/api/1.2/patches/11128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-20-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:44","name":"[Rust,front-end,v3,19/46] gccrs: Add AST to HIR lowering pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-20-arthur.cohen@embecosm.com/mbox/"},{"id":11120,"url":"https://patchwork.plctlab.org/api/1.2/patches/11120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-21-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:45","name":"[Rust,front-end,v3,20/46] gccrs: Add wrapper for make_unique","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-21-arthur.cohen@embecosm.com/mbox/"},{"id":11139,"url":"https://patchwork.plctlab.org/api/1.2/patches/11139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-22-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:46","name":"[Rust,front-end,v3,21/46] gccrs: Add port of FNV hash used during legacy symbol mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-22-arthur.cohen@embecosm.com/mbox/"},{"id":11125,"url":"https://patchwork.plctlab.org/api/1.2/patches/11125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-23-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:47","name":"[Rust,front-end,v3,22/46] gccrs: Add Rust ABI enum helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-23-arthur.cohen@embecosm.com/mbox/"},{"id":11129,"url":"https://patchwork.plctlab.org/api/1.2/patches/11129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-24-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:48","name":"[Rust,front-end,v3,23/46] gccrs: Add Base62 implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-24-arthur.cohen@embecosm.com/mbox/"},{"id":11126,"url":"https://patchwork.plctlab.org/api/1.2/patches/11126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-25-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:49","name":"[Rust,front-end,v3,24/46] gccrs: Add implementation of Optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-25-arthur.cohen@embecosm.com/mbox/"},{"id":11131,"url":"https://patchwork.plctlab.org/api/1.2/patches/11131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-26-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:50","name":"[Rust,front-end,v3,25/46] gccrs: Add attributes checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-26-arthur.cohen@embecosm.com/mbox/"},{"id":11132,"url":"https://patchwork.plctlab.org/api/1.2/patches/11132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-27-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:51","name":"[Rust,front-end,v3,26/46] gccrs: Add helpers mappings canonical path and lang items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-27-arthur.cohen@embecosm.com/mbox/"},{"id":11135,"url":"https://patchwork.plctlab.org/api/1.2/patches/11135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-28-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:52","name":"[Rust,front-end,v3,27/46] gccrs: Add type resolution and trait solving pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-28-arthur.cohen@embecosm.com/mbox/"},{"id":11137,"url":"https://patchwork.plctlab.org/api/1.2/patches/11137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-29-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:53","name":"[Rust,front-end,v3,28/46] gccrs: Add Rust type information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-29-arthur.cohen@embecosm.com/mbox/"},{"id":11145,"url":"https://patchwork.plctlab.org/api/1.2/patches/11145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-30-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:54","name":"[Rust,front-end,v3,29/46] gccrs: Add remaining type system transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-30-arthur.cohen@embecosm.com/mbox/"},{"id":11142,"url":"https://patchwork.plctlab.org/api/1.2/patches/11142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-31-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:55","name":"[Rust,front-end,v3,30/46] gccrs: Add unsafe checks for Rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-31-arthur.cohen@embecosm.com/mbox/"},{"id":11130,"url":"https://patchwork.plctlab.org/api/1.2/patches/11130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-32-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:56","name":"[Rust,front-end,v3,31/46] gccrs: Add const checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-32-arthur.cohen@embecosm.com/mbox/"},{"id":11148,"url":"https://patchwork.plctlab.org/api/1.2/patches/11148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-33-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:57","name":"[Rust,front-end,v3,32/46] gccrs: Add privacy checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-33-arthur.cohen@embecosm.com/mbox/"},{"id":11144,"url":"https://patchwork.plctlab.org/api/1.2/patches/11144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-34-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:58","name":"[Rust,front-end,v3,33/46] gccrs: Add dead code scan on HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-34-arthur.cohen@embecosm.com/mbox/"},{"id":11143,"url":"https://patchwork.plctlab.org/api/1.2/patches/11143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-35-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:59","name":"[Rust,front-end,v3,34/46] gccrs: Add unused variable scan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-35-arthur.cohen@embecosm.com/mbox/"},{"id":11150,"url":"https://patchwork.plctlab.org/api/1.2/patches/11150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-36-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:00","name":"[Rust,front-end,v3,35/46] gccrs: Add metadata ouptput pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-36-arthur.cohen@embecosm.com/mbox/"},{"id":11147,"url":"https://patchwork.plctlab.org/api/1.2/patches/11147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-37-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:01","name":"[Rust,front-end,v3,36/46] gccrs: Add base for HIR to GCC GENERIC lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-37-arthur.cohen@embecosm.com/mbox/"},{"id":11136,"url":"https://patchwork.plctlab.org/api/1.2/patches/11136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-38-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:02","name":"[Rust,front-end,v3,37/46] gccrs: Add HIR to GCC GENERIC lowering for all nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-38-arthur.cohen@embecosm.com/mbox/"},{"id":11134,"url":"https://patchwork.plctlab.org/api/1.2/patches/11134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-39-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:03","name":"[Rust,front-end,v3,38/46] gccrs: Add HIR to GCC GENERIC lowering entry point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-39-arthur.cohen@embecosm.com/mbox/"},{"id":11151,"url":"https://patchwork.plctlab.org/api/1.2/patches/11151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-40-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:04","name":"[Rust,front-end,v3,39/46] gccrs: These are wrappers ported from reusing gccgo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-40-arthur.cohen@embecosm.com/mbox/"},{"id":11149,"url":"https://patchwork.plctlab.org/api/1.2/patches/11149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-41-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:05","name":"[Rust,front-end,v3,40/46] gccrs: Add GCC Rust front-end Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-41-arthur.cohen@embecosm.com/mbox/"},{"id":11141,"url":"https://patchwork.plctlab.org/api/1.2/patches/11141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-42-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:06","name":"[Rust,front-end,v3,41/46] gccrs: Add config-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-42-arthur.cohen@embecosm.com/mbox/"},{"id":11152,"url":"https://patchwork.plctlab.org/api/1.2/patches/11152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-43-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:07","name":"[Rust,front-end,v3,42/46] gccrs: Add lang-spec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-43-arthur.cohen@embecosm.com/mbox/"},{"id":11153,"url":"https://patchwork.plctlab.org/api/1.2/patches/11153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-44-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:08","name":"[Rust,front-end,v3,43/46] gccrs: Add lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-44-arthur.cohen@embecosm.com/mbox/"},{"id":11154,"url":"https://patchwork.plctlab.org/api/1.2/patches/11154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-45-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:09","name":"[Rust,front-end,v3,44/46] gccrs: Add compiler driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-45-arthur.cohen@embecosm.com/mbox/"},{"id":11146,"url":"https://patchwork.plctlab.org/api/1.2/patches/11146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-46-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:10","name":"[Rust,front-end,v3,45/46] gccrs: Compiler proper interface kicks off the pipeline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-46-arthur.cohen@embecosm.com/mbox/"},{"id":11155,"url":"https://patchwork.plctlab.org/api/1.2/patches/11155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-47-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:11","name":"[Rust,front-end,v3,46/46] gccrs: Add README, CONTRIBUTING and compiler logo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-47-arthur.cohen@embecosm.com/mbox/"},{"id":11156,"url":"https://patchwork.plctlab.org/api/1.2/patches/11156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1juZu+TsIub4jZj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-26T08:23:02","name":"c++: Fix excess precision related ICE on invalid binop [PR107382, PR107383]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1juZu+TsIub4jZj@tucnak/mbox/"},{"id":11172,"url":"https://patchwork.plctlab.org/api/1.2/patches/11172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com/","msgid":"<8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com>","list_archive_url":null,"date":"2022-10-26T09:46:06","name":"[OG12,committed] Handle operator new with alignment in USM transform","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com/mbox/"},{"id":11197,"url":"https://patchwork.plctlab.org/api/1.2/patches/11197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9321d38e-a185-5505-62a5-574d64446798@suse.cz/","msgid":"<9321d38e-a185-5505-62a5-574d64446798@suse.cz>","list_archive_url":null,"date":"2022-10-26T11:09:18","name":"docs: document sanitizers can trigger warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9321d38e-a185-5505-62a5-574d64446798@suse.cz/mbox/"},{"id":11207,"url":"https://patchwork.plctlab.org/api/1.2/patches/11207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026114052.17713-1-guojiufu@linux.ibm.com/","msgid":"<20221026114052.17713-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-26T11:40:52","name":"[V2] rs6000: Support to build constants by li/lis+oris/xoris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026114052.17713-1-guojiufu@linux.ibm.com/mbox/"},{"id":11219,"url":"https://patchwork.plctlab.org/api/1.2/patches/11219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zq4wgf.fsf@euler.schwinge.homeip.net/","msgid":"<87h6zq4wgf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-26T12:10:24","name":"Document '\''distclean-stage[N]'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zq4wgf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":11271,"url":"https://patchwork.plctlab.org/api/1.2/patches/11271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-10-26T13:46:47","name":"[PING] options: Clarify '\''Init'\'' option property usage for streaming optimization (was: [PATCH] options, lto: Optimize streaming of optimization nodes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":11279,"url":"https://patchwork.plctlab.org/api/1.2/patches/11279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4eb1be6-f004-3699-4657-42f98eef6480@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T13:49:36","name":"[COMMITTED] Check if varying may also be non-negative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4eb1be6-f004-3699-4657-42f98eef6480@redhat.com/mbox/"},{"id":11282,"url":"https://patchwork.plctlab.org/api/1.2/patches/11282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026135238.24678-1-amonakov@ispras.ru/","msgid":"<20221026135238.24678-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-10-26T13:52:38","name":"ipa-visibility: remove assert in TLS optimization [PR107353]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026135238.24678-1-amonakov@ispras.ru/mbox/"},{"id":11323,"url":"https://patchwork.plctlab.org/api/1.2/patches/11323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1lb4uJuWVdEF0x0@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T16:10:10","name":"[v3] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1lb4uJuWVdEF0x0@redhat.com/mbox/"},{"id":11341,"url":"https://patchwork.plctlab.org/api/1.2/patches/11341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1l77ThNE1f4jusN@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T18:26:53","name":"[v4] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1l77ThNE1f4jusN@redhat.com/mbox/"},{"id":11359,"url":"https://patchwork.plctlab.org/api/1.2/patches/11359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026185857.234023-1-hjl.tools@gmail.com/","msgid":"<20221026185857.234023-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-26T18:58:57","name":"x86: Replace ne:CCC/ne:CCO with UNSPEC_CC_NE in neg patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026185857.234023-1-hjl.tools@gmail.com/mbox/"},{"id":11406,"url":"https://patchwork.plctlab.org/api/1.2/patches/11406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8c1203c-bd17-4bfc-85c9-854076a1c363-1666811738919@3c-app-gmx-bap72/","msgid":"","list_archive_url":null,"date":"2022-10-26T19:15:38","name":"Fortran: BOZ literal constants are not compatible to any type [PR103413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8c1203c-bd17-4bfc-85c9-854076a1c363-1666811738919@3c-app-gmx-bap72/mbox/"},{"id":11407,"url":"https://patchwork.plctlab.org/api/1.2/patches/11407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026192311.12260-1-david.faust@oracle.com/","msgid":"<20221026192311.12260-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-26T19:23:11","name":"[v3] bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026192311.12260-1-david.faust@oracle.com/mbox/"},{"id":11439,"url":"https://patchwork.plctlab.org/api/1.2/patches/11439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026204005.1864136-1-dmalcolm@redhat.com/","msgid":"<20221026204005.1864136-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T20:40:05","name":"[v3] Add gcc/make-unique.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026204005.1864136-1-dmalcolm@redhat.com/mbox/"},{"id":11443,"url":"https://patchwork.plctlab.org/api/1.2/patches/11443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026211806.1866873-1-dmalcolm@redhat.com/","msgid":"<20221026211806.1866873-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T21:18:06","name":"[committed] analyzer: add sm-fd.dot","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026211806.1866873-1-dmalcolm@redhat.com/mbox/"},{"id":11444,"url":"https://patchwork.plctlab.org/api/1.2/patches/11444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026212300.1867175-1-dmalcolm@redhat.com/","msgid":"<20221026212300.1867175-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T21:23:00","name":"[committed] analyzer: fixes to file-descriptor handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026212300.1867175-1-dmalcolm@redhat.com/mbox/"},{"id":11447,"url":"https://patchwork.plctlab.org/api/1.2/patches/11447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026221226.9957A33E26@hamza.pair.com/","msgid":"<20221026221226.9957A33E26@hamza.pair.com>","list_archive_url":null,"date":"2022-10-26T22:12:23","name":"[committed] wwwdocs: style: Remove link to validator.w3.org in footer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026221226.9957A33E26@hamza.pair.com/mbox/"},{"id":11533,"url":"https://patchwork.plctlab.org/api/1.2/patches/11533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027033829.22918-1-mark@harmstone.com/","msgid":"<20221027033829.22918-1-mark@harmstone.com>","list_archive_url":null,"date":"2022-10-27T03:38:29","name":"[v2] Add -gcodeview option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027033829.22918-1-mark@harmstone.com/mbox/"},{"id":11620,"url":"https://patchwork.plctlab.org/api/1.2/patches/11620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc97e1d1-e256-d887-9a52-bef93e70d260@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-27T07:09:59","name":"testsuite: Adjust vect-bitfield-read-* with vect_shift and vect_long_long [PR107240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc97e1d1-e256-d887-9a52-bef93e70d260@linux.ibm.com/mbox/"},{"id":11638,"url":"https://patchwork.plctlab.org/api/1.2/patches/11638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o6fhwgbVZoh4Pe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-27T07:59:58","name":"libstdc++: std::to_chars std::{,b}float16_t support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o6fhwgbVZoh4Pe@tucnak/mbox/"},{"id":11639,"url":"https://patchwork.plctlab.org/api/1.2/patches/11639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o+hfO6L6AGXcE4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:17:09","name":"c++: Fix ICE on g++.dg/modules/adl-3_c.C [PR107379]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o+hfO6L6AGXcE4@tucnak/mbox/"},{"id":11644,"url":"https://patchwork.plctlab.org/api/1.2/patches/11644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39da44c-7a2f-3f24-0876-50aa1a28d33f@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:30:32","name":"[(pushed)] lto: do not load LTO stream for aliases [PR107418]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39da44c-7a2f-3f24-0876-50aa1a28d33f@suse.cz/mbox/"},{"id":11656,"url":"https://patchwork.plctlab.org/api/1.2/patches/11656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0954f7-b256-4b1a-3e6e-2464b22cca98@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:42:00","name":"lto-dump: modernize a bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0954f7-b256-4b1a-3e6e-2464b22cca98@suse.cz/mbox/"},{"id":11737,"url":"https://patchwork.plctlab.org/api/1.2/patches/11737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261AB4B9363DFAEE94800AD91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-27T10:51:24","name":"RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261AB4B9363DFAEE94800AD91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":11739,"url":"https://patchwork.plctlab.org/api/1.2/patches/11739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027105354.3151191-1-hongtao.liu@intel.com/","msgid":"<20221027105354.3151191-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-27T10:53:54","name":"[x86] Fix incorrect digit constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027105354.3151191-1-hongtao.liu@intel.com/mbox/"},{"id":11776,"url":"https://patchwork.plctlab.org/api/1.2/patches/11776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261ABB716605DE32EC2C58B91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-27T12:49:42","name":"[v2] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261ABB716605DE32EC2C58B91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":11796,"url":"https://patchwork.plctlab.org/api/1.2/patches/11796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmed2yhk.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-27T13:21:43","name":"[pushed] aarch64: Reinstate some uses of CONSTEXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmed2yhk.fsf@arm.com/mbox/"},{"id":11806,"url":"https://patchwork.plctlab.org/api/1.2/patches/11806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027144152.335455-1-juzhe.zhong@rivai.ai/","msgid":"<20221027144152.335455-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-27T14:41:52","name":"RISC-V: Change constexpr back to CONSTEXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027144152.335455-1-juzhe.zhong@rivai.ai/mbox/"},{"id":11835,"url":"https://patchwork.plctlab.org/api/1.2/patches/11835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1666883439-7725-1-git-send-email-apinski@marvell.com/","msgid":"<1666883439-7725-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-10-27T15:10:39","name":"Use simple_dce_from_worklist with match_simplify_replacement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1666883439-7725-1-git-send-email-apinski@marvell.com/mbox/"},{"id":11853,"url":"https://patchwork.plctlab.org/api/1.2/patches/11853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027153906.24773-1-polacek@redhat.com/","msgid":"<20221027153906.24773-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-27T15:39:06","name":"c++: -Wdangling-reference and system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027153906.24773-1-polacek@redhat.com/mbox/"},{"id":11855,"url":"https://patchwork.plctlab.org/api/1.2/patches/11855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa228d19-9f9a-7cda-ddb2-8ce6380bcbc2@acm.org/","msgid":"","list_archive_url":null,"date":"2022-10-27T16:00:39","name":"c++: Templated lambda mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa228d19-9f9a-7cda-ddb2-8ce6380bcbc2@acm.org/mbox/"},{"id":11876,"url":"https://patchwork.plctlab.org/api/1.2/patches/11876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027164750.97737-1-ppalka@redhat.com/","msgid":"<20221027164750.97737-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-27T16:47:50","name":"libstdc++: Implement ranges::cartesian_product_view from P2374R4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027164750.97737-1-ppalka@redhat.com/mbox/"},{"id":11894,"url":"https://patchwork.plctlab.org/api/1.2/patches/11894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com/","msgid":"<38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-27T17:30:11","name":"c++: libcpp: Support raw strings with newlines in directives [PR55971]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com/mbox/"},{"id":11907,"url":"https://patchwork.plctlab.org/api/1.2/patches/11907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027181125.1658982-1-christoph.muellner@vrull.eu/","msgid":"<20221027181125.1658982-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-10-27T18:11:25","name":"RISC-V: Add Zawrs ISA extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027181125.1658982-1-christoph.muellner@vrull.eu/mbox/"},{"id":12004,"url":"https://patchwork.plctlab.org/api/1.2/patches/12004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-2-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:42","name":"[v2,1/3] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-2-ben.boeckel@kitware.com/mbox/"},{"id":12002,"url":"https://patchwork.plctlab.org/api/1.2/patches/12002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-3-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:43","name":"[v2,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-3-ben.boeckel@kitware.com/mbox/"},{"id":12003,"url":"https://patchwork.plctlab.org/api/1.2/patches/12003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-4-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:44","name":"[v2,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-4-ben.boeckel@kitware.com/mbox/"},{"id":12018,"url":"https://patchwork.plctlab.org/api/1.2/patches/12018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da969aa1-aa99-74eb-3bbb-7b7bdd31cf38@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T00:38:27","name":"[committed] c: C2x enums with fixed underlying type [PR61469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da969aa1-aa99-74eb-3bbb-7b7bdd31cf38@codesourcery.com/mbox/"},{"id":12085,"url":"https://patchwork.plctlab.org/api/1.2/patches/12085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548761EC65B3DE7F66955887EC329@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T06:20:06","name":"i386: using __bf16 for AVX512BF16 intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548761EC65B3DE7F66955887EC329@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":12145,"url":"https://patchwork.plctlab.org/api/1.2/patches/12145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028080146.1586483-1-chenglulu@loongson.cn/","msgid":"<20221028080146.1586483-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-28T08:01:46","name":"[v3] LoongArch: Libvtv add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028080146.1586483-1-chenglulu@loongson.cn/mbox/"},{"id":12151,"url":"https://patchwork.plctlab.org/api/1.2/patches/12151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028083155.6628513A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028083155.6628513A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T08:31:54","name":"Adjust gcc.dg/vect/pr100756.c for V8SI and V16SI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028083155.6628513A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12153,"url":"https://patchwork.plctlab.org/api/1.2/patches/12153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261358467675A63EEE7B55D91329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-28T08:39:27","name":"[v3] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261358467675A63EEE7B55D91329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12157,"url":"https://patchwork.plctlab.org/api/1.2/patches/12157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8735b849h6.fsf@euler.schwinge.homeip.net/","msgid":"<8735b849h6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-28T08:51:17","name":"OpenACC: Don'\''t gang-privatize artificial variables [PR90115] (was: [PATCH] [og12] OpenACC: Don'\''t gang-privatize artificial variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8735b849h6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":12167,"url":"https://patchwork.plctlab.org/api/1.2/patches/12167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ucRnr9uUesOXnc@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-28T09:09:26","name":"[committed] openmp: Allow optional comma after directive-specifier in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ucRnr9uUesOXnc@tucnak/mbox/"},{"id":12168,"url":"https://patchwork.plctlab.org/api/1.2/patches/12168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1930502.usQuhbGJ8B@fomalhaut/","msgid":"<1930502.usQuhbGJ8B@fomalhaut>","list_archive_url":null,"date":"2022-10-28T09:10:29","name":"Restore RTL alias analysis for hard frame pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1930502.usQuhbGJ8B@fomalhaut/mbox/"},{"id":12169,"url":"https://patchwork.plctlab.org/api/1.2/patches/12169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028091500.2748920-1-torbjorn.svensson@foss.st.com/","msgid":"<20221028091500.2748920-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-28T09:15:01","name":"c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028091500.2748920-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":12248,"url":"https://patchwork.plctlab.org/api/1.2/patches/12248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB026166C70CCE09404AFC2B4891329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-28T12:34:08","name":"[v4] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB026166C70CCE09404AFC2B4891329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12264,"url":"https://patchwork.plctlab.org/api/1.2/patches/12264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:06:29","name":"tree-optimization/107435 - ICE with recurrence vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12265,"url":"https://patchwork.plctlab.org/api/1.2/patches/12265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:06:41","name":"tree-optimization/107447 - avoid hoisting returns-twice calls in LIM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12269,"url":"https://patchwork.plctlab.org/api/1.2/patches/12269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:22:46","name":"tree-optimization/107407 - wrong code with DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12341,"url":"https://patchwork.plctlab.org/api/1.2/patches/12341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028142754.145622-1-jwakely@redhat.com/","msgid":"<20221028142754.145622-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-28T14:27:54","name":"[committed] libstdc++: Fix allocator propagation in regex algorithms [PR107376]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028142754.145622-1-jwakely@redhat.com/mbox/"},{"id":12388,"url":"https://patchwork.plctlab.org/api/1.2/patches/12388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028151553.918472-1-jason@redhat.com/","msgid":"<20221028151553.918472-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-28T15:15:53","name":"[pushed] c++: apply friend attributes sooner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028151553.918472-1-jason@redhat.com/mbox/"},{"id":12448,"url":"https://patchwork.plctlab.org/api/1.2/patches/12448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrleozaov1.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T16:34:42","name":"[10/15,V3] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrleozaov1.fsf_-_@arm.com/mbox/"},{"id":12449,"url":"https://patchwork.plctlab.org/api/1.2/patches/12449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrh6znaolq.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T16:40:17","name":"[12/15,V3] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrh6znaolq.fsf_-_@arm.com/mbox/"},{"id":12531,"url":"https://patchwork.plctlab.org/api/1.2/patches/12531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-04843f20-2dab-41c6-87fa-c939f57d02b3-1666987979945@3c-app-gmx-bs25/","msgid":"","list_archive_url":null,"date":"2022-10-28T20:12:59","name":"Fortran: ordering of hidden procedure arguments [PR107441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-04843f20-2dab-41c6-87fa-c939f57d02b3-1666987979945@3c-app-gmx-bs25/mbox/"},{"id":12538,"url":"https://patchwork.plctlab.org/api/1.2/patches/12538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028204233.409310-1-polacek@redhat.com/","msgid":"<20221028204233.409310-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-28T20:42:33","name":"c++: Tweaks for -Wredundant-move [PR107363]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028204233.409310-1-polacek@redhat.com/mbox/"},{"id":12608,"url":"https://patchwork.plctlab.org/api/1.2/patches/12608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028235632.194108-1-jwakely@redhat.com/","msgid":"<20221028235632.194108-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-28T23:56:32","name":"[committed] libstdc++: Fix dangling reference in filesystem::path::filename()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028235632.194108-1-jwakely@redhat.com/mbox/"},{"id":12650,"url":"https://patchwork.plctlab.org/api/1.2/patches/12650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029065320.2561317-1-chenglulu@loongson.cn/","msgid":"<20221029065320.2561317-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T06:53:22","name":"[v4] Libvtv: Add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029065320.2561317-1-chenglulu@loongson.cn/mbox/"},{"id":12654,"url":"https://patchwork.plctlab.org/api/1.2/patches/12654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-2-chenglulu@loongson.cn/","msgid":"<20221029070524.2570782-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T07:05:24","name":"[v1,1/2] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-2-chenglulu@loongson.cn/mbox/"},{"id":12653,"url":"https://patchwork.plctlab.org/api/1.2/patches/12653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-3-chenglulu@loongson.cn/","msgid":"<20221029070524.2570782-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T07:05:25","name":"[v1,2/2] LoongArch: Add prefetch insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-3-chenglulu@loongson.cn/mbox/"},{"id":12658,"url":"https://patchwork.plctlab.org/api/1.2/patches/12658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029074131.1654166-1-ibuclaw@gdcproject.org/","msgid":"<20221029074131.1654166-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-10-29T07:41:31","name":"[committed] d: Make TARGET_D_MINFO_SECTION hooks in elfos.h the language default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029074131.1654166-1-ibuclaw@gdcproject.org/mbox/"},{"id":12663,"url":"https://patchwork.plctlab.org/api/1.2/patches/12663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029082755.781D833E4F@hamza.pair.com/","msgid":"<20221029082755.781D833E4F@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T08:27:52","name":"[committed] wwwdocs: contribute: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029082755.781D833E4F@hamza.pair.com/mbox/"},{"id":12668,"url":"https://patchwork.plctlab.org/api/1.2/patches/12668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYAP286MB0265EBD8D4F0E0E57E9EA44E91359@TYAP286MB0265.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-29T09:01:18","name":"[v5] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYAP286MB0265EBD8D4F0E0E57E9EA44E91359@TYAP286MB0265.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12697,"url":"https://patchwork.plctlab.org/api/1.2/patches/12697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21653628.EfDdHjke4D@fomalhaut/","msgid":"<21653628.EfDdHjke4D@fomalhaut>","list_archive_url":null,"date":"2022-10-29T12:14:23","name":"Repair --disable-sjlj-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21653628.EfDdHjke4D@fomalhaut/mbox/"},{"id":12725,"url":"https://patchwork.plctlab.org/api/1.2/patches/12725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150307.06C1433E4D@hamza.pair.com/","msgid":"<20221029150307.06C1433E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:03:04","name":"[committed] wwwdocs: bugs: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150307.06C1433E4D@hamza.pair.com/mbox/"},{"id":12726,"url":"https://patchwork.plctlab.org/api/1.2/patches/12726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150603.93D9C33E63@hamza.pair.com/","msgid":"<20221029150603.93D9C33E63@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:06:01","name":"[committed] wwwdocs: readings: Update Go-related links to new site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150603.93D9C33E63@hamza.pair.com/mbox/"},{"id":12727,"url":"https://patchwork.plctlab.org/api/1.2/patches/12727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150914.4FA8533E4C@hamza.pair.com/","msgid":"<20221029150914.4FA8533E4C@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:09:12","name":"[committed] wwwdocs: frontends: Adjust Sourceforge links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150914.4FA8533E4C@hamza.pair.com/mbox/"},{"id":12775,"url":"https://patchwork.plctlab.org/api/1.2/patches/12775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211510.8DC5333E4A@hamza.pair.com/","msgid":"<20221029211510.8DC5333E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:15:07","name":"[committed] wwwdocs: gcc-10: Update two developer.arm.com links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211510.8DC5333E4A@hamza.pair.com/mbox/"},{"id":12777,"url":"https://patchwork.plctlab.org/api/1.2/patches/12777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211820.18BD833E4D@hamza.pair.com/","msgid":"<20221029211820.18BD833E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:18:17","name":"[committed] wwwdocs: testing: Switch www.netlib.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211820.18BD833E4D@hamza.pair.com/mbox/"},{"id":12778,"url":"https://patchwork.plctlab.org/api/1.2/patches/12778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029213327.0296B33E55@hamza.pair.com/","msgid":"<20221029213327.0296B33E55@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:33:24","name":"[committed] wwwdocs: gcc-4.3: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029213327.0296B33E55@hamza.pair.com/mbox/"},{"id":12779,"url":"https://patchwork.plctlab.org/api/1.2/patches/12779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029214021.C993D33E4D@hamza.pair.com/","msgid":"<20221029214021.C993D33E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:40:20","name":"[committed] wwwdocs: projects: Remove extra slash at end of ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029214021.C993D33E4D@hamza.pair.com/mbox/"},{"id":13092,"url":"https://patchwork.plctlab.org/api/1.2/patches/13092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031011036.1158443-1-hongtao.liu@intel.com/","msgid":"<20221031011036.1158443-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-31T01:10:36","name":"[V2,x86] Fix incorrect digit constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031011036.1158443-1-hongtao.liu@intel.com/mbox/"},{"id":13093,"url":"https://patchwork.plctlab.org/api/1.2/patches/13093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031012310.1237451-1-hongtao.liu@intel.com/","msgid":"<20221031012310.1237451-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-31T01:23:10","name":"Enable more optimization for 32-bit/64-bit shrd/shld with imm shift count.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031012310.1237451-1-hongtao.liu@intel.com/mbox/"},{"id":13094,"url":"https://patchwork.plctlab.org/api/1.2/patches/13094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031014022.250112-1-juzhe.zhong@rivai.ai/","msgid":"<20221031014022.250112-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-31T01:40:22","name":"RISC-V: Fix RVV testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031014022.250112-1-juzhe.zhong@rivai.ai/mbox/"},{"id":13212,"url":"https://patchwork.plctlab.org/api/1.2/patches/13212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaQR7+ZB3JNvjWm9RGFsNSFH7uTgX0QYkxLiG=vdgJkxA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:14:04","name":"Update email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaQR7+ZB3JNvjWm9RGFsNSFH7uTgX0QYkxLiG=vdgJkxA@mail.gmail.com/mbox/"},{"id":13235,"url":"https://patchwork.plctlab.org/api/1.2/patches/13235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16485-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:53:08","name":"[1/2] middle-end: Add new tbranch optab to add support for bit-test-and-branch operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16485-tamar@arm.com/mbox/"},{"id":13236,"url":"https://patchwork.plctlab.org/api/1.2/patches/13236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3ThtA9vUT43aA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:53:50","name":"[2/2] AArch64 Support new tbranch optab.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3ThtA9vUT43aA@arm.com/mbox/"},{"id":13237,"url":"https://patchwork.plctlab.org/api/1.2/patches/13237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3Yxws77tZN9pN@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:54:11","name":"AArch64 Extend umov and sbfx patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3Yxws77tZN9pN@arm.com/mbox/"},{"id":13241,"url":"https://patchwork.plctlab.org/api/1.2/patches/13241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16240-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:56:42","name":"[1/8] middle-end: Recognize scalar reductions from bitfields and array_refs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16240-tamar@arm.com/mbox/"},{"id":13239,"url":"https://patchwork.plctlab.org/api/1.2/patches/13239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4GFnUyuwSK1hy@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:57:12","name":"[2/8] middle-end: Recognize scalar widening reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4GFnUyuwSK1hy@arm.com/mbox/"},{"id":13240,"url":"https://patchwork.plctlab.org/api/1.2/patches/13240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4Nu1ryQIKoOQA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:57:42","name":"[3/8] middle-end: Support extractions of subvectors from arbitrary element position inside a vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4Nu1ryQIKoOQA@arm.com/mbox/"},{"id":13242,"url":"https://patchwork.plctlab.org/api/1.2/patches/13242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4UYIESInTYiGq@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:58:09","name":"[4/8] AArch64 aarch64: Implement widening reduction patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4UYIESInTYiGq@arm.com/mbox/"},{"id":13244,"url":"https://patchwork.plctlab.org/api/1.2/patches/13244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4euF0rUwFIjTL@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:58:50","name":"[5/8] AArch64 aarch64: Make existing V2HF be usable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4euF0rUwFIjTL@arm.com/mbox/"},{"id":13243,"url":"https://patchwork.plctlab.org/api/1.2/patches/13243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4kpUXZfolj+cr@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:59:14","name":"[6/8] AArch64: Add peephole and scheduling logic for pairwise operations that appear late in RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4kpUXZfolj+cr@arm.com/mbox/"},{"id":13245,"url":"https://patchwork.plctlab.org/api/1.2/patches/13245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4qItMrQHbdqqD@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:59:36","name":"[7/8] AArch64: Consolidate zero and sign extension patterns and add missing ones.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4qItMrQHbdqqD@arm.com/mbox/"},{"id":13246,"url":"https://patchwork.plctlab.org/api/1.2/patches/13246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+41nrRB4ZMXZZA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T12:00:22","name":"[8/8] AArch64: Have reload not choose to do add on the scalar side if both values exist on the SIMD side.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+41nrRB4ZMXZZA@arm.com/mbox/"},{"id":13263,"url":"https://patchwork.plctlab.org/api/1.2/patches/13263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com/","msgid":"<7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T13:02:59","name":"[committed] amdgcn: Silence unused parameter warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com/mbox/"},{"id":13265,"url":"https://patchwork.plctlab.org/api/1.2/patches/13265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0c50451-2b18-7bea-4fed-f3c94192d35a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T13:03:07","name":"[committed] amdgcn: multi-size vector reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0c50451-2b18-7bea-4fed-f3c94192d35a@codesourcery.com/mbox/"},{"id":13264,"url":"https://patchwork.plctlab.org/api/1.2/patches/13264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com/","msgid":"<500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T13:03:13","name":"[committed] amdgcn: add fmin/fmax patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com/mbox/"},{"id":13272,"url":"https://patchwork.plctlab.org/api/1.2/patches/13272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com/","msgid":"<51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T14:46:25","name":"OpenMP/Fortran: '\''target update'\'' with strides + DT components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-10/mbox/"},{"id":5,"url":"https://patchwork.plctlab.org/api/1.2/bundles/5/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-09/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-09","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":1175,"url":"https://patchwork.plctlab.org/api/1.2/patches/1175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9f0c5c3-235c-26b3-f884-daf761ec16a1@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T07:15:14","name":"[committed] libgomp.texi: move item from gcn to nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9f0c5c3-235c-26b3-f884-daf761ec16a1@codesourcery.com/mbox/"},{"id":1176,"url":"https://patchwork.plctlab.org/api/1.2/patches/1176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth71b65ip.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T08:30:06","name":"[pushed] aarch64: Disassociate ls64 from simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth71b65ip.fsf@arm.com/mbox/"},{"id":1177,"url":"https://patchwork.plctlab.org/api/1.2/patches/1177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkrj65hr.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T08:30:40","name":"[pushed] aarch64: Vector move fixes for +nosimd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkrj65hr.fsf@arm.com/mbox/"},{"id":1178,"url":"https://patchwork.plctlab.org/api/1.2/patches/1178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085150.0F518139B3@imap2.suse-dmz.suse.de/","msgid":"<20220913085150.0F518139B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-13T08:51:49","name":"tree-optimization/106913 - ICE with -da and -Wuninitialized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085150.0F518139B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1179,"url":"https://patchwork.plctlab.org/api/1.2/patches/1179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de/","msgid":"<20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-13T08:52:03","name":"middle-end/106909 - CTRL altering flag after folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1180,"url":"https://patchwork.plctlab.org/api/1.2/patches/1180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913093616.1422179-1-jiawei@iscas.ac.cn/","msgid":"<20220913093616.1422179-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-09-13T09:36:16","name":"[V2] RISC-V:Add '\''-m[no]-csr-check'\'' option in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913093616.1422179-1-jiawei@iscas.ac.cn/mbox/"},{"id":1181,"url":"https://patchwork.plctlab.org/api/1.2/patches/1181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com/","msgid":"<020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T09:56:58","name":"PR target/106877: Robustify reg-stack to malformed asm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com/mbox/"},{"id":1182,"url":"https://patchwork.plctlab.org/api/1.2/patches/1182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com/","msgid":"<62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com>","list_archive_url":null,"date":"2022-09-13T11:03:35","name":"[OG12] openmp: Fix handling of target constructs in static member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com/mbox/"},{"id":1183,"url":"https://patchwork.plctlab.org/api/1.2/patches/1183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913114538.2741902-1-ppalka@redhat.com/","msgid":"<20220913114538.2741902-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-13T11:45:38","name":"c++: some missing-SFINAE fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913114538.2741902-1-ppalka@redhat.com/mbox/"},{"id":1184,"url":"https://patchwork.plctlab.org/api/1.2/patches/1184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913142118.3183120-1-ppalka@redhat.com/","msgid":"<20220913142118.3183120-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-13T14:21:18","name":"[committed] c++: remove single-parameter version of mark_used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913142118.3183120-1-ppalka@redhat.com/mbox/"},{"id":1185,"url":"https://patchwork.plctlab.org/api/1.2/patches/1185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913153237.305471-1-xry111@xry111.site/","msgid":"<20220913153237.305471-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-13T15:32:37","name":"LoongArch: Prepare static PIE support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913153237.305471-1-xry111@xry111.site/mbox/"},{"id":1186,"url":"https://patchwork.plctlab.org/api/1.2/patches/1186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyCy9OxAaLBDi+1V@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-13T16:42:28","name":"c++: Implement C++23 P1169R4 - static operator() [PR106651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyCy9OxAaLBDi+1V@tucnak/mbox/"},{"id":1187,"url":"https://patchwork.plctlab.org/api/1.2/patches/1187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyC4X5weKJ5HpmpZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-13T17:05:35","name":"[committed] libgomp: Appease some static analyzers [PR106906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyC4X5weKJ5HpmpZ@tucnak/mbox/"},{"id":1188,"url":"https://patchwork.plctlab.org/api/1.2/patches/1188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com/","msgid":"<000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T17:54:58","name":"PR tree-optimization/71343: Value number X<<2 as X*4.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com/mbox/"},{"id":1189,"url":"https://patchwork.plctlab.org/api/1.2/patches/1189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002d01d8c79f$dc5fe830$951fb890$@nextmovesoftware.com/","msgid":"<002d01d8c79f$dc5fe830$951fb890$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T18:37:20","name":"Optimize (X<","list_archive_url":null,"date":"2022-09-13T21:01:42","name":"[v3,01/11] OpenMP 5.0: Clause ordering for OpenMP 5.0 (topological sorting by base pointer)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/839df7d51e5bf6f29054e83b3c017f57df5c1149.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1190,"url":"https://patchwork.plctlab.org/api/1.2/patches/1190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com/","msgid":"<13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:01:43","name":"[v3,02/11] Remove omp_target_reorder_clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1192,"url":"https://patchwork.plctlab.org/api/1.2/patches/1192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com/","msgid":"<76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:01:44","name":"[v3,03/11] OpenMP/OpenACC struct sibling list gimplification extension and rework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1193,"url":"https://patchwork.plctlab.org/api/1.2/patches/1193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2f84c39600751588e8cf4a7809f5644055fa727.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:01:45","name":"[v3,04/11] OpenMP/OpenACC: mapping group list-handling improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2f84c39600751588e8cf4a7809f5644055fa727.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1194,"url":"https://patchwork.plctlab.org/api/1.2/patches/1194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com/","msgid":"<479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:15","name":"[v3,05/11] OpenMP: push attaches to end of clause list in \"target\" regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1197,"url":"https://patchwork.plctlab.org/api/1.2/patches/1197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3be658301113143e5ff5efea74e46ea6efc3e5f.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:03:16","name":"[v3,06/11] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3be658301113143e5ff5efea74e46ea6efc3e5f.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1195,"url":"https://patchwork.plctlab.org/api/1.2/patches/1195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com/","msgid":"<4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:17","name":"[v3,07/11] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1199,"url":"https://patchwork.plctlab.org/api/1.2/patches/1199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1d4786dbfd1f5cd31f809dfc713478e44c5232b.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:03:18","name":"[v3,08/11] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1d4786dbfd1f5cd31f809dfc713478e44c5232b.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1196,"url":"https://patchwork.plctlab.org/api/1.2/patches/1196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com/","msgid":"<1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:19","name":"[v3,09/11] FYI/unfinished: OpenMP: lvalue parsing for map clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1200,"url":"https://patchwork.plctlab.org/api/1.2/patches/1200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c2a998d8013d8d5b7abd56729b1ecf13c397a6.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:04:29","name":"[v3,10/11] Use OMP_ARRAY_SECTION instead of TREE_LIST in C++ FE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c2a998d8013d8d5b7abd56729b1ecf13c397a6.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1198,"url":"https://patchwork.plctlab.org/api/1.2/patches/1198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com/","msgid":"<2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:04:30","name":"[v3,11/11] FYI/unfinished: OpenMP 5.0 \"declare mapper\" support for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1201,"url":"https://patchwork.plctlab.org/api/1.2/patches/1201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913215743.2712390-1-jcmvbkbc@gmail.com/","msgid":"<20220913215743.2712390-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-09-13T21:57:43","name":"xtensa: gcc: implement MI thunk generation for call0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913215743.2712390-1-jcmvbkbc@gmail.com/mbox/"},{"id":1202,"url":"https://patchwork.plctlab.org/api/1.2/patches/1202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914012511.1012154-1-hongtao.liu@intel.com/","msgid":"<20220914012511.1012154-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-14T01:25:11","name":"[ICE] Check another epilog variable peeling case in vectorizable_nonlinear_induction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914012511.1012154-1-hongtao.liu@intel.com/mbox/"},{"id":1203,"url":"https://patchwork.plctlab.org/api/1.2/patches/1203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyGGD/5HXAXh13N0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-14T07:43:11","name":"Disallow pointer operands for |, ^ and partly & [PR106878]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyGGD/5HXAXh13N0@tucnak/mbox/"},{"id":1204,"url":"https://patchwork.plctlab.org/api/1.2/patches/1204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914095705.00384134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914095705.00384134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T09:57:04","name":"tree-optimization/106934 - avoid BIT_FIELD_REF of bitfields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914095705.00384134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1205,"url":"https://patchwork.plctlab.org/api/1.2/patches/1205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914121921.j46kmn2btdwmj3sc@lug-owl.de/","msgid":"<20220914121921.j46kmn2btdwmj3sc@lug-owl.de>","list_archive_url":null,"date":"2022-09-14T12:19:21","name":"[COMMITTED] Fix unused variable warning (was: [PATCH 1/3] STABS: remove -gstabs and -gxcoff functionality)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914121921.j46kmn2btdwmj3sc@lug-owl.de/mbox/"},{"id":1206,"url":"https://patchwork.plctlab.org/api/1.2/patches/1206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914124935.1221658-1-aldyh@redhat.com/","msgid":"<20220914124935.1221658-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T12:49:35","name":"[COMMITTED,PR106936] Remove assert from get_value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914124935.1221658-1-aldyh@redhat.com/mbox/"},{"id":1207,"url":"https://patchwork.plctlab.org/api/1.2/patches/1207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914125001.E5607134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914125001.E5607134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T12:50:01","name":"tree-optimization/106938 - cleanup abnormal edges after inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914125001.E5607134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1208,"url":"https://patchwork.plctlab.org/api/1.2/patches/1208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914140656.640BF134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914140656.640BF134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T14:06:55","name":"Move void_list_node init to common code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914140656.640BF134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1209,"url":"https://patchwork.plctlab.org/api/1.2/patches/1209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914141900.3489407-1-ppalka@redhat.com/","msgid":"<20220914141900.3489407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-14T14:19:00","name":"libstdc++: Implement ranges::chunk_by_view from P2443R1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914141900.3489407-1-ppalka@redhat.com/mbox/"},{"id":1210,"url":"https://patchwork.plctlab.org/api/1.2/patches/1210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rmm82c5.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T14:20:26","name":"[10/15,V2] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rmm82c5.fsf_-_@arm.com/mbox/"},{"id":1215,"url":"https://patchwork.plctlab.org/api/1.2/patches/1215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-1-aldyh@redhat.com/","msgid":"<20220914150852.1244397-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:48","name":"[COMMITTED] Minor fixes to frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-1-aldyh@redhat.com/mbox/"},{"id":1214,"url":"https://patchwork.plctlab.org/api/1.2/patches/1214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-2-aldyh@redhat.com/","msgid":"<20220914150852.1244397-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:49","name":"[COMMITTED] Provide cleaner set_nan(), clear_nan(), and update_nan() methods.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-2-aldyh@redhat.com/mbox/"},{"id":1211,"url":"https://patchwork.plctlab.org/api/1.2/patches/1211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-3-aldyh@redhat.com/","msgid":"<20220914150852.1244397-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:50","name":"[COMMITTED] Use frange::set_nan() from the generic frange::set().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-3-aldyh@redhat.com/mbox/"},{"id":1213,"url":"https://patchwork.plctlab.org/api/1.2/patches/1213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-4-aldyh@redhat.com/","msgid":"<20220914150852.1244397-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:51","name":"[COMMITTED] Pass full range to build_* in range-op-float.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-4-aldyh@redhat.com/mbox/"},{"id":1212,"url":"https://patchwork.plctlab.org/api/1.2/patches/1212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-5-aldyh@redhat.com/","msgid":"<20220914150852.1244397-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:52","name":"[COMMITTED] frange: add both zeros to ranges when there'\''s the possiblity of equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-5-aldyh@redhat.com/mbox/"},{"id":1216,"url":"https://patchwork.plctlab.org/api/1.2/patches/1216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com/","msgid":"<8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com>","list_archive_url":null,"date":"2022-09-14T17:22:08","name":"[_GLIBCXX_INLINE_VERSION] Cleanup gnu-versioned-namespace.ver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com/mbox/"},{"id":1217,"url":"https://patchwork.plctlab.org/api/1.2/patches/1217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com/","msgid":"<99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com>","list_archive_url":null,"date":"2022-09-14T17:26:16","name":"[_GLIBCXX_INLINE_VERSION] Fix test dg-prune-output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com/mbox/"},{"id":1218,"url":"https://patchwork.plctlab.org/api/1.2/patches/1218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d354aa-07ef-5e3a-991e-deba88ee0175@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T17:31:34","name":"OpenMP: Enable vectorization in all OpenMP loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d354aa-07ef-5e3a-991e-deba88ee0175@codesourcery.com/mbox/"},{"id":1219,"url":"https://patchwork.plctlab.org/api/1.2/patches/1219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com/","msgid":"<0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com>","list_archive_url":null,"date":"2022-09-14T17:32:11","name":"OpenMP: Generate SIMD clones for functions with \"declare target\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com/mbox/"},{"id":1220,"url":"https://patchwork.plctlab.org/api/1.2/patches/1220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANP1oa0QMfUCRwGpP46Hz3xz9CsHEkHdMJXJ5sv+92-boR3u5Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T18:09:56","name":"mips: Add appropriate linker flags when compiling with -static-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANP1oa0QMfUCRwGpP46Hz3xz9CsHEkHdMJXJ5sv+92-boR3u5Q@mail.gmail.com/mbox/"},{"id":1221,"url":"https://patchwork.plctlab.org/api/1.2/patches/1221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182315.263596-1-jwakely@redhat.com/","msgid":"<20220914182315.263596-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:15","name":"[committed] libstdc++: Document LWG 1203 API change in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182315.263596-1-jwakely@redhat.com/mbox/"},{"id":1223,"url":"https://patchwork.plctlab.org/api/1.2/patches/1223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182329.263649-1-jwakely@redhat.com/","msgid":"<20220914182329.263649-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:29","name":"[committed] libstdc++: Add assertion to std::promise::set_exception (LWG 2276)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182329.263649-1-jwakely@redhat.com/mbox/"},{"id":1222,"url":"https://patchwork.plctlab.org/api/1.2/patches/1222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182337.263664-1-jwakely@redhat.com/","msgid":"<20220914182337.263664-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:37","name":"[committed] libstdc++: Add comment to 17_intro/names.cc test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182337.263664-1-jwakely@redhat.com/mbox/"},{"id":1224,"url":"https://patchwork.plctlab.org/api/1.2/patches/1224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220435.276306-1-jwakely@redhat.com/","msgid":"<20220914220435.276306-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T22:04:35","name":"[committed] libstdc++: Add missing header to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220435.276306-1-jwakely@redhat.com/mbox/"},{"id":1225,"url":"https://patchwork.plctlab.org/api/1.2/patches/1225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220449.276340-1-jwakely@redhat.com/","msgid":"<20220914220449.276340-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T22:04:49","name":"[committed] libstdc++: Add TSan annotations to std::atomic>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220449.276340-1-jwakely@redhat.com/mbox/"},{"id":1226,"url":"https://patchwork.plctlab.org/api/1.2/patches/1226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209142301140.3158477@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-14T23:02:00","name":"float.h: Do not define INFINITY for C2x when infinities not supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209142301140.3158477@digraph.polyomino.org.uk/mbox/"},{"id":1227,"url":"https://patchwork.plctlab.org/api/1.2/patches/1227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548726F51948DD72BB8532B8EC499@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-15T03:36:19","name":"i386: Fixed vec_init_dup_v16bf [PR106887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548726F51948DD72BB8532B8EC499@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":1228,"url":"https://patchwork.plctlab.org/api/1.2/patches/1228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915054026.1359564-1-aldyh@redhat.com/","msgid":"<20220915054026.1359564-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-15T05:40:27","name":"Rewrite NAN and sign handling in frange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915054026.1359564-1-aldyh@redhat.com/mbox/"},{"id":1229,"url":"https://patchwork.plctlab.org/api/1.2/patches/1229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915065416.1172508-1-torbjorn.svensson@foss.st.com/","msgid":"<20220915065416.1172508-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-15T06:54:16","name":"testsuite: Disable zero-scratch-regs-{7, 9, 11}.c on arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915065416.1172508-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1230,"url":"https://patchwork.plctlab.org/api/1.2/patches/1230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915082853.109235-1-juzhe.zhong@rivai.ai/","msgid":"<20220915082853.109235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T08:28:53","name":"RISC-V: Support poly move manipulation and selftests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915082853.109235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1231,"url":"https://patchwork.plctlab.org/api/1.2/patches/1231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915083052.74903-1-guojiufu@linux.ibm.com/","msgid":"<20220915083052.74903-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-09-15T08:30:52","name":"rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915083052.74903-1-guojiufu@linux.ibm.com/mbox/"},{"id":1232,"url":"https://patchwork.plctlab.org/api/1.2/patches/1232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915084130.130148-1-juzhe.zhong@rivai.ai/","msgid":"<20220915084130.130148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T08:41:30","name":"RISC-V: Add RVV machine modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915084130.130148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1233,"url":"https://patchwork.plctlab.org/api/1.2/patches/1233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113730.19569-1-julian@codesourcery.com/","msgid":"<20220915113730.19569-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-15T11:37:30","name":"Fix c-c++-common/goacc/mdc-2.c and g++.dg/goacc/mdc.C tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113730.19569-1-julian@codesourcery.com/mbox/"},{"id":1234,"url":"https://patchwork.plctlab.org/api/1.2/patches/1234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113943.264538-1-juzhe.zhong@rivai.ai/","msgid":"<20220915113943.264538-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T11:39:43","name":"RISC-V: Add RVV machine modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113943.264538-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1235,"url":"https://patchwork.plctlab.org/api/1.2/patches/1235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915120224.56342-1-julian@codesourcery.com/","msgid":"<20220915120224.56342-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-15T12:02:24","name":"Fix c-c++-common/gomp/target-50.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915120224.56342-1-julian@codesourcery.com/mbox/"},{"id":1236,"url":"https://patchwork.plctlab.org/api/1.2/patches/1236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de/","msgid":"<20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-15T12:23:14","name":"tree-optimization/106922 - PRE and virtual operand translation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de/mbox/"},{"id":1237,"url":"https://patchwork.plctlab.org/api/1.2/patches/1237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915125234.1180957-1-torbjorn.svensson@foss.st.com/","msgid":"<20220915125234.1180957-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-15T12:52:35","name":"[pushed] MAINTAINERS: Add myself to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915125234.1180957-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1238,"url":"https://patchwork.plctlab.org/api/1.2/patches/1238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915155822.4021344-1-ppalka@redhat.com/","msgid":"<20220915155822.4021344-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T15:58:22","name":"c++: constraint matching, TEMPLATE_ID_EXPR, current inst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915155822.4021344-1-ppalka@redhat.com/mbox/"},{"id":1239,"url":"https://patchwork.plctlab.org/api/1.2/patches/1239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915180312.1596193-1-ppalka@redhat.com/","msgid":"<20220915180312.1596193-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T18:03:12","name":"c++: '\''mutable'\'' within constexpr [PR92505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915180312.1596193-1-ppalka@redhat.com/mbox/"},{"id":1240,"url":"https://patchwork.plctlab.org/api/1.2/patches/1240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915201627.2942314-1-ppalka@redhat.com/","msgid":"<20220915201627.2942314-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T20:16:27","name":"c++: modules ICE with typename friend declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915201627.2942314-1-ppalka@redhat.com/mbox/"},{"id":1241,"url":"https://patchwork.plctlab.org/api/1.2/patches/1241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-677b8c14-ffe9-47f3-a4e6-6a6286f00ea4-1663273406376@3c-app-gmx-bs69/","msgid":"","list_archive_url":null,"date":"2022-09-15T20:23:26","name":"[committed] Fortran: error recovery for bad deferred character length assignment [PR104314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-677b8c14-ffe9-47f3-a4e6-6a6286f00ea4-1663273406376@3c-app-gmx-bs69/mbox/"},{"id":1242,"url":"https://patchwork.plctlab.org/api/1.2/patches/1242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915204623.407931-1-jwakely@redhat.com/","msgid":"<20220915204623.407931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-15T20:46:23","name":"[committed] libstdc++: Tweak TSan annotations for std::atomic>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915204623.407931-1-jwakely@redhat.com/mbox/"},{"id":1243,"url":"https://patchwork.plctlab.org/api/1.2/patches/1243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6f4abfa3-3785-43e9-a9e9-2c4de9afa4ba-1663275092004@3c-app-gmx-bs27/","msgid":"","list_archive_url":null,"date":"2022-09-15T20:51:32","name":"[committed] Fortran: catch NULL pointer dereferences while simplifying PACK [PR106857]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6f4abfa3-3785-43e9-a9e9-2c4de9afa4ba-1663275092004@3c-app-gmx-bs27/mbox/"},{"id":1244,"url":"https://patchwork.plctlab.org/api/1.2/patches/1244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915225856.413536-1-jwakely@redhat.com/","msgid":"<20220915225856.413536-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-15T22:58:56","name":"[committed] libstdc++: Remove unnecessary header from ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915225856.413536-1-jwakely@redhat.com/mbox/"},{"id":1245,"url":"https://patchwork.plctlab.org/api/1.2/patches/1245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916005443.3305032-1-hongtao.liu@intel.com/","msgid":"<20220916005443.3305032-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T00:54:43","name":"Modernize ix86_builtin_vectorized_function with corresponding expanders.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916005443.3305032-1-hongtao.liu@intel.com/mbox/"},{"id":1246,"url":"https://patchwork.plctlab.org/api/1.2/patches/1246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916010659.37555-1-hongtao.liu@intel.com/","msgid":"<20220916010659.37555-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T01:06:59","name":"[x86] Don'\''t optimize cmp mem, 0 to load mem, reg + test reg, reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916010659.37555-1-hongtao.liu@intel.com/mbox/"},{"id":1247,"url":"https://patchwork.plctlab.org/api/1.2/patches/1247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916060052.48335-1-hongtao.liu@intel.com/","msgid":"<20220916060052.48335-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T06:00:52","name":"[x86] Adjust issue_rate for latest Intel processors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916060052.48335-1-hongtao.liu@intel.com/mbox/"},{"id":1248,"url":"https://patchwork.plctlab.org/api/1.2/patches/1248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilln4uo0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-16T07:58:55","name":"vect: Fix missed gather load opportunity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilln4uo0.fsf@arm.com/mbox/"},{"id":1249,"url":"https://patchwork.plctlab.org/api/1.2/patches/1249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbv4udm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-16T08:05:09","name":"vect: Fix SLP layout handling of masked loads [PR106794]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbv4udm.fsf@arm.com/mbox/"},{"id":1250,"url":"https://patchwork.plctlab.org/api/1.2/patches/1250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916100608.491243-1-jwakely@redhat.com/","msgid":"<20220916100608.491243-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T10:06:08","name":"[committed] libstdc++: Document new libstdc++.so symbol versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916100608.491243-1-jwakely@redhat.com/mbox/"},{"id":1251,"url":"https://patchwork.plctlab.org/api/1.2/patches/1251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de/","msgid":"<2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de>","list_archive_url":null,"date":"2022-09-16T10:19:36","name":"[v4] eliminate mutex in fast path of __register_frame","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de/mbox/"},{"id":1252,"url":"https://patchwork.plctlab.org/api/1.2/patches/1252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916122314.3826744-1-yunqiang.su@cipunited.com/","msgid":"<20220916122314.3826744-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2022-09-16T12:23:14","name":"[v2] MIPS: improve -march=native arch detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916122314.3826744-1-yunqiang.su@cipunited.com/mbox/"},{"id":1253,"url":"https://patchwork.plctlab.org/api/1.2/patches/1253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916124240.176613-1-jason@redhat.com/","msgid":"<20220916124240.176613-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-16T12:42:40","name":"[pushed] c++: member fn in omp loc list [PR106858]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916124240.176613-1-jason@redhat.com/mbox/"},{"id":1254,"url":"https://patchwork.plctlab.org/api/1.2/patches/1254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161759.510516-1-jwakely@redhat.com/","msgid":"<20220916161759.510516-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:17:59","name":"[committed] libstdc++: Fix Doxygen commands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161759.510516-1-jwakely@redhat.com/mbox/"},{"id":1256,"url":"https://patchwork.plctlab.org/api/1.2/patches/1256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161814.510563-1-jwakely@redhat.com/","msgid":"<20220916161814.510563-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:14","name":"[committed] libstdc++: Remove __alloc_neq helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161814.510563-1-jwakely@redhat.com/mbox/"},{"id":1255,"url":"https://patchwork.plctlab.org/api/1.2/patches/1255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161826.510606-1-jwakely@redhat.com/","msgid":"<20220916161826.510606-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:26","name":"[committed] libstdc++: Do not use nullptr in C++03-compatible code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161826.510606-1-jwakely@redhat.com/mbox/"},{"id":1257,"url":"https://patchwork.plctlab.org/api/1.2/patches/1257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161857.510663-1-jwakely@redhat.com/","msgid":"<20220916161857.510663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:57","name":"[committed] libstdc++: Fix tr1::variate_generator::engine_value_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161857.510663-1-jwakely@redhat.com/mbox/"},{"id":1258,"url":"https://patchwork.plctlab.org/api/1.2/patches/1258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916184922.3274016-1-slyich@gmail.com/","msgid":"<20220916184922.3274016-1-slyich@gmail.com>","list_archive_url":null,"date":"2022-09-16T18:49:22","name":"gcc/config/t-i386: add build dependencies on i386-builtin-types.inc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916184922.3274016-1-slyich@gmail.com/mbox/"},{"id":1259,"url":"https://patchwork.plctlab.org/api/1.2/patches/1259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916202127.579816-1-jwakely@redhat.com/","msgid":"<20220916202127.579816-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T20:21:27","name":"[committed] libstdc++: Fix compare_exchange_padding.cc test for std::atomic_ref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916202127.579816-1-jwakely@redhat.com/mbox/"},{"id":1360,"url":"https://patchwork.plctlab.org/api/1.2/patches/1360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105053.E298E1346B@imap2.suse-dmz.suse.de/","msgid":"<20220922105053.E298E1346B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T10:50:53","name":"tree-optimization/99407 - DSE with data-ref analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105053.E298E1346B@imap2.suse-dmz.suse.de/mbox/"},{"id":1361,"url":"https://patchwork.plctlab.org/api/1.2/patches/1361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105533.1837026-1-jcmvbkbc@gmail.com/","msgid":"<20220922105533.1837026-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-09-22T10:55:33","name":"[COMMITTED] xtensa: gcc: enable section anchors support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105533.1837026-1-jcmvbkbc@gmail.com/mbox/"},{"id":1362,"url":"https://patchwork.plctlab.org/api/1.2/patches/1362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de/","msgid":"<20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T11:10:08","name":"tree-optimization/106922 - missed FRE/PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de/mbox/"},{"id":1363,"url":"https://patchwork.plctlab.org/api/1.2/patches/1363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz/","msgid":"<5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz>","list_archive_url":null,"date":"2022-09-22T11:10:46","name":"remove -gz=zlib-gnu option value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz/mbox/"},{"id":1364,"url":"https://patchwork.plctlab.org/api/1.2/patches/1364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz/","msgid":"<3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz>","list_archive_url":null,"date":"2022-09-22T12:26:39","name":"[v2] remove -gz=zlib-gnu option value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz/mbox/"},{"id":1365,"url":"https://patchwork.plctlab.org/api/1.2/patches/1365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz/","msgid":"<19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz>","list_archive_url":null,"date":"2022-09-22T12:51:05","name":"support -gz=zstd for both linker and assembler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz/mbox/"},{"id":1366,"url":"https://patchwork.plctlab.org/api/1.2/patches/1366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz/","msgid":"<8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz>","list_archive_url":null,"date":"2022-09-22T13:04:47","name":"[DOCS] changes: mentioned ignore -gz=zlib-gnu option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz/mbox/"},{"id":1367,"url":"https://patchwork.plctlab.org/api/1.2/patches/1367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de/","msgid":"<20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T13:19:38","name":"tree-optimization/102801 - testcase for uninit diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de/mbox/"},{"id":1368,"url":"https://patchwork.plctlab.org/api/1.2/patches/1368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVBpzhKda=cjGc5qo=bYESO_zcfpt3Ba6GUQNXNBPMLjA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T13:28:29","name":"libgo patch committed: Add cgo.Incomplete","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVBpzhKda=cjGc5qo=bYESO_zcfpt3Ba6GUQNXNBPMLjA@mail.gmail.com/mbox/"},{"id":1369,"url":"https://patchwork.plctlab.org/api/1.2/patches/1369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922133900.142238-1-polacek@redhat.com/","msgid":"<20220922133900.142238-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-22T13:39:00","name":"c++: Implement __is_{nothrow_,}convertible [PR106784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922133900.142238-1-polacek@redhat.com/mbox/"},{"id":1370,"url":"https://patchwork.plctlab.org/api/1.2/patches/1370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz/","msgid":"<744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz>","list_archive_url":null,"date":"2022-09-22T13:58:53","name":"opts: fix --help=common with '\''\\t'\'' description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz/mbox/"},{"id":1371,"url":"https://patchwork.plctlab.org/api/1.2/patches/1371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-1-jwakely@redhat.com/","msgid":"<20220922142353.1139862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:23:52","name":"[committed,1/2] libstdc++: Rearrange tests for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-1-jwakely@redhat.com/mbox/"},{"id":1372,"url":"https://patchwork.plctlab.org/api/1.2/patches/1372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-2-jwakely@redhat.com/","msgid":"<20220922142353.1139862-2-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:23:53","name":"[committed,2/2] libstdc++: Implement constexpr std::bitset for C++23 (P2417R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-2-jwakely@redhat.com/mbox/"},{"id":1373,"url":"https://patchwork.plctlab.org/api/1.2/patches/1373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142515.1140135-1-jwakely@redhat.com/","msgid":"<20220922142515.1140135-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:25:15","name":"[committed] libiberty: Refer to Bugzilla in README","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142515.1140135-1-jwakely@redhat.com/mbox/"},{"id":1374,"url":"https://patchwork.plctlab.org/api/1.2/patches/1374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMXYATzMsLq2-YSHfA+pFTrM376Fn=E3iQ=Z4N3FRu-EPA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T15:02:19","name":"TYPE_{MIN/MAX}_VALUE for floats?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMXYATzMsLq2-YSHfA+pFTrM376Fn=E3iQ=Z4N3FRu-EPA@mail.gmail.com/mbox/"},{"id":1375,"url":"https://patchwork.plctlab.org/api/1.2/patches/1375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyyFs7w3npTxkci7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-22T15:56:35","name":"[RFC] __trunc{tf,xf,df,sf,hf}bf2, __truncbfhf2 and __extendbfsf2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyyFs7w3npTxkci7@tucnak/mbox/"},{"id":1376,"url":"https://patchwork.plctlab.org/api/1.2/patches/1376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164057.4107373-1-torbjorn.svensson@foss.st.com/","msgid":"<20220922164057.4107373-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-22T16:40:58","name":"testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164057.4107373-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1377,"url":"https://patchwork.plctlab.org/api/1.2/patches/1377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164752.2566043-1-aldyh@redhat.com/","msgid":"<20220922164752.2566043-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:47:52","name":"Add debug functions for REAL_VALUE_TYPE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164752.2566043-1-aldyh@redhat.com/mbox/"},{"id":1379,"url":"https://patchwork.plctlab.org/api/1.2/patches/1379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-1-aldyh@redhat.com/","msgid":"<20220922164911.2566143-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:49:10","name":"frange: dump hex values when dumping FP numbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-1-aldyh@redhat.com/mbox/"},{"id":1378,"url":"https://patchwork.plctlab.org/api/1.2/patches/1378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-2-aldyh@redhat.com/","msgid":"<20220922164911.2566143-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:49:11","name":"frange: drop endpoints to min/max representable numbers for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-2-aldyh@redhat.com/mbox/"},{"id":1380,"url":"https://patchwork.plctlab.org/api/1.2/patches/1380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com/","msgid":"<0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com>","list_archive_url":null,"date":"2022-09-22T17:06:16","name":"[_GLIBCXX_DEBUG,_GLIBCXX_INLINE_VERSION] Add missing printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com/mbox/"},{"id":1381,"url":"https://patchwork.plctlab.org/api/1.2/patches/1381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922182502.3218391-1-ppalka@redhat.com/","msgid":"<20220922182502.3218391-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:25:02","name":"c++ modules: ICE with class NTTP argument [PR100616]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922182502.3218391-1-ppalka@redhat.com/mbox/"},{"id":1382,"url":"https://patchwork.plctlab.org/api/1.2/patches/1382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17227f0-cdcf-f25b-58fb-4ad2751ff772@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T18:53:24","name":"[01/17] Replace another snippet with a call to, gimple_range_ssa_names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17227f0-cdcf-f25b-58fb-4ad2751ff772@redhat.com/mbox/"},{"id":1383,"url":"https://patchwork.plctlab.org/api/1.2/patches/1383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com/","msgid":"<1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:55:20","name":"[02/17] Adjust range_op_handler to store the handler directly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com/mbox/"},{"id":1384,"url":"https://patchwork.plctlab.org/api/1.2/patches/1384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com/","msgid":"<6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:56:29","name":"[03/17] Create gimple_range_op_handler in a new source file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com/mbox/"},{"id":1385,"url":"https://patchwork.plctlab.org/api/1.2/patches/1385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc2b47bd-57ab-e9bf-50b0-cbdf89f976da@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T18:58:04","name":"[04/17] Fix calc_op1 for undefined op2_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc2b47bd-57ab-e9bf-50b0-cbdf89f976da@redhat.com/mbox/"},{"id":1386,"url":"https://patchwork.plctlab.org/api/1.2/patches/1386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com/","msgid":"<78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:59:22","name":"[05/17] Add missing float fold_range prototype for floats.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com/mbox/"},{"id":1387,"url":"https://patchwork.plctlab.org/api/1.2/patches/1387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com/","msgid":"<35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:00:27","name":"[06/17] Always check the return value of fold_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com/mbox/"},{"id":1388,"url":"https://patchwork.plctlab.org/api/1.2/patches/1388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com/","msgid":"<4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:01:37","name":"[07/17] Add range-ops support for builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com/mbox/"},{"id":1389,"url":"https://patchwork.plctlab.org/api/1.2/patches/1389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37539494-f250-1f45-1dbd-e3f82c296136@redhat.com/","msgid":"<37539494-f250-1f45-1dbd-e3f82c296136@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:02:23","name":"[08/17] Convert CFN_BUILT_IN_SIGNBIT to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37539494-f250-1f45-1dbd-e3f82c296136@redhat.com/mbox/"},{"id":1390,"url":"https://patchwork.plctlab.org/api/1.2/patches/1390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/99671c98-c81e-1fa3-b851-263492a54669@redhat.com/","msgid":"<99671c98-c81e-1fa3-b851-263492a54669@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:05:08","name":"[09/17] Convert CFN_BUILT_IN_TOUPPER and TOLOWER to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/99671c98-c81e-1fa3-b851-263492a54669@redhat.com/mbox/"},{"id":1391,"url":"https://patchwork.plctlab.org/api/1.2/patches/1391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21789ec-cfab-4503-410f-48bbd905d4c6@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:05:13","name":"[10/17] Convert CFN_BUILT_FFS and CFN_POPCOUNT to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21789ec-cfab-4503-410f-48bbd905d4c6@redhat.com/mbox/"},{"id":1392,"url":"https://patchwork.plctlab.org/api/1.2/patches/1392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2ad2282-85ff-da6b-970a-66e63c925957@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:05:19","name":"[11/17] Convert CFN_CLZ builtins to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2ad2282-85ff-da6b-970a-66e63c925957@redhat.com/mbox/"},{"id":1393,"url":"https://patchwork.plctlab.org/api/1.2/patches/1393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com/","msgid":"<622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:05:36","name":"[12/17] Convert CFN_CTZ builtins to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com/mbox/"},{"id":1395,"url":"https://patchwork.plctlab.org/api/1.2/patches/1395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffc36af1-4096-fba9-ae43-61e105b7e20d@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:06:14","name":"[13/17] Convert CFN_BUILT_IN_CLRSB to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffc36af1-4096-fba9-ae43-61e105b7e20d@redhat.com/mbox/"},{"id":1394,"url":"https://patchwork.plctlab.org/api/1.2/patches/1394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2f34a94-1eb8-07a6-f174-55246161e1a5@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:06:50","name":"[14/17] Convert CFN_BUILT_IN_UBSAN_CHECK_* to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2f34a94-1eb8-07a6-f174-55246161e1a5@redhat.com/mbox/"},{"id":1396,"url":"https://patchwork.plctlab.org/api/1.2/patches/1396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc889d03-0184-d34c-5d54-87f7c9763195@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:08:16","name":"[15/17] Convert CFN_BUILT_IN_STRLEN to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc889d03-0184-d34c-5d54-87f7c9763195@redhat.com/mbox/"},{"id":1397,"url":"https://patchwork.plctlab.org/api/1.2/patches/1397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a297a47e-cc9f-12b3-ab99-dd52f897e16a@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:10:07","name":"[16/17] Convert CFN_BUILT_IN_GOACC_DIM_* to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a297a47e-cc9f-12b3-ab99-dd52f897e16a@redhat.com/mbox/"},{"id":1398,"url":"https://patchwork.plctlab.org/api/1.2/patches/1398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d97e89ef-7296-3cf4-3e52-e9aedcbc7432@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:10:45","name":"[17/17] Convert CFN_BUILT_IN_PARITY to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d97e89ef-7296-3cf4-3e52-e9aedcbc7432@redhat.com/mbox/"},{"id":1399,"url":"https://patchwork.plctlab.org/api/1.2/patches/1399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy1Sjn8VA1HVBkB7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-23T06:30:38","name":"attribs: Improve diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy1Sjn8VA1HVBkB7@tucnak/mbox/"},{"id":1400,"url":"https://patchwork.plctlab.org/api/1.2/patches/1400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923064254.326775-1-hongtao.liu@intel.com/","msgid":"<20220923064254.326775-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-23T06:42:54","name":"[x86] Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_const_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923064254.326775-1-hongtao.liu@intel.com/mbox/"},{"id":1401,"url":"https://patchwork.plctlab.org/api/1.2/patches/1401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923084330.4131742-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923084330.4131742-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T08:43:31","name":"[testsuite,arm] Fix cmse-15.c expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923084330.4131742-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1402,"url":"https://patchwork.plctlab.org/api/1.2/patches/1402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16239-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:17:23","name":"[2/2] AArch64 Add support for neg on v1df","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16239-tamar@arm.com/mbox/"},{"id":1403,"url":"https://patchwork.plctlab.org/api/1.2/patches/1403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16259-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:18:14","name":"middle-end Recognize more conditional comparisons idioms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16259-tamar@arm.com/mbox/"},{"id":1404,"url":"https://patchwork.plctlab.org/api/1.2/patches/1404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15680-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:21:20","name":"middle-end fix floating out of constants in conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15680-tamar@arm.com/mbox/"},{"id":1405,"url":"https://patchwork.plctlab.org/api/1.2/patches/1405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16250-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:23:03","name":"[testsuite] : make check-functions-body dump expected and seen cases on failure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16250-tamar@arm.com/mbox/"},{"id":1406,"url":"https://patchwork.plctlab.org/api/1.2/patches/1406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16248-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:24:56","name":"[1/2] middle-end: RFC: On expansion of conditional branches, give hint if argument is a truth type to backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16248-tamar@arm.com/mbox/"},{"id":1407,"url":"https://patchwork.plctlab.org/api/1.2/patches/1407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy17hn8LsinOmJID@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:25:26","name":"[2/2] AArch64 Extend tbz pattern to allow SI to SI extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy17hn8LsinOmJID@arm.com/mbox/"},{"id":1408,"url":"https://patchwork.plctlab.org/api/1.2/patches/1408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15779-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:08","name":"[1/4] middle-end Support not decomposing specific divisions during vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15779-tamar@arm.com/mbox/"},{"id":1411,"url":"https://patchwork.plctlab.org/api/1.2/patches/1411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19Z/q/HPJ6wm5w@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:27","name":"[2/4] AArch64 Add implementation for pow2 bitmask division.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19Z/q/HPJ6wm5w@arm.com/mbox/"},{"id":1409,"url":"https://patchwork.plctlab.org/api/1.2/patches/1409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19es5TOyWlHsnk@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:46","name":"[3/4] AArch64 Add SVE2 implementation for pow2 bitmask division","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19es5TOyWlHsnk@arm.com/mbox/"},{"id":1410,"url":"https://patchwork.plctlab.org/api/1.2/patches/1410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19kZozCiweoBcT@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:34:09","name":"[4/4] AArch64 sve2: rewrite pack + NARROWB + NARROWB to NARROWB + NARROWT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19kZozCiweoBcT@arm.com/mbox/"},{"id":1412,"url":"https://patchwork.plctlab.org/api/1.2/patches/1412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8bae7c0-2c0a-7022-9b7b-8ca41ef01544@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T10:39:43","name":"[committed] MAINTAINERS: Add myself to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8bae7c0-2c0a-7022-9b7b-8ca41ef01544@codesourcery.com/mbox/"},{"id":1413,"url":"https://patchwork.plctlab.org/api/1.2/patches/1413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15776-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T11:42:12","name":"[1/2] middle-end Fold BIT_FIELD_REF and Shifts into BIT_FIELD_REFs alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15776-tamar@arm.com/mbox/"},{"id":1414,"url":"https://patchwork.plctlab.org/api/1.2/patches/1414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy2b1o/foRR6xvBZ@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T11:43:18","name":"[2/2] AArch64 Perform more late folding of reg moves and shifts which arrive after expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy2b1o/foRR6xvBZ@arm.com/mbox/"},{"id":1415,"url":"https://patchwork.plctlab.org/api/1.2/patches/1415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115838.1327654-1-jwakely@redhat.com/","msgid":"<20220923115838.1327654-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T11:58:38","name":"[committed] libstdc++: Optimize std::bitset::to_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115838.1327654-1-jwakely@redhat.com/mbox/"},{"id":1416,"url":"https://patchwork.plctlab.org/api/1.2/patches/1416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115950.1327715-1-jwakely@redhat.com/","msgid":"<20220923115950.1327715-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T11:59:50","name":"[committed] libstdc++: Enable constexpr std::bitset for debug mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115950.1327715-1-jwakely@redhat.com/mbox/"},{"id":1417,"url":"https://patchwork.plctlab.org/api/1.2/patches/1417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923120331.4136741-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923120331.4136741-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T12:03:32","name":"testsuite: Verify that module-mapper is avialable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923120331.4136741-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1418,"url":"https://patchwork.plctlab.org/api/1.2/patches/1418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923123258.176D213A00@imap2.suse-dmz.suse.de/","msgid":"<20220923123258.176D213A00@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-23T12:32:57","name":"tree-optimization/106922 - extend same-val clobber FRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923123258.176D213A00@imap2.suse-dmz.suse.de/mbox/"},{"id":1419,"url":"https://patchwork.plctlab.org/api/1.2/patches/1419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923125830.2715538-1-aldyh@redhat.com/","msgid":"<20220923125830.2715538-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-23T12:58:30","name":"[COMMITTED] frange: Make the setter taking trees a wrapper.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923125830.2715538-1-aldyh@redhat.com/mbox/"},{"id":1420,"url":"https://patchwork.plctlab.org/api/1.2/patches/1420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923135914.24219-1-soeren@soeren-tempel.net/","msgid":"<20220923135914.24219-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-09-23T13:59:14","name":"[v2] libgo: Portable access to thread ID in struct sigevent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923135914.24219-1-soeren@soeren-tempel.net/mbox/"},{"id":1421,"url":"https://patchwork.plctlab.org/api/1.2/patches/1421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923141522.1393426-1-jwakely@redhat.com/","msgid":"<20220923141522.1393426-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T14:15:22","name":"[committed] libstdc++: Micro-optimizaion for std::bitset stream extraction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923141522.1393426-1-jwakely@redhat.com/mbox/"},{"id":1422,"url":"https://patchwork.plctlab.org/api/1.2/patches/1422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b694809c-c969-1d8f-196b-589194312c02@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T15:24:23","name":"OpenACC: Fix reduction tree-sharing issue [PR106982]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b694809c-c969-1d8f-196b-589194312c02@codesourcery.com/mbox/"},{"id":1423,"url":"https://patchwork.plctlab.org/api/1.2/patches/1423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rmaqetf.fsf@euler.schwinge.homeip.net/","msgid":"<878rmaqetf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-09-23T15:40:44","name":"[og12] Come up with {,UN}LIKELY macros (was: [Patch][2/3][v2] nvptx: libgomp+mkoffload.cc: Prepare for reverse offload fn lookup)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rmaqetf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":1424,"url":"https://patchwork.plctlab.org/api/1.2/patches/1424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923154924.GA66899@adacore.com/","msgid":"<20220923154924.GA66899@adacore.com>","list_archive_url":null,"date":"2022-09-23T15:49:24","name":"Fix thinko in powerpc default specs for -mabi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923154924.GA66899@adacore.com/mbox/"},{"id":1425,"url":"https://patchwork.plctlab.org/api/1.2/patches/1425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184026.379494-1-polacek@redhat.com/","msgid":"<20220923184026.379494-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-23T18:40:26","name":"c++: Don'\''t quote nothrow in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184026.379494-1-polacek@redhat.com/mbox/"},{"id":1426,"url":"https://patchwork.plctlab.org/api/1.2/patches/1426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184344.4147951-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923184344.4147951-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T18:43:44","name":"Fix typo in chapter level for RISC-V attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184344.4147951-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1427,"url":"https://patchwork.plctlab.org/api/1.2/patches/1427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542E50C76592E21B7207AB491519@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T18:53:16","name":"Fix profile count comparison.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542E50C76592E21B7207AB491519@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1428,"url":"https://patchwork.plctlab.org/api/1.2/patches/1428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209232123240.183299@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-23T21:24:07","name":"[committed] testsuite: Add more C2x tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209232123240.183299@digraph.polyomino.org.uk/mbox/"},{"id":1429,"url":"https://patchwork.plctlab.org/api/1.2/patches/1429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000747.1717312-1-jwakely@redhat.com/","msgid":"<20220924000747.1717312-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T00:07:47","name":"[committed] libstdc++: Fix std::is_nothrow_invocable_r for uncopyable prvalues [PR91456]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000747.1717312-1-jwakely@redhat.com/mbox/"},{"id":1430,"url":"https://patchwork.plctlab.org/api/1.2/patches/1430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000753.1717363-1-jwakely@redhat.com/","msgid":"<20220924000753.1717363-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T00:07:53","name":"[committed] libstdc++: Add test for type traits not having friend access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000753.1717363-1-jwakely@redhat.com/mbox/"},{"id":1431,"url":"https://patchwork.plctlab.org/api/1.2/patches/1431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924011611.433106-1-polacek@redhat.com/","msgid":"<20220924011611.433106-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-24T01:16:11","name":"c++: P2513R4, char8_t Compatibility and Portability Fix [PR106656]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924011611.433106-1-polacek@redhat.com/mbox/"},{"id":1432,"url":"https://patchwork.plctlab.org/api/1.2/patches/1432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924124722.1946365-1-xry111@xry111.site/","msgid":"<20220924124722.1946365-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-24T12:47:22","name":"LoongArch: Use UNSPEC for fmin/fmax RTL pattern [PR105414]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924124722.1946365-1-xry111@xry111.site/mbox/"},{"id":1433,"url":"https://patchwork.plctlab.org/api/1.2/patches/1433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924141912.1892292-1-jwakely@redhat.com/","msgid":"<20220924141912.1892292-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T14:19:12","name":"[committed] libstdc++: Simplify detection idiom using concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924141912.1892292-1-jwakely@redhat.com/mbox/"},{"id":1434,"url":"https://patchwork.plctlab.org/api/1.2/patches/1434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220925112537.2209847-1-xry111@xry111.site/","msgid":"<20220925112537.2209847-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-25T11:25:37","name":"LoongArch: Add prefetch instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220925112537.2209847-1-xry111@xry111.site/mbox/"},{"id":1435,"url":"https://patchwork.plctlab.org/api/1.2/patches/1435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada747e8-6ba5-70f9-f7a8-eb1685b3b09b@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-09-25T16:28:55","name":"[RFA] Minor improvement to coremark, avoid unconditional jump to return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada747e8-6ba5-70f9-f7a8-eb1685b3b09b@ventanamicro.com/mbox/"},{"id":1436,"url":"https://patchwork.plctlab.org/api/1.2/patches/1436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7af00afc-50de-4985-97b2-100ac2a7285b-1664139876212@3c-app-gmx-bap15/","msgid":"","list_archive_url":null,"date":"2022-09-25T21:04:36","name":"Proxy ping [PATCH] Fortran: Fix ICE and wrong code for assumed-rank arrays [PR100029, PR100040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7af00afc-50de-4985-97b2-100ac2a7285b-1664139876212@3c-app-gmx-bap15/mbox/"},{"id":1437,"url":"https://patchwork.plctlab.org/api/1.2/patches/1437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020010.779566-1-chenglulu@loongson.cn/","msgid":"<20220926020010.779566-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-26T02:00:10","name":"LoongArch: Libvtv add LoongArch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020010.779566-1-chenglulu@loongson.cn/mbox/"},{"id":1438,"url":"https://patchwork.plctlab.org/api/1.2/patches/1438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020504.791159-1-chenglulu@loongson.cn/","msgid":"<20220926020504.791159-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-26T02:05:04","name":"LoongArch: Libitm add LoongArch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020504.791159-1-chenglulu@loongson.cn/mbox/"},{"id":1439,"url":"https://patchwork.plctlab.org/api/1.2/patches/1439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926031434.47605-1-hongtao.liu@intel.com/","msgid":"<20220926031434.47605-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-26T03:14:34","name":"[x86] Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_const_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926031434.47605-1-hongtao.liu@intel.com/mbox/"},{"id":1440,"url":"https://patchwork.plctlab.org/api/1.2/patches/1440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com/","msgid":"<1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com>","list_archive_url":null,"date":"2022-09-26T03:35:28","name":"[v7,rs6000] Implemented f[min/max]_optab by xs[min/max]dp [PR103605]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com/mbox/"},{"id":1441,"url":"https://patchwork.plctlab.org/api/1.2/patches/1441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926051937.729321-1-lin1.hu@intel.com/","msgid":"<20220926051937.729321-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2022-09-26T05:19:37","name":"testsuite: Fix up avx256-unaligned-store-3.c test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926051937.729321-1-lin1.hu@intel.com/mbox/"},{"id":1442,"url":"https://patchwork.plctlab.org/api/1.2/patches/1442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065604.783193-1-liwei.xu@intel.com/","msgid":"<20220926065604.783193-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-09-26T06:56:04","name":"Optimize nested permutation to single VEC_PERM_EXPR [PR54346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065604.783193-1-liwei.xu@intel.com/mbox/"},{"id":1443,"url":"https://patchwork.plctlab.org/api/1.2/patches/1443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065805.15717-1-xry111@xry111.site/","msgid":"<20220926065805.15717-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-26T06:58:05","name":"LoongArch: Pass cache information to optimizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065805.15717-1-xry111@xry111.site/mbox/"},{"id":1444,"url":"https://patchwork.plctlab.org/api/1.2/patches/1444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1836c77d-56f0-fd92-6453-9978b246c969@suse.cz/","msgid":"<1836c77d-56f0-fd92-6453-9978b246c969@suse.cz>","list_archive_url":null,"date":"2022-09-26T07:46:25","name":"[pushed] ranger: remove unused function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1836c77d-56f0-fd92-6453-9978b246c969@suse.cz/mbox/"},{"id":1463,"url":"https://patchwork.plctlab.org/api/1.2/patches/1463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzFjMj+hcggRdc8F@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-26T08:30:44","name":"reassoc: Handle OFFSET_TYPE like POINTER_TYPE in optimize_range_tests_cmp_bitwise [PR107029[","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzFjMj+hcggRdc8F@tucnak/mbox/"},{"id":1445,"url":"https://patchwork.plctlab.org/api/1.2/patches/1445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091315.272096-1-poulhies@adacore.com/","msgid":"<20220926091315.272096-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:15","name":"[COMMITED] ada: Tune comment of routine for detecting junk names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091315.272096-1-poulhies@adacore.com/mbox/"},{"id":1447,"url":"https://patchwork.plctlab.org/api/1.2/patches/1447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091326.272406-1-poulhies@adacore.com/","msgid":"<20220926091326.272406-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:26","name":"[COMMITED] ada: Deconstruct build support for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091326.272406-1-poulhies@adacore.com/mbox/"},{"id":1446,"url":"https://patchwork.plctlab.org/api/1.2/patches/1446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091333.272502-1-poulhies@adacore.com/","msgid":"<20220926091333.272502-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:33","name":"[COMMITED] ada: Remove definition of MAXPATHLEN for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091333.272502-1-poulhies@adacore.com/mbox/"},{"id":1449,"url":"https://patchwork.plctlab.org/api/1.2/patches/1449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091341.272596-1-poulhies@adacore.com/","msgid":"<20220926091341.272596-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:41","name":"[COMMITED] ada: Remove socket definitions for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091341.272596-1-poulhies@adacore.com/mbox/"},{"id":1448,"url":"https://patchwork.plctlab.org/api/1.2/patches/1448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091437.272873-1-poulhies@adacore.com/","msgid":"<20220926091437.272873-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:37","name":"[COMMITED] ada: Improve accessibility check generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091437.272873-1-poulhies@adacore.com/mbox/"},{"id":1451,"url":"https://patchwork.plctlab.org/api/1.2/patches/1451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091453.273010-1-poulhies@adacore.com/","msgid":"<20220926091453.273010-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:53","name":"[COMMITED] ada: Only reject volatile ghost objects when SPARK_Mode is On","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091453.273010-1-poulhies@adacore.com/mbox/"},{"id":1450,"url":"https://patchwork.plctlab.org/api/1.2/patches/1450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091458.273107-1-poulhies@adacore.com/","msgid":"<20220926091458.273107-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:58","name":"[COMMITED] ada: Delay expansion of iterated component association","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091458.273107-1-poulhies@adacore.com/mbox/"},{"id":1454,"url":"https://patchwork.plctlab.org/api/1.2/patches/1454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091505.273202-1-poulhies@adacore.com/","msgid":"<20220926091505.273202-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:05","name":"[COMMITED] ada: Delay expansion of iterator specification in preanalysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091505.273202-1-poulhies@adacore.com/mbox/"},{"id":1456,"url":"https://patchwork.plctlab.org/api/1.2/patches/1456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091511.273296-1-poulhies@adacore.com/","msgid":"<20220926091511.273296-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:11","name":"[COMMITED] ada: Make Original_Aspect_Pragma_Name more precise","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091511.273296-1-poulhies@adacore.com/mbox/"},{"id":1453,"url":"https://patchwork.plctlab.org/api/1.2/patches/1453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091516.273390-1-poulhies@adacore.com/","msgid":"<20220926091516.273390-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:16","name":"[COMMITED] ada: Document support for the mold linker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091516.273390-1-poulhies@adacore.com/mbox/"},{"id":1455,"url":"https://patchwork.plctlab.org/api/1.2/patches/1455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091522.273508-1-poulhies@adacore.com/","msgid":"<20220926091522.273508-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:22","name":"[COMMITED] ada: Improve CUDA host-side and device-side binder support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091522.273508-1-poulhies@adacore.com/mbox/"},{"id":1452,"url":"https://patchwork.plctlab.org/api/1.2/patches/1452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091526.273603-1-poulhies@adacore.com/","msgid":"<20220926091526.273603-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:26","name":"[COMMITED] ada: Document Long_Long_Long_Size parameter for -gnateT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091526.273603-1-poulhies@adacore.com/mbox/"},{"id":1458,"url":"https://patchwork.plctlab.org/api/1.2/patches/1458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091531.273721-1-poulhies@adacore.com/","msgid":"<20220926091531.273721-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:31","name":"[COMMITED] ada: Remove unreferenced C macro from OS constants template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091531.273721-1-poulhies@adacore.com/mbox/"},{"id":1457,"url":"https://patchwork.plctlab.org/api/1.2/patches/1457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091537.273815-1-poulhies@adacore.com/","msgid":"<20220926091537.273815-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:37","name":"[COMMITED] ada: Remove unreferenced Rtsfind entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091537.273815-1-poulhies@adacore.com/mbox/"},{"id":1460,"url":"https://patchwork.plctlab.org/api/1.2/patches/1460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091542.273909-1-poulhies@adacore.com/","msgid":"<20220926091542.273909-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:42","name":"[COMMITED] ada: Fix location of pragmas coming from aspects in top-level instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091542.273909-1-poulhies@adacore.com/mbox/"},{"id":1459,"url":"https://patchwork.plctlab.org/api/1.2/patches/1459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091626.274146-1-poulhies@adacore.com/","msgid":"<20220926091626.274146-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:16:26","name":"[COMMITED] ada: Doc: rename Valid_Image to Valid_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091626.274146-1-poulhies@adacore.com/mbox/"},{"id":1461,"url":"https://patchwork.plctlab.org/api/1.2/patches/1461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091739.274489-1-poulhies@adacore.com/","msgid":"<20220926091739.274489-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:17:39","name":"[COMMITED] ada: Remove GNATmetric'\''s documentation from GNAT'\''s documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091739.274489-1-poulhies@adacore.com/mbox/"},{"id":1462,"url":"https://patchwork.plctlab.org/api/1.2/patches/1462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz/","msgid":"<72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz>","list_archive_url":null,"date":"2022-09-26T10:07:56","name":"[pushed] s390: fix wrong refactoring","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz/mbox/"},{"id":1464,"url":"https://patchwork.plctlab.org/api/1.2/patches/1464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926121759.3179767-1-aldyh@redhat.com/","msgid":"<20220926121759.3179767-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-26T12:18:00","name":"[PR107009] Set ranges from unreachable edges for all known ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926121759.3179767-1-aldyh@redhat.com/mbox/"},{"id":1465,"url":"https://patchwork.plctlab.org/api/1.2/patches/1465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926125953.2149422-1-jwakely@redhat.com/","msgid":"<20220926125953.2149422-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T12:59:53","name":"[committed] libstdc++: Add #if around non-C++03 code in std::bitset [PR107037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926125953.2149422-1-jwakely@redhat.com/mbox/"},{"id":1466,"url":"https://patchwork.plctlab.org/api/1.2/patches/1466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926143620.24037-1-ppalka@redhat.com/","msgid":"<20220926143620.24037-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-26T14:36:20","name":"c++ modules: variable template partial spec fixes [PR107033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926143620.24037-1-ppalka@redhat.com/mbox/"},{"id":1467,"url":"https://patchwork.plctlab.org/api/1.2/patches/1467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com/","msgid":"<1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com>","list_archive_url":null,"date":"2022-09-26T15:16:44","name":"Update my email address and DCO entry in MAINTAINERS file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com/mbox/"},{"id":1468,"url":"https://patchwork.plctlab.org/api/1.2/patches/1468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com/","msgid":"<645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com>","list_archive_url":null,"date":"2022-09-26T15:20:53","name":"Update for gcc steering committee page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com/mbox/"},{"id":1469,"url":"https://patchwork.plctlab.org/api/1.2/patches/1469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926152258.20921-1-polacek@redhat.com/","msgid":"<20220926152258.20921-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-26T15:22:58","name":"c++: Instantiate less when evaluating __is_convertible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926152258.20921-1-polacek@redhat.com/mbox/"},{"id":1470,"url":"https://patchwork.plctlab.org/api/1.2/patches/1470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHSgNWwCii2jawR@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-26T16:25:36","name":"[v2] c++: Instantiate less when evaluating __is_convertible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHSgNWwCii2jawR@redhat.com/mbox/"},{"id":1471,"url":"https://patchwork.plctlab.org/api/1.2/patches/1471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHVB2eFlmeaIZoO@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-26T16:36:23","name":"openmp: Add OpenMP assume, assumes and begin/end assumes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHVB2eFlmeaIZoO@tucnak/mbox/"},{"id":1472,"url":"https://patchwork.plctlab.org/api/1.2/patches/1472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926172441.3219466-1-aldyh@redhat.com/","msgid":"<20220926172441.3219466-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-26T17:24:41","name":"[COMMITTED] Optimize [0 = x & MASK] in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926172441.3219466-1-aldyh@redhat.com/mbox/"},{"id":1473,"url":"https://patchwork.plctlab.org/api/1.2/patches/1473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz/","msgid":"<073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz>","list_archive_url":null,"date":"2022-09-26T19:05:20","name":"[pushed] docs: add missing dash in option name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz/mbox/"},{"id":1474,"url":"https://patchwork.plctlab.org/api/1.2/patches/1474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzIDZSRNR65/L5zu@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-26T19:54:13","name":"[v2] c++: Don'\''t quote nothrow in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzIDZSRNR65/L5zu@redhat.com/mbox/"},{"id":1475,"url":"https://patchwork.plctlab.org/api/1.2/patches/1475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926222725.GA19652@ldh-imac.local/","msgid":"<20220926222725.GA19652@ldh-imac.local>","list_archive_url":null,"date":"2022-09-26T22:27:25","name":"Ping^3: [PATCH] libcpp: Handle extended characters in user-defined literal suffix [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926222725.GA19652@ldh-imac.local/mbox/"},{"id":1477,"url":"https://patchwork.plctlab.org/api/1.2/patches/1477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224904.2235882-1-jwakely@redhat.com/","msgid":"<20220926224904.2235882-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T22:49:04","name":"[committed] libstdc++: Use new built-ins for std::is_convertible traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224904.2235882-1-jwakely@redhat.com/mbox/"},{"id":1476,"url":"https://patchwork.plctlab.org/api/1.2/patches/1476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224909.2235959-1-jwakely@redhat.com/","msgid":"<20220926224909.2235959-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T22:49:09","name":"[committed] libstdc++: Update std::pointer_traits to match new LWG 3545 wording","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224909.2235959-1-jwakely@redhat.com/mbox/"},{"id":1478,"url":"https://patchwork.plctlab.org/api/1.2/patches/1478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-2-iii@linux.ibm.com/","msgid":"<20220927002334.651057-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2022-09-27T00:23:33","name":"[v5,1/2] asan: specify alignment for LASANPC labels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-2-iii@linux.ibm.com/mbox/"},{"id":1479,"url":"https://patchwork.plctlab.org/api/1.2/patches/1479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-3-iii@linux.ibm.com/","msgid":"<20220927002334.651057-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2022-09-27T00:23:34","name":"[v5,2/2] IBM zSystems: Define CODE_LABEL_BOUNDARY","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-3-iii@linux.ibm.com/mbox/"},{"id":1480,"url":"https://patchwork.plctlab.org/api/1.2/patches/1480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4086807d-97d1-ec58-1617-24dda537010a@gmail.com/","msgid":"<4086807d-97d1-ec58-1617-24dda537010a@gmail.com>","list_archive_url":null,"date":"2022-09-27T01:12:23","name":"libgompd: Add thread handles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4086807d-97d1-ec58-1617-24dda537010a@gmail.com/mbox/"},{"id":1481,"url":"https://patchwork.plctlab.org/api/1.2/patches/1481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927031639.186950-1-chenglulu@loongson.cn/","msgid":"<20220927031639.186950-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T03:16:39","name":"Libvtv-test: Fix the problem that scansarif.exp cannot be found in libvtv regression test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927031639.186950-1-chenglulu@loongson.cn/mbox/"},{"id":1482,"url":"https://patchwork.plctlab.org/api/1.2/patches/1482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927060228.573975-1-chenglulu@loongson.cn/","msgid":"<20220927060228.573975-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T06:02:28","name":"[v2] Libvtv-test: Fix bug that scansarif.exp cannot be found in libvtv regression test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927060228.573975-1-chenglulu@loongson.cn/mbox/"},{"id":1483,"url":"https://patchwork.plctlab.org/api/1.2/patches/1483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com/","msgid":"<86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com>","list_archive_url":null,"date":"2022-09-27T06:19:16","name":"[committed] Fix ICE'\''s due to jump-to-return optimization changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com/mbox/"},{"id":1488,"url":"https://patchwork.plctlab.org/api/1.2/patches/1488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927074928.804896-1-chenglulu@loongson.cn/","msgid":"<20220927074928.804896-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T07:49:29","name":"[v2] LoongArch: Libvtv add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927074928.804896-1-chenglulu@loongson.cn/mbox/"},{"id":1484,"url":"https://patchwork.plctlab.org/api/1.2/patches/1484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084453.3409529-1-aldyh@redhat.com/","msgid":"<20220927084453.3409529-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T08:44:53","name":"[COMMITTED] Add an irange setter for wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084453.3409529-1-aldyh@redhat.com/mbox/"},{"id":1485,"url":"https://patchwork.plctlab.org/api/1.2/patches/1485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzK4JeacvF923uZd@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-27T08:45:25","name":"[RFC] libstdc++: Partial library support for std::float{16,32,64,128}_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzK4JeacvF923uZd@tucnak/mbox/"},{"id":1486,"url":"https://patchwork.plctlab.org/api/1.2/patches/1486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084606.3409637-1-aldyh@redhat.com/","msgid":"<20220927084606.3409637-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T08:46:06","name":"[COMMITTED] irange: keep better track of powers of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084606.3409637-1-aldyh@redhat.com/mbox/"},{"id":1487,"url":"https://patchwork.plctlab.org/api/1.2/patches/1487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927092608.228176-1-juzhe.zhong@rivai.ai/","msgid":"<20220927092608.228176-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-27T09:26:08","name":"RISC-V: Add ABI-defined RVV types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927092608.228176-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1489,"url":"https://patchwork.plctlab.org/api/1.2/patches/1489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927103510.2321453-1-jwakely@redhat.com/","msgid":"<20220927103510.2321453-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-27T10:35:10","name":"c++: Make __is_{, nothrow_}convertible SFINAE on access [PR107049]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927103510.2321453-1-jwakely@redhat.com/mbox/"},{"id":1490,"url":"https://patchwork.plctlab.org/api/1.2/patches/1490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzLSIMAZZhPejSzT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-27T10:36:16","name":"[committed] fixincludes: FIx up for Debian/Ubuntu includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzLSIMAZZhPejSzT@tucnak/mbox/"},{"id":1491,"url":"https://patchwork.plctlab.org/api/1.2/patches/1491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927110013.2378598-1-jwakely@redhat.com/","msgid":"<20220927110013.2378598-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-27T11:00:13","name":"[committed] libstdc++: Adjust deduction guides for static operator() [PR106651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927110013.2378598-1-jwakely@redhat.com/mbox/"},{"id":1492,"url":"https://patchwork.plctlab.org/api/1.2/patches/1492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927144019.194796-1-torbjorn.svensson@foss.st.com/","msgid":"<20220927144019.194796-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-27T14:40:20","name":"testsuite: Skip intrinsics test if arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927144019.194796-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1493,"url":"https://patchwork.plctlab.org/api/1.2/patches/1493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927150131.3487543-1-aldyh@redhat.com/","msgid":"<20220927150131.3487543-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T15:01:31","name":"[COMMITTED] range-ops: Calculate the popcount of a singleton.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927150131.3487543-1-aldyh@redhat.com/mbox/"},{"id":1494,"url":"https://patchwork.plctlab.org/api/1.2/patches/1494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927151214.1082396-1-andrea.corallo@arm.com/","msgid":"<20220927151214.1082396-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-09-27T15:12:14","name":"Don'\''t ICE running selftests if errors were raised [PR99723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927151214.1082396-1-andrea.corallo@arm.com/mbox/"},{"id":1495,"url":"https://patchwork.plctlab.org/api/1.2/patches/1495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV8j=NpiABvshLg0FOZm+pk44B8FH1+ejFgpxX+6=ZbUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T16:28:59","name":"libgo patch committed: Synchronize empty struct field handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV8j=NpiABvshLg0FOZm+pk44B8FH1+ejFgpxX+6=ZbUA@mail.gmail.com/mbox/"},{"id":1496,"url":"https://patchwork.plctlab.org/api/1.2/patches/1496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-00fca6df-5ba0-4282-afff-39debc94a9ae-1664305529428@3c-app-gmx-bap61/","msgid":"","list_archive_url":null,"date":"2022-09-27T19:05:29","name":"Fortran: error recovery while simplifying intrinsic UNPACK [PR107054]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-00fca6df-5ba0-4282-afff-39debc94a9ae-1664305529428@3c-app-gmx-bap61/mbox/"},{"id":1497,"url":"https://patchwork.plctlab.org/api/1.2/patches/1497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-1-ppalka@redhat.com/","msgid":"<20220927195030.2024439-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-27T19:50:29","name":"[1/2] c++: introduce TRAIT_TYPE alongside TRAIT_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-1-ppalka@redhat.com/mbox/"},{"id":1498,"url":"https://patchwork.plctlab.org/api/1.2/patches/1498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-2-ppalka@redhat.com/","msgid":"<20220927195030.2024439-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-27T19:50:30","name":"[2/2] c++: implement __remove_cv, __remove_reference and __remove_cvref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-2-ppalka@redhat.com/mbox/"},{"id":1499,"url":"https://patchwork.plctlab.org/api/1.2/patches/1499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f41501c6-4a9a-6dc0-7224-0f9a721a0765@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T19:53:56","name":"[RFA] Avoid unnecessary load-immediate in coremark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f41501c6-4a9a-6dc0-7224-0f9a721a0765@ventanamicro.com/mbox/"},{"id":1500,"url":"https://patchwork.plctlab.org/api/1.2/patches/1500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzNcYqVuH+FsC8Wh@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T20:26:10","name":"[v3] c++: Implement C++23 P2266R1, Simpler implicit move [PR101165]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzNcYqVuH+FsC8Wh@redhat.com/mbox/"},{"id":1501,"url":"https://patchwork.plctlab.org/api/1.2/patches/1501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927233454.144656-1-hjl.tools@gmail.com/","msgid":"<20220927233454.144656-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-09-27T23:34:54","name":"i386: Mark XMM4-XMM6 as clobbered by encodekey128/encodekey256","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927233454.144656-1-hjl.tools@gmail.com/mbox/"},{"id":1502,"url":"https://patchwork.plctlab.org/api/1.2/patches/1502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354209704F36E049F69EFBB091549@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T00:39:18","name":"[PUSHED] Fix AutoFDO tests to not look for hot/cold splitting.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354209704F36E049F69EFBB091549@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1503,"url":"https://patchwork.plctlab.org/api/1.2/patches/1503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com/","msgid":"<9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com>","list_archive_url":null,"date":"2022-09-28T05:30:46","name":"rs6000: Rework option -mpowerpc64 handling [PR106680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com/mbox/"},{"id":1504,"url":"https://patchwork.plctlab.org/api/1.2/patches/1504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35ccvwem.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T06:35:29","name":"Add OPTIONS_H_EXTRA to GTFILES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35ccvwem.fsf@arm.com/mbox/"},{"id":1505,"url":"https://patchwork.plctlab.org/api/1.2/patches/1505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f071b915-d4ce-a7c2-beb1-3b8c634d8985@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T07:39:44","name":"[wwwdocs] gcc-13/changes.html: Add nvptx'\''s --with-arch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f071b915-d4ce-a7c2-beb1-3b8c634d8985@codesourcery.com/mbox/"},{"id":1506,"url":"https://patchwork.plctlab.org/api/1.2/patches/1506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com/","msgid":"<98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T08:31:20","name":"[committed] libgomp.texi: Status '\''P'\'' for '\''assume'\'', remove duplicated line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com/mbox/"},{"id":1507,"url":"https://patchwork.plctlab.org/api/1.2/patches/1507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928121926.13280-1-andrea.corallo@arm.com/","msgid":"<20220928121926.13280-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-09-28T12:19:26","name":"arm: Define __ARM_FEATURE_AES and __ARM_FEATURE_SHA2 when march +crypto is selected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928121926.13280-1-andrea.corallo@arm.com/mbox/"},{"id":1508,"url":"https://patchwork.plctlab.org/api/1.2/patches/1508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928132024.64984-1-julian@codesourcery.com/","msgid":"<20220928132024.64984-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T13:20:24","name":"OpenACC: whole struct vs. component mappings (PR107028)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928132024.64984-1-julian@codesourcery.com/mbox/"},{"id":1509,"url":"https://patchwork.plctlab.org/api/1.2/patches/1509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com/","msgid":"<87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T15:05:38","name":"vect: while_ult for integer mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com/mbox/"},{"id":1510,"url":"https://patchwork.plctlab.org/api/1.2/patches/1510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzSQP8RpiJBScioT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-28T18:19:43","name":"fixincludes: Fix up powerpc floatn.h tweaks [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzSQP8RpiJBScioT@tucnak/mbox/"},{"id":1511,"url":"https://patchwork.plctlab.org/api/1.2/patches/1511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1355b5b-71cc-6726-c4e2-c1828d7a5850@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T20:42:01","name":"Fix gdb printers for std::string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1355b5b-71cc-6726-c4e2-c1828d7a5850@gmail.com/mbox/"},{"id":1512,"url":"https://patchwork.plctlab.org/api/1.2/patches/1512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e990a883-f6c0-7993-ae17-47be8f999a74@acm.org/","msgid":"","list_archive_url":null,"date":"2022-09-28T20:44:29","name":"c++: Add DECL_NTTP_OBJECT_P lang flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e990a883-f6c0-7993-ae17-47be8f999a74@acm.org/mbox/"},{"id":1513,"url":"https://patchwork.plctlab.org/api/1.2/patches/1513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928211501.2647123-1-guillermo.e.martinez@oracle.com/","msgid":"<20220928211501.2647123-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-09-28T21:15:01","name":"[v2] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928211501.2647123-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":1514,"url":"https://patchwork.plctlab.org/api/1.2/patches/1514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928212634.1275032-1-polacek@redhat.com/","msgid":"<20220928212634.1275032-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-28T21:26:34","name":"c++: Remove maybe-rvalue OR in implicit move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928212634.1275032-1-polacek@redhat.com/mbox/"},{"id":1515,"url":"https://patchwork.plctlab.org/api/1.2/patches/1515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233554.2670010-1-jwakely@redhat.com/","msgid":"<20220928233554.2670010-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-28T23:35:54","name":"[committed] libstdc++: Make INVOKE refuse to create dangling references [PR70692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233554.2670010-1-jwakely@redhat.com/mbox/"},{"id":1516,"url":"https://patchwork.plctlab.org/api/1.2/patches/1516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233634.2670028-1-jwakely@redhat.com/","msgid":"<20220928233634.2670028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-28T23:36:34","name":"[committed] libstdc++: Disable volatile-qualified std::bind for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233634.2670028-1-jwakely@redhat.com/mbox/"},{"id":1517,"url":"https://patchwork.plctlab.org/api/1.2/patches/1517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929050051.30330-1-hongtao.liu@intel.com/","msgid":"<20220929050051.30330-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-29T05:00:51","name":"Check nonlinear iv in vect_can_advance_ivs_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929050051.30330-1-hongtao.liu@intel.com/mbox/"},{"id":1518,"url":"https://patchwork.plctlab.org/api/1.2/patches/1518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVECKV7e5nDSA0S@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T07:06:48","name":"driver, cppdefault: Unbreak bootstrap on Debian/Ubuntu [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVECKV7e5nDSA0S@tucnak/mbox/"},{"id":1519,"url":"https://patchwork.plctlab.org/api/1.2/patches/1519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091021.359477-1-poulhies@adacore.com/","msgid":"<20220929091021.359477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:10:21","name":"[COMMITED] ada: Fix checking of Refined_State with nested package renamings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091021.359477-1-poulhies@adacore.com/mbox/"},{"id":1520,"url":"https://patchwork.plctlab.org/api/1.2/patches/1520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091050.359634-1-poulhies@adacore.com/","msgid":"<20220929091050.359634-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:10:50","name":"[COMMITED] ada: Improve efficiency of slice-of-component assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091050.359634-1-poulhies@adacore.com/mbox/"},{"id":1521,"url":"https://patchwork.plctlab.org/api/1.2/patches/1521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091106.359762-1-poulhies@adacore.com/","msgid":"<20220929091106.359762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:11:06","name":"[COMMITED] ada: Further tweak new expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091106.359762-1-poulhies@adacore.com/mbox/"},{"id":1522,"url":"https://patchwork.plctlab.org/api/1.2/patches/1522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091119.359856-1-poulhies@adacore.com/","msgid":"<20220929091119.359856-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:11:19","name":"[COMMITED] ada: Remove duplicated doc comment section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091119.359856-1-poulhies@adacore.com/mbox/"},{"id":1523,"url":"https://patchwork.plctlab.org/api/1.2/patches/1523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVtB20h3jGKmYg1@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:01:43","name":"i386, rs6000, ia64, s390: Fix C++ ICEs with _Float64x or _Float128 [PR107080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVtB20h3jGKmYg1@tucnak/mbox/"},{"id":1524,"url":"https://patchwork.plctlab.org/api/1.2/patches/1524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5569bd4-c7b5-8802-7a0b-4730a229a7e7@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:28:05","name":"[v2,DOCS] changes: mentioned ignore -gz=zlib-gnu option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5569bd4-c7b5-8802-7a0b-4730a229a7e7@suse.cz/mbox/"},{"id":1525,"url":"https://patchwork.plctlab.org/api/1.2/patches/1525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleq2tqfs.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:39:35","name":"[01/17] aarch64: Rename AARCH64_ISA architecture-level macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleq2tqfs.fsf@arm.com/mbox/"},{"id":1526,"url":"https://patchwork.plctlab.org/api/1.2/patches/1526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth70qtqfh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:39:46","name":"[02/17] aarch64: Rename AARCH64_FL architecture-level macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth70qtqfh.fsf@arm.com/mbox/"},{"id":1528,"url":"https://patchwork.plctlab.org/api/1.2/patches/1528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbetqf1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:02","name":"[03/17] aarch64: Rename AARCH64_FL_FOR_ARCH macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbetqf1.fsf@arm.com/mbox/"},{"id":1527,"url":"https://patchwork.plctlab.org/api/1.2/patches/1527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rm2tqeo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:15","name":"[04/17] aarch64: Add \"V\" to aarch64-arches.def names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rm2tqeo.fsf@arm.com/mbox/"},{"id":1529,"url":"https://patchwork.plctlab.org/api/1.2/patches/1529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jwqtqeb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:28","name":"[05/17] aarch64: Small config.gcc cleanups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jwqtqeb.fsf@arm.com/mbox/"},{"id":1531,"url":"https://patchwork.plctlab.org/api/1.2/patches/1531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgeisbti.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:41","name":"[06/17] aarch64: Avoid redundancy in aarch64-cores.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgeisbti.fsf@arm.com/mbox/"},{"id":1530,"url":"https://patchwork.plctlab.org/api/1.2/patches/1530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8p6sbt6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:53","name":"[07/17] aarch64: Remove AARCH64_FL_RCPC8_4 [PR107025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8p6sbt6.fsf@arm.com/mbox/"},{"id":1534,"url":"https://patchwork.plctlab.org/api/1.2/patches/1534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0zusbst.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:06","name":"[08/17] aarch64: Fix transitive closure of features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0zusbst.fsf@arm.com/mbox/"},{"id":1532,"url":"https://patchwork.plctlab.org/api/1.2/patches/1532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmtaisbsh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:18","name":"[09/17] aarch64: Reorder an entry in aarch64-option-extensions.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmtaisbsh.fsf@arm.com/mbox/"},{"id":1536,"url":"https://patchwork.plctlab.org/api/1.2/patches/1536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6sbs2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:33","name":"[10/17] aarch64: Simplify feature definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6sbs2.fsf@arm.com/mbox/"},{"id":1539,"url":"https://patchwork.plctlab.org/api/1.2/patches/1539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedvusbrq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:45","name":"[11/17] aarch64: Simplify generation of .arch strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedvusbrq.fsf@arm.com/mbox/"},{"id":1533,"url":"https://patchwork.plctlab.org/api/1.2/patches/1533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta66isbre.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:57","name":"[12/17] aarch64: Avoid std::string in static data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta66isbre.fsf@arm.com/mbox/"},{"id":1540,"url":"https://patchwork.plctlab.org/api/1.2/patches/1540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yh6sbr2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:09","name":"[13/17] aarch64: Tweak constness of option-related data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yh6sbr2.fsf@arm.com/mbox/"},{"id":1537,"url":"https://patchwork.plctlab.org/api/1.2/patches/1537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qrusbqi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:29","name":"[14/17] aarch64: Make more use of aarch64_feature_flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qrusbqi.fsf@arm.com/mbox/"},{"id":1535,"url":"https://patchwork.plctlab.org/api/1.2/patches/1535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwn9mqx5q.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:41","name":"[15/17] aarch64: Tweak contents of flags_on/off fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwn9mqx5q.fsf@arm.com/mbox/"},{"id":1538,"url":"https://patchwork.plctlab.org/api/1.2/patches/1538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfkaqx5e.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:53","name":"[16/17] aarch64: Tweak handling of -mgeneral-regs-only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfkaqx5e.fsf@arm.com/mbox/"},{"id":1541,"url":"https://patchwork.plctlab.org/api/1.2/patches/1541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7uyqx51.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:43:06","name":"[17/17] aarch64: Remove redundant TARGET_* checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7uyqx51.fsf@arm.com/mbox/"},{"id":1542,"url":"https://patchwork.plctlab.org/api/1.2/patches/1542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6qx3a.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:44:09","name":"[pushed] data-ref: Fix ranges_maybe_overlap_p test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6qx3a.fsf@arm.com/mbox/"},{"id":1543,"url":"https://patchwork.plctlab.org/api/1.2/patches/1543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929110723.277330-1-juzhe.zhong@rivai.ai/","msgid":"<20220929110723.277330-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-29T11:07:23","name":"[Unfinished] Add first-order recurrence autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929110723.277330-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1544,"url":"https://patchwork.plctlab.org/api/1.2/patches/1544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org/","msgid":"<31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org>","list_archive_url":null,"date":"2022-09-29T11:43:38","name":"c++: import/export NTTP objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org/mbox/"},{"id":1545,"url":"https://patchwork.plctlab.org/api/1.2/patches/1545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929115423.2725537-1-jwakely@redhat.com/","msgid":"<20220929115423.2725537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-29T11:54:23","name":"[committed] libstdc++: Guard use of new built-in with __has_builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929115423.2725537-1-jwakely@redhat.com/mbox/"},{"id":1546,"url":"https://patchwork.plctlab.org/api/1.2/patches/1546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929144912.21826-1-soeren@soeren-tempel.net/","msgid":"<20220929144912.21826-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-09-29T14:49:12","name":"libgo: use _off_t for mmap offset argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929144912.21826-1-soeren@soeren-tempel.net/mbox/"},{"id":1548,"url":"https://patchwork.plctlab.org/api/1.2/patches/1548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145727.269135-1-christophe.lyon@arm.com/","msgid":"<20220929145727.269135-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-09-29T14:57:27","name":"testsuite: [arm] Relax expected register names in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145727.269135-1-christophe.lyon@arm.com/mbox/"},{"id":1547,"url":"https://patchwork.plctlab.org/api/1.2/patches/1547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145740.4846-1-shorne@gmail.com/","msgid":"<20220929145740.4846-1-shorne@gmail.com>","list_archive_url":null,"date":"2022-09-29T14:57:40","name":"or1k: Only define TARGET_HAVE_TLS when HAVE_AS_TLS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145740.4846-1-shorne@gmail.com/mbox/"},{"id":1549,"url":"https://patchwork.plctlab.org/api/1.2/patches/1549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929150504.829703-1-ppalka@redhat.com/","msgid":"<20220929150504.829703-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-29T15:05:04","name":"[RFC] c++: streamline process for adding new builtin trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929150504.829703-1-ppalka@redhat.com/mbox/"},{"id":1550,"url":"https://patchwork.plctlab.org/api/1.2/patches/1550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrk05mi3q5.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T15:45:38","name":"[12/15,V2] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrk05mi3q5.fsf_-_@arm.com/mbox/"},{"id":1551,"url":"https://patchwork.plctlab.org/api/1.2/patches/1551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzXABvJX2wl3gHkK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T15:55:50","name":"[RFC] c++, i386, arm, aarch64, libgcc: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzXABvJX2wl3gHkK@tucnak/mbox/"},{"id":1552,"url":"https://patchwork.plctlab.org/api/1.2/patches/1552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9f3e89e-afcb-84b4-7eba-6d029f627012@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T16:29:42","name":"[committed] amdgcn: remove unused variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9f3e89e-afcb-84b4-7eba-6d029f627012@codesourcery.com/mbox/"},{"id":1553,"url":"https://patchwork.plctlab.org/api/1.2/patches/1553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929173809.2234264-1-torbjorn.svensson@foss.st.com/","msgid":"<20220929173809.2234264-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-29T17:38:10","name":"testsuite: /dev/null is not accessible on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929173809.2234264-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1554,"url":"https://patchwork.plctlab.org/api/1.2/patches/1554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929174956.1915381-1-jason@redhat.com/","msgid":"<20220929174956.1915381-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:49:56","name":"[pushed] c++: reduce temporaries in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929174956.1915381-1-jason@redhat.com/mbox/"},{"id":1555,"url":"https://patchwork.plctlab.org/api/1.2/patches/1555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175047.1915926-1-jason@redhat.com/","msgid":"<20220929175047.1915926-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:50:47","name":"[pushed] c++: fix class-valued ?: extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175047.1915926-1-jason@redhat.com/mbox/"},{"id":1556,"url":"https://patchwork.plctlab.org/api/1.2/patches/1556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175120.1916164-1-jason@redhat.com/","msgid":"<20220929175120.1916164-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:51:20","name":"[pushed] c++: check DECL_INITIAL for constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175120.1916164-1-jason@redhat.com/mbox/"},{"id":1557,"url":"https://patchwork.plctlab.org/api/1.2/patches/1557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929180710.2235253-1-torbjorn.svensson@foss.st.com/","msgid":"<20220929180710.2235253-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-29T18:07:11","name":"testsuite: Windows reports errors with CreateProcess","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929180710.2235253-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1558,"url":"https://patchwork.plctlab.org/api/1.2/patches/1558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929191120.1938729-1-jason@redhat.com/","msgid":"<20220929191120.1938729-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T19:11:20","name":"[pushed] c++: fix triviality of class with unsatisfied op=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929191120.1938729-1-jason@redhat.com/mbox/"},{"id":1559,"url":"https://patchwork.plctlab.org/api/1.2/patches/1559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com/","msgid":"<81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-09-29T22:10:28","name":"diagnostics: Fix virtual location for -Wuninitialized [PR69543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com/mbox/"},{"id":1560,"url":"https://patchwork.plctlab.org/api/1.2/patches/1560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85abdd6-5261-49b2-2fbc-6a26644625c1@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:34:52","name":"PR tree-optimization/102892 - Remove undefined behaviour from testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85abdd6-5261-49b2-2fbc-6a26644625c1@redhat.com/mbox/"},{"id":1561,"url":"https://patchwork.plctlab.org/api/1.2/patches/1561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16763009-abeb-5785-80fc-40cd755fef0c@redhat.com/","msgid":"<16763009-abeb-5785-80fc-40cd755fef0c@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:35:09","name":"Audit op1_range and op2_range for undefined LHS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16763009-abeb-5785-80fc-40cd755fef0c@redhat.com/mbox/"},{"id":1562,"url":"https://patchwork.plctlab.org/api/1.2/patches/1562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8178ef8-4fc8-f7c3-80fa-1af995c23d3c@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:35:32","name":"Move class value_relation the header file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8178ef8-4fc8-f7c3-80fa-1af995c23d3c@redhat.com/mbox/"},{"id":1563,"url":"https://patchwork.plctlab.org/api/1.2/patches/1563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55e35d6-332a-87ec-145f-493010748ff8@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:36:01","name":"Track value_relations in GORI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55e35d6-332a-87ec-145f-493010748ff8@redhat.com/mbox/"},{"id":1564,"url":"https://patchwork.plctlab.org/api/1.2/patches/1564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8fde85d-7758-a00e-0cd5-da3283d70189@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:36:53","name":"Refine ranges using relations in GORI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8fde85d-7758-a00e-0cd5-da3283d70189@redhat.com/mbox/"},{"id":1565,"url":"https://patchwork.plctlab.org/api/1.2/patches/1565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b234c9a-5020-c97c-c379-877c4c018293@redhat.com/","msgid":"<9b234c9a-5020-c97c-c379-877c4c018293@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:38:10","name":"Process unsigned overflow relations for plus and minus in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b234c9a-5020-c97c-c379-877c4c018293@redhat.com/mbox/"},{"id":1566,"url":"https://patchwork.plctlab.org/api/1.2/patches/1566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929224945.90798-1-polacek@redhat.com/","msgid":"<20220929224945.90798-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:49:45","name":"c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929224945.90798-1-polacek@redhat.com/mbox/"},{"id":1567,"url":"https://patchwork.plctlab.org/api/1.2/patches/1567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209292259440.527883@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-29T23:00:30","name":"[committed] c: C2x noreturn attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209292259440.527883@digraph.polyomino.org.uk/mbox/"},{"id":1568,"url":"https://patchwork.plctlab.org/api/1.2/patches/1568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930012822.1994426-1-jason@redhat.com/","msgid":"<20220930012822.1994426-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-30T01:28:22","name":"[pushed] c++: reduce redundant TARGET_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930012822.1994426-1-jason@redhat.com/mbox/"},{"id":1569,"url":"https://patchwork.plctlab.org/api/1.2/patches/1569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930020523.21483-1-kito.cheng@sifive.com/","msgid":"<20220930020523.21483-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-09-30T02:05:23","name":"RISC-V: Support --target-help for -mcpu/-mtune","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930020523.21483-1-kito.cheng@sifive.com/mbox/"},{"id":1570,"url":"https://patchwork.plctlab.org/api/1.2/patches/1570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542346DCE5393A1BEDAB13E91569@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-30T06:28:01","name":"Emit discriminators for inlined call sites.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542346DCE5393A1BEDAB13E91569@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1571,"url":"https://patchwork.plctlab.org/api/1.2/patches/1571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930065816.170458-1-juzhe.zhong@rivai.ai/","msgid":"<20220930065816.170458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-30T06:58:16","name":"RISC-V: Introduce RVV header to enable builtin types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930065816.170458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1572,"url":"https://patchwork.plctlab.org/api/1.2/patches/1572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzaYvq2n3/u8oVLd@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T07:20:30","name":"fixincludes: Deal also with the _Float128x cases [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzaYvq2n3/u8oVLd@tucnak/mbox/"},{"id":1574,"url":"https://patchwork.plctlab.org/api/1.2/patches/1574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930080033.70151-1-juzhe.zhong@rivai.ai/","msgid":"<20220930080033.70151-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-30T08:00:33","name":"Add first-order recurrence autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930080033.70151-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1575,"url":"https://patchwork.plctlab.org/api/1.2/patches/1575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com/","msgid":"<1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com>","list_archive_url":null,"date":"2022-09-30T08:00:49","name":"install.texi: gcn - update llvm reqirements, gcn/nvptx - newlib use version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com/mbox/"},{"id":1576,"url":"https://patchwork.plctlab.org/api/1.2/patches/1576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930081806.2252641-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930081806.2252641-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T08:18:06","name":"testsuite: Colon is reserved on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930081806.2252641-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1587,"url":"https://patchwork.plctlab.org/api/1.2/patches/1587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com/","msgid":"<6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com>","list_archive_url":null,"date":"2022-09-30T10:41:19","name":"Fortran: Update use_device_ptr for OpenMP 5.1 [PR105318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com/mbox/"},{"id":1588,"url":"https://patchwork.plctlab.org/api/1.2/patches/1588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930105003.7C8A813776@imap2.suse-dmz.suse.de/","msgid":"<20220930105003.7C8A813776@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-30T10:50:03","name":"tree-optimization/107095 - fix typo in .MASK_STORE DSE handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930105003.7C8A813776@imap2.suse-dmz.suse.de/mbox/"},{"id":1589,"url":"https://patchwork.plctlab.org/api/1.2/patches/1589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930111938.354664-1-christophe.lyon@arm.com/","msgid":"<20220930111938.354664-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-09-30T11:19:38","name":"[v2] testsuite: [arm] Relax expected register names in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930111938.354664-1-christophe.lyon@arm.com/mbox/"},{"id":1595,"url":"https://patchwork.plctlab.org/api/1.2/patches/1595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930134620.106589-1-jwakely@redhat.com/","msgid":"<20220930134620.106589-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T13:46:20","name":"[committed] libstdc++: Add missing include to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930134620.106589-1-jwakely@redhat.com/mbox/"},{"id":1597,"url":"https://patchwork.plctlab.org/api/1.2/patches/1597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930153845.2268381-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930153845.2268381-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T15:38:46","name":"testsuite: Windows paths use \\ and not /","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930153845.2268381-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1598,"url":"https://patchwork.plctlab.org/api/1.2/patches/1598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930162212.2270178-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930162212.2270178-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T16:22:13","name":"[v3] testsuite: Only run test on target if VMA == LMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930162212.2270178-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1599,"url":"https://patchwork.plctlab.org/api/1.2/patches/1599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzcbZogl8uzaBpc6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T16:37:58","name":"openmp: Add begin declare target support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzcbZogl8uzaBpc6@tucnak/mbox/"},{"id":1600,"url":"https://patchwork.plctlab.org/api/1.2/patches/1600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-2-arsen@aarsen.me/","msgid":"<20220930164556.1198044-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:47","name":"[01/10] libstdc++: Make _GLIBCXX_HOSTED respect -ffreestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-2-arsen@aarsen.me/mbox/"},{"id":1602,"url":"https://patchwork.plctlab.org/api/1.2/patches/1602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-3-arsen@aarsen.me/","msgid":"<20220930164556.1198044-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:48","name":"[02/10] libstdc++: Filter out unconditional default include","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-3-arsen@aarsen.me/mbox/"},{"id":1603,"url":"https://patchwork.plctlab.org/api/1.2/patches/1603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-4-arsen@aarsen.me/","msgid":"<20220930164556.1198044-4-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:49","name":"[03/10] libstdc++: Adjust precompiled headers for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-4-arsen@aarsen.me/mbox/"},{"id":1606,"url":"https://patchwork.plctlab.org/api/1.2/patches/1606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-5-arsen@aarsen.me/","msgid":"<20220930164556.1198044-5-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:50","name":"[04/10] libstdc++: Mark headers that must be hosted as such [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-5-arsen@aarsen.me/mbox/"},{"id":1601,"url":"https://patchwork.plctlab.org/api/1.2/patches/1601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-6-arsen@aarsen.me/","msgid":"<20220930164556.1198044-6-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:51","name":"[05/10] c-family: Implement new `int main'\'' semantics in freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-6-arsen@aarsen.me/mbox/"},{"id":1604,"url":"https://patchwork.plctlab.org/api/1.2/patches/1604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-7-arsen@aarsen.me/","msgid":"<20220930164556.1198044-7-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:52","name":"[06/10] libstdc++: Rework how freestanding install works [PR106953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-7-arsen@aarsen.me/mbox/"},{"id":1609,"url":"https://patchwork.plctlab.org/api/1.2/patches/1609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-8-arsen@aarsen.me/","msgid":"<20220930164556.1198044-8-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:53","name":"[07/10] libstdc++: Make some tests work on freestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-8-arsen@aarsen.me/mbox/"},{"id":1605,"url":"https://patchwork.plctlab.org/api/1.2/patches/1605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-9-arsen@aarsen.me/","msgid":"<20220930164556.1198044-9-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:54","name":"[08/10] libstdc++: Add effective-target '\''hosted'\'' for testsuite [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-9-arsen@aarsen.me/mbox/"},{"id":1607,"url":"https://patchwork.plctlab.org/api/1.2/patches/1607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-10-arsen@aarsen.me/","msgid":"<20220930164556.1198044-10-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:55","name":"[09/10] libstdc++: Re-enable std::hash in freestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-10-arsen@aarsen.me/mbox/"},{"id":1608,"url":"https://patchwork.plctlab.org/api/1.2/patches/1608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-11-arsen@aarsen.me/","msgid":"<20220930164556.1198044-11-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:56","name":"[10/10] libstdc++: Disable hosted-only tests [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-11-arsen@aarsen.me/mbox/"},{"id":1610,"url":"https://patchwork.plctlab.org/api/1.2/patches/1610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzcjxp+y+yXlUO8y@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T17:13:42","name":"arm, aarch64, csky: Fix C++ ICEs with _Float16 and __fp16 [PR107080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzcjxp+y+yXlUO8y@tucnak/mbox/"},{"id":1611,"url":"https://patchwork.plctlab.org/api/1.2/patches/1611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930172019.1459433-1-ppalka@redhat.com/","msgid":"<20220930172019.1459433-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-30T17:20:19","name":"c++: make some cp_trait_kind switch statements exhaustive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930172019.1459433-1-ppalka@redhat.com/mbox/"},{"id":1613,"url":"https://patchwork.plctlab.org/api/1.2/patches/1613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205708.170313-1-jwakely@redhat.com/","msgid":"<20220930205708.170313-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:08","name":"[committed] libstdc++: Remove non-standard public members in std::bitset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205708.170313-1-jwakely@redhat.com/mbox/"},{"id":1612,"url":"https://patchwork.plctlab.org/api/1.2/patches/1612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205713.170346-1-jwakely@redhat.com/","msgid":"<20220930205713.170346-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:13","name":"[committed] libstdc++: Optimize operator>> for std::bitset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205713.170346-1-jwakely@redhat.com/mbox/"},{"id":1614,"url":"https://patchwork.plctlab.org/api/1.2/patches/1614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205717.170362-1-jwakely@redhat.com/","msgid":"<20220930205717.170362-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:17","name":"[committed] libstdc++: Remove dependency from std::bitset::to_ulong() test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205717.170362-1-jwakely@redhat.com/mbox/"},{"id":1615,"url":"https://patchwork.plctlab.org/api/1.2/patches/1615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930220623.2161990-1-jason@redhat.com/","msgid":"<20220930220623.2161990-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-30T22:06:23","name":"[RFC] c++: fix broken conversion in coroutines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930220623.2161990-1-jason@redhat.com/mbox/"},{"id":1616,"url":"https://patchwork.plctlab.org/api/1.2/patches/1616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com/","msgid":"<44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com>","list_archive_url":null,"date":"2022-09-30T23:05:47","name":"[committed] Minor cleanup/prep in DOM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com/mbox/"},{"id":1617,"url":"https://patchwork.plctlab.org/api/1.2/patches/1617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com/","msgid":"<6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com>","list_archive_url":null,"date":"2022-09-30T23:32:34","name":"[committed] More gimple const/copy propagation opportunities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-09/mbox/"},{"id":10,"url":"https://patchwork.plctlab.org/api/1.2/bundles/10/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-11","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":13283,"url":"https://patchwork.plctlab.org/api/1.2/patches/13283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c12f3e33-3ccc-4c78-20b1-6e64049d74dc@ubuntu.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T15:33:42","name":"[ada] fix libgnat build on x86_64-linux-gnux32 with glibc <= 2.31","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c12f3e33-3ccc-4c78-20b1-6e64049d74dc@ubuntu.com/mbox/"},{"id":13294,"url":"https://patchwork.plctlab.org/api/1.2/patches/13294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-2-gnu@danielengel.com/","msgid":"<20221031154529.3627576-2-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:56","name":"[v7,01/34] Add and restructure function declaration macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-2-gnu@danielengel.com/mbox/"},{"id":13298,"url":"https://patchwork.plctlab.org/api/1.2/patches/13298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-3-gnu@danielengel.com/","msgid":"<20221031154529.3627576-3-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:57","name":"[v7,02/34] Rename THUMB_FUNC_START to THUMB_FUNC_ENTRY","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-3-gnu@danielengel.com/mbox/"},{"id":13302,"url":"https://patchwork.plctlab.org/api/1.2/patches/13302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-4-gnu@danielengel.com/","msgid":"<20221031154529.3627576-4-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:58","name":"[v7,03/34] Fix syntax warnings on conditional instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-4-gnu@danielengel.com/mbox/"},{"id":13295,"url":"https://patchwork.plctlab.org/api/1.2/patches/13295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-5-gnu@danielengel.com/","msgid":"<20221031154529.3627576-5-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:59","name":"[v7,04/34] Reorganize LIB1ASMFUNCS object wrapper macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-5-gnu@danielengel.com/mbox/"},{"id":13299,"url":"https://patchwork.plctlab.org/api/1.2/patches/13299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-6-gnu@danielengel.com/","msgid":"<20221031154529.3627576-6-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:00","name":"[v7,05/34] Add the __HAVE_FEATURE_IT and IT() macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-6-gnu@danielengel.com/mbox/"},{"id":13297,"url":"https://patchwork.plctlab.org/api/1.2/patches/13297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-7-gnu@danielengel.com/","msgid":"<20221031154529.3627576-7-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:01","name":"[v7,06/34] Refactor '\''clz'\'' functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-7-gnu@danielengel.com/mbox/"},{"id":13296,"url":"https://patchwork.plctlab.org/api/1.2/patches/13296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-8-gnu@danielengel.com/","msgid":"<20221031154529.3627576-8-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:02","name":"[v7,07/34] Refactor '\''ctz'\'' functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-8-gnu@danielengel.com/mbox/"},{"id":13301,"url":"https://patchwork.plctlab.org/api/1.2/patches/13301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-9-gnu@danielengel.com/","msgid":"<20221031154529.3627576-9-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:03","name":"[v7,08/34] Refactor 64-bit shift functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-9-gnu@danielengel.com/mbox/"},{"id":13303,"url":"https://patchwork.plctlab.org/api/1.2/patches/13303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-10-gnu@danielengel.com/","msgid":"<20221031154529.3627576-10-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:04","name":"[v7,09/34] Import '\''clz'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-10-gnu@danielengel.com/mbox/"},{"id":13305,"url":"https://patchwork.plctlab.org/api/1.2/patches/13305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-11-gnu@danielengel.com/","msgid":"<20221031154529.3627576-11-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:05","name":"[v7,10/34] Import '\''ctz'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-11-gnu@danielengel.com/mbox/"},{"id":13307,"url":"https://patchwork.plctlab.org/api/1.2/patches/13307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-12-gnu@danielengel.com/","msgid":"<20221031154529.3627576-12-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:06","name":"[v7,11/34] Import 64-bit shift functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-12-gnu@danielengel.com/mbox/"},{"id":13310,"url":"https://patchwork.plctlab.org/api/1.2/patches/13310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-13-gnu@danielengel.com/","msgid":"<20221031154529.3627576-13-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:07","name":"[v7,12/34] Import '\''clrsb'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-13-gnu@danielengel.com/mbox/"},{"id":13308,"url":"https://patchwork.plctlab.org/api/1.2/patches/13308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-14-gnu@danielengel.com/","msgid":"<20221031154529.3627576-14-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:08","name":"[v7,13/34] Import '\''ffs'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-14-gnu@danielengel.com/mbox/"},{"id":13313,"url":"https://patchwork.plctlab.org/api/1.2/patches/13313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-15-gnu@danielengel.com/","msgid":"<20221031154529.3627576-15-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:09","name":"[v7,14/34] Import '\''parity'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-15-gnu@danielengel.com/mbox/"},{"id":13300,"url":"https://patchwork.plctlab.org/api/1.2/patches/13300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-16-gnu@danielengel.com/","msgid":"<20221031154529.3627576-16-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:10","name":"[v7,15/34] Import '\''popcnt'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-16-gnu@danielengel.com/mbox/"},{"id":13311,"url":"https://patchwork.plctlab.org/api/1.2/patches/13311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-17-gnu@danielengel.com/","msgid":"<20221031154529.3627576-17-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:11","name":"[v7,16/34] Refactor Thumb-1 64-bit comparison into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-17-gnu@danielengel.com/mbox/"},{"id":13304,"url":"https://patchwork.plctlab.org/api/1.2/patches/13304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-18-gnu@danielengel.com/","msgid":"<20221031154529.3627576-18-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:12","name":"[v7,17/34] Import 64-bit comparison from CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-18-gnu@danielengel.com/mbox/"},{"id":13309,"url":"https://patchwork.plctlab.org/api/1.2/patches/13309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-19-gnu@danielengel.com/","msgid":"<20221031154529.3627576-19-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:13","name":"[v7,18/34] Merge Thumb-2 optimizations for 64-bit comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-19-gnu@danielengel.com/mbox/"},{"id":13314,"url":"https://patchwork.plctlab.org/api/1.2/patches/13314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-20-gnu@danielengel.com/","msgid":"<20221031154529.3627576-20-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:14","name":"[v7,19/34] Import 32-bit division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-20-gnu@danielengel.com/mbox/"},{"id":13319,"url":"https://patchwork.plctlab.org/api/1.2/patches/13319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-21-gnu@danielengel.com/","msgid":"<20221031154529.3627576-21-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:15","name":"[v7,20/34] Refactor Thumb-1 64-bit division into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-21-gnu@danielengel.com/mbox/"},{"id":13312,"url":"https://patchwork.plctlab.org/api/1.2/patches/13312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-22-gnu@danielengel.com/","msgid":"<20221031154529.3627576-22-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:16","name":"[v7,21/34] Import 64-bit division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-22-gnu@danielengel.com/mbox/"},{"id":13315,"url":"https://patchwork.plctlab.org/api/1.2/patches/13315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-23-gnu@danielengel.com/","msgid":"<20221031154529.3627576-23-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:17","name":"[v7,22/34] Import integer multiplication from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-23-gnu@danielengel.com/mbox/"},{"id":13321,"url":"https://patchwork.plctlab.org/api/1.2/patches/13321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-24-gnu@danielengel.com/","msgid":"<20221031154529.3627576-24-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:18","name":"[v7,23/34] Refactor Thumb-1 float comparison into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-24-gnu@danielengel.com/mbox/"},{"id":13318,"url":"https://patchwork.plctlab.org/api/1.2/patches/13318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-25-gnu@danielengel.com/","msgid":"<20221031154529.3627576-25-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:19","name":"[v7,24/34] Import float comparison from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-25-gnu@danielengel.com/mbox/"},{"id":13316,"url":"https://patchwork.plctlab.org/api/1.2/patches/13316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-26-gnu@danielengel.com/","msgid":"<20221031154529.3627576-26-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:20","name":"[v7,25/34] Refactor Thumb-1 float subtraction into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-26-gnu@danielengel.com/mbox/"},{"id":13323,"url":"https://patchwork.plctlab.org/api/1.2/patches/13323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-27-gnu@danielengel.com/","msgid":"<20221031154529.3627576-27-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:21","name":"[v7,26/34] Import float addition and subtraction from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-27-gnu@danielengel.com/mbox/"},{"id":13328,"url":"https://patchwork.plctlab.org/api/1.2/patches/13328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-28-gnu@danielengel.com/","msgid":"<20221031154529.3627576-28-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:22","name":"[v7,27/34] Import float multiplication from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-28-gnu@danielengel.com/mbox/"},{"id":13329,"url":"https://patchwork.plctlab.org/api/1.2/patches/13329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-29-gnu@danielengel.com/","msgid":"<20221031154529.3627576-29-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:23","name":"[v7,28/34] Import float division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-29-gnu@danielengel.com/mbox/"},{"id":13332,"url":"https://patchwork.plctlab.org/api/1.2/patches/13332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-30-gnu@danielengel.com/","msgid":"<20221031154529.3627576-30-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:24","name":"[v7,29/34] Import integer-to-float conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-30-gnu@danielengel.com/mbox/"},{"id":13334,"url":"https://patchwork.plctlab.org/api/1.2/patches/13334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-31-gnu@danielengel.com/","msgid":"<20221031154529.3627576-31-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:25","name":"[v7,30/34] Import float-to-integer conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-31-gnu@danielengel.com/mbox/"},{"id":13330,"url":"https://patchwork.plctlab.org/api/1.2/patches/13330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-32-gnu@danielengel.com/","msgid":"<20221031154529.3627576-32-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:26","name":"[v7,31/34] Import float<->double conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-32-gnu@danielengel.com/mbox/"},{"id":13335,"url":"https://patchwork.plctlab.org/api/1.2/patches/13335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-33-gnu@danielengel.com/","msgid":"<20221031154529.3627576-33-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:27","name":"[v7,32/34] Import float<->__fp16 conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-33-gnu@danielengel.com/mbox/"},{"id":13327,"url":"https://patchwork.plctlab.org/api/1.2/patches/13327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-34-gnu@danielengel.com/","msgid":"<20221031154529.3627576-34-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:28","name":"[v7,33/34] Drop single-precision Thumb-1 soft-float functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-34-gnu@danielengel.com/mbox/"},{"id":13336,"url":"https://patchwork.plctlab.org/api/1.2/patches/13336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-35-gnu@danielengel.com/","msgid":"<20221031154529.3627576-35-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:29","name":"[v7,34/34] Add -mpure-code support to the CM0 functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-35-gnu@danielengel.com/mbox/"},{"id":13412,"url":"https://patchwork.plctlab.org/api/1.2/patches/13412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031190742.2116564-1-dmalcolm@redhat.com/","msgid":"<20221031190742.2116564-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-31T19:07:42","name":"c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031190742.2116564-1-dmalcolm@redhat.com/mbox/"},{"id":13431,"url":"https://patchwork.plctlab.org/api/1.2/patches/13431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031203310.852924-1-ppalka@redhat.com/","msgid":"<20221031203310.852924-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-31T20:33:10","name":"libstdc++: Implement ranges::as_rvalue_view from P2446R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031203310.852924-1-ppalka@redhat.com/mbox/"},{"id":13440,"url":"https://patchwork.plctlab.org/api/1.2/patches/13440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031210618.695953-1-hjl.tools@gmail.com/","msgid":"<20221031210618.695953-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-31T21:06:18","name":"x86: Track converted/skipped registers in STV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031210618.695953-1-hjl.tools@gmail.com/mbox/"},{"id":13491,"url":"https://patchwork.plctlab.org/api/1.2/patches/13491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487305F99BDE4F531490D69EC369@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T01:20:40","name":"[wwwdocs,GCC13] Mention Intel __bf16 support in AVX512BF16 intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487305F99BDE4F531490D69EC369@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":13492,"url":"https://patchwork.plctlab.org/api/1.2/patches/13492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101012344.1456215-1-jason@redhat.com/","msgid":"<20221101012344.1456215-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-01T01:23:44","name":"[pushed] c++: set TREE_NOTHROW after genericize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101012344.1456215-1-jason@redhat.com/mbox/"},{"id":13530,"url":"https://patchwork.plctlab.org/api/1.2/patches/13530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101061915.1677615-1-chenglulu@loongson.cn/","msgid":"<20221101061915.1677615-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-01T06:19:15","name":"[v2] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101061915.1677615-1-chenglulu@loongson.cn/mbox/"},{"id":13583,"url":"https://patchwork.plctlab.org/api/1.2/patches/13583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2DoqF9dtrknNICD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-01T09:36:40","name":"libstdc++: std::from_chars std::{,b}float16_t support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2DoqF9dtrknNICD@tucnak/mbox/"},{"id":13594,"url":"https://patchwork.plctlab.org/api/1.2/patches/13594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094525.CD8F533E65@hamza.pair.com/","msgid":"<20221101094525.CD8F533E65@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:45:22","name":"[committed] wwwdocs: projects/tree-ssa: Adjust mark up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094525.CD8F533E65@hamza.pair.com/mbox/"},{"id":13595,"url":"https://patchwork.plctlab.org/api/1.2/patches/13595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094640.E321433E61@hamza.pair.com/","msgid":"<20221101094640.E321433E61@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:46:38","name":"[committed] wwwdocs: readings: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094640.E321433E61@hamza.pair.com/mbox/"},{"id":13597,"url":"https://patchwork.plctlab.org/api/1.2/patches/13597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094858.CC1B233E61@hamza.pair.com/","msgid":"<20221101094858.CC1B233E61@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:48:56","name":"[committed] wwwdocs: codingconventions: Move two links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094858.CC1B233E61@hamza.pair.com/mbox/"},{"id":13617,"url":"https://patchwork.plctlab.org/api/1.2/patches/13617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b94b0feb-c5f9-430b-1911-182faa10fe79@acm.org/","msgid":"","list_archive_url":null,"date":"2022-11-01T10:23:18","name":"c++: Reorganize per-scope lambda discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b94b0feb-c5f9-430b-1911-182faa10fe79@acm.org/mbox/"},{"id":13630,"url":"https://patchwork.plctlab.org/api/1.2/patches/13630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101111831.390F033E63@hamza.pair.com/","msgid":"<20221101111831.390F033E63@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T11:18:24","name":"[committed] wwwdocs: *: Remove extraneous whitespaces around headings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101111831.390F033E63@hamza.pair.com/mbox/"},{"id":13638,"url":"https://patchwork.plctlab.org/api/1.2/patches/13638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120102.DDB8833E4C@hamza.pair.com/","msgid":"<20221101120102.DDB8833E4C@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:01:00","name":"[committed] wwwdocs: codingconventions: Properly link to flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120102.DDB8833E4C@hamza.pair.com/mbox/"},{"id":13639,"url":"https://patchwork.plctlab.org/api/1.2/patches/13639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120444.412376-1-chenglulu@loongson.cn/","msgid":"<20221101120444.412376-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-01T12:04:45","name":"[v3] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120444.412376-1-chenglulu@loongson.cn/mbox/"},{"id":13640,"url":"https://patchwork.plctlab.org/api/1.2/patches/13640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120535.7CC5733E13@hamza.pair.com/","msgid":"<20221101120535.7CC5733E13@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:05:33","name":"[committed] wwwdocs: gcc-4.4: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120535.7CC5733E13@hamza.pair.com/mbox/"},{"id":13643,"url":"https://patchwork.plctlab.org/api/1.2/patches/13643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120952.60F9933E4A@hamza.pair.com/","msgid":"<20221101120952.60F9933E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:09:50","name":"[committed] wwwdocs: readings: Switch sourceforge.net sub-sites to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120952.60F9933E4A@hamza.pair.com/mbox/"},{"id":13644,"url":"https://patchwork.plctlab.org/api/1.2/patches/13644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2EOfVFPvNucL8ht@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-01T12:18:05","name":"libstdc++: Shortest denormal hex std::to_chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2EOfVFPvNucL8ht@tucnak/mbox/"},{"id":13655,"url":"https://patchwork.plctlab.org/api/1.2/patches/13655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982542953A831514A369D9883369@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T13:08:18","name":"[AArch64] Cleanup move immediate code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982542953A831514A369D9883369@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":13656,"url":"https://patchwork.plctlab.org/api/1.2/patches/13656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com/","msgid":"<92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:19:11","name":"[COMMITTED] Irange::intersect with nonzero bits can indicate change incorrectly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com/mbox/"},{"id":13657,"url":"https://patchwork.plctlab.org/api/1.2/patches/13657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com/","msgid":"<052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:19:27","name":"[COMMITTED] Allow ranger queries on exit block.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com/mbox/"},{"id":13658,"url":"https://patchwork.plctlab.org/api/1.2/patches/13658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com/","msgid":"<3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:20:00","name":"[COMMITTED] Remove builtin_unreachable in ranger VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com/mbox/"},{"id":13681,"url":"https://patchwork.plctlab.org/api/1.2/patches/13681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/100da11f-424c-71e0-1275-f161b94ffa46@redhat.com/","msgid":"<100da11f-424c-71e0-1275-f161b94ffa46@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:58:00","name":"[COMMITTED] Make ranger the vrp1 default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/100da11f-424c-71e0-1275-f161b94ffa46@redhat.com/mbox/"},{"id":13682,"url":"https://patchwork.plctlab.org/api/1.2/patches/13682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101135941.444266-1-jwakely@redhat.com/","msgid":"<20221101135941.444266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:59:41","name":"doc: Remove outdated reference to \"core\" and front-end downloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101135941.444266-1-jwakely@redhat.com/mbox/"},{"id":13759,"url":"https://patchwork.plctlab.org/api/1.2/patches/13759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-2-amonakov@ispras.ru/","msgid":"<20221101162637.14238-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-01T16:26:36","name":"[1/2] i386: correct x87&SSE division modeling in znver.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-2-amonakov@ispras.ru/mbox/"},{"id":13760,"url":"https://patchwork.plctlab.org/api/1.2/patches/13760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-3-amonakov@ispras.ru/","msgid":"<20221101162637.14238-3-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-01T16:26:37","name":"[2/2] i386: correct x87&SSE multiplication modeling in znver.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-3-amonakov@ispras.ru/mbox/"},{"id":13802,"url":"https://patchwork.plctlab.org/api/1.2/patches/13802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101170156.52672-1-polacek@redhat.com/","msgid":"<20221101170156.52672-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-01T17:01:56","name":"c++: Disable -Wignored-qualifiers for template args [PR107492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101170156.52672-1-polacek@redhat.com/mbox/"},{"id":13813,"url":"https://patchwork.plctlab.org/api/1.2/patches/13813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T17:25:13","name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"},{"id":13829,"url":"https://patchwork.plctlab.org/api/1.2/patches/13829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc4dfa6e-997a-cdd1-4370-1d0ebc0363fd@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T18:04:38","name":"[COMMITTED] PR tree-optimization/107497 - Make sure ssa-name is valid.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc4dfa6e-997a-cdd1-4370-1d0ebc0363fd@redhat.com/mbox/"},{"id":13838,"url":"https://patchwork.plctlab.org/api/1.2/patches/13838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101182537.50407-1-aldyh@redhat.com/","msgid":"<20221101182537.50407-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-01T18:25:37","name":"[COMMITTED,PR,tree-optimization/107490] Handle NANs in op[12]_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101182537.50407-1-aldyh@redhat.com/mbox/"},{"id":13899,"url":"https://patchwork.plctlab.org/api/1.2/patches/13899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101213029.940043-1-ppalka@redhat.com/","msgid":"<20221101213029.940043-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-01T21:30:29","name":"libstdc++: Fix ERANGE behavior for fallback FP std::from_chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101213029.940043-1-ppalka@redhat.com/mbox/"},{"id":13900,"url":"https://patchwork.plctlab.org/api/1.2/patches/13900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3cc7fc1-9fdb-4693-07e6-e6f356cf6b2c@acm.org/","msgid":"","list_archive_url":null,"date":"2022-11-01T21:46:45","name":"c++: per-scope, per-signature lambda discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3cc7fc1-9fdb-4693-07e6-e6f356cf6b2c@acm.org/mbox/"},{"id":13922,"url":"https://patchwork.plctlab.org/api/1.2/patches/13922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101220652.588178-1-polacek@redhat.com/","msgid":"<20221101220652.588178-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-01T22:06:52","name":"c++: Quash -Wdangling-reference for member operator* [PR107488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101220652.588178-1-polacek@redhat.com/mbox/"},{"id":13998,"url":"https://patchwork.plctlab.org/api/1.2/patches/13998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HYqx4zLCNCT0Zy@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:40:43","name":"[1/3] Rework 128-bit complex multiply and divide, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HYqx4zLCNCT0Zy@toto.the-meissners.org/mbox/"},{"id":13999,"url":"https://patchwork.plctlab.org/api/1.2/patches/13999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZFlHH8HuvhGL4@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:42:30","name":"[2/3] Make __float128 use the _Float128 type, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZFlHH8HuvhGL4@toto.the-meissners.org/mbox/"},{"id":14000,"url":"https://patchwork.plctlab.org/api/1.2/patches/14000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZcYMCCcyEADyD@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:44:01","name":"[3/3] Update float 128-bit conversions, PR target/107299.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZcYMCCcyEADyD@toto.the-meissners.org/mbox/"},{"id":14013,"url":"https://patchwork.plctlab.org/api/1.2/patches/14013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102033728.99379-1-hongyu.wang@intel.com/","msgid":"<20221102033728.99379-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-02T03:37:28","name":"[V2] Enable small loop unrolling for O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102033728.99379-1-hongyu.wang@intel.com/mbox/"},{"id":14068,"url":"https://patchwork.plctlab.org/api/1.2/patches/14068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com/","msgid":"<94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-02T07:59:06","name":"vect: Fold LEN_{LOAD,STORE} if it'\''s for the whole vector [PR107412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com/mbox/"},{"id":14070,"url":"https://patchwork.plctlab.org/api/1.2/patches/14070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com/","msgid":"<3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com>","list_archive_url":null,"date":"2022-11-02T08:01:06","name":"testsuite: Fix gen-vect-34.c with vect_masked_load [PR106806]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com/mbox/"},{"id":14123,"url":"https://patchwork.plctlab.org/api/1.2/patches/14123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8nxiurb.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:13:44","name":"builtins: Guard builtins.cc against HUGE_VAL and NAN definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8nxiurb.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":14156,"url":"https://patchwork.plctlab.org/api/1.2/patches/14156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I3pr1Eyn120h1C@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:25:58","name":"libstdc++: Add _Float128 to_chars/from_chars support for x86, ia64 and ppc64le with glibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I3pr1Eyn120h1C@tucnak/mbox/"},{"id":14165,"url":"https://patchwork.plctlab.org/api/1.2/patches/14165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I62a8i1u1I7EaE@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:39:37","name":"libstdc++: _Bfloat16 for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I62a8i1u1I7EaE@tucnak/mbox/"},{"id":14174,"url":"https://patchwork.plctlab.org/api/1.2/patches/14174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102104713.643862-1-richard.purdie@linuxfoundation.org/","msgid":"<20221102104713.643862-1-richard.purdie@linuxfoundation.org>","list_archive_url":null,"date":"2022-11-02T10:47:13","name":"[v2] libcpp: Avoid remapping filenames within directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102104713.643862-1-richard.purdie@linuxfoundation.org/mbox/"},{"id":14215,"url":"https://patchwork.plctlab.org/api/1.2/patches/14215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-2-jiawei@iscas.ac.cn/","msgid":"<20221102125235.2325572-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-02T12:52:34","name":"[RFC] RISC-V: Minimal supports for new extensions in profile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-2-jiawei@iscas.ac.cn/mbox/"},{"id":14216,"url":"https://patchwork.plctlab.org/api/1.2/patches/14216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-3-jiawei@iscas.ac.cn/","msgid":"<20221102125235.2325572-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-02T12:52:35","name":"[RFC] RISC-V: Add profile supports.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-3-jiawei@iscas.ac.cn/mbox/"},{"id":14218,"url":"https://patchwork.plctlab.org/api/1.2/patches/14218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125631.634887-1-jwakely@redhat.com/","msgid":"<20221102125631.634887-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T12:56:31","name":"[committed] libstdc++: Ignore -Wignored-qualifiers warning in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125631.634887-1-jwakely@redhat.com/mbox/"},{"id":14219,"url":"https://patchwork.plctlab.org/api/1.2/patches/14219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125638.634917-1-jwakely@redhat.com/","msgid":"<20221102125638.634917-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T12:56:38","name":"[committed] libstdc++: Remove unnecessary variant member in std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125638.634917-1-jwakely@redhat.com/mbox/"},{"id":14221,"url":"https://patchwork.plctlab.org/api/1.2/patches/14221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102131004.3816486-1-christophe.lyon@arm.com/","msgid":"<20221102131004.3816486-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-02T13:10:04","name":"genmultilib: Add sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102131004.3816486-1-christophe.lyon@arm.com/mbox/"},{"id":14236,"url":"https://patchwork.plctlab.org/api/1.2/patches/14236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102134028.1032216-1-ppalka@redhat.com/","msgid":"<20221102134028.1032216-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-02T13:40:28","name":"libstdc++: Declare const global variables inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102134028.1032216-1-ppalka@redhat.com/mbox/"},{"id":14274,"url":"https://patchwork.plctlab.org/api/1.2/patches/14274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16498-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-02T14:45:39","name":"[1/2] middle-end: Support early break/return auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16498-tamar@arm.com/mbox/"},{"id":14273,"url":"https://patchwork.plctlab.org/api/1.2/patches/14273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2KCrKb019Z1/HgC@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-02T14:46:04","name":"[2/2] AArch64 Add implementation for vector cbranch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2KCrKb019Z1/HgC@arm.com/mbox/"},{"id":14277,"url":"https://patchwork.plctlab.org/api/1.2/patches/14277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102145904.2958916-1-christoph.muellner@vrull.eu/","msgid":"<20221102145904.2958916-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-02T14:59:04","name":"[wwwdocs] gcc-13: riscv: Document the Zawrs support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102145904.2958916-1-christoph.muellner@vrull.eu/mbox/"},{"id":14313,"url":"https://patchwork.plctlab.org/api/1.2/patches/14313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com/","msgid":"<9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com>","list_archive_url":null,"date":"2022-11-02T15:57:56","name":"Fortran/OpenMP: Fix DT struct-component with '\''alloc'\'' and array descr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com/mbox/"},{"id":14318,"url":"https://patchwork.plctlab.org/api/1.2/patches/14318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102160308.3675197-1-torbjorn.svensson@foss.st.com/","msgid":"<20221102160308.3675197-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-02T16:03:09","name":"[v2] c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102160308.3675197-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":14455,"url":"https://patchwork.plctlab.org/api/1.2/patches/14455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102190819.862078-1-hjl.tools@gmail.com/","msgid":"<20221102190819.862078-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-11-02T19:08:19","name":"Extend optimization for integer bit test on __atomic_fetch_[or|and]_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102190819.862078-1-hjl.tools@gmail.com/mbox/"},{"id":14472,"url":"https://patchwork.plctlab.org/api/1.2/patches/14472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877d0dktqv.fsf@euler.schwinge.homeip.net/","msgid":"<877d0dktqv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:04:56","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-1.f90'\'' (was: [gomp4] add support for fortran allocate support with declare create)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877d0dktqv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14473,"url":"https://patchwork.plctlab.org/api/1.2/patches/14473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jvhktgx.fsf@euler.schwinge.homeip.net/","msgid":"<874jvhktgx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:10:54","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-1-runtime.f90'\'' (was: Add '\''libgomp.oacc-fortran/declare-allocatable-1.f90'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jvhktgx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14474,"url":"https://patchwork.plctlab.org/api/1.2/patches/14474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qqlkt98.fsf@euler.schwinge.homeip.net/","msgid":"<871qqlkt98.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:15:31","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-array_descriptor-1-runtime.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qqlkt98.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14475,"url":"https://patchwork.plctlab.org/api/1.2/patches/14475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1stjeda.fsf@euler.schwinge.homeip.net/","msgid":"<87y1stjeda.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:22:25","name":"Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part I [PR106643]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1stjeda.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14476,"url":"https://patchwork.plctlab.org/api/1.2/patches/14476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102203332.672558-1-jwakely@redhat.com/","msgid":"<20221102203332.672558-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T20:33:32","name":"[committed] libstdc++: Remove more redundant union members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102203332.672558-1-jwakely@redhat.com/mbox/"},{"id":14477,"url":"https://patchwork.plctlab.org/api/1.2/patches/14477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu3hjdt6.fsf@euler.schwinge.homeip.net/","msgid":"<87tu3hjdt6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:34:29","name":"Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part II [PR106643, PR96668] (was: Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part I [PR106643])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu3hjdt6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14493,"url":"https://patchwork.plctlab.org/api/1.2/patches/14493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-2-git-send-email-apinski@marvell.com/","msgid":"<1667425595-2654-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-02T21:46:34","name":"[1/2] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-2-git-send-email-apinski@marvell.com/mbox/"},{"id":14494,"url":"https://patchwork.plctlab.org/api/1.2/patches/14494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-3-git-send-email-apinski@marvell.com/","msgid":"<1667425595-2654-3-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-02T21:46:35","name":"[2/2] Add assert for type on tree_nonzero_bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-3-git-send-email-apinski@marvell.com/mbox/"},{"id":14612,"url":"https://patchwork.plctlab.org/api/1.2/patches/14612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a2f23bc1-b419-050-2d13-3d162065622@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T02:55:25","name":"[committed] c: C2x auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a2f23bc1-b419-050-2d13-3d162065622@codesourcery.com/mbox/"},{"id":14674,"url":"https://patchwork.plctlab.org/api/1.2/patches/14674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103062657.58427-1-haochen.jiang@intel.com/","msgid":"<20221103062657.58427-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-03T06:26:57","name":"Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103062657.58427-1-haochen.jiang@intel.com/mbox/"},{"id":14784,"url":"https://patchwork.plctlab.org/api/1.2/patches/14784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103093748.2671754-1-torbjorn.svensson@foss.st.com/","msgid":"<20221103093748.2671754-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-03T09:37:49","name":"[v2] c++: Use in-process client when networking is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103093748.2671754-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":14790,"url":"https://patchwork.plctlab.org/api/1.2/patches/14790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103095259.4095606-1-christophe.lyon@arm.com/","msgid":"<20221103095259.4095606-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-03T09:52:59","name":"[v2] genmultilib: Add sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103095259.4095606-1-christophe.lyon@arm.com/mbox/"},{"id":14826,"url":"https://patchwork.plctlab.org/api/1.2/patches/14826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103114152.708336-1-jwakely@redhat.com/","msgid":"<20221103114152.708336-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-03T11:41:52","name":"[committed] libstdc++: Add missing move in ranges::copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103114152.708336-1-jwakely@redhat.com/mbox/"},{"id":14843,"url":"https://patchwork.plctlab.org/api/1.2/patches/14843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103123340.1402161-1-ppalka@redhat.com/","msgid":"<20221103123340.1402161-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-03T12:33:40","name":"c++: constexpr error with defaulted virtual dtor [PR93413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103123340.1402161-1-ppalka@redhat.com/mbox/"},{"id":14873,"url":"https://patchwork.plctlab.org/api/1.2/patches/14873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aPtttQkEet6+FDeCkw4TJ+zSt-vT+Jy822vM=uh+PPfA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T13:23:03","name":"i386: Fix uninitialized register after peephole2 conversion [PR107404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aPtttQkEet6+FDeCkw4TJ+zSt-vT+Jy822vM=uh+PPfA@mail.gmail.com/mbox/"},{"id":14874,"url":"https://patchwork.plctlab.org/api/1.2/patches/14874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com/","msgid":"<23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com>","list_archive_url":null,"date":"2022-11-03T13:35:03","name":"OpenMP/Fortran: '\''target update'\'' with DT components (was: [Patch] OpenMP/Fortran: '\''target update'\'' with strides + DT components)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com/mbox/"},{"id":14878,"url":"https://patchwork.plctlab.org/api/1.2/patches/14878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com/","msgid":"<785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com>","list_archive_url":null,"date":"2022-11-03T13:43:06","name":"ifcvt: Support bitfield lowering of multiple-exit loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com/mbox/"},{"id":14919,"url":"https://patchwork.plctlab.org/api/1.2/patches/14919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103142440.2260186-1-dmalcolm@redhat.com/","msgid":"<20221103142440.2260186-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T14:24:40","name":"[committed] analyzer: fix ICE when pipe'\''s arg isn'\''t a pointer [PR107486]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103142440.2260186-1-dmalcolm@redhat.com/mbox/"},{"id":14953,"url":"https://patchwork.plctlab.org/api/1.2/patches/14953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103154530.1442773-1-ppalka@redhat.com/","msgid":"<20221103154530.1442773-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-03T15:45:30","name":"c++: requires-expr substitution and access checking [PR107179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103154530.1442773-1-ppalka@redhat.com/mbox/"},{"id":15019,"url":"https://patchwork.plctlab.org/api/1.2/patches/15019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com/","msgid":"<6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com>","list_archive_url":null,"date":"2022-11-03T16:49:31","name":"[COMMITTED] Update range query cache when a statement is updated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com/mbox/"},{"id":15039,"url":"https://patchwork.plctlab.org/api/1.2/patches/15039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f06aa3e6-99ac-bf5e-139b-c7686410db5b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T17:47:35","name":"amdgcn: Fix instruction generation for exp2 and log2 operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f06aa3e6-99ac-bf5e-139b-c7686410db5b@codesourcery.com/mbox/"},{"id":15054,"url":"https://patchwork.plctlab.org/api/1.2/patches/15054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-2-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:28","name":"[committed,1/8] analyzer: use std::unique_ptr for pending_diagnostic/note","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-2-dmalcolm@redhat.com/mbox/"},{"id":15049,"url":"https://patchwork.plctlab.org/api/1.2/patches/15049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-3-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:29","name":"[committed,2/8] analyzer: use std::unique_ptr for saved_diagnostic::m_stmt_finder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-3-dmalcolm@redhat.com/mbox/"},{"id":15051,"url":"https://patchwork.plctlab.org/api/1.2/patches/15051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-4-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:30","name":"[committed,3/8] analyzer: use std::unique_ptr for custom_edge_info pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-4-dmalcolm@redhat.com/mbox/"},{"id":15050,"url":"https://patchwork.plctlab.org/api/1.2/patches/15050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-5-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:31","name":"[committed,4/8] analyzer: use std::unique_ptr for feasibility_problems and exploded_path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-5-dmalcolm@redhat.com/mbox/"},{"id":15055,"url":"https://patchwork.plctlab.org/api/1.2/patches/15055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-6-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:32","name":"[committed,5/8] analyzer: use std::unique_ptr for checker_event","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-6-dmalcolm@redhat.com/mbox/"},{"id":15053,"url":"https://patchwork.plctlab.org/api/1.2/patches/15053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-7-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:33","name":"[committed,6/8] analyzer: use std::unique_ptr during bifurcation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-7-dmalcolm@redhat.com/mbox/"},{"id":15052,"url":"https://patchwork.plctlab.org/api/1.2/patches/15052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-8-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-8-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:34","name":"[committed,7/8] analyzer: use std::unique_ptr for known functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-8-dmalcolm@redhat.com/mbox/"},{"id":15056,"url":"https://patchwork.plctlab.org/api/1.2/patches/15056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-9-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-9-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:35","name":"[committed,8/8] analyzer: use std::unique_ptr for state machines from plugins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-9-dmalcolm@redhat.com/mbox/"},{"id":15102,"url":"https://patchwork.plctlab.org/api/1.2/patches/15102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103185238.2104412-1-jason@redhat.com/","msgid":"<20221103185238.2104412-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T18:52:38","name":"[pushed] c++: change -fconcepts to mean C++20 concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103185238.2104412-1-jason@redhat.com/mbox/"},{"id":15126,"url":"https://patchwork.plctlab.org/api/1.2/patches/15126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103192646.2108551-1-jason@redhat.com/","msgid":"<20221103192646.2108551-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:26:46","name":"[pushed] c++: change -fconcepts to mean C++20 concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103192646.2108551-1-jason@redhat.com/mbox/"},{"id":15127,"url":"https://patchwork.plctlab.org/api/1.2/patches/15127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com/","msgid":"<8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:28:59","name":"[COMMITTED] Add testcases resolved with ranger as VRP1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com/mbox/"},{"id":15152,"url":"https://patchwork.plctlab.org/api/1.2/patches/15152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195750.2113734-1-jason@redhat.com/","msgid":"<20221103195750.2113734-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:57:50","name":"[RFA] libstdc++: add experimental Contracts support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195750.2113734-1-jason@redhat.com/mbox/"},{"id":15153,"url":"https://patchwork.plctlab.org/api/1.2/patches/15153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195902.2114479-1-jason@redhat.com/","msgid":"<20221103195902.2114479-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:59:02","name":"[RFA] input: add get_source_text_between","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195902.2114479-1-jason@redhat.com/mbox/"},{"id":15185,"url":"https://patchwork.plctlab.org/api/1.2/patches/15185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103204741.516199-1-aldot@gcc.gnu.org/","msgid":"<20221103204741.516199-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-03T20:47:41","name":"cgraph_node: Remove redundant section clearing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103204741.516199-1-aldot@gcc.gnu.org/mbox/"},{"id":15194,"url":"https://patchwork.plctlab.org/api/1.2/patches/15194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103210049.516886-1-aldot@gcc.gnu.org/","msgid":"<20221103210049.516886-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-03T21:00:49","name":"Plug memory leak in attribute target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103210049.516886-1-aldot@gcc.gnu.org/mbox/"},{"id":15227,"url":"https://patchwork.plctlab.org/api/1.2/patches/15227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103232355.5eb1d235@nbbrfq/","msgid":"<20221103232355.5eb1d235@nbbrfq>","list_archive_url":null,"date":"2022-11-03T22:23:55","name":"RFH: attr target_clones default assembler name ignored?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103232355.5eb1d235@nbbrfq/mbox/"},{"id":15262,"url":"https://patchwork.plctlab.org/api/1.2/patches/15262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104000432.15254-1-hongyu.wang@intel.com/","msgid":"<20221104000432.15254-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-04T00:04:32","name":"Optimize VEC_PERM_EXPR with same permutation index and operation [PR98167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104000432.15254-1-hongyu.wang@intel.com/mbox/"},{"id":15264,"url":"https://patchwork.plctlab.org/api/1.2/patches/15264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104005331.775049-1-kevinl@rivosinc.com/","msgid":"<20221104005331.775049-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-04T00:53:31","name":"[v3] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104005331.775049-1-kevinl@rivosinc.com/mbox/"},{"id":15382,"url":"https://patchwork.plctlab.org/api/1.2/patches/15382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104063942.1594844-1-xry111@xry111.site/","msgid":"<20221104063942.1594844-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-04T06:39:41","name":"LoongArch: fix signed overflow in loongarch_emit_int_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104063942.1594844-1-xry111@xry111.site/mbox/"},{"id":15412,"url":"https://patchwork.plctlab.org/api/1.2/patches/15412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104074632.19951-1-haochen.jiang@intel.com/","msgid":"<20221104074632.19951-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-04T07:46:32","name":"Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104074632.19951-1-haochen.jiang@intel.com/mbox/"},{"id":15419,"url":"https://patchwork.plctlab.org/api/1.2/patches/15419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104081150.22062-1-haochen.jiang@intel.com/","msgid":"<20221104081150.22062-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-04T08:11:50","name":"Initial Granite Rapids support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104081150.22062-1-haochen.jiang@intel.com/mbox/"},{"id":15428,"url":"https://patchwork.plctlab.org/api/1.2/patches/15428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TVUXHelLjgA8Yq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:03:13","name":"libcpp: Update to Unicode 15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TVUXHelLjgA8Yq@tucnak/mbox/"},{"id":15429,"url":"https://patchwork.plctlab.org/api/1.2/patches/15429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pme32idj.fsf@euler.schwinge.homeip.net/","msgid":"<87pme32idj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-04T09:12:24","name":"Better integrate default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'' (was: Restore default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pme32idj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":15430,"url":"https://patchwork.plctlab.org/api/1.2/patches/15430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TX+6SSEZw1fIsz@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:14:35","name":"testsuite: Add testcase from C++23 P2314R4 - Character sets and encodings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TX+6SSEZw1fIsz@tucnak/mbox/"},{"id":15434,"url":"https://patchwork.plctlab.org/api/1.2/patches/15434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7447720.EvYhyI6sBW@fomalhaut/","msgid":"<7447720.EvYhyI6sBW@fomalhaut>","list_archive_url":null,"date":"2022-11-04T09:27:23","name":"Fix recent thinko in operand_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7447720.EvYhyI6sBW@fomalhaut/mbox/"},{"id":15444,"url":"https://patchwork.plctlab.org/api/1.2/patches/15444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rkr12mj.fsf@oldenburg.str.redhat.com/","msgid":"<878rkr12mj.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-11-04T09:37:56","name":"[v2] libgcc: Mostly vectorize CIE encoding extraction for FDEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rkr12mj.fsf@oldenburg.str.redhat.com/mbox/"},{"id":15449,"url":"https://patchwork.plctlab.org/api/1.2/patches/15449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRY=KG-cL4GtX-wZBKd06WjNtDyeTLPDgL8WvzkJaoJDzA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:51:17","name":"Update Affiliation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRY=KG-cL4GtX-wZBKd06WjNtDyeTLPDgL8WvzkJaoJDzA@mail.gmail.com/mbox/"},{"id":15451,"url":"https://patchwork.plctlab.org/api/1.2/patches/15451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cza32fxi.fsf@euler.schwinge.homeip.net/","msgid":"<87cza32fxi.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-04T10:05:13","name":"GCC 13: OpenMP offloading to Intel MIC has been removed (was: Remove support for Intel MIC offloading)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cza32fxi.fsf@euler.schwinge.homeip.net/mbox/"},{"id":15489,"url":"https://patchwork.plctlab.org/api/1.2/patches/15489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104121734.828189-1-jwakely@redhat.com/","msgid":"<20221104121734.828189-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T12:17:34","name":"doc: Document correct -fwide-exec-charset defaults [PR41041]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104121734.828189-1-jwakely@redhat.com/mbox/"},{"id":15504,"url":"https://patchwork.plctlab.org/api/1.2/patches/15504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104124800.910588-1-siddhesh@gotplt.org/","msgid":"<20221104124800.910588-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-11-04T12:48:00","name":"[v2] tree-object-size: Support strndup and strdup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104124800.910588-1-siddhesh@gotplt.org/mbox/"},{"id":15524,"url":"https://patchwork.plctlab.org/api/1.2/patches/15524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com/","msgid":"<44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:09","name":"[1/6] diagnostics: Fix macro tracking for ad-hoc locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15526,"url":"https://patchwork.plctlab.org/api/1.2/patches/15526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com/","msgid":"<65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:10","name":"[2/6] diagnostics: Use an inline function rather than hardcoding string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15525,"url":"https://patchwork.plctlab.org/api/1.2/patches/15525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com/","msgid":"<2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:11","name":"[3/6] libcpp: Fix paste error with unknown pragma after macro expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15527,"url":"https://patchwork.plctlab.org/api/1.2/patches/15527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbe5ba2a7d067eb725c0733ca3960fab969cf139.1667514153.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T13:44:12","name":"[4/6] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbe5ba2a7d067eb725c0733ca3960fab969cf139.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15528,"url":"https://patchwork.plctlab.org/api/1.2/patches/15528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bef0a344e3c76fa7deb8d3fbb9fcfb8cd2257f97.1667514153.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T13:44:13","name":"[5/6] diagnostics: Support generated data in additional contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bef0a344e3c76fa7deb8d3fbb9fcfb8cd2257f97.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15529,"url":"https://patchwork.plctlab.org/api/1.2/patches/15529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com/","msgid":"<3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:14","name":"[6/6] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15530,"url":"https://patchwork.plctlab.org/api/1.2/patches/15530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135338.85230-1-poulhies@adacore.com/","msgid":"<20221104135338.85230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:53:38","name":"[COMMITTED] ada: Generate host-side CUDA_Register_Function calls for device'\''s adainit/adafinal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135338.85230-1-poulhies@adacore.com/mbox/"},{"id":15531,"url":"https://patchwork.plctlab.org/api/1.2/patches/15531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135347.85341-1-poulhies@adacore.com/","msgid":"<20221104135347.85341-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:53:47","name":"[COMMITTED] ada: Reject expanded global names in lock-free protected objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135347.85341-1-poulhies@adacore.com/mbox/"},{"id":15533,"url":"https://patchwork.plctlab.org/api/1.2/patches/15533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135418.85406-1-poulhies@adacore.com/","msgid":"<20221104135418.85406-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:54:18","name":"[COMMITTED] ada: Remove VxWorks 6 and VxWorks 653 2.x content from the UGX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135418.85406-1-poulhies@adacore.com/mbox/"},{"id":15532,"url":"https://patchwork.plctlab.org/api/1.2/patches/15532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135427.85477-1-poulhies@adacore.com/","msgid":"<20221104135427.85477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:54:27","name":"[COMMITTED] ada: Support lock-free protected objects with pragma Initialize_Scalars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135427.85477-1-poulhies@adacore.com/mbox/"},{"id":15534,"url":"https://patchwork.plctlab.org/api/1.2/patches/15534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135551.85648-1-poulhies@adacore.com/","msgid":"<20221104135551.85648-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:55:51","name":"[COMMITTED] ada: Generate missing object decls for adainit/adafinal registration calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135551.85648-1-poulhies@adacore.com/mbox/"},{"id":15536,"url":"https://patchwork.plctlab.org/api/1.2/patches/15536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135613.85774-1-poulhies@adacore.com/","msgid":"<20221104135613.85774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:13","name":"[COMMITTED] ada: Allow enabling a restricted set of language extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135613.85774-1-poulhies@adacore.com/mbox/"},{"id":15540,"url":"https://patchwork.plctlab.org/api/1.2/patches/15540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135622.85834-1-poulhies@adacore.com/","msgid":"<20221104135622.85834-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:22","name":"[COMMITTED] ada: Small editorial changes to documentation comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135622.85834-1-poulhies@adacore.com/mbox/"},{"id":15545,"url":"https://patchwork.plctlab.org/api/1.2/patches/15545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135628.85893-1-poulhies@adacore.com/","msgid":"<20221104135628.85893-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:28","name":"[COMMITTED] ada: Improve efficiency of scope stack restoration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135628.85893-1-poulhies@adacore.com/mbox/"},{"id":15550,"url":"https://patchwork.plctlab.org/api/1.2/patches/15550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135636.85954-1-poulhies@adacore.com/","msgid":"<20221104135636.85954-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:36","name":"[COMMITTED] ada: Fix various typos in GNAT RM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135636.85954-1-poulhies@adacore.com/mbox/"},{"id":15537,"url":"https://patchwork.plctlab.org/api/1.2/patches/15537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135643.86019-1-poulhies@adacore.com/","msgid":"<20221104135643.86019-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:43","name":"[COMMITTED] ada: Fix various typos in node and entity description comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135643.86019-1-poulhies@adacore.com/mbox/"},{"id":15538,"url":"https://patchwork.plctlab.org/api/1.2/patches/15538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135649.86081-1-poulhies@adacore.com/","msgid":"<20221104135649.86081-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:49","name":"[COMMITTED] ada: Refactor: replace uses of `not Present(X)` with `No (X)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135649.86081-1-poulhies@adacore.com/mbox/"},{"id":15554,"url":"https://patchwork.plctlab.org/api/1.2/patches/15554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135654.86140-1-poulhies@adacore.com/","msgid":"<20221104135654.86140-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:54","name":"[COMMITTED] ada: Remove sa_messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135654.86140-1-poulhies@adacore.com/mbox/"},{"id":15542,"url":"https://patchwork.plctlab.org/api/1.2/patches/15542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135702.86200-1-poulhies@adacore.com/","msgid":"<20221104135702.86200-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:02","name":"[COMMITTED] ada: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135702.86200-1-poulhies@adacore.com/mbox/"},{"id":15544,"url":"https://patchwork.plctlab.org/api/1.2/patches/15544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135708.86262-1-poulhies@adacore.com/","msgid":"<20221104135708.86262-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:08","name":"[COMMITTED] ada: Skip dynamic interface conversion under configurable runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135708.86262-1-poulhies@adacore.com/mbox/"},{"id":15549,"url":"https://patchwork.plctlab.org/api/1.2/patches/15549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135713.86322-1-poulhies@adacore.com/","msgid":"<20221104135713.86322-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:13","name":"[COMMITTED] ada: Skip dynamic interface conversion under configurable runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135713.86322-1-poulhies@adacore.com/mbox/"},{"id":15553,"url":"https://patchwork.plctlab.org/api/1.2/patches/15553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135721.86383-1-poulhies@adacore.com/","msgid":"<20221104135721.86383-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:21","name":"[COMMITTED] ada: Simplify detection of controlling formals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135721.86383-1-poulhies@adacore.com/mbox/"},{"id":15558,"url":"https://patchwork.plctlab.org/api/1.2/patches/15558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135728.86443-1-poulhies@adacore.com/","msgid":"<20221104135728.86443-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:28","name":"[COMMITTED] ada: Fix repeated killing of private entity values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135728.86443-1-poulhies@adacore.com/mbox/"},{"id":15541,"url":"https://patchwork.plctlab.org/api/1.2/patches/15541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135734.86504-1-poulhies@adacore.com/","msgid":"<20221104135734.86504-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:34","name":"[COMMITTED] ada: Fix loop unnesting issue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135734.86504-1-poulhies@adacore.com/mbox/"},{"id":15560,"url":"https://patchwork.plctlab.org/api/1.2/patches/15560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135743.86571-1-poulhies@adacore.com/","msgid":"<20221104135743.86571-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:43","name":"[COMMITTED] ada: Fix various typos in GNAT User'\''s Guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135743.86571-1-poulhies@adacore.com/mbox/"},{"id":15547,"url":"https://patchwork.plctlab.org/api/1.2/patches/15547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135752.86633-1-poulhies@adacore.com/","msgid":"<20221104135752.86633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:52","name":"[COMMITTED] ada: Cleanup clearing flags on package variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135752.86633-1-poulhies@adacore.com/mbox/"},{"id":15552,"url":"https://patchwork.plctlab.org/api/1.2/patches/15552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135801.86694-1-poulhies@adacore.com/","msgid":"<20221104135801.86694-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:01","name":"[COMMITTED] ada: Avoid repeated iteration over private protected components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135801.86694-1-poulhies@adacore.com/mbox/"},{"id":15556,"url":"https://patchwork.plctlab.org/api/1.2/patches/15556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135810.86760-1-poulhies@adacore.com/","msgid":"<20221104135810.86760-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:10","name":"[COMMITTED] ada: Flag unsupported dispatching constructor calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135810.86760-1-poulhies@adacore.com/mbox/"},{"id":15546,"url":"https://patchwork.plctlab.org/api/1.2/patches/15546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135815.86869-1-poulhies@adacore.com/","msgid":"<20221104135815.86869-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:15","name":"[COMMITTED] ada: Remove redundant calls in handling of aspect specifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135815.86869-1-poulhies@adacore.com/mbox/"},{"id":15551,"url":"https://patchwork.plctlab.org/api/1.2/patches/15551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135824.86935-1-poulhies@adacore.com/","msgid":"<20221104135824.86935-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:24","name":"[COMMITTED] ada: Static intrinsic functions are a core language extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135824.86935-1-poulhies@adacore.com/mbox/"},{"id":15562,"url":"https://patchwork.plctlab.org/api/1.2/patches/15562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135831.86995-1-poulhies@adacore.com/","msgid":"<20221104135831.86995-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:31","name":"[COMMITTED] ada: Cleanup code for warnings about unset references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135831.86995-1-poulhies@adacore.com/mbox/"},{"id":15564,"url":"https://patchwork.plctlab.org/api/1.2/patches/15564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135838.87055-1-poulhies@adacore.com/","msgid":"<20221104135838.87055-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:38","name":"[COMMITTED] ada: Cleanup code for unreferenced variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135838.87055-1-poulhies@adacore.com/mbox/"},{"id":15555,"url":"https://patchwork.plctlab.org/api/1.2/patches/15555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135844.87117-1-poulhies@adacore.com/","msgid":"<20221104135844.87117-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:44","name":"[COMMITTED] ada: Cleanup code for warnings about unreferenced formal parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135844.87117-1-poulhies@adacore.com/mbox/"},{"id":15559,"url":"https://patchwork.plctlab.org/api/1.2/patches/15559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135850.87177-1-poulhies@adacore.com/","msgid":"<20221104135850.87177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:50","name":"[COMMITTED] ada: Fix typo in comment referring to pragma Restrictions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135850.87177-1-poulhies@adacore.com/mbox/"},{"id":15561,"url":"https://patchwork.plctlab.org/api/1.2/patches/15561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135856.87236-1-poulhies@adacore.com/","msgid":"<20221104135856.87236-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:56","name":"[COMMITTED] ada: Fix couple of issues with arrays indexed by enumeration type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135856.87236-1-poulhies@adacore.com/mbox/"},{"id":15563,"url":"https://patchwork.plctlab.org/api/1.2/patches/15563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135903.87298-1-poulhies@adacore.com/","msgid":"<20221104135903.87298-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:59:03","name":"[COMMITTED] ada: Fix for validity checks combined with aliasing checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135903.87298-1-poulhies@adacore.com/mbox/"},{"id":15565,"url":"https://patchwork.plctlab.org/api/1.2/patches/15565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140612.834725-1-jwakely@redhat.com/","msgid":"<20221104140612.834725-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:06:12","name":"[committed] libstdc++: Define _GNU_SOURCE for secure_getenv on Cygwin [PR107511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140612.834725-1-jwakely@redhat.com/mbox/"},{"id":15573,"url":"https://patchwork.plctlab.org/api/1.2/patches/15573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140618.834765-1-jwakely@redhat.com/","msgid":"<20221104140618.834765-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:06:18","name":"[committed] libstdc++: Simplify lifetime of eh_globals variable [PR107500]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140618.834765-1-jwakely@redhat.com/mbox/"},{"id":15583,"url":"https://patchwork.plctlab.org/api/1.2/patches/15583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104141905.312059-1-aldyh@redhat.com/","msgid":"<20221104141905.312059-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:19:05","name":"[COMMITTED] Set nonzero bits for multiplication and divisions by a power of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104141905.312059-1-aldyh@redhat.com/mbox/"},{"id":15606,"url":"https://patchwork.plctlab.org/api/1.2/patches/15606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104143719.1709284-1-xry111@xry111.site/","msgid":"<20221104143719.1709284-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-04T14:37:19","name":"LoongArch: Add fcopysign instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104143719.1709284-1-xry111@xry111.site/mbox/"},{"id":15607,"url":"https://patchwork.plctlab.org/api/1.2/patches/15607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104144026.2311096-1-jason@redhat.com/","msgid":"<20221104144026.2311096-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:40:26","name":"[RFC] c++: implement P1492 contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104144026.2311096-1-jason@redhat.com/mbox/"},{"id":15628,"url":"https://patchwork.plctlab.org/api/1.2/patches/15628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-1-ppalka@redhat.com/","msgid":"<20221104150525.2968778-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-04T15:05:24","name":"[1/2] c++: correct __has_attribute(init_priority)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-1-ppalka@redhat.com/mbox/"},{"id":15629,"url":"https://patchwork.plctlab.org/api/1.2/patches/15629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-2-ppalka@redhat.com/","msgid":"<20221104150525.2968778-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-04T15:05:25","name":"[2/2] libstdc++: Move stream initialization into compiled library [PR44952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-2-ppalka@redhat.com/mbox/"},{"id":15680,"url":"https://patchwork.plctlab.org/api/1.2/patches/15680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104173920.5313660c@nbbrfq/","msgid":"<20221104173920.5313660c@nbbrfq>","list_archive_url":null,"date":"2022-11-04T16:39:20","name":"symtab: also change RTL decl name [was: RFH: attr target_clones default assembler name ignored?]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104173920.5313660c@nbbrfq/mbox/"},{"id":15708,"url":"https://patchwork.plctlab.org/api/1.2/patches/15708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB3PR08MB89866C068CE122E2FEEF152E833B9@DB3PR08MB8986.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T17:11:40","name":"[committed] AArch64: Fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB3PR08MB89866C068CE122E2FEEF152E833B9@DB3PR08MB8986.eurprd08.prod.outlook.com/mbox/"},{"id":15723,"url":"https://patchwork.plctlab.org/api/1.2/patches/15723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104172537.1039148-1-richard.purdie@linuxfoundation.org/","msgid":"<20221104172537.1039148-1-richard.purdie@linuxfoundation.org>","list_archive_url":null,"date":"2022-11-04T17:25:37","name":"gcc/file-prefix-map: Fix NULL filename handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104172537.1039148-1-richard.purdie@linuxfoundation.org/mbox/"},{"id":15973,"url":"https://patchwork.plctlab.org/api/1.2/patches/15973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105140155.1206577-1-jwakely@redhat.com/","msgid":"<20221105140155.1206577-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-05T14:01:55","name":"[committed] libstdc++: Do not use SFINAE for propagate_const conversions [PR107525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105140155.1206577-1-jwakely@redhat.com/mbox/"},{"id":16012,"url":"https://patchwork.plctlab.org/api/1.2/patches/16012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191021.3081198-1-ibuclaw@gdcproject.org/","msgid":"<20221105191021.3081198-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-05T19:10:21","name":"[committed] d: Add support for vector comparison operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191021.3081198-1-ibuclaw@gdcproject.org/mbox/"},{"id":16013,"url":"https://patchwork.plctlab.org/api/1.2/patches/16013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191906.3087155-1-ibuclaw@gdcproject.org/","msgid":"<20221105191906.3087155-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-05T19:19:06","name":"[committed] d: Adjust attr_register2.d to pass when compiling with -m32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191906.3087155-1-ibuclaw@gdcproject.org/mbox/"},{"id":16039,"url":"https://patchwork.plctlab.org/api/1.2/patches/16039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dee92d68-139c-9a2d-325e-2c3f402291e8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-05T22:28:47","name":"Fortran: Fix reallocation on assignment for kind=4 strings [PR107508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dee92d68-139c-9a2d-325e-2c3f402291e8@codesourcery.com/mbox/"},{"id":16042,"url":"https://patchwork.plctlab.org/api/1.2/patches/16042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225423.AFA9633E1C@hamza.pair.com/","msgid":"<20221105225423.AFA9633E1C@hamza.pair.com>","list_archive_url":null,"date":"2022-11-05T22:54:20","name":"[committed] wwwdocs: codingrationale: Switch www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225423.AFA9633E1C@hamza.pair.com/mbox/"},{"id":16043,"url":"https://patchwork.plctlab.org/api/1.2/patches/16043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225906.CC21733E18@hamza.pair.com/","msgid":"<20221105225906.CC21733E18@hamza.pair.com>","list_archive_url":null,"date":"2022-11-05T22:59:04","name":"[committed] wwwdocs: gcc-4.8: Move three links from http to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225906.CC21733E18@hamza.pair.com/mbox/"},{"id":16054,"url":"https://patchwork.plctlab.org/api/1.2/patches/16054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106000102.18696-1-kito.cheng@sifive.com/","msgid":"<20221106000102.18696-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-11-06T00:01:02","name":"RISC-V: Fix RVV related testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106000102.18696-1-kito.cheng@sifive.com/mbox/"},{"id":16102,"url":"https://patchwork.plctlab.org/api/1.2/patches/16102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106085633.267351-1-juzhe.zhong@rivai.ai/","msgid":"<20221106085633.267351-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-06T08:56:33","name":"RISC-V: Add RVV registers register spilling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106085633.267351-1-juzhe.zhong@rivai.ai/mbox/"},{"id":16132,"url":"https://patchwork.plctlab.org/api/1.2/patches/16132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870D12EAC564A973CA9788EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-06T12:55:41","name":"Support Intel RAO-INT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870D12EAC564A973CA9788EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16133,"url":"https://patchwork.plctlab.org/api/1.2/patches/16133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487D12DCC77C6F69B1B6775EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-06T12:59:25","name":"i386: Prefer remote atomic insn for atomic_fetch{add, and, or, xor}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487D12DCC77C6F69B1B6775EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16157,"url":"https://patchwork.plctlab.org/api/1.2/patches/16157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106161420.522485-1-aldyh@redhat.com/","msgid":"<20221106161420.522485-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-06T16:14:20","name":"Use bit-CCP in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106161420.522485-1-aldyh@redhat.com/mbox/"},{"id":16212,"url":"https://patchwork.plctlab.org/api/1.2/patches/16212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-2-haochen.jiang@intel.com/","msgid":"<20221107014114.71155-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-07T01:41:13","name":"[1/2] Initial Grand Ridge support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-2-haochen.jiang@intel.com/mbox/"},{"id":16213,"url":"https://patchwork.plctlab.org/api/1.2/patches/16213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-3-haochen.jiang@intel.com/","msgid":"<20221107014114.71155-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-07T01:41:14","name":"[2/2] Add m_CORE_ATOM for atom cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-3-haochen.jiang@intel.com/mbox/"},{"id":16262,"url":"https://patchwork.plctlab.org/api/1.2/patches/16262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com/","msgid":"<91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com>","list_archive_url":null,"date":"2022-11-07T06:45:05","name":"[v4,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com/mbox/"},{"id":16292,"url":"https://patchwork.plctlab.org/api/1.2/patches/16292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2i/dVyDDbzKHeoO@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:19:01","name":"libstdc++: Update from latest fast_float [PR107468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2i/dVyDDbzKHeoO@tucnak/mbox/"},{"id":16293,"url":"https://patchwork.plctlab.org/api/1.2/patches/16293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2jA5jLpvM8e2Cfu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:25:10","name":"[committed] Add another commit to ignore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2jA5jLpvM8e2Cfu@tucnak/mbox/"},{"id":16296,"url":"https://patchwork.plctlab.org/api/1.2/patches/16296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083828.150145-1-poulhies@adacore.com/","msgid":"<20221107083828.150145-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:38:28","name":"[COMMITTED] ada: Remove useless validity suppression for attribute Input","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083828.150145-1-poulhies@adacore.com/mbox/"},{"id":16297,"url":"https://patchwork.plctlab.org/api/1.2/patches/16297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083901.150264-1-poulhies@adacore.com/","msgid":"<20221107083901.150264-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:01","name":"[COMMITTED] ada: Fix missing tag for with of an obsolescent function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083901.150264-1-poulhies@adacore.com/mbox/"},{"id":16298,"url":"https://patchwork.plctlab.org/api/1.2/patches/16298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083913.150332-1-poulhies@adacore.com/","msgid":"<20221107083913.150332-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:13","name":"[COMMITTED] ada: Reject misplaced pragma Obsolescent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083913.150332-1-poulhies@adacore.com/mbox/"},{"id":16299,"url":"https://patchwork.plctlab.org/api/1.2/patches/16299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083922.150400-1-poulhies@adacore.com/","msgid":"<20221107083922.150400-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:22","name":"[COMMITTED] ada: Simplify detection of pragmas in the context items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083922.150400-1-poulhies@adacore.com/mbox/"},{"id":16300,"url":"https://patchwork.plctlab.org/api/1.2/patches/16300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083928.150465-1-poulhies@adacore.com/","msgid":"<20221107083928.150465-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:28","name":"[COMMITTED] ada: Don'\''t reuse operator nodes in expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083928.150465-1-poulhies@adacore.com/mbox/"},{"id":16301,"url":"https://patchwork.plctlab.org/api/1.2/patches/16301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083934.150530-1-poulhies@adacore.com/","msgid":"<20221107083934.150530-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:34","name":"[COMMITTED] ada: Create operator nodes in functional style","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083934.150530-1-poulhies@adacore.com/mbox/"},{"id":16302,"url":"https://patchwork.plctlab.org/api/1.2/patches/16302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083940.150593-1-poulhies@adacore.com/","msgid":"<20221107083940.150593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:40","name":"[COMMITTED] ada: Cleanup WITH clauses after switching from obsolescent Ada 83 unit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083940.150593-1-poulhies@adacore.com/mbox/"},{"id":16303,"url":"https://patchwork.plctlab.org/api/1.2/patches/16303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083944.150656-1-poulhies@adacore.com/","msgid":"<20221107083944.150656-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:44","name":"[COMMITTED] ada: Tune layout after switching to Ada 2022 aggregate syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083944.150656-1-poulhies@adacore.com/mbox/"},{"id":16307,"url":"https://patchwork.plctlab.org/api/1.2/patches/16307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083950.150721-1-poulhies@adacore.com/","msgid":"<20221107083950.150721-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:50","name":"[COMMITTED] ada: Put_Image aspect spec incorrectly not inherited","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083950.150721-1-poulhies@adacore.com/mbox/"},{"id":16311,"url":"https://patchwork.plctlab.org/api/1.2/patches/16311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083955.150787-1-poulhies@adacore.com/","msgid":"<20221107083955.150787-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:55","name":"[COMMITTED] ada: Cleanup comment about mapping parameters when inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083955.150787-1-poulhies@adacore.com/mbox/"},{"id":16306,"url":"https://patchwork.plctlab.org/api/1.2/patches/16306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083959.150855-1-poulhies@adacore.com/","msgid":"<20221107083959.150855-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:59","name":"[COMMITTED] ada: Clean up code for visibility of generic actuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083959.150855-1-poulhies@adacore.com/mbox/"},{"id":16314,"url":"https://patchwork.plctlab.org/api/1.2/patches/16314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084005.150919-1-poulhies@adacore.com/","msgid":"<20221107084005.150919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:05","name":"[COMMITTED] ada: Clean up unnecesary call in resolution of overloaded expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084005.150919-1-poulhies@adacore.com/mbox/"},{"id":16309,"url":"https://patchwork.plctlab.org/api/1.2/patches/16309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084011.150984-1-poulhies@adacore.com/","msgid":"<20221107084011.150984-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:11","name":"[COMMITTED] ada: Allow reuse of Enclosing_Declaration_Or_Statement by GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084011.150984-1-poulhies@adacore.com/mbox/"},{"id":16305,"url":"https://patchwork.plctlab.org/api/1.2/patches/16305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084016.151048-1-poulhies@adacore.com/","msgid":"<20221107084016.151048-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:16","name":"[COMMITTED] ada: Reject boxes in delta array aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084016.151048-1-poulhies@adacore.com/mbox/"},{"id":16308,"url":"https://patchwork.plctlab.org/api/1.2/patches/16308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084021.151112-1-poulhies@adacore.com/","msgid":"<20221107084021.151112-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:21","name":"[COMMITTED] ada: Remove redundant suppression for non-modified IN OUT parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084021.151112-1-poulhies@adacore.com/mbox/"},{"id":16318,"url":"https://patchwork.plctlab.org/api/1.2/patches/16318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084026.151175-1-poulhies@adacore.com/","msgid":"<20221107084026.151175-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:26","name":"[COMMITTED] ada: Cleanup detection of code within generic instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084026.151175-1-poulhies@adacore.com/mbox/"},{"id":16312,"url":"https://patchwork.plctlab.org/api/1.2/patches/16312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084034.151239-1-poulhies@adacore.com/","msgid":"<20221107084034.151239-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:34","name":"[COMMITTED] ada: Flip warning suppression routine to positive meaning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084034.151239-1-poulhies@adacore.com/mbox/"},{"id":16315,"url":"https://patchwork.plctlab.org/api/1.2/patches/16315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084040.151303-1-poulhies@adacore.com/","msgid":"<20221107084040.151303-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:40","name":"[COMMITTED] ada: Deconstruct Safe_To_Capture_In_Parameter_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084040.151303-1-poulhies@adacore.com/mbox/"},{"id":16321,"url":"https://patchwork.plctlab.org/api/1.2/patches/16321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084046.151369-1-poulhies@adacore.com/","msgid":"<20221107084046.151369-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:46","name":"[COMMITTED] ada: Suppress warnings on derived True/False","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084046.151369-1-poulhies@adacore.com/mbox/"},{"id":16313,"url":"https://patchwork.plctlab.org/api/1.2/patches/16313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084050.151435-1-poulhies@adacore.com/","msgid":"<20221107084050.151435-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:50","name":"[COMMITTED] ada: Clean up unnecessary nesting in code for DLL libraries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084050.151435-1-poulhies@adacore.com/mbox/"},{"id":16324,"url":"https://patchwork.plctlab.org/api/1.2/patches/16324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084055.151501-1-poulhies@adacore.com/","msgid":"<20221107084055.151501-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:55","name":"[COMMITTED] ada: Fix detection of external calls to protected objects in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084055.151501-1-poulhies@adacore.com/mbox/"},{"id":16310,"url":"https://patchwork.plctlab.org/api/1.2/patches/16310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084059.151565-1-poulhies@adacore.com/","msgid":"<20221107084059.151565-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:59","name":"[COMMITTED] ada: Rework CUDA host-side invocation of device-side elaboration code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084059.151565-1-poulhies@adacore.com/mbox/"},{"id":16317,"url":"https://patchwork.plctlab.org/api/1.2/patches/16317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084103.151630-1-poulhies@adacore.com/","msgid":"<20221107084103.151630-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:03","name":"[COMMITTED] ada: Fixed elaboration of CUDA programs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084103.151630-1-poulhies@adacore.com/mbox/"},{"id":16319,"url":"https://patchwork.plctlab.org/api/1.2/patches/16319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084108.151693-1-poulhies@adacore.com/","msgid":"<20221107084108.151693-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:08","name":"[COMMITTED] ada: Fix inherited postconditions in inlined subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084108.151693-1-poulhies@adacore.com/mbox/"},{"id":16325,"url":"https://patchwork.plctlab.org/api/1.2/patches/16325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084114.151758-1-poulhies@adacore.com/","msgid":"<20221107084114.151758-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:14","name":"[COMMITTED] ada: Inline composite node kind AST queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084114.151758-1-poulhies@adacore.com/mbox/"},{"id":16320,"url":"https://patchwork.plctlab.org/api/1.2/patches/16320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084129.151825-1-poulhies@adacore.com/","msgid":"<20221107084129.151825-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:29","name":"[COMMITTED] ada: New warning about noncomposing user-defined \"=\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084129.151825-1-poulhies@adacore.com/mbox/"},{"id":16322,"url":"https://patchwork.plctlab.org/api/1.2/patches/16322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084135.151888-1-poulhies@adacore.com/","msgid":"<20221107084135.151888-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:35","name":"[COMMITTED] ada: Use named notation in calls to Expand_Composite_Equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084135.151888-1-poulhies@adacore.com/mbox/"},{"id":16326,"url":"https://patchwork.plctlab.org/api/1.2/patches/16326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084140.151953-1-poulhies@adacore.com/","msgid":"<20221107084140.151953-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:40","name":"[COMMITTED] ada: Fix performance regression related to references in Refined_State","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084140.151953-1-poulhies@adacore.com/mbox/"},{"id":16327,"url":"https://patchwork.plctlab.org/api/1.2/patches/16327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084147.152022-1-poulhies@adacore.com/","msgid":"<20221107084147.152022-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:47","name":"[COMMITTED] ada: Tune hash function for cross-reference entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084147.152022-1-poulhies@adacore.com/mbox/"},{"id":16323,"url":"https://patchwork.plctlab.org/api/1.2/patches/16323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084152.152087-1-poulhies@adacore.com/","msgid":"<20221107084152.152087-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:52","name":"[COMMITTED] ada: Document that gprof won'\''t work on windows with PIE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084152.152087-1-poulhies@adacore.com/mbox/"},{"id":16328,"url":"https://patchwork.plctlab.org/api/1.2/patches/16328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz/","msgid":"<75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz>","list_archive_url":null,"date":"2022-11-07T08:51:08","name":"[(pushed)] Mitigate clang warnings:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz/mbox/"},{"id":16331,"url":"https://patchwork.plctlab.org/api/1.2/patches/16331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkra6539m5r.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:57:52","name":"[10/15,V4] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkra6539m5r.fsf_-_@arm.com/mbox/"},{"id":16332,"url":"https://patchwork.plctlab.org/api/1.2/patches/16332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107090211.E59EA13494@imap2.suse-dmz.suse.de/","msgid":"<20221107090211.E59EA13494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-07T09:02:11","name":"[RFC] tree-optimization/107389 - use __builtin_assume_alignment at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107090211.E59EA13494@imap2.suse-dmz.suse.de/mbox/"},{"id":16346,"url":"https://patchwork.plctlab.org/api/1.2/patches/16346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870966ACA7650A8A81A230EC3C9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-07T09:32:20","name":"[committed] i386: Fix typo in sse-22.c pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870966ACA7650A8A81A230EC3C9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16349,"url":"https://patchwork.plctlab.org/api/1.2/patches/16349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107094645.3718427-1-jcmvbkbc@gmail.com/","msgid":"<20221107094645.3718427-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-07T09:46:45","name":"[RFA] gcc: fix PR rtl-optimization/107482","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107094645.3718427-1-jcmvbkbc@gmail.com/mbox/"},{"id":16381,"url":"https://patchwork.plctlab.org/api/1.2/patches/16381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107114238.663927-1-aldyh@redhat.com/","msgid":"<20221107114238.663927-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-07T11:42:38","name":"[COMMITTED,range-op] Restrict division by power of 2 optimization to positive numbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107114238.663927-1-aldyh@redhat.com/mbox/"},{"id":16404,"url":"https://patchwork.plctlab.org/api/1.2/patches/16404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107130302.22073-1-amonakov@ispras.ru/","msgid":"<20221107130302.22073-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-07T13:03:02","name":"[committed] tree-ssa-sink: do not touch calls that return twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107130302.22073-1-amonakov@ispras.ru/mbox/"},{"id":16411,"url":"https://patchwork.plctlab.org/api/1.2/patches/16411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0yesygv.fsf_-_@debian/","msgid":"<87r0yesygv.fsf_-_@debian>","list_archive_url":null,"date":"2022-11-07T13:09:20","name":"[v2,16/19] modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0yesygv.fsf_-_@debian/mbox/"},{"id":16475,"url":"https://patchwork.plctlab.org/api/1.2/patches/16475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de/","msgid":"<20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-07T14:26:20","name":"unswitching of outer loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de/mbox/"},{"id":16635,"url":"https://patchwork.plctlab.org/api/1.2/patches/16635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29a64538-62fa-63a6-39ed-ed9165679e43@acm.org/","msgid":"<29a64538-62fa-63a6-39ed-ed9165679e43@acm.org>","list_archive_url":null,"date":"2022-11-07T18:27:56","name":"C++: Template lambda mangling testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29a64538-62fa-63a6-39ed-ed9165679e43@acm.org/mbox/"},{"id":16639,"url":"https://patchwork.plctlab.org/api/1.2/patches/16639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107185801.326-1-palmer@rivosinc.com/","msgid":"<20221107185801.326-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-07T18:58:01","name":"invoke: RISC-V'\''s -march doesn'\''t take ISA strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107185801.326-1-palmer@rivosinc.com/mbox/"},{"id":16661,"url":"https://patchwork.plctlab.org/api/1.2/patches/16661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107195856.791257-1-aldyh@redhat.com/","msgid":"<20221107195856.791257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-07T19:58:56","name":"[COMMITTED] Improve multiplication by powers of 2 in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107195856.791257-1-aldyh@redhat.com/mbox/"},{"id":16677,"url":"https://patchwork.plctlab.org/api/1.2/patches/16677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107205752.2735464-1-jason@redhat.com/","msgid":"<20221107205752.2735464-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-07T20:57:52","name":"[RFC(libstdc++)] c++: implement P2468R2, the equality operator you are looking for","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107205752.2735464-1-jason@redhat.com/mbox/"},{"id":16741,"url":"https://patchwork.plctlab.org/api/1.2/patches/16741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de/","msgid":"<24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de>","list_archive_url":null,"date":"2022-11-07T21:45:47","name":"[v3] Fortran: ordering of hidden procedure arguments [PR107441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de/mbox/"},{"id":16747,"url":"https://patchwork.plctlab.org/api/1.2/patches/16747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224254.12230-1-david.faust@oracle.com/","msgid":"<20221107224254.12230-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-07T22:42:54","name":"[committed] bpf: cleanup missed refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224254.12230-1-david.faust@oracle.com/mbox/"},{"id":16749,"url":"https://patchwork.plctlab.org/api/1.2/patches/16749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224829.12440-1-david.faust@oracle.com/","msgid":"<20221107224829.12440-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-07T22:48:29","name":"bpf: Use enum for resolved overloaded builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224829.12440-1-david.faust@oracle.com/mbox/"},{"id":16787,"url":"https://patchwork.plctlab.org/api/1.2/patches/16787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com/","msgid":"<3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com>","list_archive_url":null,"date":"2022-11-08T00:23:01","name":"[COMMITTED] PR tree-optimization/104530 - Add transitive inferred range processing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com/mbox/"},{"id":16794,"url":"https://patchwork.plctlab.org/api/1.2/patches/16794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108011751.286433-1-hongtao.liu@intel.com/","msgid":"<20221108011751.286433-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-08T01:17:51","name":"Fix incorrect insn type to avoid ICE in memory attr auto-detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108011751.286433-1-hongtao.liu@intel.com/mbox/"},{"id":16821,"url":"https://patchwork.plctlab.org/api/1.2/patches/16821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com/","msgid":"<454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-08T02:48:56","name":"rtl: Try to remove EH edges after {pro,epi}logue generation [PR90259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com/mbox/"},{"id":16822,"url":"https://patchwork.plctlab.org/api/1.2/patches/16822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025322.6499-1-lili.cui@intel.com/","msgid":"<20221108025322.6499-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-11-08T02:53:22","name":"Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025322.6499-1-lili.cui@intel.com/mbox/"},{"id":16823,"url":"https://patchwork.plctlab.org/api/1.2/patches/16823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025725.2493707-1-dmalcolm@redhat.com/","msgid":"<20221108025725.2493707-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:25","name":"[committed] analyzer: fix \"when '\''strchr'\'' returns non-NULL\" message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025725.2493707-1-dmalcolm@redhat.com/mbox/"},{"id":16824,"url":"https://patchwork.plctlab.org/api/1.2/patches/16824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025729.2493732-1-dmalcolm@redhat.com/","msgid":"<20221108025729.2493732-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:29","name":"[committed] analyzer: introduce succeed_or_fail_call_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025729.2493732-1-dmalcolm@redhat.com/mbox/"},{"id":16825,"url":"https://patchwork.plctlab.org/api/1.2/patches/16825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025733.2493756-1-dmalcolm@redhat.com/","msgid":"<20221108025733.2493756-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:33","name":"[commited] analyzer: start adding support for errno","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025733.2493756-1-dmalcolm@redhat.com/mbox/"},{"id":16828,"url":"https://patchwork.plctlab.org/api/1.2/patches/16828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030252.2494185-1-dmalcolm@redhat.com/","msgid":"<20221108030252.2494185-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:02:52","name":"analyzer: add warnings relating to sockets [PR106140]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030252.2494185-1-dmalcolm@redhat.com/mbox/"},{"id":16837,"url":"https://patchwork.plctlab.org/api/1.2/patches/16837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030940.1539533-1-jwakely@redhat.com/","msgid":"<20221108030940.1539533-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:09:40","name":"[committed] libstdc++: Remove empty elements in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030940.1539533-1-jwakely@redhat.com/mbox/"},{"id":16838,"url":"https://patchwork.plctlab.org/api/1.2/patches/16838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030951.1539586-1-jwakely@redhat.com/","msgid":"<20221108030951.1539586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:09:51","name":"[committed] libstdc++: Update my author blurb in the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030951.1539586-1-jwakely@redhat.com/mbox/"},{"id":16856,"url":"https://patchwork.plctlab.org/api/1.2/patches/16856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108043657.2064455-1-kevinl@rivosinc.com/","msgid":"<20221108043657.2064455-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-08T04:36:58","name":"[v2] RISC-V missing __builtin_lceil and __builtin_lfloor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108043657.2064455-1-kevinl@rivosinc.com/mbox/"},{"id":16890,"url":"https://patchwork.plctlab.org/api/1.2/patches/16890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108071438.2523863-1-sam@gentoo.org/","msgid":"<20221108071438.2523863-1-sam@gentoo.org>","list_archive_url":null,"date":"2022-11-08T07:14:38","name":"maintainer-scripts/gcc_release: compress xz in parallel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108071438.2523863-1-sam@gentoo.org/mbox/"},{"id":16931,"url":"https://patchwork.plctlab.org/api/1.2/patches/16931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084123.300670-1-poulhies@adacore.com/","msgid":"<20221108084123.300670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:23","name":"[COMMITTED] ada: Add new -gnatw_q switch to usage message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084123.300670-1-poulhies@adacore.com/mbox/"},{"id":16932,"url":"https://patchwork.plctlab.org/api/1.2/patches/16932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084133.300737-1-poulhies@adacore.com/","msgid":"<20221108084133.300737-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:33","name":"[COMMITTED] ada: Raise Tag_Error when Ada.Tags operations are called with No_Tag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084133.300737-1-poulhies@adacore.com/mbox/"},{"id":16934,"url":"https://patchwork.plctlab.org/api/1.2/patches/16934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084139.300802-1-poulhies@adacore.com/","msgid":"<20221108084139.300802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:39","name":"[COMMITTED] ada: Missing master of task causing assertion failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084139.300802-1-poulhies@adacore.com/mbox/"},{"id":16937,"url":"https://patchwork.plctlab.org/api/1.2/patches/16937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084144.300867-1-poulhies@adacore.com/","msgid":"<20221108084144.300867-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:44","name":"[COMMITTED] ada: Reject record delta aggregates with limited expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084144.300867-1-poulhies@adacore.com/mbox/"},{"id":16933,"url":"https://patchwork.plctlab.org/api/1.2/patches/16933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084150.300930-1-poulhies@adacore.com/","msgid":"<20221108084150.300930-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:50","name":"[COMMITTED] ada: Allow initialization of limited objects with delta aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084150.300930-1-poulhies@adacore.com/mbox/"},{"id":16936,"url":"https://patchwork.plctlab.org/api/1.2/patches/16936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084155.300994-1-poulhies@adacore.com/","msgid":"<20221108084155.300994-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:55","name":"[COMMITTED] ada: Reject limited objects in array and record delta aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084155.300994-1-poulhies@adacore.com/mbox/"},{"id":16935,"url":"https://patchwork.plctlab.org/api/1.2/patches/16935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084201.301060-1-poulhies@adacore.com/","msgid":"<20221108084201.301060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:01","name":"[COMMITTED] ada: Remove obsolete code in Resolve_If_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084201.301060-1-poulhies@adacore.com/mbox/"},{"id":16940,"url":"https://patchwork.plctlab.org/api/1.2/patches/16940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084207.301124-1-poulhies@adacore.com/","msgid":"<20221108084207.301124-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:07","name":"[COMMITTED] ada: Cleanup local variable that is only set as an out parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084207.301124-1-poulhies@adacore.com/mbox/"},{"id":16939,"url":"https://patchwork.plctlab.org/api/1.2/patches/16939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084212.301188-1-poulhies@adacore.com/","msgid":"<20221108084212.301188-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:12","name":"[COMMITTED] ada: Remove unneeded code in handling formal type defaults","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084212.301188-1-poulhies@adacore.com/mbox/"},{"id":16943,"url":"https://patchwork.plctlab.org/api/1.2/patches/16943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084217.301254-1-poulhies@adacore.com/","msgid":"<20221108084217.301254-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:17","name":"[COMMITTED] ada: Fix inconsistent whitespace in Ada.Numerics.Generic_Complex_Arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084217.301254-1-poulhies@adacore.com/mbox/"},{"id":16945,"url":"https://patchwork.plctlab.org/api/1.2/patches/16945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084222.301318-1-poulhies@adacore.com/","msgid":"<20221108084222.301318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:22","name":"[COMMITTED] ada: Fix expansion of '\''Wide_Image and '\''Wide_Wide_Image on composite types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084222.301318-1-poulhies@adacore.com/mbox/"},{"id":16941,"url":"https://patchwork.plctlab.org/api/1.2/patches/16941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084227.301381-1-poulhies@adacore.com/","msgid":"<20221108084227.301381-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:27","name":"[COMMITTED] ada: Preanalyze classwide contracts as spec expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084227.301381-1-poulhies@adacore.com/mbox/"},{"id":16944,"url":"https://patchwork.plctlab.org/api/1.2/patches/16944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084234.301451-1-poulhies@adacore.com/","msgid":"<20221108084234.301451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:34","name":"[COMMITTED] ada: Remove redundant line in Analyze_Qualified_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084234.301451-1-poulhies@adacore.com/mbox/"},{"id":16946,"url":"https://patchwork.plctlab.org/api/1.2/patches/16946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084238.301516-1-poulhies@adacore.com/","msgid":"<20221108084238.301516-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:38","name":"[COMMITTED] ada: Minor consistency tweaks in Sem_Ch4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084238.301516-1-poulhies@adacore.com/mbox/"},{"id":16948,"url":"https://patchwork.plctlab.org/api/1.2/patches/16948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084244.301581-1-poulhies@adacore.com/","msgid":"<20221108084244.301581-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:44","name":"[COMMITTED] ada: Improve handling of declare expressions in deferred-freezing contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084244.301581-1-poulhies@adacore.com/mbox/"},{"id":16938,"url":"https://patchwork.plctlab.org/api/1.2/patches/16938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084250.301647-1-poulhies@adacore.com/","msgid":"<20221108084250.301647-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:50","name":"[COMMITTED] ada: Align -gnatwc'\''s documentation with its behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084250.301647-1-poulhies@adacore.com/mbox/"},{"id":16949,"url":"https://patchwork.plctlab.org/api/1.2/patches/16949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084258.301710-1-poulhies@adacore.com/","msgid":"<20221108084258.301710-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:58","name":"[COMMITTED] ada: Move warnings switches -- initial work","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084258.301710-1-poulhies@adacore.com/mbox/"},{"id":16953,"url":"https://patchwork.plctlab.org/api/1.2/patches/16953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084303.301774-1-poulhies@adacore.com/","msgid":"<20221108084303.301774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:03","name":"[COMMITTED] ada: Enforce matching of extra formals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084303.301774-1-poulhies@adacore.com/mbox/"},{"id":16942,"url":"https://patchwork.plctlab.org/api/1.2/patches/16942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084315.301840-1-poulhies@adacore.com/","msgid":"<20221108084315.301840-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:15","name":"[COMMITTED] ada: Implement RM 4.5.7(10/3) name resolution rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084315.301840-1-poulhies@adacore.com/mbox/"},{"id":16952,"url":"https://patchwork.plctlab.org/api/1.2/patches/16952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084321.301906-1-poulhies@adacore.com/","msgid":"<20221108084321.301906-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:21","name":"[COMMITTED] ada: Propagate aspect Ghost when instantiating null formal procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084321.301906-1-poulhies@adacore.com/mbox/"},{"id":16947,"url":"https://patchwork.plctlab.org/api/1.2/patches/16947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084331.301970-1-poulhies@adacore.com/","msgid":"<20221108084331.301970-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:31","name":"[COMMITTED] ada: Small consistency fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084331.301970-1-poulhies@adacore.com/mbox/"},{"id":16950,"url":"https://patchwork.plctlab.org/api/1.2/patches/16950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084340.302036-1-poulhies@adacore.com/","msgid":"<20221108084340.302036-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:40","name":"[COMMITTED] ada: Set Support_Atomic_Primitives for VxWorks 7 runtimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084340.302036-1-poulhies@adacore.com/mbox/"},{"id":16951,"url":"https://patchwork.plctlab.org/api/1.2/patches/16951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084344.302102-1-poulhies@adacore.com/","msgid":"<20221108084344.302102-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:44","name":"[COMMITTED] ada: Adjust classwide contract expression preanalysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084344.302102-1-poulhies@adacore.com/mbox/"},{"id":16954,"url":"https://patchwork.plctlab.org/api/1.2/patches/16954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084350.302166-1-poulhies@adacore.com/","msgid":"<20221108084350.302166-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:50","name":"[COMMITTED] ada: Clean up call to check if aspects are present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084350.302166-1-poulhies@adacore.com/mbox/"},{"id":16956,"url":"https://patchwork.plctlab.org/api/1.2/patches/16956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084355.302230-1-poulhies@adacore.com/","msgid":"<20221108084355.302230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:55","name":"[COMMITTED] ada: Compile-time simplification of '\''Image incorrectly ignores Put_Image","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084355.302230-1-poulhies@adacore.com/mbox/"},{"id":16955,"url":"https://patchwork.plctlab.org/api/1.2/patches/16955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084400.302294-1-poulhies@adacore.com/","msgid":"<20221108084400.302294-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:44:00","name":"[COMMITTED] ada: Fix oversight in implementation of allocators for storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084400.302294-1-poulhies@adacore.com/mbox/"},{"id":16963,"url":"https://patchwork.plctlab.org/api/1.2/patches/16963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108093200.3750500-1-jcmvbkbc@gmail.com/","msgid":"<20221108093200.3750500-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-08T09:32:00","name":"[COMMITTED] gcc: fix PR rtl-optimization/107482","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108093200.3750500-1-jcmvbkbc@gmail.com/mbox/"},{"id":16975,"url":"https://patchwork.plctlab.org/api/1.2/patches/16975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2otxo2bEDKbOBth@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T10:21:58","name":"[committed] libstdc++: Uncomment denorm_min test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2otxo2bEDKbOBth@tucnak/mbox/"},{"id":16979,"url":"https://patchwork.plctlab.org/api/1.2/patches/16979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2oycVBgmY/RQPZb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T10:41:53","name":"i386: Improve vector [GL]E{,U} comparison against vector constants [PR107546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2oycVBgmY/RQPZb@tucnak/mbox/"},{"id":16983,"url":"https://patchwork.plctlab.org/api/1.2/patches/16983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2o3IekL8TZKHdlR@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T11:01:53","name":"cdce: Fix up get_no_error_domain for new f{16,32,64,128} builtins [PR107547]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2o3IekL8TZKHdlR@tucnak/mbox/"},{"id":16996,"url":"https://patchwork.plctlab.org/api/1.2/patches/16996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pCbby26nP6ipNf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T11:50:05","name":"testsuite: Fix up pr107541.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pCbby26nP6ipNf@tucnak/mbox/"},{"id":17008,"url":"https://patchwork.plctlab.org/api/1.2/patches/17008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108121539.E4F9F13398@imap2.suse-dmz.suse.de/","msgid":"<20221108121539.E4F9F13398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-08T12:15:39","name":"[RFC] tree-optimization/99416 - loop distribution wrt vect data dependence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108121539.E4F9F13398@imap2.suse-dmz.suse.de/mbox/"},{"id":17022,"url":"https://patchwork.plctlab.org/api/1.2/patches/17022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108125348.BFC2213398@imap2.suse-dmz.suse.de/","msgid":"<20221108125348.BFC2213398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-08T12:53:48","name":"[v2] tree-optimization/107389 - honor __builtin_assume_alignment at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108125348.BFC2213398@imap2.suse-dmz.suse.de/mbox/"},{"id":17058,"url":"https://patchwork.plctlab.org/api/1.2/patches/17058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108142458.862678-1-aldyh@redhat.com/","msgid":"<20221108142458.862678-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-08T14:24:58","name":"CCP: handle division by a power of 2 as a right shift.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108142458.862678-1-aldyh@redhat.com/mbox/"},{"id":17074,"url":"https://patchwork.plctlab.org/api/1.2/patches/17074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com/","msgid":"<952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com>","list_archive_url":null,"date":"2022-11-08T14:35:28","name":"amdgcn: Add builtins for vectorized native versions of abs, floorf and floor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com/mbox/"},{"id":17076,"url":"https://patchwork.plctlab.org/api/1.2/patches/17076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pq4z+Ig95RN1/z@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T14:42:43","name":"[RFC] c++: Minimal handling of carries_dependency attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pq4z+Ig95RN1/z@tucnak/mbox/"},{"id":17104,"url":"https://patchwork.plctlab.org/api/1.2/patches/17104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-2-qing.zhao@oracle.com/","msgid":"<20221108145113.955321-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-11-08T14:51:12","name":"[1/2] Change the name of array_at_struct_end_p to array_ref_flexible_size_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-2-qing.zhao@oracle.com/mbox/"},{"id":17093,"url":"https://patchwork.plctlab.org/api/1.2/patches/17093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-3-qing.zhao@oracle.com/","msgid":"<20221108145113.955321-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-11-08T14:51:13","name":"[2/2] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-3-qing.zhao@oracle.com/mbox/"},{"id":17094,"url":"https://patchwork.plctlab.org/api/1.2/patches/17094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcec9860-4091-3b32-3a55-4bd5df85e010@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T15:08:06","name":"[COMMITTED] amdgcn: Fix expansion of GCN_BUILTIN_LDEXPV builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcec9860-4091-3b32-3a55-4bd5df85e010@codesourcery.com/mbox/"},{"id":17133,"url":"https://patchwork.plctlab.org/api/1.2/patches/17133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174625.1764584-1-jwakely@redhat.com/","msgid":"<20221108174625.1764584-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:25","name":"[committed] libstdc++: Add always_inline to most allocator functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174625.1764584-1-jwakely@redhat.com/mbox/"},{"id":17137,"url":"https://patchwork.plctlab.org/api/1.2/patches/17137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174641.1764608-1-jwakely@redhat.com/","msgid":"<20221108174641.1764608-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:41","name":"[committed] libstdc++: Fix -Wsystem-headers warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174641.1764608-1-jwakely@redhat.com/mbox/"},{"id":17139,"url":"https://patchwork.plctlab.org/api/1.2/patches/17139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174648.1764639-1-jwakely@redhat.com/","msgid":"<20221108174648.1764639-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:48","name":"[committed] libstdc++: Fix -Wsystem-headers warnings in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174648.1764639-1-jwakely@redhat.com/mbox/"},{"id":17147,"url":"https://patchwork.plctlab.org/api/1.2/patches/17147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df0993a57a506629ba121656e5384c1500cb6338.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:14","name":"[1/3] Compute a table of DWARF register sizes at compile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df0993a57a506629ba121656e5384c1500cb6338.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17149,"url":"https://patchwork.plctlab.org/api/1.2/patches/17149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f08400a5054aadb4fa6e2da62a2768700944b591.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:30","name":"[2/3] Define __LIBGCC_DWARF_REG_SIZES_CONSTANT__ if DWARF register size is constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f08400a5054aadb4fa6e2da62a2768700944b591.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17148,"url":"https://patchwork.plctlab.org/api/1.2/patches/17148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5de1b7feecc0ce5bec77e6a21032ab1f6c0a315.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:40","name":"[3/3] libgcc: Specialize execute_cfa_program in DWARF unwinder for alignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5de1b7feecc0ce5bec77e6a21032ab1f6c0a315.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17159,"url":"https://patchwork.plctlab.org/api/1.2/patches/17159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRZonrXGHcaqVLNduyoAXa8mT+5TiYk29PsXd4sBwfa2JA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:20:20","name":"[Arm] Fix PR 92999","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRZonrXGHcaqVLNduyoAXa8mT+5TiYk29PsXd4sBwfa2JA@mail.gmail.com/mbox/"},{"id":17161,"url":"https://patchwork.plctlab.org/api/1.2/patches/17161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108183108.1233500-1-thomas@codesourcery.com/","msgid":"<20221108183108.1233500-1-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-11-08T18:31:08","name":"[newlib] Generally make all '\''long double complex'\'' methods available in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108183108.1233500-1-thomas@codesourcery.com/mbox/"},{"id":17190,"url":"https://patchwork.plctlab.org/api/1.2/patches/17190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195415.2701208-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195415.2701208-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:15","name":"RISC-V: costs: handle BSWAP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195415.2701208-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17191,"url":"https://patchwork.plctlab.org/api/1.2/patches/17191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195434.2701247-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195434.2701247-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:34","name":"RISC-V: costs: support shift-and-add in strength-reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195434.2701247-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17192,"url":"https://patchwork.plctlab.org/api/1.2/patches/17192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195456.2701279-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195456.2701279-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:56","name":"RISC-V: optimize '\''(a >= 0) ? b : 0'\'' to srai + andn, if compiling for Zbb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195456.2701279-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17193,"url":"https://patchwork.plctlab.org/api/1.2/patches/17193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195509.2701313-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195509.2701313-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:55:09","name":"RISC-V: branch-(not)equals-zero compares against $zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195509.2701313-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17194,"url":"https://patchwork.plctlab.org/api/1.2/patches/17194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195547.2701347-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195547.2701347-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:55:47","name":"RISC-V: bitmanip: use bexti for \"(a & (1 << BIT_NO)) ? 0 : -1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195547.2701347-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17195,"url":"https://patchwork.plctlab.org/api/1.2/patches/17195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195617.2701379-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195617.2701379-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:56:17","name":"RISC-V: split to allow formation of sh[123]add before divw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195617.2701379-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17196,"url":"https://patchwork.plctlab.org/api/1.2/patches/17196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195730.2701496-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195730.2701496-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:57:30","name":"RISC-V: Optimize slli(.uw)? + addw + zext.w into sh[123]add + zext.w","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195730.2701496-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17199,"url":"https://patchwork.plctlab.org/api/1.2/patches/17199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/adca186b-24e1-20da-9e4d-0acb6754f133@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T20:02:20","name":"match.pd: rewrite select to branchless expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/adca186b-24e1-20da-9e4d-0acb6754f133@rivosinc.com/mbox/"},{"id":17200,"url":"https://patchwork.plctlab.org/api/1.2/patches/17200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108200323.2719563-1-philipp.tomsich@vrull.eu/","msgid":"<20221108200323.2719563-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:03:23","name":"RISC-V: allow bseti on SImode without sign-extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108200323.2719563-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17209,"url":"https://patchwork.plctlab.org/api/1.2/patches/17209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmdx42bm.fsf@euler.schwinge.homeip.net/","msgid":"<87pmdx42bm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-08T20:29:49","name":"nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmdx42bm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":17213,"url":"https://patchwork.plctlab.org/api/1.2/patches/17213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204625.2794920-1-philipp.tomsich@vrull.eu/","msgid":"<20221108204625.2794920-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:46:25","name":"RISC-V: Optimize branches testing a bit-range or a shifted immediate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204625.2794920-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17216,"url":"https://patchwork.plctlab.org/api/1.2/patches/17216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204637.2794952-1-philipp.tomsich@vrull.eu/","msgid":"<20221108204637.2794952-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:46:36","name":"RISC-V: No extensions for SImode min/max against safe constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204637.2794952-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17263,"url":"https://patchwork.plctlab.org/api/1.2/patches/17263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108225413.2538404-1-dmalcolm@redhat.com/","msgid":"<20221108225413.2538404-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T22:54:13","name":"[committed] analyzer: eliminate region_model::eval_condition_without_cm [PR101962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108225413.2538404-1-dmalcolm@redhat.com/mbox/"},{"id":17283,"url":"https://patchwork.plctlab.org/api/1.2/patches/17283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109000631.2814859-1-philipp.tomsich@vrull.eu/","msgid":"<20221109000631.2814859-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T00:06:31","name":"[v2] RISC-V: No extensions for SImode min/max against safe constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109000631.2814859-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17306,"url":"https://patchwork.plctlab.org/api/1.2/patches/17306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-3-ben.boeckel@kitware.com/","msgid":"<20221109021048.2123704-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-11-09T02:10:47","name":"[v3,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-3-ben.boeckel@kitware.com/mbox/"},{"id":17307,"url":"https://patchwork.plctlab.org/api/1.2/patches/17307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-4-ben.boeckel@kitware.com/","msgid":"<20221109021048.2123704-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-11-09T02:10:48","name":"[v3,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-4-ben.boeckel@kitware.com/mbox/"},{"id":17325,"url":"https://patchwork.plctlab.org/api/1.2/patches/17325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109030036.19175-1-palmer@rivosinc.com/","msgid":"<20221109030036.19175-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-09T03:00:36","name":"RISC-V: Add the Zihpm and Zicntr extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109030036.19175-1-palmer@rivosinc.com/mbox/"},{"id":17362,"url":"https://patchwork.plctlab.org/api/1.2/patches/17362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-1-aldyh@redhat.com/","msgid":"<20221109070758.1030615-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T07:07:57","name":"[COMMITTED,range-op-float] Abstract out binary operator code out of PLUS_EXPR entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-1-aldyh@redhat.com/mbox/"},{"id":17361,"url":"https://patchwork.plctlab.org/api/1.2/patches/17361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-2-aldyh@redhat.com/","msgid":"<20221109070758.1030615-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T07:07:58","name":"[COMMITTED,range-op-float] Implement MINUS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-2-aldyh@redhat.com/mbox/"},{"id":17364,"url":"https://patchwork.plctlab.org/api/1.2/patches/17364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109071302.78435-1-haochen.jiang@intel.com/","msgid":"<20221109071302.78435-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-09T07:13:02","name":"i386: Add ISA check for newly introduced prefetch builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109071302.78435-1-haochen.jiang@intel.com/mbox/"},{"id":17368,"url":"https://patchwork.plctlab.org/api/1.2/patches/17368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-2-xry111@xry111.site/","msgid":"<20221109072147.789090-2-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:44","name":"[1/4] LoongArch: Rename frint_ to rint2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-2-xry111@xry111.site/mbox/"},{"id":17365,"url":"https://patchwork.plctlab.org/api/1.2/patches/17365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-3-xry111@xry111.site/","msgid":"<20221109072147.789090-3-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:45","name":"[2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-3-xry111@xry111.site/mbox/"},{"id":17366,"url":"https://patchwork.plctlab.org/api/1.2/patches/17366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-4-xry111@xry111.site/","msgid":"<20221109072147.789090-4-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:46","name":"[3/4] LoongArch: Add fscaleb.{s, d} instructions as ldexp{sf, df}3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-4-xry111@xry111.site/mbox/"},{"id":17367,"url":"https://patchwork.plctlab.org/api/1.2/patches/17367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-5-xry111@xry111.site/","msgid":"<20221109072147.789090-5-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:47","name":"[4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-5-xry111@xry111.site/mbox/"},{"id":17369,"url":"https://patchwork.plctlab.org/api/1.2/patches/17369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072645.790242-1-xry111@xry111.site/","msgid":"<20221109072645.790242-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:26:45","name":"[v2] LoongArch: fix signed overflow in loongarch_emit_int_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072645.790242-1-xry111@xry111.site/mbox/"},{"id":17415,"url":"https://patchwork.plctlab.org/api/1.2/patches/17415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109090246.1036213-1-aldyh@redhat.com/","msgid":"<20221109090246.1036213-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T09:02:46","name":"[COMMITTED] Implement op[12]_range operators for PLUS_EXPR and MINUS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109090246.1036213-1-aldyh@redhat.com/mbox/"},{"id":17419,"url":"https://patchwork.plctlab.org/api/1.2/patches/17419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz/","msgid":"<75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz>","list_archive_url":null,"date":"2022-11-09T09:09:27","name":"[(pushed)] sphinx: fix building if sphinx-build is missing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz/mbox/"},{"id":17436,"url":"https://patchwork.plctlab.org/api/1.2/patches/17436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz/","msgid":"<7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz>","list_archive_url":null,"date":"2022-11-09T10:05:49","name":"[(pushed)] avr: sphinx: port gen-avr-mmcu to RST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz/mbox/"},{"id":17460,"url":"https://patchwork.plctlab.org/api/1.2/patches/17460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2uHDeXiivo401ni@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-09T10:55:09","name":"Fix up foperator_abs::op1_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2uHDeXiivo401ni@tucnak/mbox/"},{"id":17480,"url":"https://patchwork.plctlab.org/api/1.2/patches/17480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz/","msgid":"<57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:13:04","name":"[DOCS] sphinx: align documentation links with project names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz/mbox/"},{"id":17483,"url":"https://patchwork.plctlab.org/api/1.2/patches/17483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz/","msgid":"<482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:13:37","name":"[DOCS] sphinx: use new Sphinx links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz/mbox/"},{"id":17494,"url":"https://patchwork.plctlab.org/api/1.2/patches/17494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr5yfo9y2m.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-09T11:17:21","name":"[6/12,V2] arm: Add pointer authentication for stack-unwinding runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr5yfo9y2m.fsf_-_@arm.com/mbox/"},{"id":17507,"url":"https://patchwork.plctlab.org/api/1.2/patches/17507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz/","msgid":"<00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:52:53","name":"[(pushed)] sphinx: update crontab with new script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz/mbox/"},{"id":17522,"url":"https://patchwork.plctlab.org/api/1.2/patches/17522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3c5344-171c-783e-e485-611223baf5bc@suse.cz/","msgid":"<4b3c5344-171c-783e-e485-611223baf5bc@suse.cz>","list_archive_url":null,"date":"2022-11-09T12:12:05","name":"[(pushed)] sphinx: update diagnostics URLs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3c5344-171c-783e-e485-611223baf5bc@suse.cz/mbox/"},{"id":17538,"url":"https://patchwork.plctlab.org/api/1.2/patches/17538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89824348B31E96B4F6432A3C833E9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-09T12:40:05","name":"AArch64: Add fma_reassoc_width [PR107413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89824348B31E96B4F6432A3C833E9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":17539,"url":"https://patchwork.plctlab.org/api/1.2/patches/17539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz/","msgid":"<60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz>","list_archive_url":null,"date":"2022-11-09T12:41:02","name":"[(pushed)] docs: fix: WARNING: Parsing of expression failed. Using fallback parser.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz/mbox/"},{"id":17546,"url":"https://patchwork.plctlab.org/api/1.2/patches/17546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1d91c0b-5326-ce2e-3f78-8a9de6af9a37@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-09T13:41:27","name":"changelog: check for space after tab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1d91c0b-5326-ce2e-3f78-8a9de6af9a37@suse.cz/mbox/"},{"id":17550,"url":"https://patchwork.plctlab.org/api/1.2/patches/17550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135046.17EDE1331F@imap2.suse-dmz.suse.de/","msgid":"<20221109135046.17EDE1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-09T13:50:45","name":"tree-optimization/84646 - remove premature thread path rejection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135046.17EDE1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":17553,"url":"https://patchwork.plctlab.org/api/1.2/patches/17553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-2-xry111@xry111.site/","msgid":"<20221109135329.952128-2-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:26","name":"[v2,1/4] LoongArch: Rename frint_ to rint2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-2-xry111@xry111.site/mbox/"},{"id":17557,"url":"https://patchwork.plctlab.org/api/1.2/patches/17557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-3-xry111@xry111.site/","msgid":"<20221109135329.952128-3-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:27","name":"[v2,2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-3-xry111@xry111.site/mbox/"},{"id":17554,"url":"https://patchwork.plctlab.org/api/1.2/patches/17554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-4-xry111@xry111.site/","msgid":"<20221109135329.952128-4-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:28","name":"[v2,3/4] LoongArch: Add fscaleb.{s, d} instructions as ldexp{sf, df}3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-4-xry111@xry111.site/mbox/"},{"id":17558,"url":"https://patchwork.plctlab.org/api/1.2/patches/17558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-5-xry111@xry111.site/","msgid":"<20221109135329.952128-5-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:29","name":"[v2,4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-5-xry111@xry111.site/mbox/"},{"id":17559,"url":"https://patchwork.plctlab.org/api/1.2/patches/17559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz/","msgid":"<70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz>","list_archive_url":null,"date":"2022-11-09T13:54:48","name":"[RFC] docs: remove documentation for unsupported releases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz/mbox/"},{"id":17608,"url":"https://patchwork.plctlab.org/api/1.2/patches/17608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com/","msgid":"<78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-09T14:32:35","name":"[GCC,13/15,v4] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com/mbox/"},{"id":17609,"url":"https://patchwork.plctlab.org/api/1.2/patches/17609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz/","msgid":"<145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz>","list_archive_url":null,"date":"2022-11-09T14:39:36","name":"[(pushed)] docs: fix links pointing to gcc.gnu.org/install","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz/mbox/"},{"id":17637,"url":"https://patchwork.plctlab.org/api/1.2/patches/17637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109154139.4561-1-jwakely@redhat.com/","msgid":"<20221109154139.4561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-09T15:41:39","name":"[wwwdocs] Add httpd redirects for texinfo trunk docs and for each release series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109154139.4561-1-jwakely@redhat.com/mbox/"},{"id":17711,"url":"https://patchwork.plctlab.org/api/1.2/patches/17711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109172148.41333-1-aldyh@redhat.com/","msgid":"<20221109172148.41333-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T17:21:48","name":"[COMMITTED] Clear NAN when reading back a global range if necessary.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109172148.41333-1-aldyh@redhat.com/mbox/"},{"id":17737,"url":"https://patchwork.plctlab.org/api/1.2/patches/17737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz/","msgid":"<963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz>","list_archive_url":null,"date":"2022-11-09T18:37:09","name":"[(pushed)] docs: create sources tarball","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz/mbox/"},{"id":17739,"url":"https://patchwork.plctlab.org/api/1.2/patches/17739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44555a43-3840-bf91-ee39-0a468ae524be@suse.cz/","msgid":"<44555a43-3840-bf91-ee39-0a468ae524be@suse.cz>","list_archive_url":null,"date":"2022-11-09T18:39:48","name":"[(pushed)] Include docs-sources in onlinedocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44555a43-3840-bf91-ee39-0a468ae524be@suse.cz/mbox/"},{"id":17763,"url":"https://patchwork.plctlab.org/api/1.2/patches/17763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-2-aldot@gcc.gnu.org/","msgid":"<20221109190225.96037-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-09T19:02:24","name":"[1/2] symtab: also change RTL decl name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-2-aldot@gcc.gnu.org/mbox/"},{"id":17764,"url":"https://patchwork.plctlab.org/api/1.2/patches/17764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-3-aldot@gcc.gnu.org/","msgid":"<20221109190225.96037-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-09T19:02:25","name":"[2/2] Fortran: add attribute target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-3-aldot@gcc.gnu.org/mbox/"},{"id":17777,"url":"https://patchwork.plctlab.org/api/1.2/patches/17777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz/","msgid":"<97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz>","list_archive_url":null,"date":"2022-11-09T19:33:51","name":"[(pushed)] sphinx: add missing HAS_SPHINX_BUILD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz/mbox/"},{"id":17795,"url":"https://patchwork.plctlab.org/api/1.2/patches/17795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz/","msgid":"<8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz>","list_archive_url":null,"date":"2022-11-09T19:57:18","name":"[(pushed)] docs: Fix expected diagnostics URL [PR107599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz/mbox/"},{"id":17803,"url":"https://patchwork.plctlab.org/api/1.2/patches/17803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-60fde88b-2e53-405e-b0d6-3cc97ef45980-1668025063811@3c-app-gmx-bap34/","msgid":"","list_archive_url":null,"date":"2022-11-09T20:17:43","name":"[committed] Fortran: avoid NULL pointer dereference on bad EQUIVALENCEs [PR107559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-60fde88b-2e53-405e-b0d6-3cc97ef45980-1668025063811@3c-app-gmx-bap34/mbox/"},{"id":17814,"url":"https://patchwork.plctlab.org/api/1.2/patches/17814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17c8fc65-adb9-4e07-a987-865911332259-1668027022980@3c-app-gmx-bap34/","msgid":"","list_archive_url":null,"date":"2022-11-09T20:50:22","name":"Proxy ping [PATCH] Fortran: diagnostics for actual arguments to pointer dummy arguments [PR94104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17c8fc65-adb9-4e07-a987-865911332259-1668027022980@3c-app-gmx-bap34/mbox/"},{"id":17815,"url":"https://patchwork.plctlab.org/api/1.2/patches/17815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109205305.96262-1-polacek@redhat.com/","msgid":"<20221109205305.96262-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-09T20:53:05","name":"c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109205305.96262-1-polacek@redhat.com/mbox/"},{"id":17835,"url":"https://patchwork.plctlab.org/api/1.2/patches/17835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109213132.2698221-1-arsen@aarsen.me/","msgid":"<20221109213132.2698221-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-11-09T21:31:34","name":"doc: Use a separate directory for new modules we add to PATH","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109213132.2698221-1-arsen@aarsen.me/mbox/"},{"id":17852,"url":"https://patchwork.plctlab.org/api/1.2/patches/17852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109221205.61966-1-jwakely@redhat.com/","msgid":"<20221109221205.61966-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-09T22:12:05","name":"[v2] doc: Remove outdated reference to \"core\" and front-end downloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109221205.61966-1-jwakely@redhat.com/mbox/"},{"id":17856,"url":"https://patchwork.plctlab.org/api/1.2/patches/17856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109222250.2594117-1-dmalcolm@redhat.com/","msgid":"<20221109222250.2594117-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-09T22:22:50","name":"[committed] analyzer: better logging of event creation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109222250.2594117-1-dmalcolm@redhat.com/mbox/"},{"id":17864,"url":"https://patchwork.plctlab.org/api/1.2/patches/17864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230718.3240479-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230718.3240479-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:18","name":"RISC-V: Optimise adding a (larger than simm12) constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230718.3240479-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17865,"url":"https://patchwork.plctlab.org/api/1.2/patches/17865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230736.3240512-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230736.3240512-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:36","name":"RISC-V: Implement movmisalign to enable SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230736.3240512-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17866,"url":"https://patchwork.plctlab.org/api/1.2/patches/17866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230747.3240551-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230747.3240551-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:47","name":"ifcombine: recognize single bit test of sign-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230747.3240551-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17867,"url":"https://patchwork.plctlab.org/api/1.2/patches/17867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230815.3240583-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230815.3240583-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:08:15","name":"ifcombine: fold two bit tests with different polarity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230815.3240583-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17868,"url":"https://patchwork.plctlab.org/api/1.2/patches/17868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230842.3240615-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230842.3240615-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:08:42","name":"[v2,WIP] RISC-V: Replace zero_extendsidi2_shifted with generalized split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230842.3240615-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17869,"url":"https://patchwork.plctlab.org/api/1.2/patches/17869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109231006.3240799-1-philipp.tomsich@vrull.eu/","msgid":"<20221109231006.3240799-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:10:06","name":"[v3] RISC-V: Replace zero_extendsidi2_shifted with generalized split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109231006.3240799-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17870,"url":"https://patchwork.plctlab.org/api/1.2/patches/17870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109234948.3279391-1-philipp.tomsich@vrull.eu/","msgid":"<20221109234948.3279391-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:49:48","name":"RISC-V: Fix selection of pipeline model for sifive-7-series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109234948.3279391-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17872,"url":"https://patchwork.plctlab.org/api/1.2/patches/17872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUsKk8N+EUsVjQS1sSRmsw+QKx4xPo7y4wOg6WLr0pqeQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T00:09:01","name":"Go patch committed: Define __atomic_fetch_add functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUsKk8N+EUsVjQS1sSRmsw+QKx4xPo7y4wOg6WLr0pqeQ@mail.gmail.com/mbox/"},{"id":17887,"url":"https://patchwork.plctlab.org/api/1.2/patches/17887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668042934-1377-1-git-send-email-apinski@marvell.com/","msgid":"<1668042934-1377-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-10T01:15:34","name":"Remove SLOW_SHORT_ACCESS from target headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668042934-1377-1-git-send-email-apinski@marvell.com/mbox/"},{"id":17914,"url":"https://patchwork.plctlab.org/api/1.2/patches/17914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110015608.454675-1-polacek@redhat.com/","msgid":"<20221110015608.454675-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-10T01:56:08","name":"c++: Extend -Wdangling-reference for std::minmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110015608.454675-1-polacek@redhat.com/mbox/"},{"id":17917,"url":"https://patchwork.plctlab.org/api/1.2/patches/17917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110020031.152520-1-jwakely@redhat.com/","msgid":"<20221110020031.152520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-10T02:00:31","name":"[committed] libstdc++: Optimize std::destructible concept","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110020031.152520-1-jwakely@redhat.com/mbox/"},{"id":17925,"url":"https://patchwork.plctlab.org/api/1.2/patches/17925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xll905otHWkzxl@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:44:39","name":"[1/6] PowerPC: Add -mcpu=future","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xll905otHWkzxl@toto.the-meissners.org/mbox/"},{"id":17926,"url":"https://patchwork.plctlab.org/api/1.2/patches/17926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xl0/RvJdmvchfJ@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:45:39","name":"[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xl0/RvJdmvchfJ@toto.the-meissners.org/mbox/"},{"id":17927,"url":"https://patchwork.plctlab.org/api/1.2/patches/17927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xmDFSXZ3ATDcpO@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:46:36","name":"[3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xmDFSXZ3ATDcpO@toto.the-meissners.org/mbox/"},{"id":17928,"url":"https://patchwork.plctlab.org/api/1.2/patches/17928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xm8GdMwRMEkbRA@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:50:24","name":"[4/6] PowerPC: Make MMA insns support DMR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xm8GdMwRMEkbRA@toto.the-meissners.org/mbox/"},{"id":17929,"url":"https://patchwork.plctlab.org/api/1.2/patches/17929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xnRFz8ioc+r7Jk@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:51:48","name":"[5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xnRFz8ioc+r7Jk@toto.the-meissners.org/mbox/"},{"id":17930,"url":"https://patchwork.plctlab.org/api/1.2/patches/17930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xngfGkkZBwBVcO@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:52:49","name":"[6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xngfGkkZBwBVcO@toto.the-meissners.org/mbox/"},{"id":17931,"url":"https://patchwork.plctlab.org/api/1.2/patches/17931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110031345.193991-1-jwakely@redhat.com/","msgid":"<20221110031345.193991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-10T03:13:45","name":"c-family: Support #pragma region/endregion [PR85487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110031345.193991-1-jwakely@redhat.com/mbox/"},{"id":17953,"url":"https://patchwork.plctlab.org/api/1.2/patches/17953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz/","msgid":"<9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz>","list_archive_url":null,"date":"2022-11-10T05:33:17","name":"[(pushed)] doc: Modernize baseconf.py.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz/mbox/"},{"id":17955,"url":"https://patchwork.plctlab.org/api/1.2/patches/17955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz/","msgid":"<6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz>","list_archive_url":null,"date":"2022-11-10T05:38:50","name":"[(pushed)] maintainer-scripts: fix superfluous '\''sh'\'' for Python script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz/mbox/"},{"id":17957,"url":"https://patchwork.plctlab.org/api/1.2/patches/17957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110060143.28132-1-haochen.jiang@intel.com/","msgid":"<20221110060143.28132-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-10T06:01:43","name":"[wwwdocs] gcc-13: Mention Intel new ISA and march support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110060143.28132-1-haochen.jiang@intel.com/mbox/"},{"id":18003,"url":"https://patchwork.plctlab.org/api/1.2/patches/18003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110080742.59F2733E46@hamza.pair.com/","msgid":"<20221110080742.59F2733E46@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T08:07:40","name":"[committed] wwwdocs: c99status: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110080742.59F2733E46@hamza.pair.com/mbox/"},{"id":18013,"url":"https://patchwork.plctlab.org/api/1.2/patches/18013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110084212.37FF333E18@hamza.pair.com/","msgid":"<20221110084212.37FF333E18@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T08:42:10","name":"[committed] wwwdocs: gcc-4.8: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110084212.37FF333E18@hamza.pair.com/mbox/"},{"id":18027,"url":"https://patchwork.plctlab.org/api/1.2/patches/18027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2zEZ6f0v/74nBbT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-10T09:29:11","name":"i386: Fix up ix86_expand_int_sse_cmp [PR107585]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2zEZ6f0v/74nBbT@tucnak/mbox/"},{"id":18032,"url":"https://patchwork.plctlab.org/api/1.2/patches/18032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110094331.7804333E60@hamza.pair.com/","msgid":"<20221110094331.7804333E60@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T09:43:28","name":"[committed] wwwdocs: readings: Remove linux-c6x.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110094331.7804333E60@hamza.pair.com/mbox/"},{"id":18046,"url":"https://patchwork.plctlab.org/api/1.2/patches/18046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-2-aldot@gcc.gnu.org/","msgid":"<20221110102031.1366016-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-10T10:20:30","name":"[1/2] Fortran: Cleanup struct ext_attr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-2-aldot@gcc.gnu.org/mbox/"},{"id":18047,"url":"https://patchwork.plctlab.org/api/1.2/patches/18047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-3-aldot@gcc.gnu.org/","msgid":"<20221110102031.1366016-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-10T10:20:31","name":"[2/2] Fortran: Add attribute flatten","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-3-aldot@gcc.gnu.org/mbox/"},{"id":18050,"url":"https://patchwork.plctlab.org/api/1.2/patches/18050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae8406c3-b85a-4bd9-9bd2-fff5474a1772@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T10:23:21","name":"[GCC] arm: Add support for Cortex-X1C CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae8406c3-b85a-4bd9-9bd2-fff5474a1772@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18058,"url":"https://patchwork.plctlab.org/api/1.2/patches/18058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c24cd3a3-6f3f-437d-b7ec-a9fea09378df@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T10:37:50","name":"[GCC] arm: Add support for new frame unwinding instruction \"0xb5\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c24cd3a3-6f3f-437d-b7ec-a9fea09378df@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18076,"url":"https://patchwork.plctlab.org/api/1.2/patches/18076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3d17147-aa74-aa6a-a435-2c8445e5b03b@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T11:16:55","name":"[1/2] aarch64: Enable the use of LDAPR for load-acquire semantics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3d17147-aa74-aa6a-a435-2c8445e5b03b@arm.com/mbox/"},{"id":18077,"url":"https://patchwork.plctlab.org/api/1.2/patches/18077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5c31297-4b0e-aaf5-227d-d69dbafb7e24@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T11:20:01","name":"[2/2] aarch64: Add support for widening LDAPR instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5c31297-4b0e-aaf5-227d-d69dbafb7e24@arm.com/mbox/"},{"id":18084,"url":"https://patchwork.plctlab.org/api/1.2/patches/18084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9468d0c-9136-edd2-390c-b49821ce8296@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-10T12:09:06","name":"sphinx: support Sphinx in lib*/Makefile.am.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9468d0c-9136-edd2-390c-b49821ce8296@suse.cz/mbox/"},{"id":18114,"url":"https://patchwork.plctlab.org/api/1.2/patches/18114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz/","msgid":"<7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz>","list_archive_url":null,"date":"2022-11-10T12:57:07","name":"[(pushed)] sphinx: add missing newline for conf.py files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz/mbox/"},{"id":18115,"url":"https://patchwork.plctlab.org/api/1.2/patches/18115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz/","msgid":"<247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz>","list_archive_url":null,"date":"2022-11-10T12:58:50","name":"[(pushed)] sphinx: add missing newline for conf.py files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz/mbox/"},{"id":18124,"url":"https://patchwork.plctlab.org/api/1.2/patches/18124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110131102.1091513B58@imap2.suse-dmz.suse.de/","msgid":"<20221110131102.1091513B58@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T13:11:01","name":"Restore CCP copy propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110131102.1091513B58@imap2.suse-dmz.suse.de/mbox/"},{"id":18134,"url":"https://patchwork.plctlab.org/api/1.2/patches/18134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y20AQOMOIzv3lvDR@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-10T13:44:32","name":"range-op: Implement floating point multiplication fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y20AQOMOIzv3lvDR@tucnak/mbox/"},{"id":18138,"url":"https://patchwork.plctlab.org/api/1.2/patches/18138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm5yfmc3v6.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2022-11-10T13:53:49","name":"doc: formatting fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm5yfmc3v6.fsf@suse.de/mbox/"},{"id":18149,"url":"https://patchwork.plctlab.org/api/1.2/patches/18149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110141936.62A821332F@imap2.suse-dmz.suse.de/","msgid":"<20221110141936.62A821332F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T14:19:36","name":"better PHI copy propagation for forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110141936.62A821332F@imap2.suse-dmz.suse.de/mbox/"},{"id":18151,"url":"https://patchwork.plctlab.org/api/1.2/patches/18151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com/","msgid":"<6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com>","list_archive_url":null,"date":"2022-11-10T14:37:13","name":"[RESEND] riscv: improve the cost model for loading a 64bit constant in rv32.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com/mbox/"},{"id":18153,"url":"https://patchwork.plctlab.org/api/1.2/patches/18153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110150345.157116-1-aldyh@redhat.com/","msgid":"<20221110150345.157116-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-10T15:03:46","name":"Do not specify NAN sign in frange::set_nonnegative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110150345.157116-1-aldyh@redhat.com/mbox/"},{"id":18159,"url":"https://patchwork.plctlab.org/api/1.2/patches/18159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110151434.7F16613B58@imap2.suse-dmz.suse.de/","msgid":"<20221110151434.7F16613B58@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T15:14:34","name":"Make last DCE remove empty loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110151434.7F16613B58@imap2.suse-dmz.suse.de/mbox/"},{"id":18230,"url":"https://patchwork.plctlab.org/api/1.2/patches/18230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdbe6424-b2f6-d632-1449-22dc00fb7697@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-10T17:03:13","name":"[(pushed)] docs: move label directly before title","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdbe6424-b2f6-d632-1449-22dc00fb7697@suse.cz/mbox/"},{"id":18281,"url":"https://patchwork.plctlab.org/api/1.2/patches/18281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110183715.2644564-1-dmalcolm@redhat.com/","msgid":"<20221110183715.2644564-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-10T18:37:15","name":"[committed] analyzer: new warning: -Wanalyzer-deref-before-check [PR99671]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110183715.2644564-1-dmalcolm@redhat.com/mbox/"},{"id":18299,"url":"https://patchwork.plctlab.org/api/1.2/patches/18299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-1-ppalka@redhat.com/","msgid":"<20221110195602.2434376-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-10T19:56:01","name":"[1/2] c++: remove function_p parm from tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-1-ppalka@redhat.com/mbox/"},{"id":18300,"url":"https://patchwork.plctlab.org/api/1.2/patches/18300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-2-ppalka@redhat.com/","msgid":"<20221110195602.2434376-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-10T19:56:02","name":"[2/2] c++: remove i_c_e_p parm from tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-2-ppalka@redhat.com/mbox/"},{"id":18329,"url":"https://patchwork.plctlab.org/api/1.2/patches/18329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213403.3592364-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213403.3592364-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:34:03","name":"[v2] RISC-V: costs: support shift-and-add in strength-reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213403.3592364-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18330,"url":"https://patchwork.plctlab.org/api/1.2/patches/18330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213445.3592438-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213445.3592438-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:34:45","name":"RISC-V: Use bseti to cover more immediates than with ori alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213445.3592438-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18331,"url":"https://patchwork.plctlab.org/api/1.2/patches/18331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213501.3592470-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213501.3592470-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:35:01","name":"RISC-V: Use binvi to cover more immediates than with xori alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213501.3592470-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18332,"url":"https://patchwork.plctlab.org/api/1.2/patches/18332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213617.3592572-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213617.3592572-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:36:17","name":"RISC-V: Optimize masking with two clear bits not a SMALL_OPERAND","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213617.3592572-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18333,"url":"https://patchwork.plctlab.org/api/1.2/patches/18333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c4cc511a-5cda-481e-b712-133f9bc73ffe-1668117408459@3c-app-gmx-bs59/","msgid":"","list_archive_url":null,"date":"2022-11-10T21:56:48","name":"Fortran: fix treatment of character, value, optional dummy arguments [PR107444]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c4cc511a-5cda-481e-b712-133f9bc73ffe-1668117408459@3c-app-gmx-bs59/mbox/"},{"id":18343,"url":"https://patchwork.plctlab.org/api/1.2/patches/18343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OP472vRO_13s3y8PI5nplVOCz6jhAMLTrsiRNglJYpsVepytiMkTHLMJAgzi83RBq0Lbv9VU0QNCuLNKiTUtVPJebd8pQPSAvXgzU7QL35k=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-11-10T23:07:30","name":"d: Update __FreeBSD_version values [PR107469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OP472vRO_13s3y8PI5nplVOCz6jhAMLTrsiRNglJYpsVepytiMkTHLMJAgzi83RBq0Lbv9VU0QNCuLNKiTUtVPJebd8pQPSAvXgzU7QL35k=@lorenzosalvadore.it/mbox/"},{"id":18344,"url":"https://patchwork.plctlab.org/api/1.2/patches/18344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org/","msgid":"<3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org>","list_archive_url":null,"date":"2022-11-10T23:25:26","name":"demangler: Templated lambda demangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org/mbox/"},{"id":18370,"url":"https://patchwork.plctlab.org/api/1.2/patches/18370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-2-hongtao.liu@intel.com/","msgid":"<20221111012631.76776-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-11T01:26:30","name":"[1/2] Implement hwasan target_hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-2-hongtao.liu@intel.com/mbox/"},{"id":18369,"url":"https://patchwork.plctlab.org/api/1.2/patches/18369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-3-hongtao.liu@intel.com/","msgid":"<20221111012631.76776-3-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-11T01:26:31","name":"[2/2] Enable hwasan for x86-64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-3-hongtao.liu@intel.com/mbox/"},{"id":18390,"url":"https://patchwork.plctlab.org/api/1.2/patches/18390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9934c80-5182-9a7b-f9fe-f7b14e458e16@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T02:28:01","name":"[v2] match.pd: rewrite select to branchless expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9934c80-5182-9a7b-f9fe-f7b14e458e16@rivosinc.com/mbox/"},{"id":18392,"url":"https://patchwork.plctlab.org/api/1.2/patches/18392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111024330.87663-1-haochen.jiang@intel.com/","msgid":"<20221111024330.87663-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-11T02:43:30","name":"i386: Add AMX-TILE dependency for AMX related ISAs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111024330.87663-1-haochen.jiang@intel.com/mbox/"},{"id":18393,"url":"https://patchwork.plctlab.org/api/1.2/patches/18393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025244.188157-1-polacek@redhat.com/","msgid":"<20221111025244.188157-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T02:52:44","name":"configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025244.188157-1-polacek@redhat.com/mbox/"},{"id":18394,"url":"https://patchwork.plctlab.org/api/1.2/patches/18394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025309.188226-1-polacek@redhat.com/","msgid":"<20221111025309.188226-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T02:53:09","name":"configure: Implement --enable-host-bind-now","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025309.188226-1-polacek@redhat.com/mbox/"},{"id":18469,"url":"https://patchwork.plctlab.org/api/1.2/patches/18469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-11-11T05:21:42","name":"[v2] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":18470,"url":"https://patchwork.plctlab.org/api/1.2/patches/18470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053043.563832-1-jwakely@redhat.com/","msgid":"<20221111053043.563832-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:43","name":"[committed] libstdc++: Avoid redundant checks in std::use_facet [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053043.563832-1-jwakely@redhat.com/mbox/"},{"id":18471,"url":"https://patchwork.plctlab.org/api/1.2/patches/18471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053054.563891-1-jwakely@redhat.com/","msgid":"<20221111053054.563891-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:54","name":"[committed] libstdc++: Fix test that uses C++17 variable template in C++14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053054.563891-1-jwakely@redhat.com/mbox/"},{"id":18472,"url":"https://patchwork.plctlab.org/api/1.2/patches/18472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053059.563909-1-jwakely@redhat.com/","msgid":"<20221111053059.563909-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:59","name":"[committed] libstdc++: Add missing definition for in C++14 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053059.563909-1-jwakely@redhat.com/mbox/"},{"id":18473,"url":"https://patchwork.plctlab.org/api/1.2/patches/18473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053108.563931-1-jwakely@redhat.com/","msgid":"<20221111053108.563931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:31:08","name":"[committed] libstdc++: Fix tests with non-const operator==","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053108.563931-1-jwakely@redhat.com/mbox/"},{"id":18522,"url":"https://patchwork.plctlab.org/api/1.2/patches/18522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y238ewF+UgXC2kFk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T07:40:43","name":"c++: Implement C++23 P2589R1 - - static operator[]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y238ewF+UgXC2kFk@tucnak/mbox/"},{"id":18524,"url":"https://patchwork.plctlab.org/api/1.2/patches/18524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y239B6R5TVWj2/jM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T07:43:03","name":"c++: Implement CWG 2654 - Un-deprecation of compound volatile assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y239B6R5TVWj2/jM@tucnak/mbox/"},{"id":18537,"url":"https://patchwork.plctlab.org/api/1.2/patches/18537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111082532.24898-1-guojiufu@linux.ibm.com/","msgid":"<20221111082532.24898-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-11T08:25:32","name":"Using sub-scalars mode to move struct block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111082532.24898-1-guojiufu@linux.ibm.com/mbox/"},{"id":18554,"url":"https://patchwork.plctlab.org/api/1.2/patches/18554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24NZRBs5H9In4Cr@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T08:52:53","name":"range-op, v2: Implement floating point multiplication fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24NZRBs5H9In4Cr@tucnak/mbox/"},{"id":18584,"url":"https://patchwork.plctlab.org/api/1.2/patches/18584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111090838.7194-1-lili.cui@intel.com/","msgid":"<20221111090838.7194-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-11-11T09:08:38","name":"x86: Enable 256 move by pieces for ALDERLAKE and AVX2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111090838.7194-1-lili.cui@intel.com/mbox/"},{"id":18585,"url":"https://patchwork.plctlab.org/api/1.2/patches/18585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24RVgktf3A5X5Di@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T09:09:42","name":"range-op: Implement floating point division fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24RVgktf3A5X5Di@tucnak/mbox/"},{"id":18636,"url":"https://patchwork.plctlab.org/api/1.2/patches/18636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24df+rg4zNzHGKK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T10:01:35","name":"range-op: Cleanup floating point multiplication and division fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24df+rg4zNzHGKK@tucnak/mbox/"},{"id":18683,"url":"https://patchwork.plctlab.org/api/1.2/patches/18683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24wszWBpJVRv1ma@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-11T11:23:31","name":"libstdc++: Set active union member in constexpr std::string [PR103295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24wszWBpJVRv1ma@Thaum.localdomain/mbox/"},{"id":18700,"url":"https://patchwork.plctlab.org/api/1.2/patches/18700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2426uaT5d2Zc7M9@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T11:50:02","name":"range-op: Implement op[12]_range operators for {PLUS,MINUS,MULT,RDIV}_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2426uaT5d2Zc7M9@tucnak/mbox/"},{"id":18708,"url":"https://patchwork.plctlab.org/api/1.2/patches/18708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com/","msgid":"<57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T11:58:04","name":"[GCC] aarch64: Add support for Cortex-A715 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18721,"url":"https://patchwork.plctlab.org/api/1.2/patches/18721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com/","msgid":"<274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T12:11:29","name":"[GCC] aarch64: Add support for Cortex-X1C CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18725,"url":"https://patchwork.plctlab.org/api/1.2/patches/18725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz/","msgid":"<161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz>","list_archive_url":null,"date":"2022-11-11T12:33:51","name":"[(pushed)] sphinx: stop using parallel mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz/mbox/"},{"id":18729,"url":"https://patchwork.plctlab.org/api/1.2/patches/18729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111130221.541603-1-oriachiuan@gmail.com/","msgid":"<20221111130221.541603-1-oriachiuan@gmail.com>","list_archive_url":null,"date":"2022-11-11T13:02:21","name":"fix small const data for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111130221.541603-1-oriachiuan@gmail.com/mbox/"},{"id":18738,"url":"https://patchwork.plctlab.org/api/1.2/patches/18738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz/","msgid":"<15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz>","list_archive_url":null,"date":"2022-11-11T13:27:21","name":"[(pushed)] jit: doc: Use shared Indices and tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz/mbox/"},{"id":18739,"url":"https://patchwork.plctlab.org/api/1.2/patches/18739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111133112.85A4A13273@imap2.suse-dmz.suse.de/","msgid":"<20221111133112.85A4A13273@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-11T13:31:12","name":"tree-optimization/107618 - enhance copy propagation of constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111133112.85A4A13273@imap2.suse-dmz.suse.de/mbox/"},{"id":18740,"url":"https://patchwork.plctlab.org/api/1.2/patches/18740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25QhrM0bMcTmpAn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:39:18","name":"[0/8] middle-end: Ensure at_stmt is defined before an early exit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25QhrM0bMcTmpAn@e124511.cambridge.arm.com/mbox/"},{"id":18742,"url":"https://patchwork.plctlab.org/api/1.2/patches/18742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25SMeZZryZD/ZSN@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:46:25","name":"[2/8] middle-end: Remove prototype for number_of_iterations_popcount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25SMeZZryZD/ZSN@e124511.cambridge.arm.com/mbox/"},{"id":18741,"url":"https://patchwork.plctlab.org/api/1.2/patches/18741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26247edc-2f04-844e-f8ca-87892632377b@suse.cz/","msgid":"<26247edc-2f04-844e-f8ca-87892632377b@suse.cz>","list_archive_url":null,"date":"2022-11-11T13:47:01","name":"doc: Ada: include Indices and Tables in manuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26247edc-2f04-844e-f8ca-87892632377b@suse.cz/mbox/"},{"id":18778,"url":"https://patchwork.plctlab.org/api/1.2/patches/18778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25TqHuEvlEQEF6Q@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:52:40","name":"[3/8] middle-end: Refactor number_of_iterations_popcount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25TqHuEvlEQEF6Q@e124511.cambridge.arm.com/mbox/"},{"id":18744,"url":"https://patchwork.plctlab.org/api/1.2/patches/18744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-1-aldyh@redhat.com/","msgid":"<20221111135318.235387-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:14","name":"[COMMITTED,range-ops] Add tree code to range_operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-1-aldyh@redhat.com/mbox/"},{"id":18745,"url":"https://patchwork.plctlab.org/api/1.2/patches/18745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-2-aldyh@redhat.com/","msgid":"<20221111135318.235387-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:15","name":"[COMMITTED,range-ops] Use existing tree code for *DIV_EXPR entries.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-2-aldyh@redhat.com/mbox/"},{"id":18743,"url":"https://patchwork.plctlab.org/api/1.2/patches/18743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-3-aldyh@redhat.com/","msgid":"<20221111135318.235387-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:16","name":"[COMMITTED,range-ops] Update known bitmasks using CCP for all operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-3-aldyh@redhat.com/mbox/"},{"id":18746,"url":"https://patchwork.plctlab.org/api/1.2/patches/18746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-4-aldyh@redhat.com/","msgid":"<20221111135318.235387-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:17","name":"[COMMITTED,range-ops] Avoid unnecessary intersection in update_known_bitmask.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-4-aldyh@redhat.com/mbox/"},{"id":18751,"url":"https://patchwork.plctlab.org/api/1.2/patches/18751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-5-aldyh@redhat.com/","msgid":"<20221111135318.235387-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:18","name":"[COMMITTED,range-ops] Remove specialized fold_range methods for various operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-5-aldyh@redhat.com/mbox/"},{"id":18846,"url":"https://patchwork.plctlab.org/api/1.2/patches/18846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FD8B866FE4B8058A80B483009@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:22:16","name":"libatomic: Add support for LSE and LSE2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FD8B866FE4B8058A80B483009@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":18851,"url":"https://patchwork.plctlab.org/api/1.2/patches/18851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111143614.8F25313357@imap2.suse-dmz.suse.de/","msgid":"<20221111143614.8F25313357@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-11T14:36:14","name":"tree-optimization/107554 - fix ICE in stlen optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111143614.8F25313357@imap2.suse-dmz.suse.de/mbox/"},{"id":18859,"url":"https://patchwork.plctlab.org/api/1.2/patches/18859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16561-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:44:55","name":"[i386] : Update ix86_can_change_mode_class target hook to accept QImode conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16561-tamar@arm.com/mbox/"},{"id":18856,"url":"https://patchwork.plctlab.org/api/1.2/patches/18856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16562-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:45:42","name":"AArch64 Fix vector re-interpretation between partial SIMD modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16562-tamar@arm.com/mbox/"},{"id":18862,"url":"https://patchwork.plctlab.org/api/1.2/patches/18862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982C07FA68CA1BAF8B6C10883009@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:48:24","name":"AArch64: Add support for -mdirect-extern-access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982C07FA68CA1BAF8B6C10883009@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":18879,"url":"https://patchwork.plctlab.org/api/1.2/patches/18879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com/","msgid":"<8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T15:08:04","name":"[GCC] aarch64: Add support for Cortex-X3 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18881,"url":"https://patchwork.plctlab.org/api/1.2/patches/18881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com/","msgid":"<853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com>","list_archive_url":null,"date":"2022-11-11T15:13:01","name":"[wwwdocs] projects/gomp: TR11 + GCC13 update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com/mbox/"},{"id":18898,"url":"https://patchwork.plctlab.org/api/1.2/patches/18898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com/","msgid":"<3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com>","list_archive_url":null,"date":"2022-11-11T16:17:17","name":"[COMMITTED] process transitive inferred ranges in pre_fold_stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com/mbox/"},{"id":18901,"url":"https://patchwork.plctlab.org/api/1.2/patches/18901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfipsbte.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:19:57","name":"Handle epilogues that contain jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfipsbte.fsf@arm.com/mbox/"},{"id":18903,"url":"https://patchwork.plctlab.org/api/1.2/patches/18903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt8xsbrl.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:21:02","name":"Allow prologues and epilogues to be inserted later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt8xsbrl.fsf@arm.com/mbox/"},{"id":18905,"url":"https://patchwork.plctlab.org/api/1.2/patches/18905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z5sbpy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:22:01","name":"Add a target hook for sibcall epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z5sbpy.fsf@arm.com/mbox/"},{"id":18907,"url":"https://patchwork.plctlab.org/api/1.2/patches/18907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpdsbev.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:28:40","name":"Add a new target hook: TARGET_START_CALL_ARGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpdsbev.fsf@arm.com/mbox/"},{"id":18921,"url":"https://patchwork.plctlab.org/api/1.2/patches/18921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26BNiMCgUMaOpW5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:07:02","name":"c++: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26BNiMCgUMaOpW5@tucnak/mbox/"},{"id":18927,"url":"https://patchwork.plctlab.org/api/1.2/patches/18927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yfls8j1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:30:58","name":"Allow targets to add USEs to asms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yfls8j1.fsf@arm.com/mbox/"},{"id":18928,"url":"https://patchwork.plctlab.org/api/1.2/patches/18928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcxqtwt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:32:02","name":"aarch64: Use SVE'\''s RDVL instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcxqtwt.fsf@arm.com/mbox/"},{"id":18932,"url":"https://patchwork.plctlab.org/api/1.2/patches/18932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af40d679-cf52-f422-2b4f-9e6306c8508e@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:39:55","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af40d679-cf52-f422-2b4f-9e6306c8508e@arm.com/mbox/"},{"id":18933,"url":"https://patchwork.plctlab.org/api/1.2/patches/18933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com/","msgid":"<212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com>","list_archive_url":null,"date":"2022-11-11T17:40:55","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com/mbox/"},{"id":18934,"url":"https://patchwork.plctlab.org/api/1.2/patches/18934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111174424.686786-1-jwakely@redhat.com/","msgid":"<20221111174424.686786-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T17:44:24","name":"[committed] libstdc++: Fix wstring conversions in filesystem::path [PR95048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111174424.686786-1-jwakely@redhat.com/mbox/"},{"id":18937,"url":"https://patchwork.plctlab.org/api/1.2/patches/18937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111181147.278546-1-aldyh@redhat.com/","msgid":"<20221111181147.278546-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T18:11:47","name":"[range-ops] Add ability to represent open intervals in frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111181147.278546-1-aldyh@redhat.com/mbox/"},{"id":18967,"url":"https://patchwork.plctlab.org/api/1.2/patches/18967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26XubanUrWdwJZF@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:43:05","name":"[4/8] Modify test, to prevent the next patch breaking it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26XubanUrWdwJZF@e124511.cambridge.arm.com/mbox/"},{"id":18968,"url":"https://patchwork.plctlab.org/api/1.2/patches/18968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111184759.2531849-1-ppalka@redhat.com/","msgid":"<20221111184759.2531849-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-11T18:47:59","name":"c++: init_priority and SUPPORTS_INIT_PRIORITY [PR107638]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111184759.2531849-1-ppalka@redhat.com/mbox/"},{"id":18973,"url":"https://patchwork.plctlab.org/api/1.2/patches/18973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26ZZNEHkjv+eR+p@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:50:12","name":"[5/8] middle-end: Add cltz_complement idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26ZZNEHkjv+eR+p@e124511.cambridge.arm.com/mbox/"},{"id":18977,"url":"https://patchwork.plctlab.org/api/1.2/patches/18977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26aTm8CDN6Jockb@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:54:06","name":"[6/8] docs: Add popcount, clz and ctz target attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26aTm8CDN6Jockb@e124511.cambridge.arm.com/mbox/"},{"id":18978,"url":"https://patchwork.plctlab.org/api/1.2/patches/18978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26b9g+LgJPnRItn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T19:01:10","name":"[7/8] middle-end: Add c[lt]z idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26b9g+LgJPnRItn@e124511.cambridge.arm.com/mbox/"},{"id":18979,"url":"https://patchwork.plctlab.org/api/1.2/patches/18979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26dZqWmy8qJdpjn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T19:07:18","name":"[8/8] middle-end: Expand comment for tree_niter_desc.max","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26dZqWmy8qJdpjn@e124511.cambridge.arm.com/mbox/"},{"id":18981,"url":"https://patchwork.plctlab.org/api/1.2/patches/18981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111194356.3922768-1-jcmvbkbc@gmail.com/","msgid":"<20221111194356.3922768-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-11T19:43:56","name":"gcc: m68k: fix PR target/107645","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111194356.3922768-1-jcmvbkbc@gmail.com/mbox/"},{"id":18982,"url":"https://patchwork.plctlab.org/api/1.2/patches/18982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com/","msgid":"<914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com>","list_archive_url":null,"date":"2022-11-11T19:53:24","name":"[COMMITTED] PR tree-optimization/107523 - Don'\''t add dependencies in update_stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com/mbox/"},{"id":18989,"url":"https://patchwork.plctlab.org/api/1.2/patches/18989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111202226.103649-1-polacek@redhat.com/","msgid":"<20221111202226.103649-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T20:22:26","name":"c++: Disable -Wdangling-reference when initing T&","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111202226.103649-1-polacek@redhat.com/mbox/"},{"id":18993,"url":"https://patchwork.plctlab.org/api/1.2/patches/18993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211236.2707086-1-dmalcolm@redhat.com/","msgid":"<20221111211236.2707086-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:12:36","name":"[committed] analyzer: new warning: -Wanalyzer-infinite-recursion [PR106147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211236.2707086-1-dmalcolm@redhat.com/mbox/"},{"id":18994,"url":"https://patchwork.plctlab.org/api/1.2/patches/18994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211251.2707146-1-dmalcolm@redhat.com/","msgid":"<20221111211251.2707146-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:12:51","name":"[committed] analyzer: split out checker_event classes to their own header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211251.2707146-1-dmalcolm@redhat.com/mbox/"},{"id":19003,"url":"https://patchwork.plctlab.org/api/1.2/patches/19003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111215421.2709259-1-dmalcolm@redhat.com/","msgid":"<20221111215421.2709259-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:54:21","name":"[committed] analyzer: more state machine documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111215421.2709259-1-dmalcolm@redhat.com/mbox/"},{"id":19066,"url":"https://patchwork.plctlab.org/api/1.2/patches/19066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014353.810822-1-jwakely@redhat.com/","msgid":"<20221112014353.810822-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-12T01:43:53","name":"[committed] libstdc++: Define INSTANTIATE_FACET_ACCESSORS macro in compat source [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014353.810822-1-jwakely@redhat.com/mbox/"},{"id":19068,"url":"https://patchwork.plctlab.org/api/1.2/patches/19068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014433.814465-1-jwakely@redhat.com/","msgid":"<20221112014433.814465-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-12T01:44:33","name":"[committed] libstdc++: Simplify build targets for debug library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014433.814465-1-jwakely@redhat.com/mbox/"},{"id":19067,"url":"https://patchwork.plctlab.org/api/1.2/patches/19067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8nlkkth.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:44:58","name":"[01/12] ipa: IPA-SRA split detection simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8nlkkth.fsf@suse.cz/mbox/"},{"id":19069,"url":"https://patchwork.plctlab.org/api/1.2/patches/19069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6tu35kksn.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:45:28","name":"[02/12] ipa-cp: Do not consider useless aggregate constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6tu35kksn.fsf@suse.cz/mbox/"},{"id":19070,"url":"https://patchwork.plctlab.org/api/1.2/patches/19070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfipkksb.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:45:40","name":"[03/12] ipa-cp: Write transformation summaries of all functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfipkksb.fsf@suse.cz/mbox/"},{"id":19071,"url":"https://patchwork.plctlab.org/api/1.2/patches/19071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6r0y9kkrq.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:01","name":"[04/12] ipa: Better way of applying both IPA-CP and IPA-SRA (PR 103227)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6r0y9kkrq.fsf@suse.cz/mbox/"},{"id":19073,"url":"https://patchwork.plctlab.org/api/1.2/patches/19073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pmdtkkrk.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:07","name":"[05/12] ipa-sra: Dump edge summaries also for non-candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pmdtkkrk.fsf@suse.cz/mbox/"},{"id":19072,"url":"https://patchwork.plctlab.org/api/1.2/patches/19072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7tdkkqz.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:28","name":"[06/12] ipa-cp: Leave removal of unused parameters to IPA-SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7tdkkqz.fsf@suse.cz/mbox/"},{"id":19075,"url":"https://patchwork.plctlab.org/api/1.2/patches/19075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt8xkkqs.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:35","name":"[07/12] ipa-sra: Treat REFERENCE_TYPES as always dereferencable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt8xkkqs.fsf@suse.cz/mbox/"},{"id":19076,"url":"https://patchwork.plctlab.org/api/1.2/patches/19076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6leohkkq8.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:55","name":"[08/12] ipa-sra: Move caller->callee propagation before callee->caller one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6leohkkq8.fsf@suse.cz/mbox/"},{"id":19074,"url":"https://patchwork.plctlab.org/api/1.2/patches/19074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6k041kkpy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:05","name":"[09/12] ipa-sra: Be optimistic about Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6k041kkpy.fsf@suse.cz/mbox/"},{"id":19079,"url":"https://patchwork.plctlab.org/api/1.2/patches/19079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6iljlkkp4.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:35","name":"[10/12] ipa-sra: Forward propagation of sizes which are safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6iljlkkp4.fsf@suse.cz/mbox/"},{"id":19077,"url":"https://patchwork.plctlab.org/api/1.2/patches/19077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6h6z5kkoy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:41","name":"[11/12] ipa-sra: Make scan_expr_access bail out on uninteresting expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6h6z5kkoy.fsf@suse.cz/mbox/"},{"id":19078,"url":"https://patchwork.plctlab.org/api/1.2/patches/19078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fsepkkou.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:45","name":"[12/12] ipa: Avoid looking for IPA-SRA replacements where there are none","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fsepkkou.fsf@suse.cz/mbox/"},{"id":19089,"url":"https://patchwork.plctlab.org/api/1.2/patches/19089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032310.2723361-1-dmalcolm@redhat.com/","msgid":"<20221112032310.2723361-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-12T03:23:10","name":"[v2] c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032310.2723361-1-dmalcolm@redhat.com/mbox/"},{"id":19097,"url":"https://patchwork.plctlab.org/api/1.2/patches/19097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032740.2724091-1-dmalcolm@redhat.com/","msgid":"<20221112032740.2724091-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-12T03:27:40","name":"[v2] analyzer: add warnings relating to sockets [PR106140]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032740.2724091-1-dmalcolm@redhat.com/mbox/"},{"id":19112,"url":"https://patchwork.plctlab.org/api/1.2/patches/19112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com/","msgid":"<2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com>","list_archive_url":null,"date":"2022-11-12T04:55:30","name":"c: C2x constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com/mbox/"},{"id":19113,"url":"https://patchwork.plctlab.org/api/1.2/patches/19113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28qK55092Ii3COP@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-12T05:07:55","name":"[7] PowerPC: Add -mcpu=future saturating subtract built-ins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28qK55092Ii3COP@toto.the-meissners.org/mbox/"},{"id":19114,"url":"https://patchwork.plctlab.org/api/1.2/patches/19114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28q48o93tWF223A@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-12T05:10:59","name":"[8] PowerPC: Support load/store vector with right length.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28q48o93tWF223A@toto.the-meissners.org/mbox/"},{"id":19121,"url":"https://patchwork.plctlab.org/api/1.2/patches/19121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112073756.912800-1-chenglulu@loongson.cn/","msgid":"<20221112073756.912800-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-12T07:37:56","name":"[v2] LoongArch: Add prefetch instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112073756.912800-1-chenglulu@loongson.cn/mbox/"},{"id":19130,"url":"https://patchwork.plctlab.org/api/1.2/patches/19130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29dkunenk2cCh7w@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T08:47:14","name":"libstdc++: Fix up to_chars ppc64le _Float128 overloads [PR107636]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29dkunenk2cCh7w@tucnak/mbox/"},{"id":19131,"url":"https://patchwork.plctlab.org/api/1.2/patches/19131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29erF8D0T/tXav0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T08:51:56","name":"[committed] libgomp: Fix up build on mingw [PR107641]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29erF8D0T/tXav0@tucnak/mbox/"},{"id":19136,"url":"https://patchwork.plctlab.org/api/1.2/patches/19136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112090754.997467-1-chenglulu@loongson.cn/","msgid":"<20221112090754.997467-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-12T09:07:54","name":"[v2] LoongArch: Optimize the implementation of stack check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112090754.997467-1-chenglulu@loongson.cn/mbox/"},{"id":19163,"url":"https://patchwork.plctlab.org/api/1.2/patches/19163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112102859.302600-1-aldyh@redhat.com/","msgid":"<20221112102859.302600-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-12T10:28:59","name":"[COMMITTED,frange] Avoid testing signed zero test for -fno-signed-zeros.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112102859.302600-1-aldyh@redhat.com/mbox/"},{"id":19166,"url":"https://patchwork.plctlab.org/api/1.2/patches/19166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2+CSlWHeS+aGxVZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T11:23:54","name":"c++: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2+CSlWHeS+aGxVZ@tucnak/mbox/"},{"id":19222,"url":"https://patchwork.plctlab.org/api/1.2/patches/19222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112165331.349041-1-polacek@redhat.com/","msgid":"<20221112165331.349041-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-12T16:53:31","name":"c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112165331.349041-1-polacek@redhat.com/mbox/"},{"id":19223,"url":"https://patchwork.plctlab.org/api/1.2/patches/19223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com/","msgid":"<77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com>","list_archive_url":null,"date":"2022-11-12T18:18:18","name":"ginclude: C2x header version macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com/mbox/"},{"id":19224,"url":"https://patchwork.plctlab.org/api/1.2/patches/19224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112183048.389811-1-aldyh@redhat.com/","msgid":"<20221112183048.389811-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-12T18:30:48","name":"[PR68097] Try to avoid recursing for floats in tree_*_nonnegative_warnv_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112183048.389811-1-aldyh@redhat.com/mbox/"},{"id":19241,"url":"https://patchwork.plctlab.org/api/1.2/patches/19241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112210535.45202-1-aldot@gcc.gnu.org/","msgid":"<20221112210535.45202-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T21:05:35","name":"Fortran: Remove unused declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112210535.45202-1-aldot@gcc.gnu.org/mbox/"},{"id":19258,"url":"https://patchwork.plctlab.org/api/1.2/patches/19258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-2-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:37","name":"[1/7] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19259,"url":"https://patchwork.plctlab.org/api/1.2/patches/19259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-3-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:38","name":"[2/7] RISC-V: Generate vt.maskc on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19261,"url":"https://patchwork.plctlab.org/api/1.2/patches/19261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-4-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:39","name":"[3/7] RISC-V: Support noce_try_store_flag_mask as vt.maskc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-4-philipp.tomsich@vrull.eu/mbox/"},{"id":19262,"url":"https://patchwork.plctlab.org/api/1.2/patches/19262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-5-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:40","name":"[4/7] RISC-V: Recognize sign-extract + and cases for XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-5-philipp.tomsich@vrull.eu/mbox/"},{"id":19263,"url":"https://patchwork.plctlab.org/api/1.2/patches/19263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-6-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:41","name":"[5/7] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-6-philipp.tomsich@vrull.eu/mbox/"},{"id":19260,"url":"https://patchwork.plctlab.org/api/1.2/patches/19260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-7-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:42","name":"[6/7] RISC-V: Support immediates in XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-7-philipp.tomsich@vrull.eu/mbox/"},{"id":19264,"url":"https://patchwork.plctlab.org/api/1.2/patches/19264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-8-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:43","name":"[7/7] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-8-philipp.tomsich@vrull.eu/mbox/"},{"id":19270,"url":"https://patchwork.plctlab.org/api/1.2/patches/19270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-2-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:39","name":"[1/5] c: Set the locus of the function result decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-2-aldot@gcc.gnu.org/mbox/"},{"id":19268,"url":"https://patchwork.plctlab.org/api/1.2/patches/19268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-3-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:40","name":"[2/5] c++: Set the locus of the function result decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-3-aldot@gcc.gnu.org/mbox/"},{"id":19271,"url":"https://patchwork.plctlab.org/api/1.2/patches/19271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-4-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-4-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:41","name":"[3/5] Fortran: Narrow return types [PR78798]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-4-aldot@gcc.gnu.org/mbox/"},{"id":19269,"url":"https://patchwork.plctlab.org/api/1.2/patches/19269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-5-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-5-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:42","name":"[4/5] value-range: Add as_string diagnostics helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-5-aldot@gcc.gnu.org/mbox/"},{"id":19272,"url":"https://patchwork.plctlab.org/api/1.2/patches/19272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-6-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-6-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:43","name":"[5/5] gimple: Add pass to note possible type demotions; IPA pro/demotion; DO NOT MERGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-6-aldot@gcc.gnu.org/mbox/"},{"id":19281,"url":"https://patchwork.plctlab.org/api/1.2/patches/19281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011445.920711-1-jwakely@redhat.com/","msgid":"<20221113011445.920711-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:14:45","name":"[committed] libstdc++: Allow std::to_chars for 128-bit integers in strict mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011445.920711-1-jwakely@redhat.com/mbox/"},{"id":19282,"url":"https://patchwork.plctlab.org/api/1.2/patches/19282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011454.920766-1-jwakely@redhat.com/","msgid":"<20221113011454.920766-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:14:54","name":"[committed] libstdc++: Implement C++20 [PR104166]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011454.920766-1-jwakely@redhat.com/mbox/"},{"id":19283,"url":"https://patchwork.plctlab.org/api/1.2/patches/19283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011640.920781-1-jwakely@redhat.com/","msgid":"<20221113011640.920781-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:16:40","name":"[committed] libstdc++: Add C++20 clocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011640.920781-1-jwakely@redhat.com/mbox/"},{"id":19311,"url":"https://patchwork.plctlab.org/api/1.2/patches/19311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzqjwp.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T09:32:38","name":"builtins: Commonise default handling of nonlocal_goto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzqjwp.fsf@arm.com/mbox/"},{"id":19316,"url":"https://patchwork.plctlab.org/api/1.2/patches/19316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk03zp42v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T09:59:52","name":"[01/16] aarch64: Add arm_streaming(_compatible) attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk03zp42v.fsf@arm.com/mbox/"},{"id":19317,"url":"https://patchwork.plctlab.org/api/1.2/patches/19317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsenp42e.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:09","name":"[02/16] aarch64: Add +sme","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsenp42e.fsf@arm.com/mbox/"},{"id":19318,"url":"https://patchwork.plctlab.org/api/1.2/patches/19318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpbp41y.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:25","name":"[03/16] aarch64: Distinguish streaming-compatible AdvSIMD insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpbp41y.fsf@arm.com/mbox/"},{"id":19319,"url":"https://patchwork.plctlab.org/api/1.2/patches/19319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzp41i.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:41","name":"[04/16] aarch64: Mark relevant SVE instructions as non-streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzp41i.fsf@arm.com/mbox/"},{"id":19323,"url":"https://patchwork.plctlab.org/api/1.2/patches/19323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35anp411.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:58","name":"[05/16] aarch64: Switch PSTATE.SM around calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35anp411.fsf@arm.com/mbox/"},{"id":19327,"url":"https://patchwork.plctlab.org/api/1.2/patches/19327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1sfnpg7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:12","name":"[06/16] aarch64: Add support for SME ZA attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1sfnpg7.fsf@arm.com/mbox/"},{"id":19322,"url":"https://patchwork.plctlab.org/api/1.2/patches/19322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpttu33npft.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:26","name":"[07/16] aarch64: Add a register class for w12-w15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpttu33npft.fsf@arm.com/mbox/"},{"id":19321,"url":"https://patchwork.plctlab.org/api/1.2/patches/19321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmdrnpfh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:38","name":"[08/16] aarch64: Add a VNx1TI mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmdrnpfh.fsf@arm.com/mbox/"},{"id":19329,"url":"https://patchwork.plctlab.org/api/1.2/patches/19329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleofnpf2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:53","name":"[09/16] aarch64: Make AARCH64_FL_SVE requirements explicit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleofnpf2.fsf@arm.com/mbox/"},{"id":19325,"url":"https://patchwork.plctlab.org/api/1.2/patches/19325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z3npen.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:08","name":"[10/16] aarch64: Generalise unspec_based_function_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z3npen.fsf@arm.com/mbox/"},{"id":19328,"url":"https://patchwork.plctlab.org/api/1.2/patches/19328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz9rnpe9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:22","name":"[11/16] aarch64: Generalise _m rules for SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz9rnpe9.fsf@arm.com/mbox/"},{"id":19331,"url":"https://patchwork.plctlab.org/api/1.2/patches/19331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rkfnpdx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:34","name":"[12/16] aarch64: Tweaks to function_resolver::resolve_to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rkfnpdx.fsf@arm.com/mbox/"},{"id":19332,"url":"https://patchwork.plctlab.org/api/1.2/patches/19332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jv3npd8.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:59","name":"[13/16] aarch64: Add support for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jv3npd8.fsf@arm.com/mbox/"},{"id":19324,"url":"https://patchwork.plctlab.org/api/1.2/patches/19324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcvmasc.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:15","name":"[14/16] aarch64: Add support for arm_locally_streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcvmasc.fsf@arm.com/mbox/"},{"id":19330,"url":"https://patchwork.plctlab.org/api/1.2/patches/19330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8njmarz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:28","name":"[15/16] aarch64: Enforce inlining restrictions for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8njmarz.fsf@arm.com/mbox/"},{"id":19326,"url":"https://patchwork.plctlab.org/api/1.2/patches/19326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0y7mari.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:45","name":"[16/16] aarch64: Update sibcall handling for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0y7mari.fsf@arm.com/mbox/"},{"id":19350,"url":"https://patchwork.plctlab.org/api/1.2/patches/19350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYaMLHMM3JCf0W@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:43:36","name":"c++, v2: Implement CWG 2654 - Un-deprecation of compound volatile assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYaMLHMM3JCf0W@tucnak/mbox/"},{"id":19351,"url":"https://patchwork.plctlab.org/api/1.2/patches/19351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYxNPWpM23FCtj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:45:08","name":"c++, v2: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYxNPWpM23FCtj@tucnak/mbox/"},{"id":19352,"url":"https://patchwork.plctlab.org/api/1.2/patches/19352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DZ8MaCk7KWlPoa@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:50:08","name":"c++, v2: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DZ8MaCk7KWlPoa@tucnak/mbox/"},{"id":19365,"url":"https://patchwork.plctlab.org/api/1.2/patches/19365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113150912.1292332-1-christoph.muellner@vrull.eu/","msgid":"<20221113150912.1292332-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:09:12","name":"[RFC] ipa-guarded-deref: Add new pass to dereference function pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113150912.1292332-1-christoph.muellner@vrull.eu/mbox/"},{"id":19368,"url":"https://patchwork.plctlab.org/api/1.2/patches/19368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db31cb32-a2d1-8f75-cc00-cbb679940dad@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-13T15:36:16","name":"[(pushed)] configure: always set SPHINX_BUILD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db31cb32-a2d1-8f75-cc00-cbb679940dad@suse.cz/mbox/"},{"id":19369,"url":"https://patchwork.plctlab.org/api/1.2/patches/19369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113153741.1305175-1-christoph.muellner@vrull.eu/","msgid":"<20221113153741.1305175-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:37:41","name":"[RFC] ipa-cp: Speculatively call specialized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113153741.1305175-1-christoph.muellner@vrull.eu/mbox/"},{"id":19370,"url":"https://patchwork.plctlab.org/api/1.2/patches/19370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz/","msgid":"<811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz>","list_archive_url":null,"date":"2022-11-13T15:41:04","name":"[(pushed)] sphinx: include todolist only if INCLUDE_TODO env. set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz/mbox/"},{"id":19371,"url":"https://patchwork.plctlab.org/api/1.2/patches/19371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113154320.3083043-1-philipp.tomsich@vrull.eu/","msgid":"<20221113154320.3083043-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:43:20","name":"doc: Update Jeff Law'\''s email-address in contrib.rst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113154320.3083043-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19379,"url":"https://patchwork.plctlab.org/api/1.2/patches/19379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113160215.3084008-1-philipp.tomsich@vrull.eu/","msgid":"<20221113160215.3084008-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T16:02:15","name":"aarch64: Add support for Ampere-1A (-mcpu=ampere1a) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113160215.3084008-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19383,"url":"https://patchwork.plctlab.org/api/1.2/patches/19383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3En3SZJqYryOI++@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-13T17:22:37","name":"[committed] hppa: Skip guality tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3En3SZJqYryOI++@mx3210.localdomain/mbox/"},{"id":19386,"url":"https://patchwork.plctlab.org/api/1.2/patches/19386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113180527.2907744-1-arsen@aarsen.me/","msgid":"<20221113180527.2907744-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-11-13T18:05:27","name":"libstdc++: Fix python/ not making install directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113180527.2907744-1-arsen@aarsen.me/mbox/"},{"id":19432,"url":"https://patchwork.plctlab.org/api/1.2/patches/19432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113200553.440728-1-aldyh@redhat.com/","msgid":"<20221113200553.440728-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-13T20:05:53","name":"[range-ops] Implement sqrt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113200553.440728-1-aldyh@redhat.com/mbox/"},{"id":19444,"url":"https://patchwork.plctlab.org/api/1.2/patches/19444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204119.4061447-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204119.4061447-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:41:18","name":"RISC-V: Use .p2align for code-alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204119.4061447-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19445,"url":"https://patchwork.plctlab.org/api/1.2/patches/19445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204139.4061479-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204139.4061479-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:41:39","name":"RISC-V: Zihintpause: add __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204139.4061479-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19446,"url":"https://patchwork.plctlab.org/api/1.2/patches/19446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-2-philipp.tomsich@vrull.eu/","msgid":"<20221113204824.4062042-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:23","name":"[v2,1/2] RISC-V: Add basic support for the Ventana-VT1 core","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19448,"url":"https://patchwork.plctlab.org/api/1.2/patches/19448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-3-philipp.tomsich@vrull.eu/","msgid":"<20221113204824.4062042-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:24","name":"[v2,2/2] RISC-V: Add instruction fusion (for ventana-vt1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19447,"url":"https://patchwork.plctlab.org/api/1.2/patches/19447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204840.4062092-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204840.4062092-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:40","name":"RISC-V: Split \"(a & (1UL << bitno)) ? 0 : -1\" to bext + addi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204840.4062092-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19450,"url":"https://patchwork.plctlab.org/api/1.2/patches/19450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204849.4062129-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204849.4062129-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:49","name":"RISC-V: Split \"(a & (1UL << bitno)) ? 0 : 1\" to bext + xori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204849.4062129-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19449,"url":"https://patchwork.plctlab.org/api/1.2/patches/19449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204858.4062163-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204858.4062163-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:58","name":"RISC-V: Handle \"(a & twobits) == singlebit\" in branches using Zbs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204858.4062163-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19451,"url":"https://patchwork.plctlab.org/api/1.2/patches/19451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Fa4u7MiqH3OS/C@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T21:00:18","name":"aarch64: Add bfloat16_t support for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Fa4u7MiqH3OS/C@tucnak/mbox/"},{"id":19452,"url":"https://patchwork.plctlab.org/api/1.2/patches/19452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc0f818a-1f14-5519-3b3b-3d8141ca96dd@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T21:10:34","name":"sphinx: more build fixing if sphinx-build is missing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc0f818a-1f14-5519-3b3b-3d8141ca96dd@redhat.com/mbox/"},{"id":19453,"url":"https://patchwork.plctlab.org/api/1.2/patches/19453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-2-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:22","name":"[v2,1/8] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19454,"url":"https://patchwork.plctlab.org/api/1.2/patches/19454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-3-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:23","name":"[v2,2/8] RISC-V: Generate vt.maskc on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19457,"url":"https://patchwork.plctlab.org/api/1.2/patches/19457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-4-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:24","name":"[v2,3/8] RISC-V: Support noce_try_store_flag_mask as vt.maskc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-4-philipp.tomsich@vrull.eu/mbox/"},{"id":19455,"url":"https://patchwork.plctlab.org/api/1.2/patches/19455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-5-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:25","name":"[v2,4/8] RISC-V: Recognize sign-extract + and cases for XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-5-philipp.tomsich@vrull.eu/mbox/"},{"id":19458,"url":"https://patchwork.plctlab.org/api/1.2/patches/19458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-6-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:26","name":"[v2,5/8] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-6-philipp.tomsich@vrull.eu/mbox/"},{"id":19456,"url":"https://patchwork.plctlab.org/api/1.2/patches/19456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-7-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:27","name":"[v2,6/8] RISC-V: Support immediates in XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-7-philipp.tomsich@vrull.eu/mbox/"},{"id":19460,"url":"https://patchwork.plctlab.org/api/1.2/patches/19460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-8-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:28","name":"[v2,7/8] RISC-V: Ventana-VT1 supports XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-8-philipp.tomsich@vrull.eu/mbox/"},{"id":19459,"url":"https://patchwork.plctlab.org/api/1.2/patches/19459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-9-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-9-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:29","name":"[v2,8/8] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-9-philipp.tomsich@vrull.eu/mbox/"},{"id":19461,"url":"https://patchwork.plctlab.org/api/1.2/patches/19461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-2-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:30","name":"[1/7] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-2-christoph.muellner@vrull.eu/mbox/"},{"id":19462,"url":"https://patchwork.plctlab.org/api/1.2/patches/19462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-3-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:31","name":"[2/7] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-3-christoph.muellner@vrull.eu/mbox/"},{"id":19465,"url":"https://patchwork.plctlab.org/api/1.2/patches/19465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-4-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:32","name":"[3/7] riscv: thead: Add support for XTheadBa and XTheadBs ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-4-christoph.muellner@vrull.eu/mbox/"},{"id":19463,"url":"https://patchwork.plctlab.org/api/1.2/patches/19463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-5-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:33","name":"[4/7] riscv: thead: Add support for XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-5-christoph.muellner@vrull.eu/mbox/"},{"id":19464,"url":"https://patchwork.plctlab.org/api/1.2/patches/19464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-6-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:34","name":"[5/7] riscv: thead: Add support for XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-6-christoph.muellner@vrull.eu/mbox/"},{"id":19467,"url":"https://patchwork.plctlab.org/api/1.2/patches/19467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-7-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:35","name":"[6/7] riscv: thead: Add support for XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-7-christoph.muellner@vrull.eu/mbox/"},{"id":19466,"url":"https://patchwork.plctlab.org/api/1.2/patches/19466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-8-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:36","name":"[7/7] riscv: Add basic extension support for XTheadFmv and XTheadInt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-8-christoph.muellner@vrull.eu/mbox/"},{"id":19469,"url":"https://patchwork.plctlab.org/api/1.2/patches/19469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113220057.2753718-1-christoph.muellner@vrull.eu/","msgid":"<20221113220057.2753718-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T22:00:57","name":"[RFC] riscv: thead: Add support for XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113220057.2753718-1-christoph.muellner@vrull.eu/mbox/"},{"id":19471,"url":"https://patchwork.plctlab.org/api/1.2/patches/19471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230309.2819841-1-dmalcolm@redhat.com/","msgid":"<20221113230309.2819841-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-13T23:03:09","name":"[committed] analyzer: new warning: -Wanalyzer-tainted-assertion [PR106235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230309.2819841-1-dmalcolm@redhat.com/mbox/"},{"id":19474,"url":"https://patchwork.plctlab.org/api/1.2/patches/19474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-2-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:15","name":"[1/7] riscv: bitmanip: add orc.b as an unspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-2-christoph.muellner@vrull.eu/mbox/"},{"id":19475,"url":"https://patchwork.plctlab.org/api/1.2/patches/19475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-3-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:16","name":"[2/7] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-3-christoph.muellner@vrull.eu/mbox/"},{"id":19473,"url":"https://patchwork.plctlab.org/api/1.2/patches/19473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-4-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:17","name":"[3/7] riscv: Enable overlap-by-pieces via tune param","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-4-christoph.muellner@vrull.eu/mbox/"},{"id":19476,"url":"https://patchwork.plctlab.org/api/1.2/patches/19476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-5-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:18","name":"[4/7] riscv: Move riscv_block_move_loop to separate file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-5-christoph.muellner@vrull.eu/mbox/"},{"id":19472,"url":"https://patchwork.plctlab.org/api/1.2/patches/19472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-6-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:19","name":"[5/7] riscv: Use by-pieces to do overlapping accesses in block_move_straight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-6-christoph.muellner@vrull.eu/mbox/"},{"id":19477,"url":"https://patchwork.plctlab.org/api/1.2/patches/19477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-7-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:20","name":"[6/7] riscv: Add support for strlen inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-7-christoph.muellner@vrull.eu/mbox/"},{"id":19478,"url":"https://patchwork.plctlab.org/api/1.2/patches/19478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-8-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:21","name":"[7/7] riscv: Add support for str(n)cmp inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-8-christoph.muellner@vrull.eu/mbox/"},{"id":19523,"url":"https://patchwork.plctlab.org/api/1.2/patches/19523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff799b68-b3d6-7a97-d203-dfb2a427bb5d@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-14T02:52:58","name":"[(pushed)] gcc-changelog: temporarily disable check_line_start","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff799b68-b3d6-7a97-d203-dfb2a427bb5d@suse.cz/mbox/"},{"id":19542,"url":"https://patchwork.plctlab.org/api/1.2/patches/19542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-1-ppalka@redhat.com/","msgid":"<20221114045047.362745-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:45","name":"[1/3] libstdc++: Implement ranges::contains/contains_subrange from P2302R4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-1-ppalka@redhat.com/mbox/"},{"id":19543,"url":"https://patchwork.plctlab.org/api/1.2/patches/19543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-2-ppalka@redhat.com/","msgid":"<20221114045047.362745-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:46","name":"[2/3] libstdc++: Implement ranges::iota from P2440R1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-2-ppalka@redhat.com/mbox/"},{"id":19544,"url":"https://patchwork.plctlab.org/api/1.2/patches/19544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-3-ppalka@redhat.com/","msgid":"<20221114045047.362745-3-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:47","name":"[3/3] libstdc++: Implement ranges::find_last{, _if, _if_not} from P1223R5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-3-ppalka@redhat.com/mbox/"},{"id":19551,"url":"https://patchwork.plctlab.org/api/1.2/patches/19551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114070937.17B8013A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114070937.17B8013A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T07:09:36","name":"restrict gcc.dg/pr107554.c to 64bit platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114070937.17B8013A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19562,"url":"https://patchwork.plctlab.org/api/1.2/patches/19562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hy1ckL3ZluEOSi@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T07:48:37","name":"libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hy1ckL3ZluEOSi@tucnak/mbox/"},{"id":19566,"url":"https://patchwork.plctlab.org/api/1.2/patches/19566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hz0QswGCGclWGu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T07:52:49","name":"i386: Emit 16b atomics inline with -m64 -mcx16 -mavx [PR104688]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hz0QswGCGclWGu@tucnak/mbox/"},{"id":19663,"url":"https://patchwork.plctlab.org/api/1.2/patches/19663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IaE4OIQGHhvhXv@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T10:36:03","name":"c++: Add testcase for DR 2392","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IaE4OIQGHhvhXv@tucnak/mbox/"},{"id":19669,"url":"https://patchwork.plctlab.org/api/1.2/patches/19669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IbNWSVE+Ydjk4u@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T10:40:53","name":"c++: Allow attributes on concepts - DR 2428","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IbNWSVE+Ydjk4u@tucnak/mbox/"},{"id":19719,"url":"https://patchwork.plctlab.org/api/1.2/patches/19719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3ImZ/fcwjmMFQyb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T11:28:39","name":"c++: Alignment changes to layout compatibility/common initial sequence - DR2583","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3ImZ/fcwjmMFQyb@tucnak/mbox/"},{"id":19727,"url":"https://patchwork.plctlab.org/api/1.2/patches/19727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Ip4JHD7cg8W8MG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T11:43:28","name":"c++: Add testcase for DR 2604","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Ip4JHD7cg8W8MG@tucnak/mbox/"},{"id":19810,"url":"https://patchwork.plctlab.org/api/1.2/patches/19810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T13:34:57","name":"remove duplicate match.pd patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19814,"url":"https://patchwork.plctlab.org/api/1.2/patches/19814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135136.52466-1-poulhies@adacore.com/","msgid":"<20221114135136.52466-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:36","name":"[COMMITTED] ada: Remove gnatcheck reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135136.52466-1-poulhies@adacore.com/mbox/"},{"id":19815,"url":"https://patchwork.plctlab.org/api/1.2/patches/19815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135146.52584-1-poulhies@adacore.com/","msgid":"<20221114135146.52584-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:46","name":"[COMMITTED] ada: Improve location of error messages in instantiations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135146.52584-1-poulhies@adacore.com/mbox/"},{"id":19817,"url":"https://patchwork.plctlab.org/api/1.2/patches/19817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135156.52647-1-poulhies@adacore.com/","msgid":"<20221114135156.52647-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:56","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on QNX and RTEMS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135156.52647-1-poulhies@adacore.com/mbox/"},{"id":19818,"url":"https://patchwork.plctlab.org/api/1.2/patches/19818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135202.52712-1-poulhies@adacore.com/","msgid":"<20221114135202.52712-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:02","name":"[COMMITTED] ada: Expand generic formal subprograms with contracts for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135202.52712-1-poulhies@adacore.com/mbox/"},{"id":19823,"url":"https://patchwork.plctlab.org/api/1.2/patches/19823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135208.52775-1-poulhies@adacore.com/","msgid":"<20221114135208.52775-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:08","name":"[COMMITTED] ada: Fix style in code for generic formal subprograms with contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135208.52775-1-poulhies@adacore.com/mbox/"},{"id":19825,"url":"https://patchwork.plctlab.org/api/1.2/patches/19825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135212.52840-1-poulhies@adacore.com/","msgid":"<20221114135212.52840-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:12","name":"[COMMITTED] ada: Adjust locations in aspects on generic formal subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135212.52840-1-poulhies@adacore.com/mbox/"},{"id":19822,"url":"https://patchwork.plctlab.org/api/1.2/patches/19822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135219.52903-1-poulhies@adacore.com/","msgid":"<20221114135219.52903-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:19","name":"[COMMITTED] ada: Fix error on SPARK_Mode on library-level separate body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135219.52903-1-poulhies@adacore.com/mbox/"},{"id":19824,"url":"https://patchwork.plctlab.org/api/1.2/patches/19824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135224.52966-1-poulhies@adacore.com/","msgid":"<20221114135224.52966-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:24","name":"[COMMITTED] ada: Fix non-capturing parentheses handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135224.52966-1-poulhies@adacore.com/mbox/"},{"id":19816,"url":"https://patchwork.plctlab.org/api/1.2/patches/19816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135229.53029-1-poulhies@adacore.com/","msgid":"<20221114135229.53029-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:29","name":"[COMMITTED] ada: Crash on applying '\''Pos to expression of a type derived from a formal type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135229.53029-1-poulhies@adacore.com/mbox/"},{"id":19820,"url":"https://patchwork.plctlab.org/api/1.2/patches/19820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135240.53093-1-poulhies@adacore.com/","msgid":"<20221114135240.53093-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:40","name":"[COMMITTED] ada: hardcfr docs: add optional checkpoints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135240.53093-1-poulhies@adacore.com/mbox/"},{"id":19828,"url":"https://patchwork.plctlab.org/api/1.2/patches/19828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135245.53157-1-poulhies@adacore.com/","msgid":"<20221114135245.53157-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:45","name":"[COMMITTED] ada: Flag unsupported dispatching constructor calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135245.53157-1-poulhies@adacore.com/mbox/"},{"id":19826,"url":"https://patchwork.plctlab.org/api/1.2/patches/19826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135252.53221-1-poulhies@adacore.com/","msgid":"<20221114135252.53221-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:52","name":"[COMMITTED] ada: Remove incorrect comments about initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135252.53221-1-poulhies@adacore.com/mbox/"},{"id":19819,"url":"https://patchwork.plctlab.org/api/1.2/patches/19819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135258.53285-1-poulhies@adacore.com/","msgid":"<20221114135258.53285-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:58","name":"[COMMITTED] ada: Silence CodePeer false positive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135258.53285-1-poulhies@adacore.com/mbox/"},{"id":19821,"url":"https://patchwork.plctlab.org/api/1.2/patches/19821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135324.19352-1-philipp.tomsich@vrull.eu/","msgid":"<20221114135324.19352-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T13:53:24","name":"[v2] aarch64: Add support for Ampere-1A (-mcpu=ampere1a) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135324.19352-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19830,"url":"https://patchwork.plctlab.org/api/1.2/patches/19830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3JJXGaKji0gKDlV@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T13:57:48","name":"libstdc++: Fix up for extended floating point types [PR107649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3JJXGaKji0gKDlV@tucnak/mbox/"},{"id":19836,"url":"https://patchwork.plctlab.org/api/1.2/patches/19836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114144235.20390-1-philipp.tomsich@vrull.eu/","msgid":"<20221114144235.20390-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T14:42:35","name":"GCC13: aarch64: Document new cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114144235.20390-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19849,"url":"https://patchwork.plctlab.org/api/1.2/patches/19849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114145348.20652-1-philipp.tomsich@vrull.eu/","msgid":"<20221114145348.20652-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T14:53:48","name":"[v2] gcc-13: aarch64: Document new cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114145348.20652-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19852,"url":"https://patchwork.plctlab.org/api/1.2/patches/19852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668438395-2326-1-git-send-email-apinski@marvell.com/","msgid":"<1668438395-2326-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-14T15:06:35","name":"[COMMITTED] Fix some @opindex with - in the front","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668438395-2326-1-git-send-email-apinski@marvell.com/mbox/"},{"id":19855,"url":"https://patchwork.plctlab.org/api/1.2/patches/19855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668439517-2899-1-git-send-email-apinski@marvell.com/","msgid":"<1668439517-2899-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-14T15:25:17","name":"[COMMITTED] Fix @opindex for m80387","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668439517-2899-1-git-send-email-apinski@marvell.com/mbox/"},{"id":19859,"url":"https://patchwork.plctlab.org/api/1.2/patches/19859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-2-krebbel@linux.ibm.com/","msgid":"<20221114152657.43632-2-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2022-11-14T15:26:56","name":"[1/2] New reg note REG_CFA_NORESTORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-2-krebbel@linux.ibm.com/mbox/"},{"id":19858,"url":"https://patchwork.plctlab.org/api/1.2/patches/19858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-3-krebbel@linux.ibm.com/","msgid":"<20221114152657.43632-3-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2022-11-14T15:26:57","name":"[2/2] IBM zSystems: Save argument registers to the stack -mpreserve-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-3-krebbel@linux.ibm.com/mbox/"},{"id":19868,"url":"https://patchwork.plctlab.org/api/1.2/patches/19868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM6PR12MB4795D38A7C29749BBDEABB98E3059@DM6PR12MB4795.namprd12.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T16:18:43","name":"[X86_64] Separate znver4 insn reservations from older znvers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM6PR12MB4795D38A7C29749BBDEABB98E3059@DM6PR12MB4795.namprd12.prod.outlook.com/mbox/"},{"id":19876,"url":"https://patchwork.plctlab.org/api/1.2/patches/19876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114162918.1563116-1-jiawei@iscas.ac.cn/","msgid":"<20221114162918.1563116-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-14T16:29:18","name":"RISC-V: Optimal RVV epilogue logic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114162918.1563116-1-jiawei@iscas.ac.cn/mbox/"},{"id":19961,"url":"https://patchwork.plctlab.org/api/1.2/patches/19961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114180832.49DD013A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114180832.49DD013A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T18:08:31","name":"tree-optimization/107485 - fix non-call exception ICE with inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114180832.49DD013A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19999,"url":"https://patchwork.plctlab.org/api/1.2/patches/19999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3KO4nPza2D9nJMQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T18:54:26","name":"[wwwdocs] cxx-status: Add C++23 papers from the Nov 2022 Kona WG21 plenary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3KO4nPza2D9nJMQ@redhat.com/mbox/"},{"id":20005,"url":"https://patchwork.plctlab.org/api/1.2/patches/20005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16593-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T19:00:14","name":"[committed] middle-end: Fix can_special_div_by_const doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16593-tamar@arm.com/mbox/"},{"id":20020,"url":"https://patchwork.plctlab.org/api/1.2/patches/20020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16594-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T20:08:20","name":"[committed] middle-end: Fix addsub patch removing return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16594-tamar@arm.com/mbox/"},{"id":20049,"url":"https://patchwork.plctlab.org/api/1.2/patches/20049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211141505170.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-14T22:03:56","name":"[committed] ira: Fix `create_insn_allocnos'\'' `outer'\'' parameter documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211141505170.19931@tpp.orcam.me.uk/mbox/"},{"id":20057,"url":"https://patchwork.plctlab.org/api/1.2/patches/20057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114225213.3714883-1-jason@redhat.com/","msgid":"<20221114225213.3714883-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-14T22:52:13","name":"[pushed] c++: only declare satisfied friends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114225213.3714883-1-jason@redhat.com/mbox/"},{"id":20058,"url":"https://patchwork.plctlab.org/api/1.2/patches/20058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com/","msgid":"<24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com>","list_archive_url":null,"date":"2022-11-14T23:00:09","name":"[committed] wwwdocs: gcc-13: Add release notes for more C23 features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com/mbox/"},{"id":20088,"url":"https://patchwork.plctlab.org/api/1.2/patches/20088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142306400.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-14T23:21:41","name":"ira: Remove duplicate `memset'\'' over `full_costs'\'' from `assign_hard_reg'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142306400.19931@tpp.orcam.me.uk/mbox/"},{"id":20107,"url":"https://patchwork.plctlab.org/api/1.2/patches/20107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Lea4Fo/Hl8iFNZ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T00:33:47","name":"[v2] c++: Disable -Wignored-qualifiers for template args [PR107492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Lea4Fo/Hl8iFNZ@redhat.com/mbox/"},{"id":20167,"url":"https://patchwork.plctlab.org/api/1.2/patches/20167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115033559.66827-1-hongyu.wang@intel.com/","msgid":"<20221115033559.66827-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-15T03:35:59","name":"doc: Reword the description of -mrelax-cmpxchg-loop [PR 107676]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115033559.66827-1-hongyu.wang@intel.com/mbox/"},{"id":20172,"url":"https://patchwork.plctlab.org/api/1.2/patches/20172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668486450-9315-1-git-send-email-apinski@marvell.com/","msgid":"<1668486450-9315-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:27:30","name":"Fix @opindex for mcall-aixdesc and mcall-openbsd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668486450-9315-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20181,"url":"https://patchwork.plctlab.org/api/1.2/patches/20181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487081-9637-1-git-send-email-apinski@marvell.com/","msgid":"<1668487081-9637-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:38:01","name":"Remove documentation for MeP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487081-9637-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20182,"url":"https://patchwork.plctlab.org/api/1.2/patches/20182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487461-9942-1-git-send-email-apinski@marvell.com/","msgid":"<1668487461-9942-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:44:21","name":"Remove the picoChip documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487461-9942-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20183,"url":"https://patchwork.plctlab.org/api/1.2/patches/20183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ad110-065e-9414-1312-bff5a0644e97@siemens.com/","msgid":"<927ad110-065e-9414-1312-bff5a0644e97@siemens.com>","list_archive_url":null,"date":"2022-11-15T04:46:15","name":"[v4] OpenMP: Generate SIMD clones for functions with \"declare target\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ad110-065e-9414-1312-bff5a0644e97@siemens.com/mbox/"},{"id":20196,"url":"https://patchwork.plctlab.org/api/1.2/patches/20196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668488508-10524-1-git-send-email-apinski@marvell.com/","msgid":"<1668488508-10524-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T05:01:48","name":"Remove Score documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668488508-10524-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20212,"url":"https://patchwork.plctlab.org/api/1.2/patches/20212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115064624.2352237-2-zengxiao@eswincomputing.com/","msgid":"<20221115064624.2352237-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T06:46:24","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115064624.2352237-2-zengxiao@eswincomputing.com/mbox/"},{"id":20213,"url":"https://patchwork.plctlab.org/api/1.2/patches/20213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115065159.2353620-2-zengxiao@eswincomputing.com/","msgid":"<20221115065159.2353620-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T06:51:59","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115065159.2353620-2-zengxiao@eswincomputing.com/mbox/"},{"id":20224,"url":"https://patchwork.plctlab.org/api/1.2/patches/20224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3NAj5CVTklLb8xg@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-15T07:32:31","name":"[committed] c++: Fix a typo in function name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3NAj5CVTklLb8xg@tucnak/mbox/"},{"id":20234,"url":"https://patchwork.plctlab.org/api/1.2/patches/20234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115080925.2354502-2-zengxiao@eswincomputing.com/","msgid":"<20221115080925.2354502-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T08:09:25","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115080925.2354502-2-zengxiao@eswincomputing.com/mbox/"},{"id":20240,"url":"https://patchwork.plctlab.org/api/1.2/patches/20240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-2-jiawei@iscas.ac.cn/","msgid":"<20221115083358.4130952-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T08:33:57","name":"[v2,1/2] RISC-V: Add spill sp adjust check testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-2-jiawei@iscas.ac.cn/mbox/"},{"id":20239,"url":"https://patchwork.plctlab.org/api/1.2/patches/20239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-3-jiawei@iscas.ac.cn/","msgid":"<20221115083358.4130952-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T08:33:58","name":"[v2,2/2] RISC-V: Optimize RVV epilogue logic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-3-jiawei@iscas.ac.cn/mbox/"},{"id":20292,"url":"https://patchwork.plctlab.org/api/1.2/patches/20292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16595-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T10:33:36","name":"middle-end: replace GET_MODE_WIDER_MODE with GET_MODE_NEXT_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16595-tamar@arm.com/mbox/"},{"id":20329,"url":"https://patchwork.plctlab.org/api/1.2/patches/20329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115113713.1131991-1-jwakely@redhat.com/","msgid":"<20221115113713.1131991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T11:37:13","name":"[committed] libstdc++: Document use of Markdown for Doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115113713.1131991-1-jwakely@redhat.com/mbox/"},{"id":20345,"url":"https://patchwork.plctlab.org/api/1.2/patches/20345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115121345.3650155-1-chenyixuan@iscas.ac.cn/","msgid":"<20221115121345.3650155-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T12:13:45","name":"Optimize testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115121345.3650155-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":20352,"url":"https://patchwork.plctlab.org/api/1.2/patches/20352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3OF0UXlqmuibCUZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-15T12:28:01","name":"c++: Fix up calls to static operator() or operator[] [PR107624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3OF0UXlqmuibCUZ@tucnak/mbox/"},{"id":20363,"url":"https://patchwork.plctlab.org/api/1.2/patches/20363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115130328.15413-1-hejinyang@loongson.cn/","msgid":"<20221115130328.15413-1-hejinyang@loongson.cn>","list_archive_url":null,"date":"2022-11-15T13:03:28","name":"LoongArch: Fix atomic_exchange make comparison and may jump out","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115130328.15413-1-hejinyang@loongson.cn/mbox/"},{"id":20369,"url":"https://patchwork.plctlab.org/api/1.2/patches/20369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz/","msgid":"<00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz>","list_archive_url":null,"date":"2022-11-15T13:19:04","name":"[(pushed)] libsanitizer: use git clone --depth 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz/mbox/"},{"id":20401,"url":"https://patchwork.plctlab.org/api/1.2/patches/20401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143119.1155190-1-jwakely@redhat.com/","msgid":"<20221115143119.1155190-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:19","name":"[committed] libstdc++: Fix detection of std::format support for __float128 [PR107693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143119.1155190-1-jwakely@redhat.com/mbox/"},{"id":20402,"url":"https://patchwork.plctlab.org/api/1.2/patches/20402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143134.1155246-1-jwakely@redhat.com/","msgid":"<20221115143134.1155246-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:34","name":"[committed] libstc++: std::formattable concept should not be defined for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143134.1155246-1-jwakely@redhat.com/mbox/"},{"id":20403,"url":"https://patchwork.plctlab.org/api/1.2/patches/20403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143145.1155275-1-jwakely@redhat.com/","msgid":"<20221115143145.1155275-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:45","name":"[committed] libstdc++: Fix std::format test for strict -std=c++20 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143145.1155275-1-jwakely@redhat.com/mbox/"},{"id":20469,"url":"https://patchwork.plctlab.org/api/1.2/patches/20469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115163135.604240-1-aldyh@redhat.com/","msgid":"<20221115163135.604240-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-15T16:31:35","name":"[range-ops] Minor readability fix.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115163135.604240-1-aldyh@redhat.com/mbox/"},{"id":20474,"url":"https://patchwork.plctlab.org/api/1.2/patches/20474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142117380.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-15T17:02:13","name":"testsuite: Fix missing EFFECTIVE_TARGETS variable errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142117380.19931@tpp.orcam.me.uk/mbox/"},{"id":20505,"url":"https://patchwork.plctlab.org/api/1.2/patches/20505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af77b16e0296d57c2df5a5edb7c2aa25c3290cb1.camel@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T18:35:05","name":"[v3] c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af77b16e0296d57c2df5a5edb7c2aa25c3290cb1.camel@redhat.com/mbox/"},{"id":20506,"url":"https://patchwork.plctlab.org/api/1.2/patches/20506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com/","msgid":"<1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com>","list_archive_url":null,"date":"2022-11-15T18:47:25","name":"nvptx/mkoffload.cc: Fix \"$nohost\" check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com/mbox/"},{"id":20510,"url":"https://patchwork.plctlab.org/api/1.2/patches/20510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190523.23018-1-david.faust@oracle.com/","msgid":"<20221115190523.23018-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-15T19:05:23","name":"[committed] bpf: avoid possible use of uninitialized variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190523.23018-1-david.faust@oracle.com/mbox/"},{"id":20512,"url":"https://patchwork.plctlab.org/api/1.2/patches/20512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190806.2756221-1-kevinl@rivosinc.com/","msgid":"<20221115190806.2756221-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-15T19:08:06","name":"RISC-V uninit-pred-9_b.c failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190806.2756221-1-kevinl@rivosinc.com/mbox/"},{"id":20553,"url":"https://patchwork.plctlab.org/api/1.2/patches/20553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-98e07e65-78c9-4364-866f-6b4d29f24992-1668545104036@3c-app-gmx-bs61/","msgid":"","list_archive_url":null,"date":"2022-11-15T20:45:04","name":"Fortran: ICE in simplification of array expression involving power [PR107680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-98e07e65-78c9-4364-866f-6b4d29f24992-1668545104036@3c-app-gmx-bs61/mbox/"},{"id":20620,"url":"https://patchwork.plctlab.org/api/1.2/patches/20620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115223648.196471-1-christoph.muellner@vrull.eu/","msgid":"<20221115223648.196471-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-15T22:36:48","name":"doc: invoke: riscv: Fix closing block bracket","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115223648.196471-1-christoph.muellner@vrull.eu/mbox/"},{"id":20627,"url":"https://patchwork.plctlab.org/api/1.2/patches/20627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115230845.210285-1-christoph.muellner@vrull.eu/","msgid":"<20221115230845.210285-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-15T23:08:45","name":"doc: invoke: pru/riscv: Fix option list formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115230845.210285-1-christoph.muellner@vrull.eu/mbox/"},{"id":20643,"url":"https://patchwork.plctlab.org/api/1.2/patches/20643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3QvHg2twpwSpCZJ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T00:30:22","name":"[v2] c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3QvHg2twpwSpCZJ@redhat.com/mbox/"},{"id":20662,"url":"https://patchwork.plctlab.org/api/1.2/patches/20662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021027.519897-1-chenglulu@loongson.cn/","msgid":"<20221116021027.519897-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-16T02:10:28","name":"[v3] LoongArch: Add prefetch instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021027.519897-1-chenglulu@loongson.cn/mbox/"},{"id":20661,"url":"https://patchwork.plctlab.org/api/1.2/patches/20661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021154.4AE372042F@pchp3.se.axis.com/","msgid":"<20221116021154.4AE372042F@pchp3.se.axis.com>","list_archive_url":null,"date":"2022-11-16T02:11:54","name":"testsuite: Fix mistransformed gcov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021154.4AE372042F@pchp3.se.axis.com/mbox/"},{"id":20664,"url":"https://patchwork.plctlab.org/api/1.2/patches/20664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com/","msgid":"<153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-16T02:32:42","name":"[rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com/mbox/"},{"id":20670,"url":"https://patchwork.plctlab.org/api/1.2/patches/20670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116024619.1465996-1-ppalka@redhat.com/","msgid":"<20221116024619.1465996-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-16T02:46:19","name":"libstdc++: Fix stream initialization with static library [PR107701]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116024619.1465996-1-ppalka@redhat.com/mbox/"},{"id":20735,"url":"https://patchwork.plctlab.org/api/1.2/patches/20735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SGHV9P/xR6N2zg@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T06:41:33","name":"[committed] range-op-float: Fix up float_binary_op_range_finish [PR107668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SGHV9P/xR6N2zg@tucnak/mbox/"},{"id":20736,"url":"https://patchwork.plctlab.org/api/1.2/patches/20736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e73c1320-0738-7645-b0fa-1da62a31ab94@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T06:48:25","name":"[1/2] rs6000: Emit vector fp comparison directly in rs6000_emit_vector_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e73c1320-0738-7645-b0fa-1da62a31ab94@linux.ibm.com/mbox/"},{"id":20738,"url":"https://patchwork.plctlab.org/api/1.2/patches/20738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com/","msgid":"<247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com>","list_archive_url":null,"date":"2022-11-16T06:51:04","name":"[2/2] rs6000: Refine integer comparison handlings in rs6000_emit_vector_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com/mbox/"},{"id":20747,"url":"https://patchwork.plctlab.org/api/1.2/patches/20747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1d78b22-e5e9-5104-a3aa-750d8bb6cba2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T07:29:20","name":"Fix typo in gimple_fold_partial_load_store_mem_ref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1d78b22-e5e9-5104-a3aa-750d8bb6cba2@linux.ibm.com/mbox/"},{"id":20788,"url":"https://patchwork.plctlab.org/api/1.2/patches/20788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Selj1pt9/Jq0Yt@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T08:25:58","name":"c++, v2: Fix up calls to static operator() or operator[] [PR107624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Selj1pt9/Jq0Yt@tucnak/mbox/"},{"id":20822,"url":"https://patchwork.plctlab.org/api/1.2/patches/20822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SoCZfrEbw3KN3t@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T09:06:17","name":"libgcc, i386: Add __fix{,uns}bfti and __float{,un}tibf [PR107703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SoCZfrEbw3KN3t@tucnak/mbox/"},{"id":20871,"url":"https://patchwork.plctlab.org/api/1.2/patches/20871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S4wvO/i4rBQPVj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T10:17:38","name":"c++, v3: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S4wvO/i4rBQPVj@tucnak/mbox/"},{"id":20893,"url":"https://patchwork.plctlab.org/api/1.2/patches/20893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S9AnlIctx/iFPf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T10:35:46","name":"c++, v2: Alignment changes to layout compatibility/common initial sequence - DR2583","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S9AnlIctx/iFPf@tucnak/mbox/"},{"id":20974,"url":"https://patchwork.plctlab.org/api/1.2/patches/20974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31a32901-1912-988b-c641-1f23093e8563@codesourcery.com/","msgid":"<31a32901-1912-988b-c641-1f23093e8563@codesourcery.com>","list_archive_url":null,"date":"2022-11-16T11:42:16","name":"gcn: Add __builtin_gcn_kernarg_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31a32901-1912-988b-c641-1f23093e8563@codesourcery.com/mbox/"},{"id":20978,"url":"https://patchwork.plctlab.org/api/1.2/patches/20978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3TOsnjlLHvSarjl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T11:51:14","name":"libgcc, i386, optabs, v2: Add __float{, un}tibf to libgcc and expand BF -> integral through SF intermediate [PR107703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3TOsnjlLHvSarjl@tucnak/mbox/"},{"id":21060,"url":"https://patchwork.plctlab.org/api/1.2/patches/21060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132920.2958143-1-dmalcolm@redhat.com/","msgid":"<20221116132920.2958143-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:29:20","name":"[committed] analyzer: split out checker-path.cc into a new checker-event.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132920.2958143-1-dmalcolm@redhat.com/mbox/"},{"id":21062,"url":"https://patchwork.plctlab.org/api/1.2/patches/21062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132942.2958189-1-dmalcolm@redhat.com/","msgid":"<20221116132942.2958189-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:29:42","name":"[committed] analyzer: use known_function to simplify region_model::on_call_{pre, post}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132942.2958189-1-dmalcolm@redhat.com/mbox/"},{"id":21069,"url":"https://patchwork.plctlab.org/api/1.2/patches/21069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133815.1351836-1-jwakely@redhat.com/","msgid":"<20221116133815.1351836-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:38:15","name":"[committed] libstdc++: Improve comments on pretty printer code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133815.1351836-1-jwakely@redhat.com/mbox/"},{"id":21070,"url":"https://patchwork.plctlab.org/api/1.2/patches/21070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133834.1351862-1-jwakely@redhat.com/","msgid":"<20221116133834.1351862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:38:34","name":"[committed] libstdc++: Fix std::any pretty printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133834.1351862-1-jwakely@redhat.com/mbox/"},{"id":21080,"url":"https://patchwork.plctlab.org/api/1.2/patches/21080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz/","msgid":"<66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz>","list_archive_url":null,"date":"2022-11-16T14:14:41","name":"[(pushed)] libatomic: regenerate Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz/mbox/"},{"id":21117,"url":"https://patchwork.plctlab.org/api/1.2/patches/21117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116150735.1374787-1-jwakely@redhat.com/","msgid":"<20221116150735.1374787-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T15:07:35","name":"[committed] libstdc++: Add test for chrono::utc_clock leap second offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116150735.1374787-1-jwakely@redhat.com/mbox/"},{"id":21120,"url":"https://patchwork.plctlab.org/api/1.2/patches/21120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153408.86FA313480@imap2.suse-dmz.suse.de/","msgid":"<20221116153408.86FA313480@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-16T15:34:08","name":"middle-end/107679 - fix SSA rewrite of clobber of parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153408.86FA313480@imap2.suse-dmz.suse.de/mbox/"},{"id":21121,"url":"https://patchwork.plctlab.org/api/1.2/patches/21121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153421.1EE2513480@imap2.suse-dmz.suse.de/","msgid":"<20221116153421.1EE2513480@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-16T15:34:20","name":"tree-optimization/107686 - fix bitfield ref through vec_unpack optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153421.1EE2513480@imap2.suse-dmz.suse.de/mbox/"},{"id":21133,"url":"https://patchwork.plctlab.org/api/1.2/patches/21133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ORTB8ja1orPQI2PlPNzQUO4jsLD8w4L7DFPV-Gc_lt29nt6oJn7d4sVnjtdlnn4ehnd0FBYvRUR0lH1QTVFVku2n94g-7xC5xi2Nq2jUSG0=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-11-16T16:03:17","name":"jit: Install jit headers in $(libsubincludedir) [PR 101491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ORTB8ja1orPQI2PlPNzQUO4jsLD8w4L7DFPV-Gc_lt29nt6oJn7d4sVnjtdlnn4ehnd0FBYvRUR0lH1QTVFVku2n94g-7xC5xi2Nq2jUSG0=@lorenzosalvadore.it/mbox/"},{"id":21134,"url":"https://patchwork.plctlab.org/api/1.2/patches/21134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3UKmGtHHRaNahjM@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T16:06:48","name":"[v3] c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3UKmGtHHRaNahjM@redhat.com/mbox/"},{"id":21254,"url":"https://patchwork.plctlab.org/api/1.2/patches/21254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-db3546b8-31ca-43d1-bb5f-962f38c399c4-1668631813744@3c-app-gmx-bap19/","msgid":"","list_archive_url":null,"date":"2022-11-16T20:50:13","name":"Fortran: error recovery after reference to bad CLASS variable [PR107681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-db3546b8-31ca-43d1-bb5f-962f38c399c4-1668631813744@3c-app-gmx-bap19/mbox/"},{"id":21273,"url":"https://patchwork.plctlab.org/api/1.2/patches/21273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116205950.1420057-1-jwakely@redhat.com/","msgid":"<20221116205950.1420057-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T20:59:50","name":"[committed] libstdc++: Disable std::format of _Float128 if std::to_chars is innaccurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116205950.1420057-1-jwakely@redhat.com/mbox/"},{"id":21274,"url":"https://patchwork.plctlab.org/api/1.2/patches/21274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210006.1420105-1-jwakely@redhat.com/","msgid":"<20221116210006.1420105-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:06","name":"[committed] libstdc++: Adjust for Clang compatibility [PR107712]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210006.1420105-1-jwakely@redhat.com/mbox/"},{"id":21275,"url":"https://patchwork.plctlab.org/api/1.2/patches/21275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210014.1420128-1-jwakely@redhat.com/","msgid":"<20221116210014.1420128-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:14","name":"[committed] libstdc++: Improve performance of chrono::utc_clock::now()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210014.1420128-1-jwakely@redhat.com/mbox/"},{"id":21277,"url":"https://patchwork.plctlab.org/api/1.2/patches/21277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210023.1420143-1-jwakely@redhat.com/","msgid":"<20221116210023.1420143-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:23","name":"[committed] libstdc++: Fix dumb typos in ALT128 support in [PR107720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210023.1420143-1-jwakely@redhat.com/mbox/"},{"id":21281,"url":"https://patchwork.plctlab.org/api/1.2/patches/21281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116211614.904834-1-kevinl@rivosinc.com/","msgid":"<20221116211614.904834-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-16T21:16:14","name":"[v3] RISC-V missing __builtin_lceil and __builtin_lfloor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116211614.904834-1-kevinl@rivosinc.com/mbox/"},{"id":21311,"url":"https://patchwork.plctlab.org/api/1.2/patches/21311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f69af5d4-c8de-4af1-94d3-d9f20963f1ef-1668635898373@3c-app-gmx-bap19/","msgid":"","list_archive_url":null,"date":"2022-11-16T21:58:18","name":"[committed] Fortran: ICE on procedure arguments with non-integer length [PR107707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f69af5d4-c8de-4af1-94d3-d9f20963f1ef-1668635898373@3c-app-gmx-bap19/mbox/"},{"id":21318,"url":"https://patchwork.plctlab.org/api/1.2/patches/21318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225115.2985194-1-dmalcolm@redhat.com/","msgid":"<20221116225115.2985194-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T22:51:15","name":"[committed] analyzer: log the stashing of named constants [PR107711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225115.2985194-1-dmalcolm@redhat.com/mbox/"},{"id":21319,"url":"https://patchwork.plctlab.org/api/1.2/patches/21319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225137.2985245-1-dmalcolm@redhat.com/","msgid":"<20221116225137.2985245-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T22:51:37","name":"[committed] analyzer: more test coverage for named constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225137.2985245-1-dmalcolm@redhat.com/mbox/"},{"id":21343,"url":"https://patchwork.plctlab.org/api/1.2/patches/21343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116235429.25268-1-hongyu.wang@intel.com/","msgid":"<20221116235429.25268-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-16T23:54:29","name":"rs6000: Adjust loop_unroll_adjust to match middle-end change [PR 107692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116235429.25268-1-hongyu.wang@intel.com/mbox/"},{"id":21349,"url":"https://patchwork.plctlab.org/api/1.2/patches/21349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117003508.1432092-1-jwakely@redhat.com/","msgid":"<20221117003508.1432092-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-17T00:35:08","name":"[committed] libstdc++: Ensure std::to_chars overloads all declared in [PR107720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117003508.1432092-1-jwakely@redhat.com/mbox/"},{"id":21378,"url":"https://patchwork.plctlab.org/api/1.2/patches/21378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc69d060-9336-a1fd-fd9b-6bc9a024eb57@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-17T01:51:38","name":"[committed] Fix multiple recent sh3/sh3eb regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc69d060-9336-a1fd-fd9b-6bc9a024eb57@gmail.com/mbox/"},{"id":21392,"url":"https://patchwork.plctlab.org/api/1.2/patches/21392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117030530.2995977-1-dmalcolm@redhat.com/","msgid":"<20221117030530.2995977-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-17T03:05:30","name":"c: fix ICE with -fanalyzer and -Wunused-macros [PR107711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117030530.2995977-1-dmalcolm@redhat.com/mbox/"},{"id":21422,"url":"https://patchwork.plctlab.org/api/1.2/patches/21422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16601-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-17T04:09:49","name":"middle-end: ensure that VEC_PERM operands get lowered to the same SSA_NAME. [PR107717]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16601-tamar@arm.com/mbox/"},{"id":21456,"url":"https://patchwork.plctlab.org/api/1.2/patches/21456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117061549.178481-1-guojiufu@linux.ibm.com/","msgid":"<20221117061549.178481-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-17T06:15:49","name":"[V2] Use subscalar mode to move struct block for parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117061549.178481-1-guojiufu@linux.ibm.com/mbox/"},{"id":21461,"url":"https://patchwork.plctlab.org/api/1.2/patches/21461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117063852.29869-1-hejinyang@loongson.cn/","msgid":"<20221117063852.29869-1-hejinyang@loongson.cn>","list_archive_url":null,"date":"2022-11-17T06:38:52","name":"[v2] LoongArch: Fix atomic_exchange expanding [PR107713]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117063852.29869-1-hejinyang@loongson.cn/mbox/"},{"id":21460,"url":"https://patchwork.plctlab.org/api/1.2/patches/21460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com/","msgid":"<438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com>","list_archive_url":null,"date":"2022-11-17T06:39:20","name":"[PATCHv2,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com/mbox/"},{"id":21516,"url":"https://patchwork.plctlab.org/api/1.2/patches/21516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3X7UH00hQtTnQSj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-17T09:13:52","name":"c++, v3: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3X7UH00hQtTnQSj@tucnak/mbox/"},{"id":21526,"url":"https://patchwork.plctlab.org/api/1.2/patches/21526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095355.1928564-1-chenyixuan@iscas.ac.cn/","msgid":"<20221117095355.1928564-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-17T09:53:55","name":"Ver.2: Add compile option \"-msmall-data-limit=0\" to avoid using .srodata section for riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095355.1928564-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":21536,"url":"https://patchwork.plctlab.org/api/1.2/patches/21536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095909.2896386-1-chenglulu@loongson.cn/","msgid":"<20221117095909.2896386-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-17T09:59:09","name":"[v4] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095909.2896386-1-chenglulu@loongson.cn/mbox/"},{"id":21549,"url":"https://patchwork.plctlab.org/api/1.2/patches/21549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117105236.2480943-1-manolis.tsamis@vrull.eu/","msgid":"<20221117105236.2480943-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-11-17T10:52:36","name":"[v3] Enable shrink wrapping for the RISC-V target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117105236.2480943-1-manolis.tsamis@vrull.eu/mbox/"},{"id":21666,"url":"https://patchwork.plctlab.org/api/1.2/patches/21666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117132021.1143935-1-torbjorn.svensson@foss.st.com/","msgid":"<20221117132021.1143935-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-17T13:20:22","name":"[v3] c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117132021.1143935-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":21845,"url":"https://patchwork.plctlab.org/api/1.2/patches/21845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-2-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:35","name":"[01/35] arm: improve vcreateq* tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-2-andrea.corallo@arm.com/mbox/"},{"id":21802,"url":"https://patchwork.plctlab.org/api/1.2/patches/21802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-3-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-3-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:36","name":"[02/35] arm: fix '\''vmsr'\'' spacing and register capitalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-3-andrea.corallo@arm.com/mbox/"},{"id":21803,"url":"https://patchwork.plctlab.org/api/1.2/patches/21803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-4-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:37","name":"[03/35] arm: improve tests and fix vddupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-4-andrea.corallo@arm.com/mbox/"},{"id":21804,"url":"https://patchwork.plctlab.org/api/1.2/patches/21804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-5-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:38","name":"[04/35] arm: improve tests and fix vdwdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-5-andrea.corallo@arm.com/mbox/"},{"id":21806,"url":"https://patchwork.plctlab.org/api/1.2/patches/21806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-6-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:39","name":"[05/35] arm: improve vidupq* tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-6-andrea.corallo@arm.com/mbox/"},{"id":21807,"url":"https://patchwork.plctlab.org/api/1.2/patches/21807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-7-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-7-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:40","name":"[06/35] arm: improve tests and fix vdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-7-andrea.corallo@arm.com/mbox/"},{"id":21837,"url":"https://patchwork.plctlab.org/api/1.2/patches/21837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-8-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:41","name":"[07/35] arm: improve tests and fix vcmp*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-8-andrea.corallo@arm.com/mbox/"},{"id":21824,"url":"https://patchwork.plctlab.org/api/1.2/patches/21824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-9-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:42","name":"[08/35] arm: improve tests for vmin*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-9-andrea.corallo@arm.com/mbox/"},{"id":21840,"url":"https://patchwork.plctlab.org/api/1.2/patches/21840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-10-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:43","name":"[09/35] arm: improve tests for vmax*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-10-andrea.corallo@arm.com/mbox/"},{"id":21805,"url":"https://patchwork.plctlab.org/api/1.2/patches/21805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-11-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-11-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:44","name":"[10/35] arm: improve tests for vabavq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-11-andrea.corallo@arm.com/mbox/"},{"id":21813,"url":"https://patchwork.plctlab.org/api/1.2/patches/21813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-12-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-12-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:45","name":"[11/35] arm: improve tests for vabdq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-12-andrea.corallo@arm.com/mbox/"},{"id":21811,"url":"https://patchwork.plctlab.org/api/1.2/patches/21811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-13-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-13-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:46","name":"[12/35] arm: improve tests and fix vabsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-13-andrea.corallo@arm.com/mbox/"},{"id":21849,"url":"https://patchwork.plctlab.org/api/1.2/patches/21849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-14-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-14-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:47","name":"[13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-14-andrea.corallo@arm.com/mbox/"},{"id":21842,"url":"https://patchwork.plctlab.org/api/1.2/patches/21842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-15-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-15-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:48","name":"[14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-15-andrea.corallo@arm.com/mbox/"},{"id":21846,"url":"https://patchwork.plctlab.org/api/1.2/patches/21846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-16-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-16-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:49","name":"[15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-16-andrea.corallo@arm.com/mbox/"},{"id":21814,"url":"https://patchwork.plctlab.org/api/1.2/patches/21814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-17-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-17-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:50","name":"[16/35] arm: Add integer vector overloading of vsubq_x instrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-17-andrea.corallo@arm.com/mbox/"},{"id":21841,"url":"https://patchwork.plctlab.org/api/1.2/patches/21841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-18-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-18-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:51","name":"[17/35] arm: improve tests and fix vadd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-18-andrea.corallo@arm.com/mbox/"},{"id":21827,"url":"https://patchwork.plctlab.org/api/1.2/patches/21827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-19-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-19-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:52","name":"[18/35] arm: improve tests for vmulq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-19-andrea.corallo@arm.com/mbox/"},{"id":21821,"url":"https://patchwork.plctlab.org/api/1.2/patches/21821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-20-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-20-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:53","name":"[19/35] arm: improve tests and fix vsubq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-20-andrea.corallo@arm.com/mbox/"},{"id":21812,"url":"https://patchwork.plctlab.org/api/1.2/patches/21812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-21-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-21-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:54","name":"[20/35] arm: improve tests for vfmasq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-21-andrea.corallo@arm.com/mbox/"},{"id":21834,"url":"https://patchwork.plctlab.org/api/1.2/patches/21834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-22-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-22-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:55","name":"[21/35] arm: improve tests for vhaddq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-22-andrea.corallo@arm.com/mbox/"},{"id":21823,"url":"https://patchwork.plctlab.org/api/1.2/patches/21823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-23-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-23-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:56","name":"[22/35] arm: improve tests for vhsubq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-23-andrea.corallo@arm.com/mbox/"},{"id":21820,"url":"https://patchwork.plctlab.org/api/1.2/patches/21820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-24-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-24-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:57","name":"[23/35] arm: improve tests for viwdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-24-andrea.corallo@arm.com/mbox/"},{"id":21819,"url":"https://patchwork.plctlab.org/api/1.2/patches/21819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-25-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-25-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:58","name":"[24/35] arm: improve tests for vmladavaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-25-andrea.corallo@arm.com/mbox/"},{"id":21825,"url":"https://patchwork.plctlab.org/api/1.2/patches/21825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-26-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-26-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:59","name":"[25/35] arm: improve tests and fix vmlaldavaxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-26-andrea.corallo@arm.com/mbox/"},{"id":21829,"url":"https://patchwork.plctlab.org/api/1.2/patches/21829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-27-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-27-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:00","name":"[26/35] arm: improve tests for vmlasq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-27-andrea.corallo@arm.com/mbox/"},{"id":21816,"url":"https://patchwork.plctlab.org/api/1.2/patches/21816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-28-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-28-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:01","name":"[27/35] arm: improve tests for vqaddq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-28-andrea.corallo@arm.com/mbox/"},{"id":21826,"url":"https://patchwork.plctlab.org/api/1.2/patches/21826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-29-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-29-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:02","name":"[28/35] arm: improve tests for vqdmlahq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-29-andrea.corallo@arm.com/mbox/"},{"id":21836,"url":"https://patchwork.plctlab.org/api/1.2/patches/21836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-30-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-30-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:03","name":"[29/35] arm: improve tests for vqdmul*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-30-andrea.corallo@arm.com/mbox/"},{"id":21822,"url":"https://patchwork.plctlab.org/api/1.2/patches/21822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-31-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-31-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:04","name":"[30/35] arm: improve tests for vqrdmlahq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-31-andrea.corallo@arm.com/mbox/"},{"id":21810,"url":"https://patchwork.plctlab.org/api/1.2/patches/21810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-32-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-32-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:05","name":"[31/35] arm: improve tests for vqrdmlashq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-32-andrea.corallo@arm.com/mbox/"},{"id":21835,"url":"https://patchwork.plctlab.org/api/1.2/patches/21835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-33-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-33-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:06","name":"[32/35] arm: improve tests for vqsubq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-33-andrea.corallo@arm.com/mbox/"},{"id":21817,"url":"https://patchwork.plctlab.org/api/1.2/patches/21817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-34-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-34-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:07","name":"[33/35] arm: improve tests and fix vrmlaldavhaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-34-andrea.corallo@arm.com/mbox/"},{"id":21828,"url":"https://patchwork.plctlab.org/api/1.2/patches/21828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-35-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-35-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:08","name":"[34/35] arm: improve tests for vrshlq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-35-andrea.corallo@arm.com/mbox/"},{"id":21808,"url":"https://patchwork.plctlab.org/api/1.2/patches/21808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-36-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-36-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:09","name":"[35/35] arm: improve tests for vsetq_lane*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-36-andrea.corallo@arm.com/mbox/"},{"id":21859,"url":"https://patchwork.plctlab.org/api/1.2/patches/21859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117174449.825329-1-aldyh@redhat.com/","msgid":"<20221117174449.825329-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-17T17:44:49","name":"[COMMITTED,PR,tree-optimization/107732,range-ops] Handle attempt to abs() negatives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117174449.825329-1-aldyh@redhat.com/mbox/"},{"id":21860,"url":"https://patchwork.plctlab.org/api/1.2/patches/21860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668707958-10346-1-git-send-email-apinski@marvell.com/","msgid":"<1668707958-10346-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-17T17:59:18","name":"[COMMITTED] Fix PR 107734: valgrind errors with sbitmap in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668707958-10346-1-git-send-email-apinski@marvell.com/mbox/"},{"id":21870,"url":"https://patchwork.plctlab.org/api/1.2/patches/21870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117183810.33353-1-polacek@redhat.com/","msgid":"<20221117183810.33353-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-17T18:38:10","name":"c++: constinit on pointer to function [PR104066]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117183810.33353-1-polacek@redhat.com/mbox/"},{"id":21894,"url":"https://patchwork.plctlab.org/api/1.2/patches/21894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3acqbULfy3PULmc@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-17T20:42:17","name":"c++, v4: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3acqbULfy3PULmc@tucnak/mbox/"},{"id":21895,"url":"https://patchwork.plctlab.org/api/1.2/patches/21895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9afc12d0-717f-45c1-81cf-6d4fc8d6249e-1668718081298@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2022-11-17T20:48:01","name":"Fortran: reject NULL actual argument without explicit interface [PR107576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9afc12d0-717f-45c1-81cf-6d4fc8d6249e-1668718081298@3c-app-gmx-bap50/mbox/"},{"id":21903,"url":"https://patchwork.plctlab.org/api/1.2/patches/21903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117210259.154569-1-aldot@gcc.gnu.org/","msgid":"<20221117210259.154569-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-17T21:02:59","name":"libcpp: Add missing config for --enable-valgrind-annotations [PR107691]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117210259.154569-1-aldot@gcc.gnu.org/mbox/"},{"id":22039,"url":"https://patchwork.plctlab.org/api/1.2/patches/22039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118014522.1989180-1-hongtao.liu@intel.com/","msgid":"<20221118014522.1989180-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-18T01:45:22","name":"[x86] define builtins for \"shared\" avxneconvert-avx512bf16vl builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118014522.1989180-1-hongtao.liu@intel.com/mbox/"},{"id":22062,"url":"https://patchwork.plctlab.org/api/1.2/patches/22062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118021223.348112-1-christoph.muellner@vrull.eu/","msgid":"<20221118021223.348112-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-18T02:12:23","name":"RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118021223.348112-1-christoph.muellner@vrull.eu/mbox/"},{"id":22085,"url":"https://patchwork.plctlab.org/api/1.2/patches/22085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-1-git-send-email-apinski@marvell.com/","msgid":"<1668741911-1727-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T03:25:10","name":"[1/2] Fix PRs 106764, 106765, and 107307, all ICE after invalid re-declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-1-git-send-email-apinski@marvell.com/mbox/"},{"id":22084,"url":"https://patchwork.plctlab.org/api/1.2/patches/22084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-2-git-send-email-apinski@marvell.com/","msgid":"<1668741911-1727-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T03:25:11","name":"[2/2] Fix PR middle-end/107705: ICE after reclaration error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-2-git-send-email-apinski@marvell.com/mbox/"},{"id":22100,"url":"https://patchwork.plctlab.org/api/1.2/patches/22100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118042706.10725-1-palmer@rivosinc.com/","msgid":"<20221118042706.10725-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-18T04:27:06","name":"RISC-V: Note that __builtin_riscv_pause() implies Xgnuzihintpausestate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118042706.10725-1-palmer@rivosinc.com/mbox/"},{"id":22107,"url":"https://patchwork.plctlab.org/api/1.2/patches/22107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118054904.240603-1-chenyixuan@iscas.ac.cn/","msgid":"<20221118054904.240603-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-18T05:49:04","name":"optimize the testcase for architectures that use \".srodata\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118054904.240603-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":22162,"url":"https://patchwork.plctlab.org/api/1.2/patches/22162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118073700.151791345B@imap2.suse-dmz.suse.de/","msgid":"<20221118073700.151791345B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-18T07:36:59","name":"tree-optimization/107647 - avoid FMA from SLP with -ffp-contract=off","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118073700.151791345B@imap2.suse-dmz.suse.de/mbox/"},{"id":22213,"url":"https://patchwork.plctlab.org/api/1.2/patches/22213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3dL8nv/qF+qb1j3@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-18T09:10:10","name":"c++, v5: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3dL8nv/qF+qb1j3@tucnak/mbox/"},{"id":22269,"url":"https://patchwork.plctlab.org/api/1.2/patches/22269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-2-philipp.tomsich@vrull.eu/","msgid":"<20221118111001.1488517-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-18T11:10:00","name":"[v2,1/2] RISC-V: Use bseti/bclri/binvi to extend reach of ori/andi/xori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-2-philipp.tomsich@vrull.eu/mbox/"},{"id":22270,"url":"https://patchwork.plctlab.org/api/1.2/patches/22270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-3-philipp.tomsich@vrull.eu/","msgid":"<20221118111001.1488517-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-18T11:10:01","name":"[v2,2/2] RISC-V: Handle \"(a & twobits) == singlebit\" in branches using Zbs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-3-philipp.tomsich@vrull.eu/mbox/"},{"id":22402,"url":"https://patchwork.plctlab.org/api/1.2/patches/22402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com/","msgid":"<1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com>","list_archive_url":null,"date":"2022-11-18T17:20:29","name":"gcn: Add __builtin_gcn_{get_stack_limit,first_call_this_thread_p}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com/mbox/"},{"id":22412,"url":"https://patchwork.plctlab.org/api/1.2/patches/22412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668794731-9349-1-git-send-email-apinski@marvell.com/","msgid":"<1668794731-9349-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T18:05:31","name":"constexprify some tree variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668794731-9349-1-git-send-email-apinski@marvell.com/mbox/"},{"id":22440,"url":"https://patchwork.plctlab.org/api/1.2/patches/22440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcoayyz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-18T18:39:48","name":"gomp: Various fixes for SVE types [PR101018]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcoayyz.fsf@arm.com/mbox/"},{"id":22513,"url":"https://patchwork.plctlab.org/api/1.2/patches/22513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118214339.3620949-1-ppalka@redhat.com/","msgid":"<20221118214339.3620949-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-18T21:43:39","name":"c++: cache the normal form of a concept-id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118214339.3620949-1-ppalka@redhat.com/mbox/"},{"id":22517,"url":"https://patchwork.plctlab.org/api/1.2/patches/22517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118215946.3621557-1-ppalka@redhat.com/","msgid":"<20221118215946.3621557-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-18T21:59:46","name":"c++: remove coerce_innermost_template_parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118215946.3621557-1-ppalka@redhat.com/mbox/"},{"id":22518,"url":"https://patchwork.plctlab.org/api/1.2/patches/22518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118220326.3093911-1-dmalcolm@redhat.com/","msgid":"<20221118220326.3093911-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-18T22:03:26","name":"[committed] analyzer: move more impl_* to known_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118220326.3093911-1-dmalcolm@redhat.com/mbox/"},{"id":22664,"url":"https://patchwork.plctlab.org/api/1.2/patches/22664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-11-18T23:25:16","name":"nvptx: In '\''STARTFILE_SPEC'\'', fix '\''crt0.o'\'' for '\''-mmainkernel'\'' (was: [MentorEmbedded/nvptx-tools] Match standard '\''ld'\'' \"search\" behavior (PR #38))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":22814,"url":"https://patchwork.plctlab.org/api/1.2/patches/22814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3gazoJNHo0bHBR9@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-18T23:52:46","name":"[v2] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3gazoJNHo0bHBR9@redhat.com/mbox/"},{"id":23086,"url":"https://patchwork.plctlab.org/api/1.2/patches/23086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119004136.3101136-1-dmalcolm@redhat.com/","msgid":"<20221119004136.3101136-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-19T00:41:36","name":"[committed] analyzer: fix feasibility false +ve on jumps through function ptrs [PR107582]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119004136.3101136-1-dmalcolm@redhat.com/mbox/"},{"id":23220,"url":"https://patchwork.plctlab.org/api/1.2/patches/23220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119062532.75190-1-hongyu.wang@intel.com/","msgid":"<20221119062532.75190-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-19T06:25:32","name":"i386: Only enable small loop unrolling in backend [PR 107602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119062532.75190-1-hongyu.wang@intel.com/mbox/"},{"id":23236,"url":"https://patchwork.plctlab.org/api/1.2/patches/23236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iV4SQrZRB2TJxD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T08:37:53","name":"i386: Uglify some local identifiers in *intrin.h [PR107748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iV4SQrZRB2TJxD@tucnak/mbox/"},{"id":23237,"url":"https://patchwork.plctlab.org/api/1.2/patches/23237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iZZpCSBrzTZVP4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T08:52:54","name":"i386: Outline fast BF -> SF conversion and fix up sNaN handling in it [PR107628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iZZpCSBrzTZVP4@tucnak/mbox/"},{"id":23240,"url":"https://patchwork.plctlab.org/api/1.2/patches/23240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iexgMbUBm5mi7A@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T09:15:50","name":"reg-stack: Fix a -fcompare-debug bug in reg-stack [PR107183]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iexgMbUBm5mi7A@tucnak/mbox/"},{"id":23268,"url":"https://patchwork.plctlab.org/api/1.2/patches/23268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9630c4c-1df6-4dd5-f7e1-3d63c2e1f34d@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-19T13:02:44","name":"Fix in _GLIBCXX_INLINE_VERSION mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9630c4c-1df6-4dd5-f7e1-3d63c2e1f34d@gmail.com/mbox/"},{"id":23270,"url":"https://patchwork.plctlab.org/api/1.2/patches/23270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150817.1673878-1-jwakely@redhat.com/","msgid":"<20221119150817.1673878-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:17","name":"[committed] libstdc++: Fix one more malformed requires-clause [PR107649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150817.1673878-1-jwakely@redhat.com/mbox/"},{"id":23271,"url":"https://patchwork.plctlab.org/api/1.2/patches/23271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150840.1673902-1-jwakely@redhat.com/","msgid":"<20221119150840.1673902-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:40","name":"[committed] libstdc++: Fix Doxygen warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150840.1673902-1-jwakely@redhat.com/mbox/"},{"id":23272,"url":"https://patchwork.plctlab.org/api/1.2/patches/23272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150847.1673947-1-jwakely@redhat.com/","msgid":"<20221119150847.1673947-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:47","name":"[committed] libstdc++: Fix -Wsign-compare warnings in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150847.1673947-1-jwakely@redhat.com/mbox/"},{"id":23302,"url":"https://patchwork.plctlab.org/api/1.2/patches/23302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119174453.1688270-1-jwakely@redhat.com/","msgid":"<20221119174453.1688270-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T17:44:53","name":"[committed] libstdc++: Add always_inline to trivial range access functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119174453.1688270-1-jwakely@redhat.com/mbox/"},{"id":23367,"url":"https://patchwork.plctlab.org/api/1.2/patches/23367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668907504-29652-1-git-send-email-apinski@marvell.com/","msgid":"<1668907504-29652-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-20T01:25:04","name":"Fix PR 106560: Another ICE after conflicting types of redeclaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668907504-29652-1-git-send-email-apinski@marvell.com/mbox/"},{"id":23369,"url":"https://patchwork.plctlab.org/api/1.2/patches/23369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com/","msgid":"<3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com>","list_archive_url":null,"date":"2022-11-20T01:50:52","name":"[committed] Fix test to not depend on DECL_UIDs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com/mbox/"},{"id":23373,"url":"https://patchwork.plctlab.org/api/1.2/patches/23373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com/","msgid":"<66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com>","list_archive_url":null,"date":"2022-11-20T02:26:52","name":"[committed,PR,other/104044] Remove extraneous semicolons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com/mbox/"},{"id":23401,"url":"https://patchwork.plctlab.org/api/1.2/patches/23401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221120100257.281467-1-dimitar@dinux.eu/","msgid":"<20221120100257.281467-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-11-20T10:02:57","name":"testsuite: Add filter for target socket support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221120100257.281467-1-dimitar@dinux.eu/mbox/"},{"id":23438,"url":"https://patchwork.plctlab.org/api/1.2/patches/23438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff23edb1b10b4b6d099bb8a436910dd282d508fe.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2022-11-20T19:03:12","name":"libgccjit: Fix float vector comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff23edb1b10b4b6d099bb8a436910dd282d508fe.camel@zoho.com/mbox/"},{"id":23476,"url":"https://patchwork.plctlab.org/api/1.2/patches/23476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaUaDNB_rGUUPBOWQHZVCFN8uoiCVEWcoAX3q9MvyyPWw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-20T22:50:06","name":"[Arm] Add neon_fcmla and neon_fcadd as neon_type instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaUaDNB_rGUUPBOWQHZVCFN8uoiCVEWcoAX3q9MvyyPWw@mail.gmail.com/mbox/"},{"id":23510,"url":"https://patchwork.plctlab.org/api/1.2/patches/23510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121021150.3348406-1-hongtao.liu@intel.com/","msgid":"<20221121021150.3348406-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-21T02:11:50","name":"[x86] Some tidy up for RA related hooks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121021150.3348406-1-hongtao.liu@intel.com/mbox/"},{"id":23548,"url":"https://patchwork.plctlab.org/api/1.2/patches/23548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-1-sebastian.huber@embedded-brains.de/","msgid":"<20221121072526.103446-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-11-21T07:25:25","name":"[v2,1/2] Allow subtarget customization of CC1_SPEC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":23550,"url":"https://patchwork.plctlab.org/api/1.2/patches/23550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-2-sebastian.huber@embedded-brains.de/","msgid":"<20221121072526.103446-2-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-11-21T07:25:26","name":"[v2,2/2] RTEMS: Use local-exec TLS model by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-2-sebastian.huber@embedded-brains.de/mbox/"},{"id":23577,"url":"https://patchwork.plctlab.org/api/1.2/patches/23577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz/","msgid":"<0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz>","list_archive_url":null,"date":"2022-11-21T08:04:31","name":"[(pushed)] build: re-configure 2 files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz/mbox/"},{"id":23580,"url":"https://patchwork.plctlab.org/api/1.2/patches/23580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz/","msgid":"<52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz>","list_archive_url":null,"date":"2022-11-21T08:19:24","name":"changelog: Fix extra space after tab. fix extra spaces after tab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz/mbox/"},{"id":23630,"url":"https://patchwork.plctlab.org/api/1.2/patches/23630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJOtW+5=-WA_i7cXxrWSOVKDc_PQbtNOoaLmEQJrk3oU=uLUdw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T09:57:15","name":"[PING,sanitizer/106558] asan: fix unsafe optimization of Asan checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJOtW+5=-WA_i7cXxrWSOVKDc_PQbtNOoaLmEQJrk3oU=uLUdw@mail.gmail.com/mbox/"},{"id":23634,"url":"https://patchwork.plctlab.org/api/1.2/patches/23634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101329.258908-1-poulhies@adacore.com/","msgid":"<20221121101329.258908-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:29","name":"[COMMITTED] ada: Tweak error messages on misplaced with keywords","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101329.258908-1-poulhies@adacore.com/mbox/"},{"id":23635,"url":"https://patchwork.plctlab.org/api/1.2/patches/23635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101338.259014-1-poulhies@adacore.com/","msgid":"<20221121101338.259014-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:38","name":"[COMMITTED] ada: Fix gnatmake'\''s parsing of adc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101338.259014-1-poulhies@adacore.com/mbox/"},{"id":23640,"url":"https://patchwork.plctlab.org/api/1.2/patches/23640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101346.259079-1-poulhies@adacore.com/","msgid":"<20221121101346.259079-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:46","name":"[COMMITTED] ada: Reject nonconfirming Size attribute value for aliased object","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101346.259079-1-poulhies@adacore.com/mbox/"},{"id":23641,"url":"https://patchwork.plctlab.org/api/1.2/patches/23641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101356.259145-1-poulhies@adacore.com/","msgid":"<20221121101356.259145-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:56","name":"[COMMITTED] ada: Improve documentation for -gnatw.h warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101356.259145-1-poulhies@adacore.com/mbox/"},{"id":23648,"url":"https://patchwork.plctlab.org/api/1.2/patches/23648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101405.259209-1-poulhies@adacore.com/","msgid":"<20221121101405.259209-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:05","name":"[COMMITTED] ada: Move warnings switches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101405.259209-1-poulhies@adacore.com/mbox/"},{"id":23645,"url":"https://patchwork.plctlab.org/api/1.2/patches/23645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101410.259273-1-poulhies@adacore.com/","msgid":"<20221121101410.259273-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:10","name":"[COMMITTED] ada: Disable subprogram call validation in CodePeer mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101410.259273-1-poulhies@adacore.com/mbox/"},{"id":23639,"url":"https://patchwork.plctlab.org/api/1.2/patches/23639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101418.259338-1-poulhies@adacore.com/","msgid":"<20221121101418.259338-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:18","name":"[COMMITTED] ada: Ada 2022 Image attribute bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101418.259338-1-poulhies@adacore.com/mbox/"},{"id":23647,"url":"https://patchwork.plctlab.org/api/1.2/patches/23647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101426.259405-1-poulhies@adacore.com/","msgid":"<20221121101426.259405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:26","name":"[COMMITTED] ada: Small cleanup in Expand_N_Object_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101426.259405-1-poulhies@adacore.com/mbox/"},{"id":23650,"url":"https://patchwork.plctlab.org/api/1.2/patches/23650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101431.259470-1-poulhies@adacore.com/","msgid":"<20221121101431.259470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:31","name":"[COMMITTED] ada: Internal compiler error for Sequential Partition_Elaboration_Policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101431.259470-1-poulhies@adacore.com/mbox/"},{"id":23644,"url":"https://patchwork.plctlab.org/api/1.2/patches/23644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101437.259534-1-poulhies@adacore.com/","msgid":"<20221121101437.259534-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:37","name":"[COMMITTED] ada: Minor tweak in assertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101437.259534-1-poulhies@adacore.com/mbox/"},{"id":23651,"url":"https://patchwork.plctlab.org/api/1.2/patches/23651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101444.259598-1-poulhies@adacore.com/","msgid":"<20221121101444.259598-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:44","name":"[COMMITTED] ada: Order pragmas alphabetically in reference manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101444.259598-1-poulhies@adacore.com/mbox/"},{"id":23643,"url":"https://patchwork.plctlab.org/api/1.2/patches/23643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101449.259662-1-poulhies@adacore.com/","msgid":"<20221121101449.259662-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:49","name":"[COMMITTED] ada: Do not share Packed Array Type if sizes of types differ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101449.259662-1-poulhies@adacore.com/mbox/"},{"id":23646,"url":"https://patchwork.plctlab.org/api/1.2/patches/23646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101453.259725-1-poulhies@adacore.com/","msgid":"<20221121101453.259725-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:53","name":"[COMMITTED] ada: Adjust recent change for returns involving function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101453.259725-1-poulhies@adacore.com/mbox/"},{"id":23652,"url":"https://patchwork.plctlab.org/api/1.2/patches/23652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121102909.1603846-1-ibuclaw@gdcproject.org/","msgid":"<20221121102909.1603846-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-21T10:29:09","name":"maintainer-scripts: Add gdc to update_web_docs_git","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121102909.1603846-1-ibuclaw@gdcproject.org/mbox/"},{"id":23693,"url":"https://patchwork.plctlab.org/api/1.2/patches/23693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115720.2510778-1-philipp.tomsich@vrull.eu/","msgid":"<20221121115720.2510778-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-21T11:57:20","name":"[PR107786,COMMITTED] RISC-V: Fix ICE in branch_shiftedarith_equals_zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115720.2510778-1-philipp.tomsich@vrull.eu/mbox/"},{"id":23698,"url":"https://patchwork.plctlab.org/api/1.2/patches/23698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115915.374247-1-christophe.lyon@arm.com/","msgid":"<20221121115915.374247-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-21T11:59:15","name":"genmultilib: Fix sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115915.374247-1-christophe.lyon@arm.com/mbox/"},{"id":23748,"url":"https://patchwork.plctlab.org/api/1.2/patches/23748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com/","msgid":"<23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com>","list_archive_url":null,"date":"2022-11-21T13:40:59","name":"libgomp/gcn: fix/improve struct output (was: [Patch] libgomp/gcn: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com/mbox/"},{"id":23941,"url":"https://patchwork.plctlab.org/api/1.2/patches/23941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMWq0RZKyuQQ4uQ8eT2abg=N0MQEpoQ1TvSiZUz+kvEb-A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T16:35:18","name":"Remove legacy VRP (maybe?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMWq0RZKyuQQ4uQ8eT2abg=N0MQEpoQ1TvSiZUz+kvEb-A@mail.gmail.com/mbox/"},{"id":23991,"url":"https://patchwork.plctlab.org/api/1.2/patches/23991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185115.2021818-1-jwakely@redhat.com/","msgid":"<20221121185115.2021818-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:15","name":"[committed] libstdc++: Improve Doxygen comments in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185115.2021818-1-jwakely@redhat.com/mbox/"},{"id":23993,"url":"https://patchwork.plctlab.org/api/1.2/patches/23993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185123.2021836-1-jwakely@redhat.com/","msgid":"<20221121185123.2021836-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:23","name":"[committed] libstdc++: Check static assertions earlier in chrono::duration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185123.2021836-1-jwakely@redhat.com/mbox/"},{"id":23992,"url":"https://patchwork.plctlab.org/api/1.2/patches/23992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185130.2021855-1-jwakely@redhat.com/","msgid":"<20221121185130.2021855-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:30","name":"[committed] libstdc++: Reduce size of std::bind_front(F) result","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185130.2021855-1-jwakely@redhat.com/mbox/"},{"id":24011,"url":"https://patchwork.plctlab.org/api/1.2/patches/24011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121204341.2024118-1-jwakely@redhat.com/","msgid":"<20221121204341.2024118-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T20:43:41","name":"libstdc++: Make chrono::hh_mm_ss more compact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121204341.2024118-1-jwakely@redhat.com/mbox/"},{"id":24016,"url":"https://patchwork.plctlab.org/api/1.2/patches/24016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E6C2EE445568BFA6BA4910A9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T21:26:49","name":"Fix count comparison in ipa-cp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E6C2EE445568BFA6BA4910A9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":24039,"url":"https://patchwork.plctlab.org/api/1.2/patches/24039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F5D5271CA9CEEE3C4EF9910A9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T21:57:29","name":"Fix autoprofiledbootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F5D5271CA9CEEE3C4EF9910A9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":24044,"url":"https://patchwork.plctlab.org/api/1.2/patches/24044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wC9ytEbTC0OidM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-21T23:00:07","name":"c++: Fix up -fcontract* options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wC9ytEbTC0OidM@tucnak/mbox/"},{"id":24045,"url":"https://patchwork.plctlab.org/api/1.2/patches/24045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wDPIFQikJu2Opz@wildebeest.org/","msgid":"","list_archive_url":null,"date":"2022-11-21T23:01:16","name":"Activate gcc builder problem emails (Was: [PATCH v2] genmultilib: Add sanity check)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wDPIFQikJu2Opz@wildebeest.org/mbox/"},{"id":24047,"url":"https://patchwork.plctlab.org/api/1.2/patches/24047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121233147.523576-1-jason@redhat.com/","msgid":"<20221121233147.523576-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-21T23:31:47","name":"[RFA(configure)] c++: provide strchrnul on targets without it [PR107781]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121233147.523576-1-jason@redhat.com/mbox/"},{"id":24058,"url":"https://patchwork.plctlab.org/api/1.2/patches/24058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001410.3254534-1-dmalcolm@redhat.com/","msgid":"<20221122001410.3254534-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:10","name":"[committed] analyzer, testsuite: add more examples taken from CWE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001410.3254534-1-dmalcolm@redhat.com/mbox/"},{"id":24059,"url":"https://patchwork.plctlab.org/api/1.2/patches/24059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001421.3254582-1-dmalcolm@redhat.com/","msgid":"<20221122001421.3254582-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:21","name":"[committed] analyzer: fix ICE on writes to errno [PR107777]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001421.3254582-1-dmalcolm@redhat.com/mbox/"},{"id":24061,"url":"https://patchwork.plctlab.org/api/1.2/patches/24061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001446.3254636-1-dmalcolm@redhat.com/","msgid":"<20221122001446.3254636-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:46","name":"[committed] analyzer: fix ICE on '\''bind'\'' with non-pointer arg [P107783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001446.3254636-1-dmalcolm@redhat.com/mbox/"},{"id":24060,"url":"https://patchwork.plctlab.org/api/1.2/patches/24060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001500.3254683-1-dmalcolm@redhat.com/","msgid":"<20221122001500.3254683-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:15:00","name":"[committed] analyzer: fix ICE on '\''bind'\'' that returns a struct [PR107788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001500.3254683-1-dmalcolm@redhat.com/mbox/"},{"id":24100,"url":"https://patchwork.plctlab.org/api/1.2/patches/24100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122012609.550872-1-jason@redhat.com/","msgid":"<20221122012609.550872-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-22T01:26:09","name":"[pushed] c++: contracts fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122012609.550872-1-jason@redhat.com/mbox/"},{"id":24170,"url":"https://patchwork.plctlab.org/api/1.2/patches/24170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122070540.F235B13AA1@imap2.suse-dmz.suse.de/","msgid":"<20221122070540.F235B13AA1@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-22T07:05:40","name":"tree-optimization/107766 - ICE with recent -ffp-contract=off fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122070540.F235B13AA1@imap2.suse-dmz.suse.de/mbox/"},{"id":24179,"url":"https://patchwork.plctlab.org/api/1.2/patches/24179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de/","msgid":"<80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de>","list_archive_url":null,"date":"2022-11-22T08:00:51","name":"speed up end_fde_sort using radix sort","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de/mbox/"},{"id":24199,"url":"https://patchwork.plctlab.org/api/1.2/patches/24199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084235.1216435-1-chenyixuan@iscas.ac.cn/","msgid":"<20221122084235.1216435-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-22T08:42:35","name":"Riscv don'\''t support \"-fprefetch-loop-arrays\", skip.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084235.1216435-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":24200,"url":"https://patchwork.plctlab.org/api/1.2/patches/24200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084850.B6CA313B01@imap2.suse-dmz.suse.de/","msgid":"<20221122084850.B6CA313B01@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-22T08:48:50","name":"tree-optimization/107672 - avoid vector mode type_for_mode call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084850.B6CA313B01@imap2.suse-dmz.suse.de/mbox/"},{"id":24216,"url":"https://patchwork.plctlab.org/api/1.2/patches/24216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122090114.38090-1-christophe.lyon@arm.com/","msgid":"<20221122090114.38090-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-22T09:01:14","name":"aarch64: Fix test_dfp_17.c for big-endian [PR 107604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122090114.38090-1-christophe.lyon@arm.com/mbox/"},{"id":24220,"url":"https://patchwork.plctlab.org/api/1.2/patches/24220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3yXEaqKdvWxf9v0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-22T09:32:01","name":"c-family: Fix up -Wsign-compare BIT_NOT_EXPR handling [PR107465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3yXEaqKdvWxf9v0@tucnak/mbox/"},{"id":24223,"url":"https://patchwork.plctlab.org/api/1.2/patches/24223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f680ae3e-7819-22e0-ca83-72c98135e034@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-22T09:41:28","name":"d: respect --enable-link-mutex configure option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f680ae3e-7819-22e0-ca83-72c98135e034@suse.cz/mbox/"},{"id":24231,"url":"https://patchwork.plctlab.org/api/1.2/patches/24231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122094842.2629693-1-chenyixuan@iscas.ac.cn/","msgid":"<20221122094842.2629693-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-22T09:48:42","name":"Ver2: Riscv don'\''t support \"-fprefetch-loop-arrays\" option, add \"-w\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122094842.2629693-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":24260,"url":"https://patchwork.plctlab.org/api/1.2/patches/24260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122104019.2092679-1-jwakely@redhat.com/","msgid":"<20221122104019.2092679-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T10:40:19","name":"[committed] libstdc++: Fix pool resource build errors for H8 [PR107801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122104019.2092679-1-jwakely@redhat.com/mbox/"},{"id":24268,"url":"https://patchwork.plctlab.org/api/1.2/patches/24268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4442231.LvFx2qVVIh@fomalhaut/","msgid":"<4442231.LvFx2qVVIh@fomalhaut>","list_archive_url":null,"date":"2022-11-22T11:05:16","name":"Fix wrong array type conversion with different storage order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4442231.LvFx2qVVIh@fomalhaut/mbox/"},{"id":24267,"url":"https://patchwork.plctlab.org/api/1.2/patches/24267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122110602.94F003857C71@sourceware.org/","msgid":"<20221122110602.94F003857C71@sourceware.org>","list_archive_url":null,"date":"2022-11-22T11:05:16","name":"tree-optimization/107803 - abnormal cleanup from the SSA propagator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122110602.94F003857C71@sourceware.org/mbox/"},{"id":24335,"url":"https://patchwork.plctlab.org/api/1.2/patches/24335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9fqixe.fsf@oldenburg.str.redhat.com/","msgid":"<87cz9fqixe.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-11-22T12:21:01","name":"c: Propagate erroneous types to declaration specifiers [PR107805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9fqixe.fsf@oldenburg.str.redhat.com/mbox/"},{"id":24338,"url":"https://patchwork.plctlab.org/api/1.2/patches/24338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123620.336156-1-poulhies@adacore.com/","msgid":"<20221122123620.336156-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:20","name":"[COMMITTED] ada: Fix recent assertion failure on GPR2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123620.336156-1-poulhies@adacore.com/mbox/"},{"id":24339,"url":"https://patchwork.plctlab.org/api/1.2/patches/24339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123639.336264-1-poulhies@adacore.com/","msgid":"<20221122123639.336264-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:39","name":"[COMMITTED] ada: Fix formatting glitches in Make_Tag_Assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123639.336264-1-poulhies@adacore.com/mbox/"},{"id":24340,"url":"https://patchwork.plctlab.org/api/1.2/patches/24340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123646.336327-1-poulhies@adacore.com/","msgid":"<20221122123646.336327-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:46","name":"[COMMITTED] ada: Adjust number of errors when removing warning in dead code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123646.336327-1-poulhies@adacore.com/mbox/"},{"id":24341,"url":"https://patchwork.plctlab.org/api/1.2/patches/24341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123654.336392-1-poulhies@adacore.com/","msgid":"<20221122123654.336392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:54","name":"[COMMITTED] ada: Disable checking of Elab_Spec procedures in CodePeer_Mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123654.336392-1-poulhies@adacore.com/mbox/"},{"id":24342,"url":"https://patchwork.plctlab.org/api/1.2/patches/24342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123659.336456-1-poulhies@adacore.com/","msgid":"<20221122123659.336456-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:59","name":"[COMMITTED] ada: Accept aspects Global and Depends on abstract subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123659.336456-1-poulhies@adacore.com/mbox/"},{"id":24389,"url":"https://patchwork.plctlab.org/api/1.2/patches/24389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-1-aldyh@redhat.com/","msgid":"<20221122135801.1945438-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:57:59","name":"Remove ASSERT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-1-aldyh@redhat.com/mbox/"},{"id":24391,"url":"https://patchwork.plctlab.org/api/1.2/patches/24391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-2-aldyh@redhat.com/","msgid":"<20221122135801.1945438-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:58:00","name":"Remove follow_assert_exprs from overflow_comparison.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-2-aldyh@redhat.com/mbox/"},{"id":24390,"url":"https://patchwork.plctlab.org/api/1.2/patches/24390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-3-aldyh@redhat.com/","msgid":"<20221122135801.1945438-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:58:01","name":"Remove use_equiv_p in vr-values.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-3-aldyh@redhat.com/mbox/"},{"id":24401,"url":"https://patchwork.plctlab.org/api/1.2/patches/24401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edtvulho.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-22T14:12:03","name":"ipa-cp: Do not be too optimistic about self-recursive edges (PR 107661)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edtvulho.fsf@suse.cz/mbox/"},{"id":24408,"url":"https://patchwork.plctlab.org/api/1.2/patches/24408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122142955.677712-1-jason@redhat.com/","msgid":"<20221122142955.677712-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-22T14:29:55","name":"[pushed] c++: don'\''t use strchrnul [PR107781]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122142955.677712-1-jason@redhat.com/mbox/"},{"id":24494,"url":"https://patchwork.plctlab.org/api/1.2/patches/24494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175454.2141215-1-jwakely@redhat.com/","msgid":"<20221122175454.2141215-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T17:54:54","name":"[committed] libstdc++: Add testcase for fs::path constraint recursion [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175454.2141215-1-jwakely@redhat.com/mbox/"},{"id":24495,"url":"https://patchwork.plctlab.org/api/1.2/patches/24495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175502.2141235-1-jwakely@redhat.com/","msgid":"<20221122175502.2141235-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T17:55:02","name":"[committed] libstdc++: Replace std::isdigit and std::isxdigit in [PR107817]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175502.2141235-1-jwakely@redhat.com/mbox/"},{"id":24594,"url":"https://patchwork.plctlab.org/api/1.2/patches/24594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122215026.2156686-1-jwakely@redhat.com/","msgid":"<20221122215026.2156686-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T21:50:26","name":"[committed] libstdc++: Add workaround for fs::path constraint recursion [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122215026.2156686-1-jwakely@redhat.com/mbox/"},{"id":24598,"url":"https://patchwork.plctlab.org/api/1.2/patches/24598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dbdce3d4-1d85-4628-b9ea-d4935aaa02df-1669153996745@3c-app-gmx-bap12/","msgid":"","list_archive_url":null,"date":"2022-11-22T21:53:16","name":"Fortran: error recovery on associate with bad selector [PR107577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dbdce3d4-1d85-4628-b9ea-d4935aaa02df-1669153996745@3c-app-gmx-bap12/mbox/"},{"id":24606,"url":"https://patchwork.plctlab.org/api/1.2/patches/24606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223633.3308746-1-dmalcolm@redhat.com/","msgid":"<20221122223633.3308746-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:33","name":"[committed] analyzer: eliminate region_model::impl_call_* special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223633.3308746-1-dmalcolm@redhat.com/mbox/"},{"id":24607,"url":"https://patchwork.plctlab.org/api/1.2/patches/24607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223649.3308793-1-dmalcolm@redhat.com/","msgid":"<20221122223649.3308793-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:49","name":"[committed] analyzer: fix '\''errno'\'' on Solaris and OS X [PR107807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223649.3308793-1-dmalcolm@redhat.com/mbox/"},{"id":24608,"url":"https://patchwork.plctlab.org/api/1.2/patches/24608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223659.3308837-1-dmalcolm@redhat.com/","msgid":"<20221122223659.3308837-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:59","name":"[committed] analyzer: fix ICE on '\''bind(INT_CST, ...)'\'' [PR107783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223659.3308837-1-dmalcolm@redhat.com/mbox/"},{"id":24609,"url":"https://patchwork.plctlab.org/api/1.2/patches/24609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223711.3308884-1-dmalcolm@redhat.com/","msgid":"<20221122223711.3308884-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:37:11","name":"[committed] analyzer: only look for named functions in root ns [PR107788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223711.3308884-1-dmalcolm@redhat.com/mbox/"},{"id":24627,"url":"https://patchwork.plctlab.org/api/1.2/patches/24627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com/","msgid":"<293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com>","list_archive_url":null,"date":"2022-11-22T23:20:58","name":"[committed,RISC-V] Fix recent rvv/base/spill testcase failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com/mbox/"},{"id":24628,"url":"https://patchwork.plctlab.org/api/1.2/patches/24628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db876775-3e1b-172f-18e3-d593ef766832@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-11-22T23:24:36","name":"[committed] Fix comment typos noticed by Bernhard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db876775-3e1b-172f-18e3-d593ef766832@ventanamicro.com/mbox/"},{"id":24664,"url":"https://patchwork.plctlab.org/api/1.2/patches/24664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com/","msgid":"<4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com>","list_archive_url":null,"date":"2022-11-23T02:54:42","name":"Change the behavior of predicate check failure on cbranchcc4 operand0 in prepare_cmp_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com/mbox/"},{"id":24740,"url":"https://patchwork.plctlab.org/api/1.2/patches/24740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123064934.1560808-1-chenglulu@loongson.cn/","msgid":"<20221123064934.1560808-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-23T06:49:35","name":"[v1] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123064934.1560808-1-chenglulu@loongson.cn/mbox/"},{"id":24752,"url":"https://patchwork.plctlab.org/api/1.2/patches/24752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com/","msgid":"<75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com>","list_archive_url":null,"date":"2022-11-23T07:08:44","name":"Add a new conversion for conditional ternary set into ifcvt [PR106536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com/mbox/"},{"id":24800,"url":"https://patchwork.plctlab.org/api/1.2/patches/24800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33fGGNXV6JNCK1p@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:51:36","name":"diagnostics: Fix selftest ICE in certain locales [PR107722]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33fGGNXV6JNCK1p@tucnak/mbox/"},{"id":24801,"url":"https://patchwork.plctlab.org/api/1.2/patches/24801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33f5EQ0InVdAs3/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:55:00","name":"libstdc++: Fix libstdc++ build on some targets [PR107811]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33f5EQ0InVdAs3/@tucnak/mbox/"},{"id":24802,"url":"https://patchwork.plctlab.org/api/1.2/patches/24802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33hBb0fLsB9QjWU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:59:49","name":"c: Fix compile time hog in c_genericize [PR107127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33hBb0fLsB9QjWU@tucnak/mbox/"},{"id":24826,"url":"https://patchwork.plctlab.org/api/1.2/patches/24826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ac22ef05-6313-23fc-5972-e97b380601fe@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-23T09:40:23","name":"lto: fix usage of timer in materialize_cgraph","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ac22ef05-6313-23fc-5972-e97b380601fe@suse.cz/mbox/"},{"id":24846,"url":"https://patchwork.plctlab.org/api/1.2/patches/24846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123101038.2192550-1-jwakely@redhat.com/","msgid":"<20221123101038.2192550-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-23T10:10:38","name":"doc: -Wdelete-non-virtual-dtor supersedes -Wnon-virtual-dtor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123101038.2192550-1-jwakely@redhat.com/mbox/"},{"id":24847,"url":"https://patchwork.plctlab.org/api/1.2/patches/24847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123102116.2194553-1-jwakely@redhat.com/","msgid":"<20221123102116.2194553-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-23T10:21:16","name":"[committed] libstdc++: Fix unsafe use of dirent::d_name [PR107814]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123102116.2194553-1-jwakely@redhat.com/mbox/"},{"id":24891,"url":"https://patchwork.plctlab.org/api/1.2/patches/24891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3331bxiUwkukHjb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T10:37:09","name":"c-family: Incremental fix for -Wsign-compare BIT_NOT_EXPR handling [PR107465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3331bxiUwkukHjb@tucnak/mbox/"},{"id":24946,"url":"https://patchwork.plctlab.org/api/1.2/patches/24946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123122820.3150670-1-hongtao.liu@intel.com/","msgid":"<20221123122820.3150670-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-23T12:28:20","name":"[x86] Fix incorrect implementation for mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123122820.3150670-1-hongtao.liu@intel.com/mbox/"},{"id":24951,"url":"https://patchwork.plctlab.org/api/1.2/patches/24951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt8hpzro.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-11-23T13:27:07","name":"analyzer: Use __builtin_alloca in gcc.dg/analyzer/call-summaries-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt8hpzro.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":24973,"url":"https://patchwork.plctlab.org/api/1.2/patches/24973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru/","msgid":"<9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru>","list_archive_url":null,"date":"2022-11-23T13:29:46","name":"Make Warray-bounds alias to Warray-bounds= [PR107787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru/mbox/"},{"id":25010,"url":"https://patchwork.plctlab.org/api/1.2/patches/25010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16645-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-23T14:24:44","name":"AArch64 sve2: Fix expansion of division [PR107830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16645-tamar@arm.com/mbox/"},{"id":25279,"url":"https://patchwork.plctlab.org/api/1.2/patches/25279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124012200.103783-1-hongtao.liu@intel.com/","msgid":"<20221124012200.103783-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-24T01:22:00","name":"[v2,x86] Fix incorrect _mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124012200.103783-1-hongtao.liu@intel.com/mbox/"},{"id":25282,"url":"https://patchwork.plctlab.org/api/1.2/patches/25282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-1-dmalcolm@redhat.com/","msgid":"<20221124015203.3367244-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:02","name":"[committed,1/2] analyzer: move known funs for fds to sm-fd.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-1-dmalcolm@redhat.com/mbox/"},{"id":25281,"url":"https://patchwork.plctlab.org/api/1.2/patches/25281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-2-dmalcolm@redhat.com/","msgid":"<20221124015203.3367244-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:03","name":"[committed,2/2] analyzer: eliminate region_model::on_ fns for sockets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-2-dmalcolm@redhat.com/mbox/"},{"id":25284,"url":"https://patchwork.plctlab.org/api/1.2/patches/25284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015221.3367288-1-dmalcolm@redhat.com/","msgid":"<20221124015221.3367288-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:21","name":"[committed] analyzer: fix nondeterminism in logs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015221.3367288-1-dmalcolm@redhat.com/mbox/"},{"id":25283,"url":"https://patchwork.plctlab.org/api/1.2/patches/25283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015233.3367331-1-dmalcolm@redhat.com/","msgid":"<20221124015233.3367331-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:33","name":"[committed] analyzer: revamp of heap-allocated regions [PR106473]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015233.3367331-1-dmalcolm@redhat.com/mbox/"},{"id":25343,"url":"https://patchwork.plctlab.org/api/1.2/patches/25343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e42c1e38-a53e-885d-8e0a-6b4d218c6328@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-24T07:42:43","name":"[(pushed)] analyzer: fix Clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e42c1e38-a53e-885d-8e0a-6b4d218c6328@suse.cz/mbox/"},{"id":25390,"url":"https://patchwork.plctlab.org/api/1.2/patches/25390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3810xiZcwOyI+7f@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:13:55","name":"c++: Don'\''t clear TREE_READONLY for -fmerge-all-constants for non-aggregates [PR107558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3810xiZcwOyI+7f@tucnak/mbox/"},{"id":25396,"url":"https://patchwork.plctlab.org/api/1.2/patches/25396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-2-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-2-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:49","name":"[1/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-2-linkw@linux.ibm.com/mbox/"},{"id":25398,"url":"https://patchwork.plctlab.org/api/1.2/patches/25398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-3-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-3-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:50","name":"[2/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-3-linkw@linux.ibm.com/mbox/"},{"id":25391,"url":"https://patchwork.plctlab.org/api/1.2/patches/25391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-4-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-4-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:51","name":"[3/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-4-linkw@linux.ibm.com/mbox/"},{"id":25399,"url":"https://patchwork.plctlab.org/api/1.2/patches/25399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-5-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-5-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:52","name":"[4/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-5-linkw@linux.ibm.com/mbox/"},{"id":25401,"url":"https://patchwork.plctlab.org/api/1.2/patches/25401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-6-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-6-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:53","name":"[5/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-6-linkw@linux.ibm.com/mbox/"},{"id":25392,"url":"https://patchwork.plctlab.org/api/1.2/patches/25392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-7-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-7-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:54","name":"[6/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-7-linkw@linux.ibm.com/mbox/"},{"id":25397,"url":"https://patchwork.plctlab.org/api/1.2/patches/25397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-8-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-8-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:55","name":"[7/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-8-linkw@linux.ibm.com/mbox/"},{"id":25402,"url":"https://patchwork.plctlab.org/api/1.2/patches/25402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-9-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-9-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:56","name":"[8/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-9-linkw@linux.ibm.com/mbox/"},{"id":25393,"url":"https://patchwork.plctlab.org/api/1.2/patches/25393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-10-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-10-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:57","name":"[9/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-10-linkw@linux.ibm.com/mbox/"},{"id":25400,"url":"https://patchwork.plctlab.org/api/1.2/patches/25400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y383ZmQYu/NFCmpI@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:20:38","name":"libstdc++: Workaround buggy printf on Solaris in to_chars/float128_c++23.cc test [PR107815]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y383ZmQYu/NFCmpI@tucnak/mbox/"},{"id":25403,"url":"https://patchwork.plctlab.org/api/1.2/patches/25403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384D/1PiDqjqBdt@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:23:27","name":"libstdc++: Another merge from fast_float upstream [PR107468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384D/1PiDqjqBdt@tucnak/mbox/"},{"id":25404,"url":"https://patchwork.plctlab.org/api/1.2/patches/25404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384/VPTaUH2+Bi5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:27:25","name":"asan: Fix up error recovery for too large frames [PR107317]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384/VPTaUH2+Bi5@tucnak/mbox/"},{"id":25405,"url":"https://patchwork.plctlab.org/api/1.2/patches/25405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y387Ra+X63ssy1UG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:37:09","name":"[committed] testsuite: Fix up broken testcase [PR107127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y387Ra+X63ssy1UG@tucnak/mbox/"},{"id":25409,"url":"https://patchwork.plctlab.org/api/1.2/patches/25409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124094148.125303-1-guojiufu@linux.ibm.com/","msgid":"<20221124094148.125303-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:41:48","name":"[V2] Update block move for struct param or returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124094148.125303-1-guojiufu@linux.ibm.com/mbox/"},{"id":25420,"url":"https://patchwork.plctlab.org/api/1.2/patches/25420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101245.445226-1-poulhies@adacore.com/","msgid":"<20221124101245.445226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-24T10:12:45","name":"[COMMITTED] ada: Spurious error on Lock_Free protected type with discriminants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101245.445226-1-poulhies@adacore.com/mbox/"},{"id":25421,"url":"https://patchwork.plctlab.org/api/1.2/patches/25421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101258.445328-1-poulhies@adacore.com/","msgid":"<20221124101258.445328-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-24T10:12:58","name":"[COMMITTED] ada: Add assertion for the implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101258.445328-1-poulhies@adacore.com/mbox/"},{"id":25442,"url":"https://patchwork.plctlab.org/api/1.2/patches/25442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y39OUfw+3mJJirzf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T10:58:25","name":"[committed] c++: Further -fcontract* option description fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y39OUfw+3mJJirzf@tucnak/mbox/"},{"id":25585,"url":"https://patchwork.plctlab.org/api/1.2/patches/25585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrwn7kv2dv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-24T14:43:56","name":"[35/35,V2] arm: improve tests for vsetq_lane*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrwn7kv2dv.fsf_-_@arm.com/mbox/"},{"id":25657,"url":"https://patchwork.plctlab.org/api/1.2/patches/25657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com/","msgid":"<64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com>","list_archive_url":null,"date":"2022-11-24T17:48:01","name":"libgomp: Add no-target-region rev offload test + fix plugin-nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com/mbox/"},{"id":25696,"url":"https://patchwork.plctlab.org/api/1.2/patches/25696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com/","msgid":"<5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com>","list_archive_url":null,"date":"2022-11-24T20:43:34","name":"gcc/jit/jit-recording.cc: recording::global::write_to_dump: Avoid crashes when writing psuedo-C for globals with string initializers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com/mbox/"},{"id":25765,"url":"https://patchwork.plctlab.org/api/1.2/patches/25765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002131.41071-1-jwakely@redhat.com/","msgid":"<20221125002131.41071-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T00:21:31","name":"[committed] libstdc++: Update tests on trunk [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002131.41071-1-jwakely@redhat.com/mbox/"},{"id":25766,"url":"https://patchwork.plctlab.org/api/1.2/patches/25766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002356.42216-1-jwakely@redhat.com/","msgid":"<20221125002356.42216-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T00:23:56","name":"[committed] libstdc++: Change return type of std::bit_width to int (LWG 3656)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002356.42216-1-jwakely@redhat.com/mbox/"},{"id":25781,"url":"https://patchwork.plctlab.org/api/1.2/patches/25781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f57923-175a-82ca-5c0f-769ac916647d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-25T02:13:38","name":"[OpenMP] GC unused SIMD clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f57923-175a-82ca-5c0f-769ac916647d@codesourcery.com/mbox/"},{"id":25824,"url":"https://patchwork.plctlab.org/api/1.2/patches/25824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125053904.1984263-1-hongtao.liu@intel.com/","msgid":"<20221125053904.1984263-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-25T05:39:04","name":"[V3,x86] Fix incorrect _mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125053904.1984263-1-hongtao.liu@intel.com/mbox/"},{"id":25872,"url":"https://patchwork.plctlab.org/api/1.2/patches/25872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075921.0706813A08@imap2.suse-dmz.suse.de/","msgid":"<20221125075921.0706813A08@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-25T07:59:20","name":"tree-optimization/107865 - ICE with outlining of loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075921.0706813A08@imap2.suse-dmz.suse.de/mbox/"},{"id":25873,"url":"https://patchwork.plctlab.org/api/1.2/patches/25873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075944.7DA6713A08@imap2.suse-dmz.suse.de/","msgid":"<20221125075944.7DA6713A08@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-25T07:59:44","name":"tree-optimization/106912 - IPA profile and pure/const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075944.7DA6713A08@imap2.suse-dmz.suse.de/mbox/"},{"id":25883,"url":"https://patchwork.plctlab.org/api/1.2/patches/25883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12106563.O9o76ZdvQC@fomalhaut/","msgid":"<12106563.O9o76ZdvQC@fomalhaut>","list_archive_url":null,"date":"2022-11-25T09:21:52","name":"Fix thinko in operator_bitwise_xor::op1_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12106563.O9o76ZdvQC@fomalhaut/mbox/"},{"id":25915,"url":"https://patchwork.plctlab.org/api/1.2/patches/25915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com/","msgid":"<78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com>","list_archive_url":null,"date":"2022-11-25T10:34:35","name":"libgomp.texi: OpenMP Impl Status 5.1 additions + TR11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com/mbox/"},{"id":25930,"url":"https://patchwork.plctlab.org/api/1.2/patches/25930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9bl28f.fsf@euler.schwinge.homeip.net/","msgid":"<87cz9bl28f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-25T11:09:36","name":"[PING] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9bl28f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":25994,"url":"https://patchwork.plctlab.org/api/1.2/patches/25994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68f00ea-199b-2980-0ae6-df53da370a5c@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-25T12:57:35","name":"i386: fix assert (__builtin_cpu_supports (\"x86-64\") >= 0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68f00ea-199b-2980-0ae6-df53da370a5c@suse.cz/mbox/"},{"id":26022,"url":"https://patchwork.plctlab.org/api/1.2/patches/26022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4DM8FVKsEnXonyu@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-11-25T14:10:56","name":"Fix resolution streaming with incremental linking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4DM8FVKsEnXonyu@kam.mff.cuni.cz/mbox/"},{"id":26027,"url":"https://patchwork.plctlab.org/api/1.2/patches/26027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125143229.3232391-1-rearnsha@arm.com/","msgid":"<20221125143229.3232391-1-rearnsha@arm.com>","list_archive_url":null,"date":"2022-11-25T14:32:29","name":"sync libsframe toplevel from binutils-gdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125143229.3232391-1-rearnsha@arm.com/mbox/"},{"id":26058,"url":"https://patchwork.plctlab.org/api/1.2/patches/26058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150804.128740-1-jwakely@redhat.com/","msgid":"<20221125150804.128740-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:04","name":"[committed] libstdc++: Add always_inline to trivial iterator operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150804.128740-1-jwakely@redhat.com/mbox/"},{"id":26059,"url":"https://patchwork.plctlab.org/api/1.2/patches/26059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150816.128776-1-jwakely@redhat.com/","msgid":"<20221125150816.128776-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:16","name":"[committed] libstdc++: Do not define operator!= in for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150816.128776-1-jwakely@redhat.com/mbox/"},{"id":26063,"url":"https://patchwork.plctlab.org/api/1.2/patches/26063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150830.128794-1-jwakely@redhat.com/","msgid":"<20221125150830.128794-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:30","name":"[committed] libstdc++: Call predicate with non-const values in std::erase_if [PR107850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150830.128794-1-jwakely@redhat.com/mbox/"},{"id":26065,"url":"https://patchwork.plctlab.org/api/1.2/patches/26065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150839.128831-1-jwakely@redhat.com/","msgid":"<20221125150839.128831-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:39","name":"[committed] libstdc++: Fix orphaned/nested output of configure checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150839.128831-1-jwakely@redhat.com/mbox/"},{"id":26088,"url":"https://patchwork.plctlab.org/api/1.2/patches/26088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125160639.43024-1-juzhe.zhong@rivai.ai/","msgid":"<20221125160639.43024-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-25T16:06:39","name":"RISC-V: Add duplicate vector support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125160639.43024-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26278,"url":"https://patchwork.plctlab.org/api/1.2/patches/26278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669480898-21885-1-git-send-email-apinski@marvell.com/","msgid":"<1669480898-21885-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-26T16:41:38","name":"tree-optimization/103356 Add missing (~a) == b folding for _Bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669480898-21885-1-git-send-email-apinski@marvell.com/mbox/"},{"id":26306,"url":"https://patchwork.plctlab.org/api/1.2/patches/26306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127021613.432881-1-softwaresale01@gmail.com/","msgid":"<20221127021613.432881-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2022-11-27T02:16:13","name":"rtl: add predicates for addition, subtraction & multiplication","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127021613.432881-1-softwaresale01@gmail.com/mbox/"},{"id":26383,"url":"https://patchwork.plctlab.org/api/1.2/patches/26383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127170256.3803408-1-christoph.muellner@vrull.eu/","msgid":"<20221127170256.3803408-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-27T17:02:56","name":"[v2] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127170256.3803408-1-christoph.muellner@vrull.eu/mbox/"},{"id":26410,"url":"https://patchwork.plctlab.org/api/1.2/patches/26410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2d7545f7-09e7-44d8-ba71-166690b820a8-1669581157254@3c-app-gmx-bap47/","msgid":"","list_archive_url":null,"date":"2022-11-27T20:32:37","name":"Fortran: ICE with elemental and dummy argument with VALUE attribute [PR107819]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2d7545f7-09e7-44d8-ba71-166690b820a8-1669581157254@3c-app-gmx-bap47/mbox/"},{"id":26457,"url":"https://patchwork.plctlab.org/api/1.2/patches/26457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128021428.13824-1-wangfeng@eswincomputing.com/","msgid":"<20221128021428.13824-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T02:14:28","name":"RISC-V: Support the ins \"rol\" with immediate operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128021428.13824-1-wangfeng@eswincomputing.com/mbox/"},{"id":26511,"url":"https://patchwork.plctlab.org/api/1.2/patches/26511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052829.36087-2-gaofei@eswincomputing.com/","msgid":"<20221128052829.36087-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T05:28:29","name":"[1/1] RISC-V: fix stack access before allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052829.36087-2-gaofei@eswincomputing.com/mbox/"},{"id":26512,"url":"https://patchwork.plctlab.org/api/1.2/patches/26512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052904.36217-2-gaofei@eswincomputing.com/","msgid":"<20221128052904.36217-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T05:29:04","name":"[1/1] RISC-V: fix stack access before allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052904.36217-2-gaofei@eswincomputing.com/mbox/"},{"id":26524,"url":"https://patchwork.plctlab.org/api/1.2/patches/26524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/323b61ce-7027-bad3-a061-c198d7268a22@gmail.com/","msgid":"<323b61ce-7027-bad3-a061-c198d7268a22@gmail.com>","list_archive_url":null,"date":"2022-11-28T06:01:22","name":"[_GLIBCXX_INLINE_VERSION] Adapt dg error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/323b61ce-7027-bad3-a061-c198d7268a22@gmail.com/mbox/"},{"id":26525,"url":"https://patchwork.plctlab.org/api/1.2/patches/26525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd8a96c6-216d-d774-8356-dad6c9150f15@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-28T06:07:07","name":"[_GLIBCXX_INLINE_VERSION] Adapt to_chars/from_chars symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd8a96c6-216d-d774-8356-dad6c9150f15@gmail.com/mbox/"},{"id":26574,"url":"https://patchwork.plctlab.org/api/1.2/patches/26574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com/","msgid":"<54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com>","list_archive_url":null,"date":"2022-11-28T07:40:47","name":"gcn: Fix __builtin_gcn_first_call_this_thread_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com/mbox/"},{"id":26575,"url":"https://patchwork.plctlab.org/api/1.2/patches/26575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128075944.239B11326E@imap2.suse-dmz.suse.de/","msgid":"<20221128075944.239B11326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T07:59:43","name":"tree-optimization/107867 - failed abnormal cleanup in forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128075944.239B11326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26582,"url":"https://patchwork.plctlab.org/api/1.2/patches/26582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4R1agyRgguWCyfT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-28T08:46:34","name":"i386: Fix up ix86_abi handling [PR106875]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4R1agyRgguWCyfT@tucnak/mbox/"},{"id":26585,"url":"https://patchwork.plctlab.org/api/1.2/patches/26585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128090434.44F5E13273@imap2.suse-dmz.suse.de/","msgid":"<20221128090434.44F5E13273@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T09:04:33","name":"tree-optimization/107876 - unswitching of switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128090434.44F5E13273@imap2.suse-dmz.suse.de/mbox/"},{"id":26608,"url":"https://patchwork.plctlab.org/api/1.2/patches/26608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128101653.0419F1326E@imap2.suse-dmz.suse.de/","msgid":"<20221128101653.0419F1326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T10:16:52","name":"tree-optimization/107493 - SCEV analysis with conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128101653.0419F1326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26655,"url":"https://patchwork.plctlab.org/api/1.2/patches/26655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5da61567-b5de-48db-83e0-d50da3d39520-1669636551837@3c-app-webde-bs19/","msgid":"","list_archive_url":null,"date":"2022-11-28T11:55:51","name":"coroutines: Fix promotion of class members in co_await statements [PR99576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5da61567-b5de-48db-83e0-d50da3d39520-1669636551837@3c-app-webde-bs19/mbox/"},{"id":26711,"url":"https://patchwork.plctlab.org/api/1.2/patches/26711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120437.171358-1-poulhies@adacore.com/","msgid":"<20221128120437.171358-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:37","name":"[COMMITTED] ada: Implement change to SPARK RM rule on state refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120437.171358-1-poulhies@adacore.com/mbox/"},{"id":26716,"url":"https://patchwork.plctlab.org/api/1.2/patches/26716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120451.171477-1-poulhies@adacore.com/","msgid":"<20221128120451.171477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:51","name":"[COMMITTED] ada: Add PIE support to backtraces on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120451.171477-1-poulhies@adacore.com/mbox/"},{"id":26713,"url":"https://patchwork.plctlab.org/api/1.2/patches/26713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120458.171543-1-poulhies@adacore.com/","msgid":"<20221128120458.171543-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:58","name":"[COMMITTED] ada: Fix internal error on conversion as in/out actual with -gnatVa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120458.171543-1-poulhies@adacore.com/mbox/"},{"id":26714,"url":"https://patchwork.plctlab.org/api/1.2/patches/26714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120506.171614-1-poulhies@adacore.com/","msgid":"<20221128120506.171614-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:06","name":"[COMMITTED] ada: Annotate GNAT.Source_Info with an abstract state","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120506.171614-1-poulhies@adacore.com/mbox/"},{"id":26717,"url":"https://patchwork.plctlab.org/api/1.2/patches/26717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120524.171679-1-poulhies@adacore.com/","msgid":"<20221128120524.171679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:24","name":"[COMMITTED] ada: doc/share/conf.py: Switch the HTML documentation to using the RTD theme","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120524.171679-1-poulhies@adacore.com/mbox/"},{"id":26718,"url":"https://patchwork.plctlab.org/api/1.2/patches/26718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120535.171749-1-poulhies@adacore.com/","msgid":"<20221128120535.171749-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:35","name":"[COMMITTED] ada: Adjust runtime library and User'\''s Guide to PIE default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120535.171749-1-poulhies@adacore.com/mbox/"},{"id":26724,"url":"https://patchwork.plctlab.org/api/1.2/patches/26724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0b14a63-ec38-89bc-5c0b-da87c3b28390@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-28T12:13:22","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0b14a63-ec38-89bc-5c0b-da87c3b28390@arm.com/mbox/"},{"id":26741,"url":"https://patchwork.plctlab.org/api/1.2/patches/26741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128130539.2124727-1-hongtao.liu@intel.com/","msgid":"<20221128130539.2124727-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-28T13:05:39","name":"[x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128130539.2124727-1-hongtao.liu@intel.com/mbox/"},{"id":26781,"url":"https://patchwork.plctlab.org/api/1.2/patches/26781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128135914.4068410-1-joakim@nohlgard.se/","msgid":"<20221128135914.4068410-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-11-28T13:59:14","name":"gcc: Use ld -r when checking for HAVE_LD_RO_RW_SECTION_MIXING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128135914.4068410-1-joakim@nohlgard.se/mbox/"},{"id":26782,"url":"https://patchwork.plctlab.org/api/1.2/patches/26782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128140251.4076484-1-joakim@nohlgard.se/","msgid":"<20221128140251.4076484-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-11-28T14:02:51","name":"c++: Fall back to global cpp spec if CPLUSPLUS_CPP_SPEC is not defined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128140251.4076484-1-joakim@nohlgard.se/mbox/"},{"id":26797,"url":"https://patchwork.plctlab.org/api/1.2/patches/26797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128141406.242953-1-juzhe.zhong@rivai.ai/","msgid":"<20221128141406.242953-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-28T14:14:06","name":"RISC-V: Add attributes for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128141406.242953-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26798,"url":"https://patchwork.plctlab.org/api/1.2/patches/26798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128142116.245036-1-juzhe.zhong@rivai.ai/","msgid":"<20221128142116.245036-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-28T14:21:16","name":"RISC-V: Remove tail && mask policy operand for vmclr, vmset, vmld, vmst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128142116.245036-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26811,"url":"https://patchwork.plctlab.org/api/1.2/patches/26811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152003.41709-1-jwakely@redhat.com/","msgid":"<20221128152003.41709-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T15:20:03","name":"[committed] libstdc++: Make 16-bit std::subtract_with_carry_engine work [PR107466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152003.41709-1-jwakely@redhat.com/mbox/"},{"id":26812,"url":"https://patchwork.plctlab.org/api/1.2/patches/26812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152015.41760-1-jwakely@redhat.com/","msgid":"<20221128152015.41760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T15:20:15","name":"[committed] libstdc++: Prune versioned namespace from testsuite output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152015.41760-1-jwakely@redhat.com/mbox/"},{"id":26875,"url":"https://patchwork.plctlab.org/api/1.2/patches/26875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170005.61262-1-jwakely@redhat.com/","msgid":"<20221128170005.61262-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:05","name":"[committed] libstdc++: Fix _Hash_bytes for I16LP32 targets [PR107885]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170005.61262-1-jwakely@redhat.com/mbox/"},{"id":26877,"url":"https://patchwork.plctlab.org/api/1.2/patches/26877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170020.61434-1-jwakely@redhat.com/","msgid":"<20221128170020.61434-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:20","name":"[committed] libstdc++: Fix std::string_view for I32LP16 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170020.61434-1-jwakely@redhat.com/mbox/"},{"id":26876,"url":"https://patchwork.plctlab.org/api/1.2/patches/26876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170028.61462-1-jwakely@redhat.com/","msgid":"<20221128170028.61462-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:28","name":"[committed] libstdc++: Fix src/c++17/memory_resource for H8 targets [PR107801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170028.61462-1-jwakely@redhat.com/mbox/"},{"id":26902,"url":"https://patchwork.plctlab.org/api/1.2/patches/26902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211281635580.463@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-28T17:44:05","name":"[v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211281635580.463@tpp.orcam.me.uk/mbox/"},{"id":26914,"url":"https://patchwork.plctlab.org/api/1.2/patches/26914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128184057.3FF501326E@imap2.suse-dmz.suse.de/","msgid":"<20221128184057.3FF501326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T18:40:56","name":"tree-optimization/107896 - allow v2si to dimode unpacks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128184057.3FF501326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26944,"url":"https://patchwork.plctlab.org/api/1.2/patches/26944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2ce9e1a0-ad68-4fad-8953-6b51b5cfb9de-1669665943770@3c-app-gmx-bs02/","msgid":"","list_archive_url":null,"date":"2022-11-28T20:05:43","name":"Fortran: intrinsic MERGE shall use all its arguments [PR107874]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2ce9e1a0-ad68-4fad-8953-6b51b5cfb9de-1669665943770@3c-app-gmx-bs02/mbox/"},{"id":26945,"url":"https://patchwork.plctlab.org/api/1.2/patches/26945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669666345-28322-1-git-send-email-apinski@marvell.com/","msgid":"<1669666345-28322-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-28T20:12:25","name":"[COMMITTED] Fix comment for (A / (1 << B)) -> (A >> B).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669666345-28322-1-git-send-email-apinski@marvell.com/mbox/"},{"id":26946,"url":"https://patchwork.plctlab.org/api/1.2/patches/26946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128201647.484582-1-ppalka@redhat.com/","msgid":"<20221128201647.484582-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:16:47","name":"c++: explicit specialization and trailing requirements [PR107864]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128201647.484582-1-ppalka@redhat.com/mbox/"},{"id":26953,"url":"https://patchwork.plctlab.org/api/1.2/patches/26953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205142.541060-1-jason@redhat.com/","msgid":"<20221128205142.541060-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:51:42","name":"[pushed] c++: be more strict about '\''concept bool'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205142.541060-1-jason@redhat.com/mbox/"},{"id":26954,"url":"https://patchwork.plctlab.org/api/1.2/patches/26954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205236.541407-1-jason@redhat.com/","msgid":"<20221128205236.541407-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:52:36","name":"[pushed] c++: simple-requirement starting with '\''typename'\'' [PR101733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205236.541407-1-jason@redhat.com/mbox/"},{"id":26956,"url":"https://patchwork.plctlab.org/api/1.2/patches/26956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128212211.940206-1-ppalka@redhat.com/","msgid":"<20221128212211.940206-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-28T21:22:11","name":"c++: TYPENAME_TYPE lookup ignoring non-types [PR107773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128212211.940206-1-ppalka@redhat.com/mbox/"},{"id":26958,"url":"https://patchwork.plctlab.org/api/1.2/patches/26958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128213725.13926-1-palmer@rivosinc.com/","msgid":"<20221128213725.13926-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-28T21:37:25","name":"RISC-V: Fix up some wording in the mcpu/mtune comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128213725.13926-1-palmer@rivosinc.com/mbox/"},{"id":26991,"url":"https://patchwork.plctlab.org/api/1.2/patches/26991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-2-jcmvbkbc@gmail.com/","msgid":"<20221129004551.2213723-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-29T00:45:50","name":"[v2,1/2] gcc: xtensa: allow dynamic configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-2-jcmvbkbc@gmail.com/mbox/"},{"id":26990,"url":"https://patchwork.plctlab.org/api/1.2/patches/26990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-3-jcmvbkbc@gmail.com/","msgid":"<20221129004551.2213723-3-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-29T00:45:51","name":"[v2,2/2] libgcc: xtensa: use built-in configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-3-jcmvbkbc@gmail.com/mbox/"},{"id":27009,"url":"https://patchwork.plctlab.org/api/1.2/patches/27009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129012201.76355-1-juzhe.zhong@rivai.ai/","msgid":"<20221129012201.76355-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-29T01:22:01","name":"RISC-V: Remove tail && mask policy operand for vmclr, vmset, vmld, vmst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129012201.76355-1-juzhe.zhong@rivai.ai/mbox/"},{"id":27113,"url":"https://patchwork.plctlab.org/api/1.2/patches/27113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88ad246-a3b6-8f33-0cfd-98513928326a@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-29T08:34:54","name":"[(pushed)] re-run configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88ad246-a3b6-8f33-0cfd-98513928326a@suse.cz/mbox/"},{"id":27123,"url":"https://patchwork.plctlab.org/api/1.2/patches/27123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092511.5E60613428@imap2.suse-dmz.suse.de/","msgid":"<20221129092511.5E60613428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T09:25:11","name":"tree-optimization/107898 - ICE with -Walloca-larger-than","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092511.5E60613428@imap2.suse-dmz.suse.de/mbox/"},{"id":27124,"url":"https://patchwork.plctlab.org/api/1.2/patches/27124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092523.7E43313428@imap2.suse-dmz.suse.de/","msgid":"<20221129092523.7E43313428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T09:25:23","name":"ipa/107897 - avoid property verification ICE after error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092523.7E43313428@imap2.suse-dmz.suse.de/mbox/"},{"id":27128,"url":"https://patchwork.plctlab.org/api/1.2/patches/27128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4XUPYRb92sFBZk4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T09:43:25","name":"range-op-float: Fix up multiplication and division reverse operation [PR107879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4XUPYRb92sFBZk4@tucnak/mbox/"},{"id":27138,"url":"https://patchwork.plctlab.org/api/1.2/patches/27138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129100446.3875697-1-manolis.tsamis@vrull.eu/","msgid":"<20221129100446.3875697-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-11-29T10:04:46","name":"[v2] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129100446.3875697-1-manolis.tsamis@vrull.eu/mbox/"},{"id":27169,"url":"https://patchwork.plctlab.org/api/1.2/patches/27169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3202323.aeNJFYEL58@fomalhaut/","msgid":"<3202323.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2022-11-29T10:47:21","name":"Fix PR ada/107810","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3202323.aeNJFYEL58@fomalhaut/mbox/"},{"id":27202,"url":"https://patchwork.plctlab.org/api/1.2/patches/27202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129115910.9268213428@imap2.suse-dmz.suse.de/","msgid":"<20221129115910.9268213428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T11:59:10","name":"tree-optimization/106995 - if-conversion and vanishing loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129115910.9268213428@imap2.suse-dmz.suse.de/mbox/"},{"id":27212,"url":"https://patchwork.plctlab.org/api/1.2/patches/27212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X551/z9F08wuCL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T12:24:07","name":"c++: Deduce range for structured bindings if expression is not type dependent [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X551/z9F08wuCL@tucnak/mbox/"},{"id":27214,"url":"https://patchwork.plctlab.org/api/1.2/patches/27214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X70nKAHnZLUNVa@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T12:32:18","name":"c++: Incremental fix for g++.dg/gomp/for-21.C [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X70nKAHnZLUNVa@tucnak/mbox/"},{"id":27234,"url":"https://patchwork.plctlab.org/api/1.2/patches/27234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de/","msgid":"<20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T13:30:22","name":"tree-optimization/107852 - missed optimization with PHIs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de/mbox/"},{"id":27243,"url":"https://patchwork.plctlab.org/api/1.2/patches/27243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-1-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:05","name":"[1/3] Use sub mode to move block for struct parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-1-guojiufu@linux.ibm.com/mbox/"},{"id":27244,"url":"https://patchwork.plctlab.org/api/1.2/patches/27244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-2-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:06","name":"[2/3] Use sub mode to move block for struct returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-2-guojiufu@linux.ibm.com/mbox/"},{"id":27245,"url":"https://patchwork.plctlab.org/api/1.2/patches/27245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-3-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:07","name":"[3/3] Testcases for move sub blocks on param and ret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-3-guojiufu@linux.ibm.com/mbox/"},{"id":27249,"url":"https://patchwork.plctlab.org/api/1.2/patches/27249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-1-christophe.lyon@arm.com/","msgid":"<20221129134728.242212-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-29T13:47:27","name":"[v2,1/2] aarch64: fix warning emission for ABI break since GCC 9.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-1-christophe.lyon@arm.com/mbox/"},{"id":27247,"url":"https://patchwork.plctlab.org/api/1.2/patches/27247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-2-christophe.lyon@arm.com/","msgid":"<20221129134728.242212-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-29T13:47:28","name":"[v2,2/2] aarch64: Fix bit-field alignment in param passing [PR105549]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-2-christophe.lyon@arm.com/mbox/"},{"id":27281,"url":"https://patchwork.plctlab.org/api/1.2/patches/27281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=0mHW4Aw2u-Kksy=OV5KY-G7_CW+mrT1QKPyKMrBi80g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-29T14:39:07","name":"[aarch64] Use dup and zip1 for interleaving elements in initializing vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=0mHW4Aw2u-Kksy=OV5KY-G7_CW+mrT1QKPyKMrBi80g@mail.gmail.com/mbox/"},{"id":27299,"url":"https://patchwork.plctlab.org/api/1.2/patches/27299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129153945.144056-1-jwakely@redhat.com/","msgid":"<20221129153945.144056-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T15:39:45","name":"[committed] libstdc++: Do not use __used or __packed as identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129153945.144056-1-jwakely@redhat.com/mbox/"},{"id":27310,"url":"https://patchwork.plctlab.org/api/1.2/patches/27310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd63de7d-171c-bc9b-a3c5-5a3254c1c8a2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-29T15:56:21","name":"amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd63de7d-171c-bc9b-a3c5-5a3254c1c8a2@codesourcery.com/mbox/"},{"id":27384,"url":"https://patchwork.plctlab.org/api/1.2/patches/27384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171432.149718-1-jwakely@redhat.com/","msgid":"<20221129171432.149718-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T17:14:32","name":"[committed] libstdc++: Remove unnecessary tag dispatching in std::vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171432.149718-1-jwakely@redhat.com/mbox/"},{"id":27385,"url":"https://patchwork.plctlab.org/api/1.2/patches/27385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171446.149751-1-jwakely@redhat.com/","msgid":"<20221129171446.149751-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T17:14:46","name":"[committed] libstdc++: Avoid bogus warning in std::vector::insert [PR107852]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171446.149751-1-jwakely@redhat.com/mbox/"},{"id":27387,"url":"https://patchwork.plctlab.org/api/1.2/patches/27387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129174331.3124-1-soeren@soeren-tempel.net/","msgid":"<20221129174331.3124-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-11-29T17:43:31","name":"libgo: Don'\''t rely on GNU-specific strerror_r variant on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129174331.3124-1-soeren@soeren-tempel.net/mbox/"},{"id":27391,"url":"https://patchwork.plctlab.org/api/1.2/patches/27391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129175453.3644-1-soeren@soeren-tempel.net/","msgid":"<20221129175453.3644-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-11-29T17:54:53","name":"[v2] libgo: Don'\''t rely on GNU-specific strerror_r variant on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129175453.3644-1-soeren@soeren-tempel.net/mbox/"},{"id":27393,"url":"https://patchwork.plctlab.org/api/1.2/patches/27393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com/","msgid":"<9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com>","list_archive_url":null,"date":"2022-11-29T18:26:07","name":"libgomp.texi: List GCN'\''s '\''gfx803'\'' under OpenMP Context Selectors (was: amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com/mbox/"},{"id":27482,"url":"https://patchwork.plctlab.org/api/1.2/patches/27482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129200322.1544250-1-ppalka@redhat.com/","msgid":"<20221129200322.1544250-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-29T20:03:22","name":"c++: ICE with <=> of incompatible pointers [PR107542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129200322.1544250-1-ppalka@redhat.com/mbox/"},{"id":27519,"url":"https://patchwork.plctlab.org/api/1.2/patches/27519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de/","msgid":"<776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de>","list_archive_url":null,"date":"2022-11-29T21:48:13","name":"libstdc++: Add error handler for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de/mbox/"},{"id":27558,"url":"https://patchwork.plctlab.org/api/1.2/patches/27558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010722.3663721-1-dmalcolm@redhat.com/","msgid":"<20221130010722.3663721-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:22","name":"[committed] analyzer: fix folding of '\''(PTR + 0) => PTR'\'' [PR105784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010722.3663721-1-dmalcolm@redhat.com/mbox/"},{"id":27560,"url":"https://patchwork.plctlab.org/api/1.2/patches/27560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010736.3663768-1-dmalcolm@redhat.com/","msgid":"<20221130010736.3663768-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:36","name":"[committed] analyzer work on issues with flex-generated lexers [PR103546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010736.3663768-1-dmalcolm@redhat.com/mbox/"},{"id":27559,"url":"https://patchwork.plctlab.org/api/1.2/patches/27559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010751.3663828-1-dmalcolm@redhat.com/","msgid":"<20221130010751.3663828-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:51","name":"[committed] analyzer: move stdio known fns to sm-file.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010751.3663828-1-dmalcolm@redhat.com/mbox/"},{"id":27567,"url":"https://patchwork.plctlab.org/api/1.2/patches/27567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130022152.190824-1-guojiufu@linux.ibm.com/","msgid":"<20221130022152.190824-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-30T02:21:52","name":"NFC: use more readable pattern to clean high 32 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130022152.190824-1-guojiufu@linux.ibm.com/mbox/"},{"id":27596,"url":"https://patchwork.plctlab.org/api/1.2/patches/27596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130052114.10229-1-hongtao.liu@intel.com/","msgid":"<20221130052114.10229-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-30T05:21:14","name":"[1/2,V2] Implement hwasan target_hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130052114.10229-1-hongtao.liu@intel.com/mbox/"},{"id":27621,"url":"https://patchwork.plctlab.org/api/1.2/patches/27621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz94q3db.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-11-30T07:59:44","name":"[PR107304] note test'\''s ifunc requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz94q3db.fsf@lxoliva.fsfla.org/mbox/"},{"id":27671,"url":"https://patchwork.plctlab.org/api/1.2/patches/27671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com/","msgid":"<009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com>","list_archive_url":null,"date":"2022-11-30T08:30:13","name":"rs6000: Fix some issues related to Power10 fusion [PR104024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com/mbox/"},{"id":27672,"url":"https://patchwork.plctlab.org/api/1.2/patches/27672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbef44d3-fc72-ca13-d29c-2635e8b9d7b1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T08:30:44","name":"[v2] predict: Adjust optimize_function_for_size_p [PR105818]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbef44d3-fc72-ca13-d29c-2635e8b9d7b1@linux.ibm.com/mbox/"},{"id":27674,"url":"https://patchwork.plctlab.org/api/1.2/patches/27674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130083717.14438-1-gaofei@eswincomputing.com/","msgid":"<20221130083717.14438-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-30T08:37:17","name":"RISC-V: optimize stack manipulation in save-restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130083717.14438-1-gaofei@eswincomputing.com/mbox/"},{"id":27706,"url":"https://patchwork.plctlab.org/api/1.2/patches/27706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4cmlqFFMt3p7Nz8@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-30T09:47:02","name":"tree-chrec: Fix up ICE on pointer multiplication [PR107835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4cmlqFFMt3p7Nz8@tucnak/mbox/"},{"id":27708,"url":"https://patchwork.plctlab.org/api/1.2/patches/27708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4co5oszzPoXjjkU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-30T09:56:54","name":"c-family: Account for integral promotions of left shifts for -Wshift-overflow warning [PR107846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4co5oszzPoXjjkU@tucnak/mbox/"},{"id":27740,"url":"https://patchwork.plctlab.org/api/1.2/patches/27740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130110030.9E7981331F@imap2.suse-dmz.suse.de/","msgid":"<20221130110030.9E7981331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:00:30","name":"tree-optimization/107919 - uninit diagnostic predicate simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130110030.9E7981331F@imap2.suse-dmz.suse.de/mbox/"},{"id":27760,"url":"https://patchwork.plctlab.org/api/1.2/patches/27760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115247.C39A113A70@imap2.suse-dmz.suse.de/","msgid":"<20221130115247.C39A113A70@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:52:47","name":"Improve uninit diagnostic dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115247.C39A113A70@imap2.suse-dmz.suse.de/mbox/"},{"id":27761,"url":"https://patchwork.plctlab.org/api/1.2/patches/27761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115302.8394013A70@imap2.suse-dmz.suse.de/","msgid":"<20221130115302.8394013A70@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:53:02","name":"tree-optimization/107919 - predicate simplification in uninit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115302.8394013A70@imap2.suse-dmz.suse.de/mbox/"},{"id":27773,"url":"https://patchwork.plctlab.org/api/1.2/patches/27773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com/","msgid":"<8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-11-30T12:44:26","name":"[1/7] OpenMP/OpenACC: Refine condition for when map clause expansion happens","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com/mbox/"},{"id":27774,"url":"https://patchwork.plctlab.org/api/1.2/patches/27774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f32cb0d7aa424d6fcfbeeb75987bf1101de520d1.1669808721.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T12:44:27","name":"[2/2] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f32cb0d7aa424d6fcfbeeb75987bf1101de520d1.1669808721.git.julian@codesourcery.com/mbox/"},{"id":27804,"url":"https://patchwork.plctlab.org/api/1.2/patches/27804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz/","msgid":"<13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz>","list_archive_url":null,"date":"2022-11-30T13:47:39","name":"[(pushed)] fix Clang warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/mbox/"},{"id":11,"url":"https://patchwork.plctlab.org/api/1.2/bundles/11/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-12/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-12","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":27857,"url":"https://patchwork.plctlab.org/api/1.2/patches/27857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e929111e-d5f2-8ed3-c3ec-f1280615d8fc@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T15:32:06","name":"[OG12] amdgcn: Support AMD-specific '\''isa'\'' and '\''arch'\'' traits in OpenMP context selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e929111e-d5f2-8ed3-c3ec-f1280615d8fc@codesourcery.com/mbox/"},{"id":27918,"url":"https://patchwork.plctlab.org/api/1.2/patches/27918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130171314.323962-1-ibuclaw@gdcproject.org/","msgid":"<20221130171314.323962-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T17:13:14","name":"[committed] d: Fix ICE on named continue label in an unrolled loop [PR107592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130171314.323962-1-ibuclaw@gdcproject.org/mbox/"},{"id":27919,"url":"https://patchwork.plctlab.org/api/1.2/patches/27919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-1-git-send-email-apinski@marvell.com/","msgid":"<1669828695-18532-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-30T17:18:14","name":"[1/2] Fix C/107926: Wrong error message when initializing char array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-1-git-send-email-apinski@marvell.com/mbox/"},{"id":27920,"url":"https://patchwork.plctlab.org/api/1.2/patches/27920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-2-git-send-email-apinski@marvell.com/","msgid":"<1669828695-18532-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-30T17:18:15","name":"[2/2] Improve error message for excess elements in array initializer from {\"a\"}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-2-git-send-email-apinski@marvell.com/mbox/"},{"id":27948,"url":"https://patchwork.plctlab.org/api/1.2/patches/27948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130181625.2011166-1-adhemerval.zanella@linaro.org/","msgid":"<20221130181625.2011166-1-adhemerval.zanella@linaro.org>","list_archive_url":null,"date":"2022-11-30T18:16:25","name":"longlong.h: Do no use asm input cast for clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130181625.2011166-1-adhemerval.zanella@linaro.org/mbox/"},{"id":27957,"url":"https://patchwork.plctlab.org/api/1.2/patches/27957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4el43pq83ixCe/N@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-30T18:50:11","name":"[committed] hppa: Fix addvdi3 and subvdi3 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4el43pq83ixCe/N@mx3210.localdomain/mbox/"},{"id":28019,"url":"https://patchwork.plctlab.org/api/1.2/patches/28019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213115.539282-1-ibuclaw@gdcproject.org/","msgid":"<20221130213115.539282-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:31:15","name":"[GCC-12,committed] d: Fix #error You must define PREFERRED_DEBUGGING_TYPE if DWARF is not supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213115.539282-1-ibuclaw@gdcproject.org/mbox/"},{"id":28020,"url":"https://patchwork.plctlab.org/api/1.2/patches/28020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213727.545475-1-ibuclaw@gdcproject.org/","msgid":"<20221130213727.545475-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:37:27","name":"[committed] d: Synchronize gdc documentation with options in d/lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213727.545475-1-ibuclaw@gdcproject.org/mbox/"},{"id":28021,"url":"https://patchwork.plctlab.org/api/1.2/patches/28021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213949.547614-1-ibuclaw@gdcproject.org/","msgid":"<20221130213949.547614-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:39:49","name":"[committed] d: Separate documentation indices into options and keywords.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213949.547614-1-ibuclaw@gdcproject.org/mbox/"},{"id":28022,"url":"https://patchwork.plctlab.org/api/1.2/patches/28022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214234.550547-1-ibuclaw@gdcproject.org/","msgid":"<20221130214234.550547-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:42:34","name":"[committed] d: Update recipes for building html and pdf documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214234.550547-1-ibuclaw@gdcproject.org/mbox/"},{"id":28024,"url":"https://patchwork.plctlab.org/api/1.2/patches/28024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214812.554893-1-ibuclaw@gdcproject.org/","msgid":"<20221130214812.554893-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:48:12","name":"[committed] d: Add language reference section to documentation files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214812.554893-1-ibuclaw@gdcproject.org/mbox/"},{"id":28128,"url":"https://patchwork.plctlab.org/api/1.2/patches/28128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-1-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:17","name":"[1/3] rs6000: NFC use more readable pattern to clean high 32 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-1-guojiufu@linux.ibm.com/mbox/"},{"id":28129,"url":"https://patchwork.plctlab.org/api/1.2/patches/28129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-2-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:18","name":"[2/3] rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-2-guojiufu@linux.ibm.com/mbox/"},{"id":28130,"url":"https://patchwork.plctlab.org/api/1.2/patches/28130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-3-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:19","name":"[3/3] rs6000: NFC no need copy_rtx in rs6000_emit_set_long_const and rs6000_emit_set_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-3-guojiufu@linux.ibm.com/mbox/"},{"id":28156,"url":"https://patchwork.plctlab.org/api/1.2/patches/28156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201023317.3722715-1-dmalcolm@redhat.com/","msgid":"<20221201023317.3722715-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:33:17","name":"[committed] analyzer: fix ICE on bind/connect with a constant fd [PR107928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201023317.3722715-1-dmalcolm@redhat.com/mbox/"},{"id":28163,"url":"https://patchwork.plctlab.org/api/1.2/patches/28163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-1-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:54","name":"[committed,1/7] analyzer: move bounds checking to a new bounds-checking.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-1-dmalcolm@redhat.com/mbox/"},{"id":28158,"url":"https://patchwork.plctlab.org/api/1.2/patches/28158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-2-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:55","name":"[committed,2/7] analyzer: fix wording of '\''number of bad bytes'\'' note [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-2-dmalcolm@redhat.com/mbox/"},{"id":28159,"url":"https://patchwork.plctlab.org/api/1.2/patches/28159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-3-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:56","name":"[committed,3/7] analyzer: add note about valid subscripts [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-3-dmalcolm@redhat.com/mbox/"},{"id":28161,"url":"https://patchwork.plctlab.org/api/1.2/patches/28161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-4-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:57","name":"[committed,4/7] analyzer: more bounds-checking wording tweaks [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-4-dmalcolm@redhat.com/mbox/"},{"id":28162,"url":"https://patchwork.plctlab.org/api/1.2/patches/28162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-5-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:58","name":"[committed,5/7] diagnostics: tweak diagnostic_path::interprocedural_p [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-5-dmalcolm@redhat.com/mbox/"},{"id":28160,"url":"https://patchwork.plctlab.org/api/1.2/patches/28160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-6-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:59","name":"[committed,6/7] analyzer: unify bounds-checking class hierarchies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-6-dmalcolm@redhat.com/mbox/"},{"id":28164,"url":"https://patchwork.plctlab.org/api/1.2/patches/28164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-7-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:42:00","name":"[committed,7/7] analyzer: fix i18n issues in symbolic out-of-bounds [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-7-dmalcolm@redhat.com/mbox/"},{"id":28168,"url":"https://patchwork.plctlab.org/api/1.2/patches/28168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b2be13be3534681af5a64b8163a3c8c@amazon.com/","msgid":"<3b2be13be3534681af5a64b8163a3c8c@amazon.com>","list_archive_url":null,"date":"2022-12-01T03:04:52","name":"AArch64: Add UNSPECV_PATCHABLE_AREA [PR98776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b2be13be3534681af5a64b8163a3c8c@amazon.com/mbox/"},{"id":28182,"url":"https://patchwork.plctlab.org/api/1.2/patches/28182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201034639.136411-1-jason@redhat.com/","msgid":"<20221201034639.136411-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-01T03:46:39","name":"[pushed] c++: small contracts fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201034639.136411-1-jason@redhat.com/mbox/"},{"id":28187,"url":"https://patchwork.plctlab.org/api/1.2/patches/28187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201043155.9369-1-luolongjuna@gmail.com/","msgid":"<20221201043155.9369-1-luolongjuna@gmail.com>","list_archive_url":null,"date":"2022-12-01T04:31:55","name":"libcpp: suppress builtin macro redefined warnings for __LINE__","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201043155.9369-1-luolongjuna@gmail.com/mbox/"},{"id":28209,"url":"https://patchwork.plctlab.org/api/1.2/patches/28209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201061130.2696537-1-hongtao.liu@intel.com/","msgid":"<20221201061130.2696537-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-01T06:11:30","name":"[x86] Fix ICE due to incorrect insn type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201061130.2696537-1-hongtao.liu@intel.com/mbox/"},{"id":28230,"url":"https://patchwork.plctlab.org/api/1.2/patches/28230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4hhT8kVXen8yOX5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-01T08:09:51","name":"i386: Improve *concat3_{1,2,3,4} patterns [PR107627]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4hhT8kVXen8yOX5@tucnak/mbox/"},{"id":28244,"url":"https://patchwork.plctlab.org/api/1.2/patches/28244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-1-guojiufu@linux.ibm.com/","msgid":"<20221201084754.12959-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T08:47:53","name":"[1/2] rs6000: use lis;xoris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-1-guojiufu@linux.ibm.com/mbox/"},{"id":28245,"url":"https://patchwork.plctlab.org/api/1.2/patches/28245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-2-guojiufu@linux.ibm.com/","msgid":"<20221201084754.12959-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T08:47:54","name":"[2/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-2-guojiufu@linux.ibm.com/mbox/"},{"id":28259,"url":"https://patchwork.plctlab.org/api/1.2/patches/28259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de/","msgid":"<20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-01T09:18:22","name":"tree-optimization/107935 - fixup equivalence handling in PHI VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de/mbox/"},{"id":28273,"url":"https://patchwork.plctlab.org/api/1.2/patches/28273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz/","msgid":"<74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz>","list_archive_url":null,"date":"2022-12-01T09:33:56","name":"gcc: remove incpath.o from CXX_C_OBJS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz/mbox/"},{"id":28275,"url":"https://patchwork.plctlab.org/api/1.2/patches/28275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201095335.355711320E@imap1.suse-dmz.suse.de/","msgid":"<20221201095335.355711320E@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-01T09:53:34","name":"tree-optimization/107937 - uninit predicate simplification fixup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201095335.355711320E@imap1.suse-dmz.suse.de/mbox/"},{"id":28282,"url":"https://patchwork.plctlab.org/api/1.2/patches/28282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4208860-1af9-6c47-6109-5c2fe4c9d444@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-01T09:59:07","name":"IPA: do not release body if still needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4208860-1af9-6c47-6109-5c2fe4c9d444@suse.cz/mbox/"},{"id":28288,"url":"https://patchwork.plctlab.org/api/1.2/patches/28288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-2-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:30","name":"[1/3] RISC-V: add a new parameter in riscv_first_stack_step.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-2-gaofei@eswincomputing.com/mbox/"},{"id":28287,"url":"https://patchwork.plctlab.org/api/1.2/patches/28287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-3-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:31","name":"[2/3] RISC-V: optimize stack manipulation in save-restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-3-gaofei@eswincomputing.com/mbox/"},{"id":28289,"url":"https://patchwork.plctlab.org/api/1.2/patches/28289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-4-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:32","name":"[3/3] RISC-V: make the stack manipulation codes more readable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-4-gaofei@eswincomputing.com/mbox/"},{"id":28295,"url":"https://patchwork.plctlab.org/api/1.2/patches/28295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4iCpoNWlMFJF4T5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-01T10:32:06","name":"c++, v2: Incremental fix for g++.dg/gomp/for-21.C [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4iCpoNWlMFJF4T5@tucnak/mbox/"},{"id":28377,"url":"https://patchwork.plctlab.org/api/1.2/patches/28377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201134316.3506324-1-christophe.lyon@arm.com/","msgid":"<20221201134316.3506324-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-12-01T13:43:16","name":"[committed] arm: Fix MVE testsuite fallouts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201134316.3506324-1-christophe.lyon@arm.com/mbox/"},{"id":28382,"url":"https://patchwork.plctlab.org/api/1.2/patches/28382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135505.457877-1-poulhies@adacore.com/","msgid":"<20221201135505.457877-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:05","name":"[COMMITTED] ada: Minor updates to gnat/doc configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135505.457877-1-poulhies@adacore.com/mbox/"},{"id":28384,"url":"https://patchwork.plctlab.org/api/1.2/patches/28384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135522.457972-1-poulhies@adacore.com/","msgid":"<20221201135522.457972-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:22","name":"[COMMITTED] ada: Fix minor issues in reference manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135522.457972-1-poulhies@adacore.com/mbox/"},{"id":28386,"url":"https://patchwork.plctlab.org/api/1.2/patches/28386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135532.458039-1-poulhies@adacore.com/","msgid":"<20221201135532.458039-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:32","name":"[COMMITTED] ada: Use the address type of a Storage_Model_Type for '\''Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135532.458039-1-poulhies@adacore.com/mbox/"},{"id":28385,"url":"https://patchwork.plctlab.org/api/1.2/patches/28385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135537.458104-1-poulhies@adacore.com/","msgid":"<20221201135537.458104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:37","name":"[COMMITTED] ada: Fix misphrasing in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135537.458104-1-poulhies@adacore.com/mbox/"},{"id":28387,"url":"https://patchwork.plctlab.org/api/1.2/patches/28387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135544.458168-1-poulhies@adacore.com/","msgid":"<20221201135544.458168-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:44","name":"[COMMITTED] ada: Further adjustments to User'\''s Guide for PIE default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135544.458168-1-poulhies@adacore.com/mbox/"},{"id":28388,"url":"https://patchwork.plctlab.org/api/1.2/patches/28388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135550.458256-1-poulhies@adacore.com/","msgid":"<20221201135550.458256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:50","name":"[COMMITTED] ada: Enforce Aggregate aspect legality rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135550.458256-1-poulhies@adacore.com/mbox/"},{"id":28389,"url":"https://patchwork.plctlab.org/api/1.2/patches/28389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135556.458319-1-poulhies@adacore.com/","msgid":"<20221201135556.458319-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:56","name":"[COMMITTED] ada: Strip conversions for the implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135556.458319-1-poulhies@adacore.com/mbox/"},{"id":28408,"url":"https://patchwork.plctlab.org/api/1.2/patches/28408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201142235.GA12562@ldh-imac.local/","msgid":"<20221201142235.GA12562@ldh-imac.local>","list_archive_url":null,"date":"2022-12-01T14:22:35","name":"Ping^3: [PATCH] libcpp: Improve location for macro names [PR66290]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201142235.GA12562@ldh-imac.local/mbox/"},{"id":28409,"url":"https://patchwork.plctlab.org/api/1.2/patches/28409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3b7e809-537d-c2f0-c02d-b1050967edbd@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T14:35:34","name":"amdgcn: Add preprocessor builtins for every processor type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3b7e809-537d-c2f0-c02d-b1050967edbd@codesourcery.com/mbox/"},{"id":28426,"url":"https://patchwork.plctlab.org/api/1.2/patches/28426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4jJSkO6Ccew5OjL@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T15:33:30","name":"varasm: Fix type confusion bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4jJSkO6Ccew5OjL@arm.com/mbox/"},{"id":28454,"url":"https://patchwork.plctlab.org/api/1.2/patches/28454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201163752.2176490-1-ppalka@redhat.com/","msgid":"<20221201163752.2176490-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-01T16:37:52","name":"c++: explicit spec of constrained member tmpl [PR107522]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201163752.2176490-1-ppalka@redhat.com/mbox/"},{"id":28457,"url":"https://patchwork.plctlab.org/api/1.2/patches/28457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201165051.51853-1-jason@redhat.com/","msgid":"<20221201165051.51853-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-01T16:50:51","name":"[RFA] driver: fix validate_switches logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201165051.51853-1-jason@redhat.com/mbox/"},{"id":28458,"url":"https://patchwork.plctlab.org/api/1.2/patches/28458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898282DA41F5944167126D7883149@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T16:55:16","name":"libgcc: Fix uninitialized RA signing on AArch64 [PR107678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898282DA41F5944167126D7883149@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":28502,"url":"https://patchwork.plctlab.org/api/1.2/patches/28502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ca1641-f2b7-d9d2-6740-2c3fdf007bb5@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T18:19:47","name":"arm: Split up MVE _Generic associations to prevent type clashes [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ca1641-f2b7-d9d2-6740-2c3fdf007bb5@arm.com/mbox/"},{"id":28547,"url":"https://patchwork.plctlab.org/api/1.2/patches/28547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-36a140f9-17a0-4d3d-8a78-f2ae946960cb-1669926330700@3c-app-gmx-bs60/","msgid":"","list_archive_url":null,"date":"2022-12-01T20:25:30","name":"Fortran: error recovery simplifying UNPACK for insufficient FIELD [PR107922]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-36a140f9-17a0-4d3d-8a78-f2ae946960cb-1669926330700@3c-app-gmx-bs60/mbox/"},{"id":28551,"url":"https://patchwork.plctlab.org/api/1.2/patches/28551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201205702.2822213-1-ppalka@redhat.com/","msgid":"<20221201205702.2822213-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-01T20:57:02","name":"c++: comptypes ICE with BOUND_TEMPLATE_TEMPLATE_PARMs [PR107539]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201205702.2822213-1-ppalka@redhat.com/mbox/"},{"id":28664,"url":"https://patchwork.plctlab.org/api/1.2/patches/28664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023541.3778122-1-dmalcolm@redhat.com/","msgid":"<20221202023541.3778122-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T02:35:41","name":"[committed] analyzer: add test coverage for string ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023541.3778122-1-dmalcolm@redhat.com/mbox/"},{"id":28665,"url":"https://patchwork.plctlab.org/api/1.2/patches/28665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023554.3778168-1-dmalcolm@redhat.com/","msgid":"<20221202023554.3778168-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T02:35:54","name":"[committed] analyzer: handle comparisons against negated symbolic values [PR107948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023554.3778168-1-dmalcolm@redhat.com/mbox/"},{"id":28702,"url":"https://patchwork.plctlab.org/api/1.2/patches/28702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202042606.551350-1-hongtao.liu@intel.com/","msgid":"<20221202042606.551350-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-02T04:26:05","name":"[x86] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202042606.551350-1-hongtao.liu@intel.com/mbox/"},{"id":28726,"url":"https://patchwork.plctlab.org/api/1.2/patches/28726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a63fac98-4737-3f8d-44d9-92874ed814d6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T07:03:46","name":"[v5,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a63fac98-4737-3f8d-44d9-92874ed814d6@linux.ibm.com/mbox/"},{"id":28725,"url":"https://patchwork.plctlab.org/api/1.2/patches/28725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202070401.A01F6133DE@imap1.suse-dmz.suse.de/","msgid":"<20221202070401.A01F6133DE@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-02T07:04:01","name":"Add --param max-unswitch-depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202070401.A01F6133DE@imap1.suse-dmz.suse.de/mbox/"},{"id":28730,"url":"https://patchwork.plctlab.org/api/1.2/patches/28730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnaLY=sigq_+fXpBZ++UpEw4AD_XdNL4H-1Gy4Knp+cAw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T07:21:37","name":"[aarch64] PR107920 - Fix incorrect handling of virtual operands in svld1rq_impl::fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnaLY=sigq_+fXpBZ++UpEw4AD_XdNL4H-1Gy4Knp+cAw@mail.gmail.com/mbox/"},{"id":28800,"url":"https://patchwork.plctlab.org/api/1.2/patches/28800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yeuyxdv.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:21:00","name":"[testsuite,riscv] uninit-pred-9_b bogus warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yeuyxdv.fsf@lxoliva.fsfla.org/mbox/"},{"id":28802,"url":"https://patchwork.plctlab.org/api/1.2/patches/28802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qpiyx9a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:23:45","name":"[testsuite,riscv] skip ssa-sink-18.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qpiyx9a.fsf@lxoliva.fsfla.org/mbox/"},{"id":28812,"url":"https://patchwork.plctlab.org/api/1.2/patches/28812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn7axilx.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:25:30","name":"[testsuite,arm/aarch64] -fno-short-enums for auto-init-[12].c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn7axilx.fsf@lxoliva.fsfla.org/mbox/"},{"id":28816,"url":"https://patchwork.plctlab.org/api/1.2/patches/28816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfhyxik0.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:26:39","name":"[PR42093,arm,thumb2] disable tree-dce for test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfhyxik0.fsf@lxoliva.fsfla.org/mbox/"},{"id":28820,"url":"https://patchwork.plctlab.org/api/1.2/patches/28820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7smxieq.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:29:49","name":"[PR40457,arm] expand SI-aligned movdi into pair of movsi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7smxieq.fsf@lxoliva.fsfla.org/mbox/"},{"id":28821,"url":"https://patchwork.plctlab.org/api/1.2/patches/28821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork03axi6x.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:34:30","name":"[arm] xfail fp-uint64-convert-double tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork03axi6x.fsf@lxoliva.fsfla.org/mbox/"},{"id":28824,"url":"https://patchwork.plctlab.org/api/1.2/patches/28824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4nH2qqDl0WFBiYS@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:39:38","name":"i386: Save/restore recog_data in ix86_vector_duplicate_value [PR106577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4nH2qqDl0WFBiYS@tucnak/mbox/"},{"id":28831,"url":"https://patchwork.plctlab.org/api/1.2/patches/28831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsdyxhoy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:45:17","name":"[gcc-12,PR104308,analyzer] handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsdyxhoy.fsf@lxoliva.fsfla.org/mbox/"},{"id":28871,"url":"https://patchwork.plctlab.org/api/1.2/patches/28871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c210778d-e7d8-5d00-7255-329f7dfec052@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-02T11:27:29","name":"ipa: silent -Wodr notes with -w","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c210778d-e7d8-5d00-7255-329f7dfec052@suse.cz/mbox/"},{"id":28874,"url":"https://patchwork.plctlab.org/api/1.2/patches/28874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz/","msgid":"<332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz>","list_archive_url":null,"date":"2022-12-02T11:38:37","name":"[(pushed)] gcc: regenerate configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz/mbox/"},{"id":28891,"url":"https://patchwork.plctlab.org/api/1.2/patches/28891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-2-thomas@codesourcery.com/","msgid":"<20221202120315.803120-2-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:07","name":"[1/9] nvptx: Re-enable '\''gcc.c-torture/compile/20080721-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-2-thomas@codesourcery.com/mbox/"},{"id":28890,"url":"https://patchwork.plctlab.org/api/1.2/patches/28890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-3-thomas@codesourcery.com/","msgid":"<20221202120315.803120-3-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:08","name":"[2/9] nvptx: Re-enable \"ptxas times out\" test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-3-thomas@codesourcery.com/mbox/"},{"id":28893,"url":"https://patchwork.plctlab.org/api/1.2/patches/28893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-4-thomas@codesourcery.com/","msgid":"<20221202120315.803120-4-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:09","name":"[3/9] nvptx: Re-enable test cases by removing effective target '\''freestanding'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-4-thomas@codesourcery.com/mbox/"},{"id":28894,"url":"https://patchwork.plctlab.org/api/1.2/patches/28894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-5-thomas@codesourcery.com/","msgid":"<20221202120315.803120-5-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:10","name":"[4/9] nvptx: Re-enable all variants of '\''gcc.c-torture/execute/20020529-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-5-thomas@codesourcery.com/mbox/"},{"id":28896,"url":"https://patchwork.plctlab.org/api/1.2/patches/28896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-6-thomas@codesourcery.com/","msgid":"<20221202120315.803120-6-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:11","name":"[5/9] nvptx: Re-enable '\''gcc.dg/special/weak-2.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-6-thomas@codesourcery.com/mbox/"},{"id":28898,"url":"https://patchwork.plctlab.org/api/1.2/patches/28898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-7-thomas@codesourcery.com/","msgid":"<20221202120315.803120-7-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:12","name":"[6/9] nvptx: Re-enable all variants of '\''c-c++-common/torture/complex-sign-mixed-add.c'\'', '\''c-c++-common/torture/complex-sign-mixed-sub.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-7-thomas@codesourcery.com/mbox/"},{"id":28892,"url":"https://patchwork.plctlab.org/api/1.2/patches/28892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-8-thomas@codesourcery.com/","msgid":"<20221202120315.803120-8-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:13","name":"[7/9] nvptx: Re-enable '\''gcc.dg/torture/c99-contract-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-8-thomas@codesourcery.com/mbox/"},{"id":28897,"url":"https://patchwork.plctlab.org/api/1.2/patches/28897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-9-thomas@codesourcery.com/","msgid":"<20221202120315.803120-9-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:14","name":"[8/9] nvptx: Re-enable \"Stack alignment causes use of alloca\" test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-9-thomas@codesourcery.com/mbox/"},{"id":28899,"url":"https://patchwork.plctlab.org/api/1.2/patches/28899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-10-thomas@codesourcery.com/","msgid":"<20221202120315.803120-10-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:15","name":"[9/9] nvptx: Re-enable '\''gcc.misc-tests/options.exp'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-10-thomas@codesourcery.com/mbox/"},{"id":28912,"url":"https://patchwork.plctlab.org/api/1.2/patches/28912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c654090-4263-a2f5-3651-312694a8f786@redhat.com/","msgid":"<1c654090-4263-a2f5-3651-312694a8f786@redhat.com>","list_archive_url":null,"date":"2022-12-02T13:30:32","name":"[committed,PR106462] LRA: Check hard reg availability of pseudo and its subreg for pseudo reload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c654090-4263-a2f5-3651-312694a8f786@redhat.com/mbox/"},{"id":28913,"url":"https://patchwork.plctlab.org/api/1.2/patches/28913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-12-02T13:35:35","name":"nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":28925,"url":"https://patchwork.plctlab.org/api/1.2/patches/28925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbc8f41c-fe12-b7af-c906-e19f1ce1224e@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T14:12:23","name":"Fix a few incorrect accesses.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbc8f41c-fe12-b7af-c906-e19f1ce1224e@redhat.com/mbox/"},{"id":28928,"url":"https://patchwork.plctlab.org/api/1.2/patches/28928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202143055.46CE813644@imap1.suse-dmz.suse.de/","msgid":"<20221202143055.46CE813644@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-02T14:30:54","name":"tree-optimization/107833 - invariant motion of uninit uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202143055.46CE813644@imap1.suse-dmz.suse.de/mbox/"},{"id":28944,"url":"https://patchwork.plctlab.org/api/1.2/patches/28944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202154512.310755-1-jason@redhat.com/","msgid":"<20221202154512.310755-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-02T15:45:12","name":"[RFA(tree)] c++: source position of lambda captures [PR84471]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202154512.310755-1-jason@redhat.com/mbox/"},{"id":29050,"url":"https://patchwork.plctlab.org/api/1.2/patches/29050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-2-cupertino.miranda@oracle.com/","msgid":"<20221202175225.2780-2-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2022-12-02T17:52:24","name":"[1/2] select .rodata for const volatile variables.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-2-cupertino.miranda@oracle.com/mbox/"},{"id":29049,"url":"https://patchwork.plctlab.org/api/1.2/patches/29049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-3-cupertino.miranda@oracle.com/","msgid":"<20221202175225.2780-3-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2022-12-02T17:52:25","name":"[2/2] Corrected pr25521.c target matching.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-3-cupertino.miranda@oracle.com/mbox/"},{"id":29082,"url":"https://patchwork.plctlab.org/api/1.2/patches/29082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202190110.3491914-1-ppalka@redhat.com/","msgid":"<20221202190110.3491914-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:01:10","name":"c++: substituting CONST_DECL_USING_P enumerator [PR103081]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202190110.3491914-1-ppalka@redhat.com/mbox/"},{"id":29086,"url":"https://patchwork.plctlab.org/api/1.2/patches/29086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202191104.3812885-1-dmalcolm@redhat.com/","msgid":"<20221202191104.3812885-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:11:04","name":"[trunk,PR104308,analyzer] handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202191104.3812885-1-dmalcolm@redhat.com/mbox/"},{"id":29091,"url":"https://patchwork.plctlab.org/api/1.2/patches/29091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202194228.3794597-1-ppalka@redhat.com/","msgid":"<20221202194228.3794597-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:42:28","name":"c++: unexpanded pack in requires-expr parm list [PR107417]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202194228.3794597-1-ppalka@redhat.com/mbox/"},{"id":29094,"url":"https://patchwork.plctlab.org/api/1.2/patches/29094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202202526.10504-1-iain@sandoe.co.uk/","msgid":"<20221202202526.10504-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-02T20:25:26","name":"coroutines: Do not promote temporaries that will be elided.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202202526.10504-1-iain@sandoe.co.uk/mbox/"},{"id":29115,"url":"https://patchwork.plctlab.org/api/1.2/patches/29115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213552.3820428-1-dmalcolm@redhat.com/","msgid":"<20221202213552.3820428-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T21:35:52","name":"[committed] analyzer: fixes to region creation messages [PR107851]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213552.3820428-1-dmalcolm@redhat.com/mbox/"},{"id":29116,"url":"https://patchwork.plctlab.org/api/1.2/patches/29116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213608.3820488-1-dmalcolm@redhat.com/","msgid":"<20221202213608.3820488-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T21:36:08","name":"[committed] analyzer: introduce struct event_loc_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213608.3820488-1-dmalcolm@redhat.com/mbox/"},{"id":29152,"url":"https://patchwork.plctlab.org/api/1.2/patches/29152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4qRJUvlu1VoykA9@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T23:58:29","name":"[v3] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4qRJUvlu1VoykA9@redhat.com/mbox/"},{"id":29244,"url":"https://patchwork.plctlab.org/api/1.2/patches/29244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora644ykc0.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-03T08:15:11","name":"[PR102706,testsuite] -Wno-stringop-overflow vs Warray-bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora644ykc0.fsf@lxoliva.fsfla.org/mbox/"},{"id":29298,"url":"https://patchwork.plctlab.org/api/1.2/patches/29298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-76ab7545-a0b1-4fc6-9950-b47d9d13742d-1670092066726@3c-app-gmx-bs55/","msgid":"","list_archive_url":null,"date":"2022-12-03T18:27:46","name":"Fortran: error recovery handling invalid CLASS variable [PR107899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-76ab7545-a0b1-4fc6-9950-b47d9d13742d-1670092066726@3c-app-gmx-bs55/mbox/"},{"id":29300,"url":"https://patchwork.plctlab.org/api/1.2/patches/29300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/XEXAtikg5eNPBqsrJ2I9FS_DwVIKh3rZJRFUzbmyPpe_IpbJ96NXOpTQtdtsODI3NlnvaMQ5HV2VYrvXEE5UPByJTtIcDlISwnXW13PetJk=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-12-03T19:34:42","name":"Ping: [PATCH] jit: Install jit headers in $(libsubincludedir) [PR 101491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/XEXAtikg5eNPBqsrJ2I9FS_DwVIKh3rZJRFUzbmyPpe_IpbJ96NXOpTQtdtsODI3NlnvaMQ5HV2VYrvXEE5UPByJTtIcDlISwnXW13PetJk=@lorenzosalvadore.it/mbox/"},{"id":29340,"url":"https://patchwork.plctlab.org/api/1.2/patches/29340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a9bb8ff-dfa7-4a63-b4cf-99b4c9fe1d74-1670099062157@3c-app-gmx-bs13/","msgid":"","list_archive_url":null,"date":"2022-12-03T20:24:22","name":"Fortran: fix typo in documentation of intrinsic FLOOR [PR107870]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a9bb8ff-dfa7-4a63-b4cf-99b4c9fe1d74-1670099062157@3c-app-gmx-bs13/mbox/"},{"id":29398,"url":"https://patchwork.plctlab.org/api/1.2/patches/29398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204104437.32069-1-iain@sandoe.co.uk/","msgid":"<20221204104437.32069-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T10:44:37","name":"[pushed] libsanitizer, Darwin: Restrict build to Darwin 16 or newer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204104437.32069-1-iain@sandoe.co.uk/mbox/"},{"id":29403,"url":"https://patchwork.plctlab.org/api/1.2/patches/29403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204105345.33234-1-iain@sandoe.co.uk/","msgid":"<20221204105345.33234-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T10:53:45","name":"[pushed] libstdc++, Darwin: Fix weak attribute to use __weak__ instead of weak.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204105345.33234-1-iain@sandoe.co.uk/mbox/"},{"id":29405,"url":"https://patchwork.plctlab.org/api/1.2/patches/29405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204110815.34872-1-iain@sandoe.co.uk/","msgid":"<20221204110815.34872-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T11:08:15","name":"libstdc++, Darwin: Limit recursive mutex init to OS versions needing it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204110815.34872-1-iain@sandoe.co.uk/mbox/"},{"id":29412,"url":"https://patchwork.plctlab.org/api/1.2/patches/29412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204115150.35508-1-iain@sandoe.co.uk/","msgid":"<20221204115150.35508-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T11:51:50","name":"testsuite, X86, Darwin: Fix bf16 ABI tests for Mach-O/macOS ABI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204115150.35508-1-iain@sandoe.co.uk/mbox/"},{"id":29425,"url":"https://patchwork.plctlab.org/api/1.2/patches/29425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204163047.72124-1-iain@sandoe.co.uk/","msgid":"<20221204163047.72124-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T16:30:47","name":"c++, driver: Fix -static-libstdc++ for targets without Bstatic/dynamic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204163047.72124-1-iain@sandoe.co.uk/mbox/"},{"id":29482,"url":"https://patchwork.plctlab.org/api/1.2/patches/29482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-12-05T01:40:38","name":"[v3] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":29503,"url":"https://patchwork.plctlab.org/api/1.2/patches/29503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/905c34de-6333-1021-05e6-942922918b18@linux.ibm.com/","msgid":"<905c34de-6333-1021-05e6-942922918b18@linux.ibm.com>","list_archive_url":null,"date":"2022-12-05T03:07:56","name":"[v2] Return a NULL rtx when targets don'\''t support cbranchcc4 or predicate check fails in prepare_cmp_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/905c34de-6333-1021-05e6-942922918b18@linux.ibm.com/mbox/"},{"id":29519,"url":"https://patchwork.plctlab.org/api/1.2/patches/29519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042101.4144757-1-ppalka@redhat.com/","msgid":"<20221205042101.4144757-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-05T04:21:01","name":"tree, c++: declare some basic functions inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042101.4144757-1-ppalka@redhat.com/mbox/"},{"id":29520,"url":"https://patchwork.plctlab.org/api/1.2/patches/29520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042109.4144777-1-ppalka@redhat.com/","msgid":"<20221205042109.4144777-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-05T04:21:09","name":"tree, c++: optimize walk_tree_1 and cp_walk_subtrees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042109.4144777-1-ppalka@redhat.com/mbox/"},{"id":29589,"url":"https://patchwork.plctlab.org/api/1.2/patches/29589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205081117.B59B11348F@imap1.suse-dmz.suse.de/","msgid":"<20221205081117.B59B11348F@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T08:11:17","name":"tree-optimization/107956 - ICE with NULL call LHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205081117.B59B11348F@imap1.suse-dmz.suse.de/mbox/"},{"id":29592,"url":"https://patchwork.plctlab.org/api/1.2/patches/29592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de/","msgid":"<20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T08:21:42","name":"plugins/107964 - install contracts.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de/mbox/"},{"id":29632,"url":"https://patchwork.plctlab.org/api/1.2/patches/29632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43H+LkdiDQjILIU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T10:29:12","name":"match.pd: Don'\''t fold nan < x etc. for -ftrapping-math [PR106805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43H+LkdiDQjILIU@tucnak/mbox/"},{"id":29659,"url":"https://patchwork.plctlab.org/api/1.2/patches/29659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43dD0/eSrUNx/8Z@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T11:59:11","name":"range-op-float: Improve multiplication reverse operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43dD0/eSrUNx/8Z@tucnak/mbox/"},{"id":29680,"url":"https://patchwork.plctlab.org/api/1.2/patches/29680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205134349.1730053-1-joakim@nohlgard.se/","msgid":"<20221205134349.1730053-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-12-05T13:43:49","name":"[v2] gcc: Use ld -r when checking for HAVE_LD_RO_RW_SECTION_MIXING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205134349.1730053-1-joakim@nohlgard.se/mbox/"},{"id":29696,"url":"https://patchwork.plctlab.org/api/1.2/patches/29696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205135531.BBAC513326@imap1.suse-dmz.suse.de/","msgid":"<20221205135531.BBAC513326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T13:55:31","name":"tree-optimization/106868 - bogus -Wdangling-pointer diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205135531.BBAC513326@imap1.suse-dmz.suse.de/mbox/"},{"id":29699,"url":"https://patchwork.plctlab.org/api/1.2/patches/29699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205142850.969850-1-siddhesh@gotplt.org/","msgid":"<20221205142850.969850-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-05T14:28:50","name":"testsuite: Fix leaks in tree-dynamic-object-size-0.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205142850.969850-1-siddhesh@gotplt.org/mbox/"},{"id":29735,"url":"https://patchwork.plctlab.org/api/1.2/patches/29735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y44PYa8n3RkNIfCn@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T15:33:53","name":"range-op-float: Improve binary reverse operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y44PYa8n3RkNIfCn@tucnak/mbox/"},{"id":29736,"url":"https://patchwork.plctlab.org/api/1.2/patches/29736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205153955.5F6A813326@imap1.suse-dmz.suse.de/","msgid":"<20221205153955.5F6A813326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T15:39:55","name":"middle-end/40635 - SSA update losing PHI arg loations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205153955.5F6A813326@imap1.suse-dmz.suse.de/mbox/"},{"id":29977,"url":"https://patchwork.plctlab.org/api/1.2/patches/29977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y446AHZfl9DZFrdx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T18:35:46","name":"range-op-float: Fix up ICE in lower_bound [PR107975]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y446AHZfl9DZFrdx@tucnak/mbox/"},{"id":30086,"url":"https://patchwork.plctlab.org/api/1.2/patches/30086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f321ea49-6adb-7f28-aa98-13168b961e3c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-06T05:44:49","name":"[v3,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f321ea49-6adb-7f28-aa98-13168b961e3c@linux.ibm.com/mbox/"},{"id":30111,"url":"https://patchwork.plctlab.org/api/1.2/patches/30111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206072340.C862C13326@imap1.suse-dmz.suse.de/","msgid":"<20221206072340.C862C13326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-06T07:23:40","name":"tree-optimization/104165 - bougs -Warray-bounds, add testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206072340.C862C13326@imap1.suse-dmz.suse.de/mbox/"},{"id":30115,"url":"https://patchwork.plctlab.org/api/1.2/patches/30115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com/","msgid":"<0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com>","list_archive_url":null,"date":"2022-12-06T07:45:07","name":"libgomp: Handle OpenMP'\''s reverse offloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com/mbox/"},{"id":30123,"url":"https://patchwork.plctlab.org/api/1.2/patches/30123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206080623.1879920-1-hongtao.liu@intel.com/","msgid":"<20221206080623.1879920-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-06T08:06:23","name":"[x86] Fix ICE due to condition mismatch between expander and define_insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206080623.1879920-1-hongtao.liu@intel.com/mbox/"},{"id":30144,"url":"https://patchwork.plctlab.org/api/1.2/patches/30144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b83d284d-c789-1e4a-f2c2-e06e2e6878fd@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-06T08:53:47","name":"[committed] libgomp.texi: Fix a OpenMP 5.2 and a TR11 impl-status item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b83d284d-c789-1e4a-f2c2-e06e2e6878fd@codesourcery.com/mbox/"},{"id":30146,"url":"https://patchwork.plctlab.org/api/1.2/patches/30146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com/","msgid":"<4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com>","list_archive_url":null,"date":"2022-12-06T08:59:17","name":"[wwwdocs] gcc-13/changes.html + projects/gomp: OpenMP GCC 13 update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com/mbox/"},{"id":30150,"url":"https://patchwork.plctlab.org/api/1.2/patches/30150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206091153.27281-2-wangfeng@eswincomputing.com/","msgid":"<20221206091153.27281-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2022-12-06T09:11:53","name":"[v2,1/1] RISC-V: Optimze the reverse conditions of rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206091153.27281-2-wangfeng@eswincomputing.com/mbox/"},{"id":30183,"url":"https://patchwork.plctlab.org/api/1.2/patches/30183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206095020.A865B13326@imap1.suse-dmz.suse.de/","msgid":"<20221206095020.A865B13326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-06T09:50:20","name":"tree-optimization/104475 - improve access diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206095020.A865B13326@imap1.suse-dmz.suse.de/mbox/"},{"id":30184,"url":"https://patchwork.plctlab.org/api/1.2/patches/30184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48S1d7kqcbRhfJ3@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:00:53","name":"Zen4 tuning part 1 - cost tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48S1d7kqcbRhfJ3@kam.mff.cuni.cz/mbox/"},{"id":30185,"url":"https://patchwork.plctlab.org/api/1.2/patches/30185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-2-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:33","name":"[Rust,front-end,v4,01/46] Use DW_ATE_UTF for the Rust '\''char'\'' type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-2-arthur.cohen@embecosm.com/mbox/"},{"id":30186,"url":"https://patchwork.plctlab.org/api/1.2/patches/30186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-3-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:34","name":"[Rust,front-end,v4,02/46] gccrs: Add necessary hooks for a Rust front-end testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-3-arthur.cohen@embecosm.com/mbox/"},{"id":30187,"url":"https://patchwork.plctlab.org/api/1.2/patches/30187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-4-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:35","name":"[Rust,front-end,v4,03/46] gccrs: Add Debug info testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-4-arthur.cohen@embecosm.com/mbox/"},{"id":30188,"url":"https://patchwork.plctlab.org/api/1.2/patches/30188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-5-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:36","name":"[Rust,front-end,v4,04/46] gccrs: Add link cases testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-5-arthur.cohen@embecosm.com/mbox/"},{"id":30192,"url":"https://patchwork.plctlab.org/api/1.2/patches/30192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-6-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:37","name":"[Rust,front-end,v4,05/46] gccrs: Add general compilation test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-6-arthur.cohen@embecosm.com/mbox/"},{"id":30190,"url":"https://patchwork.plctlab.org/api/1.2/patches/30190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-7-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:38","name":"[Rust,front-end,v4,06/46] gccrs: Add execution test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-7-arthur.cohen@embecosm.com/mbox/"},{"id":30189,"url":"https://patchwork.plctlab.org/api/1.2/patches/30189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-8-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:39","name":"[Rust,front-end,v4,07/46] gccrs: Add gcc-check-target check-rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-8-arthur.cohen@embecosm.com/mbox/"},{"id":30196,"url":"https://patchwork.plctlab.org/api/1.2/patches/30196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-9-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:40","name":"[Rust,front-end,v4,08/46] gccrs: Add Rust front-end base AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-9-arthur.cohen@embecosm.com/mbox/"},{"id":30201,"url":"https://patchwork.plctlab.org/api/1.2/patches/30201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-10-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:41","name":"[Rust,front-end,v4,09/46] gccrs: Add definitions of Rust Items in AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-10-arthur.cohen@embecosm.com/mbox/"},{"id":30194,"url":"https://patchwork.plctlab.org/api/1.2/patches/30194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-11-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:42","name":"[Rust,front-end,v4,10/46] gccrs: Add full definitions of Rust AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-11-arthur.cohen@embecosm.com/mbox/"},{"id":30191,"url":"https://patchwork.plctlab.org/api/1.2/patches/30191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-12-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:43","name":"[Rust,front-end,v4,11/46] gccrs: Add Rust AST visitors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-12-arthur.cohen@embecosm.com/mbox/"},{"id":30199,"url":"https://patchwork.plctlab.org/api/1.2/patches/30199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-13-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:44","name":"[Rust,front-end,v4,12/46] gccrs: Add Lexer for Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-13-arthur.cohen@embecosm.com/mbox/"},{"id":30193,"url":"https://patchwork.plctlab.org/api/1.2/patches/30193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-14-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:45","name":"[Rust,front-end,v4,13/46] gccrs: Add Parser for Rust front-end pt.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-14-arthur.cohen@embecosm.com/mbox/"},{"id":30195,"url":"https://patchwork.plctlab.org/api/1.2/patches/30195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-15-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:46","name":"[Rust,front-end,v4,14/46] gccrs: Add Parser for Rust front-end pt.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-15-arthur.cohen@embecosm.com/mbox/"},{"id":30198,"url":"https://patchwork.plctlab.org/api/1.2/patches/30198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-16-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:47","name":"[Rust,front-end,v4,15/46] gccrs: Add expansion pass for the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-16-arthur.cohen@embecosm.com/mbox/"},{"id":30200,"url":"https://patchwork.plctlab.org/api/1.2/patches/30200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-17-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:48","name":"[Rust,front-end,v4,16/46] gccrs: Add name resolution pass to the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-17-arthur.cohen@embecosm.com/mbox/"},{"id":30208,"url":"https://patchwork.plctlab.org/api/1.2/patches/30208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-18-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:49","name":"[Rust,front-end,v4,17/46] gccrs: Add declarations for Rust HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-18-arthur.cohen@embecosm.com/mbox/"},{"id":30207,"url":"https://patchwork.plctlab.org/api/1.2/patches/30207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-19-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:50","name":"[Rust,front-end,v4,18/46] gccrs: Add HIR definitions and visitor framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-19-arthur.cohen@embecosm.com/mbox/"},{"id":30209,"url":"https://patchwork.plctlab.org/api/1.2/patches/30209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-20-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:51","name":"[Rust,front-end,v4,19/46] gccrs: Add AST to HIR lowering pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-20-arthur.cohen@embecosm.com/mbox/"},{"id":30203,"url":"https://patchwork.plctlab.org/api/1.2/patches/30203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-21-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:52","name":"[Rust,front-end,v4,20/46] gccrs: Add wrapper for make_unique","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-21-arthur.cohen@embecosm.com/mbox/"},{"id":30213,"url":"https://patchwork.plctlab.org/api/1.2/patches/30213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-22-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:53","name":"[Rust,front-end,v4,21/46] gccrs: Add port of FNV hash used during legacy symbol mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-22-arthur.cohen@embecosm.com/mbox/"},{"id":30210,"url":"https://patchwork.plctlab.org/api/1.2/patches/30210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-23-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:54","name":"[Rust,front-end,v4,22/46] gccrs: Add Rust ABI enum helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-23-arthur.cohen@embecosm.com/mbox/"},{"id":30202,"url":"https://patchwork.plctlab.org/api/1.2/patches/30202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-24-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:55","name":"[Rust,front-end,v4,23/46] gccrs: Add Base62 implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-24-arthur.cohen@embecosm.com/mbox/"},{"id":30205,"url":"https://patchwork.plctlab.org/api/1.2/patches/30205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-25-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:56","name":"[Rust,front-end,v4,24/46] gccrs: Add implementation of Optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-25-arthur.cohen@embecosm.com/mbox/"},{"id":30211,"url":"https://patchwork.plctlab.org/api/1.2/patches/30211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-26-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:57","name":"[Rust,front-end,v4,25/46] gccrs: Add attributes checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-26-arthur.cohen@embecosm.com/mbox/"},{"id":30204,"url":"https://patchwork.plctlab.org/api/1.2/patches/30204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-27-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:58","name":"[Rust,front-end,v4,26/46] gccrs: Add helpers mappings canonical path and lang items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-27-arthur.cohen@embecosm.com/mbox/"},{"id":30219,"url":"https://patchwork.plctlab.org/api/1.2/patches/30219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-28-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:59","name":"[Rust,front-end,v4,27/46] gccrs: Add type resolution and trait solving pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-28-arthur.cohen@embecosm.com/mbox/"},{"id":30224,"url":"https://patchwork.plctlab.org/api/1.2/patches/30224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-29-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:00","name":"[Rust,front-end,v4,28/46] gccrs: Add Rust type information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-29-arthur.cohen@embecosm.com/mbox/"},{"id":30212,"url":"https://patchwork.plctlab.org/api/1.2/patches/30212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-30-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:01","name":"[Rust,front-end,v4,29/46] gccrs: Add remaining type system transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-30-arthur.cohen@embecosm.com/mbox/"},{"id":30214,"url":"https://patchwork.plctlab.org/api/1.2/patches/30214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-31-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:02","name":"[Rust,front-end,v4,30/46] gccrs: Add unsafe checks for Rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-31-arthur.cohen@embecosm.com/mbox/"},{"id":30206,"url":"https://patchwork.plctlab.org/api/1.2/patches/30206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-32-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:03","name":"[Rust,front-end,v4,31/46] gccrs: Add const checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-32-arthur.cohen@embecosm.com/mbox/"},{"id":30217,"url":"https://patchwork.plctlab.org/api/1.2/patches/30217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-33-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:04","name":"[Rust,front-end,v4,32/46] gccrs: Add privacy checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-33-arthur.cohen@embecosm.com/mbox/"},{"id":30216,"url":"https://patchwork.plctlab.org/api/1.2/patches/30216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-34-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:05","name":"[Rust,front-end,v4,33/46] gccrs: Add dead code scan on HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-34-arthur.cohen@embecosm.com/mbox/"},{"id":30218,"url":"https://patchwork.plctlab.org/api/1.2/patches/30218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-35-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:07","name":"[Rust,front-end,v4,34/46] gccrs: Add unused variable scan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-35-arthur.cohen@embecosm.com/mbox/"},{"id":30215,"url":"https://patchwork.plctlab.org/api/1.2/patches/30215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-36-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:09","name":"[Rust,front-end,v4,35/46] gccrs: Add metadata output pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-36-arthur.cohen@embecosm.com/mbox/"},{"id":30228,"url":"https://patchwork.plctlab.org/api/1.2/patches/30228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-37-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:11","name":"[Rust,front-end,v4,36/46] gccrs: Add base for HIR to GCC GENERIC lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-37-arthur.cohen@embecosm.com/mbox/"},{"id":30222,"url":"https://patchwork.plctlab.org/api/1.2/patches/30222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-38-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:13","name":"[Rust,front-end,v4,37/46] gccrs: Add HIR to GCC GENERIC lowering for all nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-38-arthur.cohen@embecosm.com/mbox/"},{"id":30226,"url":"https://patchwork.plctlab.org/api/1.2/patches/30226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-39-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:15","name":"[Rust,front-end,v4,38/46] gccrs: Add HIR to GCC GENERIC lowering entry point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-39-arthur.cohen@embecosm.com/mbox/"},{"id":30220,"url":"https://patchwork.plctlab.org/api/1.2/patches/30220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-40-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:17","name":"[Rust,front-end,v4,39/46] gccrs: These are wrappers ported from reusing gccgo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-40-arthur.cohen@embecosm.com/mbox/"},{"id":30227,"url":"https://patchwork.plctlab.org/api/1.2/patches/30227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-41-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:18","name":"[Rust,front-end,v4,40/46] gccrs: Add GCC Rust front-end Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-41-arthur.cohen@embecosm.com/mbox/"},{"id":30221,"url":"https://patchwork.plctlab.org/api/1.2/patches/30221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-42-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:19","name":"[Rust,front-end,v4,41/46] gccrs: Add config-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-42-arthur.cohen@embecosm.com/mbox/"},{"id":30223,"url":"https://patchwork.plctlab.org/api/1.2/patches/30223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-43-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:20","name":"[Rust,front-end,v4,42/46] gccrs: Add lang-spec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-43-arthur.cohen@embecosm.com/mbox/"},{"id":30225,"url":"https://patchwork.plctlab.org/api/1.2/patches/30225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-44-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:21","name":"[Rust,front-end,v4,43/46] gccrs: Add lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-44-arthur.cohen@embecosm.com/mbox/"},{"id":30229,"url":"https://patchwork.plctlab.org/api/1.2/patches/30229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-45-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:23","name":"[Rust,front-end,v4,44/46] gccrs: Add compiler driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-45-arthur.cohen@embecosm.com/mbox/"},{"id":30230,"url":"https://patchwork.plctlab.org/api/1.2/patches/30230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-46-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:25","name":"[Rust,front-end,v4,45/46] gccrs: Compiler proper interface kicks off the pipeline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-46-arthur.cohen@embecosm.com/mbox/"},{"id":30231,"url":"https://patchwork.plctlab.org/api/1.2/patches/30231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-47-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:26","name":"[Rust,front-end,v4,46/46] gccrs: Add README, CONTRIBUTING and compiler logo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-47-arthur.cohen@embecosm.com/mbox/"},{"id":30232,"url":"https://patchwork.plctlab.org/api/1.2/patches/30232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dHK7UMNqkwdTs@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:44:44","name":"[committed] testsuite: Use -mnofpu for rx-*-* in ieee testsuite [PR107046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dHK7UMNqkwdTs@tucnak/mbox/"},{"id":30234,"url":"https://patchwork.plctlab.org/api/1.2/patches/30234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dxLVBpmVJLztI@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:47:32","name":"i386: Fix up expander conditions on cbranchbf4 and cstorebf4 [PR107969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dxLVBpmVJLztI@tucnak/mbox/"},{"id":30238,"url":"https://patchwork.plctlab.org/api/1.2/patches/30238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48kD2pq/URhF8Ur@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-06T11:14:23","name":"Zen4 tuning part 2 - tuning flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48kD2pq/URhF8Ur@kam.mff.cuni.cz/mbox/"},{"id":30265,"url":"https://patchwork.plctlab.org/api/1.2/patches/30265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206122707.494575-1-ibuclaw@gdcproject.org/","msgid":"<20221206122707.494575-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-06T12:27:07","name":"[committed] onlinedocs: Add documentation links to gdc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206122707.494575-1-ibuclaw@gdcproject.org/mbox/"},{"id":30303,"url":"https://patchwork.plctlab.org/api/1.2/patches/30303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206132624.1051104-1-jason@redhat.com/","msgid":"<20221206132624.1051104-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-06T13:26:24","name":"[RFA] build: add -Wconditionally-supported to strict_warn [PR64867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206132624.1051104-1-jason@redhat.com/mbox/"},{"id":30304,"url":"https://patchwork.plctlab.org/api/1.2/patches/30304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140126.716950-1-poulhies@adacore.com/","msgid":"<20221206140126.716950-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:26","name":"[COMMITTED] ada: Add Codepeer Exemption + simplify TO_C code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140126.716950-1-poulhies@adacore.com/mbox/"},{"id":30310,"url":"https://patchwork.plctlab.org/api/1.2/patches/30310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140137.717051-1-poulhies@adacore.com/","msgid":"<20221206140137.717051-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:37","name":"[COMMITTED] ada: Accessibility code reorganization and bug fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140137.717051-1-poulhies@adacore.com/mbox/"},{"id":30305,"url":"https://patchwork.plctlab.org/api/1.2/patches/30305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140149.717127-1-poulhies@adacore.com/","msgid":"<20221206140149.717127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:49","name":"[COMMITTED] ada: Use larger type for membership test of universal value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140149.717127-1-poulhies@adacore.com/mbox/"},{"id":30307,"url":"https://patchwork.plctlab.org/api/1.2/patches/30307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140158.717193-1-poulhies@adacore.com/","msgid":"<20221206140158.717193-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:58","name":"[COMMITTED] ada: Small adjustment to special resolution of membership test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140158.717193-1-poulhies@adacore.com/mbox/"},{"id":30308,"url":"https://patchwork.plctlab.org/api/1.2/patches/30308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140203.717258-1-poulhies@adacore.com/","msgid":"<20221206140203.717258-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:03","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140203.717258-1-poulhies@adacore.com/mbox/"},{"id":30311,"url":"https://patchwork.plctlab.org/api/1.2/patches/30311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140211.717323-1-poulhies@adacore.com/","msgid":"<20221206140211.717323-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:11","name":"[COMMITTED] ada: Fix spurious error in checking of SPARK elaboration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140211.717323-1-poulhies@adacore.com/mbox/"},{"id":30309,"url":"https://patchwork.plctlab.org/api/1.2/patches/30309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140219.717392-1-poulhies@adacore.com/","msgid":"<20221206140219.717392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:19","name":"[COMMITTED] ada: Suppress warning for specific constant valid condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140219.717392-1-poulhies@adacore.com/mbox/"},{"id":30306,"url":"https://patchwork.plctlab.org/api/1.2/patches/30306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140224.717457-1-poulhies@adacore.com/","msgid":"<20221206140224.717457-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:24","name":"[COMMITTED] ada: Spurious error on nested call using the prefix notation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140224.717457-1-poulhies@adacore.com/mbox/"},{"id":30312,"url":"https://patchwork.plctlab.org/api/1.2/patches/30312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140228.717520-1-poulhies@adacore.com/","msgid":"<20221206140228.717520-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:28","name":"[COMMITTED] ada: Allow No_Caching on volatile types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140228.717520-1-poulhies@adacore.com/mbox/"},{"id":30338,"url":"https://patchwork.plctlab.org/api/1.2/patches/30338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qe5-LO@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,2/19] modula2 front end: Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qe5-LO@lancelot/mbox/"},{"id":30334,"url":"https://patchwork.plctlab.org/api/1.2/patches/30334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeL-Qd@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,3/19] modula2 front end: gm2 driver files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeL-Qd@lancelot/mbox/"},{"id":30337,"url":"https://patchwork.plctlab.org/api/1.2/patches/30337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeZ-WE@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,4/19] modula2 front end: libgm2/libm2pim contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeZ-WE@lancelot/mbox/"},{"id":30322,"url":"https://patchwork.plctlab.org/api/1.2/patches/30322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qdq-Gg@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qdq-Gg@lancelot/mbox/"},{"id":30323,"url":"https://patchwork.plctlab.org/api/1.2/patches/30323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qfk-S1@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,9/19] modula2 front end: plugin source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qfk-S1@lancelot/mbox/"},{"id":30319,"url":"https://patchwork.plctlab.org/api/1.2/patches/30319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qf1-Bo@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,6/19] modula2 front end: libgm2/libm2min contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qf1-Bo@lancelot/mbox/"},{"id":30320,"url":"https://patchwork.plctlab.org/api/1.2/patches/30320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qen-6m@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,5/19] modula2 front end: libgm2/libm2iso contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qen-6m@lancelot/mbox/"},{"id":30327,"url":"https://patchwork.plctlab.org/api/1.2/patches/30327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfW-Mo@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,8/19] modula2 front end: libgm2 contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfW-Mo@lancelot/mbox/"},{"id":30318,"url":"https://patchwork.plctlab.org/api/1.2/patches/30318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfF-Gz@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,7/19] modula2 front end: libgm2/libm2log contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfF-Gz@lancelot/mbox/"},{"id":30355,"url":"https://patchwork.plctlab.org/api/1.2/patches/30355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgF-C1@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,11/19] modula2 front end: gimple interface *[a-d]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgF-C1@lancelot/mbox/"},{"id":30329,"url":"https://patchwork.plctlab.org/api/1.2/patches/30329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qfy-3L@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,10/19] modula2 front end: gimple interface header files *.h and *.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qfy-3L@lancelot/mbox/"},{"id":30341,"url":"https://patchwork.plctlab.org/api/1.2/patches/30341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qgl-Sj@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,13/19] modula2 front end: gimple interface *[g-m]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qgl-Sj@lancelot/mbox/"},{"id":30360,"url":"https://patchwork.plctlab.org/api/1.2/patches/30360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgU-Kq@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,12/19] modula2 front end: gimple interface *[e-f]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgU-Kq@lancelot/mbox/"},{"id":30336,"url":"https://patchwork.plctlab.org/api/1.2/patches/30336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qhj-S4@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,17/19] modula2 front end: dejagnu expect library scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qhj-S4@lancelot/mbox/"},{"id":30339,"url":"https://patchwork.plctlab.org/api/1.2/patches/30339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhG-Bj@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,15/19] modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhG-Bj@lancelot/mbox/"},{"id":30359,"url":"https://patchwork.plctlab.org/api/1.2/patches/30359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qgz-29@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,14/19] modula2 front end: gimple interface remainder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qgz-29@lancelot/mbox/"},{"id":30340,"url":"https://patchwork.plctlab.org/api/1.2/patches/30340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhV-Lh@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,16/19] modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhV-Lh@lancelot/mbox/"},{"id":30426,"url":"https://patchwork.plctlab.org/api/1.2/patches/30426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-2-qing.zhao@oracle.com/","msgid":"<20221206161438.2396168-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:14:36","name":"[V2,1/1] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-2-qing.zhao@oracle.com/mbox/"},{"id":30425,"url":"https://patchwork.plctlab.org/api/1.2/patches/30425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-3-qing.zhao@oracle.com/","msgid":"<20221206161438.2396168-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:14:37","name":"[V3,1/2] Update -Warray-bounds with -fstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-3-qing.zhao@oracle.com/mbox/"},{"id":30427,"url":"https://patchwork.plctlab.org/api/1.2/patches/30427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161844.2397151-1-qing.zhao@oracle.com/","msgid":"<20221206161844.2397151-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:18:44","name":"[V3,2/2] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161844.2397151-1-qing.zhao@oracle.com/mbox/"},{"id":30465,"url":"https://patchwork.plctlab.org/api/1.2/patches/30465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206175702.987794-1-ppalka@redhat.com/","msgid":"<20221206175702.987794-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-06T17:57:02","name":"c++: NTTP object wrapper substitution fixes [PR103346, ...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206175702.987794-1-ppalka@redhat.com/mbox/"},{"id":30469,"url":"https://patchwork.plctlab.org/api/1.2/patches/30469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183631.4095755-1-dmalcolm@redhat.com/","msgid":"<20221206183631.4095755-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:36:31","name":"[committed] analyzer: split out more stuff from region-model-impl-calls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183631.4095755-1-dmalcolm@redhat.com/mbox/"},{"id":30470,"url":"https://patchwork.plctlab.org/api/1.2/patches/30470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183649.4095806-1-dmalcolm@redhat.com/","msgid":"<20221206183649.4095806-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:36:49","name":"[committed] analyzer: update internal docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183649.4095806-1-dmalcolm@redhat.com/mbox/"},{"id":30471,"url":"https://patchwork.plctlab.org/api/1.2/patches/30471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183743.4095884-1-dmalcolm@redhat.com/","msgid":"<20221206183743.4095884-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:37:43","name":"[committed] contrib: doxygen: add gcc/analyzer subdirectory to INPUT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183743.4095884-1-dmalcolm@redhat.com/mbox/"},{"id":30472,"url":"https://patchwork.plctlab.org/api/1.2/patches/30472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183800.4095931-1-dmalcolm@redhat.com/","msgid":"<20221206183800.4095931-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:38:00","name":"[committed] analyzer: use __attribute__((nonnull)) at top level of analysis [PR106325]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183800.4095931-1-dmalcolm@redhat.com/mbox/"},{"id":30478,"url":"https://patchwork.plctlab.org/api/1.2/patches/30478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2dbP-006uqW-MN@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T19:27:39","name":"[v4,15/19] modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2dbP-006uqW-MN@lancelot/mbox/"},{"id":30481,"url":"https://patchwork.plctlab.org/api/1.2/patches/30481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-1-gcc@hazardy.de/","msgid":"<20221206195028.37104-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:25","name":"[1/4] libbacktrace: change all pc related variables to uintptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-1-gcc@hazardy.de/mbox/"},{"id":30483,"url":"https://patchwork.plctlab.org/api/1.2/patches/30483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-2-gcc@hazardy.de/","msgid":"<20221206195028.37104-2-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:26","name":"[2/4] libbacktrace: detect executable path on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-2-gcc@hazardy.de/mbox/"},{"id":30482,"url":"https://patchwork.plctlab.org/api/1.2/patches/30482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-3-gcc@hazardy.de/","msgid":"<20221206195028.37104-3-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:27","name":"[3/4] libbacktrace: work with aslr on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-3-gcc@hazardy.de/mbox/"},{"id":30480,"url":"https://patchwork.plctlab.org/api/1.2/patches/30480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-4-gcc@hazardy.de/","msgid":"<20221206195028.37104-4-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:28","name":"[4/4] libbacktrace: get debug information for loaded dlls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-4-gcc@hazardy.de/mbox/"},{"id":30513,"url":"https://patchwork.plctlab.org/api/1.2/patches/30513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213420.232451-1-jwakely@redhat.com/","msgid":"<20221206213420.232451-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:34:20","name":"[committed] libstdc++: The Trouble with Tribbles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213420.232451-1-jwakely@redhat.com/mbox/"},{"id":30514,"url":"https://patchwork.plctlab.org/api/1.2/patches/30514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213631.238976-1-jwakely@redhat.com/","msgid":"<20221206213631.238976-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:36:31","name":"[committed] libstdc++: Add nodiscard attribute to mutex try_lock functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213631.238976-1-jwakely@redhat.com/mbox/"},{"id":30515,"url":"https://patchwork.plctlab.org/api/1.2/patches/30515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213654.239004-1-jwakely@redhat.com/","msgid":"<20221206213654.239004-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:36:54","name":"[committed] libstdc++: Add hint to compiler about vector invariants [PR106434]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213654.239004-1-jwakely@redhat.com/mbox/"},{"id":30517,"url":"https://patchwork.plctlab.org/api/1.2/patches/30517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214054.239631-1-jwakely@redhat.com/","msgid":"<20221206214054.239631-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:40:54","name":"[committed] libstdc++: Add casts for integer-like difference type [PR107871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214054.239631-1-jwakely@redhat.com/mbox/"},{"id":30518,"url":"https://patchwork.plctlab.org/api/1.2/patches/30518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214100.239663-1-jwakely@redhat.com/","msgid":"<20221206214100.239663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:41:00","name":"[committed] libstdc++: Fix test that fails due to name clash with old glibc [PR107979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214100.239663-1-jwakely@redhat.com/mbox/"},{"id":30544,"url":"https://patchwork.plctlab.org/api/1.2/patches/30544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206233146.4111115-1-dmalcolm@redhat.com/","msgid":"<20221206233146.4111115-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T23:31:46","name":"[committed] analyzer: don'\''t create bindings or binding keys for empty regions [PR107882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206233146.4111115-1-dmalcolm@redhat.com/mbox/"},{"id":30575,"url":"https://patchwork.plctlab.org/api/1.2/patches/30575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207014152.3313833-1-chenglulu@loongson.cn/","msgid":"<20221207014152.3313833-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-07T01:41:53","name":"doc: Correct a clerical error in the document.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207014152.3313833-1-chenglulu@loongson.cn/mbox/"},{"id":30622,"url":"https://patchwork.plctlab.org/api/1.2/patches/30622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6fed247-243f-45c3-cfb3-53d7bdfc2b65@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T05:17:08","name":"[v2] Add a new conversion for conditional ternary set into ifcvt [PR106536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6fed247-243f-45c3-cfb3-53d7bdfc2b65@linux.ibm.com/mbox/"},{"id":30653,"url":"https://patchwork.plctlab.org/api/1.2/patches/30653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207063644.100134-1-hongyu.wang@intel.com/","msgid":"<20221207063644.100134-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-12-07T06:36:44","name":"i386: Avoid fma_chain for -march=alderlake and sapphirerapids.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207063644.100134-1-hongyu.wang@intel.com/mbox/"},{"id":30692,"url":"https://patchwork.plctlab.org/api/1.2/patches/30692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3383e0b-29d1-622b-3278-f10aa173fa62@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T08:08:09","name":"libgomp.texi: Reverse-offload updates (was: [Patch] libgomp: Handle OpenMP'\''s reverse offloads)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3383e0b-29d1-622b-3278-f10aa173fa62@codesourcery.com/mbox/"},{"id":30695,"url":"https://patchwork.plctlab.org/api/1.2/patches/30695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BO16zJ9vReV+Af@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T08:29:11","name":"range-op-float: Fix up frange_arithmetic [PR107967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BO16zJ9vReV+Af@tucnak/mbox/"},{"id":30725,"url":"https://patchwork.plctlab.org/api/1.2/patches/30725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BdQ2An000WISET@alf.mars/","msgid":"","list_archive_url":null,"date":"2022-12-07T09:30:43","name":"preprocessor: __has_include_next should not error out [PR80755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BdQ2An000WISET@alf.mars/mbox/"},{"id":30760,"url":"https://patchwork.plctlab.org/api/1.2/patches/30760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207102739.73934134CD@imap1.suse-dmz.suse.de/","msgid":"<20221207102739.73934134CD@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T10:27:39","name":"ipa/105676 - pure attribute suggestion for const function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207102739.73934134CD@imap1.suse-dmz.suse.de/mbox/"},{"id":30783,"url":"https://patchwork.plctlab.org/api/1.2/patches/30783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207112501.989ED136B4@imap1.suse-dmz.suse.de/","msgid":"<20221207112501.989ED136B4@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T11:25:01","name":"tree-optimization/104475 - bogus -Wstringop-overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207112501.989ED136B4@imap1.suse-dmz.suse.de/mbox/"},{"id":30789,"url":"https://patchwork.plctlab.org/api/1.2/patches/30789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207113633.993896-1-arthur.cohen@embecosm.com/","msgid":"<20221207113633.993896-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-07T11:36:33","name":"[committed] MAINTAINERS: Add myself as Rust front-end maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207113633.993896-1-arthur.cohen@embecosm.com/mbox/"},{"id":30805,"url":"https://patchwork.plctlab.org/api/1.2/patches/30805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207120008.126895-1-guojiufu@linux.ibm.com/","msgid":"<20221207120008.126895-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-07T12:00:08","name":"[V3] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207120008.126895-1-guojiufu@linux.ibm.com/mbox/"},{"id":30815,"url":"https://patchwork.plctlab.org/api/1.2/patches/30815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5CCrWLFwPMSRtEx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T12:10:21","name":"range-op-float: frange_arithmetic tweaks for MODE_COMPOSITE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5CCrWLFwPMSRtEx@tucnak/mbox/"},{"id":30853,"url":"https://patchwork.plctlab.org/api/1.2/patches/30853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207135418.F35F4136B4@imap1.suse-dmz.suse.de/","msgid":"<20221207135418.F35F4136B4@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T13:54:18","name":"tree-optimization/106904 - bogus -Wstringopt-overflow with vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207135418.F35F4136B4@imap1.suse-dmz.suse.de/mbox/"},{"id":30897,"url":"https://patchwork.plctlab.org/api/1.2/patches/30897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207153939.49157-1-iain@sandoe.co.uk/","msgid":"<20221207153939.49157-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-07T15:39:39","name":"c++, TLS: Support cross-tu static initialization for targets without alias support [PR106435].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207153939.49157-1-iain@sandoe.co.uk/mbox/"},{"id":30900,"url":"https://patchwork.plctlab.org/api/1.2/patches/30900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C2HQOXFT+RTCId@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T15:49:49","name":"range-op-float, v2: Fix up frange_arithmetic [PR107967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C2HQOXFT+RTCId@tucnak/mbox/"},{"id":30909,"url":"https://patchwork.plctlab.org/api/1.2/patches/30909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C54d2clIOm0hrr@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T16:05:53","name":"range-op-float, v2: frange_arithmetic tweaks for MODE_COMPOSITE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C54d2clIOm0hrr@tucnak/mbox/"},{"id":30933,"url":"https://patchwork.plctlab.org/api/1.2/patches/30933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1752ce19-956b-a055-2585-a6b0e2827572@redhat.com/","msgid":"<1752ce19-956b-a055-2585-a6b0e2827572@redhat.com>","list_archive_url":null,"date":"2022-12-07T16:44:04","name":"PR tree-optimization/107985 - Ensure arguments to range-op handler are supported.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1752ce19-956b-a055-2585-a6b0e2827572@redhat.com/mbox/"},{"id":30950,"url":"https://patchwork.plctlab.org/api/1.2/patches/30950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982520FB2F4810235D350BD831A9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T17:15:14","name":"[COMMITTED] AArch64: Fix assert in aarch64_move_imm [PR108006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982520FB2F4810235D350BD831A9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":30998,"url":"https://patchwork.plctlab.org/api/1.2/patches/30998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207190903.78a6b37f@squid.athome/","msgid":"<20221207190903.78a6b37f@squid.athome>","list_archive_url":null,"date":"2022-12-07T19:09:03","name":"[1/2] OpenMP/Fortran: Combined directives with map/firstprivate of same symbol","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207190903.78a6b37f@squid.athome/mbox/"},{"id":30999,"url":"https://patchwork.plctlab.org/api/1.2/patches/30999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207191355.2e43ea14@squid.athome/","msgid":"<20221207191355.2e43ea14@squid.athome>","list_archive_url":null,"date":"2022-12-07T19:13:55","name":"[2/2] OpenMP: Duplicate checking for map clauses in Fortran (PR107214)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207191355.2e43ea14@squid.athome/mbox/"},{"id":31000,"url":"https://patchwork.plctlab.org/api/1.2/patches/31000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com/","msgid":"<8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com>","list_archive_url":null,"date":"2022-12-07T19:19:24","name":"[committed] preprocessor: Enable __VA_OPT__ for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com/mbox/"},{"id":31005,"url":"https://patchwork.plctlab.org/api/1.2/patches/31005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab2a758-711d-6d30-6561-a4189efff023@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T19:25:29","name":"[committed] testsuite: Add test for C90 auto with implicit int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab2a758-711d-6d30-6561-a4189efff023@codesourcery.com/mbox/"},{"id":31016,"url":"https://patchwork.plctlab.org/api/1.2/patches/31016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207201827.1720474-1-ppalka@redhat.com/","msgid":"<20221207201827.1720474-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-07T20:18:27","name":"c++: ICE with concepts TS multiple auto deduction [PR101886]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207201827.1720474-1-ppalka@redhat.com/mbox/"},{"id":31022,"url":"https://patchwork.plctlab.org/api/1.2/patches/31022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207203409.104322-1-polacek@redhat.com/","msgid":"<20221207203409.104322-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-12-07T20:34:09","name":"docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207203409.104322-1-polacek@redhat.com/mbox/"},{"id":31049,"url":"https://patchwork.plctlab.org/api/1.2/patches/31049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205517.526182-1-rzinsly@ventanamicro.com/","msgid":"<20221207205517.526182-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-07T20:55:17","name":"RISC-V: Produce better code with complex constants [PR95632] [PR106602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205517.526182-1-rzinsly@ventanamicro.com/mbox/"},{"id":31050,"url":"https://patchwork.plctlab.org/api/1.2/patches/31050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-63117869-4396-41cc-8f80-3f7d4d02e5d6-1670446640941@3c-app-gmx-bs03/","msgid":"","list_archive_url":null,"date":"2022-12-07T20:57:20","name":"Fortran: handle zero-sized arrays in ctors with typespec [PR108010]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-63117869-4396-41cc-8f80-3f7d4d02e5d6-1670446640941@3c-app-gmx-bs03/mbox/"},{"id":31053,"url":"https://patchwork.plctlab.org/api/1.2/patches/31053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-2-david.faust@oracle.com/","msgid":"<20221207205734.9287-2-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:32","name":"[1/3] btf: add '\''extern'\'' linkage for variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-2-david.faust@oracle.com/mbox/"},{"id":31051,"url":"https://patchwork.plctlab.org/api/1.2/patches/31051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-3-david.faust@oracle.com/","msgid":"<20221207205734.9287-3-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:33","name":"[2/3] btf: fix '\''extern const void'\'' variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-3-david.faust@oracle.com/mbox/"},{"id":31052,"url":"https://patchwork.plctlab.org/api/1.2/patches/31052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-4-david.faust@oracle.com/","msgid":"<20221207205734.9287-4-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:34","name":"[3/3] btf: correct generation for extern funcs [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-4-david.faust@oracle.com/mbox/"},{"id":31064,"url":"https://patchwork.plctlab.org/api/1.2/patches/31064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207215028.1851790-1-ppalka@redhat.com/","msgid":"<20221207215028.1851790-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-07T21:50:28","name":"c++: modules and std::source_location::current() def arg [PR100881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207215028.1851790-1-ppalka@redhat.com/mbox/"},{"id":31077,"url":"https://patchwork.plctlab.org/api/1.2/patches/31077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3d8e34-802-15a9-d4e6-317cd1c324ff@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T22:08:56","name":"[committed] c: Diagnose auto constexpr used with a type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3d8e34-802-15a9-d4e6-317cd1c324ff@codesourcery.com/mbox/"},{"id":31098,"url":"https://patchwork.plctlab.org/api/1.2/patches/31098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVMYucfwKjxTZvvuumHhbcwKYhjc3=LDZxGNfhMqr6Lqg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T00:22:57","name":"Add zstd support to libbacktrace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVMYucfwKjxTZvvuumHhbcwKYhjc3=LDZxGNfhMqr6Lqg@mail.gmail.com/mbox/"},{"id":31133,"url":"https://patchwork.plctlab.org/api/1.2/patches/31133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com/","msgid":"<3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com>","list_archive_url":null,"date":"2022-12-08T03:08:22","name":"[v4,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com/mbox/"},{"id":31249,"url":"https://patchwork.plctlab.org/api/1.2/patches/31249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208091851.3459448-1-jcmvbkbc@gmail.com/","msgid":"<20221208091851.3459448-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-08T09:18:51","name":"[COMMITTED] libgcc: xtensa: remove stray symbols from X*HAL macro definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208091851.3459448-1-jcmvbkbc@gmail.com/mbox/"},{"id":31254,"url":"https://patchwork.plctlab.org/api/1.2/patches/31254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5Gy/7jwJG2UdNTA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-08T09:48:47","name":"i386: Add *concat3_{5,6,7} patterns [PR107627]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5Gy/7jwJG2UdNTA@tucnak/mbox/"},{"id":31255,"url":"https://patchwork.plctlab.org/api/1.2/patches/31255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5G4RyqhX5c0p38G@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-08T10:11:19","name":"cfgbuild: Fix DEBUG_INSN handling in find_bb_boundaries [PR106719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5G4RyqhX5c0p38G@tucnak/mbox/"},{"id":31282,"url":"https://patchwork.plctlab.org/api/1.2/patches/31282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081053400.17722@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2022-12-08T10:54:04","name":"tree-optimization/107699 - missed &data._M_elems + _1 != &data._M_elems folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081053400.17722@jbgna.fhfr.qr/mbox/"},{"id":31283,"url":"https://patchwork.plctlab.org/api/1.2/patches/31283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208105944.660323-1-jose.marchesi@oracle.com/","msgid":"<20221208105944.660323-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-08T10:59:44","name":"expr.cc: avoid unexpected side effects in expand_expr_divmod optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208105944.660323-1-jose.marchesi@oracle.com/mbox/"},{"id":31292,"url":"https://patchwork.plctlab.org/api/1.2/patches/31292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081100520.17722@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2022-12-08T11:07:08","name":"tree-optimization/99919 - bogus uninit diagnostic with bitfield guards","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081100520.17722@jbgna.fhfr.qr/mbox/"},{"id":31381,"url":"https://patchwork.plctlab.org/api/1.2/patches/31381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5H1+kCo+hcQsDHU@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T14:34:34","name":"[v2] docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5H1+kCo+hcQsDHU@redhat.com/mbox/"},{"id":31434,"url":"https://patchwork.plctlab.org/api/1.2/patches/31434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16679-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T16:39:13","name":"AArch64 div-by-255, ensure that arguments are registers. [PR107988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16679-tamar@arm.com/mbox/"},{"id":31435,"url":"https://patchwork.plctlab.org/api/1.2/patches/31435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208164230.2208644-1-ppalka@redhat.com/","msgid":"<20221208164230.2208644-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-08T16:42:30","name":"c++: class-scope qualified constrained auto [PR107188]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208164230.2208644-1-ppalka@redhat.com/mbox/"},{"id":31458,"url":"https://patchwork.plctlab.org/api/1.2/patches/31458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183444.1648084-1-jason@redhat.com/","msgid":"<20221208183444.1648084-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:34:44","name":"[pushed] c++: fewer allocator temps [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183444.1648084-1-jason@redhat.com/mbox/"},{"id":31459,"url":"https://patchwork.plctlab.org/api/1.2/patches/31459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183540.8667-1-david.faust@oracle.com/","msgid":"<20221208183540.8667-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-08T18:35:40","name":"bpf: add define_insn for bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183540.8667-1-david.faust@oracle.com/mbox/"},{"id":31460,"url":"https://patchwork.plctlab.org/api/1.2/patches/31460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184111.1649145-1-jason@redhat.com/","msgid":"<20221208184111.1649145-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:41:11","name":"[pushed] c++: avoid initializer_list [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184111.1649145-1-jason@redhat.com/mbox/"},{"id":31461,"url":"https://patchwork.plctlab.org/api/1.2/patches/31461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184528.1657376-1-jason@redhat.com/","msgid":"<20221208184528.1657376-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:45:28","name":"[pushed] c++: build initializer_list in a loop [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184528.1657376-1-jason@redhat.com/mbox/"},{"id":31509,"url":"https://patchwork.plctlab.org/api/1.2/patches/31509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c8f6193c-a103-49ca-a08b-64c2de66ad54-1670536782690@3c-app-gmx-bap18/","msgid":"","list_archive_url":null,"date":"2022-12-08T21:59:42","name":"Fortran: diagnose and reject duplicate CONTIGUOUS attribute [PR108025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c8f6193c-a103-49ca-a08b-64c2de66ad54-1670536782690@3c-app-gmx-bap18/mbox/"},{"id":31510,"url":"https://patchwork.plctlab.org/api/1.2/patches/31510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208220112.1700553-1-jason@redhat.com/","msgid":"<20221208220112.1700553-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T22:01:12","name":"[RFA] gimplify: avoid unnecessary copy of init array [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208220112.1700553-1-jason@redhat.com/mbox/"},{"id":31523,"url":"https://patchwork.plctlab.org/api/1.2/patches/31523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5JrqSFa/3Z2D4AR@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T22:56:41","name":"[v3] docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5JrqSFa/3Z2D4AR@redhat.com/mbox/"},{"id":31560,"url":"https://patchwork.plctlab.org/api/1.2/patches/31560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003551.443038-1-jwakely@redhat.com/","msgid":"<20221209003551.443038-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:35:51","name":"[committed] libstdc++: Change class-key for duration and time_point to class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003551.443038-1-jwakely@redhat.com/mbox/"},{"id":31561,"url":"https://patchwork.plctlab.org/api/1.2/patches/31561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003602.443084-1-jwakely@redhat.com/","msgid":"<20221209003602.443084-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:02","name":"[committed] libstdc++: Add [[nodiscard]] to chrono conversion functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003602.443084-1-jwakely@redhat.com/mbox/"},{"id":31563,"url":"https://patchwork.plctlab.org/api/1.2/patches/31563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003611.443110-1-jwakely@redhat.com/","msgid":"<20221209003611.443110-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:11","name":"[committed] libstdc++: Fix some -Wunused warnings in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003611.443110-1-jwakely@redhat.com/mbox/"},{"id":31562,"url":"https://patchwork.plctlab.org/api/1.2/patches/31562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003620.443129-1-jwakely@redhat.com/","msgid":"<20221209003620.443129-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:20","name":"[committed] libstdc++: Remove digit separators [PR108015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003620.443129-1-jwakely@redhat.com/mbox/"},{"id":31604,"url":"https://patchwork.plctlab.org/api/1.2/patches/31604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022845.32233-1-dmalcolm@redhat.com/","msgid":"<20221209022845.32233-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:28:45","name":"[committed] analyzer: handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022845.32233-1-dmalcolm@redhat.com/mbox/"},{"id":31605,"url":"https://patchwork.plctlab.org/api/1.2/patches/31605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022919.32279-1-dmalcolm@redhat.com/","msgid":"<20221209022919.32279-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:29:19","name":"[committed] analyzer: fix ICE on region creation during get_referenced_base_regions [PR108003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022919.32279-1-dmalcolm@redhat.com/mbox/"},{"id":31606,"url":"https://patchwork.plctlab.org/api/1.2/patches/31606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022933.32326-1-dmalcolm@redhat.com/","msgid":"<20221209022933.32326-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:29:33","name":"[committed] analyzer: rename region-model-impl-calls.cc to kf.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022933.32326-1-dmalcolm@redhat.com/mbox/"},{"id":31608,"url":"https://patchwork.plctlab.org/api/1.2/patches/31608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-2-uwu@icenowy.me/","msgid":"<20221209024349.845948-2-uwu@icenowy.me>","list_archive_url":null,"date":"2022-12-09T02:43:48","name":"[1/2] LoongArch: respect the with values in config.gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-2-uwu@icenowy.me/mbox/"},{"id":31609,"url":"https://patchwork.plctlab.org/api/1.2/patches/31609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-3-uwu@icenowy.me/","msgid":"<20221209024349.845948-3-uwu@icenowy.me>","list_archive_url":null,"date":"2022-12-09T02:43:49","name":"[2/2] LoongArch: drop loongarch-driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-3-uwu@icenowy.me/mbox/"},{"id":31696,"url":"https://patchwork.plctlab.org/api/1.2/patches/31696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209094141.1565366-1-chenglulu@loongson.cn/","msgid":"<20221209094141.1565366-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-09T09:41:42","name":"[v3] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209094141.1565366-1-chenglulu@loongson.cn/mbox/"},{"id":31740,"url":"https://patchwork.plctlab.org/api/1.2/patches/31740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com/","msgid":"<08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com>","list_archive_url":null,"date":"2022-12-09T13:32:29","name":"Fix memory constraint on MVE v[ld/st][2/4] instructions [PR107714]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com/mbox/"},{"id":31746,"url":"https://patchwork.plctlab.org/api/1.2/patches/31746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209135609.55159-1-sebastian.huber@embedded-brains.de/","msgid":"<20221209135609.55159-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-09T13:56:09","name":"gcov: Fix -fprofile-update=atomic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209135609.55159-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":31774,"url":"https://patchwork.plctlab.org/api/1.2/patches/31774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rjgu0gv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-09T14:16:00","name":"[10/15,V5] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rjgu0gv.fsf_-_@arm.com/mbox/"},{"id":31779,"url":"https://patchwork.plctlab.org/api/1.2/patches/31779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982B7A11182C4919D157793831C9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-09T14:26:11","name":"AArch64: Enable TARGET_CONST_ANCHOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982B7A11182C4919D157793831C9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":31898,"url":"https://patchwork.plctlab.org/api/1.2/patches/31898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de/","msgid":"<7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de>","list_archive_url":null,"date":"2022-12-09T17:34:18","name":"initialize fde objects lazily","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de/mbox/"},{"id":31904,"url":"https://patchwork.plctlab.org/api/1.2/patches/31904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209181938.29706-1-amonakov@ispras.ru/","msgid":"<20221209181938.29706-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-12-09T18:19:38","name":"i386: correct division modeling in lujiazui.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209181938.29706-1-amonakov@ispras.ru/mbox/"},{"id":31905,"url":"https://patchwork.plctlab.org/api/1.2/patches/31905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209182510.43515-1-rzinsly@ventanamicro.com/","msgid":"<20221209182510.43515-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-09T18:25:10","name":"[v2] RISC-V: Produce better code with complex constants [PR95632] [PR106602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209182510.43515-1-rzinsly@ventanamicro.com/mbox/"},{"id":31923,"url":"https://patchwork.plctlab.org/api/1.2/patches/31923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com/","msgid":"<9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com>","list_archive_url":null,"date":"2022-12-09T20:14:55","name":"Fortran/OpenMP: align/allocator modifiers to the allocate clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com/mbox/"},{"id":31926,"url":"https://patchwork.plctlab.org/api/1.2/patches/31926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com/","msgid":"<091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com>","list_archive_url":null,"date":"2022-12-09T21:12:47","name":"Fortran: Replace simple '\''.'\'' quotes by %<.%>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com/mbox/"},{"id":31927,"url":"https://patchwork.plctlab.org/api/1.2/patches/31927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-896fac60-06d8-49ed-9a30-56ae2e8b7c7f-1670621235681@3c-app-gmx-bs62/","msgid":"","list_archive_url":null,"date":"2022-12-09T21:27:15","name":"Fortran: ICE on recursive derived types with allocatable components [PR107872]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-896fac60-06d8-49ed-9a30-56ae2e8b7c7f-1670621235681@3c-app-gmx-bs62/mbox/"},{"id":31935,"url":"https://patchwork.plctlab.org/api/1.2/patches/31935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209215720.3142097-1-ppalka@redhat.com/","msgid":"<20221209215720.3142097-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-09T21:57:20","name":"c++: extract_local_specs and unevaluated contexts [PR100295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209215720.3142097-1-ppalka@redhat.com/mbox/"},{"id":31955,"url":"https://patchwork.plctlab.org/api/1.2/patches/31955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edt86q3q.fsf@debian/","msgid":"<87edt86q3q.fsf@debian>","list_archive_url":null,"date":"2022-12-10T00:48:25","name":"[v4,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edt86q3q.fsf@debian/mbox/"},{"id":31977,"url":"https://patchwork.plctlab.org/api/1.2/patches/31977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgbv225f.fsf@euler.schwinge.homeip.net/","msgid":"<87zgbv225f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-10T06:39:24","name":"Prepare '\''contrib/gcc-changelog/git_commit.py'\'' for GCC/Rust (was: Rust front-end patches v4)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgbv225f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":31982,"url":"https://patchwork.plctlab.org/api/1.2/patches/31982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcr1zg2.fsf@euler.schwinge.homeip.net/","msgid":"<87pmcr1zg2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-10T07:37:49","name":"Add stub '\''gcc/rust/ChangeLog'\'' (was: Prepare '\''contrib/gcc-changelog/git_commit.py'\'' for GCC/Rust)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcr1zg2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":31995,"url":"https://patchwork.plctlab.org/api/1.2/patches/31995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RSeiXwNVUa7+dw@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-10T09:33:46","name":"c++: Ensure !!var is not an lvalue [PR107065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RSeiXwNVUa7+dw@tucnak/mbox/"},{"id":31997,"url":"https://patchwork.plctlab.org/api/1.2/patches/31997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RT+ZOKX3pHseJu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-10T09:40:09","name":"ivopts: Fix IP_END handling for asm goto [PR107997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RT+ZOKX3pHseJu@tucnak/mbox/"},{"id":31998,"url":"https://patchwork.plctlab.org/api/1.2/patches/31998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-2-arsen@aarsen.me/","msgid":"<20221210094303.2180127-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:00","name":"[1/4] contracts: Lowercase {MAYBE,NEVER}_CONTINUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-2-arsen@aarsen.me/mbox/"},{"id":31999,"url":"https://patchwork.plctlab.org/api/1.2/patches/31999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-3-arsen@aarsen.me/","msgid":"<20221210094303.2180127-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:01","name":"[2/4] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-3-arsen@aarsen.me/mbox/"},{"id":32000,"url":"https://patchwork.plctlab.org/api/1.2/patches/32000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-4-arsen@aarsen.me/","msgid":"<20221210094303.2180127-4-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:02","name":"[3/4] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-4-arsen@aarsen.me/mbox/"},{"id":32001,"url":"https://patchwork.plctlab.org/api/1.2/patches/32001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-5-arsen@aarsen.me/","msgid":"<20221210094303.2180127-5-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:03","name":"[4/4] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-5-arsen@aarsen.me/mbox/"},{"id":32006,"url":"https://patchwork.plctlab.org/api/1.2/patches/32006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcrpkfv.fsf@debian/","msgid":"<87pmcrpkfv.fsf@debian>","list_archive_url":null,"date":"2022-12-10T11:28:04","name":"[v5,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite. Addendum.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcrpkfv.fsf@debian/mbox/"},{"id":32012,"url":"https://patchwork.plctlab.org/api/1.2/patches/32012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210113744.38708-1-iain@sandoe.co.uk/","msgid":"<20221210113744.38708-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-10T11:37:44","name":"coroutines: Accept '\''extern \"C\"'\'' coroutines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210113744.38708-1-iain@sandoe.co.uk/mbox/"},{"id":32023,"url":"https://patchwork.plctlab.org/api/1.2/patches/32023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210131356.3385654-1-arsen@aarsen.me/","msgid":"<20221210131356.3385654-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T13:13:56","name":"contracts: Stop relying on mangling for naming .pre/.post clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210131356.3385654-1-arsen@aarsen.me/mbox/"},{"id":32059,"url":"https://patchwork.plctlab.org/api/1.2/patches/32059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210155427.31858-1-iain@sandoe.co.uk/","msgid":"<20221210155427.31858-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-10T15:54:27","name":"coroutines: Build pointer initializers with nullptr_node [PR107768]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210155427.31858-1-iain@sandoe.co.uk/mbox/"},{"id":32096,"url":"https://patchwork.plctlab.org/api/1.2/patches/32096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-23942435-f209-452a-b9e2-427a01a491ef-1670706846774@3c-app-gmx-bap38/","msgid":"","list_archive_url":null,"date":"2022-12-10T21:14:06","name":"Fortran: reject bad SIZE argument while simplifying ISHFTC [PR106911]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-23942435-f209-452a-b9e2-427a01a491ef-1670706846774@3c-app-gmx-bap38/mbox/"},{"id":32097,"url":"https://patchwork.plctlab.org/api/1.2/patches/32097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-24b92e9f-fa6e-4c3c-bad9-e66b6e0de14f-1670707406360@3c-app-gmx-bap38/","msgid":"","list_archive_url":null,"date":"2022-12-10T21:23:26","name":"Fortran: fix ICE on bad use of statement function [PR107995]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-24b92e9f-fa6e-4c3c-bad9-e66b6e0de14f-1670707406360@3c-app-gmx-bap38/mbox/"},{"id":32102,"url":"https://patchwork.plctlab.org/api/1.2/patches/32102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-3-ben.boeckel@kitware.com/","msgid":"<20221210222050.1674457-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-12-10T22:20:49","name":"[v4,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-3-ben.boeckel@kitware.com/mbox/"},{"id":32103,"url":"https://patchwork.plctlab.org/api/1.2/patches/32103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-4-ben.boeckel@kitware.com/","msgid":"<20221210222050.1674457-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-12-10T22:20:50","name":"[v4,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-4-ben.boeckel@kitware.com/mbox/"},{"id":32175,"url":"https://patchwork.plctlab.org/api/1.2/patches/32175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1e2eb80-e4bb-0fa7-f3f3-3b17f6a8a885@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-11T11:03:21","name":"[committed] fortran/openmp.cc: Remove '\''s'\'' that slipped in during %<..%> replacement (was: [Patch] Fortran: Replace simple '\''.'\'' quotes by %<.%>)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1e2eb80-e4bb-0fa7-f3f3-3b17f6a8a885@codesourcery.com/mbox/"},{"id":32189,"url":"https://patchwork.plctlab.org/api/1.2/patches/32189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133234.64ABB13413@imap2.suse-dmz.suse.de/","msgid":"<20221211133234.64ABB13413@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-11T13:32:34","name":"[1/2] Treat ADDR_EXPR and CONSTRUCTOR as GIMPLE/GENERIC magically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133234.64ABB13413@imap2.suse-dmz.suse.de/mbox/"},{"id":32190,"url":"https://patchwork.plctlab.org/api/1.2/patches/32190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133252.1DDD913413@imap2.suse-dmz.suse.de/","msgid":"<20221211133252.1DDD913413@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-11T13:32:51","name":"[2/2] tree-optimization/89317 - missed folding of (p + 4) - &p->d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133252.1DDD913413@imap2.suse-dmz.suse.de/mbox/"},{"id":32196,"url":"https://patchwork.plctlab.org/api/1.2/patches/32196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211154519.2681701-1-ibuclaw@gdcproject.org/","msgid":"<20221211154519.2681701-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T15:45:19","name":"[committed] d: Expand bsr intrinsic as `clz(arg) ^ (argsize - 1)'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211154519.2681701-1-ibuclaw@gdcproject.org/mbox/"},{"id":32197,"url":"https://patchwork.plctlab.org/api/1.2/patches/32197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3670826-b9cf-a1a4-4f74-373c356f0994@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-11T16:21:09","name":"[(pushed)] unidiff: use newline='\''\\n'\'' argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3670826-b9cf-a1a4-4f74-373c356f0994@suse.cz/mbox/"},{"id":32198,"url":"https://patchwork.plctlab.org/api/1.2/patches/32198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211175259.2795408-1-ibuclaw@gdcproject.org/","msgid":"<20221211175259.2795408-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T17:52:59","name":"[committed] d: Fix internal compiler error: in visit, at d/imports.cc:72 (PR108050)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211175259.2795408-1-ibuclaw@gdcproject.org/mbox/"},{"id":32199,"url":"https://patchwork.plctlab.org/api/1.2/patches/32199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211181354.2826180-1-ibuclaw@gdcproject.org/","msgid":"<20221211181354.2826180-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T18:13:54","name":"[GCC-12,committed] d: Remove \"final\" and \"override\" from visitor method.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211181354.2826180-1-ibuclaw@gdcproject.org/mbox/"},{"id":32216,"url":"https://patchwork.plctlab.org/api/1.2/patches/32216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8917110-4059-42e7-976e-d948e16611f0-1670798023698@3c-app-gmx-bap41/","msgid":"","list_archive_url":null,"date":"2022-12-11T22:33:43","name":"Fortran: improve checking of assumed size array spec [PR102180]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8917110-4059-42e7-976e-d948e16611f0-1670798023698@3c-app-gmx-bap41/mbox/"},{"id":32224,"url":"https://patchwork.plctlab.org/api/1.2/patches/32224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-1-guojiufu@linux.ibm.com/","msgid":"<20221212013829.111739-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:38:28","name":"[V4,1/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-1-guojiufu@linux.ibm.com/mbox/"},{"id":32225,"url":"https://patchwork.plctlab.org/api/1.2/patches/32225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-2-guojiufu@linux.ibm.com/","msgid":"<20221212013829.111739-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:38:29","name":"[V4,2/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-2-guojiufu@linux.ibm.com/mbox/"},{"id":32228,"url":"https://patchwork.plctlab.org/api/1.2/patches/32228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212014401.112147-1-guojiufu@linux.ibm.com/","msgid":"<20221212014401.112147-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:44:01","name":"[V2] rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212014401.112147-1-guojiufu@linux.ibm.com/mbox/"},{"id":32264,"url":"https://patchwork.plctlab.org/api/1.2/patches/32264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212075441.50129138F3@imap2.suse-dmz.suse.de/","msgid":"<20221212075441.50129138F3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-12T07:54:40","name":"tree-optimization/89317 - another pattern for &p->x != p + 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212075441.50129138F3@imap2.suse-dmz.suse.de/mbox/"},{"id":32266,"url":"https://patchwork.plctlab.org/api/1.2/patches/32266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212085020.40B6813456@imap2.suse-dmz.suse.de/","msgid":"<20221212085020.40B6813456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-12T08:50:19","name":"Revert parts of ADDR_EXPR/CONSTRUCTOR treatment change in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212085020.40B6813456@imap2.suse-dmz.suse.de/mbox/"},{"id":32346,"url":"https://patchwork.plctlab.org/api/1.2/patches/32346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a691b49a-b340-2c23-f047-ae546b183122@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T12:25:21","name":"[(pushed)] mklog: do not parse binary file for PR entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a691b49a-b340-2c23-f047-ae546b183122@suse.cz/mbox/"},{"id":32401,"url":"https://patchwork.plctlab.org/api/1.2/patches/32401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140113.716862-1-jwakely@redhat.com/","msgid":"<20221212140113.716862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:13","name":"[committed] libstdc++: Make operator<< for stacktraces less templated (LWG 3515)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140113.716862-1-jwakely@redhat.com/mbox/"},{"id":32402,"url":"https://patchwork.plctlab.org/api/1.2/patches/32402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140124.716909-1-jwakely@redhat.com/","msgid":"<20221212140124.716909-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:24","name":"[committed] libstdc++: Define atomic lock-free type aliases for C++20 [PR98034]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140124.716909-1-jwakely@redhat.com/mbox/"},{"id":32403,"url":"https://patchwork.plctlab.org/api/1.2/patches/32403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140132.716931-1-jwakely@redhat.com/","msgid":"<20221212140132.716931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:32","name":"[committed] libstdc++: Change names that clash with Win32 or Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140132.716931-1-jwakely@redhat.com/mbox/"},{"id":32405,"url":"https://patchwork.plctlab.org/api/1.2/patches/32405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140139.716962-1-jwakely@redhat.com/","msgid":"<20221212140139.716962-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:39","name":"[committed] libstdc++: Fix constraint on std::basic_format_string [PR108024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140139.716962-1-jwakely@redhat.com/mbox/"},{"id":32404,"url":"https://patchwork.plctlab.org/api/1.2/patches/32404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140146.716976-1-jwakely@redhat.com/","msgid":"<20221212140146.716976-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:46","name":"[committed] libstdc++: Add a test checking for chrono::duration overflows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140146.716976-1-jwakely@redhat.com/mbox/"},{"id":32452,"url":"https://patchwork.plctlab.org/api/1.2/patches/32452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cywimyy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:05","name":"[1/9] ipa-cp: Write transformation summaries of all functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cywimyy.fsf@suse.cz/mbox/"},{"id":32453,"url":"https://patchwork.plctlab.org/api/1.2/patches/32453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65yegimym.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:17","name":"[2/9] ipa: Better way of applying both IPA-CP and IPA-SRA (PR 103227)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65yegimym.fsf@suse.cz/mbox/"},{"id":32455,"url":"https://patchwork.plctlab.org/api/1.2/patches/32455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64ju0imyd.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:26","name":"[3/9] ipa-cp: Leave removal of unused parameters to IPA-SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64ju0imyd.fsf@suse.cz/mbox/"},{"id":32454,"url":"https://patchwork.plctlab.org/api/1.2/patches/32454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6359kimxk.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:55","name":"[4/9] ipa-sra: Treat REFERENCE_TYPES as always dereferencable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6359kimxk.fsf@suse.cz/mbox/"},{"id":32456,"url":"https://patchwork.plctlab.org/api/1.2/patches/32456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri61qp4imwz.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:16","name":"[5/9] ipa-sra: Move caller->callee propagation before callee->caller one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri61qp4imwz.fsf@suse.cz/mbox/"},{"id":32457,"url":"https://patchwork.plctlab.org/api/1.2/patches/32457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zgbsh8ca.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:25","name":"[6/9] ipa-sra: Be optimistic about Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zgbsh8ca.fsf@suse.cz/mbox/"},{"id":32460,"url":"https://patchwork.plctlab.org/api/1.2/patches/32460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1rch8bw.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:39","name":"[7/9] ipa-sra: Forward propagation of sizes which are safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1rch8bw.fsf@suse.cz/mbox/"},{"id":32458,"url":"https://patchwork.plctlab.org/api/1.2/patches/32458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6wn6wh8bn.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:48","name":"[8/9] ipa-sra: Make scan_expr_access bail out on uninteresting expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6wn6wh8bn.fsf@suse.cz/mbox/"},{"id":32459,"url":"https://patchwork.plctlab.org/api/1.2/patches/32459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8mgh8bg.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:55","name":"[9/9] ipa: Avoid looking for IPA-SRA replacements where there are none","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8mgh8bg.fsf@suse.cz/mbox/"},{"id":32463,"url":"https://patchwork.plctlab.org/api/1.2/patches/32463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172057.3527670-1-ppalka@redhat.com/","msgid":"<20221212172057.3527670-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-12T17:20:57","name":"c++: template friend with variadic constraints [PR108066]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172057.3527670-1-ppalka@redhat.com/mbox/"},{"id":32464,"url":"https://patchwork.plctlab.org/api/1.2/patches/32464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172749.49723-1-gcc@hazardy.de/","msgid":"<20221212172749.49723-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:27:49","name":"libstdc++: enable on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172749.49723-1-gcc@hazardy.de/mbox/"},{"id":32465,"url":"https://patchwork.plctlab.org/api/1.2/patches/32465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175508.50143-1-gcc@hazardy.de/","msgid":"<20221212175508.50143-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:55:08","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175508.50143-1-gcc@hazardy.de/mbox/"},{"id":32466,"url":"https://patchwork.plctlab.org/api/1.2/patches/32466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175601.50166-1-gcc@hazardy.de/","msgid":"<20221212175601.50166-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:56:01","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175601.50166-1-gcc@hazardy.de/mbox/"},{"id":32514,"url":"https://patchwork.plctlab.org/api/1.2/patches/32514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212192557.52896-1-ibuclaw@gdcproject.org/","msgid":"<20221212192557.52896-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-12T19:25:57","name":"[committed] d: Fix undefined reference to nested lambda in template (PR108055)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212192557.52896-1-ibuclaw@gdcproject.org/mbox/"},{"id":32526,"url":"https://patchwork.plctlab.org/api/1.2/patches/32526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7efcc196-d97a-4fa6-bd76-48e9eb90d528-1670876532663@3c-app-gmx-bs69/","msgid":"","list_archive_url":null,"date":"2022-12-12T20:22:12","name":"Fortran: NULL pointer dereference while parsing a function [PR107423]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7efcc196-d97a-4fa6-bd76-48e9eb90d528-1670876532663@3c-app-gmx-bs69/mbox/"},{"id":32546,"url":"https://patchwork.plctlab.org/api/1.2/patches/32546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWouEWbE=TkZ63D8fPeyJTKCVkLyobwsO5Go6BtDxib7g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-12T22:18:32","name":"libgo patch committed: Bump major version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWouEWbE=TkZ63D8fPeyJTKCVkLyobwsO5Go6BtDxib7g@mail.gmail.com/mbox/"},{"id":32597,"url":"https://patchwork.plctlab.org/api/1.2/patches/32597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com/","msgid":"<1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com>","list_archive_url":null,"date":"2022-12-13T02:31:15","name":"libgccjit: Allow comparing vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com/mbox/"},{"id":32649,"url":"https://patchwork.plctlab.org/api/1.2/patches/32649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5gZ0o1nzCq9MmR9@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-13T06:21:06","name":"[V2] Rework 128-bit complex multiply and divide, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5gZ0o1nzCq9MmR9@toto.the-meissners.org/mbox/"},{"id":32655,"url":"https://patchwork.plctlab.org/api/1.2/patches/32655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213064927.1416-1-shihua@iscas.ac.cn/","msgid":"<20221213064927.1416-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2022-12-13T06:49:27","name":"[RFC] RISC-V: Support RV64-ILP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213064927.1416-1-shihua@iscas.ac.cn/mbox/"},{"id":32721,"url":"https://patchwork.plctlab.org/api/1.2/patches/32721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hD4qnv/ddcKxyQ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:20:34","name":"i386: Fix up *concat*_{5,6,7} patterns [PR108044]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hD4qnv/ddcKxyQ@tucnak/mbox/"},{"id":32722,"url":"https://patchwork.plctlab.org/api/1.2/patches/32722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hFd0dYk/ijv5jQ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:27:19","name":"vect-patterns: Fix up vect_recog_rotate_pattern [PR108064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hFd0dYk/ijv5jQ@tucnak/mbox/"},{"id":32725,"url":"https://patchwork.plctlab.org/api/1.2/patches/32725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hHQJj9a5Fa4ILA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:34:56","name":"[committed] libsanitizer: Fix up libbacktrace build after r13-4547 [PR108072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hHQJj9a5Fa4ILA@tucnak/mbox/"},{"id":32727,"url":"https://patchwork.plctlab.org/api/1.2/patches/32727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hImCyw/3IIhGuT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:40:40","name":"c++, libstdc++: Add typeinfo for _Float{16,32,64,128,32x,64x} and __bf16 types [PR108075]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hImCyw/3IIhGuT@tucnak/mbox/"},{"id":32728,"url":"https://patchwork.plctlab.org/api/1.2/patches/32728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hJdyuDW5yvCyz6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:44:23","name":"libstdc++: Update backtrace-rename.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hJdyuDW5yvCyz6@tucnak/mbox/"},{"id":32748,"url":"https://patchwork.plctlab.org/api/1.2/patches/32748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213104156.A1875383EB15@sourceware.org/","msgid":"<20221213104156.A1875383EB15@sourceware.org>","list_archive_url":null,"date":"2022-12-13T10:41:10","name":"tree-optimization/108076 - if-conversion and forced labels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213104156.A1875383EB15@sourceware.org/mbox/"},{"id":32794,"url":"https://patchwork.plctlab.org/api/1.2/patches/32794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilifeb2h.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-12-13T12:35:02","name":"build: doc: Obsolete Solaris 11.3 support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilifeb2h.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":32833,"url":"https://patchwork.plctlab.org/api/1.2/patches/32833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213141055.10CCA383B6EC@sourceware.org/","msgid":"<20221213141055.10CCA383B6EC@sourceware.org>","list_archive_url":null,"date":"2022-12-13T14:10:09","name":"tree-optimization/105801 - CCP and .DEFERRED_INIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213141055.10CCA383B6EC@sourceware.org/mbox/"},{"id":32871,"url":"https://patchwork.plctlab.org/api/1.2/patches/32871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com/","msgid":"<0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com>","list_archive_url":null,"date":"2022-12-13T16:12:22","name":"[OG12,committed] OpenMP, libgomp: Handle unified shared memory in omp_target_is_accessible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com/mbox/"},{"id":32872,"url":"https://patchwork.plctlab.org/api/1.2/patches/32872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a599f6ae-ac6d-7c59-890a-104e4d5e3e1c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T16:29:26","name":"[Fortran] libgfortran'\''s ISO_Fortran_binding.c: Use GCC11 version for backward-only code [PR108056]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a599f6ae-ac6d-7c59-890a-104e4d5e3e1c@codesourcery.com/mbox/"},{"id":32873,"url":"https://patchwork.plctlab.org/api/1.2/patches/32873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa14a602-d3d2-c5f7-a5d6-62aff32b7b7e@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T16:38:22","name":"Fortran: Extend align-clause checks of OpenMP'\''s allocate clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa14a602-d3d2-c5f7-a5d6-62aff32b7b7e@codesourcery.com/mbox/"},{"id":32895,"url":"https://patchwork.plctlab.org/api/1.2/patches/32895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16700-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T17:14:27","name":"AArch64 Fix ILP32 tbranch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16700-tamar@arm.com/mbox/"},{"id":32901,"url":"https://patchwork.plctlab.org/api/1.2/patches/32901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com/","msgid":"<857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com>","list_archive_url":null,"date":"2022-12-13T17:44:27","name":"OpenMP: Parse align clause in allocate directive in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com/mbox/"},{"id":32923,"url":"https://patchwork.plctlab.org/api/1.2/patches/32923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-2-david.faust@oracle.com/","msgid":"<20221213184426.8861-2-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:24","name":"[v2,1/3] btf: add '\''extern'\'' linkage for variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-2-david.faust@oracle.com/mbox/"},{"id":32924,"url":"https://patchwork.plctlab.org/api/1.2/patches/32924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-3-david.faust@oracle.com/","msgid":"<20221213184426.8861-3-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:25","name":"[v2,2/3] btf: fix '\''extern const void'\'' variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-3-david.faust@oracle.com/mbox/"},{"id":32925,"url":"https://patchwork.plctlab.org/api/1.2/patches/32925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-4-david.faust@oracle.com/","msgid":"<20221213184426.8861-4-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:26","name":"[v2,3/3] btf: correct generation for extern funcs [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-4-david.faust@oracle.com/mbox/"},{"id":32946,"url":"https://patchwork.plctlab.org/api/1.2/patches/32946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213210247.50375-1-gcc@hazardy.de/","msgid":"<20221213210247.50375-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-13T21:02:47","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213210247.50375-1-gcc@hazardy.de/mbox/"},{"id":32964,"url":"https://patchwork.plctlab.org/api/1.2/patches/32964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213224548.853922-1-ibuclaw@gdcproject.org/","msgid":"<20221213224548.853922-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T22:45:48","name":"[GCC-12,committed] libphobos: Backport library and bindings fixes from mainline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213224548.853922-1-ibuclaw@gdcproject.org/mbox/"},{"id":32976,"url":"https://patchwork.plctlab.org/api/1.2/patches/32976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230344.872210-1-ibuclaw@gdcproject.org/","msgid":"<20221213230344.872210-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T23:03:44","name":"[GCC-11,committed] libphobos: Backport library and bindings fixes from mainline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230344.872210-1-ibuclaw@gdcproject.org/mbox/"},{"id":32977,"url":"https://patchwork.plctlab.org/api/1.2/patches/32977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230552.874531-1-ibuclaw@gdcproject.org/","msgid":"<20221213230552.874531-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T23:05:52","name":"[GCC-10,committed] libphobos: Fix std.path.expandTilde raising onOutOfMemory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230552.874531-1-ibuclaw@gdcproject.org/mbox/"},{"id":33011,"url":"https://patchwork.plctlab.org/api/1.2/patches/33011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e072e22428810ff407f96ce3d9e062b8@matoro.tk/","msgid":"","list_archive_url":null,"date":"2022-12-14T01:04:09","name":"libgo: add hppa as known target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e072e22428810ff407f96ce3d9e062b8@matoro.tk/mbox/"},{"id":33013,"url":"https://patchwork.plctlab.org/api/1.2/patches/33013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214014338.85391-1-haochen.jiang@intel.com/","msgid":"<20221214014338.85391-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-12-14T01:43:38","name":"Fix intrin name in Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214014338.85391-1-haochen.jiang@intel.com/mbox/"},{"id":33018,"url":"https://patchwork.plctlab.org/api/1.2/patches/33018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214021842.1015348-1-hongtao.liu@intel.com/","msgid":"<20221214021842.1015348-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-14T02:18:42","name":"[x86] x86: Don'\''t add crtfastmath.o for -shared and add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214021842.1015348-1-hongtao.liu@intel.com/mbox/"},{"id":33073,"url":"https://patchwork.plctlab.org/api/1.2/patches/33073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214064825.240605-1-juzhe.zhong@rivai.ai/","msgid":"<20221214064825.240605-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T06:48:25","name":"RISC-V: Fix RVV mask mode size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214064825.240605-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33074,"url":"https://patchwork.plctlab.org/api/1.2/patches/33074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214065744.124007-1-juzhe.zhong@rivai.ai/","msgid":"<20221214065744.124007-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T06:57:44","name":"RISC-V: Change vlmul printing rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214065744.124007-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33075,"url":"https://patchwork.plctlab.org/api/1.2/patches/33075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214070156.37689-1-juzhe.zhong@rivai.ai/","msgid":"<20221214070156.37689-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:01:56","name":"RISC-V: Fix RVV machine mode attribute configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214070156.37689-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33082,"url":"https://patchwork.plctlab.org/api/1.2/patches/33082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214071345.153278-1-juzhe.zhong@rivai.ai/","msgid":"<20221214071345.153278-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:13:45","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214071345.153278-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33085,"url":"https://patchwork.plctlab.org/api/1.2/patches/33085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073106.122871-1-juzhe.zhong@rivai.ai/","msgid":"<20221214073106.122871-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:31:06","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073106.122871-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33087,"url":"https://patchwork.plctlab.org/api/1.2/patches/33087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073111.124081-1-juzhe.zhong@rivai.ai/","msgid":"<20221214073111.124081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:31:11","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073111.124081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33089,"url":"https://patchwork.plctlab.org/api/1.2/patches/33089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214074848.39A3238358AD@sourceware.org/","msgid":"<20221214074848.39A3238358AD@sourceware.org>","list_archive_url":null,"date":"2022-12-14T07:48:03","name":"tree-optimization/107617 - big-endian .LEN_STORE VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214074848.39A3238358AD@sourceware.org/mbox/"},{"id":33090,"url":"https://patchwork.plctlab.org/api/1.2/patches/33090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz/","msgid":"<116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz>","list_archive_url":null,"date":"2022-12-14T07:55:01","name":"[(pushed)] docs: document --param=ipa-sra-ptrwrap-growth-factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz/mbox/"},{"id":33091,"url":"https://patchwork.plctlab.org/api/1.2/patches/33091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhict3i.fsf@debian/","msgid":"<87sfhict3i.fsf@debian>","list_archive_url":null,"date":"2022-12-14T08:00:49","name":"[v5,1a/19] modula2 front end: (long unedited patches).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhict3i.fsf@debian/mbox/"},{"id":33097,"url":"https://patchwork.plctlab.org/api/1.2/patches/33097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214080931.192028-1-juzhe.zhong@rivai.ai/","msgid":"<20221214080931.192028-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:09:31","name":"RISC-V: Add testcases for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214080931.192028-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33098,"url":"https://patchwork.plctlab.org/api/1.2/patches/33098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081301.218683-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081301.218683-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:13:01","name":"RISC-V: Add testcases for VSETVL PASS 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081301.218683-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33099,"url":"https://patchwork.plctlab.org/api/1.2/patches/33099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081548.253313-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081548.253313-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:15:48","name":"RISC-V: Add testcases for VSETVL PASS 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081548.253313-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33103,"url":"https://patchwork.plctlab.org/api/1.2/patches/33103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081935.256992-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081935.256992-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:19:35","name":"RISC-V: Add testcases for VSETVL PASS 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081935.256992-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33104,"url":"https://patchwork.plctlab.org/api/1.2/patches/33104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214082558.261570-1-juzhe.zhong@rivai.ai/","msgid":"<20221214082558.261570-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:25:58","name":"RISC-V: Add testcases for VSETVL PASS 5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214082558.261570-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33106,"url":"https://patchwork.plctlab.org/api/1.2/patches/33106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214083902.169785-1-juzhe.zhong@rivai.ai/","msgid":"<20221214083902.169785-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:39:02","name":"RISC-V: Fix annotation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214083902.169785-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33110,"url":"https://patchwork.plctlab.org/api/1.2/patches/33110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214085148.229220-1-juzhe.zhong@rivai.ai/","msgid":"<20221214085148.229220-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:51:48","name":"RISC-V: Remove unused redundant vector attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214085148.229220-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33116,"url":"https://patchwork.plctlab.org/api/1.2/patches/33116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5mT93N/K83jqSz7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-14T09:14:31","name":"rust: Fix up aarch64-linux bootstrap [PR106072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5mT93N/K83jqSz7@tucnak/mbox/"},{"id":33153,"url":"https://patchwork.plctlab.org/api/1.2/patches/33153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672593b-414a-d1b4-8e84-abdba0915410@suse.cz/","msgid":"<2672593b-414a-d1b4-8e84-abdba0915410@suse.cz>","list_archive_url":null,"date":"2022-12-14T10:34:24","name":"[(pushed)] mklog: do not depend on recent unidiff version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672593b-414a-d1b4-8e84-abdba0915410@suse.cz/mbox/"},{"id":33155,"url":"https://patchwork.plctlab.org/api/1.2/patches/33155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com/","msgid":"<11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com>","list_archive_url":null,"date":"2022-12-14T10:47:21","name":"Fortran/OpenMP: Add parsing support for allocators directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com/mbox/"},{"id":33160,"url":"https://patchwork.plctlab.org/api/1.2/patches/33160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com/","msgid":"<055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com>","list_archive_url":null,"date":"2022-12-14T11:21:20","name":"rs6000: Raise error for __vector_{quad, pair} uses without MMA enabled [PR106736]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com/mbox/"},{"id":33163,"url":"https://patchwork.plctlab.org/api/1.2/patches/33163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214113641.63320-1-juzhe.zhong@rivai.ai/","msgid":"<20221214113641.63320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T11:36:41","name":"RISC-V: Remove unit-stride store from ta attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214113641.63320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33197,"url":"https://patchwork.plctlab.org/api/1.2/patches/33197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0c0c26b-dbcd-9619-ee9c-f3ff3081f4ea@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:07:38","name":"[(pushed)] contrib: add copyright for my scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0c0c26b-dbcd-9619-ee9c-f3ff3081f4ea@suse.cz/mbox/"},{"id":33198,"url":"https://patchwork.plctlab.org/api/1.2/patches/33198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a95b8b6e-5685-52fa-0190-793eede45b19@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:10:32","name":"contrib: add contrib to update-copyright.py script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a95b8b6e-5685-52fa-0190-793eede45b19@suse.cz/mbox/"},{"id":33205,"url":"https://patchwork.plctlab.org/api/1.2/patches/33205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfRj26CgWLBq=9M4AsC5WhhXOW4s3ynbjoSt2n8mv6LbRA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:39:24","name":"libgccjit: Fix a failing test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfRj26CgWLBq=9M4AsC5WhhXOW4s3ynbjoSt2n8mv6LbRA@mail.gmail.com/mbox/"},{"id":33224,"url":"https://patchwork.plctlab.org/api/1.2/patches/33224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214141151.933092-1-jwakely@redhat.com/","msgid":"<20221214141151.933092-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-14T14:11:51","name":"[committed] libstdc++: Fix size passed to operator delete [PR108097]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214141151.933092-1-jwakely@redhat.com/mbox/"},{"id":33235,"url":"https://patchwork.plctlab.org/api/1.2/patches/33235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfhirp37.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T15:18:20","name":"ipa-sra: Fix address escape case when detecting Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfhirp37.fsf@suse.cz/mbox/"},{"id":33236,"url":"https://patchwork.plctlab.org/api/1.2/patches/33236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7s6rp25.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T15:18:58","name":"ipa-sra: Consider the first parameter of methods safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7s6rp25.fsf@suse.cz/mbox/"},{"id":33251,"url":"https://patchwork.plctlab.org/api/1.2/patches/33251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkry1rarli2.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T16:35:49","name":"[10/15,V6] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkry1rarli2.fsf_-_@arm.com/mbox/"},{"id":33254,"url":"https://patchwork.plctlab.org/api/1.2/patches/33254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrsfhirla6.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T16:40:33","name":"[12/15,V4] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrsfhirla6.fsf_-_@arm.com/mbox/"},{"id":33266,"url":"https://patchwork.plctlab.org/api/1.2/patches/33266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214174825.2340493-1-ppalka@redhat.com/","msgid":"<20221214174825.2340493-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-14T17:48:25","name":"c++: local alias in typename in lambda [PR105518]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214174825.2340493-1-ppalka@redhat.com/mbox/"},{"id":33320,"url":"https://patchwork.plctlab.org/api/1.2/patches/33320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccd68154-65bc-bd4b-be6b-cf71d00ee8e6@gmx.de/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:03:08","name":"gcov: annotate uncovered branches [PR107537]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccd68154-65bc-bd4b-be6b-cf71d00ee8e6@gmx.de/mbox/"},{"id":33358,"url":"https://patchwork.plctlab.org/api/1.2/patches/33358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5oy3GcsxSQ5xpgM@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:32:28","name":"[1/3,V3] PR 107299, Rework 128-bit complex multiply and divide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5oy3GcsxSQ5xpgM@toto.the-meissners.org/mbox/"},{"id":33360,"url":"https://patchwork.plctlab.org/api/1.2/patches/33360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozVm5L+crILT33@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:34:30","name":"[2/3,V3] PR 107299, Make __float128 use the _Float128 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozVm5L+crILT33@toto.the-meissners.org/mbox/"},{"id":33362,"url":"https://patchwork.plctlab.org/api/1.2/patches/33362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozoQgEvX1iAgY7@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:35:45","name":"[3/3,V3] PR 107299, Update float 128-bit conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozoQgEvX1iAgY7@toto.the-meissners.org/mbox/"},{"id":33374,"url":"https://patchwork.plctlab.org/api/1.2/patches/33374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214210938.356311-1-dmalcolm@redhat.com/","msgid":"<20221214210938.356311-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-14T21:09:38","name":"[committed] analyzer: don'\''t call binding_key::make on empty regions [PR108065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214210938.356311-1-dmalcolm@redhat.com/mbox/"},{"id":33394,"url":"https://patchwork.plctlab.org/api/1.2/patches/33394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcla8yz.fsf@euler.schwinge.homeip.net/","msgid":"<87pmcla8yz.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-14T22:58:28","name":"Make '\''-frust-incomplete-and-experimental-compiler-do-not-use'\'' a '\''Common'\'' option (was: Rust front-end patches v4)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcla8yz.fsf@euler.schwinge.homeip.net/mbox/"},{"id":33438,"url":"https://patchwork.plctlab.org/api/1.2/patches/33438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215000145.2381507-1-ppalka@redhat.com/","msgid":"<20221215000145.2381507-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-15T00:01:45","name":"c++: partial ordering with memfn pointer cst [PR108104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215000145.2381507-1-ppalka@redhat.com/mbox/"},{"id":33481,"url":"https://patchwork.plctlab.org/api/1.2/patches/33481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215052557.608641-1-jason@redhat.com/","msgid":"<20221215052557.608641-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-15T05:25:57","name":"[pushed] c++: fix initializer_list transformation [PR108071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215052557.608641-1-jason@redhat.com/mbox/"},{"id":33483,"url":"https://patchwork.plctlab.org/api/1.2/patches/33483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-1-hongtao.liu@intel.com/","msgid":"<20221215062137.3128845-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-15T06:21:36","name":"[V2,1/2] x86: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-1-hongtao.liu@intel.com/mbox/"},{"id":33484,"url":"https://patchwork.plctlab.org/api/1.2/patches/33484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-2-hongtao.liu@intel.com/","msgid":"<20221215062137.3128845-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-15T06:21:37","name":"[V2,2/2,x86] x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-2-hongtao.liu@intel.com/mbox/"},{"id":33542,"url":"https://patchwork.plctlab.org/api/1.2/patches/33542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5rSYNlWHHku4M/H@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-15T07:53:04","name":"into-ssa: Fix emitting debug stmts after asm goto [PR108095]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5rSYNlWHHku4M/H@tucnak/mbox/"},{"id":33567,"url":"https://patchwork.plctlab.org/api/1.2/patches/33567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215103253.896A8388CA4D@sourceware.org/","msgid":"<20221215103253.896A8388CA4D@sourceware.org>","list_archive_url":null,"date":"2022-12-15T10:32:06","name":"middle-end/108086 - reduce operand scanner use from inliner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215103253.896A8388CA4D@sourceware.org/mbox/"},{"id":33609,"url":"https://patchwork.plctlab.org/api/1.2/patches/33609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5sR1W/p4K0CEMRU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-15T12:23:49","name":"testsuite: Add support for Rust and Modula-2 effective target tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5sR1W/p4K0CEMRU@tucnak/mbox/"},{"id":33646,"url":"https://patchwork.plctlab.org/api/1.2/patches/33646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215130013.46408388CF26@sourceware.org/","msgid":"<20221215130013.46408388CF26@sourceware.org>","list_archive_url":null,"date":"2022-12-15T12:58:37","name":"middle-end/108086 - avoid quadraticness in copy_edges_for_bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215130013.46408388CF26@sourceware.org/mbox/"},{"id":33656,"url":"https://patchwork.plctlab.org/api/1.2/patches/33656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhgbuy0.fsf@debian/","msgid":"<87sfhgbuy0.fsf@debian>","list_archive_url":null,"date":"2022-12-15T14:30:47","name":"[committed,pushed] PR-107607 m2: Remove bdepend on realpath, cut and echo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhgbuy0.fsf@debian/mbox/"},{"id":33699,"url":"https://patchwork.plctlab.org/api/1.2/patches/33699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215161535.2731182-1-ppalka@redhat.com/","msgid":"<20221215161535.2731182-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-15T16:15:35","name":"c++: variadic using-decl with parm pack in terminal name [PR102104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215161535.2731182-1-ppalka@redhat.com/mbox/"},{"id":33710,"url":"https://patchwork.plctlab.org/api/1.2/patches/33710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215163340.1802736-1-siddhesh@gotplt.org/","msgid":"<20221215163340.1802736-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T16:33:40","name":"middle-end/70090: Document that -fsanitize=object-size uses dynamic size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215163340.1802736-1-siddhesh@gotplt.org/mbox/"},{"id":33732,"url":"https://patchwork.plctlab.org/api/1.2/patches/33732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215165814.1808816-1-siddhesh@gotplt.org/","msgid":"<20221215165814.1808816-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T16:58:14","name":"doc: Fix documentation for __builtin_dynamic_object_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215165814.1808816-1-siddhesh@gotplt.org/mbox/"},{"id":33778,"url":"https://patchwork.plctlab.org/api/1.2/patches/33778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a63ofrpf.fsf@euler.schwinge.homeip.net/","msgid":"<87a63ofrpf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-15T18:27:08","name":"nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution (was: [committed][nvptx] Add uniform_warp_check insn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a63ofrpf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":33799,"url":"https://patchwork.plctlab.org/api/1.2/patches/33799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215192548.1999425-1-siddhesh@gotplt.org/","msgid":"<20221215192548.1999425-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T19:25:48","name":"tree-optimization/105043: Object Size Checking docs cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215192548.1999425-1-siddhesh@gotplt.org/mbox/"},{"id":33802,"url":"https://patchwork.plctlab.org/api/1.2/patches/33802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com/","msgid":"<5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com>","list_archive_url":null,"date":"2022-12-15T19:28:44","name":"[committed,PR90706] IRA: Check that reg classes contain a hard reg of given mode in reg move cost calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com/mbox/"},{"id":33901,"url":"https://patchwork.plctlab.org/api/1.2/patches/33901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216083034.ACE883817F8B@sourceware.org/","msgid":"<20221216083034.ACE883817F8B@sourceware.org>","list_archive_url":null,"date":"2022-12-16T08:29:39","name":"middle-end/108086 - more operand scanner reduction in inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216083034.ACE883817F8B@sourceware.org/mbox/"},{"id":33913,"url":"https://patchwork.plctlab.org/api/1.2/patches/33913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5w2HuVCI8qOxaTP@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-16T09:10:54","name":"loop-invariant: Split preheader edge if the preheader bb ends with jump [PR106751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5w2HuVCI8qOxaTP@tucnak/mbox/"},{"id":33917,"url":"https://patchwork.plctlab.org/api/1.2/patches/33917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com/","msgid":"<780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com>","list_archive_url":null,"date":"2022-12-16T09:18:11","name":"gcc-changelog/git_email.py: Support older unidiff.PatchSet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com/mbox/"},{"id":33918,"url":"https://patchwork.plctlab.org/api/1.2/patches/33918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216092922.B1681382EF28@sourceware.org/","msgid":"<20221216092922.B1681382EF28@sourceware.org>","list_archive_url":null,"date":"2022-12-16T09:28:38","name":"middle-end/108086 - remove PR28238 fix superseeded by PR34018 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216092922.B1681382EF28@sourceware.org/mbox/"},{"id":33937,"url":"https://patchwork.plctlab.org/api/1.2/patches/33937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216102521.73271-1-sebastian.huber@embedded-brains.de/","msgid":"<20221216102521.73271-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-16T10:25:21","name":"[v2] gcov: Fix -fprofile-update=atomic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216102521.73271-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":33938,"url":"https://patchwork.plctlab.org/api/1.2/patches/33938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5xIHotpDlePrJwq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-16T10:27:42","name":"hwasan: Add libhwasan_preinit.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5xIHotpDlePrJwq@tucnak/mbox/"},{"id":33940,"url":"https://patchwork.plctlab.org/api/1.2/patches/33940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz/","msgid":"<8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz>","list_archive_url":null,"date":"2022-12-16T11:23:32","name":"[(pushed)] gcc-changelog: do not use PatchSet.from_filename","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz/mbox/"},{"id":33944,"url":"https://patchwork.plctlab.org/api/1.2/patches/33944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85ead47-3163-ff07-4f7b-63f53e2557ee@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T11:45:59","name":"[OG12,committed] libgomp: Fix USM bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85ead47-3163-ff07-4f7b-63f53e2557ee@codesourcery.com/mbox/"},{"id":33947,"url":"https://patchwork.plctlab.org/api/1.2/patches/33947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216120617.1A7CB384D6C3@sourceware.org/","msgid":"<20221216120617.1A7CB384D6C3@sourceware.org>","list_archive_url":null,"date":"2022-12-16T12:05:31","name":"middle-end/108086 - avoid unshare_expr when remapping SSA names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216120617.1A7CB384D6C3@sourceware.org/mbox/"},{"id":33948,"url":"https://patchwork.plctlab.org/api/1.2/patches/33948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5c3e7dc-2244-99ca-c584-f157eca131b4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T12:33:22","name":"gcc-changelog: Add warning for auto-added files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5c3e7dc-2244-99ca-c584-f157eca131b4@codesourcery.com/mbox/"},{"id":33955,"url":"https://patchwork.plctlab.org/api/1.2/patches/33955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216133437.56618383F208@sourceware.org/","msgid":"<20221216133437.56618383F208@sourceware.org>","list_archive_url":null,"date":"2022-12-16T13:33:53","name":"Simplify gimple_assign_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216133437.56618383F208@sourceware.org/mbox/"},{"id":33957,"url":"https://patchwork.plctlab.org/api/1.2/patches/33957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87k02r78va.fsf@debian/","msgid":"<87k02r78va.fsf@debian>","list_archive_url":null,"date":"2022-12-16T13:53:29","name":"[m2] Add missing m2.stage{profile,feedback} to Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87k02r78va.fsf@debian/mbox/"},{"id":33958,"url":"https://patchwork.plctlab.org/api/1.2/patches/33958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-12-16T14:10:12","name":"Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere (was: Make '\''-frust-incomplete-and-experimental-compiler-do-not-use'\'' a '\''Common'\'' option)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":33959,"url":"https://patchwork.plctlab.org/api/1.2/patches/33959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216143105.118483-1-jwakely@redhat.com/","msgid":"<20221216143105.118483-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T14:31:05","name":"[committed] libstdc++: Fix self-move for std::weak_ptr [PR108118]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216143105.118483-1-jwakely@redhat.com/mbox/"},{"id":33994,"url":"https://patchwork.plctlab.org/api/1.2/patches/33994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216161054.3663182-1-manolis.tsamis@vrull.eu/","msgid":"<20221216161054.3663182-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-12-16T16:10:54","name":"[v2] ipa-cp: Speculatively call specialized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216161054.3663182-1-manolis.tsamis@vrull.eu/mbox/"},{"id":34001,"url":"https://patchwork.plctlab.org/api/1.2/patches/34001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd877978-48c4-4a9b-66f9-a105d9901ec1@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T16:19:00","name":"nvptx/mkoffload.cc: Add dummy proc for OpenMP rev-offload table [PR108098]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd877978-48c4-4a9b-66f9-a105d9901ec1@codesourcery.com/mbox/"},{"id":34026,"url":"https://patchwork.plctlab.org/api/1.2/patches/34026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216164526.224772-1-ppalka@redhat.com/","msgid":"<20221216164526.224772-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-16T16:45:26","name":"c++: empty captured var as template argument [PR107437]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216164526.224772-1-ppalka@redhat.com/mbox/"},{"id":34031,"url":"https://patchwork.plctlab.org/api/1.2/patches/34031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170118.457649-1-dmalcolm@redhat.com/","msgid":"<20221216170118.457649-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T17:01:18","name":"gccrs: add selftest-rust-gdb and selftest-rust-valgrind \"make\" targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170118.457649-1-dmalcolm@redhat.com/mbox/"},{"id":34032,"url":"https://patchwork.plctlab.org/api/1.2/patches/34032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170152.457701-1-dmalcolm@redhat.com/","msgid":"<20221216170152.457701-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T17:01:52","name":"gccrs: avoid printing to stderr in selftest::rust_flatten_list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170152.457701-1-dmalcolm@redhat.com/mbox/"},{"id":34042,"url":"https://patchwork.plctlab.org/api/1.2/patches/34042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216182817.295303-1-polacek@redhat.com/","msgid":"<20221216182817.295303-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-12-16T18:28:17","name":"c-family: Fix ICE with -Wsuggest-attribute [PR98487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216182817.295303-1-polacek@redhat.com/mbox/"},{"id":34069,"url":"https://patchwork.plctlab.org/api/1.2/patches/34069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216195355.465351-1-dmalcolm@redhat.com/","msgid":"<20221216195355.465351-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T19:53:55","name":"[committed] analyzer: add src_region param to region_model::check_for_poison [PR106479]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216195355.465351-1-dmalcolm@redhat.com/mbox/"},{"id":34085,"url":"https://patchwork.plctlab.org/api/1.2/patches/34085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210028.161738-1-jwakely@redhat.com/","msgid":"<20221216210028.161738-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:00:28","name":"[committed] libstdc++: Diagnose broken allocator rebind members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210028.161738-1-jwakely@redhat.com/mbox/"},{"id":34086,"url":"https://patchwork.plctlab.org/api/1.2/patches/34086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210237.161771-1-jwakely@redhat.com/","msgid":"<20221216210237.161771-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:02:37","name":"[committed] libstdc++: Fixes for std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210237.161771-1-jwakely@redhat.com/mbox/"},{"id":34087,"url":"https://patchwork.plctlab.org/api/1.2/patches/34087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210251.162105-1-jwakely@redhat.com/","msgid":"<20221216210251.162105-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:02:51","name":"[committed] libstdc++: Add monadic operations to std::expected for C++23 (P2505R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210251.162105-1-jwakely@redhat.com/mbox/"},{"id":34091,"url":"https://patchwork.plctlab.org/api/1.2/patches/34091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216213132.578277-1-hjl.tools@gmail.com/","msgid":"<20221216213132.578277-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-12-16T21:31:32","name":"libsanitizer: Add __interceptor_sigsetjmp_internal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216213132.578277-1-hjl.tools@gmail.com/mbox/"},{"id":34100,"url":"https://patchwork.plctlab.org/api/1.2/patches/34100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5zpMNyFTOcgqqDf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-16T21:54:56","name":"[committed] Suppress warning from -fstack-protector on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5zpMNyFTOcgqqDf@mx3210.localdomain/mbox/"},{"id":34214,"url":"https://patchwork.plctlab.org/api/1.2/patches/34214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1r6aspb.fsf@debian/","msgid":"<87y1r6aspb.fsf@debian>","list_archive_url":null,"date":"2022-12-17T16:41:20","name":"[m2] : PR-108122 Reduce sleep times in gm2/pimcoroutines/run/pass/testtime.mod","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1r6aspb.fsf@debian/mbox/"},{"id":34218,"url":"https://patchwork.plctlab.org/api/1.2/patches/34218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com/","msgid":"<5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com>","list_archive_url":null,"date":"2022-12-17T17:12:43","name":"[fortran] PR107397 ICE in gfc_arith_plus, at fortran/arith.cc:654","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com/mbox/"},{"id":34269,"url":"https://patchwork.plctlab.org/api/1.2/patches/34269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f80f540e394e87ac70349bad109bfc4b465c7c98.1671310804.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-12-17T21:01:51","name":"rs6000: Add Rust support to traceback table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f80f540e394e87ac70349bad109bfc4b465c7c98.1671310804.git.segher@kernel.crashing.org/mbox/"},{"id":34270,"url":"https://patchwork.plctlab.org/api/1.2/patches/34270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-3d8a6fbe-9e01-4e21-960b-3fde6a9d9f51-1671312077244@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2022-12-17T21:21:17","name":"Fortran: incorrect array bounds when bound intrinsic used in decl [PR108131]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-3d8a6fbe-9e01-4e21-960b-3fde6a9d9f51-1671312077244@3c-app-gmx-bap49/mbox/"},{"id":34354,"url":"https://patchwork.plctlab.org/api/1.2/patches/34354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-2-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:28","name":"[v2,01/11] riscv: attr: Synchronize comments with code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-2-christoph.muellner@vrull.eu/mbox/"},{"id":34356,"url":"https://patchwork.plctlab.org/api/1.2/patches/34356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-3-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:29","name":"[v2,02/11] riscv: Restructure callee-saved register save/restore code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-3-christoph.muellner@vrull.eu/mbox/"},{"id":34360,"url":"https://patchwork.plctlab.org/api/1.2/patches/34360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-4-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:30","name":"[v2,03/11] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-4-christoph.muellner@vrull.eu/mbox/"},{"id":34357,"url":"https://patchwork.plctlab.org/api/1.2/patches/34357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-5-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:31","name":"[v2,04/11] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-5-christoph.muellner@vrull.eu/mbox/"},{"id":34361,"url":"https://patchwork.plctlab.org/api/1.2/patches/34361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-6-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:32","name":"[v2,05/11] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-6-christoph.muellner@vrull.eu/mbox/"},{"id":34358,"url":"https://patchwork.plctlab.org/api/1.2/patches/34358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-7-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:33","name":"[v2,06/11] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-7-christoph.muellner@vrull.eu/mbox/"},{"id":34359,"url":"https://patchwork.plctlab.org/api/1.2/patches/34359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-8-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:34","name":"[v2,07/11] riscv: thead: Add support for th XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-8-christoph.muellner@vrull.eu/mbox/"},{"id":34362,"url":"https://patchwork.plctlab.org/api/1.2/patches/34362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-9-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:35","name":"[v2,08/11] riscv: thead: Add support for XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-9-christoph.muellner@vrull.eu/mbox/"},{"id":34363,"url":"https://patchwork.plctlab.org/api/1.2/patches/34363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-10-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:36","name":"[v2,09/11] riscv: thead: Add support for XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-10-christoph.muellner@vrull.eu/mbox/"},{"id":34364,"url":"https://patchwork.plctlab.org/api/1.2/patches/34364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-11-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-11-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:37","name":"[v2,10/11] riscv: thead: Add support for XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-11-christoph.muellner@vrull.eu/mbox/"},{"id":34365,"url":"https://patchwork.plctlab.org/api/1.2/patches/34365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-12-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-12-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:38","name":"[v2,11/11] riscv: thead: Add support for XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-12-christoph.muellner@vrull.eu/mbox/"},{"id":34452,"url":"https://patchwork.plctlab.org/api/1.2/patches/34452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com/","msgid":"<3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com>","list_archive_url":null,"date":"2022-12-19T06:27:57","name":"[v6,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com/mbox/"},{"id":34453,"url":"https://patchwork.plctlab.org/api/1.2/patches/34453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e66cfc44-22c1-072d-0af2-b9fe585012a9@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T08:11:59","name":"fold-const: Treat fp conversion to a type with same mode as copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e66cfc44-22c1-072d-0af2-b9fe585012a9@linux.ibm.com/mbox/"},{"id":34458,"url":"https://patchwork.plctlab.org/api/1.2/patches/34458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz/","msgid":"<59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz>","list_archive_url":null,"date":"2022-12-19T09:02:28","name":"[(pushed)] gcc-changelog: stop using --flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz/mbox/"},{"id":34463,"url":"https://patchwork.plctlab.org/api/1.2/patches/34463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8e44598-adb6-8b3a-292b-6bef4622c86a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T09:09:09","name":"gfortran.dg/read_dir.f90: Make PASS on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8e44598-adb6-8b3a-292b-6bef4622c86a@codesourcery.com/mbox/"},{"id":34457,"url":"https://patchwork.plctlab.org/api/1.2/patches/34457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6A9BBI4OAIb0s9a@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T10:29:24","name":"[committed] testsuite: Fix up pr107397.f90 test [PR107397]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6A9BBI4OAIb0s9a@tucnak/mbox/"},{"id":34474,"url":"https://patchwork.plctlab.org/api/1.2/patches/34474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BFjLgQdwlgkNnZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:05:48","name":"c: Diagnose compound literals with function type [PR108043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BFjLgQdwlgkNnZ@tucnak/mbox/"},{"id":34475,"url":"https://patchwork.plctlab.org/api/1.2/patches/34475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BG1P7KYDd9dayC@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:11:16","name":"modula2: Fix up bootstrap on powerpc64le-linux [PR108147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BG1P7KYDd9dayC@tucnak/mbox/"},{"id":34477,"url":"https://patchwork.plctlab.org/api/1.2/patches/34477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111147.1768-1-juzhe.zhong@rivai.ai/","msgid":"<20221219111147.1768-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T11:11:47","name":"RISC-V: Simplify ASM checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111147.1768-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34478,"url":"https://patchwork.plctlab.org/api/1.2/patches/34478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111357.4515-1-juzhe.zhong@rivai.ai/","msgid":"<20221219111357.4515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T11:13:57","name":"RISC-V: Simplify ASM checks 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111357.4515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34479,"url":"https://patchwork.plctlab.org/api/1.2/patches/34479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BI10ixEqaLah04@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:19:51","name":"modula2: Don'\''t treat % in Modula 2 messages specially","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BI10ixEqaLah04@tucnak/mbox/"},{"id":34535,"url":"https://patchwork.plctlab.org/api/1.2/patches/34535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6Be2p6281yCqfoq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T12:53:46","name":"[committed] testsuite: Fix up pr64536.c for LLP64 targets [PR108151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6Be2p6281yCqfoq@tucnak/mbox/"},{"id":34546,"url":"https://patchwork.plctlab.org/api/1.2/patches/34546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz/","msgid":"<0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz>","list_archive_url":null,"date":"2022-12-19T13:40:29","name":"[(pushed)] gcc-changelog: allow digit in component name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz/mbox/"},{"id":34555,"url":"https://patchwork.plctlab.org/api/1.2/patches/34555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b85e2aab-e7a1-cbeb-f5bc-c465e32834a4@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-19T13:56:34","name":"[(pushed)] gcc-changelog: support digits in PR'\''s component in subject","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b85e2aab-e7a1-cbeb-f5bc-c465e32834a4@suse.cz/mbox/"},{"id":34558,"url":"https://patchwork.plctlab.org/api/1.2/patches/34558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219140645.34011-1-guojiufu@linux.ibm.com/","msgid":"<20221219140645.34011-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-19T14:06:45","name":"[V7] rs6000: Optimize cmp on rotated 16bits constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219140645.34011-1-guojiufu@linux.ibm.com/mbox/"},{"id":34557,"url":"https://patchwork.plctlab.org/api/1.2/patches/34557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BwMS8xkhs1IKk1@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T14:07:45","name":"[committed] testsuite: Fix up pr64536.c for LLP64 targets [PR108151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BwMS8xkhs1IKk1@tucnak/mbox/"},{"id":34599,"url":"https://patchwork.plctlab.org/api/1.2/patches/34599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b50e7ca3-c2c2-c91f-c0c6-c284c7e35c60@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T14:56:55","name":"PR tree-optimization/108139 - Don'\''t use PHI equivalences in range-on-entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b50e7ca3-c2c2-c91f-c0c6-c284c7e35c60@redhat.com/mbox/"},{"id":34606,"url":"https://patchwork.plctlab.org/api/1.2/patches/34606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219150626.2972660-1-rearnsha@arm.com/","msgid":"<20221219150626.2972660-1-rearnsha@arm.com>","list_archive_url":null,"date":"2022-12-19T15:06:26","name":"[committed] arm: correctly define __ARM_FEATURE_CLZ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219150626.2972660-1-rearnsha@arm.com/mbox/"},{"id":34614,"url":"https://patchwork.plctlab.org/api/1.2/patches/34614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219153607.E229F13498@imap2.suse-dmz.suse.de/","msgid":"<20221219153607.E229F13498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-19T15:36:07","name":"tree-optimization/108164 - undefined overflow with IV vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219153607.E229F13498@imap2.suse-dmz.suse.de/mbox/"},{"id":34639,"url":"https://patchwork.plctlab.org/api/1.2/patches/34639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219160245.55745-1-sebastian.huber@embedded-brains.de/","msgid":"<20221219160245.55745-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-19T16:02:45","name":"libatomic: Provide gthr.h default implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219160245.55745-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":34653,"url":"https://patchwork.plctlab.org/api/1.2/patches/34653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219165922.25443-1-soeren@soeren-tempel.net/","msgid":"<20221219165922.25443-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-12-19T16:59:22","name":"libgo: check if -lucontext is required for {make, set, get}context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219165922.25443-1-soeren@soeren-tempel.net/mbox/"},{"id":34761,"url":"https://patchwork.plctlab.org/api/1.2/patches/34761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-1-thomas@codesourcery.com/","msgid":"<20221219204007.2818567-1-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-19T20:40:06","name":"[1/2] Add '\''gcc.target/nvptx/softstack-decl-1.c'\'', '\''gcc.target/nvptx/uniform-simt-decl-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-1-thomas@codesourcery.com/mbox/"},{"id":34762,"url":"https://patchwork.plctlab.org/api/1.2/patches/34762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-2-thomas@codesourcery.com/","msgid":"<20221219204007.2818567-2-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-19T20:40:07","name":"[2/2] nvptx: Prevent emitting duplicate declarations for '\''__nvptx_stacks'\'', '\''__nvptx_uni'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-2-thomas@codesourcery.com/mbox/"},{"id":34830,"url":"https://patchwork.plctlab.org/api/1.2/patches/34830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219230935.89797-1-juzhe.zhong@rivai.ai/","msgid":"<20221219230935.89797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T23:09:35","name":"RISC-V: Fix muti-line condition format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219230935.89797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34831,"url":"https://patchwork.plctlab.org/api/1.2/patches/34831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219231354.135626-1-juzhe.zhong@rivai.ai/","msgid":"<20221219231354.135626-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T23:13:54","name":"RISC-V: Fix incorrect annotation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219231354.135626-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34973,"url":"https://patchwork.plctlab.org/api/1.2/patches/34973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87len2cxwj.fsf@euler.schwinge.homeip.net/","msgid":"<87len2cxwj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-20T07:55:08","name":"[PING^2] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87len2cxwj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":34984,"url":"https://patchwork.plctlab.org/api/1.2/patches/34984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsdacxi0.fsf@euler.schwinge.homeip.net/","msgid":"<87fsdacxi0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-20T08:03:51","name":"[PING] nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsdacxi0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":34987,"url":"https://patchwork.plctlab.org/api/1.2/patches/34987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220081549.339006-1-dkm@kataplop.net/","msgid":"<20221220081549.339006-1-dkm@kataplop.net>","list_archive_url":null,"date":"2022-12-20T08:15:49","name":"[COMMITTED] rust: fix link serialization [PR108113]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220081549.339006-1-dkm@kataplop.net/mbox/"},{"id":34994,"url":"https://patchwork.plctlab.org/api/1.2/patches/34994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6F2oT1HjoJRCIL6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-20T08:47:29","name":"libstdc++: Don'\''t call 4-5 argument to_chars with chars_format{}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6F2oT1HjoJRCIL6@tucnak/mbox/"},{"id":35000,"url":"https://patchwork.plctlab.org/api/1.2/patches/35000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3d6033e-2ae1-dbd0-8839-dd6329149f8c@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T09:22:04","name":"testsuite: Fix pr55569.c excess errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3d6033e-2ae1-dbd0-8839-dd6329149f8c@gmail.com/mbox/"},{"id":35027,"url":"https://patchwork.plctlab.org/api/1.2/patches/35027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6GRTuxVgQmxSZT5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-20T10:41:18","name":"aarch64: Fix plugin header install","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6GRTuxVgQmxSZT5@tucnak/mbox/"},{"id":35029,"url":"https://patchwork.plctlab.org/api/1.2/patches/35029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-1-arsen@aarsen.me/","msgid":"<20221220104916.3000540-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:14","name":"[1/3] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-1-arsen@aarsen.me/mbox/"},{"id":35030,"url":"https://patchwork.plctlab.org/api/1.2/patches/35030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-2-arsen@aarsen.me/","msgid":"<20221220104916.3000540-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:15","name":"[2/3] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-2-arsen@aarsen.me/mbox/"},{"id":35031,"url":"https://patchwork.plctlab.org/api/1.2/patches/35031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-3-arsen@aarsen.me/","msgid":"<20221220104916.3000540-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:16","name":"[3/3] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-3-arsen@aarsen.me/mbox/"},{"id":35051,"url":"https://patchwork.plctlab.org/api/1.2/patches/35051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220122323.3863293-1-manolis.tsamis@vrull.eu/","msgid":"<20221220122323.3863293-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-12-20T12:23:23","name":"[v3] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220122323.3863293-1-manolis.tsamis@vrull.eu/mbox/"},{"id":35090,"url":"https://patchwork.plctlab.org/api/1.2/patches/35090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220133626.05C2B1390E@imap2.suse-dmz.suse.de/","msgid":"<20221220133626.05C2B1390E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-20T13:36:25","name":"d/104749 - document host GDC version requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220133626.05C2B1390E@imap2.suse-dmz.suse.de/mbox/"},{"id":35109,"url":"https://patchwork.plctlab.org/api/1.2/patches/35109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145116.223955-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145116.223955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:51:16","name":"RISC-V: Remove side effects of vsetvl/vsetvlmax intriniscs in properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145116.223955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35114,"url":"https://patchwork.plctlab.org/api/1.2/patches/35114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145649.232331-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145649.232331-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:56:49","name":"RISC-V: Remove side effects of vsetvl pattern in RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145649.232331-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35116,"url":"https://patchwork.plctlab.org/api/1.2/patches/35116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145847.234303-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145847.234303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:58:47","name":"RISC-V: Update vsetvl/vsetvlmax intrinsics to the latest api name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145847.234303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35119,"url":"https://patchwork.plctlab.org/api/1.2/patches/35119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220153034.2746407-1-ppalka@redhat.com/","msgid":"<20221220153034.2746407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-20T15:30:34","name":"c++, tree: walk TREE_VEC (and VECTOR_CST) in natural order [PR101886]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220153034.2746407-1-ppalka@redhat.com/mbox/"},{"id":35139,"url":"https://patchwork.plctlab.org/api/1.2/patches/35139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/FF9C7E0B-5DF6-4FC2-B3C2-29F3CBCBE147@oracle.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T16:16:30","name":"gcc-13/changes.html: Mention -fstrict-flex-arrays and its impact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/FF9C7E0B-5DF6-4FC2-B3C2-29F3CBCBE147@oracle.com/mbox/"},{"id":35165,"url":"https://patchwork.plctlab.org/api/1.2/patches/35165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at/","msgid":"<95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-20T19:08:02","name":"[C] remove same_translation_unit_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at/mbox/"},{"id":35188,"url":"https://patchwork.plctlab.org/api/1.2/patches/35188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d347c3e7-b009-48e8-b790-9380995fd72a-1671568823481@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2022-12-20T20:40:23","name":"Fortran: a C interoperable function cannot have the CLASS attribute [PR95375]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d347c3e7-b009-48e8-b790-9380995fd72a-1671568823481@3c-app-gmx-bs49/mbox/"},{"id":35195,"url":"https://patchwork.plctlab.org/api/1.2/patches/35195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16717-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T21:32:19","name":"AArch64 relax constraints on FP16 insn PR108172","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16717-tamar@arm.com/mbox/"},{"id":35235,"url":"https://patchwork.plctlab.org/api/1.2/patches/35235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com/","msgid":"<6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T03:16:36","name":"[committed] rs6000: Fix the wrong location of OPTION_MASK_P10_FUSION setting hunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com/mbox/"},{"id":35268,"url":"https://patchwork.plctlab.org/api/1.2/patches/35268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221062736.78036-1-guojiufu@linux.ibm.com/","msgid":"<20221221062736.78036-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T06:27:36","name":"loading float member of parameter stored via int registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221062736.78036-1-guojiufu@linux.ibm.com/mbox/"},{"id":35289,"url":"https://patchwork.plctlab.org/api/1.2/patches/35289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz/","msgid":"<84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz>","list_archive_url":null,"date":"2022-12-21T08:05:21","name":"[(pushed)] libgccjit: silent 2 Clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz/mbox/"},{"id":35290,"url":"https://patchwork.plctlab.org/api/1.2/patches/35290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d730a0-3ae8-3dd0-848b-09ad67542bde@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:05:39","name":"go: fix clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d730a0-3ae8-3dd0-848b-09ad67542bde@suse.cz/mbox/"},{"id":35296,"url":"https://patchwork.plctlab.org/api/1.2/patches/35296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LB8TGAbA1fAFe4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:21:05","name":"[committed] modula2: Fix lto profiledbootstrap on powerpc64le-linux and s390x-linux [PR108153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LB8TGAbA1fAFe4@tucnak/mbox/"},{"id":35297,"url":"https://patchwork.plctlab.org/api/1.2/patches/35297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LCdySCuQk6V90v@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:23:19","name":"[committed] openmp: Don'\''t try to destruct DECL_OMP_PRIVATIZED_MEMBER vars [PR108180]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LCdySCuQk6V90v@tucnak/mbox/"},{"id":35305,"url":"https://patchwork.plctlab.org/api/1.2/patches/35305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com/","msgid":"<718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T09:02:17","name":"[RFC/PATCH] Remove the workaround for _Float128 precision [PR107299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com/mbox/"},{"id":35346,"url":"https://patchwork.plctlab.org/api/1.2/patches/35346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LxPU/HBAJ0fFQl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-21T11:42:53","name":"Make -fwhole-program to work with incremental LTO linking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LxPU/HBAJ0fFQl@kam.mff.cuni.cz/mbox/"},{"id":35348,"url":"https://patchwork.plctlab.org/api/1.2/patches/35348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221121237.8718613913@imap2.suse-dmz.suse.de/","msgid":"<20221221121237.8718613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-21T12:12:37","name":"middle-end/107994 - ICE after error with comparison gimplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221121237.8718613913@imap2.suse-dmz.suse.de/mbox/"},{"id":35352,"url":"https://patchwork.plctlab.org/api/1.2/patches/35352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cyl0wb8.fsf@debian/","msgid":"<877cyl0wb8.fsf@debian>","list_archive_url":null,"date":"2022-12-21T12:34:51","name":"modula2: PR-108119 Disable m2 plugin m2rte","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cyl0wb8.fsf@debian/mbox/"},{"id":35358,"url":"https://patchwork.plctlab.org/api/1.2/patches/35358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221130901.39779-1-iain@sandoe.co.uk/","msgid":"<20221221130901.39779-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-21T13:09:01","name":"[pushed] libffi: Fix X86 32b Darwin build and EH frames.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221130901.39779-1-iain@sandoe.co.uk/mbox/"},{"id":35359,"url":"https://patchwork.plctlab.org/api/1.2/patches/35359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-2-dimitrije.milosevic@syrmia.com/","msgid":"<20221221131214.190579-2-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-12-21T13:12:13","name":"[1/2] ivopts: Compute complexity for unsupported addressing modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-2-dimitrije.milosevic@syrmia.com/mbox/"},{"id":35360,"url":"https://patchwork.plctlab.org/api/1.2/patches/35360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-3-dimitrije.milosevic@syrmia.com/","msgid":"<20221221131214.190579-3-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-12-21T13:12:14","name":"[2/2] ivopts: Revert register pressure cost when there are enough registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-3-dimitrije.milosevic@syrmia.com/mbox/"},{"id":35391,"url":"https://patchwork.plctlab.org/api/1.2/patches/35391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221145254.389983-1-ppalka@redhat.com/","msgid":"<20221221145254.389983-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-21T14:52:54","name":"c++: get_nsdmi in template context [PR108116]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221145254.389983-1-ppalka@redhat.com/mbox/"},{"id":35424,"url":"https://patchwork.plctlab.org/api/1.2/patches/35424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com/","msgid":"<7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com>","list_archive_url":null,"date":"2022-12-21T15:51:25","name":"Fortran/OpenMP: Add parsing support for allocators/allocate directive (was: [Patch] Fortran/OpenMP: Add parsing support for allocators directive)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com/mbox/"},{"id":35487,"url":"https://patchwork.plctlab.org/api/1.2/patches/35487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221183103.3800844-1-christoph.muellner@vrull.eu/","msgid":"<20221221183103.3800844-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-21T18:31:03","name":"[RFC] RISC-V: Add support for vector crypto extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221183103.3800844-1-christoph.muellner@vrull.eu/mbox/"},{"id":35543,"url":"https://patchwork.plctlab.org/api/1.2/patches/35543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-2-siddhesh@gotplt.org/","msgid":"<20221221222554.4141678-2-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-21T22:25:53","name":"[1/2] testsuite: Run __bos tests to completion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-2-siddhesh@gotplt.org/mbox/"},{"id":35540,"url":"https://patchwork.plctlab.org/api/1.2/patches/35540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-3-siddhesh@gotplt.org/","msgid":"<20221221222554.4141678-3-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-21T22:25:54","name":"[2/2] tree-object-size: More consistent behaviour with flex arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-3-siddhesh@gotplt.org/mbox/"},{"id":35004,"url":"https://patchwork.plctlab.org/api/1.2/patches/35004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222002711.116962-1-lipeng.zhu@intel.com/","msgid":"<20221222002711.116962-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-22T00:27:11","name":"libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222002711.116962-1-lipeng.zhu@intel.com/mbox/"},{"id":35032,"url":"https://patchwork.plctlab.org/api/1.2/patches/35032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222021947.117891-1-lipeng.zhu@intel.com/","msgid":"<20221222021947.117891-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-22T02:19:47","name":"libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222021947.117891-1-lipeng.zhu@intel.com/mbox/"},{"id":35644,"url":"https://patchwork.plctlab.org/api/1.2/patches/35644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222084321.7263613918@imap2.suse-dmz.suse.de/","msgid":"<20221222084321.7263613918@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T08:43:21","name":"Compare DECL_NOT_FLEXARRAY for LTO tree merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222084321.7263613918@imap2.suse-dmz.suse.de/mbox/"},{"id":35665,"url":"https://patchwork.plctlab.org/api/1.2/patches/35665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101538.660256-1-jwakely@redhat.com/","msgid":"<20221222101538.660256-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T10:15:38","name":"[committed] libstdc++: Add [[nodiscard]] in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101538.660256-1-jwakely@redhat.com/mbox/"},{"id":35666,"url":"https://patchwork.plctlab.org/api/1.2/patches/35666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101547.660304-1-jwakely@redhat.com/","msgid":"<20221222101547.660304-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T10:15:47","name":"[committed] libstdc++: Define and use variable templates in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101547.660304-1-jwakely@redhat.com/mbox/"},{"id":35667,"url":"https://patchwork.plctlab.org/api/1.2/patches/35667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QwCSX4gGzWstiF@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:23:05","name":"cse: Fix up CSE const_anchor handling [PR108193]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QwCSX4gGzWstiF@tucnak/mbox/"},{"id":35669,"url":"https://patchwork.plctlab.org/api/1.2/patches/35669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QxsdUy2S2w//u/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:30:09","name":"phiopt: Drop SSA_NAME_RANGE_INFO in maybe equal case [PR108166]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QxsdUy2S2w//u/@tucnak/mbox/"},{"id":35670,"url":"https://patchwork.plctlab.org/api/1.2/patches/35670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QyU5d2RLvwMP/q@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:32:51","name":"c, c++, cgraphunit: Prevent duplicated -Wunused-value warnings [PR108079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QyU5d2RLvwMP/q@tucnak/mbox/"},{"id":35673,"url":"https://patchwork.plctlab.org/api/1.2/patches/35673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-1-arsen@aarsen.me/","msgid":"<20221222110306.3869396-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:06","name":"[1/3] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-1-arsen@aarsen.me/mbox/"},{"id":35674,"url":"https://patchwork.plctlab.org/api/1.2/patches/35674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-2-arsen@aarsen.me/","msgid":"<20221222110306.3869396-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:07","name":"[2/3] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-2-arsen@aarsen.me/mbox/"},{"id":35675,"url":"https://patchwork.plctlab.org/api/1.2/patches/35675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-3-arsen@aarsen.me/","msgid":"<20221222110306.3869396-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:08","name":"[3/3] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-3-arsen@aarsen.me/mbox/"},{"id":35684,"url":"https://patchwork.plctlab.org/api/1.2/patches/35684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222112019.9549E138FD@imap2.suse-dmz.suse.de/","msgid":"<20221222112019.9549E138FD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T11:20:19","name":"tree-optimization/107451 - SLP load vectorization issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222112019.9549E138FD@imap2.suse-dmz.suse.de/mbox/"},{"id":35745,"url":"https://patchwork.plctlab.org/api/1.2/patches/35745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6RTdCmstcJUoFnU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T12:54:12","name":"phiopt: Adjust instead of reset phires range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6RTdCmstcJUoFnU@tucnak/mbox/"},{"id":35767,"url":"https://patchwork.plctlab.org/api/1.2/patches/35767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222132150.37277138FD@imap2.suse-dmz.suse.de/","msgid":"<20221222132150.37277138FD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T13:21:49","name":"testsuite/107809 - fix vect-recurr testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222132150.37277138FD@imap2.suse-dmz.suse.de/mbox/"},{"id":35815,"url":"https://patchwork.plctlab.org/api/1.2/patches/35815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222145404.2AB0313918@imap2.suse-dmz.suse.de/","msgid":"<20221222145404.2AB0313918@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T14:54:03","name":"bootstrap/106482 - document minimal GCC version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222145404.2AB0313918@imap2.suse-dmz.suse.de/mbox/"},{"id":35880,"url":"https://patchwork.plctlab.org/api/1.2/patches/35880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rizz7xv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:04:12","name":"[1/15,V2] arm: Make mbranch-protection opts parsing common to AArch32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rizz7xv.fsf_-_@arm.com/mbox/"},{"id":35881,"url":"https://patchwork.plctlab.org/api/1.2/patches/35881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SObwpkw+HVsLtx@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:05:51","name":"[committed] docs: Link to correct section for constraint modifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SObwpkw+HVsLtx@e124511.cambridge.arm.com/mbox/"},{"id":35882,"url":"https://patchwork.plctlab.org/api/1.2/patches/35882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOeoevE0LQJdzF@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:06:02","name":"[committed] docs: Fix inconsistent example predicate name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOeoevE0LQJdzF@e124511.cambridge.arm.com/mbox/"},{"id":35883,"url":"https://patchwork.plctlab.org/api/1.2/patches/35883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOhUlYMGLtprFN@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:06:13","name":"[committed] docs: Fix peephole paragraph ordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOhUlYMGLtprFN@e124511.cambridge.arm.com/mbox/"},{"id":35885,"url":"https://patchwork.plctlab.org/api/1.2/patches/35885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr3597z7hl.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:13:58","name":"[12/15,V5] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr3597z7hl.fsf_-_@arm.com/mbox/"},{"id":35884,"url":"https://patchwork.plctlab.org/api/1.2/patches/35884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222171645.12064-1-jose.marchesi@oracle.com/","msgid":"<20221222171645.12064-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-22T17:16:45","name":"Disable sched1 in functions that call setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222171645.12064-1-jose.marchesi@oracle.com/mbox/"},{"id":35887,"url":"https://patchwork.plctlab.org/api/1.2/patches/35887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222173208.13317-1-jose.marchesi@oracle.com/","msgid":"<20221222173208.13317-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-22T17:32:08","name":"[V2] Disable sched1 in functions that call setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222173208.13317-1-jose.marchesi@oracle.com/mbox/"},{"id":35888,"url":"https://patchwork.plctlab.org/api/1.2/patches/35888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at/","msgid":"<9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T17:41:22","name":"[C] (for STAGE 1) Reorganize comptypes and related functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at/mbox/"},{"id":35889,"url":"https://patchwork.plctlab.org/api/1.2/patches/35889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SW+ErptI8cj+EC@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:42:16","name":"[5/8,v2] middle-end: Add cltz_complement idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SW+ErptI8cj+EC@e124511.cambridge.arm.com/mbox/"},{"id":35890,"url":"https://patchwork.plctlab.org/api/1.2/patches/35890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXCOp3jLSRgPkv@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:42:32","name":"[6/8,v2] docs: Add popcount, clz and ctz target attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXCOp3jLSRgPkv@e124511.cambridge.arm.com/mbox/"},{"id":35891,"url":"https://patchwork.plctlab.org/api/1.2/patches/35891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXOd4qtp4SX2qP@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:43:21","name":"[9/8] middle-end: Allow build_popcount_expr to use an IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXOd4qtp4SX2qP@e124511.cambridge.arm.com/mbox/"},{"id":35892,"url":"https://patchwork.plctlab.org/api/1.2/patches/35892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at/","msgid":"<710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T17:44:27","name":"[C] (for STAGE 1) UBSan instrumentation for assignment of VM types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at/mbox/"},{"id":35941,"url":"https://patchwork.plctlab.org/api/1.2/patches/35941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at/","msgid":"<5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T20:13:57","name":"regression tests for 103770 fixed on trunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at/mbox/"},{"id":35960,"url":"https://patchwork.plctlab.org/api/1.2/patches/35960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b54c9233-525b-4b08-b8cf-f7451c36cb72-1671743584325@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2022-12-22T21:13:04","name":"Fortran: check for invalid uses of statement functions arguments [PR69604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b54c9233-525b-4b08-b8cf-f7451c36cb72-1671743584325@3c-app-gmx-bap55/mbox/"},{"id":35965,"url":"https://patchwork.plctlab.org/api/1.2/patches/35965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6TPrATjd0SO/UrA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T21:44:12","name":"phiopt, v2: Adjust instead of reset phires range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6TPrATjd0SO/UrA@tucnak/mbox/"},{"id":35990,"url":"https://patchwork.plctlab.org/api/1.2/patches/35990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com/","msgid":"<001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-22T23:09:31","name":"[x86] PR target/106933: Limit TImode STV to SSA-like def-use chains.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com/mbox/"},{"id":35991,"url":"https://patchwork.plctlab.org/api/1.2/patches/35991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com/","msgid":"<001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-22T23:19:21","name":"[x86] PR target/107548: Handle vec_select in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com/mbox/"},{"id":36006,"url":"https://patchwork.plctlab.org/api/1.2/patches/36006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233704.772013-1-jwakely@redhat.com/","msgid":"<20221222233704.772013-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:37:04","name":"[committed] libstdc++: Implement C++20 time zone support in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233704.772013-1-jwakely@redhat.com/mbox/"},{"id":36005,"url":"https://patchwork.plctlab.org/api/1.2/patches/36005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233804.772229-1-jwakely@redhat.com/","msgid":"<20221222233804.772229-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:38:04","name":"[committed] libstdc++: Add GDB printers for types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233804.772229-1-jwakely@redhat.com/mbox/"},{"id":36008,"url":"https://patchwork.plctlab.org/api/1.2/patches/36008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233816.772318-1-jwakely@redhat.com/","msgid":"<20221222233816.772318-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:38:16","name":"[committed] libstdc++: Add helper function in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233816.772318-1-jwakely@redhat.com/mbox/"},{"id":36007,"url":"https://patchwork.plctlab.org/api/1.2/patches/36007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233957.2866911-1-jason@redhat.com/","msgid":"<20221222233957.2866911-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:39:57","name":"[pushed] testsuite: don'\''t declare printf in coro.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233957.2866911-1-jason@redhat.com/mbox/"},{"id":36010,"url":"https://patchwork.plctlab.org/api/1.2/patches/36010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234015.772332-1-jwakely@redhat.com/","msgid":"<20221222234015.772332-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:40:15","name":"[committed] libstdc++: Add std::format support to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234015.772332-1-jwakely@redhat.com/mbox/"},{"id":36009,"url":"https://patchwork.plctlab.org/api/1.2/patches/36009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234112.772515-1-jwakely@redhat.com/","msgid":"<20221222234112.772515-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:41:12","name":"[committed] libstdc++: Avoid recursion in __nothrow_wait_cv::wait [PR105730]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234112.772515-1-jwakely@redhat.com/mbox/"},{"id":36027,"url":"https://patchwork.plctlab.org/api/1.2/patches/36027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223005246.38622-1-juzhe.zhong@rivai.ai/","msgid":"<20221223005246.38622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T00:52:46","name":"RISC-V: Support vle.v/vse.v intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223005246.38622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36109,"url":"https://patchwork.plctlab.org/api/1.2/patches/36109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223033306.264797-1-juzhe.zhong@rivai.ai/","msgid":"<20221223033306.264797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T03:33:06","name":"RISC-V: Fix vle constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223033306.264797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36138,"url":"https://patchwork.plctlab.org/api/1.2/patches/36138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com/","msgid":"<9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2022-12-23T06:06:55","name":"[1/1] Fixed typo in RISCV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com/mbox/"},{"id":36164,"url":"https://patchwork.plctlab.org/api/1.2/patches/36164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223093357.3170-1-jose.marchesi@oracle.com/","msgid":"<20221223093357.3170-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T09:33:57","name":"[WWWDOCS] htdocs: news: GCC BPF in Compiler Explorer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223093357.3170-1-jose.marchesi@oracle.com/mbox/"},{"id":36175,"url":"https://patchwork.plctlab.org/api/1.2/patches/36175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223094421.832354-1-jwakely@redhat.com/","msgid":"<20221223094421.832354-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-23T09:44:21","name":"[committed] libstdc++: Remove problematic static_assert from src/c++20/tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223094421.832354-1-jwakely@redhat.com/mbox/"},{"id":36193,"url":"https://patchwork.plctlab.org/api/1.2/patches/36193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223095013.3630-1-jose.marchesi@oracle.com/","msgid":"<20221223095013.3630-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T09:50:13","name":"[WWWDOCS] htdocs: add an Atom feed for GCC news","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223095013.3630-1-jose.marchesi@oracle.com/mbox/"},{"id":36198,"url":"https://patchwork.plctlab.org/api/1.2/patches/36198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223100601.4485-1-jose.marchesi@oracle.com/","msgid":"<20221223100601.4485-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T10:06:01","name":"[WWWDOCS] htdocs: rotate news","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223100601.4485-1-jose.marchesi@oracle.com/mbox/"},{"id":36234,"url":"https://patchwork.plctlab.org/api/1.2/patches/36234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com/","msgid":"<856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:54","name":"[v6,01/11] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36236,"url":"https://patchwork.plctlab.org/api/1.2/patches/36236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com/","msgid":"<2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:55","name":"[v6,02/11] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36239,"url":"https://patchwork.plctlab.org/api/1.2/patches/36239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com/","msgid":"<44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:56","name":"[v6,03/11] OpenMP/OpenACC: Refine condition for when map clause expansion happens","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36237,"url":"https://patchwork.plctlab.org/api/1.2/patches/36237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e97712f8f441bddd839f6b8dcea549f6ef247b71.1671796516.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-23T12:12:57","name":"[v6,04/11] OpenMP: implicitly map base pointer for array-section pointer components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e97712f8f441bddd839f6b8dcea549f6ef247b71.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36241,"url":"https://patchwork.plctlab.org/api/1.2/patches/36241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com/","msgid":"<4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:58","name":"[v6,05/11] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36235,"url":"https://patchwork.plctlab.org/api/1.2/patches/36235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com/","msgid":"<1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:59","name":"[v6,06/11] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36238,"url":"https://patchwork.plctlab.org/api/1.2/patches/36238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com/","msgid":"<3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:00","name":"[v6,07/11] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36243,"url":"https://patchwork.plctlab.org/api/1.2/patches/36243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com/","msgid":"<7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:01","name":"[v6,08/11] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36242,"url":"https://patchwork.plctlab.org/api/1.2/patches/36242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb79a146432898f400ad52e364b0c7d27098f0ca.1671796516.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-23T12:13:02","name":"[v6,09/11] OpenMP: lvalue parsing for map clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb79a146432898f400ad52e364b0c7d27098f0ca.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36244,"url":"https://patchwork.plctlab.org/api/1.2/patches/36244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com/","msgid":"<59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:03","name":"[v6,10/11] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36240,"url":"https://patchwork.plctlab.org/api/1.2/patches/36240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com/","msgid":"<1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:04","name":"[v6,11/11] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36259,"url":"https://patchwork.plctlab.org/api/1.2/patches/36259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223124227.199969-1-juzhe.zhong@rivai.ai/","msgid":"<20221223124227.199969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T12:42:27","name":"RISC-V: Fix ICE for avl_info deprecated copy and pp_print error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223124227.199969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36276,"url":"https://patchwork.plctlab.org/api/1.2/patches/36276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7rup7f8.fsf@euler.schwinge.homeip.net/","msgid":"<87o7rup7f8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-23T13:37:47","name":"nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7rup7f8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":36277,"url":"https://patchwork.plctlab.org/api/1.2/patches/36277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223134717.852611-1-jwakely@redhat.com/","msgid":"<20221223134717.852611-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-23T13:47:17","name":"[committed] libstdc++: Fix Darwin bootstrap error in src/c++20/tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223134717.852611-1-jwakely@redhat.com/mbox/"},{"id":36279,"url":"https://patchwork.plctlab.org/api/1.2/patches/36279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ili2p60p.fsf@euler.schwinge.homeip.net/","msgid":"<87ili2p60p.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-23T14:08:06","name":"nvptx: '\''-mframe-malloc-threshold'\'', '\''-Wframe-malloc-threshold'\'' (was: Handling of large stack objects in GPU code generation -- maybe transform into heap allocation?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ili2p60p.fsf@euler.schwinge.homeip.net/mbox/"},{"id":36290,"url":"https://patchwork.plctlab.org/api/1.2/patches/36290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6XIZvKyJ+uzQEKl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-23T15:25:26","name":"[committed] tree-ssa-dom: can_infer_simple_equiv fixes [PR108068]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6XIZvKyJ+uzQEKl@tucnak/mbox/"},{"id":36301,"url":"https://patchwork.plctlab.org/api/1.2/patches/36301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz/","msgid":"<677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz>","list_archive_url":null,"date":"2022-12-23T15:44:04","name":"strlen: do not use cond_expr for boundaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz/mbox/"},{"id":36310,"url":"https://patchwork.plctlab.org/api/1.2/patches/36310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com/","msgid":"<00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-23T16:46:06","name":"[x86] Use movss/movsd to implement V4SI/V2DI VEC_PERM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com/mbox/"},{"id":36312,"url":"https://patchwork.plctlab.org/api/1.2/patches/36312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223170619.38428-1-iain@sandoe.co.uk/","msgid":"<20221223170619.38428-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-23T17:06:19","name":"libstdc++, configure: Fix GLIBCXX_ZONEINFO_DIR configuration macro.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223170619.38428-1-iain@sandoe.co.uk/mbox/"},{"id":36384,"url":"https://patchwork.plctlab.org/api/1.2/patches/36384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224030800.221397-1-juzhe.zhong@rivai.ai/","msgid":"<20221224030800.221397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-24T03:08:00","name":"RISC-V: Fix ICE of visiting non-existing block in CFG.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224030800.221397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36403,"url":"https://patchwork.plctlab.org/api/1.2/patches/36403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224113525.20201-1-iain@sandoe.co.uk/","msgid":"<20221224113525.20201-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:35:25","name":"libstdc++: Export the __gnu_cxx::zoneinfo_dir_override symbol.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224113525.20201-1-iain@sandoe.co.uk/mbox/"},{"id":36404,"url":"https://patchwork.plctlab.org/api/1.2/patches/36404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114009.20261-1-iain@sandoe.co.uk/","msgid":"<20221224114009.20261-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:40:09","name":"libstdc++: Test for tzdata.zi before fallback version files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114009.20261-1-iain@sandoe.co.uk/mbox/"},{"id":36405,"url":"https://patchwork.plctlab.org/api/1.2/patches/36405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114234.20419-1-iain@sandoe.co.uk/","msgid":"<20221224114234.20419-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:42:34","name":"libstdc++, testsuite: Correct an init.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114234.20419-1-iain@sandoe.co.uk/mbox/"},{"id":36438,"url":"https://patchwork.plctlab.org/api/1.2/patches/36438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224174957.95123-1-iain@sandoe.co.uk/","msgid":"<20221224174957.95123-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T17:49:57","name":"[pushed] libgcc, Darwin: No early install for the compatibility libgcc_s.1.dylib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224174957.95123-1-iain@sandoe.co.uk/mbox/"},{"id":36439,"url":"https://patchwork.plctlab.org/api/1.2/patches/36439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190049.99806-1-iain@sandoe.co.uk/","msgid":"<20221224190049.99806-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T19:00:49","name":"Ada, Darwin: Do not link libgcc statically on Darwin [PR108202].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190049.99806-1-iain@sandoe.co.uk/mbox/"},{"id":36440,"url":"https://patchwork.plctlab.org/api/1.2/patches/36440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190343.3490-1-softwaresale01@gmail.com/","msgid":"<20221224190343.3490-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2022-12-24T19:03:43","name":"cp: warn uninitialized const/ref in base class [PR80681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190343.3490-1-softwaresale01@gmail.com/mbox/"},{"id":36454,"url":"https://patchwork.plctlab.org/api/1.2/patches/36454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com/","msgid":"<006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-24T22:13:36","name":"[Committed] Tweak new gcc.target/i386/pr107548-1.c for -march=cascadelake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com/mbox/"},{"id":36466,"url":"https://patchwork.plctlab.org/api/1.2/patches/36466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221225115141.A09EC33E8A@hamza.pair.com/","msgid":"<20221225115141.A09EC33E8A@hamza.pair.com>","list_archive_url":null,"date":"2022-12-25T11:51:39","name":"[committed] wwwdocs: gcc-12: Spelling fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221225115141.A09EC33E8A@hamza.pair.com/mbox/"},{"id":36568,"url":"https://patchwork.plctlab.org/api/1.2/patches/36568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org/","msgid":"<881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org>","list_archive_url":null,"date":"2022-12-26T08:55:45","name":"[Bug,c/108224] add srandom random initstate setstate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org/mbox/"},{"id":36647,"url":"https://patchwork.plctlab.org/api/1.2/patches/36647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8lyi5nn.fsf@debian/","msgid":"<87v8lyi5nn.fsf@debian>","list_archive_url":null,"date":"2022-12-26T14:46:52","name":"[modula2] PR-108142 Remove empty directories created in the build directory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8lyi5nn.fsf@debian/mbox/"},{"id":36671,"url":"https://patchwork.plctlab.org/api/1.2/patches/36671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6nbJLinJtSPip+8@mars/","msgid":"","list_archive_url":null,"date":"2022-12-26T17:34:28","name":"Add support for x86_64-*-gnu-* targets to build x86_64 gnumach/hurd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6nbJLinJtSPip+8@mars/mbox/"},{"id":36703,"url":"https://patchwork.plctlab.org/api/1.2/patches/36703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org/","msgid":"<2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org>","list_archive_url":null,"date":"2022-12-26T20:50:23","name":"Bugzilla Bug 81649 [PATCH]: Clarify LeakSanitizer in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org/mbox/"},{"id":36704,"url":"https://patchwork.plctlab.org/api/1.2/patches/36704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3166f68-a988-7476-bc71-7f3eb6d20deb@jguk.org/","msgid":"","list_archive_url":null,"date":"2022-12-26T21:00:05","name":"[PATCHJ] : Bugzilla 88860 - Clarify online manual infelicities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3166f68-a988-7476-bc71-7f3eb6d20deb@jguk.org/mbox/"},{"id":36705,"url":"https://patchwork.plctlab.org/api/1.2/patches/36705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/750917f3-555a-a5b8-9d55-261b0883153f@jguk.org/","msgid":"<750917f3-555a-a5b8-9d55-261b0883153f@jguk.org>","list_archive_url":null,"date":"2022-12-26T21:04:31","name":"Bugzilla 88860 - Clarify gcc online manual attribute format printf example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/750917f3-555a-a5b8-9d55-261b0883153f@jguk.org/mbox/"},{"id":36709,"url":"https://patchwork.plctlab.org/api/1.2/patches/36709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com/","msgid":"<7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com>","list_archive_url":null,"date":"2022-12-26T22:26:29","name":"[fortran] ICE in attr_decl1, at fortran/decl.c:8691","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com/mbox/"},{"id":36762,"url":"https://patchwork.plctlab.org/api/1.2/patches/36762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora639h4u9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:02:06","name":"[RFC] Introduce -finline-memset-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora639h4u9.fsf@lxoliva.fsfla.org/mbox/"},{"id":36761,"url":"https://patchwork.plctlab.org/api/1.2/patches/36761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydxh4l4.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:07:35","name":"[00/13] check hash table counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydxh4l4.fsf@lxoliva.fsfla.org/mbox/"},{"id":36763,"url":"https://patchwork.plctlab.org/api/1.2/patches/36763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qolh455.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:17:10","name":"[01/13] scoped tables: insert before further lookups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qolh455.fsf@lxoliva.fsfla.org/mbox/"},{"id":36764,"url":"https://patchwork.plctlab.org/api/1.2/patches/36764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6dfpia.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:18:37","name":"[02/13] varpool: do not add NULL vnodes to referenced","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6dfpia.fsf@lxoliva.fsfla.org/mbox/"},{"id":36765,"url":"https://patchwork.plctlab.org/api/1.2/patches/36765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfh1fpgc.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:19:47","name":"[03/13] tree-inline decl_map: skip mapping NULL to itself","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfh1fpgc.fsf@lxoliva.fsfla.org/mbox/"},{"id":36766,"url":"https://patchwork.plctlab.org/api/1.2/patches/36766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7rpfpcx.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:21:50","name":"[04/13,C++] constraint: insert norm entry once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7rpfpcx.fsf@lxoliva.fsfla.org/mbox/"},{"id":36767,"url":"https://patchwork.plctlab.org/api/1.2/patches/36767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork02dfpbv.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:22:28","name":"[05/13] ssa-loop-niter: skip caching of null operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork02dfpbv.fsf@lxoliva.fsfla.org/mbox/"},{"id":36769,"url":"https://patchwork.plctlab.org/api/1.2/patches/36769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsd1fpad.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:23:22","name":"[06/13] tree-inline decl_map: skip mapping result'\''s NULL default def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsd1fpad.fsf@lxoliva.fsfla.org/mbox/"},{"id":36768,"url":"https://patchwork.plctlab.org/api/1.2/patches/36768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbknpfp8w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:24:15","name":"[07/13] postreload-gcse: no insert on mere lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbknpfp8w.fsf@lxoliva.fsfla.org/mbox/"},{"id":36770,"url":"https://patchwork.plctlab.org/api/1.2/patches/36770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jthfp1e.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:28:45","name":"[08/13] tm: complete tm_restart insertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jthfp1e.fsf@lxoliva.fsfla.org/mbox/"},{"id":36771,"url":"https://patchwork.plctlab.org/api/1.2/patches/36771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzgb9eaev.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:30:00","name":"[09/13,C++] constexpr: request insert iff depth is ok","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzgb9eaev.fsf@lxoliva.fsfla.org/mbox/"},{"id":36772,"url":"https://patchwork.plctlab.org/api/1.2/patches/36772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8lxea5a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:35:45","name":"[10/13] lto: drop dummy partition mapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8lxea5a.fsf@lxoliva.fsfla.org/mbox/"},{"id":36773,"url":"https://patchwork.plctlab.org/api/1.2/patches/36773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0wlea1j.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:38:00","name":"[11/13] ada: don'\''t map NULL decl to locus","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0wlea1j.fsf@lxoliva.fsfla.org/mbox/"},{"id":36774,"url":"https://patchwork.plctlab.org/api/1.2/patches/36774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt79ea05.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:38:50","name":"[12/13] hash set: reject attempts to add empty values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt79ea05.fsf@lxoliva.fsfla.org/mbox/"},{"id":36775,"url":"https://patchwork.plctlab.org/api/1.2/patches/36775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilhxe9z1.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:39:30","name":"[13/13] hash-map: reject empty-looking insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilhxe9z1.fsf@lxoliva.fsfla.org/mbox/"},{"id":36778,"url":"https://patchwork.plctlab.org/api/1.2/patches/36778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d559758f-8e1d-3513-b5d2-055d123f87b2@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-12-27T06:30:12","name":"xtensa: Apply a few minor fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d559758f-8e1d-3513-b5d2-055d123f87b2@yahoo.co.jp/mbox/"},{"id":36780,"url":"https://patchwork.plctlab.org/api/1.2/patches/36780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227064246.2149251-1-chenglulu@loongson.cn/","msgid":"<20221227064246.2149251-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-27T06:42:47","name":"[v4] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227064246.2149251-1-chenglulu@loongson.cn/mbox/"},{"id":36935,"url":"https://patchwork.plctlab.org/api/1.2/patches/36935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227152127.57251-1-kito.cheng@sifive.com/","msgid":"<20221227152127.57251-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-12-27T15:21:27","name":"RISC-V: Return const ref. for vl_vtype_info::get_avl_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227152127.57251-1-kito.cheng@sifive.com/mbox/"},{"id":36943,"url":"https://patchwork.plctlab.org/api/1.2/patches/36943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227153018.100423-1-kito.cheng@sifive.com/","msgid":"<20221227153018.100423-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-12-27T15:30:18","name":"[committed] RISC-V: Add riscv_vector.h wrapper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227153018.100423-1-kito.cheng@sifive.com/mbox/"},{"id":36948,"url":"https://patchwork.plctlab.org/api/1.2/patches/36948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-1-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:01","name":"[COMMITTED,1/4] xtensa: Tabify, and trim trailing spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-1-jcmvbkbc@gmail.com/mbox/"},{"id":36946,"url":"https://patchwork.plctlab.org/api/1.2/patches/36946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-2-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:02","name":"[COMMITTED,2/4] xtensa: Clean up xtensa_expand_prologue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-2-jcmvbkbc@gmail.com/mbox/"},{"id":36945,"url":"https://patchwork.plctlab.org/api/1.2/patches/36945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-3-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-3-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:03","name":"[COMMITTED,3/4] xtensa: Change GP_RETURN{, _REG_COUNT} to GP_RETURN_{FIRST, LAST}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-3-jcmvbkbc@gmail.com/mbox/"},{"id":36944,"url":"https://patchwork.plctlab.org/api/1.2/patches/36944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-4-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-4-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:04","name":"[COMMITTED,4/4] xtensa: Generate density instructions in set_frame_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-4-jcmvbkbc@gmail.com/mbox/"},{"id":36947,"url":"https://patchwork.plctlab.org/api/1.2/patches/36947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154456.111741-1-jcmvbkbc@gmail.com/","msgid":"<20221227154456.111741-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:56","name":"[COMMITTED] gcc: xtensa: use define_c_enums instead of define_constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154456.111741-1-jcmvbkbc@gmail.com/mbox/"},{"id":37048,"url":"https://patchwork.plctlab.org/api/1.2/patches/37048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com/","msgid":"<00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T00:06:08","name":"[x86] Use ix86_expand_clear in ix86_split_ashl.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com/mbox/"},{"id":37050,"url":"https://patchwork.plctlab.org/api/1.2/patches/37050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com/","msgid":"<00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T00:32:52","name":"[x86_64] Add post-reload splitter for extendditi2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com/mbox/"},{"id":37060,"url":"https://patchwork.plctlab.org/api/1.2/patches/37060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com/","msgid":"<00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T01:15:23","name":"[x86] Provide zero_extend versions/variants of several patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com/mbox/"},{"id":37099,"url":"https://patchwork.plctlab.org/api/1.2/patches/37099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228040154.778-1-shihua@iscas.ac.cn/","msgid":"<20221228040154.778-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2022-12-28T04:01:54","name":"[RFC,v2] Support RV64-ILP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228040154.778-1-shihua@iscas.ac.cn/mbox/"},{"id":37103,"url":"https://patchwork.plctlab.org/api/1.2/patches/37103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051108.196702-1-juzhe.zhong@rivai.ai/","msgid":"<20221228051108.196702-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-28T05:11:08","name":"RISC-V: Fix pointer tree type for store pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051108.196702-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37104,"url":"https://patchwork.plctlab.org/api/1.2/patches/37104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051947.219604-1-juzhe.zhong@rivai.ai/","msgid":"<20221228051947.219604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-28T05:19:47","name":"RISC-V: Change form of iterating blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051947.219604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37128,"url":"https://patchwork.plctlab.org/api/1.2/patches/37128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz/","msgid":"<10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz>","list_archive_url":null,"date":"2022-12-28T08:16:54","name":"c: check if target_clone attrs are all string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz/mbox/"},{"id":37152,"url":"https://patchwork.plctlab.org/api/1.2/patches/37152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d23be938-e91f-2f5b-f85f-c9e8105e272b@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-28T09:18:57","name":"docs: fix Var documentation for .opt files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d23be938-e91f-2f5b-f85f-c9e8105e272b@suse.cz/mbox/"},{"id":37185,"url":"https://patchwork.plctlab.org/api/1.2/patches/37185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora637emmo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:30:39","name":"[14/17] parloops: don'\''t request insert that won'\''t be completed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora637emmo.fsf@lxoliva.fsfla.org/mbox/"},{"id":37189,"url":"https://patchwork.plctlab.org/api/1.2/patches/37189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydvemiz.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:32:52","name":"[15/17] prevent hash set/map insertion of deleted entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydvemiz.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":37192,"url":"https://patchwork.plctlab.org/api/1.2/patches/37192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qojelwj.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:46:20","name":"[16/17] check hash table counts at expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qojelwj.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":37193,"url":"https://patchwork.plctlab.org/api/1.2/patches/37193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6bd759.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:50:26","name":"[17/17] check hash table insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6bd759.fsf@lxoliva.fsfla.org/mbox/"},{"id":37208,"url":"https://patchwork.plctlab.org/api/1.2/patches/37208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSexdb8vqz4JJH@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-28T14:28:11","name":"[1/2] libstdc++: Normalise _GLIBCXX20_DEPRECATED macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSexdb8vqz4JJH@Thaum.localdomain/mbox/"},{"id":37209,"url":"https://patchwork.plctlab.org/api/1.2/patches/37209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSiYH9k9JrId6H@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-28T14:28:25","name":"[2/2] libstdc++: Implement P1413R3 '\''deprecate aligned_storage and aligned_union'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSiYH9k9JrId6H@Thaum.localdomain/mbox/"},{"id":37261,"url":"https://patchwork.plctlab.org/api/1.2/patches/37261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228181817.193462-1-rzinsly@ventanamicro.com/","msgid":"<20221228181817.193462-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-28T18:18:17","name":"RISC-V: Optimize min/max with SImode sources on 64-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228181817.193462-1-rzinsly@ventanamicro.com/mbox/"},{"id":37371,"url":"https://patchwork.plctlab.org/api/1.2/patches/37371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp/","msgid":"<1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp>","list_archive_url":null,"date":"2022-12-29T12:14:33","name":"xtensa: Check DF availability before use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp/mbox/"},{"id":37419,"url":"https://patchwork.plctlab.org/api/1.2/patches/37419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229153402.40958-1-juzhe.zhong@rivai.ai/","msgid":"<20221229153402.40958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-29T15:34:02","name":"RISC-V: Fix inferior codegen for vse intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229153402.40958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37453,"url":"https://patchwork.plctlab.org/api/1.2/patches/37453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229171432.236445-1-jcmvbkbc@gmail.com/","msgid":"<20221229171432.236445-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-29T17:14:32","name":"[COMMITTED] gcc: xtensa: use GP_RETURN_* instead of magic constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229171432.236445-1-jcmvbkbc@gmail.com/mbox/"},{"id":37151,"url":"https://patchwork.plctlab.org/api/1.2/patches/37151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230001607.2232962-1-lipeng.zhu@intel.com/","msgid":"<20221230001607.2232962-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-30T00:16:07","name":"[v2] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230001607.2232962-1-lipeng.zhu@intel.com/mbox/"},{"id":37625,"url":"https://patchwork.plctlab.org/api/1.2/patches/37625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230094132.15562-1-iain@sandoe.co.uk/","msgid":"<20221230094132.15562-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T09:41:32","name":"[1/n] modula-2: Fix building the plugin for Darwin [PR107612].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230094132.15562-1-iain@sandoe.co.uk/mbox/"},{"id":37629,"url":"https://patchwork.plctlab.org/api/1.2/patches/37629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230095949.45279-1-iain@sandoe.co.uk/","msgid":"<20221230095949.45279-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T09:59:49","name":"[2/n] modula-2, libgm2: Add undefined, dynamic_lookup to m2 libs links.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230095949.45279-1-iain@sandoe.co.uk/mbox/"},{"id":37637,"url":"https://patchwork.plctlab.org/api/1.2/patches/37637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230100627.14753-1-iain@sandoe.co.uk/","msgid":"<20221230100627.14753-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:06:27","name":"[3/n] modula2: Ensure that module registration constructors are '\''extern'\'' [PR108183].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230100627.14753-1-iain@sandoe.co.uk/mbox/"},{"id":37638,"url":"https://patchwork.plctlab.org/api/1.2/patches/37638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230102046.8287-1-iain@sandoe.co.uk/","msgid":"<20221230102046.8287-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:20:46","name":"Darwin, crts: Provide scalb and significand as a crt [PR107631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230102046.8287-1-iain@sandoe.co.uk/mbox/"},{"id":37639,"url":"https://patchwork.plctlab.org/api/1.2/patches/37639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org/","msgid":"<66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org>","list_archive_url":null,"date":"2022-12-30T10:30:22","name":"update copyright year in libstdcc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org/mbox/"},{"id":37641,"url":"https://patchwork.plctlab.org/api/1.2/patches/37641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230105821.61331-1-iain@sandoe.co.uk/","msgid":"<20221230105821.61331-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:58:21","name":"[4/n] modula-2, driver: Handle static-libstd++ for targets without static/dynamic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230105821.61331-1-iain@sandoe.co.uk/mbox/"},{"id":37717,"url":"https://patchwork.plctlab.org/api/1.2/patches/37717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc46419f69db826cab8742ecd967308584848c3.1672420755.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-30T17:21:37","name":"preprocessor: Don'\''t register pragmas in directives-only mode [PR108244]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc46419f69db826cab8742ecd967308584848c3.1672420755.git.lhyatt@gmail.com/mbox/"},{"id":37866,"url":"https://patchwork.plctlab.org/api/1.2/patches/37866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231135721.10758-1-iain@sandoe.co.uk/","msgid":"<20221231135721.10758-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T13:57:21","name":"modula-2, doc: Build dvi, ps and pdf doc in the gcc/doc directory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231135721.10758-1-iain@sandoe.co.uk/mbox/"},{"id":37867,"url":"https://patchwork.plctlab.org/api/1.2/patches/37867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231140347.10890-1-iain@sandoe.co.uk/","msgid":"<20221231140347.10890-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T14:03:47","name":"Modula-2, testsuite: No 96 bit floating type on Darwin.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231140347.10890-1-iain@sandoe.co.uk/mbox/"},{"id":37868,"url":"https://patchwork.plctlab.org/api/1.2/patches/37868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231141610.11021-1-iain@sandoe.co.uk/","msgid":"<20221231141610.11021-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T14:16:10","name":"configure: Do not build the unused libffi shared library.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231141610.11021-1-iain@sandoe.co.uk/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-12/mbox/"},{"id":14,"url":"https://patchwork.plctlab.org/api/1.2/bundles/14/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-01/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-01","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":37954,"url":"https://patchwork.plctlab.org/api/1.2/patches/37954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com/","msgid":"<002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-01T15:55:26","name":"Fix RTL simplifications of FFS, POPCOUNT and PARITY.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com/mbox/"},{"id":37963,"url":"https://patchwork.plctlab.org/api/1.2/patches/37963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com/","msgid":"<005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-01T16:52:57","name":"[x86] PR target/108229: A minor STV compute_convert_gain tweak.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com/mbox/"},{"id":38068,"url":"https://patchwork.plctlab.org/api/1.2/patches/38068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102103805.4328-1-iain@sandoe.co.uk/","msgid":"<20230102103805.4328-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T10:38:05","name":"modula-2, driver: Implement handling for -static-libgm2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102103805.4328-1-iain@sandoe.co.uk/mbox/"},{"id":38072,"url":"https://patchwork.plctlab.org/api/1.2/patches/38072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com/","msgid":"<00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-02T10:50:38","name":"[x86] Improve ix86_expand_int_movcc to allow condition (mask) sharing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com/mbox/"},{"id":38095,"url":"https://patchwork.plctlab.org/api/1.2/patches/38095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102113922.5458-1-iain@sandoe.co.uk/","msgid":"<20230102113922.5458-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T11:39:22","name":"modula-2: Module registration constructors need to be visible [PR108259].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102113922.5458-1-iain@sandoe.co.uk/mbox/"},{"id":38114,"url":"https://patchwork.plctlab.org/api/1.2/patches/38114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102121913.62841-1-iain@sandoe.co.uk/","msgid":"<20230102121913.62841-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T12:19:13","name":"modula-2: Fix registration of modules via constructors [PR108183].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102121913.62841-1-iain@sandoe.co.uk/mbox/"},{"id":38235,"url":"https://patchwork.plctlab.org/api/1.2/patches/38235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103013957.318395-1-juzhe.zhong@rivai.ai/","msgid":"<20230103013957.318395-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T01:39:57","name":"RISC-V: Fix vsetivli instruction asm for IMM AVL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103013957.318395-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38295,"url":"https://patchwork.plctlab.org/api/1.2/patches/38295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103065530.142443-1-juzhe.zhong@rivai.ai/","msgid":"<20230103065530.142443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T06:55:30","name":"RISC-V: Fix bugs for refine vsetvl a5, zero into vsetvl zero, zero incorrectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103065530.142443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38298,"url":"https://patchwork.plctlab.org/api/1.2/patches/38298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071159.147469-1-juzhe.zhong@rivai.ai/","msgid":"<20230103071159.147469-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:11:59","name":"RISC-V: Fix wrong in_group flag in validate_change call function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071159.147469-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38300,"url":"https://patchwork.plctlab.org/api/1.2/patches/38300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071641.149958-1-juzhe.zhong@rivai.ai/","msgid":"<20230103071641.149958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:16:41","name":"RISC-V: Fix backward_propagate_worthwhile_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071641.149958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38308,"url":"https://patchwork.plctlab.org/api/1.2/patches/38308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103072436.157051-1-juzhe.zhong@rivai.ai/","msgid":"<20230103072436.157051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:24:36","name":"RISC-V: Simplify codes of changing vsetvl instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103072436.157051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38311,"url":"https://patchwork.plctlab.org/api/1.2/patches/38311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103073030.163679-1-juzhe.zhong@rivai.ai/","msgid":"<20230103073030.163679-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:30:30","name":"RISC-V: Fix bugs of available condition.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103073030.163679-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38321,"url":"https://patchwork.plctlab.org/api/1.2/patches/38321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-1-lin1.hu@intel.com/","msgid":"<20230103083723.3395300-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-01-03T08:37:22","name":"[1/4] i386: Remove Meteorlake'\''s family_model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-1-lin1.hu@intel.com/mbox/"},{"id":38322,"url":"https://patchwork.plctlab.org/api/1.2/patches/38322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-2-lin1.hu@intel.com/","msgid":"<20230103083723.3395300-2-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-01-03T08:37:23","name":"[2/4] Initial Emeraldrapids Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-2-lin1.hu@intel.com/mbox/"},{"id":38329,"url":"https://patchwork.plctlab.org/api/1.2/patches/38329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093502.75997-1-poulhies@adacore.com/","msgid":"<20230103093502.75997-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:02","name":"[COMMITTED] ada: Fix support of Default_Component_Value aspect on derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093502.75997-1-poulhies@adacore.com/mbox/"},{"id":38330,"url":"https://patchwork.plctlab.org/api/1.2/patches/38330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093514.76112-1-poulhies@adacore.com/","msgid":"<20230103093514.76112-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:14","name":"[COMMITTED] ada: Cannot reference ghost entity in class-wide precondition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093514.76112-1-poulhies@adacore.com/mbox/"},{"id":38333,"url":"https://patchwork.plctlab.org/api/1.2/patches/38333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093518.76176-1-poulhies@adacore.com/","msgid":"<20230103093518.76176-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:18","name":"[COMMITTED] ada: Simplify [Small_]Integer_Type_For","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093518.76176-1-poulhies@adacore.com/mbox/"},{"id":38331,"url":"https://patchwork.plctlab.org/api/1.2/patches/38331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093523.76239-1-poulhies@adacore.com/","msgid":"<20230103093523.76239-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:23","name":"[COMMITTED] ada: Fix detection of function calls in object declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093523.76239-1-poulhies@adacore.com/mbox/"},{"id":38337,"url":"https://patchwork.plctlab.org/api/1.2/patches/38337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093530.76302-1-poulhies@adacore.com/","msgid":"<20230103093530.76302-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:30","name":"[COMMITTED] ada: GNAT UGN: Adjust wording in \"Platform-specific Information\" chapter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093530.76302-1-poulhies@adacore.com/mbox/"},{"id":38340,"url":"https://patchwork.plctlab.org/api/1.2/patches/38340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093534.76368-1-poulhies@adacore.com/","msgid":"<20230103093534.76368-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:34","name":"[COMMITTED] ada: Make Sem_Util.Is_Aliased_View predicate more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093534.76368-1-poulhies@adacore.com/mbox/"},{"id":38342,"url":"https://patchwork.plctlab.org/api/1.2/patches/38342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093540.76431-1-poulhies@adacore.com/","msgid":"<20230103093540.76431-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:40","name":"[COMMITTED] ada: Another small adjustment to special resolution of membership test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093540.76431-1-poulhies@adacore.com/mbox/"},{"id":38332,"url":"https://patchwork.plctlab.org/api/1.2/patches/38332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093545.76495-1-poulhies@adacore.com/","msgid":"<20230103093545.76495-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:45","name":"[COMMITTED] ada: Adapt frontend optimization for aggregate assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093545.76495-1-poulhies@adacore.com/mbox/"},{"id":38336,"url":"https://patchwork.plctlab.org/api/1.2/patches/38336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093549.76562-1-poulhies@adacore.com/","msgid":"<20230103093549.76562-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:49","name":"[COMMITTED] ada: Fix calling convention of foreign functions returning limited type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093549.76562-1-poulhies@adacore.com/mbox/"},{"id":38335,"url":"https://patchwork.plctlab.org/api/1.2/patches/38335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093557.76628-1-poulhies@adacore.com/","msgid":"<20230103093557.76628-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:57","name":"[COMMITTED] ada: Make Apply_Discriminant_Check.Denotes_Explicit_Dereference more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093557.76628-1-poulhies@adacore.com/mbox/"},{"id":38344,"url":"https://patchwork.plctlab.org/api/1.2/patches/38344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093602.76692-1-poulhies@adacore.com/","msgid":"<20230103093602.76692-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:02","name":"[COMMITTED] ada: Fix format string parsing in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093602.76692-1-poulhies@adacore.com/mbox/"},{"id":38339,"url":"https://patchwork.plctlab.org/api/1.2/patches/38339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093606.76755-1-poulhies@adacore.com/","msgid":"<20230103093606.76755-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:06","name":"[COMMITTED] ada: Fix premature finalization of return temporary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093606.76755-1-poulhies@adacore.com/mbox/"},{"id":38334,"url":"https://patchwork.plctlab.org/api/1.2/patches/38334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093612.76819-1-poulhies@adacore.com/","msgid":"<20230103093612.76819-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:12","name":"[COMMITTED] ada: Fix parsing bug in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093612.76819-1-poulhies@adacore.com/mbox/"},{"id":38341,"url":"https://patchwork.plctlab.org/api/1.2/patches/38341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093615.76884-1-poulhies@adacore.com/","msgid":"<20230103093615.76884-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:15","name":"[COMMITTED] ada: Fix GNAT.Formatted_String'\''s handling of real values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093615.76884-1-poulhies@adacore.com/mbox/"},{"id":38343,"url":"https://patchwork.plctlab.org/api/1.2/patches/38343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093621.76948-1-poulhies@adacore.com/","msgid":"<20230103093621.76948-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:21","name":"[COMMITTED] ada: output.adb: fix newline being inserted when buffer is full","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093621.76948-1-poulhies@adacore.com/mbox/"},{"id":38338,"url":"https://patchwork.plctlab.org/api/1.2/patches/38338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093626.77011-1-poulhies@adacore.com/","msgid":"<20230103093626.77011-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:26","name":"[COMMITTED] ada: Fix unescaped quotes when combining fdiagnostics-format=json and gnatdJ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093626.77011-1-poulhies@adacore.com/mbox/"},{"id":38358,"url":"https://patchwork.plctlab.org/api/1.2/patches/38358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QDVwqcWxcRpq5u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-03T10:28:39","name":"cfgrtl: Don'\''t try to redirect asm goto to EXIT [PR108263]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QDVwqcWxcRpq5u@tucnak/mbox/"},{"id":38365,"url":"https://patchwork.plctlab.org/api/1.2/patches/38365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QEn3gxmWvMRdr7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-03T10:34:07","name":"expr: Fix up store_expr into SUBREG_PROMOTED_* target [PR108264]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QEn3gxmWvMRdr7@tucnak/mbox/"},{"id":38382,"url":"https://patchwork.plctlab.org/api/1.2/patches/38382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmbvx41g.fsf@oldenburg.str.redhat.com/","msgid":"<87pmbvx41g.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-01-03T11:15:23","name":"Various fixes for DWARF register size computation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmbvx41g.fsf@oldenburg.str.redhat.com/mbox/"},{"id":38427,"url":"https://patchwork.plctlab.org/api/1.2/patches/38427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009101d91f75$ac187920$04496b60$@nextmovesoftware.com/","msgid":"<009101d91f75$ac187920$04496b60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-03T13:17:02","name":"PR tree-optimization/92342: Optimize b & -(a==c) in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009101d91f75$ac187920$04496b60$@nextmovesoftware.com/mbox/"},{"id":38695,"url":"https://patchwork.plctlab.org/api/1.2/patches/38695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded1a76dd073768bef073314e86407439fea8f32.camel@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-03T22:47:20","name":"gcc-11: FTBFS on hurd-i386","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded1a76dd073768bef073314e86407439fea8f32.camel@gmail.com/mbox/"},{"id":38731,"url":"https://patchwork.plctlab.org/api/1.2/patches/38731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fNaJU0FQkpY1sbMSTBhtyL9Fe3rKjTMaPdqQoq0VZhJBQxB1UtH_QU19Rai4usWKkETmSjqNT7cW5JaJxPnLy6iDTYpq4LHcEZsk2twCHAE=@proton.me/","msgid":"","list_archive_url":null,"date":"2023-01-04T03:09:45","name":"libiberty: Handle Windows nul device in unlink-if-ordinary.c [PR108276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fNaJU0FQkpY1sbMSTBhtyL9Fe3rKjTMaPdqQoq0VZhJBQxB1UtH_QU19Rai4usWKkETmSjqNT7cW5JaJxPnLy6iDTYpq4LHcEZsk2twCHAE=@proton.me/mbox/"},{"id":38739,"url":"https://patchwork.plctlab.org/api/1.2/patches/38739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3a62e9d-1d13-e338-7392-22c207061d37@emailplus.org/","msgid":"","list_archive_url":null,"date":"2023-01-04T05:32:32","name":"Add link to gmplib.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3a62e9d-1d13-e338-7392-22c207061d37@emailplus.org/mbox/"},{"id":38749,"url":"https://patchwork.plctlab.org/api/1.2/patches/38749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com/","msgid":"<5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:16:34","name":"[PATCH-1,rs6000] Change mode and insn condition for scalar extract exp instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com/mbox/"},{"id":38750,"url":"https://patchwork.plctlab.org/api/1.2/patches/38750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com/","msgid":"<5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:16:48","name":"[PATCH-2,rs6000] Change mode and insn condition for scalar extract sig instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com/mbox/"},{"id":38751,"url":"https://patchwork.plctlab.org/api/1.2/patches/38751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f82d5de1-31fd-f700-f633-1aeb15b39e1c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T06:17:01","name":"[PATCH-3,rs6000] Change mode and insn condition for scalar insert exp instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f82d5de1-31fd-f700-f633-1aeb15b39e1c@linux.ibm.com/mbox/"},{"id":38752,"url":"https://patchwork.plctlab.org/api/1.2/patches/38752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2a6914d-f2e5-7383-fb7e-a88b50192b2c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T06:17:12","name":"[PATCH-4,rs6000] Change ilp32 target check for some scalar-extract-sig and scalar-insert-exp test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2a6914d-f2e5-7383-fb7e-a88b50192b2c@linux.ibm.com/mbox/"},{"id":38773,"url":"https://patchwork.plctlab.org/api/1.2/patches/38773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104065140.91578-1-guojiufu@linux.ibm.com/","msgid":"<20230104065140.91578-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:51:40","name":"[V3] rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104065140.91578-1-guojiufu@linux.ibm.com/mbox/"},{"id":38782,"url":"https://patchwork.plctlab.org/api/1.2/patches/38782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6e8ab52-3c92-3fa0-c70a-085c5c53e18e@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T08:28:19","name":"swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6e8ab52-3c92-3fa0-c70a-085c5c53e18e@linux.vnet.ibm.com/mbox/"},{"id":38812,"url":"https://patchwork.plctlab.org/api/1.2/patches/38812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VCJRmHC/U+F53U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:08:53","name":"ubsan: Avoid narrowing of multiply for -fsanitize=signed-integer-overflow [PR108256]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VCJRmHC/U+F53U@tucnak/mbox/"},{"id":38814,"url":"https://patchwork.plctlab.org/api/1.2/patches/38814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VDRnSoaO6DtSDV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:13:42","name":"vrp: Handle pointers in maybe_set_nonzero_bits [PR108253]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VDRnSoaO6DtSDV@tucnak/mbox/"},{"id":38815,"url":"https://patchwork.plctlab.org/api/1.2/patches/38815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com/","msgid":"<197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T09:20:14","name":"rs6000: Don'\''t use optimize_function_for_speed_p too early [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com/mbox/"},{"id":38817,"url":"https://patchwork.plctlab.org/api/1.2/patches/38817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com/","msgid":"<9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T09:20:23","name":"rs6000: Make P10_FUSION honour tuning setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com/mbox/"},{"id":38818,"url":"https://patchwork.plctlab.org/api/1.2/patches/38818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VE9wUKrxTJ0OJF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:20:55","name":"generic-match-head: Don'\''t assume GENERIC folding is done only early [PR108237]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VE9wUKrxTJ0OJF@tucnak/mbox/"},{"id":38825,"url":"https://patchwork.plctlab.org/api/1.2/patches/38825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VHqivJl6gu4GNA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:32:26","name":"c++: Error recovery in merge_default_template_args [PR108206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VHqivJl6gu4GNA@tucnak/mbox/"},{"id":38879,"url":"https://patchwork.plctlab.org/api/1.2/patches/38879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104115437.48991-1-jwakely@redhat.com/","msgid":"<20230104115437.48991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-04T11:54:37","name":"[committed] libstdc++: Fix std::array::data() to be a constant expression [PR108258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104115437.48991-1-jwakely@redhat.com/mbox/"},{"id":38896,"url":"https://patchwork.plctlab.org/api/1.2/patches/38896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104124439.191858-1-guojiufu@linux.ibm.com/","msgid":"<20230104124439.191858-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T12:44:39","name":"[V4] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104124439.191858-1-guojiufu@linux.ibm.com/mbox/"},{"id":38935,"url":"https://patchwork.plctlab.org/api/1.2/patches/38935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134526.206115-1-juzhe.zhong@rivai.ai/","msgid":"<20230104134526.206115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-04T13:45:26","name":"RISC-V: Refine Phase 3 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134526.206115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38936,"url":"https://patchwork.plctlab.org/api/1.2/patches/38936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134557.196235-1-guojiufu@linux.ibm.com/","msgid":"<20230104134557.196235-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T13:45:57","name":"[V2] extract DF/SF/SI/HI/QI subreg from parameter word on stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134557.196235-1-guojiufu@linux.ibm.com/mbox/"},{"id":38938,"url":"https://patchwork.plctlab.org/api/1.2/patches/38938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134848.209374-1-juzhe.zhong@rivai.ai/","msgid":"<20230104134848.209374-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-04T13:48:48","name":"RISC-V: Add testcases for IMM (0 ~ 31) AVL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134848.209374-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38993,"url":"https://patchwork.plctlab.org/api/1.2/patches/38993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104163758.2933306-1-ppalka@redhat.com/","msgid":"<20230104163758.2933306-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-04T16:37:58","name":"c++: mark_single_function and SFINAE [PR108282]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104163758.2933306-1-ppalka@redhat.com/mbox/"},{"id":39041,"url":"https://patchwork.plctlab.org/api/1.2/patches/39041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7W0LY8i7rq756/m@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-04T17:15:25","name":"Avoid quadratic behaviour of symbol renaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7W0LY8i7rq756/m@kam.mff.cuni.cz/mbox/"},{"id":39045,"url":"https://patchwork.plctlab.org/api/1.2/patches/39045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104175408.4437-1-softwaresale01@gmail.com/","msgid":"<20230104175408.4437-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2023-01-04T17:54:09","name":"[ping] cp: warn uninitialized const/ref in base class [PR80681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104175408.4437-1-softwaresale01@gmail.com/mbox/"},{"id":39157,"url":"https://patchwork.plctlab.org/api/1.2/patches/39157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1qhq3x9.fsf@debian/","msgid":"<87y1qhq3x9.fsf@debian>","list_archive_url":null,"date":"2023-01-04T23:24:18","name":"[modula2] Add missing declarations to gcc/m2/gm2-libs-min/M2RTS.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1qhq3x9.fsf@debian/mbox/"},{"id":39235,"url":"https://patchwork.plctlab.org/api/1.2/patches/39235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005225.140099-1-jwakely@redhat.com/","msgid":"<20230105005225.140099-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:52:25","name":"[committed] libstdc++: Fix std::chrono::hh_mm_ss with unsigned rep [PR108265]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005225.140099-1-jwakely@redhat.com/mbox/"},{"id":39236,"url":"https://patchwork.plctlab.org/api/1.2/patches/39236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005240.140165-1-jwakely@redhat.com/","msgid":"<20230105005240.140165-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:52:40","name":"[committed] libstdc++: Only use std::atomic if lock free [PR108228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005240.140165-1-jwakely@redhat.com/mbox/"},{"id":39237,"url":"https://patchwork.plctlab.org/api/1.2/patches/39237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005316.140306-1-jwakely@redhat.com/","msgid":"<20230105005316.140306-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:53:16","name":"[committed] libstdc++: Support single components in name of chrono::current_zone() [PR108211]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005316.140306-1-jwakely@redhat.com/mbox/"},{"id":39294,"url":"https://patchwork.plctlab.org/api/1.2/patches/39294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105033853.7111-2-benson_muite@emailplus.org/","msgid":"<20230105033853.7111-2-benson_muite@emailplus.org>","list_archive_url":null,"date":"2023-01-05T03:38:53","name":"[1/1] Add link to gmplib.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105033853.7111-2-benson_muite@emailplus.org/mbox/"},{"id":39489,"url":"https://patchwork.plctlab.org/api/1.2/patches/39489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp/","msgid":"<04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-05T08:40:51","name":"xtensa: Optimize stack frame adjustment more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp/mbox/"},{"id":39481,"url":"https://patchwork.plctlab.org/api/1.2/patches/39481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7auiK3sZ0VWIh/j@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-05T11:03:36","name":"[committed] openmp: Fix up finish_omp_target_clauses [PR108286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7auiK3sZ0VWIh/j@tucnak/mbox/"},{"id":39524,"url":"https://patchwork.plctlab.org/api/1.2/patches/39524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105130553.3434596-1-ysato@users.sourceforge.jp/","msgid":"<20230105130553.3434596-1-ysato@users.sourceforge.jp>","list_archive_url":null,"date":"2023-01-05T13:05:53","name":"PR target/89828 Inernal compiler error on -fno-omit-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105130553.3434596-1-ysato@users.sourceforge.jp/mbox/"},{"id":39528,"url":"https://patchwork.plctlab.org/api/1.2/patches/39528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105131323.81730-1-iain@sandoe.co.uk/","msgid":"<20230105131323.81730-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-05T13:13:23","name":"modula-2: Remove uses of scalb*() and significand*() [PR107631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105131323.81730-1-iain@sandoe.co.uk/mbox/"},{"id":39603,"url":"https://patchwork.plctlab.org/api/1.2/patches/39603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001501d9210f$694bed70$3be3c850$@nextmovesoftware.com/","msgid":"<001501d9210f$694bed70$3be3c850$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-05T14:10:04","name":"[x86_64] Introduce insvti_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001501d9210f$694bed70$3be3c850$@nextmovesoftware.com/mbox/"},{"id":39612,"url":"https://patchwork.plctlab.org/api/1.2/patches/39612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143835.155238-1-poulhies@adacore.com/","msgid":"<20230105143835.155238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:35","name":"[COMMITTED] ada: Fix incorrect warning about unreferenced packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143835.155238-1-poulhies@adacore.com/mbox/"},{"id":39613,"url":"https://patchwork.plctlab.org/api/1.2/patches/39613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143844.155367-1-poulhies@adacore.com/","msgid":"<20230105143844.155367-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:44","name":"[COMMITTED] ada: Fix finalization issues in extended return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143844.155367-1-poulhies@adacore.com/mbox/"},{"id":39616,"url":"https://patchwork.plctlab.org/api/1.2/patches/39616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143853.155433-1-poulhies@adacore.com/","msgid":"<20230105143853.155433-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:53","name":"[COMMITTED] ada: Update doc for -gnatw_q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143853.155433-1-poulhies@adacore.com/mbox/"},{"id":39617,"url":"https://patchwork.plctlab.org/api/1.2/patches/39617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143901.155499-1-poulhies@adacore.com/","msgid":"<20230105143901.155499-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:01","name":"[COMMITTED] ada: Better error message for bad Discard_Names configuration pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143901.155499-1-poulhies@adacore.com/mbox/"},{"id":39619,"url":"https://patchwork.plctlab.org/api/1.2/patches/39619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143907.155566-1-poulhies@adacore.com/","msgid":"<20230105143907.155566-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:07","name":"[COMMITTED] ada: Revert to constrained allocation for string concatenation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143907.155566-1-poulhies@adacore.com/mbox/"},{"id":39614,"url":"https://patchwork.plctlab.org/api/1.2/patches/39614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143912.155630-1-poulhies@adacore.com/","msgid":"<20230105143912.155630-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:12","name":"[COMMITTED] ada: Spurious error on Lock_Free protected type with discriminants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143912.155630-1-poulhies@adacore.com/mbox/"},{"id":39618,"url":"https://patchwork.plctlab.org/api/1.2/patches/39618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143918.155693-1-poulhies@adacore.com/","msgid":"<20230105143918.155693-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:18","name":"[COMMITTED] ada: Fix generic instantiation of sibling package","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143918.155693-1-poulhies@adacore.com/mbox/"},{"id":39615,"url":"https://patchwork.plctlab.org/api/1.2/patches/39615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143924.155757-1-poulhies@adacore.com/","msgid":"<20230105143924.155757-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:24","name":"[COMMITTED] ada: Adjust handling of \"%g\" in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143924.155757-1-poulhies@adacore.com/mbox/"},{"id":39620,"url":"https://patchwork.plctlab.org/api/1.2/patches/39620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143933.155824-1-poulhies@adacore.com/","msgid":"<20230105143933.155824-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:33","name":"[COMMITTED] ada: Simplify new expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143933.155824-1-poulhies@adacore.com/mbox/"},{"id":39622,"url":"https://patchwork.plctlab.org/api/1.2/patches/39622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143937.155893-1-poulhies@adacore.com/","msgid":"<20230105143937.155893-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:37","name":"[COMMITTED] ada: Further adjust freezing for expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143937.155893-1-poulhies@adacore.com/mbox/"},{"id":39628,"url":"https://patchwork.plctlab.org/api/1.2/patches/39628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143946.155956-1-poulhies@adacore.com/","msgid":"<20230105143946.155956-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:46","name":"[COMMITTED] ada: Update gnatpp documentation with --layout switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143946.155956-1-poulhies@adacore.com/mbox/"},{"id":39630,"url":"https://patchwork.plctlab.org/api/1.2/patches/39630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143954.156047-1-poulhies@adacore.com/","msgid":"<20230105143954.156047-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:54","name":"[COMMITTED] ada: INOX: prototype RFC on String Interpolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143954.156047-1-poulhies@adacore.com/mbox/"},{"id":39624,"url":"https://patchwork.plctlab.org/api/1.2/patches/39624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144009.156114-1-poulhies@adacore.com/","msgid":"<20230105144009.156114-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:09","name":"[COMMITTED] ada: Fix spurious emissions of -gnatwj warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144009.156114-1-poulhies@adacore.com/mbox/"},{"id":39621,"url":"https://patchwork.plctlab.org/api/1.2/patches/39621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144020.156181-1-poulhies@adacore.com/","msgid":"<20230105144020.156181-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:20","name":"[COMMITTED] ada: Fix pasto in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144020.156181-1-poulhies@adacore.com/mbox/"},{"id":39629,"url":"https://patchwork.plctlab.org/api/1.2/patches/39629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144040.156244-1-poulhies@adacore.com/","msgid":"<20230105144040.156244-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:40","name":"[COMMITTED] ada: Optimize class-wide objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144040.156244-1-poulhies@adacore.com/mbox/"},{"id":39623,"url":"https://patchwork.plctlab.org/api/1.2/patches/39623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144045.156314-1-poulhies@adacore.com/","msgid":"<20230105144045.156314-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:45","name":"[COMMITTED] ada: Do not use decimal approximation in -gnatRj output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144045.156314-1-poulhies@adacore.com/mbox/"},{"id":39631,"url":"https://patchwork.plctlab.org/api/1.2/patches/39631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144051.156381-1-poulhies@adacore.com/","msgid":"<20230105144051.156381-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:51","name":"[COMMITTED] ada: Fix nested generic instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144051.156381-1-poulhies@adacore.com/mbox/"},{"id":39633,"url":"https://patchwork.plctlab.org/api/1.2/patches/39633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144055.156446-1-poulhies@adacore.com/","msgid":"<20230105144055.156446-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:55","name":"[COMMITTED] ada: Remove unhelpful special case for renamed bodies in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144055.156446-1-poulhies@adacore.com/mbox/"},{"id":39627,"url":"https://patchwork.plctlab.org/api/1.2/patches/39627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144059.156509-1-poulhies@adacore.com/","msgid":"<20230105144059.156509-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:59","name":"[COMMITTED] ada: Flag renaming-as-spec as a body to inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144059.156509-1-poulhies@adacore.com/mbox/"},{"id":39632,"url":"https://patchwork.plctlab.org/api/1.2/patches/39632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144107.156577-1-poulhies@adacore.com/","msgid":"<20230105144107.156577-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:41:07","name":"[COMMITTED] ada: Clean up interface handling in Expand_N_Object_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144107.156577-1-poulhies@adacore.com/mbox/"},{"id":39635,"url":"https://patchwork.plctlab.org/api/1.2/patches/39635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144111.156640-1-poulhies@adacore.com/","msgid":"<20230105144111.156640-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:41:11","name":"[COMMITTED] ada: Minor tweak to test added in previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144111.156640-1-poulhies@adacore.com/mbox/"},{"id":39661,"url":"https://patchwork.plctlab.org/api/1.2/patches/39661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105162911.82041-1-jwakely@redhat.com/","msgid":"<20230105162911.82041-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T16:29:11","name":"[committed] libstdc++: Reduce size of std::bind_front(empty_type) result [PR108290]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105162911.82041-1-jwakely@redhat.com/mbox/"},{"id":39662,"url":"https://patchwork.plctlab.org/api/1.2/patches/39662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105163007.82096-1-jwakely@redhat.com/","msgid":"<20230105163007.82096-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T16:30:07","name":"[committed] libstdc++: Fix printers for Python 2 [PR108212]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105163007.82096-1-jwakely@redhat.com/mbox/"},{"id":39663,"url":"https://patchwork.plctlab.org/api/1.2/patches/39663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fscpkjy7.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-05T16:46:56","name":"ipa: Sort ipa_param_body_adjustments::m_replacements (PR 108110)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fscpkjy7.fsf@suse.cz/mbox/"},{"id":39709,"url":"https://patchwork.plctlab.org/api/1.2/patches/39709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105172010.3598077-1-ppalka@redhat.com/","msgid":"<20230105172010.3598077-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-05T17:20:10","name":"c++: class-head parsing and CPP_TEMPLATE_ID access [PR108275]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105172010.3598077-1-ppalka@redhat.com/mbox/"},{"id":39731,"url":"https://patchwork.plctlab.org/api/1.2/patches/39731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7cV5aVDZBXxqCmU@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-05T18:24:37","name":"[committed] hppa: Fix atomic operations on PA-RISC 2.0 processors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7cV5aVDZBXxqCmU@mx3210.localdomain/mbox/"},{"id":39782,"url":"https://patchwork.plctlab.org/api/1.2/patches/39782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/febe8136ba2e1afbbf70beff8ce0a1cf66401dff.1672946731.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2023-01-05T19:27:40","name":"wwwdocs: Note that old reload is deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/febe8136ba2e1afbbf70beff8ce0a1cf66401dff.1672946731.git.segher@kernel.crashing.org/mbox/"},{"id":39826,"url":"https://patchwork.plctlab.org/api/1.2/patches/39826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com/","msgid":"<0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2023-01-05T22:36:05","name":"[v2,1/4] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39824,"url":"https://patchwork.plctlab.org/api/1.2/patches/39824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af19256469798ddf9b7906adacb8f8edfd574a25.1672867272.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-05T22:36:06","name":"[v2,2/4] diagnostics: Handle generated data locations in edit_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af19256469798ddf9b7906adacb8f8edfd574a25.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39827,"url":"https://patchwork.plctlab.org/api/1.2/patches/39827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com/","msgid":"<9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2023-01-05T22:36:07","name":"[v2,3/4] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39825,"url":"https://patchwork.plctlab.org/api/1.2/patches/39825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e364f3a6881ed90c41090e890121332adf62c0ee.1672867272.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-05T22:36:08","name":"[v2,4/4] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e364f3a6881ed90c41090e890121332adf62c0ee.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39968,"url":"https://patchwork.plctlab.org/api/1.2/patches/39968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb666223-2b26-4914-903d-6fbafcafd5c0.jinma@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T06:56:03","name":"[RISCV] Change the generation mode of `adjust_sp_rtx` from gen_insn to gen_SET.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb666223-2b26-4914-903d-6fbafcafd5c0.jinma@linux.alibaba.com/mbox/"},{"id":39978,"url":"https://patchwork.plctlab.org/api/1.2/patches/39978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz/","msgid":"<6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz>","list_archive_url":null,"date":"2023-01-06T07:49:23","name":"[pushed] contrib: add '\''contrib'\'' to default dirs in update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz/mbox/"},{"id":39991,"url":"https://patchwork.plctlab.org/api/1.2/patches/39991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106082314.2091-1-anothername27-unity@yahoo.com/","msgid":"<20230106082314.2091-1-anothername27-unity@yahoo.com>","list_archive_url":null,"date":"2023-01-06T08:23:14","name":"Handle Windows nul device in unlink-if-ordinary.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106082314.2091-1-anothername27-unity@yahoo.com/mbox/"},{"id":39995,"url":"https://patchwork.plctlab.org/api/1.2/patches/39995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083118.2141-1-anothername27-unity@yahoo.com/","msgid":"<20230106083118.2141-1-anothername27-unity@yahoo.com>","list_archive_url":null,"date":"2023-01-06T08:31:18","name":"Handle Windows nul device in unlink-if-ordinary.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083118.2141-1-anothername27-unity@yahoo.com/mbox/"},{"id":40003,"url":"https://patchwork.plctlab.org/api/1.2/patches/40003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083908.332604-1-chigot@adacore.com/","msgid":"<20230106083908.332604-1-chigot@adacore.com>","list_archive_url":null,"date":"2023-01-06T08:39:08","name":"configure: remove dependencies on gmp and mpfr when gdb is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083908.332604-1-chigot@adacore.com/mbox/"},{"id":40052,"url":"https://patchwork.plctlab.org/api/1.2/patches/40052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com/","msgid":"<11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com>","list_archive_url":null,"date":"2023-01-06T09:26:37","name":"rs6000: Teach rs6000_opaque_type_invalid_use_p about inline asm [PR108272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com/mbox/"},{"id":40057,"url":"https://patchwork.plctlab.org/api/1.2/patches/40057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc4e1ec0-9f4c-0a9c-74c2-e3ba753b9414@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T09:28:26","name":"rs6000: Allow powerpc64 to be unset for implicit 64 bit [PR108240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc4e1ec0-9f4c-0a9c-74c2-e3ba753b9414@linux.ibm.com/mbox/"},{"id":40063,"url":"https://patchwork.plctlab.org/api/1.2/patches/40063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7fwNTmas50x4CUm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-06T09:56:05","name":"[committed] testsuite: Add testcases from PR108292 and PR108308","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7fwNTmas50x4CUm@tucnak/mbox/"},{"id":40073,"url":"https://patchwork.plctlab.org/api/1.2/patches/40073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106102520.3949796-1-yunqiang.su@cipunited.com/","msgid":"<20230106102520.3949796-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-01-06T10:25:20","name":"Set CROSS_SYSTEM_HEADER_DIR according includedir","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106102520.3949796-1-yunqiang.su@cipunited.com/mbox/"},{"id":40081,"url":"https://patchwork.plctlab.org/api/1.2/patches/40081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106103632.3951217-1-yunqiang.su@cipunited.com/","msgid":"<20230106103632.3951217-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-01-06T10:36:32","name":"libsanitizer/mips: always build with largefile support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106103632.3951217-1-yunqiang.su@cipunited.com/mbox/"},{"id":40084,"url":"https://patchwork.plctlab.org/api/1.2/patches/40084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104126.161754-1-jwakely@redhat.com/","msgid":"<20230106104126.161754-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T10:41:26","name":"[wwwdocs] Document libstdc++ additions for GCC 12 and 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104126.161754-1-jwakely@redhat.com/mbox/"},{"id":40088,"url":"https://patchwork.plctlab.org/api/1.2/patches/40088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104846.172544-1-jwakely@redhat.com/","msgid":"<20230106104846.172544-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T10:48:46","name":"[wwwdocs] Fix typo in libstdc++ release notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104846.172544-1-jwakely@redhat.com/mbox/"},{"id":40093,"url":"https://patchwork.plctlab.org/api/1.2/patches/40093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz/","msgid":"<60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz>","list_archive_url":null,"date":"2023-01-06T11:33:54","name":"diagnostics: fix crash with -fdiagnostics-format=json-file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz/mbox/"},{"id":40099,"url":"https://patchwork.plctlab.org/api/1.2/patches/40099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106115402.178926-1-jwakely@redhat.com/","msgid":"<20230106115402.178926-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T11:54:02","name":"[committed] libstdc++: Fix deadlock in debug iterator increment [PR108288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106115402.178926-1-jwakely@redhat.com/mbox/"},{"id":40108,"url":"https://patchwork.plctlab.org/api/1.2/patches/40108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz/","msgid":"<6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz>","list_archive_url":null,"date":"2023-01-06T12:21:26","name":"Remove legacy pre-C++ 11 definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz/mbox/"},{"id":40109,"url":"https://patchwork.plctlab.org/api/1.2/patches/40109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106122552.145679-1-guojiufu@linux.ibm.com/","msgid":"<20230106122552.145679-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-06T12:25:52","name":"rs6000: mark tieable between INT and FLOAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106122552.145679-1-guojiufu@linux.ibm.com/mbox/"},{"id":40123,"url":"https://patchwork.plctlab.org/api/1.2/patches/40123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106132658.189522-1-jwakely@redhat.com/","msgid":"<20230106132658.189522-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T13:26:58","name":"[committed] libstdc++: Disable broken std::format for floating-point types [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106132658.189522-1-jwakely@redhat.com/mbox/"},{"id":40144,"url":"https://patchwork.plctlab.org/api/1.2/patches/40144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106141200.237958-1-jwakely@redhat.com/","msgid":"<20230106141200.237958-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T14:12:00","name":"[committed] libstdc++: Fix misuse of alloca in std::bitset [PR108214]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106141200.237958-1-jwakely@redhat.com/mbox/"},{"id":40155,"url":"https://patchwork.plctlab.org/api/1.2/patches/40155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106145950.3685552-1-ppalka@redhat.com/","msgid":"<20230106145950.3685552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-06T14:59:50","name":"libstdc++: Add feature-test macros for implemented C++23 views [PR108260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106145950.3685552-1-ppalka@redhat.com/mbox/"},{"id":40213,"url":"https://patchwork.plctlab.org/api/1.2/patches/40213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfEK_Y1fQVHCZ=RGy3e_O5uYCa4cOhPm9aZGb1Q_9t_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T17:42:19","name":"libbacktrace patch committed: Only test --build-id if supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfEK_Y1fQVHCZ=RGy3e_O5uYCa4cOhPm9aZGb1Q_9t_g@mail.gmail.com/mbox/"},{"id":40217,"url":"https://patchwork.plctlab.org/api/1.2/patches/40217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce46a74e-c892-3d54-1741-9758166eee4b@126.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T18:01:05","name":"Always define `WIN32_LEAN_AND_MEAN` before ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce46a74e-c892-3d54-1741-9758166eee4b@126.com/mbox/"},{"id":40232,"url":"https://patchwork.plctlab.org/api/1.2/patches/40232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c58052a2-2ac8-90de-d6c1-c38cb2f74cd0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T19:32:48","name":"[committed] c: C2x semantics for __builtin_tgmath","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c58052a2-2ac8-90de-d6c1-c38cb2f74cd0@codesourcery.com/mbox/"},{"id":40268,"url":"https://patchwork.plctlab.org/api/1.2/patches/40268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212129.397061-1-jwakely@redhat.com/","msgid":"<20230106212129.397061-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T21:21:29","name":"[committed] libstdc++: Refactor time_zone::_Impl::rules_counter [PR108235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212129.397061-1-jwakely@redhat.com/mbox/"},{"id":40269,"url":"https://patchwork.plctlab.org/api/1.2/patches/40269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212135.397113-1-jwakely@redhat.com/","msgid":"<20230106212135.397113-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T21:21:35","name":"[committed] libstdc++: Suppress -Waddress warning in tzdb.cc [PR108228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212135.397113-1-jwakely@redhat.com/mbox/"},{"id":40270,"url":"https://patchwork.plctlab.org/api/1.2/patches/40270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5zs5l4.fsf@debian/","msgid":"<87wn5zs5l4.fsf@debian>","list_archive_url":null,"date":"2023-01-06T21:42:15","name":"[modula2] PR-108182 gm2 driver mishandles target and multilib options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5zs5l4.fsf@debian/mbox/"},{"id":40301,"url":"https://patchwork.plctlab.org/api/1.2/patches/40301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp/","msgid":"<19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-07T02:55:11","name":"[v2] xtensa: Optimize stack frame adjustment more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp/mbox/"},{"id":40302,"url":"https://patchwork.plctlab.org/api/1.2/patches/40302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp/","msgid":"<1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-07T02:55:26","name":"xtensa: Optimize bitwise splicing operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp/mbox/"},{"id":40362,"url":"https://patchwork.plctlab.org/api/1.2/patches/40362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107105349.92210-1-iain@sandoe.co.uk/","msgid":"<20230107105349.92210-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-07T10:53:49","name":"modula-2, driver: Do not add extra '\''-L'\'' options that shadow $libdir.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107105349.92210-1-iain@sandoe.co.uk/mbox/"},{"id":40381,"url":"https://patchwork.plctlab.org/api/1.2/patches/40381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGA7tdvVLbySE0i=YjV7GT-ArgFyaJAb0-k8XzwNqhowDDZrvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-07T12:01:05","name":"gcc: fix gcc --help -v opertion with linker flags and input files [PR108328]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGA7tdvVLbySE0i=YjV7GT-ArgFyaJAb0-k8XzwNqhowDDZrvw@mail.gmail.com/mbox/"},{"id":40413,"url":"https://patchwork.plctlab.org/api/1.2/patches/40413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107154545.93295-1-iain@sandoe.co.uk/","msgid":"<20230107154545.93295-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-07T15:45:45","name":"modula-2, libm2min: Declare abort and exit as expected.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107154545.93295-1-iain@sandoe.co.uk/mbox/"},{"id":40414,"url":"https://patchwork.plctlab.org/api/1.2/patches/40414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de/","msgid":"<7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de>","list_archive_url":null,"date":"2023-01-07T15:46:20","name":"[fortran] Fix common subexpression elimination with IEEE rounding (PR108329)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de/mbox/"},{"id":40426,"url":"https://patchwork.plctlab.org/api/1.2/patches/40426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fscmckhx.fsf@debian/","msgid":"<87fscmckhx.fsf@debian>","list_archive_url":null,"date":"2023-01-07T17:39:06","name":"[modula2] v2 PR-108182 gm2 driver mishandles target and multilib options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fscmckhx.fsf@debian/mbox/"},{"id":40444,"url":"https://patchwork.plctlab.org/api/1.2/patches/40444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7m9lk+1t6ItwuXB@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-07T18:44:38","name":"[committed] Fix compilation of gcc.dg/atomic/c11-atomic-exec-[45].c on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7m9lk+1t6ItwuXB@mx3210.localdomain/mbox/"},{"id":40446,"url":"https://patchwork.plctlab.org/api/1.2/patches/40446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7nEKiHZJhHBwJMf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-07T19:12:42","name":"c++tools: Fix compilation of server.cc on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7nEKiHZJhHBwJMf@mx3210.localdomain/mbox/"},{"id":40481,"url":"https://patchwork.plctlab.org/api/1.2/patches/40481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1bfa676-c35d-cdea-af7d-95463f1f25a1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-08T05:03:49","name":"[v2] xtensa: Optimize bitwise splicing operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1bfa676-c35d-cdea-af7d-95463f1f25a1@yahoo.co.jp/mbox/"},{"id":40787,"url":"https://patchwork.plctlab.org/api/1.2/patches/40787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vqI9Y4uO500WY1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-09T10:19:15","name":"c++: Only do maybe_init_list_as_range optimization if !processing_template_decl [PR108047]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vqI9Y4uO500WY1@tucnak/mbox/"},{"id":40788,"url":"https://patchwork.plctlab.org/api/1.2/patches/40788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vtQYCoWik3D9Wc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-09T10:32:33","name":"calls: Fix up TYPE_NO_NAMED_ARGS_STDARG_P handling [PR107453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vtQYCoWik3D9Wc@tucnak/mbox/"},{"id":40792,"url":"https://patchwork.plctlab.org/api/1.2/patches/40792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz/","msgid":"<7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz>","list_archive_url":null,"date":"2023-01-09T10:52:55","name":"hash: do not insert deleted value to a hash_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz/mbox/"},{"id":40798,"url":"https://patchwork.plctlab.org/api/1.2/patches/40798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110844.24C06134AD@imap2.suse-dmz.suse.de/","msgid":"<20230109110844.24C06134AD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T11:08:43","name":"tree-optimization/101912 - testcase for fixed uninit case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110844.24C06134AD@imap2.suse-dmz.suse.de/mbox/"},{"id":40799,"url":"https://patchwork.plctlab.org/api/1.2/patches/40799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110941.9FB86134AD@imap2.suse-dmz.suse.de/","msgid":"<20230109110941.9FB86134AD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T11:09:41","name":"tree-optimization/107767 - not profitable switch conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110941.9FB86134AD@imap2.suse-dmz.suse.de/mbox/"},{"id":40820,"url":"https://patchwork.plctlab.org/api/1.2/patches/40820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109123126.2C9BA13583@imap2.suse-dmz.suse.de/","msgid":"<20230109123126.2C9BA13583@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T12:31:25","name":"middle-end/69482 - not preserving volatile accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109123126.2C9BA13583@imap2.suse-dmz.suse.de/mbox/"},{"id":40867,"url":"https://patchwork.plctlab.org/api/1.2/patches/40867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com/","msgid":"<00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T13:29:14","name":"[nvptx] Correct pattern for popcountdi2 insn in nvptx.md.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com/mbox/"},{"id":40888,"url":"https://patchwork.plctlab.org/api/1.2/patches/40888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109140727.78A9C13583@imap2.suse-dmz.suse.de/","msgid":"<20230109140727.78A9C13583@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T14:07:27","name":"middle-end/108209 - typo in genmatch.cc:commutative_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109140727.78A9C13583@imap2.suse-dmz.suse.de/mbox/"},{"id":40894,"url":"https://patchwork.plctlab.org/api/1.2/patches/40894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144508.2285330-1-poulhies@adacore.com/","msgid":"<20230109144508.2285330-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-09T14:45:08","name":"[COMMITTED] ada: Simplify finalization of temporaries created for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144508.2285330-1-poulhies@adacore.com/mbox/"},{"id":40895,"url":"https://patchwork.plctlab.org/api/1.2/patches/40895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144525.2286171-1-poulhies@adacore.com/","msgid":"<20230109144525.2286171-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-09T14:45:25","name":"[COMMITTED] ada: Remove a couple of unreachable statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144525.2286171-1-poulhies@adacore.com/mbox/"},{"id":40911,"url":"https://patchwork.plctlab.org/api/1.2/patches/40911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com/","msgid":"<011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T15:01:10","name":"[x86] PR rtl-optimization/107991: peephole2 to tweak register allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com/mbox/"},{"id":41084,"url":"https://patchwork.plctlab.org/api/1.2/patches/41084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com/","msgid":"<004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T19:49:31","name":"PR rtl-optimization/106421: ICE in bypass_block from non-local goto.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com/mbox/"},{"id":41184,"url":"https://patchwork.plctlab.org/api/1.2/patches/41184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com/","msgid":"<572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com>","list_archive_url":null,"date":"2023-01-09T21:57:16","name":"[committed] c: Check for modifiable static compound literals in inline definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com/mbox/"},{"id":41190,"url":"https://patchwork.plctlab.org/api/1.2/patches/41190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3209307.aeNJFYEL58@fomalhaut/","msgid":"<3209307.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2023-01-09T22:30:52","name":"Modula-2: fix documentation layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3209307.aeNJFYEL58@fomalhaut/mbox/"},{"id":41191,"url":"https://patchwork.plctlab.org/api/1.2/patches/41191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109223307.144358-1-juzhe.zhong@rivai.ai/","msgid":"<20230109223307.144358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:33:07","name":"RISC-V: Cleanup the codes of bitmap create and free [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109223307.144358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41195,"url":"https://patchwork.plctlab.org/api/1.2/patches/41195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224007.146325-1-juzhe.zhong@rivai.ai/","msgid":"<20230109224007.146325-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:40:07","name":"RISC-V: Avoid redundant flow in forward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224007.146325-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41203,"url":"https://patchwork.plctlab.org/api/1.2/patches/41203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224045.13453-1-david.faust@oracle.com/","msgid":"<20230109224045.13453-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-01-09T22:40:45","name":"bpf: correct bpf_print_operand for floats [PR108293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224045.13453-1-david.faust@oracle.com/mbox/"},{"id":41207,"url":"https://patchwork.plctlab.org/api/1.2/patches/41207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224726.148263-1-juzhe.zhong@rivai.ai/","msgid":"<20230109224726.148263-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:47:26","name":"RISC-V: Refine codes in backward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224726.148263-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41208,"url":"https://patchwork.plctlab.org/api/1.2/patches/41208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225035.149190-1-juzhe.zhong@rivai.ai/","msgid":"<20230109225035.149190-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:50:35","name":"RISC-V: Avoid redundant flow in backward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225035.149190-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41210,"url":"https://patchwork.plctlab.org/api/1.2/patches/41210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225643.150853-1-juzhe.zhong@rivai.ai/","msgid":"<20230109225643.150853-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:56:43","name":"RISC-V: Rename insn into rinsn for rtx_insn *","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225643.150853-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41211,"url":"https://patchwork.plctlab.org/api/1.2/patches/41211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231059.154229-1-juzhe.zhong@rivai.ai/","msgid":"<20230109231059.154229-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:10:59","name":"RISC-V: Remove dirty_pat since it is redundant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231059.154229-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41214,"url":"https://patchwork.plctlab.org/api/1.2/patches/41214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231720.155773-1-juzhe.zhong@rivai.ai/","msgid":"<20230109231720.155773-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:17:20","name":"RISC-V: Add probability model of each block to prevent endless loop of Phase 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231720.155773-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41217,"url":"https://patchwork.plctlab.org/api/1.2/patches/41217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232057.156867-1-juzhe.zhong@rivai.ai/","msgid":"<20230109232057.156867-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:20:57","name":"RISC-V: Call DCE to remove redundant instructions created by the PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232057.156867-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41218,"url":"https://patchwork.plctlab.org/api/1.2/patches/41218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232911.158606-1-juzhe.zhong@rivai.ai/","msgid":"<20230109232911.158606-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:29:11","name":"RISC-V: Fix bugs of supporting AVL=REG (single-real-def) in VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232911.158606-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41219,"url":"https://patchwork.plctlab.org/api/1.2/patches/41219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233533.160230-1-juzhe.zhong@rivai.ai/","msgid":"<20230109233533.160230-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:35:33","name":"RISC-V: Adjust testcases for AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233533.160230-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41225,"url":"https://patchwork.plctlab.org/api/1.2/patches/41225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233838.161078-1-juzhe.zhong@rivai.ai/","msgid":"<20230109233838.161078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:38:38","name":"RISC-V: Add testcases for AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233838.161078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41228,"url":"https://patchwork.plctlab.org/api/1.2/patches/41228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109234026.161632-1-juzhe.zhong@rivai.ai/","msgid":"<20230109234026.161632-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:40:26","name":"RISC-V: Add the rest testcases of AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109234026.161632-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41253,"url":"https://patchwork.plctlab.org/api/1.2/patches/41253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wzf9ci.fsf@debian/","msgid":"<87h6wzf9ci.fsf@debian>","list_archive_url":null,"date":"2023-01-10T01:48:29","name":"[Modula2] PR-108142 Many empty directories created in the build directory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wzf9ci.fsf@debian/mbox/"},{"id":41280,"url":"https://patchwork.plctlab.org/api/1.2/patches/41280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp/","msgid":"<2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-10T03:34:01","name":"xtensa: Make instruction cost estimation for size more accurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp/mbox/"},{"id":41292,"url":"https://patchwork.plctlab.org/api/1.2/patches/41292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7zqJvSj6haMwSMF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-10T04:31:34","name":"More znver4 x86-tune flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7zqJvSj6haMwSMF@kam.mff.cuni.cz/mbox/"},{"id":41368,"url":"https://patchwork.plctlab.org/api/1.2/patches/41368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110090426.11475-1-krebbel@linux.ibm.com/","msgid":"<20230110090426.11475-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-01-10T09:04:26","name":"[Committed] IBM zSystems: Make -fcall-saved-... work.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110090426.11475-1-krebbel@linux.ibm.com/mbox/"},{"id":41382,"url":"https://patchwork.plctlab.org/api/1.2/patches/41382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110094614.0E81A1358A@imap2.suse-dmz.suse.de/","msgid":"<20230110094614.0E81A1358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-10T09:46:13","name":"tree-optimization/108314 - avoid BIT_NOT optimization for extract-last","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110094614.0E81A1358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41384,"url":"https://patchwork.plctlab.org/api/1.2/patches/41384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-1-arsen@aarsen.me/","msgid":"<20230110100305.1420589-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-10T10:03:04","name":"[1/2] libstdc++: Enable string_view in freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-1-arsen@aarsen.me/mbox/"},{"id":41383,"url":"https://patchwork.plctlab.org/api/1.2/patches/41383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-2-arsen@aarsen.me/","msgid":"<20230110100305.1420589-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-10T10:03:05","name":"[2/2] libstdc++: Fix a few !HOSTED test regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-2-arsen@aarsen.me/mbox/"},{"id":41412,"url":"https://patchwork.plctlab.org/api/1.2/patches/41412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc27fa73-cb20-52f3-11bc-302a33157b34@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T11:35:38","name":"[1/2] OpenMP: Add lang hooks + run-time filled map arrays for Fortran deep mapping of DT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc27fa73-cb20-52f3-11bc-302a33157b34@codesourcery.com/mbox/"},{"id":41418,"url":"https://patchwork.plctlab.org/api/1.2/patches/41418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-1-jwakely@redhat.com/","msgid":"<20230110114657.636853-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:55","name":"[committed,1/3] libstdc++: Fix std::span constraint for sizeof(size_t) < sizeof(int) [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-1-jwakely@redhat.com/mbox/"},{"id":41417,"url":"https://patchwork.plctlab.org/api/1.2/patches/41417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-2-jwakely@redhat.com/","msgid":"<20230110114657.636853-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:56","name":"[committed,2/3] libstdc++: Fix some algos for 16-bit size_t [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-2-jwakely@redhat.com/mbox/"},{"id":41416,"url":"https://patchwork.plctlab.org/api/1.2/patches/41416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-3-jwakely@redhat.com/","msgid":"<20230110114657.636853-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:57","name":"[committed,3/3] libstdc++: Fix tzdb.cc to compile with -fno-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-3-jwakely@redhat.com/mbox/"},{"id":41451,"url":"https://patchwork.plctlab.org/api/1.2/patches/41451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB541256BD6B9838E4BE055B85ACFF9@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T12:58:59","name":"[v2] libstdc++: Fix Unicode codecvt and add tests [PR86419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB541256BD6B9838E4BE055B85ACFF9@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":41476,"url":"https://patchwork.plctlab.org/api/1.2/patches/41476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110134527.194389-1-guojiufu@linux.ibm.com/","msgid":"<20230110134527.194389-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-10T13:45:27","name":"rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110134527.194389-1-guojiufu@linux.ibm.com/mbox/"},{"id":41489,"url":"https://patchwork.plctlab.org/api/1.2/patches/41489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB6507C6E5774C27F424DCB1B7BBFF9@DB9PR08MB6507.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T14:07:42","name":"[PING] arm: Split up MVE _Generic associations to prevent type clashes [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB6507C6E5774C27F424DCB1B7BBFF9@DB9PR08MB6507.eurprd08.prod.outlook.com/mbox/"},{"id":41512,"url":"https://patchwork.plctlab.org/api/1.2/patches/41512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com/","msgid":"<9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com>","list_archive_url":null,"date":"2023-01-10T15:10:42","name":"gcc: emit DW_AT_name for DW_TAG_GNU_formal_parameter_pack [PR70536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com/mbox/"},{"id":41532,"url":"https://patchwork.plctlab.org/api/1.2/patches/41532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110155328.5B4AC13338@imap2.suse-dmz.suse.de/","msgid":"<20230110155328.5B4AC13338@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-10T15:53:28","name":"tree-optimization/106293 - missed DSE with virtual LC PHI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110155328.5B4AC13338@imap2.suse-dmz.suse.de/mbox/"},{"id":41603,"url":"https://patchwork.plctlab.org/api/1.2/patches/41603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110191202.8641-1-david.faust@oracle.com/","msgid":"<20230110191202.8641-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-01-10T19:12:02","name":"[v2] bpf: correct bpf_print_operand for floats [PR108293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110191202.8641-1-david.faust@oracle.com/mbox/"},{"id":41672,"url":"https://patchwork.plctlab.org/api/1.2/patches/41672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a62769c1-9991-4f41-8926-8ee0eb2240bd-1673387787545@3c-app-gmx-bap64/","msgid":"","list_archive_url":null,"date":"2023-01-10T21:56:27","name":"Fortran: frontend passes do_subscript leaks gmp memory [PR97345]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a62769c1-9991-4f41-8926-8ee0eb2240bd-1673387787545@3c-app-gmx-bap64/mbox/"},{"id":41736,"url":"https://patchwork.plctlab.org/api/1.2/patches/41736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp/","msgid":"<076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-11T04:20:42","name":"ifcvt.cc: Prevent excessive if-conversion for conditional moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp/mbox/"},{"id":41776,"url":"https://patchwork.plctlab.org/api/1.2/patches/41776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111070409.4CE071358A@imap2.suse-dmz.suse.de/","msgid":"<20230111070409.4CE071358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T07:04:08","name":"tree-optimization/106293 - fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111070409.4CE071358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41854,"url":"https://patchwork.plctlab.org/api/1.2/patches/41854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y75+1bW680qP7wiD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:18:13","name":"fortran: Fix up function types for realloc and sincos{,f,l} builtins [PR108349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y75+1bW680qP7wiD@tucnak/mbox/"},{"id":41870,"url":"https://patchwork.plctlab.org/api/1.2/patches/41870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y76G9F09l5YV0r4C@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:52:52","name":"c++: Avoid some false positive -Wfloat-conversion warnings with extended precision [PR108285]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y76G9F09l5YV0r4C@tucnak/mbox/"},{"id":41871,"url":"https://patchwork.plctlab.org/api/1.2/patches/41871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0e03173-569f-01f5-c5d4-d81a0a9f5ecd@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:56:28","name":"Resolve bugzilla #108150 and #108192 for mingw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0e03173-569f-01f5-c5d4-d81a0a9f5ecd@gmail.com/mbox/"},{"id":41872,"url":"https://patchwork.plctlab.org/api/1.2/patches/41872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrzgappf3c.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:58:47","name":"[10/15,V7] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrzgappf3c.fsf_-_@arm.com/mbox/"},{"id":41873,"url":"https://patchwork.plctlab.org/api/1.2/patches/41873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2889898.e9J7NaK4W3@fomalhaut/","msgid":"<2889898.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2023-01-11T09:59:39","name":"Fix PR tree-optimization/108199","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2889898.e9J7NaK4W3@fomalhaut/mbox/"},{"id":41882,"url":"https://patchwork.plctlab.org/api/1.2/patches/41882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111102901.15229-1-krebbel@linux.ibm.com/","msgid":"<20230111102901.15229-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T10:29:01","name":"[Committed] IBM zSystems: Use NAND instruction to implement bit not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111102901.15229-1-krebbel@linux.ibm.com/mbox/"},{"id":41883,"url":"https://patchwork.plctlab.org/api/1.2/patches/41883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e291c8-e9e0-eb33-5fa7-8815217e238b@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-11T10:30:51","name":"switch expansion: limit JT growth param values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e291c8-e9e0-eb33-5fa7-8815217e238b@suse.cz/mbox/"},{"id":41890,"url":"https://patchwork.plctlab.org/api/1.2/patches/41890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111105257.05FEB13591@imap2.suse-dmz.suse.de/","msgid":"<20230111105257.05FEB13591@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T10:52:56","name":"tree-optimization/108353 - copyprop iteration order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111105257.05FEB13591@imap2.suse-dmz.suse.de/mbox/"},{"id":41900,"url":"https://patchwork.plctlab.org/api/1.2/patches/41900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcccac99-fd77-9c8e-b1e9-637e01cc4bdd@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-11T11:27:07","name":"[gcc-12,backport] strlen: do not use cond_expr for boundaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcccac99-fd77-9c8e-b1e9-637e01cc4bdd@suse.cz/mbox/"},{"id":41916,"url":"https://patchwork.plctlab.org/api/1.2/patches/41916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0xl2t7.fsf@euler.schwinge.homeip.net/","msgid":"<87tu0xl2t7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:37:40","name":"[PING] nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution (was: [committed][nvptx] Add uniform_warp_check insn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0xl2t7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41920,"url":"https://patchwork.plctlab.org/api/1.2/patches/41920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0w1l2nh.fsf@euler.schwinge.homeip.net/","msgid":"<87r0w1l2nh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:41:06","name":"[PING] Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0w1l2nh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41922,"url":"https://patchwork.plctlab.org/api/1.2/patches/41922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com/","msgid":"<8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-11T11:42:01","name":"[RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com/mbox/"},{"id":41930,"url":"https://patchwork.plctlab.org/api/1.2/patches/41930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lem9l2fw.fsf@euler.schwinge.homeip.net/","msgid":"<87lem9l2fw.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:45:39","name":"[PING^3] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lem9l2fw.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41941,"url":"https://patchwork.plctlab.org/api/1.2/patches/41941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wxl2b4.fsf@euler.schwinge.homeip.net/","msgid":"<87h6wxl2b4.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:48:31","name":"[PING^2] nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wxl2b4.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41944,"url":"https://patchwork.plctlab.org/api/1.2/patches/41944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fschl29n.fsf@euler.schwinge.homeip.net/","msgid":"<87fschl29n.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:49:24","name":"[PING] nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fschl29n.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41948,"url":"https://patchwork.plctlab.org/api/1.2/patches/41948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111115854.781A01358A@imap2.suse-dmz.suse.de/","msgid":"<20230111115854.781A01358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T11:58:54","name":"tree-optimization/108352 - FSM threads creating irreducible loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111115854.781A01358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41951,"url":"https://patchwork.plctlab.org/api/1.2/patches/41951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz7ll1hh.fsf@euler.schwinge.homeip.net/","msgid":"<87cz7ll1hh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T12:06:18","name":"[PING] nvptx: '\''-mframe-malloc-threshold'\'', '\''-Wframe-malloc-threshold'\'' (was: Handling of large stack objects in GPU code generation -- maybe transform into heap allocation?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz7ll1hh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41973,"url":"https://patchwork.plctlab.org/api/1.2/patches/41973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com/","msgid":"<8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T13:09:37","name":"[committed] rs6000/test: Make ppc-fortran.exp only available for PowerPC target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com/mbox/"},{"id":41979,"url":"https://patchwork.plctlab.org/api/1.2/patches/41979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com/","msgid":"<1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T13:21:19","name":"rs6000: Imply VSX early to adopt some checkings on conflict [PR108240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com/mbox/"},{"id":42016,"url":"https://patchwork.plctlab.org/api/1.2/patches/42016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-1-christophe.lyon@arm.com/","msgid":"<20230111141806.258233-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-11T14:18:05","name":"[v3,1/2] aarch64: fix warning emission for ABI break since GCC 9.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-1-christophe.lyon@arm.com/mbox/"},{"id":42017,"url":"https://patchwork.plctlab.org/api/1.2/patches/42017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-2-christophe.lyon@arm.com/","msgid":"<20230111141806.258233-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-11T14:18:06","name":"[v3,2/2] aarch64: Fix bit-field alignment in param passing [PR105549]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-2-christophe.lyon@arm.com/mbox/"},{"id":42027,"url":"https://patchwork.plctlab.org/api/1.2/patches/42027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com/","msgid":"<93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com>","list_archive_url":null,"date":"2023-01-11T14:23:57","name":"[1/2,v2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com/mbox/"},{"id":42035,"url":"https://patchwork.plctlab.org/api/1.2/patches/42035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d826d086-fd4b-18a5-3242-c60b086cbcdc@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T14:25:05","name":"[2/2,v2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d826d086-fd4b-18a5-3242-c60b086cbcdc@arm.com/mbox/"},{"id":42124,"url":"https://patchwork.plctlab.org/api/1.2/patches/42124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7742V4Ipt6WxHyb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T17:58:49","name":"c++: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7742V4Ipt6WxHyb@tucnak/mbox/"},{"id":42127,"url":"https://patchwork.plctlab.org/api/1.2/patches/42127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y776K/eRDes5Z0MD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T18:04:27","name":"c: Don'\''t emit DEBUG_BEGIN_STMTs for K&R function argument declarations [PR105972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y776K/eRDes5Z0MD@tucnak/mbox/"},{"id":42126,"url":"https://patchwork.plctlab.org/api/1.2/patches/42126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d5017a-8b63-3103-bad1-528a5b3723c3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T18:05:05","name":"[OG12,committed] amdgcn, libgomp: custom USM allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d5017a-8b63-3103-bad1-528a5b3723c3@codesourcery.com/mbox/"},{"id":42204,"url":"https://patchwork.plctlab.org/api/1.2/patches/42204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111213259.258216-1-dmalcolm@redhat.com/","msgid":"<20230111213259.258216-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-11T21:32:59","name":"[committed] analyzer: fix leak false positives on \"*UNKNOWN = PTR; \" [PR108252]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111213259.258216-1-dmalcolm@redhat.com/mbox/"},{"id":42208,"url":"https://patchwork.plctlab.org/api/1.2/patches/42208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111232554.A299633E60@hamza.pair.com/","msgid":"<20230111232554.A299633E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-11T23:25:42","name":"[committed] wwwdocs: gcc-8: Properly spell \"command-line option\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111232554.A299633E60@hamza.pair.com/mbox/"},{"id":42209,"url":"https://patchwork.plctlab.org/api/1.2/patches/42209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112001012.2D8C933EF6@hamza.pair.com/","msgid":"<20230112001012.2D8C933EF6@hamza.pair.com>","list_archive_url":null,"date":"2023-01-12T00:10:00","name":"[committed] config-list.mk: Remove obsolete FreeBSD targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112001012.2D8C933EF6@hamza.pair.com/mbox/"},{"id":42221,"url":"https://patchwork.plctlab.org/api/1.2/patches/42221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112014440.19153-1-palmer@rivosinc.com/","msgid":"<20230112014440.19153-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-01-12T01:44:40","name":"gimple-fold.h: Add missing gimple-iterator.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112014440.19153-1-palmer@rivosinc.com/mbox/"},{"id":42222,"url":"https://patchwork.plctlab.org/api/1.2/patches/42222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com/","msgid":"<77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T01:56:03","name":"[v2,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com/mbox/"},{"id":42251,"url":"https://patchwork.plctlab.org/api/1.2/patches/42251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp/","msgid":"<92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-12T04:25:58","name":"[1/2] xtensa: Tune \"*btrue\" insn pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp/mbox/"},{"id":42252,"url":"https://patchwork.plctlab.org/api/1.2/patches/42252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf7f5873-6959-9ca5-5a2f-83499ac78034@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-12T04:26:42","name":"[2/2] xtensa: Optimize ctzsi2 and ffssi2 a bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf7f5873-6959-9ca5-5a2f-83499ac78034@yahoo.co.jp/mbox/"},{"id":42258,"url":"https://patchwork.plctlab.org/api/1.2/patches/42258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com/","msgid":"<38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T05:34:18","name":"[v3,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com/mbox/"},{"id":42823,"url":"https://patchwork.plctlab.org/api/1.2/patches/42823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork01sjlmo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-12T06:46:23","name":"[18/18] hash table: enforce testing is_empty before is_deleted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork01sjlmo.fsf@lxoliva.fsfla.org/mbox/"},{"id":42273,"url":"https://patchwork.plctlab.org/api/1.2/patches/42273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112073441.282-1-jinma@linux.alibaba.com/","msgid":"<20230112073441.282-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T07:34:41","name":"[v4,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112073441.282-1-jinma@linux.alibaba.com/mbox/"},{"id":42354,"url":"https://patchwork.plctlab.org/api/1.2/patches/42354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com/","msgid":"<6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com>","list_archive_url":null,"date":"2023-01-12T10:22:40","name":"Fortran/OpenMP: Reject non-scalar '\''holds'\'' expr in '\''omp assume(s)'\'' [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com/mbox/"},{"id":42421,"url":"https://patchwork.plctlab.org/api/1.2/patches/42421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112130359.5F57538543B3@sourceware.org/","msgid":"<20230112130359.5F57538543B3@sourceware.org>","list_archive_url":null,"date":"2023-01-12T13:03:14","name":"tree-optimization/99412 - reassoc and reduction chains","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112130359.5F57538543B3@sourceware.org/mbox/"},{"id":42442,"url":"https://patchwork.plctlab.org/api/1.2/patches/42442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgan6eug.fsf@euler.schwinge.homeip.net/","msgid":"<87zgan6eug.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-12T13:51:19","name":"nvptx: Avoid deadlock in '\''cuStreamAddCallback'\'' callback, error case (was: [PATCH 6/6, OpenACC, libgomp] Async re-work, nvptx changes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgan6eug.fsf@euler.schwinge.homeip.net/mbox/"},{"id":42780,"url":"https://patchwork.plctlab.org/api/1.2/patches/42780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8BuGyewY8o2YFkR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-12T20:31:23","name":"c, c++, v2: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8BuGyewY8o2YFkR@tucnak/mbox/"},{"id":42806,"url":"https://patchwork.plctlab.org/api/1.2/patches/42806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205845.931635-1-jwakely@redhat.com/","msgid":"<20230112205845.931635-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T20:58:45","name":"[committed] libstdc++: Update shared library version history in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205845.931635-1-jwakely@redhat.com/mbox/"},{"id":42809,"url":"https://patchwork.plctlab.org/api/1.2/patches/42809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205949.932013-1-jwakely@redhat.com/","msgid":"<20230112205949.932013-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T20:59:49","name":"[committed] libstdc++: Extend max_align_t special case to 64-bit HP-UX [PR77691]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205949.932013-1-jwakely@redhat.com/mbox/"},{"id":42812,"url":"https://patchwork.plctlab.org/api/1.2/patches/42812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112210401.932343-1-jwakely@redhat.com/","msgid":"<20230112210401.932343-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T21:04:01","name":"libstdc++: Make forward to C version if included by C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112210401.932343-1-jwakely@redhat.com/mbox/"},{"id":42822,"url":"https://patchwork.plctlab.org/api/1.2/patches/42822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112211010.932966-1-jwakely@redhat.com/","msgid":"<20230112211010.932966-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T21:10:10","name":"libstdc++: Fix unintended layout change to std::basic_filebuf [PR108331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112211010.932966-1-jwakely@redhat.com/mbox/"},{"id":42856,"url":"https://patchwork.plctlab.org/api/1.2/patches/42856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112230406.2023047-2-qing.zhao@oracle.com/","msgid":"<20230112230406.2023047-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-12T23:04:06","name":"[1/1] Replace flag_strict_flex_arrays with DECL_NOT_FLEXARRAY in middle-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112230406.2023047-2-qing.zhao@oracle.com/mbox/"},{"id":42876,"url":"https://patchwork.plctlab.org/api/1.2/patches/42876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001546.944147-1-jwakely@redhat.com/","msgid":"<20230113001546.944147-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-13T00:15:46","name":"[committed] libstdc++: Do not include in concurrency headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001546.944147-1-jwakely@redhat.com/mbox/"},{"id":42878,"url":"https://patchwork.plctlab.org/api/1.2/patches/42878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001559.944194-1-jwakely@redhat.com/","msgid":"<20230113001559.944194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-13T00:15:59","name":"[committed] libstdc++: Fix exports for IEEE128 versions of __try_use_facet [PR108327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001559.944194-1-jwakely@redhat.com/mbox/"},{"id":42880,"url":"https://patchwork.plctlab.org/api/1.2/patches/42880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001919.87334-1-iain@sandoe.co.uk/","msgid":"<20230113001919.87334-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-13T00:19:19","name":"modula-2: Handle pass '\''-v'\'' option to the compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001919.87334-1-iain@sandoe.co.uk/mbox/"},{"id":42883,"url":"https://patchwork.plctlab.org/api/1.2/patches/42883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CmpuU+Js7Tlsqz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T00:32:38","name":"c, c++: Allow ignoring -Winit-self through pragmas [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CmpuU+Js7Tlsqz@tucnak/mbox/"},{"id":42884,"url":"https://patchwork.plctlab.org/api/1.2/patches/42884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CndZxq5djLlAB/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T00:36:05","name":"x86: Avoid -Wuninitialized warnings on _mm*_undefined_* in C++ [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CndZxq5djLlAB/@tucnak/mbox/"},{"id":42909,"url":"https://patchwork.plctlab.org/api/1.2/patches/42909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113032755.3318339-1-chenglulu@loongson.cn/","msgid":"<20230113032755.3318339-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-01-13T03:27:56","name":"[v5] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113032755.3318339-1-chenglulu@loongson.cn/mbox/"},{"id":43052,"url":"https://patchwork.plctlab.org/api/1.2/patches/43052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113075953.34CCB13913@imap2.suse-dmz.suse.de/","msgid":"<20230113075953.34CCB13913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T07:59:52","name":"[1/9] aarch64: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113075953.34CCB13913@imap2.suse-dmz.suse.de/mbox/"},{"id":43054,"url":"https://patchwork.plctlab.org/api/1.2/patches/43054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080003.D7E8713913@imap2.suse-dmz.suse.de/","msgid":"<20230113080003.D7E8713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:03","name":"[2/9] alpha: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080003.D7E8713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43053,"url":"https://patchwork.plctlab.org/api/1.2/patches/43053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080015.6E41613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080015.6E41613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:15","name":"[3/9] arm: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080015.6E41613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43055,"url":"https://patchwork.plctlab.org/api/1.2/patches/43055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080100.2837913913@imap2.suse-dmz.suse.de/","msgid":"<20230113080100.2837913913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:59","name":"[4/9] ia64: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080100.2837913913@imap2.suse-dmz.suse.de/mbox/"},{"id":43056,"url":"https://patchwork.plctlab.org/api/1.2/patches/43056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080112.88F1713913@imap2.suse-dmz.suse.de/","msgid":"<20230113080112.88F1713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:12","name":"[5/9] loongarch: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080112.88F1713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43057,"url":"https://patchwork.plctlab.org/api/1.2/patches/43057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080124.46AB613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080124.46AB613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:23","name":"[6/9] mips: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080124.46AB613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43058,"url":"https://patchwork.plctlab.org/api/1.2/patches/43058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080135.43B3813913@imap2.suse-dmz.suse.de/","msgid":"<20230113080135.43B3813913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:34","name":"[7/9] sparc: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080135.43B3813913@imap2.suse-dmz.suse.de/mbox/"},{"id":43059,"url":"https://patchwork.plctlab.org/api/1.2/patches/43059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080146.E61D613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080146.E61D613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:46","name":"[8/9] solaris2: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080146.E61D613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43060,"url":"https://patchwork.plctlab.org/api/1.2/patches/43060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080203.73D8113913@imap2.suse-dmz.suse.de/","msgid":"<20230113080203.73D8113913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:02:03","name":"[9/9] Clarify -shared effect on crtfastmath.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080203.73D8113913@imap2.suse-dmz.suse.de/mbox/"},{"id":43075,"url":"https://patchwork.plctlab.org/api/1.2/patches/43075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113083930.A7C8713913@imap2.suse-dmz.suse.de/","msgid":"<20230113083930.A7C8713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:39:30","name":"Sync LTO type_for_mode with c-family/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113083930.A7C8713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43100,"url":"https://patchwork.plctlab.org/api/1.2/patches/43100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113091450.72599-1-lehua.ding@rivai.ai/","msgid":"<20230113091450.72599-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-13T09:14:50","name":"[1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113091450.72599-1-lehua.ding@rivai.ai/mbox/"},{"id":43118,"url":"https://patchwork.plctlab.org/api/1.2/patches/43118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094236.77805-1-lehua.ding@rivai.ai/","msgid":"<20230113094236.77805-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-13T09:42:36","name":"[1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094236.77805-1-lehua.ding@rivai.ai/mbox/"},{"id":43121,"url":"https://patchwork.plctlab.org/api/1.2/patches/43121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094748.F0D891358A@imap2.suse-dmz.suse.de/","msgid":"<20230113094748.F0D891358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T09:47:48","name":"tree-optimization/108387 - ICE with VN handling of x << C as x * (1<","list_archive_url":null,"date":"2023-01-13T09:56:51","name":"Don'\''t add crtfastmath.o for -shared.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113095651.1367699-1-hongtao.liu@intel.com/mbox/"},{"id":43128,"url":"https://patchwork.plctlab.org/api/1.2/patches/43128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8ri6u4y1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:03:34","name":"[pushed] aarch64: Don'\''t update EH info when folding [PR107209]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8ri6u4y1.fsf@arm.com/mbox/"},{"id":43129,"url":"https://patchwork.plctlab.org/api/1.2/patches/43129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt358eu4u8.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:05:51","name":"[pushed] aarch64: Fix DWARF frame register sizes for predicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt358eu4u8.fsf_-_@arm.com/mbox/"},{"id":43130,"url":"https://patchwork.plctlab.org/api/1.2/patches/43130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8EvmUH3mP9/B5h4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:16:57","name":"[committed] testsuite: Add testcase for PR that went latent in GCC 13 [PR107131]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8EvmUH3mP9/B5h4@tucnak/mbox/"},{"id":43156,"url":"https://patchwork.plctlab.org/api/1.2/patches/43156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4771224.GXAFRqVoOG@fomalhaut/","msgid":"<4771224.GXAFRqVoOG@fomalhaut>","list_archive_url":null,"date":"2023-01-13T10:49:04","name":"Fix PR rtl-optimization/108274","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4771224.GXAFRqVoOG@fomalhaut/mbox/"},{"id":43268,"url":"https://patchwork.plctlab.org/api/1.2/patches/43268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113123805.75201-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113123805.75201-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:38:05","name":"[committed] C-SKY: Add conditions for ceil etc patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113123805.75201-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43272,"url":"https://patchwork.plctlab.org/api/1.2/patches/43272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124211.75278-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124211.75278-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:11","name":"[committed] C-SKY: Skip other CPUs if the testcases are only for ck801.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124211.75278-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43273,"url":"https://patchwork.plctlab.org/api/1.2/patches/43273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124223.75333-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124223.75333-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:23","name":"[committed] C-SKY: Fix patterns'\'' condition for ck802 smart mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124223.75333-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43276,"url":"https://patchwork.plctlab.org/api/1.2/patches/43276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124234.75388-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124234.75388-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:34","name":"[committed] C-SKY: Add missing builtin defines for soft float abi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124234.75388-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43280,"url":"https://patchwork.plctlab.org/api/1.2/patches/43280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124247.75440-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124247.75440-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:47","name":"[committed] C-SKY: Fix skip codition for testcase ldbs.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124247.75440-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43275,"url":"https://patchwork.plctlab.org/api/1.2/patches/43275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124302.75492-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124302.75492-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:43:02","name":"[committed] C-SKY: Fix float abi option in MULTILIB_DEFAULTS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124302.75492-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43274,"url":"https://patchwork.plctlab.org/api/1.2/patches/43274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124319.75544-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124319.75544-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:43:19","name":"[committed] C-SKY: Define SYSROOT_SUFFIX_SPEC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124319.75544-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43387,"url":"https://patchwork.plctlab.org/api/1.2/patches/43387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com/","msgid":"<5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-13T15:40:15","name":"[Committed] arm: Add cde feature support for Cortex-M55 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com/mbox/"},{"id":43428,"url":"https://patchwork.plctlab.org/api/1.2/patches/43428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GJazeTmfv+2xgb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T16:40:11","name":"[committed] testsuite: Add another testcase from PR107131","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GJazeTmfv+2xgb@tucnak/mbox/"},{"id":43500,"url":"https://patchwork.plctlab.org/api/1.2/patches/43500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GY0+AOA8qXDm8h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T17:45:55","name":"c, c++, v3: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GY0+AOA8qXDm8h@tucnak/mbox/"},{"id":43511,"url":"https://patchwork.plctlab.org/api/1.2/patches/43511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113175428.1771219-1-stefansf@linux.ibm.com/","msgid":"<20230113175428.1771219-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-01-13T17:54:29","name":"IBM zSystems: Fix TARGET_D_CPU_VERSIONS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113175428.1771219-1-stefansf@linux.ibm.com/mbox/"},{"id":43540,"url":"https://patchwork.plctlab.org/api/1.2/patches/43540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru/","msgid":"<0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru>","list_archive_url":null,"date":"2023-01-13T18:20:12","name":"sched-deps: do not schedule pseudos across calls [PR108117]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru/mbox/"},{"id":43560,"url":"https://patchwork.plctlab.org/api/1.2/patches/43560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Gzh4bMh3n/RVyo@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-13T19:39:51","name":"[committed] hppa: Fix support for atomic loads and stores on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Gzh4bMh3n/RVyo@mx3210.localdomain/mbox/"},{"id":43613,"url":"https://patchwork.plctlab.org/api/1.2/patches/43613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2211088.iZASKD2KPV@fomalhaut/","msgid":"<2211088.iZASKD2KPV@fomalhaut>","list_archive_url":null,"date":"2023-01-13T21:16:02","name":"[c-family] Small fix for -fdump-ada-spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2211088.iZASKD2KPV@fomalhaut/mbox/"},{"id":43616,"url":"https://patchwork.plctlab.org/api/1.2/patches/43616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com/","msgid":"<3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com>","list_archive_url":null,"date":"2023-01-13T21:23:20","name":"PR tree-optimization/108359 - Utilize op1 == op2 when invoking range-ops folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com/mbox/"},{"id":43644,"url":"https://patchwork.plctlab.org/api/1.2/patches/43644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113225428.380307-1-dmalcolm@redhat.com/","msgid":"<20230113225428.380307-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-13T22:54:28","name":"[committed] analyzer: add heuristics for switch on enum type [PR105273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113225428.380307-1-dmalcolm@redhat.com/mbox/"},{"id":43649,"url":"https://patchwork.plctlab.org/api/1.2/patches/43649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8HnvoRv09X8izTQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T23:22:38","name":"[v4] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8HnvoRv09X8izTQ@redhat.com/mbox/"},{"id":43696,"url":"https://patchwork.plctlab.org/api/1.2/patches/43696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp/","msgid":"<0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-14T05:03:55","name":"xtensa: Remove old broken tweak for leaf function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp/mbox/"},{"id":43745,"url":"https://patchwork.plctlab.org/api/1.2/patches/43745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114105046.35020-1-iain@sandoe.co.uk/","msgid":"<20230114105046.35020-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-14T10:50:46","name":"modula-2: Fix stack size request in initPreemptive [PR108405]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114105046.35020-1-iain@sandoe.co.uk/mbox/"},{"id":43747,"url":"https://patchwork.plctlab.org/api/1.2/patches/43747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz7hxsqf.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-14T11:26:00","name":"[PR106746] drop cselib addr lookup in debug insn mem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz7hxsqf.fsf@lxoliva.fsfla.org/mbox/"},{"id":43781,"url":"https://patchwork.plctlab.org/api/1.2/patches/43781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114170035.1238643-1-jwakely@redhat.com/","msgid":"<20230114170035.1238643-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T17:00:35","name":"[committed] libstdc++: Fix ostream insertion operators for calendar types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114170035.1238643-1-jwakely@redhat.com/mbox/"},{"id":43787,"url":"https://patchwork.plctlab.org/api/1.2/patches/43787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b18279769199fe5019effd045d7999e2992996ad.1673721922.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-14T18:46:24","name":"libcpp: Fix ICE on directive inside _Pragma() operator [PR67046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b18279769199fe5019effd045d7999e2992996ad.1673721922.git.lhyatt@gmail.com/mbox/"},{"id":43793,"url":"https://patchwork.plctlab.org/api/1.2/patches/43793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114203945.1282157-1-jwakely@redhat.com/","msgid":"<20230114203945.1282157-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T20:39:45","name":"libatomic: Use config/mingw/lock.c for --enable-threads=single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114203945.1282157-1-jwakely@redhat.com/mbox/"},{"id":43799,"url":"https://patchwork.plctlab.org/api/1.2/patches/43799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114215953.1299851-1-jwakely@redhat.com/","msgid":"<20230114215953.1299851-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T21:59:53","name":"[committed] libstdc++: Implement std::chrono::current_zone() for AIX [PR108409]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114215953.1299851-1-jwakely@redhat.com/mbox/"},{"id":43806,"url":"https://patchwork.plctlab.org/api/1.2/patches/43806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115023207.88481-1-cooper.qu@linux.alibaba.com/","msgid":"<20230115023207.88481-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-15T02:32:07","name":"[COMMITTED] C-SKY: Support --with-float=softfp in configuration.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115023207.88481-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43808,"url":"https://patchwork.plctlab.org/api/1.2/patches/43808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115055842.3965247-1-pefoley2@pefoley.com/","msgid":"<20230115055842.3965247-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-15T05:58:42","name":"configure: Only create serdep.tmp if needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115055842.3965247-1-pefoley2@pefoley.com/mbox/"},{"id":43824,"url":"https://patchwork.plctlab.org/api/1.2/patches/43824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115102738.19101-1-aldyh@redhat.com/","msgid":"<20230115102738.19101-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-01-15T10:27:38","name":"[PR107608,range-ops] Avoid folding into INF when flag_trapping_math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115102738.19101-1-aldyh@redhat.com/mbox/"},{"id":43825,"url":"https://patchwork.plctlab.org/api/1.2/patches/43825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115103227.19393-1-aldyh@redhat.com/","msgid":"<20230115103227.19393-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-01-15T10:32:27","name":"[PR107608,range-ops] Avoid folding into INF when flag_trapping_math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115103227.19393-1-aldyh@redhat.com/mbox/"},{"id":43847,"url":"https://patchwork.plctlab.org/api/1.2/patches/43847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115124544.1338953-1-jwakely@redhat.com/","msgid":"<20230115124544.1338953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T12:45:44","name":"[committed] libstdc++: Fix narrowing conversion in std/time/clock/utc/io.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115124544.1338953-1-jwakely@redhat.com/mbox/"},{"id":43852,"url":"https://patchwork.plctlab.org/api/1.2/patches/43852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115134735.62D2E33E70@hamza.pair.com/","msgid":"<20230115134735.62D2E33E70@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T13:47:20","name":"[committed] config-list.mk: Modernize FreeBSD targets towards version 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115134735.62D2E33E70@hamza.pair.com/mbox/"},{"id":43853,"url":"https://patchwork.plctlab.org/api/1.2/patches/43853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115135122.1345194-1-jwakely@redhat.com/","msgid":"<20230115135122.1345194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T13:51:22","name":"[committed] libstdc++: Remove unconditional -pthread from test options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115135122.1345194-1-jwakely@redhat.com/mbox/"},{"id":43875,"url":"https://patchwork.plctlab.org/api/1.2/patches/43875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115164703.1354873-1-jwakely@redhat.com/","msgid":"<20230115164703.1354873-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T16:47:03","name":"[committed] libstdc++: Remove dg-xfail-run-if in std/time/tzdb_list/1.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115164703.1354873-1-jwakely@redhat.com/mbox/"},{"id":43902,"url":"https://patchwork.plctlab.org/api/1.2/patches/43902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115212759.43AEF33E59@hamza.pair.com/","msgid":"<20230115212759.43AEF33E59@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T21:27:43","name":"[committed] wwwdocs: faq: Move c-faq.com to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115212759.43AEF33E59@hamza.pair.com/mbox/"},{"id":43903,"url":"https://patchwork.plctlab.org/api/1.2/patches/43903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115213754.0432533E56@hamza.pair.com/","msgid":"<20230115213754.0432533E56@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T21:37:38","name":"[committed] wwwdocs: gcc-4.5: Convert www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115213754.0432533E56@hamza.pair.com/mbox/"},{"id":43905,"url":"https://patchwork.plctlab.org/api/1.2/patches/43905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221511.5EF7A33E24@hamza.pair.com/","msgid":"<20230115221511.5EF7A33E24@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T22:14:55","name":"[committed] wwwdocs: codingconventions: Adjust Intel BID library link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221511.5EF7A33E24@hamza.pair.com/mbox/"},{"id":43907,"url":"https://patchwork.plctlab.org/api/1.2/patches/43907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221707.EFEEC33E24@hamza.pair.com/","msgid":"<20230115221707.EFEEC33E24@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T22:16:52","name":"[committed] wwwdocs: gcc-3.4: Switch www.eclipse.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221707.EFEEC33E24@hamza.pair.com/mbox/"},{"id":43911,"url":"https://patchwork.plctlab.org/api/1.2/patches/43911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115231619.CA29E33E13@hamza.pair.com/","msgid":"<20230115231619.CA29E33E13@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T23:16:03","name":"[committed] libstdc++: Move www.open-std.org in status part of manual to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115231619.CA29E33E13@hamza.pair.com/mbox/"},{"id":43930,"url":"https://patchwork.plctlab.org/api/1.2/patches/43930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3e65485-20e4-9513-3bc5-a6f964fc99b7@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-16T02:52:55","name":"xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3e65485-20e4-9513-3bc5-a6f964fc99b7@yahoo.co.jp/mbox/"},{"id":43995,"url":"https://patchwork.plctlab.org/api/1.2/patches/43995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116071148.427-1-tejas.belagod@arm.com/","msgid":"<20230116071148.427-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-01-16T07:11:48","name":"AArch64: Gate various crypto intrinsics availability based on features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116071148.427-1-tejas.belagod@arm.com/mbox/"},{"id":44008,"url":"https://patchwork.plctlab.org/api/1.2/patches/44008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116075129.A633D33E4B@hamza.pair.com/","msgid":"<20230116075129.A633D33E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T07:51:10","name":"[committed] wwwdocs: projects/cfg: Update reference to paper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116075129.A633D33E4B@hamza.pair.com/mbox/"},{"id":44024,"url":"https://patchwork.plctlab.org/api/1.2/patches/44024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com/","msgid":"<1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T08:33:36","name":"rs6000: Teach rs6000_opaque_type_invalid_use_p about gcall [PR108348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com/mbox/"},{"id":44031,"url":"https://patchwork.plctlab.org/api/1.2/patches/44031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9230de2-d3d3-c960-f39a-4f81b6a094bc@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-16T09:08:02","name":"[v2] rs6000: Don'\''t use optimize_function_for_speed_p too early [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9230de2-d3d3-c960-f39a-4f81b6a094bc@linux.ibm.com/mbox/"},{"id":44040,"url":"https://patchwork.plctlab.org/api/1.2/patches/44040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com/","msgid":"<6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T09:39:04","name":"[PATCH/RFC] rs6000: Remove optimize_for_speed check for implicit TARGET_SAVE_TOC_INDIRECT [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com/mbox/"},{"id":44048,"url":"https://patchwork.plctlab.org/api/1.2/patches/44048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UfdUzj63BuX6oj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T09:57:09","name":"contrib: Partial fix for failed update-copyright --this year [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UfdUzj63BuX6oj@tucnak/mbox/"},{"id":44065,"url":"https://patchwork.plctlab.org/api/1.2/patches/44065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UmRw0SIp0yEk26@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T10:26:15","name":"[committed] riscv: Fix up Copyright lines [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UmRw0SIp0yEk26@tucnak/mbox/"},{"id":44066,"url":"https://patchwork.plctlab.org/api/1.2/patches/44066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116102949.10821-1-jwakely@redhat.com/","msgid":"<20230116102949.10821-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:29:49","name":"[committed] doc: Fix grammar typo in description of malloc attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116102949.10821-1-jwakely@redhat.com/mbox/"},{"id":44068,"url":"https://patchwork.plctlab.org/api/1.2/patches/44068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116103316.11780-1-jwakely@redhat.com/","msgid":"<20230116103316.11780-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:33:16","name":"[committed] libstdc++: Fix copyright notice to use usual form [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116103316.11780-1-jwakely@redhat.com/mbox/"},{"id":44071,"url":"https://patchwork.plctlab.org/api/1.2/patches/44071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Up3AJNfDcwsOzx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T10:41:32","name":"[committed] contrib: Yet another update-copyright.py tweak [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Up3AJNfDcwsOzx@tucnak/mbox/"},{"id":44081,"url":"https://patchwork.plctlab.org/api/1.2/patches/44081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116105001.13048-1-jwakely@redhat.com/","msgid":"<20230116105001.13048-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:50:01","name":"[wwwdocs] Document new libstdc++ header dependency changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116105001.13048-1-jwakely@redhat.com/mbox/"},{"id":44121,"url":"https://patchwork.plctlab.org/api/1.2/patches/44121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com/","msgid":"<33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T13:07:43","name":"rs6000: Fix typo on vec_vsubcuq in rs6000-overload.def [PR108396]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com/mbox/"},{"id":44175,"url":"https://patchwork.plctlab.org/api/1.2/patches/44175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aac9d189027b7e12c365f49e7148a3d7@autistici.org/","msgid":"","list_archive_url":null,"date":"2023-01-16T14:08:56","name":"lrealpath() patch to fix symlinks resolution for win32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aac9d189027b7e12c365f49e7148a3d7@autistici.org/mbox/"},{"id":44184,"url":"https://patchwork.plctlab.org/api/1.2/patches/44184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144832.3171227-1-poulhies@adacore.com/","msgid":"<20230116144832.3171227-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:32","name":"[COMMITTED] ada: Optimize interface objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144832.3171227-1-poulhies@adacore.com/mbox/"},{"id":44185,"url":"https://patchwork.plctlab.org/api/1.2/patches/44185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144841.3171334-1-poulhies@adacore.com/","msgid":"<20230116144841.3171334-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:41","name":"[COMMITTED] ada: Lift restriction on optimization of aliased objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144841.3171334-1-poulhies@adacore.com/mbox/"},{"id":44189,"url":"https://patchwork.plctlab.org/api/1.2/patches/44189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144848.3171399-1-poulhies@adacore.com/","msgid":"<20230116144848.3171399-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:48","name":"[COMMITTED] ada: Put back conversion to interface in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144848.3171399-1-poulhies@adacore.com/mbox/"},{"id":44188,"url":"https://patchwork.plctlab.org/api/1.2/patches/44188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144853.3171463-1-poulhies@adacore.com/","msgid":"<20230116144853.3171463-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:53","name":"[COMMITTED] ada: Further optimize interface objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144853.3171463-1-poulhies@adacore.com/mbox/"},{"id":44186,"url":"https://patchwork.plctlab.org/api/1.2/patches/44186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144900.3171529-1-poulhies@adacore.com/","msgid":"<20230116144900.3171529-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:00","name":"[COMMITTED] ada: Fix premature finalization of temporaries for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144900.3171529-1-poulhies@adacore.com/mbox/"},{"id":44191,"url":"https://patchwork.plctlab.org/api/1.2/patches/44191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144906.3171599-1-poulhies@adacore.com/","msgid":"<20230116144906.3171599-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:06","name":"[COMMITTED] ada: Fix benign pasto in new predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144906.3171599-1-poulhies@adacore.com/mbox/"},{"id":44187,"url":"https://patchwork.plctlab.org/api/1.2/patches/44187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144911.3171666-1-poulhies@adacore.com/","msgid":"<20230116144911.3171666-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:11","name":"[COMMITTED] ada: Use static references to tag in more cases for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144911.3171666-1-poulhies@adacore.com/mbox/"},{"id":44196,"url":"https://patchwork.plctlab.org/api/1.2/patches/44196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144916.3171732-1-poulhies@adacore.com/","msgid":"<20230116144916.3171732-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:16","name":"[COMMITTED] ada: Fix pessimization of some CW objects initialized with function call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144916.3171732-1-poulhies@adacore.com/mbox/"},{"id":44202,"url":"https://patchwork.plctlab.org/api/1.2/patches/44202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144923.3171796-1-poulhies@adacore.com/","msgid":"<20230116144923.3171796-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:23","name":"[COMMITTED] ada: Fix latent bug exposed by recent work on extended return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144923.3171796-1-poulhies@adacore.com/mbox/"},{"id":44204,"url":"https://patchwork.plctlab.org/api/1.2/patches/44204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144928.3171863-1-poulhies@adacore.com/","msgid":"<20230116144928.3171863-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:28","name":"[COMMITTED] ada: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144928.3171863-1-poulhies@adacore.com/mbox/"},{"id":44197,"url":"https://patchwork.plctlab.org/api/1.2/patches/44197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144936.3171936-1-poulhies@adacore.com/","msgid":"<20230116144936.3171936-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:36","name":"[COMMITTED] ada: Update copyright years.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144936.3171936-1-poulhies@adacore.com/mbox/"},{"id":44247,"url":"https://patchwork.plctlab.org/api/1.2/patches/44247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116161002.40093-1-jwakely@redhat.com/","msgid":"<20230116161002.40093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T16:10:02","name":"[committed] libstdc++: Fix --with-default-libstdcxx-abi=gcc4-compatible build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116161002.40093-1-jwakely@redhat.com/mbox/"},{"id":44274,"url":"https://patchwork.plctlab.org/api/1.2/patches/44274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8WG3g+bAIynpiHC@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-16T17:18:22","name":"Fix wrong code issues with ipa-sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8WG3g+bAIynpiHC@kam.mff.cuni.cz/mbox/"},{"id":44289,"url":"https://patchwork.plctlab.org/api/1.2/patches/44289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185633.159901-1-hjl.tools@gmail.com/","msgid":"<20230116185633.159901-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-16T18:56:33","name":"x86: Disable -mforce-indirect-call for PIC in 32-bit mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185633.159901-1-hjl.tools@gmail.com/mbox/"},{"id":44290,"url":"https://patchwork.plctlab.org/api/1.2/patches/44290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185944.4BF8233F26@hamza.pair.com/","msgid":"<20230116185944.4BF8233F26@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T18:59:25","name":"[committed] wwwdocs: git: Remove trailing slash from tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185944.4BF8233F26@hamza.pair.com/mbox/"},{"id":44295,"url":"https://patchwork.plctlab.org/api/1.2/patches/44295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116192915.7C8DF33F27@hamza.pair.com/","msgid":"<20230116192915.7C8DF33F27@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T19:28:56","name":"[committed] wwwdocs: readings: Move www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116192915.7C8DF33F27@hamza.pair.com/mbox/"},{"id":44308,"url":"https://patchwork.plctlab.org/api/1.2/patches/44308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1a5ca55f-e1cb-417f-9f67-59b39c16bc64-1673901535696@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-01-16T20:38:55","name":"Fortran: fix ICE in get_expr_storage_size [PR108421]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1a5ca55f-e1cb-417f-9f67-59b39c16bc64-1673901535696@3c-app-gmx-bs50/mbox/"},{"id":44321,"url":"https://patchwork.plctlab.org/api/1.2/patches/44321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9ff539aa-079f-42e1-9456-a47833bc44a8-1673903509644@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-01-16T21:11:49","name":"Fortran: fix ICE in check_charlen_present [PR108420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9ff539aa-079f-42e1-9456-a47833bc44a8-1673903509644@3c-app-gmx-bs50/mbox/"},{"id":44399,"url":"https://patchwork.plctlab.org/api/1.2/patches/44399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116235816.658483-1-apinski@marvell.com/","msgid":"<20230116235816.658483-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-01-16T23:58:16","name":"[COMMITTED] Remove reference to Solaris 9 in comment of add_options_for_tls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116235816.658483-1-apinski@marvell.com/mbox/"},{"id":44401,"url":"https://patchwork.plctlab.org/api/1.2/patches/44401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117011203.3342271-1-pefoley2@pefoley.com/","msgid":"<20230117011203.3342271-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-17T01:12:03","name":"[v2] configure: Only create serdep.tmp if needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117011203.3342271-1-pefoley2@pefoley.com/mbox/"},{"id":44402,"url":"https://patchwork.plctlab.org/api/1.2/patches/44402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117012518.3382059-1-pefoley2@pefoley.com/","msgid":"<20230117012518.3382059-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-17T01:25:18","name":"ada: Respect GNATMAKE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117012518.3382059-1-pefoley2@pefoley.com/mbox/"},{"id":44485,"url":"https://patchwork.plctlab.org/api/1.2/patches/44485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp/","msgid":"<70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-17T04:12:50","name":"[v2] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp/mbox/"},{"id":44492,"url":"https://patchwork.plctlab.org/api/1.2/patches/44492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aba72208-c9b6-0d9e-918d-4b7e402b634b@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-17T04:54:44","name":"xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aba72208-c9b6-0d9e-918d-4b7e402b634b@yahoo.co.jp/mbox/"},{"id":44561,"url":"https://patchwork.plctlab.org/api/1.2/patches/44561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilh58rnd.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-17T08:57:42","name":"libsanitizer: Fix asan SEGVs with gld on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilh58rnd.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":44613,"url":"https://patchwork.plctlab.org/api/1.2/patches/44613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8ZuxWBRYJgTleuS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-17T09:47:49","name":"forwprop: Fix up rotate pattern matching [PR106523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8ZuxWBRYJgTleuS@tucnak/mbox/"},{"id":44620,"url":"https://patchwork.plctlab.org/api/1.2/patches/44620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de/","msgid":"<20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-17T10:13:19","name":"middle-end/106075 - non-call EH and DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de/mbox/"},{"id":44638,"url":"https://patchwork.plctlab.org/api/1.2/patches/44638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=J8Vye=RPBw1sWQnUzxfC1C2UPT_vc+_jmXOeYJG-YGQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T10:46:45","name":"[aarch64] Use wzr/xzr for assigning vector element to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=J8Vye=RPBw1sWQnUzxfC1C2UPT_vc+_jmXOeYJG-YGQ@mail.gmail.com/mbox/"},{"id":44643,"url":"https://patchwork.plctlab.org/api/1.2/patches/44643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dea53b40-6611-08a5-7bc3-2ce21b1bd6fb@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-17T11:20:14","name":"[(pushed)] Regenerate Makefile.in files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dea53b40-6611-08a5-7bc3-2ce21b1bd6fb@suse.cz/mbox/"},{"id":44647,"url":"https://patchwork.plctlab.org/api/1.2/patches/44647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz/","msgid":"<609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz>","list_archive_url":null,"date":"2023-01-17T11:56:32","name":"[(pushed)] contrib: revert removal of CR character","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz/mbox/"},{"id":44648,"url":"https://patchwork.plctlab.org/api/1.2/patches/44648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d15fec2f-b7aa-2830-089a-62c0fd0b66d9@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-17T12:00:35","name":"contrib: ignore CR in update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d15fec2f-b7aa-2830-089a-62c0fd0b66d9@suse.cz/mbox/"},{"id":44659,"url":"https://patchwork.plctlab.org/api/1.2/patches/44659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz/","msgid":"<553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz>","list_archive_url":null,"date":"2023-01-17T13:02:42","name":"[(pushed)] Ignore test_patches.txt in update-copyright.py.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz/mbox/"},{"id":44683,"url":"https://patchwork.plctlab.org/api/1.2/patches/44683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117141840.172815-1-jwakely@redhat.com/","msgid":"<20230117141840.172815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-17T14:18:40","name":"[committed] libstdc++: Fix configuration of default zoneinfo dir on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117141840.172815-1-jwakely@redhat.com/mbox/"},{"id":44716,"url":"https://patchwork.plctlab.org/api/1.2/patches/44716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com/","msgid":"<18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com>","list_archive_url":null,"date":"2023-01-17T15:35:45","name":"[RFC] tree-optimization: fix optimize-out variables passed into func to alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com/mbox/"},{"id":44726,"url":"https://patchwork.plctlab.org/api/1.2/patches/44726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117162508.74789-1-jose.marchesi@oracle.com/","msgid":"<20230117162508.74789-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-01-17T16:25:08","name":"[COMMITTED] bpf: disable -fstack-protector in BPF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117162508.74789-1-jose.marchesi@oracle.com/mbox/"},{"id":44742,"url":"https://patchwork.plctlab.org/api/1.2/patches/44742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170431.52986-1-iain@sandoe.co.uk/","msgid":"<20230117170431.52986-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-17T17:04:31","name":"modula-2, driver, Front end: Revise handling of I and L paths [PR108182].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170431.52986-1-iain@sandoe.co.uk/mbox/"},{"id":44745,"url":"https://patchwork.plctlab.org/api/1.2/patches/44745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWc4b_LdY2hUaFdqSXXSfCm95ujA0qft8wcBb4fxRSM9g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T17:05:42","name":"Go patch committed: Define builtin functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWc4b_LdY2hUaFdqSXXSfCm95ujA0qft8wcBb4fxRSM9g@mail.gmail.com/mbox/"},{"id":44748,"url":"https://patchwork.plctlab.org/api/1.2/patches/44748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170655.53157-1-iain@sandoe.co.uk/","msgid":"<20230117170655.53157-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-17T17:06:55","name":"modula-2, testsuite: Make libs and interfaces consistent.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170655.53157-1-iain@sandoe.co.uk/mbox/"},{"id":44800,"url":"https://patchwork.plctlab.org/api/1.2/patches/44800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB5412605A8D2993AFD96B036BACC69@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T21:12:12","name":"libstdc++: testsuite: Simplify codecvt_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB5412605A8D2993AFD96B036BACC69@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":44801,"url":"https://patchwork.plctlab.org/api/1.2/patches/44801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211313.D71DC33F99@hamza.pair.com/","msgid":"<20230117211313.D71DC33F99@hamza.pair.com>","list_archive_url":null,"date":"2023-01-17T21:12:54","name":"[committed] wwwdocs: rsync: Remove trailing slash from tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211313.D71DC33F99@hamza.pair.com/mbox/"},{"id":44802,"url":"https://patchwork.plctlab.org/api/1.2/patches/44802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211921.5A75C33FA8@hamza.pair.com/","msgid":"<20230117211921.5A75C33FA8@hamza.pair.com>","list_archive_url":null,"date":"2023-01-17T21:19:02","name":"[committed] wwwdocs: gcc-4.7: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211921.5A75C33FA8@hamza.pair.com/mbox/"},{"id":44828,"url":"https://patchwork.plctlab.org/api/1.2/patches/44828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117225908.1604948-1-vineetg@rivosinc.com/","msgid":"<20230117225908.1604948-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-01-17T22:59:08","name":"riscv: generate builtin macro for compilation with strict alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117225908.1604948-1-vineetg@rivosinc.com/mbox/"},{"id":44933,"url":"https://patchwork.plctlab.org/api/1.2/patches/44933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118024415.64340-1-juzhe.zhong@rivai.ai/","msgid":"<20230118024415.64340-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:44:15","name":"RISC-V: Fix incorrect attributes of vsetvl instructions pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118024415.64340-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44934,"url":"https://patchwork.plctlab.org/api/1.2/patches/44934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025014.65261-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025014.65261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:50:14","name":"RISC-V: Change VSETVL PASS always call split_all_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025014.65261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44935,"url":"https://patchwork.plctlab.org/api/1.2/patches/44935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025341.66033-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025341.66033-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:53:41","name":"RISC-V: Remove DCE in VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025341.66033-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44939,"url":"https://patchwork.plctlab.org/api/1.2/patches/44939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025832.66827-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025832.66827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:58:32","name":"RISC-V: Clang-format some annotations[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025832.66827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44940,"url":"https://patchwork.plctlab.org/api/1.2/patches/44940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030347.68061-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030347.68061-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:03:47","name":"RISC-V: Reorder VSETVL PASS location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030347.68061-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44943,"url":"https://patchwork.plctlab.org/api/1.2/patches/44943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030654.4083983-1-chenglulu@loongson.cn/","msgid":"<20230118030654.4083983-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-01-18T03:06:56","name":"[v6] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030654.4083983-1-chenglulu@loongson.cn/mbox/"},{"id":44941,"url":"https://patchwork.plctlab.org/api/1.2/patches/44941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030659.68604-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030659.68604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:06:59","name":"RISC-V: Change parse_insn into public for future use.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030659.68604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44942,"url":"https://patchwork.plctlab.org/api/1.2/patches/44942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030921.69098-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030921.69098-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:09:21","name":"RISC-V: Fix bug of before_p function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030921.69098-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44944,"url":"https://patchwork.plctlab.org/api/1.2/patches/44944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031305.69740-1-juzhe.zhong@rivai.ai/","msgid":"<20230118031305.69740-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:13:05","name":"RISC-V: Refine function args of some functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031305.69740-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44945,"url":"https://patchwork.plctlab.org/api/1.2/patches/44945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031650.70285-1-juzhe.zhong@rivai.ai/","msgid":"<20230118031650.70285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:16:50","name":"RISC-V: Add :: for static function calling to avoid confusing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031650.70285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44949,"url":"https://patchwork.plctlab.org/api/1.2/patches/44949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032434.71273-1-juzhe.zhong@rivai.ai/","msgid":"<20230118032434.71273-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:24:34","name":"RISC-V: Finalize VSETVL PASS implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032434.71273-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44952,"url":"https://patchwork.plctlab.org/api/1.2/patches/44952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032915.71849-1-juzhe.zhong@rivai.ai/","msgid":"<20230118032915.71849-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:29:15","name":"RISC-V: Finalize testcases for final version VSETVL PASS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032915.71849-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44958,"url":"https://patchwork.plctlab.org/api/1.2/patches/44958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebf0364a-16ad-2c69-fd73-00a9fa949e50@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-18T04:23:52","name":"[v3] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebf0364a-16ad-2c69-fd73-00a9fa949e50@yahoo.co.jp/mbox/"},{"id":44976,"url":"https://patchwork.plctlab.org/api/1.2/patches/44976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd3c649a-64f0-6922-e7de-7170fb4bb419@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-18T05:25:41","name":"[v2] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd3c649a-64f0-6922-e7de-7170fb4bb419@yahoo.co.jp/mbox/"},{"id":44977,"url":"https://patchwork.plctlab.org/api/1.2/patches/44977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp/","msgid":"<5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-18T05:43:13","name":"xtensa: Optimize inversion of the MSB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp/mbox/"},{"id":45096,"url":"https://patchwork.plctlab.org/api/1.2/patches/45096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118083442.04BA933EEC@hamza.pair.com/","msgid":"<20230118083442.04BA933EEC@hamza.pair.com>","list_archive_url":null,"date":"2023-01-18T08:34:36","name":"[committed] wwwdocs: gcc-4.6: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118083442.04BA933EEC@hamza.pair.com/mbox/"},{"id":45098,"url":"https://patchwork.plctlab.org/api/1.2/patches/45098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f05d86a0-0bd2-6efb-31aa-6d163d91e184@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-18T08:36:29","name":"[rs6000] Convert TI AND with a special constant to DI AND [PR93123]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f05d86a0-0bd2-6efb-31aa-6d163d91e184@linux.ibm.com/mbox/"},{"id":45099,"url":"https://patchwork.plctlab.org/api/1.2/patches/45099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com/","msgid":"<55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com>","list_archive_url":null,"date":"2023-01-18T08:50:39","name":"[1/2] rs6000: Refactor script genfusion.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com/mbox/"},{"id":45104,"url":"https://patchwork.plctlab.org/api/1.2/patches/45104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com/","msgid":"<130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com>","list_archive_url":null,"date":"2023-01-18T09:02:47","name":"[2/2] rs6000: Refactor genfusion.pl a bit further","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com/mbox/"},{"id":45142,"url":"https://patchwork.plctlab.org/api/1.2/patches/45142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmlem0ywoy.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-01-18T10:16:29","name":"lto: pass through -funwind-tables and -fasynchronous-unwind-tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmlem0ywoy.fsf@suse.de/mbox/"},{"id":45152,"url":"https://patchwork.plctlab.org/api/1.2/patches/45152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c061f6c1c090362efbbcb9af9f6c758@autistici.org/","msgid":"<7c061f6c1c090362efbbcb9af9f6c758@autistici.org>","list_archive_url":null,"date":"2023-01-18T10:44:19","name":"realpath() patch to fix symlinks resolution for win32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c061f6c1c090362efbbcb9af9f6c758@autistici.org/mbox/"},{"id":45153,"url":"https://patchwork.plctlab.org/api/1.2/patches/45153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnmuV0Jf2=uBqnbmVTeTRVAZToNhR3X_kU9DCrTJM+Edw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-18T10:48:07","name":"[aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnmuV0Jf2=uBqnbmVTeTRVAZToNhR3X_kU9DCrTJM+Edw@mail.gmail.com/mbox/"},{"id":45293,"url":"https://patchwork.plctlab.org/api/1.2/patches/45293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118135707.2394F139D2@imap2.suse-dmz.suse.de/","msgid":"<20230118135707.2394F139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-18T13:57:06","name":"lto/108445 - avoid LTO decl wrapping being confused by tree sharing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118135707.2394F139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":45296,"url":"https://patchwork.plctlab.org/api/1.2/patches/45296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzgag544p.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-18T14:06:14","name":"wwwdocs: Announce Solaris 11.3 obsoletion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzgag544p.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":45340,"url":"https://patchwork.plctlab.org/api/1.2/patches/45340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com/","msgid":"<0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com>","list_archive_url":null,"date":"2023-01-18T15:42:24","name":"libfortran: Fix execute_command_line for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com/mbox/"},{"id":45385,"url":"https://patchwork.plctlab.org/api/1.2/patches/45385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118164501.8130-1-dmalcolm@redhat.com/","msgid":"<20230118164501.8130-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-18T16:45:01","name":"[committed] analyzer: add SARD testsuite 81","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118164501.8130-1-dmalcolm@redhat.com/mbox/"},{"id":45404,"url":"https://patchwork.plctlab.org/api/1.2/patches/45404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118175200.365397-1-polacek@redhat.com/","msgid":"<20230118175200.365397-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-18T17:52:00","name":"c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118175200.365397-1-polacek@redhat.com/mbox/"},{"id":45429,"url":"https://patchwork.plctlab.org/api/1.2/patches/45429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118191231.29839-1-hjl.tools@gmail.com/","msgid":"<20230118191231.29839-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-18T19:12:31","name":"x86: Check invalid third argument to __builtin_ia32_prefetch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118191231.29839-1-hjl.tools@gmail.com/mbox/"},{"id":45469,"url":"https://patchwork.plctlab.org/api/1.2/patches/45469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-1-christophe.lyon@arm.com/","msgid":"<20230118201649.11612-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-18T20:16:48","name":"[1/2] aarch64: fix ICE in aarch64_layout_arg [PR108411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-1-christophe.lyon@arm.com/mbox/"},{"id":45468,"url":"https://patchwork.plctlab.org/api/1.2/patches/45468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-2-christophe.lyon@arm.com/","msgid":"<20230118201649.11612-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-18T20:16:49","name":"[2/2] aarch64: add -fno-stack-protector to some tests [PR108411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-2-christophe.lyon@arm.com/mbox/"},{"id":45501,"url":"https://patchwork.plctlab.org/api/1.2/patches/45501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118211242.488379-1-polacek@redhat.com/","msgid":"<20230118211242.488379-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:12:42","name":"c: ICE with nullptr as case expression [PR108424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118211242.488379-1-polacek@redhat.com/mbox/"},{"id":45507,"url":"https://patchwork.plctlab.org/api/1.2/patches/45507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-294bce16-8b7b-4df3-b8a5-6f21ee37d08f-1674076842437@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-18T21:20:42","name":"Fortran: error recovery for invalid CLASS component [PR108434]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-294bce16-8b7b-4df3-b8a5-6f21ee37d08f-1674076842437@3c-app-gmx-bs46/mbox/"},{"id":45520,"url":"https://patchwork.plctlab.org/api/1.2/patches/45520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214922.440230-1-jwakely@redhat.com/","msgid":"<20230118214922.440230-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:49:22","name":"[committed] libstdc++: Fix std::random_device::entropy() for non-posix targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214922.440230-1-jwakely@redhat.com/mbox/"},{"id":45519,"url":"https://patchwork.plctlab.org/api/1.2/patches/45519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214929.440253-1-jwakely@redhat.com/","msgid":"<20230118214929.440253-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:49:29","name":"[committed] libstdc++: Deprecate std::filesystem::u8path for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214929.440253-1-jwakely@redhat.com/mbox/"},{"id":45526,"url":"https://patchwork.plctlab.org/api/1.2/patches/45526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118222004.A77E933F02@hamza.pair.com/","msgid":"<20230118222004.A77E933F02@hamza.pair.com>","list_archive_url":null,"date":"2023-01-18T22:20:02","name":"[committed] libstdc++: Minor updates to Policy Based Data Structures: Biblio","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118222004.A77E933F02@hamza.pair.com/mbox/"},{"id":45553,"url":"https://patchwork.plctlab.org/api/1.2/patches/45553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8iZOKnDx+14BjOD@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-19T01:13:28","name":"[v2] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8iZOKnDx+14BjOD@redhat.com/mbox/"},{"id":45570,"url":"https://patchwork.plctlab.org/api/1.2/patches/45570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp/","msgid":"<465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-19T03:50:10","name":"[v4] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp/mbox/"},{"id":45595,"url":"https://patchwork.plctlab.org/api/1.2/patches/45595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b19b8ffe-16ea-522f-ebd8-d9041972353e@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-19T05:06:26","name":"[v3] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b19b8ffe-16ea-522f-ebd8-d9041972353e@yahoo.co.jp/mbox/"},{"id":45602,"url":"https://patchwork.plctlab.org/api/1.2/patches/45602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119060749.6812-1-juzhe.zhong@rivai.ai/","msgid":"<20230119060749.6812-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T06:07:49","name":"RISC-V: Add vlm/vsm C/C++ API intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119060749.6812-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45615,"url":"https://patchwork.plctlab.org/api/1.2/patches/45615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119070258.38936-1-juzhe.zhong@rivai.ai/","msgid":"<20230119070258.38936-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T07:02:58","name":"RISC-V: Fix pred_mov constraint for vle.v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119070258.38936-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45646,"url":"https://patchwork.plctlab.org/api/1.2/patches/45646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kCLT9lHooHB2Ti@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T08:41:17","name":"forwprop: Further fixes for simplify_rotate [PR108440]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kCLT9lHooHB2Ti@tucnak/mbox/"},{"id":45647,"url":"https://patchwork.plctlab.org/api/1.2/patches/45647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kEy10R0C8zeVC5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T08:52:27","name":"c++: Fix up handling of non-dependent subscript with static operator[] [PR108437]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kEy10R0C8zeVC5@tucnak/mbox/"},{"id":45657,"url":"https://patchwork.plctlab.org/api/1.2/patches/45657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093037.0C02C33E96@hamza.pair.com/","msgid":"<20230119093037.0C02C33E96@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T09:30:35","name":"[committed] wwwdocs: gcc-3.3: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093037.0C02C33E96@hamza.pair.com/mbox/"},{"id":45663,"url":"https://patchwork.plctlab.org/api/1.2/patches/45663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093342.36BEB33E96@hamza.pair.com/","msgid":"<20230119093342.36BEB33E96@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T09:33:40","name":"[committed] wwwdocs: gitwrite: Structure a section some more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093342.36BEB33E96@hamza.pair.com/mbox/"},{"id":45664,"url":"https://patchwork.plctlab.org/api/1.2/patches/45664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119094609.35967134F5@imap2.suse-dmz.suse.de/","msgid":"<20230119094609.35967134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-19T09:46:08","name":"tree-optimization/108449 - keep maybe_special_function_p behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119094609.35967134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":45696,"url":"https://patchwork.plctlab.org/api/1.2/patches/45696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de/","msgid":"<20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-19T11:22:28","name":"modula2/108144 - fix --enable-version-specific-runtime-libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":45785,"url":"https://patchwork.plctlab.org/api/1.2/patches/45785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119141249.293487-1-juzhe.zhong@rivai.ai/","msgid":"<20230119141249.293487-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T14:12:49","name":"RISC-V: Add vle.v C API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119141249.293487-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45797,"url":"https://patchwork.plctlab.org/api/1.2/patches/45797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119143108.314789-1-juzhe.zhong@rivai.ai/","msgid":"<20230119143108.314789-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T14:31:08","name":"RISC-V: Add vse.v C API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119143108.314789-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45807,"url":"https://patchwork.plctlab.org/api/1.2/patches/45807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com/","msgid":"<18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com>","list_archive_url":null,"date":"2023-01-19T14:40:19","name":"OpenMP/Fortran: Partially fix non-rect loop nests [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com/mbox/"},{"id":45821,"url":"https://patchwork.plctlab.org/api/1.2/patches/45821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144608.56FCD33E8C@hamza.pair.com/","msgid":"<20230119144608.56FCD33E8C@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T14:46:06","name":"[committed] style: Tweak a comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144608.56FCD33E8C@hamza.pair.com/mbox/"},{"id":45823,"url":"https://patchwork.plctlab.org/api/1.2/patches/45823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144841.1B7E233E8E@hamza.pair.com/","msgid":"<20230119144841.1B7E233E8E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T14:48:39","name":"[committed] wwwdocs: gcc-4.9: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144841.1B7E233E8E@hamza.pair.com/mbox/"},{"id":45854,"url":"https://patchwork.plctlab.org/api/1.2/patches/45854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8lxx+Jxfl1IkheJ@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-01-19T16:37:27","name":"PR target/107299: Fix build issue when long double is IEEE 128-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8lxx+Jxfl1IkheJ@toto.the-meissners.org/mbox/"},{"id":45905,"url":"https://patchwork.plctlab.org/api/1.2/patches/45905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119185619.78452-1-dmalcolm@redhat.com/","msgid":"<20230119185619.78452-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-19T18:56:19","name":"[committed] analyzer: use dominator info in -Wanalyzer-deref-before-check [PR108455]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119185619.78452-1-dmalcolm@redhat.com/mbox/"},{"id":45950,"url":"https://patchwork.plctlab.org/api/1.2/patches/45950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8miS6EhPhsHx9/c@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:04:27","name":"[committed] openmp: Fix up OpenMP expansion of non-rectangular loops [PR108459]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8miS6EhPhsHx9/c@tucnak/mbox/"},{"id":45951,"url":"https://patchwork.plctlab.org/api/1.2/patches/45951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mjKFwfY/7O4lQM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:08:08","name":"niter: Fix up unused var warning [PR108457]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mjKFwfY/7O4lQM@tucnak/mbox/"},{"id":45954,"url":"https://patchwork.plctlab.org/api/1.2/patches/45954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mkUOpknOZyIC1I@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:13:04","name":"c++: Fix up handling of references to anon union members in initializers [PR53932]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mkUOpknOZyIC1I@tucnak/mbox/"},{"id":45956,"url":"https://patchwork.plctlab.org/api/1.2/patches/45956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mlNDm8kwAfjB5F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:16:52","name":"value-relation: Fix up relation_union [PR108447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mlNDm8kwAfjB5F@tucnak/mbox/"},{"id":46086,"url":"https://patchwork.plctlab.org/api/1.2/patches/46086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8n2ayXMZf+dYsqi@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-20T02:03:23","name":"[v3] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8n2ayXMZf+dYsqi@redhat.com/mbox/"},{"id":46087,"url":"https://patchwork.plctlab.org/api/1.2/patches/46087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120020339.1025075-1-polacek@redhat.com/","msgid":"<20230120020339.1025075-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-20T02:03:39","name":"c++: Quash bogus -Wunused-value with new [PR107797]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120020339.1025075-1-polacek@redhat.com/mbox/"},{"id":46092,"url":"https://patchwork.plctlab.org/api/1.2/patches/46092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022029.215012-1-juzhe.zhong@rivai.ai/","msgid":"<20230120022029.215012-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T02:20:29","name":"RISC-V: Fix vop_m overloaded C++ API name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022029.215012-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46093,"url":"https://patchwork.plctlab.org/api/1.2/patches/46093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022434.215774-1-juzhe.zhong@rivai.ai/","msgid":"<20230120022434.215774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T02:24:34","name":"RISC-V: Add vle/vse C++ overloaded API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022434.215774-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46120,"url":"https://patchwork.plctlab.org/api/1.2/patches/46120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp/","msgid":"<28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-20T03:33:37","name":"xtensa: Revise 89afb2e86fcb29c559b2957fdcbea0d01740c49b","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp/mbox/"},{"id":46126,"url":"https://patchwork.plctlab.org/api/1.2/patches/46126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042541.109466-1-juzhe.zhong@rivai.ai/","msgid":"<20230120042541.109466-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T04:25:41","name":"RISC-V: Add vlse/vsse C/C++ API intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042541.109466-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46127,"url":"https://patchwork.plctlab.org/api/1.2/patches/46127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042723.109826-1-juzhe.zhong@rivai.ai/","msgid":"<20230120042723.109826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T04:27:23","name":"RISC-V: Add vlse/vsse C/C++ intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042723.109826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46259,"url":"https://patchwork.plctlab.org/api/1.2/patches/46259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120093309.104394-1-juzhe.zhong@rivai.ai/","msgid":"<20230120093309.104394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T09:33:09","name":"RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120093309.104394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46289,"url":"https://patchwork.plctlab.org/api/1.2/patches/46289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-1-gcc@hazardy.de/","msgid":"<20230120105409.54949-1-gcc@hazardy.de>","list_archive_url":null,"date":"2023-01-20T10:54:06","name":"[1/4] libbacktrace: change all pc related variables to uintptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-1-gcc@hazardy.de/mbox/"},{"id":46290,"url":"https://patchwork.plctlab.org/api/1.2/patches/46290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-3-gcc@hazardy.de/","msgid":"<20230120105409.54949-3-gcc@hazardy.de>","list_archive_url":null,"date":"2023-01-20T10:54:08","name":"[3/4] libbacktrace: work with aslr on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-3-gcc@hazardy.de/mbox/"},{"id":46302,"url":"https://patchwork.plctlab.org/api/1.2/patches/46302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120120433.5A733385841E@sourceware.org/","msgid":"<20230120120433.5A733385841E@sourceware.org>","list_archive_url":null,"date":"2023-01-20T12:03:47","name":"modula2/108144 - Fix multilib install of libgm2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120120433.5A733385841E@sourceware.org/mbox/"},{"id":46350,"url":"https://patchwork.plctlab.org/api/1.2/patches/46350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5ef1d5ce3e47e8431450ae8383a342@autistici.org/","msgid":"<0e5ef1d5ce3e47e8431450ae8383a342@autistici.org>","list_archive_url":null,"date":"2023-01-20T14:06:01","name":"libquadmath fix for 94756 and 87204","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5ef1d5ce3e47e8431450ae8383a342@autistici.org/mbox/"},{"id":46365,"url":"https://patchwork.plctlab.org/api/1.2/patches/46365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5h5m11.fsf@euler.schwinge.homeip.net/","msgid":"<87wn5h5m11.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T14:16:26","name":"[og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration (was: [OG12] [committed] amdgcn: Enable SIMD vectorization of math library functions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5h5m11.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46366,"url":"https://patchwork.plctlab.org/api/1.2/patches/46366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0l5lqg.fsf@euler.schwinge.homeip.net/","msgid":"<87tu0l5lqg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T14:22:47","name":"[og12] Force '\''--param openacc-kernels=parloops'\'' in '\''libgomp.oacc-c-c++-common/abort-3.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0l5lqg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46403,"url":"https://patchwork.plctlab.org/api/1.2/patches/46403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8qt0/yOySGsLEnt@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-20T15:05:55","name":"file-prefix-map: Fix up -f*-prefix-map= [PR108464]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8qt0/yOySGsLEnt@tucnak/mbox/"},{"id":46469,"url":"https://patchwork.plctlab.org/api/1.2/patches/46469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxdv5t.fsf@euler.schwinge.homeip.net/","msgid":"<87lelxdv5t.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T16:31:58","name":"[og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration, again (was: [og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration (was: [OG12] [committed] amdgcn: Enable SIMD vectorization of math library functions))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxdv5t.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46491,"url":"https://patchwork.plctlab.org/api/1.2/patches/46491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-2-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:26","name":"[01/23] arm: improve tests and fix vclsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-2-andrea.corallo@arm.com/mbox/"},{"id":46504,"url":"https://patchwork.plctlab.org/api/1.2/patches/46504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-3-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-3-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:27","name":"[02/23] arm: improve tests and fix vclzq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-3-andrea.corallo@arm.com/mbox/"},{"id":46500,"url":"https://patchwork.plctlab.org/api/1.2/patches/46500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-4-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:28","name":"[03/23] arm: improve tests and fix vnegq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-4-andrea.corallo@arm.com/mbox/"},{"id":46497,"url":"https://patchwork.plctlab.org/api/1.2/patches/46497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-5-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:29","name":"[04/23] arm: improve tests for vmulhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-5-andrea.corallo@arm.com/mbox/"},{"id":46499,"url":"https://patchwork.plctlab.org/api/1.2/patches/46499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-6-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:30","name":"[05/23] arm: improve tests for vmullbq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-6-andrea.corallo@arm.com/mbox/"},{"id":46496,"url":"https://patchwork.plctlab.org/api/1.2/patches/46496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-7-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-7-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:31","name":"[06/23] arm: improve tests for vmulltq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-7-andrea.corallo@arm.com/mbox/"},{"id":46510,"url":"https://patchwork.plctlab.org/api/1.2/patches/46510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-8-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:32","name":"[07/23] arm: improve tests for vcaddq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-8-andrea.corallo@arm.com/mbox/"},{"id":46505,"url":"https://patchwork.plctlab.org/api/1.2/patches/46505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-9-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:33","name":"[08/23] arm: improve tests for vcmlaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-9-andrea.corallo@arm.com/mbox/"},{"id":46513,"url":"https://patchwork.plctlab.org/api/1.2/patches/46513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-10-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:34","name":"[09/23] arm: improve tests for vcmulq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-10-andrea.corallo@arm.com/mbox/"},{"id":46509,"url":"https://patchwork.plctlab.org/api/1.2/patches/46509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-11-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-11-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:35","name":"[10/23] arm: improve tests and fix vqabsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-11-andrea.corallo@arm.com/mbox/"},{"id":46506,"url":"https://patchwork.plctlab.org/api/1.2/patches/46506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-12-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-12-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:36","name":"[11/23] arm: improve tests for vqdmladhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-12-andrea.corallo@arm.com/mbox/"},{"id":46502,"url":"https://patchwork.plctlab.org/api/1.2/patches/46502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-13-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-13-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:37","name":"[12/23] arm: improve tests for vqdmladhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-13-andrea.corallo@arm.com/mbox/"},{"id":46503,"url":"https://patchwork.plctlab.org/api/1.2/patches/46503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-14-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-14-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:38","name":"[13/23] arm: improve tests for vqrdmladhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-14-andrea.corallo@arm.com/mbox/"},{"id":46512,"url":"https://patchwork.plctlab.org/api/1.2/patches/46512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-15-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-15-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:39","name":"[14/23] arm: improve tests for vqrdmladhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-15-andrea.corallo@arm.com/mbox/"},{"id":46489,"url":"https://patchwork.plctlab.org/api/1.2/patches/46489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-16-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-16-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:40","name":"[15/23] arm: improve tests for vqrdmlashq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-16-andrea.corallo@arm.com/mbox/"},{"id":46493,"url":"https://patchwork.plctlab.org/api/1.2/patches/46493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-17-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-17-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:41","name":"[16/23] arm: improve tests for vqdmlsdhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-17-andrea.corallo@arm.com/mbox/"},{"id":46490,"url":"https://patchwork.plctlab.org/api/1.2/patches/46490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-18-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-18-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:42","name":"[17/23] arm: improve tests for vqdmlsdhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-18-andrea.corallo@arm.com/mbox/"},{"id":46498,"url":"https://patchwork.plctlab.org/api/1.2/patches/46498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-19-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-19-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:43","name":"[18/23] arm: improve tests for vqrdmlsdhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-19-andrea.corallo@arm.com/mbox/"},{"id":46507,"url":"https://patchwork.plctlab.org/api/1.2/patches/46507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-20-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-20-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:44","name":"[19/23] arm: improve tests for vqrdmlsdhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-20-andrea.corallo@arm.com/mbox/"},{"id":46511,"url":"https://patchwork.plctlab.org/api/1.2/patches/46511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-21-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-21-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:45","name":"[20/23] arm: improve tests for vqrdmulhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-21-andrea.corallo@arm.com/mbox/"},{"id":46501,"url":"https://patchwork.plctlab.org/api/1.2/patches/46501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-22-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-22-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:46","name":"[21/23] arm: improve tests and fix vqnegq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-22-andrea.corallo@arm.com/mbox/"},{"id":46508,"url":"https://patchwork.plctlab.org/api/1.2/patches/46508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-23-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-23-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:47","name":"[22/23] arm: improve tests for vld2q*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-23-andrea.corallo@arm.com/mbox/"},{"id":46514,"url":"https://patchwork.plctlab.org/api/1.2/patches/46514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-24-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-24-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:48","name":"[23/23] arm: fix missing extern \"C\" in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-24-andrea.corallo@arm.com/mbox/"},{"id":46536,"url":"https://patchwork.plctlab.org/api/1.2/patches/46536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com/","msgid":"<1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-20T17:27:24","name":"[v2,GCC] arm: Add support for new frame unwinding instruction \"0xb5\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com/mbox/"},{"id":46617,"url":"https://patchwork.plctlab.org/api/1.2/patches/46617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxotii.fsf@euler.schwinge.homeip.net/","msgid":"<87lelxotii.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T20:12:05","name":"Clean up after newlib \"nvptx: In offloading execution, map '\''_exit'\'' to '\''abort'\'' [GCC PR85463]\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxotii.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46625,"url":"https://patchwork.plctlab.org/api/1.2/patches/46625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:23:06","name":"[og12] nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46626,"url":"https://patchwork.plctlab.org/api/1.2/patches/46626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:26:43","name":"[og12] Add '\''gcc.target/nvptx/softstack-decl-1.c'\'', '\''gcc.target/nvptx/uniform-simt-decl-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46627,"url":"https://patchwork.plctlab.org/api/1.2/patches/46627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:30:14","name":"[og12] nvptx: Prevent emitting duplicate declarations for '\''__nvptx_stacks'\'', '\''__nvptx_uni'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46630,"url":"https://patchwork.plctlab.org/api/1.2/patches/46630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:46:50","name":"[og12] nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46641,"url":"https://patchwork.plctlab.org/api/1.2/patches/46641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T21:04:02","name":"nvptx, libgcc: Stub unwinding implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46643,"url":"https://patchwork.plctlab.org/api/1.2/patches/46643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T21:16:00","name":"nvptx, libgfortran: Switch out of \"minimal\" mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46748,"url":"https://patchwork.plctlab.org/api/1.2/patches/46748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbce44ba-6020-ee61-d657-5676a5432e79@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-21T01:46:39","name":"[patch.,fortran] PR102595 ICE in var_element, at fortran/decl.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbce44ba-6020-ee61-d657-5676a5432e79@gmail.com/mbox/"},{"id":46755,"url":"https://patchwork.plctlab.org/api/1.2/patches/46755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com/","msgid":"<1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com>","list_archive_url":null,"date":"2023-01-21T02:13:16","name":"[gfortran.dg] Adjust numerous tests so that they pass on line endings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com/mbox/"},{"id":46758,"url":"https://patchwork.plctlab.org/api/1.2/patches/46758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca088d6a-91bf-c8f1-9db1-cc92065d7df9@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-21T03:21:27","name":"[gfortran.dg] Allow test to pass on mingw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca088d6a-91bf-c8f1-9db1-cc92065d7df9@protonmail.com/mbox/"},{"id":46796,"url":"https://patchwork.plctlab.org/api/1.2/patches/46796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com/","msgid":"<11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com>","list_archive_url":null,"date":"2023-01-21T09:57:24","name":"install.texi: Bump newlib version for nvptx + gcn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com/mbox/"},{"id":46797,"url":"https://patchwork.plctlab.org/api/1.2/patches/46797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8u3h8B7//8hKdHh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-21T09:59:35","name":"c++: Handle structured bindings like anon unions in initializers [PR108474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8u3h8B7//8hKdHh@tucnak/mbox/"},{"id":46811,"url":"https://patchwork.plctlab.org/api/1.2/patches/46811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121111541.ADDED33EBE@hamza.pair.com/","msgid":"<20230121111541.ADDED33EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-01-21T11:15:40","name":"[pushed] wwwdocs: *: Consistent formatting around environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121111541.ADDED33EBE@hamza.pair.com/mbox/"},{"id":46844,"url":"https://patchwork.plctlab.org/api/1.2/patches/46844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121170507.2193-1-iain@sandoe.co.uk/","msgid":"<20230121170507.2193-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-21T17:05:07","name":"[pushed] Darwin, fixincludes: Handle MacOS13 SDK Apple-specific deprecations [PR107586].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121170507.2193-1-iain@sandoe.co.uk/mbox/"},{"id":46845,"url":"https://patchwork.plctlab.org/api/1.2/patches/46845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121171220.36495-1-iain@sandoe.co.uk/","msgid":"<20230121171220.36495-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-21T17:12:20","name":"Darwin, fixincludes: Handle Apple Blocks in objc/runtime.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121171220.36495-1-iain@sandoe.co.uk/mbox/"},{"id":46846,"url":"https://patchwork.plctlab.org/api/1.2/patches/46846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121173312.6E2FE33E62@hamza.pair.com/","msgid":"<20230121173312.6E2FE33E62@hamza.pair.com>","list_archive_url":null,"date":"2023-01-21T17:33:11","name":"[pushed] wwwdocs: gcc-5: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121173312.6E2FE33E62@hamza.pair.com/mbox/"},{"id":46922,"url":"https://patchwork.plctlab.org/api/1.2/patches/46922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122093556.33081-1-iain@sandoe.co.uk/","msgid":"<20230122093556.33081-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-22T09:35:56","name":"[pushed] Darwin, libffi, testsuite: Ensure we pick up the convenience lib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122093556.33081-1-iain@sandoe.co.uk/mbox/"},{"id":46928,"url":"https://patchwork.plctlab.org/api/1.2/patches/46928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfdc8846-6060-2e9c-ec28-e0f7c74d9795@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-01-22T12:02:01","name":"[pushed] wwwdocs: gcc-10: Grammar fixes in the amdgcn section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfdc8846-6060-2e9c-ec28-e0f7c74d9795@pfeifer.com/mbox/"},{"id":46963,"url":"https://patchwork.plctlab.org/api/1.2/patches/46963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122161059.96036-1-iain@sandoe.co.uk/","msgid":"<20230122161059.96036-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-22T16:10:59","name":"Modula-2, testsuite: Remove use of concatenated paths.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122161059.96036-1-iain@sandoe.co.uk/mbox/"},{"id":47005,"url":"https://patchwork.plctlab.org/api/1.2/patches/47005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122195040.746214-1-dimitar@dinux.eu/","msgid":"<20230122195040.746214-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-22T19:50:40","name":"[committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122195040.746214-1-dimitar@dinux.eu/mbox/"},{"id":47023,"url":"https://patchwork.plctlab.org/api/1.2/patches/47023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123003447.3975772-1-jason@redhat.com/","msgid":"<20230123003447.3975772-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T00:34:47","name":"[pushed] c++: lifetime extension with .* expression [PR53288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123003447.3975772-1-jason@redhat.com/mbox/"},{"id":47025,"url":"https://patchwork.plctlab.org/api/1.2/patches/47025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123012100.4021860-1-arsen@aarsen.me/","msgid":"<20230123012100.4021860-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-23T01:21:00","name":"[wwwdocs] lists: Add documentation about the Sourceware public-inbox","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123012100.4021860-1-arsen@aarsen.me/mbox/"},{"id":47044,"url":"https://patchwork.plctlab.org/api/1.2/patches/47044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd643693-5e73-cd9f-ae2e-541d253985d0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-23T06:02:27","name":"[_GLIBCXX_DEBUG] Remove useless checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd643693-5e73-cd9f-ae2e-541d253985d0@gmail.com/mbox/"},{"id":47071,"url":"https://patchwork.plctlab.org/api/1.2/patches/47071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com/","msgid":"<42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com>","list_archive_url":null,"date":"2023-01-23T08:48:33","name":"[committed] libgomp.texi: Impl. status - non-rect loop nest only partial","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com/mbox/"},{"id":47090,"url":"https://patchwork.plctlab.org/api/1.2/patches/47090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123100943.6C675134F5@imap2.suse-dmz.suse.de/","msgid":"<20230123100943.6C675134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:09:43","name":"tree-optimization/108482 - remove stray .LOOP_DIST_ALIAS calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123100943.6C675134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":47106,"url":"https://patchwork.plctlab.org/api/1.2/patches/47106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123101852.EABDC134F5@imap2.suse-dmz.suse.de/","msgid":"<20230123101852.EABDC134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:18:52","name":"modula2/108144 - fix mistake in previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123101852.EABDC134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":47107,"url":"https://patchwork.plctlab.org/api/1.2/patches/47107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0vltu0v.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-23T10:38:56","name":"testsuite: Fix gcc.dg/vect/vect-fmax-1.c etc. on SPARC [PR104756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0vltu0v.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":47109,"url":"https://patchwork.plctlab.org/api/1.2/patches/47109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt69ttsh.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-23T10:43:58","name":"testsuite: Fix gcc.dg/vect/vect-bitfield-write-[23].c on SPARC [PR107808]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt69ttsh.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":47114,"url":"https://patchwork.plctlab.org/api/1.2/patches/47114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123105023.983A51357F@imap2.suse-dmz.suse.de/","msgid":"<20230123105023.983A51357F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:50:23","name":"modula2/108462 - duplicate install of static modula2 target libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123105023.983A51357F@imap2.suse-dmz.suse.de/mbox/"},{"id":47119,"url":"https://patchwork.plctlab.org/api/1.2/patches/47119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y85shC6wzmxApdZM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-23T11:16:20","name":"c++, cgraphbuild: Handle DECL_VALUE_EXPRs in record_reference [PR108474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y85shC6wzmxApdZM@tucnak/mbox/"},{"id":47120,"url":"https://patchwork.plctlab.org/api/1.2/patches/47120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com/","msgid":"<0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com>","list_archive_url":null,"date":"2023-01-23T11:37:38","name":"[wwwdocs] gcc-6: Consistently lower-case newlib (was: [Patch] install.texi: Bump newlib version for nvptx + gcn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com/mbox/"},{"id":47130,"url":"https://patchwork.plctlab.org/api/1.2/patches/47130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123124145.965541-1-arsen@aarsen.me/","msgid":"<20230123124145.965541-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-23T12:41:45","name":"libstdc++: Document P1642 and extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123124145.965541-1-arsen@aarsen.me/mbox/"},{"id":47152,"url":"https://patchwork.plctlab.org/api/1.2/patches/47152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com/","msgid":"<3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-23T13:39:45","name":"[Committed,GCC] arm: Documentation fix for -mbranch-protection option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com/mbox/"},{"id":47269,"url":"https://patchwork.plctlab.org/api/1.2/patches/47269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com/","msgid":"<2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com>","list_archive_url":null,"date":"2023-01-23T17:44:42","name":"[1/2] Use value_relation class instead of direct calls to intersect/union.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com/mbox/"},{"id":47270,"url":"https://patchwork.plctlab.org/api/1.2/patches/47270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c60c2794-f726-29cc-45fd-54149ffce169@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-23T17:44:48","name":"[2/2] Add VREL_OTHER for FP unsupported relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c60c2794-f726-29cc-45fd-54149ffce169@redhat.com/mbox/"},{"id":47324,"url":"https://patchwork.plctlab.org/api/1.2/patches/47324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123183706.14801-1-Brian.Inglis@Shaw.ca/","msgid":"<20230123183706.14801-1-Brian.Inglis@Shaw.ca>","list_archive_url":null,"date":"2023-01-23T18:37:06","name":"doc/invoke.texi: remove Cygwin options from Windows options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123183706.14801-1-Brian.Inglis@Shaw.ca/mbox/"},{"id":47336,"url":"https://patchwork.plctlab.org/api/1.2/patches/47336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123190936.4161568-1-jason@redhat.com/","msgid":"<20230123190936.4161568-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T19:09:36","name":"[pushed] c++: result location and explicit inst [PR108496]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123190936.4161568-1-jason@redhat.com/mbox/"},{"id":47375,"url":"https://patchwork.plctlab.org/api/1.2/patches/47375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ecf6c22d-c54d-48b8-9e31-bec40bcc5bc7-1674506099182@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-01-23T20:34:59","name":"Fortran: avoid ICE on invalid array subscript triplets [PR108501]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ecf6c22d-c54d-48b8-9e31-bec40bcc5bc7-1674506099182@3c-app-gmx-bap50/mbox/"},{"id":47407,"url":"https://patchwork.plctlab.org/api/1.2/patches/47407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123211234.37680-1-jason@redhat.com/","msgid":"<20230123211234.37680-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T21:12:34","name":"[pushed] c++: vector of class with bool ctor [PR108195]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123211234.37680-1-jason@redhat.com/mbox/"},{"id":47409,"url":"https://patchwork.plctlab.org/api/1.2/patches/47409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a7fd4365-096c-4df3-b654-6912a5dca41d-1674509034609@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-01-23T21:23:54","name":"Fortran: fix NULL pointer dereference in gfc_check_dependency [PR108502]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a7fd4365-096c-4df3-b654-6912a5dca41d-1674509034609@3c-app-gmx-bap50/mbox/"},{"id":47464,"url":"https://patchwork.plctlab.org/api/1.2/patches/47464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7030d247-5453-2344-2ee6-33899e52ed08@redhat.com/","msgid":"<7030d247-5453-2344-2ee6-33899e52ed08@redhat.com>","list_archive_url":null,"date":"2023-01-23T23:21:37","name":"tree-optimization/108306 - Correctly detect shifts out of range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7030d247-5453-2344-2ee6-33899e52ed08@redhat.com/mbox/"},{"id":47467,"url":"https://patchwork.plctlab.org/api/1.2/patches/47467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123233453.85393-1-jason@redhat.com/","msgid":"<20230123233453.85393-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T23:34:53","name":"[pushed] c++: TARGET_EXPR_ELIDING_P and std::move [PR107267]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123233453.85393-1-jason@redhat.com/mbox/"},{"id":47515,"url":"https://patchwork.plctlab.org/api/1.2/patches/47515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124032614.121085-1-jason@redhat.com/","msgid":"<20230124032614.121085-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T03:26:14","name":"[pushed] c++: TARGET_EXPR collapsing [PR107303]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124032614.121085-1-jason@redhat.com/mbox/"},{"id":47517,"url":"https://patchwork.plctlab.org/api/1.2/patches/47517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp/","msgid":"<1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-24T03:43:31","name":"[v5] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp/mbox/"},{"id":47518,"url":"https://patchwork.plctlab.org/api/1.2/patches/47518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp/","msgid":"<384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-24T03:43:52","name":"[v4] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp/mbox/"},{"id":47593,"url":"https://patchwork.plctlab.org/api/1.2/patches/47593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124084701.258605-1-stefansf@linux.ibm.com/","msgid":"<20230124084701.258605-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-01-24T08:47:02","name":"[v2] IBM zSystems: Fix TARGET_D_CPU_VERSIONS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124084701.258605-1-stefansf@linux.ibm.com/mbox/"},{"id":47594,"url":"https://patchwork.plctlab.org/api/1.2/patches/47594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-24T09:01:16","name":"Make '\''libgcc/config/nvptx/crt0.c'\'' build '\''--without-headers'\'' (was: [PING] nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":47621,"url":"https://patchwork.plctlab.org/api/1.2/patches/47621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-24T09:37:00","name":"Update '\''libgomp/libgomp.texi'\'' for '\''nvptx, libgfortran: Switch out of \"minimal\" mode'\'' (was: nvptx, libgfortran: Switch out of \"minimal\" mode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":47623,"url":"https://patchwork.plctlab.org/api/1.2/patches/47623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com/","msgid":"<0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-24T09:55:00","name":"[GCC] arm: Fix inclusion of arm-mlib.h header more than once (pr108505).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com/mbox/"},{"id":47676,"url":"https://patchwork.plctlab.org/api/1.2/patches/47676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124123707.D802C139FB@imap2.suse-dmz.suse.de/","msgid":"<20230124123707.D802C139FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-24T12:37:07","name":"tree-optimization/108500 - avoid useless fast-query compute in CFG cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124123707.D802C139FB@imap2.suse-dmz.suse.de/mbox/"},{"id":47707,"url":"https://patchwork.plctlab.org/api/1.2/patches/47707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae05c3e4-c4a5-69a6-b61b-1d22b63ec9cf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-24T13:40:46","name":"[1/3] arm: Fix sign of MVE predicate mve_pred16_t [PR 107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae05c3e4-c4a5-69a6-b61b-1d22b63ec9cf@arm.com/mbox/"},{"id":47710,"url":"https://patchwork.plctlab.org/api/1.2/patches/47710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com/","msgid":"<22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com>","list_archive_url":null,"date":"2023-01-24T13:54:20","name":"[2/3] arm: Remove unnecessary zero-extending of MVE predicates before use [PR 107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com/mbox/"},{"id":47711,"url":"https://patchwork.plctlab.org/api/1.2/patches/47711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com/","msgid":"<7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com>","list_archive_url":null,"date":"2023-01-24T13:56:28","name":"[3/3] arm: Fix MVE predicates synthesis [PR 108443]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com/mbox/"},{"id":47740,"url":"https://patchwork.plctlab.org/api/1.2/patches/47740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz/","msgid":"<196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz>","list_archive_url":null,"date":"2023-01-24T15:15:05","name":"ipa: check if cache_token != NULL before hash_set::add call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz/mbox/"},{"id":47743,"url":"https://patchwork.plctlab.org/api/1.2/patches/47743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e85a77-ce5e-31b5-5b5f-cd9ee1b2ac4a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-24T15:24:07","name":"OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e85a77-ce5e-31b5-5b5f-cd9ee1b2ac4a@codesourcery.com/mbox/"},{"id":47760,"url":"https://patchwork.plctlab.org/api/1.2/patches/47760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124163607.47793-1-cooper.qu@linux.alibaba.com/","msgid":"<20230124163607.47793-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-24T16:36:07","name":"[COMMITTED] C-SKY: Fix wrong sysroot suffix when disable multilib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124163607.47793-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":47775,"url":"https://patchwork.plctlab.org/api/1.2/patches/47775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12259c76-b704-86eb-c93e-b0a92b0db269@arm.com/","msgid":"<12259c76-b704-86eb-c93e-b0a92b0db269@arm.com>","list_archive_url":null,"date":"2023-01-24T16:52:51","name":"aarch64: Add aarch64*-*-* to the list of vect_long_long targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12259c76-b704-86eb-c93e-b0a92b0db269@arm.com/mbox/"},{"id":47890,"url":"https://patchwork.plctlab.org/api/1.2/patches/47890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a70062ed-5ff9-4209-82a6-93575ddbd32c-1674593251552@3c-app-gmx-bs66/","msgid":"","list_archive_url":null,"date":"2023-01-24T20:47:31","name":"[committed] Fortran: ICE in transformational_result [PR108529]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a70062ed-5ff9-4209-82a6-93575ddbd32c-1674593251552@3c-app-gmx-bs66/mbox/"},{"id":47907,"url":"https://patchwork.plctlab.org/api/1.2/patches/47907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com/","msgid":"<8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com>","list_archive_url":null,"date":"2023-01-24T21:18:38","name":"[committed,PR108388] LRA: Always do elimination and only for hard register to check insn constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com/mbox/"},{"id":47908,"url":"https://patchwork.plctlab.org/api/1.2/patches/47908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17ca0330-53b9-466e-b5f4-dcc7526b27bb-1674596893254@3c-app-gmx-bs66/","msgid":"","list_archive_url":null,"date":"2023-01-24T21:48:13","name":"Fortran: fix ICE in compare_bound_int [PR108527]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17ca0330-53b9-466e-b5f4-dcc7526b27bb-1674596893254@3c-app-gmx-bs66/mbox/"},{"id":47909,"url":"https://patchwork.plctlab.org/api/1.2/patches/47909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124215400.1345220-1-siddhesh@gotplt.org/","msgid":"<20230124215400.1345220-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-01-24T21:54:00","name":"tree-optimization/108522 Use COMPONENT_REF offset when available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124215400.1345220-1-siddhesh@gotplt.org/mbox/"},{"id":47923,"url":"https://patchwork.plctlab.org/api/1.2/patches/47923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221106.299101-1-jason@redhat.com/","msgid":"<20230124221106.299101-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T22:11:06","name":"[pushed] c++: static lambda in template [PR108526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221106.299101-1-jason@redhat.com/mbox/"},{"id":47925,"url":"https://patchwork.plctlab.org/api/1.2/patches/47925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221123.299474-1-jason@redhat.com/","msgid":"<20230124221123.299474-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T22:11:23","name":"[pushed] c++: \"\" #pragma at BOF [PR108504]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221123.299474-1-jason@redhat.com/mbox/"},{"id":47946,"url":"https://patchwork.plctlab.org/api/1.2/patches/47946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BmzmRTiExVyZFR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-24T23:16:30","name":"[committed] testsuite: Fix up new51.C test on various targets [PR108533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BmzmRTiExVyZFR@tucnak/mbox/"},{"id":47947,"url":"https://patchwork.plctlab.org/api/1.2/patches/47947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BnmXCZtTgjby2V@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-24T23:19:53","name":"c++: Fix up mangling of static lambdas [PR108525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BnmXCZtTgjby2V@tucnak/mbox/"},{"id":47966,"url":"https://patchwork.plctlab.org/api/1.2/patches/47966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235153.1186124-1-jwakely@redhat.com/","msgid":"<20230124235153.1186124-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-24T23:51:53","name":"[committed] libstdc++: Include std::ranges::subrange definition in [PR102301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235153.1186124-1-jwakely@redhat.com/mbox/"},{"id":47967,"url":"https://patchwork.plctlab.org/api/1.2/patches/47967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235157.1186160-1-jwakely@redhat.com/","msgid":"<20230124235157.1186160-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-24T23:51:57","name":"[committed] libstdc++: Use /etc/sysconfig/clock for std::chrono::current_zone() [PR108530]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235157.1186160-1-jwakely@redhat.com/mbox/"},{"id":48066,"url":"https://patchwork.plctlab.org/api/1.2/patches/48066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125084629.55372-1-iain@sandoe.co.uk/","msgid":"<20230125084629.55372-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-25T08:46:29","name":"modula-2: Fixes for preprocessing [PR102343, PR108182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125084629.55372-1-iain@sandoe.co.uk/mbox/"},{"id":48067,"url":"https://patchwork.plctlab.org/api/1.2/patches/48067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9DsnRNVWIjdTzQu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-25T08:47:25","name":"store-merging: Disable string_concatenate mode if start or end aren'\''t byte aligned [PR108498]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9DsnRNVWIjdTzQu@tucnak/mbox/"},{"id":48091,"url":"https://patchwork.plctlab.org/api/1.2/patches/48091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125104351.F0CB433EE4@hamza.pair.com/","msgid":"<20230125104351.F0CB433EE4@hamza.pair.com>","list_archive_url":null,"date":"2023-01-25T10:43:46","name":"[pushed] doc/contrib.texi: Add Jose E. Marchesi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125104351.F0CB433EE4@hamza.pair.com/mbox/"},{"id":48111,"url":"https://patchwork.plctlab.org/api/1.2/patches/48111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125111201.D211233EEC@hamza.pair.com/","msgid":"<20230125111201.D211233EEC@hamza.pair.com>","list_archive_url":null,"date":"2023-01-25T11:11:59","name":"[pushed] wwwdocs: gcc-6: Switch www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125111201.D211233EEC@hamza.pair.com/mbox/"},{"id":48114,"url":"https://patchwork.plctlab.org/api/1.2/patches/48114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycuony7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T11:25:52","name":"[pushed] aarch64: Update sizeless tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycuony7.fsf@arm.com/mbox/"},{"id":48115,"url":"https://patchwork.plctlab.org/api/1.2/patches/48115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga6n9ce.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T11:26:41","name":"[pushed] aarch64: Restore generation of SVE UQDEC instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga6n9ce.fsf@arm.com/mbox/"},{"id":48141,"url":"https://patchwork.plctlab.org/api/1.2/patches/48141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123032.23F333858D39@sourceware.org/","msgid":"<20230125123032.23F333858D39@sourceware.org>","list_archive_url":null,"date":"2023-01-25T12:29:47","name":"Fixup LTO internal docs for option processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123032.23F333858D39@sourceware.org/mbox/"},{"id":48145,"url":"https://patchwork.plctlab.org/api/1.2/patches/48145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123749.A89F03858438@sourceware.org/","msgid":"<20230125123749.A89F03858438@sourceware.org>","list_archive_url":null,"date":"2023-01-25T12:37:04","name":"tree-optimization/108523 - fix endless iteration in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123749.A89F03858438@sourceware.org/mbox/"},{"id":48177,"url":"https://patchwork.plctlab.org/api/1.2/patches/48177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a07aa9bd-b07c-8c6d-29a8-1b3475639124@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T14:47:18","name":"[v2] OpenMP/Fortran: Partially fix non-rect loop nests [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a07aa9bd-b07c-8c6d-29a8-1b3475639124@codesourcery.com/mbox/"},{"id":48241,"url":"https://patchwork.plctlab.org/api/1.2/patches/48241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0780922f-99b5-96fc-b921-9e00652f9741@redhat.com/","msgid":"<0780922f-99b5-96fc-b921-9e00652f9741@redhat.com>","list_archive_url":null,"date":"2023-01-25T18:05:09","name":"PR tree-optimization/108447 - Do not try to logical fold floating point relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0780922f-99b5-96fc-b921-9e00652f9741@redhat.com/mbox/"},{"id":48255,"url":"https://patchwork.plctlab.org/api/1.2/patches/48255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdbcafee-35e2-7074-0207-d93cfa8b7db0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T18:38:47","name":"minor optimization bug in basic_string move assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdbcafee-35e2-7074-0207-d93cfa8b7db0@gmail.com/mbox/"},{"id":48289,"url":"https://patchwork.plctlab.org/api/1.2/patches/48289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-e58ca35d-9f14-4c23-a70e-c307739ee6ed-1674676416042@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-25T19:53:36","name":"[committed] Fortran: ICE in gfc_compare_array_spec [PR108528]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-e58ca35d-9f14-4c23-a70e-c307739ee6ed-1674676416042@3c-app-gmx-bs46/mbox/"},{"id":48306,"url":"https://patchwork.plctlab.org/api/1.2/patches/48306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125201643.506666-1-ppalka@redhat.com/","msgid":"<20230125201643.506666-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-25T20:16:43","name":"c++ modules: uninstantiated template friend class [PR104234]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125201643.506666-1-ppalka@redhat.com/mbox/"},{"id":48343,"url":"https://patchwork.plctlab.org/api/1.2/patches/48343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-2-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:32","name":"[v5,1/5] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-2-ben.boeckel@kitware.com/mbox/"},{"id":48344,"url":"https://patchwork.plctlab.org/api/1.2/patches/48344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-4-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:34","name":"[v5,3/5] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-4-ben.boeckel@kitware.com/mbox/"},{"id":48346,"url":"https://patchwork.plctlab.org/api/1.2/patches/48346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-5-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:35","name":"[v5,4/5] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-5-ben.boeckel@kitware.com/mbox/"},{"id":48358,"url":"https://patchwork.plctlab.org/api/1.2/patches/48358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-6-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-6-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:36","name":"[v5,5/5] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-6-ben.boeckel@kitware.com/mbox/"},{"id":48396,"url":"https://patchwork.plctlab.org/api/1.2/patches/48396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5e4b248f-79f4-46ea-aafa-9a6a12d90f2f-1674683962284@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-25T21:59:22","name":"Fortran: fix ICE in check_host_association [PR108544]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5e4b248f-79f4-46ea-aafa-9a6a12d90f2f-1674683962284@3c-app-gmx-bs46/mbox/"},{"id":48410,"url":"https://patchwork.plctlab.org/api/1.2/patches/48410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125232545.312399-1-polacek@redhat.com/","msgid":"<20230125232545.312399-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-25T23:25:45","name":"opts: SANITIZE_ADDRESS wrongly cleared [PR108543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125232545.312399-1-polacek@redhat.com/mbox/"},{"id":48480,"url":"https://patchwork.plctlab.org/api/1.2/patches/48480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126033210.1926726-1-siddhesh@gotplt.org/","msgid":"<20230126033210.1926726-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-01-26T03:32:10","name":"tree-optimization/108522 Use component_ref_field_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126033210.1926726-1-siddhesh@gotplt.org/mbox/"},{"id":48507,"url":"https://patchwork.plctlab.org/api/1.2/patches/48507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126073917.DE68F1358A@imap2.suse-dmz.suse.de/","msgid":"<20230126073917.DE68F1358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-26T07:39:17","name":"tree-optimization/108523 - testcase for the bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126073917.DE68F1358A@imap2.suse-dmz.suse.de/mbox/"},{"id":48538,"url":"https://patchwork.plctlab.org/api/1.2/patches/48538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JM8j9QbkSLMs68@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T09:50:42","name":"[committed] openmp, c++: Workaround fold_for_warn ICE on invalid OpenMP collapsed loops [PR108503]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JM8j9QbkSLMs68@tucnak/mbox/"},{"id":48560,"url":"https://patchwork.plctlab.org/api/1.2/patches/48560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JUvA7+lqVDt6WR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T10:23:56","name":"value-relation: Small tweaks to tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JUvA7+lqVDt6WR@tucnak/mbox/"},{"id":48599,"url":"https://patchwork.plctlab.org/api/1.2/patches/48599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com/","msgid":"<2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com>","list_archive_url":null,"date":"2023-01-26T11:29:29","name":"[pushed] doc: Refer to projects as GCC and GDB (was: [PATCH] sourcebuild.texi: Document new toplevel directories [PR82383])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com/mbox/"},{"id":48609,"url":"https://patchwork.plctlab.org/api/1.2/patches/48609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126124904.81D8013A09@imap2.suse-dmz.suse.de/","msgid":"<20230126124904.81D8013A09@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-26T12:49:04","name":"tree-optimization/108547 - robustify uninit predicate analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126124904.81D8013A09@imap2.suse-dmz.suse.de/mbox/"},{"id":48631,"url":"https://patchwork.plctlab.org/api/1.2/patches/48631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126131549.4785633EA6@hamza.pair.com/","msgid":"<20230126131549.4785633EA6@hamza.pair.com>","list_archive_url":null,"date":"2023-01-26T13:15:47","name":"[pushed] libstdc++: Move www.open-std.org to https in bugs manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126131549.4785633EA6@hamza.pair.com/mbox/"},{"id":48649,"url":"https://patchwork.plctlab.org/api/1.2/patches/48649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133901.1428898-1-jwakely@redhat.com/","msgid":"<20230126133901.1428898-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:39:01","name":"[committed] libstdc++: Fix strings read from /etc/sysconfig/clock [PR108530]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133901.1428898-1-jwakely@redhat.com/mbox/"},{"id":48651,"url":"https://patchwork.plctlab.org/api/1.2/patches/48651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133949.1428954-1-jwakely@redhat.com/","msgid":"<20230126133949.1428954-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:39:49","name":"[committed] libstdc++: Add returns_nonnull to non-inline std::map detail [PR108554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133949.1428954-1-jwakely@redhat.com/mbox/"},{"id":48662,"url":"https://patchwork.plctlab.org/api/1.2/patches/48662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126135046.1441243-1-jwakely@redhat.com/","msgid":"<20230126135046.1441243-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:50:46","name":"[committed] libstdc++: Add workaround for old tzdata.zi files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126135046.1441243-1-jwakely@redhat.com/mbox/"},{"id":48702,"url":"https://patchwork.plctlab.org/api/1.2/patches/48702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142032.500073-1-dmalcolm@redhat.com/","msgid":"<20230126142032.500073-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-26T14:20:32","name":"[committed] analyzer: fix false positives from -Wanalyzer-infinite-recursion [PR108524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142032.500073-1-dmalcolm@redhat.com/mbox/"},{"id":48703,"url":"https://patchwork.plctlab.org/api/1.2/patches/48703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142045.500121-1-dmalcolm@redhat.com/","msgid":"<20230126142045.500121-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-26T14:20:45","name":"[committed] analyzer: fix SARD-tc841-basic-00182-min.c test case [PR108507]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142045.500121-1-dmalcolm@redhat.com/mbox/"},{"id":48768,"url":"https://patchwork.plctlab.org/api/1.2/patches/48768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsffxmhbj.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:44:16","name":"vect/aarch64: Fix various sve/cond*.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsffxmhbj.fsf@arm.com/mbox/"},{"id":48771,"url":"https://patchwork.plctlab.org/api/1.2/patches/48771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk019mgyt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:51:54","name":"[1/4] aarch64: Remove slp_13.c XFAILs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk019mgyt.fsf@arm.com/mbox/"},{"id":48772,"url":"https://patchwork.plctlab.org/api/1.2/patches/48772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz71mgxz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:52:24","name":"[pushed] aarch64: Suppress warnings in pr99766.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz71mgxz.fsf@arm.com/mbox/"},{"id":48774,"url":"https://patchwork.plctlab.org/api/1.2/patches/48774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rhpmgx7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:52:52","name":"[pushed] Update guality XFAILs for aarch64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rhpmgx7.fsf@arm.com/mbox/"},{"id":48773,"url":"https://patchwork.plctlab.org/api/1.2/patches/48773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt357xmgwi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:53:17","name":"[pushed] aarch64: Remove expected error for compound literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt357xmgwi.fsf@arm.com/mbox/"},{"id":48776,"url":"https://patchwork.plctlab.org/api/1.2/patches/48776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KjbJA8HZs3nLNX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:59:40","name":"tree: Fix up tree_code_{length,type}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KjbJA8HZs3nLNX@tucnak/mbox/"},{"id":48781,"url":"https://patchwork.plctlab.org/api/1.2/patches/48781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ktl1w3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:02:52","name":"testsuite: Fix hwasan/arguments-3.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ktl1w3.fsf@arm.com/mbox/"},{"id":48789,"url":"https://patchwork.plctlab.org/api/1.2/patches/48789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KqmIR9OWrM+pVh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:30:16","name":"[committed] frange: Fix up foperator_{,not_}equal::fold_range for signed zeros [PR108540]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KqmIR9OWrM+pVh@tucnak/mbox/"},{"id":48792,"url":"https://patchwork.plctlab.org/api/1.2/patches/48792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126163257.13458-1-iain@sandoe.co.uk/","msgid":"<20230126163257.13458-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-26T16:32:57","name":"[pushed] Modula-2: Remove debug code [PR108553].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126163257.13458-1-iain@sandoe.co.uk/mbox/"},{"id":48800,"url":"https://patchwork.plctlab.org/api/1.2/patches/48800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmedrhtfl7.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:39:48","name":"riscv: Enable -fasynchronous_unwind_tables by default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmedrhtfl7.fsf@suse.de/mbox/"},{"id":48804,"url":"https://patchwork.plctlab.org/api/1.2/patches/48804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Ks/THdiuq70HW3@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:40:29","name":"[v2] opts: SANITIZE_ADDRESS wrongly cleared [PR108543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Ks/THdiuq70HW3@redhat.com/mbox/"},{"id":48845,"url":"https://patchwork.plctlab.org/api/1.2/patches/48845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183824.285183-1-dimitar@dinux.eu/","msgid":"<20230126183824.285183-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-26T18:38:24","name":"[GCC-12,committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183824.285183-1-dimitar@dinux.eu/mbox/"},{"id":48846,"url":"https://patchwork.plctlab.org/api/1.2/patches/48846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183902.285310-1-dimitar@dinux.eu/","msgid":"<20230126183902.285310-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-26T18:39:02","name":"[GCC-11,committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183902.285310-1-dimitar@dinux.eu/mbox/"},{"id":48862,"url":"https://patchwork.plctlab.org/api/1.2/patches/48862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126191811.48240-1-kito.cheng@sifive.com/","msgid":"<20230126191811.48240-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-01-26T19:18:11","name":"[committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126191811.48240-1-kito.cheng@sifive.com/mbox/"},{"id":48879,"url":"https://patchwork.plctlab.org/api/1.2/patches/48879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126202745.49379-1-iain@sandoe.co.uk/","msgid":"<20230126202745.49379-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-26T20:27:45","name":"Modula-2: Add claimed command line options to lang.opt [PR108555].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126202745.49379-1-iain@sandoe.co.uk/mbox/"},{"id":48927,"url":"https://patchwork.plctlab.org/api/1.2/patches/48927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126221732.617749-1-polacek@redhat.com/","msgid":"<20230126221732.617749-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-26T22:17:32","name":"c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126221732.617749-1-polacek@redhat.com/mbox/"},{"id":48958,"url":"https://patchwork.plctlab.org/api/1.2/patches/48958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126232919.E8F6F33E50@hamza.pair.com/","msgid":"<20230126232919.E8F6F33E50@hamza.pair.com>","list_archive_url":null,"date":"2023-01-26T23:29:18","name":"[pushed] wwwdocs: git: Tweak link to TR29124 C++ reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126232919.E8F6F33E50@hamza.pair.com/mbox/"},{"id":48992,"url":"https://patchwork.plctlab.org/api/1.2/patches/48992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127001617.CE64D33E9E@hamza.pair.com/","msgid":"<20230127001617.CE64D33E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:16:15","name":"[pushed] wwwdocs: codingconventions: Update upstream instructions for libstdc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127001617.CE64D33E9E@hamza.pair.com/mbox/"},{"id":48998,"url":"https://patchwork.plctlab.org/api/1.2/patches/48998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14d1bcfece7c54a22811291496b8b7cd9d438ae.1674777149.git.arsen@aarsen.me/","msgid":"","list_archive_url":null,"date":"2023-01-27T00:18:29","name":"[1/7] docs: Create Indices appendix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14d1bcfece7c54a22811291496b8b7cd9d438ae.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49003,"url":"https://patchwork.plctlab.org/api/1.2/patches/49003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me/","msgid":"<8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:31","name":"[3/7] **/*.texi: Reorder index entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49002,"url":"https://patchwork.plctlab.org/api/1.2/patches/49002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me/","msgid":"<5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:32","name":"[4/7] docs: Mechanically reorder item/index combos in extend.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49001,"url":"https://patchwork.plctlab.org/api/1.2/patches/49001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me/","msgid":"<2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:33","name":"[5/7] doc: Add @defbuiltin family of helpers, set documentlanguage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49000,"url":"https://patchwork.plctlab.org/api/1.2/patches/49000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me/","msgid":"<17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:35","name":"[7/7] update_web_docs_git: Update CSS reference to new manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49004,"url":"https://patchwork.plctlab.org/api/1.2/patches/49004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127003224.717347-1-arsen@aarsen.me/","msgid":"<20230127003224.717347-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:36","name":"[wwwdocs] Add revised Texinfo manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127003224.717347-1-arsen@aarsen.me/mbox/"},{"id":48993,"url":"https://patchwork.plctlab.org/api/1.2/patches/48993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002025.F269733E9E@hamza.pair.com/","msgid":"<20230127002025.F269733E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:20:24","name":"[pushed] wwwdocs: codingconventions: Update a link to Github docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002025.F269733E9E@hamza.pair.com/mbox/"},{"id":48994,"url":"https://patchwork.plctlab.org/api/1.2/patches/48994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002338.3871F33E4D@hamza.pair.com/","msgid":"<20230127002338.3871F33E4D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:23:36","name":"[pushed] wwwdocs: gcc-3.4: Update a link to use https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002338.3871F33E4D@hamza.pair.com/mbox/"},{"id":48995,"url":"https://patchwork.plctlab.org/api/1.2/patches/48995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002650.8AF7333E9E@hamza.pair.com/","msgid":"<20230127002650.8AF7333E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:26:48","name":"[pushed] wwwdocs: readings: Update Modula 3 link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002650.8AF7333E9E@hamza.pair.com/mbox/"},{"id":49039,"url":"https://patchwork.plctlab.org/api/1.2/patches/49039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzga47ndl.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-27T01:54:46","name":"[FYI,docs] note that -g opts are implicitly negatable too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzga47ndl.fsf@lxoliva.fsfla.org/mbox/"},{"id":49057,"url":"https://patchwork.plctlab.org/api/1.2/patches/49057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp/","msgid":"<23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-27T03:17:33","name":"[v6] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp/mbox/"},{"id":49116,"url":"https://patchwork.plctlab.org/api/1.2/patches/49116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9397df3-a72f-b9e6-b16c-8e3589c3cf09@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T08:24:18","name":"[committed] gomp/declare-variant-1*.f90: Update for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9397df3-a72f-b9e6-b16c-8e3589c3cf09@codesourcery.com/mbox/"},{"id":49117,"url":"https://patchwork.plctlab.org/api/1.2/patches/49117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OTCEBcvrMQeQqy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:02:00","name":"cgraph: Adjust verify_corresponds_to_fndecl [PR106061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OTCEBcvrMQeQqy@tucnak/mbox/"},{"id":49118,"url":"https://patchwork.plctlab.org/api/1.2/patches/49118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OUvmVFcSU5Eaix@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:09:18","name":"doc: Fix up return type of __builtin_va_arg_pack_len [PR108560]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OUvmVFcSU5Eaix@tucnak/mbox/"},{"id":49122,"url":"https://patchwork.plctlab.org/api/1.2/patches/49122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb57f55b-3b84-c853-3bab-731c5c6608c2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:19:42","name":"OpenMP/Fortran: Fix has_device_addr clause splitting [PR108558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb57f55b-3b84-c853-3bab-731c5c6608c2@codesourcery.com/mbox/"},{"id":49130,"url":"https://patchwork.plctlab.org/api/1.2/patches/49130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OZibQSy8DYxwbd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:29:45","name":"libstdc++: Fix up FAIL in 17_intro/names.cc on glibc < 2.19 [PR108568]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OZibQSy8DYxwbd@tucnak/mbox/"},{"id":49169,"url":"https://patchwork.plctlab.org/api/1.2/patches/49169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16839-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T10:36:17","name":"AArch64: Fix native detection in the presence of mandatory features which don'\''t have midr values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16839-tamar@arm.com/mbox/"},{"id":49171,"url":"https://patchwork.plctlab.org/api/1.2/patches/49171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16829-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T10:39:25","name":"AArch64: Fix codegen regressions around tbz.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16829-tamar@arm.com/mbox/"},{"id":49187,"url":"https://patchwork.plctlab.org/api/1.2/patches/49187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmb0kzir.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T11:06:20","name":"[1/2] Add support for conditional xorsign [PR96373]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmb0kzir.fsf@arm.com/mbox/"},{"id":49191,"url":"https://patchwork.plctlab.org/api/1.2/patches/49191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk018kzex.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T11:08:38","name":"[2/2] vect: Make partial trapping ops use predication [PR96373]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk018kzex.fsf@arm.com/mbox/"},{"id":49308,"url":"https://patchwork.plctlab.org/api/1.2/patches/49308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127114627.243812-1-xry111@xry111.site/","msgid":"<20230127114627.243812-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-01-27T11:46:27","name":"testsuite: Use noipa and noinline attributes for pr95115 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127114627.243812-1-xry111@xry111.site/mbox/"},{"id":49348,"url":"https://patchwork.plctlab.org/api/1.2/patches/49348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127123020.260769-1-juzhe.zhong@rivai.ai/","msgid":"<20230127123020.260769-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T12:30:20","name":"RISC-V: Fix testcases check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127123020.260769-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49408,"url":"https://patchwork.plctlab.org/api/1.2/patches/49408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz/","msgid":"<44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz>","list_archive_url":null,"date":"2023-01-27T13:59:43","name":"driver: fix -gz=none error message with missing zstd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz/mbox/"},{"id":49451,"url":"https://patchwork.plctlab.org/api/1.2/patches/49451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127144311.2188730-1-andrea.corallo@arm.com/","msgid":"<20230127144311.2188730-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-27T14:43:11","name":"arm: Implement arm Function target attribute '\''branch-protection'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127144311.2188730-1-andrea.corallo@arm.com/mbox/"},{"id":49462,"url":"https://patchwork.plctlab.org/api/1.2/patches/49462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154429.1599859-1-jwakely@redhat.com/","msgid":"<20230127154429.1599859-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-27T15:44:29","name":"[committed] libstdc++: Use dg-bogus in new test [PR108554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154429.1599859-1-jwakely@redhat.com/mbox/"},{"id":49463,"url":"https://patchwork.plctlab.org/api/1.2/patches/49463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154529.1601707-1-jwakely@redhat.com/","msgid":"<20230127154529.1601707-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-27T15:45:29","name":"[committed] libstdc++: Use constant for name of tzdata file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154529.1601707-1-jwakely@redhat.com/mbox/"},{"id":49534,"url":"https://patchwork.plctlab.org/api/1.2/patches/49534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycrkiv5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:06:06","name":"[pushed] aarch64: Prevent simd tests from being optimised away","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycrkiv5.fsf@arm.com/mbox/"},{"id":49539,"url":"https://patchwork.plctlab.org/api/1.2/patches/49539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga3j49h.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:06:50","name":"[pushed] testsuite: Two adjustments to gcc.dg/vect/complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga3j49h.fsf@arm.com/mbox/"},{"id":49551,"url":"https://patchwork.plctlab.org/api/1.2/patches/49551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6ca16d1-28d9-463e-bbed-ce6dfad7a887@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:44:59","name":"[GCC] arm: Optimize arm-mlib.h header inclusion (pr108505).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6ca16d1-28d9-463e-bbed-ce6dfad7a887@AZ-NEU-EX04.Arm.com/mbox/"},{"id":49700,"url":"https://patchwork.plctlab.org/api/1.2/patches/49700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8df3e-bf4f-804b-2e47-6430848d1e81@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T21:39:59","name":"[committed] c: Disallow braces around C2x auto initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8df3e-bf4f-804b-2e47-6430848d1e81@codesourcery.com/mbox/"},{"id":49703,"url":"https://patchwork.plctlab.org/api/1.2/patches/49703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-1-ppalka@redhat.com/","msgid":"<20230127220250.1896137-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-27T22:02:49","name":"[1/2] c++: make manifestly_const_eval tri-state","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-1-ppalka@redhat.com/mbox/"},{"id":49702,"url":"https://patchwork.plctlab.org/api/1.2/patches/49702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-2-ppalka@redhat.com/","msgid":"<20230127220250.1896137-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-27T22:02:50","name":"[2/2] c++: speculative constexpr and is_constant_evaluated [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-2-ppalka@redhat.com/mbox/"},{"id":49716,"url":"https://patchwork.plctlab.org/api/1.2/patches/49716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127225714.261700-1-juzhe.zhong@rivai.ai/","msgid":"<20230127225714.261700-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T22:57:14","name":"RISC-V: Remove redundant attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127225714.261700-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49719,"url":"https://patchwork.plctlab.org/api/1.2/patches/49719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Rb2eRAm/kUbWyZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T23:18:49","name":"sched-deps, cselib: Fix up some -fcompare-debug issues and regressions [PR108463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Rb2eRAm/kUbWyZ@tucnak/mbox/"},{"id":49720,"url":"https://patchwork.plctlab.org/api/1.2/patches/49720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232608.276006-1-juzhe.zhong@rivai.ai/","msgid":"<20230127232608.276006-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T23:26:08","name":"RISC-V: Add vlse/vsse intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232608.276006-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49721,"url":"https://patchwork.plctlab.org/api/1.2/patches/49721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232757.276372-1-juzhe.zhong@rivai.ai/","msgid":"<20230127232757.276372-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T23:27:57","name":"RISC-V: Add vlse/vsse C/C++ intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232757.276372-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49763,"url":"https://patchwork.plctlab.org/api/1.2/patches/49763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com/","msgid":"<79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com>","list_archive_url":null,"date":"2023-01-28T01:04:44","name":"[1/3] Properly set GORI relation trios.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com/mbox/"},{"id":49764,"url":"https://patchwork.plctlab.org/api/1.2/patches/49764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe85adad-8778-8cac-0d75-5440bb15049d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-28T01:04:50","name":"[2/3] PR tree-optimization/108359","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe85adad-8778-8cac-0d75-5440bb15049d@redhat.com/mbox/"},{"id":49765,"url":"https://patchwork.plctlab.org/api/1.2/patches/49765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128012455.7414833E86@hamza.pair.com/","msgid":"<20230128012455.7414833E86@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T01:24:53","name":"[pushed] wwwdocs: codingconventions: Replace markup by ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128012455.7414833E86@hamza.pair.com/mbox/"},{"id":49767,"url":"https://patchwork.plctlab.org/api/1.2/patches/49767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128015215.399F033E86@hamza.pair.com/","msgid":"<20230128015215.399F033E86@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T01:52:13","name":"[pushed] wwwdocs: mirrors: Switch ftp.fu-berlin.de from ftp to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128015215.399F033E86@hamza.pair.com/mbox/"},{"id":49835,"url":"https://patchwork.plctlab.org/api/1.2/patches/49835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128101512.9238F33E84@hamza.pair.com/","msgid":"<20230128101512.9238F33E84@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:15:10","name":"[pushed] libstdc++: Switch www.open-std.org to https (ABI manual)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128101512.9238F33E84@hamza.pair.com/mbox/"},{"id":49836,"url":"https://patchwork.plctlab.org/api/1.2/patches/49836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128102441.CA8B533E74@hamza.pair.com/","msgid":"<20230128102441.CA8B533E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:24:39","name":"[pushed] doc: Update Go1 link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128102441.CA8B533E74@hamza.pair.com/mbox/"},{"id":49838,"url":"https://patchwork.plctlab.org/api/1.2/patches/49838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128103814.D29DF33E74@hamza.pair.com/","msgid":"<20230128103814.D29DF33E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:38:12","name":"[pushed] doc: Update reference to AddressSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128103814.D29DF33E74@hamza.pair.com/mbox/"},{"id":49843,"url":"https://patchwork.plctlab.org/api/1.2/patches/49843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128105141.6217333E74@hamza.pair.com/","msgid":"<20230128105141.6217333E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:51:39","name":"[pushed] libstdc++: Move sourceforge.net links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128105141.6217333E74@hamza.pair.com/mbox/"},{"id":49846,"url":"https://patchwork.plctlab.org/api/1.2/patches/49846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128111449.81D0833E77@hamza.pair.com/","msgid":"<20230128111449.81D0833E77@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T11:14:47","name":"[pushed,C++] wwwdocs: faq: Remove \"Copy constructor access check\" entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128111449.81D0833E77@hamza.pair.com/mbox/"},{"id":49855,"url":"https://patchwork.plctlab.org/api/1.2/patches/49855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132131.D9DCC33E8C@hamza.pair.com/","msgid":"<20230128132131.D9DCC33E8C@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T13:21:30","name":"[pushed] wwwdocs: bugs: Adjust link to ISO C++ standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132131.D9DCC33E8C@hamza.pair.com/mbox/"},{"id":49856,"url":"https://patchwork.plctlab.org/api/1.2/patches/49856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132353.77631-1-iain@sandoe.co.uk/","msgid":"<20230128132353.77631-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-28T13:23:53","name":"[pushed] Modula-2: Claim Wreturn-type in lang.opt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132353.77631-1-iain@sandoe.co.uk/mbox/"},{"id":49873,"url":"https://patchwork.plctlab.org/api/1.2/patches/49873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-26885791-f651-4f0a-a2c7-0c03ca90b149-1674925670220@3c-app-gmx-bs11/","msgid":"","list_archive_url":null,"date":"2023-01-28T17:07:50","name":"Fortran: diagnose USE associated symbols in COMMON blocks [PR108453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-26885791-f651-4f0a-a2c7-0c03ca90b149-1674925670220@3c-app-gmx-bs11/mbox/"},{"id":49875,"url":"https://patchwork.plctlab.org/api/1.2/patches/49875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24646027-deae-ef6b-4b96-1de0776938a9@gmail.com/","msgid":"<24646027-deae-ef6b-4b96-1de0776938a9@gmail.com>","list_archive_url":null,"date":"2023-01-28T17:31:35","name":"Fix excess warnings for mingw-w64 (LLP64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24646027-deae-ef6b-4b96-1de0776938a9@gmail.com/mbox/"},{"id":49895,"url":"https://patchwork.plctlab.org/api/1.2/patches/49895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab676a99-e22c-08fa-787a-4b7586a2bd60@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-28T18:16:40","name":"pr65658.c: fix excess warnings on LLP64 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab676a99-e22c-08fa-787a-4b7586a2bd60@gmail.com/mbox/"},{"id":49897,"url":"https://patchwork.plctlab.org/api/1.2/patches/49897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128182729.A560D33E6B@hamza.pair.com/","msgid":"<20230128182729.A560D33E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T18:27:27","name":"[pushed] doc: Update link to Objective-C book","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128182729.A560D33E6B@hamza.pair.com/mbox/"},{"id":49907,"url":"https://patchwork.plctlab.org/api/1.2/patches/49907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128203621.28B6A33E60@hamza.pair.com/","msgid":"<20230128203621.28B6A33E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T20:36:19","name":"[pushed] wwwdocs: cxx-status: Fix link to GCC 10 release notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128203621.28B6A33E60@hamza.pair.com/mbox/"},{"id":49911,"url":"https://patchwork.plctlab.org/api/1.2/patches/49911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215623.9C2F433E60@hamza.pair.com/","msgid":"<20230128215623.9C2F433E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T21:56:21","name":"[v2,pushed] wwwdocs: projects/gomp: Editorial changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215623.9C2F433E60@hamza.pair.com/mbox/"},{"id":49912,"url":"https://patchwork.plctlab.org/api/1.2/patches/49912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215850.6D1B233E60@hamza.pair.com/","msgid":"<20230128215850.6D1B233E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T21:58:48","name":"[pushed] wwwdocs: gcc-11: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215850.6D1B233E60@hamza.pair.com/mbox/"},{"id":49913,"url":"https://patchwork.plctlab.org/api/1.2/patches/49913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128221210.B246733E4B@hamza.pair.com/","msgid":"<20230128221210.B246733E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T22:12:08","name":"[pushed] libstdc++: Update links in the \"Contributing\" manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128221210.B246733E4B@hamza.pair.com/mbox/"},{"id":49914,"url":"https://patchwork.plctlab.org/api/1.2/patches/49914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222056.D868833E4D@hamza.pair.com/","msgid":"<20230128222056.D868833E4D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T22:20:55","name":"[pushed] doc: Update link to the AVR-Libc manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222056.D868833E4D@hamza.pair.com/mbox/"},{"id":49915,"url":"https://patchwork.plctlab.org/api/1.2/patches/49915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222425.1185711-1-apinski@marvell.com/","msgid":"<20230128222425.1185711-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-01-28T22:24:25","name":"Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222425.1185711-1-apinski@marvell.com/mbox/"},{"id":49916,"url":"https://patchwork.plctlab.org/api/1.2/patches/49916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128231214.1257560-1-philipp.tomsich@vrull.eu/","msgid":"<20230128231214.1257560-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-01-28T23:12:14","name":"aarch64: Update Ampere-1A (-mcpu=ampere1a) to include SM4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128231214.1257560-1-philipp.tomsich@vrull.eu/mbox/"},{"id":49918,"url":"https://patchwork.plctlab.org/api/1.2/patches/49918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012041.930809-1-hongtao.liu@intel.com/","msgid":"<20230129012041.930809-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-01-29T01:20:41","name":"Change AVX512FP16 to AVX512-FP16 in the document.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012041.930809-1-hongtao.liu@intel.com/mbox/"},{"id":49919,"url":"https://patchwork.plctlab.org/api/1.2/patches/49919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012352.930881-1-hongtao.liu@intel.com/","msgid":"<20230129012352.930881-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-01-29T01:23:52","name":"Change AVX512FP16 to AVX512-FP16 which is official name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012352.930881-1-hongtao.liu@intel.com/mbox/"},{"id":49940,"url":"https://patchwork.plctlab.org/api/1.2/patches/49940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com/","msgid":"<56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com>","list_archive_url":null,"date":"2023-01-29T04:17:30","name":"[fortran] PR103506 [10/11/12/13 Regression] ICE in gfc_free_namespace, at fortran/symbol.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com/mbox/"},{"id":49959,"url":"https://patchwork.plctlab.org/api/1.2/patches/49959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129113451.24516-1-iain@sandoe.co.uk/","msgid":"<20230129113451.24516-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-29T11:34:51","name":"driver, toplevel: Avoid emitting the version information twice.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129113451.24516-1-iain@sandoe.co.uk/mbox/"},{"id":49979,"url":"https://patchwork.plctlab.org/api/1.2/patches/49979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129141909.37927-1-lehua.ding@rivai.ai/","msgid":"<20230129141909.37927-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-29T14:19:09","name":"[V2,1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129141909.37927-1-lehua.ding@rivai.ai/mbox/"},{"id":50005,"url":"https://patchwork.plctlab.org/api/1.2/patches/50005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153233.219454-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153233.219454-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:32:33","name":"RISC-V: Add indexed loads/stores C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153233.219454-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50006,"url":"https://patchwork.plctlab.org/api/1.2/patches/50006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153457.220337-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153457.220337-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:34:57","name":"RISC-V: Add VSETVL testcases for indexed loads/stores.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153457.220337-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50007,"url":"https://patchwork.plctlab.org/api/1.2/patches/50007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153721.220810-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153721.220810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:37:21","name":"RISC-V: Add indexed loads/stores constraints testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153721.220810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50012,"url":"https://patchwork.plctlab.org/api/1.2/patches/50012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154424.222326-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154424.222326-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:44:24","name":"RISC-V: Add vloxei8 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154424.222326-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50013,"url":"https://patchwork.plctlab.org/api/1.2/patches/50013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154654.222798-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154654.222798-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:46:54","name":"RISC-V: Add vloxei16 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154654.222798-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50014,"url":"https://patchwork.plctlab.org/api/1.2/patches/50014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154846.223253-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154846.223253-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:48:46","name":"RISC-V: Add vloxei32 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154846.223253-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50015,"url":"https://patchwork.plctlab.org/api/1.2/patches/50015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155034.223826-1-juzhe.zhong@rivai.ai/","msgid":"<20230129155034.223826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:50:34","name":"RISC-V: Add vloxei64 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155034.223826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50016,"url":"https://patchwork.plctlab.org/api/1.2/patches/50016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155235.224444-1-juzhe.zhong@rivai.ai/","msgid":"<20230129155235.224444-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:52:35","name":"RISC-V: Add vluxei8 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155235.224444-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50021,"url":"https://patchwork.plctlab.org/api/1.2/patches/50021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr/","msgid":"<673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr>","list_archive_url":null,"date":"2023-01-29T16:21:36","name":"fortran: Explicitly set name for *LOC default BACK argument [PR108450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr/mbox/"},{"id":50046,"url":"https://patchwork.plctlab.org/api/1.2/patches/50046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129225639.88642-1-juzhe.zhong@rivai.ai/","msgid":"<20230129225639.88642-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T22:56:39","name":"RISC-V: Add vluxei16 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129225639.88642-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50047,"url":"https://patchwork.plctlab.org/api/1.2/patches/50047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230632.89482-1-juzhe.zhong@rivai.ai/","msgid":"<20230129230632.89482-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:06:32","name":"RISC-V: Add vluxei32 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230632.89482-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50048,"url":"https://patchwork.plctlab.org/api/1.2/patches/50048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230830.89758-1-juzhe.zhong@rivai.ai/","msgid":"<20230129230830.89758-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:08:30","name":"RISC-V: Add vluxei64 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230830.89758-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50049,"url":"https://patchwork.plctlab.org/api/1.2/patches/50049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231140.90181-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231140.90181-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:11:40","name":"RISC-V: Add vsoxei8 && vsoxei16 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231140.90181-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50057,"url":"https://patchwork.plctlab.org/api/1.2/patches/50057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231444.90559-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231444.90559-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:14:44","name":"RISC-V: Add vsoxei32 && vsoxei64 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231444.90559-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50063,"url":"https://patchwork.plctlab.org/api/1.2/patches/50063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231658.90834-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231658.90834-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:16:58","name":"RISC-V: Add vsoxei C API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231658.90834-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50064,"url":"https://patchwork.plctlab.org/api/1.2/patches/50064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231834.91087-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231834.91087-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:18:34","name":"RISC-V: Add vsuxei C API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231834.91087-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50065,"url":"https://patchwork.plctlab.org/api/1.2/patches/50065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232401.91674-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232401.91674-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:24:01","name":"RISC-V: Add vsuxei* C++ API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232401.91674-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50066,"url":"https://patchwork.plctlab.org/api/1.2/patches/50066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232625.91957-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232625.91957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:26:25","name":"RISC-V: Add vluxei8 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232625.91957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50067,"url":"https://patchwork.plctlab.org/api/1.2/patches/50067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232833.92227-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232833.92227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:28:33","name":"RISC-V: Add vluxei16 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232833.92227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50068,"url":"https://patchwork.plctlab.org/api/1.2/patches/50068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233209.92641-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233209.92641-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:32:09","name":"RISC-V: Add vluxei32 C++ intrinsic API testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233209.92641-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50069,"url":"https://patchwork.plctlab.org/api/1.2/patches/50069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233349.92875-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233349.92875-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:33:49","name":"RISC-V: Add vluxei64 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233349.92875-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50070,"url":"https://patchwork.plctlab.org/api/1.2/patches/50070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233538.93138-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233538.93138-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:35:38","name":"RISC-V: Add vloxei8 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233538.93138-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50071,"url":"https://patchwork.plctlab.org/api/1.2/patches/50071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233739.93397-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233739.93397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:37:39","name":"RISC-V: Add vloxei16 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233739.93397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50072,"url":"https://patchwork.plctlab.org/api/1.2/patches/50072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233929.93656-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233929.93656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:39:29","name":"RISC-V: Add vloxei32 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233929.93656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50073,"url":"https://patchwork.plctlab.org/api/1.2/patches/50073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129234050.93897-1-juzhe.zhong@rivai.ai/","msgid":"<20230129234050.93897-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:40:50","name":"RISC-V: Add vloxei64 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129234050.93897-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50184,"url":"https://patchwork.plctlab.org/api/1.2/patches/50184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130083439.74B0E13A06@imap2.suse-dmz.suse.de/","msgid":"<20230130083439.74B0E13A06@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-30T08:34:39","name":"ipa/108511 - relax assert for undefined local statics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130083439.74B0E13A06@imap2.suse-dmz.suse.de/mbox/"},{"id":50203,"url":"https://patchwork.plctlab.org/api/1.2/patches/50203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130095038.3665C13444@imap2.suse-dmz.suse.de/","msgid":"<20230130095038.3665C13444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-30T09:50:37","name":"tree-optimization/108574 - wrong-code with PRE PHI node processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130095038.3665C13444@imap2.suse-dmz.suse.de/mbox/"},{"id":50280,"url":"https://patchwork.plctlab.org/api/1.2/patches/50280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7qgqhno.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-30T13:24:43","name":"[COMMITTED] testsuite: Restore TORTURE_OPTIONS in gm2/warnings/returntype/fail/warnings-returntype-fail.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7qgqhno.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":50362,"url":"https://patchwork.plctlab.org/api/1.2/patches/50362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9fpprBtBWo7+Hk+@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-30T16:00:38","name":"[v2] c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9fpprBtBWo7+Hk+@redhat.com/mbox/"},{"id":50438,"url":"https://patchwork.plctlab.org/api/1.2/patches/50438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130191038.2450035-1-ppalka@redhat.com/","msgid":"<20230130191038.2450035-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-30T19:10:38","name":"c++: excessive satisfaction in check_methods [PR108579]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130191038.2450035-1-ppalka@redhat.com/mbox/"},{"id":50440,"url":"https://patchwork.plctlab.org/api/1.2/patches/50440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com/","msgid":"<64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com>","list_archive_url":null,"date":"2023-01-30T19:46:33","name":"[3/3] tree-optimization/108385 - Add op2_range to pointer_plus.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com/mbox/"},{"id":50499,"url":"https://patchwork.plctlab.org/api/1.2/patches/50499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130213639.2585560-1-ppalka@redhat.com/","msgid":"<20230130213639.2585560-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-30T21:36:39","name":"c++: ICE on unviable/ambiguous constrained dtors [PR96745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130213639.2585560-1-ppalka@redhat.com/mbox/"},{"id":50519,"url":"https://patchwork.plctlab.org/api/1.2/patches/50519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130214846.C969933E8D@hamza.pair.com/","msgid":"<20230130214846.C969933E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-30T21:48:40","name":"[pushed] wwwdocs: gcc-4.7: Adjust link to \"Collecting User-Mode Dumps\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130214846.C969933E8D@hamza.pair.com/mbox/"},{"id":50520,"url":"https://patchwork.plctlab.org/api/1.2/patches/50520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb913976-46f3-7df4-bf40-1d3315b908de@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-01-30T21:52:00","name":"[wwwdocs] readings: Update AIX linker links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb913976-46f3-7df4-bf40-1d3315b908de@pfeifer.com/mbox/"},{"id":50521,"url":"https://patchwork.plctlab.org/api/1.2/patches/50521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc595eeb-4f3a-42c2-a0d5-c8454e324e38-1675115730988@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2023-01-30T21:55:31","name":"Fortran: prevent redundant integer division truncation warnings [PR108592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc595eeb-4f3a-42c2-a0d5-c8454e324e38-1675115730988@3c-app-gmx-bap49/mbox/"},{"id":50529,"url":"https://patchwork.plctlab.org/api/1.2/patches/50529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130222013.9CC5933E8E@hamza.pair.com/","msgid":"<20230130222013.9CC5933E8E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-30T22:20:11","name":"[pushed] libstdc++: Update links in the Memory section of the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130222013.9CC5933E8E@hamza.pair.com/mbox/"},{"id":50561,"url":"https://patchwork.plctlab.org/api/1.2/patches/50561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131001455.D4C6133E90@hamza.pair.com/","msgid":"<20230131001455.D4C6133E90@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T00:14:53","name":"[pushed] doc: Change fsf.org to www.fsf.org in URLs (GFDL)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131001455.D4C6133E90@hamza.pair.com/mbox/"},{"id":50562,"url":"https://patchwork.plctlab.org/api/1.2/patches/50562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131003904.E564133E84@hamza.pair.com/","msgid":"<20230131003904.E564133E84@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T00:39:02","name":"[pushed] wwwdocs: cxx-dr-status: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131003904.E564133E84@hamza.pair.com/mbox/"},{"id":50571,"url":"https://patchwork.plctlab.org/api/1.2/patches/50571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9h+TFZKRmLzfUWj@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T02:34:52","name":"[v3] c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9h+TFZKRmLzfUWj@redhat.com/mbox/"},{"id":50576,"url":"https://patchwork.plctlab.org/api/1.2/patches/50576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131023549.454983-1-polacek@redhat.com/","msgid":"<20230131023549.454983-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T02:35:49","name":"c++: wrong error with constexpr array and value-init [PR108158]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131023549.454983-1-polacek@redhat.com/mbox/"},{"id":50579,"url":"https://patchwork.plctlab.org/api/1.2/patches/50579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131033707.2597685-1-ppalka@redhat.com/","msgid":"<20230131033707.2597685-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-31T03:37:07","name":"don'\''t declare header-defined functions both static and inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131033707.2597685-1-ppalka@redhat.com/mbox/"},{"id":50584,"url":"https://patchwork.plctlab.org/api/1.2/patches/50584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131042547.111233-1-kito.cheng@sifive.com/","msgid":"<20230131042547.111233-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-01-31T04:25:47","name":"[committed] RISC-V: Simplify testcase condition for RVV tests [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131042547.111233-1-kito.cheng@sifive.com/mbox/"},{"id":50619,"url":"https://patchwork.plctlab.org/api/1.2/patches/50619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131061038.97059-1-cooper.qu@linux.alibaba.com/","msgid":"<20230131061038.97059-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-31T06:10:38","name":"testsuite: Fix pr108574-3.c failed in arch where sign defaults to unsigned.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131061038.97059-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":50673,"url":"https://patchwork.plctlab.org/api/1.2/patches/50673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jK8Bk6l6sxbuvC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:01:52","name":"i386: Fix up ix86_convert_const_wide_int_to_broadcast [PR108599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jK8Bk6l6sxbuvC@tucnak/mbox/"},{"id":50674,"url":"https://patchwork.plctlab.org/api/1.2/patches/50674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jMtem3lCSndTCo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:09:25","name":"i386: Fix up -Wuninitialized warnings in avx512erintrin.h [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jMtem3lCSndTCo@tucnak/mbox/"},{"id":50675,"url":"https://patchwork.plctlab.org/api/1.2/patches/50675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jOynMLnKFL6jTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:18:18","name":"bbpart: Fix up ICE on asm goto [PR108596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jOynMLnKFL6jTu@tucnak/mbox/"},{"id":50695,"url":"https://patchwork.plctlab.org/api/1.2/patches/50695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a78ada54-1a0a-8914-917a-57baa71eb877@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:41:26","name":"[2/2,v3] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a78ada54-1a0a-8914-917a-57baa71eb877@arm.com/mbox/"},{"id":50760,"url":"https://patchwork.plctlab.org/api/1.2/patches/50760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba811e9b-2586-379f-9dce-69d7661f95ea@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-31T09:36:06","name":"[(pushed)] libsanitizer: Regenerate configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba811e9b-2586-379f-9dce-69d7661f95ea@suse.cz/mbox/"},{"id":50777,"url":"https://patchwork.plctlab.org/api/1.2/patches/50777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-31T11:28:23","name":"For Modula-2 build-tree testing, also set up paths to compiler libraries (was: [PATCH] 17/19 modula2 front end: dejagnu expect library scripts)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":50786,"url":"https://patchwork.plctlab.org/api/1.2/patches/50786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131120631.299018-1-juzhe.zhong@rivai.ai/","msgid":"<20230131120631.299018-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:06:31","name":"RISC-V: Add integer binary vv C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131120631.299018-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50789,"url":"https://patchwork.plctlab.org/api/1.2/patches/50789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121206.301304-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121206.301304-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:12:06","name":"RISC-V: Add vxor.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121206.301304-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50790,"url":"https://patchwork.plctlab.org/api/1.2/patches/50790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121340.301935-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121340.301935-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:13:40","name":"RISC-V: Add vsub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121340.301935-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50791,"url":"https://patchwork.plctlab.org/api/1.2/patches/50791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121647.303063-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121647.303063-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:16:47","name":"RISC-V: Add srl.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121647.303063-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50792,"url":"https://patchwork.plctlab.org/api/1.2/patches/50792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121820.303684-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121820.303684-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:18:20","name":"RISC-V: Add vsra.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121820.303684-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50794,"url":"https://patchwork.plctlab.org/api/1.2/patches/50794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122023.304615-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122023.304615-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:20:23","name":"RISC-V: Add vsll.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122023.304615-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50795,"url":"https://patchwork.plctlab.org/api/1.2/patches/50795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122235.305444-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122235.305444-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:22:35","name":"RISC-V: Add vrem*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122235.305444-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50796,"url":"https://patchwork.plctlab.org/api/1.2/patches/50796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122519.306474-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122519.306474-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:25:19","name":"RISC-V: Add vor.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122519.306474-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50797,"url":"https://patchwork.plctlab.org/api/1.2/patches/50797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122709.307183-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122709.307183-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:27:09","name":"RISC-V: Add vmin*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122709.307183-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50798,"url":"https://patchwork.plctlab.org/api/1.2/patches/50798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122836.307772-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122836.307772-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:28:36","name":"RISC-V: Add vmax*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122836.307772-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50799,"url":"https://patchwork.plctlab.org/api/1.2/patches/50799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123006.308617-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123006.308617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:30:06","name":"RISC-V: Add vdiv*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123006.308617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50800,"url":"https://patchwork.plctlab.org/api/1.2/patches/50800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123411.310092-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123411.310092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:34:11","name":"RISC-V: Add vand.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123411.310092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50801,"url":"https://patchwork.plctlab.org/api/1.2/patches/50801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123743.311357-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123743.311357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:37:43","name":"RISC-V: Add vadd.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123743.311357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50802,"url":"https://patchwork.plctlab.org/api/1.2/patches/50802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123933.312078-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123933.312078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:39:33","name":"RISC-V: Add binop constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123933.312078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50804,"url":"https://patchwork.plctlab.org/api/1.2/patches/50804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124106.312795-1-juzhe.zhong@rivai.ai/","msgid":"<20230131124106.312795-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:41:06","name":"RISC-V: Add vadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124106.312795-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50809,"url":"https://patchwork.plctlab.org/api/1.2/patches/50809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124946.315892-1-juzhe.zhong@rivai.ai/","msgid":"<20230131124946.315892-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:49:46","name":"RISC-V: Add vxor.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124946.315892-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50810,"url":"https://patchwork.plctlab.org/api/1.2/patches/50810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125538.318073-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125538.318073-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:55:37","name":"RISC-V: Add vand.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125538.318073-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50811,"url":"https://patchwork.plctlab.org/api/1.2/patches/50811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125820.319080-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125820.319080-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:58:20","name":"RISC-V: Add vsrl.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125820.319080-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50812,"url":"https://patchwork.plctlab.org/api/1.2/patches/50812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125958.319738-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125958.319738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:59:58","name":"RISC-V: Add vsra.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125958.319738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50813,"url":"https://patchwork.plctlab.org/api/1.2/patches/50813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130137.320560-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130137.320560-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:01:37","name":"RISC-V: Add vsll.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130137.320560-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50814,"url":"https://patchwork.plctlab.org/api/1.2/patches/50814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130319.321249-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130319.321249-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:03:19","name":"RISC-V: Add vrem*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130319.321249-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50818,"url":"https://patchwork.plctlab.org/api/1.2/patches/50818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130517.322011-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130517.322011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:05:17","name":"RISC-V: Add vor.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130517.322011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50826,"url":"https://patchwork.plctlab.org/api/1.2/patches/50826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130650.322631-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130650.322631-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:06:50","name":"RISC-V: Add vmin*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130650.322631-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50824,"url":"https://patchwork.plctlab.org/api/1.2/patches/50824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0vag8en.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T13:06:56","name":"vect: Fix single def-use cycle for ifn reductions [PR108608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0vag8en.fsf@arm.com/mbox/"},{"id":50830,"url":"https://patchwork.plctlab.org/api/1.2/patches/50830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130839.323333-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130839.323333-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:08:39","name":"RISC-V: Add vmax*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130839.323333-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50833,"url":"https://patchwork.plctlab.org/api/1.2/patches/50833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131131028.324141-1-juzhe.zhong@rivai.ai/","msgid":"<20230131131028.324141-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:10:28","name":"RISC-V: Add vdiv*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131131028.324141-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50837,"url":"https://patchwork.plctlab.org/api/1.2/patches/50837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132246.660779-1-arthur.cohen@embecosm.com/","msgid":"<20230131132246.660779-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:22:46","name":"[COMMITTED] gccrs: session-manager: Add ast-pretty-expanded dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132246.660779-1-arthur.cohen@embecosm.com/mbox/"},{"id":50838,"url":"https://patchwork.plctlab.org/api/1.2/patches/50838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132407.661219-1-arthur.cohen@embecosm.com/","msgid":"<20230131132407.661219-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:07","name":"[COMMITTED] gccrs: builtins: Add add_overflow builtin and refactor class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132407.661219-1-arthur.cohen@embecosm.com/mbox/"},{"id":50843,"url":"https://patchwork.plctlab.org/api/1.2/patches/50843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132417.661302-1-arthur.cohen@embecosm.com/","msgid":"<20230131132417.661302-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:17","name":"[COMMITTED] gccrs: backend: Add overflow checks to every arithmetic operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132417.661302-1-arthur.cohen@embecosm.com/mbox/"},{"id":50905,"url":"https://patchwork.plctlab.org/api/1.2/patches/50905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132424.661382-1-arthur.cohen@embecosm.com/","msgid":"<20230131132424.661382-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:24","name":"[COMMITTED] gccrs: rustc_attrs: Allow `rustc_inherit_overflow_checks` as a builtin..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132424.661382-1-arthur.cohen@embecosm.com/mbox/"},{"id":50850,"url":"https://patchwork.plctlab.org/api/1.2/patches/50850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132429.661457-1-arthur.cohen@embecosm.com/","msgid":"<20230131132429.661457-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:29","name":"[COMMITTED] gccrs: lint: Do not emit unused warnings for public items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132429.661457-1-arthur.cohen@embecosm.com/mbox/"},{"id":50839,"url":"https://patchwork.plctlab.org/api/1.2/patches/50839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132435.661532-1-arthur.cohen@embecosm.com/","msgid":"<20230131132435.661532-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:35","name":"[COMMITTED] gccrs: parser: Parse RangeFullExpr without erroring out","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132435.661532-1-arthur.cohen@embecosm.com/mbox/"},{"id":50844,"url":"https://patchwork.plctlab.org/api/1.2/patches/50844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132441.661608-1-arthur.cohen@embecosm.com/","msgid":"<20230131132441.661608-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:41","name":"[COMMITTED] gccrs: macros: Handle matchers properly in repetitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132441.661608-1-arthur.cohen@embecosm.com/mbox/"},{"id":50857,"url":"https://patchwork.plctlab.org/api/1.2/patches/50857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132448.661684-1-arthur.cohen@embecosm.com/","msgid":"<20230131132448.661684-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:48","name":"[COMMITTED] gccrs: transcriber: Do not infinite loop if the current parsed node is an error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132448.661684-1-arthur.cohen@embecosm.com/mbox/"},{"id":50851,"url":"https://patchwork.plctlab.org/api/1.2/patches/50851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132456.661762-1-arthur.cohen@embecosm.com/","msgid":"<20230131132456.661762-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:56","name":"[COMMITTED] gccrs: dump: Add AST debugging using the AST::Dump class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132456.661762-1-arthur.cohen@embecosm.com/mbox/"},{"id":50856,"url":"https://patchwork.plctlab.org/api/1.2/patches/50856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132504.661840-1-arthur.cohen@embecosm.com/","msgid":"<20230131132504.661840-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:04","name":"[COMMITTED] gccrs: ast: Only expand expressions and types if the kind is right","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132504.661840-1-arthur.cohen@embecosm.com/mbox/"},{"id":50858,"url":"https://patchwork.plctlab.org/api/1.2/patches/50858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132510.661917-1-arthur.cohen@embecosm.com/","msgid":"<20230131132510.661917-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:10","name":"[COMMITTED] gccrs: ast: Add better assertion on AST fragments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132510.661917-1-arthur.cohen@embecosm.com/mbox/"},{"id":50913,"url":"https://patchwork.plctlab.org/api/1.2/patches/50913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132515.661993-1-arthur.cohen@embecosm.com/","msgid":"<20230131132515.661993-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:15","name":"[COMMITTED] gccrs: Add guards against getting data from an empty vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132515.661993-1-arthur.cohen@embecosm.com/mbox/"},{"id":50853,"url":"https://patchwork.plctlab.org/api/1.2/patches/50853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132520.662068-1-arthur.cohen@embecosm.com/","msgid":"<20230131132520.662068-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:20","name":"[COMMITTED] gccrs: Add missing location info to coercions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132520.662068-1-arthur.cohen@embecosm.com/mbox/"},{"id":50860,"url":"https://patchwork.plctlab.org/api/1.2/patches/50860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132525.662143-1-arthur.cohen@embecosm.com/","msgid":"<20230131132525.662143-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:25","name":"[COMMITTED] gccrs: Refactor unify to hit a unify_site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132525.662143-1-arthur.cohen@embecosm.com/mbox/"},{"id":50861,"url":"https://patchwork.plctlab.org/api/1.2/patches/50861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132530.662219-1-arthur.cohen@embecosm.com/","msgid":"<20230131132530.662219-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:30","name":"[COMMITTED] gccrs: Remove param_use_canonical_types checks ported from c++ front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132530.662219-1-arthur.cohen@embecosm.com/mbox/"},{"id":50855,"url":"https://patchwork.plctlab.org/api/1.2/patches/50855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132538.662296-1-arthur.cohen@embecosm.com/","msgid":"<20230131132538.662296-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:38","name":"[COMMITTED] gccrs: Create canonical process of compiling constant items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132538.662296-1-arthur.cohen@embecosm.com/mbox/"},{"id":50859,"url":"https://patchwork.plctlab.org/api/1.2/patches/50859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132542.662372-1-arthur.cohen@embecosm.com/","msgid":"<20230131132542.662372-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:42","name":"[COMMITTED] gccrs: Add extra debugging for method call expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132542.662372-1-arthur.cohen@embecosm.com/mbox/"},{"id":50863,"url":"https://patchwork.plctlab.org/api/1.2/patches/50863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132546.662447-1-arthur.cohen@embecosm.com/","msgid":"<20230131132546.662447-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:46","name":"[COMMITTED] gccrs: Add new check for contains_associated_types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132546.662447-1-arthur.cohen@embecosm.com/mbox/"},{"id":50864,"url":"https://patchwork.plctlab.org/api/1.2/patches/50864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132550.662527-1-arthur.cohen@embecosm.com/","msgid":"<20230131132550.662527-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:50","name":"[COMMITTED] gccrs: Unit structs are not concrete when they need substitutions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132550.662527-1-arthur.cohen@embecosm.com/mbox/"},{"id":50911,"url":"https://patchwork.plctlab.org/api/1.2/patches/50911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132553.662602-1-arthur.cohen@embecosm.com/","msgid":"<20230131132553.662602-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:53","name":"[COMMITTED] gccrs: bugfix: initialize slice from array in const context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132553.662602-1-arthur.cohen@embecosm.com/mbox/"},{"id":50866,"url":"https://patchwork.plctlab.org/api/1.2/patches/50866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132555.662678-1-arthur.cohen@embecosm.com/","msgid":"<20230131132555.662678-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:55","name":"[COMMITTED] gccrs: add testcase to test component_ref and constructor codes in eval_constant_expression()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132555.662678-1-arthur.cohen@embecosm.com/mbox/"},{"id":50865,"url":"https://patchwork.plctlab.org/api/1.2/patches/50865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132559.662754-1-arthur.cohen@embecosm.com/","msgid":"<20230131132559.662754-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:59","name":"[COMMITTED] gccrs: backend: correctly formulate the exit condition ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132559.662754-1-arthur.cohen@embecosm.com/mbox/"},{"id":50871,"url":"https://patchwork.plctlab.org/api/1.2/patches/50871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132604.662832-1-arthur.cohen@embecosm.com/","msgid":"<20230131132604.662832-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:04","name":"[COMMITTED] gccrs: add testcase with struct to test component_ref and constructor codes..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132604.662832-1-arthur.cohen@embecosm.com/mbox/"},{"id":50870,"url":"https://patchwork.plctlab.org/api/1.2/patches/50870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132610.662984-1-arthur.cohen@embecosm.com/","msgid":"<20230131132610.662984-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:10","name":"[COMMITTED] gccrs: const generics: Make sure const generic types are visited properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132610.662984-1-arthur.cohen@embecosm.com/mbox/"},{"id":50862,"url":"https://patchwork.plctlab.org/api/1.2/patches/50862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132641.663441-1-arthur.cohen@embecosm.com/","msgid":"<20230131132641.663441-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:41","name":"[COMMITTED] gccrs: remove bad assertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132641.663441-1-arthur.cohen@embecosm.com/mbox/"},{"id":50868,"url":"https://patchwork.plctlab.org/api/1.2/patches/50868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132723.663982-1-arthur.cohen@embecosm.com/","msgid":"<20230131132723.663982-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:23","name":"[COMMITTED] gccrs: Fix duplicated function generation on higher ranked trait bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132723.663982-1-arthur.cohen@embecosm.com/mbox/"},{"id":50914,"url":"https://patchwork.plctlab.org/api/1.2/patches/50914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132729.664059-1-arthur.cohen@embecosm.com/","msgid":"<20230131132729.664059-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:29","name":"[COMMITTED] gccrs: Refactor TypeResolution to be a simple query based system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132729.664059-1-arthur.cohen@embecosm.com/mbox/"},{"id":50912,"url":"https://patchwork.plctlab.org/api/1.2/patches/50912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132736.664214-1-arthur.cohen@embecosm.com/","msgid":"<20230131132736.664214-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:36","name":"[COMMITTED] gccrs: Add testcase to show forward declared items work via TypeAlias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132736.664214-1-arthur.cohen@embecosm.com/mbox/"},{"id":50900,"url":"https://patchwork.plctlab.org/api/1.2/patches/50900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-2-qing.zhao@oracle.com/","msgid":"<20230131141140.3610133-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-31T14:11:39","name":"[1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-2-qing.zhao@oracle.com/mbox/"},{"id":50902,"url":"https://patchwork.plctlab.org/api/1.2/patches/50902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-3-qing.zhao@oracle.com/","msgid":"<20230131141140.3610133-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-31T14:11:40","name":"[2/2] Documentation Update.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-3-qing.zhao@oracle.com/mbox/"},{"id":50903,"url":"https://patchwork.plctlab.org/api/1.2/patches/50903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131144544.452FD13585@imap2.suse-dmz.suse.de/","msgid":"<20230131144544.452FD13585@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-31T14:45:43","name":"middle-end/108500 - replace recursive domtree DFS traversal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131144544.452FD13585@imap2.suse-dmz.suse.de/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-01/mbox/"},{"id":15,"url":"https://patchwork.plctlab.org/api/1.2/bundles/15/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-02/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-02","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":50916,"url":"https://patchwork.plctlab.org/api/1.2/patches/50916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132324.661030-1-arthur.cohen@embecosm.com/","msgid":"<20230131132324.661030-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:23:24","name":"[COMMITTED] gccrs: Desugar double borrows into two HIR:BorrowExpr'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132324.661030-1-arthur.cohen@embecosm.com/mbox/"},{"id":50919,"url":"https://patchwork.plctlab.org/api/1.2/patches/50919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132335.661108-1-arthur.cohen@embecosm.com/","msgid":"<20230131132335.661108-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:23:36","name":"[COMMITTED] gccrs: backend: Expose Bvariable class through rust-gcc header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132335.661108-1-arthur.cohen@embecosm.com/mbox/"},{"id":50933,"url":"https://patchwork.plctlab.org/api/1.2/patches/50933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132607.662907-1-arthur.cohen@embecosm.com/","msgid":"<20230131132607.662907-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:07","name":"[COMMITTED] gccrs: testsuite: add loop condition execution test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132607.662907-1-arthur.cohen@embecosm.com/mbox/"},{"id":50932,"url":"https://patchwork.plctlab.org/api/1.2/patches/50932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132613.663060-1-arthur.cohen@embecosm.com/","msgid":"<20230131132613.663060-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:13","name":"[COMMITTED] gccrs: const generics: Forbid default values in Functions, Traits and Impls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132613.663060-1-arthur.cohen@embecosm.com/mbox/"},{"id":50935,"url":"https://patchwork.plctlab.org/api/1.2/patches/50935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132616.663136-1-arthur.cohen@embecosm.com/","msgid":"<20230131132616.663136-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:16","name":"[COMMITTED] gccrs: attributes: Add #[macro_use] as builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132616.663136-1-arthur.cohen@embecosm.com/mbox/"},{"id":50928,"url":"https://patchwork.plctlab.org/api/1.2/patches/50928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132620.663213-1-arthur.cohen@embecosm.com/","msgid":"<20230131132620.663213-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:20","name":"[COMMITTED] gccrs: module lowering: Do not append null pointers as items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132620.663213-1-arthur.cohen@embecosm.com/mbox/"},{"id":50930,"url":"https://patchwork.plctlab.org/api/1.2/patches/50930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132624.663288-1-arthur.cohen@embecosm.com/","msgid":"<20230131132624.663288-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:24","name":"[COMMITTED] gccrs: Static Items must be const evaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132624.663288-1-arthur.cohen@embecosm.com/mbox/"},{"id":50934,"url":"https://patchwork.plctlab.org/api/1.2/patches/50934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132633.663363-1-arthur.cohen@embecosm.com/","msgid":"<20230131132633.663363-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:33","name":"[COMMITTED] gccrs: Statics are a coercion site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132633.663363-1-arthur.cohen@embecosm.com/mbox/"},{"id":50923,"url":"https://patchwork.plctlab.org/api/1.2/patches/50923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132650.663517-1-arthur.cohen@embecosm.com/","msgid":"<20230131132650.663517-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:50","name":"[COMMITTED] gccrs: Add testcase for const-eval issue from rust-blog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132650.663517-1-arthur.cohen@embecosm.com/mbox/"},{"id":50931,"url":"https://patchwork.plctlab.org/api/1.2/patches/50931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132656.663600-1-arthur.cohen@embecosm.com/","msgid":"<20230131132656.663600-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:56","name":"[COMMITTED] gccrs: rust: Add -frust-compile-until option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132656.663600-1-arthur.cohen@embecosm.com/mbox/"},{"id":50929,"url":"https://patchwork.plctlab.org/api/1.2/patches/50929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132703.663677-1-arthur.cohen@embecosm.com/","msgid":"<20230131132703.663677-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:03","name":"[COMMITTED] gccrs: expand: eager evaluate macros inside builtin macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132703.663677-1-arthur.cohen@embecosm.com/mbox/"},{"id":50920,"url":"https://patchwork.plctlab.org/api/1.2/patches/50920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132709.663756-1-arthur.cohen@embecosm.com/","msgid":"<20230131132709.663756-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:09","name":"[COMMITTED] gccrs: testsuite/rust: add a testcase for testing ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132709.663756-1-arthur.cohen@embecosm.com/mbox/"},{"id":50927,"url":"https://patchwork.plctlab.org/api/1.2/patches/50927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132716.663831-1-arthur.cohen@embecosm.com/","msgid":"<20230131132716.663831-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:16","name":"[COMMITTED] gccrs: Cleanup formatting of backend expression visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132716.663831-1-arthur.cohen@embecosm.com/mbox/"},{"id":50917,"url":"https://patchwork.plctlab.org/api/1.2/patches/50917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132720.663907-1-arthur.cohen@embecosm.com/","msgid":"<20230131132720.663907-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:20","name":"[COMMITTED] gccrs: Make constexpr constructors type-checking more permissive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132720.663907-1-arthur.cohen@embecosm.com/mbox/"},{"id":50922,"url":"https://patchwork.plctlab.org/api/1.2/patches/50922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132732.664139-1-arthur.cohen@embecosm.com/","msgid":"<20230131132732.664139-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:32","name":"[COMMITTED] gccrs: Add testcase to show forward declared items work","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132732.664139-1-arthur.cohen@embecosm.com/mbox/"},{"id":50936,"url":"https://patchwork.plctlab.org/api/1.2/patches/50936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131153702.2844226-1-philipp.tomsich@vrull.eu/","msgid":"<20230131153702.2844226-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-01-31T15:37:02","name":"[COMMITTED] PR target/108589 - Check REG_P for AARCH64_FUSE_ADDSUB_2REG_CONST1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131153702.2844226-1-philipp.tomsich@vrull.eu/mbox/"},{"id":51000,"url":"https://patchwork.plctlab.org/api/1.2/patches/51000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131183001.377458-1-polacek@redhat.com/","msgid":"<20230131183001.377458-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T18:30:01","name":"[pushed] c++: Add fixed test [PR102870]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131183001.377458-1-polacek@redhat.com/mbox/"},{"id":51029,"url":"https://patchwork.plctlab.org/api/1.2/patches/51029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com/","msgid":"<4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com>","list_archive_url":null,"date":"2023-01-31T20:10:39","name":"PR tree-optimization/108356 - Ranger cache - always use range_from_dom when updating.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com/mbox/"},{"id":51031,"url":"https://patchwork.plctlab.org/api/1.2/patches/51031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131204134.725217-1-polacek@redhat.com/","msgid":"<20230131204134.725217-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T20:41:34","name":"c++: ICE with -Wlogical-op [PR107755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131204134.725217-1-polacek@redhat.com/mbox/"},{"id":51044,"url":"https://patchwork.plctlab.org/api/1.2/patches/51044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220724.19131-1-juzhe.zhong@rivai.ai/","msgid":"<20230131220724.19131-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:07:24","name":"RISC-V: Add RVV shift.vx C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220724.19131-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51046,"url":"https://patchwork.plctlab.org/api/1.2/patches/51046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220958.20394-1-juzhe.zhong@rivai.ai/","msgid":"<20230131220958.20394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:09:58","name":"RISC-V: Add vsrl.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220958.20394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51047,"url":"https://patchwork.plctlab.org/api/1.2/patches/51047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221110.20996-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221110.20996-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:11:10","name":"RISC-V: Add vsra.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221110.20996-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51048,"url":"https://patchwork.plctlab.org/api/1.2/patches/51048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221325.21956-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221325.21956-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:13:25","name":"RISC-V: Add vsll.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221325.21956-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51049,"url":"https://patchwork.plctlab.org/api/1.2/patches/51049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221513.22652-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221513.22652-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:15:13","name":"RISC-V: Add shift constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221513.22652-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51050,"url":"https://patchwork.plctlab.org/api/1.2/patches/51050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221752.23648-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221752.23648-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:17:52","name":"RISC-V: Add vsrl.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221752.23648-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51051,"url":"https://patchwork.plctlab.org/api/1.2/patches/51051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221943.24518-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221943.24518-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:19:43","name":"RISC-V: Add vsra.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221943.24518-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51054,"url":"https://patchwork.plctlab.org/api/1.2/patches/51054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131222056.25127-1-juzhe.zhong@rivai.ai/","msgid":"<20230131222056.25127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:20:56","name":"RISC-V: Add vsll.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131222056.25127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51068,"url":"https://patchwork.plctlab.org/api/1.2/patches/51068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131223954.219780-1-hjl.tools@gmail.com/","msgid":"<20230131223954.219780-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-31T22:39:54","name":"libsanitizer: cherry-pick commit 742bcbf685bc from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131223954.219780-1-hjl.tools@gmail.com/mbox/"},{"id":51073,"url":"https://patchwork.plctlab.org/api/1.2/patches/51073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131225342.7CE7433E92@hamza.pair.com/","msgid":"<20230131225342.7CE7433E92@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T22:53:39","name":"[pushed] wwwdocs: gcc-5: Fix deep link into GDB manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131225342.7CE7433E92@hamza.pair.com/mbox/"},{"id":51109,"url":"https://patchwork.plctlab.org/api/1.2/patches/51109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201001111.1045847-1-jason@redhat.com/","msgid":"<20230201001111.1045847-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-01T00:11:11","name":"[pushed] c++: aggregate base and TARGET_EXPR_ELIDING_P [PR108559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201001111.1045847-1-jason@redhat.com/mbox/"},{"id":51121,"url":"https://patchwork.plctlab.org/api/1.2/patches/51121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012112.1300516-1-apinski@marvell.com/","msgid":"<20230201012112.1300516-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-01T01:21:12","name":"Simplify \"1 - bool_val\" to \"bool_val ^ 1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012112.1300516-1-apinski@marvell.com/mbox/"},{"id":51119,"url":"https://patchwork.plctlab.org/api/1.2/patches/51119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012919.1301588-1-apinski@marvell.com/","msgid":"<20230201012919.1301588-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-01T01:29:19","name":"Simplify \"1 - bool_val\" to \"bool_val ^ 1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012919.1301588-1-apinski@marvell.com/mbox/"},{"id":51122,"url":"https://patchwork.plctlab.org/api/1.2/patches/51122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201014733.172099-1-juzhe.zhong@rivai.ai/","msgid":"<20230201014733.172099-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-01T01:47:33","name":"RISC-V: Fix constraint bug for binary operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201014733.172099-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51134,"url":"https://patchwork.plctlab.org/api/1.2/patches/51134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022406.824321-1-dmalcolm@redhat.com/","msgid":"<20230201022406.824321-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:24:06","name":"[pushed] doc: add notes about limitations of -fanalyzer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022406.824321-1-dmalcolm@redhat.com/mbox/"},{"id":51135,"url":"https://patchwork.plctlab.org/api/1.2/patches/51135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022524.1100674-1-jason@redhat.com/","msgid":"<20230201022524.1100674-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:25:24","name":"[pushed] c++: Add -Wno-changes-meaning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022524.1100674-1-jason@redhat.com/mbox/"},{"id":51136,"url":"https://patchwork.plctlab.org/api/1.2/patches/51136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022615.824902-1-dmalcolm@redhat.com/","msgid":"<20230201022615.824902-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:26:15","name":"[pushed] analyzer: fix -Wanalyzer-allocation-size false -ve on alloca [PR108616]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022615.824902-1-dmalcolm@redhat.com/mbox/"},{"id":51137,"url":"https://patchwork.plctlab.org/api/1.2/patches/51137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022755.825041-1-dmalcolm@redhat.com/","msgid":"<20230201022755.825041-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:27:55","name":"[pushed] analyzer: fix uses of alloca in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022755.825041-1-dmalcolm@redhat.com/mbox/"},{"id":51210,"url":"https://patchwork.plctlab.org/api/1.2/patches/51210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201073859.3920910-1-maskray@google.com/","msgid":"<20230201073859.3920910-1-maskray@google.com>","list_archive_url":null,"date":"2023-02-01T07:38:59","name":"x86: Use DW_EH_PE_indirect|DW_EH_PE_pcrel encodings for -fno-pic code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201073859.3920910-1-maskray@google.com/mbox/"},{"id":51211,"url":"https://patchwork.plctlab.org/api/1.2/patches/51211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-2-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-2-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:43","name":"[1/3] New reg note REG_CFA_NORESTORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-2-krebbel@linux.ibm.com/mbox/"},{"id":51213,"url":"https://patchwork.plctlab.org/api/1.2/patches/51213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-3-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-3-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:44","name":"[2/3] IBM zSystems: Make stack_tie to work with hard frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-3-krebbel@linux.ibm.com/mbox/"},{"id":51212,"url":"https://patchwork.plctlab.org/api/1.2/patches/51212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-4-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-4-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:45","name":"[3/3] IBM zSystems: Save argument registers to the stack -mpreserve-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-4-krebbel@linux.ibm.com/mbox/"},{"id":51250,"url":"https://patchwork.plctlab.org/api/1.2/patches/51250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9o0lpdPLeh4JF6U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:44:54","name":"[committed] c++, openmp: Handle some OMP_*/OACC_* constructs during constant expression evaluation [PR108607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9o0lpdPLeh4JF6U@tucnak/mbox/"},{"id":51253,"url":"https://patchwork.plctlab.org/api/1.2/patches/51253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-1-christophe.lyon@arm.com/","msgid":"<20230201094650.65755-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-02-01T09:46:49","name":"arm: Fix warning in libgcc/config/arm/pr-support.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-1-christophe.lyon@arm.com/mbox/"},{"id":51252,"url":"https://patchwork.plctlab.org/api/1.2/patches/51252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-2-christophe.lyon@arm.com/","msgid":"<20230201094650.65755-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-02-01T09:46:50","name":"arm: [MVE] Add missing length=8 attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-2-christophe.lyon@arm.com/mbox/"},{"id":51259,"url":"https://patchwork.plctlab.org/api/1.2/patches/51259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelhg17a.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:54:49","name":"[pushed] testsuite: Fix g++.dg/gomp warnings for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelhg17a.fsf@arm.com/mbox/"},{"id":51260,"url":"https://patchwork.plctlab.org/api/1.2/patches/51260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedr9g165.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:55:30","name":"[pushed] compare-elim: Fix an RTL checking failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedr9g165.fsf@arm.com/mbox/"},{"id":51261,"url":"https://patchwork.plctlab.org/api/1.2/patches/51261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201095624.AAF1633E9B@hamza.pair.com/","msgid":"<20230201095624.AAF1633E9B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T09:56:22","name":"[pushed] wwwdocs: readings: Remove Herman D. Knoble'\''s Fortran Resources","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201095624.AAF1633E9B@hamza.pair.com/mbox/"},{"id":51262,"url":"https://patchwork.plctlab.org/api/1.2/patches/51262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201100109.5F31A33EAD@hamza.pair.com/","msgid":"<20230201100109.5F31A33EAD@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T10:01:07","name":"[pushed] wwwdocs: testing: Update LAPACK links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201100109.5F31A33EAD@hamza.pair.com/mbox/"},{"id":51310,"url":"https://patchwork.plctlab.org/api/1.2/patches/51310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9pO9EuODLKr8Do3@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-01T11:37:24","name":"ree: Fix -fcompare-debug issues in combine_reaching_defs [PR108573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9pO9EuODLKr8Do3@tucnak/mbox/"},{"id":51312,"url":"https://patchwork.plctlab.org/api/1.2/patches/51312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yclppf8.fsf@euler.schwinge.homeip.net/","msgid":"<875yclppf8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-01T11:59:07","name":"[og12] Fix '\''omp_allocator_handle_kind'\'' example in '\''gfortran.dg/gomp/allocate-4.f90'\'' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0).)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yclppf8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":51315,"url":"https://patchwork.plctlab.org/api/1.2/patches/51315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201122444.253620-1-juzhe.zhong@rivai.ai/","msgid":"<20230201122444.253620-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-01T12:24:44","name":"CPROP: Allow cprop optimization when the function has a single block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201122444.253620-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51359,"url":"https://patchwork.plctlab.org/api/1.2/patches/51359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201143831.BDA3A20423@pchp3.se.axis.com/","msgid":"<20230201143831.BDA3A20423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-01T14:38:31","name":"libstdc++ testsuite: Correct S0 in std/time/hh_mm_ss/1.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201143831.BDA3A20423@pchp3.se.axis.com/mbox/"},{"id":51423,"url":"https://patchwork.plctlab.org/api/1.2/patches/51423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1efd091-471f-ed79-ad14-64946f2e5565@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T15:35:03","name":"amdgcn: Add instruction pattern for conditional shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1efd091-471f-ed79-ad14-64946f2e5565@codesourcery.com/mbox/"},{"id":51476,"url":"https://patchwork.plctlab.org/api/1.2/patches/51476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201164626.699192-1-siddhesh@gotplt.org/","msgid":"<20230201164626.699192-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-02-01T16:46:26","name":"[committed,v2] testsuite: Run __bos tests to completion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201164626.699192-1-siddhesh@gotplt.org/mbox/"},{"id":51501,"url":"https://patchwork.plctlab.org/api/1.2/patches/51501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df275d3e-145b-c8ca-5947-db2661e84262@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T18:11:27","name":"PR tree-optimization/107570 - Reset SCEV after folding in VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df275d3e-145b-c8ca-5947-db2661e84262@redhat.com/mbox/"},{"id":51547,"url":"https://patchwork.plctlab.org/api/1.2/patches/51547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-41f58533-d711-454b-9271-84b8d31b8a41-1675283099194@3c-app-gmx-bs72/","msgid":"","list_archive_url":null,"date":"2023-02-01T20:24:59","name":"[committed] Fortran: error recovery on invalid array section [PR108609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-41f58533-d711-454b-9271-84b8d31b8a41-1675283099194@3c-app-gmx-bs72/mbox/"},{"id":51572,"url":"https://patchwork.plctlab.org/api/1.2/patches/51572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210755.2445205-1-jwakely@redhat.com/","msgid":"<20230201210755.2445205-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:07:55","name":"[committed] libstdc++: Do not embed tzdata.zi for 8-bit and 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210755.2445205-1-jwakely@redhat.com/mbox/"},{"id":51573,"url":"https://patchwork.plctlab.org/api/1.2/patches/51573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210853.2445267-1-jwakely@redhat.com/","msgid":"<20230201210853.2445267-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:08:53","name":"[committed] libstdc++: Fix build failures for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210853.2445267-1-jwakely@redhat.com/mbox/"},{"id":51574,"url":"https://patchwork.plctlab.org/api/1.2/patches/51574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210921.2445332-1-jwakely@redhat.com/","msgid":"<20230201210921.2445332-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:09:21","name":"[committed] libstdc++: Fix std::random_device for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210921.2445332-1-jwakely@redhat.com/mbox/"},{"id":51612,"url":"https://patchwork.plctlab.org/api/1.2/patches/51612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201235444.14EE633EBF@hamza.pair.com/","msgid":"<20230201235444.14EE633EBF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T23:54:41","name":"[pushed] wwwdocs: readings: Update Nios II reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201235444.14EE633EBF@hamza.pair.com/mbox/"},{"id":51613,"url":"https://patchwork.plctlab.org/api/1.2/patches/51613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202003345.B1E0B33EBE@hamza.pair.com/","msgid":"<20230202003345.B1E0B33EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:33:43","name":"[pushed] libstdc++: Fix link to online GDB manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202003345.B1E0B33EBE@hamza.pair.com/mbox/"},{"id":51614,"url":"https://patchwork.plctlab.org/api/1.2/patches/51614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202004547.9F3EB33E6E@hamza.pair.com/","msgid":"<20230202004547.9F3EB33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:45:45","name":"[pushed] wwwdocs: frontends: Switch www.modula3.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202004547.9F3EB33E6E@hamza.pair.com/mbox/"},{"id":51615,"url":"https://patchwork.plctlab.org/api/1.2/patches/51615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202005154.7652133EBE@hamza.pair.com/","msgid":"<20230202005154.7652133EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:51:52","name":"[pushed] libstdc++: Switch a www.open-std.org link to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202005154.7652133EBE@hamza.pair.com/mbox/"},{"id":51626,"url":"https://patchwork.plctlab.org/api/1.2/patches/51626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202013052.2070569-1-hongtao.liu@intel.com/","msgid":"<20230202013052.2070569-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-02-02T01:30:52","name":"[vect] Don'\''t peel nonlinear iv(mult or shift) for epilog when vf is not constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202013052.2070569-1-hongtao.liu@intel.com/mbox/"},{"id":51726,"url":"https://patchwork.plctlab.org/api/1.2/patches/51726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202054550.2034-1-jinma@linux.alibaba.com/","msgid":"<20230202054550.2034-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-02T05:45:50","name":"[v5,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202054550.2034-1-jinma@linux.alibaba.com/mbox/"},{"id":51727,"url":"https://patchwork.plctlab.org/api/1.2/patches/51727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9tQNeCkdqlMkKdz@jupiter.tail36e24.ts.net/","msgid":"","list_archive_url":null,"date":"2023-02-02T05:55:01","name":"Add x86_64-gnu target to contrib/config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9tQNeCkdqlMkKdz@jupiter.tail36e24.ts.net/mbox/"},{"id":51799,"url":"https://patchwork.plctlab.org/api/1.2/patches/51799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com/","msgid":"<4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com>","list_archive_url":null,"date":"2023-02-02T08:43:42","name":"s390: Add LEN_LOAD/LEN_STORE support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com/mbox/"},{"id":51806,"url":"https://patchwork.plctlab.org/api/1.2/patches/51806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t7xMBKDiGdX3/F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:00:52","name":"[committed] nested, openmp: Wrap OMP_CLAUSE_*_GIMPLE_SEQ into GIMPLE_BIND for declare_vars [PR108435]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t7xMBKDiGdX3/F@tucnak/mbox/"},{"id":51810,"url":"https://patchwork.plctlab.org/api/1.2/patches/51810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t+gOQrO/wBHlxY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:12:32","name":"Replace IFN_TRAP with BUILT_IN_UNREACHABLE_TRAP [PR107300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t+gOQrO/wBHlxY@tucnak/mbox/"},{"id":51829,"url":"https://patchwork.plctlab.org/api/1.2/patches/51829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelge6uc.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:48:11","name":"rtl-ssa: Fix splitting of clobber groups [PR108508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelge6uc.fsf@arm.com/mbox/"},{"id":51869,"url":"https://patchwork.plctlab.org/api/1.2/patches/51869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com/","msgid":"<768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T11:19:56","name":"[committed] libgomp.texi (OpenMP TR11 impl. status): Fix '\''strict'\'' item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com/mbox/"},{"id":51872,"url":"https://patchwork.plctlab.org/api/1.2/patches/51872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202113406.91303385842C@sourceware.org/","msgid":"<20230202113406.91303385842C@sourceware.org>","list_archive_url":null,"date":"2023-02-02T11:33:22","name":"middle-end/108625 - wrong folding due to misinterpreted !","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202113406.91303385842C@sourceware.org/mbox/"},{"id":51877,"url":"https://patchwork.plctlab.org/api/1.2/patches/51877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202114604.2059-1-jinma@linux.alibaba.com/","msgid":"<20230202114604.2059-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-02T11:46:04","name":"RISC-V: Fix bug of TARGET_COMPUTE_MULTILIB implemented in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202114604.2059-1-jinma@linux.alibaba.com/mbox/"},{"id":51878,"url":"https://patchwork.plctlab.org/api/1.2/patches/51878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com/","msgid":"<46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T11:49:57","name":"[committed] amdgcn, libgomp: Manually allocated stacks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com/mbox/"},{"id":51942,"url":"https://patchwork.plctlab.org/api/1.2/patches/51942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com/","msgid":"<4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T14:13:58","name":"libgomp: Fix reverse offload issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com/mbox/"},{"id":51944,"url":"https://patchwork.plctlab.org/api/1.2/patches/51944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141503.913418-1-dmalcolm@redhat.com/","msgid":"<20230202141503.913418-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-02T14:15:03","name":"[pushed] analyzer: add deref-before-check-qemu-qtest_rsp_args.c test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141503.913418-1-dmalcolm@redhat.com/mbox/"},{"id":51948,"url":"https://patchwork.plctlab.org/api/1.2/patches/51948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141630.913508-1-dmalcolm@redhat.com/","msgid":"<20230202141630.913508-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-02T14:16:30","name":"[pushed] analyzer: fix -Wanalyzer-fd-type-mismatch false +ve on \"listen\" [PR108633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141630.913508-1-dmalcolm@redhat.com/mbox/"},{"id":51953,"url":"https://patchwork.plctlab.org/api/1.2/patches/51953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9vJBTq6losUIR6J@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:30:29","name":"tree: Use comdat tree_code_{type,length} even for C++11/14 [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9vJBTq6losUIR6J@tucnak/mbox/"},{"id":51978,"url":"https://patchwork.plctlab.org/api/1.2/patches/51978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v8ce32.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:54:41","name":"[pushed] testsuite: Add case-values-threshold to pr107876.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v8ce32.fsf@arm.com/mbox/"},{"id":51979,"url":"https://patchwork.plctlab.org/api/1.2/patches/51979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelgce1g.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:55:39","name":"[pushed] rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelgce1g.fsf@arm.com/mbox/"},{"id":52074,"url":"https://patchwork.plctlab.org/api/1.2/patches/52074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7qc9h08.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-02T16:19:51","name":"ipa: Avoid invalid gimple when IPA-CP and IPA-SRA disagree on types (108384)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7qc9h08.fsf@suse.cz/mbox/"},{"id":52099,"url":"https://patchwork.plctlab.org/api/1.2/patches/52099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164802.2634934-1-jwakely@redhat.com/","msgid":"<20230202164802.2634934-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T16:48:02","name":"[committed] libstdc++: Use emplace in std::variant::operator=(T&&) as per LWG 3585","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164802.2634934-1-jwakely@redhat.com/mbox/"},{"id":52100,"url":"https://patchwork.plctlab.org/api/1.2/patches/52100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164905.2634961-1-jwakely@redhat.com/","msgid":"<20230202164905.2634961-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T16:49:05","name":"[committed] libstdc++: Fix std::filesystem errors with -fkeep-inline-functions [PR108636]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164905.2634961-1-jwakely@redhat.com/mbox/"},{"id":52102,"url":"https://patchwork.plctlab.org/api/1.2/patches/52102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9v1FvWk30MUvi4Z@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-02T17:38:30","name":"Bump up precision size to 16 bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9v1FvWk30MUvi4Z@toto.the-meissners.org/mbox/"},{"id":52103,"url":"https://patchwork.plctlab.org/api/1.2/patches/52103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202173903.2638731-1-jwakely@redhat.com/","msgid":"<20230202173903.2638731-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T17:39:03","name":"[committed] libstdc++: Define std::basic_stringbuf::view() for old std::string ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202173903.2638731-1-jwakely@redhat.com/mbox/"},{"id":52106,"url":"https://patchwork.plctlab.org/api/1.2/patches/52106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180529.2642046-1-jwakely@redhat.com/","msgid":"<20230202180529.2642046-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T18:05:29","name":"[committed] libstdc++: Use ENOSYS for unsupported filesystem ops on AVR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180529.2642046-1-jwakely@redhat.com/mbox/"},{"id":52107,"url":"https://patchwork.plctlab.org/api/1.2/patches/52107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180950.3469931-1-ppalka@redhat.com/","msgid":"<20230202180950.3469931-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-02T18:09:50","name":"c++: spurious ADDR_EXPR after overload set pruning [PR107461]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180950.3469931-1-ppalka@redhat.com/mbox/"},{"id":52110,"url":"https://patchwork.plctlab.org/api/1.2/patches/52110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df42fe65-4c8a-8448-6463-17e498e0a6cd@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T18:20:26","name":"libstdc++: Limit allocations in _Rb_tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df42fe65-4c8a-8448-6463-17e498e0a6cd@gmail.com/mbox/"},{"id":52158,"url":"https://patchwork.plctlab.org/api/1.2/patches/52158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com/","msgid":"<5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T20:08:44","name":"[committed] c: Update checks on constexpr floating-point initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com/mbox/"},{"id":52168,"url":"https://patchwork.plctlab.org/api/1.2/patches/52168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202210139.E1AF420426@pchp3.se.axis.com/","msgid":"<20230202210139.E1AF420426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-02T21:01:39","name":"testsuite: XFAIL g++.dg/pr71488.C and warn/Warray-bounds-16.C, PR107561","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202210139.E1AF420426@pchp3.se.axis.com/mbox/"},{"id":52176,"url":"https://patchwork.plctlab.org/api/1.2/patches/52176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202215018.0691B33E77@hamza.pair.com/","msgid":"<20230202215018.0691B33E77@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T21:50:16","name":"[pushed] wwwdocs: gcc-11: Update arm \"Straight-line Speculation vulnerability\" link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202215018.0691B33E77@hamza.pair.com/mbox/"},{"id":52208,"url":"https://patchwork.plctlab.org/api/1.2/patches/52208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe66a753-e6cb-d047-8a53-666825bcafb2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T23:30:44","name":"[committed] c: Update nullptr_t comparison checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe66a753-e6cb-d047-8a53-666825bcafb2@codesourcery.com/mbox/"},{"id":52225,"url":"https://patchwork.plctlab.org/api/1.2/patches/52225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203002825.398939-1-polacek@redhat.com/","msgid":"<20230203002825.398939-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-03T00:28:25","name":"c++: can'\''t eval PTRMEM_CST in incomplete class [PR107574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203002825.398939-1-polacek@redhat.com/mbox/"},{"id":52303,"url":"https://patchwork.plctlab.org/api/1.2/patches/52303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203045851.43100-1-monk.chiang@sifive.com/","msgid":"<20230203045851.43100-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-02-03T04:58:51","name":"RISC-V: Remove unnecessary register class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203045851.43100-1-monk.chiang@sifive.com/mbox/"},{"id":52315,"url":"https://patchwork.plctlab.org/api/1.2/patches/52315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9ygWHc7w3DeIr9O@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T05:49:12","name":"[1/2] PR target/107299: Fix build issue when long double is IEEE 128-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9ygWHc7w3DeIr9O@toto.the-meissners.org/mbox/"},{"id":52316,"url":"https://patchwork.plctlab.org/api/1.2/patches/52316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9yhQQdUaM+z6IYD@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T05:53:05","name":"[2/2] Rework 128-bit complex multiply and divide.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9yhQQdUaM+z6IYD@toto.the-meissners.org/mbox/"},{"id":52325,"url":"https://patchwork.plctlab.org/api/1.2/patches/52325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203065605.153044-1-juzhe.zhong@rivai.ai/","msgid":"<20230203065605.153044-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T06:56:05","name":"RISC-V: Add binary vx C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203065605.153044-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52326,"url":"https://patchwork.plctlab.org/api/1.2/patches/52326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070048.153816-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070048.153816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:00:48","name":"RISC-V: Add vmul.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070048.153816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52327,"url":"https://patchwork.plctlab.org/api/1.2/patches/52327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070254.155371-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070254.155371-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:02:54","name":"RISC-V: Add vmul.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070254.155371-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52332,"url":"https://patchwork.plctlab.org/api/1.2/patches/52332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070449.158742-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070449.158742-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:04:49","name":"RISC-V: Add vxor.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070449.158742-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52333,"url":"https://patchwork.plctlab.org/api/1.2/patches/52333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070623.162411-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070623.162411-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:06:22","name":"RISC-V: Add vsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070623.162411-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52335,"url":"https://patchwork.plctlab.org/api/1.2/patches/52335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070818.166303-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070818.166303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:08:18","name":"RISC-V: Add vrsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070818.166303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52336,"url":"https://patchwork.plctlab.org/api/1.2/patches/52336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071025.168340-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071025.168340-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:10:25","name":"RISC-V: Add vremu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071025.168340-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52337,"url":"https://patchwork.plctlab.org/api/1.2/patches/52337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071152.170594-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071152.170594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:11:52","name":"RISC-V: Add vrem.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071152.170594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52343,"url":"https://patchwork.plctlab.org/api/1.2/patches/52343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071351.172167-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071351.172167-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:13:51","name":"RISC-V: Add vor.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071351.172167-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52344,"url":"https://patchwork.plctlab.org/api/1.2/patches/52344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071508.173207-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071508.173207-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:15:08","name":"RISC-V: Add vmul.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071508.173207-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52347,"url":"https://patchwork.plctlab.org/api/1.2/patches/52347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnwGk4fOc3PTM_agTXXFvt=767a3-AWOfSr23Xja6K81w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T07:16:33","name":"[aarch64] Code-gen for vector initialization involving constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnwGk4fOc3PTM_agTXXFvt=767a3-AWOfSr23Xja6K81w@mail.gmail.com/mbox/"},{"id":52345,"url":"https://patchwork.plctlab.org/api/1.2/patches/52345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071811.175585-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071811.175585-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:18:11","name":"RISC-V: Add vminu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071811.175585-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52346,"url":"https://patchwork.plctlab.org/api/1.2/patches/52346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072038.177916-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072038.177916-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:20:38","name":"RISC-V: Add vmin.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072038.177916-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52348,"url":"https://patchwork.plctlab.org/api/1.2/patches/52348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072224.179317-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072224.179317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:22:24","name":"RISC-V: Add vmaxu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072224.179317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52349,"url":"https://patchwork.plctlab.org/api/1.2/patches/52349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072338.180417-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072338.180417-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:23:38","name":"RISC-V: Add vmax.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072338.180417-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52350,"url":"https://patchwork.plctlab.org/api/1.2/patches/52350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072458.181496-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072458.181496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:24:58","name":"RISC-V: Add vdivu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072458.181496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52351,"url":"https://patchwork.plctlab.org/api/1.2/patches/52351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073024.186912-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073024.186912-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:30:24","name":"RISC-V: Add vdiv.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073024.186912-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52356,"url":"https://patchwork.plctlab.org/api/1.2/patches/52356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073431.190895-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073431.190895-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:34:31","name":"RISC-V: Add vand.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073431.190895-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52357,"url":"https://patchwork.plctlab.org/api/1.2/patches/52357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073552.192133-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073552.192133-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:35:52","name":"RISC-V: Add vadd.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073552.192133-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52359,"url":"https://patchwork.plctlab.org/api/1.2/patches/52359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073716.193547-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073716.193547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:37:16","name":"RISC-V: Add binary op vx constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073716.193547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52363,"url":"https://patchwork.plctlab.org/api/1.2/patches/52363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074024.196307-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074024.196307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:40:24","name":"RISC-V: Add vxor.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074024.196307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52364,"url":"https://patchwork.plctlab.org/api/1.2/patches/52364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074207.197673-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074207.197673-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:42:07","name":"RISC-V: Add vsub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074207.197673-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52366,"url":"https://patchwork.plctlab.org/api/1.2/patches/52366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074318.199552-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074318.199552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:43:18","name":"RISC-V: Add vrsub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074318.199552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52369,"url":"https://patchwork.plctlab.org/api/1.2/patches/52369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074523.201447-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074523.201447-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:45:23","name":"RISC-V: Add vadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074523.201447-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52371,"url":"https://patchwork.plctlab.org/api/1.2/patches/52371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074911.204999-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074911.204999-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:49:11","name":"RISC-V: Add vremu.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074911.204999-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52372,"url":"https://patchwork.plctlab.org/api/1.2/patches/52372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075042.206568-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075042.206568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:50:42","name":"RISC-V: Add vrem.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075042.206568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52373,"url":"https://patchwork.plctlab.org/api/1.2/patches/52373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075154.207608-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075154.207608-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:51:54","name":"RISC-V: Add vor.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075154.207608-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52375,"url":"https://patchwork.plctlab.org/api/1.2/patches/52375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075316.208999-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075316.208999-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:53:15","name":"RISC-V: Add vmul.vx C++ API testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075316.208999-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52377,"url":"https://patchwork.plctlab.org/api/1.2/patches/52377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075713.212656-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075713.212656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:57:12","name":"RISC-V: Add vminu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075713.212656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52382,"url":"https://patchwork.plctlab.org/api/1.2/patches/52382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075830.213927-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075830.213927-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:58:30","name":"RISC-V: Add vmin.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075830.213927-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52387,"url":"https://patchwork.plctlab.org/api/1.2/patches/52387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080035.216830-1-juzhe.zhong@rivai.ai/","msgid":"<20230203080035.216830-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:00:35","name":"RISC-V: Add vmaxu.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080035.216830-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52388,"url":"https://patchwork.plctlab.org/api/1.2/patches/52388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080932.227891-1-juzhe.zhong@rivai.ai/","msgid":"<20230203080932.227891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:09:32","name":"RISC-V: Add vmax.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080932.227891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52389,"url":"https://patchwork.plctlab.org/api/1.2/patches/52389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081138.229977-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081138.229977-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:11:38","name":"RISC-V: Add vdivu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081138.229977-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52391,"url":"https://patchwork.plctlab.org/api/1.2/patches/52391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081257.231058-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081257.231058-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:12:57","name":"RISC-V: Add vdiv.vx C++ API test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081257.231058-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52392,"url":"https://patchwork.plctlab.org/api/1.2/patches/52392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081405.232059-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081405.232059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:14:05","name":"RISC-V: Add vand.vx C++ API test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081405.232059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52410,"url":"https://patchwork.plctlab.org/api/1.2/patches/52410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203085043.157321-1-aldyh@redhat.com/","msgid":"<20230203085043.157321-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-02-03T08:50:43","name":"[PR,tree-optimization/18639] Compare nonzero bits in irange with widest_int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203085043.157321-1-aldyh@redhat.com/mbox/"},{"id":52417,"url":"https://patchwork.plctlab.org/api/1.2/patches/52417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203090544.2528175-1-yunqiang.su@cipunited.com/","msgid":"<20230203090544.2528175-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-02-03T09:05:44","name":"MIPS: use arch_32/64 instead of default_mips_arch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203090544.2528175-1-yunqiang.su@cipunited.com/mbox/"},{"id":52418,"url":"https://patchwork.plctlab.org/api/1.2/patches/52418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycjcdoo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T09:15:35","name":"ifcvt: Fix regression in aarch64/fcsel_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycjcdoo.fsf@arm.com/mbox/"},{"id":52434,"url":"https://patchwork.plctlab.org/api/1.2/patches/52434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203094259.673-1-jinma@linux.alibaba.com/","msgid":"<20230203094259.673-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-03T09:42:59","name":"[v1] RISC-V: Change the generation mode of ADJUST_SP_RTX from gen_insn to gen_SET.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203094259.673-1-jinma@linux.alibaba.com/mbox/"},{"id":52455,"url":"https://patchwork.plctlab.org/api/1.2/patches/52455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-2-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:05","name":"[1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-2-guojiufu@linux.ibm.com/mbox/"},{"id":52457,"url":"https://patchwork.plctlab.org/api/1.2/patches/52457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-3-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:06","name":"[2/4] rs6000: build constant via lis;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-3-guojiufu@linux.ibm.com/mbox/"},{"id":52456,"url":"https://patchwork.plctlab.org/api/1.2/patches/52456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-4-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-4-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:07","name":"[3/4] rs6000: build constant via li/lis;rldicl/rldicr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-4-guojiufu@linux.ibm.com/mbox/"},{"id":52458,"url":"https://patchwork.plctlab.org/api/1.2/patches/52458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-5-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-5-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:08","name":"[4/4] rs6000: build constant via li/lis;rldic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-5-guojiufu@linux.ibm.com/mbox/"},{"id":52483,"url":"https://patchwork.plctlab.org/api/1.2/patches/52483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203130539.12F0A1346D@imap2.suse-dmz.suse.de/","msgid":"<20230203130539.12F0A1346D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-03T13:05:38","name":"Speedup cse_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203130539.12F0A1346D@imap2.suse-dmz.suse.de/mbox/"},{"id":52490,"url":"https://patchwork.plctlab.org/api/1.2/patches/52490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com/","msgid":"<6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com>","list_archive_url":null,"date":"2023-02-03T13:44:33","name":"openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com/mbox/"},{"id":52522,"url":"https://patchwork.plctlab.org/api/1.2/patches/52522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203140650.E72031346D@imap2.suse-dmz.suse.de/","msgid":"<20230203140650.E72031346D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-03T14:06:50","name":"Improve RTL CSE hash table hash usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203140650.E72031346D@imap2.suse-dmz.suse.de/mbox/"},{"id":52544,"url":"https://patchwork.plctlab.org/api/1.2/patches/52544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelels1w.fsf@debian/","msgid":"<87lelels1w.fsf@debian>","list_archive_url":null,"date":"2023-02-03T14:52:43","name":"[wwwdocs] document modula-2 in gcc-13/changes.html (and index.html)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelels1w.fsf@debian/mbox/"},{"id":52600,"url":"https://patchwork.plctlab.org/api/1.2/patches/52600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203175022.690671-1-xry111@xry111.site/","msgid":"<20230203175022.690671-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-02-03T17:50:22","name":"LoongArch: Generate bytepick.[wd] for suitable bit operation pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203175022.690671-1-xry111@xry111.site/mbox/"},{"id":52602,"url":"https://patchwork.plctlab.org/api/1.2/patches/52602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Nl/1HqWGOHLGK@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T18:08:23","name":"[v2] c++: wrong error with constexpr array and value-init [PR108158]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Nl/1HqWGOHLGK@redhat.com/mbox/"},{"id":52603,"url":"https://patchwork.plctlab.org/api/1.2/patches/52603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203180918.6417-1-aldyh@redhat.com/","msgid":"<20230203180918.6417-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-02-03T18:09:18","name":"range-ops: Handle undefined ranges in frange op[12]_range [PR108647]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203180918.6417-1-aldyh@redhat.com/mbox/"},{"id":52612,"url":"https://patchwork.plctlab.org/api/1.2/patches/52612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203185103.802749-1-polacek@redhat.com/","msgid":"<20230203185103.802749-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-03T18:51:03","name":"[pushed] c++: Add fixed test [PR101071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203185103.802749-1-polacek@redhat.com/mbox/"},{"id":52635,"url":"https://patchwork.plctlab.org/api/1.2/patches/52635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Zmsx+2oWM4Wvs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T18:59:39","name":"range-op: Handle op?.undefined_p () in op[12]_range of comparisons [PR108647]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Zmsx+2oWM4Wvs@tucnak/mbox/"},{"id":52634,"url":"https://patchwork.plctlab.org/api/1.2/patches/52634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91ah+TPG01V1g/A@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T19:03:36","name":"fortran: Fix up hash table usage in gfc_trans_use_stmts [PR108451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91ah+TPG01V1g/A@tucnak/mbox/"},{"id":52633,"url":"https://patchwork.plctlab.org/api/1.2/patches/52633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91bM7eeiHWZMwWI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T19:06:29","name":"ubsan: Fix up another spot that should have been BUILT_IN_UNREACHABLE_TRAPS [PR108655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91bM7eeiHWZMwWI@tucnak/mbox/"},{"id":52617,"url":"https://patchwork.plctlab.org/api/1.2/patches/52617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192011.C853A33EBF@hamza.pair.com/","msgid":"<20230203192011.C853A33EBF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T19:20:09","name":"[pushed] libstdc++: Tweak link to ABIcheck project","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192011.C853A33EBF@hamza.pair.com/mbox/"},{"id":52618,"url":"https://patchwork.plctlab.org/api/1.2/patches/52618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192645.9F17B33EE5@hamza.pair.com/","msgid":"<20230203192645.9F17B33EE5@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T19:26:44","name":"[pushed] wwwdocs: news/profiledriven: Move citeseerx.ist.psu.edu to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192645.9F17B33EE5@hamza.pair.com/mbox/"},{"id":52652,"url":"https://patchwork.plctlab.org/api/1.2/patches/52652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y916x1jPlcL5QOSE@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:21:11","name":"[1/8] PowerPC: Add -mcpu=future.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y916x1jPlcL5QOSE@toto.the-meissners.org/mbox/"},{"id":52653,"url":"https://patchwork.plctlab.org/api/1.2/patches/52653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y917UQxGb0iODU2Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:23:29","name":"[1/8] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y917UQxGb0iODU2Y@toto.the-meissners.org/mbox/"},{"id":52654,"url":"https://patchwork.plctlab.org/api/1.2/patches/52654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91702u4TmGb5Rxb@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:25:39","name":"[2/8] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91702u4TmGb5Rxb@toto.the-meissners.org/mbox/"},{"id":52656,"url":"https://patchwork.plctlab.org/api/1.2/patches/52656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918V8nqMRpVrb5Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:27:51","name":"[3/8] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918V8nqMRpVrb5Y@toto.the-meissners.org/mbox/"},{"id":52657,"url":"https://patchwork.plctlab.org/api/1.2/patches/52657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918tc2F14HMOlFh@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:29:25","name":"[4/8] PowerPC: Switch to dense math names for all MMA operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918tc2F14HMOlFh@toto.the-meissners.org/mbox/"},{"id":52658,"url":"https://patchwork.plctlab.org/api/1.2/patches/52658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y919ndtcPsz+9doP@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:33:17","name":"[6/8] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y919ndtcPsz+9doP@toto.the-meissners.org/mbox/"},{"id":52659,"url":"https://patchwork.plctlab.org/api/1.2/patches/52659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+UgGTq1udBRS6@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:36:18","name":"[7/8] Support load/store vector with right length.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+UgGTq1udBRS6@toto.the-meissners.org/mbox/"},{"id":52660,"url":"https://patchwork.plctlab.org/api/1.2/patches/52660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+hDeMysjK0B4Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:37:08","name":"[8/8] Add saturating subtract built-ins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+hDeMysjK0B4Y@toto.the-meissners.org/mbox/"},{"id":52700,"url":"https://patchwork.plctlab.org/api/1.2/patches/52700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203225724.4FEBE33EB9@hamza.pair.com/","msgid":"<20230203225724.4FEBE33EB9@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T22:57:07","name":"[pushed] libstdc++: Adjust link to pdftex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203225724.4FEBE33EB9@hamza.pair.com/mbox/"},{"id":52703,"url":"https://patchwork.plctlab.org/api/1.2/patches/52703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232115.223866-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232115.223866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:21:15","name":"RISC-V: Add unary C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232115.223866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52704,"url":"https://patchwork.plctlab.org/api/1.2/patches/52704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232240.224110-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232240.224110-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:22:40","name":"RISC-V: Add vnot.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232240.224110-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52705,"url":"https://patchwork.plctlab.org/api/1.2/patches/52705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232408.224338-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232408.224338-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:24:08","name":"RISC-V: Add vneg.v C/C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232408.224338-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52706,"url":"https://patchwork.plctlab.org/api/1.2/patches/52706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232522.224551-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232522.224551-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:25:22","name":"RISC-V: Add unary constraint tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232522.224551-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52708,"url":"https://patchwork.plctlab.org/api/1.2/patches/52708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232641.224761-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232641.224761-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:26:41","name":"RISC-V: Add vnot.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232641.224761-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52709,"url":"https://patchwork.plctlab.org/api/1.2/patches/52709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232759.224994-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232759.224994-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:27:59","name":"RISC-V: Add vneg.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232759.224994-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52715,"url":"https://patchwork.plctlab.org/api/1.2/patches/52715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204010930.263271-1-juzhe.zhong@rivai.ai/","msgid":"<20230204010930.263271-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-04T01:09:30","name":"RISC-V: Fix VSETVL PASS bug in exception handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204010930.263271-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52723,"url":"https://patchwork.plctlab.org/api/1.2/patches/52723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204031940.A747420426@pchp3.se.axis.com/","msgid":"<20230204031940.A747420426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-04T03:19:40","name":"libstdc++: Avoid use of naked int32_t in unseq_backend_simd.h, PR108672","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204031940.A747420426@pchp3.se.axis.com/mbox/"},{"id":52793,"url":"https://patchwork.plctlab.org/api/1.2/patches/52793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204165033.4026-1-ed@catmur.uk/","msgid":"<20230204165033.4026-1-ed@catmur.uk>","list_archive_url":null,"date":"2023-02-04T16:50:33","name":"[v3] emit DW_AT_name for DW_TAG_GNU_formal_parameter_pack [PR70536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204165033.4026-1-ed@catmur.uk/mbox/"},{"id":52819,"url":"https://patchwork.plctlab.org/api/1.2/patches/52819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203126.782976-1-ppalka@redhat.com/","msgid":"<20230204203126.782976-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-04T20:31:26","name":"c++: equivalence of non-dependent calls [PR107461]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203126.782976-1-ppalka@redhat.com/mbox/"},{"id":52817,"url":"https://patchwork.plctlab.org/api/1.2/patches/52817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203329.F1A8933E56@hamza.pair.com/","msgid":"<20230204203329.F1A8933E56@hamza.pair.com>","list_archive_url":null,"date":"2023-02-04T20:33:25","name":"[pushed] wwwdocs: projects/beginner: Remove traces of Interix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203329.F1A8933E56@hamza.pair.com/mbox/"},{"id":52818,"url":"https://patchwork.plctlab.org/api/1.2/patches/52818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com/","msgid":"<000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-02-04T20:33:54","name":"[DOC] Document the VEC_PERM_EXPR tree code (and minor clean-ups).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com/mbox/"},{"id":52834,"url":"https://patchwork.plctlab.org/api/1.2/patches/52834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y977ZULaCk6iP74+@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-02-05T00:42:13","name":"Enable AVX512 512bit vectors by default on Zen4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y977ZULaCk6iP74+@kam.mff.cuni.cz/mbox/"},{"id":52851,"url":"https://patchwork.plctlab.org/api/1.2/patches/52851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205014738.8722-1-juzhe.zhong@rivai.ai/","msgid":"<20230205014738.8722-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:47:38","name":"RISC-V: Add saturating Addition && Subtraction C/C++ Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205014738.8722-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52852,"url":"https://patchwork.plctlab.org/api/1.2/patches/52852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015031.9176-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015031.9176-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:50:31","name":"RISC-V: Add saturating Add && Sub vx constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015031.9176-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52853,"url":"https://patchwork.plctlab.org/api/1.2/patches/52853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015155.9413-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015155.9413-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:51:55","name":"RISC-V: Add vsadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015155.9413-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52854,"url":"https://patchwork.plctlab.org/api/1.2/patches/52854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015350.9716-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015350.9716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:53:50","name":"RISC-V: Add vsaddu.vv C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015350.9716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52855,"url":"https://patchwork.plctlab.org/api/1.2/patches/52855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015510.9957-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015510.9957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:55:10","name":"RISC-V: Add vsub.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015510.9957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52856,"url":"https://patchwork.plctlab.org/api/1.2/patches/52856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015622.10172-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015622.10172-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:56:22","name":"RISC-V: Add vssubu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015622.10172-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52857,"url":"https://patchwork.plctlab.org/api/1.2/patches/52857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015742.10412-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015742.10412-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:57:42","name":"RISC-V: Add vssubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015742.10412-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52858,"url":"https://patchwork.plctlab.org/api/1.2/patches/52858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015851.10635-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015851.10635-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:58:51","name":"RISC-V: Add vssub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015851.10635-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52859,"url":"https://patchwork.plctlab.org/api/1.2/patches/52859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015955.10847-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015955.10847-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:59:55","name":"RISC-V: Add vsaddu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015955.10847-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52860,"url":"https://patchwork.plctlab.org/api/1.2/patches/52860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205020106.11182-1-juzhe.zhong@rivai.ai/","msgid":"<20230205020106.11182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T02:01:06","name":"RISC-V: Add vsadd.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205020106.11182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52872,"url":"https://patchwork.plctlab.org/api/1.2/patches/52872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com/","msgid":"<0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:34","name":"[1/3] Allow default libc to be specified to configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com/mbox/"},{"id":52870,"url":"https://patchwork.plctlab.org/api/1.2/patches/52870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com/","msgid":"<7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:35","name":"[2/3] Add newlib and picolibc as default C library choices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com/mbox/"},{"id":52871,"url":"https://patchwork.plctlab.org/api/1.2/patches/52871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com/","msgid":"<266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:36","name":"[3/3] Add '\''--oslib='\'' option when default C library is picolibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com/mbox/"},{"id":52874,"url":"https://patchwork.plctlab.org/api/1.2/patches/52874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205081827.176653-1-juzhe.zhong@rivai.ai/","msgid":"<20230205081827.176653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:18:27","name":"RISC-V: Add vssubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205081827.176653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52875,"url":"https://patchwork.plctlab.org/api/1.2/patches/52875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082119.178471-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082119.178471-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:21:19","name":"RISC-V: Add vssub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082119.178471-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52876,"url":"https://patchwork.plctlab.org/api/1.2/patches/52876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082239.179197-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082239.179197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:22:39","name":"RISC-V: Add vsaddu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082239.179197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52877,"url":"https://patchwork.plctlab.org/api/1.2/patches/52877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082344.179805-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082344.179805-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:23:43","name":"RISC-V: Add vsadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082344.179805-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52878,"url":"https://patchwork.plctlab.org/api/1.2/patches/52878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082455.180453-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082455.180453-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:24:55","name":"RISC-V: Add vssubu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082455.180453-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52879,"url":"https://patchwork.plctlab.org/api/1.2/patches/52879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082606.181085-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082606.181085-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:26:06","name":"RISC-V: Add vssub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082606.181085-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52880,"url":"https://patchwork.plctlab.org/api/1.2/patches/52880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082757.182031-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082757.182031-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:27:57","name":"RISC-V: Add vsaddu.vx overloaded API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082757.182031-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52881,"url":"https://patchwork.plctlab.org/api/1.2/patches/52881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082927.182829-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082927.182829-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:29:27","name":"RISC-V: Add vsadd.vx C++ overloaded API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082927.182829-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52919,"url":"https://patchwork.plctlab.org/api/1.2/patches/52919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180237.F173233E8A@hamza.pair.com/","msgid":"<20230205180237.F173233E8A@hamza.pair.com>","list_archive_url":null,"date":"2023-02-05T18:02:35","name":"[pushed] wwwdocs: mirrors: Remove ftp.uvsq.fr mirror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180237.F173233E8A@hamza.pair.com/mbox/"},{"id":52920,"url":"https://patchwork.plctlab.org/api/1.2/patches/52920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180947.BA75A33E82@hamza.pair.com/","msgid":"<20230205180947.BA75A33E82@hamza.pair.com>","list_archive_url":null,"date":"2023-02-05T18:09:45","name":"[pushed] doc: Remove note on PW32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180947.BA75A33E82@hamza.pair.com/mbox/"},{"id":52990,"url":"https://patchwork.plctlab.org/api/1.2/patches/52990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050656.211738-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050656.211738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:06:56","name":"RISC-V: Add vsext/vzext C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050656.211738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52991,"url":"https://patchwork.plctlab.org/api/1.2/patches/52991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050839.214506-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050839.214506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:08:39","name":"RISC-V: Add vzext.vf8 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050839.214506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52992,"url":"https://patchwork.plctlab.org/api/1.2/patches/52992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050949.215140-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050949.215140-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:09:49","name":"RISC-V: Add vzext.vf4 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050949.215140-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52993,"url":"https://patchwork.plctlab.org/api/1.2/patches/52993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051106.215903-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051106.215903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:11:06","name":"RISC-V: Add vzext.vf2 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051106.215903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52994,"url":"https://patchwork.plctlab.org/api/1.2/patches/52994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051238.216703-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051238.216703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:12:38","name":"RISC-V: Add vsext.vf8 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051238.216703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52995,"url":"https://patchwork.plctlab.org/api/1.2/patches/52995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051504.220629-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051504.220629-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:15:04","name":"RISC-V: Add vsext.vf4 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051504.220629-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52996,"url":"https://patchwork.plctlab.org/api/1.2/patches/52996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051704.224015-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051704.224015-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:17:04","name":"RISC-V: Add vsext.vf2 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051704.224015-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52997,"url":"https://patchwork.plctlab.org/api/1.2/patches/52997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051836.225790-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051836.225790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:18:36","name":"RISC-V: Add vsext constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051836.225790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52998,"url":"https://patchwork.plctlab.org/api/1.2/patches/52998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052030.229222-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052030.229222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:20:30","name":"RISC-V: Add vzext.vf8 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052030.229222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52999,"url":"https://patchwork.plctlab.org/api/1.2/patches/52999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052327.233617-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052327.233617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:23:27","name":"RISC-V: Add vzext.vf4 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052327.233617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53000,"url":"https://patchwork.plctlab.org/api/1.2/patches/53000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052429.234436-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052429.234436-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:24:29","name":"RISC-V: Add vzext.vf2 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052429.234436-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53001,"url":"https://patchwork.plctlab.org/api/1.2/patches/53001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052547.235133-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052547.235133-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:25:47","name":"RISC-V: Add vsext C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052547.235133-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53193,"url":"https://patchwork.plctlab.org/api/1.2/patches/53193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16895-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-06T11:39:23","name":"AArch64[committed] testsuite: remove broken test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16895-tamar@arm.com/mbox/"},{"id":53194,"url":"https://patchwork.plctlab.org/api/1.2/patches/53194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206115113.47100-1-juzhe.zhong@rivai.ai/","msgid":"<20230206115113.47100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T11:51:13","name":"RISC-V: Add vmulh C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206115113.47100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53195,"url":"https://patchwork.plctlab.org/api/1.2/patches/53195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com/","msgid":"<85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com>","list_archive_url":null,"date":"2023-02-06T11:52:11","name":"libgomp: Fix reverse-offload for GOMP_MAP_TO_PSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com/mbox/"},{"id":53201,"url":"https://patchwork.plctlab.org/api/1.2/patches/53201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120519.48787-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120519.48787-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:05:19","name":"RISC-V: Add vmulhu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120519.48787-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53203,"url":"https://patchwork.plctlab.org/api/1.2/patches/53203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120652.49229-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120652.49229-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:06:52","name":"RISC-V: Add vmulhu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120652.49229-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53204,"url":"https://patchwork.plctlab.org/api/1.2/patches/53204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120842.49589-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120842.49589-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:08:42","name":"RISC-V: Add vmulhsu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120842.49589-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53210,"url":"https://patchwork.plctlab.org/api/1.2/patches/53210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120945.49797-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120945.49797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:09:45","name":"RISC-V: Add vmulhsu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120945.49797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53217,"url":"https://patchwork.plctlab.org/api/1.2/patches/53217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206124533.88066-1-juzhe.zhong@rivai.ai/","msgid":"<20230206124533.88066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:45:33","name":"RISC-V: Add vmulh.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206124533.88066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53218,"url":"https://patchwork.plctlab.org/api/1.2/patches/53218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125034.88928-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125034.88928-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:50:34","name":"RISC-V: Add vmulh.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125034.88928-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53219,"url":"https://patchwork.plctlab.org/api/1.2/patches/53219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125207.89256-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125207.89256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:52:07","name":"RISC-V: Add vmulhu.vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125207.89256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53220,"url":"https://patchwork.plctlab.org/api/1.2/patches/53220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125551.89879-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125551.89879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:55:51","name":"RISC-V: Add vmulhsu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125551.89879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53221,"url":"https://patchwork.plctlab.org/api/1.2/patches/53221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130045.92105-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130045.92105-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:00:45","name":"RISC-V: Add vmulhsu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130045.92105-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53222,"url":"https://patchwork.plctlab.org/api/1.2/patches/53222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130248.92565-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130248.92565-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:02:48","name":"RISC-V: Add vmulh.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130248.92565-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53223,"url":"https://patchwork.plctlab.org/api/1.2/patches/53223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130405.92876-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130405.92876-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:04:05","name":"RISC-V: Add vmulh.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130405.92876-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53227,"url":"https://patchwork.plctlab.org/api/1.2/patches/53227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+D7p8r66hgkCR1y@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-06T13:07:51","name":"aarch64: Fix up bfmlal lane pattern [PR104921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+D7p8r66hgkCR1y@arm.com/mbox/"},{"id":53253,"url":"https://patchwork.plctlab.org/api/1.2/patches/53253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206134723.3391910-1-qing.zhao@oracle.com/","msgid":"<20230206134723.3391910-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-06T13:47:23","name":"[V2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206134723.3391910-1-qing.zhao@oracle.com/mbox/"},{"id":53311,"url":"https://patchwork.plctlab.org/api/1.2/patches/53311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142417.2969781-1-jwakely@redhat.com/","msgid":"<20230206142417.2969781-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:24:17","name":"[committed] libstdc++: Disable building additional archives for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142417.2969781-1-jwakely@redhat.com/mbox/"},{"id":53313,"url":"https://patchwork.plctlab.org/api/1.2/patches/53313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142601.2970070-1-jwakely@redhat.com/","msgid":"<20230206142601.2970070-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:26:01","name":"[committed] libstdc++: Fix testsuite warnings about new C++23 deprecations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142601.2970070-1-jwakely@redhat.com/mbox/"},{"id":53312,"url":"https://patchwork.plctlab.org/api/1.2/patches/53312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142606.2970099-1-jwakely@redhat.com/","msgid":"<20230206142606.2970099-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:26:06","name":"[committed] libstdc++: Fix non-reserved name for template parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142606.2970099-1-jwakely@redhat.com/mbox/"},{"id":53326,"url":"https://patchwork.plctlab.org/api/1.2/patches/53326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206144752.3829182-1-andrea.corallo@arm.com/","msgid":"<20230206144752.3829182-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-02-06T14:47:52","name":"aarch64: Fix return_address_sign_ab_exception.C regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206144752.3829182-1-andrea.corallo@arm.com/mbox/"},{"id":53344,"url":"https://patchwork.plctlab.org/api/1.2/patches/53344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmttzyx1b3.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-06T15:26:24","name":"lto-wrapper: Pass through -funwind-tables and -fasynchronous-unwind-tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmttzyx1b3.fsf@suse.de/mbox/"},{"id":53442,"url":"https://patchwork.plctlab.org/api/1.2/patches/53442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com/","msgid":"<03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com>","list_archive_url":null,"date":"2023-02-06T17:22:31","name":"[committed] amdgcn: Pass -mstack-size through to runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com/mbox/"},{"id":53482,"url":"https://patchwork.plctlab.org/api/1.2/patches/53482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9557dbd4-3896-48bc-8096-d72310da093c-1675714238918@3c-app-gmx-bap04/","msgid":"","list_archive_url":null,"date":"2023-02-06T20:10:38","name":"Fortran: ASSOCIATE variables should not be TREE_STATIC [PR95107]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9557dbd4-3896-48bc-8096-d72310da093c-1675714238918@3c-app-gmx-bap04/mbox/"},{"id":53486,"url":"https://patchwork.plctlab.org/api/1.2/patches/53486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206201852.71EDF33EC1@hamza.pair.com/","msgid":"<20230206201852.71EDF33EC1@hamza.pair.com>","list_archive_url":null,"date":"2023-02-06T20:18:40","name":"[pushed] wwwdocs: projects/tree-ssa: Use our own copy of GCC Summit 2007 proceedings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206201852.71EDF33EC1@hamza.pair.com/mbox/"},{"id":53491,"url":"https://patchwork.plctlab.org/api/1.2/patches/53491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206203017.CA4B133ECF@hamza.pair.com/","msgid":"<20230206203017.CA4B133ECF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-06T20:30:15","name":"[pushed] wwwdocs: readings: Update reference for Blackfin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206203017.CA4B133ECF@hamza.pair.com/mbox/"},{"id":53701,"url":"https://patchwork.plctlab.org/api/1.2/patches/53701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061424.32134-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061424.32134-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:14:24","name":"RISC-V: Add integer widening instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061424.32134-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53702,"url":"https://patchwork.plctlab.org/api/1.2/patches/53702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061601.33379-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061601.33379-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:16:01","name":"RISC-V: Add vwsubu.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061601.33379-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53703,"url":"https://patchwork.plctlab.org/api/1.2/patches/53703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061712.33613-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061712.33613-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:17:12","name":"RISC-V: Add vwsubu.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061712.33613-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53704,"url":"https://patchwork.plctlab.org/api/1.2/patches/53704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061823.33859-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061823.33859-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:18:23","name":"RISC-V: Add vwsubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061823.33859-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53705,"url":"https://patchwork.plctlab.org/api/1.2/patches/53705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061932.34795-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061932.34795-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:19:32","name":"RISC-V: Add vwsubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061932.34795-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53706,"url":"https://patchwork.plctlab.org/api/1.2/patches/53706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062444.36747-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062444.36747-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:24:44","name":"RISC-V: Add vwsub.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062444.36747-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53707,"url":"https://patchwork.plctlab.org/api/1.2/patches/53707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062554.36985-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062554.36985-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:25:54","name":"RISC-V: Add vwsub.wv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062554.36985-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53709,"url":"https://patchwork.plctlab.org/api/1.2/patches/53709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062702.37203-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062702.37203-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:27:02","name":"RISC-V: Add vwsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062702.37203-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53711,"url":"https://patchwork.plctlab.org/api/1.2/patches/53711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062800.37431-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062800.37431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:28:00","name":"RISC-V: Add vwsub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062800.37431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53712,"url":"https://patchwork.plctlab.org/api/1.2/patches/53712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062916.38206-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062916.38206-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:29:16","name":"RISC-V: Add vwmulu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062916.38206-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53713,"url":"https://patchwork.plctlab.org/api/1.2/patches/53713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063051.38606-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063051.38606-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:30:51","name":"RISC-V: Add vwmulsu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063051.38606-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53715,"url":"https://patchwork.plctlab.org/api/1.2/patches/53715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063224.39064-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063224.39064-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:32:24","name":"RISC-V: Add vwmul C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063224.39064-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53716,"url":"https://patchwork.plctlab.org/api/1.2/patches/53716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063328.39329-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063328.39329-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:33:28","name":"RISC-V: Add vwcvt C API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063328.39329-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53717,"url":"https://patchwork.plctlab.org/api/1.2/patches/53717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063447.39828-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063447.39828-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:34:47","name":"RISC-V: Add vwaddu.w C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063447.39828-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53718,"url":"https://patchwork.plctlab.org/api/1.2/patches/53718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063549.40062-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063549.40062-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:35:49","name":"RISC-V: Add vwaddu.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063549.40062-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53719,"url":"https://patchwork.plctlab.org/api/1.2/patches/53719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063655.40286-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063655.40286-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:36:55","name":"RISC-V: Add vwadd.w C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063655.40286-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53721,"url":"https://patchwork.plctlab.org/api/1.2/patches/53721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063807.40519-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063807.40519-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:38:07","name":"RISC-V: Add vwadd.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063807.40519-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53722,"url":"https://patchwork.plctlab.org/api/1.2/patches/53722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063927.40790-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063927.40790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:39:27","name":"RISC-V: Add constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063927.40790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53723,"url":"https://patchwork.plctlab.org/api/1.2/patches/53723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064038.41137-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064038.41137-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:40:38","name":"RISC-V: Add vwsubu.w C++ api TETS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064038.41137-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53724,"url":"https://patchwork.plctlab.org/api/1.2/patches/53724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064145.41499-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064145.41499-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:41:45","name":"RISC-V: Add vwsubu.v C++ API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064145.41499-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53725,"url":"https://patchwork.plctlab.org/api/1.2/patches/53725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064305.41749-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064305.41749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:43:05","name":"RISC-V: Add vwsub.w C++ api TESTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064305.41749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53726,"url":"https://patchwork.plctlab.org/api/1.2/patches/53726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064426.43100-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064426.43100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:44:26","name":"RISC-V: Add vwsub.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064426.43100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53727,"url":"https://patchwork.plctlab.org/api/1.2/patches/53727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064535.43364-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064535.43364-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:45:35","name":"RISC-V: Add vwmulu C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064535.43364-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53729,"url":"https://patchwork.plctlab.org/api/1.2/patches/53729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064648.45113-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064648.45113-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:46:48","name":"RISC-V: Add vwmulsu.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064648.45113-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53730,"url":"https://patchwork.plctlab.org/api/1.2/patches/53730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064805.45508-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064805.45508-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:48:05","name":"RISC-V: Add vwmul.v C++ api TETS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064805.45508-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53731,"url":"https://patchwork.plctlab.org/api/1.2/patches/53731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064913.45829-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064913.45829-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:49:13","name":"RISC-V: Add vwcvt C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064913.45829-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53732,"url":"https://patchwork.plctlab.org/api/1.2/patches/53732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065045.49209-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065045.49209-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:50:45","name":"RISC-V: Add vwaddu.w c++ API TESTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065045.49209-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53733,"url":"https://patchwork.plctlab.org/api/1.2/patches/53733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065155.49564-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065155.49564-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:51:55","name":"RISC-V: Add vwaddu.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065155.49564-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53734,"url":"https://patchwork.plctlab.org/api/1.2/patches/53734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065330.50802-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065330.50802-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:53:30","name":"RISC-V: Add vwadd.w C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065330.50802-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53735,"url":"https://patchwork.plctlab.org/api/1.2/patches/53735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065426.51963-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065426.51963-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:54:25","name":"RISC-V: Add vwadd v C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065426.51963-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53764,"url":"https://patchwork.plctlab.org/api/1.2/patches/53764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207074916.116648-1-juzhe.zhong@rivai.ai/","msgid":"<20230207074916.116648-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T07:49:16","name":"RISC-V: allow vx instruction use \"zero\" as scalar register.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207074916.116648-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53775,"url":"https://patchwork.plctlab.org/api/1.2/patches/53775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+INds/30aydJlJj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T08:36:06","name":"cgraph: Handle simd clones in cgraph_node::set_{const,pure}_flag [PR106433]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+INds/30aydJlJj@tucnak/mbox/"},{"id":53778,"url":"https://patchwork.plctlab.org/api/1.2/patches/53778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IO2AZAm6WPtrQh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T08:42:00","name":"ipa-split: Don'\''t split returns_twice functions [PR106923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IO2AZAm6WPtrQh@tucnak/mbox/"},{"id":53792,"url":"https://patchwork.plctlab.org/api/1.2/patches/53792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IY7Er3m7bAxKCS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T09:25:00","name":"[committed] testsuite: Expect -Wdeprecated warning in warn/Wstrict-aliasing-bogus-union-2.C for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IY7Er3m7bAxKCS@tucnak/mbox/"},{"id":53817,"url":"https://patchwork.plctlab.org/api/1.2/patches/53817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v17oqh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-07T10:29:26","name":"lra: Replace subregs in bare uses & clobbers [PR108681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v17oqh.fsf@arm.com/mbox/"},{"id":53866,"url":"https://patchwork.plctlab.org/api/1.2/patches/53866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207124156.853506-1-vit.kabele@sysgo.com/","msgid":"<20230207124156.853506-1-vit.kabele@sysgo.com>","list_archive_url":null,"date":"2023-02-07T12:41:57","name":"Print padding size when aligning struct member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207124156.853506-1-vit.kabele@sysgo.com/mbox/"},{"id":53885,"url":"https://patchwork.plctlab.org/api/1.2/patches/53885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207132511.94760-1-guojiufu@linux.ibm.com/","msgid":"<20230207132511.94760-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-07T13:25:11","name":"rs6000: Add new patterns rlwinm with mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207132511.94760-1-guojiufu@linux.ibm.com/mbox/"},{"id":53887,"url":"https://patchwork.plctlab.org/api/1.2/patches/53887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207133828.B735D139ED@imap2.suse-dmz.suse.de/","msgid":"<20230207133828.B735D139ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-07T13:38:28","name":"tree-optimization/26854 - compile-time hog in SSA forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207133828.B735D139ED@imap2.suse-dmz.suse.de/mbox/"},{"id":53889,"url":"https://patchwork.plctlab.org/api/1.2/patches/53889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de/","msgid":"<20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-07T13:49:20","name":"tree-optimization/26854 - slow bitmap operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de/mbox/"},{"id":53918,"url":"https://patchwork.plctlab.org/api/1.2/patches/53918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com/","msgid":"<7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com>","list_archive_url":null,"date":"2023-02-07T14:07:56","name":"[pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com/mbox/"},{"id":53991,"url":"https://patchwork.plctlab.org/api/1.2/patches/53991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+KAUnyceKGxghOR@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-07T16:46:10","name":"[v4] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+KAUnyceKGxghOR@redhat.com/mbox/"},{"id":53992,"url":"https://patchwork.plctlab.org/api/1.2/patches/53992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207164847.30568-1-polacek@redhat.com/","msgid":"<20230207164847.30568-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-07T16:48:47","name":"[pushed] doc: Update -fchar8_t documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207164847.30568-1-polacek@redhat.com/mbox/"},{"id":53993,"url":"https://patchwork.plctlab.org/api/1.2/patches/53993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207165000.AC93020426@pchp3.se.axis.com/","msgid":"<20230207165000.AC93020426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-07T16:50:00","name":"testsuite: XFAIL bogus g++.dg/warn/Wstringop-overflow-4.C:144, PR106120","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207165000.AC93020426@pchp3.se.axis.com/mbox/"},{"id":54040,"url":"https://patchwork.plctlab.org/api/1.2/patches/54040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207183813.978782042C@pchp3.se.axis.com/","msgid":"<20230207183813.978782042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-07T18:38:13","name":"testsuite: Generalize check_effective_target_lra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207183813.978782042C@pchp3.se.axis.com/mbox/"},{"id":54059,"url":"https://patchwork.plctlab.org/api/1.2/patches/54059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-157fad65-8e00-4b72-b203-2166df85c671-1675798593924@3c-app-gmx-bs54/","msgid":"","list_archive_url":null,"date":"2023-02-07T19:36:33","name":"Fortran: error handling of global entity appearing in COMMON block [PR103259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-157fad65-8e00-4b72-b203-2166df85c671-1675798593924@3c-app-gmx-bs54/mbox/"},{"id":54069,"url":"https://patchwork.plctlab.org/api/1.2/patches/54069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207201959.1545413-1-apinski@marvell.com/","msgid":"<20230207201959.1545413-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-07T20:19:59","name":"[COMMITTED,GCC,12] Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207201959.1545413-1-apinski@marvell.com/mbox/"},{"id":54083,"url":"https://patchwork.plctlab.org/api/1.2/patches/54083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207211357.1226071-1-dmalcolm@redhat.com/","msgid":"<20230207211357.1226071-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-07T21:13:57","name":"[pushed] analyzer: fix -Wanalyzer-use-of-uninitialized-value false +ve on \"read\" [PR108661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207211357.1226071-1-dmalcolm@redhat.com/mbox/"},{"id":54100,"url":"https://patchwork.plctlab.org/api/1.2/patches/54100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrxum82.fsf@euler.schwinge.homeip.net/","msgid":"<874jrxum82.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-07T22:47:25","name":"Fix '\''libgomp.fortran/reverse-offload-6.f90'\'' nvptx offloading compilation (was: [Patch] libgomp: Fix reverse offload issues)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrxum82.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54142,"url":"https://patchwork.plctlab.org/api/1.2/patches/54142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023024.225500-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023024.225500-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:30:24","name":"RISC-V: Add vadc/vsbc C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023024.225500-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54143,"url":"https://patchwork.plctlab.org/api/1.2/patches/54143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023229.225998-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023229.225998-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:32:29","name":"RISC-V: Add vadc.vvm/vadc.vxm C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023229.225998-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54144,"url":"https://patchwork.plctlab.org/api/1.2/patches/54144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023430.226464-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023430.226464-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:34:30","name":"RISC-V: Add vsbc.vvm/vsbc.vxm C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023430.226464-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54155,"url":"https://patchwork.plctlab.org/api/1.2/patches/54155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024725.229946-1-juzhe.zhong@rivai.ai/","msgid":"<20230208024725.229946-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:47:25","name":"RISC-V: Add vadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024725.229946-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54149,"url":"https://patchwork.plctlab.org/api/1.2/patches/54149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024910.230380-1-juzhe.zhong@rivai.ai/","msgid":"<20230208024910.230380-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:49:10","name":"RISC-V: Add vsbc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024910.230380-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54156,"url":"https://patchwork.plctlab.org/api/1.2/patches/54156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208025527.231767-1-juzhe.zhong@rivai.ai/","msgid":"<20230208025527.231767-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:55:27","name":"[2/3] RISC-V: Add vadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208025527.231767-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54158,"url":"https://patchwork.plctlab.org/api/1.2/patches/54158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208031059.248235-1-juzhe.zhong@rivai.ai/","msgid":"<20230208031059.248235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T03:10:59","name":"RISC-V: Fix indent [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208031059.248235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54179,"url":"https://patchwork.plctlab.org/api/1.2/patches/54179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com/","msgid":"<740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com>","list_archive_url":null,"date":"2023-02-08T05:08:28","name":"[rs6000] Split TImode for logical operations in expand pass [PR100694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com/mbox/"},{"id":54261,"url":"https://patchwork.plctlab.org/api/1.2/patches/54261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Niv1eQMRe80IJM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:52:15","name":"vect-patterns: Fix up vect_widened_op_tree [PR108692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Niv1eQMRe80IJM@tucnak/mbox/"},{"id":54263,"url":"https://patchwork.plctlab.org/api/1.2/patches/54263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlel87cug.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:58:31","name":"vect: Check gather/scatter offset types [PR108316]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlel87cug.fsf@arm.com/mbox/"},{"id":54262,"url":"https://patchwork.plctlab.org/api/1.2/patches/54262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NkZcal2ZRHLBZw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:59:17","name":"c++: Mangle EXCESS_PRECISION_EXPR as fold_convert REAL_CST [PR108698]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NkZcal2ZRHLBZw@tucnak/mbox/"},{"id":54288,"url":"https://patchwork.plctlab.org/api/1.2/patches/54288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NoWtjlMx8itfDf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T09:16:10","name":"tree.def: Remove outdated comment on SAD_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NoWtjlMx8itfDf@tucnak/mbox/"},{"id":54325,"url":"https://patchwork.plctlab.org/api/1.2/patches/54325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Nu6les4SuFnrsB@guest.guest/","msgid":"","list_archive_url":null,"date":"2023-02-08T09:44:10","name":"ada: Fix musl build on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Nu6les4SuFnrsB@guest.guest/mbox/"},{"id":54381,"url":"https://patchwork.plctlab.org/api/1.2/patches/54381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208105147.214712-1-juzhe.zhong@rivai.ai/","msgid":"<20230208105147.214712-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T10:51:47","name":"RISC-V: Fix indent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208105147.214712-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54420,"url":"https://patchwork.plctlab.org/api/1.2/patches/54420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at/","msgid":"<932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-08T12:02:36","name":"gimplify size expressions in parameters for all types [PR107557] [PR108423]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at/mbox/"},{"id":54424,"url":"https://patchwork.plctlab.org/api/1.2/patches/54424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Oc9UZp29kXsJPW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T13:00:37","name":"[committed] testsuite: Fix up PR108525 test [PR108525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Oc9UZp29kXsJPW@tucnak/mbox/"},{"id":54431,"url":"https://patchwork.plctlab.org/api/1.2/patches/54431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsbg6zr3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T13:41:20","name":"[pushed] testsuite: Import objc-dg-prune in execute.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsbg6zr3.fsf@arm.com/mbox/"},{"id":54544,"url":"https://patchwork.plctlab.org/api/1.2/patches/54544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-1-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:08","name":"[pushed,wwwdocs] gcc-13: linkify some options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-1-dmalcolm@redhat.com/mbox/"},{"id":54548,"url":"https://patchwork.plctlab.org/api/1.2/patches/54548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-2-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:09","name":"[pushed,wwwdocs] gcc-13: add SARIF and other diagnostics improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-2-dmalcolm@redhat.com/mbox/"},{"id":54549,"url":"https://patchwork.plctlab.org/api/1.2/patches/54549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-3-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:10","name":"[pushed,wwwdocs] gcc-13: add -Wxor-used-as-pow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-3-dmalcolm@redhat.com/mbox/"},{"id":54545,"url":"https://patchwork.plctlab.org/api/1.2/patches/54545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-4-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:11","name":"[pushed,wwwdocs] gcc-13: add analyzer improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-4-dmalcolm@redhat.com/mbox/"},{"id":54577,"url":"https://patchwork.plctlab.org/api/1.2/patches/54577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208185021.1281451-1-dmalcolm@redhat.com/","msgid":"<20230208185021.1281451-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T18:50:21","name":"[pushed] analyzer: fix overzealous state purging with on-stack structs [PR108704]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208185021.1281451-1-dmalcolm@redhat.com/mbox/"},{"id":54588,"url":"https://patchwork.plctlab.org/api/1.2/patches/54588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208191348.1580462-1-apinski@marvell.com/","msgid":"<20230208191348.1580462-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-08T19:13:48","name":"tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208191348.1580462-1-apinski@marvell.com/mbox/"},{"id":54600,"url":"https://patchwork.plctlab.org/api/1.2/patches/54600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208204551.0D78A2040B@pchp3.se.axis.com/","msgid":"<20230208204551.0D78A2040B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-08T20:45:51","name":"testsuite: Fix asm-goto-with-outputs tests; limit to lra targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208204551.0D78A2040B@pchp3.se.axis.com/mbox/"},{"id":54601,"url":"https://patchwork.plctlab.org/api/1.2/patches/54601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205236.267934-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205236.267934-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:52:36","name":"RISC-V: Add vmadc/vsbc C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205236.267934-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54602,"url":"https://patchwork.plctlab.org/api/1.2/patches/54602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205448.269030-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205448.269030-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:54:48","name":"RISC-V: Add vmadc C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205448.269030-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54603,"url":"https://patchwork.plctlab.org/api/1.2/patches/54603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205615.269803-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205615.269803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:56:15","name":"RISC-V: Add vmsbc C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205615.269803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54604,"url":"https://patchwork.plctlab.org/api/1.2/patches/54604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205727.270442-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205727.270442-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:57:26","name":"RISC-V: Add vmadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205727.270442-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54608,"url":"https://patchwork.plctlab.org/api/1.2/patches/54608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205837.271078-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205837.271078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:58:37","name":"RISC-V: Add vmsbc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205837.271078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54618,"url":"https://patchwork.plctlab.org/api/1.2/patches/54618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208210140.391014-1-polacek@redhat.com/","msgid":"<20230208210140.391014-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-08T21:01:40","name":"c++: ICE initing lifetime-extended constexpr var [PR107079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208210140.391014-1-polacek@redhat.com/mbox/"},{"id":54619,"url":"https://patchwork.plctlab.org/api/1.2/patches/54619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208211419.1583473-1-apinski@marvell.com/","msgid":"<20230208211419.1583473-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-08T21:14:19","name":"When simplifing BFR of an insert, require a mode precision integral type (PR108688)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208211419.1583473-1-apinski@marvell.com/mbox/"},{"id":54628,"url":"https://patchwork.plctlab.org/api/1.2/patches/54628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208214533.031B633E84@hamza.pair.com/","msgid":"<20230208214533.031B633E84@hamza.pair.com>","list_archive_url":null,"date":"2023-02-08T21:45:30","name":"[pushed] doc: Change fsf.org to www.fsf.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208214533.031B633E84@hamza.pair.com/mbox/"},{"id":54637,"url":"https://patchwork.plctlab.org/api/1.2/patches/54637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB54127FF670644B5182B84459ACD89@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T23:38:21","name":"libstdc++: testsuite: Add char8_t to codecvt_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB54127FF670644B5182B84459ACD89@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":54638,"url":"https://patchwork.plctlab.org/api/1.2/patches/54638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2c1ae82-25b0-6a50-ab6a-27a19c4117df@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T23:42:40","name":"[committed] c: Update checks on constexpr pointer initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2c1ae82-25b0-6a50-ab6a-27a19c4117df@codesourcery.com/mbox/"},{"id":54669,"url":"https://patchwork.plctlab.org/api/1.2/patches/54669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+RXRJj4upKUtccH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T02:15:32","name":"[v2] c++: ICE initing lifetime-extended constexpr var [PR107079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+RXRJj4upKUtccH@redhat.com/mbox/"},{"id":54797,"url":"https://patchwork.plctlab.org/api/1.2/patches/54797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209075101.2699033E6A@hamza.pair.com/","msgid":"<20230209075101.2699033E6A@hamza.pair.com>","list_archive_url":null,"date":"2023-02-09T07:50:58","name":"[pushed] wwwdocs: readings: Update MicroBlaze Processor Reference reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209075101.2699033E6A@hamza.pair.com/mbox/"},{"id":54800,"url":"https://patchwork.plctlab.org/api/1.2/patches/54800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+SxumGulM+AgYvM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T08:41:30","name":"c++, debug: Fix up locus of DW_TAG_imported_module [PR108716]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+SxumGulM+AgYvM@tucnak/mbox/"},{"id":54804,"url":"https://patchwork.plctlab.org/api/1.2/patches/54804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com/","msgid":"<026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com>","list_archive_url":null,"date":"2023-02-09T08:56:09","name":"Fortran/OpenMP: Fix -fopenmp-simd for '\''omp assume(s)'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com/mbox/"},{"id":54827,"url":"https://patchwork.plctlab.org/api/1.2/patches/54827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmfsbfuq3a.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-09T09:48:25","name":"testsuite: adjust patterns in RISC-V tests to skip unwind table directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmfsbfuq3a.fsf@suse.de/mbox/"},{"id":54855,"url":"https://patchwork.plctlab.org/api/1.2/patches/54855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0030ad6-b152-c307-7c0c-b2d447cb51fb@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-09T10:35:37","name":"docs: add cavear for __builtin_cpu_supports","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0030ad6-b152-c307-7c0c-b2d447cb51fb@suse.cz/mbox/"},{"id":54874,"url":"https://patchwork.plctlab.org/api/1.2/patches/54874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209110617.3370-2-shiyulong@iscas.ac.cn/","msgid":"<20230209110617.3370-2-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-09T11:06:17","name":"[V1,1/1] UNRATIFIED RISC-V: Add '\''ZiCond'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209110617.3370-2-shiyulong@iscas.ac.cn/mbox/"},{"id":54878,"url":"https://patchwork.plctlab.org/api/1.2/patches/54878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edqz1437.fsf@euler.schwinge.homeip.net/","msgid":"<87edqz1437.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:16:28","name":"[og12] '\''c-c++-common/gomp/alloc-pinned-1.c'\'' -> '\''libgomp.c-c++-common/alloc-pinned-1.c'\'' (was: [PATCH 5/5] openmp: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edqz1437.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54879,"url":"https://patchwork.plctlab.org/api/1.2/patches/54879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkm313m6.fsf@euler.schwinge.homeip.net/","msgid":"<87bkm313m6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:26:41","name":"[og12] '\''{c-c++-common,gfortran.dg}/gomp/uses_allocators-*'\'' -> '\''libgomp.{c-c++-common,fortran}/uses_allocators-*'\'' (was: [PATCH, OpenMP] Implement uses_allocators clause for target regions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkm313m6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54880,"url":"https://patchwork.plctlab.org/api/1.2/patches/54880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwr136o.fsf@euler.schwinge.homeip.net/","msgid":"<877cwr136o.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:35:59","name":"[og12] '\''gfortran.dg/gomp/allocate-4.f90'\'' -> '\''libgomp.fortran/allocate-5.f90'\'' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwr136o.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54902,"url":"https://patchwork.plctlab.org/api/1.2/patches/54902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+TjBOP6PzjLP4Ua@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T12:11:48","name":"i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+TjBOP6PzjLP4Ua@tucnak/mbox/"},{"id":54948,"url":"https://patchwork.plctlab.org/api/1.2/patches/54948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com/","msgid":"<181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com>","list_archive_url":null,"date":"2023-02-09T13:26:00","name":"[1/2,v3,ping] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com/mbox/"},{"id":54949,"url":"https://patchwork.plctlab.org/api/1.2/patches/54949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com/","msgid":"<92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com>","list_archive_url":null,"date":"2023-02-09T13:26:22","name":"[2/2,v3,ping] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com/mbox/"},{"id":54984,"url":"https://patchwork.plctlab.org/api/1.2/patches/54984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142524.D3B4B38582B0@sourceware.org/","msgid":"<20230209142524.D3B4B38582B0@sourceware.org>","list_archive_url":null,"date":"2023-02-09T14:24:40","name":"target/108738 - optimize bit operations in STV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142524.D3B4B38582B0@sourceware.org/mbox/"},{"id":54985,"url":"https://patchwork.plctlab.org/api/1.2/patches/54985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142544.6C9C4385B52D@sourceware.org/","msgid":"<20230209142544.6C9C4385B52D@sourceware.org>","list_archive_url":null,"date":"2023-02-09T14:25:01","name":"target/108738 - STV bitmap operations compile-time hog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142544.6C9C4385B52D@sourceware.org/mbox/"},{"id":55042,"url":"https://patchwork.plctlab.org/api/1.2/patches/55042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Ub70j63NkbaekZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T16:14:39","name":"c++: Don'\''t defer local statics initialized with constant expressions [PR108702]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Ub70j63NkbaekZ@tucnak/mbox/"},{"id":55043,"url":"https://patchwork.plctlab.org/api/1.2/patches/55043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UdYvqGpAggRqVD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T16:20:50","name":"[wwwdocs] gcc-13/changes.html: Document C++ -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UdYvqGpAggRqVD@tucnak/mbox/"},{"id":55051,"url":"https://patchwork.plctlab.org/api/1.2/patches/55051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16909-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T17:16:40","name":"[1/2] middle-end: Fix wrong overmatching of div-bitmask by using new optabs [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16909-tamar@arm.com/mbox/"},{"id":55052,"url":"https://patchwork.plctlab.org/api/1.2/patches/55052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UrwQSz3hWz+Puo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T17:22:09","name":"[2/2] AArch64 Update div-bitmask to implement new optab instead of target hook [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UrwQSz3hWz+Puo@arm.com/mbox/"},{"id":55053,"url":"https://patchwork.plctlab.org/api/1.2/patches/55053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209173922.30789-1-polacek@redhat.com/","msgid":"<20230209173922.30789-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-09T17:39:22","name":"c++: ICE with -fno-elide-constructors and trivial fn [PR101073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209173922.30789-1-polacek@redhat.com/mbox/"},{"id":55061,"url":"https://patchwork.plctlab.org/api/1.2/patches/55061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209181722.3178411-1-ppalka@redhat.com/","msgid":"<20230209181722.3178411-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-09T18:17:22","name":"c++: sizeof(expr) in non-templated requires-expr [PR108563]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209181722.3178411-1-ppalka@redhat.com/mbox/"},{"id":55091,"url":"https://patchwork.plctlab.org/api/1.2/patches/55091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3ec97bf-eaa2-d472-3db8-74989015407e@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T20:13:43","name":"amdgcn: Add instruction patterns for vector operations on complex numbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3ec97bf-eaa2-d472-3db8-74989015407e@codesourcery.com/mbox/"},{"id":55092,"url":"https://patchwork.plctlab.org/api/1.2/patches/55092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-be314e88-a322-42a7-ad50-5058cc1eb34b-1675974508480@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2023-02-09T20:28:28","name":"[committed] Fortran: catch invalid kind in character conversion [PR69636,PR103779]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-be314e88-a322-42a7-ad50-5058cc1eb34b-1675974508480@3c-app-gmx-bap49/mbox/"},{"id":55097,"url":"https://patchwork.plctlab.org/api/1.2/patches/55097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209214544.20460-1-juzhe.zhong@rivai.ai/","msgid":"<20230209214544.20460-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:45:44","name":"RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209214544.20460-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55098,"url":"https://patchwork.plctlab.org/api/1.2/patches/55098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e445b420-0e25-3f41-7b79-dd22a2775c4d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T21:49:34","name":"[pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization (version 2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e445b420-0e25-3f41-7b79-dd22a2775c4d@redhat.com/mbox/"},{"id":55099,"url":"https://patchwork.plctlab.org/api/1.2/patches/55099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215019.22674-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215019.22674-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:50:19","name":"RISC-V: Add vnsrl C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215019.22674-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55100,"url":"https://patchwork.plctlab.org/api/1.2/patches/55100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215241.23872-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215241.23872-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:52:41","name":"RISC-V: Add vnsra C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215241.23872-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55101,"url":"https://patchwork.plctlab.org/api/1.2/patches/55101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215354.24527-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215354.24527-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:53:54","name":"RISC-V: Add vncvt C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215354.24527-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55102,"url":"https://patchwork.plctlab.org/api/1.2/patches/55102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215502.25158-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215502.25158-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:55:02","name":"RISC-V: Add vmv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215502.25158-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55104,"url":"https://patchwork.plctlab.org/api/1.2/patches/55104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215612.25818-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215612.25818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:56:12","name":"RISC-V: Add vmv.v.x C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215612.25818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55105,"url":"https://patchwork.plctlab.org/api/1.2/patches/55105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215713.26388-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215713.26388-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:57:13","name":"RISC-V: Add vmerge C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215713.26388-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55106,"url":"https://patchwork.plctlab.org/api/1.2/patches/55106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215835.27124-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215835.27124-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:58:35","name":"RISC-V: Add vnsrl C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215835.27124-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55107,"url":"https://patchwork.plctlab.org/api/1.2/patches/55107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215943.27763-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215943.27763-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:59:43","name":"RISC-V: Add vnsra C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215943.27763-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55108,"url":"https://patchwork.plctlab.org/api/1.2/patches/55108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220103.28557-1-juzhe.zhong@rivai.ai/","msgid":"<20230209220103.28557-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T22:01:03","name":"RISC-V: Add vncvt/vmv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220103.28557-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55109,"url":"https://patchwork.plctlab.org/api/1.2/patches/55109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220214.29208-1-juzhe.zhong@rivai.ai/","msgid":"<20230209220214.29208-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T22:02:14","name":"RISC-V: Add vmerge C++ API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220214.29208-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55110,"url":"https://patchwork.plctlab.org/api/1.2/patches/55110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209221530.1349166-1-dmalcolm@redhat.com/","msgid":"<20230209221530.1349166-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-09T22:15:30","name":"[pushed] analyzer: fix further overzealous state purging [PR108733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209221530.1349166-1-dmalcolm@redhat.com/mbox/"},{"id":55144,"url":"https://patchwork.plctlab.org/api/1.2/patches/55144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com/","msgid":"<5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com>","list_archive_url":null,"date":"2023-02-10T00:01:28","name":"PR tree-optimization/108520 - Add function context for querying global ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com/mbox/"},{"id":55171,"url":"https://patchwork.plctlab.org/api/1.2/patches/55171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcdf4d9-70fb-80fb-557-a0b8a4121ab0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-10T00:43:27","name":"[committed] c: Allow conversions of null pointer constants to nullptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcdf4d9-70fb-80fb-557-a0b8a4121ab0@codesourcery.com/mbox/"},{"id":55183,"url":"https://patchwork.plctlab.org/api/1.2/patches/55183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210014311.1626049-1-apinski@marvell.com/","msgid":"<20230210014311.1626049-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-10T01:43:11","name":"[COMMITTED] tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210014311.1626049-1-apinski@marvell.com/mbox/"},{"id":55190,"url":"https://patchwork.plctlab.org/api/1.2/patches/55190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com/","msgid":"<11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com>","list_archive_url":null,"date":"2023-02-10T02:38:06","name":"PR tree-optimization/108687 - Query rangers cache in readonly mode only internally","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com/mbox/"},{"id":55203,"url":"https://patchwork.plctlab.org/api/1.2/patches/55203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210025952.1887696-1-xionghuluo@tencent.com/","msgid":"<20230210025952.1887696-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-02-10T02:59:52","name":"[v4] rs6000: Fix incorrect RTL for Power LE when removing the UNSPECS [PR106069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210025952.1887696-1-xionghuluo@tencent.com/mbox/"},{"id":55209,"url":"https://patchwork.plctlab.org/api/1.2/patches/55209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210035312.1630020-1-apinski@marvell.com/","msgid":"<20230210035312.1630020-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-10T03:53:12","name":"[PATCHv4,AARCH64] Fix PR target/103100 -mstrict-align and memset on not aligned buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210035312.1630020-1-apinski@marvell.com/mbox/"},{"id":55237,"url":"https://patchwork.plctlab.org/api/1.2/patches/55237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062131.199690-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062131.199690-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:21:31","name":"RISC-V: Add fixed-point support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062131.199690-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55239,"url":"https://patchwork.plctlab.org/api/1.2/patches/55239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062446.201653-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062446.201653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:24:46","name":"RISC-V: Add vssrl.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062446.201653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55240,"url":"https://patchwork.plctlab.org/api/1.2/patches/55240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062607.202577-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062607.202577-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:26:07","name":"RISC-V: Add vssrl.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062607.202577-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55241,"url":"https://patchwork.plctlab.org/api/1.2/patches/55241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062738.203552-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062738.203552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:27:38","name":"RISC-V: Add vssra.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062738.203552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55242,"url":"https://patchwork.plctlab.org/api/1.2/patches/55242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062921.204645-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062921.204645-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:29:21","name":"RISC-V: Add vssra.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062921.204645-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55243,"url":"https://patchwork.plctlab.org/api/1.2/patches/55243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063032.205484-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063032.205484-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:30:32","name":"RISC-V: Add vsmul.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063032.205484-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55244,"url":"https://patchwork.plctlab.org/api/1.2/patches/55244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063147.206320-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063147.206320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:31:47","name":"RISC-V: Add vsmul.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063147.206320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55245,"url":"https://patchwork.plctlab.org/api/1.2/patches/55245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063258.207272-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063258.207272-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:32:58","name":"RISC-V: Add vnclip C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063258.207272-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55246,"url":"https://patchwork.plctlab.org/api/1.2/patches/55246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063426.208355-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063426.208355-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:34:26","name":"RISC-V: Add vasubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063426.208355-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55247,"url":"https://patchwork.plctlab.org/api/1.2/patches/55247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063547.209320-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063547.209320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:35:47","name":"RISC-V: Add vasubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063547.209320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55248,"url":"https://patchwork.plctlab.org/api/1.2/patches/55248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063701.210261-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063701.210261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:37:01","name":"RISC-V: Add vasub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063701.210261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55249,"url":"https://patchwork.plctlab.org/api/1.2/patches/55249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063822.211462-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063822.211462-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:38:22","name":"RISC-V: Add vasub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063822.211462-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55250,"url":"https://patchwork.plctlab.org/api/1.2/patches/55250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064141.213840-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064141.213840-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:41:41","name":"RISC-V: Add vaaddu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064141.213840-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55251,"url":"https://patchwork.plctlab.org/api/1.2/patches/55251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064248.214584-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064248.214584-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:42:48","name":"RISC-V: Add vaaddu.vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064248.214584-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55252,"url":"https://patchwork.plctlab.org/api/1.2/patches/55252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064356.215393-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064356.215393-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:43:56","name":"RISC-V: Add vaadd.vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064356.215393-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55253,"url":"https://patchwork.plctlab.org/api/1.2/patches/55253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064516.216360-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064516.216360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:45:16","name":"RISC-V: Finish fixed-point C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064516.216360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55254,"url":"https://patchwork.plctlab.org/api/1.2/patches/55254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064634.217281-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064634.217281-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:46:34","name":"RISC-V: Add vssrl.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064634.217281-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55255,"url":"https://patchwork.plctlab.org/api/1.2/patches/55255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064758.218198-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064758.218198-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:47:58","name":"RISC-V: Add vssrl.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064758.218198-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55257,"url":"https://patchwork.plctlab.org/api/1.2/patches/55257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064907.218979-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064907.218979-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:49:07","name":"RISC-V: Add vssra.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064907.218979-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55258,"url":"https://patchwork.plctlab.org/api/1.2/patches/55258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065017.219817-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065017.219817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:50:17","name":"RISC-V: Add vssra.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065017.219817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55261,"url":"https://patchwork.plctlab.org/api/1.2/patches/55261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065118.220507-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065118.220507-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:51:18","name":"RISC-V: Add vsmul.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065118.220507-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55262,"url":"https://patchwork.plctlab.org/api/1.2/patches/55262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065232.221558-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065232.221558-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:52:32","name":"RISC-V: Add vsmul.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065232.221558-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55263,"url":"https://patchwork.plctlab.org/api/1.2/patches/55263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065344.222680-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065344.222680-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:53:44","name":"RISC-V: Add vnclip C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065344.222680-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55264,"url":"https://patchwork.plctlab.org/api/1.2/patches/55264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065502.223635-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065502.223635-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:55:02","name":"RISC-V: Add vasubu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065502.223635-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55266,"url":"https://patchwork.plctlab.org/api/1.2/patches/55266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065615.224458-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065615.224458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:56:15","name":"RISC-V: Add vasubu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065615.224458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55267,"url":"https://patchwork.plctlab.org/api/1.2/patches/55267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065730.225300-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065730.225300-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:57:30","name":"RISC-V: Add vasub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065730.225300-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55270,"url":"https://patchwork.plctlab.org/api/1.2/patches/55270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065840.226106-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065840.226106-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:58:40","name":"RISC-V: Add vasub.vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065840.226106-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55271,"url":"https://patchwork.plctlab.org/api/1.2/patches/55271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065945.227003-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065945.227003-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:59:45","name":"RISC-V: Add vaaddu.vx C++ Api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065945.227003-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55272,"url":"https://patchwork.plctlab.org/api/1.2/patches/55272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070055.228117-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070055.228117-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:00:55","name":"RISC-V: Add vaaddu.vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070055.228117-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55273,"url":"https://patchwork.plctlab.org/api/1.2/patches/55273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070213.229246-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070213.229246-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:02:13","name":"RISC-V: Add vaadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070213.229246-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55274,"url":"https://patchwork.plctlab.org/api/1.2/patches/55274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070314.229955-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070314.229955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:03:14","name":"RISC-V: Add vaadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070314.229955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55363,"url":"https://patchwork.plctlab.org/api/1.2/patches/55363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101314.7636D3858C2D@sourceware.org/","msgid":"<20230210101314.7636D3858C2D@sourceware.org>","list_archive_url":null,"date":"2023-02-10T10:12:29","name":"tree-optimization/106722 - fix CD-DCE edge marking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101314.7636D3858C2D@sourceware.org/mbox/"},{"id":55366,"url":"https://patchwork.plctlab.org/api/1.2/patches/55366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrt25bb.fsf@euler.schwinge.homeip.net/","msgid":"<874jrt25bb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-10T10:16:56","name":"[GCC] In '\''contrib/config-list.mk'\'', clarify i686-symbolics-gnu to i686-gnu (was: RFA: Add makefile for cross-configuration torture test)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrt25bb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":55367,"url":"https://patchwork.plctlab.org/api/1.2/patches/55367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101937.137591-1-juzhe.zhong@rivai.ai/","msgid":"<20230210101937.137591-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T10:19:37","name":"RISC-V: Add Full '\''v'\'' extension predicate to vsmul intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101937.137591-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55387,"url":"https://patchwork.plctlab.org/api/1.2/patches/55387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210110317.01B95385B513@sourceware.org/","msgid":"<20230210110317.01B95385B513@sourceware.org>","list_archive_url":null,"date":"2023-02-10T11:02:32","name":"tree-optimization/108724 - vectorized code getting piecewise expanded","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210110317.01B95385B513@sourceware.org/mbox/"},{"id":55399,"url":"https://patchwork.plctlab.org/api/1.2/patches/55399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2adb2ed-065a-cc9b-ed6b-29b2783c6651@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-10T11:52:47","name":"[v2] OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2adb2ed-065a-cc9b-ed6b-29b2783c6651@codesourcery.com/mbox/"},{"id":55466,"url":"https://patchwork.plctlab.org/api/1.2/patches/55466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com/","msgid":"<08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com>","list_archive_url":null,"date":"2023-02-10T16:47:08","name":"[pushed,PR108500] RA: Use simple LRA for huge functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com/mbox/"},{"id":55500,"url":"https://patchwork.plctlab.org/api/1.2/patches/55500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com/","msgid":"<8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com>","list_archive_url":null,"date":"2023-02-10T17:42:06","name":"[pushed,PR108754] RA: Use caller save equivalent memory only for LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com/mbox/"},{"id":55571,"url":"https://patchwork.plctlab.org/api/1.2/patches/55571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210203550.7A24033E6E@hamza.pair.com/","msgid":"<20230210203550.7A24033E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-10T20:35:47","name":"[pushed] wwwdocs: news/profiledriven: Update a Citeseer link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210203550.7A24033E6E@hamza.pair.com/mbox/"},{"id":55611,"url":"https://patchwork.plctlab.org/api/1.2/patches/55611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-2-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:41","name":"[RFC,v1,01/10] docs: Document a canonical RTL for a conditional-zero insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-2-philipp.tomsich@vrull.eu/mbox/"},{"id":55612,"url":"https://patchwork.plctlab.org/api/1.2/patches/55612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-3-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:42","name":"[RFC,v1,02/10] RISC-V: Recognize Zicond (conditional operations) extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-3-philipp.tomsich@vrull.eu/mbox/"},{"id":55613,"url":"https://patchwork.plctlab.org/api/1.2/patches/55613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-4-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:43","name":"[RFC,v1,03/10] RISC-V: Generate czero.eqz/nez on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-4-philipp.tomsich@vrull.eu/mbox/"},{"id":55617,"url":"https://patchwork.plctlab.org/api/1.2/patches/55617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-5-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:44","name":"[RFC,v1,04/10] RISC-V: Support immediates in Zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-5-philipp.tomsich@vrull.eu/mbox/"},{"id":55616,"url":"https://patchwork.plctlab.org/api/1.2/patches/55616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-6-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:45","name":"[RFC,v1,05/10] RISC-V: Support noce_try_store_flag_mask as czero.eqz/czero.nez","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-6-philipp.tomsich@vrull.eu/mbox/"},{"id":55619,"url":"https://patchwork.plctlab.org/api/1.2/patches/55619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-7-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:46","name":"[RFC,v1,06/10] RISC-V: Recognize sign-extract + and cases for czero.eqz/nez","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-7-philipp.tomsich@vrull.eu/mbox/"},{"id":55622,"url":"https://patchwork.plctlab.org/api/1.2/patches/55622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-8-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:47","name":"[RFC,v1,07/10] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-8-philipp.tomsich@vrull.eu/mbox/"},{"id":55621,"url":"https://patchwork.plctlab.org/api/1.2/patches/55621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-9-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-9-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:48","name":"[RFC,v1,08/10] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-9-philipp.tomsich@vrull.eu/mbox/"},{"id":55614,"url":"https://patchwork.plctlab.org/api/1.2/patches/55614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-10-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-10-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:49","name":"[RFC,v1,09/10] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-10-philipp.tomsich@vrull.eu/mbox/"},{"id":55623,"url":"https://patchwork.plctlab.org/api/1.2/patches/55623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-11-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-11-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:50","name":"[RFC,v1,10/10] RISC-V: Support XVentanaCondOps extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-11-philipp.tomsich@vrull.eu/mbox/"},{"id":55626,"url":"https://patchwork.plctlab.org/api/1.2/patches/55626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210231605.1406181-1-dmalcolm@redhat.com/","msgid":"<20230210231605.1406181-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-10T23:16:05","name":"[pushed] analyzer: don'\''t warn for deref-before-check for checks in macros [PR108745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210231605.1406181-1-dmalcolm@redhat.com/mbox/"},{"id":55663,"url":"https://patchwork.plctlab.org/api/1.2/patches/55663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-2-qing.zhao@oracle.com/","msgid":"<20230211005013.789161-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-11T00:50:12","name":"[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-2-qing.zhao@oracle.com/mbox/"},{"id":55664,"url":"https://patchwork.plctlab.org/api/1.2/patches/55664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-3-qing.zhao@oracle.com/","msgid":"<20230211005013.789161-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-11T00:50:13","name":"[v3,2/2] Update documentation to clarify a GCC extension (PR77650)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-3-qing.zhao@oracle.com/mbox/"},{"id":55677,"url":"https://patchwork.plctlab.org/api/1.2/patches/55677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824276DFE4615A5C14150FAA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-11T02:51:18","name":"RISC-V: Optimize the code gen of VLM/VSM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824276DFE4615A5C14150FAA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":55742,"url":"https://patchwork.plctlab.org/api/1.2/patches/55742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080135.01ED033E4B@hamza.pair.com/","msgid":"<20230211080135.01ED033E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T08:01:33","name":"[pushed] libstdc++: Update link to \"Worst-case efficient priority queues\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080135.01ED033E4B@hamza.pair.com/mbox/"},{"id":55743,"url":"https://patchwork.plctlab.org/api/1.2/patches/55743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080856.00DD733E83@hamza.pair.com/","msgid":"<20230211080856.00DD733E83@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T08:08:55","name":"[pushed] wwwdocs: readings: Update link to RX610 landing page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080856.00DD733E83@hamza.pair.com/mbox/"},{"id":55744,"url":"https://patchwork.plctlab.org/api/1.2/patches/55744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com/","msgid":"<2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com>","list_archive_url":null,"date":"2023-02-11T08:33:46","name":"builtin-declaration-mismatch-7: fix LLP64 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com/mbox/"},{"id":55754,"url":"https://patchwork.plctlab.org/api/1.2/patches/55754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB48245075FF3DB049086E5E1BA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-11T08:46:49","name":"RISC-V: Bugfix for mode tieable of the rvv bool types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB48245075FF3DB049086E5E1BA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":55764,"url":"https://patchwork.plctlab.org/api/1.2/patches/55764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+dlcOSzUo6Jwwyg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-11T09:52:48","name":"ipa-cp: Punt for too large offsets [PR108605]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+dlcOSzUo6Jwwyg@tucnak/mbox/"},{"id":55801,"url":"https://patchwork.plctlab.org/api/1.2/patches/55801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211120050.AC42933E82@hamza.pair.com/","msgid":"<20230211120050.AC42933E82@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T12:00:48","name":"[pushed] doc: Adjust link to WG14 N965","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211120050.AC42933E82@hamza.pair.com/mbox/"},{"id":55836,"url":"https://patchwork.plctlab.org/api/1.2/patches/55836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211155934.3539787-1-stefansf@linux.ibm.com/","msgid":"<20230211155934.3539787-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-02-11T15:59:35","name":"IBM zSystems: Do not propagate scheduler state across basic blocks [PR108102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211155934.3539787-1-stefansf@linux.ibm.com/mbox/"},{"id":55842,"url":"https://patchwork.plctlab.org/api/1.2/patches/55842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211161044.3540594-1-stefansf@linux.ibm.com/","msgid":"<20230211161044.3540594-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-02-11T16:10:45","name":"IBM zSystems: Fix predicate execute_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211161044.3540594-1-stefansf@linux.ibm.com/mbox/"},{"id":55884,"url":"https://patchwork.plctlab.org/api/1.2/patches/55884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212085845.92B8833E63@hamza.pair.com/","msgid":"<20230212085845.92B8833E63@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T08:58:43","name":"[pushed] libstdc++: Change www.unix.org to unix.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212085845.92B8833E63@hamza.pair.com/mbox/"},{"id":55896,"url":"https://patchwork.plctlab.org/api/1.2/patches/55896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212113359.18239-1-kito.cheng@sifive.com/","msgid":"<20230212113359.18239-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-12T11:33:59","name":"RISC-V: Handle vlenb correctly in unwinding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212113359.18239-1-kito.cheng@sifive.com/mbox/"},{"id":55900,"url":"https://patchwork.plctlab.org/api/1.2/patches/55900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212114716.B098C33E6E@hamza.pair.com/","msgid":"<20230212114716.B098C33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T11:47:14","name":"[pushed] doc: Remove direct reference to configure/build docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212114716.B098C33E6E@hamza.pair.com/mbox/"},{"id":55965,"url":"https://patchwork.plctlab.org/api/1.2/patches/55965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at/","msgid":"<6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-12T19:10:40","name":"[C] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at/mbox/"},{"id":55980,"url":"https://patchwork.plctlab.org/api/1.2/patches/55980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212224332.B0B1233E50@hamza.pair.com/","msgid":"<20230212224332.B0B1233E50@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T22:43:30","name":"[pushed] libstdc++: Tweak link to N1780 (C++ standard)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212224332.B0B1233E50@hamza.pair.com/mbox/"},{"id":56000,"url":"https://patchwork.plctlab.org/api/1.2/patches/56000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213024332.2614540-1-guojiufu@linux.ibm.com/","msgid":"<20230213024332.2614540-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-13T02:43:32","name":"[V2] rs6000: Add new patterns rlwinm with mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213024332.2614540-1-guojiufu@linux.ibm.com/mbox/"},{"id":56045,"url":"https://patchwork.plctlab.org/api/1.2/patches/56045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213051843.2615021-1-guojiufu@linux.ibm.com/","msgid":"<20230213051843.2615021-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-13T05:18:43","name":"[V2] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213051843.2615021-1-guojiufu@linux.ibm.com/mbox/"},{"id":56059,"url":"https://patchwork.plctlab.org/api/1.2/patches/56059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074113.266716-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074113.266716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:41:13","name":"RISC-V: Add integer compare C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074113.266716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56061,"url":"https://patchwork.plctlab.org/api/1.2/patches/56061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074350.267734-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074350.267734-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:43:50","name":"RISC-V: Add vmsne.vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074350.267734-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56062,"url":"https://patchwork.plctlab.org/api/1.2/patches/56062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074525.268358-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074525.268358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:45:25","name":"RISC-V: Add vmsne vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074525.268358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56063,"url":"https://patchwork.plctlab.org/api/1.2/patches/56063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074647.268832-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074647.268832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:46:47","name":"RISC-V: Add vmslt vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074647.268832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56064,"url":"https://patchwork.plctlab.org/api/1.2/patches/56064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074810.269480-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074810.269480-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:48:10","name":"RISC-V: Add vmslt vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074810.269480-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56065,"url":"https://patchwork.plctlab.org/api/1.2/patches/56065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074914.269850-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074914.269850-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:49:14","name":"RISC-V: Add vmsle vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074914.269850-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56066,"url":"https://patchwork.plctlab.org/api/1.2/patches/56066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075037.270173-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075037.270173-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:50:37","name":"RISC-V: Add vmsle vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075037.270173-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56067,"url":"https://patchwork.plctlab.org/api/1.2/patches/56067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075149.270563-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075149.270563-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:51:49","name":"RISC-V: Add vmsgt vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075149.270563-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56068,"url":"https://patchwork.plctlab.org/api/1.2/patches/56068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075304.271252-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075304.271252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:53:04","name":"RISC-V: Add vmsgt vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075304.271252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56075,"url":"https://patchwork.plctlab.org/api/1.2/patches/56075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080303.285363-1-juzhe.zhong@rivai.ai/","msgid":"<20230213080303.285363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:03:03","name":"RISC-V: Add vmsge vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080303.285363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56076,"url":"https://patchwork.plctlab.org/api/1.2/patches/56076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080441.285645-1-juzhe.zhong@rivai.ai/","msgid":"<20230213080441.285645-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:04:41","name":"RISC-V: Add vmsge vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080441.285645-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56083,"url":"https://patchwork.plctlab.org/api/1.2/patches/56083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082112.288170-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082112.288170-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:21:12","name":"RISC-V: Add vmseq vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082112.288170-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56084,"url":"https://patchwork.plctlab.org/api/1.2/patches/56084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082229.288515-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082229.288515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:22:29","name":"RISC-V: Add vmseq vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082229.288515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56085,"url":"https://patchwork.plctlab.org/api/1.2/patches/56085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082522.289082-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082522.289082-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:25:22","name":"RISC-V: Add binop constraints tests for integer compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082522.289082-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56086,"url":"https://patchwork.plctlab.org/api/1.2/patches/56086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082629.289383-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082629.289383-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:26:29","name":"RISC-V: Add vmsne vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082629.289383-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56087,"url":"https://patchwork.plctlab.org/api/1.2/patches/56087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082734.289679-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082734.289679-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:27:34","name":"RISC-V: Add vmsne vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082734.289679-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56088,"url":"https://patchwork.plctlab.org/api/1.2/patches/56088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082838.289977-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082838.289977-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:28:38","name":"RISC-V: Add vmslt vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082838.289977-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56089,"url":"https://patchwork.plctlab.org/api/1.2/patches/56089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082954.290285-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082954.290285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:29:54","name":"RISC-V: Add vmslt vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082954.290285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56090,"url":"https://patchwork.plctlab.org/api/1.2/patches/56090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083109.290640-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083109.290640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:31:09","name":"RISC-V: Add vmsle vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083109.290640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56091,"url":"https://patchwork.plctlab.org/api/1.2/patches/56091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083223.290961-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083223.290961-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:32:23","name":"RISC-V: Add vmsle vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083223.290961-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56092,"url":"https://patchwork.plctlab.org/api/1.2/patches/56092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083334.291298-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083334.291298-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:33:33","name":"RISC-V: Add vmsgt vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083334.291298-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56093,"url":"https://patchwork.plctlab.org/api/1.2/patches/56093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083431.291581-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083431.291581-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:34:31","name":"RISC-V: Add vmsgt vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083431.291581-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56094,"url":"https://patchwork.plctlab.org/api/1.2/patches/56094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083539.291955-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083539.291955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:35:39","name":"RISC-V: Add vmsge vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083539.291955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56095,"url":"https://patchwork.plctlab.org/api/1.2/patches/56095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083657.292491-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083657.292491-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:36:57","name":"RISC-V: Add vmsge vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083657.292491-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56096,"url":"https://patchwork.plctlab.org/api/1.2/patches/56096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083755.292800-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083755.292800-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:37:55","name":"RISC-V: Add vmseq vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083755.292800-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56097,"url":"https://patchwork.plctlab.org/api/1.2/patches/56097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083903.293123-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083903.293123-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:39:03","name":"RISC-V: Add vmseq vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083903.293123-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56109,"url":"https://patchwork.plctlab.org/api/1.2/patches/56109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz/","msgid":"<43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz>","list_archive_url":null,"date":"2023-02-13T09:16:32","name":"[(pushed)] docs: document new param","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz/mbox/"},{"id":56129,"url":"https://patchwork.plctlab.org/api/1.2/patches/56129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213093624.946572-1-claziss@gmail.com/","msgid":"<20230213093624.946572-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-02-13T09:36:24","name":"[committed] arc: Don'\''t use millicode thunks unless asked for.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213093624.946572-1-claziss@gmail.com/mbox/"},{"id":56165,"url":"https://patchwork.plctlab.org/api/1.2/patches/56165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213103853.502212-1-xry111@xry111.site/","msgid":"<20230213103853.502212-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-02-13T10:38:53","name":"LoongArch: Fix multiarch tuple canonization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213103853.502212-1-xry111@xry111.site/mbox/"},{"id":56168,"url":"https://patchwork.plctlab.org/api/1.2/patches/56168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta61hzw2t.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T10:41:30","name":"[Ping] ifcvt: Fix regression in aarch64/fcsel_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta61hzw2t.fsf@arm.com/mbox/"},{"id":56186,"url":"https://patchwork.plctlab.org/api/1.2/patches/56186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzg9hyhce.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T10:45:05","name":"[Ping^3] gomp: Various fixes for SVE types [PR101018]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzg9hyhce.fsf_-_@arm.com/mbox/"},{"id":56194,"url":"https://patchwork.plctlab.org/api/1.2/patches/56194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-2-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:34","name":"[1/5] RISC-V: Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-2-shihua@iscas.ac.cn/mbox/"},{"id":56200,"url":"https://patchwork.plctlab.org/api/1.2/patches/56200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-3-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:35","name":"[2/5] RISC-V: Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-3-shihua@iscas.ac.cn/mbox/"},{"id":56199,"url":"https://patchwork.plctlab.org/api/1.2/patches/56199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-4-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:36","name":"[3/5] RISC-V: Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-4-shihua@iscas.ac.cn/mbox/"},{"id":56192,"url":"https://patchwork.plctlab.org/api/1.2/patches/56192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-5-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:37","name":"[4/5] RISC-V: Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-5-shihua@iscas.ac.cn/mbox/"},{"id":56196,"url":"https://patchwork.plctlab.org/api/1.2/patches/56196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-6-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:38","name":"[5/5] RISC-V: Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-6-shihua@iscas.ac.cn/mbox/"},{"id":56201,"url":"https://patchwork.plctlab.org/api/1.2/patches/56201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213110058.0C9B61391B@imap2.suse-dmz.suse.de/","msgid":"<20230213110058.0C9B61391B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-13T11:00:56","name":"tree-optimization/108691 - indirect calls to setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213110058.0C9B61391B@imap2.suse-dmz.suse.de/mbox/"},{"id":56329,"url":"https://patchwork.plctlab.org/api/1.2/patches/56329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213145637.C023C138E6@imap2.suse-dmz.suse.de/","msgid":"<20230213145637.C023C138E6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-13T14:56:37","name":"tree-optimization/28614 - high FRE time for gcc.c-torture/compile/20001226-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213145637.C023C138E6@imap2.suse-dmz.suse.de/mbox/"},{"id":56397,"url":"https://patchwork.plctlab.org/api/1.2/patches/56397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213170619.28996-1-polacek@redhat.com/","msgid":"<20230213170619.28996-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:06:19","name":"c++: fix ICE in joust_maybe_elide_copy [PR106675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213170619.28996-1-polacek@redhat.com/mbox/"},{"id":56398,"url":"https://patchwork.plctlab.org/api/1.2/patches/56398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-1-ppalka@redhat.com/","msgid":"<20230213172340.849204-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:23:39","name":"[1/2] c++: factor out TYPENAME_TYPE substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-1-ppalka@redhat.com/mbox/"},{"id":56399,"url":"https://patchwork.plctlab.org/api/1.2/patches/56399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-2-ppalka@redhat.com/","msgid":"<20230213172340.849204-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:23:40","name":"[2/2] c++: TYPENAME_TYPE lookup ignoring non-types [PR107773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-2-ppalka@redhat.com/mbox/"},{"id":56563,"url":"https://patchwork.plctlab.org/api/1.2/patches/56563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cz6db60m.fsf@aarsen.me/","msgid":"<86cz6db60m.fsf@aarsen.me>","list_archive_url":null,"date":"2023-02-13T18:51:28","name":"Ping: [PATCH+wwwdocs 0/8] A small Texinfo refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cz6db60m.fsf@aarsen.me/mbox/"},{"id":56489,"url":"https://patchwork.plctlab.org/api/1.2/patches/56489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213192700.2013187-1-rasmus.villemoes@prevas.dk/","msgid":"<20230213192700.2013187-1-rasmus.villemoes@prevas.dk>","list_archive_url":null,"date":"2023-02-13T19:27:00","name":"apply debug-remap to file names in .su files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213192700.2013187-1-rasmus.villemoes@prevas.dk/mbox/"},{"id":56490,"url":"https://patchwork.plctlab.org/api/1.2/patches/56490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aQe7tPDge5-3kXgBYSEcJz3XDqR2ZGkTwWRHMFXzyv0A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T19:27:43","name":"i386: Relax extract location operand mode requirements [PR108516]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aQe7tPDge5-3kXgBYSEcJz3XDqR2ZGkTwWRHMFXzyv0A@mail.gmail.com/mbox/"},{"id":56536,"url":"https://patchwork.plctlab.org/api/1.2/patches/56536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b21a2d3f-8d44-7311-ed3d-b06f70d9b7d4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T20:28:15","name":"libgomp: Fix '\''target enter data'\'' with always pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b21a2d3f-8d44-7311-ed3d-b06f70d9b7d4@codesourcery.com/mbox/"},{"id":56548,"url":"https://patchwork.plctlab.org/api/1.2/patches/56548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com/","msgid":"<3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com>","list_archive_url":null,"date":"2023-02-13T21:12:51","name":"[pushed,PR108774] RA: Clear reg equiv caller_save_p flag when clearing defined_p flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com/mbox/"},{"id":56552,"url":"https://patchwork.plctlab.org/api/1.2/patches/56552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-4f91f3ff-1a0f-441e-ae8b-8beffd701aa9-1676322798018@3c-app-gmx-bap61/","msgid":"","list_archive_url":null,"date":"2023-02-13T21:13:18","name":"[committed] Fortran: error recovery after invalid use of CLASS variable [PR103475]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-4f91f3ff-1a0f-441e-ae8b-8beffd701aa9-1676322798018@3c-app-gmx-bap61/mbox/"},{"id":56589,"url":"https://patchwork.plctlab.org/api/1.2/patches/56589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213223122.9F67D33EAC@hamza.pair.com/","msgid":"<20230213223122.9F67D33EAC@hamza.pair.com>","list_archive_url":null,"date":"2023-02-13T22:31:14","name":"[pushed] libstdc++: Adjust \"The Component Object Model\" reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213223122.9F67D33EAC@hamza.pair.com/mbox/"},{"id":56609,"url":"https://patchwork.plctlab.org/api/1.2/patches/56609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214023346.2A85B20423@pchp3.se.axis.com/","msgid":"<20230214023346.2A85B20423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-14T02:33:46","name":"debug: Support \"phrs\" for dumping a HARD_REG_SET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214023346.2A85B20423@pchp3.se.axis.com/mbox/"},{"id":56775,"url":"https://patchwork.plctlab.org/api/1.2/patches/56775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tMqCFYVNL6xxYq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-14T08:56:08","name":"asan: Add --param=asan-kernel-mem-intrinsic-prefix= [PR108777]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tMqCFYVNL6xxYq@tucnak/mbox/"},{"id":56789,"url":"https://patchwork.plctlab.org/api/1.2/patches/56789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214092404.78801-1-juzhe.zhong@rivai.ai/","msgid":"<20230214092404.78801-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T09:24:04","name":"RISC-V: Finish all integer C/C++ intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214092404.78801-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56806,"url":"https://patchwork.plctlab.org/api/1.2/patches/56806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6vo8u8u.fsf@euler.schwinge.homeip.net/","msgid":"<87h6vo8u8u.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T09:35:29","name":"nvptx: Adjust '\''scan-assembler'\'' in '\''gfortran.dg/weak-1.f90'\'' (was: Support for NOINLINE attribute)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6vo8u8u.fsf@euler.schwinge.homeip.net/mbox/"},{"id":56837,"url":"https://patchwork.plctlab.org/api/1.2/patches/56837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7b5aee2-0203-dc57-0328-e3989e7ecc8e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-14T10:42:21","name":"More LLP64 fixes and __PIC__ values fixes for PE targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7b5aee2-0203-dc57-0328-e3989e7ecc8e@gmail.com/mbox/"},{"id":56885,"url":"https://patchwork.plctlab.org/api/1.2/patches/56885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tu4LN1R2FYe02y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-14T11:22:33","name":"c++: Add testcases from some Issaquah DRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tu4LN1R2FYe02y@tucnak/mbox/"},{"id":56886,"url":"https://patchwork.plctlab.org/api/1.2/patches/56886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214114918.3E86413A21@imap2.suse-dmz.suse.de/","msgid":"<20230214114918.3E86413A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T11:49:17","name":"tree-optimization/108782 - nested first order recurrence vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214114918.3E86413A21@imap2.suse-dmz.suse.de/mbox/"},{"id":56904,"url":"https://patchwork.plctlab.org/api/1.2/patches/56904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3481520.iIbC2pHGDl@fomalhaut/","msgid":"<3481520.iIbC2pHGDl@fomalhaut>","list_archive_url":null,"date":"2023-02-14T12:42:14","name":"Fix small regression in Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3481520.iIbC2pHGDl@fomalhaut/mbox/"},{"id":56905,"url":"https://patchwork.plctlab.org/api/1.2/patches/56905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6voz9tl.fsf@euler.schwinge.homeip.net/","msgid":"<87h6voz9tl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T12:54:30","name":"[og12] In '\''libgomp/allocator.c:omp_realloc'\'', route '\''free'\'' through '\''MEMSPACE_FREE'\'' (was: [PATCH] libgomp, OpenMP, nvptx: Low-latency memory allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6voz9tl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":56957,"url":"https://patchwork.plctlab.org/api/1.2/patches/56957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134405.129401-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134405.129401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:44:05","name":"RISC-V: Add vwmacc vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134405.129401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56965,"url":"https://patchwork.plctlab.org/api/1.2/patches/56965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134612.140930-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134612.140930-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:46:12","name":"RISC-V: Add vwmacc vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134612.140930-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56967,"url":"https://patchwork.plctlab.org/api/1.2/patches/56967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134826.144016-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134826.144016-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:48:26","name":"RISC-V: Add vnmsub vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134826.144016-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56968,"url":"https://patchwork.plctlab.org/api/1.2/patches/56968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135300.145205-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135300.145205-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:53:00","name":"RISC-V: Add vnmsub vx rv64 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135300.145205-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56969,"url":"https://patchwork.plctlab.org/api/1.2/patches/56969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135417.145612-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135417.145612-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:54:17","name":"RISC-V: Add vnmsub vx rv32 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135417.145612-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56970,"url":"https://patchwork.plctlab.org/api/1.2/patches/56970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135612.146539-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135612.146539-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:56:12","name":"RISC-V: Add vnmsac rv64 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135612.146539-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56971,"url":"https://patchwork.plctlab.org/api/1.2/patches/56971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135712.146813-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135712.146813-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:57:12","name":"RISC-V: Add vnmsac vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135712.146813-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56972,"url":"https://patchwork.plctlab.org/api/1.2/patches/56972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135829.147123-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135829.147123-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:58:29","name":"RISC-V: Add vnmsac vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135829.147123-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56973,"url":"https://patchwork.plctlab.org/api/1.2/patches/56973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135957.147487-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135957.147487-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:59:57","name":"RISC-V: Add vmadd vx rv64 c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135957.147487-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56974,"url":"https://patchwork.plctlab.org/api/1.2/patches/56974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140114.147866-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140114.147866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:01:14","name":"RISC-V: Add vmadd vx c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140114.147866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56976,"url":"https://patchwork.plctlab.org/api/1.2/patches/56976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140234.148185-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140234.148185-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:02:34","name":"RISC-V: Add vmadd vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140234.148185-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56977,"url":"https://patchwork.plctlab.org/api/1.2/patches/56977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140342.148470-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140342.148470-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:03:42","name":"RISC-V: Add vmacc vx c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140342.148470-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56979,"url":"https://patchwork.plctlab.org/api/1.2/patches/56979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140456.148783-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140456.148783-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:04:56","name":"RISC-V: Add vmacc vx rv32 c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140456.148783-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56989,"url":"https://patchwork.plctlab.org/api/1.2/patches/56989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140604.149066-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140604.149066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:06:04","name":"RISC-V: Add vmacc vv c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140604.149066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56991,"url":"https://patchwork.plctlab.org/api/1.2/patches/56991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140609.149094-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140609.149094-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:06:09","name":"RISC-V: Add vmacc vv c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140609.149094-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56996,"url":"https://patchwork.plctlab.org/api/1.2/patches/56996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140813.149624-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140813.149624-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:08:13","name":"RISC-V: Add ternary constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140813.149624-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57014,"url":"https://patchwork.plctlab.org/api/1.2/patches/57014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141236.150709-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141236.150709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:12:36","name":"RISC-V: Add vwmacc vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141236.150709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57015,"url":"https://patchwork.plctlab.org/api/1.2/patches/57015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141423.151090-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141423.151090-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:14:23","name":"RISC-V: Add vwmacc vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141423.151090-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57017,"url":"https://patchwork.plctlab.org/api/1.2/patches/57017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141559.151450-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141559.151450-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:15:59","name":"RISC-V: Add vnmsub vx rv64 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141559.151450-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57018,"url":"https://patchwork.plctlab.org/api/1.2/patches/57018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141718.151801-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141718.151801-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:17:18","name":"RISC-V: Add vnmsub vx rv32 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141718.151801-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57019,"url":"https://patchwork.plctlab.org/api/1.2/patches/57019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141823.152082-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141823.152082-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:18:23","name":"RISC-V: Add vnmsub vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141823.152082-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57020,"url":"https://patchwork.plctlab.org/api/1.2/patches/57020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142137.152713-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142137.152713-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:21:37","name":"RISC-V: Add vnmsac vx rv64 C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142137.152713-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57021,"url":"https://patchwork.plctlab.org/api/1.2/patches/57021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142154.09F8D13A21@imap2.suse-dmz.suse.de/","msgid":"<20230214142154.09F8D13A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T14:21:53","name":"Speedup DF dataflow solver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142154.09F8D13A21@imap2.suse-dmz.suse.de/mbox/"},{"id":57022,"url":"https://patchwork.plctlab.org/api/1.2/patches/57022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142239.152985-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142239.152985-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:22:39","name":"RISC-V: Add vnmsac vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142239.152985-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57023,"url":"https://patchwork.plctlab.org/api/1.2/patches/57023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142355.153302-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142355.153302-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:23:55","name":"RISC-V: Add vnmsac vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142355.153302-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57024,"url":"https://patchwork.plctlab.org/api/1.2/patches/57024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142535.153676-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142535.153676-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:25:35","name":"RISC-V: Add vmadd vx C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142535.153676-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57027,"url":"https://patchwork.plctlab.org/api/1.2/patches/57027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142652.153982-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142652.153982-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:26:52","name":"RISC-V: Add vmadd vx c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142652.153982-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57028,"url":"https://patchwork.plctlab.org/api/1.2/patches/57028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142825.154358-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142825.154358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:28:24","name":"RISC-V: Add vmadd vv c++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142825.154358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57035,"url":"https://patchwork.plctlab.org/api/1.2/patches/57035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142936.154660-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142936.154660-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:29:36","name":"RISC-V: Add vmacc vx rv32 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142936.154660-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57040,"url":"https://patchwork.plctlab.org/api/1.2/patches/57040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143039.154969-1-juzhe.zhong@rivai.ai/","msgid":"<20230214143039.154969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:30:39","name":"RISC-V: Add vmacc vx rv64 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143039.154969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57044,"url":"https://patchwork.plctlab.org/api/1.2/patches/57044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143259.155429-1-juzhe.zhong@rivai.ai/","msgid":"<20230214143259.155429-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:32:59","name":"RISC-V: Add vmacc vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143259.155429-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57059,"url":"https://patchwork.plctlab.org/api/1.2/patches/57059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1p0gv37.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-14T14:50:04","name":"ipa: Avoid IPA confusing scalar values and single-field aggregates (PR 108679)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1p0gv37.fsf@suse.cz/mbox/"},{"id":57060,"url":"https://patchwork.plctlab.org/api/1.2/patches/57060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214145053.AB8B113A21@imap2.suse-dmz.suse.de/","msgid":"<20230214145053.AB8B113A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T14:50:53","name":"More DF worklist solver improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214145053.AB8B113A21@imap2.suse-dmz.suse.de/mbox/"},{"id":57063,"url":"https://patchwork.plctlab.org/api/1.2/patches/57063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214150449.249991-1-juzhe.zhong@rivai.ai/","msgid":"<20230214150449.249991-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T15:04:49","name":"RISC-V: Replace simm32_p with immediate_operand (Pmode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214150449.249991-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57065,"url":"https://patchwork.plctlab.org/api/1.2/patches/57065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de/","msgid":"<20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T15:18:30","name":"Improve VN PHI hash table handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":57066,"url":"https://patchwork.plctlab.org/api/1.2/patches/57066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214152025.2226E138E3@imap2.suse-dmz.suse.de/","msgid":"<20230214152025.2226E138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T15:20:24","name":"Fix possible sanopt compile-time hog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214152025.2226E138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":57078,"url":"https://patchwork.plctlab.org/api/1.2/patches/57078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214153903.27974-1-juzhe.zhong@rivai.ai/","msgid":"<20230214153903.27974-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T15:39:03","name":"RISC-V: Remove \"extern??? for namespace [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214153903.27974-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57186,"url":"https://patchwork.plctlab.org/api/1.2/patches/57186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214195153.8445-1-david.faust@oracle.com/","msgid":"<20230214195153.8445-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-02-14T19:51:53","name":"bpf: fix memory constraint of ldx/stx instructions [PR108790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214195153.8445-1-david.faust@oracle.com/mbox/"},{"id":57210,"url":"https://patchwork.plctlab.org/api/1.2/patches/57210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214212510.5EB7133E9C@hamza.pair.com/","msgid":"<20230214212510.5EB7133E9C@hamza.pair.com>","list_archive_url":null,"date":"2023-02-14T21:25:07","name":"[pushed] libstdc++: Update an open-std.org link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214212510.5EB7133E9C@hamza.pair.com/mbox/"},{"id":57243,"url":"https://patchwork.plctlab.org/api/1.2/patches/57243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214222733.183219-1-juzhe.zhong@rivai.ai/","msgid":"<20230214222733.183219-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T22:27:33","name":"RISC-V: Rearrange the organization of declarations of RVV intrinsics [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214222733.183219-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57246,"url":"https://patchwork.plctlab.org/api/1.2/patches/57246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sff73m0n.fsf@euler.schwinge.homeip.net/","msgid":"<87sff73m0n.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T22:44:24","name":"[og12] Address cast to pointer from integer of different size in '\''libgomp/target.c:gomp_target_rev'\'' (was: [OG12][committed] openmp: Add support for the '\''present'\'' modifier)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sff73m0n.fsf@euler.schwinge.homeip.net/mbox/"},{"id":57272,"url":"https://patchwork.plctlab.org/api/1.2/patches/57272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214231820.283957-1-juzhe.zhong@rivai.ai/","msgid":"<20230214231820.283957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T23:18:20","name":"RISC-V: Move saturating add/subtract md pattern location [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214231820.283957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57291,"url":"https://patchwork.plctlab.org/api/1.2/patches/57291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215001814.F3BAB2042C@pchp3.se.axis.com/","msgid":"<20230215001814.F3BAB2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T00:18:14","name":"gen_reload: Correct parameter for fatal_insn call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215001814.F3BAB2042C@pchp3.se.axis.com/mbox/"},{"id":57335,"url":"https://patchwork.plctlab.org/api/1.2/patches/57335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215013828.7043633EA3@hamza.pair.com/","msgid":"<20230215013828.7043633EA3@hamza.pair.com>","list_archive_url":null,"date":"2023-02-15T01:38:25","name":"[pushed] wwwdocs: news/profiledriven: Update a link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215013828.7043633EA3@hamza.pair.com/mbox/"},{"id":57351,"url":"https://patchwork.plctlab.org/api/1.2/patches/57351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215034815.1276847-1-polacek@redhat.com/","msgid":"<20230215034815.1276847-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-15T03:48:15","name":"warn-access: wrong -Wdangling-pointer with labels [PR106080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215034815.1276847-1-polacek@redhat.com/mbox/"},{"id":57423,"url":"https://patchwork.plctlab.org/api/1.2/patches/57423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz/","msgid":"<7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz>","list_archive_url":null,"date":"2023-02-15T08:39:11","name":"[(pushed)] docs: document new --param=asan-kernel-mem-intrinsic-prefix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz/mbox/"},{"id":57424,"url":"https://patchwork.plctlab.org/api/1.2/patches/57424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215083954.274514-1-juzhe.zhong@rivai.ai/","msgid":"<20230215083954.274514-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-15T08:39:54","name":"RISC-V: Normalize SEW = 64 handling into a simplified function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215083954.274514-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57436,"url":"https://patchwork.plctlab.org/api/1.2/patches/57436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+yjZX54gxCaUTfY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-15T09:18:29","name":"[committed] powerpc: Fix up expansion for WIDEN_MULT_PLUS_EXPR [PR108787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+yjZX54gxCaUTfY@tucnak/mbox/"},{"id":57460,"url":"https://patchwork.plctlab.org/api/1.2/patches/57460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215100202.lrjn2dpk2xuwht6a@lug-owl.de/","msgid":"<20230215100202.lrjn2dpk2xuwht6a@lug-owl.de>","list_archive_url":null,"date":"2023-02-15T10:02:02","name":"bpf: Fix double whitespace warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215100202.lrjn2dpk2xuwht6a@lug-owl.de/mbox/"},{"id":57469,"url":"https://patchwork.plctlab.org/api/1.2/patches/57469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7cwjted9.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-15T10:25:06","name":"Update baseline symbols for aarch64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7cwjted9.fsf@suse.de/mbox/"},{"id":57478,"url":"https://patchwork.plctlab.org/api/1.2/patches/57478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215105411.30966-1-iain@sandoe.co.uk/","msgid":"<20230215105411.30966-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-02-15T10:54:11","name":"[pushed] testsuite, objective-c: Fix a testcase on Windows.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215105411.30966-1-iain@sandoe.co.uk/mbox/"},{"id":57484,"url":"https://patchwork.plctlab.org/api/1.2/patches/57484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215112231.45341-1-juzhe.zhong@rivai.ai/","msgid":"<20230215112231.45341-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-15T11:22:31","name":"RISC-V: Rename tu_preds to none_tu_preds [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215112231.45341-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57546,"url":"https://patchwork.plctlab.org/api/1.2/patches/57546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215133750.15537-1-jwakely@redhat.com/","msgid":"<20230215133750.15537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-15T13:37:50","name":"doc: Suggest fix for -Woverloaded-virtual warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215133750.15537-1-jwakely@redhat.com/mbox/"},{"id":57552,"url":"https://patchwork.plctlab.org/api/1.2/patches/57552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com/","msgid":"<1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com>","list_archive_url":null,"date":"2023-02-15T13:44:08","name":"harden-sls-6.c: fix warning on LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com/mbox/"},{"id":57554,"url":"https://patchwork.plctlab.org/api/1.2/patches/57554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+ziHx6/8SB4k+4J@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T13:46:07","name":"[v2] warn-access: wrong -Wdangling-pointer with labels [PR106080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+ziHx6/8SB4k+4J@redhat.com/mbox/"},{"id":57596,"url":"https://patchwork.plctlab.org/api/1.2/patches/57596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8221231.NyiUUSuA9g@fomalhaut/","msgid":"<8221231.NyiUUSuA9g@fomalhaut>","list_archive_url":null,"date":"2023-02-15T15:24:09","name":"Fix PR target/90458","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8221231.NyiUUSuA9g@fomalhaut/mbox/"},{"id":57599,"url":"https://patchwork.plctlab.org/api/1.2/patches/57599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZJEcH-mwcyxupcaoCmnUyhF9-5b7F5mFa-4g6LxXH_Rg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T15:28:09","name":"i386: Rename extr_register_operand to int248_register_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZJEcH-mwcyxupcaoCmnUyhF9-5b7F5mFa-4g6LxXH_Rg@mail.gmail.com/mbox/"},{"id":57600,"url":"https://patchwork.plctlab.org/api/1.2/patches/57600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YsV0ROTJxutL+pn4CAwf5xFO02V7t76otKYUqhjWs8Aw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T15:32:47","name":"testsuite/i386: Cleanup target selectors in i386 target directory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YsV0ROTJxutL+pn4CAwf5xFO02V7t76otKYUqhjWs8Aw@mail.gmail.com/mbox/"},{"id":57601,"url":"https://patchwork.plctlab.org/api/1.2/patches/57601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215153432.0663D2042E@pchp3.se.axis.com/","msgid":"<20230215153432.0663D2042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T15:34:32","name":"reload: Handle generating reloads that also clobbers flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215153432.0663D2042E@pchp3.se.axis.com/mbox/"},{"id":57637,"url":"https://patchwork.plctlab.org/api/1.2/patches/57637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com/","msgid":"<86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com>","list_archive_url":null,"date":"2023-02-15T17:05:52","name":"PR tree-optimization/108697 - Create a lazy ssa_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com/mbox/"},{"id":57680,"url":"https://patchwork.plctlab.org/api/1.2/patches/57680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkluzr8q.fsf@euler.schwinge.homeip.net/","msgid":"<87bkluzr8q.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-15T19:02:45","name":"[og12] Fix '\''libgomp.{c-c++-common,fortran}/target-present-*'\'' test cases (was: [OG12][committed] openmp: Add support for the '\''present'\'' modifier)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkluzr8q.fsf@euler.schwinge.homeip.net/mbox/"},{"id":57683,"url":"https://patchwork.plctlab.org/api/1.2/patches/57683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215191957.F12532042E@pchp3.se.axis.com/","msgid":"<20230215191957.F12532042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T19:19:57","name":"testsuite: Handle \"packed\" targets in c-c++-common/auto-init-7.c and -8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215191957.F12532042E@pchp3.se.axis.com/mbox/"},{"id":57704,"url":"https://patchwork.plctlab.org/api/1.2/patches/57704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215195549.1677156-1-dmalcolm@redhat.com/","msgid":"<20230215195549.1677156-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-15T19:55:49","name":"[pushed] analyzer: fix uninit false +ves [PR108664, PR108666, PR108725]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215195549.1677156-1-dmalcolm@redhat.com/mbox/"},{"id":57713,"url":"https://patchwork.plctlab.org/api/1.2/patches/57713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bBUsXh5atfAo=pYB7vafnqZ00tN81KG+32B0KBVy_qTQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T20:37:06","name":"i386: Relax extract location operand mode requirements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bBUsXh5atfAo=pYB7vafnqZ00tN81KG+32B0KBVy_qTQ@mail.gmail.com/mbox/"},{"id":57719,"url":"https://patchwork.plctlab.org/api/1.2/patches/57719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21793652.EfDdHjke4D@minbar/","msgid":"<21793652.EfDdHjke4D@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:36","name":"[1/7] libstdc++: Ensure __builtin_constant_p isn'\''t lost on the way","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21793652.EfDdHjke4D@minbar/mbox/"},{"id":57723,"url":"https://patchwork.plctlab.org/api/1.2/patches/57723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9083131.CDJkKcVGEf@minbar/","msgid":"<9083131.CDJkKcVGEf@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:46","name":"[2/7] libstdc++: Annotate most lambdas with always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9083131.CDJkKcVGEf@minbar/mbox/"},{"id":57720,"url":"https://patchwork.plctlab.org/api/1.2/patches/57720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8239109.NyiUUSuA9g@minbar/","msgid":"<8239109.NyiUUSuA9g@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:51","name":"[3/7] libstdc++: Document timeout and timeout-factor of simd tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8239109.NyiUUSuA9g@minbar/mbox/"},{"id":57724,"url":"https://patchwork.plctlab.org/api/1.2/patches/57724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22986674.6Emhk5qWAg@minbar/","msgid":"<22986674.6Emhk5qWAg@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:58","name":"[4/7] libstdc++: Use a PCH to speed up check-simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22986674.6Emhk5qWAg@minbar/mbox/"},{"id":57722,"url":"https://patchwork.plctlab.org/api/1.2/patches/57722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3557908.R56niFO833@minbar/","msgid":"<3557908.R56niFO833@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:03","name":"[5/7] libstdc++: printf format string fix in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3557908.R56niFO833@minbar/mbox/"},{"id":57725,"url":"https://patchwork.plctlab.org/api/1.2/patches/57725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45331655.fMDQidcC6G@minbar/","msgid":"<45331655.fMDQidcC6G@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:07","name":"[6/7] libstdc++: Fix incorrect __builtin_is_constant_evaluated calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45331655.fMDQidcC6G@minbar/mbox/"},{"id":57721,"url":"https://patchwork.plctlab.org/api/1.2/patches/57721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/111787281.nniJfEyVGO@minbar/","msgid":"<111787281.nniJfEyVGO@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:11","name":"[7/7] libstdc++: Fix incorrect function call in -ffast-math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/111787281.nniJfEyVGO@minbar/mbox/"},{"id":57741,"url":"https://patchwork.plctlab.org/api/1.2/patches/57741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1dfbfce5-bd6d-482b-acde-183a890e8286-1676496480787@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-02-15T21:28:00","name":"[committed] Fortran: error recovery on invalid assumed size reference [PR104554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1dfbfce5-bd6d-482b-acde-183a890e8286-1676496480787@3c-app-gmx-bs56/mbox/"},{"id":57743,"url":"https://patchwork.plctlab.org/api/1.2/patches/57743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-de5f13fe-faca-4b54-a26b-10d7613d9096-1676497805862@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-02-15T21:50:05","name":"[committed] Fortran: error recovery on checking procedure argument intent [PR103608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-de5f13fe-faca-4b54-a26b-10d7613d9096-1676497805862@3c-app-gmx-bs56/mbox/"},{"id":57770,"url":"https://patchwork.plctlab.org/api/1.2/patches/57770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002334.38B1E2043D@pchp3.se.axis.com/","msgid":"<20230216002334.38B1E2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T00:23:34","name":"testsuite: Add CRIS to check_effective_target_lra non-LRA list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002334.38B1E2043D@pchp3.se.axis.com/mbox/"},{"id":57771,"url":"https://patchwork.plctlab.org/api/1.2/patches/57771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002846.E1B6A20441@pchp3.se.axis.com/","msgid":"<20230216002846.E1B6A20441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T00:28:46","name":"objs-gcc.sh: Only bootstrap if source-directory contains gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002846.E1B6A20441@pchp3.se.axis.com/mbox/"},{"id":57827,"url":"https://patchwork.plctlab.org/api/1.2/patches/57827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033001.15256-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033001.15256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:30:01","name":"RISC-V: Add RVV all mask C/C++ intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033001.15256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57828,"url":"https://patchwork.plctlab.org/api/1.2/patches/57828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033428.16157-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033428.16157-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:34:28","name":"RISC-V: Fix vmnot asm check (Should check vmnot.m instead of vmnot.mm)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033428.16157-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57829,"url":"https://patchwork.plctlab.org/api/1.2/patches/57829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033619.16472-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033619.16472-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:36:19","name":"RISC-V: Add vm* mask C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033619.16472-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57830,"url":"https://patchwork.plctlab.org/api/1.2/patches/57830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033819.16850-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033819.16850-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:38:19","name":"RISC-V: Add vid.v/viota.m C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033819.16850-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57831,"url":"https://patchwork.plctlab.org/api/1.2/patches/57831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034001.17197-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034001.17197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:40:01","name":"RISC-V: Add the res of all mask C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034001.17197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57832,"url":"https://patchwork.plctlab.org/api/1.2/patches/57832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034158.17684-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034158.17684-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:41:58","name":"RISC-V: Add vm* C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034158.17684-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57833,"url":"https://patchwork.plctlab.org/api/1.2/patches/57833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034445.18092-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034445.18092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:44:45","name":"RISC-V: Add all mask C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034445.18092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57880,"url":"https://patchwork.plctlab.org/api/1.2/patches/57880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-1-tejas.belagod@arm.com/","msgid":"<20230216061351.25090-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-02-16T06:13:50","name":"[1/2,GCC12] AArch64: Update transitive closures of aes, sha2 and sha3 extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-1-tejas.belagod@arm.com/mbox/"},{"id":57881,"url":"https://patchwork.plctlab.org/api/1.2/patches/57881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-2-tejas.belagod@arm.com/","msgid":"<20230216061351.25090-2-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-02-16T06:13:51","name":"[2/2,GCC12] AArch64: Gate various crypto intrinsics availability based on features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-2-tejas.belagod@arm.com/mbox/"},{"id":57891,"url":"https://patchwork.plctlab.org/api/1.2/patches/57891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216073133.4D6E73858022@sourceware.org/","msgid":"<20230216073133.4D6E73858022@sourceware.org>","list_archive_url":null,"date":"2023-02-16T07:29:26","name":"tree-optimization/108791 - checking ICE with sloppy ADDR_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216073133.4D6E73858022@sourceware.org/mbox/"},{"id":57894,"url":"https://patchwork.plctlab.org/api/1.2/patches/57894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-2-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:40","name":"[1/5] Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-2-shihua@iscas.ac.cn/mbox/"},{"id":57898,"url":"https://patchwork.plctlab.org/api/1.2/patches/57898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-3-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:41","name":"[V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-3-shihua@iscas.ac.cn/mbox/"},{"id":57896,"url":"https://patchwork.plctlab.org/api/1.2/patches/57896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-4-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:42","name":"[V2,3/5] Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-4-shihua@iscas.ac.cn/mbox/"},{"id":57897,"url":"https://patchwork.plctlab.org/api/1.2/patches/57897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-5-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:43","name":"[V2,4/5] Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-5-shihua@iscas.ac.cn/mbox/"},{"id":57895,"url":"https://patchwork.plctlab.org/api/1.2/patches/57895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-6-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:44","name":"[V2,5/5] Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-6-shihua@iscas.ac.cn/mbox/"},{"id":57900,"url":"https://patchwork.plctlab.org/api/1.2/patches/57900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-2-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:01","name":"[V2,1/5] Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-2-shihua@iscas.ac.cn/mbox/"},{"id":57904,"url":"https://patchwork.plctlab.org/api/1.2/patches/57904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-3-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:02","name":"[V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-3-shihua@iscas.ac.cn/mbox/"},{"id":57902,"url":"https://patchwork.plctlab.org/api/1.2/patches/57902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-4-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:03","name":"[V2,3/5] Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-4-shihua@iscas.ac.cn/mbox/"},{"id":57903,"url":"https://patchwork.plctlab.org/api/1.2/patches/57903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-5-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:04","name":"[V2,4/5] Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-5-shihua@iscas.ac.cn/mbox/"},{"id":57901,"url":"https://patchwork.plctlab.org/api/1.2/patches/57901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-6-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:05","name":"[V2,5/5] Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-6-shihua@iscas.ac.cn/mbox/"},{"id":57922,"url":"https://patchwork.plctlab.org/api/1.2/patches/57922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3rUiUVywYfwfDE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T08:37:38","name":"reassoc: Fix up (ab) handling in eliminate_redundant_comparison [PR108783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3rUiUVywYfwfDE@tucnak/mbox/"},{"id":57926,"url":"https://patchwork.plctlab.org/api/1.2/patches/57926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3vzqcqv9AZsKy+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T08:56:46","name":"tree-ssa-dse: Fix up handling of lhs of internal calls [PR108657]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3vzqcqv9AZsKy+@tucnak/mbox/"},{"id":57934,"url":"https://patchwork.plctlab.org/api/1.2/patches/57934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e561b827-6f23-07f9-f968-83f485f18cca@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T09:23:40","name":"rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e561b827-6f23-07f9-f968-83f485f18cca@linux.ibm.com/mbox/"},{"id":57959,"url":"https://patchwork.plctlab.org/api/1.2/patches/57959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216103030.94868-1-jwakely@redhat.com/","msgid":"<20230216103030.94868-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T10:30:30","name":"[committed] libstdc++: Fix uses of non-reserved names in headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216103030.94868-1-jwakely@redhat.com/mbox/"},{"id":57979,"url":"https://patchwork.plctlab.org/api/1.2/patches/57979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4RZHrFT1+jua/0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T11:20:17","name":"[committed] libgomp: Fix comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4RZHrFT1+jua/0@tucnak/mbox/"},{"id":57981,"url":"https://patchwork.plctlab.org/api/1.2/patches/57981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4Rk2d7OiB9JW70@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T11:21:02","name":"[committed] libgomp: Fix up some typos in libgomp.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4Rk2d7OiB9JW70@tucnak/mbox/"},{"id":57990,"url":"https://patchwork.plctlab.org/api/1.2/patches/57990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114016.105674-1-jwakely@redhat.com/","msgid":"<20230216114016.105674-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:40:16","name":"[committed] libstdc++: Fix non-reserved names in PSTL headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114016.105674-1-jwakely@redhat.com/mbox/"},{"id":57997,"url":"https://patchwork.plctlab.org/api/1.2/patches/57997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114924.108222-1-jwakely@redhat.com/","msgid":"<20230216114924.108222-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:49:24","name":"[committed] libstdc++: Add missing space after effective-target name in test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114924.108222-1-jwakely@redhat.com/mbox/"},{"id":57998,"url":"https://patchwork.plctlab.org/api/1.2/patches/57998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216115010.108388-1-jwakely@redhat.com/","msgid":"<20230216115010.108388-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:50:10","name":"[committed] libstdc++: Fix non-reserved names in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216115010.108388-1-jwakely@redhat.com/mbox/"},{"id":58014,"url":"https://patchwork.plctlab.org/api/1.2/patches/58014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216124034.124744-1-jwakely@redhat.com/","msgid":"<20230216124034.124744-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T12:40:34","name":"[committed] libstdc++: Make names_pstl.cc require et tbb_backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216124034.124744-1-jwakely@redhat.com/mbox/"},{"id":58075,"url":"https://patchwork.plctlab.org/api/1.2/patches/58075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216134431.1600922-1-ppalka@redhat.com/","msgid":"<20230216134431.1600922-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-16T13:44:31","name":"don'\''t declare header-defined functions both static and inline, pt 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216134431.1600922-1-ppalka@redhat.com/mbox/"},{"id":58107,"url":"https://patchwork.plctlab.org/api/1.2/patches/58107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jfsb5fzx9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T14:27:46","name":"constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jfsb5fzx9.fsf@arm.com/mbox/"},{"id":58113,"url":"https://patchwork.plctlab.org/api/1.2/patches/58113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143908.138045-1-jwakely@redhat.com/","msgid":"<20230216143908.138045-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:08","name":"[committed] libstdc++: Implement P2255R2 dangling checks for std::pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143908.138045-1-jwakely@redhat.com/mbox/"},{"id":58111,"url":"https://patchwork.plctlab.org/api/1.2/patches/58111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143926.138064-1-jwakely@redhat.com/","msgid":"<20230216143926.138064-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:26","name":"[committed] libstdc++: Enable CTAD for std::basic_format_args (LWG 3810)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143926.138064-1-jwakely@redhat.com/mbox/"},{"id":58112,"url":"https://patchwork.plctlab.org/api/1.2/patches/58112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143933.138086-1-jwakely@redhat.com/","msgid":"<20230216143933.138086-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:33","name":"[committed] libstdc++: Fix name of in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143933.138086-1-jwakely@redhat.com/mbox/"},{"id":58114,"url":"https://patchwork.plctlab.org/api/1.2/patches/58114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216144016.138203-1-jwakely@redhat.com/","msgid":"<20230216144016.138203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:40:16","name":"[committed] libstdc++: Implement (P0290)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216144016.138203-1-jwakely@redhat.com/mbox/"},{"id":58115,"url":"https://patchwork.plctlab.org/api/1.2/patches/58115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216145448.141622-1-jwakely@redhat.com/","msgid":"<20230216145448.141622-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:54:48","name":"[committed] libstdc++: Replace non-ascii character in test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216145448.141622-1-jwakely@redhat.com/mbox/"},{"id":58126,"url":"https://patchwork.plctlab.org/api/1.2/patches/58126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824A720063FEE6C4F10776DA4A09@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T15:11:50","name":"RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824A720063FEE6C4F10776DA4A09@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":58135,"url":"https://patchwork.plctlab.org/api/1.2/patches/58135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-02-16T15:32:49","name":"Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'' (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":58146,"url":"https://patchwork.plctlab.org/api/1.2/patches/58146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jedqpfw6c.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T15:48:43","name":"[ARM] MVE: Implementing auto-vectorized array * scalar instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jedqpfw6c.fsf@arm.com/mbox/"},{"id":58162,"url":"https://patchwork.plctlab.org/api/1.2/patches/58162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2815464-472d-a44f-a68a-2233309b3a22@126.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T16:09:10","name":"gcc: Remove size limit of PCH for *-*-mingw32 hosts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2815464-472d-a44f-a68a-2233309b3a22@126.com/mbox/"},{"id":58166,"url":"https://patchwork.plctlab.org/api/1.2/patches/58166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216162316.88085-1-iain@sandoe.co.uk/","msgid":"<20230216162316.88085-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-02-16T16:23:16","name":"[pushed] testsuite, objective-c: Cater for Windows intptr type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216162316.88085-1-iain@sandoe.co.uk/mbox/"},{"id":58175,"url":"https://patchwork.plctlab.org/api/1.2/patches/58175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b_k7Az5ycESE-_7nqJF4y8s4KLbdYx3Y=LbCVP+q_xfA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T17:39:16","name":"simplify-rtx: Fix VOIDmode operand handling in simplify_subreg [PR108805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b_k7Az5ycESE-_7nqJF4y8s4KLbdYx3Y=LbCVP+q_xfA@mail.gmail.com/mbox/"},{"id":58181,"url":"https://patchwork.plctlab.org/api/1.2/patches/58181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com/","msgid":"<5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com>","list_archive_url":null,"date":"2023-02-16T18:06:41","name":"[OG12,committed] amdgcn: OpenMP low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com/mbox/"},{"id":58219,"url":"https://patchwork.plctlab.org/api/1.2/patches/58219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216200529.AC55F2042C@pchp3.se.axis.com/","msgid":"<20230216200529.AC55F2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T20:05:29","name":"testsuite: Tweak gcc.dg/attr-aligned.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216200529.AC55F2042C@pchp3.se.axis.com/mbox/"},{"id":58233,"url":"https://patchwork.plctlab.org/api/1.2/patches/58233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873575z65l.fsf@euler.schwinge.homeip.net/","msgid":"<873575z65l.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T20:50:30","name":"[og12] '\''libgomp.c/usm-{1,2,3,4}.c'\'': Re-enable non-GCN offloading compilation (was: [OG12 commit] amdgcn, libgomp: USM allocation update)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873575z65l.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58237,"url":"https://patchwork.plctlab.org/api/1.2/patches/58237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9dxqlp.fsf@euler.schwinge.homeip.net/","msgid":"<87zg9dxqlp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:11:46","name":"[og12] Un-break nvptx libgomp build (was: [OG12][committed] amdgcn: OpenMP low-latency allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9dxqlp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58238,"url":"https://patchwork.plctlab.org/api/1.2/patches/58238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn4hxq0r.fsf@euler.schwinge.homeip.net/","msgid":"<87wn4hxq0r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:24:20","name":"[og12] Miscellaneous clean-up re OpenMP '\''ompx_unified_shared_mem_space'\'', '\''ompx_host_mem_space'\'' (was: [PATCH 3/5] openmp, nvptx: ompx_unified_shared_mem_alloc)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn4hxq0r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58240,"url":"https://patchwork.plctlab.org/api/1.2/patches/58240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttzlxpb3.fsf@euler.schwinge.homeip.net/","msgid":"<87ttzlxpb3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:39:44","name":"[og12] Clarify/verify OpenMP '\''omp_calloc'\'' zero-initialization for pinned memory (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttzlxpb3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58260,"url":"https://patchwork.plctlab.org/api/1.2/patches/58260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekxxo23.fsf@euler.schwinge.homeip.net/","msgid":"<87lekxxo23.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T22:06:44","name":"[og12] Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'' (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekxxo23.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58274,"url":"https://patchwork.plctlab.org/api/1.2/patches/58274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216231627.1748333-1-dmalcolm@redhat.com/","msgid":"<20230216231627.1748333-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-16T23:16:27","name":"[pushed] analyzer: respect some conditions from bit masks [PR108806]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216231627.1748333-1-dmalcolm@redhat.com/mbox/"},{"id":58300,"url":"https://patchwork.plctlab.org/api/1.2/patches/58300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217004236.070D233E6B@hamza.pair.com/","msgid":"<20230217004236.070D233E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-17T00:42:34","name":"[pushed] doc: Reword how to get possible values of a parameter (was: Document all param values and remove defaults (PR middle-end/86078))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217004236.070D233E6B@hamza.pair.com/mbox/"},{"id":58312,"url":"https://patchwork.plctlab.org/api/1.2/patches/58312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com/","msgid":"<8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com>","list_archive_url":null,"date":"2023-02-17T01:22:19","name":"[wwwdocs] testing: Tweak the link to upstream FTensor (was: Anyone using FTensor to test GCC (or otherwise)?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com/mbox/"},{"id":58315,"url":"https://patchwork.plctlab.org/api/1.2/patches/58315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217013405.584620-1-guojiufu@linux.ibm.com/","msgid":"<20230217013405.584620-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T01:34:05","name":"rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217013405.584620-1-guojiufu@linux.ibm.com/mbox/"},{"id":58352,"url":"https://patchwork.plctlab.org/api/1.2/patches/58352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0uou8ai.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:15:33","name":"[arm,testsuite] asm-flag-4.c: match quotes in expected message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0uou8ai.fsf@lxoliva.fsfla.org/mbox/"},{"id":58353,"url":"https://patchwork.plctlab.org/api/1.2/patches/58353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt5cu86w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:17:43","name":"[libstdc++,testsuite] intro/names.cc: undef func on vxw7krn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt5cu86w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58354,"url":"https://patchwork.plctlab.org/api/1.2/patches/58354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilg0u82g.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:20:23","name":"[arm] xfail fp-uint64-convert-double-* on all arm targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilg0u82g.fsf@lxoliva.fsfla.org/mbox/"},{"id":58356,"url":"https://patchwork.plctlab.org/api/1.2/patches/58356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredqou760.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:39:51","name":"[libstdc++] Use __gthread_join in jthread/95989","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredqou760.fsf@lxoliva.fsfla.org/mbox/"},{"id":58357,"url":"https://patchwork.plctlab.org/api/1.2/patches/58357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora61cu71u.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:42:21","name":"[PR100127] Test for coroutine header in clang-compatible tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora61cu71u.fsf@lxoliva.fsfla.org/mbox/"},{"id":58360,"url":"https://patchwork.plctlab.org/api/1.2/patches/58360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yc0u6f9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:55:54","name":"Skip module_cmi_p and related unsupported module test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yc0u6f9.fsf@lxoliva.fsfla.org/mbox/"},{"id":58366,"url":"https://patchwork.plctlab.org/api/1.2/patches/58366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qmou68k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:59:55","name":"Drop need for constant I in ctf test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qmou68k.fsf@lxoliva.fsfla.org/mbox/"},{"id":58369,"url":"https://patchwork.plctlab.org/api/1.2/patches/58369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn4gsrkk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:02:03","name":"Accept pmf-vbit-in-delta extra warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn4gsrkk.fsf@lxoliva.fsfla.org/mbox/"},{"id":58370,"url":"https://patchwork.plctlab.org/api/1.2/patches/58370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsff4srfy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:04:49","name":"[vxworks] make wint_t and wchar_t the same distinct type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsff4srfy.fsf@lxoliva.fsfla.org/mbox/"},{"id":58371,"url":"https://patchwork.plctlab.org/api/1.2/patches/58371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7pssrdz.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:06:00","name":"[arm] disable aes-1742098 mitigation for a72 combine tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7pssrdz.fsf@lxoliva.fsfla.org/mbox/"},{"id":58372,"url":"https://patchwork.plctlab.org/api/1.2/patches/58372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork00gsr8w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:09:03","name":"-Wdangling-pointer: don'\''t mark SSA lhs sets as stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork00gsr8w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58380,"url":"https://patchwork.plctlab.org/api/1.2/patches/58380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsb4sr3w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:12:03","name":"[arm] adjust expectations for armv8_2-fp16-move-[12].c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsb4sr3w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58379,"url":"https://patchwork.plctlab.org/api/1.2/patches/58379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbklssr0v.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:13:52","name":"[PR51534,arm] split out pr51534 test for softfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbklssr0v.fsf@lxoliva.fsfla.org/mbox/"},{"id":58378,"url":"https://patchwork.plctlab.org/api/1.2/patches/58378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cwgsqv5.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:17:18","name":"[arm] adjust tests for quotes around +cdecp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cwgsqv5.fsf@lxoliva.fsfla.org/mbox/"},{"id":58382,"url":"https://patchwork.plctlab.org/api/1.2/patches/58382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or3574spzu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:36:05","name":"[arm] complete vmsr/vmrs blank and case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or3574spzu.fsf@lxoliva.fsfla.org/mbox/"},{"id":58384,"url":"https://patchwork.plctlab.org/api/1.2/patches/58384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1owrbaj.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:39:00","name":"[PR104882,arm] require mve hw for mve run test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1owrbaj.fsf@lxoliva.fsfla.org/mbox/"},{"id":58385,"url":"https://patchwork.plctlab.org/api/1.2/patches/58385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttzkrb8u.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:40:01","name":"[libstdc++] xfail noreplace tests on vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttzkrb8u.fsf@lxoliva.fsfla.org/mbox/"},{"id":58387,"url":"https://patchwork.plctlab.org/api/1.2/patches/58387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orpma8rb4x.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:42:22","name":"[arm,vxworks] xfail fp-double-convert-float-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orpma8rb4x.fsf@lxoliva.fsfla.org/mbox/"},{"id":58388,"url":"https://patchwork.plctlab.org/api/1.2/patches/58388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlekwrb1w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:44:11","name":"[libstdc++] ensure mutex_pool survives _Safe_sequence_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlekwrb1w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58389,"url":"https://patchwork.plctlab.org/api/1.2/patches/58389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6vkravy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:47:45","name":"[PR77760,libstdc++] encode __time_get_state in tm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6vkravy.fsf@lxoliva.fsfla.org/mbox/"},{"id":58392,"url":"https://patchwork.plctlab.org/api/1.2/patches/58392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp/","msgid":"<20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp>","list_archive_url":null,"date":"2023-02-17T07:54:49","name":"[v7] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp/mbox/"},{"id":58409,"url":"https://patchwork.plctlab.org/api/1.2/patches/58409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217082258.3399094-1-zhujunxian@oss.cipunited.com/","msgid":"<20230217082258.3399094-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-17T08:24:55","name":"Hazard barrier return support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217082258.3399094-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":58413,"url":"https://patchwork.plctlab.org/api/1.2/patches/58413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217083531.3409405-1-zhujunxian@oss.cipunited.com/","msgid":"<20230217083531.3409405-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-17T08:35:56","name":"Add pattern for clo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217083531.3409405-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":58457,"url":"https://patchwork.plctlab.org/api/1.2/patches/58457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com/","msgid":"<4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T09:54:30","name":"[v2] rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com/mbox/"},{"id":58458,"url":"https://patchwork.plctlab.org/api/1.2/patches/58458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com/","msgid":"<737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T09:55:04","name":"rs6000: Fix vector_set_var_p9 by considering BE [PR108807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com/mbox/"},{"id":58470,"url":"https://patchwork.plctlab.org/api/1.2/patches/58470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+9TodOHE09e9Vwq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-17T10:14:57","name":"optabs: Fix up expand_doubleword_shift_condmove for shift_mask == 0 [PR108803]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+9TodOHE09e9Vwq@tucnak/mbox/"},{"id":58497,"url":"https://patchwork.plctlab.org/api/1.2/patches/58497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com/","msgid":"<27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com>","list_archive_url":null,"date":"2023-02-17T11:13:52","name":"Fortran: Avoid SAVE_EXPR for deferred-len char types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com/mbox/"},{"id":58520,"url":"https://patchwork.plctlab.org/api/1.2/patches/58520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113153.6E2753860740@sourceware.org/","msgid":"<20230217113153.6E2753860740@sourceware.org>","list_archive_url":null,"date":"2023-02-17T11:30:59","name":"Fix wrong-code issue in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113153.6E2753860740@sourceware.org/mbox/"},{"id":58524,"url":"https://patchwork.plctlab.org/api/1.2/patches/58524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113926.619E43843854@sourceware.org/","msgid":"<20230217113926.619E43843854@sourceware.org>","list_archive_url":null,"date":"2023-02-17T11:38:42","name":"tree-optimization/108821 - store motion and volatiles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113926.619E43843854@sourceware.org/mbox/"},{"id":58525,"url":"https://patchwork.plctlab.org/api/1.2/patches/58525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb5c90ba-0524-1695-f51e-012baf33930d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T11:45:33","name":"[PATCHv2] openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb5c90ba-0524-1695-f51e-012baf33930d@codesourcery.com/mbox/"},{"id":58542,"url":"https://patchwork.plctlab.org/api/1.2/patches/58542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzg9cxygc.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-17T12:34:27","name":"[COMMITTED] contrib: Fix make_sunver.pl warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzg9cxygc.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":58545,"url":"https://patchwork.plctlab.org/api/1.2/patches/58545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8k0xxqx.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-17T12:49:42","name":"[COMMITTED] fixincludes: Bypass solaris_math_12 on newer Solaris 11.4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8k0xxqx.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":58546,"url":"https://patchwork.plctlab.org/api/1.2/patches/58546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217125114.288597-1-juzhe.zhong@rivai.ai/","msgid":"<20230217125114.288597-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-17T12:51:14","name":"RISC-V: Add floating-point RVV C/C++ api","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217125114.288597-1-juzhe.zhong@rivai.ai/mbox/"},{"id":58567,"url":"https://patchwork.plctlab.org/api/1.2/patches/58567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217134130.2565745-1-siddhesh@gotplt.org/","msgid":"<20230217134130.2565745-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-02-17T13:41:30","name":"doc: Fix typo in -Wall description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217134130.2565745-1-siddhesh@gotplt.org/mbox/"},{"id":58594,"url":"https://patchwork.plctlab.org/api/1.2/patches/58594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T14:02:40","name":"RISC-V: Add divmod instruction support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"},{"id":58716,"url":"https://patchwork.plctlab.org/api/1.2/patches/58716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKK21deuX7U3Be7RHTdBzCnK77wqbBW6QwHdO4Gjircw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T16:51:14","name":"i386: Generate QImode binary ops with high-part input register [PR108831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKK21deuX7U3Be7RHTdBzCnK77wqbBW6QwHdO4Gjircw@mail.gmail.com/mbox/"},{"id":58723,"url":"https://patchwork.plctlab.org/api/1.2/patches/58723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com/","msgid":"<16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T16:58:41","name":"rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com/mbox/"},{"id":58740,"url":"https://patchwork.plctlab.org/api/1.2/patches/58740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at/","msgid":"<90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-17T18:17:26","name":"[C] Detect all variably modified types [PR108375]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at/mbox/"},{"id":58753,"url":"https://patchwork.plctlab.org/api/1.2/patches/58753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217185847.33102-1-polacek@redhat.com/","msgid":"<20230217185847.33102-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-17T18:58:47","name":"c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217185847.33102-1-polacek@redhat.com/mbox/"},{"id":58771,"url":"https://patchwork.plctlab.org/api/1.2/patches/58771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217203209.2141339-1-jason@redhat.com/","msgid":"<20230217203209.2141339-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-17T20:32:09","name":"[RFC] c++: static_assert (false) in template [DR2518]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217203209.2141339-1-jason@redhat.com/mbox/"},{"id":58777,"url":"https://patchwork.plctlab.org/api/1.2/patches/58777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+/sP+kFAwElRqWA@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T21:06:07","name":"[v2] c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+/sP+kFAwElRqWA@redhat.com/mbox/"},{"id":58781,"url":"https://patchwork.plctlab.org/api/1.2/patches/58781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-1-apinski@marvell.com/","msgid":"<20230217214538.2177094-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-17T21:45:37","name":"[1/2] Support get_range_query with a nullptr argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-1-apinski@marvell.com/mbox/"},{"id":58782,"url":"https://patchwork.plctlab.org/api/1.2/patches/58782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-2-apinski@marvell.com/","msgid":"<20230217214538.2177094-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-17T21:45:38","name":"[2/2] Remove #if GIMPLE around 1 - a pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-2-apinski@marvell.com/mbox/"},{"id":58783,"url":"https://patchwork.plctlab.org/api/1.2/patches/58783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217222603.2485714-1-qing.zhao@oracle.com/","msgid":"<20230217222603.2485714-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-17T22:26:03","name":"Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217222603.2485714-1-qing.zhao@oracle.com/mbox/"},{"id":58788,"url":"https://patchwork.plctlab.org/api/1.2/patches/58788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/AC6UX/X8MsficN@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T22:42:49","name":"[v3] c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/AC6UX/X8MsficN@redhat.com/mbox/"},{"id":58794,"url":"https://patchwork.plctlab.org/api/1.2/patches/58794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217230525.10750-1-alx@kernel.org/","msgid":"<20230217230525.10750-1-alx@kernel.org>","list_archive_url":null,"date":"2023-02-17T23:05:26","name":"[resend] Make -Wuse-after-free=3 the default one in -Wall","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217230525.10750-1-alx@kernel.org/mbox/"},{"id":58800,"url":"https://patchwork.plctlab.org/api/1.2/patches/58800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekv3n19.fsf@euler.schwinge.homeip.net/","msgid":"<87lekv3n19.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-17T23:11:30","name":"'\''#include \"tm_p.h\"'\'' in '\''gcc/rust/backend/rust-tree.cc'\'' (was: [gcc r13-5533] gccrs: const folding port)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekv3n19.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58881,"url":"https://patchwork.plctlab.org/api/1.2/patches/58881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f54bc212-d66e-51ae-7728-17a410eab85e@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-18T04:43:34","name":"[v5] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f54bc212-d66e-51ae-7728-17a410eab85e@yahoo.co.jp/mbox/"},{"id":58882,"url":"https://patchwork.plctlab.org/api/1.2/patches/58882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffa22cd6-978c-0f23-d2ff-c52000db3398@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-18T04:54:10","name":"xtensa: Enforce return address saving when -Og is specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffa22cd6-978c-0f23-d2ff-c52000db3398@yahoo.co.jp/mbox/"},{"id":58904,"url":"https://patchwork.plctlab.org/api/1.2/patches/58904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218094838.BC5FC33E95@hamza.pair.com/","msgid":"<20230218094838.BC5FC33E95@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T09:48:36","name":"[pushed] doc: Update link to AVR-LibC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218094838.BC5FC33E95@hamza.pair.com/mbox/"},{"id":58905,"url":"https://patchwork.plctlab.org/api/1.2/patches/58905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218095441.5043233E90@hamza.pair.com/","msgid":"<20230218095441.5043233E90@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T09:54:39","name":"[pushed] wwwdocs: readings: Update link to ETRAX manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218095441.5043233E90@hamza.pair.com/mbox/"},{"id":58906,"url":"https://patchwork.plctlab.org/api/1.2/patches/58906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218100134.9C10B33EAC@hamza.pair.com/","msgid":"<20230218100134.9C10B33EAC@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T10:01:32","name":"[pushed] libstdc++: Switch two links to www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218100134.9C10B33EAC@hamza.pair.com/mbox/"},{"id":58908,"url":"https://patchwork.plctlab.org/api/1.2/patches/58908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CqBQDCQZal1+1G@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-18T10:35:49","name":"i386: Fix up replacement of registers in certain peephole2s [PR108832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CqBQDCQZal1+1G@tucnak/mbox/"},{"id":58909,"url":"https://patchwork.plctlab.org/api/1.2/patches/58909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CrHDbQpnIxKUFj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-18T10:40:28","name":"reassoc: Fold some statements [PR108819]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CrHDbQpnIxKUFj@tucnak/mbox/"},{"id":58955,"url":"https://patchwork.plctlab.org/api/1.2/patches/58955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873572rd5p.fsf@igel.home/","msgid":"<873572rd5p.fsf@igel.home>","list_archive_url":null,"date":"2023-02-18T19:23:14","name":"Update baseline symbols for m68k-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873572rd5p.fsf@igel.home/mbox/"},{"id":59026,"url":"https://patchwork.plctlab.org/api/1.2/patches/59026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-1-jason@redhat.com/","msgid":"<20230218214239.2297623-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:37","name":"[RFC,1/3] c++: add __is_deducible trait [PR105841]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-1-jason@redhat.com/mbox/"},{"id":59028,"url":"https://patchwork.plctlab.org/api/1.2/patches/59028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-2-jason@redhat.com/","msgid":"<20230218214239.2297623-2-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:38","name":"[2/3] c++: fix alias CTAD [PR105841]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-2-jason@redhat.com/mbox/"},{"id":59027,"url":"https://patchwork.plctlab.org/api/1.2/patches/59027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-3-jason@redhat.com/","msgid":"<20230218214239.2297623-3-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:39","name":"[3/3] c++: CTAD for less-specialized alias template [PR102529]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-3-jason@redhat.com/mbox/"},{"id":59050,"url":"https://patchwork.plctlab.org/api/1.2/patches/59050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218223206.5458033E77@hamza.pair.com/","msgid":"<20230218223206.5458033E77@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T22:32:03","name":"[pushed] wwwdocs: gcc-12: Simplify a sentence in the OpenMP section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218223206.5458033E77@hamza.pair.com/mbox/"},{"id":59076,"url":"https://patchwork.plctlab.org/api/1.2/patches/59076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com/","msgid":"<02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com>","list_archive_url":null,"date":"2023-02-19T05:21:09","name":"[RFC] internal documentation for OMP_FOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com/mbox/"},{"id":59362,"url":"https://patchwork.plctlab.org/api/1.2/patches/59362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg99pm2o.fsf@debian/","msgid":"<87zg99pm2o.fsf@debian>","list_archive_url":null,"date":"2023-02-19T18:05:51","name":"Allow front ends to register spec functions gcc/{gcc.cc,gcc.h} [PR108261]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg99pm2o.fsf@debian/mbox/"},{"id":59357,"url":"https://patchwork.plctlab.org/api/1.2/patches/59357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230219191528.4921D33E50@hamza.pair.com/","msgid":"<20230219191528.4921D33E50@hamza.pair.com>","list_archive_url":null,"date":"2023-02-19T19:15:26","name":"[pushed] wwwdocs: *: Add a comma after \"In addition\" when used as transition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230219191528.4921D33E50@hamza.pair.com/mbox/"},{"id":59339,"url":"https://patchwork.plctlab.org/api/1.2/patches/59339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsb1no1k.fsf@debian/","msgid":"<87fsb1no1k.fsf@debian>","list_archive_url":null,"date":"2023-02-20T01:06:15","name":"Allow front ends to register spec functions gcc/{gcc.cc,gcc.h} [PR108261]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsb1no1k.fsf@debian/mbox/"},{"id":59323,"url":"https://patchwork.plctlab.org/api/1.2/patches/59323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com/","msgid":"<4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com>","list_archive_url":null,"date":"2023-02-20T02:04:27","name":"[rs6000] Merge two vector shift when their sources are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com/mbox/"},{"id":59330,"url":"https://patchwork.plctlab.org/api/1.2/patches/59330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220065445.207902-1-juzhe.zhong@rivai.ai/","msgid":"<20230220065445.207902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-20T06:54:45","name":"RISC-V: Add RVV reduction C/C++ intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220065445.207902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":59353,"url":"https://patchwork.plctlab.org/api/1.2/patches/59353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-2-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:21","name":"[V3,1/5] RISC-V: Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-2-shihua@iscas.ac.cn/mbox/"},{"id":59355,"url":"https://patchwork.plctlab.org/api/1.2/patches/59355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-3-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:22","name":"[V3,2/5] RISC-V: Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-3-shihua@iscas.ac.cn/mbox/"},{"id":59354,"url":"https://patchwork.plctlab.org/api/1.2/patches/59354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-4-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:23","name":"[V3,3/5] RISC-V: Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-4-shihua@iscas.ac.cn/mbox/"},{"id":59356,"url":"https://patchwork.plctlab.org/api/1.2/patches/59356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-5-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:24","name":"[V3,4/5] RISC-V: Implement ZKNH extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-5-shihua@iscas.ac.cn/mbox/"},{"id":59352,"url":"https://patchwork.plctlab.org/api/1.2/patches/59352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-6-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:25","name":"[V3,5/5] RISC-V: Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-6-shihua@iscas.ac.cn/mbox/"},{"id":59351,"url":"https://patchwork.plctlab.org/api/1.2/patches/59351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220101112.E5776396E47E@sourceware.org/","msgid":"<20230220101112.E5776396E47E@sourceware.org>","list_archive_url":null,"date":"2023-02-20T07:43:13","name":"tree-optimization/108819 - niter analysis ICE with unexpected constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220101112.E5776396E47E@sourceware.org/mbox/"},{"id":59341,"url":"https://patchwork.plctlab.org/api/1.2/patches/59341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220092515.A927A33E5C@hamza.pair.com/","msgid":"<20230220092515.A927A33E5C@hamza.pair.com>","list_archive_url":null,"date":"2023-02-20T09:25:13","name":"[pushed] wwwdocs: index: Remove link to Nick'\''s blog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220092515.A927A33E5C@hamza.pair.com/mbox/"},{"id":59337,"url":"https://patchwork.plctlab.org/api/1.2/patches/59337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220100306.CFFE43AA8C16@sourceware.org/","msgid":"<20230220100306.CFFE43AA8C16@sourceware.org>","list_archive_url":null,"date":"2023-02-20T10:02:19","name":"tree-optimization/108825 - checking ICE with unroll-and-jam","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220100306.CFFE43AA8C16@sourceware.org/mbox/"},{"id":59363,"url":"https://patchwork.plctlab.org/api/1.2/patches/59363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddcz64wrmy.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-20T10:36:05","name":"rust: Fix rust-tree.cc compilation on SPARC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddcz64wrmy.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":59372,"url":"https://patchwork.plctlab.org/api/1.2/patches/59372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220105631.4627639502F3@sourceware.org/","msgid":"<20230220105631.4627639502F3@sourceware.org>","list_archive_url":null,"date":"2023-02-20T10:55:43","name":"tree-optimization/108816 - vect versioning check split confusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220105631.4627639502F3@sourceware.org/mbox/"},{"id":59388,"url":"https://patchwork.plctlab.org/api/1.2/patches/59388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NYLexxdOdbgbjf@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-02-20T11:23:25","name":"libstdc++: Add missing functions to [PR79700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NYLexxdOdbgbjf@Thaum.localdomain/mbox/"},{"id":59396,"url":"https://patchwork.plctlab.org/api/1.2/patches/59396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NfXD/wr0I7rmH9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-20T11:54:04","name":"libstdc++: Some baseline_symbols.txt updates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NfXD/wr0I7rmH9@tucnak/mbox/"},{"id":59397,"url":"https://patchwork.plctlab.org/api/1.2/patches/59397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmilfwsfl2.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-20T12:10:01","name":"libstdc++: Update baseline symbols for riscv64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmilfwsfl2.fsf@suse.de/mbox/"},{"id":59441,"url":"https://patchwork.plctlab.org/api/1.2/patches/59441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220130855.7012D3846918@sourceware.org/","msgid":"<20230220130855.7012D3846918@sourceware.org>","list_archive_url":null,"date":"2023-02-20T13:08:09","name":"tree-optimization/108793 - niter compute type mismatch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220130855.7012D3846918@sourceware.org/mbox/"},{"id":59447,"url":"https://patchwork.plctlab.org/api/1.2/patches/59447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7po797z.fsf@euler.schwinge.homeip.net/","msgid":"<87o7po797z.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T13:33:04","name":"Rust: Don'\''t depend on unused '\''target-libffi'\'', '\''target-libbacktrace'\'' (was: [PATCH Rust front-end v2 32/37] gccrs: Add config-lang.in)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7po797z.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59451,"url":"https://patchwork.plctlab.org/api/1.2/patches/59451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0uktpds.fsf@euler.schwinge.homeip.net/","msgid":"<87r0uktpds.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T13:53:03","name":"[og12] Attempt to not just register but allocate OpenMP pinned memory using a device (was: [og12] Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0uktpds.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59474,"url":"https://patchwork.plctlab.org/api/1.2/patches/59474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilfwxu0m.fsf@euler.schwinge.homeip.net/","msgid":"<87ilfwxu0m.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T14:59:21","name":"Prototype '\''GOMP_enable_pinned_mode'\'' (was: [PATCH 08/17] openmp: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilfwxu0m.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59541,"url":"https://patchwork.plctlab.org/api/1.2/patches/59541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220153645.115207-1-kito.cheng@sifive.com/","msgid":"<20230220153645.115207-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-20T15:36:45","name":"[committed] RISC-V: prefetch.* only take base register with zero-offset for the address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220153645.115207-1-kito.cheng@sifive.com/mbox/"},{"id":59555,"url":"https://patchwork.plctlab.org/api/1.2/patches/59555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12342604.nUPlyArG6x@minbar/","msgid":"<12342604.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-02-20T16:31:55","name":"[committed] libstdc++: Fix uses of non-reserved names in simd header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12342604.nUPlyArG6x@minbar/mbox/"},{"id":59647,"url":"https://patchwork.plctlab.org/api/1.2/patches/59647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220194641.4172416-1-ppalka@redhat.com/","msgid":"<20230220194641.4172416-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-20T19:46:41","name":"c++: constant non-copy-init is manifestly constant [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220194641.4172416-1-ppalka@redhat.com/mbox/"},{"id":59665,"url":"https://patchwork.plctlab.org/api/1.2/patches/59665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-70379611-3104-41fb-b298-b55372325a13-1676925762184@3c-app-gmx-bap60/","msgid":"","list_archive_url":null,"date":"2023-02-20T20:42:42","name":"Fortran: improve checking of character length specification [PR96025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-70379611-3104-41fb-b298-b55372325a13-1676925762184@3c-app-gmx-bap60/mbox/"},{"id":59674,"url":"https://patchwork.plctlab.org/api/1.2/patches/59674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/PhbMGTVXDT4rre@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-20T21:09:00","name":"[committed] powerpc: Another umaddditi4 fix [PR108862]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/PhbMGTVXDT4rre@tucnak/mbox/"},{"id":59684,"url":"https://patchwork.plctlab.org/api/1.2/patches/59684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZFS5DXHt1Cdd6pMu+OF6RafRJ-m39S5f-0jkqg8kuo8A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-20T22:21:29","name":"i386: Introduce general_x64constmem_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZFS5DXHt1Cdd6pMu+OF6RafRJ-m39S5f-0jkqg8kuo8A@mail.gmail.com/mbox/"},{"id":59704,"url":"https://patchwork.plctlab.org/api/1.2/patches/59704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221023857.211542-1-xin.liu@oss.cipunited.com/","msgid":"<20230221023857.211542-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-21T02:39:12","name":"Testsuite: Disable micromips for MSA tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221023857.211542-1-xin.liu@oss.cipunited.com/mbox/"},{"id":59737,"url":"https://patchwork.plctlab.org/api/1.2/patches/59737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221031524.220339-1-xin.liu@oss.cipunited.com/","msgid":"<20230221031524.220339-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-21T03:16:04","name":"MIPS: Account for LWL/LWR in store_by_pieces_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221031524.220339-1-xin.liu@oss.cipunited.com/mbox/"},{"id":59778,"url":"https://patchwork.plctlab.org/api/1.2/patches/59778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221072001.480858-1-chenglulu@loongson.cn/","msgid":"<20230221072001.480858-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-02-21T07:20:02","name":"LoongArch: Change the value of macro TRY_EMPTY_VM_SPACE from 0x8000000000 to 0x1000000000.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221072001.480858-1-chenglulu@loongson.cn/mbox/"},{"id":59804,"url":"https://patchwork.plctlab.org/api/1.2/patches/59804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd8rgrwh75.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-21T08:33:50","name":"libstdc++: Update Solaris baselines for GCC 13.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd8rgrwh75.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":59814,"url":"https://patchwork.plctlab.org/api/1.2/patches/59814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093300.03F1913481@imap2.suse-dmz.suse.de/","msgid":"<20230221093300.03F1913481@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T09:32:59","name":"tree-optimization/108855 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093300.03F1913481@imap2.suse-dmz.suse.de/mbox/"},{"id":59815,"url":"https://patchwork.plctlab.org/api/1.2/patches/59815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093305.8E2BA13481@imap2.suse-dmz.suse.de/","msgid":"<20230221093305.8E2BA13481@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T09:33:05","name":"tree-optimization/108868 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093305.8E2BA13481@imap2.suse-dmz.suse.de/mbox/"},{"id":59843,"url":"https://patchwork.plctlab.org/api/1.2/patches/59843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz63xqrk.fsf@euler.schwinge.homeip.net/","msgid":"<87cz63xqrk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-21T10:21:51","name":"[PING,v2] Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz63xqrk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59901,"url":"https://patchwork.plctlab.org/api/1.2/patches/59901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdc01b81-7097-11bc-ab65-315388e3c916@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-21T11:57:22","name":"Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdc01b81-7097-11bc-ab65-315388e3c916@codesourcery.com/mbox/"},{"id":59952,"url":"https://patchwork.plctlab.org/api/1.2/patches/59952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-2-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:50","name":"[committed,001/103] gccrs: Fix missing dead code analysis ICE on local enum definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-2-arthur.cohen@embecosm.com/mbox/"},{"id":59957,"url":"https://patchwork.plctlab.org/api/1.2/patches/59957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-3-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:52","name":"[committed,002/103] gccrs: visibility: Rename get_public_vis_type -> get_vis_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-3-arthur.cohen@embecosm.com/mbox/"},{"id":59950,"url":"https://patchwork.plctlab.org/api/1.2/patches/59950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-4-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:53","name":"[committed,003/103] gccrs: dump: Emit visibility when dumping items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-4-arthur.cohen@embecosm.com/mbox/"},{"id":59951,"url":"https://patchwork.plctlab.org/api/1.2/patches/59951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-5-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:54","name":"[committed,004/103] gccrs: Add catch for recusive type queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-5-arthur.cohen@embecosm.com/mbox/"},{"id":59971,"url":"https://patchwork.plctlab.org/api/1.2/patches/59971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-6-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:55","name":"[committed,005/103] gccrs: testing: try loop in const function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-6-arthur.cohen@embecosm.com/mbox/"},{"id":59964,"url":"https://patchwork.plctlab.org/api/1.2/patches/59964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-7-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:56","name":"[committed,006/103] gccrs: ast: dump assignment and compound assignment expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-7-arthur.cohen@embecosm.com/mbox/"},{"id":59967,"url":"https://patchwork.plctlab.org/api/1.2/patches/59967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-8-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:57","name":"[committed,007/103] gccrs: ast: dump If expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-8-arthur.cohen@embecosm.com/mbox/"},{"id":59955,"url":"https://patchwork.plctlab.org/api/1.2/patches/59955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-9-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:58","name":"[committed,008/103] gccrs: builtins: Move implementation into source file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-9-arthur.cohen@embecosm.com/mbox/"},{"id":59960,"url":"https://patchwork.plctlab.org/api/1.2/patches/59960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-10-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:59","name":"[committed,009/103] gccrs: Track DefId on ADT variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-10-arthur.cohen@embecosm.com/mbox/"},{"id":59976,"url":"https://patchwork.plctlab.org/api/1.2/patches/59976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-11-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:00","name":"[committed,010/103] gccrs: Ensure uniqueness on Path probe'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-11-arthur.cohen@embecosm.com/mbox/"},{"id":59958,"url":"https://patchwork.plctlab.org/api/1.2/patches/59958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-12-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:01","name":"[committed,011/103] gccrs: Support looking up super traits for trait items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-12-arthur.cohen@embecosm.com/mbox/"},{"id":59966,"url":"https://patchwork.plctlab.org/api/1.2/patches/59966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-13-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:02","name":"[committed,012/103] gccrs: ast: dump: add emit_generic_params helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-13-arthur.cohen@embecosm.com/mbox/"},{"id":59970,"url":"https://patchwork.plctlab.org/api/1.2/patches/59970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-14-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:03","name":"[committed,013/103] gccrs: ast: dump: add format_{tuple, struct}_field helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-14-arthur.cohen@embecosm.com/mbox/"},{"id":59972,"url":"https://patchwork.plctlab.org/api/1.2/patches/59972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-15-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:04","name":"[committed,014/103] gccrs: ast: dump structs, enums and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-15-arthur.cohen@embecosm.com/mbox/"},{"id":59968,"url":"https://patchwork.plctlab.org/api/1.2/patches/59968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-16-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:05","name":"[committed,015/103] gccrs: intrinsics: Add data prefetching intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-16-arthur.cohen@embecosm.com/mbox/"},{"id":59969,"url":"https://patchwork.plctlab.org/api/1.2/patches/59969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-17-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:06","name":"[committed,016/103] gccrs: fix ICE on missing closing paren","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-17-arthur.cohen@embecosm.com/mbox/"},{"id":59982,"url":"https://patchwork.plctlab.org/api/1.2/patches/59982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-18-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:07","name":"[committed,017/103] gccrs: mappings: Add MacroInvocation -> MacroRulesDef mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-18-arthur.cohen@embecosm.com/mbox/"},{"id":59975,"url":"https://patchwork.plctlab.org/api/1.2/patches/59975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-19-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:08","name":"[committed,018/103] gccrs: rust-ast-resolve-item: Add note about resolving glob uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-19-arthur.cohen@embecosm.com/mbox/"},{"id":59986,"url":"https://patchwork.plctlab.org/api/1.2/patches/59986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-20-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:09","name":"[committed,019/103] gccrs: ast: Add accept_vis() method to `GenericArg`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-20-arthur.cohen@embecosm.com/mbox/"},{"id":59985,"url":"https://patchwork.plctlab.org/api/1.2/patches/59985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-21-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:10","name":"[committed,020/103] gccrs: early-name-resolver: Add simple macro name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-21-arthur.cohen@embecosm.com/mbox/"},{"id":59973,"url":"https://patchwork.plctlab.org/api/1.2/patches/59973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-22-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:11","name":"[committed,021/103] gccrs: Support type resolution on super traits on dyn objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-22-arthur.cohen@embecosm.com/mbox/"},{"id":59989,"url":"https://patchwork.plctlab.org/api/1.2/patches/59989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-23-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:12","name":"[committed,022/103] gccrs: Add mappings for fn_once lang item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-23-arthur.cohen@embecosm.com/mbox/"},{"id":59981,"url":"https://patchwork.plctlab.org/api/1.2/patches/59981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-24-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:13","name":"[committed,023/103] gccrs: Add ABI mappings for rust-call to map to ABI::RUST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-24-arthur.cohen@embecosm.com/mbox/"},{"id":59978,"url":"https://patchwork.plctlab.org/api/1.2/patches/59978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-25-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:14","name":"[committed,024/103] gccrs: Method resolution must support multiple candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-25-arthur.cohen@embecosm.com/mbox/"},{"id":59977,"url":"https://patchwork.plctlab.org/api/1.2/patches/59977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-26-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:15","name":"[committed,025/103] gccrs: ast: dump: fix extra newline in block without tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-26-arthur.cohen@embecosm.com/mbox/"},{"id":59994,"url":"https://patchwork.plctlab.org/api/1.2/patches/59994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-27-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:16","name":"[committed,026/103] gccrs: ast: dump: minor fixups to IfExpr formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-27-arthur.cohen@embecosm.com/mbox/"},{"id":59974,"url":"https://patchwork.plctlab.org/api/1.2/patches/59974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-28-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:17","name":"[committed,027/103] gccrs: ast: dump: ComparisonExpr and LazyBooleanExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-28-arthur.cohen@embecosm.com/mbox/"},{"id":59998,"url":"https://patchwork.plctlab.org/api/1.2/patches/59998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-29-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:18","name":"[committed,028/103] gccrs: ast: dump: ArrayExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-29-arthur.cohen@embecosm.com/mbox/"},{"id":59980,"url":"https://patchwork.plctlab.org/api/1.2/patches/59980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-30-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:19","name":"[committed,029/103] gccrs: ast: dump: various simple Exprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-30-arthur.cohen@embecosm.com/mbox/"},{"id":60003,"url":"https://patchwork.plctlab.org/api/1.2/patches/60003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-31-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:20","name":"[committed,030/103] gccrs: ast: dump: RangeExprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-31-arthur.cohen@embecosm.com/mbox/"},{"id":59993,"url":"https://patchwork.plctlab.org/api/1.2/patches/59993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-32-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:21","name":"[committed,031/103] gccrs: Refactor TraitResolver to not require a visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-32-arthur.cohen@embecosm.com/mbox/"},{"id":59979,"url":"https://patchwork.plctlab.org/api/1.2/patches/59979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-33-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:22","name":"[committed,032/103] gccrs: ast: dump TypeAlias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-33-arthur.cohen@embecosm.com/mbox/"},{"id":59996,"url":"https://patchwork.plctlab.org/api/1.2/patches/59996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-34-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:23","name":"[committed,033/103] gccrs: Support outer attribute handling on trait items just like normal items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-34-arthur.cohen@embecosm.com/mbox/"},{"id":60011,"url":"https://patchwork.plctlab.org/api/1.2/patches/60011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-35-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:24","name":"[committed,034/103] gccrs: dump: Emit visibility when dumping items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-35-arthur.cohen@embecosm.com/mbox/"},{"id":60002,"url":"https://patchwork.plctlab.org/api/1.2/patches/60002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-36-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:25","name":"[committed,035/103] gccrs: dump: Dump items within modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-36-arthur.cohen@embecosm.com/mbox/"},{"id":60015,"url":"https://patchwork.plctlab.org/api/1.2/patches/60015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-37-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:26","name":"[committed,036/103] gccrs: dump: Fix module dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-37-arthur.cohen@embecosm.com/mbox/"},{"id":59983,"url":"https://patchwork.plctlab.org/api/1.2/patches/59983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-38-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:27","name":"[committed,037/103] gccrs: ast: Module: unloaded module and inner attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-38-arthur.cohen@embecosm.com/mbox/"},{"id":59984,"url":"https://patchwork.plctlab.org/api/1.2/patches/59984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-39-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:28","name":"[committed,038/103] gccrs: dump: Dump macro rules definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-39-arthur.cohen@embecosm.com/mbox/"},{"id":60021,"url":"https://patchwork.plctlab.org/api/1.2/patches/60021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-40-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:29","name":"[committed,039/103] gccrs: Add check for recursive trait cycles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-40-arthur.cohen@embecosm.com/mbox/"},{"id":59987,"url":"https://patchwork.plctlab.org/api/1.2/patches/59987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-41-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:30","name":"[committed,040/103] gccrs: ast: Refactor ASTFragment -> Fragment class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-41-arthur.cohen@embecosm.com/mbox/"},{"id":60025,"url":"https://patchwork.plctlab.org/api/1.2/patches/60025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-42-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:31","name":"[committed,041/103] gccrs: rust: Replace uses of ASTFragment -> Fragment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-42-arthur.cohen@embecosm.com/mbox/"},{"id":59992,"url":"https://patchwork.plctlab.org/api/1.2/patches/59992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-43-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:32","name":"[committed,042/103] gccrs: ast: Improve Fragment API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-43-arthur.cohen@embecosm.com/mbox/"},{"id":59988,"url":"https://patchwork.plctlab.org/api/1.2/patches/59988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-44-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:33","name":"[committed,043/103] gccrs: Add missing fn_once_output langitem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-44-arthur.cohen@embecosm.com/mbox/"},{"id":60008,"url":"https://patchwork.plctlab.org/api/1.2/patches/60008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-45-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:34","name":"[committed,044/103] gccrs: Refactor expression hir lowering into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-45-arthur.cohen@embecosm.com/mbox/"},{"id":59995,"url":"https://patchwork.plctlab.org/api/1.2/patches/59995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-46-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:35","name":"[committed,045/103] gccrs: Formatting cleanup in HIR lowering pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-46-arthur.cohen@embecosm.com/mbox/"},{"id":60010,"url":"https://patchwork.plctlab.org/api/1.2/patches/60010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-47-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:36","name":"[committed,046/103] gccrs: Add name resolution for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-47-arthur.cohen@embecosm.com/mbox/"},{"id":60001,"url":"https://patchwork.plctlab.org/api/1.2/patches/60001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-48-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-48-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:37","name":"[committed,047/103] gccrs: Refactor method call type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-48-arthur.cohen@embecosm.com/mbox/"},{"id":59991,"url":"https://patchwork.plctlab.org/api/1.2/patches/59991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-49-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-49-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:38","name":"[committed,048/103] gccrs: Add closures to lints and error checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-49-arthur.cohen@embecosm.com/mbox/"},{"id":60033,"url":"https://patchwork.plctlab.org/api/1.2/patches/60033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-50-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-50-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:39","name":"[committed,049/103] gccrs: Initial Type resolution for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-50-arthur.cohen@embecosm.com/mbox/"},{"id":60036,"url":"https://patchwork.plctlab.org/api/1.2/patches/60036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-51-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-51-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:40","name":"[committed,050/103] gccrs: Closure support at CallExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-51-arthur.cohen@embecosm.com/mbox/"},{"id":60013,"url":"https://patchwork.plctlab.org/api/1.2/patches/60013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-52-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-52-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:41","name":"[committed,051/103] gccrs: Add missing name resolution to Function type-path segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-52-arthur.cohen@embecosm.com/mbox/"},{"id":60020,"url":"https://patchwork.plctlab.org/api/1.2/patches/60020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-53-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-53-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:42","name":"[committed,052/103] gccrs: Add missing hir lowering to function type-path segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-53-arthur.cohen@embecosm.com/mbox/"},{"id":59999,"url":"https://patchwork.plctlab.org/api/1.2/patches/59999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-54-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-54-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:43","name":"[committed,053/103] gccrs: Add missing type resolution for function type segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-54-arthur.cohen@embecosm.com/mbox/"},{"id":60004,"url":"https://patchwork.plctlab.org/api/1.2/patches/60004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-55-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-55-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:44","name":"[committed,054/103] gccrs: Support Closure calls as generic trait bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-55-arthur.cohen@embecosm.com/mbox/"},{"id":60045,"url":"https://patchwork.plctlab.org/api/1.2/patches/60045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-56-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-56-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:45","name":"[committed,055/103] gccrs: Implement the inline visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-56-arthur.cohen@embecosm.com/mbox/"},{"id":60040,"url":"https://patchwork.plctlab.org/api/1.2/patches/60040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-57-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-57-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:46","name":"[committed,056/103] gccrs: rust: Allow gccrs to build on x86_64-apple-darwin with clang/libc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-57-arthur.cohen@embecosm.com/mbox/"},{"id":60024,"url":"https://patchwork.plctlab.org/api/1.2/patches/60024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-58-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-58-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:47","name":"[committed,057/103] gccrs: builtins: Rename all bang macro handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-58-arthur.cohen@embecosm.com/mbox/"},{"id":60012,"url":"https://patchwork.plctlab.org/api/1.2/patches/60012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-59-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-59-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:48","name":"[committed,058/103] gccrs: intrinsics: Add `sorry_handler` intrinsic handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-59-arthur.cohen@embecosm.com/mbox/"},{"id":60019,"url":"https://patchwork.plctlab.org/api/1.2/patches/60019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-60-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-60-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:49","name":"[committed,059/103] gccrs: constexpr: Add `rust_sorry_at` in places relying on init values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-60-arthur.cohen@embecosm.com/mbox/"},{"id":60018,"url":"https://patchwork.plctlab.org/api/1.2/patches/60018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-61-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-61-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:50","name":"[committed,060/103] gccrs: intrinsics: Add early implementation for atomic_store_{seqcst, relaxed, release}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-61-arthur.cohen@embecosm.com/mbox/"},{"id":60009,"url":"https://patchwork.plctlab.org/api/1.2/patches/60009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-62-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-62-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:51","name":"[committed,061/103] gccrs: intrinsics: Add unchecked operation intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-62-arthur.cohen@embecosm.com/mbox/"},{"id":60050,"url":"https://patchwork.plctlab.org/api/1.2/patches/60050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-63-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-63-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:52","name":"[committed,062/103] gccrs: intrinsics: Use lambdas for wrapping_ intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-63-arthur.cohen@embecosm.com/mbox/"},{"id":60022,"url":"https://patchwork.plctlab.org/api/1.2/patches/60022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-64-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-64-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:53","name":"[committed,063/103] gccrs: intrinsics: Cleanup error handling around atomic_store_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-64-arthur.cohen@embecosm.com/mbox/"},{"id":60035,"url":"https://patchwork.plctlab.org/api/1.2/patches/60035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-65-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-65-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:54","name":"[committed,064/103] gccrs: intrinsics: Implement atomic_load intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-65-arthur.cohen@embecosm.com/mbox/"},{"id":60032,"url":"https://patchwork.plctlab.org/api/1.2/patches/60032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-66-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-66-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:55","name":"[committed,065/103] gccrs: ast: visitor pattern -> overload syntax compatibility layer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-66-arthur.cohen@embecosm.com/mbox/"},{"id":60027,"url":"https://patchwork.plctlab.org/api/1.2/patches/60027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-67-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-67-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:56","name":"[committed,066/103] gccrs: ast: transform helper methods to visits and add methods to simplify repeated patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-67-arthur.cohen@embecosm.com/mbox/"},{"id":60054,"url":"https://patchwork.plctlab.org/api/1.2/patches/60054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-68-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-68-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:57","name":"[committed,067/103] gccrs: ast: refer correctly to arguments in docs-strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-68-arthur.cohen@embecosm.com/mbox/"},{"id":60039,"url":"https://patchwork.plctlab.org/api/1.2/patches/60039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-69-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-69-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:58","name":"[committed,068/103] gccrs: ast: Dump unit struct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-69-arthur.cohen@embecosm.com/mbox/"},{"id":60056,"url":"https://patchwork.plctlab.org/api/1.2/patches/60056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-70-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-70-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:59","name":"[committed,069/103] gccrs: add lang item \"phantom_data\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-70-arthur.cohen@embecosm.com/mbox/"},{"id":60034,"url":"https://patchwork.plctlab.org/api/1.2/patches/60034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-71-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-71-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:00","name":"[committed,070/103] gccrs: add Location to AST::Visibility","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-71-arthur.cohen@embecosm.com/mbox/"},{"id":60060,"url":"https://patchwork.plctlab.org/api/1.2/patches/60060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-72-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-72-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:01","name":"[committed,071/103] gccrs: typecheck: Fix overzealous `delete` call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-72-arthur.cohen@embecosm.com/mbox/"},{"id":60038,"url":"https://patchwork.plctlab.org/api/1.2/patches/60038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-73-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-73-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:02","name":"[committed,072/103] gccrs: ast: add visit overload for references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-73-arthur.cohen@embecosm.com/mbox/"},{"id":60023,"url":"https://patchwork.plctlab.org/api/1.2/patches/60023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-74-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-74-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:03","name":"[committed,073/103] gccrs: ast: Dump where clause and recursively needed nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-74-arthur.cohen@embecosm.com/mbox/"},{"id":60064,"url":"https://patchwork.plctlab.org/api/1.2/patches/60064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-75-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-75-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:04","name":"[committed,074/103] gccrs: ast: Dump slice type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-75-arthur.cohen@embecosm.com/mbox/"},{"id":60042,"url":"https://patchwork.plctlab.org/api/1.2/patches/60042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-76-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-76-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:05","name":"[committed,075/103] gccrs: ast: Dump array type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-76-arthur.cohen@embecosm.com/mbox/"},{"id":60031,"url":"https://patchwork.plctlab.org/api/1.2/patches/60031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-77-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-77-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:06","name":"[committed,076/103] gccrs: ast: Dump raw pointer type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-77-arthur.cohen@embecosm.com/mbox/"},{"id":60046,"url":"https://patchwork.plctlab.org/api/1.2/patches/60046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-78-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-78-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:07","name":"[committed,077/103] gccrs: ast: Dump never type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-78-arthur.cohen@embecosm.com/mbox/"},{"id":60066,"url":"https://patchwork.plctlab.org/api/1.2/patches/60066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-79-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-79-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:08","name":"[committed,078/103] gccrs: ast: Dump tuple type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-79-arthur.cohen@embecosm.com/mbox/"},{"id":60049,"url":"https://patchwork.plctlab.org/api/1.2/patches/60049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-80-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-80-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:09","name":"[committed,079/103] gccrs: ast: Dump inferred type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-80-arthur.cohen@embecosm.com/mbox/"},{"id":60043,"url":"https://patchwork.plctlab.org/api/1.2/patches/60043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-81-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-81-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:10","name":"[committed,080/103] gccrs: ast: Dump bare function type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-81-arthur.cohen@embecosm.com/mbox/"},{"id":60068,"url":"https://patchwork.plctlab.org/api/1.2/patches/60068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-82-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-82-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:11","name":"[committed,081/103] gccrs: ast: Dump impl trait type one bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-82-arthur.cohen@embecosm.com/mbox/"},{"id":60037,"url":"https://patchwork.plctlab.org/api/1.2/patches/60037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-83-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-83-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:12","name":"[committed,082/103] gccrs: ast: Dump impl trait type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-83-arthur.cohen@embecosm.com/mbox/"},{"id":60041,"url":"https://patchwork.plctlab.org/api/1.2/patches/60041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-84-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-84-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:13","name":"[committed,083/103] gccrs: ast: Dump trait object type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-84-arthur.cohen@embecosm.com/mbox/"},{"id":60053,"url":"https://patchwork.plctlab.org/api/1.2/patches/60053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-85-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-85-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:14","name":"[committed,084/103] gccrs: ast: Dump parenthesised type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-85-arthur.cohen@embecosm.com/mbox/"},{"id":60044,"url":"https://patchwork.plctlab.org/api/1.2/patches/60044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-86-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-86-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:15","name":"[committed,085/103] gccrs: ast: Dump trait object type one bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-86-arthur.cohen@embecosm.com/mbox/"},{"id":60057,"url":"https://patchwork.plctlab.org/api/1.2/patches/60057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-87-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-87-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:16","name":"[committed,086/103] gccrs: ast: Dump type param type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-87-arthur.cohen@embecosm.com/mbox/"},{"id":60071,"url":"https://patchwork.plctlab.org/api/1.2/patches/60071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-88-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-88-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:17","name":"[committed,087/103] gccrs: ast: Dump generic parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-88-arthur.cohen@embecosm.com/mbox/"},{"id":60074,"url":"https://patchwork.plctlab.org/api/1.2/patches/60074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-89-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-89-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:18","name":"[committed,088/103] gccrs: ast: Remove unused include in rust-ast-dump.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-89-arthur.cohen@embecosm.com/mbox/"},{"id":60059,"url":"https://patchwork.plctlab.org/api/1.2/patches/60059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-90-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-90-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:19","name":"[committed,089/103] gccrs: ast: Dump remove /* stmp */ comment to not clutter the dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-90-arthur.cohen@embecosm.com/mbox/"},{"id":60047,"url":"https://patchwork.plctlab.org/api/1.2/patches/60047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-91-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-91-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:20","name":"[committed,090/103] gccrs: ast: Dump no comma after self in fn params if it is the last one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-91-arthur.cohen@embecosm.com/mbox/"},{"id":60062,"url":"https://patchwork.plctlab.org/api/1.2/patches/60062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-92-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-92-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:21","name":"[committed,091/103] gccrs: Remove default location. Add visibility location to create_* functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-92-arthur.cohen@embecosm.com/mbox/"},{"id":60077,"url":"https://patchwork.plctlab.org/api/1.2/patches/60077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-93-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-93-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:22","name":"[committed,092/103] gccrs: Improve lexer dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-93-arthur.cohen@embecosm.com/mbox/"},{"id":60048,"url":"https://patchwork.plctlab.org/api/1.2/patches/60048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-94-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-94-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:23","name":"[committed,093/103] gccrs: Get rid of make builtin macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-94-arthur.cohen@embecosm.com/mbox/"},{"id":60055,"url":"https://patchwork.plctlab.org/api/1.2/patches/60055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-95-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-95-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:24","name":"[committed,094/103] gccrs: Refactor name resolver to take a Rib::ItemType","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-95-arthur.cohen@embecosm.com/mbox/"},{"id":60051,"url":"https://patchwork.plctlab.org/api/1.2/patches/60051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-96-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-96-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:25","name":"[committed,095/103] gccrs: Add closure binding'\''s tracking to name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-96-arthur.cohen@embecosm.com/mbox/"},{"id":60079,"url":"https://patchwork.plctlab.org/api/1.2/patches/60079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-97-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-97-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:26","name":"[committed,096/103] gccrs: Add capture tracking to the type info for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-97-arthur.cohen@embecosm.com/mbox/"},{"id":60052,"url":"https://patchwork.plctlab.org/api/1.2/patches/60052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-98-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-98-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:27","name":"[committed,097/103] gccrs: Add initial support for argument capture of closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-98-arthur.cohen@embecosm.com/mbox/"},{"id":60080,"url":"https://patchwork.plctlab.org/api/1.2/patches/60080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-99-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-99-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:28","name":"[committed,098/103] gccrs: Fix undefined behaviour issues on macos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-99-arthur.cohen@embecosm.com/mbox/"},{"id":60065,"url":"https://patchwork.plctlab.org/api/1.2/patches/60065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-100-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-100-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:29","name":"[committed,099/103] gccrs: Skip this debug test case which is failing on the latest mac-os devtools and its only for debug info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-100-arthur.cohen@embecosm.com/mbox/"},{"id":60061,"url":"https://patchwork.plctlab.org/api/1.2/patches/60061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-101-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-101-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:30","name":"[committed,100/103] gccrs: Cleanup unused parameters to fix the bootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-101-arthur.cohen@embecosm.com/mbox/"},{"id":60067,"url":"https://patchwork.plctlab.org/api/1.2/patches/60067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-102-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-102-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:31","name":"[committed,101/103] gccrs: Repair '\''gcc/rust/lang.opt'\'' comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-102-arthur.cohen@embecosm.com/mbox/"},{"id":60070,"url":"https://patchwork.plctlab.org/api/1.2/patches/60070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-103-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-103-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:32","name":"[committed,102/103] gccrs: const evaluator: Remove get_nth_callarg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-103-arthur.cohen@embecosm.com/mbox/"},{"id":60058,"url":"https://patchwork.plctlab.org/api/1.2/patches/60058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-104-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-104-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:33","name":"[committed,103/103] gccrs: add math intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-104-arthur.cohen@embecosm.com/mbox/"},{"id":60082,"url":"https://patchwork.plctlab.org/api/1.2/patches/60082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221124800.25BFD13223@imap2.suse-dmz.suse.de/","msgid":"<20230221124800.25BFD13223@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T12:47:59","name":"tree-optimization/108691 - remove trigger-happy assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221124800.25BFD13223@imap2.suse-dmz.suse.de/mbox/"},{"id":60084,"url":"https://patchwork.plctlab.org/api/1.2/patches/60084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkln6uxx.fsf@euler.schwinge.homeip.net/","msgid":"<87bkln6uxx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-21T12:53:46","name":"Update copyright years. (was: [committed 003/103] gccrs: dump: Emit visibility when dumping items)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkln6uxx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60102,"url":"https://patchwork.plctlab.org/api/1.2/patches/60102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141405.1798120-1-ibuclaw@gdcproject.org/","msgid":"<20230221141405.1798120-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:14:05","name":"[committed] libphobos: Add @nogc to gcc.backtrace and gcc.libbacktrace modules.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141405.1798120-1-ibuclaw@gdcproject.org/mbox/"},{"id":60104,"url":"https://patchwork.plctlab.org/api/1.2/patches/60104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141900.1802009-1-ibuclaw@gdcproject.org/","msgid":"<20230221141900.1802009-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:19:00","name":"[committed] d: Set doing_semantic_analysis_p before calling functionSemantic3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141900.1802009-1-ibuclaw@gdcproject.org/mbox/"},{"id":60107,"url":"https://patchwork.plctlab.org/api/1.2/patches/60107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221142350.1806182-1-ibuclaw@gdcproject.org/","msgid":"<20230221142350.1806182-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:23:50","name":"[committed] d: Only handle the left-to-right evaluation of a call expression during gimplify","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221142350.1806182-1-ibuclaw@gdcproject.org/mbox/"},{"id":60114,"url":"https://patchwork.plctlab.org/api/1.2/patches/60114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221143536.1818454-1-ibuclaw@gdcproject.org/","msgid":"<20230221143536.1818454-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:35:36","name":"[committed] d: Merge upstream dmd, druntime 09faa4eacd, phobos 13ef27a56.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221143536.1818454-1-ibuclaw@gdcproject.org/mbox/"},{"id":60115,"url":"https://patchwork.plctlab.org/api/1.2/patches/60115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7pncc66.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-21T14:42:41","name":"[1/2] ipa-cp: Fix various issues in update_specialized_profile (PR 107925)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7pncc66.fsf@suse.cz/mbox/"},{"id":60116,"url":"https://patchwork.plctlab.org/api/1.2/patches/60116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt57cc64.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-21T14:42:43","name":"[2/2] ipa-cp: Improve updating behavior when profile counts have gone bad","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt57cc64.fsf@suse.cz/mbox/"},{"id":60117,"url":"https://patchwork.plctlab.org/api/1.2/patches/60117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221144604.2128750-1-qing.zhao@oracle.com/","msgid":"<20230221144604.2128750-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-21T14:46:04","name":"[V2] Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221144604.2128750-1-qing.zhao@oracle.com/mbox/"},{"id":60129,"url":"https://patchwork.plctlab.org/api/1.2/patches/60129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86pma3nipf.fsf@aarsen.me/","msgid":"<86pma3nipf.fsf@aarsen.me>","list_archive_url":null,"date":"2023-02-21T14:59:37","name":"Ping^2: [PATCH+wwwdocs 0/8] A small Texinfo refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86pma3nipf.fsf@aarsen.me/mbox/"},{"id":60227,"url":"https://patchwork.plctlab.org/api/1.2/patches/60227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221191036.1140927-1-ppalka@redhat.com/","msgid":"<20230221191036.1140927-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-21T19:10:36","name":"c++: more mce_false folding from cp_fully_fold_init [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221191036.1140927-1-ppalka@redhat.com/mbox/"},{"id":60263,"url":"https://patchwork.plctlab.org/api/1.2/patches/60263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a066b400-95d8-49cf-9f44-9cacacb8ff0f-1677014338288@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-02-21T21:18:58","name":"Fortran: reject invalid CHARACTER length of derived type components [PR96024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a066b400-95d8-49cf-9f44-9cacacb8ff0f-1677014338288@3c-app-gmx-bs33/mbox/"},{"id":60271,"url":"https://patchwork.plctlab.org/api/1.2/patches/60271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221215622.3077474-1-jcmvbkbc@gmail.com/","msgid":"<20230221215622.3077474-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-21T21:56:22","name":"[COMMITTED] gcc: xtensa: fix PR target/108876","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221215622.3077474-1-jcmvbkbc@gmail.com/mbox/"},{"id":60272,"url":"https://patchwork.plctlab.org/api/1.2/patches/60272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221220733.2068735-1-dmalcolm@redhat.com/","msgid":"<20230221220733.2068735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-21T22:07:33","name":"[pushed] analyzer: stop exploring the path after certain diagnostics [PR108830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221220733.2068735-1-dmalcolm@redhat.com/mbox/"},{"id":60285,"url":"https://patchwork.plctlab.org/api/1.2/patches/60285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com/","msgid":"<3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com>","list_archive_url":null,"date":"2023-02-21T23:02:32","name":"vect: Check that vector factor is a compile-time constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com/mbox/"},{"id":60348,"url":"https://patchwork.plctlab.org/api/1.2/patches/60348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com/","msgid":"<7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com>","list_archive_url":null,"date":"2023-02-22T06:06:23","name":"libstdc++: Limit allocations in _Rb_tree 1/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com/mbox/"},{"id":60350,"url":"https://patchwork.plctlab.org/api/1.2/patches/60350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com/","msgid":"<98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com>","list_archive_url":null,"date":"2023-02-22T06:08:24","name":"libstdc++: Limit allocations in _Rb_tree 2/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com/mbox/"},{"id":60376,"url":"https://patchwork.plctlab.org/api/1.2/patches/60376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XbFF0VQV9htP5E@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:06:28","name":"c++: Don'\''t recurse on DECL_INITIAL for DECL_EXPR on non-VAR_DECLs [PR108606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XbFF0VQV9htP5E@tucnak/mbox/"},{"id":60378,"url":"https://patchwork.plctlab.org/api/1.2/patches/60378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XclksRe7Btwfim@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:12:54","name":"cgraph: Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE in more spots [PR106258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XclksRe7Btwfim@tucnak/mbox/"},{"id":60379,"url":"https://patchwork.plctlab.org/api/1.2/patches/60379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XfcHZqlRUGJ+GQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:25:04","name":"cygwin: Don'\''t try to support multilibs [PR107998]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XfcHZqlRUGJ+GQ@tucnak/mbox/"},{"id":60455,"url":"https://patchwork.plctlab.org/api/1.2/patches/60455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwa6o46.fsf@euler.schwinge.homeip.net/","msgid":"<877cwa6o46.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-22T09:33:29","name":"Rust: Move void_list_node init to common code (was: [PATCH] Move void_list_node init to common code)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwa6o46.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60434,"url":"https://patchwork.plctlab.org/api/1.2/patches/60434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222094351.1075-1-jinma@linux.alibaba.com/","msgid":"<20230222094351.1075-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-22T09:43:51","name":"RISC-V: When the TARGET_COMPUTE_MULTILIB hook is implemented, check the version of each extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222094351.1075-1-jinma@linux.alibaba.com/mbox/"},{"id":60458,"url":"https://patchwork.plctlab.org/api/1.2/patches/60458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222102609.1099-1-jinma@linux.alibaba.com/","msgid":"<20230222102609.1099-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-22T10:26:09","name":"RISC-V: Don'\''t report an error until the link phase if suitable multilib isn'\''t found.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222102609.1099-1-jinma@linux.alibaba.com/mbox/"},{"id":60459,"url":"https://patchwork.plctlab.org/api/1.2/patches/60459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3af129a-55d1-663d-0177-08bfd51c4895@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-22T10:59:06","name":"[wwwdocs] OpenMP update for gcc-13/changes.html + projects/gomp/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3af129a-55d1-663d-0177-08bfd51c4895@codesourcery.com/mbox/"},{"id":60460,"url":"https://patchwork.plctlab.org/api/1.2/patches/60460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/X2sryMfD4FufBF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T11:04:18","name":"tree: Add 3 argument fndecl_built_in_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/X2sryMfD4FufBF@tucnak/mbox/"},{"id":60471,"url":"https://patchwork.plctlab.org/api/1.2/patches/60471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qmi6iya.fsf@euler.schwinge.homeip.net/","msgid":"<871qmi6iya.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-22T11:25:01","name":"Rust: In '\''type_for_mode'\'' langhook also consider all '\''int_n'\'' modes/types (was: Modula-2 / Rust: Many targets failing)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qmi6iya.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60514,"url":"https://patchwork.plctlab.org/api/1.2/patches/60514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222121904.4087522-1-Yash.Shinde@windriver.com/","msgid":"<20230222121904.4087522-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:19:04","name":"Share work directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222121904.4087522-1-Yash.Shinde@windriver.com/mbox/"},{"id":60515,"url":"https://patchwork.plctlab.org/api/1.2/patches/60515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122114.47958-1-kito.cheng@sifive.com/","msgid":"<20230222122114.47958-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-22T12:21:14","name":"[committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122114.47958-1-kito.cheng@sifive.com/mbox/"},{"id":60516,"url":"https://patchwork.plctlab.org/api/1.2/patches/60516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122333.28218-1-Yash.Shinde@windriver.com/","msgid":"<20230222122333.28218-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:23:33","name":"libgcc_s: Use alias for __cpu_indicator_init instead of symver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122333.28218-1-Yash.Shinde@windriver.com/mbox/"},{"id":60517,"url":"https://patchwork.plctlab.org/api/1.2/patches/60517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222123411.419584-1-Yash.Shinde@windriver.com/","msgid":"<20230222123411.419584-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:34:11","name":"Pass CXXFLAGS_FOR_BUILD to avoid build failure errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222123411.419584-1-Yash.Shinde@windriver.com/mbox/"},{"id":60640,"url":"https://patchwork.plctlab.org/api/1.2/patches/60640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/Zf9GkrxxWxG8Eo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T18:33:24","name":"tree, v2: Add 3 argument fndecl_built_in_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/Zf9GkrxxWxG8Eo@tucnak/mbox/"},{"id":60671,"url":"https://patchwork.plctlab.org/api/1.2/patches/60671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222194509.3606756-1-ppalka@redhat.com/","msgid":"<20230222194509.3606756-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-22T19:45:09","name":"c++: unevaluated array new-expr size constantness [PR108219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222194509.3606756-1-ppalka@redhat.com/mbox/"},{"id":60713,"url":"https://patchwork.plctlab.org/api/1.2/patches/60713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222223745.166070-1-polacek@redhat.com/","msgid":"<20230222223745.166070-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-22T22:37:45","name":"c-family: avoid compile-time-hog in c_genericize [PR108880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222223745.166070-1-polacek@redhat.com/mbox/"},{"id":60715,"url":"https://patchwork.plctlab.org/api/1.2/patches/60715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222225913.7BAC233E54@hamza.pair.com/","msgid":"<20230222225913.7BAC233E54@hamza.pair.com>","list_archive_url":null,"date":"2023-02-22T22:59:06","name":"[pushed] wwwdocs: gcc-9: Various changes around -flive-patching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222225913.7BAC233E54@hamza.pair.com/mbox/"},{"id":60726,"url":"https://patchwork.plctlab.org/api/1.2/patches/60726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222235812.185722-1-polacek@redhat.com/","msgid":"<20230222235812.185722-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-22T23:58:12","name":"c++: variable template and targ deduction [PR108550]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222235812.185722-1-polacek@redhat.com/mbox/"},{"id":60771,"url":"https://patchwork.plctlab.org/api/1.2/patches/60771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfe3ee6-f897-1939-05ea-3e427ad53ae6@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-23T03:41:40","name":"[1/2] xtensa: Fix non-fatal regression introduced by b2ef02e8cbbaf95fee98be255f697f47193960ec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfe3ee6-f897-1939-05ea-3e427ad53ae6@yahoo.co.jp/mbox/"},{"id":60772,"url":"https://patchwork.plctlab.org/api/1.2/patches/60772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3fdecfb-5560-97a5-327d-7db751fe6ec1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-23T03:42:32","name":"[2/2] xtensa: Fix missing mode warnings in machine description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3fdecfb-5560-97a5-327d-7db751fe6ec1@yahoo.co.jp/mbox/"},{"id":60803,"url":"https://patchwork.plctlab.org/api/1.2/patches/60803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/cOFKwwDsz+DgAO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T06:56:20","name":"ipa-prop: Fix another case of missing BUILT_IN_UNREACHABLE_TRAP handling [PR106258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/cOFKwwDsz+DgAO@tucnak/mbox/"},{"id":60854,"url":"https://patchwork.plctlab.org/api/1.2/patches/60854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7492903.EvYhyI6sBW@minbar/","msgid":"<7492903.EvYhyI6sBW@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:19","name":"[1/8] libstdc++: Simplify three helper functions into one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7492903.EvYhyI6sBW@minbar/mbox/"},{"id":60851,"url":"https://patchwork.plctlab.org/api/1.2/patches/60851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3152270.5fSG56mABF@minbar/","msgid":"<3152270.5fSG56mABF@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:29","name":"[2/8] libstdc++: Fix simd build failure on clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3152270.5fSG56mABF@minbar/mbox/"},{"id":60853,"url":"https://patchwork.plctlab.org/api/1.2/patches/60853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1944554.usQuhbGJ8B@minbar/","msgid":"<1944554.usQuhbGJ8B@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:43","name":"[3/8] libstdc++: More efficient masked inc-/decrement implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1944554.usQuhbGJ8B@minbar/mbox/"},{"id":60848,"url":"https://patchwork.plctlab.org/api/1.2/patches/60848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2550642.Lt9SDvczpP@minbar/","msgid":"<2550642.Lt9SDvczpP@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:51","name":"[4/8] libstdc++: Add missing constexpr on simd shift implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2550642.Lt9SDvczpP@minbar/mbox/"},{"id":60852,"url":"https://patchwork.plctlab.org/api/1.2/patches/60852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3667544.MHq7AAxBmi@minbar/","msgid":"<3667544.MHq7AAxBmi@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:57","name":"[5/8] libstdc++: Always-inline most of non-cmath fixed_size implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3667544.MHq7AAxBmi@minbar/mbox/"},{"id":60850,"url":"https://patchwork.plctlab.org/api/1.2/patches/60850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2147606.Icojqenx9y@minbar/","msgid":"<2147606.Icojqenx9y@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:02","name":"[6/8] libstdc++: Fix formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2147606.Icojqenx9y@minbar/mbox/"},{"id":60849,"url":"https://patchwork.plctlab.org/api/1.2/patches/60849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/838576767.0ifERbkFSE@minbar/","msgid":"<838576767.0ifERbkFSE@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:10","name":"[7/8] libstdc++: Fix -Wsign-compare issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/838576767.0ifERbkFSE@minbar/mbox/"},{"id":60847,"url":"https://patchwork.plctlab.org/api/1.2/patches/60847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2166927.NgBsaNRSFp@minbar/","msgid":"<2166927.NgBsaNRSFp@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:16","name":"[8/8] libstdc++: Test that integral simd reductions are precise","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2166927.NgBsaNRSFp@minbar/mbox/"},{"id":60866,"url":"https://patchwork.plctlab.org/api/1.2/patches/60866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223092935.579700-1-chenglulu@loongson.cn/","msgid":"<20230223092935.579700-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-02-23T09:29:36","name":"[v2] LoongArch: Change the value of macro TRY_EMPTY_VM_SPACE from 0x8000000000 to 0x1000000000.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223092935.579700-1-chenglulu@loongson.cn/mbox/"},{"id":60868,"url":"https://patchwork.plctlab.org/api/1.2/patches/60868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-1-jcmvbkbc@gmail.com/","msgid":"<20230223093726.3258958-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-23T09:37:25","name":"[COMMITTED,1/2] Revert \"gcc: xtensa: fix PR target/108876\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-1-jcmvbkbc@gmail.com/mbox/"},{"id":60867,"url":"https://patchwork.plctlab.org/api/1.2/patches/60867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-2-jcmvbkbc@gmail.com/","msgid":"<20230223093726.3258958-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-23T09:37:26","name":"[COMMITTED,2/2] xtensa: fix PR target/108876","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-2-jcmvbkbc@gmail.com/mbox/"},{"id":60883,"url":"https://patchwork.plctlab.org/api/1.2/patches/60883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223101014.B2D2E13928@imap2.suse-dmz.suse.de/","msgid":"<20230223101014.B2D2E13928@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T10:10:14","name":"tree-optimization/108888 - call if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223101014.B2D2E13928@imap2.suse-dmz.suse.de/mbox/"},{"id":60886,"url":"https://patchwork.plctlab.org/api/1.2/patches/60886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c+mpY9VdAiIVFO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:23:22","name":"c++: Add target hook for emit_support_tinfos [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c+mpY9VdAiIVFO@tucnak/mbox/"},{"id":60887,"url":"https://patchwork.plctlab.org/api/1.2/patches/60887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c/U4Y3wDN/K+uc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:26:27","name":"c++: Fix up -fcontracts option description [PR108890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c/U4Y3wDN/K+uc@tucnak/mbox/"},{"id":60888,"url":"https://patchwork.plctlab.org/api/1.2/patches/60888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-2-arsen@aarsen.me/","msgid":"<20230223102714.3606058-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:10","name":"[v2,1/5] docs: Create Indices appendix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-2-arsen@aarsen.me/mbox/"},{"id":60892,"url":"https://patchwork.plctlab.org/api/1.2/patches/60892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-3-arsen@aarsen.me/","msgid":"<20230223102714.3606058-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:11","name":"[v2,2/5] **/*.texi: Reorder index entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-3-arsen@aarsen.me/mbox/"},{"id":60890,"url":"https://patchwork.plctlab.org/api/1.2/patches/60890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-4-arsen@aarsen.me/","msgid":"<20230223102714.3606058-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:12","name":"[v2,3/5] doc: Add @defbuiltin family of helpers, set documentlanguage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-4-arsen@aarsen.me/mbox/"},{"id":60891,"url":"https://patchwork.plctlab.org/api/1.2/patches/60891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-5-arsen@aarsen.me/","msgid":"<20230223102714.3606058-5-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:13","name":"[v2,4/5] Update texinfo.tex, remove the @gol macro/alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-5-arsen@aarsen.me/mbox/"},{"id":60889,"url":"https://patchwork.plctlab.org/api/1.2/patches/60889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-6-arsen@aarsen.me/","msgid":"<20230223102714.3606058-6-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:14","name":"[v2,5/5] update_web_docs_git: Update CSS reference to new manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-6-arsen@aarsen.me/mbox/"},{"id":60893,"url":"https://patchwork.plctlab.org/api/1.2/patches/60893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/dBSvWvHlyViuhb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:34:50","name":"xtensa: Fix up fatal_error message strings in xtensa-dynconfig.c [PR108890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/dBSvWvHlyViuhb@tucnak/mbox/"},{"id":60906,"url":"https://patchwork.plctlab.org/api/1.2/patches/60906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223110326.2D39C139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223110326.2D39C139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T11:03:25","name":"Fix memory leak in if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223110326.2D39C139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60920,"url":"https://patchwork.plctlab.org/api/1.2/patches/60920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223114826.79148-1-sebastian.huber@embedded-brains.de/","msgid":"<20230223114826.79148-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-02-23T11:48:26","name":"[gcc] RTEMS: Tune multilib selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223114826.79148-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":60945,"url":"https://patchwork.plctlab.org/api/1.2/patches/60945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com/","msgid":"<80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com>","list_archive_url":null,"date":"2023-02-23T12:16:52","name":"[committed,OG12] libgomp: no need to attach USM pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com/mbox/"},{"id":60958,"url":"https://patchwork.plctlab.org/api/1.2/patches/60958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223125427.DA402139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223125427.DA402139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T12:54:27","name":"Avoid default-initializing auto_vec storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223125427.DA402139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60959,"url":"https://patchwork.plctlab.org/api/1.2/patches/60959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223132126.96E7E139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223132126.96E7E139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T13:21:26","name":"Fix memory leak in PTA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223132126.96E7E139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60998,"url":"https://patchwork.plctlab.org/api/1.2/patches/60998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C9BEE9EF-2C2F-43F9-B848-99D08D4C6ED9@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-02-23T14:12:46","name":"[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C9BEE9EF-2C2F-43F9-B848-99D08D4C6ED9@oracle.com/mbox/"},{"id":61001,"url":"https://patchwork.plctlab.org/api/1.2/patches/61001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com/","msgid":"<89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com>","list_archive_url":null,"date":"2023-02-23T14:14:24","name":"[v3,2/2] Update documentation to clarify a GCC extension (PR77650)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com/mbox/"},{"id":61004,"url":"https://patchwork.plctlab.org/api/1.2/patches/61004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/d1nMrKs775Bfs+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T14:18:04","name":"testsuite: Fix up modules.exp [PR108899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/d1nMrKs775Bfs+@tucnak/mbox/"},{"id":61013,"url":"https://patchwork.plctlab.org/api/1.2/patches/61013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982579B72C4CEE0A3C1BC9983AB9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-23T15:11:39","name":"libatomic: Fix SEQ_CST 128-bit atomic load [PR108891]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982579B72C4CEE0A3C1BC9983AB9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":61039,"url":"https://patchwork.plctlab.org/api/1.2/patches/61039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223173741.532305-1-jwakely@redhat.com/","msgid":"<20230223173741.532305-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-23T17:37:41","name":"libstdc++: Add Doxygen comment for string::resize_and_overwite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223173741.532305-1-jwakely@redhat.com/mbox/"},{"id":61084,"url":"https://patchwork.plctlab.org/api/1.2/patches/61084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com/","msgid":"<860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com>","list_archive_url":null,"date":"2023-02-23T21:14:48","name":"Fix std::unordered_map key range insertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com/mbox/"},{"id":61086,"url":"https://patchwork.plctlab.org/api/1.2/patches/61086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223215245.1513700-1-ppalka@redhat.com/","msgid":"<20230223215245.1513700-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-23T21:52:45","name":"c++: non-dependent variable template-id [PR108848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223215245.1513700-1-ppalka@redhat.com/mbox/"},{"id":61091,"url":"https://patchwork.plctlab.org/api/1.2/patches/61091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223235133.140864-1-polacek@redhat.com/","msgid":"<20230223235133.140864-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-23T23:51:33","name":"c++: ICE with constexpr variable template [PR107938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223235133.140864-1-polacek@redhat.com/mbox/"},{"id":61093,"url":"https://patchwork.plctlab.org/api/1.2/patches/61093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-1-jcmvbkbc@gmail.com/","msgid":"<20230224000005.3355736-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-24T00:00:04","name":"[COMMITTED,1/2] gcc: xtensa: rename xtensa-dynconfig.c and update its build rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-1-jcmvbkbc@gmail.com/mbox/"},{"id":61092,"url":"https://patchwork.plctlab.org/api/1.2/patches/61092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-2-jcmvbkbc@gmail.com/","msgid":"<20230224000005.3355736-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-24T00:00:05","name":"[COMMITTED,2/2] gcc: xtensa: update include style in xtensa-dynconfig.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-2-jcmvbkbc@gmail.com/mbox/"},{"id":61104,"url":"https://patchwork.plctlab.org/api/1.2/patches/61104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224022439.18998-1-palmer@rivosinc.com/","msgid":"<20230224022439.18998-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-02-24T02:24:39","name":"RISC-V: Disable attribute generation by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224022439.18998-1-palmer@rivosinc.com/mbox/"},{"id":61125,"url":"https://patchwork.plctlab.org/api/1.2/patches/61125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-2-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:17","name":"[v3,01/11] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-2-christoph.muellner@vrull.eu/mbox/"},{"id":61124,"url":"https://patchwork.plctlab.org/api/1.2/patches/61124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-3-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:18","name":"[v3,02/11] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-3-christoph.muellner@vrull.eu/mbox/"},{"id":61129,"url":"https://patchwork.plctlab.org/api/1.2/patches/61129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-4-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:19","name":"[v3,03/11] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-4-christoph.muellner@vrull.eu/mbox/"},{"id":61123,"url":"https://patchwork.plctlab.org/api/1.2/patches/61123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-5-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:20","name":"[v3,04/11] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-5-christoph.muellner@vrull.eu/mbox/"},{"id":61127,"url":"https://patchwork.plctlab.org/api/1.2/patches/61127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-6-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:21","name":"[v3,05/11] riscv: thead: Add support for the XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-6-christoph.muellner@vrull.eu/mbox/"},{"id":61128,"url":"https://patchwork.plctlab.org/api/1.2/patches/61128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-7-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:22","name":"[v3,06/11] riscv: thead: Add support for the XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-7-christoph.muellner@vrull.eu/mbox/"},{"id":61126,"url":"https://patchwork.plctlab.org/api/1.2/patches/61126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-8-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:23","name":"[v3,07/11] riscv: thead: Add support for the XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-8-christoph.muellner@vrull.eu/mbox/"},{"id":61131,"url":"https://patchwork.plctlab.org/api/1.2/patches/61131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-9-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:24","name":"[v3,08/11] riscv: thead: Add support for the XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-9-christoph.muellner@vrull.eu/mbox/"},{"id":61132,"url":"https://patchwork.plctlab.org/api/1.2/patches/61132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-10-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:25","name":"[v3,09/11] riscv: thead: Add support for the XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-10-christoph.muellner@vrull.eu/mbox/"},{"id":61133,"url":"https://patchwork.plctlab.org/api/1.2/patches/61133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-11-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-11-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:26","name":"[v3,10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-11-christoph.muellner@vrull.eu/mbox/"},{"id":61130,"url":"https://patchwork.plctlab.org/api/1.2/patches/61130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-12-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-12-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:27","name":"[v3,11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-12-christoph.muellner@vrull.eu/mbox/"},{"id":61165,"url":"https://patchwork.plctlab.org/api/1.2/patches/61165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224072835.12177-1-vit.kabele@sysgo.com/","msgid":"<20230224072835.12177-1-vit.kabele@sysgo.com>","list_archive_url":null,"date":"2023-02-24T07:28:36","name":"[v2] Print padding size when aligning struct member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224072835.12177-1-vit.kabele@sysgo.com/mbox/"},{"id":61181,"url":"https://patchwork.plctlab.org/api/1.2/patches/61181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8632fa5-8f26-970d-0f57-dc7bed6d42e4@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-24T08:20:26","name":"[(pushed)] libsanitizer: cherry-pick commit 8f5962b1ccb5fcd4d4544121d43efb860ac3cc6d from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8632fa5-8f26-970d-0f57-dc7bed6d42e4@suse.cz/mbox/"},{"id":61186,"url":"https://patchwork.plctlab.org/api/1.2/patches/61186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224083008.1082527-1-guojiufu@linux.ibm.com/","msgid":"<20230224083008.1082527-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-24T08:30:08","name":"use subreg for movsf_from_si and remove UNSPEC_SF_FROM_SI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224083008.1082527-1-guojiufu@linux.ibm.com/mbox/"},{"id":61189,"url":"https://patchwork.plctlab.org/api/1.2/patches/61189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz/","msgid":"<7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz>","list_archive_url":null,"date":"2023-02-24T09:00:01","name":"asan: adjust module name for global variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz/mbox/"},{"id":61203,"url":"https://patchwork.plctlab.org/api/1.2/patches/61203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iDFmMergDAsy+2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T09:27:50","name":"[committed] i386: Fix up builtins used in avx512bf16vlintrin.h [PR108881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iDFmMergDAsy+2@tucnak/mbox/"},{"id":61204,"url":"https://patchwork.plctlab.org/api/1.2/patches/61204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iFEoRtKXyRe46M@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T09:36:18","name":"cgraphclones: Don'\''t share DECL_ARGUMENTS between thunk and its artificial thunk [PR108854]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iFEoRtKXyRe46M@tucnak/mbox/"},{"id":61275,"url":"https://patchwork.plctlab.org/api/1.2/patches/61275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224111908.92419-1-christoph.muellner@vrull.eu/","msgid":"<20230224111908.92419-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T11:19:08","name":"[wwwdocs] gcc-13: riscv: Document the T-Head CPU support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224111908.92419-1-christoph.muellner@vrull.eu/mbox/"},{"id":61276,"url":"https://patchwork.plctlab.org/api/1.2/patches/61276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com/","msgid":"<07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com>","list_archive_url":null,"date":"2023-02-24T11:31:59","name":"Fortran: Skip bound conv in gfc_conv_gfc_desc_to_cfi_desc with intent(out) ptr [PR108621]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com/mbox/"},{"id":61277,"url":"https://patchwork.plctlab.org/api/1.2/patches/61277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224113245.9645013246@imap2.suse-dmz.suse.de/","msgid":"<20230224113245.9645013246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T11:32:45","name":"[1/2] Change vec<, , vl_embed>::m_vecdata refrences into address ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224113245.9645013246@imap2.suse-dmz.suse.de/mbox/"},{"id":61279,"url":"https://patchwork.plctlab.org/api/1.2/patches/61279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224114444.7E2CE13246@imap2.suse-dmz.suse.de/","msgid":"<20230224114444.7E2CE13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T11:44:44","name":"[2/2] Avoid default-initializing auto_vec storage, fix vec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224114444.7E2CE13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61296,"url":"https://patchwork.plctlab.org/api/1.2/patches/61296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iqLkrnUsZr8eCy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T12:14:38","name":"[committed] i386: Update i386-builtin.def file comment description of BDESC{,_FIRST}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iqLkrnUsZr8eCy@tucnak/mbox/"},{"id":61320,"url":"https://patchwork.plctlab.org/api/1.2/patches/61320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134622.09FCF13246@imap2.suse-dmz.suse.de/","msgid":"<20230224134622.09FCF13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T13:46:21","name":"[1/2] Change vec<, , vl_embed>::m_vecdata refrences into address ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134622.09FCF13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61321,"url":"https://patchwork.plctlab.org/api/1.2/patches/61321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134739.D386F13246@imap2.suse-dmz.suse.de/","msgid":"<20230224134739.D386F13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T13:47:39","name":"[2/2] Avoid default-initializing auto_vec storage, fix vec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134739.D386F13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61336,"url":"https://patchwork.plctlab.org/api/1.2/patches/61336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224141905.711154-1-jwakely@redhat.com/","msgid":"<20230224141905.711154-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:19:05","name":"[committed] libstdc++: Reorder dg-options before dg-do","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224141905.711154-1-jwakely@redhat.com/mbox/"},{"id":61337,"url":"https://patchwork.plctlab.org/api/1.2/patches/61337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142522.713327-1-jwakely@redhat.com/","msgid":"<20230224142522.713327-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:25:22","name":"[committed] libstdc++: Suppress warnings about use of deprecated std::aligned_storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142522.713327-1-jwakely@redhat.com/mbox/"},{"id":61338,"url":"https://patchwork.plctlab.org/api/1.2/patches/61338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-1-jwakely@redhat.com/","msgid":"<20230224142808.714075-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:04","name":"[committed,1/5] libstdc++: Optimize net::ip::address_v4::to_string()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-1-jwakely@redhat.com/mbox/"},{"id":61342,"url":"https://patchwork.plctlab.org/api/1.2/patches/61342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-2-jwakely@redhat.com/","msgid":"<20230224142808.714075-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:05","name":"[committed,2/5] libstdc++: Fix conversion to/from net::ip::address_v4::bytes_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-2-jwakely@redhat.com/mbox/"},{"id":61341,"url":"https://patchwork.plctlab.org/api/1.2/patches/61341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-3-jwakely@redhat.com/","msgid":"<20230224142808.714075-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:06","name":"[committed,3/5] libstdc++: Fix members of net::ip::network_v4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-3-jwakely@redhat.com/mbox/"},{"id":61340,"url":"https://patchwork.plctlab.org/api/1.2/patches/61340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-4-jwakely@redhat.com/","msgid":"<20230224142808.714075-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:07","name":"[committed,4/5] libstdc++: Make net::ip::basic_endpoint comparisons constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-4-jwakely@redhat.com/mbox/"},{"id":61339,"url":"https://patchwork.plctlab.org/api/1.2/patches/61339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-5-jwakely@redhat.com/","msgid":"<20230224142808.714075-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:08","name":"[committed,5/5] libstdc++: Constrain net::executor constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-5-jwakely@redhat.com/mbox/"},{"id":61369,"url":"https://patchwork.plctlab.org/api/1.2/patches/61369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151802.215659-1-juzhe.zhong@rivai.ai/","msgid":"<20230224151802.215659-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-24T15:18:02","name":"RISC-V: Add scalar move support and fix VSETVL bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151802.215659-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61370,"url":"https://patchwork.plctlab.org/api/1.2/patches/61370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151914.215909-1-juzhe.zhong@rivai.ai/","msgid":"<20230224151914.215909-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-24T15:19:14","name":"RISC-V: Add testcase for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151914.215909-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61394,"url":"https://patchwork.plctlab.org/api/1.2/patches/61394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224163753.8649920423@pchp3.se.axis.com/","msgid":"<20230224163753.8649920423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T16:37:53","name":"testsuite: Add -fno-ivopts to gcc.dg/Wuse-after-free-2.c, PR108828","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224163753.8649920423@pchp3.se.axis.com/mbox/"},{"id":61408,"url":"https://patchwork.plctlab.org/api/1.2/patches/61408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224175433.CF5002043D@pchp3.se.axis.com/","msgid":"<20230224175433.CF5002043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T17:54:33","name":"testsuite: Don'\''t include multiline regexps in the the pass/fail log","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224175433.CF5002043D@pchp3.se.axis.com/mbox/"},{"id":61413,"url":"https://patchwork.plctlab.org/api/1.2/patches/61413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-2-qing.zhao@oracle.com/","msgid":"<20230224183505.4112295-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-24T18:35:04","name":"[v4,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-2-qing.zhao@oracle.com/mbox/"},{"id":61414,"url":"https://patchwork.plctlab.org/api/1.2/patches/61414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-3-qing.zhao@oracle.com/","msgid":"<20230224183505.4112295-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-24T18:35:05","name":"[V4,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-3-qing.zhao@oracle.com/mbox/"},{"id":61420,"url":"https://patchwork.plctlab.org/api/1.2/patches/61420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191603.3935F20447@pchp3.se.axis.com/","msgid":"<20230224191603.3935F20447@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T19:16:03","name":"[1/2] testsuite: Provide means to regexp in multiline patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191603.3935F20447@pchp3.se.axis.com/mbox/"},{"id":61421,"url":"https://patchwork.plctlab.org/api/1.2/patches/61421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191843.729A520444@pchp3.se.axis.com/","msgid":"<20230224191843.729A520444@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T19:18:43","name":"[2/2] testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-3.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191843.729A520444@pchp3.se.axis.com/mbox/"},{"id":61447,"url":"https://patchwork.plctlab.org/api/1.2/patches/61447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-726fb111-e89a-40c0-8abb-5ed9970c20fb-1677271105148@3c-app-gmx-bs39/","msgid":"","list_archive_url":null,"date":"2023-02-24T20:38:25","name":"[committed] Fortran: frontend passes do_subscript leaks gmp memory [PR108924]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-726fb111-e89a-40c0-8abb-5ed9970c20fb-1677271105148@3c-app-gmx-bs39/mbox/"},{"id":61456,"url":"https://patchwork.plctlab.org/api/1.2/patches/61456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr/","msgid":"<246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr>","list_archive_url":null,"date":"2023-02-24T21:21:13","name":"[pushed] fortran: Plug leak of associated_dummy memory. [PR108923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr/mbox/"},{"id":61500,"url":"https://patchwork.plctlab.org/api/1.2/patches/61500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com/","msgid":"<174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com>","list_archive_url":null,"date":"2023-02-25T09:50:33","name":"[v2] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com/mbox/"},{"id":61501,"url":"https://patchwork.plctlab.org/api/1.2/patches/61501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225100105.3477550-1-jcmvbkbc@gmail.com/","msgid":"<20230225100105.3477550-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-25T10:01:05","name":"gcc: xtensa: fix PR target/108919","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225100105.3477550-1-jcmvbkbc@gmail.com/mbox/"},{"id":61519,"url":"https://patchwork.plctlab.org/api/1.2/patches/61519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225140523.3493078-1-jcmvbkbc@gmail.com/","msgid":"<20230225140523.3493078-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-25T14:05:23","name":"[COMMITTED] gcc: xtensa: fix PR target/108919","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225140523.3493078-1-jcmvbkbc@gmail.com/mbox/"},{"id":61528,"url":"https://patchwork.plctlab.org/api/1.2/patches/61528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr/","msgid":"<48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr>","list_archive_url":null,"date":"2023-02-25T16:35:04","name":"fortran: Reuse associated_dummy memory if previously allocated [PR108923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr/mbox/"},{"id":61535,"url":"https://patchwork.plctlab.org/api/1.2/patches/61535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0a55c0d-964c-4a07-bc72-e3fe5e733cb0-1677349043450@3c-app-gmx-bap72/","msgid":"","list_archive_url":null,"date":"2023-02-25T18:17:23","name":"[committed] Fortran: fix memory leak with real to integer conversion warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0a55c0d-964c-4a07-bc72-e3fe5e733cb0-1677349043450@3c-app-gmx-bap72/mbox/"},{"id":61577,"url":"https://patchwork.plctlab.org/api/1.2/patches/61577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ec9808-7f52-659f-7859-72573bb76263@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-26T06:38:58","name":"gcc.c-torture/compile/103818.c: enable for llp64 too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ec9808-7f52-659f-7859-72573bb76263@gmail.com/mbox/"},{"id":61647,"url":"https://patchwork.plctlab.org/api/1.2/patches/61647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp/","msgid":"<76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp>","list_archive_url":null,"date":"2023-02-26T17:27:42","name":"xtensa: Make use of CLAMPS instruction if configured","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp/mbox/"},{"id":61654,"url":"https://patchwork.plctlab.org/api/1.2/patches/61654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com/","msgid":"<17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com>","list_archive_url":null,"date":"2023-02-26T19:52:43","name":"[libgfortran] Initailize some variable to get rid of nuisance warnings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com/mbox/"},{"id":61702,"url":"https://patchwork.plctlab.org/api/1.2/patches/61702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227032223.176203-1-zhujunxian@oss.cipunited.com/","msgid":"<20230227032223.176203-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-27T03:22:45","name":"MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227032223.176203-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":61755,"url":"https://patchwork.plctlab.org/api/1.2/patches/61755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227080132.53115-1-juzhe.zhong@rivai.ai/","msgid":"<20230227080132.53115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-27T08:01:32","name":"RISC-V: Remove void_type_node of void_args for vsetvlmax intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227080132.53115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61893,"url":"https://patchwork.plctlab.org/api/1.2/patches/61893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com/","msgid":"<4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com>","list_archive_url":null,"date":"2023-02-27T09:52:38","name":"gcc.dg/overflow-warn-9.c: exclude from LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com/mbox/"},{"id":61896,"url":"https://patchwork.plctlab.org/api/1.2/patches/61896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0cc9e3-5c41-2bc4-64fb-37e6902d9ef5@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T10:09:34","name":"gcc.dg/memchr-3.c: fix for LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0cc9e3-5c41-2bc4-64fb-37e6902d9ef5@gmail.com/mbox/"},{"id":61899,"url":"https://patchwork.plctlab.org/api/1.2/patches/61899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com/","msgid":"<57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com>","list_archive_url":null,"date":"2023-02-27T10:29:23","name":"c-c++-common/Warray-bounds.c: fix excess warnings on LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com/mbox/"},{"id":61900,"url":"https://patchwork.plctlab.org/api/1.2/patches/61900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227103225.335443-1-juzhe.zhong@rivai.ai/","msgid":"<20230227103225.335443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-27T10:32:25","name":"RISC-V: Add permutation C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227103225.335443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61921,"url":"https://patchwork.plctlab.org/api/1.2/patches/61921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com/","msgid":"<9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com>","list_archive_url":null,"date":"2023-02-27T11:20:30","name":"rs6000: Inline lrint and lrintf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com/mbox/"},{"id":61926,"url":"https://patchwork.plctlab.org/api/1.2/patches/61926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea889655-6dd1-d676-46b3-4227e3eece1d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T11:57:19","name":"[OG12,committed] Update dg-dump-scan for ... (was: [Patch] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea889655-6dd1-d676-46b3-4227e3eece1d@codesourcery.com/mbox/"},{"id":61929,"url":"https://patchwork.plctlab.org/api/1.2/patches/61929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227120816.3642952-1-jcmvbkbc@gmail.com/","msgid":"<20230227120816.3642952-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-27T12:08:16","name":"gcc: xtensa: add XCHAL_HAVE_{CLAMPS, DEPBITS, EXCLUSIVE, XEA3} to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227120816.3642952-1-jcmvbkbc@gmail.com/mbox/"},{"id":61931,"url":"https://patchwork.plctlab.org/api/1.2/patches/61931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7a29b9b-ccf2-e2e2-af59-9ec7c1d56876@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:15:04","name":"[v3] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7a29b9b-ccf2-e2e2-af59-9ec7c1d56876@codesourcery.com/mbox/"},{"id":61935,"url":"https://patchwork.plctlab.org/api/1.2/patches/61935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16928-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:32:39","name":"[1/4] middle-end: Revert can_special_div_by_const changes [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16928-tamar@arm.com/mbox/"},{"id":61936,"url":"https://patchwork.plctlab.org/api/1.2/patches/61936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjDtzup8FaUIZF@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:33:18","name":"[2/4,ranger] : Add range-ops for widen addition and widen multiplication [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjDtzup8FaUIZF@arm.com/mbox/"},{"id":61937,"url":"https://patchwork.plctlab.org/api/1.2/patches/61937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjM04lLCimbeu4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:33:55","name":"[3/4] middle-end: Implement preferred_div_as_shifts_over_mult [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjM04lLCimbeu4@arm.com/mbox/"},{"id":61938,"url":"https://patchwork.plctlab.org/api/1.2/patches/61938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjTE9I4WrC4tEg@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:34:20","name":"[4/4] AArch64 Update div-bitmask to implement new optab instead of target hook [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjTE9I4WrC4tEg@arm.com/mbox/"},{"id":61963,"url":"https://patchwork.plctlab.org/api/1.2/patches/61963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227135857.90EDF385842C@sourceware.org/","msgid":"<20230227135857.90EDF385842C@sourceware.org>","list_archive_url":null,"date":"2023-02-27T13:58:10","name":"Fixup possible VR_ANTI_RANGE value_range issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227135857.90EDF385842C@sourceware.org/mbox/"},{"id":61968,"url":"https://patchwork.plctlab.org/api/1.2/patches/61968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com/","msgid":"<4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com>","list_archive_url":null,"date":"2023-02-27T14:30:48","name":"[V2] Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com/mbox/"},{"id":61970,"url":"https://patchwork.plctlab.org/api/1.2/patches/61970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227144957.1076432-1-jwakely@redhat.com/","msgid":"<20230227144957.1076432-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-27T14:49:57","name":"[committed] libstdc++: Add Doxygen comment for string::resize_and_overwite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227144957.1076432-1-jwakely@redhat.com/mbox/"},{"id":61972,"url":"https://patchwork.plctlab.org/api/1.2/patches/61972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com/","msgid":"<3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com>","list_archive_url":null,"date":"2023-02-27T15:11:37","name":"[rs6000] Tweak modulo define_insns to eliminate register copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com/mbox/"},{"id":61974,"url":"https://patchwork.plctlab.org/api/1.2/patches/61974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/zI+Vt0kL68AFHm@guest.guest/","msgid":"","list_archive_url":null,"date":"2023-02-27T15:15:05","name":"[ada] fix unknown type name '\''cpu_set_t'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/zI+Vt0kL68AFHm@guest.guest/mbox/"},{"id":62136,"url":"https://patchwork.plctlab.org/api/1.2/patches/62136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-372da1da-70c8-453d-881b-e0f4a0ec0704-1677531278062@3c-app-gmx-bap31/","msgid":"","list_archive_url":null,"date":"2023-02-27T20:54:38","name":"Fortran: fix corner case of IBITS intrinsic [PR108937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-372da1da-70c8-453d-881b-e0f4a0ec0704-1677531278062@3c-app-gmx-bap31/mbox/"},{"id":62140,"url":"https://patchwork.plctlab.org/api/1.2/patches/62140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yv=nDsbvSbsUxOnu3eBjF4hrQfcQ72YuM7Vn8Em+QLaA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T21:12:30","name":"i386: Do not constrain fmod and remainder patterns with flag_finite_math_only [PR108922]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yv=nDsbvSbsUxOnu3eBjF4hrQfcQ72YuM7Vn8Em+QLaA@mail.gmail.com/mbox/"},{"id":62223,"url":"https://patchwork.plctlab.org/api/1.2/patches/62223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228011421.CC1E220441@pchp3.se.axis.com/","msgid":"<20230228011421.CC1E220441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:14:21","name":"[COMMITTED] testsuite: Add CRIS to targets not xfailing gcc.dg/attr-alloc_size-11.c:50, 51","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228011421.CC1E220441@pchp3.se.axis.com/mbox/"},{"id":62224,"url":"https://patchwork.plctlab.org/api/1.2/patches/62224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012423.D1B7420433@pchp3.se.axis.com/","msgid":"<20230228012423.D1B7420433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:24:23","name":"[COMMITTED] testsuite: Remove xfail gcc.dg/tree-ssa/pr91091-2.c RHS ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012423.D1B7420433@pchp3.se.axis.com/mbox/"},{"id":62226,"url":"https://patchwork.plctlab.org/api/1.2/patches/62226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012714.1C78E2043D@pchp3.se.axis.com/","msgid":"<20230228012714.1C78E2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:27:14","name":"[COMMITTED] testsuite: Shorten multiline pattern message to the same for fail and pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012714.1C78E2043D@pchp3.se.axis.com/mbox/"},{"id":62227,"url":"https://patchwork.plctlab.org/api/1.2/patches/62227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228013137.4A8D02042E@pchp3.se.axis.com/","msgid":"<20230228013137.4A8D02042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:31:37","name":"[COMMITTED] testsuite: No xfail infoleak-vfio_iommu_type1.c bogus for default_packed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228013137.4A8D02042E@pchp3.se.axis.com/mbox/"},{"id":62231,"url":"https://patchwork.plctlab.org/api/1.2/patches/62231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com/","msgid":"<1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com>","list_archive_url":null,"date":"2023-02-28T02:31:31","name":"[PATCHv2,rs6000] Merge two vector shift when their sources are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com/mbox/"},{"id":62259,"url":"https://patchwork.plctlab.org/api/1.2/patches/62259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228043250.212566-1-zhujunxian@oss.cipunited.com/","msgid":"<20230228043250.212566-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T04:33:13","name":"MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228043250.212566-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":62260,"url":"https://patchwork.plctlab.org/api/1.2/patches/62260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e02e0971-79db-45f2-af77-8a53fb4c4efa.sinan.lin@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-02-28T04:36:15","name":"RISC-V: Allow const0_rtx operand in max/min","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e02e0971-79db-45f2-af77-8a53fb4c4efa.sinan.lin@linux.alibaba.com/mbox/"},{"id":62266,"url":"https://patchwork.plctlab.org/api/1.2/patches/62266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228050036.30601-1-mynameisxiaou@gmail.com/","msgid":"<20230228050036.30601-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-02-28T05:00:36","name":"RISC-V: Fix wrong partial subreg check for bsetidisi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228050036.30601-1-mynameisxiaou@gmail.com/mbox/"},{"id":62321,"url":"https://patchwork.plctlab.org/api/1.2/patches/62321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/21AVDEBex5vqmc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T08:02:09","name":"lto: Fix up lto_fixup_prevailing_type [PR108910]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/21AVDEBex5vqmc@tucnak/mbox/"},{"id":62332,"url":"https://patchwork.plctlab.org/api/1.2/patches/62332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/26yg4fJ89wguAN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T08:26:50","name":"ubsan: Honor -fstrict-flex-arrays= in -fsanitize=bounds [PR108894]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/26yg4fJ89wguAN@tucnak/mbox/"},{"id":62355,"url":"https://patchwork.plctlab.org/api/1.2/patches/62355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228092332.222487-1-zhujunxian@oss.cipunited.com/","msgid":"<20230228092332.222487-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T09:24:34","name":"[v2] MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228092332.222487-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":62387,"url":"https://patchwork.plctlab.org/api/1.2/patches/62387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095042.1192997-1-jwakely@redhat.com/","msgid":"<20230228095042.1192997-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:42","name":"[committed] libstdc++: Add likely/unlikely attributes to implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095042.1192997-1-jwakely@redhat.com/mbox/"},{"id":62388,"url":"https://patchwork.plctlab.org/api/1.2/patches/62388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095048.1193075-1-jwakely@redhat.com/","msgid":"<20230228095048.1193075-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:48","name":"[committed] libstdc++: Do not use memmove for 1-element ranges [PR108846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095048.1193075-1-jwakely@redhat.com/mbox/"},{"id":62386,"url":"https://patchwork.plctlab.org/api/1.2/patches/62386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095053.1193118-1-jwakely@redhat.com/","msgid":"<20230228095053.1193118-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:53","name":"[committed] libstdc++: Fix uses_allocator_construction_args for pair [PR108952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095053.1193118-1-jwakely@redhat.com/mbox/"},{"id":62390,"url":"https://patchwork.plctlab.org/api/1.2/patches/62390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/3RuhY7f0bkoZA+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T10:04:42","name":"c++: Emit fundamental tinfos for all _Float*/decltype(0.0bf16) types unconditionally [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/3RuhY7f0bkoZA+@tucnak/mbox/"},{"id":62393,"url":"https://patchwork.plctlab.org/api/1.2/patches/62393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228101941.170726-1-xin.liu@oss.cipunited.com/","msgid":"<20230228101941.170726-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T10:24:21","name":"MIPS: Bugfix for fix Dejagnu issues with RTL checking enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228101941.170726-1-xin.liu@oss.cipunited.com/mbox/"},{"id":62478,"url":"https://patchwork.plctlab.org/api/1.2/patches/62478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com/","msgid":"<437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com>","list_archive_url":null,"date":"2023-02-28T13:06:43","name":"OpenMP: Ignore side-effects when finding struct comps [PR108545]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com/mbox/"},{"id":62492,"url":"https://patchwork.plctlab.org/api/1.2/patches/62492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134718.2C43413440@imap2.suse-dmz.suse.de/","msgid":"<20230228134718.2C43413440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:17","name":"[1/5] fix anti-range dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134718.2C43413440@imap2.suse-dmz.suse.de/mbox/"},{"id":62493,"url":"https://patchwork.plctlab.org/api/1.2/patches/62493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134725.02E8813440@imap2.suse-dmz.suse.de/","msgid":"<20230228134725.02E8813440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:24","name":"[2/5] fend off anti-ranges from value-range-storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134725.02E8813440@imap2.suse-dmz.suse.de/mbox/"},{"id":62496,"url":"https://patchwork.plctlab.org/api/1.2/patches/62496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134733.417D113440@imap2.suse-dmz.suse.de/","msgid":"<20230228134733.417D113440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:32","name":"[3/5] Avoid upper/lower_bound (1) on VR_ANTI_RANGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134733.417D113440@imap2.suse-dmz.suse.de/mbox/"},{"id":62497,"url":"https://patchwork.plctlab.org/api/1.2/patches/62497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134739.E030413440@imap2.suse-dmz.suse.de/","msgid":"<20230228134739.E030413440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:39","name":"[4/5] Sanitize irange::num_pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134739.E030413440@imap2.suse-dmz.suse.de/mbox/"},{"id":62495,"url":"https://patchwork.plctlab.org/api/1.2/patches/62495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134748.07F8D13440@imap2.suse-dmz.suse.de/","msgid":"<20230228134748.07F8D13440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:47","name":"[5/5] Sanitize legacy_{lower,upper}_bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134748.07F8D13440@imap2.suse-dmz.suse.de/mbox/"},{"id":62500,"url":"https://patchwork.plctlab.org/api/1.2/patches/62500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-1-jcmvbkbc@gmail.com/","msgid":"<20230228135136.3727643-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-28T13:51:35","name":"[1/2] gcc: xtensa: add data alignment properties to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-1-jcmvbkbc@gmail.com/mbox/"},{"id":62499,"url":"https://patchwork.plctlab.org/api/1.2/patches/62499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-2-jcmvbkbc@gmail.com/","msgid":"<20230228135136.3727643-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-28T13:51:36","name":"[2/2] gcc: xtensa: adjust STRICT_ALIGNMENT per hardware capabilities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-2-jcmvbkbc@gmail.com/mbox/"},{"id":62545,"url":"https://patchwork.plctlab.org/api/1.2/patches/62545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com/","msgid":"<452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com>","list_archive_url":null,"date":"2023-02-28T16:18:25","name":"OpenMP/Fortran: Fix handling of optional is_device_ptr + bind(C) [PR108546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com/mbox/"},{"id":62578,"url":"https://patchwork.plctlab.org/api/1.2/patches/62578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184735.24E6E20438@pchp3.se.axis.com/","msgid":"<20230228184735.24E6E20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T18:47:35","name":"[1/2] testsuite: Fix analyzer errors for newlib-errno","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184735.24E6E20438@pchp3.se.axis.com/mbox/"},{"id":62579,"url":"https://patchwork.plctlab.org/api/1.2/patches/62579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184958.4992D20438@pchp3.se.axis.com/","msgid":"<20230228184958.4992D20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T18:49:58","name":"[2/2] testsuite: Fix analyzer errors for newlib-fd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184958.4992D20438@pchp3.se.axis.com/mbox/"},{"id":62609,"url":"https://patchwork.plctlab.org/api/1.2/patches/62609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228211414.1374620-1-jwakely@redhat.com/","msgid":"<20230228211414.1374620-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T21:14:14","name":"[wwwdocs] Document synchronized_value addition to libstdc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228211414.1374620-1-jwakely@redhat.com/mbox/"},{"id":62675,"url":"https://patchwork.plctlab.org/api/1.2/patches/62675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f85990b0-1a7a-bc17-50c1-ef176cbd0dae@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-28T23:01:20","name":"amdgcn: Enable SIMD vectorization of math functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f85990b0-1a7a-bc17-50c1-ef176cbd0dae@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-02/mbox/"},{"id":18,"url":"https://patchwork.plctlab.org/api/1.2/bundles/18/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-03/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-03","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":62702,"url":"https://patchwork.plctlab.org/api/1.2/patches/62702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301014611.26707-1-wangfeng@eswincomputing.com/","msgid":"<20230301014611.26707-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-01T01:46:11","name":"RISC-V: Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301014611.26707-1-wangfeng@eswincomputing.com/mbox/"},{"id":62762,"url":"https://patchwork.plctlab.org/api/1.2/patches/62762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d17b718e-24a7-cffb-cbec-e76857db2753@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T05:54:22","name":"rs6000/test: Adjust two bfp test cases with has_arch_ppc64 [PR108729]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d17b718e-24a7-cffb-cbec-e76857db2753@linux.ibm.com/mbox/"},{"id":62763,"url":"https://patchwork.plctlab.org/api/1.2/patches/62763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com/","msgid":"<3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:55:08","name":"rs6000/test: Adjust scalar-test-neg-8.c with lp64 [PR108730]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com/mbox/"},{"id":62764,"url":"https://patchwork.plctlab.org/api/1.2/patches/62764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6303ed9-5ba8-ac10-719c-9eb2a414d5f4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T05:55:53","name":"rs6000/test: Adjust fold-vec-extract-double.p9.c for BE [PR108810]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6303ed9-5ba8-ac10-719c-9eb2a414d5f4@linux.ibm.com/mbox/"},{"id":62765,"url":"https://patchwork.plctlab.org/api/1.2/patches/62765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com/","msgid":"<9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:56:20","name":"rs6000/test: Adjust pr101384-2.c for P9 [PR108813]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com/mbox/"},{"id":62766,"url":"https://patchwork.plctlab.org/api/1.2/patches/62766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com/","msgid":"<4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:56:48","name":"rs6000/test: Adjust scalar-test-data-class-1[45].c with int128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com/mbox/"},{"id":62773,"url":"https://patchwork.plctlab.org/api/1.2/patches/62773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4d05663-57a2-40be-3fba-270239b52ee0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T07:09:56","name":"[gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4d05663-57a2-40be-3fba-270239b52ee0@linux.ibm.com/mbox/"},{"id":62777,"url":"https://patchwork.plctlab.org/api/1.2/patches/62777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301073810.627043858C30@sourceware.org/","msgid":"<20230301073810.627043858C30@sourceware.org>","list_archive_url":null,"date":"2023-03-01T07:37:18","name":"tree-optimization/108950 - widen-sum reduction ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301073810.627043858C30@sourceware.org/mbox/"},{"id":62794,"url":"https://patchwork.plctlab.org/api/1.2/patches/62794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301091029.A10C13858430@sourceware.org/","msgid":"<20230301091029.A10C13858430@sourceware.org>","list_archive_url":null,"date":"2023-03-01T09:09:34","name":"tree-optimization/108970 - ICE with vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301091029.A10C13858430@sourceware.org/mbox/"},{"id":62797,"url":"https://patchwork.plctlab.org/api/1.2/patches/62797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8Wyr196+cnqxrX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:11:38","name":"cfgexpand: Handle WIDEN_{PLUS,MINUS}_EXPR and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR in expand_debug_expr [PR108967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8Wyr196+cnqxrX@tucnak/mbox/"},{"id":62808,"url":"https://patchwork.plctlab.org/api/1.2/patches/62808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8YtP5QiQzQ9spF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:19:48","name":"c++, v2: Emit fundamental tinfos for all _Float*/decltype(0.0bf16) types unconditionally [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8YtP5QiQzQ9spF@tucnak/mbox/"},{"id":62834,"url":"https://patchwork.plctlab.org/api/1.2/patches/62834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8htiwLe6udGBN5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:58:14","name":"[committed] ubsan: Add another testcase for [0] array in the middle of struct [PR108894]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8htiwLe6udGBN5@tucnak/mbox/"},{"id":62854,"url":"https://patchwork.plctlab.org/api/1.2/patches/62854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301113512.1544598-1-raj.khem@gmail.com/","msgid":"<20230301113512.1544598-1-raj.khem@gmail.com>","list_archive_url":null,"date":"2023-03-01T11:35:12","name":"Cpp: honor sysroot location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301113512.1544598-1-raj.khem@gmail.com/mbox/"},{"id":62882,"url":"https://patchwork.plctlab.org/api/1.2/patches/62882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9664e8-65e9-00ef-25c4-4766fd70e12e@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-03-01T12:51:02","name":"update copyright year in libstdcc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9664e8-65e9-00ef-25c4-4766fd70e12e@jguk.org/mbox/"},{"id":62883,"url":"https://patchwork.plctlab.org/api/1.2/patches/62883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org/","msgid":"<73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org>","list_archive_url":null,"date":"2023-03-01T12:53:18","name":"Bugzilla Bug 81649 [PATCH]: Clarify LeakSanitizer in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org/mbox/"},{"id":62884,"url":"https://patchwork.plctlab.org/api/1.2/patches/62884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org/","msgid":"<85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org>","list_archive_url":null,"date":"2023-03-01T12:54:10","name":"[PATCHJ] : Bugzilla 88860 - Clarify online manual infelicities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org/mbox/"},{"id":62896,"url":"https://patchwork.plctlab.org/api/1.2/patches/62896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301130749.9A7B03858401@sourceware.org/","msgid":"<20230301130749.9A7B03858401@sourceware.org>","list_archive_url":null,"date":"2023-03-01T13:07:02","name":"debug/108772 - ICE with late debug generated with -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301130749.9A7B03858401@sourceware.org/mbox/"},{"id":62908,"url":"https://patchwork.plctlab.org/api/1.2/patches/62908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301141033.2578200-1-dmalcolm@redhat.com/","msgid":"<20230301141033.2578200-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-01T14:10:33","name":"[pushed] analyzer: fix infinite recursion false +ves [PR108935]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301141033.2578200-1-dmalcolm@redhat.com/mbox/"},{"id":62980,"url":"https://patchwork.plctlab.org/api/1.2/patches/62980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com/","msgid":"<1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com>","list_archive_url":null,"date":"2023-03-01T16:56:51","name":"amdgcn: Add instruction patterns for conditional min/max operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com/mbox/"},{"id":63017,"url":"https://patchwork.plctlab.org/api/1.2/patches/63017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-2-xry111@xry111.site/","msgid":"<20230301180720.26514-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:13","name":"[1/8] aarch64: testsuite: disable PIE for aapcs64 tests [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-2-xry111@xry111.site/mbox/"},{"id":63022,"url":"https://patchwork.plctlab.org/api/1.2/patches/63022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-3-xry111@xry111.site/","msgid":"<20230301180720.26514-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:14","name":"[2/8] aarch64: testsuite: disable PIE for tests with large code model [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-3-xry111@xry111.site/mbox/"},{"id":63020,"url":"https://patchwork.plctlab.org/api/1.2/patches/63020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-4-xry111@xry111.site/","msgid":"<20230301180720.26514-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:15","name":"[3/8] aarch64: testsuite: disable PIE for fuse_adrp_add_1.c [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-4-xry111@xry111.site/mbox/"},{"id":63018,"url":"https://patchwork.plctlab.org/api/1.2/patches/63018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-5-xry111@xry111.site/","msgid":"<20230301180720.26514-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:16","name":"[4/8] aarch64: testsuite: disable stack protector for sve-pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-5-xry111@xry111.site/mbox/"},{"id":63023,"url":"https://patchwork.plctlab.org/api/1.2/patches/63023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-6-xry111@xry111.site/","msgid":"<20230301180720.26514-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:17","name":"[5/8] aarch64: testsuite: disable stack protector for pr103147-10 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-6-xry111@xry111.site/mbox/"},{"id":63019,"url":"https://patchwork.plctlab.org/api/1.2/patches/63019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-7-xry111@xry111.site/","msgid":"<20230301180720.26514-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:18","name":"[6/8] aarch64: testsuite: disable stack protector for auto-init-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-7-xry111@xry111.site/mbox/"},{"id":63021,"url":"https://patchwork.plctlab.org/api/1.2/patches/63021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-8-xry111@xry111.site/","msgid":"<20230301180720.26514-8-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:19","name":"[7/8] aarch64: testsuite: disable stack protector for pr104005.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-8-xry111@xry111.site/mbox/"},{"id":63025,"url":"https://patchwork.plctlab.org/api/1.2/patches/63025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-9-xry111@xry111.site/","msgid":"<20230301180720.26514-9-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:20","name":"[8/8] aarch64: testsuite: disable stack protector for tests relying on stack offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-9-xry111@xry111.site/mbox/"},{"id":63024,"url":"https://patchwork.plctlab.org/api/1.2/patches/63024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn4Gk3_pB8K1SsXNzCyWMVGGs4jOtO1_L=L+qBpkDtqHg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T18:07:43","name":"libiberty: fix memory leak in pex-win32.c and refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn4Gk3_pB8K1SsXNzCyWMVGGs4jOtO1_L=L+qBpkDtqHg@mail.gmail.com/mbox/"},{"id":63049,"url":"https://patchwork.plctlab.org/api/1.2/patches/63049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301195315.1793087-1-vineetg@rivosinc.com/","msgid":"<20230301195315.1793087-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-03-01T19:53:15","name":"RISC-V: costs: miscomputed shiftadd_cost triggering synth_mult [PR/108987]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301195315.1793087-1-vineetg@rivosinc.com/mbox/"},{"id":63085,"url":"https://patchwork.plctlab.org/api/1.2/patches/63085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301203308.405645-1-polacek@redhat.com/","msgid":"<20230301203308.405645-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-01T20:33:08","name":"c++: ICE with -Wmismatched-tags and member template [PR106259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301203308.405645-1-polacek@redhat.com/mbox/"},{"id":63097,"url":"https://patchwork.plctlab.org/api/1.2/patches/63097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212637.1481240-1-jwakely@redhat.com/","msgid":"<20230301212637.1481240-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-01T21:26:37","name":"[committed] libstdc++: Make std::chrono::current_zone() default to UTC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212637.1481240-1-jwakely@redhat.com/mbox/"},{"id":63098,"url":"https://patchwork.plctlab.org/api/1.2/patches/63098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212645.1481272-1-jwakely@redhat.com/","msgid":"<20230301212645.1481272-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-01T21:26:45","name":"[committed] libstdc++: Fix typo in comment in bits/cow_string.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212645.1481272-1-jwakely@redhat.com/mbox/"},{"id":63099,"url":"https://patchwork.plctlab.org/api/1.2/patches/63099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222856.12300c64@nbbrfq/","msgid":"<20230301222856.12300c64@nbbrfq>","list_archive_url":null,"date":"2023-03-01T21:28:56","name":"[stage1] Remove conditionals around free()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222856.12300c64@nbbrfq/mbox/"},{"id":63107,"url":"https://patchwork.plctlab.org/api/1.2/patches/63107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222847.2606616-1-dmalcolm@redhat.com/","msgid":"<20230301222847.2606616-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-01T22:28:47","name":"[pushed] analyzer: fixes to side-effects for built-in functions [PR107565]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222847.2606616-1-dmalcolm@redhat.com/mbox/"},{"id":63113,"url":"https://patchwork.plctlab.org/api/1.2/patches/63113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301232500.2622240-1-apinski@marvell.com/","msgid":"<20230301232500.2622240-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-01T23:25:00","name":"Fix PR 108980: note without warning due to array bounds check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301232500.2622240-1-apinski@marvell.com/mbox/"},{"id":63153,"url":"https://patchwork.plctlab.org/api/1.2/patches/63153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012003.6A0D52040C@pchp3.se.axis.com/","msgid":"<20230302012003.6A0D52040C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-02T01:20:03","name":"[COMMITTED] testsuite: Fix gcc.dg/attr-copy-6.c for user-label-prefixed targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012003.6A0D52040C@pchp3.se.axis.com/mbox/"},{"id":63154,"url":"https://patchwork.plctlab.org/api/1.2/patches/63154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012552.279FF20433@pchp3.se.axis.com/","msgid":"<20230302012552.279FF20433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-02T01:25:52","name":"[COMMITTED] testsuite: Fix g++.dg/ext/attr-copy-2.C for default_packed targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012552.279FF20433@pchp3.se.axis.com/mbox/"},{"id":63175,"url":"https://patchwork.plctlab.org/api/1.2/patches/63175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-1-xionghuluo@tencent.com/","msgid":"<20230302022921.4055291-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-02T02:29:20","name":"[1/2] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-1-xionghuluo@tencent.com/mbox/"},{"id":63174,"url":"https://patchwork.plctlab.org/api/1.2/patches/63174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-2-xionghuluo@tencent.com/","msgid":"<20230302022921.4055291-2-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-02T02:29:21","name":"[2/2] gcov: Fix incorrect gimple line LOCATION [PR97923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-2-xionghuluo@tencent.com/mbox/"},{"id":63235,"url":"https://patchwork.plctlab.org/api/1.2/patches/63235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302055538.730932-1-pan2.li@intel.com/","msgid":"<20230302055538.730932-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-02T05:55:38","name":"[v2] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302055538.730932-1-pan2.li@intel.com/mbox/"},{"id":63261,"url":"https://patchwork.plctlab.org/api/1.2/patches/63261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302074134.721DE33E59@hamza.pair.com/","msgid":"<20230302074134.721DE33E59@hamza.pair.com>","list_archive_url":null,"date":"2023-03-02T07:41:31","name":"[pushed] wwwdocs: testing: Avoid a duplicate link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302074134.721DE33E59@hamza.pair.com/mbox/"},{"id":63264,"url":"https://patchwork.plctlab.org/api/1.2/patches/63264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080152.96006-1-juzhe.zhong@rivai.ai/","msgid":"<20230302080152.96006-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-02T08:01:52","name":"RISC-V: Add RVV misc intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080152.96006-1-juzhe.zhong@rivai.ai/mbox/"},{"id":63265,"url":"https://patchwork.plctlab.org/api/1.2/patches/63265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080535.4F7203858000@sourceware.org/","msgid":"<20230302080535.4F7203858000@sourceware.org>","list_archive_url":null,"date":"2023-03-02T08:04:49","name":"testsuite/108985 - missing vect_simd_clones target requirement on test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080535.4F7203858000@sourceware.org/mbox/"},{"id":63266,"url":"https://patchwork.plctlab.org/api/1.2/patches/63266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABZgZ7jX0HX/up2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T08:08:33","name":"[committed] openmp: Fix up error recovery for invalid structured bindings in OpenMP range for loops [PR105839]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABZgZ7jX0HX/up2@tucnak/mbox/"},{"id":63270,"url":"https://patchwork.plctlab.org/api/1.2/patches/63270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABdUSaG8Dw/avH7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T08:24:49","name":"fold-const: Ignore padding bits in native_interpret_expr REAL_CST reverse verification [PR108934]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABdUSaG8Dw/avH7@tucnak/mbox/"},{"id":63271,"url":"https://patchwork.plctlab.org/api/1.2/patches/63271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-2-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:26","name":"[v4,1/9] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-2-christoph.muellner@vrull.eu/mbox/"},{"id":63272,"url":"https://patchwork.plctlab.org/api/1.2/patches/63272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-3-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:27","name":"[v4,2/9] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-3-christoph.muellner@vrull.eu/mbox/"},{"id":63274,"url":"https://patchwork.plctlab.org/api/1.2/patches/63274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-4-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:28","name":"[v4,3/9] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-4-christoph.muellner@vrull.eu/mbox/"},{"id":63273,"url":"https://patchwork.plctlab.org/api/1.2/patches/63273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-5-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:29","name":"[v4,4/9] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-5-christoph.muellner@vrull.eu/mbox/"},{"id":63275,"url":"https://patchwork.plctlab.org/api/1.2/patches/63275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-6-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:30","name":"[v4,5/9] riscv: thead: Add support for the XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-6-christoph.muellner@vrull.eu/mbox/"},{"id":63276,"url":"https://patchwork.plctlab.org/api/1.2/patches/63276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-7-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:31","name":"[v4,6/9] riscv: thead: Add support for the XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-7-christoph.muellner@vrull.eu/mbox/"},{"id":63278,"url":"https://patchwork.plctlab.org/api/1.2/patches/63278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-8-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:32","name":"[v4,7/9] riscv: thead: Add support for the XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-8-christoph.muellner@vrull.eu/mbox/"},{"id":63277,"url":"https://patchwork.plctlab.org/api/1.2/patches/63277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-9-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:33","name":"[v4,8/9] riscv: thead: Add support for the XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-9-christoph.muellner@vrull.eu/mbox/"},{"id":63279,"url":"https://patchwork.plctlab.org/api/1.2/patches/63279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-10-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:34","name":"[v4,9/9] riscv: thead: Add support for the XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-10-christoph.muellner@vrull.eu/mbox/"},{"id":63329,"url":"https://patchwork.plctlab.org/api/1.2/patches/63329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzzzlalx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:18:50","name":"vect: Fix voluntarily-masked negative conditionals [PR108430]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzzzlalx.fsf@arm.com/mbox/"},{"id":63330,"url":"https://patchwork.plctlab.org/api/1.2/patches/63330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedq7lai9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:21:02","name":"Avoid creating (const (reg ...)) [PR108603]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedq7lai9.fsf@arm.com/mbox/"},{"id":63331,"url":"https://patchwork.plctlab.org/api/1.2/patches/63331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAB7TAwFGPoJJqHT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:32:44","name":"[wwwdocs] gcc-13/porting_to.html: Document C++ -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAB7TAwFGPoJJqHT@tucnak/mbox/"},{"id":63359,"url":"https://patchwork.plctlab.org/api/1.2/patches/63359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACGi5t6N65DipZA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T11:20:43","name":"c++, v3: Emit fundamental tinfos for _Float16/decltype(0.0bf16) types on ia32 with -mno-sse2 [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACGi5t6N65DipZA@tucnak/mbox/"},{"id":63374,"url":"https://patchwork.plctlab.org/api/1.2/patches/63374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACMogsrU0vpmQ1S@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T11:46:42","name":"wwwdocs: Document several further C++23 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACMogsrU0vpmQ1S@tucnak/mbox/"},{"id":63421,"url":"https://patchwork.plctlab.org/api/1.2/patches/63421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302132917.2668B3858425@sourceware.org/","msgid":"<20230302132917.2668B3858425@sourceware.org>","list_archive_url":null,"date":"2023-03-02T13:28:27","name":"target/108738 - limit STV chain discovery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302132917.2668B3858425@sourceware.org/mbox/"},{"id":63427,"url":"https://patchwork.plctlab.org/api/1.2/patches/63427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt4vi5xm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T14:28:05","name":"vect: Don'\''t apply masks to operations on invariants [PR108979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt4vi5xm.fsf@arm.com/mbox/"},{"id":63464,"url":"https://patchwork.plctlab.org/api/1.2/patches/63464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302152450.1486452-1-stefansf@linux.ibm.com/","msgid":"<20230302152450.1486452-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T15:24:51","name":"s390: libatomic: Fix 16 byte atomic {cas,load,store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302152450.1486452-1-stefansf@linux.ibm.com/mbox/"},{"id":63471,"url":"https://patchwork.plctlab.org/api/1.2/patches/63471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302160122.47573-1-xry111@xry111.site/","msgid":"<20230302160122.47573-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-02T16:01:22","name":"LoongArch: Stop -mfpu from silently breaking ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302160122.47573-1-xry111@xry111.site/mbox/"},{"id":63509,"url":"https://patchwork.plctlab.org/api/1.2/patches/63509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com/","msgid":"<3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T18:13:52","name":"s390: Fix ifcvt test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com/mbox/"},{"id":63511,"url":"https://patchwork.plctlab.org/api/1.2/patches/63511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com/","msgid":"<48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T18:17:07","name":"s390: Use arch14 instead of z16 for -march=native.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com/mbox/"},{"id":63513,"url":"https://patchwork.plctlab.org/api/1.2/patches/63513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8a19eff-30e9-434d-8780-d21ff877864e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T18:23:32","name":"testsuite: Do not expect partial vectorization for s390.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8a19eff-30e9-434d-8780-d21ff877864e@linux.ibm.com/mbox/"},{"id":63522,"url":"https://patchwork.plctlab.org/api/1.2/patches/63522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302191048.2657370-1-dmalcolm@redhat.com/","msgid":"<20230302191048.2657370-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-02T19:10:48","name":"[pushed] analyzer: fix uninit false +ves reading from DECL_HARD_REGISTER [PR108968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302191048.2657370-1-dmalcolm@redhat.com/mbox/"},{"id":63524,"url":"https://patchwork.plctlab.org/api/1.2/patches/63524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnvvm=9dvGFYebmKw_jo+S7NfmWERb0ZWNOsYiCaX+ynA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T19:25:08","name":"driver: Treat include path args the same way between cpp_unique_options and asm_options. [PR71850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnvvm=9dvGFYebmKw_jo+S7NfmWERb0ZWNOsYiCaX+ynA@mail.gmail.com/mbox/"},{"id":63583,"url":"https://patchwork.plctlab.org/api/1.2/patches/63583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302205614.1564709-1-jwakely@redhat.com/","msgid":"<20230302205614.1564709-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-02T20:56:14","name":"[wwwdocs] Document allocator_traits::rebind_alloc assertion with GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302205614.1564709-1-jwakely@redhat.com/mbox/"},{"id":63600,"url":"https://patchwork.plctlab.org/api/1.2/patches/63600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b92172eb-3e6e-401c-82e2-f5e1b3cee6b2-1677794628453@3c-app-gmx-bs40/","msgid":"","list_archive_url":null,"date":"2023-03-02T22:03:48","name":"Fortran: fix CLASS attribute handling [PR106856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b92172eb-3e6e-401c-82e2-f5e1b3cee6b2-1677794628453@3c-app-gmx-bs40/mbox/"},{"id":63613,"url":"https://patchwork.plctlab.org/api/1.2/patches/63613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eabba3ca-4199-a893-0b16-99e2680bf553@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T22:22:57","name":"[pushed,PR90706] IRA: Use minimal cost for hard register movement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eabba3ca-4199-a893-0b16-99e2680bf553@redhat.com/mbox/"},{"id":63650,"url":"https://patchwork.plctlab.org/api/1.2/patches/63650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302230703.2234902-1-lhyatt@gmail.com/","msgid":"<20230302230703.2234902-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-03-02T23:07:03","name":"[v2] libcpp: Handle extended characters in user-defined literal suffix [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302230703.2234902-1-lhyatt@gmail.com/mbox/"},{"id":63669,"url":"https://patchwork.plctlab.org/api/1.2/patches/63669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAE2uhyk3ens4RXy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T23:52:26","name":"[committed] testsuite: Fix up memchr-3.c test [PR108991]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAE2uhyk3ens4RXy@tucnak/mbox/"},{"id":63683,"url":"https://patchwork.plctlab.org/api/1.2/patches/63683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001351.4145614-1-ibuclaw@gdcproject.org/","msgid":"<20230303001351.4145614-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:13:51","name":"[committed] d: Add test for PR d/108167 to the testsuite [PR108167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001351.4145614-1-ibuclaw@gdcproject.org/mbox/"},{"id":63685,"url":"https://patchwork.plctlab.org/api/1.2/patches/63685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001742.4148863-1-ibuclaw@gdcproject.org/","msgid":"<20230303001742.4148863-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:17:42","name":"[committed] d: Allow vectors to be compared for identity (PR108946)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001742.4148863-1-ibuclaw@gdcproject.org/mbox/"},{"id":63687,"url":"https://patchwork.plctlab.org/api/1.2/patches/63687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002202.4152119-1-ibuclaw@gdcproject.org/","msgid":"<20230303002202.4152119-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:22:02","name":"[committed] d: Fix ICE on explicit immutable struct import [PR10887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002202.4152119-1-ibuclaw@gdcproject.org/mbox/"},{"id":63688,"url":"https://patchwork.plctlab.org/api/1.2/patches/63688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002411.4153820-1-ibuclaw@gdcproject.org/","msgid":"<20230303002411.4153820-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:24:11","name":"[committed] d: vector float comparison doesn'\''t result in 0 or -1 [PR108945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002411.4153820-1-ibuclaw@gdcproject.org/mbox/"},{"id":63725,"url":"https://patchwork.plctlab.org/api/1.2/patches/63725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303023141.125126-1-pan2.li@intel.com/","msgid":"<20230303023141.125126-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-03T02:31:41","name":"[v3] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303023141.125126-1-pan2.li@intel.com/mbox/"},{"id":63752,"url":"https://patchwork.plctlab.org/api/1.2/patches/63752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0790eac-0656-ed9c-5426-9e83d786ff30@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:52:42","name":"[01/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0790eac-0656-ed9c-5426-9e83d786ff30@rivosinc.com/mbox/"},{"id":63753,"url":"https://patchwork.plctlab.org/api/1.2/patches/63753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6305e96-ff71-cde6-9b91-4333489a47ed@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:52:55","name":"[02/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6305e96-ff71-cde6-9b91-4333489a47ed@rivosinc.com/mbox/"},{"id":63754,"url":"https://patchwork.plctlab.org/api/1.2/patches/63754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e79c40af-4269-f950-131e-926f813b9f76@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:03","name":"[03/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e79c40af-4269-f950-131e-926f813b9f76@rivosinc.com/mbox/"},{"id":63755,"url":"https://patchwork.plctlab.org/api/1.2/patches/63755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/abc3ee25-4d56-47ec-63de-3fcc7ce0591a@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:14","name":"[04/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/abc3ee25-4d56-47ec-63de-3fcc7ce0591a@rivosinc.com/mbox/"},{"id":63756,"url":"https://patchwork.plctlab.org/api/1.2/patches/63756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2107aec-938f-0581-244c-4c08ee08190e@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:25","name":"[05/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2107aec-938f-0581-244c-4c08ee08190e@rivosinc.com/mbox/"},{"id":63757,"url":"https://patchwork.plctlab.org/api/1.2/patches/63757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com/","msgid":"<927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com>","list_archive_url":null,"date":"2023-03-03T04:53:35","name":"[06/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com/mbox/"},{"id":63759,"url":"https://patchwork.plctlab.org/api/1.2/patches/63759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eefb0311-e12b-307f-fe70-c3e4641bb402@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:42","name":"[07/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eefb0311-e12b-307f-fe70-c3e4641bb402@rivosinc.com/mbox/"},{"id":63782,"url":"https://patchwork.plctlab.org/api/1.2/patches/63782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303081658.6383-1-xry111@xry111.site/","msgid":"<20230303081658.6383-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:16:58","name":"[v2] LoongArch: Stop -mfpu from silently breaking ABI [PR109000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303081658.6383-1-xry111@xry111.site/mbox/"},{"id":63798,"url":"https://patchwork.plctlab.org/api/1.2/patches/63798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-2-xry111@xry111.site/","msgid":"<20230303084011.8989-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:40:10","name":"[1/2] LoongArch: testsuite: Disable stack protector for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-2-xry111@xry111.site/mbox/"},{"id":63799,"url":"https://patchwork.plctlab.org/api/1.2/patches/63799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-3-xry111@xry111.site/","msgid":"<20230303084011.8989-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:40:11","name":"[2/2] LoongArch: testsuite: Adjust stack offsets in stack-check-cfa tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-3-xry111@xry111.site/mbox/"},{"id":63800,"url":"https://patchwork.plctlab.org/api/1.2/patches/63800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303085456.13037-1-xry111@xry111.site/","msgid":"<20230303085456.13037-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:54:56","name":"driver: toplev: Fix a typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303085456.13037-1-xry111@xry111.site/mbox/"},{"id":63813,"url":"https://patchwork.plctlab.org/api/1.2/patches/63813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a59a7554-9f0a-e0ff-5666-629c66174e9a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:12:30","name":"[PATCHv2,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a59a7554-9f0a-e0ff-5666-629c66174e9a@linux.ibm.com/mbox/"},{"id":63839,"url":"https://patchwork.plctlab.org/api/1.2/patches/63839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAG/euZxYFFWr5N9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:35:54","name":"diagnostics: Fix up selftests with $COLUMNS < 42 [PR108973]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAG/euZxYFFWr5N9@tucnak/mbox/"},{"id":63850,"url":"https://patchwork.plctlab.org/api/1.2/patches/63850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHB4wr3Nnj/4np8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:46:11","name":"gimple-fold: Fix up fputs -> fwrite folding [PR108988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHB4wr3Nnj/4np8@tucnak/mbox/"},{"id":63855,"url":"https://patchwork.plctlab.org/api/1.2/patches/63855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHHTu2bupT3tcQr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T10:09:18","name":"waccess: Fix two -Wnonnull warning issues [PR108986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHHTu2bupT3tcQr@tucnak/mbox/"},{"id":63865,"url":"https://patchwork.plctlab.org/api/1.2/patches/63865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303110643.1128D139D3@imap2.suse-dmz.suse.de/","msgid":"<20230303110643.1128D139D3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-03T11:06:42","name":"tree-optimization/109002 - partial PRE miscompilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303110643.1128D139D3@imap2.suse-dmz.suse.de/mbox/"},{"id":63933,"url":"https://patchwork.plctlab.org/api/1.2/patches/63933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0u6szx7.fsf@moxielogic.com/","msgid":"<87r0u6szx7.fsf@moxielogic.com>","list_archive_url":null,"date":"2023-03-03T13:54:44","name":"moxie: use define_memory_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0u6szx7.fsf@moxielogic.com/mbox/"},{"id":63934,"url":"https://patchwork.plctlab.org/api/1.2/patches/63934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt4uszlk.fsf@laptop.mail-host-address-is-not-set/","msgid":"<87mt4uszlk.fsf@laptop.mail-host-address-is-not-set>","list_archive_url":null,"date":"2023-03-03T14:01:43","name":"moxie: enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt4uszlk.fsf@laptop.mail-host-address-is-not-set/mbox/"},{"id":63968,"url":"https://patchwork.plctlab.org/api/1.2/patches/63968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303145821.1081489-1-ppalka@redhat.com/","msgid":"<20230303145821.1081489-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-03T14:58:21","name":"c++: thinko in extract_local_specs [PR108998]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303145821.1081489-1-ppalka@redhat.com/mbox/"},{"id":63970,"url":"https://patchwork.plctlab.org/api/1.2/patches/63970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIPvaT1ipBv5JI4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T15:18:21","name":"c++, v2: Don'\''t defer local statics initialized with constant expressions [PR108702]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIPvaT1ipBv5JI4@tucnak/mbox/"},{"id":63987,"url":"https://patchwork.plctlab.org/api/1.2/patches/63987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303164439.1625702-1-jwakely@redhat.com/","msgid":"<20230303164439.1625702-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-03T16:44:39","name":"gcc: Adjust gdbhooks.py VecPrinter for vec layout changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303164439.1625702-1-jwakely@redhat.com/mbox/"},{"id":64016,"url":"https://patchwork.plctlab.org/api/1.2/patches/64016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7p9iv1s.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-03T17:50:07","name":"[libstdc++,prettyprint] add local std::string use to more tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7p9iv1s.fsf@lxoliva.fsfla.org/mbox/"},{"id":64017,"url":"https://patchwork.plctlab.org/api/1.2/patches/64017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIzU47FLQleT9HO@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T17:50:11","name":"[v5] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIzU47FLQleT9HO@redhat.com/mbox/"},{"id":64018,"url":"https://patchwork.plctlab.org/api/1.2/patches/64018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303175121.705791-1-polacek@redhat.com/","msgid":"<20230303175121.705791-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-03T17:51:21","name":"c++: error with constexpr operator() [PR107939]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303175121.705791-1-polacek@redhat.com/mbox/"},{"id":64023,"url":"https://patchwork.plctlab.org/api/1.2/patches/64023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzzxiul9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-03T18:00:02","name":"[rs6000] adjust return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzzxiul9.fsf@lxoliva.fsfla.org/mbox/"},{"id":64024,"url":"https://patchwork.plctlab.org/api/1.2/patches/64024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303180748.1645712-1-jwakely@redhat.com/","msgid":"<20230303180748.1645712-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-03T18:07:48","name":"gcc: Fix gdbhooks.py VecPrinter for vec<> as well as vec<>* [PR109006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303180748.1645712-1-jwakely@redhat.com/mbox/"},{"id":64064,"url":"https://patchwork.plctlab.org/api/1.2/patches/64064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303194333.559903-1-ibuclaw@gdcproject.org/","msgid":"<20230303194333.559903-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T19:43:33","name":"[committed] d: Document that TypeInfo-based va_arg is not implemented [PR108763]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303194333.559903-1-ibuclaw@gdcproject.org/mbox/"},{"id":64098,"url":"https://patchwork.plctlab.org/api/1.2/patches/64098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230327.2730749-1-dmalcolm@redhat.com/","msgid":"<20230303230327.2730749-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:03:27","name":"[pushed] testsuite: remove XFAIL in gcc.dg/analyzer/pr99716-1.c [PR108988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230327.2730749-1-dmalcolm@redhat.com/mbox/"},{"id":64099,"url":"https://patchwork.plctlab.org/api/1.2/patches/64099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230459.2730864-1-dmalcolm@redhat.com/","msgid":"<20230303230459.2730864-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:04:59","name":"[committed] analyzer: provide placeholder implementation of sprintf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230459.2730864-1-dmalcolm@redhat.com/mbox/"},{"id":64101,"url":"https://patchwork.plctlab.org/api/1.2/patches/64101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303232110.2731449-1-dmalcolm@redhat.com/","msgid":"<20230303232110.2731449-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:21:10","name":"[pushed] analyzer: start adding test coverage for OpenMP [PR109016]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303232110.2731449-1-dmalcolm@redhat.com/mbox/"},{"id":64117,"url":"https://patchwork.plctlab.org/api/1.2/patches/64117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005801.3F69C20425@pchp3.se.axis.com/","msgid":"<20230304005801.3F69C20425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T00:58:01","name":"[COMMITTED] testsuite: Fix various scan-assembler identifiers not handling _-prefix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005801.3F69C20425@pchp3.se.axis.com/mbox/"},{"id":64118,"url":"https://patchwork.plctlab.org/api/1.2/patches/64118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005932.4DD8A20425@pchp3.se.axis.com/","msgid":"<20230304005932.4DD8A20425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T00:59:32","name":"[COMMITTED] testsuite: Skip gcc.dg/ifcvt-4.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005932.4DD8A20425@pchp3.se.axis.com/mbox/"},{"id":64119,"url":"https://patchwork.plctlab.org/api/1.2/patches/64119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304010102.7585E20436@pchp3.se.axis.com/","msgid":"<20230304010102.7585E20436@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T01:01:02","name":"[COMMITTED] testsuite: Skip gcc.dg/ipa/pr77653.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304010102.7585E20436@pchp3.se.axis.com/mbox/"},{"id":64183,"url":"https://patchwork.plctlab.org/api/1.2/patches/64183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMGZG59v6MuoI43@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T08:50:44","name":"[committed] diagnostics, v2: Fix up selftests with $COLUMNS < 42 [PR108973]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMGZG59v6MuoI43@tucnak/mbox/"},{"id":64186,"url":"https://patchwork.plctlab.org/api/1.2/patches/64186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMI/REWaNXGJPL2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T09:01:49","name":"Remove remaining traces of m_vecdata from comments [PR109006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMI/REWaNXGJPL2@tucnak/mbox/"},{"id":64188,"url":"https://patchwork.plctlab.org/api/1.2/patches/64188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMTc/ZXC8klOXeY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T09:46:27","name":"[committed] testsuite: Fix up syntax errors in scan-tree-dump-times target selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMTc/ZXC8klOXeY@tucnak/mbox/"},{"id":64262,"url":"https://patchwork.plctlab.org/api/1.2/patches/64262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com/","msgid":"<000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-03-04T18:32:15","name":"PR rtl-optimization/106594: Preserve zero_extend in combine when cheap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com/mbox/"},{"id":64284,"url":"https://patchwork.plctlab.org/api/1.2/patches/64284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230305102430.266375-1-juzhe.zhong@rivai.ai/","msgid":"<20230305102430.266375-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-05T10:24:30","name":"RISC-V: Fix ICE for avl_single-86/avl_single-88/avl_single-90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230305102430.266375-1-juzhe.zhong@rivai.ai/mbox/"},{"id":64336,"url":"https://patchwork.plctlab.org/api/1.2/patches/64336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZATbvdEAtN1tK8Uw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-05T18:13:29","name":"[committed] testsuite: Fix up syntax error in scan-tree-dump-times target selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZATbvdEAtN1tK8Uw@tucnak/mbox/"},{"id":64339,"url":"https://patchwork.plctlab.org/api/1.2/patches/64339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec7afc14-1865-2f69-4d26-fa62dc22ff2c@gmx.de/","msgid":"","list_archive_url":null,"date":"2023-03-05T20:21:41","name":"[v3] Fortran: fix CLASS attribute handling [PR106856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec7afc14-1865-2f69-4d26-fa62dc22ff2c@gmx.de/mbox/"},{"id":64399,"url":"https://patchwork.plctlab.org/api/1.2/patches/64399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com/","msgid":"<5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:13:50","name":"[v2,01/07] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com/mbox/"},{"id":64400,"url":"https://patchwork.plctlab.org/api/1.2/patches/64400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6f5a659-6487-83bb-acef-ba19122d4c1e@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T03:14:23","name":"[v2,02/07] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6f5a659-6487-83bb-acef-ba19122d4c1e@rivosinc.com/mbox/"},{"id":64402,"url":"https://patchwork.plctlab.org/api/1.2/patches/64402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com/","msgid":"<1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:14:53","name":"[v2,03/07] RISC-V: autovec: Add vector cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com/mbox/"},{"id":64403,"url":"https://patchwork.plctlab.org/api/1.2/patches/64403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com/","msgid":"<0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:15:30","name":"[v2,04/07] RISC-V: autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com/mbox/"},{"id":64405,"url":"https://patchwork.plctlab.org/api/1.2/patches/64405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com/","msgid":"<07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:16:01","name":"[v2,05/07] RISC-V: autovec: Add tuning and target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com/mbox/"},{"id":64406,"url":"https://patchwork.plctlab.org/api/1.2/patches/64406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com/","msgid":"<6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:16:31","name":"[V2,06/07] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com/mbox/"},{"id":64408,"url":"https://patchwork.plctlab.org/api/1.2/patches/64408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00013323-7689-85c3-f10a-45f90e746868@rivosinc.com/","msgid":"<00013323-7689-85c3-f10a-45f90e746868@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:17:03","name":"[v2,07/07] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00013323-7689-85c3-f10a-45f90e746868@rivosinc.com/mbox/"},{"id":64528,"url":"https://patchwork.plctlab.org/api/1.2/patches/64528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be761ccd-2db7-1b80-a0bb-1d3499847bc7@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T09:27:09","name":"rs6000, libgcc: Fix bump size for powerpc64 elfv1 ABI [PR108727]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be761ccd-2db7-1b80-a0bb-1d3499847bc7@linux.ibm.com/mbox/"},{"id":64530,"url":"https://patchwork.plctlab.org/api/1.2/patches/64530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com/","msgid":"<60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com>","list_archive_url":null,"date":"2023-03-06T09:27:49","name":"testsuite, rs6000: Adjust ppc-fortran.exp to support dg-{warning,error}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com/mbox/"},{"id":64543,"url":"https://patchwork.plctlab.org/api/1.2/patches/64543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAW7SuefyFqOlPDc@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-03-06T10:07:06","name":"Enable scatter for generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAW7SuefyFqOlPDc@kam.mff.cuni.cz/mbox/"},{"id":64548,"url":"https://patchwork.plctlab.org/api/1.2/patches/64548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de/","msgid":"<20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-06T10:11:20","name":"[RFC] RAII auto_mpfr and autp_mpz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de/mbox/"},{"id":64582,"url":"https://patchwork.plctlab.org/api/1.2/patches/64582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306102609.1310C13A66@imap2.suse-dmz.suse.de/","msgid":"<20230306102609.1310C13A66@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-06T10:26:08","name":"tree-optimization/109025 - fixup double reduction detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306102609.1310C13A66@imap2.suse-dmz.suse.de/mbox/"},{"id":64630,"url":"https://patchwork.plctlab.org/api/1.2/patches/64630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilfe9hdh.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T12:47:06","name":"combine: Try harder to form zero_extends [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilfe9hdh.fsf_-_@arm.com/mbox/"},{"id":64746,"url":"https://patchwork.plctlab.org/api/1.2/patches/64746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306145715.1617591-1-pan2.li@intel.com/","msgid":"<20230306145715.1617591-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-06T14:57:15","name":"[v4] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306145715.1617591-1-pan2.li@intel.com/mbox/"},{"id":65046,"url":"https://patchwork.plctlab.org/api/1.2/patches/65046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184542.0517B20405@pchp3.se.axis.com/","msgid":"<20230306184542.0517B20405@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:45:42","name":"[1/3] testsuite: Add tail_call effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184542.0517B20405@pchp3.se.axis.com/mbox/"},{"id":65047,"url":"https://patchwork.plctlab.org/api/1.2/patches/65047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184735.03643203D7@pchp3.se.axis.com/","msgid":"<20230306184735.03643203D7@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:47:35","name":"[2/3] doc: Document testsuite check_effective_target_tail_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184735.03643203D7@pchp3.se.axis.com/mbox/"},{"id":65048,"url":"https://patchwork.plctlab.org/api/1.2/patches/65048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185008.538C7203D7@pchp3.se.axis.com/","msgid":"<20230306185008.538C7203D7@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:50:08","name":"[3/3] testsuite: Gate gcc.dg/plugin/must-tail-call-1.c and -2.c on tail_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185008.538C7203D7@pchp3.se.axis.com/mbox/"},{"id":65050,"url":"https://patchwork.plctlab.org/api/1.2/patches/65050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185255.721FC20405@pchp3.se.axis.com/","msgid":"<20230306185255.721FC20405@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:52:55","name":"testsuite: Support scanning tree-dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185255.721FC20405@pchp3.se.axis.com/mbox/"},{"id":65129,"url":"https://patchwork.plctlab.org/api/1.2/patches/65129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZhCDWSrLacjPCs@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T21:54:16","name":"[v6] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZhCDWSrLacjPCs@redhat.com/mbox/"},{"id":65130,"url":"https://patchwork.plctlab.org/api/1.2/patches/65130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZinAZKAELCJ2Sy@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T22:01:00","name":"[v2] c++: error with constexpr operator() [PR107939]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZinAZKAELCJ2Sy@redhat.com/mbox/"},{"id":65181,"url":"https://patchwork.plctlab.org/api/1.2/patches/65181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJtMq0f00sm_Hasn9pVZPGWD12hN99FHnGM0BKCgi+DYA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T23:45:16","name":"libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJtMq0f00sm_Hasn9pVZPGWD12hN99FHnGM0BKCgi+DYA@mail.gmail.com/mbox/"},{"id":65182,"url":"https://patchwork.plctlab.org/api/1.2/patches/65182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306235957.390533-1-polacek@redhat.com/","msgid":"<20230306235957.390533-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-06T23:59:57","name":"c++: noexcept and copy elision [PR109030]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306235957.390533-1-polacek@redhat.com/mbox/"},{"id":65280,"url":"https://patchwork.plctlab.org/api/1.2/patches/65280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307062123.142975-1-juzhe.zhong@rivai.ai/","msgid":"<20230307062123.142975-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-07T06:21:23","name":"RISC-V: Add fault first load C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307062123.142975-1-juzhe.zhong@rivai.ai/mbox/"},{"id":65330,"url":"https://patchwork.plctlab.org/api/1.2/patches/65330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e76cdb-49e7-aa77-d861-ccebe64748cf@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T08:55:38","name":"[PATCHv3,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e76cdb-49e7-aa77-d861-ccebe64748cf@linux.ibm.com/mbox/"},{"id":65332,"url":"https://patchwork.plctlab.org/api/1.2/patches/65332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAb+vw8RAyZtrlll@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-07T09:07:11","name":"c++: Fix up ICE in emit_support_tinfo_1 [PR109042]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAb+vw8RAyZtrlll@tucnak/mbox/"},{"id":65333,"url":"https://patchwork.plctlab.org/api/1.2/patches/65333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307091204.1498-1-shihua@iscas.ac.cn/","msgid":"<20230307091204.1498-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-07T09:12:04","name":"[RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307091204.1498-1-shihua@iscas.ac.cn/mbox/"},{"id":65370,"url":"https://patchwork.plctlab.org/api/1.2/patches/65370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307110906.81A03385B523@sourceware.org/","msgid":"<20230307110906.81A03385B523@sourceware.org>","list_archive_url":null,"date":"2023-03-07T11:08:15","name":"tree-optimization/109046 - re-combine complex loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307110906.81A03385B523@sourceware.org/mbox/"},{"id":65395,"url":"https://patchwork.plctlab.org/api/1.2/patches/65395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307120515.258058-1-pan2.li@intel.com/","msgid":"<20230307120515.258058-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-07T12:05:15","name":"[v5] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307120515.258058-1-pan2.li@intel.com/mbox/"},{"id":65508,"url":"https://patchwork.plctlab.org/api/1.2/patches/65508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLxqFxtwm8zK_uftgfoKjVeh-EXv85cVtX50T_=fsC9yw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T13:45:55","name":"[fortran] PR37336 finalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLxqFxtwm8zK_uftgfoKjVeh-EXv85cVtX50T_=fsC9yw@mail.gmail.com/mbox/"},{"id":65745,"url":"https://patchwork.plctlab.org/api/1.2/patches/65745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173534.1976902-1-jwakely@redhat.com/","msgid":"<20230307173534.1976902-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-07T17:35:34","name":"[committed] libstdc++: Fix comment typo in eh_personality.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173534.1976902-1-jwakely@redhat.com/mbox/"},{"id":65747,"url":"https://patchwork.plctlab.org/api/1.2/patches/65747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173549.1976948-1-jwakely@redhat.com/","msgid":"<20230307173549.1976948-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-07T17:35:49","name":"[committed] libstdc++: Fix symver for __gnu_cxx11_ieee128::__try_use_facet [PR108882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173549.1976948-1-jwakely@redhat.com/mbox/"},{"id":65749,"url":"https://patchwork.plctlab.org/api/1.2/patches/65749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17094-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T17:38:29","name":"middle-end: On emergency dumps finish the graph generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17094-tamar@arm.com/mbox/"},{"id":65768,"url":"https://patchwork.plctlab.org/api/1.2/patches/65768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307193349.578669-1-jason@redhat.com/","msgid":"<20230307193349.578669-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-07T19:33:49","name":"c++: static lambda tsubst [PR108526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307193349.578669-1-jason@redhat.com/mbox/"},{"id":65833,"url":"https://patchwork.plctlab.org/api/1.2/patches/65833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307201335.14969-1-ppalka@redhat.com/","msgid":"<20230307201335.14969-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-07T20:13:35","name":"libstdc++: extraneous begin in cartesian_product_view::end [PR107572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307201335.14969-1-ppalka@redhat.com/mbox/"},{"id":65983,"url":"https://patchwork.plctlab.org/api/1.2/patches/65983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308025945.648936-1-jason@redhat.com/","msgid":"<20230308025945.648936-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-08T02:59:44","name":"[RFC] c++: lambda mangling alias issues [PR107897]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308025945.648936-1-jason@redhat.com/mbox/"},{"id":65988,"url":"https://patchwork.plctlab.org/api/1.2/patches/65988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308031856.174124-1-juzhe.zhong@rivai.ai/","msgid":"<20230308031856.174124-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T03:18:56","name":"RISC-V: Fine tune merge operand constraint for integer/load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308031856.174124-1-juzhe.zhong@rivai.ai/mbox/"},{"id":65993,"url":"https://patchwork.plctlab.org/api/1.2/patches/65993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-2-collison@rivosinc.com/","msgid":"<20230308032740.989275-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:35","name":"[v3,1/6] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-2-collison@rivosinc.com/mbox/"},{"id":65992,"url":"https://patchwork.plctlab.org/api/1.2/patches/65992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-3-collison@rivosinc.com/","msgid":"<20230308032740.989275-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:36","name":"[v3,2/6] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-3-collison@rivosinc.com/mbox/"},{"id":65994,"url":"https://patchwork.plctlab.org/api/1.2/patches/65994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-4-collison@rivosinc.com/","msgid":"<20230308032740.989275-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:37","name":"[v3,3/6] RISC-V: autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-4-collison@rivosinc.com/mbox/"},{"id":65995,"url":"https://patchwork.plctlab.org/api/1.2/patches/65995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-5-collison@rivosinc.com/","msgid":"<20230308032740.989275-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:38","name":"[v3,4/6] RISC-V: autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-5-collison@rivosinc.com/mbox/"},{"id":65996,"url":"https://patchwork.plctlab.org/api/1.2/patches/65996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-6-collison@rivosinc.com/","msgid":"<20230308032740.989275-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:39","name":"[v3,5/6] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-6-collison@rivosinc.com/mbox/"},{"id":65999,"url":"https://patchwork.plctlab.org/api/1.2/patches/65999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-7-collison@rivosinc.com/","msgid":"<20230308032740.989275-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:40","name":"[v3,6/6] RISC-V: autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-7-collison@rivosinc.com/mbox/"},{"id":66014,"url":"https://patchwork.plctlab.org/api/1.2/patches/66014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308045839.D4D7D203F2@pchp3.se.axis.com/","msgid":"<20230308045839.D4D7D203F2@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-08T04:58:39","name":"testsuite: Fix omp-parallel-for-get-min.c and -for-1.c for non-openmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308045839.D4D7D203F2@pchp3.se.axis.com/mbox/"},{"id":66015,"url":"https://patchwork.plctlab.org/api/1.2/patches/66015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com/","msgid":"<413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com>","list_archive_url":null,"date":"2023-03-08T05:03:41","name":"[committed] Fix MIPS testsuite over-eager matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com/mbox/"},{"id":66023,"url":"https://patchwork.plctlab.org/api/1.2/patches/66023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp/","msgid":"<8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp>","list_archive_url":null,"date":"2023-03-08T06:04:41","name":"xtensa: Fix for enabling LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp/mbox/"},{"id":66024,"url":"https://patchwork.plctlab.org/api/1.2/patches/66024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308061621.317733-1-juzhe.zhong@rivai.ai/","msgid":"<20230308061621.317733-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T06:16:21","name":"RISC-V: Fine tunning merge operand constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308061621.317733-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66028,"url":"https://patchwork.plctlab.org/api/1.2/patches/66028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308063138.1490431-1-hongyu.wang@intel.com/","msgid":"<20230308063138.1490431-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-03-08T06:31:38","name":"libgomp: Fix default value of GOMP_SPINCOUNT [PR 109062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308063138.1490431-1-hongyu.wang@intel.com/mbox/"},{"id":66049,"url":"https://patchwork.plctlab.org/api/1.2/patches/66049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308073333.814033-1-pan2.li@intel.com/","msgid":"<20230308073333.814033-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-08T07:33:33","name":"RISC-V: Bugfix for rvv bool mode size adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308073333.814033-1-pan2.li@intel.com/mbox/"},{"id":66057,"url":"https://patchwork.plctlab.org/api/1.2/patches/66057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308074213.97404-1-juzhe.zhong@rivai.ai/","msgid":"<20230308074213.97404-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T07:42:13","name":"Extend nops num in \"maybe_gen_insn\" for RISC-V Vector intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308074213.97404-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66126,"url":"https://patchwork.plctlab.org/api/1.2/patches/66126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308093929.98D8C3858C62@sourceware.org/","msgid":"<20230308093929.98D8C3858C62@sourceware.org>","list_archive_url":null,"date":"2023-03-08T09:38:43","name":"middle-end/108995 - avoid folding when sanitizing overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308093929.98D8C3858C62@sourceware.org/mbox/"},{"id":66147,"url":"https://patchwork.plctlab.org/api/1.2/patches/66147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com/","msgid":"<17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com>","list_archive_url":null,"date":"2023-03-08T11:05:37","name":"GCN update for wwwdocs / libgomp.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com/mbox/"},{"id":66191,"url":"https://patchwork.plctlab.org/api/1.2/patches/66191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79726845-749b-8e49-6c10-1f7930074ddf@gmail.com/","msgid":"<79726845-749b-8e49-6c10-1f7930074ddf@gmail.com>","list_archive_url":null,"date":"2023-03-08T13:07:19","name":"[v3] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79726845-749b-8e49-6c10-1f7930074ddf@gmail.com/mbox/"},{"id":66251,"url":"https://patchwork.plctlab.org/api/1.2/patches/66251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB16201866FEA701E17850E8D3ACB49@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-03-08T14:08:49","name":"libstdc++: Fix handling of surrogate CP in codecvt [PR108976]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB16201866FEA701E17850E8D3ACB49@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":66261,"url":"https://patchwork.plctlab.org/api/1.2/patches/66261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308143527.113337-1-ppalka@redhat.com/","msgid":"<20230308143527.113337-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T14:35:27","name":"libstdc++: Make views::single/iota/istream SFINAE-friendly [PR108362]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308143527.113337-1-ppalka@redhat.com/mbox/"},{"id":66287,"url":"https://patchwork.plctlab.org/api/1.2/patches/66287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308151133.152110-1-ppalka@redhat.com/","msgid":"<20230308151133.152110-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T15:11:33","name":"libstdc++: Implement LWG 3820/3849 changes to cartesian_product_view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308151133.152110-1-ppalka@redhat.com/mbox/"},{"id":66320,"url":"https://patchwork.plctlab.org/api/1.2/patches/66320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308155306.257241-1-ppalka@redhat.com/","msgid":"<20230308155306.257241-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T15:53:06","name":"libstdc++: Implement LWG 3715 changes to view_interface::empty","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308155306.257241-1-ppalka@redhat.com/mbox/"},{"id":66347,"url":"https://patchwork.plctlab.org/api/1.2/patches/66347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com/","msgid":"<98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com>","list_archive_url":null,"date":"2023-03-08T16:20:02","name":"[1/X] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com/mbox/"},{"id":66348,"url":"https://patchwork.plctlab.org/api/1.2/patches/66348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com/","msgid":"<08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com>","list_archive_url":null,"date":"2023-03-08T16:21:47","name":"[2/X] parloops: Copy target and optimizations when creating a function clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com/mbox/"},{"id":66349,"url":"https://patchwork.plctlab.org/api/1.2/patches/66349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com/","msgid":"<8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com>","list_archive_url":null,"date":"2023-03-08T16:23:45","name":"[3/X] parloops: Allow poly number of iterations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com/mbox/"},{"id":66350,"url":"https://patchwork.plctlab.org/api/1.2/patches/66350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4e8c0df-3c3b-852c-3e87-e54ead721fc8@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-08T16:25:27","name":"[RFC,4/X] omp, aarch64: Add SVE support for '\''omp declare simd'\'' [PR 96342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4e8c0df-3c3b-852c-3e87-e54ead721fc8@arm.com/mbox/"},{"id":66351,"url":"https://patchwork.plctlab.org/api/1.2/patches/66351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce294c68-cfb4-9716-f939-7bbf0e9a6205@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-08T16:26:59","name":"[RFC,5/X] omp: Create simd clones from '\''omp declare variant'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce294c68-cfb4-9716-f939-7bbf0e9a6205@arm.com/mbox/"},{"id":66352,"url":"https://patchwork.plctlab.org/api/1.2/patches/66352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com/","msgid":"<2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com>","list_archive_url":null,"date":"2023-03-08T16:28:24","name":"[RFC,6/X] omp: Allow creation of simd clones from omp declare variant with -fopenmp-simd flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com/mbox/"},{"id":66356,"url":"https://patchwork.plctlab.org/api/1.2/patches/66356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308164651.325398-1-ppalka@redhat.com/","msgid":"<20230308164651.325398-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T16:46:51","name":"libstdc++: Implement P2520R0 changes to move_iterator'\''s iterator_concept","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308164651.325398-1-ppalka@redhat.com/mbox/"},{"id":66451,"url":"https://patchwork.plctlab.org/api/1.2/patches/66451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308210930.128620-1-polacek@redhat.com/","msgid":"<20230308210930.128620-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-08T21:09:30","name":"ubsan: missed -fsanitize=bounds for compound ops [PR108060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308210930.128620-1-polacek@redhat.com/mbox/"},{"id":66481,"url":"https://patchwork.plctlab.org/api/1.2/patches/66481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308222146.102045-1-juzhe.zhong@rivai.ai/","msgid":"<20230308222146.102045-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T22:21:46","name":"[V2] RISC-V: Add fault first load C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308222146.102045-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66493,"url":"https://patchwork.plctlab.org/api/1.2/patches/66493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com/","msgid":"<40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com>","list_archive_url":null,"date":"2023-03-08T23:01:38","name":"rs6000: Accept const pointer operands for MMA builtins [PR109073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com/mbox/"},{"id":66556,"url":"https://patchwork.plctlab.org/api/1.2/patches/66556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021620.19719-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021620.19719-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:20","name":"[gcc12,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021620.19719-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66557,"url":"https://patchwork.plctlab.org/api/1.2/patches/66557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021627.19767-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021627.19767-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:27","name":"[gcc11,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021627.19767-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66558,"url":"https://patchwork.plctlab.org/api/1.2/patches/66558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021636.19815-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021636.19815-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:36","name":"[gcc10,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021636.19815-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66612,"url":"https://patchwork.plctlab.org/api/1.2/patches/66612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309065846.2D7A933E60@hamza.pair.com/","msgid":"<20230309065846.2D7A933E60@hamza.pair.com>","list_archive_url":null,"date":"2023-03-09T06:58:44","name":"[pushed] wwwdocs: gcc-13: Spell front end (noun) without dash","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309065846.2D7A933E60@hamza.pair.com/mbox/"},{"id":66642,"url":"https://patchwork.plctlab.org/api/1.2/patches/66642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309075710.2236986-1-collison@rivosinc.com/","msgid":"<20230309075710.2236986-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-09T07:57:10","name":"[v2] vect: Check that vector factor is a compile-time constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309075710.2236986-1-collison@rivosinc.com/mbox/"},{"id":66682,"url":"https://patchwork.plctlab.org/api/1.2/patches/66682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAmYznEFViafs4Gv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-09T08:29:02","name":"range-op-float: Fix up reverse binary operations [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAmYznEFViafs4Gv@tucnak/mbox/"},{"id":66755,"url":"https://patchwork.plctlab.org/api/1.2/patches/66755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309103821.D67683850868@sourceware.org/","msgid":"<20230309103821.D67683850868@sourceware.org>","list_archive_url":null,"date":"2023-03-09T10:37:13","name":"Avoid unnecessary epilogues from tree_unroll_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309103821.D67683850868@sourceware.org/mbox/"},{"id":66789,"url":"https://patchwork.plctlab.org/api/1.2/patches/66789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309111602.D79AC3858C3A@sourceware.org/","msgid":"<20230309111602.D79AC3858C3A@sourceware.org>","list_archive_url":null,"date":"2023-03-09T11:15:17","name":"tree-optimization/44794 - avoid excessive RTL unrolling on epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309111602.D79AC3858C3A@sourceware.org/mbox/"},{"id":66823,"url":"https://patchwork.plctlab.org/api/1.2/patches/66823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsae15yg.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T12:09:59","name":"[v2,1/2] combine: Split code out of make_compound_operation_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsae15yg.fsf@arm.com/mbox/"},{"id":66824,"url":"https://patchwork.plctlab.org/api/1.2/patches/66824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkl215x0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T12:10:51","name":"[v2,2/2] combine: Try harder to form zero_extends [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkl215x0.fsf@arm.com/mbox/"},{"id":66865,"url":"https://patchwork.plctlab.org/api/1.2/patches/66865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com/","msgid":"<8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com>","list_archive_url":null,"date":"2023-03-09T13:45:32","name":"[pushed,PR108999] LRA: For clobbered regs use operand mode instead of the biggest mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com/mbox/"},{"id":66955,"url":"https://patchwork.plctlab.org/api/1.2/patches/66955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309161236.2192731-1-jwakely@redhat.com/","msgid":"<20230309161236.2192731-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-09T16:12:36","name":"[committed] libstdc++: Really fix symver for __gnu_cxx11_ieee128::__try_use_facet [PR108882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309161236.2192731-1-jwakely@redhat.com/mbox/"},{"id":67063,"url":"https://patchwork.plctlab.org/api/1.2/patches/67063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309180320.2899452-1-apinski@marvell.com/","msgid":"<20230309180320.2899452-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-09T18:03:20","name":"[PATCHv2] Fix PR 108980: note without warning due to array bounds check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309180320.2899452-1-apinski@marvell.com/mbox/"},{"id":67065,"url":"https://patchwork.plctlab.org/api/1.2/patches/67065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c56ca7fa-4444-483d-9c3e-93f641dd7f22-1678385289835@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-03-09T18:08:09","name":"Fortran: fix ICE with bind(c) in block data [PR104332]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c56ca7fa-4444-483d-9c3e-93f641dd7f22-1678385289835@3c-app-gmx-bap32/mbox/"},{"id":67070,"url":"https://patchwork.plctlab.org/api/1.2/patches/67070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309185616.E420F20438@pchp3.se.axis.com/","msgid":"<20230309185616.E420F20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-09T18:56:16","name":"testsuite: Handle default_packed targets in gcc.dg/plugin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309185616.E420F20438@pchp3.se.axis.com/mbox/"},{"id":67080,"url":"https://patchwork.plctlab.org/api/1.2/patches/67080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17101-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T19:36:21","name":"middle-end: don'\''t form FMAs when multiplication is not single use. [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17101-tamar@arm.com/mbox/"},{"id":67082,"url":"https://patchwork.plctlab.org/api/1.2/patches/67082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAo2E3aXm85gr4dw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-09T19:40:03","name":"c++, abi: Fix up class layout with bitfields [PR109039]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAo2E3aXm85gr4dw@tucnak/mbox/"},{"id":67116,"url":"https://patchwork.plctlab.org/api/1.2/patches/67116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212318.3126266-1-dmalcolm@redhat.com/","msgid":"<20230309212318.3126266-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-09T21:23:18","name":"[pushed] testsuite: add various -Wanalyzer-null-dereference false +ve test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212318.3126266-1-dmalcolm@redhat.com/mbox/"},{"id":67117,"url":"https://patchwork.plctlab.org/api/1.2/patches/67117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212619.2329010-1-jason@redhat.com/","msgid":"<20230309212619.2329010-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-09T21:26:19","name":"[pushed] c++: allocator temps in list of arrays [PR108773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212619.2329010-1-jason@redhat.com/mbox/"},{"id":67130,"url":"https://patchwork.plctlab.org/api/1.2/patches/67130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-1-arsen@aarsen.me/","msgid":"<20230309222626.4008373-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-09T22:26:25","name":"[1/2] libstdc++: Harmonize and other headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-1-arsen@aarsen.me/mbox/"},{"id":67131,"url":"https://patchwork.plctlab.org/api/1.2/patches/67131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-2-arsen@aarsen.me/","msgid":"<20230309222626.4008373-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-09T22:26:26","name":"[2/2] libstdc++: Add a test for FTM redefinitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-2-arsen@aarsen.me/mbox/"},{"id":67181,"url":"https://patchwork.plctlab.org/api/1.2/patches/67181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAp9hXdOGo/Ks+xz@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-10T00:44:53","name":"[v2] ubsan: missed -fsanitize=bounds for compound ops [PR108060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAp9hXdOGo/Ks+xz@redhat.com/mbox/"},{"id":67183,"url":"https://patchwork.plctlab.org/api/1.2/patches/67183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAqKlNLJl4jMFGVa@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-10T01:40:36","name":"[V4] Rework 128-bit complex multiply and divide.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAqKlNLJl4jMFGVa@toto.the-meissners.org/mbox/"},{"id":67186,"url":"https://patchwork.plctlab.org/api/1.2/patches/67186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310030205.90760-1-juzhe.zhong@rivai.ai/","msgid":"<20230310030205.90760-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-10T03:02:05","name":"RISC-V: Fine tune RA constraint for narrow instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310030205.90760-1-juzhe.zhong@rivai.ai/mbox/"},{"id":67188,"url":"https://patchwork.plctlab.org/api/1.2/patches/67188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310031351.2404945-1-jason@redhat.com/","msgid":"<20230310031351.2404945-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T03:13:51","name":"[pushed] c++: overloaded fn in contract [PR108542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310031351.2404945-1-jason@redhat.com/mbox/"},{"id":67199,"url":"https://patchwork.plctlab.org/api/1.2/patches/67199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310035736.2418695-1-jason@redhat.com/","msgid":"<20230310035736.2418695-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T03:57:36","name":"[pushed] c++: signed __int128_t [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310035736.2418695-1-jason@redhat.com/mbox/"},{"id":67228,"url":"https://patchwork.plctlab.org/api/1.2/patches/67228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310055947.2918320-1-apinski@marvell.com/","msgid":"<20230310055947.2918320-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T05:59:47","name":"Fix PR 108874: aarch64 code regression with shift and ands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310055947.2918320-1-apinski@marvell.com/mbox/"},{"id":67264,"url":"https://patchwork.plctlab.org/api/1.2/patches/67264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArlUJOn1HBZ44yJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T08:07:44","name":"range-op-float: Fix up -ffinite-math-only range extension and don'\''t extend into infinities [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArlUJOn1HBZ44yJ@tucnak/mbox/"},{"id":67268,"url":"https://patchwork.plctlab.org/api/1.2/patches/67268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310080857.186586-1-juzhe.zhong@rivai.ai/","msgid":"<20230310080857.186586-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-10T08:08:57","name":"RISC-V: Fix ICE of RVV compare intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310080857.186586-1-juzhe.zhong@rivai.ai/mbox/"},{"id":67271,"url":"https://patchwork.plctlab.org/api/1.2/patches/67271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArmdQvGOS9m7jXA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T08:12:37","name":"range-op-float: Extend lhs by 0.5ulp rather than 1ulp if not -frounding-math [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArmdQvGOS9m7jXA@tucnak/mbox/"},{"id":67364,"url":"https://patchwork.plctlab.org/api/1.2/patches/67364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de/","msgid":"<20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-10T11:26:47","name":"Shrink points-to analysis dumps when not dumping with -details","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de/mbox/"},{"id":67370,"url":"https://patchwork.plctlab.org/api/1.2/patches/67370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310113718.2304961-1-jwakely@redhat.com/","msgid":"<20230310113718.2304961-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-10T11:37:18","name":"[committed] libstdc++: Fix GDB Xmethod for std::shared_ptr::use_count() [PR109064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310113718.2304961-1-jwakely@redhat.com/mbox/"},{"id":67384,"url":"https://patchwork.plctlab.org/api/1.2/patches/67384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310124053.164-1-jinma@linux.alibaba.com/","msgid":"<20230310124053.164-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-03-10T12:40:53","name":"[v6] RISC-V: Add support for experimental zfa extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310124053.164-1-jinma@linux.alibaba.com/mbox/"},{"id":67404,"url":"https://patchwork.plctlab.org/api/1.2/patches/67404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133232.3165688-1-dmalcolm@redhat.com/","msgid":"<20230310133232.3165688-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-10T13:32:32","name":"[pushed] analyzer: fix deref-before-check false +ves seen in haproxy [PR108475, PR109060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133232.3165688-1-dmalcolm@redhat.com/mbox/"},{"id":67406,"url":"https://patchwork.plctlab.org/api/1.2/patches/67406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133858.76465134F7@imap2.suse-dmz.suse.de/","msgid":"<20230310133858.76465134F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-10T13:38:57","name":"Speedup PTA solving for call constraint sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133858.76465134F7@imap2.suse-dmz.suse.de/mbox/"},{"id":67408,"url":"https://patchwork.plctlab.org/api/1.2/patches/67408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310135420.2492295-1-jason@redhat.com/","msgid":"<20230310135420.2492295-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T13:54:20","name":"[pushed] c++: class NTTP and nested anon union [PR108566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310135420.2492295-1-jason@redhat.com/mbox/"},{"id":67409,"url":"https://patchwork.plctlab.org/api/1.2/patches/67409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6usbsxt.fsf@euler.schwinge.homeip.net/","msgid":"<87h6usbsxt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:07:58","name":"Fix OpenACC/GCN '\''acc_ev_enqueue_launch_end'\'' position (was: [PATCH] [og9] OpenACC profiling support for AMD GCN)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6usbsxt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67412,"url":"https://patchwork.plctlab.org/api/1.2/patches/67412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz5gbsbm.fsf@euler.schwinge.homeip.net/","msgid":"<87cz5gbsbm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:21:17","name":"Document/verify another aspect of OpenACC '\''async'\'' semantics in '\''libgomp.oacc-c-c++-common/data-3.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz5gbsbm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67413,"url":"https://patchwork.plctlab.org/api/1.2/patches/67413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a60kbrbo.fsf@euler.schwinge.homeip.net/","msgid":"<87a60kbrbo.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:42:51","name":"OpenACC: Remove '\''acc_async_test'\'' -> skip shortcut in '\''libgomp/oacc-async.c:goacc_wait'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a60kbrbo.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67420,"url":"https://patchwork.plctlab.org/api/1.2/patches/67420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yb8bqlt.fsf@euler.schwinge.homeip.net/","msgid":"<875yb8bqlt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:58:22","name":"Simplify OpenACC '\''no_create'\'' clause implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yb8bqlt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67424,"url":"https://patchwork.plctlab.org/api/1.2/patches/67424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87356cbpgy.fsf@euler.schwinge.homeip.net/","msgid":"<87356cbpgy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T15:22:53","name":"Allow libgomp '\''cbuf'\'' buffering with OpenACC '\''async'\'' for '\''ephemeral'\'' data (was: [PATCH 3/4] openacc: Fix asynchronous host-to-device copies in libgomp runtime)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87356cbpgy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67425,"url":"https://patchwork.plctlab.org/api/1.2/patches/67425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310153513.2330396-1-jwakely@redhat.com/","msgid":"<20230310153513.2330396-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-10T15:35:13","name":"gcc: Add deleted assignment operators to non-copyable types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310153513.2330396-1-jwakely@redhat.com/mbox/"},{"id":67439,"url":"https://patchwork.plctlab.org/api/1.2/patches/67439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAtQIleilVL5xkAl@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T15:43:30","name":"c++ testsuite: Add test for PR107703","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAtQIleilVL5xkAl@tucnak/mbox/"},{"id":67525,"url":"https://patchwork.plctlab.org/api/1.2/patches/67525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310161713.124368-1-polacek@redhat.com/","msgid":"<20230310161713.124368-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-10T16:17:13","name":"c++: ICE with constexpr lambda [PR107280]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310161713.124368-1-polacek@redhat.com/mbox/"},{"id":67578,"url":"https://patchwork.plctlab.org/api/1.2/patches/67578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310165841.3179375-1-dmalcolm@redhat.com/","msgid":"<20230310165841.3179375-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-10T16:58:41","name":"[pushed] analyzer: fix leak false +ve seen in haproxy'\''s cfgparse.c [PR109059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310165841.3179375-1-dmalcolm@redhat.com/mbox/"},{"id":67589,"url":"https://patchwork.plctlab.org/api/1.2/patches/67589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8ka5s2.fsf@euler.schwinge.homeip.net/","msgid":"<87zg8ka5s2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T17:13:33","name":"Use '\''GOMP_MAP_VARS_TARGET'\'' for OpenACC compute constructs [PR90596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8ka5s2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67605,"url":"https://patchwork.plctlab.org/api/1.2/patches/67605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310173954.DB93433E1B@hamza.pair.com/","msgid":"<20230310173954.DB93433E1B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-10T17:39:52","name":"[pushed] wwwdocs: gcc-13: Escape < and > as < and >","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310173954.DB93433E1B@hamza.pair.com/mbox/"},{"id":67618,"url":"https://patchwork.plctlab.org/api/1.2/patches/67618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310175102.2937497-1-apinski@marvell.com/","msgid":"<20230310175102.2937497-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T17:51:02","name":"[COMMITTED] Fix PR 108874: aarch64 code regression with shift and ands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310175102.2937497-1-apinski@marvell.com/mbox/"},{"id":67620,"url":"https://patchwork.plctlab.org/api/1.2/patches/67620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eef3f64d-521e-e24d-80fb-24f18ee3e4e7@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-10T17:54:10","name":"[Fortran] Enable -fwrapv for -std=legacy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eef3f64d-521e-e24d-80fb-24f18ee3e4e7@netcologne.de/mbox/"},{"id":67641,"url":"https://patchwork.plctlab.org/api/1.2/patches/67641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310184938.2531120-1-jason@redhat.com/","msgid":"<20230310184938.2531120-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T18:49:38","name":"[pushed] c++: constrained lambda error-recovery [PR108972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310184938.2531120-1-jason@redhat.com/mbox/"},{"id":67642,"url":"https://patchwork.plctlab.org/api/1.2/patches/67642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310185048.1183264-1-arsen@aarsen.me/","msgid":"<20230310185048.1183264-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-10T18:50:48","name":"[pushed] MAINTAINERS: add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310185048.1183264-1-arsen@aarsen.me/mbox/"},{"id":67648,"url":"https://patchwork.plctlab.org/api/1.2/patches/67648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310190741.168444-1-polacek@redhat.com/","msgid":"<20230310190741.168444-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-10T19:07:41","name":"c++: suppress -Wdangling-reference for std::span [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310190741.168444-1-polacek@redhat.com/mbox/"},{"id":67660,"url":"https://patchwork.plctlab.org/api/1.2/patches/67660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310201620.2097011-1-collison@rivosinc.com/","msgid":"<20230310201620.2097011-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-10T20:16:20","name":"vect: Verify that GET_MODE_NUNITS is power-of-2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310201620.2097011-1-collison@rivosinc.com/mbox/"},{"id":67741,"url":"https://patchwork.plctlab.org/api/1.2/patches/67741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310215351.2943914-1-apinski@marvell.com/","msgid":"<20230310215351.2943914-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T21:53:51","name":"[COMMITTED/12] tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310215351.2943914-1-apinski@marvell.com/mbox/"},{"id":67826,"url":"https://patchwork.plctlab.org/api/1.2/patches/67826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225124.CF2BD20417@pchp3.se.axis.com/","msgid":"<20230310225124.CF2BD20417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:51:24","name":"[committed] testsuite: gcc.dg/pr106397.c: Add -w to options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225124.CF2BD20417@pchp3.se.axis.com/mbox/"},{"id":67827,"url":"https://patchwork.plctlab.org/api/1.2/patches/67827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225234.F162720417@pchp3.se.axis.com/","msgid":"<20230310225234.F162720417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:52:34","name":"[committed] testsuite: gcc.dg/pr108117.c: Require effective-target scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225234.F162720417@pchp3.se.axis.com/mbox/"},{"id":67829,"url":"https://patchwork.plctlab.org/api/1.2/patches/67829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225403.3827420420@pchp3.se.axis.com/","msgid":"<20230310225403.3827420420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:54:03","name":"[committed] testsuite: Tweak check_fork_available for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225403.3827420420@pchp3.se.axis.com/mbox/"},{"id":67839,"url":"https://patchwork.plctlab.org/api/1.2/patches/67839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfca67e4-e14f-63cd-fefb-db0025353d90@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-03-10T23:08:57","name":"update copyright year in libstdc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfca67e4-e14f-63cd-fefb-db0025353d90@jguk.org/mbox/"},{"id":67865,"url":"https://patchwork.plctlab.org/api/1.2/patches/67865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39626f1c48c842b523aa46e3c23b2aabe356e27.1678491986.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-10T23:53:05","name":"[1/3] OpenMP: Fix \"exit data\" for array sections for ref-to-ptr components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39626f1c48c842b523aa46e3c23b2aabe356e27.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67867,"url":"https://patchwork.plctlab.org/api/1.2/patches/67867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com/","msgid":"<6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-10T23:53:06","name":"[2/3] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67866,"url":"https://patchwork.plctlab.org/api/1.2/patches/67866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com/","msgid":"<4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-10T23:53:07","name":"[3/3] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67951,"url":"https://patchwork.plctlab.org/api/1.2/patches/67951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311012749.2949900-1-apinski@marvell.com/","msgid":"<20230311012749.2949900-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-11T01:27:49","name":"[COMMITTED/12] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311012749.2949900-1-apinski@marvell.com/mbox/"},{"id":67956,"url":"https://patchwork.plctlab.org/api/1.2/patches/67956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4afcdfe-1f44-0414-85b4-b6b16633de58@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-11T01:33:33","name":"[Committed] Docs: Update documentation of Texinfo versions for building manuals.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4afcdfe-1f44-0414-85b4-b6b16633de58@codesourcery.com/mbox/"},{"id":68125,"url":"https://patchwork.plctlab.org/api/1.2/patches/68125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-618a0ce8-7457-4d87-828a-ea87d1342711-1678546768519@3c-app-gmx-bs11/","msgid":"","list_archive_url":null,"date":"2023-03-11T14:59:28","name":"[pushed] Fortran: fix bounds check for copying of class expressions [PR106945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-618a0ce8-7457-4d87-828a-ea87d1342711-1678546768519@3c-app-gmx-bs11/mbox/"},{"id":68137,"url":"https://patchwork.plctlab.org/api/1.2/patches/68137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2d2ce62-49e9-296d-096f-e82c203d9f14@seanbright.com/","msgid":"","list_archive_url":null,"date":"2023-03-11T17:33:46","name":"docs: Fix double '\''See'\'' in zero-length-bounds docs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2d2ce62-49e9-296d-096f-e82c203d9f14@seanbright.com/mbox/"},{"id":68187,"url":"https://patchwork.plctlab.org/api/1.2/patches/68187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202445.3133190-1-sam@gentoo.org/","msgid":"<20230311202445.3133190-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-11T20:24:45","name":"RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202445.3133190-1-sam@gentoo.org/mbox/"},{"id":68188,"url":"https://patchwork.plctlab.org/api/1.2/patches/68188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202522.0D82833EA9@hamza.pair.com/","msgid":"<20230311202522.0D82833EA9@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T20:25:20","name":"[pushed] wwwdocs: gcc-10: Minor tweaks to the OpenACC/OpenMP section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202522.0D82833EA9@hamza.pair.com/mbox/"},{"id":68189,"url":"https://patchwork.plctlab.org/api/1.2/patches/68189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202705.3135051-1-sam@gentoo.org/","msgid":"<20230311202705.3135051-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-11T20:27:05","name":"[v2] RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202705.3135051-1-sam@gentoo.org/mbox/"},{"id":68190,"url":"https://patchwork.plctlab.org/api/1.2/patches/68190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311203234.2257423-1-arsen@aarsen.me/","msgid":"<20230311203234.2257423-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-11T20:32:34","name":"[v2] html: Set CONTENTS_OUTPUT_LOCATION=inline if makeinfo supports it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311203234.2257423-1-arsen@aarsen.me/mbox/"},{"id":68214,"url":"https://patchwork.plctlab.org/api/1.2/patches/68214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230238.CBACF33E9F@hamza.pair.com/","msgid":"<20230311230238.CBACF33E9F@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T23:02:37","name":"[pushed] doc: Drop a redundant link to AVR-LibC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230238.CBACF33E9F@hamza.pair.com/mbox/"},{"id":68215,"url":"https://patchwork.plctlab.org/api/1.2/patches/68215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230859.4EB3E33EB3@hamza.pair.com/","msgid":"<20230311230859.4EB3E33EB3@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T23:08:57","name":"[pushed] wwwdocs: testing: Further adjust link to upstream FTensor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230859.4EB3E33EB3@hamza.pair.com/mbox/"},{"id":68267,"url":"https://patchwork.plctlab.org/api/1.2/patches/68267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312101613.C0F0233E6B@hamza.pair.com/","msgid":"<20230312101613.C0F0233E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-12T10:16:11","name":"[pushed] libstdc++: Move www.graphviz.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312101613.C0F0233E6B@hamza.pair.com/mbox/"},{"id":68361,"url":"https://patchwork.plctlab.org/api/1.2/patches/68361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com/","msgid":"<000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-03-12T15:04:20","name":"PR middle-end/109031: Fix final value replacement from narrower IVs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com/mbox/"},{"id":68417,"url":"https://patchwork.plctlab.org/api/1.2/patches/68417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312175401.2736265-1-sam@gentoo.org/","msgid":"<20230312175401.2736265-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-12T17:54:01","name":"[v3] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312175401.2736265-1-sam@gentoo.org/mbox/"},{"id":68607,"url":"https://patchwork.plctlab.org/api/1.2/patches/68607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp/","msgid":"<85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp>","list_archive_url":null,"date":"2023-03-13T00:37:10","name":"xtensa: Remove REG_OK_STRICT and its derivatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp/mbox/"},{"id":68626,"url":"https://patchwork.plctlab.org/api/1.2/patches/68626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313035249.3997637-1-chenglulu@loongson.cn/","msgid":"<20230313035249.3997637-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-03-13T03:52:50","name":"LoongArch: Control all __crc* __crcc* builtin functions with macro __loongarch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313035249.3997637-1-chenglulu@loongson.cn/mbox/"},{"id":68640,"url":"https://patchwork.plctlab.org/api/1.2/patches/68640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313065742.1335925-1-arsen@aarsen.me/","msgid":"<20230313065742.1335925-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-13T06:57:43","name":"[gcc-{11,12}] c++: top level bind when rewriting coroutines [PR106188]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313065742.1335925-1-arsen@aarsen.me/mbox/"},{"id":68654,"url":"https://patchwork.plctlab.org/api/1.2/patches/68654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313075201.241158-1-juzhe.zhong@rivai.ai/","msgid":"<20230313075201.241158-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T07:52:01","name":"RISC-V: Fix bugs of internal tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313075201.241158-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68679,"url":"https://patchwork.plctlab.org/api/1.2/patches/68679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313081927.247155-1-juzhe.zhong@rivai.ai/","msgid":"<20230313081927.247155-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T08:19:27","name":"RISC-V: Fix reg order of RVV registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313081927.247155-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68684,"url":"https://patchwork.plctlab.org/api/1.2/patches/68684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313082855.248118-1-juzhe.zhong@rivai.ai/","msgid":"<20230313082855.248118-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T08:28:55","name":"RISC-V: Fine tune gather load RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313082855.248118-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68697,"url":"https://patchwork.plctlab.org/api/1.2/patches/68697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313090540.335536-1-juzhe.zhong@rivai.ai/","msgid":"<20230313090540.335536-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T09:05:40","name":"RISC-V: Refine reduction RA constraint according to RVV ISA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313090540.335536-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68702,"url":"https://patchwork.plctlab.org/api/1.2/patches/68702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZA7ommeXWVjWe3vH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-13T09:10:50","name":"libstdc++: Another baseline_symbols.txt update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZA7ommeXWVjWe3vH@tucnak/mbox/"},{"id":68731,"url":"https://patchwork.plctlab.org/api/1.2/patches/68731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313103508.2543385-1-jwakely@redhat.com/","msgid":"<20230313103508.2543385-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-13T10:35:08","name":"[committed] libstdc++: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313103508.2543385-1-jwakely@redhat.com/mbox/"},{"id":68733,"url":"https://patchwork.plctlab.org/api/1.2/patches/68733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313104607.2545130-1-jwakely@redhat.com/","msgid":"<20230313104607.2545130-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-13T10:46:07","name":"[committed] libstdc++: Refer to documentation hacking docs from Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313104607.2545130-1-jwakely@redhat.com/mbox/"},{"id":68806,"url":"https://patchwork.plctlab.org/api/1.2/patches/68806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com/","msgid":"<41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com>","list_archive_url":null,"date":"2023-03-13T12:25:04","name":"gcn/mkoffload.cc: Pass -save-temps on for the hsaco step","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com/mbox/"},{"id":68861,"url":"https://patchwork.plctlab.org/api/1.2/patches/68861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313141757.277008-1-juzhe.zhong@rivai.ai/","msgid":"<20230313141757.277008-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T14:17:57","name":"RISC-V: Fix Bug 109092","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313141757.277008-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68901,"url":"https://patchwork.plctlab.org/api/1.2/patches/68901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/716e6395-4108-0864-4272-f96b232989d2@arm.com/","msgid":"<716e6395-4108-0864-4272-f96b232989d2@arm.com>","list_archive_url":null,"date":"2023-03-13T15:53:30","name":"ifcvt: Lower bitfields only if suitable for scalar register [PR tree/109005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/716e6395-4108-0864-4272-f96b232989d2@arm.com/mbox/"},{"id":69036,"url":"https://patchwork.plctlab.org/api/1.2/patches/69036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae7e081e-d301-16a3-8e4e-e69655286cdd@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-03-13T18:48:08","name":"[pushed] wwwdocs: style: Add a link to our testing page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae7e081e-d301-16a3-8e4e-e69655286cdd@pfeifer.com/mbox/"},{"id":69048,"url":"https://patchwork.plctlab.org/api/1.2/patches/69048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190027.3358516-1-dmalcolm@redhat.com/","msgid":"<20230313190027.3358516-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:27","name":"[pushed] analyzer, testsuite: add test coverage for various builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190027.3358516-1-dmalcolm@redhat.com/mbox/"},{"id":69049,"url":"https://patchwork.plctlab.org/api/1.2/patches/69049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190031.3358543-1-dmalcolm@redhat.com/","msgid":"<20230313190031.3358543-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:31","name":"[pushed] testsuite: add test coverage for PR analyzer/108045","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190031.3358543-1-dmalcolm@redhat.com/mbox/"},{"id":69050,"url":"https://patchwork.plctlab.org/api/1.2/patches/69050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190035.3358567-1-dmalcolm@redhat.com/","msgid":"<20230313190035.3358567-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:35","name":"[pushed] testsuite: add test coverage for analyzer leak false +ve [PR105906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190035.3358567-1-dmalcolm@redhat.com/mbox/"},{"id":69091,"url":"https://patchwork.plctlab.org/api/1.2/patches/69091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201512.151814-1-jason@redhat.com/","msgid":"<20230313201512.151814-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-13T20:15:12","name":"[RFA] tree: define tree_code_type in C++11/14 [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201512.151814-1-jason@redhat.com/mbox/"},{"id":69092,"url":"https://patchwork.plctlab.org/api/1.2/patches/69092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201636.152901-1-jason@redhat.com/","msgid":"<20230313201636.152901-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-13T20:16:36","name":"[pushed] c++: handle _FloatNN redeclaration like bool [PR107128]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201636.152901-1-jason@redhat.com/mbox/"},{"id":69119,"url":"https://patchwork.plctlab.org/api/1.2/patches/69119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313204510.1908188-1-jcmvbkbc@gmail.com/","msgid":"<20230313204510.1908188-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-03-13T20:45:10","name":"[COMMITTED] xtensa: add .note.GNU-stack section on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313204510.1908188-1-jcmvbkbc@gmail.com/mbox/"},{"id":69150,"url":"https://patchwork.plctlab.org/api/1.2/patches/69150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212719.1269-1-ibuclaw@gdcproject.org/","msgid":"<20230313212719.1269-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-13T21:27:19","name":"[committed] d: Refactor DECL_ARGUMENT and DECL_RESULT generation to own function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212719.1269-1-ibuclaw@gdcproject.org/mbox/"},{"id":69152,"url":"https://patchwork.plctlab.org/api/1.2/patches/69152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212749.1772-1-ibuclaw@gdcproject.org/","msgid":"<20230313212749.1772-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-13T21:27:49","name":"[committed] d: Delay removing DECL_EXTERNAL from thunks until funcion has finished","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212749.1772-1-ibuclaw@gdcproject.org/mbox/"},{"id":69202,"url":"https://patchwork.plctlab.org/api/1.2/patches/69202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-1-sam@gentoo.org/","msgid":"<20230314002354.367655-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-14T00:23:53","name":"[v4,1/2] RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-1-sam@gentoo.org/mbox/"},{"id":69203,"url":"https://patchwork.plctlab.org/api/1.2/patches/69203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-2-sam@gentoo.org/","msgid":"<20230314002354.367655-2-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-14T00:23:54","name":"[v4,2/2] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-2-sam@gentoo.org/mbox/"},{"id":69212,"url":"https://patchwork.plctlab.org/api/1.2/patches/69212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314003806.328920-1-juzhe.zhong@rivai.ai/","msgid":"<20230314003806.328920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-14T00:38:06","name":"RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314003806.328920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":69222,"url":"https://patchwork.plctlab.org/api/1.2/patches/69222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314012536.2789120417@pchp3.se.axis.com/","msgid":"<20230314012536.2789120417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-14T01:25:36","name":"doc: md.texi (Insn Splitting): Tweak wording for readability.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314012536.2789120417@pchp3.se.axis.com/mbox/"},{"id":69256,"url":"https://patchwork.plctlab.org/api/1.2/patches/69256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314022331.105558-1-juzhe.zhong@rivai.ai/","msgid":"<20230314022331.105558-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-14T02:23:31","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314022331.105558-1-juzhe.zhong@rivai.ai/mbox/"},{"id":69322,"url":"https://patchwork.plctlab.org/api/1.2/patches/69322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314062514.1711201-1-lin1.hu@intel.com/","msgid":"<20230314062514.1711201-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-03-14T06:25:14","name":"i386:Add missing OPTION_MASK_ISA_AVX512VL in i386-builtin.def for VAES builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314062514.1711201-1-lin1.hu@intel.com/mbox/"},{"id":69338,"url":"https://patchwork.plctlab.org/api/1.2/patches/69338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314073003.C48B53858C2F@sourceware.org/","msgid":"<20230314073003.C48B53858C2F@sourceware.org>","list_archive_url":null,"date":"2023-03-14T07:29:19","name":"New testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314073003.C48B53858C2F@sourceware.org/mbox/"},{"id":69347,"url":"https://patchwork.plctlab.org/api/1.2/patches/69347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAoNGDJPNd069B5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T07:54:28","name":"testsuite: Fix up g++.dg/cpp2a/concepts-lambda3.C [PR108972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAoNGDJPNd069B5@tucnak/mbox/"},{"id":69350,"url":"https://patchwork.plctlab.org/api/1.2/patches/69350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApCMbOq6n+IGxA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T07:58:00","name":"c++: Treat unnamed bitfields as padding for __has_unique_object_representations [PR109096]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApCMbOq6n+IGxA@tucnak/mbox/"},{"id":69351,"url":"https://patchwork.plctlab.org/api/1.2/patches/69351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApxBo9DUPYM8fe@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T08:01:08","name":"tree-vect-patterns: Fix up ICE in upper_bound [PR109115]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApxBo9DUPYM8fe@tucnak/mbox/"},{"id":69364,"url":"https://patchwork.plctlab.org/api/1.2/patches/69364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAsLIG/MsOVEid4@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-03-14T08:11:24","name":"Fix ICE in profile_count::to_sreal_frequency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAsLIG/MsOVEid4@kam.mff.cuni.cz/mbox/"},{"id":69422,"url":"https://patchwork.plctlab.org/api/1.2/patches/69422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314101342.1F4003858414@sourceware.org/","msgid":"<20230314101342.1F4003858414@sourceware.org>","list_archive_url":null,"date":"2023-03-14T10:12:58","name":"Remove variables only used with .DEFERRED_INIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314101342.1F4003858414@sourceware.org/mbox/"},{"id":69428,"url":"https://patchwork.plctlab.org/api/1.2/patches/69428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17109-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-14T10:18:38","name":"[committed,testsuite] : move mla_1 test to aarch64 only [PR109118]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17109-tamar@arm.com/mbox/"},{"id":69443,"url":"https://patchwork.plctlab.org/api/1.2/patches/69443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103027.2697727-1-jwakely@redhat.com/","msgid":"<20230314103027.2697727-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:27","name":"[committed] libstdc++: Add assertions to std::mask_array operations [PR62196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103027.2697727-1-jwakely@redhat.com/mbox/"},{"id":69446,"url":"https://patchwork.plctlab.org/api/1.2/patches/69446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103033.2697851-1-jwakely@redhat.com/","msgid":"<20230314103033.2697851-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:33","name":"[committed] libstdc++: Add comment about symver linker scripts to makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103033.2697851-1-jwakely@redhat.com/mbox/"},{"id":69445,"url":"https://patchwork.plctlab.org/api/1.2/patches/69445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103040.2697873-1-jwakely@redhat.com/","msgid":"<20230314103040.2697873-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:40","name":"[committed] libstdc++: Fix preprocessor condition for inline variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103040.2697873-1-jwakely@redhat.com/mbox/"},{"id":69706,"url":"https://patchwork.plctlab.org/api/1.2/patches/69706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCV7EF97QkCHs+U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T15:42:36","name":"gdbhooks: Update gdbhooks.py for recent tree_code_type changes [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCV7EF97QkCHs+U@tucnak/mbox/"},{"id":69709,"url":"https://patchwork.plctlab.org/api/1.2/patches/69709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314160443.AC7E420417@pchp3.se.axis.com/","msgid":"<20230314160443.AC7E420417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-14T16:04:43","name":"[v2] doc: md.texi (Insn Splitting): Tweak wording for readability.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314160443.AC7E420417@pchp3.se.axis.com/mbox/"},{"id":69711,"url":"https://patchwork.plctlab.org/api/1.2/patches/69711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCcL2Uy41B+9NKU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T16:09:19","name":"i386: Fix up split_double_concat [PR109109]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCcL2Uy41B+9NKU@tucnak/mbox/"},{"id":69729,"url":"https://patchwork.plctlab.org/api/1.2/patches/69729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-1-ppalka@redhat.com/","msgid":"<20230314164146.1470993-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T16:41:45","name":"[1/2] c++: constrained template friend class matching [PR96830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-1-ppalka@redhat.com/mbox/"},{"id":69730,"url":"https://patchwork.plctlab.org/api/1.2/patches/69730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-2-ppalka@redhat.com/","msgid":"<20230314164146.1470993-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T16:41:46","name":"[2/2] c++: redeclaring member of constrained class template [PR96830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-2-ppalka@redhat.com/mbox/"},{"id":69745,"url":"https://patchwork.plctlab.org/api/1.2/patches/69745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bCobKsiWtNxzdZVcd_PwgtnTS_mONisdYdg4JN0442oA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-14T17:43:16","name":"i386: Use movss to implement V2SImode VEC_PERM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bCobKsiWtNxzdZVcd_PwgtnTS_mONisdYdg4JN0442oA@mail.gmail.com/mbox/"},{"id":69787,"url":"https://patchwork.plctlab.org/api/1.2/patches/69787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314184620.373190-1-jason@redhat.com/","msgid":"<20230314184620.373190-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-14T18:46:20","name":"[pushed] c++: -Wreturn-type with if (true) throw [PR107310]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314184620.373190-1-jason@redhat.com/mbox/"},{"id":69823,"url":"https://patchwork.plctlab.org/api/1.2/patches/69823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a97ee57-2800-4785-b4b4-418bbb32675c-1678822727185@3c-app-gmx-bap12/","msgid":"","list_archive_url":null,"date":"2023-03-14T19:38:47","name":"Fortran: rank checking with explicit-/assumed-size arrays and CLASS [PR58331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a97ee57-2800-4785-b4b4-418bbb32675c-1678822727185@3c-app-gmx-bap12/mbox/"},{"id":69826,"url":"https://patchwork.plctlab.org/api/1.2/patches/69826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314195659.1682947-1-ibuclaw@gdcproject.org/","msgid":"<20230314195659.1682947-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-14T19:56:59","name":"[committed] d: Fix undefined reference to lambda defined in private enum [PR109108]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314195659.1682947-1-ibuclaw@gdcproject.org/mbox/"},{"id":69840,"url":"https://patchwork.plctlab.org/api/1.2/patches/69840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314215256.4153026-1-collison@rivosinc.com/","msgid":"<20230314215256.4153026-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-14T21:52:56","name":"vect: Verify that GET_MODE_NUNITS is greater than one.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314215256.4153026-1-collison@rivosinc.com/mbox/"},{"id":69852,"url":"https://patchwork.plctlab.org/api/1.2/patches/69852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314221019.463098-1-jason@redhat.com/","msgid":"<20230314221019.463098-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-14T22:10:19","name":"[pushed] c++: variable tmpl partial specialization [PR108468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314221019.463098-1-jason@redhat.com/mbox/"},{"id":69875,"url":"https://patchwork.plctlab.org/api/1.2/patches/69875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314225026.163717-1-polacek@redhat.com/","msgid":"<20230314225026.163717-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-14T22:50:26","name":"sanitizer: missing signed integer overflow errors [PR109107]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314225026.163717-1-polacek@redhat.com/mbox/"},{"id":69891,"url":"https://patchwork.plctlab.org/api/1.2/patches/69891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314232005.1575584-1-ppalka@redhat.com/","msgid":"<20230314232005.1575584-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T23:20:05","name":"[pushed] libstdc++: Fix template-head of repeat_view::_Iterator [PR109111]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314232005.1575584-1-ppalka@redhat.com/mbox/"},{"id":69961,"url":"https://patchwork.plctlab.org/api/1.2/patches/69961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315052338.88042-1-juzhe.zhong@rivai.ai/","msgid":"<20230315052338.88042-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-15T05:23:38","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315052338.88042-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70019,"url":"https://patchwork.plctlab.org/api/1.2/patches/70019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315063746.166390-1-juzhe.zhong@rivai.ai/","msgid":"<20230315063746.166390-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-15T06:37:46","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315063746.166390-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70062,"url":"https://patchwork.plctlab.org/api/1.2/patches/70062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315075103.1039307-1-ysato@users.sourceforge.jp/","msgid":"<20230315075103.1039307-1-ysato@users.sourceforge.jp>","list_archive_url":null,"date":"2023-03-15T07:51:03","name":"[v2] PR target/89828 Inernal compiler error on -fno-omit-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315075103.1039307-1-ysato@users.sourceforge.jp/mbox/"},{"id":70089,"url":"https://patchwork.plctlab.org/api/1.2/patches/70089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093001.3BD723857803@sourceware.org/","msgid":"<20230315093001.3BD723857803@sourceware.org>","list_archive_url":null,"date":"2023-03-15T09:29:15","name":"tree-optimization/109139 - fix .DEFERRED_INIT removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093001.3BD723857803@sourceware.org/mbox/"},{"id":70090,"url":"https://patchwork.plctlab.org/api/1.2/patches/70090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093321.555944-1-xry111@xry111.site/","msgid":"<20230315093321.555944-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-15T09:33:21","name":"Pushed: [PATCH] builtins: Move the character difference into result instead of reassigning result [PR109086]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093321.555944-1-xry111@xry111.site/mbox/"},{"id":70100,"url":"https://patchwork.plctlab.org/api/1.2/patches/70100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com/","msgid":"<977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com>","list_archive_url":null,"date":"2023-03-15T10:07:24","name":"[v4] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com/mbox/"},{"id":70114,"url":"https://patchwork.plctlab.org/api/1.2/patches/70114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315104919.38328385840E@sourceware.org/","msgid":"<20230315104919.38328385840E@sourceware.org>","list_archive_url":null,"date":"2023-03-15T10:48:32","name":"[1/2] Avoid random stmt order result in pass_waccess::use_after_inval_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315104919.38328385840E@sourceware.org/mbox/"},{"id":70116,"url":"https://patchwork.plctlab.org/api/1.2/patches/70116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315105003.D4D1F3857437@sourceware.org/","msgid":"<20230315105003.D4D1F3857437@sourceware.org>","list_archive_url":null,"date":"2023-03-15T10:49:19","name":"[2/2] tree-optimization/109123 - run -Wuse-afer-free only early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315105003.D4D1F3857437@sourceware.org/mbox/"},{"id":70187,"url":"https://patchwork.plctlab.org/api/1.2/patches/70187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315122448.3394353-1-christoph.muellner@vrull.eu/","msgid":"<20230315122448.3394353-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-15T12:24:48","name":"riscv: thead: Add sign/zero extension support for th.ext and th.extu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315122448.3394353-1-christoph.muellner@vrull.eu/mbox/"},{"id":70188,"url":"https://patchwork.plctlab.org/api/1.2/patches/70188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124346.686647-1-jason@redhat.com/","msgid":"<20230315124346.686647-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:43:46","name":"[pushed] c++: injected class name as default ttp arg [PR58538]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124346.686647-1-jason@redhat.com/mbox/"},{"id":70189,"url":"https://patchwork.plctlab.org/api/1.2/patches/70189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-1-jason@redhat.com/","msgid":"<20230315124427.687003-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:44:26","name":"[pushed,1/2] c++: coerce_template_template_parms interface tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-1-jason@redhat.com/mbox/"},{"id":70190,"url":"https://patchwork.plctlab.org/api/1.2/patches/70190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-2-jason@redhat.com/","msgid":"<20230315124427.687003-2-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:44:27","name":"[2/2] c++: passing one ttp to another [PR108179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-2-jason@redhat.com/mbox/"},{"id":70233,"url":"https://patchwork.plctlab.org/api/1.2/patches/70233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315135358.3DE153858017@sourceware.org/","msgid":"<20230315135358.3DE153858017@sourceware.org>","list_archive_url":null,"date":"2023-03-15T13:53:14","name":"Avoid duplicate diagnostic in g++.dg/warn/Wuse-after-free3.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315135358.3DE153858017@sourceware.org/mbox/"},{"id":70249,"url":"https://patchwork.plctlab.org/api/1.2/patches/70249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com/","msgid":"<6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com>","list_archive_url":null,"date":"2023-03-15T14:24:04","name":"OpenMP: Add omp_in_explicit_task to omp_runtime_api_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com/mbox/"},{"id":70260,"url":"https://patchwork.plctlab.org/api/1.2/patches/70260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBHYLmBGhgu3QDRa@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T14:37:34","name":"[v2] c++: ICE with constexpr lambda [PR107280]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBHYLmBGhgu3QDRa@redhat.com/mbox/"},{"id":70297,"url":"https://patchwork.plctlab.org/api/1.2/patches/70297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com/","msgid":"<952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com>","list_archive_url":null,"date":"2023-03-15T16:14:01","name":"Now gcc-13: [Fwd: [PATCH] gcc-12: Re-enable split-stack support for GNU/Hurd.]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com/mbox/"},{"id":70398,"url":"https://patchwork.plctlab.org/api/1.2/patches/70398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zKDb8AV9dubh6Jqokg_qynXWfVsENxhDd45Nm8bi7oyZQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:29:58","name":"[v2,1/2] libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zKDb8AV9dubh6Jqokg_qynXWfVsENxhDd45Nm8bi7oyZQ@mail.gmail.com/mbox/"},{"id":70399,"url":"https://patchwork.plctlab.org/api/1.2/patches/70399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJQhKdZizesKV8qOR4omMDAJPWQ=exuOFar0iQUuAWWKg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:32:01","name":"[v2,2/2] libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJQhKdZizesKV8qOR4omMDAJPWQ=exuOFar0iQUuAWWKg@mail.gmail.com/mbox/"},{"id":70403,"url":"https://patchwork.plctlab.org/api/1.2/patches/70403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y97FGBKyLbSijcsmP_-AWU5sHtvdfk8nv8ZPfhQhx-zg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:37:40","name":"i386: Fix blend vector permutation for 8-byte modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y97FGBKyLbSijcsmP_-AWU5sHtvdfk8nv8ZPfhQhx-zg@mail.gmail.com/mbox/"},{"id":70408,"url":"https://patchwork.plctlab.org/api/1.2/patches/70408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315194324.1930746-1-iamberkeyavas@gmail.com/","msgid":"<20230315194324.1930746-1-iamberkeyavas@gmail.com>","list_archive_url":null,"date":"2023-03-15T19:43:24","name":"compiler built in is_scalar, use built-in is_scalar in libstdc++ std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315194324.1930746-1-iamberkeyavas@gmail.com/mbox/"},{"id":70446,"url":"https://patchwork.plctlab.org/api/1.2/patches/70446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315211011.2023906-1-iamberkeyavas@gmail.com/","msgid":"<20230315211011.2023906-1-iamberkeyavas@gmail.com>","list_archive_url":null,"date":"2023-03-15T21:10:12","name":"c++, libstdc++: new compiler built in is_scalar, use built-in is_scalar in libstdc++ std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315211011.2023906-1-iamberkeyavas@gmail.com/mbox/"},{"id":70482,"url":"https://patchwork.plctlab.org/api/1.2/patches/70482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222022.3505853-1-dmalcolm@redhat.com/","msgid":"<20230315222022.3505853-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-15T22:20:22","name":"[pushed] diagnostics: attempt to capture crash info in SARIF output [PR109097]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222022.3505853-1-dmalcolm@redhat.com/mbox/"},{"id":70483,"url":"https://patchwork.plctlab.org/api/1.2/patches/70483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222923.846553-1-jason@redhat.com/","msgid":"<20230315222923.846553-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T22:29:23","name":"[pushed] c++: co_await and initializer_list [PR103871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222923.846553-1-jason@redhat.com/mbox/"},{"id":70521,"url":"https://patchwork.plctlab.org/api/1.2/patches/70521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316003211.F054433E4F@hamza.pair.com/","msgid":"<20230316003211.F054433E4F@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T00:32:09","name":"[pushed] maintainer-scripts: Abstract BUGURL in update_web_docs_git","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316003211.F054433E4F@hamza.pair.com/mbox/"},{"id":70534,"url":"https://patchwork.plctlab.org/api/1.2/patches/70534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora60dbig2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-16T01:20:29","name":"[testsuite] test for weak_undefined support and add options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora60dbig2.fsf@lxoliva.fsfla.org/mbox/"},{"id":70535,"url":"https://patchwork.plctlab.org/api/1.2/patches/70535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yb1bi6a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-16T01:26:21","name":"[testsuite] fix array element count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yb1bi6a.fsf@lxoliva.fsfla.org/mbox/"},{"id":70547,"url":"https://patchwork.plctlab.org/api/1.2/patches/70547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316030157.882778-1-jason@redhat.com/","msgid":"<20230316030157.882778-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T03:01:57","name":"[RFC] c++: co_await and move-only type [PR105406]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316030157.882778-1-jason@redhat.com/mbox/"},{"id":70570,"url":"https://patchwork.plctlab.org/api/1.2/patches/70570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com/","msgid":"<86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-16T05:20:21","name":"rs6000: suboptimal code for returning bool value on target ppc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com/mbox/"},{"id":70573,"url":"https://patchwork.plctlab.org/api/1.2/patches/70573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com/","msgid":"<22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-16T05:34:32","name":"[PATCH-1,rs6000] Put constant into pseudo at expand when it needs two insns [PR86106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com/mbox/"},{"id":70575,"url":"https://patchwork.plctlab.org/api/1.2/patches/70575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1dec3a1-1e7b-28ba-ec9b-ca56e6c15c72@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-16T05:34:40","name":"[PATCH-2,rs6000] Put constant into pseudo at expand when it needs two insns [PR86106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1dec3a1-1e7b-28ba-ec9b-ca56e6c15c72@linux.ibm.com/mbox/"},{"id":70671,"url":"https://patchwork.plctlab.org/api/1.2/patches/70671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316085542.171023-1-juzhe.zhong@rivai.ai/","msgid":"<20230316085542.171023-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T08:55:42","name":"RISC-V: Fix bugs reported by @kito","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316085542.171023-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70683,"url":"https://patchwork.plctlab.org/api/1.2/patches/70683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLfsr13dpPoE/ki@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-16T09:21:54","name":"[committed] libcpp: Update Unicode copyright years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLfsr13dpPoE/ki@tucnak/mbox/"},{"id":70684,"url":"https://patchwork.plctlab.org/api/1.2/patches/70684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLgYT5EtdeyWrAM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-16T09:24:49","name":"contrib: Update instructions regarding Unicode updates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLgYT5EtdeyWrAM@tucnak/mbox/"},{"id":70686,"url":"https://patchwork.plctlab.org/api/1.2/patches/70686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093807.176072-1-juzhe.zhong@rivai.ai/","msgid":"<20230316093807.176072-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T09:38:07","name":"ISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093807.176072-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70688,"url":"https://patchwork.plctlab.org/api/1.2/patches/70688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093914.176248-1-juzhe.zhong@rivai.ai/","msgid":"<20230316093914.176248-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T09:39:14","name":"RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093914.176248-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70746,"url":"https://patchwork.plctlab.org/api/1.2/patches/70746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113927.4967-1-tejas.belagod@arm.com/","msgid":"<20230316113927.4967-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-03-16T11:39:27","name":"[PR96339] AArch64: Optimise svlast[ab]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113927.4967-1-tejas.belagod@arm.com/mbox/"},{"id":70745,"url":"https://patchwork.plctlab.org/api/1.2/patches/70745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113935.325393-1-ibuclaw@gdcproject.org/","msgid":"<20230316113935.325393-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-16T11:39:35","name":"[committed] d: Fix closure fields don'\''t get same alignment as local variable [PR109144]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113935.325393-1-ibuclaw@gdcproject.org/mbox/"},{"id":70834,"url":"https://patchwork.plctlab.org/api/1.2/patches/70834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316152706.2214124-1-manolis.tsamis@vrull.eu/","msgid":"<20230316152706.2214124-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-03-16T15:27:06","name":"[v1,RFC] Improve folding for comparisons with zero in tree-ssa-forwprop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316152706.2214124-1-manolis.tsamis@vrull.eu/mbox/"},{"id":70902,"url":"https://patchwork.plctlab.org/api/1.2/patches/70902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316164816.2493686-1-ppalka@redhat.com/","msgid":"<20230316164816.2493686-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-16T16:48:16","name":"c++: ICE with diagnosed constraint recursion [PR100288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316164816.2493686-1-ppalka@redhat.com/mbox/"},{"id":70953,"url":"https://patchwork.plctlab.org/api/1.2/patches/70953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahd+tv3FHJaDWmMvVrqhaSCQnctiQUZdt0vdat+owMtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-16T19:44:23","name":"i386: Robustify vec perm blend functions for TARGET_MMX_WITH_SSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahd+tv3FHJaDWmMvVrqhaSCQnctiQUZdt0vdat+owMtw@mail.gmail.com/mbox/"},{"id":70979,"url":"https://patchwork.plctlab.org/api/1.2/patches/70979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-2-qing.zhao@oracle.com/","msgid":"<20230316214715.604671-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-16T21:47:14","name":"[V5,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-2-qing.zhao@oracle.com/mbox/"},{"id":70980,"url":"https://patchwork.plctlab.org/api/1.2/patches/70980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-3-qing.zhao@oracle.com/","msgid":"<20230316214715.604671-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-16T21:47:15","name":"[V5,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-3-qing.zhao@oracle.com/mbox/"},{"id":70983,"url":"https://patchwork.plctlab.org/api/1.2/patches/70983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316220948.1138021-1-jason@redhat.com/","msgid":"<20230316220948.1138021-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:09:48","name":"[pushed] c++: &enum::enumerator [PR101869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316220948.1138021-1-jason@redhat.com/mbox/"},{"id":70984,"url":"https://patchwork.plctlab.org/api/1.2/patches/70984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221108.1138412-1-jason@redhat.com/","msgid":"<20230316221108.1138412-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:11:08","name":"[pushed] c++: generic lambda, local class, __func__ [PR108242]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221108.1138412-1-jason@redhat.com/mbox/"},{"id":70985,"url":"https://patchwork.plctlab.org/api/1.2/patches/70985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221223.1138825-1-jason@redhat.com/","msgid":"<20230316221223.1138825-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:12:23","name":"[pushed] c++: __func__ and local class DMI [PR105809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221223.1138825-1-jason@redhat.com/mbox/"},{"id":71001,"url":"https://patchwork.plctlab.org/api/1.2/patches/71001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org/","msgid":"<640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org>","list_archive_url":null,"date":"2023-03-16T22:37:41","name":"correct function attribute typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org/mbox/"},{"id":71012,"url":"https://patchwork.plctlab.org/api/1.2/patches/71012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316232658.CA7C133E73@hamza.pair.com/","msgid":"<20230316232658.CA7C133E73@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T23:26:56","name":"[pushed] wwwdocs: onlinedocs: Use the proper name of the Modula-2 manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316232658.CA7C133E73@hamza.pair.com/mbox/"},{"id":71015,"url":"https://patchwork.plctlab.org/api/1.2/patches/71015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316234840.A3B8D33E53@hamza.pair.com/","msgid":"<20230316234840.A3B8D33E53@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T23:48:39","name":"[pushed] wwwdocs: readings: Switch publibfp.dhe.ibm.com to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316234840.A3B8D33E53@hamza.pair.com/mbox/"},{"id":71065,"url":"https://patchwork.plctlab.org/api/1.2/patches/71065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317032722.1548833-1-guojiufu@linux.ibm.com/","msgid":"<20230317032722.1548833-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-03-17T03:27:22","name":"[V3] extract DF/SF/SI/HI/QI subreg from parameter word on stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317032722.1548833-1-guojiufu@linux.ibm.com/mbox/"},{"id":71068,"url":"https://patchwork.plctlab.org/api/1.2/patches/71068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317033952.1549050-1-guojiufu@linux.ibm.com/","msgid":"<20230317033952.1549050-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-03-17T03:39:52","name":"[V5] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317033952.1549050-1-guojiufu@linux.ibm.com/mbox/"},{"id":71069,"url":"https://patchwork.plctlab.org/api/1.2/patches/71069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com/","msgid":"<527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com>","list_archive_url":null,"date":"2023-03-17T04:01:57","name":"[committed] Docs: Fix some too-long lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com/mbox/"},{"id":71070,"url":"https://patchwork.plctlab.org/api/1.2/patches/71070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee967b88-0343-aee6-c8b2-fa5478044aa8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T04:02:04","name":"[committed] Docs: Fix formatting issues in BPF built-ins documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee967b88-0343-aee6-c8b2-fa5478044aa8@codesourcery.com/mbox/"},{"id":71073,"url":"https://patchwork.plctlab.org/api/1.2/patches/71073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317045256.34563-1-ibuclaw@gdcproject.org/","msgid":"<20230317045256.34563-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-17T04:52:56","name":"[committed] d: Merge upstream dmd, druntime 5f7552bb28, phobos 67a47cf39.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317045256.34563-1-ibuclaw@gdcproject.org/mbox/"},{"id":71124,"url":"https://patchwork.plctlab.org/api/1.2/patches/71124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQe+haaKNvzZMw5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:04:10","name":"[committed] openmp: Fix up handling of doacross loops with noreturn body in loops [PR108685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQe+haaKNvzZMw5@tucnak/mbox/"},{"id":71129,"url":"https://patchwork.plctlab.org/api/1.2/patches/71129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQhTHb0CzN5mx/N@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:14:04","name":"c, ubsan: Instrument even shortened divisions [PR109151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQhTHb0CzN5mx/N@tucnak/mbox/"},{"id":71131,"url":"https://patchwork.plctlab.org/api/1.2/patches/71131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQiMc3ZWcPFAAkV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:17:53","name":"testsuite: Fix up forwprop-39.c testcase [PR109145]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQiMc3ZWcPFAAkV@tucnak/mbox/"},{"id":71150,"url":"https://patchwork.plctlab.org/api/1.2/patches/71150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQkoxouS5jRLwv5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:28:19","name":"cgraphclones: Fix up target_clones cloning of functions with vector arguments [PR105554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQkoxouS5jRLwv5@tucnak/mbox/"},{"id":71267,"url":"https://patchwork.plctlab.org/api/1.2/patches/71267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317121833.16A961346F@imap2.suse-dmz.suse.de/","msgid":"<20230317121833.16A961346F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-17T12:18:32","name":"tree-optimization/109170 - bogus use-after-free with __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317121833.16A961346F@imap2.suse-dmz.suse.de/mbox/"},{"id":71282,"url":"https://patchwork.plctlab.org/api/1.2/patches/71282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8324fe0-a8fc-9576-4985-a5b82af3fac0@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T13:10:11","name":"[pushed,PR109052] LRA: Implement combining secondary memory reload and original insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8324fe0-a8fc-9576-4985-a5b82af3fac0@redhat.com/mbox/"},{"id":71331,"url":"https://patchwork.plctlab.org/api/1.2/patches/71331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317152629.3944138-1-ppalka@redhat.com/","msgid":"<20230317152629.3944138-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-17T15:26:29","name":"c++: NTTP constraint depending on outer args [PR109160]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317152629.3944138-1-ppalka@redhat.com/mbox/"},{"id":71378,"url":"https://patchwork.plctlab.org/api/1.2/patches/71378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSnqPiQgZmSLO29@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T17:47:20","name":"tree-inline: Fix up multiversioning with vector arguments [PR105554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSnqPiQgZmSLO29@tucnak/mbox/"},{"id":71379,"url":"https://patchwork.plctlab.org/api/1.2/patches/71379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSoqOLhNMhm4YTo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T17:51:36","name":"c++: Drop TREE_READONLY on vars (possibly) initialized by tls wrapper [PR109164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSoqOLhNMhm4YTo@tucnak/mbox/"},{"id":71390,"url":"https://patchwork.plctlab.org/api/1.2/patches/71390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317184414.1335691-1-jason@redhat.com/","msgid":"<20230317184414.1335691-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T18:44:14","name":"[pushed] c++: namespace-scoped friend in local class [PR69410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317184414.1335691-1-jason@redhat.com/mbox/"},{"id":71426,"url":"https://patchwork.plctlab.org/api/1.2/patches/71426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317202908.42800-1-polacek@redhat.com/","msgid":"<20230317202908.42800-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:29:08","name":"c++: further -Wdangling-reference refinement [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317202908.42800-1-polacek@redhat.com/mbox/"},{"id":71428,"url":"https://patchwork.plctlab.org/api/1.2/patches/71428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317203601.55027-1-jwakely@redhat.com/","msgid":"<20230317203601.55027-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:36:01","name":"[committed] libstdc++: Add const to hash>::operator() [PR109165]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317203601.55027-1-jwakely@redhat.com/mbox/"},{"id":71430,"url":"https://patchwork.plctlab.org/api/1.2/patches/71430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317205349.3635562-1-dmalcolm@redhat.com/","msgid":"<20230317205349.3635562-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:53:49","name":"json: preserve key-insertion order [PR109163]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317205349.3635562-1-dmalcolm@redhat.com/mbox/"},{"id":71440,"url":"https://patchwork.plctlab.org/api/1.2/patches/71440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317213205.1383604-1-jason@redhat.com/","msgid":"<20230317213205.1383604-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T21:32:05","name":"[pushed] c++: throw and private destructor [PR109172]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317213205.1383604-1-jason@redhat.com/mbox/"},{"id":71458,"url":"https://patchwork.plctlab.org/api/1.2/patches/71458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7cc4f143-7033-4551-af8d-b4fbe021637d-1679089003636@3c-app-gmx-bs05/","msgid":"","list_archive_url":null,"date":"2023-03-17T21:36:43","name":"Fortran: procedures with BIND(C) attribute require explicit interface [PR85877]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7cc4f143-7033-4551-af8d-b4fbe021637d-1679089003636@3c-app-gmx-bs05/mbox/"},{"id":71499,"url":"https://patchwork.plctlab.org/api/1.2/patches/71499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d09518ad-277a-b1b7-dda4-1b9782ac022c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T22:35:12","name":"rs6000: Don'\''t ICE when compiling the __builtin_vec_xst_trunc built-in [PR109178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d09518ad-277a-b1b7-dda4-1b9782ac022c@linux.ibm.com/mbox/"},{"id":71520,"url":"https://patchwork.plctlab.org/api/1.2/patches/71520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317233249.1406928-1-jason@redhat.com/","msgid":"<20230317233249.1406928-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T23:32:49","name":"[pushed] c++: constant, array, lambda, template [PR108975]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317233249.1406928-1-jason@redhat.com/mbox/"},{"id":71539,"url":"https://patchwork.plctlab.org/api/1.2/patches/71539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7ea52e2-ba72-aa92-3969-ab52f7d112d6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-18T00:12:24","name":"[committed] lra: Ignore debug insns and notes in combine_reload_insn [PR109179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7ea52e2-ba72-aa92-3969-ab52f7d112d6@linux.ibm.com/mbox/"},{"id":71563,"url":"https://patchwork.plctlab.org/api/1.2/patches/71563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318080405.2799610-1-shorne@gmail.com/","msgid":"<20230318080405.2799610-1-shorne@gmail.com>","list_archive_url":null,"date":"2023-03-18T08:04:05","name":"or1k: Do not clear existing FPU exceptions before updating","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318080405.2799610-1-shorne@gmail.com/mbox/"},{"id":71626,"url":"https://patchwork.plctlab.org/api/1.2/patches/71626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBXUQ06ObKinZSSc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-18T15:09:55","name":"c++, v2: Drop TREE_READONLY on vars (possibly) initialized by tls wrapper [PR109164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBXUQ06ObKinZSSc@tucnak/mbox/"},{"id":71636,"url":"https://patchwork.plctlab.org/api/1.2/patches/71636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318165101.3685516-1-dmalcolm@redhat.com/","msgid":"<20230318165101.3685516-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-18T16:51:01","name":"[pushed] analyzer: fix ICE on certain longjmp calls [PR109094]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318165101.3685516-1-dmalcolm@redhat.com/mbox/"},{"id":71645,"url":"https://patchwork.plctlab.org/api/1.2/patches/71645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0c911ee-4587-10d6-3c75-74538e7623be@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-18T18:23:59","name":"[wwwdocs] Mention random number generators in porting_to.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0c911ee-4587-10d6-3c75-74538e7623be@netcologne.de/mbox/"},{"id":71699,"url":"https://patchwork.plctlab.org/api/1.2/patches/71699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pXL_L9eySWVRCSX68GSqD56A=6DP3vBC1h__FgyuBOJ2g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T04:07:53","name":"c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pXL_L9eySWVRCSX68GSqD56A=6DP3vBC1h__FgyuBOJ2g@mail.gmail.com/mbox/"},{"id":71702,"url":"https://patchwork.plctlab.org/api/1.2/patches/71702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pVYKw0zzseC1H+yKwO5L77S001qcvwgwh80AizD80djOw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T04:21:46","name":"libstdc++: use new built-in trait __is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pVYKw0zzseC1H+yKwO5L77S001qcvwgwh80AizD80djOw@mail.gmail.com/mbox/"},{"id":71721,"url":"https://patchwork.plctlab.org/api/1.2/patches/71721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de/","msgid":"<24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de>","list_archive_url":null,"date":"2023-03-19T08:15:08","name":"[wwwdocs] Mention finalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de/mbox/"},{"id":71722,"url":"https://patchwork.plctlab.org/api/1.2/patches/71722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eee8f01b-7e2c-c465-eaed-226714dc9655@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-19T08:32:45","name":"[fortran,doc] Explicitly mention undefined overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eee8f01b-7e2c-c465-eaed-226714dc9655@netcologne.de/mbox/"},{"id":71748,"url":"https://patchwork.plctlab.org/api/1.2/patches/71748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77f9c93-af16-a548-8d6b-d1954a11f02f@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T11:45:47","name":"[v2] rs6000: suboptimal code for returning bool value on target ppc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77f9c93-af16-a548-8d6b-d1954a11f02f@linux.ibm.com/mbox/"},{"id":71763,"url":"https://patchwork.plctlab.org/api/1.2/patches/71763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+m3Wd5z58BNng9_ftjiet5E=4TC3VsCZ_FopBbBZM=og@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T12:04:25","name":"[fortran] PR87127 - External function not recognised from within an associate block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+m3Wd5z58BNng9_ftjiet5E=4TC3VsCZ_FopBbBZM=og@mail.gmail.com/mbox/"},{"id":71836,"url":"https://patchwork.plctlab.org/api/1.2/patches/71836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ece2c4f5-6f01-3689-1c58-d6367dbabae0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T17:20:49","name":"[testsuite] rs6000: suboptimal code for returning bool value on target ppc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ece2c4f5-6f01-3689-1c58-d6367dbabae0@linux.ibm.com/mbox/"},{"id":71865,"url":"https://patchwork.plctlab.org/api/1.2/patches/71865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pWf_bYyeZcecrV=kmG_e6McD+JJPZuHJ2R2XeqJue6Wfw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T20:21:01","name":"c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pWf_bYyeZcecrV=kmG_e6McD+JJPZuHJ2R2XeqJue6Wfw@mail.gmail.com/mbox/"},{"id":71868,"url":"https://patchwork.plctlab.org/api/1.2/patches/71868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ff90764-385c-47bf-bc00-27d0f13bbbad-1679258653969@3c-app-gmx-bs65/","msgid":"","list_archive_url":null,"date":"2023-03-19T20:44:14","name":"Fortran: simplification of NEAREST for large argument [PR109186]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ff90764-385c-47bf-bc00-27d0f13bbbad-1679258653969@3c-app-gmx-bs65/mbox/"},{"id":71938,"url":"https://patchwork.plctlab.org/api/1.2/patches/71938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pW_2+9XTYMWEVHDyU8BKBpQEuGTkwmYVr+dcwUtzHVgsw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T02:53:19","name":"libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pW_2+9XTYMWEVHDyU8BKBpQEuGTkwmYVr+dcwUtzHVgsw@mail.gmail.com/mbox/"},{"id":71969,"url":"https://patchwork.plctlab.org/api/1.2/patches/71969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320042915.140622-1-juzhe.zhong@rivai.ai/","msgid":"<20230320042915.140622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-20T04:29:15","name":"RISC-V: Fix RVV ICE && runtine fail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320042915.140622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":71997,"url":"https://patchwork.plctlab.org/api/1.2/patches/71997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DHPmR-Rs2vT4hbq0pvPsbMthqpFPtfJ6GAUHhWxf31mLg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T06:07:52","name":"fix for __sanitizer_struct_mallinfo with mallinfo2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DHPmR-Rs2vT4hbq0pvPsbMthqpFPtfJ6GAUHhWxf31mLg@mail.gmail.com/mbox/"},{"id":72001,"url":"https://patchwork.plctlab.org/api/1.2/patches/72001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com/","msgid":"<928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:02","name":"[RFC/PATCH] sched: Consider debug insn in no_real_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com/mbox/"},{"id":72003,"url":"https://patchwork.plctlab.org/api/1.2/patches/72003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com/","msgid":"<65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:31","name":"[v3] rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com/mbox/"},{"id":72005,"url":"https://patchwork.plctlab.org/api/1.2/patches/72005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com/","msgid":"<1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:49","name":"rs6000: Ensure vec_sld shift count in allowable range [PR109082]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com/mbox/"},{"id":72006,"url":"https://patchwork.plctlab.org/api/1.2/patches/72006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com/","msgid":"<9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:32:15","name":"rs6000: Make _mm_slli_si128 and _mm_bslli_si128 consistent [PR109167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com/mbox/"},{"id":72007,"url":"https://patchwork.plctlab.org/api/1.2/patches/72007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com/","msgid":"<050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:33:13","name":"libgcc: Use initarray section type for .init_stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com/mbox/"},{"id":72020,"url":"https://patchwork.plctlab.org/api/1.2/patches/72020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pUMO-RG5TjMDKVVxWQn194gPDs4ub7FoTYn6LO_rsFymQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T07:44:59","name":"c++: implement __add_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pUMO-RG5TjMDKVVxWQn194gPDs4ub7FoTYn6LO_rsFymQ@mail.gmail.com/mbox/"},{"id":72048,"url":"https://patchwork.plctlab.org/api/1.2/patches/72048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320093629.15801-1-jwakely@redhat.com/","msgid":"<20230320093629.15801-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-20T09:36:29","name":"[committed] libstdc++: Remove template-head from std::expected ctor [PR109182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320093629.15801-1-jwakely@redhat.com/mbox/"},{"id":72145,"url":"https://patchwork.plctlab.org/api/1.2/patches/72145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-1-kmatsui@cs.washington.edu/","msgid":"<20230320131444.7505-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T13:14:43","name":"[1/2] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-1-kmatsui@cs.washington.edu/mbox/"},{"id":72146,"url":"https://patchwork.plctlab.org/api/1.2/patches/72146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-2-kmatsui@cs.washington.edu/","msgid":"<20230320131444.7505-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T13:14:44","name":"[2/2] libstdc++: use new built-in trait __is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-2-kmatsui@cs.washington.edu/mbox/"},{"id":72231,"url":"https://patchwork.plctlab.org/api/1.2/patches/72231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320155508.28497-1-polacek@redhat.com/","msgid":"<20230320155508.28497-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-20T15:55:08","name":"c++: explicit ctor and list-initialization [PR109159]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320155508.28497-1-polacek@redhat.com/mbox/"},{"id":72424,"url":"https://patchwork.plctlab.org/api/1.2/patches/72424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXY24C2b_eOZ0qZ56zWZKM5fTd9Au1cdde-A+z+Fv47Mw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T19:37:19","name":"Add notes for Go to gcc 12 and 13 changes file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXY24C2b_eOZ0qZ56zWZKM5fTd9Au1cdde-A+z+Fv47Mw@mail.gmail.com/mbox/"},{"id":72427,"url":"https://patchwork.plctlab.org/api/1.2/patches/72427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com/","msgid":"<9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com>","list_archive_url":null,"date":"2023-03-20T19:46:32","name":"stor-layout: Set TYPE_TYPELESS_STORAGE consistently for type variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com/mbox/"},{"id":72434,"url":"https://patchwork.plctlab.org/api/1.2/patches/72434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5a332952-25e6-4b5c-a5bc-51eeaee1b8af-1679342707586@3c-app-gmx-bs21/","msgid":"","list_archive_url":null,"date":"2023-03-20T20:05:07","name":"Fortran: fix documentation of -fno-underscoring [PR109216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5a332952-25e6-4b5c-a5bc-51eeaee1b8af-1679342707586@3c-app-gmx-bs21/mbox/"},{"id":72447,"url":"https://patchwork.plctlab.org/api/1.2/patches/72447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe491b4b-66a9-4d21-b8b1-9af4b907aa10-1679345864578@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-03-20T20:57:44","name":"Fortran: reject MODULE PROCEDURE outside generic module interface [PR99036]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe491b4b-66a9-4d21-b8b1-9af4b907aa10-1679345864578@3c-app-gmx-bap50/mbox/"},{"id":72491,"url":"https://patchwork.plctlab.org/api/1.2/patches/72491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320220625.3877024-1-dmalcolm@redhat.com/","msgid":"<20230320220625.3877024-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-20T22:06:25","name":"testsuite: always use UTF-8 in scan-sarif-file[-not] [PR105959]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320220625.3877024-1-dmalcolm@redhat.com/mbox/"},{"id":72492,"url":"https://patchwork.plctlab.org/api/1.2/patches/72492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBjY/ONm2xjNEped@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T22:06:52","name":"[v2] c++: further -Wdangling-reference refinement [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBjY/ONm2xjNEped@redhat.com/mbox/"},{"id":72505,"url":"https://patchwork.plctlab.org/api/1.2/patches/72505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-1-kmatsui@cs.washington.edu/","msgid":"<20230320222249.20069-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T22:22:48","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-1-kmatsui@cs.washington.edu/mbox/"},{"id":72506,"url":"https://patchwork.plctlab.org/api/1.2/patches/72506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-2-kmatsui@cs.washington.edu/","msgid":"<20230320222249.20069-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T22:22:49","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-2-kmatsui@cs.washington.edu/mbox/"},{"id":72517,"url":"https://patchwork.plctlab.org/api/1.2/patches/72517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320230416.144993-1-jwakely@redhat.com/","msgid":"<20230320230416.144993-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-20T23:04:16","name":"[committed] libstdc++: Fix formatting in std::filesystem helper function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320230416.144993-1-jwakely@redhat.com/mbox/"},{"id":72709,"url":"https://patchwork.plctlab.org/api/1.2/patches/72709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6ba084-3b72-7ae9-1cb3-9a3ad889eaf8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T06:29:50","name":"[PATCHv4,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6ba084-3b72-7ae9-1cb3-9a3ad889eaf8@linux.ibm.com/mbox/"},{"id":72734,"url":"https://patchwork.plctlab.org/api/1.2/patches/72734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321073849.21470-1-zhusonghe@eswincomputing.com/","msgid":"<20230321073849.21470-1-zhusonghe@eswincomputing.com>","list_archive_url":null,"date":"2023-03-21T07:38:49","name":"RISC-V: Fix loss of function to script '\''multilib-generator'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321073849.21470-1-zhusonghe@eswincomputing.com/mbox/"},{"id":72749,"url":"https://patchwork.plctlab.org/api/1.2/patches/72749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBlpWhnv6NXCrESh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T08:22:50","name":"tree: Fix up component_ref_sam_type handling of arrays of 0 sized elements [PR109215]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBlpWhnv6NXCrESh@tucnak/mbox/"},{"id":72782,"url":"https://patchwork.plctlab.org/api/1.2/patches/72782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12217370.T7Z3S40VBb@minbar/","msgid":"<12217370.T7Z3S40VBb@minbar>","list_archive_url":null,"date":"2023-03-21T09:23:01","name":"[1/2] libstdc++: Fix simd test compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12217370.T7Z3S40VBb@minbar/mbox/"},{"id":72783,"url":"https://patchwork.plctlab.org/api/1.2/patches/72783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25835488.EfDdHjke4D@minbar/","msgid":"<25835488.EfDdHjke4D@minbar>","list_archive_url":null,"date":"2023-03-21T09:23:10","name":"[2/2] libstdc++: Fix simd compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25835488.EfDdHjke4D@minbar/mbox/"},{"id":72811,"url":"https://patchwork.plctlab.org/api/1.2/patches/72811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-1-kmatsui@cs.washington.edu/","msgid":"<20230321111056.78121-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T11:10:55","name":"[1/2] c++: implement __add_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-1-kmatsui@cs.washington.edu/mbox/"},{"id":72810,"url":"https://patchwork.plctlab.org/api/1.2/patches/72810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-2-kmatsui@cs.washington.edu/","msgid":"<20230321111056.78121-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T11:10:56","name":"[2/2] libstdc++: use new built-in trait __add_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-2-kmatsui@cs.washington.edu/mbox/"},{"id":72835,"url":"https://patchwork.plctlab.org/api/1.2/patches/72835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com/","msgid":"<0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com>","list_archive_url":null,"date":"2023-03-21T12:10:04","name":"[V2,rs6000] Tweak modulo define_insns to eliminate register copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com/mbox/"},{"id":72837,"url":"https://patchwork.plctlab.org/api/1.2/patches/72837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmfsIQsseeBxUj/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T12:14:40","name":"testsuite: Fix up vect-simd-clone1[678]*.c tests [PR108898]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmfsIQsseeBxUj/@tucnak/mbox/"},{"id":72852,"url":"https://patchwork.plctlab.org/api/1.2/patches/72852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmnD+dfYKuh489q@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T12:46:07","name":"[jakub@redhat.com:,Re:,[PATCH] testsuite: Fix up vect-simd-clone1[678]*.c tests [PR108898]]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmnD+dfYKuh489q@tucnak/mbox/"},{"id":72856,"url":"https://patchwork.plctlab.org/api/1.2/patches/72856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321130409.E34FE13440@imap2.suse-dmz.suse.de/","msgid":"<20230321130409.E34FE13440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-21T13:04:09","name":"tree-optimization/109219 - avoid looking at STMT_SLP_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321130409.E34FE13440@imap2.suse-dmz.suse.de/mbox/"},{"id":72871,"url":"https://patchwork.plctlab.org/api/1.2/patches/72871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af3ada93-10cd-87e3-5836-045819d88090@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T13:42:56","name":"amdgcn: Add accumulator VGPR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af3ada93-10cd-87e3-5836-045819d88090@codesourcery.com/mbox/"},{"id":72872,"url":"https://patchwork.plctlab.org/api/1.2/patches/72872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df4f1039-c686-2155-cfee-6abefa8c8064@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T13:43:17","name":"PR tree-optimization/109192 - Terminate GORI calculations if a relation is not relevant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df4f1039-c686-2155-cfee-6abefa8c8064@redhat.com/mbox/"},{"id":72897,"url":"https://patchwork.plctlab.org/api/1.2/patches/72897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-1-kmatsui@cs.washington.edu/","msgid":"<20230321142159.86694-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T14:21:58","name":"[1/2] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-1-kmatsui@cs.washington.edu/mbox/"},{"id":72901,"url":"https://patchwork.plctlab.org/api/1.2/patches/72901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-2-kmatsui@cs.washington.edu/","msgid":"<20230321142159.86694-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T14:21:59","name":"[2/2] libstdc++: use new built-in trait __is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-2-kmatsui@cs.washington.edu/mbox/"},{"id":72909,"url":"https://patchwork.plctlab.org/api/1.2/patches/72909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321150844.1983244-1-jason@redhat.com/","msgid":"<20230321150844.1983244-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-21T15:08:44","name":"[pushed] c++: DMI in template with virtual base [PR106890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321150844.1983244-1-jason@redhat.com/mbox/"},{"id":72916,"url":"https://patchwork.plctlab.org/api/1.2/patches/72916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321153805.9120E2040E@pchp3.se.axis.com/","msgid":"<20230321153805.9120E2040E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-21T15:38:05","name":"testsuite: Compile-only gcc.dg/tree-ssa/pr100359.c if ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321153805.9120E2040E@pchp3.se.axis.com/mbox/"},{"id":72926,"url":"https://patchwork.plctlab.org/api/1.2/patches/72926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0ti9k3o.fsf@euler.schwinge.homeip.net/","msgid":"<87r0ti9k3o.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-21T15:53:31","name":"libgomp: Simplify OpenMP reverse offload host <-> device memory copy implementation (was: [Patch] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0ti9k3o.fsf@euler.schwinge.homeip.net/mbox/"},{"id":72938,"url":"https://patchwork.plctlab.org/api/1.2/patches/72938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-1-kmatsui@cs.washington.edu/","msgid":"<20230321163949.1950-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T16:39:48","name":"[1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-1-kmatsui@cs.washington.edu/mbox/"},{"id":72939,"url":"https://patchwork.plctlab.org/api/1.2/patches/72939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-2-kmatsui@cs.washington.edu/","msgid":"<20230321163949.1950-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T16:39:49","name":"[2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-2-kmatsui@cs.washington.edu/mbox/"},{"id":72941,"url":"https://patchwork.plctlab.org/api/1.2/patches/72941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620BB0C1D1D2ED13BCE6CA9AC819@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-03-21T16:50:42","name":"[v2] libstdc++: Fix handling of surrogate CP in codecvt [PR108976]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620BB0C1D1D2ED13BCE6CA9AC819@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":72942,"url":"https://patchwork.plctlab.org/api/1.2/patches/72942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27030948.6Emhk5qWAg@minbar/","msgid":"<27030948.6Emhk5qWAg@minbar>","list_archive_url":null,"date":"2023-03-21T17:01:22","name":"[committed] libstdc++: Fix simd compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27030948.6Emhk5qWAg@minbar/mbox/"},{"id":72943,"url":"https://patchwork.plctlab.org/api/1.2/patches/72943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7568297.R56niFO833@minbar/","msgid":"<7568297.R56niFO833@minbar>","list_archive_url":null,"date":"2023-03-21T17:05:18","name":"libstdc++: Skip integer division optimization for Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7568297.R56niFO833@minbar/mbox/"},{"id":72944,"url":"https://patchwork.plctlab.org/api/1.2/patches/72944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5914330.taCxCBeP46@minbar/","msgid":"<5914330.taCxCBeP46@minbar>","list_archive_url":null,"date":"2023-03-21T17:05:23","name":"libstdc++: Use more precise __RECIPROCAL_MATH__ macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5914330.taCxCBeP46@minbar/mbox/"},{"id":72946,"url":"https://patchwork.plctlab.org/api/1.2/patches/72946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170700.4153-1-kmatsui@cs.washington.edu/","msgid":"<20230321170700.4153-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T17:06:59","name":"[v2,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170700.4153-1-kmatsui@cs.washington.edu/mbox/"},{"id":72948,"url":"https://patchwork.plctlab.org/api/1.2/patches/72948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170851.4277-2-kmatsui@cs.washington.edu/","msgid":"<20230321170851.4277-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T17:08:51","name":"[v2,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170851.4277-2-kmatsui@cs.washington.edu/mbox/"},{"id":73010,"url":"https://patchwork.plctlab.org/api/1.2/patches/73010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rfpx5z3.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-21T19:24:48","name":"[wwwdocs] Document support for znver4 in gcc-13/changes.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rfpx5z3.fsf@suse.cz/mbox/"},{"id":73097,"url":"https://patchwork.plctlab.org/api/1.2/patches/73097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-1-kmatsui@cs.washington.edu/","msgid":"<20230321223957.7176-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T22:39:56","name":"[1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-1-kmatsui@cs.washington.edu/mbox/"},{"id":73099,"url":"https://patchwork.plctlab.org/api/1.2/patches/73099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-2-kmatsui@cs.washington.edu/","msgid":"<20230321223957.7176-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T22:39:57","name":"[2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-2-kmatsui@cs.washington.edu/mbox/"},{"id":73112,"url":"https://patchwork.plctlab.org/api/1.2/patches/73112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBpDaXeXCMBNxNWk@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-21T23:53:13","name":"PR target/105325, Make load/cmp fusion know about prefixed loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBpDaXeXCMBNxNWk@toto.the-meissners.org/mbox/"},{"id":73113,"url":"https://patchwork.plctlab.org/api/1.2/patches/73113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-1-kmatsui@cs.washington.edu/","msgid":"<20230322001142.13422-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T00:11:41","name":"[1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-1-kmatsui@cs.washington.edu/mbox/"},{"id":73114,"url":"https://patchwork.plctlab.org/api/1.2/patches/73114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-2-kmatsui@cs.washington.edu/","msgid":"<20230322001142.13422-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T00:11:42","name":"[2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-2-kmatsui@cs.washington.edu/mbox/"},{"id":73144,"url":"https://patchwork.plctlab.org/api/1.2/patches/73144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com/","msgid":"<527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com>","list_archive_url":null,"date":"2023-03-22T01:40:59","name":"[V2] Docs, OpenMP: Correct internal documentation of OMP_FOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com/mbox/"},{"id":73162,"url":"https://patchwork.plctlab.org/api/1.2/patches/73162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322024956.74271-1-juzhe.zhong@rivai.ai/","msgid":"<20230322024956.74271-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T02:49:56","name":"RISC-V: Fix ICE in LRA for LMUL < 1 vector spillings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322024956.74271-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73163,"url":"https://patchwork.plctlab.org/api/1.2/patches/73163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322025701.3369256-1-hongtao.liu@intel.com/","msgid":"<20230322025701.3369256-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-22T02:57:01","name":"Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it'\''s not used anymore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322025701.3369256-1-hongtao.liu@intel.com/mbox/"},{"id":73192,"url":"https://patchwork.plctlab.org/api/1.2/patches/73192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050330.31903-1-shiyulong@iscas.ac.cn/","msgid":"<20230322050330.31903-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-22T05:03:30","name":"[V3] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050330.31903-1-shiyulong@iscas.ac.cn/mbox/"},{"id":73193,"url":"https://patchwork.plctlab.org/api/1.2/patches/73193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050623.229416-1-juzhe.zhong@rivai.ai/","msgid":"<20230322050623.229416-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T05:06:23","name":"RISC-V: Fix PR109228","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050623.229416-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73337,"url":"https://patchwork.plctlab.org/api/1.2/patches/73337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6422fead-a964-5497-2422-510acf753a4d@codesourcery.com/","msgid":"<6422fead-a964-5497-2422-510acf753a4d@codesourcery.com>","list_archive_url":null,"date":"2023-03-22T09:59:28","name":"[committed] MAINTAINERS: Add myself as OpenMP and libgomp maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6422fead-a964-5497-2422-510acf753a4d@codesourcery.com/mbox/"},{"id":73338,"url":"https://patchwork.plctlab.org/api/1.2/patches/73338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100240.DDC59385735E@sourceware.org/","msgid":"<20230322100240.DDC59385735E@sourceware.org>","list_archive_url":null,"date":"2023-03-22T10:01:54","name":"rtl-optimization/109237 - quadraticness in delete_trivially_dead_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100240.DDC59385735E@sourceware.org/mbox/"},{"id":73339,"url":"https://patchwork.plctlab.org/api/1.2/patches/73339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100435.ECD873858416@sourceware.org/","msgid":"<20230322100435.ECD873858416@sourceware.org>","list_archive_url":null,"date":"2023-03-22T10:03:42","name":"rtl-optimization/109237 - speedup bb_is_just_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100435.ECD873858416@sourceware.org/mbox/"},{"id":73341,"url":"https://patchwork.plctlab.org/api/1.2/patches/73341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrVY9tS995rgIVj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-22T10:16:03","name":"match.pd: Fix up fneg/fadd simplification [PR109230]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrVY9tS995rgIVj@tucnak/mbox/"},{"id":73342,"url":"https://patchwork.plctlab.org/api/1.2/patches/73342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322104230.343644-1-jwakely@redhat.com/","msgid":"<20230322104230.343644-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T10:42:30","name":"wwwdocs: Clarify experimental status of C++17 prior to GCC 9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322104230.343644-1-jwakely@redhat.com/mbox/"},{"id":73370,"url":"https://patchwork.plctlab.org/api/1.2/patches/73370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrnTg7r6/KAceFW@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T11:32:30","name":"c++: Avoid duplicate diagnostic calling unavailable function [PR109177]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrnTg7r6/KAceFW@arm.com/mbox/"},{"id":73397,"url":"https://patchwork.plctlab.org/api/1.2/patches/73397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322121556.94496-1-juzhe.zhong@rivai.ai/","msgid":"<20230322121556.94496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T12:15:56","name":"RISC-V: Fix redundant vmv1r.v instruction in vmsge.vx codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322121556.94496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73400,"url":"https://patchwork.plctlab.org/api/1.2/patches/73400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322123036.8709B385B519@sourceware.org/","msgid":"<20230322123036.8709B385B519@sourceware.org>","list_archive_url":null,"date":"2023-03-22T12:29:52","name":"tree-optimization/109237 - last_stmt is possibly slow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322123036.8709B385B519@sourceware.org/mbox/"},{"id":73402,"url":"https://patchwork.plctlab.org/api/1.2/patches/73402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322124341.3976040-1-dmalcolm@redhat.com/","msgid":"<20230322124341.3976040-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-22T12:43:41","name":"[pushed] analyzer: fix false +ves from -Wanalyzer-deref-before-check due to inlining [PR109239]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322124341.3976040-1-dmalcolm@redhat.com/mbox/"},{"id":73511,"url":"https://patchwork.plctlab.org/api/1.2/patches/73511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322160448.2494466-1-jason@redhat.com/","msgid":"<20230322160448.2494466-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-22T16:04:48","name":"[pushed] c++: attribute on dtor in template [PR108795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322160448.2494466-1-jason@redhat.com/mbox/"},{"id":73582,"url":"https://patchwork.plctlab.org/api/1.2/patches/73582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb0f104a-ee16-0692-c0a1-f0c1c8b4ba8d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T17:37:39","name":"[pushed,PR109137] LRA: Do not repeat inheritance and live range splitting in case of asm error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb0f104a-ee16-0692-c0a1-f0c1c8b4ba8d@redhat.com/mbox/"},{"id":73591,"url":"https://patchwork.plctlab.org/api/1.2/patches/73591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174942.407933-1-jwakely@redhat.com/","msgid":"<20230322174942.407933-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:42","name":"[committed] libstdc++: Make std::istream_iterator copy ctor constexpr (LWG 3600)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174942.407933-1-jwakely@redhat.com/mbox/"},{"id":73589,"url":"https://patchwork.plctlab.org/api/1.2/patches/73589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174947.407957-1-jwakely@redhat.com/","msgid":"<20230322174947.407957-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:47","name":"[committed] libstdc++: Add allocator-extended constructors to std::match_results (LWG 2195)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174947.407957-1-jwakely@redhat.com/mbox/"},{"id":73588,"url":"https://patchwork.plctlab.org/api/1.2/patches/73588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174952.407973-1-jwakely@redhat.com/","msgid":"<20230322174952.407973-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:52","name":"[committed] libstdc++: Add comment to (LWG 3720)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174952.407973-1-jwakely@redhat.com/mbox/"},{"id":73590,"url":"https://patchwork.plctlab.org/api/1.2/patches/73590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174958.407987-1-jwakely@redhat.com/","msgid":"<20230322174958.407987-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:58","name":"[committed] libstdc++: Use rvalues in std::string::resize_and_overwrite (LWG 3645)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174958.407987-1-jwakely@redhat.com/mbox/"},{"id":73592,"url":"https://patchwork.plctlab.org/api/1.2/patches/73592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175003.408005-1-jwakely@redhat.com/","msgid":"<20230322175003.408005-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:03","name":"[committed] libstdc++: Add missing __cpp_lib_format macro to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175003.408005-1-jwakely@redhat.com/mbox/"},{"id":73595,"url":"https://patchwork.plctlab.org/api/1.2/patches/73595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175016.408028-1-jwakely@redhat.com/","msgid":"<20230322175016.408028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:16","name":"[committed] libstdc++: Define __cpp_lib_constexpr_algorithms in (LWG 3792)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175016.408028-1-jwakely@redhat.com/mbox/"},{"id":73596,"url":"https://patchwork.plctlab.org/api/1.2/patches/73596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175026.408061-1-jwakely@redhat.com/","msgid":"<20230322175026.408061-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:26","name":"[committed] libstdc++: Remove std::formatter specialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175026.408061-1-jwakely@redhat.com/mbox/"},{"id":73611,"url":"https://patchwork.plctlab.org/api/1.2/patches/73611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7df2d884-20c1-4801-a213-d2e676f4dafd-1679509823088@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2023-03-22T18:30:23","name":"[committed] Fortran: improve checking of FINAL subroutine arguments [PR104572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7df2d884-20c1-4801-a213-d2e676f4dafd-1679509823088@3c-app-gmx-bap55/mbox/"},{"id":73638,"url":"https://patchwork.plctlab.org/api/1.2/patches/73638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322193016.2560128-1-jason@redhat.com/","msgid":"<20230322193016.2560128-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-22T19:30:16","name":"[pushed] c++: array bound partial ordering [PR108390]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322193016.2560128-1-jason@redhat.com/mbox/"},{"id":73652,"url":"https://patchwork.plctlab.org/api/1.2/patches/73652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWM7GsJ_tvAFbjdCaqBWcHUdck_zGgXKG+k-hV_TqsZcQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T19:58:41","name":"Go patch committed: Add missing Slice_info_expression::do_traverse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWM7GsJ_tvAFbjdCaqBWcHUdck_zGgXKG+k-hV_TqsZcQ@mail.gmail.com/mbox/"},{"id":73693,"url":"https://patchwork.plctlab.org/api/1.2/patches/73693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322232709.457972-1-jwakely@redhat.com/","msgid":"<20230322232709.457972-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T23:27:09","name":"[committed] libstdc++: Fix assigning nullptr to std::atomic> (LWG 3893)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322232709.457972-1-jwakely@redhat.com/mbox/"},{"id":73697,"url":"https://patchwork.plctlab.org/api/1.2/patches/73697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-1-kmatsui@cs.washington.edu/","msgid":"<20230322234134.14578-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T23:41:33","name":"[1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-1-kmatsui@cs.washington.edu/mbox/"},{"id":73698,"url":"https://patchwork.plctlab.org/api/1.2/patches/73698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-2-kmatsui@cs.washington.edu/","msgid":"<20230322234134.14578-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T23:41:34","name":"[2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-2-kmatsui@cs.washington.edu/mbox/"},{"id":73729,"url":"https://patchwork.plctlab.org/api/1.2/patches/73729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004122.34600-1-kmatsui@cs.washington.edu/","msgid":"<20230323004122.34600-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T00:41:21","name":"[v2,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004122.34600-1-kmatsui@cs.washington.edu/mbox/"},{"id":73730,"url":"https://patchwork.plctlab.org/api/1.2/patches/73730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004207.34784-2-kmatsui@cs.washington.edu/","msgid":"<20230323004207.34784-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T00:42:07","name":"[v2,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004207.34784-2-kmatsui@cs.washington.edu/mbox/"},{"id":73747,"url":"https://patchwork.plctlab.org/api/1.2/patches/73747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323020458.54515-1-kmatsui@cs.washington.edu/","msgid":"<20230323020458.54515-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T02:04:58","name":"libstdc++: use __bool_constant instead of integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323020458.54515-1-kmatsui@cs.washington.edu/mbox/"},{"id":73758,"url":"https://patchwork.plctlab.org/api/1.2/patches/73758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfdwma90.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-23T03:12:27","name":"[v2,#1/2] enable adjustment of return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfdwma90.fsf@lxoliva.fsfla.org/mbox/"},{"id":73759,"url":"https://patchwork.plctlab.org/api/1.2/patches/73759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7okma45.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-23T03:15:22","name":"[v2,#2/2,rs6000] adjust return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7okma45.fsf@lxoliva.fsfla.org/mbox/"},{"id":73760,"url":"https://patchwork.plctlab.org/api/1.2/patches/73760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323032355.2678239-1-jason@redhat.com/","msgid":"<20230323032355.2678239-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T03:23:55","name":"[pushed] c++: local class in nested generic lambda [PR109241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323032355.2678239-1-jason@redhat.com/mbox/"},{"id":73804,"url":"https://patchwork.plctlab.org/api/1.2/patches/73804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323051151.2982138-1-kevinl@rivosinc.com/","msgid":"<20230323051151.2982138-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-03-23T05:11:51","name":"[RFC] vect: verify that nelt is greater than one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323051151.2982138-1-kevinl@rivosinc.com/mbox/"},{"id":73883,"url":"https://patchwork.plctlab.org/api/1.2/patches/73883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323080734.423-1-jinma@linux.alibaba.com/","msgid":"<20230323080734.423-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-03-23T08:07:34","name":"In the ready lists of pipeline, put unrecog insns (such as CLOBBER, USE) at the latest to issue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323080734.423-1-jinma@linux.alibaba.com/mbox/"},{"id":73893,"url":"https://patchwork.plctlab.org/api/1.2/patches/73893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBwOTvM4REORW9kQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-23T08:31:10","name":"tree-vect-generic: Fix up expand_vector_condition [PR109176]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBwOTvM4REORW9kQ@tucnak/mbox/"},{"id":73933,"url":"https://patchwork.plctlab.org/api/1.2/patches/73933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com/","msgid":"<0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T09:28:26","name":"[v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com/mbox/"},{"id":73964,"url":"https://patchwork.plctlab.org/api/1.2/patches/73964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cv7vkxc.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-23T10:09:19","name":"ipa: Avoid another ICE when dealing with type-incompatibilities (PR 108959)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cv7vkxc.fsf@suse.cz/mbox/"},{"id":73980,"url":"https://patchwork.plctlab.org/api/1.2/patches/73980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com/","msgid":"<4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com>","list_archive_url":null,"date":"2023-03-23T10:38:32","name":"rtl-optimization: ppc backend generates unnecessary signed extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com/mbox/"},{"id":73999,"url":"https://patchwork.plctlab.org/api/1.2/patches/73999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323110608.42262-1-kmatsui@cs.washington.edu/","msgid":"<20230323110608.42262-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T11:06:08","name":"libstdc++: use __bool_constant instead of integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323110608.42262-1-kmatsui@cs.washington.edu/mbox/"},{"id":74009,"url":"https://patchwork.plctlab.org/api/1.2/patches/74009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db0a824f-d244-a3bc-6ffd-2dc87b6635db@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-23T11:32:20","name":"[committed] amdgcn: vec_extract no-op insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db0a824f-d244-a3bc-6ffd-2dc87b6635db@codesourcery.com/mbox/"},{"id":74015,"url":"https://patchwork.plctlab.org/api/1.2/patches/74015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com/","msgid":"<3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T11:47:41","name":"[committed] amdgcn: Fix register size bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com/mbox/"},{"id":74063,"url":"https://patchwork.plctlab.org/api/1.2/patches/74063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95180085-897F-4B87-BE0E-78ACF1808326@oracle.com/","msgid":"<95180085-897F-4B87-BE0E-78ACF1808326@oracle.com>","list_archive_url":null,"date":"2023-03-23T13:03:45","name":"[V5,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95180085-897F-4B87-BE0E-78ACF1808326@oracle.com/mbox/"},{"id":74065,"url":"https://patchwork.plctlab.org/api/1.2/patches/74065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C8A44F64-E794-4BC2-9CDF-16549EF0BD8B@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-03-23T13:05:16","name":"[V5,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C8A44F64-E794-4BC2-9CDF-16549EF0BD8B@oracle.com/mbox/"},{"id":74071,"url":"https://patchwork.plctlab.org/api/1.2/patches/74071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBxU3ojbATAS1RNX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-23T13:32:14","name":"ranger: Ranger meets aspell","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBxU3ojbATAS1RNX@tucnak/mbox/"},{"id":74080,"url":"https://patchwork.plctlab.org/api/1.2/patches/74080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com/","msgid":"<8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T13:41:15","name":"[OG12,committed] Fortran: Add attr.class_ok check for generate_callback_wrapper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com/mbox/"},{"id":74091,"url":"https://patchwork.plctlab.org/api/1.2/patches/74091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2623454.BddDVKsqQX@fomalhaut/","msgid":"<2623454.BddDVKsqQX@fomalhaut>","list_archive_url":null,"date":"2023-03-23T14:14:11","name":"(testsuite] Skip gnat.dg/div_zero.adb on Aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2623454.BddDVKsqQX@fomalhaut/mbox/"},{"id":74097,"url":"https://patchwork.plctlab.org/api/1.2/patches/74097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323150055.2694558-1-ppalka@redhat.com/","msgid":"<20230323150055.2694558-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T15:00:55","name":"c++: outer '\''this'\'' leaking into local class [PR106969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323150055.2694558-1-ppalka@redhat.com/mbox/"},{"id":74102,"url":"https://patchwork.plctlab.org/api/1.2/patches/74102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323153505.0E8A313596@imap2.suse-dmz.suse.de/","msgid":"<20230323153505.0E8A313596@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T15:35:04","name":"tree-optimization/109262 - ICE with non-call EH and forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323153505.0E8A313596@imap2.suse-dmz.suse.de/mbox/"},{"id":74105,"url":"https://patchwork.plctlab.org/api/1.2/patches/74105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323160030.02D4813596@imap2.suse-dmz.suse.de/","msgid":"<20230323160030.02D4813596@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T16:00:29","name":"lto/109263 - lto-wrapper and -g0 -ggdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323160030.02D4813596@imap2.suse-dmz.suse.de/mbox/"},{"id":74108,"url":"https://patchwork.plctlab.org/api/1.2/patches/74108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323162146.791FA132C2@imap2.suse-dmz.suse.de/","msgid":"<20230323162146.791FA132C2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T16:21:46","name":"tree-optimization/107569 - avoid wrecking earlier folding in FRE/PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323162146.791FA132C2@imap2.suse-dmz.suse.de/mbox/"},{"id":74129,"url":"https://patchwork.plctlab.org/api/1.2/patches/74129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323172557.3415682-1-apinski@marvell.com/","msgid":"<20230323172557.3415682-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-23T17:25:57","name":"c: [PR84900] cast of compound literal does not cause the code to become a non-lvalue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323172557.3415682-1-apinski@marvell.com/mbox/"},{"id":74166,"url":"https://patchwork.plctlab.org/api/1.2/patches/74166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com/","msgid":"<96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com>","list_archive_url":null,"date":"2023-03-23T18:37:01","name":"PR tree-optimization/109238 - Ranger cache dominator queries should ignore backedges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com/mbox/"},{"id":74202,"url":"https://patchwork.plctlab.org/api/1.2/patches/74202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com/","msgid":"<830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T19:57:39","name":"[OG12,committed] Fortran/OpenMP: Fix '\''alloc'\'' and '\''from'\'' mapping for allocatable components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com/mbox/"},{"id":74208,"url":"https://patchwork.plctlab.org/api/1.2/patches/74208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323203507.2960052-1-jason@redhat.com/","msgid":"<20230323203507.2960052-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T20:35:07","name":"[RFC] c-family: -Wsequence-point and COMPONENT_REF [PR107163]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323203507.2960052-1-jason@redhat.com/mbox/"},{"id":74217,"url":"https://patchwork.plctlab.org/api/1.2/patches/74217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323205838.3AA8B20430@pchp3.se.axis.com/","msgid":"<20230323205838.3AA8B20430@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-23T20:58:38","name":"[COMMITTED] testsuite: Xfail gcc.dg/tree-ssa/ssa-fre-100.c for ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323205838.3AA8B20430@pchp3.se.axis.com/mbox/"},{"id":74223,"url":"https://patchwork.plctlab.org/api/1.2/patches/74223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-1-ppalka@redhat.com/","msgid":"<20230323211803.396326-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:18:02","name":"[1/2] c++: improve \"NTTP argument considered unused\" fix [PR53164, PR105848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-1-ppalka@redhat.com/mbox/"},{"id":74224,"url":"https://patchwork.plctlab.org/api/1.2/patches/74224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-2-ppalka@redhat.com/","msgid":"<20230323211803.396326-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:18:03","name":"[2/2] c++: duplicate \"use of deleted fn\" diagnostic [PR106880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-2-ppalka@redhat.com/mbox/"},{"id":74233,"url":"https://patchwork.plctlab.org/api/1.2/patches/74233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323213908.2988082-1-jason@redhat.com/","msgid":"<20230323213908.2988082-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:39:08","name":"[pushed] c++: constexpr PMF conversion [PR105996]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323213908.2988082-1-jason@redhat.com/mbox/"},{"id":74298,"url":"https://patchwork.plctlab.org/api/1.2/patches/74298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015239.13455-1-wangfeng@eswincomputing.com/","msgid":"<20230324015239.13455-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-24T01:52:39","name":"RISC-V: Optimize load memory data in rv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015239.13455-1-wangfeng@eswincomputing.com/mbox/"},{"id":74299,"url":"https://patchwork.plctlab.org/api/1.2/patches/74299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015324.13616-1-wangfeng@eswincomputing.com/","msgid":"<20230324015324.13616-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-24T01:53:24","name":"RISC-V: Optimize zbb ins sext.b and sext.h in rv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015324.13616-1-wangfeng@eswincomputing.com/mbox/"},{"id":74369,"url":"https://patchwork.plctlab.org/api/1.2/patches/74369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324064222.205360-1-juzhe.zhong@rivai.ai/","msgid":"<20230324064222.205360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T06:42:22","name":"[GCC14,QUEUE] RISC-V: Fix RVV register order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324064222.205360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74374,"url":"https://patchwork.plctlab.org/api/1.2/patches/74374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324065725.70549-1-juzhe.zhong@rivai.ai/","msgid":"<20230324065725.70549-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T06:57:25","name":"[GCC14,QUEUE] RISC-V: Fix RVV register order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324065725.70549-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74482,"url":"https://patchwork.plctlab.org/api/1.2/patches/74482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1kx/ykFT0v62j+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T08:52:23","name":"[committed] testsuite: Add testcase for already fixed PR [PR99739]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1kx/ykFT0v62j+@tucnak/mbox/"},{"id":74436,"url":"https://patchwork.plctlab.org/api/1.2/patches/74436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1lLvJxLGCAk2GT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T08:54:06","name":"[committed] testsuite: Fix up gcc.target/i386/pr109137.c testcase [PR109137]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1lLvJxLGCAk2GT@tucnak/mbox/"},{"id":74444,"url":"https://patchwork.plctlab.org/api/1.2/patches/74444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1oZcqg/ujxE+D+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T09:07:49","name":"builtins: Fix up ICE in inline_string_cmp [PR109258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1oZcqg/ujxE+D+@tucnak/mbox/"},{"id":74445,"url":"https://patchwork.plctlab.org/api/1.2/patches/74445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1r8ncB77h3D2Si@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T09:22:58","name":"go: Fix up go.test/test/fixedbugs/bug207.go failure [PR109258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1r8ncB77h3D2Si@tucnak/mbox/"},{"id":74474,"url":"https://patchwork.plctlab.org/api/1.2/patches/74474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324101942.7978E138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324101942.7978E138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T10:19:42","name":"[1/2] Disallow -gno-dwarf, gno-dwarf-N, -gno-gdb and -gno-vms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324101942.7978E138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74476,"url":"https://patchwork.plctlab.org/api/1.2/patches/74476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324102009.C79A5138F1@imap2.suse-dmz.suse.de/","msgid":"<20230324102009.C79A5138F1@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T10:20:09","name":"[2/2] Remove Negative(gwarf-) from gdwarf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324102009.C79A5138F1@imap2.suse-dmz.suse.de/mbox/"},{"id":74487,"url":"https://patchwork.plctlab.org/api/1.2/patches/74487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112846.283687-1-juzhe.zhong@rivai.ai/","msgid":"<20230324112846.283687-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T11:28:46","name":"RISC-V: Fine tune RVV narrow instruction (source EEW > dest DEST) RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112846.283687-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74488,"url":"https://patchwork.plctlab.org/api/1.2/patches/74488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112927.285817-1-juzhe.zhong@rivai.ai/","msgid":"<20230324112927.285817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T11:29:27","name":"[GCC14,QUEUE] RISC-V: Fine tune RVV narrow instruction (source EEW > dest DEST) RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112927.285817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74514,"url":"https://patchwork.plctlab.org/api/1.2/patches/74514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB2LgwL5rK/JI+KH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T11:37:39","name":"[wwwdocs] Mention the GNU C enum changes in gcc-13/changes.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB2LgwL5rK/JI+KH@tucnak/mbox/"},{"id":74530,"url":"https://patchwork.plctlab.org/api/1.2/patches/74530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130319.5E23D138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324130319.5E23D138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T13:03:18","name":"[1/2] Add emulated scatter capability to the vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130319.5E23D138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74531,"url":"https://patchwork.plctlab.org/api/1.2/patches/74531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T13:04:03","name":"[2/2,i386] Adjust costing of emulated vectorized gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74557,"url":"https://patchwork.plctlab.org/api/1.2/patches/74557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324133928.14753-1-alx@kernel.org/","msgid":"<20230324133928.14753-1-alx@kernel.org>","list_archive_url":null,"date":"2023-03-24T13:39:28","name":"[v2] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324133928.14753-1-alx@kernel.org/mbox/"},{"id":74566,"url":"https://patchwork.plctlab.org/api/1.2/patches/74566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324141157.1646192-1-pan2.li@intel.com/","msgid":"<20230324141157.1646192-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-24T14:11:57","name":"RTL: Bugfix for wrong code with v16hi compare & mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324141157.1646192-1-pan2.li@intel.com/mbox/"},{"id":74599,"url":"https://patchwork.plctlab.org/api/1.2/patches/74599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-2-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-2-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:39","name":"[1/7] openmp: Add Fortran support for \"omp unroll\" directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-2-frederik@codesourcery.com/mbox/"},{"id":74598,"url":"https://patchwork.plctlab.org/api/1.2/patches/74598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-3-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-3-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:40","name":"[2/7] openmp: Add C/C++ support for \"omp unroll\" directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-3-frederik@codesourcery.com/mbox/"},{"id":74601,"url":"https://patchwork.plctlab.org/api/1.2/patches/74601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-4-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-4-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:41","name":"[3/7] openacc: Rename OMP_CLAUSE_TILE to OMP_CLAUSE_OACC_TILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-4-frederik@codesourcery.com/mbox/"},{"id":74611,"url":"https://patchwork.plctlab.org/api/1.2/patches/74611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-5-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-5-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:42","name":"[4/7] openmp: Add Fortran support for \"omp tile\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-5-frederik@codesourcery.com/mbox/"},{"id":74612,"url":"https://patchwork.plctlab.org/api/1.2/patches/74612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-6-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-6-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:43","name":"[5/7] openmp: Add C/C++ support for \"omp tile\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-6-frederik@codesourcery.com/mbox/"},{"id":74616,"url":"https://patchwork.plctlab.org/api/1.2/patches/74616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-7-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-7-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:44","name":"[6/7] openmp: Add Fortran support for loop transformations on inner loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-7-frederik@codesourcery.com/mbox/"},{"id":74618,"url":"https://patchwork.plctlab.org/api/1.2/patches/74618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-8-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-8-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:45","name":"[7/7] openmp: Add C/C++ support for loop transformations on inner loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-8-frederik@codesourcery.com/mbox/"},{"id":74604,"url":"https://patchwork.plctlab.org/api/1.2/patches/74604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ileq9n5v.fsf@euler.schwinge.homeip.net/","msgid":"<87ileq9n5v.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:36:28","name":"[og12] In '\''libgomp/target.c:gomp_unmap_vars_internal'\'', defer '\''gomp_remove_var'\'' (was: [PATCH, v2, OpenMP 5.0, libgomp] Structure element mapping for OpenMP 5.0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ileq9n5v.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74610,"url":"https://patchwork.plctlab.org/api/1.2/patches/74610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edpe9muz.fsf@euler.schwinge.homeip.net/","msgid":"<87edpe9muz.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:43:00","name":"[og12] libgomp: Simplify OpenMP reverse offload host <-> device memory copy implementation (was: [Patch] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edpe9muz.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74615,"url":"https://patchwork.plctlab.org/api/1.2/patches/74615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkki9mji.fsf@euler.schwinge.homeip.net/","msgid":"<87bkki9mji.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:49:53","name":"[og12] libgomp: Document OpenMP '\''pinned'\'' memory (was: [PATCH] libgomp, openmp: pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkki9mji.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74624,"url":"https://patchwork.plctlab.org/api/1.2/patches/74624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfm9l8f.fsf@euler.schwinge.homeip.net/","msgid":"<878rfm9l8f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T16:18:08","name":"Add caveat/safeguard to OpenMP: Handle descriptors in target'\''s firstprivate [PR104949] (was: [Patch] OpenMP: Handle descriptors in target'\''s firstprivate [PR104949])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfm9l8f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74633,"url":"https://patchwork.plctlab.org/api/1.2/patches/74633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324163153.3200112-1-jason@redhat.com/","msgid":"<20230324163153.3200112-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-24T16:31:53","name":"[pushed] c++: default template arg, partial ordering [PR105481]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324163153.3200112-1-jason@redhat.com/mbox/"},{"id":74634,"url":"https://patchwork.plctlab.org/api/1.2/patches/74634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8285vg.fsf@euler.schwinge.homeip.net/","msgid":"<87zg8285vg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T16:35:15","name":"[og12] Add '\''libgomp.c/alloc-ompx_host_mem_alloc-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8285vg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74635,"url":"https://patchwork.plctlab.org/api/1.2/patches/74635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com/","msgid":"<3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T16:37:39","name":"[committed] libgomp.texi: Fix wording in GCN offload specifics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com/mbox/"},{"id":74743,"url":"https://patchwork.plctlab.org/api/1.2/patches/74743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7f6b0c0f-cba2-46f2-a5ef-9085b5268c50-1679692495210@3c-app-gmx-bap63/","msgid":"","list_archive_url":null,"date":"2023-03-24T21:14:55","name":"[committed] Fortran: fix FE memleak with BOZ expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7f6b0c0f-cba2-46f2-a5ef-9085b5268c50-1679692495210@3c-app-gmx-bap63/mbox/"},{"id":74750,"url":"https://patchwork.plctlab.org/api/1.2/patches/74750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4dSDShmhmy6Y6k@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T21:59:36","name":"aarch64, builtins: Include PR registers in FUNCTION_ARG_REGNO_P etc. [PR109254]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4dSDShmhmy6Y6k@tucnak/mbox/"},{"id":74786,"url":"https://patchwork.plctlab.org/api/1.2/patches/74786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4s+1RqBNR49tj/@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-24T23:06:35","name":"[V2] PR target/105325, Make load/cmp fusion know about prefixed load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4s+1RqBNR49tj/@toto.the-meissners.org/mbox/"},{"id":74788,"url":"https://patchwork.plctlab.org/api/1.2/patches/74788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324235635.4137828-1-dmalcolm@redhat.com/","msgid":"<20230324235635.4137828-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-24T23:56:35","name":"[pushed] docs, analyzer: improvements to \"Debugging the Analyzer\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324235635.4137828-1-dmalcolm@redhat.com/mbox/"},{"id":74801,"url":"https://patchwork.plctlab.org/api/1.2/patches/74801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325010301.4140585-1-dmalcolm@redhat.com/","msgid":"<20230325010301.4140585-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-25T01:03:01","name":"[pushed] diagnostics: ensure that .sarif files are UTF-8 encoded [PR109098]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325010301.4140585-1-dmalcolm@redhat.com/mbox/"},{"id":74885,"url":"https://patchwork.plctlab.org/api/1.2/patches/74885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7EJsY28ImtWfLF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-25T09:53:09","name":"predict: Don'\''t emit -Wsuggest-attribute=cold warning for functions which already have that attribute [PR105685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7EJsY28ImtWfLF@tucnak/mbox/"},{"id":74886,"url":"https://patchwork.plctlab.org/api/1.2/patches/74886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7IBe1ytkKihzTP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-25T10:10:54","name":"c++: Avoid informs without a warning [PR109278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7IBe1ytkKihzTP@tucnak/mbox/"},{"id":74887,"url":"https://patchwork.plctlab.org/api/1.2/patches/74887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325121432.3203674-1-pan2.li@intel.com/","msgid":"<20230325121432.3203674-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-25T12:14:32","name":"[v2] RISCV: Bugfix for wrong code with v16hi compare & mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325121432.3203674-1-pan2.li@intel.com/mbox/"},{"id":74976,"url":"https://patchwork.plctlab.org/api/1.2/patches/74976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-51153ee0-1aaf-4766-b665-cb8ecfeca996-1679771616856@3c-app-gmx-bs65/","msgid":"","list_archive_url":null,"date":"2023-03-25T19:13:36","name":"[commited] Fortran: remove dead code [PR104321]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-51153ee0-1aaf-4766-b665-cb8ecfeca996-1679771616856@3c-app-gmx-bs65/mbox/"},{"id":75000,"url":"https://patchwork.plctlab.org/api/1.2/patches/75000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-2-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:23","name":"[01/10] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-2-kmatsui@cs.washington.edu/mbox/"},{"id":74999,"url":"https://patchwork.plctlab.org/api/1.2/patches/74999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-3-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:24","name":"[02/10] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-3-kmatsui@cs.washington.edu/mbox/"},{"id":75006,"url":"https://patchwork.plctlab.org/api/1.2/patches/75006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-4-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:25","name":"[03/10] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-4-kmatsui@cs.washington.edu/mbox/"},{"id":75004,"url":"https://patchwork.plctlab.org/api/1.2/patches/75004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-5-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:26","name":"[04/10] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-5-kmatsui@cs.washington.edu/mbox/"},{"id":75003,"url":"https://patchwork.plctlab.org/api/1.2/patches/75003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-6-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:27","name":"[05/10] libstdc++: use std::is_void instead of __is_void in helper_functions.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-6-kmatsui@cs.washington.edu/mbox/"},{"id":75001,"url":"https://patchwork.plctlab.org/api/1.2/patches/75001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-7-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:28","name":"[06/10] libstdc++: remove unused __is_void in cpp_type_traits.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-7-kmatsui@cs.washington.edu/mbox/"},{"id":75002,"url":"https://patchwork.plctlab.org/api/1.2/patches/75002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-8-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-8-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:29","name":"[07/10] c++: rename __is_void defined in pr46567.C to ____is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-8-kmatsui@cs.washington.edu/mbox/"},{"id":75007,"url":"https://patchwork.plctlab.org/api/1.2/patches/75007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-9-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-9-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:30","name":"[08/10] c++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-9-kmatsui@cs.washington.edu/mbox/"},{"id":75008,"url":"https://patchwork.plctlab.org/api/1.2/patches/75008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-10-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-10-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:31","name":"[09/10] libstdc++: use new built-in trait __is_void for std::is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-10-kmatsui@cs.washington.edu/mbox/"},{"id":75005,"url":"https://patchwork.plctlab.org/api/1.2/patches/75005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-11-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-11-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:32","name":"[10/10] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-11-kmatsui@cs.washington.edu/mbox/"},{"id":75024,"url":"https://patchwork.plctlab.org/api/1.2/patches/75024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326083458.1240538-1-jiawei@iscas.ac.cn/","msgid":"<20230326083458.1240538-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-26T08:34:58","name":"RISC-V: Add Z*inx incompatible check in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326083458.1240538-1-jiawei@iscas.ac.cn/mbox/"},{"id":75038,"url":"https://patchwork.plctlab.org/api/1.2/patches/75038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326102402.9D82C33E4B@hamza.pair.com/","msgid":"<20230326102402.9D82C33E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-26T10:24:00","name":"[pushed] doc: Remove anachronistic note related to languages built","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326102402.9D82C33E4B@hamza.pair.com/mbox/"},{"id":75049,"url":"https://patchwork.plctlab.org/api/1.2/patches/75049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b597b853-7ea6-504b-7609-49c8aa98932f@irvise.xyz/","msgid":"","list_archive_url":null,"date":"2023-03-26T12:58:26","name":"[wwwdocs] Add Ada'\''s GCC13 changelog entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b597b853-7ea6-504b-7609-49c8aa98932f@irvise.xyz/mbox/"},{"id":75134,"url":"https://patchwork.plctlab.org/api/1.2/patches/75134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326165447.43628-1-iain@sandoe.co.uk/","msgid":"<20230326165447.43628-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-03-26T16:54:47","name":"c++, coroutines: Stabilize names of promoted slot vars [PR101118].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326165447.43628-1-iain@sandoe.co.uk/mbox/"},{"id":75151,"url":"https://patchwork.plctlab.org/api/1.2/patches/75151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs9rs0zo.fsf@igel.home/","msgid":"<87fs9rs0zo.fsf@igel.home>","list_archive_url":null,"date":"2023-03-26T20:37:15","name":"m68k: handle TLS access with offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs9rs0zo.fsf@igel.home/mbox/"},{"id":75223,"url":"https://patchwork.plctlab.org/api/1.2/patches/75223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e57a8f3f-e356-7153-cfdf-80d179a0b651@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-27T06:16:16","name":"[rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e57a8f3f-e356-7153-cfdf-80d179a0b651@linux.ibm.com/mbox/"},{"id":75233,"url":"https://patchwork.plctlab.org/api/1.2/patches/75233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327065907.155807-1-juzhe.zhong@rivai.ai/","msgid":"<20230327065907.155807-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-27T06:59:07","name":"RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327065907.155807-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75235,"url":"https://patchwork.plctlab.org/api/1.2/patches/75235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327074654.1126912-1-philipp.tomsich@vrull.eu/","msgid":"<20230327074654.1126912-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-03-27T07:46:54","name":"aarch64: update ampere1 vectorization cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327074654.1126912-1-philipp.tomsich@vrull.eu/mbox/"},{"id":75249,"url":"https://patchwork.plctlab.org/api/1.2/patches/75249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2c55ed6-ac51-013f-69ef-1917eed7d430@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-27T08:04:15","name":"[(pushed)] fix: pytest error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2c55ed6-ac51-013f-69ef-1917eed7d430@suse.cz/mbox/"},{"id":75250,"url":"https://patchwork.plctlab.org/api/1.2/patches/75250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com/","msgid":"<61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-27T08:09:39","name":"rs6000: Fix predicate for const vector in sldoi_to_mov [PR109069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com/mbox/"},{"id":75264,"url":"https://patchwork.plctlab.org/api/1.2/patches/75264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCFVYctz4vCATyxc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-27T08:35:45","name":"libstdc++: Fix up experimental/net/timer/waitable/dest.cc testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCFVYctz4vCATyxc@tucnak/mbox/"},{"id":75310,"url":"https://patchwork.plctlab.org/api/1.2/patches/75310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327085252.3390790-1-xionghuluo@tencent.com/","msgid":"<20230327085252.3390790-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-27T08:52:52","name":"[RFC] ipa-visibility: Fix ICE in lto-partition caused by incorrect comdat group solving in ipa-visibility","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327085252.3390790-1-xionghuluo@tencent.com/mbox/"},{"id":75339,"url":"https://patchwork.plctlab.org/api/1.2/patches/75339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327103707.1253143-1-chenyixuan@iscas.ac.cn/","msgid":"<20230327103707.1253143-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-27T10:37:07","name":"Changed vector size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327103707.1253143-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":75342,"url":"https://patchwork.plctlab.org/api/1.2/patches/75342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327110422.3353876-1-christoph.muellner@vrull.eu/","msgid":"<20230327110422.3353876-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-27T11:04:22","name":"target/109296 - riscv: Add missing mode specifiers for XTheadMemPair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327110422.3353876-1-christoph.muellner@vrull.eu/mbox/"},{"id":75349,"url":"https://patchwork.plctlab.org/api/1.2/patches/75349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfiqvtn.fsf@euler.schwinge.homeip.net/","msgid":"<878rfiqvtn.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-27T11:26:28","name":"[og12] libgomp: Document OpenMP '\''pinned'\'' memory (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfiqvtn.fsf@euler.schwinge.homeip.net/mbox/"},{"id":75386,"url":"https://patchwork.plctlab.org/api/1.2/patches/75386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327122349.4136E13482@imap2.suse-dmz.suse.de/","msgid":"<20230327122349.4136E13482@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-27T12:23:48","name":"tree-optimization/108357 - add testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327122349.4136E13482@imap2.suse-dmz.suse.de/mbox/"},{"id":75389,"url":"https://patchwork.plctlab.org/api/1.2/patches/75389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327123159.5B75713482@imap2.suse-dmz.suse.de/","msgid":"<20230327123159.5B75713482@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-27T12:31:58","name":"tree-optimization/54498 - testcase for the bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327123159.5B75713482@imap2.suse-dmz.suse.de/mbox/"},{"id":75405,"url":"https://patchwork.plctlab.org/api/1.2/patches/75405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327125049.967747-1-jwakely@redhat.com/","msgid":"<20230327125049.967747-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-27T12:50:49","name":"[committed] gcov: Fix \"subcomand\" typos [PR109297]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327125049.967747-1-jwakely@redhat.com/mbox/"},{"id":75540,"url":"https://patchwork.plctlab.org/api/1.2/patches/75540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327160157.4111747-1-kevinl@rivosinc.com/","msgid":"<20230327160157.4111747-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-03-27T16:01:57","name":"[v2,RFC] vect: Verify that GET_MODE_NUNITS is greater than one for vect_grouped_store_supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327160157.4111747-1-kevinl@rivosinc.com/mbox/"},{"id":75597,"url":"https://patchwork.plctlab.org/api/1.2/patches/75597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327175908.424052-1-xry111@xry111.site/","msgid":"<20230327175908.424052-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-27T17:59:08","name":"fixincludes: Declare memmem if it'\''s not declared in system headers [PR109293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327175908.424052-1-xry111@xry111.site/mbox/"},{"id":75622,"url":"https://patchwork.plctlab.org/api/1.2/patches/75622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327185430.3217374-1-julian@codesourcery.com/","msgid":"<20230327185430.3217374-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-27T18:54:30","name":"[og12] OpenMP: Constructors and destructors for \"declare target\" static aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327185430.3217374-1-julian@codesourcery.com/mbox/"},{"id":75697,"url":"https://patchwork.plctlab.org/api/1.2/patches/75697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAG0zEH+0J741JS9PGKTJbucuijprZGhCFt9yJnuZd5aHk7SeBw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-27T21:23:51","name":"libstdc++/complex: Remove implicit type casts in complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAG0zEH+0J741JS9PGKTJbucuijprZGhCFt9yJnuZd5aHk7SeBw@mail.gmail.com/mbox/"},{"id":75748,"url":"https://patchwork.plctlab.org/api/1.2/patches/75748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010010.235224-1-juzhe.zhong@rivai.ai/","msgid":"<20230328010010.235224-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T01:00:10","name":"RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010010.235224-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75749,"url":"https://patchwork.plctlab.org/api/1.2/patches/75749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010124.235703-1-juzhe.zhong@rivai.ai/","msgid":"<20230328010124.235703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T01:01:24","name":"[GCC14,QUEUE] RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010124.235703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75752,"url":"https://patchwork.plctlab.org/api/1.2/patches/75752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012606.64C8020427@pchp3.se.axis.com/","msgid":"<20230328012606.64C8020427@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:26:06","name":"[committed] CRIS: Remove unused constraint \"R\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012606.64C8020427@pchp3.se.axis.com/mbox/"},{"id":75756,"url":"https://patchwork.plctlab.org/api/1.2/patches/75756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012939.49ECF20417@pchp3.se.axis.com/","msgid":"<20230328012939.49ECF20417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:29:39","name":"[committed] CRIS: Improve bailing for eliminable compares for \"addi\" vs. \"add\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012939.49ECF20417@pchp3.se.axis.com/mbox/"},{"id":75757,"url":"https://patchwork.plctlab.org/api/1.2/patches/75757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013037.3EFE020417@pchp3.se.axis.com/","msgid":"<20230328013037.3EFE020417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:30:37","name":"[committed] CRIS: Add peephole2 to handle gcc.target/cris/rld-legit1.c for LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013037.3EFE020417@pchp3.se.axis.com/mbox/"},{"id":75758,"url":"https://patchwork.plctlab.org/api/1.2/patches/75758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013200.52DA220417@pchp3.se.axis.com/","msgid":"<20230328013200.52DA220417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:32:00","name":"[committed] CRIS: Correct \"T\" to define_memory_constraint, not define_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013200.52DA220417@pchp3.se.axis.com/mbox/"},{"id":75799,"url":"https://patchwork.plctlab.org/api/1.2/patches/75799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCJc253L29AUFGaN@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-28T03:19:55","name":"[V3] PR target/105325, Make load/cmp fusion know about prefixed loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCJc253L29AUFGaN@toto.the-meissners.org/mbox/"},{"id":75842,"url":"https://patchwork.plctlab.org/api/1.2/patches/75842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328062120.A450C3858C53@sourceware.org/","msgid":"<20230328062120.A450C3858C53@sourceware.org>","list_archive_url":null,"date":"2023-03-28T06:20:36","name":"ipa/106124 - ICE with -fkeep-inline-functions and OpenMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328062120.A450C3858C53@sourceware.org/mbox/"},{"id":75871,"url":"https://patchwork.plctlab.org/api/1.2/patches/75871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7081af4-d062-7da4-a342-0bd71da523e6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T07:45:47","name":"[PATCHv2,rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7081af4-d062-7da4-a342-0bd71da523e6@linux.ibm.com/mbox/"},{"id":75877,"url":"https://patchwork.plctlab.org/api/1.2/patches/75877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKdJtsc0vDzPq12@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T07:54:14","name":"range-op-float: Use get_nan_state in float_widen_lhs_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKdJtsc0vDzPq12@tucnak/mbox/"},{"id":75887,"url":"https://patchwork.plctlab.org/api/1.2/patches/75887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKfkrUlk++IRAvn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:04:34","name":"sanopt: Return TODO_cleanup_cfg if any .{UB,HWA,A}SAN_* calls were lowered [PR106190]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKfkrUlk++IRAvn@tucnak/mbox/"},{"id":75888,"url":"https://patchwork.plctlab.org/api/1.2/patches/75888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328080657.773873858296@sourceware.org/","msgid":"<20230328080657.773873858296@sourceware.org>","list_archive_url":null,"date":"2023-03-28T08:06:12","name":"tree-optimization/109304 - properly handle instrumented aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328080657.773873858296@sourceware.org/mbox/"},{"id":75889,"url":"https://patchwork.plctlab.org/api/1.2/patches/75889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKhCVg2wXr2k/fu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:10:49","name":"i386: Require just 32-bit alignment for SLOT_FLOATxFDI_387 -m32 -mpreferred-stack-boundary=2 DImode temporaries [PR109276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKhCVg2wXr2k/fu@tucnak/mbox/"},{"id":75891,"url":"https://patchwork.plctlab.org/api/1.2/patches/75891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKiZDm40JqnmjZi@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:16:36","name":"[RFC] range-op-float: Only flush_denormals_to_zero for +-*/ [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKiZDm40JqnmjZi@tucnak/mbox/"},{"id":75892,"url":"https://patchwork.plctlab.org/api/1.2/patches/75892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKkbo4zAg36w3wI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:25:18","name":"match.pd: Fix up sqrt (sqrt (x)) simplification [PR109301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKkbo4zAg36w3wI@tucnak/mbox/"},{"id":75904,"url":"https://patchwork.plctlab.org/api/1.2/patches/75904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0t9uv59.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:39:46","name":"[COMMITTED] testsuite: Fix weak_undefined handling on Darwin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0t9uv59.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":75909,"url":"https://patchwork.plctlab.org/api/1.2/patches/75909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8198261.T7Z3S40VBb@fomalhaut/","msgid":"<8198261.T7Z3S40VBb@fomalhaut>","list_archive_url":null,"date":"2023-03-28T08:48:43","name":"[SPARC] Fix PR target/109140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8198261.T7Z3S40VBb@fomalhaut/mbox/"},{"id":75937,"url":"https://patchwork.plctlab.org/api/1.2/patches/75937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK2yWURbV7ufT+p@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T09:43:37","name":"[committed] openmp: Fix typo in diagnostics [PR109314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK2yWURbV7ufT+p@tucnak/mbox/"},{"id":75942,"url":"https://patchwork.plctlab.org/api/1.2/patches/75942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK5vnMKxCV6UIXw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T09:56:14","name":"[committed] gcov-tool: Use subcommand rather than sub-command in function comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK5vnMKxCV6UIXw@tucnak/mbox/"},{"id":75955,"url":"https://patchwork.plctlab.org/api/1.2/patches/75955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK8eTKhp3GZY0UC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T10:07:53","name":"tree-ssa-math-opts: Move PROP_gimple_opt_math from sincos pass to powcabs [PR109301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK8eTKhp3GZY0UC@tucnak/mbox/"},{"id":75977,"url":"https://patchwork.plctlab.org/api/1.2/patches/75977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5441527.e9J7NaK4W3@minbar/","msgid":"<5441527.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-03-28T10:40:51","name":"libstdc++: Add missing trait is_simd_flag_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5441527.e9J7NaK4W3@minbar/mbox/"},{"id":75979,"url":"https://patchwork.plctlab.org/api/1.2/patches/75979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12813636.nUPlyArG6x@minbar/","msgid":"<12813636.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-03-28T10:42:40","name":"[committed] libstdc++: Fix operator% implementation for Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12813636.nUPlyArG6x@minbar/mbox/"},{"id":76007,"url":"https://patchwork.plctlab.org/api/1.2/patches/76007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113123.C77EE3857C5A@sourceware.org/","msgid":"<20230328113123.C77EE3857C5A@sourceware.org>","list_archive_url":null,"date":"2023-03-28T11:30:38","name":"bootstrap/84402 - improve (match ...) code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113123.C77EE3857C5A@sourceware.org/mbox/"},{"id":76009,"url":"https://patchwork.plctlab.org/api/1.2/patches/76009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-2-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-2-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:28","name":"[1/3] c++: Track lifetimes in constant evaluation [PR70331, PR96630, PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-2-nathanieloshead@gmail.com/mbox/"},{"id":76010,"url":"https://patchwork.plctlab.org/api/1.2/patches/76010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-3-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-3-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:29","name":"[2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-3-nathanieloshead@gmail.com/mbox/"},{"id":76008,"url":"https://patchwork.plctlab.org/api/1.2/patches/76008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-4-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-4-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:30","name":"[3/3] c++: Improve location information in constexpr evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-4-nathanieloshead@gmail.com/mbox/"},{"id":76011,"url":"https://patchwork.plctlab.org/api/1.2/patches/76011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jq5w1io.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T11:36:47","name":"[committed] aarch64: Restore vectorisation of vld1 inputs [PR109072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jq5w1io.fsf@arm.com/mbox/"},{"id":76028,"url":"https://patchwork.plctlab.org/api/1.2/patches/76028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328122128.333431-1-juzhe.zhong@rivai.ai/","msgid":"<20230328122128.333431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T12:21:28","name":"RISC-V: Fix ICE of ternary intrinsics and scalar move in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328122128.333431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76055,"url":"https://patchwork.plctlab.org/api/1.2/patches/76055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328124419.6EDD5385840E@sourceware.org/","msgid":"<20230328124419.6EDD5385840E@sourceware.org>","list_archive_url":null,"date":"2023-03-28T12:43:34","name":"tree-optimization/107087 - missed CCP after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328124419.6EDD5385840E@sourceware.org/mbox/"},{"id":76069,"url":"https://patchwork.plctlab.org/api/1.2/patches/76069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328131110.7780-1-amonakov@ispras.ru/","msgid":"<20230328131110.7780-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-03-28T13:11:10","name":"haifa-sched: fix autopref_rank_for_schedule comparator [PR109187]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328131110.7780-1-amonakov@ispras.ru/mbox/"},{"id":76074,"url":"https://patchwork.plctlab.org/api/1.2/patches/76074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c301a8d5-1331-1731-594c-d89eca395ceb@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T13:19:33","name":"PR tree-optimization/109274 -Fix compute_operand when op1 == op2 symbolically.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c301a8d5-1331-1731-594c-d89eca395ceb@redhat.com/mbox/"},{"id":76076,"url":"https://patchwork.plctlab.org/api/1.2/patches/76076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt3xui33.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-03-28T13:21:52","name":"build: Check that -lzstd can be linked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt3xui33.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":76105,"url":"https://patchwork.plctlab.org/api/1.2/patches/76105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142302.3824535-1-jiawei@iscas.ac.cn/","msgid":"<20230328142302.3824535-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-28T14:23:02","name":"[v2] RISC-V: Add Z*inx imcompatible check in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142302.3824535-1-jiawei@iscas.ac.cn/mbox/"},{"id":76107,"url":"https://patchwork.plctlab.org/api/1.2/patches/76107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142657.53724-1-kito.cheng@sifive.com/","msgid":"<20230328142657.53724-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-03-28T14:26:57","name":"RISC-V: Define __riscv_v_intrinsic [PR109312]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142657.53724-1-kito.cheng@sifive.com/mbox/"},{"id":76157,"url":"https://patchwork.plctlab.org/api/1.2/patches/76157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCMLY6Br6tqr8L9P@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T15:44:35","name":"c++: Allow translations of check_postcondition_result messages [PR109309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCMLY6Br6tqr8L9P@tucnak/mbox/"},{"id":76169,"url":"https://patchwork.plctlab.org/api/1.2/patches/76169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-2-qing.zhao@oracle.com/","msgid":"<20230328154944.3946619-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-28T15:49:43","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-2-qing.zhao@oracle.com/mbox/"},{"id":76162,"url":"https://patchwork.plctlab.org/api/1.2/patches/76162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-3-qing.zhao@oracle.com/","msgid":"<20230328154944.3946619-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-28T15:49:44","name":"[2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-3-qing.zhao@oracle.com/mbox/"},{"id":76164,"url":"https://patchwork.plctlab.org/api/1.2/patches/76164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328155057.1187204-1-jwakely@redhat.com/","msgid":"<20230328155057.1187204-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T15:50:57","name":"c++: Make diagnostic translatable [PR109309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328155057.1187204-1-jwakely@redhat.com/mbox/"},{"id":76205,"url":"https://patchwork.plctlab.org/api/1.2/patches/76205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a22c34d6-07c5-80a5-f6d5-8aa49869a03d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T16:49:27","name":"[v2] rtl-optimization: ppc backend generates unnecessary extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a22c34d6-07c5-80a5-f6d5-8aa49869a03d@linux.ibm.com/mbox/"},{"id":76213,"url":"https://patchwork.plctlab.org/api/1.2/patches/76213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328165515.2300685-1-jiawei@iscas.ac.cn/","msgid":"<20230328165515.2300685-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-28T16:55:15","name":"[v3] RISC-V: Add Z*inx imcompatible check in gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328165515.2300685-1-jiawei@iscas.ac.cn/mbox/"},{"id":76221,"url":"https://patchwork.plctlab.org/api/1.2/patches/76221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328173732.1722425-1-ppalka@redhat.com/","msgid":"<20230328173732.1722425-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-28T17:37:32","name":"c++: ICE on loopy var tmpl auto deduction [PR109300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328173732.1722425-1-ppalka@redhat.com/mbox/"},{"id":76225,"url":"https://patchwork.plctlab.org/api/1.2/patches/76225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328180139.74395-1-xry111@xry111.site/","msgid":"<20230328180139.74395-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-28T18:01:39","name":"LoongArch: Improve GAR store for va_list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328180139.74395-1-xry111@xry111.site/mbox/"},{"id":76226,"url":"https://patchwork.plctlab.org/api/1.2/patches/76226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328183728.168042-1-dmalcolm@redhat.com/","msgid":"<20230328183728.168042-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-28T18:37:28","name":"[pushed] Don'\''t emit -Wxor-used-as-pow on macro expansions [PR107002]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328183728.168042-1-dmalcolm@redhat.com/mbox/"},{"id":76242,"url":"https://patchwork.plctlab.org/api/1.2/patches/76242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU1TRyicyScHU2b-0r2Us4hce9xO0oP6wK0-xnOE7OUDg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T20:09:42","name":"libbacktrace patch committed: Tweaks to zstd decompression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU1TRyicyScHU2b-0r2Us4hce9xO0oP6wK0-xnOE7OUDg@mail.gmail.com/mbox/"},{"id":76243,"url":"https://patchwork.plctlab.org/api/1.2/patches/76243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201450.1201780-1-jwakely@redhat.com/","msgid":"<20230328201450.1201780-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:14:50","name":"[committed] libstdc++: Update tzdata to 2023a [PR109288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201450.1201780-1-jwakely@redhat.com/mbox/"},{"id":76253,"url":"https://patchwork.plctlab.org/api/1.2/patches/76253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201455.1202542-1-jwakely@redhat.com/","msgid":"<20230328201455.1202542-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:14:55","name":"[committed] libstdc++: Tell GCC what basic_string::_M_is_local() means [PR109299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201455.1202542-1-jwakely@redhat.com/mbox/"},{"id":76248,"url":"https://patchwork.plctlab.org/api/1.2/patches/76248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201501.1202700-1-jwakely@redhat.com/","msgid":"<20230328201501.1202700-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:15:01","name":"[committed] libstdc++: More fixes for null pointers used with std::char_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201501.1202700-1-jwakely@redhat.com/mbox/"},{"id":76263,"url":"https://patchwork.plctlab.org/api/1.2/patches/76263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm8s8u1x.fsf@euler.schwinge.homeip.net/","msgid":"<87pm8s8u1x.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-28T21:06:34","name":"Enable '\''gfortran.dg/weak-2.f90'\'' for nvptx target (was: Support for WEAK attribute, part 2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm8s8u1x.fsf@euler.schwinge.homeip.net/mbox/"},{"id":76301,"url":"https://patchwork.plctlab.org/api/1.2/patches/76301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328231903.1214366-1-jwakely@redhat.com/","msgid":"<20230328231903.1214366-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T23:19:03","name":"[committed] libstdc++: Do not use facets cached in ios for ATL128 build [PR103387]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328231903.1214366-1-jwakely@redhat.com/mbox/"},{"id":76324,"url":"https://patchwork.plctlab.org/api/1.2/patches/76324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcX1MNR1Y9KdOvBd5AJLbNO8uE-ksW6jbPKVMq5wze6L_Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T00:31:38","name":"Go patch committed: Mark Call_expression multi-results as result struct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcX1MNR1Y9KdOvBd5AJLbNO8uE-ksW6jbPKVMq5wze6L_Q@mail.gmail.com/mbox/"},{"id":76340,"url":"https://patchwork.plctlab.org/api/1.2/patches/76340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329022327.99330-1-jason@redhat.com/","msgid":"<20230329022327.99330-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-29T02:23:27","name":"[pushed] c++: alias ctad refinements [PR109321]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329022327.99330-1-jason@redhat.com/mbox/"},{"id":76343,"url":"https://patchwork.plctlab.org/api/1.2/patches/76343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-2-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-2-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:56","name":"[v2,1/3] c++: Track lifetimes in constant evaluation [PR70331, PR96630, PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-2-nathanieloshead@gmail.com/mbox/"},{"id":76342,"url":"https://patchwork.plctlab.org/api/1.2/patches/76342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-3-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-3-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:57","name":"[v2,2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-3-nathanieloshead@gmail.com/mbox/"},{"id":76344,"url":"https://patchwork.plctlab.org/api/1.2/patches/76344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-4-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-4-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:58","name":"[v2,3/3] c++: Improve location information in constexpr evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-4-nathanieloshead@gmail.com/mbox/"},{"id":76345,"url":"https://patchwork.plctlab.org/api/1.2/patches/76345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024259.174803-1-juzhe.zhong@rivai.ai/","msgid":"<20230329024259.174803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-29T02:42:59","name":"RISC-V: Fix ICE && codegen error of scalar move in RV32 system.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024259.174803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76346,"url":"https://patchwork.plctlab.org/api/1.2/patches/76346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024727.201957-1-juzhe.zhong@rivai.ai/","msgid":"<20230329024727.201957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-29T02:47:26","name":"RISC-V: Fix reload fail issue on vector mac instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024727.201957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76383,"url":"https://patchwork.plctlab.org/api/1.2/patches/76383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329063352.5BE433857026@sourceware.org/","msgid":"<20230329063352.5BE433857026@sourceware.org>","list_archive_url":null,"date":"2023-03-29T06:33:07","name":"tree-optimization/109154 - improve if-conversion for vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329063352.5BE433857026@sourceware.org/mbox/"},{"id":76393,"url":"https://patchwork.plctlab.org/api/1.2/patches/76393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com/","msgid":"<2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-29T07:18:38","name":"[v2] sched: Change no_real_insns_p to no_real_nondebug_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com/mbox/"},{"id":76394,"url":"https://patchwork.plctlab.org/api/1.2/patches/76394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329072126.2297953-1-hongtao.liu@intel.com/","msgid":"<20230329072126.2297953-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-29T07:21:26","name":"Generate vpblendd instead of vpblendw for V4SI under AVX2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329072126.2297953-1-hongtao.liu@intel.com/mbox/"},{"id":76424,"url":"https://patchwork.plctlab.org/api/1.2/patches/76424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329075222.2888608-1-pan2.li@intel.com/","msgid":"<20230329075222.2888608-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-29T07:52:22","name":"[RISC-V] : Bugfix for RVV vbool*_t vn_reference_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329075222.2888608-1-pan2.li@intel.com/mbox/"},{"id":76443,"url":"https://patchwork.plctlab.org/api/1.2/patches/76443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329083527.02DF1385703F@sourceware.org/","msgid":"<20230329083527.02DF1385703F@sourceware.org>","list_archive_url":null,"date":"2023-03-29T08:34:38","name":"tree-optimization/109327 - forwprop stmt removal issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329083527.02DF1385703F@sourceware.org/mbox/"},{"id":76454,"url":"https://patchwork.plctlab.org/api/1.2/patches/76454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329084832.6FEFA3857C43@sourceware.org/","msgid":"<20230329084832.6FEFA3857C43@sourceware.org>","list_archive_url":null,"date":"2023-03-29T08:47:43","name":"scan generic vector tests before lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329084832.6FEFA3857C43@sourceware.org/mbox/"},{"id":76456,"url":"https://patchwork.plctlab.org/api/1.2/patches/76456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329085328.3066061-1-pan2.li@intel.com/","msgid":"<20230329085328.3066061-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-29T08:53:28","name":"[v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329085328.3066061-1-pan2.li@intel.com/mbox/"},{"id":76515,"url":"https://patchwork.plctlab.org/api/1.2/patches/76515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8021191-7ec1-8683-5a33-7cf91172cb42@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T10:50:26","name":"arm: Fix MVE vcreate definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8021191-7ec1-8683-5a33-7cf91172cb42@arm.com/mbox/"},{"id":76531,"url":"https://patchwork.plctlab.org/api/1.2/patches/76531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GF8Lw3PhgEDoCpE8Pu64yKun736N=uazhUVg=aP2EEb9Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T11:36:16","name":"[RFC] Fix for c++/PR12341","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GF8Lw3PhgEDoCpE8Pu64yKun736N=uazhUVg=aP2EEb9Q@mail.gmail.com/mbox/"},{"id":76537,"url":"https://patchwork.plctlab.org/api/1.2/patches/76537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329115635.6D3113858434@sourceware.org/","msgid":"<20230329115635.6D3113858434@sourceware.org>","list_archive_url":null,"date":"2023-03-29T11:55:50","name":"tree-optimization/109331 - make sure to clean up the CFG after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329115635.6D3113858434@sourceware.org/mbox/"},{"id":76555,"url":"https://patchwork.plctlab.org/api/1.2/patches/76555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329121233.B0266385B538@sourceware.org/","msgid":"<20230329121233.B0266385B538@sourceware.org>","list_archive_url":null,"date":"2023-03-29T12:11:47","name":"tree-optimization/107561 - reduce -Wstringop-overflow false positives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329121233.B0266385B538@sourceware.org/mbox/"},{"id":76564,"url":"https://patchwork.plctlab.org/api/1.2/patches/76564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e114ac92-17fe-a0c0-b68a-3585910b70e4@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-29T12:55:01","name":"configure: deprecate --enable-link-mutex option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e114ac92-17fe-a0c0-b68a-3585910b70e4@suse.cz/mbox/"},{"id":76579,"url":"https://patchwork.plctlab.org/api/1.2/patches/76579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329134210.19370-1-shiyulong@iscas.ac.cn/","msgid":"<20230329134210.19370-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-29T13:42:10","name":"[V1] RISCV: Modified validation information for contracts-tmpl-spec2.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329134210.19370-1-shiyulong@iscas.ac.cn/mbox/"},{"id":76581,"url":"https://patchwork.plctlab.org/api/1.2/patches/76581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d34537-c54b-ebac-7c7d-89380cf9fe46@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T13:48:00","name":"[RFA,Bug,target/108892,13,regression] Force re-recognition after changing RTL structure of an insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d34537-c54b-ebac-7c7d-89380cf9fe46@ventanamicro.com/mbox/"},{"id":76724,"url":"https://patchwork.plctlab.org/api/1.2/patches/76724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com/","msgid":"<54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com>","list_archive_url":null,"date":"2023-03-29T17:22:27","name":"recomputation and PR 109154","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com/mbox/"},{"id":76792,"url":"https://patchwork.plctlab.org/api/1.2/patches/76792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7ob2usn.fsf@euler.schwinge.homeip.net/","msgid":"<87o7ob2usn.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-29T19:59:20","name":"'\''g++.dg/modules/modules.exp'\'': don'\''t leak local '\''unsupported'\'' proc [PR108899] (was: [PATCH] testsuite: Fix up modules.exp [PR108899])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7ob2usn.fsf@euler.schwinge.homeip.net/mbox/"},{"id":76828,"url":"https://patchwork.plctlab.org/api/1.2/patches/76828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329220802.1F70133E56@hamza.pair.com/","msgid":"<20230329220802.1F70133E56@hamza.pair.com>","list_archive_url":null,"date":"2023-03-29T22:07:59","name":"[pushed] wwwdocs: gcc-4.7: Adjust dwarfstd.org links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329220802.1F70133E56@hamza.pair.com/mbox/"},{"id":76846,"url":"https://patchwork.plctlab.org/api/1.2/patches/76846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329225727.2D86420433@pchp3.se.axis.com/","msgid":"<20230329225727.2D86420433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-29T22:57:27","name":"[committed] CRIS: Make rtx-cost 0 for many CONST_INT \"quick\" operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329225727.2D86420433@pchp3.se.axis.com/mbox/"},{"id":76854,"url":"https://patchwork.plctlab.org/api/1.2/patches/76854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233858.1405145-1-jwakely@redhat.com/","msgid":"<20230329233858.1405145-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:38:58","name":"[committed] libstdc++: Enforce requirements on template argument of std::optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233858.1405145-1-jwakely@redhat.com/mbox/"},{"id":76855,"url":"https://patchwork.plctlab.org/api/1.2/patches/76855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233904.1405179-1-jwakely@redhat.com/","msgid":"<20230329233904.1405179-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:39:04","name":"[committed] libstdc++: Use std::remove_cv_t in std::optional::transform [PR109340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233904.1405179-1-jwakely@redhat.com/mbox/"},{"id":76856,"url":"https://patchwork.plctlab.org/api/1.2/patches/76856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233914.1405196-1-jwakely@redhat.com/","msgid":"<20230329233914.1405196-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:39:14","name":"[committed] libstdc++: Apply small fix from LWG 3843 to std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233914.1405196-1-jwakely@redhat.com/mbox/"},{"id":76857,"url":"https://patchwork.plctlab.org/api/1.2/patches/76857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329234000.1405216-1-jwakely@redhat.com/","msgid":"<20230329234000.1405216-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:40:00","name":"[committed] libstdc++: Fix constexpr functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329234000.1405216-1-jwakely@redhat.com/mbox/"},{"id":76864,"url":"https://patchwork.plctlab.org/api/1.2/patches/76864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330012804.110539-1-juzhe.zhong@rivai.ai/","msgid":"<20230330012804.110539-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-30T01:28:04","name":"[GCC14,QUEUE] RISC-V: Optimize fault only first load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330012804.110539-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76867,"url":"https://patchwork.plctlab.org/api/1.2/patches/76867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330014456.1425596-1-hongtao.liu@intel.com/","msgid":"<20230330014456.1425596-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-30T01:44:56","name":"Support vector conversion for AVX512 vcvtudq2pd/vcvttps2udq/vcvttpd2udq.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330014456.1425596-1-hongtao.liu@intel.com/mbox/"},{"id":76878,"url":"https://patchwork.plctlab.org/api/1.2/patches/76878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330034753.3661606-1-apinski@marvell.com/","msgid":"<20230330034753.3661606-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-30T03:47:53","name":"Fix fc-prototypes usage with C_INT64_T and non LP64 Targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330034753.3661606-1-apinski@marvell.com/mbox/"},{"id":76934,"url":"https://patchwork.plctlab.org/api/1.2/patches/76934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCU+huPw218pdDqo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-30T07:47:18","name":"c++: Fix up ICE in build_min_non_dep_op_overload [PR109319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCU+huPw218pdDqo@tucnak/mbox/"},{"id":76936,"url":"https://patchwork.plctlab.org/api/1.2/patches/76936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCVCzOdvlQG2Lke7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-30T08:05:32","name":"testsuite, analyzer: Fix up pipe-glibc.c testcase [PR107396]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCVCzOdvlQG2Lke7@tucnak/mbox/"},{"id":77099,"url":"https://patchwork.plctlab.org/api/1.2/patches/77099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330110206.11FDD1348E@imap2.suse-dmz.suse.de/","msgid":"<20230330110206.11FDD1348E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-30T11:02:05","name":"tree-optimization/109342 - wrong code with edge equivalences in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330110206.11FDD1348E@imap2.suse-dmz.suse.de/mbox/"},{"id":77133,"url":"https://patchwork.plctlab.org/api/1.2/patches/77133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330114146.442606-1-hongtao.liu@intel.com/","msgid":"<20230330114146.442606-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-30T11:41:46","name":"[V2] Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns* to align with standard pattern name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330114146.442606-1-hongtao.liu@intel.com/mbox/"},{"id":77160,"url":"https://patchwork.plctlab.org/api/1.2/patches/77160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330121546.1454231-1-jwakely@redhat.com/","msgid":"<20230330121546.1454231-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-30T12:15:46","name":"c++tools: Fix Makefile to properly clean and rebuild [PR101834]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330121546.1454231-1-jwakely@redhat.com/mbox/"},{"id":77359,"url":"https://patchwork.plctlab.org/api/1.2/patches/77359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-2-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:05","name":"[v2,1/7] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-2-kmatsui@cs.washington.edu/mbox/"},{"id":77357,"url":"https://patchwork.plctlab.org/api/1.2/patches/77357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-3-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:06","name":"[v2,2/7] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-3-kmatsui@cs.washington.edu/mbox/"},{"id":77358,"url":"https://patchwork.plctlab.org/api/1.2/patches/77358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-4-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:07","name":"[v2,3/7] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-4-kmatsui@cs.washington.edu/mbox/"},{"id":77361,"url":"https://patchwork.plctlab.org/api/1.2/patches/77361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-5-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:08","name":"[v2,4/7] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-5-kmatsui@cs.washington.edu/mbox/"},{"id":77363,"url":"https://patchwork.plctlab.org/api/1.2/patches/77363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-6-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:09","name":"[v2,5/7] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-6-kmatsui@cs.washington.edu/mbox/"},{"id":77362,"url":"https://patchwork.plctlab.org/api/1.2/patches/77362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-7-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:10","name":"[v2,6/7] libstdc++: use new built-in trait __is_void for std::is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-7-kmatsui@cs.washington.edu/mbox/"},{"id":77364,"url":"https://patchwork.plctlab.org/api/1.2/patches/77364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-8-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-8-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:11","name":"[v2,7/7] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-8-kmatsui@cs.washington.edu/mbox/"},{"id":77427,"url":"https://patchwork.plctlab.org/api/1.2/patches/77427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222454.793588-1-jason@redhat.com/","msgid":"<20230330222454.793588-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-30T22:24:54","name":"[pushed] c++: anonymous union member reference [PR105452]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222454.793588-1-jason@redhat.com/mbox/"},{"id":77428,"url":"https://patchwork.plctlab.org/api/1.2/patches/77428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222552.793991-1-jason@redhat.com/","msgid":"<20230330222552.793991-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-30T22:25:52","name":"[pushed] c++: generic lambda and function ptr conv [PR105221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222552.793991-1-jason@redhat.com/mbox/"},{"id":77529,"url":"https://patchwork.plctlab.org/api/1.2/patches/77529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331051129.2691249-1-hongtao.liu@intel.com/","msgid":"<20230331051129.2691249-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-31T05:11:29","name":"Adjust memory_move_cost for MASK_REGS when MODE_SIZE > 8.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331051129.2691249-1-hongtao.liu@intel.com/mbox/"},{"id":77531,"url":"https://patchwork.plctlab.org/api/1.2/patches/77531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331054113.245429-1-juzhe.zhong@rivai.ai/","msgid":"<20230331054113.245429-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-31T05:41:13","name":"[GCC14,QUEUE] RISC-V: Support chunk = 128bit for '\''V'\'' Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331054113.245429-1-juzhe.zhong@rivai.ai/mbox/"},{"id":77558,"url":"https://patchwork.plctlab.org/api/1.2/patches/77558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331065810.4012545-1-hongtao.liu@intel.com/","msgid":"<20230331065810.4012545-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-31T06:58:10","name":"Document signbitm2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331065810.4012545-1-hongtao.liu@intel.com/mbox/"},{"id":77574,"url":"https://patchwork.plctlab.org/api/1.2/patches/77574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331072057.84974-1-kito.cheng@sifive.com/","msgid":"<20230331072057.84974-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-03-31T07:20:57","name":"[committed] RISC-V: Fix missing file dependency in RISC-V back-end [PR109328]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331072057.84974-1-kito.cheng@sifive.com/mbox/"},{"id":77706,"url":"https://patchwork.plctlab.org/api/1.2/patches/77706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaSgegwS47Tq+MJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T07:57:54","name":"range-op-float, value-range: Fix up handling of UN{LT,LE,GT,GE,EQ}_EXPR and handle comparisons in get_tree_range [PR91645]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaSgegwS47Tq+MJ@tucnak/mbox/"},{"id":77707,"url":"https://patchwork.plctlab.org/api/1.2/patches/77707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaW+lxMXIASrQJz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T08:16:59","name":"[RFC] Use ranger in the cdce pass [PR91645]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaW+lxMXIASrQJz@tucnak/mbox/"},{"id":77631,"url":"https://patchwork.plctlab.org/api/1.2/patches/77631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pm8p48cj.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-31T08:45:48","name":"ipa: Avoid constructing aggregate jump functions with huge offsets (PR 109303)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pm8p48cj.fsf@suse.cz/mbox/"},{"id":77719,"url":"https://patchwork.plctlab.org/api/1.2/patches/77719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa5thrjuM3EhXO8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T10:45:10","name":"range-op-float: Further comparison fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa5thrjuM3EhXO8@tucnak/mbox/"},{"id":77721,"url":"https://patchwork.plctlab.org/api/1.2/patches/77721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa8nVSkandaSH2N@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T10:57:33","name":"range-op-float: Further foperator_{,not_}equal::fold_range fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa8nVSkandaSH2N@tucnak/mbox/"},{"id":77801,"url":"https://patchwork.plctlab.org/api/1.2/patches/77801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331144909.29872-1-jwakely@redhat.com/","msgid":"<20230331144909.29872-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T14:49:09","name":"[committed] libstdc++: Revert addition of boolean flag to net::ip::basic_endpoint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331144909.29872-1-jwakely@redhat.com/mbox/"},{"id":77802,"url":"https://patchwork.plctlab.org/api/1.2/patches/77802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331145017.30025-1-jwakely@redhat.com/","msgid":"<20230331145017.30025-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T14:50:17","name":"[committed] libstdc++: Avoid -Wmaybe-uninitialized warning in std::stop_source [PR109339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331145017.30025-1-jwakely@redhat.com/mbox/"},{"id":77812,"url":"https://patchwork.plctlab.org/api/1.2/patches/77812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com/","msgid":"<006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com>","list_archive_url":null,"date":"2023-03-31T15:06:41","name":"[pushed,PR109052] LRA: Implement commutative operands exchange for combining secondary memory reload and original insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-03/mbox/"},{"id":19,"url":"https://patchwork.plctlab.org/api/1.2/bundles/19/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-04/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-04","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":77949,"url":"https://patchwork.plctlab.org/api/1.2/patches/77949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331185041.8F5FC33E63@hamza.pair.com/","msgid":"<20230331185041.8F5FC33E63@hamza.pair.com>","list_archive_url":null,"date":"2023-03-31T18:50:33","name":"[pushed] libiberty: Remove a reference to the Glibc manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331185041.8F5FC33E63@hamza.pair.com/mbox/"},{"id":78025,"url":"https://patchwork.plctlab.org/api/1.2/patches/78025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331224541.102599-1-jwakely@redhat.com/","msgid":"<20230331224541.102599-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T22:45:41","name":"[committed] libstdc++: Teach optimizer that empty COW strings are empty [PR107087]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331224541.102599-1-jwakely@redhat.com/mbox/"},{"id":78062,"url":"https://patchwork.plctlab.org/api/1.2/patches/78062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCfXdZvpU0rv6Ezk@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-01T07:04:21","name":"[committed] testsuite: Add testcase for already fixed PR [PR109362]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCfXdZvpU0rv6Ezk@tucnak/mbox/"},{"id":78188,"url":"https://patchwork.plctlab.org/api/1.2/patches/78188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-2-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:09","name":"[v3,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-2-kmatsui@cs.washington.edu/mbox/"},{"id":78187,"url":"https://patchwork.plctlab.org/api/1.2/patches/78187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-3-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:10","name":"[v3,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-3-kmatsui@cs.washington.edu/mbox/"},{"id":78186,"url":"https://patchwork.plctlab.org/api/1.2/patches/78186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-4-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:11","name":"[v3,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-4-kmatsui@cs.washington.edu/mbox/"},{"id":78190,"url":"https://patchwork.plctlab.org/api/1.2/patches/78190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-5-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:12","name":"[v3,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-5-kmatsui@cs.washington.edu/mbox/"},{"id":78189,"url":"https://patchwork.plctlab.org/api/1.2/patches/78189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-6-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:13","name":"[v3,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-6-kmatsui@cs.washington.edu/mbox/"},{"id":78191,"url":"https://patchwork.plctlab.org/api/1.2/patches/78191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-7-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:14","name":"[v3,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-7-kmatsui@cs.washington.edu/mbox/"},{"id":78244,"url":"https://patchwork.plctlab.org/api/1.2/patches/78244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402140044.23073-1-xry111@xry111.site/","msgid":"<20230402140044.23073-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-02T14:00:44","name":"[GCC14] LoongArch: Optimize additions with immediates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402140044.23073-1-xry111@xry111.site/mbox/"},{"id":78256,"url":"https://patchwork.plctlab.org/api/1.2/patches/78256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-2-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:13","name":"[1/3] go: Fix memory leak in Integer_expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-2-rep.dot.nop@gmail.com/mbox/"},{"id":78257,"url":"https://patchwork.plctlab.org/api/1.2/patches/78257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-3-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-3-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:14","name":"[2/3] rust: Fix memory leak in compile_{integer,float}_literal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-3-rep.dot.nop@gmail.com/mbox/"},{"id":78255,"url":"https://patchwork.plctlab.org/api/1.2/patches/78255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-4-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-4-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:15","name":"[3/3] Fortran: Fix mpz and mpfr memory leaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-4-rep.dot.nop@gmail.com/mbox/"},{"id":78306,"url":"https://patchwork.plctlab.org/api/1.2/patches/78306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402213345.632989-1-sam@gentoo.org/","msgid":"<20230402213345.632989-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-02T21:33:45","name":"[v5] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402213345.632989-1-sam@gentoo.org/mbox/"},{"id":78313,"url":"https://patchwork.plctlab.org/api/1.2/patches/78313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403003855.113601-1-juzhe.zhong@rivai.ai/","msgid":"<20230403003855.113601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-03T00:38:55","name":"RISC-V: Fix SEW64 of vrsub.vx runtime fail in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403003855.113601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":78319,"url":"https://patchwork.plctlab.org/api/1.2/patches/78319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403011939.10677-1-xuli1@eswincomputing.com/","msgid":"<20230403011939.10677-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-04-03T01:19:39","name":"RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403011939.10677-1-xuli1@eswincomputing.com/mbox/"},{"id":78400,"url":"https://patchwork.plctlab.org/api/1.2/patches/78400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz/","msgid":"<7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:04:51","name":"[(pushed)] param: document ranger-recompute-depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz/mbox/"},{"id":78413,"url":"https://patchwork.plctlab.org/api/1.2/patches/78413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz/","msgid":"<94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:46:58","name":"driver: drop flag_var_tracking_assignments flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz/mbox/"},{"id":78415,"url":"https://patchwork.plctlab.org/api/1.2/patches/78415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-2-haochen.jiang@intel.com/","msgid":"<20230403084923.2904086-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-03T08:49:22","name":"[1/2] Support Intel AMX-COMPLEX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-2-haochen.jiang@intel.com/mbox/"},{"id":78414,"url":"https://patchwork.plctlab.org/api/1.2/patches/78414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-3-haochen.jiang@intel.com/","msgid":"<20230403084923.2904086-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-03T08:49:23","name":"[2/2] i386: Add AMX-COMPLEX to Granite Rapids","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-3-haochen.jiang@intel.com/mbox/"},{"id":78416,"url":"https://patchwork.plctlab.org/api/1.2/patches/78416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz/","msgid":"<7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:54:23","name":"[stage1] gcov: respect -fprofile-prefix-map when it comes to output of .gcda file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz/mbox/"},{"id":78418,"url":"https://patchwork.plctlab.org/api/1.2/patches/78418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz/","msgid":"<200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz>","list_archive_url":null,"date":"2023-04-03T09:02:28","name":"ipa: propagate attributes for target attribute clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz/mbox/"},{"id":78562,"url":"https://patchwork.plctlab.org/api/1.2/patches/78562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4lxc5z.fsf@euler.schwinge.homeip.net/","msgid":"<87cz4lxc5z.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-03T14:39:36","name":"[og12] OpenACC: Pass pre-allocated '\''ptrblock'\'' to '\''goacc_noncontig_array_create_ptrblock'\'' [PR76739] (was: [PATCH, OpenACC, v3] Non-contiguous array support for OpenACC data clauses)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4lxc5z.fsf@euler.schwinge.homeip.net/mbox/"},{"id":78565,"url":"https://patchwork.plctlab.org/api/1.2/patches/78565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403144932.747134-1-ppalka@redhat.com/","msgid":"<20230403144932.747134-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-03T14:49:32","name":"c++: satisfaction and ARGUMENT_PACK_SELECT [PR105644]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403144932.747134-1-ppalka@redhat.com/mbox/"},{"id":78568,"url":"https://patchwork.plctlab.org/api/1.2/patches/78568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rf9xbd0.fsf@euler.schwinge.homeip.net/","msgid":"<878rf9xbd0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-03T14:56:59","name":"[og12] '\''-foffload-memory=pinned'\'' using offloading device interfaces (was: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rf9xbd0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":78699,"url":"https://patchwork.plctlab.org/api/1.2/patches/78699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d65cacfb9cbc7bf1a94791bf7213169b77ec213e.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:34:11","name":"Less warnings for parameters declared as arrays [PR98541, PR98536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d65cacfb9cbc7bf1a94791bf7213169b77ec213e.camel@tugraz.at/mbox/"},{"id":78702,"url":"https://patchwork.plctlab.org/api/1.2/patches/78702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ae251df8-8c79-4a58-bf78-ffb1daa7cdfe-1680551148829@3c-app-gmx-bs28/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:45:48","name":"Fortran: reject module variable as character length in PARAMETER [PR104349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ae251df8-8c79-4a58-bf78-ffb1daa7cdfe-1680551148829@3c-app-gmx-bs28/mbox/"},{"id":78704,"url":"https://patchwork.plctlab.org/api/1.2/patches/78704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCsu1qEUuowRqlWf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:53:58","name":"range-op-float: Fix reverse ops of comparisons [PR109386]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCsu1qEUuowRqlWf@tucnak/mbox/"},{"id":78836,"url":"https://patchwork.plctlab.org/api/1.2/patches/78836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404032248.2722677-1-jason@redhat.com/","msgid":"<20230404032248.2722677-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-04T03:22:48","name":"[pushed] c++: friend template matching [PR107484]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404032248.2722677-1-jason@redhat.com/mbox/"},{"id":78850,"url":"https://patchwork.plctlab.org/api/1.2/patches/78850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404051346.1223071-1-hongtao.liu@intel.com/","msgid":"<20230404051346.1223071-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-04T05:13:46","name":"Check hard_regno_mode_ok before setting lowest memory move cost for the mode with different reg classes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404051346.1223071-1-hongtao.liu@intel.com/mbox/"},{"id":78851,"url":"https://patchwork.plctlab.org/api/1.2/patches/78851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/caeae307-9630-68c3-6639-93f14394d9d8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T05:22:22","name":"testsuite: Adjust powerpc test case pr83677.c for BE [PR108815]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/caeae307-9630-68c3-6639-93f14394d9d8@linux.ibm.com/mbox/"},{"id":78894,"url":"https://patchwork.plctlab.org/api/1.2/patches/78894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404074903.4275-1-xuli1@eswincomputing.com/","msgid":"<20230404074903.4275-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-04-04T07:49:03","name":"RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404074903.4275-1-xuli1@eswincomputing.com/mbox/"},{"id":78914,"url":"https://patchwork.plctlab.org/api/1.2/patches/78914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd7cus12b4.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-04-04T08:25:51","name":"[COMMITTED] config: -pthread shouldn'\''t link with -lpthread on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd7cus12b4.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":78926,"url":"https://patchwork.plctlab.org/api/1.2/patches/78926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404083836.9153-1-xry111@xry111.site/","msgid":"<20230404083836.9153-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-04T08:38:36","name":"[GCC14,v2] LoongArch: Optimize additions with immediates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404083836.9153-1-xry111@xry111.site/mbox/"},{"id":78928,"url":"https://patchwork.plctlab.org/api/1.2/patches/78928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404084630.48657-1-juzhe.zhong@rivai.ai/","msgid":"<20230404084630.48657-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-04T08:46:30","name":"RISC-V: Fix PR109399 VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404084630.48657-1-juzhe.zhong@rivai.ai/mbox/"},{"id":78938,"url":"https://patchwork.plctlab.org/api/1.2/patches/78938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCvnXt00qMrZyJSM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-04T09:01:18","name":"riscv: Fix bootstrap [PR109384]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCvnXt00qMrZyJSM@tucnak/mbox/"},{"id":78961,"url":"https://patchwork.plctlab.org/api/1.2/patches/78961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7baea35-ea9d-5f11-520e-009c8da3735d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T09:57:57","name":"[committed] amdgcn: Add 64-bit vector not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7baea35-ea9d-5f11-520e-009c8da3735d@codesourcery.com/mbox/"},{"id":79010,"url":"https://patchwork.plctlab.org/api/1.2/patches/79010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404111724.243040-1-jwakely@redhat.com/","msgid":"<20230404111724.243040-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-04T11:17:24","name":"[committed] libstdc++: Fix outdated docs about demangling exception messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404111724.243040-1-jwakely@redhat.com/mbox/"},{"id":79021,"url":"https://patchwork.plctlab.org/api/1.2/patches/79021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com/","msgid":"<20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com>","list_archive_url":null,"date":"2023-04-04T11:32:35","name":"ree: Improvement of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com/mbox/"},{"id":79094,"url":"https://patchwork.plctlab.org/api/1.2/patches/79094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com/","msgid":"<4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com>","list_archive_url":null,"date":"2023-04-04T13:06:37","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com/mbox/"},{"id":79095,"url":"https://patchwork.plctlab.org/api/1.2/patches/79095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BF89C563-9663-4671-BCCB-24C7B6C26474@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T13:07:55","name":"[V6,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BF89C563-9663-4671-BCCB-24C7B6C26474@oracle.com/mbox/"},{"id":79256,"url":"https://patchwork.plctlab.org/api/1.2/patches/79256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404170857.608270-1-dmalcolm@redhat.com/","msgid":"<20230404170857.608270-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-04-04T17:08:57","name":"Add -fsarif-time-report [PR109361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404170857.608270-1-dmalcolm@redhat.com/mbox/"},{"id":79412,"url":"https://patchwork.plctlab.org/api/1.2/patches/79412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-1-arsen@aarsen.me/","msgid":"<20230404230950.158556-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:47","name":"[1/4] libstdc++: Harmonize and other headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-1-arsen@aarsen.me/mbox/"},{"id":79409,"url":"https://patchwork.plctlab.org/api/1.2/patches/79409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-2-arsen@aarsen.me/","msgid":"<20230404230950.158556-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:48","name":"[2/4] libstdc++: Add a test for FTM redefinitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-2-arsen@aarsen.me/mbox/"},{"id":79411,"url":"https://patchwork.plctlab.org/api/1.2/patches/79411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-3-arsen@aarsen.me/","msgid":"<20230404230950.158556-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:49","name":"[3/4] libstdc++: Downgrade DEBUG to ASSERTIONS when !HOSTED","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-3-arsen@aarsen.me/mbox/"},{"id":79410,"url":"https://patchwork.plctlab.org/api/1.2/patches/79410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-4-arsen@aarsen.me/","msgid":"<20230404230950.158556-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:50","name":"[4/4] libstdc++: Fix some freestanding test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-4-arsen@aarsen.me/mbox/"},{"id":79414,"url":"https://patchwork.plctlab.org/api/1.2/patches/79414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404233927.3B8BE2043D@pchp3.se.axis.com/","msgid":"<20230404233927.3B8BE2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-04T23:39:27","name":"[committed] doc: md.texi (Including Patterns): Fix page break","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404233927.3B8BE2043D@pchp3.se.axis.com/mbox/"},{"id":79504,"url":"https://patchwork.plctlab.org/api/1.2/patches/79504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmE5ohrwZMAjU+ju_pMcTbPMnYHGWixgdYUfx=abPn3nw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-05T08:38:26","name":"[match.pd,SVE] Add pattern to transform svrev(svrev(v)) --> v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmE5ohrwZMAjU+ju_pMcTbPMnYHGWixgdYUfx=abPn3nw@mail.gmail.com/mbox/"},{"id":79512,"url":"https://patchwork.plctlab.org/api/1.2/patches/79512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC04IGSaDzQarXvq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-05T08:58:08","name":"tree-vect-generic: Fix up ICE with SSA_NAME_OCCURS_IN_ABNORMAL_PHI [PR109392]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC04IGSaDzQarXvq@tucnak/mbox/"},{"id":79520,"url":"https://patchwork.plctlab.org/api/1.2/patches/79520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC08hc8fUczEywig@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-05T09:16:53","name":"dse: Handle SUBREGs of word REGs differently for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC08hc8fUczEywig@tucnak/mbox/"},{"id":79565,"url":"https://patchwork.plctlab.org/api/1.2/patches/79565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405112418.334349-1-jwakely@redhat.com/","msgid":"<20230405112418.334349-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-05T11:24:18","name":"[committed] libstdc++: Define std::sub_match::swap member function (LWG 3204)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405112418.334349-1-jwakely@redhat.com/mbox/"},{"id":79582,"url":"https://patchwork.plctlab.org/api/1.2/patches/79582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405120833.3598320-1-julian@codesourcery.com/","msgid":"<20230405120833.3598320-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-05T12:08:33","name":"[og12] OpenMP: Fix checking ICE in \"declare target\" ctor/dtor support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405120833.3598320-1-julian@codesourcery.com/mbox/"},{"id":79621,"url":"https://patchwork.plctlab.org/api/1.2/patches/79621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-2-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:44","name":"[committed,01/88] gccrs: fatal_error_flag: Fix typo in error message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-2-arthur.cohen@embecosm.com/mbox/"},{"id":79617,"url":"https://patchwork.plctlab.org/api/1.2/patches/79617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-3-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:45","name":"[committed,02/88] gccrs: unsafe: check use of `target_feature` attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-3-arthur.cohen@embecosm.com/mbox/"},{"id":79620,"url":"https://patchwork.plctlab.org/api/1.2/patches/79620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-4-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:47","name":"[committed,03/88] gccrs: Check for mutable references in const functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-4-arthur.cohen@embecosm.com/mbox/"},{"id":79623,"url":"https://patchwork.plctlab.org/api/1.2/patches/79623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-5-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:48","name":"[committed,04/88] gccrs: rust: add bound parsing in parse_generic_arg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-5-arthur.cohen@embecosm.com/mbox/"},{"id":79619,"url":"https://patchwork.plctlab.org/api/1.2/patches/79619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-6-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:49","name":"[committed,05/88] gccrs: Implement declarative macro 2.0 parser","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-6-arthur.cohen@embecosm.com/mbox/"},{"id":79622,"url":"https://patchwork.plctlab.org/api/1.2/patches/79622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-7-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:50","name":"[committed,06/88] gccrs: Add name resolution to generic argument associated item bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-7-arthur.cohen@embecosm.com/mbox/"},{"id":79630,"url":"https://patchwork.plctlab.org/api/1.2/patches/79630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-8-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:51","name":"[committed,07/88] gccrs: Support associated type bound arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-8-arthur.cohen@embecosm.com/mbox/"},{"id":79626,"url":"https://patchwork.plctlab.org/api/1.2/patches/79626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-9-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:52","name":"[committed,08/88] gccrs: Reuse TypeCheckPattern on LetStmt'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-9-arthur.cohen@embecosm.com/mbox/"},{"id":79625,"url":"https://patchwork.plctlab.org/api/1.2/patches/79625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-10-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:53","name":"[committed,09/88] gccrs: Add get_locus function for abstract class MetaItemInner.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-10-arthur.cohen@embecosm.com/mbox/"},{"id":79627,"url":"https://patchwork.plctlab.org/api/1.2/patches/79627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-11-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:54","name":"[committed,10/88] gccrs: diagnostics: Add underline for tokens in diagnostics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-11-arthur.cohen@embecosm.com/mbox/"},{"id":79624,"url":"https://patchwork.plctlab.org/api/1.2/patches/79624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-12-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:55","name":"[committed,11/88] gccrs: Change how CompileVarDecl outputs Bvariable'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-12-arthur.cohen@embecosm.com/mbox/"},{"id":79640,"url":"https://patchwork.plctlab.org/api/1.2/patches/79640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-13-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:56","name":"[committed,12/88] gccrs: testsuite: Handle Windows carriage returns properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-13-arthur.cohen@embecosm.com/mbox/"},{"id":79629,"url":"https://patchwork.plctlab.org/api/1.2/patches/79629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-14-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:57","name":"[committed,13/88] gccrs: Support GroupedPattern during name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-14-arthur.cohen@embecosm.com/mbox/"},{"id":79628,"url":"https://patchwork.plctlab.org/api/1.2/patches/79628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-15-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:58","name":"[committed,14/88] gccrs: Do not crash on empty macros expand. Fixes #1712","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-15-arthur.cohen@embecosm.com/mbox/"},{"id":79631,"url":"https://patchwork.plctlab.org/api/1.2/patches/79631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-16-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:59","name":"[committed,15/88] gccrs: Add HIR lowering for GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-16-arthur.cohen@embecosm.com/mbox/"},{"id":79641,"url":"https://patchwork.plctlab.org/api/1.2/patches/79641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-17-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:00","name":"[committed,16/88] gccrs: Add get_item method for HIR::GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-17-arthur.cohen@embecosm.com/mbox/"},{"id":79632,"url":"https://patchwork.plctlab.org/api/1.2/patches/79632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-18-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:01","name":"[committed,17/88] gccrs: Add type resolution for grouped patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-18-arthur.cohen@embecosm.com/mbox/"},{"id":79635,"url":"https://patchwork.plctlab.org/api/1.2/patches/79635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-19-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:02","name":"[committed,18/88] gccrs: Added missing GroupedPattern visitors for code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-19-arthur.cohen@embecosm.com/mbox/"},{"id":79658,"url":"https://patchwork.plctlab.org/api/1.2/patches/79658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-20-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:03","name":"[committed,19/88] gccrs: Rename file rust-ast-full-test.cc to rust-ast.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-20-arthur.cohen@embecosm.com/mbox/"},{"id":79660,"url":"https://patchwork.plctlab.org/api/1.2/patches/79660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-21-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:04","name":"[committed,20/88] gccrs: moved operator.h to util/rust-operators.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-21-arthur.cohen@embecosm.com/mbox/"},{"id":79671,"url":"https://patchwork.plctlab.org/api/1.2/patches/79671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-22-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:05","name":"[committed,21/88] gccrs: fixed compiler error message on wildcard pattern within expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-22-arthur.cohen@embecosm.com/mbox/"},{"id":79668,"url":"https://patchwork.plctlab.org/api/1.2/patches/79668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-23-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:06","name":"[committed,22/88] gccrs: fixed indentations in AST pretty expanded dump of trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-23-arthur.cohen@embecosm.com/mbox/"},{"id":79647,"url":"https://patchwork.plctlab.org/api/1.2/patches/79647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-24-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:07","name":"[committed,23/88] gccrs: macro: Allow builtin `MacroInvocation`s within the AST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-24-arthur.cohen@embecosm.com/mbox/"},{"id":79654,"url":"https://patchwork.plctlab.org/api/1.2/patches/79654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-25-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:08","name":"[committed,24/88] gccrs: Create and use CompilePatternLet visitor for compiling let statments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-25-arthur.cohen@embecosm.com/mbox/"},{"id":79662,"url":"https://patchwork.plctlab.org/api/1.2/patches/79662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-26-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:09","name":"[committed,25/88] gccrs: parser: Allow parsing multiple reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-26-arthur.cohen@embecosm.com/mbox/"},{"id":79667,"url":"https://patchwork.plctlab.org/api/1.2/patches/79667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-27-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:10","name":"[committed,26/88] gccrs: Move rust-buffered-queue.h to util folder #1766","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-27-arthur.cohen@embecosm.com/mbox/"},{"id":79670,"url":"https://patchwork.plctlab.org/api/1.2/patches/79670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-28-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:11","name":"[committed,27/88] gccrs: Improve GroupedPattern lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-28-arthur.cohen@embecosm.com/mbox/"},{"id":79672,"url":"https://patchwork.plctlab.org/api/1.2/patches/79672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-29-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:12","name":"[committed,28/88] gccrs: Remove HIR::GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-29-arthur.cohen@embecosm.com/mbox/"},{"id":79673,"url":"https://patchwork.plctlab.org/api/1.2/patches/79673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-30-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:13","name":"[committed,29/88] gccrs: Optimize HIR::ReferencePattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-30-arthur.cohen@embecosm.com/mbox/"},{"id":79674,"url":"https://patchwork.plctlab.org/api/1.2/patches/79674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-31-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:14","name":"[committed,30/88] gccrs: Implement lowering ReferencePattern from AST to HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-31-arthur.cohen@embecosm.com/mbox/"},{"id":79682,"url":"https://patchwork.plctlab.org/api/1.2/patches/79682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-32-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:15","name":"[committed,31/88] gccrs: parser: Improve parsing of complex generic arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-32-arthur.cohen@embecosm.com/mbox/"},{"id":79678,"url":"https://patchwork.plctlab.org/api/1.2/patches/79678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-33-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:16","name":"[committed,32/88] gccrs: parser: Fix parsing of closure param list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-33-arthur.cohen@embecosm.com/mbox/"},{"id":79680,"url":"https://patchwork.plctlab.org/api/1.2/patches/79680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-34-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:17","name":"[committed,33/88] gccrs: Add support for feature check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-34-arthur.cohen@embecosm.com/mbox/"},{"id":79675,"url":"https://patchwork.plctlab.org/api/1.2/patches/79675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-35-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:18","name":"[committed,34/88] gccrs: Removed comment copy-pasted from gcc/tree.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-35-arthur.cohen@embecosm.com/mbox/"},{"id":79687,"url":"https://patchwork.plctlab.org/api/1.2/patches/79687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-36-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:19","name":"[committed,35/88] gccrs: Add another test case for passing associated type-bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-36-arthur.cohen@embecosm.com/mbox/"},{"id":79676,"url":"https://patchwork.plctlab.org/api/1.2/patches/79676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-37-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:20","name":"[committed,36/88] gccrs: Move TypePredicateItem impl out of the header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-37-arthur.cohen@embecosm.com/mbox/"},{"id":79679,"url":"https://patchwork.plctlab.org/api/1.2/patches/79679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-38-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:21","name":"[committed,37/88] gccrs: Refactor TyVar and TypeBoundPredicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-38-arthur.cohen@embecosm.com/mbox/"},{"id":79677,"url":"https://patchwork.plctlab.org/api/1.2/patches/79677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-39-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:22","name":"[committed,38/88] gccrs: Refactor SubstitutionRef base class into its own CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-39-arthur.cohen@embecosm.com/mbox/"},{"id":79699,"url":"https://patchwork.plctlab.org/api/1.2/patches/79699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-40-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:23","name":"[committed,39/88] gccrs: Refactor all substitution mapper code implementation into its own CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-40-arthur.cohen@embecosm.com/mbox/"},{"id":79684,"url":"https://patchwork.plctlab.org/api/1.2/patches/79684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-41-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:24","name":"[committed,40/88] gccrs: Refactor BaseType, InferType and ErrorType impl into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-41-arthur.cohen@embecosm.com/mbox/"},{"id":79690,"url":"https://patchwork.plctlab.org/api/1.2/patches/79690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-42-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:25","name":"[committed,41/88] gccrs: Refactor PathProbe into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-42-arthur.cohen@embecosm.com/mbox/"},{"id":79685,"url":"https://patchwork.plctlab.org/api/1.2/patches/79685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-43-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:26","name":"[committed,42/88] gccrs: Refactor PathProbeType code into CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-43-arthur.cohen@embecosm.com/mbox/"},{"id":79701,"url":"https://patchwork.plctlab.org/api/1.2/patches/79701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-44-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:27","name":"[committed,43/88] gccrs: Refactor all code out of the rust-tyty.h header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-44-arthur.cohen@embecosm.com/mbox/"},{"id":79689,"url":"https://patchwork.plctlab.org/api/1.2/patches/79689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-45-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:28","name":"[committed,44/88] gccrs: Rename rust-tyctx.cc to rust-typecheck-context.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-45-arthur.cohen@embecosm.com/mbox/"},{"id":79706,"url":"https://patchwork.plctlab.org/api/1.2/patches/79706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-46-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:29","name":"[committed,45/88] gccrs: Rename header rust-hir-trait-ref.h to rust-hir-trait-reference.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-46-arthur.cohen@embecosm.com/mbox/"},{"id":79694,"url":"https://patchwork.plctlab.org/api/1.2/patches/79694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-47-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:30","name":"[committed,46/88] gccrs: Refactor handle_substitutions to take a reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-47-arthur.cohen@embecosm.com/mbox/"},{"id":79695,"url":"https://patchwork.plctlab.org/api/1.2/patches/79695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-48-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-48-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:31","name":"[committed,47/88] gccrs: Clear the substitution callbacks when copying ArgumentMappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-48-arthur.cohen@embecosm.com/mbox/"},{"id":79711,"url":"https://patchwork.plctlab.org/api/1.2/patches/79711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-49-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-49-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:32","name":"[committed,48/88] gccrs: Add missing param subst callback","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-49-arthur.cohen@embecosm.com/mbox/"},{"id":79698,"url":"https://patchwork.plctlab.org/api/1.2/patches/79698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-50-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-50-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:33","name":"[committed,49/88] gccrs: Remove monomorphization hack to setup possible associated types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-50-arthur.cohen@embecosm.com/mbox/"},{"id":79715,"url":"https://patchwork.plctlab.org/api/1.2/patches/79715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-51-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-51-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:34","name":"[committed,50/88] gccrs: Refactor the type unification code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-51-arthur.cohen@embecosm.com/mbox/"},{"id":79681,"url":"https://patchwork.plctlab.org/api/1.2/patches/79681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-52-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-52-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:35","name":"[committed,51/88] gccrs: Fix nullptr dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-52-arthur.cohen@embecosm.com/mbox/"},{"id":79686,"url":"https://patchwork.plctlab.org/api/1.2/patches/79686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-53-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-53-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:36","name":"[committed,52/88] gccrs: Add missing Sized, Copy and Clone lang item mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-53-arthur.cohen@embecosm.com/mbox/"},{"id":79708,"url":"https://patchwork.plctlab.org/api/1.2/patches/79708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-54-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-54-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:37","name":"[committed,53/88] gccrs: Fix higher ranked trait bounds computation of self","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-54-arthur.cohen@embecosm.com/mbox/"},{"id":79710,"url":"https://patchwork.plctlab.org/api/1.2/patches/79710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-55-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-55-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:38","name":"[committed,54/88] gccrs: Remove bad error message on checking function arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-55-arthur.cohen@embecosm.com/mbox/"},{"id":79716,"url":"https://patchwork.plctlab.org/api/1.2/patches/79716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-56-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-56-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:39","name":"[committed,55/88] gccrs: Add general TypeBounds checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-56-arthur.cohen@embecosm.com/mbox/"},{"id":79712,"url":"https://patchwork.plctlab.org/api/1.2/patches/79712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-57-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-57-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:40","name":"[committed,56/88] gccrs: Add support for TuplePattern in let statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-57-arthur.cohen@embecosm.com/mbox/"},{"id":79721,"url":"https://patchwork.plctlab.org/api/1.2/patches/79721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-58-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-58-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:41","name":"[committed,57/88] gccrs: rust-item: include rust-expr.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-58-arthur.cohen@embecosm.com/mbox/"},{"id":79717,"url":"https://patchwork.plctlab.org/api/1.2/patches/79717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-59-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-59-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:42","name":"[committed,58/88] gccrs: parser: Expose parse_macro_invocation as public API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-59-arthur.cohen@embecosm.com/mbox/"},{"id":79720,"url":"https://patchwork.plctlab.org/api/1.2/patches/79720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-60-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-60-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:43","name":"[committed,59/88] gccrs: expansion: Add `get_token_slice` to `MacroInvocLexer` class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-60-arthur.cohen@embecosm.com/mbox/"},{"id":79722,"url":"https://patchwork.plctlab.org/api/1.2/patches/79722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-61-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-61-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:44","name":"[committed,60/88] gccrs: macros: Perform macro expansion in a fixed-point fashion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-61-arthur.cohen@embecosm.com/mbox/"},{"id":79691,"url":"https://patchwork.plctlab.org/api/1.2/patches/79691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-62-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-62-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:45","name":"[committed,61/88] gccrs: expander: Add documentation for `expand_eager_invocations`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-62-arthur.cohen@embecosm.com/mbox/"},{"id":79719,"url":"https://patchwork.plctlab.org/api/1.2/patches/79719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-63-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-63-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:46","name":"[committed,62/88] gccrs: typecheck: Refactor rust-hir-trait-reference.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-63-arthur.cohen@embecosm.com/mbox/"},{"id":79723,"url":"https://patchwork.plctlab.org/api/1.2/patches/79723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-64-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-64-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:47","name":"[committed,63/88] gccrs: cli: Update safety warning message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-64-arthur.cohen@embecosm.com/mbox/"},{"id":79724,"url":"https://patchwork.plctlab.org/api/1.2/patches/79724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-65-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-65-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:48","name":"[committed,64/88] gccrs: Update copyright years.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-65-arthur.cohen@embecosm.com/mbox/"},{"id":79725,"url":"https://patchwork.plctlab.org/api/1.2/patches/79725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-66-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-66-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:49","name":"[committed,65/88] gccrs: Add feature gate for \"rust-intrinsic\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-66-arthur.cohen@embecosm.com/mbox/"},{"id":79697,"url":"https://patchwork.plctlab.org/api/1.2/patches/79697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-67-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-67-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:50","name":"[committed,66/88] gccrs: Add variadic argument type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-67-arthur.cohen@embecosm.com/mbox/"},{"id":79726,"url":"https://patchwork.plctlab.org/api/1.2/patches/79726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-68-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-68-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:51","name":"[committed,67/88] gccrs: Add test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-68-arthur.cohen@embecosm.com/mbox/"},{"id":79728,"url":"https://patchwork.plctlab.org/api/1.2/patches/79728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-69-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-69-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:52","name":"[committed,68/88] gccrs: Simplify WildcardPattern let statement handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-69-arthur.cohen@embecosm.com/mbox/"},{"id":79702,"url":"https://patchwork.plctlab.org/api/1.2/patches/79702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-70-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-70-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:53","name":"[committed,69/88] gccrs: lex: Prevent directories in RAIIFile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-70-arthur.cohen@embecosm.com/mbox/"},{"id":79709,"url":"https://patchwork.plctlab.org/api/1.2/patches/79709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-71-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-71-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:54","name":"[committed,70/88] gccrs: testsuite: Add empty string macro test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-71-arthur.cohen@embecosm.com/mbox/"},{"id":79727,"url":"https://patchwork.plctlab.org/api/1.2/patches/79727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-72-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-72-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:55","name":"[committed,71/88] gccrs: Add support for parsing empty tuple patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-72-arthur.cohen@embecosm.com/mbox/"},{"id":79729,"url":"https://patchwork.plctlab.org/api/1.2/patches/79729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-74-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-74-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:57","name":"[committed,73/88] gccrs: Extract query_type from TypeCheckBase to be a simple extern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-74-arthur.cohen@embecosm.com/mbox/"},{"id":79714,"url":"https://patchwork.plctlab.org/api/1.2/patches/79714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-75-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-75-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:58","name":"[committed,74/88] gccrs: Add new virtual function HIR::ImplItem::get_impl_item_name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-75-arthur.cohen@embecosm.com/mbox/"},{"id":79738,"url":"https://patchwork.plctlab.org/api/1.2/patches/79738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-76-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-76-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:59","name":"[committed,75/88] gccrs: Support for Sized builtin marker trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-76-arthur.cohen@embecosm.com/mbox/"},{"id":79732,"url":"https://patchwork.plctlab.org/api/1.2/patches/79732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-77-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-77-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:00","name":"[committed,76/88] gccrs: Fix regression in testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-77-arthur.cohen@embecosm.com/mbox/"},{"id":79731,"url":"https://patchwork.plctlab.org/api/1.2/patches/79731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-78-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-78-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:01","name":"[committed,77/88] gccrs: Add trailing newline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-78-arthur.cohen@embecosm.com/mbox/"},{"id":79730,"url":"https://patchwork.plctlab.org/api/1.2/patches/79730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-79-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-79-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:02","name":"[committed,78/88] gccrs: builtins: Return empty list of tokens instead of nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-79-arthur.cohen@embecosm.com/mbox/"},{"id":79735,"url":"https://patchwork.plctlab.org/api/1.2/patches/79735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-80-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-80-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:03","name":"[committed,79/88] gccrs: Fix formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-80-arthur.cohen@embecosm.com/mbox/"},{"id":79734,"url":"https://patchwork.plctlab.org/api/1.2/patches/79734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-81-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-81-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:04","name":"[committed,80/88] gccrs: Add AST::AltPattern class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-81-arthur.cohen@embecosm.com/mbox/"},{"id":79718,"url":"https://patchwork.plctlab.org/api/1.2/patches/79718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-82-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-82-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:05","name":"[committed,81/88] gccrs: Fix up DejaGnu directives in '\''rust/compile/issue-1830_{bytes, str}.rs'\'' test cases [#1838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-82-arthur.cohen@embecosm.com/mbox/"},{"id":79737,"url":"https://patchwork.plctlab.org/api/1.2/patches/79737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-83-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-83-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:06","name":"[committed,82/88] gccrs: rename rust-hir-full-tests.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-83-arthur.cohen@embecosm.com/mbox/"},{"id":79740,"url":"https://patchwork.plctlab.org/api/1.2/patches/79740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-84-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-84-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:07","name":"[committed,83/88] gccrs: add test case to show our query-type system is working","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-84-arthur.cohen@embecosm.com/mbox/"},{"id":79733,"url":"https://patchwork.plctlab.org/api/1.2/patches/79733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-85-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-85-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:08","name":"[committed,84/88] gccrs: ast: Refactor TraitItem to keep Location info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-85-arthur.cohen@embecosm.com/mbox/"},{"id":79736,"url":"https://patchwork.plctlab.org/api/1.2/patches/79736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-86-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-86-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:09","name":"[committed,85/88] gccrs: diagnostic: Refactor Error class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-86-arthur.cohen@embecosm.com/mbox/"},{"id":79744,"url":"https://patchwork.plctlab.org/api/1.2/patches/79744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-87-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-87-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:10","name":"[committed,86/88] gccrs: Added AST Node AST::InlineAsm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-87-arthur.cohen@embecosm.com/mbox/"},{"id":79739,"url":"https://patchwork.plctlab.org/api/1.2/patches/79739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-88-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-88-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:11","name":"[committed,87/88] gccrs: Address unsafe with/without block handling ambiguity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-88-arthur.cohen@embecosm.com/mbox/"},{"id":79742,"url":"https://patchwork.plctlab.org/api/1.2/patches/79742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-89-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-89-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:12","name":"[committed,88/88] gccrs: Fix issue with parsing unsafe block expression statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-89-arthur.cohen@embecosm.com/mbox/"},{"id":79758,"url":"https://patchwork.plctlab.org/api/1.2/patches/79758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2LJcmv8Gd2X0Q0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-05T14:52:21","name":"[committed] hppa: Add assember CFI directives to millicode division and remainder routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2LJcmv8Gd2X0Q0@mx3210.localdomain/mbox/"},{"id":79772,"url":"https://patchwork.plctlab.org/api/1.2/patches/79772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2YKR0I073iqang@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-05T15:47:53","name":"[committed] hppa: Fix 22_locale/locale/cons/12658_thread-2.cc on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2YKR0I073iqang@mx3210.localdomain/mbox/"},{"id":79820,"url":"https://patchwork.plctlab.org/api/1.2/patches/79820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405165927.1987914-1-ppalka@redhat.com/","msgid":"<20230405165927.1987914-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-05T16:59:27","name":"c++: '\''typename T::X'\'' vs '\''struct T::X'\'' lookup [PR109420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405165927.1987914-1-ppalka@redhat.com/mbox/"},{"id":79905,"url":"https://patchwork.plctlab.org/api/1.2/patches/79905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a81da3-99ab-482e-14aa-59a8f1025ffe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-05T20:10:25","name":"PR tree-optimization/109417 - Check if dependency is valid before using in may_recompute_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a81da3-99ab-482e-14aa-59a8f1025ffe@redhat.com/mbox/"},{"id":79941,"url":"https://patchwork.plctlab.org/api/1.2/patches/79941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-2-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:11","name":"[v2,1/8] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-2-patrick@rivosinc.com/mbox/"},{"id":79949,"url":"https://patchwork.plctlab.org/api/1.2/patches/79949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-3-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:12","name":"[v2,2/8] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-3-patrick@rivosinc.com/mbox/"},{"id":79951,"url":"https://patchwork.plctlab.org/api/1.2/patches/79951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-4-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:13","name":"[v2,3/8] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-4-patrick@rivosinc.com/mbox/"},{"id":79942,"url":"https://patchwork.plctlab.org/api/1.2/patches/79942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-5-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:14","name":"[v2,4/8] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-5-patrick@rivosinc.com/mbox/"},{"id":79944,"url":"https://patchwork.plctlab.org/api/1.2/patches/79944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-6-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:15","name":"[v2,5/8] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-6-patrick@rivosinc.com/mbox/"},{"id":79945,"url":"https://patchwork.plctlab.org/api/1.2/patches/79945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-7-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:16","name":"[v2,6/8] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-7-patrick@rivosinc.com/mbox/"},{"id":79952,"url":"https://patchwork.plctlab.org/api/1.2/patches/79952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-8-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:17","name":"[v2,7/8] RISCV: Weaken atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-8-patrick@rivosinc.com/mbox/"},{"id":79953,"url":"https://patchwork.plctlab.org/api/1.2/patches/79953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-9-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:18","name":"[v2,8/8] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-9-patrick@rivosinc.com/mbox/"},{"id":80045,"url":"https://patchwork.plctlab.org/api/1.2/patches/80045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406041530.256933-1-apinski@marvell.com/","msgid":"<20230406041530.256933-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-06T04:15:30","name":"Fix typo in -param=vect-induction-float= attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406041530.256933-1-apinski@marvell.com/mbox/"},{"id":80049,"url":"https://patchwork.plctlab.org/api/1.2/patches/80049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406042526.257487-1-apinski@marvell.com/","msgid":"<20230406042526.257487-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-06T04:25:26","name":"Fix typo in -param=vect-induction-float= attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406042526.257487-1-apinski@marvell.com/mbox/"},{"id":80052,"url":"https://patchwork.plctlab.org/api/1.2/patches/80052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com/","msgid":"<59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com>","list_archive_url":null,"date":"2023-04-06T05:35:20","name":"[PATCHv3,rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com/mbox/"},{"id":80060,"url":"https://patchwork.plctlab.org/api/1.2/patches/80060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8i98rdn.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-06T06:19:16","name":"[testsuite,ppc] skip ppc-fortran if fortran is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8i98rdn.fsf@lxoliva.fsfla.org/mbox/"},{"id":80067,"url":"https://patchwork.plctlab.org/api/1.2/patches/80067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-2-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:14","name":"[1/5] RISC-V: Minimal support for ZC extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-2-jiawei@iscas.ac.cn/mbox/"},{"id":80065,"url":"https://patchwork.plctlab.org/api/1.2/patches/80065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-3-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:15","name":"[2/5] RISC-V: Enable compressible features when use ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-3-jiawei@iscas.ac.cn/mbox/"},{"id":80064,"url":"https://patchwork.plctlab.org/api/1.2/patches/80064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-4-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:16","name":"[3/5] RISC-V: Add ZC* test for march args being passed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-4-jiawei@iscas.ac.cn/mbox/"},{"id":80066,"url":"https://patchwork.plctlab.org/api/1.2/patches/80066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-5-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-5-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:17","name":"[4/5] RISC-V: Add Zcmp extension supports.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-5-jiawei@iscas.ac.cn/mbox/"},{"id":80068,"url":"https://patchwork.plctlab.org/api/1.2/patches/80068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-6-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-6-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:18","name":"[5/5] RISC-V: Add ZCMP push/pop testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-6-jiawei@iscas.ac.cn/mbox/"},{"id":80069,"url":"https://patchwork.plctlab.org/api/1.2/patches/80069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062737.79723-1-iain@sandoe.co.uk/","msgid":"<20230406062737.79723-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-04-06T06:27:37","name":"c++, coroutines: Fix block nests when the function has no top-level bind.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062737.79723-1-iain@sandoe.co.uk/mbox/"},{"id":80114,"url":"https://patchwork.plctlab.org/api/1.2/patches/80114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406072807.3434931-1-indu.bhagat@oracle.com/","msgid":"<20230406072807.3434931-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-04-06T07:28:07","name":"[Committed] MAINTAINERS: Add myself as CTF and BTF reviewer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406072807.3434931-1-indu.bhagat@oracle.com/mbox/"},{"id":80137,"url":"https://patchwork.plctlab.org/api/1.2/patches/80137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406081900.3588715-1-chenglulu@loongson.cn/","msgid":"<20230406081900.3588715-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-06T08:19:01","name":"LoongArch: Add built-in functions description of LoongArch BASE instruction set instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406081900.3588715-1-chenglulu@loongson.cn/mbox/"},{"id":80161,"url":"https://patchwork.plctlab.org/api/1.2/patches/80161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6Uzf9gu8sWW7+K@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-06T09:45:49","name":"riscv: Fix genrvv-type-indexer dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6Uzf9gu8sWW7+K@tucnak/mbox/"},{"id":80184,"url":"https://patchwork.plctlab.org/api/1.2/patches/80184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6fiaL9vIiqZJ7z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:31:37","name":"combine: Fix simplify_comparison AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6fiaL9vIiqZJ7z@tucnak/mbox/"},{"id":80189,"url":"https://patchwork.plctlab.org/api/1.2/patches/80189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406103533.1087349-1-arsen@aarsen.me/","msgid":"<20230406103533.1087349-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-06T10:35:34","name":"update_web_docs_git: Add updated Texinfo to PATH","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406103533.1087349-1-arsen@aarsen.me/mbox/"},{"id":80191,"url":"https://patchwork.plctlab.org/api/1.2/patches/80191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17159-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:43:34","name":"[3/3] RFC - match.pd: automatically partition *-match.cc files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17159-tamar@arm.com/mbox/"},{"id":80192,"url":"https://patchwork.plctlab.org/api/1.2/patches/80192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com/","msgid":"<466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com>","list_archive_url":null,"date":"2023-04-06T10:49:53","name":"[v2] ree: Improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com/mbox/"},{"id":80193,"url":"https://patchwork.plctlab.org/api/1.2/patches/80193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17157-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:56:01","name":"[1/3] RFC match.pd: don'\''t emit label if not needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17157-tamar@arm.com/mbox/"},{"id":80194,"url":"https://patchwork.plctlab.org/api/1.2/patches/80194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6lb7jIu2t7kssM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:56:47","name":"[2/3] RFC - match.pd: simplify debug dump checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6lb7jIu2t7kssM@arm.com/mbox/"},{"id":80212,"url":"https://patchwork.plctlab.org/api/1.2/patches/80212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406113322.3182296-1-yashinde145@gmail.com/","msgid":"<20230406113322.3182296-1-yashinde145@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:33:22","name":"Add ssp_nonshared to link commandline for musl targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406113322.3182296-1-yashinde145@gmail.com/mbox/"},{"id":80213,"url":"https://patchwork.plctlab.org/api/1.2/patches/80213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114158.3182468-1-raj.khem@gmail.com/","msgid":"<20230406114158.3182468-1-raj.khem@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:41:58","name":"gcc: armv4: pass fix-v4bx to linker to support EABI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114158.3182468-1-raj.khem@gmail.com/mbox/"},{"id":80214,"url":"https://patchwork.plctlab.org/api/1.2/patches/80214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114906.3182600-1-yashinde145@gmail.com/","msgid":"<20230406114906.3182600-1-yashinde145@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:49:06","name":"Search target sysroot gcc version specific dirs with multilib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114906.3182600-1-yashinde145@gmail.com/mbox/"},{"id":80248,"url":"https://patchwork.plctlab.org/api/1.2/patches/80248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406133441.1944365-1-yanzhang.wang@intel.com/","msgid":"<20230406133441.1944365-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-06T13:34:41","name":"RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406133441.1944365-1-yanzhang.wang@intel.com/mbox/"},{"id":80251,"url":"https://patchwork.plctlab.org/api/1.2/patches/80251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3041a27a-8599-23da-237b-d802f83c40ae@suse.cz/","msgid":"<3041a27a-8599-23da-237b-d802f83c40ae@suse.cz>","list_archive_url":null,"date":"2023-04-06T13:58:35","name":"gcov: add info about \"calls\" to JSON output format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3041a27a-8599-23da-237b-d802f83c40ae@suse.cz/mbox/"},{"id":80285,"url":"https://patchwork.plctlab.org/api/1.2/patches/80285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-2-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:20","name":"[1/3] VECT: Add WHILE_LEN pattern to support decrement IV manipulation for loop vectorizer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-2-juzhe.zhong@rivai.ai/mbox/"},{"id":80288,"url":"https://patchwork.plctlab.org/api/1.2/patches/80288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-3-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:21","name":"[2/3] RISC-V: Enable basic RVV auto-vectorization and support WHILE_LEN/LEN_LOAD/LEN_STORE pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-3-juzhe.zhong@rivai.ai/mbox/"},{"id":80289,"url":"https://patchwork.plctlab.org/api/1.2/patches/80289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-4-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:22","name":"RISC-V: Add RVV auto-vectorization testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-4-juzhe.zhong@rivai.ai/mbox/"},{"id":80308,"url":"https://patchwork.plctlab.org/api/1.2/patches/80308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC7hS75ohXMo7Qcw@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-06T15:12:11","name":"PR target/70243: Do not generate fmaddfp and fnmsubfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC7hS75ohXMo7Qcw@toto.the-meissners.org/mbox/"},{"id":80324,"url":"https://patchwork.plctlab.org/api/1.2/patches/80324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406153620.931820-1-rearnsha@arm.com/","msgid":"<20230406153620.931820-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-04-06T15:36:20","name":"[committed] arm: mve: fix auto-inc generation [PR107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406153620.931820-1-rearnsha@arm.com/mbox/"},{"id":80383,"url":"https://patchwork.plctlab.org/api/1.2/patches/80383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com/","msgid":"<26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com>","list_archive_url":null,"date":"2023-04-06T18:02:05","name":"[committed,testsuite] arm: remove unused variables from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com/mbox/"},{"id":80392,"url":"https://patchwork.plctlab.org/api/1.2/patches/80392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com/","msgid":"<14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com>","list_archive_url":null,"date":"2023-04-06T18:56:39","name":"'\''omp scan'\'' struct block seq update for OpenMP 5.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com/mbox/"},{"id":80593,"url":"https://patchwork.plctlab.org/api/1.2/patches/80593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407011143.46004-1-juzhe.zhong@rivai.ai/","msgid":"<20230407011143.46004-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:11:43","name":"RISC-V: Fix incorrect condition of EEW = 64 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407011143.46004-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80595,"url":"https://patchwork.plctlab.org/api/1.2/patches/80595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012129.63142-1-juzhe.zhong@rivai.ai/","msgid":"<20230407012129.63142-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:21:29","name":"RISC-V: Add RVV auto-vectorization compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012129.63142-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80597,"url":"https://patchwork.plctlab.org/api/1.2/patches/80597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012503.65215-1-juzhe.zhong@rivai.ai/","msgid":"<20230407012503.65215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:25:03","name":"RISC-V: Enable basic RVV auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012503.65215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80599,"url":"https://patchwork.plctlab.org/api/1.2/patches/80599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013413.127686-1-juzhe.zhong@rivai.ai/","msgid":"<20230407013413.127686-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:34:13","name":"RISC-V: Add local user vsetvl instruction elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013413.127686-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80600,"url":"https://patchwork.plctlab.org/api/1.2/patches/80600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013701.129875-1-juzhe.zhong@rivai.ai/","msgid":"<20230407013701.129875-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:37:01","name":"RISC-V: Add testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013701.129875-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80602,"url":"https://patchwork.plctlab.org/api/1.2/patches/80602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407014741.139387-1-juzhe.zhong@rivai.ai/","msgid":"<20230407014741.139387-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:47:41","name":"VECT: Add WHILE_LEN pattern for decrement IV support for auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407014741.139387-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80644,"url":"https://patchwork.plctlab.org/api/1.2/patches/80644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-1-shiyulong@iscas.ac.cn/","msgid":"<20230407033702.6770-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-07T03:37:01","name":"[V4] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-1-shiyulong@iscas.ac.cn/mbox/"},{"id":80645,"url":"https://patchwork.plctlab.org/api/1.2/patches/80645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-2-shiyulong@iscas.ac.cn/","msgid":"<20230407033702.6770-2-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-07T03:37:02","name":"[V2] RISC-V: Modified validation information for contracts-tmpl-spec2.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-2-shiyulong@iscas.ac.cn/mbox/"},{"id":80660,"url":"https://patchwork.plctlab.org/api/1.2/patches/80660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000201d96911$5824d670$086e8350$@pony-e.jp/","msgid":"<000201d96911$5824d670$086e8350$@pony-e.jp>","list_archive_url":null,"date":"2023-04-07T05:25:19","name":"PR target/109402: v850 (not v850e) variant of __muldi3() moves sp in reversed direction [PR109402]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000201d96911$5824d670$086e8350$@pony-e.jp/mbox/"},{"id":80668,"url":"https://patchwork.plctlab.org/api/1.2/patches/80668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC+5WQxocwgkig/1@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-07T06:34:01","name":"[V2] PR target/70243: Do not generate vmaddfp and vnmsubfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC+5WQxocwgkig/1@toto.the-meissners.org/mbox/"},{"id":80672,"url":"https://patchwork.plctlab.org/api/1.2/patches/80672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407065940.2331101-1-yanzhang.wang@intel.com/","msgid":"<20230407065940.2331101-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-07T06:59:40","name":"[v2] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407065940.2331101-1-yanzhang.wang@intel.com/mbox/"},{"id":80699,"url":"https://patchwork.plctlab.org/api/1.2/patches/80699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407083820.752753-1-chenglulu@loongson.cn/","msgid":"<20230407083820.752753-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-07T08:38:20","name":"[v2] LoongArch: Add built-in functions description of LoongArch Base instruction set instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407083820.752753-1-chenglulu@loongson.cn/mbox/"},{"id":80774,"url":"https://patchwork.plctlab.org/api/1.2/patches/80774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407123249.2600968-1-yanzhang.wang@intel.com/","msgid":"<20230407123249.2600968-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-07T12:32:49","name":"[v3] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407123249.2600968-1-yanzhang.wang@intel.com/mbox/"},{"id":80901,"url":"https://patchwork.plctlab.org/api/1.2/patches/80901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com/","msgid":"<49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com>","list_archive_url":null,"date":"2023-04-07T16:07:27","name":"[rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com/mbox/"},{"id":81051,"url":"https://patchwork.plctlab.org/api/1.2/patches/81051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUpcDZda0axzk=_d-CEoO_s_ZVHMmxyzSYWoz0LfK8fQg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-07T21:07:42","name":"libgo patch committed: Remove test ordering dependency in mime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUpcDZda0axzk=_d-CEoO_s_ZVHMmxyzSYWoz0LfK8fQg@mail.gmail.com/mbox/"},{"id":81066,"url":"https://patchwork.plctlab.org/api/1.2/patches/81066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com/","msgid":"<8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com>","list_archive_url":null,"date":"2023-04-07T22:33:37","name":"aarch64: Add the cost and scheduling models for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com/mbox/"},{"id":81214,"url":"https://patchwork.plctlab.org/api/1.2/patches/81214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDFte7XxGH3P2fpq@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-08T13:34:51","name":"[V3] PR target/70243 - Do not generate vmaddfp or vnmsubdp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDFte7XxGH3P2fpq@toto.the-meissners.org/mbox/"},{"id":81244,"url":"https://patchwork.plctlab.org/api/1.2/patches/81244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDGQrieOfEIVNkfg@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-08T16:05:02","name":"[committed] hppa: Fix gcc.dg/long_branch.c on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDGQrieOfEIVNkfg@mx3210.localdomain/mbox/"},{"id":81259,"url":"https://patchwork.plctlab.org/api/1.2/patches/81259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com/","msgid":"<15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com>","list_archive_url":null,"date":"2023-04-08T18:27:38","name":"[committed,PR,tree-optimization/109392] Handle failure from maybe_push_res_to_seq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com/mbox/"},{"id":81338,"url":"https://patchwork.plctlab.org/api/1.2/patches/81338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020807.1757872-1-haochen.jiang@intel.com/","msgid":"<20230410020807.1757872-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-10T02:08:07","name":"gcc-13: Mention Intel AMX-COMPLEX ISA support and revise march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020807.1757872-1-haochen.jiang@intel.com/mbox/"},{"id":81340,"url":"https://patchwork.plctlab.org/api/1.2/patches/81340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020941.2440885-1-guojiufu@linux.ibm.com/","msgid":"<20230410020941.2440885-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-10T02:09:41","name":"testsuite: update requires for powerpc/float128-cmp2-runnable.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020941.2440885-1-guojiufu@linux.ibm.com/mbox/"},{"id":81350,"url":"https://patchwork.plctlab.org/api/1.2/patches/81350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410030037.1202490-1-yanzhang.wang@intel.com/","msgid":"<20230410030037.1202490-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-10T03:00:37","name":"[v4] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410030037.1202490-1-yanzhang.wang@intel.com/mbox/"},{"id":81357,"url":"https://patchwork.plctlab.org/api/1.2/patches/81357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033134.78378-1-juzhe.zhong@rivai.ai/","msgid":"<20230410033134.78378-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T03:31:34","name":"RISC-V: Fix EEW = 64 predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033134.78378-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81358,"url":"https://patchwork.plctlab.org/api/1.2/patches/81358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033938.130469-1-juzhe.zhong@rivai.ai/","msgid":"<20230410033938.130469-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T03:39:38","name":"RISC-V: Allow LMUL = 2 auto-vectorization for zve32*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033938.130469-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81363,"url":"https://patchwork.plctlab.org/api/1.2/patches/81363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410050701.10254-1-mynameisxiaou@gmail.com/","msgid":"<20230410050701.10254-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-04-10T05:07:01","name":"RISC-V: avoid splitting small constant in i_extrabit pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410050701.10254-1-mynameisxiaou@gmail.com/mbox/"},{"id":81460,"url":"https://patchwork.plctlab.org/api/1.2/patches/81460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410105640.6510-1-mynameisxiaou@gmail.com/","msgid":"<20230410105640.6510-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-04-10T10:56:40","name":"RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr3 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410105640.6510-1-mynameisxiaou@gmail.com/mbox/"},{"id":81529,"url":"https://patchwork.plctlab.org/api/1.2/patches/81529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410144808.324346-1-juzhe.zhong@rivai.ai/","msgid":"<20230410144808.324346-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T14:48:08","name":"machine_mode type size: Extend enum size from 8-bit to 16-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410144808.324346-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81592,"url":"https://patchwork.plctlab.org/api/1.2/patches/81592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-2-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:39","name":"[v3,01/10] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-2-patrick@rivosinc.com/mbox/"},{"id":81596,"url":"https://patchwork.plctlab.org/api/1.2/patches/81596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-3-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:40","name":"[v3,02/10] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-3-patrick@rivosinc.com/mbox/"},{"id":81598,"url":"https://patchwork.plctlab.org/api/1.2/patches/81598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-4-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:41","name":"[v3,03/10] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-4-patrick@rivosinc.com/mbox/"},{"id":81594,"url":"https://patchwork.plctlab.org/api/1.2/patches/81594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-5-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:42","name":"[v3,04/10] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-5-patrick@rivosinc.com/mbox/"},{"id":81601,"url":"https://patchwork.plctlab.org/api/1.2/patches/81601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-6-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:43","name":"[v3,05/10] RISCV: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-6-patrick@rivosinc.com/mbox/"},{"id":81593,"url":"https://patchwork.plctlab.org/api/1.2/patches/81593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-7-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:44","name":"[v3,06/10] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-7-patrick@rivosinc.com/mbox/"},{"id":81597,"url":"https://patchwork.plctlab.org/api/1.2/patches/81597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-8-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:45","name":"[v3,07/10] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-8-patrick@rivosinc.com/mbox/"},{"id":81603,"url":"https://patchwork.plctlab.org/api/1.2/patches/81603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-9-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:46","name":"[v3,08/10] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-9-patrick@rivosinc.com/mbox/"},{"id":81599,"url":"https://patchwork.plctlab.org/api/1.2/patches/81599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-10-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:47","name":"[v3,09/10] RISCV: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-10-patrick@rivosinc.com/mbox/"},{"id":81602,"url":"https://patchwork.plctlab.org/api/1.2/patches/81602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-11-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:48","name":"[v3,10/10] RISCV: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-11-patrick@rivosinc.com/mbox/"},{"id":81634,"url":"https://patchwork.plctlab.org/api/1.2/patches/81634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca740fe-9b24-4f46-9744-67b7dff20908-1681159786501@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-04-10T20:49:46","name":"Fortran: resolve correct generic with TYPE(C_PTR) arguments [PR61615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca740fe-9b24-4f46-9744-67b7dff20908-1681159786501@3c-app-gmx-bs33/mbox/"},{"id":81794,"url":"https://patchwork.plctlab.org/api/1.2/patches/81794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUWZffY5P/8o2OQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-11T08:12:21","name":"c++: Fix Solaris bootstraps across midnight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUWZffY5P/8o2OQ@tucnak/mbox/"},{"id":81798,"url":"https://patchwork.plctlab.org/api/1.2/patches/81798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUYpbs+dY6ly8a1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-11T08:21:57","name":"[RFC] range-op-float: Fix up op1_op2_relation of comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUYpbs+dY6ly8a1@tucnak/mbox/"},{"id":81866,"url":"https://patchwork.plctlab.org/api/1.2/patches/81866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DE18yJuM_Vn9jmaW05t8R6m5rNQ5niLUJVW93O09rR30Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-11T10:31:12","name":"fix compatability typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DE18yJuM_Vn9jmaW05t8R6m5rNQ5niLUJVW93O09rR30Q@mail.gmail.com/mbox/"},{"id":81898,"url":"https://patchwork.plctlab.org/api/1.2/patches/81898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com/","msgid":"<95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com>","list_archive_url":null,"date":"2023-04-11T11:22:15","name":"[committed] gfortran.dg/gomp/affinity-clause-1.f90: Fix scan-tree-dump (was: [r13-7120 Regression] FAIL: gfortran.dg/gomp/affinity-clause-1.f90 -O scan-tree-dump-times original \"#pragma omp task affinity\\\\(iterator\\\\(integer\\\\(kind=4\\\\) i=D\\\\.[0-9]+:5:1\\\\","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com/mbox/"},{"id":81905,"url":"https://patchwork.plctlab.org/api/1.2/patches/81905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411113748.1283643-1-yanzhang.wang@intel.com/","msgid":"<20230411113748.1283643-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-11T11:37:48","name":"[v5] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411113748.1283643-1-yanzhang.wang@intel.com/mbox/"},{"id":81964,"url":"https://patchwork.plctlab.org/api/1.2/patches/81964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com/","msgid":"<9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com>","list_archive_url":null,"date":"2023-04-11T13:37:18","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com/mbox/"},{"id":81965,"url":"https://patchwork.plctlab.org/api/1.2/patches/81965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C59672BF-7ECB-458D-9DF1-ED5FB430A60D@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-11T13:38:29","name":"[V6,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C59672BF-7ECB-458D-9DF1-ED5FB430A60D@oracle.com/mbox/"},{"id":82013,"url":"https://patchwork.plctlab.org/api/1.2/patches/82013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de/","msgid":"<846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de>","list_archive_url":null,"date":"2023-04-11T14:54:42","name":"[v2] Fortran: resolve correct generic with TYPE(C_PTR) arguments [PR61615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de/mbox/"},{"id":82016,"url":"https://patchwork.plctlab.org/api/1.2/patches/82016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145831.2862333-1-ppalka@redhat.com/","msgid":"<20230411145831.2862333-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-11T14:58:31","name":"libstdc++: Implement LWG 3904 change to lazy_split_view'\''s iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145831.2862333-1-ppalka@redhat.com/mbox/"},{"id":82019,"url":"https://patchwork.plctlab.org/api/1.2/patches/82019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145838.2862361-1-ppalka@redhat.com/","msgid":"<20230411145838.2862361-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-11T14:58:38","name":"libstdc++: Implement ranges::enumerate_view from P2164R9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145838.2862361-1-ppalka@redhat.com/mbox/"},{"id":82144,"url":"https://patchwork.plctlab.org/api/1.2/patches/82144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com/","msgid":"<82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com>","list_archive_url":null,"date":"2023-04-11T18:47:01","name":"Fix ICEs related to VM types in C [PR106465, PR107557, PR108424, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com/mbox/"},{"id":82150,"url":"https://patchwork.plctlab.org/api/1.2/patches/82150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411190320.13717-1-palmer@rivosinc.com/","msgid":"<20230411190320.13717-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-11T19:03:21","name":"RISC-V: Clean up the pr106602.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411190320.13717-1-palmer@rivosinc.com/mbox/"},{"id":82166,"url":"https://patchwork.plctlab.org/api/1.2/patches/82166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net/","msgid":"<87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-11T20:07:15","name":"libgm2: Adjust '\''autogen.sh'\'' to '\''ACLOCAL_AMFLAGS'\'', and simplify (was: [PATCH v3 8/19] modula2 front end: libgm2 contents)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net/mbox/"},{"id":82187,"url":"https://patchwork.plctlab.org/api/1.2/patches/82187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411201031.22067-1-palmer@rivosinc.com/","msgid":"<20230411201031.22067-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-11T20:10:32","name":"RISC-V: Force ilp32d for the T-Head FMV test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411201031.22067-1-palmer@rivosinc.com/mbox/"},{"id":82168,"url":"https://patchwork.plctlab.org/api/1.2/patches/82168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-101ecbef-9191-4532-b100-478605966705-1681243959761@3c-app-gmx-bs42/","msgid":"","list_archive_url":null,"date":"2023-04-11T20:12:39","name":"Fortran: fix functions with entry and pointer/allocatable result [PR104312]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-101ecbef-9191-4532-b100-478605966705-1681243959761@3c-app-gmx-bs42/mbox/"},{"id":82213,"url":"https://patchwork.plctlab.org/api/1.2/patches/82213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com/","msgid":"<951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com>","list_archive_url":null,"date":"2023-04-11T23:52:29","name":"PR tree-optimization/109462 - Don'\''t use ANY PHI equivalences in range-on-entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com/mbox/"},{"id":82228,"url":"https://patchwork.plctlab.org/api/1.2/patches/82228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/edf564ae-4312-cdd2-39a9-1e9c1ef68454@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T02:27:22","name":"[rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/edf564ae-4312-cdd2-39a9-1e9c1ef68454@linux.ibm.com/mbox/"},{"id":82268,"url":"https://patchwork.plctlab.org/api/1.2/patches/82268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412060845.981953-1-guojiufu@linux.ibm.com/","msgid":"<20230412060845.981953-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-12T06:08:45","name":"testsuite: filter out warning noise for CWE-1341 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412060845.981953-1-guojiufu@linux.ibm.com/mbox/"},{"id":82278,"url":"https://patchwork.plctlab.org/api/1.2/patches/82278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064931.EF1553858C5F@sourceware.org/","msgid":"<20230412064931.EF1553858C5F@sourceware.org>","list_archive_url":null,"date":"2023-04-12T06:48:47","name":"tree-optimization/109469 - SLP with returns-twice region start","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064931.EF1553858C5F@sourceware.org/mbox/"},{"id":82279,"url":"https://patchwork.plctlab.org/api/1.2/patches/82279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064946.231153856940@sourceware.org/","msgid":"<20230412064946.231153856940@sourceware.org>","list_archive_url":null,"date":"2023-04-12T06:49:01","name":"tree-optimization/109434 - bogus DSE of throwing call LHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064946.231153856940@sourceware.org/mbox/"},{"id":82361,"url":"https://patchwork.plctlab.org/api/1.2/patches/82361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDaBpPyA/XiPOvjw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T10:02:12","name":"combine, v3: Fix AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDaBpPyA/XiPOvjw@tucnak/mbox/"},{"id":82366,"url":"https://patchwork.plctlab.org/api/1.2/patches/82366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412102406.9F5BC3858C83@sourceware.org/","msgid":"<20230412102406.9F5BC3858C83@sourceware.org>","list_archive_url":null,"date":"2023-04-12T10:23:20","name":"tree-optimization/109473 - ICE with reduction epilog adjustment op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412102406.9F5BC3858C83@sourceware.org/mbox/"},{"id":82384,"url":"https://patchwork.plctlab.org/api/1.2/patches/82384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412110846.308184-1-juzhe.zhong@rivai.ai/","msgid":"<20230412110846.308184-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-12T11:08:46","name":"RISC-V: Fix PR109479","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412110846.308184-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82432,"url":"https://patchwork.plctlab.org/api/1.2/patches/82432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412121648.1394569-1-xry111@xry111.site/","msgid":"<20230412121648.1394569-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-12T12:16:48","name":"[GCC14] LoongArch: Improve cpymemsi expansion [PR109465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412121648.1394569-1-xry111@xry111.site/mbox/"},{"id":82442,"url":"https://patchwork.plctlab.org/api/1.2/patches/82442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122848.114135-1-jwakely@redhat.com/","msgid":"<20230412122848.114135-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T12:28:48","name":"[committed] libstdc++: Update tzdata to 2023c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122848.114135-1-jwakely@redhat.com/mbox/"},{"id":82444,"url":"https://patchwork.plctlab.org/api/1.2/patches/82444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122856.114242-1-jwakely@redhat.com/","msgid":"<20230412122856.114242-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T12:28:56","name":"[committed] libstdc++: Initialize all members of basic_endpoint union [PR109482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122856.114242-1-jwakely@redhat.com/mbox/"},{"id":82475,"url":"https://patchwork.plctlab.org/api/1.2/patches/82475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412131840.29214-1-shiyulong@iscas.ac.cn/","msgid":"<20230412131840.29214-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-12T13:18:40","name":"[V5] Testsuite: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412131840.29214-1-shiyulong@iscas.ac.cn/mbox/"},{"id":82505,"url":"https://patchwork.plctlab.org/api/1.2/patches/82505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCm5V4E2fea4WvTB55Vv2NbZ-x8h3LZX1mUCk-bQbi+XDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T13:39:26","name":"mingw: Support building with older gcc versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCm5V4E2fea4WvTB55Vv2NbZ-x8h3LZX1mUCk-bQbi+XDQ@mail.gmail.com/mbox/"},{"id":82506,"url":"https://patchwork.plctlab.org/api/1.2/patches/82506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412134502.3147419-1-ppalka@redhat.com/","msgid":"<20230412134502.3147419-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-12T13:45:02","name":"libstdc++: Ensure headers used by fast_float are included","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412134502.3147419-1-ppalka@redhat.com/mbox/"},{"id":82507,"url":"https://patchwork.plctlab.org/api/1.2/patches/82507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412135605.205032-1-juzhe.zhong@rivai.ai/","msgid":"<20230412135605.205032-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-12T13:56:05","name":"RISC-V: Fix pr109479 RVV ISA inconsistency bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412135605.205032-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82512,"url":"https://patchwork.plctlab.org/api/1.2/patches/82512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDa//e6L7ZDXn13x@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T14:28:13","name":"i386: Fix up z operand modifier diagnostics on inline-asm [PR109458]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDa//e6L7ZDXn13x@tucnak/mbox/"},{"id":82513,"url":"https://patchwork.plctlab.org/api/1.2/patches/82513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbB+n2lzHZoH6q5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T14:36:42","name":"reassoc: Fix up another ICE with returns_twice call [PR109410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbB+n2lzHZoH6q5@tucnak/mbox/"},{"id":82515,"url":"https://patchwork.plctlab.org/api/1.2/patches/82515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412144124.3356890-1-ppalka@redhat.com/","msgid":"<20230412144124.3356890-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-12T14:41:24","name":"libstdc++: Fix chunk_by_view when value_type& and reference differ [PR108291]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412144124.3356890-1-ppalka@redhat.com/mbox/"},{"id":82527,"url":"https://patchwork.plctlab.org/api/1.2/patches/82527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJJYwM1w_ECV-GgpoauKa8LT+08u3c4XAEpBGosZSxnkA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T15:25:06","name":"[fortran] PR109451 - ICE in gfc_conv_expr_descriptor with ASSOCIATE and substrings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJJYwM1w_ECV-GgpoauKa8LT+08u3c4XAEpBGosZSxnkA@mail.gmail.com/mbox/"},{"id":82577,"url":"https://patchwork.plctlab.org/api/1.2/patches/82577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbjI34T20ewQ2qs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T16:58:11","name":"combine, v4: Fix AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbjI34T20ewQ2qs@tucnak/mbox/"},{"id":82689,"url":"https://patchwork.plctlab.org/api/1.2/patches/82689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223011.207158-1-jwakely@redhat.com/","msgid":"<20230412223011.207158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T22:30:11","name":"[committed] libstdc++: Document libstdc++exp.a library for -fcontracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223011.207158-1-jwakely@redhat.com/mbox/"},{"id":82690,"url":"https://patchwork.plctlab.org/api/1.2/patches/82690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223036.207238-1-jwakely@redhat.com/","msgid":"<20230412223036.207238-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T22:30:36","name":"[committed] libstdc++: Fix some AIX test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223036.207238-1-jwakely@redhat.com/mbox/"},{"id":82939,"url":"https://patchwork.plctlab.org/api/1.2/patches/82939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413115126.1568212-1-chenglulu@loongson.cn/","msgid":"<20230413115126.1568212-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-13T11:51:26","name":"LoongArch: Remove the definition of the macro LOGICAL_OP_NON_SHORT_CIRCUIT under the architecture and use the default definition instead.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413115126.1568212-1-chenglulu@loongson.cn/mbox/"},{"id":82944,"url":"https://patchwork.plctlab.org/api/1.2/patches/82944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413122722.335227-1-juzhe.zhong@rivai.ai/","msgid":"<20230413122722.335227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-13T12:27:22","name":"RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413122722.335227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82950,"url":"https://patchwork.plctlab.org/api/1.2/patches/82950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413130105.2925A3856DD2@sourceware.org/","msgid":"<20230413130105.2925A3856DD2@sourceware.org>","list_archive_url":null,"date":"2023-04-13T13:00:20","name":"tree-optimization/109491 - ICE in expressions_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413130105.2925A3856DD2@sourceware.org/mbox/"},{"id":82987,"url":"https://patchwork.plctlab.org/api/1.2/patches/82987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GEHnWpNMrY9=rPPtRkcq=m1zJQZ5dd3QOijNPCJN+i+og@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T13:38:49","name":"[RFC] c++/new-warning: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GEHnWpNMrY9=rPPtRkcq=m1zJQZ5dd3QOijNPCJN+i+og@mail.gmail.com/mbox/"},{"id":82991,"url":"https://patchwork.plctlab.org/api/1.2/patches/82991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDgHd4qtTuRk3r7H@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-13T13:45:27","name":"loop-iv: Fix up bounds computation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDgHd4qtTuRk3r7H@tucnak/mbox/"},{"id":83020,"url":"https://patchwork.plctlab.org/api/1.2/patches/83020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413151018.31791-1-palmer@rivosinc.com/","msgid":"<20230413151018.31791-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-13T15:10:19","name":"RISC-V: Set the ABI for the RVV tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413151018.31791-1-palmer@rivosinc.com/mbox/"},{"id":83027,"url":"https://patchwork.plctlab.org/api/1.2/patches/83027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5zbhiwq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T16:00:05","name":"aarch64: Don'\''t trust TYPE_ALIGN for pointers [PR108910]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5zbhiwq.fsf@arm.com/mbox/"},{"id":83051,"url":"https://patchwork.plctlab.org/api/1.2/patches/83051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8cece7402f7d9d125542747a58f308e3eda625f.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T17:58:38","name":"rs6000: Fix test int_128bit-runnable.c instruction counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8cece7402f7d9d125542747a58f308e3eda625f.camel@us.ibm.com/mbox/"},{"id":83064,"url":"https://patchwork.plctlab.org/api/1.2/patches/83064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-1-jason@redhat.com/","msgid":"<20230413185921.2201433-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-13T18:59:20","name":"[1/2] c++: make cxx_incomplete_type_diagnostic return bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-1-jason@redhat.com/mbox/"},{"id":83065,"url":"https://patchwork.plctlab.org/api/1.2/patches/83065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-2-jason@redhat.com/","msgid":"<20230413185921.2201433-2-jason@redhat.com>","list_archive_url":null,"date":"2023-04-13T18:59:21","name":"[2/2] c++: make trait of incomplete type a permerror [PR109277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-2-jason@redhat.com/mbox/"},{"id":83073,"url":"https://patchwork.plctlab.org/api/1.2/patches/83073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7e61083e9a2a8154a18a6c4ffe22ae8751ad3f0.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T19:42:34","name":"rs6000: Fix test gc.target/powerpc/rs600-fpint.c test options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7e61083e9a2a8154a18a6c4ffe22ae8751ad3f0.camel@us.ibm.com/mbox/"},{"id":83087,"url":"https://patchwork.plctlab.org/api/1.2/patches/83087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1756a8e41b03138f8db58899799a4539812ecf1.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T20:47:11","name":"rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1756a8e41b03138f8db58899799a4539812ecf1.camel@us.ibm.com/mbox/"},{"id":83088,"url":"https://patchwork.plctlab.org/api/1.2/patches/83088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413205208.465-1-palmer@rivosinc.com/","msgid":"<20230413205208.465-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-13T20:52:09","name":"RISC-V: Update multilib-generator to handle V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413205208.465-1-palmer@rivosinc.com/mbox/"},{"id":83089,"url":"https://patchwork.plctlab.org/api/1.2/patches/83089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1425ad38-6282-46fc-a74b-066ba172025d-1681419417716@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-04-13T20:56:57","name":"[committed] Fortran: call of overloaded ???abs(long long int&)??? is ambiguous [PR109492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1425ad38-6282-46fc-a74b-066ba172025d-1681419417716@3c-app-gmx-bs50/mbox/"},{"id":83132,"url":"https://patchwork.plctlab.org/api/1.2/patches/83132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413232157.1487389-1-philipp.tomsich@vrull.eu/","msgid":"<20230413232157.1487389-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-04-13T23:21:57","name":"aarch64: disable LDP via tuning structure for -mcpu=ampere1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413232157.1487389-1-philipp.tomsich@vrull.eu/mbox/"},{"id":83171,"url":"https://patchwork.plctlab.org/api/1.2/patches/83171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414014518.15458-1-juzhe.zhong@rivai.ai/","msgid":"<20230414014518.15458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-14T01:45:18","name":"RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414014518.15458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":83191,"url":"https://patchwork.plctlab.org/api/1.2/patches/83191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414023238.2921142-1-pan2.li@intel.com/","msgid":"<20230414023238.2921142-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T02:32:38","name":"RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414023238.2921142-1-pan2.li@intel.com/mbox/"},{"id":83196,"url":"https://patchwork.plctlab.org/api/1.2/patches/83196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414024529.2930664-1-pan2.li@intel.com/","msgid":"<20230414024529.2930664-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T02:45:29","name":"[v2] RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414024529.2930664-1-pan2.li@intel.com/mbox/"},{"id":83204,"url":"https://patchwork.plctlab.org/api/1.2/patches/83204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414032511.2958280-1-pan2.li@intel.com/","msgid":"<20230414032511.2958280-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T03:25:11","name":"[v3] RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414032511.2958280-1-pan2.li@intel.com/mbox/"},{"id":83212,"url":"https://patchwork.plctlab.org/api/1.2/patches/83212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040038.1498807-1-ppalka@redhat.com/","msgid":"<20230414040038.1498807-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:38","name":"libstdc++: Implement ranges::fold_* from P2322R6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040038.1498807-1-ppalka@redhat.com/mbox/"},{"id":83211,"url":"https://patchwork.plctlab.org/api/1.2/patches/83211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-1-ppalka@redhat.com/","msgid":"<20230414040042.1498825-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:41","name":"[1/2] libstdc++: Move down definitions of ranges::cbegin/cend/cetc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-1-ppalka@redhat.com/mbox/"},{"id":83213,"url":"https://patchwork.plctlab.org/api/1.2/patches/83213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-2-ppalka@redhat.com/","msgid":"<20230414040042.1498825-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:42","name":"[2/2] libstdc++: Implement P2278R4 \"cbegin should always return a constant iterator\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-2-ppalka@redhat.com/mbox/"},{"id":83257,"url":"https://patchwork.plctlab.org/api/1.2/patches/83257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff0c733d75a54aa59a3c29aa9085b09e@ex13mbxc01n01.ikhex.ikoula.com/","msgid":"","list_archive_url":null,"date":"2023-04-14T07:02:35","name":"aarch64: Add -mveclibabi=sleefgnu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff0c733d75a54aa59a3c29aa9085b09e@ex13mbxc01n01.ikhex.ikoula.com/mbox/"},{"id":83261,"url":"https://patchwork.plctlab.org/api/1.2/patches/83261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414073026.2766449-1-guojiufu@linux.ibm.com/","msgid":"<20230414073026.2766449-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-14T07:30:26","name":"testsuite: update builtins-5-p9-runnable.c for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414073026.2766449-1-guojiufu@linux.ibm.com/mbox/"},{"id":83296,"url":"https://patchwork.plctlab.org/api/1.2/patches/83296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com/","msgid":"<1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com>","list_archive_url":null,"date":"2023-04-14T08:41:37","name":"PATCH] tree-ssa-sink: Add heuristics for code sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com/mbox/"},{"id":83314,"url":"https://patchwork.plctlab.org/api/1.2/patches/83314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094255.F02F313498@imap2.suse-dmz.suse.de/","msgid":"<20230414094255.F02F313498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T09:42:55","name":"Fix vect-simd-clone testcase dump scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094255.F02F313498@imap2.suse-dmz.suse.de/mbox/"},{"id":83315,"url":"https://patchwork.plctlab.org/api/1.2/patches/83315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094525.1645E13498@imap2.suse-dmz.suse.de/","msgid":"<20230414094525.1645E13498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T09:45:24","name":"tree-optimization/109502 - vector conversion between mask and non-mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094525.1645E13498@imap2.suse-dmz.suse.de/mbox/"},{"id":83349,"url":"https://patchwork.plctlab.org/api/1.2/patches/83349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414110022.359953-1-jwakely@redhat.com/","msgid":"<20230414110022.359953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-14T11:00:22","name":"[committed] libstdc++: Improve diagnostics for invalid std::format calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414110022.359953-1-jwakely@redhat.com/mbox/"},{"id":83371,"url":"https://patchwork.plctlab.org/api/1.2/patches/83371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414113222.A977613498@imap2.suse-dmz.suse.de/","msgid":"<20230414113222.A977613498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T11:32:22","name":"vect-simd-clone testcase adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414113222.A977613498@imap2.suse-dmz.suse.de/mbox/"},{"id":83523,"url":"https://patchwork.plctlab.org/api/1.2/patches/83523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-2-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:33","name":"[v4,01/10] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-2-patrick@rivosinc.com/mbox/"},{"id":83524,"url":"https://patchwork.plctlab.org/api/1.2/patches/83524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-3-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:34","name":"[v4,02/10] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-3-patrick@rivosinc.com/mbox/"},{"id":83525,"url":"https://patchwork.plctlab.org/api/1.2/patches/83525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-4-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:35","name":"[v4,03/10] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-4-patrick@rivosinc.com/mbox/"},{"id":83526,"url":"https://patchwork.plctlab.org/api/1.2/patches/83526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-5-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:36","name":"[v4,04/10] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-5-patrick@rivosinc.com/mbox/"},{"id":83529,"url":"https://patchwork.plctlab.org/api/1.2/patches/83529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-6-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:37","name":"[v4,05/10] RISCV: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-6-patrick@rivosinc.com/mbox/"},{"id":83530,"url":"https://patchwork.plctlab.org/api/1.2/patches/83530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-7-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:38","name":"[v4,06/10] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-7-patrick@rivosinc.com/mbox/"},{"id":83531,"url":"https://patchwork.plctlab.org/api/1.2/patches/83531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-8-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:39","name":"[v4,07/10] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-8-patrick@rivosinc.com/mbox/"},{"id":83532,"url":"https://patchwork.plctlab.org/api/1.2/patches/83532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-9-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:40","name":"[v4,08/10] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-9-patrick@rivosinc.com/mbox/"},{"id":83527,"url":"https://patchwork.plctlab.org/api/1.2/patches/83527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-10-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:41","name":"[v4,09/10] RISCV: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-10-patrick@rivosinc.com/mbox/"},{"id":83528,"url":"https://patchwork.plctlab.org/api/1.2/patches/83528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-11-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:42","name":"[v4,10/10] RISCV: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-11-patrick@rivosinc.com/mbox/"},{"id":83533,"url":"https://patchwork.plctlab.org/api/1.2/patches/83533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmK22caxA60IKzF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-14T17:18:19","name":"Disable X86_TUNE_AVX256_MOVE_BY_PIECES and STORE_BY_PIECES for znver1-3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmK22caxA60IKzF@kam.mff.cuni.cz/mbox/"},{"id":83550,"url":"https://patchwork.plctlab.org/api/1.2/patches/83550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414180543.1497603-1-philipp.tomsich@vrull.eu/","msgid":"<20230414180543.1497603-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-04-14T18:05:43","name":"[v2] aarch64: disable LDP via tuning structure for -mcpu=ampere1/1a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414180543.1497603-1-philipp.tomsich@vrull.eu/mbox/"},{"id":83553,"url":"https://patchwork.plctlab.org/api/1.2/patches/83553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1927733.PYKUYFuaPT@fomalhaut/","msgid":"<1927733.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2023-04-14T18:18:30","name":"[Ada] Fix PR bootstrap/109510","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1927733.PYKUYFuaPT@fomalhaut/mbox/"},{"id":83560,"url":"https://patchwork.plctlab.org/api/1.2/patches/83560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d5a880c2-3bb0-4464-9940-ac3568977112-1681498764042@3c-app-gmx-bs43/","msgid":"","list_archive_url":null,"date":"2023-04-14T18:59:24","name":"Fortran: fix compile-time simplification of SET_EXPONENT [PR109511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d5a880c2-3bb0-4464-9940-ac3568977112-1681498764042@3c-app-gmx-bs43/mbox/"},{"id":83562,"url":"https://patchwork.plctlab.org/api/1.2/patches/83562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmmXMae9glt4ABn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-14T19:15:40","name":"c: Fix up error-recovery on functions initialized as variables [PR109412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmmXMae9glt4ABn@tucnak/mbox/"},{"id":83563,"url":"https://patchwork.plctlab.org/api/1.2/patches/83563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmnkLaA8EX5RyFz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-14T19:20:48","name":"c: Fix up error-recovery on non-empty VLA initializers [PR109409]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmnkLaA8EX5RyFz@tucnak/mbox/"},{"id":83564,"url":"https://patchwork.plctlab.org/api/1.2/patches/83564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-1-ppalka@redhat.com/","msgid":"<20230414194512.2569383-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T19:45:11","name":"[1/2] libstdc++: Convert _RangeAdaptorClosure into a CRTP class [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-1-ppalka@redhat.com/mbox/"},{"id":83566,"url":"https://patchwork.plctlab.org/api/1.2/patches/83566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-2-ppalka@redhat.com/","msgid":"<20230414194512.2569383-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T19:45:12","name":"[2/2] libstdc++: Implement range_adaptor_closure from P2387R3 [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-2-ppalka@redhat.com/mbox/"},{"id":83575,"url":"https://patchwork.plctlab.org/api/1.2/patches/83575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414215115.2011733E1A@hamza.pair.com/","msgid":"<20230414215115.2011733E1A@hamza.pair.com>","list_archive_url":null,"date":"2023-04-14T21:51:12","name":"[pushed] wwwdocs: codingconventions: Recommend \"file name\" over \"filename\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414215115.2011733E1A@hamza.pair.com/mbox/"},{"id":83584,"url":"https://patchwork.plctlab.org/api/1.2/patches/83584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414234224.2870389-1-jason@redhat.com/","msgid":"<20230414234224.2870389-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-14T23:42:24","name":"[RFA] -Wdangling-pointer: fix MEM_REF handling [PR109514]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414234224.2870389-1-jason@redhat.com/mbox/"},{"id":83650,"url":"https://patchwork.plctlab.org/api/1.2/patches/83650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDpVL1KlzxWJKDzy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-15T07:41:37","name":"if-conv: Small improvement for expansion of complex PHIs [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDpVL1KlzxWJKDzy@tucnak/mbox/"},{"id":83715,"url":"https://patchwork.plctlab.org/api/1.2/patches/83715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415120105.131576-1-xry111@xry111.site/","msgid":"<20230415120105.131576-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-15T12:01:05","name":"build: Use -nostdinc generating macro_list [PR109522]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415120105.131576-1-xry111@xry111.site/mbox/"},{"id":83738,"url":"https://patchwork.plctlab.org/api/1.2/patches/83738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415163449.3236640-1-jason@redhat.com/","msgid":"<20230415163449.3236640-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-15T16:34:49","name":"[pushed] c++: constexpr aggregate destruction [PR109357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415163449.3236640-1-jason@redhat.com/mbox/"},{"id":83764,"url":"https://patchwork.plctlab.org/api/1.2/patches/83764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDrlXTk8H87+cvkM@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-15T17:56:45","name":"[committed] hppa: Fix handling of large arguments passed by value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDrlXTk8H87+cvkM@mx3210.localdomain/mbox/"},{"id":83843,"url":"https://patchwork.plctlab.org/api/1.2/patches/83843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com/","msgid":"<00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-16T12:07:34","name":"[Committed] New test case gcc.target/avr/pr54816.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com/mbox/"},{"id":83872,"url":"https://patchwork.plctlab.org/api/1.2/patches/83872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3753c6-05e5-c321-c821-22381f4ff6ac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-16T13:20:51","name":"tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3753c6-05e5-c321-c821-22381f4ff6ac@linux.ibm.com/mbox/"},{"id":83899,"url":"https://patchwork.plctlab.org/api/1.2/patches/83899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com/","msgid":"<9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com>","list_archive_url":null,"date":"2023-04-16T15:57:06","name":"[committed,PR,target/109508] Adjust conditional move expansion for SFB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com/mbox/"},{"id":83936,"url":"https://patchwork.plctlab.org/api/1.2/patches/83936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GGZ6UmK=i_ozcv6Gz0mqVKg2W3oeYsCYeQ5U_CK5VtNqA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-16T21:33:22","name":"c++: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GGZ6UmK=i_ozcv6Gz0mqVKg2W3oeYsCYeQ5U_CK5VtNqA@mail.gmail.com/mbox/"},{"id":83948,"url":"https://patchwork.plctlab.org/api/1.2/patches/83948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417015358.100811-1-kito.cheng@sifive.com/","msgid":"<20230417015358.100811-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-17T01:53:58","name":"[committed] RISC-V: Fix testsuite fail on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417015358.100811-1-kito.cheng@sifive.com/mbox/"},{"id":83950,"url":"https://patchwork.plctlab.org/api/1.2/patches/83950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417023919.7015-1-fanpeng@loongson.cn/","msgid":"<20230417023919.7015-1-fanpeng@loongson.cn>","list_archive_url":null,"date":"2023-04-17T02:39:19","name":"LoongArch: fix MUSL_DYNAMIC_LINKER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417023919.7015-1-fanpeng@loongson.cn/mbox/"},{"id":83984,"url":"https://patchwork.plctlab.org/api/1.2/patches/83984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034540.2645965-1-ppalka@redhat.com/","msgid":"<20230417034540.2645965-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T03:45:40","name":"libstdc++: Adding missing feature-test macros for C++23 ranges algos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034540.2645965-1-ppalka@redhat.com/mbox/"},{"id":83983,"url":"https://patchwork.plctlab.org/api/1.2/patches/83983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034553.2646005-1-ppalka@redhat.com/","msgid":"<20230417034553.2646005-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T03:45:53","name":"libstdc++: Fix typo in views::as_const'\''s operator() [PR109525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034553.2646005-1-ppalka@redhat.com/mbox/"},{"id":84011,"url":"https://patchwork.plctlab.org/api/1.2/patches/84011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417061754.1879-1-juzhe.zhong@rivai.ai/","msgid":"<20230417061754.1879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-17T06:17:54","name":"RISC-V: Add tuple type builtins for segment intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417061754.1879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84060,"url":"https://patchwork.plctlab.org/api/1.2/patches/84060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417084222.B13A23858288@sourceware.org/","msgid":"<20230417084222.B13A23858288@sourceware.org>","list_archive_url":null,"date":"2023-04-17T08:41:38","name":"tree-optimization/109524 - ICE with VRP edge removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417084222.B13A23858288@sourceware.org/mbox/"},{"id":84069,"url":"https://patchwork.plctlab.org/api/1.2/patches/84069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD0Ptanfl7QKBohQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-17T09:21:57","name":"testsuite: Fix up vect-simd-clone-1[678]f.c tests some more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD0Ptanfl7QKBohQ@tucnak/mbox/"},{"id":84161,"url":"https://patchwork.plctlab.org/api/1.2/patches/84161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edoizsln.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-04-17T10:54:44","name":"ipa: Fix double reference-count decrements for the same edge (PR 107769, PR 109318)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edoizsln.fsf@suse.cz/mbox/"},{"id":84187,"url":"https://patchwork.plctlab.org/api/1.2/patches/84187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2304171139240.4466@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2023-04-17T11:39:40","name":"[www] Move -fstrict-flex-arrays entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2304171139240.4466@jbgna.fhfr.qr/mbox/"},{"id":84208,"url":"https://patchwork.plctlab.org/api/1.2/patches/84208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz/","msgid":"<41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz>","list_archive_url":null,"date":"2023-04-17T12:50:55","name":"[(pushed)] ada: bump Library_Version to 14.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz/mbox/"},{"id":84254,"url":"https://patchwork.plctlab.org/api/1.2/patches/84254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417133916.3110637-1-ppalka@redhat.com/","msgid":"<20230417133916.3110637-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T13:39:16","name":"libstdc++: Implement P2770R0 changes to join_view / join_with_view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417133916.3110637-1-ppalka@redhat.com/mbox/"},{"id":84276,"url":"https://patchwork.plctlab.org/api/1.2/patches/84276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417145025.2291874-1-pan2.li@intel.com/","msgid":"<20230417145025.2291874-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-17T14:50:25","name":"RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417145025.2291874-1-pan2.li@intel.com/mbox/"},{"id":84353,"url":"https://patchwork.plctlab.org/api/1.2/patches/84353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417163856.2253309-1-kevinl@rivosinc.com/","msgid":"<20230417163856.2253309-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T16:38:56","name":"[v3] vect: Verify that GET_MODE_UNITS is greater than one for vect_grouped_store_supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417163856.2253309-1-kevinl@rivosinc.com/mbox/"},{"id":84390,"url":"https://patchwork.plctlab.org/api/1.2/patches/84390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-2-palmer@rivosinc.com/","msgid":"<20230417182044.22425-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:42","name":"[13-backport,1/3] RISC-V: Clean up the pr106602.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-2-palmer@rivosinc.com/mbox/"},{"id":84391,"url":"https://patchwork.plctlab.org/api/1.2/patches/84391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-3-palmer@rivosinc.com/","msgid":"<20230417182044.22425-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:43","name":"[13-backport,2/3] RISC-V: Set the ABI for the RVV tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-3-palmer@rivosinc.com/mbox/"},{"id":84392,"url":"https://patchwork.plctlab.org/api/1.2/patches/84392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-4-palmer@rivosinc.com/","msgid":"<20230417182044.22425-4-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:44","name":"[13-backport,3/3] RISC-V: Force ilp32d for the T-Head FMV test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-4-palmer@rivosinc.com/mbox/"},{"id":84398,"url":"https://patchwork.plctlab.org/api/1.2/patches/84398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-2-collison@rivosinc.com/","msgid":"<20230417183701.2249183-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:52","name":"[v4,01/10] RISC-V: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-2-collison@rivosinc.com/mbox/"},{"id":84397,"url":"https://patchwork.plctlab.org/api/1.2/patches/84397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-3-collison@rivosinc.com/","msgid":"<20230417183701.2249183-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:53","name":"[v4,02/10] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-3-collison@rivosinc.com/mbox/"},{"id":84400,"url":"https://patchwork.plctlab.org/api/1.2/patches/84400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-4-collison@rivosinc.com/","msgid":"<20230417183701.2249183-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:54","name":"[v4,03/10] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-4-collison@rivosinc.com/mbox/"},{"id":84399,"url":"https://patchwork.plctlab.org/api/1.2/patches/84399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-5-collison@rivosinc.com/","msgid":"<20230417183701.2249183-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:55","name":"[v4,04/10] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-5-collison@rivosinc.com/mbox/"},{"id":84401,"url":"https://patchwork.plctlab.org/api/1.2/patches/84401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-6-collison@rivosinc.com/","msgid":"<20230417183701.2249183-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:56","name":"[v4,05/10] RISC-V:autovec: Add autovectorization patterns for binary integer operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-6-collison@rivosinc.com/mbox/"},{"id":84402,"url":"https://patchwork.plctlab.org/api/1.2/patches/84402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-7-collison@rivosinc.com/","msgid":"<20230417183701.2249183-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:57","name":"[v4,06/10] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-7-collison@rivosinc.com/mbox/"},{"id":84404,"url":"https://patchwork.plctlab.org/api/1.2/patches/84404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-8-collison@rivosinc.com/","msgid":"<20230417183701.2249183-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:58","name":"[v4,07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-8-collison@rivosinc.com/mbox/"},{"id":84405,"url":"https://patchwork.plctlab.org/api/1.2/patches/84405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-9-collison@rivosinc.com/","msgid":"<20230417183701.2249183-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:59","name":"[v4,08/10] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-9-collison@rivosinc.com/mbox/"},{"id":84403,"url":"https://patchwork.plctlab.org/api/1.2/patches/84403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-10-collison@rivosinc.com/","msgid":"<20230417183701.2249183-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:37:00","name":"[v4,09/10] This patch adds a guard for VNx1 vectors that are present in ports like riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-10-collison@rivosinc.com/mbox/"},{"id":84406,"url":"https://patchwork.plctlab.org/api/1.2/patches/84406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-11-collison@rivosinc.com/","msgid":"<20230417183701.2249183-11-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:37:01","name":"[v4,10/10] This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-11-collison@rivosinc.com/mbox/"},{"id":84407,"url":"https://patchwork.plctlab.org/api/1.2/patches/84407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183917.216257-1-aldyh@redhat.com/","msgid":"<20230417183917.216257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:39:18","name":"Abstract out calculation of max HWIs per wide int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183917.216257-1-aldyh@redhat.com/mbox/"},{"id":84408,"url":"https://patchwork.plctlab.org/api/1.2/patches/84408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184419.4043285-1-ppalka@redhat.com/","msgid":"<20230417184419.4043285-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:44:19","name":"c++: bound ttp level lowering [PR109531]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184419.4043285-1-ppalka@redhat.com/mbox/"},{"id":84409,"url":"https://patchwork.plctlab.org/api/1.2/patches/84409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184701.217397-1-aldyh@redhat.com/","msgid":"<20230417184701.217397-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:47:01","name":"[COMMITTED] Do not export global ranges from -Walloca pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184701.217397-1-aldyh@redhat.com/mbox/"},{"id":84413,"url":"https://patchwork.plctlab.org/api/1.2/patches/84413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417185223.245929-1-apinski@marvell.com/","msgid":"<20230417185223.245929-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T18:52:23","name":"[COMMITTED] PHIOPT: Remove gate_hoist_loads prototype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417185223.245929-1-apinski@marvell.com/mbox/"},{"id":84473,"url":"https://patchwork.plctlab.org/api/1.2/patches/84473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ana5uk0Xkmn=6rok+-uMpCsGwC8=i2mxHXGd+vNr0V5g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-17T21:27:28","name":"Introduce VIRTUAL_REGISTER_P and VIRTUAL_REGISTER_NUM_P predicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ana5uk0Xkmn=6rok+-uMpCsGwC8=i2mxHXGd+vNr0V5g@mail.gmail.com/mbox/"},{"id":84490,"url":"https://patchwork.plctlab.org/api/1.2/patches/84490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-1-apinski@marvell.com/","msgid":"<20230417221740.251864-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T22:17:39","name":"[1/2] PHIOPT: small cleanup in match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-1-apinski@marvell.com/mbox/"},{"id":84491,"url":"https://patchwork.plctlab.org/api/1.2/patches/84491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-2-apinski@marvell.com/","msgid":"<20230417221740.251864-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T22:17:40","name":"[2/2] PHIOPT: add folding/simplification detail to the dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-2-apinski@marvell.com/mbox/"},{"id":84542,"url":"https://patchwork.plctlab.org/api/1.2/patches/84542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418020311.36368-1-juzhe.zhong@rivai.ai/","msgid":"<20230418020311.36368-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T02:03:11","name":"RISC-V: Fix PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418020311.36368-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84562,"url":"https://patchwork.plctlab.org/api/1.2/patches/84562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7d4dad9-e410-c4f0-62f7-c3b6acdd7d70@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T03:13:52","name":"[PATCH-1,rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7d4dad9-e410-c4f0-62f7-c3b6acdd7d70@linux.ibm.com/mbox/"},{"id":84561,"url":"https://patchwork.plctlab.org/api/1.2/patches/84561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92ff30f-759a-2a1a-8086-511b3c0738b0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T03:13:57","name":"[PATCH-2,rs6000] Add ppc_cpu_supports_hw into proc is-effective-target-keyword [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92ff30f-759a-2a1a-8086-511b3c0738b0@linux.ibm.com/mbox/"},{"id":84579,"url":"https://patchwork.plctlab.org/api/1.2/patches/84579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418053314.222548-1-aldyh@redhat.com/","msgid":"<20230418053314.222548-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:33:14","name":"[COMMITTED] Constify invariant fields of vrange and irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418053314.222548-1-aldyh@redhat.com/mbox/"},{"id":84581,"url":"https://patchwork.plctlab.org/api/1.2/patches/84581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418054301.226604-1-aldyh@redhat.com/","msgid":"<20230418054301.226604-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:43:01","name":"[COMMITTED] Add two new methods to Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418054301.226604-1-aldyh@redhat.com/mbox/"},{"id":84584,"url":"https://patchwork.plctlab.org/api/1.2/patches/84584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418055934.245432-1-aldyh@redhat.com/","msgid":"<20230418055934.245432-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:59:34","name":"Abstract out REAL_VALUE_TYPE streaming.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418055934.245432-1-aldyh@redhat.com/mbox/"},{"id":84585,"url":"https://patchwork.plctlab.org/api/1.2/patches/84585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418061556.3455329-1-chenglulu@loongson.cn/","msgid":"<20230418061556.3455329-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T06:15:56","name":"gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418061556.3455329-1-chenglulu@loongson.cn/mbox/"},{"id":84592,"url":"https://patchwork.plctlab.org/api/1.2/patches/84592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418063041.2615-1-iain@sandoe.co.uk/","msgid":"<20230418063041.2615-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-04-18T06:30:41","name":"[pushed] libsanitizer, darwin: Unsupport Darwin >= 22 for now.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418063041.2615-1-iain@sandoe.co.uk/mbox/"},{"id":84603,"url":"https://patchwork.plctlab.org/api/1.2/patches/84603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065223.3862113-1-lin1.hu@intel.com/","msgid":"<20230418065223.3862113-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-04-18T06:52:23","name":"i386: Optimize vshuf{i, f}{32x4, 64x2} ymm and vperm{i, f}128 ymm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065223.3862113-1-lin1.hu@intel.com/mbox/"},{"id":84605,"url":"https://patchwork.plctlab.org/api/1.2/patches/84605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065514.4003416-1-haochen.jiang@intel.com/","msgid":"<20230418065514.4003416-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T06:55:14","name":"i386: Use macro to wrap up share builtin exceptions in builtin isa check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065514.4003416-1-haochen.jiang@intel.com/mbox/"},{"id":84607,"url":"https://patchwork.plctlab.org/api/1.2/patches/84607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070256.3964933-1-lin1.hu@intel.com/","msgid":"<20230418070256.3964933-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-04-18T07:02:56","name":"i386: Add reduce_*_ep[i|u][8|16] series intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070256.3964933-1-lin1.hu@intel.com/mbox/"},{"id":84611,"url":"https://patchwork.plctlab.org/api/1.2/patches/84611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-2-haochen.jiang@intel.com/","msgid":"<20230418070450.4114708-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:04:49","name":"[1/2] i386: Add AVX512BW dependency to AVX512BITALG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-2-haochen.jiang@intel.com/mbox/"},{"id":84612,"url":"https://patchwork.plctlab.org/api/1.2/patches/84612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-3-haochen.jiang@intel.com/","msgid":"<20230418070450.4114708-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:04:50","name":"[2/2] i386: Add AVX512BW dependency to AVX512VBMI2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-3-haochen.jiang@intel.com/mbox/"},{"id":84615,"url":"https://patchwork.plctlab.org/api/1.2/patches/84615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071105.4061135-1-chenglulu@loongson.cn/","msgid":"<20230418071105.4061135-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T07:11:07","name":"[v2] gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071105.4061135-1-chenglulu@loongson.cn/mbox/"},{"id":84616,"url":"https://patchwork.plctlab.org/api/1.2/patches/84616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071514.4115672-1-haochen.jiang@intel.com/","msgid":"<20230418071514.4115672-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:15:14","name":"i386: Fix vpblendm{b,w} intrins and insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071514.4115672-1-haochen.jiang@intel.com/mbox/"},{"id":84617,"url":"https://patchwork.plctlab.org/api/1.2/patches/84617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071804.4192513-1-haochen.jiang@intel.com/","msgid":"<20230418071804.4192513-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:18:04","name":"i386: Add PCLMUL dependency for VPCLMULQDQ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071804.4192513-1-haochen.jiang@intel.com/mbox/"},{"id":84618,"url":"https://patchwork.plctlab.org/api/1.2/patches/84618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071851.4192579-1-haochen.jiang@intel.com/","msgid":"<20230418071851.4192579-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:18:51","name":"i386: Share AES xmm intrin with VAES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071851.4192579-1-haochen.jiang@intel.com/mbox/"},{"id":84623,"url":"https://patchwork.plctlab.org/api/1.2/patches/84623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418072823.4192952-1-haochen.jiang@intel.com/","msgid":"<20230418072823.4192952-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:28:23","name":"i386: Share AES xmm intrin with VAES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418072823.4192952-1-haochen.jiang@intel.com/mbox/"},{"id":84631,"url":"https://patchwork.plctlab.org/api/1.2/patches/84631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418075441.24431-1-christophe.lyon@arm.com/","msgid":"<20230418075441.24431-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T07:54:41","name":"install.texi: Document --enable-decimal-float for AArch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418075441.24431-1-christophe.lyon@arm.com/mbox/"},{"id":84680,"url":"https://patchwork.plctlab.org/api/1.2/patches/84680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418084922.882434-1-chenglulu@loongson.cn/","msgid":"<20230418084922.882434-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T08:49:23","name":"[v3] gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418084922.882434-1-chenglulu@loongson.cn/mbox/"},{"id":84683,"url":"https://patchwork.plctlab.org/api/1.2/patches/84683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5Z3iovGmuMQ3C9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T08:50:38","name":"match.pd: Improve fneg/fadd optimization [PR109240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5Z3iovGmuMQ3C9@tucnak/mbox/"},{"id":84688,"url":"https://patchwork.plctlab.org/api/1.2/patches/84688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418085255.252125-1-aldyh@redhat.com/","msgid":"<20230418085255.252125-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T08:52:56","name":"Return true from operator== for two identical ranges containing NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418085255.252125-1-aldyh@redhat.com/mbox/"},{"id":84702,"url":"https://patchwork.plctlab.org/api/1.2/patches/84702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5dlaIu4zph3Opc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T09:06:29","name":"dse: Use SUBREG_REG for copy_to_mode_reg in DSE replace_read for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5dlaIu4zph3Opc@tucnak/mbox/"},{"id":84703,"url":"https://patchwork.plctlab.org/api/1.2/patches/84703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-1-aldyh@redhat.com/","msgid":"<20230418090637.253140-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T09:06:36","name":"Add support for vrange streaming.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-1-aldyh@redhat.com/mbox/"},{"id":84704,"url":"https://patchwork.plctlab.org/api/1.2/patches/84704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-2-aldyh@redhat.com/","msgid":"<20230418090637.253140-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T09:06:38","name":"Add inchash support for vrange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-2-aldyh@redhat.com/mbox/"},{"id":84706,"url":"https://patchwork.plctlab.org/api/1.2/patches/84706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090855.3012513-1-pan2.li@intel.com/","msgid":"<20230418090855.3012513-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-18T09:08:55","name":"[v2] RISC-V: Allow Vector IOR(V1, NOT V1) optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090855.3012513-1-pan2.li@intel.com/mbox/"},{"id":84710,"url":"https://patchwork.plctlab.org/api/1.2/patches/84710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418092649.156-1-jinma@linux.alibaba.com/","msgid":"<20230418092649.156-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-18T09:26:49","name":"RISC-V: Adjust the parsing order of extensions to be consistent with riscv-spec and binutils.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418092649.156-1-jinma@linux.alibaba.com/mbox/"},{"id":84714,"url":"https://patchwork.plctlab.org/api/1.2/patches/84714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5lUUaEJFNLt2eY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T09:39:29","name":"rust: Disable --enable-languages=rust and silently exclude it from --enable-languages=all for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5lUUaEJFNLt2eY@tucnak/mbox/"},{"id":84716,"url":"https://patchwork.plctlab.org/api/1.2/patches/84716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418094048.177-1-jinma@linux.alibaba.com/","msgid":"<20230418094048.177-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-18T09:40:48","name":"Fixed typo.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418094048.177-1-jinma@linux.alibaba.com/mbox/"},{"id":84734,"url":"https://patchwork.plctlab.org/api/1.2/patches/84734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jbkjljy58.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:13:55","name":"constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jbkjljy58.fsf@arm.com/mbox/"},{"id":84735,"url":"https://patchwork.plctlab.org/api/1.2/patches/84735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418101615.116219-1-kito.cheng@sifive.com/","msgid":"<20230418101615.116219-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-18T10:16:15","name":"Docs: Add doc for RISC-V vector intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418101615.116219-1-kito.cheng@sifive.com/mbox/"},{"id":84739,"url":"https://patchwork.plctlab.org/api/1.2/patches/84739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u0Z9FB39C6nmv@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:20:01","name":"[2/3] middle-end match.pd: simplify debug dump checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u0Z9FB39C6nmv@arm.com/mbox/"},{"id":84740,"url":"https://patchwork.plctlab.org/api/1.2/patches/84740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u7XMmQVeVJd82@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:20:29","name":"[3/3] middle-end RFC - match.pd: automatically partition *-match.cc files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u7XMmQVeVJd82@arm.com/mbox/"},{"id":84742,"url":"https://patchwork.plctlab.org/api/1.2/patches/84742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418103326.54716139CC@imap2.suse-dmz.suse.de/","msgid":"<20230418103326.54716139CC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T10:33:25","name":"tree-optimization/109539 - restrict PHI handling in access diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418103326.54716139CC@imap2.suse-dmz.suse.de/mbox/"},{"id":84761,"url":"https://patchwork.plctlab.org/api/1.2/patches/84761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d33bf196-1a6a-b95a-ec62-6521e69de2d5@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T11:24:29","name":"[committed] amdgcn: HardFP divide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d33bf196-1a6a-b95a-ec62-6521e69de2d5@codesourcery.com/mbox/"},{"id":84779,"url":"https://patchwork.plctlab.org/api/1.2/patches/84779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8ja5z5jtzm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T11:43:41","name":"[v3] constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8ja5z5jtzm.fsf@arm.com/mbox/"},{"id":84805,"url":"https://patchwork.plctlab.org/api/1.2/patches/84805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120451.10146-1-juzhe.zhong@rivai.ai/","msgid":"<20230418120451.10146-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T12:04:51","name":"RISC-V: Add tuple types support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120451.10146-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84817,"url":"https://patchwork.plctlab.org/api/1.2/patches/84817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120957.11046-1-juzhe.zhong@rivai.ai/","msgid":"<20230418120957.11046-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T12:09:57","name":"RISC-V: Add tuple types support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120957.11046-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84825,"url":"https://patchwork.plctlab.org/api/1.2/patches/84825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418121753.50830-1-xry111@xry111.site/","msgid":"<20230418121753.50830-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-18T12:17:53","name":"LoongArch: Set 4 * (issue rate) as the default for -falign-functions and -falign-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418121753.50830-1-xry111@xry111.site/mbox/"},{"id":84828,"url":"https://patchwork.plctlab.org/api/1.2/patches/84828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com/","msgid":"<36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com>","list_archive_url":null,"date":"2023-04-18T12:22:18","name":"[V2,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com/mbox/"},{"id":84836,"url":"https://patchwork.plctlab.org/api/1.2/patches/84836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418125928.307445-1-aldyh@redhat.com/","msgid":"<20230418125928.307445-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T12:59:28","name":"Declare dconstm0 to go along with dconst0 and friends.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418125928.307445-1-aldyh@redhat.com/mbox/"},{"id":84844,"url":"https://patchwork.plctlab.org/api/1.2/patches/84844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418131250.310916-1-aldyh@redhat.com/","msgid":"<20230418131250.310916-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T13:12:50","name":"Implement range-op entry for sin/cos.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418131250.310916-1-aldyh@redhat.com/mbox/"},{"id":84848,"url":"https://patchwork.plctlab.org/api/1.2/patches/84848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418133942.1FAC113581@imap2.suse-dmz.suse.de/","msgid":"<20230418133942.1FAC113581@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T13:39:41","name":"RAII auto_mpfr and autp_mpz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418133942.1FAC113581@imap2.suse-dmz.suse.de/mbox/"},{"id":84850,"url":"https://patchwork.plctlab.org/api/1.2/patches/84850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-2-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:47","name":"[01/22] arm: move builtin function codes into general numberspace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-2-christophe.lyon@arm.com/mbox/"},{"id":84853,"url":"https://patchwork.plctlab.org/api/1.2/patches/84853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-3-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:48","name":"[02/22] arm: [MVE intrinsics] Add new framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-3-christophe.lyon@arm.com/mbox/"},{"id":84855,"url":"https://patchwork.plctlab.org/api/1.2/patches/84855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-4-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:49","name":"[03/22] arm: [MVE intrinsics] Rework vreinterpretq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-4-christophe.lyon@arm.com/mbox/"},{"id":84856,"url":"https://patchwork.plctlab.org/api/1.2/patches/84856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-5-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:50","name":"[04/22] arm: [MVE intrinsics] Rework vuninitialized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-5-christophe.lyon@arm.com/mbox/"},{"id":84857,"url":"https://patchwork.plctlab.org/api/1.2/patches/84857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-6-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:51","name":"[05/22] arm: [MVE intrinsics] add binary_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-6-christophe.lyon@arm.com/mbox/"},{"id":84866,"url":"https://patchwork.plctlab.org/api/1.2/patches/84866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-7-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:52","name":"[06/22] arm: [MVE intrinsics] add unspec_based_mve_function_exact_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-7-christophe.lyon@arm.com/mbox/"},{"id":84858,"url":"https://patchwork.plctlab.org/api/1.2/patches/84858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-8-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:53","name":"[07/22] arm: [MVE intrinsics] factorize vadd vsubq vmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-8-christophe.lyon@arm.com/mbox/"},{"id":84861,"url":"https://patchwork.plctlab.org/api/1.2/patches/84861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-9-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:54","name":"[08/22] arm: [MVE intrinsics] rework vaddq vmulq vsubq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-9-christophe.lyon@arm.com/mbox/"},{"id":84862,"url":"https://patchwork.plctlab.org/api/1.2/patches/84862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-10-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:55","name":"[09/22] arm: [MVE intrinsics] add binary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-10-christophe.lyon@arm.com/mbox/"},{"id":84860,"url":"https://patchwork.plctlab.org/api/1.2/patches/84860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-11-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:56","name":"[10/22] arm: [MVE intrinsics] factorize vandq veorq vorrq vbicq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-11-christophe.lyon@arm.com/mbox/"},{"id":84870,"url":"https://patchwork.plctlab.org/api/1.2/patches/84870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-12-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:57","name":"[11/22] arm: [MVE intrinsics] rework vandq veorq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-12-christophe.lyon@arm.com/mbox/"},{"id":84872,"url":"https://patchwork.plctlab.org/api/1.2/patches/84872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-13-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:58","name":"[12/22] arm: [MVE intrinsics] add binary_orrq shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-13-christophe.lyon@arm.com/mbox/"},{"id":84869,"url":"https://patchwork.plctlab.org/api/1.2/patches/84869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-14-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:59","name":"[13/22] arm: [MVE intrinsics] rework vorrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-14-christophe.lyon@arm.com/mbox/"},{"id":84852,"url":"https://patchwork.plctlab.org/api/1.2/patches/84852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-15-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:00","name":"[14/22] arm: [MVE intrinsics] add unspec_mve_function_exact_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-15-christophe.lyon@arm.com/mbox/"},{"id":84859,"url":"https://patchwork.plctlab.org/api/1.2/patches/84859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-16-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:01","name":"[15/22] arm: [MVE intrinsics] add create shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-16-christophe.lyon@arm.com/mbox/"},{"id":84863,"url":"https://patchwork.plctlab.org/api/1.2/patches/84863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-17-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:02","name":"[16/22] arm: [MVE intrinsics] factorize vcreateq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-17-christophe.lyon@arm.com/mbox/"},{"id":84867,"url":"https://patchwork.plctlab.org/api/1.2/patches/84867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-18-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:03","name":"[17/22] arm: [MVE intrinsics] rework vcreateq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-18-christophe.lyon@arm.com/mbox/"},{"id":84877,"url":"https://patchwork.plctlab.org/api/1.2/patches/84877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-19-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:04","name":"[18/22] arm: [MVE intrinsics] factorize several binary_m operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-19-christophe.lyon@arm.com/mbox/"},{"id":84864,"url":"https://patchwork.plctlab.org/api/1.2/patches/84864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-20-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:05","name":"[19/22] arm: [MVE intrinsics] factorize several binary _n operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-20-christophe.lyon@arm.com/mbox/"},{"id":84865,"url":"https://patchwork.plctlab.org/api/1.2/patches/84865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-21-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:06","name":"[20/22] arm: [MVE intrinsics] factorize several binary _m_n operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-21-christophe.lyon@arm.com/mbox/"},{"id":84868,"url":"https://patchwork.plctlab.org/api/1.2/patches/84868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-22-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:07","name":"[21/22] arm: [MVE intrinsics] factorize several binary operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-22-christophe.lyon@arm.com/mbox/"},{"id":84875,"url":"https://patchwork.plctlab.org/api/1.2/patches/84875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-23-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:08","name":"[22/22] arm: [MVE intrinsics] rework vhaddq vhsubq vmulhq vqaddq vqsubq vqdmulhq vrhaddq vrmulhq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-23-christophe.lyon@arm.com/mbox/"},{"id":84876,"url":"https://patchwork.plctlab.org/api/1.2/patches/84876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418135334.217FE13581@imap2.suse-dmz.suse.de/","msgid":"<20230418135334.217FE13581@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T13:53:33","name":"middle-end/108786 - add bitmap_clear_first_set_bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418135334.217FE13581@imap2.suse-dmz.suse.de/mbox/"},{"id":84890,"url":"https://patchwork.plctlab.org/api/1.2/patches/84890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418142858.2424851-1-patrick@rivosinc.com/","msgid":"<20230418142858.2424851-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T14:28:58","name":"[v5] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418142858.2424851-1-patrick@rivosinc.com/mbox/"},{"id":84892,"url":"https://patchwork.plctlab.org/api/1.2/patches/84892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418143635.980594-1-vineetg@rivosinc.com/","msgid":"<20230418143635.980594-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T14:36:35","name":"riscv: relax splitter restrictions for creating pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418143635.980594-1-vineetg@rivosinc.com/mbox/"},{"id":84894,"url":"https://patchwork.plctlab.org/api/1.2/patches/84894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418144401.70F8D139CC@imap2.suse-dmz.suse.de/","msgid":"<20230418144401.70F8D139CC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T14:44:01","name":"Shrink points-to analysis dumps when not dumping with -details","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418144401.70F8D139CC@imap2.suse-dmz.suse.de/mbox/"},{"id":84912,"url":"https://patchwork.plctlab.org/api/1.2/patches/84912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418150701.982572-1-vineetg@rivosinc.com/","msgid":"<20230418150701.982572-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T15:07:01","name":"[v2] riscv: relax splitter restrictions for creating pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418150701.982572-1-vineetg@rivosinc.com/mbox/"},{"id":84946,"url":"https://patchwork.plctlab.org/api/1.2/patches/84946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418155914.545421-1-jwakely@redhat.com/","msgid":"<20230418155914.545421-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-18T15:59:14","name":"[committed] libstdc++: Export global iostreams with GLIBCXX_3.4.31 symver [PR108969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418155914.545421-1-jwakely@redhat.com/mbox/"},{"id":84953,"url":"https://patchwork.plctlab.org/api/1.2/patches/84953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418162457.338626-1-aldyh@redhat.com/","msgid":"<20230418162457.338626-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T16:24:57","name":"[COMMITTED] Add GTY support for vrange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418162457.338626-1-aldyh@redhat.com/mbox/"},{"id":84954,"url":"https://patchwork.plctlab.org/api/1.2/patches/84954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17151-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T16:30:33","name":"RFC: New compact syntax for insn and insn_split in Machine Descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17151-tamar@arm.com/mbox/"},{"id":84955,"url":"https://patchwork.plctlab.org/api/1.2/patches/84955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418163913.2429812-1-patrick@rivosinc.com/","msgid":"<20230418163913.2429812-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T16:39:13","name":"[v6] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418163913.2429812-1-patrick@rivosinc.com/mbox/"},{"id":84956,"url":"https://patchwork.plctlab.org/api/1.2/patches/84956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418164007.341221-1-aldyh@redhat.com/","msgid":"<20230418164007.341221-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T16:40:07","name":"Fix pointer sharing in Value_Range constructor.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418164007.341221-1-aldyh@redhat.com/mbox/"},{"id":84976,"url":"https://patchwork.plctlab.org/api/1.2/patches/84976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahvuDwL58Vqj2zVwzyio_yZMA8hKqMZoomfTDNuT0q8Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T17:01:16","name":"i386: Improve permutations with INSERTPS instruction [PR94908]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahvuDwL58Vqj2zVwzyio_yZMA8hKqMZoomfTDNuT0q8Q@mail.gmail.com/mbox/"},{"id":85012,"url":"https://patchwork.plctlab.org/api/1.2/patches/85012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418175507.2C40B2040B@pchp3.se.axis.com/","msgid":"<20230418175507.2C40B2040B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-18T17:55:07","name":"doc: Document order of define_peephole2 scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418175507.2C40B2040B@pchp3.se.axis.com/mbox/"},{"id":85015,"url":"https://patchwork.plctlab.org/api/1.2/patches/85015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418181745.987867-1-vineetg@rivosinc.com/","msgid":"<20230418181745.987867-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T18:17:45","name":"expansion: make layout of x_shift*cost[][][] more efficient","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418181745.987867-1-vineetg@rivosinc.com/mbox/"},{"id":85054,"url":"https://patchwork.plctlab.org/api/1.2/patches/85054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418192136.286589-1-apinski@marvell.com/","msgid":"<20230418192136.286589-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-18T19:21:36","name":"PHIOPT: Move tree_ssa_cs_elim into pass_cselim::execute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418192136.286589-1-apinski@marvell.com/mbox/"},{"id":85061,"url":"https://patchwork.plctlab.org/api/1.2/patches/85061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc2a82bc-fc4e-44f2-bb38-38597e878fd9-1681846782121@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-04-18T19:39:42","name":"testsuite: fix scan-tree-dump patterns [PR83904,PR100297]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc2a82bc-fc4e-44f2-bb38-38597e878fd9-1681846782121@3c-app-gmx-bs56/mbox/"},{"id":85067,"url":"https://patchwork.plctlab.org/api/1.2/patches/85067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418204809.993242-1-vineetg@rivosinc.com/","msgid":"<20230418204809.993242-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T20:48:09","name":"[v2] expansion: make layout of x_shift*cost[][][] more efficient","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418204809.993242-1-vineetg@rivosinc.com/mbox/"},{"id":85082,"url":"https://patchwork.plctlab.org/api/1.2/patches/85082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com/","msgid":"<4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com>","list_archive_url":null,"date":"2023-04-18T21:41:12","name":"aarch64: Add the scheduling model for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com/mbox/"},{"id":85081,"url":"https://patchwork.plctlab.org/api/1.2/patches/85081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418214124.2446642-1-patrick@rivosinc.com/","msgid":"<20230418214124.2446642-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T21:41:24","name":"[v7] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418214124.2446642-1-patrick@rivosinc.com/mbox/"},{"id":85083,"url":"https://patchwork.plctlab.org/api/1.2/patches/85083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com/","msgid":"<6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com>","list_archive_url":null,"date":"2023-04-18T21:41:47","name":"aarch64: Add the cost model for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com/mbox/"},{"id":85110,"url":"https://patchwork.plctlab.org/api/1.2/patches/85110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418231500.585632-1-jwakely@redhat.com/","msgid":"<20230418231500.585632-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-18T23:15:00","name":"[committed] libstdc++: Adjust uses of null pointer constants in docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418231500.585632-1-jwakely@redhat.com/mbox/"},{"id":85111,"url":"https://patchwork.plctlab.org/api/1.2/patches/85111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418232515.95891-1-juzhe.zhong@rivai.ai/","msgid":"<20230418232515.95891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T23:25:15","name":"RISC-V: Fix bug reported by PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418232515.95891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85112,"url":"https://patchwork.plctlab.org/api/1.2/patches/85112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418233253.293204-1-apinski@marvell.com/","msgid":"<20230418233253.293204-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-18T23:32:53","name":"i386: Add new pattern for zero-extend cmov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418233253.293204-1-apinski@marvell.com/mbox/"},{"id":85132,"url":"https://patchwork.plctlab.org/api/1.2/patches/85132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020301.1864306-1-zewei.mo@intel.com/","msgid":"<20230419020301.1864306-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-04-19T02:03:01","name":"Re-arrange sections of i386 cpuid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020301.1864306-1-zewei.mo@intel.com/mbox/"},{"id":85131,"url":"https://patchwork.plctlab.org/api/1.2/patches/85131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020336.722450-1-guojiufu@linux.ibm.com/","msgid":"<20230419020336.722450-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T02:03:36","name":"PR testsuite/106879 FAIL: gcc.dg/vect/bb-slp-layout-19.c on powerpc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020336.722450-1-guojiufu@linux.ibm.com/mbox/"},{"id":85141,"url":"https://patchwork.plctlab.org/api/1.2/patches/85141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419025214.149675-1-xionghuluo@tencent.com/","msgid":"<20230419025214.149675-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-04-19T02:52:14","name":"[v5] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419025214.149675-1-xionghuluo@tencent.com/mbox/"},{"id":85153,"url":"https://patchwork.plctlab.org/api/1.2/patches/85153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419031527.6D39120420@pchp3.se.axis.com/","msgid":"<20230419031527.6D39120420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-19T03:15:27","name":"[v2] doc: Document order of define_peephole2 scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419031527.6D39120420@pchp3.se.axis.com/mbox/"},{"id":85155,"url":"https://patchwork.plctlab.org/api/1.2/patches/85155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419032117.930737-1-pan2.li@intel.com/","msgid":"<20230419032117.930737-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T03:21:17","name":"RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419032117.930737-1-pan2.li@intel.com/mbox/"},{"id":85225,"url":"https://patchwork.plctlab.org/api/1.2/patches/85225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419070628.1011624-1-lipeng.zhu@intel.com/","msgid":"<20230419070628.1011624-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-04-19T07:06:28","name":"[v3] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419070628.1011624-1-lipeng.zhu@intel.com/mbox/"},{"id":85227,"url":"https://patchwork.plctlab.org/api/1.2/patches/85227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071551.3478647-1-hongtao.liu@intel.com/","msgid":"<20230419071551.3478647-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-19T07:15:51","name":"[i386] Support type _Float16/__bf16 independent of SSE2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071551.3478647-1-hongtao.liu@intel.com/mbox/"},{"id":85228,"url":"https://patchwork.plctlab.org/api/1.2/patches/85228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071900.61BB83856949@sourceware.org/","msgid":"<20230419071900.61BB83856949@sourceware.org>","list_archive_url":null,"date":"2023-04-19T07:18:14","name":"rtl-optimization/109237 - speedup bb_is_just_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071900.61BB83856949@sourceware.org/mbox/"},{"id":85247,"url":"https://patchwork.plctlab.org/api/1.2/patches/85247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+iyFBUsQQOaSxT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T08:14:00","name":"[committed] testsuite: Fix up pr109524.C for -std=c++23 [PR109524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+iyFBUsQQOaSxT@tucnak/mbox/"},{"id":85249,"url":"https://patchwork.plctlab.org/api/1.2/patches/85249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419082342.21705-1-fanpeng@loongson.cn/","msgid":"<20230419082342.21705-1-fanpeng@loongson.cn>","list_archive_url":null,"date":"2023-04-19T08:23:42","name":"LoongArch: fix MUSL_DYNAMIC_LINKER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419082342.21705-1-fanpeng@loongson.cn/mbox/"},{"id":85261,"url":"https://patchwork.plctlab.org/api/1.2/patches/85261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+rh/xdkZfD7Zwe@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T08:51:19","name":"tree-vect-patterns: Improve __builtin_{clz,ctz,ffs}ll vectorization [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+rh/xdkZfD7Zwe@tucnak/mbox/"},{"id":85266,"url":"https://patchwork.plctlab.org/api/1.2/patches/85266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+uPQ0SZiYDfScT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T09:02:53","name":"c: Avoid -Wenum-int-mismatch warning for redeclaration of builtin acc_on_device [PR107041]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+uPQ0SZiYDfScT@tucnak/mbox/"},{"id":85270,"url":"https://patchwork.plctlab.org/api/1.2/patches/85270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419091820.3729443-1-pan2.li@intel.com/","msgid":"<20230419091820.3729443-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T09:18:20","name":"[v3] RISC-V: Align IOR optimization MODE_CLASS condition to AND.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419091820.3729443-1-pan2.li@intel.com/mbox/"},{"id":85277,"url":"https://patchwork.plctlab.org/api/1.2/patches/85277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419093722.F218A385771D@sourceware.org/","msgid":"<20230419093722.F218A385771D@sourceware.org>","list_archive_url":null,"date":"2023-04-19T09:36:35","name":"Transform more gmp/mpfr uses to use RAII","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419093722.F218A385771D@sourceware.org/mbox/"},{"id":85284,"url":"https://patchwork.plctlab.org/api/1.2/patches/85284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419094812.98F5A3858CDA@sourceware.org/","msgid":"<20230419094812.98F5A3858CDA@sourceware.org>","list_archive_url":null,"date":"2023-04-19T09:47:24","name":"Simplify gimple_assign_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419094812.98F5A3858CDA@sourceware.org/mbox/"},{"id":85291,"url":"https://patchwork.plctlab.org/api/1.2/patches/85291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419095751.815-1-jinma@linux.alibaba.com/","msgid":"<20230419095751.815-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-19T09:57:51","name":"[v8] RISC-V: Add the '\''zfa'\'' extension, version 0.2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419095751.815-1-jinma@linux.alibaba.com/mbox/"},{"id":85309,"url":"https://patchwork.plctlab.org/api/1.2/patches/85309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419103332.DBBC73858C50@sourceware.org/","msgid":"<20230419103332.DBBC73858C50@sourceware.org>","list_archive_url":null,"date":"2023-04-19T10:32:48","name":"Avoid repeated forwarder_block_p calls in CFG cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419103332.DBBC73858C50@sourceware.org/mbox/"},{"id":85312,"url":"https://patchwork.plctlab.org/api/1.2/patches/85312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104054.935874-1-juzhe.zhong@rivai.ai/","msgid":"<20230419104054.935874-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T10:40:54","name":"RISC-V: Fix bug of PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104054.935874-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85313,"url":"https://patchwork.plctlab.org/api/1.2/patches/85313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104151.936002-1-juzhe.zhong@rivai.ai/","msgid":"<20230419104151.936002-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T10:41:51","name":"RISC-V: Fix bug of PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104151.936002-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85343,"url":"https://patchwork.plctlab.org/api/1.2/patches/85343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419112307.3805682-1-pan2.li@intel.com/","msgid":"<20230419112307.3805682-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T11:23:07","name":"[v2] RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419112307.3805682-1-pan2.li@intel.com/mbox/"},{"id":85360,"url":"https://patchwork.plctlab.org/api/1.2/patches/85360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121424.87B213856DF6@sourceware.org/","msgid":"<20230419121424.87B213856DF6@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:13:38","name":"Remove odd code from gimple_can_merge_blocks_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121424.87B213856DF6@sourceware.org/mbox/"},{"id":85361,"url":"https://patchwork.plctlab.org/api/1.2/patches/85361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121438.656C83857019@sourceware.org/","msgid":"<20230419121438.656C83857019@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:13:52","name":"[1/4] Avoid non-unified nodes on the topological sorting for PTA solving","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121438.656C83857019@sourceware.org/mbox/"},{"id":85362,"url":"https://patchwork.plctlab.org/api/1.2/patches/85362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121453.C3DBE3853800@sourceware.org/","msgid":"<20230419121453.C3DBE3853800@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:08","name":"[2/4] Remove senseless store in do_sd_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121453.C3DBE3853800@sourceware.org/mbox/"},{"id":85363,"url":"https://patchwork.plctlab.org/api/1.2/patches/85363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121522.78B90385696B@sourceware.org/","msgid":"<20230419121522.78B90385696B@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:24","name":"[3/4] Fix do_sd_constraint escape special casing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121522.78B90385696B@sourceware.org/mbox/"},{"id":85364,"url":"https://patchwork.plctlab.org/api/1.2/patches/85364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121619.C45363857038@sourceware.org/","msgid":"<20230419121619.C45363857038@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:37","name":"[4/4] Remove special-cased edges when solving copies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121619.C45363857038@sourceware.org/mbox/"},{"id":85381,"url":"https://patchwork.plctlab.org/api/1.2/patches/85381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123111.211055-1-juzhe.zhong@rivai.ai/","msgid":"<20230419123111.211055-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T12:31:11","name":"[04/10] RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123111.211055-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85382,"url":"https://patchwork.plctlab.org/api/1.2/patches/85382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123346.211804-1-juzhe.zhong@rivai.ai/","msgid":"<20230419123346.211804-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T12:33:46","name":"RISC-V: Support 128 bit vector chunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123346.211804-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85397,"url":"https://patchwork.plctlab.org/api/1.2/patches/85397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419130028.267252-1-juzhe.zhong@rivai.ai/","msgid":"<20230419130028.267252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T13:00:28","name":"RISC-V: Add tuple type vget/vset intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419130028.267252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85412,"url":"https://patchwork.plctlab.org/api/1.2/patches/85412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134332.E80E5385772D@sourceware.org/","msgid":"<20230419134332.E80E5385772D@sourceware.org>","list_archive_url":null,"date":"2023-04-19T13:42:49","name":"[1/2] Split out solve_add_graph_edge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134332.E80E5385772D@sourceware.org/mbox/"},{"id":85413,"url":"https://patchwork.plctlab.org/api/1.2/patches/85413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134352.315BD3857022@sourceware.org/","msgid":"<20230419134352.315BD3857022@sourceware.org>","list_archive_url":null,"date":"2023-04-19T13:43:08","name":"[2/2] Use solve_add_graph_edge in more places","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134352.315BD3857022@sourceware.org/mbox/"},{"id":85415,"url":"https://patchwork.plctlab.org/api/1.2/patches/85415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com/","msgid":"<4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com>","list_archive_url":null,"date":"2023-04-19T13:51:52","name":"Docs, OpenMP: Small fixes to internal OMP_FOR doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com/mbox/"},{"id":85417,"url":"https://patchwork.plctlab.org/api/1.2/patches/85417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419135351.98376-1-kito.cheng@sifive.com/","msgid":"<20230419135351.98376-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-19T13:53:51","name":"[wwwdocs] gcc-13: Add release note for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419135351.98376-1-kito.cheng@sifive.com/mbox/"},{"id":85446,"url":"https://patchwork.plctlab.org/api/1.2/patches/85446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZwreLpQ877V2em5RbM4tQ2sJLdXt5gP0NE3-Dvio7qCg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T15:06:34","name":"i386: Emit compares between high registers and memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZwreLpQ877V2em5RbM4tQ2sJLdXt5gP0NE3-Dvio7qCg@mail.gmail.com/mbox/"},{"id":85459,"url":"https://patchwork.plctlab.org/api/1.2/patches/85459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419152009.494469-1-jason@redhat.com/","msgid":"<20230419152009.494469-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-19T15:20:09","name":"[13,RFA] c++: fix '\''unsigned __int128_t'\'' semantics [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419152009.494469-1-jason@redhat.com/mbox/"},{"id":85483,"url":"https://patchwork.plctlab.org/api/1.2/patches/85483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419154515.1300814-1-ppalka@redhat.com/","msgid":"<20230419154515.1300814-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-19T15:45:15","name":"c++: bad ggc_free in try_class_unification [PR109556]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419154515.1300814-1-ppalka@redhat.com/mbox/"},{"id":85487,"url":"https://patchwork.plctlab.org/api/1.2/patches/85487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419155448.EAC3420438@pchp3.se.axis.com/","msgid":"<20230419155448.EAC3420438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-19T15:54:48","name":"recog.cc: Correct comments referring to parameter match_len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419155448.EAC3420438@pchp3.se.axis.com/mbox/"},{"id":85490,"url":"https://patchwork.plctlab.org/api/1.2/patches/85490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j8renkg3z.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T16:10:24","name":"[v2] Leveraging the use of STP instruction for vec_duplicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j8renkg3z.fsf@arm.com/mbox/"},{"id":85496,"url":"https://patchwork.plctlab.org/api/1.2/patches/85496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-2-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:14","name":"[1/3] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85494,"url":"https://patchwork.plctlab.org/api/1.2/patches/85494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-3-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:15","name":"[2/3] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85498,"url":"https://patchwork.plctlab.org/api/1.2/patches/85498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-4-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:16","name":"[3/3] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85495,"url":"https://patchwork.plctlab.org/api/1.2/patches/85495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-2-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:32","name":"[1/3] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85497,"url":"https://patchwork.plctlab.org/api/1.2/patches/85497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-3-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:33","name":"[2/3] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85499,"url":"https://patchwork.plctlab.org/api/1.2/patches/85499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-4-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:34","name":"[3/3] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85500,"url":"https://patchwork.plctlab.org/api/1.2/patches/85500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at/","msgid":"<0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at>","list_archive_url":null,"date":"2023-04-19T16:39:46","name":"[C,-,backport,12] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at/mbox/"},{"id":85503,"url":"https://patchwork.plctlab.org/api/1.2/patches/85503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-2-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:12","name":"[1/3,V2] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85502,"url":"https://patchwork.plctlab.org/api/1.2/patches/85502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-3-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:13","name":"[2/3,V2] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85505,"url":"https://patchwork.plctlab.org/api/1.2/patches/85505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-4-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:14","name":"[3/3,V2] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85518,"url":"https://patchwork.plctlab.org/api/1.2/patches/85518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com/","msgid":"<236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T17:53:07","name":"[v3,1/4] ree: Default ree pass for O2 and above for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com/mbox/"},{"id":85519,"url":"https://patchwork.plctlab.org/api/1.2/patches/85519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3ec893d-683d-7a39-34b6-7d059df2da7c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T17:56:34","name":"[v3,2/4] ree : Code movement to avoid adding prototype to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3ec893d-683d-7a39-34b6-7d059df2da7c@linux.ibm.com/mbox/"},{"id":85520,"url":"https://patchwork.plctlab.org/api/1.2/patches/85520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com/","msgid":"<12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T18:00:30","name":"[v3,3/4] ree: Main functionality to Improve ree pass for rs6000 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com/mbox/"},{"id":85521,"url":"https://patchwork.plctlab.org/api/1.2/patches/85521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d80335eb-9436-fe77-dca4-fbb02d3d688d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T18:03:32","name":"[v3,4/4] ree: Using ABI interfaces to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d80335eb-9436-fe77-dca4-fbb02d3d688d@linux.ibm.com/mbox/"},{"id":85539,"url":"https://patchwork.plctlab.org/api/1.2/patches/85539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-1-jcmvbkbc@gmail.com/","msgid":"<20230419194636.4006880-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-04-19T19:46:35","name":"[COMMITTED,1/2] gcc: xtensa: add data alignment properties to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-1-jcmvbkbc@gmail.com/mbox/"},{"id":85540,"url":"https://patchwork.plctlab.org/api/1.2/patches/85540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-2-jcmvbkbc@gmail.com/","msgid":"<20230419194636.4006880-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-04-19T19:46:36","name":"[COMMITTED,2/2] gcc: xtensa: add -m[no-]strict-align option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-2-jcmvbkbc@gmail.com/mbox/"},{"id":85570,"url":"https://patchwork.plctlab.org/api/1.2/patches/85570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419213635.329198-1-apinski@marvell.com/","msgid":"<20230419213635.329198-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-19T21:36:35","name":"PHIOPT: Improve minmax diamond detection for phiopt1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419213635.329198-1-apinski@marvell.com/mbox/"},{"id":85668,"url":"https://patchwork.plctlab.org/api/1.2/patches/85668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-1-hongtao.liu@intel.com/","msgid":"<20230420004615.2434390-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T00:46:14","name":"[1/2] Use NO_REGS in cost calculation when the preferred register class are not known yet.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-1-hongtao.liu@intel.com/mbox/"},{"id":85669,"url":"https://patchwork.plctlab.org/api/1.2/patches/85669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-2-hongtao.liu@intel.com/","msgid":"<20230420004615.2434390-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T00:46:15","name":"[2/2] Adjust testcases after better RA decision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-2-hongtao.liu@intel.com/mbox/"},{"id":85673,"url":"https://patchwork.plctlab.org/api/1.2/patches/85673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420010535.336618-1-apinski@marvell.com/","msgid":"<20230420010535.336618-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-20T01:05:35","name":"PHIOPT: Improve readability of tree_ssa_phiopt_worker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420010535.336618-1-apinski@marvell.com/mbox/"},{"id":85704,"url":"https://patchwork.plctlab.org/api/1.2/patches/85704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420035821.4113007-1-hongtao.liu@intel.com/","msgid":"<20230420035821.4113007-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T03:58:21","name":"Canonicalize vec_merge when mask is constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420035821.4113007-1-hongtao.liu@intel.com/mbox/"},{"id":85707,"url":"https://patchwork.plctlab.org/api/1.2/patches/85707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com/","msgid":"<3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com>","list_archive_url":null,"date":"2023-04-20T04:34:34","name":"[RFA,PR,target/108248,RISC-V] Break down some bitmanip insn types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com/mbox/"},{"id":85731,"url":"https://patchwork.plctlab.org/api/1.2/patches/85731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com/","msgid":"<7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com>","list_archive_url":null,"date":"2023-04-20T06:04:39","name":"[2/1,rs6000] make ppc_cpu_supports_hw as effective target keyword [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com/mbox/"},{"id":85732,"url":"https://patchwork.plctlab.org/api/1.2/patches/85732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcbe0ab5-9649-9005-8739-f1bfec216a18@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T06:04:44","name":"[2/2,rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcbe0ab5-9649-9005-8739-f1bfec216a18@linux.ibm.com/mbox/"},{"id":85752,"url":"https://patchwork.plctlab.org/api/1.2/patches/85752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEDqbPYI10NaVp6R@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-20T07:31:56","name":"tree-vect-patterns: Pattern recognize ctz or ffs using clz, popcount or ctz [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEDqbPYI10NaVp6R@tucnak/mbox/"},{"id":85806,"url":"https://patchwork.plctlab.org/api/1.2/patches/85806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420092356.CB21A3856965@sourceware.org/","msgid":"<20230420092356.CB21A3856965@sourceware.org>","list_archive_url":null,"date":"2023-04-20T09:23:12","name":"Remove duplicate DFS walks from DF init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420092356.CB21A3856965@sourceware.org/mbox/"},{"id":85828,"url":"https://patchwork.plctlab.org/api/1.2/patches/85828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420102056.43142-1-kito.cheng@sifive.com/","msgid":"<20230420102056.43142-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T10:20:56","name":"[committed,v2] gcc-13: Add release note for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420102056.43142-1-kito.cheng@sifive.com/mbox/"},{"id":85882,"url":"https://patchwork.plctlab.org/api/1.2/patches/85882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420120351.918CE3857716@sourceware.org/","msgid":"<20230420120351.918CE3857716@sourceware.org>","list_archive_url":null,"date":"2023-04-20T12:03:05","name":"tree-optimization/109564 - avoid equivalences from PHIs in most cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420120351.918CE3857716@sourceware.org/mbox/"},{"id":85883,"url":"https://patchwork.plctlab.org/api/1.2/patches/85883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46815819-9b18-1052-c022-0a924901f906@codesourcery.com/","msgid":"<46815819-9b18-1052-c022-0a924901f906@codesourcery.com>","list_archive_url":null,"date":"2023-04-20T12:07:29","name":"[committed] amdgcn: update target-supports.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46815819-9b18-1052-c022-0a924901f906@codesourcery.com/mbox/"},{"id":85884,"url":"https://patchwork.plctlab.org/api/1.2/patches/85884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e76f66b1-a161-4bd8-c9e3-be1576dd1b9a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T12:11:36","name":"[committed] amdgcn: bug fix ldexp insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e76f66b1-a161-4bd8-c9e3-be1576dd1b9a@codesourcery.com/mbox/"},{"id":85909,"url":"https://patchwork.plctlab.org/api/1.2/patches/85909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132416.12502-1-kito.cheng@sifive.com/","msgid":"<20230420132416.12502-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T13:24:16","name":"[committed] RISC-V: Fix simplify_ior_optimization.c on rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132416.12502-1-kito.cheng@sifive.com/mbox/"},{"id":85910,"url":"https://patchwork.plctlab.org/api/1.2/patches/85910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132439.12555-1-kito.cheng@sifive.com/","msgid":"<20230420132439.12555-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T13:24:39","name":"[committed] RISC-V: Fix riscv/arch-19.c with different ISA spec version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132439.12555-1-kito.cheng@sifive.com/mbox/"},{"id":85911,"url":"https://patchwork.plctlab.org/api/1.2/patches/85911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5a95ca2-d7e8-280d-1351-c9dfb5b26de3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T13:29:49","name":"[committed,OG10] amdgcn, openmp: Fix concurrency in low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5a95ca2-d7e8-280d-1351-c9dfb5b26de3@codesourcery.com/mbox/"},{"id":85916,"url":"https://patchwork.plctlab.org/api/1.2/patches/85916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-1-ppalka@redhat.com/","msgid":"<20230420135633.2447631-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T13:56:32","name":"[1/2] c++: make strip_typedefs generalize strip_typedefs_expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-1-ppalka@redhat.com/mbox/"},{"id":85917,"url":"https://patchwork.plctlab.org/api/1.2/patches/85917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-2-ppalka@redhat.com/","msgid":"<20230420135633.2447631-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T13:56:33","name":"[2/2] c++: use TREE_VEC for trailing args of variadic built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-2-ppalka@redhat.com/mbox/"},{"id":85919,"url":"https://patchwork.plctlab.org/api/1.2/patches/85919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/D0E9924D-C7C4-4C43-B586-324B3378028B@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T14:10:24","name":"Ping * 3: [V6][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/D0E9924D-C7C4-4C43-B586-324B3378028B@oracle.com/mbox/"},{"id":85920,"url":"https://patchwork.plctlab.org/api/1.2/patches/85920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com/","msgid":"<3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com>","list_archive_url":null,"date":"2023-04-20T14:11:55","name":"Ping * 3: [V6][PATCH 2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com/mbox/"},{"id":85932,"url":"https://patchwork.plctlab.org/api/1.2/patches/85932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZQOn9KYrtz3JON-veJ+C+7oKttKMfzm_FEU7U5StSyUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T14:54:10","name":"i386: Handle sign-extract for QImode operations with high registers [PR78952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZQOn9KYrtz3JON-veJ+C+7oKttKMfzm_FEU7U5StSyUA@mail.gmail.com/mbox/"},{"id":85933,"url":"https://patchwork.plctlab.org/api/1.2/patches/85933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bDD-apcZ6JgAjAk5+h+twRFFMpmiYnRK9G9AKzdseNQw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T15:03:48","name":"arch: Use VIRTUAL_REGISTER_P predicate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bDD-apcZ6JgAjAk5+h+twRFFMpmiYnRK9G9AKzdseNQw@mail.gmail.com/mbox/"},{"id":85934,"url":"https://patchwork.plctlab.org/api/1.2/patches/85934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db985c56-371f-4d26-a1a5-26b25c5e68cf@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T15:07:10","name":"[pushed,LRA] : Exclude some hard regs for multi-reg inout reload pseudos used in asm in different mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db985c56-371f-4d26-a1a5-26b25c5e68cf@redhat.com/mbox/"},{"id":85939,"url":"https://patchwork.plctlab.org/api/1.2/patches/85939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420153437.2910374-1-ppalka@redhat.com/","msgid":"<20230420153437.2910374-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T15:34:37","name":"c++: improve template parameter level lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420153437.2910374-1-ppalka@redhat.com/mbox/"},{"id":85965,"url":"https://patchwork.plctlab.org/api/1.2/patches/85965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420165523.281157-1-vineetg@rivosinc.com/","msgid":"<20230420165523.281157-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-20T16:55:23","name":"MAINTAINERS: add Vineet Gupta to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420165523.281157-1-vineetg@rivosinc.com/mbox/"},{"id":85977,"url":"https://patchwork.plctlab.org/api/1.2/patches/85977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420171855.31294-1-alx@kernel.org/","msgid":"<20230420171855.31294-1-alx@kernel.org>","list_archive_url":null,"date":"2023-04-20T17:18:55","name":"doc: tfix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420171855.31294-1-alx@kernel.org/mbox/"},{"id":85979,"url":"https://patchwork.plctlab.org/api/1.2/patches/85979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com/","msgid":"<1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com>","list_archive_url":null,"date":"2023-04-20T17:22:11","name":"PR tee-optimization/109564 - Do not ignore UNDEFINED ranges when determining PHI equivalences.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com/mbox/"},{"id":85984,"url":"https://patchwork.plctlab.org/api/1.2/patches/85984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEF4qvhBzBOEQxX1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-20T17:38:50","name":"tree-vect-patterns: One small vect_recog_ctz_ffs_pattern tweak [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEF4qvhBzBOEQxX1@tucnak/mbox/"},{"id":86020,"url":"https://patchwork.plctlab.org/api/1.2/patches/86020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-28f2e76d-4032-4ca5-8666-7faf6caf6c05-1682020919629@3c-app-gmx-bs34/","msgid":"","list_archive_url":null,"date":"2023-04-20T20:01:59","name":"Fortran: function results never have the ALLOCATABLE attribute [PR109500]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-28f2e76d-4032-4ca5-8666-7faf6caf6c05-1682020919629@3c-app-gmx-bs34/mbox/"},{"id":86021,"url":"https://patchwork.plctlab.org/api/1.2/patches/86021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfD3TVgU3utyPeMvG=7KVy8tNJsUf1h_wLAcy4R919_A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T20:11:42","name":"RISC-V: avoid splitting small constants in bcrli_nottwobits patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfD3TVgU3utyPeMvG=7KVy8tNJsUf1h_wLAcy4R919_A@mail.gmail.com/mbox/"},{"id":86151,"url":"https://patchwork.plctlab.org/api/1.2/patches/86151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064712.60139-1-kito.cheng@sifive.com/","msgid":"<20230421064712.60139-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-21T06:47:12","name":"[committed,v2] RISC-V: Handle multi-lib path correclty for linux [DRAFT]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064712.60139-1-kito.cheng@sifive.com/mbox/"},{"id":86153,"url":"https://patchwork.plctlab.org/api/1.2/patches/86153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064937.106679-1-kito.cheng@sifive.com/","msgid":"<20230421064937.106679-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-21T06:49:37","name":"[committed,v2] RISC-V: Add local user vsetvl instruction elimination [PR109547]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064937.106679-1-kito.cheng@sifive.com/mbox/"},{"id":86155,"url":"https://patchwork.plctlab.org/api/1.2/patches/86155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421070011.166258-1-juzhe.zhong@rivai.ai/","msgid":"<20230421070011.166258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T07:00:11","name":"RISC-V: Support segment intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421070011.166258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86162,"url":"https://patchwork.plctlab.org/api/1.2/patches/86162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421074828.C8C631390E@imap2.suse-dmz.suse.de/","msgid":"<20230421074828.C8C631390E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T07:48:28","name":"Fix LCM dataflow CFG order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421074828.C8C631390E@imap2.suse-dmz.suse.de/mbox/"},{"id":86164,"url":"https://patchwork.plctlab.org/api/1.2/patches/86164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421075851.38441-1-juzhe.zhong@rivai.ai/","msgid":"<20230421075851.38441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T07:58:51","name":"RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421075851.38441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86165,"url":"https://patchwork.plctlab.org/api/1.2/patches/86165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421080205.47633-1-juzhe.zhong@rivai.ai/","msgid":"<20230421080205.47633-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T08:02:05","name":"[V2] RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421080205.47633-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86189,"url":"https://patchwork.plctlab.org/api/1.2/patches/86189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091007.158276-1-juzhe.zhong@rivai.ai/","msgid":"<20230421091007.158276-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T09:10:07","name":"[V3] RISC-V: Defer vsetvli insertion to later if possible [PR108270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091007.158276-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86193,"url":"https://patchwork.plctlab.org/api/1.2/patches/86193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091912.169622-1-juzhe.zhong@rivai.ai/","msgid":"<20230421091912.169622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T09:19:12","name":"[V4] RISC-V: Defer vsetvli insertion to later if possible [PR108270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091912.169622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86216,"url":"https://patchwork.plctlab.org/api/1.2/patches/86216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421100722.17288-1-gaofei@eswincomputing.com/","msgid":"<20230421100722.17288-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-04-21T10:07:22","name":"RISC-V: decouple stack allocation for rv32e w/o save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421100722.17288-1-gaofei@eswincomputing.com/mbox/"},{"id":86249,"url":"https://patchwork.plctlab.org/api/1.2/patches/86249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112446.2DD2B13456@imap2.suse-dmz.suse.de/","msgid":"<20230421112446.2DD2B13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:24:45","name":"[1/3] change DF to use the proper CFG order for DF_FORWARD problems","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112446.2DD2B13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86250,"url":"https://patchwork.plctlab.org/api/1.2/patches/86250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112505.9E91D13456@imap2.suse-dmz.suse.de/","msgid":"<20230421112505.9E91D13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:25:05","name":"[2/3] change inverted_post_order_compute to inverted_rev_post_order_compute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112505.9E91D13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86251,"url":"https://patchwork.plctlab.org/api/1.2/patches/86251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112527.BB76813456@imap2.suse-dmz.suse.de/","msgid":"<20230421112527.BB76813456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:25:27","name":"[3/3] Use correct CFG orders for DF worklist processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112527.BB76813456@imap2.suse-dmz.suse.de/mbox/"},{"id":86252,"url":"https://patchwork.plctlab.org/api/1.2/patches/86252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ07c4CCxL0skMb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:35:09","name":"Remove dead handling of label_decl in tree merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ07c4CCxL0skMb@kam.mff.cuni.cz/mbox/"},{"id":86257,"url":"https://patchwork.plctlab.org/api/1.2/patches/86257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421114722.6D89F13456@imap2.suse-dmz.suse.de/","msgid":"<20230421114722.6D89F13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:47:22","name":"tree-optimization/109573 - avoid ICEing on unexpected live def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421114722.6D89F13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86264,"url":"https://patchwork.plctlab.org/api/1.2/patches/86264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ42eT5TXmuBzia@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:51:53","name":"Stabilize temporary variable names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ42eT5TXmuBzia@kam.mff.cuni.cz/mbox/"},{"id":86266,"url":"https://patchwork.plctlab.org/api/1.2/patches/86266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ6p/HJxNt479h/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:59:35","name":"match.pd: Fix fneg/fadd optimization [PR109583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ6p/HJxNt479h/@tucnak/mbox/"},{"id":86267,"url":"https://patchwork.plctlab.org/api/1.2/patches/86267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ7qPghoFZ59bIS@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T12:03:52","name":"Stabilize inliner Fibonacci heap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ7qPghoFZ59bIS@kam.mff.cuni.cz/mbox/"},{"id":86298,"url":"https://patchwork.plctlab.org/api/1.2/patches/86298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f53887a9-59b1-f348-c683-205f6e5255f0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T12:54:32","name":"[v4,1/4] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f53887a9-59b1-f348-c683-205f6e5255f0@linux.ibm.com/mbox/"},{"id":86311,"url":"https://patchwork.plctlab.org/api/1.2/patches/86311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEKRXFttQMehkW19@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T13:36:28","name":"Fix loop-ch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEKRXFttQMehkW19@kam.mff.cuni.cz/mbox/"},{"id":86322,"url":"https://patchwork.plctlab.org/api/1.2/patches/86322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135123.0BA1613456@imap2.suse-dmz.suse.de/","msgid":"<20230421135123.0BA1613456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:51:22","name":"Add operator* to gimple_stmt_iterator and gphi_iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135123.0BA1613456@imap2.suse-dmz.suse.de/mbox/"},{"id":86323,"url":"https://patchwork.plctlab.org/api/1.2/patches/86323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135135.B805413456@imap2.suse-dmz.suse.de/","msgid":"<20230421135135.B805413456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:51:35","name":"Add safe_is_a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135135.B805413456@imap2.suse-dmz.suse.de/mbox/"},{"id":86324,"url":"https://patchwork.plctlab.org/api/1.2/patches/86324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135306.0536913456@imap2.suse-dmz.suse.de/","msgid":"<20230421135306.0536913456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:53:05","name":"This replaces uses of last_stmt where we do not require debug skipping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135306.0536913456@imap2.suse-dmz.suse.de/mbox/"},{"id":86325,"url":"https://patchwork.plctlab.org/api/1.2/patches/86325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-1-hongtao.liu@intel.com/","msgid":"<20230421135347.2519452-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-21T13:53:46","name":"[1/2,i386] Support type _Float16/__bf16 independent of SSE2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-1-hongtao.liu@intel.com/mbox/"},{"id":86328,"url":"https://patchwork.plctlab.org/api/1.2/patches/86328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-2-hongtao.liu@intel.com/","msgid":"<20230421135347.2519452-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-21T13:53:47","name":"[2/2,i386] def_or_undef __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__ for target attribute/pragmas.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-2-hongtao.liu@intel.com/mbox/"},{"id":86353,"url":"https://patchwork.plctlab.org/api/1.2/patches/86353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-Tn3BewxELWbvLWj=qp14f-o+dQBe30rKXkb_yuh2Eg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T14:41:05","name":"i386: Remove REG_OK_FOR_INDEX/REG_OK_FOR_BASE and their derivatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-Tn3BewxELWbvLWj=qp14f-o+dQBe30rKXkb_yuh2Eg@mail.gmail.com/mbox/"},{"id":86376,"url":"https://patchwork.plctlab.org/api/1.2/patches/86376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421150248.968828-1-jwakely@redhat.com/","msgid":"<20230421150248.968828-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-21T15:02:48","name":"[committed,gcc-12] libstdc++: Optimize std::try_facet and std::use_facet [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421150248.968828-1-jwakely@redhat.com/mbox/"},{"id":86379,"url":"https://patchwork.plctlab.org/api/1.2/patches/86379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMk61mruUqyGGyp6mHZfOb0AYkUo-AFdKPxYVwZpnBx1Dw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:17:39","name":"[aarch64] Use force_reg instead of copy_to_mode_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMk61mruUqyGGyp6mHZfOb0AYkUo-AFdKPxYVwZpnBx1Dw@mail.gmail.com/mbox/"},{"id":86381,"url":"https://patchwork.plctlab.org/api/1.2/patches/86381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6274bcc-8711-610e-98ba-c0ce55dff8eb@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:21:08","name":"[v4,3/4] ree: Main functionality to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6274bcc-8711-610e-98ba-c0ce55dff8eb@linux.ibm.com/mbox/"},{"id":86382,"url":"https://patchwork.plctlab.org/api/1.2/patches/86382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddpm7xuunr.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:22:48","name":"doc: Update install.texi for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddpm7xuunr.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":86448,"url":"https://patchwork.plctlab.org/api/1.2/patches/86448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421173804.3513130-1-arsen@aarsen.me/","msgid":"<20230421173804.3513130-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-21T17:38:04","name":"gcc/m2: Drop references to $(P)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421173804.3513130-1-arsen@aarsen.me/mbox/"},{"id":86466,"url":"https://patchwork.plctlab.org/api/1.2/patches/86466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fba5f376-75b6-e8ca-cd56-fa49fc51b668@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T18:27:35","name":"[committed,PR,testsuite/109549] Adjust x86 testsuite for recent if-conversion cost checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fba5f376-75b6-e8ca-cd56-fa49fc51b668@ventanamicro.com/mbox/"},{"id":86474,"url":"https://patchwork.plctlab.org/api/1.2/patches/86474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193227.1044332-1-jason@redhat.com/","msgid":"<20230421193227.1044332-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-21T19:32:27","name":"[pushed] c++: fix '\''unsigned typedef-name'\'' extension [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193227.1044332-1-jason@redhat.com/mbox/"},{"id":86475,"url":"https://patchwork.plctlab.org/api/1.2/patches/86475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193338.3874230-1-sam@gentoo.org/","msgid":"<20230421193338.3874230-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-21T19:33:38","name":"testsuite: Add testcase for sparc ICE [PR105573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193338.3874230-1-sam@gentoo.org/mbox/"},{"id":86482,"url":"https://patchwork.plctlab.org/api/1.2/patches/86482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5da330c4-2918-10df-b315-17307067d2bf@redhat.com/","msgid":"<5da330c4-2918-10df-b315-17307067d2bf@redhat.com>","list_archive_url":null,"date":"2023-04-21T20:34:43","name":"[COMMITTED] PR tree-optimization/109546 - Do not fold ADDR_EXPR conditions leading to builtin_unreachable early.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5da330c4-2918-10df-b315-17307067d2bf@redhat.com/mbox/"},{"id":86553,"url":"https://patchwork.plctlab.org/api/1.2/patches/86553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEN9yWhVwRqM2kVn@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-22T06:25:13","name":"c++: Fix ICE with parameter pack of decltype(auto) [PR103497]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEN9yWhVwRqM2kVn@Thaum.localdomain/mbox/"},{"id":86560,"url":"https://patchwork.plctlab.org/api/1.2/patches/86560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOUjFpUiri7kUOp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:02:20","name":"Fix up bootstrap with GCC 4.[89] after RAII auto_mpfr and autp_mpz [PR109589]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOUjFpUiri7kUOp@tucnak/mbox/"},{"id":86562,"url":"https://patchwork.plctlab.org/api/1.2/patches/86562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOZPwDFcqYdSnaN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:22:23","name":"testsuite: Fix up pr109011-*.c tests for powerpc [PR109572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOZPwDFcqYdSnaN@tucnak/mbox/"},{"id":86563,"url":"https://patchwork.plctlab.org/api/1.2/patches/86563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLQB=optugqew-T1a5bn=DA=XsN7fYT=hT4fY4UtpU7+Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:32:30","name":"[fortran] PRs 105152, 100193, 87946, 103389, 104429 and 82774","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLQB=optugqew-T1a5bn=DA=XsN7fYT=hT4fY4UtpU7+Q@mail.gmail.com/mbox/"},{"id":86568,"url":"https://patchwork.plctlab.org/api/1.2/patches/86568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com/","msgid":"<8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com>","list_archive_url":null,"date":"2023-04-22T09:06:20","name":"[v4,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com/mbox/"},{"id":86608,"url":"https://patchwork.plctlab.org/api/1.2/patches/86608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007101d97538$e0734790$a159d6b0$@nextmovesoftware.com/","msgid":"<007101d97538$e0734790$a159d6b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T16:38:30","name":"[xstormy16] Update xstormy16_rtx_costs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007101d97538$e0734790$a159d6b0$@nextmovesoftware.com/mbox/"},{"id":86609,"url":"https://patchwork.plctlab.org/api/1.2/patches/86609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com/","msgid":"<008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T16:43:12","name":"[xstormy16] Improved SImode shifts by two bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com/mbox/"},{"id":86611,"url":"https://patchwork.plctlab.org/api/1.2/patches/86611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9fe99b-65ff-4d26-ae3e-5a9668831344@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-22T16:47:00","name":"[committed] Adjust rx movsicc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9fe99b-65ff-4d26-ae3e-5a9668831344@gmail.com/mbox/"},{"id":86633,"url":"https://patchwork.plctlab.org/api/1.2/patches/86633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026001d9755d$19b30030$4d190090$@nextmovesoftware.com/","msgid":"<026001d9755d$19b30030$4d190090$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T20:57:48","name":"[xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026001d9755d$19b30030$4d190090$@nextmovesoftware.com/mbox/"},{"id":86639,"url":"https://patchwork.plctlab.org/api/1.2/patches/86639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-2-apinski@marvell.com/","msgid":"<20230422220921.452264-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:16","name":"[1/6] PHIOPT: Move check on diamond bb to tree_ssa_phiopt_worker from minmax_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-2-apinski@marvell.com/mbox/"},{"id":86642,"url":"https://patchwork.plctlab.org/api/1.2/patches/86642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-3-apinski@marvell.com/","msgid":"<20230422220921.452264-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:17","name":"[2/6] PHIOPT: Cleanup tree_ssa_phiopt_worker code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-3-apinski@marvell.com/mbox/"},{"id":86643,"url":"https://patchwork.plctlab.org/api/1.2/patches/86643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-4-apinski@marvell.com/","msgid":"<20230422220921.452264-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:18","name":"[3/6] PHIOPT: Allow other diamond uses when do_hoist_loads is true","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-4-apinski@marvell.com/mbox/"},{"id":86640,"url":"https://patchwork.plctlab.org/api/1.2/patches/86640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-5-apinski@marvell.com/","msgid":"<20230422220921.452264-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:19","name":"[4/6] PHIOPT: Factor out some code from match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-5-apinski@marvell.com/mbox/"},{"id":86641,"url":"https://patchwork.plctlab.org/api/1.2/patches/86641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-6-apinski@marvell.com/","msgid":"<20230422220921.452264-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:20","name":"[5/6] PHIOPT: Ignore predicates for match-and-simplify phi-opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-6-apinski@marvell.com/mbox/"},{"id":86644,"url":"https://patchwork.plctlab.org/api/1.2/patches/86644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-7-apinski@marvell.com/","msgid":"<20230422220921.452264-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:21","name":"[6/6] PHIOPT: Add support for diamond shaped bb to match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-7-apinski@marvell.com/mbox/"},{"id":86656,"url":"https://patchwork.plctlab.org/api/1.2/patches/86656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423030258.194509-1-hongtao.liu@intel.com/","msgid":"<20230423030258.194509-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-23T03:02:58","name":"Add testcases for ffs/ctz vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423030258.194509-1-hongtao.liu@intel.com/mbox/"},{"id":86668,"url":"https://patchwork.plctlab.org/api/1.2/patches/86668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6444e3c7.16516@msgid.achurch.org/","msgid":"<6444e3c7.16516@msgid.achurch.org>","list_archive_url":null,"date":"2023-04-23T07:52:38","name":"PoC: add -Wunused-result=strict","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6444e3c7.16516@msgid.achurch.org/mbox/"},{"id":86674,"url":"https://patchwork.plctlab.org/api/1.2/patches/86674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423090453.87556-1-aldyh@redhat.com/","msgid":"<20230423090453.87556-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-23T09:04:53","name":"[COMMITTED] Handle NANs in frange::operator== [PR109593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423090453.87556-1-aldyh@redhat.com/mbox/"},{"id":86692,"url":"https://patchwork.plctlab.org/api/1.2/patches/86692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423111752.101308-1-juzhe.zhong@rivai.ai/","msgid":"<20230423111752.101308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T11:17:52","name":"[V2] RISC-V: Optimize fault only first load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423111752.101308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86693,"url":"https://patchwork.plctlab.org/api/1.2/patches/86693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423113354.141950-1-juzhe.zhong@rivai.ai/","msgid":"<20230423113354.141950-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T11:33:54","name":"RISC-V: Add function comment for cleanup_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423113354.141950-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86698,"url":"https://patchwork.plctlab.org/api/1.2/patches/86698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121812.95392-1-juzhe.zhong@rivai.ai/","msgid":"<20230423121812.95392-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T12:18:12","name":"RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121812.95392-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86701,"url":"https://patchwork.plctlab.org/api/1.2/patches/86701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121859.95799-1-juzhe.zhong@rivai.ai/","msgid":"<20230423121859.95799-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T12:18:59","name":"[V2] RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121859.95799-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86722,"url":"https://patchwork.plctlab.org/api/1.2/patches/86722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423131903.155998-1-xry111@xry111.site/","msgid":"<20230423131903.155998-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-23T13:19:03","name":"LoongArch: Enable shrink wrapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423131903.155998-1-xry111@xry111.site/mbox/"},{"id":86780,"url":"https://patchwork.plctlab.org/api/1.2/patches/86780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org/","msgid":"<283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-04-23T16:47:52","name":"Turn on LRA on all targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org/mbox/"},{"id":86807,"url":"https://patchwork.plctlab.org/api/1.2/patches/86807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com/","msgid":"<00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-23T20:14:28","name":"PR rtl-optimization/109476: Use ZERO_EXTEND instead of zeroing a SUBREG.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com/mbox/"},{"id":86832,"url":"https://patchwork.plctlab.org/api/1.2/patches/86832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424035341.96537-1-juzhe.zhong@rivai.ai/","msgid":"<20230424035341.96537-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-24T03:53:41","name":"[V2] RISC-V: Optimize comparison patterns for register allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424035341.96537-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86888,"url":"https://patchwork.plctlab.org/api/1.2/patches/86888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424074332.141890-1-aldyh@redhat.com/","msgid":"<20230424074332.141890-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-24T07:43:32","name":"Pass correct type to irange::contains_p() in ipa-cp.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424074332.141890-1-aldyh@redhat.com/mbox/"},{"id":86939,"url":"https://patchwork.plctlab.org/api/1.2/patches/86939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz/","msgid":"<7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz>","list_archive_url":null,"date":"2023-04-24T10:00:17","name":"[(pushed)] MAINTAINERS: fix sorting of names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz/mbox/"},{"id":87099,"url":"https://patchwork.plctlab.org/api/1.2/patches/87099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEamGo7BN+3iscYO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-24T15:54:02","name":"powerpc: Fix up *branch_anddi3_dot for -m32 -mpowerpc64 [PR109566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEamGo7BN+3iscYO@tucnak/mbox/"},{"id":87108,"url":"https://patchwork.plctlab.org/api/1.2/patches/87108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162337.104065-1-ppalka@redhat.com/","msgid":"<20230424162337.104065-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-24T16:23:37","name":"libstdc++: Fix __max_diff_type::operator>>= for negative values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162337.104065-1-ppalka@redhat.com/mbox/"},{"id":87109,"url":"https://patchwork.plctlab.org/api/1.2/patches/87109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162347.104093-1-ppalka@redhat.com/","msgid":"<20230424162347.104093-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-24T16:23:47","name":"libstdc++: Make __max_size_type and __max_diff_type structural","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162347.104093-1-ppalka@redhat.com/mbox/"},{"id":87168,"url":"https://patchwork.plctlab.org/api/1.2/patches/87168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-2-apinski@marvell.com/","msgid":"<20230424213011.528181-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:05","name":"[1/7] PHIOPT: Split out store elimination from phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-2-apinski@marvell.com/mbox/"},{"id":87172,"url":"https://patchwork.plctlab.org/api/1.2/patches/87172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-3-apinski@marvell.com/","msgid":"<20230424213011.528181-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:06","name":"[2/7] PHIOPT: Rename tree_ssa_phiopt_worker to pass_phiopt::execute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-3-apinski@marvell.com/mbox/"},{"id":87167,"url":"https://patchwork.plctlab.org/api/1.2/patches/87167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-4-apinski@marvell.com/","msgid":"<20230424213011.528181-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:07","name":"[3/7] PHIOPT: Move store_elim_worker into pass_cselim::execute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-4-apinski@marvell.com/mbox/"},{"id":87166,"url":"https://patchwork.plctlab.org/api/1.2/patches/87166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-5-apinski@marvell.com/","msgid":"<20230424213011.528181-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:08","name":"[4/7] MIN/MAX should be treated similar as comparisons for trapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-5-apinski@marvell.com/mbox/"},{"id":87169,"url":"https://patchwork.plctlab.org/api/1.2/patches/87169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-6-apinski@marvell.com/","msgid":"<20230424213011.528181-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:09","name":"[5/7] PHIOPT: Allow MIN/MAX to have up to 2 MIN/MAX expressions for early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-6-apinski@marvell.com/mbox/"},{"id":87171,"url":"https://patchwork.plctlab.org/api/1.2/patches/87171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-7-apinski@marvell.com/","msgid":"<20230424213011.528181-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:10","name":"[6/7] MATCH: Factor out code that for min max detection with constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-7-apinski@marvell.com/mbox/"},{"id":87170,"url":"https://patchwork.plctlab.org/api/1.2/patches/87170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-8-apinski@marvell.com/","msgid":"<20230424213011.528181-8-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:11","name":"[7/7] MATCH: Add patterns from phiopt'\''s minmax_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-8-apinski@marvell.com/mbox/"},{"id":87193,"url":"https://patchwork.plctlab.org/api/1.2/patches/87193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424223055.3450183-1-sam@gentoo.org/","msgid":"<20230424223055.3450183-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-24T22:30:55","name":"[v2] testsuite: Add testcase for sparc ICE [PR105573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424223055.3450183-1-sam@gentoo.org/mbox/"},{"id":87223,"url":"https://patchwork.plctlab.org/api/1.2/patches/87223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425002404.533283-1-apinski@marvell.com/","msgid":"<20230425002404.533283-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-25T00:24:04","name":"[1] Add alternative testcase of phi-opt-25.c that tests phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425002404.533283-1-apinski@marvell.com/mbox/"},{"id":87253,"url":"https://patchwork.plctlab.org/api/1.2/patches/87253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425062543.851AF13466@imap2.suse-dmz.suse.de/","msgid":"<20230425062543.851AF13466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T06:25:43","name":"rtl-optimization/109585 - alias analysis typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425062543.851AF13466@imap2.suse-dmz.suse.de/mbox/"},{"id":87309,"url":"https://patchwork.plctlab.org/api/1.2/patches/87309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2140474.irdbgypaU6@fomalhaut/","msgid":"<2140474.irdbgypaU6@fomalhaut>","list_archive_url":null,"date":"2023-04-25T08:47:59","name":"[Ada] Remove obsolete configure code in gnattools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2140474.irdbgypaU6@fomalhaut/mbox/"},{"id":87317,"url":"https://patchwork.plctlab.org/api/1.2/patches/87317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425090517.247556-1-aldyh@redhat.com/","msgid":"<20230425090517.247556-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-25T09:05:17","name":"Remove default constructor to nan_state.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425090517.247556-1-aldyh@redhat.com/mbox/"},{"id":87326,"url":"https://patchwork.plctlab.org/api/1.2/patches/87326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3493207.iIbC2pHGDl@fomalhaut/","msgid":"<3493207.iIbC2pHGDl@fomalhaut>","list_archive_url":null,"date":"2023-04-25T09:33:23","name":"Avoid creating useless debug temporaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3493207.iIbC2pHGDl@fomalhaut/mbox/"},{"id":87331,"url":"https://patchwork.plctlab.org/api/1.2/patches/87331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j7cu0jnuk.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-25T09:46:43","name":"MAINTAINERS: add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j7cu0jnuk.fsf@arm.com/mbox/"},{"id":87361,"url":"https://patchwork.plctlab.org/api/1.2/patches/87361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com/","msgid":"<00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-25T11:10:44","name":"[Committed] Correct zeroextendqihi2 insn length regression on xstormy16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com/mbox/"},{"id":87384,"url":"https://patchwork.plctlab.org/api/1.2/patches/87384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEfLSlzL3Ajemmmk@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-25T12:44:58","name":"[committed] testsuite: Fix up ext-floating15.C tests on powerpc64-linux [PR109278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEfLSlzL3Ajemmmk@tucnak/mbox/"},{"id":87390,"url":"https://patchwork.plctlab.org/api/1.2/patches/87390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425130836.5E2B513466@imap2.suse-dmz.suse.de/","msgid":"<20230425130836.5E2B513466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T13:08:35","name":"tree-optimization/109609 - correctly interpret arg size in fnspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425130836.5E2B513466@imap2.suse-dmz.suse.de/mbox/"},{"id":87413,"url":"https://patchwork.plctlab.org/api/1.2/patches/87413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425134229.181115-1-juzhe.zhong@rivai.ai/","msgid":"<20230425134229.181115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-25T13:42:29","name":"VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425134229.181115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87419,"url":"https://patchwork.plctlab.org/api/1.2/patches/87419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEffjoGtOosBVKcZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-25T14:11:26","name":"[committed] testsuite: Fix up ext-floating2.C on powerpc64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEffjoGtOosBVKcZ@tucnak/mbox/"},{"id":87450,"url":"https://patchwork.plctlab.org/api/1.2/patches/87450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425142904.133137-1-pan2.li@intel.com/","msgid":"<20230425142904.133137-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-25T14:29:04","name":"[v3] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425142904.133137-1-pan2.li@intel.com/mbox/"},{"id":87452,"url":"https://patchwork.plctlab.org/api/1.2/patches/87452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com/","msgid":"<37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com>","list_archive_url":null,"date":"2023-04-25T14:35:46","name":"[committed] Re: [patch] '\''omp scan'\'' struct block seq update for OpenMP 5.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com/mbox/"},{"id":87467,"url":"https://patchwork.plctlab.org/api/1.2/patches/87467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4100446e-18fa-6f72-13a2-05905666a787@suse.com/","msgid":"<4100446e-18fa-6f72-13a2-05905666a787@suse.com>","list_archive_url":null,"date":"2023-04-25T14:50:29","name":"testsuite: adjust NOP expectations for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4100446e-18fa-6f72-13a2-05905666a787@suse.com/mbox/"},{"id":87471,"url":"https://patchwork.plctlab.org/api/1.2/patches/87471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com/","msgid":"<27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com>","list_archive_url":null,"date":"2023-04-25T15:00:05","name":"[v2] testsuite/C++: cope with IPv6 being unavailable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com/mbox/"},{"id":87472,"url":"https://patchwork.plctlab.org/api/1.2/patches/87472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425151135.AEB62138E3@imap2.suse-dmz.suse.de/","msgid":"<20230425151135.AEB62138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T15:11:35","name":"More last_stmt removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425151135.AEB62138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":87473,"url":"https://patchwork.plctlab.org/api/1.2/patches/87473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEft8nJK6sP93fM+@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-25T15:12:50","name":"Unloop no longer looping loops in loop-ch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEft8nJK6sP93fM+@kam.mff.cuni.cz/mbox/"},{"id":87539,"url":"https://patchwork.plctlab.org/api/1.2/patches/87539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com/","msgid":"<019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-25T20:20:50","name":"[xstormy16] Add support for byte and word swapping instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com/mbox/"},{"id":87589,"url":"https://patchwork.plctlab.org/api/1.2/patches/87589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426020159.2497257-1-juzhe.zhong@rivai.ai/","msgid":"<20230426020159.2497257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T02:01:59","name":"Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426020159.2497257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87594,"url":"https://patchwork.plctlab.org/api/1.2/patches/87594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426035929.330213-1-juzhe.zhong@rivai.ai/","msgid":"<20230426035929.330213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T03:59:29","name":"[V3] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426035929.330213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87600,"url":"https://patchwork.plctlab.org/api/1.2/patches/87600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426044739.2672860-1-juzhe.zhong@rivai.ai/","msgid":"<20230426044739.2672860-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T04:47:39","name":"[V2] RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426044739.2672860-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87619,"url":"https://patchwork.plctlab.org/api/1.2/patches/87619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426061026.116232-1-sebastian.huber@embedded-brains.de/","msgid":"<20230426061026.116232-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-04-26T06:10:26","name":"[wwwdocs] gcc-13: Mention new gcov feature","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426061026.116232-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":87687,"url":"https://patchwork.plctlab.org/api/1.2/patches/87687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426073555.4073530-1-hongtao.liu@intel.com/","msgid":"<20230426073555.4073530-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-26T07:35:55","name":"[vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426073555.4073530-1-hongtao.liu@intel.com/mbox/"},{"id":87725,"url":"https://patchwork.plctlab.org/api/1.2/patches/87725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-1-aldyh@redhat.com/","msgid":"<20230426083328.313566-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:20","name":"[COMMITTED] Remove compare_names* from legacy cond folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-1-aldyh@redhat.com/mbox/"},{"id":87731,"url":"https://patchwork.plctlab.org/api/1.2/patches/87731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-2-aldyh@redhat.com/","msgid":"<20230426083328.313566-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:21","name":"[COMMITTED] Refactor vrp_evaluate_conditional* and rename it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-2-aldyh@redhat.com/mbox/"},{"id":87728,"url":"https://patchwork.plctlab.org/api/1.2/patches/87728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-3-aldyh@redhat.com/","msgid":"<20230426083328.313566-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:22","name":"[COMMITTED] Remove range_query::get_value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-3-aldyh@redhat.com/mbox/"},{"id":87726,"url":"https://patchwork.plctlab.org/api/1.2/patches/87726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-4-aldyh@redhat.com/","msgid":"<20230426083328.313566-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:23","name":"[COMMITTED] Remove deprecated range_fold_{unary, binary}_expr uses from ipa-*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-4-aldyh@redhat.com/mbox/"},{"id":87729,"url":"https://patchwork.plctlab.org/api/1.2/patches/87729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-5-aldyh@redhat.com/","msgid":"<20230426083328.313566-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:24","name":"[COMMITTED] Remove range_fold_{unary,binary}_expr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-5-aldyh@redhat.com/mbox/"},{"id":87734,"url":"https://patchwork.plctlab.org/api/1.2/patches/87734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-6-aldyh@redhat.com/","msgid":"<20230426083328.313566-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:25","name":"[COMMITTED] Remove irange::may_contain_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-6-aldyh@redhat.com/mbox/"},{"id":87733,"url":"https://patchwork.plctlab.org/api/1.2/patches/87733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-7-aldyh@redhat.com/","msgid":"<20230426083328.313566-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:26","name":"[COMMITTED] Remove symbolics from irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-7-aldyh@redhat.com/mbox/"},{"id":87736,"url":"https://patchwork.plctlab.org/api/1.2/patches/87736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-8-aldyh@redhat.com/","msgid":"<20230426083328.313566-8-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:27","name":"[COMMITTED] Remove irange::constant_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-8-aldyh@redhat.com/mbox/"},{"id":87737,"url":"https://patchwork.plctlab.org/api/1.2/patches/87737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-9-aldyh@redhat.com/","msgid":"<20230426083328.313566-9-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:28","name":"[COMMITTED] Convert users of legacy API to get_legacy_range() function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-9-aldyh@redhat.com/mbox/"},{"id":87743,"url":"https://patchwork.plctlab.org/api/1.2/patches/87743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AEA71396-534B-4730-901C-9B561568A780@microchip.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T09:00:08","name":"avr: Set param_min_pagesize to 0 [PR105523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AEA71396-534B-4730-901C-9B561568A780@microchip.com/mbox/"},{"id":87826,"url":"https://patchwork.plctlab.org/api/1.2/patches/87826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-1-aldyh@redhat.com/","msgid":"<20230426114752.336928-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:46","name":"[COMMITTED] Fix swapping of ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-1-aldyh@redhat.com/mbox/"},{"id":87827,"url":"https://patchwork.plctlab.org/api/1.2/patches/87827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-2-aldyh@redhat.com/","msgid":"<20230426114752.336928-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:47","name":"[COMMITTED] Replace ad-hoc value_range dumpers with irange::dump.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-2-aldyh@redhat.com/mbox/"},{"id":87828,"url":"https://patchwork.plctlab.org/api/1.2/patches/87828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-3-aldyh@redhat.com/","msgid":"<20230426114752.336928-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:48","name":"[COMMITTED] Remove some uses of deprecated irange API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-3-aldyh@redhat.com/mbox/"},{"id":87834,"url":"https://patchwork.plctlab.org/api/1.2/patches/87834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-4-aldyh@redhat.com/","msgid":"<20230426114752.336928-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:49","name":"[COMMITTED] Convert compare_nonzero_chars to wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-4-aldyh@redhat.com/mbox/"},{"id":87830,"url":"https://patchwork.plctlab.org/api/1.2/patches/87830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-5-aldyh@redhat.com/","msgid":"<20230426114752.336928-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:50","name":"[COMMITTED] Remove range_int_cst_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-5-aldyh@redhat.com/mbox/"},{"id":87831,"url":"https://patchwork.plctlab.org/api/1.2/patches/87831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-6-aldyh@redhat.com/","msgid":"<20230426114752.336928-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:51","name":"[COMMITTED] Remove range_has_numeric_bounds_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-6-aldyh@redhat.com/mbox/"},{"id":87829,"url":"https://patchwork.plctlab.org/api/1.2/patches/87829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-7-aldyh@redhat.com/","msgid":"<20230426114752.336928-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:52","name":"[COMMITTED] Remove legacy range support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-7-aldyh@redhat.com/mbox/"},{"id":87839,"url":"https://patchwork.plctlab.org/api/1.2/patches/87839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120006.2362465-1-pan2.li@intel.com/","msgid":"<20230426120006.2362465-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-26T12:00:06","name":"RISC-V: Legitimise the const0_rtx for RVV load/store address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120006.2362465-1-pan2.li@intel.com/mbox/"},{"id":87843,"url":"https://patchwork.plctlab.org/api/1.2/patches/87843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120503.3207041-1-yanzhang.wang@intel.com/","msgid":"<20230426120503.3207041-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T12:05:03","name":"RISC-V: ICE for vlmul_ext_v intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120503.3207041-1-yanzhang.wang@intel.com/mbox/"},{"id":87849,"url":"https://patchwork.plctlab.org/api/1.2/patches/87849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426123743.3210243-1-yanzhang.wang@intel.com/","msgid":"<20230426123743.3210243-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T12:37:43","name":"RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426123743.3210243-1-yanzhang.wang@intel.com/mbox/"},{"id":87856,"url":"https://patchwork.plctlab.org/api/1.2/patches/87856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426125140.1064474-1-ppalka@redhat.com/","msgid":"<20230426125140.1064474-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-26T12:51:40","name":"wwwdocs: Document more libstdc++ additions for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426125140.1064474-1-ppalka@redhat.com/mbox/"},{"id":87861,"url":"https://patchwork.plctlab.org/api/1.2/patches/87861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426130602.3335312-1-yanzhang.wang@intel.com/","msgid":"<20230426130602.3335312-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T13:06:02","name":"[v2] RISC-V: ICE for vlmul_ext_v intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426130602.3335312-1-yanzhang.wang@intel.com/mbox/"},{"id":87877,"url":"https://patchwork.plctlab.org/api/1.2/patches/87877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEkzW8oH5Rxp7yKM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-26T14:21:15","name":"Add targetm.libm_function_max_error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEkzW8oH5Rxp7yKM@tucnak/mbox/"},{"id":87893,"url":"https://patchwork.plctlab.org/api/1.2/patches/87893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426160705.1072259-1-patrick@rivosinc.com/","msgid":"<20230426160705.1072259-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T16:07:05","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426160705.1072259-1-patrick@rivosinc.com/mbox/"},{"id":87894,"url":"https://patchwork.plctlab.org/api/1.2/patches/87894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426161539.1571701-1-jwakely@redhat.com/","msgid":"<20230426161539.1571701-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-26T16:15:39","name":"doc: Add explanation of zero-length array example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426161539.1571701-1-jwakely@redhat.com/mbox/"},{"id":87895,"url":"https://patchwork.plctlab.org/api/1.2/patches/87895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZElO3DhiloDY6dO7@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-26T16:18:36","name":"[V4] PR target/105325, Make load/cmp fusion know about prefixed loads.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZElO3DhiloDY6dO7@toto.the-meissners.org/mbox/"},{"id":87898,"url":"https://patchwork.plctlab.org/api/1.2/patches/87898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426165347.599616-1-apinski@marvell.com/","msgid":"<20230426165347.599616-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-26T16:53:47","name":"GCC-13/changes: Add note about iostream usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426165347.599616-1-apinski@marvell.com/mbox/"},{"id":87900,"url":"https://patchwork.plctlab.org/api/1.2/patches/87900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426170129.1076929-1-patrick@rivosinc.com/","msgid":"<20230426170129.1076929-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T17:01:29","name":"[committed] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426170129.1076929-1-patrick@rivosinc.com/mbox/"},{"id":87956,"url":"https://patchwork.plctlab.org/api/1.2/patches/87956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6840d76-3c02-6034-38c5-f3ead4a6bbb4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T19:26:00","name":"[COMMITTED,1/5] PR tree-optimization/109417 - Don'\''t save ssa-name pointer in dependency cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6840d76-3c02-6034-38c5-f3ead4a6bbb4@redhat.com/mbox/"},{"id":87957,"url":"https://patchwork.plctlab.org/api/1.2/patches/87957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28bd16f7-f334-3245-c444-65a23e98d020@redhat.com/","msgid":"<28bd16f7-f334-3245-c444-65a23e98d020@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:26:21","name":"[COMMITTED,2/5] Quicker relation check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28bd16f7-f334-3245-c444-65a23e98d020@redhat.com/mbox/"},{"id":87958,"url":"https://patchwork.plctlab.org/api/1.2/patches/87958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b652b65f-63fb-f3d6-e031-ade8a9095730@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T19:26:40","name":"[COMMITTED,3/5] Add sbr_lazy_vector and adjust (e)vrp sparse cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b652b65f-63fb-f3d6-e031-ade8a9095730@redhat.com/mbox/"},{"id":87960,"url":"https://patchwork.plctlab.org/api/1.2/patches/87960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com/","msgid":"<5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:26:53","name":"[COMMITTED,4/5] Rename ssa_global_cache to ssa_cache and add has_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com/mbox/"},{"id":87959,"url":"https://patchwork.plctlab.org/api/1.2/patches/87959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com/","msgid":"<8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:27:06","name":"[COMMITTED,5/5] PR tree-optimization/108697 - Create a lazy ssa_cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com/mbox/"},{"id":87984,"url":"https://patchwork.plctlab.org/api/1.2/patches/87984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426205349.1131469-1-patrick@rivosinc.com/","msgid":"<20230426205349.1131469-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T20:53:49","name":"RISC-V: Fix sync.md and riscv.cc whitespace errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426205349.1131469-1-patrick@rivosinc.com/mbox/"},{"id":87986,"url":"https://patchwork.plctlab.org/api/1.2/patches/87986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211547.463435-1-jason@redhat.com/","msgid":"<20230426211547.463435-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:15:47","name":"[pushed] c++: unique friend shenanigans [PR69836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211547.463435-1-jason@redhat.com/mbox/"},{"id":87987,"url":"https://patchwork.plctlab.org/api/1.2/patches/87987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211602.463658-1-jason@redhat.com/","msgid":"<20230426211602.463658-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:16:02","name":"[pushed] c++: local class in nested generic lambda [PR109241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211602.463658-1-jason@redhat.com/mbox/"},{"id":87988,"url":"https://patchwork.plctlab.org/api/1.2/patches/87988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211613.463855-1-jason@redhat.com/","msgid":"<20230426211613.463855-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:16:13","name":"[pushed] c++: remove nsdmi_inst hashtable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211613.463855-1-jason@redhat.com/mbox/"},{"id":87989,"url":"https://patchwork.plctlab.org/api/1.2/patches/87989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426212106.1134636-1-patrick@rivosinc.com/","msgid":"<20230426212106.1134636-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:21:06","name":"[v2] RISC-V: Fix sync.md and riscv.cc whitespace errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426212106.1134636-1-patrick@rivosinc.com/mbox/"},{"id":87992,"url":"https://patchwork.plctlab.org/api/1.2/patches/87992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-2-collison@rivosinc.com/","msgid":"<20230426214514.3355280-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:05","name":"[v5,01/10] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-2-collison@rivosinc.com/mbox/"},{"id":88001,"url":"https://patchwork.plctlab.org/api/1.2/patches/88001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-3-collison@rivosinc.com/","msgid":"<20230426214514.3355280-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:06","name":"[v5,02/10] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-3-collison@rivosinc.com/mbox/"},{"id":87999,"url":"https://patchwork.plctlab.org/api/1.2/patches/87999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-4-collison@rivosinc.com/","msgid":"<20230426214514.3355280-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:07","name":"[v5,03/10] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-4-collison@rivosinc.com/mbox/"},{"id":88003,"url":"https://patchwork.plctlab.org/api/1.2/patches/88003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-5-collison@rivosinc.com/","msgid":"<20230426214514.3355280-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:08","name":"[v5,04/10] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-5-collison@rivosinc.com/mbox/"},{"id":87993,"url":"https://patchwork.plctlab.org/api/1.2/patches/87993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-6-collison@rivosinc.com/","msgid":"<20230426214514.3355280-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:09","name":"[v5,05/10] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-6-collison@rivosinc.com/mbox/"},{"id":87994,"url":"https://patchwork.plctlab.org/api/1.2/patches/87994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-7-collison@rivosinc.com/","msgid":"<20230426214514.3355280-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:10","name":"[v5,06/10] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-7-collison@rivosinc.com/mbox/"},{"id":88002,"url":"https://patchwork.plctlab.org/api/1.2/patches/88002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-8-collison@rivosinc.com/","msgid":"<20230426214514.3355280-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:11","name":"[v5,07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-8-collison@rivosinc.com/mbox/"},{"id":87998,"url":"https://patchwork.plctlab.org/api/1.2/patches/87998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-9-collison@rivosinc.com/","msgid":"<20230426214514.3355280-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:12","name":"[v5,08/10] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-9-collison@rivosinc.com/mbox/"},{"id":87997,"url":"https://patchwork.plctlab.org/api/1.2/patches/87997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-10-collison@rivosinc.com/","msgid":"<20230426214514.3355280-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:13","name":"[v5,09/10] RISC-V: autovec: This patch adds a guard for VNx1 vectors that are present in ports like riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-10-collison@rivosinc.com/mbox/"},{"id":88000,"url":"https://patchwork.plctlab.org/api/1.2/patches/88000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-11-collison@rivosinc.com/","msgid":"<20230426214514.3355280-11-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:14","name":"[v5,10/10] RISC-V: autovec: This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-11-collison@rivosinc.com/mbox/"},{"id":88035,"url":"https://patchwork.plctlab.org/api/1.2/patches/88035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427000528.C64CA20420@pchp3.se.axis.com/","msgid":"<20230427000528.C64CA20420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-27T00:05:28","name":"[committed] libgcc CRIS: Define TARGET_HAS_NO_HW_DIVIDE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427000528.C64CA20420@pchp3.se.axis.com/mbox/"},{"id":88075,"url":"https://patchwork.plctlab.org/api/1.2/patches/88075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427014542.539011-1-jason@redhat.com/","msgid":"<20230427014542.539011-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-27T01:45:42","name":"[pushed] c++: restore instantiate_decl assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427014542.539011-1-jason@redhat.com/mbox/"},{"id":88085,"url":"https://patchwork.plctlab.org/api/1.2/patches/88085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427023243.1481560-1-hjl.tools@gmail.com/","msgid":"<20230427023243.1481560-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-04-27T02:32:43","name":"libsanitizer: cherry-pick commit 05551c658269 from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427023243.1481560-1-hjl.tools@gmail.com/mbox/"},{"id":88088,"url":"https://patchwork.plctlab.org/api/1.2/patches/88088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427024002.533187-1-yanzhang.wang@intel.com/","msgid":"<20230427024002.533187-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-27T02:40:02","name":"[v2] RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427024002.533187-1-yanzhang.wang@intel.com/mbox/"},{"id":88095,"url":"https://patchwork.plctlab.org/api/1.2/patches/88095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427031242.662721-1-yanzhang.wang@intel.com/","msgid":"<20230427031242.662721-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-27T03:12:42","name":"[v3] RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427031242.662721-1-yanzhang.wang@intel.com/mbox/"},{"id":88098,"url":"https://patchwork.plctlab.org/api/1.2/patches/88098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427033142.949564-1-pan2.li@intel.com/","msgid":"<20230427033142.949564-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-27T03:31:42","name":"RISC-V: Add required tls to read thread pointer test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427033142.949564-1-pan2.li@intel.com/mbox/"},{"id":88142,"url":"https://patchwork.plctlab.org/api/1.2/patches/88142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427072532.B70AD3858C74@sourceware.org/","msgid":"<20230427072532.B70AD3858C74@sourceware.org>","list_archive_url":null,"date":"2023-04-27T07:24:46","name":"ipa/109607 - properly gimplify conversions introduced by IPA param manipulation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427072532.B70AD3858C74@sourceware.org/mbox/"},{"id":88149,"url":"https://patchwork.plctlab.org/api/1.2/patches/88149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427083843.D6A4C3858C31@sourceware.org/","msgid":"<20230427083843.D6A4C3858C31@sourceware.org>","list_archive_url":null,"date":"2023-04-27T08:37:23","name":"tree-optimization/109594 - wrong register promotion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427083843.D6A4C3858C31@sourceware.org/mbox/"},{"id":88151,"url":"https://patchwork.plctlab.org/api/1.2/patches/88151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427085241.69218-1-kito.cheng@sifive.com/","msgid":"<20230427085241.69218-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-27T08:52:41","name":"Docs: Add vector register constarint for asm operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427085241.69218-1-kito.cheng@sifive.com/mbox/"},{"id":88179,"url":"https://patchwork.plctlab.org/api/1.2/patches/88179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103026.1725758-1-jwakely@redhat.com/","msgid":"<20230427103026.1725758-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:30:26","name":"[committed] libstdc++: Make std::random_device throw std::system_error [PR105081]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103026.1725758-1-jwakely@redhat.com/mbox/"},{"id":88180,"url":"https://patchwork.plctlab.org/api/1.2/patches/88180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103136.1725804-1-jwakely@redhat.com/","msgid":"<20230427103136.1725804-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:31:36","name":"[committed] libstdc++: Add @headerfile and @since to doxygen comments [PR40380]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103136.1725804-1-jwakely@redhat.com/mbox/"},{"id":88182,"url":"https://patchwork.plctlab.org/api/1.2/patches/88182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103210.1725860-1-jwakely@redhat.com/","msgid":"<20230427103210.1725860-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:32:10","name":"[committed] libstdc++: Improve doxygen docs for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103210.1725860-1-jwakely@redhat.com/mbox/"},{"id":88184,"url":"https://patchwork.plctlab.org/api/1.2/patches/88184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103237.1725914-1-jwakely@redhat.com/","msgid":"<20230427103237.1725914-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:32:37","name":"[committed] libstdc++: Reduce Doxygen output for PDF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103237.1725914-1-jwakely@redhat.com/mbox/"},{"id":88185,"url":"https://patchwork.plctlab.org/api/1.2/patches/88185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103301.1725942-1-jwakely@redhat.com/","msgid":"<20230427103301.1725942-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:33:01","name":"[committed] libstdc++: Remove obsolete options from Doxygen config","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103301.1725942-1-jwakely@redhat.com/mbox/"},{"id":88183,"url":"https://patchwork.plctlab.org/api/1.2/patches/88183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103314.1725986-1-jwakely@redhat.com/","msgid":"<20230427103314.1725986-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:33:14","name":"[committed] libstdc++: Fix typos in doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103314.1725986-1-jwakely@redhat.com/mbox/"},{"id":88198,"url":"https://patchwork.plctlab.org/api/1.2/patches/88198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpXmaFjRBeJA2yp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:08:09","name":"v2: Add targetm.libm_function_max_error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpXmaFjRBeJA2yp@tucnak/mbox/"},{"id":88200,"url":"https://patchwork.plctlab.org/api/1.2/patches/88200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpYvaNqvI7Mfi6u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:13:01","name":"v2: Implement range-op entry for sin/cos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpYvaNqvI7Mfi6u@tucnak/mbox/"},{"id":88201,"url":"https://patchwork.plctlab.org/api/1.2/patches/88201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111634.1728893-1-jwakely@redhat.com/","msgid":"<20230427111634.1728893-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T11:16:34","name":"doc: Describe behaviour of enums with fixed underlying type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111634.1728893-1-jwakely@redhat.com/mbox/"},{"id":88202,"url":"https://patchwork.plctlab.org/api/1.2/patches/88202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111827.C411F3858425@sourceware.org/","msgid":"<20230427111827.C411F3858425@sourceware.org>","list_archive_url":null,"date":"2023-04-27T11:17:42","name":"Properly gimplify handled component chains on registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111827.C411F3858425@sourceware.org/mbox/"},{"id":88206,"url":"https://patchwork.plctlab.org/api/1.2/patches/88206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427112219.AC33F3858418@sourceware.org/","msgid":"<20230427112219.AC33F3858418@sourceware.org>","list_archive_url":null,"date":"2023-04-27T11:21:35","name":"wrong GIMPLE from (bit_field_ref CTOR ..) simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427112219.AC33F3858418@sourceware.org/mbox/"},{"id":88213,"url":"https://patchwork.plctlab.org/api/1.2/patches/88213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkj9wnpq.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:48:01","name":"harden-conditionals: detach values before compares","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkj9wnpq.fsf@lxoliva.fsfla.org/mbox/"},{"id":88216,"url":"https://patchwork.plctlab.org/api/1.2/patches/88216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7ctxwnbo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:56:27","name":"[FYI] Use CONFIG_SHELL-/bin/sh in genmultilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7ctxwnbo.fsf@lxoliva.fsfla.org/mbox/"},{"id":88219,"url":"https://patchwork.plctlab.org/api/1.2/patches/88219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427115948.480747-1-aldyh@redhat.com/","msgid":"<20230427115948.480747-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-27T11:59:48","name":"[COMMITTED] Normalize addresses in IPA before calling range_op_handler [PR109639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427115948.480747-1-aldyh@redhat.com/mbox/"},{"id":88226,"url":"https://patchwork.plctlab.org/api/1.2/patches/88226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427121125.CEB753858C66@sourceware.org/","msgid":"<20230427121125.CEB753858C66@sourceware.org>","list_archive_url":null,"date":"2023-04-27T12:10:40","name":"tree-optimization/109170 - bogus use-after-free with __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427121125.CEB753858C66@sourceware.org/mbox/"},{"id":88260,"url":"https://patchwork.plctlab.org/api/1.2/patches/88260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEp46RiMoi1K3wSG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T13:30:17","name":"gimple-range-op: Handle sqrt (basic bounds only)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEp46RiMoi1K3wSG@tucnak/mbox/"},{"id":88271,"url":"https://patchwork.plctlab.org/api/1.2/patches/88271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427140106.40452-1-kito.cheng@sifive.com/","msgid":"<20230427140106.40452-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-27T14:01:07","name":"[v2] Docs: Add vector register constarint for asm operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427140106.40452-1-kito.cheng@sifive.com/mbox/"},{"id":88278,"url":"https://patchwork.plctlab.org/api/1.2/patches/88278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACofN_76PcS3FbFQL2K2rXKPuov5JaT-jwAMTut0QuwAjN6hGg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-27T14:29:24","name":"RISC-V: Added support clmul[r,h] instructions for Zbc extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACofN_76PcS3FbFQL2K2rXKPuov5JaT-jwAMTut0QuwAjN6hGg@mail.gmail.com/mbox/"},{"id":88281,"url":"https://patchwork.plctlab.org/api/1.2/patches/88281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427143005.1781966-1-pan2.li@intel.com/","msgid":"<20230427143005.1781966-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-27T14:30:05","name":"RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427143005.1781966-1-pan2.li@intel.com/mbox/"},{"id":88292,"url":"https://patchwork.plctlab.org/api/1.2/patches/88292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CS7M946E8DPP.9L3ZEUF7UK3X@x1c10/","msgid":"","list_archive_url":null,"date":"2023-04-27T14:50:01","name":"MAINTAINERS: Change my email address.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CS7M946E8DPP.9L3ZEUF7UK3X@x1c10/mbox/"},{"id":88300,"url":"https://patchwork.plctlab.org/api/1.2/patches/88300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9791b$0d55b960$28012c20$@nextmovesoftware.com/","msgid":"<002001d9791b$0d55b960$28012c20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-27T15:15:05","name":"Synchronize include/ctf.h with upstream binutils/libctf.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9791b$0d55b960$28012c20$@nextmovesoftware.com/mbox/"},{"id":88304,"url":"https://patchwork.plctlab.org/api/1.2/patches/88304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427155842.699173-1-jason@redhat.com/","msgid":"<20230427155842.699173-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-27T15:58:42","name":"[pushed] c++: print conversion error at candidate location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427155842.699173-1-jason@redhat.com/mbox/"},{"id":88308,"url":"https://patchwork.plctlab.org/api/1.2/patches/88308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-2-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:51","name":"[v5,01/11] RISC-V: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-2-patrick@rivosinc.com/mbox/"},{"id":88314,"url":"https://patchwork.plctlab.org/api/1.2/patches/88314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-3-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:52","name":"[v5,02/11] RISC-V: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-3-patrick@rivosinc.com/mbox/"},{"id":88317,"url":"https://patchwork.plctlab.org/api/1.2/patches/88317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-4-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:53","name":"[v5,03/11] RISC-V: Enforce subword atomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-4-patrick@rivosinc.com/mbox/"},{"id":88310,"url":"https://patchwork.plctlab.org/api/1.2/patches/88310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-5-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:54","name":"[v5,04/11] RISC-V: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-5-patrick@rivosinc.com/mbox/"},{"id":88319,"url":"https://patchwork.plctlab.org/api/1.2/patches/88319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-6-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:55","name":"[v5,05/11] RISC-V: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-6-patrick@rivosinc.com/mbox/"},{"id":88309,"url":"https://patchwork.plctlab.org/api/1.2/patches/88309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-7-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:56","name":"[v5,06/11] RISC-V: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-7-patrick@rivosinc.com/mbox/"},{"id":88312,"url":"https://patchwork.plctlab.org/api/1.2/patches/88312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-8-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:57","name":"[v5,07/11] RISC-V: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-8-patrick@rivosinc.com/mbox/"},{"id":88315,"url":"https://patchwork.plctlab.org/api/1.2/patches/88315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-9-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:58","name":"[v5,08/11] RISC-V: Weaken LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-9-patrick@rivosinc.com/mbox/"},{"id":88318,"url":"https://patchwork.plctlab.org/api/1.2/patches/88318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-10-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:59","name":"[v5,09/11] RISC-V: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-10-patrick@rivosinc.com/mbox/"},{"id":88311,"url":"https://patchwork.plctlab.org/api/1.2/patches/88311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-11-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:23:00","name":"[v5,10/11] RISC-V: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-11-patrick@rivosinc.com/mbox/"},{"id":88316,"url":"https://patchwork.plctlab.org/api/1.2/patches/88316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-12-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-12-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:23:01","name":"[v5,11/11] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-12-patrick@rivosinc.com/mbox/"},{"id":88307,"url":"https://patchwork.plctlab.org/api/1.2/patches/88307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162318.118104-1-julian@codesourcery.com/","msgid":"<20230427162318.118104-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T16:23:18","name":"OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162318.118104-1-julian@codesourcery.com/mbox/"},{"id":88320,"url":"https://patchwork.plctlab.org/api/1.2/patches/88320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com/","msgid":"<32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T16:38:30","name":"[committed] amdgcn: Fix addsub bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com/mbox/"},{"id":88321,"url":"https://patchwork.plctlab.org/api/1.2/patches/88321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427163956.3051552-1-ppalka@redhat.com/","msgid":"<20230427163956.3051552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-27T16:39:56","name":"c++: NSDMI instantiation from template context [PR109506]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427163956.3051552-1-ppalka@redhat.com/mbox/"},{"id":88362,"url":"https://patchwork.plctlab.org/api/1.2/patches/88362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427183647.99112-1-julian@codesourcery.com/","msgid":"<20230427183647.99112-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T18:36:47","name":"OpenACC: Stand-alone attach/detach clause fixes for Fortran [PR109622]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427183647.99112-1-julian@codesourcery.com/mbox/"},{"id":88384,"url":"https://patchwork.plctlab.org/api/1.2/patches/88384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427204610.3403840-1-ppalka@redhat.com/","msgid":"<20230427204610.3403840-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-27T20:46:10","name":"c++: outer args for level-lowered ttp [PR109651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427204610.3403840-1-ppalka@redhat.com/mbox/"},{"id":88396,"url":"https://patchwork.plctlab.org/api/1.2/patches/88396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427222457.1773293-1-jwakely@redhat.com/","msgid":"<20230427222457.1773293-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T22:24:57","name":"[committed] libstdc++: Fix error in doxygen comments in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427222457.1773293-1-jwakely@redhat.com/mbox/"},{"id":88423,"url":"https://patchwork.plctlab.org/api/1.2/patches/88423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428004726.3217666-1-maskray@google.com/","msgid":"<20230428004726.3217666-1-maskray@google.com>","list_archive_url":null,"date":"2023-04-28T00:47:26","name":"i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428004726.3217666-1-maskray@google.com/mbox/"},{"id":88434,"url":"https://patchwork.plctlab.org/api/1.2/patches/88434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428022141.2080-1-lidie@eswincomputing.com/","msgid":"<20230428022141.2080-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-04-28T02:21:41","name":"[RISC-V] Fix riscv_expand_conditional_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428022141.2080-1-lidie@eswincomputing.com/mbox/"},{"id":88436,"url":"https://patchwork.plctlab.org/api/1.2/patches/88436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428024641.3757002-1-pan2.li@intel.com/","msgid":"<20230428024641.3757002-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-28T02:46:41","name":"[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428024641.3757002-1-pan2.li@intel.com/mbox/"},{"id":88442,"url":"https://patchwork.plctlab.org/api/1.2/patches/88442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428032506.655667-1-apinski@marvell.com/","msgid":"<20230428032506.655667-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T03:25:06","name":"[PATCHv2] MATCH: Factor out code that for min max detection with constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428032506.655667-1-apinski@marvell.com/mbox/"},{"id":88443,"url":"https://patchwork.plctlab.org/api/1.2/patches/88443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428033045.655785-1-apinski@marvell.com/","msgid":"<20230428033045.655785-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T03:30:45","name":"PHIOPT: Move two_value_replacement to match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428033045.655785-1-apinski@marvell.com/mbox/"},{"id":88449,"url":"https://patchwork.plctlab.org/api/1.2/patches/88449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-2-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:02","name":"[01/11] riscv: xtheadbb: Add sign/zero extension support for th.ext and th.extu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-2-christoph.muellner@vrull.eu/mbox/"},{"id":88453,"url":"https://patchwork.plctlab.org/api/1.2/patches/88453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-3-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:03","name":"[02/11] riscv: xtheadmempair: Fix CFA reg notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-3-christoph.muellner@vrull.eu/mbox/"},{"id":88457,"url":"https://patchwork.plctlab.org/api/1.2/patches/88457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-4-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:04","name":"[03/11] riscv: xtheadmempair: Fix doc for th_mempair_order_operands()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-4-christoph.muellner@vrull.eu/mbox/"},{"id":88450,"url":"https://patchwork.plctlab.org/api/1.2/patches/88450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-5-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:05","name":"[04/11] riscv: thead: Adjust constraints of th_addsl INSN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-5-christoph.muellner@vrull.eu/mbox/"},{"id":88452,"url":"https://patchwork.plctlab.org/api/1.2/patches/88452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-6-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:06","name":"[05/11] riscv: Simplify output of MEM addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-6-christoph.muellner@vrull.eu/mbox/"},{"id":88455,"url":"https://patchwork.plctlab.org/api/1.2/patches/88455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-7-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:07","name":"[06/11] riscv: Define Xmode macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-7-christoph.muellner@vrull.eu/mbox/"},{"id":88454,"url":"https://patchwork.plctlab.org/api/1.2/patches/88454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-8-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:08","name":"[07/11] riscv: Move address classification info types to riscv-protos.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-8-christoph.muellner@vrull.eu/mbox/"},{"id":88458,"url":"https://patchwork.plctlab.org/api/1.2/patches/88458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-9-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:09","name":"[08/11] riscv: Prepare backend for index registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-9-christoph.muellner@vrull.eu/mbox/"},{"id":88456,"url":"https://patchwork.plctlab.org/api/1.2/patches/88456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-10-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:10","name":"[09/11] riscv: thead: Factor out XThead*-specific peepholes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-10-christoph.muellner@vrull.eu/mbox/"},{"id":88462,"url":"https://patchwork.plctlab.org/api/1.2/patches/88462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-1-christoph.muellner@vrull.eu/","msgid":"<20230428062314.2995571-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:23:13","name":"[10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-1-christoph.muellner@vrull.eu/mbox/"},{"id":88461,"url":"https://patchwork.plctlab.org/api/1.2/patches/88461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-2-christoph.muellner@vrull.eu/","msgid":"<20230428062314.2995571-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:23:14","name":"[11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-2-christoph.muellner@vrull.eu/mbox/"},{"id":88472,"url":"https://patchwork.plctlab.org/api/1.2/patches/88472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com/","msgid":"<0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T07:26:06","name":"[committed] Fortran: Fix (mostly) comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com/mbox/"},{"id":88476,"url":"https://patchwork.plctlab.org/api/1.2/patches/88476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEt3EFFjFUijaFFx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-28T07:34:40","name":"libstdc++: Another attempt to ensure g++ 13+ compiled programs enforce gcc 13.2+ libstdc++.so.6 [PR108969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEt3EFFjFUijaFFx@tucnak/mbox/"},{"id":88534,"url":"https://patchwork.plctlab.org/api/1.2/patches/88534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428090745.435BE3857711@sourceware.org/","msgid":"<20230428090745.435BE3857711@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:06:45","name":"tree-optimization/108752 - vectorize emulated vectors in lowered form","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428090745.435BE3857711@sourceware.org/mbox/"},{"id":88548,"url":"https://patchwork.plctlab.org/api/1.2/patches/88548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094851.5FEE9385771D@sourceware.org/","msgid":"<20230428094851.5FEE9385771D@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:48:01","name":"Avoid more invalid GIMPLE with register bases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094851.5FEE9385771D@sourceware.org/mbox/"},{"id":88549,"url":"https://patchwork.plctlab.org/api/1.2/patches/88549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094928.63E96385771A@sourceware.org/","msgid":"<20230428094928.63E96385771A@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:48:35","name":"tree-optimization/109644 - missing IL checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094928.63E96385771A@sourceware.org/mbox/"},{"id":88589,"url":"https://patchwork.plctlab.org/api/1.2/patches/88589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17227-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:38:30","name":"[2/5] match.pd: Remove commented out line pragmas unless -vv is used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17227-tamar@arm.com/mbox/"},{"id":88590,"url":"https://patchwork.plctlab.org/api/1.2/patches/88590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17228-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:39:23","name":"[3/5] match.pd: CSE the dump output check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17228-tamar@arm.com/mbox/"},{"id":88592,"url":"https://patchwork.plctlab.org/api/1.2/patches/88592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17229-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:40:13","name":"[3/5] genmatch: split shared code to gimple-match-exports.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17229-tamar@arm.com/mbox/"},{"id":88596,"url":"https://patchwork.plctlab.org/api/1.2/patches/88596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17230-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:44:15","name":"[5/5] match.pd: Use splits in makefile and make configurable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17230-tamar@arm.com/mbox/"},{"id":88606,"url":"https://patchwork.plctlab.org/api/1.2/patches/88606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-1-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:53","name":"[01/10] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-1-andrea.corallo@arm.com/mbox/"},{"id":88609,"url":"https://patchwork.plctlab.org/api/1.2/patches/88609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-2-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:54","name":"[02/10] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-2-andrea.corallo@arm.com/mbox/"},{"id":88607,"url":"https://patchwork.plctlab.org/api/1.2/patches/88607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-4-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:56","name":"[04/10] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-4-andrea.corallo@arm.com/mbox/"},{"id":88603,"url":"https://patchwork.plctlab.org/api/1.2/patches/88603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-5-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:57","name":"[05/10] arm: Add vorrq_n overloading into vorrq _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-5-andrea.corallo@arm.com/mbox/"},{"id":88602,"url":"https://patchwork.plctlab.org/api/1.2/patches/88602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-6-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:58","name":"[06/10] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-6-andrea.corallo@arm.com/mbox/"},{"id":88608,"url":"https://patchwork.plctlab.org/api/1.2/patches/88608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-8-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:00","name":"[08/10] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-8-andrea.corallo@arm.com/mbox/"},{"id":88604,"url":"https://patchwork.plctlab.org/api/1.2/patches/88604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-9-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:01","name":"[09/10] arm testsuite: XFAIL or relax registers in some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-9-andrea.corallo@arm.com/mbox/"},{"id":88610,"url":"https://patchwork.plctlab.org/api/1.2/patches/88610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-10-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:02","name":"[10/10] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-10-andrea.corallo@arm.com/mbox/"},{"id":88611,"url":"https://patchwork.plctlab.org/api/1.2/patches/88611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113621.942273853823@sourceware.org/","msgid":"<20230428113621.942273853823@sourceware.org>","list_archive_url":null,"date":"2023-04-28T11:35:35","name":"ipa/109652 - ICE in modification phase of IPA SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113621.942273853823@sourceware.org/mbox/"},{"id":88615,"url":"https://patchwork.plctlab.org/api/1.2/patches/88615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120748.1906656-1-jwakely@redhat.com/","msgid":"<20230428120748.1906656-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:07:48","name":"[committed] libstdc++: Simplify preprocessor/namespace nesting in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120748.1906656-1-jwakely@redhat.com/mbox/"},{"id":88618,"url":"https://patchwork.plctlab.org/api/1.2/patches/88618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120755.1906678-1-jwakely@redhat.com/","msgid":"<20230428120755.1906678-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:07:55","name":"[committed] libstdc++: Strip absolute paths from files shown in Doxygen docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120755.1906678-1-jwakely@redhat.com/mbox/"},{"id":88616,"url":"https://patchwork.plctlab.org/api/1.2/patches/88616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120800.1906699-1-jwakely@redhat.com/","msgid":"<20230428120800.1906699-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:08:00","name":"[committed] libstdc++: Minor fixes to doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120800.1906699-1-jwakely@redhat.com/mbox/"},{"id":88617,"url":"https://patchwork.plctlab.org/api/1.2/patches/88617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120805.1906718-1-jwakely@redhat.com/","msgid":"<20230428120805.1906718-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:08:05","name":"[committed] libstdc++: Improve doxygen docs for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120805.1906718-1-jwakely@redhat.com/mbox/"},{"id":88631,"url":"https://patchwork.plctlab.org/api/1.2/patches/88631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOFDQ6mAF9hM=ZdMFqNDvSJ5J9-HaQ861jzLMnMH3m3Qw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:29:38","name":"RISC-V: Eliminate redundant zero extension of minu/maxu operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOFDQ6mAF9hM=ZdMFqNDvSJ5J9-HaQ861jzLMnMH3m3Qw@mail.gmail.com/mbox/"},{"id":88632,"url":"https://patchwork.plctlab.org/api/1.2/patches/88632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428123327.686353-1-yunqiang.su@cipunited.com/","msgid":"<20230428123327.686353-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-04-28T12:33:27","name":"MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428123327.686353-1-yunqiang.su@cipunited.com/mbox/"},{"id":88635,"url":"https://patchwork.plctlab.org/api/1.2/patches/88635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dec3ac9c-d107-441e-ee0c-a4d43cd70150@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:36:59","name":"[1/3] Refactor to allow internal_fn'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dec3ac9c-d107-441e-ee0c-a4d43cd70150@arm.com/mbox/"},{"id":88637,"url":"https://patchwork.plctlab.org/api/1.2/patches/88637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c739df-eba4-e0e6-b59e-4d6ecc7511e9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:37:14","name":"[2/3] Refactor widen_plus as internal_fn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c739df-eba4-e0e6-b59e-4d6ecc7511e9@arm.com/mbox/"},{"id":88634,"url":"https://patchwork.plctlab.org/api/1.2/patches/88634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17b337e-369a-e78e-e065-94845dc8b0d4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:37:27","name":"[3/3] Remove widen_plus/minus_expr tree codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17b337e-369a-e78e-e065-94845dc8b0d4@arm.com/mbox/"},{"id":88636,"url":"https://patchwork.plctlab.org/api/1.2/patches/88636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428124232.CFF443889E20@sourceware.org/","msgid":"<20230428124232.CFF443889E20@sourceware.org>","list_archive_url":null,"date":"2023-04-28T12:41:43","name":"Add emulated scatter capability to the vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428124232.CFF443889E20@sourceware.org/mbox/"},{"id":88638,"url":"https://patchwork.plctlab.org/api/1.2/patches/88638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEvChfzMa0IotL/h@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:56:37","name":"[v2] GCC-13/changes: Add note about iostream usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEvChfzMa0IotL/h@redhat.com/mbox/"},{"id":88644,"url":"https://patchwork.plctlab.org/api/1.2/patches/88644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428131249.713463-1-yunqiang.su@cipunited.com/","msgid":"<20230428131249.713463-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-04-28T13:12:49","name":"[v2] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428131249.713463-1-yunqiang.su@cipunited.com/mbox/"},{"id":88657,"url":"https://patchwork.plctlab.org/api/1.2/patches/88657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz/","msgid":"<9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz>","list_archive_url":null,"date":"2023-04-28T14:42:10","name":"[(pushed)] contrib: port doxygen script to Python3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz/mbox/"},{"id":88664,"url":"https://patchwork.plctlab.org/api/1.2/patches/88664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428152102.1653600-1-pan2.li@intel.com/","msgid":"<20230428152102.1653600-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-28T15:21:02","name":"RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428152102.1653600-1-pan2.li@intel.com/mbox/"},{"id":88678,"url":"https://patchwork.plctlab.org/api/1.2/patches/88678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428155829.F20D120438@pchp3.se.axis.com/","msgid":"<20230428155829.F20D120438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-28T15:58:29","name":"testsuite: Handle empty assembly lines in check-function-bodies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428155829.F20D120438@pchp3.se.axis.com/mbox/"},{"id":88680,"url":"https://patchwork.plctlab.org/api/1.2/patches/88680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com/","msgid":"<46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com>","list_archive_url":null,"date":"2023-04-28T16:10:07","name":"riscv: Allow vector constants in riscv_const_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com/mbox/"},{"id":88684,"url":"https://patchwork.plctlab.org/api/1.2/patches/88684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-2-apinski@marvell.com/","msgid":"<20230428170213.677572-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T17:02:12","name":"[1/2] PHIOPT: Allow moving of some builtin calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-2-apinski@marvell.com/mbox/"},{"id":88685,"url":"https://patchwork.plctlab.org/api/1.2/patches/88685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-3-apinski@marvell.com/","msgid":"<20230428170213.677572-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T17:02:13","name":"[2/2] MATCH: add some of what phiopt'\''s builtin_zero_pattern did","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-3-apinski@marvell.com/mbox/"},{"id":88690,"url":"https://patchwork.plctlab.org/api/1.2/patches/88690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428174524.1006324-1-mikpelinux@gmail.com/","msgid":"<20230428174524.1006324-1-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-04-28T17:45:24","name":"add glibc-stdint.h to vax and lm32 linux target (PR target/105525)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428174524.1006324-1-mikpelinux@gmail.com/mbox/"},{"id":88700,"url":"https://patchwork.plctlab.org/api/1.2/patches/88700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428190508.4091082-1-ppalka@redhat.com/","msgid":"<20230428190508.4091082-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-28T19:05:08","name":"c++: RESULT_DECL replacement in constexpr call result [PR105440]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428190508.4091082-1-ppalka@redhat.com/mbox/"},{"id":88709,"url":"https://patchwork.plctlab.org/api/1.2/patches/88709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428194910.18611-1-palmer@rivosinc.com/","msgid":"<20230428194910.18611-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-28T19:49:10","name":"WIP: All the -march documentation I got around to writing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428194910.18611-1-palmer@rivosinc.com/mbox/"},{"id":88756,"url":"https://patchwork.plctlab.org/api/1.2/patches/88756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6sz66xx.fsf@oldenburg.str.redhat.com/","msgid":"<87h6sz66xx.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-04-28T21:19:22","name":"libstdc++: Mention recent libgcc_s symbol versions in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6sz66xx.fsf@oldenburg.str.redhat.com/mbox/"},{"id":88770,"url":"https://patchwork.plctlab.org/api/1.2/patches/88770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-2-sandra@codesourcery.com/","msgid":"<20230428232254.628185-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:52","name":"[1/3] OpenMP: C support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-2-sandra@codesourcery.com/mbox/"},{"id":88771,"url":"https://patchwork.plctlab.org/api/1.2/patches/88771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-3-sandra@codesourcery.com/","msgid":"<20230428232254.628185-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:53","name":"[2/3] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-3-sandra@codesourcery.com/mbox/"},{"id":88772,"url":"https://patchwork.plctlab.org/api/1.2/patches/88772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-4-sandra@codesourcery.com/","msgid":"<20230428232254.628185-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:54","name":"[3/3] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-4-sandra@codesourcery.com/mbox/"},{"id":88774,"url":"https://patchwork.plctlab.org/api/1.2/patches/88774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428233446.688570-1-apinski@marvell.com/","msgid":"<20230428233446.688570-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T23:34:46","name":"target: [PR109657] (a ? -1 : 0) | b could be optimized better for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428233446.688570-1-apinski@marvell.com/mbox/"},{"id":88860,"url":"https://patchwork.plctlab.org/api/1.2/patches/88860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-2-arsen@aarsen.me/","msgid":"<20230429101640.1697750-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-29T10:16:39","name":"[1/2] libstdc++: Implement more maintainable header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-2-arsen@aarsen.me/mbox/"},{"id":88861,"url":"https://patchwork.plctlab.org/api/1.2/patches/88861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-3-arsen@aarsen.me/","msgid":"<20230429101640.1697750-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-29T10:16:40","name":"[2/2] libstdc++: Replace all manual FTM definitions and use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-3-arsen@aarsen.me/mbox/"},{"id":88869,"url":"https://patchwork.plctlab.org/api/1.2/patches/88869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105741.108576-1-julian@codesourcery.com/","msgid":"<20230429105741.108576-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-29T10:57:41","name":"OpenACC: Further attach/detach clause fixes for Fortran [PR109622]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105741.108576-1-julian@codesourcery.com/mbox/"},{"id":88870,"url":"https://patchwork.plctlab.org/api/1.2/patches/88870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105959.23211-1-gaofei@eswincomputing.com/","msgid":"<20230429105959.23211-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-04-29T10:59:59","name":"[V2] RISC-V: decouple stack allocation for rv32e w/o save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105959.23211-1-gaofei@eswincomputing.com/mbox/"},{"id":88874,"url":"https://patchwork.plctlab.org/api/1.2/patches/88874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429133250.3789188-1-pan2.li@intel.com/","msgid":"<20230429133250.3789188-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-29T13:32:50","name":"[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429133250.3789188-1-pan2.li@intel.com/mbox/"},{"id":88882,"url":"https://patchwork.plctlab.org/api/1.2/patches/88882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com/","msgid":"<3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com>","list_archive_url":null,"date":"2023-04-29T16:21:20","name":"[committed,PR,target/109549] Adjust mips test for recent ifcvt costing changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com/mbox/"},{"id":88884,"url":"https://patchwork.plctlab.org/api/1.2/patches/88884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com/","msgid":"<004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-29T16:24:13","name":"[xstormy16] Recognize/support swpn (swap nibbles) instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com/mbox/"},{"id":88885,"url":"https://patchwork.plctlab.org/api/1.2/patches/88885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com/","msgid":"<004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-29T16:25:48","name":"[xstormy16] Efficient HImode rotate left by a single bit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com/mbox/"},{"id":88899,"url":"https://patchwork.plctlab.org/api/1.2/patches/88899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZE3LpThCgIob9yHG@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-30T02:00:05","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZE3LpThCgIob9yHG@Thaum.localdomain/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-04/mbox/"},{"id":21,"url":"https://patchwork.plctlab.org/api/1.2/bundles/21/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-05/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-05","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":88946,"url":"https://patchwork.plctlab.org/api/1.2/patches/88946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a824a5-a7eb-91db-a2fe-01e24bd47cd1@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-04-30T19:31:41","name":"[(pushed)] libsanitizer: link hwasan against lsan library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a824a5-a7eb-91db-a2fe-01e24bd47cd1@suse.cz/mbox/"},{"id":88948,"url":"https://patchwork.plctlab.org/api/1.2/patches/88948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04283010-e7bc-5d28-9eec-4a316799c440@suse.cz/","msgid":"<04283010-e7bc-5d28-9eec-4a316799c440@suse.cz>","list_archive_url":null,"date":"2023-04-30T19:40:24","name":"[(pushed)] hwasan: adjust wording in expected output in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04283010-e7bc-5d28-9eec-4a316799c440@suse.cz/mbox/"},{"id":88955,"url":"https://patchwork.plctlab.org/api/1.2/patches/88955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211248.761908-1-apinski@marvell.com/","msgid":"<20230430211248.761908-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:12:48","name":"MATCH: Port CLRSB part of builtin_zero_pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211248.761908-1-apinski@marvell.com/mbox/"},{"id":88956,"url":"https://patchwork.plctlab.org/api/1.2/patches/88956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211330.761973-1-apinski@marvell.com/","msgid":"<20230430211330.761973-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:13:30","name":"PHIOPT: small refactoring of match_simplify_replacement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211330.761973-1-apinski@marvell.com/mbox/"},{"id":88957,"url":"https://patchwork.plctlab.org/api/1.2/patches/88957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211356.762030-1-apinski@marvell.com/","msgid":"<20230430211356.762030-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:13:56","name":"PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211356.762030-1-apinski@marvell.com/mbox/"},{"id":88960,"url":"https://patchwork.plctlab.org/api/1.2/patches/88960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com/","msgid":"<001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-30T22:53:46","name":"[Committed] Update xstormy16'\''s neghi2 pattern to not clobber the carry flag.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com/mbox/"},{"id":88972,"url":"https://patchwork.plctlab.org/api/1.2/patches/88972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-1-aldyh@redhat.com/","msgid":"<20230501062906.564803-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:55","name":"[COMMITTED] vrange_storage overhaul","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-1-aldyh@redhat.com/mbox/"},{"id":88970,"url":"https://patchwork.plctlab.org/api/1.2/patches/88970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-2-aldyh@redhat.com/","msgid":"<20230501062906.564803-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:56","name":"[COMMITTED] Remove irange::{min,max,kind}.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-2-aldyh@redhat.com/mbox/"},{"id":88969,"url":"https://patchwork.plctlab.org/api/1.2/patches/88969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-3-aldyh@redhat.com/","msgid":"<20230501062906.564803-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:57","name":"[COMMITTED] Remove irange::tree_{lower,upper}_bound.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-3-aldyh@redhat.com/mbox/"},{"id":88971,"url":"https://patchwork.plctlab.org/api/1.2/patches/88971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-4-aldyh@redhat.com/","msgid":"<20230501062906.564803-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:58","name":"[COMMITTED] Various cleanups in vr-values.cc towards ranger API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-4-aldyh@redhat.com/mbox/"},{"id":88977,"url":"https://patchwork.plctlab.org/api/1.2/patches/88977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-5-aldyh@redhat.com/","msgid":"<20230501062906.564803-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:59","name":"[COMMITTED] Convert get_legacy_range in bounds_of_var_in_loop to irange API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-5-aldyh@redhat.com/mbox/"},{"id":88974,"url":"https://patchwork.plctlab.org/api/1.2/patches/88974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-6-aldyh@redhat.com/","msgid":"<20230501062906.564803-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:00","name":"[COMMITTED] Merge irange::union/intersect into irange_union/intersect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-6-aldyh@redhat.com/mbox/"},{"id":88980,"url":"https://patchwork.plctlab.org/api/1.2/patches/88980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-7-aldyh@redhat.com/","msgid":"<20230501062906.564803-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:01","name":"[COMMITTED] Conversion to irange wide_int API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-7-aldyh@redhat.com/mbox/"},{"id":88975,"url":"https://patchwork.plctlab.org/api/1.2/patches/88975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-8-aldyh@redhat.com/","msgid":"<20230501062906.564803-8-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:02","name":"[COMMITTED] Replace vrp_val* with wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-8-aldyh@redhat.com/mbox/"},{"id":88978,"url":"https://patchwork.plctlab.org/api/1.2/patches/88978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-9-aldyh@redhat.com/","msgid":"<20230501062906.564803-9-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:03","name":"[COMMITTED] Rewrite bounds_of_var_in_loop() to use ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-9-aldyh@redhat.com/mbox/"},{"id":88976,"url":"https://patchwork.plctlab.org/api/1.2/patches/88976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-10-aldyh@redhat.com/","msgid":"<20230501062906.564803-10-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:04","name":"[COMMITTED] Convert internal representation of irange to wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-10-aldyh@redhat.com/mbox/"},{"id":88973,"url":"https://patchwork.plctlab.org/api/1.2/patches/88973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-11-aldyh@redhat.com/","msgid":"<20230501062906.564803-11-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:05","name":"[COMMITTED] Cleanup irange::set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-11-aldyh@redhat.com/mbox/"},{"id":88979,"url":"https://patchwork.plctlab.org/api/1.2/patches/88979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-12-aldyh@redhat.com/","msgid":"<20230501062906.564803-12-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:06","name":"[COMMITTED] Inline irange::set_nonzero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-12-aldyh@redhat.com/mbox/"},{"id":88981,"url":"https://patchwork.plctlab.org/api/1.2/patches/88981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501064655.588111-1-aldyh@redhat.com/","msgid":"<20230501064655.588111-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:46:55","name":"[COMMITTED] Remove unused friends in int_range<>.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501064655.588111-1-aldyh@redhat.com/mbox/"},{"id":88984,"url":"https://patchwork.plctlab.org/api/1.2/patches/88984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501081901.386194-1-dimitar@dinux.eu/","msgid":"<20230501081901.386194-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-05-01T08:19:01","name":"[committed] libgcc pru: Define TARGET_HAS_NO_HW_DIVIDE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501081901.386194-1-dimitar@dinux.eu/mbox/"},{"id":89047,"url":"https://patchwork.plctlab.org/api/1.2/patches/89047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com/","msgid":"<91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com>","list_archive_url":null,"date":"2023-05-01T13:21:59","name":"[committed] Enable LRA on several ports","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com/mbox/"},{"id":89048,"url":"https://patchwork.plctlab.org/api/1.2/patches/89048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com/","msgid":"<0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com>","list_archive_url":null,"date":"2023-05-01T13:42:25","name":"[committed] Convert xstormy16 to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com/mbox/"},{"id":89080,"url":"https://patchwork.plctlab.org/api/1.2/patches/89080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501161037.614414-1-patrick@rivosinc.com/","msgid":"<20230501161037.614414-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-01T16:10:37","name":"RISC-V: Name newly added flags in changelog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501161037.614414-1-patrick@rivosinc.com/mbox/"},{"id":89081,"url":"https://patchwork.plctlab.org/api/1.2/patches/89081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ce8b7413-8aa1-46d7-b361-5fc943e01d23-1682958599603@3c-app-gmx-bap68/","msgid":"","list_archive_url":null,"date":"2023-05-01T16:29:59","name":"Fortran: overloading of intrinsic binary operators [PR109641]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ce8b7413-8aa1-46d7-b361-5fc943e01d23-1682958599603@3c-app-gmx-bap68/mbox/"},{"id":89082,"url":"https://patchwork.plctlab.org/api/1.2/patches/89082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501163700.797083-1-apinski@marvell.com/","msgid":"<20230501163700.797083-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-01T16:37:00","name":"PHIOPT: Update comment about what the pass now does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501163700.797083-1-apinski@marvell.com/mbox/"},{"id":89168,"url":"https://patchwork.plctlab.org/api/1.2/patches/89168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-1-ppalka@redhat.com/","msgid":"<20230501195902.1915703-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-01T19:59:01","name":"[1/2] c++: potentiality of templated memfn call [PR109480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-1-ppalka@redhat.com/mbox/"},{"id":89167,"url":"https://patchwork.plctlab.org/api/1.2/patches/89167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-2-ppalka@redhat.com/","msgid":"<20230501195902.1915703-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-01T19:59:02","name":"[2/2] c++: non-dep init folding and access checking [PR109480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-2-ppalka@redhat.com/mbox/"},{"id":89176,"url":"https://patchwork.plctlab.org/api/1.2/patches/89176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501205454.1627105-1-jason@redhat.com/","msgid":"<20230501205454.1627105-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-01T20:54:54","name":"[pushed] c++: array DMI and member fn [PR109666]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501205454.1627105-1-jason@redhat.com/mbox/"},{"id":89185,"url":"https://patchwork.plctlab.org/api/1.2/patches/89185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501215112.432409-1-polacek@redhat.com/","msgid":"<20230501215112.432409-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-01T21:51:12","name":"[pushed] ubsan: ubsan_maybe_instrument_array_ref tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501215112.432409-1-polacek@redhat.com/mbox/"},{"id":89207,"url":"https://patchwork.plctlab.org/api/1.2/patches/89207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501235412.451394-1-polacek@redhat.com/","msgid":"<20230501235412.451394-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-01T23:54:12","name":"c++: Move -Wdangling-reference to -Wextra [PR109642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501235412.451394-1-polacek@redhat.com/mbox/"},{"id":89266,"url":"https://patchwork.plctlab.org/api/1.2/patches/89266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDE8+OaQ1x9YiyU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:08:19","name":"i386: Fix up handling of debug insns in STV [PR109676]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDE8+OaQ1x9YiyU@tucnak/mbox/"},{"id":89284,"url":"https://patchwork.plctlab.org/api/1.2/patches/89284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNAlHXg0CHx6Os@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:42:42","name":"libstdc++: Shut up -Wattribute-alias warning [PR109694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNAlHXg0CHx6Os@tucnak/mbox/"},{"id":89286,"url":"https://patchwork.plctlab.org/api/1.2/patches/89286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNkV3au6VQsVGK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:45:05","name":"libstdc++: Regenerate baseline_symbols.txt files for Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNkV3au6VQsVGK@tucnak/mbox/"},{"id":89300,"url":"https://patchwork.plctlab.org/api/1.2/patches/89300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095602.D2A9B3858C74@sourceware.org/","msgid":"<20230502095602.D2A9B3858C74@sourceware.org>","list_archive_url":null,"date":"2023-05-02T09:55:17","name":"[i386] Fix testcases for emulated scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095602.D2A9B3858C74@sourceware.org/mbox/"},{"id":89301,"url":"https://patchwork.plctlab.org/api/1.2/patches/89301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095712.955103857341@sourceware.org/","msgid":"<20230502095712.955103857341@sourceware.org>","list_archive_url":null,"date":"2023-05-02T09:56:28","name":"tree-optimization/109672 - properly check emulated plus during vect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095712.955103857341@sourceware.org/mbox/"},{"id":89330,"url":"https://patchwork.plctlab.org/api/1.2/patches/89330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502122155.2576725-1-romain.naour@gmail.com/","msgid":"<20230502122155.2576725-1-romain.naour@gmail.com>","list_archive_url":null,"date":"2023-05-02T12:21:55","name":"RISC-V: fix build issue with gcc 4.9.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502122155.2576725-1-romain.naour@gmail.com/mbox/"},{"id":89343,"url":"https://patchwork.plctlab.org/api/1.2/patches/89343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz/","msgid":"<9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz>","list_archive_url":null,"date":"2023-05-02T12:36:07","name":"[(pushed)] docs: port documentation of VRP params","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz/mbox/"},{"id":89344,"url":"https://patchwork.plctlab.org/api/1.2/patches/89344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502125003.1967323-1-ppalka@redhat.com/","msgid":"<20230502125003.1967323-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-02T12:50:03","name":"[pushed] c++: Add testcase for already fixed PR [PR109506]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502125003.1967323-1-ppalka@redhat.com/mbox/"},{"id":89396,"url":"https://patchwork.plctlab.org/api/1.2/patches/89396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de/","msgid":"<1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de>","list_archive_url":null,"date":"2023-05-02T14:32:05","name":"release the sorted FDE array when deregistering a frame [PR109685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de/mbox/"},{"id":89397,"url":"https://patchwork.plctlab.org/api/1.2/patches/89397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502144504.14654-1-amonakov@ispras.ru/","msgid":"<20230502144504.14654-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-02T14:45:04","name":"do not tailcall __sanitizer_cov_trace_pc [PR90746]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502144504.14654-1-amonakov@ispras.ru/mbox/"},{"id":89403,"url":"https://patchwork.plctlab.org/api/1.2/patches/89403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFEp73Ks9fKJ0tiW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T15:19:11","name":"c++: Fix up VEC_INIT_EXPR gimplification after r12-7069","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFEp73Ks9fKJ0tiW@tucnak/mbox/"},{"id":89407,"url":"https://patchwork.plctlab.org/api/1.2/patches/89407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d481896de5fbe840039ad944da9bdd1ae69a78cc.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-02T15:52:19","name":"rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d481896de5fbe840039ad944da9bdd1ae69a78cc.camel@us.ibm.com/mbox/"},{"id":89443,"url":"https://patchwork.plctlab.org/api/1.2/patches/89443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-1-jason@redhat.com/","msgid":"<20230502202525.1964821-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:25:24","name":"[1/2] c++: std::variant slow to compile [PR109678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-1-jason@redhat.com/mbox/"},{"id":89444,"url":"https://patchwork.plctlab.org/api/1.2/patches/89444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-2-jason@redhat.com/","msgid":"<20230502202525.1964821-2-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:25:25","name":"[2/2] c++: look for empty base at specific offset [PR109678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-2-jason@redhat.com/mbox/"},{"id":89445,"url":"https://patchwork.plctlab.org/api/1.2/patches/89445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202623.1965601-1-jason@redhat.com/","msgid":"<20230502202623.1965601-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:26:23","name":"[pushed] c++: less invalidate_class_lookup_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202623.1965601-1-jason@redhat.com/mbox/"},{"id":89446,"url":"https://patchwork.plctlab.org/api/1.2/patches/89446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202838.1098272-1-patrick@rivosinc.com/","msgid":"<20230502202838.1098272-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-02T20:28:38","name":"[Committed,11/11] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202838.1098272-1-patrick@rivosinc.com/mbox/"},{"id":89460,"url":"https://patchwork.plctlab.org/api/1.2/patches/89460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502211310.220156-1-ppalka@redhat.com/","msgid":"<20230502211310.220156-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-02T21:13:10","name":"c++: satisfaction of non-dep member alias template-id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502211310.220156-1-ppalka@redhat.com/mbox/"},{"id":89463,"url":"https://patchwork.plctlab.org/api/1.2/patches/89463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502214559.868243-1-apinski@marvell.com/","msgid":"<20230502214559.868243-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-02T21:45:59","name":"[COMMITTED] tree-optimization: [PR109702] MATCH: Fix a ? func(a) : N patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502214559.868243-1-apinski@marvell.com/mbox/"},{"id":89488,"url":"https://patchwork.plctlab.org/api/1.2/patches/89488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502225251.1990129-1-jason@redhat.com/","msgid":"<20230502225251.1990129-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T22:52:51","name":"[pushed] c++: simplify member template substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502225251.1990129-1-jason@redhat.com/mbox/"},{"id":89514,"url":"https://patchwork.plctlab.org/api/1.2/patches/89514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231015.56181-1-polacek@redhat.com/","msgid":"<20230502231015.56181-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-02T23:10:15","name":"c++: wrong std::is_convertible with cv-qual fn [PR109680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231015.56181-1-polacek@redhat.com/mbox/"},{"id":89515,"url":"https://patchwork.plctlab.org/api/1.2/patches/89515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231417.872953-1-apinski@marvell.com/","msgid":"<20230502231417.872953-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-02T23:14:17","name":"Add stats to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231417.872953-1-apinski@marvell.com/mbox/"},{"id":89539,"url":"https://patchwork.plctlab.org/api/1.2/patches/89539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503021713.1146069-2-tchaikov@gmail.com/","msgid":"<20230503021713.1146069-2-tchaikov@gmail.com>","list_archive_url":null,"date":"2023-05-03T02:17:13","name":"[v2,1/1] libstdc++: Set _M_string_length before calling _M_dispose() [PR109703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503021713.1146069-2-tchaikov@gmail.com/mbox/"},{"id":89541,"url":"https://patchwork.plctlab.org/api/1.2/patches/89541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-1-apinski@marvell.com/","msgid":"<20230503023050.880728-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T02:30:49","name":"[1/2] Factor out copy_phi_args from gimple_duplicate_sese_tail and remove_forwarder_block.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-1-apinski@marvell.com/mbox/"},{"id":89542,"url":"https://patchwork.plctlab.org/api/1.2/patches/89542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-2-apinski@marvell.com/","msgid":"<20230503023050.880728-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T02:30:50","name":"[2/2] PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-2-apinski@marvell.com/mbox/"},{"id":89557,"url":"https://patchwork.plctlab.org/api/1.2/patches/89557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503043023.2076907-1-jason@redhat.com/","msgid":"<20230503043023.2076907-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-03T04:30:23","name":"[pushed] c++: fix TTP level reduction cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503043023.2076907-1-jason@redhat.com/mbox/"},{"id":89662,"url":"https://patchwork.plctlab.org/api/1.2/patches/89662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14c76dc-af6a-78f7-4ae8-99f9b2c1a4c5@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-05-03T09:17:52","name":"[(pushed)] clang warning: warning: private field '\''m_gc'\'' is not used [-Wunused-private-field]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14c76dc-af6a-78f7-4ae8-99f9b2c1a4c5@suse.cz/mbox/"},{"id":89680,"url":"https://patchwork.plctlab.org/api/1.2/patches/89680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503101310.143791331F@imap2.suse-dmz.suse.de/","msgid":"<20230503101310.143791331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T10:13:09","name":"[GCC,11] tree-optimization/109473 - fix type mismatch in reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503101310.143791331F@imap2.suse-dmz.suse.de/mbox/"},{"id":89701,"url":"https://patchwork.plctlab.org/api/1.2/patches/89701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7ctp4rbz.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-05-03T10:55:28","name":"riscv: Don'\''t add -latomic with -pthread","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7ctp4rbz.fsf@suse.de/mbox/"},{"id":89712,"url":"https://patchwork.plctlab.org/api/1.2/patches/89712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y99d5rt.fsf@euler.schwinge.homeip.net/","msgid":"<875y99d5rt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-03T11:16:22","name":"Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''torture-init'\'' the '\''LTO_TORTURE_OPTIONS'\'' (was: Update testsuite to run with slim LTO)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y99d5rt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":89720,"url":"https://patchwork.plctlab.org/api/1.2/patches/89720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503114145.662934-1-aldyh@redhat.com/","msgid":"<20230503114145.662934-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-03T11:41:45","name":"Remove type from vrange_storage::equal_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503114145.662934-1-aldyh@redhat.com/mbox/"},{"id":89738,"url":"https://patchwork.plctlab.org/api/1.2/patches/89738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com/","msgid":"<25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com>","list_archive_url":null,"date":"2023-05-03T12:34:38","name":"[10/10] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com/mbox/"},{"id":89740,"url":"https://patchwork.plctlab.org/api/1.2/patches/89740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125824.813C913584@imap2.suse-dmz.suse.de/","msgid":"<20230503125824.813C913584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T12:58:24","name":"More last_stmt removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125824.813C913584@imap2.suse-dmz.suse.de/mbox/"},{"id":89741,"url":"https://patchwork.plctlab.org/api/1.2/patches/89741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125847.D146213584@imap2.suse-dmz.suse.de/","msgid":"<20230503125847.D146213584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T12:58:47","name":"Rename last_stmt to last_nondebug_stmt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125847.D146213584@imap2.suse-dmz.suse.de/mbox/"},{"id":89753,"url":"https://patchwork.plctlab.org/api/1.2/patches/89753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503135043.273442-1-ppalka@redhat.com/","msgid":"<20230503135043.273442-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-03T13:50:43","name":"c++: ahead of time variable template-id coercion [PR89442]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503135043.273442-1-ppalka@redhat.com/mbox/"},{"id":89768,"url":"https://patchwork.plctlab.org/api/1.2/patches/89768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz/","msgid":"<0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz>","list_archive_url":null,"date":"2023-05-03T14:37:07","name":"[(pushed)] riscv: fix error: control reaches end of non-void function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz/mbox/"},{"id":89769,"url":"https://patchwork.plctlab.org/api/1.2/patches/89769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503143709.50270-1-christophe.lyon@arm.com/","msgid":"<20230503143709.50270-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-03T14:37:09","name":"[v2,03/22] arm: [MVE intrinsics] Rework vreinterpretq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503143709.50270-1-christophe.lyon@arm.com/mbox/"},{"id":89775,"url":"https://patchwork.plctlab.org/api/1.2/patches/89775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com/","msgid":"<77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-03T15:30:14","name":"rs6000: vec_cmpne confusing implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com/mbox/"},{"id":89783,"url":"https://patchwork.plctlab.org/api/1.2/patches/89783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qjxuzs6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-03T16:48:25","name":"[1/2] aarch64: Rename abi_break parameters [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qjxuzs6.fsf@arm.com/mbox/"},{"id":89784,"url":"https://patchwork.plctlab.org/api/1.2/patches/89784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8h9tl72.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-03T16:48:49","name":"[2/2] aarch64: Fix ABI handling of aligned enums [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8h9tl72.fsf@arm.com/mbox/"},{"id":89798,"url":"https://patchwork.plctlab.org/api/1.2/patches/89798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171612.687750-1-aldyh@redhat.com/","msgid":"<20230503171612.687750-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-03T17:16:12","name":"[COMMITTED] Allow varying ranges of unknown types in irange::verify_range [PR109711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171612.687750-1-aldyh@redhat.com/mbox/"},{"id":89802,"url":"https://patchwork.plctlab.org/api/1.2/patches/89802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171922.1120098-1-patrick@rivosinc.com/","msgid":"<20230503171922.1120098-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-03T17:19:22","name":"[gcc13,backport] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171922.1120098-1-patrick@rivosinc.com/mbox/"},{"id":89823,"url":"https://patchwork.plctlab.org/api/1.2/patches/89823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKrSMd4ERX2hWsy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-03T18:43:20","name":"libstdc++: Fix up abi.exp FAILs on powerpc64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKrSMd4ERX2hWsy@tucnak/mbox/"},{"id":89830,"url":"https://patchwork.plctlab.org/api/1.2/patches/89830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKtuNYTXlDlSBYC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-03T18:53:44","name":"libstdc++: Fix up abi.exp FAILs on powerpc64le-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKtuNYTXlDlSBYC@tucnak/mbox/"},{"id":89833,"url":"https://patchwork.plctlab.org/api/1.2/patches/89833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503192504.2299704-1-jason@redhat.com/","msgid":"<20230503192504.2299704-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-03T19:25:04","name":"[pushed] c++: over-eager friend matching [PR109649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503192504.2299704-1-jason@redhat.com/mbox/"},{"id":89859,"url":"https://patchwork.plctlab.org/api/1.2/patches/89859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503211731.182963-1-arsen@aarsen.me/","msgid":"<20230503211731.182963-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-05-03T21:17:31","name":"[PUSHED,gcc-11] extend.texi: replace @itemx not preceded by @item.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503211731.182963-1-arsen@aarsen.me/mbox/"},{"id":89869,"url":"https://patchwork.plctlab.org/api/1.2/patches/89869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231103.931391-1-apinski@marvell.com/","msgid":"<20230503231103.931391-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:11:03","name":"PHIOPT: Improve replace_phi_edge_with_variable'\''s dce_ssa_names slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231103.931391-1-apinski@marvell.com/mbox/"},{"id":89870,"url":"https://patchwork.plctlab.org/api/1.2/patches/89870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-1-apinski@marvell.com/","msgid":"<20230503231224.931656-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:12:23","name":"[1/2] Move copy_phi_arg_into_existing_phi to common location and use it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-1-apinski@marvell.com/mbox/"},{"id":89871,"url":"https://patchwork.plctlab.org/api/1.2/patches/89871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-2-apinski@marvell.com/","msgid":"<20230503231224.931656-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:12:24","name":"[PATCHv2,2/2] PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-2-apinski@marvell.com/mbox/"},{"id":89881,"url":"https://patchwork.plctlab.org/api/1.2/patches/89881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504000721.AA69920425@pchp3.se.axis.com/","msgid":"<20230504000721.AA69920425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:07:21","name":"[committed] CRIS-LRA: Fix uses of reload_in_progress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504000721.AA69920425@pchp3.se.axis.com/mbox/"},{"id":89883,"url":"https://patchwork.plctlab.org/api/1.2/patches/89883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004415.3F59E20438@pchp3.se.axis.com/","msgid":"<20230504004415.3F59E20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:44:15","name":"[committed] CRIS-LRA: Define TARGET_SPILL_CLASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004415.3F59E20438@pchp3.se.axis.com/mbox/"},{"id":89884,"url":"https://patchwork.plctlab.org/api/1.2/patches/89884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004748.E0F7D20416@pchp3.se.axis.com/","msgid":"<20230504004748.E0F7D20416@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:47:48","name":"[committed] CRIS: peephole2 an \"and\" with a contiguous \"one-sided\" sequences of 1s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004748.E0F7D20416@pchp3.se.axis.com/mbox/"},{"id":89902,"url":"https://patchwork.plctlab.org/api/1.2/patches/89902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504032535.1368877-1-hongtao.liu@intel.com/","msgid":"<20230504032535.1368877-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-04T03:25:35","name":"[v2] Canonicalize vec_merge when mask is constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504032535.1368877-1-hongtao.liu@intel.com/mbox/"},{"id":89921,"url":"https://patchwork.plctlab.org/api/1.2/patches/89921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504054544.203366-1-juzhe.zhong@rivai.ai/","msgid":"<20230504054544.203366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-04T05:45:44","name":"[V3] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504054544.203366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":89922,"url":"https://patchwork.plctlab.org/api/1.2/patches/89922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504055446.1675940-1-hongtao.liu@intel.com/","msgid":"<20230504055446.1675940-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-04T05:54:46","name":"[powerpc] Add a peephole2 to eliminate redundant move from VSX_REGS to GENERAL_REGS when it'\''s from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504055446.1675940-1-hongtao.liu@intel.com/mbox/"},{"id":89936,"url":"https://patchwork.plctlab.org/api/1.2/patches/89936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504072936.116825-1-kito.cheng@sifive.com/","msgid":"<20230504072936.116825-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-04T07:29:37","name":"RISC-V: Handle multi-lib path correclty for linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504072936.116825-1-kito.cheng@sifive.com/mbox/"},{"id":89939,"url":"https://patchwork.plctlab.org/api/1.2/patches/89939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de/","msgid":"<20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T07:43:13","name":"tree-optimization/109724 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de/mbox/"},{"id":89951,"url":"https://patchwork.plctlab.org/api/1.2/patches/89951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rwbkh0.fsf@euler.schwinge.homeip.net/","msgid":"<87r0rwbkh0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-04T07:54:03","name":"libgomp C++ testsuite: Use '\''lang_include_flags'\'' instead of '\''libstdcxx_includes'\'' (was: [PATCH] libgomp: Add openacc_{cuda,cublas,cudart} effective targets and use them in openacc testsuite)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rwbkh0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":89954,"url":"https://patchwork.plctlab.org/api/1.2/patches/89954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504080130.24217-1-kito.cheng@sifive.com/","msgid":"<20230504080130.24217-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-04T08:01:31","name":"[v2] RISC-V: Handle multi-lib path correclty for linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504080130.24217-1-kito.cheng@sifive.com/mbox/"},{"id":89995,"url":"https://patchwork.plctlab.org/api/1.2/patches/89995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504083537.2719788-1-pan2.li@intel.com/","msgid":"<20230504083537.2719788-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-04T08:35:37","name":"RISC-V: Legitimise the const0_rtx for RVV indexed load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504083537.2719788-1-pan2.li@intel.com/mbox/"},{"id":90000,"url":"https://patchwork.plctlab.org/api/1.2/patches/90000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com/","msgid":"<47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com>","list_archive_url":null,"date":"2023-05-04T08:56:22","name":"[PATCHv2,rs6000] Splat vector small V2DI constants with ISA 2.07 instructions [PR104124]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com/mbox/"},{"id":90007,"url":"https://patchwork.plctlab.org/api/1.2/patches/90007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504091118.2805091-1-pan2.li@intel.com/","msgid":"<20230504091118.2805091-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-04T09:11:18","name":"[v2] RISC-V: Legitimise the const0_rtx for RVV indexed load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504091118.2805091-1-pan2.li@intel.com/mbox/"},{"id":90040,"url":"https://patchwork.plctlab.org/api/1.2/patches/90040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504105126.0AC9013444@imap2.suse-dmz.suse.de/","msgid":"<20230504105126.0AC9013444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T10:51:25","name":"tree-optimization/109721 - emulated vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504105126.0AC9013444@imap2.suse-dmz.suse.de/mbox/"},{"id":90050,"url":"https://patchwork.plctlab.org/api/1.2/patches/90050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4amfmATdWfLpUjxy+0Hoisjg+7TKOg9wVDOq820RQu_HQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T11:04:28","name":"i386: Improve index_register_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4amfmATdWfLpUjxy+0Hoisjg+7TKOg9wVDOq820RQu_HQ@mail.gmail.com/mbox/"},{"id":90056,"url":"https://patchwork.plctlab.org/api/1.2/patches/90056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504115031.51842-1-jwakely@redhat.com/","msgid":"<20230504115031.51842-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-04T11:50:31","name":"[committed] libstdc++: Document new library version in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504115031.51842-1-jwakely@redhat.com/mbox/"},{"id":90059,"url":"https://patchwork.plctlab.org/api/1.2/patches/90059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5ykpaj2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-04T12:05:05","name":"[libstdc++] use strtold for from_chars even without locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5ykpaj2.fsf@lxoliva.fsfla.org/mbox/"},{"id":90060,"url":"https://patchwork.plctlab.org/api/1.2/patches/90060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y98padr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-04T12:08:16","name":"[vxworks,testsuite,aarch64] use builtin in pred-not-gen-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y98padr.fsf@lxoliva.fsfla.org/mbox/"},{"id":90082,"url":"https://patchwork.plctlab.org/api/1.2/patches/90082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504132540.286148-1-juzhe.zhong@rivai.ai/","msgid":"<20230504132540.286148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-04T13:25:40","name":"[V4] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504132540.286148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90090,"url":"https://patchwork.plctlab.org/api/1.2/patches/90090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504135932.1618B13444@imap2.suse-dmz.suse.de/","msgid":"<20230504135932.1618B13444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T13:59:31","name":"[RFC] tree-optimization/104475 - bogus -Wstringop-overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504135932.1618B13444@imap2.suse-dmz.suse.de/mbox/"},{"id":90139,"url":"https://patchwork.plctlab.org/api/1.2/patches/90139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163340.1327067-1-ppalka@redhat.com/","msgid":"<20230504163340.1327067-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-04T16:33:40","name":"c++: some assorted code improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163340.1327067-1-ppalka@redhat.com/mbox/"},{"id":90140,"url":"https://patchwork.plctlab.org/api/1.2/patches/90140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163353.1327143-1-ppalka@redhat.com/","msgid":"<20230504163353.1327143-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-04T16:33:53","name":"c++: fix pretty printing of '\''alignof'\'' vs '\''__alignof__'\'' [PR85979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163353.1327143-1-ppalka@redhat.com/mbox/"},{"id":90153,"url":"https://patchwork.plctlab.org/api/1.2/patches/90153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504170808.1829411-1-rzinsly@ventanamicro.com/","msgid":"<20230504170808.1829411-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-04T17:08:08","name":"RISC-V: Add bext pattern for ZBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504170808.1829411-1-rzinsly@ventanamicro.com/mbox/"},{"id":90154,"url":"https://patchwork.plctlab.org/api/1.2/patches/90154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504171421.1829763-1-rzinsly@ventanamicro.com/","msgid":"<20230504171421.1829763-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-04T17:14:21","name":"RISC-V: Fix CTZ unnecessary sign extension [PR #106888]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504171421.1829763-1-rzinsly@ventanamicro.com/mbox/"},{"id":90174,"url":"https://patchwork.plctlab.org/api/1.2/patches/90174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z0XjZOUsiYW4XuyRiYAssu3gTZ3MABResbC=bjjfAbjQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T18:29:17","name":"i386: Tighten ashift to lea splitter operand predicates [PR109733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z0XjZOUsiYW4XuyRiYAssu3gTZ3MABResbC=bjjfAbjQ@mail.gmail.com/mbox/"},{"id":90218,"url":"https://patchwork.plctlab.org/api/1.2/patches/90218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3381264-616a-6c76-3357-7dec1f60696d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T19:29:34","name":"libffi: fix handling of homogeneous float128 structs [PR109447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3381264-616a-6c76-3357-7dec1f60696d@linux.ibm.com/mbox/"},{"id":90255,"url":"https://patchwork.plctlab.org/api/1.2/patches/90255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504215638.988177-1-apinski@marvell.com/","msgid":"<20230504215638.988177-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-04T21:56:38","name":"PHIOPT: Fix diamond case of match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504215638.988177-1-apinski@marvell.com/mbox/"},{"id":90263,"url":"https://patchwork.plctlab.org/api/1.2/patches/90263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504234042.992763-1-apinski@marvell.com/","msgid":"<20230504234042.992763-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-04T23:40:42","name":"MATCH: Add ABSU == 0 to a == 0 simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504234042.992763-1-apinski@marvell.com/mbox/"},{"id":90269,"url":"https://patchwork.plctlab.org/api/1.2/patches/90269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505010707.2687333-1-jason@redhat.com/","msgid":"<20230505010707.2687333-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-05T01:07:07","name":"[pushed] Revert \"c++: restore instantiate_decl assert\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505010707.2687333-1-jason@redhat.com/mbox/"},{"id":90292,"url":"https://patchwork.plctlab.org/api/1.2/patches/90292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505052120.1074528-1-juzhe.zhong@rivai.ai/","msgid":"<20230505052120.1074528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T05:21:20","name":"RISC-V: Fix PR109615","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505052120.1074528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90307,"url":"https://patchwork.plctlab.org/api/1.2/patches/90307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505063344.1085156-1-juzhe.zhong@rivai.ai/","msgid":"<20230505063344.1085156-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T06:33:44","name":"[V2] RISC-V: Fix PR109615","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505063344.1085156-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90323,"url":"https://patchwork.plctlab.org/api/1.2/patches/90323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS2L6002wKiQuaB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T07:54:23","name":"[committed] builtins: Fix comment typo mpft_t -> mpfr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS2L6002wKiQuaB@tucnak/mbox/"},{"id":90327,"url":"https://patchwork.plctlab.org/api/1.2/patches/90327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS3q06pEH5J3ZRI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T08:00:43","name":"gimple-range-op: Improve handling of sqrt ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS3q06pEH5J3ZRI@tucnak/mbox/"},{"id":90349,"url":"https://patchwork.plctlab.org/api/1.2/patches/90349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-1-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:08","name":"[01/23] arm: [MVE intrinsics] add binary_round_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-1-christophe.lyon@arm.com/mbox/"},{"id":90348,"url":"https://patchwork.plctlab.org/api/1.2/patches/90348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-2-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:09","name":"[02/23] arm: [MVE intrinsics] factorize vqrshlq vrshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-2-christophe.lyon@arm.com/mbox/"},{"id":90360,"url":"https://patchwork.plctlab.org/api/1.2/patches/90360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-3-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:10","name":"[03/23] arm: [MVE intrinsics] rework vrshlq vqrshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-3-christophe.lyon@arm.com/mbox/"},{"id":90351,"url":"https://patchwork.plctlab.org/api/1.2/patches/90351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-4-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:11","name":"[04/23] arm: [MVE intrinsics] factorize vqshlq vshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-4-christophe.lyon@arm.com/mbox/"},{"id":90356,"url":"https://patchwork.plctlab.org/api/1.2/patches/90356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-5-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:12","name":"[05/23] arm: [MVE intrinsics] rework vqrdmulhq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-5-christophe.lyon@arm.com/mbox/"},{"id":90347,"url":"https://patchwork.plctlab.org/api/1.2/patches/90347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-6-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:13","name":"[06/23] arm: [MVE intrinsics] factorize vabdq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-6-christophe.lyon@arm.com/mbox/"},{"id":90355,"url":"https://patchwork.plctlab.org/api/1.2/patches/90355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-7-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:14","name":"[07/23] arm: [MVE intrinsics] rework vabdq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-7-christophe.lyon@arm.com/mbox/"},{"id":90354,"url":"https://patchwork.plctlab.org/api/1.2/patches/90354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-8-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:15","name":"[08/23] arm: [MVE intrinsics] add binary_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-8-christophe.lyon@arm.com/mbox/"},{"id":90353,"url":"https://patchwork.plctlab.org/api/1.2/patches/90353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-9-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:16","name":"[09/23] arm: [MVE intrinsics] add support for MODE_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-9-christophe.lyon@arm.com/mbox/"},{"id":90350,"url":"https://patchwork.plctlab.org/api/1.2/patches/90350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-10-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:17","name":"[10/23] arm: [MVE intrinsics] add binary_lshift_r shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-10-christophe.lyon@arm.com/mbox/"},{"id":90352,"url":"https://patchwork.plctlab.org/api/1.2/patches/90352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-11-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:18","name":"[11/23] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-11-christophe.lyon@arm.com/mbox/"},{"id":90368,"url":"https://patchwork.plctlab.org/api/1.2/patches/90368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-12-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:19","name":"[12/23] arm: [MVE intrinsics] rework vqshlq vshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-12-christophe.lyon@arm.com/mbox/"},{"id":90361,"url":"https://patchwork.plctlab.org/api/1.2/patches/90361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-13-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:20","name":"[13/23] arm: [MVE intrinsics] factorize vmaxq vminq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-13-christophe.lyon@arm.com/mbox/"},{"id":90365,"url":"https://patchwork.plctlab.org/api/1.2/patches/90365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-14-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:21","name":"[14/23] arm: [MVE intrinsics] rework vmaxq vminq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-14-christophe.lyon@arm.com/mbox/"},{"id":90364,"url":"https://patchwork.plctlab.org/api/1.2/patches/90364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-15-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:22","name":"[15/23] arm: [MVE intrinsics] add binary_rshift_narrow shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-15-christophe.lyon@arm.com/mbox/"},{"id":90366,"url":"https://patchwork.plctlab.org/api/1.2/patches/90366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-16-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:23","name":"[16/23] arm: [MVE intrinsics] factorize vshrntq vshrnbq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-16-christophe.lyon@arm.com/mbox/"},{"id":90367,"url":"https://patchwork.plctlab.org/api/1.2/patches/90367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-17-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:24","name":"[17/23] arm: [MVE intrinsics] rework vshrnbq vshrntq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-17-christophe.lyon@arm.com/mbox/"},{"id":90358,"url":"https://patchwork.plctlab.org/api/1.2/patches/90358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-18-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:25","name":"[18/23] arm: [MVE intrinsics] add binary_rshift_narrow_unsigned shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-18-christophe.lyon@arm.com/mbox/"},{"id":90362,"url":"https://patchwork.plctlab.org/api/1.2/patches/90362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-19-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:26","name":"[19/23] arm: [MVE intrinsics] factorize vqrshrunb vqrshrunt vqshrunb vqshrunt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-19-christophe.lyon@arm.com/mbox/"},{"id":90363,"url":"https://patchwork.plctlab.org/api/1.2/patches/90363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-20-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:27","name":"[20/23] arm: [MVE intrinsics] rework vqrshrunbq vqrshruntq vqshrunbq vqshruntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-20-christophe.lyon@arm.com/mbox/"},{"id":90357,"url":"https://patchwork.plctlab.org/api/1.2/patches/90357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-21-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:28","name":"[21/23] arm: [MVE intrinsics] add binary_rshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-21-christophe.lyon@arm.com/mbox/"},{"id":90359,"url":"https://patchwork.plctlab.org/api/1.2/patches/90359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-22-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:29","name":"[22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-22-christophe.lyon@arm.com/mbox/"},{"id":90369,"url":"https://patchwork.plctlab.org/api/1.2/patches/90369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-23-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:30","name":"[23/23] arm: [MVE intrinsics] rework vshrq vrshrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-23-christophe.lyon@arm.com/mbox/"},{"id":90370,"url":"https://patchwork.plctlab.org/api/1.2/patches/90370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6srb1iq.fsf@euler.schwinge.homeip.net/","msgid":"<87h6srb1iq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-05T08:55:41","name":"Support parallel testing in libgomp, part I [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6srb1iq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":90372,"url":"https://patchwork.plctlab.org/api/1.2/patches/90372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ednvb1cc.fsf@euler.schwinge.homeip.net/","msgid":"<87ednvb1cc.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-05T08:59:31","name":"Support parallel testing in libgomp, part II [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ednvb1cc.fsf@euler.schwinge.homeip.net/mbox/"},{"id":90373,"url":"https://patchwork.plctlab.org/api/1.2/patches/90373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFTGiRSmYjV5IqFy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:04:09","name":"tree: Fix up save_expr [PR52339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFTGiRSmYjV5IqFy@tucnak/mbox/"},{"id":90393,"url":"https://patchwork.plctlab.org/api/1.2/patches/90393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com/","msgid":"<70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:32","name":"[1/8] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90391,"url":"https://patchwork.plctlab.org/api/1.2/patches/90391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:33","name":"[2/8] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90392,"url":"https://patchwork.plctlab.org/api/1.2/patches/90392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/baeeaa5f076e395b14693f83349c64079e33fab3.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:34","name":"[3/8] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/baeeaa5f076e395b14693f83349c64079e33fab3.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90394,"url":"https://patchwork.plctlab.org/api/1.2/patches/90394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:36","name":"[4/8] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90388,"url":"https://patchwork.plctlab.org/api/1.2/patches/90388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d70e3d68b11dbd58298e0d4a341de3039743f954.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:37","name":"[5/8] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d70e3d68b11dbd58298e0d4a341de3039743f954.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90389,"url":"https://patchwork.plctlab.org/api/1.2/patches/90389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cae316f7b894aca94dab3a560045bb0cf1c4da40.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:38","name":"[6/8] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cae316f7b894aca94dab3a560045bb0cf1c4da40.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90395,"url":"https://patchwork.plctlab.org/api/1.2/patches/90395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:39","name":"[7/8] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90396,"url":"https://patchwork.plctlab.org/api/1.2/patches/90396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:40","name":"[8/8] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90409,"url":"https://patchwork.plctlab.org/api/1.2/patches/90409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com/","msgid":"<22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com>","list_archive_url":null,"date":"2023-05-05T11:10:28","name":"GCN: Silence unused-variable warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com/mbox/"},{"id":90426,"url":"https://patchwork.plctlab.org/api/1.2/patches/90426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aXWfcmDeDtSG59wiXbkGqz+=-XZhdqBkPYegKue3tYSg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T12:13:57","name":"i386: Introduce mulv2si3 instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aXWfcmDeDtSG59wiXbkGqz+=-XZhdqBkPYegKue3tYSg@mail.gmail.com/mbox/"},{"id":90428,"url":"https://patchwork.plctlab.org/api/1.2/patches/90428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505121843.AAF6813513@imap2.suse-dmz.suse.de/","msgid":"<20230505121843.AAF6813513@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-05T12:18:43","name":"tree-optimization/109735 - conversion for vectorized pointer-diff","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505121843.AAF6813513@imap2.suse-dmz.suse.de/mbox/"},{"id":90438,"url":"https://patchwork.plctlab.org/api/1.2/patches/90438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a_eva9FnxD1y4Qp6HnQ3DMr+MKkCnQaKBrXJw4D+=_Hw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T13:16:03","name":"i386: Rename index_register_operand predicate to register_no_SP_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a_eva9FnxD1y4Qp6HnQ3DMr+MKkCnQaKBrXJw4D+=_Hw@mail.gmail.com/mbox/"},{"id":90446,"url":"https://patchwork.plctlab.org/api/1.2/patches/90446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505135153.1308864-1-juzhe.zhong@rivai.ai/","msgid":"<20230505135153.1308864-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T13:51:53","name":"RISC-V: Fix PR109748","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505135153.1308864-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90453,"url":"https://patchwork.plctlab.org/api/1.2/patches/90453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505140643.1322399-1-juzhe.zhong@rivai.ai/","msgid":"<20230505140643.1322399-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:06:43","name":"[V4] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505140643.1322399-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90455,"url":"https://patchwork.plctlab.org/api/1.2/patches/90455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505141239.1323841-1-juzhe.zhong@rivai.ai/","msgid":"<20230505141239.1323841-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:12:39","name":"[V2] RISC-V: Fix incorrect demand info merge in local vsetvli optimization [PR109748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505141239.1323841-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90469,"url":"https://patchwork.plctlab.org/api/1.2/patches/90469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505145956.1336111-1-juzhe.zhong@rivai.ai/","msgid":"<20230505145956.1336111-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:59:56","name":"[V5] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505145956.1336111-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90474,"url":"https://patchwork.plctlab.org/api/1.2/patches/90474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505151719.1031737-1-apinski@marvell.com/","msgid":"<20230505151719.1031737-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-05T15:17:19","name":"Move substitute_and_fold over to use simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505151719.1031737-1-apinski@marvell.com/mbox/"},{"id":90482,"url":"https://patchwork.plctlab.org/api/1.2/patches/90482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-2-collison@rivosinc.com/","msgid":"<20230505154607.1155567-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:45:59","name":"[v6,1/9] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-2-collison@rivosinc.com/mbox/"},{"id":90483,"url":"https://patchwork.plctlab.org/api/1.2/patches/90483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-3-collison@rivosinc.com/","msgid":"<20230505154607.1155567-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:00","name":"[v6,2/9] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-3-collison@rivosinc.com/mbox/"},{"id":90490,"url":"https://patchwork.plctlab.org/api/1.2/patches/90490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-4-collison@rivosinc.com/","msgid":"<20230505154607.1155567-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:01","name":"[v6,3/9] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-4-collison@rivosinc.com/mbox/"},{"id":90489,"url":"https://patchwork.plctlab.org/api/1.2/patches/90489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-5-collison@rivosinc.com/","msgid":"<20230505154607.1155567-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:02","name":"[v6,4/9] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-5-collison@rivosinc.com/mbox/"},{"id":90484,"url":"https://patchwork.plctlab.org/api/1.2/patches/90484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-6-collison@rivosinc.com/","msgid":"<20230505154607.1155567-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:03","name":"[v6,5/9] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-6-collison@rivosinc.com/mbox/"},{"id":90495,"url":"https://patchwork.plctlab.org/api/1.2/patches/90495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-7-collison@rivosinc.com/","msgid":"<20230505154607.1155567-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:04","name":"[v6,6/9] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-7-collison@rivosinc.com/mbox/"},{"id":90493,"url":"https://patchwork.plctlab.org/api/1.2/patches/90493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-8-collison@rivosinc.com/","msgid":"<20230505154607.1155567-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:05","name":"[v6,7/9] RISC-V: autovec: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-8-collison@rivosinc.com/mbox/"},{"id":90491,"url":"https://patchwork.plctlab.org/api/1.2/patches/90491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-9-collison@rivosinc.com/","msgid":"<20230505154607.1155567-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:06","name":"[v6,8/9] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-9-collison@rivosinc.com/mbox/"},{"id":90494,"url":"https://patchwork.plctlab.org/api/1.2/patches/90494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-10-collison@rivosinc.com/","msgid":"<20230505154607.1155567-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:07","name":"[v6,9/9] RISC-V:autovec: This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-10-collison@rivosinc.com/mbox/"},{"id":90498,"url":"https://patchwork.plctlab.org/api/1.2/patches/90498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-1-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:57","name":"[01/10] arm: [MVE intrinsics] add unary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-1-christophe.lyon@arm.com/mbox/"},{"id":90499,"url":"https://patchwork.plctlab.org/api/1.2/patches/90499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-2-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:58","name":"[02/10] arm: [MVE intrinsics] factorize several unary operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-2-christophe.lyon@arm.com/mbox/"},{"id":90502,"url":"https://patchwork.plctlab.org/api/1.2/patches/90502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-3-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:59","name":"[03/10] arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabsq, vqnegq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-3-christophe.lyon@arm.com/mbox/"},{"id":90506,"url":"https://patchwork.plctlab.org/api/1.2/patches/90506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-4-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:00","name":"[04/10] arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrndpq vrndxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-4-christophe.lyon@arm.com/mbox/"},{"id":90500,"url":"https://patchwork.plctlab.org/api/1.2/patches/90500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-5-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:01","name":"[05/10] arm: [MVE intrinsics] add binary_move_narrow and binary_move_narrow_unsigned shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-5-christophe.lyon@arm.com/mbox/"},{"id":90505,"url":"https://patchwork.plctlab.org/api/1.2/patches/90505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-6-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:02","name":"[06/10] arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-6-christophe.lyon@arm.com/mbox/"},{"id":90507,"url":"https://patchwork.plctlab.org/api/1.2/patches/90507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-7-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:03","name":"[07/10] arm: [MVE intrinsics] rework vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-7-christophe.lyon@arm.com/mbox/"},{"id":90504,"url":"https://patchwork.plctlab.org/api/1.2/patches/90504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-8-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:04","name":"[08/10] arm: [MVE intrinsics] add binary_widen_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-8-christophe.lyon@arm.com/mbox/"},{"id":90501,"url":"https://patchwork.plctlab.org/api/1.2/patches/90501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-9-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:05","name":"[09/10] arm: [MVE intrinsics] factorize vshllbq vshlltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-9-christophe.lyon@arm.com/mbox/"},{"id":90503,"url":"https://patchwork.plctlab.org/api/1.2/patches/90503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-10-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:06","name":"[10/10] arm: [MVE intrinsics] rework vshllbq vshlltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-10-christophe.lyon@arm.com/mbox/"},{"id":90508,"url":"https://patchwork.plctlab.org/api/1.2/patches/90508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8re2soib.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T16:59:24","name":"ira: Don'\''t create copies for earlyclobbered pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8re2soib.fsf@arm.com/mbox/"},{"id":90511,"url":"https://patchwork.plctlab.org/api/1.2/patches/90511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505170241.19836-1-amonakov@ispras.ru/","msgid":"<20230505170241.19836-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-05T17:02:41","name":"Makefile.in: clean up match.pd-related dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505170241.19836-1-amonakov@ispras.ru/mbox/"},{"id":90514,"url":"https://patchwork.plctlab.org/api/1.2/patches/90514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505171256.1380528-1-patrick@rivosinc.com/","msgid":"<20230505171256.1380528-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T17:12:56","name":"[RFC] RISC-V: Add proposed Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505171256.1380528-1-patrick@rivosinc.com/mbox/"},{"id":90523,"url":"https://patchwork.plctlab.org/api/1.2/patches/90523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173637.1587407-1-ppalka@redhat.com/","msgid":"<20230505173637.1587407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T17:36:37","name":"c++: list CTAD and resolve_nondeduced_context [PR106214]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173637.1587407-1-ppalka@redhat.com/mbox/"},{"id":90524,"url":"https://patchwork.plctlab.org/api/1.2/patches/90524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173648.1593931-1-ppalka@redhat.com/","msgid":"<20230505173648.1593931-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T17:36:48","name":"c++: goto entering scope of obj w/ non-trivial dtor [PR103091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173648.1593931-1-ppalka@redhat.com/mbox/"},{"id":90552,"url":"https://patchwork.plctlab.org/api/1.2/patches/90552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505182630.2133570-1-ppalka@redhat.com/","msgid":"<20230505182630.2133570-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T18:26:30","name":"c++: parenthesized -> resolving to static member [PR98283]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505182630.2133570-1-ppalka@redhat.com/mbox/"},{"id":90581,"url":"https://patchwork.plctlab.org/api/1.2/patches/90581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFVssfzGJSf16Mox@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T20:53:05","name":"gimple-range-op: Improve handling of sin/cos ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFVssfzGJSf16Mox@tucnak/mbox/"},{"id":90624,"url":"https://patchwork.plctlab.org/api/1.2/patches/90624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505231617.1D56B2043B@pchp3.se.axis.com/","msgid":"<20230505231617.1D56B2043B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-05T23:16:17","name":"[committed] CRIS: peephole2 a lsrq into a lslq+lsrq pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505231617.1D56B2043B@pchp3.se.axis.com/mbox/"},{"id":90631,"url":"https://patchwork.plctlab.org/api/1.2/patches/90631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505235950.3675720420@pchp3.se.axis.com/","msgid":"<20230505235950.3675720420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-05T23:59:50","name":"[committed] CRIS: peephole2 a move of constant followed by and of same register","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505235950.3675720420@pchp3.se.axis.com/mbox/"},{"id":90633,"url":"https://patchwork.plctlab.org/api/1.2/patches/90633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506000251.0DDBD20448@pchp3.se.axis.com/","msgid":"<20230506000251.0DDBD20448@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-06T00:02:51","name":"[committed] CRIS: peephole2 an add into two addq or subq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506000251.0DDBD20448@pchp3.se.axis.com/mbox/"},{"id":90657,"url":"https://patchwork.plctlab.org/api/1.2/patches/90657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506014942.1462251-1-juzhe.zhong@rivai.ai/","msgid":"<20230506014942.1462251-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T01:49:42","name":"ISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506014942.1462251-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90658,"url":"https://patchwork.plctlab.org/api/1.2/patches/90658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506015041.1462935-1-juzhe.zhong@rivai.ai/","msgid":"<20230506015041.1462935-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T01:50:41","name":"[V6] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506015041.1462935-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90670,"url":"https://patchwork.plctlab.org/api/1.2/patches/90670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dbf978-ac53-8f2d-4db5-b153300abad3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-06T03:41:48","name":"[fortran] PR109662 Namelist input with comma after name accepted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dbf978-ac53-8f2d-4db5-b153300abad3@gmail.com/mbox/"},{"id":90671,"url":"https://patchwork.plctlab.org/api/1.2/patches/90671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506034340.1717760-1-juzhe.zhong@rivai.ai/","msgid":"<20230506034340.1717760-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T03:43:40","name":"[V7] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506034340.1717760-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90710,"url":"https://patchwork.plctlab.org/api/1.2/patches/90710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-2-gaofei@eswincomputing.com/","msgid":"<20230506083939.22097-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-06T08:39:38","name":"[1/2,RISC-V] disable shrink-wrap-separate if zcmp enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-2-gaofei@eswincomputing.com/mbox/"},{"id":90711,"url":"https://patchwork.plctlab.org/api/1.2/patches/90711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-3-gaofei@eswincomputing.com/","msgid":"<20230506083939.22097-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-06T08:39:39","name":"[2/2,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-3-gaofei@eswincomputing.com/mbox/"},{"id":90729,"url":"https://patchwork.plctlab.org/api/1.2/patches/90729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506111449.2128575-1-juzhe.zhong@rivai.ai/","msgid":"<20230506111449.2128575-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T11:14:49","name":"RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506111449.2128575-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90734,"url":"https://patchwork.plctlab.org/api/1.2/patches/90734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115036.pvng4w6wztcimzrh@begin/","msgid":"<20230506115036.pvng4w6wztcimzrh@begin>","list_archive_url":null,"date":"2023-05-06T11:50:36","name":"hurd: Add multilib paths for gnu-x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115036.pvng4w6wztcimzrh@begin/mbox/"},{"id":90736,"url":"https://patchwork.plctlab.org/api/1.2/patches/90736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115544.y5hzmvwlgoup22ct@begin/","msgid":"<20230506115544.y5hzmvwlgoup22ct@begin>","list_archive_url":null,"date":"2023-05-06T11:55:44","name":"hurd: Ad default-pie and static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115544.y5hzmvwlgoup22ct@begin/mbox/"},{"id":90755,"url":"https://patchwork.plctlab.org/api/1.2/patches/90755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com/","msgid":"<009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T12:57:38","name":"Don'\''t call emit_clobber in lower-subreg.cc'\''s resolve_simple_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com/mbox/"},{"id":90758,"url":"https://patchwork.plctlab.org/api/1.2/patches/90758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com/","msgid":"<003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T14:00:24","name":"[x86_64] Introduce insvti_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com/mbox/"},{"id":90778,"url":"https://patchwork.plctlab.org/api/1.2/patches/90778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007301d98034$82486ea0$86d94be0$@nextmovesoftware.com/","msgid":"<007301d98034$82486ea0$86d94be0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T16:04:57","name":"nvptx: Add suppport for __builtin_nvptx_brev instrinsic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007301d98034$82486ea0$86d94be0$@nextmovesoftware.com/mbox/"},{"id":90781,"url":"https://patchwork.plctlab.org/api/1.2/patches/90781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com/","msgid":"<00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T16:39:15","name":"Add RTX codes for BITREVERSE and COPYSIGN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com/mbox/"},{"id":90783,"url":"https://patchwork.plctlab.org/api/1.2/patches/90783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab6c814593757f0c18116d11a0365a25b6487d47.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-05-06T17:05:34","name":"Pushed: [PATCH v2] LoongArch: Enable shrink wrapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab6c814593757f0c18116d11a0365a25b6487d47.camel@xry111.site/mbox/"},{"id":90785,"url":"https://patchwork.plctlab.org/api/1.2/patches/90785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com/","msgid":"<00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T17:26:11","name":"[libgcc] Add bit reversal functions __bitrev[qhsd]i2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com/mbox/"},{"id":90799,"url":"https://patchwork.plctlab.org/api/1.2/patches/90799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55ba35f-8779-68f4-5e80-ddeb52e0b0e4@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-06T19:52:56","name":"[committed] Partial revert of recent changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55ba35f-8779-68f4-5e80-ddeb52e0b0e4@gmail.com/mbox/"},{"id":90817,"url":"https://patchwork.plctlab.org/api/1.2/patches/90817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-1-apinski@marvell.com/","msgid":"<20230507044332.1122612-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:30","name":"[1/3] PHIOPT: Add diamond bb form to factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-1-apinski@marvell.com/mbox/"},{"id":90816,"url":"https://patchwork.plctlab.org/api/1.2/patches/90816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-2-apinski@marvell.com/","msgid":"<20230507044332.1122612-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:31","name":"[2/3] PHIOPT: Loop over calling factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-2-apinski@marvell.com/mbox/"},{"id":90815,"url":"https://patchwork.plctlab.org/api/1.2/patches/90815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-3-apinski@marvell.com/","msgid":"<20230507044332.1122612-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:32","name":"[3/3] PHIOPT: factor out unary operations instead of just conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-3-apinski@marvell.com/mbox/"},{"id":90819,"url":"https://patchwork.plctlab.org/api/1.2/patches/90819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507045021.1122928-1-apinski@marvell.com/","msgid":"<20230507045021.1122928-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:50:21","name":"[1/3] PHIOPT: Add diamond bb form to factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507045021.1122928-1-apinski@marvell.com/mbox/"},{"id":90824,"url":"https://patchwork.plctlab.org/api/1.2/patches/90824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507084244.61D6433E6C@hamza.pair.com/","msgid":"<20230507084244.61D6433E6C@hamza.pair.com>","list_archive_url":null,"date":"2023-05-07T08:42:42","name":"[pushed] wwwdocs: onlinedocs: Fix markup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507084244.61D6433E6C@hamza.pair.com/mbox/"},{"id":90851,"url":"https://patchwork.plctlab.org/api/1.2/patches/90851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507152600.1150387-1-apinski@marvell.com/","msgid":"<20230507152600.1150387-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T15:26:00","name":"Fix aarch64/109762: push_options/push_options does not work sometimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507152600.1150387-1-apinski@marvell.com/mbox/"},{"id":90876,"url":"https://patchwork.plctlab.org/api/1.2/patches/90876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507201300.1161530-1-apinski@marvell.com/","msgid":"<20230507201300.1161530-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T20:13:00","name":"[GCC,13] Fix aarch64/109762: push_options/push_options does not work sometimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507201300.1161530-1-apinski@marvell.com/mbox/"},{"id":90887,"url":"https://patchwork.plctlab.org/api/1.2/patches/90887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507221959.1166993-1-apinski@marvell.com/","msgid":"<20230507221959.1166993-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T22:19:59","name":"MATCH: Move `a <= CST1 ? MAX : a` optimization to match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507221959.1166993-1-apinski@marvell.com/mbox/"},{"id":90914,"url":"https://patchwork.plctlab.org/api/1.2/patches/90914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508015900.3988239-1-hongtao.liu@intel.com/","msgid":"<20230508015900.3988239-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-08T01:59:00","name":"[V2,vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508015900.3988239-1-hongtao.liu@intel.com/mbox/"},{"id":90929,"url":"https://patchwork.plctlab.org/api/1.2/patches/90929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508034143.2606769-1-juzhe.zhong@rivai.ai/","msgid":"<20230508034143.2606769-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T03:41:43","name":"RISC-V: Fix ugly && incorrect codes of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508034143.2606769-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90936,"url":"https://patchwork.plctlab.org/api/1.2/patches/90936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508052625.1185434-1-apinski@marvell.com/","msgid":"<20230508052625.1185434-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-08T05:26:25","name":"Add a != MIN/MAX_VALUE_CST ? CST-+1 : a to minmax_from_comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508052625.1185434-1-apinski@marvell.com/mbox/"},{"id":91031,"url":"https://patchwork.plctlab.org/api/1.2/patches/91031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508085428.4074457-1-pan2.li@intel.com/","msgid":"<20230508085428.4074457-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-08T08:54:28","name":"RISC-V: Update RVV integer compare simplification comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508085428.4074457-1-pan2.li@intel.com/mbox/"},{"id":91038,"url":"https://patchwork.plctlab.org/api/1.2/patches/91038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508094442.1413139-1-lipeng.zhu@intel.com/","msgid":"<20230508094442.1413139-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-05-08T09:44:43","name":"[v4] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508094442.1413139-1-lipeng.zhu@intel.com/mbox/"},{"id":91153,"url":"https://patchwork.plctlab.org/api/1.2/patches/91153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp/","msgid":"<91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-08T13:38:51","name":"xtensa: Make full transition to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp/mbox/"},{"id":91165,"url":"https://patchwork.plctlab.org/api/1.2/patches/91165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5yeapdt.fsf@euler.schwinge.homeip.net/","msgid":"<87a5yeapdt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-08T14:06:54","name":"libgm2: Remove '\''autogen.sh'\'' (was: libgm2: Adjust '\''autogen.sh'\'' to '\''ACLOCAL_AMFLAGS'\'', and simplify)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5yeapdt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91167,"url":"https://patchwork.plctlab.org/api/1.2/patches/91167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141122.127023-1-rzinsly@ventanamicro.com/","msgid":"<20230508141122.127023-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-08T14:11:22","name":"[v2] RISC-V: Add bext pattern for ZBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141122.127023-1-rzinsly@ventanamicro.com/mbox/"},{"id":91168,"url":"https://patchwork.plctlab.org/api/1.2/patches/91168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141256.127110-1-rzinsly@ventanamicro.com/","msgid":"<20230508141256.127110-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-08T14:12:56","name":"[v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141256.127110-1-rzinsly@ventanamicro.com/mbox/"},{"id":91176,"url":"https://patchwork.plctlab.org/api/1.2/patches/91176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6ba6cf3-00a5-6ba4-9796-5154cdbfcf15@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-08T14:30:52","name":"[committed] Fix minor length computation on stormy16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6ba6cf3-00a5-6ba4-9796-5154cdbfcf15@gmail.com/mbox/"},{"id":91185,"url":"https://patchwork.plctlab.org/api/1.2/patches/91185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143816.45084-1-kito.cheng@sifive.com/","msgid":"<20230508143816.45084-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-08T14:38:16","name":"[committed] RISC-V: Factor out vector manager code in vsetvli insertion pass. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143816.45084-1-kito.cheng@sifive.com/mbox/"},{"id":91186,"url":"https://patchwork.plctlab.org/api/1.2/patches/91186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143829.45127-1-kito.cheng@sifive.com/","msgid":"<20230508143829.45127-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-08T14:38:29","name":"[committed] RISC-V: Improve portability of testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143829.45127-1-kito.cheng@sifive.com/mbox/"},{"id":91187,"url":"https://patchwork.plctlab.org/api/1.2/patches/91187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508144016.649694-1-juzhe.zhong@rivai.ai/","msgid":"<20230508144016.649694-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T14:40:16","name":"[V2] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508144016.649694-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91189,"url":"https://patchwork.plctlab.org/api/1.2/patches/91189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp/","msgid":"<42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-08T14:44:00","name":"[v2] xtensa: Make full transition to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp/mbox/"},{"id":91219,"url":"https://patchwork.plctlab.org/api/1.2/patches/91219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508180408.1218395-1-apinski@marvell.com/","msgid":"<20230508180408.1218395-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-08T18:04:08","name":"[COMMITTED] Fix pr81192.c for int16 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508180408.1218395-1-apinski@marvell.com/mbox/"},{"id":91222,"url":"https://patchwork.plctlab.org/api/1.2/patches/91222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-2-amonakov@ispras.ru/","msgid":"<20230508181311.25961-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:09","name":"[1/3] genmatch: clean up emit_func","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-2-amonakov@ispras.ru/mbox/"},{"id":91221,"url":"https://patchwork.plctlab.org/api/1.2/patches/91221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-3-amonakov@ispras.ru/","msgid":"<20230508181311.25961-3-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:10","name":"[2/3] genmatch: clean up showUsage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-3-amonakov@ispras.ru/mbox/"},{"id":91220,"url":"https://patchwork.plctlab.org/api/1.2/patches/91220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-4-amonakov@ispras.ru/","msgid":"<20230508181311.25961-4-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:11","name":"[3/3] genmatch: fixup get_out_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-4-amonakov@ispras.ru/mbox/"},{"id":91311,"url":"https://patchwork.plctlab.org/api/1.2/patches/91311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB34793E5E1EA2C050CB45B2A691719@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-08T22:26:58","name":"[PUSHED] Fix cfg maintenance after inlining in AutoFDO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB34793E5E1EA2C050CB45B2A691719@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":91314,"url":"https://patchwork.plctlab.org/api/1.2/patches/91314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508231726.801047-1-juzhe.zhong@rivai.ai/","msgid":"<20230508231726.801047-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T23:17:26","name":"[V3] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508231726.801047-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91346,"url":"https://patchwork.plctlab.org/api/1.2/patches/91346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509021934.958640-1-juzhe.zhong@rivai.ai/","msgid":"<20230509021934.958640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T02:19:34","name":"RISC-V: Fix dead loop for user vsetvli intrinsic avl checking [PR109773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509021934.958640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91352,"url":"https://patchwork.plctlab.org/api/1.2/patches/91352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509023844.1433589-1-lipeng.zhu@intel.com/","msgid":"<20230509023844.1433589-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-05-09T02:38:45","name":"[v5] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509023844.1433589-1-lipeng.zhu@intel.com/mbox/"},{"id":91387,"url":"https://patchwork.plctlab.org/api/1.2/patches/91387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at/","msgid":"<6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-09T06:46:24","name":"[committed,gcc,12] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at/mbox/"},{"id":91388,"url":"https://patchwork.plctlab.org/api/1.2/patches/91388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-2-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:26","name":"[1/6] aarch64: Fix move-after-intrinsic function-body tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-2-richard.sandiford@arm.com/mbox/"},{"id":91390,"url":"https://patchwork.plctlab.org/api/1.2/patches/91390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-3-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:27","name":"[2/6] aarch64: Allow moves after tied-register intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-3-richard.sandiford@arm.com/mbox/"},{"id":91389,"url":"https://patchwork.plctlab.org/api/1.2/patches/91389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-4-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:28","name":"[3/6] aarch64: Relax ordering requirements in SVE dup tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-4-richard.sandiford@arm.com/mbox/"},{"id":91391,"url":"https://patchwork.plctlab.org/api/1.2/patches/91391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-5-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:29","name":"[4/6] aarch64: Relax predicate register matches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-5-richard.sandiford@arm.com/mbox/"},{"id":91392,"url":"https://patchwork.plctlab.org/api/1.2/patches/91392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-6-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:30","name":"[5/6] aarch64: Relax FP/vector register matches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-6-richard.sandiford@arm.com/mbox/"},{"id":91393,"url":"https://patchwork.plctlab.org/api/1.2/patches/91393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-7-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:31","name":"[6/6] aarch64: Avoid hard-coding specific register allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-7-richard.sandiford@arm.com/mbox/"},{"id":91396,"url":"https://patchwork.plctlab.org/api/1.2/patches/91396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509070604.3466556-1-hongtao.liu@intel.com/","msgid":"<20230509070604.3466556-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-09T07:06:04","name":"Detect bswap + rotate for byte permutation in pass_bswap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509070604.3466556-1-hongtao.liu@intel.com/mbox/"},{"id":91448,"url":"https://patchwork.plctlab.org/api/1.2/patches/91448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoAggM58+P5CFlE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:12:51","name":"c++: Reject attributes without arguments used as pack expansion [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoAggM58+P5CFlE@tucnak/mbox/"},{"id":91449,"url":"https://patchwork.plctlab.org/api/1.2/patches/91449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoCsXiB7fN8rsW5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:22:09","name":"c++: Reject pack expansion of assume attribute [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoCsXiB7fN8rsW5@tucnak/mbox/"},{"id":91455,"url":"https://patchwork.plctlab.org/api/1.2/patches/91455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoJP41qHvSIaWhw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:50:07","name":"tree-ssa-ccp, wide-int: Fix up handling of [LR]ROTATE_EXPR in bitwise ccp [PR109778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoJP41qHvSIaWhw@tucnak/mbox/"},{"id":91460,"url":"https://patchwork.plctlab.org/api/1.2/patches/91460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509085835.1143661-1-ardb@kernel.org/","msgid":"<20230509085835.1143661-1-ardb@kernel.org>","list_archive_url":null,"date":"2023-05-09T08:58:35","name":"i386: Honour -mdirect-extern-access when calling __fentry__","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509085835.1143661-1-ardb@kernel.org/mbox/"},{"id":91461,"url":"https://patchwork.plctlab.org/api/1.2/patches/91461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lehxswug.fsf@euler.schwinge.homeip.net/","msgid":"<87lehxswug.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T09:00:39","name":"Testsuite: Add missing '\''torture-init'\''/'\''torture-finish'\'' around '\''LTO_TORTURE_OPTIONS'\'' usage (was: Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''torture-init'\'' the '\''LTO_TORTURE_OPTIONS'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lehxswug.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91469,"url":"https://patchwork.plctlab.org/api/1.2/patches/91469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509092820.658568-1-juzhe.zhong@rivai.ai/","msgid":"<20230509092820.658568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T09:28:20","name":"RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509092820.658568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91495,"url":"https://patchwork.plctlab.org/api/1.2/patches/91495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoesHMLC1fRG9qd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T10:21:36","name":"[committed] testsuite: Add further testcase for already fixed PR [PR109778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoesHMLC1fRG9qd@tucnak/mbox/"},{"id":91498,"url":"https://patchwork.plctlab.org/api/1.2/patches/91498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFok4JIOAFvJjh4v@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T10:48:00","name":"[committed] mux-utils.h: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFok4JIOAFvJjh4v@tucnak/mbox/"},{"id":91552,"url":"https://patchwork.plctlab.org/api/1.2/patches/91552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509120550.4093888-1-juzhe.zhong@rivai.ai/","msgid":"<20230509120550.4093888-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T12:05:50","name":"[V2] RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509120550.4093888-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91555,"url":"https://patchwork.plctlab.org/api/1.2/patches/91555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFo3b8RDN8nseojl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T12:07:11","name":"[RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFo3b8RDN8nseojl@arm.com/mbox/"},{"id":91558,"url":"https://patchwork.plctlab.org/api/1.2/patches/91558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-1-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:22","name":"[01/16] arm: [MVE intrinsics] add binary_maxvminv shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-1-christophe.lyon@arm.com/mbox/"},{"id":91572,"url":"https://patchwork.plctlab.org/api/1.2/patches/91572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-2-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:23","name":"[02/16] arm: [MVE intrinsics] add binary_maxavminav shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-2-christophe.lyon@arm.com/mbox/"},{"id":91557,"url":"https://patchwork.plctlab.org/api/1.2/patches/91557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-3-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:24","name":"[03/16] arm: [MVE intrinsics add unspec_mve_function_exact_insn_pred_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-3-christophe.lyon@arm.com/mbox/"},{"id":91565,"url":"https://patchwork.plctlab.org/api/1.2/patches/91565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-4-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:25","name":"[04/16] arm: [MVE intrinsics] factorize vmaxvq vminvq vmaxavq vminavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-4-christophe.lyon@arm.com/mbox/"},{"id":91579,"url":"https://patchwork.plctlab.org/api/1.2/patches/91579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-5-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:26","name":"[05/16] arm: [MVE intrinsics] rework vmaxvq vminvq vmaxavq vminavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-5-christophe.lyon@arm.com/mbox/"},{"id":91559,"url":"https://patchwork.plctlab.org/api/1.2/patches/91559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-6-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:27","name":"[06/16] arm: add smax/smin expanders for v*hf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-6-christophe.lyon@arm.com/mbox/"},{"id":91576,"url":"https://patchwork.plctlab.org/api/1.2/patches/91576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-7-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:28","name":"[07/16] arm: [MVE intrinsics] factorize vmaxnmq vminnmq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-7-christophe.lyon@arm.com/mbox/"},{"id":91568,"url":"https://patchwork.plctlab.org/api/1.2/patches/91568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-8-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:29","name":"[08/16] arm: [MVE intrinsics] rework vmaxnmq vminnmq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-8-christophe.lyon@arm.com/mbox/"},{"id":91577,"url":"https://patchwork.plctlab.org/api/1.2/patches/91577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-9-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:30","name":"[09/16] arm: [MVE intrinsics] factorize vmaxnmavq vmaxnmvq vminnmavq vminnmvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-9-christophe.lyon@arm.com/mbox/"},{"id":91564,"url":"https://patchwork.plctlab.org/api/1.2/patches/91564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-10-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:31","name":"[10/16] arm: [MVE intrinsics] add support for mve_q_p_f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-10-christophe.lyon@arm.com/mbox/"},{"id":91571,"url":"https://patchwork.plctlab.org/api/1.2/patches/91571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-11-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:32","name":"[11/16] arm: [MVE intrinsics] rework vmaxnmavq vmaxnmvq vminnmavq vminnmvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-11-christophe.lyon@arm.com/mbox/"},{"id":91560,"url":"https://patchwork.plctlab.org/api/1.2/patches/91560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-12-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:33","name":"[12/16] arm: [MVE intrinsics] factorize vmaxnmaq vminnmaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-12-christophe.lyon@arm.com/mbox/"},{"id":91573,"url":"https://patchwork.plctlab.org/api/1.2/patches/91573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-13-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:34","name":"[13/16] arm: [MVE intrinsics] rework vmaxnmaq vminnmaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-13-christophe.lyon@arm.com/mbox/"},{"id":91574,"url":"https://patchwork.plctlab.org/api/1.2/patches/91574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-14-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:35","name":"[14/16] arm: [MVE intrinsics] add binary_maxamina shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-14-christophe.lyon@arm.com/mbox/"},{"id":91578,"url":"https://patchwork.plctlab.org/api/1.2/patches/91578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-15-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:36","name":"[15/16] arm: [MVE intrinsics] factorize vmaxaq vminaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-15-christophe.lyon@arm.com/mbox/"},{"id":91567,"url":"https://patchwork.plctlab.org/api/1.2/patches/91567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-16-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:37","name":"[16/16] arm: [MVE intrinsics] rework vmaxaq vminaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-16-christophe.lyon@arm.com/mbox/"},{"id":91580,"url":"https://patchwork.plctlab.org/api/1.2/patches/91580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873545bs0q.fsf@euler.schwinge.homeip.net/","msgid":"<873545bs0q.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:36:53","name":"libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873545bs0q.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91582,"url":"https://patchwork.plctlab.org/api/1.2/patches/91582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg6dadba.fsf@euler.schwinge.homeip.net/","msgid":"<87zg6dadba.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:39:53","name":"libgomp testsuite: Only use '\''blddir'\'' if set (was: libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg6dadba.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91583,"url":"https://patchwork.plctlab.org/api/1.2/patches/91583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn1had8b.fsf@euler.schwinge.homeip.net/","msgid":"<87wn1had8b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:41:40","name":"libgomp testsuite: Use '\''lang_test_file_found'\'' instead of '\''lang_test_file'\'' (was: libgomp testsuite: Only use '\''blddir'\'' if set (was: libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn1had8b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91589,"url":"https://patchwork.plctlab.org/api/1.2/patches/91589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttwlacn6.fsf@euler.schwinge.homeip.net/","msgid":"<87ttwlacn6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:54:21","name":"libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttwlacn6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91592,"url":"https://patchwork.plctlab.org/api/1.2/patches/91592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rpacdy.fsf@euler.schwinge.homeip.net/","msgid":"<87r0rpacdy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:59:53","name":"libgomp C++, Fortran testsuites: Resolve '\''lang_test_file_found'\'' first (was: libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rpacdy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91595,"url":"https://patchwork.plctlab.org/api/1.2/patches/91595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt2dac51.fsf@euler.schwinge.homeip.net/","msgid":"<87mt2dac51.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T13:05:14","name":"libgomp testsuite: Get rid of '\''lang_test_file_found'\'' (was: libgomp C++, Fortran testsuites: Resolve '\''lang_test_file_found'\'' first (was: libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt2dac51.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91598,"url":"https://patchwork.plctlab.org/api/1.2/patches/91598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9a3a573-f39a-6042-3c33-54978a96972f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T13:23:07","name":"[committed] Eliminate more comparisons on the H8 port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9a3a573-f39a-6042-3c33-54978a96972f@gmail.com/mbox/"},{"id":91636,"url":"https://patchwork.plctlab.org/api/1.2/patches/91636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+jrPoiz2m0PYSSRKDy0Rxyv9sw=3hMeK1OrpS8HdRRgg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T15:51:56","name":"[fortran] PR97122 - Spurious FINAL ... must be in the specification part of a MODULE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+jrPoiz2m0PYSSRKDy0Rxyv9sw=3hMeK1OrpS8HdRRgg@mail.gmail.com/mbox/"},{"id":91638,"url":"https://patchwork.plctlab.org/api/1.2/patches/91638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB345227948079D4E16CD24CBDF5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:00:05","name":"vect: Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB345227948079D4E16CD24CBDF5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91640,"url":"https://patchwork.plctlab.org/api/1.2/patches/91640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+_uXXzYQfHsfTjvo7USx98JB_ufDFEwN8eLm=X1xEcDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:00:46","name":"[fortran] PR103716 - [10/11/12/13/14 Regression] ICE in gimplify_expr, at gimplify.c:15964","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+_uXXzYQfHsfTjvo7USx98JB_ufDFEwN8eLm=X1xEcDQ@mail.gmail.com/mbox/"},{"id":91642,"url":"https://patchwork.plctlab.org/api/1.2/patches/91642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34527EC55B9EA0A097EC96C3F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:07:09","name":"vect: Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34527EC55B9EA0A097EC96C3F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91649,"url":"https://patchwork.plctlab.org/api/1.2/patches/91649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34526BFA97C71399317166B0F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:14:33","name":"rtl: AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34526BFA97C71399317166B0F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91656,"url":"https://patchwork.plctlab.org/api/1.2/patches/91656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163502.3746600-1-ppalka@redhat.com/","msgid":"<20230509163502.3746600-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-09T16:35:02","name":"c++: noexcept-spec from nested class confusion [PR109761]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163502.3746600-1-ppalka@redhat.com/mbox/"},{"id":91655,"url":"https://patchwork.plctlab.org/api/1.2/patches/91655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163509.3746628-1-ppalka@redhat.com/","msgid":"<20230509163509.3746628-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-09T16:35:09","name":"c++: error-recovery ICE with unstable satisfaction [PR109752]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163509.3746628-1-ppalka@redhat.com/mbox/"},{"id":91705,"url":"https://patchwork.plctlab.org/api/1.2/patches/91705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm79petb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T17:58:24","name":"[1/2] aarch64: Fix cut-&-pasto in aarch64-sve2-acle-asm.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm79petb.fsf@arm.com/mbox/"},{"id":91706,"url":"https://patchwork.plctlab.org/api/1.2/patches/91706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzxhperg.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T17:59:31","name":"[2/2] aarch64: Improve register allocation for lane instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzxhperg.fsf@arm.com/mbox/"},{"id":91711,"url":"https://patchwork.plctlab.org/api/1.2/patches/91711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509182823.726391-1-christophe.lyon@arm.com/","msgid":"<20230509182823.726391-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T18:28:23","name":"[v2,06/16] arm: add smax/smin expanders for v*hf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509182823.726391-1-christophe.lyon@arm.com/mbox/"},{"id":91724,"url":"https://patchwork.plctlab.org/api/1.2/patches/91724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFqdnW1JY7nR1bii@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T19:23:09","name":"c++, v2: Reject attributes without arguments used as pack expansion [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFqdnW1JY7nR1bii@tucnak/mbox/"},{"id":91730,"url":"https://patchwork.plctlab.org/api/1.2/patches/91730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509194158.329137-1-polacek@redhat.com/","msgid":"<20230509194158.329137-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-09T19:41:58","name":"configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509194158.329137-1-polacek@redhat.com/mbox/"},{"id":91731,"url":"https://patchwork.plctlab.org/api/1.2/patches/91731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509195345.561522-1-jwakely@redhat.com/","msgid":"<20230509195345.561522-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-09T19:53:45","name":"[committed] libstdc++: Fix pretty printers and add tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509195345.561522-1-jwakely@redhat.com/mbox/"},{"id":91784,"url":"https://patchwork.plctlab.org/api/1.2/patches/91784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510003326.8B65620423@pchp3.se.axis.com/","msgid":"<20230510003326.8B65620423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-10T00:33:26","name":"[committed] CRIS: Fix ccmode typo in cris_postdbr_cmpelim","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510003326.8B65620423@pchp3.se.axis.com/mbox/"},{"id":91787,"url":"https://patchwork.plctlab.org/api/1.2/patches/91787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB348450698DEB069F231AF92E91779@MN0PR21MB3484.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T01:38:08","name":"Fixes and workarounds for warnings during autoprofiledbootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB348450698DEB069F231AF92E91779@MN0PR21MB3484.namprd21.prod.outlook.com/mbox/"},{"id":91795,"url":"https://patchwork.plctlab.org/api/1.2/patches/91795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510021826.31920-1-xuli1@eswincomputing.com/","msgid":"<20230510021826.31920-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-05-10T02:18:26","name":"RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instructions satisfying REG_P(operand[1]) in -O0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510021826.31920-1-xuli1@eswincomputing.com/mbox/"},{"id":91834,"url":"https://patchwork.plctlab.org/api/1.2/patches/91834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040035.2972636-1-juzhe.zhong@rivai.ai/","msgid":"<20230510040035.2972636-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-10T04:00:35","name":"RISC-V: Support const series vector for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040035.2972636-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91835,"url":"https://patchwork.plctlab.org/api/1.2/patches/91835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040213.7313-1-xuli1@eswincomputing.com/","msgid":"<20230510040213.7313-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-05-10T04:02:13","name":"[V2] RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instructions satisfying REG_P(operand[1]) in -O0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040213.7313-1-xuli1@eswincomputing.com/mbox/"},{"id":91857,"url":"https://patchwork.plctlab.org/api/1.2/patches/91857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3eb53fe-b930-5162-656e-8adfdb31e797@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T04:59:19","name":"_Hashtable implementation cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3eb53fe-b930-5162-656e-8adfdb31e797@gmail.com/mbox/"},{"id":91865,"url":"https://patchwork.plctlab.org/api/1.2/patches/91865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510050748.1308816-1-apinski@marvell.com/","msgid":"<20230510050748.1308816-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-10T05:07:48","name":"[Committed] New testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510050748.1308816-1-apinski@marvell.com/mbox/"},{"id":91913,"url":"https://patchwork.plctlab.org/api/1.2/patches/91913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510071758.2098860-1-pan2.li@intel.com/","msgid":"<20230510071758.2098860-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T07:17:58","name":"Var-Tracking: Leverage pointer_mux for decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510071758.2098860-1-pan2.li@intel.com/mbox/"},{"id":91936,"url":"https://patchwork.plctlab.org/api/1.2/patches/91936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs84sjxl.fsf@euler.schwinge.homeip.net/","msgid":"<87fs84sjxl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-10T07:51:50","name":"Testsuite: Add '\''torture-init-done'\'', and use it to conditionalize implicit '\''torture-init'\'' (was: Testsuite: Add missing '\''torture-init'\''/'\''torture-finish'\'' around '\''LTO_TORTURE_OPTIONS'\'' usage (was: Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs84sjxl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91977,"url":"https://patchwork.plctlab.org/api/1.2/patches/91977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510090758.3737162-1-hongtao.liu@intel.com/","msgid":"<20230510090758.3737162-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-10T09:07:58","name":"x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510090758.3737162-1-hongtao.liu@intel.com/mbox/"},{"id":92006,"url":"https://patchwork.plctlab.org/api/1.2/patches/92006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFtow4ihR8drfg7g@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-10T09:49:55","name":"ipa-prop: Fix ipa_get_callee_param_type for calls with argument type mismatches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFtow4ihR8drfg7g@tucnak/mbox/"},{"id":92013,"url":"https://patchwork.plctlab.org/api/1.2/patches/92013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/830f90ea-6278-f757-4642-cca654edd736@in.tum.de/","msgid":"<830f90ea-6278-f757-4642-cca654edd736@in.tum.de>","list_archive_url":null,"date":"2023-05-10T10:49:46","name":"fix radix sort on 32bit platforms [PR109670]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/830f90ea-6278-f757-4642-cca654edd736@in.tum.de/mbox/"},{"id":92032,"url":"https://patchwork.plctlab.org/api/1.2/patches/92032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510112009.633444-1-jwakely@redhat.com/","msgid":"<20230510112009.633444-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-10T11:20:09","name":"[RFC] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510112009.633444-1-jwakely@redhat.com/mbox/"},{"id":92051,"url":"https://patchwork.plctlab.org/api/1.2/patches/92051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com/","msgid":"<6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com>","list_archive_url":null,"date":"2023-05-10T11:46:41","name":"[committed] Fix a couple constraints on the H8 in preparation for LRA conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com/mbox/"},{"id":92065,"url":"https://patchwork.plctlab.org/api/1.2/patches/92065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510115705.2420805-1-pan2.li@intel.com/","msgid":"<20230510115705.2420805-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T11:57:05","name":"[v2] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510115705.2420805-1-pan2.li@intel.com/mbox/"},{"id":92080,"url":"https://patchwork.plctlab.org/api/1.2/patches/92080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510130543.4026214-1-juzhe.zhong@rivai.ai/","msgid":"<20230510130543.4026214-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-10T13:05:43","name":"RISC-V: Add basic vec_init support for RVV auto-vectorizaiton","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510130543.4026214-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92085,"url":"https://patchwork.plctlab.org/api/1.2/patches/92085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-1-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:17","name":"[01/20] arm: [MVE intrinsics] factorize vcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-1-christophe.lyon@arm.com/mbox/"},{"id":92105,"url":"https://patchwork.plctlab.org/api/1.2/patches/92105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-2-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:18","name":"[02/20] arm: [MVE intrinsics] add cmp shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-2-christophe.lyon@arm.com/mbox/"},{"id":92119,"url":"https://patchwork.plctlab.org/api/1.2/patches/92119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-3-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:19","name":"[03/20] arm: [MVE intrinsics] rework vcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-3-christophe.lyon@arm.com/mbox/"},{"id":92096,"url":"https://patchwork.plctlab.org/api/1.2/patches/92096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-4-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:20","name":"[04/20] arm: [MVE intrinsics] factorize vrev16q vrev32q vrev64q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-4-christophe.lyon@arm.com/mbox/"},{"id":92118,"url":"https://patchwork.plctlab.org/api/1.2/patches/92118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-5-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:21","name":"[05/20] arm: [MVE intrinsics] rework vrev16q vrev32q vrev64q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-5-christophe.lyon@arm.com/mbox/"},{"id":92094,"url":"https://patchwork.plctlab.org/api/1.2/patches/92094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-6-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:22","name":"[06/20] arm: [MVE intrinsics] factorize vdupq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-6-christophe.lyon@arm.com/mbox/"},{"id":92101,"url":"https://patchwork.plctlab.org/api/1.2/patches/92101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-7-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:23","name":"[07/20] arm: [MVE intrinsics] add unary_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-7-christophe.lyon@arm.com/mbox/"},{"id":92110,"url":"https://patchwork.plctlab.org/api/1.2/patches/92110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-8-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:24","name":"[08/20] arm: [MVE intrinsics] rework vdupq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-8-christophe.lyon@arm.com/mbox/"},{"id":92091,"url":"https://patchwork.plctlab.org/api/1.2/patches/92091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-9-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:25","name":"[09/20] arm: [MVE intrinsics] factorize vaddvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-9-christophe.lyon@arm.com/mbox/"},{"id":92102,"url":"https://patchwork.plctlab.org/api/1.2/patches/92102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-10-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:26","name":"[10/20] arm: [MVE intrinsics] add unary_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-10-christophe.lyon@arm.com/mbox/"},{"id":92087,"url":"https://patchwork.plctlab.org/api/1.2/patches/92087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-11-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:27","name":"[11/20] arm: [MVE intrinsics] rework vaddvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-11-christophe.lyon@arm.com/mbox/"},{"id":92116,"url":"https://patchwork.plctlab.org/api/1.2/patches/92116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-12-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:28","name":"[12/20] arm: [MVE intrinsics] factorize vaddvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-12-christophe.lyon@arm.com/mbox/"},{"id":92113,"url":"https://patchwork.plctlab.org/api/1.2/patches/92113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-13-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:29","name":"[13/20] arm: [MVE intrinsics] add unary_int32_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-13-christophe.lyon@arm.com/mbox/"},{"id":92103,"url":"https://patchwork.plctlab.org/api/1.2/patches/92103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-14-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:30","name":"[14/20] arm: [MVE intrinsics] rework vaddvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-14-christophe.lyon@arm.com/mbox/"},{"id":92099,"url":"https://patchwork.plctlab.org/api/1.2/patches/92099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-15-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:31","name":"[15/20] arm: [MVE intrinsics] add unary_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-15-christophe.lyon@arm.com/mbox/"},{"id":92104,"url":"https://patchwork.plctlab.org/api/1.2/patches/92104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-16-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:32","name":"[16/20] arm: [MVE intrinsics] factorize vaddlvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-16-christophe.lyon@arm.com/mbox/"},{"id":92108,"url":"https://patchwork.plctlab.org/api/1.2/patches/92108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-17-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:33","name":"[17/20] arm: [MVE intrinsics] rework vaddlvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-17-christophe.lyon@arm.com/mbox/"},{"id":92107,"url":"https://patchwork.plctlab.org/api/1.2/patches/92107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-18-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:34","name":"[18/20] arm: [MVE intrinsics] factorize vmovlbq vmovltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-18-christophe.lyon@arm.com/mbox/"},{"id":92106,"url":"https://patchwork.plctlab.org/api/1.2/patches/92106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-19-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:35","name":"[19/20] arm: [MVE intrinsics] add unary_widen shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-19-christophe.lyon@arm.com/mbox/"},{"id":92098,"url":"https://patchwork.plctlab.org/api/1.2/patches/92098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-20-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:36","name":"[20/20] arm: [MVE intrinsics] rework vmovlbq vmovltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-20-christophe.lyon@arm.com/mbox/"},{"id":92120,"url":"https://patchwork.plctlab.org/api/1.2/patches/92120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510134600.D4AE13851C12@sourceware.org/","msgid":"<20230510134600.D4AE13851C12@sourceware.org>","list_archive_url":null,"date":"2023-05-10T13:43:34","name":"Avoid g++.dg/torture/pr106922.C FAIL with the pre-C++11 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510134600.D4AE13851C12@sourceware.org/mbox/"},{"id":92163,"url":"https://patchwork.plctlab.org/api/1.2/patches/92163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com/","msgid":"<000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T14:46:10","name":"[take,#3] match.pd: Simplify popcount/parity of bswap/rotate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com/mbox/"},{"id":92170,"url":"https://patchwork.plctlab.org/api/1.2/patches/92170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-1-jason@redhat.com/","msgid":"<20230510150441.850396-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:04:40","name":"[pushed,1/2] c++: always check consteval address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-1-jason@redhat.com/mbox/"},{"id":92171,"url":"https://patchwork.plctlab.org/api/1.2/patches/92171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-2-jason@redhat.com/","msgid":"<20230510150441.850396-2-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:04:41","name":"[pushed,2/2] c++: be stricter about constinit [CWG2543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-2-jason@redhat.com/mbox/"},{"id":92175,"url":"https://patchwork.plctlab.org/api/1.2/patches/92175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510152356.2623391-1-pan2.li@intel.com/","msgid":"<20230510152356.2623391-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T15:23:56","name":"[v3] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510152356.2623391-1-pan2.li@intel.com/mbox/"},{"id":92176,"url":"https://patchwork.plctlab.org/api/1.2/patches/92176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com/","msgid":"<0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com>","list_archive_url":null,"date":"2023-05-10T15:24:30","name":"riscv: Add vectorized binops and insn_expander helpers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com/mbox/"},{"id":92179,"url":"https://patchwork.plctlab.org/api/1.2/patches/92179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfb0414-4cc5-e613-5115-99f02970c058@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:24:40","name":"riscv: Clarify vlmax and length handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfb0414-4cc5-e613-5115-99f02970c058@gmail.com/mbox/"},{"id":92177,"url":"https://patchwork.plctlab.org/api/1.2/patches/92177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com/","msgid":"<75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com>","list_archive_url":null,"date":"2023-05-10T15:24:50","name":"riscv: Split off shift patterns for autovectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com/mbox/"},{"id":92178,"url":"https://patchwork.plctlab.org/api/1.2/patches/92178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbec9930-ad79-6d20-1d1d-c9457331fafb@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:24:57","name":"riscv: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbec9930-ad79-6d20-1d1d-c9457331fafb@gmail.com/mbox/"},{"id":92181,"url":"https://patchwork.plctlab.org/api/1.2/patches/92181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510153604.311723-1-ppalka@redhat.com/","msgid":"<20230510153604.311723-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:36:04","name":"c++: converted lambda as template argument [PR83258, ...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510153604.311723-1-ppalka@redhat.com/mbox/"},{"id":92183,"url":"https://patchwork.plctlab.org/api/1.2/patches/92183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFu60EPEOJTV/GA1@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:40:00","name":"[V5,2/2] PR target/105325: Fix memory constraints for power10 fusion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFu60EPEOJTV/GA1@toto.the-meissners.org/mbox/"},{"id":92190,"url":"https://patchwork.plctlab.org/api/1.2/patches/92190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMnH0NAvR-5Zqo9W76C1LPnfDroEk_O+D8HPqwuW1xPBA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:50:37","name":"RISC-V: Remove masking third operand of rotate instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMnH0NAvR-5Zqo9W76C1LPnfDroEk_O+D8HPqwuW1xPBA@mail.gmail.com/mbox/"},{"id":92200,"url":"https://patchwork.plctlab.org/api/1.2/patches/92200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510161009.2653550-1-pan2.li@intel.com/","msgid":"<20230510161009.2653550-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T16:10:09","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510161009.2653550-1-pan2.li@intel.com/mbox/"},{"id":92212,"url":"https://patchwork.plctlab.org/api/1.2/patches/92212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164719.155783-1-rep.dot.nop@gmail.com/","msgid":"<20230510164719.155783-1-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:47:19","name":"[v2] Fortran: Narrow return types [PR78798]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164719.155783-1-rep.dot.nop@gmail.com/mbox/"},{"id":92213,"url":"https://patchwork.plctlab.org/api/1.2/patches/92213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-1-rep.dot.nop@gmail.com/","msgid":"<20230510164841.155816-1-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:48:40","name":"[1/2] Fortran: dump-parse-tree attribs: fix unbalanced braces [PR109624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-1-rep.dot.nop@gmail.com/mbox/"},{"id":92214,"url":"https://patchwork.plctlab.org/api/1.2/patches/92214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-2-rep.dot.nop@gmail.com/","msgid":"<20230510164841.155816-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:48:41","name":"[2/2] Fortran: dump-parse-tree: Mark debug functions with DEBUG_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-2-rep.dot.nop@gmail.com/mbox/"},{"id":92252,"url":"https://patchwork.plctlab.org/api/1.2/patches/92252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510180006.1340377-1-apinski@marvell.com/","msgid":"<20230510180006.1340377-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-10T18:00:06","name":"Add another new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510180006.1340377-1-apinski@marvell.com/mbox/"},{"id":92253,"url":"https://patchwork.plctlab.org/api/1.2/patches/92253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db7ba137fbb7b94404c2131ea8e93565803081d7.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T18:06:22","name":"rs6000: Fix __builtin_vec_xst_trunc definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db7ba137fbb7b94404c2131ea8e93565803081d7.camel@us.ibm.com/mbox/"},{"id":92278,"url":"https://patchwork.plctlab.org/api/1.2/patches/92278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000001d98374$7971dad0$6c559070$@nextmovesoftware.com/","msgid":"<000001d98374$7971dad0$6c559070$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T19:20:23","name":"[x86_64] Use [(const_int 0)] idiom consistently in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000001d98374$7971dad0$6c559070$@nextmovesoftware.com/mbox/"},{"id":92291,"url":"https://patchwork.plctlab.org/api/1.2/patches/92291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aV=ooqGYrVayfHtRT-0nPgqSP09CD0qLMz74hxuS2y2w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T20:45:01","name":"i386: Add missing vector extend patterns [PR92658]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aV=ooqGYrVayfHtRT-0nPgqSP09CD0qLMz74hxuS2y2w@mail.gmail.com/mbox/"},{"id":92294,"url":"https://patchwork.plctlab.org/api/1.2/patches/92294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510210731.975161-1-jason@redhat.com/","msgid":"<20230510210731.975161-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T21:07:31","name":"[pushed] c++: adjust conversion diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510210731.975161-1-jason@redhat.com/mbox/"},{"id":92305,"url":"https://patchwork.plctlab.org/api/1.2/patches/92305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFwMeKCu4OnsPPaE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T21:28:24","name":"[v2] c++: wrong std::is_convertible with cv-qual fn [PR109680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFwMeKCu4OnsPPaE@redhat.com/mbox/"},{"id":92307,"url":"https://patchwork.plctlab.org/api/1.2/patches/92307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com/","msgid":"<02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T21:53:49","name":"match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount(X)+popcount(Y)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com/mbox/"},{"id":92346,"url":"https://patchwork.plctlab.org/api/1.2/patches/92346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511022818.3211659-1-pan2.li@intel.com/","msgid":"<20230511022818.3211659-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T02:28:18","name":"[v4] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511022818.3211659-1-pan2.li@intel.com/mbox/"},{"id":92348,"url":"https://patchwork.plctlab.org/api/1.2/patches/92348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031354.282014-1-juzhe.zhong@rivai.ai/","msgid":"<20230511031354.282014-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T03:13:54","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031354.282014-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92349,"url":"https://patchwork.plctlab.org/api/1.2/patches/92349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031447.286664-1-juzhe.zhong@rivai.ai/","msgid":"<20230511031447.286664-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T03:14:47","name":"[commited] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031447.286664-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92351,"url":"https://patchwork.plctlab.org/api/1.2/patches/92351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511033829.39575-1-kito.cheng@sifive.com/","msgid":"<20230511033829.39575-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-11T03:38:30","name":"[committed,v2] RISC-V: Support const series vector for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511033829.39575-1-kito.cheng@sifive.com/mbox/"},{"id":92355,"url":"https://patchwork.plctlab.org/api/1.2/patches/92355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511051244.1068441-1-juzhe.zhong@rivai.ai/","msgid":"<20230511051244.1068441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T05:12:44","name":"[V5] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511051244.1068441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92366,"url":"https://patchwork.plctlab.org/api/1.2/patches/92366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511062137.3451855-1-pan2.li@intel.com/","msgid":"<20230511062137.3451855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T06:21:37","name":"[v5] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511062137.3451855-1-pan2.li@intel.com/mbox/"},{"id":92433,"url":"https://patchwork.plctlab.org/api/1.2/patches/92433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada6da15-ba5e-1959-91ae-3ed9c44faf1f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T08:29:16","name":"mklog.py: Add --commit option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada6da15-ba5e-1959-91ae-3ed9c44faf1f@gmail.com/mbox/"},{"id":92445,"url":"https://patchwork.plctlab.org/api/1.2/patches/92445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511092420.1779593-1-juzhe.zhong@rivai.ai/","msgid":"<20230511092420.1779593-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T09:24:20","name":"[V2] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511092420.1779593-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92452,"url":"https://patchwork.plctlab.org/api/1.2/patches/92452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511093852.291864-1-juzhe.zhong@rivai.ai/","msgid":"<20230511093852.291864-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T09:38:52","name":"[V6] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511093852.291864-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92472,"url":"https://patchwork.plctlab.org/api/1.2/patches/92472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-1-lili.cui@intel.com/","msgid":"<20230511101201.2052667-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T10:12:00","name":"[1/2] PR gcc/98350:Add a param to control the length of the chain with FMA in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-1-lili.cui@intel.com/mbox/"},{"id":92471,"url":"https://patchwork.plctlab.org/api/1.2/patches/92471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-2-lili.cui@intel.com/","msgid":"<20230511101201.2052667-2-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T10:12:01","name":"[2/2] Add a tune option to control the length of the chain with FMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-2-lili.cui@intel.com/mbox/"},{"id":92473,"url":"https://patchwork.plctlab.org/api/1.2/patches/92473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c510c333-a863-6aa0-5a40-5177d5b45094@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T10:26:55","name":"[v2] RISC-V: Add vectorized binops and insn_expander helpers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c510c333-a863-6aa0-5a40-5177d5b45094@gmail.com/mbox/"},{"id":92474,"url":"https://patchwork.plctlab.org/api/1.2/patches/92474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com/","msgid":"<2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com>","list_archive_url":null,"date":"2023-05-11T10:27:50","name":"[v2] RISC-V: Add autovectorization tests for binary integer, operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com/mbox/"},{"id":92475,"url":"https://patchwork.plctlab.org/api/1.2/patches/92475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e21778f9-94f2-9452-f2fd-270322ab88e8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T10:29:54","name":"[v2] RISC-V: Clarify vlmax and length handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e21778f9-94f2-9452-f2fd-270322ab88e8@gmail.com/mbox/"},{"id":92476,"url":"https://patchwork.plctlab.org/api/1.2/patches/92476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com/","msgid":"<22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com>","list_archive_url":null,"date":"2023-05-11T10:33:50","name":"[v2] RISC-V: Split off shift patterns for autovectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com/mbox/"},{"id":92482,"url":"https://patchwork.plctlab.org/api/1.2/patches/92482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511110939.1994129-1-pan2.li@intel.com/","msgid":"<20230511110939.1994129-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T11:09:39","name":"[committed] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511110939.1994129-1-pan2.li@intel.com/mbox/"},{"id":92483,"url":"https://patchwork.plctlab.org/api/1.2/patches/92483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFzOQqRuXWoRXHsG@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T11:15:14","name":"arm: Fix ICE due to infinite splitting [PR109800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFzOQqRuXWoRXHsG@arm.com/mbox/"},{"id":92485,"url":"https://patchwork.plctlab.org/api/1.2/patches/92485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt2bf69o.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T11:37:39","name":"aarch64: Remove alignment assertions [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt2bf69o.fsf@arm.com/mbox/"},{"id":92488,"url":"https://patchwork.plctlab.org/api/1.2/patches/92488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511115636.964614-1-jwakely@redhat.com/","msgid":"<20230511115636.964614-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T11:56:36","name":"[committed] libstdc++: Fix std::abs(__float128) for -NaN and -0.0 [PR109758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511115636.964614-1-jwakely@redhat.com/mbox/"},{"id":92508,"url":"https://patchwork.plctlab.org/api/1.2/patches/92508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-1-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:56","name":"[01/24] arm: [MVE intrinsics] factorize vaddlvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-1-christophe.lyon@arm.com/mbox/"},{"id":92509,"url":"https://patchwork.plctlab.org/api/1.2/patches/92509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-2-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:57","name":"[02/24] arm: [MVE intrinsics] add unary_widen_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-2-christophe.lyon@arm.com/mbox/"},{"id":92515,"url":"https://patchwork.plctlab.org/api/1.2/patches/92515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-3-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:58","name":"[03/24] arm: [MVE intrinsics] rework vaddlvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-3-christophe.lyon@arm.com/mbox/"},{"id":92514,"url":"https://patchwork.plctlab.org/api/1.2/patches/92514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-4-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:59","name":"[04/24] arm: [MVE intrinsics] add binary_acc_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-4-christophe.lyon@arm.com/mbox/"},{"id":92513,"url":"https://patchwork.plctlab.org/api/1.2/patches/92513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-5-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:00","name":"[05/24] arm: [MVE intrinsics] factorize vmladav vmladavx vmlsdav vmlsdavx vmladava vmladavax vmlsdava vmlsdavax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-5-christophe.lyon@arm.com/mbox/"},{"id":92521,"url":"https://patchwork.plctlab.org/api/1.2/patches/92521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-6-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:01","name":"[06/24] arm: [MVE intrinsics] rework vmladavq vmladavxq vmlsdavq vmlsdavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-6-christophe.lyon@arm.com/mbox/"},{"id":92511,"url":"https://patchwork.plctlab.org/api/1.2/patches/92511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-7-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:02","name":"[07/24] arm: [MVE intrinsics] add binary_acca_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-7-christophe.lyon@arm.com/mbox/"},{"id":92547,"url":"https://patchwork.plctlab.org/api/1.2/patches/92547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-8-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:03","name":"[08/24] arm: [MVE intrinsics] rework vmladavaq vmladavaxq vmlsdavaq vmlsdavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-8-christophe.lyon@arm.com/mbox/"},{"id":92516,"url":"https://patchwork.plctlab.org/api/1.2/patches/92516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-9-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:04","name":"[09/24] arm: [MVE intrinsics] factorize vabavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-9-christophe.lyon@arm.com/mbox/"},{"id":92524,"url":"https://patchwork.plctlab.org/api/1.2/patches/92524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-10-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:05","name":"[10/24] arm: [MVE intrinsics] rework vabavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-10-christophe.lyon@arm.com/mbox/"},{"id":92523,"url":"https://patchwork.plctlab.org/api/1.2/patches/92523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-11-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:06","name":"[11/24] arm: [MVE intrinsics] add binary_acc_int64 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-11-christophe.lyon@arm.com/mbox/"},{"id":92512,"url":"https://patchwork.plctlab.org/api/1.2/patches/92512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-12-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:07","name":"[12/24] arm: [MVE intrinsics] factorize vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-12-christophe.lyon@arm.com/mbox/"},{"id":92518,"url":"https://patchwork.plctlab.org/api/1.2/patches/92518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-13-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:08","name":"[13/24] arm: [MVE intrinsics] rework vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-13-christophe.lyon@arm.com/mbox/"},{"id":92522,"url":"https://patchwork.plctlab.org/api/1.2/patches/92522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-14-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:09","name":"[14/24] arm: [MVE intrinsics] factorize vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-14-christophe.lyon@arm.com/mbox/"},{"id":92544,"url":"https://patchwork.plctlab.org/api/1.2/patches/92544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-15-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:10","name":"[15/24] arm: [MVE intrinsics] rework vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-15-christophe.lyon@arm.com/mbox/"},{"id":92517,"url":"https://patchwork.plctlab.org/api/1.2/patches/92517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-16-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:11","name":"[16/24] arm: [MVE intrinsics] add binary_acca_int64 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-16-christophe.lyon@arm.com/mbox/"},{"id":92542,"url":"https://patchwork.plctlab.org/api/1.2/patches/92542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-17-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:12","name":"[17/24] arm: [MVE intrinsics] factorize vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-17-christophe.lyon@arm.com/mbox/"},{"id":92538,"url":"https://patchwork.plctlab.org/api/1.2/patches/92538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-18-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:13","name":"[18/24] arm: [MVE intrinsics] rework vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-18-christophe.lyon@arm.com/mbox/"},{"id":92532,"url":"https://patchwork.plctlab.org/api/1.2/patches/92532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-19-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:14","name":"[19/24] arm: [MVE intrinsics] add ternary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-19-christophe.lyon@arm.com/mbox/"},{"id":92519,"url":"https://patchwork.plctlab.org/api/1.2/patches/92519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-20-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:15","name":"[20/24] arm: [MVE intrinsics] factorize vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-20-christophe.lyon@arm.com/mbox/"},{"id":92530,"url":"https://patchwork.plctlab.org/api/1.2/patches/92530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-21-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:16","name":"[21/24] arm: [MVE intrinsics] rework vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-21-christophe.lyon@arm.com/mbox/"},{"id":92520,"url":"https://patchwork.plctlab.org/api/1.2/patches/92520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-22-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:17","name":"[22/24] arm: [MVE intrinsics] add ternary_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-22-christophe.lyon@arm.com/mbox/"},{"id":92531,"url":"https://patchwork.plctlab.org/api/1.2/patches/92531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-23-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:18","name":"[23/24] arm: [MVE intrinsics] factorize vmlaq_n vmlasq_n vqdmlahq_n vqdmlashq_n vqrdmlahq_n vqrdmlashq_n","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-23-christophe.lyon@arm.com/mbox/"},{"id":92548,"url":"https://patchwork.plctlab.org/api/1.2/patches/92548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-24-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-24-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:19","name":"[24/24] arm: [MVE intrinsics] rework vmlaq vmlasq vqdmlahq vqdmlashq vqrdmlahq vqrdmlashq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-24-christophe.lyon@arm.com/mbox/"},{"id":92549,"url":"https://patchwork.plctlab.org/api/1.2/patches/92549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511122641.2323840-1-pan2.li@intel.com/","msgid":"<20230511122641.2323840-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T12:26:41","name":"[committed] RISC-V: Update RVV integer compare simplification comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511122641.2323840-1-pan2.li@intel.com/mbox/"},{"id":92550,"url":"https://patchwork.plctlab.org/api/1.2/patches/92550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com/","msgid":"<2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com>","list_archive_url":null,"date":"2023-05-11T12:33:09","name":"[Commited] MAINTAINERS: Fix alphabetic sorting.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com/mbox/"},{"id":92555,"url":"https://patchwork.plctlab.org/api/1.2/patches/92555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com/","msgid":"<3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com>","list_archive_url":null,"date":"2023-05-11T12:47:24","name":"[v2] RISC-V: Allow vector constants in riscv_const_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com/mbox/"},{"id":92556,"url":"https://patchwork.plctlab.org/api/1.2/patches/92556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511125404.2504388-1-pan2.li@intel.com/","msgid":"<20230511125404.2504388-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T12:54:04","name":"[v6] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511125404.2504388-1-pan2.li@intel.com/mbox/"},{"id":92642,"url":"https://patchwork.plctlab.org/api/1.2/patches/92642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com/","msgid":"<02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-11T14:21:41","name":"[x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com/mbox/"},{"id":92658,"url":"https://patchwork.plctlab.org/api/1.2/patches/92658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511144027.593130-1-ppalka@redhat.com/","msgid":"<20230511144027.593130-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-11T14:40:27","name":"[pushed] c++: Add testcase for already fixed PR [PR103807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511144027.593130-1-ppalka@redhat.com/mbox/"},{"id":92694,"url":"https://patchwork.plctlab.org/api/1.2/patches/92694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511151719.1394582-1-apinski@marvell.com/","msgid":"<20230511151719.1394582-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-11T15:17:19","name":"Improve simple_dce for phis that only used in itself","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511151719.1394582-1-apinski@marvell.com/mbox/"},{"id":92697,"url":"https://patchwork.plctlab.org/api/1.2/patches/92697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511152356.2116735-1-lili.cui@intel.com/","msgid":"<20230511152356.2116735-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T15:23:56","name":"[PATCH1/2] PR gcc/98350:Add a param to control the length of the chain with FMA in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511152356.2116735-1-lili.cui@intel.com/mbox/"},{"id":92720,"url":"https://patchwork.plctlab.org/api/1.2/patches/92720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511155317.1002581-1-jwakely@redhat.com/","msgid":"<20230511155317.1002581-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T15:53:17","name":"[wwwdocs] Document libstdc++ freestanding changes in gcc-13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511155317.1002581-1-jwakely@redhat.com/mbox/"},{"id":92722,"url":"https://patchwork.plctlab.org/api/1.2/patches/92722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511162738.1482389-1-juzhe.zhong@rivai.ai/","msgid":"<20230511162738.1482389-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T16:27:38","name":"[V5] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511162738.1482389-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92741,"url":"https://patchwork.plctlab.org/api/1.2/patches/92741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXUP=a+EtCxoPUJV_wuTsrPdhyE6QWxw0vyDmmEUsGGvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T16:54:07","name":"libgo patch committed: Add syscall.prlimit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXUP=a+EtCxoPUJV_wuTsrPdhyE6QWxw0vyDmmEUsGGvw@mail.gmail.com/mbox/"},{"id":92806,"url":"https://patchwork.plctlab.org/api/1.2/patches/92806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511182555.26183-1-palmer@rivosinc.com/","msgid":"<20230511182555.26183-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-05-11T18:25:56","name":"RISC-V: Add v_uimm_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511182555.26183-1-palmer@rivosinc.com/mbox/"},{"id":92812,"url":"https://patchwork.plctlab.org/api/1.2/patches/92812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511183006.1565721-1-ppalka@redhat.com/","msgid":"<20230511183006.1565721-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-11T18:30:06","name":"c++: '\''mutable'\'' subobject of constexpr variable [PR109745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511183006.1565721-1-ppalka@redhat.com/mbox/"},{"id":92821,"url":"https://patchwork.plctlab.org/api/1.2/patches/92821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bY-ChBDrQ0SG+KkCGpZZ_74+PFr8sTVGNWzzWKvmbMkg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T18:56:30","name":"i386: Handle V4HI and V2SImode in ix86_widen_mult_cost [PR109807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bY-ChBDrQ0SG+KkCGpZZ_74+PFr8sTVGNWzzWKvmbMkg@mail.gmail.com/mbox/"},{"id":92844,"url":"https://patchwork.plctlab.org/api/1.2/patches/92844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511201847.1056247-1-jwakely@redhat.com/","msgid":"<20230511201847.1056247-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:18:47","name":"[committed] libstdc++: Enforce value_type consistency in strings and streams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511201847.1056247-1-jwakely@redhat.com/mbox/"},{"id":92845,"url":"https://patchwork.plctlab.org/api/1.2/patches/92845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202029.1058974-1-jwakely@redhat.com/","msgid":"<20230511202029.1058974-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:20:29","name":"[committed] libstdc++: Fix chrono::hh_mm_ss::subseconds() [PR109772]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202029.1058974-1-jwakely@redhat.com/mbox/"},{"id":92846,"url":"https://patchwork.plctlab.org/api/1.2/patches/92846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202125.1059353-1-jwakely@redhat.com/","msgid":"<20230511202125.1059353-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:21:25","name":"[committed] libstdc++: Use RAII types in strtod-based std::from_chars implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202125.1059353-1-jwakely@redhat.com/mbox/"},{"id":92847,"url":"https://patchwork.plctlab.org/api/1.2/patches/92847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4n6MiTz2iV5Ef9HoupLdub65_A8MbY_1dmg+7sLKOOKCQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T20:52:22","name":"[v2] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4n6MiTz2iV5Ef9HoupLdub65_A8MbY_1dmg+7sLKOOKCQ@mail.gmail.com/mbox/"},{"id":92868,"url":"https://patchwork.plctlab.org/api/1.2/patches/92868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511222848.15044-1-palmer@rivosinc.com/","msgid":"<20230511222848.15044-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-05-11T22:28:49","name":"[v2] RISC-V: Add vector_scalar_shift_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511222848.15044-1-palmer@rivosinc.com/mbox/"},{"id":92870,"url":"https://patchwork.plctlab.org/api/1.2/patches/92870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511231126.1594132-1-juzhe.zhong@rivai.ai/","msgid":"<20230511231126.1594132-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:11:26","name":"[V6] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511231126.1594132-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92875,"url":"https://patchwork.plctlab.org/api/1.2/patches/92875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232916.1596624-1-juzhe.zhong@rivai.ai/","msgid":"<20230511232916.1596624-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:29:16","name":"RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232916.1596624-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92876,"url":"https://patchwork.plctlab.org/api/1.2/patches/92876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232933.1596663-1-juzhe.zhong@rivai.ai/","msgid":"<20230511232933.1596663-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:29:33","name":"RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232933.1596663-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92904,"url":"https://patchwork.plctlab.org/api/1.2/patches/92904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512010247.116026-1-juzhe.zhong@rivai.ai/","msgid":"<20230512010247.116026-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T01:02:47","name":"RISC-V: Reorganize binary autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512010247.116026-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92906,"url":"https://patchwork.plctlab.org/api/1.2/patches/92906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512013112.276462-1-juzhe.zhong@rivai.ai/","msgid":"<20230512013112.276462-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T01:31:12","name":"[V2] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512013112.276462-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92907,"url":"https://patchwork.plctlab.org/api/1.2/patches/92907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512014257.4187492-1-pan2.li@intel.com/","msgid":"<20230512014257.4187492-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T01:42:57","name":"[committed] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512014257.4187492-1-pan2.li@intel.com/mbox/"},{"id":92923,"url":"https://patchwork.plctlab.org/api/1.2/patches/92923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512022432.207773-1-pan2.li@intel.com/","msgid":"<20230512022432.207773-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T02:24:32","name":"[committed] RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512022432.207773-1-pan2.li@intel.com/mbox/"},{"id":92925,"url":"https://patchwork.plctlab.org/api/1.2/patches/92925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512023253.219569-1-pan2.li@intel.com/","msgid":"<20230512023253.219569-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T02:32:53","name":"[committed] RISC-V: Reorganize binary autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512023253.219569-1-pan2.li@intel.com/mbox/"},{"id":92929,"url":"https://patchwork.plctlab.org/api/1.2/patches/92929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512025645.141049-1-juzhe.zhong@rivai.ai/","msgid":"<20230512025645.141049-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T02:56:45","name":"[V3] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512025645.141049-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92933,"url":"https://patchwork.plctlab.org/api/1.2/patches/92933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512031045.199419-1-juzhe.zhong@rivai.ai/","msgid":"<20230512031045.199419-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T03:10:45","name":"RISC-V: Fix fail of vmv-imm-rv64.c in rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512031045.199419-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92939,"url":"https://patchwork.plctlab.org/api/1.2/patches/92939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512050016.476110-1-pan2.li@intel.com/","msgid":"<20230512050016.476110-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T05:00:16","name":"Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512050016.476110-1-pan2.li@intel.com/mbox/"},{"id":92940,"url":"https://patchwork.plctlab.org/api/1.2/patches/92940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512054213.2211594-1-hongtao.liu@intel.com/","msgid":"<20230512054213.2211594-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-12T05:42:13","name":"Provide -fcf-protection=branch,return.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512054213.2211594-1-hongtao.liu@intel.com/mbox/"},{"id":92948,"url":"https://patchwork.plctlab.org/api/1.2/patches/92948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:47","name":"[v2,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92951,"url":"https://patchwork.plctlab.org/api/1.2/patches/92951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:49","name":"[v2,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92952,"url":"https://patchwork.plctlab.org/api/1.2/patches/92952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:50","name":"[v2,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92955,"url":"https://patchwork.plctlab.org/api/1.2/patches/92955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:51","name":"[v2,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92953,"url":"https://patchwork.plctlab.org/api/1.2/patches/92953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:53","name":"[v2,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92954,"url":"https://patchwork.plctlab.org/api/1.2/patches/92954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:55","name":"[v2,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92947,"url":"https://patchwork.plctlab.org/api/1.2/patches/92947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:56","name":"[v2,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92949,"url":"https://patchwork.plctlab.org/api/1.2/patches/92949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:58","name":"[v2,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92956,"url":"https://patchwork.plctlab.org/api/1.2/patches/92956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:59","name":"[v2,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92979,"url":"https://patchwork.plctlab.org/api/1.2/patches/92979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6si9fiv.fsf@euler.schwinge.homeip.net/","msgid":"<87h6si9fiv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T07:26:32","name":"libgomp testsuite: Generalize '\''lang_library_path'\'' into a list of '\''lang_library_paths'\'' (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6si9fiv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":92997,"url":"https://patchwork.plctlab.org/api/1.2/patches/92997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkiq9cpa.fsf@euler.schwinge.homeip.net/","msgid":"<87bkiq9cpa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T08:27:29","name":"libgomp testsuite: Have each '\''*.exp'\'' file specify the compiler to use [PR91884] (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkiq9cpa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":93001,"url":"https://patchwork.plctlab.org/api/1.2/patches/93001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cte9cfa.fsf@euler.schwinge.homeip.net/","msgid":"<877cte9cfa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T08:33:29","name":"libgomp testsuite: As appropriate, use the '\''gcc'\'', '\''g++'\'', '\''gfortran'\'' driver [PR91884] (was: libgomp testsuite: Have each '\''*.exp'\'' file specify the compiler to use [PR91884] (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cte9cfa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":93005,"url":"https://patchwork.plctlab.org/api/1.2/patches/93005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512085802.84994-1-kito.cheng@sifive.com/","msgid":"<20230512085802.84994-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T08:58:02","name":"[committed] RISC-V: Suppress unused parameter warning in riscv-common.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512085802.84994-1-kito.cheng@sifive.com/mbox/"},{"id":93012,"url":"https://patchwork.plctlab.org/api/1.2/patches/93012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512090443.34123-2-gaofei@eswincomputing.com/","msgid":"<20230512090443.34123-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-12T09:04:43","name":"[1/1,V2,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512090443.34123-2-gaofei@eswincomputing.com/mbox/"},{"id":93026,"url":"https://patchwork.plctlab.org/api/1.2/patches/93026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-1-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:30","name":"[01/26] arm: [MVE intrinsics] add binary_widen_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-1-christophe.lyon@arm.com/mbox/"},{"id":93043,"url":"https://patchwork.plctlab.org/api/1.2/patches/93043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-2-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:31","name":"[02/26] arm: [MVE intrinsics] factorize vqdmullbq vqdmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-2-christophe.lyon@arm.com/mbox/"},{"id":93036,"url":"https://patchwork.plctlab.org/api/1.2/patches/93036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-3-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:32","name":"[03/26] arm: [MVE intrinsics] rework vqdmullbq vqdmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-3-christophe.lyon@arm.com/mbox/"},{"id":93037,"url":"https://patchwork.plctlab.org/api/1.2/patches/93037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-4-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:33","name":"[04/26] arm: [MVE intrinsics] factorize vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-4-christophe.lyon@arm.com/mbox/"},{"id":93035,"url":"https://patchwork.plctlab.org/api/1.2/patches/93035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-5-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:34","name":"[05/26] arm: [MVE intrinsics] rework vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-5-christophe.lyon@arm.com/mbox/"},{"id":93028,"url":"https://patchwork.plctlab.org/api/1.2/patches/93028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-6-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:35","name":"[06/26] arm: [MVE intrinsics] add binary_lshift_unsigned shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-6-christophe.lyon@arm.com/mbox/"},{"id":93027,"url":"https://patchwork.plctlab.org/api/1.2/patches/93027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-7-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:36","name":"[07/26] arm: [MVE intrinsics] factorize vqshluq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-7-christophe.lyon@arm.com/mbox/"},{"id":93048,"url":"https://patchwork.plctlab.org/api/1.2/patches/93048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-8-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:37","name":"[08/26] arm: [MVE intrinsics] rework vqshluq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-8-christophe.lyon@arm.com/mbox/"},{"id":93025,"url":"https://patchwork.plctlab.org/api/1.2/patches/93025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-9-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:38","name":"[09/26] arm: [MVE intrinsics] add binary_imm32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-9-christophe.lyon@arm.com/mbox/"},{"id":93044,"url":"https://patchwork.plctlab.org/api/1.2/patches/93044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-10-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:39","name":"[10/26] arm: [MVE intrinsics] factorize vrbsrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-10-christophe.lyon@arm.com/mbox/"},{"id":93039,"url":"https://patchwork.plctlab.org/api/1.2/patches/93039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-11-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:40","name":"[11/26] arm: [MVE intrinsics] rework vbrsrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-11-christophe.lyon@arm.com/mbox/"},{"id":93052,"url":"https://patchwork.plctlab.org/api/1.2/patches/93052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-12-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:41","name":"[12/26] arm: [MVE intrinsics] add mvn shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-12-christophe.lyon@arm.com/mbox/"},{"id":93047,"url":"https://patchwork.plctlab.org/api/1.2/patches/93047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-13-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:42","name":"[13/26] arm: [MVE intrinsics] factorize vmvnq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-13-christophe.lyon@arm.com/mbox/"},{"id":93053,"url":"https://patchwork.plctlab.org/api/1.2/patches/93053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-14-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:43","name":"[14/26] arm: [MVE intrinsics] rework vmvnq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-14-christophe.lyon@arm.com/mbox/"},{"id":93049,"url":"https://patchwork.plctlab.org/api/1.2/patches/93049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-15-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:44","name":"[15/26] arm: [MVE intrinsics] add ternary_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-15-christophe.lyon@arm.com/mbox/"},{"id":93059,"url":"https://patchwork.plctlab.org/api/1.2/patches/93059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-16-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:45","name":"[16/26] arm: [MVE intrinsics] factorize vfmaq vfmsq vfmasq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-16-christophe.lyon@arm.com/mbox/"},{"id":93055,"url":"https://patchwork.plctlab.org/api/1.2/patches/93055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-17-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:46","name":"[17/26] arm: [MVE intrinsics] rework vfmaq vfmasq vfmsq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-17-christophe.lyon@arm.com/mbox/"},{"id":93051,"url":"https://patchwork.plctlab.org/api/1.2/patches/93051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-18-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:47","name":"[18/26] arm: [MVE intrinsics] factorize vpselq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-18-christophe.lyon@arm.com/mbox/"},{"id":93042,"url":"https://patchwork.plctlab.org/api/1.2/patches/93042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-19-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:48","name":"[19/26] arm: [MVE intrinsics] add vpsel shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-19-christophe.lyon@arm.com/mbox/"},{"id":93056,"url":"https://patchwork.plctlab.org/api/1.2/patches/93056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-20-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:49","name":"[20/26] arm: [MVE intrinsics] rework vpselq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-20-christophe.lyon@arm.com/mbox/"},{"id":93054,"url":"https://patchwork.plctlab.org/api/1.2/patches/93054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-21-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:50","name":"[21/26] arm: [MVE intrinsics] add ternary_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-21-christophe.lyon@arm.com/mbox/"},{"id":93045,"url":"https://patchwork.plctlab.org/api/1.2/patches/93045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-22-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:51","name":"[22/26] arm: [MVE intrinsics] factorize vsliq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-22-christophe.lyon@arm.com/mbox/"},{"id":93046,"url":"https://patchwork.plctlab.org/api/1.2/patches/93046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-23-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:52","name":"[23/26] arm: [MVE intrinsics] rework vsliq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-23-christophe.lyon@arm.com/mbox/"},{"id":93050,"url":"https://patchwork.plctlab.org/api/1.2/patches/93050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-24-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-24-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:53","name":"[24/26] arm: [MVE intrinsics] add ternary_rshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-24-christophe.lyon@arm.com/mbox/"},{"id":93058,"url":"https://patchwork.plctlab.org/api/1.2/patches/93058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-25-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-25-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:54","name":"[25/26] arm: [MVE intrinsics] factorize vsriq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-25-christophe.lyon@arm.com/mbox/"},{"id":93061,"url":"https://patchwork.plctlab.org/api/1.2/patches/93061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-26-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-26-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:55","name":"[26/26] arm: [MVE intrinsics] rework vsriq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-26-christophe.lyon@arm.com/mbox/"},{"id":93073,"url":"https://patchwork.plctlab.org/api/1.2/patches/93073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512100327.1941926-1-yunqiang.su@cipunited.com/","msgid":"<20230512100327.1941926-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-12T10:03:27","name":"[v3] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512100327.1941926-1-yunqiang.su@cipunited.com/mbox/"},{"id":93111,"url":"https://patchwork.plctlab.org/api/1.2/patches/93111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512103006.1944244-1-yunqiang.su@cipunited.com/","msgid":"<20230512103006.1944244-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-12T10:30:06","name":"[v4] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512103006.1944244-1-yunqiang.su@cipunited.com/mbox/"},{"id":93125,"url":"https://patchwork.plctlab.org/api/1.2/patches/93125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512104412.170581-1-juzhe.zhong@rivai.ai/","msgid":"<20230512104412.170581-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T10:44:12","name":"RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512104412.170581-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93142,"url":"https://patchwork.plctlab.org/api/1.2/patches/93142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512114759.DA50A13499@imap2.suse-dmz.suse.de/","msgid":"<20230512114759.DA50A13499@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-12T11:47:59","name":"tree-optimization/109791 - simplify (unsigned)&foo - (unsigned)(&foo + o)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512114759.DA50A13499@imap2.suse-dmz.suse.de/mbox/"},{"id":93144,"url":"https://patchwork.plctlab.org/api/1.2/patches/93144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512120247.3213280-1-julian@codesourcery.com/","msgid":"<20230512120247.3213280-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-05-12T12:02:47","name":"OpenMP: Constructors and destructors for \"declare target\" static aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512120247.3213280-1-julian@codesourcery.com/mbox/"},{"id":93177,"url":"https://patchwork.plctlab.org/api/1.2/patches/93177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-1-ppalka@redhat.com/","msgid":"<20230512123908.1652082-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-12T12:39:07","name":"[pushed] c++: remove redundant testcase [PR83258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-1-ppalka@redhat.com/mbox/"},{"id":93179,"url":"https://patchwork.plctlab.org/api/1.2/patches/93179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-2-ppalka@redhat.com/","msgid":"<20230512123908.1652082-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-12T12:39:08","name":"[pushed] c++: robustify testcase [PR109752]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-2-ppalka@redhat.com/mbox/"},{"id":93182,"url":"https://patchwork.plctlab.org/api/1.2/patches/93182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfc1g1lx.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-05-12T12:45:14","name":"ipa: Self-DCE of uses of removed call LHSs (PR 108007)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfc1g1lx.fsf@suse.cz/mbox/"},{"id":93183,"url":"https://patchwork.plctlab.org/api/1.2/patches/93183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com/","msgid":"<74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com>","list_archive_url":null,"date":"2023-05-12T12:46:21","name":"LTO: Fix writing of toplevel asm with offloading [PR109816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com/mbox/"},{"id":93185,"url":"https://patchwork.plctlab.org/api/1.2/patches/93185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512130414.6D78B13466@imap2.suse-dmz.suse.de/","msgid":"<20230512130414.6D78B13466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-12T13:04:14","name":"tree-optimization/64731 - extend store-from CTOR lowering to TARGET_MEM_REF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512130414.6D78B13466@imap2.suse-dmz.suse.de/mbox/"},{"id":93205,"url":"https://patchwork.plctlab.org/api/1.2/patches/93205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512132813.58106-1-kito.cheng@sifive.com/","msgid":"<20230512132813.58106-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T13:28:14","name":"[committed,v4] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512132813.58106-1-kito.cheng@sifive.com/mbox/"},{"id":93206,"url":"https://patchwork.plctlab.org/api/1.2/patches/93206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512133254.59478-1-kito.cheng@sifive.com/","msgid":"<20230512133254.59478-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T13:32:54","name":"RISC-V: Improve vector_insn_info::dump for LMUL and policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512133254.59478-1-kito.cheng@sifive.com/mbox/"},{"id":93208,"url":"https://patchwork.plctlab.org/api/1.2/patches/93208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134431.1289116-1-jwakely@redhat.com/","msgid":"<20230512134431.1289116-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:31","name":"[committed] libstdc++: Remove test dependencies on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134431.1289116-1-jwakely@redhat.com/mbox/"},{"id":93210,"url":"https://patchwork.plctlab.org/api/1.2/patches/93210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134435.1291779-1-jwakely@redhat.com/","msgid":"<20230512134435.1291779-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:35","name":"[committed] libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134435.1291779-1-jwakely@redhat.com/mbox/"},{"id":93209,"url":"https://patchwork.plctlab.org/api/1.2/patches/93209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134439.1291794-1-jwakely@redhat.com/","msgid":"<20230512134439.1291794-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:39","name":"[committed] libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134439.1291794-1-jwakely@redhat.com/mbox/"},{"id":93227,"url":"https://patchwork.plctlab.org/api/1.2/patches/93227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512145940.587528-1-juzhe.zhong@rivai.ai/","msgid":"<20230512145940.587528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T14:59:40","name":"[V2] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512145940.587528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93256,"url":"https://patchwork.plctlab.org/api/1.2/patches/93256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153828.604848-1-juzhe.zhong@rivai.ai/","msgid":"<20230512153828.604848-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T15:38:28","name":"[V3] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153828.604848-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93257,"url":"https://patchwork.plctlab.org/api/1.2/patches/93257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153839.1106908-1-pan2.li@intel.com/","msgid":"<20230512153839.1106908-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T15:38:39","name":"[v2] Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153839.1106908-1-pan2.li@intel.com/mbox/"},{"id":93261,"url":"https://patchwork.plctlab.org/api/1.2/patches/93261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512154655.613780-1-juzhe.zhong@rivai.ai/","msgid":"<20230512154655.613780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T15:46:55","name":"[V4] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512154655.613780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93280,"url":"https://patchwork.plctlab.org/api/1.2/patches/93280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z7q=6W_0Y2Xe0ZpWdHr+5-v4h+ZpDR7ekj_L3zDDXWOA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-12T16:43:50","name":"i386: Remove mulv2si emulated sequence for TARGET_SSE2 [PR109797]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z7q=6W_0Y2Xe0ZpWdHr+5-v4h+ZpDR7ekj_L3zDDXWOA@mail.gmail.com/mbox/"},{"id":93282,"url":"https://patchwork.plctlab.org/api/1.2/patches/93282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164838.1303266-1-jwakely@redhat.com/","msgid":"<20230512164838.1303266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:38","name":"[committed] libstdc++: Remove dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164838.1303266-1-jwakely@redhat.com/mbox/"},{"id":93283,"url":"https://patchwork.plctlab.org/api/1.2/patches/93283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164843.1303299-1-jwakely@redhat.com/","msgid":"<20230512164843.1303299-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:43","name":"[committed] libstdc++: Reduce dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164843.1303299-1-jwakely@redhat.com/mbox/"},{"id":93281,"url":"https://patchwork.plctlab.org/api/1.2/patches/93281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164849.1303313-1-jwakely@redhat.com/","msgid":"<20230512164849.1303313-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:49","name":"[committed] libstdc++: Remove redundant dependencies on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164849.1303313-1-jwakely@redhat.com/mbox/"},{"id":93284,"url":"https://patchwork.plctlab.org/api/1.2/patches/93284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164914.1303446-1-jwakely@redhat.com/","msgid":"<20230512164914.1303446-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:49:14","name":"[committed] libstdc++: Fix -Wnonnull warnings during configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164914.1303446-1-jwakely@redhat.com/mbox/"},{"id":93296,"url":"https://patchwork.plctlab.org/api/1.2/patches/93296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YvvcZRNkF8D8xPd-HgmcRE_2GWdv1ntM8yzqpSgLw0kA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-12T17:52:17","name":"i386: Cleanup ix86_expand_vecop_qihi{,2}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YvvcZRNkF8D8xPd-HgmcRE_2GWdv1ntM8yzqpSgLw0kA@mail.gmail.com/mbox/"},{"id":93341,"url":"https://patchwork.plctlab.org/api/1.2/patches/93341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512200527.B9B1133E96@hamza.pair.com/","msgid":"<20230512200527.B9B1133E96@hamza.pair.com>","list_archive_url":null,"date":"2023-05-12T20:05:24","name":"[pushed] wwwdocs: gcc-13/buildstat: Remove trace of XHTML","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512200527.B9B1133E96@hamza.pair.com/mbox/"},{"id":93369,"url":"https://patchwork.plctlab.org/api/1.2/patches/93369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512205332.1781029-1-jason@redhat.com/","msgid":"<20230512205332.1781029-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-12T20:53:32","name":"[RFC] c-family: make -fno-permissive upgrade pedwarns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512205332.1781029-1-jason@redhat.com/mbox/"},{"id":93443,"url":"https://patchwork.plctlab.org/api/1.2/patches/93443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513002026.321317-1-juzhe.zhong@rivai.ai/","msgid":"<20230513002026.321317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T00:20:26","name":"[V5] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513002026.321317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93473,"url":"https://patchwork.plctlab.org/api/1.2/patches/93473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513020859.13485-1-juzhe.zhong@rivai.ai/","msgid":"<20230513020859.13485-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T02:08:59","name":"RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513020859.13485-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93475,"url":"https://patchwork.plctlab.org/api/1.2/patches/93475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513030822.1481372-1-apinski@marvell.com/","msgid":"<20230513030822.1481372-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-13T03:08:22","name":"MATCH: Fix PR 109834, ICE with popcount combined with bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513030822.1481372-1-apinski@marvell.com/mbox/"},{"id":93478,"url":"https://patchwork.plctlab.org/api/1.2/patches/93478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513061719.63705-1-kito.cheng@sifive.com/","msgid":"<20230513061719.63705-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-13T06:17:19","name":"[committed] RISC-V: Pull out function call with side effect from gcc_assert.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513061719.63705-1-kito.cheng@sifive.com/mbox/"},{"id":93493,"url":"https://patchwork.plctlab.org/api/1.2/patches/93493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513092042.3927038-1-hongtao.liu@intel.com/","msgid":"<20230513092042.3927038-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-13T09:20:42","name":"[V2] Provide -fcf-protection=branch,return.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513092042.3927038-1-hongtao.liu@intel.com/mbox/"},{"id":93511,"url":"https://patchwork.plctlab.org/api/1.2/patches/93511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513114421.196081-1-juzhe.zhong@rivai.ai/","msgid":"<20230513114421.196081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T11:44:21","name":"RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513114421.196081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93526,"url":"https://patchwork.plctlab.org/api/1.2/patches/93526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513131325.1667305-1-pan2.li@intel.com/","msgid":"<20230513131325.1667305-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-13T13:13:25","name":"[v3] Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513131325.1667305-1-pan2.li@intel.com/mbox/"},{"id":93630,"url":"https://patchwork.plctlab.org/api/1.2/patches/93630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-2-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:08","name":"[01/14] ada: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-2-rep.dot.nop@gmail.com/mbox/"},{"id":93621,"url":"https://patchwork.plctlab.org/api/1.2/patches/93621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-3-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-3-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:09","name":"[02/14] analyzer: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-3-rep.dot.nop@gmail.com/mbox/"},{"id":93628,"url":"https://patchwork.plctlab.org/api/1.2/patches/93628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-4-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-4-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:10","name":"[03/14] gcc/config/*: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-4-rep.dot.nop@gmail.com/mbox/"},{"id":93629,"url":"https://patchwork.plctlab.org/api/1.2/patches/93629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-5-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-5-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:11","name":"[04/14] c++: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-5-rep.dot.nop@gmail.com/mbox/"},{"id":93626,"url":"https://patchwork.plctlab.org/api/1.2/patches/93626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-6-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-6-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:12","name":"[05/14] m2: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-6-rep.dot.nop@gmail.com/mbox/"},{"id":93634,"url":"https://patchwork.plctlab.org/api/1.2/patches/93634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-7-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-7-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:13","name":"[06/14] lto: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-7-rep.dot.nop@gmail.com/mbox/"},{"id":93620,"url":"https://patchwork.plctlab.org/api/1.2/patches/93620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-8-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-8-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:14","name":"[07/14] d: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-8-rep.dot.nop@gmail.com/mbox/"},{"id":93627,"url":"https://patchwork.plctlab.org/api/1.2/patches/93627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-9-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-9-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:15","name":"[08/14] fortran: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-9-rep.dot.nop@gmail.com/mbox/"},{"id":93631,"url":"https://patchwork.plctlab.org/api/1.2/patches/93631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-10-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-10-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:16","name":"[09/14] rust: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-10-rep.dot.nop@gmail.com/mbox/"},{"id":93622,"url":"https://patchwork.plctlab.org/api/1.2/patches/93622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-11-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-11-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:17","name":"[10/14] c: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-11-rep.dot.nop@gmail.com/mbox/"},{"id":93625,"url":"https://patchwork.plctlab.org/api/1.2/patches/93625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-12-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-12-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:18","name":"[11/14] objc: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-12-rep.dot.nop@gmail.com/mbox/"},{"id":93624,"url":"https://patchwork.plctlab.org/api/1.2/patches/93624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-13-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-13-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:19","name":"[12/14] go: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-13-rep.dot.nop@gmail.com/mbox/"},{"id":93623,"url":"https://patchwork.plctlab.org/api/1.2/patches/93623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-14-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-14-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:20","name":"[13/14] omp: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-14-rep.dot.nop@gmail.com/mbox/"},{"id":93633,"url":"https://patchwork.plctlab.org/api/1.2/patches/93633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-15-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-15-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:21","name":"[14/14] gcc: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-15-rep.dot.nop@gmail.com/mbox/"},{"id":93638,"url":"https://patchwork.plctlab.org/api/1.2/patches/93638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514031258.1542461-1-apinski@marvell.com/","msgid":"<20230514031258.1542461-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-14T03:12:58","name":"MATCH: Add pattern for `signbit(x) ? x : -x` into abs (and swapped)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514031258.1542461-1-apinski@marvell.com/mbox/"},{"id":93655,"url":"https://patchwork.plctlab.org/api/1.2/patches/93655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514082113.3487198-1-pan2.li@intel.com/","msgid":"<20230514082113.3487198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-14T08:21:13","name":"RISC-V: Refactor the or pattern to switch cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514082113.3487198-1-pan2.li@intel.com/mbox/"},{"id":93733,"url":"https://patchwork.plctlab.org/api/1.2/patches/93733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net/","msgid":"<2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net>","list_archive_url":null,"date":"2023-05-14T16:09:35","name":"Fix assertion for unwind-dw2-fde.c btree changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net/mbox/"},{"id":93753,"url":"https://patchwork.plctlab.org/api/1.2/patches/93753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z5J39bZ+prm87jyzfBHReNbFymYecFv7hwvO4+wH---w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-14T19:55:16","name":"i386: Handle unsupported modes from ix86_widen_mult_cost [PR109807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z5J39bZ+prm87jyzfBHReNbFymYecFv7hwvO4+wH---w@mail.gmail.com/mbox/"},{"id":93755,"url":"https://patchwork.plctlab.org/api/1.2/patches/93755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2b29de67-6497-40b6-bc2d-2ff749ab4d90-1684094665147@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2023-05-14T20:04:25","name":"Fortran: CLASS pointer function result in variable definition context [PR109846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2b29de67-6497-40b6-bc2d-2ff749ab4d90-1684094665147@3c-app-gmx-bs49/mbox/"},{"id":93777,"url":"https://patchwork.plctlab.org/api/1.2/patches/93777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515012844.183599-1-juzhe.zhong@rivai.ai/","msgid":"<20230515012844.183599-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T01:28:44","name":"[V7] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515012844.183599-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93796,"url":"https://patchwork.plctlab.org/api/1.2/patches/93796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515022647.182902-1-juzhe.zhong@rivai.ai/","msgid":"<20230515022647.182902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T02:26:47","name":"RISC-V: Add VECTOR_ALIGNMENT_REACHABLE && BUILTIN_VECTORIZATION_COST target hook to optimize RVV VLS auto-vectorization codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515022647.182902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93828,"url":"https://patchwork.plctlab.org/api/1.2/patches/93828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031452.2154535-1-pan2.li@intel.com/","msgid":"<20230515031452.2154535-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-15T03:14:52","name":"RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031452.2154535-1-pan2.li@intel.com/mbox/"},{"id":93829,"url":"https://patchwork.plctlab.org/api/1.2/patches/93829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031514.241945-1-juzhe.zhong@rivai.ai/","msgid":"<20230515031514.241945-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T03:15:14","name":"RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA && VLS auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031514.241945-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93830,"url":"https://patchwork.plctlab.org/api/1.2/patches/93830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031549.242051-1-juzhe.zhong@rivai.ai/","msgid":"<20230515031549.242051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T03:15:49","name":"[V2] RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA && VLS auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031549.242051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93852,"url":"https://patchwork.plctlab.org/api/1.2/patches/93852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com/","msgid":"<595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com>","list_archive_url":null,"date":"2023-05-15T05:06:03","name":"[Testsuite] Skip -fdelete-null-pointer-check tests if target keeps_null_pointer_checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com/mbox/"},{"id":93928,"url":"https://patchwork.plctlab.org/api/1.2/patches/93928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-2-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:36","name":"[1/3] s390: Refactor block operation cpymem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-2-stefansf@linux.ibm.com/mbox/"},{"id":93927,"url":"https://patchwork.plctlab.org/api/1.2/patches/93927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-3-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-3-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:37","name":"[2/3] s390: Add block operation movmem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-3-stefansf@linux.ibm.com/mbox/"},{"id":93932,"url":"https://patchwork.plctlab.org/api/1.2/patches/93932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-4-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-4-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:38","name":"[3/3] s390: Refactor block operation setmem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-4-stefansf@linux.ibm.com/mbox/"},{"id":93955,"url":"https://patchwork.plctlab.org/api/1.2/patches/93955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515081725.106136-1-juzhe.zhong@rivai.ai/","msgid":"<20230515081725.106136-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T08:17:25","name":"RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515081725.106136-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93956,"url":"https://patchwork.plctlab.org/api/1.2/patches/93956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082137.4BC95138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515082137.4BC95138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:21:36","name":"Fix gcc.dg/vect/pr108950.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082137.4BC95138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93960,"url":"https://patchwork.plctlab.org/api/1.2/patches/93960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082406.A92BA138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515082406.A92BA138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:24:06","name":"[GCC,12] testsuite/108776 - avoid c-c++-common/rotate-11.c FAIL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082406.A92BA138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93968,"url":"https://patchwork.plctlab.org/api/1.2/patches/93968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515083305.2656202-1-pan2.li@intel.com/","msgid":"<20230515083305.2656202-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-15T08:33:05","name":"[v2] RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515083305.2656202-1-pan2.li@intel.com/mbox/"},{"id":93969,"url":"https://patchwork.plctlab.org/api/1.2/patches/93969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515084047.475AF138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515084047.475AF138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:40:46","name":"tree-optimization/109848 - fix TARGET_MEM_REF store from CTOR simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515084047.475AF138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93973,"url":"https://patchwork.plctlab.org/api/1.2/patches/93973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515085146.281004-1-juzhe.zhong@rivai.ai/","msgid":"<20230515085146.281004-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T08:51:46","name":"[V2] RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515085146.281004-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94016,"url":"https://patchwork.plctlab.org/api/1.2/patches/94016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094135.1407003-1-poulhies@adacore.com/","msgid":"<20230515094135.1407003-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:35","name":"[COMMITTED] ada: Fix link to parent when copying with Copy_Separate_Tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094135.1407003-1-poulhies@adacore.com/mbox/"},{"id":94017,"url":"https://patchwork.plctlab.org/api/1.2/patches/94017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094145.1407307-1-poulhies@adacore.com/","msgid":"<20230515094145.1407307-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:45","name":"[COMMITTED] ada: Fix Unchecked_Conversion in edge case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094145.1407307-1-poulhies@adacore.com/mbox/"},{"id":94020,"url":"https://patchwork.plctlab.org/api/1.2/patches/94020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094154.1407371-1-poulhies@adacore.com/","msgid":"<20230515094154.1407371-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:54","name":"[COMMITTED] ada: Reject attribute Initialize on unchecked unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094154.1407371-1-poulhies@adacore.com/mbox/"},{"id":94033,"url":"https://patchwork.plctlab.org/api/1.2/patches/94033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094203.1407440-1-poulhies@adacore.com/","msgid":"<20230515094203.1407440-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:03","name":"[COMMITTED] ada: Skip dynamic interface conversion under native runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094203.1407440-1-poulhies@adacore.com/mbox/"},{"id":94024,"url":"https://patchwork.plctlab.org/api/1.2/patches/94024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094215.1407504-1-poulhies@adacore.com/","msgid":"<20230515094215.1407504-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:15","name":"[COMMITTED] ada: GNAT UGN: Add section documenting PIE being enabled by default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094215.1407504-1-poulhies@adacore.com/mbox/"},{"id":94018,"url":"https://patchwork.plctlab.org/api/1.2/patches/94018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094223.1407571-1-poulhies@adacore.com/","msgid":"<20230515094223.1407571-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:23","name":"[COMMITTED] ada: INOX: prototype RFC on String Interpolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094223.1407571-1-poulhies@adacore.com/mbox/"},{"id":94038,"url":"https://patchwork.plctlab.org/api/1.2/patches/94038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094229.1407641-1-poulhies@adacore.com/","msgid":"<20230515094229.1407641-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:29","name":"[COMMITTED] ada: Allow pragmas Annotate between loop pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094229.1407641-1-poulhies@adacore.com/mbox/"},{"id":94042,"url":"https://patchwork.plctlab.org/api/1.2/patches/94042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094236.1407706-1-poulhies@adacore.com/","msgid":"<20230515094236.1407706-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:36","name":"[COMMITTED] ada: Fix proof of runtime unit System.Value*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094236.1407706-1-poulhies@adacore.com/mbox/"},{"id":94030,"url":"https://patchwork.plctlab.org/api/1.2/patches/94030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094244.1407771-1-poulhies@adacore.com/","msgid":"<20230515094244.1407771-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:44","name":"[COMMITTED] ada: Fix invalid JSON for extended variant record with -gnatRj","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094244.1407771-1-poulhies@adacore.com/mbox/"},{"id":94044,"url":"https://patchwork.plctlab.org/api/1.2/patches/94044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094249.1407836-1-poulhies@adacore.com/","msgid":"<20230515094249.1407836-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:49","name":"[COMMITTED] ada: Fix handling of pragma Warnings (Toolname, Off/On)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094249.1407836-1-poulhies@adacore.com/mbox/"},{"id":94043,"url":"https://patchwork.plctlab.org/api/1.2/patches/94043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094254.1407902-1-poulhies@adacore.com/","msgid":"<20230515094254.1407902-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:54","name":"[COMMITTED] ada: Add Check_Error_Detected before \"raise Bad_Attribute\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094254.1407902-1-poulhies@adacore.com/mbox/"},{"id":94032,"url":"https://patchwork.plctlab.org/api/1.2/patches/94032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094301.1407966-1-poulhies@adacore.com/","msgid":"<20230515094301.1407966-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:01","name":"[COMMITTED] ada: Optimize 2**N to avoid explicit '\''if'\'' in modular case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094301.1407966-1-poulhies@adacore.com/mbox/"},{"id":94040,"url":"https://patchwork.plctlab.org/api/1.2/patches/94040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094310.1408030-1-poulhies@adacore.com/","msgid":"<20230515094310.1408030-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:10","name":"[COMMITTED] ada: Fix minor documentation formatting issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094310.1408030-1-poulhies@adacore.com/mbox/"},{"id":94049,"url":"https://patchwork.plctlab.org/api/1.2/patches/94049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094316.1408094-1-poulhies@adacore.com/","msgid":"<20230515094316.1408094-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:16","name":"[COMMITTED] ada: Improve check of attribute reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094316.1408094-1-poulhies@adacore.com/mbox/"},{"id":94047,"url":"https://patchwork.plctlab.org/api/1.2/patches/94047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094322.1408160-1-poulhies@adacore.com/","msgid":"<20230515094322.1408160-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:22","name":"[COMMITTED] ada: Update comment after SPARK RM change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094322.1408160-1-poulhies@adacore.com/mbox/"},{"id":94048,"url":"https://patchwork.plctlab.org/api/1.2/patches/94048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094329.1408226-1-poulhies@adacore.com/","msgid":"<20230515094329.1408226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:29","name":"[COMMITTED] ada: Emit warnings for (some) ineffective static predicate tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094329.1408226-1-poulhies@adacore.com/mbox/"},{"id":94051,"url":"https://patchwork.plctlab.org/api/1.2/patches/94051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094335.1408296-1-poulhies@adacore.com/","msgid":"<20230515094335.1408296-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:35","name":"[COMMITTED] ada: Accept aggregates with OTHERS clause in unchecked type conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094335.1408296-1-poulhies@adacore.com/mbox/"},{"id":94055,"url":"https://patchwork.plctlab.org/api/1.2/patches/94055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094341.1408360-1-poulhies@adacore.com/","msgid":"<20230515094341.1408360-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:41","name":"[COMMITTED] ada: Simplify lookup of predecessor in homonym chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094341.1408360-1-poulhies@adacore.com/mbox/"},{"id":94052,"url":"https://patchwork.plctlab.org/api/1.2/patches/94052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094346.1408423-1-poulhies@adacore.com/","msgid":"<20230515094346.1408423-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:46","name":"[COMMITTED] ada: Remove redundant protection against empty lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094346.1408423-1-poulhies@adacore.com/mbox/"},{"id":94046,"url":"https://patchwork.plctlab.org/api/1.2/patches/94046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094353.1408487-1-poulhies@adacore.com/","msgid":"<20230515094353.1408487-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:53","name":"[COMMITTED] ada: Fix internal error on instance in package body with -gnatn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094353.1408487-1-poulhies@adacore.com/mbox/"},{"id":94057,"url":"https://patchwork.plctlab.org/api/1.2/patches/94057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094358.1408551-1-poulhies@adacore.com/","msgid":"<20230515094358.1408551-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:58","name":"[COMMITTED] ada: Clean up vanishing entity fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094358.1408551-1-poulhies@adacore.com/mbox/"},{"id":94059,"url":"https://patchwork.plctlab.org/api/1.2/patches/94059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094404.1408615-1-poulhies@adacore.com/","msgid":"<20230515094404.1408615-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:04","name":"[COMMITTED] ada: Improve comment on First_Entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094404.1408615-1-poulhies@adacore.com/mbox/"},{"id":94061,"url":"https://patchwork.plctlab.org/api/1.2/patches/94061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094408.1408681-1-poulhies@adacore.com/","msgid":"<20230515094408.1408681-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:08","name":"[COMMITTED] ada: Remove duplicated code in Proc_Next_Component_Or_Discriminant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094408.1408681-1-poulhies@adacore.com/mbox/"},{"id":94064,"url":"https://patchwork.plctlab.org/api/1.2/patches/94064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094413.1408748-1-poulhies@adacore.com/","msgid":"<20230515094413.1408748-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:13","name":"[COMMITTED] ada: Fix formatting inconsistency in User'\''s Guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094413.1408748-1-poulhies@adacore.com/mbox/"},{"id":94062,"url":"https://patchwork.plctlab.org/api/1.2/patches/94062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094417.1408811-1-poulhies@adacore.com/","msgid":"<20230515094417.1408811-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:17","name":"[COMMITTED] ada: Use Inline aspect instead of pragma in Einfo.Utils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094417.1408811-1-poulhies@adacore.com/mbox/"},{"id":94050,"url":"https://patchwork.plctlab.org/api/1.2/patches/94050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094422.1408878-1-poulhies@adacore.com/","msgid":"<20230515094422.1408878-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:22","name":"[COMMITTED] ada: Fix comment related to inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094422.1408878-1-poulhies@adacore.com/mbox/"},{"id":94067,"url":"https://patchwork.plctlab.org/api/1.2/patches/94067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094425.1408943-1-poulhies@adacore.com/","msgid":"<20230515094425.1408943-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:25","name":"[COMMITTED] ada: Recover proof of Interfaces.C for termination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094425.1408943-1-poulhies@adacore.com/mbox/"},{"id":94068,"url":"https://patchwork.plctlab.org/api/1.2/patches/94068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094429.1409007-1-poulhies@adacore.com/","msgid":"<20230515094429.1409007-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:29","name":"[COMMITTED] ada: Recover proof of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094429.1409007-1-poulhies@adacore.com/mbox/"},{"id":94065,"url":"https://patchwork.plctlab.org/api/1.2/patches/94065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094434.1409071-1-poulhies@adacore.com/","msgid":"<20230515094434.1409071-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:34","name":"[COMMITTED] ada: Add annotations for proof of termination of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094434.1409071-1-poulhies@adacore.com/mbox/"},{"id":94069,"url":"https://patchwork.plctlab.org/api/1.2/patches/94069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094440.1409136-1-poulhies@adacore.com/","msgid":"<20230515094440.1409136-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:40","name":"[COMMITTED] ada: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094440.1409136-1-poulhies@adacore.com/mbox/"},{"id":94084,"url":"https://patchwork.plctlab.org/api/1.2/patches/94084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515102550.228989-1-juzhe.zhong@rivai.ai/","msgid":"<20230515102550.228989-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T10:25:50","name":"[V3] RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515102550.228989-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94090,"url":"https://patchwork.plctlab.org/api/1.2/patches/94090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515103523.100412-1-aldyh@redhat.com/","msgid":"<20230515103523.100412-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-15T10:35:23","name":"Add auto-resizing capability to irange'\''s [PR109695]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515103523.100412-1-aldyh@redhat.com/mbox/"},{"id":94095,"url":"https://patchwork.plctlab.org/api/1.2/patches/94095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515114932.244397-1-juzhe.zhong@rivai.ai/","msgid":"<20230515114932.244397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T11:49:32","name":"RISC-V: Add rounding mode operand for floating point instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515114932.244397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94107,"url":"https://patchwork.plctlab.org/api/1.2/patches/94107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515121617.280113-1-juzhe.zhong@rivai.ai/","msgid":"<20230515121617.280113-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:16:17","name":"RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515121617.280113-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94109,"url":"https://patchwork.plctlab.org/api/1.2/patches/94109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-1-juzhe.zhong@rivai.ai/","msgid":"<20230515122235.293830-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:22:34","name":"OPTABS: Extend the number of expanding instructions pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94108,"url":"https://patchwork.plctlab.org/api/1.2/patches/94108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-2-juzhe.zhong@rivai.ai/","msgid":"<20230515122235.293830-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:22:35","name":"RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-2-juzhe.zhong@rivai.ai/mbox/"},{"id":94136,"url":"https://patchwork.plctlab.org/api/1.2/patches/94136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515131628.953-1-jinma@linux.alibaba.com/","msgid":"<20230515131628.953-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-15T13:16:28","name":"[v9] RISC-V: Add the '\''zfa'\'' extension, version 0.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515131628.953-1-jinma@linux.alibaba.com/mbox/"},{"id":94181,"url":"https://patchwork.plctlab.org/api/1.2/patches/94181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515145346.153478-1-juzhe.zhong@rivai.ai/","msgid":"<20230515145346.153478-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T14:53:46","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515145346.153478-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94193,"url":"https://patchwork.plctlab.org/api/1.2/patches/94193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515152455.2549476-1-ppalka@redhat.com/","msgid":"<20230515152455.2549476-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-15T15:24:55","name":"c++: add feature-test macro for auto(x)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515152455.2549476-1-ppalka@redhat.com/mbox/"},{"id":94265,"url":"https://patchwork.plctlab.org/api/1.2/patches/94265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de/","msgid":"<48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de>","list_archive_url":null,"date":"2023-05-15T18:05:18","name":"[avr] Fix PR109650 wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de/mbox/"},{"id":94301,"url":"https://patchwork.plctlab.org/api/1.2/patches/94301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1lp8lcr.fsf@euler.schwinge.homeip.net/","msgid":"<87y1lp8lcr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-15T19:07:16","name":"Back to requiring \"Perl version 5.6.1 (or later)\" [PR82856] (was: Update GCC to autoconf 2.69, automake 1.15.1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1lp8lcr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94348,"url":"https://patchwork.plctlab.org/api/1.2/patches/94348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515211852.228907-1-juzhe.zhong@rivai.ai/","msgid":"<20230515211852.228907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T21:18:52","name":"[V9] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515211852.228907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94353,"url":"https://patchwork.plctlab.org/api/1.2/patches/94353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca8b8c9a-1866-b95d-8b93-9d57885de5f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-15T21:28:45","name":"[committed] c: Update __has_c_attribute values for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca8b8c9a-1866-b95d-8b93-9d57885de5f@codesourcery.com/mbox/"},{"id":94394,"url":"https://patchwork.plctlab.org/api/1.2/patches/94394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dba8287c-e1e4-21fa-f842-80b459e7b65f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-15T23:18:33","name":"[committed] c: Ignore _Atomic on function return type for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dba8287c-e1e4-21fa-f842-80b459e7b65f@codesourcery.com/mbox/"},{"id":94412,"url":"https://patchwork.plctlab.org/api/1.2/patches/94412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516013655.1660657-1-apinski@marvell.com/","msgid":"<20230516013655.1660657-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-16T01:36:55","name":"MATCH: [PR109424] Simplify min/max of boolean arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516013655.1660657-1-apinski@marvell.com/mbox/"},{"id":94442,"url":"https://patchwork.plctlab.org/api/1.2/patches/94442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef5944f4-28b5-1fe0-26b8-a348ea56d045@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T06:15:28","name":"[v5,1/4] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef5944f4-28b5-1fe0-26b8-a348ea56d045@linux.ibm.com/mbox/"},{"id":94459,"url":"https://patchwork.plctlab.org/api/1.2/patches/94459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516064322.2584953-1-stefansf@linux.ibm.com/","msgid":"<20230516064322.2584953-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-16T06:43:23","name":"s390: Implement TARGET_ATOMIC_ALIGN_FOR_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516064322.2584953-1-stefansf@linux.ibm.com/mbox/"},{"id":94463,"url":"https://patchwork.plctlab.org/api/1.2/patches/94463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516065201.751821-1-pan2.li@intel.com/","msgid":"<20230516065201.751821-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-16T06:52:01","name":"RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516065201.751821-1-pan2.li@intel.com/mbox/"},{"id":94514,"url":"https://patchwork.plctlab.org/api/1.2/patches/94514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083903.1500563-1-poulhies@adacore.com/","msgid":"<20230516083903.1500563-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:03","name":"[COMMITTED] ada: Restore proof of System.Arith_Double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083903.1500563-1-poulhies@adacore.com/mbox/"},{"id":94515,"url":"https://patchwork.plctlab.org/api/1.2/patches/94515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083925.1500745-1-poulhies@adacore.com/","msgid":"<20230516083925.1500745-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:25","name":"[COMMITTED] ada: Trivial refactoring in Instantiate_*_Body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083925.1500745-1-poulhies@adacore.com/mbox/"},{"id":94516,"url":"https://patchwork.plctlab.org/api/1.2/patches/94516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083931.1500816-1-poulhies@adacore.com/","msgid":"<20230516083931.1500816-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:31","name":"[COMMITTED] ada: Set Loop_Variant assertion policy to Ignore in both","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083931.1500816-1-poulhies@adacore.com/mbox/"},{"id":94517,"url":"https://patchwork.plctlab.org/api/1.2/patches/94517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083935.1500895-1-poulhies@adacore.com/","msgid":"<20230516083935.1500895-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:35","name":"[COMMITTED] ada: Missing dependency with -gnatc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083935.1500895-1-poulhies@adacore.com/mbox/"},{"id":94519,"url":"https://patchwork.plctlab.org/api/1.2/patches/94519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083940.1500958-1-poulhies@adacore.com/","msgid":"<20230516083940.1500958-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:40","name":"[COMMITTED] ada: Add intermediate assertions for proof of Super_Tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083940.1500958-1-poulhies@adacore.com/mbox/"},{"id":94520,"url":"https://patchwork.plctlab.org/api/1.2/patches/94520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083944.1501021-1-poulhies@adacore.com/","msgid":"<20230516083944.1501021-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:44","name":"[COMMITTED] ada: Simplify dramatically ghost code for proof of System.Arith_Double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083944.1501021-1-poulhies@adacore.com/mbox/"},{"id":94523,"url":"https://patchwork.plctlab.org/api/1.2/patches/94523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083949.1501084-1-poulhies@adacore.com/","msgid":"<20230516083949.1501084-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:49","name":"[COMMITTED] ada: Change Present_Expr field type to Uint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083949.1501084-1-poulhies@adacore.com/mbox/"},{"id":94518,"url":"https://patchwork.plctlab.org/api/1.2/patches/94518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083956.1501148-1-poulhies@adacore.com/","msgid":"<20230516083956.1501148-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:56","name":"[COMMITTED] ada: Introduce Cannot_Be_Superflat flag on N_Range nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083956.1501148-1-poulhies@adacore.com/mbox/"},{"id":94528,"url":"https://patchwork.plctlab.org/api/1.2/patches/94528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084001.1501211-1-poulhies@adacore.com/","msgid":"<20230516084001.1501211-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:01","name":"[COMMITTED] ada: Bad handling of ASCII with -gnatyn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084001.1501211-1-poulhies@adacore.com/mbox/"},{"id":94532,"url":"https://patchwork.plctlab.org/api/1.2/patches/94532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084006.1501276-1-poulhies@adacore.com/","msgid":"<20230516084006.1501276-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:06","name":"[COMMITTED] ada: Document examples of No_Dependence restriction for code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084006.1501276-1-poulhies@adacore.com/mbox/"},{"id":94522,"url":"https://patchwork.plctlab.org/api/1.2/patches/94522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084011.1501341-1-poulhies@adacore.com/","msgid":"<20230516084011.1501341-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:11","name":"[COMMITTED] ada: Get name from entity if that'\''s what'\''s passed to Subprogram_Name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084011.1501341-1-poulhies@adacore.com/mbox/"},{"id":94535,"url":"https://patchwork.plctlab.org/api/1.2/patches/94535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084015.1501411-1-poulhies@adacore.com/","msgid":"<20230516084015.1501411-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:15","name":"[COMMITTED] ada: Build invariant procedure while freezing in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084015.1501411-1-poulhies@adacore.com/mbox/"},{"id":94539,"url":"https://patchwork.plctlab.org/api/1.2/patches/94539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084022.1501474-1-poulhies@adacore.com/","msgid":"<20230516084022.1501474-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:22","name":"[COMMITTED] ada: Adjust semantics and implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084022.1501474-1-poulhies@adacore.com/mbox/"},{"id":94526,"url":"https://patchwork.plctlab.org/api/1.2/patches/94526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084026.1501538-1-poulhies@adacore.com/","msgid":"<20230516084026.1501538-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:26","name":"[COMMITTED] ada: Fix typo in \"pattern\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084026.1501538-1-poulhies@adacore.com/mbox/"},{"id":94527,"url":"https://patchwork.plctlab.org/api/1.2/patches/94527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084032.1501610-1-poulhies@adacore.com/","msgid":"<20230516084032.1501610-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:32","name":"[COMMITTED] ada: Add tags on style messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084032.1501610-1-poulhies@adacore.com/mbox/"},{"id":94541,"url":"https://patchwork.plctlab.org/api/1.2/patches/94541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084037.1501674-1-poulhies@adacore.com/","msgid":"<20230516084037.1501674-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:37","name":"[COMMITTED] ada: Follow-up improvement to implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084037.1501674-1-poulhies@adacore.com/mbox/"},{"id":94530,"url":"https://patchwork.plctlab.org/api/1.2/patches/94530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084042.1501739-1-poulhies@adacore.com/","msgid":"<20230516084042.1501739-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:42","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on PPC Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084042.1501739-1-poulhies@adacore.com/mbox/"},{"id":94521,"url":"https://patchwork.plctlab.org/api/1.2/patches/94521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084048.1501804-1-poulhies@adacore.com/","msgid":"<20230516084048.1501804-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:48","name":"[COMMITTED] ada: Fix Ada representation of r_debug and link_map types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084048.1501804-1-poulhies@adacore.com/mbox/"},{"id":94531,"url":"https://patchwork.plctlab.org/api/1.2/patches/94531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084052.1501867-1-poulhies@adacore.com/","msgid":"<20230516084052.1501867-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:52","name":"[COMMITTED] ada: usage.adb: document -gnatyD switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084052.1501867-1-poulhies@adacore.com/mbox/"},{"id":94533,"url":"https://patchwork.plctlab.org/api/1.2/patches/94533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084058.1501934-1-poulhies@adacore.com/","msgid":"<20230516084058.1501934-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:58","name":"[COMMITTED] ada: Apply range checks to preanalyzed aggregate expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084058.1501934-1-poulhies@adacore.com/mbox/"},{"id":94536,"url":"https://patchwork.plctlab.org/api/1.2/patches/94536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084103.1502006-1-poulhies@adacore.com/","msgid":"<20230516084103.1502006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:03","name":"[COMMITTED] ada: Spurious error on function returning CPP type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084103.1502006-1-poulhies@adacore.com/mbox/"},{"id":94534,"url":"https://patchwork.plctlab.org/api/1.2/patches/94534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084110.1502069-1-poulhies@adacore.com/","msgid":"<20230516084110.1502069-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:10","name":"[COMMITTED] ada: Spurious error analyzing '\''old or '\''result in class-wide conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084110.1502069-1-poulhies@adacore.com/mbox/"},{"id":94525,"url":"https://patchwork.plctlab.org/api/1.2/patches/94525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084115.1502135-1-poulhies@adacore.com/","msgid":"<20230516084115.1502135-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:15","name":"[COMMITTED] ada: Implement inheritance of user-defined literal aspects for untagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084115.1502135-1-poulhies@adacore.com/mbox/"},{"id":94543,"url":"https://patchwork.plctlab.org/api/1.2/patches/94543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084120.1502199-1-poulhies@adacore.com/","msgid":"<20230516084120.1502199-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:20","name":"[COMMITTED] ada: Update proof of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084120.1502199-1-poulhies@adacore.com/mbox/"},{"id":94540,"url":"https://patchwork.plctlab.org/api/1.2/patches/94540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084125.1502265-1-poulhies@adacore.com/","msgid":"<20230516084125.1502265-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:25","name":"[COMMITTED] ada: Fix internal error on chain of predicated record types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084125.1502265-1-poulhies@adacore.com/mbox/"},{"id":94544,"url":"https://patchwork.plctlab.org/api/1.2/patches/94544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084129.1502331-1-poulhies@adacore.com/","msgid":"<20230516084129.1502331-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:29","name":"[COMMITTED] ada: Fix internal error on '\''Image applied to array component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084129.1502331-1-poulhies@adacore.com/mbox/"},{"id":94545,"url":"https://patchwork.plctlab.org/api/1.2/patches/94545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084133.1502396-1-poulhies@adacore.com/","msgid":"<20230516084133.1502396-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:33","name":"[COMMITTED] ada: Fix crash on iterated component in expression function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084133.1502396-1-poulhies@adacore.com/mbox/"},{"id":94529,"url":"https://patchwork.plctlab.org/api/1.2/patches/94529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084138.1502460-1-poulhies@adacore.com/","msgid":"<20230516084138.1502460-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:38","name":"[COMMITTED] ada: Fix missing warning on aggregate with iterated component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084138.1502460-1-poulhies@adacore.com/mbox/"},{"id":94537,"url":"https://patchwork.plctlab.org/api/1.2/patches/94537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084141.1502523-1-poulhies@adacore.com/","msgid":"<20230516084141.1502523-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:41","name":"[COMMITTED] ada: Use accumulator type in expansion of '\''Reduce attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084141.1502523-1-poulhies@adacore.com/mbox/"},{"id":94542,"url":"https://patchwork.plctlab.org/api/1.2/patches/94542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084146.1502587-1-poulhies@adacore.com/","msgid":"<20230516084146.1502587-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:46","name":"[COMMITTED] ada: Add \"gnat --help-ada\" text for new switches.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084146.1502587-1-poulhies@adacore.com/mbox/"},{"id":94546,"url":"https://patchwork.plctlab.org/api/1.2/patches/94546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de/","msgid":"<94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de>","list_archive_url":null,"date":"2023-05-16T08:56:19","name":"[avr] PR105753: Fix ICE in add_clobbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de/mbox/"},{"id":94548,"url":"https://patchwork.plctlab.org/api/1.2/patches/94548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090555.1698108-1-jwakely@redhat.com/","msgid":"<20230516090555.1698108-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:05:55","name":"[committed] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090555.1698108-1-jwakely@redhat.com/mbox/"},{"id":94549,"url":"https://patchwork.plctlab.org/api/1.2/patches/94549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090708.1698284-1-jwakely@redhat.com/","msgid":"<20230516090708.1698284-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:07:08","name":"[committed] libstdc++: Require tzdb support for chrono::zoned_time printer test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090708.1698284-1-jwakely@redhat.com/mbox/"},{"id":94550,"url":"https://patchwork.plctlab.org/api/1.2/patches/94550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090719.1698299-1-jwakely@redhat.com/","msgid":"<20230516090719.1698299-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:07:19","name":"[committed] libstdc++: Add assertion to debug_allocator test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090719.1698299-1-jwakely@redhat.com/mbox/"},{"id":94565,"url":"https://patchwork.plctlab.org/api/1.2/patches/94565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-1-jwakely@redhat.com/","msgid":"<20230516091132.1698684-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:30","name":"[committed,1/3] libstdc++: Stop using _GLIBCXX_USE_C99_COMPLEX_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-1-jwakely@redhat.com/mbox/"},{"id":94573,"url":"https://patchwork.plctlab.org/api/1.2/patches/94573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-2-jwakely@redhat.com/","msgid":"<20230516091132.1698684-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:31","name":"[committed,2/3] libstdc++: Stop using _GLIBCXX_USE_C99_STDINT_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-2-jwakely@redhat.com/mbox/"},{"id":94568,"url":"https://patchwork.plctlab.org/api/1.2/patches/94568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-3-jwakely@redhat.com/","msgid":"<20230516091132.1698684-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:32","name":"[committed,3/3] libstdc++: Stop using TR1 macros in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-3-jwakely@redhat.com/mbox/"},{"id":94579,"url":"https://patchwork.plctlab.org/api/1.2/patches/94579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091941.84280-1-juzhe.zhong@rivai.ai/","msgid":"<20230516091941.84280-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T09:19:41","name":"[V10] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091941.84280-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94600,"url":"https://patchwork.plctlab.org/api/1.2/patches/94600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516101916.2895797-1-juzhe.zhong@rivai.ai/","msgid":"<20230516101916.2895797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:19:16","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516101916.2895797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94601,"url":"https://patchwork.plctlab.org/api/1.2/patches/94601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102124.2896235-1-juzhe.zhong@rivai.ai/","msgid":"<20230516102124.2896235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:21:24","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102124.2896235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94602,"url":"https://patchwork.plctlab.org/api/1.2/patches/94602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102319.163752-1-juzhe.zhong@rivai.ai/","msgid":"<20230516102319.163752-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:23:19","name":"[V11] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102319.163752-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94617,"url":"https://patchwork.plctlab.org/api/1.2/patches/94617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleho1r9v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T10:53:32","name":"aarch64: Allow moves after tied-register intrinsics (2nd edition)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleho1r9v.fsf@arm.com/mbox/"},{"id":94734,"url":"https://patchwork.plctlab.org/api/1.2/patches/94734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfbw8imk.fsf@euler.schwinge.homeip.net/","msgid":"<87sfbw8imk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-16T14:18:27","name":"Remove stale Autoconf checks for Perl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfbw8imk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94740,"url":"https://patchwork.plctlab.org/api/1.2/patches/94740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7mk8hzw.fsf@euler.schwinge.homeip.net/","msgid":"<87o7mk8hzw.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-16T14:32:03","name":"Support parallel testing in libgomp: fallback Perl '\''flock'\'' [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7mk8hzw.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94752,"url":"https://patchwork.plctlab.org/api/1.2/patches/94752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516151609.36619-1-julian@codesourcery.com/","msgid":"<20230516151609.36619-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-05-16T15:16:09","name":"OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516151609.36619-1-julian@codesourcery.com/mbox/"},{"id":94757,"url":"https://patchwork.plctlab.org/api/1.2/patches/94757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153343.56157-1-kito.cheng@sifive.com/","msgid":"<20230516153343.56157-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-16T15:33:43","name":"[committed] RISC-V: Fix wrong select_kind in riscv_compute_multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153343.56157-1-kito.cheng@sifive.com/mbox/"},{"id":94758,"url":"https://patchwork.plctlab.org/api/1.2/patches/94758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153524.3302940-1-pan2.li@intel.com/","msgid":"<20230516153524.3302940-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-16T15:35:24","name":"Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153524.3302940-1-pan2.li@intel.com/mbox/"},{"id":94760,"url":"https://patchwork.plctlab.org/api/1.2/patches/94760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGOjIunxHFQLfzQQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T15:37:06","name":"configure: Implement --enable-host-bind-now","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGOjIunxHFQLfzQQ@redhat.com/mbox/"},{"id":94761,"url":"https://patchwork.plctlab.org/api/1.2/patches/94761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153811.3515353-1-ppalka@redhat.com/","msgid":"<20230516153811.3515353-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-16T15:38:11","name":"c++: desig init in presence of list ctor [PR109871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153811.3515353-1-ppalka@redhat.com/mbox/"},{"id":94846,"url":"https://patchwork.plctlab.org/api/1.2/patches/94846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdb83fad-a824-bbfd-c049-29c0a418dbc8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T17:22:00","name":"[committed] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdb83fad-a824-bbfd-c049-29c0a418dbc8@linux.ibm.com/mbox/"},{"id":94847,"url":"https://patchwork.plctlab.org/api/1.2/patches/94847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173037.1807702-1-jwakely@redhat.com/","msgid":"<20230516173037.1807702-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T17:30:37","name":"libstdc++: Disable embedded tzdata for all 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173037.1807702-1-jwakely@redhat.com/mbox/"},{"id":94849,"url":"https://patchwork.plctlab.org/api/1.2/patches/94849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173156.1826089-1-jwakely@redhat.com/","msgid":"<20230516173156.1826089-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T17:31:56","name":"[committed] libstdc++: Disable cacheline alignment for DJGPP [PR109741]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173156.1826089-1-jwakely@redhat.com/mbox/"},{"id":94869,"url":"https://patchwork.plctlab.org/api/1.2/patches/94869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516191354.155428-1-polacek@redhat.com/","msgid":"<20230516191354.155428-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-16T19:13:54","name":"c++: -Wdangling-reference not suppressed in template [PR109774]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516191354.155428-1-polacek@redhat.com/mbox/"},{"id":94871,"url":"https://patchwork.plctlab.org/api/1.2/patches/94871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGPa0mUUzxt2bO6d@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-16T19:34:42","name":"c++: Don'\''t try to initialize zero width bitfields in zero initialization [PR109868]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGPa0mUUzxt2bO6d@tucnak/mbox/"},{"id":94984,"url":"https://patchwork.plctlab.org/api/1.2/patches/94984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a64ef3fd-79cc-5a27-309f-6117c16f61fa@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T23:46:47","name":"[committed] c: Remove restrictions on declarations in '\''for'\'' loops for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a64ef3fd-79cc-5a27-309f-6117c16f61fa@codesourcery.com/mbox/"},{"id":94993,"url":"https://patchwork.plctlab.org/api/1.2/patches/94993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517005256.1718424-1-apinski@marvell.com/","msgid":"<20230517005256.1718424-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-17T00:52:56","name":"Fix PR 106900: array-bounds warning inside simplify_builtin_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517005256.1718424-1-apinski@marvell.com/mbox/"},{"id":94998,"url":"https://patchwork.plctlab.org/api/1.2/patches/94998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517015143.4023434-1-juzhe.zhong@rivai.ai/","msgid":"<20230517015143.4023434-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T01:51:43","name":"RISC-V: Add rounding mode enum for fixed-point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517015143.4023434-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95057,"url":"https://patchwork.plctlab.org/api/1.2/patches/95057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517052521.405836-1-juzhe.zhong@rivai.ai/","msgid":"<20230517052521.405836-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T05:25:21","name":"RISC-V: Introduce rounding mode operand into fixed-point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517052521.405836-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95060,"url":"https://patchwork.plctlab.org/api/1.2/patches/95060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f026396c-59b8-36ae-2332-e2ece6db2e3b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T06:05:53","name":"vect: Don'\''t retry if the previous analysis fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f026396c-59b8-36ae-2332-e2ece6db2e3b@linux.ibm.com/mbox/"},{"id":95061,"url":"https://patchwork.plctlab.org/api/1.2/patches/95061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com/","msgid":"<72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:09:28","name":"[1/2] vect: Refactor code for index == count in vect_transform_slp_perm_load_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com/mbox/"},{"id":95063,"url":"https://patchwork.plctlab.org/api/1.2/patches/95063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517061050.3778864-1-guojiufu@linux.ibm.com/","msgid":"<20230517061050.3778864-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:10:50","name":"Optimized \"(X - N * M) / N + M\" to \"X / N\" if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517061050.3778864-1-guojiufu@linux.ibm.com/mbox/"},{"id":95064,"url":"https://patchwork.plctlab.org/api/1.2/patches/95064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com/","msgid":"<71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:15:00","name":"[2/2] vect: Enhance cost evaluation in vect_transform_slp_perm_load_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com/mbox/"},{"id":95073,"url":"https://patchwork.plctlab.org/api/1.2/patches/95073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517065702.2935000-1-hongtao.liu@intel.com/","msgid":"<20230517065702.2935000-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-17T06:57:02","name":"Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517065702.2935000-1-hongtao.liu@intel.com/mbox/"},{"id":95097,"url":"https://patchwork.plctlab.org/api/1.2/patches/95097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517081420.1074223-1-pan2.li@intel.com/","msgid":"<20230517081420.1074223-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-17T08:14:20","name":"RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool[2-64]_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517081420.1074223-1-pan2.li@intel.com/mbox/"},{"id":95098,"url":"https://patchwork.plctlab.org/api/1.2/patches/95098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGSOCJBujabM5gNh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T08:19:20","name":"[committed] wide-int: Fix up function comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGSOCJBujabM5gNh@tucnak/mbox/"},{"id":95105,"url":"https://patchwork.plctlab.org/api/1.2/patches/95105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090315.795-1-jinma@linux.alibaba.com/","msgid":"<20230517090315.795-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-17T09:03:15","name":"Fix type error of '\''switch (SUBREG_BYTE (op)).'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090315.795-1-jinma@linux.alibaba.com/mbox/"},{"id":95108,"url":"https://patchwork.plctlab.org/api/1.2/patches/95108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090803.813-1-jinma@linux.alibaba.com/","msgid":"<20230517090803.813-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-17T09:08:03","name":"RISC-V: Remove trailing spaces on lines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090803.813-1-jinma@linux.alibaba.com/mbox/"},{"id":95122,"url":"https://patchwork.plctlab.org/api/1.2/patches/95122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517092238.imdawv4fkhu466bf@debian/","msgid":"<20230517092238.imdawv4fkhu466bf@debian>","list_archive_url":null,"date":"2023-05-17T09:22:38","name":"[13-backport] riscv/linux: Don'\''t add -latomic with -pthread","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517092238.imdawv4fkhu466bf@debian/mbox/"},{"id":95135,"url":"https://patchwork.plctlab.org/api/1.2/patches/95135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517095818.1285188-1-juzhe.zhong@rivai.ai/","msgid":"<20230517095818.1285188-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T09:58:18","name":"RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517095818.1285188-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95192,"url":"https://patchwork.plctlab.org/api/1.2/patches/95192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com/","msgid":"<80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com>","list_archive_url":null,"date":"2023-05-17T11:31:08","name":"[committed] Re: [Patch,v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com/mbox/"},{"id":95226,"url":"https://patchwork.plctlab.org/api/1.2/patches/95226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517130222.2534562-1-lili.cui@intel.com/","msgid":"<20230517130222.2534562-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-17T13:02:22","name":"PR gcc/98350:Handle FMA friendly in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517130222.2534562-1-lili.cui@intel.com/mbox/"},{"id":95276,"url":"https://patchwork.plctlab.org/api/1.2/patches/95276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-1-aldyh@redhat.com/","msgid":"<20230517141020.464106-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:10:19","name":"[COMMITTED] Provide support for copying unsupported ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-1-aldyh@redhat.com/mbox/"},{"id":95277,"url":"https://patchwork.plctlab.org/api/1.2/patches/95277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-2-aldyh@redhat.com/","msgid":"<20230517141020.464106-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:10:20","name":"[COMMITTED] Add Value_Range::operator=.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-2-aldyh@redhat.com/mbox/"},{"id":95279,"url":"https://patchwork.plctlab.org/api/1.2/patches/95279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141622.464538-1-aldyh@redhat.com/","msgid":"<20230517141622.464538-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:16:22","name":"Provide an API for ipa_vr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141622.464538-1-aldyh@redhat.com/mbox/"},{"id":95282,"url":"https://patchwork.plctlab.org/api/1.2/patches/95282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517143030.465081-1-aldyh@redhat.com/","msgid":"<20230517143030.465081-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:30:31","name":"Convert ipcp_vr_lattice to type agnostic framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517143030.465081-1-aldyh@redhat.com/mbox/"},{"id":95396,"url":"https://patchwork.plctlab.org/api/1.2/patches/95396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNJHHe4Q52N93X9Y5OkGb-1pMpqvX2ZpgFanW9hnueiYQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T16:02:31","name":"[v2] RISC-V: Remove masking third operand of rotate instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNJHHe4Q52N93X9Y5OkGb-1pMpqvX2ZpgFanW9hnueiYQ@mail.gmail.com/mbox/"},{"id":95468,"url":"https://patchwork.plctlab.org/api/1.2/patches/95468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUYH+SgUWanqPVA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:08:31","name":"i386: Fix up types in __builtin_{inf,huge_val,nan{,s},fabs,copysign}q builtins [PR109884]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUYH+SgUWanqPVA@tucnak/mbox/"},{"id":95469,"url":"https://patchwork.plctlab.org/api/1.2/patches/95469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUaWQkrIkrtlbPa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:18:01","name":"libstdc++: Fix up some templates [PR109883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUaWQkrIkrtlbPa@tucnak/mbox/"},{"id":95478,"url":"https://patchwork.plctlab.org/api/1.2/patches/95478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y37a95TGsZtHtCZtNXiecqGJ-22AvB+=AxK_Tfh+AaAg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:29:19","name":"[COMMITTED] i386: Adjust emulated integer vector mode multiplication costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y37a95TGsZtHtCZtNXiecqGJ-22AvB+=AxK_Tfh+AaAg@mail.gmail.com/mbox/"},{"id":95486,"url":"https://patchwork.plctlab.org/api/1.2/patches/95486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517184352.32144-1-amonakov@ispras.ru/","msgid":"<20230517184352.32144-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-17T18:43:52","name":"[committed] tree-ssa-math-opts: correct -ffp-contract= check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517184352.32144-1-amonakov@ispras.ru/mbox/"},{"id":95490,"url":"https://patchwork.plctlab.org/api/1.2/patches/95490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f62baae8-2c7b-45b2-9cd9-da495125cc90-1684349530775@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:52:10","name":"Fortran: set shape of initializers of zero-sized arrays [PR95374,PR104352]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f62baae8-2c7b-45b2-9cd9-da495125cc90-1684349530775@3c-app-gmx-bap55/mbox/"},{"id":95495,"url":"https://patchwork.plctlab.org/api/1.2/patches/95495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190552.2023422-1-jwakely@redhat.com/","msgid":"<20230517190552.2023422-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:05:52","name":"[committed] libstdc++: Implement LWG 3877 for std::expected monadic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190552.2023422-1-jwakely@redhat.com/mbox/"},{"id":95497,"url":"https://patchwork.plctlab.org/api/1.2/patches/95497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190607.2023676-1-jwakely@redhat.com/","msgid":"<20230517190607.2023676-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:06:07","name":"[committed] libstdc++: Add system_header pragma to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190607.2023676-1-jwakely@redhat.com/mbox/"},{"id":95498,"url":"https://patchwork.plctlab.org/api/1.2/patches/95498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190715.2024283-1-jwakely@redhat.com/","msgid":"<20230517190715.2024283-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:07:15","name":"[committed] libstdc++: Uncomment checks for enumeration types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190715.2024283-1-jwakely@redhat.com/mbox/"},{"id":95534,"url":"https://patchwork.plctlab.org/api/1.2/patches/95534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517202646.3793039-1-arsen@aarsen.me/","msgid":"<20230517202646.3793039-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-05-17T20:26:46","name":"[pushed] doc: Fix a pinch of typos in extend.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517202646.3793039-1-arsen@aarsen.me/mbox/"},{"id":95546,"url":"https://patchwork.plctlab.org/api/1.2/patches/95546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGU7kyENloNHj6vd@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-05-17T20:39:47","name":"[committed] hppa: Add clear_cache expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGU7kyENloNHj6vd@mx3210.localdomain/mbox/"},{"id":95594,"url":"https://patchwork.plctlab.org/api/1.2/patches/95594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c8e37e-0748-5333-002a-026348b19627@acm.org/","msgid":"<17c8e37e-0748-5333-002a-026348b19627@acm.org>","list_archive_url":null,"date":"2023-05-17T23:38:33","name":"Allow plugin-specific dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c8e37e-0748-5333-002a-026348b19627@acm.org/mbox/"},{"id":95596,"url":"https://patchwork.plctlab.org/api/1.2/patches/95596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca6c3b-79e-2ee2-d815-f58cc7e7b197@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T00:08:44","name":"[committed] c: Handle printf %B like %b for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca6c3b-79e-2ee2-d815-f58cc7e7b197@codesourcery.com/mbox/"},{"id":95633,"url":"https://patchwork.plctlab.org/api/1.2/patches/95633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518031725.3164716-1-pan2.li@intel.com/","msgid":"<20230518031725.3164716-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T03:17:25","name":"RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518031725.3164716-1-pan2.li@intel.com/mbox/"},{"id":95670,"url":"https://patchwork.plctlab.org/api/1.2/patches/95670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063209.3270504-1-pan2.li@intel.com/","msgid":"<20230518063209.3270504-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T06:32:09","name":"RISC-V: Support RVV VREINTERPRET from vbool*_t to vuint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063209.3270504-1-pan2.li@intel.com/mbox/"},{"id":95671,"url":"https://patchwork.plctlab.org/api/1.2/patches/95671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063652.3273735-1-pan2.li@intel.com/","msgid":"<20230518063652.3273735-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T06:36:52","name":"[v2] RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063652.3273735-1-pan2.li@intel.com/mbox/"},{"id":95677,"url":"https://patchwork.plctlab.org/api/1.2/patches/95677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acdb8e2b-7c95-0fd2-2189-51f661f15bc5@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T07:14:28","name":"[v1] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acdb8e2b-7c95-0fd2-2189-51f661f15bc5@linux.ibm.com/mbox/"},{"id":95707,"url":"https://patchwork.plctlab.org/api/1.2/patches/95707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com/","msgid":"<20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com>","list_archive_url":null,"date":"2023-05-18T08:39:09","name":"[1/4] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com/mbox/"},{"id":95732,"url":"https://patchwork.plctlab.org/api/1.2/patches/95732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4801877.GXAFRqVoOG@fomalhaut/","msgid":"<4801877.GXAFRqVoOG@fomalhaut>","list_archive_url":null,"date":"2023-05-18T09:28:51","name":"Fix internal error on small array with negative lower bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4801877.GXAFRqVoOG@fomalhaut/mbox/"},{"id":95772,"url":"https://patchwork.plctlab.org/api/1.2/patches/95772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-1-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-1-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:21","name":"[committed,gcc12,backport] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-1-stam.markianos-wright@arm.com/mbox/"},{"id":95760,"url":"https://patchwork.plctlab.org/api/1.2/patches/95760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-2-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-2-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:22","name":"[committed,gcc12,backport] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-2-stam.markianos-wright@arm.com/mbox/"},{"id":95763,"url":"https://patchwork.plctlab.org/api/1.2/patches/95763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-4-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-4-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:24","name":"[committed,gcc12,backport] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-4-stam.markianos-wright@arm.com/mbox/"},{"id":95761,"url":"https://patchwork.plctlab.org/api/1.2/patches/95761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-5-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-5-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:25","name":"[committed,gcc12,backport] arm: Add vorrq_n overloading into vorrq _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-5-stam.markianos-wright@arm.com/mbox/"},{"id":95773,"url":"https://patchwork.plctlab.org/api/1.2/patches/95773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-6-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-6-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:26","name":"[committed,gcc12,backport] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-6-stam.markianos-wright@arm.com/mbox/"},{"id":95768,"url":"https://patchwork.plctlab.org/api/1.2/patches/95768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-8-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-8-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:28","name":"[committed,gcc12,backport] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-8-stam.markianos-wright@arm.com/mbox/"},{"id":95766,"url":"https://patchwork.plctlab.org/api/1.2/patches/95766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-9-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-9-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:29","name":"[committed,gcc12,backport] arm testsuite: XFAIL or relax registers in some tests [PR109697]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-9-stam.markianos-wright@arm.com/mbox/"},{"id":95767,"url":"https://patchwork.plctlab.org/api/1.2/patches/95767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-10-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-10-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:30","name":"[committed,gcc12,backport] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-10-stam.markianos-wright@arm.com/mbox/"},{"id":95762,"url":"https://patchwork.plctlab.org/api/1.2/patches/95762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-11-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-11-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:31","name":"[committed,gcc12,backport,arm] complete vmsr/vmrs blank and case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-11-stam.markianos-wright@arm.com/mbox/"},{"id":95781,"url":"https://patchwork.plctlab.org/api/1.2/patches/95781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-1-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-1-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:07","name":"[commited,trunk,1/9] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-1-stam.markianos-wright@arm.com/mbox/"},{"id":95778,"url":"https://patchwork.plctlab.org/api/1.2/patches/95778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-2-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-2-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:08","name":"[commited,trunk,2/9] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-2-stam.markianos-wright@arm.com/mbox/"},{"id":95776,"url":"https://patchwork.plctlab.org/api/1.2/patches/95776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-4-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-4-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:10","name":"[commited,trunk,4/9] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-4-stam.markianos-wright@arm.com/mbox/"},{"id":95775,"url":"https://patchwork.plctlab.org/api/1.2/patches/95775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-5-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-5-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:11","name":"[commited,trunk,5/9] arm: Fix overloading of MVE scalar constant parameters on vbicq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-5-stam.markianos-wright@arm.com/mbox/"},{"id":95779,"url":"https://patchwork.plctlab.org/api/1.2/patches/95779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-6-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-6-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:12","name":"[commited,trunk,6/9] arm: Fix MVE header pointer overloads this time (and a bit more tidying)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-6-stam.markianos-wright@arm.com/mbox/"},{"id":95782,"url":"https://patchwork.plctlab.org/api/1.2/patches/95782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-7-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-7-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:13","name":"[commited,trunk,7/9] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-7-stam.markianos-wright@arm.com/mbox/"},{"id":95777,"url":"https://patchwork.plctlab.org/api/1.2/patches/95777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-8-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-8-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:14","name":"[commited,trunk,8/9] arm testsuite: XFAIL or relax registers in some tests [PR109697]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-8-stam.markianos-wright@arm.com/mbox/"},{"id":95780,"url":"https://patchwork.plctlab.org/api/1.2/patches/95780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-9-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-9-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:15","name":"[commited,trunk,9/9] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-9-stam.markianos-wright@arm.com/mbox/"},{"id":95792,"url":"https://patchwork.plctlab.org/api/1.2/patches/95792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com/","msgid":"<58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com>","list_archive_url":null,"date":"2023-05-18T11:16:04","name":"rs6000: Update powerpc test fold-vec-extract-int.p8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com/mbox/"},{"id":95852,"url":"https://patchwork.plctlab.org/api/1.2/patches/95852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at/","msgid":"<4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-18T12:46:34","name":"[PING,C] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at/mbox/"},{"id":95855,"url":"https://patchwork.plctlab.org/api/1.2/patches/95855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-2-jwakely@redhat.com/","msgid":"<20230518125647.2105203-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:45","name":"[1/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-2-jwakely@redhat.com/mbox/"},{"id":95854,"url":"https://patchwork.plctlab.org/api/1.2/patches/95854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-3-jwakely@redhat.com/","msgid":"<20230518125647.2105203-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:46","name":"[2/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-3-jwakely@redhat.com/mbox/"},{"id":95856,"url":"https://patchwork.plctlab.org/api/1.2/patches/95856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-4-jwakely@redhat.com/","msgid":"<20230518125647.2105203-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:47","name":"[3/3] contrib: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-4-jwakely@redhat.com/mbox/"},{"id":95858,"url":"https://patchwork.plctlab.org/api/1.2/patches/95858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518130358.2106172-1-jwakely@redhat.com/","msgid":"<20230518130358.2106172-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T13:03:58","name":"[v2,2/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518130358.2106172-1-jwakely@redhat.com/mbox/"},{"id":95994,"url":"https://patchwork.plctlab.org/api/1.2/patches/95994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5739d25-396c-d0d8-d10d-f23defe81fed@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-18T16:41:10","name":"[avr,committed] Fix a trivial typo in gen-avr-mmcu-specs.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5739d25-396c-d0d8-d10d-f23defe81fed@gjlay.de/mbox/"},{"id":96016,"url":"https://patchwork.plctlab.org/api/1.2/patches/96016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518175927.4158045-1-ppalka@redhat.com/","msgid":"<20230518175927.4158045-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-18T17:59:27","name":"c++: scoped variable template-id of reference type [PR97340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518175927.4158045-1-ppalka@redhat.com/mbox/"},{"id":96017,"url":"https://patchwork.plctlab.org/api/1.2/patches/96017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518180114.4158415-1-ppalka@redhat.com/","msgid":"<20230518180114.4158415-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-18T18:01:14","name":"c++: simplify norm_cache manipulation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518180114.4158415-1-ppalka@redhat.com/mbox/"},{"id":96022,"url":"https://patchwork.plctlab.org/api/1.2/patches/96022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yq+s2JkNrazY-H1bANSTFW10+kJ81z8wefUrAPeN+Szg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T18:50:25","name":"[COMMITTED] i386: Add infrastructure for QImode partial vector mult and shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yq+s2JkNrazY-H1bANSTFW10+kJ81z8wefUrAPeN+Szg@mail.gmail.com/mbox/"},{"id":96046,"url":"https://patchwork.plctlab.org/api/1.2/patches/96046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518205716.3258223-1-vineetg@rivosinc.com/","msgid":"<20230518205716.3258223-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-18T20:57:16","name":"RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518205716.3258223-1-vineetg@rivosinc.com/mbox/"},{"id":96048,"url":"https://patchwork.plctlab.org/api/1.2/patches/96048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518210331.11564-1-amonakov@ispras.ru/","msgid":"<20230518210331.11564-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-18T21:03:31","name":"c-family: implement -ffp-contract=on","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518210331.11564-1-amonakov@ispras.ru/mbox/"},{"id":96049,"url":"https://patchwork.plctlab.org/api/1.2/patches/96049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b897a2be3bfc7ef730091f66f1102104aab1924b.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T21:12:51","name":"[v2] rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b897a2be3bfc7ef730091f66f1102104aab1924b.camel@us.ibm.com/mbox/"},{"id":96101,"url":"https://patchwork.plctlab.org/api/1.2/patches/96101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGa1mbB+/HinAW2o@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T23:32:41","name":"[v2] configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGa1mbB+/HinAW2o@redhat.com/mbox/"},{"id":96140,"url":"https://patchwork.plctlab.org/api/1.2/patches/96140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com/","msgid":"<37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com>","list_archive_url":null,"date":"2023-05-19T00:42:54","name":"[committed] c: Do not allow thread-local tentative definitions for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com/mbox/"},{"id":96165,"url":"https://patchwork.plctlab.org/api/1.2/patches/96165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-1-apinski@marvell.com/","msgid":"<20230519021410.1841811-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T02:14:09","name":"[1/2] Improve do_store_flag for single bit comparison against 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-1-apinski@marvell.com/mbox/"},{"id":96166,"url":"https://patchwork.plctlab.org/api/1.2/patches/96166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-2-apinski@marvell.com/","msgid":"<20230519021410.1841811-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T02:14:10","name":"[2/2] Improve do_store_flag for comparing single bit against that bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-2-apinski@marvell.com/mbox/"},{"id":96175,"url":"https://patchwork.plctlab.org/api/1.2/patches/96175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519034823.653-1-shihua@iscas.ac.cn/","msgid":"<20230519034823.653-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-05-19T03:48:23","name":"[RFC,V2] RISC-V : Support rv64 ilp32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519034823.653-1-shihua@iscas.ac.cn/mbox/"},{"id":96203,"url":"https://patchwork.plctlab.org/api/1.2/patches/96203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519061152.3154332-1-yunqiang.su@cipunited.com/","msgid":"<20230519061152.3154332-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-19T06:11:52","name":"MIPS: don'\''t expand large block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519061152.3154332-1-yunqiang.su@cipunited.com/mbox/"},{"id":96212,"url":"https://patchwork.plctlab.org/api/1.2/patches/96212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com/","msgid":"<4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com>","list_archive_url":null,"date":"2023-05-19T07:40:24","name":"[v1] rs6000: Update powerpc test fold-vec-extract-int.p8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com/mbox/"},{"id":96220,"url":"https://patchwork.plctlab.org/api/1.2/patches/96220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519074209.307764-1-jie.mei@oss.cipunited.com/","msgid":"<20230519074209.307764-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-19T07:44:06","name":"MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519074209.307764-1-jie.mei@oss.cipunited.com/mbox/"},{"id":96232,"url":"https://patchwork.plctlab.org/api/1.2/patches/96232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcsc76Md1sN0D9i@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T07:59:47","name":"tree-ssa-math-opts: Pattern recognize hand written __builtin_mul_overflow_p with same unsigned types even when target just has highpart umul [PR101856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcsc76Md1sN0D9i@tucnak/mbox/"},{"id":96251,"url":"https://patchwork.plctlab.org/api/1.2/patches/96251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGct7KUwpvHp78FB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T08:06:04","name":"tree-ssa-math-opts: Pattern recognize some further hand written forms of signed __builtin_mul_overflow{,_p} [PR105776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGct7KUwpvHp78FB@tucnak/mbox/"},{"id":96252,"url":"https://patchwork.plctlab.org/api/1.2/patches/96252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080631.309062-1-jie.mei@oss.cipunited.com/","msgid":"<20230519080631.309062-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-19T08:07:03","name":"[v2] MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080631.309062-1-jie.mei@oss.cipunited.com/mbox/"},{"id":96253,"url":"https://patchwork.plctlab.org/api/1.2/patches/96253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080829.4ADE033E93@hamza.pair.com/","msgid":"<20230519080829.4ADE033E93@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T08:08:28","name":"[pushed] wwwdocs: onlinedocs/13.1.0: Remove last trace of XHTML","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080829.4ADE033E93@hamza.pair.com/mbox/"},{"id":96254,"url":"https://patchwork.plctlab.org/api/1.2/patches/96254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081130.34977-1-iain@sandoe.co.uk/","msgid":"<20230519081130.34977-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-05-19T08:11:30","name":"[pushed] Darwin, libgcc : Adjust min version supported for the OS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081130.34977-1-iain@sandoe.co.uk/mbox/"},{"id":96256,"url":"https://patchwork.plctlab.org/api/1.2/patches/96256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081505.DA15D33E93@hamza.pair.com/","msgid":"<20230519081505.DA15D33E93@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T08:15:05","name":"[pushed] libstdc++: Move lafstern.org reference to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081505.DA15D33E93@hamza.pair.com/mbox/"},{"id":96260,"url":"https://patchwork.plctlab.org/api/1.2/patches/96260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcwyQG4dEaGPArd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T08:18:17","name":"[committed] libgomp: Fix up -static -fopenmp linking [PR109904]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcwyQG4dEaGPArd@tucnak/mbox/"},{"id":96332,"url":"https://patchwork.plctlab.org/api/1.2/patches/96332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com/","msgid":"<97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com>","list_archive_url":null,"date":"2023-05-19T09:43:41","name":"[v2] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com/mbox/"},{"id":96377,"url":"https://patchwork.plctlab.org/api/1.2/patches/96377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com/","msgid":"<77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:07:03","name":"RISC-V: Allow more loading of const vectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com/mbox/"},{"id":96379,"url":"https://patchwork.plctlab.org/api/1.2/patches/96379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com/","msgid":"<6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:10:25","name":"RISC-V: testsuite: Remove empty *-run-template.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com/mbox/"},{"id":96392,"url":"https://patchwork.plctlab.org/api/1.2/patches/96392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com/","msgid":"<0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:32:24","name":"RISC-V: Implement autovec abs, vneg, vnot.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com/mbox/"},{"id":96394,"url":"https://patchwork.plctlab.org/api/1.2/patches/96394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab760102a39e56340c68cba76a79fea70f7cc0f4.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-19T11:50:10","name":"[C,v2] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab760102a39e56340c68cba76a79fea70f7cc0f4.camel@tugraz.at/mbox/"},{"id":96440,"url":"https://patchwork.plctlab.org/api/1.2/patches/96440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519140206.1369B33E6E@hamza.pair.com/","msgid":"<20230519140206.1369B33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T14:01:59","name":"[pushed] wwwdocs: preprocess: Check whether input files exist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519140206.1369B33E6E@hamza.pair.com/mbox/"},{"id":96472,"url":"https://patchwork.plctlab.org/api/1.2/patches/96472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519144848.1873152-1-apinski@marvell.com/","msgid":"<20230519144848.1873152-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T14:48:48","name":"Fix driver/33980: Precompiled header file not removed on error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519144848.1873152-1-apinski@marvell.com/mbox/"},{"id":96532,"url":"https://patchwork.plctlab.org/api/1.2/patches/96532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com/","msgid":"<212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com>","list_archive_url":null,"date":"2023-05-19T17:18:22","name":"libgomp: Honor OpenMP'\''s nteams-var ICV as upper limit on num teams [PR109875]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com/mbox/"},{"id":96575,"url":"https://patchwork.plctlab.org/api/1.2/patches/96575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519183851.760404-1-ppalka@redhat.com/","msgid":"<20230519183851.760404-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-19T18:38:50","name":"c++: mangle noexcept-expr [PR70790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519183851.760404-1-ppalka@redhat.com/mbox/"},{"id":96577,"url":"https://patchwork.plctlab.org/api/1.2/patches/96577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed49c4e3-5598-9fee-66cb-a978af77da3f@in.tum.de/","msgid":"","list_archive_url":null,"date":"2023-05-19T18:50:33","name":"[v2] release the sorted FDE array when deregistering a frame [PR109685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed49c4e3-5598-9fee-66cb-a978af77da3f@in.tum.de/mbox/"},{"id":96580,"url":"https://patchwork.plctlab.org/api/1.2/patches/96580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGfGVAPg5HwFLSYE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-19T18:56:20","name":"[v3] configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGfGVAPg5HwFLSYE@redhat.com/mbox/"},{"id":96622,"url":"https://patchwork.plctlab.org/api/1.2/patches/96622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f44ec2bb791d05c69636b8d881d74edb4b57234f.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-19T20:38:09","name":"[C] Remove dead code related to type compatibility across TUs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f44ec2bb791d05c69636b8d881d74edb4b57234f.camel@tugraz.at/mbox/"},{"id":96623,"url":"https://patchwork.plctlab.org/api/1.2/patches/96623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-2-qing.zhao@oracle.com/","msgid":"<20230519204948.237791-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-19T20:49:47","name":"[V7,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-2-qing.zhao@oracle.com/mbox/"},{"id":96629,"url":"https://patchwork.plctlab.org/api/1.2/patches/96629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-3-qing.zhao@oracle.com/","msgid":"<20230519204948.237791-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-19T20:49:48","name":"[V7,2/2] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-3-qing.zhao@oracle.com/mbox/"},{"id":96674,"url":"https://patchwork.plctlab.org/api/1.2/patches/96674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519235618.4078456-1-pan2.li@intel.com/","msgid":"<20230519235618.4078456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-19T23:56:18","name":"Mode-Switching: Fix local array maybe uninitialized warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519235618.4078456-1-pan2.li@intel.com/mbox/"},{"id":96711,"url":"https://patchwork.plctlab.org/api/1.2/patches/96711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-2-apinski@marvell.com/","msgid":"<20230520021451.1901275-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:45","name":"[1/7] Move fold_single_bit_test to expr.cc from fold-const.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-2-apinski@marvell.com/mbox/"},{"id":96710,"url":"https://patchwork.plctlab.org/api/1.2/patches/96710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-3-apinski@marvell.com/","msgid":"<20230520021451.1901275-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:46","name":"[2/7] Inline and simplify fold_single_bit_test_into_sign_test into fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-3-apinski@marvell.com/mbox/"},{"id":96712,"url":"https://patchwork.plctlab.org/api/1.2/patches/96712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-4-apinski@marvell.com/","msgid":"<20230520021451.1901275-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:47","name":"[3/7] Use get_def_for_expr in fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-4-apinski@marvell.com/mbox/"},{"id":96715,"url":"https://patchwork.plctlab.org/api/1.2/patches/96715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-5-apinski@marvell.com/","msgid":"<20230520021451.1901275-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:48","name":"[4/7] Simplify fold_single_bit_test slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-5-apinski@marvell.com/mbox/"},{"id":96716,"url":"https://patchwork.plctlab.org/api/1.2/patches/96716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-6-apinski@marvell.com/","msgid":"<20230520021451.1901275-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:49","name":"[5/7] Simplify fold_single_bit_test with respect to code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-6-apinski@marvell.com/mbox/"},{"id":96713,"url":"https://patchwork.plctlab.org/api/1.2/patches/96713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-7-apinski@marvell.com/","msgid":"<20230520021451.1901275-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:50","name":"[6/7] Use BIT_FIELD_REF inside fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-7-apinski@marvell.com/mbox/"},{"id":96714,"url":"https://patchwork.plctlab.org/api/1.2/patches/96714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-8-apinski@marvell.com/","msgid":"<20230520021451.1901275-8-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:51","name":"[7/7] Expand directly for single bit test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-8-apinski@marvell.com/mbox/"},{"id":96723,"url":"https://patchwork.plctlab.org/api/1.2/patches/96723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520045447.3276232-1-juzhe.zhong@rivai.ai/","msgid":"<20230520045447.3276232-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-20T04:54:47","name":"RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520045447.3276232-1-juzhe.zhong@rivai.ai/mbox/"},{"id":96799,"url":"https://patchwork.plctlab.org/api/1.2/patches/96799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-1-apinski@marvell.com/","msgid":"<20230520150406.1932767-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T15:04:05","name":"[PATCHv2,1/2] Improve do_store_flag for single bit comparison against 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-1-apinski@marvell.com/mbox/"},{"id":96800,"url":"https://patchwork.plctlab.org/api/1.2/patches/96800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-2-apinski@marvell.com/","msgid":"<20230520150406.1932767-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T15:04:06","name":"[PATCHv2,2/2] Improve do_store_flag for comparing single bit against that bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-2-apinski@marvell.com/mbox/"},{"id":96818,"url":"https://patchwork.plctlab.org/api/1.2/patches/96818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGkued2UMF5mMQGD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-20T20:32:57","name":"match.pd: Ensure (op CONSTANT_CLASS_P CONSTANT_CLASS_P) is simplified [PR109505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGkued2UMF5mMQGD@tucnak/mbox/"},{"id":96822,"url":"https://patchwork.plctlab.org/api/1.2/patches/96822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520223748.0AF9C33E83@hamza.pair.com/","msgid":"<20230520223748.0AF9C33E83@hamza.pair.com>","list_archive_url":null,"date":"2023-05-20T22:37:44","name":"[pushed,1/N] install.texi: Remove alpha*-*-* section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520223748.0AF9C33E83@hamza.pair.com/mbox/"},{"id":96825,"url":"https://patchwork.plctlab.org/api/1.2/patches/96825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521010949.1957550-1-apinski@marvell.com/","msgid":"<20230521010949.1957550-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T01:09:49","name":"Fix PR 109919: ICE in emit_move_insn with some bit tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521010949.1957550-1-apinski@marvell.com/mbox/"},{"id":96829,"url":"https://patchwork.plctlab.org/api/1.2/patches/96829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521040459.1964837-1-apinski@marvell.com/","msgid":"<20230521040459.1964837-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T04:04:59","name":"Fix expand_single_bit_test for big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521040459.1964837-1-apinski@marvell.com/mbox/"},{"id":96828,"url":"https://patchwork.plctlab.org/api/1.2/patches/96828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521045007.1966279-1-apinski@marvell.com/","msgid":"<20230521045007.1966279-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T04:50:07","name":"Fix expand_single_bit_test for big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521045007.1966279-1-apinski@marvell.com/mbox/"},{"id":96891,"url":"https://patchwork.plctlab.org/api/1.2/patches/96891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a97f093f-f7d0-49f9-82dc-f65b90bdfc87@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-21T17:12:16","name":"[avr,committed] Fix PR90622","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a97f093f-f7d0-49f9-82dc-f65b90bdfc87@gjlay.de/mbox/"},{"id":96897,"url":"https://patchwork.plctlab.org/api/1.2/patches/96897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521184228.C70D533E87@hamza.pair.com/","msgid":"<20230521184228.C70D533E87@hamza.pair.com>","list_archive_url":null,"date":"2023-05-21T18:42:25","name":"[pushed] wwwdocs: readings: Adjust link to Arm architectures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521184228.C70D533E87@hamza.pair.com/mbox/"},{"id":96903,"url":"https://patchwork.plctlab.org/api/1.2/patches/96903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f90ea4af-3d2d-4a0c-8444-480ac3e3639f-1684702102536@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-05-21T20:48:22","name":"Fortran: checking and simplification of RESHAPE intrinsic [PR103794]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f90ea4af-3d2d-4a0c-8444-480ac3e3639f-1684702102536@3c-app-gmx-bap32/mbox/"},{"id":96960,"url":"https://patchwork.plctlab.org/api/1.2/patches/96960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522020804.192222-1-juzhe.zhong@rivai.ai/","msgid":"<20230522020804.192222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T02:08:04","name":"[V12] VECT: Fix issue of multiple-rgroup for length is counting elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522020804.192222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97060,"url":"https://patchwork.plctlab.org/api/1.2/patches/97060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522064138.74056-1-kito.cheng@sifive.com/","msgid":"<20230522064138.74056-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-22T06:41:39","name":"RISC-V: Add missing torture-init and torture-finish for rvv.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522064138.74056-1-kito.cheng@sifive.com/mbox/"},{"id":97096,"url":"https://patchwork.plctlab.org/api/1.2/patches/97096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea701092-71a1-7c4b-3070-376f9421252c@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-05-22T07:03:51","name":"[1/2] xtensa: Optimize '\''(x & CST1_POW2) != 0 ? CST2_POW2 : 0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea701092-71a1-7c4b-3070-376f9421252c@yahoo.co.jp/mbox/"},{"id":97095,"url":"https://patchwork.plctlab.org/api/1.2/patches/97095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp/","msgid":"<8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-22T07:04:37","name":"[2/2] xtensa: Merge '\''*addx'\'' and '\''*subx'\'' insn patterns into one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp/mbox/"},{"id":97112,"url":"https://patchwork.plctlab.org/api/1.2/patches/97112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522072002.1248114-1-juzhe.zhong@rivai.ai/","msgid":"<20230522072002.1248114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T07:20:02","name":"RISC-V: Reorganize the code of CONST_VECTOR handling in riscv.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522072002.1248114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97123,"url":"https://patchwork.plctlab.org/api/1.2/patches/97123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522073547.591554-1-hongtao.liu@intel.com/","msgid":"<20230522073547.591554-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-22T07:35:47","name":"Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522073547.591554-1-hongtao.liu@intel.com/mbox/"},{"id":97169,"url":"https://patchwork.plctlab.org/api/1.2/patches/97169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13270277.uLZWGnKmhe@fomalhaut/","msgid":"<13270277.uLZWGnKmhe@fomalhaut>","list_archive_url":null,"date":"2023-05-22T08:08:10","name":"Fix handling of non-integral bit-fields in native_encode_initializer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13270277.uLZWGnKmhe@fomalhaut/mbox/"},{"id":97171,"url":"https://patchwork.plctlab.org/api/1.2/patches/97171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522081101.1570598-1-juzhe.zhong@rivai.ai/","msgid":"<20230522081101.1570598-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T08:11:01","name":"[V13] VECT: Fix bug of multiple-rgroup for length is counting elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522081101.1570598-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97170,"url":"https://patchwork.plctlab.org/api/1.2/patches/97170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e51c4217-d35c-41bc-2912-42627f83b280@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T08:11:02","name":"[wwwdocs,committed] git.html: Move OG12 to OG13, briefly mention old branches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e51c4217-d35c-41bc-2912-42627f83b280@codesourcery.com/mbox/"},{"id":97174,"url":"https://patchwork.plctlab.org/api/1.2/patches/97174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522083814.1647787-1-juzhe.zhong@rivai.ai/","msgid":"<20230522083814.1647787-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T08:38:14","name":"[V12] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522083814.1647787-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97177,"url":"https://patchwork.plctlab.org/api/1.2/patches/97177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084906.1725082-1-poulhies@adacore.com/","msgid":"<20230522084906.1725082-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:06","name":"[COMMITTED] ada: prevent infinite recursion in Collect_Types_In_Hierarchy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084906.1725082-1-poulhies@adacore.com/mbox/"},{"id":97178,"url":"https://patchwork.plctlab.org/api/1.2/patches/97178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084914.1725248-1-poulhies@adacore.com/","msgid":"<20230522084914.1725248-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:14","name":"[COMMITTED] ada: update Ada_Version_Type in fe.h to match opt.ads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084914.1725248-1-poulhies@adacore.com/mbox/"},{"id":97179,"url":"https://patchwork.plctlab.org/api/1.2/patches/97179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084920.1725312-1-poulhies@adacore.com/","msgid":"<20230522084920.1725312-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:20","name":"[COMMITTED] ada: Update Controlling_Argument when copying trees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084920.1725312-1-poulhies@adacore.com/mbox/"},{"id":97181,"url":"https://patchwork.plctlab.org/api/1.2/patches/97181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084924.1725379-1-poulhies@adacore.com/","msgid":"<20230522084924.1725379-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:24","name":"[COMMITTED] ada: Don'\''t pretty-print DEL within expression images","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084924.1725379-1-poulhies@adacore.com/mbox/"},{"id":97180,"url":"https://patchwork.plctlab.org/api/1.2/patches/97180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084929.1725443-1-poulhies@adacore.com/","msgid":"<20230522084929.1725443-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:29","name":"[COMMITTED] ada: Restrict expression pretty-printer to subexpressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084929.1725443-1-poulhies@adacore.com/mbox/"},{"id":97185,"url":"https://patchwork.plctlab.org/api/1.2/patches/97185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084933.1725506-1-poulhies@adacore.com/","msgid":"<20230522084933.1725506-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:33","name":"[COMMITTED] ada: Fix traversal for the rightmost node of a pretty-printed expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084933.1725506-1-poulhies@adacore.com/mbox/"},{"id":97182,"url":"https://patchwork.plctlab.org/api/1.2/patches/97182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084938.1725583-1-poulhies@adacore.com/","msgid":"<20230522084938.1725583-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:38","name":"[COMMITTED] ada: Fix handling of constrained array declarations in declare-expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084938.1725583-1-poulhies@adacore.com/mbox/"},{"id":97188,"url":"https://patchwork.plctlab.org/api/1.2/patches/97188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084942.1725646-1-poulhies@adacore.com/","msgid":"<20230522084942.1725646-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:42","name":"[COMMITTED] ada: Fix double finalization in conditional exit statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084942.1725646-1-poulhies@adacore.com/mbox/"},{"id":97183,"url":"https://patchwork.plctlab.org/api/1.2/patches/97183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084945.1725711-1-poulhies@adacore.com/","msgid":"<20230522084945.1725711-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:45","name":"[COMMITTED] ada: Better error message if non-Ada2022 code declares No_Return function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084945.1725711-1-poulhies@adacore.com/mbox/"},{"id":97186,"url":"https://patchwork.plctlab.org/api/1.2/patches/97186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084950.1725774-1-poulhies@adacore.com/","msgid":"<20230522084950.1725774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:50","name":"[COMMITTED] ada: Reject illegal declarations in expression functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084950.1725774-1-poulhies@adacore.com/mbox/"},{"id":97189,"url":"https://patchwork.plctlab.org/api/1.2/patches/97189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084953.1725838-1-poulhies@adacore.com/","msgid":"<20230522084953.1725838-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:53","name":"[COMMITTED] ada: Fix error and crash on imported function with precondition and '\''Base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084953.1725838-1-poulhies@adacore.com/mbox/"},{"id":97187,"url":"https://patchwork.plctlab.org/api/1.2/patches/97187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084956.1725901-1-poulhies@adacore.com/","msgid":"<20230522084956.1725901-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:56","name":"[COMMITTED] ada: Implement conversions from Big_Integer to large types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084956.1725901-1-poulhies@adacore.com/mbox/"},{"id":97193,"url":"https://patchwork.plctlab.org/api/1.2/patches/97193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085001.1725965-1-poulhies@adacore.com/","msgid":"<20230522085001.1725965-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:01","name":"[COMMITTED] ada: Fix crash on Ada.Containers with No_Dispatching_Calls restriction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085001.1725965-1-poulhies@adacore.com/mbox/"},{"id":97184,"url":"https://patchwork.plctlab.org/api/1.2/patches/97184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085004.1726030-1-poulhies@adacore.com/","msgid":"<20230522085004.1726030-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:04","name":"[COMMITTED] ada: Add contracts to Ada.Strings.Unbounded library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085004.1726030-1-poulhies@adacore.com/mbox/"},{"id":97194,"url":"https://patchwork.plctlab.org/api/1.2/patches/97194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085010.1726096-1-poulhies@adacore.com/","msgid":"<20230522085010.1726096-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:10","name":"[COMMITTED] ada: Remove unreferenced utility routine Is_Actual_Tagged_Parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085010.1726096-1-poulhies@adacore.com/mbox/"},{"id":97198,"url":"https://patchwork.plctlab.org/api/1.2/patches/97198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085013.1726162-1-poulhies@adacore.com/","msgid":"<20230522085013.1726162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:13","name":"[COMMITTED] ada: Support calls through dereferences in Find_Actual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085013.1726162-1-poulhies@adacore.com/mbox/"},{"id":97201,"url":"https://patchwork.plctlab.org/api/1.2/patches/97201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085018.1726226-1-poulhies@adacore.com/","msgid":"<20230522085018.1726226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:18","name":"[COMMITTED] ada: Remove redundant protection against empty lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085018.1726226-1-poulhies@adacore.com/mbox/"},{"id":97191,"url":"https://patchwork.plctlab.org/api/1.2/patches/97191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085022.1726290-1-poulhies@adacore.com/","msgid":"<20230522085022.1726290-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:22","name":"[COMMITTED] ada: Remove a remaining reference to ?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085022.1726290-1-poulhies@adacore.com/mbox/"},{"id":97197,"url":"https://patchwork.plctlab.org/api/1.2/patches/97197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085029.1726354-1-poulhies@adacore.com/","msgid":"<20230522085029.1726354-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:29","name":"[COMMITTED] ada: Remove extra parentheses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085029.1726354-1-poulhies@adacore.com/mbox/"},{"id":97200,"url":"https://patchwork.plctlab.org/api/1.2/patches/97200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085034.1726417-1-poulhies@adacore.com/","msgid":"<20230522085034.1726417-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:34","name":"[COMMITTED] ada: Improve -gnatyx style check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085034.1726417-1-poulhies@adacore.com/mbox/"},{"id":97203,"url":"https://patchwork.plctlab.org/api/1.2/patches/97203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085039.1726481-1-poulhies@adacore.com/","msgid":"<20230522085039.1726481-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:39","name":"[COMMITTED] ada: Fix spurious warning on Inline_Always and contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085039.1726481-1-poulhies@adacore.com/mbox/"},{"id":97205,"url":"https://patchwork.plctlab.org/api/1.2/patches/97205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085043.1726552-1-poulhies@adacore.com/","msgid":"<20230522085043.1726552-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:43","name":"[COMMITTED] ada: Add warning on frontend inlining of Subprogram_Variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085043.1726552-1-poulhies@adacore.com/mbox/"},{"id":97199,"url":"https://patchwork.plctlab.org/api/1.2/patches/97199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085047.1726616-1-poulhies@adacore.com/","msgid":"<20230522085047.1726616-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:47","name":"[COMMITTED] ada: Accept Assert pragmas in expression functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085047.1726616-1-poulhies@adacore.com/mbox/"},{"id":97206,"url":"https://patchwork.plctlab.org/api/1.2/patches/97206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085051.1726679-1-poulhies@adacore.com/","msgid":"<20230522085051.1726679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:51","name":"[COMMITTED] ada: Add Is_Past_Self_Hiding_Point flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085051.1726679-1-poulhies@adacore.com/mbox/"},{"id":97208,"url":"https://patchwork.plctlab.org/api/1.2/patches/97208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085055.1726743-1-poulhies@adacore.com/","msgid":"<20230522085055.1726743-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:55","name":"[COMMITTED] ada: Cleanup redundant condition in resolution of entity names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085055.1726743-1-poulhies@adacore.com/mbox/"},{"id":97212,"url":"https://patchwork.plctlab.org/api/1.2/patches/97212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085059.1726810-1-poulhies@adacore.com/","msgid":"<20230522085059.1726810-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:59","name":"[COMMITTED] ada: Further fixes to GNATprove and CodePeer expression pretty-printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085059.1726810-1-poulhies@adacore.com/mbox/"},{"id":97202,"url":"https://patchwork.plctlab.org/api/1.2/patches/97202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085103.1726874-1-poulhies@adacore.com/","msgid":"<20230522085103.1726874-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:03","name":"[COMMITTED] ada: Fix spurious freezing error on nonabstract null extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085103.1726874-1-poulhies@adacore.com/mbox/"},{"id":97215,"url":"https://patchwork.plctlab.org/api/1.2/patches/97215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085109.1726939-1-poulhies@adacore.com/","msgid":"<20230522085109.1726939-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:09","name":"[COMMITTED] ada: Rename Is_Past_Self_Hiding_Point flag to be Is_Not_Self_Hidden","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085109.1726939-1-poulhies@adacore.com/mbox/"},{"id":97204,"url":"https://patchwork.plctlab.org/api/1.2/patches/97204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085113.1727006-1-poulhies@adacore.com/","msgid":"<20230522085113.1727006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:13","name":"[COMMITTED] ada: Fix missing finalization in library-unit instance spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085113.1727006-1-poulhies@adacore.com/mbox/"},{"id":97190,"url":"https://patchwork.plctlab.org/api/1.2/patches/97190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085117.1727069-1-poulhies@adacore.com/","msgid":"<20230522085117.1727069-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:17","name":"[COMMITTED] ada: Remove outdated part of comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085117.1727069-1-poulhies@adacore.com/mbox/"},{"id":97209,"url":"https://patchwork.plctlab.org/api/1.2/patches/97209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085122.1727132-1-poulhies@adacore.com/","msgid":"<20230522085122.1727132-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:22","name":"[COMMITTED] ada: Fix missing finalization in separate package body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085122.1727132-1-poulhies@adacore.com/mbox/"},{"id":97216,"url":"https://patchwork.plctlab.org/api/1.2/patches/97216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085128.1727196-1-poulhies@adacore.com/","msgid":"<20230522085128.1727196-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:28","name":"[COMMITTED] ada: Fix crash caused by incorrect expansion of iterated component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085128.1727196-1-poulhies@adacore.com/mbox/"},{"id":97217,"url":"https://patchwork.plctlab.org/api/1.2/patches/97217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085131.1727260-1-poulhies@adacore.com/","msgid":"<20230522085131.1727260-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:31","name":"[COMMITTED] ada: Incorrect constant folding in postcondition involving '\''Old","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085131.1727260-1-poulhies@adacore.com/mbox/"},{"id":97207,"url":"https://patchwork.plctlab.org/api/1.2/patches/97207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085135.1727328-1-poulhies@adacore.com/","msgid":"<20230522085135.1727328-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:35","name":"[COMMITTED] ada: Add missing word in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085135.1727328-1-poulhies@adacore.com/mbox/"},{"id":97195,"url":"https://patchwork.plctlab.org/api/1.2/patches/97195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085139.1727399-1-poulhies@adacore.com/","msgid":"<20230522085139.1727399-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:39","name":"[COMMITTED] ada: Fix source location for crashes in expanded Loop_Entry attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085139.1727399-1-poulhies@adacore.com/mbox/"},{"id":97213,"url":"https://patchwork.plctlab.org/api/1.2/patches/97213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085143.1727487-1-poulhies@adacore.com/","msgid":"<20230522085143.1727487-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:43","name":"[COMMITTED] ada: Use idiomatic construct in Expand_N_Package_Body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085143.1727487-1-poulhies@adacore.com/mbox/"},{"id":97214,"url":"https://patchwork.plctlab.org/api/1.2/patches/97214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085147.1727570-1-poulhies@adacore.com/","msgid":"<20230522085147.1727570-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:47","name":"[COMMITTED] ada: Small cleanup in support for protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085147.1727570-1-poulhies@adacore.com/mbox/"},{"id":97210,"url":"https://patchwork.plctlab.org/api/1.2/patches/97210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085152.1727635-1-poulhies@adacore.com/","msgid":"<20230522085152.1727635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:52","name":"[COMMITTED] ada: Avoid repeated calls when looking for first/last slocs of a node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085152.1727635-1-poulhies@adacore.com/mbox/"},{"id":97218,"url":"https://patchwork.plctlab.org/api/1.2/patches/97218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085158.1727700-1-poulhies@adacore.com/","msgid":"<20230522085158.1727700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:58","name":"[COMMITTED] ada: Reuse idiomatic procedure in CStand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085158.1727700-1-poulhies@adacore.com/mbox/"},{"id":97234,"url":"https://patchwork.plctlab.org/api/1.2/patches/97234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522100156.2294068-1-juzhe.zhong@rivai.ai/","msgid":"<20230522100156.2294068-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T10:01:56","name":"RISC-V: Fix typo of multiple_rgroup-2.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522100156.2294068-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97349,"url":"https://patchwork.plctlab.org/api/1.2/patches/97349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522120956.2833527-1-juzhe.zhong@rivai.ai/","msgid":"<20230522120956.2833527-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T12:09:56","name":"RISC-V: Add \"m_\" prefix for private member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522120956.2833527-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97411,"url":"https://patchwork.plctlab.org/api/1.2/patches/97411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522125149.30467-1-sebastian.huber@embedded-brains.de/","msgid":"<20230522125149.30467-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-05-22T12:51:49","name":"libgomp: Fix build for -fshort-enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522125149.30467-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":97433,"url":"https://patchwork.plctlab.org/api/1.2/patches/97433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn5h=262tGq2_SdhMKQON_hrCaTbPPRk7PQ=mcwoFGkpQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T13:25:21","name":"libiberty: On Windows pass a >32k cmdline through a response file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn5h=262tGq2_SdhMKQON_hrCaTbPPRk7PQ=mcwoFGkpQ@mail.gmail.com/mbox/"},{"id":97486,"url":"https://patchwork.plctlab.org/api/1.2/patches/97486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZKo5_-H4OBXGB=7353=tg0Mr8rYaWFbJ5HAKSFZdP30g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T14:36:26","name":"[COMMITTED] i386: Account for the memory read in V*QImode multiplication sequences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZKo5_-H4OBXGB=7353=tg0Mr8rYaWFbJ5HAKSFZdP30g@mail.gmail.com/mbox/"},{"id":97485,"url":"https://patchwork.plctlab.org/api/1.2/patches/97485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de/","msgid":"<8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de>","list_archive_url":null,"date":"2023-05-22T14:36:49","name":"[avr,testsuite,committed] Skip test that fail for avr for this or that reason.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de/mbox/"},{"id":97496,"url":"https://patchwork.plctlab.org/api/1.2/patches/97496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de/","msgid":"<3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de>","list_archive_url":null,"date":"2023-05-22T14:58:06","name":"[testsuite,committed] PR testsuite/52641","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de/mbox/"},{"id":97512,"url":"https://patchwork.plctlab.org/api/1.2/patches/97512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5868460.taCxCBeP46@minbar/","msgid":"<5868460.taCxCBeP46@minbar>","list_archive_url":null,"date":"2023-05-22T15:32:45","name":"[committed] libstdc++: Resolve -Wunused-variable warnings in stdx::simd and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5868460.taCxCBeP46@minbar/mbox/"},{"id":97514,"url":"https://patchwork.plctlab.org/api/1.2/patches/97514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/116291317.nniJfEyVGO@minbar/","msgid":"<116291317.nniJfEyVGO@minbar>","list_archive_url":null,"date":"2023-05-22T15:36:19","name":"libstdc++: Add missing constexpr to simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/116291317.nniJfEyVGO@minbar/mbox/"},{"id":97550,"url":"https://patchwork.plctlab.org/api/1.2/patches/97550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at/","msgid":"<2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-22T17:17:01","name":"[C,v3] Fix ICEs related to VM types in C 1/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at/mbox/"},{"id":97552,"url":"https://patchwork.plctlab.org/api/1.2/patches/97552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4357b98b6e61dc227db9b21e21e5878af6a7ceb.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-22T17:23:58","name":"[C,v3] Fix ICEs related to VM types in C 2/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4357b98b6e61dc227db9b21e21e5878af6a7ceb.camel@tugraz.at/mbox/"},{"id":97561,"url":"https://patchwork.plctlab.org/api/1.2/patches/97561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com/","msgid":"<79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-22T17:36:50","name":"[v3] rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com/mbox/"},{"id":97562,"url":"https://patchwork.plctlab.org/api/1.2/patches/97562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecc0245f-1b9d-bae5-75b6-aa4c444dc194@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-22T18:26:18","name":"[testsuite,committed] : PR52614: Fix more of the int=32 assumption fallout.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecc0245f-1b9d-bae5-75b6-aa4c444dc194@gjlay.de/mbox/"},{"id":97563,"url":"https://patchwork.plctlab.org/api/1.2/patches/97563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522183834.535767-1-aldyh@redhat.com/","msgid":"<20230522183834.535767-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:38:34","name":"[COMMITTED] Implement some miscellaneous zero accessors for Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522183834.535767-1-aldyh@redhat.com/mbox/"},{"id":97564,"url":"https://patchwork.plctlab.org/api/1.2/patches/97564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-1-aldyh@redhat.com/","msgid":"<20230522185622.537454-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:20","name":"Convert ipa_jump_func to use ipa_vr instead of a value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-1-aldyh@redhat.com/mbox/"},{"id":97566,"url":"https://patchwork.plctlab.org/api/1.2/patches/97566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-2-aldyh@redhat.com/","msgid":"<20230522185622.537454-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:21","name":"Implement ipa_vr hashing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-2-aldyh@redhat.com/mbox/"},{"id":97567,"url":"https://patchwork.plctlab.org/api/1.2/patches/97567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-3-aldyh@redhat.com/","msgid":"<20230522185622.537454-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:22","name":"Convert remaining uses of value_range in ipa-*.cc to Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-3-aldyh@redhat.com/mbox/"},{"id":97572,"url":"https://patchwork.plctlab.org/api/1.2/patches/97572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com/","msgid":"<366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-22T19:50:17","name":"[ver,2] rs6000: Fix __builtin_vec_xst_trunc definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com/mbox/"},{"id":97603,"url":"https://patchwork.plctlab.org/api/1.2/patches/97603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yea5_347p5s5ZZnGnPT54sXh5P82dSJ1Bpu0PegwixHQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T20:39:01","name":"[COMMITTED] i386: Adjust emulated integer vector mode shift costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yea5_347p5s5ZZnGnPT54sXh5P82dSJ1Bpu0PegwixHQ@mail.gmail.com/mbox/"},{"id":97612,"url":"https://patchwork.plctlab.org/api/1.2/patches/97612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com/","msgid":"<9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com>","list_archive_url":null,"date":"2023-05-22T20:50:54","name":"Replace __gnu_cxx::__ops::__negate with std::not_fn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com/mbox/"},{"id":97635,"url":"https://patchwork.plctlab.org/api/1.2/patches/97635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522214744.15211-1-iain@sandoe.co.uk/","msgid":"<20230522214744.15211-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-05-22T21:47:44","name":"[pushed] libobjc: Add local macros to support encode generation [P109913].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522214744.15211-1-iain@sandoe.co.uk/mbox/"},{"id":97644,"url":"https://patchwork.plctlab.org/api/1.2/patches/97644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522235841.inxggcczfaatu6ct@lug-owl.de/","msgid":"<20230522235841.inxggcczfaatu6ct@lug-owl.de>","list_archive_url":null,"date":"2023-05-22T23:58:41","name":"mcore: Fix sprintf length warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522235841.inxggcczfaatu6ct@lug-owl.de/mbox/"},{"id":97723,"url":"https://patchwork.plctlab.org/api/1.2/patches/97723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523044202.1201-1-jinma@linux.alibaba.com/","msgid":"<20230523044202.1201-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-23T04:42:02","name":"RISC-V: Add the option \"-mdisable-multilib-check\" to avoid multilib checks breaking the compilation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523044202.1201-1-jinma@linux.alibaba.com/mbox/"},{"id":97733,"url":"https://patchwork.plctlab.org/api/1.2/patches/97733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp/","msgid":"<5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-23T05:48:09","name":"[v2] xtensa: Optimize '\''(x & CST1_POW2) != 0 ? CST2_POW2 : 0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp/mbox/"},{"id":97734,"url":"https://patchwork.plctlab.org/api/1.2/patches/97734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523060804.61556-1-juzhe.zhong@rivai.ai/","msgid":"<20230523060804.61556-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T06:08:04","name":"RISC-V: Refactor the framework of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523060804.61556-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97750,"url":"https://patchwork.plctlab.org/api/1.2/patches/97750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com/","msgid":"<7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com>","list_archive_url":null,"date":"2023-05-23T06:52:38","name":"[wwwdocs,committed] projects/gomp: Link to GCC 13 impl. status as well","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com/mbox/"},{"id":97751,"url":"https://patchwork.plctlab.org/api/1.2/patches/97751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523065727.575169-1-aldyh@redhat.com/","msgid":"<20230523065727.575169-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-23T06:57:27","name":"[COMMITTED] Use delete[] in int_range destructor [PR109920]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523065727.575169-1-aldyh@redhat.com/mbox/"},{"id":97770,"url":"https://patchwork.plctlab.org/api/1.2/patches/97770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15963891.uLZWGnKmhe@minbar/","msgid":"<15963891.uLZWGnKmhe@minbar>","list_archive_url":null,"date":"2023-05-23T07:30:04","name":"[committed] Re: [PATCH] libstdc++: Add missing constexpr to simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15963891.uLZWGnKmhe@minbar/mbox/"},{"id":97828,"url":"https://patchwork.plctlab.org/api/1.2/patches/97828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080733.1872635-1-poulhies@adacore.com/","msgid":"<20230523080733.1872635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:33","name":"[COMMITTED] ada: Crash on dispatching primitive referencing limited-with type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080733.1872635-1-poulhies@adacore.com/mbox/"},{"id":97839,"url":"https://patchwork.plctlab.org/api/1.2/patches/97839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080737.1872700-1-poulhies@adacore.com/","msgid":"<20230523080737.1872700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:37","name":"[COMMITTED] ada: Remove duplicate comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080737.1872700-1-poulhies@adacore.com/mbox/"},{"id":97830,"url":"https://patchwork.plctlab.org/api/1.2/patches/97830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080742.1872762-1-poulhies@adacore.com/","msgid":"<20230523080742.1872762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:42","name":"[COMMITTED] ada: Minor fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080742.1872762-1-poulhies@adacore.com/mbox/"},{"id":97833,"url":"https://patchwork.plctlab.org/api/1.2/patches/97833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080744.1872824-1-poulhies@adacore.com/","msgid":"<20230523080744.1872824-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:44","name":"[COMMITTED] ada: Small code cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080744.1872824-1-poulhies@adacore.com/mbox/"},{"id":97863,"url":"https://patchwork.plctlab.org/api/1.2/patches/97863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080747.1872885-1-poulhies@adacore.com/","msgid":"<20230523080747.1872885-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:47","name":"[COMMITTED] ada: Suppress warning about Subprogram_Variant failing at run time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080747.1872885-1-poulhies@adacore.com/mbox/"},{"id":97854,"url":"https://patchwork.plctlab.org/api/1.2/patches/97854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080749.1872946-1-poulhies@adacore.com/","msgid":"<20230523080749.1872946-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:49","name":"[COMMITTED] ada: Fix expression pretty-printer for SPARK counterexamples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080749.1872946-1-poulhies@adacore.com/mbox/"},{"id":97843,"url":"https://patchwork.plctlab.org/api/1.2/patches/97843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080752.1873021-1-poulhies@adacore.com/","msgid":"<20230523080752.1873021-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:52","name":"[COMMITTED] ada: Transfer fix for pretty-printed parentheses from GNATprove to GNAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080752.1873021-1-poulhies@adacore.com/mbox/"},{"id":97868,"url":"https://patchwork.plctlab.org/api/1.2/patches/97868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080754.1873095-1-poulhies@adacore.com/","msgid":"<20230523080754.1873095-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:54","name":"[COMMITTED] ada: Remove special-case for parentheses in expansion for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080754.1873095-1-poulhies@adacore.com/mbox/"},{"id":97872,"url":"https://patchwork.plctlab.org/api/1.2/patches/97872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080756.1873165-1-poulhies@adacore.com/","msgid":"<20230523080756.1873165-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:56","name":"[COMMITTED] ada: Ignore accessibility actuals in expression pretty-printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080756.1873165-1-poulhies@adacore.com/mbox/"},{"id":97853,"url":"https://patchwork.plctlab.org/api/1.2/patches/97853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080759.1873226-1-poulhies@adacore.com/","msgid":"<20230523080759.1873226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:59","name":"[COMMITTED] ada: Revert to old pretty-printing of internal entities for CodePeer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080759.1873226-1-poulhies@adacore.com/mbox/"},{"id":97845,"url":"https://patchwork.plctlab.org/api/1.2/patches/97845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080802.1873289-1-poulhies@adacore.com/","msgid":"<20230523080802.1873289-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:02","name":"[COMMITTED] ada: Sync different variants of interrupt handler registration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080802.1873289-1-poulhies@adacore.com/mbox/"},{"id":97878,"url":"https://patchwork.plctlab.org/api/1.2/patches/97878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080806.1873350-1-poulhies@adacore.com/","msgid":"<20230523080806.1873350-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:06","name":"[COMMITTED] ada: Fix bogus error on predicated limited record declared in protected type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080806.1873350-1-poulhies@adacore.com/mbox/"},{"id":97867,"url":"https://patchwork.plctlab.org/api/1.2/patches/97867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080810.1873414-1-poulhies@adacore.com/","msgid":"<20230523080810.1873414-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:10","name":"[COMMITTED] ada: Fix internal error on quantified expression with predicated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080810.1873414-1-poulhies@adacore.com/mbox/"},{"id":97857,"url":"https://patchwork.plctlab.org/api/1.2/patches/97857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080814.1873488-1-poulhies@adacore.com/","msgid":"<20230523080814.1873488-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:14","name":"[COMMITTED] ada: Fix endings of pretty-printed numeric literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080814.1873488-1-poulhies@adacore.com/mbox/"},{"id":97862,"url":"https://patchwork.plctlab.org/api/1.2/patches/97862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080818.1873549-1-poulhies@adacore.com/","msgid":"<20230523080818.1873549-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:18","name":"[COMMITTED] ada: Add mention of what LSP stands for","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080818.1873549-1-poulhies@adacore.com/mbox/"},{"id":97884,"url":"https://patchwork.plctlab.org/api/1.2/patches/97884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080821.1873611-1-poulhies@adacore.com/","msgid":"<20230523080821.1873611-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:21","name":"[COMMITTED] ada: Turn assertions into defensive code in error locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080821.1873611-1-poulhies@adacore.com/mbox/"},{"id":97864,"url":"https://patchwork.plctlab.org/api/1.2/patches/97864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080824.1873672-1-poulhies@adacore.com/","msgid":"<20230523080824.1873672-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:24","name":"[COMMITTED] ada: Spurious errors on class-wide preconditions of private types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080824.1873672-1-poulhies@adacore.com/mbox/"},{"id":97890,"url":"https://patchwork.plctlab.org/api/1.2/patches/97890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080826.1873735-1-poulhies@adacore.com/","msgid":"<20230523080826.1873735-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:26","name":"[COMMITTED] ada: Remove the body of System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080826.1873735-1-poulhies@adacore.com/mbox/"},{"id":97873,"url":"https://patchwork.plctlab.org/api/1.2/patches/97873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080828.1873797-1-poulhies@adacore.com/","msgid":"<20230523080828.1873797-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:28","name":"[COMMITTED] ada: Facilitate proof of Interfaces.C.To_Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080828.1873797-1-poulhies@adacore.com/mbox/"},{"id":97869,"url":"https://patchwork.plctlab.org/api/1.2/patches/97869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080832.1873858-1-poulhies@adacore.com/","msgid":"<20230523080832.1873858-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:32","name":"[COMMITTED] ada: Add default value at initialization for CodePeer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080832.1873858-1-poulhies@adacore.com/mbox/"},{"id":97894,"url":"https://patchwork.plctlab.org/api/1.2/patches/97894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080834.1873919-1-poulhies@adacore.com/","msgid":"<20230523080834.1873919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:34","name":"[COMMITTED] ada: A discriminant of a variable is not a variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080834.1873919-1-poulhies@adacore.com/mbox/"},{"id":97838,"url":"https://patchwork.plctlab.org/api/1.2/patches/97838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080836.1873982-1-poulhies@adacore.com/","msgid":"<20230523080836.1873982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:36","name":"[COMMITTED] ada: Fix address arithmetic issues in the runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080836.1873982-1-poulhies@adacore.com/mbox/"},{"id":97896,"url":"https://patchwork.plctlab.org/api/1.2/patches/97896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080838.1874043-1-poulhies@adacore.com/","msgid":"<20230523080838.1874043-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:38","name":"[COMMITTED] ada: Fix address arithmetic issues in the expanded code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080838.1874043-1-poulhies@adacore.com/mbox/"},{"id":97892,"url":"https://patchwork.plctlab.org/api/1.2/patches/97892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080840.1874104-1-poulhies@adacore.com/","msgid":"<20230523080840.1874104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:40","name":"[COMMITTED] ada: Fix reference to Ada issue in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080840.1874104-1-poulhies@adacore.com/mbox/"},{"id":97877,"url":"https://patchwork.plctlab.org/api/1.2/patches/97877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080842.1874165-1-poulhies@adacore.com/","msgid":"<20230523080842.1874165-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:42","name":"[COMMITTED] ada: Remove unnecessary call to Detach.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080842.1874165-1-poulhies@adacore.com/mbox/"},{"id":97897,"url":"https://patchwork.plctlab.org/api/1.2/patches/97897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080845.1874226-1-poulhies@adacore.com/","msgid":"<20230523080845.1874226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:45","name":"[COMMITTED] ada: Fix resolution of mod operator of System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080845.1874226-1-poulhies@adacore.com/mbox/"},{"id":97882,"url":"https://patchwork.plctlab.org/api/1.2/patches/97882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080856.1874354-1-poulhies@adacore.com/","msgid":"<20230523080856.1874354-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:56","name":"[COMMITTED] ada: Fix oversight in latest change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080856.1874354-1-poulhies@adacore.com/mbox/"},{"id":97888,"url":"https://patchwork.plctlab.org/api/1.2/patches/97888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080858.1874416-1-poulhies@adacore.com/","msgid":"<20230523080858.1874416-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:58","name":"[COMMITTED] ada: Fix minor address arithmetic issues in System.Dwarf_Lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080858.1874416-1-poulhies@adacore.com/mbox/"},{"id":97852,"url":"https://patchwork.plctlab.org/api/1.2/patches/97852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080901.1874480-1-poulhies@adacore.com/","msgid":"<20230523080901.1874480-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:01","name":"[COMMITTED] ada: Add new switch -gnatyz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080901.1874480-1-poulhies@adacore.com/mbox/"},{"id":97891,"url":"https://patchwork.plctlab.org/api/1.2/patches/97891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080904.1874544-1-poulhies@adacore.com/","msgid":"<20230523080904.1874544-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:04","name":"[COMMITTED] ada: Update ghost code for proof of integer input functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080904.1874544-1-poulhies@adacore.com/mbox/"},{"id":97866,"url":"https://patchwork.plctlab.org/api/1.2/patches/97866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080906.1874606-1-poulhies@adacore.com/","msgid":"<20230523080906.1874606-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:06","name":"[COMMITTED] ada: Make string interpolation part of the core extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080906.1874606-1-poulhies@adacore.com/mbox/"},{"id":97861,"url":"https://patchwork.plctlab.org/api/1.2/patches/97861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080908.1874670-1-poulhies@adacore.com/","msgid":"<20230523080908.1874670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:08","name":"[COMMITTED] ada: Fix address manipulation issue in the tasking runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080908.1874670-1-poulhies@adacore.com/mbox/"},{"id":97893,"url":"https://patchwork.plctlab.org/api/1.2/patches/97893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080912.1874731-1-poulhies@adacore.com/","msgid":"<20230523080912.1874731-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:12","name":"[COMMITTED] ada: Fix latent issue in support for protected entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080912.1874731-1-poulhies@adacore.com/mbox/"},{"id":97871,"url":"https://patchwork.plctlab.org/api/1.2/patches/97871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080915.1874792-1-poulhies@adacore.com/","msgid":"<20230523080915.1874792-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:15","name":"[COMMITTED] ada: Cleanup inconsistent iteration over exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080915.1874792-1-poulhies@adacore.com/mbox/"},{"id":97870,"url":"https://patchwork.plctlab.org/api/1.2/patches/97870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080917.1874858-1-poulhies@adacore.com/","msgid":"<20230523080917.1874858-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:17","name":"[COMMITTED] ada: Add tags to warnings controlled by Warn_On_Redundant_Constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080917.1874858-1-poulhies@adacore.com/mbox/"},{"id":97895,"url":"https://patchwork.plctlab.org/api/1.2/patches/97895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080920.1874919-1-poulhies@adacore.com/","msgid":"<20230523080920.1874919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:20","name":"[COMMITTED] ada: Remove redundant parentheses from System.Stack_Checking.Operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080920.1874919-1-poulhies@adacore.com/mbox/"},{"id":97874,"url":"https://patchwork.plctlab.org/api/1.2/patches/97874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080922.1874982-1-poulhies@adacore.com/","msgid":"<20230523080922.1874982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:22","name":"[COMMITTED] ada: ICE on BIP call in class-wide function return within instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080922.1874982-1-poulhies@adacore.com/mbox/"},{"id":97876,"url":"https://patchwork.plctlab.org/api/1.2/patches/97876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080925.1875043-1-poulhies@adacore.com/","msgid":"<20230523080925.1875043-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:25","name":"[COMMITTED] ada: Rework fix for internal error on quantified expression with predicated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080925.1875043-1-poulhies@adacore.com/mbox/"},{"id":97883,"url":"https://patchwork.plctlab.org/api/1.2/patches/97883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080928.1875104-1-poulhies@adacore.com/","msgid":"<20230523080928.1875104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:28","name":"[COMMITTED] ada: Accept and analyze new aspect Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080928.1875104-1-poulhies@adacore.com/mbox/"},{"id":97909,"url":"https://patchwork.plctlab.org/api/1.2/patches/97909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523085618.241312-1-juzhe.zhong@rivai.ai/","msgid":"<20230523085618.241312-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T08:56:18","name":"[V2] RISC-V: Refactor the framework of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523085618.241312-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97934,"url":"https://patchwork.plctlab.org/api/1.2/patches/97934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523093407.3501163-1-christophe.lyon@linaro.org/","msgid":"<20230523093407.3501163-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-05-23T09:34:07","name":"testsuite, analyzer: Fix testcases with fclose","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523093407.3501163-1-christophe.lyon@linaro.org/mbox/"},{"id":97942,"url":"https://patchwork.plctlab.org/api/1.2/patches/97942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523095533.B1C0713588@imap2.suse-dmz.suse.de/","msgid":"<20230523095533.B1C0713588@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T09:55:33","name":"tree-optimization/109849 - missed code hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523095533.B1C0713588@imap2.suse-dmz.suse.de/mbox/"},{"id":97950,"url":"https://patchwork.plctlab.org/api/1.2/patches/97950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523100958.340512-1-juzhe.zhong@rivai.ai/","msgid":"<20230523100958.340512-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T10:09:58","name":"RISC-V: Fix warning of vxrm pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523100958.340512-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97957,"url":"https://patchwork.plctlab.org/api/1.2/patches/97957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz2rpc67.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T10:36:16","name":"[1/2] md: Allow to refer to the value of int iterator FOO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz2rpc67.fsf@arm.com/mbox/"},{"id":97956,"url":"https://patchwork.plctlab.org/api/1.2/patches/97956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cszpc4d.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T10:37:22","name":"[2/2] aarch64: Provide FPR alternatives for some bit insertions [PR109632]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cszpc4d.fsf@arm.com/mbox/"},{"id":97959,"url":"https://patchwork.plctlab.org/api/1.2/patches/97959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523105643.18F4F13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523105643.18F4F13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T10:56:42","name":"Dump ANTIC_OUT before pruning it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523105643.18F4F13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":97983,"url":"https://patchwork.plctlab.org/api/1.2/patches/97983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de/","msgid":"<6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de>","list_archive_url":null,"date":"2023-05-23T12:55:45","name":": Implement PR104327 for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de/mbox/"},{"id":97985,"url":"https://patchwork.plctlab.org/api/1.2/patches/97985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523125836.642394-1-aldyh@redhat.com/","msgid":"<20230523125836.642394-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-23T12:58:36","name":"[COMMITTED] Remove buggy special case in irange::invert [PR109934].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523125836.642394-1-aldyh@redhat.com/mbox/"},{"id":97996,"url":"https://patchwork.plctlab.org/api/1.2/patches/97996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523135007.682279-1-juzhe.zhong@rivai.ai/","msgid":"<20230523135007.682279-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T13:50:07","name":"[V2] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523135007.682279-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98027,"url":"https://patchwork.plctlab.org/api/1.2/patches/98027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523143412.184530-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230523143412.184530-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-05-23T14:34:12","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523143412.184530-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":98023,"url":"https://patchwork.plctlab.org/api/1.2/patches/98023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523144145.315887-1-christophe.lyon@linaro.org/","msgid":"<20230523144145.315887-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-05-23T14:41:45","name":"[arm] testsuite: make mve_intrinsic_type_overloads-int.c libc-agnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523144145.315887-1-christophe.lyon@linaro.org/mbox/"},{"id":98029,"url":"https://patchwork.plctlab.org/api/1.2/patches/98029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523150446.699745-1-juzhe.zhong@rivai.ai/","msgid":"<20230523150446.699745-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T15:04:46","name":"[V3] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523150446.699745-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98043,"url":"https://patchwork.plctlab.org/api/1.2/patches/98043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151548.622FF13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151548.622FF13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:15:48","name":"Generic vector op costing adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151548.622FF13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98045,"url":"https://patchwork.plctlab.org/api/1.2/patches/98045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151803.3428B13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151803.3428B13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:18:02","name":"tree-optimization/109747 - SLP cost of CTORs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151803.3428B13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98046,"url":"https://patchwork.plctlab.org/api/1.2/patches/98046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151845.D26C213A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151845.D26C213A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:18:45","name":"Account for vector splat GPR->XMM move cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151845.D26C213A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98072,"url":"https://patchwork.plctlab.org/api/1.2/patches/98072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YGYGTgt7WqfNLK4dOX16=c+axq2n5_EyGxB9D8+AyWbA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T16:02:09","name":"[COMMITTED] i386: Add V8QI and V4QImode partial vector shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YGYGTgt7WqfNLK4dOX16=c+axq2n5_EyGxB9D8+AyWbA@mail.gmail.com/mbox/"},{"id":98086,"url":"https://patchwork.plctlab.org/api/1.2/patches/98086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da686a99-84a5-e733-0029-94c11c96a377@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-23T16:57:49","name":"[avr,committed] Fix cost computation for bit insertions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da686a99-84a5-e733-0029-94c11c96a377@gjlay.de/mbox/"},{"id":98127,"url":"https://patchwork.plctlab.org/api/1.2/patches/98127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com/","msgid":"<075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-23T18:30:19","name":"PR middle-end/109840: Preserve popcount/parity type in match.pd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com/mbox/"},{"id":98153,"url":"https://patchwork.plctlab.org/api/1.2/patches/98153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523194114.56310-1-kmatsui@cs.washington.edu/","msgid":"<20230523194114.56310-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-05-23T19:41:14","name":"libstdc++: use using instead of typedef for type_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523194114.56310-1-kmatsui@cs.washington.edu/mbox/"},{"id":98154,"url":"https://patchwork.plctlab.org/api/1.2/patches/98154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMORuCuONZGQEzATJh3T0aqidjoki=gZZLsT7EJMA_KKA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T19:46:59","name":"RISC-V: Use extension instructions instead of bitwise \"and\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMORuCuONZGQEzATJh3T0aqidjoki=gZZLsT7EJMA_KKA@mail.gmail.com/mbox/"},{"id":98186,"url":"https://patchwork.plctlab.org/api/1.2/patches/98186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6920882.e9J7NaK4W3@minbar/","msgid":"<6920882.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-05-23T21:57:22","name":"libstdc++: Add missing constexpr to simd_neon","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6920882.e9J7NaK4W3@minbar/mbox/"},{"id":98199,"url":"https://patchwork.plctlab.org/api/1.2/patches/98199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523231601.2130715-1-apinski@marvell.com/","msgid":"<20230523231601.2130715-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-23T23:16:01","name":"Dump if a pattern fails after having printed applying it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523231601.2130715-1-apinski@marvell.com/mbox/"},{"id":98231,"url":"https://patchwork.plctlab.org/api/1.2/patches/98231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524011323.1046670-1-juzhe.zhong@rivai.ai/","msgid":"<20230524011323.1046670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:13:23","name":"RISC-V: Fix magic number of RVV auto-vectorization expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524011323.1046670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98235,"url":"https://patchwork.plctlab.org/api/1.2/patches/98235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524012848.1097889-1-juzhe.zhong@rivai.ai/","msgid":"<20230524012848.1097889-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:28:48","name":"[V2] RISC-V: Fix magic number of RVV auto-vectorization expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524012848.1097889-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98241,"url":"https://patchwork.plctlab.org/api/1.2/patches/98241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524015727.1157568-1-juzhe.zhong@rivai.ai/","msgid":"<20230524015727.1157568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:57:27","name":"RISC-V: Fix incorrect code of touching inaccessible memory address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524015727.1157568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98252,"url":"https://patchwork.plctlab.org/api/1.2/patches/98252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524023851.1440077-1-juzhe.zhong@rivai.ai/","msgid":"<20230524023851.1440077-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T02:38:51","name":"[V2] RISC-V: Fix incorrect code of reaching inaccessible memory address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524023851.1440077-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98256,"url":"https://patchwork.plctlab.org/api/1.2/patches/98256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524031154.1533363-1-juzhe.zhong@rivai.ai/","msgid":"<20230524031154.1533363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T03:11:54","name":"[V4] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524031154.1533363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98263,"url":"https://patchwork.plctlab.org/api/1.2/patches/98263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524032917.1598882-1-juzhe.zhong@rivai.ai/","msgid":"<20230524032917.1598882-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T03:29:17","name":"[V5] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524032917.1598882-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98289,"url":"https://patchwork.plctlab.org/api/1.2/patches/98289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz2qqptg.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:08:27","name":"Check for sysconf decl on vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz2qqptg.fsf@lxoliva.fsfla.org/mbox/"},{"id":98290,"url":"https://patchwork.plctlab.org/api/1.2/patches/98290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8rdeqpgh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:16:14","name":"[testsuite] tsvc: skip include malloc.h when unavailable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8rdeqpgh.fsf@lxoliva.fsfla.org/mbox/"},{"id":98291,"url":"https://patchwork.plctlab.org/api/1.2/patches/98291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jo2qpcu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:18:25","name":"[testsuite] require pic for pr103074.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jo2qpcu.fsf@lxoliva.fsfla.org/mbox/"},{"id":98292,"url":"https://patchwork.plctlab.org/api/1.2/patches/98292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg5upaqt.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:19:22","name":"[testsuite] require pthread for openmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg5upaqt.fsf@lxoliva.fsfla.org/mbox/"},{"id":98293,"url":"https://patchwork.plctlab.org/api/1.2/patches/98293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8gipaox.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:20:30","name":"[testsuite] require profiling for -pg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8gipaox.fsf@lxoliva.fsfla.org/mbox/"},{"id":98294,"url":"https://patchwork.plctlab.org/api/1.2/patches/98294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0r6paik.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:24:19","name":"[testsuite,i386] enable sse2 for signbit-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0r6paik.fsf@lxoliva.fsfla.org/mbox/"},{"id":98297,"url":"https://patchwork.plctlab.org/api/1.2/patches/98297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilcip9nk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:42:55","name":"[testsuite,ppc] xfail uninit-pred-9_b bogus warn on ppc32 too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilcip9nk.fsf@lxoliva.fsfla.org/mbox/"},{"id":98299,"url":"https://patchwork.plctlab.org/api/1.2/patches/98299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredn6p9gk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:47:07","name":"[x86] reenable dword MOVE_MAX for better memmove inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredn6p9gk.fsf@lxoliva.fsfla.org/mbox/"},{"id":98300,"url":"https://patchwork.plctlab.org/api/1.2/patches/98300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5xup9e3.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:48:36","name":"[testsuite,x86] cope with --enable-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5xup9e3.fsf@lxoliva.fsfla.org/mbox/"},{"id":98301,"url":"https://patchwork.plctlab.org/api/1.2/patches/98301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y8ip9ba.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:50:17","name":"[libstdc++,testsuite] xfail to_chars/long_double on x86-vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y8ip9ba.fsf@lxoliva.fsfla.org/mbox/"},{"id":98302,"url":"https://patchwork.plctlab.org/api/1.2/patches/98302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qj6p98w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:51:43","name":"[testsuite,powerpc] adjust -m32 counts for fold-vec-extract*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qj6p98w.fsf@lxoliva.fsfla.org/mbox/"},{"id":98303,"url":"https://patchwork.plctlab.org/api/1.2/patches/98303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524060407.19181-1-chenglulu@loongson.cn/","msgid":"<20230524060407.19181-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-05-24T06:04:08","name":"LoongArch: Fix the problem of structure parameter passing in C++. This structure has empty structure members and less than three floating point members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524060407.19181-1-chenglulu@loongson.cn/mbox/"},{"id":98321,"url":"https://patchwork.plctlab.org/api/1.2/patches/98321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt353mmdjy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T06:46:57","name":"early-remat: Resync with new DF postorders [PR109940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt353mmdjy.fsf@arm.com/mbox/"},{"id":98326,"url":"https://patchwork.plctlab.org/api/1.2/patches/98326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524070329.1163656-1-juzhe.zhong@rivai.ai/","msgid":"<20230524070329.1163656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T07:03:29","name":"RISC-V: Add RVV mask logic auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524070329.1163656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98350,"url":"https://patchwork.plctlab.org/api/1.2/patches/98350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524072723.1387346-1-juzhe.zhong@rivai.ai/","msgid":"<20230524072723.1387346-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T07:27:23","name":"[V2,COMMITTED] RISC-V: Add RVV mask logic auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524072723.1387346-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98416,"url":"https://patchwork.plctlab.org/api/1.2/patches/98416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"<200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:11","name":"[v3,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98415,"url":"https://patchwork.plctlab.org/api/1.2/patches/98415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"<8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:13","name":"[v3,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98418,"url":"https://patchwork.plctlab.org/api/1.2/patches/98418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7124194404595352049d5779c4e4b9379fb3167.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:15","name":"[v3,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7124194404595352049d5779c4e4b9379fb3167.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98414,"url":"https://patchwork.plctlab.org/api/1.2/patches/98414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0d7d2d1cbea94f44064714a84115a4797c1342b.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:16","name":"[v3,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0d7d2d1cbea94f44064714a84115a4797c1342b.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98413,"url":"https://patchwork.plctlab.org/api/1.2/patches/98413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa4c1d8e2fdaa7929bfd2f728396a1eee1ff1be8.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:18","name":"[v3,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa4c1d8e2fdaa7929bfd2f728396a1eee1ff1be8.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98417,"url":"https://patchwork.plctlab.org/api/1.2/patches/98417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:19","name":"[v3,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98419,"url":"https://patchwork.plctlab.org/api/1.2/patches/98419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:21","name":"[v3,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98420,"url":"https://patchwork.plctlab.org/api/1.2/patches/98420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:22","name":"[v3,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98421,"url":"https://patchwork.plctlab.org/api/1.2/patches/98421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:24","name":"[v3,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98423,"url":"https://patchwork.plctlab.org/api/1.2/patches/98423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2883909.e9J7NaK4W3@fomalhaut/","msgid":"<2883909.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2023-05-24T09:54:41","name":"Fix artificial overflow during GENERIC folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2883909.e9J7NaK4W3@fomalhaut/mbox/"},{"id":98430,"url":"https://patchwork.plctlab.org/api/1.2/patches/98430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524101445.E7EC63857708@sourceware.org/","msgid":"<20230524101445.E7EC63857708@sourceware.org>","list_archive_url":null,"date":"2023-05-24T10:13:57","name":"target/109944 - avoid STLF fail for V16QImode CTOR expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524101445.E7EC63857708@sourceware.org/mbox/"},{"id":98440,"url":"https://patchwork.plctlab.org/api/1.2/patches/98440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13148454.CDJkKcVGEf@minbar/","msgid":"<13148454.CDJkKcVGEf@minbar>","list_archive_url":null,"date":"2023-05-24T10:58:19","name":"libstdc++: Fix SFINAE for __is_intrinsic_type on ARM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13148454.CDJkKcVGEf@minbar/mbox/"},{"id":98446,"url":"https://patchwork.plctlab.org/api/1.2/patches/98446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111933.3A9FC3857720@sourceware.org/","msgid":"<20230524111933.3A9FC3857720@sourceware.org>","list_archive_url":null,"date":"2023-05-24T11:18:47","name":"tree-optimization/109849 - fix fallout of PRE hoisting change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111933.3A9FC3857720@sourceware.org/mbox/"},{"id":98447,"url":"https://patchwork.plctlab.org/api/1.2/patches/98447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111902.248450-1-juzhe.zhong@rivai.ai/","msgid":"<20230524111902.248450-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T11:19:02","name":"RISC-V: Add FRM_ prefix to dynamic rounding mode enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111902.248450-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98450,"url":"https://patchwork.plctlab.org/api/1.2/patches/98450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524112614.258594-1-juzhe.zhong@rivai.ai/","msgid":"<20230524112614.258594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T11:26:14","name":"RISC-V: Remove FRM_REGNUM dependency for rtx conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524112614.258594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98462,"url":"https://patchwork.plctlab.org/api/1.2/patches/98462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi/","msgid":"<76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-05-24T12:21:22","name":"Use expandargv on gcc-ar [PR77576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi/mbox/"},{"id":98470,"url":"https://patchwork.plctlab.org/api/1.2/patches/98470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec30da59-e022-905d-c710-3b1223ff7712@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T12:42:07","name":"[COMMITTED,1/3] PR tree-optimization/109695 - Choose better initial values for ranger.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec30da59-e022-905d-c710-3b1223ff7712@redhat.com/mbox/"},{"id":98473,"url":"https://patchwork.plctlab.org/api/1.2/patches/98473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com/","msgid":"<74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com>","list_archive_url":null,"date":"2023-05-24T12:42:21","name":"[COMMITTED,2/3] PR tree-optimization/109695 - Use negative values to reflect always_current in the, temporal cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com/mbox/"},{"id":98472,"url":"https://patchwork.plctlab.org/api/1.2/patches/98472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com/","msgid":"<419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com>","list_archive_url":null,"date":"2023-05-24T12:42:27","name":"[COMMITTED,3/3] PR tree-optimization/109695 - Only update global value if it changes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com/mbox/"},{"id":98482,"url":"https://patchwork.plctlab.org/api/1.2/patches/98482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524125332.30839-1-amonakov@ispras.ru/","msgid":"<20230524125332.30839-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-24T12:53:32","name":"doc: clarify semantics of vector bitwise shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524125332.30839-1-amonakov@ispras.ru/mbox/"},{"id":98520,"url":"https://patchwork.plctlab.org/api/1.2/patches/98520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YpKfOOwCwLH=qscZECsXcuyoN7qd7sFB0aQq-iAcBuHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T14:20:14","name":"[COMMITTED] i386: Add vv4qi3 expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YpKfOOwCwLH=qscZECsXcuyoN7qd7sFB0aQq-iAcBuHA@mail.gmail.com/mbox/"},{"id":98521,"url":"https://patchwork.plctlab.org/api/1.2/patches/98521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524142941.6838-1-juzhe.zhong@rivai.ai/","msgid":"<20230524142941.6838-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T14:29:41","name":"[V13] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524142941.6838-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98528,"url":"https://patchwork.plctlab.org/api/1.2/patches/98528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524144801.73537-1-juzhe.zhong@rivai.ai/","msgid":"<20230524144801.73537-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T14:48:01","name":"[V14] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524144801.73537-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98544,"url":"https://patchwork.plctlab.org/api/1.2/patches/98544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7719656.MHq7AAxBmi@minbar/","msgid":"<7719656.MHq7AAxBmi@minbar>","list_archive_url":null,"date":"2023-05-24T15:04:32","name":"libstdc++: Fix type of first argument to vec_cntm call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7719656.MHq7AAxBmi@minbar/mbox/"},{"id":98637,"url":"https://patchwork.plctlab.org/api/1.2/patches/98637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com/","msgid":"<7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com>","list_archive_url":null,"date":"2023-05-24T17:32:06","name":"[v3] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com/mbox/"},{"id":98639,"url":"https://patchwork.plctlab.org/api/1.2/patches/98639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com/","msgid":"<07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-24T17:54:06","name":"[i386] A minor code clean-up: Use NULL_RTX instead of nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com/mbox/"},{"id":98648,"url":"https://patchwork.plctlab.org/api/1.2/patches/98648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524184147.168078-1-aldyh@redhat.com/","msgid":"<20230524184147.168078-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-24T18:41:47","name":"[COMMITTED] Remove deprecated vrange::kind().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524184147.168078-1-aldyh@redhat.com/mbox/"},{"id":98660,"url":"https://patchwork.plctlab.org/api/1.2/patches/98660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524185559.1285583-1-jason@redhat.com/","msgid":"<20230524185559.1285583-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-24T18:55:59","name":"[RFC] c++: use __cxa_call_terminate for MUST_NOT_THROW [PR97720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524185559.1285583-1-jason@redhat.com/mbox/"},{"id":98662,"url":"https://patchwork.plctlab.org/api/1.2/patches/98662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d99cc8a9-1e19-4b84-89aa-f8a2c36b6ae1-1684955762561@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-05-24T19:16:02","name":"Fortran: reject bad DIM argument of SIZE intrinsic in simplification [PR104350]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d99cc8a9-1e19-4b84-89aa-f8a2c36b6ae1-1684955762561@3c-app-gmx-bap32/mbox/"},{"id":98672,"url":"https://patchwork.plctlab.org/api/1.2/patches/98672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce8b586f-119d-4589-be0e-cde57b7a609d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T21:19:07","name":"[COMMITTED,1/4] - Make ssa_cache and ssa_lazy_cache virtual.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce8b586f-119d-4589-be0e-cde57b7a609d@redhat.com/mbox/"},{"id":98675,"url":"https://patchwork.plctlab.org/api/1.2/patches/98675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com/","msgid":"<5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:21","name":"[COMMITTED,2/4] - Make ssa_cache a range_query.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com/mbox/"},{"id":98673,"url":"https://patchwork.plctlab.org/api/1.2/patches/98673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com/","msgid":"<92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:39","name":"[COMMITTED,3/4] Provide relation queries for a stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com/mbox/"},{"id":98674,"url":"https://patchwork.plctlab.org/api/1.2/patches/98674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com/","msgid":"<6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:52","name":"[COMMITTED,4/4] - Gimple range PHI analyzer and testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com/mbox/"},{"id":98720,"url":"https://patchwork.plctlab.org/api/1.2/patches/98720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOjw7vr0+OjTN4BB0DZ6=egk4r81affnLAXD0-xKwDpVQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T23:14:48","name":"[RFC] RISC-V: Eliminate extension after for *w instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOjw7vr0+OjTN4BB0DZ6=egk4r81affnLAXD0-xKwDpVQ@mail.gmail.com/mbox/"},{"id":98722,"url":"https://patchwork.plctlab.org/api/1.2/patches/98722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524233005.3284950-1-lili.cui@intel.com/","msgid":"<20230524233005.3284950-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-24T23:30:05","name":"Handle FMA friendly in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524233005.3284950-1-lili.cui@intel.com/mbox/"},{"id":98733,"url":"https://patchwork.plctlab.org/api/1.2/patches/98733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-2-qing.zhao@oracle.com/","msgid":"<20230525012255.2807393-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-25T01:22:54","name":"[1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-2-qing.zhao@oracle.com/mbox/"},{"id":98734,"url":"https://patchwork.plctlab.org/api/1.2/patches/98734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-3-qing.zhao@oracle.com/","msgid":"<20230525012255.2807393-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-25T01:22:55","name":"[2/2] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-3-qing.zhao@oracle.com/mbox/"},{"id":98755,"url":"https://patchwork.plctlab.org/api/1.2/patches/98755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025439.3362655-1-lin1.hu@intel.com/","msgid":"<20230525025439.3362655-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-05-25T02:54:39","name":"i386: Fix incorrect intrinsic signature for AVX512 s{lli|rai|rli}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025439.3362655-1-lin1.hu@intel.com/mbox/"},{"id":98757,"url":"https://patchwork.plctlab.org/api/1.2/patches/98757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025813.1232463-1-juzhe.zhong@rivai.ai/","msgid":"<20230525025813.1232463-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T02:58:13","name":"[V15] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025813.1232463-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98760,"url":"https://patchwork.plctlab.org/api/1.2/patches/98760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525030920.2569553-1-pan2.li@intel.com/","msgid":"<20230525030920.2569553-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-25T03:09:20","name":"[v6] RISC-V: Using merge approach to optimize repeating sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525030920.2569553-1-pan2.li@intel.com/mbox/"},{"id":98919,"url":"https://patchwork.plctlab.org/api/1.2/patches/98919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525044342.3815571-1-naveenh@marvell.com/","msgid":"<20230525044342.3815571-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T04:43:42","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525044342.3815571-1-naveenh@marvell.com/mbox/"},{"id":98918,"url":"https://patchwork.plctlab.org/api/1.2/patches/98918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525045147.3815773-1-naveenh@marvell.com/","msgid":"<20230525045147.3815773-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T04:51:47","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525045147.3815773-1-naveenh@marvell.com/mbox/"},{"id":98920,"url":"https://patchwork.plctlab.org/api/1.2/patches/98920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525050750.3816032-1-naveenh@marvell.com/","msgid":"<20230525050750.3816032-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T05:07:50","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525050750.3816032-1-naveenh@marvell.com/mbox/"},{"id":98921,"url":"https://patchwork.plctlab.org/api/1.2/patches/98921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525052029.3816261-1-naveenh@marvell.com/","msgid":"<20230525052029.3816261-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T05:20:29","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525052029.3816261-1-naveenh@marvell.com/mbox/"},{"id":98783,"url":"https://patchwork.plctlab.org/api/1.2/patches/98783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-1-aldyh@redhat.com/","msgid":"<20230525053520.244673-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:17","name":"[COMMITTED] Add an frange::set_nan() variant that takes a nan_state.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-1-aldyh@redhat.com/mbox/"},{"id":98784,"url":"https://patchwork.plctlab.org/api/1.2/patches/98784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-2-aldyh@redhat.com/","msgid":"<20230525053520.244673-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:18","name":"[COMMITTED] Hash known NANs correctly for franges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-2-aldyh@redhat.com/mbox/"},{"id":98785,"url":"https://patchwork.plctlab.org/api/1.2/patches/98785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-3-aldyh@redhat.com/","msgid":"<20230525053520.244673-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:19","name":"[COMMITTED] Disallow setting of NANs in frange setter unless setting trees.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-3-aldyh@redhat.com/mbox/"},{"id":98787,"url":"https://patchwork.plctlab.org/api/1.2/patches/98787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-4-aldyh@redhat.com/","msgid":"<20230525053520.244673-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:20","name":"[COMMITTED] Stream out NANs correctly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-4-aldyh@redhat.com/mbox/"},{"id":98798,"url":"https://patchwork.plctlab.org/api/1.2/patches/98798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525064806.1676311-1-juzhe.zhong@rivai.ai/","msgid":"<20230525064806.1676311-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T06:48:06","name":"RISC-V: Fix incorrect VXRM configuration in mode switching for CALL and ASM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525064806.1676311-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98922,"url":"https://patchwork.plctlab.org/api/1.2/patches/98922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065320.3816623-1-naveenh@marvell.com/","msgid":"<20230525065320.3816623-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T06:53:20","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065320.3816623-1-naveenh@marvell.com/mbox/"},{"id":98800,"url":"https://patchwork.plctlab.org/api/1.2/patches/98800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065824.3816727-1-naveenh@marvell.com/","msgid":"<20230525065824.3816727-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T06:58:24","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065824.3816727-1-naveenh@marvell.com/mbox/"},{"id":98802,"url":"https://patchwork.plctlab.org/api/1.2/patches/98802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065957.1872100-1-juzhe.zhong@rivai.ai/","msgid":"<20230525065957.1872100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T06:59:57","name":"[V2] RISC-V: Fix incorrect VXRM configuration in mode switching for CALL and ASM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065957.1872100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98835,"url":"https://patchwork.plctlab.org/api/1.2/patches/98835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525075406.270194-1-juzhe.zhong@rivai.ai/","msgid":"<20230525075406.270194-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T07:54:06","name":"RISC-V: Add RVV FRM enum for floating-point rounding mode intriniscs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525075406.270194-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98837,"url":"https://patchwork.plctlab.org/api/1.2/patches/98837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080507.1955270-1-poulhies@adacore.com/","msgid":"<20230525080507.1955270-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:07","name":"[COMMITTED] ada: Restrict use of formal parameters within exceptional cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080507.1955270-1-poulhies@adacore.com/mbox/"},{"id":98839,"url":"https://patchwork.plctlab.org/api/1.2/patches/98839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080519.1955422-1-poulhies@adacore.com/","msgid":"<20230525080519.1955422-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:19","name":"[COMMITTED] ada: Fix SPARK context not restored when Load_Unit is failing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080519.1955422-1-poulhies@adacore.com/mbox/"},{"id":98841,"url":"https://patchwork.plctlab.org/api/1.2/patches/98841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080520.1955484-1-poulhies@adacore.com/","msgid":"<20230525080520.1955484-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:20","name":"[COMMITTED] ada: Fix obsolete comment in Sinfo.Utils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080520.1955484-1-poulhies@adacore.com/mbox/"},{"id":98845,"url":"https://patchwork.plctlab.org/api/1.2/patches/98845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080522.1955545-1-poulhies@adacore.com/","msgid":"<20230525080522.1955545-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:22","name":"[COMMITTED] ada: Fix incorrect handling of Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080522.1955545-1-poulhies@adacore.com/mbox/"},{"id":98836,"url":"https://patchwork.plctlab.org/api/1.2/patches/98836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080524.1955610-1-poulhies@adacore.com/","msgid":"<20230525080524.1955610-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:24","name":"[COMMITTED] ada: Accept aliased parameters in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080524.1955610-1-poulhies@adacore.com/mbox/"},{"id":98840,"url":"https://patchwork.plctlab.org/api/1.2/patches/98840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080526.1955679-1-poulhies@adacore.com/","msgid":"<20230525080526.1955679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:26","name":"[COMMITTED] ada: Tune warning about assignment just before a raise statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080526.1955679-1-poulhies@adacore.com/mbox/"},{"id":98838,"url":"https://patchwork.plctlab.org/api/1.2/patches/98838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080528.1955789-1-poulhies@adacore.com/","msgid":"<20230525080528.1955789-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:28","name":"[COMMITTED] ada: Minor fixes in description of scope depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080528.1955789-1-poulhies@adacore.com/mbox/"},{"id":98850,"url":"https://patchwork.plctlab.org/api/1.2/patches/98850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080530.1955851-1-poulhies@adacore.com/","msgid":"<20230525080530.1955851-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:30","name":"[COMMITTED] ada: Add Entry_Cancel_Parameter to E_Label","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080530.1955851-1-poulhies@adacore.com/mbox/"},{"id":98844,"url":"https://patchwork.plctlab.org/api/1.2/patches/98844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080531.1955918-1-poulhies@adacore.com/","msgid":"<20230525080531.1955918-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:31","name":"[COMMITTED] ada: Handle controlling access parameters in DTWs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080531.1955918-1-poulhies@adacore.com/mbox/"},{"id":98853,"url":"https://patchwork.plctlab.org/api/1.2/patches/98853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080533.1955979-1-poulhies@adacore.com/","msgid":"<20230525080533.1955979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:33","name":"[COMMITTED] ada: Set Is_Not_Self_Hidden flag in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080533.1955979-1-poulhies@adacore.com/mbox/"},{"id":98842,"url":"https://patchwork.plctlab.org/api/1.2/patches/98842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080535.1956040-1-poulhies@adacore.com/","msgid":"<20230525080535.1956040-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:35","name":"[COMMITTED] ada: Reduce span of variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080535.1956040-1-poulhies@adacore.com/mbox/"},{"id":98859,"url":"https://patchwork.plctlab.org/api/1.2/patches/98859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080537.1956101-1-poulhies@adacore.com/","msgid":"<20230525080537.1956101-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:37","name":"[COMMITTED] ada: Maximize use of existing constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080537.1956101-1-poulhies@adacore.com/mbox/"},{"id":98849,"url":"https://patchwork.plctlab.org/api/1.2/patches/98849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080539.1956162-1-poulhies@adacore.com/","msgid":"<20230525080539.1956162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:38","name":"[COMMITTED] ada: Enrich documentation of subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080539.1956162-1-poulhies@adacore.com/mbox/"},{"id":98865,"url":"https://patchwork.plctlab.org/api/1.2/patches/98865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080542.1956225-1-poulhies@adacore.com/","msgid":"<20230525080542.1956225-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:42","name":"[COMMITTED] ada: Fix copy-paste mistake in analysis of Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080542.1956225-1-poulhies@adacore.com/mbox/"},{"id":98856,"url":"https://patchwork.plctlab.org/api/1.2/patches/98856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080543.1956286-1-poulhies@adacore.com/","msgid":"<20230525080543.1956286-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:43","name":"[COMMITTED] ada: Small tweak to implementation of by-copy semantics for storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080543.1956286-1-poulhies@adacore.com/mbox/"},{"id":98862,"url":"https://patchwork.plctlab.org/api/1.2/patches/98862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080545.1956348-1-poulhies@adacore.com/","msgid":"<20230525080545.1956348-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:45","name":"[COMMITTED] ada: Remove redundant guards from calls to Move_Aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080545.1956348-1-poulhies@adacore.com/mbox/"},{"id":98857,"url":"https://patchwork.plctlab.org/api/1.2/patches/98857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080547.1956409-1-poulhies@adacore.com/","msgid":"<20230525080547.1956409-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:47","name":"[COMMITTED] ada: Tune handling of attributes Old in contract Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080547.1956409-1-poulhies@adacore.com/mbox/"},{"id":98847,"url":"https://patchwork.plctlab.org/api/1.2/patches/98847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080549.1956470-1-poulhies@adacore.com/","msgid":"<20230525080549.1956470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:49","name":"[COMMITTED] ada: Add missing supportive code for recently added SPARK aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080549.1956470-1-poulhies@adacore.com/mbox/"},{"id":98854,"url":"https://patchwork.plctlab.org/api/1.2/patches/98854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080551.1956531-1-poulhies@adacore.com/","msgid":"<20230525080551.1956531-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:51","name":"[COMMITTED] ada: Fix comments for recently added SPARK aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080551.1956531-1-poulhies@adacore.com/mbox/"},{"id":98855,"url":"https://patchwork.plctlab.org/api/1.2/patches/98855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080552.1956593-1-poulhies@adacore.com/","msgid":"<20230525080552.1956593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:52","name":"[COMMITTED] ada: Prevent search of calls in preconditions from going too far","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080552.1956593-1-poulhies@adacore.com/mbox/"},{"id":98868,"url":"https://patchwork.plctlab.org/api/1.2/patches/98868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080554.1956654-1-poulhies@adacore.com/","msgid":"<20230525080554.1956654-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:54","name":"[COMMITTED] ada: Fix (again) incorrect handling of Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080554.1956654-1-poulhies@adacore.com/mbox/"},{"id":98858,"url":"https://patchwork.plctlab.org/api/1.2/patches/98858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080556.1956715-1-poulhies@adacore.com/","msgid":"<20230525080556.1956715-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:56","name":"[COMMITTED] ada: Remove unused initial value of a local variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080556.1956715-1-poulhies@adacore.com/mbox/"},{"id":98852,"url":"https://patchwork.plctlab.org/api/1.2/patches/98852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080557.1956782-1-poulhies@adacore.com/","msgid":"<20230525080557.1956782-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:57","name":"[COMMITTED] ada: Fix crash during function return analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080557.1956782-1-poulhies@adacore.com/mbox/"},{"id":98870,"url":"https://patchwork.plctlab.org/api/1.2/patches/98870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080559.1956848-1-poulhies@adacore.com/","msgid":"<20230525080559.1956848-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:59","name":"[COMMITTED] ada: Avoid duplicated streaming subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080559.1956848-1-poulhies@adacore.com/mbox/"},{"id":98872,"url":"https://patchwork.plctlab.org/api/1.2/patches/98872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080601.1956918-1-poulhies@adacore.com/","msgid":"<20230525080601.1956918-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:01","name":"[COMMITTED] ada: Simplify copying of node lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080601.1956918-1-poulhies@adacore.com/mbox/"},{"id":98860,"url":"https://patchwork.plctlab.org/api/1.2/patches/98860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080603.1956979-1-poulhies@adacore.com/","msgid":"<20230525080603.1956979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:03","name":"[COMMITTED] ada: Clean up copying of node trees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080603.1956979-1-poulhies@adacore.com/mbox/"},{"id":98861,"url":"https://patchwork.plctlab.org/api/1.2/patches/98861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080604.1957044-1-poulhies@adacore.com/","msgid":"<20230525080604.1957044-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:04","name":"[COMMITTED] ada: Deconstruct a no longer used parameter of New_Copy_Tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080604.1957044-1-poulhies@adacore.com/mbox/"},{"id":98875,"url":"https://patchwork.plctlab.org/api/1.2/patches/98875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080606.1957110-1-poulhies@adacore.com/","msgid":"<20230525080606.1957110-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:06","name":"[COMMITTED] ada: Fix copying of quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080606.1957110-1-poulhies@adacore.com/mbox/"},{"id":98863,"url":"https://patchwork.plctlab.org/api/1.2/patches/98863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080608.1957177-1-poulhies@adacore.com/","msgid":"<20230525080608.1957177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:08","name":"[COMMITTED] ada: Decouple size of addresses and pointers from size of memory space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080608.1957177-1-poulhies@adacore.com/mbox/"},{"id":98866,"url":"https://patchwork.plctlab.org/api/1.2/patches/98866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080610.1957238-1-poulhies@adacore.com/","msgid":"<20230525080610.1957238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:10","name":"[COMMITTED] ada: Switch from E_Void to Is_Not_Self_Hidden","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080610.1957238-1-poulhies@adacore.com/mbox/"},{"id":98843,"url":"https://patchwork.plctlab.org/api/1.2/patches/98843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080611.1957303-1-poulhies@adacore.com/","msgid":"<20230525080611.1957303-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:11","name":"[COMMITTED] ada: Fix error message for Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080611.1957303-1-poulhies@adacore.com/mbox/"},{"id":98864,"url":"https://patchwork.plctlab.org/api/1.2/patches/98864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080613.1957364-1-poulhies@adacore.com/","msgid":"<20230525080613.1957364-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:13","name":"[COMMITTED] ada: Add size clause to System.Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080613.1957364-1-poulhies@adacore.com/mbox/"},{"id":98878,"url":"https://patchwork.plctlab.org/api/1.2/patches/98878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080615.1957429-1-poulhies@adacore.com/","msgid":"<20230525080615.1957429-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:15","name":"[COMMITTED] ada: Minor adjustments to Standard_Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080615.1957429-1-poulhies@adacore.com/mbox/"},{"id":98879,"url":"https://patchwork.plctlab.org/api/1.2/patches/98879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080616.1957490-1-poulhies@adacore.com/","msgid":"<20230525080616.1957490-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:16","name":"[COMMITTED] ada: Require successful build of xsnamest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080616.1957490-1-poulhies@adacore.com/mbox/"},{"id":98848,"url":"https://patchwork.plctlab.org/api/1.2/patches/98848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080618.1957604-1-poulhies@adacore.com/","msgid":"<20230525080618.1957604-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:18","name":"[COMMITTED] ada: Fix internal error on declare-expression in post-condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080618.1957604-1-poulhies@adacore.com/mbox/"},{"id":98877,"url":"https://patchwork.plctlab.org/api/1.2/patches/98877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080620.1957675-1-poulhies@adacore.com/","msgid":"<20230525080620.1957675-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:20","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on VxWorks 7 PPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080620.1957675-1-poulhies@adacore.com/mbox/"},{"id":98867,"url":"https://patchwork.plctlab.org/api/1.2/patches/98867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080622.1957738-1-poulhies@adacore.com/","msgid":"<20230525080622.1957738-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:22","name":"[COMMITTED] ada: Crash on empty aggregate using the Ada 2022 notation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080622.1957738-1-poulhies@adacore.com/mbox/"},{"id":98869,"url":"https://patchwork.plctlab.org/api/1.2/patches/98869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080624.1957802-1-poulhies@adacore.com/","msgid":"<20230525080624.1957802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:24","name":"[COMMITTED] ada: Use procedural variant of Next_Index where possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080624.1957802-1-poulhies@adacore.com/mbox/"},{"id":98873,"url":"https://patchwork.plctlab.org/api/1.2/patches/98873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080625.1957864-1-poulhies@adacore.com/","msgid":"<20230525080625.1957864-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:25","name":"[COMMITTED] ada: Expect Exceptional_Cases as a context for attribute Old","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080625.1957864-1-poulhies@adacore.com/mbox/"},{"id":98876,"url":"https://patchwork.plctlab.org/api/1.2/patches/98876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080628.1957926-1-poulhies@adacore.com/","msgid":"<20230525080628.1957926-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:28","name":"[COMMITTED] ada: Missing warning on null-excluding array aggregate component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080628.1957926-1-poulhies@adacore.com/mbox/"},{"id":98881,"url":"https://patchwork.plctlab.org/api/1.2/patches/98881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525083231.234-1-jinma@linux.alibaba.com/","msgid":"<20230525083231.234-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-25T08:32:31","name":"RISC-V: In pipeline scheduling, insns should not be fusion in different BB blocks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525083231.234-1-jinma@linux.alibaba.com/mbox/"},{"id":98902,"url":"https://patchwork.plctlab.org/api/1.2/patches/98902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525090006.E0AA93857702@sourceware.org/","msgid":"<20230525090006.E0AA93857702@sourceware.org>","list_archive_url":null,"date":"2023-05-25T08:59:21","name":"tree-optimization/109791 - expand &x + off for niter compute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525090006.E0AA93857702@sourceware.org/mbox/"},{"id":98906,"url":"https://patchwork.plctlab.org/api/1.2/patches/98906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com/","msgid":"<1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com>","list_archive_url":null,"date":"2023-05-25T09:03:27","name":"RISC-V: Add autovec sign/zero extension and truncation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-05/mbox/"},{"id":24,"url":"https://patchwork.plctlab.org/api/1.2/bundles/24/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-06/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-06","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":101534,"url":"https://patchwork.plctlab.org/api/1.2/patches/101534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-2-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-2-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:32","name":"[1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-2-vineetg@rivosinc.com/mbox/"},{"id":101535,"url":"https://patchwork.plctlab.org/api/1.2/patches/101535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-3-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-3-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:33","name":"[2/3] RISC-V: Add missing torture-init and torture-finish for rvv.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-3-vineetg@rivosinc.com/mbox/"},{"id":101536,"url":"https://patchwork.plctlab.org/api/1.2/patches/101536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-4-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-4-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:34","name":"[3/3] testsuite: print any leaking torture options for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-4-vineetg@rivosinc.com/mbox/"},{"id":101552,"url":"https://patchwork.plctlab.org/api/1.2/patches/101552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com/","msgid":"<01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com>","list_archive_url":null,"date":"2023-05-31T17:39:28","name":"Move std::search into algobase.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com/mbox/"},{"id":101560,"url":"https://patchwork.plctlab.org/api/1.2/patches/101560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-2-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:28","name":"[1/3] testsuite: move handle-multiline-outputs to before check for blank lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-2-dmalcolm@redhat.com/mbox/"},{"id":101562,"url":"https://patchwork.plctlab.org/api/1.2/patches/101562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-3-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:29","name":"[2/3] diagnostics: add support for \"text art\" diagrams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-3-dmalcolm@redhat.com/mbox/"},{"id":101561,"url":"https://patchwork.plctlab.org/api/1.2/patches/101561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-4-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:30","name":"[3/3] analyzer: add text-art visualizations of out-of-bounds accesses [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-4-dmalcolm@redhat.com/mbox/"},{"id":101569,"url":"https://patchwork.plctlab.org/api/1.2/patches/101569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9de24e4-2cf9-1434-4148-7a7634ad4253@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-31T19:22:15","name":"OpenMP/Fortran: Permit pure directives inside PURE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9de24e4-2cf9-1434-4148-7a7634ad4253@codesourcery.com/mbox/"},{"id":101571,"url":"https://patchwork.plctlab.org/api/1.2/patches/101571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200257.6784-1-jwakely@redhat.com/","msgid":"<20230531200257.6784-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:02:57","name":"[committed] libstdc++: Fix configure test for 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200257.6784-1-jwakely@redhat.com/mbox/"},{"id":101575,"url":"https://patchwork.plctlab.org/api/1.2/patches/101575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200532.6935-1-jwakely@redhat.com/","msgid":"<20230531200532.6935-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:05:32","name":"[committed] libstdc++: Fix build for targets without _Float128 [PR109921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200532.6935-1-jwakely@redhat.com/mbox/"},{"id":101582,"url":"https://patchwork.plctlab.org/api/1.2/patches/101582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202019.20749-1-jwakely@redhat.com/","msgid":"<20230531202019.20749-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:19","name":"[committed] libstdc++: Express std::vector'\''s size() <= capacity() invariant in code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202019.20749-1-jwakely@redhat.com/mbox/"},{"id":101583,"url":"https://patchwork.plctlab.org/api/1.2/patches/101583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202049.20903-1-jwakely@redhat.com/","msgid":"<20230531202049.20903-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:49","name":"[committed] libstdc++: Stop using _GLIBCXX_USE_C99_MATH_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202049.20903-1-jwakely@redhat.com/mbox/"},{"id":101584,"url":"https://patchwork.plctlab.org/api/1.2/patches/101584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202054.20950-1-jwakely@redhat.com/","msgid":"<20230531202054.20950-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:54","name":"[committed] libstdc++: Add separate autoconf macro for std::float_t and std::double_t [PR109818]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202054.20950-1-jwakely@redhat.com/mbox/"},{"id":101653,"url":"https://patchwork.plctlab.org/api/1.2/patches/101653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601023615.89715-1-juzhe.zhong@rivai.ai/","msgid":"<20230601023615.89715-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T02:36:15","name":"[V2] RISC-V: Support RVV permutation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601023615.89715-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101677,"url":"https://patchwork.plctlab.org/api/1.2/patches/101677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031255.1268906-1-jason@redhat.com/","msgid":"<20230601031255.1268906-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:12:55","name":"libstdc++: optimize EH phase 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031255.1268906-1-jason@redhat.com/mbox/"},{"id":101686,"url":"https://patchwork.plctlab.org/api/1.2/patches/101686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031819.1271768-1-jason@redhat.com/","msgid":"<20230601031819.1271768-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:18:19","name":"[pushed] c++: make -fpermissive avoid -Werror=narrowing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031819.1271768-1-jason@redhat.com/mbox/"},{"id":101690,"url":"https://patchwork.plctlab.org/api/1.2/patches/101690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601033136.1275711-1-jason@redhat.com/","msgid":"<20230601033136.1275711-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:31:36","name":"doc: improve docs for -pedantic{,-errors}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601033136.1275711-1-jason@redhat.com/mbox/"},{"id":101693,"url":"https://patchwork.plctlab.org/api/1.2/patches/101693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601034823.235258-1-juzhe.zhong@rivai.ai/","msgid":"<20230601034823.235258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T03:48:23","name":"RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601034823.235258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101701,"url":"https://patchwork.plctlab.org/api/1.2/patches/101701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601042658.2128162-1-yunqiang.su@cipunited.com/","msgid":"<20230601042658.2128162-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-01T04:26:58","name":"[v5] MIPS: Add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601042658.2128162-1-yunqiang.su@cipunited.com/mbox/"},{"id":101702,"url":"https://patchwork.plctlab.org/api/1.2/patches/101702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601043617.173986-1-juzhe.zhong@rivai.ai/","msgid":"<20230601043617.173986-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T04:36:17","name":"[V3] VECT: Change flow of decrement IV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601043617.173986-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101704,"url":"https://patchwork.plctlab.org/api/1.2/patches/101704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com/","msgid":"<94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com>","list_archive_url":null,"date":"2023-06-01T05:23:02","name":"PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com/mbox/"},{"id":101743,"url":"https://patchwork.plctlab.org/api/1.2/patches/101743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp/","msgid":"<931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp>","list_archive_url":null,"date":"2023-06-01T06:01:07","name":"[2/3,v3] xtensa: Add '\''adddi3'\'' and '\''subdi3'\'' insn patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp/mbox/"},{"id":101786,"url":"https://patchwork.plctlab.org/api/1.2/patches/101786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601071746.2403557-1-pan2.li@intel.com/","msgid":"<20230601071746.2403557-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-01T07:17:46","name":"RISC-V: Introduce vfloat16m{f}*_t and their machine mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601071746.2403557-1-pan2.li@intel.com/mbox/"},{"id":101787,"url":"https://patchwork.plctlab.org/api/1.2/patches/101787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbe83266-cae1-e46c-2288-1a944e0c607b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T07:20:08","name":"[v5] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbe83266-cae1-e46c-2288-1a944e0c607b@linux.ibm.com/mbox/"},{"id":101791,"url":"https://patchwork.plctlab.org/api/1.2/patches/101791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601073136.193330-1-juzhe.zhong@rivai.ai/","msgid":"<20230601073136.193330-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T07:31:36","name":"RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv instruction optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601073136.193330-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101796,"url":"https://patchwork.plctlab.org/api/1.2/patches/101796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601074855.319313-1-hongtao.liu@intel.com/","msgid":"<20230601074855.319313-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-01T07:48:55","name":"Don'\''t try bswap + rotate when TYPE_PRECISION(n->type) > n->range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601074855.319313-1-hongtao.liu@intel.com/mbox/"},{"id":101801,"url":"https://patchwork.plctlab.org/api/1.2/patches/101801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601083212.245585-1-juzhe.zhong@rivai.ai/","msgid":"<20230601083212.245585-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T08:32:12","name":"[V2] RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv instruction optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601083212.245585-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101805,"url":"https://patchwork.plctlab.org/api/1.2/patches/101805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5270701.LvFx2qVVIh@minbar/","msgid":"<5270701.LvFx2qVVIh@minbar>","list_archive_url":null,"date":"2023-06-01T08:49:58","name":"[committed] libstdc++: Fix condition for supported SIMD types on ARMv8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5270701.LvFx2qVVIh@minbar/mbox/"},{"id":101874,"url":"https://patchwork.plctlab.org/api/1.2/patches/101874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601103737.99717-1-jwakely@redhat.com/","msgid":"<20230601103737.99717-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T10:37:37","name":"doc: Fix description of x86 -m32 option [PR109954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601103737.99717-1-jwakely@redhat.com/mbox/"},{"id":101902,"url":"https://patchwork.plctlab.org/api/1.2/patches/101902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601120853.2769642-1-pan2.li@intel.com/","msgid":"<20230601120853.2769642-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-01T12:08:53","name":"RISC-V: Add test for vfloat16*_t (non tuple) types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601120853.2769642-1-pan2.li@intel.com/mbox/"},{"id":101964,"url":"https://patchwork.plctlab.org/api/1.2/patches/101964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZkM1UjbyrupBsmmPf8cmpExTRHrO2HB22f6M1-vigCnA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T14:24:57","name":"[COMMITTED] cse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZkM1UjbyrupBsmmPf8cmpExTRHrO2HB22f6M1-vigCnA@mail.gmail.com/mbox/"},{"id":101974,"url":"https://patchwork.plctlab.org/api/1.2/patches/101974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-1-ppalka@redhat.com/","msgid":"<20230601144938.765175-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T14:49:36","name":"[1/2] c++: refine dependent_alias_template_spec_p [PR90679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-1-ppalka@redhat.com/mbox/"},{"id":101975,"url":"https://patchwork.plctlab.org/api/1.2/patches/101975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-2-ppalka@redhat.com/","msgid":"<20230601144938.765175-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T14:49:37","name":"[2/2] c++: partial ordering and dep alias tmpl specs [PR90679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-2-ppalka@redhat.com/mbox/"},{"id":102002,"url":"https://patchwork.plctlab.org/api/1.2/patches/102002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150711.257954-1-jwakely@redhat.com/","msgid":"<20230601150711.257954-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:07:11","name":"[committed] libstdc++: Document removal of implicit allocator rebinding extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150711.257954-1-jwakely@redhat.com/mbox/"},{"id":102005,"url":"https://patchwork.plctlab.org/api/1.2/patches/102005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150958.268109-1-jwakely@redhat.com/","msgid":"<20230601150958.268109-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:09:58","name":"[committed] libstdc++: Fix code size regressions in std::vector [PR110060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150958.268109-1-jwakely@redhat.com/mbox/"},{"id":102006,"url":"https://patchwork.plctlab.org/api/1.2/patches/102006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601151004.268138-1-jwakely@redhat.com/","msgid":"<20230601151004.268138-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:10:04","name":"[committed] libstdc++: Do not use std::expected::value() in monadic ops (LWG 3938)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601151004.268138-1-jwakely@redhat.com/mbox/"},{"id":102020,"url":"https://patchwork.plctlab.org/api/1.2/patches/102020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKQcWUnq72PBYJb5YGT6x=tWnO_MhEFA_R7FmPpHE3jSA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T15:20:46","name":"[fortran] PR87477 - [meta-bug] [F03] issues concerning the ASSOCIATE statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKQcWUnq72PBYJb5YGT6x=tWnO_MhEFA_R7FmPpHE3jSA@mail.gmail.com/mbox/"},{"id":102062,"url":"https://patchwork.plctlab.org/api/1.2/patches/102062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155651.305379-1-jwakely@redhat.com/","msgid":"<20230601155651.305379-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:56:51","name":"[committed] libstdc++: Fix PSTL test that fails in C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155651.305379-1-jwakely@redhat.com/mbox/"},{"id":102065,"url":"https://patchwork.plctlab.org/api/1.2/patches/102065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155856.305565-1-jwakely@redhat.com/","msgid":"<20230601155856.305565-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:58:56","name":"libstdc++: Use AS_IF in configure.ac","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155856.305565-1-jwakely@redhat.com/mbox/"},{"id":102070,"url":"https://patchwork.plctlab.org/api/1.2/patches/102070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92f28d5-a7ef-34e5-044d-0ee04771a280@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T16:30:02","name":"inline: improve internal function costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92f28d5-a7ef-34e5-044d-0ee04771a280@arm.com/mbox/"},{"id":102073,"url":"https://patchwork.plctlab.org/api/1.2/patches/102073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21150fd3-ff31-1188-5876-768e7a5edc84@arm.com/","msgid":"<21150fd3-ff31-1188-5876-768e7a5edc84@arm.com>","list_archive_url":null,"date":"2023-06-01T16:31:42","name":"gimple-range: implement widen plus range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21150fd3-ff31-1188-5876-768e7a5edc84@arm.com/mbox/"},{"id":102141,"url":"https://patchwork.plctlab.org/api/1.2/patches/102141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1c63e58d-07b4-4137-a7be-3648399ce8db-1685646310303@3c-app-gmx-bap24/","msgid":"","list_archive_url":null,"date":"2023-06-01T19:05:10","name":"Fortran: force error on bad KIND specifier [PR88552]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1c63e58d-07b4-4137-a7be-3648399ce8db-1685646310303@3c-app-gmx-bap24/mbox/"},{"id":102161,"url":"https://patchwork.plctlab.org/api/1.2/patches/102161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193853.160037-1-vineetg@rivosinc.com/","msgid":"<20230601193853.160037-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-01T19:38:53","name":"[Committed] testsuite: Unbork multilib setups using -march flags (RISC-V)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193853.160037-1-vineetg@rivosinc.com/mbox/"},{"id":102162,"url":"https://patchwork.plctlab.org/api/1.2/patches/102162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193945.160085-1-vineetg@rivosinc.com/","msgid":"<20230601193945.160085-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-01T19:39:45","name":"[Committed] testsuite: print any leaking torture options for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193945.160085-1-vineetg@rivosinc.com/mbox/"},{"id":102163,"url":"https://patchwork.plctlab.org/api/1.2/patches/102163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com/","msgid":"<602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-01T20:01:44","name":"rs6000: Fix arguments for __builtin_altivec_tr_stxvrwx, __builtin_altivec_tr_stxvrhx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com/mbox/"},{"id":102171,"url":"https://patchwork.plctlab.org/api/1.2/patches/102171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6281b22-bf93-fe03-d461-6f597849bf98@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T20:12:21","name":"[RFC] range-op restructuring","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6281b22-bf93-fe03-d461-6f597849bf98@redhat.com/mbox/"},{"id":102205,"url":"https://patchwork.plctlab.org/api/1.2/patches/102205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601214224.1468391-1-ppalka@redhat.com/","msgid":"<20230601214224.1468391-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T21:42:24","name":"c++: fix up caching of level lowered ttps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601214224.1468391-1-ppalka@redhat.com/mbox/"},{"id":102232,"url":"https://patchwork.plctlab.org/api/1.2/patches/102232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601230441.294259-1-juzhe.zhong@rivai.ai/","msgid":"<20230601230441.294259-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T23:04:41","name":"RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601230441.294259-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102233,"url":"https://patchwork.plctlab.org/api/1.2/patches/102233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com/","msgid":"<0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-01T23:11:25","name":"rs6000: Fix expected counts powerpc/p9-vec-length-full","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com/mbox/"},{"id":102236,"url":"https://patchwork.plctlab.org/api/1.2/patches/102236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601231907.3879-1-juzhe.zhong@rivai.ai/","msgid":"<20230601231907.3879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T23:19:07","name":"RISC-V: Add __RISCV_ prefix to VXRM and FRM enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601231907.3879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102248,"url":"https://patchwork.plctlab.org/api/1.2/patches/102248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602004908.2571237-1-hongtao.liu@intel.com/","msgid":"<20230602004908.2571237-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-02T00:49:08","name":"i386: Add missing vector truncate patterns [PR92658].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602004908.2571237-1-hongtao.liu@intel.com/mbox/"},{"id":102249,"url":"https://patchwork.plctlab.org/api/1.2/patches/102249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602010015.2571612-1-hongtao.liu@intel.com/","msgid":"<20230602010015.2571612-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-02T01:00:15","name":"[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602010015.2571612-1-hongtao.liu@intel.com/mbox/"},{"id":102262,"url":"https://patchwork.plctlab.org/api/1.2/patches/102262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602013115.1613501-1-jason@redhat.com/","msgid":"<20230602013115.1613501-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T01:31:15","name":"[RFA] c++: make initializer_list array static again [PR110070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602013115.1613501-1-jason@redhat.com/mbox/"},{"id":102277,"url":"https://patchwork.plctlab.org/api/1.2/patches/102277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020426.63191-1-juzhe.zhong@rivai.ai/","msgid":"<20230602020426.63191-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T02:04:26","name":"RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020426.63191-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102278,"url":"https://patchwork.plctlab.org/api/1.2/patches/102278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020447.63264-1-juzhe.zhong@rivai.ai/","msgid":"<20230602020447.63264-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T02:04:47","name":"[V2] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020447.63264-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102280,"url":"https://patchwork.plctlab.org/api/1.2/patches/102280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602021059.2229464-1-yunqiang.su@cipunited.com/","msgid":"<20230602021059.2229464-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-02T02:10:59","name":"[COMMITTED] MAINTAINERS: Add myself as MIPS port maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602021059.2229464-1-yunqiang.su@cipunited.com/mbox/"},{"id":102283,"url":"https://patchwork.plctlab.org/api/1.2/patches/102283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602024341.1629656-1-jason@redhat.com/","msgid":"<20230602024341.1629656-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T02:43:41","name":"[RFA] varasm: check float size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602024341.1629656-1-jason@redhat.com/mbox/"},{"id":102287,"url":"https://patchwork.plctlab.org/api/1.2/patches/102287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602030443.124743-1-juzhe.zhong@rivai.ai/","msgid":"<20230602030443.124743-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T03:04:43","name":"RISC-V: Fix warning in predicated.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602030443.124743-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102300,"url":"https://patchwork.plctlab.org/api/1.2/patches/102300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602055617.63608-1-lidie@eswincomputing.com/","msgid":"<20230602055617.63608-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T05:56:17","name":"RISC-V: Remove unnecessary md pattern for TARGET_XTHEADCONDMOV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602055617.63608-1-lidie@eswincomputing.com/mbox/"},{"id":102317,"url":"https://patchwork.plctlab.org/api/1.2/patches/102317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602063140.29401-1-juzhe.zhong@rivai.ai/","msgid":"<20230602063140.29401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T06:31:40","name":"RISC-V: Optimize reverse series index vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602063140.29401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102334,"url":"https://patchwork.plctlab.org/api/1.2/patches/102334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602070726.3807539-1-yanzhang.wang@intel.com/","msgid":"<20230602070726.3807539-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-02T07:07:26","name":"RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602070726.3807539-1-yanzhang.wang@intel.com/mbox/"},{"id":102342,"url":"https://patchwork.plctlab.org/api/1.2/patches/102342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602073559.2690527-1-apinski@marvell.com/","msgid":"<20230602073559.2690527-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-02T07:35:59","name":"rtl-optimization: [PR102733] DSE removing address which only differ by address space.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602073559.2690527-1-apinski@marvell.com/mbox/"},{"id":102376,"url":"https://patchwork.plctlab.org/api/1.2/patches/102376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55462f69-84b8-6efb-b98e-399390928420@gjlay.de/","msgid":"<55462f69-84b8-6efb-b98e-399390928420@gjlay.de>","list_archive_url":null,"date":"2023-06-02T08:46:41","name":"Fix PR101188 wrong code from postreload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55462f69-84b8-6efb-b98e-399390928420@gjlay.de/mbox/"},{"id":102412,"url":"https://patchwork.plctlab.org/api/1.2/patches/102412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602093333.19552-1-juzhe.zhong@rivai.ai/","msgid":"<20230602093333.19552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T09:33:33","name":"[V2] RISC-V: Fix warning in predicated.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602093333.19552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102426,"url":"https://patchwork.plctlab.org/api/1.2/patches/102426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y868a4b.fsf@euler.schwinge.homeip.net/","msgid":"<875y868a4b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-02T09:52:04","name":"Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y868a4b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":102427,"url":"https://patchwork.plctlab.org/api/1.2/patches/102427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com/","msgid":"<9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com>","list_archive_url":null,"date":"2023-06-02T09:53:59","name":"[PR110086] avr: Fix ICE on optimize attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com/mbox/"},{"id":102473,"url":"https://patchwork.plctlab.org/api/1.2/patches/102473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-1-gaofei@eswincomputing.com/","msgid":"<20230602104247.26454-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T10:42:46","name":"[1/2,RISC-V] fix cfi issue in save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-1-gaofei@eswincomputing.com/mbox/"},{"id":102474,"url":"https://patchwork.plctlab.org/api/1.2/patches/102474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-2-gaofei@eswincomputing.com/","msgid":"<20230602104247.26454-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T10:42:47","name":"[2/2,V3,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-2-gaofei@eswincomputing.com/mbox/"},{"id":102502,"url":"https://patchwork.plctlab.org/api/1.2/patches/102502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfa51b3b-c7b9-197b-923c-aeb8eed903fe@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-06-02T11:38:04","name":"[avr,committed] Improve operations on non-LD_REGS when the operation follows a move from LD_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfa51b3b-c7b9-197b-923c-aeb8eed903fe@gjlay.de/mbox/"},{"id":102549,"url":"https://patchwork.plctlab.org/api/1.2/patches/102549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602132057.293160-1-lehua.ding@rivai.ai/","msgid":"<20230602132057.293160-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-02T13:20:57","name":"Add more ForEachMacros to clang-format file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602132057.293160-1-lehua.ding@rivai.ai/mbox/"},{"id":102559,"url":"https://patchwork.plctlab.org/api/1.2/patches/102559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133239.66945-1-dmalcolm@redhat.com/","msgid":"<20230602133239.66945-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-02T13:32:39","name":"[pushed] analyzer: regions in different memory spaces can'\''t alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133239.66945-1-dmalcolm@redhat.com/mbox/"},{"id":102561,"url":"https://patchwork.plctlab.org/api/1.2/patches/102561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133245.66990-1-dmalcolm@redhat.com/","msgid":"<20230602133245.66990-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-02T13:32:45","name":"[pushed] analyzer: implement various atomic builtins [PR109015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133245.66990-1-dmalcolm@redhat.com/mbox/"},{"id":102575,"url":"https://patchwork.plctlab.org/api/1.2/patches/102575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com/","msgid":"<005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-02T14:17:19","name":"New wi::bitreverse function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com/mbox/"},{"id":102578,"url":"https://patchwork.plctlab.org/api/1.2/patches/102578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142920.1793173-1-ppalka@redhat.com/","msgid":"<20230602142920.1793173-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T14:29:20","name":"c++: is_specialization_of_friend confusion [PR109923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142920.1793173-1-ppalka@redhat.com/mbox/"},{"id":102579,"url":"https://patchwork.plctlab.org/api/1.2/patches/102579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142928.1793231-1-ppalka@redhat.com/","msgid":"<20230602142928.1793231-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T14:29:27","name":"c++: simplify TEMPLATE_TEMPLATE_PARM hashing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142928.1793231-1-ppalka@redhat.com/mbox/"},{"id":102582,"url":"https://patchwork.plctlab.org/api/1.2/patches/102582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUNB1N9TtJrtJmagXi+y7QbVbc1HRV0B=eC200jiFR+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T14:50:51","name":"[COMMITTED] reg-stack: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUNB1N9TtJrtJmagXi+y7QbVbc1HRV0B=eC200jiFR+A@mail.gmail.com/mbox/"},{"id":102592,"url":"https://patchwork.plctlab.org/api/1.2/patches/102592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602151534.2132668-1-ppalka@redhat.com/","msgid":"<20230602151534.2132668-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:15:34","name":"c++: replace in_template_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602151534.2132668-1-ppalka@redhat.com/mbox/"},{"id":102596,"url":"https://patchwork.plctlab.org/api/1.2/patches/102596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-2-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:41","name":"[01/12,contrib] validate_failures.py: Avoid testsuite aliasing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102601,"url":"https://patchwork.plctlab.org/api/1.2/patches/102601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-3-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-3-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:42","name":"[02/12,contrib] validate_failures.py: Support expiry attributes in manifests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-3-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102600,"url":"https://patchwork.plctlab.org/api/1.2/patches/102600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-4-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-4-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:43","name":"[03/12,contrib] validate_failures.py: Read in manifest when comparing build dirs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-4-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102598,"url":"https://patchwork.plctlab.org/api/1.2/patches/102598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-5-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-5-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:44","name":"[04/12,contrib] validate_failures.py: Simplify GetManifestPath()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-5-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102603,"url":"https://patchwork.plctlab.org/api/1.2/patches/102603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-6-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-6-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:45","name":"[05/12,contrib] validate_failures.py: Add more verbosity levels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-6-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102602,"url":"https://patchwork.plctlab.org/api/1.2/patches/102602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-7-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-7-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:46","name":"[06/12,contrib] validate_failures.py: Be more stringent in parsing result lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-7-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102604,"url":"https://patchwork.plctlab.org/api/1.2/patches/102604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-8-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-8-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:47","name":"[07/12,contrib] validate_failures.py: Use exit code \"2\" to indicate regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-8-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102607,"url":"https://patchwork.plctlab.org/api/1.2/patches/102607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-9-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-9-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:48","name":"[08/12,contrib] validate_failures.py: Support \"$tool:\" prefix in exp names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-9-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102605,"url":"https://patchwork.plctlab.org/api/1.2/patches/102605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-10-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-10-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:49","name":"[09/12,contrib] validate_failures.py: Improve error output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-10-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102599,"url":"https://patchwork.plctlab.org/api/1.2/patches/102599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-11-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-11-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:50","name":"[10/12,contrib] validate_failures.py: Add new option --invert_match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-11-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102606,"url":"https://patchwork.plctlab.org/api/1.2/patches/102606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-12-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-12-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:51","name":"[11/12,contrib] validate_failures.py: Add \"--expiry_date YYYYMMDD\" option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-12-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102608,"url":"https://patchwork.plctlab.org/api/1.2/patches/102608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-13-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-13-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:52","name":"[12/12,contrib] validate_failures.py: Ignore stray filesystem paths in results","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-13-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102628,"url":"https://patchwork.plctlab.org/api/1.2/patches/102628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LO4P265MB5914451ED93CD4B7617714A0804EA@LO4P265MB5914.GBRP265.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-06-02T15:44:48","name":"libstdc++: Do not assume existence of char8_t codecvt facet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LO4P265MB5914451ED93CD4B7617714A0804EA@LO4P265MB5914.GBRP265.PROD.OUTLOOK.COM/mbox/"},{"id":102629,"url":"https://patchwork.plctlab.org/api/1.2/patches/102629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155349.1775177-1-jason@redhat.com/","msgid":"<20230602155349.1775177-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:53:49","name":"[pushed] c++: fix explicit/copy problem [PR109247]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155349.1775177-1-jason@redhat.com/mbox/"},{"id":102630,"url":"https://patchwork.plctlab.org/api/1.2/patches/102630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155519.2300026-1-ppalka@redhat.com/","msgid":"<20230602155519.2300026-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:55:19","name":"c++: bad '\''this'\'' conversion for nullary memfn [PR106760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155519.2300026-1-ppalka@redhat.com/mbox/"},{"id":102633,"url":"https://patchwork.plctlab.org/api/1.2/patches/102633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZHoSxwZsh98WrBSU@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T16:03:19","name":"[committed] btf: Fix -Wformat errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZHoSxwZsh98WrBSU@arm.com/mbox/"},{"id":102654,"url":"https://patchwork.plctlab.org/api/1.2/patches/102654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602163513.6196-1-david.faust@oracle.com/","msgid":"<20230602163513.6196-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-06-02T16:35:13","name":"[committed] btf: fix bootstrap -Wformat errors [PR110073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602163513.6196-1-david.faust@oracle.com/mbox/"},{"id":102659,"url":"https://patchwork.plctlab.org/api/1.2/patches/102659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898223DE66773176183922A9834EA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T17:28:10","name":"libatomic: Enable lock-free 128-bit atomics on AArch64 [PR110061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898223DE66773176183922A9834EA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":102660,"url":"https://patchwork.plctlab.org/api/1.2/patches/102660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-53104170-fe2e-4a0d-b0a0-4e2819ba1e90-1685729154070@3c-app-gmx-bs08/","msgid":"","list_archive_url":null,"date":"2023-06-02T18:05:54","name":"[committed] Fortran: fix diagnostics for SELECT RANK [PR100607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-53104170-fe2e-4a0d-b0a0-4e2819ba1e90-1685729154070@3c-app-gmx-bs08/mbox/"},{"id":102677,"url":"https://patchwork.plctlab.org/api/1.2/patches/102677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602191153.78156-1-iain@sandoe.co.uk/","msgid":"<20230602191153.78156-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-02T19:11:53","name":"[pushed] Darwin, PPC: Fix struct layout with pragma pack [PR110044].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602191153.78156-1-iain@sandoe.co.uk/mbox/"},{"id":102807,"url":"https://patchwork.plctlab.org/api/1.2/patches/102807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6428a06-f728-06a9-a530-36aa115291dc@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-03T09:55:17","name":"xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6428a06-f728-06a9-a530-36aa115291dc@yahoo.co.jp/mbox/"},{"id":102837,"url":"https://patchwork.plctlab.org/api/1.2/patches/102837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603112532.3264658-1-xry111@xry111.site/","msgid":"<20230603112532.3264658-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-06-03T11:25:32","name":"libatomic: x86_64: Always try ifunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603112532.3264658-1-xry111@xry111.site/mbox/"},{"id":102840,"url":"https://patchwork.plctlab.org/api/1.2/patches/102840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603143713.3029159-1-pan2.li@intel.com/","msgid":"<20230603143713.3029159-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-03T14:37:13","name":"RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603143713.3029159-1-pan2.li@intel.com/mbox/"},{"id":102863,"url":"https://patchwork.plctlab.org/api/1.2/patches/102863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/035801d99641$43215980$c9640c80$@nextmovesoftware.com/","msgid":"<035801d99641$43215980$c9640c80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-03T17:31:40","name":"[x86_64] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/035801d99641$43215980$c9640c80$@nextmovesoftware.com/mbox/"},{"id":102924,"url":"https://patchwork.plctlab.org/api/1.2/patches/102924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d701d9966d$16552220$42ff6660$@nextmovesoftware.com/","msgid":"<00d701d9966d$16552220$42ff6660$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-03T22:45:23","name":"[x86] Add support for stc, clc and cmc instructions in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d701d9966d$16552220$42ff6660$@nextmovesoftware.com/mbox/"},{"id":102925,"url":"https://patchwork.plctlab.org/api/1.2/patches/102925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb2b819e-5cf4-e71f-2cb3-b05046f18de8@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-03T22:52:16","name":"xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb2b819e-5cf4-e71f-2cb3-b05046f18de8@yahoo.co.jp/mbox/"},{"id":102964,"url":"https://patchwork.plctlab.org/api/1.2/patches/102964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604071928.1681889-1-pan2.li@intel.com/","msgid":"<20230604071928.1681889-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-04T07:19:28","name":"RISC-V: Support RVV FP16 ZVFHMIN intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604071928.1681889-1-pan2.li@intel.com/mbox/"},{"id":102969,"url":"https://patchwork.plctlab.org/api/1.2/patches/102969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604085147.3989859-1-juzhe.zhong@rivai.ai/","msgid":"<20230604085147.3989859-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T08:51:47","name":"RISC-V: Remove redundant vlmul_ext_* patterns to fix PR110109","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604085147.3989859-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102970,"url":"https://patchwork.plctlab.org/api/1.2/patches/102970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604091112.3999325-1-juzhe.zhong@rivai.ai/","msgid":"<20230604091112.3999325-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:11:12","name":"[NFC] RISC-V: Reorganize riscv-v.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604091112.3999325-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102975,"url":"https://patchwork.plctlab.org/api/1.2/patches/102975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604092503.4009600-1-juzhe.zhong@rivai.ai/","msgid":"<20230604092503.4009600-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:25:03","name":"RISC-V: Split arguments of expand_vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604092503.4009600-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102976,"url":"https://patchwork.plctlab.org/api/1.2/patches/102976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604093647.4018890-1-juzhe.zhong@rivai.ai/","msgid":"<20230604093647.4018890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:36:47","name":"[NFC] RISC-V: Move optimization patterns into autovec-opt.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604093647.4018890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103038,"url":"https://patchwork.plctlab.org/api/1.2/patches/103038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16a85e3-45a8-4c82-61ab-9adad2daf537@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-04T17:42:58","name":"[committed] Convert H8 port to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16a85e3-45a8-4c82-61ab-9adad2daf537@gmail.com/mbox/"},{"id":103046,"url":"https://patchwork.plctlab.org/api/1.2/patches/103046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4d5b600-2e21-3fea-17f8-4c2764880409@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-04T21:41:06","name":"[RFA] Improve strcmp expansion when one input is a constant string.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4d5b600-2e21-3fea-17f8-4c2764880409@gmail.com/mbox/"},{"id":103053,"url":"https://patchwork.plctlab.org/api/1.2/patches/103053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605012635.2292889-1-hongtao.liu@intel.com/","msgid":"<20230605012635.2292889-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-05T01:26:35","name":"[x86] Add missing vec_pack/unpacks patterns for _Float16 <-> int/float conversion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605012635.2292889-1-hongtao.liu@intel.com/mbox/"},{"id":103057,"url":"https://patchwork.plctlab.org/api/1.2/patches/103057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605015017.2559720-1-yunqiang.su@cipunited.com/","msgid":"<20230605015017.2559720-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-05T01:50:17","name":"MAINTAINERS: move Matthew Fortune to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605015017.2559720-1-yunqiang.su@cipunited.com/mbox/"},{"id":103061,"url":"https://patchwork.plctlab.org/api/1.2/patches/103061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605035741.613909-1-juzhe.zhong@rivai.ai/","msgid":"<20230605035741.613909-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-05T03:57:41","name":"[V2] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605035741.613909-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103081,"url":"https://patchwork.plctlab.org/api/1.2/patches/103081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605044112.2861212-1-apinski@marvell.com/","msgid":"<20230605044112.2861212-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T04:41:12","name":"Fix PR 110085: `make clean` in GCC directory on sh target causes a failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605044112.2861212-1-apinski@marvell.com/mbox/"},{"id":103086,"url":"https://patchwork.plctlab.org/api/1.2/patches/103086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-1-apinski@marvell.com/","msgid":"<20230605055331.2864335-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T05:53:30","name":"[1/2] Improve do_store_flag for single bit when there is no non-zero bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-1-apinski@marvell.com/mbox/"},{"id":103087,"url":"https://patchwork.plctlab.org/api/1.2/patches/103087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-2-apinski@marvell.com/","msgid":"<20230605055331.2864335-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T05:53:31","name":"[2/2] Handle const_int in expand_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-2-apinski@marvell.com/mbox/"},{"id":103092,"url":"https://patchwork.plctlab.org/api/1.2/patches/103092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605060757.22344-1-gaofei@eswincomputing.com/","msgid":"<20230605060757.22344-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-05T06:07:57","name":"[RISC-V] add TC for save-restore cfi directives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605060757.22344-1-gaofei@eswincomputing.com/mbox/"},{"id":103097,"url":"https://patchwork.plctlab.org/api/1.2/patches/103097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com/","msgid":"<5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-06-05T06:41:42","name":"rs6000: Remove duplicate expression [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com/mbox/"},{"id":103098,"url":"https://patchwork.plctlab.org/api/1.2/patches/103098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605065058.1037581-1-pan2.li@intel.com/","msgid":"<20230605065058.1037581-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T06:50:58","name":"[v1] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605065058.1037581-1-pan2.li@intel.com/mbox/"},{"id":103194,"url":"https://patchwork.plctlab.org/api/1.2/patches/103194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbc8c369-79af-ca70-646d-4b156b4c2df1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-05T07:30:55","name":"[v2] xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbc8c369-79af-ca70-646d-4b156b4c2df1@yahoo.co.jp/mbox/"},{"id":103180,"url":"https://patchwork.plctlab.org/api/1.2/patches/103180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605081822.24328-1-xuli1@eswincomputing.com/","msgid":"<20230605081822.24328-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-05T08:18:22","name":"RISC-V: Fix '\''REQUIREMENT'\'' for machine_mode '\''MODE'\'' in vector-iterators.md.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605081822.24328-1-xuli1@eswincomputing.com/mbox/"},{"id":103182,"url":"https://patchwork.plctlab.org/api/1.2/patches/103182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605082043.1707158-1-pan2.li@intel.com/","msgid":"<20230605082043.1707158-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T08:20:43","name":"[v2] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605082043.1707158-1-pan2.li@intel.com/mbox/"},{"id":103199,"url":"https://patchwork.plctlab.org/api/1.2/patches/103199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605103018.729941-1-juzhe.zhong@rivai.ai/","msgid":"<20230605103018.729941-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-05T10:30:18","name":"[V3] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605103018.729941-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103202,"url":"https://patchwork.plctlab.org/api/1.2/patches/103202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2798293836398E27+2023060518584925668867@rivai.ai/","msgid":"<2798293836398E27+2023060518584925668867@rivai.ai>","list_archive_url":null,"date":"2023-06-05T10:58:50","name":"??????: Re: [PATCH V3] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2798293836398E27+2023060518584925668867@rivai.ai/mbox/"},{"id":103219,"url":"https://patchwork.plctlab.org/api/1.2/patches/103219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz2aqezb.fsf@euler.schwinge.homeip.net/","msgid":"<87cz2aqezb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-05T12:18:48","name":"Add '\''libgomp.{,oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz2aqezb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":103222,"url":"https://patchwork.plctlab.org/api/1.2/patches/103222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rcyqeoh.fsf@euler.schwinge.homeip.net/","msgid":"<878rcyqeoh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-05T12:25:18","name":"driver: Forward '\''-lgfortran'\'', '\''-lm'\'' to offloading compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rcyqeoh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":103303,"url":"https://patchwork.plctlab.org/api/1.2/patches/103303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnV8p_Qs0AZhBYKzUy+inMGCH6hE3ZfVnp1Q3o+ZoC_ng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T14:37:37","name":"libiberty: writeargv: Simplify function error mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnV8p_Qs0AZhBYKzUy+inMGCH6hE3ZfVnp1Q3o+ZoC_ng@mail.gmail.com/mbox/"},{"id":103312,"url":"https://patchwork.plctlab.org/api/1.2/patches/103312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605144952.2546564-1-pan2.li@intel.com/","msgid":"<20230605144952.2546564-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T14:49:52","name":"[v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605144952.2546564-1-pan2.li@intel.com/mbox/"},{"id":103318,"url":"https://patchwork.plctlab.org/api/1.2/patches/103318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605150753.2583349-1-pan2.li@intel.com/","msgid":"<20230605150753.2583349-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T15:07:53","name":"[v1] RISC-V: Fix some typo in vector-iterators.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605150753.2583349-1-pan2.li@intel.com/mbox/"},{"id":103334,"url":"https://patchwork.plctlab.org/api/1.2/patches/103334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/B81FAA88-C26E-49BC-8938-B9A226B33C30@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:12:53","name":"Ping: Fwd: [V9][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/B81FAA88-C26E-49BC-8938-B9A226B33C30@oracle.com/mbox/"},{"id":103364,"url":"https://patchwork.plctlab.org/api/1.2/patches/103364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-cRfW8N=MUkt1Gmy17_+gmc0X0VyOSVQ5P-p9emWLYQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:36:25","name":"[COMMITTED] reginfo: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-cRfW8N=MUkt1Gmy17_+gmc0X0VyOSVQ5P-p9emWLYQ@mail.gmail.com/mbox/"},{"id":103365,"url":"https://patchwork.plctlab.org/api/1.2/patches/103365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUSFhUj49VTu5ghyf8jVZeWtgt3-gQJhGXLx5xb8sKeA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:38:43","name":"[COMMITTED] print-rtl: Change return type of two print functions from int to void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUSFhUj49VTu5ghyf8jVZeWtgt3-gQJhGXLx5xb8sKeA@mail.gmail.com/mbox/"},{"id":103397,"url":"https://patchwork.plctlab.org/api/1.2/patches/103397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605165531.1009946-1-ibuclaw@gdcproject.org/","msgid":"<20230605165531.1009946-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-05T16:55:31","name":"[committed] d: Warn when declared size of a special enum does not match its intrinsic type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605165531.1009946-1-ibuclaw@gdcproject.org/mbox/"},{"id":103502,"url":"https://patchwork.plctlab.org/api/1.2/patches/103502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605212639.204780-1-ppalka@redhat.com/","msgid":"<20230605212639.204780-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-05T21:26:39","name":"c++: extend lookup_template_class shortcut [PR110122]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605212639.204780-1-ppalka@redhat.com/mbox/"},{"id":103528,"url":"https://patchwork.plctlab.org/api/1.2/patches/103528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606015723.12297-1-gaofei@eswincomputing.com/","msgid":"<20230606015723.12297-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-06T01:57:23","name":"[RISC-V] correct machine mode in save-restore cfi RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606015723.12297-1-gaofei@eswincomputing.com/mbox/"},{"id":103536,"url":"https://patchwork.plctlab.org/api/1.2/patches/103536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606024851.D7E7920441@pchp3.se.axis.com/","msgid":"<20230606024851.D7E7920441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-06T02:48:51","name":"[committed] bootstrap rtl-checking: Fix XVEC vs XVECEXP in postreload.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606024851.D7E7920441@pchp3.se.axis.com/mbox/"},{"id":103548,"url":"https://patchwork.plctlab.org/api/1.2/patches/103548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606041635.226494-1-juzhe.zhong@rivai.ai/","msgid":"<20230606041635.226494-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T04:16:35","name":"RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606041635.226494-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103555,"url":"https://patchwork.plctlab.org/api/1.2/patches/103555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-1-hongtao.liu@intel.com/","msgid":"<20230606043121.24843-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T04:31:20","name":"Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-1-hongtao.liu@intel.com/mbox/"},{"id":103554,"url":"https://patchwork.plctlab.org/api/1.2/patches/103554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-2-hongtao.liu@intel.com/","msgid":"<20230606043121.24843-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T04:31:21","name":"Don'\''t fold _mm{, 256}_blendv_epi8 into (mask < 0 ? src1 : src2) when -funsigned-char.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-2-hongtao.liu@intel.com/mbox/"},{"id":103556,"url":"https://patchwork.plctlab.org/api/1.2/patches/103556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-1-dimitar@dinux.eu/","msgid":"<20230606045130.1687824-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-06-06T04:51:29","name":"riscv: Fix insn cost calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-1-dimitar@dinux.eu/mbox/"},{"id":103557,"url":"https://patchwork.plctlab.org/api/1.2/patches/103557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-2-dimitar@dinux.eu/","msgid":"<20230606045130.1687824-2-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-06-06T04:51:30","name":"riscv: Fix scope for memory model calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-2-dimitar@dinux.eu/mbox/"},{"id":103586,"url":"https://patchwork.plctlab.org/api/1.2/patches/103586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606065225.845953-1-jie.mei@oss.cipunited.com/","msgid":"<20230606065225.845953-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-06T06:53:36","name":"[v3] MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606065225.845953-1-jie.mei@oss.cipunited.com/mbox/"},{"id":103595,"url":"https://patchwork.plctlab.org/api/1.2/patches/103595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072151.63CA83857019@sourceware.org/","msgid":"<20230606072151.63CA83857019@sourceware.org>","list_archive_url":null,"date":"2023-06-06T07:21:06","name":"middle-end/110055 - avoid CLOBBERing static variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072151.63CA83857019@sourceware.org/mbox/"},{"id":103598,"url":"https://patchwork.plctlab.org/api/1.2/patches/103598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072215.B9A05385700C@sourceware.org/","msgid":"<20230606072215.B9A05385700C@sourceware.org>","list_archive_url":null,"date":"2023-06-06T07:21:31","name":"tree-optimization/109143 - improve PTA compile time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072215.B9A05385700C@sourceware.org/mbox/"},{"id":103627,"url":"https://patchwork.plctlab.org/api/1.2/patches/103627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606082150.657119-1-hongtao.liu@intel.com/","msgid":"<20230606082150.657119-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T08:21:50","name":"[v2] Explicitly view_convert_expr mask to signed type when folding pblendvb builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606082150.657119-1-hongtao.liu@intel.com/mbox/"},{"id":103637,"url":"https://patchwork.plctlab.org/api/1.2/patches/103637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606083549.658280-1-hongtao.liu@intel.com/","msgid":"<20230606083549.658280-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T08:35:49","name":"[1/2] Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606083549.658280-1-hongtao.liu@intel.com/mbox/"},{"id":103680,"url":"https://patchwork.plctlab.org/api/1.2/patches/103680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com/","msgid":"<124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com>","list_archive_url":null,"date":"2023-06-06T09:19:24","name":"rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com/mbox/"},{"id":103681,"url":"https://patchwork.plctlab.org/api/1.2/patches/103681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2a1af32-3384-dc65-825f-7374b1ec29ef@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T09:20:08","name":"rs6000: Don'\''t use TFmode for 128 bits fp constant in toc [PR110011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2a1af32-3384-dc65-825f-7374b1ec29ef@linux.ibm.com/mbox/"},{"id":103695,"url":"https://patchwork.plctlab.org/api/1.2/patches/103695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qioapgh.fsf@oldenburg3.str.redhat.com/","msgid":"<871qioapgh.fsf@oldenburg3.str.redhat.com>","list_archive_url":null,"date":"2023-06-06T09:51:26","name":"libgcc: Fix eh_frame fast path in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qioapgh.fsf@oldenburg3.str.redhat.com/mbox/"},{"id":103696,"url":"https://patchwork.plctlab.org/api/1.2/patches/103696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095321.24585-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606095321.24585-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T09:53:21","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095321.24585-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103698,"url":"https://patchwork.plctlab.org/api/1.2/patches/103698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095847.171835-1-juzhe.zhong@rivai.ai/","msgid":"<20230606095847.171835-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T09:58:47","name":"RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095847.171835-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103736,"url":"https://patchwork.plctlab.org/api/1.2/patches/103736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606113833.857327-1-jwakely@redhat.com/","msgid":"<20230606113833.857327-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T11:38:33","name":"[committed] libstdc++: Use close-on-exec for file descriptors in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606113833.857327-1-jwakely@redhat.com/mbox/"},{"id":103741,"url":"https://patchwork.plctlab.org/api/1.2/patches/103741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114608.868760-1-jwakely@redhat.com/","msgid":"<20230606114608.868760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T11:46:08","name":"[committed] libstdc++: Fix ambiguous expression in std::array::front() [PR110139]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114608.868760-1-jwakely@redhat.com/mbox/"},{"id":103738,"url":"https://patchwork.plctlab.org/api/1.2/patches/103738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-1-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:30","name":"[V2] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103740,"url":"https://patchwork.plctlab.org/api/1.2/patches/103740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-2-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:31","name":"RISC-V: Enable SELECT_VL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-2-juzhe.zhong@rivai.ai/mbox/"},{"id":103739,"url":"https://patchwork.plctlab.org/api/1.2/patches/103739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-3-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:32","name":"RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-3-juzhe.zhong@rivai.ai/mbox/"},{"id":103742,"url":"https://patchwork.plctlab.org/api/1.2/patches/103742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114803.1630479-1-juzhe.zhong@rivai.ai/","msgid":"<20230606114803.1630479-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:48:03","name":"[V3] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114803.1630479-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103744,"url":"https://patchwork.plctlab.org/api/1.2/patches/103744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114858.447221-1-vultkayn@gcc.gnu.org/","msgid":"<20230606114858.447221-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-06T11:48:58","name":"analyzer: Standalone OOB-warning [PR109437, PR109439]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114858.447221-1-vultkayn@gcc.gnu.org/mbox/"},{"id":103749,"url":"https://patchwork.plctlab.org/api/1.2/patches/103749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606120433.1633720-1-juzhe.zhong@rivai.ai/","msgid":"<20230606120433.1633720-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T12:04:33","name":"[V4] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606120433.1633720-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103773,"url":"https://patchwork.plctlab.org/api/1.2/patches/103773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5732205.e9J7NaK4W3@minbar/","msgid":"<5732205.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-06-06T12:23:37","name":"[committed] libstdc++: Protect against macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5732205.e9J7NaK4W3@minbar/mbox/"},{"id":103775,"url":"https://patchwork.plctlab.org/api/1.2/patches/103775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13130881.nUPlyArG6x@minbar/","msgid":"<13130881.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-06-06T12:25:51","name":"libstdc++: Replace use of incorrect non-temporal store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13130881.nUPlyArG6x@minbar/mbox/"},{"id":103778,"url":"https://patchwork.plctlab.org/api/1.2/patches/103778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6348100.iIbC2pHGDl@minbar/","msgid":"<6348100.iIbC2pHGDl@minbar>","list_archive_url":null,"date":"2023-06-06T12:29:16","name":"libstdc++: Avoid vector casts while still avoiding PR90424","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6348100.iIbC2pHGDl@minbar/mbox/"},{"id":103781,"url":"https://patchwork.plctlab.org/api/1.2/patches/103781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606123646.1553843-1-pan2.li@intel.com/","msgid":"<20230606123646.1553843-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-06T12:36:46","name":"[v1] RISC-V: Refactor ZVFHMIN to separated iterator and pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606123646.1553843-1-pan2.li@intel.com/mbox/"},{"id":103830,"url":"https://patchwork.plctlab.org/api/1.2/patches/103830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606134153.1592417-1-ibuclaw@gdcproject.org/","msgid":"<20230606134153.1592417-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-06T13:41:53","name":"[GCC,12,committed] d: Merge upstream dmd 316b89f1e3, phobos 8e8aaae50.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606134153.1592417-1-ibuclaw@gdcproject.org/mbox/"},{"id":103832,"url":"https://patchwork.plctlab.org/api/1.2/patches/103832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org/","msgid":"<8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-06-06T13:48:31","name":"[1/2] rs6000: genfusion: Rewrite load/compare code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org/mbox/"},{"id":103833,"url":"https://patchwork.plctlab.org/api/1.2/patches/103833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org/","msgid":"<0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-06-06T13:48:32","name":"[2/2] rs6000: genfusion: Delete dead code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org/mbox/"},{"id":103848,"url":"https://patchwork.plctlab.org/api/1.2/patches/103848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4608206.VLH7GnMWUR@minbar/","msgid":"<4608206.VLH7GnMWUR@minbar>","list_archive_url":null,"date":"2023-06-06T14:13:52","name":"libstdc++: Rewrite or avoid casts to 64-bit element types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4608206.VLH7GnMWUR@minbar/mbox/"},{"id":103862,"url":"https://patchwork.plctlab.org/api/1.2/patches/103862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606143446.50118-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606143446.50118-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T14:34:46","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606143446.50118-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103896,"url":"https://patchwork.plctlab.org/api/1.2/patches/103896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com/","msgid":"<3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com>","list_archive_url":null,"date":"2023-06-06T14:55:50","name":"[committed] Re: [PATCHv2] openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com/mbox/"},{"id":103915,"url":"https://patchwork.plctlab.org/api/1.2/patches/103915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com/","msgid":"<3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com>","list_archive_url":null,"date":"2023-06-06T15:10:37","name":"[OpenACC,2.7] Implement host_data must have use_device clause requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com/mbox/"},{"id":103917,"url":"https://patchwork.plctlab.org/api/1.2/patches/103917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b7a229-0ec8-5404-fea2-4612ffb73bf2@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T15:11:55","name":"[OpenACC,2.7] Implement default clause support for data constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b7a229-0ec8-5404-fea2-4612ffb73bf2@siemens.com/mbox/"},{"id":103929,"url":"https://patchwork.plctlab.org/api/1.2/patches/103929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606151706.53910-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606151706.53910-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T15:17:06","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606151706.53910-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103934,"url":"https://patchwork.plctlab.org/api/1.2/patches/103934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606153258.1988789-1-pan2.li@intel.com/","msgid":"<20230606153258.1988789-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-06T15:32:58","name":"[v2] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606153258.1988789-1-pan2.li@intel.com/mbox/"},{"id":103936,"url":"https://patchwork.plctlab.org/api/1.2/patches/103936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0429eff-7eb9-8380-3ae6-e0695b0ab6d8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T15:33:32","name":"libgomp: plugin-gcn - support '\''unified_address'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0429eff-7eb9-8380-3ae6-e0695b0ab6d8@codesourcery.com/mbox/"},{"id":103960,"url":"https://patchwork.plctlab.org/api/1.2/patches/103960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155931.1241991-1-jwakely@redhat.com/","msgid":"<20230606155931.1241991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T15:59:31","name":"[committed] libstdc++: Make std::numeric_limits<__float128> more portable [PR104772]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155931.1241991-1-jwakely@redhat.com/mbox/"},{"id":103961,"url":"https://patchwork.plctlab.org/api/1.2/patches/103961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155947.1242056-1-jwakely@redhat.com/","msgid":"<20230606155947.1242056-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T15:59:47","name":"[committed] libstdc++: Update list of known symbol versions for abi-check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155947.1242056-1-jwakely@redhat.com/mbox/"},{"id":103997,"url":"https://patchwork.plctlab.org/api/1.2/patches/103997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRwe_anb9ozkoKh0nWXKC86w-O76u9G+ruSuvjEPUU+g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T17:22:57","name":"[COMMITTED] reload1: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRwe_anb9ozkoKh0nWXKC86w-O76u9G+ruSuvjEPUU+g@mail.gmail.com/mbox/"},{"id":104030,"url":"https://patchwork.plctlab.org/api/1.2/patches/104030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606182953.815966-1-ppalka@redhat.com/","msgid":"<20230606182953.815966-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-06T18:29:53","name":"c++: unsynthesized defaulted constexpr fn [PR110122]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606182953.815966-1-ppalka@redhat.com/mbox/"},{"id":104095,"url":"https://patchwork.plctlab.org/api/1.2/patches/104095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0f752a624ec9d69b9549d0192105318b5d3c641.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T19:54:04","name":"[ver,2] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0f752a624ec9d69b9549d0192105318b5d3c641.camel@us.ibm.com/mbox/"},{"id":104108,"url":"https://patchwork.plctlab.org/api/1.2/patches/104108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-2-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:22","name":"[v6,1/4] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-2-ben.boeckel@kitware.com/mbox/"},{"id":104110,"url":"https://patchwork.plctlab.org/api/1.2/patches/104110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-3-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:23","name":"[v6,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-3-ben.boeckel@kitware.com/mbox/"},{"id":104109,"url":"https://patchwork.plctlab.org/api/1.2/patches/104109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-5-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:25","name":"[v6,4/4] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-5-ben.boeckel@kitware.com/mbox/"},{"id":104112,"url":"https://patchwork.plctlab.org/api/1.2/patches/104112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606210710.2992237-1-apinski@marvell.com/","msgid":"<20230606210710.2992237-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-06T21:07:10","name":"For the `-A CMP -B -> B CMP A` pattern allow EQ/NE for all integer types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606210710.2992237-1-apinski@marvell.com/mbox/"},{"id":104116,"url":"https://patchwork.plctlab.org/api/1.2/patches/104116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+k9Qum+98u1vML@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-06T21:28:21","name":"modula2: Fix bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+k9Qum+98u1vML@tucnak/mbox/"},{"id":104117,"url":"https://patchwork.plctlab.org/api/1.2/patches/104117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606213315.2993028-1-apinski@marvell.com/","msgid":"<20230606213315.2993028-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-06T21:33:15","name":"[COMMITTED/13] Fix PR 110085: `make clean` in GCC directory on sh target causes a failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606213315.2993028-1-apinski@marvell.com/mbox/"},{"id":104118,"url":"https://patchwork.plctlab.org/api/1.2/patches/104118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+oL657y6sfy08/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-06T21:42:07","name":"middle-end, i386: Pattern recognize add/subtract with carry [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+oL657y6sfy08/@tucnak/mbox/"},{"id":104122,"url":"https://patchwork.plctlab.org/api/1.2/patches/104122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/030901d998c6$ac062250$041266f0$@nextmovesoftware.com/","msgid":"<030901d998c6$ac062250$041266f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-06T22:31:42","name":"[x86_64] PR target/110104: Missing peephole2 for addcarry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/030901d998c6$ac062250$041266f0$@nextmovesoftware.com/mbox/"},{"id":104135,"url":"https://patchwork.plctlab.org/api/1.2/patches/104135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com/","msgid":"<037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-06T23:05:40","name":"[x86] PR target/31985: Improve memory operand use with doubleword add.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com/mbox/"},{"id":104159,"url":"https://patchwork.plctlab.org/api/1.2/patches/104159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-1-apinski@marvell.com/","msgid":"<20230607001706.3000011-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T00:17:05","name":"[1/2] Match: zero_one_valued_p should match 0 constants too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-1-apinski@marvell.com/mbox/"},{"id":104160,"url":"https://patchwork.plctlab.org/api/1.2/patches/104160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-2-apinski@marvell.com/","msgid":"<20230607001706.3000011-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T00:17:06","name":"[2/2] Add match patterns for `a ? onezero : onezero` where one of the two operands are constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-2-apinski@marvell.com/mbox/"},{"id":104171,"url":"https://patchwork.plctlab.org/api/1.2/patches/104171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607012956.2770169-1-jason@redhat.com/","msgid":"<20230607012956.2770169-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:29:56","name":"[pushed] c++: add NRV testcase [PR58050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607012956.2770169-1-jason@redhat.com/mbox/"},{"id":104172,"url":"https://patchwork.plctlab.org/api/1.2/patches/104172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013028.2770448-1-jason@redhat.com/","msgid":"<20230607013028.2770448-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:30:28","name":"[pushed] c++: fix contracts with NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013028.2770448-1-jason@redhat.com/mbox/"},{"id":104173,"url":"https://patchwork.plctlab.org/api/1.2/patches/104173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013053.2770663-1-jason@redhat.com/","msgid":"<20230607013053.2770663-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:30:53","name":"[pushed] c++: fix throwing cleanup with label","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013053.2770663-1-jason@redhat.com/mbox/"},{"id":104176,"url":"https://patchwork.plctlab.org/api/1.2/patches/104176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013116.2770869-1-jason@redhat.com/","msgid":"<20230607013116.2770869-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:31:16","name":"[pushed] c++: NRV and goto [PR92407]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013116.2770869-1-jason@redhat.com/mbox/"},{"id":104174,"url":"https://patchwork.plctlab.org/api/1.2/patches/104174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013214.2771266-1-jason@redhat.com/","msgid":"<20230607013214.2771266-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:32:14","name":"[pushed] c++: enable NRVO from inner block [PR51571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013214.2771266-1-jason@redhat.com/mbox/"},{"id":104175,"url":"https://patchwork.plctlab.org/api/1.2/patches/104175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013303.2771541-1-jason@redhat.com/","msgid":"<20230607013303.2771541-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:33:03","name":"[pushed] c++: Add -Wnrvo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013303.2771541-1-jason@redhat.com/mbox/"},{"id":104192,"url":"https://patchwork.plctlab.org/api/1.2/patches/104192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607021908.615905-1-pan2.li@intel.com/","msgid":"<20230607021908.615905-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T02:19:08","name":"RISC-V: Fix ICE when include riscv_vector.h with rv64gcv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607021908.615905-1-pan2.li@intel.com/mbox/"},{"id":104198,"url":"https://patchwork.plctlab.org/api/1.2/patches/104198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607023147.1602812-1-chenglulu@loongson.cn/","msgid":"<20230607023147.1602812-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-07T02:31:47","name":"LoongArch: Change jumptable'\''s register constraint to '\''q'\'' [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607023147.1602812-1-chenglulu@loongson.cn/mbox/"},{"id":104208,"url":"https://patchwork.plctlab.org/api/1.2/patches/104208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607030038.896932-1-pan2.li@intel.com/","msgid":"<20230607030038.896932-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T03:00:38","name":"[v3] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607030038.896932-1-pan2.li@intel.com/mbox/"},{"id":104213,"url":"https://patchwork.plctlab.org/api/1.2/patches/104213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607031915.115114-1-juzhe.zhong@rivai.ai/","msgid":"<20230607031915.115114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-07T03:19:15","name":"[V2] RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607031915.115114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104223,"url":"https://patchwork.plctlab.org/api/1.2/patches/104223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607040409.2409-1-chenxl04200420@163.com/","msgid":"<20230607040409.2409-1-chenxl04200420@163.com>","list_archive_url":null,"date":"2023-06-07T04:04:09","name":"[v1] LoongArch:Change the default value of LARCH_CALL_RATIO to 6 on the LoongArch architecture.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607040409.2409-1-chenxl04200420@163.com/mbox/"},{"id":104243,"url":"https://patchwork.plctlab.org/api/1.2/patches/104243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com/","msgid":"<68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-06-07T05:44:02","name":"rs6000: Remove redundant initialization [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com/mbox/"},{"id":104248,"url":"https://patchwork.plctlab.org/api/1.2/patches/104248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-2-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:12","name":"[1/4,V4,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-2-gaofei@eswincomputing.com/mbox/"},{"id":104247,"url":"https://patchwork.plctlab.org/api/1.2/patches/104247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-3-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:13","name":"[2/4,RISC-V] support cm.popretz in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-3-gaofei@eswincomputing.com/mbox/"},{"id":104250,"url":"https://patchwork.plctlab.org/api/1.2/patches/104250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-4-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:14","name":"[3/4,RISC-V] resolve confilct between zcmp multi push/pop and shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-4-gaofei@eswincomputing.com/mbox/"},{"id":104249,"url":"https://patchwork.plctlab.org/api/1.2/patches/104249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-5-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-5-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:15","name":"[4/4,RISC-V] support cm.mva01s cm.mvsa01 in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-5-gaofei@eswincomputing.com/mbox/"},{"id":104258,"url":"https://patchwork.plctlab.org/api/1.2/patches/104258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce4f071b-48a4-424b-3be8-9fb645cf2615@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T06:17:27","name":"Add parentheses to clarify precedence between operators [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce4f071b-48a4-424b-3be8-9fb645cf2615@linux.vnet.ibm.com/mbox/"},{"id":104277,"url":"https://patchwork.plctlab.org/api/1.2/patches/104277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607065256.1539150-1-pan2.li@intel.com/","msgid":"<20230607065256.1539150-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T06:52:56","name":"RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607065256.1539150-1-pan2.li@intel.com/mbox/"},{"id":104279,"url":"https://patchwork.plctlab.org/api/1.2/patches/104279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kvpwxo.fsf@euler.schwinge.homeip.net/","msgid":"<87y1kvpwxo.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T07:13:07","name":"Support '\''UNSUPPORTED: [...]: exception handling disabled'\'' for libstdc++ testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kvpwxo.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104317,"url":"https://patchwork.plctlab.org/api/1.2/patches/104317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607074909.3541-1-chenxl04200420@163.com/","msgid":"<20230607074909.3541-1-chenxl04200420@163.com>","list_archive_url":null,"date":"2023-06-07T07:49:09","name":"[v2] LoongArch:Change the default value of LARCH_CALL_RATIO to 6 on the LoongArch architecture.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607074909.3541-1-chenxl04200420@163.com/mbox/"},{"id":104323,"url":"https://patchwork.plctlab.org/api/1.2/patches/104323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607080606.2104805-1-pan2.li@intel.com/","msgid":"<20230607080606.2104805-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T08:06:06","name":"[v5] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607080606.2104805-1-pan2.li@intel.com/mbox/"},{"id":104326,"url":"https://patchwork.plctlab.org/api/1.2/patches/104326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlegv3d35.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-07T08:12:46","name":"[testsuite] bump some tsvc timeouts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlegv3d35.fsf@lxoliva.fsfla.org/mbox/"},{"id":104338,"url":"https://patchwork.plctlab.org/api/1.2/patches/104338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607082111.2773414-1-guojiufu@linux.ibm.com/","msgid":"<20230607082111.2773414-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-07T08:21:11","name":"[V2] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607082111.2773414-1-guojiufu@linux.ibm.com/mbox/"},{"id":104344,"url":"https://patchwork.plctlab.org/api/1.2/patches/104344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de/","msgid":"<5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de>","list_archive_url":null,"date":"2023-06-07T08:41:00","name":"[avr] : Improve bit-extractions as of PR109907.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de/mbox/"},{"id":104385,"url":"https://patchwork.plctlab.org/api/1.2/patches/104385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCmgsL7dv7-NyLKc=vTNVsVSajuaccHZugnEn9Y1VbMHDA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T10:21:42","name":"libiberty: pex-unix.c: Make pex_unix_cleanup signature always match body.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCmgsL7dv7-NyLKc=vTNVsVSajuaccHZugnEn9Y1VbMHDA@mail.gmail.com/mbox/"},{"id":104387,"url":"https://patchwork.plctlab.org/api/1.2/patches/104387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da977e26-f462-c0ec-e054-2cb415ad2493@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T10:25:26","name":"[3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da977e26-f462-c0ec-e054-2cb415ad2493@linux.ibm.com/mbox/"},{"id":104444,"url":"https://patchwork.plctlab.org/api/1.2/patches/104444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a30067cf-e261-211c-d6c9-7a10c99c3ee8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T11:26:48","name":"[committed] testsuite/libgomp.*/target-present-*.{c, f90}: Improve and fix (was: Re: [og12] Fix '\''libgomp.{c-c++-common, fortran}/target-present-*'\'' test cases)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a30067cf-e261-211c-d6c9-7a10c99c3ee8@codesourcery.com/mbox/"},{"id":104485,"url":"https://patchwork.plctlab.org/api/1.2/patches/104485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607124701.2367809-1-juzhe.zhong@rivai.ai/","msgid":"<20230607124701.2367809-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-07T12:47:01","name":"[V4] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607124701.2367809-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104506,"url":"https://patchwork.plctlab.org/api/1.2/patches/104506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-2-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:39","name":"[v2,1/3] RISC-V: Minimal support for ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-2-jiawei@iscas.ac.cn/mbox/"},{"id":104507,"url":"https://patchwork.plctlab.org/api/1.2/patches/104507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-3-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:40","name":"[v2,2/3] RISC-V: Enable compressible features when use ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-3-jiawei@iscas.ac.cn/mbox/"},{"id":104508,"url":"https://patchwork.plctlab.org/api/1.2/patches/104508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-4-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:41","name":"[v2,3/3] RISC-V: Add ZC* test for failed march args being passed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-4-jiawei@iscas.ac.cn/mbox/"},{"id":104515,"url":"https://patchwork.plctlab.org/api/1.2/patches/104515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607131749.82794-1-rzinsly@ventanamicro.com/","msgid":"<20230607131749.82794-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-06-07T13:17:49","name":"RISC-V: Add Veyron V1 pipeline description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607131749.82794-1-rzinsly@ventanamicro.com/mbox/"},{"id":104524,"url":"https://patchwork.plctlab.org/api/1.2/patches/104524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNeDsPTd0lCn0m@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:00:24","name":"[1/3] aarch64: Fix whitespace in ls64 builtin implementation [PR110100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNeDsPTd0lCn0m@arm.com/mbox/"},{"id":104523,"url":"https://patchwork.plctlab.org/api/1.2/patches/104523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNkadMGxK9Aq1X@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:00:49","name":"[2/3] aarch64: Fix wrong code with st64b builtin [PR110100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNkadMGxK9Aq1X@arm.com/mbox/"},{"id":104525,"url":"https://patchwork.plctlab.org/api/1.2/patches/104525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNq/vZLi2HYeKM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:01:15","name":"[3/3] aarch64: Allow compiler to define ls64 builtins [PR110132]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNq/vZLi2HYeKM@arm.com/mbox/"},{"id":104534,"url":"https://patchwork.plctlab.org/api/1.2/patches/104534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a95a55-9f4d-1333-bc74-ddfd348ea0c3@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:20:41","name":"vect: Don'\''t pass subtype to vect_widened_op_tree where not needed [PR 110142]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a95a55-9f4d-1333-bc74-ddfd348ea0c3@arm.com/mbox/"},{"id":104548,"url":"https://patchwork.plctlab.org/api/1.2/patches/104548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com/","msgid":"<7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com>","list_archive_url":null,"date":"2023-06-07T14:48:57","name":"[committed] Fix expected test output on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com/mbox/"},{"id":104552,"url":"https://patchwork.plctlab.org/api/1.2/patches/104552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg5b727b.fsf@euler.schwinge.homeip.net/","msgid":"<87zg5b727b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T14:54:16","name":"Remove '\''gcc/testsuite/g++.dg/warn/Wfree-nonheap-object.s'\'' (was: [PATCH] add -Wmismatched-new-delete to middle end (PR 90629))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg5b727b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104560,"url":"https://patchwork.plctlab.org/api/1.2/patches/104560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn0f71uq.fsf@euler.schwinge.homeip.net/","msgid":"<87wn0f71uq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T15:01:49","name":"Tighten '\''dg-warning'\'' alternatives in '\''c-c++-common/Wfree-nonheap-object{,-2,-3}.c'\'' (was: [PATCH] correct -Wmismatched-new-delete (PR 98160, 98166))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn0f71uq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104593,"url":"https://patchwork.plctlab.org/api/1.2/patches/104593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155314.1369707-1-jwakely@redhat.com/","msgid":"<20230607155314.1369707-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:14","name":"[committed] libstdc++: Fix some tests that fail with -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155314.1369707-1-jwakely@redhat.com/mbox/"},{"id":104597,"url":"https://patchwork.plctlab.org/api/1.2/patches/104597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155320.1369738-1-jwakely@redhat.com/","msgid":"<20230607155320.1369738-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:20","name":"[committed] libstdc++: Fix some tests that fail with -fno-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155320.1369738-1-jwakely@redhat.com/mbox/"},{"id":104598,"url":"https://patchwork.plctlab.org/api/1.2/patches/104598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155333.1369759-1-jwakely@redhat.com/","msgid":"<20230607155333.1369759-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:33","name":"[committed] libstdc++: Restore accidentally removed version in abi-check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155333.1369759-1-jwakely@redhat.com/mbox/"},{"id":104608,"url":"https://patchwork.plctlab.org/api/1.2/patches/104608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKOzc=DcdTNpTFO2MZeRiMSOhZZTJ2zKvq0+SDjZvwCyg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:10:48","name":"[fortran] PR87477 - (associate) - [meta-bug] [F03] issues concerning the ASSOCIATE statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKOzc=DcdTNpTFO2MZeRiMSOhZZTJ2zKvq0+SDjZvwCyg@mail.gmail.com/mbox/"},{"id":104628,"url":"https://patchwork.plctlab.org/api/1.2/patches/104628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC1glXyzhmt7ZQz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:51:14","name":"i386: Fix endless recursion in ix86_expand_vector_init_general with MMX [PR110152]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC1glXyzhmt7ZQz@tucnak/mbox/"},{"id":104630,"url":"https://patchwork.plctlab.org/api/1.2/patches/104630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC3TReXs9CBKEbz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:58:53","name":"optabs: Implement double-word ctz and ffs expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC3TReXs9CBKEbz@tucnak/mbox/"},{"id":104634,"url":"https://patchwork.plctlab.org/api/1.2/patches/104634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC7kEwyILqqnOht@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T17:17:04","name":"libstdc++: Fix up 20_util/to_chars/double.cc test for excess precision [PR110145]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC7kEwyILqqnOht@tucnak/mbox/"},{"id":104708,"url":"https://patchwork.plctlab.org/api/1.2/patches/104708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607212806.3052446-1-apinski@marvell.com/","msgid":"<20230607212806.3052446-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:28:06","name":"MATCH: Fix comment for `(zero_one ==/!= 0) ? y : z y` patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607212806.3052446-1-apinski@marvell.com/mbox/"},{"id":104712,"url":"https://patchwork.plctlab.org/api/1.2/patches/104712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-1-apinski@marvell.com/","msgid":"<20230607213217.3052696-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:15","name":"[1/3] MATCH: Allow unsigned types for `X & -Y -> X * Y` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-1-apinski@marvell.com/mbox/"},{"id":104713,"url":"https://patchwork.plctlab.org/api/1.2/patches/104713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-2-apinski@marvell.com/","msgid":"<20230607213217.3052696-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:16","name":"[2/3] Change the `zero_one ==/!= 0) ? y : z y` patterns to use multiply rather than `(-zero_one) & z`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-2-apinski@marvell.com/mbox/"},{"id":104714,"url":"https://patchwork.plctlab.org/api/1.2/patches/104714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-3-apinski@marvell.com/","msgid":"<20230607213217.3052696-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:17","name":"[3/3] Add Plus to the op list of `(zero_one == 0) ? y : z y` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-3-apinski@marvell.com/mbox/"},{"id":104741,"url":"https://patchwork.plctlab.org/api/1.2/patches/104741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607220615.2981121-1-jason@redhat.com/","msgid":"<20230607220615.2981121-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T22:06:15","name":"[pushed] c++: allow NRV and non-NRV returns [PR58487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607220615.2981121-1-jason@redhat.com/mbox/"},{"id":104772,"url":"https://patchwork.plctlab.org/api/1.2/patches/104772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com/","msgid":"<009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-07T22:54:37","name":"[Committed] Bug fix to new wi::bitreverse_large function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com/mbox/"},{"id":104774,"url":"https://patchwork.plctlab.org/api/1.2/patches/104774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com/","msgid":"<00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-07T23:09:00","name":"[nvptx] Update nvptx'\''s bitrev2 pattern to use BITREVERSE rtx.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com/mbox/"},{"id":104789,"url":"https://patchwork.plctlab.org/api/1.2/patches/104789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-2-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:44","name":"[1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-2-guojiufu@linux.ibm.com/mbox/"},{"id":104792,"url":"https://patchwork.plctlab.org/api/1.2/patches/104792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-3-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:45","name":"[2/4] rs6000: build constant via lis;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-3-guojiufu@linux.ibm.com/mbox/"},{"id":104791,"url":"https://patchwork.plctlab.org/api/1.2/patches/104791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-4-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-4-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:46","name":"[3/4] rs6000: build constant via li/lis;rldicl/rldicr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-4-guojiufu@linux.ibm.com/mbox/"},{"id":104790,"url":"https://patchwork.plctlab.org/api/1.2/patches/104790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-5-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-5-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:47","name":"[4/4] rs6000: build constant via li/lis;rldic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-5-guojiufu@linux.ibm.com/mbox/"},{"id":104794,"url":"https://patchwork.plctlab.org/api/1.2/patches/104794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608020541.2548506-1-juzhe.zhong@rivai.ai/","msgid":"<20230608020541.2548506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-08T02:05:41","name":"[V5] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608020541.2548506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104800,"url":"https://patchwork.plctlab.org/api/1.2/patches/104800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608022721.1226263-1-chenglulu@loongson.cn/","msgid":"<20230608022721.1226263-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-08T02:27:22","name":"[v2] LoongArch: Modify the register constraints for template \"jumptable\" and \"indirect_jump\" from \"r\" to \"e\" [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608022721.1226263-1-chenglulu@loongson.cn/mbox/"},{"id":104823,"url":"https://patchwork.plctlab.org/api/1.2/patches/104823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608052034.1731084-1-pan2.li@intel.com/","msgid":"<20230608052034.1731084-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T05:20:34","name":"[v6] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608052034.1731084-1-pan2.li@intel.com/mbox/"},{"id":104827,"url":"https://patchwork.plctlab.org/api/1.2/patches/104827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608060635.2226754-1-pan2.li@intel.com/","msgid":"<20230608060635.2226754-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T06:06:35","name":"[v7] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608060635.2226754-1-pan2.li@intel.com/mbox/"},{"id":104830,"url":"https://patchwork.plctlab.org/api/1.2/patches/104830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608062954.2513718-1-pan2.li@intel.com/","msgid":"<20230608062954.2513718-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T06:29:54","name":"[v8] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608062954.2513718-1-pan2.li@intel.com/mbox/"},{"id":104861,"url":"https://patchwork.plctlab.org/api/1.2/patches/104861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608075211.2940017-1-pan2.li@intel.com/","msgid":"<20230608075211.2940017-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T07:52:11","name":"[v2] RISC-V: Add more test cases for RVV FP16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608075211.2940017-1-pan2.li@intel.com/mbox/"},{"id":104891,"url":"https://patchwork.plctlab.org/api/1.2/patches/104891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608093048.1677718-1-vultkayn@gcc.gnu.org/","msgid":"<20230608093048.1677718-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-08T09:30:50","name":"[COMMITTED] analyzer: Standalone OOB-warning, formatting fixed [PR109437, PR109439]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608093048.1677718-1-vultkayn@gcc.gnu.org/mbox/"},{"id":104902,"url":"https://patchwork.plctlab.org/api/1.2/patches/104902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/VI1PR08MB53254381C1ACCE759C338488FF50A@VI1PR08MB5325.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T10:00:57","name":"[GCC,AArch64] convert some patterns to new MD syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/VI1PR08MB53254381C1ACCE759C338488FF50A@VI1PR08MB5325.eurprd08.prod.outlook.com/mbox/"},{"id":104916,"url":"https://patchwork.plctlab.org/api/1.2/patches/104916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103103.23794-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230608103103.23794-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-08T10:31:03","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103103.23794-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":104920,"url":"https://patchwork.plctlab.org/api/1.2/patches/104920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103833.25420-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230608103833.25420-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-08T10:38:33","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103833.25420-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":104932,"url":"https://patchwork.plctlab.org/api/1.2/patches/104932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIG2PaKQvzGAfbd2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T11:06:37","name":"[RFC] c++: Accept elaborated-enum-base in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIG2PaKQvzGAfbd2@arm.com/mbox/"},{"id":104935,"url":"https://patchwork.plctlab.org/api/1.2/patches/104935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608112351.207461-1-lehua.ding@rivai.ai/","msgid":"<20230608112351.207461-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-08T11:23:51","name":"testsuite: fix the condition bug in tsvc s176","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608112351.207461-1-lehua.ding@rivai.ai/mbox/"},{"id":104998,"url":"https://patchwork.plctlab.org/api/1.2/patches/104998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or35322f6d.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-08T14:37:30","name":"fix frange_nextafter odr violation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or35322f6d.fsf@lxoliva.fsfla.org/mbox/"},{"id":105006,"url":"https://patchwork.plctlab.org/api/1.2/patches/105006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com/","msgid":"<17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-08T15:21:42","name":"[ver,3] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com/mbox/"},{"id":105077,"url":"https://patchwork.plctlab.org/api/1.2/patches/105077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608175709.462490-1-polacek@redhat.com/","msgid":"<20230608175709.462490-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-08T17:57:09","name":"doc: Clarification for -Wmissing-field-initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608175709.462490-1-polacek@redhat.com/mbox/"},{"id":105084,"url":"https://patchwork.plctlab.org/api/1.2/patches/105084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbd39e11-cf04-87f5-627b-9b526bde87ec@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:26","name":"[COMMITTED,1/4] Fix floating point bug in fold_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbd39e11-cf04-87f5-627b-9b526bde87ec@redhat.com/mbox/"},{"id":105085,"url":"https://patchwork.plctlab.org/api/1.2/patches/105085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4fbb34c-a042-6704-a615-a75f5a32df6c@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:41","name":"[COMMITTED,2/4] - Remove tree_code from range-operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4fbb34c-a042-6704-a615-a75f5a32df6c@redhat.com/mbox/"},{"id":105087,"url":"https://patchwork.plctlab.org/api/1.2/patches/105087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ecb5c5-7daf-fa25-6ec5-beb79bb4e67b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:50","name":"[COMMITTED,3/4] Unify range_operators to one class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ecb5c5-7daf-fa25-6ec5-beb79bb4e67b@redhat.com/mbox/"},{"id":105086,"url":"https://patchwork.plctlab.org/api/1.2/patches/105086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b191c018-04be-dbd8-0e68-b96d9fcc3889@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:58:01","name":"[COMMITTED,4/4] Provide a new dispatch mechanism for range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b191c018-04be-dbd8-0e68-b96d9fcc3889@redhat.com/mbox/"},{"id":105212,"url":"https://patchwork.plctlab.org/api/1.2/patches/105212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609014701.3123763-1-apinski@marvell.com/","msgid":"<20230609014701.3123763-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-09T01:47:01","name":"MATCH: Fix zero_one_valued_p not to match signed 1 bit integers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609014701.3123763-1-apinski@marvell.com/mbox/"},{"id":105280,"url":"https://patchwork.plctlab.org/api/1.2/patches/105280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609055948.1744603-1-pan2.li@intel.com/","msgid":"<20230609055948.1744603-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T05:59:48","name":"[v9] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609055948.1744603-1-pan2.li@intel.com/mbox/"},{"id":105284,"url":"https://patchwork.plctlab.org/api/1.2/patches/105284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609060117.4083144-1-yanzhang.wang@intel.com/","msgid":"<20230609060117.4083144-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-09T06:01:17","name":"[v4] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609060117.4083144-1-yanzhang.wang@intel.com/mbox/"},{"id":105297,"url":"https://patchwork.plctlab.org/api/1.2/patches/105297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609070709.2087327-1-pan2.li@intel.com/","msgid":"<20230609070709.2087327-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T07:07:09","name":"[v10] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609070709.2087327-1-pan2.li@intel.com/mbox/"},{"id":105316,"url":"https://patchwork.plctlab.org/api/1.2/patches/105316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609073932.C782913A47@imap2.suse-dmz.suse.de/","msgid":"<20230609073932.C782913A47@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-09T07:39:32","name":"middle-end/110182 - TYPE_PRECISION on VECTOR_TYPE causes wrong-code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609073932.C782913A47@imap2.suse-dmz.suse.de/mbox/"},{"id":105317,"url":"https://patchwork.plctlab.org/api/1.2/patches/105317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609074005.2815F13A47@imap2.suse-dmz.suse.de/","msgid":"<20230609074005.2815F13A47@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-09T07:40:04","name":"Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609074005.2815F13A47@imap2.suse-dmz.suse.de/mbox/"},{"id":105328,"url":"https://patchwork.plctlab.org/api/1.2/patches/105328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609075301.2214833-1-pan2.li@intel.com/","msgid":"<20230609075301.2214833-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T07:53:01","name":"[v1] RISC-V: Fix one warning of frm enum.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609075301.2214833-1-pan2.li@intel.com/mbox/"},{"id":105355,"url":"https://patchwork.plctlab.org/api/1.2/patches/105355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZILdBQz6TcMnxNqC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-09T08:04:21","name":"[committed] fortran: Fix ICE on pr96024.f90 on big-endian hosts [PR96024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZILdBQz6TcMnxNqC@tucnak/mbox/"},{"id":105424,"url":"https://patchwork.plctlab.org/api/1.2/patches/105424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609083934.556871-1-juzhe.zhong@rivai.ai/","msgid":"<20230609083934.556871-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T08:39:34","name":"[V6] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609083934.556871-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105441,"url":"https://patchwork.plctlab.org/api/1.2/patches/105441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609085647.208295-1-jwakely@redhat.com/","msgid":"<20230609085647.208295-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T08:56:47","name":"[committed] libstdc++: Improve tests for emplace member of sequence containers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609085647.208295-1-jwakely@redhat.com/mbox/"},{"id":105520,"url":"https://patchwork.plctlab.org/api/1.2/patches/105520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609103251.335449-1-juzhe.zhong@rivai.ai/","msgid":"<20230609103251.335449-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T10:32:51","name":"RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609103251.335449-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105537,"url":"https://patchwork.plctlab.org/api/1.2/patches/105537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609104105.9100-1-juzhe.zhong@rivai.ai/","msgid":"<20230609104105.9100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T10:41:05","name":"[V2] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609104105.9100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105582,"url":"https://patchwork.plctlab.org/api/1.2/patches/105582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609120917.294304-1-jwakely@redhat.com/","msgid":"<20230609120917.294304-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:09:17","name":"[committed] libstdc++: Optimize std::to_array for trivial types [PR110167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609120917.294304-1-jwakely@redhat.com/mbox/"},{"id":105583,"url":"https://patchwork.plctlab.org/api/1.2/patches/105583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121025.294493-1-jwakely@redhat.com/","msgid":"<20230609121025.294493-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:10:25","name":"[committed] libstdc++: Fix P2510R3 \"Formatting pointers\" [PR110149]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121025.294493-1-jwakely@redhat.com/mbox/"},{"id":105585,"url":"https://patchwork.plctlab.org/api/1.2/patches/105585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121409.294772-1-jwakely@redhat.com/","msgid":"<20230609121409.294772-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:14:09","name":"[committed] libstdc++: Bump library version to libstdc++.so.6.0.33","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121409.294772-1-jwakely@redhat.com/mbox/"},{"id":105590,"url":"https://patchwork.plctlab.org/api/1.2/patches/105590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121900.307482-1-jwakely@redhat.com/","msgid":"<20230609121900.307482-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:19:00","name":"[committed] libstdc++: Add preprocessor checks to [PR100285]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121900.307482-1-jwakely@redhat.com/mbox/"},{"id":105594,"url":"https://patchwork.plctlab.org/api/1.2/patches/105594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609122614.308487-1-jwakely@redhat.com/","msgid":"<20230609122614.308487-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:26:14","name":"[committed] libstdc++: Remove duplicate definition of _Float128 std::from_chars [PR110077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609122614.308487-1-jwakely@redhat.com/mbox/"},{"id":105676,"url":"https://patchwork.plctlab.org/api/1.2/patches/105676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609143241.115366-1-juzhe.zhong@rivai.ai/","msgid":"<20230609143241.115366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T14:32:41","name":"RISC-V: Fix V_WHOLE && V_FRACT iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609143241.115366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105700,"url":"https://patchwork.plctlab.org/api/1.2/patches/105700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609151909.3628123-1-ppalka@redhat.com/","msgid":"<20230609151909.3628123-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:19:09","name":"c++: diagnostic ICE b/c of empty TPARMS_PRIMARY_TEMPLATE [PR109655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609151909.3628123-1-ppalka@redhat.com/mbox/"},{"id":105708,"url":"https://patchwork.plctlab.org/api/1.2/patches/105708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609153943.3386685-1-jason@redhat.com/","msgid":"<20230609153943.3386685-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:39:43","name":"[pushed] c++: init-list of uncopyable type [PR110102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609153943.3386685-1-jason@redhat.com/mbox/"},{"id":105709,"url":"https://patchwork.plctlab.org/api/1.2/patches/105709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154103.3386960-1-jason@redhat.com/","msgid":"<20230609154103.3386960-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:41:03","name":"[pushed] c++: diagnose auto in template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154103.3386960-1-jason@redhat.com/mbox/"},{"id":105711,"url":"https://patchwork.plctlab.org/api/1.2/patches/105711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154126.3387346-1-jason@redhat.com/","msgid":"<20230609154126.3387346-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:41:26","name":"[pushed] c++: fix 32-bit spaceship failures [PR110185]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154126.3387346-1-jason@redhat.com/mbox/"},{"id":105723,"url":"https://patchwork.plctlab.org/api/1.2/patches/105723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b79a4d10-ac52-0c5a-4ac2-9f86c7f6aed1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-09T16:37:40","name":"[COMMITTED] Relocate range_cast to header, and add a generic version.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b79a4d10-ac52-0c5a-4ac2-9f86c7f6aed1@redhat.com/mbox/"},{"id":105725,"url":"https://patchwork.plctlab.org/api/1.2/patches/105725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec52048f-b11b-3ac2-38ad-8a817de2f7f0@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-09T16:37:50","name":"[COMMITTED] PR ipa/109886 - Also check type being cast to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec52048f-b11b-3ac2-38ad-8a817de2f7f0@redhat.com/mbox/"},{"id":105742,"url":"https://patchwork.plctlab.org/api/1.2/patches/105742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609172753.3164342-1-apinski@marvell.com/","msgid":"<20230609172753.3164342-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-09T17:27:53","name":"MATCH: Fix zero_one_valued_p not to match signed 1 bit integers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609172753.3164342-1-apinski@marvell.com/mbox/"},{"id":105752,"url":"https://patchwork.plctlab.org/api/1.2/patches/105752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-1-mail@tim-lange.me/","msgid":"<20230609182813.72319-1-mail@tim-lange.me>","list_archive_url":null,"date":"2023-06-09T18:28:12","name":"[1/2] analyzer: Fix allocation size false positive on conjured svalue [PR109577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-1-mail@tim-lange.me/mbox/"},{"id":105753,"url":"https://patchwork.plctlab.org/api/1.2/patches/105753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-2-mail@tim-lange.me/","msgid":"<20230609182813.72319-2-mail@tim-lange.me>","list_archive_url":null,"date":"2023-06-09T18:28:13","name":"[2/2] testsuite: Add more allocation size tests for conjured svalues [PR110014]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-2-mail@tim-lange.me/mbox/"},{"id":105821,"url":"https://patchwork.plctlab.org/api/1.2/patches/105821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609220801.587289-1-dmalcolm@redhat.com/","msgid":"<20230609220801.587289-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-09T22:08:01","name":"[pushed] analyzer: add caching to globals with initializers [PR110112]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609220801.587289-1-dmalcolm@redhat.com/mbox/"},{"id":105834,"url":"https://patchwork.plctlab.org/api/1.2/patches/105834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609231143.1359411-1-juzhe.zhong@rivai.ai/","msgid":"<20230609231143.1359411-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T23:11:43","name":"[V3] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609231143.1359411-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105841,"url":"https://patchwork.plctlab.org/api/1.2/patches/105841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609235902.1270855-1-pan2.li@intel.com/","msgid":"<20230609235902.1270855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T23:59:02","name":"[v1] RISC-V: Add test cases for RVV FP16 vreinterpret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609235902.1270855-1-pan2.li@intel.com/mbox/"},{"id":105844,"url":"https://patchwork.plctlab.org/api/1.2/patches/105844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4d04b74-c27a-0129-7466-e19b4afdbcce@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-10T00:33:44","name":"[COMMITTED,1/15] - Provide a unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4d04b74-c27a-0129-7466-e19b4afdbcce@redhat.com/mbox/"},{"id":105847,"url":"https://patchwork.plctlab.org/api/1.2/patches/105847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com/","msgid":"<567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:02","name":"[2/15] Unify EQ_EXPR range operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com/mbox/"},{"id":105845,"url":"https://patchwork.plctlab.org/api/1.2/patches/105845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e54d4610-9361-49c5-85a4-786b779a05b8@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-10T00:34:10","name":"[COMMITTED,3/15] Unify NE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e54d4610-9361-49c5-85a4-786b779a05b8@redhat.com/mbox/"},{"id":105846,"url":"https://patchwork.plctlab.org/api/1.2/patches/105846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com/","msgid":"<84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:21","name":"[COMMITTED,4/15] Unify LT_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com/mbox/"},{"id":105851,"url":"https://patchwork.plctlab.org/api/1.2/patches/105851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2078a799-12da-356b-3802-4e8fdd09614e@redhat.com/","msgid":"<2078a799-12da-356b-3802-4e8fdd09614e@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:33","name":"[COMMITTED,5/15] Unify LE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2078a799-12da-356b-3802-4e8fdd09614e@redhat.com/mbox/"},{"id":105853,"url":"https://patchwork.plctlab.org/api/1.2/patches/105853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com/","msgid":"<2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:47","name":"[COMMITTED,6/15] Unify GT_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com/mbox/"},{"id":105850,"url":"https://patchwork.plctlab.org/api/1.2/patches/105850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com/","msgid":"<08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:01","name":"[COMMITTED,7/15] Unify GE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com/mbox/"},{"id":105848,"url":"https://patchwork.plctlab.org/api/1.2/patches/105848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com/","msgid":"<15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:26","name":"[COMMITTED,8/15] Unify Identity range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com/mbox/"},{"id":105849,"url":"https://patchwork.plctlab.org/api/1.2/patches/105849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com/","msgid":"<4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:37","name":"[COMMITTED,9/15] Unify operator_cst range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com/mbox/"},{"id":105852,"url":"https://patchwork.plctlab.org/api/1.2/patches/105852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com/","msgid":"<2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:51","name":"[COMMITTED,10/15] Unify operator_cast range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com/mbox/"},{"id":105855,"url":"https://patchwork.plctlab.org/api/1.2/patches/105855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com/","msgid":"<37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:36:02","name":"[COMMITTED,11/15] Unify PLUS_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com/mbox/"},{"id":105854,"url":"https://patchwork.plctlab.org/api/1.2/patches/105854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610003737.1679827-1-juzhe.zhong@rivai.ai/","msgid":"<20230610003737.1679827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-10T00:37:37","name":"RISC-V: Enable select_vl for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610003737.1679827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105890,"url":"https://patchwork.plctlab.org/api/1.2/patches/105890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610040528.1058420420@pchp3.se.axis.com/","msgid":"<20230610040528.1058420420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-10T04:05:28","name":"(Re: Splitting up 27_io/basic_istream/ignore/wchar_t/94749.cc (takes too long))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610040528.1058420420@pchp3.se.axis.com/mbox/"},{"id":105926,"url":"https://patchwork.plctlab.org/api/1.2/patches/105926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIRSdNvz+pbiUQLG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-10T10:37:40","name":"[RFC] Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIRSdNvz+pbiUQLG@tucnak/mbox/"},{"id":106019,"url":"https://patchwork.plctlab.org/api/1.2/patches/106019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org/","msgid":"<4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org>","list_archive_url":null,"date":"2023-06-10T21:28:42","name":"[c++] Implement DR 976","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org/mbox/"},{"id":106020,"url":"https://patchwork.plctlab.org/api/1.2/patches/106020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbdce7ef-037a-e677-f309-5125cf16e503@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-06-10T22:03:40","name":"libstdc++: Clarify manual demangle doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbdce7ef-037a-e677-f309-5125cf16e503@jguk.org/mbox/"},{"id":106023,"url":"https://patchwork.plctlab.org/api/1.2/patches/106023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com/","msgid":"<03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-10T22:54:36","name":"[GCC,13] PR target/109973: CCZmode and CCCmode variants of [v]ptest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com/mbox/"},{"id":106025,"url":"https://patchwork.plctlab.org/api/1.2/patches/106025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611003331.3518071-1-pan2.li@intel.com/","msgid":"<20230611003331.3518071-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-11T00:33:31","name":"[v1] RISC-V: Support RVV FP16 MISC vlmul ext intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611003331.3518071-1-pan2.li@intel.com/mbox/"},{"id":106037,"url":"https://patchwork.plctlab.org/api/1.2/patches/106037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-2-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:08","name":"[v4,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-2-kmatsui@cs.washington.edu/mbox/"},{"id":106038,"url":"https://patchwork.plctlab.org/api/1.2/patches/106038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-3-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:09","name":"[v4,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-3-kmatsui@cs.washington.edu/mbox/"},{"id":106039,"url":"https://patchwork.plctlab.org/api/1.2/patches/106039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-4-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:10","name":"[v4,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-4-kmatsui@cs.washington.edu/mbox/"},{"id":106041,"url":"https://patchwork.plctlab.org/api/1.2/patches/106041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-5-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:11","name":"[v4,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-5-kmatsui@cs.washington.edu/mbox/"},{"id":106040,"url":"https://patchwork.plctlab.org/api/1.2/patches/106040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-6-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:12","name":"[v4,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-6-kmatsui@cs.washington.edu/mbox/"},{"id":106042,"url":"https://patchwork.plctlab.org/api/1.2/patches/106042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-7-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:13","name":"[v4,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-7-kmatsui@cs.washington.edu/mbox/"},{"id":106079,"url":"https://patchwork.plctlab.org/api/1.2/patches/106079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de/","msgid":"<8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de>","list_archive_url":null,"date":"2023-06-11T12:01:30","name":"[avr,committed] Tidy code for inverted bit insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de/mbox/"},{"id":106126,"url":"https://patchwork.plctlab.org/api/1.2/patches/106126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com/","msgid":"<00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-11T16:15:14","name":"Avoid duplicate vector initializations during RTL expansion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com/mbox/"},{"id":106162,"url":"https://patchwork.plctlab.org/api/1.2/patches/106162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611230755.70848-1-juzhe.zhong@rivai.ai/","msgid":"<20230611230755.70848-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-11T23:07:55","name":"VECT: Add LEN_MASK_ LOAD/STORE to support flow control for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611230755.70848-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106172,"url":"https://patchwork.plctlab.org/api/1.2/patches/106172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGWvnynHB+8BEh1t_rtTMomEFdaZkaDCS3LU6fetkpF_HWuwbg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T01:18:28","name":"[AIX] Debugging does not require a stack frame.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGWvnynHB+8BEh1t_rtTMomEFdaZkaDCS3LU6fetkpF_HWuwbg@mail.gmail.com/mbox/"},{"id":106176,"url":"https://patchwork.plctlab.org/api/1.2/patches/106176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com/","msgid":"<083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T02:34:45","name":"[PATCHv2,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com/mbox/"},{"id":106177,"url":"https://patchwork.plctlab.org/api/1.2/patches/106177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612024102.580504-1-juzhe.zhong@rivai.ai/","msgid":"<20230612024102.580504-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T02:41:02","name":"RISC-V: Add RVV narrow shift right lowering auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612024102.580504-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106179,"url":"https://patchwork.plctlab.org/api/1.2/patches/106179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612025721.3288649-1-pan2.li@intel.com/","msgid":"<20230612025721.3288649-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T02:57:21","name":"[v1] RISC-V: Add test cases for RVV FP16 undefined and vlmul trunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612025721.3288649-1-pan2.li@intel.com/mbox/"},{"id":106211,"url":"https://patchwork.plctlab.org/api/1.2/patches/106211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612041438.272885-1-juzhe.zhong@rivai.ai/","msgid":"<20230612041438.272885-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T04:14:38","name":"[V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow control for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612041438.272885-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106285,"url":"https://patchwork.plctlab.org/api/1.2/patches/106285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612074024.454116-1-pan2.li@intel.com/","msgid":"<20230612074024.454116-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T07:40:24","name":"[v1] RISC-V: Support RVV FP16 MISC vget/vset intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612074024.454116-1-pan2.li@intel.com/mbox/"},{"id":106293,"url":"https://patchwork.plctlab.org/api/1.2/patches/106293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612075737.1801-1-stefansf@linux.ibm.com/","msgid":"<20230612075737.1801-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T07:57:38","name":"combine: Narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612075737.1801-1-stefansf@linux.ibm.com/mbox/"},{"id":106296,"url":"https://patchwork.plctlab.org/api/1.2/patches/106296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612080828.1292728-1-yanzhang.wang@intel.com/","msgid":"<20230612080828.1292728-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-12T08:08:28","name":"[v5] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612080828.1292728-1-yanzhang.wang@intel.com/mbox/"},{"id":106317,"url":"https://patchwork.plctlab.org/api/1.2/patches/106317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612082756.27638-1-tejas.belagod@arm.com/","msgid":"<20230612082756.27638-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-06-12T08:27:56","name":"[v2,PR96339] Optimise svlast[ab]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612082756.27638-1-tejas.belagod@arm.com/mbox/"},{"id":106335,"url":"https://patchwork.plctlab.org/api/1.2/patches/106335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612085617.3908962-1-jason@redhat.com/","msgid":"<20230612085617.3908962-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-12T08:56:17","name":"[pushed] c++: build initializer_list in a loop [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612085617.3908962-1-jason@redhat.com/mbox/"},{"id":106337,"url":"https://patchwork.plctlab.org/api/1.2/patches/106337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612090110.785CE138EC@imap2.suse-dmz.suse.de/","msgid":"<20230612090110.785CE138EC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-12T09:01:10","name":"middle-end/110200 - genmatch force-leaf and convert interaction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612090110.785CE138EC@imap2.suse-dmz.suse.de/mbox/"},{"id":106376,"url":"https://patchwork.plctlab.org/api/1.2/patches/106376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612093621.1223856-1-juzhe.zhong@rivai.ai/","msgid":"<20230612093621.1223856-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T09:36:21","name":"RISC-V: Add ZVFHMIN autovec block testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612093621.1223856-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106383,"url":"https://patchwork.plctlab.org/api/1.2/patches/106383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612094458.1230512-1-juzhe.zhong@rivai.ai/","msgid":"<20230612094458.1230512-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T09:44:58","name":"[V2] RISC-V: Add ZVFHMIN block autovec testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612094458.1230512-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106472,"url":"https://patchwork.plctlab.org/api/1.2/patches/106472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17379-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T10:20:00","name":"[committed] Regenerate config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17379-tamar@arm.com/mbox/"},{"id":106506,"url":"https://patchwork.plctlab.org/api/1.2/patches/106506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a09039c6-3535-c7c9-8755-acaaabc1278a@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T11:18:21","name":"rs6000: Change bitwise xor to inequality operator [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a09039c6-3535-c7c9-8755-acaaabc1278a@linux.vnet.ibm.com/mbox/"},{"id":106552,"url":"https://patchwork.plctlab.org/api/1.2/patches/106552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612121844.1412921-1-pan2.li@intel.com/","msgid":"<20230612121844.1412921-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T12:18:44","name":"[v1] RISC-V: Fix one potential test failure for RVV vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612121844.1412921-1-pan2.li@intel.com/mbox/"},{"id":106571,"url":"https://patchwork.plctlab.org/api/1.2/patches/106571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17381-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T12:53:26","name":"Remove DEFAULT_MATCHPD_PARTITIONS macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17381-tamar@arm.com/mbox/"},{"id":106586,"url":"https://patchwork.plctlab.org/api/1.2/patches/106586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131903.2C776138EC@imap2.suse-dmz.suse.de/","msgid":"<20230612131903.2C776138EC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-12T13:19:02","name":"Fix disambiguation against .MASK_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131903.2C776138EC@imap2.suse-dmz.suse.de/mbox/"},{"id":106587,"url":"https://patchwork.plctlab.org/api/1.2/patches/106587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131919.269681-1-guojiufu@linux.ibm.com/","msgid":"<20230612131919.269681-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T13:19:19","name":"rs6000: replace '\''(const_int 0)'\'' to '\''unspec:BLK [(const_int 0)]'\'' for stack_tie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131919.269681-1-guojiufu@linux.ibm.com/mbox/"},{"id":106589,"url":"https://patchwork.plctlab.org/api/1.2/patches/106589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612132901.1727002-1-juzhe.zhong@rivai.ai/","msgid":"<20230612132901.1727002-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T13:29:01","name":"RISC-V: Enhance RVV VLA SLP auto-vectorization with decompress operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612132901.1727002-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106602,"url":"https://patchwork.plctlab.org/api/1.2/patches/106602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d99d36$a38111c0$ea833540$@nextmovesoftware.com/","msgid":"<001001d99d36$a38111c0$ea833540$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-12T14:03:16","name":"New finish_compare_by_pieces target hook (for x86).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d99d36$a38111c0$ea833540$@nextmovesoftware.com/mbox/"},{"id":106662,"url":"https://patchwork.plctlab.org/api/1.2/patches/106662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd153fb-4e70-a772-14b1-730490e35611@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T14:55:43","name":"RISC-V: Implement vec_set and vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd153fb-4e70-a772-14b1-730490e35611@gmail.com/mbox/"},{"id":106663,"url":"https://patchwork.plctlab.org/api/1.2/patches/106663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com/","msgid":"<2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com>","list_archive_url":null,"date":"2023-06-12T15:04:16","name":"RISC-V: Add sign-extending variants for vmv.x.s.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com/mbox/"},{"id":106664,"url":"https://patchwork.plctlab.org/api/1.2/patches/106664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612151107.13373-1-juzhe.zhong@rivai.ai/","msgid":"<20230612151107.13373-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T15:11:07","name":"[V2] RISC-V: Enhance RVV VLA SLP auto-vectorization with decompress operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612151107.13373-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106679,"url":"https://patchwork.plctlab.org/api/1.2/patches/106679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com/","msgid":"<0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:07","name":"[COMMITTED,1/17] Move operator_addr_expr to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com/mbox/"},{"id":106681,"url":"https://patchwork.plctlab.org/api/1.2/patches/106681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com/","msgid":"<8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:12","name":"[COMMITTED,2/17] - Move operator_bitwise_not to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com/mbox/"},{"id":106682,"url":"https://patchwork.plctlab.org/api/1.2/patches/106682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com/","msgid":"<0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:17","name":"[COMMITTED,3/17] - Move operator_bitwise_xor to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com/mbox/"},{"id":106683,"url":"https://patchwork.plctlab.org/api/1.2/patches/106683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com/","msgid":"<15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:22","name":"[COMMITTED,4/17] - Move operator_bitwise_and to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com/mbox/"},{"id":106686,"url":"https://patchwork.plctlab.org/api/1.2/patches/106686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com/","msgid":"<158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:27","name":"[COMMITTED,5/17] - Move operator_bitwise_or to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com/mbox/"},{"id":106689,"url":"https://patchwork.plctlab.org/api/1.2/patches/106689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e83ca99a-6042-1629-66e4-05de9c93afb4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:31","name":"[COMMITTED,6/17] - Move operator_min to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e83ca99a-6042-1629-66e4-05de9c93afb4@redhat.com/mbox/"},{"id":106684,"url":"https://patchwork.plctlab.org/api/1.2/patches/106684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef9c4663-9cad-9ae7-defd-e1abb0a0568b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:36","name":"[COMMITTED,7/17] - Move operator_max to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef9c4663-9cad-9ae7-defd-e1abb0a0568b@redhat.com/mbox/"},{"id":106687,"url":"https://patchwork.plctlab.org/api/1.2/patches/106687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com/","msgid":"<419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:40","name":"[COMMITTED,8/17] - Split pointer based range operators to range-op-ptr.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com/mbox/"},{"id":106693,"url":"https://patchwork.plctlab.org/api/1.2/patches/106693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/690d98ed-2389-d664-dff6-00617dd596c0@redhat.com/","msgid":"<690d98ed-2389-d664-dff6-00617dd596c0@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:46","name":"[COMMITTED,9/17] - Add a hybrid BIT_AND_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/690d98ed-2389-d664-dff6-00617dd596c0@redhat.com/mbox/"},{"id":106696,"url":"https://patchwork.plctlab.org/api/1.2/patches/106696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com/","msgid":"<1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:51","name":"[COMMITTED,10/17] - Add a hybrid BIT_IOR_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com/mbox/"},{"id":106685,"url":"https://patchwork.plctlab.org/api/1.2/patches/106685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5eccc69-b7df-f3cc-74b7-421e0ea4247e@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:58","name":"[COMMITTED,11/17] - Add a hybrid MIN_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5eccc69-b7df-f3cc-74b7-421e0ea4247e@redhat.com/mbox/"},{"id":106697,"url":"https://patchwork.plctlab.org/api/1.2/patches/106697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6243523-bb57-6b36-5f9b-b9b97dca0dd8@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:02","name":"[COMMITTED,12/17] - Add a hybrid MAX_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6243523-bb57-6b36-5f9b-b9b97dca0dd8@redhat.com/mbox/"},{"id":106688,"url":"https://patchwork.plctlab.org/api/1.2/patches/106688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com/","msgid":"<8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:33:07","name":"[COMMITTED,13/17] - Remove type from range_op_handler table selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com/mbox/"},{"id":106690,"url":"https://patchwork.plctlab.org/api/1.2/patches/106690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccc6f9e8-75e7-60c9-fc76-e038fe0bca6a@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:12","name":"[COMMITTED,14/17] - Switch from unified table to range_op_table. There can be only one.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccc6f9e8-75e7-60c9-fc76-e038fe0bca6a@redhat.com/mbox/"},{"id":106694,"url":"https://patchwork.plctlab.org/api/1.2/patches/106694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3de06f0-3cdf-eaea-35b2-b61512bf3f77@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:18","name":"[COMMITTED,15/17] - Provide a default range_operator via range_op_handler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3de06f0-3cdf-eaea-35b2-b61512bf3f77@redhat.com/mbox/"},{"id":106692,"url":"https://patchwork.plctlab.org/api/1.2/patches/106692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c74647fd-ba87-65f5-0ef5-5473f148c60b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:23","name":"[COMMITTED,16/17] - Provide interface for non-standard operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c74647fd-ba87-65f5-0ef5-5473f148c60b@redhat.com/mbox/"},{"id":106695,"url":"https://patchwork.plctlab.org/api/1.2/patches/106695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65b29c92-eae6-b709-7928-84a881527724@redhat.com/","msgid":"<65b29c92-eae6-b709-7928-84a881527724@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:33:28","name":"[COMMITTED,17/17] PR tree-optimization/110205 - Add some overrides.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65b29c92-eae6-b709-7928-84a881527724@redhat.com/mbox/"},{"id":106712,"url":"https://patchwork.plctlab.org/api/1.2/patches/106712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64017201-8206-fd22-70e4-897c858ae049@codesourcery.com/","msgid":"<64017201-8206-fd22-70e4-897c858ae049@codesourcery.com>","list_archive_url":null,"date":"2023-06-12T16:44:23","name":"[committed] OpenMP: Cleanups related to the '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64017201-8206-fd22-70e4-897c858ae049@codesourcery.com/mbox/"},{"id":106764,"url":"https://patchwork.plctlab.org/api/1.2/patches/106764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com/","msgid":"<52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com>","list_archive_url":null,"date":"2023-06-12T18:55:49","name":"[committed,PR,rtl-optimization/101188] Fix reload_cse_move2add ignoring clobbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com/mbox/"},{"id":106779,"url":"https://patchwork.plctlab.org/api/1.2/patches/106779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId3OsN8187JLiKV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:51:22","name":"c: Add __typeof_unqual__ and __typeof_unqual support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId3OsN8187JLiKV@tucnak/mbox/"},{"id":106784,"url":"https://patchwork.plctlab.org/api/1.2/patches/106784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId4nTL6nFuc02rH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:57:17","name":"c, c++: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId4nTL6nFuc02rH@tucnak/mbox/"},{"id":106787,"url":"https://patchwork.plctlab.org/api/1.2/patches/106787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId5JjzFMuybL4v5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:59:34","name":"c: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId5JjzFMuybL4v5@tucnak/mbox/"},{"id":106891,"url":"https://patchwork.plctlab.org/api/1.2/patches/106891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ee69c69e-7b4c-48d6-8f89-a5c4467fd9e6-1686604365454@3c-app-gmx-bs01/","msgid":"","list_archive_url":null,"date":"2023-06-12T21:12:45","name":"Fortran: fix passing of zero-sized array arguments to procedures [PR86277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ee69c69e-7b4c-48d6-8f89-a5c4467fd9e6-1686604365454@3c-app-gmx-bs01/mbox/"},{"id":106920,"url":"https://patchwork.plctlab.org/api/1.2/patches/106920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-2-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:26","name":"[v5,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-2-kmatsui@cs.washington.edu/mbox/"},{"id":106921,"url":"https://patchwork.plctlab.org/api/1.2/patches/106921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-3-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:27","name":"[v5,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-3-kmatsui@cs.washington.edu/mbox/"},{"id":106922,"url":"https://patchwork.plctlab.org/api/1.2/patches/106922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-4-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:28","name":"[v5,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-4-kmatsui@cs.washington.edu/mbox/"},{"id":106923,"url":"https://patchwork.plctlab.org/api/1.2/patches/106923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-5-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:29","name":"[v5,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-5-kmatsui@cs.washington.edu/mbox/"},{"id":106925,"url":"https://patchwork.plctlab.org/api/1.2/patches/106925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-6-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:30","name":"[v5,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-6-kmatsui@cs.washington.edu/mbox/"},{"id":106926,"url":"https://patchwork.plctlab.org/api/1.2/patches/106926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-7-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:31","name":"[v5,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-7-kmatsui@cs.washington.edu/mbox/"},{"id":106929,"url":"https://patchwork.plctlab.org/api/1.2/patches/106929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-2-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:47","name":"[v6,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-2-kmatsui@cs.washington.edu/mbox/"},{"id":106930,"url":"https://patchwork.plctlab.org/api/1.2/patches/106930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-3-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:48","name":"[v6,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-3-kmatsui@cs.washington.edu/mbox/"},{"id":106932,"url":"https://patchwork.plctlab.org/api/1.2/patches/106932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-4-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:49","name":"[v6,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-4-kmatsui@cs.washington.edu/mbox/"},{"id":106931,"url":"https://patchwork.plctlab.org/api/1.2/patches/106931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-5-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:50","name":"[v6,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-5-kmatsui@cs.washington.edu/mbox/"},{"id":106935,"url":"https://patchwork.plctlab.org/api/1.2/patches/106935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-6-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:51","name":"[v6,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-6-kmatsui@cs.washington.edu/mbox/"},{"id":106933,"url":"https://patchwork.plctlab.org/api/1.2/patches/106933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-7-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:52","name":"[v6,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-7-kmatsui@cs.washington.edu/mbox/"},{"id":106936,"url":"https://patchwork.plctlab.org/api/1.2/patches/106936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-2-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:24","name":"[v7,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-2-kmatsui@cs.washington.edu/mbox/"},{"id":106937,"url":"https://patchwork.plctlab.org/api/1.2/patches/106937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-3-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:25","name":"[v7,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-3-kmatsui@cs.washington.edu/mbox/"},{"id":106938,"url":"https://patchwork.plctlab.org/api/1.2/patches/106938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-4-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:26","name":"[v7,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-4-kmatsui@cs.washington.edu/mbox/"},{"id":106939,"url":"https://patchwork.plctlab.org/api/1.2/patches/106939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-5-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:27","name":"[v7,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-5-kmatsui@cs.washington.edu/mbox/"},{"id":106940,"url":"https://patchwork.plctlab.org/api/1.2/patches/106940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-6-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:28","name":"[v7,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-6-kmatsui@cs.washington.edu/mbox/"},{"id":106941,"url":"https://patchwork.plctlab.org/api/1.2/patches/106941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-7-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:29","name":"[v7,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-7-kmatsui@cs.washington.edu/mbox/"},{"id":106962,"url":"https://patchwork.plctlab.org/api/1.2/patches/106962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIe0tCZyKfle3+BU@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T00:13:40","name":"[wwwdocs] cxx-dr-status: Update from C++ Core Language Issue TOC, Revision 111","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIe0tCZyKfle3+BU@redhat.com/mbox/"},{"id":107005,"url":"https://patchwork.plctlab.org/api/1.2/patches/107005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613005921.93315-1-jorgen.kvalsvik@woven.toyota/","msgid":"<20230613005921.93315-1-jorgen.kvalsvik@woven.toyota>","list_archive_url":null,"date":"2023-06-13T00:59:21","name":"[v4] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613005921.93315-1-jorgen.kvalsvik@woven.toyota/mbox/"},{"id":107016,"url":"https://patchwork.plctlab.org/api/1.2/patches/107016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8597dce488a3301f4b9917249a5a286b925f87c.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:22","name":"[1/9] vect: Move vect_model_load_cost next to the transform in vectorizable_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8597dce488a3301f4b9917249a5a286b925f87c.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107019,"url":"https://patchwork.plctlab.org/api/1.2/patches/107019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com/","msgid":"<9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:23","name":"[2/9] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER && gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107017,"url":"https://patchwork.plctlab.org/api/1.2/patches/107017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db8fecc7f079cd781695e26b6a7bf6a47e14e8ab.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:24","name":"[3/9] vect: Adjust vectorizable_load costing on VMAT_INVARIANT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db8fecc7f079cd781695e26b6a7bf6a47e14e8ab.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107022,"url":"https://patchwork.plctlab.org/api/1.2/patches/107022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com/","msgid":"<0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:25","name":"[4/9] vect: Adjust vectorizable_load costing on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107023,"url":"https://patchwork.plctlab.org/api/1.2/patches/107023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea7b896e3cbc7ffc13e802a12f3ece1c625b0c4d.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:26","name":"[5/9] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea7b896e3cbc7ffc13e802a12f3ece1c625b0c4d.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107018,"url":"https://patchwork.plctlab.org/api/1.2/patches/107018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com/","msgid":"<1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:27","name":"[6/9] vect: Adjust vectorizable_load costing on VMAT_LOAD_STORE_LANES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107024,"url":"https://patchwork.plctlab.org/api/1.2/patches/107024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0d83a313ba6b9d6dd33bcbd7981f04ce733cc4e.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:28","name":"[7/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS_REVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0d83a313ba6b9d6dd33bcbd7981f04ce733cc4e.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107021,"url":"https://patchwork.plctlab.org/api/1.2/patches/107021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com/","msgid":"<216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:29","name":"[8/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS_PERMUTE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107020,"url":"https://patchwork.plctlab.org/api/1.2/patches/107020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com/","msgid":"<625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:30","name":"[9/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107026,"url":"https://patchwork.plctlab.org/api/1.2/patches/107026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613022611.2189297-1-juzhe.zhong@rivai.ai/","msgid":"<20230613022611.2189297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T02:26:11","name":"RISC-V: Add comments of some functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613022611.2189297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107028,"url":"https://patchwork.plctlab.org/api/1.2/patches/107028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613024640.2726370-1-yanzhang.wang@intel.com/","msgid":"<20230613024640.2726370-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-13T02:46:40","name":"[v6] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613024640.2726370-1-yanzhang.wang@intel.com/mbox/"},{"id":107054,"url":"https://patchwork.plctlab.org/api/1.2/patches/107054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPzzfctOqwsbG4ig4gT2eUWc5C+YdLZPJfKtHDgN8OKSQU+PzA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T03:18:54","name":"Fix note_defect3 function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPzzfctOqwsbG4ig4gT2eUWc5C+YdLZPJfKtHDgN8OKSQU+PzA@mail.gmail.com/mbox/"},{"id":107056,"url":"https://patchwork.plctlab.org/api/1.2/patches/107056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613032823.264347-1-maskray@google.com/","msgid":"<20230613032823.264347-1-maskray@google.com>","list_archive_url":null,"date":"2023-06-13T03:28:23","name":"[v3] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613032823.264347-1-maskray@google.com/mbox/"},{"id":107105,"url":"https://patchwork.plctlab.org/api/1.2/patches/107105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613064126.1323-1-jinma@linux.alibaba.com/","msgid":"<20230613064126.1323-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-06-13T06:41:26","name":"RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613064126.1323-1-jinma@linux.alibaba.com/mbox/"},{"id":107116,"url":"https://patchwork.plctlab.org/api/1.2/patches/107116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613071703.704283-1-pan2.li@intel.com/","msgid":"<20230613071703.704283-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-13T07:17:03","name":"[v1] RISC-V: Fix one typo in full-vec-movel test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613071703.704283-1-pan2.li@intel.com/mbox/"},{"id":107131,"url":"https://patchwork.plctlab.org/api/1.2/patches/107131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073723.238680-1-poulhies@adacore.com/","msgid":"<20230613073723.238680-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:23","name":"[COMMITTED] ada: Remove explicit decoration of wrapper created in freezing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073723.238680-1-poulhies@adacore.com/mbox/"},{"id":107135,"url":"https://patchwork.plctlab.org/api/1.2/patches/107135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073736.238835-1-poulhies@adacore.com/","msgid":"<20230613073736.238835-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:36","name":"[COMMITTED] ada: Support new GNAT-specific aspect Ghost_Predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073736.238835-1-poulhies@adacore.com/mbox/"},{"id":107132,"url":"https://patchwork.plctlab.org/api/1.2/patches/107132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073740.238900-1-poulhies@adacore.com/","msgid":"<20230613073740.238900-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:40","name":"[COMMITTED] ada: Simplify appending to a newly created list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073740.238900-1-poulhies@adacore.com/mbox/"},{"id":107136,"url":"https://patchwork.plctlab.org/api/1.2/patches/107136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073742.238961-1-poulhies@adacore.com/","msgid":"<20230613073742.238961-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:42","name":"[COMMITTED] ada: Tune style in detection of writable function actuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073742.238961-1-poulhies@adacore.com/mbox/"},{"id":107140,"url":"https://patchwork.plctlab.org/api/1.2/patches/107140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073744.239061-1-poulhies@adacore.com/","msgid":"<20230613073744.239061-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:44","name":"[COMMITTED] ada: Cleanup expansion of locally handled exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073744.239061-1-poulhies@adacore.com/mbox/"},{"id":107144,"url":"https://patchwork.plctlab.org/api/1.2/patches/107144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073746.239122-1-poulhies@adacore.com/","msgid":"<20230613073746.239122-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:46","name":"[COMMITTED] ada: Cleanup finding of locally handled exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073746.239122-1-poulhies@adacore.com/mbox/"},{"id":107147,"url":"https://patchwork.plctlab.org/api/1.2/patches/107147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073749.239184-1-poulhies@adacore.com/","msgid":"<20230613073749.239184-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:49","name":"[COMMITTED] ada: Remove wrong comment about expansion of exceptions for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073749.239184-1-poulhies@adacore.com/mbox/"},{"id":107137,"url":"https://patchwork.plctlab.org/api/1.2/patches/107137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073751.239246-1-poulhies@adacore.com/","msgid":"<20230613073751.239246-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:51","name":"[COMMITTED] ada: Factor common processing in expansion of aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073751.239246-1-poulhies@adacore.com/mbox/"},{"id":107133,"url":"https://patchwork.plctlab.org/api/1.2/patches/107133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073753.239309-1-poulhies@adacore.com/","msgid":"<20230613073753.239309-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:53","name":"[COMMITTED] ada: Fix expansion of aggregates with controlled components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073753.239309-1-poulhies@adacore.com/mbox/"},{"id":107153,"url":"https://patchwork.plctlab.org/api/1.2/patches/107153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073756.239408-1-poulhies@adacore.com/","msgid":"<20230613073756.239408-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:56","name":"[COMMITTED] ada: Use ghost predicate in standard library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073756.239408-1-poulhies@adacore.com/mbox/"},{"id":107134,"url":"https://patchwork.plctlab.org/api/1.2/patches/107134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073758.239469-1-poulhies@adacore.com/","msgid":"<20230613073758.239469-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:58","name":"[COMMITTED] ada: Factor out tag assignments from type in expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073758.239469-1-poulhies@adacore.com/mbox/"},{"id":107138,"url":"https://patchwork.plctlab.org/api/1.2/patches/107138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073800.239531-1-poulhies@adacore.com/","msgid":"<20230613073800.239531-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:00","name":"[COMMITTED] ada: Add No_Elaboration_Code_All pragma to System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073800.239531-1-poulhies@adacore.com/mbox/"},{"id":107157,"url":"https://patchwork.plctlab.org/api/1.2/patches/107157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073802.239593-1-poulhies@adacore.com/","msgid":"<20230613073802.239593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:02","name":"[COMMITTED] ada: Mark attribute Initialized as ghost code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073802.239593-1-poulhies@adacore.com/mbox/"},{"id":107142,"url":"https://patchwork.plctlab.org/api/1.2/patches/107142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073804.239660-1-poulhies@adacore.com/","msgid":"<20230613073804.239660-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:04","name":"[COMMITTED] ada: Fix wrong expansion of limited extension aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073804.239660-1-poulhies@adacore.com/mbox/"},{"id":107141,"url":"https://patchwork.plctlab.org/api/1.2/patches/107141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073809.239731-1-poulhies@adacore.com/","msgid":"<20230613073809.239731-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:09","name":"[COMMITTED] ada: Small housekeeping work in expansion of extension aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073809.239731-1-poulhies@adacore.com/mbox/"},{"id":107149,"url":"https://patchwork.plctlab.org/api/1.2/patches/107149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073811.239803-1-poulhies@adacore.com/","msgid":"<20230613073811.239803-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:11","name":"[COMMITTED] ada: Remove unreferenced routine Is_Inherited_Operation_For_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073811.239803-1-poulhies@adacore.com/mbox/"},{"id":107145,"url":"https://patchwork.plctlab.org/api/1.2/patches/107145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073814.239864-1-poulhies@adacore.com/","msgid":"<20230613073814.239864-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:14","name":"[COMMITTED] ada: Remove obsolete code in Analyze_Assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073814.239864-1-poulhies@adacore.com/mbox/"},{"id":107154,"url":"https://patchwork.plctlab.org/api/1.2/patches/107154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073816.239933-1-poulhies@adacore.com/","msgid":"<20230613073816.239933-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:16","name":"[COMMITTED] ada: Streamline expansion of controlled actions for aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073816.239933-1-poulhies@adacore.com/mbox/"},{"id":107146,"url":"https://patchwork.plctlab.org/api/1.2/patches/107146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073818.239995-1-poulhies@adacore.com/","msgid":"<20230613073818.239995-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:18","name":"[COMMITTED] ada: Fix internal error on imported function with post-condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073818.239995-1-poulhies@adacore.com/mbox/"},{"id":107159,"url":"https://patchwork.plctlab.org/api/1.2/patches/107159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073821.240073-1-poulhies@adacore.com/","msgid":"<20230613073821.240073-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:21","name":"[COMMITTED] ada: Fix spurious error on call to function returning private in generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073821.240073-1-poulhies@adacore.com/mbox/"},{"id":107150,"url":"https://patchwork.plctlab.org/api/1.2/patches/107150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073823.240135-1-poulhies@adacore.com/","msgid":"<20230613073823.240135-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:23","name":"[COMMITTED] ada: Fix exception raised on invalid contract in generic package","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073823.240135-1-poulhies@adacore.com/mbox/"},{"id":107162,"url":"https://patchwork.plctlab.org/api/1.2/patches/107162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073825.240197-1-poulhies@adacore.com/","msgid":"<20230613073825.240197-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:25","name":"[COMMITTED] ada: Fix iterated component initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073825.240197-1-poulhies@adacore.com/mbox/"},{"id":107167,"url":"https://patchwork.plctlab.org/api/1.2/patches/107167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073827.240259-1-poulhies@adacore.com/","msgid":"<20230613073827.240259-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:27","name":"[COMMITTED] ada: Fix another case of missing Has_Private_View flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073827.240259-1-poulhies@adacore.com/mbox/"},{"id":107155,"url":"https://patchwork.plctlab.org/api/1.2/patches/107155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073829.240320-1-poulhies@adacore.com/","msgid":"<20230613073829.240320-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:29","name":"[COMMITTED] ada: Skip elaboration checks for abstract subprograms on derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073829.240320-1-poulhies@adacore.com/mbox/"},{"id":107158,"url":"https://patchwork.plctlab.org/api/1.2/patches/107158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073831.240386-1-poulhies@adacore.com/","msgid":"<20230613073831.240386-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:31","name":"[COMMITTED] ada: Implement new aspect Always_Terminates for SPARK","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073831.240386-1-poulhies@adacore.com/mbox/"},{"id":107160,"url":"https://patchwork.plctlab.org/api/1.2/patches/107160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073835.240455-1-poulhies@adacore.com/","msgid":"<20230613073835.240455-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:35","name":"[COMMITTED] ada: Disable inlining in potentially unevaluated contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073835.240455-1-poulhies@adacore.com/mbox/"},{"id":107163,"url":"https://patchwork.plctlab.org/api/1.2/patches/107163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073837.240516-1-poulhies@adacore.com/","msgid":"<20230613073837.240516-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:37","name":"[COMMITTED] ada: Recognize iterated_component_association as potentially unevaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073837.240516-1-poulhies@adacore.com/mbox/"},{"id":107164,"url":"https://patchwork.plctlab.org/api/1.2/patches/107164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073839.240577-1-poulhies@adacore.com/","msgid":"<20230613073839.240577-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:39","name":"[COMMITTED] ada: Recognize iterated_component_association as repeatedly evaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073839.240577-1-poulhies@adacore.com/mbox/"},{"id":107151,"url":"https://patchwork.plctlab.org/api/1.2/patches/107151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073841.240638-1-poulhies@adacore.com/","msgid":"<20230613073841.240638-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:41","name":"[COMMITTED] ada: Add missing ss_mark/ss_release in quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073841.240638-1-poulhies@adacore.com/mbox/"},{"id":107168,"url":"https://patchwork.plctlab.org/api/1.2/patches/107168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073844.240700-1-poulhies@adacore.com/","msgid":"<20230613073844.240700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:44","name":"[COMMITTED] ada: Fix decoration of iterated component association for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073844.240700-1-poulhies@adacore.com/mbox/"},{"id":107174,"url":"https://patchwork.plctlab.org/api/1.2/patches/107174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e52b7d-30cb-a571-c1f3-fb9275dc2498@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T08:11:07","name":"[committed] testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e52b7d-30cb-a571-c1f3-fb9275dc2498@linux.ibm.com/mbox/"},{"id":107184,"url":"https://patchwork.plctlab.org/api/1.2/patches/107184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082643.149991-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230613082643.149991-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-13T08:26:43","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082643.149991-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":107185,"url":"https://patchwork.plctlab.org/api/1.2/patches/107185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082715.150054-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230613082715.150054-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-13T08:27:15","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082715.150054-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":107190,"url":"https://patchwork.plctlab.org/api/1.2/patches/107190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084223.D3B863857006@sourceware.org/","msgid":"<20230613084223.D3B863857006@sourceware.org>","list_archive_url":null,"date":"2023-06-13T08:41:32","name":"Fix disambiguation against .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084223.D3B863857006@sourceware.org/mbox/"},{"id":107191,"url":"https://patchwork.plctlab.org/api/1.2/patches/107191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084337.9F2843858414@sourceware.org/","msgid":"<20230613084337.9F2843858414@sourceware.org>","list_archive_url":null,"date":"2023-06-13T08:42:15","name":"middle-end/110232 - fix native interpret of vector ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084337.9F2843858414@sourceware.org/mbox/"},{"id":107194,"url":"https://patchwork.plctlab.org/api/1.2/patches/107194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com/","msgid":"<3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T08:49:45","name":"[PATCHv3,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com/mbox/"},{"id":107210,"url":"https://patchwork.plctlab.org/api/1.2/patches/107210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613091449.324764-1-juzhe.zhong@rivai.ai/","msgid":"<20230613091449.324764-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T09:14:49","name":"RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613091449.324764-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107212,"url":"https://patchwork.plctlab.org/api/1.2/patches/107212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613093055.329955-1-juzhe.zhong@rivai.ai/","msgid":"<20230613093055.329955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T09:30:55","name":"RISC-V: Fix bug of VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613093055.329955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107215,"url":"https://patchwork.plctlab.org/api/1.2/patches/107215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com/","msgid":"<13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T09:35:11","name":"[committed] libgomp/testsuite: Add requires-unified-addr-1.{c,f90} [PR109837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com/mbox/"},{"id":107261,"url":"https://patchwork.plctlab.org/api/1.2/patches/107261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613103541.96476-1-juzhe.zhong@rivai.ai/","msgid":"<20230613103541.96476-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:35:41","name":"[V2] RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613103541.96476-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107263,"url":"https://patchwork.plctlab.org/api/1.2/patches/107263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttvb7ied.fsf@euler.schwinge.homeip.net/","msgid":"<87ttvb7ied.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-13T10:42:34","name":"[ping] Add '\''libgomp.{, oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttvb7ied.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107264,"url":"https://patchwork.plctlab.org/api/1.2/patches/107264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qf7ibj.fsf@euler.schwinge.homeip.net/","msgid":"<87r0qf7ibj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-13T10:44:16","name":"[ping] driver: Forward '\''-lgfortran'\'', '\''-lm'\'' to offloading compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qf7ibj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107270,"url":"https://patchwork.plctlab.org/api/1.2/patches/107270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105304.708770-1-lehua.ding@rivai.ai/","msgid":"<20230613105304.708770-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:53:04","name":"RISC-V: Remove duplicate `#include \"riscv-vector-switch.def\"`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105304.708770-1-lehua.ding@rivai.ai/mbox/"},{"id":107273,"url":"https://patchwork.plctlab.org/api/1.2/patches/107273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105909.820090-1-lehua.ding@rivai.ai/","msgid":"<20230613105909.820090-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:59:09","name":"[V2] RISC-V: Remove duplicate `#include \"riscv-vector-switch.def\"`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105909.820090-1-lehua.ding@rivai.ai/mbox/"},{"id":107318,"url":"https://patchwork.plctlab.org/api/1.2/patches/107318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613113838.183314-1-juzhe.zhong@rivai.ai/","msgid":"<20230613113838.183314-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T11:38:38","name":"[V3] RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613113838.183314-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107336,"url":"https://patchwork.plctlab.org/api/1.2/patches/107336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613120934.4183450-1-jason@redhat.com/","msgid":"<20230613120934.4183450-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-13T12:09:34","name":"[pushed] c++: mutable temps in rodata","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613120934.4183450-1-jason@redhat.com/mbox/"},{"id":107344,"url":"https://patchwork.plctlab.org/api/1.2/patches/107344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122209.B5D7B3858C30@sourceware.org/","msgid":"<20230613122209.B5D7B3858C30@sourceware.org>","list_archive_url":null,"date":"2023-06-13T12:21:26","name":"Fix memory leak in loop header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122209.B5D7B3858C30@sourceware.org/mbox/"},{"id":107345,"url":"https://patchwork.plctlab.org/api/1.2/patches/107345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122335.2108620-1-guojiufu@linux.ibm.com/","msgid":"<20230613122335.2108620-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T12:23:35","name":"rs6000: replace '\''(const_int 0)'\'' to '\''unspec:BLK [(const_int 0)]'\'' for stack_tie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122335.2108620-1-guojiufu@linux.ibm.com/mbox/"},{"id":107369,"url":"https://patchwork.plctlab.org/api/1.2/patches/107369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613130529.7762-1-someguy@effective-light.com/","msgid":"<20230613130529.7762-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-06-13T13:05:29","name":"Add -Wmissing-variable-declarations [PR65213].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613130529.7762-1-someguy@effective-light.com/mbox/"},{"id":107441,"url":"https://patchwork.plctlab.org/api/1.2/patches/107441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1a5d579-f28c-9417-44ed-ba6248850398@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T15:52:25","name":"[OpenACC,2.7] Implement self clause for compute constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1a5d579-f28c-9417-44ed-ba6248850398@siemens.com/mbox/"},{"id":107444,"url":"https://patchwork.plctlab.org/api/1.2/patches/107444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com/","msgid":"<0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T15:55:57","name":"vect: Vectorize via libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com/mbox/"},{"id":107448,"url":"https://patchwork.plctlab.org/api/1.2/patches/107448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com/","msgid":"<00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-13T16:03:52","name":"[x86] Convert ptestz of pandn into ptestc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com/mbox/"},{"id":107458,"url":"https://patchwork.plctlab.org/api/1.2/patches/107458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIiZbniaGFLYHGwi@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-13T16:29:34","name":"libcpp: Diagnose #include after failed __has_include [PR80753]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIiZbniaGFLYHGwi@tucnak/mbox/"},{"id":107462,"url":"https://patchwork.plctlab.org/api/1.2/patches/107462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIicZLX240GoXGAs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-13T16:42:12","name":"[committed] i386: Fix up whitespace in assembly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIicZLX240GoXGAs@tucnak/mbox/"},{"id":107470,"url":"https://patchwork.plctlab.org/api/1.2/patches/107470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com/","msgid":"<57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com>","list_archive_url":null,"date":"2023-06-13T17:15:07","name":"[committed] Remove sh5media divtab code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com/mbox/"},{"id":107496,"url":"https://patchwork.plctlab.org/api/1.2/patches/107496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f028ee5a-489a-200b-028c-92cf7ee32115@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T17:49:03","name":"[commited] Remove a couple mudflap remnants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f028ee5a-489a-200b-028c-92cf7ee32115@gmail.com/mbox/"},{"id":107509,"url":"https://patchwork.plctlab.org/api/1.2/patches/107509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com/","msgid":"<1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T18:44:39","name":"OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com/mbox/"},{"id":107510,"url":"https://patchwork.plctlab.org/api/1.2/patches/107510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc0e7c7-27e0-c6e1-7fa0-c2283ee2903b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T18:45:33","name":"[wwwdocs] gcc-14/changes.html + projects/gomp/: GCC 14 OpenMP update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc0e7c7-27e0-c6e1-7fa0-c2283ee2903b@codesourcery.com/mbox/"},{"id":107547,"url":"https://patchwork.plctlab.org/api/1.2/patches/107547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb2c916c-cd80-03ae-a0c5-9c70adad7a6f@acm.org/","msgid":"","list_archive_url":null,"date":"2023-06-13T21:11:02","name":"Fix templated conversion operator demangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb2c916c-cd80-03ae-a0c5-9c70adad7a6f@acm.org/mbox/"},{"id":107558,"url":"https://patchwork.plctlab.org/api/1.2/patches/107558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613214618.879071-1-dmalcolm@redhat.com/","msgid":"<20230613214618.879071-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-13T21:46:18","name":"[pushed] c/c++: use positive tone in missing header notes [PR84890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613214618.879071-1-dmalcolm@redhat.com/mbox/"},{"id":107635,"url":"https://patchwork.plctlab.org/api/1.2/patches/107635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614004316.546426-1-xry111@xry111.site/","msgid":"<20230614004316.546426-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-06-14T00:43:16","name":"LoongArch: Set default alignment for functions and labels with -mtune","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614004316.546426-1-xry111@xry111.site/mbox/"},{"id":107637,"url":"https://patchwork.plctlab.org/api/1.2/patches/107637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614005859.960040-1-pan2.li@intel.com/","msgid":"<20230614005859.960040-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T00:58:59","name":"[v1] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614005859.960040-1-pan2.li@intel.com/mbox/"},{"id":107653,"url":"https://patchwork.plctlab.org/api/1.2/patches/107653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614014755.634006-1-hongtao.liu@intel.com/","msgid":"<20230614014755.634006-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-14T01:47:55","name":"[x86] Use x instead of v for alternative 2 (v, BH) in mov_internal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614014755.634006-1-hongtao.liu@intel.com/mbox/"},{"id":107657,"url":"https://patchwork.plctlab.org/api/1.2/patches/107657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIkiap8FXrBHAShh@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T02:14:02","name":"[V6] Fix power10 fusion and -fstack-protector, PR target/105325","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIkiap8FXrBHAShh@cowardly-lion.the-meissners.org/mbox/"},{"id":107659,"url":"https://patchwork.plctlab.org/api/1.2/patches/107659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614021557.1691461-1-pan2.li@intel.com/","msgid":"<20230614021557.1691461-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T02:15:57","name":"[v1] RISC-V: Align the predictor style for define_insn_and_split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614021557.1691461-1-pan2.li@intel.com/mbox/"},{"id":107695,"url":"https://patchwork.plctlab.org/api/1.2/patches/107695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614042409.266841-1-juzhe.zhong@rivai.ai/","msgid":"<20230614042409.266841-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-14T04:24:09","name":"RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614042409.266841-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107704,"url":"https://patchwork.plctlab.org/api/1.2/patches/107704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1901e956-dc34-cc03-0419-8d4338174384@suse.com/","msgid":"<1901e956-dc34-cc03-0419-8d4338174384@suse.com>","list_archive_url":null,"date":"2023-06-14T05:54:35","name":"x86/AVX512: use VMOVDDUP for broadcast to V2DF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1901e956-dc34-cc03-0419-8d4338174384@suse.com/mbox/"},{"id":107705,"url":"https://patchwork.plctlab.org/api/1.2/patches/107705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com/","msgid":"<5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com>","list_archive_url":null,"date":"2023-06-14T05:55:43","name":"x86: add Bk and Br to comment list B'\''s sub-chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com/mbox/"},{"id":107706,"url":"https://patchwork.plctlab.org/api/1.2/patches/107706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com/","msgid":"<48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com>","list_archive_url":null,"date":"2023-06-14T05:57:38","name":"x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com/mbox/"},{"id":107708,"url":"https://patchwork.plctlab.org/api/1.2/patches/107708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com/","msgid":"<68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com>","list_archive_url":null,"date":"2023-06-14T05:59:05","name":"x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com/mbox/"},{"id":107751,"url":"https://patchwork.plctlab.org/api/1.2/patches/107751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com/","msgid":"<1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com>","list_archive_url":null,"date":"2023-06-14T07:16:13","name":"RISC-V: Add (u)int8_t to binop tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com/mbox/"},{"id":107760,"url":"https://patchwork.plctlab.org/api/1.2/patches/107760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614072900.3698145-1-pan2.li@intel.com/","msgid":"<20230614072900.3698145-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T07:29:00","name":"[v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614072900.3698145-1-pan2.li@intel.com/mbox/"},{"id":107783,"url":"https://patchwork.plctlab.org/api/1.2/patches/107783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614075746.3918-1-jinma@linux.alibaba.com/","msgid":"<20230614075746.3918-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-06-14T07:57:45","name":"[v2] RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614075746.3918-1-jinma@linux.alibaba.com/mbox/"},{"id":107796,"url":"https://patchwork.plctlab.org/api/1.2/patches/107796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm5y31p6.fsf@euler.schwinge.homeip.net/","msgid":"<87pm5y31p6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T08:09:09","name":"Fix typo in '\''libgomp.c/target-51.c'\'' (was: [patch] OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm5y31p6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107819,"url":"https://patchwork.plctlab.org/api/1.2/patches/107819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614090035.5470-1-pan2.li@intel.com/","msgid":"<20230614090035.5470-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T09:00:35","name":"[v3] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614090035.5470-1-pan2.li@intel.com/mbox/"},{"id":107824,"url":"https://patchwork.plctlab.org/api/1.2/patches/107824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfme1dRTqaLR0UWLVnKj_eYw-c3DBqLFCwH_Y3JnowWg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T09:14:38","name":"Remove MFWRAP_SPEC remnant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfme1dRTqaLR0UWLVnKj_eYw-c3DBqLFCwH_Y3JnowWg@mail.gmail.com/mbox/"},{"id":107832,"url":"https://patchwork.plctlab.org/api/1.2/patches/107832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614094705.EC699385842C@sourceware.org/","msgid":"<20230614094705.EC699385842C@sourceware.org>","list_archive_url":null,"date":"2023-06-14T09:46:18","name":"[RFC] main loop masked vectorization with --param vect-partial-vector-usage=1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614094705.EC699385842C@sourceware.org/mbox/"},{"id":107845,"url":"https://patchwork.plctlab.org/api/1.2/patches/107845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kmv02k.fsf@euler.schwinge.homeip.net/","msgid":"<87y1kmv02k.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T09:56:51","name":"Add '\''libgomp.{,oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kmv02k.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107848,"url":"https://patchwork.plctlab.org/api/1.2/patches/107848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZZpOzdCPBz84zEYCiakXn6b5Hr=ae=-_un5z26erWO4Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T10:15:38","name":"RTL: Merge rtx_equal_p and hash_rtx functions with their callback variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZZpOzdCPBz84zEYCiakXn6b5Hr=ae=-_un5z26erWO4Q@mail.gmail.com/mbox/"},{"id":107879,"url":"https://patchwork.plctlab.org/api/1.2/patches/107879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com/","msgid":"<641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T10:34:20","name":"libgomp.texi: Document allocator + affininity env vars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com/mbox/"},{"id":107880,"url":"https://patchwork.plctlab.org/api/1.2/patches/107880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614103444.2179711-1-lehua.ding@rivai.ai/","msgid":"<20230614103444.2179711-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T10:34:44","name":"RISC-V: Fix PR 110119","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614103444.2179711-1-lehua.ding@rivai.ai/mbox/"},{"id":107882,"url":"https://patchwork.plctlab.org/api/1.2/patches/107882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz1ywcp0.fsf@euler.schwinge.homeip.net/","msgid":"<87cz1ywcp0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T10:38:51","name":"libgomp testsuite: Don'\''t handle '\''lang_link_flags'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz1ywcp0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107888,"url":"https://patchwork.plctlab.org/api/1.2/patches/107888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5x2wbsj.fsf@euler.schwinge.homeip.net/","msgid":"<87a5x2wbsj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T10:58:20","name":"Align a '\''OMP_TARGET_OFFLOAD=mandatory'\'' diagnostic with others (was: Fix typo in '\''libgomp.c/target-51.c'\'' (was: [patch] OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5x2wbsj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107892,"url":"https://patchwork.plctlab.org/api/1.2/patches/107892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614110319.2191614-1-lehua.ding@rivai.ai/","msgid":"<20230614110319.2191614-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T11:03:19","name":"RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614110319.2191614-1-lehua.ding@rivai.ai/mbox/"},{"id":107900,"url":"https://patchwork.plctlab.org/api/1.2/patches/107900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E46DF34D4D45854A+2023061419204905814546@rivai.ai/","msgid":"","list_archive_url":null,"date":"2023-06-14T11:20:49","name":"??????: Re: [PATCH] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E46DF34D4D45854A+2023061419204905814546@rivai.ai/mbox/"},{"id":107911,"url":"https://patchwork.plctlab.org/api/1.2/patches/107911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114827.9103B3856DF1@sourceware.org/","msgid":"<20230614114827.9103B3856DF1@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:47:10","name":"[1/3] Inline vect_get_max_nscalars_per_iter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114827.9103B3856DF1@sourceware.org/mbox/"},{"id":107912,"url":"https://patchwork.plctlab.org/api/1.2/patches/107912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114843.66BFB3858288@sourceware.org/","msgid":"<20230614114843.66BFB3858288@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:47:21","name":"[2/3] Add loop_vinfo argument to vect_get_loop_mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114843.66BFB3858288@sourceware.org/mbox/"},{"id":107916,"url":"https://patchwork.plctlab.org/api/1.2/patches/107916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115455.ACA883858422@sourceware.org/","msgid":"<20230614115455.ACA883858422@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:54:06","name":"[3/3] AVX512 fully masked vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115455.ACA883858422@sourceware.org/mbox/"},{"id":107918,"url":"https://patchwork.plctlab.org/api/1.2/patches/107918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115611.2227435-1-lehua.ding@rivai.ai/","msgid":"<20230614115611.2227435-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T11:56:11","name":"[V2] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115611.2227435-1-lehua.ding@rivai.ai/mbox/"},{"id":107955,"url":"https://patchwork.plctlab.org/api/1.2/patches/107955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInBSpWMc7qz9m53@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:31:54","name":"[v2] c++: Accept elaborated-enum-base in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInBSpWMc7qz9m53@arm.com/mbox/"},{"id":107957,"url":"https://patchwork.plctlab.org/api/1.2/patches/107957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInGN+99kNXeSQ+h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:52:55","name":"middle-end: Move constant args folding of .UBSAN_CHECK_* and .*_OVERFLOW into fold-const-call.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInGN+99kNXeSQ+h@tucnak/mbox/"},{"id":107958,"url":"https://patchwork.plctlab.org/api/1.2/patches/107958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInH2L1MHxI13xgK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:59:52","name":"middle-end, i386, v3: Pattern recognize add/subtract with carry [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInH2L1MHxI13xgK@tucnak/mbox/"},{"id":107959,"url":"https://patchwork.plctlab.org/api/1.2/patches/107959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614140210.291212-1-jason@redhat.com/","msgid":"<20230614140210.291212-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-14T14:02:10","name":"c++: tweak c++17 ctor/conversion tiebreaker [DR2327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614140210.291212-1-jason@redhat.com/mbox/"},{"id":107960,"url":"https://patchwork.plctlab.org/api/1.2/patches/107960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0f91d40-dea8-e398-9678-6ede777de4f0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T14:06:15","name":"RISC-V: testsuite: Add vector_hw and zvfh_hw checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0f91d40-dea8-e398-9678-6ede777de4f0@gmail.com/mbox/"},{"id":108003,"url":"https://patchwork.plctlab.org/api/1.2/patches/108003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614152656.51278-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230614152656.51278-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-14T15:26:56","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614152656.51278-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":108005,"url":"https://patchwork.plctlab.org/api/1.2/patches/108005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com/","msgid":"<46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com>","list_archive_url":null,"date":"2023-06-14T15:28:33","name":"RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com/mbox/"},{"id":108010,"url":"https://patchwork.plctlab.org/api/1.2/patches/108010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com/","msgid":"<490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com>","list_archive_url":null,"date":"2023-06-14T15:31:34","name":"RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com/mbox/"},{"id":108018,"url":"https://patchwork.plctlab.org/api/1.2/patches/108018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com/","msgid":"<20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T15:44:28","name":"libgomp: Extend OMP_ALLOCATOR, add affinity env var doc (was: [Patch] libgomp.texi: Document allocator + affininity env vars)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com/mbox/"},{"id":108022,"url":"https://patchwork.plctlab.org/api/1.2/patches/108022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614160917.13046-1-pali@kernel.org/","msgid":"<20230614160917.13046-1-pali@kernel.org>","list_archive_url":null,"date":"2023-06-14T16:09:17","name":"[v2] Add MinGW option -mcrtdll= for choosing C RunTime DLL library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614160917.13046-1-pali@kernel.org/mbox/"},{"id":108078,"url":"https://patchwork.plctlab.org/api/1.2/patches/108078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOhyivGBzp0=GCviOBH=5mUsNba32i+nCQtSHJR5LzAuDoTrHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T18:05:01","name":"[COMMITED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOhyivGBzp0=GCviOBH=5mUsNba32i+nCQtSHJR5LzAuDoTrHA@mail.gmail.com/mbox/"},{"id":108143,"url":"https://patchwork.plctlab.org/api/1.2/patches/108143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com/","msgid":"<55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-14T20:37:26","name":"[ver,4] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com/mbox/"},{"id":108146,"url":"https://patchwork.plctlab.org/api/1.2/patches/108146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMOUUaacFk0bBSudP51=s3scoYs87AWu4WZMk52LOym2Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T20:54:16","name":"[wwwdocs] Broken URL to README in st/cli-be project","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMOUUaacFk0bBSudP51=s3scoYs87AWu4WZMk52LOym2Q@mail.gmail.com/mbox/"},{"id":108155,"url":"https://patchwork.plctlab.org/api/1.2/patches/108155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-2-sandra@codesourcery.com/","msgid":"<20230614220804.917436-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:07:59","name":"[OG13,1/6] OpenMP: Handle loop transformation clauses in nested functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-2-sandra@codesourcery.com/mbox/"},{"id":108156,"url":"https://patchwork.plctlab.org/api/1.2/patches/108156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-3-sandra@codesourcery.com/","msgid":"<20230614220804.917436-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:00","name":"[OG13,2/6] OpenMP: C support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-3-sandra@codesourcery.com/mbox/"},{"id":108159,"url":"https://patchwork.plctlab.org/api/1.2/patches/108159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-4-sandra@codesourcery.com/","msgid":"<20230614220804.917436-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:01","name":"[OG13,3/6] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-4-sandra@codesourcery.com/mbox/"},{"id":108157,"url":"https://patchwork.plctlab.org/api/1.2/patches/108157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-5-sandra@codesourcery.com/","msgid":"<20230614220804.917436-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:02","name":"[OG13,4/6] OpenMP: New c/c++ testcases for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-5-sandra@codesourcery.com/mbox/"},{"id":108158,"url":"https://patchwork.plctlab.org/api/1.2/patches/108158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-6-sandra@codesourcery.com/","msgid":"<20230614220804.917436-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:03","name":"[OG13,5/6] OpenMP: Refactor and tidy Fortran front-end code for loop transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-6-sandra@codesourcery.com/mbox/"},{"id":108160,"url":"https://patchwork.plctlab.org/api/1.2/patches/108160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-7-sandra@codesourcery.com/","msgid":"<20230614220804.917436-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:04","name":"[OG13,6/6] OpenMP: Fortran support for imperfectly nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-7-sandra@codesourcery.com/mbox/"},{"id":108169,"url":"https://patchwork.plctlab.org/api/1.2/patches/108169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0qdy860.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:45:59","name":"libstdc++-v3: do not duplicate some math functions when using newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0qdy860.fsf@lxoliva.fsfla.org/mbox/"},{"id":108171,"url":"https://patchwork.plctlab.org/api/1.2/patches/108171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt11y80p.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:49:10","name":"[libstdc++,testsuite] xfail dbl from_chars for aarch64 rtems ldbl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt11y80p.fsf@lxoliva.fsfla.org/mbox/"},{"id":108172,"url":"https://patchwork.plctlab.org/api/1.2/patches/108172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilbpy7yh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:50:30","name":"[libstdc++,testsuite] expect zero entropy matching implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilbpy7yh.fsf@lxoliva.fsfla.org/mbox/"},{"id":108217,"url":"https://patchwork.plctlab.org/api/1.2/patches/108217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615002814.967814-1-dmalcolm@redhat.com/","msgid":"<20230615002814.967814-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-15T00:28:14","name":"c++: provide #include hint for missing includes [PR110164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615002814.967814-1-dmalcolm@redhat.com/mbox/"},{"id":108221,"url":"https://patchwork.plctlab.org/api/1.2/patches/108221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615011934.2262108-1-pan2.li@intel.com/","msgid":"<20230615011934.2262108-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T01:19:34","name":"[committed] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615011934.2262108-1-pan2.li@intel.com/mbox/"},{"id":108223,"url":"https://patchwork.plctlab.org/api/1.2/patches/108223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615013033.505823-1-chenglulu@loongson.cn/","msgid":"<20230615013033.505823-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-15T01:30:34","name":"[v3] LoongArch: Avoid non-returning indirect jumps through $ra [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615013033.505823-1-chenglulu@loongson.cn/mbox/"},{"id":108231,"url":"https://patchwork.plctlab.org/api/1.2/patches/108231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615015236.2283429-1-pan2.li@intel.com/","msgid":"<20230615015236.2283429-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T01:52:36","name":"[v2] RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615015236.2283429-1-pan2.li@intel.com/mbox/"},{"id":108235,"url":"https://patchwork.plctlab.org/api/1.2/patches/108235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615021856.2527165-1-pan2.li@intel.com/","msgid":"<20230615021856.2527165-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T02:18:56","name":"[v3] RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615021856.2527165-1-pan2.li@intel.com/mbox/"},{"id":108260,"url":"https://patchwork.plctlab.org/api/1.2/patches/108260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com/","msgid":"<6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com>","list_archive_url":null,"date":"2023-06-15T05:07:35","name":"Reimplement __gnu_cxx::__ops operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com/mbox/"},{"id":108263,"url":"https://patchwork.plctlab.org/api/1.2/patches/108263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615054052.23633-1-shiyulong@iscas.ac.cn/","msgid":"<20230615054052.23633-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-15T05:40:52","name":"[V1] RISC-V:Add float16 tuple type support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615054052.23633-1-shiyulong@iscas.ac.cn/mbox/"},{"id":108268,"url":"https://patchwork.plctlab.org/api/1.2/patches/108268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa84243c-860b-ddf8-bfde-7e080a197cd1@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T06:03:11","name":"x86: correct and improve \"*vec_dupv2di\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa84243c-860b-ddf8-bfde-7e080a197cd1@suse.com/mbox/"},{"id":108269,"url":"https://patchwork.plctlab.org/api/1.2/patches/108269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061636.3015833-1-chenglulu@loongson.cn/","msgid":"<20230615061636.3015833-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-15T06:16:36","name":"[pushed,v3] LoongArch: Change the default value of LARCH_CALL_RATIO to 6.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061636.3015833-1-chenglulu@loongson.cn/mbox/"},{"id":108270,"url":"https://patchwork.plctlab.org/api/1.2/patches/108270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061704.3514834-1-apinski@marvell.com/","msgid":"<20230615061704.3514834-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-15T06:17:04","name":"Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info during match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061704.3514834-1-apinski@marvell.com/mbox/"},{"id":108312,"url":"https://patchwork.plctlab.org/api/1.2/patches/108312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080348.938724-1-poulhies@adacore.com/","msgid":"<20230615080348.938724-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:48","name":"[COMMITTED] ada: Cleanup analysis of iterated component association","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080348.938724-1-poulhies@adacore.com/mbox/"},{"id":108316,"url":"https://patchwork.plctlab.org/api/1.2/patches/108316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080351.938791-1-poulhies@adacore.com/","msgid":"<20230615080351.938791-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:51","name":"[COMMITTED] ada: Fix aspect Linker_Section ignored on subprogram body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080351.938791-1-poulhies@adacore.com/mbox/"},{"id":108313,"url":"https://patchwork.plctlab.org/api/1.2/patches/108313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080353.938852-1-poulhies@adacore.com/","msgid":"<20230615080353.938852-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:53","name":"[COMMITTED] ada: Remove obsolete references for Build_Transient_Object_Statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080353.938852-1-poulhies@adacore.com/mbox/"},{"id":108314,"url":"https://patchwork.plctlab.org/api/1.2/patches/108314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080355.938913-1-poulhies@adacore.com/","msgid":"<20230615080355.938913-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:55","name":"[COMMITTED] ada: Crash on C++ constructor of private type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080355.938913-1-poulhies@adacore.com/mbox/"},{"id":108317,"url":"https://patchwork.plctlab.org/api/1.2/patches/108317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080356.938975-1-poulhies@adacore.com/","msgid":"<20230615080356.938975-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:56","name":"[COMMITTED] ada: Accept aspect Always_Terminates without expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080356.938975-1-poulhies@adacore.com/mbox/"},{"id":108315,"url":"https://patchwork.plctlab.org/api/1.2/patches/108315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080358.939037-1-poulhies@adacore.com/","msgid":"<20230615080358.939037-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:58","name":"[COMMITTED] ada: Fix inverted implementation of RM 8.4(10) clause for operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080358.939037-1-poulhies@adacore.com/mbox/"},{"id":108320,"url":"https://patchwork.plctlab.org/api/1.2/patches/108320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080400.939098-1-poulhies@adacore.com/","msgid":"<20230615080400.939098-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:00","name":"[COMMITTED] ada: Remove Ttypes.Max_Unaligned_Field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080400.939098-1-poulhies@adacore.com/mbox/"},{"id":108318,"url":"https://patchwork.plctlab.org/api/1.2/patches/108318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080402.939162-1-poulhies@adacore.com/","msgid":"<20230615080402.939162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:02","name":"[COMMITTED] ada: Fix minor issues in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080402.939162-1-poulhies@adacore.com/mbox/"},{"id":108322,"url":"https://patchwork.plctlab.org/api/1.2/patches/108322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080404.939261-1-poulhies@adacore.com/","msgid":"<20230615080404.939261-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:04","name":"[COMMITTED] ada: Fix missing error on function call returning incomplete view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080404.939261-1-poulhies@adacore.com/mbox/"},{"id":108321,"url":"https://patchwork.plctlab.org/api/1.2/patches/108321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080406.939322-1-poulhies@adacore.com/","msgid":"<20230615080406.939322-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:06","name":"[COMMITTED] ada: Reject aspect Always_Terminates on functions and generic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080406.939322-1-poulhies@adacore.com/mbox/"},{"id":108329,"url":"https://patchwork.plctlab.org/api/1.2/patches/108329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080408.939384-1-poulhies@adacore.com/","msgid":"<20230615080408.939384-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:08","name":"[COMMITTED] ada: Accept aspect Always_Terminates on entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080408.939384-1-poulhies@adacore.com/mbox/"},{"id":108319,"url":"https://patchwork.plctlab.org/api/1.2/patches/108319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080410.939483-1-poulhies@adacore.com/","msgid":"<20230615080410.939483-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:10","name":"[COMMITTED] ada: Accept aspect Always_Terminates on packages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080410.939483-1-poulhies@adacore.com/mbox/"},{"id":108333,"url":"https://patchwork.plctlab.org/api/1.2/patches/108333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080412.939566-1-poulhies@adacore.com/","msgid":"<20230615080412.939566-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:12","name":"[COMMITTED] ada: Adjust comments in targparm.ads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080412.939566-1-poulhies@adacore.com/mbox/"},{"id":108331,"url":"https://patchwork.plctlab.org/api/1.2/patches/108331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080413.939627-1-poulhies@adacore.com/","msgid":"<20230615080413.939627-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:13","name":"[COMMITTED] ada: Adjust QNX Ada priorities to match QNX system priorities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080413.939627-1-poulhies@adacore.com/mbox/"},{"id":108326,"url":"https://patchwork.plctlab.org/api/1.2/patches/108326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080415.939740-1-poulhies@adacore.com/","msgid":"<20230615080415.939740-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:15","name":"[COMMITTED] ada: Fix missing finalization for aggregates nested in conditional expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080415.939740-1-poulhies@adacore.com/mbox/"},{"id":108323,"url":"https://patchwork.plctlab.org/api/1.2/patches/108323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080417.939801-1-poulhies@adacore.com/","msgid":"<20230615080417.939801-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:17","name":"[COMMITTED] ada: Add escape hatch to configurable run-time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080417.939801-1-poulhies@adacore.com/mbox/"},{"id":108335,"url":"https://patchwork.plctlab.org/api/1.2/patches/108335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080419.939862-1-poulhies@adacore.com/","msgid":"<20230615080419.939862-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:19","name":"[COMMITTED] ada: Remove dead code in Expand_Iterator_Loop_Over_Container","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080419.939862-1-poulhies@adacore.com/mbox/"},{"id":108330,"url":"https://patchwork.plctlab.org/api/1.2/patches/108330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080421.939923-1-poulhies@adacore.com/","msgid":"<20230615080421.939923-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:21","name":"[COMMITTED] ada: Fix too small secondary stack allocation for returned aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080421.939923-1-poulhies@adacore.com/mbox/"},{"id":108332,"url":"https://patchwork.plctlab.org/api/1.2/patches/108332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080424.939984-1-poulhies@adacore.com/","msgid":"<20230615080424.939984-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:24","name":"[COMMITTED] ada: Revert latest change to Find_Hook_Context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080424.939984-1-poulhies@adacore.com/mbox/"},{"id":108338,"url":"https://patchwork.plctlab.org/api/1.2/patches/108338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080426.940045-1-poulhies@adacore.com/","msgid":"<20230615080426.940045-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:26","name":"[COMMITTED] ada: Fix internal error on loop iterator filter with -gnatVa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080426.940045-1-poulhies@adacore.com/mbox/"},{"id":108334,"url":"https://patchwork.plctlab.org/api/1.2/patches/108334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080428.940106-1-poulhies@adacore.com/","msgid":"<20230615080428.940106-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:28","name":"[COMMITTED] ada: Fix too small secondary stack allocation for returned conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080428.940106-1-poulhies@adacore.com/mbox/"},{"id":108340,"url":"https://patchwork.plctlab.org/api/1.2/patches/108340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080430.940168-1-poulhies@adacore.com/","msgid":"<20230615080430.940168-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:30","name":"[COMMITTED] ada: Reject Loop_Entry inside prefix of Loop_Entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080430.940168-1-poulhies@adacore.com/mbox/"},{"id":108342,"url":"https://patchwork.plctlab.org/api/1.2/patches/108342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080432.940230-1-poulhies@adacore.com/","msgid":"<20230615080432.940230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:32","name":"[COMMITTED] ada: Make minor improvements to user'\''s guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080432.940230-1-poulhies@adacore.com/mbox/"},{"id":108343,"url":"https://patchwork.plctlab.org/api/1.2/patches/108343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080434.940329-1-poulhies@adacore.com/","msgid":"<20230615080434.940329-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:34","name":"[COMMITTED] ada: Fix wrong finalization for double subtype of bounded vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080434.940329-1-poulhies@adacore.com/mbox/"},{"id":108341,"url":"https://patchwork.plctlab.org/api/1.2/patches/108341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080436.940392-1-poulhies@adacore.com/","msgid":"<20230615080436.940392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:36","name":"[COMMITTED] ada: Fix wrong code for ACATS cd1c03i on Morello target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080436.940392-1-poulhies@adacore.com/mbox/"},{"id":108339,"url":"https://patchwork.plctlab.org/api/1.2/patches/108339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080438.940453-1-poulhies@adacore.com/","msgid":"<20230615080438.940453-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:38","name":"[COMMITTED] ada: Remove unused files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080438.940453-1-poulhies@adacore.com/mbox/"},{"id":108387,"url":"https://patchwork.plctlab.org/api/1.2/patches/108387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615095052.13119-1-filip.kastl@gmail.com/","msgid":"<20230615095052.13119-1-filip.kastl@gmail.com>","list_archive_url":null,"date":"2023-06-15T09:50:52","name":"value-prof.cc: Correct edge prob calculation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615095052.13119-1-filip.kastl@gmail.com/mbox/"},{"id":108402,"url":"https://patchwork.plctlab.org/api/1.2/patches/108402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615100534.77819-1-juzhe.zhong@rivai.ai/","msgid":"<20230615100534.77819-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-15T10:05:34","name":"[V3] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615100534.77819-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108451,"url":"https://patchwork.plctlab.org/api/1.2/patches/108451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com/","msgid":"<4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com>","list_archive_url":null,"date":"2023-06-15T11:47:18","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com/mbox/"},{"id":108452,"url":"https://patchwork.plctlab.org/api/1.2/patches/108452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cada1fc1-dd8f-60b1-ecc2-f89262d458d4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T11:47:44","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cada1fc1-dd8f-60b1-ecc2-f89262d458d4@arm.com/mbox/"},{"id":108458,"url":"https://patchwork.plctlab.org/api/1.2/patches/108458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnYjq-C1-hm022qLkqSXfDJ5dUPBgyyJb-12WQ105Zxpg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T12:10:47","name":"gcc-ar: Remove code duplication.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnYjq-C1-hm022qLkqSXfDJ5dUPBgyyJb-12WQ105Zxpg@mail.gmail.com/mbox/"},{"id":108482,"url":"https://patchwork.plctlab.org/api/1.2/patches/108482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-1-kmatsui@cs.washington.edu/","msgid":"<20230615122129.20213-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-15T12:21:28","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-1-kmatsui@cs.washington.edu/mbox/"},{"id":108483,"url":"https://patchwork.plctlab.org/api/1.2/patches/108483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-2-kmatsui@cs.washington.edu/","msgid":"<20230615122129.20213-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-15T12:21:29","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-2-kmatsui@cs.washington.edu/mbox/"},{"id":108512,"url":"https://patchwork.plctlab.org/api/1.2/patches/108512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615131435.10323-1-juzhe.zhong@rivai.ai/","msgid":"<20230615131435.10323-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-15T13:14:35","name":"[V4] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615131435.10323-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108580,"url":"https://patchwork.plctlab.org/api/1.2/patches/108580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b834b2f5-e505-71be-c694-bbf529ec6bd4@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T15:06:39","name":"[v2] RISC-V: testsuite: Add vector_hw and zvfh_hw checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b834b2f5-e505-71be-c694-bbf529ec6bd4@gmail.com/mbox/"},{"id":108581,"url":"https://patchwork.plctlab.org/api/1.2/patches/108581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com/","msgid":"<56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com>","list_archive_url":null,"date":"2023-06-15T15:10:24","name":"[v2] RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com/mbox/"},{"id":108582,"url":"https://patchwork.plctlab.org/api/1.2/patches/108582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com/","msgid":"<64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com>","list_archive_url":null,"date":"2023-06-15T15:12:36","name":"[v2] RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com/mbox/"},{"id":108583,"url":"https://patchwork.plctlab.org/api/1.2/patches/108583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn04eoyd.fsf@euler.schwinge.homeip.net/","msgid":"<87wn04eoyd.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T15:15:54","name":"Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn04eoyd.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108604,"url":"https://patchwork.plctlab.org/api/1.2/patches/108604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttv8engy.fsf@euler.schwinge.homeip.net/","msgid":"<87ttv8engy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T15:47:57","name":"Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttv8engy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108607,"url":"https://patchwork.plctlab.org/api/1.2/patches/108607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com/","msgid":"<004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-15T16:00:35","name":"[ver,2] rs6000, fix vec_replace_unaligned builtin arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com/mbox/"},{"id":108611,"url":"https://patchwork.plctlab.org/api/1.2/patches/108611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qcemq3.fsf@euler.schwinge.homeip.net/","msgid":"<87r0qcemq3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T16:04:04","name":"Skip a number of C++ '\''g++.dg/tree-prof/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qcemq3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108624,"url":"https://patchwork.plctlab.org/api/1.2/patches/108624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73715f12-dedd-ba1f-3048-7af791860768@redhat.com/","msgid":"<73715f12-dedd-ba1f-3048-7af791860768@redhat.com>","list_archive_url":null,"date":"2023-06-15T16:22:38","name":"PR tree-optimization/110266 - Check for integer only complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73715f12-dedd-ba1f-3048-7af791860768@redhat.com/mbox/"},{"id":108664,"url":"https://patchwork.plctlab.org/api/1.2/patches/108664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615172817.3587006-1-manolis.tsamis@vrull.eu/","msgid":"<20230615172817.3587006-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-06-15T17:28:16","name":"[v2] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615172817.3587006-1-manolis.tsamis@vrull.eu/mbox/"},{"id":108669,"url":"https://patchwork.plctlab.org/api/1.2/patches/108669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615175625.3544115-1-apinski@marvell.com/","msgid":"<20230615175625.3544115-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-15T17:56:25","name":"Add another testcase for PR 110266","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615175625.3544115-1-apinski@marvell.com/mbox/"},{"id":108774,"url":"https://patchwork.plctlab.org/api/1.2/patches/108774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616010138.1047991-1-dmalcolm@redhat.com/","msgid":"<20230616010138.1047991-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-16T01:01:38","name":"[pushed] c: add name hints to c_parser_declspecs [PR107583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616010138.1047991-1-dmalcolm@redhat.com/mbox/"},{"id":108781,"url":"https://patchwork.plctlab.org/api/1.2/patches/108781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-1-hongtao.liu@intel.com/","msgid":"<20230616020958.1413585-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-16T02:09:57","name":"[1/2] Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_truncate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-1-hongtao.liu@intel.com/mbox/"},{"id":108782,"url":"https://patchwork.plctlab.org/api/1.2/patches/108782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-2-hongtao.liu@intel.com/","msgid":"<20230616020958.1413585-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-16T02:09:58","name":"[2/2] Refined 256/512-bit vpacksswb/vpackssdw patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-2-hongtao.liu@intel.com/mbox/"},{"id":108819,"url":"https://patchwork.plctlab.org/api/1.2/patches/108819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616043157.1713-1-shihua@iscas.ac.cn/","msgid":"<20230616043157.1713-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-16T04:31:57","name":"Add bfloat16_t support for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616043157.1713-1-shihua@iscas.ac.cn/mbox/"},{"id":108830,"url":"https://patchwork.plctlab.org/api/1.2/patches/108830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b59a0cfa-20bb-1a5b-75ec-3b237b977b29@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T06:19:59","name":"[v2] x86: correct and improve \"*vec_dupv2di\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b59a0cfa-20bb-1a5b-75ec-3b237b977b29@suse.com/mbox/"},{"id":108831,"url":"https://patchwork.plctlab.org/api/1.2/patches/108831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a342d677-867e-e5a2-dd56-b6ba784c1d50@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T06:22:16","name":"[v2] x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a342d677-867e-e5a2-dd56-b6ba784c1d50@suse.com/mbox/"},{"id":108893,"url":"https://patchwork.plctlab.org/api/1.2/patches/108893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616072834.3754201-1-pan2.li@intel.com/","msgid":"<20230616072834.3754201-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T07:28:34","name":"[v1] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616072834.3754201-1-pan2.li@intel.com/mbox/"},{"id":108918,"url":"https://patchwork.plctlab.org/api/1.2/patches/108918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616075916.141968-1-juzhe.zhong@rivai.ai/","msgid":"<20230616075916.141968-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T07:59:16","name":"RISC-V: Fix PR 110264","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616075916.141968-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108919,"url":"https://patchwork.plctlab.org/api/1.2/patches/108919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080231.142845-1-juzhe.zhong@rivai.ai/","msgid":"<20230616080231.142845-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T08:02:31","name":"RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080231.142845-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108922,"url":"https://patchwork.plctlab.org/api/1.2/patches/108922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080932.4190921-1-pan2.li@intel.com/","msgid":"<20230616080932.4190921-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T08:09:32","name":"[v2] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080932.4190921-1-pan2.li@intel.com/mbox/"},{"id":108923,"url":"https://patchwork.plctlab.org/api/1.2/patches/108923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616081455.1697928-1-guojiufu@linux.ibm.com/","msgid":"<20230616081455.1697928-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T08:14:55","name":"Check SCALAR_INT_MODE_P in try_const_anchors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616081455.1697928-1-guojiufu@linux.ibm.com/mbox/"},{"id":108926,"url":"https://patchwork.plctlab.org/api/1.2/patches/108926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616082558.855921330B@imap2.suse-dmz.suse.de/","msgid":"<20230616082558.855921330B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T08:25:58","name":"tree-optimization/110269 - restore missed condition folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616082558.855921330B@imap2.suse-dmz.suse.de/mbox/"},{"id":108928,"url":"https://patchwork.plctlab.org/api/1.2/patches/108928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616083412.1877704-1-guojiufu@linux.ibm.com/","msgid":"<20230616083412.1877704-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T08:34:12","name":"[V3,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616083412.1877704-1-guojiufu@linux.ibm.com/mbox/"},{"id":108934,"url":"https://patchwork.plctlab.org/api/1.2/patches/108934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616085443.1AF5A3854E5B@sourceware.org/","msgid":"<20230616085443.1AF5A3854E5B@sourceware.org>","list_archive_url":null,"date":"2023-06-16T08:53:45","name":"[2/2,v2] AVX512 fully masked vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616085443.1AF5A3854E5B@sourceware.org/mbox/"},{"id":108985,"url":"https://patchwork.plctlab.org/api/1.2/patches/108985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616093125.196342-1-juzhe.zhong@rivai.ai/","msgid":"<20230616093125.196342-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T09:31:25","name":"[V5] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616093125.196342-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109031,"url":"https://patchwork.plctlab.org/api/1.2/patches/109031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616102912.262207-1-juzhe.zhong@rivai.ai/","msgid":"<20230616102912.262207-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T10:29:12","name":"[V6] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616102912.262207-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109050,"url":"https://patchwork.plctlab.org/api/1.2/patches/109050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616113514.327122-1-pan2.li@intel.com/","msgid":"<20230616113514.327122-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T11:35:14","name":"[v1] RISC-V: Fix one warning of maybe-uninitialized in riscv-vsetvl.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616113514.327122-1-pan2.li@intel.com/mbox/"},{"id":109064,"url":"https://patchwork.plctlab.org/api/1.2/patches/109064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616114549.47732138E8@imap2.suse-dmz.suse.de/","msgid":"<20230616114549.47732138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T11:45:48","name":"tree-optimization/110278 - uns < (typeof uns)(uns != 0) is always false","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616114549.47732138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":109075,"url":"https://patchwork.plctlab.org/api/1.2/patches/109075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxOaoCXVo++78RO@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T11:58:34","name":"[v3] c++: Accept elaborated-enum-base with pedwarn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxOaoCXVo++78RO@arm.com/mbox/"},{"id":109081,"url":"https://patchwork.plctlab.org/api/1.2/patches/109081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616120214.114098-1-thiago.bauermann@linaro.org/","msgid":"<20230616120214.114098-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-06-16T12:02:14","name":"[contrib] validate_failures.py: Don'\''t consider summary line in wrong place","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616120214.114098-1-thiago.bauermann@linaro.org/mbox/"},{"id":109089,"url":"https://patchwork.plctlab.org/api/1.2/patches/109089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616123424.B38AC1330B@imap2.suse-dmz.suse.de/","msgid":"<20230616123424.B38AC1330B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T12:34:24","name":"tree-optimization/110243 - kill off IVOPTs split_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616123424.B38AC1330B@imap2.suse-dmz.suse.de/mbox/"},{"id":109125,"url":"https://patchwork.plctlab.org/api/1.2/patches/109125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4438c7c-4aca-23a6-5482-464bc5eb0f14@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T13:29:36","name":"[v3] RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4438c7c-4aca-23a6-5482-464bc5eb0f14@gmail.com/mbox/"},{"id":109126,"url":"https://patchwork.plctlab.org/api/1.2/patches/109126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com/","msgid":"<4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com>","list_archive_url":null,"date":"2023-06-16T13:32:09","name":"[v3] RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com/mbox/"},{"id":109134,"url":"https://patchwork.plctlab.org/api/1.2/patches/109134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com/","msgid":"<0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com>","list_archive_url":null,"date":"2023-06-16T13:41:45","name":"[v2] RISC-V: Implement vec_set and vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com/mbox/"},{"id":109135,"url":"https://patchwork.plctlab.org/api/1.2/patches/109135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com/","msgid":"<675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com>","list_archive_url":null,"date":"2023-06-16T13:43:16","name":"[wwwdocs] gcc-14/changes.htm - Offloading: -lm/-lgfortran is autolinked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com/mbox/"},{"id":109171,"url":"https://patchwork.plctlab.org/api/1.2/patches/109171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxwDtDoomPI9d5n@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-16T14:22:06","name":"tree-ssa-math-opts: Fix up uaddc/usubc pattern matching [PR110271]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxwDtDoomPI9d5n@tucnak/mbox/"},{"id":109172,"url":"https://patchwork.plctlab.org/api/1.2/patches/109172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxyz4SrwyW7130U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-16T14:33:51","name":"builtins: Add support for clang compatible __builtin_{add,sub}c{,l,ll} [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxyz4SrwyW7130U@tucnak/mbox/"},{"id":109192,"url":"https://patchwork.plctlab.org/api/1.2/patches/109192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com/","msgid":"<7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com>","list_archive_url":null,"date":"2023-06-16T15:18:46","name":"[pushed,RA,PR110215] Ignore conflicts for some pseudos from insns throwing a final exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com/mbox/"},{"id":109218,"url":"https://patchwork.plctlab.org/api/1.2/patches/109218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com/","msgid":"<91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com>","list_archive_url":null,"date":"2023-06-16T15:57:10","name":"[committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com/mbox/"},{"id":109223,"url":"https://patchwork.plctlab.org/api/1.2/patches/109223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-1-murphyp@linux.ibm.com/","msgid":"<20230616160002.1854983-1-murphyp@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T16:00:01","name":"[1/2] go: update usage of TARGET_AIX to TARGET_AIX_OS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-1-murphyp@linux.ibm.com/mbox/"},{"id":109224,"url":"https://patchwork.plctlab.org/api/1.2/patches/109224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-2-murphyp@linux.ibm.com/","msgid":"<20230616160002.1854983-2-murphyp@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T16:00:02","name":"[2/2] rust: update usage of TARGET_AIX to TARGET_AIX_OS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-2-murphyp@linux.ibm.com/mbox/"},{"id":109236,"url":"https://patchwork.plctlab.org/api/1.2/patches/109236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rcj4c57.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:15:00","name":"Regenerate some autotools generated files (Was: Re: [PATCH v3] configure: Implement --enable-host-pie)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rcj4c57.fsf@suse.cz/mbox/"},{"id":109244,"url":"https://patchwork.plctlab.org/api/1.2/patches/109244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca7ca81-2c2e-4e2e-ce33-17f6289fc31a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:17:18","name":"OpenMP (C/C++): Keep pointer value of unmapped ptr with default mapping [PR110270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca7ca81-2c2e-4e2e-ce33-17f6289fc31a@codesourcery.com/mbox/"},{"id":109245,"url":"https://patchwork.plctlab.org/api/1.2/patches/109245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jn74c08.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:17:59","name":"ipa-sra: Disable candidates with no known callers (PR 110276)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jn74c08.fsf@suse.cz/mbox/"},{"id":109250,"url":"https://patchwork.plctlab.org/api/1.2/patches/109250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com/","msgid":"<033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-16T16:27:17","name":"[x86_64] Two minor tweaks to ix86_expand_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com/mbox/"},{"id":109293,"url":"https://patchwork.plctlab.org/api/1.2/patches/109293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com/","msgid":"<4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-16T17:57:19","name":"[ver,5] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com/mbox/"},{"id":109333,"url":"https://patchwork.plctlab.org/api/1.2/patches/109333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQMgax3RS-nT0ac+J+7ZFqJ-BZEF-200SmHDWtxagL1w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T19:30:26","name":"libgo patch committed: Add benchmarks and examples to test list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQMgax3RS-nT0ac+J+7ZFqJ-BZEF-200SmHDWtxagL1w@mail.gmail.com/mbox/"},{"id":109439,"url":"https://patchwork.plctlab.org/api/1.2/patches/109439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJyZDofE5VhYpCgKKyHg8YSQBLBZMYJspfJ40Kf6J+PcA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-17T09:14:43","name":"[fortran] PR107900 Select type with intrinsic type inside associate causes ICE / Segmenation fault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJyZDofE5VhYpCgKKyHg8YSQBLBZMYJspfJ40Kf6J+PcA@mail.gmail.com/mbox/"},{"id":109504,"url":"https://patchwork.plctlab.org/api/1.2/patches/109504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617142325.2939112-1-pan2.li@intel.com/","msgid":"<20230617142325.2939112-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-17T14:23:25","name":"[v1] RISC-V: Bugfix for RVV float reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617142325.2939112-1-pan2.li@intel.com/mbox/"},{"id":109557,"url":"https://patchwork.plctlab.org/api/1.2/patches/109557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617225328.1175357-1-juzhe.zhong@rivai.ai/","msgid":"<20230617225328.1175357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-17T22:53:28","name":"[V7] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617225328.1175357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109566,"url":"https://patchwork.plctlab.org/api/1.2/patches/109566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618025732.717902-1-pan2.li@intel.com/","msgid":"<20230618025732.717902-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-18T02:57:32","name":"[v2] RISC-V: Bugfix for RVV float reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618025732.717902-1-pan2.li@intel.com/mbox/"},{"id":109578,"url":"https://patchwork.plctlab.org/api/1.2/patches/109578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp/","msgid":"<9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp>","list_archive_url":null,"date":"2023-06-18T07:07:12","name":"[1/2] xtensa: Remove TARGET_MEMORY_MOVE_COST hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp/mbox/"},{"id":109577,"url":"https://patchwork.plctlab.org/api/1.2/patches/109577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfbb27df-1afd-2dbc-ffc5-a5143f6ccd2d@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-18T07:09:10","name":"[2/2] xtensa: constantsynth: Add new 2-insns synthesis pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfbb27df-1afd-2dbc-ffc5-a5143f6ccd2d@yahoo.co.jp/mbox/"},{"id":109593,"url":"https://patchwork.plctlab.org/api/1.2/patches/109593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com/","msgid":"<005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T09:05:48","name":"[x86] Standardize shift amount constants as QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com/mbox/"},{"id":109594,"url":"https://patchwork.plctlab.org/api/1.2/patches/109594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com/","msgid":"<006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T09:35:28","name":"[x86] Add alternate representation for {and,or,xor}b %ah,%dh.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com/mbox/"},{"id":109597,"url":"https://patchwork.plctlab.org/api/1.2/patches/109597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com/","msgid":"<008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T10:22:46","name":"Improved SUBREG simplifications in simplify-rtx.cc'\''s simplify_subreg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com/mbox/"},{"id":109599,"url":"https://patchwork.plctlab.org/api/1.2/patches/109599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com/","msgid":"<000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T11:10:00","name":"[x86] Refactor new ix86_expand_carry to set the carry flag.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com/mbox/"},{"id":109600,"url":"https://patchwork.plctlab.org/api/1.2/patches/109600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618114157.3451886-1-lehua.ding@rivai.ai/","msgid":"<20230618114157.3451886-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-18T11:41:57","name":"RISC-V: Add tuple vector mode psABI checking and simplify code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618114157.3451886-1-lehua.ding@rivai.ai/mbox/"},{"id":109615,"url":"https://patchwork.plctlab.org/api/1.2/patches/109615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com/","msgid":"<002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T13:20:32","name":"[RFC] Workaround LRA reload issue with SUBREGs in SET_DEST.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com/mbox/"},{"id":109629,"url":"https://patchwork.plctlab.org/api/1.2/patches/109629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618151329.1814812-1-pan2.li@intel.com/","msgid":"<20230618151329.1814812-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-18T15:13:29","name":"[v1] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618151329.1814812-1-pan2.li@intel.com/mbox/"},{"id":109631,"url":"https://patchwork.plctlab.org/api/1.2/patches/109631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI8owVx4aDXxwB8Y@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T15:54:41","name":"Optimize std::max early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI8owVx4aDXxwB8Y@kam.mff.cuni.cz/mbox/"},{"id":109638,"url":"https://patchwork.plctlab.org/api/1.2/patches/109638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com/","msgid":"<24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com>","list_archive_url":null,"date":"2023-06-18T17:29:08","name":"[committed] Fix arc assumption that insns are not re-recognized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com/mbox/"},{"id":109650,"url":"https://patchwork.plctlab.org/api/1.2/patches/109650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9MmdQ+OMehcdeg@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T18:27:37","name":"[libstdc++] Improve M_check_len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9MmdQ+OMehcdeg@kam.mff.cuni.cz/mbox/"},{"id":109660,"url":"https://patchwork.plctlab.org/api/1.2/patches/109660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aaAs9mnx3-+UKoXfVU8b6kZmn_HE0QivSzfYL62rpHdQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-18T20:12:11","name":"[COMMITTED] RTL: Change return type of predicate and callback functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aaAs9mnx3-+UKoXfVU8b6kZmn_HE0QivSzfYL62rpHdQ@mail.gmail.com/mbox/"},{"id":109661,"url":"https://patchwork.plctlab.org/api/1.2/patches/109661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9phUDoOu81ivtb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T20:31:01","name":"Extend fnsummary to predict SRA oppurtunities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9phUDoOu81ivtb@kam.mff.cuni.cz/mbox/"},{"id":109697,"url":"https://patchwork.plctlab.org/api/1.2/patches/109697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618230645.3673843-1-juzhe.zhong@rivai.ai/","msgid":"<20230618230645.3673843-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-18T23:06:45","name":"RISC-V: Add VLS modes for GNU vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618230645.3673843-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109702,"url":"https://patchwork.plctlab.org/api/1.2/patches/109702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc68688-7292-f739-5ad4-a2367b6e18bc@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T01:14:55","name":"[rs6000] Generate mfvsrwz for all platforms and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc68688-7292-f739-5ad4-a2367b6e18bc@linux.ibm.com/mbox/"},{"id":109724,"url":"https://patchwork.plctlab.org/api/1.2/patches/109724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619042617.31605-1-xuli1@eswincomputing.com/","msgid":"<20230619042617.31605-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-19T04:26:17","name":"RISC-V: Fix iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619042617.31605-1-xuli1@eswincomputing.com/mbox/"},{"id":109733,"url":"https://patchwork.plctlab.org/api/1.2/patches/109733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619055257.15858-1-xuli1@eswincomputing.com/","msgid":"<20230619055257.15858-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-19T05:52:57","name":"[v2] RISC-V: Fix VWEXTF iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619055257.15858-1-xuli1@eswincomputing.com/mbox/"},{"id":109740,"url":"https://patchwork.plctlab.org/api/1.2/patches/109740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619062903.7E5103858415@sourceware.org/","msgid":"<20230619062903.7E5103858415@sourceware.org>","list_archive_url":null,"date":"2023-06-19T06:28:18","name":"Remove -save-temps from tests using -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619062903.7E5103858415@sourceware.org/mbox/"},{"id":109743,"url":"https://patchwork.plctlab.org/api/1.2/patches/109743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619064650.1410831-1-pan2.li@intel.com/","msgid":"<20230619064650.1410831-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T06:46:50","name":"[v2] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619064650.1410831-1-pan2.li@intel.com/mbox/"},{"id":109749,"url":"https://patchwork.plctlab.org/api/1.2/patches/109749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAIBuJCa6OWrM0x@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-19T07:47:18","name":"Tiny phiprop compile time optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAIBuJCa6OWrM0x@kam.mff.cuni.cz/mbox/"},{"id":109752,"url":"https://patchwork.plctlab.org/api/1.2/patches/109752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAJMPiUB4oxqZBR@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-19T07:52:16","name":"Do not account __builtin_unreachable guards in inliner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAJMPiUB4oxqZBR@kam.mff.cuni.cz/mbox/"},{"id":109758,"url":"https://patchwork.plctlab.org/api/1.2/patches/109758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0bce677-da4f-3ccd-d220-ef2e2bbba877@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:02:58","name":"[committed] libgomp.c/target-51.c: Accept more error-msg variants in dg-output (was: Re: [committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0bce677-da4f-3ccd-d220-ef2e2bbba877@codesourcery.com/mbox/"},{"id":109761,"url":"https://patchwork.plctlab.org/api/1.2/patches/109761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619080710.1536456-1-pan2.li@intel.com/","msgid":"<20230619080710.1536456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T08:07:10","name":"[v1] RISC-V: Fix out of range memory access when lto mode init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619080710.1536456-1-pan2.li@intel.com/mbox/"},{"id":109791,"url":"https://patchwork.plctlab.org/api/1.2/patches/109791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:50","name":"[v4,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109794,"url":"https://patchwork.plctlab.org/api/1.2/patches/109794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0f3e929f438106b51a1dcbe7a7c762bd90e1933.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:29:51","name":"[v4,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0f3e929f438106b51a1dcbe7a7c762bd90e1933.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109773,"url":"https://patchwork.plctlab.org/api/1.2/patches/109773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:52","name":"[v4,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109795,"url":"https://patchwork.plctlab.org/api/1.2/patches/109795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:53","name":"[v4,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109774,"url":"https://patchwork.plctlab.org/api/1.2/patches/109774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:54","name":"[v4,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109789,"url":"https://patchwork.plctlab.org/api/1.2/patches/109789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:55","name":"[v4,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109777,"url":"https://patchwork.plctlab.org/api/1.2/patches/109777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9d3a87f14aed2af9b637e639128ca7c2e1ae1d1.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:29:56","name":"[v4,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9d3a87f14aed2af9b637e639128ca7c2e1ae1d1.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109790,"url":"https://patchwork.plctlab.org/api/1.2/patches/109790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:57","name":"[v4,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109784,"url":"https://patchwork.plctlab.org/api/1.2/patches/109784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:58","name":"[v4,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109796,"url":"https://patchwork.plctlab.org/api/1.2/patches/109796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619083603.151CC385354A@sourceware.org/","msgid":"<20230619083603.151CC385354A@sourceware.org>","list_archive_url":null,"date":"2023-06-19T08:34:59","name":"Fix build of aarc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619083603.151CC385354A@sourceware.org/mbox/"},{"id":109819,"url":"https://patchwork.plctlab.org/api/1.2/patches/109819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rcfc039.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:44:58","name":"[committed] vect: Restore aarch64 bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rcfc039.fsf@arm.com/mbox/"},{"id":109829,"url":"https://patchwork.plctlab.org/api/1.2/patches/109829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com/","msgid":"<96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T08:56:52","name":"[committed] Doc update: -foffload-options= examples + OpenMP in Fortran intrinsic modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com/mbox/"},{"id":109831,"url":"https://patchwork.plctlab.org/api/1.2/patches/109831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090548.1574008-1-pan2.li@intel.com/","msgid":"<20230619090548.1574008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T09:05:48","name":"RISC-V: Fix out of range memory access of machine mode table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090548.1574008-1-pan2.li@intel.com/mbox/"},{"id":109834,"url":"https://patchwork.plctlab.org/api/1.2/patches/109834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090743.ADDD63858C78@sourceware.org/","msgid":"<20230619090743.ADDD63858C78@sourceware.org>","list_archive_url":null,"date":"2023-06-19T09:06:46","name":"tree-optimization/110298 - CFG cleanup and stale nb_iterations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090743.ADDD63858C78@sourceware.org/mbox/"},{"id":109888,"url":"https://patchwork.plctlab.org/api/1.2/patches/109888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619101609.63E4F385840D@sourceware.org/","msgid":"<20230619101609.63E4F385840D@sourceware.org>","list_archive_url":null,"date":"2023-06-19T10:15:25","name":"debug/110295 - mixed up early/late debug for member DIEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619101609.63E4F385840D@sourceware.org/mbox/"},{"id":109898,"url":"https://patchwork.plctlab.org/api/1.2/patches/109898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5wveomg.fsf@euler.schwinge.homeip.net/","msgid":"<87a5wveomg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-19T10:24:23","name":"Fix DejaGnu directive syntax error in '\''libgomp.c/target-51.c'\'' (was: [committed] libgomp.c/target-51.c: Accept more error-msg variants in dg-output (was: Re: [committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5wveomg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":109903,"url":"https://patchwork.plctlab.org/api/1.2/patches/109903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T10:32:41","name":"Do not allow \"x + 0.0\" to \"x\" optimization with -fsignaling-nans","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com/mbox/"},{"id":109937,"url":"https://patchwork.plctlab.org/api/1.2/patches/109937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com/","msgid":"<01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T11:37:37","name":"[committed] amdgcn: Delete inactive libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com/mbox/"},{"id":109938,"url":"https://patchwork.plctlab.org/api/1.2/patches/109938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/afd440fa-a7b9-a539-9056-7f9e85060ef0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T11:37:52","name":"[committed] amdgcn: minimal V64TImode vector support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/afd440fa-a7b9-a539-9056-7f9e85060ef0@codesourcery.com/mbox/"},{"id":109939,"url":"https://patchwork.plctlab.org/api/1.2/patches/109939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com/","msgid":"<6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T11:38:09","name":"[committed] amdgcn: implement vector div and mod libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com/mbox/"},{"id":109966,"url":"https://patchwork.plctlab.org/api/1.2/patches/109966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619123606.2F5E73858431@sourceware.org/","msgid":"<20230619123606.2F5E73858431@sourceware.org>","list_archive_url":null,"date":"2023-06-19T12:35:21","name":"[i386] Reject too large vectors for partial vector vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619123606.2F5E73858431@sourceware.org/mbox/"},{"id":110034,"url":"https://patchwork.plctlab.org/api/1.2/patches/110034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619142356.345159-1-stefansf@linux.ibm.com/","msgid":"<20230619142356.345159-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-19T14:23:57","name":"[v2] combine: Narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619142356.345159-1-stefansf@linux.ibm.com/mbox/"},{"id":110040,"url":"https://patchwork.plctlab.org/api/1.2/patches/110040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+DWEukOn4iktqvvmoT+p6u+dh_DrmFVd7i4Mv9nBr9A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T14:46:18","name":"[committed] recog: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+DWEukOn4iktqvvmoT+p6u+dh_DrmFVd7i4Mv9nBr9A@mail.gmail.com/mbox/"},{"id":110084,"url":"https://patchwork.plctlab.org/api/1.2/patches/110084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com/","msgid":"<42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-19T15:57:32","name":"rs6000, __builtin_set_fpscr_rn add retrun value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com/mbox/"},{"id":110094,"url":"https://patchwork.plctlab.org/api/1.2/patches/110094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619161705.251983-1-juzhe.zhong@rivai.ai/","msgid":"<20230619161705.251983-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-19T16:17:05","name":"VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619161705.251983-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110139,"url":"https://patchwork.plctlab.org/api/1.2/patches/110139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com/","msgid":"<35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-19T18:54:03","name":"[ver,6] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com/mbox/"},{"id":110163,"url":"https://patchwork.plctlab.org/api/1.2/patches/110163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com/","msgid":"<6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:25","name":"[01/14] Revert \"Assumed-size arrays with non-lexical data mappings\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110162,"url":"https://patchwork.plctlab.org/api/1.2/patches/110162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com/","msgid":"<82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:26","name":"[02/14] Revert \"Fix references declared in lexically-enclosing OpenACC data region\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110164,"url":"https://patchwork.plctlab.org/api/1.2/patches/110164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com/","msgid":"<8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:27","name":"[03/14] Revert \"Fix implicit mapping for array slices on lexically-enclosing data constructs (PR70828)\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110161,"url":"https://patchwork.plctlab.org/api/1.2/patches/110161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com/","msgid":"<8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:28","name":"[04/14] Revert \"openmp: Handle C/C++ array reference base-pointers in array sections\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110166,"url":"https://patchwork.plctlab.org/api/1.2/patches/110166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com/","msgid":"<62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:29","name":"[05/14] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110172,"url":"https://patchwork.plctlab.org/api/1.2/patches/110172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com/","msgid":"<8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:30","name":"[06/14] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110165,"url":"https://patchwork.plctlab.org/api/1.2/patches/110165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/efe6a75a4f15d6d227478d2f2cd6e4a0e2b4a8c0.1687201315.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:31","name":"[07/14] OpenMP: implicitly map base pointer for array-section pointer components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/efe6a75a4f15d6d227478d2f2cd6e4a0e2b4a8c0.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110176,"url":"https://patchwork.plctlab.org/api/1.2/patches/110176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9312554aa15cd93c3e463f9dee84daccba31a67.1687201315.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:32","name":"[08/14] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9312554aa15cd93c3e463f9dee84daccba31a67.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110173,"url":"https://patchwork.plctlab.org/api/1.2/patches/110173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com/","msgid":"<4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:33","name":"[09/14] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110177,"url":"https://patchwork.plctlab.org/api/1.2/patches/110177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com/","msgid":"<345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:34","name":"[10/14] OpenMP/OpenACC: Reorganise OMP map clause handling in gimplify.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110178,"url":"https://patchwork.plctlab.org/api/1.2/patches/110178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com/","msgid":"<77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:35","name":"[11/14] OpenACC: Reimplement \"inheritance\" for lexically-nested offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110179,"url":"https://patchwork.plctlab.org/api/1.2/patches/110179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com/","msgid":"<8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:36","name":"[12/14] OpenACC: \"declare create\" fixes wrt. \"allocatable\" variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110167,"url":"https://patchwork.plctlab.org/api/1.2/patches/110167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com/","msgid":"<2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:37","name":"[13/14] OpenACC: Allow implicit uses of assumed-size arrays in offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110171,"url":"https://patchwork.plctlab.org/api/1.2/patches/110171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a02f67664b5ffd7c70dc1cd251673e40fbc2b569.1687201316.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:38","name":"[14/14] OpenACC: Improve implicit mapping for non-lexically nested offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a02f67664b5ffd7c70dc1cd251673e40fbc2b569.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110180,"url":"https://patchwork.plctlab.org/api/1.2/patches/110180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7505008-3132-20e0-da7b-00ec1ee66cc3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T22:34:28","name":"[PR,target/110201] Fix operand types for various scalar crypto insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7505008-3132-20e0-da7b-00ec1ee66cc3@gmail.com/mbox/"},{"id":110181,"url":"https://patchwork.plctlab.org/api/1.2/patches/110181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619230406.308938-1-juzhe.zhong@rivai.ai/","msgid":"<20230619230406.308938-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-19T23:04:06","name":"RISC-V: Fix fails of testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619230406.308938-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110242,"url":"https://patchwork.plctlab.org/api/1.2/patches/110242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620031450.146303-1-juzhe.zhong@rivai.ai/","msgid":"<20230620031450.146303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T03:14:50","name":"RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620031450.146303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110246,"url":"https://patchwork.plctlab.org/api/1.2/patches/110246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240FF414227232B91CACA98E85CA@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T03:58:23","name":"Change fma_reassoc_width tuning for ampere1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240FF414227232B91CACA98E85CA@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":110258,"url":"https://patchwork.plctlab.org/api/1.2/patches/110258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620060705.22235-1-xuli1@eswincomputing.com/","msgid":"<20230620060705.22235-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T06:07:05","name":"RISC-V: Set the natural size of constant vector mask modes to one RVV data vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620060705.22235-1-xuli1@eswincomputing.com/mbox/"},{"id":110262,"url":"https://patchwork.plctlab.org/api/1.2/patches/110262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620064618.31141-1-xuli1@eswincomputing.com/","msgid":"<20230620064618.31141-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T06:46:18","name":"[v2] RISC-V: Set the natural size of constant vector mask modes to one RVV data vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620064618.31141-1-xuli1@eswincomputing.com/mbox/"},{"id":110264,"url":"https://patchwork.plctlab.org/api/1.2/patches/110264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620070039.10D7638582A3@sourceware.org/","msgid":"<20230620070039.10D7638582A3@sourceware.org>","list_archive_url":null,"date":"2023-06-20T06:59:55","name":"Improve DSE to handle stores before __builtin_unreachable ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620070039.10D7638582A3@sourceware.org/mbox/"},{"id":110265,"url":"https://patchwork.plctlab.org/api/1.2/patches/110265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com/","msgid":"<169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com>","list_archive_url":null,"date":"2023-06-20T07:06:57","name":"[v3] x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com/mbox/"},{"id":110287,"url":"https://patchwork.plctlab.org/api/1.2/patches/110287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074630.1252053-1-poulhies@adacore.com/","msgid":"<20230620074630.1252053-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:30","name":"[COMMITTED] ada: Fix edge case in Ada.Calendar.Formatting.Time_Of","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074630.1252053-1-poulhies@adacore.com/mbox/"},{"id":110288,"url":"https://patchwork.plctlab.org/api/1.2/patches/110288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074642.1252250-1-poulhies@adacore.com/","msgid":"<20230620074642.1252250-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:42","name":"[COMMITTED] ada: Spurious error on package instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074642.1252250-1-poulhies@adacore.com/mbox/"},{"id":110303,"url":"https://patchwork.plctlab.org/api/1.2/patches/110303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074644.1252313-1-poulhies@adacore.com/","msgid":"<20230620074644.1252313-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:44","name":"[COMMITTED] ada: Remove references to Might_Not_Return and Always_Return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074644.1252313-1-poulhies@adacore.com/mbox/"},{"id":110292,"url":"https://patchwork.plctlab.org/api/1.2/patches/110292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074646.1252375-1-poulhies@adacore.com/","msgid":"<20230620074646.1252375-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:46","name":"[COMMITTED] ada: Pass Error_Node to calls to Error_Msg in lib-load.adb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074646.1252375-1-poulhies@adacore.com/mbox/"},{"id":110293,"url":"https://patchwork.plctlab.org/api/1.2/patches/110293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074648.1252437-1-poulhies@adacore.com/","msgid":"<20230620074648.1252437-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:48","name":"[COMMITTED] ada: Fix type derivation of subtype of derived type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074648.1252437-1-poulhies@adacore.com/mbox/"},{"id":110302,"url":"https://patchwork.plctlab.org/api/1.2/patches/110302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074650.1252499-1-poulhies@adacore.com/","msgid":"<20230620074650.1252499-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:50","name":"[COMMITTED] ada: Update annotations in runtime for proof","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074650.1252499-1-poulhies@adacore.com/mbox/"},{"id":110310,"url":"https://patchwork.plctlab.org/api/1.2/patches/110310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074652.1252564-1-poulhies@adacore.com/","msgid":"<20230620074652.1252564-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:52","name":"[COMMITTED] ada: Introduce -gnateH switch to force reverse Bit_Order threshold to 64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074652.1252564-1-poulhies@adacore.com/mbox/"},{"id":110306,"url":"https://patchwork.plctlab.org/api/1.2/patches/110306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074654.1252681-1-poulhies@adacore.com/","msgid":"<20230620074654.1252681-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:54","name":"[COMMITTED] ada: Fix -fdiagnostics-format=json not printing all messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074654.1252681-1-poulhies@adacore.com/mbox/"},{"id":110289,"url":"https://patchwork.plctlab.org/api/1.2/patches/110289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074656.1252745-1-poulhies@adacore.com/","msgid":"<20230620074656.1252745-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:56","name":"[COMMITTED] ada: Fix internal error on aggregate within container aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074656.1252745-1-poulhies@adacore.com/mbox/"},{"id":110296,"url":"https://patchwork.plctlab.org/api/1.2/patches/110296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074658.1252808-1-poulhies@adacore.com/","msgid":"<20230620074658.1252808-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:58","name":"[COMMITTED] ada: Small fixes to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074658.1252808-1-poulhies@adacore.com/mbox/"},{"id":110291,"url":"https://patchwork.plctlab.org/api/1.2/patches/110291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074700.1252872-1-poulhies@adacore.com/","msgid":"<20230620074700.1252872-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:00","name":"[COMMITTED] ada: Add CHERI intrinsic bindings and helper functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074700.1252872-1-poulhies@adacore.com/mbox/"},{"id":110299,"url":"https://patchwork.plctlab.org/api/1.2/patches/110299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074703.1252933-1-poulhies@adacore.com/","msgid":"<20230620074703.1252933-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:03","name":"[COMMITTED] ada: Fix fallout of fix to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074703.1252933-1-poulhies@adacore.com/mbox/"},{"id":110304,"url":"https://patchwork.plctlab.org/api/1.2/patches/110304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074705.1252998-1-poulhies@adacore.com/","msgid":"<20230620074705.1252998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:05","name":"[COMMITTED] ada: Fix bug in predicate checks with address clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074705.1252998-1-poulhies@adacore.com/mbox/"},{"id":110312,"url":"https://patchwork.plctlab.org/api/1.2/patches/110312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074707.1253060-1-poulhies@adacore.com/","msgid":"<20230620074707.1253060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:07","name":"[COMMITTED] ada: Fix for quantified expressions in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074707.1253060-1-poulhies@adacore.com/mbox/"},{"id":110319,"url":"https://patchwork.plctlab.org/api/1.2/patches/110319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075205.1253127-1-poulhies@adacore.com/","msgid":"<20230620075205.1253127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:05","name":"[COMMITTED] ada: Document partition-wide Ada signal handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075205.1253127-1-poulhies@adacore.com/mbox/"},{"id":110315,"url":"https://patchwork.plctlab.org/api/1.2/patches/110315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075208.1253570-1-poulhies@adacore.com/","msgid":"<20230620075208.1253570-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:08","name":"[COMMITTED] ada: Fix for attribute Range in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075208.1253570-1-poulhies@adacore.com/mbox/"},{"id":110313,"url":"https://patchwork.plctlab.org/api/1.2/patches/110313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075210.1253631-1-poulhies@adacore.com/","msgid":"<20230620075210.1253631-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:10","name":"[COMMITTED] ada: Add the ability to add error codes to error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075210.1253631-1-poulhies@adacore.com/mbox/"},{"id":110314,"url":"https://patchwork.plctlab.org/api/1.2/patches/110314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075212.1253692-1-poulhies@adacore.com/","msgid":"<20230620075212.1253692-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:12","name":"[COMMITTED] ada: Do not issue warning on postcondition in some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075212.1253692-1-poulhies@adacore.com/mbox/"},{"id":110318,"url":"https://patchwork.plctlab.org/api/1.2/patches/110318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075214.1253753-1-poulhies@adacore.com/","msgid":"<20230620075214.1253753-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:14","name":"[COMMITTED] ada: Fix couple of issues in documentation of overflow checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075214.1253753-1-poulhies@adacore.com/mbox/"},{"id":110317,"url":"https://patchwork.plctlab.org/api/1.2/patches/110317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17403-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T07:52:22","name":"[committed] AArch64 remove test comment from *mov_aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17403-tamar@arm.com/mbox/"},{"id":110320,"url":"https://patchwork.plctlab.org/api/1.2/patches/110320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com/","msgid":"<5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com>","list_archive_url":null,"date":"2023-06-20T07:58:36","name":"RISC-V: Fix vmul test expectation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com/mbox/"},{"id":110347,"url":"https://patchwork.plctlab.org/api/1.2/patches/110347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a008ca07-bf69-8ea0-34f2-0f78b496624b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T08:49:04","name":"[PATCHv4,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a008ca07-bf69-8ea0-34f2-0f78b496624b@linux.ibm.com/mbox/"},{"id":110355,"url":"https://patchwork.plctlab.org/api/1.2/patches/110355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620085452.132059-1-juzhe.zhong@rivai.ai/","msgid":"<20230620085452.132059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T08:54:52","name":"[V2] RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620085452.132059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110356,"url":"https://patchwork.plctlab.org/api/1.2/patches/110356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620090031.140730-1-juzhe.zhong@rivai.ai/","msgid":"<20230620090031.140730-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T09:00:31","name":"[V3] RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620090031.140730-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110371,"url":"https://patchwork.plctlab.org/api/1.2/patches/110371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-2-gaofei@eswincomputing.com/","msgid":"<20230620094052.35993-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T09:40:51","name":"[1/2] allow target to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-2-gaofei@eswincomputing.com/mbox/"},{"id":110370,"url":"https://patchwork.plctlab.org/api/1.2/patches/110370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-3-gaofei@eswincomputing.com/","msgid":"<20230620094052.35993-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T09:40:52","name":"[2/2,RISC-V] resolve confilct between zcmp multi push/pop and shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-3-gaofei@eswincomputing.com/mbox/"},{"id":110374,"url":"https://patchwork.plctlab.org/api/1.2/patches/110374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094517.3693077-1-lehua.ding@rivai.ai/","msgid":"<20230620094517.3693077-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-20T09:45:17","name":"RISC-V: Fix compiler warning of riscv_arg_has_vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094517.3693077-1-lehua.ding@rivai.ai/mbox/"},{"id":110386,"url":"https://patchwork.plctlab.org/api/1.2/patches/110386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnXn5ArbP9zg2Pwu-_CWb=E4f5_dx95T+bSPCb0HsnE7A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T09:54:58","name":"[SVE,match.pd] Fix ICE observed in PR110280","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnXn5ArbP9zg2Pwu-_CWb=E4f5_dx95T+bSPCb0HsnE7A@mail.gmail.com/mbox/"},{"id":110412,"url":"https://patchwork.plctlab.org/api/1.2/patches/110412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com/","msgid":"<7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com>","list_archive_url":null,"date":"2023-06-20T10:50:36","name":"Fortran'\''s gfc_match_char: %S to match symbol with host_assoc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com/mbox/"},{"id":110413,"url":"https://patchwork.plctlab.org/api/1.2/patches/110413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620105136.106423856634@sourceware.org/","msgid":"<20230620105136.106423856634@sourceware.org>","list_archive_url":null,"date":"2023-06-20T10:50:51","name":"Update virtual SSA form manually where easily possible in phiprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620105136.106423856634@sourceware.org/mbox/"},{"id":110426,"url":"https://patchwork.plctlab.org/api/1.2/patches/110426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112620.1299203-1-poulhies@adacore.com/","msgid":"<20230620112620.1299203-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:20","name":"[COMMITTED] ada: Remove outdated comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112620.1299203-1-poulhies@adacore.com/mbox/"},{"id":110430,"url":"https://patchwork.plctlab.org/api/1.2/patches/110430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112630.1299352-1-poulhies@adacore.com/","msgid":"<20230620112630.1299352-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:30","name":"[COMMITTED] ada: Further fixes to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112630.1299352-1-poulhies@adacore.com/mbox/"},{"id":110427,"url":"https://patchwork.plctlab.org/api/1.2/patches/110427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112633.1299451-1-poulhies@adacore.com/","msgid":"<20230620112633.1299451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:33","name":"[COMMITTED] ada: Fix crash on inlining in GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112633.1299451-1-poulhies@adacore.com/mbox/"},{"id":110428,"url":"https://patchwork.plctlab.org/api/1.2/patches/110428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112635.1299512-1-poulhies@adacore.com/","msgid":"<20230620112635.1299512-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:35","name":"[COMMITTED] ada: Minor tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112635.1299512-1-poulhies@adacore.com/mbox/"},{"id":110446,"url":"https://patchwork.plctlab.org/api/1.2/patches/110446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4a57c42-39fa-dc2a-de09-213f045edf40@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T12:01:48","name":"[committed] Fortran: Fix parse-dump-tree for OpenMP ALLOCATE clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4a57c42-39fa-dc2a-de09-213f045edf40@codesourcery.com/mbox/"},{"id":110459,"url":"https://patchwork.plctlab.org/api/1.2/patches/110459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com/","msgid":"<8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com>","list_archive_url":null,"date":"2023-06-20T12:47:43","name":"RISC-V: Implement autovec copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com/mbox/"},{"id":110498,"url":"https://patchwork.plctlab.org/api/1.2/patches/110498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620133858.166497-1-jwakely@redhat.com/","msgid":"<20230620133858.166497-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-20T13:38:58","name":"libstdc++: Use RAII in std::vector::_M_realloc_insert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620133858.166497-1-jwakely@redhat.com/mbox/"},{"id":110504,"url":"https://patchwork.plctlab.org/api/1.2/patches/110504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620134221.181173-1-juzhe.zhong@rivai.ai/","msgid":"<20230620134221.181173-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T13:42:21","name":"[V2] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620134221.181173-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110553,"url":"https://patchwork.plctlab.org/api/1.2/patches/110553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620150626.269383-1-juzhe.zhong@rivai.ai/","msgid":"<20230620150626.269383-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T15:06:26","name":"[V3] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620150626.269383-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110585,"url":"https://patchwork.plctlab.org/api/1.2/patches/110585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-2-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:44","name":"[V10,1/3] Introduce IR bit TYPE_INCLUDES_FLEXARRAY for the GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-2-qing.zhao@oracle.com/mbox/"},{"id":110579,"url":"https://patchwork.plctlab.org/api/1.2/patches/110579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-3-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:45","name":"[V10,2/3] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-3-qing.zhao@oracle.com/mbox/"},{"id":110583,"url":"https://patchwork.plctlab.org/api/1.2/patches/110583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-4-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:46","name":"[V10,3/3] Use TYPE_INCLUDES_FLEXARRAY in __builtin_object_size [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-4-qing.zhao@oracle.com/mbox/"},{"id":110597,"url":"https://patchwork.plctlab.org/api/1.2/patches/110597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620161103.2964705-1-hongtao.liu@intel.com/","msgid":"<20230620161103.2964705-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-20T16:11:03","name":"[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620161103.2964705-1-hongtao.liu@intel.com/mbox/"},{"id":110598,"url":"https://patchwork.plctlab.org/api/1.2/patches/110598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKCiHkaBpuXXPD7_cG8O-P+tWju=CFCw9eiwLCZLvnOtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:19:07","name":"[fortran] PR108961 - Segfault when associating to pointer from C_F_POINTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKCiHkaBpuXXPD7_cG8O-P+tWju=CFCw9eiwLCZLvnOtw@mail.gmail.com/mbox/"},{"id":110599,"url":"https://patchwork.plctlab.org/api/1.2/patches/110599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620162211.922410-1-jason@redhat.com/","msgid":"<20230620162211.922410-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-20T16:22:11","name":"[pushed] wwwdocs: Add GCC Code of Conduct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620162211.922410-1-jason@redhat.com/mbox/"},{"id":110615,"url":"https://patchwork.plctlab.org/api/1.2/patches/110615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJHXpbRnyrPrFROM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:45:25","name":"tree-ssa-math-opts: Small uaddc/usubc pattern matching improvement [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJHXpbRnyrPrFROM@tucnak/mbox/"},{"id":110618,"url":"https://patchwork.plctlab.org/api/1.2/patches/110618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVszEL5dx4_OcRjLn24tBDBdCEMM8rSrvmWJcDRe8oq9Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:57:41","name":"libgo patch committed: Use a C function to call mmap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVszEL5dx4_OcRjLn24tBDBdCEMM8rSrvmWJcDRe8oq9Q@mail.gmail.com/mbox/"},{"id":110625,"url":"https://patchwork.plctlab.org/api/1.2/patches/110625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17410-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T17:17:51","name":"[gensupport] drop suppport for define_cond_exec from compact syntac","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17410-tamar@arm.com/mbox/"},{"id":110634,"url":"https://patchwork.plctlab.org/api/1.2/patches/110634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b2hQXwTRb+RFB+1inHyrLEcenHQ+B8GYKs=Cg=7SJkjw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T17:47:00","name":"[committed] calls: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b2hQXwTRb+RFB+1inHyrLEcenHQ+B8GYKs=Cg=7SJkjw@mail.gmail.com/mbox/"},{"id":110693,"url":"https://patchwork.plctlab.org/api/1.2/patches/110693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6r1amg4.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T20:49:31","name":"[pushed] aarch64: Robustify stack tie handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6r1amg4.fsf@arm.com/mbox/"},{"id":110694,"url":"https://patchwork.plctlab.org/api/1.2/patches/110694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkh9amf1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T20:50:10","name":"[pushed] aarch64: Fix gcc.target/aarch64/sve/pcs failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkh9amf1.fsf@arm.com/mbox/"},{"id":110774,"url":"https://patchwork.plctlab.org/api/1.2/patches/110774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621051713.573883-1-hongtao.liu@intel.com/","msgid":"<20230621051713.573883-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-21T05:17:13","name":"Refine maskloadmn pattern with UNSPEC_MASKLOAD.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621051713.573883-1-hongtao.liu@intel.com/mbox/"},{"id":110780,"url":"https://patchwork.plctlab.org/api/1.2/patches/110780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df9f403f4e3c1f9ad620e8d5e38adaa59be2332b.camel@microchip.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T05:57:20","name":"Update array address space in c_build_qualified_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df9f403f4e3c1f9ad620e8d5e38adaa59be2332b.camel@microchip.com/mbox/"},{"id":110781,"url":"https://patchwork.plctlab.org/api/1.2/patches/110781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com/","msgid":"<0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com>","list_archive_url":null,"date":"2023-06-21T05:59:44","name":"x86: add -mprefer-vector-width=512 to new avx512f-dupv2di.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com/mbox/"},{"id":110785,"url":"https://patchwork.plctlab.org/api/1.2/patches/110785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c643ed57-cdba-5487-1781-47904dbe6208@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T06:06:00","name":"[v2] x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c643ed57-cdba-5487-1781-47904dbe6208@suse.com/mbox/"},{"id":110786,"url":"https://patchwork.plctlab.org/api/1.2/patches/110786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621060842.189680-1-yanzhang.wang@intel.com/","msgid":"<20230621060842.189680-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-21T06:08:42","name":"RISC-V: convert the mulh with 0 to mov 0 to the reg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621060842.189680-1-yanzhang.wang@intel.com/mbox/"},{"id":110791,"url":"https://patchwork.plctlab.org/api/1.2/patches/110791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com/","msgid":"<457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com>","list_archive_url":null,"date":"2023-06-21T06:25:52","name":"[1/5] x86: use VPTERNLOG for further bitwise two-vector operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com/mbox/"},{"id":110793,"url":"https://patchwork.plctlab.org/api/1.2/patches/110793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com/","msgid":"<3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com>","list_archive_url":null,"date":"2023-06-21T06:27:11","name":"[2/5] x86: use VPTERNLOG also for certain andnot forms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com/mbox/"},{"id":110794,"url":"https://patchwork.plctlab.org/api/1.2/patches/110794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com/","msgid":"<4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com>","list_archive_url":null,"date":"2023-06-21T06:27:32","name":"[3/5] x86: allow memory operand for AVX2 splitter for PR target/100711","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com/mbox/"},{"id":110796,"url":"https://patchwork.plctlab.org/api/1.2/patches/110796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2607ae7-045a-d1bc-2cc8-d2f114677cb6@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T06:27:51","name":"[4/5] x86: further PR target/100711-like splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2607ae7-045a-d1bc-2cc8-d2f114677cb6@suse.com/mbox/"},{"id":110797,"url":"https://patchwork.plctlab.org/api/1.2/patches/110797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com/","msgid":"<0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com>","list_archive_url":null,"date":"2023-06-21T06:28:12","name":"[5/5] x86: yet more PR target/100711-like splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com/mbox/"},{"id":110843,"url":"https://patchwork.plctlab.org/api/1.2/patches/110843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621073955.2567-1-shiyulong@iscas.ac.cn/","msgid":"<20230621073955.2567-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-21T07:39:55","name":"[V1] RISC-V:Add float16 tuple type abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621073955.2567-1-shiyulong@iscas.ac.cn/mbox/"},{"id":110844,"url":"https://patchwork.plctlab.org/api/1.2/patches/110844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075021.5A14738582BC@sourceware.org/","msgid":"<20230621075021.5A14738582BC@sourceware.org>","list_archive_url":null,"date":"2023-06-21T07:49:37","name":"[RFC] middle-end/110237 - wrong MEM_ATTRs for partial loads/stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075021.5A14738582BC@sourceware.org/mbox/"},{"id":110846,"url":"https://patchwork.plctlab.org/api/1.2/patches/110846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075824.1990571-1-pan2.li@intel.com/","msgid":"<20230621075824.1990571-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-21T07:58:24","name":"[v3] Streamer: Fix out of range memory access of machine mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075824.1990571-1-pan2.li@intel.com/mbox/"},{"id":110910,"url":"https://patchwork.plctlab.org/api/1.2/patches/110910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17411-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T09:32:10","name":"[committed,docs] : replace backslashchar [PR 110329].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17411-tamar@arm.com/mbox/"},{"id":110984,"url":"https://patchwork.plctlab.org/api/1.2/patches/110984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621111252.236515-1-juzhe.zhong@rivai.ai/","msgid":"<20230621111252.236515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T11:12:52","name":"RISC-V: Support RVV floating-point ternary auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621111252.236515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110987,"url":"https://patchwork.plctlab.org/api/1.2/patches/110987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113141.909183856DF1@sourceware.org/","msgid":"<20230621113141.909183856DF1@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:30:54","name":"[1/3] Hide and refactor IVOPTs strip_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113141.909183856DF1@sourceware.org/mbox/"},{"id":110988,"url":"https://patchwork.plctlab.org/api/1.2/patches/110988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113152.B9E773857019@sourceware.org/","msgid":"<20230621113152.B9E773857019@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:31:08","name":"[2/3] Less strip_offset in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113152.B9E773857019@sourceware.org/mbox/"},{"id":110989,"url":"https://patchwork.plctlab.org/api/1.2/patches/110989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113206.3F9773856973@sourceware.org/","msgid":"<20230621113206.3F9773856973@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:31:21","name":"[3/3] Less strip_offset in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113206.3F9773856973@sourceware.org/mbox/"},{"id":110990,"url":"https://patchwork.plctlab.org/api/1.2/patches/110990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113338.290127-1-juzhe.zhong@rivai.ai/","msgid":"<20230621113338.290127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T11:33:38","name":": [NFC] Move can_vec_mask_load_store_p and get_len_load_store_mode from \"optabs-query\" into \"optabs-tree\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113338.290127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110998,"url":"https://patchwork.plctlab.org/api/1.2/patches/110998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621122207.302494-1-jwakely@redhat.com/","msgid":"<20230621122207.302494-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-21T12:22:07","name":"[committed,gcc-12] libstdc++: avoid bogus -Wrestrict [PR105651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621122207.302494-1-jwakely@redhat.com/mbox/"},{"id":111002,"url":"https://patchwork.plctlab.org/api/1.2/patches/111002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee09dc9b-63d8-b166-7ceb-21f022d0eef6@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T12:57:24","name":"[v2] RISC-V: Implement autovec copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee09dc9b-63d8-b166-7ceb-21f022d0eef6@gmail.com/mbox/"},{"id":111048,"url":"https://patchwork.plctlab.org/api/1.2/patches/111048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621142819.307989-1-juzhe.zhong@rivai.ai/","msgid":"<20230621142819.307989-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T14:28:19","name":"[V2] RISC-V: Support RVV floating-point auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621142819.307989-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111124,"url":"https://patchwork.plctlab.org/api/1.2/patches/111124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621153618.134179-1-juzhe.zhong@rivai.ai/","msgid":"<20230621153618.134179-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T15:36:18","name":"[V4] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621153618.134179-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111134,"url":"https://patchwork.plctlab.org/api/1.2/patches/111134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621155314.183370-1-juzhe.zhong@rivai.ai/","msgid":"<20230621155314.183370-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T15:53:14","name":"[V3] RISC-V: Support RVV floating-point auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621155314.183370-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111183,"url":"https://patchwork.plctlab.org/api/1.2/patches/111183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJMpN1WebpMTlQHd@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T16:45:43","name":"[wwwdocs] cxx-status: Add C++26 papers (Spring 2023, Varna)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJMpN1WebpMTlQHd@redhat.com/mbox/"},{"id":111205,"url":"https://patchwork.plctlab.org/api/1.2/patches/111205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621171920.1283054-1-ppalka@redhat.com/","msgid":"<20230621171920.1283054-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-21T17:19:20","name":"c++: redundant targ coercion for var/alias tmpls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621171920.1283054-1-ppalka@redhat.com/mbox/"},{"id":111270,"url":"https://patchwork.plctlab.org/api/1.2/patches/111270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621185820.1766291-1-ben.boeckel@kitware.com/","msgid":"<20230621185820.1766291-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-21T18:58:20","name":"[1/1] libcpp: allow UCS_LIMIT codepoints in UTF-8 strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621185820.1766291-1-ben.boeckel@kitware.com/mbox/"},{"id":111298,"url":"https://patchwork.plctlab.org/api/1.2/patches/111298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZzjMJHVwn4vB6gCrd_gesLkRXAAGnv9dJBZBmVC+Hmag@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T19:57:50","name":"[committed] function: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZzjMJHVwn4vB6gCrd_gesLkRXAAGnv9dJBZBmVC+Hmag@mail.gmail.com/mbox/"},{"id":111332,"url":"https://patchwork.plctlab.org/api/1.2/patches/111332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621223842.259423-1-juzhe.zhong@rivai.ai/","msgid":"<20230621223842.259423-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T22:38:42","name":"RISC-V: Refactor the integer ternary autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621223842.259423-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111334,"url":"https://patchwork.plctlab.org/api/1.2/patches/111334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com/","msgid":"<6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-21T22:46:05","name":"[ver,2] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com/mbox/"},{"id":111378,"url":"https://patchwork.plctlab.org/api/1.2/patches/111378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUBnHj_WyUkExtGPi2x96qBGZ7ZYAjT4EdW8HzoC0Usvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T00:53:04","name":"Go patch committed: Determine types of Slice_{value, info} expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUBnHj_WyUkExtGPi2x96qBGZ7ZYAjT4EdW8HzoC0Usvw@mail.gmail.com/mbox/"},{"id":111481,"url":"https://patchwork.plctlab.org/api/1.2/patches/111481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622081413.EA6D53858C39@sourceware.org/","msgid":"<20230622081413.EA6D53858C39@sourceware.org>","list_archive_url":null,"date":"2023-06-22T08:13:28","name":"tree-optimization/110332 - fix ICE with phiprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622081413.EA6D53858C39@sourceware.org/mbox/"},{"id":111598,"url":"https://patchwork.plctlab.org/api/1.2/patches/111598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com/","msgid":"<4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com>","list_archive_url":null,"date":"2023-06-22T10:03:37","name":"[OpenACC,2.7] Adjust acc_map_data/acc_unmap_data interaction with reference counters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com/mbox/"},{"id":111618,"url":"https://patchwork.plctlab.org/api/1.2/patches/111618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622111154.2837175-1-philipp.tomsich@vrull.eu/","msgid":"<20230622111154.2837175-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-06-22T11:11:54","name":"cprop_hardreg: fix ORIGINAL_REGNO/REG_ATTRS/REG_POINTER handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622111154.2837175-1-philipp.tomsich@vrull.eu/mbox/"},{"id":111622,"url":"https://patchwork.plctlab.org/api/1.2/patches/111622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMRM9YmzmpuHTeMNAd1e2PKXkCkkkdnM1-M34YqGZ8b2w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T11:36:51","name":"LTO: buffer overflow in lto_output_init_mode_table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMRM9YmzmpuHTeMNAd1e2PKXkCkkkdnM1-M34YqGZ8b2w@mail.gmail.com/mbox/"},{"id":111657,"url":"https://patchwork.plctlab.org/api/1.2/patches/111657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6f011d2-6629-9acb-4a4e-f3f079678f12@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T13:03:41","name":"RISC-V: Split VF iterators for Zvfh(min).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6f011d2-6629-9acb-4a4e-f3f079678f12@gmail.com/mbox/"},{"id":111656,"url":"https://patchwork.plctlab.org/api/1.2/patches/111656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com/","msgid":"<4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com>","list_archive_url":null,"date":"2023-06-22T13:03:43","name":"[committed] libgomp.texi: Improve OpenMP ICV description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com/mbox/"},{"id":111677,"url":"https://patchwork.plctlab.org/api/1.2/patches/111677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622135348.160496-1-juzhe.zhong@rivai.ai/","msgid":"<20230622135348.160496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-22T13:53:48","name":"[V5] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622135348.160496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111795,"url":"https://patchwork.plctlab.org/api/1.2/patches/111795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622194952.1834364-1-vultkayn@gcc.gnu.org/","msgid":"<20230622194952.1834364-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-22T19:49:54","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622194952.1834364-1-vultkayn@gcc.gnu.org/mbox/"},{"id":111797,"url":"https://patchwork.plctlab.org/api/1.2/patches/111797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622195522.1834793-1-vultkayn@gcc.gnu.org/","msgid":"<20230622195522.1834793-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-22T19:55:24","name":"analyzer: Fix regression bug after r14-1632-g9589a46ddadc8b [pr110198]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622195522.1834793-1-vultkayn@gcc.gnu.org/mbox/"},{"id":111799,"url":"https://patchwork.plctlab.org/api/1.2/patches/111799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-67cbfb46-d186-40df-86e8-fb36979a34a9-1687465404920@3c-app-gmx-bs06/","msgid":"","list_archive_url":null,"date":"2023-06-22T20:23:24","name":"Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-67cbfb46-d186-40df-86e8-fb36979a34a9-1687465404920@3c-app-gmx-bs06/mbox/"},{"id":111843,"url":"https://patchwork.plctlab.org/api/1.2/patches/111843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622235112.9407-1-juzhe.zhong@rivai.ai/","msgid":"<20230622235112.9407-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-22T23:51:12","name":"[V6] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622235112.9407-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111855,"url":"https://patchwork.plctlab.org/api/1.2/patches/111855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623002537.140375-1-polacek@redhat.com/","msgid":"<20230623002537.140375-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-23T00:25:37","name":"c++: Add support for -std={c,gnu}++2{c,6}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623002537.140375-1-polacek@redhat.com/mbox/"},{"id":111928,"url":"https://patchwork.plctlab.org/api/1.2/patches/111928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzvupwpr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-23T05:35:28","name":"[testsuite] note pitfall in how outputs.exp sets gld","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzvupwpr.fsf@lxoliva.fsfla.org/mbox/"},{"id":111944,"url":"https://patchwork.plctlab.org/api/1.2/patches/111944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623064417.598501331F@imap2.suse-dmz.suse.de/","msgid":"<20230623064417.598501331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T06:44:16","name":"Improve vector_vector_composition_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623064417.598501331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111966,"url":"https://patchwork.plctlab.org/api/1.2/patches/111966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623081138.552D21331F@imap2.suse-dmz.suse.de/","msgid":"<20230623081138.552D21331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:11:37","name":"Optimize vector codegen for invariant loads, fix SLP support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623081138.552D21331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111976,"url":"https://patchwork.plctlab.org/api/1.2/patches/111976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082613.00D381331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082613.00D381331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:26:12","name":"[RFC] Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082613.00D381331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111977,"url":"https://patchwork.plctlab.org/api/1.2/patches/111977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082642.0811A1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082642.0811A1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:26:41","name":"[1/6] Avoid shorten_binary_op on VECTOR_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082642.0811A1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111978,"url":"https://patchwork.plctlab.org/api/1.2/patches/111978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:04","name":"[2/6] Fix TYPE_PRECISION use in hashable_expr_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111980,"url":"https://patchwork.plctlab.org/api/1.2/patches/111980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082721.CF9571331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082721.CF9571331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:21","name":"[3/6] Properly guard vect_look_through_possible_promotion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082721.CF9571331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111979,"url":"https://patchwork.plctlab.org/api/1.2/patches/111979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:35","name":"[4/6] Fix tree_simple_nonnegative_warnv_p for VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111982,"url":"https://patchwork.plctlab.org/api/1.2/patches/111982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082748.10FA71331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082748.10FA71331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:47","name":"[5/6] Bogus and missed folding on vector compares","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082748.10FA71331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111981,"url":"https://patchwork.plctlab.org/api/1.2/patches/111981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082759.0DD281331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082759.0DD281331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:58","name":"[6/6] Use element_precision for match.pd arith conversion optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082759.0DD281331F@imap2.suse-dmz.suse.de/mbox/"},{"id":112044,"url":"https://patchwork.plctlab.org/api/1.2/patches/112044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623102759.DA3231331F@imap2.suse-dmz.suse.de/","msgid":"<20230623102759.DA3231331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T10:27:59","name":"tree-optimization/96208 - SLP of non-grouped loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623102759.DA3231331F@imap2.suse-dmz.suse.de/mbox/"},{"id":112112,"url":"https://patchwork.plctlab.org/api/1.2/patches/112112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121442.3A967134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121442.3A967134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:14:41","name":"Deal with vector typed operands in conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121442.3A967134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112113,"url":"https://patchwork.plctlab.org/api/1.2/patches/112113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:14:52","name":"Fix initializer_constant_valid_p_1 TYPE_PRECISION use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112114,"url":"https://patchwork.plctlab.org/api/1.2/patches/112114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:16:07","name":"narrowing initializers and initializer_constant_valid_p_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112141,"url":"https://patchwork.plctlab.org/api/1.2/patches/112141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623134827.4093245-1-juzhe.zhong@rivai.ai/","msgid":"<20230623134827.4093245-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T13:48:27","name":"GIMPLE_FOLD: Apply LEN_MASK_{LOAD,STORE} into GIMPLE_FOLD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623134827.4093245-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112145,"url":"https://patchwork.plctlab.org/api/1.2/patches/112145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623135635.4100947-1-juzhe.zhong@rivai.ai/","msgid":"<20230623135635.4100947-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T13:56:35","name":"SSA ALIAS: Apply LEN_MASK_{LOAD, STORE} into SSA alias analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623135635.4100947-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112149,"url":"https://patchwork.plctlab.org/api/1.2/patches/112149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623140537.4156063-1-juzhe.zhong@rivai.ai/","msgid":"<20230623140537.4156063-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:05:37","name":"LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623140537.4156063-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112157,"url":"https://patchwork.plctlab.org/api/1.2/patches/112157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623141539.4165425-1-juzhe.zhong@rivai.ai/","msgid":"<20230623141539.4165425-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:15:39","name":"SSA ALIAS: Apply LEN_MASK_STORE to '\''ref_maybe_used_by_call_p_1'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623141539.4165425-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112161,"url":"https://patchwork.plctlab.org/api/1.2/patches/112161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623142103.16401-1-juzhe.zhong@rivai.ai/","msgid":"<20230623142103.16401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:21:03","name":"IVOPTS: Add LEN_MASK_{LOAD, STORE} into '\''get_alias_ptr_type_for_ptr_address'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623142103.16401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112172,"url":"https://patchwork.plctlab.org/api/1.2/patches/112172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143602.83510-1-dmalcolm@redhat.com/","msgid":"<20230623143602.83510-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-23T14:36:02","name":"text-art: remove explicit #include of C++ standard library headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143602.83510-1-dmalcolm@redhat.com/mbox/"},{"id":112175,"url":"https://patchwork.plctlab.org/api/1.2/patches/112175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143835.36983-1-iain@sandoe.co.uk/","msgid":"<20230623143835.36983-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-23T14:38:35","name":"[pushed] testsuite,objective-c++: Fix imported NSObjCRuntime.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143835.36983-1-iain@sandoe.co.uk/mbox/"},{"id":112185,"url":"https://patchwork.plctlab.org/api/1.2/patches/112185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623144847.85698-1-juzhe.zhong@rivai.ai/","msgid":"<20230623144847.85698-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:48:47","name":"DSE: Add LEN_MASK_STORE analysis into DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623144847.85698-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112231,"url":"https://patchwork.plctlab.org/api/1.2/patches/112231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c34bd181-e25e-910b-7bc3-1c1d000d429b@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T16:49:18","name":"rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c34bd181-e25e-910b-7bc3-1c1d000d429b@linux.vnet.ibm.com/mbox/"},{"id":112242,"url":"https://patchwork.plctlab.org/api/1.2/patches/112242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJXU7UQY3oH8t4LH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T17:22:53","name":"[v2] c++: Add support for -std={c,gnu}++2{c,6}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJXU7UQY3oH8t4LH@redhat.com/mbox/"},{"id":112297,"url":"https://patchwork.plctlab.org/api/1.2/patches/112297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623210851.jnyyc24by7jomr2b@lug-owl.de/","msgid":"<20230623210851.jnyyc24by7jomr2b@lug-owl.de>","list_archive_url":null,"date":"2023-06-23T21:08:52","name":"GCC nvptx: Silence warning?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623210851.jnyyc24by7jomr2b@lug-owl.de/mbox/"},{"id":112345,"url":"https://patchwork.plctlab.org/api/1.2/patches/112345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623220106.117866-1-dmalcolm@redhat.com/","msgid":"<20230623220106.117866-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-23T22:01:06","name":"[pushed] c++: provide #include hint for missing includes [PR110164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623220106.117866-1-dmalcolm@redhat.com/mbox/"},{"id":112351,"url":"https://patchwork.plctlab.org/api/1.2/patches/112351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623222525.547651-1-polacek@redhat.com/","msgid":"<20230623222525.547651-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-23T22:25:25","name":"c++: fix error reporting routines re-entered ICE [PR110175]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623222525.547651-1-polacek@redhat.com/mbox/"},{"id":112376,"url":"https://patchwork.plctlab.org/api/1.2/patches/112376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVTmpCvvgudvjOjpOtHUni-9__=TKHwJoE6_E7Z_4ARCw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T23:17:31","name":"Go patch committed: Support bootstrapping Go 1.21","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVTmpCvvgudvjOjpOtHUni-9__=TKHwJoE6_E7Z_4ARCw@mail.gmail.com/mbox/"},{"id":112385,"url":"https://patchwork.plctlab.org/api/1.2/patches/112385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qi1pxnk.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-23T23:27:27","name":"[v3] Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qi1pxnk.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":112386,"url":"https://patchwork.plctlab.org/api/1.2/patches/112386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623234157.331911-1-juzhe.zhong@rivai.ai/","msgid":"<20230623234157.331911-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T23:41:57","name":"[V2] LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623234157.331911-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112405,"url":"https://patchwork.plctlab.org/api/1.2/patches/112405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624012657.130267-1-dmalcolm@redhat.com/","msgid":"<20230624012657.130267-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-24T01:26:57","name":"[pushed:,v2] text-art: remove explicit #include of C++ standard library headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624012657.130267-1-dmalcolm@redhat.com/mbox/"},{"id":112409,"url":"https://patchwork.plctlab.org/api/1.2/patches/112409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e906272d-b875-32c5-8db7-aaebdd3565d4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-24T04:12:13","name":"[v6] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e906272d-b875-32c5-8db7-aaebdd3565d4@linux.ibm.com/mbox/"},{"id":112440,"url":"https://patchwork.plctlab.org/api/1.2/patches/112440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-1-kmatsui@cs.washington.edu/","msgid":"<20230624101210.57519-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:12:09","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-1-kmatsui@cs.washington.edu/mbox/"},{"id":112441,"url":"https://patchwork.plctlab.org/api/1.2/patches/112441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-2-kmatsui@cs.washington.edu/","msgid":"<20230624101210.57519-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:12:10","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-2-kmatsui@cs.washington.edu/mbox/"},{"id":112443,"url":"https://patchwork.plctlab.org/api/1.2/patches/112443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-1-kmatsui@cs.washington.edu/","msgid":"<20230624103848.68000-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:38:47","name":"[1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-1-kmatsui@cs.washington.edu/mbox/"},{"id":112444,"url":"https://patchwork.plctlab.org/api/1.2/patches/112444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-2-kmatsui@cs.washington.edu/","msgid":"<20230624103848.68000-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:38:48","name":"[2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-2-kmatsui@cs.washington.edu/mbox/"},{"id":112458,"url":"https://patchwork.plctlab.org/api/1.2/patches/112458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKPvpOMQSbx5tm9UGVvyGuDoEcQAR7WJMo7iQiYh9pL+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-24T13:18:54","name":"[fortran] PR49213 - [OOP] gfortran rejects structure constructor expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKPvpOMQSbx5tm9UGVvyGuDoEcQAR7WJMo7iQiYh9pL+A@mail.gmail.com/mbox/"},{"id":112459,"url":"https://patchwork.plctlab.org/api/1.2/patches/112459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-1-kmatsui@cs.washington.edu/","msgid":"<20230624134051.73203-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:40:50","name":"[v2,1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-1-kmatsui@cs.washington.edu/mbox/"},{"id":112460,"url":"https://patchwork.plctlab.org/api/1.2/patches/112460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-2-kmatsui@cs.washington.edu/","msgid":"<20230624134051.73203-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:40:51","name":"[v2,2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-2-kmatsui@cs.washington.edu/mbox/"},{"id":112462,"url":"https://patchwork.plctlab.org/api/1.2/patches/112462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-1-kmatsui@cs.washington.edu/","msgid":"<20230624135348.74428-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:53:47","name":"[v2,1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-1-kmatsui@cs.washington.edu/mbox/"},{"id":112464,"url":"https://patchwork.plctlab.org/api/1.2/patches/112464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-2-kmatsui@cs.washington.edu/","msgid":"<20230624135348.74428-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:53:48","name":"[v2,2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-2-kmatsui@cs.washington.edu/mbox/"},{"id":112468,"url":"https://patchwork.plctlab.org/api/1.2/patches/112468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-1-kmatsui@cs.washington.edu/","msgid":"<20230624142346.84325-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T14:23:45","name":"[v2,1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-1-kmatsui@cs.washington.edu/mbox/"},{"id":112469,"url":"https://patchwork.plctlab.org/api/1.2/patches/112469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-2-kmatsui@cs.washington.edu/","msgid":"<20230624142346.84325-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T14:23:46","name":"[v2,2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-2-kmatsui@cs.washington.edu/mbox/"},{"id":112476,"url":"https://patchwork.plctlab.org/api/1.2/patches/112476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com/","msgid":"<00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-24T17:13:55","name":"[x86_64] Handle SUBREG conversions in TImode STV (for ptest).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com/mbox/"},{"id":112479,"url":"https://patchwork.plctlab.org/api/1.2/patches/112479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com/","msgid":"<010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-24T18:04:47","name":"[x86_PATCH] New *ashl_doubleword_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com/mbox/"},{"id":112490,"url":"https://patchwork.plctlab.org/api/1.2/patches/112490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b942f382-e8c1-4447-a562-0567f1f1f923-1687633555558@3c-app-gmx-bap37/","msgid":"","list_archive_url":null,"date":"2023-06-24T19:05:55","name":"[part2,committed] Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b942f382-e8c1-4447-a562-0567f1f1f923-1687633555558@3c-app-gmx-bap37/mbox/"},{"id":112509,"url":"https://patchwork.plctlab.org/api/1.2/patches/112509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com/","msgid":"<8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com>","list_archive_url":null,"date":"2023-06-25T02:09:25","name":"[PATCHv4,rs6000] Splat vector small V2DI constants with ISA 2.07 instructions [PR104124]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com/mbox/"},{"id":112510,"url":"https://patchwork.plctlab.org/api/1.2/patches/112510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625030837.23389-1-xuli1@eswincomputing.com/","msgid":"<20230625030837.23389-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-25T03:08:37","name":"RISC-V: force arg and target to reg rtx under -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625030837.23389-1-xuli1@eswincomputing.com/mbox/"},{"id":112516,"url":"https://patchwork.plctlab.org/api/1.2/patches/112516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625033654.1150808-1-juzhe.zhong@rivai.ai/","msgid":"<20230625033654.1150808-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T03:36:54","name":"internal-fn: Fix bug of BIAS argument index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625033654.1150808-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112522,"url":"https://patchwork.plctlab.org/api/1.2/patches/112522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083207.289000-1-juzhe.zhong@rivai.ai/","msgid":"<20230625083207.289000-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T08:32:07","name":"RISC-V: Enable len_mask{load, store} and remove len_{load, store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083207.289000-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112526,"url":"https://patchwork.plctlab.org/api/1.2/patches/112526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083952.9771-1-juzhe.zhong@rivai.ai/","msgid":"<20230625083952.9771-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T08:39:52","name":"[V2] RISC-V: Enable len_mask{load, store} and remove len_{load, store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083952.9771-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112529,"url":"https://patchwork.plctlab.org/api/1.2/patches/112529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625090932.18330-1-xuli1@eswincomputing.com/","msgid":"<20230625090932.18330-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-25T09:09:32","name":"[v2] RISC-V: fix expand function of vlmul_ext RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625090932.18330-1-xuli1@eswincomputing.com/mbox/"},{"id":112530,"url":"https://patchwork.plctlab.org/api/1.2/patches/112530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625092128.44071-1-iain@sandoe.co.uk/","msgid":"<20230625092128.44071-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-25T09:21:28","name":"[pushed] configure, Darwin: Ensure overrides to host-pie are passed to gcc configure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625092128.44071-1-iain@sandoe.co.uk/mbox/"},{"id":112532,"url":"https://patchwork.plctlab.org/api/1.2/patches/112532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625095118.1854755-1-lehua.ding@rivai.ai/","msgid":"<20230625095118.1854755-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-25T09:51:18","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625095118.1854755-1-lehua.ding@rivai.ai/mbox/"},{"id":112559,"url":"https://patchwork.plctlab.org/api/1.2/patches/112559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625113229.79338-1-iain@sandoe.co.uk/","msgid":"<20230625113229.79338-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-25T11:32:29","name":"modula-2: Amend the handling of failed select() calls in RTint [PR108835].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625113229.79338-1-iain@sandoe.co.uk/mbox/"},{"id":112571,"url":"https://patchwork.plctlab.org/api/1.2/patches/112571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625122057.195433-1-juzhe.zhong@rivai.ai/","msgid":"<20230625122057.195433-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T12:20:57","name":"RISC-V: Optimize VSETVL codegen of SELECT_VL with LEN_MASK_{LOAD, STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625122057.195433-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112579,"url":"https://patchwork.plctlab.org/api/1.2/patches/112579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625124040.2335529-1-lehua.ding@rivai.ai/","msgid":"<20230625124040.2335529-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-25T12:40:40","name":"RISC-V: Add an experimental vector calling convention","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625124040.2335529-1-lehua.ding@rivai.ai/mbox/"},{"id":112583,"url":"https://patchwork.plctlab.org/api/1.2/patches/112583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com/","msgid":"<4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com>","list_archive_url":null,"date":"2023-06-25T13:13:37","name":"[PING,RISCV,PR,target/110201] Fix operand types for various scalar crypto insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com/mbox/"},{"id":112685,"url":"https://patchwork.plctlab.org/api/1.2/patches/112685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626000415.277265-1-ibuclaw@gdcproject.org/","msgid":"<20230626000415.277265-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T00:04:15","name":"[committed] d: Merge upstream dmd, druntime a45f4e9f43, phobos 106038f2e.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626000415.277265-1-ibuclaw@gdcproject.org/mbox/"},{"id":112686,"url":"https://patchwork.plctlab.org/api/1.2/patches/112686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626005142.333366-1-ibuclaw@gdcproject.org/","msgid":"<20230626005142.333366-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T00:51:42","name":"[GCC13,committed] d: Fix crash in d/dmd/root/aav.d:127 dmd_aaGetRvalue from DsymbolTable::lookup (PR110113)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626005142.333366-1-ibuclaw@gdcproject.org/mbox/"},{"id":112693,"url":"https://patchwork.plctlab.org/api/1.2/patches/112693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-1-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:03","name":"[1/3] Use cvt_op to save intermediate type operand instead of \"subtle\" vec_dest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-1-hongtao.liu@intel.com/mbox/"},{"id":112691,"url":"https://patchwork.plctlab.org/api/1.2/patches/112691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-2-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:04","name":"[2/3] Don'\''t use intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-2-hongtao.liu@intel.com/mbox/"},{"id":112692,"url":"https://patchwork.plctlab.org/api/1.2/patches/112692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-3-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-3-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:05","name":"[3/3,aarch64] Adjust testcase to match assembly output after r14-2007.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-3-hongtao.liu@intel.com/mbox/"},{"id":112694,"url":"https://patchwork.plctlab.org/api/1.2/patches/112694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626014940.36902-1-juzhe.zhong@rivai.ai/","msgid":"<20230626014940.36902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T01:49:40","name":"GIMPLE_FOLD: Fix gimple fold for LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626014940.36902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112695,"url":"https://patchwork.plctlab.org/api/1.2/patches/112695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626015443.89052-1-juzhe.zhong@rivai.ai/","msgid":"<20230626015443.89052-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T01:54:43","name":"[V2] DSE: Add LEN_MASK_STORE analysis into DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626015443.89052-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112696,"url":"https://patchwork.plctlab.org/api/1.2/patches/112696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626021222.419821-1-ibuclaw@gdcproject.org/","msgid":"<20230626021222.419821-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T02:12:22","name":"[committed] d: Suboptimal codegen for __builtin_expect(cond, false)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626021222.419821-1-ibuclaw@gdcproject.org/mbox/"},{"id":112698,"url":"https://patchwork.plctlab.org/api/1.2/patches/112698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626022913.32556-1-hongyu.wang@intel.com/","msgid":"<20230626022913.32556-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-06-26T02:29:13","name":"i386: Sync tune_string with arch_string for target attribute arch=*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626022913.32556-1-hongyu.wang@intel.com/mbox/"},{"id":112699,"url":"https://patchwork.plctlab.org/api/1.2/patches/112699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023204.1010610-1-juzhe.zhong@rivai.ai/","msgid":"<20230626023204.1010610-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T02:32:04","name":"SCCVN: Fix repeating variable name \"len\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023204.1010610-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112703,"url":"https://patchwork.plctlab.org/api/1.2/patches/112703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023408.33758-1-hongyu.wang@intel.com/","msgid":"<20230626023408.33758-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-06-26T02:34:08","name":"i386: Relax inline requirement for functions with different target attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023408.33758-1-hongyu.wang@intel.com/mbox/"},{"id":112704,"url":"https://patchwork.plctlab.org/api/1.2/patches/112704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023735.1013441-1-juzhe.zhong@rivai.ai/","msgid":"<20230626023735.1013441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T02:37:35","name":"SSCV: Add LEN_MASK_STORE into SCCVN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023735.1013441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112718,"url":"https://patchwork.plctlab.org/api/1.2/patches/112718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626033830.6544-1-juzhe.zhong@rivai.ai/","msgid":"<20230626033830.6544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T03:38:30","name":"RISC-V: Remove redundant vcond patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626033830.6544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112751,"url":"https://patchwork.plctlab.org/api/1.2/patches/112751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626065101.75459-1-juzhe.zhong@rivai.ai/","msgid":"<20230626065101.75459-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T06:51:01","name":"RISC-V: Enhance RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626065101.75459-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112754,"url":"https://patchwork.plctlab.org/api/1.2/patches/112754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626074342.2629716-1-juzhe.zhong@rivai.ai/","msgid":"<20230626074342.2629716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T07:43:42","name":"[V3] DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626074342.2629716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112758,"url":"https://patchwork.plctlab.org/api/1.2/patches/112758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626081155.2865595-1-juzhe.zhong@rivai.ai/","msgid":"<20230626081155.2865595-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T08:11:55","name":"[V2] GIMPLE_FOLD: Fix gimple fold for LEN_{MASK}_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626081155.2865595-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112778,"url":"https://patchwork.plctlab.org/api/1.2/patches/112778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626085417.1357574-1-hongtao.liu@intel.com/","msgid":"<20230626085417.1357574-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T08:54:17","name":"Issue a warning for conversion between short and __bf16 under TARGET_AVX512BF16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626085417.1357574-1-hongtao.liu@intel.com/mbox/"},{"id":112815,"url":"https://patchwork.plctlab.org/api/1.2/patches/112815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093656.502976-1-pan2.li@intel.com/","msgid":"<20230626093656.502976-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-26T09:36:56","name":"[v1] RISC-V: Remove duplicated extern function_base decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093656.502976-1-pan2.li@intel.com/mbox/"},{"id":112820,"url":"https://patchwork.plctlab.org/api/1.2/patches/112820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093846.3006718-1-juzhe.zhong@rivai.ai/","msgid":"<20230626093846.3006718-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T09:38:46","name":"[V2] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093846.3006718-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112840,"url":"https://patchwork.plctlab.org/api/1.2/patches/112840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626104303.3098270-1-juzhe.zhong@rivai.ai/","msgid":"<20230626104303.3098270-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T10:43:03","name":"Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626104303.3098270-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112850,"url":"https://patchwork.plctlab.org/api/1.2/patches/112850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626110223.D451938582A4@sourceware.org/","msgid":"<20230626110223.D451938582A4@sourceware.org>","list_archive_url":null,"date":"2023-06-26T11:01:39","name":"tree-optimization/110392 - ICE with predicate analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626110223.D451938582A4@sourceware.org/mbox/"},{"id":112889,"url":"https://patchwork.plctlab.org/api/1.2/patches/112889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt352ee8qx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T11:57:42","name":"vect: Cost intermediate conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt352ee8qx.fsf@arm.com/mbox/"},{"id":112893,"url":"https://patchwork.plctlab.org/api/1.2/patches/112893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626120429.3403256-1-juzhe.zhong@rivai.ai/","msgid":"<20230626120429.3403256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T12:04:29","name":"[V3] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626120429.3403256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112898,"url":"https://patchwork.plctlab.org/api/1.2/patches/112898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121826.8030D385772D@sourceware.org/","msgid":"<20230626121826.8030D385772D@sourceware.org>","list_archive_url":null,"date":"2023-06-26T12:17:28","name":"tree-optimization/110381 - preserve SLP permutation with in-order reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121826.8030D385772D@sourceware.org/mbox/"},{"id":112900,"url":"https://patchwork.plctlab.org/api/1.2/patches/112900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121804.110219-1-juzhe.zhong@rivai.ai/","msgid":"<20230626121804.110219-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T12:18:04","name":"[V2] RISC-V: Support const vector expansion with step vector with base != 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121804.110219-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112955,"url":"https://patchwork.plctlab.org/api/1.2/patches/112955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com/","msgid":"<98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-06-26T13:55:48","name":"aarch64: Remove architecture dependencies from intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com/mbox/"},{"id":112957,"url":"https://patchwork.plctlab.org/api/1.2/patches/112957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9ef49e-9f22-cb6c-1914-3b30f6e33758@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T14:02:32","name":"[COMMITTED] PR tree-optimization/110251 - Avoid redundant GORI calcuations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9ef49e-9f22-cb6c-1914-3b30f6e33758@redhat.com/mbox/"},{"id":112973,"url":"https://patchwork.plctlab.org/api/1.2/patches/112973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com/","msgid":"<1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-06-26T14:25:25","name":"[committed] docs: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com/mbox/"},{"id":112976,"url":"https://patchwork.plctlab.org/api/1.2/patches/112976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com/","msgid":"<3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com>","list_archive_url":null,"date":"2023-06-26T14:26:58","name":"match.pd: Use element_mode instead of TYPE_MODE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com/mbox/"},{"id":112996,"url":"https://patchwork.plctlab.org/api/1.2/patches/112996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626150230.2483991-1-christophe.lyon@linaro.org/","msgid":"<20230626150230.2483991-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-26T15:02:30","name":"arm: Fix MVE intrinsics support with LTO (PR target/110268)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626150230.2483991-1-christophe.lyon@linaro.org/mbox/"},{"id":113015,"url":"https://patchwork.plctlab.org/api/1.2/patches/113015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153423.42763-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230626153423.42763-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-26T15:34:23","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153423.42763-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113016,"url":"https://patchwork.plctlab.org/api/1.2/patches/113016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153454.42824-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230626153454.42824-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-26T15:34:54","name":"[2/2] AArch64: New RTL for ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153454.42824-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113043,"url":"https://patchwork.plctlab.org/api/1.2/patches/113043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJm82eCPnJ4r8nrP@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-26T16:29:13","name":"Fix profile of forwardes produced by cd-dce","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJm82eCPnJ4r8nrP@kam.mff.cuni.cz/mbox/"},{"id":113047,"url":"https://patchwork.plctlab.org/api/1.2/patches/113047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164345.270480-1-jwakely@redhat.com/","msgid":"<20230626164345.270480-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:28","name":"[committed] libstdc++: Qualify calls to debug mode helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164345.270480-1-jwakely@redhat.com/mbox/"},{"id":113048,"url":"https://patchwork.plctlab.org/api/1.2/patches/113048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164350.270495-1-jwakely@redhat.com/","msgid":"<20230626164350.270495-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:46","name":"[committed] libstdc++: Implement P2538R1 ADL-proof std::projected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164350.270495-1-jwakely@redhat.com/mbox/"},{"id":113049,"url":"https://patchwork.plctlab.org/api/1.2/patches/113049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164404.270512-1-jwakely@redhat.com/","msgid":"<20230626164404.270512-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:51","name":"[committed] libstdc++: Fix std::format for pointers [PR110239]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164404.270512-1-jwakely@redhat.com/mbox/"},{"id":113050,"url":"https://patchwork.plctlab.org/api/1.2/patches/113050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164512.11512-1-krebbel@linux.ibm.com/","msgid":"<20230626164512.11512-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-06-26T16:45:12","name":"[Committed] IBM zSystems: Assume symbols without explicit alignment to be ok","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164512.11512-1-krebbel@linux.ibm.com/mbox/"},{"id":113051,"url":"https://patchwork.plctlab.org/api/1.2/patches/113051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUzBG31w-is2RFc-S8fxCv0HBwtakQKoFtbBybuS2F0sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T16:58:22","name":"Go patch committed: Support -fgo-importcfg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUzBG31w-is2RFc-S8fxCv0HBwtakQKoFtbBybuS2F0sw@mail.gmail.com/mbox/"},{"id":113089,"url":"https://patchwork.plctlab.org/api/1.2/patches/113089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc08596b-e2e1-b46c-5697-9e723427ac53@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T18:58:27","name":"RISC-V: Add autovec FP int->float conversion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc08596b-e2e1-b46c-5697-9e723427ac53@gmail.com/mbox/"},{"id":113091,"url":"https://patchwork.plctlab.org/api/1.2/patches/113091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89b515c2-df12-156e-c116-02f711a911d5@gmail.com/","msgid":"<89b515c2-df12-156e-c116-02f711a911d5@gmail.com>","list_archive_url":null,"date":"2023-06-26T18:58:52","name":"RISC-V: Add autovec FP widening/narrowing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89b515c2-df12-156e-c116-02f711a911d5@gmail.com/mbox/"},{"id":113092,"url":"https://patchwork.plctlab.org/api/1.2/patches/113092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f706d9ed-d0d6-8d9b-c515-17efc09a6bd9@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T18:59:10","name":"RISC-V: Add autovect widening/narrowing Integer/FP conversions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f706d9ed-d0d6-8d9b-c515-17efc09a6bd9@gmail.com/mbox/"},{"id":113134,"url":"https://patchwork.plctlab.org/api/1.2/patches/113134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626220737.24643-1-apinski@marvell.com/","msgid":"<20230626220737.24643-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-26T22:07:37","name":"[Committed] docs: Add @cindex for some attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626220737.24643-1-apinski@marvell.com/mbox/"},{"id":113176,"url":"https://patchwork.plctlab.org/api/1.2/patches/113176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627023202.35018-1-apinski@marvell.com/","msgid":"<20230627023202.35018-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-27T02:32:02","name":"Fix __builtin_alloca_with_align_and_max defbuiltin usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627023202.35018-1-apinski@marvell.com/mbox/"},{"id":113187,"url":"https://patchwork.plctlab.org/api/1.2/patches/113187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627032449.37404-1-apinski@marvell.com/","msgid":"<20230627032449.37404-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-27T03:24:49","name":"Mark asm goto with outputs as volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627032449.37404-1-apinski@marvell.com/mbox/"},{"id":113225,"url":"https://patchwork.plctlab.org/api/1.2/patches/113225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627053806.2880955-1-hongtao.liu@intel.com/","msgid":"<20230627053806.2880955-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:38:06","name":"[x86] Refine maskstore patterns with UNSPEC_MASKMOV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627053806.2880955-1-hongtao.liu@intel.com/mbox/"},{"id":113226,"url":"https://patchwork.plctlab.org/api/1.2/patches/113226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz1ha2ik.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T05:38:11","name":"gengtype: Handle braced initialisers in structs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz1ha2ik.fsf@arm.com/mbox/"},{"id":113232,"url":"https://patchwork.plctlab.org/api/1.2/patches/113232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-1-hongtao.liu@intel.com/","msgid":"<20230627055312.2881827-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:53:11","name":"[1/2] Don'\''t issue vzeroupper for vzeroupper call_insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-1-hongtao.liu@intel.com/mbox/"},{"id":113231,"url":"https://patchwork.plctlab.org/api/1.2/patches/113231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-2-hongtao.liu@intel.com/","msgid":"<20230627055312.2881827-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:53:12","name":"[2/2] Make option mvzeroupper independent of optimization level.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-2-hongtao.liu@intel.com/mbox/"},{"id":113236,"url":"https://patchwork.plctlab.org/api/1.2/patches/113236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627060617.2250903-1-pan2.li@intel.com/","msgid":"<20230627060617.2250903-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-27T06:06:17","name":"[v1] RISC-V: Allow rounding mode control for RVV floating-point add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627060617.2250903-1-pan2.li@intel.com/mbox/"},{"id":113237,"url":"https://patchwork.plctlab.org/api/1.2/patches/113237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627061148.24656-1-xuli1@eswincomputing.com/","msgid":"<20230627061148.24656-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-27T06:11:48","name":"Extend streamer_mode_table size to MACHINE_MODE_BITSIZE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627061148.24656-1-xuli1@eswincomputing.com/mbox/"},{"id":113252,"url":"https://patchwork.plctlab.org/api/1.2/patches/113252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627064737.16257-1-juzhe.zhong@rivai.ai/","msgid":"<20230627064737.16257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-27T06:47:37","name":"[V4] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627064737.16257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113293,"url":"https://patchwork.plctlab.org/api/1.2/patches/113293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e12e9bb3-53ab-d5d4-fb86-d431e254153a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T08:13:19","name":"[v7] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e12e9bb3-53ab-d5d4-fb86-d431e254153a@linux.ibm.com/mbox/"},{"id":113329,"url":"https://patchwork.plctlab.org/api/1.2/patches/113329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627094533.C82C713462@imap2.suse-dmz.suse.de/","msgid":"<20230627094533.C82C713462@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-27T09:45:33","name":"Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627094533.C82C713462@imap2.suse-dmz.suse.de/mbox/"},{"id":113381,"url":"https://patchwork.plctlab.org/api/1.2/patches/113381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnqru1VGD-A_cWLoQKjX4UntDrMLw3D49GfWYDK7CYKdg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T12:01:18","name":"[SVE] Fold svdupq to VEC_PERM_EXPR if elements are not constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnqru1VGD-A_cWLoQKjX4UntDrMLw3D49GfWYDK7CYKdg@mail.gmail.com/mbox/"},{"id":113382,"url":"https://patchwork.plctlab.org/api/1.2/patches/113382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120745.3419192-1-poulhies@adacore.com/","msgid":"<20230627120745.3419192-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:07:45","name":"[COMMITTED] ada: Fix expanding container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120745.3419192-1-poulhies@adacore.com/mbox/"},{"id":113388,"url":"https://patchwork.plctlab.org/api/1.2/patches/113388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120758.3419680-1-poulhies@adacore.com/","msgid":"<20230627120758.3419680-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:07:58","name":"[COMMITTED] ada: Update printing container aggregates for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120758.3419680-1-poulhies@adacore.com/mbox/"},{"id":113383,"url":"https://patchwork.plctlab.org/api/1.2/patches/113383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120800.3419785-1-poulhies@adacore.com/","msgid":"<20230627120800.3419785-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:00","name":"[COMMITTED] ada: Plug another loophole in the handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120800.3419785-1-poulhies@adacore.com/mbox/"},{"id":113384,"url":"https://patchwork.plctlab.org/api/1.2/patches/113384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120801.3419890-1-poulhies@adacore.com/","msgid":"<20230627120801.3419890-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:01","name":"[COMMITTED] ada: Plug small loophole in the handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120801.3419890-1-poulhies@adacore.com/mbox/"},{"id":113389,"url":"https://patchwork.plctlab.org/api/1.2/patches/113389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120803.3419993-1-poulhies@adacore.com/","msgid":"<20230627120803.3419993-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:03","name":"[COMMITTED] ada: Fix too late finalization and secondary stack release in iterator loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120803.3419993-1-poulhies@adacore.com/mbox/"},{"id":113385,"url":"https://patchwork.plctlab.org/api/1.2/patches/113385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120805.3420102-1-poulhies@adacore.com/","msgid":"<20230627120805.3420102-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:05","name":"[COMMITTED] ada: Correct the contract of Ada.Text_IO.Get_Line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120805.3420102-1-poulhies@adacore.com/mbox/"},{"id":113392,"url":"https://patchwork.plctlab.org/api/1.2/patches/113392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120807.3420205-1-poulhies@adacore.com/","msgid":"<20230627120807.3420205-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:07","name":"[COMMITTED] ada: Fix incorrect handling of iterator specifications in recent change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120807.3420205-1-poulhies@adacore.com/mbox/"},{"id":113393,"url":"https://patchwork.plctlab.org/api/1.2/patches/113393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120809.3420308-1-poulhies@adacore.com/","msgid":"<20230627120809.3420308-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:09","name":"[COMMITTED] ada: Fix double finalization of case expression in concatenation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120809.3420308-1-poulhies@adacore.com/mbox/"},{"id":113394,"url":"https://patchwork.plctlab.org/api/1.2/patches/113394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120811.3420419-1-poulhies@adacore.com/","msgid":"<20230627120811.3420419-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:11","name":"[COMMITTED] ada: Make the identification of case expressions more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120811.3420419-1-poulhies@adacore.com/mbox/"},{"id":113395,"url":"https://patchwork.plctlab.org/api/1.2/patches/113395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120813.3420523-1-poulhies@adacore.com/","msgid":"<20230627120813.3420523-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:13","name":"[COMMITTED] ada: Fix bad interaction between inlining and thunk generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120813.3420523-1-poulhies@adacore.com/mbox/"},{"id":113396,"url":"https://patchwork.plctlab.org/api/1.2/patches/113396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120815.3420628-1-poulhies@adacore.com/","msgid":"<20230627120815.3420628-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:15","name":"[COMMITTED] ada: Fix build of GNAT tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120815.3420628-1-poulhies@adacore.com/mbox/"},{"id":113426,"url":"https://patchwork.plctlab.org/api/1.2/patches/113426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJrhyTWosoCcEs8V@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-27T13:19:05","name":"Enable ranger for ipa-prop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJrhyTWosoCcEs8V@kam.mff.cuni.cz/mbox/"},{"id":113438,"url":"https://patchwork.plctlab.org/api/1.2/patches/113438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627140924.33604-1-juzhe.zhong@rivai.ai/","msgid":"<20230627140924.33604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-27T14:09:24","name":"RISC-V: Fix bug of pre-calculated const vector mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627140924.33604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113490,"url":"https://patchwork.plctlab.org/api/1.2/patches/113490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAP2b4GPn7Ls+OOn-MeDss4tw1d3M3dRg85jdQN_5VHTE2pBvmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T16:05:40","name":"Basic asm blocks should always be volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAP2b4GPn7Ls+OOn-MeDss4tw1d3M3dRg85jdQN_5VHTE2pBvmg@mail.gmail.com/mbox/"},{"id":113516,"url":"https://patchwork.plctlab.org/api/1.2/patches/113516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com/","msgid":"<013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T17:22:14","name":"[x86] Add cbranchti4 pattern to i386.md (for -m32 compare_by_pieces).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com/mbox/"},{"id":113547,"url":"https://patchwork.plctlab.org/api/1.2/patches/113547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com/","msgid":"<020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T18:40:06","name":"[x86] Fix FAIL of gcc.target/i386/pr78794.c on ia32.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com/mbox/"},{"id":113549,"url":"https://patchwork.plctlab.org/api/1.2/patches/113549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com/","msgid":"<68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com>","list_archive_url":null,"date":"2023-06-27T18:52:01","name":"[V3,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com/mbox/"},{"id":113558,"url":"https://patchwork.plctlab.org/api/1.2/patches/113558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d9a92d$72080150$561803f0$@nextmovesoftware.com/","msgid":"<004001d9a92d$72080150$561803f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T19:27:41","name":"[x86] Tweak ix86_expand_int_compare to use PTEST for vector equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d9a92d$72080150$561803f0$@nextmovesoftware.com/mbox/"},{"id":113623,"url":"https://patchwork.plctlab.org/api/1.2/patches/113623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479E84A7B3B6A8145B4AE469127A@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T21:26:02","name":"Fix collection and processing of autoprofile data for target libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479E84A7B3B6A8145B4AE469127A@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":113649,"url":"https://patchwork.plctlab.org/api/1.2/patches/113649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628015944.112659-1-juzhe.zhong@rivai.ai/","msgid":"<20230628015944.112659-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T01:59:44","name":"[V2] RISC-V: Fix bug of pre-calculated const vector mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628015944.112659-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113676,"url":"https://patchwork.plctlab.org/api/1.2/patches/113676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628025925.135862-1-juzhe.zhong@rivai.ai/","msgid":"<20230628025925.135862-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T02:59:25","name":"RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628025925.135862-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113679,"url":"https://patchwork.plctlab.org/api/1.2/patches/113679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628031011.138575-1-juzhe.zhong@rivai.ai/","msgid":"<20230628031011.138575-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T03:10:11","name":"[V2] RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628031011.138575-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113680,"url":"https://patchwork.plctlab.org/api/1.2/patches/113680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032858.2614753-1-jason@redhat.com/","msgid":"<20230628032858.2614753-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T03:28:58","name":"[pushed] testsuite: std_list handling for { target c++26 }","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032858.2614753-1-jason@redhat.com/mbox/"},{"id":113681,"url":"https://patchwork.plctlab.org/api/1.2/patches/113681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032934.2615167-1-jason@redhat.com/","msgid":"<20230628032934.2615167-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T03:29:34","name":"[pushed] c++: C++26 constexpr cast from void* [PR110344]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032934.2615167-1-jason@redhat.com/mbox/"},{"id":113683,"url":"https://patchwork.plctlab.org/api/1.2/patches/113683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628041512.188243-1-juzhe.zhong@rivai.ai/","msgid":"<20230628041512.188243-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T04:15:12","name":"RISC-V: Support vfwmul.vv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628041512.188243-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113684,"url":"https://patchwork.plctlab.org/api/1.2/patches/113684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628044200.2636996-1-jason@redhat.com/","msgid":"<20230628044200.2636996-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T04:42:00","name":"[pushed] c++: inherited constructor attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628044200.2636996-1-jason@redhat.com/mbox/"},{"id":113685,"url":"https://patchwork.plctlab.org/api/1.2/patches/113685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628071605.203127-1-guojiufu@linux.ibm.com/","msgid":"<20230628071605.203127-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-28T07:16:05","name":"[V3] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628071605.203127-1-guojiufu@linux.ibm.com/mbox/"},{"id":113686,"url":"https://patchwork.plctlab.org/api/1.2/patches/113686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628072247.109808-1-apinski@marvell.com/","msgid":"<20230628072247.109808-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-28T07:22:48","name":"[COMMITTED] Add testcase for PR 110444","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628072247.109808-1-apinski@marvell.com/mbox/"},{"id":113690,"url":"https://patchwork.plctlab.org/api/1.2/patches/113690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628082707.256024-1-juzhe.zhong@rivai.ai/","msgid":"<20230628082707.256024-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T08:27:07","name":"RISC-V: Support vfwmacc combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628082707.256024-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113720,"url":"https://patchwork.plctlab.org/api/1.2/patches/113720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628091331.3400C3858416@sourceware.org/","msgid":"<20230628091331.3400C3858416@sourceware.org>","list_archive_url":null,"date":"2023-06-28T09:12:33","name":"tree-optimization/110443 - prevent SLP splat of gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628091331.3400C3858416@sourceware.org/mbox/"},{"id":113724,"url":"https://patchwork.plctlab.org/api/1.2/patches/113724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-1-christophe.lyon@linaro.org/","msgid":"<20230628092631.3173114-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-28T09:26:30","name":"[1/2,testsuite,arm] : Make nomve_fp_1.c require arm_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-1-christophe.lyon@linaro.org/mbox/"},{"id":113725,"url":"https://patchwork.plctlab.org/api/1.2/patches/113725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-2-christophe.lyon@linaro.org/","msgid":"<20230628092631.3173114-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-28T09:26:31","name":"[2/2,testsuite,arm] : Make mve_fp_fpu[12].c accept single or double precision FPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-2-christophe.lyon@linaro.org/mbox/"},{"id":113739,"url":"https://patchwork.plctlab.org/api/1.2/patches/113739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628094752.332289-1-juzhe.zhong@rivai.ai/","msgid":"<20230628094752.332289-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T09:47:52","name":"[V3] RISC-V: Fix bug of pre-calculated const vector mask for VNx1BI, VNx2BI and VNx4BI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628094752.332289-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113771,"url":"https://patchwork.plctlab.org/api/1.2/patches/113771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628102228.5F11E3857C51@sourceware.org/","msgid":"<20230628102228.5F11E3857C51@sourceware.org>","list_archive_url":null,"date":"2023-06-28T10:21:45","name":"tree-optimization/110434 - avoid ={v} {CLOBBER} from NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628102228.5F11E3857C51@sourceware.org/mbox/"},{"id":113789,"url":"https://patchwork.plctlab.org/api/1.2/patches/113789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJwM98bEqz9tZ8kZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T10:35:35","name":"[v2,RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJwM98bEqz9tZ8kZ@arm.com/mbox/"},{"id":113796,"url":"https://patchwork.plctlab.org/api/1.2/patches/113796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628105209.1879240-1-lili.cui@intel.com/","msgid":"<20230628105209.1879240-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-06-28T10:52:09","name":"x86: Update model values for Alderlake, Rocketlake and Raptorlake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628105209.1879240-1-lili.cui@intel.com/mbox/"},{"id":113809,"url":"https://patchwork.plctlab.org/api/1.2/patches/113809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz1fg764.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-28T11:25:39","name":"[testsuite] tolerate enabled but missing language frontends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz1fg764.fsf@lxoliva.fsfla.org/mbox/"},{"id":113822,"url":"https://patchwork.plctlab.org/api/1.2/patches/113822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628115559.116166-1-juzhe.zhong@rivai.ai/","msgid":"<20230628115559.116166-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T11:55:59","name":"RISC-V: Support vfwnmacc/vfwmsac/vfwnmsac combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628115559.116166-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113826,"url":"https://patchwork.plctlab.org/api/1.2/patches/113826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628123442.E814E385840E@sourceware.org/","msgid":"<20230628123442.E814E385840E@sourceware.org>","list_archive_url":null,"date":"2023-06-28T12:33:59","name":"tree-optimization/110451 - hoist invariant compare after interchange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628123442.E814E385840E@sourceware.org/mbox/"},{"id":113861,"url":"https://patchwork.plctlab.org/api/1.2/patches/113861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628131753.9B5413858C66@sourceware.org/","msgid":"<20230628131753.9B5413858C66@sourceware.org>","list_archive_url":null,"date":"2023-06-28T13:17:09","name":"middle-end/110452 - bad code generation with AVX512 mask splat","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628131753.9B5413858C66@sourceware.org/mbox/"},{"id":113880,"url":"https://patchwork.plctlab.org/api/1.2/patches/113880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4gTZ706kqK1RA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:41:21","name":"[1/19] middle-end ifcvt: Support bitfield lowering of multiple-exit loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4gTZ706kqK1RA@arm.com/mbox/"},{"id":113882,"url":"https://patchwork.plctlab.org/api/1.2/patches/113882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4msITSZSb83WR@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:41:46","name":"[2/19,front-end] C/C++ front-end: add pragma GCC novector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4msITSZSb83WR@arm.com/mbox/"},{"id":113886,"url":"https://patchwork.plctlab.org/api/1.2/patches/113886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5BcegL6zob2rC@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:43:33","name":"[4/19] middle-end: Fix scale_loop_frequencies segfault on multiple-exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5BcegL6zob2rC@arm.com/mbox/"},{"id":113888,"url":"https://patchwork.plctlab.org/api/1.2/patches/113888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5HgBu6Py9c9Z9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:43:58","name":"[5/19] middle-end: Enable bit-field vectorization to work correctly when we'\''re vectoring inside conds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5HgBu6Py9c9Z9@arm.com/mbox/"},{"id":113891,"url":"https://patchwork.plctlab.org/api/1.2/patches/113891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5OtpY61bsCZBR@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:44:26","name":"[6/19] middle-end: Don'\''t enter piecewise expansion if VF is not constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5OtpY61bsCZBR@arm.com/mbox/"},{"id":113894,"url":"https://patchwork.plctlab.org/api/1.2/patches/113894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5W5lP8SjYGPnX@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:44:59","name":"[7/19] middle-end: Refactor vectorizer loop conditionals and separate out IV to new variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5W5lP8SjYGPnX@arm.com/mbox/"},{"id":113896,"url":"https://patchwork.plctlab.org/api/1.2/patches/113896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5eojLVxxEsYpl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:45:30","name":"[8/19] middle-end: updated niters analysis to handle multiple exits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5eojLVxxEsYpl@arm.com/mbox/"},{"id":113898,"url":"https://patchwork.plctlab.org/api/1.2/patches/113898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5j6WOScQKJHZ5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:45:51","name":"[9/19] AArch64 middle-end: refactor vectorizable_comparison to make the main body re-usable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5j6WOScQKJHZ5@arm.com/mbox/"},{"id":113903,"url":"https://patchwork.plctlab.org/api/1.2/patches/113903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5qICwz9HKBa98@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:46:16","name":"[10/19] middle-end: implement vectorizable_early_break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5qICwz9HKBa98@arm.com/mbox/"},{"id":113901,"url":"https://patchwork.plctlab.org/api/1.2/patches/113901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5vgFBUoR6BH4m@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:46:38","name":"[11/19] middle-end: implement code motion for early break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5vgFBUoR6BH4m@arm.com/mbox/"},{"id":113904,"url":"https://patchwork.plctlab.org/api/1.2/patches/113904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw510c3/NpFrqbh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:03","name":"[12/19] middle-end: implement loop peeling and IV updates for early break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw510c3/NpFrqbh@arm.com/mbox/"},{"id":113906,"url":"https://patchwork.plctlab.org/api/1.2/patches/113906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw560TYdHXPFCP0@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:23","name":"[13/19] middle-end testsuite: un-xfail TSVC loops that check for exit control flow vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw560TYdHXPFCP0@arm.com/mbox/"},{"id":113908,"url":"https://patchwork.plctlab.org/api/1.2/patches/113908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6AK5y1ad3p4AB@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:44","name":"[14/19] middle-end testsuite: Add new tests for early break vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6AK5y1ad3p4AB@arm.com/mbox/"},{"id":113911,"url":"https://patchwork.plctlab.org/api/1.2/patches/113911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6GvvJJUSqmXhu@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:10","name":"[15/19] AArch64: Add implementation for vector cbranch for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6GvvJJUSqmXhu@arm.com/mbox/"},{"id":113912,"url":"https://patchwork.plctlab.org/api/1.2/patches/113912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6LhOUJ7LssONs@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:30","name":"[16/19] AArch64 Add optimization for vector != cbranch fed into compare with 0 for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6LhOUJ7LssONs@arm.com/mbox/"},{"id":113907,"url":"https://patchwork.plctlab.org/api/1.2/patches/113907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6SvUWBaXlpQoL@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:58","name":"[17/19] AArch64 Add optimization for vector cbranch combining SVE and Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6SvUWBaXlpQoL@arm.com/mbox/"},{"id":113910,"url":"https://patchwork.plctlab.org/api/1.2/patches/113910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6XxayCjJEfBTw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:49:19","name":"[18/19] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6XxayCjJEfBTw@arm.com/mbox/"},{"id":113909,"url":"https://patchwork.plctlab.org/api/1.2/patches/113909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6i/lre3vnMev/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:50:03","name":"[19/19] Arm: Add MVE cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6i/lre3vnMev/@arm.com/mbox/"},{"id":113913,"url":"https://patchwork.plctlab.org/api/1.2/patches/113913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628135614.846D938313B2@sourceware.org/","msgid":"<20230628135614.846D938313B2@sourceware.org>","list_archive_url":null,"date":"2023-06-28T13:54:53","name":"[vs] tree-optimization/110434 - avoid ={v} {CLOBBER} from NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628135614.846D938313B2@sourceware.org/mbox/"},{"id":113917,"url":"https://patchwork.plctlab.org/api/1.2/patches/113917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628140741.3045618-1-philipp.tomsich@vrull.eu/","msgid":"<20230628140741.3045618-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-06-28T14:07:41","name":"[COMMITTED,PR,110308] cprop_hardreg: fix ORIGINAL_REGNO/REG_ATTRS/REG_POINTER handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628140741.3045618-1-philipp.tomsich@vrull.eu/mbox/"},{"id":113937,"url":"https://patchwork.plctlab.org/api/1.2/patches/113937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bfgUqNRS2Sgffhm6t_pebpnF09YRVRrSGZLrG73tuA3w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T14:34:10","name":"[committed] final+varasm: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bfgUqNRS2Sgffhm6t_pebpnF09YRVRrSGZLrG73tuA3w@mail.gmail.com/mbox/"},{"id":113940,"url":"https://patchwork.plctlab.org/api/1.2/patches/113940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628150948.47843-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230628150948.47843-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-28T15:09:48","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628150948.47843-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113943,"url":"https://patchwork.plctlab.org/api/1.2/patches/113943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628151532.48412-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230628151532.48412-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-28T15:15:32","name":"[2/2] AArch64: New RTL for ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628151532.48412-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113964,"url":"https://patchwork.plctlab.org/api/1.2/patches/113964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155347.2144291-1-ibuclaw@gdcproject.org/","msgid":"<20230628155347.2144291-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-28T15:53:47","name":"[committed] d: Fix d_signed_or_unsigned_type is invoked for vector types (PR110193)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155347.2144291-1-ibuclaw@gdcproject.org/mbox/"},{"id":113966,"url":"https://patchwork.plctlab.org/api/1.2/patches/113966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155703.2948377-1-tromey@adacore.com/","msgid":"<20230628155703.2948377-1-tromey@adacore.com>","list_archive_url":null,"date":"2023-06-28T15:57:03","name":"Relax type-printer regexp in libstdc++ test suite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155703.2948377-1-tromey@adacore.com/mbox/"},{"id":113974,"url":"https://patchwork.plctlab.org/api/1.2/patches/113974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628165129.2429217-1-ppalka@redhat.com/","msgid":"<20230628165129.2429217-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-28T16:51:29","name":"c++: cache partial template specialization selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628165129.2429217-1-ppalka@redhat.com/mbox/"},{"id":114002,"url":"https://patchwork.plctlab.org/api/1.2/patches/114002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628185357.2326251-1-ibuclaw@gdcproject.org/","msgid":"<20230628185357.2326251-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-28T18:53:57","name":"[committed] d: Fix wrong code-gen when returning structs by value.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628185357.2326251-1-ibuclaw@gdcproject.org/mbox/"},{"id":114050,"url":"https://patchwork.plctlab.org/api/1.2/patches/114050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d4716674-f97e-4e14-9de2-1b8cedc7f3e0-1687985065511@3c-app-gmx-bs03/","msgid":"","list_archive_url":null,"date":"2023-06-28T20:44:25","name":"[part3,committed] Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d4716674-f97e-4e14-9de2-1b8cedc7f3e0-1687985065511@3c-app-gmx-bs03/mbox/"},{"id":114056,"url":"https://patchwork.plctlab.org/api/1.2/patches/114056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJyhfQRGFnzqdjFl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-28T21:09:17","name":"Enable early inlining into always_inline functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJyhfQRGFnzqdjFl@kam.mff.cuni.cz/mbox/"},{"id":114076,"url":"https://patchwork.plctlab.org/api/1.2/patches/114076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212228.013E720418@pchp3.se.axis.com/","msgid":"<20230628212228.013E720418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-28T21:22:27","name":"[committed] CRIS: Don'\''t apply PATTERN to insn before validation (PR 110144)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212228.013E720418@pchp3.se.axis.com/mbox/"},{"id":114077,"url":"https://patchwork.plctlab.org/api/1.2/patches/114077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212324.31DF620418@pchp3.se.axis.com/","msgid":"<20230628212324.31DF620418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-28T21:23:24","name":"[committed] testsuite: check_effective_target_lra: CRIS is LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212324.31DF620418@pchp3.se.axis.com/mbox/"},{"id":114079,"url":"https://patchwork.plctlab.org/api/1.2/patches/114079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8f76zh7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T21:36:36","name":"A couple of va_gc_atomic tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8f76zh7.fsf@arm.com/mbox/"},{"id":114119,"url":"https://patchwork.plctlab.org/api/1.2/patches/114119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014014.3676175-1-pan2.li@intel.com/","msgid":"<20230629014014.3676175-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-29T01:40:14","name":"[v1] RISC-V: Support vfadd static rounding mode by mode switching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014014.3676175-1-pan2.li@intel.com/mbox/"},{"id":114121,"url":"https://patchwork.plctlab.org/api/1.2/patches/114121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014949.1995621-1-lili.cui@intel.com/","msgid":"<20230629014949.1995621-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-06-29T01:49:49","name":"PR gcc/110148:Avoid adding loop-carried ops to long chains","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014949.1995621-1-lili.cui@intel.com/mbox/"},{"id":114136,"url":"https://patchwork.plctlab.org/api/1.2/patches/114136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629025105.1993837-1-lin1.hu@intel.com/","msgid":"<20230629025105.1993837-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-06-29T02:51:05","name":"i386: refactor macros.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629025105.1993837-1-lin1.hu@intel.com/mbox/"},{"id":114166,"url":"https://patchwork.plctlab.org/api/1.2/patches/114166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629060054.617743-1-pan2.li@intel.com/","msgid":"<20230629060054.617743-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-29T06:00:54","name":"[v1] RISC-V: Refactor vxrm_mode attr for type attr equal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629060054.617743-1-pan2.li@intel.com/mbox/"},{"id":114210,"url":"https://patchwork.plctlab.org/api/1.2/patches/114210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081301.965F13858C74@sourceware.org/","msgid":"<20230629081301.965F13858C74@sourceware.org>","list_archive_url":null,"date":"2023-06-29T08:12:18","name":"c/110454 - ICE with bogus TYPE_PRECISION use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081301.965F13858C74@sourceware.org/mbox/"},{"id":114211,"url":"https://patchwork.plctlab.org/api/1.2/patches/114211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081313.797F83858402@sourceware.org/","msgid":"<20230629081313.797F83858402@sourceware.org>","list_archive_url":null,"date":"2023-06-29T08:12:30","name":"middle-end/110461 - pattern applying wrongly to vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081313.797F83858402@sourceware.org/mbox/"},{"id":114263,"url":"https://patchwork.plctlab.org/api/1.2/patches/114263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629095708.BEB40385840A@sourceware.org/","msgid":"<20230629095708.BEB40385840A@sourceware.org>","list_archive_url":null,"date":"2023-06-29T09:56:14","name":"tree-optimization/110460 - fend off vector types from vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629095708.BEB40385840A@sourceware.org/mbox/"},{"id":114273,"url":"https://patchwork.plctlab.org/api/1.2/patches/114273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com/","msgid":"<022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-29T10:49:30","name":"[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com/mbox/"},{"id":114299,"url":"https://patchwork.plctlab.org/api/1.2/patches/114299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629122858.91689385840D@sourceware.org/","msgid":"<20230629122858.91689385840D@sourceware.org>","list_archive_url":null,"date":"2023-06-29T12:28:12","name":"[RFC] target/110456 - avoid loop masking with zero distance dependences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629122858.91689385840D@sourceware.org/mbox/"},{"id":114304,"url":"https://patchwork.plctlab.org/api/1.2/patches/114304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629125430.17021-1-chenglulu@loongson.cn/","msgid":"<20230629125430.17021-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-29T12:54:30","name":"LoongArch: Fix bug in loongarch_emit_stack_tie [PR110484].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629125430.17021-1-chenglulu@loongson.cn/mbox/"},{"id":114337,"url":"https://patchwork.plctlab.org/api/1.2/patches/114337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152009.607619-1-jwakely@redhat.com/","msgid":"<20230629152009.607619-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:19:15","name":"[committed] libstdc++: Do not use off64_t in calls to copy_file_range [PR110462]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152009.607619-1-jwakely@redhat.com/mbox/"},{"id":114333,"url":"https://patchwork.plctlab.org/api/1.2/patches/114333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152130.607676-1-jwakely@redhat.com/","msgid":"<20230629152130.607676-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:20:10","name":"[committed] libstdc++: Fix src/c++20/tzdb.cc for non-constexpr std::mutex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152130.607676-1-jwakely@redhat.com/mbox/"},{"id":114335,"url":"https://patchwork.plctlab.org/api/1.2/patches/114335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152247.3838584-1-ppalka@redhat.com/","msgid":"<20230629152247.3838584-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:22:47","name":"c++: NSDMI instantiation during overload resolution [PR110468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152247.3838584-1-ppalka@redhat.com/mbox/"},{"id":114336,"url":"https://patchwork.plctlab.org/api/1.2/patches/114336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152255.3838604-1-ppalka@redhat.com/","msgid":"<20230629152255.3838604-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:22:55","name":"c++: unpropagated CONSTRUCTOR_MUTABLE_POISON [PR110463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152255.3838604-1-ppalka@redhat.com/mbox/"},{"id":114338,"url":"https://patchwork.plctlab.org/api/1.2/patches/114338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b8V8ug_NZ8C9LSGQYXnmcqLif+MHZoma5xcf-8J0VAOg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-29T15:32:43","name":"[committed] cselib+expr+bitmap: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b8V8ug_NZ8C9LSGQYXnmcqLif+MHZoma5xcf-8J0VAOg@mail.gmail.com/mbox/"},{"id":114367,"url":"https://patchwork.plctlab.org/api/1.2/patches/114367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-1-aldyh@redhat.com/","msgid":"<20230629164833.495003-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-06-29T16:48:33","name":"[COMMITTED] Tidy up the range normalization code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-1-aldyh@redhat.com/mbox/"},{"id":114366,"url":"https://patchwork.plctlab.org/api/1.2/patches/114366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-2-aldyh@redhat.com/","msgid":"<20230629164833.495003-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-06-29T16:48:34","name":"[COMMITTED] Move maybe_set_nonzero_bits() to its only user.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-2-aldyh@redhat.com/mbox/"},{"id":114396,"url":"https://patchwork.plctlab.org/api/1.2/patches/114396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629190330.71131-1-polacek@redhat.com/","msgid":"<20230629190330.71131-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-29T19:03:30","name":"testsuite: Use -fno-report-bug in gcc.dg/plugin/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629190330.71131-1-polacek@redhat.com/mbox/"},{"id":114397,"url":"https://patchwork.plctlab.org/api/1.2/patches/114397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8f6ulzg.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-29T19:06:27","name":"[v2] Control flow redundancy hardening","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8f6ulzg.fsf@lxoliva.fsfla.org/mbox/"},{"id":114419,"url":"https://patchwork.plctlab.org/api/1.2/patches/114419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629200120.169263-1-polacek@redhat.com/","msgid":"<20230629200120.169263-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-29T20:01:20","name":"i386: add -fno-stack-protector to two tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629200120.169263-1-polacek@redhat.com/mbox/"},{"id":114435,"url":"https://patchwork.plctlab.org/api/1.2/patches/114435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ3uUW7I2HcSq8Ml@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-29T20:49:21","name":"Extend ipa-fnsummary to skip __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ3uUW7I2HcSq8Ml@kam.mff.cuni.cz/mbox/"},{"id":114480,"url":"https://patchwork.plctlab.org/api/1.2/patches/114480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com/","msgid":"<2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-29T21:36:07","name":"[ver,3] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com/mbox/"},{"id":114530,"url":"https://patchwork.plctlab.org/api/1.2/patches/114530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-2-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:09","name":"[v1,1/6] LoongArch: Added Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-2-panchenghui@loongson.cn/mbox/"},{"id":114535,"url":"https://patchwork.plctlab.org/api/1.2/patches/114535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-3-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:10","name":"[v1,2/6] LoongArch: Added Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-3-panchenghui@loongson.cn/mbox/"},{"id":114531,"url":"https://patchwork.plctlab.org/api/1.2/patches/114531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-4-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:11","name":"[v1,3/6] LoongArch: Added Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-4-panchenghui@loongson.cn/mbox/"},{"id":114534,"url":"https://patchwork.plctlab.org/api/1.2/patches/114534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-5-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:12","name":"[v1,4/6] LoongArch: Added Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-5-panchenghui@loongson.cn/mbox/"},{"id":114532,"url":"https://patchwork.plctlab.org/api/1.2/patches/114532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-6-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:13","name":"[v1,5/6] LoongArch: Added Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-6-panchenghui@loongson.cn/mbox/"},{"id":114536,"url":"https://patchwork.plctlab.org/api/1.2/patches/114536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-7-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:14","name":"[v1,6/6] LoongArch: Added Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-7-panchenghui@loongson.cn/mbox/"},{"id":114537,"url":"https://patchwork.plctlab.org/api/1.2/patches/114537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630023618.3898001-1-juzhe.zhong@rivai.ai/","msgid":"<20230630023618.3898001-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-30T02:36:18","name":"[V2] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630023618.3898001-1-juzhe.zhong@rivai.ai/mbox/"},{"id":114547,"url":"https://patchwork.plctlab.org/api/1.2/patches/114547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630034847.0D200203F8@pchp3.se.axis.com/","msgid":"<20230630034847.0D200203F8@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-30T03:48:47","name":"PR108672 re-fixed after [PATCH] libstdc++: Synchronize PSTL with upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630034847.0D200203F8@pchp3.se.axis.com/mbox/"},{"id":114560,"url":"https://patchwork.plctlab.org/api/1.2/patches/114560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com/","msgid":"<743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:20:42","name":"tree.h: Hide wi::from_mpz from GENERATOR_FILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com/mbox/"},{"id":114562,"url":"https://patchwork.plctlab.org/api/1.2/patches/114562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB34844532CF2CD395DE99B07E912AA@MN0PR21MB3484.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T05:27:55","name":"Collect both user and kernel events for autofdo tests and autoprofiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB34844532CF2CD395DE99B07E912AA@MN0PR21MB3484.namprd21.prod.outlook.com/mbox/"},{"id":114564,"url":"https://patchwork.plctlab.org/api/1.2/patches/114564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com/","msgid":"<7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:37:53","name":"[1/3] targhooks: Extend legitimate_address_p with code_helper [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com/mbox/"},{"id":114569,"url":"https://patchwork.plctlab.org/api/1.2/patches/114569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com/","msgid":"<10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:46:40","name":"[2/3] ivopts: Call valid_mem_ref_p with code_helper [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com/mbox/"},{"id":114572,"url":"https://patchwork.plctlab.org/api/1.2/patches/114572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com/","msgid":"<62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:57:13","name":"[3/3] rs6000: Teach legitimate_address_p about LEN_{LOAD, STORE} [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com/mbox/"},{"id":114590,"url":"https://patchwork.plctlab.org/api/1.2/patches/114590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630063521.796C5138F8@imap2.suse-dmz.suse.de/","msgid":"<20230630063521.796C5138F8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-30T06:35:19","name":"tree-optimization/110381 - fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630063521.796C5138F8@imap2.suse-dmz.suse.de/mbox/"},{"id":114601,"url":"https://patchwork.plctlab.org/api/1.2/patches/114601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com/","msgid":"<016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-30T07:29:14","name":"[x86] Add STV support for DImode and SImode rotations by constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com/mbox/"},{"id":114610,"url":"https://patchwork.plctlab.org/api/1.2/patches/114610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8f5uzob.fsf@euler.schwinge.homeip.net/","msgid":"<87v8f5uzob.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-30T08:23:00","name":"LTO: Capture '\''lto_file_decl_data *file_data'\'' in '\''class lto_input_block'\'' (was: [PATCH v3] Streamer: Fix out of range memory access of machine mode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8f5uzob.fsf@euler.schwinge.homeip.net/mbox/"},{"id":114611,"url":"https://patchwork.plctlab.org/api/1.2/patches/114611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630082611.112557-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230630082611.112557-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-30T08:26:11","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630082611.112557-1-oluwatamilore.adebayo@arm.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-06/mbox/"},{"id":25,"url":"https://patchwork.plctlab.org/api/1.2/bundles/25/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-07/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-07","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":114788,"url":"https://patchwork.plctlab.org/api/1.2/patches/114788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-1-dmalcolm@redhat.com/","msgid":"<20230630155409.183039-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-30T15:54:08","name":"[pushed,1/2] jit: avoid using __vector in testcase [PR110466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-1-dmalcolm@redhat.com/mbox/"},{"id":114789,"url":"https://patchwork.plctlab.org/api/1.2/patches/114789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-2-dmalcolm@redhat.com/","msgid":"<20230630155409.183039-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-30T15:54:09","name":"[pushed,2/2] jit.exp: handle dwarf version mismatch in jit-check-debug-info [PR110466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-2-dmalcolm@redhat.com/mbox/"},{"id":114858,"url":"https://patchwork.plctlab.org/api/1.2/patches/114858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55d42cc902dfba9a0ae5fd5f670c535afb3f24e.1688151381.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:28","name":"[1/7] Fix up merge/formatting errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55d42cc902dfba9a0ae5fd5f670c535afb3f24e.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114859,"url":"https://patchwork.plctlab.org/api/1.2/patches/114859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6d794fe1b6225f56be6a89e1df37ed4eebfa5a7.1688151381.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:29","name":"[2/7] OpenMP: OpenMP 5.2 semantics for pointers with unmapped target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6d794fe1b6225f56be6a89e1df37ed4eebfa5a7.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114864,"url":"https://patchwork.plctlab.org/api/1.2/patches/114864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com/","msgid":"<32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:30","name":"[3/7] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114861,"url":"https://patchwork.plctlab.org/api/1.2/patches/114861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com/","msgid":"<61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:31","name":"[4/7] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114866,"url":"https://patchwork.plctlab.org/api/1.2/patches/114866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com/","msgid":"<1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:32","name":"[5/7] OpenMP: lvalue parsing for map clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114867,"url":"https://patchwork.plctlab.org/api/1.2/patches/114867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6878a9a33a285142f5314d8c5ddba744eccae3b.1688151382.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:33","name":"[6/7] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6878a9a33a285142f5314d8c5ddba744eccae3b.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114865,"url":"https://patchwork.plctlab.org/api/1.2/patches/114865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com/","msgid":"<5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:34","name":"[7/7] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114868,"url":"https://patchwork.plctlab.org/api/1.2/patches/114868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com/","msgid":"<57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T19:26:35","name":"[V4,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com/mbox/"},{"id":114873,"url":"https://patchwork.plctlab.org/api/1.2/patches/114873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630201637.766018-1-jwakely@redhat.com/","msgid":"<20230630201637.766018-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-30T20:15:54","name":"libstdc++: Enable OpenMP 5.0 pragmas in PSTL headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630201637.766018-1-jwakely@redhat.com/mbox/"},{"id":114910,"url":"https://patchwork.plctlab.org/api/1.2/patches/114910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630225914.620150-1-lhyatt@gmail.com/","msgid":"<20230630225914.620150-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-06-30T22:59:14","name":"c-family: Implement pragma_lex () for preprocess-only mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630225914.620150-1-lhyatt@gmail.com/mbox/"},{"id":114925,"url":"https://patchwork.plctlab.org/api/1.2/patches/114925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630233315.212700-1-vineetg@rivosinc.com/","msgid":"<20230630233315.212700-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-30T23:33:15","name":"RISC-V: improve codegen for repeating large constants [3]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630233315.212700-1-vineetg@rivosinc.com/mbox/"},{"id":114932,"url":"https://patchwork.plctlab.org/api/1.2/patches/114932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39733dc4b96c263db0e75b69c293e2654e2b7e5.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-01T00:58:39","name":"[ver,2] rs6000, __builtin_set_fpscr_rn add retrun value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39733dc4b96c263db0e75b69c293e2654e2b7e5.camel@us.ibm.com/mbox/"},{"id":114941,"url":"https://patchwork.plctlab.org/api/1.2/patches/114941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+dYsxW2YQrtz+A@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:28:34","name":"[v3,1/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+dYsxW2YQrtz+A@Thaum.localdomain/mbox/"},{"id":114942,"url":"https://patchwork.plctlab.org/api/1.2/patches/114942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+duCoetIZP3/mg@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:30:00","name":"[v3,2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+duCoetIZP3/mg@Thaum.localdomain/mbox/"},{"id":114943,"url":"https://patchwork.plctlab.org/api/1.2/patches/114943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+d3TmY/AADod0X@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:30:37","name":"[v3,3/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+d3TmY/AADod0X@Thaum.localdomain/mbox/"},{"id":114959,"url":"https://patchwork.plctlab.org/api/1.2/patches/114959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67OcE1s+SkHUjyaSa0NxziY68xmzoXtoj5BEfEVmxLifPw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-01T05:21:25","name":"lto: Bypass assembler when generating LTO object files. & libiberty: lto: Addition of .symtab in elf file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67OcE1s+SkHUjyaSa0NxziY68xmzoXtoj5BEfEVmxLifPw@mail.gmail.com/mbox/"},{"id":115012,"url":"https://patchwork.plctlab.org/api/1.2/patches/115012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-1-apinski@marvell.com/","msgid":"<20230701082216.299104-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T08:22:15","name":"[1/2] Fix PR 110487: invalid signed boolean value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-1-apinski@marvell.com/mbox/"},{"id":115013,"url":"https://patchwork.plctlab.org/api/1.2/patches/115013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-2-apinski@marvell.com/","msgid":"<20230701082216.299104-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T08:22:16","name":"[2/2] PR 110487: `(a !=/== CST1 ? CST2 : CST3)` pattern for type safety","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-2-apinski@marvell.com/mbox/"},{"id":115020,"url":"https://patchwork.plctlab.org/api/1.2/patches/115020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-2-manolis.tsamis@vrull.eu/","msgid":"<20230701092413.2488806-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-01T09:24:12","name":"[1/2] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-2-manolis.tsamis@vrull.eu/mbox/"},{"id":115021,"url":"https://patchwork.plctlab.org/api/1.2/patches/115021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-3-manolis.tsamis@vrull.eu/","msgid":"<20230701092413.2488806-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-01T09:24:13","name":"[2/2] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-3-manolis.tsamis@vrull.eu/mbox/"},{"id":115028,"url":"https://patchwork.plctlab.org/api/1.2/patches/115028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKAJV9rjbWo3XFWb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-01T11:09:11","name":"Fix profile updates in copy-header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKAJV9rjbWo3XFWb@kam.mff.cuni.cz/mbox/"},{"id":115041,"url":"https://patchwork.plctlab.org/api/1.2/patches/115041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701141410.2891380-1-ibuclaw@gdcproject.org/","msgid":"<20230701141410.2891380-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T14:14:10","name":"[GCC,11,committed] d: Fix ICE in setValue, at d/dmd/dinterpret.c:7013","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701141410.2891380-1-ibuclaw@gdcproject.org/mbox/"},{"id":115050,"url":"https://patchwork.plctlab.org/api/1.2/patches/115050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701155556.2966102-1-ibuclaw@gdcproject.org/","msgid":"<20230701155556.2966102-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T15:55:56","name":"[committed] d: Don'\''t generate code that throws exceptions when compiling with `-fno-exceptions'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701155556.2966102-1-ibuclaw@gdcproject.org/mbox/"},{"id":115052,"url":"https://patchwork.plctlab.org/api/1.2/patches/115052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701161831.93249-1-iain@sandoe.co.uk/","msgid":"<20230701161831.93249-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-01T16:18:31","name":"[pushed] libphobos, testsuite: Disable forkgc2 on Darwin [PR103944]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701161831.93249-1-iain@sandoe.co.uk/mbox/"},{"id":115055,"url":"https://patchwork.plctlab.org/api/1.2/patches/115055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp/","msgid":"<6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp>","list_archive_url":null,"date":"2023-07-01T17:19:03","name":"[1/2] xtensa: Fix missing mode warning in \"*eqne_INT_MIN\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp/mbox/"},{"id":115056,"url":"https://patchwork.plctlab.org/api/1.2/patches/115056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9dd8d5c-14d2-cfb8-d0e1-35b14a8eb4cb@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-07-01T17:20:08","name":"[2/2] xtensa: The use of CLAMPS instruction also requires TARGET_MINMAX, as well as TARGET_CLAMPS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9dd8d5c-14d2-cfb8-d0e1-35b14a8eb4cb@yahoo.co.jp/mbox/"},{"id":115060,"url":"https://patchwork.plctlab.org/api/1.2/patches/115060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701212840.330022-1-apinski@marvell.com/","msgid":"<20230701212840.330022-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T21:28:40","name":"Use chain_next on eh_landing_pad_d for GTY (PR middle-end/110510)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701212840.330022-1-apinski@marvell.com/mbox/"},{"id":115064,"url":"https://patchwork.plctlab.org/api/1.2/patches/115064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701232147.3265358-1-ibuclaw@gdcproject.org/","msgid":"<20230701232147.3265358-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T23:21:47","name":"[committed] d: Fix accesses of immutable arrays using constant index still bounds checked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701232147.3265358-1-ibuclaw@gdcproject.org/mbox/"},{"id":115067,"url":"https://patchwork.plctlab.org/api/1.2/patches/115067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702014404.3398624-1-ibuclaw@gdcproject.org/","msgid":"<20230702014404.3398624-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T01:44:04","name":"[committed] d: Fix core.volatile.volatileLoad discarded if result is unused","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702014404.3398624-1-ibuclaw@gdcproject.org/mbox/"},{"id":115079,"url":"https://patchwork.plctlab.org/api/1.2/patches/115079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702102242.56435-1-iain@sandoe.co.uk/","msgid":"<20230702102242.56435-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-02T10:22:42","name":"libphobos: Handle Darwin Arm and AArch64 in fibre context asm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702102242.56435-1-iain@sandoe.co.uk/mbox/"},{"id":115094,"url":"https://patchwork.plctlab.org/api/1.2/patches/115094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702135601.3632320-1-ibuclaw@gdcproject.org/","msgid":"<20230702135601.3632320-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T13:56:01","name":"[committed] d: Add testcase from PR108962","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702135601.3632320-1-ibuclaw@gdcproject.org/mbox/"},{"id":115095,"url":"https://patchwork.plctlab.org/api/1.2/patches/115095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702142641.21363-1-iain@sandoe.co.uk/","msgid":"<20230702142641.21363-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-02T14:26:41","name":"[pushed] Darwin, Objective-C: Support -fconstant-cfstrings [PR108743].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702142641.21363-1-iain@sandoe.co.uk/mbox/"},{"id":115099,"url":"https://patchwork.plctlab.org/api/1.2/patches/115099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKGPdiAZUtNk3yqa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-02T14:53:42","name":"tree-ssa-math-opts: Fix up ICE in match_uaddc_usubc [PR110508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKGPdiAZUtNk3yqa@tucnak/mbox/"},{"id":115106,"url":"https://patchwork.plctlab.org/api/1.2/patches/115106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-3-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:09","name":"[v7,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-3-ben.boeckel@kitware.com/mbox/"},{"id":115102,"url":"https://patchwork.plctlab.org/api/1.2/patches/115102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-4-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:10","name":"[v7,3/4] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-4-ben.boeckel@kitware.com/mbox/"},{"id":115104,"url":"https://patchwork.plctlab.org/api/1.2/patches/115104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-5-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:11","name":"[v7,4/4] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-5-ben.boeckel@kitware.com/mbox/"},{"id":115150,"url":"https://patchwork.plctlab.org/api/1.2/patches/115150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe43f0e9-8051-4903-8088-e099f9f12528-1688330335546@3c-app-gmx-bs45/","msgid":"","list_archive_url":null,"date":"2023-07-02T20:38:55","name":"Fortran: fixes for procedures with ALLOCATABLE,INTENT(OUT) arguments [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe43f0e9-8051-4903-8088-e099f9f12528-1688330335546@3c-app-gmx-bs45/mbox/"},{"id":115161,"url":"https://patchwork.plctlab.org/api/1.2/patches/115161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702232339.3957011-1-ibuclaw@gdcproject.org/","msgid":"<20230702232339.3957011-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T23:23:39","name":"[committed] d: Fix testcase failure of gdc.dg/Wbuiltin_declaration_mismatch2.d.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702232339.3957011-1-ibuclaw@gdcproject.org/mbox/"},{"id":115163,"url":"https://patchwork.plctlab.org/api/1.2/patches/115163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703011753.18876-1-kmatsui@cs.washington.edu/","msgid":"<20230703011753.18876-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T01:17:53","name":"libstdc++: use __is_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703011753.18876-1-kmatsui@cs.washington.edu/mbox/"},{"id":115166,"url":"https://patchwork.plctlab.org/api/1.2/patches/115166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703021500.165265-1-juzhe.zhong@rivai.ai/","msgid":"<20230703021500.165265-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T02:15:00","name":"[V6] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703021500.165265-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115172,"url":"https://patchwork.plctlab.org/api/1.2/patches/115172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com/","msgid":"<90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T02:57:58","name":"[2/9,v2] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER && gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com/mbox/"},{"id":115173,"url":"https://patchwork.plctlab.org/api/1.2/patches/115173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com/","msgid":"<06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T02:58:30","name":"[3/9,v2] vect: Adjust vectorizable_load costing on VMAT_INVARIANT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com/mbox/"},{"id":115174,"url":"https://patchwork.plctlab.org/api/1.2/patches/115174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0313117-cfd0-ff85-09eb-25cc5cf35dee@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T03:01:04","name":"[5/9,v2] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0313117-cfd0-ff85-09eb-25cc5cf35dee@linux.ibm.com/mbox/"},{"id":115176,"url":"https://patchwork.plctlab.org/api/1.2/patches/115176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com/","msgid":"<67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T03:06:27","name":"[9/9,v2] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com/mbox/"},{"id":115185,"url":"https://patchwork.plctlab.org/api/1.2/patches/115185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703040744.258283-1-juzhe.zhong@rivai.ai/","msgid":"<20230703040744.258283-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T04:07:44","name":"Middle-end: Change order of LEN_MASK_LOAD/LEN_MASK_STORE arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703040744.258283-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115197,"url":"https://patchwork.plctlab.org/api/1.2/patches/115197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com/","msgid":"<08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T06:30:01","name":"[rs6000] Extract the element in dword0 by mfvsrd and shift/mask [PR110331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com/mbox/"},{"id":115199,"url":"https://patchwork.plctlab.org/api/1.2/patches/115199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072307.9E9D73858438@sourceware.org/","msgid":"<20230703072307.9E9D73858438@sourceware.org>","list_archive_url":null,"date":"2023-07-03T07:22:23","name":"tree-optimization/110506 - bogus non-zero mask in CCP for vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072307.9E9D73858438@sourceware.org/mbox/"},{"id":115200,"url":"https://patchwork.plctlab.org/api/1.2/patches/115200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072403.17BB83858C1F@sourceware.org/","msgid":"<20230703072403.17BB83858C1F@sourceware.org>","list_archive_url":null,"date":"2023-07-03T07:22:36","name":"tree-optimization/110506 - ICE in pattern recog with TYPE_PRECISION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072403.17BB83858C1F@sourceware.org/mbox/"},{"id":115211,"url":"https://patchwork.plctlab.org/api/1.2/patches/115211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703080805.1297008-1-pan2.li@intel.com/","msgid":"<20230703080805.1297008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-03T08:08:05","name":"[v1] RISC-V: Fix one typo of FRM dynamic definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703080805.1297008-1-pan2.li@intel.com/mbox/"},{"id":115234,"url":"https://patchwork.plctlab.org/api/1.2/patches/115234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs65uzvw.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T09:07:31","name":"aarch64: Fix vector-to-vector vec_extract","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs65uzvw.fsf@arm.com/mbox/"},{"id":115236,"url":"https://patchwork.plctlab.org/api/1.2/patches/115236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091026.305277-1-juzhe.zhong@rivai.ai/","msgid":"<20230703091026.305277-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T09:10:26","name":"[V2] Middle-end: Change order of LEN_MASK_LOAD/LEN_MASK_STORE arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091026.305277-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115237,"url":"https://patchwork.plctlab.org/api/1.2/patches/115237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091141.34764-1-kmatsui@cs.washington.edu/","msgid":"<20230703091141.34764-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:11:40","name":"[1/2] c++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091141.34764-1-kmatsui@cs.washington.edu/mbox/"},{"id":115238,"url":"https://patchwork.plctlab.org/api/1.2/patches/115238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-1-kmatsui@cs.washington.edu/","msgid":"<20230703091355.35269-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:13:54","name":"[1/2] c++, libstdc++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-1-kmatsui@cs.washington.edu/mbox/"},{"id":115239,"url":"https://patchwork.plctlab.org/api/1.2/patches/115239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-2-kmatsui@cs.washington.edu/","msgid":"<20230703091355.35269-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:13:55","name":"[2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-2-kmatsui@cs.washington.edu/mbox/"},{"id":115288,"url":"https://patchwork.plctlab.org/api/1.2/patches/115288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5104f927-d7db-c148-911c-0ca8e783a609@gmail.com/","msgid":"<5104f927-d7db-c148-911c-0ca8e783a609@gmail.com>","list_archive_url":null,"date":"2023-07-03T10:19:22","name":"gimple-isel: Recognize vec_extract pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5104f927-d7db-c148-911c-0ca8e783a609@gmail.com/mbox/"},{"id":115307,"url":"https://patchwork.plctlab.org/api/1.2/patches/115307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703105716.2909864-1-pan2.li@intel.com/","msgid":"<20230703105716.2909864-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-03T10:57:16","name":"[v1] RISC-V: Fix one typo for emit_mode_set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703105716.2909864-1-pan2.li@intel.com/mbox/"},{"id":115311,"url":"https://patchwork.plctlab.org/api/1.2/patches/115311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110742.3134160-1-christoph.muellner@vrull.eu/","msgid":"<20230703110742.3134160-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-03T11:07:42","name":"[v2] RISC-V: Add support for vector crypto extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110742.3134160-1-christoph.muellner@vrull.eu/mbox/"},{"id":115313,"url":"https://patchwork.plctlab.org/api/1.2/patches/115313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110912.15311-1-juzhe.zhong@rivai.ai/","msgid":"<20230703110912.15311-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T11:09:12","name":"[V7] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110912.15311-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115330,"url":"https://patchwork.plctlab.org/api/1.2/patches/115330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703122045.67AB53858D28@sourceware.org/","msgid":"<20230703122045.67AB53858D28@sourceware.org>","list_archive_url":null,"date":"2023-07-03T12:20:00","name":"middle-end/110495 - avoid associating constants with (VL) vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703122045.67AB53858D28@sourceware.org/mbox/"},{"id":115334,"url":"https://patchwork.plctlab.org/api/1.2/patches/115334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703123342.2341414-1-juzhe.zhong@rivai.ai/","msgid":"<20230703123342.2341414-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T12:33:42","name":"[VSETVL,PASS] RISC-V: Optimize local AVL propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703123342.2341414-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115344,"url":"https://patchwork.plctlab.org/api/1.2/patches/115344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703125655.35E62385700B@sourceware.org/","msgid":"<20230703125655.35E62385700B@sourceware.org>","list_archive_url":null,"date":"2023-07-03T12:56:08","name":"tree-optimization/110310 - move vector epilogue disabling to analysis phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703125655.35E62385700B@sourceware.org/mbox/"},{"id":115359,"url":"https://patchwork.plctlab.org/api/1.2/patches/115359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132700.880979-1-poulhies@adacore.com/","msgid":"<20230703132700.880979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:00","name":"[COMMITTED] ada: Fix small inaccuracy in implementation of B.3.3(20/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132700.880979-1-poulhies@adacore.com/mbox/"},{"id":115360,"url":"https://patchwork.plctlab.org/api/1.2/patches/115360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132712.881166-1-poulhies@adacore.com/","msgid":"<20230703132712.881166-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:12","name":"[COMMITTED] ada: Fix discrepancy in expansion of untagged record equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132712.881166-1-poulhies@adacore.com/mbox/"},{"id":115361,"url":"https://patchwork.plctlab.org/api/1.2/patches/115361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132714.881227-1-poulhies@adacore.com/","msgid":"<20230703132714.881227-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:14","name":"[COMMITTED] ada: Fix renaming of predefined equality operator for unchecked union types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132714.881227-1-poulhies@adacore.com/mbox/"},{"id":115393,"url":"https://patchwork.plctlab.org/api/1.2/patches/115393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZEF8Z5fuS-6WjLssJvEPRy8bbyaXT_YFPqHTBMEmGtRQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T14:38:11","name":"[committed] tree+ggc: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZEF8Z5fuS-6WjLssJvEPRy8bbyaXT_YFPqHTBMEmGtRQ@mail.gmail.com/mbox/"},{"id":115425,"url":"https://patchwork.plctlab.org/api/1.2/patches/115425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPju=KM4G1tw0SbGLc5h_dumXhRXyfYW=SdeX77C70UeEv4dcQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T16:02:57","name":"[v2] libstdc++: PSTL dispatch for C++20 range random access iterators [PR110512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPju=KM4G1tw0SbGLc5h_dumXhRXyfYW=SdeX77C70UeEv4dcQ@mail.gmail.com/mbox/"},{"id":115432,"url":"https://patchwork.plctlab.org/api/1.2/patches/115432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com/","msgid":"<9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com>","list_archive_url":null,"date":"2023-07-03T16:52:50","name":"vect: Treat vector widening IFN calls as '\''simple'\'' [PR110436]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com/mbox/"},{"id":115482,"url":"https://patchwork.plctlab.org/api/1.2/patches/115482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703192024.11486-1-iain@sandoe.co.uk/","msgid":"<20230703192024.11486-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-03T19:20:24","name":"[pushed] testsuite, Darwin: Remove an unnecessary flags addition.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703192024.11486-1-iain@sandoe.co.uk/mbox/"},{"id":115494,"url":"https://patchwork.plctlab.org/api/1.2/patches/115494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6de3ece999e215e7ebbbd124af64a39e726006c.1688418868.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T21:33:15","name":"[1/5] OpenMP: Fix \"exit data\" for array sections for ref-to-ptr components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6de3ece999e215e7ebbbd124af64a39e726006c.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115496,"url":"https://patchwork.plctlab.org/api/1.2/patches/115496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7a1870f3b2578939796d7d87532e968a0a9f7be.1688418868.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T21:33:16","name":"[2/5] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7a1870f3b2578939796d7d87532e968a0a9f7be.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115495,"url":"https://patchwork.plctlab.org/api/1.2/patches/115495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com/","msgid":"<2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:17","name":"[3/5] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115497,"url":"https://patchwork.plctlab.org/api/1.2/patches/115497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com/","msgid":"<518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:18","name":"[4/5] OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115498,"url":"https://patchwork.plctlab.org/api/1.2/patches/115498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com/","msgid":"<8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:19","name":"[5/5] OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115503,"url":"https://patchwork.plctlab.org/api/1.2/patches/115503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMmuTO_-n_We6J1k_OXeZAKja9B+7DwkjTrOX6g8NB1ziJWYVg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T22:13:05","name":"libstdc++: Split up pstl/set.cc testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMmuTO_-n_We6J1k_OXeZAKja9B+7DwkjTrOX6g8NB1ziJWYVg@mail.gmail.com/mbox/"},{"id":115509,"url":"https://patchwork.plctlab.org/api/1.2/patches/115509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230702.995484-1-jwakely@redhat.com/","msgid":"<20230703230702.995484-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-03T23:06:32","name":"[committed] libstdc++: Qualify calls to std::_Destroy and _Destroy_aux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230702.995484-1-jwakely@redhat.com/mbox/"},{"id":115510,"url":"https://patchwork.plctlab.org/api/1.2/patches/115510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230828.995791-1-jwakely@redhat.com/","msgid":"<20230703230828.995791-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-03T23:08:13","name":"[committed] libstdc++: Fix synopsis test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230828.995791-1-jwakely@redhat.com/mbox/"},{"id":115529,"url":"https://patchwork.plctlab.org/api/1.2/patches/115529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp/","msgid":"<932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp>","list_archive_url":null,"date":"2023-07-04T00:57:03","name":"xtensa: Use HARD_REG_SET instead of bare integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp/mbox/"},{"id":115530,"url":"https://patchwork.plctlab.org/api/1.2/patches/115530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010629.31B8220418@pchp3.se.axis.com/","msgid":"<20230704010629.31B8220418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-07-04T01:06:29","name":"[committed] dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010629.31B8220418@pchp3.se.axis.com/mbox/"},{"id":115531,"url":"https://patchwork.plctlab.org/api/1.2/patches/115531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010758.8E35120418@pchp3.se.axis.com/","msgid":"<20230704010758.8E35120418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-07-04T01:07:58","name":"[committed] CRIS: Replace unspec CRIS_UNSPEC_SWAP_BITS with rtx bitreverse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010758.8E35120418@pchp3.se.axis.com/mbox/"},{"id":115543,"url":"https://patchwork.plctlab.org/api/1.2/patches/115543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704021832.1580584-1-guojiufu@linux.ibm.com/","msgid":"<20230704021832.1580584-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-04T02:18:32","name":"[V4,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704021832.1580584-1-guojiufu@linux.ibm.com/mbox/"},{"id":115545,"url":"https://patchwork.plctlab.org/api/1.2/patches/115545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704025035.1074040-1-hongtao.liu@intel.com/","msgid":"<20230704025035.1074040-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-04T02:50:35","name":"Break false dependence for vpternlog by inserting vpxor.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704025035.1074040-1-hongtao.liu@intel.com/mbox/"},{"id":115546,"url":"https://patchwork.plctlab.org/api/1.2/patches/115546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704031244.1074834-1-hongyu.wang@intel.com/","msgid":"<20230704031244.1074834-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-07-04T03:12:44","name":"[V2] i386: Inline function with default arch/tune to caller","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704031244.1074834-1-hongyu.wang@intel.com/mbox/"},{"id":115565,"url":"https://patchwork.plctlab.org/api/1.2/patches/115565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704055053.2308713-1-pan2.li@intel.com/","msgid":"<20230704055053.2308713-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T05:50:53","name":"[v1] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704055053.2308713-1-pan2.li@intel.com/mbox/"},{"id":115570,"url":"https://patchwork.plctlab.org/api/1.2/patches/115570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704064227.3432171-1-guojiufu@linux.ibm.com/","msgid":"<20230704064227.3432171-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-04T06:42:27","name":"[V3] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704064227.3432171-1-guojiufu@linux.ibm.com/mbox/"},{"id":115584,"url":"https://patchwork.plctlab.org/api/1.2/patches/115584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704070728.82C0D3858409@sourceware.org/","msgid":"<20230704070728.82C0D3858409@sourceware.org>","list_archive_url":null,"date":"2023-07-04T07:06:44","name":"[v2] middle-end/110495 - avoid associating constants with (VL) vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704070728.82C0D3858409@sourceware.org/mbox/"},{"id":115599,"url":"https://patchwork.plctlab.org/api/1.2/patches/115599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704075320.195407-1-juzhe.zhong@rivai.ai/","msgid":"<20230704075320.195407-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T07:53:20","name":"[V2] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704075320.195407-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115605,"url":"https://patchwork.plctlab.org/api/1.2/patches/115605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080806.2677374-1-pan2.li@intel.com/","msgid":"<20230704080806.2677374-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T08:08:06","name":"[v2] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080806.2677374-1-pan2.li@intel.com/mbox/"},{"id":115607,"url":"https://patchwork.plctlab.org/api/1.2/patches/115607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080929.998656-1-poulhies@adacore.com/","msgid":"<20230704080929.998656-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:29","name":"[COMMITTED] ada: Fix list of inherited subprograms in query for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080929.998656-1-poulhies@adacore.com/mbox/"},{"id":115610,"url":"https://patchwork.plctlab.org/api/1.2/patches/115610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080945.998813-1-poulhies@adacore.com/","msgid":"<20230704080945.998813-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:45","name":"[COMMITTED] ada: Add No_Use_Of_Attribute & No_Use_Of_Pragma to gnat_rm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080945.998813-1-poulhies@adacore.com/mbox/"},{"id":115608,"url":"https://patchwork.plctlab.org/api/1.2/patches/115608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080947.998876-1-poulhies@adacore.com/","msgid":"<20230704080947.998876-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:47","name":"[COMMITTED] ada: Small adjustments to new procedure Expand_Unchecked_Union_Equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080947.998876-1-poulhies@adacore.com/mbox/"},{"id":115609,"url":"https://patchwork.plctlab.org/api/1.2/patches/115609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080950.998976-1-poulhies@adacore.com/","msgid":"<20230704080950.998976-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:50","name":"[COMMITTED] ada: Do not unnecessarily use component-wise loop for slice assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080950.998976-1-poulhies@adacore.com/mbox/"},{"id":115611,"url":"https://patchwork.plctlab.org/api/1.2/patches/115611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704081551.3422387-1-lili.cui@intel.com/","msgid":"<20230704081551.3422387-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-07-04T08:15:51","name":"x86: Enable ENQCMD and UINTR for march=sierraforest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704081551.3422387-1-lili.cui@intel.com/mbox/"},{"id":115619,"url":"https://patchwork.plctlab.org/api/1.2/patches/115619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084045.233AB3858C30@sourceware.org/","msgid":"<20230704084045.233AB3858C30@sourceware.org>","list_archive_url":null,"date":"2023-07-04T08:39:59","name":"tree-optimization/110436 - bogus live/relevant for unused pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084045.233AB3858C30@sourceware.org/mbox/"},{"id":115620,"url":"https://patchwork.plctlab.org/api/1.2/patches/115620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084158.2976523-1-pan2.li@intel.com/","msgid":"<20230704084158.2976523-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T08:41:58","name":"[v1] RISC-V: Refine the insn pattern of fsrm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084158.2976523-1-pan2.li@intel.com/mbox/"},{"id":115623,"url":"https://patchwork.plctlab.org/api/1.2/patches/115623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB863509CEB9A5B18AD42D986EE12EA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-04T08:51:00","name":"Vect: avoid using uninitialized variable (PR tree-optimization/110531)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB863509CEB9A5B18AD42D986EE12EA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":115633,"url":"https://patchwork.plctlab.org/api/1.2/patches/115633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704091554.7C7393857734@sourceware.org/","msgid":"<20230704091554.7C7393857734@sourceware.org>","list_archive_url":null,"date":"2023-07-04T09:14:43","name":"tree-optimization/110228 - avoid undefs in ifcombine more thoroughly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704091554.7C7393857734@sourceware.org/mbox/"},{"id":115679,"url":"https://patchwork.plctlab.org/api/1.2/patches/115679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095048.1065139-1-jie.mei@oss.cipunited.com/","msgid":"<20230704095048.1065139-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-07-04T09:50:48","name":"MIPS: Adjust mips16e2 related tests for ifcvt costing changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095048.1065139-1-jie.mei@oss.cipunited.com/mbox/"},{"id":115680,"url":"https://patchwork.plctlab.org/api/1.2/patches/115680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095406.3518145-1-juzhe.zhong@rivai.ai/","msgid":"<20230704095406.3518145-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T09:54:06","name":"[V3] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095406.3518145-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115696,"url":"https://patchwork.plctlab.org/api/1.2/patches/115696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103249.2396A385771F@sourceware.org/","msgid":"<20230704103249.2396A385771F@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:32:06","name":"tree-optimization/110376 - testcase for fixed bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103249.2396A385771F@sourceware.org/mbox/"},{"id":115697,"url":"https://patchwork.plctlab.org/api/1.2/patches/115697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103538.79F723857835@sourceware.org/","msgid":"<20230704103538.79F723857835@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:34:53","name":"Use mark_ssa_maybe_undefs in PHI-OPT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103538.79F723857835@sourceware.org/mbox/"},{"id":115698,"url":"https://patchwork.plctlab.org/api/1.2/patches/115698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103635.3A397385772E@sourceware.org/","msgid":"<20230704103635.3A397385772E@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:35:06","name":"Remove unnecessary check on scalar_niter == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103635.3A397385772E@sourceware.org/mbox/"},{"id":115741,"url":"https://patchwork.plctlab.org/api/1.2/patches/115741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704121714.BE6E73856DDC@sourceware.org/","msgid":"<20230704121714.BE6E73856DDC@sourceware.org>","list_archive_url":null,"date":"2023-07-04T12:16:31","name":"tree-optimization/110491 - PHI-OPT and undefs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704121714.BE6E73856DDC@sourceware.org/mbox/"},{"id":115745,"url":"https://patchwork.plctlab.org/api/1.2/patches/115745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704122611.4128668-1-pan2.li@intel.com/","msgid":"<20230704122611.4128668-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T12:26:11","name":"[v1] RISC-V: Use FRM_DYN when add the rounding mode operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704122611.4128668-1-pan2.li@intel.com/mbox/"},{"id":115749,"url":"https://patchwork.plctlab.org/api/1.2/patches/115749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704124332.3961261-1-juzhe.zhong@rivai.ai/","msgid":"<20230704124332.3961261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T12:43:32","name":"[V4] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704124332.3961261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115761,"url":"https://patchwork.plctlab.org/api/1.2/patches/115761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704131000.4031672-1-juzhe.zhong@rivai.ai/","msgid":"<20230704131000.4031672-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T13:10:00","name":"[V5] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704131000.4031672-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115807,"url":"https://patchwork.plctlab.org/api/1.2/patches/115807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704140536.680044-1-pan2.li@intel.com/","msgid":"<20230704140536.680044-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T14:05:36","name":"[v3] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704140536.680044-1-pan2.li@intel.com/mbox/"},{"id":115840,"url":"https://patchwork.plctlab.org/api/1.2/patches/115840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qjvfp1.fsf@euler.schwinge.homeip.net/","msgid":"<87h6qjvfp1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-04T15:50:34","name":"'\''unsigned int len'\'' field in '\''libcpp/include/symtab.h:struct ht_identifier'\'' (was: [PATCH] pch: Fix streaming of strings with embedded null bytes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qjvfp1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115845,"url":"https://patchwork.plctlab.org/api/1.2/patches/115845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlnvfb8.fsf@euler.schwinge.homeip.net/","msgid":"<87edlnvfb8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-04T15:58:51","name":"GGC: Remove unused '\''bool is_string'\'' arguments to '\''ggc_pch_{count,alloc,write}_object'\'' (was: RFA - Remove GC zone allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlnvfb8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115850,"url":"https://patchwork.plctlab.org/api/1.2/patches/115850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704162532.205035-1-vultkayn@gcc.gnu.org/","msgid":"<20230704162532.205035-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-04T16:25:35","name":"analyzer: Add support of placement new and improved operator new [PR105948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704162532.205035-1-vultkayn@gcc.gnu.org/mbox/"},{"id":115882,"url":"https://patchwork.plctlab.org/api/1.2/patches/115882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f73371d732237ed54ede44b7bd88624@ispras.ru/","msgid":"<8f73371d732237ed54ede44b7bd88624@ispras.ru>","list_archive_url":null,"date":"2023-07-04T18:25:00","name":"Generating all-ones zmm needs dep-breaking pxor before ternlog (PR target/110438)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f73371d732237ed54ede44b7bd88624@ispras.ru/mbox/"},{"id":115922,"url":"https://patchwork.plctlab.org/api/1.2/patches/115922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com/","msgid":"<3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com>","list_archive_url":null,"date":"2023-07-05T03:22:58","name":"[rs6000] Skip redundant vector extract if the element is first element of dword0 [PR110429]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com/mbox/"},{"id":115948,"url":"https://patchwork.plctlab.org/api/1.2/patches/115948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064004.1143580-1-jwakely@redhat.com/","msgid":"<20230705064004.1143580-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:39:39","name":"[committed] libstdc++: Add redundant '\''typename'\'' to std::projected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064004.1143580-1-jwakely@redhat.com/mbox/"},{"id":115949,"url":"https://patchwork.plctlab.org/api/1.2/patches/115949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064010.1143604-1-jwakely@redhat.com/","msgid":"<20230705064010.1143604-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:40:05","name":"[committed] libstdc++: Use RAII in std::vector::_M_default_append","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064010.1143604-1-jwakely@redhat.com/mbox/"},{"id":115950,"url":"https://patchwork.plctlab.org/api/1.2/patches/115950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064106.1143618-1-jwakely@redhat.com/","msgid":"<20230705064106.1143618-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:40:11","name":"[committed] libstdc++: Fix std::__uninitialized_default_n for constant evaluation [PR110542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064106.1143618-1-jwakely@redhat.com/mbox/"},{"id":115951,"url":"https://patchwork.plctlab.org/api/1.2/patches/115951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064113.1143661-1-jwakely@redhat.com/","msgid":"<20230705064113.1143661-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:41:07","name":"[committed] libstdc++: Disable std::forward_list tests for C++98 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064113.1143661-1-jwakely@redhat.com/mbox/"},{"id":115952,"url":"https://patchwork.plctlab.org/api/1.2/patches/115952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB86357ECFCF921CF3114FC894E12FA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T06:43:13","name":"Vect: use a small step to calculate induction for the unrolled loop (PR tree-optimization/110449)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB86357ECFCF921CF3114FC894E12FA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":115958,"url":"https://patchwork.plctlab.org/api/1.2/patches/115958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705065808.E438A3858408@sourceware.org/","msgid":"<20230705065808.E438A3858408@sourceware.org>","list_archive_url":null,"date":"2023-07-05T06:57:26","name":"middle-end/110541 - VEC_PERM_EXPR documentation is off","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705065808.E438A3858408@sourceware.org/mbox/"},{"id":115966,"url":"https://patchwork.plctlab.org/api/1.2/patches/115966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705070223.806580-1-pan2.li@intel.com/","msgid":"<20230705070223.806580-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-05T07:02:23","name":"[v4] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705070223.806580-1-pan2.li@intel.com/mbox/"},{"id":115987,"url":"https://patchwork.plctlab.org/api/1.2/patches/115987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkgqvlst.fsf@euler.schwinge.homeip.net/","msgid":"<87bkgqvlst.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T07:50:58","name":"GTY: Explicitly reject '\''string_length'\'' option for (fields in) global variables (was: [PATCH] pch: Fix streaming of strings with embedded null bytes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkgqvlst.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115988,"url":"https://patchwork.plctlab.org/api/1.2/patches/115988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com/","msgid":"<59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com>","list_archive_url":null,"date":"2023-07-05T07:51:34","name":"x86: suppress avx512f-copysign.c testcase for 32-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com/mbox/"},{"id":115994,"url":"https://patchwork.plctlab.org/api/1.2/patches/115994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rbuvljs.fsf@euler.schwinge.homeip.net/","msgid":"<878rbuvljs.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T07:56:23","name":"GTY: Enhance '\''string_length'\'' option documentation (was: '\''unsigned int len'\'' field in '\''libcpp/include/symtab.h:struct ht_identifier'\'' (was: [PATCH] pch: Fix streaming of strings with embedded null bytes))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rbuvljs.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115997,"url":"https://patchwork.plctlab.org/api/1.2/patches/115997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com/","msgid":"<9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com>","list_archive_url":null,"date":"2023-07-05T08:00:23","name":"[1/2] x86: correct / simplify @vec_extract_hi_ and vec_extract_hi_v32qi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com/mbox/"},{"id":115998,"url":"https://patchwork.plctlab.org/api/1.2/patches/115998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3e17c19-0cd4-9d07-bcfc-0312487f029a@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T08:00:55","name":"[2/2] x86: slightly correct / simplify *vec_extractv2ti","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3e17c19-0cd4-9d07-bcfc-0312487f029a@suse.com/mbox/"},{"id":116000,"url":"https://patchwork.plctlab.org/api/1.2/patches/116000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705080852.2249A3858288@sourceware.org/","msgid":"<20230705080852.2249A3858288@sourceware.org>","list_archive_url":null,"date":"2023-07-05T08:08:09","name":"adjust testcase for now happening epilogue vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705080852.2249A3858288@sourceware.org/mbox/"},{"id":116001,"url":"https://patchwork.plctlab.org/api/1.2/patches/116001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6yvkwc.fsf@euler.schwinge.homeip.net/","msgid":"<875y6yvkwc.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T08:10:27","name":"GTY: Clean up obsolete '\''bool needs_cast_p'\'' field of '\''gcc/gengtype.cc:struct walk_type_data'\'' (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6yvkwc.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116002,"url":"https://patchwork.plctlab.org/api/1.2/patches/116002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705081129.92457-1-kito.cheng@sifive.com/","msgid":"<20230705081129.92457-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-05T08:11:29","name":"RISC-V: Handle rouding mode correctly on zfinx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705081129.92457-1-kito.cheng@sifive.com/mbox/"},{"id":116003,"url":"https://patchwork.plctlab.org/api/1.2/patches/116003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873522vkmu.fsf@euler.schwinge.homeip.net/","msgid":"<873522vkmu.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T08:16:09","name":"GTY: Clean up obsolete parametrized structs remnants (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873522vkmu.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116028,"url":"https://patchwork.plctlab.org/api/1.2/patches/116028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635E49C6DC6B89D31D6390FE12FA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T08:46:26","name":"Vect: select small VF for epilog of unrolled loop (PR tree-optimization/110474)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635E49C6DC6B89D31D6390FE12FA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":116030,"url":"https://patchwork.plctlab.org/api/1.2/patches/116030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32b33338-a294-1464-6a97-c77c7465eae6@gmail.com/","msgid":"<32b33338-a294-1464-6a97-c77c7465eae6@gmail.com>","list_archive_url":null,"date":"2023-07-05T09:12:00","name":"RISC-V: Allow variable index for vec_set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32b33338-a294-1464-6a97-c77c7465eae6@gmail.com/mbox/"},{"id":116031,"url":"https://patchwork.plctlab.org/api/1.2/patches/116031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com/","msgid":"<9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com>","list_archive_url":null,"date":"2023-07-05T09:13:12","name":"RISC-V: Support variable index in vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com/mbox/"},{"id":116058,"url":"https://patchwork.plctlab.org/api/1.2/patches/116058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzveu08y.fsf@euler.schwinge.homeip.net/","msgid":"<87jzveu08y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T10:21:49","name":"GTY: Repair '\''enum gty_token'\'', '\''token_names'\'' desynchronization (was: [cxx-conversion] Support garbage-collected C++ templates)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzveu08y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116081,"url":"https://patchwork.plctlab.org/api/1.2/patches/116081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com/","msgid":"<56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-05T11:51:18","name":"rs6000: Don'\''t ICE when generating vector pair load/store insns [PR110411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com/mbox/"},{"id":116122,"url":"https://patchwork.plctlab.org/api/1.2/patches/116122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d53db0b9-80ae-ff06-1bc9-f6884333c934@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T13:00:01","name":"RISC-V: Change truncate to float_truncate in narrowing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d53db0b9-80ae-ff06-1bc9-f6884333c934@gmail.com/mbox/"},{"id":116140,"url":"https://patchwork.plctlab.org/api/1.2/patches/116140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705134147.13325-1-drross@redhat.com/","msgid":"<20230705134147.13325-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-05T13:41:47","name":"match.pd: Implement missed optimization (~X | Y) ^ X -> ~(X & Y) [PR109986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705134147.13325-1-drross@redhat.com/mbox/"},{"id":116146,"url":"https://patchwork.plctlab.org/api/1.2/patches/116146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705135022.245282-1-juzhe.zhong@rivai.ai/","msgid":"<20230705135022.245282-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-05T13:50:22","name":"[v1] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705135022.245282-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116228,"url":"https://patchwork.plctlab.org/api/1.2/patches/116228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bE2GRmO-1Bwe8mRvA_jdBEr=FVE13rdWsNeWTMP-W-7A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T15:32:51","name":"[committed] sched: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bE2GRmO-1Bwe8mRvA_jdBEr=FVE13rdWsNeWTMP-W-7A@mail.gmail.com/mbox/"},{"id":116236,"url":"https://patchwork.plctlab.org/api/1.2/patches/116236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qitk0h.fsf@euler.schwinge.homeip.net/","msgid":"<87h6qitk0h.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:12:30","name":"[v2] GTY: Clean up obsolete parametrized structs remnants (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qitk0h.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116239,"url":"https://patchwork.plctlab.org/api/1.2/patches/116239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705161442.1184446-1-jwakely@redhat.com/","msgid":"<20230705161442.1184446-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T16:14:14","name":"doc: Update my Contributors entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705161442.1184446-1-jwakely@redhat.com/mbox/"},{"id":116238,"url":"https://patchwork.plctlab.org/api/1.2/patches/116238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlmtjwh.fsf@euler.schwinge.homeip.net/","msgid":"<87edlmtjwh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:14:54","name":"GGC, GTY: Tighten up a few things re '\''reorder'\'' option and strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlmtjwh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116245,"url":"https://patchwork.plctlab.org/api/1.2/patches/116245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5watjg1.fsf@euler.schwinge.homeip.net/","msgid":"<87a5watjg1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:24:46","name":"GGC, GTY: No pointer walking for '\''atomic'\'' in PCH '\''gt_pch_note_object'\'' (was: Patch: New GTY ((atomic)) option)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5watjg1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116256,"url":"https://patchwork.plctlab.org/api/1.2/patches/116256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705170136.581584-1-apinski@marvell.com/","msgid":"<20230705170136.581584-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-05T17:01:36","name":"Fix PR 110554: vec lowering introduces scalar signed-boolean:32 comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705170136.581584-1-apinski@marvell.com/mbox/"},{"id":116454,"url":"https://patchwork.plctlab.org/api/1.2/patches/116454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705215151.84788-1-polacek@redhat.com/","msgid":"<20230705215151.84788-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-05T21:51:51","name":"testsuite: fix dwarf2/utf-1.C with DWARF4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705215151.84788-1-polacek@redhat.com/mbox/"},{"id":116459,"url":"https://patchwork.plctlab.org/api/1.2/patches/116459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com/","msgid":"<121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com>","list_archive_url":null,"date":"2023-07-05T23:08:05","name":"[COMMITTED,1/5] Move relation discovery into compute_operand_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com/mbox/"},{"id":116458,"url":"https://patchwork.plctlab.org/api/1.2/patches/116458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc3528ef-a7a6-5250-73b9-ec3897e0387f@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:14","name":"[COMMITTED,2/5] Simplify compute_operand_range for op1 and op2 case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc3528ef-a7a6-5250-73b9-ec3897e0387f@redhat.com/mbox/"},{"id":116460,"url":"https://patchwork.plctlab.org/api/1.2/patches/116460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com/","msgid":"<74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com>","list_archive_url":null,"date":"2023-07-05T23:08:21","name":"[COMMITTED,3/5] Make compute_operand1_range a leaf call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com/mbox/"},{"id":116461,"url":"https://patchwork.plctlab.org/api/1.2/patches/116461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5662c87-368a-f072-3819-b6535baefeb1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:29","name":"[COMMITTED,4/5] Make compute_operand2_range a leaf call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5662c87-368a-f072-3819-b6535baefeb1@redhat.com/mbox/"},{"id":116462,"url":"https://patchwork.plctlab.org/api/1.2/patches/116462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6b8901e-00e9-a30c-0892-aebd98199ee1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:35","name":"[COMMITTED,5/5] Make compute_operand_range a tail call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6b8901e-00e9-a30c-0892-aebd98199ee1@redhat.com/mbox/"},{"id":116463,"url":"https://patchwork.plctlab.org/api/1.2/patches/116463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705232724.631992-1-hjl.tools@gmail.com/","msgid":"<20230705232724.631992-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-05T23:27:24","name":"x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705232724.631992-1-hjl.tools@gmail.com/mbox/"},{"id":116466,"url":"https://patchwork.plctlab.org/api/1.2/patches/116466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011204.3542905-1-hongtao.liu@intel.com/","msgid":"<20230706011204.3542905-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:12:04","name":"Disparage slightly for the alternative which move DFmode between SSE_REGS and GENERAL_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011204.3542905-1-hongtao.liu@intel.com/mbox/"},{"id":116468,"url":"https://patchwork.plctlab.org/api/1.2/patches/116468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-1-hongtao.liu@intel.com/","msgid":"<20230706011816.3543708-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:18:15","name":"[1/2,x86] Add pre_reload splitter to detect fp min/max pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-1-hongtao.liu@intel.com/mbox/"},{"id":116467,"url":"https://patchwork.plctlab.org/api/1.2/patches/116467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-2-hongtao.liu@intel.com/","msgid":"<20230706011816.3543708-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:18:16","name":"[2/2] Adjust rtx_cost for DF/SFmode AND/IOR/XOR/ANDN operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-2-hongtao.liu@intel.com/mbox/"},{"id":116511,"url":"https://patchwork.plctlab.org/api/1.2/patches/116511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706052656.3191422-1-pan2.li@intel.com/","msgid":"<20230706052656.3191422-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-06T05:26:56","name":"[v5] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706052656.3191422-1-pan2.li@intel.com/mbox/"},{"id":116522,"url":"https://patchwork.plctlab.org/api/1.2/patches/116522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706061626.3420739-1-juzhe.zhong@rivai.ai/","msgid":"<20230706061626.3420739-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T06:16:26","name":"VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706061626.3420739-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116523,"url":"https://patchwork.plctlab.org/api/1.2/patches/116523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063712.409891-1-hongyu.wang@intel.com/","msgid":"<20230706063712.409891-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-07-06T06:37:12","name":"i386: Update document for inlining rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063712.409891-1-hongyu.wang@intel.com/mbox/"},{"id":116524,"url":"https://patchwork.plctlab.org/api/1.2/patches/116524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063713.376465-1-zewei.mo@intel.com/","msgid":"<20230706063713.376465-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-06T06:37:13","name":"Initial Granite Rapids D Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063713.376465-1-zewei.mo@intel.com/mbox/"},{"id":116526,"url":"https://patchwork.plctlab.org/api/1.2/patches/116526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065135.3448078-1-juzhe.zhong@rivai.ai/","msgid":"<20230706065135.3448078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T06:51:35","name":"[V2] VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065135.3448078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116527,"url":"https://patchwork.plctlab.org/api/1.2/patches/116527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065501.3C425138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706065501.3C425138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T06:55:00","name":"Fix expectation on gcc.dg/vect/pr71264.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065501.3C425138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116537,"url":"https://patchwork.plctlab.org/api/1.2/patches/116537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706072929.D6939138FC@imap2.suse-dmz.suse.de/","msgid":"<20230706072929.D6939138FC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T07:29:29","name":"tree-optimization/110515 - wrong code with LIM + PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706072929.D6939138FC@imap2.suse-dmz.suse.de/mbox/"},{"id":116569,"url":"https://patchwork.plctlab.org/api/1.2/patches/116569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com/","msgid":"<001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-06T09:00:12","name":"[Committed] Handle COPYSIGN in dwarf2out.cc'\''d mem_loc_descriptor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com/mbox/"},{"id":116620,"url":"https://patchwork.plctlab.org/api/1.2/patches/116620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706104845.604BE138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706104845.604BE138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T10:48:44","name":"tree-optimization/110563 - simplify epilogue VF checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706104845.604BE138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116635,"url":"https://patchwork.plctlab.org/api/1.2/patches/116635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113805.1765789-1-poulhies@adacore.com/","msgid":"<20230706113805.1765789-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:05","name":"[COMMITTED] ada: Finalization not performed for component of protected type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113805.1765789-1-poulhies@adacore.com/mbox/"},{"id":116634,"url":"https://patchwork.plctlab.org/api/1.2/patches/116634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113853.1765963-1-poulhies@adacore.com/","msgid":"<20230706113853.1765963-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:53","name":"[COMMITTED] ada: Improve error message on violation of SPARK_Mode rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113853.1765963-1-poulhies@adacore.com/mbox/"},{"id":116636,"url":"https://patchwork.plctlab.org/api/1.2/patches/116636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113855.1766024-1-poulhies@adacore.com/","msgid":"<20230706113855.1766024-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:55","name":"[COMMITTED] ada: Avoid crash in Find_Optional_Prim_Op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113855.1766024-1-poulhies@adacore.com/mbox/"},{"id":116638,"url":"https://patchwork.plctlab.org/api/1.2/patches/116638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113856.1766127-1-poulhies@adacore.com/","msgid":"<20230706113856.1766127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:56","name":"[COMMITTED] ada: Reuse code in Is_Fully_Initialized_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113856.1766127-1-poulhies@adacore.com/mbox/"},{"id":116637,"url":"https://patchwork.plctlab.org/api/1.2/patches/116637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113907.1766190-1-poulhies@adacore.com/","msgid":"<20230706113907.1766190-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:07","name":"[COMMITTED] ada: Refer to non-Ada binding limitations in user guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113907.1766190-1-poulhies@adacore.com/mbox/"},{"id":116639,"url":"https://patchwork.plctlab.org/api/1.2/patches/116639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113908.1766256-1-poulhies@adacore.com/","msgid":"<20230706113908.1766256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:08","name":"[COMMITTED] ada: Evaluate static expressions in Range attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113908.1766256-1-poulhies@adacore.com/mbox/"},{"id":116640,"url":"https://patchwork.plctlab.org/api/1.2/patches/116640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113910.1766318-1-poulhies@adacore.com/","msgid":"<20230706113910.1766318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:10","name":"[COMMITTED] ada: Refactor the proof of the Value and Image runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113910.1766318-1-poulhies@adacore.com/mbox/"},{"id":116641,"url":"https://patchwork.plctlab.org/api/1.2/patches/116641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113913.1766423-1-poulhies@adacore.com/","msgid":"<20230706113913.1766423-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:13","name":"[COMMITTED] ada: Add specification source files of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113913.1766423-1-poulhies@adacore.com/mbox/"},{"id":116647,"url":"https://patchwork.plctlab.org/api/1.2/patches/116647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com/","msgid":"<014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-06T12:04:35","name":"[x86_64] Improve __int128 argument passing (in ix86_expand_move).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com/mbox/"},{"id":116700,"url":"https://patchwork.plctlab.org/api/1.2/patches/116700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706132434.77CF8138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706132434.77CF8138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T13:24:34","name":"tree-optimization/110556 - tail merging still pre-tuples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706132434.77CF8138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116731,"url":"https://patchwork.plctlab.org/api/1.2/patches/116731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706135748.2583541-1-claziss@gmail.com/","msgid":"<20230706135748.2583541-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-07-06T13:57:48","name":"[committed] arc: Update builtin documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706135748.2583541-1-claziss@gmail.com/mbox/"},{"id":116734,"url":"https://patchwork.plctlab.org/api/1.2/patches/116734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbNABv8JqSUlOaO@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-06T14:17:36","name":"update_bb_profile_for_threading TLC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbNABv8JqSUlOaO@kam.mff.cuni.cz/mbox/"},{"id":116737,"url":"https://patchwork.plctlab.org/api/1.2/patches/116737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706142551.598751-1-juzhe.zhong@rivai.ai/","msgid":"<20230706142551.598751-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T14:25:51","name":"[V2] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706142551.598751-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116753,"url":"https://patchwork.plctlab.org/api/1.2/patches/116753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbYkVxNoKnkW0Px@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-06T15:06:57","name":"Fix profile update after loop-ch and cunroll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbYkVxNoKnkW0Px@kam.mff.cuni.cz/mbox/"},{"id":116766,"url":"https://patchwork.plctlab.org/api/1.2/patches/116766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706152826.1254690-1-jwakely@redhat.com/","msgid":"<20230706152826.1254690-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-06T15:28:02","name":"[committed] libstdc++: Document --enable-cstdio=stdio_pure [PR110574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706152826.1254690-1-jwakely@redhat.com/mbox/"},{"id":116765,"url":"https://patchwork.plctlab.org/api/1.2/patches/116765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com/","msgid":"<8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-06T15:33:57","name":"[v4] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com/mbox/"},{"id":116781,"url":"https://patchwork.plctlab.org/api/1.2/patches/116781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706155559.1041292-1-julian@codesourcery.com/","msgid":"<20230706155559.1041292-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-06T15:55:59","name":"[og13] OpenMP: Expand \"declare mapper\" mappers for target {enter, exit, } data directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706155559.1041292-1-julian@codesourcery.com/mbox/"},{"id":116797,"url":"https://patchwork.plctlab.org/api/1.2/patches/116797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706161521.6094-2-xry111@xry111.site/","msgid":"<20230706161521.6094-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-06T16:15:22","name":"vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706161521.6094-2-xry111@xry111.site/mbox/"},{"id":116822,"url":"https://patchwork.plctlab.org/api/1.2/patches/116822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6wub1r.fsf@euler.schwinge.homeip.net/","msgid":"<875y6wub1r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-06T18:53:04","name":"GGC: Remove '\''const char *'\'' '\''gt_ggc_mx'\'', '\''gt_pch_nx'\'' variants (was: [PATCH] support ggc hash_map and hash_set)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6wub1r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116849,"url":"https://patchwork.plctlab.org/api/1.2/patches/116849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062144220.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:35:54","name":"[1/3] testsuite: Add check for vectors of 128 bits being supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062144220.28892@tpp.orcam.me.uk/mbox/"},{"id":116850,"url":"https://patchwork.plctlab.org/api/1.2/patches/116850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062153310.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:36:12","name":"[2/3] testsuite: Require 128-bit vectors for bb-slp-pr95839.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062153310.28892@tpp.orcam.me.uk/mbox/"},{"id":116851,"url":"https://patchwork.plctlab.org/api/1.2/patches/116851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062204180.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:36:32","name":"[3/3] testsuite: Require vectors of doubles for pr97428.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062204180.28892@tpp.orcam.me.uk/mbox/"},{"id":116889,"url":"https://patchwork.plctlab.org/api/1.2/patches/116889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk/","msgid":"<4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk>","list_archive_url":null,"date":"2023-07-07T00:08:20","name":"committed: Stepping down as maintainer for ARC and Epiphany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk/mbox/"},{"id":116894,"url":"https://patchwork.plctlab.org/api/1.2/patches/116894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707010023.863732-1-juzhe.zhong@rivai.ai/","msgid":"<20230707010023.863732-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T01:00:23","name":"[V3] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707010023.863732-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116923,"url":"https://patchwork.plctlab.org/api/1.2/patches/116923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707040326.9223-1-juzhe.zhong@rivai.ai/","msgid":"<20230707040326.9223-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T04:03:26","name":"VECT: Add COND_LEN_* operations for loop control with length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707040326.9223-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116967,"url":"https://patchwork.plctlab.org/api/1.2/patches/116967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707052914.3386877-1-hongtao.liu@intel.com/","msgid":"<20230707052914.3386877-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-07T05:29:14","name":"[V2,x86] Add pre_reload splitter to detect fp min/max pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707052914.3386877-1-hongtao.liu@intel.com/mbox/"},{"id":116982,"url":"https://patchwork.plctlab.org/api/1.2/patches/116982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67Mh9wMoNsZV8p1iDUsviNSDuaHkwc-SPjAgo0U-rWaGZw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T06:29:37","name":"lto: bypass-asm: Fixed test(U*) used but never defined error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67Mh9wMoNsZV8p1iDUsviNSDuaHkwc-SPjAgo0U-rWaGZw@mail.gmail.com/mbox/"},{"id":117003,"url":"https://patchwork.plctlab.org/api/1.2/patches/117003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707070727.658031-1-dkm@kataplop.net/","msgid":"<20230707070727.658031-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-07-07T07:07:27","name":"mklog: handle Signed-Off-By, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707070727.658031-1-dkm@kataplop.net/mbox/"},{"id":117027,"url":"https://patchwork.plctlab.org/api/1.2/patches/117027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-1-christophe.lyon@linaro.org/","msgid":"<20230707075145.2929681-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-07T07:51:44","name":"doc: Document arm_v8_1m_main_cde_mve_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-1-christophe.lyon@linaro.org/mbox/"},{"id":117028,"url":"https://patchwork.plctlab.org/api/1.2/patches/117028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-2-christophe.lyon@linaro.org/","msgid":"<20230707075145.2929681-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-07T07:51:45","name":"testsuite: Add _link flavor for several arm_arch* and arm* effective-targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-2-christophe.lyon@linaro.org/mbox/"},{"id":117031,"url":"https://patchwork.plctlab.org/api/1.2/patches/117031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-1-aldyh@redhat.com/","msgid":"<20230707075750.1248045-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:48","name":"[COMMITTED] Implement value/mask tracking for irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-1-aldyh@redhat.com/mbox/"},{"id":117030,"url":"https://patchwork.plctlab.org/api/1.2/patches/117030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-2-aldyh@redhat.com/","msgid":"<20230707075750.1248045-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:49","name":"[COMMITTED] The caller to irange::intersect (wide_int, wide_int) must normalize the range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-2-aldyh@redhat.com/mbox/"},{"id":117029,"url":"https://patchwork.plctlab.org/api/1.2/patches/117029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-3-aldyh@redhat.com/","msgid":"<20230707075750.1248045-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:50","name":"[COMMITTED] A singleton irange has all known bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-3-aldyh@redhat.com/mbox/"},{"id":117037,"url":"https://patchwork.plctlab.org/api/1.2/patches/117037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707082231.27703-1-xuli1@eswincomputing.com/","msgid":"<20230707082231.27703-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-07T08:22:31","name":"RISCV: Fix local_eliminate_vsetvl_insn bug in VSETVL PASS[PR110560]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707082231.27703-1-xuli1@eswincomputing.com/mbox/"},{"id":117049,"url":"https://patchwork.plctlab.org/api/1.2/patches/117049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17550-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T09:37:20","name":"[1/2] middle-end ifcvt: Reduce comparisons on conditionals by tracking truths [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17550-tamar@arm.com/mbox/"},{"id":117050,"url":"https://patchwork.plctlab.org/api/1.2/patches/117050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKfc66Pp1MdMvKL9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T09:37:47","name":"[2/2] middle-end ifcvt: Sort PHI arguments not only occurrences but also complexity [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKfc66Pp1MdMvKL9@arm.com/mbox/"},{"id":117127,"url":"https://patchwork.plctlab.org/api/1.2/patches/117127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707104847.271195-1-juzhe.zhong@rivai.ai/","msgid":"<20230707104847.271195-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T10:48:47","name":"[V4] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707104847.271195-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117129,"url":"https://patchwork.plctlab.org/api/1.2/patches/117129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707131857.2386125-2-xry111@xry111.site/","msgid":"<20230707131857.2386125-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-07T13:18:58","name":"[v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707131857.2386125-2-xry111@xry111.site/mbox/"},{"id":117138,"url":"https://patchwork.plctlab.org/api/1.2/patches/117138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707135142.21579-1-jchrist@linux.ibm.com/","msgid":"<20230707135142.21579-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-07-07T13:51:42","name":"s390: Fix vec_init default expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707135142.21579-1-jchrist@linux.ibm.com/mbox/"},{"id":117139,"url":"https://patchwork.plctlab.org/api/1.2/patches/117139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c197435b-f141-5355-7b9b-bc45344178f1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T14:01:21","name":"[pushed,LRA,PR110372] : Refine reload pseudo class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c197435b-f141-5355-7b9b-bc45344178f1@redhat.com/mbox/"},{"id":117162,"url":"https://patchwork.plctlab.org/api/1.2/patches/117162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707143257.24129-1-juzhe.zhong@rivai.ai/","msgid":"<20230707143257.24129-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T14:32:57","name":"[V5] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707143257.24129-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117181,"url":"https://patchwork.plctlab.org/api/1.2/patches/117181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707151336.691534-1-hjl.tools@gmail.com/","msgid":"<20230707151336.691534-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-07T15:13:36","name":"[v2] x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707151336.691534-1-hjl.tools@gmail.com/mbox/"},{"id":117202,"url":"https://patchwork.plctlab.org/api/1.2/patches/117202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707163806.1537093-1-jwakely@redhat.com/","msgid":"<20230707163806.1537093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-07T16:36:16","name":"libstdc++: Fix --enable-cstdio=stdio_pure [PR110574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707163806.1537093-1-jwakely@redhat.com/mbox/"},{"id":117205,"url":"https://patchwork.plctlab.org/api/1.2/patches/117205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707164019.1537221-1-jwakely@redhat.com/","msgid":"<20230707164019.1537221-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-07T16:38:22","name":"libstdc++: Compile basic_file_stdio.cc for LFS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707164019.1537221-1-jwakely@redhat.com/mbox/"},{"id":117222,"url":"https://patchwork.plctlab.org/api/1.2/patches/117222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhJISgInYN208nc@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-07T17:19:29","name":"Fix some profile consistency testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhJISgInYN208nc@kam.mff.cuni.cz/mbox/"},{"id":117224,"url":"https://patchwork.plctlab.org/api/1.2/patches/117224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhKDsbYPGpWEARA@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-07T17:23:26","name":"Cleanup force_edge_cold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhKDsbYPGpWEARA@kam.mff.cuni.cz/mbox/"},{"id":117234,"url":"https://patchwork.plctlab.org/api/1.2/patches/117234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707175622.702351-1-apinski@marvell.com/","msgid":"<20230707175622.702351-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-07T17:56:22","name":"Fix PR 110539: missed optimization after moving two_value to match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707175622.702351-1-apinski@marvell.com/mbox/"},{"id":117241,"url":"https://patchwork.plctlab.org/api/1.2/patches/117241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5247d438-212e-429f-ac48-fefeeda3f07c-1688754739987@3c-app-gmx-bs47/","msgid":"","list_archive_url":null,"date":"2023-07-07T18:32:20","name":"Fortran: simplification of FINDLOC for constant complex arguments [PR110585]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5247d438-212e-429f-ac48-fefeeda3f07c-1688754739987@3c-app-gmx-bs47/mbox/"},{"id":117262,"url":"https://patchwork.plctlab.org/api/1.2/patches/117262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707192923.465324-1-ibuclaw@gdcproject.org/","msgid":"<20230707192923.465324-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-07T19:29:23","name":"[committed] d: Fix PR 108842: Cannot use enum array with -fno-druntime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707192923.465324-1-ibuclaw@gdcproject.org/mbox/"},{"id":117280,"url":"https://patchwork.plctlab.org/api/1.2/patches/117280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com/","msgid":"<34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-07T20:18:56","name":"[ver,3] rs6000, fix vec_replace_unaligned built-in arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com/mbox/"},{"id":117285,"url":"https://patchwork.plctlab.org/api/1.2/patches/117285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7154d0d309b20945185e1634e08883b00d9f969.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T20:40:12","name":"[v5] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7154d0d309b20945185e1634e08883b00d9f969.camel@us.ibm.com/mbox/"},{"id":117371,"url":"https://patchwork.plctlab.org/api/1.2/patches/117371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-1-kmatsui@gcc.gnu.org/","msgid":"<20230708044539.61276-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:45:38","name":"[v2,1/2] c++, libstdc++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117372,"url":"https://patchwork.plctlab.org/api/1.2/patches/117372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-2-kmatsui@gcc.gnu.org/","msgid":"<20230708044539.61276-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:45:39","name":"[v2,2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117373,"url":"https://patchwork.plctlab.org/api/1.2/patches/117373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708045005.61988-1-kmatsui@gcc.gnu.org/","msgid":"<20230708045005.61988-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:50:05","name":"[v2] libstdc++: use __is_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708045005.61988-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117375,"url":"https://patchwork.plctlab.org/api/1.2/patches/117375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-2-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:08","name":"[v8,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117374,"url":"https://patchwork.plctlab.org/api/1.2/patches/117374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-3-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:09","name":"[v8,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-3-kmatsui@gcc.gnu.org/mbox/"},{"id":117377,"url":"https://patchwork.plctlab.org/api/1.2/patches/117377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-4-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:10","name":"[v8,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-4-kmatsui@gcc.gnu.org/mbox/"},{"id":117376,"url":"https://patchwork.plctlab.org/api/1.2/patches/117376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-5-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:11","name":"[v8,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-5-kmatsui@gcc.gnu.org/mbox/"},{"id":117379,"url":"https://patchwork.plctlab.org/api/1.2/patches/117379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-6-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:12","name":"[v8,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-6-kmatsui@gcc.gnu.org/mbox/"},{"id":117378,"url":"https://patchwork.plctlab.org/api/1.2/patches/117378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-7-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:13","name":"[v8,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-7-kmatsui@gcc.gnu.org/mbox/"},{"id":117380,"url":"https://patchwork.plctlab.org/api/1.2/patches/117380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-1-kmatsui@gcc.gnu.org/","msgid":"<20230708051825.64839-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:18:24","name":"[v3,1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117381,"url":"https://patchwork.plctlab.org/api/1.2/patches/117381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-2-kmatsui@gcc.gnu.org/","msgid":"<20230708051825.64839-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:18:25","name":"[v3,2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117382,"url":"https://patchwork.plctlab.org/api/1.2/patches/117382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052335.65718-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:23:34","name":"[v3,1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117383,"url":"https://patchwork.plctlab.org/api/1.2/patches/117383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052335.65718-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:23:35","name":"[v3,2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117384,"url":"https://patchwork.plctlab.org/api/1.2/patches/117384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052625.66538-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:26:24","name":"[v3,1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117385,"url":"https://patchwork.plctlab.org/api/1.2/patches/117385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052625.66538-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:26:25","name":"[v3,2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117386,"url":"https://patchwork.plctlab.org/api/1.2/patches/117386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052928.67485-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:29:27","name":"[v2,1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117388,"url":"https://patchwork.plctlab.org/api/1.2/patches/117388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052928.67485-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:29:28","name":"[v2,2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117392,"url":"https://patchwork.plctlab.org/api/1.2/patches/117392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708055435.68714-1-kmatsui@gcc.gnu.org/","msgid":"<20230708055435.68714-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:54:34","name":"[v3,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708055435.68714-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117420,"url":"https://patchwork.plctlab.org/api/1.2/patches/117420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708092511.1581884-1-jwakely@redhat.com/","msgid":"<20230708092511.1581884-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-08T09:24:58","name":"[committed] doc: Fix typos in Warning Options [PR110596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708092511.1581884-1-jwakely@redhat.com/mbox/"},{"id":117431,"url":"https://patchwork.plctlab.org/api/1.2/patches/117431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-1-kmatsui@gcc.gnu.org/","msgid":"<20230708111308.92402-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T11:13:07","name":"[v4,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117432,"url":"https://patchwork.plctlab.org/api/1.2/patches/117432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-2-kmatsui@gcc.gnu.org/","msgid":"<20230708111308.92402-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T11:13:08","name":"[v4,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117436,"url":"https://patchwork.plctlab.org/api/1.2/patches/117436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a53KgJRT_LM_kTW7a097JUZaBN1M9cfR1WjJftnYa2Ww@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T13:03:44","name":"[committed] gcse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a53KgJRT_LM_kTW7a097JUZaBN1M9cfR1WjJftnYa2Ww@mail.gmail.com/mbox/"},{"id":117437,"url":"https://patchwork.plctlab.org/api/1.2/patches/117437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z8zYN4_qU5gWbmKdUXC07y2=-AvSjx0ZhLRR=SpB=mbg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T13:04:43","name":"[committed] cprop: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z8zYN4_qU5gWbmKdUXC07y2=-AvSjx0ZhLRR=SpB=mbg@mail.gmail.com/mbox/"},{"id":117440,"url":"https://patchwork.plctlab.org/api/1.2/patches/117440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLyCitnePwtiEucjcAhK8q_PBKuSdsvUpjKkE3iDVu06A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T14:23:31","name":"[fortran] Fix default type bugs in gfortran [PR99139, PR99368]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLyCitnePwtiEucjcAhK8q_PBKuSdsvUpjKkE3iDVu06A@mail.gmail.com/mbox/"},{"id":117450,"url":"https://patchwork.plctlab.org/api/1.2/patches/117450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKmKYTnGNGB/9GFW@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-08T16:10:09","name":"Fix profile update in tree-ssa/update-cunroll.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKmKYTnGNGB/9GFW@kam.mff.cuni.cz/mbox/"},{"id":117468,"url":"https://patchwork.plctlab.org/api/1.2/patches/117468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKnZ7Ey9BtAG2S86@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-08T21:49:32","name":"Add missing dump_file check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKnZ7Ey9BtAG2S86@kam.mff.cuni.cz/mbox/"},{"id":117486,"url":"https://patchwork.plctlab.org/api/1.2/patches/117486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-1-kmatsui@gcc.gnu.org/","msgid":"<20230709084717.20744-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T08:47:16","name":"[1/2] c++, libstdc++: implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117487,"url":"https://patchwork.plctlab.org/api/1.2/patches/117487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-2-kmatsui@gcc.gnu.org/","msgid":"<20230709084717.20744-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T08:47:17","name":"[2/2] libstdc++: use new built-in trait __is_signed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117488,"url":"https://patchwork.plctlab.org/api/1.2/patches/117488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKNWisMUzv3DQ9u7Cy8UE6Z98Ws3Vzpgc=RLh4Xpq21Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-09T08:52:38","name":"simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKNWisMUzv3DQ9u7Cy8UE6Z98Ws3Vzpgc=RLh4Xpq21Q@mail.gmail.com/mbox/"},{"id":117502,"url":"https://patchwork.plctlab.org/api/1.2/patches/117502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-1-kmatsui@gcc.gnu.org/","msgid":"<20230709125715.26884-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T12:57:14","name":"[1/2] c++, libstdc++: implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117503,"url":"https://patchwork.plctlab.org/api/1.2/patches/117503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-2-kmatsui@gcc.gnu.org/","msgid":"<20230709125715.26884-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T12:57:15","name":"[2/2] libstdc++: use new built-in trait __is_arithmetic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117506,"url":"https://patchwork.plctlab.org/api/1.2/patches/117506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKq18vCQLX4mFtw8@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-09T13:28:18","name":"Improve dumping of profile_count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKq18vCQLX4mFtw8@kam.mff.cuni.cz/mbox/"},{"id":117530,"url":"https://patchwork.plctlab.org/api/1.2/patches/117530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com/","msgid":"<035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-09T20:35:53","name":"[x86] Add AVX512 support for STV of SI/DImode rotation by constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com/mbox/"},{"id":117533,"url":"https://patchwork.plctlab.org/api/1.2/patches/117533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com/","msgid":"<037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-09T21:30:28","name":"[X86] Add new insvti_lowpart_1 and insvdi_lowpart_1 patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com/mbox/"},{"id":117539,"url":"https://patchwork.plctlab.org/api/1.2/patches/117539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011400.910408-1-ibuclaw@gdcproject.org/","msgid":"<20230710011400.910408-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-10T01:14:00","name":"[committed] d: Merge upstream dmd, druntime 17ccd12af3, phobos 8d3800bee.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011400.910408-1-ibuclaw@gdcproject.org/mbox/"},{"id":117541,"url":"https://patchwork.plctlab.org/api/1.2/patches/117541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011714.3615931-1-hongtao.liu@intel.com/","msgid":"<20230710011714.3615931-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-10T01:17:14","name":"Break false dependence for vpternlog by inserting vpxor or setting constraint of input operand to '\''0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011714.3615931-1-hongtao.liu@intel.com/mbox/"},{"id":117603,"url":"https://patchwork.plctlab.org/api/1.2/patches/117603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-1-kmatsui@gcc.gnu.org/","msgid":"<20230710052310.48116-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:23:09","name":"[1/2] c++, libstdc++: implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117604,"url":"https://patchwork.plctlab.org/api/1.2/patches/117604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-2-kmatsui@gcc.gnu.org/","msgid":"<20230710052310.48116-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:23:10","name":"[2/2] libstdc++: use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117610,"url":"https://patchwork.plctlab.org/api/1.2/patches/117610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-1-kmatsui@gcc.gnu.org/","msgid":"<20230710053828.49793-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:38:27","name":"[v2,1/2] c++, libstdc++: implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117611,"url":"https://patchwork.plctlab.org/api/1.2/patches/117611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-2-kmatsui@gcc.gnu.org/","msgid":"<20230710053828.49793-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:38:28","name":"[v2,2/2] libstdc++: use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117659,"url":"https://patchwork.plctlab.org/api/1.2/patches/117659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710070612.233168-1-juzhe.zhong@rivai.ai/","msgid":"<20230710070612.233168-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T07:06:12","name":"GCSE: Export add_label_notes as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710070612.233168-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117679,"url":"https://patchwork.plctlab.org/api/1.2/patches/117679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710075600.114191-1-juzhe.zhong@rivai.ai/","msgid":"<20230710075600.114191-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T07:56:00","name":"GCSE: Export '\''insert_insn_end_basic_block'\'' as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710075600.114191-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117692,"url":"https://patchwork.plctlab.org/api/1.2/patches/117692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710081259.189869-1-juzhe.zhong@rivai.ai/","msgid":"<20230710081259.189869-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T08:12:59","name":"[v2] GCSE: Export '\''insert_insn_end_basic_block'\'' as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710081259.189869-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117869,"url":"https://patchwork.plctlab.org/api/1.2/patches/117869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710113547.142562-1-juzhe.zhong@rivai.ai/","msgid":"<20230710113547.142562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T11:35:47","name":"[V2] VECT: Add COND_LEN_* operations for loop control with length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710113547.142562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117888,"url":"https://patchwork.plctlab.org/api/1.2/patches/117888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124337.2262944-1-poulhies@adacore.com/","msgid":"<20230710124337.2262944-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:37","name":"[COMMITTED] ada: Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124337.2262944-1-poulhies@adacore.com/mbox/"},{"id":117891,"url":"https://patchwork.plctlab.org/api/1.2/patches/117891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124347.2263134-1-poulhies@adacore.com/","msgid":"<20230710124347.2263134-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:47","name":"[COMMITTED] ada: Adapt proof of System.Arith_Double to remove CVC4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124347.2263134-1-poulhies@adacore.com/mbox/"},{"id":117893,"url":"https://patchwork.plctlab.org/api/1.2/patches/117893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124349.2263234-1-poulhies@adacore.com/","msgid":"<20230710124349.2263234-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:49","name":"[COMMITTED] ada: hardcfr: mark throw-expected functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124349.2263234-1-poulhies@adacore.com/mbox/"},{"id":117894,"url":"https://patchwork.plctlab.org/api/1.2/patches/117894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124352.2263295-1-poulhies@adacore.com/","msgid":"<20230710124352.2263295-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:52","name":"[COMMITTED] ada: hardcfr: optionally disable in leaf functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124352.2263295-1-poulhies@adacore.com/mbox/"},{"id":117895,"url":"https://patchwork.plctlab.org/api/1.2/patches/117895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124425.2263356-1-poulhies@adacore.com/","msgid":"<20230710124425.2263356-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:25","name":"[COMMITTED] ada: Documentation for mixed declarations and statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124425.2263356-1-poulhies@adacore.com/mbox/"},{"id":117889,"url":"https://patchwork.plctlab.org/api/1.2/patches/117889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124427.2263633-1-poulhies@adacore.com/","msgid":"<20230710124427.2263633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:27","name":"[COMMITTED] ada: Simplify assertion to remove CodePeer message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124427.2263633-1-poulhies@adacore.com/mbox/"},{"id":117892,"url":"https://patchwork.plctlab.org/api/1.2/patches/117892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124429.2263694-1-poulhies@adacore.com/","msgid":"<20230710124429.2263694-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:29","name":"[COMMITTED] ada: Add typedefs to snames.h-tmpl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124429.2263694-1-poulhies@adacore.com/mbox/"},{"id":117890,"url":"https://patchwork.plctlab.org/api/1.2/patches/117890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124431.2263755-1-poulhies@adacore.com/","msgid":"<20230710124431.2263755-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:31","name":"[COMMITTED] ada: Follow-up fix for compilation issue with recent MinGW-w64 versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124431.2263755-1-poulhies@adacore.com/mbox/"},{"id":117914,"url":"https://patchwork.plctlab.org/api/1.2/patches/117914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710130847.2940323-1-christophe.lyon@linaro.org/","msgid":"<20230710130847.2940323-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-10T13:08:47","name":"[v2] arm: Fix MVE intrinsics support with LTO (PR target/110268)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710130847.2940323-1-christophe.lyon@linaro.org/mbox/"},{"id":117945,"url":"https://patchwork.plctlab.org/api/1.2/patches/117945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710141904.109665-1-kito.cheng@sifive.com/","msgid":"<20230710141904.109665-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-10T14:19:04","name":"doc: Add doc for RISC-V Operand Modifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710141904.109665-1-kito.cheng@sifive.com/mbox/"},{"id":117951,"url":"https://patchwork.plctlab.org/api/1.2/patches/117951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710150052.1793398-1-ppalka@redhat.com/","msgid":"<20230710150052.1793398-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-10T15:00:52","name":"[pushed] c++: redeclare_class_template and ttps [PR110523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710150052.1793398-1-ppalka@redhat.com/mbox/"},{"id":117955,"url":"https://patchwork.plctlab.org/api/1.2/patches/117955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710174826.48f9230c@vepi2/","msgid":"<20230710174826.48f9230c@vepi2>","list_archive_url":null,"date":"2023-07-10T15:48:26","name":"[Fortran] Allow ref'\''ing PDT'\''s len() in parameter-initializer [PR102003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710174826.48f9230c@vepi2/mbox/"},{"id":117960,"url":"https://patchwork.plctlab.org/api/1.2/patches/117960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.LSU.2.20.2307101549210.13548@wotan.suse.de/","msgid":"","list_archive_url":null,"date":"2023-07-10T15:55:27","name":"[x86-64] RFC: Add nosse abi attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.LSU.2.20.2307101549210.13548@wotan.suse.de/mbox/"},{"id":117974,"url":"https://patchwork.plctlab.org/api/1.2/patches/117974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com/","msgid":"<227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com>","list_archive_url":null,"date":"2023-07-10T16:47:55","name":"[OBVIOUS] rs6000: Remove redundant MEM_P predicate usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com/mbox/"},{"id":118008,"url":"https://patchwork.plctlab.org/api/1.2/patches/118008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0e6013f-ca38-b98d-dc01-b30adbd5901a@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-07-10T18:33:58","name":"[OpenACC,2.7] readonly modifier support in front-ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0e6013f-ca38-b98d-dc01-b30adbd5901a@siemens.com/mbox/"},{"id":118014,"url":"https://patchwork.plctlab.org/api/1.2/patches/118014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzv7iold.fsf@oldenburg.str.redhat.com/","msgid":"<87jzv7iold.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-10T18:54:54","name":"libgcc: Fix -Wint-conversion warning in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzv7iold.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118028,"url":"https://patchwork.plctlab.org/api/1.2/patches/118028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710191138.1534922-1-qing.zhao@oracle.com/","msgid":"<20230710191138.1534922-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-07-10T19:11:38","name":"gcc-14/changes.html: Deprecate a GCC C extension on flexible array members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710191138.1534922-1-qing.zhao@oracle.com/mbox/"},{"id":118029,"url":"https://patchwork.plctlab.org/api/1.2/patches/118029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com/","msgid":"<32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-10T19:18:10","name":"[ver3] rs6000, Add return value to __builtin_set_fpscr_rn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com/mbox/"},{"id":118048,"url":"https://patchwork.plctlab.org/api/1.2/patches/118048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhF+qhjby3+V3F@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:50:47","name":"Optimize vec_splats of vec_extract for V2DI/V2DF (PR target/99293)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhF+qhjby3+V3F@cowardly-lion.the-meissners.org/mbox/"},{"id":118049,"url":"https://patchwork.plctlab.org/api/1.2/patches/118049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhXGgvRPO1VgAK@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:51:56","name":"Improve 64->128 bit zero extension on PowerPC (PR target/108958)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhXGgvRPO1VgAK@cowardly-lion.the-meissners.org/mbox/"},{"id":118050,"url":"https://patchwork.plctlab.org/api/1.2/patches/118050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZN4unwZ2+rFcyu+OLkqsqs2Ow5ZibUQedxP7txepNHjg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:55:51","name":"[committed] reorg: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZN4unwZ2+rFcyu+OLkqsqs2Ow5ZibUQedxP7txepNHjg@mail.gmail.com/mbox/"},{"id":118051,"url":"https://patchwork.plctlab.org/api/1.2/patches/118051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxjMDOl1K/d5z23@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:59:44","name":"Fix typo in insn name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxjMDOl1K/d5z23@cowardly-lion.the-meissners.org/mbox/"},{"id":118070,"url":"https://patchwork.plctlab.org/api/1.2/patches/118070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710203326.79631-1-polacek@redhat.com/","msgid":"<20230710203326.79631-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-10T20:33:26","name":"testsuite: fix allocator-opt1.C FAIL with old ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710203326.79631-1-polacek@redhat.com/mbox/"},{"id":118120,"url":"https://patchwork.plctlab.org/api/1.2/patches/118120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com/","msgid":"<59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com>","list_archive_url":null,"date":"2023-07-10T22:07:39","name":"libgomp: Update OpenMP memory allocation doc, fix omp_high_bw_mem_space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com/mbox/"},{"id":118121,"url":"https://patchwork.plctlab.org/api/1.2/patches/118121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710220957.1579524-1-ibuclaw@gdcproject.org/","msgid":"<20230710220957.1579524-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-10T22:09:57","name":"[committed] d: Merge upstream dmd, druntime a88e1335f7, phobos 1921d29df.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710220957.1579524-1-ibuclaw@gdcproject.org/mbox/"},{"id":118218,"url":"https://patchwork.plctlab.org/api/1.2/patches/118218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711031356.3066611-1-hongtao.liu@intel.com/","msgid":"<20230711031356.3066611-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T03:13:56","name":"Add peephole to eliminate redundant comparison after cmpccxadd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711031356.3066611-1-hongtao.liu@intel.com/mbox/"},{"id":118224,"url":"https://patchwork.plctlab.org/api/1.2/patches/118224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711033639.3081376-1-haochen.jiang@intel.com/","msgid":"<20230711033639.3081376-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-11T03:36:39","name":"i386: Guard 128 bit VAES builtins with AVX512VL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711033639.3081376-1-haochen.jiang@intel.com/mbox/"},{"id":118254,"url":"https://patchwork.plctlab.org/api/1.2/patches/118254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711040130.3090884-1-hongtao.liu@intel.com/","msgid":"<20230711040130.3090884-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T04:01:30","name":"[v2] Break false dependence for vpternlog by inserting vpxor or setting constraint of input operand to '\''0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711040130.3090884-1-hongtao.liu@intel.com/mbox/"},{"id":118248,"url":"https://patchwork.plctlab.org/api/1.2/patches/118248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711044401.1405808-1-christoph.muellner@vrull.eu/","msgid":"<20230711044401.1405808-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-11T04:44:01","name":"riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711044401.1405808-1-christoph.muellner@vrull.eu/mbox/"},{"id":118273,"url":"https://patchwork.plctlab.org/api/1.2/patches/118273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b620e634-3adf-dba7-51a1-25220a150d6c@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T06:03:51","name":"[v3] x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b620e634-3adf-dba7-51a1-25220a150d6c@suse.com/mbox/"},{"id":118275,"url":"https://patchwork.plctlab.org/api/1.2/patches/118275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d75a4d5a-8624-aa77-9f29-140767357b58@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T06:08:00","name":"x86: improve fast bfloat->float conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d75a4d5a-8624-aa77-9f29-140767357b58@suse.com/mbox/"},{"id":118283,"url":"https://patchwork.plctlab.org/api/1.2/patches/118283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711063828.331387-1-juzhe.zhong@rivai.ai/","msgid":"<20230711063828.331387-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-11T06:38:28","name":"RISC-V: Optimize permutation codegen with vcompress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711063828.331387-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118307,"url":"https://patchwork.plctlab.org/api/1.2/patches/118307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site/","msgid":"<2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site>","list_archive_url":null,"date":"2023-07-11T08:12:26","name":"[pushed] testsuite: Unbreak pr110557.cc where long is 32-bit (was Re: Pushed: [PATCH v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site/mbox/"},{"id":118336,"url":"https://patchwork.plctlab.org/api/1.2/patches/118336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711090413.3587421-1-guojiufu@linux.ibm.com/","msgid":"<20230711090413.3587421-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-11T09:04:13","name":"[V4] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711090413.3587421-1-guojiufu@linux.ibm.com/mbox/"},{"id":118337,"url":"https://patchwork.plctlab.org/api/1.2/patches/118337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711091349.3376586-1-hongtao.liu@intel.com/","msgid":"<20230711091349.3376586-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T09:13:49","name":"Add peephole to eliminate redundant comparison after cmpccxadd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711091349.3376586-1-hongtao.liu@intel.com/mbox/"},{"id":118349,"url":"https://patchwork.plctlab.org/api/1.2/patches/118349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092548.2323955-1-poulhies@adacore.com/","msgid":"<20230711092548.2323955-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-11T09:25:48","name":"[COMMITTED] ada: Fix wrong resolution for hidden discriminant in predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092548.2323955-1-poulhies@adacore.com/mbox/"},{"id":118350,"url":"https://patchwork.plctlab.org/api/1.2/patches/118350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092559.2324105-1-poulhies@adacore.com/","msgid":"<20230711092559.2324105-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-11T09:25:59","name":"[COMMITTED] ada: Avoid renaming_decl in case of constrained array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092559.2324105-1-poulhies@adacore.com/mbox/"},{"id":118356,"url":"https://patchwork.plctlab.org/api/1.2/patches/118356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6qeqma.fsf@oldenburg.str.redhat.com/","msgid":"<875y6qeqma.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:37:01","name":"aarch64: Fix warnings during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6qeqma.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118364,"url":"https://patchwork.plctlab.org/api/1.2/patches/118364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg42dbzt.fsf@oldenburg.str.redhat.com/","msgid":"<87zg42dbzt.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:14","name":"m68k: Avoid implicit function declaration in libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg42dbzt.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118371,"url":"https://patchwork.plctlab.org/api/1.2/patches/118371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8eqdbz9.fsf@oldenburg.str.redhat.com/","msgid":"<87v8eqdbz9.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:34","name":"csky: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8eqdbz9.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118379,"url":"https://patchwork.plctlab.org/api/1.2/patches/118379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0pedbyq.fsf@oldenburg.str.redhat.com/","msgid":"<87r0pedbyq.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:53","name":"riscv: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0pedbyq.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118372,"url":"https://patchwork.plctlab.org/api/1.2/patches/118372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt02dby7.fsf@oldenburg.str.redhat.com/","msgid":"<87mt02dby7.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:39:12","name":"arc: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt02dby7.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118373,"url":"https://patchwork.plctlab.org/api/1.2/patches/118373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilaqdbxn.fsf@oldenburg.str.redhat.com/","msgid":"<87ilaqdbxn.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:39:32","name":"or1k: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilaqdbxn.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118406,"url":"https://patchwork.plctlab.org/api/1.2/patches/118406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711102308.129C83855587@sourceware.org/","msgid":"<20230711102308.129C83855587@sourceware.org>","list_archive_url":null,"date":"2023-07-11T10:22:23","name":"tree-optimization/110614 - SLP splat and re-align (optimized)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711102308.129C83855587@sourceware.org/mbox/"},{"id":118411,"url":"https://patchwork.plctlab.org/api/1.2/patches/118411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-2-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:51","name":"[1/3] fortran: defer class wrapper initialization after deallocation [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-2-mikael@gcc.gnu.org/mbox/"},{"id":118412,"url":"https://patchwork.plctlab.org/api/1.2/patches/118412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-3-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:52","name":"[2/3] fortran: Factor data references for scalar class argument wrapping [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-3-mikael@gcc.gnu.org/mbox/"},{"id":118413,"url":"https://patchwork.plctlab.org/api/1.2/patches/118413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-4-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:53","name":"[3/3] fortran: Reorder array argument evaluation parts [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-4-mikael@gcc.gnu.org/mbox/"},{"id":118414,"url":"https://patchwork.plctlab.org/api/1.2/patches/118414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com/","msgid":"<34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com>","list_archive_url":null,"date":"2023-07-11T10:35:38","name":"libgomp: Use libnuma for OpenMP'\''s partition=nearest allocation trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com/mbox/"},{"id":118415,"url":"https://patchwork.plctlab.org/api/1.2/patches/118415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddd7f9cd-994e-0baf-33a3-34c27539f2b1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T10:37:19","name":"Include insn-opinit.h in PLUGIN_H [PR110610]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddd7f9cd-994e-0baf-33a3-34c27539f2b1@arm.com/mbox/"},{"id":118435,"url":"https://patchwork.plctlab.org/api/1.2/patches/118435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com/","msgid":"<8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com>","list_archive_url":null,"date":"2023-07-11T11:51:46","name":"genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com/mbox/"},{"id":118437,"url":"https://patchwork.plctlab.org/api/1.2/patches/118437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711120835.2043753-1-mikael@gcc.gnu.org/","msgid":"<20230711120835.2043753-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T12:08:35","name":"fortran: Release symbols in reversed order [PR106050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711120835.2043753-1-mikael@gcc.gnu.org/mbox/"},{"id":118441,"url":"https://patchwork.plctlab.org/api/1.2/patches/118441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711121639.2421168-1-ppalka@redhat.com/","msgid":"<20230711121639.2421168-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-11T12:16:39","name":"c++: coercing variable template from current inst [PR110580]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711121639.2421168-1-ppalka@redhat.com/mbox/"},{"id":118492,"url":"https://patchwork.plctlab.org/api/1.2/patches/118492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK1PLZaV457x2pTt@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-11T12:46:37","name":"Loop-ch improvements, part 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK1PLZaV457x2pTt@kam.mff.cuni.cz/mbox/"},{"id":118525,"url":"https://patchwork.plctlab.org/api/1.2/patches/118525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d2aba95-9433-8419-126b-cae83075422e@gmail.com/","msgid":"<7d2aba95-9433-8419-126b-cae83075422e@gmail.com>","list_archive_url":null,"date":"2023-07-11T13:31:13","name":"genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d2aba95-9433-8419-126b-cae83075422e@gmail.com/mbox/"},{"id":118531,"url":"https://patchwork.plctlab.org/api/1.2/patches/118531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711133523.3617092-1-hongtao.liu@intel.com/","msgid":"<20230711133523.3617092-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T13:35:23","name":"Fix typo in the testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711133523.3617092-1-hongtao.liu@intel.com/mbox/"},{"id":118614,"url":"https://patchwork.plctlab.org/api/1.2/patches/118614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711153949.6676-1-cooper.qu@linux.alibaba.com/","msgid":"<20230711153949.6676-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-11T15:39:49","name":"[1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711153949.6676-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":118646,"url":"https://patchwork.plctlab.org/api/1.2/patches/118646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YfabfMForrLNJp51ML5YNt8zSTFEx_NdGSgs0BzABOtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T16:36:16","name":"[committed] cfg+gcse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YfabfMForrLNJp51ML5YNt8zSTFEx_NdGSgs0BzABOtw@mail.gmail.com/mbox/"},{"id":118690,"url":"https://patchwork.plctlab.org/api/1.2/patches/118690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com/","msgid":"<5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-11T18:06:52","name":"[ver4] rs6000, Add return value to __builtin_set_fpscr_rn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com/mbox/"},{"id":118691,"url":"https://patchwork.plctlab.org/api/1.2/patches/118691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com/","msgid":"<028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-11T19:07:50","name":"[x86] PR target/110598: Fix rega = 0; rega ^= rega regression.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com/mbox/"},{"id":118693,"url":"https://patchwork.plctlab.org/api/1.2/patches/118693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-bb05afea-59cc-4557-8d76-9f901044315b-1689104371308@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-07-11T19:39:31","name":"Fortran: formal symbol attributes for intrinsic procedures [PR110288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-bb05afea-59cc-4557-8d76-9f901044315b-1689104371308@3c-app-gmx-bs33/mbox/"},{"id":118702,"url":"https://patchwork.plctlab.org/api/1.2/patches/118702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com/","msgid":"<02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-11T20:07:10","name":"[x86] Fix FAIL of gcc.target/i386/pr91681-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com/mbox/"},{"id":118707,"url":"https://patchwork.plctlab.org/api/1.2/patches/118707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com/","msgid":"<7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com>","list_archive_url":null,"date":"2023-07-11T20:24:44","name":"[v2] genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com/mbox/"},{"id":118727,"url":"https://patchwork.plctlab.org/api/1.2/patches/118727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-2-david.faust@oracle.com/","msgid":"<20230711215716.12980-2-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:08","name":"[1/9] c-family: add btf_decl_tag attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-2-david.faust@oracle.com/mbox/"},{"id":118720,"url":"https://patchwork.plctlab.org/api/1.2/patches/118720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-3-david.faust@oracle.com/","msgid":"<20230711215716.12980-3-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:09","name":"[2/9] include: add BTF decl tag defines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-3-david.faust@oracle.com/mbox/"},{"id":118722,"url":"https://patchwork.plctlab.org/api/1.2/patches/118722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-4-david.faust@oracle.com/","msgid":"<20230711215716.12980-4-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:10","name":"[3/9] dwarf: create annotation DIEs for decl tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-4-david.faust@oracle.com/mbox/"},{"id":118723,"url":"https://patchwork.plctlab.org/api/1.2/patches/118723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-5-david.faust@oracle.com/","msgid":"<20230711215716.12980-5-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:11","name":"[4/9] dwarf: expose get_die_parent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-5-david.faust@oracle.com/mbox/"},{"id":118721,"url":"https://patchwork.plctlab.org/api/1.2/patches/118721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-6-david.faust@oracle.com/","msgid":"<20230711215716.12980-6-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:12","name":"[5/9] ctf: add support to pass through BTF tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-6-david.faust@oracle.com/mbox/"},{"id":118725,"url":"https://patchwork.plctlab.org/api/1.2/patches/118725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-7-david.faust@oracle.com/","msgid":"<20230711215716.12980-7-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:13","name":"[6/9] dwarf2ctf: convert annotation DIEs to CTF types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-7-david.faust@oracle.com/mbox/"},{"id":118729,"url":"https://patchwork.plctlab.org/api/1.2/patches/118729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-8-david.faust@oracle.com/","msgid":"<20230711215716.12980-8-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:14","name":"[7/9] btf: create and output BTF_KIND_DECL_TAG types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-8-david.faust@oracle.com/mbox/"},{"id":118726,"url":"https://patchwork.plctlab.org/api/1.2/patches/118726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-9-david.faust@oracle.com/","msgid":"<20230711215716.12980-9-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:15","name":"[8/9] testsuite: add tests for BTF decl tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-9-david.faust@oracle.com/mbox/"},{"id":118724,"url":"https://patchwork.plctlab.org/api/1.2/patches/118724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-10-david.faust@oracle.com/","msgid":"<20230711215716.12980-10-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:16","name":"[9/9] doc: document btf_decl_tag attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-10-david.faust@oracle.com/mbox/"},{"id":118789,"url":"https://patchwork.plctlab.org/api/1.2/patches/118789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712031935.3908564-1-yunqiang.su@cipunited.com/","msgid":"<20230712031935.3908564-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-12T03:19:35","name":"[RFC] Store_bit_field_1: Use mode of SUBREG instead of REG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712031935.3908564-1-yunqiang.su@cipunited.com/mbox/"},{"id":118792,"url":"https://patchwork.plctlab.org/api/1.2/patches/118792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712032730.40158-1-lehua.ding@rivai.ai/","msgid":"<20230712032730.40158-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-12T03:27:30","name":"RISC-V: Throw compilation error for unknown sub-extension or supervisor extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712032730.40158-1-lehua.ding@rivai.ai/mbox/"},{"id":118804,"url":"https://patchwork.plctlab.org/api/1.2/patches/118804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040133.88791-1-lehua.ding@rivai.ai/","msgid":"<20230712040133.88791-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:01:33","name":"mklog: Add --append option to auto add generate ChangeLog to patch file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040133.88791-1-lehua.ding@rivai.ai/mbox/"},{"id":118805,"url":"https://patchwork.plctlab.org/api/1.2/patches/118805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040502.3283038-1-pan2.li@intel.com/","msgid":"<20230712040502.3283038-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T04:05:02","name":"[V6] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040502.3283038-1-pan2.li@intel.com/mbox/"},{"id":118808,"url":"https://patchwork.plctlab.org/api/1.2/patches/118808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/","msgid":"<20230712042124.111818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:21:24","name":"VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118814,"url":"https://patchwork.plctlab.org/api/1.2/patches/118814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712044424.75724-1-juzhe.zhong@rivai.ai/","msgid":"<20230712044424.75724-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:44:24","name":"RISC-V: Support COND_LEN_* patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712044424.75724-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118829,"url":"https://patchwork.plctlab.org/api/1.2/patches/118829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712054609.3958442-1-pan2.li@intel.com/","msgid":"<20230712054609.3958442-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T05:46:09","name":"[v1] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712054609.3958442-1-pan2.li@intel.com/mbox/"},{"id":118830,"url":"https://patchwork.plctlab.org/api/1.2/patches/118830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055053.4016796-1-pan2.li@intel.com/","msgid":"<20230712055053.4016796-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T05:50:53","name":"[v2] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055053.4016796-1-pan2.li@intel.com/mbox/"},{"id":118831,"url":"https://patchwork.plctlab.org/api/1.2/patches/118831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055613.1716215-1-zewei.mo@intel.com/","msgid":"<20230712055613.1716215-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-12T05:56:13","name":"Initial Granite Rapids D Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055613.1716215-1-zewei.mo@intel.com/mbox/"},{"id":118839,"url":"https://patchwork.plctlab.org/api/1.2/patches/118839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712062855.13455-1-guojie@loongson.cn/","msgid":"<20230712062855.13455-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-07-12T06:28:55","name":"LoongArch: Fix the missing include file when using gcc plugins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712062855.13455-1-guojie@loongson.cn/mbox/"},{"id":118944,"url":"https://patchwork.plctlab.org/api/1.2/patches/118944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712083923.92799-1-juzhe.zhong@rivai.ai/","msgid":"<20230712083923.92799-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T08:39:23","name":"RISC-V: Support integer mult highpart auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712083923.92799-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119025,"url":"https://patchwork.plctlab.org/api/1.2/patches/119025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712093849.102131-1-juzhe.zhong@rivai.ai/","msgid":"<20230712093849.102131-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T09:38:49","name":"[V7] RISC-V: RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712093849.102131-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119056,"url":"https://patchwork.plctlab.org/api/1.2/patches/119056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712103621.47696-1-juzhe.zhong@rivai.ai/","msgid":"<20230712103621.47696-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T10:36:21","name":"[V2] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712103621.47696-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119077,"url":"https://patchwork.plctlab.org/api/1.2/patches/119077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712110100.3B3AD3857726@sourceware.org/","msgid":"<20230712110100.3B3AD3857726@sourceware.org>","list_archive_url":null,"date":"2023-07-12T11:00:16","name":"tree-optimization/110630 - enhance SLP permute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712110100.3B3AD3857726@sourceware.org/mbox/"},{"id":119083,"url":"https://patchwork.plctlab.org/api/1.2/patches/119083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com/","msgid":"<4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com>","list_archive_url":null,"date":"2023-07-12T11:05:10","name":"[IRA] Skip empty register classes in setup_reg_class_relations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com/mbox/"},{"id":119086,"url":"https://patchwork.plctlab.org/api/1.2/patches/119086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712111608.71951-1-juzhe.zhong@rivai.ai/","msgid":"<20230712111608.71951-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T11:16:08","name":"[V3] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712111608.71951-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119165,"url":"https://patchwork.plctlab.org/api/1.2/patches/119165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712131739.270277-1-juzhe.zhong@rivai.ai/","msgid":"<20230712131739.270277-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T13:17:39","name":"[V4] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712131739.270277-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119177,"url":"https://patchwork.plctlab.org/api/1.2/patches/119177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712133740.7216B3858020@sourceware.org/","msgid":"<20230712133740.7216B3858020@sourceware.org>","list_archive_url":null,"date":"2023-07-12T13:36:56","name":"tree-optimization/94864 - vector insert of vector extract simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712133740.7216B3858020@sourceware.org/mbox/"},{"id":119183,"url":"https://patchwork.plctlab.org/api/1.2/patches/119183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-1-julian@codesourcery.com/","msgid":"<20230712134207.123424-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T13:42:06","name":"[og13] OpenACC: Vector length warning fixes for implicit mapping/declare create tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-1-julian@codesourcery.com/mbox/"},{"id":119184,"url":"https://patchwork.plctlab.org/api/1.2/patches/119184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-2-julian@codesourcery.com/","msgid":"<20230712134207.123424-2-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T13:42:07","name":"OpenMP: Strided/rectangular '\''target update'\'' out-of-bounds array lookup fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-2-julian@codesourcery.com/mbox/"},{"id":119212,"url":"https://patchwork.plctlab.org/api/1.2/patches/119212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com/","msgid":"<4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T14:17:30","name":"[committed] libgomp.texi: add cross ref, remove duplicated entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com/mbox/"},{"id":119224,"url":"https://patchwork.plctlab.org/api/1.2/patches/119224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZHTn7U9ejR8+K+f+GUy=sf=aN5_UorSVrDyezWadgb6g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T14:32:46","name":"[committed] ifcvt: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZHTn7U9ejR8+K+f+GUy=sf=aN5_UorSVrDyezWadgb6g@mail.gmail.com/mbox/"},{"id":119232,"url":"https://patchwork.plctlab.org/api/1.2/patches/119232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712150302.3517511-1-pan2.li@intel.com/","msgid":"<20230712150302.3517511-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T15:03:02","name":"[v1] RISC-V: Add more tests for RVV floating-point FRM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712150302.3517511-1-pan2.li@intel.com/mbox/"},{"id":119245,"url":"https://patchwork.plctlab.org/api/1.2/patches/119245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712152438.296209-1-juzhe.zhong@rivai.ai/","msgid":"<20230712152438.296209-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T15:24:38","name":"[V2] RISC-V: Support COND_LEN_* patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712152438.296209-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119251,"url":"https://patchwork.plctlab.org/api/1.2/patches/119251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712154138.2837658-1-ppalka@redhat.com/","msgid":"<20230712154138.2837658-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-12T15:41:38","name":"c++: constrained surrogate calls [PR110535]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712154138.2837658-1-ppalka@redhat.com/mbox/"},{"id":119259,"url":"https://patchwork.plctlab.org/api/1.2/patches/119259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712160802.998150-1-apinski@marvell.com/","msgid":"<20230712160802.998150-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-12T16:08:02","name":"Fix part of PR 110293: `A NEEQ (A NEEQ CST)` part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712160802.998150-1-apinski@marvell.com/mbox/"},{"id":119264,"url":"https://patchwork.plctlab.org/api/1.2/patches/119264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712162108.50227-1-aldyh@redhat.com/","msgid":"<20230712162108.50227-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T16:21:08","name":"[COMMITTED,range-op] Enable value/mask propagation in range-op.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712162108.50227-1-aldyh@redhat.com/mbox/"},{"id":119323,"url":"https://patchwork.plctlab.org/api/1.2/patches/119323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712184747.3213450-1-ppalka@redhat.com/","msgid":"<20230712184747.3213450-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-12T18:47:47","name":"c++: non-standalone surrogate call template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712184747.3213450-1-ppalka@redhat.com/mbox/"},{"id":119325,"url":"https://patchwork.plctlab.org/api/1.2/patches/119325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aRuKRYpydsdxmfLOuGgcuO08FXgeyD6AQt=0jjfQV1_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T19:11:50","name":"[committed] IRA+LRA: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aRuKRYpydsdxmfLOuGgcuO08FXgeyD6AQt=0jjfQV1_g@mail.gmail.com/mbox/"},{"id":119328,"url":"https://patchwork.plctlab.org/api/1.2/patches/119328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712200500.1914419-1-jwakely@redhat.com/","msgid":"<20230712200500.1914419-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-12T20:04:38","name":"[committed] libstdc++: Check conversion from filesystem::path to wide strings [PR95048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712200500.1914419-1-jwakely@redhat.com/mbox/"},{"id":119333,"url":"https://patchwork.plctlab.org/api/1.2/patches/119333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sPmfwnyQq4C2AQHgMbm6uxggVFGFK63_Q=yyXC+KCwTOA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T20:59:30","name":"RISC-V: Folding memory for FP + constant case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sPmfwnyQq4C2AQHgMbm6uxggVFGFK63_Q=yyXC+KCwTOA@mail.gmail.com/mbox/"},{"id":119346,"url":"https://patchwork.plctlab.org/api/1.2/patches/119346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-1-aldyh@redhat.com/","msgid":"<20230712211528.65888-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T21:15:27","name":"[COMMITTED,range-op] Take known set bits into account in popcount [PR107053]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-1-aldyh@redhat.com/mbox/"},{"id":119347,"url":"https://patchwork.plctlab.org/api/1.2/patches/119347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-2-aldyh@redhat.com/","msgid":"<20230712211528.65888-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T21:15:29","name":"[COMMITTED,range-op] Take known mask into account for bitwise ands [PR107043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-2-aldyh@redhat.com/mbox/"},{"id":119414,"url":"https://patchwork.plctlab.org/api/1.2/patches/119414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK83jHIDeUA9U1LU@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-12T23:30:20","name":"Loop-ch improvements, part 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK83jHIDeUA9U1LU@kam.mff.cuni.cz/mbox/"},{"id":119457,"url":"https://patchwork.plctlab.org/api/1.2/patches/119457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-1-kmatsui@gcc.gnu.org/","msgid":"<20230713011127.98367-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:11:25","name":"[v3,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119458,"url":"https://patchwork.plctlab.org/api/1.2/patches/119458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-2-kmatsui@gcc.gnu.org/","msgid":"<20230713011127.98367-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:11:26","name":"[v3,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119466,"url":"https://patchwork.plctlab.org/api/1.2/patches/119466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-1-kmatsui@gcc.gnu.org/","msgid":"<20230713014351.6442-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:43:50","name":"[v2,1/2] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119467,"url":"https://patchwork.plctlab.org/api/1.2/patches/119467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-2-kmatsui@gcc.gnu.org/","msgid":"<20230713014351.6442-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:43:51","name":"[v2,2/2] libstdc++: Use new built-in trait __is_signed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119483,"url":"https://patchwork.plctlab.org/api/1.2/patches/119483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-2-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:35","name":"[v10,1/5] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119482,"url":"https://patchwork.plctlab.org/api/1.2/patches/119482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-3-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:36","name":"[v10,2/5] libstdc++: Use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-3-kmatsui@gcc.gnu.org/mbox/"},{"id":119484,"url":"https://patchwork.plctlab.org/api/1.2/patches/119484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-4-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:37","name":"[v10,3/5] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-4-kmatsui@gcc.gnu.org/mbox/"},{"id":119485,"url":"https://patchwork.plctlab.org/api/1.2/patches/119485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-5-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:38","name":"[v10,4/5] libstdc++: Use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-5-kmatsui@gcc.gnu.org/mbox/"},{"id":119486,"url":"https://patchwork.plctlab.org/api/1.2/patches/119486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-6-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:39","name":"[v10,5/5] libstdc++: Make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-6-kmatsui@gcc.gnu.org/mbox/"},{"id":119490,"url":"https://patchwork.plctlab.org/api/1.2/patches/119490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-1-kmatsui@gcc.gnu.org/","msgid":"<20230713031601.17787-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:16:00","name":"[v4,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119492,"url":"https://patchwork.plctlab.org/api/1.2/patches/119492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-2-kmatsui@gcc.gnu.org/","msgid":"<20230713031601.17787-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:16:01","name":"[v4,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119494,"url":"https://patchwork.plctlab.org/api/1.2/patches/119494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-1-kmatsui@gcc.gnu.org/","msgid":"<20230713031901.18162-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:19:00","name":"[v5,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119497,"url":"https://patchwork.plctlab.org/api/1.2/patches/119497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-2-kmatsui@gcc.gnu.org/","msgid":"<20230713031901.18162-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:19:01","name":"[v5,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119540,"url":"https://patchwork.plctlab.org/api/1.2/patches/119540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713050235.2864130-1-pan2.li@intel.com/","msgid":"<20230713050235.2864130-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-13T05:02:35","name":"[v3] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713050235.2864130-1-pan2.li@intel.com/mbox/"},{"id":119541,"url":"https://patchwork.plctlab.org/api/1.2/patches/119541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051001.2869210-1-pan2.li@intel.com/","msgid":"<20230713051001.2869210-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-13T05:10:01","name":"[v2] RISC-V: Add more tests for RVV floating-point FRM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051001.2869210-1-pan2.li@intel.com/mbox/"},{"id":119543,"url":"https://patchwork.plctlab.org/api/1.2/patches/119543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051716.3099259-1-juzhe.zhong@rivai.ai/","msgid":"<20230713051716.3099259-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T05:17:16","name":"SSA MATH: Support COND_LEN_FMA for floating-point math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051716.3099259-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119551,"url":"https://patchwork.plctlab.org/api/1.2/patches/119551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-1-monk.chiang@sifive.com/","msgid":"<20230713053856.101950-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-07-13T05:38:55","name":"[1/2] RISC-V: Recognized zihintntl extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-1-monk.chiang@sifive.com/mbox/"},{"id":119552,"url":"https://patchwork.plctlab.org/api/1.2/patches/119552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-2-monk.chiang@sifive.com/","msgid":"<20230713053856.101950-2-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-07-13T05:38:56","name":"[2/2] RISC-V: Implement locality for __builtin_prefetch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-2-monk.chiang@sifive.com/mbox/"},{"id":119559,"url":"https://patchwork.plctlab.org/api/1.2/patches/119559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-2-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:32","name":"[1/4] Support Intel AVX-VNNI-INT16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-2-haochen.jiang@intel.com/mbox/"},{"id":119557,"url":"https://patchwork.plctlab.org/api/1.2/patches/119557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-3-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:33","name":"[2/4] Support Intel SM3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-3-haochen.jiang@intel.com/mbox/"},{"id":119558,"url":"https://patchwork.plctlab.org/api/1.2/patches/119558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-4-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:34","name":"[3/4] Support Intel SHA512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-4-haochen.jiang@intel.com/mbox/"},{"id":119556,"url":"https://patchwork.plctlab.org/api/1.2/patches/119556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-5-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:35","name":"[4/4] Support Intel SM4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-5-haochen.jiang@intel.com/mbox/"},{"id":119560,"url":"https://patchwork.plctlab.org/api/1.2/patches/119560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713061208.916308-1-yanzhang.wang@intel.com/","msgid":"<20230713061208.916308-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:12:08","name":"RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713061208.916308-1-yanzhang.wang@intel.com/mbox/"},{"id":119561,"url":"https://patchwork.plctlab.org/api/1.2/patches/119561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713063142.66310-1-chenyixuan@iscas.ac.cn/","msgid":"<20230713063142.66310-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-07-13T06:31:42","name":"Add VXRM enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713063142.66310-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":119629,"url":"https://patchwork.plctlab.org/api/1.2/patches/119629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713083209.49847-1-lehua.ding@rivai.ai/","msgid":"<20230713083209.49847-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-13T08:32:09","name":"[V2] RISC-V: Throw compilation error for unknown sub-extension or supervisor extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713083209.49847-1-lehua.ding@rivai.ai/mbox/"},{"id":119669,"url":"https://patchwork.plctlab.org/api/1.2/patches/119669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-2-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:23","name":"[01/14] fortran: Outline final procedure pointer evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-2-mikael@gcc.gnu.org/mbox/"},{"id":119671,"url":"https://patchwork.plctlab.org/api/1.2/patches/119671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-3-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:24","name":"[02/14] fortran: Outline element size evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-3-mikael@gcc.gnu.org/mbox/"},{"id":119672,"url":"https://patchwork.plctlab.org/api/1.2/patches/119672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-4-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:25","name":"[03/14] fortran: Outline data reference descriptor evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-4-mikael@gcc.gnu.org/mbox/"},{"id":119673,"url":"https://patchwork.plctlab.org/api/1.2/patches/119673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-5-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-5-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:26","name":"[04/14] fortran: Inline gfc_build_final_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-5-mikael@gcc.gnu.org/mbox/"},{"id":119679,"url":"https://patchwork.plctlab.org/api/1.2/patches/119679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-6-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-6-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:27","name":"[05/14] fortran: Add missing cleanup blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-6-mikael@gcc.gnu.org/mbox/"},{"id":119675,"url":"https://patchwork.plctlab.org/api/1.2/patches/119675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-7-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-7-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:28","name":"[06/14] fortran: Reuse final procedure pointer expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-7-mikael@gcc.gnu.org/mbox/"},{"id":119670,"url":"https://patchwork.plctlab.org/api/1.2/patches/119670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-8-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-8-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:29","name":"[07/14] fortran: Push element size expression generation close to its usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-8-mikael@gcc.gnu.org/mbox/"},{"id":119684,"url":"https://patchwork.plctlab.org/api/1.2/patches/119684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-9-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-9-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:30","name":"[08/14] fortran: Push final procedure expr gen close to its one usage.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-9-mikael@gcc.gnu.org/mbox/"},{"id":119690,"url":"https://patchwork.plctlab.org/api/1.2/patches/119690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-10-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-10-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:31","name":"[09/14] fortran: Inline variable definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-10-mikael@gcc.gnu.org/mbox/"},{"id":119685,"url":"https://patchwork.plctlab.org/api/1.2/patches/119685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-11-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-11-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:32","name":"[10/14] fortran: Remove redundant argument in get_var_descr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-11-mikael@gcc.gnu.org/mbox/"},{"id":119674,"url":"https://patchwork.plctlab.org/api/1.2/patches/119674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-12-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-12-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:33","name":"[11/14] fortran: Outline virtual table pointer evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-12-mikael@gcc.gnu.org/mbox/"},{"id":119682,"url":"https://patchwork.plctlab.org/api/1.2/patches/119682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-13-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-13-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:34","name":"[12/14] fortran: Factor scalar descriptor generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-13-mikael@gcc.gnu.org/mbox/"},{"id":119694,"url":"https://patchwork.plctlab.org/api/1.2/patches/119694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-14-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-14-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:35","name":"[13/14] fortran: Use pre-evaluated class container if available [PR110618]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-14-mikael@gcc.gnu.org/mbox/"},{"id":119695,"url":"https://patchwork.plctlab.org/api/1.2/patches/119695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-15-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-15-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:36","name":"[14/14] fortran: Pass pre-calculated class container argument [pr110618]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-15-mikael@gcc.gnu.org/mbox/"},{"id":119692,"url":"https://patchwork.plctlab.org/api/1.2/patches/119692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085434.3381643-1-juzhe.zhong@rivai.ai/","msgid":"<20230713085434.3381643-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T08:54:34","name":"[V2] SSA MATH: Support COND_LEN_FMA for floating-point math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085434.3381643-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119699,"url":"https://patchwork.plctlab.org/api/1.2/patches/119699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf9srxhj.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-07-13T09:07:04","name":"m2, build: Use LDLFAGS for mklink","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf9srxhj.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":119734,"url":"https://patchwork.plctlab.org/api/1.2/patches/119734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713095402.E26EA385770D@sourceware.org/","msgid":"<20230713095402.E26EA385770D@sourceware.org>","list_archive_url":null,"date":"2023-07-13T09:53:14","name":"[RFC] tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713095402.E26EA385770D@sourceware.org/mbox/"},{"id":119755,"url":"https://patchwork.plctlab.org/api/1.2/patches/119755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-1-christophe.lyon@linaro.org/","msgid":"<20230713102140.1161573-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:21:39","name":"[1/2,testsuite,arm] : Make nomve_fp_1.c require arm_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-1-christophe.lyon@linaro.org/mbox/"},{"id":119756,"url":"https://patchwork.plctlab.org/api/1.2/patches/119756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-2-christophe.lyon@linaro.org/","msgid":"<20230713102140.1161573-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:21:40","name":"[2/2,testsuite,arm] : Make mve_fp_fpu[12].c accept single or double precision FPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-2-christophe.lyon@linaro.org/mbox/"},{"id":119758,"url":"https://patchwork.plctlab.org/api/1.2/patches/119758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-1-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:19","name":"[1/6] arm: [MVE intrinsics] Factorize vcaddq vhcaddq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-1-christophe.lyon@linaro.org/mbox/"},{"id":119764,"url":"https://patchwork.plctlab.org/api/1.2/patches/119764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-2-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:20","name":"[2/6] arm: [MVE intrinsics] rework vcaddq vhcaddq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-2-christophe.lyon@linaro.org/mbox/"},{"id":119759,"url":"https://patchwork.plctlab.org/api/1.2/patches/119759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-3-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:21","name":"[3/6] arm: [MVE intrinsics factorize vcmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-3-christophe.lyon@linaro.org/mbox/"},{"id":119761,"url":"https://patchwork.plctlab.org/api/1.2/patches/119761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-4-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:22","name":"[4/6] arm: [MVE intrinsics] rework vcmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-4-christophe.lyon@linaro.org/mbox/"},{"id":119760,"url":"https://patchwork.plctlab.org/api/1.2/patches/119760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-5-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:23","name":"[5/6] arm: [MVE intrinsics] factorize vcmlaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-5-christophe.lyon@linaro.org/mbox/"},{"id":119757,"url":"https://patchwork.plctlab.org/api/1.2/patches/119757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-6-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:24","name":"[6/6] arm: [MVE intrinsics] rework vcmlaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-6-christophe.lyon@linaro.org/mbox/"},{"id":119767,"url":"https://patchwork.plctlab.org/api/1.2/patches/119767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7abbe5a-2b77-00e6-a2ba-b390891d2a99@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T10:30:25","name":"vect: Handle demoting FLOAT and promoting FIX_TRUNC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7abbe5a-2b77-00e6-a2ba-b390891d2a99@gmail.com/mbox/"},{"id":119771,"url":"https://patchwork.plctlab.org/api/1.2/patches/119771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa222b94-ad9e-8c44-f99b-fbd8b8dc9d82@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T10:54:00","name":"[OpenACC,2.7,v2] Implement host_data must have use_device clause requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa222b94-ad9e-8c44-f99b-fbd8b8dc9d82@siemens.com/mbox/"},{"id":119786,"url":"https://patchwork.plctlab.org/api/1.2/patches/119786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713113247.249532-1-juzhe.zhong@rivai.ai/","msgid":"<20230713113247.249532-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T11:32:47","name":"RISC-V: Enable COND_LEN_FMA auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713113247.249532-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119879,"url":"https://patchwork.plctlab.org/api/1.2/patches/119879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713132017.3289546-1-ppalka@redhat.com/","msgid":"<20230713132017.3289546-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-13T13:20:17","name":"c++: mangling template-id of unknown template [PR110524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713132017.3289546-1-ppalka@redhat.com/mbox/"},{"id":119917,"url":"https://patchwork.plctlab.org/api/1.2/patches/119917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-2-manolis.tsamis@vrull.eu/","msgid":"<20230713140904.3274306-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:09:03","name":"[v2,1/2] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-2-manolis.tsamis@vrull.eu/mbox/"},{"id":119918,"url":"https://patchwork.plctlab.org/api/1.2/patches/119918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-3-manolis.tsamis@vrull.eu/","msgid":"<20230713140904.3274306-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:09:04","name":"[v2,2/2] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-3-manolis.tsamis@vrull.eu/mbox/"},{"id":119923,"url":"https://patchwork.plctlab.org/api/1.2/patches/119923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713141336.3950751-1-manolis.tsamis@vrull.eu/","msgid":"<20230713141336.3950751-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:13:36","name":"[v3] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713141336.3950751-1-manolis.tsamis@vrull.eu/mbox/"},{"id":119948,"url":"https://patchwork.plctlab.org/api/1.2/patches/119948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ade5eae2-b01d-1b8c-7c73-24e8192202fe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T14:52:44","name":"[pushed,RA,PR109520] : Catch error when there are no enough registers for asm insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ade5eae2-b01d-1b8c-7c73-24e8192202fe@redhat.com/mbox/"},{"id":120018,"url":"https://patchwork.plctlab.org/api/1.2/patches/120018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bhA8NxhyeZrngN6n9hM+JHRpZK+dF+Wfet1pEM+4KzUQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T16:39:41","name":"[committed] alpha: Fix computation mode in alpha_emit_set_long_cost [PR106966]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bhA8NxhyeZrngN6n9hM+JHRpZK+dF+Wfet1pEM+4KzUQ@mail.gmail.com/mbox/"},{"id":120020,"url":"https://patchwork.plctlab.org/api/1.2/patches/120020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com/","msgid":"<03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-13T16:45:13","name":"[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com/mbox/"},{"id":120025,"url":"https://patchwork.plctlab.org/api/1.2/patches/120025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713164756.3558785-2-mikpelinux@gmail.com/","msgid":"<20230713164756.3558785-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-07-13T16:47:57","name":"fix pdp11_expand_epilogue (PR target/107841)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713164756.3558785-2-mikpelinux@gmail.com/mbox/"},{"id":120031,"url":"https://patchwork.plctlab.org/api/1.2/patches/120031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713165948.1993395-1-jwakely@redhat.com/","msgid":"<20230713165948.1993395-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-13T16:59:30","name":"[committed] libstdc++: std::stoi etc. do not need C99 support [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713165948.1993395-1-jwakely@redhat.com/mbox/"},{"id":120055,"url":"https://patchwork.plctlab.org/api/1.2/patches/120055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com/","msgid":"<042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-13T17:10:47","name":"[x86] PR target/110588: Add *bt_setncqi_2 to generate btl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com/mbox/"},{"id":120084,"url":"https://patchwork.plctlab.org/api/1.2/patches/120084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713184923.3699777-1-ppalka@redhat.com/","msgid":"<20230713184923.3699777-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-13T18:49:23","name":"c++: copy elision of object arg in static memfn call [PR110441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713184923.3699777-1-ppalka@redhat.com/mbox/"},{"id":120086,"url":"https://patchwork.plctlab.org/api/1.2/patches/120086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLBIYYzqbMkt+HaZ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T18:54:25","name":"[v2] c++: wrong error with static constexpr var in tmpl [PR109876]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLBIYYzqbMkt+HaZ@redhat.com/mbox/"},{"id":120093,"url":"https://patchwork.plctlab.org/api/1.2/patches/120093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713191744.46960-1-iain@sandoe.co.uk/","msgid":"<20230713191744.46960-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-13T19:17:44","name":"[pushed] Darwin: Use -platform_version when available [PR110624].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713191744.46960-1-iain@sandoe.co.uk/mbox/"},{"id":120104,"url":"https://patchwork.plctlab.org/api/1.2/patches/120104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-1-kmatsui@gcc.gnu.org/","msgid":"<20230713204823.22303-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T20:48:22","name":"[v6,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120105,"url":"https://patchwork.plctlab.org/api/1.2/patches/120105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-2-kmatsui@gcc.gnu.org/","msgid":"<20230713204823.22303-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T20:48:23","name":"[v6,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-2-kmatsui@gcc.gnu.org/mbox/"},{"id":120119,"url":"https://patchwork.plctlab.org/api/1.2/patches/120119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713221709.3893367-1-juzhe.zhong@rivai.ai/","msgid":"<20230713221709.3893367-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T22:17:09","name":"[V2] RISC-V: Enable COND_LEN_FMA auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713221709.3893367-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120186,"url":"https://patchwork.plctlab.org/api/1.2/patches/120186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714020205.16214-1-lidie@eswincomputing.com/","msgid":"<20230714020205.16214-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-07-14T02:02:05","name":"RISC-V: Remove the redundant expressions in the and3.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714020205.16214-1-lidie@eswincomputing.com/mbox/"},{"id":120187,"url":"https://patchwork.plctlab.org/api/1.2/patches/120187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de/","msgid":"<467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de>","list_archive_url":null,"date":"2023-07-14T02:08:41","name":"[SH,committed] Fix PR 101469","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de/mbox/"},{"id":120197,"url":"https://patchwork.plctlab.org/api/1.2/patches/120197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025024.1408869-1-pan2.li@intel.com/","msgid":"<20230714025024.1408869-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-14T02:50:24","name":"[v1] RISC-V: Support basic floating-point dynamic rounding mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025024.1408869-1-pan2.li@intel.com/mbox/"},{"id":120200,"url":"https://patchwork.plctlab.org/api/1.2/patches/120200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025246.1757367-1-zewei.mo@intel.com/","msgid":"<20230714025246.1757367-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-14T02:52:46","name":"Initial Lunar Lake, Arrow Lake and Arrow Lake S Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025246.1757367-1-zewei.mo@intel.com/mbox/"},{"id":120249,"url":"https://patchwork.plctlab.org/api/1.2/patches/120249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714054908.1071907-1-naveenh@marvell.com/","msgid":"<20230714054908.1071907-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-07-14T05:49:08","name":"Implement Bit-field lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714054908.1071907-1-naveenh@marvell.com/mbox/"},{"id":120258,"url":"https://patchwork.plctlab.org/api/1.2/patches/120258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YrNr8GovPOMAhP29hw0edQeF7eBSKFif3NRu4RYF69+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T06:22:51","name":"cprop: Do not set REG_EQUAL note when simplifying paradoxical subreg [PR110206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YrNr8GovPOMAhP29hw0edQeF7eBSKFif3NRu4RYF69+A@mail.gmail.com/mbox/"},{"id":120259,"url":"https://patchwork.plctlab.org/api/1.2/patches/120259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714062413.2277485-1-haochen.jiang@intel.com/","msgid":"<20230714062413.2277485-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-14T06:24:13","name":"i386: Auto vectorize usdot_prod, udot_prod with AVXVNNIINT16 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714062413.2277485-1-haochen.jiang@intel.com/mbox/"},{"id":120329,"url":"https://patchwork.plctlab.org/api/1.2/patches/120329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714083530.F2E79138F8@imap2.suse-dmz.suse.de/","msgid":"<20230714083530.F2E79138F8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-14T08:35:30","name":"Provide extra checking for phi argument access from edge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714083530.F2E79138F8@imap2.suse-dmz.suse.de/mbox/"},{"id":120375,"url":"https://patchwork.plctlab.org/api/1.2/patches/120375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com/","msgid":"<620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com>","list_archive_url":null,"date":"2023-07-14T09:40:11","name":"x86: slightly enhance \"vec_dupv2df\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com/mbox/"},{"id":120376,"url":"https://patchwork.plctlab.org/api/1.2/patches/120376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7767255-af05-c9ab-aa54-107f02da8f32@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T09:42:11","name":"x86: avoid maybe_gen_...()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7767255-af05-c9ab-aa54-107f02da8f32@suse.com/mbox/"},{"id":120377,"url":"https://patchwork.plctlab.org/api/1.2/patches/120377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com/","msgid":"<28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com>","list_archive_url":null,"date":"2023-07-14T09:44:16","name":"x86: replace \"extendhfdf2\" expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com/mbox/"},{"id":120425,"url":"https://patchwork.plctlab.org/api/1.2/patches/120425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c17b2b7d-f5bc-df4e-e4a2-3fec01c08e2c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T11:20:42","name":"[committed] libgomp.texi: Extend memory allocation documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c17b2b7d-f5bc-df4e-e4a2-3fec01c08e2c@codesourcery.com/mbox/"},{"id":120445,"url":"https://patchwork.plctlab.org/api/1.2/patches/120445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8emptx6.fsf@oracle.com/","msgid":"<87v8emptx6.fsf@oracle.com>","list_archive_url":null,"date":"2023-07-14T12:19:17","name":"[COMMITTED] bpf: enable instruction scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8emptx6.fsf@oracle.com/mbox/"},{"id":120446,"url":"https://patchwork.plctlab.org/api/1.2/patches/120446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLE+G4KvU7loJtji@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-14T12:22:51","name":"Loop-ch improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLE+G4KvU7loJtji@kam.mff.cuni.cz/mbox/"},{"id":120455,"url":"https://patchwork.plctlab.org/api/1.2/patches/120455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714123038.1017670-1-juzhe.zhong@rivai.ai/","msgid":"<20230714123038.1017670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-14T12:30:38","name":"RISC-V: Support non-SLP unordered reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714123038.1017670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120475,"url":"https://patchwork.plctlab.org/api/1.2/patches/120475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714132050.2728477-1-pan2.li@intel.com/","msgid":"<20230714132050.2728477-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-14T13:20:50","name":"[v1] RISC-V: Fix RVV frm run test failure on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714132050.2728477-1-pan2.li@intel.com/mbox/"},{"id":120507,"url":"https://patchwork.plctlab.org/api/1.2/patches/120507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLFa4p55G/H78vE2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-14T14:25:38","name":"Turn TODO_rebuild_frequencies to a pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLFa4p55G/H78vE2@kam.mff.cuni.cz/mbox/"},{"id":120526,"url":"https://patchwork.plctlab.org/api/1.2/patches/120526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com/","msgid":"<7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com>","list_archive_url":null,"date":"2023-07-14T15:11:25","name":"vectorizer: Avoid an OOB access from vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com/mbox/"},{"id":120528,"url":"https://patchwork.plctlab.org/api/1.2/patches/120528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com/","msgid":"<632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com>","list_archive_url":null,"date":"2023-07-14T15:16:41","name":"[v2] vect: Handle demoting FLOAT and promoting FIX_TRUNC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com/mbox/"},{"id":120539,"url":"https://patchwork.plctlab.org/api/1.2/patches/120539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jm6sd0d.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T15:56:18","name":"[WIP,RFC] Add support for keyword-based attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jm6sd0d.fsf@arm.com/mbox/"},{"id":120555,"url":"https://patchwork.plctlab.org/api/1.2/patches/120555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-1-julian@codesourcery.com/","msgid":"<20230714163340.3464603-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-14T16:33:39","name":"[og13] OpenMP: Dimension ordering for array-shaping operator for C and C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-1-julian@codesourcery.com/mbox/"},{"id":120554,"url":"https://patchwork.plctlab.org/api/1.2/patches/120554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-2-julian@codesourcery.com/","msgid":"<20230714163340.3464603-2-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-14T16:33:40","name":"[og13] OpenMP: Enable c-c++-common/gomp/declare-mapper-3.c for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-2-julian@codesourcery.com/mbox/"},{"id":120681,"url":"https://patchwork.plctlab.org/api/1.2/patches/120681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com/","msgid":"<001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-14T18:56:22","name":"Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com/mbox/"},{"id":120696,"url":"https://patchwork.plctlab.org/api/1.2/patches/120696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714205542.1131700-1-apinski@marvell.com/","msgid":"<20230714205542.1131700-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-14T20:55:42","name":"Fix PR 110666: `(a != 2) == a` produces wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714205542.1131700-1-apinski@marvell.com/mbox/"},{"id":120700,"url":"https://patchwork.plctlab.org/api/1.2/patches/120700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714223744.264094-1-jason@redhat.com/","msgid":"<20230714223744.264094-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-14T22:37:44","name":"[pushed] c++: c++26 regression fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714223744.264094-1-jason@redhat.com/mbox/"},{"id":120704,"url":"https://patchwork.plctlab.org/api/1.2/patches/120704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714234500.75826-1-juzhe.zhong@rivai.ai/","msgid":"<20230714234500.75826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-14T23:45:00","name":"VECT: Add mask_len_fold_left_plus for in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714234500.75826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120717,"url":"https://patchwork.plctlab.org/api/1.2/patches/120717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1ji6ky5.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-07-15T01:08:02","name":"[v3] Introduce attribute reverse_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1ji6ky5.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":120728,"url":"https://patchwork.plctlab.org/api/1.2/patches/120728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715030156.26231-1-kmatsui@gcc.gnu.org/","msgid":"<20230715030156.26231-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T03:01:56","name":"libstdc++: Use __bool_constant entirely","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715030156.26231-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120734,"url":"https://patchwork.plctlab.org/api/1.2/patches/120734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-1-apinski@marvell.com/","msgid":"<20230715031957.1147225-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T03:19:56","name":"[1/2] Add flow_sensitive_info_storage and use it in gimple-fold.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-1-apinski@marvell.com/mbox/"},{"id":120735,"url":"https://patchwork.plctlab.org/api/1.2/patches/120735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-2-apinski@marvell.com/","msgid":"<20230715031957.1147225-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T03:19:57","name":"[2/2] Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info during match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-2-apinski@marvell.com/mbox/"},{"id":120750,"url":"https://patchwork.plctlab.org/api/1.2/patches/120750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-1-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:17","name":"[v2,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120751,"url":"https://patchwork.plctlab.org/api/1.2/patches/120751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-2-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:18","name":"[v2,2/3] libstdc++: Optimize is_arithmetic performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-2-kmatsui@gcc.gnu.org/mbox/"},{"id":120752,"url":"https://patchwork.plctlab.org/api/1.2/patches/120752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-3-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:19","name":"[v2,3/3] libstdc++: Optimize is_fundamental performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-3-kmatsui@gcc.gnu.org/mbox/"},{"id":120815,"url":"https://patchwork.plctlab.org/api/1.2/patches/120815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLLZwxcjxOxbEPVL@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-15T17:39:15","name":"[committed] hppa: Modify TLS patterns to provide both 32 and 64-bit support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLLZwxcjxOxbEPVL@mx3210.localdomain/mbox/"},{"id":120852,"url":"https://patchwork.plctlab.org/api/1.2/patches/120852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715213610.1191532-1-apinski@marvell.com/","msgid":"<20230715213610.1191532-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T21:36:10","name":"Update my contrib entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715213610.1191532-1-apinski@marvell.com/mbox/"},{"id":120869,"url":"https://patchwork.plctlab.org/api/1.2/patches/120869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230716021622.2831938-1-pan2.li@intel.com/","msgid":"<20230716021622.2831938-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-16T02:16:22","name":"[v1|GCC-13] RISC-V: Bugfix for riscv-vsetvl pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230716021622.2831938-1-pan2.li@intel.com/mbox/"},{"id":120927,"url":"https://patchwork.plctlab.org/api/1.2/patches/120927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-442fa3d0-10b8-415b-a161-a5821d474fdb-1689539459265@3c-app-gmx-bap40/","msgid":"","list_archive_url":null,"date":"2023-07-16T20:30:59","name":"Fortran: intrinsics and deferred-length character arguments [PR95947,PR110658]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-442fa3d0-10b8-415b-a161-a5821d474fdb-1689539459265@3c-app-gmx-bap40/mbox/"},{"id":120985,"url":"https://patchwork.plctlab.org/api/1.2/patches/120985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com/","msgid":"<8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com>","list_archive_url":null,"date":"2023-07-17T02:22:32","name":"vect: Initialize new_temp to avoid false positive warning [PR110652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com/mbox/"},{"id":120997,"url":"https://patchwork.plctlab.org/api/1.2/patches/120997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717024247.1263484-1-apinski@marvell.com/","msgid":"<20230717024247.1263484-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-17T02:42:47","name":"PR 95923: More (boolean) bitop simplifications in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717024247.1263484-1-apinski@marvell.com/mbox/"},{"id":121017,"url":"https://patchwork.plctlab.org/api/1.2/patches/121017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717033334.2376251-1-haochen.jiang@intel.com/","msgid":"<20230717033334.2376251-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-17T03:33:34","name":"[gcc-wwwdocs] gcc-13/14: Mention Intel new ISA and march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717033334.2376251-1-haochen.jiang@intel.com/mbox/"},{"id":121022,"url":"https://patchwork.plctlab.org/api/1.2/patches/121022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc59eb5-eaff-cb23-328e-2bfff6fcccc6@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T03:40:57","name":"[V2] rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc59eb5-eaff-cb23-328e-2bfff6fcccc6@linux.vnet.ibm.com/mbox/"},{"id":121045,"url":"https://patchwork.plctlab.org/api/1.2/patches/121045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717060423.31423-1-juzhe.zhong@rivai.ai/","msgid":"<20230717060423.31423-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T06:04:23","name":"RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717060423.31423-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121058,"url":"https://patchwork.plctlab.org/api/1.2/patches/121058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717062828.47511-1-juzhe.zhong@rivai.ai/","msgid":"<20230717062828.47511-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T06:28:28","name":"[V2] RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717062828.47511-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121080,"url":"https://patchwork.plctlab.org/api/1.2/patches/121080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-1-aldyh@redhat.com/","msgid":"<20230717071603.242424-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:16:02","name":"[COMMITTED] Normalize irange_bitmask before union/intersect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-1-aldyh@redhat.com/mbox/"},{"id":121081,"url":"https://patchwork.plctlab.org/api/1.2/patches/121081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-2-aldyh@redhat.com/","msgid":"<20230717071603.242424-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:16:03","name":"[COMMITTED] Add global setter for value/mask pair for SSA names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-2-aldyh@redhat.com/mbox/"},{"id":121100,"url":"https://patchwork.plctlab.org/api/1.2/patches/121100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717074838.2724136-1-hongtao.liu@intel.com/","msgid":"<20230717074838.2724136-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-17T07:48:38","name":"Remove # from one_cmpl2 assemble output.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717074838.2724136-1-hongtao.liu@intel.com/mbox/"},{"id":121101,"url":"https://patchwork.plctlab.org/api/1.2/patches/121101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075645.243653-1-aldyh@redhat.com/","msgid":"<20230717075645.243653-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:56:45","name":"Export value/mask known bits from CCP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075645.243653-1-aldyh@redhat.com/mbox/"},{"id":121102,"url":"https://patchwork.plctlab.org/api/1.2/patches/121102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075834.244277-1-aldyh@redhat.com/","msgid":"<20230717075834.244277-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:58:35","name":"Export value/mask known bits from IPA.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075834.244277-1-aldyh@redhat.com/mbox/"},{"id":121114,"url":"https://patchwork.plctlab.org/api/1.2/patches/121114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmh6q3dkh6.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-07-17T08:13:09","name":"Use substituted GDCFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmh6q3dkh6.fsf@suse.de/mbox/"},{"id":121115,"url":"https://patchwork.plctlab.org/api/1.2/patches/121115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717082039.024683858D39@sourceware.org/","msgid":"<20230717082039.024683858D39@sourceware.org>","list_archive_url":null,"date":"2023-07-17T08:19:40","name":"tree-optimization/110669 - bogus matching of loop bitop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717082039.024683858D39@sourceware.org/mbox/"},{"id":121116,"url":"https://patchwork.plctlab.org/api/1.2/patches/121116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717081946.187709-1-juzhe.zhong@rivai.ai/","msgid":"<20230717081946.187709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T08:19:46","name":"[V2] RISC-V: Support non-SLP unordered reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717081946.187709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121135,"url":"https://patchwork.plctlab.org/api/1.2/patches/121135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717085915.2570743-1-christoph.muellner@vrull.eu/","msgid":"<20230717085915.2570743-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-17T08:59:15","name":"riscv: Fix warning in riscv_regno_ok_for_index_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717085915.2570743-1-christoph.muellner@vrull.eu/mbox/"},{"id":121137,"url":"https://patchwork.plctlab.org/api/1.2/patches/121137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-2-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-2-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:42","name":"[1/9] Native complex operations: Conditional lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-2-snoiry@kalrayinc.com/mbox/"},{"id":121138,"url":"https://patchwork.plctlab.org/api/1.2/patches/121138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-3-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-3-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:43","name":"[2/9] Native complex operations: Move functions to hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-3-snoiry@kalrayinc.com/mbox/"},{"id":121139,"url":"https://patchwork.plctlab.org/api/1.2/patches/121139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-4-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-4-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:44","name":"[3/9] Native complex operations: Add gen_rtx_complex hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-4-snoiry@kalrayinc.com/mbox/"},{"id":121140,"url":"https://patchwork.plctlab.org/api/1.2/patches/121140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-5-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-5-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:45","name":"[4/9] Native complex operations: Allow native complex regs and ops in rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-5-snoiry@kalrayinc.com/mbox/"},{"id":121142,"url":"https://patchwork.plctlab.org/api/1.2/patches/121142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-6-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-6-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:46","name":"[5/9] Native complex operations: Add the conjugate op in optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-6-snoiry@kalrayinc.com/mbox/"},{"id":121143,"url":"https://patchwork.plctlab.org/api/1.2/patches/121143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-7-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-7-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:47","name":"[6/9] Native complex operations: Update how complex rotations are handled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-7-snoiry@kalrayinc.com/mbox/"},{"id":121144,"url":"https://patchwork.plctlab.org/api/1.2/patches/121144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-8-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-8-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:48","name":"[7/9] Native complex operations: Vectorization of native complex operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-8-snoiry@kalrayinc.com/mbox/"},{"id":121141,"url":"https://patchwork.plctlab.org/api/1.2/patches/121141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-9-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-9-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:49","name":"[8/9] Native complex operations: Add explicit vector of complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-9-snoiry@kalrayinc.com/mbox/"},{"id":121145,"url":"https://patchwork.plctlab.org/api/1.2/patches/121145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-10-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-10-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:50","name":"[9/9] Native complex operation: Experimental support in x86 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-10-snoiry@kalrayinc.com/mbox/"},{"id":121161,"url":"https://patchwork.plctlab.org/api/1.2/patches/121161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717095259.326307-1-lehua.ding@rivai.ai/","msgid":"<20230717095259.326307-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-17T09:52:59","name":"RISC-V: Ensure all implied extensions are included[PR110696]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717095259.326307-1-lehua.ding@rivai.ai/mbox/"},{"id":121188,"url":"https://patchwork.plctlab.org/api/1.2/patches/121188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZbRiErCZ1pnYK@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:35:25","name":"Fix optimize_mask_stores profile update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZbRiErCZ1pnYK@kam.mff.cuni.cz/mbox/"},{"id":121190,"url":"https://patchwork.plctlab.org/api/1.2/patches/121190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZijWxHsRaiHC5@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:35:54","name":"Fix profile update in scale_profile_for_vect_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZijWxHsRaiHC5@kam.mff.cuni.cz/mbox/"},{"id":121193,"url":"https://patchwork.plctlab.org/api/1.2/patches/121193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZqJ1lJpCFTWCi@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:36:24","name":"Avoid double profile udpate in try_peel_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZqJ1lJpCFTWCi@kam.mff.cuni.cz/mbox/"},{"id":121245,"url":"https://patchwork.plctlab.org/api/1.2/patches/121245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnk_N=tgPNBhUu91yt8YN0HcCoWgQQYpshHMqhU=6WgAQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T12:14:13","name":"[RFC,v2] Extend fold_vec_perm to handle VLA vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnk_N=tgPNBhUu91yt8YN0HcCoWgQQYpshHMqhU=6WgAQ@mail.gmail.com/mbox/"},{"id":121252,"url":"https://patchwork.plctlab.org/api/1.2/patches/121252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zg3ulo91.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T12:24:26","name":"[committed] Restore bootstrap by removing unused variable in tree-ssa-loop-ivcanon.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zg3ulo91.fsf@suse.cz/mbox/"},{"id":121270,"url":"https://patchwork.plctlab.org/api/1.2/patches/121270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717123929.260814-1-juzhe.zhong@rivai.ai/","msgid":"<20230717123929.260814-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T12:39:29","name":"RTL_SSA: Relax PHI_MODE in phi_setup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717123929.260814-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121294,"url":"https://patchwork.plctlab.org/api/1.2/patches/121294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717131411.330650-1-aldyh@redhat.com/","msgid":"<20230717131411.330650-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T13:14:11","name":"Read global value/mask in IPA.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717131411.330650-1-aldyh@redhat.com/mbox/"},{"id":121311,"url":"https://patchwork.plctlab.org/api/1.2/patches/121311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com/","msgid":"<7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com>","list_archive_url":null,"date":"2023-07-17T13:26:27","name":"[committed] OpenMP/Fortran: Parsing support for '\''uses_allocators'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com/mbox/"},{"id":121356,"url":"https://patchwork.plctlab.org/api/1.2/patches/121356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717142002.295213-1-juzhe.zhong@rivai.ai/","msgid":"<20230717142002.295213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T14:20:02","name":"[V3] RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717142002.295213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121380,"url":"https://patchwork.plctlab.org/api/1.2/patches/121380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717144209.316540-1-juzhe.zhong@rivai.ai/","msgid":"<20230717144209.316540-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T14:42:09","name":"[V2] RTL_SSA: Relax PHI_MODE in phi_setup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717144209.316540-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121391,"url":"https://patchwork.plctlab.org/api/1.2/patches/121391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717150957.23119-1-jchrist@linux.ibm.com/","msgid":"<20230717150957.23119-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-07-17T15:09:57","name":"s390: Optimize vec_cmpge followed by vec_sel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717150957.23119-1-jchrist@linux.ibm.com/mbox/"},{"id":121561,"url":"https://patchwork.plctlab.org/api/1.2/patches/121561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com/","msgid":"<949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-17T19:19:57","name":"[1/2] rs6000, add argument to function find_instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com/mbox/"},{"id":121562,"url":"https://patchwork.plctlab.org/api/1.2/patches/121562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com/","msgid":"<150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-17T19:20:21","name":"[2/2,ver,4] rs6000, fix vec_replace_unaligned built-in arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com/mbox/"},{"id":121585,"url":"https://patchwork.plctlab.org/api/1.2/patches/121585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+mxPA1xc1aqf3iqz_1iYVXw-K7QZAjQduUn_3NyHGAQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T20:16:27","name":"[committed] combine: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+mxPA1xc1aqf3iqz_1iYVXw-K7QZAjQduUn_3NyHGAQ@mail.gmail.com/mbox/"},{"id":121609,"url":"https://patchwork.plctlab.org/api/1.2/patches/121609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211808.946183-1-jason@redhat.com/","msgid":"<20230717211808.946183-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T21:18:08","name":"[pushed] c++: only cache constexpr calls that are constant exprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211808.946183-1-jason@redhat.com/mbox/"},{"id":121611,"url":"https://patchwork.plctlab.org/api/1.2/patches/121611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211905.946580-1-jason@redhat.com/","msgid":"<20230717211905.946580-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T21:19:05","name":"[RFA,(fold)] c++: constexpr bit_cast with empty field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211905.946580-1-jason@redhat.com/mbox/"},{"id":121612,"url":"https://patchwork.plctlab.org/api/1.2/patches/121612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212235.2971735-1-arsen@aarsen.me/","msgid":"<20230717212235.2971735-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-07-17T21:22:28","name":"[pushed] extend.texi: index __auto_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212235.2971735-1-arsen@aarsen.me/mbox/"},{"id":121613,"url":"https://patchwork.plctlab.org/api/1.2/patches/121613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212836.23056-1-patrick@rivosinc.com/","msgid":"<20230717212836.23056-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-17T21:28:36","name":"[RFC,v2] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212836.23056-1-patrick@rivosinc.com/mbox/"},{"id":121693,"url":"https://patchwork.plctlab.org/api/1.2/patches/121693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717235711.972199-1-jason@redhat.com/","msgid":"<20230717235711.972199-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T23:57:11","name":"[FYI] c++: check for trying to cache non-constant expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717235711.972199-1-jason@redhat.com/mbox/"},{"id":121714,"url":"https://patchwork.plctlab.org/api/1.2/patches/121714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718010351.240789-1-juzhe.zhong@rivai.ai/","msgid":"<20230718010351.240789-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T01:03:51","name":"RISC-V: Enable SLP un-order reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718010351.240789-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121735,"url":"https://patchwork.plctlab.org/api/1.2/patches/121735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718024953.1343484-1-pan2.li@intel.com/","msgid":"<20230718024953.1343484-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-18T02:49:53","name":"[v2] RISC-V: Fix RVV frm run test failure on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718024953.1343484-1-pan2.li@intel.com/mbox/"},{"id":121755,"url":"https://patchwork.plctlab.org/api/1.2/patches/121755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCrSp3DKxH3cz5VrKnN73A3mRp0j8n8zwz2PVfJTsjar=Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T04:05:44","name":"Committed: Tighten regexps in gcc.target/riscv/_Float16-zhinx-1.c .","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCrSp3DKxH3cz5VrKnN73A3mRp0j8n8zwz2PVfJTsjar=Q@mail.gmail.com/mbox/"},{"id":121761,"url":"https://patchwork.plctlab.org/api/1.2/patches/121761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpuUTjoaPzJvr7fxxWZm1d=FZ=K7feigkXOYx6A1yh+Sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T04:47:40","name":"cpymem for RISCV with v extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpuUTjoaPzJvr7fxxWZm1d=FZ=K7feigkXOYx6A1yh+Sw@mail.gmail.com/mbox/"},{"id":121775,"url":"https://patchwork.plctlab.org/api/1.2/patches/121775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqakjgGSZb_BFeAn=NbqXvpzznXG9n4sy9KWzKUVHDBXw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T06:02:46","name":"RISCV test infrastructure for d / v / zfh extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqakjgGSZb_BFeAn=NbqXvpzznXG9n4sy9KWzKUVHDBXw@mail.gmail.com/mbox/"},{"id":121791,"url":"https://patchwork.plctlab.org/api/1.2/patches/121791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062739.312774-1-juzhe.zhong@rivai.ai/","msgid":"<20230718062739.312774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T06:27:39","name":"RISC-V: Dynamic adjust size of VLA vector according to TARGET_MIN_VLEN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062739.312774-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121793,"url":"https://patchwork.plctlab.org/api/1.2/patches/121793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-1-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:43","name":"[v3,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-1-kmatsui@gcc.gnu.org/mbox/"},{"id":121796,"url":"https://patchwork.plctlab.org/api/1.2/patches/121796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-2-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:44","name":"[v3,2/3] libstdc++: Optimize is_arithmetic performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-2-kmatsui@gcc.gnu.org/mbox/"},{"id":121797,"url":"https://patchwork.plctlab.org/api/1.2/patches/121797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-3-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:45","name":"[v3,3/3] libstdc++: Optimize is_fundamental performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-3-kmatsui@gcc.gnu.org/mbox/"},{"id":121802,"url":"https://patchwork.plctlab.org/api/1.2/patches/121802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718065512.2728118-1-lehua.ding@rivai.ai/","msgid":"<20230718065512.2728118-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-18T06:55:11","name":"RISC-V: Remove testcase that cannot be compiled because VLEN limitation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718065512.2728118-1-lehua.ding@rivai.ai/mbox/"},{"id":121824,"url":"https://patchwork.plctlab.org/api/1.2/patches/121824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-1-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:24","name":"[v4,1/4] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-1-kmatsui@gcc.gnu.org/mbox/"},{"id":121829,"url":"https://patchwork.plctlab.org/api/1.2/patches/121829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-2-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:25","name":"[v4,2/4] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-2-kmatsui@gcc.gnu.org/mbox/"},{"id":121831,"url":"https://patchwork.plctlab.org/api/1.2/patches/121831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-3-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:26","name":"[v4,3/4] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-3-kmatsui@gcc.gnu.org/mbox/"},{"id":121832,"url":"https://patchwork.plctlab.org/api/1.2/patches/121832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-4-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:27","name":"[v4,4/4] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-4-kmatsui@gcc.gnu.org/mbox/"},{"id":121830,"url":"https://patchwork.plctlab.org/api/1.2/patches/121830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074249.236825-1-lehua.ding@rivai.ai/","msgid":"<20230718074249.236825-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-18T07:42:49","name":"RISC-V: Fix testcase failed when default -mcmodel=medany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074249.236825-1-lehua.ding@rivai.ai/mbox/"},{"id":121849,"url":"https://patchwork.plctlab.org/api/1.2/patches/121849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074958.2806939-1-yanzhang.wang@intel.com/","msgid":"<20230718074958.2806939-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-18T07:49:58","name":"[v3] RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074958.2806939-1-yanzhang.wang@intel.com/mbox/"},{"id":121836,"url":"https://patchwork.plctlab.org/api/1.2/patches/121836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab576007-4f7d-59a9-5f2e-c4902572c616@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T07:56:02","name":"PING^1 [PATCH v7] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab576007-4f7d-59a9-5f2e-c4902572c616@linux.ibm.com/mbox/"},{"id":121837,"url":"https://patchwork.plctlab.org/api/1.2/patches/121837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1217cb9-79df-61a9-7e1b-f949344bf4e4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T07:58:08","name":"[PING^2] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1217cb9-79df-61a9-7e1b-f949344bf4e4@linux.ibm.com/mbox/"},{"id":121845,"url":"https://patchwork.plctlab.org/api/1.2/patches/121845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com/","msgid":"<2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T08:01:27","name":"[PING^2,3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com/mbox/"},{"id":121864,"url":"https://patchwork.plctlab.org/api/1.2/patches/121864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718084411.310736-1-juzhe.zhong@rivai.ai/","msgid":"<20230718084411.310736-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T08:44:11","name":"[V2] RISC-V: Enable SLP un-order reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718084411.310736-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121896,"url":"https://patchwork.plctlab.org/api/1.2/patches/121896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718093437.595925-1-juzhe.zhong@rivai.ai/","msgid":"<20230718093437.595925-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T09:34:37","name":"MAINTAINERS: Add myself as riscv port reviewer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718093437.595925-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121912,"url":"https://patchwork.plctlab.org/api/1.2/patches/121912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1412ccb5be14216ace46eb46cee29ab@ex13mbxc01n01.ikhex.ikoula.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T09:50:18","name":"aarch64: remove useless pairs of rev instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1412ccb5be14216ace46eb46cee29ab@ex13mbxc01n01.ikhex.ikoula.com/mbox/"},{"id":121933,"url":"https://patchwork.plctlab.org/api/1.2/patches/121933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718102108.8837D134B0@imap2.suse-dmz.suse.de/","msgid":"<20230718102108.8837D134B0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T10:21:08","name":"middle-end/105715 - missed RTL if-conversion with COND_EXPR expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718102108.8837D134B0@imap2.suse-dmz.suse.de/mbox/"},{"id":121936,"url":"https://patchwork.plctlab.org/api/1.2/patches/121936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-2-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:18","name":"[v2,1/8] LoongArch: Added Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-2-panchenghui@loongson.cn/mbox/"},{"id":121941,"url":"https://patchwork.plctlab.org/api/1.2/patches/121941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-3-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:19","name":"[v2,2/8] LoongArch: Added Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-3-panchenghui@loongson.cn/mbox/"},{"id":121938,"url":"https://patchwork.plctlab.org/api/1.2/patches/121938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-4-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:20","name":"[v2,3/8] LoongArch: Added Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-4-panchenghui@loongson.cn/mbox/"},{"id":121937,"url":"https://patchwork.plctlab.org/api/1.2/patches/121937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-5-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:21","name":"[v2,4/8] LoongArch: Added Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-5-panchenghui@loongson.cn/mbox/"},{"id":121940,"url":"https://patchwork.plctlab.org/api/1.2/patches/121940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-6-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:22","name":"[v2,5/8] LoongArch: Added Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-6-panchenghui@loongson.cn/mbox/"},{"id":121942,"url":"https://patchwork.plctlab.org/api/1.2/patches/121942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-7-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:23","name":"[v2,6/8] LoongArch: Added Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-7-panchenghui@loongson.cn/mbox/"},{"id":121949,"url":"https://patchwork.plctlab.org/api/1.2/patches/121949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718112545.BC5D413494@imap2.suse-dmz.suse.de/","msgid":"<20230718112545.BC5D413494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T11:25:45","name":"middle-end/61747 - conditional move expansion and constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718112545.BC5D413494@imap2.suse-dmz.suse.de/mbox/"},{"id":121973,"url":"https://patchwork.plctlab.org/api/1.2/patches/121973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2990c55-5e3f-3418-d719-d9af0c649b6d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T12:11:13","name":"OpenMP/Fortran: Non-rectangular loops with constant steps other than 1 or -1 [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2990c55-5e3f-3418-d719-d9af0c649b6d@codesourcery.com/mbox/"},{"id":122009,"url":"https://patchwork.plctlab.org/api/1.2/patches/122009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131311.80670-1-poulhies@adacore.com/","msgid":"<20230718131311.80670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:11","name":"[COMMITTED] ada: Fix Valid_Scalars attribute applied to types from limited with","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131311.80670-1-poulhies@adacore.com/mbox/"},{"id":122010,"url":"https://patchwork.plctlab.org/api/1.2/patches/122010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131323.80823-1-poulhies@adacore.com/","msgid":"<20230718131323.80823-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:23","name":"[COMMITTED] ada: Allow warnings with explain code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131323.80823-1-poulhies@adacore.com/mbox/"},{"id":122024,"url":"https://patchwork.plctlab.org/api/1.2/patches/122024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131325.80885-1-poulhies@adacore.com/","msgid":"<20230718131325.80885-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:25","name":"[COMMITTED] ada: Refactor s-pack* units to remove multiple returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131325.80885-1-poulhies@adacore.com/mbox/"},{"id":122016,"url":"https://patchwork.plctlab.org/api/1.2/patches/122016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131328.80948-1-poulhies@adacore.com/","msgid":"<20230718131328.80948-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:28","name":"[COMMITTED] ada: Expose expected_throw attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131328.80948-1-poulhies@adacore.com/mbox/"},{"id":122011,"url":"https://patchwork.plctlab.org/api/1.2/patches/122011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131329.81009-1-poulhies@adacore.com/","msgid":"<20230718131329.81009-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:29","name":"[COMMITTED] ada: Fix assertion failure introduced by latest change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131329.81009-1-poulhies@adacore.com/mbox/"},{"id":122013,"url":"https://patchwork.plctlab.org/api/1.2/patches/122013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131331.81070-1-poulhies@adacore.com/","msgid":"<20230718131331.81070-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:31","name":"[COMMITTED] ada: Fix internal error on aggregates of self-referencing types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131331.81070-1-poulhies@adacore.com/mbox/"},{"id":122025,"url":"https://patchwork.plctlab.org/api/1.2/patches/122025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131333.81169-1-poulhies@adacore.com/","msgid":"<20230718131333.81169-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:33","name":"[COMMITTED] ada: Tweak CPU affinity handling on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131333.81169-1-poulhies@adacore.com/mbox/"},{"id":122019,"url":"https://patchwork.plctlab.org/api/1.2/patches/122019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131335.81230-1-poulhies@adacore.com/","msgid":"<20230718131335.81230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:35","name":"[COMMITTED] ada: Constraint_Error caused by interface conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131335.81230-1-poulhies@adacore.com/mbox/"},{"id":122033,"url":"https://patchwork.plctlab.org/api/1.2/patches/122033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131336.81291-1-poulhies@adacore.com/","msgid":"<20230718131336.81291-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:36","name":"[COMMITTED] ada: Improve error message for ambiguous subprogram call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131336.81291-1-poulhies@adacore.com/mbox/"},{"id":122031,"url":"https://patchwork.plctlab.org/api/1.2/patches/122031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131338.81390-1-poulhies@adacore.com/","msgid":"<20230718131338.81390-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:38","name":"[COMMITTED] ada: Fix expanding container aggregates with Iterator specification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131338.81390-1-poulhies@adacore.com/mbox/"},{"id":122017,"url":"https://patchwork.plctlab.org/api/1.2/patches/122017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131340.81451-1-poulhies@adacore.com/","msgid":"<20230718131340.81451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:40","name":"[COMMITTED] ada: Apply correct element type for container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131340.81451-1-poulhies@adacore.com/mbox/"},{"id":122026,"url":"https://patchwork.plctlab.org/api/1.2/patches/122026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131342.81513-1-poulhies@adacore.com/","msgid":"<20230718131342.81513-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:42","name":"[COMMITTED] ada: Avoid iterator conflicts in container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131342.81513-1-poulhies@adacore.com/mbox/"},{"id":122035,"url":"https://patchwork.plctlab.org/api/1.2/patches/122035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131343.81574-1-poulhies@adacore.com/","msgid":"<20230718131343.81574-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:43","name":"[COMMITTED] ada: Constraint_Error caused by '\''Image applied to interface type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131343.81574-1-poulhies@adacore.com/mbox/"},{"id":122037,"url":"https://patchwork.plctlab.org/api/1.2/patches/122037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131345.81635-1-poulhies@adacore.com/","msgid":"<20230718131345.81635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:45","name":"[COMMITTED] ada: Use new typedefs in gcc-interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131345.81635-1-poulhies@adacore.com/mbox/"},{"id":122039,"url":"https://patchwork.plctlab.org/api/1.2/patches/122039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com/","msgid":"<2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T13:33:37","name":"[v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com/mbox/"},{"id":122060,"url":"https://patchwork.plctlab.org/api/1.2/patches/122060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-1-guojiufu@linux.ibm.com/","msgid":"<20230718140544.3497370-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T14:05:43","name":"[V5,1/2] Add overflow API for plus minus mult on range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-1-guojiufu@linux.ibm.com/mbox/"},{"id":122059,"url":"https://patchwork.plctlab.org/api/1.2/patches/122059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-2-guojiufu@linux.ibm.com/","msgid":"<20230718140544.3497370-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T14:05:44","name":"[V5,2/2] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-2-guojiufu@linux.ibm.com/mbox/"},{"id":122062,"url":"https://patchwork.plctlab.org/api/1.2/patches/122062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com/","msgid":"<7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-07-18T14:15:40","name":"[releases/gcc-13,1/2] libgcc: Fix eh_frame fast path in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com/mbox/"},{"id":122061,"url":"https://patchwork.plctlab.org/api/1.2/patches/122061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com/","msgid":"<6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-07-18T14:15:45","name":"[releases/gcc-13,2/2] libgcc: Fix -Wint-conversion warning in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com/mbox/"},{"id":122078,"url":"https://patchwork.plctlab.org/api/1.2/patches/122078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17577-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T14:43:21","name":"AArch64 fix regexp for live_1.c sve test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17577-tamar@arm.com/mbox/"},{"id":122080,"url":"https://patchwork.plctlab.org/api/1.2/patches/122080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718145253.CC67E134B0@imap2.suse-dmz.suse.de/","msgid":"<20230718145253.CC67E134B0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T14:52:53","name":"tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718145253.CC67E134B0@imap2.suse-dmz.suse.de/mbox/"},{"id":122101,"url":"https://patchwork.plctlab.org/api/1.2/patches/122101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718151807.665487-1-ppalka@redhat.com/","msgid":"<20230718151807.665487-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-18T15:18:07","name":"c++: deducing empty type vs non-type argument pack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718151807.665487-1-ppalka@redhat.com/mbox/"},{"id":122128,"url":"https://patchwork.plctlab.org/api/1.2/patches/122128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bGkc0U4wk6v_1kj61rfAgw7OpnVRJCLiKu7SkKw8mDMA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T16:49:50","name":"[committed] dwarf2: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bGkc0U4wk6v_1kj61rfAgw7OpnVRJCLiKu7SkKw8mDMA@mail.gmail.com/mbox/"},{"id":122169,"url":"https://patchwork.plctlab.org/api/1.2/patches/122169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718173314.72666-1-polacek@redhat.com/","msgid":"<20230718173314.72666-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-18T17:33:14","name":"[pushed] c++: Add tests for P2621, no UB in lexer [PR110340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718173314.72666-1-polacek@redhat.com/mbox/"},{"id":122204,"url":"https://patchwork.plctlab.org/api/1.2/patches/122204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718191431.50059-1-someguy@effective-light.com/","msgid":"<20230718191431.50059-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-07-18T19:14:31","name":"[RESEND] c: add -Wmissing-variable-declarations [PR65213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718191431.50059-1-someguy@effective-light.com/mbox/"},{"id":122225,"url":"https://patchwork.plctlab.org/api/1.2/patches/122225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718211458.858343-1-polacek@redhat.com/","msgid":"<20230718211458.858343-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-18T21:14:58","name":"c++: fix ICE with is_really_empty_class [PR110106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718211458.858343-1-polacek@redhat.com/mbox/"},{"id":122280,"url":"https://patchwork.plctlab.org/api/1.2/patches/122280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718223233.15328-1-kmatsui@gcc.gnu.org/","msgid":"<20230718223233.15328-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T22:32:33","name":"libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718223233.15328-1-kmatsui@gcc.gnu.org/mbox/"},{"id":122288,"url":"https://patchwork.plctlab.org/api/1.2/patches/122288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-2-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:43","name":"[1/8] c++, tree: Move TYPE_REF_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-2-kmatsui@gcc.gnu.org/mbox/"},{"id":122289,"url":"https://patchwork.plctlab.org/api/1.2/patches/122289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-3-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:44","name":"[2/8] gcc: Use TYPE_REF_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-3-kmatsui@gcc.gnu.org/mbox/"},{"id":122291,"url":"https://patchwork.plctlab.org/api/1.2/patches/122291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-4-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:45","name":"[3/8] c++, tree: Move TYPE_PTR_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-4-kmatsui@gcc.gnu.org/mbox/"},{"id":122292,"url":"https://patchwork.plctlab.org/api/1.2/patches/122292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-5-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:46","name":"[4/8] c++, tree: Move INDIRECT_TYPE_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-5-kmatsui@gcc.gnu.org/mbox/"},{"id":122293,"url":"https://patchwork.plctlab.org/api/1.2/patches/122293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-7-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:48","name":"[6/8] tree: Remove POINTER_TYPE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-7-kmatsui@gcc.gnu.org/mbox/"},{"id":122294,"url":"https://patchwork.plctlab.org/api/1.2/patches/122294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-8-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:49","name":"[7/8] tree: Define TYPE_REF_IS_LVALUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-8-kmatsui@gcc.gnu.org/mbox/"},{"id":122295,"url":"https://patchwork.plctlab.org/api/1.2/patches/122295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-9-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:50","name":"[8/8] c++, lto: Use TYPE_REF_IS_LVALUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-9-kmatsui@gcc.gnu.org/mbox/"},{"id":122357,"url":"https://patchwork.plctlab.org/api/1.2/patches/122357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719015221.1383859-1-apinski@marvell.com/","msgid":"<20230719015221.1383859-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-19T01:52:21","name":"Fix PR110726: a | (a == b) can sometimes produce wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719015221.1383859-1-apinski@marvell.com/mbox/"},{"id":122365,"url":"https://patchwork.plctlab.org/api/1.2/patches/122365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com/","msgid":"<531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com>","list_archive_url":null,"date":"2023-07-19T03:06:05","name":"[PATCH-1,combine] Don'\''t widen shift mode when target has rotate/mask instruction on original mode [PR93738]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com/mbox/"},{"id":122363,"url":"https://patchwork.plctlab.org/api/1.2/patches/122363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com/","msgid":"<7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-19T03:06:22","name":"[PATCH-2,rs6000] Don'\''t widen shift mode when target has rotate/mask instruction on original mode [PR93738]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com/mbox/"},{"id":122366,"url":"https://patchwork.plctlab.org/api/1.2/patches/122366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719032822.85817-1-pan2.li@intel.com/","msgid":"<20230719032822.85817-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-19T03:28:22","name":"[v1] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719032822.85817-1-pan2.li@intel.com/mbox/"},{"id":122369,"url":"https://patchwork.plctlab.org/api/1.2/patches/122369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041432.2967226-1-yunqiang.su@cipunited.com/","msgid":"<20230719041432.2967226-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-19T04:14:32","name":"Store_bit_field_1: Use SUBREG instead of REG if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041432.2967226-1-yunqiang.su@cipunited.com/mbox/"},{"id":122371,"url":"https://patchwork.plctlab.org/api/1.2/patches/122371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041639.2967597-1-yunqiang.su@cipunited.com/","msgid":"<20230719041639.2967597-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-19T04:16:39","name":"[v2] Store_bit_field_1: Use SUBREG instead of REG if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041639.2967597-1-yunqiang.su@cipunited.com/mbox/"},{"id":122388,"url":"https://patchwork.plctlab.org/api/1.2/patches/122388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635742E07E2076FA2BE0560E139A@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T04:33:48","name":"AArch64: Do not increase the vect reduction latency by multiplying count [PR110625]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635742E07E2076FA2BE0560E139A@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":122406,"url":"https://patchwork.plctlab.org/api/1.2/patches/122406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719062911.521348-1-pan2.li@intel.com/","msgid":"<20230719062911.521348-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-19T06:29:11","name":"[v2] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719062911.521348-1-pan2.li@intel.com/mbox/"},{"id":122449,"url":"https://patchwork.plctlab.org/api/1.2/patches/122449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719082126.265155-1-lehua.ding@rivai.ai/","msgid":"<20230719082126.265155-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-19T08:21:26","name":"mklog: fix bugs of --append option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719082126.265155-1-lehua.ding@rivai.ai/mbox/"},{"id":122454,"url":"https://patchwork.plctlab.org/api/1.2/patches/122454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee9e4937-ad2e-1e15-9d5d-6611bd9f572d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T08:26:12","name":"[committed] - Re: [patch] OpenMP/Fortran: Non-rectangular loops with constant steps other than 1 or -1 [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee9e4937-ad2e-1e15-9d5d-6611bd9f572d@codesourcery.com/mbox/"},{"id":122505,"url":"https://patchwork.plctlab.org/api/1.2/patches/122505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-1-jwakely@redhat.com/","msgid":"<20230719100625.2494437-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:10","name":"[committed,1/3] libstdc++: Check autoconf macros for strtof and strtold [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-1-jwakely@redhat.com/mbox/"},{"id":122508,"url":"https://patchwork.plctlab.org/api/1.2/patches/122508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-2-jwakely@redhat.com/","msgid":"<20230719100625.2494437-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:11","name":"[committed,2/3] libstdc++: Define std::stof fallback in terms of std::stod [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-2-jwakely@redhat.com/mbox/"},{"id":122506,"url":"https://patchwork.plctlab.org/api/1.2/patches/122506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-3-jwakely@redhat.com/","msgid":"<20230719100625.2494437-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:12","name":"[committed,3/3] libstdc++: Enable tests for std::stoi etc. unconditionally [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-3-jwakely@redhat.com/mbox/"},{"id":122520,"url":"https://patchwork.plctlab.org/api/1.2/patches/122520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101252.2494924-1-jwakely@redhat.com/","msgid":"<20230719101252.2494924-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:11:50","name":"[committed] libstdc++: Check for multiple modifiers in chrono format string [PR110708]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101252.2494924-1-jwakely@redhat.com/mbox/"},{"id":122513,"url":"https://patchwork.plctlab.org/api/1.2/patches/122513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-2-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:52","name":"[1/5,RISC-V] Recognize Zicond extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-2-zengxiao@eswincomputing.com/mbox/"},{"id":122509,"url":"https://patchwork.plctlab.org/api/1.2/patches/122509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-3-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-3-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:53","name":"[2/5,RISC-V] Generate Zicond instruction for basic semantics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-3-zengxiao@eswincomputing.com/mbox/"},{"id":122515,"url":"https://patchwork.plctlab.org/api/1.2/patches/122515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-4-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-4-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:54","name":"[3/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-4-zengxiao@eswincomputing.com/mbox/"},{"id":122511,"url":"https://patchwork.plctlab.org/api/1.2/patches/122511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-5-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-5-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:55","name":"[4/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to non-zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-5-zengxiao@eswincomputing.com/mbox/"},{"id":122512,"url":"https://patchwork.plctlab.org/api/1.2/patches/122512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-6-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-6-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:56","name":"[5/5,RISC-V] Generate Zicond instruction for conditional execution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-6-zengxiao@eswincomputing.com/mbox/"},{"id":122547,"url":"https://patchwork.plctlab.org/api/1.2/patches/122547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307191141511.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:02:37","name":"[committed] testsuite: Add 64-bit vector variant for bb-slp-pr95839.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307191141511.28892@tpp.orcam.me.uk/mbox/"},{"id":122549,"url":"https://patchwork.plctlab.org/api/1.2/patches/122549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfDr9xICtYfTpCq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:06:23","name":"wide-int: Fix up wi::divmod_internal [PR110731]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfDr9xICtYfTpCq@tucnak/mbox/"},{"id":122564,"url":"https://patchwork.plctlab.org/api/1.2/patches/122564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113815.2510151-1-jwakely@redhat.com/","msgid":"<20230719113815.2510151-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T11:37:34","name":"[committed] libstdc++: Implement correct locale-specific chrono formatting [PR110719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113815.2510151-1-jwakely@redhat.com/mbox/"},{"id":122568,"url":"https://patchwork.plctlab.org/api/1.2/patches/122568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113829.2510208-1-jwakely@redhat.com/","msgid":"<20230719113829.2510208-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T11:38:17","name":"[committed] libstdc++: Avoid warning in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113829.2510208-1-jwakely@redhat.com/mbox/"},{"id":122574,"url":"https://patchwork.plctlab.org/api/1.2/patches/122574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfO1++M5xx11xF5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:53:59","name":"[committed] tree-switch-conversion: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfO1++M5xx11xF5@tucnak/mbox/"},{"id":122576,"url":"https://patchwork.plctlab.org/api/1.2/patches/122576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719115505.100294-1-juzhe.zhong@rivai.ai/","msgid":"<20230719115505.100294-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T11:55:05","name":"RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719115505.100294-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122587,"url":"https://patchwork.plctlab.org/api/1.2/patches/122587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1c20be2-5ac1-6644-5ffa-be2c85867d46@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T12:27:23","name":"[OG13,committed] gfortran.dg/gomp/affinity-clause-1.f90: Fix scan-tree-dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1c20be2-5ac1-6644-5ffa-be2c85867d46@codesourcery.com/mbox/"},{"id":122610,"url":"https://patchwork.plctlab.org/api/1.2/patches/122610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com/","msgid":"<4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com>","list_archive_url":null,"date":"2023-07-19T12:59:16","name":"[OG13,committed] libgomp.fortran/map-subarray-5.f90: Fix for shared-mem device/host","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com/mbox/"},{"id":122680,"url":"https://patchwork.plctlab.org/api/1.2/patches/122680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17578-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T15:15:50","name":"[1/2,frontend] Add novector C++ pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17578-tamar@arm.com/mbox/"},{"id":122681,"url":"https://patchwork.plctlab.org/api/1.2/patches/122681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLf+UkEwHWUbkdzy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T15:16:34","name":"[2/2,frontend] : Add novector C pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLf+UkEwHWUbkdzy@arm.com/mbox/"},{"id":122698,"url":"https://patchwork.plctlab.org/api/1.2/patches/122698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155211.2545541-1-jwakely@redhat.com/","msgid":"<20230719155211.2545541-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T15:51:54","name":"[committed] libstdc++: Fix locale-specific duration formatting [PR110719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155211.2545541-1-jwakely@redhat.com/mbox/"},{"id":122699,"url":"https://patchwork.plctlab.org/api/1.2/patches/122699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155216.2545575-1-jwakely@redhat.com/","msgid":"<20230719155216.2545575-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T15:52:12","name":"[committed] libstdc++: Fix formatting of negative chrono::hh_mm_ss","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155216.2545575-1-jwakely@redhat.com/mbox/"},{"id":122719,"url":"https://patchwork.plctlab.org/api/1.2/patches/122719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88fc414-c5b2-ac42-b531-dc0dd4268cff@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T16:44:08","name":"[GCC,13] aarch64: Remove architecture dependencies from intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88fc414-c5b2-ac42-b531-dc0dd4268cff@e124511.cambridge.arm.com/mbox/"},{"id":122728,"url":"https://patchwork.plctlab.org/api/1.2/patches/122728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f173f4f8-2f33-c712-c400-d3b00ff43f84@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T16:46:48","name":"[V2] rs6000: Don'\''t allow AltiVec address in movoo & movxo pattern [PR110411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f173f4f8-2f33-c712-c400-d3b00ff43f84@linux.vnet.ibm.com/mbox/"},{"id":122758,"url":"https://patchwork.plctlab.org/api/1.2/patches/122758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com/","msgid":"<10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com>","list_archive_url":null,"date":"2023-07-19T17:59:04","name":"[pushed,LRA] : Check and update frame to stack pointer elimination after stack slot allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com/mbox/"},{"id":122759,"url":"https://patchwork.plctlab.org/api/1.2/patches/122759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180053.46101-1-polacek@redhat.com/","msgid":"<20230719180053.46101-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T18:00:53","name":"c++: fix ICE with designated initializer [PR110114]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180053.46101-1-polacek@redhat.com/mbox/"},{"id":122760,"url":"https://patchwork.plctlab.org/api/1.2/patches/122760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180536.2447863-1-ppalka@redhat.com/","msgid":"<20230719180536.2447863-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-19T18:05:36","name":"c++: passing partially inst tmpl as ttp [PR110566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180536.2447863-1-ppalka@redhat.com/mbox/"},{"id":122765,"url":"https://patchwork.plctlab.org/api/1.2/patches/122765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLgyqE97WQkOyZc+@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-19T18:59:52","name":"Use strtol instead of std::stoi in gensupport.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLgyqE97WQkOyZc+@mx3210.localdomain/mbox/"},{"id":122769,"url":"https://patchwork.plctlab.org/api/1.2/patches/122769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719192047.449259-1-polacek@redhat.com/","msgid":"<20230719192047.449259-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T19:20:47","name":"c++: -Wmissing-field-initializers and empty class [PR110064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719192047.449259-1-polacek@redhat.com/mbox/"},{"id":122774,"url":"https://patchwork.plctlab.org/api/1.2/patches/122774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719193242.59472-1-kmatsui@gcc.gnu.org/","msgid":"<20230719193242.59472-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-19T19:32:42","name":"[v2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719193242.59472-1-kmatsui@gcc.gnu.org/mbox/"},{"id":122795,"url":"https://patchwork.plctlab.org/api/1.2/patches/122795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com/","msgid":"<009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-19T20:07:29","name":"[x86_64] More TImode parameter passing improvements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com/mbox/"},{"id":122822,"url":"https://patchwork.plctlab.org/api/1.2/patches/122822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719204522.2585813-1-jwakely@redhat.com/","msgid":"<20230719204522.2585813-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T20:43:58","name":"libstdc++: Fix preprocessor conditions for std::from_chars [PR109921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719204522.2585813-1-jwakely@redhat.com/mbox/"},{"id":122845,"url":"https://patchwork.plctlab.org/api/1.2/patches/122845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719215122.513059-1-polacek@redhat.com/","msgid":"<20230719215122.513059-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T21:51:22","name":"c++: Improve printing of base classes [PR110745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719215122.513059-1-polacek@redhat.com/mbox/"},{"id":122847,"url":"https://patchwork.plctlab.org/api/1.2/patches/122847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719220108.255662-1-dmalcolm@redhat.com/","msgid":"<20230719220108.255662-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:01:08","name":"[pushed] analyzer: fix ICE on division of tainted floating-point values [PR110700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719220108.255662-1-dmalcolm@redhat.com/mbox/"},{"id":122848,"url":"https://patchwork.plctlab.org/api/1.2/patches/122848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com/","msgid":"<003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-19T22:10:57","name":"PR c/110699: Defend against error_mark_node in gimplify.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com/mbox/"},{"id":122867,"url":"https://patchwork.plctlab.org/api/1.2/patches/122867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224318.2599563-1-jwakely@redhat.com/","msgid":"<20230719224318.2599563-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:43:05","name":"[committed] libstdc++: Check for std::ratio in arithmetic and comparisons [PR110593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224318.2599563-1-jwakely@redhat.com/mbox/"},{"id":122868,"url":"https://patchwork.plctlab.org/api/1.2/patches/122868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224441.2599589-1-jwakely@redhat.com/","msgid":"<20230719224441.2599589-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:43:19","name":"[committed] libstdc++: Do not define inaccurate from_chars for _Float128 [PR110077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224441.2599589-1-jwakely@redhat.com/mbox/"},{"id":122869,"url":"https://patchwork.plctlab.org/api/1.2/patches/122869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224502.67323-1-juzhe.zhong@rivai.ai/","msgid":"<20230719224502.67323-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T22:45:01","name":"[V2] RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224502.67323-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122880,"url":"https://patchwork.plctlab.org/api/1.2/patches/122880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmyvzece.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-07-19T23:11:29","name":"[v4] Introduce attribute sym","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmyvzece.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":122891,"url":"https://patchwork.plctlab.org/api/1.2/patches/122891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719232120.80316-1-juzhe.zhong@rivai.ai/","msgid":"<20230719232120.80316-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T23:21:20","name":"[V3] RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719232120.80316-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122952,"url":"https://patchwork.plctlab.org/api/1.2/patches/122952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720024142.1448443-1-apinski@marvell.com/","msgid":"<20230720024142.1448443-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-20T02:41:42","name":"Move combine over to statistics_counter_event.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720024142.1448443-1-apinski@marvell.com/mbox/"},{"id":122956,"url":"https://patchwork.plctlab.org/api/1.2/patches/122956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720031352.786458-1-haochen.jiang@intel.com/","msgid":"<20230720031352.786458-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-20T03:13:52","name":"Correct Granite Rapids{, D} documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720031352.786458-1-haochen.jiang@intel.com/mbox/"},{"id":122959,"url":"https://patchwork.plctlab.org/api/1.2/patches/122959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032157.869080-1-pan2.li@intel.com/","msgid":"<20230720032157.869080-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T03:21:57","name":"[v3] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032157.869080-1-pan2.li@intel.com/mbox/"},{"id":122960,"url":"https://patchwork.plctlab.org/api/1.2/patches/122960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032243.3643540-1-lhyatt@gmail.com/","msgid":"<20230720032243.3643540-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-20T03:22:43","name":"[committed] testsuite: Fix C++ UDL tests failing on 32-bit arch [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032243.3643540-1-lhyatt@gmail.com/mbox/"},{"id":122973,"url":"https://patchwork.plctlab.org/api/1.2/patches/122973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com/","msgid":"<460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-20T04:35:28","name":"rs6000: Fix issue in specifying PTImode as an attribute [PR106895]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com/mbox/"},{"id":122975,"url":"https://patchwork.plctlab.org/api/1.2/patches/122975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720045009.989895-1-hongtao.liu@intel.com/","msgid":"<20230720045009.989895-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-20T04:50:09","name":"Fix fp16 related testcase failure for i686.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720045009.989895-1-hongtao.liu@intel.com/mbox/"},{"id":122991,"url":"https://patchwork.plctlab.org/api/1.2/patches/122991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720060740.649611-1-juzhe.zhong@rivai.ai/","msgid":"<20230720060740.649611-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T06:07:40","name":"VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720060740.649611-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123007,"url":"https://patchwork.plctlab.org/api/1.2/patches/123007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720063250.1910048-1-pan2.li@intel.com/","msgid":"<20230720063250.1910048-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T06:32:50","name":"[v1] RISC-V: Align the pattern format in vector.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720063250.1910048-1-pan2.li@intel.com/mbox/"},{"id":123009,"url":"https://patchwork.plctlab.org/api/1.2/patches/123009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720064307.1943091-1-pan2.li@intel.com/","msgid":"<20230720064307.1943091-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T06:43:07","name":"[v4] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720064307.1943091-1-pan2.li@intel.com/mbox/"},{"id":123030,"url":"https://patchwork.plctlab.org/api/1.2/patches/123030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLjdpesBtEv9OFMF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T07:09:25","name":"loop-ch improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLjdpesBtEv9OFMF@kam.mff.cuni.cz/mbox/"},{"id":123051,"url":"https://patchwork.plctlab.org/api/1.2/patches/123051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073406.239379-1-juzhe.zhong@rivai.ai/","msgid":"<20230720073406.239379-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T07:34:06","name":"RISC-V: Support in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073406.239379-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123052,"url":"https://patchwork.plctlab.org/api/1.2/patches/123052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073516.2171485-1-hongtao.liu@intel.com/","msgid":"<20230720073516.2171485-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-20T07:35:16","name":"Optimize vlddqu to vmovdqu for TARGET_AVX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073516.2171485-1-hongtao.liu@intel.com/mbox/"},{"id":123066,"url":"https://patchwork.plctlab.org/api/1.2/patches/123066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720080629.1060969-1-juzhe.zhong@rivai.ai/","msgid":"<20230720080629.1060969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T08:06:29","name":"CODE STRUCTURE: Refine codes in Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720080629.1060969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123088,"url":"https://patchwork.plctlab.org/api/1.2/patches/123088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720083530.3260344-1-pan2.li@intel.com/","msgid":"<20230720083530.3260344-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T08:35:30","name":"[v1] RISC-V: Fix one incorrect match operand for RVV reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720083530.3260344-1-pan2.li@intel.com/mbox/"},{"id":123089,"url":"https://patchwork.plctlab.org/api/1.2/patches/123089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720085103.159227-1-juzhe.zhong@rivai.ai/","msgid":"<20230720085103.159227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T08:51:03","name":"[V2] RISC-V: Support in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720085103.159227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123110,"url":"https://patchwork.plctlab.org/api/1.2/patches/123110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-2-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:24","name":"[1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-2-lehua.ding@rivai.ai/mbox/"},{"id":123112,"url":"https://patchwork.plctlab.org/api/1.2/patches/123112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-3-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:25","name":"[2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-3-lehua.ding@rivai.ai/mbox/"},{"id":123111,"url":"https://patchwork.plctlab.org/api/1.2/patches/123111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-4-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:26","name":"[3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-4-lehua.ding@rivai.ai/mbox/"},{"id":123134,"url":"https://patchwork.plctlab.org/api/1.2/patches/123134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLj/54VvX7Xz7wRk@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:35:35","name":"[v4,1/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLj/54VvX7Xz7wRk@Thaum.localdomain/mbox/"},{"id":123135,"url":"https://patchwork.plctlab.org/api/1.2/patches/123135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAGBfPXgFGt1ox@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:36:24","name":"[v4,2/3] c++: Improve constexpr error for dangling local variables [PR110619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAGBfPXgFGt1ox@Thaum.localdomain/mbox/"},{"id":123136,"url":"https://patchwork.plctlab.org/api/1.2/patches/123136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAUdydPj5lwahN@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:37:21","name":"[v4,3/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAUdydPj5lwahN@Thaum.localdomain/mbox/"},{"id":123159,"url":"https://patchwork.plctlab.org/api/1.2/patches/123159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a793b7d9-2235-f1c5-1591-92075b8c0b99@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T10:13:25","name":"testsuite: Add a test case for PR110729","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a793b7d9-2235-f1c5-1591-92075b8c0b99@linux.ibm.com/mbox/"},{"id":123161,"url":"https://patchwork.plctlab.org/api/1.2/patches/123161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com/","msgid":"<6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com>","list_archive_url":null,"date":"2023-07-20T10:16:43","name":"sccvn: Correct the index of bias for IFN_LEN_STORE [PR110744]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com/mbox/"},{"id":123240,"url":"https://patchwork.plctlab.org/api/1.2/patches/123240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720123919.ECBCE3858C33@sourceware.org/","msgid":"<20230720123919.ECBCE3858C33@sourceware.org>","list_archive_url":null,"date":"2023-07-20T12:38:36","name":"tree-optimization/110742 - fix latent issue with permuting existing vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720123919.ECBCE3858C33@sourceware.org/mbox/"},{"id":123248,"url":"https://patchwork.plctlab.org/api/1.2/patches/123248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720124636.A1DDA385558C@sourceware.org/","msgid":"<20230720124636.A1DDA385558C@sourceware.org>","list_archive_url":null,"date":"2023-07-20T12:45:52","name":"tree-optimization/110204 - second level redundancy and simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720124636.A1DDA385558C@sourceware.org/mbox/"},{"id":123282,"url":"https://patchwork.plctlab.org/api/1.2/patches/123282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720132910.210043-1-xry111@xry111.site/","msgid":"<20230720132910.210043-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-20T13:28:02","name":"LoongArch: Allow using --with-arch=native if host CPU is LoongArch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720132910.210043-1-xry111@xry111.site/mbox/"},{"id":123303,"url":"https://patchwork.plctlab.org/api/1.2/patches/123303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk+EOndV5f4UbuW@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:00:48","name":"Cleanup code determining number of iterations from cfg profile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk+EOndV5f4UbuW@kam.mff.cuni.cz/mbox/"},{"id":123309,"url":"https://patchwork.plctlab.org/api/1.2/patches/123309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk/z6F6HX5+zGLg@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:08:15","name":"[v2] c++: fix ICE with designated initializer [PR110114]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk/z6F6HX5+zGLg@redhat.com/mbox/"},{"id":123312,"url":"https://patchwork.plctlab.org/api/1.2/patches/123312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea56d14fc5ca99685e8c5c6c94c28bdadd0bb757.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:35:19","name":"[1/3] gcc: xtensa: add mdynconfig option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea56d14fc5ca99685e8c5c6c94c28bdadd0bb757.camel@espressif.com/mbox/"},{"id":123315,"url":"https://patchwork.plctlab.org/api/1.2/patches/123315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec6efca9301a39f9545f7285d43e0251af83d9fb.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:37:22","name":"[2/3] gcc: xtensa: use dynconfig settings as builtin-macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec6efca9301a39f9545f7285d43e0251af83d9fb.camel@espressif.com/mbox/"},{"id":123317,"url":"https://patchwork.plctlab.org/api/1.2/patches/123317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e20622aa6c7b3876b25cd59cbf0c6dcb0f3ae5.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:37:59","name":"[3/3] gcc: xtensa: add xtensa*-esp*-elf multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e20622aa6c7b3876b25cd59cbf0c6dcb0f3ae5.camel@espressif.com/mbox/"},{"id":123329,"url":"https://patchwork.plctlab.org/api/1.2/patches/123329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6ilaemyh0.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:47:23","name":"[committed] Document new analyzer parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6ilaemyh0.fsf@suse.cz/mbox/"},{"id":123382,"url":"https://patchwork.plctlab.org/api/1.2/patches/123382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com/","msgid":"<4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com>","list_archive_url":null,"date":"2023-07-20T16:31:39","name":"[committed] libgomp.texi: Split OpenMP routines chapter into sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com/mbox/"},{"id":123429,"url":"https://patchwork.plctlab.org/api/1.2/patches/123429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9482c2a-285d-1ff0-c234-13f8e418d646@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T18:49:06","name":"[pushed,LRA] : Exclude reloading of frame pointer in subreg for some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9482c2a-285d-1ff0-c234-13f8e418d646@redhat.com/mbox/"},{"id":123431,"url":"https://patchwork.plctlab.org/api/1.2/patches/123431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZMydG9qLjbcdCddg=Cd5B5MXoqcPsQ=xQpYj5dwTQKNQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T18:57:53","name":"[committed] i386: Double-word sign-extension missed-optimization [PR110717]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZMydG9qLjbcdCddg=Cd5B5MXoqcPsQ=xQpYj5dwTQKNQ@mail.gmail.com/mbox/"},{"id":123436,"url":"https://patchwork.plctlab.org/api/1.2/patches/123436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW1HBv_xLevgVtxR6U-J=OgnwAOHNN5e746ubBOu7Sz7Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T19:29:26","name":"libgo patch committet: Don'\''t collect package CGOLDFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW1HBv_xLevgVtxR6U-J=OgnwAOHNN5e746ubBOu7Sz7Q@mail.gmail.com/mbox/"},{"id":123482,"url":"https://patchwork.plctlab.org/api/1.2/patches/123482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720232004.240308-1-juzhe.zhong@rivai.ai/","msgid":"<20230720232004.240308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T23:20:04","name":"cleanup: Change LEN_MASK into MASK_LEN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720232004.240308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123499,"url":"https://patchwork.plctlab.org/api/1.2/patches/123499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003148.339618-1-dmalcolm@redhat.com/","msgid":"<20230721003148.339618-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:31:48","name":"[pushed] analyzer: fix ICE on certain pointer subtractions [PR110387]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003148.339618-1-dmalcolm@redhat.com/mbox/"},{"id":123501,"url":"https://patchwork.plctlab.org/api/1.2/patches/123501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003201.339666-1-dmalcolm@redhat.com/","msgid":"<20230721003201.339666-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:32:01","name":"[pushed] analyzer/text-art: fix clang warnings [PR110433,PR110612]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003201.339666-1-dmalcolm@redhat.com/mbox/"},{"id":123500,"url":"https://patchwork.plctlab.org/api/1.2/patches/123500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003216.339710-1-dmalcolm@redhat.com/","msgid":"<20230721003216.339710-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:32:16","name":"[pushed] analyzer: avoid usage of TYPE_PRECISION on vector types [PR110455]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003216.339710-1-dmalcolm@redhat.com/mbox/"},{"id":123505,"url":"https://patchwork.plctlab.org/api/1.2/patches/123505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com/","msgid":"<894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com>","list_archive_url":null,"date":"2023-07-21T01:32:16","name":"[PATCHv2,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com/mbox/"},{"id":123513,"url":"https://patchwork.plctlab.org/api/1.2/patches/123513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721020900.298554-1-juzhe.zhong@rivai.ai/","msgid":"<20230721020900.298554-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T02:09:00","name":"cleanup: make all cond_len_* and mask_len_* consistent on the order of mask and len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721020900.298554-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123516,"url":"https://patchwork.plctlab.org/api/1.2/patches/123516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721022343.314043-1-juzhe.zhong@rivai.ai/","msgid":"<20230721022343.314043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T02:23:43","name":"cleanup: Change condition order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721022343.314043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123543,"url":"https://patchwork.plctlab.org/api/1.2/patches/123543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721040534.1511819-1-apinski@marvell.com/","msgid":"<20230721040534.1511819-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-21T04:05:34","name":"MATCH: Add Max,a> -> Max simplifcation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721040534.1511819-1-apinski@marvell.com/mbox/"},{"id":123563,"url":"https://patchwork.plctlab.org/api/1.2/patches/123563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721052911.1514944-1-apinski@marvell.com/","msgid":"<20230721052911.1514944-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-21T05:29:11","name":"libfortran: Fix build for targets that don'\''t have 10byte or 16 byte floating point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721052911.1514944-1-apinski@marvell.com/mbox/"},{"id":123575,"url":"https://patchwork.plctlab.org/api/1.2/patches/123575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com/","msgid":"<07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com>","list_archive_url":null,"date":"2023-07-21T06:03:23","name":"vect: Don'\''t vectorize a single scalar iteration loop [PR110740]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com/mbox/"},{"id":123625,"url":"https://patchwork.plctlab.org/api/1.2/patches/123625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074625.607468-1-haochen.jiang@intel.com/","msgid":"<20230721074625.607468-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-21T07:46:25","name":"Fix a typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074625.607468-1-haochen.jiang@intel.com/mbox/"},{"id":123623,"url":"https://patchwork.plctlab.org/api/1.2/patches/123623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074716.2007407-1-slyich@gmail.com/","msgid":"<20230721074716.2007407-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-07-21T07:47:16","name":"mh-mingw: drop unused BOOT_CXXFLAGS variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074716.2007407-1-slyich@gmail.com/mbox/"},{"id":123640,"url":"https://patchwork.plctlab.org/api/1.2/patches/123640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLo5+wTc5gkQIIP/@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T07:55:39","name":"Improve loop dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLo5+wTc5gkQIIP/@kam.mff.cuni.cz/mbox/"},{"id":123710,"url":"https://patchwork.plctlab.org/api/1.2/patches/123710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721095727.221308-1-juzhe.zhong@rivai.ai/","msgid":"<20230721095727.221308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T09:57:27","name":"[committed] RISC-V: Fix redundant variable declaration.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721095727.221308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123718,"url":"https://patchwork.plctlab.org/api/1.2/patches/123718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721100532.1342700-1-juzhe.zhong@rivai.ai/","msgid":"<20230721100532.1342700-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T10:05:32","name":"[V2] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721100532.1342700-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123734,"url":"https://patchwork.plctlab.org/api/1.2/patches/123734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com/","msgid":"<202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-21T10:13:51","name":"ira: update allocated_hardreg_p[] in improve_allocation() [PR110254]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com/mbox/"},{"id":123785,"url":"https://patchwork.plctlab.org/api/1.2/patches/123785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721105722.1460089-1-juzhe.zhong@rivai.ai/","msgid":"<20230721105722.1460089-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T10:57:22","name":"[V3] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721105722.1460089-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123788,"url":"https://patchwork.plctlab.org/api/1.2/patches/123788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110603.1470072-1-juzhe.zhong@rivai.ai/","msgid":"<20230721110603.1470072-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T11:06:03","name":"[V4] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110603.1470072-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123790,"url":"https://patchwork.plctlab.org/api/1.2/patches/123790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110813.3136547-1-dkm@kataplop.net/","msgid":"<20230721110813.3136547-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-07-21T11:08:13","name":"[v2] mklog: handle Signed-Off-By, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110813.3136547-1-dkm@kataplop.net/mbox/"},{"id":123805,"url":"https://patchwork.plctlab.org/api/1.2/patches/123805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7af59d52ac0b134bd6617b8f45673c63981e13a.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:21:57","name":"[C] : Add Walloc-type to warn about insufficient size in allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7af59d52ac0b134bd6617b8f45673c63981e13a.camel@tugraz.at/mbox/"},{"id":123812,"url":"https://patchwork.plctlab.org/api/1.2/patches/123812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpvtOUb8IBYs7zT@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:44:52","name":"finite_loop_p tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpvtOUb8IBYs7zT@kam.mff.cuni.cz/mbox/"},{"id":123819,"url":"https://patchwork.plctlab.org/api/1.2/patches/123819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721114835.23667-1-cupertino.miranda@oracle.com/","msgid":"<20230721114835.23667-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T11:48:35","name":"bpf: pseudo-c assembly dialect support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721114835.23667-1-cupertino.miranda@oracle.com/mbox/"},{"id":123820,"url":"https://patchwork.plctlab.org/api/1.2/patches/123820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpxj7Ue6W4xkFjC@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:52:47","name":"loop-ch improvements, part 5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpxj7Ue6W4xkFjC@kam.mff.cuni.cz/mbox/"},{"id":123822,"url":"https://patchwork.plctlab.org/api/1.2/patches/123822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721115730.A4C49134BA@imap2.suse-dmz.suse.de/","msgid":"<20230721115730.A4C49134BA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-21T11:57:30","name":"tree-optimization/41320 - remove bogus XFAILed testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721115730.A4C49134BA@imap2.suse-dmz.suse.de/mbox/"},{"id":123828,"url":"https://patchwork.plctlab.org/api/1.2/patches/123828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded23976-2873-45de-aebd-28839ec0ab82@AZ-NEU-EX03.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T12:11:38","name":"Reduce floating-point difficulties in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded23976-2873-45de-aebd-28839ec0ab82@AZ-NEU-EX03.Arm.com/mbox/"},{"id":123909,"url":"https://patchwork.plctlab.org/api/1.2/patches/123909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqaIhXmspiXfoVl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T14:45:54","name":"Fix sreal::to_int and implement sreal::to_nearest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqaIhXmspiXfoVl@kam.mff.cuni.cz/mbox/"},{"id":123910,"url":"https://patchwork.plctlab.org/api/1.2/patches/123910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721145046.93041-1-iain@sandoe.co.uk/","msgid":"<20230721145046.93041-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-21T14:50:46","name":"[pushed] Darwin: Handle linker '\''-demangle'\'' option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721145046.93041-1-iain@sandoe.co.uk/mbox/"},{"id":123912,"url":"https://patchwork.plctlab.org/api/1.2/patches/123912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721150851.94504-1-drross@redhat.com/","msgid":"<20230721150851.94504-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-21T15:08:51","name":"match.pd: Implement missed optimization (x << c) >> c -> -(x & 1) [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721150851.94504-1-drross@redhat.com/mbox/"},{"id":123914,"url":"https://patchwork.plctlab.org/api/1.2/patches/123914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721151626.67206-1-siddhesh@gotplt.org/","msgid":"<20230721151626.67206-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-07-21T15:16:26","name":"testsuite/110763: Ensure zero return from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721151626.67206-1-siddhesh@gotplt.org/mbox/"},{"id":123926,"url":"https://patchwork.plctlab.org/api/1.2/patches/123926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GFBmnmg1xSa0FEU-nENjdCZVCS28-3rVn2r1qCXxyyeag@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:35:11","name":"[WIP,RFC] analyzer: Add optional trim of the analyzer diagnostics going too deep [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GFBmnmg1xSa0FEU-nENjdCZVCS28-3rVn2r1qCXxyyeag@mail.gmail.com/mbox/"},{"id":123928,"url":"https://patchwork.plctlab.org/api/1.2/patches/123928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmI1whqFD6yl0m@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:37:07","name":"Implement flat loop profile detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmI1whqFD6yl0m@kam.mff.cuni.cz/mbox/"},{"id":123929,"url":"https://patchwork.plctlab.org/api/1.2/patches/123929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmTxelBV+8iRmH@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:37:51","name":"Fix gcc.dg/tree-ssa/copy-headers-9.c and gcc.dg/tree-ssa/dce-1.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmTxelBV+8iRmH@kam.mff.cuni.cz/mbox/"},{"id":123963,"url":"https://patchwork.plctlab.org/api/1.2/patches/123963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721164332.29163-1-cupertino.miranda@oracle.com/","msgid":"<20230721164332.29163-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T16:43:32","name":"bpf: fixed template for neg (added second operand)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721164332.29163-1-cupertino.miranda@oracle.com/mbox/"},{"id":124043,"url":"https://patchwork.plctlab.org/api/1.2/patches/124043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721175552.2693295-1-vineetg@rivosinc.com/","msgid":"<20230721175552.2693295-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-21T17:55:52","name":"RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721175552.2693295-1-vineetg@rivosinc.com/mbox/"},{"id":124051,"url":"https://patchwork.plctlab.org/api/1.2/patches/124051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181839.119969-1-drross@redhat.com/","msgid":"<20230721181839.119969-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-21T18:18:39","name":"match.pd, v2: Implement missed optimization (~X | Y) ^ X -> ~(X & Y) [PR109986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181839.119969-1-drross@redhat.com/mbox/"},{"id":124052,"url":"https://patchwork.plctlab.org/api/1.2/patches/124052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181954.31073-1-cupertino.miranda@oracle.com/","msgid":"<20230721181954.31073-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T18:19:54","name":"[v4] bpf: fixed template for neg (added second operand)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181954.31073-1-cupertino.miranda@oracle.com/mbox/"},{"id":124053,"url":"https://patchwork.plctlab.org/api/1.2/patches/124053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183035.2892020-1-vineetg@rivosinc.com/","msgid":"<20230721183035.2892020-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-21T18:30:35","name":"[v2] RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183035.2892020-1-vineetg@rivosinc.com/mbox/"},{"id":124055,"url":"https://patchwork.plctlab.org/api/1.2/patches/124055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183420.1806906-1-ppalka@redhat.com/","msgid":"<20230721183420.1806906-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-21T18:34:19","name":"[2/1] c++: passing partially inst ttp as ttp [PR110566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183420.1806906-1-ppalka@redhat.com/mbox/"},{"id":124062,"url":"https://patchwork.plctlab.org/api/1.2/patches/124062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721190234.1018000-1-qing.zhao@oracle.com/","msgid":"<20230721190234.1018000-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-07-21T19:02:34","name":"gcc-13/changes.html: Add and fix URL to -fstrict-flex-array option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721190234.1018000-1-qing.zhao@oracle.com/mbox/"},{"id":124065,"url":"https://patchwork.plctlab.org/api/1.2/patches/124065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLriUhZiW+1cEByD@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-21T19:53:54","name":"[committed] Require target lra in gcc.c-torture/compile/asmgoto-6.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLriUhZiW+1cEByD@mx3210.localdomain/mbox/"},{"id":124105,"url":"https://patchwork.plctlab.org/api/1.2/patches/124105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAvei9q1OdtwLCJcog5omsftpaXjMfwdNqX=X5BpVYYrQjpYzw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T21:22:48","name":"libstdc++ Add cstdarg to freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAvei9q1OdtwLCJcog5omsftpaXjMfwdNqX=X5BpVYYrQjpYzw@mail.gmail.com/mbox/"},{"id":124110,"url":"https://patchwork.plctlab.org/api/1.2/patches/124110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721212937.1784983-1-thiago.bauermann@linaro.org/","msgid":"<20230721212937.1784983-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-07-21T21:29:37","name":"testsuite: Adjust g++.dg/gomp/pr58567.C to new compiler message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721212937.1784983-1-thiago.bauermann@linaro.org/mbox/"},{"id":124138,"url":"https://patchwork.plctlab.org/api/1.2/patches/124138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721223835.630543-1-polacek@redhat.com/","msgid":"<20230721223835.630543-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-21T22:38:35","name":"c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721223835.630543-1-polacek@redhat.com/mbox/"},{"id":124145,"url":"https://patchwork.plctlab.org/api/1.2/patches/124145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-2-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-2-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:48","name":"[v3,1/4] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-2-lhyatt@gmail.com/mbox/"},{"id":124142,"url":"https://patchwork.plctlab.org/api/1.2/patches/124142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-3-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-3-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:49","name":"[v3,2/4] diagnostics: Handle generated data locations in edit_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-3-lhyatt@gmail.com/mbox/"},{"id":124144,"url":"https://patchwork.plctlab.org/api/1.2/patches/124144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-4-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-4-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:50","name":"[v3,3/4] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-4-lhyatt@gmail.com/mbox/"},{"id":124143,"url":"https://patchwork.plctlab.org/api/1.2/patches/124143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-5-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-5-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:51","name":"[v3,4/4] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-5-lhyatt@gmail.com/mbox/"},{"id":124149,"url":"https://patchwork.plctlab.org/api/1.2/patches/124149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef666dabca521f1afb9cc1cf6d65a3a9a0a17084.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T23:38:04","name":"[1/2,ver,2] rs6000, add argument to function find_instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef666dabca521f1afb9cc1cf6d65a3a9a0a17084.camel@us.ibm.com/mbox/"},{"id":124162,"url":"https://patchwork.plctlab.org/api/1.2/patches/124162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com/","msgid":"<6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com>","list_archive_url":null,"date":"2023-07-22T00:34:43","name":"[pushed,LRA] : Fix sparc bootstrap after recent patch for fp elimination for avr LRA port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com/mbox/"},{"id":124326,"url":"https://patchwork.plctlab.org/api/1.2/patches/124326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com/","msgid":"<00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T14:17:40","name":"[x86] Don'\''t use insvti_{high, low}part with -O0 (for compile-time).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com/mbox/"},{"id":124330,"url":"https://patchwork.plctlab.org/api/1.2/patches/124330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyJ/BH+crWg3hD@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:13:43","name":"[v5,1/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyJ/BH+crWg3hD@Thaum.localdomain/mbox/"},{"id":124331,"url":"https://patchwork.plctlab.org/api/1.2/patches/124331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyXbXiHvhfAjpu@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:14:37","name":"[v5,2/3] c++: Prevent dangling pointers from becoming nullptr in constexpr [PR110619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyXbXiHvhfAjpu@Thaum.localdomain/mbox/"},{"id":124332,"url":"https://patchwork.plctlab.org/api/1.2/patches/124332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvygoqcP+PcF6hH@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:15:14","name":"[v5,3/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvygoqcP+PcF6hH@Thaum.localdomain/mbox/"},{"id":124333,"url":"https://patchwork.plctlab.org/api/1.2/patches/124333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com/","msgid":"<00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T15:37:39","name":"[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com/mbox/"},{"id":124335,"url":"https://patchwork.plctlab.org/api/1.2/patches/124335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com/","msgid":"<9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com>","list_archive_url":null,"date":"2023-07-22T15:53:24","name":"[committed] Fix length computation bug in bfin port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com/mbox/"},{"id":124340,"url":"https://patchwork.plctlab.org/api/1.2/patches/124340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com/","msgid":"<00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T16:44:48","name":"Replace lra-spill.cc'\''s return_regno_p with return_reg_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com/mbox/"},{"id":124342,"url":"https://patchwork.plctlab.org/api/1.2/patches/124342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307221710120.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-22T16:57:30","name":"[committed] testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307221710120.28892@tpp.orcam.me.uk/mbox/"},{"id":124372,"url":"https://patchwork.plctlab.org/api/1.2/patches/124372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722205302.1611930-1-apinski@marvell.com/","msgid":"<20230722205302.1611930-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-22T20:53:02","name":"Fix alpha building","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722205302.1611930-1-apinski@marvell.com/mbox/"},{"id":124378,"url":"https://patchwork.plctlab.org/api/1.2/patches/124378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722214805.297932-1-vineetg@rivosinc.com/","msgid":"<20230722214805.297932-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-22T21:48:05","name":"[Committed] RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722214805.297932-1-vineetg@rivosinc.com/mbox/"},{"id":124392,"url":"https://patchwork.plctlab.org/api/1.2/patches/124392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722232649.1617746-1-apinski@marvell.com/","msgid":"<20230722232649.1617746-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-22T23:26:49","name":"Fix 100864: `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722232649.1617746-1-apinski@marvell.com/mbox/"},{"id":124404,"url":"https://patchwork.plctlab.org/api/1.2/patches/124404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-1-apinski@marvell.com/","msgid":"<20230723010645.1622083-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-23T01:06:44","name":"[1/2] Fix PR 110066: crash with -pg -static on riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-1-apinski@marvell.com/mbox/"},{"id":124403,"url":"https://patchwork.plctlab.org/api/1.2/patches/124403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-2-apinski@marvell.com/","msgid":"<20230723010645.1622083-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-23T01:06:45","name":"[2/2] AARCH64: Turn off unwind tables for crtbeginT.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-2-apinski@marvell.com/mbox/"},{"id":124418,"url":"https://patchwork.plctlab.org/api/1.2/patches/124418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723042333.1956144-1-lehua.ding@rivai.ai/","msgid":"<20230723042333.1956144-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-23T04:23:33","name":"[V5] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723042333.1956144-1-lehua.ding@rivai.ai/mbox/"},{"id":124450,"url":"https://patchwork.plctlab.org/api/1.2/patches/124450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723131120.3626085-1-pan2.li@intel.com/","msgid":"<20230723131120.3626085-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-23T13:11:20","name":"[v5] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723131120.3626085-1-pan2.li@intel.com/mbox/"},{"id":124457,"url":"https://patchwork.plctlab.org/api/1.2/patches/124457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723135421.3723462-1-pan2.li@intel.com/","msgid":"<20230723135421.3723462-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-23T13:54:21","name":"[v1] RISC-V: Bugfix for allowing incorrect dyn for static rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723135421.3723462-1-pan2.li@intel.com/mbox/"},{"id":124553,"url":"https://patchwork.plctlab.org/api/1.2/patches/124553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-2-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:17","name":"[V2,1/5] OpenMP: Add OMP_STRUCTURED_BLOCK and GIMPLE_OMP_STRUCTURED_BLOCK.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-2-sandra@codesourcery.com/mbox/"},{"id":124552,"url":"https://patchwork.plctlab.org/api/1.2/patches/124552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-3-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:18","name":"[V2,2/5] OpenMP: C front end support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-3-sandra@codesourcery.com/mbox/"},{"id":124555,"url":"https://patchwork.plctlab.org/api/1.2/patches/124555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-4-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:19","name":"[V2,3/5] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-4-sandra@codesourcery.com/mbox/"},{"id":124554,"url":"https://patchwork.plctlab.org/api/1.2/patches/124554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-5-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:20","name":"[V2,4/5] OpenMP: New C/C++ testcases for imperfectly nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-5-sandra@codesourcery.com/mbox/"},{"id":124556,"url":"https://patchwork.plctlab.org/api/1.2/patches/124556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-6-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:21","name":"[V2,5/5] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-6-sandra@codesourcery.com/mbox/"},{"id":124580,"url":"https://patchwork.plctlab.org/api/1.2/patches/124580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724024209.3595212-1-pan2.li@intel.com/","msgid":"<20230724024209.3595212-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-24T02:42:09","name":"[v6] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724024209.3595212-1-pan2.li@intel.com/mbox/"},{"id":124590,"url":"https://patchwork.plctlab.org/api/1.2/patches/124590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACJEya+wn7RxPr5t=MYr5Xedh7q4q=CfwiA=qPP7mk4uRq7zNw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T03:28:02","name":"libstdc++: Add missing constexpr specifier and function overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACJEya+wn7RxPr5t=MYr5Xedh7q4q=CfwiA=qPP7mk4uRq7zNw@mail.gmail.com/mbox/"},{"id":124662,"url":"https://patchwork.plctlab.org/api/1.2/patches/124662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075008.5B449138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724075008.5B449138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T07:50:07","name":"tree-optimization/110777 - abnormals and recent PRE optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075008.5B449138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124663,"url":"https://patchwork.plctlab.org/api/1.2/patches/124663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T07:50:21","name":"tree-optimization/110766 - missing PHI location check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124714,"url":"https://patchwork.plctlab.org/api/1.2/patches/124714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724090915.27231-1-jose.marchesi@oracle.com/","msgid":"<20230724090915.27231-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T09:09:15","name":"[COMMITTED] bpf: make use of the bswap{16,32,64} V4 BPF instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724090915.27231-1-jose.marchesi@oracle.com/mbox/"},{"id":124745,"url":"https://patchwork.plctlab.org/api/1.2/patches/124745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724095712.14497-1-jose.marchesi@oracle.com/","msgid":"<20230724095712.14497-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T09:57:12","name":"[COMMITTED] bpf: remove -mkernel option and BPF_KERNEL_VERSION_CODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724095712.14497-1-jose.marchesi@oracle.com/mbox/"},{"id":124773,"url":"https://patchwork.plctlab.org/api/1.2/patches/124773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724102431.94955138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724102431.94955138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T10:24:31","name":"Remove SLP_TREE_VEC_STMTS in favor of SLP_TREE_VEC_DEFS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724102431.94955138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124792,"url":"https://patchwork.plctlab.org/api/1.2/patches/124792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com/","msgid":"<6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com>","list_archive_url":null,"date":"2023-07-24T11:02:29","name":"[Hashtable] Performance optimization through use of insertion hint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com/mbox/"},{"id":124876,"url":"https://patchwork.plctlab.org/api/1.2/patches/124876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com/","msgid":"<021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-24T11:37:59","name":"[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com/mbox/"},{"id":124879,"url":"https://patchwork.plctlab.org/api/1.2/patches/124879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724114650.61923-1-juzhe.zhong@rivai.ai/","msgid":"<20230724114650.61923-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-24T11:46:50","name":"VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724114650.61923-1-juzhe.zhong@rivai.ai/mbox/"},{"id":124911,"url":"https://patchwork.plctlab.org/api/1.2/patches/124911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123251.6923E138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724123251.6923E138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T12:32:51","name":"[i386] remove unused tree-vectorizer.h includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123251.6923E138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124912,"url":"https://patchwork.plctlab.org/api/1.2/patches/124912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123304.1DD21138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724123304.1DD21138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T12:33:03","name":"Remove unused tree-vectorizer.h include","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123304.1DD21138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":125006,"url":"https://patchwork.plctlab.org/api/1.2/patches/125006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d26218f5-6167-97a7-9f4c-0458b6ba8297@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T13:59:27","name":"[committed,RISC-V] Fix minor issues in diagnostic message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d26218f5-6167-97a7-9f4c-0458b6ba8297@gmail.com/mbox/"},{"id":125007,"url":"https://patchwork.plctlab.org/api/1.2/patches/125007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724140143.17350-1-jose.marchesi@oracle.com/","msgid":"<20230724140143.17350-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T14:01:43","name":"[COMMITTED] bpf: sdiv/smod are now part of BPF V4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724140143.17350-1-jose.marchesi@oracle.com/mbox/"},{"id":125010,"url":"https://patchwork.plctlab.org/api/1.2/patches/125010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com/","msgid":"<7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com>","list_archive_url":null,"date":"2023-07-24T14:14:37","name":"[committed] Use single quote rather than backquote in RISC-V diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com/mbox/"},{"id":125049,"url":"https://patchwork.plctlab.org/api/1.2/patches/125049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com/","msgid":"<8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com>","list_archive_url":null,"date":"2023-07-24T14:39:27","name":"[GCC13] PR tree-optimization/110315 - Add auto-resizing capability to irange'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com/mbox/"},{"id":125077,"url":"https://patchwork.plctlab.org/api/1.2/patches/125077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL6gc8/8THf1gN18@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-24T16:01:55","name":"range-op-float: Fix up -frounding-math frange_arithmetic +- handling [PR110755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL6gc8/8THf1gN18@tucnak/mbox/"},{"id":125169,"url":"https://patchwork.plctlab.org/api/1.2/patches/125169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724190858.8717-1-david.faust@oracle.com/","msgid":"<20230724190858.8717-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-24T19:08:58","name":"[COMMITTED] bpf: add pseudo-c asm dialect for \"nop\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724190858.8717-1-david.faust@oracle.com/mbox/"},{"id":125174,"url":"https://patchwork.plctlab.org/api/1.2/patches/125174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b915c835-71fb-ae37-487e-221a98ac22ec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T19:43:10","name":"OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b915c835-71fb-ae37-487e-221a98ac22ec@codesourcery.com/mbox/"},{"id":125179,"url":"https://patchwork.plctlab.org/api/1.2/patches/125179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200510.83085-1-jwakely@redhat.com/","msgid":"<20230724200510.83085-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-24T20:04:23","name":"[committed] libstdc++; Do not use strtold for hppa-hpux [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200510.83085-1-jwakely@redhat.com/mbox/"},{"id":125180,"url":"https://patchwork.plctlab.org/api/1.2/patches/125180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200642.84915-1-jwakely@redhat.com/","msgid":"<20230724200642.84915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-24T20:05:32","name":"libstdc++: Reuse double overload of __convert_to_v if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200642.84915-1-jwakely@redhat.com/mbox/"},{"id":125187,"url":"https://patchwork.plctlab.org/api/1.2/patches/125187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724203536.40091-1-hjl.tools@gmail.com/","msgid":"<20230724203536.40091-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-24T20:35:36","name":"[v3] x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724203536.40091-1-hjl.tools@gmail.com/mbox/"},{"id":125211,"url":"https://patchwork.plctlab.org/api/1.2/patches/125211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL79Q71QB3UOT+nE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T22:37:55","name":"[v2] c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL79Q71QB3UOT+nE@redhat.com/mbox/"},{"id":125222,"url":"https://patchwork.plctlab.org/api/1.2/patches/125222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724234851.1736326-1-apinski@marvell.com/","msgid":"<20230724234851.1736326-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-24T23:48:51","name":"Fix PR 93044: extra cast is not removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724234851.1736326-1-apinski@marvell.com/mbox/"},{"id":125262,"url":"https://patchwork.plctlab.org/api/1.2/patches/125262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com/","msgid":"<485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com>","list_archive_url":null,"date":"2023-07-25T02:10:16","name":"[PATCHv2,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com/mbox/"},{"id":125335,"url":"https://patchwork.plctlab.org/api/1.2/patches/125335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725055156.595718-1-pan2.li@intel.com/","msgid":"<20230725055156.595718-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-25T05:51:56","name":"[v7] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725055156.595718-1-pan2.li@intel.com/mbox/"},{"id":125346,"url":"https://patchwork.plctlab.org/api/1.2/patches/125346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725063910.1568-1-jinma@linux.alibaba.com/","msgid":"<20230725063910.1568-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-25T06:39:10","name":"RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725063910.1568-1-jinma@linux.alibaba.com/mbox/"},{"id":125366,"url":"https://patchwork.plctlab.org/api/1.2/patches/125366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725072816.1629-1-jinma@linux.alibaba.com/","msgid":"<20230725072816.1629-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-25T07:28:16","name":"[v2] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725072816.1629-1-jinma@linux.alibaba.com/mbox/"},{"id":125529,"url":"https://patchwork.plctlab.org/api/1.2/patches/125529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com/","msgid":"<8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com>","list_archive_url":null,"date":"2023-07-25T11:14:03","name":"OpenMP/Fortran: Reject declarations between target + teams (was: [Patch] OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71065])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com/mbox/"},{"id":125530,"url":"https://patchwork.plctlab.org/api/1.2/patches/125530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com/","msgid":"<004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-25T11:31:45","name":"PR rtl-optimization/110587: Reduce useless moves in compile-time hog.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com/mbox/"},{"id":125611,"url":"https://patchwork.plctlab.org/api/1.2/patches/125611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725125832.1399590-1-juzhe.zhong@rivai.ai/","msgid":"<20230725125832.1399590-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-25T12:58:32","name":"internal-fn: Refine macro define of COND_* and COND_LEN_* internal functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725125832.1399590-1-juzhe.zhong@rivai.ai/mbox/"},{"id":125618,"url":"https://patchwork.plctlab.org/api/1.2/patches/125618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725132352.1638772-1-poulhies@adacore.com/","msgid":"<20230725132352.1638772-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-25T13:23:52","name":"[COMMITTED] Adjust one Ada test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725132352.1638772-1-poulhies@adacore.com/mbox/"},{"id":125621,"url":"https://patchwork.plctlab.org/api/1.2/patches/125621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134050.706193856DF4@sourceware.org/","msgid":"<20230725134050.706193856DF4@sourceware.org>","list_archive_url":null,"date":"2023-07-25T13:40:04","name":"rtl-optimization/110587 - remove quadratic regno_in_use_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134050.706193856DF4@sourceware.org/mbox/"},{"id":125622,"url":"https://patchwork.plctlab.org/api/1.2/patches/125622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134122.51229385773F@sourceware.org/","msgid":"<20230725134122.51229385773F@sourceware.org>","list_archive_url":null,"date":"2023-07-25T13:40:33","name":"rtl-optimization/110587 - speedup find_hard_regno_for_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134122.51229385773F@sourceware.org/mbox/"},{"id":125632,"url":"https://patchwork.plctlab.org/api/1.2/patches/125632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725140335.1739803-1-juzhe.zhong@rivai.ai/","msgid":"<20230725140335.1739803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-25T14:03:35","name":"RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725140335.1739803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":125712,"url":"https://patchwork.plctlab.org/api/1.2/patches/125712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com/","msgid":"<5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com>","list_archive_url":null,"date":"2023-07-25T15:52:06","name":"[OpenACC,2.7] Connect readonly modifier to points-to analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com/mbox/"},{"id":125725,"url":"https://patchwork.plctlab.org/api/1.2/patches/125725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL//joAT7GOtzusI@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-25T16:59:58","name":"[v3] c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL//joAT7GOtzusI@redhat.com/mbox/"},{"id":125746,"url":"https://patchwork.plctlab.org/api/1.2/patches/125746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-2-patrick@rivosinc.com/","msgid":"<20230725180206.284777-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:55","name":"[gcc13,backport,01/12] RISC-V: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-2-patrick@rivosinc.com/mbox/"},{"id":125749,"url":"https://patchwork.plctlab.org/api/1.2/patches/125749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-3-patrick@rivosinc.com/","msgid":"<20230725180206.284777-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:56","name":"[gcc13,backport,02/12] RISC-V: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-3-patrick@rivosinc.com/mbox/"},{"id":125747,"url":"https://patchwork.plctlab.org/api/1.2/patches/125747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-4-patrick@rivosinc.com/","msgid":"<20230725180206.284777-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:57","name":"[gcc13,backport,03/12] RISC-V: Enforce subword atomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-4-patrick@rivosinc.com/mbox/"},{"id":125748,"url":"https://patchwork.plctlab.org/api/1.2/patches/125748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-5-patrick@rivosinc.com/","msgid":"<20230725180206.284777-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:58","name":"[gcc13,backport,04/12] RISC-V: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-5-patrick@rivosinc.com/mbox/"},{"id":125753,"url":"https://patchwork.plctlab.org/api/1.2/patches/125753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-6-patrick@rivosinc.com/","msgid":"<20230725180206.284777-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:59","name":"[gcc13,backport,05/12] RISC-V: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-6-patrick@rivosinc.com/mbox/"},{"id":125750,"url":"https://patchwork.plctlab.org/api/1.2/patches/125750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-7-patrick@rivosinc.com/","msgid":"<20230725180206.284777-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:00","name":"[gcc13,backport,06/12] RISC-V: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-7-patrick@rivosinc.com/mbox/"},{"id":125754,"url":"https://patchwork.plctlab.org/api/1.2/patches/125754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-8-patrick@rivosinc.com/","msgid":"<20230725180206.284777-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:01","name":"[gcc13,backport,07/12] RISC-V: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-8-patrick@rivosinc.com/mbox/"},{"id":125752,"url":"https://patchwork.plctlab.org/api/1.2/patches/125752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-9-patrick@rivosinc.com/","msgid":"<20230725180206.284777-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:02","name":"[gcc13,backport,08/12] RISC-V: Weaken LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-9-patrick@rivosinc.com/mbox/"},{"id":125751,"url":"https://patchwork.plctlab.org/api/1.2/patches/125751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-10-patrick@rivosinc.com/","msgid":"<20230725180206.284777-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:03","name":"[gcc13,backport,09/12] RISC-V: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-10-patrick@rivosinc.com/mbox/"},{"id":125756,"url":"https://patchwork.plctlab.org/api/1.2/patches/125756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-11-patrick@rivosinc.com/","msgid":"<20230725180206.284777-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:04","name":"[gcc13,backport,10/12] RISC-V: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-11-patrick@rivosinc.com/mbox/"},{"id":125755,"url":"https://patchwork.plctlab.org/api/1.2/patches/125755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-12-patrick@rivosinc.com/","msgid":"<20230725180206.284777-12-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:05","name":"[gcc13,backport,11/12] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-12-patrick@rivosinc.com/mbox/"},{"id":125757,"url":"https://patchwork.plctlab.org/api/1.2/patches/125757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-13-patrick@rivosinc.com/","msgid":"<20230725180206.284777-13-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:06","name":"[gcc13,backport,12/12] riscv: fix error: control reaches end of non-void function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-13-patrick@rivosinc.com/mbox/"},{"id":125759,"url":"https://patchwork.plctlab.org/api/1.2/patches/125759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725181118.27484-1-simonaytes.yan@ispras.ru/","msgid":"<20230725181118.27484-1-simonaytes.yan@ispras.ru>","list_archive_url":null,"date":"2023-07-25T18:11:18","name":"Replace invariant ternlog operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725181118.27484-1-simonaytes.yan@ispras.ru/mbox/"},{"id":125772,"url":"https://patchwork.plctlab.org/api/1.2/patches/125772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-1-aldyh@redhat.com/","msgid":"<20230725190739.37779-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:07:29","name":"[COMMITTED] Make some functions in CCP static.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-1-aldyh@redhat.com/mbox/"},{"id":125773,"url":"https://patchwork.plctlab.org/api/1.2/patches/125773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-3-aldyh@redhat.com/","msgid":"<20230725190739.37779-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:07:31","name":"Initialize value in bit_value_unop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-3-aldyh@redhat.com/mbox/"},{"id":125775,"url":"https://patchwork.plctlab.org/api/1.2/patches/125775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-07-25T19:24:23","name":"List myself as \"nvptx port\" maintainer (was: Thomas Schwinge appointed co-maintainer of the nvptx backend)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":125787,"url":"https://patchwork.plctlab.org/api/1.2/patches/125787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725195552.1249139-1-polacek@redhat.com/","msgid":"<20230725195552.1249139-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:55:52","name":"c++: clear tf_partial et al in instantiate_template [PR108960]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725195552.1249139-1-polacek@redhat.com/mbox/"},{"id":125819,"url":"https://patchwork.plctlab.org/api/1.2/patches/125819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com/","msgid":"<3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com>","list_archive_url":null,"date":"2023-07-25T21:45:54","name":"OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com/mbox/"},{"id":125828,"url":"https://patchwork.plctlab.org/api/1.2/patches/125828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725215534.1791062-1-apinski@marvell.com/","msgid":"<20230725215534.1791062-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-25T21:55:34","name":"[COMMITTED] Fix 110803: use of plain char instead of signed char","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725215534.1791062-1-apinski@marvell.com/mbox/"},{"id":125839,"url":"https://patchwork.plctlab.org/api/1.2/patches/125839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-1-david.faust@oracle.com/","msgid":"<20230725220821.11431-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:08:20","name":"[1/2] bpf: don'\''t print () in bpf_print_operand_address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-1-david.faust@oracle.com/mbox/"},{"id":125840,"url":"https://patchwork.plctlab.org/api/1.2/patches/125840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-2-david.faust@oracle.com/","msgid":"<20230725220821.11431-2-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:08:21","name":"[2/2] bpf: add v3 atomic instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-2-david.faust@oracle.com/mbox/"},{"id":125901,"url":"https://patchwork.plctlab.org/api/1.2/patches/125901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224308.12304-1-david.faust@oracle.com/","msgid":"<20230725224308.12304-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:43:08","name":"[v2,2/2] bpf: add v3 atomic instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224308.12304-1-david.faust@oracle.com/mbox/"},{"id":125906,"url":"https://patchwork.plctlab.org/api/1.2/patches/125906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224920.12392-1-david.faust@oracle.com/","msgid":"<20230725224920.12392-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:49:20","name":"[COMMITTED,v2,1/2] bpf: don'\''t print () in bpf_print_operand_address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224920.12392-1-david.faust@oracle.com/mbox/"},{"id":126030,"url":"https://patchwork.plctlab.org/api/1.2/patches/126030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726014423.2747726-1-jason@redhat.com/","msgid":"<20230726014423.2747726-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-26T01:44:23","name":"[pushed] testsuite: run C++11 tests in C++11 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726014423.2747726-1-jason@redhat.com/mbox/"},{"id":126037,"url":"https://patchwork.plctlab.org/api/1.2/patches/126037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726021712.352-1-jinma@linux.alibaba.com/","msgid":"<20230726021712.352-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-26T02:17:12","name":"[v3] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726021712.352-1-jinma@linux.alibaba.com/mbox/"},{"id":126039,"url":"https://patchwork.plctlab.org/api/1.2/patches/126039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com/","msgid":"<7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com>","list_archive_url":null,"date":"2023-07-26T02:52:50","name":"vect: Treat VMAT_ELEMENTWISE as scalar load in costing [PR110776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com/mbox/"},{"id":126040,"url":"https://patchwork.plctlab.org/api/1.2/patches/126040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b35db8fe-8397-607c-3e2d-035fe49380d2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T02:53:11","name":"rs6000: Correct vsx operands output for xxeval [PR110741]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b35db8fe-8397-607c-3e2d-035fe49380d2@linux.ibm.com/mbox/"},{"id":126051,"url":"https://patchwork.plctlab.org/api/1.2/patches/126051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726040429.30868-1-xuli1@eswincomputing.com/","msgid":"<20230726040429.30868-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T04:04:29","name":"RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726040429.30868-1-xuli1@eswincomputing.com/mbox/"},{"id":126114,"url":"https://patchwork.plctlab.org/api/1.2/patches/126114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726054104.403-1-jinma@linux.alibaba.com/","msgid":"<20230726054104.403-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-26T05:41:04","name":"[v4] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726054104.403-1-jinma@linux.alibaba.com/mbox/"},{"id":126135,"url":"https://patchwork.plctlab.org/api/1.2/patches/126135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMDEwXtgcXt8s3kE@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-26T07:01:21","name":"Fix profile_count::to_sreal_scale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMDEwXtgcXt8s3kE@kam.mff.cuni.cz/mbox/"},{"id":126164,"url":"https://patchwork.plctlab.org/api/1.2/patches/126164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sP4X5xFOS0295td32=BBvbtbbN2=h+G7SEJkeQ8hWrUKw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T07:54:53","name":"RISC-V: Replace unspec with bitreverse in riscv_brev8_ insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sP4X5xFOS0295td32=BBvbtbbN2=h+G7SEJkeQ8hWrUKw@mail.gmail.com/mbox/"},{"id":126166,"url":"https://patchwork.plctlab.org/api/1.2/patches/126166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726080008.14544-1-xuli1@eswincomputing.com/","msgid":"<20230726080008.14544-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T08:00:08","name":"[v2] RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726080008.14544-1-xuli1@eswincomputing.com/mbox/"},{"id":126171,"url":"https://patchwork.plctlab.org/api/1.2/patches/126171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726081836.16660-1-xuli1@eswincomputing.com/","msgid":"<20230726081836.16660-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T08:18:36","name":"RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726081836.16660-1-xuli1@eswincomputing.com/mbox/"},{"id":126182,"url":"https://patchwork.plctlab.org/api/1.2/patches/126182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-1-aldyh@redhat.com/","msgid":"<20230726084224.43416-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:15","name":"[COMMITTED,range-ops] Handle bitmasks for unary operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-1-aldyh@redhat.com/mbox/"},{"id":126183,"url":"https://patchwork.plctlab.org/api/1.2/patches/126183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-2-aldyh@redhat.com/","msgid":"<20230726084224.43416-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:16","name":"[COMMITTED,range-ops] Handle bitmasks for BIT_NOT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-2-aldyh@redhat.com/mbox/"},{"id":126184,"url":"https://patchwork.plctlab.org/api/1.2/patches/126184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-3-aldyh@redhat.com/","msgid":"<20230726084224.43416-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:17","name":"[COMMITTED,range-ops] Handle bitmasks for ABS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-3-aldyh@redhat.com/mbox/"},{"id":126185,"url":"https://patchwork.plctlab.org/api/1.2/patches/126185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-4-aldyh@redhat.com/","msgid":"<20230726084224.43416-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:18","name":"[COMMITTED,range-ops] Handle bitmasks for ABSU_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-4-aldyh@redhat.com/mbox/"},{"id":126234,"url":"https://patchwork.plctlab.org/api/1.2/patches/126234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726094219.D4A98385AF89@sourceware.org/","msgid":"<20230726094219.D4A98385AF89@sourceware.org>","list_archive_url":null,"date":"2023-07-26T09:41:34","name":"tree-optimization/110799 - fix bug in code hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726094219.D4A98385AF89@sourceware.org/mbox/"},{"id":126243,"url":"https://patchwork.plctlab.org/api/1.2/patches/126243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com/","msgid":"<30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com>","list_archive_url":null,"date":"2023-07-26T09:57:25","name":"[committed] libgomp.texi: Add status item, @ref and document omp_in_explicit_task","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com/mbox/"},{"id":126245,"url":"https://patchwork.plctlab.org/api/1.2/patches/126245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726101045.13125-1-jose.marchesi@oracle.com/","msgid":"<20230726101045.13125-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-26T10:10:45","name":"[COMMITTED] bpf: fix generation of neg and neg32 BPF instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726101045.13125-1-jose.marchesi@oracle.com/mbox/"},{"id":126247,"url":"https://patchwork.plctlab.org/api/1.2/patches/126247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bT=yF69w62M5ZsFmaoENaLw=-NdyPtXSSmfN4miw1cbQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T10:21:51","name":"[committed] i386: Clear upper half of XMM register for V2SFmode operations [PR110762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bT=yF69w62M5ZsFmaoENaLw=-NdyPtXSSmfN4miw1cbQ@mail.gmail.com/mbox/"},{"id":126272,"url":"https://patchwork.plctlab.org/api/1.2/patches/126272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726113557.97035-1-aldyh@redhat.com/","msgid":"<20230726113557.97035-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T11:35:54","name":"[COMMITTED,range-ops] Remove special case for handling bitmasks in casts.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726113557.97035-1-aldyh@redhat.com/mbox/"},{"id":126275,"url":"https://patchwork.plctlab.org/api/1.2/patches/126275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com/","msgid":"<04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-26T11:40:57","name":"PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com/mbox/"},{"id":126358,"url":"https://patchwork.plctlab.org/api/1.2/patches/126358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726132834.D12B5385C8B0@sourceware.org/","msgid":"<20230726132834.D12B5385C8B0@sourceware.org>","list_archive_url":null,"date":"2023-07-26T13:27:33","name":"tree-optimization/106081 - elide redundant permute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726132834.D12B5385C8B0@sourceware.org/mbox/"},{"id":126402,"url":"https://patchwork.plctlab.org/api/1.2/patches/126402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Zuc1F9BmG25Uh4i_XMMzG4XdOo8L4zbN=5V6oeBPjffQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T14:11:01","name":"[committed] testsuite: Fix gfortran.dg/ieee/comparisons_3.F90 testsuite failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Zuc1F9BmG25Uh4i_XMMzG4XdOo8L4zbN=5V6oeBPjffQ@mail.gmail.com/mbox/"},{"id":126412,"url":"https://patchwork.plctlab.org/api/1.2/patches/126412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726143332.749363-1-dmalcolm@redhat.com/","msgid":"<20230726143332.749363-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-26T14:33:32","name":"[pushed] analyzer: add symbol base class, moving region id to there [PR104940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726143332.749363-1-dmalcolm@redhat.com/mbox/"},{"id":126422,"url":"https://patchwork.plctlab.org/api/1.2/patches/126422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21466af-ae65-2e1b-49c2-ababe6047be3@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T14:44:16","name":"aarch64: enable mixed-types for aarch64 simdclones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21466af-ae65-2e1b-49c2-ababe6047be3@arm.com/mbox/"},{"id":126475,"url":"https://patchwork.plctlab.org/api/1.2/patches/126475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6e25a36-e2e8-4787-86bc-885faa1f0acc@AZ-NEU-EX03.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T15:58:54","name":"[committed] Add check_vect in a testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6e25a36-e2e8-4787-86bc-885faa1f0acc@AZ-NEU-EX03.Arm.com/mbox/"},{"id":126480,"url":"https://patchwork.plctlab.org/api/1.2/patches/126480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160320.220196-1-jwakely@redhat.com/","msgid":"<20230726160320.220196-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:02:53","name":"[committed] libstdc++: Add deprecated attribute to std::random_shuffle declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160320.220196-1-jwakely@redhat.com/mbox/"},{"id":126481,"url":"https://patchwork.plctlab.org/api/1.2/patches/126481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160344.220228-1-jwakely@redhat.com/","msgid":"<20230726160344.220228-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:03:21","name":"[committed] libstdc++: Avoid bogus overflow warnings in std::vector [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160344.220228-1-jwakely@redhat.com/mbox/"},{"id":126483,"url":"https://patchwork.plctlab.org/api/1.2/patches/126483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc6f18335ec6dd5d87e06e3b77fee1e55b36529f.camel@gwdg.de/","msgid":"","list_archive_url":null,"date":"2023-07-26T16:06:49","name":"[C] Synthesize nonnull attribute for parameters declared with static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc6f18335ec6dd5d87e06e3b77fee1e55b36529f.camel@gwdg.de/mbox/"},{"id":126492,"url":"https://patchwork.plctlab.org/api/1.2/patches/126492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726163145.2905222-1-jason@redhat.com/","msgid":"<20230726163145.2905222-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:31:45","name":"[pushed] c++: member vs global template [PR106310]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726163145.2905222-1-jason@redhat.com/mbox/"},{"id":126499,"url":"https://patchwork.plctlab.org/api/1.2/patches/126499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165735.2058945-1-ppalka@redhat.com/","msgid":"<20230726165735.2058945-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:57:34","name":"c++: constexpr empty subobject confusion [PR110197]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165735.2058945-1-ppalka@redhat.com/mbox/"},{"id":126498,"url":"https://patchwork.plctlab.org/api/1.2/patches/126498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165750.2062127-1-ppalka@redhat.com/","msgid":"<20230726165750.2062127-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:57:50","name":"c++: unifying REAL_CSTs [PR110809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165750.2062127-1-ppalka@redhat.com/mbox/"},{"id":126508,"url":"https://patchwork.plctlab.org/api/1.2/patches/126508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMn5RHmbpYEZ=PZTJJ2552+sW0sAgh55+d+kNrDW9VfdvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T17:33:10","name":"[gcc-13] Backport PR10280 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMn5RHmbpYEZ=PZTJJ2552+sW0sAgh55+d+kNrDW9VfdvQ@mail.gmail.com/mbox/"},{"id":126520,"url":"https://patchwork.plctlab.org/api/1.2/patches/126520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726181204.229512-1-jwakely@redhat.com/","msgid":"<20230726181204.229512-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T18:11:47","name":"[committed] libstdc++: Require C++11 for 23_containers/vector/bool/110807.cc [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726181204.229512-1-jwakely@redhat.com/mbox/"},{"id":126533,"url":"https://patchwork.plctlab.org/api/1.2/patches/126533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6616a0f7-d3f9-44be-9894-f2ec511ebd7c-1690398620691@3c-app-gmx-bap18/","msgid":"","list_archive_url":null,"date":"2023-07-26T19:10:20","name":"Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6616a0f7-d3f9-44be-9894-f2ec511ebd7c-1690398620691@3c-app-gmx-bap18/mbox/"},{"id":126534,"url":"https://patchwork.plctlab.org/api/1.2/patches/126534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cad2d682-af6b-77be-daf2-fff2daf78faf@gmx.de/","msgid":"","list_archive_url":null,"date":"2023-07-26T19:17:58","name":"[v2] Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cad2d682-af6b-77be-daf2-fff2daf78faf@gmx.de/mbox/"},{"id":126542,"url":"https://patchwork.plctlab.org/api/1.2/patches/126542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de/","msgid":"<6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de>","list_archive_url":null,"date":"2023-07-26T19:33:22","name":"[v3] Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de/mbox/"},{"id":126584,"url":"https://patchwork.plctlab.org/api/1.2/patches/126584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com/","msgid":"<05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com>","list_archive_url":null,"date":"2023-07-27T01:28:49","name":"[committed,RISC-V] Fix expected diagnostic messages in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com/mbox/"},{"id":126611,"url":"https://patchwork.plctlab.org/api/1.2/patches/126611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727031940.162951-1-juzhe.zhong@rivai.ai/","msgid":"<20230727031940.162951-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T03:19:40","name":"[V2] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727031940.162951-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126822,"url":"https://patchwork.plctlab.org/api/1.2/patches/126822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727090640.65258-1-juzhe.zhong@rivai.ai/","msgid":"<20230727090640.65258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T09:06:40","name":"[V3] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727090640.65258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126878,"url":"https://patchwork.plctlab.org/api/1.2/patches/126878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727093438.31E2D38881C7@sourceware.org/","msgid":"<20230727093438.31E2D38881C7@sourceware.org>","list_archive_url":null,"date":"2023-07-27T09:31:49","name":"Remove recursive post-dominator traversal in sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727093438.31E2D38881C7@sourceware.org/mbox/"},{"id":126883,"url":"https://patchwork.plctlab.org/api/1.2/patches/126883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727094859.3884298-1-demin.han@starfivetech.com/","msgid":"<20230727094859.3884298-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-07-27T09:48:59","name":"RISC-V: Fix uninitialized and redundant use of which_alternative","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727094859.3884298-1-demin.han@starfivetech.com/mbox/"},{"id":126889,"url":"https://patchwork.plctlab.org/api/1.2/patches/126889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727103715.6CD7E3854803@sourceware.org/","msgid":"<20230727103715.6CD7E3854803@sourceware.org>","list_archive_url":null,"date":"2023-07-27T10:36:30","name":"XFAIL parts broken deliberately by r13-1762-gf9d4c3b45c5ed5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727103715.6CD7E3854803@sourceware.org/mbox/"},{"id":126895,"url":"https://patchwork.plctlab.org/api/1.2/patches/126895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727104353.3890397-1-pan2.li@intel.com/","msgid":"<20230727104353.3890397-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-27T10:43:53","name":"[v1] RISC-V: Remove unnecessary vread_csr/vwrite_csr intrinsic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727104353.3890397-1-pan2.li@intel.com/mbox/"},{"id":126925,"url":"https://patchwork.plctlab.org/api/1.2/patches/126925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727114702.219531-1-juzhe.zhong@rivai.ai/","msgid":"<20230727114702.219531-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T11:47:02","name":"[V4] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727114702.219531-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126934,"url":"https://patchwork.plctlab.org/api/1.2/patches/126934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727120151.C9B03385B524@sourceware.org/","msgid":"<20230727120151.C9B03385B524@sourceware.org>","list_archive_url":null,"date":"2023-07-27T12:00:56","name":"tree-optimization/91838 - fix FAIL of g++.dg/opt/pr91838.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727120151.C9B03385B524@sourceware.org/mbox/"},{"id":126973,"url":"https://patchwork.plctlab.org/api/1.2/patches/126973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727133639.2208533-1-hongtao.liu@intel.com/","msgid":"<20230727133639.2208533-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-27T13:36:39","name":"[x86] Add UNSPEC_MASKOP to vpbroadcastm pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727133639.2208533-1-hongtao.liu@intel.com/mbox/"},{"id":126987,"url":"https://patchwork.plctlab.org/api/1.2/patches/126987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9Df2xIWL6wD35@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:19:57","name":"Fix profile_count::apply_probability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9Df2xIWL6wD35@kam.mff.cuni.cz/mbox/"},{"id":126988,"url":"https://patchwork.plctlab.org/api/1.2/patches/126988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9PZiYSPTP8YP0@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:20:45","name":"Fix profile update in tree-ssa-loop-im.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9PZiYSPTP8YP0@kam.mff.cuni.cz/mbox/"},{"id":126989,"url":"https://patchwork.plctlab.org/api/1.2/patches/126989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9eeM5DRrlLsTv@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:21:45","name":"Fix profile update in tree_transform_and_unroll_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9eeM5DRrlLsTv@kam.mff.cuni.cz/mbox/"},{"id":127002,"url":"https://patchwork.plctlab.org/api/1.2/patches/127002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727150345.303590-1-jwakely@redhat.com/","msgid":"<20230727150345.303590-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-27T15:03:11","name":"[committed] libstdc++: Fix std::format alternate form for floating-point [PR108046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727150345.303590-1-jwakely@redhat.com/mbox/"},{"id":127054,"url":"https://patchwork.plctlab.org/api/1.2/patches/127054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com/","msgid":"<447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com>","list_archive_url":null,"date":"2023-07-27T16:36:49","name":"[committed] OpenMP/Fortran: Extend reject code between target + teams [PR71065, PR110725] (was: Re: [patch] OpenMP/Fortran: Reject declarations between target + teams (was: [Patch] OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com/mbox/"},{"id":127071,"url":"https://patchwork.plctlab.org/api/1.2/patches/127071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlYWhZSKuUv3gX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:12:01","name":"[1/5] Middle-end _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlYWhZSKuUv3gX@tucnak/mbox/"},{"id":127073,"url":"https://patchwork.plctlab.org/api/1.2/patches/127073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlqT3aSPeqEHUB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:13:13","name":"[2/5] libgcc _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlqT3aSPeqEHUB@tucnak/mbox/"},{"id":127072,"url":"https://patchwork.plctlab.org/api/1.2/patches/127072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKl72EbjP0gPNM7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:14:23","name":"[3/5] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKl72EbjP0gPNM7@tucnak/mbox/"},{"id":127074,"url":"https://patchwork.plctlab.org/api/1.2/patches/127074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmMICooUqjISC2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:15:28","name":"[4/5] testsuite part 1 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmMICooUqjISC2@tucnak/mbox/"},{"id":127076,"url":"https://patchwork.plctlab.org/api/1.2/patches/127076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmdrWbE6owq+KJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:16:38","name":"[5/5] testsuite part 2 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmdrWbE6owq+KJ@tucnak/mbox/"},{"id":127101,"url":"https://patchwork.plctlab.org/api/1.2/patches/127101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727181105.15595-1-david.faust@oracle.com/","msgid":"<20230727181105.15595-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T18:11:05","name":"bpf: correct pseudo-C template for add3 and sub3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727181105.15595-1-david.faust@oracle.com/mbox/"},{"id":127107,"url":"https://patchwork.plctlab.org/api/1.2/patches/127107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK34wjgBF4MnGD7@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T18:30:59","name":"Fix profile update after RTL unrolling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK34wjgBF4MnGD7@kam.mff.cuni.cz/mbox/"},{"id":127108,"url":"https://patchwork.plctlab.org/api/1.2/patches/127108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK4ac7zl/oNVi0H@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T18:33:13","name":"Make store likely in optimize_mask_stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK4ac7zl/oNVi0H@kam.mff.cuni.cz/mbox/"},{"id":127129,"url":"https://patchwork.plctlab.org/api/1.2/patches/127129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-106acade-c06b-4bdf-8173-a189f07212dd-1690486793645@3c-app-gmx-bs10/","msgid":"","list_archive_url":null,"date":"2023-07-27T19:39:53","name":"Fortran: do not pass hidden character length for TYPE(*) dummy [PR110825]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-106acade-c06b-4bdf-8173-a189f07212dd-1690486793645@3c-app-gmx-bs10/mbox/"},{"id":127194,"url":"https://patchwork.plctlab.org/api/1.2/patches/127194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214120.18783-1-david.faust@oracle.com/","msgid":"<20230727214120.18783-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T21:41:20","name":"bpf: minor doc cleanup for command-line options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214120.18783-1-david.faust@oracle.com/mbox/"},{"id":127195,"url":"https://patchwork.plctlab.org/api/1.2/patches/127195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214324.18871-1-david.faust@oracle.com/","msgid":"<20230727214324.18871-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T21:43:24","name":"bpf: ISA V4 sign-extending move and load insns [PR110782, PR110784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214324.18871-1-david.faust@oracle.com/mbox/"},{"id":127235,"url":"https://patchwork.plctlab.org/api/1.2/patches/127235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727225914.918081-1-lhyatt@gmail.com/","msgid":"<20230727225914.918081-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-27T22:59:14","name":"[v2] c-family: Implement pragma_lex () for preprocess-only mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727225914.918081-1-lhyatt@gmail.com/mbox/"},{"id":127272,"url":"https://patchwork.plctlab.org/api/1.2/patches/127272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728011521.3280522-1-pan2.li@intel.com/","msgid":"<20230728011521.3280522-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-28T01:15:21","name":"[v8] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728011521.3280522-1-pan2.li@intel.com/mbox/"},{"id":127306,"url":"https://patchwork.plctlab.org/api/1.2/patches/127306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-1-kmatsui@gcc.gnu.org/","msgid":"<20230728035737.50181-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-28T03:57:35","name":"[v3,1/2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-1-kmatsui@gcc.gnu.org/mbox/"},{"id":127307,"url":"https://patchwork.plctlab.org/api/1.2/patches/127307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-2-kmatsui@gcc.gnu.org/","msgid":"<20230728035737.50181-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-28T03:57:36","name":"[v3,2/2] libstdc++: Use _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-2-kmatsui@gcc.gnu.org/mbox/"},{"id":127340,"url":"https://patchwork.plctlab.org/api/1.2/patches/127340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728055222.2382-1-xuli1@eswincomputing.com/","msgid":"<20230728055222.2382-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-28T05:52:22","name":"RISC-V: Remove vxrm parameter for vsadd[u] and vssub[u]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728055222.2382-1-xuli1@eswincomputing.com/mbox/"},{"id":127350,"url":"https://patchwork.plctlab.org/api/1.2/patches/127350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMNiIpP4cwLGlRSN@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T06:37:22","name":"loop-split improvements, part 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMNiIpP4cwLGlRSN@kam.mff.cuni.cz/mbox/"},{"id":127357,"url":"https://patchwork.plctlab.org/api/1.2/patches/127357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728070552.50C1413276@imap2.suse-dmz.suse.de/","msgid":"<20230728070552.50C1413276@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-28T07:05:51","name":"[RFC] tree-optimization/92335 - Improve sinking heuristics for vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728070552.50C1413276@imap2.suse-dmz.suse.de/mbox/"},{"id":127362,"url":"https://patchwork.plctlab.org/api/1.2/patches/127362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728071039.107552-1-juzhe.zhong@rivai.ai/","msgid":"<20230728071039.107552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-28T07:10:39","name":"[V2] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728071039.107552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":127370,"url":"https://patchwork.plctlab.org/api/1.2/patches/127370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728072010.108620-1-juzhe.zhong@rivai.ai/","msgid":"<20230728072010.108620-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-28T07:20:10","name":"RISC-V: Support CALL conditional autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728072010.108620-1-juzhe.zhong@rivai.ai/mbox/"},{"id":127375,"url":"https://patchwork.plctlab.org/api/1.2/patches/127375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073032.1852060-1-poulhies@adacore.com/","msgid":"<20230728073032.1852060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:32","name":"[COMMITTED] ada: Improve defense against illegal code in check for infinite loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073032.1852060-1-poulhies@adacore.com/mbox/"},{"id":127376,"url":"https://patchwork.plctlab.org/api/1.2/patches/127376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073042.1852207-1-poulhies@adacore.com/","msgid":"<20230728073042.1852207-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:42","name":"[COMMITTED] ada: Allow calls to Number_Formals when no formals are present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073042.1852207-1-poulhies@adacore.com/mbox/"},{"id":127381,"url":"https://patchwork.plctlab.org/api/1.2/patches/127381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073044.1852306-1-poulhies@adacore.com/","msgid":"<20230728073044.1852306-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:44","name":"[COMMITTED] ada: Fix typo in comment of Ada.Exceptions.Save_Occurrence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073044.1852306-1-poulhies@adacore.com/mbox/"},{"id":127385,"url":"https://patchwork.plctlab.org/api/1.2/patches/127385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073047.1852369-1-poulhies@adacore.com/","msgid":"<20230728073047.1852369-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:47","name":"[COMMITTED] ada: Emit enums rather than defines for various constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073047.1852369-1-poulhies@adacore.com/mbox/"},{"id":127387,"url":"https://patchwork.plctlab.org/api/1.2/patches/127387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073050.1852470-1-poulhies@adacore.com/","msgid":"<20230728073050.1852470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:50","name":"[COMMITTED] ada: Leave detection of missing return in functions to GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073050.1852470-1-poulhies@adacore.com/mbox/"},{"id":127389,"url":"https://patchwork.plctlab.org/api/1.2/patches/127389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073052.1852535-1-poulhies@adacore.com/","msgid":"<20230728073052.1852535-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:52","name":"[COMMITTED] ada: Fix memory explosion on aggregate of nested packed array type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073052.1852535-1-poulhies@adacore.com/mbox/"},{"id":127378,"url":"https://patchwork.plctlab.org/api/1.2/patches/127378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073054.1852596-1-poulhies@adacore.com/","msgid":"<20230728073054.1852596-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:54","name":"[COMMITTED] ada: Add guard for detection of class-wide precondition subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073054.1852596-1-poulhies@adacore.com/mbox/"},{"id":127377,"url":"https://patchwork.plctlab.org/api/1.2/patches/127377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073056.1852677-1-poulhies@adacore.com/","msgid":"<20230728073056.1852677-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:56","name":"[COMMITTED] ada: Small refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073056.1852677-1-poulhies@adacore.com/mbox/"},{"id":127383,"url":"https://patchwork.plctlab.org/api/1.2/patches/127383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073058.1852740-1-poulhies@adacore.com/","msgid":"<20230728073058.1852740-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:58","name":"[COMMITTED] ada: Fix race condition in protected entry call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073058.1852740-1-poulhies@adacore.com/mbox/"},{"id":127382,"url":"https://patchwork.plctlab.org/api/1.2/patches/127382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073100.1852802-1-poulhies@adacore.com/","msgid":"<20230728073100.1852802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:00","name":"[COMMITTED] ada: Add missing SCO generation for quantified expressions in object decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073100.1852802-1-poulhies@adacore.com/mbox/"},{"id":127390,"url":"https://patchwork.plctlab.org/api/1.2/patches/127390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073102.1852865-1-poulhies@adacore.com/","msgid":"<20230728073102.1852865-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:02","name":"[COMMITTED] ada: Add support for binding to a specific network interface controller.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073102.1852865-1-poulhies@adacore.com/mbox/"},{"id":127388,"url":"https://patchwork.plctlab.org/api/1.2/patches/127388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073105.1852928-1-poulhies@adacore.com/","msgid":"<20230728073105.1852928-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:05","name":"[COMMITTED] ada: Fix unsupported dispatching constructor call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073105.1852928-1-poulhies@adacore.com/mbox/"},{"id":127386,"url":"https://patchwork.plctlab.org/api/1.2/patches/127386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073107.1852989-1-poulhies@adacore.com/","msgid":"<20230728073107.1852989-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:07","name":"[COMMITTED] ada: Add an assert in Posix Interrupt_Wait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073107.1852989-1-poulhies@adacore.com/mbox/"},{"id":127380,"url":"https://patchwork.plctlab.org/api/1.2/patches/127380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073109.1853050-1-poulhies@adacore.com/","msgid":"<20230728073109.1853050-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:09","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073109.1853050-1-poulhies@adacore.com/mbox/"},{"id":127394,"url":"https://patchwork.plctlab.org/api/1.2/patches/127394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMN1DOizIGX8AdGF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T07:58:04","name":"Loop-split improvements, part 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMN1DOizIGX8AdGF@kam.mff.cuni.cz/mbox/"},{"id":127508,"url":"https://patchwork.plctlab.org/api/1.2/patches/127508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com/","msgid":"<805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com>","list_archive_url":null,"date":"2023-07-28T10:17:00","name":"gcse: Extract reg pressure handling into separate file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com/mbox/"},{"id":127526,"url":"https://patchwork.plctlab.org/api/1.2/patches/127526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMOjzRGv50hOfavs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-28T11:17:33","name":"gimple-fold: Handle _BitInt in __builtin_clear_padding [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMOjzRGv50hOfavs@tucnak/mbox/"},{"id":127548,"url":"https://patchwork.plctlab.org/api/1.2/patches/127548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728115004.3071397-1-yanzhang.wang@intel.com/","msgid":"<20230728115004.3071397-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-28T11:50:04","name":"[v2] RISC-V: convert the mulh with 0 to mov 0 to the reg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728115004.3071397-1-yanzhang.wang@intel.com/mbox/"},{"id":127549,"url":"https://patchwork.plctlab.org/api/1.2/patches/127549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com/","msgid":"<12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T11:51:41","name":"libgomp: cuda.h and omp_target_memcpy_rect cleanup (was: [patch] OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com/mbox/"},{"id":127613,"url":"https://patchwork.plctlab.org/api/1.2/patches/127613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMO7E9C9KBfbyJHH@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T12:56:51","name":"Loop-split improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMO7E9C9KBfbyJHH@kam.mff.cuni.cz/mbox/"},{"id":127621,"url":"https://patchwork.plctlab.org/api/1.2/patches/127621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-2-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-2-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:30","name":"[1/4] openmp: Fix loop transformation tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-2-frederik@codesourcery.com/mbox/"},{"id":127625,"url":"https://patchwork.plctlab.org/api/1.2/patches/127625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-3-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-3-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:31","name":"[2/4] openmp: Fix initialization for '\''unroll full'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-3-frederik@codesourcery.com/mbox/"},{"id":127624,"url":"https://patchwork.plctlab.org/api/1.2/patches/127624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-4-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-4-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:32","name":"[3/4] openmp: Fix diagnostic message for \"omp unroll\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-4-frederik@codesourcery.com/mbox/"},{"id":127622,"url":"https://patchwork.plctlab.org/api/1.2/patches/127622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-5-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-5-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:33","name":"[4/4] openmp: Fix number of iterations computation for \"omp unroll full\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-5-frederik@codesourcery.com/mbox/"},{"id":127684,"url":"https://patchwork.plctlab.org/api/1.2/patches/127684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com/","msgid":"<03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-28T15:00:01","name":"rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com/mbox/"},{"id":127729,"url":"https://patchwork.plctlab.org/api/1.2/patches/127729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMPpap9VO0EMUGCn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-28T16:14:34","name":"[RFC,WIP] _BitInt bit-field support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMPpap9VO0EMUGCn@tucnak/mbox/"},{"id":127740,"url":"https://patchwork.plctlab.org/api/1.2/patches/127740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728163758.377962-1-patrick@rivosinc.com/","msgid":"<20230728163758.377962-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-28T16:37:58","name":"[Committed] RISC-V: Specify -mabi in rv64 autovec testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728163758.377962-1-patrick@rivosinc.com/mbox/"},{"id":127835,"url":"https://patchwork.plctlab.org/api/1.2/patches/127835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728190304.8849-1-jose.marchesi@oracle.com/","msgid":"<20230728190304.8849-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-28T19:03:04","name":"[COMMITTED] bpf: disable tail call optimization in BPF targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728190304.8849-1-jose.marchesi@oracle.com/mbox/"},{"id":127851,"url":"https://patchwork.plctlab.org/api/1.2/patches/127851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab58900340f81c5ebf4743d5a8b756878c21fa7e.camel@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-28T20:19:44","name":"[v2] SARIF and -ftime-report'\''s output [PR109361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab58900340f81c5ebf4743d5a8b756878c21fa7e.camel@redhat.com/mbox/"},{"id":127855,"url":"https://patchwork.plctlab.org/api/1.2/patches/127855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com/","msgid":"<1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com>","list_archive_url":null,"date":"2023-07-28T20:37:56","name":"[COMMITTED] PR tree-optimization/110205 -Fix some warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com/mbox/"},{"id":127857,"url":"https://patchwork.plctlab.org/api/1.2/patches/127857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0b9c100-afd5-aa5f-ae74-5b0a069d2880@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-28T20:38:06","name":"[COMMITTED] Remove value_query, push into sub&fold class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0b9c100-afd5-aa5f-ae74-5b0a069d2880@redhat.com/mbox/"},{"id":127856,"url":"https://patchwork.plctlab.org/api/1.2/patches/127856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4378bf33-4718-ff59-4083-769d4485c352@redhat.com/","msgid":"<4378bf33-4718-ff59-4083-769d4485c352@redhat.com>","list_archive_url":null,"date":"2023-07-28T20:38:13","name":"[COMMITTED] Add a merge_range to ssa_cache and use it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4378bf33-4718-ff59-4083-769d4485c352@redhat.com/mbox/"},{"id":128016,"url":"https://patchwork.plctlab.org/api/1.2/patches/128016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMSz67f92gUuX9Yz@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-29T06:38:35","name":"Fix profile update after loop versioning in vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMSz67f92gUuX9Yz@kam.mff.cuni.cz/mbox/"},{"id":128072,"url":"https://patchwork.plctlab.org/api/1.2/patches/128072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729091308.29792-1-zengxiao@eswincomputing.com/","msgid":"<20230729091308.29792-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-29T09:13:08","name":"[V2,3/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729091308.29792-1-zengxiao@eswincomputing.com/mbox/"},{"id":128161,"url":"https://patchwork.plctlab.org/api/1.2/patches/128161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com/","msgid":"<002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-29T16:13:29","name":"[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com/mbox/"},{"id":128163,"url":"https://patchwork.plctlab.org/api/1.2/patches/128163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729182120.2017374-1-apinski@marvell.com/","msgid":"<20230729182120.2017374-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-29T18:21:20","name":"[PATCHv2] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729182120.2017374-1-apinski@marvell.com/mbox/"},{"id":128182,"url":"https://patchwork.plctlab.org/api/1.2/patches/128182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730021058.3359318-1-juzhe.zhong@rivai.ai/","msgid":"<20230730021058.3359318-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-30T02:10:58","name":"RISC-V: Enable basic VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730021058.3359318-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128228,"url":"https://patchwork.plctlab.org/api/1.2/patches/128228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com/","msgid":"<2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com>","list_archive_url":null,"date":"2023-07-30T13:55:19","name":"[committed] Fix several preprocessor directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com/mbox/"},{"id":128274,"url":"https://patchwork.plctlab.org/api/1.2/patches/128274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4abm7fZrKOYWMibFDM=uBk1TET0vSn7=5=-tYhcVrRdUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-30T20:12:53","name":"[RFC] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4abm7fZrKOYWMibFDM=uBk1TET0vSn7=5=-tYhcVrRdUA@mail.gmail.com/mbox/"},{"id":128296,"url":"https://patchwork.plctlab.org/api/1.2/patches/128296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730223746.0000F33E7D@hamza.pair.com/","msgid":"<20230730223746.0000F33E7D@hamza.pair.com>","list_archive_url":null,"date":"2023-07-30T22:37:43","name":"[pushed] wwwdocs: gcc-4.5: Update link to GNU MPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730223746.0000F33E7D@hamza.pair.com/mbox/"},{"id":128306,"url":"https://patchwork.plctlab.org/api/1.2/patches/128306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731012537.4398-1-xuli1@eswincomputing.com/","msgid":"<20230731012537.4398-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-31T01:25:37","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731012537.4398-1-xuli1@eswincomputing.com/mbox/"},{"id":128316,"url":"https://patchwork.plctlab.org/api/1.2/patches/128316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731021357.3815294-1-juzhe.zhong@rivai.ai/","msgid":"<20230731021357.3815294-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T02:13:57","name":"[V2] RISC-V: Enable basic VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731021357.3815294-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128322,"url":"https://patchwork.plctlab.org/api/1.2/patches/128322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731025646.1021646-1-pan2.li@intel.com/","msgid":"<20230731025646.1021646-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-31T02:56:46","name":"[v1] RISC-V: Bugfix for RVV floating-point rm suffix sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731025646.1021646-1-pan2.li@intel.com/mbox/"},{"id":128344,"url":"https://patchwork.plctlab.org/api/1.2/patches/128344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-1-apinski@marvell.com/","msgid":"<20230731053412.2102672-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T05:34:11","name":"[1/2] MATCH: PR 106164 : Optimize `(X CMP1 Y) AND/IOR (X CMP2 Y)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-1-apinski@marvell.com/mbox/"},{"id":128343,"url":"https://patchwork.plctlab.org/api/1.2/patches/128343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-2-apinski@marvell.com/","msgid":"<20230731053412.2102672-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T05:34:12","name":"[2/2] MATCH: Add `a == b | a cmp b` and `a != b & a cmp b` simplifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-2-apinski@marvell.com/mbox/"},{"id":128351,"url":"https://patchwork.plctlab.org/api/1.2/patches/128351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731061629.2540150-1-lin1.hu@intel.com/","msgid":"<20230731061629.2540150-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-07-31T06:16:29","name":"Add myself for write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731061629.2540150-1-lin1.hu@intel.com/mbox/"},{"id":128369,"url":"https://patchwork.plctlab.org/api/1.2/patches/128369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731065228.69779-1-kito.cheng@sifive.com/","msgid":"<20230731065228.69779-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-31T06:52:28","name":"RISC-V: Return machine_mode rather than opt_machine_mode for get_mask_mode, NFC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731065228.69779-1-kito.cheng@sifive.com/mbox/"},{"id":128372,"url":"https://patchwork.plctlab.org/api/1.2/patches/128372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com/","msgid":"<001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-31T07:13:07","name":"[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com/mbox/"},{"id":128506,"url":"https://patchwork.plctlab.org/api/1.2/patches/128506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/168d2ada-15df-7e97-9932-6a65104147ef@arm.com/","msgid":"<168d2ada-15df-7e97-9932-6a65104147ef@arm.com>","list_archive_url":null,"date":"2023-07-31T09:42:02","name":"Add POLY_INT_CST support to fold_ctor_reference in gimple-fold.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/168d2ada-15df-7e97-9932-6a65104147ef@arm.com/mbox/"},{"id":128590,"url":"https://patchwork.plctlab.org/api/1.2/patches/128590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-2-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:44","name":"[1/3] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-2-andrzej.turko@gmail.com/mbox/"},{"id":128589,"url":"https://patchwork.plctlab.org/api/1.2/patches/128589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-3-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:45","name":"[2/3] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-3-andrzej.turko@gmail.com/mbox/"},{"id":128592,"url":"https://patchwork.plctlab.org/api/1.2/patches/128592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-4-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:46","name":"[3/3] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-4-andrzej.turko@gmail.com/mbox/"},{"id":128624,"url":"https://patchwork.plctlab.org/api/1.2/patches/128624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731120120.651197-1-juzhe.zhong@rivai.ai/","msgid":"<20230731120120.651197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T12:01:20","name":"RISC-V: Support POPCOUNT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731120120.651197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128642,"url":"https://patchwork.plctlab.org/api/1.2/patches/128642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731122026.966504-1-juzhe.zhong@rivai.ai/","msgid":"<20230731122026.966504-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T12:20:26","name":"[committed] RISC-V: Fix bug of get_mask_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731122026.966504-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128648,"url":"https://patchwork.plctlab.org/api/1.2/patches/128648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731124037.1FA743858425@sourceware.org/","msgid":"<20230731124037.1FA743858425@sourceware.org>","list_archive_url":null,"date":"2023-07-31T12:39:52","name":"Improve sinking with unrelated defs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731124037.1FA743858425@sourceware.org/mbox/"},{"id":128710,"url":"https://patchwork.plctlab.org/api/1.2/patches/128710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731140232.3EFC738582BC@sourceware.org/","msgid":"<20230731140232.3EFC738582BC@sourceware.org>","list_archive_url":null,"date":"2023-07-31T14:01:49","name":"tree-optimization/110838 - vectorization of widened shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731140232.3EFC738582BC@sourceware.org/mbox/"},{"id":128736,"url":"https://patchwork.plctlab.org/api/1.2/patches/128736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731141349.1188774-1-juzhe.zhong@rivai.ai/","msgid":"<20230731141349.1188774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T14:13:49","name":"[V2] RISC-V: Support POPCOUNT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731141349.1188774-1-juzhe.zhong@rivai.ai/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-07/mbox/"},{"id":27,"url":"https://patchwork.plctlab.org/api/1.2/bundles/27/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-08","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":128781,"url":"https://patchwork.plctlab.org/api/1.2/patches/128781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com/","msgid":"<73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com>","list_archive_url":null,"date":"2023-07-31T16:06:40","name":"[COMMITTED] PR tree-optimization/110582 - fur_list should not use the range vector for non-ssa, operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com/mbox/"},{"id":128790,"url":"https://patchwork.plctlab.org/api/1.2/patches/128790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mszcau6z.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-31T17:04:36","name":"ipa-sra: Don'\''t consider CLOBBERS as writes preventing splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mszcau6z.fsf@suse.cz/mbox/"},{"id":128800,"url":"https://patchwork.plctlab.org/api/1.2/patches/128800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731170756.2130927-1-apinski@marvell.com/","msgid":"<20230731170756.2130927-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:07:56","name":"[COMMITTEDv3] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731170756.2130927-1-apinski@marvell.com/mbox/"},{"id":128809,"url":"https://patchwork.plctlab.org/api/1.2/patches/128809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-1-apinski@marvell.com/","msgid":"<20230731174606.2132534-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:46:05","name":"[1/2] Move `~X & X` and `~X | X` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-1-apinski@marvell.com/mbox/"},{"id":128810,"url":"https://patchwork.plctlab.org/api/1.2/patches/128810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-2-apinski@marvell.com/","msgid":"<20230731174606.2132534-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:46:06","name":"[2/2] Slightly improve bitwise_inverted_equal_p comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-2-apinski@marvell.com/mbox/"},{"id":128860,"url":"https://patchwork.plctlab.org/api/1.2/patches/128860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731201637.2139398-1-apinski@marvell.com/","msgid":"<20230731201637.2139398-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T20:16:37","name":"PHIOPT: Mark the conditional lhs and rhs as to look at to see if DCEable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731201637.2139398-1-apinski@marvell.com/mbox/"},{"id":128879,"url":"https://patchwork.plctlab.org/api/1.2/patches/128879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731215206.1876739-1-polacek@redhat.com/","msgid":"<20230731215206.1876739-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-31T21:52:06","name":"c++: parser cleanup, remove dummy arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731215206.1876739-1-polacek@redhat.com/mbox/"},{"id":128924,"url":"https://patchwork.plctlab.org/api/1.2/patches/128924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV4p8uf1bMBP5OhUb=nfy-WZDPvoDqRBznzdGoD3oHo=w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T00:01:53","name":"libbacktrace patch committed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV4p8uf1bMBP5OhUb=nfy-WZDPvoDqRBznzdGoD3oHo=w@mail.gmail.com/mbox/"},{"id":128925,"url":"https://patchwork.plctlab.org/api/1.2/patches/128925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801000507.2147978-1-apinski@marvell.com/","msgid":"<20230801000507.2147978-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-01T00:05:07","name":"[COMMITTEDv2] Fix PR 93044: extra cast is not removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801000507.2147978-1-apinski@marvell.com/mbox/"},{"id":128929,"url":"https://patchwork.plctlab.org/api/1.2/patches/128929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003456.994217-1-ppalka@redhat.com/","msgid":"<20230801003456.994217-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-01T00:34:56","name":"c++: improve debug_tree for templated types/decls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003456.994217-1-ppalka@redhat.com/mbox/"},{"id":128930,"url":"https://patchwork.plctlab.org/api/1.2/patches/128930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003505.994240-1-ppalka@redhat.com/","msgid":"<20230801003505.994240-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-01T00:35:05","name":"tree-pretty-print: handle COMPONENT_REF with non-decl RHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003505.994240-1-ppalka@redhat.com/mbox/"},{"id":128958,"url":"https://patchwork.plctlab.org/api/1.2/patches/128958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801022253.3286257-1-lhyatt@gmail.com/","msgid":"<20230801022253.3286257-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-01T02:22:53","name":"preprocessor: c++: Support `#pragma GCC target'\'' macros [PR87299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801022253.3286257-1-lhyatt@gmail.com/mbox/"},{"id":128992,"url":"https://patchwork.plctlab.org/api/1.2/patches/128992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801054416.2531911-1-hongtao.liu@intel.com/","msgid":"<20230801054416.2531911-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-01T05:44:16","name":"Adjust testcase for more optimal codegen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801054416.2531911-1-hongtao.liu@intel.com/mbox/"},{"id":128993,"url":"https://patchwork.plctlab.org/api/1.2/patches/128993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9a3f117-43b6-d7f4-bb5a-0cf5c512e61f@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T05:49:09","name":"x86: fold two of vec_dupv2df'\''s alternatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9a3f117-43b6-d7f4-bb5a-0cf5c512e61f@suse.com/mbox/"},{"id":128994,"url":"https://patchwork.plctlab.org/api/1.2/patches/128994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com/","msgid":"<9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com>","list_archive_url":null,"date":"2023-08-01T05:55:22","name":"[RESEND] libatomic: drop redundant all-multi command","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com/mbox/"},{"id":129013,"url":"https://patchwork.plctlab.org/api/1.2/patches/129013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801063743.155666-1-juzhe.zhong@rivai.ai/","msgid":"<20230801063743.155666-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-01T06:37:43","name":"[V3] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801063743.155666-1-juzhe.zhong@rivai.ai/mbox/"},{"id":129032,"url":"https://patchwork.plctlab.org/api/1.2/patches/129032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801064831.3261727-1-pan2.li@intel.com/","msgid":"<20230801064831.3261727-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-01T06:48:31","name":"[v1] RISC-V: Support RVV VFSUB and VFRSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801064831.3261727-1-pan2.li@intel.com/mbox/"},{"id":129062,"url":"https://patchwork.plctlab.org/api/1.2/patches/129062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080746.2271226-1-poulhies@adacore.com/","msgid":"<20230801080746.2271226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:07:46","name":"[COMMITTED] ada: Emit SCOs for nested decisions in quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080746.2271226-1-poulhies@adacore.com/mbox/"},{"id":129059,"url":"https://patchwork.plctlab.org/api/1.2/patches/129059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080812.2271398-1-poulhies@adacore.com/","msgid":"<20230801080812.2271398-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:12","name":"[COMMITTED] ada: check Atree.Get/Set_Field_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080812.2271398-1-poulhies@adacore.com/mbox/"},{"id":129060,"url":"https://patchwork.plctlab.org/api/1.2/patches/129060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080814.2271480-1-poulhies@adacore.com/","msgid":"<20230801080814.2271480-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:14","name":"[COMMITTED] ada: Fix generation of JSON output for data representation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080814.2271480-1-poulhies@adacore.com/mbox/"},{"id":129061,"url":"https://patchwork.plctlab.org/api/1.2/patches/129061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080816.2271563-1-poulhies@adacore.com/","msgid":"<20230801080816.2271563-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:16","name":"[COMMITTED] ada: Default Put_Image for composite derived types is missing information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080816.2271563-1-poulhies@adacore.com/mbox/"},{"id":129063,"url":"https://patchwork.plctlab.org/api/1.2/patches/129063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080818.2271624-1-poulhies@adacore.com/","msgid":"<20230801080818.2271624-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:18","name":"[COMMITTED] ada: Incorrect optimization for unconstrained limited record component type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080818.2271624-1-poulhies@adacore.com/mbox/"},{"id":129065,"url":"https://patchwork.plctlab.org/api/1.2/patches/129065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080820.2271686-1-poulhies@adacore.com/","msgid":"<20230801080820.2271686-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:20","name":"[COMMITTED] ada: Bugbox compiling Constrained_Protected_Object'\''Image","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080820.2271686-1-poulhies@adacore.com/mbox/"},{"id":129066,"url":"https://patchwork.plctlab.org/api/1.2/patches/129066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080821.2271747-1-poulhies@adacore.com/","msgid":"<20230801080821.2271747-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:21","name":"[COMMITTED] ada: Disable inlining of subprograms with Skip(_Flow_And)_Proof in GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080821.2271747-1-poulhies@adacore.com/mbox/"},{"id":129064,"url":"https://patchwork.plctlab.org/api/1.2/patches/129064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080823.2271808-1-poulhies@adacore.com/","msgid":"<20230801080823.2271808-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:23","name":"[COMMITTED] ada: Fix printing of numbers in JSON output for data representation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080823.2271808-1-poulhies@adacore.com/mbox/"},{"id":129069,"url":"https://patchwork.plctlab.org/api/1.2/patches/129069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2d95051-53d2-ec5e-cf6b-9a410b7a5841@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T08:17:10","name":"[PING^1,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2d95051-53d2-ec5e-cf6b-9a410b7a5841@linux.ibm.com/mbox/"},{"id":129071,"url":"https://patchwork.plctlab.org/api/1.2/patches/129071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com/","msgid":"<1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T08:18:58","name":"[PING^3] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com/mbox/"},{"id":129072,"url":"https://patchwork.plctlab.org/api/1.2/patches/129072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com/","msgid":"<1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T08:20:21","name":"PING^3] [PATCH 3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com/mbox/"},{"id":129085,"url":"https://patchwork.plctlab.org/api/1.2/patches/129085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801084447.1380635-1-christophe.lyon@linaro.org/","msgid":"<20230801084447.1380635-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-01T08:44:47","name":"[COMMITTED] doc: Fix spelling in arm_v8_1m_main_cde_mve_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801084447.1380635-1-christophe.lyon@linaro.org/mbox/"},{"id":129108,"url":"https://patchwork.plctlab.org/api/1.2/patches/129108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af5a8e98-d7d4-c7e6-2a51-f6ceb883d288@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T09:36:12","name":"MAINTAINERS: correct my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af5a8e98-d7d4-c7e6-2a51-f6ceb883d288@suse.com/mbox/"},{"id":129129,"url":"https://patchwork.plctlab.org/api/1.2/patches/129129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMja7SlWkRfppzOV@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-01T10:14:05","name":"Fix profile upate after vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMja7SlWkRfppzOV@kam.mff.cuni.cz/mbox/"},{"id":129294,"url":"https://patchwork.plctlab.org/api/1.2/patches/129294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de/","msgid":"<0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de>","list_archive_url":null,"date":"2023-08-01T13:03:32","name":"[avr,committed] Fix PR target/110220: Set JUMP_LABEL as required.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de/mbox/"},{"id":129315,"url":"https://patchwork.plctlab.org/api/1.2/patches/129315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANGHATU5pzXTNAgpsdua6M8d-YNtH7Jx=K9USKcT994vwmSw7Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T13:52:52","name":"analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANGHATU5pzXTNAgpsdua6M8d-YNtH7Jx=K9USKcT994vwmSw7Q@mail.gmail.com/mbox/"},{"id":129317,"url":"https://patchwork.plctlab.org/api/1.2/patches/129317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com/","msgid":"<6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com>","list_archive_url":null,"date":"2023-08-01T13:56:16","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com/mbox/"},{"id":129323,"url":"https://patchwork.plctlab.org/api/1.2/patches/129323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com/","msgid":"<163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com>","list_archive_url":null,"date":"2023-08-01T14:31:03","name":"RISC-V: Implement vector \"average\" autovec pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com/mbox/"},{"id":129355,"url":"https://patchwork.plctlab.org/api/1.2/patches/129355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com/","msgid":"<3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com>","list_archive_url":null,"date":"2023-08-01T15:35:16","name":"[OpenACC,2.7,v2] Implement default clause support for data constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com/mbox/"},{"id":129381,"url":"https://patchwork.plctlab.org/api/1.2/patches/129381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com/","msgid":"<1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com>","list_archive_url":null,"date":"2023-08-01T17:21:42","name":"arm: Remove unsigned variant of vcaddq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com/mbox/"},{"id":129416,"url":"https://patchwork.plctlab.org/api/1.2/patches/129416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com/","msgid":"<18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-01T18:29:09","name":"[v2] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com/mbox/"},{"id":129425,"url":"https://patchwork.plctlab.org/api/1.2/patches/129425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-2-cupertino.miranda@oracle.com/","msgid":"<20230801184307.179692-2-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-08-01T18:43:06","name":"[1/2] bpf: Implementation of BPF CO-RE builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-2-cupertino.miranda@oracle.com/mbox/"},{"id":129424,"url":"https://patchwork.plctlab.org/api/1.2/patches/129424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-3-cupertino.miranda@oracle.com/","msgid":"<20230801184307.179692-3-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-08-01T18:43:07","name":"[2/2] bpf: CO-RE builtins support tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-3-cupertino.miranda@oracle.com/mbox/"},{"id":129439,"url":"https://patchwork.plctlab.org/api/1.2/patches/129439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191226.64464-1-krebbel@linux.ibm.com/","msgid":"<20230801191226.64464-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T19:12:26","name":"[Committed] IBM Z: Handle unaligned symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191226.64464-1-krebbel@linux.ibm.com/mbox/"},{"id":129445,"url":"https://patchwork.plctlab.org/api/1.2/patches/129445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191831.432511-1-drross@redhat.com/","msgid":"<20230801191831.432511-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-01T19:18:31","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191831.432511-1-drross@redhat.com/mbox/"},{"id":129447,"url":"https://patchwork.plctlab.org/api/1.2/patches/129447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801192033.432742-1-drross@redhat.com/","msgid":"<20230801192033.432742-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-01T19:20:33","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801192033.432742-1-drross@redhat.com/mbox/"},{"id":129456,"url":"https://patchwork.plctlab.org/api/1.2/patches/129456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801195104.2183011-1-maskray@google.com/","msgid":"<20230801195104.2183011-1-maskray@google.com>","list_archive_url":null,"date":"2023-08-01T19:51:04","name":"[v4] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801195104.2183011-1-maskray@google.com/mbox/"},{"id":129538,"url":"https://patchwork.plctlab.org/api/1.2/patches/129538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802011311.771803-1-hongtao.liu@intel.com/","msgid":"<20230802011311.771803-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-02T01:13:11","name":"Support vec_fmaddsub/vec_fmsubadd for vector HFmode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802011311.771803-1-hongtao.liu@intel.com/mbox/"},{"id":129545,"url":"https://patchwork.plctlab.org/api/1.2/patches/129545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013141.772245-1-hongtao.liu@intel.com/","msgid":"<20230802013141.772245-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-02T01:31:41","name":"Optimize vlddqu + inserti128 to vbroadcasti128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013141.772245-1-hongtao.liu@intel.com/mbox/"},{"id":129546,"url":"https://patchwork.plctlab.org/api/1.2/patches/129546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013813.14284-1-zengxiao@eswincomputing.com/","msgid":"<20230802013813.14284-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-08-02T01:38:13","name":"[v3,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013813.14284-1-zengxiao@eswincomputing.com/mbox/"},{"id":129561,"url":"https://patchwork.plctlab.org/api/1.2/patches/129561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802023621.1954111-1-pan2.li@intel.com/","msgid":"<20230802023621.1954111-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T02:36:21","name":"[v1] RISC-V: Support RVV VFWADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802023621.1954111-1-pan2.li@intel.com/mbox/"},{"id":129613,"url":"https://patchwork.plctlab.org/api/1.2/patches/129613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee73ca29-bcb2-9e1f-60fc-a3f117c2b788@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T05:41:47","name":"[committed,RISC-V] Avoid sub-word mode comparisons with Zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee73ca29-bcb2-9e1f-60fc-a3f117c2b788@ventanamicro.com/mbox/"},{"id":129630,"url":"https://patchwork.plctlab.org/api/1.2/patches/129630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802063547.2663520-1-pan2.li@intel.com/","msgid":"<20230802063547.2663520-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T06:35:47","name":"[v2] RISC-V: Support RVV VFWADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802063547.2663520-1-pan2.li@intel.com/mbox/"},{"id":129669,"url":"https://patchwork.plctlab.org/api/1.2/patches/129669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMoFmriZhia9k7Wm@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-02T07:28:26","name":"Fix profile update after cancelled loop distribution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMoFmriZhia9k7Wm@kam.mff.cuni.cz/mbox/"},{"id":129689,"url":"https://patchwork.plctlab.org/api/1.2/patches/129689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802075924.3448107-1-pan2.li@intel.com/","msgid":"<20230802075924.3448107-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T07:59:24","name":"[v1] RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802075924.3448107-1-pan2.li@intel.com/mbox/"},{"id":129708,"url":"https://patchwork.plctlab.org/api/1.2/patches/129708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802084314.965951-1-jun.zhang@intel.com/","msgid":"<20230802084314.965951-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-08-02T08:43:14","name":"Enable tpause Exponential backoff and thread delay","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802084314.965951-1-jun.zhang@intel.com/mbox/"},{"id":129717,"url":"https://patchwork.plctlab.org/api/1.2/patches/129717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802090616.1214802-1-dkm@kataplop.net/","msgid":"<20230802090616.1214802-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-08-02T09:06:16","name":"[v3] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802090616.1214802-1-dkm@kataplop.net/mbox/"},{"id":129735,"url":"https://patchwork.plctlab.org/api/1.2/patches/129735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-2-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:25","name":"[1/3,v2] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-2-andrzej.turko@gmail.com/mbox/"},{"id":129736,"url":"https://patchwork.plctlab.org/api/1.2/patches/129736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-3-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:26","name":"[2/3,v2] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-3-andrzej.turko@gmail.com/mbox/"},{"id":129737,"url":"https://patchwork.plctlab.org/api/1.2/patches/129737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-4-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:27","name":"[3/3,v2] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-4-andrzej.turko@gmail.com/mbox/"},{"id":129743,"url":"https://patchwork.plctlab.org/api/1.2/patches/129743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802101907.3772871-1-pan2.li@intel.com/","msgid":"<20230802101907.3772871-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T10:19:07","name":"[v1] RISC-V: Support RVV VFWSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802101907.3772871-1-pan2.li@intel.com/mbox/"},{"id":129746,"url":"https://patchwork.plctlab.org/api/1.2/patches/129746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17618-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:21:59","name":"AArch64 update costing for MLA by invariant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17618-tamar@arm.com/mbox/"},{"id":129747,"url":"https://patchwork.plctlab.org/api/1.2/patches/129747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17624-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:22:41","name":"AArch64 update costing for combining vector conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17624-tamar@arm.com/mbox/"},{"id":129751,"url":"https://patchwork.plctlab.org/api/1.2/patches/129751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17620-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:25:12","name":"AArch64 Undo vec_widen_shiftl optabs [PR106346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17620-tamar@arm.com/mbox/"},{"id":129752,"url":"https://patchwork.plctlab.org/api/1.2/patches/129752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17619-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:29:08","name":"[gensupport] : Don'\''t segfault on empty attrs list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17619-tamar@arm.com/mbox/"},{"id":129788,"url":"https://patchwork.plctlab.org/api/1.2/patches/129788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802115217.AC7123858436@sourceware.org/","msgid":"<20230802115217.AC7123858436@sourceware.org>","list_archive_url":null,"date":"2023-08-02T11:51:33","name":"Make add_phi_node_to_bb static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802115217.AC7123858436@sourceware.org/mbox/"},{"id":129796,"url":"https://patchwork.plctlab.org/api/1.2/patches/129796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c23e4ed4-ec72-a35a-4417-c589dca28a54@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T12:09:54","name":"aarch64: SVE/NEON Bridging intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c23e4ed4-ec72-a35a-4417-c589dca28a54@arm.com/mbox/"},{"id":129816,"url":"https://patchwork.plctlab.org/api/1.2/patches/129816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124506.DDA1A3857706@sourceware.org/","msgid":"<20230802124506.DDA1A3857706@sourceware.org>","list_archive_url":null,"date":"2023-08-02T12:44:23","name":"[1/2] Add virtual operand global liveness computation class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124506.DDA1A3857706@sourceware.org/mbox/"},{"id":129817,"url":"https://patchwork.plctlab.org/api/1.2/patches/129817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124532.69E863858000@sourceware.org/","msgid":"<20230802124532.69E863858000@sourceware.org>","list_archive_url":null,"date":"2023-08-02T12:44:48","name":"[2/2] Improve sinking with unrelated defs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124532.69E863858000@sourceware.org/mbox/"},{"id":129850,"url":"https://patchwork.plctlab.org/api/1.2/patches/129850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802134910.2564339-2-stefansf@linux.ibm.com/","msgid":"<20230802134910.2564339-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-02T13:49:11","name":"PR combine/110867 Fix narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802134910.2564339-2-stefansf@linux.ibm.com/mbox/"},{"id":129925,"url":"https://patchwork.plctlab.org/api/1.2/patches/129925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB783923BF951C8BDF5B3D5BA9F70BA@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T15:48:59","name":"arm/aarch64: Add bti for all functions [PR106671]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB783923BF951C8BDF5B3D5BA9F70BA@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":129930,"url":"https://patchwork.plctlab.org/api/1.2/patches/129930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMp9YaTkwBZi7l69@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-02T15:59:29","name":"_BitInt bit-field support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMp9YaTkwBZi7l69@tucnak/mbox/"},{"id":129933,"url":"https://patchwork.plctlab.org/api/1.2/patches/129933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162014.24756-1-ef2648@columbia.edu/","msgid":"<20230802162014.24756-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-02T16:20:14","name":"[v2] analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162014.24756-1-ef2648@columbia.edu/mbox/"},{"id":129934,"url":"https://patchwork.plctlab.org/api/1.2/patches/129934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162322.447469-1-drross@redhat.com/","msgid":"<20230802162322.447469-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-02T16:23:22","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162322.447469-1-drross@redhat.com/mbox/"},{"id":129991,"url":"https://patchwork.plctlab.org/api/1.2/patches/129991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ea321ba0ede7a0834bd8a73098ab892d94e669.1690994309.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T17:00:34","name":"[v2,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ea321ba0ede7a0834bd8a73098ab892d94e669.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129989,"url":"https://patchwork.plctlab.org/api/1.2/patches/129989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com/","msgid":"<161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-02T17:00:35","name":"[v2,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129993,"url":"https://patchwork.plctlab.org/api/1.2/patches/129993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com/","msgid":"<285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-02T17:00:36","name":"[v2,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129998,"url":"https://patchwork.plctlab.org/api/1.2/patches/129998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com/","msgid":"<003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com>","list_archive_url":null,"date":"2023-08-02T17:20:40","name":"[committed,RISC-V] Fix 20010221-1.c with zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com/mbox/"},{"id":130057,"url":"https://patchwork.plctlab.org/api/1.2/patches/130057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802184547.26983-1-ef2648@columbia.edu/","msgid":"<20230802184547.26983-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-02T18:45:47","name":"[v3] analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802184547.26983-1-ef2648@columbia.edu/mbox/"},{"id":130167,"url":"https://patchwork.plctlab.org/api/1.2/patches/130167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com/","msgid":"<000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-02T22:18:44","name":"[x86] PR target/110792: Early clobber issues with rot32di2_doubleword.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com/mbox/"},{"id":130218,"url":"https://patchwork.plctlab.org/api/1.2/patches/130218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802235232.2265424-1-apinski@marvell.com/","msgid":"<20230802235232.2265424-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-02T23:52:32","name":"MATCH: first of the value replacement moving from phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802235232.2265424-1-apinski@marvell.com/mbox/"},{"id":130238,"url":"https://patchwork.plctlab.org/api/1.2/patches/130238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803013807.3967176-1-pan2.li@intel.com/","msgid":"<20230803013807.3967176-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T01:38:07","name":"[v1] RISC-V: Support RVV VFMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803013807.3967176-1-pan2.li@intel.com/mbox/"},{"id":130243,"url":"https://patchwork.plctlab.org/api/1.2/patches/130243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803015835.447081-1-juzhe.zhong@rivai.ai/","msgid":"<20230803015835.447081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-03T01:58:35","name":"[V2] RISC-V: Support CALL conditional autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803015835.447081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":130245,"url":"https://patchwork.plctlab.org/api/1.2/patches/130245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803021059.516819-1-pan2.li@intel.com/","msgid":"<20230803021059.516819-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T02:10:59","name":"[v1] RISC-V: Remove redudant extern declaration in function base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803021059.516819-1-pan2.li@intel.com/mbox/"},{"id":130258,"url":"https://patchwork.plctlab.org/api/1.2/patches/130258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023110.2271301-1-apinski@marvell.com/","msgid":"<20230803023110.2271301-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T02:31:10","name":"Fix `~X & X` and `~X | X` patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023110.2271301-1-apinski@marvell.com/mbox/"},{"id":130259,"url":"https://patchwork.plctlab.org/api/1.2/patches/130259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023210.530982-1-pan2.li@intel.com/","msgid":"<20230803023210.530982-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T02:32:10","name":"[v2] RISC-V: Support RVV VFMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023210.530982-1-pan2.li@intel.com/mbox/"},{"id":130261,"url":"https://patchwork.plctlab.org/api/1.2/patches/130261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023404.2271442-1-apinski@marvell.com/","msgid":"<20230803023404.2271442-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T02:34:04","name":"Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023404.2271442-1-apinski@marvell.com/mbox/"},{"id":130268,"url":"https://patchwork.plctlab.org/api/1.2/patches/130268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023635.260926-1-juzhe.zhong@rivai.ai/","msgid":"<20230803023635.260926-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-03T02:36:35","name":"[V4] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023635.260926-1-juzhe.zhong@rivai.ai/mbox/"},{"id":130290,"url":"https://patchwork.plctlab.org/api/1.2/patches/130290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803031713.912298-1-yunqiang.su@cipunited.com/","msgid":"<20230803031713.912298-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-08-03T03:17:13","name":"[RFC] Combine zero_extract and sign_extend for TARGET_TRULY_NOOP_TRUNCATION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803031713.912298-1-yunqiang.su@cipunited.com/mbox/"},{"id":130294,"url":"https://patchwork.plctlab.org/api/1.2/patches/130294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803032914.819141-1-pan2.li@intel.com/","msgid":"<20230803032914.819141-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T03:29:14","name":"[v1] RISC-V: Support RVV VFDIV and VFRDIV rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803032914.819141-1-pan2.li@intel.com/mbox/"},{"id":130317,"url":"https://patchwork.plctlab.org/api/1.2/patches/130317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803052844.1178854-1-pan2.li@intel.com/","msgid":"<20230803052844.1178854-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T05:28:44","name":"[v1] RISC-V: Support RVV VFWMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803052844.1178854-1-pan2.li@intel.com/mbox/"},{"id":130325,"url":"https://patchwork.plctlab.org/api/1.2/patches/130325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803064806.951680-2-stefansf@linux.ibm.com/","msgid":"<20230803064806.951680-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-03T06:48:07","name":"s390: Enable vect_bswap test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803064806.951680-2-stefansf@linux.ibm.com/mbox/"},{"id":130326,"url":"https://patchwork.plctlab.org/api/1.2/patches/130326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803065059.951867-2-stefansf@linux.ibm.com/","msgid":"<20230803065059.951867-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-03T06:51:00","name":"s390: Try to emit vlbr/vstbr instead of vperm et al.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803065059.951867-2-stefansf@linux.ibm.com/mbox/"},{"id":130341,"url":"https://patchwork.plctlab.org/api/1.2/patches/130341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com/","msgid":"<00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-03T07:10:17","name":"[x86] Split SUBREGs of SSE vector registers into vec_select insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com/mbox/"},{"id":130343,"url":"https://patchwork.plctlab.org/api/1.2/patches/130343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jlgions.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-08-03T07:13:43","name":"Introduce -msmp to select /lib_smp/ on ppc-vx6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jlgions.fsf@lxoliva.fsfla.org/mbox/"},{"id":130376,"url":"https://patchwork.plctlab.org/api/1.2/patches/130376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com/","msgid":"<7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com>","list_archive_url":null,"date":"2023-08-03T08:09:56","name":"[01/10] x86: \"prefix_extra\" tidying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com/mbox/"},{"id":130377,"url":"https://patchwork.plctlab.org/api/1.2/patches/130377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com/","msgid":"<2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com>","list_archive_url":null,"date":"2023-08-03T08:10:25","name":"[02/10] x86: \"sse4arg\" adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com/mbox/"},{"id":130380,"url":"https://patchwork.plctlab.org/api/1.2/patches/130380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e98989aa-baf3-40a4-13ab-09d06b191362@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:10:46","name":"[03/10] x86: \"ssemuladd\" adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e98989aa-baf3-40a4-13ab-09d06b191362@suse.com/mbox/"},{"id":130379,"url":"https://patchwork.plctlab.org/api/1.2/patches/130379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com/","msgid":"<4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com>","list_archive_url":null,"date":"2023-08-03T08:11:30","name":"[04/10] x86: \"prefix_extra\" can'\''t really be \"2\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com/mbox/"},{"id":130386,"url":"https://patchwork.plctlab.org/api/1.2/patches/130386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5fae9d-e240-c808-702b-93871e39be47@suse.com/","msgid":"<5a5fae9d-e240-c808-702b-93871e39be47@suse.com>","list_archive_url":null,"date":"2023-08-03T08:12:04","name":"[05/10] x86: replace/correct bogus \"prefix_extra\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5fae9d-e240-c808-702b-93871e39be47@suse.com/mbox/"},{"id":130389,"url":"https://patchwork.plctlab.org/api/1.2/patches/130389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b55b2669-518e-d956-ec4e-d93b542e40fb@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:12:26","name":"[06/10] x86: drop stray \"prefix_extra\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b55b2669-518e-d956-ec4e-d93b542e40fb@suse.com/mbox/"},{"id":130381,"url":"https://patchwork.plctlab.org/api/1.2/patches/130381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b44684ea-482e-8867-8b24-d6d08a596ee8@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:12:49","name":"[07/10] x86: add (adjust) XOP insn attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b44684ea-482e-8867-8b24-d6d08a596ee8@suse.com/mbox/"},{"id":130393,"url":"https://patchwork.plctlab.org/api/1.2/patches/130393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com/","msgid":"<0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com>","list_archive_url":null,"date":"2023-08-03T08:13:17","name":"[08/10] x86: add missing \"prefix\" attribute to VF{,C}MULC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com/mbox/"},{"id":130385,"url":"https://patchwork.plctlab.org/api/1.2/patches/130385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com/","msgid":"<8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com>","list_archive_url":null,"date":"2023-08-03T08:13:44","name":"[09/10] x86: correct \"length_immediate\" in a few cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com/mbox/"},{"id":130398,"url":"https://patchwork.plctlab.org/api/1.2/patches/130398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8673f78-d3f7-8418-733a-79d61094a7d4@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:14:07","name":"[10/10] x86: drop redundant \"prefix_data16\" attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8673f78-d3f7-8418-733a-79d61094a7d4@suse.com/mbox/"},{"id":130440,"url":"https://patchwork.plctlab.org/api/1.2/patches/130440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803091041.BE3EE3857C51@sourceware.org/","msgid":"<20230803091041.BE3EE3857C51@sourceware.org>","list_archive_url":null,"date":"2023-08-03T09:09:46","name":"Swap loop splitting and final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803091041.BE3EE3857C51@sourceware.org/mbox/"},{"id":130444,"url":"https://patchwork.plctlab.org/api/1.2/patches/130444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMtxqMF1PQhWrWnZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T09:21:44","name":"[v3,RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMtxqMF1PQhWrWnZ@arm.com/mbox/"},{"id":130459,"url":"https://patchwork.plctlab.org/api/1.2/patches/130459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMuE0AUpDPcENgeB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-03T10:43:28","name":"c-family: Add _BitInt support for __atomic_*fetch* [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMuE0AUpDPcENgeB@tucnak/mbox/"},{"id":130478,"url":"https://patchwork.plctlab.org/api/1.2/patches/130478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuW0ubRQ97nta7HgL18QXGDse1pfnCsC=mr5CP_KRtkh3Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T11:07:48","name":"[RFC] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuW0ubRQ97nta7HgL18QXGDse1pfnCsC=mr5CP_KRtkh3Q@mail.gmail.com/mbox/"},{"id":130482,"url":"https://patchwork.plctlab.org/api/1.2/patches/130482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-2-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:43","name":"[v3,1/8] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-2-panchenghui@loongson.cn/mbox/"},{"id":130488,"url":"https://patchwork.plctlab.org/api/1.2/patches/130488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-3-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:44","name":"[v3,2/8] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-3-panchenghui@loongson.cn/mbox/"},{"id":130485,"url":"https://patchwork.plctlab.org/api/1.2/patches/130485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-4-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:45","name":"[v3,3/8] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-4-panchenghui@loongson.cn/mbox/"},{"id":130483,"url":"https://patchwork.plctlab.org/api/1.2/patches/130483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-5-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:46","name":"[v3,4/8] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-5-panchenghui@loongson.cn/mbox/"},{"id":130486,"url":"https://patchwork.plctlab.org/api/1.2/patches/130486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-6-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:47","name":"[v3,5/8] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-6-panchenghui@loongson.cn/mbox/"},{"id":130484,"url":"https://patchwork.plctlab.org/api/1.2/patches/130484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-7-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:48","name":"[v3,6/8] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-7-panchenghui@loongson.cn/mbox/"},{"id":130534,"url":"https://patchwork.plctlab.org/api/1.2/patches/130534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120844.2526382-1-poulhies@adacore.com/","msgid":"<20230803120844.2526382-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:08:44","name":"[COMMITTED] ada: Adjust again address arithmetics in System.Dwarf_Lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120844.2526382-1-poulhies@adacore.com/mbox/"},{"id":130533,"url":"https://patchwork.plctlab.org/api/1.2/patches/130533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120904.2526668-1-poulhies@adacore.com/","msgid":"<20230803120904.2526668-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:04","name":"[COMMITTED] ada: Fix spurious error on '\''Input of private type with Type_Invariant aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120904.2526668-1-poulhies@adacore.com/mbox/"},{"id":130536,"url":"https://patchwork.plctlab.org/api/1.2/patches/130536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120906.2526729-1-poulhies@adacore.com/","msgid":"<20230803120906.2526729-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:06","name":"[COMMITTED] ada: Rewrite Set_Image_*_Unsigned routines to remove recursion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120906.2526729-1-poulhies@adacore.com/mbox/"},{"id":130535,"url":"https://patchwork.plctlab.org/api/1.2/patches/130535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120907.2526791-1-poulhies@adacore.com/","msgid":"<20230803120907.2526791-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:07","name":"[COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120907.2526791-1-poulhies@adacore.com/mbox/"},{"id":130542,"url":"https://patchwork.plctlab.org/api/1.2/patches/130542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803122307.3C86F3857C66@sourceware.org/","msgid":"<20230803122307.3C86F3857C66@sourceware.org>","list_archive_url":null,"date":"2023-08-03T12:22:20","name":"tree-optimization/110702 - avoid zero-based memory references in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803122307.3C86F3857C66@sourceware.org/mbox/"},{"id":130559,"url":"https://patchwork.plctlab.org/api/1.2/patches/130559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsz82t1q.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T12:45:37","name":"poly_int: Handle more can_div_trunc_p cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsz82t1q.fsf@arm.com/mbox/"},{"id":130584,"url":"https://patchwork.plctlab.org/api/1.2/patches/130584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803132715.000023858D35@sourceware.org/","msgid":"<20230803132715.000023858D35@sourceware.org>","list_archive_url":null,"date":"2023-08-03T13:26:29","name":"[libbacktrace] fix up broken test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803132715.000023858D35@sourceware.org/mbox/"},{"id":130609,"url":"https://patchwork.plctlab.org/api/1.2/patches/130609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d22d1b-0534-47f2-9d3b-3072314447d4@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T13:38:32","name":"mid-end: Use integral time intervals in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d22d1b-0534-47f2-9d3b-3072314447d4@AZ-NEU-EX04.Arm.com/mbox/"},{"id":130625,"url":"https://patchwork.plctlab.org/api/1.2/patches/130625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803135243.1341761-1-dmalcolm@redhat.com/","msgid":"<20230803135243.1341761-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-03T13:52:43","name":"[committed] analyzer: fix ICE on zero-sized arrays [PR110882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803135243.1341761-1-dmalcolm@redhat.com/mbox/"},{"id":130661,"url":"https://patchwork.plctlab.org/api/1.2/patches/130661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-2-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:29","name":"[1/3,v3] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-2-andrzej.turko@gmail.com/mbox/"},{"id":130659,"url":"https://patchwork.plctlab.org/api/1.2/patches/130659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-3-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:30","name":"[2/3,v3] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-3-andrzej.turko@gmail.com/mbox/"},{"id":130660,"url":"https://patchwork.plctlab.org/api/1.2/patches/130660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-4-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:31","name":"[3/3,v3] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-4-andrzej.turko@gmail.com/mbox/"},{"id":130663,"url":"https://patchwork.plctlab.org/api/1.2/patches/130663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143152.2087444-1-pan2.li@intel.com/","msgid":"<20230803143152.2087444-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T14:31:52","name":"[v1] RISC-V: Fix one comment for binop_frm insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143152.2087444-1-pan2.li@intel.com/mbox/"},{"id":130669,"url":"https://patchwork.plctlab.org/api/1.2/patches/130669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143837.2092129-1-pan2.li@intel.com/","msgid":"<20230803143837.2092129-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T14:38:37","name":"[v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143837.2092129-1-pan2.li@intel.com/mbox/"},{"id":130673,"url":"https://patchwork.plctlab.org/api/1.2/patches/130673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803144924.1348195-1-dmalcolm@redhat.com/","msgid":"<20230803144924.1348195-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-03T14:49:24","name":"[committed] testsuite, analyzer: add test case [PR108171]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803144924.1348195-1-dmalcolm@redhat.com/mbox/"},{"id":130676,"url":"https://patchwork.plctlab.org/api/1.2/patches/130676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc14c02e-2ea8-17e4-b44f-6991d1a992dc@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T15:05:09","name":"[committed,RISC-V] Remove errant hunk of code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc14c02e-2ea8-17e4-b44f-6991d1a992dc@gmail.com/mbox/"},{"id":130729,"url":"https://patchwork.plctlab.org/api/1.2/patches/130729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803163117.1016079-1-qing.zhao@oracle.com/","msgid":"<20230803163117.1016079-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-03T16:31:17","name":"Add documentation for -Wflex-array-member-not-at-end.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803163117.1016079-1-qing.zhao@oracle.com/mbox/"},{"id":130733,"url":"https://patchwork.plctlab.org/api/1.2/patches/130733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803164038.2306774-1-apinski@marvell.com/","msgid":"<20230803164038.2306774-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T16:40:38","name":"[PATCHv2] Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803164038.2306774-1-apinski@marvell.com/mbox/"},{"id":130784,"url":"https://patchwork.plctlab.org/api/1.2/patches/130784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af917818-2d7b-f75f-8088-d58e357ba281@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T18:25:47","name":"[COMMITTED] Automatically set type is certain Value_Range routines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af917818-2d7b-f75f-8088-d58e357ba281@redhat.com/mbox/"},{"id":130785,"url":"https://patchwork.plctlab.org/api/1.2/patches/130785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com/","msgid":"<496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com>","list_archive_url":null,"date":"2023-08-03T18:25:53","name":"[COMMITTED] Provide a routine for NAME == NAME relation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com/mbox/"},{"id":130787,"url":"https://patchwork.plctlab.org/api/1.2/patches/130787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aae445c7-c137-1f0c-e746-016163509887@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T18:25:58","name":"[COMMITTED] Add operand ranges to op1_op2_relation API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aae445c7-c137-1f0c-e746-016163509887@redhat.com/mbox/"},{"id":130814,"url":"https://patchwork.plctlab.org/api/1.2/patches/130814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com/","msgid":"<014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-03T19:14:43","name":"Specify signed/unsigned/dontcare in calls to extract_bit_field_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com/mbox/"},{"id":130846,"url":"https://patchwork.plctlab.org/api/1.2/patches/130846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwRo+jeVaS73px2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-03T20:44:19","name":"Fix profiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwRo+jeVaS73px2@kam.mff.cuni.cz/mbox/"},{"id":130849,"url":"https://patchwork.plctlab.org/api/1.2/patches/130849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwSXdJyms5onlrv@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-03T20:47:25","name":"Update estimated iteraitons counts after splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwSXdJyms5onlrv@kam.mff.cuni.cz/mbox/"},{"id":130919,"url":"https://patchwork.plctlab.org/api/1.2/patches/130919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804022205.53108-1-pan2.li@intel.com/","msgid":"<20230804022205.53108-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T02:22:05","name":"[v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804022205.53108-1-pan2.li@intel.com/mbox/"},{"id":130933,"url":"https://patchwork.plctlab.org/api/1.2/patches/130933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804025848.327107-1-pan2.li@intel.com/","msgid":"<20230804025848.327107-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T02:58:48","name":"[v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804025848.327107-1-pan2.li@intel.com/mbox/"},{"id":130942,"url":"https://patchwork.plctlab.org/api/1.2/patches/130942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804032828.596526-1-pan2.li@intel.com/","msgid":"<20230804032828.596526-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T03:28:28","name":"[v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804032828.596526-1-pan2.li@intel.com/mbox/"},{"id":130970,"url":"https://patchwork.plctlab.org/api/1.2/patches/130970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f041b82554fd897f2a609a4d274716ad62d33c66.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-04T06:04:14","name":"[C] _Generic should not warn in non-active branches [PR68193,PR97100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f041b82554fd897f2a609a4d274716ad62d33c66.camel@tugraz.at/mbox/"},{"id":130973,"url":"https://patchwork.plctlab.org/api/1.2/patches/130973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804061018.945633-1-pan2.li@intel.com/","msgid":"<20230804061018.945633-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T06:10:18","name":"[v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804061018.945633-1-pan2.li@intel.com/mbox/"},{"id":130984,"url":"https://patchwork.plctlab.org/api/1.2/patches/130984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMylmGqvOtxn7pEf@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-04T07:15:36","name":"Disable loop distribution for loops with estimated iterations 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMylmGqvOtxn7pEf@kam.mff.cuni.cz/mbox/"},{"id":131023,"url":"https://patchwork.plctlab.org/api/1.2/patches/131023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6b47491-2423-d911-6232-2b3b97137b64@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-08-04T08:57:23","name":"[avr,committed] Fix some typos in avr-mcus.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6b47491-2423-d911-6232-2b3b97137b64@gjlay.de/mbox/"},{"id":131024,"url":"https://patchwork.plctlab.org/api/1.2/patches/131024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de/","msgid":"<34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de>","list_archive_url":null,"date":"2023-08-04T09:02:33","name":"[avr,committed] Add some more devices to avr-mcus.def.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de/mbox/"},{"id":131054,"url":"https://patchwork.plctlab.org/api/1.2/patches/131054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2b7daef-7a54-4f81-9cec-5fe24196f634@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-04T09:41:08","name":"mid-end: Use integral time intervals in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2b7daef-7a54-4f81-9cec-5fe24196f634@AZ-NEU-EX04.Arm.com/mbox/"},{"id":131068,"url":"https://patchwork.plctlab.org/api/1.2/patches/131068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101537.C02F313904@imap2.suse-dmz.suse.de/","msgid":"<20230804101537.C02F313904@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-04T10:15:37","name":"tree-optimization/110838 - less aggressively fold out-of-bound shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101537.C02F313904@imap2.suse-dmz.suse.de/mbox/"},{"id":131072,"url":"https://patchwork.plctlab.org/api/1.2/patches/131072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101959.1008513904@imap2.suse-dmz.suse.de/","msgid":"<20230804101959.1008513904@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-04T10:19:58","name":"tree-optimization/110838 - vectorization of widened right shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101959.1008513904@imap2.suse-dmz.suse.de/mbox/"},{"id":131170,"url":"https://patchwork.plctlab.org/api/1.2/patches/131170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com/","msgid":"<1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com>","list_archive_url":null,"date":"2023-08-04T13:16:30","name":"[pushed,LRA] Check input insn pattern hard regs against early clobber hard regs for live info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com/mbox/"},{"id":131215,"url":"https://patchwork.plctlab.org/api/1.2/patches/131215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982E6D99993A9BC82615B368309A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-04T15:05:39","name":"libatomic: Improve ifunc selection on AArch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982E6D99993A9BC82615B368309A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":131284,"url":"https://patchwork.plctlab.org/api/1.2/patches/131284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu/","msgid":"<07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu>","list_archive_url":null,"date":"2023-08-04T17:57:16","name":"Add -Wdisabled-optimization warning for not optimizing sibling calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu/mbox/"},{"id":131295,"url":"https://patchwork.plctlab.org/api/1.2/patches/131295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZM0/srtB/QHE+vs2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-04T18:13:06","name":"_Decimal* to _BitInt conversion support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZM0/srtB/QHE+vs2@tucnak/mbox/"},{"id":131320,"url":"https://patchwork.plctlab.org/api/1.2/patches/131320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-2-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:29","name":"[V2,1/3] Provide counted_by attribute to flexible array member field (PR108896)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-2-qing.zhao@oracle.com/mbox/"},{"id":131321,"url":"https://patchwork.plctlab.org/api/1.2/patches/131321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-3-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:30","name":"[V2,2/3] Use the counted_by atribute info in builtin object size [PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-3-qing.zhao@oracle.com/mbox/"},{"id":131322,"url":"https://patchwork.plctlab.org/api/1.2/patches/131322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-4-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:31","name":"[V2,3/3] Use the counted_by attribute information in bound sanitizer[PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-4-qing.zhao@oracle.com/mbox/"},{"id":131340,"url":"https://patchwork.plctlab.org/api/1.2/patches/131340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202213.1447631-1-dmalcolm@redhat.com/","msgid":"<20230804202213.1447631-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-04T20:22:13","name":"[pushed] analyzer: fix some svalue::dump_to_pp implementations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202213.1447631-1-dmalcolm@redhat.com/mbox/"},{"id":131341,"url":"https://patchwork.plctlab.org/api/1.2/patches/131341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202251.1447735-1-dmalcolm@redhat.com/","msgid":"<20230804202251.1447735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-04T20:22:51","name":"[pushed] analyzer: handle function attribute \"alloc_size\" [PR110426]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202251.1447735-1-dmalcolm@redhat.com/mbox/"},{"id":131372,"url":"https://patchwork.plctlab.org/api/1.2/patches/131372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804214817.1256642-1-drross@redhat.com/","msgid":"<20230804214817.1256642-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-04T21:48:17","name":"match.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804214817.1256642-1-drross@redhat.com/mbox/"},{"id":131497,"url":"https://patchwork.plctlab.org/api/1.2/patches/131497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAN3w5K-qLb7GkxqHjvJhYGZLM2wBJ8Pmv5eu6f83c5aOue3rdA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-05T15:57:56","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAN3w5K-qLb7GkxqHjvJhYGZLM2wBJ8Pmv5eu6f83c5aOue3rdA@mail.gmail.com/mbox/"},{"id":131500,"url":"https://patchwork.plctlab.org/api/1.2/patches/131500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at/","msgid":"<8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-05T16:22:43","name":"[committed] c: Less warnings for parameters declared as arrays [PR98536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at/mbox/"},{"id":131504,"url":"https://patchwork.plctlab.org/api/1.2/patches/131504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffd3c7b1b0c71e13f40471aeef643b9c9e3c0353.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-05T16:33:04","name":"[C] Support typename as selector in _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffd3c7b1b0c71e13f40471aeef643b9c9e3c0353.camel@tugraz.at/mbox/"},{"id":131546,"url":"https://patchwork.plctlab.org/api/1.2/patches/131546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230805204324.2434846-1-apinski@marvell.com/","msgid":"<20230805204324.2434846-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-05T20:43:24","name":"MATCH: Extend min_value/max_value to pointer types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230805204324.2434846-1-apinski@marvell.com/mbox/"},{"id":131559,"url":"https://patchwork.plctlab.org/api/1.2/patches/131559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806033612.1078855-1-pan2.li@intel.com/","msgid":"<20230806033612.1078855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-06T03:36:12","name":"[v1] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806033612.1078855-1-pan2.li@intel.com/mbox/"},{"id":131580,"url":"https://patchwork.plctlab.org/api/1.2/patches/131580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com/","msgid":"<4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com>","list_archive_url":null,"date":"2023-08-06T12:34:45","name":"[committed,_GLIBCXX_INLINE_VERSION] Add __cxa_call_terminate symbol export","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com/mbox/"},{"id":131586,"url":"https://patchwork.plctlab.org/api/1.2/patches/131586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-1-c@jia.je/","msgid":"<20230806125010.283900-1-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:49:58","name":"[1/9] LoongArch: Introduce loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-1-c@jia.je/mbox/"},{"id":131581,"url":"https://patchwork.plctlab.org/api/1.2/patches/131581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-2-c@jia.je/","msgid":"<20230806125010.283900-2-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:49:59","name":"[2/9] LoongArch: Fix default ISA setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-2-c@jia.je/mbox/"},{"id":131582,"url":"https://patchwork.plctlab.org/api/1.2/patches/131582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-3-c@jia.je/","msgid":"<20230806125010.283900-3-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:00","name":"[3/9] LoongArch: Fix SI division for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-3-c@jia.je/mbox/"},{"id":131583,"url":"https://patchwork.plctlab.org/api/1.2/patches/131583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-4-c@jia.je/","msgid":"<20230806125010.283900-4-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:01","name":"[4/9] LoongArch: Fix movgr2frh.w operand order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-4-c@jia.je/mbox/"},{"id":131587,"url":"https://patchwork.plctlab.org/api/1.2/patches/131587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-5-c@jia.je/","msgid":"<20230806125010.283900-5-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:02","name":"[5/9] LoongArch: Fix 64-bit move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-5-c@jia.je/mbox/"},{"id":131589,"url":"https://patchwork.plctlab.org/api/1.2/patches/131589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-6-c@jia.je/","msgid":"<20230806125010.283900-6-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:03","name":"[6/9] LoongArch: Fix 64-bit immediate move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-6-c@jia.je/mbox/"},{"id":131584,"url":"https://patchwork.plctlab.org/api/1.2/patches/131584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-7-c@jia.je/","msgid":"<20230806125010.283900-7-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:04","name":"[7/9] LoongArch: Fix signed 32-bit overflow for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-7-c@jia.je/mbox/"},{"id":131585,"url":"https://patchwork.plctlab.org/api/1.2/patches/131585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-8-c@jia.je/","msgid":"<20230806125010.283900-8-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:05","name":"[8/9] LoongArch: Do not emit SF/DF <-> DI conversion in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-8-c@jia.je/mbox/"},{"id":131588,"url":"https://patchwork.plctlab.org/api/1.2/patches/131588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-9-c@jia.je/","msgid":"<20230806125010.283900-9-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:06","name":"[9/9] LoongArch: Add: Add -march=loongarch64 to tests with -mabi=lp64d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-9-c@jia.je/mbox/"},{"id":131624,"url":"https://patchwork.plctlab.org/api/1.2/patches/131624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806181535.71101-1-gnaggnoyil@gmail.com/","msgid":"<20230806181535.71101-1-gnaggnoyil@gmail.com>","list_archive_url":null,"date":"2023-08-06T18:15:35","name":"c++: follow DR 2386 and update implementation of get_tuple_size [PR110216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806181535.71101-1-gnaggnoyil@gmail.com/mbox/"},{"id":131626,"url":"https://patchwork.plctlab.org/api/1.2/patches/131626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAB3BD7KOYK4iiJ@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-06T20:26:04","name":"Fix profile update after peeled epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAB3BD7KOYK4iiJ@kam.mff.cuni.cz/mbox/"},{"id":131629,"url":"https://patchwork.plctlab.org/api/1.2/patches/131629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com/","msgid":"<004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-06T22:28:05","name":"[Committed] Avoid FAIL of gcc.target/i386/pr110792.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com/mbox/"},{"id":131630,"url":"https://patchwork.plctlab.org/api/1.2/patches/131630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAlGtgck9vLOX9a@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-06T22:56:26","name":"Fix profile update after versioning ifconverted loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAlGtgck9vLOX9a@kam.mff.cuni.cz/mbox/"},{"id":131657,"url":"https://patchwork.plctlab.org/api/1.2/patches/131657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807040140.14796-1-chenxiaolong@loongson.cn/","msgid":"<20230807040140.14796-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-07T04:01:40","name":"[v1] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807040140.14796-1-chenxiaolong@loongson.cn/mbox/"},{"id":131666,"url":"https://patchwork.plctlab.org/api/1.2/patches/131666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807050631.2514046-1-apinski@marvell.com/","msgid":"<20230807050631.2514046-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-07T05:06:31","name":"MATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807050631.2514046-1-apinski@marvell.com/mbox/"},{"id":131721,"url":"https://patchwork.plctlab.org/api/1.2/patches/131721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com/","msgid":"<004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-07T07:37:01","name":"PR target/107671: Make more use of btl/btq on x86_64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com/mbox/"},{"id":131754,"url":"https://patchwork.plctlab.org/api/1.2/patches/131754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085401.288265-1-hongtao.liu@intel.com/","msgid":"<20230807085401.288265-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-07T08:54:01","name":"Fix ICE in rtl check when bootstrap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085401.288265-1-hongtao.liu@intel.com/mbox/"},{"id":131755,"url":"https://patchwork.plctlab.org/api/1.2/patches/131755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085701.302936-1-hongtao.liu@intel.com/","msgid":"<20230807085701.302936-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-07T08:57:01","name":"i386: Clear upper bits of XMM register for V4HFmode/V2HFmode operations [PR110762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085701.302936-1-hongtao.liu@intel.com/mbox/"},{"id":131759,"url":"https://patchwork.plctlab.org/api/1.2/patches/131759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddbkfji5ax.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-07T09:13:10","name":"libsanitizer: Fix SPARC stacktraces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddbkfji5ax.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":131766,"url":"https://patchwork.plctlab.org/api/1.2/patches/131766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807092715.31994-1-juzhe.zhong@rivai.ai/","msgid":"<20230807092715.31994-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:27:15","name":"RISC-V: Support VLS basic operation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807092715.31994-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131768,"url":"https://patchwork.plctlab.org/api/1.2/patches/131768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093812.1716553-1-juzhe.zhong@rivai.ai/","msgid":"<20230807093812.1716553-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:38:12","name":"[V4] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093812.1716553-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131769,"url":"https://patchwork.plctlab.org/api/1.2/patches/131769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093846.150132-1-juzhe.zhong@rivai.ai/","msgid":"<20230807093846.150132-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:38:46","name":"tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093846.150132-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131778,"url":"https://patchwork.plctlab.org/api/1.2/patches/131778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-2-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:58:59","name":"[1/3,v4] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-2-andrzej.turko@gmail.com/mbox/"},{"id":131780,"url":"https://patchwork.plctlab.org/api/1.2/patches/131780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-3-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:59:00","name":"[2/3,v4] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-3-andrzej.turko@gmail.com/mbox/"},{"id":131779,"url":"https://patchwork.plctlab.org/api/1.2/patches/131779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-4-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:59:01","name":"[3/3,v4] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-4-andrzej.turko@gmail.com/mbox/"},{"id":131784,"url":"https://patchwork.plctlab.org/api/1.2/patches/131784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com/","msgid":"<5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com>","list_archive_url":null,"date":"2023-08-07T10:26:59","name":"fwprop: Allow UNARY_P and check register pressure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com/mbox/"},{"id":131804,"url":"https://patchwork.plctlab.org/api/1.2/patches/131804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-2-arsen@aarsen.me/","msgid":"<20230807105935.2098236-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:43","name":"[01/24] toplevel: Substitute GDCFLAGS instead of using CFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-2-arsen@aarsen.me/mbox/"},{"id":131810,"url":"https://patchwork.plctlab.org/api/1.2/patches/131810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-3-arsen@aarsen.me/","msgid":"<20230807105935.2098236-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:44","name":"[02/24] PR29961, plugin-api.h: \"Could not detect architecture endianess\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-3-arsen@aarsen.me/mbox/"},{"id":131807,"url":"https://patchwork.plctlab.org/api/1.2/patches/131807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-4-arsen@aarsen.me/","msgid":"<20230807105935.2098236-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:45","name":"[03/24] gcc-4.5 build fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-4-arsen@aarsen.me/mbox/"},{"id":131822,"url":"https://patchwork.plctlab.org/api/1.2/patches/131822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-5-arsen@aarsen.me/","msgid":"<20230807105935.2098236-5-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:46","name":"[04/24] Sync with binutils: GCC: Pass --plugin to AR and RANLIB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-5-arsen@aarsen.me/mbox/"},{"id":131818,"url":"https://patchwork.plctlab.org/api/1.2/patches/131818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-6-arsen@aarsen.me/","msgid":"<20230807105935.2098236-6-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:47","name":"[05/24] GCC: Check if AR works with --plugin and rc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-6-arsen@aarsen.me/mbox/"},{"id":131811,"url":"https://patchwork.plctlab.org/api/1.2/patches/131811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-7-arsen@aarsen.me/","msgid":"<20230807105935.2098236-7-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:48","name":"[06/24] toplevel: Recover tilegx/tilepro targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-7-arsen@aarsen.me/mbox/"},{"id":131815,"url":"https://patchwork.plctlab.org/api/1.2/patches/131815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-8-arsen@aarsen.me/","msgid":"<20230807105935.2098236-8-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:49","name":"[07/24] binutils, gdb: support zstd compressed debug sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-8-arsen@aarsen.me/mbox/"},{"id":131814,"url":"https://patchwork.plctlab.org/api/1.2/patches/131814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-9-arsen@aarsen.me/","msgid":"<20230807105935.2098236-9-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:50","name":"[08/24] configure: require libzstd >= 1.4.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-9-arsen@aarsen.me/mbox/"},{"id":131806,"url":"https://patchwork.plctlab.org/api/1.2/patches/131806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-10-arsen@aarsen.me/","msgid":"<20230807105935.2098236-10-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:51","name":"[09/24] add --enable-default-compressed-debug-sections-algorithm configure option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-10-arsen@aarsen.me/mbox/"},{"id":131835,"url":"https://patchwork.plctlab.org/api/1.2/patches/131835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-11-arsen@aarsen.me/","msgid":"<20230807105935.2098236-11-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:52","name":"[10/24] gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-11-arsen@aarsen.me/mbox/"},{"id":131809,"url":"https://patchwork.plctlab.org/api/1.2/patches/131809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-12-arsen@aarsen.me/","msgid":"<20230807105935.2098236-12-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:53","name":"[11/24] Disable year 2038 support on 32-bit hosts by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-12-arsen@aarsen.me/mbox/"},{"id":131819,"url":"https://patchwork.plctlab.org/api/1.2/patches/131819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-13-arsen@aarsen.me/","msgid":"<20230807105935.2098236-13-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:54","name":"[12/24] Pass PKG_CONFIG_PATH down from top-level Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-13-arsen@aarsen.me/mbox/"},{"id":131854,"url":"https://patchwork.plctlab.org/api/1.2/patches/131854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-14-arsen@aarsen.me/","msgid":"<20230807105935.2098236-14-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:55","name":"[13/24] configure: reinstate 32b PA-RISC HP-UX target in toplevel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-14-arsen@aarsen.me/mbox/"},{"id":131858,"url":"https://patchwork.plctlab.org/api/1.2/patches/131858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-15-arsen@aarsen.me/","msgid":"<20230807105935.2098236-15-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:56","name":"[14/24] libtool.m4: fix nm BSD flag detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-15-arsen@aarsen.me/mbox/"},{"id":131853,"url":"https://patchwork.plctlab.org/api/1.2/patches/131853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-16-arsen@aarsen.me/","msgid":"<20230807105935.2098236-16-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:57","name":"[15/24] libtool.m4: fix the NM=\"/nm/over/here -B/option/with/path\" case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-16-arsen@aarsen.me/mbox/"},{"id":131856,"url":"https://patchwork.plctlab.org/api/1.2/patches/131856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-17-arsen@aarsen.me/","msgid":"<20230807105935.2098236-17-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:58","name":"[16/24] Add support for the haiku operating system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-17-arsen@aarsen.me/mbox/"},{"id":131827,"url":"https://patchwork.plctlab.org/api/1.2/patches/131827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-18-arsen@aarsen.me/","msgid":"<20230807105935.2098236-18-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:59","name":"[17/24] egrep in binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-18-arsen@aarsen.me/mbox/"},{"id":131820,"url":"https://patchwork.plctlab.org/api/1.2/patches/131820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-19-arsen@aarsen.me/","msgid":"<20230807105935.2098236-19-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:00","name":"[18/24] PR27116, Spelling errors found by Debian style checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-19-arsen@aarsen.me/mbox/"},{"id":131865,"url":"https://patchwork.plctlab.org/api/1.2/patches/131865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-20-arsen@aarsen.me/","msgid":"<20230807105935.2098236-20-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:01","name":"[19/24] Deprecate a.out support for NetBSD targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-20-arsen@aarsen.me/mbox/"},{"id":131825,"url":"https://patchwork.plctlab.org/api/1.2/patches/131825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-21-arsen@aarsen.me/","msgid":"<20230807105935.2098236-21-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:02","name":"[20/24] PKG_CHECK_MODULES: Check if $pkg_cv_[]$1[]_LIBS works","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-21-arsen@aarsen.me/mbox/"},{"id":131824,"url":"https://patchwork.plctlab.org/api/1.2/patches/131824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-22-arsen@aarsen.me/","msgid":"<20230807105935.2098236-22-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:03","name":"[21/24] PKG_CHECK_MODULES: Properly check if $pkg_cv_[]$1[]_LIBS works","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-22-arsen@aarsen.me/mbox/"},{"id":131868,"url":"https://patchwork.plctlab.org/api/1.2/patches/131868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-23-arsen@aarsen.me/","msgid":"<20230807105935.2098236-23-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:04","name":"[22/24] libtool.m4: augment symcode for Solaris 11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-23-arsen@aarsen.me/mbox/"},{"id":131837,"url":"https://patchwork.plctlab.org/api/1.2/patches/131837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-24-arsen@aarsen.me/","msgid":"<20230807105935.2098236-24-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:05","name":"[23/24] bfd: linker: merge .sframe sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-24-arsen@aarsen.me/mbox/"},{"id":131859,"url":"https://patchwork.plctlab.org/api/1.2/patches/131859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-25-arsen@aarsen.me/","msgid":"<20230807105935.2098236-25-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:06","name":"[24/24] toplevel: Makefile.def: add install-strip dependency on libsframe","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-25-arsen@aarsen.me/mbox/"},{"id":131798,"url":"https://patchwork.plctlab.org/api/1.2/patches/131798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111622.2854826-1-poulhies@adacore.com/","msgid":"<20230807111622.2854826-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:22","name":"[COMMITTED] ada: Spurious error on class-wide preconditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111622.2854826-1-poulhies@adacore.com/mbox/"},{"id":131799,"url":"https://patchwork.plctlab.org/api/1.2/patches/131799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111637.2854994-1-poulhies@adacore.com/","msgid":"<20230807111637.2854994-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:37","name":"[COMMITTED] ada: Crash in GNATprove due to wrong detection of inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111637.2854994-1-poulhies@adacore.com/mbox/"},{"id":131800,"url":"https://patchwork.plctlab.org/api/1.2/patches/131800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111639.2855057-1-poulhies@adacore.com/","msgid":"<20230807111639.2855057-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:39","name":"[COMMITTED] ada: Extend precondition of Interfaces.C.String.Value with Length","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111639.2855057-1-poulhies@adacore.com/mbox/"},{"id":131801,"url":"https://patchwork.plctlab.org/api/1.2/patches/131801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111641.2855120-1-poulhies@adacore.com/","msgid":"<20230807111641.2855120-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:41","name":"[COMMITTED] ada: Refactor multiple returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111641.2855120-1-poulhies@adacore.com/mbox/"},{"id":131849,"url":"https://patchwork.plctlab.org/api/1.2/patches/131849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807113105.437693-1-manolis.tsamis@vrull.eu/","msgid":"<20230807113105.437693-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-07T11:31:05","name":"cprop_hardreg: Allow more propagation of the stack pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807113105.437693-1-manolis.tsamis@vrull.eu/mbox/"},{"id":131909,"url":"https://patchwork.plctlab.org/api/1.2/patches/131909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807122247.1881775-1-pan2.li@intel.com/","msgid":"<20230807122247.1881775-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-07T12:22:47","name":"[v1] Mode-Switching: Fix SET_SRC ICE when only one operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807122247.1881775-1-pan2.li@intel.com/mbox/"},{"id":131960,"url":"https://patchwork.plctlab.org/api/1.2/patches/131960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807131635.CE5733857C41@sourceware.org/","msgid":"<20230807131635.CE5733857C41@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:15:52","name":"Improve -fopt-info-vec for basic-block vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807131635.CE5733857C41@sourceware.org/mbox/"},{"id":131967,"url":"https://patchwork.plctlab.org/api/1.2/patches/131967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807132242.759603858000@sourceware.org/","msgid":"<20230807132242.759603858000@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:21:59","name":"Use RPO order for sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807132242.759603858000@sourceware.org/mbox/"},{"id":131984,"url":"https://patchwork.plctlab.org/api/1.2/patches/131984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133135.04FB838582A1@sourceware.org/","msgid":"<20230807133135.04FB838582A1@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:30:50","name":"tree-optimization/49955 - BB reduction with odd number of lanes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133135.04FB838582A1@sourceware.org/mbox/"},{"id":131992,"url":"https://patchwork.plctlab.org/api/1.2/patches/131992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133241.197319-2-stefansf@linux.ibm.com/","msgid":"<20230807133241.197319-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-07T13:32:42","name":"rtl-optimization/110869 Fix tests cmp-mem-const-*.c for sparc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133241.197319-2-stefansf@linux.ibm.com/mbox/"},{"id":132025,"url":"https://patchwork.plctlab.org/api/1.2/patches/132025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5af4407-1538-802f-92ca-aae843258c15@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-08-07T13:58:27","name":"[OpenACC,2.7,v2] readonly modifier support in front-ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5af4407-1538-802f-92ca-aae843258c15@siemens.com/mbox/"},{"id":132068,"url":"https://patchwork.plctlab.org/api/1.2/patches/132068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807142216.1857701-1-qing.zhao@oracle.com/","msgid":"<20230807142216.1857701-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-07T14:22:16","name":"[V2] gcc-14/changes.html: Deprecate a GCC C extension on flexible array members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807142216.1857701-1-qing.zhao@oracle.com/mbox/"},{"id":132093,"url":"https://patchwork.plctlab.org/api/1.2/patches/132093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807143324.656791-1-manolis.tsamis@vrull.eu/","msgid":"<20230807143324.656791-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-07T14:33:24","name":"[v4] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807143324.656791-1-manolis.tsamis@vrull.eu/mbox/"},{"id":132115,"url":"https://patchwork.plctlab.org/api/1.2/patches/132115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807144534.2538500-1-apinski@marvell.com/","msgid":"<20230807144534.2538500-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-07T14:45:34","name":"VR-VALUES [PR28794]: optimize compare assignments also","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807144534.2538500-1-apinski@marvell.com/mbox/"},{"id":132133,"url":"https://patchwork.plctlab.org/api/1.2/patches/132133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com/","msgid":"<8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com>","list_archive_url":null,"date":"2023-08-07T15:06:25","name":"[committed,RISC-V] Handle more cases in riscv_expand_conditional_move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com/mbox/"},{"id":132290,"url":"https://patchwork.plctlab.org/api/1.2/patches/132290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807172917.10439-1-david.faust@oracle.com/","msgid":"<20230807172917.10439-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-07T17:29:17","name":"[COMMITTED] MAINTAINERS: Add myself as a BPF port reviewer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807172917.10439-1-david.faust@oracle.com/mbox/"},{"id":132299,"url":"https://patchwork.plctlab.org/api/1.2/patches/132299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com/","msgid":"<5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-07T17:50:09","name":"[ver,3] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com/mbox/"},{"id":132318,"url":"https://patchwork.plctlab.org/api/1.2/patches/132318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNE8SVeUupRLUJ1u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-07T18:47:37","name":"_BitInt to _Decimal* conversion support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNE8SVeUupRLUJ1u@tucnak/mbox/"},{"id":132364,"url":"https://patchwork.plctlab.org/api/1.2/patches/132364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com/","msgid":"<4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com>","list_archive_url":null,"date":"2023-08-07T20:20:07","name":"vect: Add a popcount fallback.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com/mbox/"},{"id":132368,"url":"https://patchwork.plctlab.org/api/1.2/patches/132368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f913b618-f708-2018-898b-57a8b84bb07f@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-07T20:36:37","name":"[committed,RISC-V] Don'\''t reject constants in cmov condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f913b618-f708-2018-898b-57a8b84bb07f@ventanamicro.com/mbox/"},{"id":132387,"url":"https://patchwork.plctlab.org/api/1.2/patches/132387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211234.701538-1-jwakely@redhat.com/","msgid":"<20230807211234.701538-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:12:11","name":"[committed] libstdc++: Fix past-the-end increment in std::format [PR110862]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211234.701538-1-jwakely@redhat.com/mbox/"},{"id":132388,"url":"https://patchwork.plctlab.org/api/1.2/patches/132388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211335.701619-1-jwakely@redhat.com/","msgid":"<20230807211335.701619-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:12:35","name":"[committed] i386: Fix grammar typo in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211335.701619-1-jwakely@redhat.com/mbox/"},{"id":132391,"url":"https://patchwork.plctlab.org/api/1.2/patches/132391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211421.701784-1-jwakely@redhat.com/","msgid":"<20230807211421.701784-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:14:01","name":"[committed] libstdc++: Constrain __format::_Iter_sink for contiguous iterators [PR110917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211421.701784-1-jwakely@redhat.com/mbox/"},{"id":132390,"url":"https://patchwork.plctlab.org/api/1.2/patches/132390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211428.701867-1-jwakely@redhat.com/","msgid":"<20230807211428.701867-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:14:22","name":"[committed] libstdc++: Fix incorrect use of abs and log10 in std::format [PR110860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211428.701867-1-jwakely@redhat.com/mbox/"},{"id":132468,"url":"https://patchwork.plctlab.org/api/1.2/patches/132468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808005424.2563140-1-apinski@marvell.com/","msgid":"<20230808005424.2563140-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-08T00:54:24","name":"MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808005424.2563140-1-apinski@marvell.com/mbox/"},{"id":132477,"url":"https://patchwork.plctlab.org/api/1.2/patches/132477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808013709.168452-1-juzhe.zhong@rivai.ai/","msgid":"<20230808013709.168452-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T01:37:09","name":"RISC-V: Support VLS shift vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808013709.168452-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132481,"url":"https://patchwork.plctlab.org/api/1.2/patches/132481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808020902.11626-1-chenxiaolong@loongson.cn/","msgid":"<20230808020902.11626-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-08T02:09:02","name":"[v2] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808020902.11626-1-chenxiaolong@loongson.cn/mbox/"},{"id":132482,"url":"https://patchwork.plctlab.org/api/1.2/patches/132482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808021342.26774-1-chenxiaolong@loongson.cn/","msgid":"<20230808021342.26774-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-08T02:13:42","name":"[v2] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808021342.26774-1-chenxiaolong@loongson.cn/mbox/"},{"id":132488,"url":"https://patchwork.plctlab.org/api/1.2/patches/132488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGrEWUqh3KeQ9LD@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-08T02:40:17","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGrEWUqh3KeQ9LD@Thaum.localdomain/mbox/"},{"id":132489,"url":"https://patchwork.plctlab.org/api/1.2/patches/132489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGtCxzbJwkSXvCy@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-08T02:48:43","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGtCxzbJwkSXvCy@Thaum.localdomain/mbox/"},{"id":132496,"url":"https://patchwork.plctlab.org/api/1.2/patches/132496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808030929.502310-1-pan2.li@intel.com/","msgid":"<20230808030929.502310-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-08T03:09:29","name":"[v2] Mode-Switching: Fix SET_SRC ICE when USE or CLOBBER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808030929.502310-1-pan2.li@intel.com/mbox/"},{"id":132497,"url":"https://patchwork.plctlab.org/api/1.2/patches/132497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808031016.262528-1-juzhe.zhong@rivai.ai/","msgid":"<20230808031016.262528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T03:10:16","name":"RISC-V: Support neg VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808031016.262528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132504,"url":"https://patchwork.plctlab.org/api/1.2/patches/132504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808041232.15387-1-shiyulong@iscas.ac.cn/","msgid":"<20230808041232.15387-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-08-08T04:12:32","name":"[V1] RISC-V: Fix a bug that causes an error insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808041232.15387-1-shiyulong@iscas.ac.cn/mbox/"},{"id":132507,"url":"https://patchwork.plctlab.org/api/1.2/patches/132507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808052508.968486-1-pan2.li@intel.com/","msgid":"<20230808052508.968486-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-08T05:25:08","name":"[v2] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808052508.968486-1-pan2.li@intel.com/mbox/"},{"id":132510,"url":"https://patchwork.plctlab.org/api/1.2/patches/132510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-2-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:10","name":"[1/3] Initial support for AVX10.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-2-haochen.jiang@intel.com/mbox/"},{"id":132509,"url":"https://patchwork.plctlab.org/api/1.2/patches/132509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-3-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:11","name":"[2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-3-haochen.jiang@intel.com/mbox/"},{"id":132508,"url":"https://patchwork.plctlab.org/api/1.2/patches/132508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-4-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:12","name":"[3/3] Emit a warning when AVX10 options conflict in vector width","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-4-haochen.jiang@intel.com/mbox/"},{"id":132511,"url":"https://patchwork.plctlab.org/api/1.2/patches/132511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071947.1570053-1-haochen.jiang@intel.com/","msgid":"<20230808071947.1570053-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:19:47","name":"[1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071947.1570053-1-haochen.jiang@intel.com/mbox/"},{"id":132512,"url":"https://patchwork.plctlab.org/api/1.2/patches/132512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072004.1570107-1-haochen.jiang@intel.com/","msgid":"<20230808072004.1570107-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:04","name":"[2/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072004.1570107-1-haochen.jiang@intel.com/mbox/"},{"id":132513,"url":"https://patchwork.plctlab.org/api/1.2/patches/132513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072019.1570162-1-haochen.jiang@intel.com/","msgid":"<20230808072019.1570162-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:19","name":"[3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072019.1570162-1-haochen.jiang@intel.com/mbox/"},{"id":132515,"url":"https://patchwork.plctlab.org/api/1.2/patches/132515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072031.1570222-1-haochen.jiang@intel.com/","msgid":"<20230808072031.1570222-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:31","name":"[4/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072031.1570222-1-haochen.jiang@intel.com/mbox/"},{"id":132514,"url":"https://patchwork.plctlab.org/api/1.2/patches/132514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072046.1570283-1-haochen.jiang@intel.com/","msgid":"<20230808072046.1570283-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:46","name":"[5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072046.1570283-1-haochen.jiang@intel.com/mbox/"},{"id":132516,"url":"https://patchwork.plctlab.org/api/1.2/patches/132516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072059.1570341-1-haochen.jiang@intel.com/","msgid":"<20230808072059.1570341-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:59","name":"[6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072059.1570341-1-haochen.jiang@intel.com/mbox/"},{"id":132517,"url":"https://patchwork.plctlab.org/api/1.2/patches/132517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808075600.1878105-1-hongtao.liu@intel.com/","msgid":"<20230808075600.1878105-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-08T07:56:00","name":"[X86] Workaround possible CPUID bug in Sandy Bridge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808075600.1878105-1-hongtao.liu@intel.com/mbox/"},{"id":132518,"url":"https://patchwork.plctlab.org/api/1.2/patches/132518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808113259.363524-1-juzhe.zhong@rivai.ai/","msgid":"<20230808113259.363524-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T11:32:59","name":"RISC-V: Allow CONST_VECTOR for VLS modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808113259.363524-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132521,"url":"https://patchwork.plctlab.org/api/1.2/patches/132521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808115709.380001-1-lehua.ding@rivai.ai/","msgid":"<20230808115709.380001-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-08T11:57:09","name":"RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808115709.380001-1-lehua.ding@rivai.ai/mbox/"},{"id":132522,"url":"https://patchwork.plctlab.org/api/1.2/patches/132522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808122353.CF6F713451@imap2.suse-dmz.suse.de/","msgid":"<20230808122353.CF6F713451@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-08T12:23:53","name":"tree-optimization/110924 - fix vop liveness for noreturn const CFG parts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808122353.CF6F713451@imap2.suse-dmz.suse.de/mbox/"},{"id":132523,"url":"https://patchwork.plctlab.org/api/1.2/patches/132523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com/","msgid":"<334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com>","list_archive_url":null,"date":"2023-08-08T13:04:21","name":"[GCC] aarch64: Add support for Cortex-A520 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com/mbox/"},{"id":132525,"url":"https://patchwork.plctlab.org/api/1.2/patches/132525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNJIRJ2p49HBjcMn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-08T13:51:00","name":"testsuite: Add runtime _BitInt stdatomic.h tests [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNJIRJ2p49HBjcMn@tucnak/mbox/"},{"id":132527,"url":"https://patchwork.plctlab.org/api/1.2/patches/132527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808150121.318595-1-christophe.lyon@linaro.org/","msgid":"<20230808150121.318595-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-08T15:01:21","name":"testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-[123].c [PR 110426]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808150121.318595-1-christophe.lyon@linaro.org/mbox/"},{"id":132569,"url":"https://patchwork.plctlab.org/api/1.2/patches/132569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Ze_MJqEnWFkvukyRLBqWgyScgaPP5wN+bCfYN2yaVdqA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-08T16:59:58","name":"[committed] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Ze_MJqEnWFkvukyRLBqWgyScgaPP5wN+bCfYN2yaVdqA@mail.gmail.com/mbox/"},{"id":132589,"url":"https://patchwork.plctlab.org/api/1.2/patches/132589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ilqw4h.fsf@oracle.com/","msgid":"<87y1ilqw4h.fsf@oracle.com>","list_archive_url":null,"date":"2023-08-08T17:31:10","name":"bpf: Fixed GC mistakes in BPF builtins code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ilqw4h.fsf@oracle.com/mbox/"},{"id":132884,"url":"https://patchwork.plctlab.org/api/1.2/patches/132884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0433672-8310-b1aa-653c-a83b9bad3de3@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-08T21:40:07","name":"[committed,RISC-V] Fix bug in condition canonicalization for zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0433672-8310-b1aa-653c-a83b9bad3de3@ventanamicro.com/mbox/"},{"id":132900,"url":"https://patchwork.plctlab.org/api/1.2/patches/132900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808215214.19929-1-patrick@rivosinc.com/","msgid":"<20230808215214.19929-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-08T21:52:14","name":"[v3] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808215214.19929-1-patrick@rivosinc.com/mbox/"},{"id":132927,"url":"https://patchwork.plctlab.org/api/1.2/patches/132927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808223405.35178-1-palevichva@gmail.com/","msgid":"<20230808223405.35178-1-palevichva@gmail.com>","list_archive_url":null,"date":"2023-08-08T22:34:05","name":"libstdc++: fix memory clobbering in std::vector [PR110879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808223405.35178-1-palevichva@gmail.com/mbox/"},{"id":133018,"url":"https://patchwork.plctlab.org/api/1.2/patches/133018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809014756.19615-1-hongtao.liu@intel.com/","msgid":"<20230809014756.19615-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-09T01:47:56","name":"[V2,X86] Workaround possible CPUID bug in Sandy Bridge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809014756.19615-1-hongtao.liu@intel.com/mbox/"},{"id":133035,"url":"https://patchwork.plctlab.org/api/1.2/patches/133035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809030511.857619-1-pan2.li@intel.com/","msgid":"<20230809030511.857619-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-09T03:05:11","name":"[v3] Mode-Switching: Fix SET_SRC ICE when CLOBBER insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809030511.857619-1-pan2.li@intel.com/mbox/"},{"id":133067,"url":"https://patchwork.plctlab.org/api/1.2/patches/133067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com/","msgid":"<7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:09:21","name":"RISC-V: Remove non-existing '\''Zve32d'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133068,"url":"https://patchwork.plctlab.org/api/1.2/patches/133068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com/","msgid":"<83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:11:50","name":"[RFC,1/2] RISC-V: __builtin_riscv_pause for all environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133069,"url":"https://patchwork.plctlab.org/api/1.2/patches/133069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com/","msgid":"<9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:11:51","name":"[RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133071,"url":"https://patchwork.plctlab.org/api/1.2/patches/133071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809063622.316743-1-juzhe.zhong@rivai.ai/","msgid":"<20230809063622.316743-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T06:36:22","name":"VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809063622.316743-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133077,"url":"https://patchwork.plctlab.org/api/1.2/patches/133077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809065138.1392231-1-hongtao.liu@intel.com/","msgid":"<20230809065138.1392231-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-09T06:51:38","name":"Rename local variable subleaf_level to max_subleaf_level.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809065138.1392231-1-hongtao.liu@intel.com/mbox/"},{"id":133158,"url":"https://patchwork.plctlab.org/api/1.2/patches/133158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809105142.3163887-1-juzhe.zhong@rivai.ai/","msgid":"<20230809105142.3163887-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T10:51:42","name":"RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809105142.3163887-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133159,"url":"https://patchwork.plctlab.org/api/1.2/patches/133159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809110244.2966438582B0@sourceware.org/","msgid":"<20230809110244.2966438582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-09T11:02:00","name":"Remove insert location argument from vectorizable_live_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809110244.2966438582B0@sourceware.org/mbox/"},{"id":133171,"url":"https://patchwork.plctlab.org/api/1.2/patches/133171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-2-c@jia.je/","msgid":"<20230809115325.3716347-2-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:08","name":"[v2,01/14] LoongArch: Introduce loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-2-c@jia.je/mbox/"},{"id":133167,"url":"https://patchwork.plctlab.org/api/1.2/patches/133167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-3-c@jia.je/","msgid":"<20230809115325.3716347-3-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:09","name":"[v2,02/14] LoongArch: Fix default ISA setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-3-c@jia.je/mbox/"},{"id":133174,"url":"https://patchwork.plctlab.org/api/1.2/patches/133174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-4-c@jia.je/","msgid":"<20230809115325.3716347-4-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:10","name":"[v2,03/14] LoongArch: Fix SI division for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-4-c@jia.je/mbox/"},{"id":133170,"url":"https://patchwork.plctlab.org/api/1.2/patches/133170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-5-c@jia.je/","msgid":"<20230809115325.3716347-5-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:11","name":"[v2,04/14] LoongArch: Fix movgr2frh.w operand order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-5-c@jia.je/mbox/"},{"id":133169,"url":"https://patchwork.plctlab.org/api/1.2/patches/133169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-6-c@jia.je/","msgid":"<20230809115325.3716347-6-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:12","name":"[v2,05/14] LoongArch: Fix 64-bit move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-6-c@jia.je/mbox/"},{"id":133173,"url":"https://patchwork.plctlab.org/api/1.2/patches/133173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-7-c@jia.je/","msgid":"<20230809115325.3716347-7-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:13","name":"[v2,06/14] LoongArch: Fix 64-bit immediate move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-7-c@jia.je/mbox/"},{"id":133176,"url":"https://patchwork.plctlab.org/api/1.2/patches/133176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-8-c@jia.je/","msgid":"<20230809115325.3716347-8-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:14","name":"[v2,07/14] LoongArch: Fix signed 32-bit overflow for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-8-c@jia.je/mbox/"},{"id":133177,"url":"https://patchwork.plctlab.org/api/1.2/patches/133177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-9-c@jia.je/","msgid":"<20230809115325.3716347-9-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:15","name":"[v2,08/14] LoongArch: Disable SF/DF -> unsigned DI expand in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-9-c@jia.je/mbox/"},{"id":133180,"url":"https://patchwork.plctlab.org/api/1.2/patches/133180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-10-c@jia.je/","msgid":"<20230809115325.3716347-10-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:16","name":"[v2,09/14] LoongArch: Add -march=loongarch64 to tests with -mabi=lp64d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-10-c@jia.je/mbox/"},{"id":133182,"url":"https://patchwork.plctlab.org/api/1.2/patches/133182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-11-c@jia.je/","msgid":"<20230809115325.3716347-11-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:17","name":"[v2,10/14] LoongArch: Forbid ADDRESS_REG_REG in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-11-c@jia.je/mbox/"},{"id":133186,"url":"https://patchwork.plctlab.org/api/1.2/patches/133186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-12-c@jia.je/","msgid":"<20230809115325.3716347-12-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:18","name":"[v2,11/14] LoongArch: Mark am* instructions as LA64-only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-12-c@jia.je/mbox/"},{"id":133172,"url":"https://patchwork.plctlab.org/api/1.2/patches/133172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-13-c@jia.je/","msgid":"<20230809115325.3716347-13-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:19","name":"[v2,12/14] LoongArch: Set long double width to 128 in la32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-13-c@jia.je/mbox/"},{"id":133181,"url":"https://patchwork.plctlab.org/api/1.2/patches/133181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-14-c@jia.je/","msgid":"<20230809115325.3716347-14-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:20","name":"[v2,13/14] LoongArch: Fix ilp32 detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-14-c@jia.je/mbox/"},{"id":133183,"url":"https://patchwork.plctlab.org/api/1.2/patches/133183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-15-c@jia.je/","msgid":"<20230809115325.3716347-15-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:21","name":"[v2,14/14] LoongArch: Allow ftintrz for DF->DI in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-15-c@jia.je/mbox/"},{"id":133197,"url":"https://patchwork.plctlab.org/api/1.2/patches/133197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809121840.3576116-1-juzhe.zhong@rivai.ai/","msgid":"<20230809121840.3576116-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T12:18:40","name":"RISC-V: Support NPATTERNS = 1 stepped vector[PR110950]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809121840.3576116-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133237,"url":"https://patchwork.plctlab.org/api/1.2/patches/133237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809132301.0F2F138582B0@sourceware.org/","msgid":"<20230809132301.0F2F138582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-09T13:22:15","name":"Handle in-order reductions when SLP vectorizing non-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809132301.0F2F138582B0@sourceware.org/mbox/"},{"id":133278,"url":"https://patchwork.plctlab.org/api/1.2/patches/133278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142146.1014795-1-jwakely@redhat.com/","msgid":"<20230809142146.1014795-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:22","name":"[committed] libstdc++: Minor fixes for some warnings in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142146.1014795-1-jwakely@redhat.com/mbox/"},{"id":133280,"url":"https://patchwork.plctlab.org/api/1.2/patches/133280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142156.1014897-1-jwakely@redhat.com/","msgid":"<20230809142156.1014897-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:47","name":"[committed] libstdc++: Explicitly default some copy ctors and assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142156.1014897-1-jwakely@redhat.com/mbox/"},{"id":133279,"url":"https://patchwork.plctlab.org/api/1.2/patches/133279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142232.1014914-1-jwakely@redhat.com/","msgid":"<20230809142232.1014914-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:57","name":"[committed] libstdc++: Fix some -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142232.1014914-1-jwakely@redhat.com/mbox/"},{"id":133281,"url":"https://patchwork.plctlab.org/api/1.2/patches/133281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142240.1015004-1-jwakely@redhat.com/","msgid":"<20230809142240.1015004-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:35","name":"[committed] libstdc++: Fix some -Wmismatched-tags warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142240.1015004-1-jwakely@redhat.com/mbox/"},{"id":133284,"url":"https://patchwork.plctlab.org/api/1.2/patches/133284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142245.1015025-1-jwakely@redhat.com/","msgid":"<20230809142245.1015025-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:41","name":"[committed] libstdc++: Suppress clang -Wc99-extensions warnings in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142245.1015025-1-jwakely@redhat.com/mbox/"},{"id":133282,"url":"https://patchwork.plctlab.org/api/1.2/patches/133282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142252.1015042-1-jwakely@redhat.com/","msgid":"<20230809142252.1015042-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:47","name":"[committed] libstdc++: Fix a -Wsign-compare warning in std::list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142252.1015042-1-jwakely@redhat.com/mbox/"},{"id":133283,"url":"https://patchwork.plctlab.org/api/1.2/patches/133283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142300.1015066-1-jwakely@redhat.com/","msgid":"<20230809142300.1015066-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:53","name":"[committed] libstdc++: Fix constexpr functions to conform to older standards","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142300.1015066-1-jwakely@redhat.com/mbox/"},{"id":133314,"url":"https://patchwork.plctlab.org/api/1.2/patches/133314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b028eb6689e9afdca0e06ed354b94d7ed615a802.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-09T15:52:46","name":"rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b028eb6689e9afdca0e06ed354b94d7ed615a802.camel@us.ibm.com/mbox/"},{"id":133329,"url":"https://patchwork.plctlab.org/api/1.2/patches/133329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809161340.2659544-1-apinski@marvell.com/","msgid":"<20230809161340.2659544-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-09T16:13:40","name":"VR-VALUES: Simplify comparison using range pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809161340.2659544-1-apinski@marvell.com/mbox/"},{"id":133402,"url":"https://patchwork.plctlab.org/api/1.2/patches/133402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:13","name":"[1/12] expr: Small optimization [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/"},{"id":133404,"url":"https://patchwork.plctlab.org/api/1.2/patches/133404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:54","name":"[2/12] lto-streamer-in: Adjust assert [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/mbox/"},{"id":133406,"url":"https://patchwork.plctlab.org/api/1.2/patches/133406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:17:09","name":"[3/12] phiopt: Fix phiopt ICE on vops [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/mbox/"},{"id":133407,"url":"https://patchwork.plctlab.org/api/1.2/patches/133407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:17:50","name":"[4/12] Middle-end _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/mbox/"},{"id":133409,"url":"https://patchwork.plctlab.org/api/1.2/patches/133409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:18:50","name":"[5/12] _BitInt lowering support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/mbox/"},{"id":133408,"url":"https://patchwork.plctlab.org/api/1.2/patches/133408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:19:41","name":"[6/12] i386: Enable _BitInt on x86-64 [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/mbox/"},{"id":133410,"url":"https://patchwork.plctlab.org/api/1.2/patches/133410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:20:37","name":"[7/12] ubsan: _BitInt -fsanitize=undefined support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/mbox/"},{"id":133411,"url":"https://patchwork.plctlab.org/api/1.2/patches/133411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:22:07","name":"[8/12] libgcc: Generated tables for _BitInt <-> _Decimal* conversions [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/mbox/"},{"id":133412,"url":"https://patchwork.plctlab.org/api/1.2/patches/133412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:23:05","name":"[9/12] libgcc _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/mbox/"},{"id":133413,"url":"https://patchwork.plctlab.org/api/1.2/patches/133413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:25:14","name":"[10/12] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/mbox/"},{"id":133415,"url":"https://patchwork.plctlab.org/api/1.2/patches/133415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:26:12","name":"[11/12] testsuite part 1 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/mbox/"},{"id":133416,"url":"https://patchwork.plctlab.org/api/1.2/patches/133416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:27:30","name":"[12/12] testsuite part 2 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/mbox/"},{"id":133443,"url":"https://patchwork.plctlab.org/api/1.2/patches/133443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809191954.2668047-1-apinski@marvell.com/","msgid":"<20230809191954.2668047-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-09T19:19:54","name":"MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809191954.2668047-1-apinski@marvell.com/mbox/"},{"id":133444,"url":"https://patchwork.plctlab.org/api/1.2/patches/133444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu/","msgid":"<97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-09T19:22:47","name":"[v2] analyzer: More features for CPython analyzer plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu/mbox/"},{"id":133481,"url":"https://patchwork.plctlab.org/api/1.2/patches/133481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202104.1804417-1-dmalcolm@redhat.com/","msgid":"<20230809202104.1804417-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-09T20:21:04","name":"[pushed] analyzer: remove default return value from region_model::on_call_pre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202104.1804417-1-dmalcolm@redhat.com/mbox/"},{"id":133483,"url":"https://patchwork.plctlab.org/api/1.2/patches/133483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-2-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:20","name":"[1/3] fortran: New predicate gfc_length_one_character_type_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-2-mikael@gcc.gnu.org/mbox/"},{"id":133482,"url":"https://patchwork.plctlab.org/api/1.2/patches/133482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-3-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:21","name":"[2/3] fortran: Fix length one character dummy arg type [PR110419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-3-mikael@gcc.gnu.org/mbox/"},{"id":133485,"url":"https://patchwork.plctlab.org/api/1.2/patches/133485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-4-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:22","name":"[3/3] testsuite: Use distinct explicit error codes in value_9.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-4-mikael@gcc.gnu.org/mbox/"},{"id":133587,"url":"https://patchwork.plctlab.org/api/1.2/patches/133587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-2-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-2-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:07","name":"[v4,1/8] libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-2-lhyatt@gmail.com/mbox/"},{"id":133586,"url":"https://patchwork.plctlab.org/api/1.2/patches/133586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-3-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-3-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:08","name":"[v4,2/8] libcpp: diagnostics: Support generated data in expanded locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-3-lhyatt@gmail.com/mbox/"},{"id":133591,"url":"https://patchwork.plctlab.org/api/1.2/patches/133591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-4-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-4-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:09","name":"[v4,3/8] diagnostics: Refactor class file_cache_slot","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-4-lhyatt@gmail.com/mbox/"},{"id":133590,"url":"https://patchwork.plctlab.org/api/1.2/patches/133590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-5-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-5-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:10","name":"[v4,4/8] diagnostics: Support obtaining source code lines from generated data buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-5-lhyatt@gmail.com/mbox/"},{"id":133592,"url":"https://patchwork.plctlab.org/api/1.2/patches/133592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-6-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-6-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:11","name":"[v4,5/8] diagnostics: Support testing generated data in input.cc selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-6-lhyatt@gmail.com/mbox/"},{"id":133593,"url":"https://patchwork.plctlab.org/api/1.2/patches/133593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-7-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-7-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:12","name":"[v4,6/8] diagnostics: Full support for generated data locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-7-lhyatt@gmail.com/mbox/"},{"id":133596,"url":"https://patchwork.plctlab.org/api/1.2/patches/133596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-8-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-8-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:13","name":"[v4,7/8] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-8-lhyatt@gmail.com/mbox/"},{"id":133588,"url":"https://patchwork.plctlab.org/api/1.2/patches/133588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-9-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-9-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:14","name":"[v4,8/8] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-9-lhyatt@gmail.com/mbox/"},{"id":133625,"url":"https://patchwork.plctlab.org/api/1.2/patches/133625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810001956.2680884-1-apinski@marvell.com/","msgid":"<20230810001956.2680884-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-10T00:19:56","name":"Fix PR 110954: wrong code with cmp | !cmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810001956.2680884-1-apinski@marvell.com/mbox/"},{"id":133627,"url":"https://patchwork.plctlab.org/api/1.2/patches/133627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810003026.214982-1-vineetg@rivosinc.com/","msgid":"<20230810003026.214982-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-10T00:30:26","name":"RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810003026.214982-1-vineetg@rivosinc.com/mbox/"},{"id":133634,"url":"https://patchwork.plctlab.org/api/1.2/patches/133634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810004728.15915-1-hongtao.liu@intel.com/","msgid":"<20230810004728.15915-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-10T00:47:28","name":"i386: Do not sanitize upper part of V2HFmode and V4HFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810004728.15915-1-hongtao.liu@intel.com/mbox/"},{"id":133642,"url":"https://patchwork.plctlab.org/api/1.2/patches/133642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810011149.23432-1-hongtao.liu@intel.com/","msgid":"<20230810011149.23432-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-10T01:11:49","name":"Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810011149.23432-1-hongtao.liu@intel.com/mbox/"},{"id":133662,"url":"https://patchwork.plctlab.org/api/1.2/patches/133662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com/","msgid":"<22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:25:06","name":"[RFC,v2,1/2] RISC-V: __builtin_riscv_pause for all environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133661,"url":"https://patchwork.plctlab.org/api/1.2/patches/133661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com/","msgid":"<0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:25:07","name":"[RFC,v2,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133663,"url":"https://patchwork.plctlab.org/api/1.2/patches/133663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com/","msgid":"<22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:26:02","name":"[RFC,1/2] RISC-V: Make __builtin_riscv_pause '\''Zihintpause'\'' only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133664,"url":"https://patchwork.plctlab.org/api/1.2/patches/133664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/efab3539fbece51c688b055579ab6670ff8ca8af.1691634361.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T02:26:03","name":"[RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/efab3539fbece51c688b055579ab6670ff8ca8af.1691634361.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133671,"url":"https://patchwork.plctlab.org/api/1.2/patches/133671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com/","msgid":"<97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T03:10:57","name":"[1/1] RISC-V: Make \"prefetch.i\" built-in usable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133672,"url":"https://patchwork.plctlab.org/api/1.2/patches/133672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810031203.2539834-1-pan2.li@intel.com/","msgid":"<20230810031203.2539834-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T03:12:03","name":"[v3] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810031203.2539834-1-pan2.li@intel.com/mbox/"},{"id":133691,"url":"https://patchwork.plctlab.org/api/1.2/patches/133691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810050940.3694097-1-pan2.li@intel.com/","msgid":"<20230810050940.3694097-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T05:09:40","name":"[v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810050940.3694097-1-pan2.li@intel.com/mbox/"},{"id":133692,"url":"https://patchwork.plctlab.org/api/1.2/patches/133692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com/","msgid":"<1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com>","list_archive_url":null,"date":"2023-08-10T05:13:36","name":"sso-string@gnu-versioned-namespace [PR83077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com/mbox/"},{"id":133718,"url":"https://patchwork.plctlab.org/api/1.2/patches/133718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-2-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:43","name":"[V2,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-2-lehua.ding@rivai.ai/mbox/"},{"id":133719,"url":"https://patchwork.plctlab.org/api/1.2/patches/133719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-3-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:44","name":"[V2,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-3-lehua.ding@rivai.ai/mbox/"},{"id":133720,"url":"https://patchwork.plctlab.org/api/1.2/patches/133720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-4-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:45","name":"[V2,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-4-lehua.ding@rivai.ai/mbox/"},{"id":133736,"url":"https://patchwork.plctlab.org/api/1.2/patches/133736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810074909.492039-1-juzhe.zhong@rivai.ai/","msgid":"<20230810074909.492039-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:49:09","name":"[V2] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810074909.492039-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133757,"url":"https://patchwork.plctlab.org/api/1.2/patches/133757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810081954.1899125-1-pan2.li@intel.com/","msgid":"<20230810081954.1899125-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T08:19:54","name":"[v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810081954.1899125-1-pan2.li@intel.com/mbox/"},{"id":133764,"url":"https://patchwork.plctlab.org/api/1.2/patches/133764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810085518.725472-1-juzhe.zhong@rivai.ai/","msgid":"<20230810085518.725472-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T08:55:18","name":"RISC-V: Add missing modes to the iterators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810085518.725472-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133788,"url":"https://patchwork.plctlab.org/api/1.2/patches/133788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810092146.839668-1-juzhe.zhong@rivai.ai/","msgid":"<20230810092146.839668-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T09:21:46","name":"RISC-V: Support TU for integer ternary OP[PR110964]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810092146.839668-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133842,"url":"https://patchwork.plctlab.org/api/1.2/patches/133842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNS3f14lkWcbBDpR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T10:10:07","name":"[13/12] C _BitInt incremental fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNS3f14lkWcbBDpR@tucnak/mbox/"},{"id":133868,"url":"https://patchwork.plctlab.org/api/1.2/patches/133868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810103705.1697293-1-juzhe.zhong@rivai.ai/","msgid":"<20230810103705.1697293-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T10:37:05","name":"RISC-V: Add MASK vec_duplicate pattern[PR110962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810103705.1697293-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133927,"url":"https://patchwork.plctlab.org/api/1.2/patches/133927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae3a8263-f29f-f8b2-0733-8dc1e3420859@in.tum.de/","msgid":"","list_archive_url":null,"date":"2023-08-10T11:33:53","name":"preserve base pointer for __deregister_frame [PR110956]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae3a8263-f29f-f8b2-0733-8dc1e3420859@in.tum.de/mbox/"},{"id":133928,"url":"https://patchwork.plctlab.org/api/1.2/patches/133928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at/","msgid":"<573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-10T11:39:45","name":"c: Support for -Wuseless-cast [RR84510]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at/mbox/"},{"id":133959,"url":"https://patchwork.plctlab.org/api/1.2/patches/133959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122119.1679030-1-lehua.ding@rivai.ai/","msgid":"<20230810122119.1679030-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T12:21:19","name":"[V2] RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122119.1679030-1-lehua.ding@rivai.ai/mbox/"},{"id":133961,"url":"https://patchwork.plctlab.org/api/1.2/patches/133961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122342.10BBA38582B0@sourceware.org/","msgid":"<20230810122342.10BBA38582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-10T12:22:59","name":"Make ISEL used internal functions const/nothrow where appropriate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122342.10BBA38582B0@sourceware.org/mbox/"},{"id":133974,"url":"https://patchwork.plctlab.org/api/1.2/patches/133974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810124235.9E9393857B8E@sourceware.org/","msgid":"<20230810124235.9E9393857B8E@sourceware.org>","list_archive_url":null,"date":"2023-08-10T12:41:51","name":"tree-optimization/110963 - more PRE when optimizing for size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810124235.9E9393857B8E@sourceware.org/mbox/"},{"id":134025,"url":"https://patchwork.plctlab.org/api/1.2/patches/134025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810130402.752335-2-stefansf@linux.ibm.com/","msgid":"<20230810130402.752335-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-10T13:04:03","name":"rtl-optimization/110939 Really fix narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810130402.752335-2-stefansf@linux.ibm.com/mbox/"},{"id":133999,"url":"https://patchwork.plctlab.org/api/1.2/patches/133999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a38a757a186a7ed0530bec6eed632d7230b5f3d5.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:02","name":"[1/5] OpenMP: Move Fortran '\''declare mapper'\'' instantiation code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a38a757a186a7ed0530bec6eed632d7230b5f3d5.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134002,"url":"https://patchwork.plctlab.org/api/1.2/patches/134002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcd6309ed81cddb4e8e029430e421f8208b52f8a.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:03","name":"[2/5] OpenMP: Reprocess expanded clauses after '\''declare mapper'\'' instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcd6309ed81cddb4e8e029430e421f8208b52f8a.1691672603.git.julian@codesourcery.com/mbox/"},{"id":133998,"url":"https://patchwork.plctlab.org/api/1.2/patches/133998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com/","msgid":"<7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T13:33:04","name":"[3/5] OpenMP: Introduce C_ORT_{, OMP_}DECLARE_MAPPER c_omp_region_type types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134001,"url":"https://patchwork.plctlab.org/api/1.2/patches/134001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d90c4df5a82eab4313b75f5e702f7bd0a613c304.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:05","name":"[4/5] OpenMP: Look up '\''declare mapper'\'' definitions at resolution time not parse time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d90c4df5a82eab4313b75f5e702f7bd0a613c304.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134003,"url":"https://patchwork.plctlab.org/api/1.2/patches/134003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com/","msgid":"<0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T13:33:06","name":"[5/5] OpenMP: Enable '\''declare mapper'\'' mappers for '\''target update'\'' directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134044,"url":"https://patchwork.plctlab.org/api/1.2/patches/134044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUA0zC/RG/cqnB5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:22:59","name":"[13/12,v2] C _BitInt incremental fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUA0zC/RG/cqnB5@tucnak/mbox/"},{"id":134045,"url":"https://patchwork.plctlab.org/api/1.2/patches/134045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDMvNw/UldnN9d@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:33:06","name":"c, v2: Add __typeof_unqual__ and __typeof_unqual support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDMvNw/UldnN9d@tucnak/mbox/"},{"id":134046,"url":"https://patchwork.plctlab.org/api/1.2/patches/134046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDrXSjHpgTuknm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:35:09","name":"c, c++, v2: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDrXSjHpgTuknm@tucnak/mbox/"},{"id":134048,"url":"https://patchwork.plctlab.org/api/1.2/patches/134048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEZzW2H9zc/n4V@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:38:15","name":"c, v2: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEZzW2H9zc/n4V@tucnak/mbox/"},{"id":134050,"url":"https://patchwork.plctlab.org/api/1.2/patches/134050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEskNR0ezRW2Js@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:39:30","name":"stdckdint.h _BitInt test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEskNR0ezRW2Js@tucnak/mbox/"},{"id":134054,"url":"https://patchwork.plctlab.org/api/1.2/patches/134054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUFhqrSn3Gcq09w@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:43:02","name":"match.pd, v2: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUFhqrSn3Gcq09w@tucnak/mbox/"},{"id":134073,"url":"https://patchwork.plctlab.org/api/1.2/patches/134073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160833.1513194-1-ppalka@redhat.com/","msgid":"<20230810160833.1513194-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:08:33","name":"c++: dependently scoped template-id in type-req [PR110927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160833.1513194-1-ppalka@redhat.com/mbox/"},{"id":134074,"url":"https://patchwork.plctlab.org/api/1.2/patches/134074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160842.1513222-1-ppalka@redhat.com/","msgid":"<20230810160842.1513222-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:08:42","name":"c++: recognize in-class var tmpl partial spec [PR71954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160842.1513222-1-ppalka@redhat.com/mbox/"},{"id":134075,"url":"https://patchwork.plctlab.org/api/1.2/patches/134075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160900.1513252-1-ppalka@redhat.com/","msgid":"<20230810160900.1513252-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:09:00","name":"c++: bogus warning w/ deduction guide in anon ns [PR106604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160900.1513252-1-ppalka@redhat.com/mbox/"},{"id":134110,"url":"https://patchwork.plctlab.org/api/1.2/patches/134110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUWx+6BCgS4Y7uX@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T16:56:39","name":"Fix undefined behaviour in profile_count::differs_from_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUWx+6BCgS4Y7uX@kam.mff.cuni.cz/mbox/"},{"id":134111,"url":"https://patchwork.plctlab.org/api/1.2/patches/134111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUW6q1p08h/OTLN@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T16:57:14","name":"Fix profile updating bug in tree-ssa-threadupdate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUW6q1p08h/OTLN@kam.mff.cuni.cz/mbox/"},{"id":134113,"url":"https://patchwork.plctlab.org/api/1.2/patches/134113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUYcP4Lm1v7fps9@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T17:03:44","name":"Fix profile update in duplicat_loop_body_to_header_edge for loops with 0 count_in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUYcP4Lm1v7fps9@kam.mff.cuni.cz/mbox/"},{"id":134134,"url":"https://patchwork.plctlab.org/api/1.2/patches/134134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuUU3KtBmD4rgH=FbWSfmsaxCO6i2F3=4rq5W2VgR7YF=Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T18:06:36","name":"[RFC,v2] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuUU3KtBmD4rgH=FbWSfmsaxCO6i2F3=4rq5W2VgR7YF=Q@mail.gmail.com/mbox/"},{"id":134232,"url":"https://patchwork.plctlab.org/api/1.2/patches/134232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com/","msgid":"<5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T21:30:32","name":"config: Fix host -rdynamic detection for build != host != target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com/mbox/"},{"id":134240,"url":"https://patchwork.plctlab.org/api/1.2/patches/134240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNVjtv70+OJlqcn2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T22:24:54","name":"Fix division by zero in tree-ssa-loop-split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNVjtv70+OJlqcn2@kam.mff.cuni.cz/mbox/"},{"id":134243,"url":"https://patchwork.plctlab.org/api/1.2/patches/134243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223344.1242452-1-jwakely@redhat.com/","msgid":"<20230810223344.1242452-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:32:21","name":"[committed] libstdc++: Use alias template for iterator_category [PR110970]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223344.1242452-1-jwakely@redhat.com/mbox/"},{"id":134242,"url":"https://patchwork.plctlab.org/api/1.2/patches/134242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223353.1242664-1-jwakely@redhat.com/","msgid":"<20230810223353.1242664-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:33:45","name":"[committed] libstdc++: Fix std::format for localized floats [PR110968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223353.1242664-1-jwakely@redhat.com/mbox/"},{"id":134246,"url":"https://patchwork.plctlab.org/api/1.2/patches/134246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810224034.1259089-1-jwakely@redhat.com/","msgid":"<20230810224034.1259089-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:40:03","name":"[committed] libstdc++: Fix out-of-bounds read in format string \"{:{}.\" [PR110974]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810224034.1259089-1-jwakely@redhat.com/mbox/"},{"id":134251,"url":"https://patchwork.plctlab.org/api/1.2/patches/134251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810225121.2732876-1-apinski@marvell.com/","msgid":"<20230810225121.2732876-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-10T22:51:21","name":"[PATCHv2] Fix PR 110954: wrong code with cmp | !cmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810225121.2732876-1-apinski@marvell.com/mbox/"},{"id":134260,"url":"https://patchwork.plctlab.org/api/1.2/patches/134260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811003810.2669080-1-hongtao.liu@intel.com/","msgid":"<20230811003810.2669080-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-11T00:38:10","name":"Software mitigation: Disable gather generation in vectorization for GDS affected Intel Processors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811003810.2669080-1-hongtao.liu@intel.com/mbox/"},{"id":134279,"url":"https://patchwork.plctlab.org/api/1.2/patches/134279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811022819.1113702-1-pan2.li@intel.com/","msgid":"<20230811022819.1113702-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T02:28:19","name":"[v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811022819.1113702-1-pan2.li@intel.com/mbox/"},{"id":134326,"url":"https://patchwork.plctlab.org/api/1.2/patches/134326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811055429.3654604-1-pan2.li@intel.com/","msgid":"<20230811055429.3654604-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T05:54:29","name":"[v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811055429.3654604-1-pan2.li@intel.com/mbox/"},{"id":134332,"url":"https://patchwork.plctlab.org/api/1.2/patches/134332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811060131.1494356-1-hongtao.liu@intel.com/","msgid":"<20230811060131.1494356-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-11T06:01:31","name":"[V2] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811060131.1494356-1-hongtao.liu@intel.com/mbox/"},{"id":134334,"url":"https://patchwork.plctlab.org/api/1.2/patches/134334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811063817.491547-1-juzhe.zhong@rivai.ai/","msgid":"<20230811063817.491547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T06:38:17","name":"[V3] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811063817.491547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134338,"url":"https://patchwork.plctlab.org/api/1.2/patches/134338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811064910.525721-1-juzhe.zhong@rivai.ai/","msgid":"<20230811064910.525721-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T06:49:10","name":"VECT: Add vec_mask_len_{load_lanes,store_lanes} patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811064910.525721-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134345,"url":"https://patchwork.plctlab.org/api/1.2/patches/134345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811071748.486528-1-pan2.li@intel.com/","msgid":"<20230811071748.486528-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T07:17:48","name":"[v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811071748.486528-1-pan2.li@intel.com/mbox/"},{"id":134355,"url":"https://patchwork.plctlab.org/api/1.2/patches/134355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNXstoaxDzI1OEwE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-11T08:09:26","name":"c, v3: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNXstoaxDzI1OEwE@tucnak/mbox/"},{"id":134357,"url":"https://patchwork.plctlab.org/api/1.2/patches/134357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081023.95408-1-mikael@gcc.gnu.org/","msgid":"<20230811081023.95408-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-11T08:10:23","name":"dg-cmp-results: Escape slash from variant argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081023.95408-1-mikael@gcc.gnu.org/mbox/"},{"id":134359,"url":"https://patchwork.plctlab.org/api/1.2/patches/134359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081117.1088622-1-pan2.li@intel.com/","msgid":"<20230811081117.1088622-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T08:11:17","name":"[v1] RISC-V: Support RVV VFNMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081117.1088622-1-pan2.li@intel.com/mbox/"},{"id":134370,"url":"https://patchwork.plctlab.org/api/1.2/patches/134370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811084526.237649-1-juzhe.zhong@rivai.ai/","msgid":"<20230811084526.237649-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T08:45:26","name":"RISC-V: Fix vec_series expander[PR110985]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811084526.237649-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134372,"url":"https://patchwork.plctlab.org/api/1.2/patches/134372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811090121.1789446-1-lehua.ding@rivai.ai/","msgid":"<20230811090121.1789446-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-11T09:01:21","name":"RISC-V: Revert the convert from vmv.s.x to vmv.v.i","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811090121.1789446-1-lehua.ding@rivai.ai/mbox/"},{"id":134375,"url":"https://patchwork.plctlab.org/api/1.2/patches/134375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com/","msgid":"<3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-11T09:11:39","name":"RISC-V: Revive test case PR 102957","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134377,"url":"https://patchwork.plctlab.org/api/1.2/patches/134377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-1-apinski@marvell.com/","msgid":"<20230811091551.2758227-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-11T09:15:50","name":"[1/2] PHI-OPT [PR 110984]: Add support for NE_EXPR/EQ_EXPR with casts to spaceship_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-1-apinski@marvell.com/mbox/"},{"id":134378,"url":"https://patchwork.plctlab.org/api/1.2/patches/134378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-2-apinski@marvell.com/","msgid":"<20230811091551.2758227-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-11T09:15:51","name":"[2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-2-apinski@marvell.com/mbox/"},{"id":134386,"url":"https://patchwork.plctlab.org/api/1.2/patches/134386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811095601.216255-1-juzhe.zhong@rivai.ai/","msgid":"<20230811095601.216255-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T09:56:01","name":"[V2] RISC-V: Allow CONST_VECTOR for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811095601.216255-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134397,"url":"https://patchwork.plctlab.org/api/1.2/patches/134397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811101153.1621235-1-pan2.li@intel.com/","msgid":"<20230811101153.1621235-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T10:11:53","name":"[v1] RISC-V: Support RVV VFMSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811101153.1621235-1-pan2.li@intel.com/mbox/"},{"id":134417,"url":"https://patchwork.plctlab.org/api/1.2/patches/134417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110606.08A7913592@imap2.suse-dmz.suse.de/","msgid":"<20230811110606.08A7913592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T11:06:05","name":"tree-optimization/110979 - fold-left reduction and partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110606.08A7913592@imap2.suse-dmz.suse.de/mbox/"},{"id":134418,"url":"https://patchwork.plctlab.org/api/1.2/patches/134418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110712.5486D13592@imap2.suse-dmz.suse.de/","msgid":"<20230811110712.5486D13592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T11:07:11","name":"Improve BB vectorization opt-info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110712.5486D13592@imap2.suse-dmz.suse.de/mbox/"},{"id":134435,"url":"https://patchwork.plctlab.org/api/1.2/patches/134435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811114919.2556172-1-juzhe.zhong@rivai.ai/","msgid":"<20230811114919.2556172-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T11:49:19","name":"VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811114919.2556172-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134434,"url":"https://patchwork.plctlab.org/api/1.2/patches/134434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811115115.2277873-1-vultkayn@gcc.gnu.org/","msgid":"<20230811115115.2277873-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-11T11:51:15","name":"analyzer: New option fanalyzer-show-events-in-system-headers [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811115115.2277873-1-vultkayn@gcc.gnu.org/mbox/"},{"id":134474,"url":"https://patchwork.plctlab.org/api/1.2/patches/134474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811130321.D7EB613592@imap2.suse-dmz.suse.de/","msgid":"<20230811130321.D7EB613592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T13:03:21","name":"[v2] tree-optimization/110979 - fold-left reduction and partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811130321.D7EB613592@imap2.suse-dmz.suse.de/mbox/"},{"id":134493,"url":"https://patchwork.plctlab.org/api/1.2/patches/134493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXE1WdcjEsGtU786dAEyg2Eq0z90nxPiHzc6XXBV1nEwg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-11T13:18:36","name":"[v3] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXE1WdcjEsGtU786dAEyg2Eq0z90nxPiHzc6XXBV1nEwg@mail.gmail.com/mbox/"},{"id":134510,"url":"https://patchwork.plctlab.org/api/1.2/patches/134510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811135542.2823827-1-juzhe.zhong@rivai.ai/","msgid":"<20230811135542.2823827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T13:55:42","name":"[V2] VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811135542.2823827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134522,"url":"https://patchwork.plctlab.org/api/1.2/patches/134522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140303.1390347-1-jwakely@redhat.com/","msgid":"<20230811140303.1390347-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T14:02:28","name":"[committed] libstdc++: Revert accidentally committed change to bits/stl_iterator.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140303.1390347-1-jwakely@redhat.com/mbox/"},{"id":134526,"url":"https://patchwork.plctlab.org/api/1.2/patches/134526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140332.1390523-1-jwakely@redhat.com/","msgid":"<20230811140332.1390523-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T14:03:12","name":"[committed] libstdc++: Handle invalid values in std::chrono pretty printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140332.1390523-1-jwakely@redhat.com/mbox/"},{"id":134535,"url":"https://patchwork.plctlab.org/api/1.2/patches/134535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811142448.2913622-1-juzhe.zhong@rivai.ai/","msgid":"<20230811142448.2913622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T14:24:48","name":"[V4] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811142448.2913622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134561,"url":"https://patchwork.plctlab.org/api/1.2/patches/134561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com/","msgid":"<8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com>","list_archive_url":null,"date":"2023-08-11T15:32:19","name":"[pushed,LRA] : Implement output stack pointer reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com/mbox/"},{"id":134604,"url":"https://patchwork.plctlab.org/api/1.2/patches/134604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811172221.1432932-1-jwakely@redhat.com/","msgid":"<20230811172221.1432932-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T17:21:53","name":"[committed] libstdc++: Do not call log10(0.0) in std::format [PR110860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811172221.1432932-1-jwakely@redhat.com/mbox/"},{"id":134605,"url":"https://patchwork.plctlab.org/api/1.2/patches/134605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173025.12324-1-ef2648@columbia.edu/","msgid":"<20230811173025.12324-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-11T17:30:25","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173025.12324-1-ef2648@columbia.edu/mbox/"},{"id":134606,"url":"https://patchwork.plctlab.org/api/1.2/patches/134606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNZwXD4oLQPO98KZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-11T17:31:08","name":"c, v4: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNZwXD4oLQPO98KZ@tucnak/mbox/"},{"id":134610,"url":"https://patchwork.plctlab.org/api/1.2/patches/134610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173545.2116052-1-ppalka@redhat.com/","msgid":"<20230811173545.2116052-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-11T17:35:45","name":"tree-pretty-print: delimit TREE_VEC with braces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173545.2116052-1-ppalka@redhat.com/mbox/"},{"id":134624,"url":"https://patchwork.plctlab.org/api/1.2/patches/134624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811174724.12604-1-ef2648@columbia.edu/","msgid":"<20230811174724.12604-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-11T17:47:24","name":"[COMMITTED] analyzer: More features for CPython analyzer plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811174724.12604-1-ef2648@columbia.edu/mbox/"},{"id":134640,"url":"https://patchwork.plctlab.org/api/1.2/patches/134640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185247.5228-1-jose.marchesi@oracle.com/","msgid":"<20230811185247.5228-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-11T18:52:47","name":"[COMMITTED] bpf: allow exceeding max num of args in BPF when always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185247.5228-1-jose.marchesi@oracle.com/mbox/"},{"id":134641,"url":"https://patchwork.plctlab.org/api/1.2/patches/134641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185258.5285-1-jose.marchesi@oracle.com/","msgid":"<20230811185258.5285-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-11T18:52:58","name":"[COMMITTED] bpf: liberate R9 for general register allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185258.5285-1-jose.marchesi@oracle.com/mbox/"},{"id":134645,"url":"https://patchwork.plctlab.org/api/1.2/patches/134645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185935.1438399-1-jwakely@redhat.com/","msgid":"<20230811185935.1438399-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T18:58:41","name":"[committed] libstdc++: Implement C++20 std::chrono::parse [PR104167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185935.1438399-1-jwakely@redhat.com/mbox/"},{"id":134652,"url":"https://patchwork.plctlab.org/api/1.2/patches/134652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811191559.232535-1-patrick@rivosinc.com/","msgid":"<20230811191559.232535-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-11T19:15:59","name":"RISC-V: Specify -mabi for ztso testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811191559.232535-1-patrick@rivosinc.com/mbox/"},{"id":134728,"url":"https://patchwork.plctlab.org/api/1.2/patches/134728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce0a46f7-bc24-2585-dcd9-4b27a749bc16@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-11T21:55:48","name":"[committed] Fix subdi3 synthesis on rx port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce0a46f7-bc24-2585-dcd9-4b27a749bc16@gmail.com/mbox/"},{"id":134733,"url":"https://patchwork.plctlab.org/api/1.2/patches/134733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811221212.1959872-1-dmalcolm@redhat.com/","msgid":"<20230811221212.1959872-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-11T22:12:12","name":"[pushed] analyzer: new warning: -Wanalyzer-unterminated-string [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811221212.1959872-1-dmalcolm@redhat.com/mbox/"},{"id":134752,"url":"https://patchwork.plctlab.org/api/1.2/patches/134752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811223721.34729-1-jwakely@redhat.com/","msgid":"<20230811223721.34729-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T22:37:05","name":"[committed] libstdc++: Fix std::format_to_n return value [PR110990]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811223721.34729-1-jwakely@redhat.com/mbox/"},{"id":134799,"url":"https://patchwork.plctlab.org/api/1.2/patches/134799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812023002.238780-1-juzhe.zhong@rivai.ai/","msgid":"<20230812023002.238780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-12T02:30:02","name":"RISC-V: Add TAREGT_VECTOR check into VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812023002.238780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134807,"url":"https://patchwork.plctlab.org/api/1.2/patches/134807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:18","name":"[1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134809,"url":"https://patchwork.plctlab.org/api/1.2/patches/134809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:19","name":"[2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134808,"url":"https://patchwork.plctlab.org/api/1.2/patches/134808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:20","name":"[3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134813,"url":"https://patchwork.plctlab.org/api/1.2/patches/134813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812044822.2351566-1-pan2.li@intel.com/","msgid":"<20230812044822.2351566-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-12T04:48:22","name":"[v1] RISC-V: Support RVV VFNMSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812044822.2351566-1-pan2.li@intel.com/mbox/"},{"id":134830,"url":"https://patchwork.plctlab.org/api/1.2/patches/134830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812080521.2814979-1-apinski@marvell.com/","msgid":"<20230812080521.2814979-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-12T08:05:21","name":"Add support for vector conitional not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812080521.2814979-1-apinski@marvell.com/mbox/"},{"id":134831,"url":"https://patchwork.plctlab.org/api/1.2/patches/134831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812081652.1851216-1-gnaggnoyil@gmail.com/","msgid":"<20230812081652.1851216-1-gnaggnoyil@gmail.com>","list_archive_url":null,"date":"2023-08-12T08:16:52","name":"[v1] c++: follow DR 2386 and update implementation of get_tuple_size [PR110216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812081652.1851216-1-gnaggnoyil@gmail.com/mbox/"},{"id":134890,"url":"https://patchwork.plctlab.org/api/1.2/patches/134890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812141515.326096-1-juzhe.zhong@rivai.ai/","msgid":"<20230812141515.326096-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-12T14:15:15","name":"RISC-V: Fix autovec_length_operand predicate[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812141515.326096-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134891,"url":"https://patchwork.plctlab.org/api/1.2/patches/134891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812143643.1511082-1-lehua.ding@rivai.ai/","msgid":"<20230812143643.1511082-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-12T14:36:43","name":"RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812143643.1511082-1-lehua.ding@rivai.ai/mbox/"},{"id":134993,"url":"https://patchwork.plctlab.org/api/1.2/patches/134993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813005621.591927-1-pan2.li@intel.com/","msgid":"<20230813005621.591927-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-13T00:56:21","name":"[v4] Mode-Switching: Fix SET_SRC ICE for create_pre_exit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813005621.591927-1-pan2.li@intel.com/mbox/"},{"id":135018,"url":"https://patchwork.plctlab.org/api/1.2/patches/135018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813080231.2188040-1-pan2.li@intel.com/","msgid":"<20230813080231.2188040-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-13T08:02:31","name":"[v1] RISC-V: Support RVV VFWMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813080231.2188040-1-pan2.li@intel.com/mbox/"},{"id":135032,"url":"https://patchwork.plctlab.org/api/1.2/patches/135032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813134515.12498-1-iain@sandoe.co.uk/","msgid":"<20230813134515.12498-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-08-13T13:45:15","name":"[pushed] modula-2, plugin: Fix Darwin bootstrap issues.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813134515.12498-1-iain@sandoe.co.uk/mbox/"},{"id":135078,"url":"https://patchwork.plctlab.org/api/1.2/patches/135078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P195MB13982812469EE1DEFDF83A24AE16A@AS1P195MB1398.EURP195.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-08-13T19:19:56","name":"gcc/reload.h: Change type of x_spill_indirect_levels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P195MB13982812469EE1DEFDF83A24AE16A@AS1P195MB1398.EURP195.PROD.OUTLOOK.COM/mbox/"},{"id":135080,"url":"https://patchwork.plctlab.org/api/1.2/patches/135080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-1-arsen@aarsen.me/","msgid":"<20230813195939.1099991-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-13T19:35:34","name":"[v2,1/2] libstdc++: Implement more maintainable header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-1-arsen@aarsen.me/mbox/"},{"id":135081,"url":"https://patchwork.plctlab.org/api/1.2/patches/135081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-2-arsen@aarsen.me/","msgid":"<20230813195939.1099991-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-13T19:35:35","name":"[v2,2/2] libstdc++: Replace all manual FTM definitions and use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-2-arsen@aarsen.me/mbox/"},{"id":135095,"url":"https://patchwork.plctlab.org/api/1.2/patches/135095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdf06990-a0fe-1bed-46db-44ff92f3a986@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T01:09:00","name":"[pushed] LRA]: Fix asserts for output stack pointer reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdf06990-a0fe-1bed-46db-44ff92f3a986@redhat.com/mbox/"},{"id":135097,"url":"https://patchwork.plctlab.org/api/1.2/patches/135097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132212030.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:13:46","name":"[committed] Disable LRA for MMIX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132212030.11350@arjuna.pair.com/mbox/"},{"id":135098,"url":"https://patchwork.plctlab.org/api/1.2/patches/135098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132213580.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:16:17","name":"[committed] MMIX: Handle LRA FP-to-SP-elimination oddity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132213580.11350@arjuna.pair.com/mbox/"},{"id":135099,"url":"https://patchwork.plctlab.org/api/1.2/patches/135099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com/","msgid":"<61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T02:18:22","name":"[PATCHv4,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com/mbox/"},{"id":135101,"url":"https://patchwork.plctlab.org/api/1.2/patches/135101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132216290.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:19:22","name":"[committed] MMIX: Re-enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132216290.11350@arjuna.pair.com/mbox/"},{"id":135102,"url":"https://patchwork.plctlab.org/api/1.2/patches/135102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132219360.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:20:31","name":"[committed] MMIX: Switch to lra_in_progress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132219360.11350@arjuna.pair.com/mbox/"},{"id":135104,"url":"https://patchwork.plctlab.org/api/1.2/patches/135104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814023625.1355161-1-pan2.li@intel.com/","msgid":"<20230814023625.1355161-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T02:36:25","name":"[v1] RISC-V: Support RVV VFWNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814023625.1355161-1-pan2.li@intel.com/mbox/"},{"id":135105,"url":"https://patchwork.plctlab.org/api/1.2/patches/135105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814024600.1594913-1-hongtao.liu@intel.com/","msgid":"<20230814024600.1594913-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-14T02:46:00","name":"Generate vmovapd instead of vmovsd for moving DFmode between SSE_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814024600.1594913-1-hongtao.liu@intel.com/mbox/"},{"id":135106,"url":"https://patchwork.plctlab.org/api/1.2/patches/135106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com/","msgid":"<89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T02:53:44","name":"RISC-V: Deduplicate #error messages in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135113,"url":"https://patchwork.plctlab.org/api/1.2/patches/135113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814032909.1898090-1-pan2.li@intel.com/","msgid":"<20230814032909.1898090-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T03:29:09","name":"[v1] RISC-V: Support RVV VFWMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814032909.1898090-1-pan2.li@intel.com/mbox/"},{"id":135120,"url":"https://patchwork.plctlab.org/api/1.2/patches/135120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-1-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:02","name":"[v1,1/6] LoongArch: a symmetric multilib subdir layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-1-yangyujie@loongson.cn/mbox/"},{"id":135117,"url":"https://patchwork.plctlab.org/api/1.2/patches/135117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-2-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:03","name":"[v1,2/6] LoongArch: improved target configuration interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-2-yangyujie@loongson.cn/mbox/"},{"id":135116,"url":"https://patchwork.plctlab.org/api/1.2/patches/135116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-3-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:04","name":"[v1,3/6] LoongArch: define preprocessing macros \"__loongarch_{arch, tune}\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-3-yangyujie@loongson.cn/mbox/"},{"id":135118,"url":"https://patchwork.plctlab.org/api/1.2/patches/135118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-4-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:05","name":"[v1,4/6] LoongArch: use -mstrict-align by default when building libraries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-4-yangyujie@loongson.cn/mbox/"},{"id":135115,"url":"https://patchwork.plctlab.org/api/1.2/patches/135115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-5-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:06","name":"[v1,5/6] LoongArch: export headers for building GCC plugins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-5-yangyujie@loongson.cn/mbox/"},{"id":135119,"url":"https://patchwork.plctlab.org/api/1.2/patches/135119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-6-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-6-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:07","name":"[v1,6/6] LoongArch: support loongarch*-elf target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-6-yangyujie@loongson.cn/mbox/"},{"id":135121,"url":"https://patchwork.plctlab.org/api/1.2/patches/135121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814043747.2877403-1-lili.cui@intel.com/","msgid":"<20230814043747.2877403-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-08-14T04:37:47","name":"x86: Update model values for Raptorlake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814043747.2877403-1-lili.cui@intel.com/mbox/"},{"id":135128,"url":"https://patchwork.plctlab.org/api/1.2/patches/135128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com/","msgid":"<644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T05:32:09","name":"[1/2] RISC-V: Add support for the '\''Zfa'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135129,"url":"https://patchwork.plctlab.org/api/1.2/patches/135129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16370ade4886697b0ed46ebf2d7835b89ab8cc2.1691991126.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T05:32:10","name":"[2/2] RISC-V: Constant FP Optimization with '\''Zfa'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16370ade4886697b0ed46ebf2d7835b89ab8cc2.1691991126.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135132,"url":"https://patchwork.plctlab.org/api/1.2/patches/135132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-1-guojiufu@linux.ibm.com/","msgid":"<20230814054156.2068718-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T05:41:55","name":"[1/2] light expander sra v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-1-guojiufu@linux.ibm.com/mbox/"},{"id":135133,"url":"https://patchwork.plctlab.org/api/1.2/patches/135133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-2-guojiufu@linux.ibm.com/","msgid":"<20230814054156.2068718-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T05:41:56","name":"[2/2] combine nonconstant_array walker and expander_sra walker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-2-guojiufu@linux.ibm.com/mbox/"},{"id":135135,"url":"https://patchwork.plctlab.org/api/1.2/patches/135135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814055033.1995-1-jinma@linux.alibaba.com/","msgid":"<20230814055033.1995-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-14T05:50:33","name":"[v10] RISC-V: Add support for the Zfa extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814055033.1995-1-jinma@linux.alibaba.com/mbox/"},{"id":135138,"url":"https://patchwork.plctlab.org/api/1.2/patches/135138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814060702.4078649-1-pan2.li@intel.com/","msgid":"<20230814060702.4078649-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T06:07:02","name":"[v1] RISC-V: Support RVV VFWNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814060702.4078649-1-pan2.li@intel.com/mbox/"},{"id":135143,"url":"https://patchwork.plctlab.org/api/1.2/patches/135143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c79e0c5a7c28518b41ac5d33c7817d921c91fadd.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T06:09:51","name":"[v2,1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c79e0c5a7c28518b41ac5d33c7817d921c91fadd.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135144,"url":"https://patchwork.plctlab.org/api/1.2/patches/135144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"<0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T06:09:52","name":"[v2,2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135142,"url":"https://patchwork.plctlab.org/api/1.2/patches/135142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"<3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T06:09:53","name":"[v2,3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135156,"url":"https://patchwork.plctlab.org/api/1.2/patches/135156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814064513.157363-1-juzhe.zhong@rivai.ai/","msgid":"<20230814064513.157363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T06:45:13","name":"VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814064513.157363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135186,"url":"https://patchwork.plctlab.org/api/1.2/patches/135186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814073902.722885-1-pan2.li@intel.com/","msgid":"<20230814073902.722885-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T07:39:02","name":"[v1] RISC-V: Support RVV VFSQRT rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814073902.722885-1-pan2.li@intel.com/mbox/"},{"id":135221,"url":"https://patchwork.plctlab.org/api/1.2/patches/135221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814083705.AA2713858C31@sourceware.org/","msgid":"<20230814083705.AA2713858C31@sourceware.org>","list_archive_url":null,"date":"2023-08-14T08:35:49","name":"Fix print_loop_info ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814083705.AA2713858C31@sourceware.org/mbox/"},{"id":135238,"url":"https://patchwork.plctlab.org/api/1.2/patches/135238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfdd58d9-577b-ea7b-d9fc-57ff565f5866@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T08:52:03","name":"vect: Remove several useless VMAT_INVARIANT checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfdd58d9-577b-ea7b-d9fc-57ff565f5866@linux.ibm.com/mbox/"},{"id":135239,"url":"https://patchwork.plctlab.org/api/1.2/patches/135239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39e934e-869e-840d-eb7a-5b2de24146a8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T08:54:47","name":"vect: Move VMAT_LOAD_STORE_LANES handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39e934e-869e-840d-eb7a-5b2de24146a8@linux.ibm.com/mbox/"},{"id":135240,"url":"https://patchwork.plctlab.org/api/1.2/patches/135240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com/","msgid":"<7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T08:59:11","name":"vect: Move VMAT_GATHER_SCATTER handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com/mbox/"},{"id":135283,"url":"https://patchwork.plctlab.org/api/1.2/patches/135283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814094218.3286920-1-juzhe.zhong@rivai.ai/","msgid":"<20230814094218.3286920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T09:42:18","name":"genrecog: Add SUBREG_BYTE.to_constant check to the genrecog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814094218.3286920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135297,"url":"https://patchwork.plctlab.org/api/1.2/patches/135297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se/","msgid":"<3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se>","list_archive_url":null,"date":"2023-08-14T09:57:09","name":"Fix for bug libstdc++/110860","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se/mbox/"},{"id":135349,"url":"https://patchwork.plctlab.org/api/1.2/patches/135349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814112255.2071-1-jinma@linux.alibaba.com/","msgid":"<20230814112255.2071-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-14T11:22:55","name":"[v2] In the pipeline, USE or CLOBBER should delay execution if it starts a new live range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814112255.2071-1-jinma@linux.alibaba.com/mbox/"},{"id":135369,"url":"https://patchwork.plctlab.org/api/1.2/patches/135369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814121527.3482525-1-juzhe.zhong@rivai.ai/","msgid":"<20230814121527.3482525-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T12:15:27","name":"RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814121527.3482525-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135401,"url":"https://patchwork.plctlab.org/api/1.2/patches/135401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814124923.3108452-1-pan2.li@intel.com/","msgid":"<20230814124923.3108452-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T12:49:23","name":"[v1] RISC-V: Support RVV VFREC7 rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814124923.3108452-1-pan2.li@intel.com/mbox/"},{"id":135418,"url":"https://patchwork.plctlab.org/api/1.2/patches/135418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814132958.A6644385840B@sourceware.org/","msgid":"<20230814132958.A6644385840B@sourceware.org>","list_archive_url":null,"date":"2023-08-14T13:29:15","name":"tree-optimization/110991 - unroll size estimate after vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814132958.A6644385840B@sourceware.org/mbox/"},{"id":135465,"url":"https://patchwork.plctlab.org/api/1.2/patches/135465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com/","msgid":"<56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com>","list_archive_url":null,"date":"2023-08-14T14:15:52","name":"[GCC] aarch64: Add support for Cortex-A720 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com/mbox/"},{"id":135481,"url":"https://patchwork.plctlab.org/api/1.2/patches/135481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814144651.3437687-1-pan2.li@intel.com/","msgid":"<20230814144651.3437687-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T14:46:51","name":"[v2] RISC-V: Support RVV VFREC7 rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814144651.3437687-1-pan2.li@intel.com/mbox/"},{"id":135523,"url":"https://patchwork.plctlab.org/api/1.2/patches/135523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814154853.2371420-1-vultkayn@gcc.gnu.org/","msgid":"<20230814154853.2371420-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-14T15:48:55","name":"[v2] analyzer: New option fanalyzer-show-events-in-system-headers [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814154853.2371420-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135527,"url":"https://patchwork.plctlab.org/api/1.2/patches/135527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNpPecZj12tk5zbn@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-14T15:59:53","name":"Avoid division by zero in fold_loop_internal_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNpPecZj12tk5zbn@kam.mff.cuni.cz/mbox/"},{"id":135575,"url":"https://patchwork.plctlab.org/api/1.2/patches/135575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814173312.14980-1-jason@redhat.com/","msgid":"<20230814173312.14980-1-jason@redhat.com>","list_archive_url":null,"date":"2023-08-14T17:33:12","name":"[pushed] c++: -fconcepts and __cpp_concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814173312.14980-1-jason@redhat.com/mbox/"},{"id":135582,"url":"https://patchwork.plctlab.org/api/1.2/patches/135582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jl1cyky.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-14T17:39:57","name":"Fortran: Avoid accessing gfc_charlen when not looking at BT_CHARACTER (PR 110677)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jl1cyky.fsf@suse.cz/mbox/"},{"id":135584,"url":"https://patchwork.plctlab.org/api/1.2/patches/135584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814180105.1812551-1-christophe.lyon@linaro.org/","msgid":"<20230814180105.1812551-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:01:05","name":"arm: [MVE intrinsics] fix binary_acca_int32 and binary_acca_int64 shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814180105.1812551-1-christophe.lyon@linaro.org/mbox/"},{"id":135585,"url":"https://patchwork.plctlab.org/api/1.2/patches/135585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814181005.1905319-1-christophe.lyon@linaro.org/","msgid":"<20230814181005.1905319-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:10:05","name":"arm: [MVE intrinsics] Remove dead check for float type in parse_element_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814181005.1905319-1-christophe.lyon@linaro.org/mbox/"},{"id":135588,"url":"https://patchwork.plctlab.org/api/1.2/patches/135588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-1-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:14","name":"[1/9] arm: [MVE intrinsics] factorize vmullbq vmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-1-christophe.lyon@linaro.org/mbox/"},{"id":135589,"url":"https://patchwork.plctlab.org/api/1.2/patches/135589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-2-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:15","name":"[2/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-2-christophe.lyon@linaro.org/mbox/"},{"id":135592,"url":"https://patchwork.plctlab.org/api/1.2/patches/135592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-3-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:16","name":"[3/9] arm: [MVE intrinsics] add binary_widen shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-3-christophe.lyon@linaro.org/mbox/"},{"id":135595,"url":"https://patchwork.plctlab.org/api/1.2/patches/135595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-4-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:17","name":"[4/9] arm: [MVE intrinsics] rework vmullbq_int vmulltq_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-4-christophe.lyon@linaro.org/mbox/"},{"id":135590,"url":"https://patchwork.plctlab.org/api/1.2/patches/135590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-5-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:18","name":"[5/9] arm: [MVE intrinsics] add support for p8 and p16 polynomial types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-5-christophe.lyon@linaro.org/mbox/"},{"id":135591,"url":"https://patchwork.plctlab.org/api/1.2/patches/135591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-6-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:19","name":"[6/9] arm: [MVE intrinsics] add support for U and p formats in parse_element_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-6-christophe.lyon@linaro.org/mbox/"},{"id":135593,"url":"https://patchwork.plctlab.org/api/1.2/patches/135593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-7-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-7-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:20","name":"[7/9] arm: [MVE intrinsics] add binary_widen_poly shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-7-christophe.lyon@linaro.org/mbox/"},{"id":135594,"url":"https://patchwork.plctlab.org/api/1.2/patches/135594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-8-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-8-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:21","name":"[8/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull_poly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-8-christophe.lyon@linaro.org/mbox/"},{"id":135596,"url":"https://patchwork.plctlab.org/api/1.2/patches/135596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-9-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-9-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:22","name":"[9/9] arm: [MVE intrinsics] rework vmullbq_poly vmulltq_poly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-9-christophe.lyon@linaro.org/mbox/"},{"id":135600,"url":"https://patchwork.plctlab.org/api/1.2/patches/135600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com/","msgid":"<780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com>","list_archive_url":null,"date":"2023-08-14T20:14:39","name":"[pushed,LRA] : Process output stack pointer reloads before emitting reload insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com/mbox/"},{"id":135606,"url":"https://patchwork.plctlab.org/api/1.2/patches/135606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-2-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:32","name":"[v4,1/6] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-2-panchenghui@loongson.cn/mbox/"},{"id":135604,"url":"https://patchwork.plctlab.org/api/1.2/patches/135604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-3-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:33","name":"[v4,2/6] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-3-panchenghui@loongson.cn/mbox/"},{"id":135605,"url":"https://patchwork.plctlab.org/api/1.2/patches/135605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-4-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:34","name":"[v4,3/6] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-4-panchenghui@loongson.cn/mbox/"},{"id":135602,"url":"https://patchwork.plctlab.org/api/1.2/patches/135602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-5-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:35","name":"[v4,4/6] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-5-panchenghui@loongson.cn/mbox/"},{"id":135607,"url":"https://patchwork.plctlab.org/api/1.2/patches/135607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-6-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:36","name":"[v4,5/6] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-6-panchenghui@loongson.cn/mbox/"},{"id":135603,"url":"https://patchwork.plctlab.org/api/1.2/patches/135603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-7-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:37","name":"[v4,6/6] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-7-panchenghui@loongson.cn/mbox/"},{"id":135614,"url":"https://patchwork.plctlab.org/api/1.2/patches/135614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815025525.3437008-1-pan2.li@intel.com/","msgid":"<20230815025525.3437008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T02:55:25","name":"[v1] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815025525.3437008-1-pan2.li@intel.com/mbox/"},{"id":135615,"url":"https://patchwork.plctlab.org/api/1.2/patches/135615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com/","msgid":"<85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com>","list_archive_url":null,"date":"2023-08-15T03:13:08","name":"Makefile.in: Make recog.h depend on $(TREE_H)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com/mbox/"},{"id":135619,"url":"https://patchwork.plctlab.org/api/1.2/patches/135619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815045704.30B3A2042C@pchp3.se.axis.com/","msgid":"<20230815045704.30B3A2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-15T04:57:04","name":"CRIS: Don'\''t include tree.h in cris-protos.h, PR bootstrap/111021","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815045704.30B3A2042C@pchp3.se.axis.com/mbox/"},{"id":135620,"url":"https://patchwork.plctlab.org/api/1.2/patches/135620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815050146.204188-1-pan2.li@intel.com/","msgid":"<20230815050146.204188-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T05:01:46","name":"[v1] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815050146.204188-1-pan2.li@intel.com/mbox/"},{"id":135622,"url":"https://patchwork.plctlab.org/api/1.2/patches/135622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815051952.6488F203F1@pchp3.se.axis.com/","msgid":"<20230815051952.6488F203F1@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-15T05:19:52","name":"[v2] CRIS: Don'\''t include tree.h in cris-protos.h, PR bootstrap/111021","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815051952.6488F203F1@pchp3.se.axis.com/mbox/"},{"id":135624,"url":"https://patchwork.plctlab.org/api/1.2/patches/135624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815064807.1314281-1-pan2.li@intel.com/","msgid":"<20230815064807.1314281-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T06:48:07","name":"[v1] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815064807.1314281-1-pan2.li@intel.com/mbox/"},{"id":135629,"url":"https://patchwork.plctlab.org/api/1.2/patches/135629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815080147.1986255-1-pan2.li@intel.com/","msgid":"<20230815080147.1986255-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T08:01:47","name":"[v1] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815080147.1986255-1-pan2.li@intel.com/mbox/"},{"id":135632,"url":"https://patchwork.plctlab.org/api/1.2/patches/135632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815083452.90040385700D@sourceware.org/","msgid":"<20230815083452.90040385700D@sourceware.org>","list_archive_url":null,"date":"2023-08-15T08:34:01","name":"Use find_loop_location from unrolling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815083452.90040385700D@sourceware.org/mbox/"},{"id":135636,"url":"https://patchwork.plctlab.org/api/1.2/patches/135636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815090730.2537591-1-pan2.li@intel.com/","msgid":"<20230815090730.2537591-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T09:07:30","name":"[v1] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815090730.2537591-1-pan2.li@intel.com/mbox/"},{"id":135645,"url":"https://patchwork.plctlab.org/api/1.2/patches/135645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815103943.21417-1-chenxiaolong@loongson.cn/","msgid":"<20230815103943.21417-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-15T10:39:43","name":"[v3] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815103943.21417-1-chenxiaolong@loongson.cn/mbox/"},{"id":135652,"url":"https://patchwork.plctlab.org/api/1.2/patches/135652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815121050.F2D9B3856DD0@sourceware.org/","msgid":"<20230815121050.F2D9B3856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-15T12:10:06","name":"Support constants and externals in BB reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815121050.F2D9B3856DD0@sourceware.org/mbox/"},{"id":135654,"url":"https://patchwork.plctlab.org/api/1.2/patches/135654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815122917.270596-1-juzhe.zhong@rivai.ai/","msgid":"<20230815122917.270596-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-15T12:29:17","name":"[V2] VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815122917.270596-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135659,"url":"https://patchwork.plctlab.org/api/1.2/patches/135659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815132829.57DF13856DD0@sourceware.org/","msgid":"<20230815132829.57DF13856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-15T13:27:42","name":"Cleanup BB vectorization roots handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815132829.57DF13856DD0@sourceware.org/mbox/"},{"id":135660,"url":"https://patchwork.plctlab.org/api/1.2/patches/135660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815133728.EE0D23856964@sourceware.org/","msgid":"<20230815133728.EE0D23856964@sourceware.org>","list_archive_url":null,"date":"2023-08-15T13:36:40","name":"Handle TYPE_OVERFLOW_UNDEFINED vectorized BB reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815133728.EE0D23856964@sourceware.org/mbox/"},{"id":135661,"url":"https://patchwork.plctlab.org/api/1.2/patches/135661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXNSpt28jn-ZG-kMHBNJSHKoY2wBkgF1Y-FarcrKeBePA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T13:41:58","name":"[v4] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXNSpt28jn-ZG-kMHBNJSHKoY2wBkgF1Y-FarcrKeBePA@mail.gmail.com/mbox/"},{"id":135665,"url":"https://patchwork.plctlab.org/api/1.2/patches/135665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com/","msgid":"<4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com>","list_archive_url":null,"date":"2023-08-15T14:02:40","name":"IFN: Fix vector extraction into promoted subreg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com/mbox/"},{"id":135667,"url":"https://patchwork.plctlab.org/api/1.2/patches/135667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jztwcr05.fsf@euler.schwinge.homeip.net/","msgid":"<87jztwcr05.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-08-15T14:35:54","name":"[v3] OpenACC 2.7: default clause support for data constructs (was: [PATCH, OpenACC 2.7, v2] Implement default clause support for data constructs)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jztwcr05.fsf@euler.schwinge.homeip.net/mbox/"},{"id":135669,"url":"https://patchwork.plctlab.org/api/1.2/patches/135669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815151804.3588843-1-ibuclaw@gdcproject.org/","msgid":"<20230815151804.3588843-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-08-15T15:18:04","name":"[committed,GCC,12] d: Fix internal compiler error: in layout_aggregate_type, at d/types.cc:574","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815151804.3588843-1-ibuclaw@gdcproject.org/mbox/"},{"id":135674,"url":"https://patchwork.plctlab.org/api/1.2/patches/135674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3b347e3-55fc-ab4d-14c2-0c372167be34@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T15:49:42","name":"RISC-V: Fix reduc_strict_run-1 test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3b347e3-55fc-ab4d-14c2-0c372167be34@gmail.com/mbox/"},{"id":135675,"url":"https://patchwork.plctlab.org/api/1.2/patches/135675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2bf61f6-08a5-f21d-8cc3-3054c0d444ce@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T15:55:20","name":"[v2,GCC] aarch64: Add support for Cortex-A720 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2bf61f6-08a5-f21d-8cc3-3054c0d444ce@arm.com/mbox/"},{"id":135683,"url":"https://patchwork.plctlab.org/api/1.2/patches/135683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815172029.63-1-romain.geissler@amadeus.com/","msgid":"<20230815172029.63-1-romain.geissler@amadeus.com>","list_archive_url":null,"date":"2023-08-15T17:20:30","name":"[gcc,11,backport] Support ld.mold linker.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815172029.63-1-romain.geissler@amadeus.com/mbox/"},{"id":135685,"url":"https://patchwork.plctlab.org/api/1.2/patches/135685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815182913.2824479-1-ewlu@rivosinc.com/","msgid":"<20230815182913.2824479-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-15T18:29:10","name":"[V3] riscv: generate builtin macro for compilation with strict alignment:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815182913.2824479-1-ewlu@rivosinc.com/mbox/"},{"id":135686,"url":"https://patchwork.plctlab.org/api/1.2/patches/135686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815183208.330060-1-vultkayn@gcc.gnu.org/","msgid":"<20230815183208.330060-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-15T18:32:09","name":"testsuite: Remove unused dg-line in ce8cdf5bcf96a2db6d7b9f656fc9ba58d7942a83","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815183208.330060-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135688,"url":"https://patchwork.plctlab.org/api/1.2/patches/135688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184618.7396-1-david.faust@oracle.com/","msgid":"<20230815184618.7396-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-15T18:46:18","name":"bpf: fix pseudoc w regs for small modes [PR111029]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184618.7396-1-david.faust@oracle.com/mbox/"},{"id":135689,"url":"https://patchwork.plctlab.org/api/1.2/patches/135689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184908.7474-1-david.faust@oracle.com/","msgid":"<20230815184908.7474-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-15T18:49:08","name":"bpf: remove useless define_insn for extendsisi2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184908.7474-1-david.faust@oracle.com/mbox/"},{"id":135694,"url":"https://patchwork.plctlab.org/api/1.2/patches/135694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193630.ltkwpmezkmw4rade@lug-owl.de/","msgid":"<20230815193630.ltkwpmezkmw4rade@lug-owl.de>","list_archive_url":null,"date":"2023-08-15T19:36:30","name":"config-list.mk i686-solaris2.11: Use --with-gnu-as","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193630.ltkwpmezkmw4rade@lug-owl.de/mbox/"},{"id":135695,"url":"https://patchwork.plctlab.org/api/1.2/patches/135695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193635.6lk7kqqjzkbfh22w@lug-owl.de/","msgid":"<20230815193635.6lk7kqqjzkbfh22w@lug-owl.de>","list_archive_url":null,"date":"2023-08-15T19:36:35","name":"config-list.mk Darwin: Use --with-gnu-as","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193635.6lk7kqqjzkbfh22w@lug-owl.de/mbox/"},{"id":135707,"url":"https://patchwork.plctlab.org/api/1.2/patches/135707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816010253.860803-1-thiago.bauermann@linaro.org/","msgid":"<20230816010253.860803-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-16T01:02:53","name":"Remove XFAIL from gcc/testsuite/gcc.dg/unroll-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816010253.860803-1-thiago.bauermann@linaro.org/mbox/"},{"id":135708,"url":"https://patchwork.plctlab.org/api/1.2/patches/135708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014519.3053770-1-juzhe.zhong@rivai.ai/","msgid":"<20230816014519.3053770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T01:45:19","name":"[V2] RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014519.3053770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135709,"url":"https://patchwork.plctlab.org/api/1.2/patches/135709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014822.20018-1-guojie@loongson.cn/","msgid":"<20230816014822.20018-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-08-16T01:48:22","name":"Loongarch: Fix plugin header missing install.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014822.20018-1-guojie@loongson.cn/mbox/"},{"id":135714,"url":"https://patchwork.plctlab.org/api/1.2/patches/135714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e94df26f-39d2-4426-3fd1-f88946f34378@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T02:31:11","name":"Makefile.in: Add variable TM_P_H2 for TM_P_H dependency [PR111021]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e94df26f-39d2-4426-3fd1-f88946f34378@linux.ibm.com/mbox/"},{"id":135720,"url":"https://patchwork.plctlab.org/api/1.2/patches/135720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816051756.3827494-1-pan2.li@intel.com/","msgid":"<20230816051756.3827494-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T05:17:56","name":"[v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816051756.3827494-1-pan2.li@intel.com/mbox/"},{"id":135726,"url":"https://patchwork.plctlab.org/api/1.2/patches/135726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816062057.379965-1-pan2.li@intel.com/","msgid":"<20230816062057.379965-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T06:20:57","name":"[v2] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816062057.379965-1-pan2.li@intel.com/mbox/"},{"id":135729,"url":"https://patchwork.plctlab.org/api/1.2/patches/135729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816065055.653158-1-pan2.li@intel.com/","msgid":"<20230816065055.653158-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T06:50:55","name":"[v2] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816065055.653158-1-pan2.li@intel.com/mbox/"},{"id":135732,"url":"https://patchwork.plctlab.org/api/1.2/patches/135732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816073227.934463-1-pan2.li@intel.com/","msgid":"<20230816073227.934463-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T07:32:27","name":"[v2] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816073227.934463-1-pan2.li@intel.com/mbox/"},{"id":135735,"url":"https://patchwork.plctlab.org/api/1.2/patches/135735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816081007.1211587-1-pan2.li@intel.com/","msgid":"<20230816081007.1211587-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T08:10:07","name":"[v2] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816081007.1211587-1-pan2.li@intel.com/mbox/"},{"id":135736,"url":"https://patchwork.plctlab.org/api/1.2/patches/135736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816084038.2725233-1-yanzhang.wang@intel.com/","msgid":"<20230816084038.2725233-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-08-16T08:40:38","name":"RISC-V: Support simplify (-1-x) for vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816084038.2725233-1-yanzhang.wang@intel.com/mbox/"},{"id":135739,"url":"https://patchwork.plctlab.org/api/1.2/patches/135739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816094359.2230366-1-pan2.li@intel.com/","msgid":"<20230816094359.2230366-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T09:43:59","name":"[v1] RISC-V: Fix one build error for template default arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816094359.2230366-1-pan2.li@intel.com/mbox/"},{"id":135765,"url":"https://patchwork.plctlab.org/api/1.2/patches/135765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816121909.53047-1-vultkayn@gcc.gnu.org/","msgid":"<20230816121909.53047-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-16T12:19:11","name":"[WIP,RFC,v2] analyzer: Add support of placement new and improved operator new [PR105948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816121909.53047-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135756,"url":"https://patchwork.plctlab.org/api/1.2/patches/135756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816125418.534962-1-pan2.li@intel.com/","msgid":"<20230816125418.534962-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T12:54:18","name":"[v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816125418.534962-1-pan2.li@intel.com/mbox/"},{"id":135758,"url":"https://patchwork.plctlab.org/api/1.2/patches/135758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816131205.233568-1-juzhe.zhong@rivai.ai/","msgid":"<20230816131205.233568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T13:12:05","name":"gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816131205.233568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135760,"url":"https://patchwork.plctlab.org/api/1.2/patches/135760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816132010.3628851-1-juzhe.zhong@rivai.ai/","msgid":"<20230816132010.3628851-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T13:20:10","name":"RISC-V: Add COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816132010.3628851-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135791,"url":"https://patchwork.plctlab.org/api/1.2/patches/135791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3fa64e0-bc2c-0c14-9062-d6f5c1690637@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T16:13:41","name":"[pushed,LRA] : Spill pseudos assigned to fp when fp->sp elimination became impossible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3fa64e0-bc2c-0c14-9062-d6f5c1690637@redhat.com/mbox/"},{"id":135793,"url":"https://patchwork.plctlab.org/api/1.2/patches/135793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816162354.658102-1-jwakely@redhat.com/","msgid":"<20230816162354.658102-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T16:23:45","name":"[committed] libstdc++: Fix comment naming upstream PSTL test file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816162354.658102-1-jwakely@redhat.com/mbox/"},{"id":135794,"url":"https://patchwork.plctlab.org/api/1.2/patches/135794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfS94kca5MUXS=DQaoLqeCsEY57bwo=JVz8wrn2sb4Z=Dg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T16:32:07","name":"libgccjit: Add support for `restrict` attribute on function parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfS94kca5MUXS=DQaoLqeCsEY57bwo=JVz8wrn2sb4Z=Dg@mail.gmail.com/mbox/"},{"id":135807,"url":"https://patchwork.plctlab.org/api/1.2/patches/135807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190338.709392-1-jwakely@redhat.com/","msgid":"<20230816190338.709392-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T19:03:17","name":"[committed] libstdc++: Update __cplusplus value for C++23 in version.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190338.709392-1-jwakely@redhat.com/mbox/"},{"id":135808,"url":"https://patchwork.plctlab.org/api/1.2/patches/135808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190453.709520-1-jwakely@redhat.com/","msgid":"<20230816190453.709520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T19:04:07","name":"[committed] libstdc++: Fix std::basic_string::resize_and_overwrite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190453.709520-1-jwakely@redhat.com/mbox/"},{"id":135809,"url":"https://patchwork.plctlab.org/api/1.2/patches/135809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf8ils0z.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-16T19:13:32","name":"build: Allow for Xcode 15 ld -v output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf8ils0z.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":135810,"url":"https://patchwork.plctlab.org/api/1.2/patches/135810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7j6lrpg.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-16T19:20:27","name":"fixincludes: Update darwin_flt_eval_method for macOS 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7j6lrpg.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":135817,"url":"https://patchwork.plctlab.org/api/1.2/patches/135817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0bfd1a02-eb97-4ceb-b34f-3f54b3c5cc2b-1692217001603@3c-app-gmx-bap14/","msgid":"","list_archive_url":null,"date":"2023-08-16T20:16:41","name":"[committed] Fortran: fix memleak for character,value dummy of bind(c) procedure [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0bfd1a02-eb97-4ceb-b34f-3f54b3c5cc2b-1692217001603@3c-app-gmx-bap14/mbox/"},{"id":135819,"url":"https://patchwork.plctlab.org/api/1.2/patches/135819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816202324.90806-1-slyich@gmail.com/","msgid":"<20230816202324.90806-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-08-16T20:23:24","name":"Drop unused enum vrp_mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816202324.90806-1-slyich@gmail.com/mbox/"},{"id":135830,"url":"https://patchwork.plctlab.org/api/1.2/patches/135830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816223513.3084770-1-apinski@marvell.com/","msgid":"<20230816223513.3084770-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-16T22:35:13","name":"Add libstdc++-v3/include/bits/version.h to gcc_update touch part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816223513.3084770-1-apinski@marvell.com/mbox/"},{"id":135835,"url":"https://patchwork.plctlab.org/api/1.2/patches/135835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816231403.321156-1-patrick@rivosinc.com/","msgid":"<20230816231403.321156-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-16T23:14:03","name":"RISC-V: Add rotate immediate regression test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816231403.321156-1-patrick@rivosinc.com/mbox/"},{"id":135836,"url":"https://patchwork.plctlab.org/api/1.2/patches/135836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com/","msgid":"<1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-17T00:19:21","name":"[ver,2] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com/mbox/"},{"id":135837,"url":"https://patchwork.plctlab.org/api/1.2/patches/135837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817011729.324315-1-patrick@rivosinc.com/","msgid":"<20230817011729.324315-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-17T01:17:29","name":"[v2] RISCV: Add rotate immediate regression test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817011729.324315-1-patrick@rivosinc.com/mbox/"},{"id":135838,"url":"https://patchwork.plctlab.org/api/1.2/patches/135838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817012302.2771487-1-pan2.li@intel.com/","msgid":"<20230817012302.2771487-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T01:23:02","name":"[v1] RISC-V: Support RVV VFNCVT.XU.F.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817012302.2771487-1-pan2.li@intel.com/mbox/"},{"id":135839,"url":"https://patchwork.plctlab.org/api/1.2/patches/135839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817013733.3093010-1-apinski@marvell.com/","msgid":"<20230817013733.3093010-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-17T01:37:33","name":"MATCH: Sink convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817013733.3093010-1-apinski@marvell.com/mbox/"},{"id":135840,"url":"https://patchwork.plctlab.org/api/1.2/patches/135840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817021815.3062069-1-pan2.li@intel.com/","msgid":"<20230817021815.3062069-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T02:18:15","name":"[v1] RISC-V: Support RVV VFNCVT.F.{X|XU|F}.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817021815.3062069-1-pan2.li@intel.com/mbox/"},{"id":135842,"url":"https://patchwork.plctlab.org/api/1.2/patches/135842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817030829.3352171-1-pan2.li@intel.com/","msgid":"<20230817030829.3352171-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T03:08:29","name":"[v1] RISC-V: Support RVV VFREDUSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817030829.3352171-1-pan2.li@intel.com/mbox/"},{"id":135847,"url":"https://patchwork.plctlab.org/api/1.2/patches/135847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817055906.2843802-1-juzhe.zhong@rivai.ai/","msgid":"<20230817055906.2843802-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-17T05:59:06","name":"RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817055906.2843802-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135848,"url":"https://patchwork.plctlab.org/api/1.2/patches/135848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com/","msgid":"<1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com>","list_archive_url":null,"date":"2023-08-17T06:14:56","name":"Makefile.in: Make TM_P_H depend on $(TREE_H) [PR111021]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com/mbox/"},{"id":135849,"url":"https://patchwork.plctlab.org/api/1.2/patches/135849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f30054-581d-826a-bcf4-021e2f0407b6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T06:22:26","name":"vect: Factor out the handling on scatter store having gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f30054-581d-826a-bcf4-021e2f0407b6@linux.ibm.com/mbox/"},{"id":135850,"url":"https://patchwork.plctlab.org/api/1.2/patches/135850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817062303.3727727-1-pan2.li@intel.com/","msgid":"<20230817062303.3727727-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T06:23:03","name":"[v1] RISC-V: Support RVV VFREDOSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817062303.3727727-1-pan2.li@intel.com/mbox/"},{"id":135853,"url":"https://patchwork.plctlab.org/api/1.2/patches/135853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-2-haochen.jiang@intel.com/","msgid":"<20230817065509.130068-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-17T06:55:08","name":"[1/2,1/2] Support AVX10.1 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-2-haochen.jiang@intel.com/mbox/"},{"id":135852,"url":"https://patchwork.plctlab.org/api/1.2/patches/135852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-3-haochen.jiang@intel.com/","msgid":"<20230817065509.130068-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-17T06:55:09","name":"[2/2,2/2] Support AVX10.1 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-3-haochen.jiang@intel.com/mbox/"},{"id":135854,"url":"https://patchwork.plctlab.org/api/1.2/patches/135854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072052.w62bmpzkxyktplnb@lug-owl.de/","msgid":"<20230817072052.w62bmpzkxyktplnb@lug-owl.de>","list_archive_url":null,"date":"2023-08-17T07:20:52","name":"Fix code_helper unused argument warning for fr30","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072052.w62bmpzkxyktplnb@lug-owl.de/mbox/"},{"id":135855,"url":"https://patchwork.plctlab.org/api/1.2/patches/135855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072612.4026035-1-pan2.li@intel.com/","msgid":"<20230817072612.4026035-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T07:26:12","name":"[v1] RISC-V: Support RVV VFWREDOSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072612.4026035-1-pan2.li@intel.com/mbox/"},{"id":135857,"url":"https://patchwork.plctlab.org/api/1.2/patches/135857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074625.868621-1-jwakely@redhat.com/","msgid":"<20230817074625.868621-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T07:45:05","name":"[committed] libstdc++: Fix testsuite no_pch directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074625.868621-1-jwakely@redhat.com/mbox/"},{"id":135858,"url":"https://patchwork.plctlab.org/api/1.2/patches/135858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074719.868714-1-jwakely@redhat.com/","msgid":"<20230817074719.868714-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T07:46:27","name":"[committed] libstdc++: Disable PCH for tests that rely on include order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074719.868714-1-jwakely@redhat.com/mbox/"},{"id":135859,"url":"https://patchwork.plctlab.org/api/1.2/patches/135859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817075655.165144-1-lehua.ding@rivai.ai/","msgid":"<20230817075655.165144-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T07:56:55","name":"RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817075655.165144-1-lehua.ding@rivai.ai/mbox/"},{"id":135861,"url":"https://patchwork.plctlab.org/api/1.2/patches/135861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817080558.117051-1-pan2.li@intel.com/","msgid":"<20230817080558.117051-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T08:05:58","name":"[v1] RISC-V: Support RVV VFWREDUSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817080558.117051-1-pan2.li@intel.com/mbox/"},{"id":135870,"url":"https://patchwork.plctlab.org/api/1.2/patches/135870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com/","msgid":"<3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com>","list_archive_url":null,"date":"2023-08-17T10:30:58","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com/mbox/"},{"id":135871,"url":"https://patchwork.plctlab.org/api/1.2/patches/135871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com/","msgid":"<949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com>","list_archive_url":null,"date":"2023-08-17T10:31:26","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com/mbox/"},{"id":135872,"url":"https://patchwork.plctlab.org/api/1.2/patches/135872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZN34fH4L2SfD5smj@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T10:37:48","name":"doc: Fixes to RTL-SSA sample code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZN34fH4L2SfD5smj@arm.com/mbox/"},{"id":135873,"url":"https://patchwork.plctlab.org/api/1.2/patches/135873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlee9j4hr.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T11:24:48","name":"c: Add support for [[__extension__ ...]]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlee9j4hr.fsf_-_@arm.com/mbox/"},{"id":135875,"url":"https://patchwork.plctlab.org/api/1.2/patches/135875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817114320.3083675-1-lehua.ding@rivai.ai/","msgid":"<20230817114320.3083675-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T11:43:20","name":"RISC-V: Fix XPASS slp testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817114320.3083675-1-lehua.ding@rivai.ai/mbox/"},{"id":135878,"url":"https://patchwork.plctlab.org/api/1.2/patches/135878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122131.966663-1-jwakely@redhat.com/","msgid":"<20230817122131.966663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T12:20:25","name":"[committed] libstdc++: Regenerate Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122131.966663-1-jwakely@redhat.com/mbox/"},{"id":135879,"url":"https://patchwork.plctlab.org/api/1.2/patches/135879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122226.966809-1-jwakely@redhat.com/","msgid":"<20230817122226.966809-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T12:21:50","name":"[committed] libstdc++: Fix std::format(\"{:F}\", inf) to use uppercase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122226.966809-1-jwakely@redhat.com/mbox/"},{"id":135881,"url":"https://patchwork.plctlab.org/api/1.2/patches/135881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122923.3114045-1-lehua.ding@rivai.ai/","msgid":"<20230817122923.3114045-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T12:29:23","name":"[V2] RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122923.3114045-1-lehua.ding@rivai.ai/mbox/"},{"id":135882,"url":"https://patchwork.plctlab.org/api/1.2/patches/135882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124123.22274-1-jose.marchesi@oracle.com/","msgid":"<20230817124123.22274-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-17T12:41:23","name":"[COMMITTED] bpf: support `naked'\'' function attributes in BPF targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124123.22274-1-jose.marchesi@oracle.com/mbox/"},{"id":135883,"url":"https://patchwork.plctlab.org/api/1.2/patches/135883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124354.3137796-1-lehua.ding@rivai.ai/","msgid":"<20230817124354.3137796-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T12:43:54","name":"[V2] RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin or zhinxmin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124354.3137796-1-lehua.ding@rivai.ai/mbox/"},{"id":135885,"url":"https://patchwork.plctlab.org/api/1.2/patches/135885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817132734.99FE23857016@sourceware.org/","msgid":"<20230817132734.99FE23857016@sourceware.org>","list_archive_url":null,"date":"2023-08-17T13:26:51","name":"tree-optimization/111039 - abnormals and bit test merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817132734.99FE23857016@sourceware.org/mbox/"},{"id":135889,"url":"https://patchwork.plctlab.org/api/1.2/patches/135889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com/","msgid":"<9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com>","list_archive_url":null,"date":"2023-08-17T13:32:37","name":"[committed] libgomp: call numa_available first when using libnuma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com/mbox/"},{"id":135892,"url":"https://patchwork.plctlab.org/api/1.2/patches/135892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817140513.26888-1-jose.marchesi@oracle.com/","msgid":"<20230817140513.26888-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-17T14:05:13","name":"[V4] Add warning options -W[no-]compare-distinct-pointer-types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817140513.26888-1-jose.marchesi@oracle.com/mbox/"},{"id":135912,"url":"https://patchwork.plctlab.org/api/1.2/patches/135912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com/","msgid":"<8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com>","list_archive_url":null,"date":"2023-08-17T16:02:23","name":"[pushed,LRA] : When assigning stack slots to pseudos previously assigned to fp consider other spilled pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com/mbox/"},{"id":135924,"url":"https://patchwork.plctlab.org/api/1.2/patches/135924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8da8804e-be70-a023-253c-317327ff955d@redhat.com/","msgid":"<8da8804e-be70-a023-253c-317327ff955d@redhat.com>","list_archive_url":null,"date":"2023-08-17T17:40:03","name":"[COMMITTED] PR tree-optimization/111009 - Fix range-ops operator_addr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8da8804e-be70-a023-253c-317327ff955d@redhat.com/mbox/"},{"id":135934,"url":"https://patchwork.plctlab.org/api/1.2/patches/135934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817181308.122802-2-ishitatsuyuki@gmail.com/","msgid":"<20230817181308.122802-2-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-08-17T18:12:51","name":"RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817181308.122802-2-ishitatsuyuki@gmail.com/mbox/"},{"id":136080,"url":"https://patchwork.plctlab.org/api/1.2/patches/136080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817184031.92165-1-egallager@gcc.gnu.org/","msgid":"<20230817184031.92165-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-17T18:40:32","name":"improve error when /usr/include isn'\''t found [PR90835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817184031.92165-1-egallager@gcc.gnu.org/mbox/"},{"id":136081,"url":"https://patchwork.plctlab.org/api/1.2/patches/136081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817185942.93988-1-egallager@gcc.gnu.org/","msgid":"<20230817185942.93988-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-17T18:59:43","name":"improve error when /usr/include isn'\''t found [PR90835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817185942.93988-1-egallager@gcc.gnu.org/mbox/"},{"id":135940,"url":"https://patchwork.plctlab.org/api/1.2/patches/135940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817192554.3137209-1-apinski@marvell.com/","msgid":"<20230817192554.3137209-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-17T19:25:54","name":"Document cond_neg, cond_one_cmpl, cond_len_neg and cond_len_one_cmpl standard patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817192554.3137209-1-apinski@marvell.com/mbox/"},{"id":135941,"url":"https://patchwork.plctlab.org/api/1.2/patches/135941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203052.1131293-1-jwakely@redhat.com/","msgid":"<20230817203052.1131293-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:30:31","name":"[committed] libstdc++: Define std::string::resize_and_overwrite for C++11 and COW string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203052.1131293-1-jwakely@redhat.com/mbox/"},{"id":135942,"url":"https://patchwork.plctlab.org/api/1.2/patches/135942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203100.1131311-1-jwakely@redhat.com/","msgid":"<20230817203100.1131311-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:30:53","name":"[committed] libstdc++: Optimize std::to_string using std::string::resize_and_overwrite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203100.1131311-1-jwakely@redhat.com/mbox/"},{"id":135944,"url":"https://patchwork.plctlab.org/api/1.2/patches/135944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203107.1131333-1-jwakely@redhat.com/","msgid":"<20230817203107.1131333-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:01","name":"[committed] libstdc++: Implement std::to_string in terms of std::format (P2587R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203107.1131333-1-jwakely@redhat.com/mbox/"},{"id":135946,"url":"https://patchwork.plctlab.org/api/1.2/patches/135946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203118.1131359-1-jwakely@redhat.com/","msgid":"<20230817203118.1131359-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:08","name":"[committed] libstdc++: Rework std::format support for wchar_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203118.1131359-1-jwakely@redhat.com/mbox/"},{"id":135947,"url":"https://patchwork.plctlab.org/api/1.2/patches/135947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203136.1131390-1-jwakely@redhat.com/","msgid":"<20230817203136.1131390-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:19","name":"[committed] libstdc++: Simplify chrono::__units_suffix using std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203136.1131390-1-jwakely@redhat.com/mbox/"},{"id":135949,"url":"https://patchwork.plctlab.org/api/1.2/patches/135949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203151.1131407-1-jwakely@redhat.com/","msgid":"<20230817203151.1131407-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:37","name":"[committed] libstdc++: Make __cmp_cat::__unseq constructor consteval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203151.1131407-1-jwakely@redhat.com/mbox/"},{"id":135943,"url":"https://patchwork.plctlab.org/api/1.2/patches/135943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203200.1131474-1-jwakely@redhat.com/","msgid":"<20230817203200.1131474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:52","name":"[committed] libstdc++: Fix -Wunused-parameter in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203200.1131474-1-jwakely@redhat.com/mbox/"},{"id":135951,"url":"https://patchwork.plctlab.org/api/1.2/patches/135951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203213.1131496-1-jwakely@redhat.com/","msgid":"<20230817203213.1131496-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:01","name":"[committed] libstdc++: Define std::numeric_limits<_FloatNN> before C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203213.1131496-1-jwakely@redhat.com/mbox/"},{"id":135952,"url":"https://patchwork.plctlab.org/api/1.2/patches/135952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203218.1131547-1-jwakely@redhat.com/","msgid":"<20230817203218.1131547-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:14","name":"[committed] libstdc++: Add std::formatter specializations for extended float types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203218.1131547-1-jwakely@redhat.com/mbox/"},{"id":135945,"url":"https://patchwork.plctlab.org/api/1.2/patches/135945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203223.1131562-1-jwakely@redhat.com/","msgid":"<20230817203223.1131562-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:19","name":"[committed] libstdc++: Optimize std::string::assign(Iter, Iter) [PR110945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203223.1131562-1-jwakely@redhat.com/mbox/"},{"id":135948,"url":"https://patchwork.plctlab.org/api/1.2/patches/135948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203228.1131577-1-jwakely@redhat.com/","msgid":"<20230817203228.1131577-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:24","name":"[committed] libstdc++: Micro-optimize construction of named std::locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203228.1131577-1-jwakely@redhat.com/mbox/"},{"id":135950,"url":"https://patchwork.plctlab.org/api/1.2/patches/135950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203237.1131595-1-jwakely@redhat.com/","msgid":"<20230817203237.1131595-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:29","name":"[committed] libstdc++: Reuse double overload of __convert_to_v if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203237.1131595-1-jwakely@redhat.com/mbox/"},{"id":135962,"url":"https://patchwork.plctlab.org/api/1.2/patches/135962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817232843.1231279-1-jwakely@redhat.com/","msgid":"<20230817232843.1231279-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T23:28:10","name":"[committed] libstdc++: Replace global std::string objects in tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817232843.1231279-1-jwakely@redhat.com/mbox/"},{"id":135969,"url":"https://patchwork.plctlab.org/api/1.2/patches/135969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818023050.98368-1-thiago.bauermann@linaro.org/","msgid":"<20230818023050.98368-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-18T02:30:50","name":"testsuite: Improve test in dg-require-python-h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818023050.98368-1-thiago.bauermann@linaro.org/mbox/"},{"id":135971,"url":"https://patchwork.plctlab.org/api/1.2/patches/135971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025355.3280223-1-pan2.li@intel.com/","msgid":"<20230818025355.3280223-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-18T02:53:55","name":"[v1] RISC-V: Refactor RVV class by frm_op_type template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025355.3280223-1-pan2.li@intel.com/mbox/"},{"id":135972,"url":"https://patchwork.plctlab.org/api/1.2/patches/135972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025911.1281907-1-lehua.ding@rivai.ai/","msgid":"<20230818025911.1281907-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-18T02:59:11","name":"RISC-V: Fix -march error of zhinxmin testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025911.1281907-1-lehua.ding@rivai.ai/mbox/"},{"id":135975,"url":"https://patchwork.plctlab.org/api/1.2/patches/135975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818031818.2161842-1-lipeng.zhu@intel.com/","msgid":"<20230818031818.2161842-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-08-18T03:18:19","name":"[v6] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818031818.2161842-1-lipeng.zhu@intel.com/mbox/"},{"id":135977,"url":"https://patchwork.plctlab.org/api/1.2/patches/135977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com/","msgid":"<6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-18T03:52:09","name":"[1/2] RISC-V: Add quotes to #error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135978,"url":"https://patchwork.plctlab.org/api/1.2/patches/135978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a6e92e0a6293380c619392be305ab2d5d0108d.1692330726.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T03:52:10","name":"[2/2] RISC-V: Add quotes to #error messages (all)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a6e92e0a6293380c619392be305ab2d5d0108d.1692330726.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135984,"url":"https://patchwork.plctlab.org/api/1.2/patches/135984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818060131.1416714-1-haochen.jiang@intel.com/","msgid":"<20230818060131.1416714-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-18T06:01:31","name":"i386: Add AVX2 pragma wrapper for AVX512DQVL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818060131.1416714-1-haochen.jiang@intel.com/mbox/"},{"id":135985,"url":"https://patchwork.plctlab.org/api/1.2/patches/135985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818064249.2103051-1-hongtao.liu@intel.com/","msgid":"<20230818064249.2103051-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-18T06:42:49","name":"Support -march=gracemont","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818064249.2103051-1-hongtao.liu@intel.com/mbox/"},{"id":135988,"url":"https://patchwork.plctlab.org/api/1.2/patches/135988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074607.14799138F0@imap2.suse-dmz.suse.de/","msgid":"<20230818074607.14799138F0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-18T07:46:06","name":"tree-optimization/111048 - avoid flawed logic in fold_vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074607.14799138F0@imap2.suse-dmz.suse.de/mbox/"},{"id":135989,"url":"https://patchwork.plctlab.org/api/1.2/patches/135989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074943.41754-1-manos.anagnostakis@vrull.eu/","msgid":"<20230818074943.41754-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-08-18T07:49:43","name":"aarch64: Fine-grained ldp and stp policies with test-cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074943.41754-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":135993,"url":"https://patchwork.plctlab.org/api/1.2/patches/135993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818084437.1297460-1-jwakely@redhat.com/","msgid":"<20230818084437.1297460-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T08:44:16","name":"[committed] libstdc++: Fix incomplete rework of wchar_t support in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818084437.1297460-1-jwakely@redhat.com/mbox/"},{"id":136013,"url":"https://patchwork.plctlab.org/api/1.2/patches/136013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818113147.1360843-1-jwakely@redhat.com/","msgid":"<20230818113147.1360843-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T11:31:15","name":"[committed] libstdc++: Replace non-type-dependent uses of wchar_t in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818113147.1360843-1-jwakely@redhat.com/mbox/"},{"id":136014,"url":"https://patchwork.plctlab.org/api/1.2/patches/136014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818120755.28912-1-jose.marchesi@oracle.com/","msgid":"<20230818120755.28912-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-18T12:07:55","name":"[COMMITTED] bpf: bump maximum frame size limit to 32767 bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818120755.28912-1-jose.marchesi@oracle.com/mbox/"},{"id":136015,"url":"https://patchwork.plctlab.org/api/1.2/patches/136015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818130433.D4E24138F0@imap2.suse-dmz.suse.de/","msgid":"<20230818130433.D4E24138F0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-18T13:04:33","name":"tree-optimization/111019 - invariant motion and aliasing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818130433.D4E24138F0@imap2.suse-dmz.suse.de/mbox/"},{"id":136019,"url":"https://patchwork.plctlab.org/api/1.2/patches/136019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818135351.9177-1-jose.marchesi@oracle.com/","msgid":"<20230818135351.9177-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-18T13:53:51","name":"Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818135351.9177-1-jose.marchesi@oracle.com/mbox/"},{"id":136021,"url":"https://patchwork.plctlab.org/api/1.2/patches/136021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com/","msgid":"<6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com>","list_archive_url":null,"date":"2023-08-18T13:57:16","name":"RISC-V: Enable pressure-aware scheduling by default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com/mbox/"},{"id":136029,"url":"https://patchwork.plctlab.org/api/1.2/patches/136029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818154030.64004-1-aldyh@redhat.com/","msgid":"<20230818154030.64004-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-18T15:40:11","name":"[COMMITTED,irange] Return FALSE if updated bitmask is unchanged [PR110753]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818154030.64004-1-aldyh@redhat.com/mbox/"},{"id":136044,"url":"https://patchwork.plctlab.org/api/1.2/patches/136044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YnMqdb3uQD=FxmxNwfmdc6BxAU7F7ro7tS3vF-=Hs6sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T17:12:42","name":"[committed] : i386: Use PUNPCKL?? to implement vector extend and zero_extend for TARGET_SSE2 [PR111023]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YnMqdb3uQD=FxmxNwfmdc6BxAU7F7ro7tS3vF-=Hs6sw@mail.gmail.com/mbox/"},{"id":136045,"url":"https://patchwork.plctlab.org/api/1.2/patches/136045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07c94dde-f513-0177-51d7-05267694f383@codesourcery.com/","msgid":"<07c94dde-f513-0177-51d7-05267694f383@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:15:16","name":"omp-expand.cc: Fix wrong code with non-rectangular loop nest [PR111017]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07c94dde-f513-0177-51d7-05267694f383@codesourcery.com/mbox/"},{"id":136046,"url":"https://patchwork.plctlab.org/api/1.2/patches/136046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-2-sandra@codesourcery.com/","msgid":"<20230818173938.430758-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:35","name":"[OG13,committed,1/3] OpenMP: C++ attribute syntax fixes/testcases for \"metadirective\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-2-sandra@codesourcery.com/mbox/"},{"id":136048,"url":"https://patchwork.plctlab.org/api/1.2/patches/136048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-3-sandra@codesourcery.com/","msgid":"<20230818173938.430758-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:36","name":"[OG13,committed,2/3] OpenMP: C++ attribute syntax fixes/testcases for \"declare mapper\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-3-sandra@codesourcery.com/mbox/"},{"id":136047,"url":"https://patchwork.plctlab.org/api/1.2/patches/136047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-4-sandra@codesourcery.com/","msgid":"<20230818173938.430758-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:37","name":"[OG13,committed,3/3] OpenMP: C++ attribute syntax fixes/testcases for loop transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-4-sandra@codesourcery.com/mbox/"},{"id":136054,"url":"https://patchwork.plctlab.org/api/1.2/patches/136054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T19:32:03","name":"RISC-V/testsuite: Add missing conversion tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"},{"id":136055,"url":"https://patchwork.plctlab.org/api/1.2/patches/136055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com/","msgid":"<9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com>","list_archive_url":null,"date":"2023-08-18T19:37:06","name":"RISC-V: Allow immediates 17-31 for vector shift.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com/mbox/"},{"id":136063,"url":"https://patchwork.plctlab.org/api/1.2/patches/136063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edk05b4a.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-18T20:49:57","name":"ipa-sra: Allow IPA-SRA in presence of returns which will be removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edk05b4a.fsf@suse.cz/mbox/"},{"id":136071,"url":"https://patchwork.plctlab.org/api/1.2/patches/136071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com/","msgid":"<5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T22:47:47","name":"[v7,1/5] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136073,"url":"https://patchwork.plctlab.org/api/1.2/patches/136073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b96ae3b68fdc935bfd37f8343ba57e7058126c5d.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:48","name":"[v7,2/5] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b96ae3b68fdc935bfd37f8343ba57e7058126c5d.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136075,"url":"https://patchwork.plctlab.org/api/1.2/patches/136075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af21c299f712718395612cd364f401bc0fd08416.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:49","name":"[v7,3/5] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af21c299f712718395612cd364f401bc0fd08416.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136074,"url":"https://patchwork.plctlab.org/api/1.2/patches/136074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com/","msgid":"<81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T22:47:50","name":"[v7,4/5] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136072,"url":"https://patchwork.plctlab.org/api/1.2/patches/136072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b32f791688b577bf57cefb38ad16594d17975c6c.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:51","name":"[v7,5/5] OpenMP/OpenACC: Reorganise OMP map clause handling in gimplify.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b32f791688b577bf57cefb38ad16594d17975c6c.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136076,"url":"https://patchwork.plctlab.org/api/1.2/patches/136076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818225026.1399063-1-jwakely@redhat.com/","msgid":"<20230818225026.1399063-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T22:49:56","name":"[committed] libstdc++: Revert pre-C++23 support for 16-bit float types [PR111060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818225026.1399063-1-jwakely@redhat.com/mbox/"},{"id":136083,"url":"https://patchwork.plctlab.org/api/1.2/patches/136083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f08933c-d988-c806-6a75-c8a12574c268@iki.fi/","msgid":"<8f08933c-d988-c806-6a75-c8a12574c268@iki.fi>","list_archive_url":null,"date":"2023-08-19T08:01:18","name":"[Ada] Fix syntax errors in expect.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f08933c-d988-c806-6a75-c8a12574c268@iki.fi/mbox/"},{"id":136122,"url":"https://patchwork.plctlab.org/api/1.2/patches/136122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB650764FB1A89623419FE5833BB18A@DB9PR08MB6507.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-19T11:42:10","name":"[PING] arm: Remove unsigned variant of vcaddq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB650764FB1A89623419FE5833BB18A@DB9PR08MB6507.eurprd08.prod.outlook.com/mbox/"},{"id":136234,"url":"https://patchwork.plctlab.org/api/1.2/patches/136234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820072526.3283744-1-apinski@marvell.com/","msgid":"<20230820072526.3283744-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-20T07:25:26","name":"[PATCHv2/COMMITTED] MATCH: Sink convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820072526.3283744-1-apinski@marvell.com/mbox/"},{"id":136235,"url":"https://patchwork.plctlab.org/api/1.2/patches/136235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4a132c6ba0ae8f1b670ef83f42bd8f3983577d9.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-20T07:26:26","name":"[committed] fix misleading identation breaking bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4a132c6ba0ae8f1b670ef83f42bd8f3983577d9.camel@tugraz.at/mbox/"},{"id":136242,"url":"https://patchwork.plctlab.org/api/1.2/patches/136242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820092054.380256-1-ibuclaw@gdcproject.org/","msgid":"<20230820092054.380256-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-08-20T09:20:54","name":"[committed] d: Merge upstream dmd, druntime 26f049fb26, phobos 330d6a4fd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820092054.380256-1-ibuclaw@gdcproject.org/mbox/"},{"id":136273,"url":"https://patchwork.plctlab.org/api/1.2/patches/136273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-20T15:57:29","name":"[committed] i386: Micro-optimize ix86_expand_sse_extend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com/mbox/"},{"id":136302,"url":"https://patchwork.plctlab.org/api/1.2/patches/136302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010326.395043-1-juzhe.zhong@rivai.ai/","msgid":"<20230821010326.395043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:03:26","name":"RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010326.395043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136303,"url":"https://patchwork.plctlab.org/api/1.2/patches/136303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010453.3916192-1-juzhe.zhong@rivai.ai/","msgid":"<20230821010453.3916192-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:04:53","name":"LCM: Export 2 helpful functions as global for VSETVL PASS use in RISC-V backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010453.3916192-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136304,"url":"https://patchwork.plctlab.org/api/1.2/patches/136304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821011854.33004-1-yangyujie@loongson.cn/","msgid":"<20230821011854.33004-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-21T01:18:54","name":"LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821011854.33004-1-yangyujie@loongson.cn/mbox/"},{"id":136310,"url":"https://patchwork.plctlab.org/api/1.2/patches/136310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821015951.399184-1-juzhe.zhong@rivai.ai/","msgid":"<20230821015951.399184-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:59:51","name":"RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821015951.399184-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136311,"url":"https://patchwork.plctlab.org/api/1.2/patches/136311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821021005.3798870-1-hongtao.liu@intel.com/","msgid":"<20230821021005.3798870-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-21T02:10:05","name":"Mention Intel -march=gracemont for Alderlake-N.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821021005.3798870-1-hongtao.liu@intel.com/mbox/"},{"id":136313,"url":"https://patchwork.plctlab.org/api/1.2/patches/136313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821032123.3332286-1-apinski@marvell.com/","msgid":"<20230821032123.3332286-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-21T03:21:23","name":"MATCH: [PR111002] Sink view_convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821032123.3332286-1-apinski@marvell.com/mbox/"},{"id":136334,"url":"https://patchwork.plctlab.org/api/1.2/patches/136334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com/","msgid":"<2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:44:03","name":"[PING^2,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com/mbox/"},{"id":136335,"url":"https://patchwork.plctlab.org/api/1.2/patches/136335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com/","msgid":"<8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:45:19","name":"[PING^4,3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com/mbox/"},{"id":136336,"url":"https://patchwork.plctlab.org/api/1.2/patches/136336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com/","msgid":"<9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:46:44","name":"[PING^4] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com/mbox/"},{"id":136340,"url":"https://patchwork.plctlab.org/api/1.2/patches/136340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821072627.3984748-1-pan2.li@intel.com/","msgid":"<20230821072627.3984748-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-21T07:26:27","name":"[v1] Mode-Switching: Add optional EMIT_AFTER hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821072627.3984748-1-pan2.li@intel.com/mbox/"},{"id":136349,"url":"https://patchwork.plctlab.org/api/1.2/patches/136349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821080920.40614385B800@sourceware.org/","msgid":"<20230821080920.40614385B800@sourceware.org>","list_archive_url":null,"date":"2023-08-21T08:08:36","name":"tree-optimization/111070 - fix ICE with recent ifcombine fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821080920.40614385B800@sourceware.org/mbox/"},{"id":136353,"url":"https://patchwork.plctlab.org/api/1.2/patches/136353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821091227.0E895385773C@sourceware.org/","msgid":"<20230821091227.0E895385773C@sourceware.org>","list_archive_url":null,"date":"2023-08-21T09:11:29","name":"debug/111080 - avoid outputting debug info for unused restrict qualified type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821091227.0E895385773C@sourceware.org/mbox/"},{"id":136357,"url":"https://patchwork.plctlab.org/api/1.2/patches/136357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094701.1548195-1-jwakely@redhat.com/","msgid":"<20230821094701.1548195-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-21T09:46:11","name":"[committed] libstdc++: Remove reliance on unspecified behaviour in std::rethrow_if_nested test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094701.1548195-1-jwakely@redhat.com/mbox/"},{"id":136358,"url":"https://patchwork.plctlab.org/api/1.2/patches/136358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094834.34B663836E92@sourceware.org/","msgid":"<20230821094834.34B663836E92@sourceware.org>","list_archive_url":null,"date":"2023-08-21T09:47:49","name":"tree-optimization/111082 - bogus promoted min","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094834.34B663836E92@sourceware.org/mbox/"},{"id":136362,"url":"https://patchwork.plctlab.org/api/1.2/patches/136362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821095913.1629336-1-hongtao.liu@intel.com/","msgid":"<20230821095913.1629336-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-21T09:59:13","name":"Adjust testcase for Intel GDS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821095913.1629336-1-hongtao.liu@intel.com/mbox/"},{"id":136365,"url":"https://patchwork.plctlab.org/api/1.2/patches/136365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com/","msgid":"<448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-08-21T10:32:06","name":"rs6000: Disable PCREL for unsupported targets [PR111045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com/mbox/"},{"id":136372,"url":"https://patchwork.plctlab.org/api/1.2/patches/136372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821105955.3471098-1-juzhe.zhong@rivai.ai/","msgid":"<20230821105955.3471098-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T10:59:55","name":"[V5] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821105955.3471098-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136374,"url":"https://patchwork.plctlab.org/api/1.2/patches/136374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821111301.4696A385B531@sourceware.org/","msgid":"<20230821111301.4696A385B531@sourceware.org>","list_archive_url":null,"date":"2023-08-21T11:12:15","name":"Fix gcc.dg/vect/bb-slp-46.c FAIL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821111301.4696A385B531@sourceware.org/mbox/"},{"id":136380,"url":"https://patchwork.plctlab.org/api/1.2/patches/136380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821115939.C86BE3857722@sourceware.org/","msgid":"<20230821115939.C86BE3857722@sourceware.org>","list_archive_url":null,"date":"2023-08-21T11:58:54","name":"Fix gcc.dg/vect/bb-slp-subgroups-2.c with 256bit vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821115939.C86BE3857722@sourceware.org/mbox/"},{"id":136386,"url":"https://patchwork.plctlab.org/api/1.2/patches/136386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821122540.496C5385B800@sourceware.org/","msgid":"<20230821122540.496C5385B800@sourceware.org>","list_archive_url":null,"date":"2023-08-21T12:24:55","name":"Fix FAIL: gcc.target/i386/pr87007-5.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821122540.496C5385B800@sourceware.org/mbox/"},{"id":136396,"url":"https://patchwork.plctlab.org/api/1.2/patches/136396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821134653.97329-1-aldyh@redhat.com/","msgid":"<20230821134653.97329-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-21T13:46:49","name":"[COMMITTED,frange] Return false if nothing changed in union_nans().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821134653.97329-1-aldyh@redhat.com/mbox/"},{"id":136408,"url":"https://patchwork.plctlab.org/api/1.2/patches/136408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155610.2553-2-stefansf@linux.ibm.com/","msgid":"<20230821155610.2553-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T15:56:11","name":"s390: Fix builtins vec_rli and verll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155610.2553-2-stefansf@linux.ibm.com/mbox/"},{"id":136407,"url":"https://patchwork.plctlab.org/api/1.2/patches/136407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155839.2680-2-stefansf@linux.ibm.com/","msgid":"<20230821155839.2680-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T15:58:40","name":"s390: Fix some builtin definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155839.2680-2-stefansf@linux.ibm.com/mbox/"},{"id":136410,"url":"https://patchwork.plctlab.org/api/1.2/patches/136410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821163852.988058-1-ewlu@rivosinc.com/","msgid":"<20230821163852.988058-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-21T16:37:40","name":"RISC-V: Add Types to Missing Bitmanip Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821163852.988058-1-ewlu@rivosinc.com/mbox/"},{"id":136411,"url":"https://patchwork.plctlab.org/api/1.2/patches/136411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821165230.989216-1-ewlu@rivosinc.com/","msgid":"<20230821165230.989216-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-21T16:51:58","name":"RISC-V: Add Types to Un-Typed Sync Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821165230.989216-1-ewlu@rivosinc.com/mbox/"},{"id":136414,"url":"https://patchwork.plctlab.org/api/1.2/patches/136414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com/","msgid":"<70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com>","list_archive_url":null,"date":"2023-08-21T17:04:15","name":"Fix tests sensitive to internal library allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com/mbox/"},{"id":136416,"url":"https://patchwork.plctlab.org/api/1.2/patches/136416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com/","msgid":"<0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com>","list_archive_url":null,"date":"2023-08-21T17:25:48","name":"[RISCV,committed] Remove spurious newline in ztso sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com/mbox/"},{"id":136419,"url":"https://patchwork.plctlab.org/api/1.2/patches/136419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821180718.20489-1-jose.marchesi@oracle.com/","msgid":"<20230821180718.20489-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-21T18:07:18","name":"[V2] Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821180718.20489-1-jose.marchesi@oracle.com/mbox/"},{"id":136422,"url":"https://patchwork.plctlab.org/api/1.2/patches/136422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-465e9c23-c45c-40b4-b023-d80400782239-1692647313365@3c-app-gmx-bs15/","msgid":"","list_archive_url":null,"date":"2023-08-21T19:48:33","name":"Fortran: implement vector sections in DATA statements [PR49588]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-465e9c23-c45c-40b4-b023-d80400782239-1692647313365@3c-app-gmx-bs15/mbox/"},{"id":136426,"url":"https://patchwork.plctlab.org/api/1.2/patches/136426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa9724f1b198f6416bb8e05966f57b0742201b73.1692650021.git.mirai@makinata.eu/","msgid":"","list_archive_url":null,"date":"2023-08-21T20:34:02","name":"[1/2] libstdc++: Fix '\''doc-install-info'\'' rule.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa9724f1b198f6416bb8e05966f57b0742201b73.1692650021.git.mirai@makinata.eu/mbox/"},{"id":136425,"url":"https://patchwork.plctlab.org/api/1.2/patches/136425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu/","msgid":"<450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu>","list_archive_url":null,"date":"2023-08-21T20:34:03","name":"[2/2] libstdc++: Update docbook xsl URI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu/mbox/"},{"id":136427,"url":"https://patchwork.plctlab.org/api/1.2/patches/136427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821210347.19947-1-david.faust@oracle.com/","msgid":"<20230821210347.19947-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-21T21:03:47","name":"bpf: neg instruction does not accept an immediate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821210347.19947-1-david.faust@oracle.com/mbox/"},{"id":136434,"url":"https://patchwork.plctlab.org/api/1.2/patches/136434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-1-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:22","name":"[pushed,1/6] analyzer: convert note_adding_context to annotating_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-1-dmalcolm@redhat.com/mbox/"},{"id":136437,"url":"https://patchwork.plctlab.org/api/1.2/patches/136437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-2-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:23","name":"[pushed,2/6] analyzer: add ability for context to add events to a saved_diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-2-dmalcolm@redhat.com/mbox/"},{"id":136435,"url":"https://patchwork.plctlab.org/api/1.2/patches/136435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-3-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:24","name":"[pushed,3/6] analyzer: handle NULL inner context in region_model_context_decorator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-3-dmalcolm@redhat.com/mbox/"},{"id":136438,"url":"https://patchwork.plctlab.org/api/1.2/patches/136438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-4-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:25","name":"[pushed,4/6] analyzer: replace -Wanalyzer-unterminated-string with scan_for_null_terminator [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-4-dmalcolm@redhat.com/mbox/"},{"id":136436,"url":"https://patchwork.plctlab.org/api/1.2/patches/136436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-5-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:26","name":"[pushed,5/6] analyzer: add kf_fopen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-5-dmalcolm@redhat.com/mbox/"},{"id":136439,"url":"https://patchwork.plctlab.org/api/1.2/patches/136439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-6-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:27","name":"[pushed,6/6] analyzer: check format strings for null termination [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-6-dmalcolm@redhat.com/mbox/"},{"id":136440,"url":"https://patchwork.plctlab.org/api/1.2/patches/136440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015139.1920183-1-ppalka@redhat.com/","msgid":"<20230822015139.1920183-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:51:38","name":"c++: refine CWG 2369 satisfaction vs non-dep convs [PR99599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015139.1920183-1-ppalka@redhat.com/mbox/"},{"id":136442,"url":"https://patchwork.plctlab.org/api/1.2/patches/136442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015834.3540320-1-juzhe.zhong@rivai.ai/","msgid":"<20230822015834.3540320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T01:58:34","name":"[V2] gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015834.3540320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136444,"url":"https://patchwork.plctlab.org/api/1.2/patches/136444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822022935.9877-1-xuli1@eswincomputing.com/","msgid":"<20230822022935.9877-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-08-22T02:29:35","name":"RISCV: Fix PR111074 [GCC13 BUG]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822022935.9877-1-xuli1@eswincomputing.com/mbox/"},{"id":136446,"url":"https://patchwork.plctlab.org/api/1.2/patches/136446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822025758.769581-1-hongtao.liu@intel.com/","msgid":"<20230822025758.769581-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-22T02:57:58","name":"[x86] Testcase fix.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822025758.769581-1-hongtao.liu@intel.com/mbox/"},{"id":136447,"url":"https://patchwork.plctlab.org/api/1.2/patches/136447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822030215.3566313-1-lehua.ding@rivai.ai/","msgid":"<20230822030215.3566313-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-22T03:02:15","name":"RISC-V: Change fnms testcases assertion to xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822030215.3566313-1-lehua.ding@rivai.ai/mbox/"},{"id":136451,"url":"https://patchwork.plctlab.org/api/1.2/patches/136451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822041924.1861884-1-pan2.li@intel.com/","msgid":"<20230822041924.1861884-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-22T04:19:24","name":"[v2] RISC-V: Refactor RVV class by frm_op_type template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822041924.1861884-1-pan2.li@intel.com/mbox/"},{"id":136455,"url":"https://patchwork.plctlab.org/api/1.2/patches/136455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822054128.1401166-1-lehua.ding@rivai.ai/","msgid":"<20230822054128.1401166-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-22T05:41:28","name":"RISC-V: Add conditional unary neg/abs/not autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822054128.1401166-1-lehua.ding@rivai.ai/mbox/"},{"id":136456,"url":"https://patchwork.plctlab.org/api/1.2/patches/136456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff3f47e9-ede7-edfe-c19e-ef5137f760f8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T06:28:54","name":"[PATCHv2,rs6000] Extract the element in dword0 by mfvsrd and shift/mask [PR110331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff3f47e9-ede7-edfe-c19e-ef5137f760f8@linux.ibm.com/mbox/"},{"id":136460,"url":"https://patchwork.plctlab.org/api/1.2/patches/136460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORmH6QZK45sD1b/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T07:39:11","name":"c++: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORmH6QZK45sD1b/@tucnak/mbox/"},{"id":136467,"url":"https://patchwork.plctlab.org/api/1.2/patches/136467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORuAJTB6/kkyFGG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T08:12:48","name":"c++: Fix up mangling of function/block scope static structured bindings [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORuAJTB6/kkyFGG@tucnak/mbox/"},{"id":136468,"url":"https://patchwork.plctlab.org/api/1.2/patches/136468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORukwAR0INoKBYP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T08:15:15","name":"doc: Remove obsolete sentence about _Float* not being supported in C++ [PR106652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORukwAR0INoKBYP@tucnak/mbox/"},{"id":136471,"url":"https://patchwork.plctlab.org/api/1.2/patches/136471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com/","msgid":"<31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:44:03","name":"vect: Replace DR_GROUP_STORE_COUNT with DR_GROUP_LAST_ELEMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com/mbox/"},{"id":136472,"url":"https://patchwork.plctlab.org/api/1.2/patches/136472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com/","msgid":"<8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:45:28","name":"[1/3] vect: Remove some manual release in vectorizable_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com/mbox/"},{"id":136474,"url":"https://patchwork.plctlab.org/api/1.2/patches/136474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com/","msgid":"<8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:49:33","name":"[2/3] vect: Move VMAT_LOAD_STORE_LANES handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com/mbox/"},{"id":136475,"url":"https://patchwork.plctlab.org/api/1.2/patches/136475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com/","msgid":"<1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:52:41","name":"[3/3] vect: Move VMAT_GATHER_SCATTER handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com/mbox/"},{"id":136480,"url":"https://patchwork.plctlab.org/api/1.2/patches/136480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822090549.703E9385C6E9@sourceware.org/","msgid":"<20230822090549.703E9385C6E9@sourceware.org>","list_archive_url":null,"date":"2023-08-22T09:05:00","name":"tree-optimization/94864 - vector insert of vector extract simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822090549.703E9385C6E9@sourceware.org/mbox/"},{"id":136486,"url":"https://patchwork.plctlab.org/api/1.2/patches/136486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com/","msgid":"<8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com>","list_archive_url":null,"date":"2023-08-22T09:54:14","name":"OpenMP: Handle '\''all'\'' as category in defaultmap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com/mbox/"},{"id":136495,"url":"https://patchwork.plctlab.org/api/1.2/patches/136495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com/","msgid":"<27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com>","list_archive_url":null,"date":"2023-08-22T10:16:48","name":"libgomp.c/simd-math-1.c: Test scalb{, l}n{, f} and un-XFAIL for non-nvptx/amdgcn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com/mbox/"},{"id":136500,"url":"https://patchwork.plctlab.org/api/1.2/patches/136500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:12","name":"[01/11] aarch64: AARCH64_ISA_RCPC was defined twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136505,"url":"https://patchwork.plctlab.org/api/1.2/patches/136505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:20","name":"[02/11] Handle epilogues that contain jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136504,"url":"https://patchwork.plctlab.org/api/1.2/patches/136504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:27","name":"[03/11] aarch64: Use br instead of ret for eh_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136507,"url":"https://patchwork.plctlab.org/api/1.2/patches/136507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:35","name":"[04/11] aarch64: Do not force a stack frame for EH returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136509,"url":"https://patchwork.plctlab.org/api/1.2/patches/136509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6b7c47f58a448c09714dd397ec103c3b48b8ec3.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:42","name":"[05/11] aarch64: Add eh_return compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6b7c47f58a448c09714dd397ec103c3b48b8ec3.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136501,"url":"https://patchwork.plctlab.org/api/1.2/patches/136501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9a619fcadf6e05dda1b92e83da0eb91cffb12a2.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:49","name":"[06/11] aarch64: Fix pac-ret eh_return tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9a619fcadf6e05dda1b92e83da0eb91cffb12a2.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136502,"url":"https://patchwork.plctlab.org/api/1.2/patches/136502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8186167e2c5002b818172dfb3a593c1fdd99630.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:55","name":"[07/11] aarch64: Disable branch-protection for pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8186167e2c5002b818172dfb3a593c1fdd99630.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136503,"url":"https://patchwork.plctlab.org/api/1.2/patches/136503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:03","name":"[08/11] aarch64,arm: Remove accepted_branch_protection_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136506,"url":"https://patchwork.plctlab.org/api/1.2/patches/136506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:10","name":"[09/11] aarch64,arm: Fix branch-protection= parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136508,"url":"https://patchwork.plctlab.org/api/1.2/patches/136508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:17","name":"[10/11] aarch64: Fix branch-protection error message tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136510,"url":"https://patchwork.plctlab.org/api/1.2/patches/136510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a60da3d8be440de0fe327310c61e004f2263c38f.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:39:24","name":"[11/11] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a60da3d8be440de0fe327310c61e004f2263c38f.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136511,"url":"https://patchwork.plctlab.org/api/1.2/patches/136511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822105137.1308817-1-juzhe.zhong@rivai.ai/","msgid":"<20230822105137.1308817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T10:51:37","name":"VECT: Add LEN_FOLD_EXTRACT_LAST pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822105137.1308817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136514,"url":"https://patchwork.plctlab.org/api/1.2/patches/136514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOSbwEHbsEiu3Z/z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T11:28:00","name":"[14/12] libgcc _BitInt helper documentation [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOSbwEHbsEiu3Z/z@tucnak/mbox/"},{"id":136532,"url":"https://patchwork.plctlab.org/api/1.2/patches/136532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822120219.3997652-1-rearnsha@arm.com/","msgid":"<20230822120219.3997652-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-08-22T12:02:19","name":"rtl: Forward declare rtx_code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822120219.3997652-1-rearnsha@arm.com/mbox/"},{"id":136536,"url":"https://patchwork.plctlab.org/api/1.2/patches/136536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822124214.26030-1-chenglulu@loongson.cn/","msgid":"<20230822124214.26030-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-22T12:42:14","name":"[v1] libffi: Backport of LoongArch support for libffi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822124214.26030-1-chenglulu@loongson.cn/mbox/"},{"id":136539,"url":"https://patchwork.plctlab.org/api/1.2/patches/136539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822131900.977183858D1E@sourceware.org/","msgid":"<20230822131900.977183858D1E@sourceware.org>","list_archive_url":null,"date":"2023-08-22T13:18:17","name":"Simplify intereaved store vectorization processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822131900.977183858D1E@sourceware.org/mbox/"},{"id":136573,"url":"https://patchwork.plctlab.org/api/1.2/patches/136573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4f5799e-4fd6-72f4-0882-ec0bef2f1f62@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T17:39:38","name":"[committed] RISC-V: Add multiarch support on riscv-linux-gnu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4f5799e-4fd6-72f4-0882-ec0bef2f1f62@ventanamicro.com/mbox/"},{"id":136574,"url":"https://patchwork.plctlab.org/api/1.2/patches/136574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822174031.782900-1-vineetg@rivosinc.com/","msgid":"<20230822174031.782900-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-22T17:40:31","name":"RISC-V: output Autovec params explicitly in --help ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822174031.782900-1-vineetg@rivosinc.com/mbox/"},{"id":136587,"url":"https://patchwork.plctlab.org/api/1.2/patches/136587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822180907.783650-1-vineetg@rivosinc.com/","msgid":"<20230822180907.783650-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-22T18:09:07","name":"[Committed] RISC-V: output Autovec params explicitly in --help ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822180907.783650-1-vineetg@rivosinc.com/mbox/"},{"id":136600,"url":"https://patchwork.plctlab.org/api/1.2/patches/136600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-1-jason@redhat.com/","msgid":"<20230822183639.1425752-1-jason@redhat.com>","list_archive_url":null,"date":"2023-08-22T18:36:38","name":"[pushed,1/2] c++: constrained hidden friends [PR109751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-1-jason@redhat.com/mbox/"},{"id":136599,"url":"https://patchwork.plctlab.org/api/1.2/patches/136599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-2-jason@redhat.com/","msgid":"<20230822183639.1425752-2-jason@redhat.com>","list_archive_url":null,"date":"2023-08-22T18:36:39","name":"[pushed,2/2] c++: maybe_substitute_reqs_for fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-2-jason@redhat.com/mbox/"},{"id":136609,"url":"https://patchwork.plctlab.org/api/1.2/patches/136609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822223958.2936206-1-dmalcolm@redhat.com/","msgid":"<20230822223958.2936206-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T22:39:58","name":"[pushed] analyzer: reimplement kf_strlen [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822223958.2936206-1-dmalcolm@redhat.com/mbox/"},{"id":136610,"url":"https://patchwork.plctlab.org/api/1.2/patches/136610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822230650.1383987-1-juzhe.zhong@rivai.ai/","msgid":"<20230822230650.1383987-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T23:06:50","name":"RISC-V: Add riscv-vsetvl.def to t-riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822230650.1383987-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136612,"url":"https://patchwork.plctlab.org/api/1.2/patches/136612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822232225.1385301-1-juzhe.zhong@rivai.ai/","msgid":"<20230822232225.1385301-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T23:22:25","name":"RISC-V: Clang format riscv-vsetvl.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822232225.1385301-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136615,"url":"https://patchwork.plctlab.org/api/1.2/patches/136615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823011915.3481968-1-juzhe.zhong@rivai.ai/","msgid":"<20230823011915.3481968-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T01:19:15","name":"RISC-V: Adapt live-1.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823011915.3481968-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136622,"url":"https://patchwork.plctlab.org/api/1.2/patches/136622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021106.3498134-1-juzhe.zhong@rivai.ai/","msgid":"<20230823021106.3498134-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:11:06","name":"RISC-V: Add attribute to vtype change only vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021106.3498134-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136623,"url":"https://patchwork.plctlab.org/api/1.2/patches/136623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021504.3864764-1-keithp@keithp.com/","msgid":"<20230823021504.3864764-1-keithp@keithp.com>","list_archive_url":null,"date":"2023-08-23T02:15:04","name":"libgcc/m68k: Fixes for soft float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021504.3864764-1-keithp@keithp.com/mbox/"},{"id":136624,"url":"https://patchwork.plctlab.org/api/1.2/patches/136624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823022122.3500305-1-juzhe.zhong@rivai.ai/","msgid":"<20230823022122.3500305-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:21:22","name":"RISC-V: Fix gather_load_run-12.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823022122.3500305-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136625,"url":"https://patchwork.plctlab.org/api/1.2/patches/136625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823023230.3501614-1-juzhe.zhong@rivai.ai/","msgid":"<20230823023230.3501614-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:32:30","name":"RISC-V: Fix VTYPE fuse rule bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823023230.3501614-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136626,"url":"https://patchwork.plctlab.org/api/1.2/patches/136626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823024201.3507755-1-juzhe.zhong@rivai.ai/","msgid":"<20230823024201.3507755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:42:01","name":"RISC-V: Fix potential ICE of global vsetvl elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823024201.3507755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136627,"url":"https://patchwork.plctlab.org/api/1.2/patches/136627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823025607.1848-1-chenglulu@loongson.cn/","msgid":"<20230823025607.1848-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-23T02:56:08","name":"[v2] libffi: Backport of LoongArch support for libffi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823025607.1848-1-chenglulu@loongson.cn/mbox/"},{"id":136628,"url":"https://patchwork.plctlab.org/api/1.2/patches/136628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823032846.3565511-1-lehua.ding@rivai.ai/","msgid":"<20230823032846.3565511-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T03:28:46","name":"[V2] RISC-V: Add conditional unary neg/abs/not autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823032846.3565511-1-lehua.ding@rivai.ai/mbox/"},{"id":136630,"url":"https://patchwork.plctlab.org/api/1.2/patches/136630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823043118.4118801-1-hongtao.liu@intel.com/","msgid":"<20230823043118.4118801-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-23T04:31:18","name":"Fix target_clone (\"arch=graniterapids-d\") and target_clone (\"arch=arrowlake-s\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823043118.4118801-1-hongtao.liu@intel.com/mbox/"},{"id":136632,"url":"https://patchwork.plctlab.org/api/1.2/patches/136632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/h48o7iyxs01.fsf@genoa.aus.stglabs.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T05:11:26","name":"[V1,1/2] light expander sra v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/h48o7iyxs01.fsf@genoa.aus.stglabs.ibm.com/mbox/"},{"id":136640,"url":"https://patchwork.plctlab.org/api/1.2/patches/136640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOXM6mIc0hZbwWeB@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-23T09:10:02","name":"Fix profile update in tree-ssa-reassoc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOXM6mIc0hZbwWeB@kam.mff.cuni.cz/mbox/"},{"id":136650,"url":"https://patchwork.plctlab.org/api/1.2/patches/136650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823105951.1758476-1-rearnsha@arm.com/","msgid":"<20230823105951.1758476-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-08-23T10:59:51","name":"rtl: use rtx_code for gen_ccmp_first and gen_ccmp_next","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823105951.1758476-1-rearnsha@arm.com/mbox/"},{"id":136651,"url":"https://patchwork.plctlab.org/api/1.2/patches/136651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823110317.4053846-1-lehua.ding@rivai.ai/","msgid":"<20230823110317.4053846-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T11:03:17","name":"RISC-V: Add conditional sign/zero extension and truncation autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823110317.4053846-1-lehua.ding@rivai.ai/mbox/"},{"id":136653,"url":"https://patchwork.plctlab.org/api/1.2/patches/136653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823115357.3868382-1-lehua.ding@rivai.ai/","msgid":"<20230823115357.3868382-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T11:53:57","name":"RISC-V: Add conditional convert autovec patterns between FPs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823115357.3868382-1-lehua.ding@rivai.ai/mbox/"},{"id":136656,"url":"https://patchwork.plctlab.org/api/1.2/patches/136656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122452.2137204-1-juzhe.zhong@rivai.ai/","msgid":"<20230823122452.2137204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T12:24:52","name":"[V2] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122452.2137204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136657,"url":"https://patchwork.plctlab.org/api/1.2/patches/136657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122843.23512-1-liaozhangjin@eswincomputing.com/","msgid":"<20230823122843.23512-1-liaozhangjin@eswincomputing.com>","list_archive_url":null,"date":"2023-08-23T12:28:43","name":"RISC-V:add a more appropriate type attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122843.23512-1-liaozhangjin@eswincomputing.com/mbox/"},{"id":136659,"url":"https://patchwork.plctlab.org/api/1.2/patches/136659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuVikf3frvm3t21ezn09nc-sagOpuOniaHycS44t80BL-w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T13:02:40","name":"[v5] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuVikf3frvm3t21ezn09nc-sagOpuOniaHycS44t80BL-w@mail.gmail.com/mbox/"},{"id":136663,"url":"https://patchwork.plctlab.org/api/1.2/patches/136663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823132502.72B64385482D@sourceware.org/","msgid":"<20230823132502.72B64385482D@sourceware.org>","list_archive_url":null,"date":"2023-08-23T13:24:17","name":"tree-optimization/111115 - SLP of masked stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823132502.72B64385482D@sourceware.org/mbox/"},{"id":136667,"url":"https://patchwork.plctlab.org/api/1.2/patches/136667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com/","msgid":"<80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com>","list_archive_url":null,"date":"2023-08-23T13:48:27","name":"RISC-V: Add initial pipeline description for an out-of-order core.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com/mbox/"},{"id":136670,"url":"https://patchwork.plctlab.org/api/1.2/patches/136670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-2-ams@codesourcery.com/","msgid":"<20230823141426.320160-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:21","name":"[v2,1/6] libgomp: basic pinned memory on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-2-ams@codesourcery.com/mbox/"},{"id":136669,"url":"https://patchwork.plctlab.org/api/1.2/patches/136669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-3-ams@codesourcery.com/","msgid":"<20230823141426.320160-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:22","name":"[v2,2/6] libgomp, openmp: Add ompx_pinned_mem_alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-3-ams@codesourcery.com/mbox/"},{"id":136672,"url":"https://patchwork.plctlab.org/api/1.2/patches/136672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-4-ams@codesourcery.com/","msgid":"<20230823141426.320160-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:23","name":"[v2,3/6] openmp: Add -foffload-memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-4-ams@codesourcery.com/mbox/"},{"id":136673,"url":"https://patchwork.plctlab.org/api/1.2/patches/136673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-5-ams@codesourcery.com/","msgid":"<20230823141426.320160-5-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:24","name":"[v2,4/6] openmp: -foffload-memory=pinned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-5-ams@codesourcery.com/mbox/"},{"id":136671,"url":"https://patchwork.plctlab.org/api/1.2/patches/136671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-6-ams@codesourcery.com/","msgid":"<20230823141426.320160-6-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:25","name":"[v2,5/6] libgomp, nvptx: Cuda pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-6-ams@codesourcery.com/mbox/"},{"id":136674,"url":"https://patchwork.plctlab.org/api/1.2/patches/136674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-7-ams@codesourcery.com/","msgid":"<20230823141426.320160-7-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:26","name":"[v2,6/6] libgomp: fine-grained pinned memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-7-ams@codesourcery.com/mbox/"},{"id":136683,"url":"https://patchwork.plctlab.org/api/1.2/patches/136683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982AAADB78E0FBB98E28147831CA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T14:39:13","name":"AArch64: Fix MOPS memmove operand corruption [PR111121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982AAADB78E0FBB98E28147831CA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":136686,"url":"https://patchwork.plctlab.org/api/1.2/patches/136686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y8DZejELWcKZouxNx-nQgZyCmSszaznU7xRA8RfLBKmw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T14:53:05","name":"[committed] i386: Fix register spill failure with concat RTX [PR111010]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y8DZejELWcKZouxNx-nQgZyCmSszaznU7xRA8RfLBKmw@mail.gmail.com/mbox/"},{"id":136691,"url":"https://patchwork.plctlab.org/api/1.2/patches/136691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823152209.351604-1-aldyh@redhat.com/","msgid":"<20230823152209.351604-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-23T15:22:00","name":"[frange] Relax floating point relational folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823152209.351604-1-aldyh@redhat.com/mbox/"},{"id":136698,"url":"https://patchwork.plctlab.org/api/1.2/patches/136698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823160322.237140-1-jwakely@redhat.com/","msgid":"<20230823160322.237140-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-23T16:02:05","name":"[RFC] libstdc++: Make --enable-libstdcxx-backtrace=auto default to yes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823160322.237140-1-jwakely@redhat.com/mbox/"},{"id":136706,"url":"https://patchwork.plctlab.org/api/1.2/patches/136706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffce06a5-59a8-56fd-b39e-a2bd38c609a3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T17:35:14","name":"[_GLIBCXX_INLINE_VERSION] Fix friend declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffce06a5-59a8-56fd-b39e-a2bd38c609a3@gmail.com/mbox/"},{"id":136709,"url":"https://patchwork.plctlab.org/api/1.2/patches/136709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com/","msgid":"<921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com>","list_archive_url":null,"date":"2023-08-23T18:47:53","name":"[COMMITTED,1/2] Phi analyzer - Do not create phi groups with a single phi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com/mbox/"},{"id":136710,"url":"https://patchwork.plctlab.org/api/1.2/patches/136710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com/","msgid":"<42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com>","list_archive_url":null,"date":"2023-08-23T18:48:15","name":"[COMMITTED,2/2] tree-optimization/110918 - Phi analyzer - Initialize with a range instead of a tree.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com/mbox/"},{"id":136711,"url":"https://patchwork.plctlab.org/api/1.2/patches/136711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se/","msgid":"<3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se>","list_archive_url":null,"date":"2023-08-23T18:48:25","name":"Fix for bug libstdc++/111102 pointer arithmetic on nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se/mbox/"},{"id":136715,"url":"https://patchwork.plctlab.org/api/1.2/patches/136715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-62b0634d-102b-44b5-b999-b8927b2ba50f-1692818168035@3c-app-gmx-bs30/","msgid":"","list_archive_url":null,"date":"2023-08-23T19:16:08","name":"Fortran: improve diagnostic message for COMMON with automatic object [PR32986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-62b0634d-102b-44b5-b999-b8927b2ba50f-1692818168035@3c-app-gmx-bs30/mbox/"},{"id":136718,"url":"https://patchwork.plctlab.org/api/1.2/patches/136718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823194904.1925591-1-polacek@redhat.com/","msgid":"<20230823194904.1925591-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-23T19:49:04","name":"c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823194904.1925591-1-polacek@redhat.com/mbox/"},{"id":136721,"url":"https://patchwork.plctlab.org/api/1.2/patches/136721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com/","msgid":"<66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com>","list_archive_url":null,"date":"2023-08-23T20:13:58","name":"[committed] Improve quality of code from LRA register elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com/mbox/"},{"id":136729,"url":"https://patchwork.plctlab.org/api/1.2/patches/136729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823214955.3494903-1-apinski@marvell.com/","msgid":"<20230823214955.3494903-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-23T21:49:55","name":"MATCH: [PR111109] Fix bit_ior(cond, cond) when comparisons are fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823214955.3494903-1-apinski@marvell.com/mbox/"},{"id":136734,"url":"https://patchwork.plctlab.org/api/1.2/patches/136734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824010834.1525563-1-guojiufu@linux.ibm.com/","msgid":"<20230824010834.1525563-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-24T01:08:34","name":"[V5,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824010834.1525563-1-guojiufu@linux.ibm.com/mbox/"},{"id":136737,"url":"https://patchwork.plctlab.org/api/1.2/patches/136737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824011738.5A3122040D@pchp3.se.axis.com/","msgid":"<20230824011738.5A3122040D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-24T01:17:38","name":"[committed] testsuite: Xfail gcc.dg/tree-ssa/update-threading.c for CRIS, PR110628","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824011738.5A3122040D@pchp3.se.axis.com/mbox/"},{"id":136738,"url":"https://patchwork.plctlab.org/api/1.2/patches/136738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824020836.48335-1-juzhe.zhong@rivai.ai/","msgid":"<20230824020836.48335-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T02:08:36","name":"VECT: Apply LEN_FOLD_EXTRACT_LAST into loop vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824020836.48335-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136739,"url":"https://patchwork.plctlab.org/api/1.2/patches/136739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824021925.1717486-1-juzhe.zhong@rivai.ai/","msgid":"<20230824021925.1717486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T02:19:25","name":"RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824021925.1717486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136743,"url":"https://patchwork.plctlab.org/api/1.2/patches/136743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824023815.3506414-1-apinski@marvell.com/","msgid":"<20230824023815.3506414-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T02:38:15","name":"MATCH: remove negate for 1bit types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824023815.3506414-1-apinski@marvell.com/mbox/"},{"id":136744,"url":"https://patchwork.plctlab.org/api/1.2/patches/136744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824025706.192064-1-thiago.bauermann@linaro.org/","msgid":"<20230824025706.192064-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-24T02:57:06","name":"testsuite: aarch64: Adjust SVE ACLE tests to new generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824025706.192064-1-thiago.bauermann@linaro.org/mbox/"},{"id":136746,"url":"https://patchwork.plctlab.org/api/1.2/patches/136746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-2-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:11","name":"[v5,1/6] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-2-panchenghui@loongson.cn/mbox/"},{"id":136748,"url":"https://patchwork.plctlab.org/api/1.2/patches/136748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-3-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:12","name":"[v5,2/6] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-3-panchenghui@loongson.cn/mbox/"},{"id":136750,"url":"https://patchwork.plctlab.org/api/1.2/patches/136750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-4-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:13","name":"[v5,3/6] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-4-panchenghui@loongson.cn/mbox/"},{"id":136745,"url":"https://patchwork.plctlab.org/api/1.2/patches/136745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-5-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:14","name":"[v5,4/6] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-5-panchenghui@loongson.cn/mbox/"},{"id":136751,"url":"https://patchwork.plctlab.org/api/1.2/patches/136751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-6-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:15","name":"[v5,5/6] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-6-panchenghui@loongson.cn/mbox/"},{"id":136749,"url":"https://patchwork.plctlab.org/api/1.2/patches/136749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-7-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:16","name":"[v5,6/6] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-7-panchenghui@loongson.cn/mbox/"},{"id":136757,"url":"https://patchwork.plctlab.org/api/1.2/patches/136757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824044907.4078472-1-pan2.li@intel.com/","msgid":"<20230824044907.4078472-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T04:49:07","name":"[v1] RISC-V: Support rounding mode for VFMADD/VFMACC autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824044907.4078472-1-pan2.li@intel.com/mbox/"},{"id":136760,"url":"https://patchwork.plctlab.org/api/1.2/patches/136760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824071104.298243-1-pan2.li@intel.com/","msgid":"<20230824071104.298243-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T07:11:04","name":"[v1] RISC-V: Support rounding mode for VFMSAC/VFMSUB autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824071104.298243-1-pan2.li@intel.com/mbox/"},{"id":136762,"url":"https://patchwork.plctlab.org/api/1.2/patches/136762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824073747.315274-1-pan2.li@intel.com/","msgid":"<20230824073747.315274-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T07:37:47","name":"[v1] RISC-V: Fix one typo in autovec.md pattern comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824073747.315274-1-pan2.li@intel.com/mbox/"},{"id":136765,"url":"https://patchwork.plctlab.org/api/1.2/patches/136765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824075851.2484291-1-hongtao.liu@intel.com/","msgid":"<20230824075851.2484291-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-24T07:58:51","name":"[x86] Refactor mode iterator V_128 and V_128H, V_256 and V_256H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824075851.2484291-1-hongtao.liu@intel.com/mbox/"},{"id":136768,"url":"https://patchwork.plctlab.org/api/1.2/patches/136768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824081408.340237-1-pan2.li@intel.com/","msgid":"<20230824081408.340237-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T08:14:08","name":"[v2] RISC-V: Fix one typo in autovec.md pattern comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824081408.340237-1-pan2.li@intel.com/mbox/"},{"id":136773,"url":"https://patchwork.plctlab.org/api/1.2/patches/136773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824085931.5282A385414C@sourceware.org/","msgid":"<20230824085931.5282A385414C@sourceware.org>","list_archive_url":null,"date":"2023-08-24T08:58:46","name":"testsuite/111125 - disable BB vectorization for the test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824085931.5282A385414C@sourceware.org/mbox/"},{"id":136774,"url":"https://patchwork.plctlab.org/api/1.2/patches/136774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090040.CD4F6385C422@sourceware.org/","msgid":"<20230824090040.CD4F6385C422@sourceware.org>","list_archive_url":null,"date":"2023-08-24T08:59:53","name":"tree-optimization/111128 - fix shift pattern recog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090040.CD4F6385C422@sourceware.org/mbox/"},{"id":136775,"url":"https://patchwork.plctlab.org/api/1.2/patches/136775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090320.9947D385DC19@sourceware.org/","msgid":"<20230824090320.9947D385DC19@sourceware.org>","list_archive_url":null,"date":"2023-08-24T09:02:34","name":"tree-optimization/111123 - indirect clobbers thrown away too early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090320.9947D385DC19@sourceware.org/mbox/"},{"id":136776,"url":"https://patchwork.plctlab.org/api/1.2/patches/136776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090242.2997731-1-hongyu.wang@intel.com/","msgid":"<20230824090242.2997731-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-24T09:02:42","name":"Fix avx512ne2ps2bf16 wrong code [PR 111127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090242.2997731-1-hongyu.wang@intel.com/mbox/"},{"id":136780,"url":"https://patchwork.plctlab.org/api/1.2/patches/136780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcyzcajbi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T09:19:45","name":"aarch64: Account for different Advanced SIMD fusing options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcyzcajbi.fsf@arm.com/mbox/"},{"id":136797,"url":"https://patchwork.plctlab.org/api/1.2/patches/136797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093446.651760-1-pan2.li@intel.com/","msgid":"<20230824093446.651760-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T09:34:46","name":"[v1] RISC-V: Support rounding mode for VFNMSAC/VFNMSUB autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093446.651760-1-pan2.li@intel.com/mbox/"},{"id":136798,"url":"https://patchwork.plctlab.org/api/1.2/patches/136798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093708.71A883856DD0@sourceware.org/","msgid":"<20230824093708.71A883856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-24T09:36:20","name":"tree-optimization/111125 - properly cost BB reduction remain stmt handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093708.71A883856DD0@sourceware.org/mbox/"},{"id":136801,"url":"https://patchwork.plctlab.org/api/1.2/patches/136801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824100811.2468621-1-juzhe.zhong@rivai.ai/","msgid":"<20230824100811.2468621-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T10:08:11","name":"[V2] RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824100811.2468621-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136803,"url":"https://patchwork.plctlab.org/api/1.2/patches/136803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824105505.2481018-1-lehua.ding@rivai.ai/","msgid":"<20230824105505.2481018-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-24T10:55:05","name":"RISC-V: Add conditional autovec convert(INT<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824105505.2481018-1-lehua.ding@rivai.ai/mbox/"},{"id":136805,"url":"https://patchwork.plctlab.org/api/1.2/patches/136805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824110358.ACA0D3851C20@sourceware.org/","msgid":"<20230824110358.ACA0D3851C20@sourceware.org>","list_archive_url":null,"date":"2023-08-24T11:03:06","name":"tree-optimization/111125 - avoid BB vectorization in novector loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824110358.ACA0D3851C20@sourceware.org/mbox/"},{"id":136815,"url":"https://patchwork.plctlab.org/api/1.2/patches/136815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124122.431361-1-jwakely@redhat.com/","msgid":"<20230824124122.431361-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:41:08","name":"[committed] libstdc++: Declutter std::optional and std:variant pretty printers [PR110944]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124122.431361-1-jwakely@redhat.com/mbox/"},{"id":136817,"url":"https://patchwork.plctlab.org/api/1.2/patches/136817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124152.431392-1-jwakely@redhat.com/","msgid":"<20230824124152.431392-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:41:23","name":"[committed] libstdc++: Add pretty printer for std::locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124152.431392-1-jwakely@redhat.com/mbox/"},{"id":136816,"url":"https://patchwork.plctlab.org/api/1.2/patches/136816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124231.86E373853D1F@sourceware.org/","msgid":"<20230824124231.86E373853D1F@sourceware.org>","list_archive_url":null,"date":"2023-08-24T12:41:45","name":"Fix confusion about load_p in vect_build_slp_tree_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124231.86E373853D1F@sourceware.org/mbox/"},{"id":136818,"url":"https://patchwork.plctlab.org/api/1.2/patches/136818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124524.443635-1-jwakely@redhat.com/","msgid":"<20230824124524.443635-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:44:56","name":"[committed] libstdc++: Implement new SI prefixes in for C++23 (P2734R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124524.443635-1-jwakely@redhat.com/mbox/"},{"id":136820,"url":"https://patchwork.plctlab.org/api/1.2/patches/136820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124536.443669-1-jwakely@redhat.com/","msgid":"<20230824124536.443669-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:25","name":"[committed] libstdc++: Tweak some preprocessor conditions for feature tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124536.443669-1-jwakely@redhat.com/mbox/"},{"id":136819,"url":"https://patchwork.plctlab.org/api/1.2/patches/136819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124549.443683-1-jwakely@redhat.com/","msgid":"<20230824124549.443683-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:37","name":"[committed] libstdc++: Fix -Wunused-but-set-variable in std::format_to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124549.443683-1-jwakely@redhat.com/mbox/"},{"id":136821,"url":"https://patchwork.plctlab.org/api/1.2/patches/136821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124603.443712-1-jwakely@redhat.com/","msgid":"<20230824124603.443712-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:56","name":"[committed] libstdc++: Add test for illegal pointer arithmetic in format [PR111102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124603.443712-1-jwakely@redhat.com/mbox/"},{"id":136826,"url":"https://patchwork.plctlab.org/api/1.2/patches/136826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdXuCEkw7On4xBo@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-24T13:14:32","name":"Check that passes do not forget to define profile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdXuCEkw7On4xBo@kam.mff.cuni.cz/mbox/"},{"id":136827,"url":"https://patchwork.plctlab.org/api/1.2/patches/136827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdiA7tyrtpll0FT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-24T13:58:27","name":"c++: Implement C++26 P2361R6 - Unevaluated strings [PR110342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdiA7tyrtpll0FT@tucnak/mbox/"},{"id":136829,"url":"https://patchwork.plctlab.org/api/1.2/patches/136829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdpmyv5gUOzAave@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-24T14:30:51","name":"c++: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdpmyv5gUOzAave@tucnak/mbox/"},{"id":136831,"url":"https://patchwork.plctlab.org/api/1.2/patches/136831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-2-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:55","name":"[1/9] analyzer: add logging to impl_path_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-2-dmalcolm@redhat.com/mbox/"},{"id":136837,"url":"https://patchwork.plctlab.org/api/1.2/patches/136837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-3-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:56","name":"[2/9] analyzer: handle symbolic bindings in scan_for_null_terminator [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-3-dmalcolm@redhat.com/mbox/"},{"id":136834,"url":"https://patchwork.plctlab.org/api/1.2/patches/136834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-4-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:57","name":"[3/9] analyzer: reimplement kf_strcpy [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-4-dmalcolm@redhat.com/mbox/"},{"id":136832,"url":"https://patchwork.plctlab.org/api/1.2/patches/136832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-5-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:58","name":"[4/9] analyzer: eliminate region_model::get_string_size [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-5-dmalcolm@redhat.com/mbox/"},{"id":136833,"url":"https://patchwork.plctlab.org/api/1.2/patches/136833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-6-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:59","name":"[5/9] analyzer: reimplement kf_memcpy_memmove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-6-dmalcolm@redhat.com/mbox/"},{"id":136838,"url":"https://patchwork.plctlab.org/api/1.2/patches/136838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-7-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:00","name":"[6/9] analyzer: handle strlen(INIT_VAL(STRING_REG)) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-7-dmalcolm@redhat.com/mbox/"},{"id":136839,"url":"https://patchwork.plctlab.org/api/1.2/patches/136839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-8-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-8-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:01","name":"[7/9] analyzer: handle INIT_VAL(ELEMENT_REG(STRING_REG), CONSTANT_SVAL) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-8-dmalcolm@redhat.com/mbox/"},{"id":136840,"url":"https://patchwork.plctlab.org/api/1.2/patches/136840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-9-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-9-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:02","name":"[8/9] analyzer: handle strlen(BITS_WITHIN) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-9-dmalcolm@redhat.com/mbox/"},{"id":136835,"url":"https://patchwork.plctlab.org/api/1.2/patches/136835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-10-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-10-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:03","name":"[9/9] analyzer: implement kf_strcat [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-10-dmalcolm@redhat.com/mbox/"},{"id":136844,"url":"https://patchwork.plctlab.org/api/1.2/patches/136844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdyHqxbRshejb4n@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-24T15:07:10","name":"[RFC] gimple ssa: SCCP - A new PHI optimization pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdyHqxbRshejb4n@fkdesktop.suse.cz/mbox/"},{"id":136847,"url":"https://patchwork.plctlab.org/api/1.2/patches/136847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNkyz3m7xU8FtArMmCW_nJY4WCzePdQpn_SQEmvErbwmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T15:45:12","name":"RISC-V: Fix stack_save_restore_1/2 test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNkyz3m7xU8FtArMmCW_nJY4WCzePdQpn_SQEmvErbwmg@mail.gmail.com/mbox/"},{"id":136860,"url":"https://patchwork.plctlab.org/api/1.2/patches/136860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824180459.465060-1-patrick@rivosinc.com/","msgid":"<20230824180459.465060-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-24T18:04:59","name":"RISC-V: Move vector-abi testcases into rvv/base folder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824180459.465060-1-patrick@rivosinc.com/mbox/"},{"id":136864,"url":"https://patchwork.plctlab.org/api/1.2/patches/136864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824183919.2485913-1-vultkayn@gcc.gnu.org/","msgid":"<20230824183919.2485913-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-24T18:39:20","name":"analyzer: Move gcc.dg/analyzer tests to c-c++-common (1).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824183919.2485913-1-vultkayn@gcc.gnu.org/mbox/"},{"id":136866,"url":"https://patchwork.plctlab.org/api/1.2/patches/136866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-1-apinski@marvell.com/","msgid":"<20230824191455.3547513-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:53","name":"[1/3] MATCH: Move `a ? one_zero : one_zero` matching after min/max matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-1-apinski@marvell.com/mbox/"},{"id":136865,"url":"https://patchwork.plctlab.org/api/1.2/patches/136865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-2-apinski@marvell.com/","msgid":"<20230824191455.3547513-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:54","name":"[2/3] MATCH: `a | C -> C` when we know that `a & ~C == 0`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-2-apinski@marvell.com/mbox/"},{"id":136867,"url":"https://patchwork.plctlab.org/api/1.2/patches/136867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-3-apinski@marvell.com/","msgid":"<20230824191455.3547513-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:55","name":"[3/3] PHIOPT: Allow BIT_AND and BIT_IOR in early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-3-apinski@marvell.com/mbox/"},{"id":136871,"url":"https://patchwork.plctlab.org/api/1.2/patches/136871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfe8e7a86de86b9ad1198418f93064484587b742.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T19:53:29","name":"[ver,3] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfe8e7a86de86b9ad1198418f93064484587b742.camel@us.ibm.com/mbox/"},{"id":136873,"url":"https://patchwork.plctlab.org/api/1.2/patches/136873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4afmk1bUhsEdOHumd_7h0r-1kSQhVS6=uxfh2kKKH+Hxw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T20:26:28","name":"[committed] i386: Optimize pinsrq of 0 with index 1 into movq [PR94866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4afmk1bUhsEdOHumd_7h0r-1kSQhVS6=uxfh2kKKH+Hxw@mail.gmail.com/mbox/"},{"id":136880,"url":"https://patchwork.plctlab.org/api/1.2/patches/136880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824211957.671151-1-ewlu@rivosinc.com/","msgid":"<20230824211957.671151-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-24T21:19:05","name":"[V2] RISC-V: Add Types to Un-Typed Sync Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824211957.671151-1-ewlu@rivosinc.com/mbox/"},{"id":136883,"url":"https://patchwork.plctlab.org/api/1.2/patches/136883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-805c458b-39ea-45ab-bc59-6331fd8b952e-1692912489967@3c-app-gmx-bap48/","msgid":"","list_archive_url":null,"date":"2023-08-24T21:28:10","name":"Fortran: improve bounds checking for DATA with implied-do [PR35095]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-805c458b-39ea-45ab-bc59-6331fd8b952e-1692912489967@3c-app-gmx-bap48/mbox/"},{"id":136887,"url":"https://patchwork.plctlab.org/api/1.2/patches/136887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825014833.3971482-1-pan2.li@intel.com/","msgid":"<20230825014833.3971482-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-25T01:48:33","name":"[v1] RISC-V: Support rounding mode for VFNMADD/VFNMACC autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825014833.3971482-1-pan2.li@intel.com/mbox/"},{"id":136888,"url":"https://patchwork.plctlab.org/api/1.2/patches/136888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825015919.3478297-1-juzhe.zhong@rivai.ai/","msgid":"<20230825015919.3478297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-25T01:59:19","name":"RISC-V: Add early continue for ENTRY and EXIT block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825015919.3478297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136890,"url":"https://patchwork.plctlab.org/api/1.2/patches/136890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825020520.3485365-1-lehua.ding@rivai.ai/","msgid":"<20230825020520.3485365-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-25T02:05:20","name":"[V2] RISC-V: Add conditional autovec convert(INT<->INT) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825020520.3485365-1-lehua.ding@rivai.ai/mbox/"},{"id":136892,"url":"https://patchwork.plctlab.org/api/1.2/patches/136892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825030720.3495607-1-juzhe.zhong@rivai.ai/","msgid":"<20230825030720.3495607-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-25T03:07:20","name":"[V3] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825030720.3495607-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136894,"url":"https://patchwork.plctlab.org/api/1.2/patches/136894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825040156.9209-1-chenglulu@loongson.cn/","msgid":"<20230825040156.9209-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-25T04:01:56","name":"[v1] LoongArch: Remove the symbolic extension instruction due to the SLT directive.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825040156.9209-1-chenglulu@loongson.cn/mbox/"},{"id":136895,"url":"https://patchwork.plctlab.org/api/1.2/patches/136895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044357.1669621-1-hongtao.liu@intel.com/","msgid":"<20230825044357.1669621-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-25T04:43:57","name":"Use vmaskmov{ps, pd} for VI48_128_256 when TARGET_AVX2 is not available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044357.1669621-1-hongtao.liu@intel.com/mbox/"},{"id":136896,"url":"https://patchwork.plctlab.org/api/1.2/patches/136896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044712.348608-1-yangyujie@loongson.cn/","msgid":"<20230825044712.348608-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-25T04:46:05","name":"[PING] LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044712.348608-1-yangyujie@loongson.cn/mbox/"},{"id":136898,"url":"https://patchwork.plctlab.org/api/1.2/patches/136898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825051614.2125893-1-vineetg@rivosinc.com/","msgid":"<20230825051614.2125893-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T05:16:14","name":"[v2] RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825051614.2125893-1-vineetg@rivosinc.com/mbox/"},{"id":136906,"url":"https://patchwork.plctlab.org/api/1.2/patches/136906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com/","msgid":"<68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-25T06:44:26","name":"[PATCH-1,rs6000] Enable SImode in FP register on P7 [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com/mbox/"},{"id":136907,"url":"https://patchwork.plctlab.org/api/1.2/patches/136907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfb389e5-079c-4557-fb8a-e041c4bf739e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T06:44:45","name":"[PATCH-2,rs6000] Implement 32bit inline lrint [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfb389e5-079c-4557-fb8a-e041c4bf739e@linux.ibm.com/mbox/"},{"id":136908,"url":"https://patchwork.plctlab.org/api/1.2/patches/136908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825080204.3531681-1-lehua.ding@rivai.ai/","msgid":"<20230825080204.3531681-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-25T08:02:04","name":"RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825080204.3531681-1-lehua.ding@rivai.ai/mbox/"},{"id":136909,"url":"https://patchwork.plctlab.org/api/1.2/patches/136909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825081408.C9C121340A@imap2.suse-dmz.suse.de/","msgid":"<20230825081408.C9C121340A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T08:14:08","name":"tree-optimization/111136 - STMT_VINFO_SLP_VECT_ONLY and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825081408.C9C121340A@imap2.suse-dmz.suse.de/mbox/"},{"id":136910,"url":"https://patchwork.plctlab.org/api/1.2/patches/136910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YM0vVaVE6YHFstFormuBJ-Ff+2iG9rRj8KaaRD2i5atA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T08:24:44","name":"[committed] treewide: Rename TRUE/FALSE to true/false in *.cc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YM0vVaVE6YHFstFormuBJ-Ff+2iG9rRj8KaaRD2i5atA@mail.gmail.com/mbox/"},{"id":136911,"url":"https://patchwork.plctlab.org/api/1.2/patches/136911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZNDHY-ihh-Vh72CohZ3izNgpg6L5raUogXONKTqS=2Sg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T08:26:31","name":"fortran: Rename TRUE/FALSE to true/false in *.cc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZNDHY-ihh-Vh72CohZ3izNgpg6L5raUogXONKTqS=2Sg@mail.gmail.com/mbox/"},{"id":136912,"url":"https://patchwork.plctlab.org/api/1.2/patches/136912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825093156.14808-1-chenglulu@loongson.cn/","msgid":"<20230825093156.14808-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-25T09:31:57","name":"[v2] LoongArch: Remove redundant sign extension instructions caused by SLT instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825093156.14808-1-chenglulu@loongson.cn/mbox/"},{"id":136913,"url":"https://patchwork.plctlab.org/api/1.2/patches/136913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825111532.F27E6138F9@imap2.suse-dmz.suse.de/","msgid":"<20230825111532.F27E6138F9@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T11:15:32","name":"Apply some TLC to vect_slp_analyze_instance_dependence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825111532.F27E6138F9@imap2.suse-dmz.suse.de/mbox/"},{"id":136914,"url":"https://patchwork.plctlab.org/api/1.2/patches/136914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825123728.531381340A@imap2.suse-dmz.suse.de/","msgid":"<20230825123728.531381340A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T12:37:27","name":"tree-optimization/111137 - dependence checking for SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825123728.531381340A@imap2.suse-dmz.suse.de/mbox/"},{"id":136916,"url":"https://patchwork.plctlab.org/api/1.2/patches/136916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825124433.3279791-1-dmalcolm@redhat.com/","msgid":"<20230825124433.3279791-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-25T12:44:33","name":"[pushed] analyzer: fix ICE in text art strings support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825124433.3279791-1-dmalcolm@redhat.com/mbox/"},{"id":136923,"url":"https://patchwork.plctlab.org/api/1.2/patches/136923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-2-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:23","name":"[V3,1/3] Provide counted_by attribute to flexible array member field (PR108896)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-2-qing.zhao@oracle.com/mbox/"},{"id":136924,"url":"https://patchwork.plctlab.org/api/1.2/patches/136924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-3-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:24","name":"[V3,2/3] Use the counted_by atribute info in builtin object size [PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-3-qing.zhao@oracle.com/mbox/"},{"id":136925,"url":"https://patchwork.plctlab.org/api/1.2/patches/136925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-4-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:25","name":"[V3,3/3] Use the counted_by attribute information in bound sanitizer[PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-4-qing.zhao@oracle.com/mbox/"},{"id":136926,"url":"https://patchwork.plctlab.org/api/1.2/patches/136926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825162122.3599370-1-apinski@marvell.com/","msgid":"<20230825162122.3599370-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-25T16:21:22","name":"MATCH: Move `(X & ~Y) | (~X & Y)` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825162122.3599370-1-apinski@marvell.com/mbox/"},{"id":136927,"url":"https://patchwork.plctlab.org/api/1.2/patches/136927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825163331.3231278-1-ppalka@redhat.com/","msgid":"<20230825163331.3231278-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-25T16:33:31","name":"c++: use conversion_obstack_sentinel throughout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825163331.3231278-1-ppalka@redhat.com/mbox/"},{"id":136928,"url":"https://patchwork.plctlab.org/api/1.2/patches/136928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825164447.480720-1-polacek@redhat.com/","msgid":"<20230825164447.480720-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-25T16:44:47","name":"c++: CWG 2359, wrong copy-init with designated init [PR91319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825164447.480720-1-polacek@redhat.com/mbox/"},{"id":136930,"url":"https://patchwork.plctlab.org/api/1.2/patches/136930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825174146.3372968-1-ppalka@redhat.com/","msgid":"<20230825174146.3372968-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-25T17:41:45","name":"c++: more dummy non_constant_p arg avoidance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825174146.3372968-1-ppalka@redhat.com/mbox/"},{"id":136931,"url":"https://patchwork.plctlab.org/api/1.2/patches/136931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1f0b94e-602b-6f52-090a-6baac5b61b6b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T18:17:22","name":"[wwwdocs] projects/gomp: Update implementation status and minor fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1f0b94e-602b-6f52-090a-6baac5b61b6b@codesourcery.com/mbox/"},{"id":136932,"url":"https://patchwork.plctlab.org/api/1.2/patches/136932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825183312.3604580-1-apinski@marvell.com/","msgid":"<20230825183312.3604580-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-25T18:33:12","name":"[COMMITTEDv2] MATCH: Move `a ? one_zero : one_zero` matching after min/max matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825183312.3604580-1-apinski@marvell.com/mbox/"},{"id":136933,"url":"https://patchwork.plctlab.org/api/1.2/patches/136933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825192428.2165663-1-vineetg@rivosinc.com/","msgid":"<20230825192428.2165663-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T19:24:28","name":"[Committed] RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825192428.2165663-1-vineetg@rivosinc.com/mbox/"},{"id":136934,"url":"https://patchwork.plctlab.org/api/1.2/patches/136934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-2-sandra@codesourcery.com/","msgid":"<20230825194714.627157-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:09","name":"[COMMITTED,V3,1/6] OpenMP: Add OMP_STRUCTURED_BLOCK and GIMPLE_OMP_STRUCTURED_BLOCK.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-2-sandra@codesourcery.com/mbox/"},{"id":136937,"url":"https://patchwork.plctlab.org/api/1.2/patches/136937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-3-sandra@codesourcery.com/","msgid":"<20230825194714.627157-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:10","name":"[COMMITTED,V3,2/6] OpenMP: C front end support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-3-sandra@codesourcery.com/mbox/"},{"id":136935,"url":"https://patchwork.plctlab.org/api/1.2/patches/136935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-4-sandra@codesourcery.com/","msgid":"<20230825194714.627157-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:11","name":"[COMMITTED,V3,3/6] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-4-sandra@codesourcery.com/mbox/"},{"id":136938,"url":"https://patchwork.plctlab.org/api/1.2/patches/136938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-5-sandra@codesourcery.com/","msgid":"<20230825194714.627157-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:12","name":"[COMMITTED,V3,4/6] OpenMP: New C/C++ testcases for imperfectly nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-5-sandra@codesourcery.com/mbox/"},{"id":136939,"url":"https://patchwork.plctlab.org/api/1.2/patches/136939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-6-sandra@codesourcery.com/","msgid":"<20230825194714.627157-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:13","name":"[COMMITTED,V3,5/6] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-6-sandra@codesourcery.com/mbox/"},{"id":136936,"url":"https://patchwork.plctlab.org/api/1.2/patches/136936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-7-sandra@codesourcery.com/","msgid":"<20230825194714.627157-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:14","name":"[COMMITTED,V3,6/6] OpenMP: Document support for imperfectly-nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-7-sandra@codesourcery.com/mbox/"},{"id":136940,"url":"https://patchwork.plctlab.org/api/1.2/patches/136940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkQeH+HvpO8+iFY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-25T20:35:04","name":"c++: Implement C++ DR 2406 - [[fallthrough]] attribute and iteration statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkQeH+HvpO8+iFY@tucnak/mbox/"},{"id":136941,"url":"https://patchwork.plctlab.org/api/1.2/patches/136941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825204554.2440771-1-lhyatt@gmail.com/","msgid":"<20230825204554.2440771-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-25T20:45:54","name":"testsuite: Add test for already-fixed issue with _Pragma expansion [PR90400]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825204554.2440771-1-lhyatt@gmail.com/mbox/"},{"id":136942,"url":"https://patchwork.plctlab.org/api/1.2/patches/136942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkT1OwRjZWBntFR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-25T20:49:24","name":"c++: Implement C++26 P1854R4 - Making non-encodable string literals ill-formed [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkT1OwRjZWBntFR@tucnak/mbox/"},{"id":136945,"url":"https://patchwork.plctlab.org/api/1.2/patches/136945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe44ae1c-93a9-9aea-b233-46082269f896@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T22:30:00","name":"[committed] RISC-V: Fix minor testsuite problem with zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe44ae1c-93a9-9aea-b233-46082269f896@ventanamicro.com/mbox/"},{"id":136946,"url":"https://patchwork.plctlab.org/api/1.2/patches/136946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com/","msgid":"<10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com>","list_archive_url":null,"date":"2023-08-25T22:36:22","name":"[committed] RISC-V: Make stack_save_restore tests more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com/mbox/"},{"id":136947,"url":"https://patchwork.plctlab.org/api/1.2/patches/136947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825233746.904433-1-polacek@redhat.com/","msgid":"<20230825233746.904433-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-25T23:37:46","name":"c++: tweaks for explicit conversion fns diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825233746.904433-1-polacek@redhat.com/mbox/"},{"id":136948,"url":"https://patchwork.plctlab.org/api/1.2/patches/136948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825234238.86902-1-ewlu@rivosinc.com/","msgid":"<20230825234238.86902-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T23:42:20","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825234238.86902-1-ewlu@rivosinc.com/mbox/"},{"id":136952,"url":"https://patchwork.plctlab.org/api/1.2/patches/136952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021252.3623978-1-apinski@marvell.com/","msgid":"<20230826021252.3623978-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-26T02:12:52","name":"Fix phi-opt-34.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021252.3623978-1-apinski@marvell.com/mbox/"},{"id":136953,"url":"https://patchwork.plctlab.org/api/1.2/patches/136953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021458.3624086-1-apinski@marvell.com/","msgid":"<20230826021458.3624086-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-26T02:14:58","name":"PHIOPT: Add dump for match and simplify and early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021458.3624086-1-apinski@marvell.com/mbox/"},{"id":136954,"url":"https://patchwork.plctlab.org/api/1.2/patches/136954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOndysJuo9q/Y5+8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-26T11:11:06","name":"libcpp: Small incremental patch for P1854R4 [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOndysJuo9q/Y5+8@tucnak/mbox/"},{"id":136955,"url":"https://patchwork.plctlab.org/api/1.2/patches/136955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826122219.2310080-1-vultkayn@gcc.gnu.org/","msgid":"<20230826122219.2310080-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-26T12:22:21","name":"[v2] analyzer: Move gcc.dg/analyzer tests to c-c++-common (1) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826122219.2310080-1-vultkayn@gcc.gnu.org/mbox/"},{"id":136956,"url":"https://patchwork.plctlab.org/api/1.2/patches/136956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826133634.610777-1-pan2.li@intel.com/","msgid":"<20230826133634.610777-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-26T13:36:34","name":"[v2] Mode-Switching: Add optional EMIT_AFTER hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826133634.610777-1-pan2.li@intel.com/mbox/"},{"id":136957,"url":"https://patchwork.plctlab.org/api/1.2/patches/136957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at/","msgid":"<1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:20:57","name":"[C,1/6] c: reorganize recursive type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at/mbox/"},{"id":136958,"url":"https://patchwork.plctlab.org/api/1.2/patches/136958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at/","msgid":"<97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:22:12","name":"[C,2/6] c23: recursive type checking of tagged type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at/mbox/"},{"id":136959,"url":"https://patchwork.plctlab.org/api/1.2/patches/136959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at/","msgid":"<00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:23:10","name":"[C,3/6] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at/mbox/"},{"id":136960,"url":"https://patchwork.plctlab.org/api/1.2/patches/136960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at/","msgid":"<525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:24:04","name":"[C,4/6] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at/mbox/"},{"id":136961,"url":"https://patchwork.plctlab.org/api/1.2/patches/136961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at/","msgid":"<340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:25:18","name":"[C,5/6] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at/mbox/"},{"id":136962,"url":"https://patchwork.plctlab.org/api/1.2/patches/136962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at/","msgid":"<748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:26:06","name":"[C,6/6] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at/mbox/"},{"id":136963,"url":"https://patchwork.plctlab.org/api/1.2/patches/136963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at/","msgid":"<157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:26:55","name":"[C] c: flag for tag compatibility rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at/mbox/"},{"id":136985,"url":"https://patchwork.plctlab.org/api/1.2/patches/136985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com/","msgid":"<0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T18:40:36","name":"[committed] RISC-V: Fix xtheadcondmov-indirect.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com/mbox/"},{"id":136986,"url":"https://patchwork.plctlab.org/api/1.2/patches/136986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com/","msgid":"<8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T18:54:16","name":"[committed] RISC-V: Fix spill-12 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com/mbox/"},{"id":136987,"url":"https://patchwork.plctlab.org/api/1.2/patches/136987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com/","msgid":"<8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T19:01:45","name":"[committed] RISC-V: Fix spill-11.c testsuite failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com/mbox/"},{"id":136988,"url":"https://patchwork.plctlab.org/api/1.2/patches/136988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827192246.2514665-1-mikael@gcc.gnu.org/","msgid":"<20230827192246.2514665-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-27T19:22:46","name":"fortran: Restore interface to its previous state on error [PR48776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827192246.2514665-1-mikael@gcc.gnu.org/mbox/"},{"id":136989,"url":"https://patchwork.plctlab.org/api/1.2/patches/136989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827225754.3733610-1-apinski@marvell.com/","msgid":"<20230827225754.3733610-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-27T22:57:54","name":"IFCOMBINE: Remove outer condition for two same conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827225754.3733610-1-apinski@marvell.com/mbox/"},{"id":136991,"url":"https://patchwork.plctlab.org/api/1.2/patches/136991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828014840.1421800-1-juzhe.zhong@rivai.ai/","msgid":"<20230828014840.1421800-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T01:48:40","name":"RISC-V: Fix VSETVL test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828014840.1421800-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136993,"url":"https://patchwork.plctlab.org/api/1.2/patches/136993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828030715.2310469-1-guojiufu@linux.ibm.com/","msgid":"<20230828030715.2310469-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-28T03:07:15","name":"rs6000: mark tieable between INT and FLOAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828030715.2310469-1-guojiufu@linux.ibm.com/mbox/"},{"id":136994,"url":"https://patchwork.plctlab.org/api/1.2/patches/136994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828031217.2801549-1-juzhe.zhong@rivai.ai/","msgid":"<20230828031217.2801549-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T03:12:17","name":"RISC-V: Enable vec_init testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828031217.2801549-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136995,"url":"https://patchwork.plctlab.org/api/1.2/patches/136995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034514.22681-1-chenglulu@loongson.cn/","msgid":"<20230828034514.22681-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-28T03:45:15","name":"[v1] LoongArch: Enable '\''-free'\'' starting at -O2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034514.22681-1-chenglulu@loongson.cn/mbox/"},{"id":136996,"url":"https://patchwork.plctlab.org/api/1.2/patches/136996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034652.22768-1-chenglulu@loongson.cn/","msgid":"<20230828034652.22768-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-28T03:46:53","name":"[v2] LoongArch: Enable '\''-free'\'' starting at -O2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034652.22768-1-chenglulu@loongson.cn/mbox/"},{"id":137003,"url":"https://patchwork.plctlab.org/api/1.2/patches/137003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828035253.3745942-1-apinski@marvell.com/","msgid":"<20230828035253.3745942-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T03:52:53","name":"MATCH: Remove redundant pattern for `(x | y) & ~x`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828035253.3745942-1-apinski@marvell.com/mbox/"},{"id":137005,"url":"https://patchwork.plctlab.org/api/1.2/patches/137005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828061701.466521-1-aldyh@redhat.com/","msgid":"<20230828061701.466521-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-28T06:16:31","name":"[COMMITTED,frange] Handle relations in LTGT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828061701.466521-1-aldyh@redhat.com/mbox/"},{"id":137007,"url":"https://patchwork.plctlab.org/api/1.2/patches/137007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828071421.2049438-1-juzhe.zhong@rivai.ai/","msgid":"<20230828071421.2049438-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T07:14:21","name":"[V2] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828071421.2049438-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137008,"url":"https://patchwork.plctlab.org/api/1.2/patches/137008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-2-gaofei@eswincomputing.com/","msgid":"<20230828074759.21049-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-28T07:47:58","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-2-gaofei@eswincomputing.com/mbox/"},{"id":137009,"url":"https://patchwork.plctlab.org/api/1.2/patches/137009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-3-gaofei@eswincomputing.com/","msgid":"<20230828074759.21049-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-28T07:47:59","name":"[2/2,V5,RISC-V] support cm.push cm.pop cm.popret in zcmp and resolve confilct with shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-3-gaofei@eswincomputing.com/mbox/"},{"id":137012,"url":"https://patchwork.plctlab.org/api/1.2/patches/137012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828080749.2064182-1-juzhe.zhong@rivai.ai/","msgid":"<20230828080749.2064182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T08:07:49","name":"RISC-V: Disable user vsetvl fusion into EMPTY block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828080749.2064182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137016,"url":"https://patchwork.plctlab.org/api/1.2/patches/137016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240086D3865DD3F4F4D4F99E8E0A@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-08-28T09:35:00","name":"alias-analyis: try to find ADDR_EXPR for SSA_NAME ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240086D3865DD3F4F4D4F99E8E0A@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":137017,"url":"https://patchwork.plctlab.org/api/1.2/patches/137017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828095319.2083553-1-juzhe.zhong@rivai.ai/","msgid":"<20230828095319.2083553-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T09:53:19","name":"[V2] RISC-V: Disable user vsetvl fusion into EMPTY or DIRTY (Polluted EMPTY) block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828095319.2083553-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137018,"url":"https://patchwork.plctlab.org/api/1.2/patches/137018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828101619.3023065-1-juzhe.zhong@rivai.ai/","msgid":"<20230828101619.3023065-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T10:16:19","name":"[V3] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828101619.3023065-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137026,"url":"https://patchwork.plctlab.org/api/1.2/patches/137026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114005.2100796-1-juzhe.zhong@rivai.ai/","msgid":"<20230828114005.2100796-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T11:40:05","name":"RISC-V: Fix uninitialized probability for GIMPLE IR tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114005.2100796-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137027,"url":"https://patchwork.plctlab.org/api/1.2/patches/137027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114249.2917296-1-juzhe.zhong@rivai.ai/","msgid":"<20230828114249.2917296-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T11:42:49","name":"[V4] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114249.2917296-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137037,"url":"https://patchwork.plctlab.org/api/1.2/patches/137037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyn+6C9ImVbp+TA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T13:58:19","name":"c++, v2: Fix up mangling of function/block scope static structured bindings and emit abi tags [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyn+6C9ImVbp+TA@tucnak/mbox/"},{"id":137038,"url":"https://patchwork.plctlab.org/api/1.2/patches/137038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyokMq0swI+Yqe6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T14:00:48","name":"libcpp, v2: Small incremental patch for P1854R4 [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyokMq0swI+Yqe6@tucnak/mbox/"},{"id":137043,"url":"https://patchwork.plctlab.org/api/1.2/patches/137043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOywZN6bAUr/4nqK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T14:34:12","name":"[RFC] > WIDE_INT_MAX_PREC support in wide-int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOywZN6bAUr/4nqK@tucnak/mbox/"},{"id":137044,"url":"https://patchwork.plctlab.org/api/1.2/patches/137044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828143744.7574-1-manos.anagnostakis@vrull.eu/","msgid":"<20230828143744.7574-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-08-28T14:37:44","name":"[v2] aarch64: Fine-grained ldp and stp policies with test-cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828143744.7574-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":137071,"url":"https://patchwork.plctlab.org/api/1.2/patches/137071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828190432.2530773-1-ewlu@rivosinc.com/","msgid":"<20230828190432.2530773-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-28T19:03:15","name":"RISC-V: Add Types to Un-Typed Vector Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828190432.2530773-1-ewlu@rivosinc.com/mbox/"},{"id":137076,"url":"https://patchwork.plctlab.org/api/1.2/patches/137076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828193053.3783698-1-apinski@marvell.com/","msgid":"<20230828193053.3783698-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T19:30:53","name":"Fix cond-bool-2.c on powerpc and other targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828193053.3783698-1-apinski@marvell.com/mbox/"},{"id":137077,"url":"https://patchwork.plctlab.org/api/1.2/patches/137077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com/","msgid":"<7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-28T20:00:48","name":"[ver,4] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com/mbox/"},{"id":137079,"url":"https://patchwork.plctlab.org/api/1.2/patches/137079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828201402.3786409-1-apinski@marvell.com/","msgid":"<20230828201402.3786409-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T20:14:02","name":"MATCH: Move `(x | y) & (~x ^ y)` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828201402.3786409-1-apinski@marvell.com/mbox/"},{"id":137089,"url":"https://patchwork.plctlab.org/api/1.2/patches/137089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO0syEImf05gXw9J@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-28T23:24:56","name":"[v2] c++: tweaks for explicit conversion fns diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO0syEImf05gXw9J@redhat.com/mbox/"},{"id":137091,"url":"https://patchwork.plctlab.org/api/1.2/patches/137091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023642.154907-1-juzhe.zhong@rivai.ai/","msgid":"<20230829023642.154907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T02:36:42","name":"RISC-V: Fix AVL/VL get ICE[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023642.154907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137092,"url":"https://patchwork.plctlab.org/api/1.2/patches/137092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023715.155656-1-lehua.ding@rivai.ai/","msgid":"<20230829023715.155656-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T02:37:15","name":"[COMMITTED,V3] RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023715.155656-1-lehua.ding@rivai.ai/mbox/"},{"id":137093,"url":"https://patchwork.plctlab.org/api/1.2/patches/137093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com/","msgid":"<528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com>","list_archive_url":null,"date":"2023-08-29T02:50:08","name":"[rs6000] Call vector load/store with length expand only on 64-bit Power10 [PR96762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com/mbox/"},{"id":137094,"url":"https://patchwork.plctlab.org/api/1.2/patches/137094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829032228.1277784-1-juzhe.zhong@rivai.ai/","msgid":"<20230829032228.1277784-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:22:28","name":"RISC-V: Fix ASM check of vlmax_switch_vtype-16.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829032228.1277784-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137095,"url":"https://patchwork.plctlab.org/api/1.2/patches/137095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d496232ba289fc98cac4fd7139f50826d6969548.1693279731.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T03:28:56","name":"[v2] RISC-V: Make PR 102957 tests more comprehensive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d496232ba289fc98cac4fd7139f50826d6969548.1693279731.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137096,"url":"https://patchwork.plctlab.org/api/1.2/patches/137096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com/","msgid":"<1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:31:02","name":"RISC-V: Make arch-24.c to test \"success\" case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137097,"url":"https://patchwork.plctlab.org/api/1.2/patches/137097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"<19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:39:31","name":"[v3,1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137098,"url":"https://patchwork.plctlab.org/api/1.2/patches/137098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e8da2e7c301dc17870b98c2684be1ace3a847a.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T03:39:32","name":"[v3,2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e8da2e7c301dc17870b98c2684be1ace3a847a.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137099,"url":"https://patchwork.plctlab.org/api/1.2/patches/137099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"<50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:39:33","name":"[v3,3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137100,"url":"https://patchwork.plctlab.org/api/1.2/patches/137100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com/","msgid":"<1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:40:52","name":"[1/1] RISC-V: Imply '\''Zicsr'\'' from '\''Zcmt'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137101,"url":"https://patchwork.plctlab.org/api/1.2/patches/137101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034321.174885-1-lehua.ding@rivai.ai/","msgid":"<20230829034321.174885-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:43:21","name":"[V2] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034321.174885-1-lehua.ding@rivai.ai/mbox/"},{"id":137102,"url":"https://patchwork.plctlab.org/api/1.2/patches/137102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034522.175560-1-lehua.ding@rivai.ai/","msgid":"<20230829034522.175560-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:45:22","name":"[V3] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034522.175560-1-lehua.ding@rivai.ai/mbox/"},{"id":137103,"url":"https://patchwork.plctlab.org/api/1.2/patches/137103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYYP286MB1473877CFCA93B60E1651C1BAEE7A@TYYP286MB1473.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-08-29T05:25:07","name":"doc: Add fpatchable-function-entry to Option-Summary page[PR110983]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYYP286MB1473877CFCA93B60E1651C1BAEE7A@TYYP286MB1473.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":137105,"url":"https://patchwork.plctlab.org/api/1.2/patches/137105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829065102.3279474-1-juzhe.zhong@rivai.ai/","msgid":"<20230829065102.3279474-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T06:51:02","name":"vect test: Remove xfail for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829065102.3279474-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137106,"url":"https://patchwork.plctlab.org/api/1.2/patches/137106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829075100.621-1-jinma@linux.alibaba.com/","msgid":"<20230829075100.621-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-29T07:51:00","name":"RISC-V: Added zvfh support for zfa extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829075100.621-1-jinma@linux.alibaba.com/mbox/"},{"id":137107,"url":"https://patchwork.plctlab.org/api/1.2/patches/137107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO2m/wC1le8HupRf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-29T08:06:23","name":"tree-ssa-math-opts: Improve uaddc/usubc pattern matching [PR111209]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO2m/wC1le8HupRf@tucnak/mbox/"},{"id":137109,"url":"https://patchwork.plctlab.org/api/1.2/patches/137109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-2-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:44","name":"[1/3,V6,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-2-gaofei@eswincomputing.com/mbox/"},{"id":137110,"url":"https://patchwork.plctlab.org/api/1.2/patches/137110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-3-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:45","name":"[2/3,V2,RISC-V] support cm.popretz in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-3-gaofei@eswincomputing.com/mbox/"},{"id":137108,"url":"https://patchwork.plctlab.org/api/1.2/patches/137108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-4-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:46","name":"[3/3,V2,RISC-V] support cm.mva01s cm.mvsa01 in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-4-gaofei@eswincomputing.com/mbox/"},{"id":137111,"url":"https://patchwork.plctlab.org/api/1.2/patches/137111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829093933.515708-1-juzhe.zhong@rivai.ai/","msgid":"<20230829093933.515708-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T09:39:33","name":"RISC-V: Remove movmisalign pattern for VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829093933.515708-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137113,"url":"https://patchwork.plctlab.org/api/1.2/patches/137113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829100738.2479550-1-juzhe.zhong@rivai.ai/","msgid":"<20230829100738.2479550-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T10:07:38","name":"RISC-V: Enable movmisalign for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829100738.2479550-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137114,"url":"https://patchwork.plctlab.org/api/1.2/patches/137114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829104921.4117031-1-pan2.li@intel.com/","msgid":"<20230829104921.4117031-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-29T10:49:21","name":"[v1] RISC-V: Fix one ICE for vect test vect-multitypes-5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829104921.4117031-1-pan2.li@intel.com/mbox/"},{"id":137115,"url":"https://patchwork.plctlab.org/api/1.2/patches/137115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2242694d4f868ec04c9766878762c5b466b0670.1693308232.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T11:23:53","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2242694d4f868ec04c9766878762c5b466b0670.1693308232.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137116,"url":"https://patchwork.plctlab.org/api/1.2/patches/137116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a84c14b1b71f6976614db5d92d2dfadb@gcc.mail.kapsi.fi/","msgid":"","list_archive_url":null,"date":"2023-08-29T12:04:46","name":"libstdc++: Fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a84c14b1b71f6976614db5d92d2dfadb@gcc.mail.kapsi.fi/mbox/"},{"id":137117,"url":"https://patchwork.plctlab.org/api/1.2/patches/137117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO30PQql2TablzpJ@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-29T13:35:57","name":"c++: Check for indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO30PQql2TablzpJ@Thaum.localdomain/mbox/"},{"id":137118,"url":"https://patchwork.plctlab.org/api/1.2/patches/137118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829150223.3824839-1-dmalcolm@redhat.com/","msgid":"<20230829150223.3824839-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-29T15:02:23","name":"[pushed] analyzer: improve strdup handling [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829150223.3824839-1-dmalcolm@redhat.com/mbox/"},{"id":137121,"url":"https://patchwork.plctlab.org/api/1.2/patches/137121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpMKSj-yvpWP5fyDhSivkYSwnf4zG5FLZfQ82s0m0x4+w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T15:40:30","name":"RFC: RISC-V sign extension dead code elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpMKSj-yvpWP5fyDhSivkYSwnf4zG5FLZfQ82s0m0x4+w@mail.gmail.com/mbox/"},{"id":137120,"url":"https://patchwork.plctlab.org/api/1.2/patches/137120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm356emd.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T15:40:42","name":"attribs: Use existing traits for excl_hash_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm356emd.fsf@arm.com/mbox/"},{"id":137122,"url":"https://patchwork.plctlab.org/api/1.2/patches/137122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8363377-75b2-ad5d-5388-54c585dfaf39@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T16:12:58","name":"OpenMP (C only): omp allocate - handle stack vars, improve diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8363377-75b2-ad5d-5388-54c585dfaf39@codesourcery.com/mbox/"},{"id":137123,"url":"https://patchwork.plctlab.org/api/1.2/patches/137123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829172818.3264-1-ef2648@columbia.edu/","msgid":"<20230829172818.3264-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-29T17:28:18","name":"analyzer: implement reference count checking for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829172818.3264-1-ef2648@columbia.edu/mbox/"},{"id":137124,"url":"https://patchwork.plctlab.org/api/1.2/patches/137124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829190156.56643-1-polacek@redhat.com/","msgid":"<20230829190156.56643-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-29T19:01:56","name":"c++: disallow constinit on functions [PR111173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829190156.56643-1-polacek@redhat.com/mbox/"},{"id":137125,"url":"https://patchwork.plctlab.org/api/1.2/patches/137125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO5KI3AIKG9PDiEL@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T19:42:27","name":"RFC: Introduce -fhardened to enable security-related flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO5KI3AIKG9PDiEL@redhat.com/mbox/"},{"id":137126,"url":"https://patchwork.plctlab.org/api/1.2/patches/137126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829221757.3870381-1-dmalcolm@redhat.com/","msgid":"<20230829221757.3870381-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-29T22:17:57","name":"[pushed] analyzer: new warning: -Wanalyzer-overlapping-buffers [PR99860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829221757.3870381-1-dmalcolm@redhat.com/mbox/"},{"id":137127,"url":"https://patchwork.plctlab.org/api/1.2/patches/137127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1a33efe-c43a-f4f5-ea04-38e60e4f9c83@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T23:02:27","name":"[committed] RISC-V: Use splitter to generate zicond in another case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1a33efe-c43a-f4f5-ea04-38e60e4f9c83@ventanamicro.com/mbox/"},{"id":137129,"url":"https://patchwork.plctlab.org/api/1.2/patches/137129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830011256.1898667-1-yanzhang.wang@intel.com/","msgid":"<20230830011256.1898667-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-08-30T01:09:04","name":"Bug 111071: fix the subr with -1 to not due to the simplify.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830011256.1898667-1-yanzhang.wang@intel.com/mbox/"},{"id":137132,"url":"https://patchwork.plctlab.org/api/1.2/patches/137132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-2-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:43","name":"[V3,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-2-lehua.ding@rivai.ai/mbox/"},{"id":137134,"url":"https://patchwork.plctlab.org/api/1.2/patches/137134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-3-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:44","name":"[V3,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-3-lehua.ding@rivai.ai/mbox/"},{"id":137133,"url":"https://patchwork.plctlab.org/api/1.2/patches/137133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-4-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:45","name":"[V3,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-4-lehua.ding@rivai.ai/mbox/"},{"id":137138,"url":"https://patchwork.plctlab.org/api/1.2/patches/137138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-2-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:05","name":"[v2,1/4] LoongArch: improved target configuration interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-2-yangyujie@loongson.cn/mbox/"},{"id":137137,"url":"https://patchwork.plctlab.org/api/1.2/patches/137137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-3-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:06","name":"[v2,2/4] LoongArch: define preprocessing macros \"__loongarch_{arch, tune}\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-3-yangyujie@loongson.cn/mbox/"},{"id":137136,"url":"https://patchwork.plctlab.org/api/1.2/patches/137136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-4-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:07","name":"[v2,3/4] LoongArch: add new configure option --with-strict-align-lib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-4-yangyujie@loongson.cn/mbox/"},{"id":137139,"url":"https://patchwork.plctlab.org/api/1.2/patches/137139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-5-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:08","name":"[v2,4/4] LoongArch: support loongarch*-elf target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-5-yangyujie@loongson.cn/mbox/"},{"id":137140,"url":"https://patchwork.plctlab.org/api/1.2/patches/137140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830022211.2242563-1-juzhe.zhong@rivai.ai/","msgid":"<20230830022211.2242563-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T02:22:11","name":"RISC-V: Make sure we get VL REG operand for VLMAX vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830022211.2242563-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137142,"url":"https://patchwork.plctlab.org/api/1.2/patches/137142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830031201.1901364-1-juzhe.zhong@rivai.ai/","msgid":"<20230830031201.1901364-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T03:12:01","name":"middle-end: Apply MASK_LEN_LOAD_LANES/MASK_LEN_STORE_LANES to ivopts/alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830031201.1901364-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137143,"url":"https://patchwork.plctlab.org/api/1.2/patches/137143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830050307.20356-1-palmer@rivosinc.com/","msgid":"<20230830050307.20356-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-08-30T05:03:07","name":"RISC-V: Document some -march special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830050307.20356-1-palmer@rivosinc.com/mbox/"},{"id":137145,"url":"https://patchwork.plctlab.org/api/1.2/patches/137145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com/","msgid":"<2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-30T06:44:12","name":"[RFC] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137146,"url":"https://patchwork.plctlab.org/api/1.2/patches/137146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-1-guojiufu@linux.ibm.com/","msgid":"<20230830074314.1539093-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T07:43:13","name":"[V4,1/2] rs6000: optimize moving to sf from highpart di","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-1-guojiufu@linux.ibm.com/mbox/"},{"id":137147,"url":"https://patchwork.plctlab.org/api/1.2/patches/137147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-2-guojiufu@linux.ibm.com/","msgid":"<20230830074314.1539093-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T07:43:14","name":"[V4,2/2] rs6000: use mtvsrws to move sf from si p9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-2-guojiufu@linux.ibm.com/mbox/"},{"id":137148,"url":"https://patchwork.plctlab.org/api/1.2/patches/137148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO72LPw2t5Kqbdh7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-30T07:56:28","name":"store-merging: Fix up >= 64 bit insertion [PR111015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO72LPw2t5Kqbdh7@tucnak/mbox/"},{"id":137149,"url":"https://patchwork.plctlab.org/api/1.2/patches/137149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830075653.356338-1-juzhe.zhong@rivai.ai/","msgid":"<20230830075653.356338-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T07:56:53","name":"[V5] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830075653.356338-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137150,"url":"https://patchwork.plctlab.org/api/1.2/patches/137150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830083403.3190749-1-juzhe.zhong@rivai.ai/","msgid":"<20230830083403.3190749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T08:34:03","name":"test: Add xfail for riscv_vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830083403.3190749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137151,"url":"https://patchwork.plctlab.org/api/1.2/patches/137151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO8AwqFXrkBrCAOV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-30T08:41:38","name":"tree-ssa-strlen: Fix up handling of conditionally zero memcpy [PR110914]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO8AwqFXrkBrCAOV@tucnak/mbox/"},{"id":137152,"url":"https://patchwork.plctlab.org/api/1.2/patches/137152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830084444.869230-1-hongtao.liu@intel.com/","msgid":"<20230830084444.869230-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-30T08:44:44","name":"Refactor vector HF/BF mode iterators and patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830084444.869230-1-hongtao.liu@intel.com/mbox/"},{"id":137153,"url":"https://patchwork.plctlab.org/api/1.2/patches/137153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com/","msgid":"<9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com>","list_archive_url":null,"date":"2023-08-30T09:06:17","name":"[1/8] parloops: Copy target and optimizations when creating a function clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com/mbox/"},{"id":137154,"url":"https://patchwork.plctlab.org/api/1.2/patches/137154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com/","msgid":"<0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com>","list_archive_url":null,"date":"2023-08-30T09:08:27","name":"[2/8] parloops: Allow poly nit and bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com/mbox/"},{"id":137155,"url":"https://patchwork.plctlab.org/api/1.2/patches/137155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com/","msgid":"<6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com>","list_archive_url":null,"date":"2023-08-30T09:10:10","name":"[3/8] vect: Fix vect_get_smallest_scalar_type for simd clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com/mbox/"},{"id":137156,"url":"https://patchwork.plctlab.org/api/1.2/patches/137156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49eca251-630e-b26c-5d66-4f8b322ee801@arm.com/","msgid":"<49eca251-630e-b26c-5d66-4f8b322ee801@arm.com>","list_archive_url":null,"date":"2023-08-30T09:11:55","name":"[4/8] vect: don'\''t allow fully masked loops with non-masked simd clones [PR 110485]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49eca251-630e-b26c-5d66-4f8b322ee801@arm.com/mbox/"},{"id":137157,"url":"https://patchwork.plctlab.org/api/1.2/patches/137157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d96af71e-d8e8-0bff-d502-5e54768ac774@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T09:13:27","name":"[5/8] vect: Use inbranch simdclones in masked loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d96af71e-d8e8-0bff-d502-5e54768ac774@arm.com/mbox/"},{"id":137158,"url":"https://patchwork.plctlab.org/api/1.2/patches/137158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com/","msgid":"<4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com>","list_archive_url":null,"date":"2023-08-30T09:14:38","name":"[6/8] vect: Add vector_mode paramater to simd_clone_usable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com/mbox/"},{"id":137159,"url":"https://patchwork.plctlab.org/api/1.2/patches/137159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a65c1f78-1159-d6df-c355-d6f92032ccd2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T09:17:39","name":"[PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a65c1f78-1159-d6df-c355-d6f92032ccd2@arm.com/mbox/"},{"id":137160,"url":"https://patchwork.plctlab.org/api/1.2/patches/137160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com/","msgid":"<25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com>","list_archive_url":null,"date":"2023-08-30T09:19:46","name":"[8/8] aarch64: Add SVE support for simd clones [PR 96342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com/mbox/"},{"id":137161,"url":"https://patchwork.plctlab.org/api/1.2/patches/137161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095134.3571077-1-lehua.ding@rivai.ai/","msgid":"<20230830095134.3571077-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T09:51:34","name":"RISC-V: Fix vsetvl pass ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095134.3571077-1-lehua.ding@rivai.ai/mbox/"},{"id":137162,"url":"https://patchwork.plctlab.org/api/1.2/patches/137162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095253.3571536-1-juzhe.zhong@rivai.ai/","msgid":"<20230830095253.3571536-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T09:52:53","name":"test: Fix XPASS of RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095253.3571536-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137163,"url":"https://patchwork.plctlab.org/api/1.2/patches/137163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-2-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:57","name":"[v3,1/4] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-2-manolis.tsamis@vrull.eu/mbox/"},{"id":137164,"url":"https://patchwork.plctlab.org/api/1.2/patches/137164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-3-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:58","name":"[v3,2/4] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-3-manolis.tsamis@vrull.eu/mbox/"},{"id":137166,"url":"https://patchwork.plctlab.org/api/1.2/patches/137166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-4-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-4-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:59","name":"[v3,3/4] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-4-manolis.tsamis@vrull.eu/mbox/"},{"id":137165,"url":"https://patchwork.plctlab.org/api/1.2/patches/137165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-5-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-5-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:14:00","name":"[v3,4/4] ifcvt: Remove obsolete code for subreg handling in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-5-manolis.tsamis@vrull.eu/mbox/"},{"id":137167,"url":"https://patchwork.plctlab.org/api/1.2/patches/137167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830103516.882926-1-hongtao.liu@intel.com/","msgid":"<20230830103516.882926-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-30T10:35:16","name":"Adjust costing of emulated vectorized gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830103516.882926-1-hongtao.liu@intel.com/mbox/"},{"id":137168,"url":"https://patchwork.plctlab.org/api/1.2/patches/137168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830111835.1288365-1-juzhe.zhong@rivai.ai/","msgid":"<20230830111835.1288365-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:18:35","name":"test: Adapt slp-26.c check for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830111835.1288365-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137169,"url":"https://patchwork.plctlab.org/api/1.2/patches/137169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830114941.1294882-1-juzhe.zhong@rivai.ai/","msgid":"<20230830114941.1294882-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:49:41","name":"test: Add xfail into slp-reduc-7.c for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830114941.1294882-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137170,"url":"https://patchwork.plctlab.org/api/1.2/patches/137170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115327.1296036-1-lehua.ding@rivai.ai/","msgid":"<20230830115327.1296036-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:53:27","name":"RISC-V: Refactor and clean emit_{vlmax, nonvlmax}_xxx functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115327.1296036-1-lehua.ding@rivai.ai/mbox/"},{"id":137171,"url":"https://patchwork.plctlab.org/api/1.2/patches/137171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115447.3E5611353E@imap2.suse-dmz.suse.de/","msgid":"<20230830115447.3E5611353E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-30T11:54:46","name":"tree-optimization/111228 - combine two VEC_PERM_EXPRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115447.3E5611353E@imap2.suse-dmz.suse.de/mbox/"},{"id":137172,"url":"https://patchwork.plctlab.org/api/1.2/patches/137172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830120549.1628109-1-juzhe.zhong@rivai.ai/","msgid":"<20230830120549.1628109-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T12:05:49","name":"[V6] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830120549.1628109-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137173,"url":"https://patchwork.plctlab.org/api/1.2/patches/137173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e52abe71-2364-32e7-d29a-dc05452a06f5@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T12:22:13","name":"expmed: Allow extract_bit_field via mem for low-precision modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e52abe71-2364-32e7-d29a-dc05452a06f5@gmail.com/mbox/"},{"id":137194,"url":"https://patchwork.plctlab.org/api/1.2/patches/137194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830190646.969939-1-dimitar@dinux.eu/","msgid":"<20230830190646.969939-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-08-30T19:06:46","name":"[committed] pru: Add cstore expansion patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830190646.969939-1-dimitar@dinux.eu/mbox/"},{"id":137215,"url":"https://patchwork.plctlab.org/api/1.2/patches/137215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830215708.369610-1-vineetg@rivosinc.com/","msgid":"<20230830215708.369610-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-30T21:57:08","name":"RISC-V: zicond: remove bogus opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830215708.369610-1-vineetg@rivosinc.com/mbox/"},{"id":137216,"url":"https://patchwork.plctlab.org/api/1.2/patches/137216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830222511.685346-1-apinski@marvell.com/","msgid":"<20230830222511.685346-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-30T22:25:11","name":"MATCH: extend min_value/max_value match to vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830222511.685346-1-apinski@marvell.com/mbox/"},{"id":137217,"url":"https://patchwork.plctlab.org/api/1.2/patches/137217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com/","msgid":"<36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T22:42:50","name":"rs6000: Update instruction counts to match vec_* calls [PR111228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com/mbox/"},{"id":137218,"url":"https://patchwork.plctlab.org/api/1.2/patches/137218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com/","msgid":"<2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-30T22:54:57","name":"[RFC,v2,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137221,"url":"https://patchwork.plctlab.org/api/1.2/patches/137221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831024657.57063-1-chenxiaolong@loongson.cn/","msgid":"<20230831024657.57063-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-31T02:46:57","name":"[v4] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831024657.57063-1-chenxiaolong@loongson.cn/mbox/"},{"id":137225,"url":"https://patchwork.plctlab.org/api/1.2/patches/137225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831033113.28028-1-wangfeng@eswincomputing.com/","msgid":"<20230831033113.28028-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T03:31:13","name":"[v2] RISC-V: Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831033113.28028-1-wangfeng@eswincomputing.com/mbox/"},{"id":137226,"url":"https://patchwork.plctlab.org/api/1.2/patches/137226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831050132.733545-1-claziss@gmail.com/","msgid":"<20230831050132.733545-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-08-31T05:01:32","name":"[committed] arc: Honor SWAP option for lsl16 instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831050132.733545-1-claziss@gmail.com/mbox/"},{"id":137230,"url":"https://patchwork.plctlab.org/api/1.2/patches/137230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b_iIXwWwO63ZE1ZSZHUIAdWyA2sqGsE3FM7eXfsInWogDyBZRsw8CwNsvFSDmEVmBtdq0pqb4zJ55HN2JCR7boDNramlEfne-R5PWdUXjbA=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T06:02:36","name":"[1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b_iIXwWwO63ZE1ZSZHUIAdWyA2sqGsE3FM7eXfsInWogDyBZRsw8CwNsvFSDmEVmBtdq0pqb4zJ55HN2JCR7boDNramlEfne-R5PWdUXjbA=@protonmail.com/mbox/"},{"id":137231,"url":"https://patchwork.plctlab.org/api/1.2/patches/137231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-2-gaofei@eswincomputing.com/","msgid":"<20230831062402.6810-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T06:24:01","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-2-gaofei@eswincomputing.com/mbox/"},{"id":137232,"url":"https://patchwork.plctlab.org/api/1.2/patches/137232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-3-gaofei@eswincomputing.com/","msgid":"<20230831062402.6810-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T06:24:02","name":"[2/2,RISC-V] Enalble zcmp for -Os","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-3-gaofei@eswincomputing.com/mbox/"},{"id":137233,"url":"https://patchwork.plctlab.org/api/1.2/patches/137233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com/","msgid":"<1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com>","list_archive_url":null,"date":"2023-08-31T06:46:58","name":"[2/2] c++: Extended diagnostics for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com/mbox/"},{"id":137234,"url":"https://patchwork.plctlab.org/api/1.2/patches/137234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831070257.16848-1-chenxiaolong@loongson.cn/","msgid":"<20230831070257.16848-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-31T07:02:57","name":"[v5] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831070257.16848-1-chenxiaolong@loongson.cn/mbox/"},{"id":137235,"url":"https://patchwork.plctlab.org/api/1.2/patches/137235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPA/L5yBEUC3WZxu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T07:20:15","name":"c++: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPA/L5yBEUC3WZxu@tucnak/mbox/"},{"id":137236,"url":"https://patchwork.plctlab.org/api/1.2/patches/137236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPBKZyVxYKhGMBVY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T08:08:07","name":"[RFC] c++: Diagnose [basic.scope.block]/2 violations even for block externs [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPBKZyVxYKhGMBVY@tucnak/mbox/"},{"id":137241,"url":"https://patchwork.plctlab.org/api/1.2/patches/137241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-2-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:12","name":"[01/13,APX,EGPR] middle-end: Add insn argument to base_reg_class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-2-hongyu.wang@intel.com/mbox/"},{"id":137237,"url":"https://patchwork.plctlab.org/api/1.2/patches/137237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-3-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:13","name":"[02/13,APX,EGPR] middle-end: Add index_reg_class with insn argument.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-3-hongyu.wang@intel.com/mbox/"},{"id":137240,"url":"https://patchwork.plctlab.org/api/1.2/patches/137240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-4-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:14","name":"[03/13,APX_EGPR] Initial support for APX_F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-4-hongyu.wang@intel.com/mbox/"},{"id":137245,"url":"https://patchwork.plctlab.org/api/1.2/patches/137245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-5-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:15","name":"[04/13,APX,EGPR] Add 16 new integer general purpose registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-5-hongyu.wang@intel.com/mbox/"},{"id":137243,"url":"https://patchwork.plctlab.org/api/1.2/patches/137243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-6-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:16","name":"[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-6-hongyu.wang@intel.com/mbox/"},{"id":137239,"url":"https://patchwork.plctlab.org/api/1.2/patches/137239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-7-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:17","name":"[06/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-7-hongyu.wang@intel.com/mbox/"},{"id":137244,"url":"https://patchwork.plctlab.org/api/1.2/patches/137244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-8-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:18","name":"[07/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-8-hongyu.wang@intel.com/mbox/"},{"id":137238,"url":"https://patchwork.plctlab.org/api/1.2/patches/137238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-9-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:19","name":"[08/13,APX,EGPR] Handle GPR16 only vector move insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-9-hongyu.wang@intel.com/mbox/"},{"id":137246,"url":"https://patchwork.plctlab.org/api/1.2/patches/137246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-10-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:20","name":"[09/13,APX,EGPR] Handle legacy insn that only support GPR16 (1/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-10-hongyu.wang@intel.com/mbox/"},{"id":137247,"url":"https://patchwork.plctlab.org/api/1.2/patches/137247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-11-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:21","name":"[10/13,APX,EGPR] Handle legacy insns that only support GPR16 (2/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-11-hongyu.wang@intel.com/mbox/"},{"id":137242,"url":"https://patchwork.plctlab.org/api/1.2/patches/137242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-12-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:22","name":"[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-12-hongyu.wang@intel.com/mbox/"},{"id":137248,"url":"https://patchwork.plctlab.org/api/1.2/patches/137248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-13-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:23","name":"[12/13,APX_EGPR] Handle legacy insns that only support GPR16 (4/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-13-hongyu.wang@intel.com/mbox/"},{"id":137249,"url":"https://patchwork.plctlab.org/api/1.2/patches/137249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-14-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:24","name":"[13/13,APX,EGPR] Handle vex insns that only support GPR16 (5/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-14-hongyu.wang@intel.com/mbox/"},{"id":137252,"url":"https://patchwork.plctlab.org/api/1.2/patches/137252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090547.71737-1-kito.cheng@sifive.com/","msgid":"<20230831090547.71737-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-08-31T09:05:47","name":"RISC-V: Emit .note.GNU-stack for non-linux target as well","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090547.71737-1-kito.cheng@sifive.com/mbox/"},{"id":137253,"url":"https://patchwork.plctlab.org/api/1.2/patches/137253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090621.2687116-1-lehua.ding@rivai.ai/","msgid":"<20230831090621.2687116-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-31T09:06:21","name":"RISC-V: Change vsetvl tail and mask policy to default policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090621.2687116-1-lehua.ding@rivai.ai/mbox/"},{"id":137254,"url":"https://patchwork.plctlab.org/api/1.2/patches/137254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-3-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:15","name":"[v6,2/4] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-3-panchenghui@loongson.cn/mbox/"},{"id":137255,"url":"https://patchwork.plctlab.org/api/1.2/patches/137255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-4-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:16","name":"[v6,3/4] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-4-panchenghui@loongson.cn/mbox/"},{"id":137256,"url":"https://patchwork.plctlab.org/api/1.2/patches/137256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-5-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:17","name":"[v6,4/4] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-5-panchenghui@loongson.cn/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/mbox/"},{"id":30,"url":"https://patchwork.plctlab.org/api/1.2/bundles/30/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-09/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-09","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":137303,"url":"https://patchwork.plctlab.org/api/1.2/patches/137303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedjjz1hs.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:15:59","name":"aarch64: Fix return register handling in untyped_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedjjz1hs.fsf@arm.com/mbox/"},{"id":137305,"url":"https://patchwork.plctlab.org/api/1.2/patches/137305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qfjz13s.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:24:23","name":"lra: Avoid unfolded plus-0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qfjz13s.fsf@arm.com/mbox/"},{"id":137307,"url":"https://patchwork.plctlab.org/api/1.2/patches/137307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPS5khaviCHFDt8SNrL3GRy6WKmTSUW4PRBAhVAZ5LzkSqk47w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:25:45","name":"libstdc++: Use GLIBCXX_CHECK_LINKER_FEATURES for cross-builds (PR111238)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPS5khaviCHFDt8SNrL3GRy6WKmTSUW4PRBAhVAZ5LzkSqk47w@mail.gmail.com/mbox/"},{"id":137328,"url":"https://patchwork.plctlab.org/api/1.2/patches/137328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831172410.731800-1-apinski@marvell.com/","msgid":"<20230831172410.731800-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-31T17:24:10","name":"MATCH [PR19832]: Optimize some `(a != b) ? a OP b : c`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831172410.731800-1-apinski@marvell.com/mbox/"},{"id":137331,"url":"https://patchwork.plctlab.org/api/1.2/patches/137331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173218.583040-1-ewlu@rivosinc.com/","msgid":"<20230831173218.583040-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T17:32:01","name":"RISC-V: Add Types to Un-Typed Risc-v Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173218.583040-1-ewlu@rivosinc.com/mbox/"},{"id":137332,"url":"https://patchwork.plctlab.org/api/1.2/patches/137332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173637.583424-1-ewlu@rivosinc.com/","msgid":"<20230831173637.583424-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T17:36:26","name":"RISC-V Add Types to Un-Typed Thead Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173637.583424-1-ewlu@rivosinc.com/mbox/"},{"id":137338,"url":"https://patchwork.plctlab.org/api/1.2/patches/137338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPDmi9mJYR6l8cJx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T19:14:19","name":"c++, v3: Fix up mangling of function/block scope static structured bindings and emit abi tags [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPDmi9mJYR6l8cJx@tucnak/mbox/"},{"id":137347,"url":"https://patchwork.plctlab.org/api/1.2/patches/137347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b7254ea8-17ae-420c-8b4a-756e3fe2a5f1-1693514575672@3c-app-gmx-bap28/","msgid":"","list_archive_url":null,"date":"2023-08-31T20:42:55","name":"Fortran: runtime bounds-checking in presence of array constructors [PR31059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b7254ea8-17ae-420c-8b4a-756e3fe2a5f1-1693514575672@3c-app-gmx-bap28/mbox/"},{"id":137353,"url":"https://patchwork.plctlab.org/api/1.2/patches/137353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831220452.3126200-1-vultkayn@gcc.gnu.org/","msgid":"<20230831220452.3126200-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-31T22:04:53","name":"analyzer: Add support of placement new and improved operator new [PR105948, PR94355]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831220452.3126200-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137361,"url":"https://patchwork.plctlab.org/api/1.2/patches/137361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831235713.1673863-1-ewlu@rivosinc.com/","msgid":"<20230831235713.1673863-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T23:01:43","name":"Add Types to Un-Typed Pic Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831235713.1673863-1-ewlu@rivosinc.com/mbox/"},{"id":137359,"url":"https://patchwork.plctlab.org/api/1.2/patches/137359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231000.1853225-1-juzhe.zhong@rivai.ai/","msgid":"<20230831231000.1853225-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-31T23:10:00","name":"RISC-V: Enable VECT_COMPARE_COSTS by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231000.1853225-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137360,"url":"https://patchwork.plctlab.org/api/1.2/patches/137360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231217.1853555-1-juzhe.zhong@rivai.ai/","msgid":"<20230831231217.1853555-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-31T23:12:17","name":"RISC-V: Add dynamic LMUL compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231217.1853555-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137362,"url":"https://patchwork.plctlab.org/api/1.2/patches/137362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901022632.754088-1-apinski@marvell.com/","msgid":"<20230901022632.754088-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T02:26:32","name":"MATCH: `(nop_convert)-a` into -(nop_convert)a if the negate is single use and a is known not to be signed min value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901022632.754088-1-apinski@marvell.com/mbox/"},{"id":137365,"url":"https://patchwork.plctlab.org/api/1.2/patches/137365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901032242.57839-1-chenxiaolong@loongson.cn/","msgid":"<20230901032242.57839-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-01T03:22:42","name":"[v6] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901032242.57839-1-chenxiaolong@loongson.cn/mbox/"},{"id":137366,"url":"https://patchwork.plctlab.org/api/1.2/patches/137366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901033332.1774189-1-pan2.li@intel.com/","msgid":"<20230901033332.1774189-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-01T03:33:32","name":"[v1] RISC-V: Support FP ADD/SUB/MUL/DIV autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901033332.1774189-1-pan2.li@intel.com/mbox/"},{"id":137369,"url":"https://patchwork.plctlab.org/api/1.2/patches/137369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-2-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:48","name":"[1/4] RISC-V: Adjust expand_cond_len_{unary,binop,op} api","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-2-lehua.ding@rivai.ai/mbox/"},{"id":137370,"url":"https://patchwork.plctlab.org/api/1.2/patches/137370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-3-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:49","name":"[2/4] RISC-V: Add conditional autovec convert(INT<->INT) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-3-lehua.ding@rivai.ai/mbox/"},{"id":137371,"url":"https://patchwork.plctlab.org/api/1.2/patches/137371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-4-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:50","name":"[3/4] RISC-V: Add conditional autovec convert(FP<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-4-lehua.ding@rivai.ai/mbox/"},{"id":137372,"url":"https://patchwork.plctlab.org/api/1.2/patches/137372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-5-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:51","name":"[4/4] RISC-V: Add conditional autovec convert(INT<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-5-lehua.ding@rivai.ai/mbox/"},{"id":137375,"url":"https://patchwork.plctlab.org/api/1.2/patches/137375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901091731.710880-1-guojiufu@linux.ibm.com/","msgid":"<20230901091731.710880-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-01T09:17:31","name":"[V6] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901091731.710880-1-guojiufu@linux.ibm.com/mbox/"},{"id":137376,"url":"https://patchwork.plctlab.org/api/1.2/patches/137376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c7fff1-1372-98c2-bada-3e732177262e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-01T09:55:55","name":"RISC-V: Add vec_extract for BI -> QI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c7fff1-1372-98c2-bada-3e732177262e@gmail.com/mbox/"},{"id":137377,"url":"https://patchwork.plctlab.org/api/1.2/patches/137377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901102006.511665-1-christoph.muellner@vrull.eu/","msgid":"<20230901102006.511665-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-01T10:20:06","name":"riscv: xtheadcondmov: Don'\''t run tests with -Oz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901102006.511665-1-christoph.muellner@vrull.eu/mbox/"},{"id":137379,"url":"https://patchwork.plctlab.org/api/1.2/patches/137379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105513.226352-1-jwakely@redhat.com/","msgid":"<20230901105513.226352-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:00","name":"[committed] libstdc++: Simplify __format::_Sink::_M_reset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105513.226352-1-jwakely@redhat.com/mbox/"},{"id":137378,"url":"https://patchwork.plctlab.org/api/1.2/patches/137378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105519.226612-1-jwakely@redhat.com/","msgid":"<20230901105519.226612-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:15","name":"[committed] libstdc++: Do not allow chrono::parse to overflow for %C [PR111162]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105519.226612-1-jwakely@redhat.com/mbox/"},{"id":137380,"url":"https://patchwork.plctlab.org/api/1.2/patches/137380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105526.226787-1-jwakely@redhat.com/","msgid":"<20230901105526.226787-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:20","name":"[committed] libstdc++: Fix how chrono::parse handles errors for time-of-day values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105526.226787-1-jwakely@redhat.com/mbox/"},{"id":137381,"url":"https://patchwork.plctlab.org/api/1.2/patches/137381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111713.229441-1-jwakely@redhat.com/","msgid":"<20230901111713.229441-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T11:16:53","name":"[committed] libstdc++: Avoid useless dependency on read_symlink from tzdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111713.229441-1-jwakely@redhat.com/mbox/"},{"id":137382,"url":"https://patchwork.plctlab.org/api/1.2/patches/137382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111722.229474-1-jwakely@redhat.com/","msgid":"<20230901111722.229474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T11:17:14","name":"[committed] libstdc++: Use dg-require-filesystem-ts in link test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111722.229474-1-jwakely@redhat.com/mbox/"},{"id":137383,"url":"https://patchwork.plctlab.org/api/1.2/patches/137383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-1-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:07","name":"[v5,1/4] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-1-kmatsui@gcc.gnu.org/mbox/"},{"id":137384,"url":"https://patchwork.plctlab.org/api/1.2/patches/137384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-2-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:08","name":"[v5,2/4] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137385,"url":"https://patchwork.plctlab.org/api/1.2/patches/137385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-3-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:09","name":"[v5,3/4] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137386,"url":"https://patchwork.plctlab.org/api/1.2/patches/137386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-4-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:10","name":"[v5,4/4] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-4-kmatsui@gcc.gnu.org/mbox/"},{"id":137387,"url":"https://patchwork.plctlab.org/api/1.2/patches/137387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHXiqquRCNCREoX@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:22:34","name":"[v2] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHXiqquRCNCREoX@Thaum.localdomain/mbox/"},{"id":137388,"url":"https://patchwork.plctlab.org/api/1.2/patches/137388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYXvh9dleHKnOR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:26:06","name":"[committed] testsuite: Fix up pr110915* tests on i686-linux [PR110915]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYXvh9dleHKnOR@tucnak/mbox/"},{"id":137389,"url":"https://patchwork.plctlab.org/api/1.2/patches/137389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYujtfjzFl2xR6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:27:38","name":"[committed] testsuite: Fix vectcond-1.C FAIL on i686-linux [PR19832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYujtfjzFl2xR6@tucnak/mbox/"},{"id":137392,"url":"https://patchwork.plctlab.org/api/1.2/patches/137392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17716-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:55:03","name":"AArch64 xorsign: Fix scalar xorsign lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17716-tamar@arm.com/mbox/"},{"id":137393,"url":"https://patchwork.plctlab.org/api/1.2/patches/137393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-2-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:01","name":"[v8,1/4] spec: add a spec function to join arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-2-ben.boeckel@kitware.com/mbox/"},{"id":137395,"url":"https://patchwork.plctlab.org/api/1.2/patches/137395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-3-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:02","name":"[v8,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-3-ben.boeckel@kitware.com/mbox/"},{"id":137394,"url":"https://patchwork.plctlab.org/api/1.2/patches/137394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-4-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:03","name":"[v8,3/4] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-4-ben.boeckel@kitware.com/mbox/"},{"id":137396,"url":"https://patchwork.plctlab.org/api/1.2/patches/137396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHmJl9P/CX5JViM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T13:24:54","name":"c++, v2: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHmJl9P/CX5JViM@tucnak/mbox/"},{"id":137397,"url":"https://patchwork.plctlab.org/api/1.2/patches/137397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHoWgZhqZFQP8cX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T13:34:18","name":"c++, v2: Diagnose [basic.scope.block]/2 violations even for block externs [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHoWgZhqZFQP8cX@tucnak/mbox/"},{"id":137399,"url":"https://patchwork.plctlab.org/api/1.2/patches/137399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPH2dPVbDTDFSBpr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T14:34:28","name":"c++, v3: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPH2dPVbDTDFSBpr@tucnak/mbox/"},{"id":137400,"url":"https://patchwork.plctlab.org/api/1.2/patches/137400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150244.253651-1-jwakely@redhat.com/","msgid":"<20230901150244.253651-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T15:02:19","name":"[committed] libstdc++: Use a loop in atomic_ref::compare_exchange_strong [PR111077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150244.253651-1-jwakely@redhat.com/mbox/"},{"id":137401,"url":"https://patchwork.plctlab.org/api/1.2/patches/137401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150253.253679-1-jwakely@redhat.com/","msgid":"<20230901150253.253679-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T15:02:45","name":"[committed] libstdc++: Use std::string::__resize_and_overwrite in std::filesystem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150253.253679-1-jwakely@redhat.com/mbox/"},{"id":137402,"url":"https://patchwork.plctlab.org/api/1.2/patches/137402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165608.283038-1-jwakely@redhat.com/","msgid":"<20230901165608.283038-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T16:55:51","name":"[committed] libstdc++: Add -Wno-self-move to two filesystem tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165608.283038-1-jwakely@redhat.com/mbox/"},{"id":137403,"url":"https://patchwork.plctlab.org/api/1.2/patches/137403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165613.283062-1-jwakely@redhat.com/","msgid":"<20230901165613.283062-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T16:56:09","name":"[committed] libstdc++: Fix debug-mode tests for constexpr algorithms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165613.283062-1-jwakely@redhat.com/mbox/"},{"id":137404,"url":"https://patchwork.plctlab.org/api/1.2/patches/137404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901172348.445289-1-polacek@redhat.com/","msgid":"<20230901172348.445289-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-01T17:23:48","name":"c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901172348.445289-1-polacek@redhat.com/mbox/"},{"id":137405,"url":"https://patchwork.plctlab.org/api/1.2/patches/137405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-1-apinski@marvell.com/","msgid":"<20230901173059.791894-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T17:30:58","name":"[1/2] VR-VALUES: Rename op0/op1 to op1/op2 for test_for_singularity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-1-apinski@marvell.com/mbox/"},{"id":137406,"url":"https://patchwork.plctlab.org/api/1.2/patches/137406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-2-apinski@marvell.com/","msgid":"<20230901173059.791894-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T17:30:59","name":"[2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-2-apinski@marvell.com/mbox/"},{"id":137407,"url":"https://patchwork.plctlab.org/api/1.2/patches/137407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901185011.154880-1-someguy@effective-light.com/","msgid":"<20230901185011.154880-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-01T18:50:11","name":"c: don'\''t emit -Wmissing-variable-declarations for register variables [PR110947]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901185011.154880-1-someguy@effective-light.com/mbox/"},{"id":137408,"url":"https://patchwork.plctlab.org/api/1.2/patches/137408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901190241.157034-1-someguy@effective-light.com/","msgid":"<20230901190241.157034-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-01T19:02:41","name":"[v2] c: don'\''t emit -Wmissing-variable-declarations for register variables [PR110947]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901190241.157034-1-someguy@effective-light.com/mbox/"},{"id":137409,"url":"https://patchwork.plctlab.org/api/1.2/patches/137409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901191654.320202-1-mikael@gcc.gnu.org/","msgid":"<20230901191654.320202-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T19:16:54","name":"diagnostics: Delete config pointer before overwriting it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901191654.320202-1-mikael@gcc.gnu.org/mbox/"},{"id":137410,"url":"https://patchwork.plctlab.org/api/1.2/patches/137410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195311.761131-1-vineetg@rivosinc.com/","msgid":"<20230901195311.761131-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-09-01T19:53:11","name":"[v2] RISC-V: zicond: Fix opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195311.761131-1-vineetg@rivosinc.com/mbox/"},{"id":137411,"url":"https://patchwork.plctlab.org/api/1.2/patches/137411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195905.2800474-1-vultkayn@gcc.gnu.org/","msgid":"<20230901195905.2800474-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T19:59:06","name":"analyzer: call off a superseding when diagnostics are unrelated [PR110830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195905.2800474-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137413,"url":"https://patchwork.plctlab.org/api/1.2/patches/137413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901225329.6C62533E60@hamza.pair.com/","msgid":"<20230901225329.6C62533E60@hamza.pair.com>","list_archive_url":null,"date":"2023-09-01T22:53:27","name":"[pushed] wwwdocs: gcc-12: Improve language around vectorizer and -O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901225329.6C62533E60@hamza.pair.com/mbox/"},{"id":137414,"url":"https://patchwork.plctlab.org/api/1.2/patches/137414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902000001.873118-1-polacek@redhat.com/","msgid":"<20230902000001.873118-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-02T00:00:01","name":"c++: improve verify_constant diagnostic [PR91483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902000001.873118-1-polacek@redhat.com/mbox/"},{"id":137415,"url":"https://patchwork.plctlab.org/api/1.2/patches/137415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902023238.814338-1-apinski@marvell.com/","msgid":"<20230902023238.814338-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T02:32:38","name":"ssa_name_has_boolean_range vs signed-boolean:31 types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902023238.814338-1-apinski@marvell.com/mbox/"},{"id":137416,"url":"https://patchwork.plctlab.org/api/1.2/patches/137416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902044739.28996-1-guojie@loongson.cn/","msgid":"<20230902044739.28996-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-02T04:47:39","name":"LoongArch: Support loading floating-point zero into MEM[base + index].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902044739.28996-1-guojie@loongson.cn/mbox/"},{"id":137417,"url":"https://patchwork.plctlab.org/api/1.2/patches/137417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902062433.23804-1-chenglulu@loongson.cn/","msgid":"<20230902062433.23804-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-02T06:24:33","name":"[1/2] LoongArch: Optimize switch with sign-extended index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902062433.23804-1-chenglulu@loongson.cn/mbox/"},{"id":137420,"url":"https://patchwork.plctlab.org/api/1.2/patches/137420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070005.824764-1-apinski@marvell.com/","msgid":"<20230902070005.824764-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T07:00:05","name":"MATCH: `(nop_convert)-(convert)a` into -(convert)a if we are converting from something smaller","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070005.824764-1-apinski@marvell.com/mbox/"},{"id":137421,"url":"https://patchwork.plctlab.org/api/1.2/patches/137421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070207.31651-1-guojie@loongson.cn/","msgid":"<20230902070207.31651-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-02T07:02:07","name":"[v2] LoongArch: Support storing floating-point zero into MEM[base + index].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070207.31651-1-guojie@loongson.cn/mbox/"},{"id":137422,"url":"https://patchwork.plctlab.org/api/1.2/patches/137422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902085313.801607-1-pan2.li@intel.com/","msgid":"<20230902085313.801607-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-02T08:53:13","name":"[v1] RISC-V: Support FP MAX/MIN autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902085313.801607-1-pan2.li@intel.com/mbox/"},{"id":137423,"url":"https://patchwork.plctlab.org/api/1.2/patches/137423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902120138.909B133E4B@hamza.pair.com/","msgid":"<20230902120138.909B133E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-09-02T12:01:36","name":"[pushed] wwwdocs: *: Use \"back end\" instead of \"backend\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902120138.909B133E4B@hamza.pair.com/mbox/"},{"id":137425,"url":"https://patchwork.plctlab.org/api/1.2/patches/137425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-1-apinski@marvell.com/","msgid":"<20230902150957.845269-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:55","name":"[1/3] Improve ssa_name_has_boolean_range slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-1-apinski@marvell.com/mbox/"},{"id":137424,"url":"https://patchwork.plctlab.org/api/1.2/patches/137424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-2-apinski@marvell.com/","msgid":"<20230902150957.845269-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:56","name":"[2/3] MATCH: Improve zero_one_valued_p by using ssa_name_has_boolean_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-2-apinski@marvell.com/mbox/"},{"id":137426,"url":"https://patchwork.plctlab.org/api/1.2/patches/137426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-3-apinski@marvell.com/","msgid":"<20230902150957.845269-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:57","name":"[3/3] MATCH: Replace all uses of ssa_name_has_boolean_range with zero_one_valued_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-3-apinski@marvell.com/mbox/"},{"id":137429,"url":"https://patchwork.plctlab.org/api/1.2/patches/137429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903161819.907375-1-apinski@marvell.com/","msgid":"<20230903161819.907375-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T16:18:19","name":"Improve rewrite_to_defined_overflow for lhs already the correct type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903161819.907375-1-apinski@marvell.com/mbox/"},{"id":137430,"url":"https://patchwork.plctlab.org/api/1.2/patches/137430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903162554.908044-1-apinski@marvell.com/","msgid":"<20230903162554.908044-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T16:25:54","name":"MATCH: Transform `(1 >> X) !=/== 0` into `X ==/!= 0`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903162554.908044-1-apinski@marvell.com/mbox/"},{"id":137432,"url":"https://patchwork.plctlab.org/api/1.2/patches/137432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903184706.259231-1-dkm@kataplop.net/","msgid":"<20230903184706.259231-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-03T18:47:06","name":"[v3] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903184706.259231-1-dkm@kataplop.net/mbox/"},{"id":137433,"url":"https://patchwork.plctlab.org/api/1.2/patches/137433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903204947.918766-1-apinski@marvell.com/","msgid":"<20230903204947.918766-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T20:49:47","name":"MATCH: Add pattern for `(x | y) & (x & z)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903204947.918766-1-apinski@marvell.com/mbox/"},{"id":137434,"url":"https://patchwork.plctlab.org/api/1.2/patches/137434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com/","msgid":"<3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-04T00:20:45","name":"RISC-V: Fix Zicond ICE on large constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137435,"url":"https://patchwork.plctlab.org/api/1.2/patches/137435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904002135.928111-1-apinski@marvell.com/","msgid":"<20230904002135.928111-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-04T00:21:35","name":"MATCH: Add `~MAX(~X, Y)` pattern: [PR96694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904002135.928111-1-apinski@marvell.com/mbox/"},{"id":137436,"url":"https://patchwork.plctlab.org/api/1.2/patches/137436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904012536.930677-1-apinski@marvell.com/","msgid":"<20230904012536.930677-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-04T01:25:36","name":"MATCH: Add `(x | c) & ~(y | c)` and `x & ~(y | x)` patterns [PR98710]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904012536.930677-1-apinski@marvell.com/mbox/"},{"id":137437,"url":"https://patchwork.plctlab.org/api/1.2/patches/137437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904024210.64907-1-yangyujie@loongson.cn/","msgid":"<20230904024210.64907-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-04T02:42:10","name":"[v2] LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904024210.64907-1-yangyujie@loongson.cn/mbox/"},{"id":137438,"url":"https://patchwork.plctlab.org/api/1.2/patches/137438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904044906.2546875-1-lehua.ding@rivai.ai/","msgid":"<20230904044906.2546875-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-04T04:49:06","name":"RISC-V: Add conditional sqrt autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904044906.2546875-1-lehua.ding@rivai.ai/mbox/"},{"id":137440,"url":"https://patchwork.plctlab.org/api/1.2/patches/137440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com/","msgid":"<9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T05:33:28","name":"[PATCH-1v2,rs6000] Enable SImode in FP registers on P7 [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com/mbox/"},{"id":137439,"url":"https://patchwork.plctlab.org/api/1.2/patches/137439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com/","msgid":"<45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T05:33:45","name":"[PATCH-2v2,rs6000] Implement 32bit inline lrint [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com/mbox/"},{"id":137442,"url":"https://patchwork.plctlab.org/api/1.2/patches/137442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904071737.2736869-1-pan2.li@intel.com/","msgid":"<20230904071737.2736869-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-04T07:17:37","name":"[v1] RISC-V: Support FP16 for RVV VRGATHEREI16 intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904071737.2736869-1-pan2.li@intel.com/mbox/"},{"id":137443,"url":"https://patchwork.plctlab.org/api/1.2/patches/137443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com/","msgid":"<1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T07:57:42","name":"[3/4] Improve functionality of ree pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com/mbox/"},{"id":137444,"url":"https://patchwork.plctlab.org/api/1.2/patches/137444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904090834.148723-1-juzhe.zhong@rivai.ai/","msgid":"<20230904090834.148723-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-04T09:08:34","name":"RISC-V: Fix Dynamic LMUL compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904090834.148723-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137445,"url":"https://patchwork.plctlab.org/api/1.2/patches/137445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904101510.1380787-1-hongtao.liu@intel.com/","msgid":"<20230904101510.1380787-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-04T10:15:10","name":"Generate vmovsh instead of vpblendw for specific vec_merge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904101510.1380787-1-hongtao.liu@intel.com/mbox/"},{"id":137446,"url":"https://patchwork.plctlab.org/api/1.2/patches/137446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904104725.49994-1-iain@sandoe.co.uk/","msgid":"<20230904104725.49994-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T10:47:25","name":"[pushed] Darwin, machopic: Debug printer for macho symbol flags.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904104725.49994-1-iain@sandoe.co.uk/mbox/"},{"id":137447,"url":"https://patchwork.plctlab.org/api/1.2/patches/137447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904105759.17192-1-iain@sandoe.co.uk/","msgid":"<20230904105759.17192-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T10:57:59","name":"[pushed] Darwin: Match system sections and relocs for exception tables.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904105759.17192-1-iain@sandoe.co.uk/mbox/"},{"id":137448,"url":"https://patchwork.plctlab.org/api/1.2/patches/137448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904111410.3362365-1-lehua.ding@rivai.ai/","msgid":"<20230904111410.3362365-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-04T11:14:10","name":"RISC-V: Keep vlmax vector operators in simple form until split1 pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904111410.3362365-1-lehua.ding@rivai.ai/mbox/"},{"id":137449,"url":"https://patchwork.plctlab.org/api/1.2/patches/137449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904112957.8713-1-iain@sandoe.co.uk/","msgid":"<20230904112957.8713-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T11:29:57","name":"Darwin: Place global inits in the correct section.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904112957.8713-1-iain@sandoe.co.uk/mbox/"},{"id":137450,"url":"https://patchwork.plctlab.org/api/1.2/patches/137450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904113519.8865-1-iain@sandoe.co.uk/","msgid":"<20230904113519.8865-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T11:35:19","name":"[pushed] Darwin, ppc: Add system stubs for all 32b PPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904113519.8865-1-iain@sandoe.co.uk/mbox/"},{"id":137451,"url":"https://patchwork.plctlab.org/api/1.2/patches/137451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904123113.2087352-1-christophe.lyon@linaro.org/","msgid":"<20230904123113.2087352-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-04T12:31:13","name":"testsuite: Remove unwanted '\''dg-do run'\'' from gcc.dg/vect tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904123113.2087352-1-christophe.lyon@linaro.org/mbox/"},{"id":137452,"url":"https://patchwork.plctlab.org/api/1.2/patches/137452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-09-04T12:54:26","name":"Add '\''libgomp.c-c++-common/pr100059-1.c'\'' [PR100059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":137453,"url":"https://patchwork.plctlab.org/api/1.2/patches/137453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904134745.177632-1-juzhe.zhong@rivai.ai/","msgid":"<20230904134745.177632-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-04T13:47:45","name":"RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904134745.177632-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137454,"url":"https://patchwork.plctlab.org/api/1.2/patches/137454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkehx5x1.fsf@euler.schwinge.homeip.net/","msgid":"<87bkehx5x1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-04T16:24:42","name":"[WIP] nvptx: Also allow immediate input operand to '\''bitrev2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkehx5x1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137456,"url":"https://patchwork.plctlab.org/api/1.2/patches/137456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162909.515880-1-jwakely@redhat.com/","msgid":"<20230904162909.515880-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:28:48","name":"[committed] libstdc++: Add missing target selector to std::expected test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162909.515880-1-jwakely@redhat.com/mbox/"},{"id":137458,"url":"https://patchwork.plctlab.org/api/1.2/patches/137458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162914.515900-1-jwakely@redhat.com/","msgid":"<20230904162914.515900-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:10","name":"[committed] libstdc++: Add explicit -std=gnu++98 to tests that use { target c++98_only }","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162914.515900-1-jwakely@redhat.com/mbox/"},{"id":137455,"url":"https://patchwork.plctlab.org/api/1.2/patches/137455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162918.515915-1-jwakely@redhat.com/","msgid":"<20230904162918.515915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:15","name":"[committed] libstdc++: Add { target c++98_only } to tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162918.515915-1-jwakely@redhat.com/mbox/"},{"id":137457,"url":"https://patchwork.plctlab.org/api/1.2/patches/137457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162922.515929-1-jwakely@redhat.com/","msgid":"<20230904162922.515929-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:19","name":"[committed] libstdc++: Fix filenames and comments in tests [PR26142]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162922.515929-1-jwakely@redhat.com/mbox/"},{"id":137460,"url":"https://patchwork.plctlab.org/api/1.2/patches/137460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162926.515943-1-jwakely@redhat.com/","msgid":"<20230904162926.515943-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:23","name":"[committed] libstdc++: Enable std::auto_ptr tests for C++11 and later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162926.515943-1-jwakely@redhat.com/mbox/"},{"id":137459,"url":"https://patchwork.plctlab.org/api/1.2/patches/137459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162931.515957-1-jwakely@redhat.com/","msgid":"<20230904162931.515957-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:27","name":"[committed] libstdc++: Remove dg-options \"-std=c++98\" from TR1 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162931.515957-1-jwakely@redhat.com/mbox/"},{"id":137461,"url":"https://patchwork.plctlab.org/api/1.2/patches/137461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162936.515987-1-jwakely@redhat.com/","msgid":"<20230904162936.515987-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:32","name":"[committed] libstdc++: Remove unnecessary dg-options and outdated comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162936.515987-1-jwakely@redhat.com/mbox/"},{"id":137462,"url":"https://patchwork.plctlab.org/api/1.2/patches/137462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904171858.2660517-1-vultkayn@gcc.gnu.org/","msgid":"<20230904171858.2660517-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-04T17:18:59","name":"c++: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904171858.2660517-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137463,"url":"https://patchwork.plctlab.org/api/1.2/patches/137463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904180013.2680227-1-vultkayn@gcc.gnu.org/","msgid":"<20230904180013.2680227-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-04T18:00:14","name":"analyzer: Move gcc.dg/analyzer tests to c-c++-common (2) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904180013.2680227-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137464,"url":"https://patchwork.plctlab.org/api/1.2/patches/137464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-1-someguy@effective-light.com/","msgid":"<20230904185353.204611-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T18:53:52","name":"[1/2] strlen: fold strstr() even if the length isn'\''t previously known [PR96601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-1-someguy@effective-light.com/mbox/"},{"id":137465,"url":"https://patchwork.plctlab.org/api/1.2/patches/137465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-2-someguy@effective-light.com/","msgid":"<20230904185353.204611-2-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T18:53:53","name":"[2/2] strlen: call handle_builtin_strlen() from fold_strstr_to_strncmp()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-2-someguy@effective-light.com/mbox/"},{"id":137466,"url":"https://patchwork.plctlab.org/api/1.2/patches/137466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPYzJ03Dh62ug596@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-04T19:42:31","name":"[15/12] Add further _BitInt <-> floating point tests [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPYzJ03Dh62ug596@tucnak/mbox/"},{"id":137467,"url":"https://patchwork.plctlab.org/api/1.2/patches/137467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904195446.285310-1-dkm@kataplop.net/","msgid":"<20230904195446.285310-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-04T19:54:46","name":"[COMMITED,v4] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904195446.285310-1-dkm@kataplop.net/mbox/"},{"id":137468,"url":"https://patchwork.plctlab.org/api/1.2/patches/137468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-1-someguy@effective-light.com/","msgid":"<20230904205814.222166-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T20:58:13","name":"[v2,1/2] strlen: fold strstr() even if the length isn'\''t previously known [PR96601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-1-someguy@effective-light.com/mbox/"},{"id":137469,"url":"https://patchwork.plctlab.org/api/1.2/patches/137469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-2-someguy@effective-light.com/","msgid":"<20230904205814.222166-2-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T20:58:14","name":"[v2,2/2] strlen: call handle_builtin_strlen() from fold_strstr_to_strncmp()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-2-someguy@effective-light.com/mbox/"},{"id":137470,"url":"https://patchwork.plctlab.org/api/1.2/patches/137470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jk9wsxq.fsf@euler.schwinge.homeip.net/","msgid":"<874jk9wsxq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-04T21:05:05","name":"[WIP] testsuite: Port '\''check-function-bodies'\'' to nvptx (was: Add dg test for matching function bodies)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jk9wsxq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137471,"url":"https://patchwork.plctlab.org/api/1.2/patches/137471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905021334.39124-1-ef2648@columbia.edu/","msgid":"<20230905021334.39124-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-09-05T02:13:34","name":"analyzer: implement symbolic value support for CPython plugin'\''s refcnt checker [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905021334.39124-1-ef2648@columbia.edu/mbox/"},{"id":137475,"url":"https://patchwork.plctlab.org/api/1.2/patches/137475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905060348.4207-1-chenglulu@loongson.cn/","msgid":"<20230905060348.4207-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-05T06:03:49","name":"[v1] LoongArch: Optimized multiply instruction generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905060348.4207-1-chenglulu@loongson.cn/mbox/"},{"id":137476,"url":"https://patchwork.plctlab.org/api/1.2/patches/137476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbV3yNSwdFY6khb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:16:47","name":"[16/12] _BitInt profile fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbV3yNSwdFY6khb@tucnak/mbox/"},{"id":137477,"url":"https://patchwork.plctlab.org/api/1.2/patches/137477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbYgbXPHw1TkSZD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:28:01","name":"[17/12] _BitInt a ? ~b : b match.pd fix [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbYgbXPHw1TkSZD@tucnak/mbox/"},{"id":137478,"url":"https://patchwork.plctlab.org/api/1.2/patches/137478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbZGGqmV8L+/rni@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:30:32","name":"[18/12] Handle BITINT_TYPE in build_{, minus_}one_cst [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbZGGqmV8L+/rni@tucnak/mbox/"},{"id":137479,"url":"https://patchwork.plctlab.org/api/1.2/patches/137479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbaXTuV2ARYl4ew@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:35:57","name":"[committed] tree-ssa-tail-merge: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbaXTuV2ARYl4ew@tucnak/mbox/"},{"id":137481,"url":"https://patchwork.plctlab.org/api/1.2/patches/137481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-2-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:50","name":"[V5,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-2-lehua.ding@rivai.ai/mbox/"},{"id":137480,"url":"https://patchwork.plctlab.org/api/1.2/patches/137480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-3-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:51","name":"[V5,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-3-lehua.ding@rivai.ai/mbox/"},{"id":137482,"url":"https://patchwork.plctlab.org/api/1.2/patches/137482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-4-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:52","name":"[V5,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-4-lehua.ding@rivai.ai/mbox/"},{"id":137486,"url":"https://patchwork.plctlab.org/api/1.2/patches/137486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7tt4za.fsf@euler.schwinge.homeip.net/","msgid":"<87sf7tt4za.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-05T08:10:49","name":"GNU Tools Cauldron 2023","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7tt4za.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137487,"url":"https://patchwork.plctlab.org/api/1.2/patches/137487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-1-claziss@gmail.com/","msgid":"<20230905084234.114788-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-09-05T08:42:33","name":"[committed,1/2] arc: Remove obsolete mbbit-peephole option and unused patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-1-claziss@gmail.com/mbox/"},{"id":137488,"url":"https://patchwork.plctlab.org/api/1.2/patches/137488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-2-claziss@gmail.com/","msgid":"<20230905084234.114788-2-claziss@gmail.com>","list_archive_url":null,"date":"2023-09-05T08:42:34","name":"[committed,2/2] arc: Cleanup addsi3 instruction pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-2-claziss@gmail.com/mbox/"},{"id":137489,"url":"https://patchwork.plctlab.org/api/1.2/patches/137489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084725.1212443-1-juzhe.zhong@rivai.ai/","msgid":"<20230905084725.1212443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-05T08:47:25","name":"RISC-V: Export functions as global extern preparing for dynamic LMUL patch use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084725.1212443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137490,"url":"https://patchwork.plctlab.org/api/1.2/patches/137490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905085606.1216832-1-juzhe.zhong@rivai.ai/","msgid":"<20230905085606.1216832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-05T08:56:06","name":"[V2] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905085606.1216832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137494,"url":"https://patchwork.plctlab.org/api/1.2/patches/137494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp/","msgid":"<0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp>","list_archive_url":null,"date":"2023-09-05T09:27:35","name":"xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp/mbox/"},{"id":137495,"url":"https://patchwork.plctlab.org/api/1.2/patches/137495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905103204.2267415-1-pan2.li@intel.com/","msgid":"<20230905103204.2267415-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-05T10:32:04","name":"[v1] RISC-V: Support FP SGNJ autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905103204.2267415-1-pan2.li@intel.com/mbox/"},{"id":137496,"url":"https://patchwork.plctlab.org/api/1.2/patches/137496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110741.561950-1-poulhies@adacore.com/","msgid":"<20230905110741.561950-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:41","name":"[COMMITTED] Revert \"Adjust one Ada test\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110741.561950-1-poulhies@adacore.com/mbox/"},{"id":137501,"url":"https://patchwork.plctlab.org/api/1.2/patches/137501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110751.562099-1-poulhies@adacore.com/","msgid":"<20230905110751.562099-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:51","name":"[COMMITTED] ada: Tweak comment about tasking corner case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110751.562099-1-poulhies@adacore.com/mbox/"},{"id":137497,"url":"https://patchwork.plctlab.org/api/1.2/patches/137497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110753.562161-1-poulhies@adacore.com/","msgid":"<20230905110753.562161-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:53","name":"[COMMITTED] ada: Enforce subtype conformance of interface primitives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110753.562161-1-poulhies@adacore.com/mbox/"},{"id":137507,"url":"https://patchwork.plctlab.org/api/1.2/patches/137507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110755.562222-1-poulhies@adacore.com/","msgid":"<20230905110755.562222-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:55","name":"[COMMITTED] ada: Handle GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110755.562222-1-poulhies@adacore.com/mbox/"},{"id":137498,"url":"https://patchwork.plctlab.org/api/1.2/patches/137498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110757.562283-1-poulhies@adacore.com/","msgid":"<20230905110757.562283-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:57","name":"[COMMITTED] ada: Add missing units to Makefile.rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110757.562283-1-poulhies@adacore.com/mbox/"},{"id":137499,"url":"https://patchwork.plctlab.org/api/1.2/patches/137499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110759.562386-1-poulhies@adacore.com/","msgid":"<20230905110759.562386-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:59","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110759.562386-1-poulhies@adacore.com/mbox/"},{"id":137511,"url":"https://patchwork.plctlab.org/api/1.2/patches/137511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110802.562452-1-poulhies@adacore.com/","msgid":"<20230905110802.562452-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:02","name":"[COMMITTED] ada: Fix internal error on instantiation with private component type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110802.562452-1-poulhies@adacore.com/mbox/"},{"id":137514,"url":"https://patchwork.plctlab.org/api/1.2/patches/137514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110804.562514-1-poulhies@adacore.com/","msgid":"<20230905110804.562514-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:04","name":"[COMMITTED] ada: Preserve capability validity in address arithmetic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110804.562514-1-poulhies@adacore.com/mbox/"},{"id":137517,"url":"https://patchwork.plctlab.org/api/1.2/patches/137517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110806.562575-1-poulhies@adacore.com/","msgid":"<20230905110806.562575-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:06","name":"[COMMITTED] ada: building_executable_programs_with_gnat.rst: fix -gnatw.x index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110806.562575-1-poulhies@adacore.com/mbox/"},{"id":137518,"url":"https://patchwork.plctlab.org/api/1.2/patches/137518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110808.562636-1-poulhies@adacore.com/","msgid":"<20230905110808.562636-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:08","name":"[COMMITTED] ada: Support setting task affinity on QNX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110808.562636-1-poulhies@adacore.com/mbox/"},{"id":137504,"url":"https://patchwork.plctlab.org/api/1.2/patches/137504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110810.562697-1-poulhies@adacore.com/","msgid":"<20230905110810.562697-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:10","name":"[COMMITTED] ada: Spurious warning about negative modular literal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110810.562697-1-poulhies@adacore.com/mbox/"},{"id":137502,"url":"https://patchwork.plctlab.org/api/1.2/patches/137502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110812.562762-1-poulhies@adacore.com/","msgid":"<20230905110812.562762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:12","name":"[COMMITTED] ada: Compiler hangs on invalid postcondition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110812.562762-1-poulhies@adacore.com/mbox/"},{"id":137503,"url":"https://patchwork.plctlab.org/api/1.2/patches/137503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110814.562829-1-poulhies@adacore.com/","msgid":"<20230905110814.562829-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:14","name":"[COMMITTED] ada: Crash on function returning empty Ada 2022 aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110814.562829-1-poulhies@adacore.com/mbox/"},{"id":137506,"url":"https://patchwork.plctlab.org/api/1.2/patches/137506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110816.562928-1-poulhies@adacore.com/","msgid":"<20230905110816.562928-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:16","name":"[COMMITTED] ada: Pass -msmp when linking for ppc-vx6 --RTS=rtp-smp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110816.562928-1-poulhies@adacore.com/mbox/"},{"id":137508,"url":"https://patchwork.plctlab.org/api/1.2/patches/137508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110818.562990-1-poulhies@adacore.com/","msgid":"<20230905110818.562990-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:18","name":"[COMMITTED] ada: Crash on creation of extra formals on type extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110818.562990-1-poulhies@adacore.com/mbox/"},{"id":137510,"url":"https://patchwork.plctlab.org/api/1.2/patches/137510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110820.563052-1-poulhies@adacore.com/","msgid":"<20230905110820.563052-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:20","name":"[COMMITTED] ada: Remove TBC comment, no more needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110820.563052-1-poulhies@adacore.com/mbox/"},{"id":137500,"url":"https://patchwork.plctlab.org/api/1.2/patches/137500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110822.563115-1-poulhies@adacore.com/","msgid":"<20230905110822.563115-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:22","name":"[COMMITTED] ada: Fix assertion failure on very peculiar enumeration type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110822.563115-1-poulhies@adacore.com/mbox/"},{"id":137519,"url":"https://patchwork.plctlab.org/api/1.2/patches/137519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110824.563177-1-poulhies@adacore.com/","msgid":"<20230905110824.563177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:24","name":"[COMMITTED] ada: Fix spurious warning emissions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110824.563177-1-poulhies@adacore.com/mbox/"},{"id":137505,"url":"https://patchwork.plctlab.org/api/1.2/patches/137505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110826.563238-1-poulhies@adacore.com/","msgid":"<20230905110826.563238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:26","name":"[COMMITTED] ada: Fix crash on selected component lookup in generic instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110826.563238-1-poulhies@adacore.com/mbox/"},{"id":137515,"url":"https://patchwork.plctlab.org/api/1.2/patches/137515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110828.563299-1-poulhies@adacore.com/","msgid":"<20230905110828.563299-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:28","name":"[COMMITTED] ada: Fix problematic secondary stack management in protected entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110828.563299-1-poulhies@adacore.com/mbox/"},{"id":137509,"url":"https://patchwork.plctlab.org/api/1.2/patches/137509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110832.563364-1-poulhies@adacore.com/","msgid":"<20230905110832.563364-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:32","name":"[COMMITTED] ada: Remove redundant guard against an empty list of interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110832.563364-1-poulhies@adacore.com/mbox/"},{"id":137513,"url":"https://patchwork.plctlab.org/api/1.2/patches/137513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110833.563425-1-poulhies@adacore.com/","msgid":"<20230905110833.563425-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:33","name":"[COMMITTED] ada: Add guard before querying the type for its interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110833.563425-1-poulhies@adacore.com/mbox/"},{"id":137516,"url":"https://patchwork.plctlab.org/api/1.2/patches/137516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110835.563486-1-poulhies@adacore.com/","msgid":"<20230905110835.563486-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:35","name":"[COMMITTED] ada: Remove redundant protection against empty list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110835.563486-1-poulhies@adacore.com/mbox/"},{"id":137512,"url":"https://patchwork.plctlab.org/api/1.2/patches/137512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110837.563547-1-poulhies@adacore.com/","msgid":"<20230905110837.563547-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:37","name":"[COMMITTED] ada: Fix DWARF for certain arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110837.563547-1-poulhies@adacore.com/mbox/"},{"id":137520,"url":"https://patchwork.plctlab.org/api/1.2/patches/137520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110840.563652-1-poulhies@adacore.com/","msgid":"<20230905110840.563652-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:40","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110840.563652-1-poulhies@adacore.com/mbox/"},{"id":137521,"url":"https://patchwork.plctlab.org/api/1.2/patches/137521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com/","msgid":"<37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-05T12:08:53","name":"[v2] RISC-V: Fix Zicond ICE on large constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137522,"url":"https://patchwork.plctlab.org/api/1.2/patches/137522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d143e140125ed69ab108f3623bfde61d662b4f18.1693915780.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T12:10:20","name":"[v3,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d143e140125ed69ab108f3623bfde61d662b4f18.1693915780.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137523,"url":"https://patchwork.plctlab.org/api/1.2/patches/137523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg20vmka.fsf@euler.schwinge.homeip.net/","msgid":"<87zg20vmka.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-05T12:20:21","name":"testsuite: Port '\''check-function-bodies'\'' to nvptx (was: Add dg test for matching function bodies)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg20vmka.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137524,"url":"https://patchwork.plctlab.org/api/1.2/patches/137524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPcxnxjX7quZWGNM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T13:48:15","name":"c: Don'\''t pedwarn on _FloatN{,x} or {f,F}N{,x} suffixes for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPcxnxjX7quZWGNM@tucnak/mbox/"},{"id":137525,"url":"https://patchwork.plctlab.org/api/1.2/patches/137525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f046d7d4-7dd4-28f2-10b9-6d266e3c0896@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T14:37:46","name":"contrib/gcc-changelog: Check whether revert-commit exists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f046d7d4-7dd4-28f2-10b9-6d266e3c0896@codesourcery.com/mbox/"},{"id":137528,"url":"https://patchwork.plctlab.org/api/1.2/patches/137528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com/","msgid":"<0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T14:56:09","name":"[committed] OpenMP: Avoid ICE in c_parser_omp_clause_allocate with invalid expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com/mbox/"},{"id":137529,"url":"https://patchwork.plctlab.org/api/1.2/patches/137529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905152015.9738-1-vineetg@rivosinc.com/","msgid":"<20230905152015.9738-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-09-05T15:20:15","name":"[Committed] RISC-V: zicond: Fix opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905152015.9738-1-vineetg@rivosinc.com/mbox/"},{"id":137530,"url":"https://patchwork.plctlab.org/api/1.2/patches/137530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905154234.3316144-1-christoph.muellner@vrull.eu/","msgid":"<20230905154234.3316144-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-05T15:42:34","name":"riscv: xtheadbb: Enable constant synthesis with th.srri","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905154234.3316144-1-christoph.muellner@vrull.eu/mbox/"},{"id":137540,"url":"https://patchwork.plctlab.org/api/1.2/patches/137540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9aaf9e0db1da9dc8c1e163f4c3696ef73b66a46.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:21","name":"[1/8] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9aaf9e0db1da9dc8c1e163f4c3696ef73b66a46.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137538,"url":"https://patchwork.plctlab.org/api/1.2/patches/137538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com/","msgid":"<78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:22","name":"[2/8] OpenMP: lvalue parsing for map/to/from clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137539,"url":"https://patchwork.plctlab.org/api/1.2/patches/137539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba39536bd6229408ebabfc8c99fda28b2237787f.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:23","name":"[3/8] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba39536bd6229408ebabfc8c99fda28b2237787f.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137541,"url":"https://patchwork.plctlab.org/api/1.2/patches/137541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com/","msgid":"<8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:24","name":"[4/8] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137542,"url":"https://patchwork.plctlab.org/api/1.2/patches/137542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f1336860c3f9118c9984d7a0da38653070a80e.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:25","name":"[5/8] OpenMP, Fortran: Pass list number to gfc_free_omp_namelist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f1336860c3f9118c9984d7a0da38653070a80e.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137543,"url":"https://patchwork.plctlab.org/api/1.2/patches/137543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2e6f0fe8f9827a0b176d4fa92798498ebe7fd50.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:26","name":"[6/8] OpenMP, Fortran: Per-directive control for gfc_trans_omp_clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2e6f0fe8f9827a0b176d4fa92798498ebe7fd50.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137544,"url":"https://patchwork.plctlab.org/api/1.2/patches/137544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f15d835e45a74558212895d272a9d7223b43edb6.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:27","name":"[7/8] OpenMP, Fortran: Split out OMP clause checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f15d835e45a74558212895d272a9d7223b43edb6.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137545,"url":"https://patchwork.plctlab.org/api/1.2/patches/137545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com/","msgid":"<2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:28","name":"[8/8] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137547,"url":"https://patchwork.plctlab.org/api/1.2/patches/137547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905211559.2871358-1-christoph.muellner@vrull.eu/","msgid":"<20230905211559.2871358-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-05T21:15:59","name":"riscv: Synthesize all 11-bit-rotate constants with rori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905211559.2871358-1-christoph.muellner@vrull.eu/mbox/"},{"id":137548,"url":"https://patchwork.plctlab.org/api/1.2/patches/137548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com/","msgid":"<8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com>","list_archive_url":null,"date":"2023-09-05T21:41:50","name":"[committed] RISC-V: Expose bswapsi for TARGET_64BIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com/mbox/"},{"id":137549,"url":"https://patchwork.plctlab.org/api/1.2/patches/137549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906020216.5995-1-wangfeng@eswincomputing.com/","msgid":"<20230906020216.5995-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T02:02:16","name":"[v3] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906020216.5995-1-wangfeng@eswincomputing.com/mbox/"},{"id":137551,"url":"https://patchwork.plctlab.org/api/1.2/patches/137551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com/","msgid":"<254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-06T02:38:43","name":"[COMMITTED] RISC-V: typo: add closing paren to a comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137552,"url":"https://patchwork.plctlab.org/api/1.2/patches/137552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906031931.622583-1-jason@redhat.com/","msgid":"<20230906031931.622583-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-06T03:19:31","name":"[pushed] c++: [[no_unique_address]] and cv-qualified type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906031931.622583-1-jason@redhat.com/mbox/"},{"id":137553,"url":"https://patchwork.plctlab.org/api/1.2/patches/137553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com/","msgid":"<018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-06T05:47:07","name":"[v4,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137554,"url":"https://patchwork.plctlab.org/api/1.2/patches/137554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c83c9f9f05bf5577eeaf3633c5c2e494ac0a11fd.1693991759.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T09:34:30","name":"[1/5] OpenMP, NVPTX: memcpy[23]D bias correction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c83c9f9f05bf5577eeaf3633c5c2e494ac0a11fd.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137555,"url":"https://patchwork.plctlab.org/api/1.2/patches/137555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com/","msgid":"<463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:31","name":"[2/5] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137557,"url":"https://patchwork.plctlab.org/api/1.2/patches/137557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com/","msgid":"<4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:32","name":"[3/5] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137558,"url":"https://patchwork.plctlab.org/api/1.2/patches/137558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c998e474d8ce5bf0e0507bcb1fd6550daca3ab6e.1693991759.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T09:34:33","name":"[4/5] OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c998e474d8ce5bf0e0507bcb1fd6550daca3ab6e.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137556,"url":"https://patchwork.plctlab.org/api/1.2/patches/137556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com/","msgid":"<2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:34","name":"[5/5] OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137559,"url":"https://patchwork.plctlab.org/api/1.2/patches/137559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-2-gaofei@eswincomputing.com/","msgid":"<20230906093909.32207-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T09:39:08","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-2-gaofei@eswincomputing.com/mbox/"},{"id":137560,"url":"https://patchwork.plctlab.org/api/1.2/patches/137560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-3-gaofei@eswincomputing.com/","msgid":"<20230906093909.32207-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T09:39:09","name":"[2/2,V2,RISC-V] enable muti push and pop for Zcmp when shrink-wrap-separate is ineffective","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-3-gaofei@eswincomputing.com/mbox/"},{"id":137561,"url":"https://patchwork.plctlab.org/api/1.2/patches/137561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906094759.4040203-1-juzhe.zhong@rivai.ai/","msgid":"<20230906094759.4040203-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T09:47:59","name":"RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906094759.4040203-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137562,"url":"https://patchwork.plctlab.org/api/1.2/patches/137562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095504.32204-1-julian@codesourcery.com/","msgid":"<20230906095504.32204-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:55:04","name":"OpenMP: Enable '\''declare mapper'\'' mappers for '\''target update'\'' directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095504.32204-1-julian@codesourcery.com/mbox/"},{"id":137564,"url":"https://patchwork.plctlab.org/api/1.2/patches/137564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095747.25772-1-yangyujie@loongson.cn/","msgid":"<20230906095747.25772-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-06T09:57:47","name":"LoongArch: Fix unintentional bash-ism in r14-3665.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095747.25772-1-yangyujie@loongson.cn/mbox/"},{"id":137565,"url":"https://patchwork.plctlab.org/api/1.2/patches/137565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100423.4181932-1-christoph.muellner@vrull.eu/","msgid":"<20230906100423.4181932-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T10:04:23","name":"riscv: xtheadbb: Fix xtheadbb-li-rotr test for rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100423.4181932-1-christoph.muellner@vrull.eu/mbox/"},{"id":137566,"url":"https://patchwork.plctlab.org/api/1.2/patches/137566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100628.26033-1-yangyujie@loongson.cn/","msgid":"<20230906100628.26033-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:06:28","name":"LoongArch: Link c++ header directory in the default ABI to the toplevel.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100628.26033-1-yangyujie@loongson.cn/mbox/"},{"id":137567,"url":"https://patchwork.plctlab.org/api/1.2/patches/137567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104307.37244-2-chenxiaolong@loongson.cn/","msgid":"<20230906104307.37244-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:43:04","name":"[v1,1/4] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104307.37244-2-chenxiaolong@loongson.cn/mbox/"},{"id":137568,"url":"https://patchwork.plctlab.org/api/1.2/patches/137568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104512.46432-1-chenxiaolong@loongson.cn/","msgid":"<20230906104512.46432-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:12","name":"[v1,2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104512.46432-1-chenxiaolong@loongson.cn/mbox/"},{"id":137569,"url":"https://patchwork.plctlab.org/api/1.2/patches/137569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104526.47497-1-chenxiaolong@loongson.cn/","msgid":"<20230906104526.47497-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:26","name":"[v1,3/4] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104526.47497-1-chenxiaolong@loongson.cn/mbox/"},{"id":137570,"url":"https://patchwork.plctlab.org/api/1.2/patches/137570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104537.51583-1-chenxiaolong@loongson.cn/","msgid":"<20230906104537.51583-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:37","name":"[v1,4/4] LoongArch: Add tests for Loongson SX floating-point conversion instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104537.51583-1-chenxiaolong@loongson.cn/mbox/"},{"id":137571,"url":"https://patchwork.plctlab.org/api/1.2/patches/137571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104628.51362-1-xry111@xry111.site/","msgid":"<20230906104628.51362-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-06T10:46:28","name":"LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104628.51362-1-xry111@xry111.site/mbox/"},{"id":137572,"url":"https://patchwork.plctlab.org/api/1.2/patches/137572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906121814.1445594-1-juzhe.zhong@rivai.ai/","msgid":"<20230906121814.1445594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T12:18:14","name":"RISC-V: Remove unreasonable TARGET_64BIT for VLS modes with size = 64bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906121814.1445594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137573,"url":"https://patchwork.plctlab.org/api/1.2/patches/137573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906124724.1455261-1-juzhe.zhong@rivai.ai/","msgid":"<20230906124724.1455261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T12:47:24","name":"RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906124724.1455261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137574,"url":"https://patchwork.plctlab.org/api/1.2/patches/137574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-1-shahab@synopsys.com/","msgid":"<20230906125026.16091-1-shahab@synopsys.com>","list_archive_url":null,"date":"2023-09-06T12:50:25","name":"[1/2] ARC: Use intrinsics for __builtin_add_overflow*()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-1-shahab@synopsys.com/mbox/"},{"id":137575,"url":"https://patchwork.plctlab.org/api/1.2/patches/137575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-2-shahab@synopsys.com/","msgid":"<20230906125026.16091-2-shahab@synopsys.com>","list_archive_url":null,"date":"2023-09-06T12:50:26","name":"[2/2] ARC: Use intrinsics for __builtin_sub_overflow*()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-2-shahab@synopsys.com/mbox/"},{"id":137576,"url":"https://patchwork.plctlab.org/api/1.2/patches/137576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125156.1169003-1-pan2.li@intel.com/","msgid":"<20230906125156.1169003-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-06T12:51:56","name":"[v1] RISC-V: Fix incorrect folder for VRGATHERI16 test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125156.1169003-1-pan2.li@intel.com/mbox/"},{"id":137577,"url":"https://patchwork.plctlab.org/api/1.2/patches/137577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134001.681629-1-dmalcolm@redhat.com/","msgid":"<20230906134001.681629-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:40:01","name":"ggc, jit: forcibly clear GTY roots in jit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134001.681629-1-dmalcolm@redhat.com/mbox/"},{"id":137578,"url":"https://patchwork.plctlab.org/api/1.2/patches/137578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134422.682275-1-dmalcolm@redhat.com/","msgid":"<20230906134422.682275-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:22","name":"[pushed] analyzer: add ctxt to fill_region/zero_fill_region","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134422.682275-1-dmalcolm@redhat.com/mbox/"},{"id":137579,"url":"https://patchwork.plctlab.org/api/1.2/patches/137579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134435.682348-1-dmalcolm@redhat.com/","msgid":"<20230906134435.682348-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:35","name":"[pushed] analyzer: implement kf_strncpy [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134435.682348-1-dmalcolm@redhat.com/mbox/"},{"id":137580,"url":"https://patchwork.plctlab.org/api/1.2/patches/137580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134444.682395-1-dmalcolm@redhat.com/","msgid":"<20230906134444.682395-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:44","name":"[pushed] analyzer: implement kf_strstr [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134444.682395-1-dmalcolm@redhat.com/mbox/"},{"id":137581,"url":"https://patchwork.plctlab.org/api/1.2/patches/137581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-2-arthur.cohen@embecosm.com/","msgid":"<20230906135303.3643659-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-06T13:53:02","name":"[1/2] diagnostics: add error_meta","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-2-arthur.cohen@embecosm.com/mbox/"},{"id":137582,"url":"https://patchwork.plctlab.org/api/1.2/patches/137582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-3-arthur.cohen@embecosm.com/","msgid":"<20230906135303.3643659-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-06T13:53:03","name":"[2/2] Experiment with adding an error code to an error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-3-arthur.cohen@embecosm.com/mbox/"},{"id":137583,"url":"https://patchwork.plctlab.org/api/1.2/patches/137583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906142803.499510-1-juzhe.zhong@rivai.ai/","msgid":"<20230906142803.499510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T14:28:03","name":"[Committed,V2] RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906142803.499510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137584,"url":"https://patchwork.plctlab.org/api/1.2/patches/137584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPijr7hRsYgEBADf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-06T16:07:11","name":"[committed,10/12,v2] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPijr7hRsYgEBADf@tucnak/mbox/"},{"id":137586,"url":"https://patchwork.plctlab.org/api/1.2/patches/137586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-2-christoph.muellner@vrull.eu/","msgid":"<20230906160734.2422522-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T16:07:33","name":"[v2,1/2] riscv: Add support for strlen inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-2-christoph.muellner@vrull.eu/mbox/"},{"id":137585,"url":"https://patchwork.plctlab.org/api/1.2/patches/137585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-3-christoph.muellner@vrull.eu/","msgid":"<20230906160734.2422522-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T16:07:34","name":"[v2,2/2] riscv: Add support for str(n)cmp inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-3-christoph.muellner@vrull.eu/mbox/"},{"id":137587,"url":"https://patchwork.plctlab.org/api/1.2/patches/137587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPikTdeyDMHLOY0e@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-06T16:09:49","name":"[committed,19/12] Additional _BitInt test coverage [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPikTdeyDMHLOY0e@tucnak/mbox/"},{"id":137588,"url":"https://patchwork.plctlab.org/api/1.2/patches/137588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/977be071-0361-1868-26cb-532e06dc25f9@arm.com/","msgid":"<977be071-0361-1868-26cb-532e06dc25f9@arm.com>","list_archive_url":null,"date":"2023-09-06T17:19:12","name":"[PING,1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/977be071-0361-1868-26cb-532e06dc25f9@arm.com/mbox/"},{"id":137589,"url":"https://patchwork.plctlab.org/api/1.2/patches/137589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de90d80c-96b5-c67c-4b99-e913c33906d2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T17:19:24","name":"[PING,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de90d80c-96b5-c67c-4b99-e913c33906d2@arm.com/mbox/"},{"id":137590,"url":"https://patchwork.plctlab.org/api/1.2/patches/137590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-2-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:19","name":"[1/5] RISC-V: Update Types for Vector Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-2-ewlu@rivosinc.com/mbox/"},{"id":137591,"url":"https://patchwork.plctlab.org/api/1.2/patches/137591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-3-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:20","name":"[2/5] RISC-V: Add Types for Un-Typed zc Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-3-ewlu@rivosinc.com/mbox/"},{"id":137593,"url":"https://patchwork.plctlab.org/api/1.2/patches/137593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-4-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:21","name":"[3/5] RISC-V: Add Types to Un-Typed Zicond Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-4-ewlu@rivosinc.com/mbox/"},{"id":137592,"url":"https://patchwork.plctlab.org/api/1.2/patches/137592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-5-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:22","name":"[4/5] RISC-V: Update Types for RISC-V Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-5-ewlu@rivosinc.com/mbox/"},{"id":137594,"url":"https://patchwork.plctlab.org/api/1.2/patches/137594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-6-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-6-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:23","name":"[5/5] RISC-V: Remove Assert Protecting Types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-6-ewlu@rivosinc.com/mbox/"},{"id":137595,"url":"https://patchwork.plctlab.org/api/1.2/patches/137595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfkpy=UkaKq0R3B6YKA1zBacJ_vJs=EHAnOuNa3dHQBQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T18:38:04","name":"libgo patch committed: permit $AR to include options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfkpy=UkaKq0R3B6YKA1zBacJ_vJs=EHAnOuNa3dHQBQ@mail.gmail.com/mbox/"},{"id":137596,"url":"https://patchwork.plctlab.org/api/1.2/patches/137596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906191618.3187438-1-vultkayn@gcc.gnu.org/","msgid":"<20230906191618.3187438-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-06T19:16:20","name":"[v2] analyzer: Call off a superseding when diagnostics are unrelated [PR110830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906191618.3187438-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137598,"url":"https://patchwork.plctlab.org/api/1.2/patches/137598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906220737.4049357-1-ppalka@redhat.com/","msgid":"<20230906220737.4049357-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-06T22:07:37","name":"c++: cache conversion function lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906220737.4049357-1-ppalka@redhat.com/mbox/"},{"id":137599,"url":"https://patchwork.plctlab.org/api/1.2/patches/137599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906222913.784626-1-jwakely@redhat.com/","msgid":"<20230906222913.784626-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-06T22:28:54","name":"[committed] libstdc++: Disable support by default for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906222913.784626-1-jwakely@redhat.com/mbox/"},{"id":137600,"url":"https://patchwork.plctlab.org/api/1.2/patches/137600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUnCVkWey4PYRFUumSx5zSmpv+pN4-L1sWdxF73pVwcTA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T22:32:47","name":"godump.cc patch committed: Handle _BitInt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUnCVkWey4PYRFUumSx5zSmpv+pN4-L1sWdxF73pVwcTA@mail.gmail.com/mbox/"},{"id":137602,"url":"https://patchwork.plctlab.org/api/1.2/patches/137602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907014320.1962038-1-hongtao.liu@intel.com/","msgid":"<20230907014320.1962038-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-07T01:43:20","name":"Support vpermw/vpermi2w/vpermt2w instructions for vector HF/BFmodes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907014320.1962038-1-hongtao.liu@intel.com/mbox/"},{"id":137607,"url":"https://patchwork.plctlab.org/api/1.2/patches/137607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907020245.2888379-1-guojiufu@linux.ibm.com/","msgid":"<20230907020245.2888379-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-07T02:02:45","name":"Checking undefined_p before using the vr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907020245.2888379-1-guojiufu@linux.ibm.com/mbox/"},{"id":137603,"url":"https://patchwork.plctlab.org/api/1.2/patches/137603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com/","msgid":"<3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-07T02:17:01","name":"[RFC,1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137604,"url":"https://patchwork.plctlab.org/api/1.2/patches/137604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68806e290262ac43dfaa898e883bb85eece71a6.1694053004.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T02:17:02","name":"[RFC,2/2] RISC-V: Update testsuite for type-changed builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68806e290262ac43dfaa898e883bb85eece71a6.1694053004.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137605,"url":"https://patchwork.plctlab.org/api/1.2/patches/137605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907021750.14608-1-wangfeng@eswincomputing.com/","msgid":"<20230907021750.14608-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-07T02:17:50","name":"[v4] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907021750.14608-1-wangfeng@eswincomputing.com/mbox/"},{"id":137608,"url":"https://patchwork.plctlab.org/api/1.2/patches/137608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907033553.1289393-1-juzhe.zhong@rivai.ai/","msgid":"<20230907033553.1289393-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T03:35:53","name":"RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907033553.1289393-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137610,"url":"https://patchwork.plctlab.org/api/1.2/patches/137610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907065010.36145-1-yangyujie@loongson.cn/","msgid":"<20230907065010.36145-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-07T06:50:10","name":"[v2] LoongArch: Adjust C++ multilib header layout.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907065010.36145-1-yangyujie@loongson.cn/mbox/"},{"id":137611,"url":"https://patchwork.plctlab.org/api/1.2/patches/137611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-2-chenxiaolong@loongson.cn/","msgid":"<20230907070101.22062-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:00:58","name":"[v2,1/4] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-2-chenxiaolong@loongson.cn/mbox/"},{"id":137612,"url":"https://patchwork.plctlab.org/api/1.2/patches/137612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-3-chenxiaolong@loongson.cn/","msgid":"<20230907070101.22062-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:00:59","name":"[v2,2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-3-chenxiaolong@loongson.cn/mbox/"},{"id":137613,"url":"https://patchwork.plctlab.org/api/1.2/patches/137613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070558.22563-1-chenxiaolong@loongson.cn/","msgid":"<20230907070558.22563-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:05:58","name":"[v2,3/4] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070558.22563-1-chenxiaolong@loongson.cn/mbox/"},{"id":137614,"url":"https://patchwork.plctlab.org/api/1.2/patches/137614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070613.22622-1-chenxiaolong@loongson.cn/","msgid":"<20230907070613.22622-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:06:13","name":"[v2,4/4] LoongArch:Add Loongson SX/ASX instruction support to LoongArch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070613.22622-1-chenxiaolong@loongson.cn/mbox/"},{"id":137617,"url":"https://patchwork.plctlab.org/api/1.2/patches/137617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071128.866844-1-jwakely@redhat.com/","msgid":"<20230907071128.866844-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:13","name":"[committed] libstdc++: Avoid -Wunused-parameter warning in testsuite helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071128.866844-1-jwakely@redhat.com/mbox/"},{"id":137616,"url":"https://patchwork.plctlab.org/api/1.2/patches/137616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071134.866862-1-jwakely@redhat.com/","msgid":"<20230907071134.866862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:29","name":"[committed] libstdc++: Relax range adaptors for move-only types (P2494R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071134.866862-1-jwakely@redhat.com/mbox/"},{"id":137615,"url":"https://patchwork.plctlab.org/api/1.2/patches/137615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071141.866877-1-jwakely@redhat.com/","msgid":"<20230907071141.866877-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:35","name":"[committed] libstdc++: Rename C++20 Customization Point Objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071141.866877-1-jwakely@redhat.com/mbox/"},{"id":137618,"url":"https://patchwork.plctlab.org/api/1.2/patches/137618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071146.866894-1-jwakely@redhat.com/","msgid":"<20230907071146.866894-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:42","name":"[committed] libstdc++: Simplify C++20 poison pill overloads (P2602R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071146.866894-1-jwakely@redhat.com/mbox/"},{"id":137621,"url":"https://patchwork.plctlab.org/api/1.2/patches/137621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071150.866908-1-jwakely@redhat.com/","msgid":"<20230907071150.866908-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:47","name":"[committed] libstdc++: Fix tests that fail in C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071150.866908-1-jwakely@redhat.com/mbox/"},{"id":137619,"url":"https://patchwork.plctlab.org/api/1.2/patches/137619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071155.866923-1-jwakely@redhat.com/","msgid":"<20230907071155.866923-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:51","name":"[committed] libstdc++: Fix missing/misplaced { dg-options \"-std=gnu++20\" } in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071155.866923-1-jwakely@redhat.com/mbox/"},{"id":137622,"url":"https://patchwork.plctlab.org/api/1.2/patches/137622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-2-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:09","name":"[v1,2/4] LoongArch:Add vector subtraction arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-2-chenxiaolong@loongson.cn/mbox/"},{"id":137620,"url":"https://patchwork.plctlab.org/api/1.2/patches/137620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-3-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:10","name":"[v1,3/4] LoongArch:Add vector multiplication arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-3-chenxiaolong@loongson.cn/mbox/"},{"id":137623,"url":"https://patchwork.plctlab.org/api/1.2/patches/137623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-4-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:11","name":"[v1,4/4] LoongArch:Add SX instructions for vector arithmetic operations other than multiplication, addition, and subtraction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-4-chenxiaolong@loongson.cn/mbox/"},{"id":137624,"url":"https://patchwork.plctlab.org/api/1.2/patches/137624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907072831.2168670-1-juzhe.zhong@rivai.ai/","msgid":"<20230907072831.2168670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T07:28:31","name":"RISC-V: Enable RVV scalable vectorization by default[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907072831.2168670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137625,"url":"https://patchwork.plctlab.org/api/1.2/patches/137625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b313276b-117a-0c7e-236a-876c9f96db70@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T08:56:04","name":"libgomp.texi: Fix ICV var name, document some memory management routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b313276b-117a-0c7e-236a-876c9f96db70@codesourcery.com/mbox/"},{"id":137626,"url":"https://patchwork.plctlab.org/api/1.2/patches/137626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPmWasamz75b66t1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-07T09:22:50","name":"[committed] middle-end: Avoid calling targetm.c.bitint_type_info inside of gcc_assert [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPmWasamz75b66t1@tucnak/mbox/"},{"id":137627,"url":"https://patchwork.plctlab.org/api/1.2/patches/137627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8cmpc0c.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T09:29:23","name":"Tweak language choice in config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8cmpc0c.fsf@arm.com/mbox/"},{"id":137628,"url":"https://patchwork.plctlab.org/api/1.2/patches/137628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907115526.1454562-1-juzhe.zhong@rivai.ai/","msgid":"<20230907115526.1454562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T11:55:26","name":"RISC-V: Add VLS mask modes mov patterns[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907115526.1454562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137629,"url":"https://patchwork.plctlab.org/api/1.2/patches/137629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133202.1013843-1-jwakely@redhat.com/","msgid":"<20230907133202.1013843-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T13:31:24","name":"libstdc++: Reduce output of '\''make check'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133202.1013843-1-jwakely@redhat.com/mbox/"},{"id":137631,"url":"https://patchwork.plctlab.org/api/1.2/patches/137631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-2-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:27","name":"[01/14] rust: Add skeleton support and documentation for targetrustm hooks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-2-arthur.cohen@embecosm.com/mbox/"},{"id":137630,"url":"https://patchwork.plctlab.org/api/1.2/patches/137630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-3-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:28","name":"[02/14] rust: Reintroduce TARGET_RUST_CPU_INFO hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-3-arthur.cohen@embecosm.com/mbox/"},{"id":137632,"url":"https://patchwork.plctlab.org/api/1.2/patches/137632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-4-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:29","name":"[03/14] rust: Reintroduce TARGET_RUST_OS_INFO hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-4-arthur.cohen@embecosm.com/mbox/"},{"id":137633,"url":"https://patchwork.plctlab.org/api/1.2/patches/137633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-5-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:30","name":"[04/14] rust: Implement TARGET_RUST_CPU_INFO for i[34567]86-*-* and x86_64-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-5-arthur.cohen@embecosm.com/mbox/"},{"id":137635,"url":"https://patchwork.plctlab.org/api/1.2/patches/137635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-6-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:31","name":"[05/14] rust: Implement TARGET_RUST_OS_INFO for *-*-darwin*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-6-arthur.cohen@embecosm.com/mbox/"},{"id":137637,"url":"https://patchwork.plctlab.org/api/1.2/patches/137637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-7-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:32","name":"[06/14] rust: Implement TARGET_RUST_OS_INFO for *-*-freebsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-7-arthur.cohen@embecosm.com/mbox/"},{"id":137639,"url":"https://patchwork.plctlab.org/api/1.2/patches/137639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-8-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:33","name":"[07/14] rust: Implement TARGET_RUST_OS_INFO for *-*-netbsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-8-arthur.cohen@embecosm.com/mbox/"},{"id":137641,"url":"https://patchwork.plctlab.org/api/1.2/patches/137641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-9-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:34","name":"[08/14] rust: Implement TARGET_RUST_OS_INFO for *-*-openbsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-9-arthur.cohen@embecosm.com/mbox/"},{"id":137643,"url":"https://patchwork.plctlab.org/api/1.2/patches/137643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-10-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:35","name":"[09/14] rust: Implement TARGET_RUST_OS_INFO for *-*-solaris2*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-10-arthur.cohen@embecosm.com/mbox/"},{"id":137640,"url":"https://patchwork.plctlab.org/api/1.2/patches/137640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-11-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:36","name":"[10/14] rust: Implement TARGET_RUST_OS_INFO for *-*-dragonfly*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-11-arthur.cohen@embecosm.com/mbox/"},{"id":137634,"url":"https://patchwork.plctlab.org/api/1.2/patches/137634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-12-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:37","name":"[11/14] rust: Implement TARGET_RUST_OS_INFO for *-*-vxworks*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-12-arthur.cohen@embecosm.com/mbox/"},{"id":137638,"url":"https://patchwork.plctlab.org/api/1.2/patches/137638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-13-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:38","name":"[12/14] rust: Implement TARGET_RUST_OS_INFO for *-*-fuchsia*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-13-arthur.cohen@embecosm.com/mbox/"},{"id":137636,"url":"https://patchwork.plctlab.org/api/1.2/patches/137636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-14-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:39","name":"[13/14] rust: Implement TARGET_RUST_OS_INFO for i[34567]86-*-mingw* and x86_64-*-mingw*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-14-arthur.cohen@embecosm.com/mbox/"},{"id":137642,"url":"https://patchwork.plctlab.org/api/1.2/patches/137642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-15-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:40","name":"[14/14] rust: Implement TARGET_RUST_OS_INFO for *-*-*linux*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-15-arthur.cohen@embecosm.com/mbox/"},{"id":137644,"url":"https://patchwork.plctlab.org/api/1.2/patches/137644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907140557.3378043-1-juzhe.zhong@rivai.ai/","msgid":"<20230907140557.3378043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T14:05:57","name":"RISC-V: Replace rtx REG for zero REGS operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907140557.3378043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137645,"url":"https://patchwork.plctlab.org/api/1.2/patches/137645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1ae20a6-b756-c9dd-6fed-d080de618d48@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T14:06:20","name":"[pushed,PR111225,LRA] : Don'\''t reuse chosen insn alternative with special memory constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1ae20a6-b756-c9dd-6fed-d080de618d48@redhat.com/mbox/"},{"id":137646,"url":"https://patchwork.plctlab.org/api/1.2/patches/137646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A6AA40749B74CAD14C5783EEA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T14:06:33","name":"ARM: Block predication on atomics [PR111235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A6AA40749B74CAD14C5783EEA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":137647,"url":"https://patchwork.plctlab.org/api/1.2/patches/137647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907142217.3753564-1-jcmvbkbc@gmail.com/","msgid":"<20230907142217.3753564-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-09-07T14:22:17","name":"[RFC] gcc: xtensa: use salt/saltu in xtensa_expand_scc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907142217.3753564-1-jcmvbkbc@gmail.com/mbox/"},{"id":137648,"url":"https://patchwork.plctlab.org/api/1.2/patches/137648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPnq6g4nFQzR/RKL@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T15:23:22","name":"[v2] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPnq6g4nFQzR/RKL@redhat.com/mbox/"},{"id":137649,"url":"https://patchwork.plctlab.org/api/1.2/patches/137649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160639.1038285-1-jwakely@redhat.com/","msgid":"<20230907160639.1038285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:06:32","name":"[committed] libstdc++: Disable support by default for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160639.1038285-1-jwakely@redhat.com/mbox/"},{"id":137650,"url":"https://patchwork.plctlab.org/api/1.2/patches/137650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160737.1038358-1-jwakely@redhat.com/","msgid":"<20230907160737.1038358-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:06:50","name":"[committed] libstdc++: Add autoconf checks for mkdir, chmod, chdir, and getcwd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160737.1038358-1-jwakely@redhat.com/mbox/"},{"id":137651,"url":"https://patchwork.plctlab.org/api/1.2/patches/137651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161407.27338-2-xry111@xry111.site/","msgid":"<20230907161407.27338-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-07T16:14:08","name":"LoongArch: Use LSX and LASX for block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161407.27338-2-xry111@xry111.site/mbox/"},{"id":137652,"url":"https://patchwork.plctlab.org/api/1.2/patches/137652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161837.4049453-1-sandra@codesourcery.com/","msgid":"<20230907161837.4049453-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-09-07T16:18:37","name":"OpenMP: Fix ICE in fixup_blocks_walker [PR111274]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161837.4049453-1-sandra@codesourcery.com/mbox/"},{"id":137653,"url":"https://patchwork.plctlab.org/api/1.2/patches/137653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907163336.66198-2-xry111@xry111.site/","msgid":"<20230907163336.66198-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-07T16:33:37","name":"LoongArch: Slightly simplify loongarch_block_move_straight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907163336.66198-2-xry111@xry111.site/mbox/"},{"id":137654,"url":"https://patchwork.plctlab.org/api/1.2/patches/137654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164136.1050285-1-jwakely@redhat.com/","msgid":"<20230907164136.1050285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:41:25","name":"[committed] libstdc++: Remove trailing whitespace from dejagnu files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164136.1050285-1-jwakely@redhat.com/mbox/"},{"id":137655,"url":"https://patchwork.plctlab.org/api/1.2/patches/137655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164204.1050382-1-jwakely@redhat.com/","msgid":"<20230907164204.1050382-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:41:53","name":"[committed] libstdc++: Simplify dejagnu target selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164204.1050382-1-jwakely@redhat.com/mbox/"},{"id":137656,"url":"https://patchwork.plctlab.org/api/1.2/patches/137656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65y4m3p7o.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-09-07T16:47:23","name":"math-opts: Add dbgcounter for FMA formation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65y4m3p7o.fsf@suse.cz/mbox/"},{"id":137685,"url":"https://patchwork.plctlab.org/api/1.2/patches/137685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com/","msgid":"<6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com>","list_archive_url":null,"date":"2023-09-07T19:21:20","name":"[COMMITTED] PR tree-optimization/110875 - Some ssa-names get incorrectly marked as always_current.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com/mbox/"},{"id":137686,"url":"https://patchwork.plctlab.org/api/1.2/patches/137686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi/","msgid":"<93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-09-07T19:30:00","name":"[v2] libstdc++: Fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi/mbox/"},{"id":137688,"url":"https://patchwork.plctlab.org/api/1.2/patches/137688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907221213.103635-1-aldyh@redhat.com/","msgid":"<20230907221213.103635-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:12:06","name":"[COMMITTED,irange] Fix typo in contains_zero_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907221213.103635-1-aldyh@redhat.com/mbox/"},{"id":137689,"url":"https://patchwork.plctlab.org/api/1.2/patches/137689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224930.883908-1-dmalcolm@redhat.com/","msgid":"<20230907224930.883908-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:49:30","name":"[pushed] analyzer: fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224930.883908-1-dmalcolm@redhat.com/mbox/"},{"id":137690,"url":"https://patchwork.plctlab.org/api/1.2/patches/137690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224935.883935-1-dmalcolm@redhat.com/","msgid":"<20230907224935.883935-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:49:35","name":"[pushed] analyzer: basic support for computed gotos (PR analyzer/110529)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224935.883935-1-dmalcolm@redhat.com/mbox/"},{"id":137691,"url":"https://patchwork.plctlab.org/api/1.2/patches/137691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com/","msgid":"<59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-08T01:03:13","name":"[RFC,1/1] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137692,"url":"https://patchwork.plctlab.org/api/1.2/patches/137692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908012659.6629-1-wangfeng@eswincomputing.com/","msgid":"<20230908012659.6629-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-08T01:26:59","name":"[v5] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908012659.6629-1-wangfeng@eswincomputing.com/mbox/"},{"id":137693,"url":"https://patchwork.plctlab.org/api/1.2/patches/137693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908020021.3174-1-guojie@loongson.cn/","msgid":"<20230908020021.3174-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-08T02:00:21","name":"LoongArch: Enable -fsched-pressure by default at -O1 and higher.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908020021.3174-1-guojie@loongson.cn/mbox/"},{"id":137694,"url":"https://patchwork.plctlab.org/api/1.2/patches/137694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908031918.1035385-1-hongtao.liu@intel.com/","msgid":"<20230908031918.1035385-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-08T03:19:18","name":"Remove constraint modifier % for fcmaddcph/fcmulcph since there'\''re not commutative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908031918.1035385-1-hongtao.liu@intel.com/mbox/"},{"id":137696,"url":"https://patchwork.plctlab.org/api/1.2/patches/137696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908052415.3307098-1-lehua.ding@rivai.ai/","msgid":"<20230908052415.3307098-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T05:24:15","name":"Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908052415.3307098-1-lehua.ding@rivai.ai/mbox/"},{"id":137697,"url":"https://patchwork.plctlab.org/api/1.2/patches/137697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908060044.1915195-1-christoph.muellner@vrull.eu/","msgid":"<20230908060044.1915195-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:00:44","name":"riscv: xtheadbb: Fix extendqi insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908060044.1915195-1-christoph.muellner@vrull.eu/mbox/"},{"id":137698,"url":"https://patchwork.plctlab.org/api/1.2/patches/137698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908061600.1922301-1-christoph.muellner@vrull.eu/","msgid":"<20230908061600.1922301-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:16:00","name":"riscv: thead: Fix mode attribute for extension patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908061600.1922301-1-christoph.muellner@vrull.eu/mbox/"},{"id":137699,"url":"https://patchwork.plctlab.org/api/1.2/patches/137699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065330.2367271-1-christoph.muellner@vrull.eu/","msgid":"<20230908065330.2367271-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:53:30","name":"riscv: bitmanip: Remove duplicate zero_extendhi2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065330.2367271-1-christoph.muellner@vrull.eu/mbox/"},{"id":137700,"url":"https://patchwork.plctlab.org/api/1.2/patches/137700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065402.3875730-1-lehua.ding@rivai.ai/","msgid":"<20230908065402.3875730-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T06:54:02","name":"[V2] Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065402.3875730-1-lehua.ding@rivai.ai/mbox/"},{"id":137703,"url":"https://patchwork.plctlab.org/api/1.2/patches/137703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908075203.2597443-1-juzhe.zhong@rivai.ai/","msgid":"<20230908075203.2597443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-08T07:52:03","name":"RISC-V: Fix incorrect nregs calculation for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908075203.2597443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137704,"url":"https://patchwork.plctlab.org/api/1.2/patches/137704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908082027.485267-1-juzhe.zhong@rivai.ai/","msgid":"<20230908082027.485267-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-08T08:20:27","name":"RISC-V: Suppress bogus warning for VLS types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908082027.485267-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137706,"url":"https://patchwork.plctlab.org/api/1.2/patches/137706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908084321.567591-1-christophe.lyon@linaro.org/","msgid":"<20230908084321.567591-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-08T08:43:21","name":"testsuite: Fix gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908084321.567591-1-christophe.lyon@linaro.org/mbox/"},{"id":137707,"url":"https://patchwork.plctlab.org/api/1.2/patches/137707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp/","msgid":"<010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp>","list_archive_url":null,"date":"2023-09-08T08:48:56","name":"xtensa: Optimize several boolean evaluations of EQ/NE against constant zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp/mbox/"},{"id":137708,"url":"https://patchwork.plctlab.org/api/1.2/patches/137708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908085419.494384-1-lehua.ding@rivai.ai/","msgid":"<20230908085419.494384-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T08:54:19","name":"[V3] Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908085419.494384-1-lehua.ding@rivai.ai/mbox/"},{"id":137709,"url":"https://patchwork.plctlab.org/api/1.2/patches/137709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com/","msgid":"<4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com>","list_archive_url":null,"date":"2023-09-08T09:01:45","name":"gimple-match: Do not try UNCOND optimization with COND_LEN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com/mbox/"},{"id":137711,"url":"https://patchwork.plctlab.org/api/1.2/patches/137711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908100434.541577-1-mikael@gcc.gnu.org/","msgid":"<20230908100434.541577-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-08T10:04:34","name":"fortran: Remove redundant tree walk to delete element","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908100434.541577-1-mikael@gcc.gnu.org/mbox/"},{"id":137715,"url":"https://patchwork.plctlab.org/api/1.2/patches/137715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908104923.31154-1-ishitatsuyuki@gmail.com/","msgid":"<20230908104923.31154-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-09-08T10:49:23","name":"[v2] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908104923.31154-1-ishitatsuyuki@gmail.com/mbox/"},{"id":137718,"url":"https://patchwork.plctlab.org/api/1.2/patches/137718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9fafb66-b740-4905-7c96-0a1d98cd2034@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T11:12:17","name":"[committed] Update contrib + libgomp ChangeLogs for failed reject-commit testing (was: [Patch] contrib/gcc-changelog: Check whether revert-commit exists)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9fafb66-b740-4905-7c96-0a1d98cd2034@codesourcery.com/mbox/"},{"id":137723,"url":"https://patchwork.plctlab.org/api/1.2/patches/137723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ledgzxcl.fsf@euler.schwinge.homeip.net/","msgid":"<87ledgzxcl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-08T12:02:50","name":"More '\''#ifdef ASM_OUTPUT_DEF'\'' -> '\''if (TARGET_SUPPORTS_ALIASES)'\'' etc. (was: [PATCH][v2] Introduce TARGET_SUPPORTS_ALIASES)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ledgzxcl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137726,"url":"https://patchwork.plctlab.org/api/1.2/patches/137726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPsQipogkYUxlXLK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-08T12:16:10","name":"pretty-print: Fix up pp_wide_int [PR111329]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPsQipogkYUxlXLK@tucnak/mbox/"},{"id":137731,"url":"https://patchwork.plctlab.org/api/1.2/patches/137731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908123955.1196607-1-apinski@marvell.com/","msgid":"<20230908123955.1196607-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-08T12:39:55","name":"Fix PR 111331: wrong code for `a > 28 ? MIN : 29`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908123955.1196607-1-apinski@marvell.com/mbox/"},{"id":137740,"url":"https://patchwork.plctlab.org/api/1.2/patches/137740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908125840.789518-1-arthur.cohen@embecosm.com/","msgid":"<20230908125840.789518-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T12:58:40","name":"libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908125840.789518-1-arthur.cohen@embecosm.com/mbox/"},{"id":137746,"url":"https://patchwork.plctlab.org/api/1.2/patches/137746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908142519.899241-1-arthur.cohen@embecosm.com/","msgid":"<20230908142519.899241-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T14:25:20","name":"[v2] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908142519.899241-1-arthur.cohen@embecosm.com/mbox/"},{"id":137750,"url":"https://patchwork.plctlab.org/api/1.2/patches/137750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908145908.915341-1-arthur.cohen@embecosm.com/","msgid":"<20230908145908.915341-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T14:59:09","name":"[v3] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908145908.915341-1-arthur.cohen@embecosm.com/mbox/"},{"id":137761,"url":"https://patchwork.plctlab.org/api/1.2/patches/137761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7icmxvw.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T16:29:39","name":"Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7icmxvw.fsf@arm.com/mbox/"},{"id":137763,"url":"https://patchwork.plctlab.org/api/1.2/patches/137763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908170830.1700395-1-jwakely@redhat.com/","msgid":"<20230908170830.1700395-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-08T17:06:57","name":"[committed] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908170830.1700395-1-jwakely@redhat.com/mbox/"},{"id":137766,"url":"https://patchwork.plctlab.org/api/1.2/patches/137766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com/","msgid":"<368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com>","list_archive_url":null,"date":"2023-09-08T17:54:35","name":"match: Don'\''t sink comparisons into vec_cond operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com/mbox/"},{"id":137771,"url":"https://patchwork.plctlab.org/api/1.2/patches/137771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181603.1719292-1-jwakely@redhat.com/","msgid":"<20230908181603.1719292-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-08T18:15:09","name":"[committed] libstdc++: Update outdated default -std in testing docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181603.1719292-1-jwakely@redhat.com/mbox/"},{"id":137772,"url":"https://patchwork.plctlab.org/api/1.2/patches/137772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-2-ewlu@rivosinc.com/","msgid":"<20230908181659.3345602-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-08T18:16:45","name":"[v2,1/5] RISC-V: Update Types for Vector Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-2-ewlu@rivosinc.com/mbox/"},{"id":137774,"url":"https://patchwork.plctlab.org/api/1.2/patches/137774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-3-ewlu@rivosinc.com/","msgid":"<20230908181659.3345602-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-08T18:16:46","name":"[v2,2/5] RISC-V: Add Types for Un-Typed zc Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-3-ewlu@rivosinc.com/mbox/"},{"id":137788,"url":"https://patchwork.plctlab.org/api/1.2/patches/137788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPtmwqs+Aywe6ZAR@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T18:24:02","name":"[v3] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPtmwqs+Aywe6ZAR@redhat.com/mbox/"},{"id":137796,"url":"https://patchwork.plctlab.org/api/1.2/patches/137796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908210412.817122-1-aldyh@redhat.com/","msgid":"<20230908210412.817122-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-08T21:04:07","name":"[COMMITTED,frange] Revert relation handling in LTGT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908210412.817122-1-aldyh@redhat.com/mbox/"},{"id":137820,"url":"https://patchwork.plctlab.org/api/1.2/patches/137820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043026.2001914-1-juzhe.zhong@rivai.ai/","msgid":"<20230909043026.2001914-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T04:30:26","name":"[Committed] RISC-V: Fix VLS floating-point operations predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043026.2001914-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137821,"url":"https://patchwork.plctlab.org/api/1.2/patches/137821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043814.2002924-1-juzhe.zhong@rivai.ai/","msgid":"<20230909043814.2002924-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T04:38:14","name":"RISC-V: Add VLS modes VEC_PERM support[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043814.2002924-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137824,"url":"https://patchwork.plctlab.org/api/1.2/patches/137824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0e6dc5d6e4a5cca7f2abf52f0472da0ba9b80fb.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-09-09T07:03:40","name":"Pushed: [PATCH v2] LoongArch: Use LSX and LASX for block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0e6dc5d6e4a5cca7f2abf52f0472da0ba9b80fb.camel@xry111.site/mbox/"},{"id":137825,"url":"https://patchwork.plctlab.org/api/1.2/patches/137825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909074209.1187-1-chenglulu@loongson.cn/","msgid":"<20230909074209.1187-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-09T07:42:10","name":"[v1] LoongArch: Fix bug of '\''di3_fake'\''.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909074209.1187-1-chenglulu@loongson.cn/mbox/"},{"id":137826,"url":"https://patchwork.plctlab.org/api/1.2/patches/137826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909082014.100341-1-xry111@xry111.site/","msgid":"<20230909082014.100341-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-09T08:20:14","name":"LoongArch: Fix up memcpy-vec-3.c test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909082014.100341-1-xry111@xry111.site/mbox/"},{"id":137827,"url":"https://patchwork.plctlab.org/api/1.2/patches/137827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909084652.2655745-1-manolis.tsamis@vrull.eu/","msgid":"<20230909084652.2655745-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-09-09T08:46:51","name":"[v5] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909084652.2655745-1-manolis.tsamis@vrull.eu/mbox/"},{"id":137833,"url":"https://patchwork.plctlab.org/api/1.2/patches/137833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6o3z7lr.fsf@euler.schwinge.homeip.net/","msgid":"<87h6o3z7lr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-09T15:31:12","name":"Fix false positive for -Walloc-size-larger-than, part II [PR79132] (was: [PATCH] Fix false positive for -Walloc-size-larger-than (PR, bootstrap/79132))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6o3z7lr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137848,"url":"https://patchwork.plctlab.org/api/1.2/patches/137848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909235744.1744713-1-juzhe.zhong@rivai.ai/","msgid":"<20230909235744.1744713-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T23:57:44","name":"RISC-V: Fix dump FILE of VSETVL PASS[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909235744.1744713-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137849,"url":"https://patchwork.plctlab.org/api/1.2/patches/137849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910023304.1946754-1-juzhe.zhong@rivai.ai/","msgid":"<20230910023304.1946754-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T02:33:04","name":"RISC-V: Expand fixed-vlmax/vls vector permutation in targethook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910023304.1946754-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137852,"url":"https://patchwork.plctlab.org/api/1.2/patches/137852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910035538.2034153-1-juzhe.zhong@rivai.ai/","msgid":"<20230910035538.2034153-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T03:55:38","name":"RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910035538.2034153-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137854,"url":"https://patchwork.plctlab.org/api/1.2/patches/137854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at/","msgid":"<1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at>","list_archive_url":null,"date":"2023-09-10T08:17:29","name":"[C,1/6,v2] c: reorganize recursive type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at/mbox/"},{"id":137861,"url":"https://patchwork.plctlab.org/api/1.2/patches/137861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf02c66f-a911-8ce0-9249-45bef80b418c@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-10T13:56:11","name":"[11/12/13/14,Regression] ABI break in _Hash_node_value_base since GCC 11 [PR 111050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf02c66f-a911-8ce0-9249-45bef80b418c@gmail.com/mbox/"},{"id":137862,"url":"https://patchwork.plctlab.org/api/1.2/patches/137862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910140710.2167538-1-juzhe.zhong@rivai.ai/","msgid":"<20230910140710.2167538-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T14:07:10","name":"[V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910140710.2167538-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137863,"url":"https://patchwork.plctlab.org/api/1.2/patches/137863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910141022.89898-1-iain@sandoe.co.uk/","msgid":"<20230910141022.89898-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-10T14:10:22","name":"[pushed] Darwin: Partial reversion of r14-3648 (Inits Section).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910141022.89898-1-iain@sandoe.co.uk/mbox/"},{"id":137864,"url":"https://patchwork.plctlab.org/api/1.2/patches/137864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com/","msgid":"<0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-09-10T17:28:32","name":"[v2] swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com/mbox/"},{"id":137865,"url":"https://patchwork.plctlab.org/api/1.2/patches/137865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-1-christophe.lyon@linaro.org/","msgid":"<20230910193045.3549775-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-10T19:30:44","name":"[1/2] testsuite: Add and use thread_fence effective-target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-1-christophe.lyon@linaro.org/mbox/"},{"id":137866,"url":"https://patchwork.plctlab.org/api/1.2/patches/137866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-2-christophe.lyon@linaro.org/","msgid":"<20230910193045.3549775-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-10T19:30:45","name":"[2/2] libstdc++: Add dg-require-thread-fence in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-2-christophe.lyon@linaro.org/mbox/"},{"id":137867,"url":"https://patchwork.plctlab.org/api/1.2/patches/137867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911011608.312795-1-hongtao.liu@intel.com/","msgid":"<20230911011608.312795-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-11T01:16:08","name":"Remove constraint modifier % for fcmaddcph/fmaddcph/fcmulcph since there'\''re not commutative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911011608.312795-1-hongtao.liu@intel.com/mbox/"},{"id":137868,"url":"https://patchwork.plctlab.org/api/1.2/patches/137868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911021811.1347413-1-apinski@marvell.com/","msgid":"<20230911021811.1347413-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T02:18:11","name":"MATCH: [PR111346] `X CMP MINMAX` pattern missing :c on CMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911021811.1347413-1-apinski@marvell.com/mbox/"},{"id":137870,"url":"https://patchwork.plctlab.org/api/1.2/patches/137870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032343.2482218-1-juzhe.zhong@rivai.ai/","msgid":"<20230911032343.2482218-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:23:43","name":"[Committed] RISC-V: Add missing VLS mask bool mode reg -> reg patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032343.2482218-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137871,"url":"https://patchwork.plctlab.org/api/1.2/patches/137871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032826.2483079-1-juzhe.zhong@rivai.ai/","msgid":"<20230911032826.2483079-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:28:26","name":"[Committed,V2] RISC-V: Add VLS modes VEC_PERM support[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032826.2483079-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137872,"url":"https://patchwork.plctlab.org/api/1.2/patches/137872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911033359.2484029-1-juzhe.zhong@rivai.ai/","msgid":"<20230911033359.2484029-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:33:59","name":"RISC-V: Use dominance analysis in global vsetvl elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911033359.2484029-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137874,"url":"https://patchwork.plctlab.org/api/1.2/patches/137874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-2-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:31","name":"[v3,1/9] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-2-chenxiaolong@loongson.cn/mbox/"},{"id":137873,"url":"https://patchwork.plctlab.org/api/1.2/patches/137873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-3-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:32","name":"[v3,2/9] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-3-chenxiaolong@loongson.cn/mbox/"},{"id":137876,"url":"https://patchwork.plctlab.org/api/1.2/patches/137876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-4-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:33","name":"[v3,3/9] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-4-chenxiaolong@loongson.cn/mbox/"},{"id":137877,"url":"https://patchwork.plctlab.org/api/1.2/patches/137877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-5-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:34","name":"[v3,4/9] LoongArch:Added support for SX vector floating-point instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-5-chenxiaolong@loongson.cn/mbox/"},{"id":137879,"url":"https://patchwork.plctlab.org/api/1.2/patches/137879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-6-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:35","name":"[v3,5/9] LoongArch:Add SX instructions for vector arithmetic addition operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-6-chenxiaolong@loongson.cn/mbox/"},{"id":137875,"url":"https://patchwork.plctlab.org/api/1.2/patches/137875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-7-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:36","name":"[v3,6/9] LoongArch:Add vector subtraction arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-7-chenxiaolong@loongson.cn/mbox/"},{"id":137878,"url":"https://patchwork.plctlab.org/api/1.2/patches/137878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-8-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:37","name":"[v3,7/9] LoongArch:Add vector arithmetic addition vsadd instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-8-chenxiaolong@loongson.cn/mbox/"},{"id":137880,"url":"https://patchwork.plctlab.org/api/1.2/patches/137880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-9-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:38","name":"[v3,8/9] LoongArch:Added SX vector arithmetic multiplication instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-9-chenxiaolong@loongson.cn/mbox/"},{"id":137881,"url":"https://patchwork.plctlab.org/api/1.2/patches/137881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034827.8644-1-chenxiaolong@loongson.cn/","msgid":"<20230911034827.8644-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:48:27","name":"[v3,9/9] LoongArch:Add SX instructions for vector arithmetic operations other than multiplication, addition, and subtraction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034827.8644-1-chenxiaolong@loongson.cn/mbox/"},{"id":137882,"url":"https://patchwork.plctlab.org/api/1.2/patches/137882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911075727.2536198-1-pan2.li@intel.com/","msgid":"<20230911075727.2536198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-11T07:57:27","name":"[v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911075727.2536198-1-pan2.li@intel.com/mbox/"},{"id":137883,"url":"https://patchwork.plctlab.org/api/1.2/patches/137883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911091930.2592988-1-juzhe.zhong@rivai.ai/","msgid":"<20230911091930.2592988-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:19:30","name":"RISC-V: Remove redundant functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911091930.2592988-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137884,"url":"https://patchwork.plctlab.org/api/1.2/patches/137884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911093846.3341212-1-juzhe.zhong@rivai.ai/","msgid":"<20230911093846.3341212-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:38:46","name":"[V2] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911093846.3341212-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137885,"url":"https://patchwork.plctlab.org/api/1.2/patches/137885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911094107.3342788-1-juzhe.zhong@rivai.ai/","msgid":"<20230911094107.3342788-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:41:07","name":"[V3] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911094107.3342788-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137886,"url":"https://patchwork.plctlab.org/api/1.2/patches/137886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911110740.1844291-1-jwakely@redhat.com/","msgid":"<20230911110740.1844291-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T11:06:19","name":"libstdc++: Check if getent is available in git config script [PR111359]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911110740.1844291-1-jwakely@redhat.com/mbox/"},{"id":137887,"url":"https://patchwork.plctlab.org/api/1.2/patches/137887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e368e8e6-1032-2dca-4a73-7c556b10d7f7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T11:44:07","name":"OpenMP (C only): omp allocate - extend parsing support, improve diagnostic (was: [Patch] OpenMP (C only): omp allocate - handle stack vars, improve diagnostic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e368e8e6-1032-2dca-4a73-7c556b10d7f7@codesourcery.com/mbox/"},{"id":137888,"url":"https://patchwork.plctlab.org/api/1.2/patches/137888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911123845.1870133-1-mikael@gcc.gnu.org/","msgid":"<20230911123845.1870133-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T12:38:45","name":"fortran: Undo new symbols in all namespaces [PR110996]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911123845.1870133-1-mikael@gcc.gnu.org/mbox/"},{"id":137889,"url":"https://patchwork.plctlab.org/api/1.2/patches/137889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/WBulHlEWtAC34Gaya2RM4wi1XPmBh-8mmo1nSuaXMEDszh07eeF8nzl7-GLWrO4yPF9GAa6DAiGE3IyYkgKCefnp54JfiQZGl4r-C9qy-tU=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T13:49:03","name":"[v2,1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/WBulHlEWtAC34Gaya2RM4wi1XPmBh-8mmo1nSuaXMEDszh07eeF8nzl7-GLWrO4yPF9GAa6DAiGE3IyYkgKCefnp54JfiQZGl4r-C9qy-tU=@protonmail.com/mbox/"},{"id":137890,"url":"https://patchwork.plctlab.org/api/1.2/patches/137890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911135742.1870920-1-jwakely@redhat.com/","msgid":"<20230911135742.1870920-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T13:57:08","name":"[committed] libstdc++: Formatting std::thread::id and std::stacktrace (P2693R1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911135742.1870920-1-jwakely@redhat.com/mbox/"},{"id":137891,"url":"https://patchwork.plctlab.org/api/1.2/patches/137891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911142328.1378300-1-apinski@marvell.com/","msgid":"<20230911142328.1378300-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T14:23:28","name":"MATCH: [PR111349] add missing :c to cmp in the `(a CMP CST1) ? max : a` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911142328.1378300-1-apinski@marvell.com/mbox/"},{"id":137892,"url":"https://patchwork.plctlab.org/api/1.2/patches/137892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911144243.3506767-2-arthur.cohen@embecosm.com/","msgid":"<20230911144243.3506767-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-11T14:42:25","name":"[COMMITTED] gccrs: move functions from rust-gcc-diagnostics to rust-diagnostics.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911144243.3506767-2-arthur.cohen@embecosm.com/mbox/"},{"id":137893,"url":"https://patchwork.plctlab.org/api/1.2/patches/137893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911152703.22436-1-kmatsui@gcc.gnu.org/","msgid":"<20230911152703.22436-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T15:27:03","name":"libstdc++ Use _GLIBCXX_USE_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911152703.22436-1-kmatsui@gcc.gnu.org/mbox/"},{"id":137894,"url":"https://patchwork.plctlab.org/api/1.2/patches/137894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160811.1912603-1-jwakely@redhat.com/","msgid":"<20230911160811.1912603-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:07:36","name":"[committed] libstdc++: Move __glibcxx_assert_fail to its own file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160811.1912603-1-jwakely@redhat.com/mbox/"},{"id":137895,"url":"https://patchwork.plctlab.org/api/1.2/patches/137895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160836.1912657-1-jwakely@redhat.com/","msgid":"<20230911160836.1912657-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:08:12","name":"[committed] libstdc++: Remove unconditional use of atomics in Debug Mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160836.1912657-1-jwakely@redhat.com/mbox/"},{"id":137896,"url":"https://patchwork.plctlab.org/api/1.2/patches/137896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-2-jwakely@redhat.com/","msgid":"<20230911163534.1913512-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:32","name":"[01/13] libstdc++: Add support for running tests with multiple -std options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-2-jwakely@redhat.com/mbox/"},{"id":137901,"url":"https://patchwork.plctlab.org/api/1.2/patches/137901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-3-jwakely@redhat.com/","msgid":"<20230911163534.1913512-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:33","name":"[02/13] libstdc++: Replace dg-options \"-std=c++11\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-3-jwakely@redhat.com/mbox/"},{"id":137897,"url":"https://patchwork.plctlab.org/api/1.2/patches/137897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-4-jwakely@redhat.com/","msgid":"<20230911163534.1913512-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:34","name":"[03/13] libstdc++: Replace dg-options \"-std=c++17\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-4-jwakely@redhat.com/mbox/"},{"id":137900,"url":"https://patchwork.plctlab.org/api/1.2/patches/137900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-5-jwakely@redhat.com/","msgid":"<20230911163534.1913512-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:35","name":"[04/13] libstdc++: Replace dg-options \"-std=c++20\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-5-jwakely@redhat.com/mbox/"},{"id":137905,"url":"https://patchwork.plctlab.org/api/1.2/patches/137905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-6-jwakely@redhat.com/","msgid":"<20230911163534.1913512-6-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:36","name":"[05/13] libstdc++: Remove dg-options \"-std=c++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-6-jwakely@redhat.com/mbox/"},{"id":137898,"url":"https://patchwork.plctlab.org/api/1.2/patches/137898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-7-jwakely@redhat.com/","msgid":"<20230911163534.1913512-7-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:37","name":"[06/13] libstdc++: Remove dg-options \"-std=gnu++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-7-jwakely@redhat.com/mbox/"},{"id":137902,"url":"https://patchwork.plctlab.org/api/1.2/patches/137902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-8-jwakely@redhat.com/","msgid":"<20230911163534.1913512-8-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:38","name":"[07/13] libstdc++: Remove dg-options \"-std=gnu++2a\" from constrained algo tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-8-jwakely@redhat.com/mbox/"},{"id":137906,"url":"https://patchwork.plctlab.org/api/1.2/patches/137906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-9-jwakely@redhat.com/","msgid":"<20230911163534.1913512-9-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:39","name":"[08/13] libstdc++: Remove dg-options \"-std=gnu++20\" from std::format tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-9-jwakely@redhat.com/mbox/"},{"id":137903,"url":"https://patchwork.plctlab.org/api/1.2/patches/137903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-10-jwakely@redhat.com/","msgid":"<20230911163534.1913512-10-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:40","name":"[09/13] libstdc++: Remove dg-options \"-std=gnu++20\" from std::chrono tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-10-jwakely@redhat.com/mbox/"},{"id":137908,"url":"https://patchwork.plctlab.org/api/1.2/patches/137908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-11-jwakely@redhat.com/","msgid":"<20230911163534.1913512-11-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:41","name":"[10/13] libstdc++: Remove dg-options \"-std=gnu++23\" from std::expected tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-11-jwakely@redhat.com/mbox/"},{"id":137909,"url":"https://patchwork.plctlab.org/api/1.2/patches/137909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-12-jwakely@redhat.com/","msgid":"<20230911163534.1913512-12-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:42","name":"[11/13] libstdc++: Remove dg-options \"-std=gnu++23\" from remaining tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-12-jwakely@redhat.com/mbox/"},{"id":137904,"url":"https://patchwork.plctlab.org/api/1.2/patches/137904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-13-jwakely@redhat.com/","msgid":"<20230911163534.1913512-13-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:43","name":"[12/13] libstdc++: Remove dg-options \"-std=gnu++2a\" from XFAIL std::span tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-13-jwakely@redhat.com/mbox/"},{"id":137899,"url":"https://patchwork.plctlab.org/api/1.2/patches/137899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-14-jwakely@redhat.com/","msgid":"<20230911163534.1913512-14-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:44","name":"[13/13] libstdc++: Simplify dejagnu directives for some tests using threads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-14-jwakely@redhat.com/mbox/"},{"id":137907,"url":"https://patchwork.plctlab.org/api/1.2/patches/137907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sM7F5ffvnEfFwNp0EozHTd1_YCK-4LhC7i-3HkPEZy+1Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T16:43:38","name":"RISC-V: Replace not + bitwise_imm with li + bitwise_not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sM7F5ffvnEfFwNp0EozHTd1_YCK-4LhC7i-3HkPEZy+1Q@mail.gmail.com/mbox/"},{"id":137911,"url":"https://patchwork.plctlab.org/api/1.2/patches/137911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-2-kmatsui@gcc.gnu.org/","msgid":"<20230911170828.73628-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:05:53","name":"[1/2] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137910,"url":"https://patchwork.plctlab.org/api/1.2/patches/137910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-3-kmatsui@gcc.gnu.org/","msgid":"<20230911170828.73628-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:05:54","name":"[2/2] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137912,"url":"https://patchwork.plctlab.org/api/1.2/patches/137912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9PdYVr65NKA89b@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-11T17:33:41","name":"sccvn: Avoid ICEs on _BitInt load BIT_AND_EXPR mask [PR111338]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9PdYVr65NKA89b@tucnak/mbox/"},{"id":137913,"url":"https://patchwork.plctlab.org/api/1.2/patches/137913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9RahtJvkQl7PFG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-11T17:42:02","name":"small _BitInt tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9RahtJvkQl7PFG@tucnak/mbox/"},{"id":137914,"url":"https://patchwork.plctlab.org/api/1.2/patches/137914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911174433.492082-1-vultkayn@gcc.gnu.org/","msgid":"<20230911174433.492082-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:44:34","name":"[WIP,RFC] analyzer: Move gcc.dg/analyzer tests to c-c++-common (3) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911174433.492082-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137915,"url":"https://patchwork.plctlab.org/api/1.2/patches/137915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b+HNRom4GLgp6tHZyVkQVeqH=cQpw5X0s6=iq9GmFKug@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T18:59:24","name":"[committed] i386: Handle CONST_WIDE_INT in output_pic_addr_const [PR111340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b+HNRom4GLgp6tHZyVkQVeqH=cQpw5X0s6=iq9GmFKug@mail.gmail.com/mbox/"},{"id":137916,"url":"https://patchwork.plctlab.org/api/1.2/patches/137916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911203939.1394059-1-apinski@marvell.com/","msgid":"<20230911203939.1394059-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T20:39:39","name":"MATCH: [PR111348] add missing :c to cmp in the `(a CMP b) ? minmax : minmax` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911203939.1394059-1-apinski@marvell.com/mbox/"},{"id":137932,"url":"https://patchwork.plctlab.org/api/1.2/patches/137932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-2-kmatsui@gcc.gnu.org/","msgid":"<20230911221328.26133-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T22:11:41","name":"[1/2] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137933,"url":"https://patchwork.plctlab.org/api/1.2/patches/137933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-3-kmatsui@gcc.gnu.org/","msgid":"<20230911221328.26133-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T22:11:42","name":"[2/2] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137936,"url":"https://patchwork.plctlab.org/api/1.2/patches/137936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911225308.2275313-1-ewlu@rivosinc.com/","msgid":"<20230911225308.2275313-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-11T22:52:54","name":"RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911225308.2275313-1-ewlu@rivosinc.com/mbox/"},{"id":137939,"url":"https://patchwork.plctlab.org/api/1.2/patches/137939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-2-kmatsui@gcc.gnu.org/","msgid":"<20230912001756.87388-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T00:16:05","name":"[1/2] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137940,"url":"https://patchwork.plctlab.org/api/1.2/patches/137940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-3-kmatsui@gcc.gnu.org/","msgid":"<20230912001756.87388-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T00:16:06","name":"[2/2] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137941,"url":"https://patchwork.plctlab.org/api/1.2/patches/137941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-1-ppalka@redhat.com/","msgid":"<20230912010852.1027184-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:50","name":"[1/3] libstdc++: Remove std::bind_front specialization for no bound args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-1-ppalka@redhat.com/mbox/"},{"id":137942,"url":"https://patchwork.plctlab.org/api/1.2/patches/137942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-2-ppalka@redhat.com/","msgid":"<20230912010852.1027184-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:51","name":"[2/3] libstdc++: Fix std::bind_front perfect forwarding [PR111327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-2-ppalka@redhat.com/mbox/"},{"id":137943,"url":"https://patchwork.plctlab.org/api/1.2/patches/137943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-3-ppalka@redhat.com/","msgid":"<20230912010852.1027184-3-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:52","name":"[3/3] libstdc++: Fix std::not_fn perfect forwarding [PR111327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-3-ppalka@redhat.com/mbox/"},{"id":137945,"url":"https://patchwork.plctlab.org/api/1.2/patches/137945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/addbfa6b9ff68058beb7e248812d12d408a5afe6.1694482087.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T01:28:08","name":"[1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/addbfa6b9ff68058beb7e248812d12d408a5afe6.1694482087.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137944,"url":"https://patchwork.plctlab.org/api/1.2/patches/137944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com/","msgid":"<20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-12T01:28:09","name":"[2/2] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137948,"url":"https://patchwork.plctlab.org/api/1.2/patches/137948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912020825.12497-1-xuli1@eswincomputing.com/","msgid":"<20230912020825.12497-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T02:08:25","name":"RISC-V: Add vcreate intrinsics for RVV tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912020825.12497-1-xuli1@eswincomputing.com/mbox/"},{"id":137949,"url":"https://patchwork.plctlab.org/api/1.2/patches/137949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-2-kmatsui@gcc.gnu.org/","msgid":"<20230912024920.55120-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T02:38:38","name":"[1/2] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137950,"url":"https://patchwork.plctlab.org/api/1.2/patches/137950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-3-kmatsui@gcc.gnu.org/","msgid":"<20230912024920.55120-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T02:38:39","name":"[2/2] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137952,"url":"https://patchwork.plctlab.org/api/1.2/patches/137952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912042152.1412606-1-apinski@marvell.com/","msgid":"<20230912042152.1412606-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T04:21:52","name":"MATCH: Simplify (a CMP1 b) ^ (a CMP2 b)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912042152.1412606-1-apinski@marvell.com/mbox/"},{"id":137956,"url":"https://patchwork.plctlab.org/api/1.2/patches/137956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-2-kmatsui@gcc.gnu.org/","msgid":"<20230912044638.14504-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T04:26:18","name":"[1/2] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137957,"url":"https://patchwork.plctlab.org/api/1.2/patches/137957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-3-kmatsui@gcc.gnu.org/","msgid":"<20230912044638.14504-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T04:26:19","name":"[2/2] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137968,"url":"https://patchwork.plctlab.org/api/1.2/patches/137968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912055415.5786-1-xuli1@eswincomputing.com/","msgid":"<20230912055415.5786-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T05:54:15","name":"RISC-V: Elimilate warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912055415.5786-1-xuli1@eswincomputing.com/mbox/"},{"id":137975,"url":"https://patchwork.plctlab.org/api/1.2/patches/137975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912061304.7564-1-xuli1@eswincomputing.com/","msgid":"<20230912061304.7564-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T06:13:04","name":"[v2] RISC-V: Elimilate warning in class vcreate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912061304.7564-1-xuli1@eswincomputing.com/mbox/"},{"id":137977,"url":"https://patchwork.plctlab.org/api/1.2/patches/137977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912062013.9221-1-xuli1@eswincomputing.com/","msgid":"<20230912062013.9221-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T06:20:13","name":"[v3] RISC-V: Elimilate warning in class vcreate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912062013.9221-1-xuli1@eswincomputing.com/mbox/"},{"id":137980,"url":"https://patchwork.plctlab.org/api/1.2/patches/137980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912064932.647337-1-juzhe.zhong@rivai.ai/","msgid":"<20230912064932.647337-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T06:49:32","name":"[V4] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912064932.647337-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137985,"url":"https://patchwork.plctlab.org/api/1.2/patches/137985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQANHzUrgBvCqzc2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:02:55","name":"testsuite work-around compound-assignment-1.c C++ failures on various targets [PR111377]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQANHzUrgBvCqzc2@tucnak/mbox/"},{"id":137993,"url":"https://patchwork.plctlab.org/api/1.2/patches/137993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c046d64f-b97e-c2e3-cd77-60f39cc03cf2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:18:38","name":"[PING,^0] rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c046d64f-b97e-c2e3-cd77-60f39cc03cf2@linux.ibm.com/mbox/"},{"id":137994,"url":"https://patchwork.plctlab.org/api/1.2/patches/137994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com/","msgid":"<6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com>","list_archive_url":null,"date":"2023-09-12T07:20:07","name":"[PING,^0,3/4] Improve functionality of ree pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com/mbox/"},{"id":137995,"url":"https://patchwork.plctlab.org/api/1.2/patches/137995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912072038.1230798-1-pan2.li@intel.com/","msgid":"<20230912072038.1230798-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T07:20:38","name":"[v2] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912072038.1230798-1-pan2.li@intel.com/mbox/"},{"id":137997,"url":"https://patchwork.plctlab.org/api/1.2/patches/137997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com/","msgid":"<5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com>","list_archive_url":null,"date":"2023-09-12T07:21:28","name":"[PING^5] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com/mbox/"},{"id":138003,"url":"https://patchwork.plctlab.org/api/1.2/patches/138003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-2-kmatsui@gcc.gnu.org/","msgid":"<20230912074423.5248-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T07:23:28","name":"[1/2] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-2-kmatsui@gcc.gnu.org/mbox/"},{"id":138005,"url":"https://patchwork.plctlab.org/api/1.2/patches/138005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-3-kmatsui@gcc.gnu.org/","msgid":"<20230912074423.5248-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T07:23:29","name":"[2/2] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-3-kmatsui@gcc.gnu.org/mbox/"},{"id":138007,"url":"https://patchwork.plctlab.org/api/1.2/patches/138007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba6b6653-c926-6a49-a3b3-659d4af2b3a2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:46:48","name":"[PING^3,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba6b6653-c926-6a49-a3b3-659d4af2b3a2@linux.ibm.com/mbox/"},{"id":138032,"url":"https://patchwork.plctlab.org/api/1.2/patches/138032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edj3zsns.fsf@euler.schwinge.homeip.net/","msgid":"<87edj3zsns.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T08:45:27","name":"testsuite: Port '\''check-function-bodies'\'' to nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edj3zsns.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138033,"url":"https://patchwork.plctlab.org/api/1.2/patches/138033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912084613.1552014-1-pan2.li@intel.com/","msgid":"<20230912084613.1552014-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T08:46:13","name":"[v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912084613.1552014-1-pan2.li@intel.com/mbox/"},{"id":138037,"url":"https://patchwork.plctlab.org/api/1.2/patches/138037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912085728.2155459-1-lehua.ding@rivai.ai/","msgid":"<20230912085728.2155459-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T08:57:28","name":"RISC-V: Add missed cond autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912085728.2155459-1-lehua.ding@rivai.ai/mbox/"},{"id":138040,"url":"https://patchwork.plctlab.org/api/1.2/patches/138040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bke7zrw5.fsf@euler.schwinge.homeip.net/","msgid":"<87bke7zrw5.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:02:02","name":"nvptx '\''TARGET_USE_LOCAL_THUNK_ALIAS_P'\'', '\''TARGET_SUPPORTS_ALIASES'\'' (was: [committed][nvptx] Use .alias directive for mptx >= 6.3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bke7zrw5.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138048,"url":"https://patchwork.plctlab.org/api/1.2/patches/138048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912091805.2322-1-wangfeng@eswincomputing.com/","msgid":"<20230912091805.2322-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T09:18:05","name":"[v6] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912091805.2322-1-wangfeng@eswincomputing.com/mbox/"},{"id":138062,"url":"https://patchwork.plctlab.org/api/1.2/patches/138062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y4fzqca.fsf@euler.schwinge.homeip.net/","msgid":"<875y4fzqca.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:35:33","name":"Pass '\''SYSROOT_CFLAGS_FOR_TARGET'\'' down to target libraries [PR109951] (was: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y4fzqca.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138064,"url":"https://patchwork.plctlab.org/api/1.2/patches/138064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jjzzqc2.fsf@euler.schwinge.homeip.net/","msgid":"<874jjzzqc2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:35:41","name":"libgomp: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR91884, PR109951] (was: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jjzzqc2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138077,"url":"https://patchwork.plctlab.org/api/1.2/patches/138077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-2-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-2-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:03","name":"[v2,01/11] Native complex ops : Conditional lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-2-snoiry@kalrayinc.com/mbox/"},{"id":138078,"url":"https://patchwork.plctlab.org/api/1.2/patches/138078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-3-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-3-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:04","name":"[v2,02/11] Native complex ops: Move functions to hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-3-snoiry@kalrayinc.com/mbox/"},{"id":138076,"url":"https://patchwork.plctlab.org/api/1.2/patches/138076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-4-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-4-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:05","name":"[v2,03/11] Native complex ops: Add gen_rtx_complex hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-4-snoiry@kalrayinc.com/mbox/"},{"id":138082,"url":"https://patchwork.plctlab.org/api/1.2/patches/138082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-5-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-5-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:06","name":"[v2,04/11] Native complex ops: Allow native complex regs and ops in rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-5-snoiry@kalrayinc.com/mbox/"},{"id":138085,"url":"https://patchwork.plctlab.org/api/1.2/patches/138085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-6-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-6-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:07","name":"[v2,05/11] Native complex ops: Add the conjugate op in optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-6-snoiry@kalrayinc.com/mbox/"},{"id":138080,"url":"https://patchwork.plctlab.org/api/1.2/patches/138080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-7-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-7-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:08","name":"[v2,06/11] Native complex ops: Update how complex rotations are handled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-7-snoiry@kalrayinc.com/mbox/"},{"id":138086,"url":"https://patchwork.plctlab.org/api/1.2/patches/138086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-8-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-8-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:09","name":"[v2,07/11] Native complex ops: Vectorization of native complex operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-8-snoiry@kalrayinc.com/mbox/"},{"id":138079,"url":"https://patchwork.plctlab.org/api/1.2/patches/138079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-9-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-9-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:10","name":"[v2,08/11] Native complex ops: Add explicit vector of complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-9-snoiry@kalrayinc.com/mbox/"},{"id":138083,"url":"https://patchwork.plctlab.org/api/1.2/patches/138083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-10-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-10-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:11","name":"[v2,09/11] Native complex ops: remove useless special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-10-snoiry@kalrayinc.com/mbox/"},{"id":138081,"url":"https://patchwork.plctlab.org/api/1.2/patches/138081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-11-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-11-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:12","name":"[v2,10/11] Native complex ops: Add a fast complex multiplication pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-11-snoiry@kalrayinc.com/mbox/"},{"id":138084,"url":"https://patchwork.plctlab.org/api/1.2/patches/138084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-12-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-12-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:13","name":"[v2,11/11] Native complex ops: Experimental support in x86 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-12-snoiry@kalrayinc.com/mbox/"},{"id":138095,"url":"https://patchwork.plctlab.org/api/1.2/patches/138095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qf3zmi4.fsf@euler.schwinge.homeip.net/","msgid":"<871qf3zmi4.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T10:58:27","name":"libffi: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH v5 GCC] libffi/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qf3zmi4.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138096,"url":"https://patchwork.plctlab.org/api/1.2/patches/138096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912110026.2310378-1-juzhe.zhong@rivai.ai/","msgid":"<20230912110026.2310378-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T11:00:25","name":"[V5] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912110026.2310378-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138098,"url":"https://patchwork.plctlab.org/api/1.2/patches/138098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1hby7pb.fsf@euler.schwinge.homeip.net/","msgid":"<87y1hby7pb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T11:03:28","name":"libatomic: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH v4 1/5] libatomic/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1hby7pb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138102,"url":"https://patchwork.plctlab.org/api/1.2/patches/138102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7jy73y.fsf@euler.schwinge.homeip.net/","msgid":"<87sf7jy73y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T11:16:17","name":"libgo: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH 3/4] libgo/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7jy73y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138117,"url":"https://patchwork.plctlab.org/api/1.2/patches/138117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114520.1978760-1-jwakely@redhat.com/","msgid":"<20230912114520.1978760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T11:45:08","name":"[committed] libstdc++: Format Python code according to PEP8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114520.1978760-1-jwakely@redhat.com/mbox/"},{"id":138118,"url":"https://patchwork.plctlab.org/api/1.2/patches/138118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114534.1978778-1-jwakely@redhat.com/","msgid":"<20230912114534.1978778-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T11:45:21","name":"[committed] contrib: Quote variable in test expression [PR111360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114534.1978778-1-jwakely@redhat.com/mbox/"},{"id":138167,"url":"https://patchwork.plctlab.org/api/1.2/patches/138167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912130254.1658075-1-pan2.li@intel.com/","msgid":"<20230912130254.1658075-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T13:02:54","name":"[v1] RISC-V: Remove unused structure in cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912130254.1658075-1-pan2.li@intel.com/mbox/"},{"id":138178,"url":"https://patchwork.plctlab.org/api/1.2/patches/138178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912131927.83094-1-juzhe.zhong@rivai.ai/","msgid":"<20230912131927.83094-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T13:19:27","name":"RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912131927.83094-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138184,"url":"https://patchwork.plctlab.org/api/1.2/patches/138184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912133202.94470-1-juzhe.zhong@rivai.ai/","msgid":"<20230912133202.94470-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T13:32:02","name":"[V2] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912133202.94470-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138190,"url":"https://patchwork.plctlab.org/api/1.2/patches/138190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912134044.1993413-1-jwakely@redhat.com/","msgid":"<20230912134044.1993413-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T13:39:52","name":"[14/13] libstdc++: Re-initialize static data files used by tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912134044.1993413-1-jwakely@redhat.com/mbox/"},{"id":138218,"url":"https://patchwork.plctlab.org/api/1.2/patches/138218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com/","msgid":"<10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com>","list_archive_url":null,"date":"2023-09-12T14:27:31","name":"libgomp, nvptx, amdgcn: parallel reverse offload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com/mbox/"},{"id":138249,"url":"https://patchwork.plctlab.org/api/1.2/patches/138249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-2-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:11","name":"[01/19] aarch64: Use local frame vars in shrink-wrapping code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-2-richard.sandiford@arm.com/mbox/"},{"id":138254,"url":"https://patchwork.plctlab.org/api/1.2/patches/138254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-3-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:12","name":"[02/19] aarch64: Avoid a use of callee_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-3-richard.sandiford@arm.com/mbox/"},{"id":138260,"url":"https://patchwork.plctlab.org/api/1.2/patches/138260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-4-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:13","name":"[03/19] aarch64: Explicitly handle frames with no saved registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-4-richard.sandiford@arm.com/mbox/"},{"id":138266,"url":"https://patchwork.plctlab.org/api/1.2/patches/138266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-5-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:14","name":"[04/19] aarch64: Add bytes_below_saved_regs to frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-5-richard.sandiford@arm.com/mbox/"},{"id":138252,"url":"https://patchwork.plctlab.org/api/1.2/patches/138252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-6-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:15","name":"[05/19] aarch64: Add bytes_below_hard_fp to frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-6-richard.sandiford@arm.com/mbox/"},{"id":138255,"url":"https://patchwork.plctlab.org/api/1.2/patches/138255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-7-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:16","name":"[06/19] aarch64: Tweak aarch64_save/restore_callee_saves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-7-richard.sandiford@arm.com/mbox/"},{"id":138251,"url":"https://patchwork.plctlab.org/api/1.2/patches/138251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-8-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-8-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:17","name":"[07/19] aarch64: Only calculate chain_offset if there is a chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-8-richard.sandiford@arm.com/mbox/"},{"id":138270,"url":"https://patchwork.plctlab.org/api/1.2/patches/138270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-9-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-9-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:18","name":"[08/19] aarch64: Rename locals_offset to bytes_above_locals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-9-richard.sandiford@arm.com/mbox/"},{"id":138259,"url":"https://patchwork.plctlab.org/api/1.2/patches/138259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-10-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-10-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:19","name":"[09/19] aarch64: Rename hard_fp_offset to bytes_above_hard_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-10-richard.sandiford@arm.com/mbox/"},{"id":138262,"url":"https://patchwork.plctlab.org/api/1.2/patches/138262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-11-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-11-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:20","name":"[10/19] aarch64: Tweak frame_size comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-11-richard.sandiford@arm.com/mbox/"},{"id":138258,"url":"https://patchwork.plctlab.org/api/1.2/patches/138258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-12-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-12-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:21","name":"[11/19] aarch64: Measure reg_offset from the bottom of the frame","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-12-richard.sandiford@arm.com/mbox/"},{"id":138253,"url":"https://patchwork.plctlab.org/api/1.2/patches/138253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-13-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-13-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:22","name":"[12/19] aarch64: Simplify top of frame allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-13-richard.sandiford@arm.com/mbox/"},{"id":138263,"url":"https://patchwork.plctlab.org/api/1.2/patches/138263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-14-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-14-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:23","name":"[13/19] aarch64: Minor initial adjustment tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-14-richard.sandiford@arm.com/mbox/"},{"id":138267,"url":"https://patchwork.plctlab.org/api/1.2/patches/138267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-15-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-15-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:24","name":"[14/19] aarch64: Tweak stack clash boundary condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-15-richard.sandiford@arm.com/mbox/"},{"id":138265,"url":"https://patchwork.plctlab.org/api/1.2/patches/138265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-16-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-16-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:25","name":"[15/19] aarch64: Put LR save probe in first 16 bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-16-richard.sandiford@arm.com/mbox/"},{"id":138271,"url":"https://patchwork.plctlab.org/api/1.2/patches/138271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-17-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-17-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:26","name":"[16/19] aarch64: Simplify probe of final frame allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-17-richard.sandiford@arm.com/mbox/"},{"id":138273,"url":"https://patchwork.plctlab.org/api/1.2/patches/138273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-18-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-18-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:27","name":"[17/19] aarch64: Explicitly record probe registers in frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-18-richard.sandiford@arm.com/mbox/"},{"id":138268,"url":"https://patchwork.plctlab.org/api/1.2/patches/138268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-19-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-19-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:28","name":"[18/19] aarch64: Remove below_hard_fp_saved_regs_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-19-richard.sandiford@arm.com/mbox/"},{"id":138272,"url":"https://patchwork.plctlab.org/api/1.2/patches/138272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-20-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-20-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:29","name":"[19/19] aarch64: Make stack smash canary protect saved registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-20-richard.sandiford@arm.com/mbox/"},{"id":138256,"url":"https://patchwork.plctlab.org/api/1.2/patches/138256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-1-apinski@marvell.com/","msgid":"<20230912152542.1440800-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T15:25:41","name":"[1/2] MATCH: [PR111364] Add some more minmax cmp operand simplifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-1-apinski@marvell.com/mbox/"},{"id":138274,"url":"https://patchwork.plctlab.org/api/1.2/patches/138274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-2-apinski@marvell.com/","msgid":"<20230912152542.1440800-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T15:25:42","name":"[2/2] MATCH: Move `X <= MAX(X, Y)` before `MIN (X, C1) < C2` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-2-apinski@marvell.com/mbox/"},{"id":138295,"url":"https://patchwork.plctlab.org/api/1.2/patches/138295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162514.2001863-1-lehua.ding@rivai.ai/","msgid":"<20230912162514.2001863-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:14","name":"RISC-V: Support cond vfsgnj.vv autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162514.2001863-1-lehua.ding@rivai.ai/mbox/"},{"id":138294,"url":"https://patchwork.plctlab.org/api/1.2/patches/138294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162527.2001917-1-lehua.ding@rivai.ai/","msgid":"<20230912162527.2001917-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:27","name":"RISC-V: Support cond vnsrl/vnsra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162527.2001917-1-lehua.ding@rivai.ai/mbox/"},{"id":138297,"url":"https://patchwork.plctlab.org/api/1.2/patches/138297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162540.2001990-1-lehua.ding@rivai.ai/","msgid":"<20230912162540.2001990-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:40","name":"RISC-V: Support cond vmulh.vv and vmulu.vv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162540.2001990-1-lehua.ding@rivai.ai/mbox/"},{"id":138303,"url":"https://patchwork.plctlab.org/api/1.2/patches/138303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com/","msgid":"<92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com>","list_archive_url":null,"date":"2023-09-12T16:32:44","name":"[OG13,committed] libgomp, nvptx, amdgcn: parallel reverse offload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com/mbox/"},{"id":138308,"url":"https://patchwork.plctlab.org/api/1.2/patches/138308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcff01b9-29c7-df6a-cab3-4883e7db95a3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T16:39:59","name":"[v1] rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcff01b9-29c7-df6a-cab3-4883e7db95a3@linux.ibm.com/mbox/"},{"id":138331,"url":"https://patchwork.plctlab.org/api/1.2/patches/138331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172703.1929911-1-jason@redhat.com/","msgid":"<20230912172703.1929911-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:27:03","name":"[pushed] c++: ICE with -fno-exceptions and array init [PR107198]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172703.1929911-1-jason@redhat.com/mbox/"},{"id":138333,"url":"https://patchwork.plctlab.org/api/1.2/patches/138333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172744.1930180-1-jason@redhat.com/","msgid":"<20230912172744.1930180-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:27:44","name":"[pushed] c++: __integer_pack with class argument [PR111357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172744.1930180-1-jason@redhat.com/mbox/"},{"id":138335,"url":"https://patchwork.plctlab.org/api/1.2/patches/138335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912173036.1930553-1-jason@redhat.com/","msgid":"<20230912173036.1930553-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:30:36","name":"[RFC] diagnostic: add permerror variants with opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912173036.1930553-1-jason@redhat.com/mbox/"},{"id":138381,"url":"https://patchwork.plctlab.org/api/1.2/patches/138381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912185436.314306-1-patrick@rivosinc.com/","msgid":"<20230912185436.314306-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-12T18:54:36","name":"check_GNU_style.py: Skip .md square bracket linting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912185436.314306-1-patrick@rivosinc.com/mbox/"},{"id":138390,"url":"https://patchwork.plctlab.org/api/1.2/patches/138390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sN-VprzcsPFuDwoQ+U0n+n-G+MU6+yTRqsD159qhdnsxw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T19:09:07","name":"[V2] RISC-V: Replace not + bitwise_imm with li + bitwise_not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sN-VprzcsPFuDwoQ+U0n+n-G+MU6+yTRqsD159qhdnsxw@mail.gmail.com/mbox/"},{"id":138459,"url":"https://patchwork.plctlab.org/api/1.2/patches/138459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912221013.1456582-1-apinski@marvell.com/","msgid":"<20230912221013.1456582-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T22:10:13","name":"MATCH: Simplify `(X % Y) < Y` pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912221013.1456582-1-apinski@marvell.com/mbox/"},{"id":138501,"url":"https://patchwork.plctlab.org/api/1.2/patches/138501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913003320.1896552-1-ppalka@redhat.com/","msgid":"<20230913003320.1896552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T00:33:20","name":"c++: always check arity before deduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913003320.1896552-1-ppalka@redhat.com/mbox/"},{"id":138511,"url":"https://patchwork.plctlab.org/api/1.2/patches/138511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913005422.17544-1-chenglulu@loongson.cn/","msgid":"<20230913005422.17544-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-13T00:54:23","name":"[v2] LoongArch: Fix bug of '\''di3_fake'\''.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913005422.17544-1-chenglulu@loongson.cn/mbox/"},{"id":138572,"url":"https://patchwork.plctlab.org/api/1.2/patches/138572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913031116.19464-1-chenglulu@loongson.cn/","msgid":"<20230913031116.19464-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:11:16","name":"LoongArch: Change the value of branch_cost from 2 to 6.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913031116.19464-1-chenglulu@loongson.cn/mbox/"},{"id":138576,"url":"https://patchwork.plctlab.org/api/1.2/patches/138576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913032235.2853225-1-juzhe.zhong@rivai.ai/","msgid":"<20230913032235.2853225-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T03:22:35","name":"[committed] RISC-V: Remove redundant ABI test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913032235.2853225-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138578,"url":"https://patchwork.plctlab.org/api/1.2/patches/138578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-2-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:26","name":"[v4,01/23] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-2-chenxiaolong@loongson.cn/mbox/"},{"id":138579,"url":"https://patchwork.plctlab.org/api/1.2/patches/138579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-3-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:27","name":"[v4,02/23] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-3-chenxiaolong@loongson.cn/mbox/"},{"id":138580,"url":"https://patchwork.plctlab.org/api/1.2/patches/138580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-4-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:28","name":"[v4,03/23] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-4-chenxiaolong@loongson.cn/mbox/"},{"id":138581,"url":"https://patchwork.plctlab.org/api/1.2/patches/138581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-5-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:29","name":"[v4,04/23] LoongArch: Add tests for SX vector floating-point instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-5-chenxiaolong@loongson.cn/mbox/"},{"id":138582,"url":"https://patchwork.plctlab.org/api/1.2/patches/138582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-6-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:30","name":"[v4,05/23] LoongArch: Add tests for SX vector addition instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-6-chenxiaolong@loongson.cn/mbox/"},{"id":138583,"url":"https://patchwork.plctlab.org/api/1.2/patches/138583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-7-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:31","name":"[v4,06/23] LoongArch: Add tests for SX vector subtraction instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-7-chenxiaolong@loongson.cn/mbox/"},{"id":138585,"url":"https://patchwork.plctlab.org/api/1.2/patches/138585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-8-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:32","name":"[v4,07/23] LoongArch: Add tests for SX vector addition vsadd instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-8-chenxiaolong@loongson.cn/mbox/"},{"id":138584,"url":"https://patchwork.plctlab.org/api/1.2/patches/138584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-9-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:33","name":"[v4,08/23] LoongArch: Add tests for the SX vector multiplication instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-9-chenxiaolong@loongson.cn/mbox/"},{"id":138586,"url":"https://patchwork.plctlab.org/api/1.2/patches/138586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033443.5912-1-chenxiaolong@loongson.cn/","msgid":"<20230913033443.5912-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:34:43","name":"[v4,09/23] LoongArch: Add tests for SX vector vavg/vavgr instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033443.5912-1-chenxiaolong@loongson.cn/mbox/"},{"id":138592,"url":"https://patchwork.plctlab.org/api/1.2/patches/138592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-1-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:13","name":"[v4,10/23] LoongArch: Add tests for SX vector vmax/vmaxi/vmin/vmini instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-1-chenxiaolong@loongson.cn/mbox/"},{"id":138595,"url":"https://patchwork.plctlab.org/api/1.2/patches/138595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-2-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:14","name":"[v4,11/23] LoongArch: Add tests for SX vector vexth/vextl/vldi/vneg/vsat instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-2-chenxiaolong@loongson.cn/mbox/"},{"id":138589,"url":"https://patchwork.plctlab.org/api/1.2/patches/138589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-3-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:15","name":"[v4,12/23] LoongArch: Add tests for SX vector vabsd/vmskgez/vmskltz/vmsknz/vsigncov instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-3-chenxiaolong@loongson.cn/mbox/"},{"id":138588,"url":"https://patchwork.plctlab.org/api/1.2/patches/138588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-4-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:16","name":"[v4,13/23] LoongArch: Add tests for SX vector vdiv/vmod instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-4-chenxiaolong@loongson.cn/mbox/"},{"id":138591,"url":"https://patchwork.plctlab.org/api/1.2/patches/138591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-5-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:17","name":"[v4,14/23] LoongArch: Add tests for SX vector vsll/vslli/vsrl/vsrli/vsrln/vsrlni/vsrlr /vsrlri/vslrlrn/vsrlrni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-5-chenxiaolong@loongson.cn/mbox/"},{"id":138590,"url":"https://patchwork.plctlab.org/api/1.2/patches/138590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-6-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:18","name":"[v4,15/23] LoongArch: Add tests for SX vector vrotr/vrotri/vsra/vsrai/vsran/vsrani /vsrarn/vsrarni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-6-chenxiaolong@loongson.cn/mbox/"},{"id":138594,"url":"https://patchwork.plctlab.org/api/1.2/patches/138594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-7-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:19","name":"[v4,16/23] LoongArch: Add tests for SX vector vssran/vssrani/vssrarn/vssrarni/vssrln /vssrlni/vssrlrn/vssrlrni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-7-chenxiaolong@loongson.cn/mbox/"},{"id":138600,"url":"https://patchwork.plctlab.org/api/1.2/patches/138600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-8-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:20","name":"[v4,17/23] LoongArch: Add tests for SX vector vbitclr/vbitclri/vbitrev/vbitrevi/ vbitsel/vbitseli/vbitset/vbitseti/vclo/vclz/vpcnt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-8-chenxiaolong@loongson.cn/mbox/"},{"id":138593,"url":"https://patchwork.plctlab.org/api/1.2/patches/138593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-9-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:21","name":"[v4,18/23] LoongArch: Add tests for SX vector floating point arithmetic instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-9-chenxiaolong@loongson.cn/mbox/"},{"id":138598,"url":"https://patchwork.plctlab.org/api/1.2/patches/138598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033638.6181-1-chenxiaolong@loongson.cn/","msgid":"<20230913033638.6181-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:36:37","name":"[v4,19/23] LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseqi/vsle /vslei/vslt/vslti instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033638.6181-1-chenxiaolong@loongson.cn/mbox/"},{"id":138604,"url":"https://patchwork.plctlab.org/api/1.2/patches/138604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-1-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:23","name":"[v4,20/23] LoongArch: Add tests for SX vector vfcmp instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-1-chenxiaolong@loongson.cn/mbox/"},{"id":138601,"url":"https://patchwork.plctlab.org/api/1.2/patches/138601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-2-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:24","name":"[v4,21/23] LoongArch: Add tests for SX vector handling and shuffle instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-2-chenxiaolong@loongson.cn/mbox/"},{"id":138599,"url":"https://patchwork.plctlab.org/api/1.2/patches/138599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-3-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:25","name":"[v4,22/23] LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vori/vnor/ vnori/vxor/vxori instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-3-chenxiaolong@loongson.cn/mbox/"},{"id":138602,"url":"https://patchwork.plctlab.org/api/1.2/patches/138602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-4-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:26","name":"[v4,23/23] LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-4-chenxiaolong@loongson.cn/mbox/"},{"id":138605,"url":"https://patchwork.plctlab.org/api/1.2/patches/138605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-2-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:38","name":"[v4,01/22] LoongArch: Add tests for ASX vector xvadd/xvadda/xvaddi/xvaddwev/ xvaddwodxvsadd instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-2-chenxiaolong@loongson.cn/mbox/"},{"id":138607,"url":"https://patchwork.plctlab.org/api/1.2/patches/138607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-3-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:39","name":"[v4,02/22] LoongArch: Add tests for ASX vector xvhadd/xvhaddw/xvmaddwev/xvmaddwod instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-3-chenxiaolong@loongson.cn/mbox/"},{"id":138608,"url":"https://patchwork.plctlab.org/api/1.2/patches/138608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-4-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:40","name":"[v4,03/22] LoongArch: Add tests for ASX vector subtraction instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-4-chenxiaolong@loongson.cn/mbox/"},{"id":138613,"url":"https://patchwork.plctlab.org/api/1.2/patches/138613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-5-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:41","name":"[v4,04/22] LoongArch: Add tests for ASX vector xvmul/xvmod/xvdiv instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-5-chenxiaolong@loongson.cn/mbox/"},{"id":138615,"url":"https://patchwork.plctlab.org/api/1.2/patches/138615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-6-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:42","name":"[v4,05/22] LoongArch: Add tests for ASX vector xvmax/xvmaxi/xvmin/xvmini instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-6-chenxiaolong@loongson.cn/mbox/"},{"id":138612,"url":"https://patchwork.plctlab.org/api/1.2/patches/138612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-7-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:43","name":"[v4,06/22] LoongArch: Add tests for ASX vector xvldi/xvmskgez/xvmskltz/xvmsknz/xvmuh /xvsigncov instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-7-chenxiaolong@loongson.cn/mbox/"},{"id":138617,"url":"https://patchwork.plctlab.org/api/1.2/patches/138617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-8-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:44","name":"[v4,07/22] LoongArch: Add tests for ASX vector xvand/xvandi/xvandn/xvor/xvori/ xvnor/xvnori/xvxor/xvxori instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-8-chenxiaolong@loongson.cn/mbox/"},{"id":138609,"url":"https://patchwork.plctlab.org/api/1.2/patches/138609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-9-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:45","name":"[v4,08/22] LoongArch: Add tests for ASX vector xvsll/xvsrl instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-9-chenxiaolong@loongson.cn/mbox/"},{"id":138616,"url":"https://patchwork.plctlab.org/api/1.2/patches/138616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034010.7569-1-chenxiaolong@loongson.cn/","msgid":"<20230913034010.7569-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:10","name":"[v4,09/22] LoongArch: Add tests for ASX vector xvextl/xvsra/xvsran/xvsrarn instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034010.7569-1-chenxiaolong@loongson.cn/mbox/"},{"id":138620,"url":"https://patchwork.plctlab.org/api/1.2/patches/138620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-2-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:18","name":"[v4,11/22] LoongArch: Add tests for ASX vector xvbitclr/xvbitclri/xvbitrev/xvbitrevi/ xvbitsel/xvbitseli/xvbitset/xvbitseti/xvclo/xvclz/xvpcnt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-2-chenxiaolong@loongson.cn/mbox/"},{"id":138624,"url":"https://patchwork.plctlab.org/api/1.2/patches/138624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-3-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:19","name":"[v4,12/22] LoongArch: Add tests for ASX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-3-chenxiaolong@loongson.cn/mbox/"},{"id":138622,"url":"https://patchwork.plctlab.org/api/1.2/patches/138622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-4-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:20","name":"[v4,13/22] LoongArch: Add tests for ASX xvldrepl/xvstelm instruction generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-4-chenxiaolong@loongson.cn/mbox/"},{"id":138614,"url":"https://patchwork.plctlab.org/api/1.2/patches/138614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-5-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:21","name":"[v4,14/22] LoongArch: Add tests for ASX vector floating-point operation instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-5-chenxiaolong@loongson.cn/mbox/"},{"id":138619,"url":"https://patchwork.plctlab.org/api/1.2/patches/138619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-6-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:22","name":"[v4,15/22] LoongArch: Add tests for ASX vector floating-point conversion instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-6-chenxiaolong@loongson.cn/mbox/"},{"id":138629,"url":"https://patchwork.plctlab.org/api/1.2/patches/138629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-7-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:23","name":"[v4,16/22] LoongArch: Add tests for ASX vector comparison and selection instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-7-chenxiaolong@loongson.cn/mbox/"},{"id":138631,"url":"https://patchwork.plctlab.org/api/1.2/patches/138631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-8-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:24","name":"[v4,17/22] LoongArch: Add tests for ASX vector xvfnmadd/xvfrstp/xvfstpi/xvhsubw/ xvmsub/xvrotr/xvrotri/xvld/xvst instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-8-chenxiaolong@loongson.cn/mbox/"},{"id":138621,"url":"https://patchwork.plctlab.org/api/1.2/patches/138621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-9-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:25","name":"[v4,18/22] LoongArch: Add tests for ASX vector xvabsd/xvavg/xvavgr/xvbsll/xvbsrl/xvneg/ xvsat instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-9-chenxiaolong@loongson.cn/mbox/"},{"id":138625,"url":"https://patchwork.plctlab.org/api/1.2/patches/138625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034305.8325-1-chenxiaolong@loongson.cn/","msgid":"<20230913034305.8325-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:05","name":"[v4,19/22] LoongArch: Add tests for ASX vector xvfcmp{caf/ceq/cle/clt/cne/cor/cun} instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034305.8325-1-chenxiaolong@loongson.cn/mbox/"},{"id":138628,"url":"https://patchwork.plctlab.org/api/1.2/patches/138628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-1-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:28","name":"[v4,20/22] LoongArch: Add tests for ASX vector xvfcmp{saf/seq/sle/slt/sne/sor/sun} instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-1-chenxiaolong@loongson.cn/mbox/"},{"id":138627,"url":"https://patchwork.plctlab.org/api/1.2/patches/138627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-2-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:29","name":"[v4,21/22] LoongArch: Add tests for ASX vector xvext2xv/xvexth/xvextins/xvilvh/xvilvl/xvinsgr2vr/ xvinsve0/xvprem/xvpremi instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-2-chenxiaolong@loongson.cn/mbox/"},{"id":138630,"url":"https://patchwork.plctlab.org/api/1.2/patches/138630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-3-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:30","name":"[v4,22/22] LoongArch: Add tests for ASX vector xvpackev/xvpackod/xvpickev/xvpickod/ xvpickve2gr/xvreplgr2vr/xvreplve/xvreplve0/xvreplvei/xvshuf4i/xvshuf instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-3-chenxiaolong@loongson.cn/mbox/"},{"id":138654,"url":"https://patchwork.plctlab.org/api/1.2/patches/138654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913060630.3930824-1-pan2.li@intel.com/","msgid":"<20230913060630.3930824-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-13T06:06:30","name":"[v1] RISC-V: Bugfix PR111362 for incorrect frm emit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913060630.3930824-1-pan2.li@intel.com/mbox/"},{"id":138695,"url":"https://patchwork.plctlab.org/api/1.2/patches/138695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913082312.2E6193858296@sourceware.org/","msgid":"<20230913082312.2E6193858296@sourceware.org>","list_archive_url":null,"date":"2023-09-13T08:22:15","name":"tree-optimization/111397 - missed copy propagation involving abnormal dest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913082312.2E6193858296@sourceware.org/mbox/"},{"id":138724,"url":"https://patchwork.plctlab.org/api/1.2/patches/138724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913095214.125470-1-yangyujie@loongson.cn/","msgid":"<20230913095214.125470-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-13T09:52:14","name":"LoongArch: Reimplement multilib build option handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913095214.125470-1-yangyujie@loongson.cn/mbox/"},{"id":138755,"url":"https://patchwork.plctlab.org/api/1.2/patches/138755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913114232.930E83857029@sourceware.org/","msgid":"<20230913114232.930E83857029@sourceware.org>","list_archive_url":null,"date":"2023-09-13T11:41:46","name":"tree-optimization/111387 - BB SLP and irreducible regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913114232.930E83857029@sourceware.org/mbox/"},{"id":138773,"url":"https://patchwork.plctlab.org/api/1.2/patches/138773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913121802.3521096-1-juzhe.zhong@rivai.ai/","msgid":"<20230913121802.3521096-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:18:02","name":"RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913121802.3521096-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138779,"url":"https://patchwork.plctlab.org/api/1.2/patches/138779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123117.3580126-1-lehua.ding@rivai.ai/","msgid":"<20230913123117.3580126-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:31:17","name":"[1/2] RISC-V: Cleanup redundant reduction patterns after refactor vector mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123117.3580126-1-lehua.ding@rivai.ai/mbox/"},{"id":138778,"url":"https://patchwork.plctlab.org/api/1.2/patches/138778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123137.3580445-1-lehua.ding@rivai.ai/","msgid":"<20230913123137.3580445-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:31:37","name":"[2/2] RISC-V: Refactor vector reduction patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123137.3580445-1-lehua.ding@rivai.ai/mbox/"},{"id":138780,"url":"https://patchwork.plctlab.org/api/1.2/patches/138780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123226.2083892-1-jwakely@redhat.com/","msgid":"<20230913123226.2083892-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-13T12:31:40","name":"libstdc++: Remove some more unconditional uses of atomics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123226.2083892-1-jwakely@redhat.com/mbox/"},{"id":138789,"url":"https://patchwork.plctlab.org/api/1.2/patches/138789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913130122.1145168-1-juzhe.zhong@rivai.ai/","msgid":"<20230913130122.1145168-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T13:01:22","name":"RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913130122.1145168-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138807,"url":"https://patchwork.plctlab.org/api/1.2/patches/138807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913140308.3446121-1-juzhe.zhong@rivai.ai/","msgid":"<20230913140308.3446121-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T14:03:08","name":"[V2] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913140308.3446121-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138835,"url":"https://patchwork.plctlab.org/api/1.2/patches/138835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826AB4E511294ABCE0563383F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:19:18","name":"AArch64: List official cores before codenames","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826AB4E511294ABCE0563383F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":138875,"url":"https://patchwork.plctlab.org/api/1.2/patches/138875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=3-d-Ui2h57NzeyoTWX3WTnmVKkSQa1bc=5RstoQoS-A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:50:08","name":"[AArch64,testsuite] Adjust vect_copy_lane_1.c for new code-gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=3-d-Ui2h57NzeyoTWX3WTnmVKkSQa1bc=5RstoQoS-A@mail.gmail.com/mbox/"},{"id":138877,"url":"https://patchwork.plctlab.org/api/1.2/patches/138877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89823B565A671851A16FD40B83F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:54:28","name":"AArch64: Fix __sync_val_compare_and_swap [PR111404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89823B565A671851A16FD40B83F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":138989,"url":"https://patchwork.plctlab.org/api/1.2/patches/138989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175316.4083902-1-ppalka@redhat.com/","msgid":"<20230913175316.4083902-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T17:53:16","name":"c++: unifying identical tmpls from current inst [PR108347]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175316.4083902-1-ppalka@redhat.com/mbox/"},{"id":138990,"url":"https://patchwork.plctlab.org/api/1.2/patches/138990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175331.4084179-1-ppalka@redhat.com/","msgid":"<20230913175331.4084179-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T17:53:31","name":"c++: optimize unification of class specializations [PR89231]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175331.4084179-1-ppalka@redhat.com/mbox/"},{"id":139086,"url":"https://patchwork.plctlab.org/api/1.2/patches/139086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQIiF7Ai7Ae44BxW@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T20:56:55","name":"[v4] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQIiF7Ai7Ae44BxW@redhat.com/mbox/"},{"id":139126,"url":"https://patchwork.plctlab.org/api/1.2/patches/139126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913222911.1516503-1-apinski@marvell.com/","msgid":"<20230913222911.1516503-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-13T22:29:11","name":"Improve error message for if with an else part while in switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913222911.1516503-1-apinski@marvell.com/mbox/"},{"id":139136,"url":"https://patchwork.plctlab.org/api/1.2/patches/139136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913225206.4188935-1-ppalka@redhat.com/","msgid":"<20230913225206.4188935-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T22:52:06","name":"libstdc++: Reduce integer std::to/from_chars symbol sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913225206.4188935-1-ppalka@redhat.com/mbox/"},{"id":139170,"url":"https://patchwork.plctlab.org/api/1.2/patches/139170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQJNshEZ4KETz1a+@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T00:02:58","name":"[v5] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQJNshEZ4KETz1a+@redhat.com/mbox/"},{"id":139274,"url":"https://patchwork.plctlab.org/api/1.2/patches/139274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f33aa0cf786cf49250889463947b62632cf3f205.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:50","name":"[01/10] vect: Ensure vect store is supported for some VMAT_ELEMENTWISE case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f33aa0cf786cf49250889463947b62632cf3f205.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139269,"url":"https://patchwork.plctlab.org/api/1.2/patches/139269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com/","msgid":"<1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:51","name":"[02/10] vect: Move vect_model_store_cost next to the transform in vectorizable_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139278,"url":"https://patchwork.plctlab.org/api/1.2/patches/139278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com/","msgid":"<8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:52","name":"[03/10] vect: Adjust vectorizable_store costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139270,"url":"https://patchwork.plctlab.org/api/1.2/patches/139270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com/","msgid":"<308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:53","name":"[04/10] vect: Simplify costing on vectorizable_scan_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139272,"url":"https://patchwork.plctlab.org/api/1.2/patches/139272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com/","msgid":"<2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:54","name":"[05/10] vect: Adjust vectorizable_store costing on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139271,"url":"https://patchwork.plctlab.org/api/1.2/patches/139271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com/","msgid":"<048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:55","name":"[06/10] vect: Adjust vectorizable_store costing on VMAT_LOAD_STORE_LANES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139277,"url":"https://patchwork.plctlab.org/api/1.2/patches/139277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com/","msgid":"<03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:56","name":"[07/10] vect: Adjust vectorizable_store costing on VMAT_CONTIGUOUS_PERMUTE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139275,"url":"https://patchwork.plctlab.org/api/1.2/patches/139275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc85799abb2616dcac511424a1b50b57e48c2556.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:57","name":"[PATCH/RFC,08/10] aarch64: Don'\''t use CEIL for vector_store in aarch64_stp_sequence_cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc85799abb2616dcac511424a1b50b57e48c2556.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139279,"url":"https://patchwork.plctlab.org/api/1.2/patches/139279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2f2a8081d2ffd2459b0ff161a559e502511d8a5.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:58","name":"[09/10] vect: Get rid of vect_model_store_cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2f2a8081d2ffd2459b0ff161a559e502511d8a5.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139280,"url":"https://patchwork.plctlab.org/api/1.2/patches/139280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com/","msgid":"<7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:59","name":"[10/10] vect: Consider vec_perm costing for VMAT_CONTIGUOUS_REVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com/mbox/"},{"id":139298,"url":"https://patchwork.plctlab.org/api/1.2/patches/139298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914035854.1695213-1-juzhe.zhong@rivai.ai/","msgid":"<20230914035854.1695213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T03:58:54","name":"RISC-V: Fix ICE in get_avl_or_vl_reg[PR111395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914035854.1695213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139311,"url":"https://patchwork.plctlab.org/api/1.2/patches/139311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fad1cbed-e389-f499-42ce-6c768c00dfd8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T04:29:35","name":"[committed] Limit header synopsis test to normal namespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fad1cbed-e389-f499-42ce-6c768c00dfd8@gmail.com/mbox/"},{"id":139327,"url":"https://patchwork.plctlab.org/api/1.2/patches/139327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914053350.1533941-1-apinski@marvell.com/","msgid":"<20230914053350.1533941-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-14T05:33:50","name":"MATCH: Support `(a != (CST+1)) & (a > CST)` optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914053350.1533941-1-apinski@marvell.com/mbox/"},{"id":139349,"url":"https://patchwork.plctlab.org/api/1.2/patches/139349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com/","msgid":"<28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com>","list_archive_url":null,"date":"2023-09-14T06:41:22","name":"debug/111409 - don'\''t generate COMDAT macro sections for split DWARF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com/mbox/"},{"id":139388,"url":"https://patchwork.plctlab.org/api/1.2/patches/139388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-2-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:40","name":"[v11,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-2-kmatsui@gcc.gnu.org/mbox/"},{"id":139386,"url":"https://patchwork.plctlab.org/api/1.2/patches/139386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-3-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:41","name":"[v11,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-3-kmatsui@gcc.gnu.org/mbox/"},{"id":139363,"url":"https://patchwork.plctlab.org/api/1.2/patches/139363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-4-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:42","name":"[v11,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-4-kmatsui@gcc.gnu.org/mbox/"},{"id":139390,"url":"https://patchwork.plctlab.org/api/1.2/patches/139390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-5-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:43","name":"[v11,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-5-kmatsui@gcc.gnu.org/mbox/"},{"id":139394,"url":"https://patchwork.plctlab.org/api/1.2/patches/139394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-6-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:44","name":"[v11,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-6-kmatsui@gcc.gnu.org/mbox/"},{"id":139399,"url":"https://patchwork.plctlab.org/api/1.2/patches/139399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-7-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:45","name":"[v11,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-7-kmatsui@gcc.gnu.org/mbox/"},{"id":139397,"url":"https://patchwork.plctlab.org/api/1.2/patches/139397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-8-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:46","name":"[v11,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-8-kmatsui@gcc.gnu.org/mbox/"},{"id":139393,"url":"https://patchwork.plctlab.org/api/1.2/patches/139393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-9-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:47","name":"[v11,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-9-kmatsui@gcc.gnu.org/mbox/"},{"id":139389,"url":"https://patchwork.plctlab.org/api/1.2/patches/139389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-10-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:48","name":"[v11,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-10-kmatsui@gcc.gnu.org/mbox/"},{"id":139379,"url":"https://patchwork.plctlab.org/api/1.2/patches/139379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-11-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:49","name":"[v11,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-11-kmatsui@gcc.gnu.org/mbox/"},{"id":139391,"url":"https://patchwork.plctlab.org/api/1.2/patches/139391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-12-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:50","name":"[v11,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-12-kmatsui@gcc.gnu.org/mbox/"},{"id":139407,"url":"https://patchwork.plctlab.org/api/1.2/patches/139407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-13-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:51","name":"[v11,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-13-kmatsui@gcc.gnu.org/mbox/"},{"id":139358,"url":"https://patchwork.plctlab.org/api/1.2/patches/139358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-14-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:52","name":"[v11,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-14-kmatsui@gcc.gnu.org/mbox/"},{"id":139402,"url":"https://patchwork.plctlab.org/api/1.2/patches/139402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-15-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:53","name":"[v11,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-15-kmatsui@gcc.gnu.org/mbox/"},{"id":139381,"url":"https://patchwork.plctlab.org/api/1.2/patches/139381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-16-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:54","name":"[v11,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-16-kmatsui@gcc.gnu.org/mbox/"},{"id":139396,"url":"https://patchwork.plctlab.org/api/1.2/patches/139396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-17-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:55","name":"[v11,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-17-kmatsui@gcc.gnu.org/mbox/"},{"id":139371,"url":"https://patchwork.plctlab.org/api/1.2/patches/139371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-18-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:56","name":"[v11,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-18-kmatsui@gcc.gnu.org/mbox/"},{"id":139369,"url":"https://patchwork.plctlab.org/api/1.2/patches/139369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-19-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:57","name":"[v11,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-19-kmatsui@gcc.gnu.org/mbox/"},{"id":139368,"url":"https://patchwork.plctlab.org/api/1.2/patches/139368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-20-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:58","name":"[v11,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-20-kmatsui@gcc.gnu.org/mbox/"},{"id":139406,"url":"https://patchwork.plctlab.org/api/1.2/patches/139406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-21-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:59","name":"[v11,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-21-kmatsui@gcc.gnu.org/mbox/"},{"id":139385,"url":"https://patchwork.plctlab.org/api/1.2/patches/139385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-22-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:00","name":"[v11,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-22-kmatsui@gcc.gnu.org/mbox/"},{"id":139377,"url":"https://patchwork.plctlab.org/api/1.2/patches/139377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-23-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:01","name":"[v11,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-23-kmatsui@gcc.gnu.org/mbox/"},{"id":139404,"url":"https://patchwork.plctlab.org/api/1.2/patches/139404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-24-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:02","name":"[v11,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-24-kmatsui@gcc.gnu.org/mbox/"},{"id":139364,"url":"https://patchwork.plctlab.org/api/1.2/patches/139364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-25-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:03","name":"[v11,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-25-kmatsui@gcc.gnu.org/mbox/"},{"id":139401,"url":"https://patchwork.plctlab.org/api/1.2/patches/139401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-26-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:04","name":"[v11,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-26-kmatsui@gcc.gnu.org/mbox/"},{"id":139376,"url":"https://patchwork.plctlab.org/api/1.2/patches/139376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-27-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:05","name":"[v11,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-27-kmatsui@gcc.gnu.org/mbox/"},{"id":139395,"url":"https://patchwork.plctlab.org/api/1.2/patches/139395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-28-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:06","name":"[v11,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-28-kmatsui@gcc.gnu.org/mbox/"},{"id":139398,"url":"https://patchwork.plctlab.org/api/1.2/patches/139398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-29-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:07","name":"[v11,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-29-kmatsui@gcc.gnu.org/mbox/"},{"id":139373,"url":"https://patchwork.plctlab.org/api/1.2/patches/139373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-30-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:08","name":"[v11,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-30-kmatsui@gcc.gnu.org/mbox/"},{"id":139400,"url":"https://patchwork.plctlab.org/api/1.2/patches/139400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-31-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:09","name":"[v11,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-31-kmatsui@gcc.gnu.org/mbox/"},{"id":139375,"url":"https://patchwork.plctlab.org/api/1.2/patches/139375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-32-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:10","name":"[v11,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-32-kmatsui@gcc.gnu.org/mbox/"},{"id":139384,"url":"https://patchwork.plctlab.org/api/1.2/patches/139384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-33-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:11","name":"[v11,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-33-kmatsui@gcc.gnu.org/mbox/"},{"id":139383,"url":"https://patchwork.plctlab.org/api/1.2/patches/139383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-34-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:12","name":"[v11,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-34-kmatsui@gcc.gnu.org/mbox/"},{"id":139380,"url":"https://patchwork.plctlab.org/api/1.2/patches/139380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-35-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:13","name":"[v11,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-35-kmatsui@gcc.gnu.org/mbox/"},{"id":139378,"url":"https://patchwork.plctlab.org/api/1.2/patches/139378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-36-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:14","name":"[v11,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-36-kmatsui@gcc.gnu.org/mbox/"},{"id":139360,"url":"https://patchwork.plctlab.org/api/1.2/patches/139360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-37-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:15","name":"[v11,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-37-kmatsui@gcc.gnu.org/mbox/"},{"id":139362,"url":"https://patchwork.plctlab.org/api/1.2/patches/139362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-38-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:16","name":"[v11,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-38-kmatsui@gcc.gnu.org/mbox/"},{"id":139370,"url":"https://patchwork.plctlab.org/api/1.2/patches/139370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-39-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:17","name":"[v11,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-39-kmatsui@gcc.gnu.org/mbox/"},{"id":139374,"url":"https://patchwork.plctlab.org/api/1.2/patches/139374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-40-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:18","name":"[v11,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-40-kmatsui@gcc.gnu.org/mbox/"},{"id":139403,"url":"https://patchwork.plctlab.org/api/1.2/patches/139403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-41-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:19","name":"[v11,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-41-kmatsui@gcc.gnu.org/mbox/"},{"id":139409,"url":"https://patchwork.plctlab.org/api/1.2/patches/139409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914073528.1344178-1-juzhe.zhong@rivai.ai/","msgid":"<20230914073528.1344178-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:35:28","name":"[V2] RISC-V: Fix ICE in get_avl_or_vl_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914073528.1344178-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139414,"url":"https://patchwork.plctlab.org/api/1.2/patches/139414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075213.3213806-1-juzhe.zhong@rivai.ai/","msgid":"<20230914075213.3213806-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:52:13","name":"[V3] RISC-V: Fix ICE in get_avl_or_vl_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075213.3213806-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139416,"url":"https://patchwork.plctlab.org/api/1.2/patches/139416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075437.3222179-1-juzhe.zhong@rivai.ai/","msgid":"<20230914075437.3222179-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:54:37","name":"[Committed] RISC-V: Format VSETVL PASS code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075437.3222179-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139428,"url":"https://patchwork.plctlab.org/api/1.2/patches/139428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914080321.3234794-1-juzhe.zhong@rivai.ai/","msgid":"<20230914080321.3234794-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T08:03:21","name":"[V3] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914080321.3234794-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139450,"url":"https://patchwork.plctlab.org/api/1.2/patches/139450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914090957.1896347-1-christophe.lyon@linaro.org/","msgid":"<20230914090957.1896347-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-14T09:09:57","name":"[v2,2/2] libstdc++: Add dg-require-thread-fence in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914090957.1896347-1-christophe.lyon@linaro.org/mbox/"},{"id":139492,"url":"https://patchwork.plctlab.org/api/1.2/patches/139492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0n1kpdv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T10:42:04","name":"aarch64: Coerce addresses to be suitable for LD1RQ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0n1kpdv.fsf@arm.com/mbox/"},{"id":139493,"url":"https://patchwork.plctlab.org/api/1.2/patches/139493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4eb2a39-2006-9b58-2d4e-8b5fea0076a1@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T10:45:50","name":"ira: Consider save/restore costs of callee-save registers [PR110071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4eb2a39-2006-9b58-2d4e-8b5fea0076a1@linux.vnet.ibm.com/mbox/"},{"id":139495,"url":"https://patchwork.plctlab.org/api/1.2/patches/139495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914104952.4173011-1-juzhe.zhong@rivai.ai/","msgid":"<20230914104952.4173011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T10:49:52","name":"[V4] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914104952.4173011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139507,"url":"https://patchwork.plctlab.org/api/1.2/patches/139507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914111720.32C2D3857B8E@sourceware.org/","msgid":"<20230914111720.32C2D3857B8E@sourceware.org>","list_archive_url":null,"date":"2023-09-14T11:16:35","name":"tree-optimization/111294 - better DCE after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914111720.32C2D3857B8E@sourceware.org/mbox/"},{"id":139509,"url":"https://patchwork.plctlab.org/api/1.2/patches/139509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914112102.10247-1-chenglulu@loongson.cn/","msgid":"<20230914112102.10247-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-14T11:21:02","name":"LoongArch: gcc: Modify gas uleb128 support test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914112102.10247-1-chenglulu@loongson.cn/mbox/"},{"id":139558,"url":"https://patchwork.plctlab.org/api/1.2/patches/139558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124358.2278212-1-juzhe.zhong@rivai.ai/","msgid":"<20230914124358.2278212-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T12:43:58","name":"RISC-V: Support VLS modes mask operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124358.2278212-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139562,"url":"https://patchwork.plctlab.org/api/1.2/patches/139562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124552.1950767-1-poulhies@adacore.com/","msgid":"<20230914124552.1950767-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:45:52","name":"[COMMITTED] ada: Assertion failure adding extra formals to late overriding subp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124552.1950767-1-poulhies@adacore.com/mbox/"},{"id":139563,"url":"https://patchwork.plctlab.org/api/1.2/patches/139563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124608.1950944-1-poulhies@adacore.com/","msgid":"<20230914124608.1950944-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:08","name":"[COMMITTED] ada: Fix premature finalization in loop over limited iterable container","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124608.1950944-1-poulhies@adacore.com/mbox/"},{"id":139567,"url":"https://patchwork.plctlab.org/api/1.2/patches/139567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124609.1951006-1-poulhies@adacore.com/","msgid":"<20230914124609.1951006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:09","name":"[COMMITTED] ada: Fix late finalization for function call in delta aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124609.1951006-1-poulhies@adacore.com/mbox/"},{"id":139564,"url":"https://patchwork.plctlab.org/api/1.2/patches/139564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124611.1951068-1-poulhies@adacore.com/","msgid":"<20230914124611.1951068-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:11","name":"[COMMITTED] ada: Assertion failure on for-of loop iterating on selected component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124611.1951068-1-poulhies@adacore.com/mbox/"},{"id":139566,"url":"https://patchwork.plctlab.org/api/1.2/patches/139566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124612.1951129-1-poulhies@adacore.com/","msgid":"<20230914124612.1951129-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:12","name":"[COMMITTED] ada: Assertion failure on calculation of Large_Max_Size_Mutable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124612.1951129-1-poulhies@adacore.com/mbox/"},{"id":139568,"url":"https://patchwork.plctlab.org/api/1.2/patches/139568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124614.1951192-1-poulhies@adacore.com/","msgid":"<20230914124614.1951192-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:14","name":"[COMMITTED] ada: Assertion failure on expansion of record with invariant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124614.1951192-1-poulhies@adacore.com/mbox/"},{"id":139565,"url":"https://patchwork.plctlab.org/api/1.2/patches/139565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124615.1951253-1-poulhies@adacore.com/","msgid":"<20230914124615.1951253-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:15","name":"[COMMITTED] ada: Improve detection of deactivated code for warnings with -gnatwt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124615.1951253-1-poulhies@adacore.com/mbox/"},{"id":139582,"url":"https://patchwork.plctlab.org/api/1.2/patches/139582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132401.E8C483858C3A@sourceware.org/","msgid":"<20230914132401.E8C483858C3A@sourceware.org>","list_archive_url":null,"date":"2023-09-14T13:23:13","name":"tree-optimization/111294 - backwards threader PHI costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132401.E8C483858C3A@sourceware.org/mbox/"},{"id":139584,"url":"https://patchwork.plctlab.org/api/1.2/patches/139584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132409.2381527-1-qing.zhao@oracle.com/","msgid":"<20230914132409.2381527-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-09-14T13:24:09","name":"tree optimization/111407--SSA corruption due to widening_mul opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132409.2381527-1-qing.zhao@oracle.com/mbox/"},{"id":139587,"url":"https://patchwork.plctlab.org/api/1.2/patches/139587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132728.2165656-1-jwakely@redhat.com/","msgid":"<20230914132728.2165656-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:27:09","name":"[committed] libstdc++: Remove some more unconditional uses of atomics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132728.2165656-1-jwakely@redhat.com/mbox/"},{"id":139588,"url":"https://patchwork.plctlab.org/api/1.2/patches/139588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133214.2165670-1-jwakely@redhat.com/","msgid":"<20230914133214.2165670-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:27:30","name":"[committed] libstdc++: Support dg-additional-files in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133214.2165670-1-jwakely@redhat.com/mbox/"},{"id":139589,"url":"https://patchwork.plctlab.org/api/1.2/patches/139589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133238.2165790-1-jwakely@redhat.com/","msgid":"<20230914133238.2165790-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:32:15","name":"[committed] libstdc++: Add testcase for std::make_integer_sequence bug [PR111357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133238.2165790-1-jwakely@redhat.com/mbox/"},{"id":139613,"url":"https://patchwork.plctlab.org/api/1.2/patches/139613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914141235.35160-1-ppalka@redhat.com/","msgid":"<20230914141235.35160-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-14T14:12:35","name":"libstdc++: Use C++20 constraints in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914141235.35160-1-ppalka@redhat.com/mbox/"},{"id":139616,"url":"https://patchwork.plctlab.org/api/1.2/patches/139616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu/","msgid":"<20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2023-09-14T14:24:33","name":"Harmonize headers between both dg-extract-results scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":139625,"url":"https://patchwork.plctlab.org/api/1.2/patches/139625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptled8lszh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T14:38:58","name":"aarch64: Restore SVE WHILE costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptled8lszh.fsf@arm.com/mbox/"},{"id":139643,"url":"https://patchwork.plctlab.org/api/1.2/patches/139643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982EE0BF538316B9E8F9CCE83F7A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T15:24:38","name":"AArch64: Improve immediate expansion [PR105928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982EE0BF538316B9E8F9CCE83F7A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":139644,"url":"https://patchwork.plctlab.org/api/1.2/patches/139644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe599ae1-2e91-1273-4876-5051bf2e42b1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T15:28:33","name":"[pushed,RA] : Improve cost calculation of pseudos with equivalences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe599ae1-2e91-1273-4876-5051bf2e42b1@redhat.com/mbox/"},{"id":139654,"url":"https://patchwork.plctlab.org/api/1.2/patches/139654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914155131.2352750-1-lehua.ding@rivai.ai/","msgid":"<20230914155131.2352750-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-14T15:51:31","name":"RISC-V: Support combine extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914155131.2352750-1-lehua.ding@rivai.ai/mbox/"},{"id":139706,"url":"https://patchwork.plctlab.org/api/1.2/patches/139706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi/","msgid":"<38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-09-14T16:58:47","name":"aarch64: Ensure const and sign correctness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi/mbox/"},{"id":139753,"url":"https://patchwork.plctlab.org/api/1.2/patches/139753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914174847.1564836-1-apinski@marvell.com/","msgid":"<20230914174847.1564836-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-14T17:48:47","name":"MATCH: Fix `(1 >> X) != 0` pattern for vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914174847.1564836-1-apinski@marvell.com/mbox/"},{"id":139794,"url":"https://patchwork.plctlab.org/api/1.2/patches/139794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914191050.717517-1-jcmvbkbc@gmail.com/","msgid":"<20230914191050.717517-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-09-14T19:10:50","name":"[COMMITTED] gcc: xtensa: use salt/saltu in xtensa_expand_scc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914191050.717517-1-jcmvbkbc@gmail.com/mbox/"},{"id":139820,"url":"https://patchwork.plctlab.org/api/1.2/patches/139820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0926626-0e9e-4b9d-b9cf-a33b2b7eb9bb-1694722934093@3c-app-gmx-bs48/","msgid":"","list_archive_url":null,"date":"2023-09-14T20:22:14","name":"Fortran: improve bounds-checking for array sections [PR30802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0926626-0e9e-4b9d-b9cf-a33b2b7eb9bb-1694722934093@3c-app-gmx-bs48/mbox/"},{"id":139823,"url":"https://patchwork.plctlab.org/api/1.2/patches/139823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203120.1791493-1-dmalcolm@redhat.com/","msgid":"<20230914203120.1791493-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:31:20","name":"[pushed] analyzer: use unique_ptr for rejected_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203120.1791493-1-dmalcolm@redhat.com/mbox/"},{"id":139826,"url":"https://patchwork.plctlab.org/api/1.2/patches/139826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203914.1792717-1-dmalcolm@redhat.com/","msgid":"<20230914203914.1792717-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:39:14","name":"[pushed] analyzer: fix missing return in compatible_epath_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203914.1792717-1-dmalcolm@redhat.com/mbox/"},{"id":139828,"url":"https://patchwork.plctlab.org/api/1.2/patches/139828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914204031.1792895-1-dmalcolm@redhat.com/","msgid":"<20230914204031.1792895-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:40:31","name":"[pushed] diagnostics: support multithreaded diagnostic paths","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914204031.1792895-1-dmalcolm@redhat.com/mbox/"},{"id":139952,"url":"https://patchwork.plctlab.org/api/1.2/patches/139952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915010855.1582726-1-apinski@marvell.com/","msgid":"<20230915010855.1582726-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-15T01:08:55","name":"MATCH: Improve zero_one_valued_p for cases without range information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915010855.1582726-1-apinski@marvell.com/mbox/"},{"id":139955,"url":"https://patchwork.plctlab.org/api/1.2/patches/139955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915012008.17934-1-gaofei@eswincomputing.com/","msgid":"<20230915012008.17934-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-15T01:20:08","name":"[RISC-V] fix PR 111259 invalid zcmp mov predicate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915012008.17934-1-gaofei@eswincomputing.com/mbox/"},{"id":139963,"url":"https://patchwork.plctlab.org/api/1.2/patches/139963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915013921.1868899-1-guojiufu@linux.ibm.com/","msgid":"<20230915013921.1868899-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-15T01:39:21","name":"use local range for one more pattern in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915013921.1868899-1-guojiufu@linux.ibm.com/mbox/"},{"id":140053,"url":"https://patchwork.plctlab.org/api/1.2/patches/140053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-2-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:07","name":"[v12,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140032,"url":"https://patchwork.plctlab.org/api/1.2/patches/140032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-3-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:08","name":"[v12,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140052,"url":"https://patchwork.plctlab.org/api/1.2/patches/140052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-4-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:09","name":"[v12,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140035,"url":"https://patchwork.plctlab.org/api/1.2/patches/140035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-5-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:10","name":"[v12,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140004,"url":"https://patchwork.plctlab.org/api/1.2/patches/140004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-6-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:11","name":"[v12,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140014,"url":"https://patchwork.plctlab.org/api/1.2/patches/140014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-7-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:12","name":"[v12,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140058,"url":"https://patchwork.plctlab.org/api/1.2/patches/140058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-8-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:13","name":"[v12,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140047,"url":"https://patchwork.plctlab.org/api/1.2/patches/140047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-9-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:14","name":"[v12,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140055,"url":"https://patchwork.plctlab.org/api/1.2/patches/140055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-10-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:15","name":"[v12,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140059,"url":"https://patchwork.plctlab.org/api/1.2/patches/140059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-11-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:16","name":"[v12,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140012,"url":"https://patchwork.plctlab.org/api/1.2/patches/140012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-12-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:17","name":"[v12,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140062,"url":"https://patchwork.plctlab.org/api/1.2/patches/140062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-13-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:18","name":"[v12,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140067,"url":"https://patchwork.plctlab.org/api/1.2/patches/140067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-14-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:19","name":"[v12,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140046,"url":"https://patchwork.plctlab.org/api/1.2/patches/140046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-15-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:20","name":"[v12,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140061,"url":"https://patchwork.plctlab.org/api/1.2/patches/140061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-16-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:21","name":"[v12,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140008,"url":"https://patchwork.plctlab.org/api/1.2/patches/140008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-17-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:22","name":"[v12,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140037,"url":"https://patchwork.plctlab.org/api/1.2/patches/140037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-18-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:23","name":"[v12,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140069,"url":"https://patchwork.plctlab.org/api/1.2/patches/140069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-19-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:24","name":"[v12,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140049,"url":"https://patchwork.plctlab.org/api/1.2/patches/140049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-20-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:25","name":"[v12,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140028,"url":"https://patchwork.plctlab.org/api/1.2/patches/140028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-21-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:26","name":"[v12,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140016,"url":"https://patchwork.plctlab.org/api/1.2/patches/140016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-22-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:27","name":"[v12,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140027,"url":"https://patchwork.plctlab.org/api/1.2/patches/140027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-23-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:28","name":"[v12,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140031,"url":"https://patchwork.plctlab.org/api/1.2/patches/140031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-24-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:29","name":"[v12,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140034,"url":"https://patchwork.plctlab.org/api/1.2/patches/140034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-25-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:30","name":"[v12,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140019,"url":"https://patchwork.plctlab.org/api/1.2/patches/140019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-26-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:31","name":"[v12,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140013,"url":"https://patchwork.plctlab.org/api/1.2/patches/140013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-27-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:32","name":"[v12,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140017,"url":"https://patchwork.plctlab.org/api/1.2/patches/140017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-28-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:33","name":"[v12,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140005,"url":"https://patchwork.plctlab.org/api/1.2/patches/140005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-29-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:34","name":"[v12,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140009,"url":"https://patchwork.plctlab.org/api/1.2/patches/140009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-30-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:35","name":"[v12,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140038,"url":"https://patchwork.plctlab.org/api/1.2/patches/140038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-31-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:36","name":"[v12,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140056,"url":"https://patchwork.plctlab.org/api/1.2/patches/140056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-32-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:37","name":"[v12,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140022,"url":"https://patchwork.plctlab.org/api/1.2/patches/140022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-33-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:38","name":"[v12,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140023,"url":"https://patchwork.plctlab.org/api/1.2/patches/140023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-34-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:39","name":"[v12,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140011,"url":"https://patchwork.plctlab.org/api/1.2/patches/140011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-35-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:40","name":"[v12,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140057,"url":"https://patchwork.plctlab.org/api/1.2/patches/140057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-36-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:41","name":"[v12,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140036,"url":"https://patchwork.plctlab.org/api/1.2/patches/140036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-37-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:42","name":"[v12,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140025,"url":"https://patchwork.plctlab.org/api/1.2/patches/140025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-38-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:43","name":"[v12,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140026,"url":"https://patchwork.plctlab.org/api/1.2/patches/140026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-39-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:44","name":"[v12,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140048,"url":"https://patchwork.plctlab.org/api/1.2/patches/140048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-40-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:45","name":"[v12,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140020,"url":"https://patchwork.plctlab.org/api/1.2/patches/140020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-41-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:46","name":"[v12,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140080,"url":"https://patchwork.plctlab.org/api/1.2/patches/140080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-2-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:41","name":"[v13,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140114,"url":"https://patchwork.plctlab.org/api/1.2/patches/140114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-3-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:42","name":"[v13,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140088,"url":"https://patchwork.plctlab.org/api/1.2/patches/140088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-4-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:43","name":"[v13,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140100,"url":"https://patchwork.plctlab.org/api/1.2/patches/140100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-5-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:44","name":"[v13,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140093,"url":"https://patchwork.plctlab.org/api/1.2/patches/140093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-6-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:45","name":"[v13,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140097,"url":"https://patchwork.plctlab.org/api/1.2/patches/140097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-7-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:46","name":"[v13,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140068,"url":"https://patchwork.plctlab.org/api/1.2/patches/140068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-8-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:47","name":"[v13,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140089,"url":"https://patchwork.plctlab.org/api/1.2/patches/140089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-9-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:48","name":"[v13,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140060,"url":"https://patchwork.plctlab.org/api/1.2/patches/140060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-10-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:49","name":"[v13,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140081,"url":"https://patchwork.plctlab.org/api/1.2/patches/140081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-11-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:50","name":"[v13,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140111,"url":"https://patchwork.plctlab.org/api/1.2/patches/140111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-12-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:51","name":"[v13,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140090,"url":"https://patchwork.plctlab.org/api/1.2/patches/140090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-13-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:52","name":"[v13,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140082,"url":"https://patchwork.plctlab.org/api/1.2/patches/140082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-14-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:53","name":"[v13,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140102,"url":"https://patchwork.plctlab.org/api/1.2/patches/140102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-15-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:54","name":"[v13,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140109,"url":"https://patchwork.plctlab.org/api/1.2/patches/140109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-16-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:55","name":"[v13,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140054,"url":"https://patchwork.plctlab.org/api/1.2/patches/140054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-17-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:56","name":"[v13,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140070,"url":"https://patchwork.plctlab.org/api/1.2/patches/140070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-18-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:57","name":"[v13,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140094,"url":"https://patchwork.plctlab.org/api/1.2/patches/140094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-19-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:58","name":"[v13,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140087,"url":"https://patchwork.plctlab.org/api/1.2/patches/140087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-20-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:59","name":"[v13,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140117,"url":"https://patchwork.plctlab.org/api/1.2/patches/140117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-21-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:00","name":"[v13,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140079,"url":"https://patchwork.plctlab.org/api/1.2/patches/140079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-22-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:01","name":"[v13,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140092,"url":"https://patchwork.plctlab.org/api/1.2/patches/140092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-23-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:02","name":"[v13,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140095,"url":"https://patchwork.plctlab.org/api/1.2/patches/140095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-24-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:03","name":"[v13,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140101,"url":"https://patchwork.plctlab.org/api/1.2/patches/140101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-25-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:04","name":"[v13,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140066,"url":"https://patchwork.plctlab.org/api/1.2/patches/140066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-26-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:05","name":"[v13,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140115,"url":"https://patchwork.plctlab.org/api/1.2/patches/140115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-27-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:06","name":"[v13,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140104,"url":"https://patchwork.plctlab.org/api/1.2/patches/140104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-28-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:07","name":"[v13,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140077,"url":"https://patchwork.plctlab.org/api/1.2/patches/140077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-29-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:08","name":"[v13,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140105,"url":"https://patchwork.plctlab.org/api/1.2/patches/140105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-30-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:09","name":"[v13,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140091,"url":"https://patchwork.plctlab.org/api/1.2/patches/140091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-31-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:10","name":"[v13,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140075,"url":"https://patchwork.plctlab.org/api/1.2/patches/140075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-32-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:11","name":"[v13,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140110,"url":"https://patchwork.plctlab.org/api/1.2/patches/140110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-33-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:12","name":"[v13,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140076,"url":"https://patchwork.plctlab.org/api/1.2/patches/140076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-34-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:13","name":"[v13,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140112,"url":"https://patchwork.plctlab.org/api/1.2/patches/140112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-35-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:14","name":"[v13,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140103,"url":"https://patchwork.plctlab.org/api/1.2/patches/140103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-36-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:15","name":"[v13,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140098,"url":"https://patchwork.plctlab.org/api/1.2/patches/140098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-37-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:16","name":"[v13,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140063,"url":"https://patchwork.plctlab.org/api/1.2/patches/140063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-38-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:17","name":"[v13,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140119,"url":"https://patchwork.plctlab.org/api/1.2/patches/140119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-39-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:18","name":"[v13,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140118,"url":"https://patchwork.plctlab.org/api/1.2/patches/140118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-40-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:19","name":"[v13,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140096,"url":"https://patchwork.plctlab.org/api/1.2/patches/140096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-41-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:20","name":"[v13,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140108,"url":"https://patchwork.plctlab.org/api/1.2/patches/140108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915024000.20344-1-chenglulu@loongson.cn/","msgid":"<20230915024000.20344-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T02:40:00","name":"[v1] LoongArch: Check whether binutils supports the relax function. If supported, explicit relocs are turned off by default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915024000.20344-1-chenglulu@loongson.cn/mbox/"},{"id":140121,"url":"https://patchwork.plctlab.org/api/1.2/patches/140121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915033302.21325-1-chenglulu@loongson.cn/","msgid":"<20230915033302.21325-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T03:33:03","name":"[v1] LoongArch: Add floating point conditional move support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915033302.21325-1-chenglulu@loongson.cn/mbox/"},{"id":140125,"url":"https://patchwork.plctlab.org/api/1.2/patches/140125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915035309.579545-1-juzhe.zhong@rivai.ai/","msgid":"<20230915035309.579545-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T03:53:08","name":"RISC-V: Support VLS modes vec_init auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915035309.579545-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140128,"url":"https://patchwork.plctlab.org/api/1.2/patches/140128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915040404.729860-1-mengqinggang@loongson.cn/","msgid":"<20230915040404.729860-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-15T04:04:04","name":"[v2] Modify gas uleb128 support test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915040404.729860-1-mengqinggang@loongson.cn/mbox/"},{"id":140144,"url":"https://patchwork.plctlab.org/api/1.2/patches/140144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915050613.22696-1-lehua.ding@rivai.ai/","msgid":"<20230915050613.22696-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-15T05:06:13","name":"RISC-V: Refactor expand_reduction and cleanup enum reduction_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915050613.22696-1-lehua.ding@rivai.ai/mbox/"},{"id":140156,"url":"https://patchwork.plctlab.org/api/1.2/patches/140156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915060710.23244-1-chenglulu@loongson.cn/","msgid":"<20230915060710.23244-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T06:07:11","name":"LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915060710.23244-1-chenglulu@loongson.cn/mbox/"},{"id":140178,"url":"https://patchwork.plctlab.org/api/1.2/patches/140178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915071847.135585-1-mikael@gcc.gnu.org/","msgid":"<20230915071847.135585-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T07:18:47","name":"fortran: Remove reference count update [PR108957]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915071847.135585-1-mikael@gcc.gnu.org/mbox/"},{"id":140216,"url":"https://patchwork.plctlab.org/api/1.2/patches/140216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedizludb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T08:21:20","name":"aarch64: Fix loose ldpstp check [PR111411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedizludb.fsf@arm.com/mbox/"},{"id":140237,"url":"https://patchwork.plctlab.org/api/1.2/patches/140237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915083004.2241119-1-juzhe.zhong@rivai.ai/","msgid":"<20230915083004.2241119-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T08:30:04","name":"test: Remove XPASS for RISCV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915083004.2241119-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140269,"url":"https://patchwork.plctlab.org/api/1.2/patches/140269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915090349.2249556-1-juzhe.zhong@rivai.ai/","msgid":"<20230915090349.2249556-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:03:49","name":"test: Block slp-16.c check for target support vect_strided6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915090349.2249556-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140285,"url":"https://patchwork.plctlab.org/api/1.2/patches/140285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915091636.2391436-1-juzhe.zhong@rivai.ai/","msgid":"<20230915091636.2391436-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:16:36","name":"test: Isolate slp-1.c check of target supports vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915091636.2391436-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140288,"url":"https://patchwork.plctlab.org/api/1.2/patches/140288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzsryerg.fsf@euler.schwinge.homeip.net/","msgid":"<87jzsryerg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-15T09:20:03","name":"[WIP] Re-introduce '\''TREE_USED'\'' in tree streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzsryerg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":140305,"url":"https://patchwork.plctlab.org/api/1.2/patches/140305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092647.2192116-1-jwakely@redhat.com/","msgid":"<20230915092647.2192116-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:24:41","name":"[committed] libstdc++: Add operator bool to result types (P2497R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092647.2192116-1-jwakely@redhat.com/mbox/"},{"id":140306,"url":"https://patchwork.plctlab.org/api/1.2/patches/140306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092737.2192232-1-jwakely@redhat.com/","msgid":"<20230915092737.2192232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:26:48","name":"[committed] libstdc++: Remove non-void static assertions in variant'\''s std::get [PR111172]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092737.2192232-1-jwakely@redhat.com/mbox/"},{"id":140308,"url":"https://patchwork.plctlab.org/api/1.2/patches/140308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915093220.2192265-1-jwakely@redhat.com/","msgid":"<20230915093220.2192265-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:27:38","name":"[committed] libstdc++: Fix constraints for std::variant default constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915093220.2192265-1-jwakely@redhat.com/mbox/"},{"id":140316,"url":"https://patchwork.plctlab.org/api/1.2/patches/140316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915095444.2627943-1-juzhe.zhong@rivai.ai/","msgid":"<20230915095444.2627943-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:54:44","name":"test: Block vect_strided5 for slp-34-big-array.c SLP check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915095444.2627943-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140317,"url":"https://patchwork.plctlab.org/api/1.2/patches/140317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100024.2633114-1-juzhe.zhong@rivai.ai/","msgid":"<20230915100024.2633114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T10:00:24","name":"test: Block SLP check of slp-34.c for vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100024.2633114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140325,"url":"https://patchwork.plctlab.org/api/1.2/patches/140325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100603.2648810-1-juzhe.zhong@rivai.ai/","msgid":"<20230915100603.2648810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T10:06:03","name":"test: Block SLP check of slp-35.c for vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100603.2648810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140368,"url":"https://patchwork.plctlab.org/api/1.2/patches/140368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915111342.1895618-1-lehua.ding@rivai.ai/","msgid":"<20230915111342.1895618-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-15T11:13:42","name":"RISC-V: Fix using wrong mode to get reduction insn vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915111342.1895618-1-lehua.ding@rivai.ai/mbox/"},{"id":140379,"url":"https://patchwork.plctlab.org/api/1.2/patches/140379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915115010.D2F8513251@imap2.suse-dmz.suse.de/","msgid":"<20230915115010.D2F8513251@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-15T11:50:10","name":"[RFC] middle-end/106811 - document GENERIC/GIMPLE undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915115010.D2F8513251@imap2.suse-dmz.suse.de/mbox/"},{"id":140433,"url":"https://patchwork.plctlab.org/api/1.2/patches/140433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915132302.3468514-1-pan2.li@intel.com/","msgid":"<20230915132302.3468514-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-15T13:23:02","name":"[v1] RISC-V: Support FP SGNJX autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915132302.3468514-1-pan2.li@intel.com/mbox/"},{"id":140451,"url":"https://patchwork.plctlab.org/api/1.2/patches/140451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com/","msgid":"<2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com>","list_archive_url":null,"date":"2023-09-15T14:13:47","name":"[COMMITTED,1/2] Fix indentation in range_of_phi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com/mbox/"},{"id":140452,"url":"https://patchwork.plctlab.org/api/1.2/patches/140452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f6ac788a-4c2d-8e8b-3ccd-db2183770702@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T14:14:11","name":"[COMMITTED,2/2] Always do PHI analysis before loop analysis.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f6ac788a-4c2d-8e8b-3ccd-db2183770702@redhat.com/mbox/"},{"id":140456,"url":"https://patchwork.plctlab.org/api/1.2/patches/140456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142032.2100558-1-poulhies@adacore.com/","msgid":"<20230915142032.2100558-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:32","name":"[COMMITTED] ada: Crash on creation of extra formals on type extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142032.2100558-1-poulhies@adacore.com/mbox/"},{"id":140457,"url":"https://patchwork.plctlab.org/api/1.2/patches/140457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142050.2100712-1-poulhies@adacore.com/","msgid":"<20230915142050.2100712-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:50","name":"[COMMITTED] ada: Clean up scope depth and related code (tech debt)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142050.2100712-1-poulhies@adacore.com/mbox/"},{"id":140461,"url":"https://patchwork.plctlab.org/api/1.2/patches/140461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142052.2100773-1-poulhies@adacore.com/","msgid":"<20230915142052.2100773-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:52","name":"[COMMITTED] ada: Fix internal error on expression function with Refined_Post aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142052.2100773-1-poulhies@adacore.com/mbox/"},{"id":140464,"url":"https://patchwork.plctlab.org/api/1.2/patches/140464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142054.2100872-1-poulhies@adacore.com/","msgid":"<20230915142054.2100872-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:54","name":"[COMMITTED] ada: Remove GNAT Pro details regarding mold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142054.2100872-1-poulhies@adacore.com/mbox/"},{"id":140458,"url":"https://patchwork.plctlab.org/api/1.2/patches/140458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142056.2100936-1-poulhies@adacore.com/","msgid":"<20230915142056.2100936-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:56","name":"[COMMITTED] ada: Fix internal error on aggregate nested in container aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142056.2100936-1-poulhies@adacore.com/mbox/"},{"id":140466,"url":"https://patchwork.plctlab.org/api/1.2/patches/140466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142058.2100998-1-poulhies@adacore.com/","msgid":"<20230915142058.2100998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:58","name":"[COMMITTED] ada: Fix internal error on misaligned component with variable nominal size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142058.2100998-1-poulhies@adacore.com/mbox/"},{"id":140463,"url":"https://patchwork.plctlab.org/api/1.2/patches/140463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142100.2101059-1-poulhies@adacore.com/","msgid":"<20230915142100.2101059-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:00","name":"[COMMITTED] ada: Generate runtime restrictions list when the standard library is suppressed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142100.2101059-1-poulhies@adacore.com/mbox/"},{"id":140462,"url":"https://patchwork.plctlab.org/api/1.2/patches/140462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142102.2101122-1-poulhies@adacore.com/","msgid":"<20230915142102.2101122-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:02","name":"[COMMITTED] ada: Do not perform local-exception-to-goto optimization on barrier functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142102.2101122-1-poulhies@adacore.com/mbox/"},{"id":140465,"url":"https://patchwork.plctlab.org/api/1.2/patches/140465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142104.2101183-1-poulhies@adacore.com/","msgid":"<20230915142104.2101183-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:04","name":"[COMMITTED] ada: Fix wrong optimization of extended return for discriminated record type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142104.2101183-1-poulhies@adacore.com/mbox/"},{"id":140471,"url":"https://patchwork.plctlab.org/api/1.2/patches/140471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142105.2101247-1-poulhies@adacore.com/","msgid":"<20230915142105.2101247-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:05","name":"[COMMITTED] ada: Explicitly analyze and expand null array aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142105.2101247-1-poulhies@adacore.com/mbox/"},{"id":140467,"url":"https://patchwork.plctlab.org/api/1.2/patches/140467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142107.2101308-1-poulhies@adacore.com/","msgid":"<20230915142107.2101308-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:07","name":"[COMMITTED] ada: Fix minor glitch in finish_record_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142107.2101308-1-poulhies@adacore.com/mbox/"},{"id":140481,"url":"https://patchwork.plctlab.org/api/1.2/patches/140481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db3c333e-549e-ccc7-b4ab-be57235ce389@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T14:44:55","name":"[RFC] New early __builtin_unreachable processing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db3c333e-549e-ccc7-b4ab-be57235ce389@redhat.com/mbox/"},{"id":140497,"url":"https://patchwork.plctlab.org/api/1.2/patches/140497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915150816.18190-1-polacek@redhat.com/","msgid":"<20230915150816.18190-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-15T15:08:16","name":"gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915150816.18190-1-polacek@redhat.com/mbox/"},{"id":140520,"url":"https://patchwork.plctlab.org/api/1.2/patches/140520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160301.2245349-1-ppalka@redhat.com/","msgid":"<20230915160301.2245349-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T16:03:01","name":"c++: overeager type completion in convert_to_void [PR111419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160301.2245349-1-ppalka@redhat.com/mbox/"},{"id":140521,"url":"https://patchwork.plctlab.org/api/1.2/patches/140521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160308.2245377-1-ppalka@redhat.com/","msgid":"<20230915160308.2245377-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T16:03:08","name":"c++: visibility wrt template and ptrmem targs [PR70413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160308.2245377-1-ppalka@redhat.com/mbox/"},{"id":140587,"url":"https://patchwork.plctlab.org/api/1.2/patches/140587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175311.1908421-1-dmalcolm@redhat.com/","msgid":"<20230915175311.1908421-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:11","name":"[pushed] analyzer: handle volatile ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175311.1908421-1-dmalcolm@redhat.com/mbox/"},{"id":140588,"url":"https://patchwork.plctlab.org/api/1.2/patches/140588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175322.1908473-1-dmalcolm@redhat.com/","msgid":"<20230915175322.1908473-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:22","name":"[pushed] analyzer: introduce pending_location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175322.1908473-1-dmalcolm@redhat.com/mbox/"},{"id":140589,"url":"https://patchwork.plctlab.org/api/1.2/patches/140589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175332.1908520-1-dmalcolm@redhat.com/","msgid":"<20230915175332.1908520-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:32","name":"[pushed] analyzer: support diagnostics that don'\''t have a stmt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175332.1908520-1-dmalcolm@redhat.com/mbox/"},{"id":140592,"url":"https://patchwork.plctlab.org/api/1.2/patches/140592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175534.2315315-1-ppalka@redhat.com/","msgid":"<20230915175534.2315315-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:55:34","name":"c++: constness of decltype of NTTP object [PR98820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175534.2315315-1-ppalka@redhat.com/mbox/"},{"id":140674,"url":"https://patchwork.plctlab.org/api/1.2/patches/140674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQS/ddll2R/hjMIp@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T20:32:53","name":"[v6] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQS/ddll2R/hjMIp@redhat.com/mbox/"},{"id":140689,"url":"https://patchwork.plctlab.org/api/1.2/patches/140689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915205525.2325175-1-jwakely@redhat.com/","msgid":"<20230915205525.2325175-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T20:54:51","name":"[v2,6/13] libstdc++: Remove dg-options \"-std=gnu++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915205525.2325175-1-jwakely@redhat.com/mbox/"},{"id":140750,"url":"https://patchwork.plctlab.org/api/1.2/patches/140750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230301.2328182-1-jwakely@redhat.com/","msgid":"<20230915230301.2328182-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:02:47","name":"[committed] libstdc++: Fix 29_atomics/headers/atomic/types_std_c++2a_neg.cc for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230301.2328182-1-jwakely@redhat.com/mbox/"},{"id":140751,"url":"https://patchwork.plctlab.org/api/1.2/patches/140751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230539.2328463-1-jwakely@redhat.com/","msgid":"<20230915230539.2328463-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:04:27","name":"[committed] libstdc++: Add log line to testsuite output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230539.2328463-1-jwakely@redhat.com/mbox/"},{"id":140752,"url":"https://patchwork.plctlab.org/api/1.2/patches/140752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230924.2328645-1-jwakely@redhat.com/","msgid":"<20230915230924.2328645-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:06:57","name":"[committed] libstdc++: Implement C++26 native handles for file streams (P1759R6)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230924.2328645-1-jwakely@redhat.com/mbox/"},{"id":140756,"url":"https://patchwork.plctlab.org/api/1.2/patches/140756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915231748.2348413-1-jwakely@redhat.com/","msgid":"<20230915231748.2348413-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:17:37","name":"[committed] libstdc++: Add missing tests for std::basic_filebuf::native_handle()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915231748.2348413-1-jwakely@redhat.com/mbox/"},{"id":140759,"url":"https://patchwork.plctlab.org/api/1.2/patches/140759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-1-jwakely@redhat.com/","msgid":"<20230915232009.2348586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:49","name":"[committed,01/11] libstdc++: Remove dg-options \"-std=gnu++20\" from tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-1-jwakely@redhat.com/mbox/"},{"id":140757,"url":"https://patchwork.plctlab.org/api/1.2/patches/140757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-2-jwakely@redhat.com/","msgid":"<20230915232009.2348586-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:50","name":"[committed,02/11] libstdc++: Remove dg-options \"-std=gnu++20\" from tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-2-jwakely@redhat.com/mbox/"},{"id":140760,"url":"https://patchwork.plctlab.org/api/1.2/patches/140760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-3-jwakely@redhat.com/","msgid":"<20230915232009.2348586-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:51","name":"[committed,03/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 20_utils tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-3-jwakely@redhat.com/mbox/"},{"id":140763,"url":"https://patchwork.plctlab.org/api/1.2/patches/140763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-4-jwakely@redhat.com/","msgid":"<20230915232009.2348586-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:52","name":"[committed,04/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 21_strings tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-4-jwakely@redhat.com/mbox/"},{"id":140767,"url":"https://patchwork.plctlab.org/api/1.2/patches/140767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-5-jwakely@redhat.com/","msgid":"<20230915232009.2348586-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:53","name":"[committed,05/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 23_containers tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-5-jwakely@redhat.com/mbox/"},{"id":140762,"url":"https://patchwork.plctlab.org/api/1.2/patches/140762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-6-jwakely@redhat.com/","msgid":"<20230915232009.2348586-6-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:54","name":"[committed,06/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 24_iterators tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-6-jwakely@redhat.com/mbox/"},{"id":140765,"url":"https://patchwork.plctlab.org/api/1.2/patches/140765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-7-jwakely@redhat.com/","msgid":"<20230915232009.2348586-7-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:55","name":"[committed,07/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 26_numerics tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-7-jwakely@redhat.com/mbox/"},{"id":140770,"url":"https://patchwork.plctlab.org/api/1.2/patches/140770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-8-jwakely@redhat.com/","msgid":"<20230915232009.2348586-8-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:56","name":"[committed,08/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 27_io tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-8-jwakely@redhat.com/mbox/"},{"id":140764,"url":"https://patchwork.plctlab.org/api/1.2/patches/140764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-9-jwakely@redhat.com/","msgid":"<20230915232009.2348586-9-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:57","name":"[committed,09/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 30_threads tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-9-jwakely@redhat.com/mbox/"},{"id":140766,"url":"https://patchwork.plctlab.org/api/1.2/patches/140766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-10-jwakely@redhat.com/","msgid":"<20230915232009.2348586-10-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:58","name":"[committed,10/11] libstdc++: Remove dg-options \"-std=gnu++20\" from remaining tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-10-jwakely@redhat.com/mbox/"},{"id":140768,"url":"https://patchwork.plctlab.org/api/1.2/patches/140768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-11-jwakely@redhat.com/","msgid":"<20230915232009.2348586-11-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:59","name":"[committed,11/11] libstdc++: Do not require effective target pthread for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-11-jwakely@redhat.com/mbox/"},{"id":140836,"url":"https://patchwork.plctlab.org/api/1.2/patches/140836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-2-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:47","name":"[v14,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140799,"url":"https://patchwork.plctlab.org/api/1.2/patches/140799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-3-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:48","name":"[v14,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140831,"url":"https://patchwork.plctlab.org/api/1.2/patches/140831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-4-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:49","name":"[v14,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140779,"url":"https://patchwork.plctlab.org/api/1.2/patches/140779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-5-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:50","name":"[v14,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140782,"url":"https://patchwork.plctlab.org/api/1.2/patches/140782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-6-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:51","name":"[v14,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140834,"url":"https://patchwork.plctlab.org/api/1.2/patches/140834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-7-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:52","name":"[v14,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140830,"url":"https://patchwork.plctlab.org/api/1.2/patches/140830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-8-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:53","name":"[v14,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140788,"url":"https://patchwork.plctlab.org/api/1.2/patches/140788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-9-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:54","name":"[v14,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140818,"url":"https://patchwork.plctlab.org/api/1.2/patches/140818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-10-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:55","name":"[v14,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140826,"url":"https://patchwork.plctlab.org/api/1.2/patches/140826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-11-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:56","name":"[v14,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140817,"url":"https://patchwork.plctlab.org/api/1.2/patches/140817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-12-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:57","name":"[v14,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140781,"url":"https://patchwork.plctlab.org/api/1.2/patches/140781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-13-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:58","name":"[v14,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140797,"url":"https://patchwork.plctlab.org/api/1.2/patches/140797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-14-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:59","name":"[v14,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140820,"url":"https://patchwork.plctlab.org/api/1.2/patches/140820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-15-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:00","name":"[v14,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140811,"url":"https://patchwork.plctlab.org/api/1.2/patches/140811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-16-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:01","name":"[v14,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140783,"url":"https://patchwork.plctlab.org/api/1.2/patches/140783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-17-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:02","name":"[v14,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140780,"url":"https://patchwork.plctlab.org/api/1.2/patches/140780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-18-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:03","name":"[v14,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140829,"url":"https://patchwork.plctlab.org/api/1.2/patches/140829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-19-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:04","name":"[v14,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140838,"url":"https://patchwork.plctlab.org/api/1.2/patches/140838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-20-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:05","name":"[v14,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140825,"url":"https://patchwork.plctlab.org/api/1.2/patches/140825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-21-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:06","name":"[v14,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140812,"url":"https://patchwork.plctlab.org/api/1.2/patches/140812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-22-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:07","name":"[v14,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140806,"url":"https://patchwork.plctlab.org/api/1.2/patches/140806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-23-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:08","name":"[v14,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140785,"url":"https://patchwork.plctlab.org/api/1.2/patches/140785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-24-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:09","name":"[v14,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140796,"url":"https://patchwork.plctlab.org/api/1.2/patches/140796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-25-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:10","name":"[v14,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140789,"url":"https://patchwork.plctlab.org/api/1.2/patches/140789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-26-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:11","name":"[v14,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140790,"url":"https://patchwork.plctlab.org/api/1.2/patches/140790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-27-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:12","name":"[v14,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140824,"url":"https://patchwork.plctlab.org/api/1.2/patches/140824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-28-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:13","name":"[v14,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140835,"url":"https://patchwork.plctlab.org/api/1.2/patches/140835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-29-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:14","name":"[v14,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140815,"url":"https://patchwork.plctlab.org/api/1.2/patches/140815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-30-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:15","name":"[v14,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140827,"url":"https://patchwork.plctlab.org/api/1.2/patches/140827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-31-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:16","name":"[v14,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140814,"url":"https://patchwork.plctlab.org/api/1.2/patches/140814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-32-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:17","name":"[v14,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140795,"url":"https://patchwork.plctlab.org/api/1.2/patches/140795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-33-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:18","name":"[v14,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140813,"url":"https://patchwork.plctlab.org/api/1.2/patches/140813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-34-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:19","name":"[v14,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140828,"url":"https://patchwork.plctlab.org/api/1.2/patches/140828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-35-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:20","name":"[v14,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140832,"url":"https://patchwork.plctlab.org/api/1.2/patches/140832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-36-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:21","name":"[v14,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140804,"url":"https://patchwork.plctlab.org/api/1.2/patches/140804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-37-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:22","name":"[v14,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140794,"url":"https://patchwork.plctlab.org/api/1.2/patches/140794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-38-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:23","name":"[v14,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140819,"url":"https://patchwork.plctlab.org/api/1.2/patches/140819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-39-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:24","name":"[v14,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140816,"url":"https://patchwork.plctlab.org/api/1.2/patches/140816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-40-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:25","name":"[v14,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140803,"url":"https://patchwork.plctlab.org/api/1.2/patches/140803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-41-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:26","name":"[v14,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140845,"url":"https://patchwork.plctlab.org/api/1.2/patches/140845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916010009.3672058-1-lhyatt@gmail.com/","msgid":"<20230916010009.3672058-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-09-16T01:00:09","name":"libcpp: Fix ICE on #include after a line marker directive [PR61474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916010009.3672058-1-lhyatt@gmail.com/mbox/"},{"id":140938,"url":"https://patchwork.plctlab.org/api/1.2/patches/140938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916044539.3362257-1-juzhe.zhong@rivai.ai/","msgid":"<20230916044539.3362257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-16T04:45:39","name":"internal-fn: Convert uninitialized SSA_NAME into SCRATCH rtx[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916044539.3362257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140961,"url":"https://patchwork.plctlab.org/api/1.2/patches/140961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916054920.1653864-1-apinski@marvell.com/","msgid":"<20230916054920.1653864-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-16T05:49:20","name":"MATCH: Add simplifications for `(a * zero_one) ==/!= CST`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916054920.1653864-1-apinski@marvell.com/mbox/"},{"id":141006,"url":"https://patchwork.plctlab.org/api/1.2/patches/141006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916091643.3160525-1-mengqinggang@loongson.cn/","msgid":"<20230916091643.3160525-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-16T09:16:43","name":"LoongArch: Fix lo_sum rtx cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916091643.3160525-1-mengqinggang@loongson.cn/mbox/"},{"id":141076,"url":"https://patchwork.plctlab.org/api/1.2/patches/141076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916155924.1679335-1-apinski@marvell.com/","msgid":"<20230916155924.1679335-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-16T15:59:24","name":"MATCH: Add simplifications of `(a == CST) & a`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916155924.1679335-1-apinski@marvell.com/mbox/"},{"id":141119,"url":"https://patchwork.plctlab.org/api/1.2/patches/141119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917014418.1703031-1-apinski@marvell.com/","msgid":"<20230917014418.1703031-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T01:44:18","name":"MATCH: Avoid recusive zero_one_valued_p for conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917014418.1703031-1-apinski@marvell.com/mbox/"},{"id":141121,"url":"https://patchwork.plctlab.org/api/1.2/patches/141121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917020549.973008-1-juzhe.zhong@rivai.ai/","msgid":"<20230917020549.973008-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-17T02:05:49","name":"RISC-V: Support VLS modes reduction[PR111153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917020549.973008-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141133,"url":"https://patchwork.plctlab.org/api/1.2/patches/141133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917074234.1541088-1-pan2.li@intel.com/","msgid":"<20230917074234.1541088-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-17T07:42:34","name":"[v1] RISC-V: Bugfix for scalar move with merged operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917074234.1541088-1-pan2.li@intel.com/mbox/"},{"id":141147,"url":"https://patchwork.plctlab.org/api/1.2/patches/141147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQb1FtC4Bwv26zNE@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-17T12:46:14","name":"[v2] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQb1FtC4Bwv26zNE@Thaum.localdomain/mbox/"},{"id":141152,"url":"https://patchwork.plctlab.org/api/1.2/patches/141152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917144749.1032038-1-juzhe.zhong@rivai.ai/","msgid":"<20230917144749.1032038-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-17T14:47:49","name":"[V2] internal-fn: Support undefined rtx for uninitialized SSA_NAME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917144749.1032038-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141179,"url":"https://patchwork.plctlab.org/api/1.2/patches/141179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917185140.1333132-1-ppalka@redhat.com/","msgid":"<20230917185140.1333132-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-17T18:51:40","name":"c++: non-dependent assignment checking [PR63198, PR18474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917185140.1333132-1-ppalka@redhat.com/mbox/"},{"id":141183,"url":"https://patchwork.plctlab.org/api/1.2/patches/141183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917191304.1483576-1-ppalka@redhat.com/","msgid":"<20230917191304.1483576-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-17T19:13:04","name":"c++: optimize tsubst_template_decl for function templates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917191304.1483576-1-ppalka@redhat.com/mbox/"},{"id":141191,"url":"https://patchwork.plctlab.org/api/1.2/patches/141191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917194617.928955-1-dkm@kataplop.net/","msgid":"<20230917194617.928955-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-17T19:46:17","name":"Trivial typo fix in variadic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917194617.928955-1-dkm@kataplop.net/mbox/"},{"id":141197,"url":"https://patchwork.plctlab.org/api/1.2/patches/141197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com/","msgid":"<8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com>","list_archive_url":null,"date":"2023-09-17T20:41:13","name":"[_Hashtable] Avoid redundant usage of rehash policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com/mbox/"},{"id":141201,"url":"https://patchwork.plctlab.org/api/1.2/patches/141201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214055.1752964-1-apinski@marvell.com/","msgid":"<20230917214055.1752964-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T21:40:55","name":"MATCH: Make zero_one_valued_p non-recusive fully","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214055.1752964-1-apinski@marvell.com/mbox/"},{"id":141203,"url":"https://patchwork.plctlab.org/api/1.2/patches/141203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214554.1753158-1-apinski@marvell.com/","msgid":"<20230917214554.1753158-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T21:45:54","name":"Remove xfail from gcc.dg/tree-ssa/20040204-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214554.1753158-1-apinski@marvell.com/mbox/"},{"id":141227,"url":"https://patchwork.plctlab.org/api/1.2/patches/141227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918014434.2566268-1-juzhe.zhong@rivai.ai/","msgid":"<20230918014434.2566268-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T01:44:34","name":"[V3] internal-fn: Support undefined rtx for uninitialized SSA_NAME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918014434.2566268-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141233,"url":"https://patchwork.plctlab.org/api/1.2/patches/141233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918025408.2591026-1-juzhe.zhong@rivai.ai/","msgid":"<20230918025408.2591026-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T02:54:08","name":"[Committed] RISC-V: Remove redundant codes of VLS patterns[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918025408.2591026-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141236,"url":"https://patchwork.plctlab.org/api/1.2/patches/141236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918032711.3807244-1-pan2.li@intel.com/","msgid":"<20230918032711.3807244-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-18T03:27:11","name":"[v1] RISC-V: Support VLS mode for vec_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918032711.3807244-1-pan2.li@intel.com/mbox/"},{"id":141239,"url":"https://patchwork.plctlab.org/api/1.2/patches/141239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918034008.3671734-1-jason@redhat.com/","msgid":"<20230918034008.3671734-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-18T03:40:08","name":"[pushed] doc: GTY((cache)) documentation tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918034008.3671734-1-jason@redhat.com/mbox/"},{"id":141242,"url":"https://patchwork.plctlab.org/api/1.2/patches/141242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918041925.26614-1-xuli1@eswincomputing.com/","msgid":"<20230918041925.26614-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-18T04:19:25","name":"RISC-V: Remove phase 6 of vsetvl pass in GCC13[PR111412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918041925.26614-1-xuli1@eswincomputing.com/mbox/"},{"id":141250,"url":"https://patchwork.plctlab.org/api/1.2/patches/141250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com/","msgid":"<65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com>","list_archive_url":null,"date":"2023-09-18T05:59:05","name":"PATCH v6 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com/mbox/"},{"id":141255,"url":"https://patchwork.plctlab.org/api/1.2/patches/141255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/feee9000-859a-3fae-66d5-9844be71fe3e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-18T06:26:21","name":"rs6000: Use default target option node for callee by default [PR111380]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/feee9000-859a-3fae-66d5-9844be71fe3e@linux.ibm.com/mbox/"},{"id":141256,"url":"https://patchwork.plctlab.org/api/1.2/patches/141256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com/","msgid":"<61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com>","list_archive_url":null,"date":"2023-09-18T06:26:56","name":"rs6000: Skip empty inline asm in rs6000_update_ipa_fn_target_info [PR111366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com/mbox/"},{"id":141262,"url":"https://patchwork.plctlab.org/api/1.2/patches/141262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918070713.3569601-1-juzhe.zhong@rivai.ai/","msgid":"<20230918070713.3569601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T07:07:13","name":"RISC-V: Remove autovec-vls.md file and clean up VLS move modes[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918070713.3569601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141321,"url":"https://patchwork.plctlab.org/api/1.2/patches/141321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918092351.4019900-1-liwei@loongson.cn/","msgid":"<20230918092351.4019900-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-09-18T09:23:51","name":"[v1] LoongArch: Adjust the vector cost model for better performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918092351.4019900-1-liwei@loongson.cn/mbox/"},{"id":141330,"url":"https://patchwork.plctlab.org/api/1.2/patches/141330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918095210.5373-1-gaofei@eswincomputing.com/","msgid":"<20230918095210.5373-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-18T09:52:10","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918095210.5373-1-gaofei@eswincomputing.com/mbox/"},{"id":141358,"url":"https://patchwork.plctlab.org/api/1.2/patches/141358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918110825.3134855-1-juzhe.zhong@rivai.ai/","msgid":"<20230918110825.3134855-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:08:25","name":"[Committed] RISC-V: Fix VSETVL PASS fusion bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918110825.3134855-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141361,"url":"https://patchwork.plctlab.org/api/1.2/patches/141361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918111807.2453946-1-jwakely@redhat.com/","msgid":"<20230918111807.2453946-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T11:17:47","name":"[committed] libstdc++: Minor update to installation docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918111807.2453946-1-jwakely@redhat.com/mbox/"},{"id":141365,"url":"https://patchwork.plctlab.org/api/1.2/patches/141365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918113717.3538058-1-lehua.ding@rivai.ai/","msgid":"<20230918113717.3538058-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:37:17","name":"RISC-V: Refactor and cleanup fma patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918113717.3538058-1-lehua.ding@rivai.ai/mbox/"},{"id":141368,"url":"https://patchwork.plctlab.org/api/1.2/patches/141368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918114414.3667280-1-juzhe.zhong@rivai.ai/","msgid":"<20230918114414.3667280-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:44:14","name":"[Committed] RISC-V: Support VLS reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918114414.3667280-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141393,"url":"https://patchwork.plctlab.org/api/1.2/patches/141393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918121324.3696866-1-lehua.ding@rivai.ai/","msgid":"<20230918121324.3696866-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:13:24","name":"RISC-V: Add fixed PR111255 testcase by other patch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918121324.3696866-1-lehua.ding@rivai.ai/mbox/"},{"id":141396,"url":"https://patchwork.plctlab.org/api/1.2/patches/141396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com/","msgid":"<98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com>","list_archive_url":null,"date":"2023-09-18T12:22:50","name":"OpenMP: Add ME support for '\''omp allocate'\'' stack variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com/mbox/"},{"id":141398,"url":"https://patchwork.plctlab.org/api/1.2/patches/141398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918122951.3703638-1-lehua.ding@rivai.ai/","msgid":"<20230918122951.3703638-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:29:51","name":"RISC-V: Removed misleading comments in testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918122951.3703638-1-lehua.ding@rivai.ai/mbox/"},{"id":141400,"url":"https://patchwork.plctlab.org/api/1.2/patches/141400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123141.3704086-1-juzhe.zhong@rivai.ai/","msgid":"<20230918123141.3704086-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:31:41","name":"[Committed] RISC-V: Fix bogus FAILs of vsetvl testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123141.3704086-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141401,"url":"https://patchwork.plctlab.org/api/1.2/patches/141401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123508.3705854-1-juzhe.zhong@rivai.ai/","msgid":"<20230918123508.3705854-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:35:08","name":"RISC-V: Remove redundant vec_duplicate pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123508.3705854-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141413,"url":"https://patchwork.plctlab.org/api/1.2/patches/141413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918130141.2460012-1-jwakely@redhat.com/","msgid":"<20230918130141.2460012-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T13:01:33","name":"[wwwdocs] Document libstdc++ changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918130141.2460012-1-jwakely@redhat.com/mbox/"},{"id":141415,"url":"https://patchwork.plctlab.org/api/1.2/patches/141415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918131221.2462150-1-jwakely@redhat.com/","msgid":"<20230918131221.2462150-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T13:11:28","name":"[committed] libstdc++: Update C++20 and C++23 status docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918131221.2462150-1-jwakely@redhat.com/mbox/"},{"id":141428,"url":"https://patchwork.plctlab.org/api/1.2/patches/141428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918142311.2464732-1-jwakely@redhat.com/","msgid":"<20230918142311.2464732-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T14:22:54","name":"[committed] libstdc++: Minor tweak to C++20 status docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918142311.2464732-1-jwakely@redhat.com/mbox/"},{"id":141436,"url":"https://patchwork.plctlab.org/api/1.2/patches/141436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il87bku2.fsf@euler.schwinge.homeip.net/","msgid":"<87il87bku2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:46:29","name":"LTO: Get rid of '\''lto_mode_identity_table'\'' (was: Machine Mode ICE in RISC-V when LTO)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il87bku2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141438,"url":"https://patchwork.plctlab.org/api/1.2/patches/141438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkdzy1wm.fsf@euler.schwinge.homeip.net/","msgid":"<87bkdzy1wm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:46:49","name":"Fix up '\''g++.dg/abi/nvptx-ptrmem1.C'\'' (was: [PTX] more register cleanups)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkdzy1wm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141440,"url":"https://patchwork.plctlab.org/api/1.2/patches/141440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5tjy1wa.fsf@euler.schwinge.homeip.net/","msgid":"<87a5tjy1wa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:47:01","name":"Add '\''g++.target/nvptx/nvptx.exp'\'' for nvptx-specific C++ test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5tjy1wa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141439,"url":"https://patchwork.plctlab.org/api/1.2/patches/141439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r93y1vp.fsf@euler.schwinge.homeip.net/","msgid":"<878r93y1vp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:47:22","name":"Move '\''g++.dg/abi/nvptx-[...].C'\'' -> '\''g++.target/nvptx/abi-[...].C'\'' (was: [PTX] parameters and return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r93y1vp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141451,"url":"https://patchwork.plctlab.org/api/1.2/patches/141451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153544.ECE0D33E99@hamza.pair.com/","msgid":"<20230918153544.ECE0D33E99@hamza.pair.com>","list_archive_url":null,"date":"2023-09-18T15:35:44","name":"[pushed] wwwdocs: conduct: Fix nested lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153544.ECE0D33E99@hamza.pair.com/mbox/"},{"id":141453,"url":"https://patchwork.plctlab.org/api/1.2/patches/141453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153622.1584614-1-lehua.ding@rivai.ai/","msgid":"<20230918153622.1584614-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T15:36:22","name":"RISC-V: Support combine cond extend and reduce sum to cond widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153622.1584614-1-lehua.ding@rivai.ai/mbox/"},{"id":141464,"url":"https://patchwork.plctlab.org/api/1.2/patches/141464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-1-ppalka@redhat.com/","msgid":"<20230918161202.2884010-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-18T16:12:01","name":"[v2,1/2] c++: overeager type completion in convert_to_void [PR111419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-1-ppalka@redhat.com/mbox/"},{"id":141465,"url":"https://patchwork.plctlab.org/api/1.2/patches/141465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-2-ppalka@redhat.com/","msgid":"<20230918161202.2884010-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-18T16:12:02","name":"[v2,2/2] c++: convert_to_void and volatile references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-2-ppalka@redhat.com/mbox/"},{"id":141486,"url":"https://patchwork.plctlab.org/api/1.2/patches/141486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiFCPMdK2Jrrgs1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-18T17:12:40","name":"c++, v2: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiFCPMdK2Jrrgs1@tucnak/mbox/"},{"id":141489,"url":"https://patchwork.plctlab.org/api/1.2/patches/141489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiHBe+ZImdAuuRr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-18T17:21:09","name":"c++, v2: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiHBe+ZImdAuuRr@tucnak/mbox/"},{"id":141511,"url":"https://patchwork.plctlab.org/api/1.2/patches/141511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918183614.41034-1-iain@sandoe.co.uk/","msgid":"<20230918183614.41034-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-18T18:36:14","name":"[pushed] configure, Darwin: Adjust handing of stdlib option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918183614.41034-1-iain@sandoe.co.uk/mbox/"},{"id":141514,"url":"https://patchwork.plctlab.org/api/1.2/patches/141514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918184144.41108-1-iain@sandoe.co.uk/","msgid":"<20230918184144.41108-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-18T18:41:44","name":"[pushed] Darwin, debug : Switch to DWARF 3 or 4 when dsymutil supports it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918184144.41108-1-iain@sandoe.co.uk/mbox/"},{"id":141562,"url":"https://patchwork.plctlab.org/api/1.2/patches/141562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-97d8f744-3dad-4060-bd01-4e51b565ad52-1695068821367@3c-app-gmx-bap05/","msgid":"","list_archive_url":null,"date":"2023-09-18T20:27:01","name":"fortran: fix checking of CHARACTER lengths in array constructors [PR70231]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-97d8f744-3dad-4060-bd01-4e51b565ad52-1695068821367@3c-app-gmx-bap05/mbox/"},{"id":141580,"url":"https://patchwork.plctlab.org/api/1.2/patches/141580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0624c1f6b5c97100f80c2ddf55a0498ef6bf63.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-09-18T21:26:49","name":"[C,v2] Add Walloc-size to warn about insufficient size in allocations [PR71219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0624c1f6b5c97100f80c2ddf55a0498ef6bf63.camel@tugraz.at/mbox/"},{"id":141584,"url":"https://patchwork.plctlab.org/api/1.2/patches/141584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQjEQBas/GM+yjSq@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-18T21:42:24","name":"[v7] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQjEQBas/GM+yjSq@redhat.com/mbox/"},{"id":141633,"url":"https://patchwork.plctlab.org/api/1.2/patches/141633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com/","msgid":"<375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-19T00:53:14","name":"RISC-V: Add builtin .def file dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com/mbox/"},{"id":141661,"url":"https://patchwork.plctlab.org/api/1.2/patches/141661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919022559.1879725-1-juzhe.zhong@rivai.ai/","msgid":"<20230919022559.1879725-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T02:25:59","name":"RISC-V: Fix RVV can change mode class bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919022559.1879725-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141667,"url":"https://patchwork.plctlab.org/api/1.2/patches/141667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com/","msgid":"<7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-19T02:48:03","name":"[COMMITTED] RISC-V: Fix typos on comments (SVE -> RVV)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com/mbox/"},{"id":141669,"url":"https://patchwork.plctlab.org/api/1.2/patches/141669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919025922.1898652-1-juzhe.zhong@rivai.ai/","msgid":"<20230919025922.1898652-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T02:59:22","name":"[V2] RISC-V: Fix RVV can change mode class bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919025922.1898652-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141702,"url":"https://patchwork.plctlab.org/api/1.2/patches/141702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-1-guojiufu@linux.ibm.com/","msgid":"<20230919052353.3208707-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T05:23:52","name":"[1/2] using overflow_free_p to simplify pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-1-guojiufu@linux.ibm.com/mbox/"},{"id":141703,"url":"https://patchwork.plctlab.org/api/1.2/patches/141703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-2-guojiufu@linux.ibm.com/","msgid":"<20230919052353.3208707-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T05:23:53","name":"[2/2] testcase: rename pr111303.c to pr111324.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-2-guojiufu@linux.ibm.com/mbox/"},{"id":141710,"url":"https://patchwork.plctlab.org/api/1.2/patches/141710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919070109.573374-1-mengqinggang@loongson.cn/","msgid":"<20230919070109.573374-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-19T07:01:09","name":"[v3] Modify gas uleb128 support test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919070109.573374-1-mengqinggang@loongson.cn/mbox/"},{"id":141714,"url":"https://patchwork.plctlab.org/api/1.2/patches/141714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlMfsN2tNELdv0B@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:23:42","name":"v2: small _BitInt tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlMfsN2tNELdv0B@tucnak/mbox/"},{"id":141716,"url":"https://patchwork.plctlab.org/api/1.2/patches/141716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlOhbHYG3BQ5RHI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:32:21","name":"[committed] libgomp: Handle NULL environ like pointer to NULL pointer [PR111413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlOhbHYG3BQ5RHI@tucnak/mbox/"},{"id":141720,"url":"https://patchwork.plctlab.org/api/1.2/patches/141720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlSYHDjdxvK5LtD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:48:48","name":"match.pd: Some build_nonstandard_integer_type tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlSYHDjdxvK5LtD@tucnak/mbox/"},{"id":141734,"url":"https://patchwork.plctlab.org/api/1.2/patches/141734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919081611.2696019-1-juzhe.zhong@rivai.ai/","msgid":"<20230919081611.2696019-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T08:16:11","name":"[Committed] RISC-V: Support integer FMA/FNMA VLS modes autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919081611.2696019-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141741,"url":"https://patchwork.plctlab.org/api/1.2/patches/141741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084444.2089-1-jinma@linux.alibaba.com/","msgid":"<20230919084444.2089-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-09-19T08:44:43","name":"[RFC,1/2] RISC-V: Add support for _Bfloat16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084444.2089-1-jinma@linux.alibaba.com/mbox/"},{"id":141743,"url":"https://patchwork.plctlab.org/api/1.2/patches/141743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084625.2183-1-jinma@linux.alibaba.com/","msgid":"<20230919084625.2183-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-09-19T08:46:25","name":"[RFC,2/2] RISC-V: Add '\''Zfbfmin'\'' extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084625.2183-1-jinma@linux.alibaba.com/mbox/"},{"id":141744,"url":"https://patchwork.plctlab.org/api/1.2/patches/141744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y46y2f7.fsf@euler.schwinge.homeip.net/","msgid":"<875y46y2f7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-19T08:47:56","name":"[PING] More '\''#ifdef ASM_OUTPUT_DEF'\'' -> '\''if (TARGET_SUPPORTS_ALIASES)'\'' etc. (was: [PATCH][v2] Introduce TARGET_SUPPORTS_ALIASES)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y46y2f7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141758,"url":"https://patchwork.plctlab.org/api/1.2/patches/141758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5fb2e05-9ab3-3b4f-2108-1790a708b34e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T08:59:32","name":"[v7,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5fb2e05-9ab3-3b4f-2108-1790a708b34e@linux.ibm.com/mbox/"},{"id":141774,"url":"https://patchwork.plctlab.org/api/1.2/patches/141774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com/","msgid":"<9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T09:21:16","name":"[v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com/mbox/"},{"id":141775,"url":"https://patchwork.plctlab.org/api/1.2/patches/141775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919092134.2722883-1-juzhe.zhong@rivai.ai/","msgid":"<20230919092134.2722883-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T09:21:34","name":"[Committed] RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919092134.2722883-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141813,"url":"https://patchwork.plctlab.org/api/1.2/patches/141813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919103900.A8F7D13458@imap2.suse-dmz.suse.de/","msgid":"<20230919103900.A8F7D13458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T10:39:00","name":"c/111468 - add unordered compare and pointer diff to GIMPLE FE parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919103900.A8F7D13458@imap2.suse-dmz.suse.de/mbox/"},{"id":141831,"url":"https://patchwork.plctlab.org/api/1.2/patches/141831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112311.8EC27134F3@imap2.suse-dmz.suse.de/","msgid":"<20230919112311.8EC27134F3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T11:23:11","name":"tree-optimization/111465 - bougs jump threading with no-copy src block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112311.8EC27134F3@imap2.suse-dmz.suse.de/mbox/"},{"id":141833,"url":"https://patchwork.plctlab.org/api/1.2/patches/141833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112653.539780-1-juzhe.zhong@rivai.ai/","msgid":"<20230919112653.539780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T11:26:53","name":"[Committed] RISC-V: Support VLS unary floating-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112653.539780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141834,"url":"https://patchwork.plctlab.org/api/1.2/patches/141834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112716.2265251-1-poulhies@adacore.com/","msgid":"<20230919112716.2265251-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T11:27:16","name":"[COMMITTED] ada: Crash processing type invariants on child subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112716.2265251-1-poulhies@adacore.com/mbox/"},{"id":141835,"url":"https://patchwork.plctlab.org/api/1.2/patches/141835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112727.2265405-1-poulhies@adacore.com/","msgid":"<20230919112727.2265405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T11:27:27","name":"[COMMITTED] ada: Refine upper array bound for bit packed array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112727.2265405-1-poulhies@adacore.com/mbox/"},{"id":141842,"url":"https://patchwork.plctlab.org/api/1.2/patches/141842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120342.2276062-1-poulhies@adacore.com/","msgid":"<20230919120342.2276062-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T12:03:42","name":"[COMMITTED] ada: Private extensions with the keyword \"synchronized\" are always limited.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120342.2276062-1-poulhies@adacore.com/mbox/"},{"id":141846,"url":"https://patchwork.plctlab.org/api/1.2/patches/141846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120812.2277126-1-poulhies@adacore.com/","msgid":"<20230919120812.2277126-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T12:08:12","name":"[COMMITTED] ada: TSS finalize address subprogram generation for constrained...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120812.2277126-1-poulhies@adacore.com/mbox/"},{"id":141852,"url":"https://patchwork.plctlab.org/api/1.2/patches/141852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919121858.572681-1-juzhe.zhong@rivai.ai/","msgid":"<20230919121858.572681-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T12:18:58","name":"RISC-V: Add FNMS floating-point VLS tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919121858.572681-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141859,"url":"https://patchwork.plctlab.org/api/1.2/patches/141859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17720-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T12:30:22","name":"middle-end: relax validate_subreg to allow paradoxical subregs that change mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17720-tamar@arm.com/mbox/"},{"id":141868,"url":"https://patchwork.plctlab.org/api/1.2/patches/141868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124146.3418D13458@imap2.suse-dmz.suse.de/","msgid":"<20230919124146.3418D13458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T12:41:45","name":"c/111468 - dump unordered compare operators in their GIMPLE form with -gimple","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124146.3418D13458@imap2.suse-dmz.suse.de/mbox/"},{"id":141869,"url":"https://patchwork.plctlab.org/api/1.2/patches/141869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124241.8368713458@imap2.suse-dmz.suse.de/","msgid":"<20230919124241.8368713458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T12:42:41","name":"target/30484 - testcase for exploration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124241.8368713458@imap2.suse-dmz.suse.de/mbox/"},{"id":141896,"url":"https://patchwork.plctlab.org/api/1.2/patches/141896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17717-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T13:53:51","name":"middle-end ifcvt: replace C++ sort with vec::qsort [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17717-tamar@arm.com/mbox/"},{"id":141946,"url":"https://patchwork.plctlab.org/api/1.2/patches/141946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150444.356437-1-ppalka@redhat.com/","msgid":"<20230919150444.356437-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T15:04:44","name":"c++: further optimize tsubst_template_decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150444.356437-1-ppalka@redhat.com/mbox/"},{"id":141949,"url":"https://patchwork.plctlab.org/api/1.2/patches/141949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-2-mary.bennett@embecosm.com/","msgid":"<20230919150734.2854664-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-09-19T15:07:33","name":"[1/2] RISC-V: Add support for XCVmac extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-2-mary.bennett@embecosm.com/mbox/"},{"id":141950,"url":"https://patchwork.plctlab.org/api/1.2/patches/141950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-3-mary.bennett@embecosm.com/","msgid":"<20230919150734.2854664-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-09-19T15:07:34","name":"[2/2] RISC-V: Add support for XCValu extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-3-mary.bennett@embecosm.com/mbox/"},{"id":141970,"url":"https://patchwork.plctlab.org/api/1.2/patches/141970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919152834.3988714-1-jason@redhat.com/","msgid":"<20230919152834.3988714-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-19T15:28:34","name":"[pushed] c++: inherited default constructor [CWG2799]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919152834.3988714-1-jason@redhat.com/mbox/"},{"id":141992,"url":"https://patchwork.plctlab.org/api/1.2/patches/141992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-1-aldyh@redhat.com/","msgid":"<20230919163052.865027-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:45","name":"[COMMITTED,frange] Add op2_range for operator_not_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-1-aldyh@redhat.com/mbox/"},{"id":141993,"url":"https://patchwork.plctlab.org/api/1.2/patches/141993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-2-aldyh@redhat.com/","msgid":"<20230919163052.865027-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:46","name":"[COMMITTED] Add frange::update_nan (const nan_state &).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-2-aldyh@redhat.com/mbox/"},{"id":141994,"url":"https://patchwork.plctlab.org/api/1.2/patches/141994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-3-aldyh@redhat.com/","msgid":"<20230919163052.865027-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:47","name":"[COMMITTED,frange] Remove redundant known_isnan() checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-3-aldyh@redhat.com/mbox/"},{"id":141995,"url":"https://patchwork.plctlab.org/api/1.2/patches/141995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919164055.728094-1-ppalka@redhat.com/","msgid":"<20230919164055.728094-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:40:54","name":"c++: improve class NTTP object pretty printing [PR111471]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919164055.728094-1-ppalka@redhat.com/mbox/"},{"id":142010,"url":"https://patchwork.plctlab.org/api/1.2/patches/142010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf026313-2297-4ce0-b9a1-f42ec56ba927@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T17:31:59","name":"[committed] Fix bogus operand predicate on iq2000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf026313-2297-4ce0-b9a1-f42ec56ba927@gmail.com/mbox/"},{"id":142039,"url":"https://patchwork.plctlab.org/api/1.2/patches/142039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919180423.452938-1-patrick@rivosinc.com/","msgid":"<20230919180423.452938-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-19T18:04:23","name":"RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919180423.452938-1-patrick@rivosinc.com/mbox/"},{"id":142044,"url":"https://patchwork.plctlab.org/api/1.2/patches/142044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479B004AEFB75D629A471F591FAA@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T18:16:21","name":"Fixes for profile count/probability maintenance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479B004AEFB75D629A471F591FAA@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":142045,"url":"https://patchwork.plctlab.org/api/1.2/patches/142045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479048C4F98A2BE82FEE30891FAA@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T18:16:34","name":"Remove .PHONY targets when building .fda files during autoprofiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479048C4F98A2BE82FEE30891FAA@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":142053,"url":"https://patchwork.plctlab.org/api/1.2/patches/142053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919184016.1059841-1-ppalka@redhat.com/","msgid":"<20230919184016.1059841-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T18:40:15","name":"[pushed] c++: fix cxx_print_type'\''s template-info dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919184016.1059841-1-ppalka@redhat.com/mbox/"},{"id":142091,"url":"https://patchwork.plctlab.org/api/1.2/patches/142091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com/","msgid":"<4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T21:10:49","name":"[v8,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com/mbox/"},{"id":142094,"url":"https://patchwork.plctlab.org/api/1.2/patches/142094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2154eb3-1f73-986b-c110-da910959ddab@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T21:21:03","name":"[Committed] RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2154eb3-1f73-986b-c110-da910959ddab@rivosinc.com/mbox/"},{"id":142153,"url":"https://patchwork.plctlab.org/api/1.2/patches/142153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920011557.106634-1-panchenghui@loongson.cn/","msgid":"<20230920011557.106634-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-09-20T01:15:57","name":"[v1] Update check_effective_target_vect_int_mod according to LoongArch SX/ASX capabilities.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920011557.106634-1-panchenghui@loongson.cn/mbox/"},{"id":142170,"url":"https://patchwork.plctlab.org/api/1.2/patches/142170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920022440.3404964-1-juzhe.zhong@rivai.ai/","msgid":"<20230920022440.3404964-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T02:24:40","name":"[Committed] RISC-V: Extend VLS modes in '\''VWEXTI'\'' iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920022440.3404964-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142175,"url":"https://patchwork.plctlab.org/api/1.2/patches/142175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920023059.1728132-1-pan2.li@intel.com/","msgid":"<20230920023059.1728132-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-20T02:30:59","name":"[v1] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920023059.1728132-1-pan2.li@intel.com/mbox/"},{"id":142202,"url":"https://patchwork.plctlab.org/api/1.2/patches/142202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920033736.365110-1-yanzhang.wang@intel.com/","msgid":"<20230920033736.365110-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-09-20T03:36:20","name":"RISC-V: Support simplifying x/(-1) to neg for vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920033736.365110-1-yanzhang.wang@intel.com/mbox/"},{"id":142212,"url":"https://patchwork.plctlab.org/api/1.2/patches/142212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920041202.4099349-1-lhyatt@gmail.com/","msgid":"<20230920041202.4099349-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-09-20T04:12:02","name":"libcpp: Improve the diagnostic for poisoned identifiers [PR36887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920041202.4099349-1-lhyatt@gmail.com/mbox/"},{"id":142220,"url":"https://patchwork.plctlab.org/api/1.2/patches/142220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com/","msgid":"<55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com>","list_archive_url":null,"date":"2023-09-20T04:51:05","name":"[_GLIBCXX_INLINE_VERSION] Fix ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com/mbox/"},{"id":142233,"url":"https://patchwork.plctlab.org/api/1.2/patches/142233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920053954.3454414-1-lehua.ding@rivai.ai/","msgid":"<20230920053954.3454414-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T05:39:54","name":"RISC-V: Fixed ICE caused by missing operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920053954.3454414-1-lehua.ding@rivai.ai/mbox/"},{"id":142235,"url":"https://patchwork.plctlab.org/api/1.2/patches/142235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg1he65o.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-09-20T05:59:47","name":"[v5] Introduce attribute sym_alias (was: Last call for bikeshedding on attribute sym/exalias/reverse_alias)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg1he65o.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":142249,"url":"https://patchwork.plctlab.org/api/1.2/patches/142249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqVzpk6dV9FP0LD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T06:48:46","name":"[committed] openmp: Add omp::decl attribute support [PR111392]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqVzpk6dV9FP0LD@tucnak/mbox/"},{"id":142253,"url":"https://patchwork.plctlab.org/api/1.2/patches/142253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920070311.3472141-1-lehua.ding@rivai.ai/","msgid":"<20230920070311.3472141-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T07:03:11","name":"RISC-V: Reorganize and rename combine patterns in autovec-opt.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920070311.3472141-1-lehua.ding@rivai.ai/mbox/"},{"id":142254,"url":"https://patchwork.plctlab.org/api/1.2/patches/142254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJW7-4N-CkL5mH2K+RQomL9pYmZVZvDUjYdMUHHd+5UBA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:03:39","name":"[fortran] PR68155 - ICE on initializing character array in type (len_lhs <> len_rhs)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJW7-4N-CkL5mH2K+RQomL9pYmZVZvDUjYdMUHHd+5UBA@mail.gmail.com/mbox/"},{"id":142258,"url":"https://patchwork.plctlab.org/api/1.2/patches/142258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqciCpgLlyt+ZwJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:17:28","name":"c, c++, v3: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqciCpgLlyt+ZwJ@tucnak/mbox/"},{"id":142260,"url":"https://patchwork.plctlab.org/api/1.2/patches/142260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqd7dUVlrhR6wE7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:23:25","name":"middle-end: use MAX_FIXED_MODE_SIZE instead of precidion of TImode/DImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqd7dUVlrhR6wE7@tucnak/mbox/"},{"id":142274,"url":"https://patchwork.plctlab.org/api/1.2/patches/142274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920075744.3514469-1-lehua.ding@rivai.ai/","msgid":"<20230920075744.3514469-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T07:57:44","name":"[V2] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920075744.3514469-1-lehua.ding@rivai.ai/mbox/"},{"id":142290,"url":"https://patchwork.plctlab.org/api/1.2/patches/142290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9e21160-58cb-e4a3-6cee-15ea291b8eba@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T08:49:16","name":"[rs6000] Enable vector compare for 16-byte memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9e21160-58cb-e4a3-6cee-15ea291b8eba@linux.ibm.com/mbox/"},{"id":142302,"url":"https://patchwork.plctlab.org/api/1.2/patches/142302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091921.BD9D91333E@imap2.suse-dmz.suse.de/","msgid":"<20230920091921.BD9D91333E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-20T09:19:21","name":"[1/2] tree-optimization/111489 - turn uninit limits to params","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091921.BD9D91333E@imap2.suse-dmz.suse.de/mbox/"},{"id":142303,"url":"https://patchwork.plctlab.org/api/1.2/patches/142303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091936.A39601333E@imap2.suse-dmz.suse.de/","msgid":"<20230920091936.A39601333E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-20T09:19:36","name":"[2/2] tree-optimization/111489 - raise --param uninit-max-chain-len to 8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091936.A39601333E@imap2.suse-dmz.suse.de/mbox/"},{"id":142311,"url":"https://patchwork.plctlab.org/api/1.2/patches/142311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920095748.84817-1-iain@sandoe.co.uk/","msgid":"<20230920095748.84817-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-20T09:57:48","name":"[pushed] Darwin: Move checking of the '\''shared'\'' driver spec.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920095748.84817-1-iain@sandoe.co.uk/mbox/"},{"id":142320,"url":"https://patchwork.plctlab.org/api/1.2/patches/142320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920100848.3241806-1-juzhe.zhong@rivai.ai/","msgid":"<20230920100848.3241806-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T10:08:48","name":"[Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920100848.3241806-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142360,"url":"https://patchwork.plctlab.org/api/1.2/patches/142360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b72396e437cb57d23c49260845743c03e6117bcd.1695207771.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T11:13:59","name":"[1/3,og13] OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b72396e437cb57d23c49260845743c03e6117bcd.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142359,"url":"https://patchwork.plctlab.org/api/1.2/patches/142359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com/","msgid":"<33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:14:00","name":"[2/3,og13] OpenMP, NVPTX: memcpy[23]D bias correction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142361,"url":"https://patchwork.plctlab.org/api/1.2/patches/142361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com/","msgid":"<56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:14:01","name":"[3/3,og13] OpenMP: Support accelerated 2D/3D memory copies for AMD GCN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142369,"url":"https://patchwork.plctlab.org/api/1.2/patches/142369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920114405.134100-1-julian@codesourcery.com/","msgid":"<20230920114405.134100-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:44:04","name":"OpenMP: Support accelerated 2D/3D memory copies for AMD GCN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920114405.134100-1-julian@codesourcery.com/mbox/"},{"id":142370,"url":"https://patchwork.plctlab.org/api/1.2/patches/142370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920115043.3434942-1-siddhesh@gotplt.org/","msgid":"<20230920115043.3434942-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-09-20T11:50:43","name":"Add a GCC Security policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920115043.3434942-1-siddhesh@gotplt.org/mbox/"},{"id":142375,"url":"https://patchwork.plctlab.org/api/1.2/patches/142375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-1-arthur.cohen@embecosm.com/","msgid":"<20230920120311.14892-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-20T11:59:51","name":"[1/3] librust: Add libproc_macro and build system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-1-arthur.cohen@embecosm.com/mbox/"},{"id":142376,"url":"https://patchwork.plctlab.org/api/1.2/patches/142376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-3-arthur.cohen@embecosm.com/","msgid":"<20230920120311.14892-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-20T11:59:53","name":"[2/3] build: Add libgrust as compilation modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-3-arthur.cohen@embecosm.com/mbox/"},{"id":142391,"url":"https://patchwork.plctlab.org/api/1.2/patches/142391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920123934.167085-1-juzhe.zhong@rivai.ai/","msgid":"<20230920123934.167085-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T12:39:34","name":"[Committed] RISC-V: Support VLS floating-point extend/truncate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920123934.167085-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142401,"url":"https://patchwork.plctlab.org/api/1.2/patches/142401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130904.2329151-1-lehua.ding@rivai.ai/","msgid":"<20230920130904.2329151-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T13:09:04","name":"[1/2] match.pd: Support combine cond_len_op + vec_cond similar to cond_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130904.2329151-1-lehua.ding@rivai.ai/mbox/"},{"id":142402,"url":"https://patchwork.plctlab.org/api/1.2/patches/142402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130928.2479134-1-lehua.ding@rivai.ai/","msgid":"<20230920130928.2479134-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T13:09:28","name":"[2/2] RISC-V: Add assert of the number of vmerge in autovec cond testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130928.2479134-1-lehua.ding@rivai.ai/mbox/"},{"id":142416,"url":"https://patchwork.plctlab.org/api/1.2/patches/142416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A64BB093DE2368050A9583F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T13:50:12","name":"AArch64: Fix strict-align cpymem/setmem [PR103100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A64BB093DE2368050A9583F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142418,"url":"https://patchwork.plctlab.org/api/1.2/patches/142418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com/","msgid":"<0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com>","list_archive_url":null,"date":"2023-09-20T13:51:02","name":"ifcvt/vect: Emit COND_ADD for conditional scalar reduction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com/mbox/"},{"id":142430,"url":"https://patchwork.plctlab.org/api/1.2/patches/142430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920143747.1479843-1-ppalka@redhat.com/","msgid":"<20230920143747.1479843-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-20T14:37:46","name":"c++: missing SFINAE in grok_array_decl [PR111493]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920143747.1479843-1-ppalka@redhat.com/mbox/"},{"id":142476,"url":"https://patchwork.plctlab.org/api/1.2/patches/142476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920145849.1118927-1-juzhe.zhong@rivai.ai/","msgid":"<20230920145849.1118927-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T14:58:49","name":"[Committed,V4] internal-fn: Support undefined rtx for uninitialized SSA_NAME[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920145849.1118927-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142483,"url":"https://patchwork.plctlab.org/api/1.2/patches/142483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920151234.1015328-1-aldyh@redhat.com/","msgid":"<20230920151234.1015328-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-20T15:12:21","name":"[frange] Remove special casing from unordered operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920151234.1015328-1-aldyh@redhat.com/mbox/"},{"id":142500,"url":"https://patchwork.plctlab.org/api/1.2/patches/142500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89820CEB177EEA9CA6597E2C83F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T16:07:53","name":"[v2] AArch64: Fix memmove operand corruption [PR111121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89820CEB177EEA9CA6597E2C83F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142528,"url":"https://patchwork.plctlab.org/api/1.2/patches/142528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920170601.472906-1-patrick@rivosinc.com/","msgid":"<20230920170601.472906-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-20T17:06:01","name":"RISC-V: Remove math.h import to resolve missing stubs failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920170601.472906-1-patrick@rivosinc.com/mbox/"},{"id":142530,"url":"https://patchwork.plctlab.org/api/1.2/patches/142530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920171026.1875871-1-ppalka@redhat.com/","msgid":"<20230920171026.1875871-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-20T17:10:26","name":"c++: constraint rewriting during ttp coercion [PR111485]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920171026.1875871-1-ppalka@redhat.com/mbox/"},{"id":142567,"url":"https://patchwork.plctlab.org/api/1.2/patches/142567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8506f4a-8320-203e-6810-6fa3c77143b7@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T19:29:57","name":"[COMMITTED] Tweak ssa_cache::merge_range API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8506f4a-8320-203e-6810-6fa3c77143b7@redhat.com/mbox/"},{"id":142679,"url":"https://patchwork.plctlab.org/api/1.2/patches/142679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011137.9105-1-guojie@loongson.cn/","msgid":"<20230921011137.9105-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-21T01:11:37","name":"LoongArch: Optimizations of vector construction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011137.9105-1-guojie@loongson.cn/mbox/"},{"id":142680,"url":"https://patchwork.plctlab.org/api/1.2/patches/142680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011918.9384-1-guojie@loongson.cn/","msgid":"<20230921011918.9384-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-21T01:19:18","name":"LoongArch: Optimizations of vector construction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011918.9384-1-guojie@loongson.cn/mbox/"},{"id":142694,"url":"https://patchwork.plctlab.org/api/1.2/patches/142694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921021746.3586923-1-juzhe.zhong@rivai.ai/","msgid":"<20230921021746.3586923-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T02:17:46","name":"[Committed] RISC-V: Support VLS INT <-> FP conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921021746.3586923-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142695,"url":"https://patchwork.plctlab.org/api/1.2/patches/142695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921023138.1789221-1-guojiufu@linux.ibm.com/","msgid":"<20230921023138.1789221-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-21T02:31:38","name":"check undefine_p for one more vr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921023138.1789221-1-guojiufu@linux.ibm.com/mbox/"},{"id":142697,"url":"https://patchwork.plctlab.org/api/1.2/patches/142697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921024313.1941378-1-apinski@marvell.com/","msgid":"<20230921024313.1941378-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-21T02:43:13","name":"MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921024313.1941378-1-apinski@marvell.com/mbox/"},{"id":142707,"url":"https://patchwork.plctlab.org/api/1.2/patches/142707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921031221.14656-1-xuli1@eswincomputing.com/","msgid":"<20230921031221.14656-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-21T03:12:21","name":"RISC-V: Optimized for strided load/store with stride == element width[PR111450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921031221.14656-1-xuli1@eswincomputing.com/mbox/"},{"id":142714,"url":"https://patchwork.plctlab.org/api/1.2/patches/142714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921034443.3671012-1-lehua.ding@rivai.ai/","msgid":"<20230921034443.3671012-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T03:44:43","name":"RISC-V: Rename predicate vector_gs_scale_operand_16/32 to more generic names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921034443.3671012-1-lehua.ding@rivai.ai/mbox/"},{"id":142735,"url":"https://patchwork.plctlab.org/api/1.2/patches/142735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921053259.1382886-1-lehua.ding@rivai.ai/","msgid":"<20230921053259.1382886-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T05:32:59","name":"[V3] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921053259.1382886-1-lehua.ding@rivai.ai/mbox/"},{"id":142745,"url":"https://patchwork.plctlab.org/api/1.2/patches/142745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orled0dnm0.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-09-21T06:52:39","name":"[v2] Re: Introduce -finline-stringops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orled0dnm0.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":142747,"url":"https://patchwork.plctlab.org/api/1.2/patches/142747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921065433.3298121-1-juzhe.zhong@rivai.ai/","msgid":"<20230921065433.3298121-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T06:54:33","name":"RISC-V: Fix SUBREG move of VLS mode[PR111486]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921065433.3298121-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142750,"url":"https://patchwork.plctlab.org/api/1.2/patches/142750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921071118.3321383-1-lehua.ding@rivai.ai/","msgid":"<20230921071118.3321383-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T07:11:18","name":"RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921071118.3321383-1-lehua.ding@rivai.ai/mbox/"},{"id":142753,"url":"https://patchwork.plctlab.org/api/1.2/patches/142753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-2-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-2-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:56","name":"[01/18] Initial support for -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-2-lin1.hu@intel.com/mbox/"},{"id":142759,"url":"https://patchwork.plctlab.org/api/1.2/patches/142759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-4-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-4-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:58","name":"[03/18,2/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-4-lin1.hu@intel.com/mbox/"},{"id":142766,"url":"https://patchwork.plctlab.org/api/1.2/patches/142766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-5-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-5-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:59","name":"[04/18,3/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-5-lin1.hu@intel.com/mbox/"},{"id":142762,"url":"https://patchwork.plctlab.org/api/1.2/patches/142762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-6-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-6-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:00","name":"[05/18,4/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-6-lin1.hu@intel.com/mbox/"},{"id":142769,"url":"https://patchwork.plctlab.org/api/1.2/patches/142769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-7-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-7-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:01","name":"[06/18,5/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-7-lin1.hu@intel.com/mbox/"},{"id":142763,"url":"https://patchwork.plctlab.org/api/1.2/patches/142763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-8-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-8-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:02","name":"[07/18,1/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-8-lin1.hu@intel.com/mbox/"},{"id":142754,"url":"https://patchwork.plctlab.org/api/1.2/patches/142754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-9-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-9-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:03","name":"[08/18,2/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-9-lin1.hu@intel.com/mbox/"},{"id":142757,"url":"https://patchwork.plctlab.org/api/1.2/patches/142757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-10-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-10-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:04","name":"[09/18,3/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-10-lin1.hu@intel.com/mbox/"},{"id":142764,"url":"https://patchwork.plctlab.org/api/1.2/patches/142764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-11-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-11-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:05","name":"[10/18,4/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-11-lin1.hu@intel.com/mbox/"},{"id":142770,"url":"https://patchwork.plctlab.org/api/1.2/patches/142770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-12-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-12-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:06","name":"[11/18,5/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-12-lin1.hu@intel.com/mbox/"},{"id":142767,"url":"https://patchwork.plctlab.org/api/1.2/patches/142767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-13-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-13-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:07","name":"[12/18] Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-13-lin1.hu@intel.com/mbox/"},{"id":142768,"url":"https://patchwork.plctlab.org/api/1.2/patches/142768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-14-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-14-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:08","name":"[13/18] Support -mevex512 for AVX512F intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-14-lin1.hu@intel.com/mbox/"},{"id":142756,"url":"https://patchwork.plctlab.org/api/1.2/patches/142756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-15-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-15-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:09","name":"[14/18] Support -mevex512 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-15-lin1.hu@intel.com/mbox/"},{"id":142765,"url":"https://patchwork.plctlab.org/api/1.2/patches/142765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-16-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-16-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:10","name":"[15/18] Support -mevex512 for AVX512BW intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-16-lin1.hu@intel.com/mbox/"},{"id":142755,"url":"https://patchwork.plctlab.org/api/1.2/patches/142755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-17-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-17-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:11","name":"[16/18] Support -mevex512 for AVX512{IFMA, VBMI, VNNI, BF16, VPOPCNTDQ, VBMI2, BITALG, VP2INTERSECT}, VAES, GFNI, VPCLMULQDQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-17-lin1.hu@intel.com/mbox/"},{"id":142760,"url":"https://patchwork.plctlab.org/api/1.2/patches/142760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-18-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-18-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:12","name":"[17/18] Support -mevex512 for AVX512FP16 intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-18-lin1.hu@intel.com/mbox/"},{"id":142758,"url":"https://patchwork.plctlab.org/api/1.2/patches/142758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-19-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-19-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:13","name":"[18/18] Allow -mno-evex512 usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-19-lin1.hu@intel.com/mbox/"},{"id":142772,"url":"https://patchwork.plctlab.org/api/1.2/patches/142772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921080931.1954219-1-apinski@marvell.com/","msgid":"<20230921080931.1954219-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-21T08:09:31","name":"PHIOPT: Fix minmax_replacement for three way","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921080931.1954219-1-apinski@marvell.com/mbox/"},{"id":142774,"url":"https://patchwork.plctlab.org/api/1.2/patches/142774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921082017.1456735-1-juzhe.zhong@rivai.ai/","msgid":"<20230921082017.1456735-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T08:20:17","name":"RISC-V: Enable undefined support for RVV auto-vectorization[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921082017.1456735-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142777,"url":"https://patchwork.plctlab.org/api/1.2/patches/142777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921084600.40546-2-arthur.cohen@embecosm.com/","msgid":"<20230921084600.40546-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-21T08:44:30","name":"[3/3] build: Regenerate build files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921084600.40546-2-arthur.cohen@embecosm.com/mbox/"},{"id":142782,"url":"https://patchwork.plctlab.org/api/1.2/patches/142782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aaf9d765-ca62-487d-974a-9984d120235d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T09:22:00","name":"[wwwdocs] OpenMP: gcc-14/changes.html and projects/gomp/ update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aaf9d765-ca62-487d-974a-9984d120235d@codesourcery.com/mbox/"},{"id":142784,"url":"https://patchwork.plctlab.org/api/1.2/patches/142784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921093415.128457-4-arthur.cohen@embecosm.com/","msgid":"<20230921093415.128457-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-21T09:32:49","name":"[3/3,v2] build: Regenerate build files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921093415.128457-4-arthur.cohen@embecosm.com/mbox/"},{"id":142785,"url":"https://patchwork.plctlab.org/api/1.2/patches/142785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921095027.143005-1-lehua.ding@rivai.ai/","msgid":"<20230921095027.143005-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T09:50:27","name":"[V2] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921095027.143005-1-lehua.ding@rivai.ai/mbox/"},{"id":142794,"url":"https://patchwork.plctlab.org/api/1.2/patches/142794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921103209.819164-1-pan2.li@intel.com/","msgid":"<20230921103209.819164-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-21T10:32:09","name":"[v2] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921103209.819164-1-pan2.li@intel.com/mbox/"},{"id":142798,"url":"https://patchwork.plctlab.org/api/1.2/patches/142798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921115410.1393445-1-juzhe.zhong@rivai.ai/","msgid":"<20230921115410.1393445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T11:54:10","name":"[Committed] RISC-V: Support VLS mult high","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921115410.1393445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142800,"url":"https://patchwork.plctlab.org/api/1.2/patches/142800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921123333.3451981-1-juzhe.zhong@rivai.ai/","msgid":"<20230921123333.3451981-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T12:33:33","name":"[Committed] RISC-V: Add more VLS unary tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921123333.3451981-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142801,"url":"https://patchwork.plctlab.org/api/1.2/patches/142801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQxIGK4oIxNMun2i@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-21T13:41:44","name":"[v3] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQxIGK4oIxNMun2i@Thaum.localdomain/mbox/"},{"id":142802,"url":"https://patchwork.plctlab.org/api/1.2/patches/142802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FFA5F943B02C53858EAD83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T14:24:44","name":"[v2] AArch64: Fix strict-align cpymem/setmem [PR103100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FFA5F943B02C53858EAD83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142804,"url":"https://patchwork.plctlab.org/api/1.2/patches/142804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921151850.1697755-1-pan2.li@intel.com/","msgid":"<20230921151850.1697755-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-21T15:18:50","name":"[v3] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921151850.1697755-1-pan2.li@intel.com/mbox/"},{"id":142806,"url":"https://patchwork.plctlab.org/api/1.2/patches/142806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982074EA9925BC24E2DC43A83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T16:19:51","name":"AArch64: Add inline memmove expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982074EA9925BC24E2DC43A83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142971,"url":"https://patchwork.plctlab.org/api/1.2/patches/142971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921224722.3070110-1-juzhe.zhong@rivai.ai/","msgid":"<20230921224722.3070110-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T22:47:22","name":"[Committed] RISC-V: Add VLS integer ABS support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921224722.3070110-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143023,"url":"https://patchwork.plctlab.org/api/1.2/patches/143023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922001238.97411-1-pan2.li@intel.com/","msgid":"<20230922001238.97411-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T00:12:38","name":"[v4] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922001238.97411-1-pan2.li@intel.com/mbox/"},{"id":143055,"url":"https://patchwork.plctlab.org/api/1.2/patches/143055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922011251.335382-1-pan2.li@intel.com/","msgid":"<20230922011251.335382-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T01:12:51","name":"[v1] RISC-V: Leverage __builtin_xx instead of math.h for test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922011251.335382-1-pan2.li@intel.com/mbox/"},{"id":143069,"url":"https://patchwork.plctlab.org/api/1.2/patches/143069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922013309.21359-1-xuli1@eswincomputing.com/","msgid":"<20230922013309.21359-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-22T01:33:09","name":"RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922013309.21359-1-xuli1@eswincomputing.com/mbox/"},{"id":143105,"url":"https://patchwork.plctlab.org/api/1.2/patches/143105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922023743.332-1-xuli1@eswincomputing.com/","msgid":"<20230922023743.332-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-22T02:37:43","name":"[V2] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922023743.332-1-xuli1@eswincomputing.com/mbox/"},{"id":143123,"url":"https://patchwork.plctlab.org/api/1.2/patches/143123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030007.197448-1-lehua.ding@rivai.ai/","msgid":"<20230922030007.197448-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-22T03:00:07","name":"[COMMITTED] RISC-V: Split VLS avl_type from NONVLMAX avl_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030007.197448-1-lehua.ding@rivai.ai/mbox/"},{"id":143124,"url":"https://patchwork.plctlab.org/api/1.2/patches/143124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030026.197559-1-lehua.ding@rivai.ai/","msgid":"<20230922030026.197559-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-22T03:00:26","name":"[COMMITTED,V4] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030026.197559-1-lehua.ding@rivai.ai/mbox/"},{"id":143146,"url":"https://patchwork.plctlab.org/api/1.2/patches/143146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922033959.814278-1-pan2.li@intel.com/","msgid":"<20230922033959.814278-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T03:39:59","name":"[v1] RISC-V: Remove arch and abi option for run test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922033959.814278-1-pan2.li@intel.com/mbox/"},{"id":143149,"url":"https://patchwork.plctlab.org/api/1.2/patches/143149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922034644.843601-1-pan2.li@intel.com/","msgid":"<20230922034644.843601-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T03:46:44","name":"[v1] RISC-V: Rename the test macro for math autovec test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922034644.843601-1-pan2.li@intel.com/mbox/"},{"id":143206,"url":"https://patchwork.plctlab.org/api/1.2/patches/143206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922062306.1220795-1-pan2.li@intel.com/","msgid":"<20230922062306.1220795-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T06:23:06","name":"[v1] RISCV-V: Suport FP floor auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922062306.1220795-1-pan2.li@intel.com/mbox/"},{"id":143224,"url":"https://patchwork.plctlab.org/api/1.2/patches/143224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com/","msgid":"<47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-22T07:11:16","name":"[1/2] RISC-V: Define not broken prefetch builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com/mbox/"},{"id":143225,"url":"https://patchwork.plctlab.org/api/1.2/patches/143225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com/","msgid":"<8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-22T07:11:17","name":"[2/2] RISC-V: Fix ICE by expansion and register coercion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com/mbox/"},{"id":143240,"url":"https://patchwork.plctlab.org/api/1.2/patches/143240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922075153.2220810-1-juzhe.zhong@rivai.ai/","msgid":"<20230922075153.2220810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-22T07:51:53","name":"RISC-V: Add VLS conditional patterns support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922075153.2220810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143247,"url":"https://patchwork.plctlab.org/api/1.2/patches/143247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-1-andrea.corallo@arm.com/","msgid":"<20230922080703.93612-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-09-22T08:07:01","name":"[1/3] recog: Improve parser for pattern new compact syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-1-andrea.corallo@arm.com/mbox/"},{"id":143246,"url":"https://patchwork.plctlab.org/api/1.2/patches/143246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-2-andrea.corallo@arm.com/","msgid":"<20230922080703.93612-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-09-22T08:07:02","name":"[2/3] recog: Support space in \"[ cons\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-2-andrea.corallo@arm.com/mbox/"},{"id":143259,"url":"https://patchwork.plctlab.org/api/1.2/patches/143259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922083057.980029-1-juzhe.zhong@rivai.ai/","msgid":"<20230922083057.980029-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-22T08:30:57","name":"[Committed] RISC-V: Remove @ of vec_duplicate pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922083057.980029-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143281,"url":"https://patchwork.plctlab.org/api/1.2/patches/143281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922091158.1592808-1-pan2.li@intel.com/","msgid":"<20230922091158.1592808-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T09:11:58","name":"[v1] RISC-V: Move ceil test cases to unop folder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922091158.1592808-1-pan2.li@intel.com/mbox/"},{"id":143338,"url":"https://patchwork.plctlab.org/api/1.2/patches/143338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922102904.2270325-1-guojiufu@linux.ibm.com/","msgid":"<20230922102904.2270325-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-22T10:29:04","name":"light expander sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922102904.2270325-1-guojiufu@linux.ibm.com/mbox/"},{"id":143351,"url":"https://patchwork.plctlab.org/api/1.2/patches/143351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-2-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:19","name":"[01/13,APX,EGPR] middle-end: Add insn argument to base_reg_class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-2-hongyu.wang@intel.com/mbox/"},{"id":143347,"url":"https://patchwork.plctlab.org/api/1.2/patches/143347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-3-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:20","name":"[02/13,APX,EGPR] middle-end: Add index_reg_class with insn argument.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-3-hongyu.wang@intel.com/mbox/"},{"id":143350,"url":"https://patchwork.plctlab.org/api/1.2/patches/143350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-4-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:21","name":"[03/13,APX_EGPR] Initial support for APX_F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-4-hongyu.wang@intel.com/mbox/"},{"id":143355,"url":"https://patchwork.plctlab.org/api/1.2/patches/143355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-5-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:22","name":"[04/13,APX,EGPR] Add 16 new integer general purpose registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-5-hongyu.wang@intel.com/mbox/"},{"id":143348,"url":"https://patchwork.plctlab.org/api/1.2/patches/143348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-6-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:23","name":"[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-6-hongyu.wang@intel.com/mbox/"},{"id":143356,"url":"https://patchwork.plctlab.org/api/1.2/patches/143356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-7-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:24","name":"[06/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-7-hongyu.wang@intel.com/mbox/"},{"id":143349,"url":"https://patchwork.plctlab.org/api/1.2/patches/143349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-8-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:25","name":"[07/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-8-hongyu.wang@intel.com/mbox/"},{"id":143354,"url":"https://patchwork.plctlab.org/api/1.2/patches/143354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-12-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:29","name":"[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-12-hongyu.wang@intel.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-09/mbox/"},{"id":32,"url":"https://patchwork.plctlab.org/api/1.2/bundles/32/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-10/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-10","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":146975,"url":"https://patchwork.plctlab.org/api/1.2/patches/146975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCr7wp7BF3ifNTRb4dD=ib_-n7Av_0SD0QG7NStL+7CjWA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-30T20:30:45","name":"RFA: RISC-V: Make riscv_vector::legitimize_move adjust SRC in the caller. (Was: Remove mem-to-mem VLS move pattern[PR111566])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCr7wp7BF3ifNTRb4dD=ib_-n7Av_0SD0QG7NStL+7CjWA@mail.gmail.com/mbox/"},{"id":146979,"url":"https://patchwork.plctlab.org/api/1.2/patches/146979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930204910.3544331-1-slyich@gmail.com/","msgid":"<20230930204910.3544331-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-09-30T20:49:10","name":"rtl: fix buidl failure on -fchecking=2 [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930204910.3544331-1-slyich@gmail.com/mbox/"},{"id":146981,"url":"https://patchwork.plctlab.org/api/1.2/patches/146981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930210254.3750973-1-slyich@gmail.com/","msgid":"<20230930210254.3750973-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-09-30T21:02:54","name":"[v2] rtl: fix build failure on -fchecking=2 [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930210254.3750973-1-slyich@gmail.com/mbox/"},{"id":147001,"url":"https://patchwork.plctlab.org/api/1.2/patches/147001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930230019.865326-1-patrick@rivosinc.com/","msgid":"<20230930230019.865326-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-30T23:00:19","name":"RISC-V: Use safe_grow_cleared for vector info [PR111469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930230019.865326-1-patrick@rivosinc.com/mbox/"},{"id":147002,"url":"https://patchwork.plctlab.org/api/1.2/patches/147002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da3d1e8c-3df2-2008-ad14-a3036b6f6665@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-09-30T23:13:05","name":"[Committed] RISC-V: Use safe_grow_cleared for vector info [PR111469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da3d1e8c-3df2-2008-ad14-a3036b6f6665@rivosinc.com/mbox/"},{"id":147076,"url":"https://patchwork.plctlab.org/api/1.2/patches/147076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001113827.54547-1-alx@kernel.org/","msgid":"<20231001113827.54547-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T11:38:28","name":"[v3] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001113827.54547-1-alx@kernel.org/mbox/"},{"id":147077,"url":"https://patchwork.plctlab.org/api/1.2/patches/147077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001114120.54695-1-alx@kernel.org/","msgid":"<20231001114120.54695-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T11:41:21","name":"[v4] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001114120.54695-1-alx@kernel.org/mbox/"},{"id":147131,"url":"https://patchwork.plctlab.org/api/1.2/patches/147131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001162400.68141-1-alx@kernel.org/","msgid":"<20231001162400.68141-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T16:24:00","name":"[v5] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001162400.68141-1-alx@kernel.org/mbox/"},{"id":147148,"url":"https://patchwork.plctlab.org/api/1.2/patches/147148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192742.145518-1-pinskia@gmail.com/","msgid":"<20231001192742.145518-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-01T19:27:43","name":"[COMMITTED/13] Fix PR 110386: backprop vs ABSU_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192742.145518-1-pinskia@gmail.com/mbox/"},{"id":147149,"url":"https://patchwork.plctlab.org/api/1.2/patches/147149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192943.3473530-1-slyich@gmail.com/","msgid":"<20231001192943.3473530-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-01T19:29:43","name":"[v2] ipa-utils: avoid uninitialized probabilities on ICF [PR111559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192943.3473530-1-slyich@gmail.com/mbox/"},{"id":147152,"url":"https://patchwork.plctlab.org/api/1.2/patches/147152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-2-sandra@codesourcery.com/","msgid":"<20231001201021.785572-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:18","name":"[WIP,1/4] openacc: Rename OMP_CLAUSE_TILE to OMP_CLAUSE_OACC_TILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-2-sandra@codesourcery.com/mbox/"},{"id":147153,"url":"https://patchwork.plctlab.org/api/1.2/patches/147153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-3-sandra@codesourcery.com/","msgid":"<20231001201021.785572-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:19","name":"[WIP,2/4] OpenMP: Language-independent parts of loop transform support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-3-sandra@codesourcery.com/mbox/"},{"id":147154,"url":"https://patchwork.plctlab.org/api/1.2/patches/147154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-4-sandra@codesourcery.com/","msgid":"<20231001201021.785572-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:20","name":"[WIP,3/4] OpenMP: Fortran front-end support for loop transforms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-4-sandra@codesourcery.com/mbox/"},{"id":147155,"url":"https://patchwork.plctlab.org/api/1.2/patches/147155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-5-sandra@codesourcery.com/","msgid":"<20231001201021.785572-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:21","name":"[WIP,4/4] OpenMP: C and C++ front-end support for loop transforms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-5-sandra@codesourcery.com/mbox/"},{"id":147157,"url":"https://patchwork.plctlab.org/api/1.2/patches/147157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001202315.324838-1-pinskia@gmail.com/","msgid":"<20231001202315.324838-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-01T20:23:15","name":"[COMMITTED/13] Fix PR 111331: wrong code for `a > 28 ? MIN : 29`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001202315.324838-1-pinskia@gmail.com/mbox/"},{"id":147165,"url":"https://patchwork.plctlab.org/api/1.2/patches/147165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqsxXsNQTsuEb5-TdeoqmK0njOOYBV-BN0-arSB2CRpZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-01T22:00:33","name":"Committed: Fix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqsxXsNQTsuEb5-TdeoqmK0njOOYBV-BN0-arSB2CRpZA@mail.gmail.com/mbox/"},{"id":147183,"url":"https://patchwork.plctlab.org/api/1.2/patches/147183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRonlN279jCTl5fZ@dj3ntoo/","msgid":"","list_archive_url":null,"date":"2023-10-02T02:14:44","name":"C/C++: add hints for strerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRonlN279jCTl5fZ@dj3ntoo/mbox/"},{"id":147186,"url":"https://patchwork.plctlab.org/api/1.2/patches/147186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpyPBkF-3hj2DiBLPm0TTP8R9RmyPqMEYjmk10MFp3qoQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T02:43:45","name":"[RISC-V] : Re: cpymem for RISCV with v extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpyPBkF-3hj2DiBLPm0TTP8R9RmyPqMEYjmk10MFp3qoQ@mail.gmail.com/mbox/"},{"id":147193,"url":"https://patchwork.plctlab.org/api/1.2/patches/147193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkdhpmpn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T06:23:00","name":"[pushed] Fix profiledbootstrap poly_int fallout [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkdhpmpn.fsf@arm.com/mbox/"},{"id":147197,"url":"https://patchwork.plctlab.org/api/1.2/patches/147197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002070154.71161-1-iain@sandoe.co.uk/","msgid":"<20231002070154.71161-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-02T07:01:54","name":"[pushed] testsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002070154.71161-1-iain@sandoe.co.uk/mbox/"},{"id":147202,"url":"https://patchwork.plctlab.org/api/1.2/patches/147202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17789-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:41:14","name":"[1/3] middle-end: Refactor vectorizer loop conditionals and separate out IV to new variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17789-tamar@arm.com/mbox/"},{"id":147204,"url":"https://patchwork.plctlab.org/api/1.2/patches/147204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0Q7ovA3FweWk4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:41:55","name":"[2/3] middle-end: updated niters analysis to handle multiple exits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0Q7ovA3FweWk4@arm.com/mbox/"},{"id":147205,"url":"https://patchwork.plctlab.org/api/1.2/patches/147205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0VD9Z6w4st7GM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:42:12","name":"[3/3] middle-end: maintain LCSSA throughout loop peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0VD9Z6w4st7GM@arm.com/mbox/"},{"id":147206,"url":"https://patchwork.plctlab.org/api/1.2/patches/147206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002080244.105205-1-kito.cheng@sifive.com/","msgid":"<20231002080244.105205-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-02T08:02:44","name":"options: Prevent multidimensional arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002080244.105205-1-kito.cheng@sifive.com/mbox/"},{"id":147256,"url":"https://patchwork.plctlab.org/api/1.2/patches/147256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002120545.1524306-1-slyich@gmail.com/","msgid":"<20231002120545.1524306-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-02T12:05:45","name":"Makefile.tpl: disable -Werror for feedback stage [PR111663]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002120545.1524306-1-slyich@gmail.com/mbox/"},{"id":147275,"url":"https://patchwork.plctlab.org/api/1.2/patches/147275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17792-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T12:38:53","name":"middle-end: Recursively check is_trivially_copyable_or_pair in vec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17792-tamar@arm.com/mbox/"},{"id":147370,"url":"https://patchwork.plctlab.org/api/1.2/patches/147370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163308.4034749-1-dmalcolm@redhat.com/","msgid":"<20231002163308.4034749-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:08","name":"[pushed] diagnostics: fix missing init of set_locations_cb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163308.4034749-1-dmalcolm@redhat.com/mbox/"},{"id":147372,"url":"https://patchwork.plctlab.org/api/1.2/patches/147372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163315.4034790-1-dmalcolm@redhat.com/","msgid":"<20231002163315.4034790-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:15","name":"[pushed] diagnostics: group together source printing fields of diagnostic_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163315.4034790-1-dmalcolm@redhat.com/mbox/"},{"id":147371,"url":"https://patchwork.plctlab.org/api/1.2/patches/147371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163319.4034817-1-dmalcolm@redhat.com/","msgid":"<20231002163319.4034817-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:19","name":"[pushed] diagnostics: add diagnostic_output_format class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163319.4034817-1-dmalcolm@redhat.com/mbox/"},{"id":147420,"url":"https://patchwork.plctlab.org/api/1.2/patches/147420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002182429.87779-1-iain@sandoe.co.uk/","msgid":"<20231002182429.87779-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-02T18:24:29","name":"[pushed] contrib: Update Darwin entries in config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002182429.87779-1-iain@sandoe.co.uk/mbox/"},{"id":147440,"url":"https://patchwork.plctlab.org/api/1.2/patches/147440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002193738.3900509-1-ppalka@redhat.com/","msgid":"<20231002193738.3900509-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-02T19:37:38","name":"c++: merge tsubst_copy into tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002193738.3900509-1-ppalka@redhat.com/mbox/"},{"id":147462,"url":"https://patchwork.plctlab.org/api/1.2/patches/147462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsqv4QBkKMm-FN8@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:40:31","name":"[committed] Increase timeout factor for hppa*-*-* in gcc.dg/long_branch.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsqv4QBkKMm-FN8@mx3210.localdomain/mbox/"},{"id":147463,"url":"https://patchwork.plctlab.org/api/1.2/patches/147463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrTLV0PNuDW7Jl@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:42:52","name":"[committed] Require target lra in gcc.dg/pr108095.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrTLV0PNuDW7Jl@mx3210.localdomain/mbox/"},{"id":147465,"url":"https://patchwork.plctlab.org/api/1.2/patches/147465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrzoAdPY_HsVnj@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:45:02","name":"[committed] Add hppa*-*-* to dg-error targets at line 5 in gfortran.dg/pr95690.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrzoAdPY_HsVnj@mx3210.localdomain/mbox/"},{"id":147529,"url":"https://patchwork.plctlab.org/api/1.2/patches/147529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002222344.2714786-1-lhyatt@gmail.com/","msgid":"<20231002222344.2714786-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-10-02T22:23:44","name":"libcpp: testsuite: Add test for fixed _Pragma bug [PR82335]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002222344.2714786-1-lhyatt@gmail.com/mbox/"},{"id":147596,"url":"https://patchwork.plctlab.org/api/1.2/patches/147596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003022724.2875-1-kito.cheng@sifive.com/","msgid":"<20231003022724.2875-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T02:27:24","name":"RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003022724.2875-1-kito.cheng@sifive.com/mbox/"},{"id":147601,"url":"https://patchwork.plctlab.org/api/1.2/patches/147601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003034619.15383-1-xry111@xry111.site/","msgid":"<20231003034619.15383-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-03T03:46:03","name":"LoongArch: Replace UNSPEC_FCOPYSIGN with copysign RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003034619.15383-1-xry111@xry111.site/mbox/"},{"id":147764,"url":"https://patchwork.plctlab.org/api/1.2/patches/147764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-2-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:31","name":"[v1,1/4] options: Define TARGET__P and TARGET__OPTS_P macro for Mask and InverseMask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-2-kito.cheng@sifive.com/mbox/"},{"id":147765,"url":"https://patchwork.plctlab.org/api/1.2/patches/147765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-3-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:32","name":"[v1,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-3-kito.cheng@sifive.com/mbox/"},{"id":147771,"url":"https://patchwork.plctlab.org/api/1.2/patches/147771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-4-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:33","name":"[v1,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-4-kito.cheng@sifive.com/mbox/"},{"id":147766,"url":"https://patchwork.plctlab.org/api/1.2/patches/147766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-5-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:34","name":"[v1,4/4] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-5-kito.cheng@sifive.com/mbox/"},{"id":147796,"url":"https://patchwork.plctlab.org/api/1.2/patches/147796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a06f5460-e3fa-4788-9a9d-e41b7c711890@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-03T09:42:41","name":"[GCC] aarch64: Enable Cortex-X4 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a06f5460-e3fa-4788-9a9d-e41b7c711890@arm.com/mbox/"},{"id":147847,"url":"https://patchwork.plctlab.org/api/1.2/patches/147847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003114532.2285429-1-manolis.tsamis@vrull.eu/","msgid":"<20231003114532.2285429-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-10-03T11:45:32","name":"[v6] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003114532.2285429-1-manolis.tsamis@vrull.eu/mbox/"},{"id":147849,"url":"https://patchwork.plctlab.org/api/1.2/patches/147849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edibkj6n.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-03T12:02:40","name":"contrib/mklog.py: Fix issues reported by flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edibkj6n.fsf@suse.cz/mbox/"},{"id":147896,"url":"https://patchwork.plctlab.org/api/1.2/patches/147896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003134455.4176066-1-dmalcolm@redhat.com/","msgid":"<20231003134455.4176066-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-03T13:44:54","name":"[pushed] diagnostics: add ctors to text_info; add m_ prefixes to fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003134455.4176066-1-dmalcolm@redhat.com/mbox/"},{"id":147902,"url":"https://patchwork.plctlab.org/api/1.2/patches/147902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com/","msgid":"<785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-10-03T14:07:25","name":"ira: Scale save/restore costs of callee save registers with block frequency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com/mbox/"},{"id":147910,"url":"https://patchwork.plctlab.org/api/1.2/patches/147910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ff7d585-b793-a586-efe5-27874242742f@redhat.com/","msgid":"<6ff7d585-b793-a586-efe5-27874242742f@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:31:33","name":"[COMMITTED] Return TRUE only when a global value is updated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ff7d585-b793-a586-efe5-27874242742f@redhat.com/mbox/"},{"id":147911,"url":"https://patchwork.plctlab.org/api/1.2/patches/147911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com/","msgid":"<248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:32:01","name":"[COMMITTED] Remove pass counting in VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com/mbox/"},{"id":148303,"url":"https://patchwork.plctlab.org/api/1.2/patches/148303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004124718.3237337-1-jwakely@redhat.com/","msgid":"<20231004124718.3237337-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:45:57","name":"wwwdocs: Add ADL to C++ non-bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004124718.3237337-1-jwakely@redhat.com/mbox/"},{"id":147959,"url":"https://patchwork.plctlab.org/api/1.2/patches/147959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-2-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:32","name":"[1/6] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-2-victor.donascimento@arm.com/mbox/"},{"id":147957,"url":"https://patchwork.plctlab.org/api/1.2/patches/147957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-3-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:33","name":"[2/6] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-3-victor.donascimento@arm.com/mbox/"},{"id":147960,"url":"https://patchwork.plctlab.org/api/1.2/patches/147960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-4-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:34","name":"[3/6] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-4-victor.donascimento@arm.com/mbox/"},{"id":147956,"url":"https://patchwork.plctlab.org/api/1.2/patches/147956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-5-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:35","name":"[4/6] aarch64: Add basic target_print_operand support for CONST_STRING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-5-victor.donascimento@arm.com/mbox/"},{"id":147958,"url":"https://patchwork.plctlab.org/api/1.2/patches/147958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-6-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:36","name":"[5/6] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-6-victor.donascimento@arm.com/mbox/"},{"id":147955,"url":"https://patchwork.plctlab.org/api/1.2/patches/147955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-7-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:37","name":"[6/6] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-7-victor.donascimento@arm.com/mbox/"},{"id":148006,"url":"https://patchwork.plctlab.org/api/1.2/patches/148006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003164812.13294-1-dmalcolm@redhat.com/","msgid":"<20231003164812.13294-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-03T16:48:12","name":"c++: print source code in print_instantiation_partial_context_line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003164812.13294-1-dmalcolm@redhat.com/mbox/"},{"id":148008,"url":"https://patchwork.plctlab.org/api/1.2/patches/148008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1gjiqgj.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:08:28","name":"[committed] ipa-modref: Fix dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1gjiqgj.fsf@suse.cz/mbox/"},{"id":148022,"url":"https://patchwork.plctlab.org/api/1.2/patches/148022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-2-tromey@adacore.com/","msgid":"<20231003171851.1161340-2-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-03T17:18:50","name":"[1/2] libstdc++: Define _versioned_namespace in xmethods.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-2-tromey@adacore.com/mbox/"},{"id":148010,"url":"https://patchwork.plctlab.org/api/1.2/patches/148010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-3-tromey@adacore.com/","msgid":"<20231003171851.1161340-3-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-03T17:18:51","name":"[2/2] libstdc++: _versioned_namespace is always non-None","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-3-tromey@adacore.com/mbox/"},{"id":148015,"url":"https://patchwork.plctlab.org/api/1.2/patches/148015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxRdeneRzguiH9R@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:37:57","name":"match.pd: Fix up a ? cst1 : cst2 regression on signed bool [PR111668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxRdeneRzguiH9R@tucnak/mbox/"},{"id":148016,"url":"https://patchwork.plctlab.org/api/1.2/patches/148016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxT3SAIdOD6/VGB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:48:13","name":"match.pd: Avoid other build_nonstandard_integer_type calls [PR111369]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxT3SAIdOD6/VGB@tucnak/mbox/"},{"id":148031,"url":"https://patchwork.plctlab.org/api/1.2/patches/148031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003190414.23822-1-bshanks@codeweavers.com/","msgid":"<20231003190414.23822-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-10-03T18:58:14","name":"[v2] libiberty: Use posix_spawn in pex-unix when available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003190414.23822-1-bshanks@codeweavers.com/mbox/"},{"id":148052,"url":"https://patchwork.plctlab.org/api/1.2/patches/148052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003201945.907116-1-patrick@rivosinc.com/","msgid":"<20231003201945.907116-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T20:19:45","name":"RISC-V: Unescape chars in pr111566.f90 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003201945.907116-1-patrick@rivosinc.com/mbox/"},{"id":148059,"url":"https://patchwork.plctlab.org/api/1.2/patches/148059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003210916.1027930-1-jason@redhat.com/","msgid":"<20231003210916.1027930-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-03T21:09:16","name":"[v2,RFA] diagnostic: add permerror variants with opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003210916.1027930-1-jason@redhat.com/mbox/"},{"id":148061,"url":"https://patchwork.plctlab.org/api/1.2/patches/148061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com/","msgid":"<0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com>","list_archive_url":null,"date":"2023-10-03T21:17:21","name":"[COMMITTED] Don'\''t use range_info_get_range for pointers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com/mbox/"},{"id":148075,"url":"https://patchwork.plctlab.org/api/1.2/patches/148075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-2-patrick@rivosinc.com/","msgid":"<20231003222700.909771-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:26:58","name":"[RFC,gcc13,backport,1/3] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-2-patrick@rivosinc.com/mbox/"},{"id":148074,"url":"https://patchwork.plctlab.org/api/1.2/patches/148074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-3-patrick@rivosinc.com/","msgid":"<20231003222700.909771-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:26:59","name":"[RFC,gcc13,backport,2/3] RISC-V: Specify -mabi for ztso testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-3-patrick@rivosinc.com/mbox/"},{"id":148073,"url":"https://patchwork.plctlab.org/api/1.2/patches/148073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-4-patrick@rivosinc.com/","msgid":"<20231003222700.909771-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:27:00","name":"[RFC,gcc13,backport,3/3,RISCV,committed] Remove spurious newline in ztso sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-4-patrick@rivosinc.com/mbox/"},{"id":148147,"url":"https://patchwork.plctlab.org/api/1.2/patches/148147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004025538.489F220439@pchp3.se.axis.com/","msgid":"<20231004025538.489F220439@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T02:55:38","name":"[1/2] testsuite: Add dg-require-atomic-exchange non-atomic code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004025538.489F220439@pchp3.se.axis.com/mbox/"},{"id":148150,"url":"https://patchwork.plctlab.org/api/1.2/patches/148150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004031136.8B8BA2042A@pchp3.se.axis.com/","msgid":"<20231004031136.8B8BA2042A@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T03:11:36","name":"[2/2] testsuite: Replace many dg-require-thread-fence with dg-require-atomic-exchange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004031136.8B8BA2042A@pchp3.se.axis.com/mbox/"},{"id":148167,"url":"https://patchwork.plctlab.org/api/1.2/patches/148167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004074906.15805-1-cooper.qu@linux.alibaba.com/","msgid":"<20231004074906.15805-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-10-04T07:49:06","name":"RISC-V: THead: Fix missing CFI directives for th.sdd in prologue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004074906.15805-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":148200,"url":"https://patchwork.plctlab.org/api/1.2/patches/148200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004092406.2F51A38618BF@sourceware.org/","msgid":"<20231004092406.2F51A38618BF@sourceware.org>","list_archive_url":null,"date":"2023-10-04T09:23:28","name":"ipa/111643 - clarify flatten attribute documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004092406.2F51A38618BF@sourceware.org/mbox/"},{"id":148218,"url":"https://patchwork.plctlab.org/api/1.2/patches/148218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMm2O=bSQBen=Mn7QdPKQEcJwRMs3MV8+wMuR7hvBr5n-w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-04T10:16:14","name":"PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMm2O=bSQBen=Mn7QdPKQEcJwRMs3MV8+wMuR7hvBr5n-w@mail.gmail.com/mbox/"},{"id":148227,"url":"https://patchwork.plctlab.org/api/1.2/patches/148227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com/","msgid":"<1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com>","list_archive_url":null,"date":"2023-10-04T11:08:15","name":"libgomp.texi: Clarify that no other OpenMP context selectors are implemented","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com/mbox/"},{"id":148239,"url":"https://patchwork.plctlab.org/api/1.2/patches/148239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004112855.3297083-1-jwakely@redhat.com/","msgid":"<20231004112855.3297083-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-04T11:28:36","name":"[committed,gcc-11] libstdc++: Fix testsuite failures with -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004112855.3297083-1-jwakely@redhat.com/mbox/"},{"id":148286,"url":"https://patchwork.plctlab.org/api/1.2/patches/148286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-2-j@lambda.is/","msgid":"<20231004123921.634024-2-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:01","name":"[01/22] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-2-j@lambda.is/mbox/"},{"id":148279,"url":"https://patchwork.plctlab.org/api/1.2/patches/148279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-3-j@lambda.is/","msgid":"<20231004123921.634024-3-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:02","name":"[02/22] Add \"Condition coverage profiling\" term to --help","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-3-j@lambda.is/mbox/"},{"id":148280,"url":"https://patchwork.plctlab.org/api/1.2/patches/148280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-4-j@lambda.is/","msgid":"<20231004123921.634024-4-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:03","name":"[03/22] Mention relevant flags in condition coverage docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-4-j@lambda.is/mbox/"},{"id":148282,"url":"https://patchwork.plctlab.org/api/1.2/patches/148282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-5-j@lambda.is/","msgid":"<20231004123921.634024-5-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:04","name":"[04/22] Describe, remove ATTRIBUTE_UNUSED from tag_conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-5-j@lambda.is/mbox/"},{"id":148281,"url":"https://patchwork.plctlab.org/api/1.2/patches/148281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-6-j@lambda.is/","msgid":"<20231004123921.634024-6-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:05","name":"[05/22] Describe condition_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-6-j@lambda.is/mbox/"},{"id":148283,"url":"https://patchwork.plctlab.org/api/1.2/patches/148283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-7-j@lambda.is/","msgid":"<20231004123921.634024-7-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:06","name":"[06/22] Use popcount_hwi rather than builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-7-j@lambda.is/mbox/"},{"id":148288,"url":"https://patchwork.plctlab.org/api/1.2/patches/148288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-8-j@lambda.is/","msgid":"<20231004123921.634024-8-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:07","name":"[07/22] Describe add_condition_counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-8-j@lambda.is/mbox/"},{"id":148293,"url":"https://patchwork.plctlab.org/api/1.2/patches/148293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-9-j@lambda.is/","msgid":"<20231004123921.634024-9-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:08","name":"[08/22] Describe output_conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-9-j@lambda.is/mbox/"},{"id":148297,"url":"https://patchwork.plctlab.org/api/1.2/patches/148297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-10-j@lambda.is/","msgid":"<20231004123921.634024-10-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:09","name":"[09/22] Find reachable conditions unbounded by dominators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-10-j@lambda.is/mbox/"},{"id":148284,"url":"https://patchwork.plctlab.org/api/1.2/patches/148284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-11-j@lambda.is/","msgid":"<20231004123921.634024-11-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:10","name":"[10/22] Prune search for boolean expr on goto, return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-11-j@lambda.is/mbox/"},{"id":148299,"url":"https://patchwork.plctlab.org/api/1.2/patches/148299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-12-j@lambda.is/","msgid":"<20231004123921.634024-12-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:11","name":"[11/22] Add test case showing cross-decision fusing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-12-j@lambda.is/mbox/"},{"id":148289,"url":"https://patchwork.plctlab.org/api/1.2/patches/148289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-13-j@lambda.is/","msgid":"<20231004123921.634024-13-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:12","name":"[12/22] Do two-phase filtering in expr isolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-13-j@lambda.is/mbox/"},{"id":148295,"url":"https://patchwork.plctlab.org/api/1.2/patches/148295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-14-j@lambda.is/","msgid":"<20231004123921.634024-14-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:13","name":"[13/22] Handle split-outcome with intrusive flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-14-j@lambda.is/mbox/"},{"id":148298,"url":"https://patchwork.plctlab.org/api/1.2/patches/148298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-15-j@lambda.is/","msgid":"<20231004123921.634024-15-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:14","name":"[14/22] Unify expression candidate set refinement logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-15-j@lambda.is/mbox/"},{"id":148287,"url":"https://patchwork.plctlab.org/api/1.2/patches/148287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-16-j@lambda.is/","msgid":"<20231004123921.634024-16-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:15","name":"[15/22] Fix candidate, neighborhood set reduction phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-16-j@lambda.is/mbox/"},{"id":148285,"url":"https://patchwork.plctlab.org/api/1.2/patches/148285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-17-j@lambda.is/","msgid":"<20231004123921.634024-17-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:16","name":"[16/22] Rename pathological -> setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-17-j@lambda.is/mbox/"},{"id":148301,"url":"https://patchwork.plctlab.org/api/1.2/patches/148301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-18-j@lambda.is/","msgid":"<20231004123921.634024-18-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:17","name":"[17/22] Mark contracted-past nodes in reachable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-18-j@lambda.is/mbox/"},{"id":148290,"url":"https://patchwork.plctlab.org/api/1.2/patches/148290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-19-j@lambda.is/","msgid":"<20231004123921.634024-19-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:18","name":"[18/22] Don'\''t contract into random edge in multi-succ node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-19-j@lambda.is/mbox/"},{"id":148294,"url":"https://patchwork.plctlab.org/api/1.2/patches/148294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-20-j@lambda.is/","msgid":"<20231004123921.634024-20-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:19","name":"[19/22] Beautify assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-20-j@lambda.is/mbox/"},{"id":148296,"url":"https://patchwork.plctlab.org/api/1.2/patches/148296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-21-j@lambda.is/","msgid":"<20231004123921.634024-21-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:20","name":"[20/22] Don'\''t try to reduce NG from dominators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-21-j@lambda.is/mbox/"},{"id":148302,"url":"https://patchwork.plctlab.org/api/1.2/patches/148302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-22-j@lambda.is/","msgid":"<20231004123921.634024-22-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:21","name":"[21/22] Walk the cfg in topological order, not depth-first","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-22-j@lambda.is/mbox/"},{"id":148300,"url":"https://patchwork.plctlab.org/api/1.2/patches/148300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-23-j@lambda.is/","msgid":"<20231004123921.634024-23-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:22","name":"[22/22] Return value on separate line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-23-j@lambda.is/mbox/"},{"id":148355,"url":"https://patchwork.plctlab.org/api/1.2/patches/148355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004150115.221636-1-juzhe.zhong@rivai.ai/","msgid":"<20231004150115.221636-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-04T15:01:15","name":"RISC-V: Remove @ of vec_series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004150115.221636-1-juzhe.zhong@rivai.ai/mbox/"},{"id":148404,"url":"https://patchwork.plctlab.org/api/1.2/patches/148404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004151005.1676194-1-tromey@adacore.com/","msgid":"<20231004151005.1676194-1-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T15:10:05","name":"libstdc++: Correctly call _string_types function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004151005.1676194-1-tromey@adacore.com/mbox/"},{"id":148428,"url":"https://patchwork.plctlab.org/api/1.2/patches/148428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-2-tromey@adacore.com/","msgid":"<20231004165832.1750191-2-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T16:58:31","name":"[RFC,1/2] libstdc++: Use '\''black'\'' and '\''isort'\'' in pretty printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-2-tromey@adacore.com/mbox/"},{"id":148424,"url":"https://patchwork.plctlab.org/api/1.2/patches/148424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-3-tromey@adacore.com/","msgid":"<20231004165832.1750191-3-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T16:58:32","name":"[RFC,2/2] libstdc++: Add flake8 configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-3-tromey@adacore.com/mbox/"},{"id":148526,"url":"https://patchwork.plctlab.org/api/1.2/patches/148526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170455.76C1A2043D@pchp3.se.axis.com/","msgid":"<20231004170455.76C1A2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T17:04:55","name":"[v2,1/2] testsuite: Add dg-require-atomic-cmpxchg-word","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170455.76C1A2043D@pchp3.se.axis.com/mbox/"},{"id":148465,"url":"https://patchwork.plctlab.org/api/1.2/patches/148465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170816.CAD8D20424@pchp3.se.axis.com/","msgid":"<20231004170816.CAD8D20424@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T17:08:16","name":"[v2,2/2] testsuite: Replace many dg-require-thread-fence with dg-require-atomic-cmpxchg-word","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170816.CAD8D20424@pchp3.se.axis.com/mbox/"},{"id":148448,"url":"https://patchwork.plctlab.org/api/1.2/patches/148448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004183004.29161-1-bshanks@codeweavers.com/","msgid":"<20231004183004.29161-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-10-04T18:28:28","name":"[v3] libiberty: Use posix_spawn in pex-unix when available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004183004.29161-1-bshanks@codeweavers.com/mbox/"},{"id":148568,"url":"https://patchwork.plctlab.org/api/1.2/patches/148568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004192318.769779-1-ppalka@redhat.com/","msgid":"<20231004192318.769779-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-04T19:23:18","name":"[2/1] c++: rename tsubst_copy_and_build and tsubst_expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004192318.769779-1-ppalka@redhat.com/mbox/"},{"id":148585,"url":"https://patchwork.plctlab.org/api/1.2/patches/148585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004215742.929536-1-patrick@rivosinc.com/","msgid":"<20231004215742.929536-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-04T21:57:42","name":"RISC-V: xfail gcc.dg/pr90263.c for riscv_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004215742.929536-1-patrick@rivosinc.com/mbox/"},{"id":148605,"url":"https://patchwork.plctlab.org/api/1.2/patches/148605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com/","msgid":"<012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-04T22:19:33","name":"Support g++ 4.8 as a host compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com/mbox/"},{"id":148641,"url":"https://patchwork.plctlab.org/api/1.2/patches/148641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004225527.930610-1-patrick@rivosinc.com/","msgid":"<20231004225527.930610-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-04T22:55:27","name":"[v2] RISC-V: Test memcpy inlined on riscv_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004225527.930610-1-patrick@rivosinc.com/mbox/"},{"id":148672,"url":"https://patchwork.plctlab.org/api/1.2/patches/148672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-1-guojiufu@linux.ibm.com/","msgid":"<20231005041346.3625108-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T04:13:45","name":"[V5,1/2] rs6000: optimize moving to sf from highpart di","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-1-guojiufu@linux.ibm.com/mbox/"},{"id":148671,"url":"https://patchwork.plctlab.org/api/1.2/patches/148671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-2-guojiufu@linux.ibm.com/","msgid":"<20231005041346.3625108-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T04:13:46","name":"[V5,2/2] rs6000: use mtvsrws to move sf from si p9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-2-guojiufu@linux.ibm.com/mbox/"},{"id":148673,"url":"https://patchwork.plctlab.org/api/1.2/patches/148673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005064628.458478-1-stefansf@linux.ibm.com/","msgid":"<20231005064628.458478-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T06:46:28","name":"s390: Make use of new copysign RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005064628.458478-1-stefansf@linux.ibm.com/mbox/"},{"id":148674,"url":"https://patchwork.plctlab.org/api/1.2/patches/148674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005082559.8C3A83857C66@sourceware.org/","msgid":"<20231005082559.8C3A83857C66@sourceware.org>","list_archive_url":null,"date":"2023-10-05T08:25:06","name":"Avoid left around copies when value-numbering BBs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005082559.8C3A83857C66@sourceware.org/mbox/"},{"id":148676,"url":"https://patchwork.plctlab.org/api/1.2/patches/148676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com/","msgid":"<00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-05T09:06:33","name":"[X86] Split lea into shorter left shift by 2 or 3 bits with -Oz.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com/mbox/"},{"id":148677,"url":"https://patchwork.plctlab.org/api/1.2/patches/148677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005113731.454013856DD0@sourceware.org/","msgid":"<20231005113731.454013856DD0@sourceware.org>","list_archive_url":null,"date":"2023-10-05T11:37:06","name":"Fix SIMD call SLP discovery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005113731.454013856DD0@sourceware.org/mbox/"},{"id":148678,"url":"https://patchwork.plctlab.org/api/1.2/patches/148678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-1-claziss@gmail.com/","msgid":"<20231005114345.1707504-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:41","name":"[committed,1/5] arc: Remove unused/incomplete alignment assembly annotation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-1-claziss@gmail.com/mbox/"},{"id":148679,"url":"https://patchwork.plctlab.org/api/1.2/patches/148679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-2-claziss@gmail.com/","msgid":"<20231005114345.1707504-2-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:42","name":"[committed,2/5] arc: Update/remove ARC specific tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-2-claziss@gmail.com/mbox/"},{"id":148680,"url":"https://patchwork.plctlab.org/api/1.2/patches/148680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-3-claziss@gmail.com/","msgid":"<20231005114345.1707504-3-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:43","name":"[committed,3/5] arc: Remove '\''^'\'' print punct character","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-3-claziss@gmail.com/mbox/"},{"id":148682,"url":"https://patchwork.plctlab.org/api/1.2/patches/148682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-4-claziss@gmail.com/","msgid":"<20231005114345.1707504-4-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:44","name":"[committed,4/5] arc: Remove obsolete ccfsm instruction predication mechanism","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-4-claziss@gmail.com/mbox/"},{"id":148681,"url":"https://patchwork.plctlab.org/api/1.2/patches/148681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-5-claziss@gmail.com/","msgid":"<20231005114345.1707504-5-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:45","name":"[committed,5/5] arc: Update tests predicates when using linux toolchain.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-5-claziss@gmail.com/mbox/"},{"id":148683,"url":"https://patchwork.plctlab.org/api/1.2/patches/148683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005115500.9B1F333EA4@hamza.pair.com/","msgid":"<20231005115500.9B1F333EA4@hamza.pair.com>","list_archive_url":null,"date":"2023-10-05T11:54:58","name":"[pushed] wwwdocs: conduct: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005115500.9B1F333EA4@hamza.pair.com/mbox/"},{"id":148684,"url":"https://patchwork.plctlab.org/api/1.2/patches/148684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edi9i8jw.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T11:59:47","name":"Revert \"ipa: Self-DCE of uses of removed call LHSs (PR 108007)\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edi9i8jw.fsf@suse.cz/mbox/"},{"id":148685,"url":"https://patchwork.plctlab.org/api/1.2/patches/148685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f78f2739548afede5888c2b9f91b82eb2f151e93.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[1/3] ipa-cp: Templatize filtering of m_agg_values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f78f2739548afede5888c2b9f91b82eb2f151e93.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148687,"url":"https://patchwork.plctlab.org/api/1.2/patches/148687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5e5ac1cac6611bdf4873011582c63347ee62fe1.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[2/3] ipa: Prune any IPA-CP aggregate constants known by modref to be killed (111157)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5e5ac1cac6611bdf4873011582c63347ee62fe1.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148686,"url":"https://patchwork.plctlab.org/api/1.2/patches/148686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dce484200c834821ecf57f8fe1b4610e8e64b841.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[3/3] ipa: Limit pruning of IPA-CP aggregate constants if there are loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dce484200c834821ecf57f8fe1b4610e8e64b841.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148688,"url":"https://patchwork.plctlab.org/api/1.2/patches/148688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6rbAKYvtP+kIzu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:26:20","name":"ipa: Remove ipa_bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6rbAKYvtP+kIzu@tucnak/mbox/"},{"id":148689,"url":"https://patchwork.plctlab.org/api/1.2/patches/148689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6sokqvC68SZNrT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:31:30","name":"[committed] sreal: Fix typo in function name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6sokqvC68SZNrT@tucnak/mbox/"},{"id":148691,"url":"https://patchwork.plctlab.org/api/1.2/patches/148691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de/","msgid":"<8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de>","list_archive_url":null,"date":"2023-10-05T13:05:49","name":"[avr,committed] Use monic denominator polynomials to save a multiplication.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de/mbox/"},{"id":148692,"url":"https://patchwork.plctlab.org/api/1.2/patches/148692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR62FFoMl3B8i88F@nz/","msgid":"","list_archive_url":null,"date":"2023-10-05T13:11:48","name":"[v4] ipa-utils: avoid uninitialized probabilities on ICF [PR111559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR62FFoMl3B8i88F@nz/mbox/"},{"id":148693,"url":"https://patchwork.plctlab.org/api/1.2/patches/148693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de/","msgid":"<8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de>","list_archive_url":null,"date":"2023-10-05T13:29:48","name":"[avr,committed] Remove all uses of attribute pure from LibF7.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de/mbox/"},{"id":148716,"url":"https://patchwork.plctlab.org/api/1.2/patches/148716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005141023.1835802-1-j@lambda.is/","msgid":"<20231005141023.1835802-1-j@lambda.is>","list_archive_url":null,"date":"2023-10-05T14:10:23","name":"[v5] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005141023.1835802-1-j@lambda.is/mbox/"},{"id":148799,"url":"https://patchwork.plctlab.org/api/1.2/patches/148799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR7SBqJieJmTt5PG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T15:11:02","name":"[RFC] > WIDE_INT_MAX_PREC support in wide_int and widest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR7SBqJieJmTt5PG@tucnak/mbox/"},{"id":148813,"url":"https://patchwork.plctlab.org/api/1.2/patches/148813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bZgF-8HFxiU18ouCv7SCgSkks2XP2xnwiz=h+WB8AmvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T15:45:34","name":"[COMMITTED] i386: Improve memory copy from named address space [PR111657]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bZgF-8HFxiU18ouCv7SCgSkks2XP2xnwiz=h+WB8AmvQ@mail.gmail.com/mbox/"},{"id":148815,"url":"https://patchwork.plctlab.org/api/1.2/patches/148815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005154745.2663497-1-andrea.corallo@arm.com/","msgid":"<20231005154745.2663497-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-10-05T15:47:45","name":"[committed] contrib: add mdcompact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005154745.2663497-1-andrea.corallo@arm.com/mbox/"},{"id":148852,"url":"https://patchwork.plctlab.org/api/1.2/patches/148852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-2-siddhesh@gotplt.org/","msgid":"<20231005160516.13565-2-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-10-05T16:05:15","name":"[committed,1/2] secpol: add grammatically missing commas / remove one excess instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-2-siddhesh@gotplt.org/mbox/"},{"id":148854,"url":"https://patchwork.plctlab.org/api/1.2/patches/148854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-3-siddhesh@gotplt.org/","msgid":"<20231005160516.13565-3-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-10-05T16:05:16","name":"[committed,2/2] secpol: consistent indentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-3-siddhesh@gotplt.org/mbox/"},{"id":148976,"url":"https://patchwork.plctlab.org/api/1.2/patches/148976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com/","msgid":"<1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com>","list_archive_url":null,"date":"2023-10-05T17:03:36","name":"[_GLIBCXX_INLINE_VERSION] Add missing symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com/mbox/"},{"id":148958,"url":"https://patchwork.plctlab.org/api/1.2/patches/148958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com/","msgid":"<024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com>","list_archive_url":null,"date":"2023-10-05T17:34:03","name":"libgomp.texi: Document some of the device-memory routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com/mbox/"},{"id":148973,"url":"https://patchwork.plctlab.org/api/1.2/patches/148973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17810-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:20:03","name":"middle-end ifcvt: Allow any const IFN in conditional blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17810-tamar@arm.com/mbox/"},{"id":148974,"url":"https://patchwork.plctlab.org/api/1.2/patches/148974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17811-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:20:43","name":"AArch64 Handle copysign (x, -1) expansion efficiently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17811-tamar@arm.com/mbox/"},{"id":148977,"url":"https://patchwork.plctlab.org/api/1.2/patches/148977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17809-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:21:21","name":"middle-end ifcvt: Add support for conditional copysign","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17809-tamar@arm.com/mbox/"},{"id":148978,"url":"https://patchwork.plctlab.org/api/1.2/patches/148978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17812-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:21:55","name":"AArch64 Add SVE implementation for cond_copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17812-tamar@arm.com/mbox/"},{"id":148991,"url":"https://patchwork.plctlab.org/api/1.2/patches/148991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com/","msgid":"<490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com>","list_archive_url":null,"date":"2023-10-05T19:04:37","name":"[COMMITTED,1/3] Add outgoing range vector calculation API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com/mbox/"},{"id":148990,"url":"https://patchwork.plctlab.org/api/1.2/patches/148990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffda943e-6747-240c-8e45-ccbf24bf0783@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T19:04:45","name":"[COMMITTED,2/3] Add a dom based ranger for fast VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffda943e-6747-240c-8e45-ccbf24bf0783@redhat.com/mbox/"},{"id":148992,"url":"https://patchwork.plctlab.org/api/1.2/patches/148992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef20c273-c1a9-f145-6097-305d72bac940@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T19:04:58","name":"[COMMITTED,3/3] Create a fast VRP pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef20c273-c1a9-f145-6097-305d72bac940@redhat.com/mbox/"},{"id":149022,"url":"https://patchwork.plctlab.org/api/1.2/patches/149022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR8ZiMdxwDS6cRJ0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-05T20:16:08","name":"[committed] hppa: Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR8ZiMdxwDS6cRJ0@mx3210.localdomain/mbox/"},{"id":149057,"url":"https://patchwork.plctlab.org/api/1.2/patches/149057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005231446.400239-1-pinskia@gmail.com/","msgid":"<20231005231446.400239-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-05T23:14:46","name":"MATCH: Fix infinite loop between `vec_cond(vec_cond(a, b, 0), c, d)` and `a & b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005231446.400239-1-pinskia@gmail.com/mbox/"},{"id":149063,"url":"https://patchwork.plctlab.org/api/1.2/patches/149063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005234552.954487-1-patrick@rivosinc.com/","msgid":"<20231005234552.954487-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-05T23:45:52","name":"[v2] RISC-V: Use stdint-gcc.h in rvv testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005234552.954487-1-patrick@rivosinc.com/mbox/"},{"id":149087,"url":"https://patchwork.plctlab.org/api/1.2/patches/149087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006023847.428045-1-pan2.li@intel.com/","msgid":"<20231006023847.428045-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-06T02:38:47","name":"[v1] RISC-V: Update comments for FP rounding related autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006023847.428045-1-pan2.li@intel.com/mbox/"},{"id":149145,"url":"https://patchwork.plctlab.org/api/1.2/patches/149145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006074530.465276-2-stefansf@linux.ibm.com/","msgid":"<20231006074530.465276-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-06T07:45:31","name":"combine: Fix handling of unsigned constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006074530.465276-2-stefansf@linux.ibm.com/mbox/"},{"id":149165,"url":"https://patchwork.plctlab.org/api/1.2/patches/149165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-2-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:44","name":"[1/3,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-2-Ezra.Sitorus@arm.com/mbox/"},{"id":149166,"url":"https://patchwork.plctlab.org/api/1.2/patches/149166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-3-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:45","name":"[2/3,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-3-Ezra.Sitorus@arm.com/mbox/"},{"id":149167,"url":"https://patchwork.plctlab.org/api/1.2/patches/149167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-4-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:46","name":"[3/3,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-4-Ezra.Sitorus@arm.com/mbox/"},{"id":149208,"url":"https://patchwork.plctlab.org/api/1.2/patches/149208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-2-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:55:58","name":"[1/3,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-2-Ezra.Sitorus@arm.com/mbox/"},{"id":149209,"url":"https://patchwork.plctlab.org/api/1.2/patches/149209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-3-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:55:59","name":"[2/3,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-3-Ezra.Sitorus@arm.com/mbox/"},{"id":149210,"url":"https://patchwork.plctlab.org/api/1.2/patches/149210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-4-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:56:00","name":"[3/3,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-4-Ezra.Sitorus@arm.com/mbox/"},{"id":149243,"url":"https://patchwork.plctlab.org/api/1.2/patches/149243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com/","msgid":"<8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T13:18:14","name":"[committed] amdgcn: silence warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com/mbox/"},{"id":149270,"url":"https://patchwork.plctlab.org/api/1.2/patches/149270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006140501.3370874-3-arsen@aarsen.me/","msgid":"<20231006140501.3370874-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-10-06T13:50:26","name":"[v2,2/2] *: add modern gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006140501.3370874-3-arsen@aarsen.me/mbox/"},{"id":149271,"url":"https://patchwork.plctlab.org/api/1.2/patches/149271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86070729-25e3-4425-9092-f0f678440825@codesourcery.com/","msgid":"<86070729-25e3-4425-9092-f0f678440825@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T14:11:46","name":"[committed] amdgcn: switch mov insns to compact syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86070729-25e3-4425-9092-f0f678440825@codesourcery.com/mbox/"},{"id":149329,"url":"https://patchwork.plctlab.org/api/1.2/patches/149329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006161555.2222785-1-sandra@codesourcery.com/","msgid":"<20231006161555.2222785-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T16:15:55","name":"[COMMITTED] Docs: Minimally document standard C/C++ attribute syntax.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006161555.2222785-1-sandra@codesourcery.com/mbox/"},{"id":149365,"url":"https://patchwork.plctlab.org/api/1.2/patches/149365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSBGwlLkLAukQYTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-06T17:41:22","name":"[RFC] > WIDE_INT_MAX_PREC support in wide_int and widest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSBGwlLkLAukQYTu@tucnak/mbox/"},{"id":149375,"url":"https://patchwork.plctlab.org/api/1.2/patches/149375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006174954.392381-1-vineetg@rivosinc.com/","msgid":"<20231006174954.392381-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-06T17:49:54","name":"[v2] RISC-V: const: hide mvconst splitter from IRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006174954.392381-1-vineetg@rivosinc.com/mbox/"},{"id":149377,"url":"https://patchwork.plctlab.org/api/1.2/patches/149377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006182250.393162-1-vineetg@rivosinc.com/","msgid":"<20231006182250.393162-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-06T18:22:50","name":"[COMMITTED] RISC-V: const: hide mvconst splitter from IRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006182250.393162-1-vineetg@rivosinc.com/mbox/"},{"id":149435,"url":"https://patchwork.plctlab.org/api/1.2/patches/149435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ab7a8fa-f054-4fbe-9f1c-b94e11b2a38d-1696624686073@3c-app-gmx-bap40/","msgid":"","list_archive_url":null,"date":"2023-10-06T20:38:06","name":"fortran: fix handling of options -ffpe-trap and -ffpe-summary [PR110957]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ab7a8fa-f054-4fbe-9f1c-b94e11b2a38d-1696624686073@3c-app-gmx-bap40/mbox/"},{"id":149489,"url":"https://patchwork.plctlab.org/api/1.2/patches/149489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007031818.793-1-xuli1@eswincomputing.com/","msgid":"<20231007031818.793-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-10-07T03:18:18","name":"RISC-V: Fix scan-assembler-times of RVV test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007031818.793-1-xuli1@eswincomputing.com/mbox/"},{"id":149504,"url":"https://patchwork.plctlab.org/api/1.2/patches/149504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007044943.4153909-1-pan2.li@intel.com/","msgid":"<20231007044943.4153909-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-07T04:49:43","name":"[v1] RISC-V: Bugfix for legitimize address PR/111634","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007044943.4153909-1-pan2.li@intel.com/mbox/"},{"id":149508,"url":"https://patchwork.plctlab.org/api/1.2/patches/149508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007062530.20048-1-pan2.li@intel.com/","msgid":"<20231007062530.20048-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-07T06:25:30","name":"[v1] RISC-V: Add more run test for FP rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007062530.20048-1-pan2.li@intel.com/mbox/"},{"id":149509,"url":"https://patchwork.plctlab.org/api/1.2/patches/149509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007063452.3605029-1-haochen.jiang@intel.com/","msgid":"<20231007063452.3605029-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-07T06:34:52","name":"[v2,01/18] Initial support for -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007063452.3605029-1-haochen.jiang@intel.com/mbox/"},{"id":149511,"url":"https://patchwork.plctlab.org/api/1.2/patches/149511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef21a10b-4b6f-b195-d1df-c2d8c43cce33@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T06:42:50","name":"[v1] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef21a10b-4b6f-b195-d1df-c2d8c43cce33@linux.ibm.com/mbox/"},{"id":149516,"url":"https://patchwork.plctlab.org/api/1.2/patches/149516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007070458.460506-1-juzhe.zhong@rivai.ai/","msgid":"<20231007070458.460506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T07:04:58","name":"RISC-V: Enable more tests of \"vect\" for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007070458.460506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149542,"url":"https://patchwork.plctlab.org/api/1.2/patches/149542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007085012.3852069-3-yangyujie@loongson.cn/","msgid":"<20231007085012.3852069-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-10-07T08:50:14","name":"LoongArch: Adjust makefile dependency for loongarch headers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007085012.3852069-3-yangyujie@loongson.cn/mbox/"},{"id":149543,"url":"https://patchwork.plctlab.org/api/1.2/patches/149543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007092331.2590950-1-juzhe.zhong@rivai.ai/","msgid":"<20231007092331.2590950-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T09:23:31","name":"TEST: Fix XPASS of TSVC testsuites for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007092331.2590950-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149552,"url":"https://patchwork.plctlab.org/api/1.2/patches/149552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007113225.3196037-1-yanzhang.wang@intel.com/","msgid":"<20231007113225.3196037-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-10-07T11:32:25","name":"RISC-V: add static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007113225.3196037-1-yanzhang.wang@intel.com/mbox/"},{"id":149557,"url":"https://patchwork.plctlab.org/api/1.2/patches/149557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007114543.2455622-1-juzhe.zhong@rivai.ai/","msgid":"<20231007114543.2455622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T11:45:43","name":"TEST: Fix vect_cond_arith_* dump checks for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007114543.2455622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149594,"url":"https://patchwork.plctlab.org/api/1.2/patches/149594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ced6c74e-f5ac-4b8e-b702-501596e91a03@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T15:40:10","name":"Fortran/OpenMP: Fix handling of strictly structured blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ced6c74e-f5ac-4b8e-b702-501596e91a03@codesourcery.com/mbox/"},{"id":149638,"url":"https://patchwork.plctlab.org/api/1.2/patches/149638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef0c54a5-c35c-3519-f062-9ac78ee66b81@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T19:04:27","name":"[v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef0c54a5-c35c-3519-f062-9ac78ee66b81@linux.ibm.com/mbox/"},{"id":149666,"url":"https://patchwork.plctlab.org/api/1.2/patches/149666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008013346.2374788-1-juzhe.zhong@rivai.ai/","msgid":"<20231008013346.2374788-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T01:33:46","name":"[V2] TEST: Fix vect_cond_arith_* dump checks for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008013346.2374788-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149670,"url":"https://patchwork.plctlab.org/api/1.2/patches/149670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008015408.2865454-1-hongyu.wang@intel.com/","msgid":"<20231008015408.2865454-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-08T01:54:08","name":"[i386] Fix apx test fails on 32bit target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008015408.2865454-1-hongyu.wang@intel.com/mbox/"},{"id":149675,"url":"https://patchwork.plctlab.org/api/1.2/patches/149675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-1-hongtao.liu@intel.com/","msgid":"<20231008022727.2896829-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-08T02:27:26","name":"[1/2,x86] Support smin/smax for V2HF/V4HF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-1-hongtao.liu@intel.com/mbox/"},{"id":149676,"url":"https://patchwork.plctlab.org/api/1.2/patches/149676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-2-hongtao.liu@intel.com/","msgid":"<20231008022727.2896829-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-08T02:27:27","name":"[2/2] Support signbit/xorsign/copysign/abs/neg/and/xor/ior/andn for V2HF/V4HF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-2-hongtao.liu@intel.com/mbox/"},{"id":149697,"url":"https://patchwork.plctlab.org/api/1.2/patches/149697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008072147.3030011-1-juzhe.zhong@rivai.ai/","msgid":"<20231008072147.3030011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T07:21:47","name":"RISC-V: Support movmisalign of RVV VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008072147.3030011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149707,"url":"https://patchwork.plctlab.org/api/1.2/patches/149707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008082005.3410115-1-juzhe.zhong@rivai.ai/","msgid":"<20231008082005.3410115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T08:20:05","name":"TEST: Fix dump FAIL for RVV (RISCV-V vector)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008082005.3410115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149735,"url":"https://patchwork.plctlab.org/api/1.2/patches/149735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008113531.3905091-1-juzhe.zhong@rivai.ai/","msgid":"<20231008113531.3905091-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T11:35:31","name":"TEST: Fix dump FAIL of vect-multitypes-16.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008113531.3905091-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149736,"url":"https://patchwork.plctlab.org/api/1.2/patches/149736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008120257.4184631-1-juzhe.zhong@rivai.ai/","msgid":"<20231008120257.4184631-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T12:02:57","name":"TEST: Fix dump FAIL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008120257.4184631-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149737,"url":"https://patchwork.plctlab.org/api/1.2/patches/149737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008123106.412529-1-juzhe.zhong@rivai.ai/","msgid":"<20231008123106.412529-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T12:31:06","name":"TEST: Fix XPASS of outer loop vectorization tests for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008123106.412529-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149745,"url":"https://patchwork.plctlab.org/api/1.2/patches/149745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8cddbaa-9a23-41dc-860b-f162f26e94ce@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-08T13:13:02","name":"openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8cddbaa-9a23-41dc-860b-f162f26e94ce@codesourcery.com/mbox/"},{"id":149770,"url":"https://patchwork.plctlab.org/api/1.2/patches/149770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com/","msgid":"<002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-08T19:07:11","name":"[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com/mbox/"},{"id":149779,"url":"https://patchwork.plctlab.org/api/1.2/patches/149779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225837.783598-1-dmalcolm@redhat.com/","msgid":"<20231008225837.783598-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:37","name":"[pushed] diagnostics: fix ICE on sarif output when source file is unreadable [PR111700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225837.783598-1-dmalcolm@redhat.com/mbox/"},{"id":149780,"url":"https://patchwork.plctlab.org/api/1.2/patches/149780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225843.783633-1-dmalcolm@redhat.com/","msgid":"<20231008225843.783633-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:43","name":"[pushed] libcpp: \"const\" and other cleanups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225843.783633-1-dmalcolm@redhat.com/mbox/"},{"id":149781,"url":"https://patchwork.plctlab.org/api/1.2/patches/149781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225848.783654-1-dmalcolm@redhat.com/","msgid":"<20231008225848.783654-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:48","name":"[pushed] libcpp: eliminate COMBINE_LOCATION_DATA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225848.783654-1-dmalcolm@redhat.com/mbox/"},{"id":149784,"url":"https://patchwork.plctlab.org/api/1.2/patches/149784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225854.783706-1-dmalcolm@redhat.com/","msgid":"<20231008225854.783706-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:54","name":"[pushed] analyzer: improvements to out-of-bounds diagrams [PR111155]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225854.783706-1-dmalcolm@redhat.com/mbox/"},{"id":149782,"url":"https://patchwork.plctlab.org/api/1.2/patches/149782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225859.783728-1-dmalcolm@redhat.com/","msgid":"<20231008225859.783728-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:59","name":"[pushed] libcpp: eliminate LINEMAPS_LAST_ALLOCATED{, _ORDINARY, _MACRO}_MAP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225859.783728-1-dmalcolm@redhat.com/mbox/"},{"id":149783,"url":"https://patchwork.plctlab.org/api/1.2/patches/149783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225903.783838-1-dmalcolm@redhat.com/","msgid":"<20231008225903.783838-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:59:03","name":"[pushed] libcpp: eliminate LINEMAPS_{,ORDINARY_,MACRO_}CACHE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225903.783838-1-dmalcolm@redhat.com/mbox/"},{"id":149785,"url":"https://patchwork.plctlab.org/api/1.2/patches/149785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225908.783859-1-dmalcolm@redhat.com/","msgid":"<20231008225908.783859-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:59:08","name":"[pushed] libcpp: eliminate LINEMAPS_{ORDINARY,MACRO}_MAPS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225908.783859-1-dmalcolm@redhat.com/mbox/"},{"id":149804,"url":"https://patchwork.plctlab.org/api/1.2/patches/149804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65235160.170a0220.4cbca.5c7d@mx.google.com/","msgid":"<65235160.170a0220.4cbca.5c7d@mx.google.com>","list_archive_url":null,"date":"2023-10-09T01:03:23","name":"[v4] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65235160.170a0220.4cbca.5c7d@mx.google.com/mbox/"},{"id":149806,"url":"https://patchwork.plctlab.org/api/1.2/patches/149806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009020303.929293-1-hongyu.wang@intel.com/","msgid":"<20231009020303.929293-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-09T02:03:03","name":"[i386] APX EGPR: fix missing pattern that prohibits egpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009020303.929293-1-hongyu.wang@intel.com/mbox/"},{"id":149810,"url":"https://patchwork.plctlab.org/api/1.2/patches/149810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009022928.1499099-1-hongyu.wang@intel.com/","msgid":"<20231009022928.1499099-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-09T02:29:28","name":"[i386] APX EGPR: fix missing pattern that prohibits egpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009022928.1499099-1-hongyu.wang@intel.com/mbox/"},{"id":149811,"url":"https://patchwork.plctlab.org/api/1.2/patches/149811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com/","msgid":"<8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com>","list_archive_url":null,"date":"2023-10-09T02:30:15","name":"[PATCH-1,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com/mbox/"},{"id":149812,"url":"https://patchwork.plctlab.org/api/1.2/patches/149812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa42d6bc-151e-515b-81a6-d08925c047ac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-09T02:30:38","name":"[PATCH-2,rs6000] Enable vector mode for memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa42d6bc-151e-515b-81a6-d08925c047ac@linux.ibm.com/mbox/"},{"id":149878,"url":"https://patchwork.plctlab.org/api/1.2/patches/149878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009085135.2038604-1-pan2.li@intel.com/","msgid":"<20231009085135.2038604-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-09T08:51:35","name":"[v1] RISC-V: Refine bswap16 auto vectorization code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009085135.2038604-1-pan2.li@intel.com/mbox/"},{"id":149920,"url":"https://patchwork.plctlab.org/api/1.2/patches/149920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6523cffe.170a0220.653b.72b9@mx.google.com/","msgid":"<6523cffe.170a0220.653b.72b9@mx.google.com>","list_archive_url":null,"date":"2023-10-09T10:03:36","name":"c++: Improve diagnostics for constexpr cast from void*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6523cffe.170a0220.653b.72b9@mx.google.com/mbox/"},{"id":149944,"url":"https://patchwork.plctlab.org/api/1.2/patches/149944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSPcBmLxejYfgyGq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-09T10:55:02","name":"wide-int: Allow up to 16320 bits wide_int and change widest_int precision to 32640 bits [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSPcBmLxejYfgyGq@tucnak/mbox/"},{"id":149951,"url":"https://patchwork.plctlab.org/api/1.2/patches/149951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009111403.221E8385B53E@sourceware.org/","msgid":"<20231009111403.221E8385B53E@sourceware.org>","list_archive_url":null,"date":"2023-10-09T11:13:38","name":"tree-optimization/111715 - improve TBAA for access paths with pun","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009111403.221E8385B53E@sourceware.org/mbox/"},{"id":149991,"url":"https://patchwork.plctlab.org/api/1.2/patches/149991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009120707.2746-1-juzhe.zhong@rivai.ai/","msgid":"<20231009120707.2746-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T12:07:07","name":"[V2] RISC-V: Support movmisalign of RVV VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009120707.2746-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150036,"url":"https://patchwork.plctlab.org/api/1.2/patches/150036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009122451.8478-1-juzhe.zhong@rivai.ai/","msgid":"<20231009122451.8478-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T12:24:51","name":"RISC-V Regression test: Fix FAIL of fast-math-slp-38.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009122451.8478-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150076,"url":"https://patchwork.plctlab.org/api/1.2/patches/150076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130218.20525-1-juzhe.zhong@rivai.ai/","msgid":"<20231009130218.20525-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:02:18","name":"RISC-V Regression test: Fix FAIL of pr45752.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130218.20525-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150087,"url":"https://patchwork.plctlab.org/api/1.2/patches/150087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130929.2237485-1-pan2.li@intel.com/","msgid":"<20231009130929.2237485-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-09T13:09:29","name":"[v2] RISC-V: Refine bswap16 auto vectorization code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130929.2237485-1-pan2.li@intel.com/mbox/"},{"id":150101,"url":"https://patchwork.plctlab.org/api/1.2/patches/150101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009131530.24496-1-juzhe.zhong@rivai.ai/","msgid":"<20231009131530.24496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:15:30","name":"RISC-V Regression tests: Fix FAIL of pr97832* for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009131530.24496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150102,"url":"https://patchwork.plctlab.org/api/1.2/patches/150102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133508.28747-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133508.28747-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:35:08","name":"RISC-V Regression test: Fix FAIL of slp-12a.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133508.28747-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150104,"url":"https://patchwork.plctlab.org/api/1.2/patches/150104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133707.29265-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133707.29265-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:37:07","name":"RISC-V Regression test: Adapt SLP tests like ARM SVE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133707.29265-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150110,"url":"https://patchwork.plctlab.org/api/1.2/patches/150110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133925.29739-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133925.29739-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:39:25","name":"RISC-V Regression test: Fix slp-perm-4.c FAIL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133925.29739-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150111,"url":"https://patchwork.plctlab.org/api/1.2/patches/150111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009134123.30601-1-juzhe.zhong@rivai.ai/","msgid":"<20231009134123.30601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:41:23","name":"RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009134123.30601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150135,"url":"https://patchwork.plctlab.org/api/1.2/patches/150135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSQVTcoN+gxgCJCF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-09T14:59:25","name":"wide-int: Remove rwide_int, introduce dw_wide_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSQVTcoN+gxgCJCF@tucnak/mbox/"},{"id":150136,"url":"https://patchwork.plctlab.org/api/1.2/patches/150136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009145957.51655-1-juzhe.zhong@rivai.ai/","msgid":"<20231009145957.51655-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T14:59:57","name":"TEST: Add vectorization check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009145957.51655-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150216,"url":"https://patchwork.plctlab.org/api/1.2/patches/150216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com/","msgid":"<05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com>","list_archive_url":null,"date":"2023-10-09T17:10:28","name":"[COMMITTED] Remove unused get_identity_relation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com/mbox/"},{"id":150217,"url":"https://patchwork.plctlab.org/api/1.2/patches/150217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com/","msgid":"<21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com>","list_archive_url":null,"date":"2023-10-09T17:10:35","name":"[COMMITTED] PR tree-optimization/111694 - Ensure float equivalences include + and - zero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com/mbox/"},{"id":150328,"url":"https://patchwork.plctlab.org/api/1.2/patches/150328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009210250.947831-1-ewlu@rivosinc.com/","msgid":"<20231009210250.947831-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-10-09T21:02:09","name":"[RFC] RISC-V: Handle new types in scheduling descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009210250.947831-1-ewlu@rivosinc.com/mbox/"},{"id":150360,"url":"https://patchwork.plctlab.org/api/1.2/patches/150360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009212751.474885-1-pinskia@gmail.com/","msgid":"<20231009212751.474885-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-09T21:27:51","name":"MATCH: [PR111679] Add alternative simplification of `a | ((~a) ^ b)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009212751.474885-1-pinskia@gmail.com/mbox/"},{"id":150369,"url":"https://patchwork.plctlab.org/api/1.2/patches/150369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310092151030.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-10-09T21:52:59","name":"RISC-V/testsuite: Enable `vect_pack_trunc'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310092151030.5892@tpp.orcam.me.uk/mbox/"},{"id":150379,"url":"https://patchwork.plctlab.org/api/1.2/patches/150379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009224711.1105509-1-christoph.muellner@vrull.eu/","msgid":"<20231009224711.1105509-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-09T22:47:11","name":"RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009224711.1105509-1-christoph.muellner@vrull.eu/mbox/"},{"id":150418,"url":"https://patchwork.plctlab.org/api/1.2/patches/150418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009232326.91336-1-juzhe.zhong@rivai.ai/","msgid":"<20231009232326.91336-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T23:23:26","name":"RISC-V: Add available vector size for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009232326.91336-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150433,"url":"https://patchwork.plctlab.org/api/1.2/patches/150433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010011638.103019-1-juzhe.zhong@rivai.ai/","msgid":"<20231010011638.103019-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T01:16:38","name":"RISC-V Regression: Fix dump check of bb-slp-68.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010011638.103019-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150439,"url":"https://patchwork.plctlab.org/api/1.2/patches/150439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010013904.105336-1-juzhe.zhong@rivai.ai/","msgid":"<20231010013904.105336-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T01:39:04","name":"RISC-V Regression: Fix FAIL of bb-slp-pr65935.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010013904.105336-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150447,"url":"https://patchwork.plctlab.org/api/1.2/patches/150447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010021840.3443697-1-guojiufu@linux.ibm.com/","msgid":"<20231010021840.3443697-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-10T02:18:39","name":"[V1] introduce light expander sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010021840.3443697-1-guojiufu@linux.ibm.com/mbox/"},{"id":150450,"url":"https://patchwork.plctlab.org/api/1.2/patches/150450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010024742.3092307-1-juzhe.zhong@rivai.ai/","msgid":"<20231010024742.3092307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T02:47:42","name":"RISC-V Regression: Make match patterns more accurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010024742.3092307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150451,"url":"https://patchwork.plctlab.org/api/1.2/patches/150451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025311.3642757-1-guojiufu@linux.ibm.com/","msgid":"<20231010025311.3642757-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-10T02:53:11","name":"use get_range_query to replace get_global_range_query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025311.3642757-1-guojiufu@linux.ibm.com/mbox/"},{"id":150452,"url":"https://patchwork.plctlab.org/api/1.2/patches/150452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025835.3109227-1-juzhe.zhong@rivai.ai/","msgid":"<20231010025835.3109227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T02:58:35","name":"RISC-V Regression: Fix FAIL of predcom-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025835.3109227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150460,"url":"https://patchwork.plctlab.org/api/1.2/patches/150460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-1-ppalka@redhat.com/","msgid":"<20231010032300.1057862-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-10T03:22:59","name":"[1/2] c++: sort candidates according to viability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-1-ppalka@redhat.com/mbox/"},{"id":150461,"url":"https://patchwork.plctlab.org/api/1.2/patches/150461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-2-ppalka@redhat.com/","msgid":"<20231010032300.1057862-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-10T03:23:00","name":"[2/2] c++: note other candidates when diagnosing deletedness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-2-ppalka@redhat.com/mbox/"},{"id":150474,"url":"https://patchwork.plctlab.org/api/1.2/patches/150474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-2-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:02","name":"[v2,1/4] options: Define TARGET__P and TARGET__OPTS_P macro for Mask and InverseMask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-2-kito.cheng@sifive.com/mbox/"},{"id":150475,"url":"https://patchwork.plctlab.org/api/1.2/patches/150475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-3-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:03","name":"[v2,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-3-kito.cheng@sifive.com/mbox/"},{"id":150477,"url":"https://patchwork.plctlab.org/api/1.2/patches/150477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-4-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:04","name":"[v2,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-4-kito.cheng@sifive.com/mbox/"},{"id":150476,"url":"https://patchwork.plctlab.org/api/1.2/patches/150476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-5-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:05","name":"[v2,4/4] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-5-kito.cheng@sifive.com/mbox/"},{"id":150480,"url":"https://patchwork.plctlab.org/api/1.2/patches/150480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010045952.572596-1-jun.zhang@intel.com/","msgid":"<20231010045952.572596-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-10-10T04:59:52","name":"x86: set spincount 1 for x86 hybrid platform [PR109812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010045952.572596-1-jun.zhang@intel.com/mbox/"},{"id":150501,"url":"https://patchwork.plctlab.org/api/1.2/patches/150501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010064852.1108058-1-hongyu.wang@intel.com/","msgid":"<20231010064852.1108058-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-10T06:48:52","name":"[APX] Support Intel APX PUSH2POP2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010064852.1108058-1-hongyu.wang@intel.com/mbox/"},{"id":150502,"url":"https://patchwork.plctlab.org/api/1.2/patches/150502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010065945.1234266-1-hongtao.liu@intel.com/","msgid":"<20231010065945.1234266-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-10T06:59:45","name":"[x86] Refine predicate of operands[2] in divv4hf3 with register_operand.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010065945.1234266-1-hongtao.liu@intel.com/mbox/"},{"id":150527,"url":"https://patchwork.plctlab.org/api/1.2/patches/150527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010074645.1392417-1-lin1.hu@intel.com/","msgid":"<20231010074645.1392417-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-10-10T07:46:45","name":"Support Intel USER_MSR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010074645.1392417-1-lin1.hu@intel.com/mbox/"},{"id":150569,"url":"https://patchwork.plctlab.org/api/1.2/patches/150569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010083950.1549239-1-claziss@gmail.com/","msgid":"<20231010083950.1549239-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-10T08:39:50","name":"[committed] arc: Refurbish add.f combiner patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010083950.1549239-1-claziss@gmail.com/mbox/"},{"id":150628,"url":"https://patchwork.plctlab.org/api/1.2/patches/150628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-2-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:15","name":"[v15,01/39] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-2-kmatsui@gcc.gnu.org/mbox/"},{"id":150630,"url":"https://patchwork.plctlab.org/api/1.2/patches/150630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-3-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:16","name":"[v15,02/39] c-family, c++: Look up traits through gperf instead of enum rid.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-3-kmatsui@gcc.gnu.org/mbox/"},{"id":150629,"url":"https://patchwork.plctlab.org/api/1.2/patches/150629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-4-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:17","name":"[v15,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-4-kmatsui@gcc.gnu.org/mbox/"},{"id":150631,"url":"https://patchwork.plctlab.org/api/1.2/patches/150631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-5-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:18","name":"[v15,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-5-kmatsui@gcc.gnu.org/mbox/"},{"id":150632,"url":"https://patchwork.plctlab.org/api/1.2/patches/150632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-6-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:19","name":"[v15,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-6-kmatsui@gcc.gnu.org/mbox/"},{"id":150633,"url":"https://patchwork.plctlab.org/api/1.2/patches/150633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-7-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:20","name":"[v15,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-7-kmatsui@gcc.gnu.org/mbox/"},{"id":150634,"url":"https://patchwork.plctlab.org/api/1.2/patches/150634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-8-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:21","name":"[v15,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-8-kmatsui@gcc.gnu.org/mbox/"},{"id":150635,"url":"https://patchwork.plctlab.org/api/1.2/patches/150635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-9-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:22","name":"[v15,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-9-kmatsui@gcc.gnu.org/mbox/"},{"id":150636,"url":"https://patchwork.plctlab.org/api/1.2/patches/150636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-10-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:23","name":"[v15,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-10-kmatsui@gcc.gnu.org/mbox/"},{"id":150638,"url":"https://patchwork.plctlab.org/api/1.2/patches/150638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-11-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:24","name":"[v15,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-11-kmatsui@gcc.gnu.org/mbox/"},{"id":150637,"url":"https://patchwork.plctlab.org/api/1.2/patches/150637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-12-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:25","name":"[v15,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-12-kmatsui@gcc.gnu.org/mbox/"},{"id":150639,"url":"https://patchwork.plctlab.org/api/1.2/patches/150639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-13-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:26","name":"[v15,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-13-kmatsui@gcc.gnu.org/mbox/"},{"id":150640,"url":"https://patchwork.plctlab.org/api/1.2/patches/150640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-14-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:27","name":"[v15,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-14-kmatsui@gcc.gnu.org/mbox/"},{"id":150643,"url":"https://patchwork.plctlab.org/api/1.2/patches/150643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-15-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:28","name":"[v15,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-15-kmatsui@gcc.gnu.org/mbox/"},{"id":150642,"url":"https://patchwork.plctlab.org/api/1.2/patches/150642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-16-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:29","name":"[v15,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-16-kmatsui@gcc.gnu.org/mbox/"},{"id":150645,"url":"https://patchwork.plctlab.org/api/1.2/patches/150645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-17-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:30","name":"[v15,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-17-kmatsui@gcc.gnu.org/mbox/"},{"id":150646,"url":"https://patchwork.plctlab.org/api/1.2/patches/150646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-18-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:31","name":"[v15,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-18-kmatsui@gcc.gnu.org/mbox/"},{"id":150647,"url":"https://patchwork.plctlab.org/api/1.2/patches/150647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-19-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:32","name":"[v15,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-19-kmatsui@gcc.gnu.org/mbox/"},{"id":150650,"url":"https://patchwork.plctlab.org/api/1.2/patches/150650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-20-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:33","name":"[v15,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-20-kmatsui@gcc.gnu.org/mbox/"},{"id":150651,"url":"https://patchwork.plctlab.org/api/1.2/patches/150651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-21-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:34","name":"[v15,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-21-kmatsui@gcc.gnu.org/mbox/"},{"id":150653,"url":"https://patchwork.plctlab.org/api/1.2/patches/150653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-22-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:35","name":"[v15,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-22-kmatsui@gcc.gnu.org/mbox/"},{"id":150654,"url":"https://patchwork.plctlab.org/api/1.2/patches/150654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-23-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:36","name":"[v15,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-23-kmatsui@gcc.gnu.org/mbox/"},{"id":150656,"url":"https://patchwork.plctlab.org/api/1.2/patches/150656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-24-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:37","name":"[v15,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-24-kmatsui@gcc.gnu.org/mbox/"},{"id":150655,"url":"https://patchwork.plctlab.org/api/1.2/patches/150655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-25-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:38","name":"[v15,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-25-kmatsui@gcc.gnu.org/mbox/"},{"id":150657,"url":"https://patchwork.plctlab.org/api/1.2/patches/150657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-26-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:39","name":"[v15,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-26-kmatsui@gcc.gnu.org/mbox/"},{"id":150658,"url":"https://patchwork.plctlab.org/api/1.2/patches/150658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-27-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:40","name":"[v15,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-27-kmatsui@gcc.gnu.org/mbox/"},{"id":150661,"url":"https://patchwork.plctlab.org/api/1.2/patches/150661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-28-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:41","name":"[v15,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-28-kmatsui@gcc.gnu.org/mbox/"},{"id":150659,"url":"https://patchwork.plctlab.org/api/1.2/patches/150659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-29-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:42","name":"[v15,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-29-kmatsui@gcc.gnu.org/mbox/"},{"id":150664,"url":"https://patchwork.plctlab.org/api/1.2/patches/150664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-30-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:43","name":"[v15,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-30-kmatsui@gcc.gnu.org/mbox/"},{"id":150671,"url":"https://patchwork.plctlab.org/api/1.2/patches/150671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-31-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:44","name":"[v15,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-31-kmatsui@gcc.gnu.org/mbox/"},{"id":150660,"url":"https://patchwork.plctlab.org/api/1.2/patches/150660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-32-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:45","name":"[v15,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-32-kmatsui@gcc.gnu.org/mbox/"},{"id":150663,"url":"https://patchwork.plctlab.org/api/1.2/patches/150663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-33-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:46","name":"[v15,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-33-kmatsui@gcc.gnu.org/mbox/"},{"id":150672,"url":"https://patchwork.plctlab.org/api/1.2/patches/150672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-34-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:47","name":"[v15,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-34-kmatsui@gcc.gnu.org/mbox/"},{"id":150667,"url":"https://patchwork.plctlab.org/api/1.2/patches/150667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-35-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:48","name":"[v15,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-35-kmatsui@gcc.gnu.org/mbox/"},{"id":150665,"url":"https://patchwork.plctlab.org/api/1.2/patches/150665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-36-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:49","name":"[v15,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-36-kmatsui@gcc.gnu.org/mbox/"},{"id":150669,"url":"https://patchwork.plctlab.org/api/1.2/patches/150669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-37-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:50","name":"[v15,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-37-kmatsui@gcc.gnu.org/mbox/"},{"id":150666,"url":"https://patchwork.plctlab.org/api/1.2/patches/150666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-38-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:51","name":"[v15,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-38-kmatsui@gcc.gnu.org/mbox/"},{"id":150668,"url":"https://patchwork.plctlab.org/api/1.2/patches/150668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-39-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:52","name":"[v15,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-39-kmatsui@gcc.gnu.org/mbox/"},{"id":150670,"url":"https://patchwork.plctlab.org/api/1.2/patches/150670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-40-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:53","name":"[v15,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-40-kmatsui@gcc.gnu.org/mbox/"},{"id":150680,"url":"https://patchwork.plctlab.org/api/1.2/patches/150680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010103846.F1467383C8FA@sourceware.org/","msgid":"<20231010103846.F1467383C8FA@sourceware.org>","list_archive_url":null,"date":"2023-10-10T10:38:20","name":"Fix missed CSE with a BLKmode entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010103846.F1467383C8FA@sourceware.org/mbox/"},{"id":150681,"url":"https://patchwork.plctlab.org/api/1.2/patches/150681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010104929.D13B53857709@sourceware.org/","msgid":"<20231010104929.D13B53857709@sourceware.org>","list_archive_url":null,"date":"2023-10-10T10:49:04","name":"tree-optimization/111519 - strlen optimization skips clobbering store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010104929.D13B53857709@sourceware.org/mbox/"},{"id":150692,"url":"https://patchwork.plctlab.org/api/1.2/patches/150692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010114901.4178775-1-juzhe.zhong@rivai.ai/","msgid":"<20231010114901.4178775-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T11:49:01","name":"[Committed] RISC-V: Add testcase for SCCVN optimization[PR111751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010114901.4178775-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150719,"url":"https://patchwork.plctlab.org/api/1.2/patches/150719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121445.3888198-1-poulhies@adacore.com/","msgid":"<20231010121445.3888198-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:45","name":"[COMMITTED] ada: Crash processing pragmas Compile_Time_Error and Compile_Time_Warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121445.3888198-1-poulhies@adacore.com/mbox/"},{"id":150723,"url":"https://patchwork.plctlab.org/api/1.2/patches/150723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121449.3888260-1-poulhies@adacore.com/","msgid":"<20231010121449.3888260-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:49","name":"[COMMITTED] ada: Tweak documentation comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121449.3888260-1-poulhies@adacore.com/mbox/"},{"id":150729,"url":"https://patchwork.plctlab.org/api/1.2/patches/150729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121451.3888321-1-poulhies@adacore.com/","msgid":"<20231010121451.3888321-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:51","name":"[COMMITTED] ada: Fix filesystem entry filtering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121451.3888321-1-poulhies@adacore.com/mbox/"},{"id":150726,"url":"https://patchwork.plctlab.org/api/1.2/patches/150726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121452.3888382-1-poulhies@adacore.com/","msgid":"<20231010121452.3888382-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:52","name":"[COMMITTED] ada: Fix infinite loop with multiple limited with clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121452.3888382-1-poulhies@adacore.com/mbox/"},{"id":150720,"url":"https://patchwork.plctlab.org/api/1.2/patches/150720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121454.3888482-1-poulhies@adacore.com/","msgid":"<20231010121454.3888482-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:54","name":"[COMMITTED] ada: Fix bad finalization of limited aggregate in conditional expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121454.3888482-1-poulhies@adacore.com/mbox/"},{"id":150722,"url":"https://patchwork.plctlab.org/api/1.2/patches/150722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121455.3888544-1-poulhies@adacore.com/","msgid":"<20231010121455.3888544-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:55","name":"[COMMITTED] ada: Remove superfluous setter procedure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121455.3888544-1-poulhies@adacore.com/mbox/"},{"id":150725,"url":"https://patchwork.plctlab.org/api/1.2/patches/150725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121457.3888606-1-poulhies@adacore.com/","msgid":"<20231010121457.3888606-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:57","name":"[COMMITTED] ada: Tweak internal subprogram in Ada.Directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121457.3888606-1-poulhies@adacore.com/mbox/"},{"id":150727,"url":"https://patchwork.plctlab.org/api/1.2/patches/150727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121459.3888667-1-poulhies@adacore.com/","msgid":"<20231010121459.3888667-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:59","name":"[COMMITTED] ada: Fix internal error on too large representation clause for small component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121459.3888667-1-poulhies@adacore.com/mbox/"},{"id":150732,"url":"https://patchwork.plctlab.org/api/1.2/patches/150732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121909.1803189-1-juzhe.zhong@rivai.ai/","msgid":"<20231010121909.1803189-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T12:19:09","name":"[Committed] RISC-V: Add VLS BOOL mode vcond_mask[PR111751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121909.1803189-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150731,"url":"https://patchwork.plctlab.org/api/1.2/patches/150731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121947.551323882004@sourceware.org/","msgid":"<20231010121947.551323882004@sourceware.org>","list_archive_url":null,"date":"2023-10-10T12:19:18","name":"tree-optimization/111751 - support 1024 bit vector constant reinterpretation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121947.551323882004@sourceware.org/mbox/"},{"id":150739,"url":"https://patchwork.plctlab.org/api/1.2/patches/150739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com/","msgid":"<049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-10T12:28:29","name":"Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com/mbox/"},{"id":150749,"url":"https://patchwork.plctlab.org/api/1.2/patches/150749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010124032.103935-1-christoph.muellner@vrull.eu/","msgid":"<20231010124032.103935-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-10T12:40:32","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010124032.103935-1-christoph.muellner@vrull.eu/mbox/"},{"id":150750,"url":"https://patchwork.plctlab.org/api/1.2/patches/150750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b126b63b-258b-e63a-6d6e-fa79aefd90e8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-10T12:44:00","name":"PATCH v3] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b126b63b-258b-e63a-6d6e-fa79aefd90e8@linux.ibm.com/mbox/"},{"id":150755,"url":"https://patchwork.plctlab.org/api/1.2/patches/150755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010125547.3682032-1-juzhe.zhong@rivai.ai/","msgid":"<20231010125547.3682032-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T12:55:47","name":"RISC-V Regression: Fix FAIL of pr65947-8.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010125547.3682032-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150795,"url":"https://patchwork.plctlab.org/api/1.2/patches/150795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSVUz5PH36aJ3en2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-10T13:42:39","name":"dwarf2out: Stop using wide_int in GC structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSVUz5PH36aJ3en2@tucnak/mbox/"},{"id":150804,"url":"https://patchwork.plctlab.org/api/1.2/patches/150804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65255623.620a0220.39bb2.41d9@mx.google.com/","msgid":"<65255623.620a0220.39bb2.41d9@mx.google.com>","list_archive_url":null,"date":"2023-10-10T13:48:12","name":"[v5] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65255623.620a0220.39bb2.41d9@mx.google.com/mbox/"},{"id":150808,"url":"https://patchwork.plctlab.org/api/1.2/patches/150808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-2-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:43","name":"[1/3,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-2-Ezra.Sitorus@arm.com/mbox/"},{"id":150807,"url":"https://patchwork.plctlab.org/api/1.2/patches/150807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-3-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:44","name":"[2/3,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-3-Ezra.Sitorus@arm.com/mbox/"},{"id":150809,"url":"https://patchwork.plctlab.org/api/1.2/patches/150809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-4-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:45","name":"[3/3,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-4-Ezra.Sitorus@arm.com/mbox/"},{"id":150830,"url":"https://patchwork.plctlab.org/api/1.2/patches/150830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010144913.2245394-1-juzhe.zhong@rivai.ai/","msgid":"<20231010144913.2245394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T14:49:13","name":"RISC-V Regression: Fix FAIL of vect-multitypes-16.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010144913.2245394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150834,"url":"https://patchwork.plctlab.org/api/1.2/patches/150834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010145746.2247025-1-juzhe.zhong@rivai.ai/","msgid":"<20231010145746.2247025-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T14:57:46","name":"RISC-V Regression: Make pattern match more accurate of vect-live-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010145746.2247025-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150872,"url":"https://patchwork.plctlab.org/api/1.2/patches/150872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com/","msgid":"<457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com>","list_archive_url":null,"date":"2023-10-10T16:46:35","name":"Fortran: Support OpenMP'\''s '\''allocate'\'' directive for stack vars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com/mbox/"},{"id":150883,"url":"https://patchwork.plctlab.org/api/1.2/patches/150883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSWHycEfs6r1Wvki@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-10T17:20:09","name":"[v2] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSWHycEfs6r1Wvki@redhat.com/mbox/"},{"id":150972,"url":"https://patchwork.plctlab.org/api/1.2/patches/150972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010212305.121636-1-jason@redhat.com/","msgid":"<20231010212305.121636-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-10T21:23:05","name":"[pushed] c++: mangle multiple levels of template parms [PR109422]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010212305.121636-1-jason@redhat.com/mbox/"},{"id":150989,"url":"https://patchwork.plctlab.org/api/1.2/patches/150989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-2-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:52","name":"[v16,01/39] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-2-kmatsui@gcc.gnu.org/mbox/"},{"id":150990,"url":"https://patchwork.plctlab.org/api/1.2/patches/150990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-3-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:53","name":"[v16,02/39] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-3-kmatsui@gcc.gnu.org/mbox/"},{"id":150991,"url":"https://patchwork.plctlab.org/api/1.2/patches/150991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-4-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:54","name":"[v16,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-4-kmatsui@gcc.gnu.org/mbox/"},{"id":150992,"url":"https://patchwork.plctlab.org/api/1.2/patches/150992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-5-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:55","name":"[v16,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-5-kmatsui@gcc.gnu.org/mbox/"},{"id":150993,"url":"https://patchwork.plctlab.org/api/1.2/patches/150993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-6-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:56","name":"[v16,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-6-kmatsui@gcc.gnu.org/mbox/"},{"id":150994,"url":"https://patchwork.plctlab.org/api/1.2/patches/150994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-7-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:57","name":"[v16,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-7-kmatsui@gcc.gnu.org/mbox/"},{"id":150995,"url":"https://patchwork.plctlab.org/api/1.2/patches/150995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-8-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:58","name":"[v16,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-8-kmatsui@gcc.gnu.org/mbox/"},{"id":150996,"url":"https://patchwork.plctlab.org/api/1.2/patches/150996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-9-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:59","name":"[v16,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-9-kmatsui@gcc.gnu.org/mbox/"},{"id":151000,"url":"https://patchwork.plctlab.org/api/1.2/patches/151000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-10-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:00","name":"[v16,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-10-kmatsui@gcc.gnu.org/mbox/"},{"id":151008,"url":"https://patchwork.plctlab.org/api/1.2/patches/151008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-11-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:01","name":"[v16,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-11-kmatsui@gcc.gnu.org/mbox/"},{"id":151009,"url":"https://patchwork.plctlab.org/api/1.2/patches/151009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-12-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:02","name":"[v16,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-12-kmatsui@gcc.gnu.org/mbox/"},{"id":151011,"url":"https://patchwork.plctlab.org/api/1.2/patches/151011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-13-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:03","name":"[v16,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-13-kmatsui@gcc.gnu.org/mbox/"},{"id":151010,"url":"https://patchwork.plctlab.org/api/1.2/patches/151010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-14-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:04","name":"[v16,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-14-kmatsui@gcc.gnu.org/mbox/"},{"id":151013,"url":"https://patchwork.plctlab.org/api/1.2/patches/151013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-15-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:05","name":"[v16,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-15-kmatsui@gcc.gnu.org/mbox/"},{"id":151014,"url":"https://patchwork.plctlab.org/api/1.2/patches/151014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-16-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:06","name":"[v16,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-16-kmatsui@gcc.gnu.org/mbox/"},{"id":151016,"url":"https://patchwork.plctlab.org/api/1.2/patches/151016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-17-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:07","name":"[v16,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-17-kmatsui@gcc.gnu.org/mbox/"},{"id":151015,"url":"https://patchwork.plctlab.org/api/1.2/patches/151015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-18-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:08","name":"[v16,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-18-kmatsui@gcc.gnu.org/mbox/"},{"id":151018,"url":"https://patchwork.plctlab.org/api/1.2/patches/151018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-19-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:09","name":"[v16,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-19-kmatsui@gcc.gnu.org/mbox/"},{"id":151017,"url":"https://patchwork.plctlab.org/api/1.2/patches/151017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-20-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:10","name":"[v16,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-20-kmatsui@gcc.gnu.org/mbox/"},{"id":151021,"url":"https://patchwork.plctlab.org/api/1.2/patches/151021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-21-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:11","name":"[v16,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-21-kmatsui@gcc.gnu.org/mbox/"},{"id":151024,"url":"https://patchwork.plctlab.org/api/1.2/patches/151024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-22-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:12","name":"[v16,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-22-kmatsui@gcc.gnu.org/mbox/"},{"id":151031,"url":"https://patchwork.plctlab.org/api/1.2/patches/151031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-23-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:13","name":"[v16,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-23-kmatsui@gcc.gnu.org/mbox/"},{"id":151020,"url":"https://patchwork.plctlab.org/api/1.2/patches/151020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-24-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:14","name":"[v16,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-24-kmatsui@gcc.gnu.org/mbox/"},{"id":151019,"url":"https://patchwork.plctlab.org/api/1.2/patches/151019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-25-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:15","name":"[v16,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-25-kmatsui@gcc.gnu.org/mbox/"},{"id":151023,"url":"https://patchwork.plctlab.org/api/1.2/patches/151023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-26-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:16","name":"[v16,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-26-kmatsui@gcc.gnu.org/mbox/"},{"id":151022,"url":"https://patchwork.plctlab.org/api/1.2/patches/151022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-27-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:17","name":"[v16,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-27-kmatsui@gcc.gnu.org/mbox/"},{"id":151026,"url":"https://patchwork.plctlab.org/api/1.2/patches/151026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-28-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:18","name":"[v16,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-28-kmatsui@gcc.gnu.org/mbox/"},{"id":151030,"url":"https://patchwork.plctlab.org/api/1.2/patches/151030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-29-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:19","name":"[v16,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-29-kmatsui@gcc.gnu.org/mbox/"},{"id":151025,"url":"https://patchwork.plctlab.org/api/1.2/patches/151025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-30-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:20","name":"[v16,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-30-kmatsui@gcc.gnu.org/mbox/"},{"id":151028,"url":"https://patchwork.plctlab.org/api/1.2/patches/151028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-31-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:21","name":"[v16,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-31-kmatsui@gcc.gnu.org/mbox/"},{"id":151033,"url":"https://patchwork.plctlab.org/api/1.2/patches/151033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-32-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:22","name":"[v16,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-32-kmatsui@gcc.gnu.org/mbox/"},{"id":151032,"url":"https://patchwork.plctlab.org/api/1.2/patches/151032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-33-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:23","name":"[v16,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-33-kmatsui@gcc.gnu.org/mbox/"},{"id":151038,"url":"https://patchwork.plctlab.org/api/1.2/patches/151038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-34-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:24","name":"[v16,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-34-kmatsui@gcc.gnu.org/mbox/"},{"id":151035,"url":"https://patchwork.plctlab.org/api/1.2/patches/151035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-35-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:25","name":"[v16,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-35-kmatsui@gcc.gnu.org/mbox/"},{"id":151034,"url":"https://patchwork.plctlab.org/api/1.2/patches/151034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-36-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:26","name":"[v16,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-36-kmatsui@gcc.gnu.org/mbox/"},{"id":151036,"url":"https://patchwork.plctlab.org/api/1.2/patches/151036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-37-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:27","name":"[v16,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-37-kmatsui@gcc.gnu.org/mbox/"},{"id":151037,"url":"https://patchwork.plctlab.org/api/1.2/patches/151037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-38-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:28","name":"[v16,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-38-kmatsui@gcc.gnu.org/mbox/"},{"id":151039,"url":"https://patchwork.plctlab.org/api/1.2/patches/151039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-39-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:29","name":"[v16,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-39-kmatsui@gcc.gnu.org/mbox/"},{"id":151040,"url":"https://patchwork.plctlab.org/api/1.2/patches/151040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-40-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:30","name":"[v16,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-40-kmatsui@gcc.gnu.org/mbox/"},{"id":150988,"url":"https://patchwork.plctlab.org/api/1.2/patches/150988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com/","msgid":"<001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com>","list_archive_url":null,"date":"2023-10-10T22:11:21","name":"[committed,PR,target/93062] RISC-V: Handle long conditional branches for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com/mbox/"},{"id":151055,"url":"https://patchwork.plctlab.org/api/1.2/patches/151055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6525e4d7.170a0220.2ad8c.28d8@mx.google.com/","msgid":"<6525e4d7.170a0220.2ad8c.28d8@mx.google.com>","list_archive_url":null,"date":"2023-10-10T23:57:06","name":"[v2] c++: Improve diagnostics for constexpr cast from void*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6525e4d7.170a0220.2ad8c.28d8@mx.google.com/mbox/"},{"id":151090,"url":"https://patchwork.plctlab.org/api/1.2/patches/151090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011003602.80416-1-guojiufu@linux.ibm.com/","msgid":"<20231011003602.80416-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T00:36:02","name":"[V1] use more get_range_query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011003602.80416-1-guojiufu@linux.ibm.com/mbox/"},{"id":151091,"url":"https://patchwork.plctlab.org/api/1.2/patches/151091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011004537.3582095-1-pinskia@gmail.com/","msgid":"<20231011004537.3582095-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-11T00:45:37","name":"MATCH: [PR111282] Simplify `a & (b ^ ~a)` to `a & b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011004537.3582095-1-pinskia@gmail.com/mbox/"},{"id":151093,"url":"https://patchwork.plctlab.org/api/1.2/patches/151093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011012934.1370966-1-guojiufu@linux.ibm.com/","msgid":"<20231011012934.1370966-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T01:29:34","name":"early outs for functions in rs6000.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011012934.1370966-1-guojiufu@linux.ibm.com/mbox/"},{"id":151106,"url":"https://patchwork.plctlab.org/api/1.2/patches/151106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011032507.1755127-1-juzhe.zhong@rivai.ai/","msgid":"<20231011032507.1755127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T03:25:07","name":"RISC-V: Remove XFAIL of ssa-dom-cse-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011032507.1755127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151117,"url":"https://patchwork.plctlab.org/api/1.2/patches/151117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011051502.1695577-1-juzhe.zhong@rivai.ai/","msgid":"<20231011051502.1695577-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T05:15:02","name":"RISC-V: Enable full coverage vect tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011051502.1695577-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151208,"url":"https://patchwork.plctlab.org/api/1.2/patches/151208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011083928.2535012-1-jun.zhang@intel.com/","msgid":"<20231011083928.2535012-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-10-11T08:39:28","name":"[v2] x86: set spincount 1 for x86 hybrid platform","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011083928.2535012-1-jun.zhang@intel.com/mbox/"},{"id":151209,"url":"https://patchwork.plctlab.org/api/1.2/patches/151209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084125.3027928-1-panchenghui@loongson.cn/","msgid":"<20231011084125.3027928-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-10-11T08:41:25","name":"[v1] LoongArch: Fix vec_initv32qiv16qi template to avoid ICE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084125.3027928-1-panchenghui@loongson.cn/mbox/"},{"id":151216,"url":"https://patchwork.plctlab.org/api/1.2/patches/151216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084703.2535206-1-lin1.hu@intel.com/","msgid":"<20231011084703.2535206-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-10-11T08:47:03","name":"Fix testcases that are raised by support -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084703.2535206-1-lin1.hu@intel.com/mbox/"},{"id":151217,"url":"https://patchwork.plctlab.org/api/1.2/patches/151217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+NVx6b0ZtQ7gK8wHAA1o0Rrr6JUy82H0xV0gfv7VqcvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T08:48:17","name":"[fortran] PR67740 - Wrong association status of allocatable character pointer in derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+NVx6b0ZtQ7gK8wHAA1o0Rrr6JUy82H0xV0gfv7VqcvQ@mail.gmail.com/mbox/"},{"id":151218,"url":"https://patchwork.plctlab.org/api/1.2/patches/151218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084953.3748731-1-pan2.li@intel.com/","msgid":"<20231011084953.3748731-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-11T08:49:53","name":"[v1] RISC-V: Support FP lrint/lrintf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084953.3748731-1-pan2.li@intel.com/mbox/"},{"id":151232,"url":"https://patchwork.plctlab.org/api/1.2/patches/151232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011090309.2987108-1-juzhe.zhong@rivai.ai/","msgid":"<20231011090309.2987108-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:03:09","name":"RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011090309.2987108-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151234,"url":"https://patchwork.plctlab.org/api/1.2/patches/151234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com/","msgid":"<88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T09:05:59","name":"[PATCH-1v2,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com/mbox/"},{"id":151237,"url":"https://patchwork.plctlab.org/api/1.2/patches/151237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com/","msgid":"<19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T09:06:23","name":"[PATCH-2v2,rs6000] Enable vector mode for memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com/mbox/"},{"id":151239,"url":"https://patchwork.plctlab.org/api/1.2/patches/151239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011093631.2993626-1-juzhe.zhong@rivai.ai/","msgid":"<20231011093631.2993626-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:36:31","name":"[V2] RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011093631.2993626-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151240,"url":"https://patchwork.plctlab.org/api/1.2/patches/151240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095444.2997562-1-juzhe.zhong@rivai.ai/","msgid":"<20231011095444.2997562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:54:44","name":"[V3] RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095444.2997562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151242,"url":"https://patchwork.plctlab.org/api/1.2/patches/151242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095953.3184215-1-yangyujie@loongson.cn/","msgid":"<20231011095953.3184215-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-10-11T09:59:53","name":"[v2] LoongArch: Adjust makefile dependency for loongarch headers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095953.3184215-1-yangyujie@loongson.cn/mbox/"},{"id":151326,"url":"https://patchwork.plctlab.org/api/1.2/patches/151326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com/","msgid":"<402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-10-11T11:50:09","name":"[v2] rs6000: Change bitwise xor to an equality operator [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com/mbox/"},{"id":151332,"url":"https://patchwork.plctlab.org/api/1.2/patches/151332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-2-mary.bennett@embecosm.com/","msgid":"<20231011120608.242927-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-11T12:06:07","name":"[v4,1/2] RISC-V: Add support for XCVmac extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-2-mary.bennett@embecosm.com/mbox/"},{"id":151333,"url":"https://patchwork.plctlab.org/api/1.2/patches/151333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-3-mary.bennett@embecosm.com/","msgid":"<20231011120608.242927-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-11T12:06:08","name":"[v4,2/2] RISC-V: Add support for XCValu extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-3-mary.bennett@embecosm.com/mbox/"},{"id":151410,"url":"https://patchwork.plctlab.org/api/1.2/patches/151410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011122715.3017753-1-juzhe.zhong@rivai.ai/","msgid":"<20231011122715.3017753-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T12:27:15","name":"VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011122715.3017753-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151466,"url":"https://patchwork.plctlab.org/api/1.2/patches/151466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5spun4n.fsf@oldenburg.str.redhat.com/","msgid":"<87a5spun4n.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:42:16","name":"C99 test suite readiness: Mark some C89 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5spun4n.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151473,"url":"https://patchwork.plctlab.org/api/1.2/patches/151473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSbRqzsy4z0zH0O9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-11T16:47:39","name":"wide-int: Allow up to 16320 bits wide_int and change widest_int precision to 32640 bits [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSbRqzsy4z0zH0O9@tucnak/mbox/"},{"id":151476,"url":"https://patchwork.plctlab.org/api/1.2/patches/151476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0pt80z.fsf@oldenburg.str.redhat.com/","msgid":"<87zg0pt80z.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:53:48","name":"C99 test suite conversation: Some unverified test case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0pt80z.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151478,"url":"https://patchwork.plctlab.org/api/1.2/patches/151478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0m1t7yc.fsf@oldenburg.str.redhat.com/","msgid":"<87r0m1t7yc.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:55:23","name":"C99 testsuite readiness: Some verified test case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0m1t7yc.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151554,"url":"https://patchwork.plctlab.org/api/1.2/patches/151554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5be9e4b-fb8b-f385-ec81-cc7bede3fb5d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T20:48:02","name":"[COMMITTED,GCC13] PR tree-optimization/111694 - Ensure float equivalences include + and - zero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5be9e4b-fb8b-f385-ec81-cc7bede3fb5d@redhat.com/mbox/"},{"id":151555,"url":"https://patchwork.plctlab.org/api/1.2/patches/151555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZScKIRt2x6B2uAIB@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T20:48:33","name":"[v2] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZScKIRt2x6B2uAIB@redhat.com/mbox/"},{"id":151567,"url":"https://patchwork.plctlab.org/api/1.2/patches/151567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-2-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:37","name":"[v17,01/39] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-2-kmatsui@gcc.gnu.org/mbox/"},{"id":151569,"url":"https://patchwork.plctlab.org/api/1.2/patches/151569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-3-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:38","name":"[v17,02/39] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-3-kmatsui@gcc.gnu.org/mbox/"},{"id":151574,"url":"https://patchwork.plctlab.org/api/1.2/patches/151574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-4-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:39","name":"[v17,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-4-kmatsui@gcc.gnu.org/mbox/"},{"id":151570,"url":"https://patchwork.plctlab.org/api/1.2/patches/151570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-5-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:40","name":"[v17,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-5-kmatsui@gcc.gnu.org/mbox/"},{"id":151575,"url":"https://patchwork.plctlab.org/api/1.2/patches/151575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-6-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:41","name":"[v17,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-6-kmatsui@gcc.gnu.org/mbox/"},{"id":151572,"url":"https://patchwork.plctlab.org/api/1.2/patches/151572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-7-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:42","name":"[v17,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-7-kmatsui@gcc.gnu.org/mbox/"},{"id":151588,"url":"https://patchwork.plctlab.org/api/1.2/patches/151588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-8-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:43","name":"[v17,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-8-kmatsui@gcc.gnu.org/mbox/"},{"id":151580,"url":"https://patchwork.plctlab.org/api/1.2/patches/151580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-9-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:44","name":"[v17,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-9-kmatsui@gcc.gnu.org/mbox/"},{"id":151595,"url":"https://patchwork.plctlab.org/api/1.2/patches/151595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-10-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:45","name":"[v17,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-10-kmatsui@gcc.gnu.org/mbox/"},{"id":151581,"url":"https://patchwork.plctlab.org/api/1.2/patches/151581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-11-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:46","name":"[v17,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-11-kmatsui@gcc.gnu.org/mbox/"},{"id":151587,"url":"https://patchwork.plctlab.org/api/1.2/patches/151587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-12-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:47","name":"[v17,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-12-kmatsui@gcc.gnu.org/mbox/"},{"id":151577,"url":"https://patchwork.plctlab.org/api/1.2/patches/151577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-13-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:48","name":"[v17,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-13-kmatsui@gcc.gnu.org/mbox/"},{"id":151576,"url":"https://patchwork.plctlab.org/api/1.2/patches/151576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-14-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:49","name":"[v17,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-14-kmatsui@gcc.gnu.org/mbox/"},{"id":151599,"url":"https://patchwork.plctlab.org/api/1.2/patches/151599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-15-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:50","name":"[v17,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-15-kmatsui@gcc.gnu.org/mbox/"},{"id":151604,"url":"https://patchwork.plctlab.org/api/1.2/patches/151604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-16-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:51","name":"[v17,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-16-kmatsui@gcc.gnu.org/mbox/"},{"id":151586,"url":"https://patchwork.plctlab.org/api/1.2/patches/151586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-17-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:52","name":"[v17,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-17-kmatsui@gcc.gnu.org/mbox/"},{"id":151579,"url":"https://patchwork.plctlab.org/api/1.2/patches/151579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-18-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:53","name":"[v17,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-18-kmatsui@gcc.gnu.org/mbox/"},{"id":151596,"url":"https://patchwork.plctlab.org/api/1.2/patches/151596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-19-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:54","name":"[v17,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-19-kmatsui@gcc.gnu.org/mbox/"},{"id":151597,"url":"https://patchwork.plctlab.org/api/1.2/patches/151597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-20-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:55","name":"[v17,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-20-kmatsui@gcc.gnu.org/mbox/"},{"id":151601,"url":"https://patchwork.plctlab.org/api/1.2/patches/151601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-21-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:56","name":"[v17,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-21-kmatsui@gcc.gnu.org/mbox/"},{"id":151585,"url":"https://patchwork.plctlab.org/api/1.2/patches/151585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-22-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:57","name":"[v17,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-22-kmatsui@gcc.gnu.org/mbox/"},{"id":151612,"url":"https://patchwork.plctlab.org/api/1.2/patches/151612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-23-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:58","name":"[v17,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-23-kmatsui@gcc.gnu.org/mbox/"},{"id":151608,"url":"https://patchwork.plctlab.org/api/1.2/patches/151608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-24-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:59","name":"[v17,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-24-kmatsui@gcc.gnu.org/mbox/"},{"id":151607,"url":"https://patchwork.plctlab.org/api/1.2/patches/151607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-25-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:00","name":"[v17,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-25-kmatsui@gcc.gnu.org/mbox/"},{"id":151610,"url":"https://patchwork.plctlab.org/api/1.2/patches/151610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-26-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:01","name":"[v17,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-26-kmatsui@gcc.gnu.org/mbox/"},{"id":151603,"url":"https://patchwork.plctlab.org/api/1.2/patches/151603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-27-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:02","name":"[v17,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-27-kmatsui@gcc.gnu.org/mbox/"},{"id":151605,"url":"https://patchwork.plctlab.org/api/1.2/patches/151605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-28-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:03","name":"[v17,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-28-kmatsui@gcc.gnu.org/mbox/"},{"id":151582,"url":"https://patchwork.plctlab.org/api/1.2/patches/151582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-29-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:04","name":"[v17,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-29-kmatsui@gcc.gnu.org/mbox/"},{"id":151611,"url":"https://patchwork.plctlab.org/api/1.2/patches/151611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-30-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:05","name":"[v17,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-30-kmatsui@gcc.gnu.org/mbox/"},{"id":151606,"url":"https://patchwork.plctlab.org/api/1.2/patches/151606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-31-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:06","name":"[v17,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-31-kmatsui@gcc.gnu.org/mbox/"},{"id":151602,"url":"https://patchwork.plctlab.org/api/1.2/patches/151602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-32-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:07","name":"[v17,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-32-kmatsui@gcc.gnu.org/mbox/"},{"id":151598,"url":"https://patchwork.plctlab.org/api/1.2/patches/151598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-33-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:08","name":"[v17,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-33-kmatsui@gcc.gnu.org/mbox/"},{"id":151613,"url":"https://patchwork.plctlab.org/api/1.2/patches/151613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-34-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:09","name":"[v17,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-34-kmatsui@gcc.gnu.org/mbox/"},{"id":151590,"url":"https://patchwork.plctlab.org/api/1.2/patches/151590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-35-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:10","name":"[v17,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-35-kmatsui@gcc.gnu.org/mbox/"},{"id":151584,"url":"https://patchwork.plctlab.org/api/1.2/patches/151584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-36-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:11","name":"[v17,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-36-kmatsui@gcc.gnu.org/mbox/"},{"id":151609,"url":"https://patchwork.plctlab.org/api/1.2/patches/151609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-37-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:12","name":"[v17,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-37-kmatsui@gcc.gnu.org/mbox/"},{"id":151600,"url":"https://patchwork.plctlab.org/api/1.2/patches/151600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-38-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:13","name":"[v17,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-38-kmatsui@gcc.gnu.org/mbox/"},{"id":151578,"url":"https://patchwork.plctlab.org/api/1.2/patches/151578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-39-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:14","name":"[v17,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-39-kmatsui@gcc.gnu.org/mbox/"},{"id":151589,"url":"https://patchwork.plctlab.org/api/1.2/patches/151589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-40-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:15","name":"[v17,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-40-kmatsui@gcc.gnu.org/mbox/"},{"id":151614,"url":"https://patchwork.plctlab.org/api/1.2/patches/151614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com/","msgid":"<04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com>","list_archive_url":null,"date":"2023-10-11T22:26:41","name":"[committed] RISC-V: Adjust long unconditional branch sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com/mbox/"},{"id":151629,"url":"https://patchwork.plctlab.org/api/1.2/patches/151629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011232317.5803-1-kito.cheng@sifive.com/","msgid":"<20231011232317.5803-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-11T23:23:17","name":"[committed] RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011232317.5803-1-kito.cheng@sifive.com/mbox/"},{"id":151639,"url":"https://patchwork.plctlab.org/api/1.2/patches/151639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012015233.2918814-1-pan2.li@intel.com/","msgid":"<20231012015233.2918814-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T01:52:33","name":"[v1] RISC-V: Support FP irintf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012015233.2918814-1-pan2.li@intel.com/mbox/"},{"id":151680,"url":"https://patchwork.plctlab.org/api/1.2/patches/151680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012032825.378244-1-pan2.li@intel.com/","msgid":"<20231012032825.378244-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T03:28:25","name":"[v1] RISC-V: Support FP llrint auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012032825.378244-1-pan2.li@intel.com/mbox/"},{"id":151760,"url":"https://patchwork.plctlab.org/api/1.2/patches/151760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-1-hongtao.liu@intel.com/","msgid":"<20231012060209.4130200-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-12T06:02:08","name":"[1/2] Enable vectorization for V2HF/V4HF rounding operations and sqrt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-1-hongtao.liu@intel.com/mbox/"},{"id":151759,"url":"https://patchwork.plctlab.org/api/1.2/patches/151759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-2-hongtao.liu@intel.com/","msgid":"<20231012060209.4130200-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-12T06:02:09","name":"[2/2] Support 32/64-bit vectorization for conversion between _Float16 and integer/float.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-2-hongtao.liu@intel.com/mbox/"},{"id":151780,"url":"https://patchwork.plctlab.org/api/1.2/patches/151780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012064137.733900-1-juzhe.zhong@rivai.ai/","msgid":"<20231012064137.733900-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-12T06:41:37","name":"[V2] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012064137.733900-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151792,"url":"https://patchwork.plctlab.org/api/1.2/patches/151792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012070007.22047-1-chenglulu@loongson.cn/","msgid":"<20231012070007.22047-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-10-12T07:00:08","name":"[v2] LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012070007.22047-1-chenglulu@loongson.cn/mbox/"},{"id":151873,"url":"https://patchwork.plctlab.org/api/1.2/patches/151873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSemG6R7RSlzJUnI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-12T07:54:03","name":"libstdc++: Fix tr1/8_c_compatibility/cstdio/functions.cc regression with recent glibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSemG6R7RSlzJUnI@tucnak/mbox/"},{"id":151815,"url":"https://patchwork.plctlab.org/api/1.2/patches/151815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012082153.E485B385CCA7@sourceware.org/","msgid":"<20231012082153.E485B385CCA7@sourceware.org>","list_archive_url":null,"date":"2023-10-12T08:21:05","name":"tree-optimization/111764 - wrong reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012082153.E485B385CCA7@sourceware.org/mbox/"},{"id":151816,"url":"https://patchwork.plctlab.org/api/1.2/patches/151816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSetIEIRNdLqvikN@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-12T08:24:00","name":"PR target/111778 - Fix undefined shifts in PowerPC compiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSetIEIRNdLqvikN@cowardly-lion.the-meissners.org/mbox/"},{"id":151832,"url":"https://patchwork.plctlab.org/api/1.2/patches/151832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com/","msgid":"<79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T08:42:38","name":"[v8] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com/mbox/"},{"id":151834,"url":"https://patchwork.plctlab.org/api/1.2/patches/151834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6527b428.170a0220.810bd.457e@mx.google.com/","msgid":"<6527b428.170a0220.810bd.457e@mx.google.com>","list_archive_url":null,"date":"2023-10-12T08:53:55","name":"[v6] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6527b428.170a0220.810bd.457e@mx.google.com/mbox/"},{"id":151835,"url":"https://patchwork.plctlab.org/api/1.2/patches/151835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012085945.1057439-1-pan2.li@intel.com/","msgid":"<20231012085945.1057439-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T08:59:45","name":"[v1] RISC-V: Support FP lround/lroundf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012085945.1057439-1-pan2.li@intel.com/mbox/"},{"id":151837,"url":"https://patchwork.plctlab.org/api/1.2/patches/151837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012090145.196C73856DC8@sourceware.org/","msgid":"<20231012090145.196C73856DC8@sourceware.org>","list_archive_url":null,"date":"2023-10-12T09:01:17","name":"tree-optimization/111773 - avoid CD-DCE of noreturn special calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012090145.196C73856DC8@sourceware.org/mbox/"},{"id":151876,"url":"https://patchwork.plctlab.org/api/1.2/patches/151876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSe/UjWPIHPPUGyw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T09:41:38","name":"reg-notes.def: Fix up description of REG_NOALIAS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSe/UjWPIHPPUGyw@arm.com/mbox/"},{"id":151899,"url":"https://patchwork.plctlab.org/api/1.2/patches/151899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012100525.3355849-1-mary.bennett@embecosm.com/","msgid":"<20231012100525.3355849-1-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-12T10:05:25","name":"RISCV: Bugfix for incorrect documentation heading nesting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012100525.3355849-1-mary.bennett@embecosm.com/mbox/"},{"id":151920,"url":"https://patchwork.plctlab.org/api/1.2/patches/151920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012104523.2F2793858281@sourceware.org/","msgid":"<20231012104523.2F2793858281@sourceware.org>","list_archive_url":null,"date":"2023-10-12T10:44:46","name":"tree-optimization/111779 - Handle some BIT_FIELD_REFs in SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012104523.2F2793858281@sourceware.org/mbox/"},{"id":151922,"url":"https://patchwork.plctlab.org/api/1.2/patches/151922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae4dd96a-3b88-40dd-838b-cadcbac9d763@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T10:53:19","name":"libgomp.texi: Note to '\''Memory allocation'\'' sect and missing mem-memory routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae4dd96a-3b88-40dd-838b-cadcbac9d763@codesourcery.com/mbox/"},{"id":152003,"url":"https://patchwork.plctlab.org/api/1.2/patches/152003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com/","msgid":"<902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T12:32:53","name":"[v9] Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com/mbox/"},{"id":152005,"url":"https://patchwork.plctlab.org/api/1.2/patches/152005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com/","msgid":"<4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T12:35:36","name":"[v9] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com/mbox/"},{"id":152009,"url":"https://patchwork.plctlab.org/api/1.2/patches/152009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012130644.561301-1-christoph.muellner@vrull.eu/","msgid":"<20231012130644.561301-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-12T13:06:44","name":"[v2] RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012130644.561301-1-christoph.muellner@vrull.eu/mbox/"},{"id":152015,"url":"https://patchwork.plctlab.org/api/1.2/patches/152015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4e22a9c-1917-d868-9171-866c6625888a@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-10-12T13:38:52","name":"[avr,committed] Implement atan2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4e22a9c-1917-d868-9171-866c6625888a@gjlay.de/mbox/"},{"id":152022,"url":"https://patchwork.plctlab.org/api/1.2/patches/152022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012141711.1303539-1-pan2.li@intel.com/","msgid":"<20231012141711.1303539-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T14:17:11","name":"[v1] RISC-V: Support FP lceil/lceilf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012141711.1303539-1-pan2.li@intel.com/mbox/"},{"id":152024,"url":"https://patchwork.plctlab.org/api/1.2/patches/152024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17819-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T14:24:05","name":"[5/6] AArch64: Fix Armv9-a warnings that get emitted whenever a ACLE header is used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17819-tamar@arm.com/mbox/"},{"id":152036,"url":"https://patchwork.plctlab.org/api/1.2/patches/152036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSgQeSv80fEpkeFW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-12T15:27:53","name":"[committed] wide-int: Fix build with gcc < 12 or clang++ [PR111787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSgQeSv80fEpkeFW@tucnak/mbox/"},{"id":152056,"url":"https://patchwork.plctlab.org/api/1.2/patches/152056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com/","msgid":"<2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com>","list_archive_url":null,"date":"2023-10-12T16:37:00","name":"libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com/mbox/"},{"id":152117,"url":"https://patchwork.plctlab.org/api/1.2/patches/152117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012184029.21114-1-kito.cheng@sifive.com/","msgid":"<20231012184029.21114-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-12T18:40:29","name":"[v2] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012184029.21114-1-kito.cheng@sifive.com/mbox/"},{"id":152183,"url":"https://patchwork.plctlab.org/api/1.2/patches/152183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0f7bdc-d236-4f5b-9504-d5bfb215d023@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T20:45:23","name":"genemit: Split insn-emit.cc into ten files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0f7bdc-d236-4f5b-9504-d5bfb215d023@gmail.com/mbox/"},{"id":152188,"url":"https://patchwork.plctlab.org/api/1.2/patches/152188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012210426.755503-1-polacek@redhat.com/","msgid":"<20231012210426.755503-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-12T21:04:26","name":"c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012210426.755503-1-polacek@redhat.com/mbox/"},{"id":152243,"url":"https://patchwork.plctlab.org/api/1.2/patches/152243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013013803.3680171-1-pan2.li@intel.com/","msgid":"<20231013013803.3680171-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T01:38:03","name":"[v1] RISC-V: Support FP lfloor/lfloorf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013013803.3680171-1-pan2.li@intel.com/mbox/"},{"id":152255,"url":"https://patchwork.plctlab.org/api/1.2/patches/152255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013022224.3837020-1-pan2.li@intel.com/","msgid":"<20231013022224.3837020-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T02:22:24","name":"[v1] RISC-V: Leverage stdint-gcc.h for RVV test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013022224.3837020-1-pan2.li@intel.com/mbox/"},{"id":152307,"url":"https://patchwork.plctlab.org/api/1.2/patches/152307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013042926.201415-1-juzhe.zhong@rivai.ai/","msgid":"<20231013042926.201415-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T04:29:26","name":"[V3] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013042926.201415-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152311,"url":"https://patchwork.plctlab.org/api/1.2/patches/152311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013053347.1530185-1-pan2.li@intel.com/","msgid":"<20231013053347.1530185-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T05:33:47","name":"[v1] RISC-V: Add test for FP iroundf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013053347.1530185-1-pan2.li@intel.com/mbox/"},{"id":152315,"url":"https://patchwork.plctlab.org/api/1.2/patches/152315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013054519.461486-1-juzhe.zhong@rivai.ai/","msgid":"<20231013054519.461486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T05:45:19","name":"RISC-V Regression: Fix FAIL of bb-slp-pr69907.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013054519.461486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152320,"url":"https://patchwork.plctlab.org/api/1.2/patches/152320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013060126.503655-1-juzhe.zhong@rivai.ai/","msgid":"<20231013060126.503655-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T06:01:26","name":"RISC-V Regression: Fix FAIL of bb-slp-68.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013060126.503655-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152331,"url":"https://patchwork.plctlab.org/api/1.2/patches/152331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013061522.1647330-1-pan2.li@intel.com/","msgid":"<20231013061522.1647330-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T06:15:22","name":"[v1] RISC-V: Add test for FP llround auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013061522.1647330-1-pan2.li@intel.com/mbox/"},{"id":152352,"url":"https://patchwork.plctlab.org/api/1.2/patches/152352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013072027.1687701-1-pan2.li@intel.com/","msgid":"<20231013072027.1687701-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T07:20:27","name":"[v1] RISC-V: Add test for FP llceil auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013072027.1687701-1-pan2.li@intel.com/mbox/"},{"id":152354,"url":"https://patchwork.plctlab.org/api/1.2/patches/152354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSjw33JtzEa4fWkt@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-13T07:25:19","name":"middle-end: Allow _BitInt(65535) [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSjw33JtzEa4fWkt@tucnak/mbox/"},{"id":152375,"url":"https://patchwork.plctlab.org/api/1.2/patches/152375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013080643.1813480-1-pan2.li@intel.com/","msgid":"<20231013080643.1813480-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T08:06:43","name":"[v1] RISC-V: Add test for FP iceil auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013080643.1813480-1-pan2.li@intel.com/mbox/"},{"id":152380,"url":"https://patchwork.plctlab.org/api/1.2/patches/152380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013082336.1845369-1-pan2.li@intel.com/","msgid":"<20231013082336.1845369-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T08:23:36","name":"[v1] RISC-V: Add test for FP ifloor auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013082336.1845369-1-pan2.li@intel.com/mbox/"},{"id":152445,"url":"https://patchwork.plctlab.org/api/1.2/patches/152445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4bf18e0-cf23-7915-30aa-7bef24593d68@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T09:32:45","name":"PATCH-1v3, expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4bf18e0-cf23-7915-30aa-7bef24593d68@linux.ibm.com/mbox/"},{"id":152446,"url":"https://patchwork.plctlab.org/api/1.2/patches/152446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSkPSjC21gLSx2mI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-13T09:35:06","name":"middle-end, v2: Allow _BitInt(65535) [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSkPSjC21gLSx2mI@tucnak/mbox/"},{"id":152468,"url":"https://patchwork.plctlab.org/api/1.2/patches/152468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013094956.1888999-1-pan2.li@intel.com/","msgid":"<20231013094956.1888999-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T09:49:56","name":"[v1] RISC-V: Add test for FP llfloor auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013094956.1888999-1-pan2.li@intel.com/mbox/"},{"id":152469,"url":"https://patchwork.plctlab.org/api/1.2/patches/152469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013095247.BEA251358F@imap2.suse-dmz.suse.de/","msgid":"<20231013095247.BEA251358F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-13T09:52:37","name":"Add support for SLP vectorization of OpenMP SIMD clone calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013095247.BEA251358F@imap2.suse-dmz.suse.de/mbox/"},{"id":152510,"url":"https://patchwork.plctlab.org/api/1.2/patches/152510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013113541.1954338-1-pan2.li@intel.com/","msgid":"<20231013113541.1954338-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T11:35:41","name":"[v1] RISC-V: Refine run test cases of math autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013113541.1954338-1-pan2.li@intel.com/mbox/"},{"id":152553,"url":"https://patchwork.plctlab.org/api/1.2/patches/152553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de/","msgid":"<20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-13T12:00:55","name":"OMP SIMD inbranch call vectorization for AVX512 style masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de/mbox/"},{"id":152581,"url":"https://patchwork.plctlab.org/api/1.2/patches/152581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72519953-7b2c-5156-485d-75904da5a90a@redhat.com/","msgid":"<72519953-7b2c-5156-485d-75904da5a90a@redhat.com>","list_archive_url":null,"date":"2023-10-13T13:24:24","name":"[COMMITTED,GCC13] PR tree-optimization/111622 - Do not add partial equivalences with no uses.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72519953-7b2c-5156-485d-75904da5a90a@redhat.com/mbox/"},{"id":152700,"url":"https://patchwork.plctlab.org/api/1.2/patches/152700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSmSDSf6kFZcyjKH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T18:53:01","name":"[v2] c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSmSDSf6kFZcyjKH@redhat.com/mbox/"},{"id":152737,"url":"https://patchwork.plctlab.org/api/1.2/patches/152737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-2-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:57","name":"[v18,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-2-kmatsui@gcc.gnu.org/mbox/"},{"id":152738,"url":"https://patchwork.plctlab.org/api/1.2/patches/152738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-3-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:58","name":"[v18,02/40] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-3-kmatsui@gcc.gnu.org/mbox/"},{"id":152739,"url":"https://patchwork.plctlab.org/api/1.2/patches/152739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-4-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:59","name":"[v18,03/40] c++: Accept the use of non-function-like built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-4-kmatsui@gcc.gnu.org/mbox/"},{"id":152740,"url":"https://patchwork.plctlab.org/api/1.2/patches/152740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-5-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:00","name":"[v18,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-5-kmatsui@gcc.gnu.org/mbox/"},{"id":152743,"url":"https://patchwork.plctlab.org/api/1.2/patches/152743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-6-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:01","name":"[v18,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-6-kmatsui@gcc.gnu.org/mbox/"},{"id":152742,"url":"https://patchwork.plctlab.org/api/1.2/patches/152742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-7-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:02","name":"[v18,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-7-kmatsui@gcc.gnu.org/mbox/"},{"id":152741,"url":"https://patchwork.plctlab.org/api/1.2/patches/152741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-8-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:03","name":"[v18,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-8-kmatsui@gcc.gnu.org/mbox/"},{"id":152746,"url":"https://patchwork.plctlab.org/api/1.2/patches/152746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-9-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:04","name":"[v18,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-9-kmatsui@gcc.gnu.org/mbox/"},{"id":152747,"url":"https://patchwork.plctlab.org/api/1.2/patches/152747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-10-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:05","name":"[v18,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-10-kmatsui@gcc.gnu.org/mbox/"},{"id":152745,"url":"https://patchwork.plctlab.org/api/1.2/patches/152745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-11-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:06","name":"[v18,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-11-kmatsui@gcc.gnu.org/mbox/"},{"id":152749,"url":"https://patchwork.plctlab.org/api/1.2/patches/152749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-12-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:07","name":"[v18,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-12-kmatsui@gcc.gnu.org/mbox/"},{"id":152748,"url":"https://patchwork.plctlab.org/api/1.2/patches/152748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-13-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:08","name":"[v18,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-13-kmatsui@gcc.gnu.org/mbox/"},{"id":152750,"url":"https://patchwork.plctlab.org/api/1.2/patches/152750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-14-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:09","name":"[v18,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-14-kmatsui@gcc.gnu.org/mbox/"},{"id":152751,"url":"https://patchwork.plctlab.org/api/1.2/patches/152751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-15-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:10","name":"[v18,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-15-kmatsui@gcc.gnu.org/mbox/"},{"id":152753,"url":"https://patchwork.plctlab.org/api/1.2/patches/152753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-16-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:11","name":"[v18,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-16-kmatsui@gcc.gnu.org/mbox/"},{"id":152752,"url":"https://patchwork.plctlab.org/api/1.2/patches/152752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-17-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:12","name":"[v18,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-17-kmatsui@gcc.gnu.org/mbox/"},{"id":152754,"url":"https://patchwork.plctlab.org/api/1.2/patches/152754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-18-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:13","name":"[v18,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-18-kmatsui@gcc.gnu.org/mbox/"},{"id":152756,"url":"https://patchwork.plctlab.org/api/1.2/patches/152756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-19-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:14","name":"[v18,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-19-kmatsui@gcc.gnu.org/mbox/"},{"id":152755,"url":"https://patchwork.plctlab.org/api/1.2/patches/152755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-20-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:15","name":"[v18,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-20-kmatsui@gcc.gnu.org/mbox/"},{"id":152758,"url":"https://patchwork.plctlab.org/api/1.2/patches/152758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-21-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:16","name":"[v18,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-21-kmatsui@gcc.gnu.org/mbox/"},{"id":152757,"url":"https://patchwork.plctlab.org/api/1.2/patches/152757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-22-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:17","name":"[v18,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-22-kmatsui@gcc.gnu.org/mbox/"},{"id":152759,"url":"https://patchwork.plctlab.org/api/1.2/patches/152759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-23-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:18","name":"[v18,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-23-kmatsui@gcc.gnu.org/mbox/"},{"id":152760,"url":"https://patchwork.plctlab.org/api/1.2/patches/152760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-24-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:19","name":"[v18,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-24-kmatsui@gcc.gnu.org/mbox/"},{"id":152763,"url":"https://patchwork.plctlab.org/api/1.2/patches/152763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-25-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:20","name":"[v18,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-25-kmatsui@gcc.gnu.org/mbox/"},{"id":152762,"url":"https://patchwork.plctlab.org/api/1.2/patches/152762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-26-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:21","name":"[v18,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-26-kmatsui@gcc.gnu.org/mbox/"},{"id":152764,"url":"https://patchwork.plctlab.org/api/1.2/patches/152764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-27-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:22","name":"[v18,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-27-kmatsui@gcc.gnu.org/mbox/"},{"id":152765,"url":"https://patchwork.plctlab.org/api/1.2/patches/152765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-28-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:23","name":"[v18,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-28-kmatsui@gcc.gnu.org/mbox/"},{"id":152766,"url":"https://patchwork.plctlab.org/api/1.2/patches/152766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-29-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:24","name":"[v18,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-29-kmatsui@gcc.gnu.org/mbox/"},{"id":152768,"url":"https://patchwork.plctlab.org/api/1.2/patches/152768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-30-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:25","name":"[v18,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-30-kmatsui@gcc.gnu.org/mbox/"},{"id":152769,"url":"https://patchwork.plctlab.org/api/1.2/patches/152769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-31-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:26","name":"[v18,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-31-kmatsui@gcc.gnu.org/mbox/"},{"id":152770,"url":"https://patchwork.plctlab.org/api/1.2/patches/152770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-32-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:27","name":"[v18,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-32-kmatsui@gcc.gnu.org/mbox/"},{"id":152771,"url":"https://patchwork.plctlab.org/api/1.2/patches/152771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-33-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:28","name":"[v18,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-33-kmatsui@gcc.gnu.org/mbox/"},{"id":152772,"url":"https://patchwork.plctlab.org/api/1.2/patches/152772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-34-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:29","name":"[v18,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-34-kmatsui@gcc.gnu.org/mbox/"},{"id":152774,"url":"https://patchwork.plctlab.org/api/1.2/patches/152774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-35-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:30","name":"[v18,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-35-kmatsui@gcc.gnu.org/mbox/"},{"id":152773,"url":"https://patchwork.plctlab.org/api/1.2/patches/152773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-36-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:31","name":"[v18,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-36-kmatsui@gcc.gnu.org/mbox/"},{"id":152775,"url":"https://patchwork.plctlab.org/api/1.2/patches/152775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-37-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:32","name":"[v18,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-37-kmatsui@gcc.gnu.org/mbox/"},{"id":152776,"url":"https://patchwork.plctlab.org/api/1.2/patches/152776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-38-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:33","name":"[v18,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-38-kmatsui@gcc.gnu.org/mbox/"},{"id":152777,"url":"https://patchwork.plctlab.org/api/1.2/patches/152777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-39-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:34","name":"[v18,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-39-kmatsui@gcc.gnu.org/mbox/"},{"id":152778,"url":"https://patchwork.plctlab.org/api/1.2/patches/152778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-40-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:35","name":"[v18,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-40-kmatsui@gcc.gnu.org/mbox/"},{"id":152779,"url":"https://patchwork.plctlab.org/api/1.2/patches/152779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-41-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:36","name":"[v18,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-41-kmatsui@gcc.gnu.org/mbox/"},{"id":152761,"url":"https://patchwork.plctlab.org/api/1.2/patches/152761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013212840.GA21815@ldh-imac.local/","msgid":"<20231013212840.GA21815@ldh-imac.local>","list_archive_url":null,"date":"2023-10-13T21:28:40","name":"ping: [PATCH] preprocessor: c++: Support `#pragma GCC target'\'' macros [PR87299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013212840.GA21815@ldh-imac.local/mbox/"},{"id":152789,"url":"https://patchwork.plctlab.org/api/1.2/patches/152789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013221552.518072-1-polacek@redhat.com/","msgid":"<20231013221552.518072-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-13T22:15:52","name":"c++: fix truncated diagnostic in C++23 [PR111272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013221552.518072-1-polacek@redhat.com/mbox/"},{"id":152792,"url":"https://patchwork.plctlab.org/api/1.2/patches/152792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-2-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:15","name":"[v19,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-2-kmatsui@gcc.gnu.org/mbox/"},{"id":152793,"url":"https://patchwork.plctlab.org/api/1.2/patches/152793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-3-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:16","name":"[v19,02/40] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-3-kmatsui@gcc.gnu.org/mbox/"},{"id":152794,"url":"https://patchwork.plctlab.org/api/1.2/patches/152794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-4-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:17","name":"[v19,03/40] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-4-kmatsui@gcc.gnu.org/mbox/"},{"id":152842,"url":"https://patchwork.plctlab.org/api/1.2/patches/152842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-5-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:18","name":"[v19,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-5-kmatsui@gcc.gnu.org/mbox/"},{"id":152799,"url":"https://patchwork.plctlab.org/api/1.2/patches/152799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-6-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:19","name":"[v19,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-6-kmatsui@gcc.gnu.org/mbox/"},{"id":152850,"url":"https://patchwork.plctlab.org/api/1.2/patches/152850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-7-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:20","name":"[v19,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-7-kmatsui@gcc.gnu.org/mbox/"},{"id":152804,"url":"https://patchwork.plctlab.org/api/1.2/patches/152804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-8-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:21","name":"[v19,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-8-kmatsui@gcc.gnu.org/mbox/"},{"id":152803,"url":"https://patchwork.plctlab.org/api/1.2/patches/152803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-9-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:22","name":"[v19,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-9-kmatsui@gcc.gnu.org/mbox/"},{"id":152846,"url":"https://patchwork.plctlab.org/api/1.2/patches/152846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-10-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:23","name":"[v19,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-10-kmatsui@gcc.gnu.org/mbox/"},{"id":152857,"url":"https://patchwork.plctlab.org/api/1.2/patches/152857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-11-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:24","name":"[v19,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-11-kmatsui@gcc.gnu.org/mbox/"},{"id":152801,"url":"https://patchwork.plctlab.org/api/1.2/patches/152801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-12-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:25","name":"[v19,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-12-kmatsui@gcc.gnu.org/mbox/"},{"id":152805,"url":"https://patchwork.plctlab.org/api/1.2/patches/152805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-13-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:26","name":"[v19,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-13-kmatsui@gcc.gnu.org/mbox/"},{"id":152813,"url":"https://patchwork.plctlab.org/api/1.2/patches/152813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-14-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:27","name":"[v19,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-14-kmatsui@gcc.gnu.org/mbox/"},{"id":152852,"url":"https://patchwork.plctlab.org/api/1.2/patches/152852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-15-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:28","name":"[v19,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-15-kmatsui@gcc.gnu.org/mbox/"},{"id":152827,"url":"https://patchwork.plctlab.org/api/1.2/patches/152827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-16-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:29","name":"[v19,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-16-kmatsui@gcc.gnu.org/mbox/"},{"id":152834,"url":"https://patchwork.plctlab.org/api/1.2/patches/152834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-17-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:30","name":"[v19,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-17-kmatsui@gcc.gnu.org/mbox/"},{"id":152807,"url":"https://patchwork.plctlab.org/api/1.2/patches/152807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-18-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:31","name":"[v19,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-18-kmatsui@gcc.gnu.org/mbox/"},{"id":152809,"url":"https://patchwork.plctlab.org/api/1.2/patches/152809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-19-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:32","name":"[v19,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-19-kmatsui@gcc.gnu.org/mbox/"},{"id":152853,"url":"https://patchwork.plctlab.org/api/1.2/patches/152853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-20-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:33","name":"[v19,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-20-kmatsui@gcc.gnu.org/mbox/"},{"id":152841,"url":"https://patchwork.plctlab.org/api/1.2/patches/152841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-21-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:34","name":"[v19,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-21-kmatsui@gcc.gnu.org/mbox/"},{"id":152802,"url":"https://patchwork.plctlab.org/api/1.2/patches/152802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-22-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:35","name":"[v19,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-22-kmatsui@gcc.gnu.org/mbox/"},{"id":152854,"url":"https://patchwork.plctlab.org/api/1.2/patches/152854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-23-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:36","name":"[v19,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-23-kmatsui@gcc.gnu.org/mbox/"},{"id":152806,"url":"https://patchwork.plctlab.org/api/1.2/patches/152806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-24-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:37","name":"[v19,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-24-kmatsui@gcc.gnu.org/mbox/"},{"id":152825,"url":"https://patchwork.plctlab.org/api/1.2/patches/152825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-25-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:38","name":"[v19,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-25-kmatsui@gcc.gnu.org/mbox/"},{"id":152800,"url":"https://patchwork.plctlab.org/api/1.2/patches/152800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-26-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:39","name":"[v19,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-26-kmatsui@gcc.gnu.org/mbox/"},{"id":152810,"url":"https://patchwork.plctlab.org/api/1.2/patches/152810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-27-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:40","name":"[v19,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-27-kmatsui@gcc.gnu.org/mbox/"},{"id":152837,"url":"https://patchwork.plctlab.org/api/1.2/patches/152837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-28-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:41","name":"[v19,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-28-kmatsui@gcc.gnu.org/mbox/"},{"id":152795,"url":"https://patchwork.plctlab.org/api/1.2/patches/152795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-29-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:42","name":"[v19,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-29-kmatsui@gcc.gnu.org/mbox/"},{"id":152856,"url":"https://patchwork.plctlab.org/api/1.2/patches/152856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-30-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:43","name":"[v19,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-30-kmatsui@gcc.gnu.org/mbox/"},{"id":152840,"url":"https://patchwork.plctlab.org/api/1.2/patches/152840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-31-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:44","name":"[v19,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-31-kmatsui@gcc.gnu.org/mbox/"},{"id":152808,"url":"https://patchwork.plctlab.org/api/1.2/patches/152808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-32-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:45","name":"[v19,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-32-kmatsui@gcc.gnu.org/mbox/"},{"id":152847,"url":"https://patchwork.plctlab.org/api/1.2/patches/152847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-33-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:46","name":"[v19,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-33-kmatsui@gcc.gnu.org/mbox/"},{"id":152844,"url":"https://patchwork.plctlab.org/api/1.2/patches/152844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-34-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:47","name":"[v19,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-34-kmatsui@gcc.gnu.org/mbox/"},{"id":152851,"url":"https://patchwork.plctlab.org/api/1.2/patches/152851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-35-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:48","name":"[v19,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-35-kmatsui@gcc.gnu.org/mbox/"},{"id":152839,"url":"https://patchwork.plctlab.org/api/1.2/patches/152839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-36-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:49","name":"[v19,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-36-kmatsui@gcc.gnu.org/mbox/"},{"id":152796,"url":"https://patchwork.plctlab.org/api/1.2/patches/152796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-37-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:50","name":"[v19,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-37-kmatsui@gcc.gnu.org/mbox/"},{"id":152849,"url":"https://patchwork.plctlab.org/api/1.2/patches/152849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-38-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:51","name":"[v19,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-38-kmatsui@gcc.gnu.org/mbox/"},{"id":152797,"url":"https://patchwork.plctlab.org/api/1.2/patches/152797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-39-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:52","name":"[v19,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-39-kmatsui@gcc.gnu.org/mbox/"},{"id":152798,"url":"https://patchwork.plctlab.org/api/1.2/patches/152798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-40-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:53","name":"[v19,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-40-kmatsui@gcc.gnu.org/mbox/"},{"id":152848,"url":"https://patchwork.plctlab.org/api/1.2/patches/152848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-41-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:54","name":"[v19,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-41-kmatsui@gcc.gnu.org/mbox/"},{"id":152867,"url":"https://patchwork.plctlab.org/api/1.2/patches/152867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+fa515rWJR1LcL6ad-GBBBLGqmv0b1fwA=DVbK4sRZ7Ng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T23:32:59","name":"libstdc++: Workaround for LLVM-61763 in ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+fa515rWJR1LcL6ad-GBBBLGqmv0b1fwA=DVbK4sRZ7Ng@mail.gmail.com/mbox/"},{"id":152860,"url":"https://patchwork.plctlab.org/api/1.2/patches/152860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSnVmfS6Mi4n6V7C@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-13T23:41:13","name":"Power10: Add options to disable load and store vector pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSnVmfS6Mi4n6V7C@cowardly-lion.the-meissners.org/mbox/"},{"id":152868,"url":"https://patchwork.plctlab.org/api/1.2/patches/152868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014005713.2702564-1-pinskia@gmail.com/","msgid":"<20231014005713.2702564-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-14T00:57:13","name":"MATCH: [PR111432] Simplify `a & (x | CST)` to a when we know that (a & ~CST) == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014005713.2702564-1-pinskia@gmail.com/mbox/"},{"id":152886,"url":"https://patchwork.plctlab.org/api/1.2/patches/152886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014030602.3813735-1-juzhe.zhong@rivai.ai/","msgid":"<20231014030602.3813735-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-14T03:06:02","name":"[Committed] RISC-V: Remove redundant iterators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014030602.3813735-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152915,"url":"https://patchwork.plctlab.org/api/1.2/patches/152915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpPVW+zyc9egEwc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-14T08:20:37","name":"wide-int: Fix estimation of buffer sizes for wide_int printing [PR111800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpPVW+zyc9egEwc@tucnak/mbox/"},{"id":152923,"url":"https://patchwork.plctlab.org/api/1.2/patches/152923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpkVdv/G5isFzXv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-14T09:50:13","name":"wide-int, v2: Fix estimation of buffer sizes for wide_int printing [PR111800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpkVdv/G5isFzXv@tucnak/mbox/"},{"id":152939,"url":"https://patchwork.plctlab.org/api/1.2/patches/152939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122352.1665945-1-ibuclaw@gdcproject.org/","msgid":"<20231014122352.1665945-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-14T12:23:52","name":"[committed] d: Reduce code duplication of writing generated files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122352.1665945-1-ibuclaw@gdcproject.org/mbox/"},{"id":152940,"url":"https://patchwork.plctlab.org/api/1.2/patches/152940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122601.1667638-1-ibuclaw@gdcproject.org/","msgid":"<20231014122601.1667638-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-14T12:26:01","name":"[committed] Fix ICE in set_cell_span, at text-art/table.cc:148 with D front-end and -fanalyzer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122601.1667638-1-ibuclaw@gdcproject.org/mbox/"},{"id":152941,"url":"https://patchwork.plctlab.org/api/1.2/patches/152941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at/","msgid":"<8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at>","list_archive_url":null,"date":"2023-10-14T12:28:30","name":"[C] error for function with external and internal linkage [PR111708]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at/mbox/"},{"id":152954,"url":"https://patchwork.plctlab.org/api/1.2/patches/152954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com/","msgid":"<716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com>","list_archive_url":null,"date":"2023-10-14T19:38:44","name":"[committed] libgomp.fortran/allocate-6.f90: Run with -fdump-tree-gimple (was: [Patch] OpenMP: Add ME support for '\''omp allocate'\'' stack variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com/mbox/"},{"id":152956,"url":"https://patchwork.plctlab.org/api/1.2/patches/152956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com/","msgid":"<507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com>","list_archive_url":null,"date":"2023-10-14T19:43:14","name":"libgomp.texi: Update \"Enabling OpenMP\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com/mbox/"},{"id":152957,"url":"https://patchwork.plctlab.org/api/1.2/patches/152957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f10a9a67-1e27-4c1e-a8c9-052685a02103@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-14T19:51:43","name":"libgomp.texi: Improve \"OpenACC Environment Variables\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f10a9a67-1e27-4c1e-a8c9-052685a02103@codesourcery.com/mbox/"},{"id":152972,"url":"https://patchwork.plctlab.org/api/1.2/patches/152972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com/","msgid":"<01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-14T22:14:29","name":"PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com/mbox/"},{"id":152976,"url":"https://patchwork.plctlab.org/api/1.2/patches/152976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com/","msgid":"<020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-14T23:32:58","name":"Improved RTL expansion of 1LL << x.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com/mbox/"},{"id":152981,"url":"https://patchwork.plctlab.org/api/1.2/patches/152981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-1-pinskia@gmail.com/","msgid":"<20231015011648.1608638-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T01:16:47","name":"[1/2] Fix ICE due to c_safe_arg_type_equiv_p not checking for error_mark node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-1-pinskia@gmail.com/mbox/"},{"id":152980,"url":"https://patchwork.plctlab.org/api/1.2/patches/152980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-2-pinskia@gmail.com/","msgid":"<20231015011648.1608638-2-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T01:16:48","name":"[2/2,c] Fix PR 101364: ICE after error due to diagnose_arglist_conflict not checking for error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-2-pinskia@gmail.com/mbox/"},{"id":152982,"url":"https://patchwork.plctlab.org/api/1.2/patches/152982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015030831.3921333-1-juzhe.zhong@rivai.ai/","msgid":"<20231015030831.3921333-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-15T03:08:31","name":"[Committed] RISC-V: Fix vsingle attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015030831.3921333-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152995,"url":"https://patchwork.plctlab.org/api/1.2/patches/152995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com/","msgid":"<3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com>","list_archive_url":null,"date":"2023-10-15T10:39:50","name":"libgomp.texi: Use present not future tense (was: [Patch] libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com/mbox/"},{"id":152996,"url":"https://patchwork.plctlab.org/api/1.2/patches/152996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com/","msgid":"<7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com>","list_archive_url":null,"date":"2023-10-15T10:42:31","name":"libgomp.texi: Update \"Enabling OpenMP\" + OpenACC / invoke.texi: -fopenacc/-fopenmp update (was: Re: [patch] libgomp.texi: Update \"Enabling OpenMP\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com/mbox/"},{"id":153006,"url":"https://patchwork.plctlab.org/api/1.2/patches/153006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com/","msgid":"<9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:11:45","name":"[PING,^0,v3] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com/mbox/"},{"id":153007,"url":"https://patchwork.plctlab.org/api/1.2/patches/153007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com/","msgid":"<9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:13:24","name":"[PING,^0,v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com/mbox/"},{"id":153008,"url":"https://patchwork.plctlab.org/api/1.2/patches/153008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com/","msgid":"<316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:43:40","name":"[PING,^0,v8,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com/mbox/"},{"id":153009,"url":"https://patchwork.plctlab.org/api/1.2/patches/153009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com/","msgid":"<10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:58:51","name":"[PING,^0,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com/mbox/"},{"id":153022,"url":"https://patchwork.plctlab.org/api/1.2/patches/153022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144052.50FF533ED2@hamza.pair.com/","msgid":"<20231015144052.50FF533ED2@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T14:40:49","name":"[pushed] wwwdocs: conduct: Link creativecommons.org via https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144052.50FF533ED2@hamza.pair.com/mbox/"},{"id":153023,"url":"https://patchwork.plctlab.org/api/1.2/patches/153023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144207.F0A8F33ED2@hamza.pair.com/","msgid":"<20231015144207.F0A8F33ED2@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T14:42:06","name":"[pushed] wwwdocs: gcc-9: Editorial changes to porting_to.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144207.F0A8F33ED2@hamza.pair.com/mbox/"},{"id":153039,"url":"https://patchwork.plctlab.org/api/1.2/patches/153039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015165629.19722-1-vapier@gentoo.org/","msgid":"<20231015165629.19722-1-vapier@gentoo.org>","list_archive_url":null,"date":"2023-10-15T16:56:29","name":"[PATCH/committed] sim: add distclean dep for gnulib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015165629.19722-1-vapier@gentoo.org/mbox/"},{"id":153048,"url":"https://patchwork.plctlab.org/api/1.2/patches/153048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015181644.886680-1-vineetg@rivosinc.com/","msgid":"<20231015181644.886680-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-15T18:16:44","name":"RISC-V/testsuite: add a default march (lacking zfa) to some fp tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015181644.886680-1-vineetg@rivosinc.com/mbox/"},{"id":153074,"url":"https://patchwork.plctlab.org/api/1.2/patches/153074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214241.B37BB33EB9@hamza.pair.com/","msgid":"<20231015214241.B37BB33EB9@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T21:42:39","name":"[pushed] wwwdocs: *: Remove unused buildstat pages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214241.B37BB33EB9@hamza.pair.com/mbox/"},{"id":153075,"url":"https://patchwork.plctlab.org/api/1.2/patches/153075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214627.3470F33ECF@hamza.pair.com/","msgid":"<20231015214627.3470F33ECF@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T21:46:25","name":"[pushed] wwwdocs: buildstat: Don'\''t reference buildstats we no longer carry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214627.3470F33ECF@hamza.pair.com/mbox/"},{"id":153076,"url":"https://patchwork.plctlab.org/api/1.2/patches/153076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015215956.512326-1-pinskia@gmail.com/","msgid":"<20231015215956.512326-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T21:59:56","name":"MATCH: Improve `A CMP 0 ? A : -A` set of patterns to use bitwise_equal_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015215956.512326-1-pinskia@gmail.com/mbox/"},{"id":153078,"url":"https://patchwork.plctlab.org/api/1.2/patches/153078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016000138.2235395-1-pinskia@gmail.com/","msgid":"<20231016000138.2235395-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-16T00:01:38","name":"Improve factor_out_conditional_operation for conversions and constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016000138.2235395-1-pinskia@gmail.com/mbox/"},{"id":153079,"url":"https://patchwork.plctlab.org/api/1.2/patches/153079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-2-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:45","name":"[v20,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-2-kmatsui@gcc.gnu.org/mbox/"},{"id":153081,"url":"https://patchwork.plctlab.org/api/1.2/patches/153081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-3-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:46","name":"[v20,02/40] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-3-kmatsui@gcc.gnu.org/mbox/"},{"id":153083,"url":"https://patchwork.plctlab.org/api/1.2/patches/153083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-4-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:47","name":"[v20,03/40] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-4-kmatsui@gcc.gnu.org/mbox/"},{"id":153116,"url":"https://patchwork.plctlab.org/api/1.2/patches/153116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-5-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:48","name":"[v20,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-5-kmatsui@gcc.gnu.org/mbox/"},{"id":153088,"url":"https://patchwork.plctlab.org/api/1.2/patches/153088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-6-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:49","name":"[v20,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-6-kmatsui@gcc.gnu.org/mbox/"},{"id":153095,"url":"https://patchwork.plctlab.org/api/1.2/patches/153095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-7-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:50","name":"[v20,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-7-kmatsui@gcc.gnu.org/mbox/"},{"id":153117,"url":"https://patchwork.plctlab.org/api/1.2/patches/153117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-8-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:51","name":"[v20,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-8-kmatsui@gcc.gnu.org/mbox/"},{"id":153099,"url":"https://patchwork.plctlab.org/api/1.2/patches/153099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-9-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:52","name":"[v20,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-9-kmatsui@gcc.gnu.org/mbox/"},{"id":153100,"url":"https://patchwork.plctlab.org/api/1.2/patches/153100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-10-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:53","name":"[v20,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-10-kmatsui@gcc.gnu.org/mbox/"},{"id":153087,"url":"https://patchwork.plctlab.org/api/1.2/patches/153087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-11-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:54","name":"[v20,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-11-kmatsui@gcc.gnu.org/mbox/"},{"id":153096,"url":"https://patchwork.plctlab.org/api/1.2/patches/153096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-12-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:55","name":"[v20,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-12-kmatsui@gcc.gnu.org/mbox/"},{"id":153092,"url":"https://patchwork.plctlab.org/api/1.2/patches/153092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-13-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:56","name":"[v20,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-13-kmatsui@gcc.gnu.org/mbox/"},{"id":153106,"url":"https://patchwork.plctlab.org/api/1.2/patches/153106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-14-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:57","name":"[v20,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-14-kmatsui@gcc.gnu.org/mbox/"},{"id":153089,"url":"https://patchwork.plctlab.org/api/1.2/patches/153089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-15-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:58","name":"[v20,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-15-kmatsui@gcc.gnu.org/mbox/"},{"id":153085,"url":"https://patchwork.plctlab.org/api/1.2/patches/153085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-16-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:59","name":"[v20,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-16-kmatsui@gcc.gnu.org/mbox/"},{"id":153091,"url":"https://patchwork.plctlab.org/api/1.2/patches/153091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-17-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:00","name":"[v20,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-17-kmatsui@gcc.gnu.org/mbox/"},{"id":153097,"url":"https://patchwork.plctlab.org/api/1.2/patches/153097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-18-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:01","name":"[v20,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-18-kmatsui@gcc.gnu.org/mbox/"},{"id":153082,"url":"https://patchwork.plctlab.org/api/1.2/patches/153082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-19-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:02","name":"[v20,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-19-kmatsui@gcc.gnu.org/mbox/"},{"id":153090,"url":"https://patchwork.plctlab.org/api/1.2/patches/153090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-20-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:03","name":"[v20,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-20-kmatsui@gcc.gnu.org/mbox/"},{"id":153109,"url":"https://patchwork.plctlab.org/api/1.2/patches/153109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-21-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:04","name":"[v20,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-21-kmatsui@gcc.gnu.org/mbox/"},{"id":153114,"url":"https://patchwork.plctlab.org/api/1.2/patches/153114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-22-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:05","name":"[v20,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-22-kmatsui@gcc.gnu.org/mbox/"},{"id":153115,"url":"https://patchwork.plctlab.org/api/1.2/patches/153115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-23-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:06","name":"[v20,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-23-kmatsui@gcc.gnu.org/mbox/"},{"id":153084,"url":"https://patchwork.plctlab.org/api/1.2/patches/153084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-24-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:07","name":"[v20,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-24-kmatsui@gcc.gnu.org/mbox/"},{"id":153111,"url":"https://patchwork.plctlab.org/api/1.2/patches/153111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-25-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:08","name":"[v20,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-25-kmatsui@gcc.gnu.org/mbox/"},{"id":153103,"url":"https://patchwork.plctlab.org/api/1.2/patches/153103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-26-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:09","name":"[v20,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-26-kmatsui@gcc.gnu.org/mbox/"},{"id":153105,"url":"https://patchwork.plctlab.org/api/1.2/patches/153105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-27-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:10","name":"[v20,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-27-kmatsui@gcc.gnu.org/mbox/"},{"id":153102,"url":"https://patchwork.plctlab.org/api/1.2/patches/153102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-28-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:11","name":"[v20,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-28-kmatsui@gcc.gnu.org/mbox/"},{"id":153104,"url":"https://patchwork.plctlab.org/api/1.2/patches/153104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-29-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:12","name":"[v20,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-29-kmatsui@gcc.gnu.org/mbox/"},{"id":153118,"url":"https://patchwork.plctlab.org/api/1.2/patches/153118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-30-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:13","name":"[v20,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-30-kmatsui@gcc.gnu.org/mbox/"},{"id":153086,"url":"https://patchwork.plctlab.org/api/1.2/patches/153086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-31-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:14","name":"[v20,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-31-kmatsui@gcc.gnu.org/mbox/"},{"id":153112,"url":"https://patchwork.plctlab.org/api/1.2/patches/153112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-32-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:15","name":"[v20,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-32-kmatsui@gcc.gnu.org/mbox/"},{"id":153098,"url":"https://patchwork.plctlab.org/api/1.2/patches/153098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-33-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:16","name":"[v20,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-33-kmatsui@gcc.gnu.org/mbox/"},{"id":153094,"url":"https://patchwork.plctlab.org/api/1.2/patches/153094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-34-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:17","name":"[v20,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-34-kmatsui@gcc.gnu.org/mbox/"},{"id":153101,"url":"https://patchwork.plctlab.org/api/1.2/patches/153101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-35-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:18","name":"[v20,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-35-kmatsui@gcc.gnu.org/mbox/"},{"id":153113,"url":"https://patchwork.plctlab.org/api/1.2/patches/153113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-36-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:19","name":"[v20,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-36-kmatsui@gcc.gnu.org/mbox/"},{"id":153080,"url":"https://patchwork.plctlab.org/api/1.2/patches/153080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-37-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:20","name":"[v20,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-37-kmatsui@gcc.gnu.org/mbox/"},{"id":153108,"url":"https://patchwork.plctlab.org/api/1.2/patches/153108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-38-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:21","name":"[v20,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-38-kmatsui@gcc.gnu.org/mbox/"},{"id":153110,"url":"https://patchwork.plctlab.org/api/1.2/patches/153110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-39-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:22","name":"[v20,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-39-kmatsui@gcc.gnu.org/mbox/"},{"id":153093,"url":"https://patchwork.plctlab.org/api/1.2/patches/153093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-40-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:23","name":"[v20,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-40-kmatsui@gcc.gnu.org/mbox/"},{"id":153107,"url":"https://patchwork.plctlab.org/api/1.2/patches/153107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-41-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:24","name":"[v20,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-41-kmatsui@gcc.gnu.org/mbox/"},{"id":153135,"url":"https://patchwork.plctlab.org/api/1.2/patches/153135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-2-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:12","name":"[1/3] LoongArch:Implement avg and sad standard names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-2-xujiahao@loongson.cn/mbox/"},{"id":153136,"url":"https://patchwork.plctlab.org/api/1.2/patches/153136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-3-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:13","name":"[2/3] LoongArch:Implement vec_widen standard names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-3-xujiahao@loongson.cn/mbox/"},{"id":153134,"url":"https://patchwork.plctlab.org/api/1.2/patches/153134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-4-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:14","name":"[3/3] LoongArch:Implement the new vector cost model framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-4-xujiahao@loongson.cn/mbox/"},{"id":153144,"url":"https://patchwork.plctlab.org/api/1.2/patches/153144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016023357.3394538-1-pinskia@gmail.com/","msgid":"<20231016023357.3394538-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-16T02:33:57","name":"[PR31531] MATCH: Improve ~a < ~b and ~a < CST, allow a nop cast inbetween ~ and a/b","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016023357.3394538-1-pinskia@gmail.com/mbox/"},{"id":153174,"url":"https://patchwork.plctlab.org/api/1.2/patches/153174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+cCGjnitL1eoxnkA0XML-NKqwJCUpx1dZiXAfezX-w1Tg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T03:55:36","name":"[v2] libstdc++: Workaround for LLVM-61763 in ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+cCGjnitL1eoxnkA0XML-NKqwJCUpx1dZiXAfezX-w1Tg@mail.gmail.com/mbox/"},{"id":153170,"url":"https://patchwork.plctlab.org/api/1.2/patches/153170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016035709.1390097-1-juzhe.zhong@rivai.ai/","msgid":"<20231016035709.1390097-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T03:57:09","name":"RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016035709.1390097-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153175,"url":"https://patchwork.plctlab.org/api/1.2/patches/153175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016050412.9960-1-ishitatsuyuki@gmail.com/","msgid":"<20231016050412.9960-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-10-16T05:04:12","name":"Do not prepend target triple to -fuse-ld=lld,mold.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016050412.9960-1-ishitatsuyuki@gmail.com/mbox/"},{"id":153208,"url":"https://patchwork.plctlab.org/api/1.2/patches/153208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-2-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:38","name":"[1/3] Initial Clear Water Forest Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-2-haochen.jiang@intel.com/mbox/"},{"id":153207,"url":"https://patchwork.plctlab.org/api/1.2/patches/153207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-3-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:39","name":"[2/3] x86: Add m_CORE_HYBRID for hybrid clients tuning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-3-haochen.jiang@intel.com/mbox/"},{"id":153209,"url":"https://patchwork.plctlab.org/api/1.2/patches/153209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-4-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:40","name":"[3/3] Initial Panther Lake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-4-haochen.jiang@intel.com/mbox/"},{"id":153258,"url":"https://patchwork.plctlab.org/api/1.2/patches/153258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016082715.3417414-1-juzhe.zhong@rivai.ai/","msgid":"<20231016082715.3417414-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T08:27:15","name":"RISC-V: Use VLS modes if the NITERS is known and smaller than VLS mode elements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016082715.3417414-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153278,"url":"https://patchwork.plctlab.org/api/1.2/patches/153278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com/","msgid":"<928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com>","list_archive_url":null,"date":"2023-10-16T09:18:45","name":"nvptx: Use fatal_error when -march= is missing not an assert [PR111093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com/mbox/"},{"id":153285,"url":"https://patchwork.plctlab.org/api/1.2/patches/153285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310160141130.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-10-16T09:41:26","name":"[RFA] PR target/111815: VAX: Only accept the index scaler as the RHS operand to ASHIFT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310160141130.5892@tpp.orcam.me.uk/mbox/"},{"id":153329,"url":"https://patchwork.plctlab.org/api/1.2/patches/153329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016110256.D4FF03858422@sourceware.org/","msgid":"<20231016110256.D4FF03858422@sourceware.org>","list_archive_url":null,"date":"2023-10-16T11:02:29","name":"tree-optimization/111807 - ICE in verify_sra_access_forest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016110256.D4FF03858422@sourceware.org/mbox/"},{"id":153343,"url":"https://patchwork.plctlab.org/api/1.2/patches/153343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016112013.512552-1-stefansf@linux.ibm.com/","msgid":"<20231016112013.512552-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-16T11:20:13","name":"s390: Fix expander popcountv8hi2_vx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016112013.512552-1-stefansf@linux.ibm.com/mbox/"},{"id":153349,"url":"https://patchwork.plctlab.org/api/1.2/patches/153349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016113108.877163-1-juzhe.zhong@rivai.ai/","msgid":"<20231016113108.877163-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T11:31:08","name":"[V2] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016113108.877163-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153365,"url":"https://patchwork.plctlab.org/api/1.2/patches/153365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898291CAEA27140073ADE93983D7A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T12:27:05","name":"[v2] AArch64: Add inline memmove expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898291CAEA27140073ADE93983D7A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":153406,"url":"https://patchwork.plctlab.org/api/1.2/patches/153406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/B5F16FC8-9E24-4826-9B7D-42404146DC27@pushface.org/","msgid":"","list_archive_url":null,"date":"2023-10-16T13:32:43","name":"Fix PR ada/111813 (Inconsistent limit in Ada.Calendar.Formatting)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/B5F16FC8-9E24-4826-9B7D-42404146DC27@pushface.org/mbox/"},{"id":153483,"url":"https://patchwork.plctlab.org/api/1.2/patches/153483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016141446.1942361-1-juzhe.zhong@rivai.ai/","msgid":"<20231016141446.1942361-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T14:14:46","name":"[V3] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016141446.1942361-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153493,"url":"https://patchwork.plctlab.org/api/1.2/patches/153493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016145250.139806-1-lehua.ding@rivai.ai/","msgid":"<20231016145250.139806-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-16T14:52:50","name":"RISC-V: Refactor and cleanup vsetvl pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016145250.139806-1-lehua.ding@rivai.ai/mbox/"},{"id":153495,"url":"https://patchwork.plctlab.org/api/1.2/patches/153495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016151048.1238073-1-jason@redhat.com/","msgid":"<20231016151048.1238073-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-16T15:10:48","name":"[pushed] c++: improve fold-expr location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016151048.1238073-1-jason@redhat.com/mbox/"},{"id":153695,"url":"https://patchwork.plctlab.org/api/1.2/patches/153695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a663b83c-356a-410c-871b-1897d12fd76a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T17:11:46","name":"fortran/intrinsic.texi: Add '\''passed by value'\'' to signal handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a663b83c-356a-410c-871b-1897d12fd76a@codesourcery.com/mbox/"},{"id":153712,"url":"https://patchwork.plctlab.org/api/1.2/patches/153712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016180107.2019608-1-manolis.tsamis@vrull.eu/","msgid":"<20231016180107.2019608-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-10-16T18:01:07","name":"[v7] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016180107.2019608-1-manolis.tsamis@vrull.eu/mbox/"},{"id":153714,"url":"https://patchwork.plctlab.org/api/1.2/patches/153714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182138.1304513-1-maskray@google.com/","msgid":"<20231016182138.1304513-1-maskray@google.com>","list_archive_url":null,"date":"2023-10-16T18:21:38","name":"[v5] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182138.1304513-1-maskray@google.com/mbox/"},{"id":153716,"url":"https://patchwork.plctlab.org/api/1.2/patches/153716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182447.bticawp4aps7tsso@google.com/","msgid":"<20231016182447.bticawp4aps7tsso@google.com>","list_archive_url":null,"date":"2023-10-16T18:24:47","name":"[v5] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182447.bticawp4aps7tsso@google.com/mbox/"},{"id":153721,"url":"https://patchwork.plctlab.org/api/1.2/patches/153721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-327edd0e-7e3a-45b6-9546-0df8a1315f96-1697483503726@3c-app-gmx-bap45/","msgid":"","list_archive_url":null,"date":"2023-10-16T19:11:43","name":"Fortran: out of bounds access with nested implied-do IO [PR111837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-327edd0e-7e3a-45b6-9546-0df8a1315f96-1697483503726@3c-app-gmx-bap45/mbox/"},{"id":153723,"url":"https://patchwork.plctlab.org/api/1.2/patches/153723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016194800.936405-1-vineetg@rivosinc.com/","msgid":"<20231016194800.936405-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-16T19:48:00","name":"[COMMITTED] RISC-V/testsuite: add a default march (lacking zfa) to some fp tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016194800.936405-1-vineetg@rivosinc.com/mbox/"},{"id":153727,"url":"https://patchwork.plctlab.org/api/1.2/patches/153727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com/","msgid":"<26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com>","list_archive_url":null,"date":"2023-10-16T20:04:47","name":"[committed] RISC-V: NFC: Move scalar block move expansion code into riscv-string.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com/mbox/"},{"id":153803,"url":"https://patchwork.plctlab.org/api/1.2/patches/153803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231028.60866-1-dmalcolm@redhat.com/","msgid":"<20231016231028.60866-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-16T23:10:28","name":"[pushed] diagnostics: fix missing initialization of context->extra_output_kind","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231028.60866-1-dmalcolm@redhat.com/mbox/"},{"id":153804,"url":"https://patchwork.plctlab.org/api/1.2/patches/153804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231032.60929-1-dmalcolm@redhat.com/","msgid":"<20231016231032.60929-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-16T23:10:32","name":"[pushed] diagnostics: special-case -fdiagnostics-text-art-charset=ascii for LANG=C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231032.60929-1-dmalcolm@redhat.com/mbox/"},{"id":153805,"url":"https://patchwork.plctlab.org/api/1.2/patches/153805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com/","msgid":"<6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com>","list_archive_url":null,"date":"2023-10-16T23:16:55","name":"[committed] Fix minor problem in stack probing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com/mbox/"},{"id":153806,"url":"https://patchwork.plctlab.org/api/1.2/patches/153806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232038.353641-1-juzhe.zhong@rivai.ai/","msgid":"<20231016232038.353641-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T23:20:38","name":"[V4] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232038.353641-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153819,"url":"https://patchwork.plctlab.org/api/1.2/patches/153819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232939.91393-1-egallager@gcc.gnu.org/","msgid":"<20231016232939.91393-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T23:29:40","name":"Add files to discourage submissions of PRs to the GitHub mirror.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232939.91393-1-egallager@gcc.gnu.org/mbox/"},{"id":153825,"url":"https://patchwork.plctlab.org/api/1.2/patches/153825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017002328.3165172-1-ibuclaw@gdcproject.org/","msgid":"<20231017002328.3165172-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-17T00:23:28","name":"[committed] d: Forbid taking the address of an intrinsic with no implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017002328.3165172-1-ibuclaw@gdcproject.org/mbox/"},{"id":153833,"url":"https://patchwork.plctlab.org/api/1.2/patches/153833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS3X2OsF1uE/DRW4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T00:39:52","name":"[v3] c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS3X2OsF1uE/DRW4@redhat.com/mbox/"},{"id":153897,"url":"https://patchwork.plctlab.org/api/1.2/patches/153897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017051327.110300-1-hongtao.liu@intel.com/","msgid":"<20231017051327.110300-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-17T05:13:27","name":"Support 32/64-bit vectorization for _Float16 fma related operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017051327.110300-1-hongtao.liu@intel.com/mbox/"},{"id":153928,"url":"https://patchwork.plctlab.org/api/1.2/patches/153928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017062640.9AACF3858C3A@sourceware.org/","msgid":"<20231017062640.9AACF3858C3A@sourceware.org>","list_archive_url":null,"date":"2023-10-17T06:26:07","name":"middle-end/111818 - failed DECL_NOT_GIMPLE_REG_P setting of volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017062640.9AACF3858C3A@sourceware.org/mbox/"},{"id":153929,"url":"https://patchwork.plctlab.org/api/1.2/patches/153929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017064324.1023901-1-juzhe.zhong@rivai.ai/","msgid":"<20231017064324.1023901-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-17T06:43:24","name":"[V4] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017064324.1023901-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153951,"url":"https://patchwork.plctlab.org/api/1.2/patches/153951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017073039.1485182-1-juzhe.zhong@rivai.ai/","msgid":"<20231017073039.1485182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-17T07:30:39","name":"RISC-V: Enable more tests for dynamic LMUL and bug fix[PR111832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017073039.1485182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153955,"url":"https://patchwork.plctlab.org/api/1.2/patches/153955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com/","msgid":"<33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com>","list_archive_url":null,"date":"2023-10-17T07:47:38","name":"fortran/intrinsic.texi: Improve SIGNAL intrinsic entry (was: [patch] fortran/intrinsic.texi: Add '\''passed by value'\'' to signal handler)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com/mbox/"},{"id":153960,"url":"https://patchwork.plctlab.org/api/1.2/patches/153960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS5B3eGzU6A8nMqW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-17T08:12:13","name":"wide-int-print: Don'\''t print large numbers hexadecimally for print_dec{,s,u}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS5B3eGzU6A8nMqW@tucnak/mbox/"},{"id":154021,"url":"https://patchwork.plctlab.org/api/1.2/patches/154021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de/","msgid":"<1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de>","list_archive_url":null,"date":"2023-10-17T09:52:17","name":"[avr,committed] Implement fma, fmal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de/mbox/"},{"id":154023,"url":"https://patchwork.plctlab.org/api/1.2/patches/154023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017095738.1081807-1-lehua.ding@rivai.ai/","msgid":"<20231017095738.1081807-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T09:57:38","name":"RISC-V: Fix failed testcase when use -cmodel=medany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017095738.1081807-1-lehua.ding@rivai.ai/mbox/"},{"id":154053,"url":"https://patchwork.plctlab.org/api/1.2/patches/154053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/652e636e.170a0220.9f5ea.3365@mx.google.com/","msgid":"<652e636e.170a0220.9f5ea.3365@mx.google.com>","list_archive_url":null,"date":"2023-10-17T10:35:21","name":"c++: Add missing auto_diagnostic_groups to constexpr.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/652e636e.170a0220.9f5ea.3365@mx.google.com/mbox/"},{"id":154089,"url":"https://patchwork.plctlab.org/api/1.2/patches/154089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-2-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:32","name":"[v21,01/30] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-2-kmatsui@gcc.gnu.org/mbox/"},{"id":154090,"url":"https://patchwork.plctlab.org/api/1.2/patches/154090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-3-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:33","name":"[v21,02/30] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-3-kmatsui@gcc.gnu.org/mbox/"},{"id":154098,"url":"https://patchwork.plctlab.org/api/1.2/patches/154098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-4-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:34","name":"[v21,03/30] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-4-kmatsui@gcc.gnu.org/mbox/"},{"id":154111,"url":"https://patchwork.plctlab.org/api/1.2/patches/154111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-5-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:35","name":"[v21,04/30] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-5-kmatsui@gcc.gnu.org/mbox/"},{"id":154102,"url":"https://patchwork.plctlab.org/api/1.2/patches/154102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-6-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:36","name":"[v21,05/30] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-6-kmatsui@gcc.gnu.org/mbox/"},{"id":154114,"url":"https://patchwork.plctlab.org/api/1.2/patches/154114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-7-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:37","name":"[v21,06/30] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-7-kmatsui@gcc.gnu.org/mbox/"},{"id":154110,"url":"https://patchwork.plctlab.org/api/1.2/patches/154110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-8-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:38","name":"[v21,07/30] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-8-kmatsui@gcc.gnu.org/mbox/"},{"id":154101,"url":"https://patchwork.plctlab.org/api/1.2/patches/154101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-9-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:39","name":"[v21,08/30] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-9-kmatsui@gcc.gnu.org/mbox/"},{"id":154117,"url":"https://patchwork.plctlab.org/api/1.2/patches/154117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-10-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:40","name":"[v21,09/30] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-10-kmatsui@gcc.gnu.org/mbox/"},{"id":154112,"url":"https://patchwork.plctlab.org/api/1.2/patches/154112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-11-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:41","name":"[v21,10/30] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-11-kmatsui@gcc.gnu.org/mbox/"},{"id":154124,"url":"https://patchwork.plctlab.org/api/1.2/patches/154124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-12-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:42","name":"[v21,11/30] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-12-kmatsui@gcc.gnu.org/mbox/"},{"id":154127,"url":"https://patchwork.plctlab.org/api/1.2/patches/154127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-13-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:43","name":"[v21,12/30] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-13-kmatsui@gcc.gnu.org/mbox/"},{"id":154109,"url":"https://patchwork.plctlab.org/api/1.2/patches/154109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-14-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:44","name":"[v21,13/30] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-14-kmatsui@gcc.gnu.org/mbox/"},{"id":154121,"url":"https://patchwork.plctlab.org/api/1.2/patches/154121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-15-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:45","name":"[v21,14/30] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-15-kmatsui@gcc.gnu.org/mbox/"},{"id":154104,"url":"https://patchwork.plctlab.org/api/1.2/patches/154104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-16-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:46","name":"[v21,15/30] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-16-kmatsui@gcc.gnu.org/mbox/"},{"id":154145,"url":"https://patchwork.plctlab.org/api/1.2/patches/154145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-17-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:47","name":"[v21,16/30] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-17-kmatsui@gcc.gnu.org/mbox/"},{"id":154142,"url":"https://patchwork.plctlab.org/api/1.2/patches/154142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-18-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:48","name":"[v21,17/30] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-18-kmatsui@gcc.gnu.org/mbox/"},{"id":154151,"url":"https://patchwork.plctlab.org/api/1.2/patches/154151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-19-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:49","name":"[v21,18/30] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-19-kmatsui@gcc.gnu.org/mbox/"},{"id":154119,"url":"https://patchwork.plctlab.org/api/1.2/patches/154119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-20-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:50","name":"[v21,19/30] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-20-kmatsui@gcc.gnu.org/mbox/"},{"id":154108,"url":"https://patchwork.plctlab.org/api/1.2/patches/154108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-21-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:51","name":"[v21,20/30] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-21-kmatsui@gcc.gnu.org/mbox/"},{"id":154134,"url":"https://patchwork.plctlab.org/api/1.2/patches/154134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-22-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:52","name":"[v21,21/30] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-22-kmatsui@gcc.gnu.org/mbox/"},{"id":154138,"url":"https://patchwork.plctlab.org/api/1.2/patches/154138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-23-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:53","name":"[v21,22/30] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-23-kmatsui@gcc.gnu.org/mbox/"},{"id":154148,"url":"https://patchwork.plctlab.org/api/1.2/patches/154148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-24-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:54","name":"[v21,23/30] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-24-kmatsui@gcc.gnu.org/mbox/"},{"id":154097,"url":"https://patchwork.plctlab.org/api/1.2/patches/154097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-25-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:55","name":"[v21,24/30] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-25-kmatsui@gcc.gnu.org/mbox/"},{"id":154132,"url":"https://patchwork.plctlab.org/api/1.2/patches/154132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-26-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:56","name":"[v21,25/30] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-26-kmatsui@gcc.gnu.org/mbox/"},{"id":154120,"url":"https://patchwork.plctlab.org/api/1.2/patches/154120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-27-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:57","name":"[v21,26/30] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-27-kmatsui@gcc.gnu.org/mbox/"},{"id":154125,"url":"https://patchwork.plctlab.org/api/1.2/patches/154125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-28-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:58","name":"[v21,27/30] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-28-kmatsui@gcc.gnu.org/mbox/"},{"id":154131,"url":"https://patchwork.plctlab.org/api/1.2/patches/154131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-29-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:59","name":"[v21,28/30] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-29-kmatsui@gcc.gnu.org/mbox/"},{"id":154115,"url":"https://patchwork.plctlab.org/api/1.2/patches/154115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-30-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:28:00","name":"[v21,29/30] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-30-kmatsui@gcc.gnu.org/mbox/"},{"id":154099,"url":"https://patchwork.plctlab.org/api/1.2/patches/154099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-31-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:28:01","name":"[v21,30/30] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-31-kmatsui@gcc.gnu.org/mbox/"},{"id":154091,"url":"https://patchwork.plctlab.org/api/1.2/patches/154091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-2-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:47","name":"[V2,01/14] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-2-lehua.ding@rivai.ai/mbox/"},{"id":154095,"url":"https://patchwork.plctlab.org/api/1.2/patches/154095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-3-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:48","name":"[V2,02/14] RISC-V: P2: Refactor and cleanup demand system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-3-lehua.ding@rivai.ai/mbox/"},{"id":154092,"url":"https://patchwork.plctlab.org/api/1.2/patches/154092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-4-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:49","name":"[V2,03/14] RISC-V: P3: Refactor vector_infos_manager","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-4-lehua.ding@rivai.ai/mbox/"},{"id":154094,"url":"https://patchwork.plctlab.org/api/1.2/patches/154094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-5-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:50","name":"[V2,04/14] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-5-lehua.ding@rivai.ai/mbox/"},{"id":154093,"url":"https://patchwork.plctlab.org/api/1.2/patches/154093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-6-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:51","name":"[V2,05/14] RISC-V: P5: combine phase 1 and 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-6-lehua.ding@rivai.ai/mbox/"},{"id":154100,"url":"https://patchwork.plctlab.org/api/1.2/patches/154100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-7-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:52","name":"[V2,06/14] RISC-V: P6: Add computing reaching definition data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-7-lehua.ding@rivai.ai/mbox/"},{"id":154096,"url":"https://patchwork.plctlab.org/api/1.2/patches/154096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-8-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:53","name":"[V2,07/14] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-8-lehua.ding@rivai.ai/mbox/"},{"id":154106,"url":"https://patchwork.plctlab.org/api/1.2/patches/154106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-9-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-9-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:54","name":"[V2,08/14] RISC-V: P8: Unified insert and delete of vsetvl insn into Phase 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-9-lehua.ding@rivai.ai/mbox/"},{"id":154103,"url":"https://patchwork.plctlab.org/api/1.2/patches/154103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-10-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-10-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:55","name":"[V2,09/14] RISC-V: P9: Cleanup post optimize phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-10-lehua.ding@rivai.ai/mbox/"},{"id":154118,"url":"https://patchwork.plctlab.org/api/1.2/patches/154118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-11-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-11-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:56","name":"[V2,10/14] RISC-V: P10: Cleanup helper functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-11-lehua.ding@rivai.ai/mbox/"},{"id":154113,"url":"https://patchwork.plctlab.org/api/1.2/patches/154113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-12-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-12-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:57","name":"[V2,11/14] RISC-V: P11: Adjust vector_block_info to vsetvl_block_info class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-12-lehua.ding@rivai.ai/mbox/"},{"id":154105,"url":"https://patchwork.plctlab.org/api/1.2/patches/154105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-13-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-13-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:58","name":"[V2,12/14] RISC-V: P12: Delete riscv-vsetvl.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-13-lehua.ding@rivai.ai/mbox/"},{"id":154128,"url":"https://patchwork.plctlab.org/api/1.2/patches/154128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-14-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-14-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:59","name":"[V2,13/14] RISC-V: P13: Reorganize functions used to modify RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-14-lehua.ding@rivai.ai/mbox/"},{"id":154123,"url":"https://patchwork.plctlab.org/api/1.2/patches/154123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-15-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-15-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:35:00","name":"[V2,14/14] RISC-V: P14: Adjust and add testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-15-lehua.ding@rivai.ai/mbox/"},{"id":154130,"url":"https://patchwork.plctlab.org/api/1.2/patches/154130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-2-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:22","name":"[v22,01/31] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-2-kmatsui@gcc.gnu.org/mbox/"},{"id":154107,"url":"https://patchwork.plctlab.org/api/1.2/patches/154107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-3-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:23","name":"[v22,02/31] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-3-kmatsui@gcc.gnu.org/mbox/"},{"id":154137,"url":"https://patchwork.plctlab.org/api/1.2/patches/154137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-4-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:24","name":"[v22,03/31] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-4-kmatsui@gcc.gnu.org/mbox/"},{"id":154155,"url":"https://patchwork.plctlab.org/api/1.2/patches/154155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-5-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:25","name":"[v22,04/31] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-5-kmatsui@gcc.gnu.org/mbox/"},{"id":154116,"url":"https://patchwork.plctlab.org/api/1.2/patches/154116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-6-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:26","name":"[v22,05/31] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-6-kmatsui@gcc.gnu.org/mbox/"},{"id":154133,"url":"https://patchwork.plctlab.org/api/1.2/patches/154133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-7-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:27","name":"[v22,06/31] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-7-kmatsui@gcc.gnu.org/mbox/"},{"id":154122,"url":"https://patchwork.plctlab.org/api/1.2/patches/154122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-8-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:28","name":"[v22,07/31] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-8-kmatsui@gcc.gnu.org/mbox/"},{"id":154135,"url":"https://patchwork.plctlab.org/api/1.2/patches/154135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-9-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:29","name":"[v22,08/31] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-9-kmatsui@gcc.gnu.org/mbox/"},{"id":154153,"url":"https://patchwork.plctlab.org/api/1.2/patches/154153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-10-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:30","name":"[v22,09/31] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-10-kmatsui@gcc.gnu.org/mbox/"},{"id":154141,"url":"https://patchwork.plctlab.org/api/1.2/patches/154141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-11-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:31","name":"[v22,10/31] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-11-kmatsui@gcc.gnu.org/mbox/"},{"id":154162,"url":"https://patchwork.plctlab.org/api/1.2/patches/154162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-12-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:32","name":"[v22,11/31] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-12-kmatsui@gcc.gnu.org/mbox/"},{"id":154129,"url":"https://patchwork.plctlab.org/api/1.2/patches/154129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-13-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:33","name":"[v22,12/31] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-13-kmatsui@gcc.gnu.org/mbox/"},{"id":154154,"url":"https://patchwork.plctlab.org/api/1.2/patches/154154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-14-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:34","name":"[v22,13/31] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-14-kmatsui@gcc.gnu.org/mbox/"},{"id":154143,"url":"https://patchwork.plctlab.org/api/1.2/patches/154143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-15-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:35","name":"[v22,14/31] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-15-kmatsui@gcc.gnu.org/mbox/"},{"id":154157,"url":"https://patchwork.plctlab.org/api/1.2/patches/154157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-16-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:36","name":"[v22,15/31] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-16-kmatsui@gcc.gnu.org/mbox/"},{"id":154147,"url":"https://patchwork.plctlab.org/api/1.2/patches/154147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-17-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:37","name":"[v22,16/31] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-17-kmatsui@gcc.gnu.org/mbox/"},{"id":154159,"url":"https://patchwork.plctlab.org/api/1.2/patches/154159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-18-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:38","name":"[v22,17/31] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-18-kmatsui@gcc.gnu.org/mbox/"},{"id":154152,"url":"https://patchwork.plctlab.org/api/1.2/patches/154152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-19-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:39","name":"[v22,18/31] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-19-kmatsui@gcc.gnu.org/mbox/"},{"id":154144,"url":"https://patchwork.plctlab.org/api/1.2/patches/154144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-20-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:40","name":"[v22,19/31] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-20-kmatsui@gcc.gnu.org/mbox/"},{"id":154158,"url":"https://patchwork.plctlab.org/api/1.2/patches/154158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-21-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:41","name":"[v22,20/31] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-21-kmatsui@gcc.gnu.org/mbox/"},{"id":154136,"url":"https://patchwork.plctlab.org/api/1.2/patches/154136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-22-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:42","name":"[v22,21/31] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-22-kmatsui@gcc.gnu.org/mbox/"},{"id":154160,"url":"https://patchwork.plctlab.org/api/1.2/patches/154160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-23-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:43","name":"[v22,22/31] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-23-kmatsui@gcc.gnu.org/mbox/"},{"id":154140,"url":"https://patchwork.plctlab.org/api/1.2/patches/154140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-24-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:44","name":"[v22,23/31] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-24-kmatsui@gcc.gnu.org/mbox/"},{"id":154146,"url":"https://patchwork.plctlab.org/api/1.2/patches/154146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-25-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:45","name":"[v22,24/31] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-25-kmatsui@gcc.gnu.org/mbox/"},{"id":154156,"url":"https://patchwork.plctlab.org/api/1.2/patches/154156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-26-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:46","name":"[v22,25/31] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-26-kmatsui@gcc.gnu.org/mbox/"},{"id":154150,"url":"https://patchwork.plctlab.org/api/1.2/patches/154150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-27-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:47","name":"[v22,26/31] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-27-kmatsui@gcc.gnu.org/mbox/"},{"id":154126,"url":"https://patchwork.plctlab.org/api/1.2/patches/154126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-28-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:48","name":"[v22,27/31] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-28-kmatsui@gcc.gnu.org/mbox/"},{"id":154161,"url":"https://patchwork.plctlab.org/api/1.2/patches/154161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-29-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:49","name":"[v22,28/31] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-29-kmatsui@gcc.gnu.org/mbox/"},{"id":154139,"url":"https://patchwork.plctlab.org/api/1.2/patches/154139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-30-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:50","name":"[v22,29/31] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-30-kmatsui@gcc.gnu.org/mbox/"},{"id":154149,"url":"https://patchwork.plctlab.org/api/1.2/patches/154149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-31-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:51","name":"[v22,30/31] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-31-kmatsui@gcc.gnu.org/mbox/"},{"id":154163,"url":"https://patchwork.plctlab.org/api/1.2/patches/154163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-32-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:52","name":"[v22,31/31] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-32-kmatsui@gcc.gnu.org/mbox/"},{"id":154250,"url":"https://patchwork.plctlab.org/api/1.2/patches/154250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017122742.0FFAB385C6DB@sourceware.org/","msgid":"<20231017122742.0FFAB385C6DB@sourceware.org>","list_archive_url":null,"date":"2023-10-17T12:27:11","name":"tree-optimization/111846 - put simd-clone-info into SLP tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017122742.0FFAB385C6DB@sourceware.org/mbox/"},{"id":154265,"url":"https://patchwork.plctlab.org/api/1.2/patches/154265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com/","msgid":"<007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-17T13:08:57","name":"[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com/mbox/"},{"id":154294,"url":"https://patchwork.plctlab.org/api/1.2/patches/154294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com/","msgid":"<319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com>","list_archive_url":null,"date":"2023-10-17T13:21:56","name":"[v10] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com/mbox/"},{"id":154300,"url":"https://patchwork.plctlab.org/api/1.2/patches/154300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017140706.21281-1-xry111@xry111.site/","msgid":"<20231017140706.21281-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-17T14:06:47","name":"LoongArch: Use fcmp.caf.s instead of movgr2cf for zeroing a fcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017140706.21281-1-xry111@xry111.site/mbox/"},{"id":154408,"url":"https://patchwork.plctlab.org/api/1.2/patches/154408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017180728.11846-1-vineetg@rivosinc.com/","msgid":"<20231017180728.11846-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T18:07:28","name":"RISC-V/testsuite/pr111466.c: fix expected output to not detect SEXT.W","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017180728.11846-1-vineetg@rivosinc.com/mbox/"},{"id":154417,"url":"https://patchwork.plctlab.org/api/1.2/patches/154417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017185153.90833-1-vineetg@rivosinc.com/","msgid":"<20231017185153.90833-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T18:51:53","name":"[v2] RISC-V/testsuite/pr111466.c: update test and expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017185153.90833-1-vineetg@rivosinc.com/mbox/"},{"id":154425,"url":"https://patchwork.plctlab.org/api/1.2/patches/154425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com/","msgid":"<022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-17T19:05:49","name":"[x86] PR target/110511: Fix reg allocation for widening multiplications.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com/mbox/"},{"id":154491,"url":"https://patchwork.plctlab.org/api/1.2/patches/154491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017201425.98668-1-vineetg@rivosinc.com/","msgid":"<20231017201425.98668-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T20:14:25","name":"[COMMITTED] RISC-V/testsuite/pr111466.c: update test and expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017201425.98668-1-vineetg@rivosinc.com/mbox/"},{"id":154519,"url":"https://patchwork.plctlab.org/api/1.2/patches/154519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yiPmkNmgUNDrh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:00","name":"[01/11] rtl-ssa: Fix bug in function_info::add_insn_after","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yiPmkNmgUNDrh@arm.com/mbox/"},{"id":154524,"url":"https://patchwork.plctlab.org/api/1.2/patches/154524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yomVmZjy4PJK1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:26","name":"[02/11] rtl-ssa: Add drop_memory_access helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yomVmZjy4PJK1@arm.com/mbox/"},{"id":154525,"url":"https://patchwork.plctlab.org/api/1.2/patches/154525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yvoPreGQ+BDt5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:54","name":"[03/11] rtl-ssa: Add entry point to allow re-parenting uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yvoPreGQ+BDt5@arm.com/mbox/"},{"id":154526,"url":"https://patchwork.plctlab.org/api/1.2/patches/154526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y4oIFl/ju3DZu@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:47:30","name":"[04/11] rtl-ssa: Support inferring uses of mem in change_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y4oIFl/ju3DZu@arm.com/mbox/"},{"id":154527,"url":"https://patchwork.plctlab.org/api/1.2/patches/154527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y+bf7KQk28SIH@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:47:53","name":"[05/11] rtl-ssa: Support for inserting new insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y+bf7KQk28SIH@arm.com/mbox/"},{"id":154528,"url":"https://patchwork.plctlab.org/api/1.2/patches/154528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zE+uo4mdL6dr4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:48:19","name":"[06/11] haifa-sched: Allow for NOTE_INSN_DELETED at start of epilogue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zE+uo4mdL6dr4@arm.com/mbox/"},{"id":154529,"url":"https://patchwork.plctlab.org/api/1.2/patches/154529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zMtkX9y9QzmO6@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:48:50","name":"[07/11] aarch64, testsuite: Prevent stp in lr_free_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zMtkX9y9QzmO6@arm.com/mbox/"},{"id":154530,"url":"https://patchwork.plctlab.org/api/1.2/patches/154530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zS9xTDJNnjpQl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:49:15","name":"[08/11] aarch64, testsuite: Tweak sve/pcs/args_9.c to allow stps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zS9xTDJNnjpQl@arm.com/mbox/"},{"id":154531,"url":"https://patchwork.plctlab.org/api/1.2/patches/154531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zZtFfaT6+QUen@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:49:42","name":"[09/11] aarch64, testsuite: Fix up pr71727.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zZtFfaT6+QUen@arm.com/mbox/"},{"id":154532,"url":"https://patchwork.plctlab.org/api/1.2/patches/154532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7ziVpbMVpY2aU6@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:50:17","name":"[10/11] aarch64: Generalise TFmode load/store pair patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7ziVpbMVpY2aU6@arm.com/mbox/"},{"id":154534,"url":"https://patchwork.plctlab.org/api/1.2/patches/154534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zrn0Hp4EWRvav@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:50:54","name":"[11/11] aarch64: Add new load/store pair fusion pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zrn0Hp4EWRvav@arm.com/mbox/"},{"id":154576,"url":"https://patchwork.plctlab.org/api/1.2/patches/154576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213110.1485201-1-jason@redhat.com/","msgid":"<20231017213110.1485201-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-17T21:31:10","name":"[pushed] c++: mangling tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213110.1485201-1-jason@redhat.com/mbox/"},{"id":154577,"url":"https://patchwork.plctlab.org/api/1.2/patches/154577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213826.1040138-1-polacek@redhat.com/","msgid":"<20231017213826.1040138-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-17T21:38:26","name":"c++: accepts-invalid with =delete(\"\") [PR111840]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213826.1040138-1-polacek@redhat.com/mbox/"},{"id":154584,"url":"https://patchwork.plctlab.org/api/1.2/patches/154584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cnk3ly6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:48:01","name":"[1/2] aarch64: Use vecs to store register save order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cnk3ly6.fsf@arm.com/mbox/"},{"id":154585,"url":"https://patchwork.plctlab.org/api/1.2/patches/154585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qds3lwq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:48:53","name":"[2/2] aarch64: Put LR save slot first in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qds3lwq.fsf@arm.com/mbox/"},{"id":154602,"url":"https://patchwork.plctlab.org/api/1.2/patches/154602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620B67E5DAFB16E5BE35BF4ACD6A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:50:40","name":"libstdc++: testsuite: Enhance codecvt_unicode with tests for length()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620B67E5DAFB16E5BE35BF4ACD6A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":154609,"url":"https://patchwork.plctlab.org/api/1.2/patches/154609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018012009.849697-1-pan2.li@intel.com/","msgid":"<20231018012009.849697-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-18T01:20:09","name":"[v1] RISC-V: Remove the type size restriction of vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018012009.849697-1-pan2.li@intel.com/mbox/"},{"id":154626,"url":"https://patchwork.plctlab.org/api/1.2/patches/154626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018043259.1873023-1-juzhe.zhong@rivai.ai/","msgid":"<20231018043259.1873023-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T04:32:59","name":"RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018043259.1873023-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154660,"url":"https://patchwork.plctlab.org/api/1.2/patches/154660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb808aab-2d4b-0d0d-8fa2-f3693bcd4bf1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T05:09:15","name":"vect: Cost adjacent vector loads/stores together [PR111784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb808aab-2d4b-0d0d-8fa2-f3693bcd4bf1@linux.ibm.com/mbox/"},{"id":154743,"url":"https://patchwork.plctlab.org/api/1.2/patches/154743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081020.1919314-1-haochen.jiang@intel.com/","msgid":"<20231018081020.1919314-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-18T08:10:20","name":"x86: Correct ISA enabled for clients since Arrow Lake","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081020.1919314-1-haochen.jiang@intel.com/mbox/"},{"id":154745,"url":"https://patchwork.plctlab.org/api/1.2/patches/154745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081831.A7A333856943@sourceware.org/","msgid":"<20231018081831.A7A333856943@sourceware.org>","list_archive_url":null,"date":"2023-10-18T08:17:55","name":"Re-instantiate integer mask to traditional vector mask support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081831.A7A333856943@sourceware.org/mbox/"},{"id":154755,"url":"https://patchwork.plctlab.org/api/1.2/patches/154755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018083259.2386650-1-hongtao.liu@intel.com/","msgid":"<20231018083259.2386650-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-18T08:32:59","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big. 65; 6800; 1c There'\''s loop in vect_peel_nonlinear_iv_init to get init_expr * pow (step_expr, skip_niters). When skipn_iters is to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018083259.2386650-1-hongtao.liu@intel.com/mbox/"},{"id":154770,"url":"https://patchwork.plctlab.org/api/1.2/patches/154770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01d52528-7616-422a-8e8f-6073af049b39@gmail.com/","msgid":"<01d52528-7616-422a-8e8f-6073af049b39@gmail.com>","list_archive_url":null,"date":"2023-10-18T09:20:04","name":"RISC-V: Add popcount fallback expander.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01d52528-7616-422a-8e8f-6073af049b39@gmail.com/mbox/"},{"id":154786,"url":"https://patchwork.plctlab.org/api/1.2/patches/154786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018094044.66965-1-iain@sandoe.co.uk/","msgid":"<20231018094044.66965-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-18T09:40:44","name":"[pushed] Darwin: Check as for .build_version support and use it if available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018094044.66965-1-iain@sandoe.co.uk/mbox/"},{"id":154790,"url":"https://patchwork.plctlab.org/api/1.2/patches/154790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS+tXfdF8uqZRvjQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-18T10:03:09","name":"tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS+tXfdF8uqZRvjQ@tucnak/mbox/"},{"id":154794,"url":"https://patchwork.plctlab.org/api/1.2/patches/154794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102149.2634849-1-juzhe.zhong@rivai.ai/","msgid":"<20231018102149.2634849-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T10:21:49","name":"RISC-V: Fix failed hoist in LICM of vmv.v.x instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102149.2634849-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154795,"url":"https://patchwork.plctlab.org/api/1.2/patches/154795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102533.2643245-1-juzhe.zhong@rivai.ai/","msgid":"<20231018102533.2643245-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T10:25:33","name":"[V2] RISC-V: Fix failed hoist in LICM of vmv.v.x instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102533.2643245-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154854,"url":"https://patchwork.plctlab.org/api/1.2/patches/154854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB162045D122DE0DE016CE0A26ACD5A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-10-18T10:52:20","name":"[v2] libstdc++: testsuite: Enhance codecvt_unicode with tests for length()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB162045D122DE0DE016CE0A26ACD5A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":154813,"url":"https://patchwork.plctlab.org/api/1.2/patches/154813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com/","msgid":"<8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com>","list_archive_url":null,"date":"2023-10-18T10:56:01","name":"OpenMP: Avoid ICE with LTO and '\''omp allocate (was: [Patch] Fortran: Support OpenMP'\''s '\''allocate'\'' directive for stack vars)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com/mbox/"},{"id":154867,"url":"https://patchwork.plctlab.org/api/1.2/patches/154867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018123642.427403-1-juzhe.zhong@rivai.ai/","msgid":"<20231018123642.427403-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T12:36:42","name":"[V5] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018123642.427403-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154904,"url":"https://patchwork.plctlab.org/api/1.2/patches/154904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8a4dc84-c867-441a-93d6-8a3c932f0fa6@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T14:19:22","name":"vect: Allow same precision for bit-precision conversions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8a4dc84-c867-441a-93d6-8a3c932f0fa6@gmail.com/mbox/"},{"id":154910,"url":"https://patchwork.plctlab.org/api/1.2/patches/154910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com/","msgid":"<8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com>","list_archive_url":null,"date":"2023-10-18T14:41:17","name":"[PATCH6/8] omp: Reorder call for TARGET_SIMD_CLONE_ADJUST (was Re: [PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com/mbox/"},{"id":154909,"url":"https://patchwork.plctlab.org/api/1.2/patches/154909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f996e7f4-316f-4e76-b2b6-a83b4cd088f1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T14:41:30","name":"[0/8] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f996e7f4-316f-4e76-b2b6-a83b4cd088f1@arm.com/mbox/"},{"id":154920,"url":"https://patchwork.plctlab.org/api/1.2/patches/154920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-2-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:42","name":"[V2,1/7] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-2-victor.donascimento@arm.com/mbox/"},{"id":154922,"url":"https://patchwork.plctlab.org/api/1.2/patches/154922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-3-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:43","name":"[V2,2/7] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-3-victor.donascimento@arm.com/mbox/"},{"id":154924,"url":"https://patchwork.plctlab.org/api/1.2/patches/154924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-4-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:44","name":"[V2,3/7] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-4-victor.donascimento@arm.com/mbox/"},{"id":154918,"url":"https://patchwork.plctlab.org/api/1.2/patches/154918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-5-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:45","name":"[V2,4/7] aarch64: Add basic target_print_operand support for CONST_STRING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-5-victor.donascimento@arm.com/mbox/"},{"id":154919,"url":"https://patchwork.plctlab.org/api/1.2/patches/154919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-6-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:46","name":"[V2,5/7] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-6-victor.donascimento@arm.com/mbox/"},{"id":154923,"url":"https://patchwork.plctlab.org/api/1.2/patches/154923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-7-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:47","name":"[V2,6/7] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-7-victor.donascimento@arm.com/mbox/"},{"id":154921,"url":"https://patchwork.plctlab.org/api/1.2/patches/154921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-8-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-8-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:48","name":"[V2,7/7] aarch64: Add system register duplication check selftest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-8-victor.donascimento@arm.com/mbox/"},{"id":154933,"url":"https://patchwork.plctlab.org/api/1.2/patches/154933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com/","msgid":"<90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:24:36","name":"aarch64: Replace duplicated selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com/mbox/"},{"id":154936,"url":"https://patchwork.plctlab.org/api/1.2/patches/154936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com/","msgid":"<2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:42:36","name":"[1/3] Add support for target_version attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com/mbox/"},{"id":154937,"url":"https://patchwork.plctlab.org/api/1.2/patches/154937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com/","msgid":"<3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:44:08","name":"[2/3,aarch64] Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com/mbox/"},{"id":154938,"url":"https://patchwork.plctlab.org/api/1.2/patches/154938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com/","msgid":"<36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:44:55","name":"[3/3] WIP/RFC: Fix name mangling for target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com/mbox/"},{"id":154973,"url":"https://patchwork.plctlab.org/api/1.2/patches/154973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018162838.3531886-1-ppalka@redhat.com/","msgid":"<20231018162838.3531886-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-18T16:28:38","name":"c++/modules: ICE with lambda initializing local var [PR105322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018162838.3531886-1-ppalka@redhat.com/mbox/"},{"id":154982,"url":"https://patchwork.plctlab.org/api/1.2/patches/154982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de/","msgid":"<4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de>","list_archive_url":null,"date":"2023-10-18T17:03:57","name":"[avr,committed] LibF7: Implement a function that was missing for devices without MUL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de/mbox/"},{"id":155022,"url":"https://patchwork.plctlab.org/api/1.2/patches/155022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018171842.266046-1-dimitar@dinux.eu/","msgid":"<20231018171842.266046-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-10-18T17:18:42","name":"[committed] pru: Implement TARGET_INSN_COST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018171842.266046-1-dimitar@dinux.eu/mbox/"},{"id":155192,"url":"https://patchwork.plctlab.org/api/1.2/patches/155192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018211542.1516517-1-lhyatt@gmail.com/","msgid":"<20231018211542.1516517-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-10-18T21:15:42","name":"c++: Make -Wunknown-pragmas controllable by #pragma GCC diagnostic [PR89038]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018211542.1516517-1-lhyatt@gmail.com/mbox/"},{"id":155201,"url":"https://patchwork.plctlab.org/api/1.2/patches/155201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018223432.2519596-1-pinskia@gmail.com/","msgid":"<20231018223432.2519596-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-18T22:34:32","name":"[COMMITTED] Fix expansion of `(a & 2) != 1`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018223432.2519596-1-pinskia@gmail.com/mbox/"},{"id":155233,"url":"https://patchwork.plctlab.org/api/1.2/patches/155233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBxkkoelVIxvnEy@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:00:18","name":"[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBxkkoelVIxvnEy@cowardly-lion.the-meissners.org/mbox/"},{"id":155234,"url":"https://patchwork.plctlab.org/api/1.2/patches/155234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBx8rGikeUfgp1c@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:01:54","name":"[3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBx8rGikeUfgp1c@cowardly-lion.the-meissners.org/mbox/"},{"id":155235,"url":"https://patchwork.plctlab.org/api/1.2/patches/155235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTByNkF+jxxDIyEK@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:03:02","name":"[4/6] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTByNkF+jxxDIyEK@cowardly-lion.the-meissners.org/mbox/"},{"id":155236,"url":"https://patchwork.plctlab.org/api/1.2/patches/155236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBynMSpnS9pUvel@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:04:44","name":"[5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBynMSpnS9pUvel@cowardly-lion.the-meissners.org/mbox/"},{"id":155237,"url":"https://patchwork.plctlab.org/api/1.2/patches/155237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBy/OekceZLGEAo@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:06:20","name":"[6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBy/OekceZLGEAo@cowardly-lion.the-meissners.org/mbox/"},{"id":155279,"url":"https://patchwork.plctlab.org/api/1.2/patches/155279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019040519.2655598-1-pinskia@gmail.com/","msgid":"<20231019040519.2655598-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T04:05:19","name":"aarch64: [PR110986] Emit csinv again for `a ? ~b : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019040519.2655598-1-pinskia@gmail.com/mbox/"},{"id":155319,"url":"https://patchwork.plctlab.org/api/1.2/patches/155319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f61f9026-94b3-497b-bbe5-807054399500@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T04:55:48","name":"[_Hashtable] Fix merge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f61f9026-94b3-497b-bbe5-807054399500@gmail.com/mbox/"},{"id":155326,"url":"https://patchwork.plctlab.org/api/1.2/patches/155326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019061422.281377-1-hongtao.liu@intel.com/","msgid":"<20231019061422.281377-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-19T06:14:22","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019061422.281377-1-hongtao.liu@intel.com/mbox/"},{"id":155328,"url":"https://patchwork.plctlab.org/api/1.2/patches/155328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019063128.512979-1-haochen.jiang@intel.com/","msgid":"<20231019063128.512979-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-19T06:31:28","name":"[v2] x86: Correct ISA enabled for clients since Arrow Lake","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019063128.512979-1-haochen.jiang@intel.com/mbox/"},{"id":155358,"url":"https://patchwork.plctlab.org/api/1.2/patches/155358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhrdowb.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T07:58:44","name":"return edge in make_eh_edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhrdowb.fsf@lxoliva.fsfla.org/mbox/"},{"id":155372,"url":"https://patchwork.plctlab.org/api/1.2/patches/155372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-2-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:23","name":"[V3,01/11] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info/vector_block_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-2-lehua.ding@rivai.ai/mbox/"},{"id":155369,"url":"https://patchwork.plctlab.org/api/1.2/patches/155369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-3-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:24","name":"[V3,02/11] RISC-V: P2: Refactor and cleanup demand system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-3-lehua.ding@rivai.ai/mbox/"},{"id":155373,"url":"https://patchwork.plctlab.org/api/1.2/patches/155373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-4-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:25","name":"[V3,03/11] RISC-V: P3: Refactor vector_infos_manager","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-4-lehua.ding@rivai.ai/mbox/"},{"id":155371,"url":"https://patchwork.plctlab.org/api/1.2/patches/155371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-5-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:26","name":"[V3,04/11] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-5-lehua.ding@rivai.ai/mbox/"},{"id":155374,"url":"https://patchwork.plctlab.org/api/1.2/patches/155374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-6-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:27","name":"[V3,05/11] RISC-V: P5: Combine phase 1 and 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-6-lehua.ding@rivai.ai/mbox/"},{"id":155380,"url":"https://patchwork.plctlab.org/api/1.2/patches/155380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-7-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:28","name":"[V3,06/11] RISC-V: P6: Add computing reaching definition data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-7-lehua.ding@rivai.ai/mbox/"},{"id":155379,"url":"https://patchwork.plctlab.org/api/1.2/patches/155379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-8-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:29","name":"[V3,07/11] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-8-lehua.ding@rivai.ai/mbox/"},{"id":155376,"url":"https://patchwork.plctlab.org/api/1.2/patches/155376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-9-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-9-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:30","name":"[V3,08/11] RISC-V: P8: Refactor emit-vsetvl phase and delete post optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-9-lehua.ding@rivai.ai/mbox/"},{"id":155378,"url":"https://patchwork.plctlab.org/api/1.2/patches/155378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-10-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-10-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:31","name":"[V3,09/11] RISC-V: P9: Cleanup and reorganize helper functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-10-lehua.ding@rivai.ai/mbox/"},{"id":155382,"url":"https://patchwork.plctlab.org/api/1.2/patches/155382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-11-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-11-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:32","name":"[V3,10/11] RISC-V: P10: Delete riscv-vsetvl.h and adjust riscv-vsetvl.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-11-lehua.ding@rivai.ai/mbox/"},{"id":155381,"url":"https://patchwork.plctlab.org/api/1.2/patches/155381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-12-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-12-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:33","name":"[V3,11/11] RISC-V: P11: Adjust and add testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-12-lehua.ding@rivai.ai/mbox/"},{"id":155395,"url":"https://patchwork.plctlab.org/api/1.2/patches/155395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il73rohj.fsf@oldenburg.str.redhat.com/","msgid":"<87il73rohj.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-19T08:43:52","name":"c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il73rohj.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155396,"url":"https://patchwork.plctlab.org/api/1.2/patches/155396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b46ca497-0070-47c5-bdde-7d69390d35fb@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T08:58:13","name":"[committed] amdgcn: deprecate Fiji device and multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b46ca497-0070-47c5-bdde-7d69390d35fb@codesourcery.com/mbox/"},{"id":155406,"url":"https://patchwork.plctlab.org/api/1.2/patches/155406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8b37ye7.fsf@euler.schwinge.homeip.net/","msgid":"<87v8b37ye7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-10-19T09:30:08","name":"Enable top-level recursive '\''autoreconf'\'' (was: Hints on reconfiguring GCC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8b37ye7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":155416,"url":"https://patchwork.plctlab.org/api/1.2/patches/155416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b430291b-4cb0-4a81-8d58-9d5268d17c95@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T09:49:14","name":"wwwdocs: gcc-14: mark amdgcn fiji deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b430291b-4cb0-4a81-8d58-9d5268d17c95@codesourcery.com/mbox/"},{"id":155457,"url":"https://patchwork.plctlab.org/api/1.2/patches/155457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114725.E7DBE385840A@sourceware.org/","msgid":"<20231019114725.E7DBE385840A@sourceware.org>","list_archive_url":null,"date":"2023-10-19T11:46:58","name":"[1/2] Refactor x86 vectorized gather path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114725.E7DBE385840A@sourceware.org/mbox/"},{"id":155458,"url":"https://patchwork.plctlab.org/api/1.2/patches/155458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114804.055643858438@sourceware.org/","msgid":"<20231019114804.055643858438@sourceware.org>","list_archive_url":null,"date":"2023-10-19T11:47:14","name":"[2/2] tree-optimization/111131 - SLP for non-IFN gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114804.055643858438@sourceware.org/mbox/"},{"id":155494,"url":"https://patchwork.plctlab.org/api/1.2/patches/155494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17859-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:29:54","name":"middle-end: don'\''t create LC-SSA PHI variables for PHI nodes who dominate loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17859-tamar@arm.com/mbox/"},{"id":155500,"url":"https://patchwork.plctlab.org/api/1.2/patches/155500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89829CCDE1529CE888C094AF83D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:43:00","name":"AArch64: Improve immediate generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89829CCDE1529CE888C094AF83D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":155502,"url":"https://patchwork.plctlab.org/api/1.2/patches/155502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898262EC1D06EA3207A4372483D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:51:14","name":"AArch64: Cleanup memset expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898262EC1D06EA3207A4372483D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":155569,"url":"https://patchwork.plctlab.org/api/1.2/patches/155569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-2-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:25","name":"[1/3,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-2-Ezra.Sitorus@arm.com/mbox/"},{"id":155570,"url":"https://patchwork.plctlab.org/api/1.2/patches/155570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-3-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:26","name":"[2/3,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-3-Ezra.Sitorus@arm.com/mbox/"},{"id":155567,"url":"https://patchwork.plctlab.org/api/1.2/patches/155567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-4-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:27","name":"[3/3,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-4-Ezra.Sitorus@arm.com/mbox/"},{"id":155582,"url":"https://patchwork.plctlab.org/api/1.2/patches/155582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-2-xry111@xry111.site/","msgid":"<20231019140300.50323-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:56","name":"[1/5] LoongArch: Add enum-style -mexplicit-relocs= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-2-xry111@xry111.site/mbox/"},{"id":155586,"url":"https://patchwork.plctlab.org/api/1.2/patches/155586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-3-xry111@xry111.site/","msgid":"<20231019140300.50323-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:57","name":"[2/5] LoongArch: Use explicit relocs for GOT access when -mexplicit-relocs=auto and LTO during a final link with linker plugin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-3-xry111@xry111.site/mbox/"},{"id":155580,"url":"https://patchwork.plctlab.org/api/1.2/patches/155580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140257.360669-1-dmalcolm@redhat.com/","msgid":"<20231019140257.360669-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-19T14:02:57","name":"[RFC] Add function attribute: null_terminated_string_arg(PARAM_IDX)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140257.360669-1-dmalcolm@redhat.com/mbox/"},{"id":155583,"url":"https://patchwork.plctlab.org/api/1.2/patches/155583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-4-xry111@xry111.site/","msgid":"<20231019140300.50323-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:58","name":"[3/5] LoongArch: Use explicit relocs for TLS access with -mexplicit-relocs=auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-4-xry111@xry111.site/mbox/"},{"id":155585,"url":"https://patchwork.plctlab.org/api/1.2/patches/155585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-6-xry111@xry111.site/","msgid":"<20231019140300.50323-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:03:00","name":"[5/5] LoongArch: Document -mexplicit-relocs={auto,none,always}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-6-xry111@xry111.site/mbox/"},{"id":155623,"url":"https://patchwork.plctlab.org/api/1.2/patches/155623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144130.339314-1-poulhies@adacore.com/","msgid":"<20231019144130.339314-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:30","name":"[COMMITTED] ada: Simplify \"not Present\" with \"No\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144130.339314-1-poulhies@adacore.com/mbox/"},{"id":155624,"url":"https://patchwork.plctlab.org/api/1.2/patches/155624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144150.339469-1-poulhies@adacore.com/","msgid":"<20231019144150.339469-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:50","name":"[COMMITTED] ada: Seize opportunity to reuse List_Length","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144150.339469-1-poulhies@adacore.com/mbox/"},{"id":155625,"url":"https://patchwork.plctlab.org/api/1.2/patches/155625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144156.339532-1-poulhies@adacore.com/","msgid":"<20231019144156.339532-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:53","name":"[COMMITTED] ada: Document gnatbind -Q switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144156.339532-1-poulhies@adacore.com/mbox/"},{"id":155626,"url":"https://patchwork.plctlab.org/api/1.2/patches/155626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144159.339597-1-poulhies@adacore.com/","msgid":"<20231019144159.339597-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:58","name":"[COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144159.339597-1-poulhies@adacore.com/mbox/"},{"id":155627,"url":"https://patchwork.plctlab.org/api/1.2/patches/155627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144202.339662-1-poulhies@adacore.com/","msgid":"<20231019144202.339662-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:42:02","name":"[COMMITTED] ada: Refactor code to remove GNATcheck violation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144202.339662-1-poulhies@adacore.com/mbox/"},{"id":155628,"url":"https://patchwork.plctlab.org/api/1.2/patches/155628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144206.339725-1-poulhies@adacore.com/","msgid":"<20231019144206.339725-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:42:04","name":"[COMMITTED] ada: Support new SPARK aspect Side_Effects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144206.339725-1-poulhies@adacore.com/mbox/"},{"id":155630,"url":"https://patchwork.plctlab.org/api/1.2/patches/155630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTFDa/6aOhyZIAMz@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T14:55:39","name":"[v2,11/11] aarch64: Add new load/store pair fusion pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTFDa/6aOhyZIAMz@arm.com/mbox/"},{"id":155631,"url":"https://patchwork.plctlab.org/api/1.2/patches/155631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019151130.1929663-1-jason@redhat.com/","msgid":"<20231019151130.1929663-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:11:30","name":"ABOUT-GCC-NLS: add usage guidance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019151130.1929663-1-jason@redhat.com/mbox/"},{"id":155632,"url":"https://patchwork.plctlab.org/api/1.2/patches/155632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153158.1937301-1-jason@redhat.com/","msgid":"<20231019153158.1937301-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:31:58","name":"[pushed] c++: use G_ instead of _","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153158.1937301-1-jason@redhat.com/mbox/"},{"id":155637,"url":"https://patchwork.plctlab.org/api/1.2/patches/155637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153731.1394423-1-pinskia@gmail.com/","msgid":"<20231019153731.1394423-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T15:37:31","name":"c: [PR104822] Don'\''t warn about converting NULL to different sso endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153731.1394423-1-pinskia@gmail.com/mbox/"},{"id":155638,"url":"https://patchwork.plctlab.org/api/1.2/patches/155638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153857.1248815-1-pinskia@gmail.com/","msgid":"<20231019153857.1248815-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T15:38:57","name":"c: [PR100532] Fix ICE when an agrgument was an error mark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153857.1248815-1-pinskia@gmail.com/mbox/"},{"id":155639,"url":"https://patchwork.plctlab.org/api/1.2/patches/155639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019154501.1939309-1-jason@redhat.com/","msgid":"<20231019154501.1939309-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:45:01","name":"[RFA] diagnostic: rename new permerror overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019154501.1939309-1-jason@redhat.com/mbox/"},{"id":155642,"url":"https://patchwork.plctlab.org/api/1.2/patches/155642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de/","msgid":"<817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de>","list_archive_url":null,"date":"2023-10-19T15:55:46","name":"[libgcc,contrib] : Add some auto-generated files deps to gcc_update.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de/mbox/"},{"id":155696,"url":"https://patchwork.plctlab.org/api/1.2/patches/155696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com/","msgid":"<17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com>","list_archive_url":null,"date":"2023-10-19T19:48:18","name":"omp_lib.f90.in: Deprecate omp_lock_hint_* for OpenMP 5.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com/mbox/"},{"id":155705,"url":"https://patchwork.plctlab.org/api/1.2/patches/155705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019201738.653232-1-polacek@redhat.com/","msgid":"<20231019201738.653232-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-19T20:17:37","name":"[pushed] doc: Update contrib.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019201738.653232-1-polacek@redhat.com/mbox/"},{"id":155708,"url":"https://patchwork.plctlab.org/api/1.2/patches/155708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs26pbh2.fsf@oldenburg.str.redhat.com/","msgid":"<87fs26pbh2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-19T21:07:53","name":"c: Add -Wreturn-mismatch warning, split from -Wreturn-type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs26pbh2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155761,"url":"https://patchwork.plctlab.org/api/1.2/patches/155761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020021855.482999-1-hongtao.liu@intel.com/","msgid":"<20231020021855.482999-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-20T02:18:55","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020021855.482999-1-hongtao.liu@intel.com/mbox/"},{"id":155775,"url":"https://patchwork.plctlab.org/api/1.2/patches/155775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0lqc7at.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T03:16:26","name":"testsuite: check for and use -mno-strict-align where needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0lqc7at.fsf@lxoliva.fsfla.org/mbox/"},{"id":155812,"url":"https://patchwork.plctlab.org/api/1.2/patches/155812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhpdg3z.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T05:20:48","name":"[v3] Control flow redundancy hardening","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhpdg3z.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155813,"url":"https://patchwork.plctlab.org/api/1.2/patches/155813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5sddfmu.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T05:31:05","name":"[v4] Introduce hardbool attribute for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5sddfmu.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155818,"url":"https://patchwork.plctlab.org/api/1.2/patches/155818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y31de5m.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T06:03:01","name":"[v4] Introduce strub: machine-independent stack scrubbing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y31de5m.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155819,"url":"https://patchwork.plctlab.org/api/1.2/patches/155819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1fxbza4.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T06:09:39","name":"rename make_eh_edges to make_eh_edge (was: return edge in make_eh_edges)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1fxbza4.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155825,"url":"https://patchwork.plctlab.org/api/1.2/patches/155825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020062050.971264-1-haochen.jiang@intel.com/","msgid":"<20231020062050.971264-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-20T06:20:50","name":"i386: Prevent splitting to xmm16+ when !TARGET_AVX512VL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020062050.971264-1-haochen.jiang@intel.com/mbox/"},{"id":155847,"url":"https://patchwork.plctlab.org/api/1.2/patches/155847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734y523et.fsf@oldenburg.str.redhat.com/","msgid":"<8734y523et.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T06:50:34","name":"[v2] c: Add -Wreturn-mismatch warning, split from -Wreturn-type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734y523et.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155846,"url":"https://patchwork.plctlab.org/api/1.2/patches/155846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com/","msgid":"<32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com>","list_archive_url":null,"date":"2023-10-20T06:50:44","name":"[v9,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com/mbox/"},{"id":155848,"url":"https://patchwork.plctlab.org/api/1.2/patches/155848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1fxzszn.fsf@oldenburg.str.redhat.com/","msgid":"<87y1fxzszn.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T06:51:40","name":"c: -Wint-conversion should cover pointer/integer mismatches in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1fxzszn.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155849,"url":"https://patchwork.plctlab.org/api/1.2/patches/155849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020065401.1086359-1-hongtao.liu@intel.com/","msgid":"<20231020065401.1086359-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-20T06:54:01","name":"[x86] Remove unused mmx_pinsrw.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020065401.1086359-1-hongtao.liu@intel.com/mbox/"},{"id":155851,"url":"https://patchwork.plctlab.org/api/1.2/patches/155851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020071506.27021-1-chenglulu@loongson.cn/","msgid":"<20231020071506.27021-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-10-20T07:15:06","name":"LoongArch: Define macro CLEAR_INSN_CACHE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020071506.27021-1-chenglulu@loongson.cn/mbox/"},{"id":155858,"url":"https://patchwork.plctlab.org/api/1.2/patches/155858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com/","msgid":"<992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com>","list_archive_url":null,"date":"2023-10-20T07:22:52","name":"[PATCH-1v4,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com/mbox/"},{"id":155863,"url":"https://patchwork.plctlab.org/api/1.2/patches/155863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020073748.2172313584@imap2.suse-dmz.suse.de/","msgid":"<20231020073748.2172313584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T07:37:47","name":"Fixup vect_get_and_check_slp_defs for gathers and .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020073748.2172313584@imap2.suse-dmz.suse.de/mbox/"},{"id":155873,"url":"https://patchwork.plctlab.org/api/1.2/patches/155873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020082557.2104496-1-juzhe.zhong@rivai.ai/","msgid":"<20231020082557.2104496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-20T08:25:57","name":"RISC-V: Rename some variables of vector_block_info[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020082557.2104496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":155878,"url":"https://patchwork.plctlab.org/api/1.2/patches/155878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020083442.4148800-1-pan2.li@intel.com/","msgid":"<20231020083442.4148800-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-20T08:34:42","name":"[v1] RISC-V: Support partial VLS mode when preference fixed-vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020083442.4148800-1-pan2.li@intel.com/mbox/"},{"id":155893,"url":"https://patchwork.plctlab.org/api/1.2/patches/155893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm19znaa.fsf@oldenburg.str.redhat.com/","msgid":"<87pm19znaa.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T08:54:53","name":"c: -Wincompatible-pointer-types should cover mismatches in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm19znaa.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155915,"url":"https://patchwork.plctlab.org/api/1.2/patches/155915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020092327.C732A13584@imap2.suse-dmz.suse.de/","msgid":"<20231020092327.C732A13584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T09:23:27","name":"Rewrite more refs for epilogue vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020092327.C732A13584@imap2.suse-dmz.suse.de/mbox/"},{"id":155943,"url":"https://patchwork.plctlab.org/api/1.2/patches/155943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTJLpun/ghfYhY2d@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T09:43:02","name":"rtl-ssa: Don'\''t leave NOTE_INSN_DELETED around","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTJLpun/ghfYhY2d@arm.com/mbox/"},{"id":155948,"url":"https://patchwork.plctlab.org/api/1.2/patches/155948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-2-christoph.muellner@vrull.eu/","msgid":"<20231020095348.2455729-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-20T09:53:47","name":"[v2,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-2-christoph.muellner@vrull.eu/mbox/"},{"id":155947,"url":"https://patchwork.plctlab.org/api/1.2/patches/155947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-3-christoph.muellner@vrull.eu/","msgid":"<20231020095348.2455729-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-20T09:53:48","name":"[v2,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-3-christoph.muellner@vrull.eu/mbox/"},{"id":155949,"url":"https://patchwork.plctlab.org/api/1.2/patches/155949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020100130.D526713584@imap2.suse-dmz.suse.de/","msgid":"<20231020100130.D526713584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T10:01:30","name":"Document {L,R}ROTATE_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020100130.D526713584@imap2.suse-dmz.suse.de/mbox/"},{"id":155998,"url":"https://patchwork.plctlab.org/api/1.2/patches/155998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17865-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T10:50:19","name":"middle-end: don'\''t pass loop_vinfo to vect_set_loop_condition during prolog peeling [PR111866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17865-tamar@arm.com/mbox/"},{"id":156012,"url":"https://patchwork.plctlab.org/api/1.2/patches/156012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020111940.8FD0A13584@imap2.suse-dmz.suse.de/","msgid":"<20231020111940.8FD0A13584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T11:19:40","name":"tree-optimization/111000 - restrict invariant motion of shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020111940.8FD0A13584@imap2.suse-dmz.suse.de/mbox/"},{"id":156081,"url":"https://patchwork.plctlab.org/api/1.2/patches/156081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b99badf1-895a-4ff1-b68f-abc665a85625@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T11:51:03","name":"[committed] amdgcn: add -march=gfx1030 EXPERIMENTAL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b99badf1-895a-4ff1-b68f-abc665a85625@codesourcery.com/mbox/"},{"id":156089,"url":"https://patchwork.plctlab.org/api/1.2/patches/156089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020121357.9F55713584@imap2.suse-dmz.suse.de/","msgid":"<20231020121357.9F55713584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T12:13:57","name":"tree-optimization/111891 - fix assert in vectorizable_simd_clone_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020121357.9F55713584@imap2.suse-dmz.suse.de/mbox/"},{"id":156095,"url":"https://patchwork.plctlab.org/api/1.2/patches/156095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020125951.114236-1-pan2.li@intel.com/","msgid":"<20231020125951.114236-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-20T12:59:51","name":"[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020125951.114236-1-pan2.li@intel.com/mbox/"},{"id":156102,"url":"https://patchwork.plctlab.org/api/1.2/patches/156102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131353.7E572138E2@imap2.suse-dmz.suse.de/","msgid":"<20231020131353.7E572138E2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:13:53","name":"tree-optimization/110243 - IVOPTs introducing undefined overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131353.7E572138E2@imap2.suse-dmz.suse.de/mbox/"},{"id":156103,"url":"https://patchwork.plctlab.org/api/1.2/patches/156103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131810.0AC64138E2@imap2.suse-dmz.suse.de/","msgid":"<20231020131810.0AC64138E2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:18:09","name":"tree-optimization/111445 - simple_iv simplification fault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131810.0AC64138E2@imap2.suse-dmz.suse.de/mbox/"},{"id":156113,"url":"https://patchwork.plctlab.org/api/1.2/patches/156113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTKFoVCHmwalBmVD@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-20T13:50:25","name":"A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTKFoVCHmwalBmVD@fkdesktop.suse.cz/mbox/"},{"id":156114,"url":"https://patchwork.plctlab.org/api/1.2/patches/156114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135259.F1B4613584@imap2.suse-dmz.suse.de/","msgid":"<20231020135259.F1B4613584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:52:59","name":"tree-optimization/111383 - testcase for fixed PR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135259.F1B4613584@imap2.suse-dmz.suse.de/mbox/"},{"id":156116,"url":"https://patchwork.plctlab.org/api/1.2/patches/156116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-2-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:20","name":"[v23,01/33] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-2-kmatsui@gcc.gnu.org/mbox/"},{"id":156118,"url":"https://patchwork.plctlab.org/api/1.2/patches/156118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-3-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:21","name":"[v23,02/33] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-3-kmatsui@gcc.gnu.org/mbox/"},{"id":156121,"url":"https://patchwork.plctlab.org/api/1.2/patches/156121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-4-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:22","name":"[v23,03/33] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-4-kmatsui@gcc.gnu.org/mbox/"},{"id":156122,"url":"https://patchwork.plctlab.org/api/1.2/patches/156122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-5-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:23","name":"[v23,04/33] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-5-kmatsui@gcc.gnu.org/mbox/"},{"id":156131,"url":"https://patchwork.plctlab.org/api/1.2/patches/156131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-6-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:24","name":"[v23,05/33] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-6-kmatsui@gcc.gnu.org/mbox/"},{"id":156144,"url":"https://patchwork.plctlab.org/api/1.2/patches/156144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-7-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:25","name":"[v23,06/33] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-7-kmatsui@gcc.gnu.org/mbox/"},{"id":156139,"url":"https://patchwork.plctlab.org/api/1.2/patches/156139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-8-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:26","name":"[v23,07/33] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-8-kmatsui@gcc.gnu.org/mbox/"},{"id":156148,"url":"https://patchwork.plctlab.org/api/1.2/patches/156148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-9-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:27","name":"[v23,08/33] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-9-kmatsui@gcc.gnu.org/mbox/"},{"id":156125,"url":"https://patchwork.plctlab.org/api/1.2/patches/156125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-10-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:28","name":"[v23,09/33] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-10-kmatsui@gcc.gnu.org/mbox/"},{"id":156126,"url":"https://patchwork.plctlab.org/api/1.2/patches/156126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-11-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:29","name":"[v23,10/33] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-11-kmatsui@gcc.gnu.org/mbox/"},{"id":156127,"url":"https://patchwork.plctlab.org/api/1.2/patches/156127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-12-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:30","name":"[v23,11/33] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-12-kmatsui@gcc.gnu.org/mbox/"},{"id":156141,"url":"https://patchwork.plctlab.org/api/1.2/patches/156141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-13-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:31","name":"[v23,12/33] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-13-kmatsui@gcc.gnu.org/mbox/"},{"id":156128,"url":"https://patchwork.plctlab.org/api/1.2/patches/156128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-14-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:32","name":"[v23,13/33] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-14-kmatsui@gcc.gnu.org/mbox/"},{"id":156149,"url":"https://patchwork.plctlab.org/api/1.2/patches/156149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-15-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:33","name":"[v23,14/33] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-15-kmatsui@gcc.gnu.org/mbox/"},{"id":156124,"url":"https://patchwork.plctlab.org/api/1.2/patches/156124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-16-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:34","name":"[v23,15/33] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-16-kmatsui@gcc.gnu.org/mbox/"},{"id":156146,"url":"https://patchwork.plctlab.org/api/1.2/patches/156146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-17-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:35","name":"[v23,16/33] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-17-kmatsui@gcc.gnu.org/mbox/"},{"id":156130,"url":"https://patchwork.plctlab.org/api/1.2/patches/156130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-18-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:36","name":"[v23,17/33] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-18-kmatsui@gcc.gnu.org/mbox/"},{"id":156145,"url":"https://patchwork.plctlab.org/api/1.2/patches/156145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-19-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:37","name":"[v23,18/33] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-19-kmatsui@gcc.gnu.org/mbox/"},{"id":156133,"url":"https://patchwork.plctlab.org/api/1.2/patches/156133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-20-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:38","name":"[v23,19/33] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-20-kmatsui@gcc.gnu.org/mbox/"},{"id":156147,"url":"https://patchwork.plctlab.org/api/1.2/patches/156147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-21-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:39","name":"[v23,20/33] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-21-kmatsui@gcc.gnu.org/mbox/"},{"id":156137,"url":"https://patchwork.plctlab.org/api/1.2/patches/156137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-22-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:40","name":"[v23,21/33] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-22-kmatsui@gcc.gnu.org/mbox/"},{"id":156132,"url":"https://patchwork.plctlab.org/api/1.2/patches/156132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-23-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:41","name":"[v23,22/33] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-23-kmatsui@gcc.gnu.org/mbox/"},{"id":156153,"url":"https://patchwork.plctlab.org/api/1.2/patches/156153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-24-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:42","name":"[v23,23/33] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-24-kmatsui@gcc.gnu.org/mbox/"},{"id":156143,"url":"https://patchwork.plctlab.org/api/1.2/patches/156143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-25-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:43","name":"[v23,24/33] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-25-kmatsui@gcc.gnu.org/mbox/"},{"id":156123,"url":"https://patchwork.plctlab.org/api/1.2/patches/156123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-26-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:44","name":"[v23,25/33] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-26-kmatsui@gcc.gnu.org/mbox/"},{"id":156142,"url":"https://patchwork.plctlab.org/api/1.2/patches/156142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-27-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:45","name":"[v23,26/33] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-27-kmatsui@gcc.gnu.org/mbox/"},{"id":156151,"url":"https://patchwork.plctlab.org/api/1.2/patches/156151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-28-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:46","name":"[v23,27/33] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-28-kmatsui@gcc.gnu.org/mbox/"},{"id":156140,"url":"https://patchwork.plctlab.org/api/1.2/patches/156140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-29-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:47","name":"[v23,28/33] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-29-kmatsui@gcc.gnu.org/mbox/"},{"id":156155,"url":"https://patchwork.plctlab.org/api/1.2/patches/156155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-30-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:48","name":"[v23,29/33] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-30-kmatsui@gcc.gnu.org/mbox/"},{"id":156134,"url":"https://patchwork.plctlab.org/api/1.2/patches/156134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-31-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:49","name":"[v23,30/33] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-31-kmatsui@gcc.gnu.org/mbox/"},{"id":156150,"url":"https://patchwork.plctlab.org/api/1.2/patches/156150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-32-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:50","name":"[v23,31/33] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-32-kmatsui@gcc.gnu.org/mbox/"},{"id":156154,"url":"https://patchwork.plctlab.org/api/1.2/patches/156154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-33-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:51","name":"[v23,32/33] c++: Implement __is_invocable built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-33-kmatsui@gcc.gnu.org/mbox/"},{"id":156152,"url":"https://patchwork.plctlab.org/api/1.2/patches/156152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-34-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:52","name":"[v23,33/33] libstdc++: Optimize std::is_invocable compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-34-kmatsui@gcc.gnu.org/mbox/"},{"id":156115,"url":"https://patchwork.plctlab.org/api/1.2/patches/156115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17863-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T13:55:57","name":"middle-end: don'\''t keep .MEM guard nodes for PHI nodes who dominate loop [PR111860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17863-tamar@arm.com/mbox/"},{"id":156120,"url":"https://patchwork.plctlab.org/api/1.2/patches/156120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com/","msgid":"<6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com>","list_archive_url":null,"date":"2023-10-20T14:02:39","name":"Fortran: Fix incompatible types between INTEGER(8) and TYPE(c_ptr)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com/mbox/"},{"id":156198,"url":"https://patchwork.plctlab.org/api/1.2/patches/156198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com/","msgid":"<63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com>","list_archive_url":null,"date":"2023-10-20T15:48:54","name":"vect: Don'\''t set excess bits in unform masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com/mbox/"},{"id":156225,"url":"https://patchwork.plctlab.org/api/1.2/patches/156225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020162115.2307797-34-kmatsui@gcc.gnu.org/","msgid":"<20231020162115.2307797-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T16:17:02","name":"[v24,33/33] libstdc++: Optimize std::is_invocable compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020162115.2307797-34-kmatsui@gcc.gnu.org/mbox/"},{"id":156226,"url":"https://patchwork.plctlab.org/api/1.2/patches/156226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163121.25120-1-polacek@redhat.com/","msgid":"<20231020163121.25120-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-20T16:31:21","name":"c-family: char8_t and aliasing in C vs C++ [PR111884]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163121.25120-1-polacek@redhat.com/mbox/"},{"id":156246,"url":"https://patchwork.plctlab.org/api/1.2/patches/156246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163413.25404-1-polacek@redhat.com/","msgid":"<20231020163413.25404-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-20T16:34:13","name":"[pushed] libstdc++: add casts to from_chars in [PR111883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163413.25404-1-polacek@redhat.com/mbox/"},{"id":156229,"url":"https://patchwork.plctlab.org/api/1.2/patches/156229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc154f12-bd63-4223-9baf-19fa092be4a9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T16:49:58","name":"OpenMP: Add C++ support for '\''omp allocate'\'' with stack variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc154f12-bd63-4223-9baf-19fa092be4a9@codesourcery.com/mbox/"},{"id":156239,"url":"https://patchwork.plctlab.org/api/1.2/patches/156239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMkP2ZTUq9_YN+4_kCzfPBDroFE-YUVSS4h9=NFWxhetwA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T17:25:44","name":"PR111754","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMkP2ZTUq9_YN+4_kCzfPBDroFE-YUVSS4h9=NFWxhetwA@mail.gmail.com/mbox/"},{"id":156245,"url":"https://patchwork.plctlab.org/api/1.2/patches/156245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020173630.2328347-1-ppalka@redhat.com/","msgid":"<20231020173630.2328347-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-20T17:36:30","name":"rust: build failure after NON_DEPENDENT_EXPR removal [PR111899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020173630.2328347-1-ppalka@redhat.com/mbox/"},{"id":156272,"url":"https://patchwork.plctlab.org/api/1.2/patches/156272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf65w1v0.fsf@oldenburg.str.redhat.com/","msgid":"<87sf65w1v0.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T19:05:55","name":"C99 testsuite readiness: Some unverified test case reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf65w1v0.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156273,"url":"https://patchwork.plctlab.org/api/1.2/patches/156273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gtw1uo.fsf@oldenburg.str.redhat.com/","msgid":"<87o7gtw1uo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T19:06:07","name":"C99 testsuite readiness: Compile more tests with -std=gnu89","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gtw1uo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156303,"url":"https://patchwork.plctlab.org/api/1.2/patches/156303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020202953.2247779-1-jason@redhat.com/","msgid":"<20231020202953.2247779-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T20:29:53","name":"[pushed] c++: fix tourney logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020202953.2247779-1-jason@redhat.com/mbox/"},{"id":156304,"url":"https://patchwork.plctlab.org/api/1.2/patches/156304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020203019.2248454-1-jason@redhat.com/","msgid":"<20231020203019.2248454-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T20:30:19","name":"[pushed] testsuite: constexpr-diag1.C and implicit constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020203019.2248454-1-jason@redhat.com/mbox/"},{"id":156352,"url":"https://patchwork.plctlab.org/api/1.2/patches/156352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020215043.2277730-1-jason@redhat.com/","msgid":"<20231020215043.2277730-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T21:50:43","name":"[pushed] c++: abstract class and overload resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020215043.2277730-1-jason@redhat.com/mbox/"},{"id":156392,"url":"https://patchwork.plctlab.org/api/1.2/patches/156392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb6a45366c1c1cc8a317c9bd7a58d4f6d3b74615.1697866322.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-21T05:32:22","name":"RISC-V: '\''Zfa'\'' extension is now ratified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb6a45366c1c1cc8a317c9bd7a58d4f6d3b74615.1697866322.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156393,"url":"https://patchwork.plctlab.org/api/1.2/patches/156393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com/","msgid":"<92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-21T05:32:56","name":"RISC-V: Prohibit combination of '\''E'\'' and '\''H'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156396,"url":"https://patchwork.plctlab.org/api/1.2/patches/156396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qdoculr.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-21T07:17:36","name":"[PR111520] set hardcmp eh probs (was: rename make_eh_edges to make_eh_edge)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qdoculr.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":156430,"url":"https://patchwork.plctlab.org/api/1.2/patches/156430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eaddf187-4d16-4fc8-8b16-99931bca1220@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-21T10:21:59","name":"[v10,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eaddf187-4d16-4fc8-8b16-99931bca1220@linux.ibm.com/mbox/"},{"id":156443,"url":"https://patchwork.plctlab.org/api/1.2/patches/156443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021110910.155119-1-jwakely@redhat.com/","msgid":"<20231021110910.155119-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-21T10:54:37","name":"[committed] libstdc++: Fix formatting of filesystem directory iterators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021110910.155119-1-jwakely@redhat.com/mbox/"},{"id":156436,"url":"https://patchwork.plctlab.org/api/1.2/patches/156436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at/","msgid":"<564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at>","list_archive_url":null,"date":"2023-10-21T11:09:42","name":"[PING,2,C] Synthesize nonnull attribute for parameters declared with static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at/mbox/"},{"id":156447,"url":"https://patchwork.plctlab.org/api/1.2/patches/156447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021132749.1053942-1-j@lambda.is/","msgid":"<20231021132749.1053942-1-j@lambda.is>","list_archive_url":null,"date":"2023-10-21T13:27:49","name":"[v6] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021132749.1053942-1-j@lambda.is/mbox/"},{"id":156485,"url":"https://patchwork.plctlab.org/api/1.2/patches/156485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021180712.370694-1-pinskia@gmail.com/","msgid":"<20231021180712.370694-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-21T18:07:12","name":"convert_to_complex vs invalid_conversion [PR111903]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021180712.370694-1-pinskia@gmail.com/mbox/"},{"id":156509,"url":"https://patchwork.plctlab.org/api/1.2/patches/156509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022001232.2713374-1-pinskia@gmail.com/","msgid":"<20231022001232.2713374-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T00:12:33","name":"[PATCHv2] move the (a-b) CMP 0 ? (a-b) : (b-a) optimization from fold_cond_expr_with_comparison to match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022001232.2713374-1-pinskia@gmail.com/mbox/"},{"id":156514,"url":"https://patchwork.plctlab.org/api/1.2/patches/156514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e302a7008b07633f19c308d495968dba5f00f147.1697946445.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-22T03:49:22","name":"[RFC] RISC-V: Initial RV64E and LP64E support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e302a7008b07633f19c308d495968dba5f00f147.1697946445.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156521,"url":"https://patchwork.plctlab.org/api/1.2/patches/156521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jijje0h.fsf@oldenburg.str.redhat.com/","msgid":"<874jijje0h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-22T07:46:22","name":"gcc.c-torture/execute/builtins/pr93262-chk.c: Remove return statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jijje0h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156522,"url":"https://patchwork.plctlab.org/api/1.2/patches/156522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0bhzep.fsf@oldenburg.str.redhat.com/","msgid":"<87zg0bhzep.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-22T07:47:10","name":"gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0bhzep.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156600,"url":"https://patchwork.plctlab.org/api/1.2/patches/156600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022201500.2802972-1-ppalka@redhat.com/","msgid":"<20231022201500.2802972-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-22T20:15:00","name":"[pushed] objc++: type/expr tsubst conflation [PR111920]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022201500.2802972-1-ppalka@redhat.com/mbox/"},{"id":156604,"url":"https://patchwork.plctlab.org/api/1.2/patches/156604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022210050.1359773-1-ibuclaw@gdcproject.org/","msgid":"<20231022210050.1359773-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-22T21:00:50","name":"[committed] d: Merge upstream dmd f4be7f6f7b.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022210050.1359773-1-ibuclaw@gdcproject.org/mbox/"},{"id":156608,"url":"https://patchwork.plctlab.org/api/1.2/patches/156608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022222230.1633485-1-pinskia@gmail.com/","msgid":"<20231022222230.1633485-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T22:22:30","name":"Use error_mark_node after error in convert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022222230.1633485-1-pinskia@gmail.com/mbox/"},{"id":156610,"url":"https://patchwork.plctlab.org/api/1.2/patches/156610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022223205.1646902-1-pinskia@gmail.com/","msgid":"<20231022223205.1646902-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T22:32:05","name":"[Committedv2] aarch64: [PR110986] Emit csinv again for `a ? ~b : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022223205.1646902-1-pinskia@gmail.com/mbox/"},{"id":156611,"url":"https://patchwork.plctlab.org/api/1.2/patches/156611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022224643.1445215-1-juzhe.zhong@rivai.ai/","msgid":"<20231022224643.1445215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-22T22:46:43","name":"RISC-V: Fix AVL_TYPE attribute of tuple mode mov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022224643.1445215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156616,"url":"https://patchwork.plctlab.org/api/1.2/patches/156616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-1-mark@harmstone.com/","msgid":"<20231023005531.19921-1-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:27","name":"[1/5] Remove obsolete debugging formats from names list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-1-mark@harmstone.com/mbox/"},{"id":156621,"url":"https://patchwork.plctlab.org/api/1.2/patches/156621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-2-mark@harmstone.com/","msgid":"<20231023005531.19921-2-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:28","name":"[2/5] Support for CodeView debugging format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-2-mark@harmstone.com/mbox/"},{"id":156619,"url":"https://patchwork.plctlab.org/api/1.2/patches/156619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-3-mark@harmstone.com/","msgid":"<20231023005531.19921-3-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:29","name":"[3/5] Output file checksums in CodeView section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-3-mark@harmstone.com/mbox/"},{"id":156620,"url":"https://patchwork.plctlab.org/api/1.2/patches/156620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-4-mark@harmstone.com/","msgid":"<20231023005531.19921-4-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:30","name":"[4/5] Output line numbers in CodeView section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-4-mark@harmstone.com/mbox/"},{"id":156617,"url":"https://patchwork.plctlab.org/api/1.2/patches/156617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-5-mark@harmstone.com/","msgid":"<20231023005531.19921-5-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:31","name":"[5/5] Output S_COMPILE3 symbol in CodeView debug section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-5-mark@harmstone.com/mbox/"},{"id":156626,"url":"https://patchwork.plctlab.org/api/1.2/patches/156626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023012614.1420783-1-pan2.li@intel.com/","msgid":"<20231023012614.1420783-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T01:26:14","name":"[v1] RISC-V: Bugfix for merging undefined tmp register in math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023012614.1420783-1-pan2.li@intel.com/mbox/"},{"id":156630,"url":"https://patchwork.plctlab.org/api/1.2/patches/156630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQBLOre=--Mu_0onwxCETNX=3PP+eJL6j6Gch865pkew@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:44:15","name":"Go patch committed: pass Gogo to more passes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQBLOre=--Mu_0onwxCETNX=3PP+eJL6j6Gch865pkew@mail.gmail.com/mbox/"},{"id":156631,"url":"https://patchwork.plctlab.org/api/1.2/patches/156631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVurV48N+2u7+w3O4VH_W6v74+1J7kRCHO720bNrJM1PQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:46:23","name":"Go patch committed: Remove name_ field from Type_switch_statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVurV48N+2u7+w3O4VH_W6v74+1J7kRCHO720bNrJM1PQ@mail.gmail.com/mbox/"},{"id":156632,"url":"https://patchwork.plctlab.org/api/1.2/patches/156632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXa-YSZDONvOPW6qhr0GOJV9qkJ-635zrnk3Jy5JnhHkg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:48:48","name":"Go patch committed: Remove the traverse_assignments code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXa-YSZDONvOPW6qhr0GOJV9qkJ-635zrnk3Jy5JnhHkg@mail.gmail.com/mbox/"},{"id":156637,"url":"https://patchwork.plctlab.org/api/1.2/patches/156637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021324.2767717-1-panchenghui@loongson.cn/","msgid":"<20231023021324.2767717-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-10-23T02:13:24","name":"[v1] LoongArch: Fix vfrint-releated comments in lsxintrin.h and lasxintrin.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021324.2767717-1-panchenghui@loongson.cn/mbox/"},{"id":156640,"url":"https://patchwork.plctlab.org/api/1.2/patches/156640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021810.2134824-1-haochen.jiang@intel.com/","msgid":"<20231023021810.2134824-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-23T02:18:10","name":"[gccwwwdocs] gcc-13/14: Mention Intel new ISA and march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021810.2134824-1-haochen.jiang@intel.com/mbox/"},{"id":156642,"url":"https://patchwork.plctlab.org/api/1.2/patches/156642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023023904.1881908-1-pan2.li@intel.com/","msgid":"<20231023023904.1881908-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T02:39:04","name":"[v1] RISC-V: Remove unnecessary asm check for rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023023904.1881908-1-pan2.li@intel.com/mbox/"},{"id":156658,"url":"https://patchwork.plctlab.org/api/1.2/patches/156658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67O4wsQBw_VYTr9WjYYUCU8aNixuqjc4QJvNvafH35NZrA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T03:32:42","name":"[WIP] libiberty: Support for relocation output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67O4wsQBw_VYTr9WjYYUCU8aNixuqjc4QJvNvafH35NZrA@mail.gmail.com/mbox/"},{"id":156660,"url":"https://patchwork.plctlab.org/api/1.2/patches/156660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67NDE_iQ4d7RNVuMfwPt57-7+8+pgov=VapZ0og97+ieHg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T03:36:42","name":"[WIP] dwarf2out: extend to output debug section directly to object file during debug_early phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67NDE_iQ4d7RNVuMfwPt57-7+8+pgov=VapZ0og97+ieHg@mail.gmail.com/mbox/"},{"id":156673,"url":"https://patchwork.plctlab.org/api/1.2/patches/156673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023054851.1205436-1-neal.frager@amd.com/","msgid":"<20231023054851.1205436-1-neal.frager@amd.com>","list_archive_url":null,"date":"2023-10-23T05:48:51","name":"[v1,1/1] gcc: config: microblaze: fix cpu version check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023054851.1205436-1-neal.frager@amd.com/mbox/"},{"id":156674,"url":"https://patchwork.plctlab.org/api/1.2/patches/156674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023060110.2603191-1-pan2.li@intel.com/","msgid":"<20231023060110.2603191-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T06:01:10","name":"[v1] RISC-V: Remove unnecessary asm check for binop constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023060110.2603191-1-pan2.li@intel.com/mbox/"},{"id":156684,"url":"https://patchwork.plctlab.org/api/1.2/patches/156684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com/","msgid":"<1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-23T06:43:18","name":"[V11] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com/mbox/"},{"id":156695,"url":"https://patchwork.plctlab.org/api/1.2/patches/156695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77808ffa394b3d5a322d4d1a83aca13004190cd.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T07:22:52","name":"[1/4] RISC-V: Recategorize \"prefetch\" availabilities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77808ffa394b3d5a322d4d1a83aca13004190cd.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156694,"url":"https://patchwork.plctlab.org/api/1.2/patches/156694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023072252.1716510-1-juzhe.zhong@rivai.ai/","msgid":"<20231023072252.1716510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T07:22:52","name":"[Committed] RISC-V: Fix typo[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023072252.1716510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156696,"url":"https://patchwork.plctlab.org/api/1.2/patches/156696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"<68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-23T07:22:53","name":"[2/4] RISC-V: Remove broken __builtin_riscv_zicbop_cbo_prefetchi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156697,"url":"https://patchwork.plctlab.org/api/1.2/patches/156697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"<671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-23T07:22:54","name":"[3/4] RISC-V: Add not broken RW prefetch RTL instructions without offsets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156698,"url":"https://patchwork.plctlab.org/api/1.2/patches/156698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1156590d83afbb22bed387ace4ed9a743df0340.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T07:22:55","name":"[4/4] RISC-V: Fix ICE by expansion and register coercion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1156590d83afbb22bed387ace4ed9a743df0340.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156713,"url":"https://patchwork.plctlab.org/api/1.2/patches/156713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023075335.3063731-1-pan2.li@intel.com/","msgid":"<20231023075335.3063731-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T07:53:35","name":"[v1] RISC-V: Bugfix for merging undef tmp register for trunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023075335.3063731-1-pan2.li@intel.com/mbox/"},{"id":156746,"url":"https://patchwork.plctlab.org/api/1.2/patches/156746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com/","msgid":"<79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com>","list_archive_url":null,"date":"2023-10-23T08:32:34","name":"[PING,^1,v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com/mbox/"},{"id":156747,"url":"https://patchwork.plctlab.org/api/1.2/patches/156747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jihybsu.fsf@oldenburg.str.redhat.com/","msgid":"<874jihybsu.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-23T08:37:21","name":"[v2] gcc.c-torture/execute/builtins/fputs.c: fputs_unlocked prototype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jihybsu.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156753,"url":"https://patchwork.plctlab.org/api/1.2/patches/156753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023084803.1600456-1-hongtao.liu@intel.com/","msgid":"<20231023084803.1600456-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-23T08:48:03","name":"Support vec_cmpmn/vcondmn for v2hf/v4hf.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023084803.1600456-1-hongtao.liu@intel.com/mbox/"},{"id":156761,"url":"https://patchwork.plctlab.org/api/1.2/patches/156761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023090401.1724890-1-juzhe.zhong@rivai.ai/","msgid":"<20231023090401.1724890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T09:04:01","name":"RISC-V: Fix ICE for the fusion case from vsetvl to scalar move[PR111927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023090401.1724890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156766,"url":"https://patchwork.plctlab.org/api/1.2/patches/156766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023091915.385-1-xujiahao@loongson.cn/","msgid":"<20231023091915.385-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T09:19:15","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023091915.385-1-xujiahao@loongson.cn/mbox/"},{"id":156784,"url":"https://patchwork.plctlab.org/api/1.2/patches/156784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094034.1728130-1-juzhe.zhong@rivai.ai/","msgid":"<20231023094034.1728130-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T09:40:34","name":"[V2] RISC-V: Fix ICE for the fusion case from vsetvl to scalar move[PR111927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094034.1728130-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156794,"url":"https://patchwork.plctlab.org/api/1.2/patches/156794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094629.5189-1-xujiahao@loongson.cn/","msgid":"<20231023094629.5189-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T09:46:29","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094629.5189-1-xujiahao@loongson.cn/mbox/"},{"id":156800,"url":"https://patchwork.plctlab.org/api/1.2/patches/156800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023095457.3675888-1-pan2.li@intel.com/","msgid":"<20231023095457.3675888-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T09:54:57","name":"[v1] RISC-V: Remove unnecessary asm check for vec cvt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023095457.3675888-1-pan2.li@intel.com/mbox/"},{"id":156818,"url":"https://patchwork.plctlab.org/api/1.2/patches/156818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100054.6387-1-xujiahao@loongson.cn/","msgid":"<20231023100054.6387-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T10:00:54","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100054.6387-1-xujiahao@loongson.cn/mbox/"},{"id":156820,"url":"https://patchwork.plctlab.org/api/1.2/patches/156820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100319.7208-1-xujiahao@loongson.cn/","msgid":"<20231023100319.7208-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T10:03:19","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100319.7208-1-xujiahao@loongson.cn/mbox/"},{"id":156821,"url":"https://patchwork.plctlab.org/api/1.2/patches/156821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6274430-da03-4c9f-88e3-6780dee79850@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T10:03:41","name":"[V12,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6274430-da03-4c9f-88e3-6780dee79850@linux.ibm.com/mbox/"},{"id":156834,"url":"https://patchwork.plctlab.org/api/1.2/patches/156834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023103504.0C30D3858414@sourceware.org/","msgid":"<20231023103504.0C30D3858414@sourceware.org>","list_archive_url":null,"date":"2023-10-23T10:34:36","name":"tree-optimization/111917 - bougs IL after guard hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023103504.0C30D3858414@sourceware.org/mbox/"},{"id":156860,"url":"https://patchwork.plctlab.org/api/1.2/patches/156860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023124350.432036-1-slyich@gmail.com/","msgid":"<20231023124350.432036-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-23T12:43:50","name":"libgcc: make heap-based trampolines conditional on libc presence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023124350.432036-1-slyich@gmail.com/mbox/"},{"id":156867,"url":"https://patchwork.plctlab.org/api/1.2/patches/156867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023131839.6244-1-iain@sandoe.co.uk/","msgid":"<20231023131839.6244-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-23T13:18:39","name":"[pushed] configure, libquadmath: Remove unintended AC_CHECK_LIBM [PR111928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023131839.6244-1-iain@sandoe.co.uk/mbox/"},{"id":156881,"url":"https://patchwork.plctlab.org/api/1.2/patches/156881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a684f28033020f45021de3ef40a1599e78fececf.camel@t-online.de/","msgid":"","list_archive_url":null,"date":"2023-10-23T13:28:15","name":"[SH,committed] Fix PR 111001","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a684f28033020f45021de3ef40a1599e78fececf.camel@t-online.de/mbox/"},{"id":156887,"url":"https://patchwork.plctlab.org/api/1.2/patches/156887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTZ1wAAwCWg0hFMH@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T13:31:44","name":"Backport PR106878 fixes to GCC 12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTZ1wAAwCWg0hFMH@arm.com/mbox/"},{"id":156885,"url":"https://patchwork.plctlab.org/api/1.2/patches/156885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133225.B77493857707@sourceware.org/","msgid":"<20231023133225.B77493857707@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:00","name":"ipa/111914 - perform parameter init after remapping types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133225.B77493857707@sourceware.org/mbox/"},{"id":156886,"url":"https://patchwork.plctlab.org/api/1.2/patches/156886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133240.CF3AB3858C60@sourceware.org/","msgid":"<20231023133240.CF3AB3858C60@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:14","name":"tree-optimization/111915 - mixing grouped and non-grouped accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133240.CF3AB3858C60@sourceware.org/mbox/"},{"id":156889,"url":"https://patchwork.plctlab.org/api/1.2/patches/156889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133328.EC8E53857012@sourceware.org/","msgid":"<20231023133328.EC8E53857012@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:29","name":"tree-optimization/111916 - SRA of BIT_FIELD_REF of constant pool entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133328.EC8E53857012@sourceware.org/mbox/"},{"id":156927,"url":"https://patchwork.plctlab.org/api/1.2/patches/156927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com/","msgid":"<008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-23T14:47:43","name":"[x86] Fine tune STV register conversion costs for -Os.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com/mbox/"},{"id":156964,"url":"https://patchwork.plctlab.org/api/1.2/patches/156964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9b33876-cf75-417e-85b3-89e00e17435f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T16:09:58","name":"internal-fn: Add VCOND_MASK_LEN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9b33876-cf75-417e-85b3-89e00e17435f@gmail.com/mbox/"},{"id":157072,"url":"https://patchwork.plctlab.org/api/1.2/patches/157072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTbIxWiL27+PeZAG@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T19:25:57","name":"[v3] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTbIxWiL27+PeZAG@redhat.com/mbox/"},{"id":157097,"url":"https://patchwork.plctlab.org/api/1.2/patches/157097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU493DggQLbcvZK9CJ7aNeXQb2pHqdKbKp8_bbO0+1qMw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:03:49","name":"libgo patch committed: Add missing type conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU493DggQLbcvZK9CJ7aNeXQb2pHqdKbKp8_bbO0+1qMw@mail.gmail.com/mbox/"},{"id":157098,"url":"https://patchwork.plctlab.org/api/1.2/patches/157098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU3j0sDsO0Q9pav_ZmDXoo-3qs7LqB9PFcjD2+K-BbaBQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:06:13","name":"Go patch committed: Add Expression::is_untyped method","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU3j0sDsO0Q9pav_ZmDXoo-3qs7LqB9PFcjD2+K-BbaBQ@mail.gmail.com/mbox/"},{"id":157108,"url":"https://patchwork.plctlab.org/api/1.2/patches/157108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV=onhFGYmqDYM1j27sW3vNziwuGn-NdOS2MJSzAF9NTQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:08:51","name":"Go patch committed: Pass Gogo to Runtime::make_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV=onhFGYmqDYM1j27sW3vNziwuGn-NdOS2MJSzAF9NTQ@mail.gmail.com/mbox/"},{"id":157110,"url":"https://patchwork.plctlab.org/api/1.2/patches/157110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVGOxZRUakFJ97=rj3W6mxfJF3AgjvkcjWzDrvEMw4gjA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:14:28","name":"Go patch committed: Make xx_constant_value methods non-const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVGOxZRUakFJ97=rj3W6mxfJF3AgjvkcjWzDrvEMw4gjA@mail.gmail.com/mbox/"},{"id":157111,"url":"https://patchwork.plctlab.org/api/1.2/patches/157111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW0wZAzZJKOQZpVDesbprupOf47Vum=fTqWu9jvorzT2Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:16:53","name":"Go patch committed: Move Selector_expression up in file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW0wZAzZJKOQZpVDesbprupOf47Vum=fTqWu9jvorzT2Q@mail.gmail.com/mbox/"},{"id":157131,"url":"https://patchwork.plctlab.org/api/1.2/patches/157131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023230348.606997-1-pinskia@gmail.com/","msgid":"<20231023230348.606997-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-23T23:03:48","name":"match: Fix the `popcnt(a&b) + popcnt(a|b)` patthern for types [PR111913]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023230348.606997-1-pinskia@gmail.com/mbox/"},{"id":157142,"url":"https://patchwork.plctlab.org/api/1.2/patches/157142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023234924.2971461-1-ppalka@redhat.com/","msgid":"<20231023234924.2971461-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:49:24","name":"c++: cp_stabilize_reference and non-dep exprs [PR111919]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023234924.2971461-1-ppalka@redhat.com/mbox/"},{"id":157143,"url":"https://patchwork.plctlab.org/api/1.2/patches/157143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-1-ppalka@redhat.com/","msgid":"<20231023235154.2971561-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:52","name":"[v2,1/3] c++: sort candidates according to viability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-1-ppalka@redhat.com/mbox/"},{"id":157144,"url":"https://patchwork.plctlab.org/api/1.2/patches/157144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-2-ppalka@redhat.com/","msgid":"<20231023235154.2971561-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:53","name":"[v2,2/3] c++: remember candidates that we ignored","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-2-ppalka@redhat.com/mbox/"},{"id":157145,"url":"https://patchwork.plctlab.org/api/1.2/patches/157145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-3-ppalka@redhat.com/","msgid":"<20231023235154.2971561-3-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:54","name":"[v2,3/3] c++: note other candidates when diagnosing deletedness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-3-ppalka@redhat.com/mbox/"},{"id":157200,"url":"https://patchwork.plctlab.org/api/1.2/patches/157200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-2-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:44","name":"[v25,01/33] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-2-kmatsui@gcc.gnu.org/mbox/"},{"id":157195,"url":"https://patchwork.plctlab.org/api/1.2/patches/157195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-3-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:45","name":"[v25,02/33] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-3-kmatsui@gcc.gnu.org/mbox/"},{"id":157199,"url":"https://patchwork.plctlab.org/api/1.2/patches/157199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-4-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:46","name":"[v25,03/33] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-4-kmatsui@gcc.gnu.org/mbox/"},{"id":157197,"url":"https://patchwork.plctlab.org/api/1.2/patches/157197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-5-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:47","name":"[v25,04/33] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-5-kmatsui@gcc.gnu.org/mbox/"},{"id":157196,"url":"https://patchwork.plctlab.org/api/1.2/patches/157196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-6-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:48","name":"[v25,05/33] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-6-kmatsui@gcc.gnu.org/mbox/"},{"id":157201,"url":"https://patchwork.plctlab.org/api/1.2/patches/157201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-9-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:51","name":"[v25,08/33] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-9-kmatsui@gcc.gnu.org/mbox/"},{"id":157203,"url":"https://patchwork.plctlab.org/api/1.2/patches/157203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-11-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:53","name":"[v25,10/33] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-11-kmatsui@gcc.gnu.org/mbox/"},{"id":157202,"url":"https://patchwork.plctlab.org/api/1.2/patches/157202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-23-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:01:05","name":"[v25,22/33] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-23-kmatsui@gcc.gnu.org/mbox/"},{"id":157198,"url":"https://patchwork.plctlab.org/api/1.2/patches/157198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-24-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:01:06","name":"[v25,23/33] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-24-kmatsui@gcc.gnu.org/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-10/mbox/"},{"id":39,"url":"https://patchwork.plctlab.org/api/1.2/bundles/39/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-11/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-11","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":160173,"url":"https://patchwork.plctlab.org/api/1.2/patches/160173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com/","msgid":"<27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com>","list_archive_url":null,"date":"2023-10-31T15:47:00","name":"[pushed,PR111917,RA] : Fixing LRA cycling for multi-reg variable containing a fixed reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com/mbox/"},{"id":160285,"url":"https://patchwork.plctlab.org/api/1.2/patches/160285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-1-christoph.muellner@vrull.eu/","msgid":"<20231031171123.569951-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-31T17:11:22","name":"[committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-1-christoph.muellner@vrull.eu/mbox/"},{"id":160284,"url":"https://patchwork.plctlab.org/api/1.2/patches/160284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-2-christoph.muellner@vrull.eu/","msgid":"<20231031171123.569951-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-31T17:11:23","name":"[committed,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-2-christoph.muellner@vrull.eu/mbox/"},{"id":160306,"url":"https://patchwork.plctlab.org/api/1.2/patches/160306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031181726.3944801-1-ppalka@redhat.com/","msgid":"<20231031181726.3944801-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-31T18:17:26","name":"c++: constantness of local var in constexpr fn [PR111703, PR112269]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031181726.3944801-1-ppalka@redhat.com/mbox/"},{"id":160309,"url":"https://patchwork.plctlab.org/api/1.2/patches/160309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031183504.832611-1-vineetg@rivosinc.com/","msgid":"<20231031183504.832611-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T18:35:04","name":"RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031183504.832611-1-vineetg@rivosinc.com/mbox/"},{"id":160311,"url":"https://patchwork.plctlab.org/api/1.2/patches/160311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b56c707834dbf0434545d5f66a92f4426bfa4d35.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-10-31T19:05:09","name":"Reduce false positives for -Wnonnull for VLA parameters [PR98541]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b56c707834dbf0434545d5f66a92f4426bfa4d35.camel@tugraz.at/mbox/"},{"id":160348,"url":"https://patchwork.plctlab.org/api/1.2/patches/160348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211552.1907869-1-dmalcolm@redhat.com/","msgid":"<20231031211552.1907869-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:52","name":"[pushed] pretty-print: gracefully handle null URLs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211552.1907869-1-dmalcolm@redhat.com/mbox/"},{"id":160349,"url":"https://patchwork.plctlab.org/api/1.2/patches/160349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211556.1907893-1-dmalcolm@redhat.com/","msgid":"<20231031211556.1907893-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:56","name":"[pushed] opts.cc: fix comment about DOCUMENTATION_ROOT_URL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211556.1907893-1-dmalcolm@redhat.com/mbox/"},{"id":160350,"url":"https://patchwork.plctlab.org/api/1.2/patches/160350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211559.1907917-1-dmalcolm@redhat.com/","msgid":"<20231031211559.1907917-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:59","name":"[pushed] libcpp: eliminate MACRO_MAP_EXPANSION_POINT_LOCATION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211559.1907917-1-dmalcolm@redhat.com/mbox/"},{"id":160351,"url":"https://patchwork.plctlab.org/api/1.2/patches/160351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211604.1907952-1-dmalcolm@redhat.com/","msgid":"<20231031211604.1907952-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:16:04","name":"[pushed] analyzer: move class record_layout to its own .h/.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211604.1907952-1-dmalcolm@redhat.com/mbox/"},{"id":160379,"url":"https://patchwork.plctlab.org/api/1.2/patches/160379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031225144.24448-1-ewlu@rivosinc.com/","msgid":"<20231031225144.24448-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T22:51:44","name":"[RFC] Make genautomata.cc output reflect insn-attr.h expectation:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031225144.24448-1-ewlu@rivosinc.com/mbox/"},{"id":160382,"url":"https://patchwork.plctlab.org/api/1.2/patches/160382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031232525.27391-1-patrick@rivosinc.com/","msgid":"<20231031232525.27391-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T23:25:25","name":"[v2] RISC-V: Enable ztso tests on rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031232525.27391-1-patrick@rivosinc.com/mbox/"},{"id":160414,"url":"https://patchwork.plctlab.org/api/1.2/patches/160414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101005051.607257-1-juzhe.zhong@rivai.ai/","msgid":"<20231101005051.607257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T00:50:51","name":"[Committed] NFC: Fix whitespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101005051.607257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160419,"url":"https://patchwork.plctlab.org/api/1.2/patches/160419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101014302.2457445-1-juzhe.zhong@rivai.ai/","msgid":"<20231101014302.2457445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T01:43:02","name":"[Commit,Pending,V2] RISC-V: Support strided load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101014302.2457445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160437,"url":"https://patchwork.plctlab.org/api/1.2/patches/160437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101050512.33961-1-patrick@rivosinc.com/","msgid":"<20231101050512.33961-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T05:05:12","name":"RISC-V: Use riscv_subword_address for atomic_test_and_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101050512.33961-1-patrick@rivosinc.com/mbox/"},{"id":160443,"url":"https://patchwork.plctlab.org/api/1.2/patches/160443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101063519.33245-1-xuli1@eswincomputing.com/","msgid":"<20231101063519.33245-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-01T06:35:19","name":"RISC-V: Support vundefine intrinsics for tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101063519.33245-1-xuli1@eswincomputing.com/mbox/"},{"id":160449,"url":"https://patchwork.plctlab.org/api/1.2/patches/160449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101065639.158911-1-juzhe.zhong@rivai.ai/","msgid":"<20231101065639.158911-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T06:56:39","name":"RISC-V: Allow dest operand and accumulator operand overlap of widen reduction instruction[PR112327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101065639.158911-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160493,"url":"https://patchwork.plctlab.org/api/1.2/patches/160493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at/","msgid":"<01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-01T09:39:16","name":"RFC [PATCH] c: Add missing cases where vla sizes are not instrumented by UBSan [PR98608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at/mbox/"},{"id":160495,"url":"https://patchwork.plctlab.org/api/1.2/patches/160495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bgAW=cxxv=H1N-gsfmeGM8uqC7wkfRCOw+x_D+EsM6hw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-01T09:45:37","name":"[PUSHED] i386: Improve stack protector patterns and peephole2s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bgAW=cxxv=H1N-gsfmeGM8uqC7wkfRCOw+x_D+EsM6hw@mail.gmail.com/mbox/"},{"id":160500,"url":"https://patchwork.plctlab.org/api/1.2/patches/160500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101100822.2126091-1-hongtao.liu@intel.com/","msgid":"<20231101100822.2126091-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-01T10:08:22","name":"Support cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101100822.2126091-1-hongtao.liu@intel.com/mbox/"},{"id":160597,"url":"https://patchwork.plctlab.org/api/1.2/patches/160597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101161439.41429-1-patrick@rivosinc.com/","msgid":"<20231101161439.41429-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T16:14:39","name":"[v2] RISC-V: Use riscv_subword_address for atomic_test_and_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101161439.41429-1-patrick@rivosinc.com/mbox/"},{"id":160647,"url":"https://patchwork.plctlab.org/api/1.2/patches/160647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101181713.54765-1-ewlu@rivosinc.com/","msgid":"<20231101181713.54765-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T18:17:13","name":"RISC-V: Add check for types without insn reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101181713.54765-1-ewlu@rivosinc.com/mbox/"},{"id":160695,"url":"https://patchwork.plctlab.org/api/1.2/patches/160695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215132.879718-1-vineetg@rivosinc.com/","msgid":"<20231101215132.879718-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T21:51:32","name":"[[Committed] ] RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215132.879718-1-vineetg@rivosinc.com/mbox/"},{"id":160696,"url":"https://patchwork.plctlab.org/api/1.2/patches/160696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215457.3935908-1-lhyatt@gmail.com/","msgid":"<20231101215457.3935908-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-11-01T21:54:57","name":"preprocessor: Reinitialize frontend parser after loading a PCH [PR112319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215457.3935908-1-lhyatt@gmail.com/mbox/"},{"id":160743,"url":"https://patchwork.plctlab.org/api/1.2/patches/160743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005432.21119-1-xuli1@eswincomputing.com/","msgid":"<20231102005432.21119-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-02T00:54:32","name":"RISC-V: Support vcreate intrinsics for non-tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005432.21119-1-xuli1@eswincomputing.com/mbox/"},{"id":160744,"url":"https://patchwork.plctlab.org/api/1.2/patches/160744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005737.2418307-1-juzhe.zhong@rivai.ai/","msgid":"<20231102005737.2418307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T00:57:37","name":"[tree-optimization/111721] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005737.2418307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160745,"url":"https://patchwork.plctlab.org/api/1.2/patches/160745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvxnemj.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-02T01:11:16","name":"testsuite: introduce hostedlib effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvxnemj.fsf@lxoliva.fsfla.org/mbox/"},{"id":160752,"url":"https://patchwork.plctlab.org/api/1.2/patches/160752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102024651.2347027-1-juzhe.zhong@rivai.ai/","msgid":"<20231102024651.2347027-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T02:46:51","name":"[Committed] RISC-V: Fix redundant attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102024651.2347027-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160764,"url":"https://patchwork.plctlab.org/api/1.2/patches/160764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102030611.2653544-1-juzhe.zhong@rivai.ai/","msgid":"<20231102030611.2653544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T03:06:11","name":"RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102030611.2653544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160767,"url":"https://patchwork.plctlab.org/api/1.2/patches/160767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102031423.3751965-1-pan2.li@intel.com/","msgid":"<20231102031423.3751965-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-02T03:14:23","name":"[v1] EXPMED: Allow vector mode for DSE extract_low_bits [PR111720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102031423.3751965-1-pan2.li@intel.com/mbox/"},{"id":160778,"url":"https://patchwork.plctlab.org/api/1.2/patches/160778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102033427.178709-1-juzhe.zhong@rivai.ai/","msgid":"<20231102033427.178709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T03:34:27","name":"[V2] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102033427.178709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160799,"url":"https://patchwork.plctlab.org/api/1.2/patches/160799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102075019.4111564-1-yunqiang.su@cipunited.com/","msgid":"<20231102075019.4111564-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-02T07:50:19","name":"MIPS: Use -mnan value for -mabs if not specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102075019.4111564-1-yunqiang.su@cipunited.com/mbox/"},{"id":160807,"url":"https://patchwork.plctlab.org/api/1.2/patches/160807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-1-sam@gentoo.org/","msgid":"<20231102084058.1142941-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:05","name":"[1/4] contrib: add generate_snapshot_index.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-1-sam@gentoo.org/mbox/"},{"id":160808,"url":"https://patchwork.plctlab.org/api/1.2/patches/160808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-2-sam@gentoo.org/","msgid":"<20231102084058.1142941-2-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:06","name":"[2/4] maintainer-scripts/gcc_release: create index between snapshots <-> commits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-2-sam@gentoo.org/mbox/"},{"id":160809,"url":"https://patchwork.plctlab.org/api/1.2/patches/160809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-3-sam@gentoo.org/","msgid":"<20231102084058.1142941-3-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:07","name":"[3/4] maintainer-scripts/gcc_release: use HTTPS for links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-3-sam@gentoo.org/mbox/"},{"id":160810,"url":"https://patchwork.plctlab.org/api/1.2/patches/160810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-4-sam@gentoo.org/","msgid":"<20231102084058.1142941-4-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:08","name":"[4/4] maintainer-scripts/gcc_release: cleanup whitespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-4-sam@gentoo.org/mbox/"},{"id":160811,"url":"https://patchwork.plctlab.org/api/1.2/patches/160811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084540.2869665-1-arsen@aarsen.me/","msgid":"<20231102084540.2869665-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-02T08:45:37","name":"[v3,2/2] *: add modern gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084540.2869665-1-arsen@aarsen.me/mbox/"},{"id":160812,"url":"https://patchwork.plctlab.org/api/1.2/patches/160812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102090234.1145382-1-sam@gentoo.org/","msgid":"<20231102090234.1145382-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T09:02:30","name":"doc: explicitly say '\''lifetime'\'' for DCE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102090234.1145382-1-sam@gentoo.org/mbox/"},{"id":160822,"url":"https://patchwork.plctlab.org/api/1.2/patches/160822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102103109.E2A02385B522@sourceware.org/","msgid":"<20231102103109.E2A02385B522@sourceware.org>","list_archive_url":null,"date":"2023-11-02T10:30:36","name":"tree-optimization/112320 - bougs debug IL after SCCP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102103109.E2A02385B522@sourceware.org/mbox/"},{"id":160838,"url":"https://patchwork.plctlab.org/api/1.2/patches/160838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102113023.2225297-1-juzhe.zhong@rivai.ai/","msgid":"<20231102113023.2225297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T11:30:23","name":"RISC-V: Fix bug of AVL propagation PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102113023.2225297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160851,"url":"https://patchwork.plctlab.org/api/1.2/patches/160851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102114802.17020-1-pan2.li@intel.com/","msgid":"<20231102114802.17020-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-02T11:48:02","name":"[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102114802.17020-1-pan2.li@intel.com/mbox/"},{"id":160852,"url":"https://patchwork.plctlab.org/api/1.2/patches/160852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com/","msgid":"<025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-02T11:50:38","name":"[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com/mbox/"},{"id":160853,"url":"https://patchwork.plctlab.org/api/1.2/patches/160853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026501da0d83$457b0d20$d0712760$@nextmovesoftware.com/","msgid":"<026501da0d83$457b0d20$d0712760$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-02T11:54:00","name":"[AVR] Improvements to SImode and PSImode shifts by constants.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026501da0d83$457b0d20$d0712760$@nextmovesoftware.com/mbox/"},{"id":160869,"url":"https://patchwork.plctlab.org/api/1.2/patches/160869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124852.2156995-1-dmalcolm@redhat.com/","msgid":"<20231102124852.2156995-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T12:48:52","name":"[pushed] analyzer: fix clang warnings [PR112317]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124852.2156995-1-dmalcolm@redhat.com/mbox/"},{"id":160870,"url":"https://patchwork.plctlab.org/api/1.2/patches/160870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124855.3226695-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231102124855.3226695-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-02T12:48:55","name":"Format gotools.sum closer to what DejaGnu does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124855.3226695-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":160872,"url":"https://patchwork.plctlab.org/api/1.2/patches/160872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUOdUqCW0a8NIAuf@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-11-02T13:00:02","name":"[v2] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUOdUqCW0a8NIAuf@fkdesktop.suse.cz/mbox/"},{"id":160878,"url":"https://patchwork.plctlab.org/api/1.2/patches/160878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-2-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:30","name":"[1/4] c/c++: rework pragma parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-2-dmalcolm@redhat.com/mbox/"},{"id":160877,"url":"https://patchwork.plctlab.org/api/1.2/patches/160877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-3-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:31","name":"[2/4] c: add #pragma GCC show_layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-3-dmalcolm@redhat.com/mbox/"},{"id":160876,"url":"https://patchwork.plctlab.org/api/1.2/patches/160876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-4-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:32","name":"[3/4] diagnostics: add automatic URL-ification within messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-4-dmalcolm@redhat.com/mbox/"},{"id":160879,"url":"https://patchwork.plctlab.org/api/1.2/patches/160879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-5-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:33","name":"[4/4] RFC: add contrib/regenerate-index-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-5-dmalcolm@redhat.com/mbox/"},{"id":160881,"url":"https://patchwork.plctlab.org/api/1.2/patches/160881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2697c64-9453-4b2b-9419-be4bf594d54e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T13:34:13","name":"[committed] Improve H8 sequences for single bit sign extractions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2697c64-9453-4b2b-9419-be4bf594d54e@gmail.com/mbox/"},{"id":160911,"url":"https://patchwork.plctlab.org/api/1.2/patches/160911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135439.2777314-1-jwakely@redhat.com/","msgid":"<20231102135439.2777314-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:53:56","name":"[committed] libstdc++: Fix warning during configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135439.2777314-1-jwakely@redhat.com/mbox/"},{"id":160886,"url":"https://patchwork.plctlab.org/api/1.2/patches/160886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135719.33814-1-ibuclaw@gdcproject.org/","msgid":"<20231102135719.33814-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-02T13:57:19","name":"[committed] d: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e7","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135719.33814-1-ibuclaw@gdcproject.org/mbox/"},{"id":160971,"url":"https://patchwork.plctlab.org/api/1.2/patches/160971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145434.2812083-1-jwakely@redhat.com/","msgid":"<20231102145434.2812083-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T14:54:01","name":"[committed] libstdc++: Add assertion to std::string_view::remove_suffix [PR112314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145434.2812083-1-jwakely@redhat.com/mbox/"},{"id":160972,"url":"https://patchwork.plctlab.org/api/1.2/patches/160972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145522.2813330-1-jwakely@redhat.com/","msgid":"<20231102145522.2813330-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T14:54:59","name":"libstdc++: Improve static assert messages for monadic operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145522.2813330-1-jwakely@redhat.com/mbox/"},{"id":160910,"url":"https://patchwork.plctlab.org/api/1.2/patches/160910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/962ec283-a600-42e9-942a-7811d10f8f7b@arm.com/","msgid":"<962ec283-a600-42e9-942a-7811d10f8f7b@arm.com>","list_archive_url":null,"date":"2023-11-02T14:58:11","name":"vect: allow using inbranch simdclones for masked loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/962ec283-a600-42e9-942a-7811d10f8f7b@arm.com/mbox/"},{"id":160942,"url":"https://patchwork.plctlab.org/api/1.2/patches/160942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUPAK/ZeelV4yAIa@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T15:28:43","name":"[v3] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUPAK/ZeelV4yAIa@redhat.com/mbox/"},{"id":160989,"url":"https://patchwork.plctlab.org/api/1.2/patches/160989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-2-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:29","name":"[V3,1/6] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-2-victor.donascimento@arm.com/mbox/"},{"id":160987,"url":"https://patchwork.plctlab.org/api/1.2/patches/160987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-3-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:30","name":"[V3,2/6] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-3-victor.donascimento@arm.com/mbox/"},{"id":160991,"url":"https://patchwork.plctlab.org/api/1.2/patches/160991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-4-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:31","name":"[V3,3/6] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-4-victor.donascimento@arm.com/mbox/"},{"id":160990,"url":"https://patchwork.plctlab.org/api/1.2/patches/160990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-5-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:32","name":"[V3,4/6] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-5-victor.donascimento@arm.com/mbox/"},{"id":160986,"url":"https://patchwork.plctlab.org/api/1.2/patches/160986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-6-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:33","name":"[V3,5/6] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-6-victor.donascimento@arm.com/mbox/"},{"id":160988,"url":"https://patchwork.plctlab.org/api/1.2/patches/160988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-7-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:34","name":"[V3,6/6] aarch64: Add system register duplication check selftest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-7-victor.donascimento@arm.com/mbox/"},{"id":161092,"url":"https://patchwork.plctlab.org/api/1.2/patches/161092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102190911.66763-1-patrick@rivosinc.com/","msgid":"<20231102190911.66763-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-02T19:09:11","name":"gfortran: Rely on dg-do-what-default to avoid running pr85853.f90, pr107254.f90 and vect-alias-check-1.F90 on non-vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102190911.66763-1-patrick@rivosinc.com/mbox/"},{"id":161110,"url":"https://patchwork.plctlab.org/api/1.2/patches/161110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102195652.9965-1-ben.sherman@chicagotrading.com/","msgid":"<20231102195652.9965-1-ben.sherman@chicagotrading.com>","list_archive_url":null,"date":"2023-11-02T19:56:53","name":"libstdc++: avoid uninitialized read in basic_string constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102195652.9965-1-ben.sherman@chicagotrading.com/mbox/"},{"id":161111,"url":"https://patchwork.plctlab.org/api/1.2/patches/161111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200104.723881-1-jason@redhat.com/","msgid":"<20231102200104.723881-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-02T20:01:04","name":"[pushed] c++: retval dtor on rethrow [PR112301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200104.723881-1-jason@redhat.com/mbox/"},{"id":161112,"url":"https://patchwork.plctlab.org/api/1.2/patches/161112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200129.724441-1-jason@redhat.com/","msgid":"<20231102200129.724441-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-02T20:01:29","name":"[pushed] c++: use hash_set in nrv_data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200129.724441-1-jason@redhat.com/mbox/"},{"id":161122,"url":"https://patchwork.plctlab.org/api/1.2/patches/161122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed1ab120-cb87-4f1f-a219-0e0c6e8929e2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T20:50:21","name":"tree-optimization: Add register pressure heuristics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed1ab120-cb87-4f1f-a219-0e0c6e8929e2@linux.ibm.com/mbox/"},{"id":161142,"url":"https://patchwork.plctlab.org/api/1.2/patches/161142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102234527.77231-1-patrick@rivosinc.com/","msgid":"<20231102234527.77231-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-02T23:45:27","name":"g++: Rely on dg-do-what-default to avoid running pr102788.cc on non-vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102234527.77231-1-patrick@rivosinc.com/mbox/"},{"id":161145,"url":"https://patchwork.plctlab.org/api/1.2/patches/161145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103003603.3613011-1-juzhe.zhong@rivai.ai/","msgid":"<20231103003603.3613011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T00:36:03","name":"[Committed,V3] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103003603.3613011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161147,"url":"https://patchwork.plctlab.org/api/1.2/patches/161147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65444a6a.170a0220.5f247.11c7@mx.google.com/","msgid":"<65444a6a.170a0220.5f247.11c7@mx.google.com>","list_archive_url":null,"date":"2023-11-03T01:18:29","name":"c++: End lifetime of objects in constexpr after destructor call [PR71093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65444a6a.170a0220.5f247.11c7@mx.google.com/mbox/"},{"id":161152,"url":"https://patchwork.plctlab.org/api/1.2/patches/161152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVP8wFc_SLyWMjhD8sGeNk5XH=XSP7PN2MEY0e8cqWbmA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T03:04:26","name":"libstdc++ patch RFA: Fix dl_iterate_phdr configury for libbacktrace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVP8wFc_SLyWMjhD8sGeNk5XH=XSP7PN2MEY0e8cqWbmA@mail.gmail.com/mbox/"},{"id":161155,"url":"https://patchwork.plctlab.org/api/1.2/patches/161155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103032634.2983364-1-pan2.li@intel.com/","msgid":"<20231103032634.2983364-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-03T03:26:34","name":"[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103032634.2983364-1-pan2.li@intel.com/mbox/"},{"id":161169,"url":"https://patchwork.plctlab.org/api/1.2/patches/161169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103061849.79159-1-patrick@rivosinc.com/","msgid":"<20231103061849.79159-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-03T06:18:49","name":"g++: Add require-effective-target to multi-input file testcase pr95401.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103061849.79159-1-patrick@rivosinc.com/mbox/"},{"id":161170,"url":"https://patchwork.plctlab.org/api/1.2/patches/161170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103064113.823617-1-juzhe.zhong@rivai.ai/","msgid":"<20231103064113.823617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T06:41:13","name":"[tree-optimization/111721,V2] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103064113.823617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161191,"url":"https://patchwork.plctlab.org/api/1.2/patches/161191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKWiCVkVTrPbyRWExyg1vL3xqfBYk6_h0_o9s3Hpva1gg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T06:44:35","name":"[fortran] PR112316 - [13 Regression] Fix for PR87477 rejects valid code with a bogus error...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKWiCVkVTrPbyRWExyg1vL3xqfBYk6_h0_o9s3Hpva1gg@mail.gmail.com/mbox/"},{"id":161179,"url":"https://patchwork.plctlab.org/api/1.2/patches/161179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103071105.DE25413907@imap2.suse-dmz.suse.de/","msgid":"<20231103071105.DE25413907@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T07:11:05","name":"[doc] middle-end/112296 - __builtin_constant_p and side-effects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103071105.DE25413907@imap2.suse-dmz.suse.de/mbox/"},{"id":161190,"url":"https://patchwork.plctlab.org/api/1.2/patches/161190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee5ebd2a-2702-4c10-9efa-96672506e666@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T07:44:22","name":"[v3] rs6000/p8swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee5ebd2a-2702-4c10-9efa-96672506e666@linux.vnet.ibm.com/mbox/"},{"id":161206,"url":"https://patchwork.plctlab.org/api/1.2/patches/161206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103084827.1306269-1-juzhe.zhong@rivai.ai/","msgid":"<20231103084827.1306269-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T08:48:27","name":"OPTAB: Add mask_len_strided_load/mask_len_strided_store optab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103084827.1306269-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161203,"url":"https://patchwork.plctlab.org/api/1.2/patches/161203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103090136.1672669-1-panchenghui@loongson.cn/","msgid":"<20231103090136.1672669-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-11-03T09:01:36","name":"[v1] LoongArch: Fix instruction name typo in lsx_vreplgr2vr_ template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103090136.1672669-1-panchenghui@loongson.cn/mbox/"},{"id":161227,"url":"https://patchwork.plctlab.org/api/1.2/patches/161227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bKQg28H+6fx4KtT9OFGMOf9xK1OiV4oPhyt3gJiG4k9g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T10:34:12","name":"[RFC,RFA] i386: Handle multiple address register classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bKQg28H+6fx4KtT9OFGMOf9xK1OiV4oPhyt3gJiG4k9g@mail.gmail.com/mbox/"},{"id":161228,"url":"https://patchwork.plctlab.org/api/1.2/patches/161228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103103446.1B3F31348C@imap2.suse-dmz.suse.de/","msgid":"<20231103103446.1B3F31348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T10:34:45","name":"tree-optimization/112310 - code hoisting undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103103446.1B3F31348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161238,"url":"https://patchwork.plctlab.org/api/1.2/patches/161238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103110048.9D5211348C@imap2.suse-dmz.suse.de/","msgid":"<20231103110048.9D5211348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T11:00:48","name":"tree-optimization/112366 - remove assert for failed live lane code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103110048.9D5211348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161239,"url":"https://patchwork.plctlab.org/api/1.2/patches/161239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvvt7yt.fsf@euler.schwinge.homeip.net/","msgid":"<87msvvt7yt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:03:06","name":"Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvvt7yt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161241,"url":"https://patchwork.plctlab.org/api/1.2/patches/161241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqzt7qb.fsf@euler.schwinge.homeip.net/","msgid":"<87jzqzt7qb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:08:12","name":"Skip a number of '\''g++.dg/compat/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqzt7qb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161242,"url":"https://patchwork.plctlab.org/api/1.2/patches/161242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6m3t7mk.fsf@euler.schwinge.homeip.net/","msgid":"<87h6m3t7mk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:10:27","name":"Skip a number of '\''g++.dg/lto/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) te","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6m3t7mk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161243,"url":"https://patchwork.plctlab.org/api/1.2/patches/161243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edh7t7ir.fsf@euler.schwinge.homeip.net/","msgid":"<87edh7t7ir.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:12:44","name":"Skip a number of '\''g++.dg/tree-prof/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edh7t7ir.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161272,"url":"https://patchwork.plctlab.org/api/1.2/patches/161272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7fatws.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T12:44:03","name":"[pushed] aarch64: Remove unnecessary can_create_pseudo_p condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7fatws.fsf@arm.com/mbox/"},{"id":161274,"url":"https://patchwork.plctlab.org/api/1.2/patches/161274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103125401.3238220-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231103125401.3238220-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-03T12:54:01","name":"[v2] Format gotools.sum closer to what DejaGnu does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103125401.3238220-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":161273,"url":"https://patchwork.plctlab.org/api/1.2/patches/161273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-03T12:54:33","name":"Fortran: Fix generate_error library function fnspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":161319,"url":"https://patchwork.plctlab.org/api/1.2/patches/161319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103141615.6FD4913907@imap2.suse-dmz.suse.de/","msgid":"<20231103141615.6FD4913907@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T14:16:15","name":"Cleanup vectorizable_live_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103141615.6FD4913907@imap2.suse-dmz.suse.de/mbox/"},{"id":161330,"url":"https://patchwork.plctlab.org/api/1.2/patches/161330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103145431.910551348C@imap2.suse-dmz.suse.de/","msgid":"<20231103145431.910551348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T14:54:31","name":"Testcases for vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103145431.910551348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161331,"url":"https://patchwork.plctlab.org/api/1.2/patches/161331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gavqdx.fsf@euler.schwinge.homeip.net/","msgid":"<87o7gavqdx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T14:54:34","name":"GCN: Address undeclared '\''NULL'\'' usage in '\''libgcc/config/gcn/gthr-gcn.h:__gthread_getspecific'\'' (was: [PATCH 1/3] Create GCN-specific gthreads)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gavqdx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161337,"url":"https://patchwork.plctlab.org/api/1.2/patches/161337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:08","name":"[v2,1/7] aarch64: Use br instead of ret for eh_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161341,"url":"https://patchwork.plctlab.org/api/1.2/patches/161341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae13c81e51afd2f628af10485d286b3dc7ab8daa.1699025214.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:36:14","name":"[v2,2/7] aarch64: Do not force a stack frame for EH returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae13c81e51afd2f628af10485d286b3dc7ab8daa.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161339,"url":"https://patchwork.plctlab.org/api/1.2/patches/161339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:20","name":"[v2,3/7] aarch64: Add eh_return compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161342,"url":"https://patchwork.plctlab.org/api/1.2/patches/161342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:26","name":"[v2,4/7] aarch64: Disable branch-protection for pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161338,"url":"https://patchwork.plctlab.org/api/1.2/patches/161338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:32","name":"[v2,5/7] aarch64,arm: Remove accepted_branch_protection_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161340,"url":"https://patchwork.plctlab.org/api/1.2/patches/161340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb77dcc324aba915b045d65857d1f093e7d6815d.1699025215.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:36:38","name":"[v2,6/7] aarch64,arm: Fix branch-protection= parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb77dcc324aba915b045d65857d1f093e7d6815d.1699025215.git.szabolcs.nagy@arm.com/mbox/"},{"id":161343,"url":"https://patchwork.plctlab.org/api/1.2/patches/161343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com/","msgid":"<69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:44","name":"[v2,7/7] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com/mbox/"},{"id":161344,"url":"https://patchwork.plctlab.org/api/1.2/patches/161344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+=T6VRyKwhOaPv3mBVJyv9b9d5UKb-n-GroRCUuzRJQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:39:42","name":"[COMMITTED] : i386: Handle multiple address register classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+=T6VRyKwhOaPv3mBVJyv9b9d5UKb-n-GroRCUuzRJQ@mail.gmail.com/mbox/"},{"id":161373,"url":"https://patchwork.plctlab.org/api/1.2/patches/161373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/14b069dc-711f-4643-97a0-b64142017f24@redhat.com/","msgid":"<14b069dc-711f-4643-97a0-b64142017f24@redhat.com>","list_archive_url":null,"date":"2023-11-03T17:14:19","name":"[COMMITTED,1/2] Remove simple ranges from trailing zero bitmasks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/14b069dc-711f-4643-97a0-b64142017f24@redhat.com/mbox/"},{"id":161374,"url":"https://patchwork.plctlab.org/api/1.2/patches/161374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9134381d-fb7e-4422-9435-d2709d109a36@redhat.com/","msgid":"<9134381d-fb7e-4422-9435-d2709d109a36@redhat.com>","list_archive_url":null,"date":"2023-11-03T17:14:32","name":"[COMMITTED,2/2] PR tree-optimization/111766 - Adjust operators equal and not_equal to check bitmasks against constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9134381d-fb7e-4422-9435-d2709d109a36@redhat.com/mbox/"},{"id":161389,"url":"https://patchwork.plctlab.org/api/1.2/patches/161389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103180241.2338051-1-dmalcolm@redhat.com/","msgid":"<20231103180241.2338051-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-03T18:02:41","name":"[pushed] diagnostics: consolidate group-handling fields in diagnostic_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103180241.2338051-1-dmalcolm@redhat.com/mbox/"},{"id":161414,"url":"https://patchwork.plctlab.org/api/1.2/patches/161414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUVGA1bODUejH+jE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-03T19:12:03","name":"attribs: Fix ICE with -Wno-attributes= [PR112339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUVGA1bODUejH+jE@tucnak/mbox/"},{"id":161421,"url":"https://patchwork.plctlab.org/api/1.2/patches/161421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com/","msgid":"<00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-03T19:43:08","name":"[ARC] Provide a TARGET_FOLD_BUILTIN target hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com/mbox/"},{"id":161454,"url":"https://patchwork.plctlab.org/api/1.2/patches/161454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUV5ZDgmrPJlLSdd@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T22:51:16","name":"[v4] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUV5ZDgmrPJlLSdd@redhat.com/mbox/"},{"id":161509,"url":"https://patchwork.plctlab.org/api/1.2/patches/161509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104014106.2914085-1-pan2.li@intel.com/","msgid":"<20231104014106.2914085-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-04T01:41:06","name":"[v1] RISC-V: Remove HF modes of FP to INT rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104014106.2914085-1-pan2.li@intel.com/mbox/"},{"id":161510,"url":"https://patchwork.plctlab.org/api/1.2/patches/161510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015331.2388202-1-dmalcolm@redhat.com/","msgid":"<20231104015331.2388202-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-04T01:53:31","name":"[pushed] diagnostics: convert diagnostic_context to a class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015331.2388202-1-dmalcolm@redhat.com/mbox/"},{"id":161511,"url":"https://patchwork.plctlab.org/api/1.2/patches/161511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015955.2389603-1-dmalcolm@redhat.com/","msgid":"<20231104015955.2389603-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-04T01:59:55","name":"[pushed] diagnostics: add automatic URL-ification within messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015955.2389603-1-dmalcolm@redhat.com/mbox/"},{"id":161540,"url":"https://patchwork.plctlab.org/api/1.2/patches/161540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX9vqowoNJhBq3L@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-04T08:15:58","name":"[committed] openmp: Add support for omp::directive and omp::sequence attributes in C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX9vqowoNJhBq3L@tucnak/mbox/"},{"id":161541,"url":"https://patchwork.plctlab.org/api/1.2/patches/161541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX99pqtT+0bL/8t@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-04T08:16:54","name":"[committed] openmp: Add omp::decl support for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX99pqtT+0bL/8t@tucnak/mbox/"},{"id":161557,"url":"https://patchwork.plctlab.org/api/1.2/patches/161557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104083347.3015361-1-jwakely@redhat.com/","msgid":"<20231104083347.3015361-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-04T08:33:03","name":"[committed] libstdc++: Replace \"_N\" in examples of naming conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104083347.3015361-1-jwakely@redhat.com/mbox/"},{"id":161558,"url":"https://patchwork.plctlab.org/api/1.2/patches/161558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104084442.3016638-1-jwakely@redhat.com/","msgid":"<20231104084442.3016638-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-04T08:44:11","name":"[committed] libstdc++: Use strerror_r in std::generic_category()::message(int) [PR110133]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104084442.3016638-1-jwakely@redhat.com/mbox/"},{"id":161595,"url":"https://patchwork.plctlab.org/api/1.2/patches/161595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104162318.4142088-1-slyich@gmail.com/","msgid":"<20231104162318.4142088-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-11-04T16:23:18","name":"diagnostics: fix gcc-urlifier.cc bootstrap failure [PR112379]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104162318.4142088-1-slyich@gmail.com/mbox/"},{"id":161615,"url":"https://patchwork.plctlab.org/api/1.2/patches/161615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105023744.2158302-1-juzhe.zhong@rivai.ai/","msgid":"<20231105023744.2158302-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-05T02:37:44","name":"[Committed] RISC-V: Fix bug of vlds attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105023744.2158302-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161624,"url":"https://patchwork.plctlab.org/api/1.2/patches/161624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105093011.2038618-1-pan2.li@intel.com/","msgid":"<20231105093011.2038618-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-05T09:30:11","name":"[v1] RISC-V: Support FP rint to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105093011.2038618-1-pan2.li@intel.com/mbox/"},{"id":161647,"url":"https://patchwork.plctlab.org/api/1.2/patches/161647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZG2WDVCdLtacVkulha-uk_Zc_jGWnffHmnXdaLViuAxMIESijh7Y6-Y-dxnq6e7njeAU47WSBVbTYkBKvY-U8G3xemu8dCalJ9bdv4eqo5E=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:06:09","name":"[v4,1/2] c++: Initial support for P0847R7 (Deducing this) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZG2WDVCdLtacVkulha-uk_Zc_jGWnffHmnXdaLViuAxMIESijh7Y6-Y-dxnq6e7njeAU47WSBVbTYkBKvY-U8G3xemu8dCalJ9bdv4eqo5E=@protonmail.com/mbox/"},{"id":161648,"url":"https://patchwork.plctlab.org/api/1.2/patches/161648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/RqBEJfZ4EpHLvN6GOqUoQV6JJ5d2ahvs7gLHynIQOKulN-kWOn0MN9lUwk82_hKCpdsZKyK8FS2KYmdTY2K7WQsqsXzy5p7IdFtX7sE5O-0=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:06:36","name":"[v4,2/2] c++: Diagnostics for P0847R7 (Deducing this) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/RqBEJfZ4EpHLvN6GOqUoQV6JJ5d2ahvs7gLHynIQOKulN-kWOn0MN9lUwk82_hKCpdsZKyK8FS2KYmdTY2K7WQsqsXzy5p7IdFtX7sE5O-0=@protonmail.com/mbox/"},{"id":161649,"url":"https://patchwork.plctlab.org/api/1.2/patches/161649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPhjCZKFuOB+84b-b_0a_uMq=bsT3HUks6Q7eCaJpDrrDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:38:25","name":"Remove unnecessary \"& 1\" in year_month_day_last::day()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPhjCZKFuOB+84b-b_0a_uMq=bsT3HUks6Q7eCaJpDrrDQ@mail.gmail.com/mbox/"},{"id":161739,"url":"https://patchwork.plctlab.org/api/1.2/patches/161739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfS8IgWPHbXxQpU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:37:52","name":"[committed] openmp: Adjust handling of __has_attribute (omp::directive)/sequence and add omp::decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfS8IgWPHbXxQpU@tucnak/mbox/"},{"id":161740,"url":"https://patchwork.plctlab.org/api/1.2/patches/161740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfTGznWFGz3Db61@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:38:35","name":"[committed] openmp: Mention C attribute syntax in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfTGznWFGz3Db61@tucnak/mbox/"},{"id":161741,"url":"https://patchwork.plctlab.org/api/1.2/patches/161741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfUB5r2Y7J3GPbv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:42:31","name":"c++: Fix error recovery ICE [PR112365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfUB5r2Y7J3GPbv@tucnak/mbox/"},{"id":161748,"url":"https://patchwork.plctlab.org/api/1.2/patches/161748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPjargvCuk4KNC+7Hs719JFmWeW9Fwx43nG9NH0AYWhBWw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:01:43","name":"Simplify year::is_leap().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPjargvCuk4KNC+7Hs719JFmWeW9Fwx43nG9NH0AYWhBWw@mail.gmail.com/mbox/"},{"id":161750,"url":"https://patchwork.plctlab.org/api/1.2/patches/161750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l49hu0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:27:03","name":"[pushed] read-rtl: Fix infinite loop while parsing [...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l49hu0.fsf@arm.com/mbox/"},{"id":161751,"url":"https://patchwork.plctlab.org/api/1.2/patches/161751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlebc9hnb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:31:04","name":"[pushed] mode-switching: Remove unused bbnum field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlebc9hnb.fsf@arm.com/mbox/"},{"id":161752,"url":"https://patchwork.plctlab.org/api/1.2/patches/161752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k9hla.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:32:17","name":"explow: Allow dynamic allocations after vregs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k9hla.fsf@arm.com/mbox/"},{"id":161753,"url":"https://patchwork.plctlab.org/api/1.2/patches/161753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs9hjr.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:33:12","name":"explow: Avoid unnecessary alignment operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs9hjr.fsf@arm.com/mbox/"},{"id":161756,"url":"https://patchwork.plctlab.org/api/1.2/patches/161756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuw82dh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:46:18","name":"[01/12] mode-switching: Tweak the macro/hook documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuw82dh.fsf@arm.com/mbox/"},{"id":161757,"url":"https://patchwork.plctlab.org/api/1.2/patches/161757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l482cv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:46:40","name":"[02/12] mode-switching: Add note problem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l482cv.fsf@arm.com/mbox/"},{"id":161758,"url":"https://patchwork.plctlab.org/api/1.2/patches/161758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k82bn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:47:24","name":"[04/12] mode-switching: Fix the mode passed to the emit hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k82bn.fsf@arm.com/mbox/"},{"id":161759,"url":"https://patchwork.plctlab.org/api/1.2/patches/161759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs82b3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:47:44","name":"[05/12] mode-switching: Simplify recording of transparency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs82b3.fsf@arm.com/mbox/"},{"id":161760,"url":"https://patchwork.plctlab.org/api/1.2/patches/161760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4ji082ag.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:07","name":"[06/12] mode-switching: Tweak entry/exit handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4ji082ag.fsf@arm.com/mbox/"},{"id":161761,"url":"https://patchwork.plctlab.org/api/1.2/patches/161761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1fc6npe.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:29","name":"[07/12] mode-switching: Allow targets to set the mode for EH handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1fc6npe.fsf@arm.com/mbox/"},{"id":161762,"url":"https://patchwork.plctlab.org/api/1.2/patches/161762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf5k6nos.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:51","name":"[08/12] mode-switching: Pass set of live registers to the needed hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf5k6nos.fsf@arm.com/mbox/"},{"id":161763,"url":"https://patchwork.plctlab.org/api/1.2/patches/161763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvs6nnx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:49:22","name":"[09/12] mode-switching: Pass the set of live registers to the after hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvs6nnx.fsf@arm.com/mbox/"},{"id":161764,"url":"https://patchwork.plctlab.org/api/1.2/patches/161764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6m06nne.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:49:41","name":"[10/12] mode-switching: Use 1-based edge aux fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6m06nne.fsf@arm.com/mbox/"},{"id":161765,"url":"https://patchwork.plctlab.org/api/1.2/patches/161765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkc86nmt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:50:02","name":"[11/12] mode-switching: Add a target-configurable confluence operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkc86nmt.fsf@arm.com/mbox/"},{"id":161766,"url":"https://patchwork.plctlab.org/api/1.2/patches/161766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y2g6nm9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:50:22","name":"[12/12] mode-switching: Add a backprop hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y2g6nm9.fsf@arm.com/mbox/"},{"id":161772,"url":"https://patchwork.plctlab.org/api/1.2/patches/161772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aMEf2bBVU2-Fvy66v9kAESOKrJSe_SWNwc-tB3UABuXw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T20:02:18","name":"[committed] i386: Add LEGACY_INDEX_REG register class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aMEf2bBVU2-Fvy66v9kAESOKrJSe_SWNwc-tB3UABuXw@mail.gmail.com/mbox/"},{"id":161806,"url":"https://patchwork.plctlab.org/api/1.2/patches/161806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com/","msgid":"<92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T02:36:03","name":"[PATCH-2,rs6000] Enable vector mode for by pieces equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com/mbox/"},{"id":161807,"url":"https://patchwork.plctlab.org/api/1.2/patches/161807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com/","msgid":"<35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T02:38:57","name":"[PATCH-3,rs6000] Enable 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com/mbox/"},{"id":161820,"url":"https://patchwork.plctlab.org/api/1.2/patches/161820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106033426.45920-1-juzhe.zhong@rivai.ai/","msgid":"<20231106033426.45920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T03:34:26","name":"RISC-V: Enhance AVL propagation for complicate reduction auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106033426.45920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161833,"url":"https://patchwork.plctlab.org/api/1.2/patches/161833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065205.290215-1-juzhe.zhong@rivai.ai/","msgid":"<20231106065205.290215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T06:52:04","name":"[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065205.290215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161834,"url":"https://patchwork.plctlab.org/api/1.2/patches/161834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065508.305413-1-juzhe.zhong@rivai.ai/","msgid":"<20231106065508.305413-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T06:55:08","name":"[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065508.305413-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161840,"url":"https://patchwork.plctlab.org/api/1.2/patches/161840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106072004.3002543-1-guojiufu@linux.ibm.com/","msgid":"<20231106072004.3002543-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T07:20:04","name":"rs6000, testcase: Add require-effective-target has_arch_ppc64 to pr106550_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106072004.3002543-1-guojiufu@linux.ibm.com/mbox/"},{"id":161845,"url":"https://patchwork.plctlab.org/api/1.2/patches/161845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXqW9l8x4XH8wZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:13","name":"[1/21] middle-end testsuite: Add more pragma novector to new tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXqW9l8x4XH8wZ@arm.com/mbox/"},{"id":161849,"url":"https://patchwork.plctlab.org/api/1.2/patches/161849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXvMPNnRWVys7f@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:32","name":"[2/21] middle-end testsuite: Add tests for early break vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXvMPNnRWVys7f@arm.com/mbox/"},{"id":161848,"url":"https://patchwork.plctlab.org/api/1.2/patches/161848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiX060rI5bvYKzL@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:55","name":"[3/21] middle-end: Implement code motion and dependency analysis for early breaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiX060rI5bvYKzL@arm.com/mbox/"},{"id":161850,"url":"https://patchwork.plctlab.org/api/1.2/patches/161850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYCIg0KPALrH50@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:38:48","name":"[6/21] middle-end: support multiple exits in loop versioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYCIg0KPALrH50@arm.com/mbox/"},{"id":161851,"url":"https://patchwork.plctlab.org/api/1.2/patches/161851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYG7mRzlNStIYa@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:07","name":"[7/21] middle-end: update IV update code to support early breaks and arbitrary exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYG7mRzlNStIYa@arm.com/mbox/"},{"id":161852,"url":"https://patchwork.plctlab.org/api/1.2/patches/161852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYLW1r3kBr9Vvh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:25","name":"[8/21] middle-end: update vectorizable_live_reduction with support for multiple exits and different exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYLW1r3kBr9Vvh@arm.com/mbox/"},{"id":161853,"url":"https://patchwork.plctlab.org/api/1.2/patches/161853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYTRUsWotTs677@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:57","name":"[10/21] middle-end: implement relevancy analysis support for control flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYTRUsWotTs677@arm.com/mbox/"},{"id":161904,"url":"https://patchwork.plctlab.org/api/1.2/patches/161904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYcOPCGYeyht2/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:40:32","name":"[12/21] middle-end: Add remaining changes to peeling and vectorizer to support early breaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYcOPCGYeyht2/@arm.com/mbox/"},{"id":161905,"url":"https://patchwork.plctlab.org/api/1.2/patches/161905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYgMOPSBbV8F+/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:40:48","name":"[13/21] middle-end: Update loop form analysis to support early break","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYgMOPSBbV8F+/@arm.com/mbox/"},{"id":161897,"url":"https://patchwork.plctlab.org/api/1.2/patches/161897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYlM8SDtLV3SaA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:08","name":"[14/21] middle-end: Change loop analysis from looking at at number of BB to actual cfg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYlM8SDtLV3SaA@arm.com/mbox/"},{"id":161854,"url":"https://patchwork.plctlab.org/api/1.2/patches/161854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYpncaG9ka5vKl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:26","name":"[15/21] middle-end: [RFC] conditionally support forcing final edge for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYpncaG9ka5vKl@arm.com/mbox/"},{"id":161894,"url":"https://patchwork.plctlab.org/api/1.2/patches/161894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYubLqDwbtatgQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:45","name":"[16/21] middle-end testsuite: un-xfail TSVC loops that check for exit control flow vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYubLqDwbtatgQ@arm.com/mbox/"},{"id":161910,"url":"https://patchwork.plctlab.org/api/1.2/patches/161910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYxpi9sMkZCiZ5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:58","name":"[17/21] AArch64: Add implementation for vector cbranch for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYxpi9sMkZCiZ5@arm.com/mbox/"},{"id":161895,"url":"https://patchwork.plctlab.org/api/1.2/patches/161895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY17ZhkfUlc4tp@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:15","name":"[18/21] AArch64: Add optimization for vector != cbranch fed into compare with 0 for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY17ZhkfUlc4tp@arm.com/mbox/"},{"id":161909,"url":"https://patchwork.plctlab.org/api/1.2/patches/161909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY5kCaDxBhT5V/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:30","name":"[19/21] AArch64: Add optimization for vector cbranch combining SVE and Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY5kCaDxBhT5V/@arm.com/mbox/"},{"id":161911,"url":"https://patchwork.plctlab.org/api/1.2/patches/161911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY9RNjyt2BLJ/t@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:45","name":"[20/21] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY9RNjyt2BLJ/t@arm.com/mbox/"},{"id":161855,"url":"https://patchwork.plctlab.org/api/1.2/patches/161855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiZBGiekebMPwxn@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:43:00","name":"[21/21] Arm: Add MVE cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiZBGiekebMPwxn@arm.com/mbox/"},{"id":161856,"url":"https://patchwork.plctlab.org/api/1.2/patches/161856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075511.1165228-1-xry111@xry111.site/","msgid":"<20231106075511.1165228-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T07:50:25","name":"LoongArch: Disable relaxation if the assembler don'\''t support conditional branch relaxation [PR112330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075511.1165228-1-xry111@xry111.site/mbox/"},{"id":161858,"url":"https://patchwork.plctlab.org/api/1.2/patches/161858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075720.1166450-1-xry111@xry111.site/","msgid":"<20231106075720.1166450-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T07:57:02","name":"LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075720.1166450-1-xry111@xry111.site/mbox/"},{"id":161879,"url":"https://patchwork.plctlab.org/api/1.2/patches/161879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106083302.2361300-1-pan2.li@intel.com/","msgid":"<20231106083302.2361300-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-06T08:33:02","name":"[v1] RISC-V: Adjust FP rint round tests for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106083302.2361300-1-pan2.li@intel.com/mbox/"},{"id":161898,"url":"https://patchwork.plctlab.org/api/1.2/patches/161898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106085622.5B5C93858439@sourceware.org/","msgid":"<20231106085622.5B5C93858439@sourceware.org>","list_archive_url":null,"date":"2023-11-06T08:55:58","name":"tree-optimization/112369 - strip_float_extensions and vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106085622.5B5C93858439@sourceware.org/mbox/"},{"id":161912,"url":"https://patchwork.plctlab.org/api/1.2/patches/161912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com/","msgid":"<201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T09:47:53","name":"[PATCH-3v2,rs6000] Enable 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com/mbox/"},{"id":161922,"url":"https://patchwork.plctlab.org/api/1.2/patches/161922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17982-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T10:20:01","name":"[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17982-tamar@arm.com/mbox/"},{"id":161923,"url":"https://patchwork.plctlab.org/api/1.2/patches/161923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUi94WJQcd9fq5vi@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T10:20:17","name":"[v3,2/2] middle-end match.pd: optimize fneg (fabs (x)) to copysign (x, -1) [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUi94WJQcd9fq5vi@arm.com/mbox/"},{"id":161932,"url":"https://patchwork.plctlab.org/api/1.2/patches/161932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106103103.3374589-1-hongtao.liu@intel.com/","msgid":"<20231106103103.3374589-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-06T10:31:03","name":"Avoid generating RTL code when d->testing_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106103103.3374589-1-hongtao.liu@intel.com/mbox/"},{"id":161940,"url":"https://patchwork.plctlab.org/api/1.2/patches/161940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com/","msgid":"<3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com>","list_archive_url":null,"date":"2023-11-06T10:53:21","name":"[committed] libgfortran: Fix calloc call by swapping arg order [PR112364]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com/mbox/"},{"id":161941,"url":"https://patchwork.plctlab.org/api/1.2/patches/161941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106105831.3861671-1-poulhies@adacore.com/","msgid":"<20231106105831.3861671-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T10:57:16","name":"testsuite: skip gcc.target/i386/pr106910-1.c test when using newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106105831.3861671-1-poulhies@adacore.com/mbox/"},{"id":161942,"url":"https://patchwork.plctlab.org/api/1.2/patches/161942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110013.3862412-1-poulhies@adacore.com/","msgid":"<20231106110013.3862412-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T10:59:18","name":"testsuite: require avx_runtime for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110013.3862412-1-poulhies@adacore.com/mbox/"},{"id":161945,"url":"https://patchwork.plctlab.org/api/1.2/patches/161945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110153.3863209-1-poulhies@adacore.com/","msgid":"<20231106110153.3863209-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T11:01:17","name":"testsuite: refine gcc.dg/analyzer/fd-4.c test for newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110153.3863209-1-poulhies@adacore.com/mbox/"},{"id":161949,"url":"https://patchwork.plctlab.org/api/1.2/patches/161949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com/","msgid":"<701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com>","list_archive_url":null,"date":"2023-11-06T11:20:00","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com/mbox/"},{"id":161950,"url":"https://patchwork.plctlab.org/api/1.2/patches/161950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com/","msgid":"<21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com>","list_archive_url":null,"date":"2023-11-06T11:20:06","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com/mbox/"},{"id":161952,"url":"https://patchwork.plctlab.org/api/1.2/patches/161952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106113809.1193236-1-xry111@xry111.site/","msgid":"<20231106113809.1193236-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T11:36:04","name":"LoongArch: Remove redundant barrier instructions before LL-SC loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106113809.1193236-1-xry111@xry111.site/mbox/"},{"id":161954,"url":"https://patchwork.plctlab.org/api/1.2/patches/161954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-2-mikael@gcc.gnu.org/","msgid":"<20231106114325.828968-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-06T11:43:24","name":"[1/2] libgfortran: Remove early return if extent is zero [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-2-mikael@gcc.gnu.org/mbox/"},{"id":161953,"url":"https://patchwork.plctlab.org/api/1.2/patches/161953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-3-mikael@gcc.gnu.org/","msgid":"<20231106114325.828968-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-06T11:43:25","name":"[2/2] libgfortran: Remove empty array descriptor first dimension overwrite [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-3-mikael@gcc.gnu.org/mbox/"},{"id":161956,"url":"https://patchwork.plctlab.org/api/1.2/patches/161956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106115232.8F584385842C@sourceware.org/","msgid":"<20231106115232.8F584385842C@sourceware.org>","list_archive_url":null,"date":"2023-11-06T11:52:08","name":"libstdc++/112351 - deal with __gthread_once failure during locale init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106115232.8F584385842C@sourceware.org/mbox/"},{"id":161993,"url":"https://patchwork.plctlab.org/api/1.2/patches/161993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7bcbp5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:23:34","name":"[1/3] attribs: Cache the gnu namespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7bcbp5.fsf@arm.com/mbox/"},{"id":161994,"url":"https://patchwork.plctlab.org/api/1.2/patches/161994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuvax2x.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:24:38","name":"[3/3] attribs: Namespace-aware lookup_attribute_spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuvax2x.fsf@arm.com/mbox/"},{"id":161995,"url":"https://patchwork.plctlab.org/api/1.2/patches/161995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106122643.3639195-1-juzhe.zhong@rivai.ai/","msgid":"<20231106122643.3639195-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T12:26:43","name":"RISC-V: Early expand DImode vec_duplicate in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106122643.3639195-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161996,"url":"https://patchwork.plctlab.org/api/1.2/patches/161996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvrawsm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:30:49","name":"Ping: [PATCH] Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvrawsm.fsf@arm.com/mbox/"},{"id":162007,"url":"https://patchwork.plctlab.org/api/1.2/patches/162007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130145.3265828-1-maxim.a.blinov@gmail.com/","msgid":"<20231106130145.3265828-1-maxim.a.blinov@gmail.com>","list_archive_url":null,"date":"2023-11-06T13:01:45","name":"RISC-V: VECT: Remember to assert any_known_not_updated_vssa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130145.3265828-1-maxim.a.blinov@gmail.com/mbox/"},{"id":162009,"url":"https://patchwork.plctlab.org/api/1.2/patches/162009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130916.CCDC43875DF2@sourceware.org/","msgid":"<20231106130916.CCDC43875DF2@sourceware.org>","list_archive_url":null,"date":"2023-11-06T13:08:53","name":"tree-optimization/112404 - two issues with SLP of .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130916.CCDC43875DF2@sourceware.org/mbox/"},{"id":162013,"url":"https://patchwork.plctlab.org/api/1.2/patches/162013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106131540.54A2C3836E85@sourceware.org/","msgid":"<20231106131540.54A2C3836E85@sourceware.org>","list_archive_url":null,"date":"2023-11-06T13:14:23","name":"tree-optimization/111950 - vectorizer loop copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106131540.54A2C3836E85@sourceware.org/mbox/"},{"id":162025,"url":"https://patchwork.plctlab.org/api/1.2/patches/162025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhzgemo.fsf@oldenburg.str.redhat.com/","msgid":"<874jhzgemo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T14:06:39","name":"[v2] c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhzgemo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162027,"url":"https://patchwork.plctlab.org/api/1.2/patches/162027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141248.1378051-1-juzhe.zhong@rivai.ai/","msgid":"<20231106141248.1378051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T14:12:48","name":"[V2] RISC-V: Early expand DImode vec_duplicate in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141248.1378051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162028,"url":"https://patchwork.plctlab.org/api/1.2/patches/162028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141623.3076456-1-pan2.li@intel.com/","msgid":"<20231106141623.3076456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-06T14:16:23","name":"[v1] RISC-V: Support FP round to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141623.3076456-1-pan2.li@intel.com/mbox/"},{"id":162038,"url":"https://patchwork.plctlab.org/api/1.2/patches/162038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106143107.F09F23861824@sourceware.org/","msgid":"<20231106143107.F09F23861824@sourceware.org>","list_archive_url":null,"date":"2023-11-06T14:30:41","name":"tree-optimization/112405 - SIMD clone calls with (loop) mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106143107.F09F23861824@sourceware.org/mbox/"},{"id":162043,"url":"https://patchwork.plctlab.org/api/1.2/patches/162043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqvudxr.fsf@euler.schwinge.homeip.net/","msgid":"<87jzqvudxr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-06T14:57:52","name":"nvptx: Use the usual '\''#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)'\'' (was: libstdc++ \"freestanding\" ('\''--disable-hosted-libstdcxx'\'') with '\''-fno-rtti'\'', '\''-fno-exceptions'\'': '\''libstdc++-v3/libsupc++/tinfo.cc'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqvudxr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":162044,"url":"https://patchwork.plctlab.org/api/1.2/patches/162044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f232d697-dff3-8aed-2e27-516903bcfe8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T15:03:25","name":"[committed] c: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR107954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f232d697-dff3-8aed-2e27-516903bcfe8@codesourcery.com/mbox/"},{"id":162049,"url":"https://patchwork.plctlab.org/api/1.2/patches/162049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4agoL5PDAy+7_OOi32LBWgTyBk53bcFN7cS2D=LqAfXPQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T15:31:10","name":"[committed] i386: Use \"addr\" attribute to limit address regclass to non-REX regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4agoL5PDAy+7_OOi32LBWgTyBk53bcFN7cS2D=LqAfXPQ@mail.gmail.com/mbox/"},{"id":162068,"url":"https://patchwork.plctlab.org/api/1.2/patches/162068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com/","msgid":"<05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com>","list_archive_url":null,"date":"2023-11-06T16:05:02","name":"libgomp.texi: Update OpenMP 6.0-preview implementation-status list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com/mbox/"},{"id":162091,"url":"https://patchwork.plctlab.org/api/1.2/patches/162091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-06T17:03:05","name":"Fix configure script comments(!?!) (Was: Re: [PATCH] genemit: Split insn-emit.cc into ten files)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":162095,"url":"https://patchwork.plctlab.org/api/1.2/patches/162095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com/","msgid":"<01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-06T17:30:06","name":"[ARC] Improved DImode rotates and right shifts by one bit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com/mbox/"},{"id":162096,"url":"https://patchwork.plctlab.org/api/1.2/patches/162096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvqeqbc.fsf@oldenburg.str.redhat.com/","msgid":"<87msvqeqbc.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T17:37:11","name":"c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvqeqbc.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162097,"url":"https://patchwork.plctlab.org/api/1.2/patches/162097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il6eeq9v.fsf@oldenburg.str.redhat.com/","msgid":"<87il6eeq9v.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T17:38:04","name":"Avoid undeclared use of abort in gcc.dg/cpp/wchar-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il6eeq9v.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162108,"url":"https://patchwork.plctlab.org/api/1.2/patches/162108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb7ee1e7-ffae-4aeb-9bc3-d2483d1c8394@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T18:15:06","name":"[GCC13] PR tree-optimization/105834 - Choose better initial values for ranger.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb7ee1e7-ffae-4aeb-9bc3-d2483d1c8394@redhat.com/mbox/"},{"id":162122,"url":"https://patchwork.plctlab.org/api/1.2/patches/162122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com/","msgid":"<02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-06T18:37:15","name":"[ARC] Consistent use of whitespace in assembler templates.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com/mbox/"},{"id":162151,"url":"https://patchwork.plctlab.org/api/1.2/patches/162151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194442.1446416-1-christoph.muellner@vrull.eu/","msgid":"<20231106194442.1446416-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-06T19:44:42","name":"RISC-V: Add ABI requirement for XTheadFMemIdx tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194442.1446416-1-christoph.muellner@vrull.eu/mbox/"},{"id":162153,"url":"https://patchwork.plctlab.org/api/1.2/patches/162153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-1-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:32","name":"[pushed,1/4] diagnostics: eliminate diagnostic_kind_count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-1-dmalcolm@redhat.com/mbox/"},{"id":162152,"url":"https://patchwork.plctlab.org/api/1.2/patches/162152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-2-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:33","name":"[pushed,2/4] diagnostics: make diagnostic_context::m_urlifier private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-2-dmalcolm@redhat.com/mbox/"},{"id":162154,"url":"https://patchwork.plctlab.org/api/1.2/patches/162154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-3-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:34","name":"[pushed,3/4] diagnostics: introduce class diagnostic_option_classifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-3-dmalcolm@redhat.com/mbox/"},{"id":162155,"url":"https://patchwork.plctlab.org/api/1.2/patches/162155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-4-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:35","name":"[pushed,4/4] diagnostics: split out struct diagnostic_source_printing_options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-4-dmalcolm@redhat.com/mbox/"},{"id":162181,"url":"https://patchwork.plctlab.org/api/1.2/patches/162181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlUVdALm2uEQCcE@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-06T21:02:13","name":"[committed] hppa: Enable generation of GNU stack notes on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlUVdALm2uEQCcE@mx3210.localdomain/mbox/"},{"id":162185,"url":"https://patchwork.plctlab.org/api/1.2/patches/162185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlVN8QURPmBlipa@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-06T21:05:59","name":"[committed] hppa: Fix typo in PA 2.0 trampoline template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlVN8QURPmBlipa@mx3210.localdomain/mbox/"},{"id":162206,"url":"https://patchwork.plctlab.org/api/1.2/patches/162206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106222959.2707741-3-dmalcolm@redhat.com/","msgid":"<20231106222959.2707741-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T22:29:58","name":"[2/2] libdiagnostics: work-in-progress implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106222959.2707741-3-dmalcolm@redhat.com/mbox/"},{"id":162208,"url":"https://patchwork.plctlab.org/api/1.2/patches/162208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlp93ZwnARyoEia@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T22:34:31","name":"[v4] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlp93ZwnARyoEia@redhat.com/mbox/"},{"id":162207,"url":"https://patchwork.plctlab.org/api/1.2/patches/162207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223503.3271116-1-juzhe.zhong@rivai.ai/","msgid":"<20231106223503.3271116-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T22:35:03","name":"test: Fix XPASS of bb-slp-43.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223503.3271116-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162209,"url":"https://patchwork.plctlab.org/api/1.2/patches/162209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223531.3271166-1-juzhe.zhong@rivai.ai/","msgid":"<20231106223531.3271166-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T22:35:31","name":"test: Fix XPASS of bb-slp-43.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223531.3271166-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162223,"url":"https://patchwork.plctlab.org/api/1.2/patches/162223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106230343.3273494-1-juzhe.zhong@rivai.ai/","msgid":"<20231106230343.3273494-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T23:03:43","name":"test: Fix FAIL of bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106230343.3273494-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162238,"url":"https://patchwork.plctlab.org/api/1.2/patches/162238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7a8cc9f-bd7c-7d56-61d3-e5a95f2ee7af@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-07T00:20:43","name":"c: Refer more consistently to C23 not C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7a8cc9f-bd7c-7d56-61d3-e5a95f2ee7af@codesourcery.com/mbox/"},{"id":162243,"url":"https://patchwork.plctlab.org/api/1.2/patches/162243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107022734.368277-1-haochen.jiang@intel.com/","msgid":"<20231107022734.368277-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-07T02:27:34","name":"i386: Fix isa attribute for TI/TF andnot mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107022734.368277-1-haochen.jiang@intel.com/mbox/"},{"id":162244,"url":"https://patchwork.plctlab.org/api/1.2/patches/162244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107023212.3383839-1-juzhe.zhong@rivai.ai/","msgid":"<20231107023212.3383839-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T02:32:12","name":"RISC-V regression test: Fix FAIL of bb-slp-39.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107023212.3383839-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162251,"url":"https://patchwork.plctlab.org/api/1.2/patches/162251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107030415.1105-1-jinma@linux.alibaba.com/","msgid":"<20231107030415.1105-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-07T03:04:15","name":"riscv: thead: Add support for the XTheadInt ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107030415.1105-1-jinma@linux.alibaba.com/mbox/"},{"id":162255,"url":"https://patchwork.plctlab.org/api/1.2/patches/162255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107033644.3733354-1-juzhe.zhong@rivai.ai/","msgid":"<20231107033644.3733354-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T03:36:44","name":"test: Fix FAIL of SAD tests for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107033644.3733354-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162256,"url":"https://patchwork.plctlab.org/api/1.2/patches/162256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035014.3880317-1-juzhe.zhong@rivai.ai/","msgid":"<20231107035014.3880317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T03:50:14","name":"test: Fix FAIL of vect-sdiv-pow2-1.c for RVV test: Fix FAIL of vect-sdiv-pow2-1.c for RVV#","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035014.3880317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162259,"url":"https://patchwork.plctlab.org/api/1.2/patches/162259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035339.28242-1-chenxiaolong@loongson.cn/","msgid":"<20231107035339.28242-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-07T03:53:39","name":"[v1] LoongArch: Add instructions for the use of vector functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035339.28242-1-chenxiaolong@loongson.cn/mbox/"},{"id":162260,"url":"https://patchwork.plctlab.org/api/1.2/patches/162260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107040606.332-1-chenxiaolong@loongson.cn/","msgid":"<20231107040606.332-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-07T04:06:06","name":"[v1] LoongArch: Add modifiers for lsx and lasx.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107040606.332-1-chenxiaolong@loongson.cn/mbox/"},{"id":162276,"url":"https://patchwork.plctlab.org/api/1.2/patches/162276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107060539.443303-1-hongtao.liu@intel.com/","msgid":"<20231107060539.443303-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-07T06:05:39","name":"[V2] Handle bitop with INTEGER_CST in analyze_and_compute_bitop_with_inv_effect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107060539.443303-1-hongtao.liu@intel.com/mbox/"},{"id":162284,"url":"https://patchwork.plctlab.org/api/1.2/patches/162284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107064115.1848826-1-pan2.li@intel.com/","msgid":"<20231107064115.1848826-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-07T06:41:15","name":"[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107064115.1848826-1-pan2.li@intel.com/mbox/"},{"id":162294,"url":"https://patchwork.plctlab.org/api/1.2/patches/162294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107073321.479349-1-hongyu.wang@intel.com/","msgid":"<20231107073321.479349-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-07T07:33:21","name":"[i386] APX: Fix ICE due to movti postreload splitter [PR112394]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107073321.479349-1-hongyu.wang@intel.com/mbox/"},{"id":162295,"url":"https://patchwork.plctlab.org/api/1.2/patches/162295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074451.3990710-1-juzhe.zhong@rivai.ai/","msgid":"<20231107074451.3990710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T07:44:51","name":"test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074451.3990710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162296,"url":"https://patchwork.plctlab.org/api/1.2/patches/162296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074933.4025916-1-lehua.ding@rivai.ai/","msgid":"<20231107074933.4025916-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-07T07:49:33","name":"RISC-V: Fixed failed rvv combine testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074933.4025916-1-lehua.ding@rivai.ai/mbox/"},{"id":162301,"url":"https://patchwork.plctlab.org/api/1.2/patches/162301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107080627.4178732-1-juzhe.zhong@rivai.ai/","msgid":"<20231107080627.4178732-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T08:06:27","name":"RISC-V regression test: Fix FAIL bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107080627.4178732-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162317,"url":"https://patchwork.plctlab.org/api/1.2/patches/162317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107084725.178816-1-juzhe.zhong@rivai.ai/","msgid":"<20231107084725.178816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T08:47:25","name":"test: Fix bb-slp-33.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107084725.178816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162324,"url":"https://patchwork.plctlab.org/api/1.2/patches/162324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091854.3904987-1-poulhies@adacore.com/","msgid":"<20231107091854.3904987-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:18:54","name":"[COMMITTED] ada: Fix internal error on address of element of packed array component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091854.3904987-1-poulhies@adacore.com/mbox/"},{"id":162325,"url":"https://patchwork.plctlab.org/api/1.2/patches/162325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091907.3905160-1-poulhies@adacore.com/","msgid":"<20231107091907.3905160-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:06","name":"[COMMITTED] ada: Fix scope of semantic style_check pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091907.3905160-1-poulhies@adacore.com/mbox/"},{"id":162328,"url":"https://patchwork.plctlab.org/api/1.2/patches/162328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091912.3905235-1-poulhies@adacore.com/","msgid":"<20231107091912.3905235-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:12","name":"[COMMITTED] ada: Simplify code for Ignore_Style_Checks_Pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091912.3905235-1-poulhies@adacore.com/mbox/"},{"id":162329,"url":"https://patchwork.plctlab.org/api/1.2/patches/162329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091915.3905306-1-poulhies@adacore.com/","msgid":"<20231107091915.3905306-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:15","name":"[COMMITTED] ada: Fix handling of actual subtypes for expanded names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091915.3905306-1-poulhies@adacore.com/mbox/"},{"id":162326,"url":"https://patchwork.plctlab.org/api/1.2/patches/162326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091919.3905379-1-poulhies@adacore.com/","msgid":"<20231107091919.3905379-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:19","name":"[COMMITTED] ada: Cleanup getting of actual subtypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091919.3905379-1-poulhies@adacore.com/mbox/"},{"id":162327,"url":"https://patchwork.plctlab.org/api/1.2/patches/162327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091929.3905481-1-poulhies@adacore.com/","msgid":"<20231107091929.3905481-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:29","name":"[COMMITTED] ada: Fix style in declaration of routine for expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091929.3905481-1-poulhies@adacore.com/mbox/"},{"id":162331,"url":"https://patchwork.plctlab.org/api/1.2/patches/162331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091932.3905575-1-poulhies@adacore.com/","msgid":"<20231107091932.3905575-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:32","name":"[COMMITTED] ada: Change local variables to constants in expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091932.3905575-1-poulhies@adacore.com/mbox/"},{"id":162335,"url":"https://patchwork.plctlab.org/api/1.2/patches/162335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091937.3905649-1-poulhies@adacore.com/","msgid":"<20231107091937.3905649-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:37","name":"[COMMITTED] ada: Simplify handling of known values in expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091937.3905649-1-poulhies@adacore.com/mbox/"},{"id":162333,"url":"https://patchwork.plctlab.org/api/1.2/patches/162333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091942.3905723-1-poulhies@adacore.com/","msgid":"<20231107091942.3905723-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:42","name":"[COMMITTED] ada: Avoid extra conversion in expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091942.3905723-1-poulhies@adacore.com/mbox/"},{"id":162337,"url":"https://patchwork.plctlab.org/api/1.2/patches/162337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091945.3905796-1-poulhies@adacore.com/","msgid":"<20231107091945.3905796-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:45","name":"[COMMITTED] ada: Fix extra whitespace after END keywords","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091945.3905796-1-poulhies@adacore.com/mbox/"},{"id":162334,"url":"https://patchwork.plctlab.org/api/1.2/patches/162334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091951.3905875-1-poulhies@adacore.com/","msgid":"<20231107091951.3905875-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:51","name":"[COMMITTED] ada: Simplify expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091951.3905875-1-poulhies@adacore.com/mbox/"},{"id":162340,"url":"https://patchwork.plctlab.org/api/1.2/patches/162340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091954.3905945-1-poulhies@adacore.com/","msgid":"<20231107091954.3905945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:54","name":"[COMMITTED] ada: Remove duplicated code for expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091954.3905945-1-poulhies@adacore.com/mbox/"},{"id":162330,"url":"https://patchwork.plctlab.org/api/1.2/patches/162330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091958.3906017-1-poulhies@adacore.com/","msgid":"<20231107091958.3906017-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:58","name":"[COMMITTED] ada: Error in prefix-notation call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091958.3906017-1-poulhies@adacore.com/mbox/"},{"id":162347,"url":"https://patchwork.plctlab.org/api/1.2/patches/162347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092005.3906089-1-poulhies@adacore.com/","msgid":"<20231107092005.3906089-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:01","name":"[COMMITTED] ada: New Local_Restrictions and User_Aspect aspects.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092005.3906089-1-poulhies@adacore.com/mbox/"},{"id":162339,"url":"https://patchwork.plctlab.org/api/1.2/patches/162339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092009.3906170-1-poulhies@adacore.com/","msgid":"<20231107092009.3906170-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:09","name":"[COMMITTED] ada: Fix documentation of -gnatwc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092009.3906170-1-poulhies@adacore.com/mbox/"},{"id":162343,"url":"https://patchwork.plctlab.org/api/1.2/patches/162343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092012.3906244-1-poulhies@adacore.com/","msgid":"<20231107092012.3906244-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:12","name":"[COMMITTED] ada: Cleanup more \"not Present\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092012.3906244-1-poulhies@adacore.com/mbox/"},{"id":162341,"url":"https://patchwork.plctlab.org/api/1.2/patches/162341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092015.3906320-1-poulhies@adacore.com/","msgid":"<20231107092015.3906320-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:15","name":"[COMMITTED] ada: Cleanup \"not Present\" on List_Id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092015.3906320-1-poulhies@adacore.com/mbox/"},{"id":162348,"url":"https://patchwork.plctlab.org/api/1.2/patches/162348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092018.3906393-1-poulhies@adacore.com/","msgid":"<20231107092018.3906393-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:18","name":"[COMMITTED] ada: Minor tweaks for comparison operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092018.3906393-1-poulhies@adacore.com/mbox/"},{"id":162349,"url":"https://patchwork.plctlab.org/api/1.2/patches/162349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092022.3906466-1-poulhies@adacore.com/","msgid":"<20231107092022.3906466-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:21","name":"[COMMITTED] ada: Implement Aspects as fields under nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092022.3906466-1-poulhies@adacore.com/mbox/"},{"id":162350,"url":"https://patchwork.plctlab.org/api/1.2/patches/162350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092027.3906542-1-poulhies@adacore.com/","msgid":"<20231107092027.3906542-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:27","name":"[COMMITTED] ada: Rename Is_Limited_View to reflect actual query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092027.3906542-1-poulhies@adacore.com/mbox/"},{"id":162332,"url":"https://patchwork.plctlab.org/api/1.2/patches/162332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092031.3906616-1-poulhies@adacore.com/","msgid":"<20231107092031.3906616-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:31","name":"[COMMITTED] ada: Fix expansion of type aspects with handling of aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092031.3906616-1-poulhies@adacore.com/mbox/"},{"id":162345,"url":"https://patchwork.plctlab.org/api/1.2/patches/162345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092034.3906691-1-poulhies@adacore.com/","msgid":"<20231107092034.3906691-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:33","name":"[COMMITTED] ada: Elide temporary for aliased array with unconstrained nominal subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092034.3906691-1-poulhies@adacore.com/mbox/"},{"id":162346,"url":"https://patchwork.plctlab.org/api/1.2/patches/162346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092036.3906764-1-poulhies@adacore.com/","msgid":"<20231107092036.3906764-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:36","name":"[COMMITTED] ada: Fix Ada.Directories.Modification_Time on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092036.3906764-1-poulhies@adacore.com/mbox/"},{"id":162336,"url":"https://patchwork.plctlab.org/api/1.2/patches/162336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092039.3906837-1-poulhies@adacore.com/","msgid":"<20231107092039.3906837-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:39","name":"[COMMITTED] ada: Fix incorrect resolution of overloaded function call in instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092039.3906837-1-poulhies@adacore.com/mbox/"},{"id":162351,"url":"https://patchwork.plctlab.org/api/1.2/patches/162351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092042.3906911-1-poulhies@adacore.com/","msgid":"<20231107092042.3906911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:42","name":"[COMMITTED] ada: Update the logo in the gnat doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092042.3906911-1-poulhies@adacore.com/mbox/"},{"id":162342,"url":"https://patchwork.plctlab.org/api/1.2/patches/162342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092045.3906982-1-poulhies@adacore.com/","msgid":"<20231107092045.3906982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:45","name":"[COMMITTED] ada: Compiler crash on early alignment clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092045.3906982-1-poulhies@adacore.com/mbox/"},{"id":162352,"url":"https://patchwork.plctlab.org/api/1.2/patches/162352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092047.3907065-1-poulhies@adacore.com/","msgid":"<20231107092047.3907065-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:47","name":"[COMMITTED] ada: Fix spurious -Wstringop-overflow with link time optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092047.3907065-1-poulhies@adacore.com/mbox/"},{"id":162338,"url":"https://patchwork.plctlab.org/api/1.2/patches/162338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092050.3907141-1-poulhies@adacore.com/","msgid":"<20231107092050.3907141-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:50","name":"[COMMITTED] ada: Fix debug info for aliased packed array with unconstrained nominal subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092050.3907141-1-poulhies@adacore.com/mbox/"},{"id":162344,"url":"https://patchwork.plctlab.org/api/1.2/patches/162344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092317.732045-1-juzhe.zhong@rivai.ai/","msgid":"<20231107092317.732045-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T09:23:17","name":"test: Fix FAIL of pr65518.c for RVV[PR112420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092317.732045-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162354,"url":"https://patchwork.plctlab.org/api/1.2/patches/162354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107094519.1822582-1-christoph.muellner@vrull.eu/","msgid":"<20231107094519.1822582-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-07T09:45:19","name":"RISC-V: Use stdint-gcc.h in rvv testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107094519.1822582-1-christoph.muellner@vrull.eu/mbox/"},{"id":162370,"url":"https://patchwork.plctlab.org/api/1.2/patches/162370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-2-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:02","name":"[v2,1/3] libgfortran: Don'\''t skip allocation if size is zero [PR112412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-2-mikael@gcc.gnu.org/mbox/"},{"id":162437,"url":"https://patchwork.plctlab.org/api/1.2/patches/162437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-3-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:03","name":"[v2,2/3] libgfortran: Remove early return if extent is zero [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-3-mikael@gcc.gnu.org/mbox/"},{"id":162438,"url":"https://patchwork.plctlab.org/api/1.2/patches/162438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-4-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:04","name":"[v2,3/3] libgfortran: Remove empty array descriptor first dimension overwrite [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-4-mikael@gcc.gnu.org/mbox/"},{"id":162392,"url":"https://patchwork.plctlab.org/api/1.2/patches/162392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107103211.2837188-2-victor.donascimento@arm.com/","msgid":"<20231107103211.2837188-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-07T10:30:10","name":"[1/5] aarch64: Add march flags for +the and +d128 arch extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107103211.2837188-2-victor.donascimento@arm.com/mbox/"},{"id":162435,"url":"https://patchwork.plctlab.org/api/1.2/patches/162435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107114814.851059-1-juzhe.zhong@rivai.ai/","msgid":"<20231107114814.851059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T11:48:14","name":"RISC-V: Add RISC-V into vect_cmdline_needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107114814.851059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162442,"url":"https://patchwork.plctlab.org/api/1.2/patches/162442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107120927.1675589-1-juzhe.zhong@rivai.ai/","msgid":"<20231107120927.1675589-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T12:09:27","name":"[V2] test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107120927.1675589-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162517,"url":"https://patchwork.plctlab.org/api/1.2/patches/162517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107143054.3011942-1-pan2.li@intel.com/","msgid":"<20231107143054.3011942-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-07T14:30:54","name":"[v1] ISC-V: Support FP floor to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107143054.3011942-1-pan2.li@intel.com/mbox/"},{"id":162518,"url":"https://patchwork.plctlab.org/api/1.2/patches/162518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107144505.2879197-1-juzhe.zhong@rivai.ai/","msgid":"<20231107144505.2879197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T14:45:05","name":"test: Recover sdiv_pow2 check and remove test of RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107144505.2879197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162582,"url":"https://patchwork.plctlab.org/api/1.2/patches/162582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107150838.1031324-1-ppalka@redhat.com/","msgid":"<20231107150838.1031324-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T15:08:38","name":"c++: fix tf_decltype manipulation for COMPOUND_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107150838.1031324-1-ppalka@redhat.com/mbox/"},{"id":162575,"url":"https://patchwork.plctlab.org/api/1.2/patches/162575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151315.2881621-1-juzhe.zhong@rivai.ai/","msgid":"<20231107151315.2881621-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T15:13:15","name":"[V2] test: Fix bb-slp-33.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151315.2881621-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162621,"url":"https://patchwork.plctlab.org/api/1.2/patches/162621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151859.2882293-1-juzhe.zhong@rivai.ai/","msgid":"<20231107151859.2882293-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T15:18:59","name":"[V3] test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151859.2882293-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162639,"url":"https://patchwork.plctlab.org/api/1.2/patches/162639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ada8og.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-07T15:23:59","name":"[pushed] aarch64: Add a %Z operand modifier for SVE registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ada8og.fsf@arm.com/mbox/"},{"id":162642,"url":"https://patchwork.plctlab.org/api/1.2/patches/162642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com/","msgid":"<483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com>","list_archive_url":null,"date":"2023-11-07T15:30:27","name":"[committed] OpenMP: invoke.texi - mention C attribute syntax for -fopenmp(-simd)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com/mbox/"},{"id":162681,"url":"https://patchwork.plctlab.org/api/1.2/patches/162681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107172931.25778-1-manos.anagnostakis@vrull.eu/","msgid":"<20231107172931.25778-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-11-07T17:29:31","name":"aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107172931.25778-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":162687,"url":"https://patchwork.plctlab.org/api/1.2/patches/162687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-07T17:52:35","name":"gcc/configure: Regenerate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":162695,"url":"https://patchwork.plctlab.org/api/1.2/patches/162695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf5h9y7h.fsf@oldenburg.str.redhat.com/","msgid":"<87sf5h9y7h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-07T19:10:10","name":"[v3] c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf5h9y7h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162701,"url":"https://patchwork.plctlab.org/api/1.2/patches/162701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195237.1658753-1-ppalka@redhat.com/","msgid":"<20231107195237.1658753-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T19:52:37","name":"c++: decltype of capture proxy [PR79378, PR96917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195237.1658753-1-ppalka@redhat.com/mbox/"},{"id":162702,"url":"https://patchwork.plctlab.org/api/1.2/patches/162702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195244.1658781-1-ppalka@redhat.com/","msgid":"<20231107195244.1658781-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T19:52:44","name":"c++: decltype of (by-value captured reference) [PR79620]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195244.1658781-1-ppalka@redhat.com/mbox/"},{"id":162704,"url":"https://patchwork.plctlab.org/api/1.2/patches/162704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com/","msgid":"<958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com>","list_archive_url":null,"date":"2023-11-07T20:04:21","name":"[committed] c: Change T2X_* format checking macros to T23_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com/mbox/"},{"id":162834,"url":"https://patchwork.plctlab.org/api/1.2/patches/162834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com/","msgid":"<66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com>","list_archive_url":null,"date":"2023-11-08T00:22:07","name":"[committed] testsuite: Rename c2x-*, gnu2x-* tests to c23-*, gnu23-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com/mbox/"},{"id":162875,"url":"https://patchwork.plctlab.org/api/1.2/patches/162875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-2-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:34","name":"[1/7] ira: Refactor the handling of register conflicts to make it more general","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-2-lehua.ding@rivai.ai/mbox/"},{"id":162877,"url":"https://patchwork.plctlab.org/api/1.2/patches/162877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-4-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:36","name":"[3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-4-lehua.ding@rivai.ai/mbox/"},{"id":162878,"url":"https://patchwork.plctlab.org/api/1.2/patches/162878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-5-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:37","name":"[4/7] ira: Support subreg copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-5-lehua.ding@rivai.ai/mbox/"},{"id":162876,"url":"https://patchwork.plctlab.org/api/1.2/patches/162876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-6-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:38","name":"[5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-6-lehua.ding@rivai.ai/mbox/"},{"id":162889,"url":"https://patchwork.plctlab.org/api/1.2/patches/162889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108061035.3975866-1-juzhe.zhong@rivai.ai/","msgid":"<20231108061035.3975866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T06:10:35","name":"RISC-V: Normalize user vsetvl intrinsics[PR112092]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108061035.3975866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162899,"url":"https://patchwork.plctlab.org/api/1.2/patches/162899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUsw14bVvAyCni7X@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-08T06:55:19","name":"libgcc: Add {unsigned ,}__int128 <-> _Decimal{32,64,128} conversion support [PR65833]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUsw14bVvAyCni7X@tucnak/mbox/"},{"id":162916,"url":"https://patchwork.plctlab.org/api/1.2/patches/162916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cmsaanz.fsf@oldenburg.str.redhat.com/","msgid":"<877cmsaanz.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T08:53:20","name":"gcc.dg/Wmissing-parameter-type*: Test the intended warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cmsaanz.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162918,"url":"https://patchwork.plctlab.org/api/1.2/patches/162918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108090938.8206-1-xuli1@eswincomputing.com/","msgid":"<20231108090938.8206-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-08T09:09:38","name":"RISC-V: Eliminate unused parameter warning.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108090938.8206-1-xuli1@eswincomputing.com/mbox/"},{"id":162924,"url":"https://patchwork.plctlab.org/api/1.2/patches/162924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqs8s4h.fsf@oldenburg.str.redhat.com/","msgid":"<87jzqs8s4h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T10:19:10","name":"Improve C99 compatibility of gcc.dg/setjmp-7.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqs8s4h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162947,"url":"https://patchwork.plctlab.org/api/1.2/patches/162947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108105317.1786716-1-juzhe.zhong@rivai.ai/","msgid":"<20231108105317.1786716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T10:53:17","name":"Middle-end: Fix bug of induction variable vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108105317.1786716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162950,"url":"https://patchwork.plctlab.org/api/1.2/patches/162950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-2-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:12","name":"[1/3] RISC-V: Add support for XCVelw extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-2-mary.bennett@embecosm.com/mbox/"},{"id":162951,"url":"https://patchwork.plctlab.org/api/1.2/patches/162951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-3-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:13","name":"[2/3] RISC-V: Update XCValu constraints to match other vendors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-3-mary.bennett@embecosm.com/mbox/"},{"id":162952,"url":"https://patchwork.plctlab.org/api/1.2/patches/162952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-4-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-4-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:14","name":"[3/3] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-4-mary.bennett@embecosm.com/mbox/"},{"id":162989,"url":"https://patchwork.plctlab.org/api/1.2/patches/162989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108113306.1820431-1-juzhe.zhong@rivai.ai/","msgid":"<20231108113306.1820431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T11:33:06","name":"[Committed] RISC-V: Fix VSETVL VL check condition bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108113306.1820431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162994,"url":"https://patchwork.plctlab.org/api/1.2/patches/162994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de/","msgid":"<3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de>","list_archive_url":null,"date":"2023-11-08T11:53:28","name":"[avr,committed] Tweak IEEE double multiplication","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de/mbox/"},{"id":163026,"url":"https://patchwork.plctlab.org/api/1.2/patches/163026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108131237.3672914-1-chenyixuan@iscas.ac.cn/","msgid":"<20231108131237.3672914-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-08T13:12:37","name":"minimal support for xtheadv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108131237.3672914-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":163030,"url":"https://patchwork.plctlab.org/api/1.2/patches/163030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108132725.1331224-1-lehua.ding@rivai.ai/","msgid":"<20231108132725.1331224-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T13:27:25","name":"RISC-V: Removed unnecessary sign-extend for vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108132725.1331224-1-lehua.ding@rivai.ai/mbox/"},{"id":163075,"url":"https://patchwork.plctlab.org/api/1.2/patches/163075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y2c8fca.fsf@oldenburg.str.redhat.com/","msgid":"<875y2c8fca.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T14:55:17","name":"i386: Fix C99 compatibility issues in the x86-64 AVX ABI test suite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y2c8fca.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163077,"url":"https://patchwork.plctlab.org/api/1.2/patches/163077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com/","msgid":"<908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com>","list_archive_url":null,"date":"2023-11-08T15:00:23","name":"tree-ssa-loop-ivopts : Add live analysis in regs used in decision making","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com/mbox/"},{"id":163078,"url":"https://patchwork.plctlab.org/api/1.2/patches/163078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:02:54","name":"[1/4] Fix SLP of masked loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163079,"url":"https://patchwork.plctlab.org/api/1.2/patches/163079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150309.85118133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150309.85118133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:09","name":"[2/4] TLC to vect_check_store_rhs and vect_slp_child_index_for_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150309.85118133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163080,"url":"https://patchwork.plctlab.org/api/1.2/patches/163080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:24","name":"[3/4] Fix SLP of emulated gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163081,"url":"https://patchwork.plctlab.org/api/1.2/patches/163081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150336.96BCC133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150336.96BCC133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:36","name":"[4/4] Refactor x86 decl based scatter vectorization, prepare SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150336.96BCC133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163088,"url":"https://patchwork.plctlab.org/api/1.2/patches/163088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108153646.5100A138F2@imap2.suse-dmz.suse.de/","msgid":"<20231108153646.5100A138F2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:36:45","name":"Fix SIMD clone SLP a bit more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108153646.5100A138F2@imap2.suse-dmz.suse.de/mbox/"},{"id":163094,"url":"https://patchwork.plctlab.org/api/1.2/patches/163094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qd0jlac.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:51:23","name":"skip debug stmts when assigning locus discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qd0jlac.fsf@lxoliva.fsfla.org/mbox/"},{"id":163095,"url":"https://patchwork.plctlab.org/api/1.2/patches/163095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmusi6j2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:55:29","name":"testsuite: arg-pushing reqs -mno-accumulate-outgoing-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmusi6j2.fsf@lxoliva.fsfla.org/mbox/"},{"id":163096,"url":"https://patchwork.plctlab.org/api/1.2/patches/163096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf5gi6gz.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:56:44","name":"testsuite: adjust gomp test for x86 -m32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf5gi6gz.fsf@lxoliva.fsfla.org/mbox/"},{"id":163097,"url":"https://patchwork.plctlab.org/api/1.2/patches/163097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7g4i6fr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:57:28","name":"testsuite: force PIC/PIE off for pr58245-1.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7g4i6fr.fsf@lxoliva.fsfla.org/mbox/"},{"id":163118,"url":"https://patchwork.plctlab.org/api/1.2/patches/163118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCohe0qW4BGjbXSvBauJeAzkqoNNbSU+rCZV-jJgo+uAKg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:00:58","name":"RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCohe0qW4BGjbXSvBauJeAzkqoNNbSU+rCZV-jJgo+uAKg@mail.gmail.com/mbox/"},{"id":163098,"url":"https://patchwork.plctlab.org/api/1.2/patches/163098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzqsi68k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:01:47","name":"testsuite: xfail scev-[35].c on ia32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzqsi68k.fsf@lxoliva.fsfla.org/mbox/"},{"id":163119,"url":"https://patchwork.plctlab.org/api/1.2/patches/163119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1gi5ud.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:10:18","name":"libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1gi5ud.fsf@lxoliva.fsfla.org/mbox/"},{"id":163101,"url":"https://patchwork.plctlab.org/api/1.2/patches/163101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzfzogq0h.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:37:34","name":"[v2] i386 PIE: accept @GOTOFF in load/store multi base address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzfzogq0h.fsf@lxoliva.fsfla.org/mbox/"},{"id":163105,"url":"https://patchwork.plctlab.org/api/1.2/patches/163105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8acgpru.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:42:45","name":"[v2,PR83782] ifunc: back-propagate ifunc_resolver to aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8acgpru.fsf@lxoliva.fsfla.org/mbox/"},{"id":163109,"url":"https://patchwork.plctlab.org/api/1.2/patches/163109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com/","msgid":"<60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com>","list_archive_url":null,"date":"2023-11-08T16:58:10","name":"OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com/mbox/"},{"id":163174,"url":"https://patchwork.plctlab.org/api/1.2/patches/163174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108215904.2779753-1-ppalka@redhat.com/","msgid":"<20231108215904.2779753-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-08T21:59:04","name":"c++: non-dependent .* folding [PR112427]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108215904.2779753-1-ppalka@redhat.com/mbox/"},{"id":163208,"url":"https://patchwork.plctlab.org/api/1.2/patches/163208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvnhgj2.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:17:05","name":"[v2] libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvnhgj2.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":163196,"url":"https://patchwork.plctlab.org/api/1.2/patches/163196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com/","msgid":"<7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T01:31:52","name":"[PATCH-2v2,rs6000] Enable vector mode for by pieces equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com/mbox/"},{"id":163197,"url":"https://patchwork.plctlab.org/api/1.2/patches/163197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com/","msgid":"<4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T01:32:07","name":"[PATCH-3v3,rs6000] Fix regression cases caused 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com/mbox/"},{"id":163198,"url":"https://patchwork.plctlab.org/api/1.2/patches/163198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1fhf0k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:49:47","name":"testsuite: tsan: add fallback overload for pthread_cond_clockwait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1fhf0k.fsf@lxoliva.fsfla.org/mbox/"},{"id":163199,"url":"https://patchwork.plctlab.org/api/1.2/patches/163199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109015537.3967177-1-juzhe.zhong@rivai.ai/","msgid":"<20231109015537.3967177-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T01:55:37","name":"[Committed] RISC-V: Fix dynamic tests [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109015537.3967177-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163200,"url":"https://patchwork.plctlab.org/api/1.2/patches/163200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkc3heqh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:55:50","name":"libsupc++: try cxa_thread_atexit_impl at runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkc3heqh.fsf@lxoliva.fsfla.org/mbox/"},{"id":163205,"url":"https://patchwork.plctlab.org/api/1.2/patches/163205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109023917.3985192-1-juzhe.zhong@rivai.ai/","msgid":"<20231109023917.3985192-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T02:39:17","name":"RISC-V: Fix dynamic LMUL cost model ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109023917.3985192-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163215,"url":"https://patchwork.plctlab.org/api/1.2/patches/163215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cmrha2f.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T03:36:40","name":"[v3] libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cmrha2f.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":163226,"url":"https://patchwork.plctlab.org/api/1.2/patches/163226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8fef393-68f9-4ea8-8903-fb280e0f46d3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-09T05:41:18","name":"[expand] Call misaligned memory reference in expand_builtin_return [PR112417]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8fef393-68f9-4ea8-8903-fb280e0f46d3@linux.ibm.com/mbox/"},{"id":163242,"url":"https://patchwork.plctlab.org/api/1.2/patches/163242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109060858.3067686-1-pan2.li@intel.com/","msgid":"<20231109060858.3067686-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T06:08:58","name":"[v2] DSE: Allow vector type for get_stored_val when read < store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109060858.3067686-1-pan2.li@intel.com/mbox/"},{"id":163250,"url":"https://patchwork.plctlab.org/api/1.2/patches/163250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109065057.3179104-1-pan2.li@intel.com/","msgid":"<20231109065057.3179104-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T06:50:57","name":"[v1] RISC-V: Refine frm emit after bb end in succ edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109065057.3179104-1-pan2.li@intel.com/mbox/"},{"id":163257,"url":"https://patchwork.plctlab.org/api/1.2/patches/163257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109071457.2574044-1-lin1.hu@intel.com/","msgid":"<20231109071457.2574044-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-11-09T07:14:57","name":"Avoid generate vblendps with ymm16+","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109071457.2574044-1-lin1.hu@intel.com/mbox/"},{"id":163271,"url":"https://patchwork.plctlab.org/api/1.2/patches/163271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109074008.580-1-jinma@linux.alibaba.com/","msgid":"<20231109074008.580-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-09T07:40:08","name":"RISC-V: Fix the illegal operands for the XTheadMemidx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109074008.580-1-jinma@linux.alibaba.com/mbox/"},{"id":163278,"url":"https://patchwork.plctlab.org/api/1.2/patches/163278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082123.3120267-1-hongtao.liu@intel.com/","msgid":"<20231109082123.3120267-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-09T08:21:23","name":"Fix wrong code due to vec_merge + pcmp to blendvb splitter.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082123.3120267-1-hongtao.liu@intel.com/mbox/"},{"id":163280,"url":"https://patchwork.plctlab.org/api/1.2/patches/163280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-1-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:09","name":"[1/3] s390: Recognize further vpdi and vmr{l,h} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-1-stefansf@linux.ibm.com/mbox/"},{"id":163286,"url":"https://patchwork.plctlab.org/api/1.2/patches/163286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-2-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:10","name":"[2/3] s390: Add expand_perm_reverse_elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-2-stefansf@linux.ibm.com/mbox/"},{"id":163281,"url":"https://patchwork.plctlab.org/api/1.2/patches/163281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-3-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-3-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:11","name":"[3/3] s390: Revise vector reverse elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-3-stefansf@linux.ibm.com/mbox/"},{"id":163285,"url":"https://patchwork.plctlab.org/api/1.2/patches/163285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082409.2890-1-stefansf@linux.ibm.com/","msgid":"<20231109082409.2890-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:24:09","name":"s390: Reduce number of patterns where the condition is false anyway","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082409.2890-1-stefansf@linux.ibm.com/mbox/"},{"id":163342,"url":"https://patchwork.plctlab.org/api/1.2/patches/163342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103037.281290-1-yunqiang.su@cipunited.com/","msgid":"<20231109103037.281290-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-09T10:30:36","name":"[committed] MIPS: Use -mnan value for -mabs if not specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103037.281290-1-yunqiang.su@cipunited.com/mbox/"},{"id":163343,"url":"https://patchwork.plctlab.org/api/1.2/patches/163343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103201.286626-1-yunqiang.su@cipunited.com/","msgid":"<20231109103201.286626-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-09T10:32:01","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103201.286626-1-yunqiang.su@cipunited.com/mbox/"},{"id":163346,"url":"https://patchwork.plctlab.org/api/1.2/patches/163346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105114.3A7EC385B800@sourceware.org/","msgid":"<20231109105114.3A7EC385B800@sourceware.org>","list_archive_url":null,"date":"2023-11-09T10:50:48","name":"tree-optimization/112444 - avoid bougs PHI value-numbering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105114.3A7EC385B800@sourceware.org/mbox/"},{"id":163347,"url":"https://patchwork.plctlab.org/api/1.2/patches/163347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105542.4013483-2-mary.bennett@embecosm.com/","msgid":"<20231109105542.4013483-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T10:55:42","name":"[1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105542.4013483-2-mary.bennett@embecosm.com/mbox/"},{"id":163350,"url":"https://patchwork.plctlab.org/api/1.2/patches/163350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com/","msgid":"<74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-09T11:26:27","name":"[2/4] aarch64: Fix tme intrinsic availability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com/mbox/"},{"id":163351,"url":"https://patchwork.plctlab.org/api/1.2/patches/163351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com/","msgid":"<9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-09T11:26:55","name":"[3/4] aarch64: Fix memtag intrinsic availability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com/mbox/"},{"id":163358,"url":"https://patchwork.plctlab.org/api/1.2/patches/163358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109113650.EB1D63858296@sourceware.org/","msgid":"<20231109113650.EB1D63858296@sourceware.org>","list_archive_url":null,"date":"2023-11-09T11:36:24","name":"tree-optimization/112450 - avoid AVX512 style masking for BImode masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109113650.EB1D63858296@sourceware.org/mbox/"},{"id":163378,"url":"https://patchwork.plctlab.org/api/1.2/patches/163378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109115736.541131-2-mary.bennett@embecosm.com/","msgid":"<20231109115736.541131-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T11:57:36","name":"[1/1] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109115736.541131-2-mary.bennett@embecosm.com/mbox/"},{"id":163385,"url":"https://patchwork.plctlab.org/api/1.2/patches/163385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109120038.109612-1-juzhe.zhong@rivai.ai/","msgid":"<20231109120038.109612-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T12:00:38","name":"[Committed] RISC-V: Add PR112450 test to avoid regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109120038.109612-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163391,"url":"https://patchwork.plctlab.org/api/1.2/patches/163391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109124219.966619-2-mary.bennett@embecosm.com/","msgid":"<20231109124219.966619-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T12:42:19","name":"[1/1] RISC-V: Add support for XCVmem extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109124219.966619-2-mary.bennett@embecosm.com/mbox/"},{"id":163407,"url":"https://patchwork.plctlab.org/api/1.2/patches/163407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109143338.307725-1-pan2.li@intel.com/","msgid":"<20231109143338.307725-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T14:33:38","name":"[v1] Internal-fn: Add FLOATN support for l/ll round and rint [PR/112432]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109143338.307725-1-pan2.li@intel.com/mbox/"},{"id":163411,"url":"https://patchwork.plctlab.org/api/1.2/patches/163411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUz0fdighFsO3Na6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-09T15:02:21","name":"Add type-generic clz/ctz/clrsb/ffs/parity/popcount builtins [PR111309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUz0fdighFsO3Na6@tucnak/mbox/"},{"id":163523,"url":"https://patchwork.plctlab.org/api/1.2/patches/163523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109160028.2829009-1-ppalka@redhat.com/","msgid":"<20231109160028.2829009-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-09T16:00:28","name":"libstdc++: Fix forwarding in __take/drop_of_repeat_view [PR112453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109160028.2829009-1-ppalka@redhat.com/mbox/"},{"id":163537,"url":"https://patchwork.plctlab.org/api/1.2/patches/163537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com/","msgid":"<0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com>","list_archive_url":null,"date":"2023-11-09T18:25:44","name":"[pushed,IRA] : Fixing conflict calculation from region landing pads.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com/mbox/"},{"id":163581,"url":"https://patchwork.plctlab.org/api/1.2/patches/163581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109193009.2391070-1-arsen@aarsen.me/","msgid":"<20231109193009.2391070-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-09T19:25:34","name":"[1/2] libstdc++: declare std::allocator in !HOSTED as an extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109193009.2391070-1-arsen@aarsen.me/mbox/"},{"id":163623,"url":"https://patchwork.plctlab.org/api/1.2/patches/163623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109223140.2989474-1-dmalcolm@redhat.com/","msgid":"<20231109223140.2989474-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-09T22:31:40","name":"[pushed] diagnostics: cleanups to diagnostic-show-locus.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109223140.2989474-1-dmalcolm@redhat.com/mbox/"},{"id":163633,"url":"https://patchwork.plctlab.org/api/1.2/patches/163633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109233325.2189755-1-juzhe.zhong@rivai.ai/","msgid":"<20231109233325.2189755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T23:33:25","name":"RISC-V: Move cond_copysign from combine pattern to autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109233325.2189755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163634,"url":"https://patchwork.plctlab.org/api/1.2/patches/163634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109234945.4108-1-jose.marchesi@oracle.com/","msgid":"<20231109234945.4108-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-09T23:49:45","name":"[COMMITED] bpf: testsuite: fix expected regexp in gcc.target/bpf/ldxdw.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109234945.4108-1-jose.marchesi@oracle.com/mbox/"},{"id":163690,"url":"https://patchwork.plctlab.org/api/1.2/patches/163690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110001720.20880-1-jose.marchesi@oracle.com/","msgid":"<20231110001720.20880-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-10T00:17:20","name":"[COMMITTED] bpf: fix pseudo-c asm emitted for *mulsidi3_zeroextend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110001720.20880-1-jose.marchesi@oracle.com/mbox/"},{"id":163717,"url":"https://patchwork.plctlab.org/api/1.2/patches/163717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110014158.371690-2-haochen.jiang@intel.com/","msgid":"<20231110014158.371690-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-10T01:41:58","name":"Initial support for AVX10.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110014158.371690-2-haochen.jiang@intel.com/mbox/"},{"id":163719,"url":"https://patchwork.plctlab.org/api/1.2/patches/163719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110015202.650942-1-hongtao.liu@intel.com/","msgid":"<20231110015202.650942-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T01:52:02","name":"Simplify vector ((VCE?(a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE:a cmp VCE:b) ? c : d.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110015202.650942-1-hongtao.liu@intel.com/mbox/"},{"id":163763,"url":"https://patchwork.plctlab.org/api/1.2/patches/163763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033316.1126689-1-juzhe.zhong@rivai.ai/","msgid":"<20231110033316.1126689-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T03:33:16","name":"RISC-V: Robustify vec_init pattern[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033316.1126689-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163771,"url":"https://patchwork.plctlab.org/api/1.2/patches/163771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033651.1127125-1-juzhe.zhong@rivai.ai/","msgid":"<20231110033651.1127125-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T03:36:51","name":"RISC-V: Add combine optimization by slideup for vec_init vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033651.1127125-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163772,"url":"https://patchwork.plctlab.org/api/1.2/patches/163772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033900.246872-1-hongtao.liu@intel.com/","msgid":"<20231110033900.246872-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T03:39:00","name":"Support vec_set/vec_extract/vec_init for V4HF/V2HF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033900.246872-1-hongtao.liu@intel.com/mbox/"},{"id":163775,"url":"https://patchwork.plctlab.org/api/1.2/patches/163775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110061228.1411882-1-hongtao.liu@intel.com/","msgid":"<20231110061228.1411882-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T06:12:28","name":"Simplify vector ((VCE?(a cmp b ? -1 : 0)) < 0) ? c : d to just VCE:((a cmp b) ? (VCE c) : (VCE d)).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110061228.1411882-1-hongtao.liu@intel.com/mbox/"},{"id":163776,"url":"https://patchwork.plctlab.org/api/1.2/patches/163776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110062237.3267408-1-pan2.li@intel.com/","msgid":"<20231110062237.3267408-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-10T06:22:37","name":"[v1] RISC-V: Support vec_init for trailing same element","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110062237.3267408-1-pan2.li@intel.com/mbox/"},{"id":163777,"url":"https://patchwork.plctlab.org/api/1.2/patches/163777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com/","msgid":"<6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T07:09:02","name":"[PING,^1,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com/mbox/"},{"id":163778,"url":"https://patchwork.plctlab.org/api/1.2/patches/163778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110071431.1580-1-jinma@linux.alibaba.com/","msgid":"<20231110071431.1580-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-10T07:14:31","name":"RISC-V: Fix bug that XTheadMemPair extension caused fcsr not to be saved and restored before and after interrupt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110071431.1580-1-jinma@linux.alibaba.com/mbox/"},{"id":163788,"url":"https://patchwork.plctlab.org/api/1.2/patches/163788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com/","msgid":"<3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T07:58:58","name":"[PING,V15,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com/mbox/"},{"id":163790,"url":"https://patchwork.plctlab.org/api/1.2/patches/163790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110081435.3963830-1-pan2.li@intel.com/","msgid":"<20231110081435.3963830-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-10T08:14:35","name":"[v1] RISC-V: Add HFmode for l/ll round and rint autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110081435.3963830-1-pan2.li@intel.com/mbox/"},{"id":163791,"url":"https://patchwork.plctlab.org/api/1.2/patches/163791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com/","msgid":"<3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T09:22:41","name":"[PATCH-3v4,rs6000] Fix regression cases caused 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com/mbox/"},{"id":163793,"url":"https://patchwork.plctlab.org/api/1.2/patches/163793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com/","msgid":"<49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com>","list_archive_url":null,"date":"2023-11-10T10:15:42","name":"[committed] amdgcn: Fix vector min/max ICE (pr112313)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com/mbox/"},{"id":163794,"url":"https://patchwork.plctlab.org/api/1.2/patches/163794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kx6eez.fsf@oldenburg.str.redhat.com/","msgid":"<87r0kx6eez.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T11:22:44","name":"aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kx6eez.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163795,"url":"https://patchwork.plctlab.org/api/1.2/patches/163795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110122011.3626658-1-juzhe.zhong@rivai.ai/","msgid":"<20231110122011.3626658-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T12:20:11","name":"[V2] Middle-end: Fix bug of induction variable vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110122011.3626658-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163797,"url":"https://patchwork.plctlab.org/api/1.2/patches/163797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110131658.09A5D13398@imap2.suse-dmz.suse.de/","msgid":"<20231110131658.09A5D13398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-10T13:16:57","name":"tree-optimization/110221 - SLP and loop mask/len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110131658.09A5D13398@imap2.suse-dmz.suse.de/mbox/"},{"id":163798,"url":"https://patchwork.plctlab.org/api/1.2/patches/163798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca309ae63920109cf88da3e4106a8a24576302fc.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-10T16:02:17","name":"libgccjit: Fix GGC segfault when using -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca309ae63920109cf88da3e4106a8a24576302fc.camel@zoho.com/mbox/"},{"id":163799,"url":"https://patchwork.plctlab.org/api/1.2/patches/163799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com/","msgid":"<6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com>","list_archive_url":null,"date":"2023-11-10T16:48:25","name":"[pushed,PR112337,IRA] : Check autoinc and memory address after temporary equivalence substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com/mbox/"},{"id":163913,"url":"https://patchwork.plctlab.org/api/1.2/patches/163913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht5tsq.fsf@oldenburg.str.redhat.com/","msgid":"<874jht5tsq.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T18:48:05","name":"aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht5tsq.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163998,"url":"https://patchwork.plctlab.org/api/1.2/patches/163998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-2-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:44","name":"[1/3] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-2-dmalcolm@redhat.com/mbox/"},{"id":163999,"url":"https://patchwork.plctlab.org/api/1.2/patches/163999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-3-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:45","name":"[2/3] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-3-dmalcolm@redhat.com/mbox/"},{"id":163997,"url":"https://patchwork.plctlab.org/api/1.2/patches/163997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-4-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:46","name":"[3/3] diagnostics: use the .opt.urls files to urlify quoted text","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-4-dmalcolm@redhat.com/mbox/"},{"id":164000,"url":"https://patchwork.plctlab.org/api/1.2/patches/164000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311101822270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-10T21:54:07","name":"[committed] RISC-V: Fix indentation of \"length\" attribute for branches and jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311101822270.5892@tpp.orcam.me.uk/mbox/"},{"id":164001,"url":"https://patchwork.plctlab.org/api/1.2/patches/164001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leb5462f.fsf@oldenburg.str.redhat.com/","msgid":"<87leb5462f.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:00","name":"C99 testsuite readiness: -fpermissive tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leb5462f.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164002,"url":"https://patchwork.plctlab.org/api/1.2/patches/164002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6lt461j.fsf@oldenburg.str.redhat.com/","msgid":"<87h6lt461j.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:32","name":"C99 testsuite readiness: Verified un-reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6lt461j.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164003,"url":"https://patchwork.plctlab.org/api/1.2/patches/164003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cywh460x.fsf@oldenburg.str.redhat.com/","msgid":"<87cywh460x.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:54","name":"C99 testsuite readiness: More unverified testcase un-reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cywh460x.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164004,"url":"https://patchwork.plctlab.org/api/1.2/patches/164004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r75460h.fsf@oldenburg.str.redhat.com/","msgid":"<878r75460h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:10","name":"C99 testsuite readiness: Compile more tests with -std=gnu89","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r75460h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164006,"url":"https://patchwork.plctlab.org/api/1.2/patches/164006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht45zo.fsf@oldenburg.str.redhat.com/","msgid":"<874jht45zo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:39","name":"C99 testsuite readiness: Add missing abort, exit declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht45zo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164005,"url":"https://patchwork.plctlab.org/api/1.2/patches/164005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfzl2res.fsf@oldenburg.str.redhat.com/","msgid":"<87zfzl2res.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:55","name":"C99 testsuite readiness: Cleanup of execute tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfzl2res.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164021,"url":"https://patchwork.plctlab.org/api/1.2/patches/164021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU60wCU3w1RkyOY/@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T22:54:56","name":"[V2] Power10: Add options to disable load and store vector pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU60wCU3w1RkyOY/@cowardly-lion.the-meissners.org/mbox/"},{"id":164022,"url":"https://patchwork.plctlab.org/api/1.2/patches/164022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64KEIl6pE7e0sm@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:09:28","name":"[1/4] Add support for floating point vector pair built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64KEIl6pE7e0sm@cowardly-lion.the-meissners.org/mbox/"},{"id":164025,"url":"https://patchwork.plctlab.org/api/1.2/patches/164025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64mCbRp3nb8OJL@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:11:20","name":"[2/4] Add support for integer vector pair built-ins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64mCbRp3nb8OJL@cowardly-lion.the-meissners.org/mbox/"},{"id":164023,"url":"https://patchwork.plctlab.org/api/1.2/patches/164023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU6472jUQslwl1Fe@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:12:47","name":"[3/4] Add support for initializing and extracting from vector pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU6472jUQslwl1Fe@cowardly-lion.the-meissners.org/mbox/"},{"id":164024,"url":"https://patchwork.plctlab.org/api/1.2/patches/164024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU65NlATqRKTwKDO@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:13:58","name":"[4/4] Add support for doing a horizontal add on vector pair elements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU65NlATqRKTwKDO@cowardly-lion.the-meissners.org/mbox/"},{"id":164026,"url":"https://patchwork.plctlab.org/api/1.2/patches/164026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110232754.1399391-1-juzhe.zhong@rivai.ai/","msgid":"<20231110232754.1399391-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T23:27:54","name":"[Committed] RISC-V: Add test for PR112469","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110232754.1399391-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164040,"url":"https://patchwork.plctlab.org/api/1.2/patches/164040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111003846.496197-1-polacek@redhat.com/","msgid":"<20231111003846.496197-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:38:46","name":"[pushed] testsuite: fix lambda-decltype3.C in C++11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111003846.496197-1-polacek@redhat.com/mbox/"},{"id":164059,"url":"https://patchwork.plctlab.org/api/1.2/patches/164059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004433.66232-1-jwakely@redhat.com/","msgid":"<20231111004433.66232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:43:48","name":"[committed] libstdc++: Remove handling for underscore-prefixed libm functions [PR111638]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004433.66232-1-jwakely@redhat.com/mbox/"},{"id":164048,"url":"https://patchwork.plctlab.org/api/1.2/patches/164048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004440.77760-1-jwakely@redhat.com/","msgid":"<20231111004440.77760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:35","name":"[committed] libstdc++: Add [[nodiscard]] to std::span members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004440.77760-1-jwakely@redhat.com/mbox/"},{"id":164047,"url":"https://patchwork.plctlab.org/api/1.2/patches/164047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004446.77907-1-jwakely@redhat.com/","msgid":"<20231111004446.77907-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:41","name":"[committed] libstdc++: Add [[nodiscard]] to lock types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004446.77907-1-jwakely@redhat.com/mbox/"},{"id":164046,"url":"https://patchwork.plctlab.org/api/1.2/patches/164046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004453.78040-1-jwakely@redhat.com/","msgid":"<20231111004453.78040-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:47","name":"[committed] libstdc++: Deprecate std::atomic_xxx overloads for std::shared_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004453.78040-1-jwakely@redhat.com/mbox/"},{"id":164041,"url":"https://patchwork.plctlab.org/api/1.2/patches/164041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004458.78235-1-jwakely@redhat.com/","msgid":"<20231111004458.78235-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:54","name":"[committed] libstdc++: Fix test that fails with -ffreestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004458.78235-1-jwakely@redhat.com/mbox/"},{"id":164052,"url":"https://patchwork.plctlab.org/api/1.2/patches/164052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004505.78351-1-jwakely@redhat.com/","msgid":"<20231111004505.78351-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:59","name":"[committed] libstdc++: Add static_assert to std::integer_sequence [PR112473]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004505.78351-1-jwakely@redhat.com/mbox/"},{"id":164050,"url":"https://patchwork.plctlab.org/api/1.2/patches/164050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004510.78546-1-jwakely@redhat.com/","msgid":"<20231111004510.78546-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:45:06","name":"[committed] libstdc++: Fix broken tests for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004510.78546-1-jwakely@redhat.com/mbox/"},{"id":164051,"url":"https://patchwork.plctlab.org/api/1.2/patches/164051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111005834.93376-1-jwakely@redhat.com/","msgid":"<20231111005834.93376-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:58:14","name":"[committed] libstdc++: Do not use assume attribute for Clang [PR112467]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111005834.93376-1-jwakely@redhat.com/mbox/"},{"id":164043,"url":"https://patchwork.plctlab.org/api/1.2/patches/164043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU7VOhuVUvCPnqqG@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-11T01:13:30","name":"[v2] c++: fix parsing with auto(x) [PR112410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU7VOhuVUvCPnqqG@redhat.com/mbox/"},{"id":164102,"url":"https://patchwork.plctlab.org/api/1.2/patches/164102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU854tpVwxxWwFRX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:22:58","name":"c, c++: Add new value for vector types for __builtin_classify_type (type)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU854tpVwxxWwFRX@tucnak/mbox/"},{"id":164103,"url":"https://patchwork.plctlab.org/api/1.2/patches/164103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU864Q9ltkW8n94Z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:27:13","name":"tree-ssa-math-opts: Fix up gsi_remove order in match_uaddc_usubc [PR112430]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU864Q9ltkW8n94Z@tucnak/mbox/"},{"id":164104,"url":"https://patchwork.plctlab.org/api/1.2/patches/164104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU885F2AArMH9y5M@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:35:48","name":"gimple-range-cache: Fix ICEs when dumping details [PR111967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU885F2AArMH9y5M@tucnak/mbox/"},{"id":164110,"url":"https://patchwork.plctlab.org/api/1.2/patches/164110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJ9KDmOZqgHH9eM1ytPGTtjG_-F+ekP0f5w46OjcEZNkw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-11T10:15:45","name":"[fortran] PR112459 - gfortran -w option causes derived-type finalization at creation time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJ9KDmOZqgHH9eM1ytPGTtjG_-F+ekP0f5w46OjcEZNkw@mail.gmail.com/mbox/"},{"id":164122,"url":"https://patchwork.plctlab.org/api/1.2/patches/164122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111110039.143319-1-xry111@xry111.site/","msgid":"<20231111110039.143319-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-11T10:58:19","name":"[v2] LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111110039.143319-1-xry111@xry111.site/mbox/"},{"id":164132,"url":"https://patchwork.plctlab.org/api/1.2/patches/164132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2245595.iZASKD2KPV@fomalhaut/","msgid":"<2245595.iZASKD2KPV@fomalhaut>","list_archive_url":null,"date":"2023-11-11T12:11:28","name":"Handle addresses of more constants in IPA-CP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2245595.iZASKD2KPV@fomalhaut/mbox/"},{"id":164172,"url":"https://patchwork.plctlab.org/api/1.2/patches/164172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111231146.31932-1-bshanks@codeweavers.com/","msgid":"<20231111231146.31932-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-11-11T23:11:12","name":"testsuite: Fix bad-mapper-1.C test failures with posix_spawn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111231146.31932-1-bshanks@codeweavers.com/mbox/"},{"id":164175,"url":"https://patchwork.plctlab.org/api/1.2/patches/164175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112010047.496937-1-xry111@xry111.site/","msgid":"<20231112010047.496937-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-12T01:00:13","name":"LoongArch: Use simplify_gen_subreg instead of gen_rtx_SUBREG in loongarch_expand_vec_cond_mask_expr [PR112476]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112010047.496937-1-xry111@xry111.site/mbox/"},{"id":164242,"url":"https://patchwork.plctlab.org/api/1.2/patches/164242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-4-lehua.ding@rivai.ai/","msgid":"<20231112095858.3669003-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T09:58:54","name":"[V2,3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-4-lehua.ding@rivai.ai/mbox/"},{"id":164243,"url":"https://patchwork.plctlab.org/api/1.2/patches/164243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-6-lehua.ding@rivai.ai/","msgid":"<20231112095858.3669003-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T09:58:56","name":"[V2,5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-6-lehua.ding@rivai.ai/mbox/"},{"id":164246,"url":"https://patchwork.plctlab.org/api/1.2/patches/164246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-3-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:12","name":"[V3,2/7] ira: Switch to live_subreg data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-3-lehua.ding@rivai.ai/mbox/"},{"id":164249,"url":"https://patchwork.plctlab.org/api/1.2/patches/164249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-4-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:13","name":"[V3,3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-4-lehua.ding@rivai.ai/mbox/"},{"id":164247,"url":"https://patchwork.plctlab.org/api/1.2/patches/164247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-5-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:14","name":"[V3,4/7] ira: Support subreg copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-5-lehua.ding@rivai.ai/mbox/"},{"id":164250,"url":"https://patchwork.plctlab.org/api/1.2/patches/164250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-6-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:15","name":"[V3,5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-6-lehua.ding@rivai.ai/mbox/"},{"id":164248,"url":"https://patchwork.plctlab.org/api/1.2/patches/164248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-7-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:16","name":"[V3,6/7] lra: Switch to live_subreg data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-7-lehua.ding@rivai.ai/mbox/"},{"id":164251,"url":"https://patchwork.plctlab.org/api/1.2/patches/164251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-8-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:17","name":"[V3,7/7] lra: Support subreg live range track and conflict detect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-8-lehua.ding@rivai.ai/mbox/"},{"id":164252,"url":"https://patchwork.plctlab.org/api/1.2/patches/164252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112134751.2972640-1-pan2.li@intel.com/","msgid":"<20231112134751.2972640-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-12T13:47:51","name":"[v1] RISC-V: Support FP l/ll round and rint HF mode autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112134751.2972640-1-pan2.li@intel.com/mbox/"},{"id":164254,"url":"https://patchwork.plctlab.org/api/1.2/patches/164254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-5-richard.sandiford@arm.com/","msgid":"<20231112145229.2924713-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-11-12T14:52:28","name":"[4/5] ira: Handle register filters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-5-richard.sandiford@arm.com/mbox/"},{"id":164255,"url":"https://patchwork.plctlab.org/api/1.2/patches/164255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-6-richard.sandiford@arm.com/","msgid":"<20231112145229.2924713-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-11-12T14:52:29","name":"[5/5] Add an aligned_register_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-6-richard.sandiford@arm.com/mbox/"},{"id":164286,"url":"https://patchwork.plctlab.org/api/1.2/patches/164286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112202603.228074-2-xry111@xry111.site/","msgid":"<20231112202603.228074-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-12T20:25:26","name":"Fix (fcopysign x, NEGATIVE_CONST) -> (fneg (fabs x)) simplification [PR112483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112202603.228074-2-xry111@xry111.site/mbox/"},{"id":164291,"url":"https://patchwork.plctlab.org/api/1.2/patches/164291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com/","msgid":"<015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-12T23:24:25","name":"PR112380: Defend against CLOBBERs in RTX expressions in combine.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com/mbox/"},{"id":164340,"url":"https://patchwork.plctlab.org/api/1.2/patches/164340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113031001.1370500-1-pan2.li@intel.com/","msgid":"<20231113031001.1370500-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-13T03:10:01","name":"[v1] RISC-V: Fix RVV dynamic frm tests failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113031001.1370500-1-pan2.li@intel.com/mbox/"},{"id":164341,"url":"https://patchwork.plctlab.org/api/1.2/patches/164341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113032237.1379330-1-pan2.li@intel.com/","msgid":"<20231113032237.1379330-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-13T03:22:37","name":"[v4] DSE: Allow vector type for get_stored_val when read < store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113032237.1379330-1-pan2.li@intel.com/mbox/"},{"id":164345,"url":"https://patchwork.plctlab.org/api/1.2/patches/164345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113033706.175135-1-juzhe.zhong@rivai.ai/","msgid":"<20231113033706.175135-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T03:37:06","name":"RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113033706.175135-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164648,"url":"https://patchwork.plctlab.org/api/1.2/patches/164648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/becd09c9-1353-40ed-a085-be4f938ddf0b@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T08:06:35","name":"RISC-V: vsetvl: Refine REG_EQUAL equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/becd09c9-1353-40ed-a085-be4f938ddf0b@gmail.com/mbox/"},{"id":164366,"url":"https://patchwork.plctlab.org/api/1.2/patches/164366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113084158.829807-1-juzhe.zhong@rivai.ai/","msgid":"<20231113084158.829807-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T08:41:58","name":"[V2] RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113084158.829807-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164367,"url":"https://patchwork.plctlab.org/api/1.2/patches/164367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVHjzAPbjBAPIYhK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-13T08:52:28","name":"[committed] i386: Remove j constraint letter from list of unused letters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVHjzAPbjBAPIYhK@tucnak/mbox/"},{"id":164388,"url":"https://patchwork.plctlab.org/api/1.2/patches/164388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com/","msgid":"<02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com>","list_archive_url":null,"date":"2023-11-13T09:32:09","name":"[wwwdocs,committed] projects/gomp: Update for TR12, update impl. status","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com/mbox/"},{"id":164407,"url":"https://patchwork.plctlab.org/api/1.2/patches/164407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113110636.149485-1-juzhe.zhong@rivai.ai/","msgid":"<20231113110636.149485-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T11:06:36","name":"[Committed,V3] RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113110636.149485-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164412,"url":"https://patchwork.plctlab.org/api/1.2/patches/164412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhp3nwf.fsf@oldenburg.str.redhat.com/","msgid":"<874jhp3nwf.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-13T11:15:12","name":"gm2: Add missing declaration of m2pim_M2RTS_Terminate to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhp3nwf.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164439,"url":"https://patchwork.plctlab.org/api/1.2/patches/164439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVINdo+Hef8H+H5w@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-13T11:50:14","name":"c++: Implement C++26 P2864R2 - Remove Deprecated Arithmetic Conversion on Enumerations From C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVINdo+Hef8H+H5w@tucnak/mbox/"},{"id":164443,"url":"https://patchwork.plctlab.org/api/1.2/patches/164443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113120050.608605-1-juzhe.zhong@rivai.ai/","msgid":"<20231113120050.608605-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T12:00:50","name":"[Committed] RISC-V: Adapt VLS init tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113120050.608605-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164454,"url":"https://patchwork.plctlab.org/api/1.2/patches/164454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113123958.22A821358C@imap2.suse-dmz.suse.de/","msgid":"<20231113123958.22A821358C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T12:39:57","name":"tree-optimization/111792 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113123958.22A821358C@imap2.suse-dmz.suse.de/mbox/"},{"id":164472,"url":"https://patchwork.plctlab.org/api/1.2/patches/164472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7ee58c567233aab1b36b9d09f79af6d0108a98b.1699879818.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T13:09:57","name":"[1/6] c-family: Introduce pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7ee58c567233aab1b36b9d09f79af6d0108a98b.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164473,"url":"https://patchwork.plctlab.org/api/1.2/patches/164473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com/","msgid":"<5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:10:34","name":"[2/6] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164474,"url":"https://patchwork.plctlab.org/api/1.2/patches/164474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com/","msgid":"<309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:11:05","name":"[4/6] c: Turn -Wimplicit-int into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164476,"url":"https://patchwork.plctlab.org/api/1.2/patches/164476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f036ee4b116bfe608ff3cf094f1f42f2c8235761.1699879818.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T13:11:14","name":"[5/6] c: Turn -Wreturn-mismatch into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f036ee4b116bfe608ff3cf094f1f42f2c8235761.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164478,"url":"https://patchwork.plctlab.org/api/1.2/patches/164478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com/","msgid":"<212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:11:21","name":"[6/6] c: Turn -Wincompatible-pointer-types into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164490,"url":"https://patchwork.plctlab.org/api/1.2/patches/164490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133830.E0A6613398@imap2.suse-dmz.suse.de/","msgid":"<20231113133830.E0A6613398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T13:38:30","name":"tree-optimization/112495 - alias versioning and address spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133830.E0A6613398@imap2.suse-dmz.suse.de/mbox/"},{"id":164491,"url":"https://patchwork.plctlab.org/api/1.2/patches/164491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133844.16AD213398@imap2.suse-dmz.suse.de/","msgid":"<20231113133844.16AD213398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T13:38:43","name":"middle-end/112487 - inline and parameter mismatch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133844.16AD213398@imap2.suse-dmz.suse.de/mbox/"},{"id":164501,"url":"https://patchwork.plctlab.org/api/1.2/patches/164501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-2-rearnsha@arm.com/","msgid":"<20231113142658.69039-2-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:37","name":"[committed,01/22] arm: testsuite: correctly detect armv6t2 hardware for acle execution tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-2-rearnsha@arm.com/mbox/"},{"id":164502,"url":"https://patchwork.plctlab.org/api/1.2/patches/164502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-3-rearnsha@arm.com/","msgid":"<20231113142658.69039-3-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:38","name":"[committed,02/22] arm: testsuite: correctly detect hard_float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-3-rearnsha@arm.com/mbox/"},{"id":164504,"url":"https://patchwork.plctlab.org/api/1.2/patches/164504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-5-rearnsha@arm.com/","msgid":"<20231113142658.69039-5-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:40","name":"[committed,04/22] arm: testsuite: avoid problems with -mfpu=auto in pacbti-m-predef-11.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-5-rearnsha@arm.com/mbox/"},{"id":164506,"url":"https://patchwork.plctlab.org/api/1.2/patches/164506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-6-rearnsha@arm.com/","msgid":"<20231113142658.69039-6-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:41","name":"[committed,05/22] arm: testsuite: avoid problems with -mfpu=auto in attr-crypto.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-6-rearnsha@arm.com/mbox/"},{"id":164509,"url":"https://patchwork.plctlab.org/api/1.2/patches/164509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-10-rearnsha@arm.com/","msgid":"<20231113142658.69039-10-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:45","name":"[committed,09/22] arm: testsuite: tidy up pr65647-2.c pre-checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-10-rearnsha@arm.com/mbox/"},{"id":164503,"url":"https://patchwork.plctlab.org/api/1.2/patches/164503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-11-rearnsha@arm.com/","msgid":"<20231113142658.69039-11-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:46","name":"[committed,10/22] arm: testsuite: improve compatibility of arm/pr78353-*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-11-rearnsha@arm.com/mbox/"},{"id":164505,"url":"https://patchwork.plctlab.org/api/1.2/patches/164505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-12-rearnsha@arm.com/","msgid":"<20231113142658.69039-12-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:47","name":"[committed,11/22] arm: testsuite: improve compatibility of pr88648-asm-syntax-unified.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-12-rearnsha@arm.com/mbox/"},{"id":164507,"url":"https://patchwork.plctlab.org/api/1.2/patches/164507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-13-rearnsha@arm.com/","msgid":"<20231113142658.69039-13-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:48","name":"[committed,12/22] arm: testsuite: improve compatibility of pragma_arch_attribute*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-13-rearnsha@arm.com/mbox/"},{"id":164512,"url":"https://patchwork.plctlab.org/api/1.2/patches/164512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-16-rearnsha@arm.com/","msgid":"<20231113142658.69039-16-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:51","name":"[committed,15/22] arm: testsuite: improve compatibility of ftest-armv7m-thumb.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-16-rearnsha@arm.com/mbox/"},{"id":164511,"url":"https://patchwork.plctlab.org/api/1.2/patches/164511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-17-rearnsha@arm.com/","msgid":"<20231113142658.69039-17-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:52","name":"[committed,16/22] arm: testsuite: improve compatibility of gcc.target/arm/macro_defs*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-17-rearnsha@arm.com/mbox/"},{"id":164513,"url":"https://patchwork.plctlab.org/api/1.2/patches/164513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-19-rearnsha@arm.com/","msgid":"<20231113142658.69039-19-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:54","name":"[committed,18/22] arm: testsuite: improve compatibility of gcc.target/arm/pr19599.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-19-rearnsha@arm.com/mbox/"},{"id":164508,"url":"https://patchwork.plctlab.org/api/1.2/patches/164508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-20-rearnsha@arm.com/","msgid":"<20231113142658.69039-20-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:55","name":"[committed,19/22] arm: testsuite: improve compatibility of gcc.target/arm/pr59575.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-20-rearnsha@arm.com/mbox/"},{"id":164510,"url":"https://patchwork.plctlab.org/api/1.2/patches/164510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-21-rearnsha@arm.com/","msgid":"<20231113142658.69039-21-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:56","name":"[committed,20/22] testsuite: arm: tighten up mode-specific ISA tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-21-rearnsha@arm.com/mbox/"},{"id":164514,"url":"https://patchwork.plctlab.org/api/1.2/patches/164514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-23-rearnsha@arm.com/","msgid":"<20231113142658.69039-23-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:58","name":"[committed,22/22] arm: testsuite: improve compatibility of gcc.dg/debug/pr57351.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-23-rearnsha@arm.com/mbox/"},{"id":164602,"url":"https://patchwork.plctlab.org/api/1.2/patches/164602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113190401.759232-1-jwakely@redhat.com/","msgid":"<20231113190401.759232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T19:01:18","name":"c++: Link extended FP conversion pedwarns to -Wnarrowing [PR111842]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113190401.759232-1-jwakely@redhat.com/mbox/"},{"id":164637,"url":"https://patchwork.plctlab.org/api/1.2/patches/164637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113200840.339229-1-xry111@xry111.site/","msgid":"<20231113200840.339229-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-13T20:07:14","name":"LoongArch: Handle vectorized copysign (x, -1) expansion efficiently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113200840.339229-1-xry111@xry111.site/mbox/"},{"id":164656,"url":"https://patchwork.plctlab.org/api/1.2/patches/164656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223542.11562-1-cupertino.miranda@oracle.com/","msgid":"<20231113223542.11562-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:35:42","name":"bpf: Delayed the removal of the parser enum plugin handler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223542.11562-1-cupertino.miranda@oracle.com/mbox/"},{"id":164657,"url":"https://patchwork.plctlab.org/api/1.2/patches/164657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223638.11660-1-cupertino.miranda@oracle.com/","msgid":"<20231113223638.11660-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:36:38","name":"bpf: Corrected condition in core_mark_as_access_index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223638.11660-1-cupertino.miranda@oracle.com/mbox/"},{"id":164658,"url":"https://patchwork.plctlab.org/api/1.2/patches/164658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223723.11760-1-cupertino.miranda@oracle.com/","msgid":"<20231113223723.11760-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:37:23","name":"bpf: Forces __buildin_memcmp not to generate a call upto 1024 bytes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223723.11760-1-cupertino.miranda@oracle.com/mbox/"},{"id":164659,"url":"https://patchwork.plctlab.org/api/1.2/patches/164659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223739.11844-1-cupertino.miranda@oracle.com/","msgid":"<20231113223739.11844-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:37:39","name":"Fixed problem with BTF defining smaller enums.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223739.11844-1-cupertino.miranda@oracle.com/mbox/"},{"id":164674,"url":"https://patchwork.plctlab.org/api/1.2/patches/164674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113231837.369907-1-xry111@xry111.site/","msgid":"<20231113231837.369907-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-13T23:18:02","name":"LoongArch: Use finer-grained DBAR hints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113231837.369907-1-xry111@xry111.site/mbox/"},{"id":164689,"url":"https://patchwork.plctlab.org/api/1.2/patches/164689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232313.809520-1-jwakely@redhat.com/","msgid":"<20231113232313.809520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T23:22:54","name":"[committed] libstdc++: Micro-optimization for std::optional [PR112480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232313.809520-1-jwakely@redhat.com/mbox/"},{"id":164675,"url":"https://patchwork.plctlab.org/api/1.2/patches/164675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232322.809541-1-jwakely@redhat.com/","msgid":"<20231113232322.809541-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T23:23:14","name":"[committed] libstdc++: Add dg-timeout-factor to remaining IO tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232322.809541-1-jwakely@redhat.com/mbox/"},{"id":164687,"url":"https://patchwork.plctlab.org/api/1.2/patches/164687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114001304.3290842-1-arsen@aarsen.me/","msgid":"<20231114001304.3290842-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-14T00:12:37","name":"[committed] libcpp: Regenerate config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114001304.3290842-1-arsen@aarsen.me/mbox/"},{"id":164693,"url":"https://patchwork.plctlab.org/api/1.2/patches/164693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114005555.2139904-1-hongtao.liu@intel.com/","msgid":"<20231114005555.2139904-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-14T00:55:55","name":"Fix ICE in vectorizable_nonlinear_induction with bitfield.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114005555.2139904-1-hongtao.liu@intel.com/mbox/"},{"id":164710,"url":"https://patchwork.plctlab.org/api/1.2/patches/164710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032116.3273076-1-juzhe.zhong@rivai.ai/","msgid":"<20231114032116.3273076-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:21:16","name":"[Committed] RISC-V: Fix init-2.c assembly check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032116.3273076-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164711,"url":"https://patchwork.plctlab.org/api/1.2/patches/164711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032837.1687779-1-juzhe.zhong@rivai.ai/","msgid":"<20231114032837.1687779-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:28:37","name":"[Commit,QUEUE,V3] RISC-V: Support strided load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032837.1687779-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164713,"url":"https://patchwork.plctlab.org/api/1.2/patches/164713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114033932.1696221-1-juzhe.zhong@rivai.ai/","msgid":"<20231114033932.1696221-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:39:32","name":"DOC/IFN/OPTAB: Add mask_len_strided_load/mask_len_strided_store DOC/OPTAB/IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114033932.1696221-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164715,"url":"https://patchwork.plctlab.org/api/1.2/patches/164715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114034614.1697097-1-juzhe.zhong@rivai.ai/","msgid":"<20231114034614.1697097-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:46:14","name":"VECT: Add MASK_LEN_STRIDED_LOAD/MASK_LEN_STRIDED_STORE into loop vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114034614.1697097-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164743,"url":"https://patchwork.plctlab.org/api/1.2/patches/164743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMfGw8fJRZnO0Fg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T07:17:47","name":"tree: Handle BITINT_TYPE in type_contains_placeholder_1 [PR112511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMfGw8fJRZnO0Fg@tucnak/mbox/"},{"id":164745,"url":"https://patchwork.plctlab.org/api/1.2/patches/164745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMi4s6J4BoYPbJc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T07:33:54","name":"libcpp, contrib: Update to Unicode 15.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMi4s6J4BoYPbJc@tucnak/mbox/"},{"id":164778,"url":"https://patchwork.plctlab.org/api/1.2/patches/164778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114090044.1452311-1-lehua.ding@rivai.ai/","msgid":"<20231114090044.1452311-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-14T09:00:44","name":"x86: Make testcase apx-spill_to_egprs-1.c more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114090044.1452311-1-lehua.ding@rivai.ai/mbox/"},{"id":164796,"url":"https://patchwork.plctlab.org/api/1.2/patches/164796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114094500.8160-1-chenglulu@loongson.cn/","msgid":"<20231114094500.8160-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-14T09:45:01","name":"[v1] LoongArch: Added code generation support for call36 function calls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114094500.8160-1-chenglulu@loongson.cn/mbox/"},{"id":164802,"url":"https://patchwork.plctlab.org/api/1.2/patches/164802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114100320.47373-1-xry111@xry111.site/","msgid":"<20231114100320.47373-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-14T09:59:44","name":"Only allow (copysign x, NEG_CONST) -> (fneg (fabs x)) simplification for constant folding [PR112483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114100320.47373-1-xry111@xry111.site/mbox/"},{"id":164812,"url":"https://patchwork.plctlab.org/api/1.2/patches/164812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de/","msgid":"<36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de>","list_archive_url":null,"date":"2023-11-14T10:15:02","name":"[avr,committed] Libf7: Use paper-pencil algorithm for sqrt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de/mbox/"},{"id":164822,"url":"https://patchwork.plctlab.org/api/1.2/patches/164822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105118.303519-1-krebbel@linux.ibm.com/","msgid":"<20231114105118.303519-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T10:51:18","name":"[Committed] IBM Z: Fix ICE with overloading and checking enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105118.303519-1-krebbel@linux.ibm.com/mbox/"},{"id":164823,"url":"https://patchwork.plctlab.org/api/1.2/patches/164823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105127.303538-1-krebbel@linux.ibm.com/","msgid":"<20231114105127.303538-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T10:51:27","name":"[Committed] IBM Z: Add GTY marker to builtin data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105127.303538-1-krebbel@linux.ibm.com/mbox/"},{"id":164868,"url":"https://patchwork.plctlab.org/api/1.2/patches/164868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114113803.4192929-1-juzhe.zhong@rivai.ai/","msgid":"<20231114113803.4192929-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T11:38:03","name":"RISC-V: Support trailing vec_init optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114113803.4192929-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164871,"url":"https://patchwork.plctlab.org/api/1.2/patches/164871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114114454.557933-2-stefansf@linux.ibm.com/","msgid":"<20231114114454.557933-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T11:44:55","name":"s390: Fix vec_scatter_element for vectors of floats","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114114454.557933-2-stefansf@linux.ibm.com/mbox/"},{"id":164875,"url":"https://patchwork.plctlab.org/api/1.2/patches/164875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115933.833533857342@sourceware.org/","msgid":"<20231114115933.833533857342@sourceware.org>","list_archive_url":null,"date":"2023-11-14T11:59:04","name":"tree-optimization/112281 - loop distribution and zero dependence distances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115933.833533857342@sourceware.org/mbox/"},{"id":164876,"url":"https://patchwork.plctlab.org/api/1.2/patches/164876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115941.5B7D13856DE7@sourceware.org/","msgid":"<20231114115941.5B7D13856DE7@sourceware.org>","list_archive_url":null,"date":"2023-11-14T11:59:16","name":"Loop distribution fix for SCC detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115941.5B7D13856DE7@sourceware.org/mbox/"},{"id":164877,"url":"https://patchwork.plctlab.org/api/1.2/patches/164877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVNi36Ljh1Rhi27B@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T12:06:55","name":"i386: Fix up 3_doubleword_lowpart [PR112523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVNi36Ljh1Rhi27B@tucnak/mbox/"},{"id":164926,"url":"https://patchwork.plctlab.org/api/1.2/patches/164926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141352.F3BC2385840E@sourceware.org/","msgid":"<20231114141352.F3BC2385840E@sourceware.org>","list_archive_url":null,"date":"2023-11-14T14:13:27","name":"tree-optimization/111233 - loop splitting miscompile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141352.F3BC2385840E@sourceware.org/mbox/"},{"id":164942,"url":"https://patchwork.plctlab.org/api/1.2/patches/164942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141455.24465-1-kito.cheng@sifive.com/","msgid":"<20231114141455.24465-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-14T14:14:55","name":"RISC-V: Save/restore ra register correctly [PR112478]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141455.24465-1-kito.cheng@sifive.com/mbox/"},{"id":164943,"url":"https://patchwork.plctlab.org/api/1.2/patches/164943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141513.24515-1-kito.cheng@sifive.com/","msgid":"<20231114141513.24515-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-14T14:15:13","name":"[v2] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141513.24515-1-kito.cheng@sifive.com/mbox/"},{"id":164990,"url":"https://patchwork.plctlab.org/api/1.2/patches/164990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114151958.575444-2-stefansf@linux.ibm.com/","msgid":"<20231114151958.575444-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T15:19:59","name":"s390: Fix builtins floating-point convert to/from fixed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114151958.575444-2-stefansf@linux.ibm.com/mbox/"},{"id":164998,"url":"https://patchwork.plctlab.org/api/1.2/patches/164998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/755c6708-2200-4a22-a065-45b721bf692a@redhat.com/","msgid":"<755c6708-2200-4a22-a065-45b721bf692a@redhat.com>","list_archive_url":null,"date":"2023-11-14T15:33:46","name":"[COMMITTED] PR tree-optimization/112509 - Use case label type to create case range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/755c6708-2200-4a22-a065-45b721bf692a@redhat.com/mbox/"},{"id":165026,"url":"https://patchwork.plctlab.org/api/1.2/patches/165026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114155848.892568-1-jwakely@redhat.com/","msgid":"<20231114155848.892568-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T15:58:29","name":"[committed] libstdc++: Fix std::deque::size() Xmethod [PR112491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114155848.892568-1-jwakely@redhat.com/mbox/"},{"id":165011,"url":"https://patchwork.plctlab.org/api/1.2/patches/165011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114161044.985367-1-ppalka@redhat.com/","msgid":"<20231114161044.985367-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:10:44","name":"c++: decltype of (non-captured variable) [PR83167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114161044.985367-1-ppalka@redhat.com/mbox/"},{"id":165013,"url":"https://patchwork.plctlab.org/api/1.2/patches/165013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163215.3689629-1-dmalcolm@redhat.com/","msgid":"<20231114163215.3689629-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:32:15","name":"[pushed] json: reduce use of naked new in json-building code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163215.3689629-1-dmalcolm@redhat.com/mbox/"},{"id":165014,"url":"https://patchwork.plctlab.org/api/1.2/patches/165014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163219.3689663-1-dmalcolm@redhat.com/","msgid":"<20231114163219.3689663-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:32:19","name":"[pushed] input.h: eliminate implicit users of global_dc'\''s file_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163219.3689663-1-dmalcolm@redhat.com/mbox/"},{"id":165018,"url":"https://patchwork.plctlab.org/api/1.2/patches/165018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163536.1208039-1-ppalka@redhat.com/","msgid":"<20231114163536.1208039-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:35:36","name":"c++: direct enum init from type-dep elt [PR112515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163536.1208039-1-ppalka@redhat.com/mbox/"},{"id":165027,"url":"https://patchwork.plctlab.org/api/1.2/patches/165027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVOwnzHtcJahNKGh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:38:39","name":"c++, v2: Implement C++26 P2864R2 - Remove Deprecated Arithmetic Conversion on Enumerations From C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVOwnzHtcJahNKGh@tucnak/mbox/"},{"id":165033,"url":"https://patchwork.plctlab.org/api/1.2/patches/165033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com/","msgid":"<8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:16","name":"[v2,1/8] Add tests for validating future C permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165034,"url":"https://patchwork.plctlab.org/api/1.2/patches/165034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com/","msgid":"<64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:26","name":"[v2,2/8] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165035,"url":"https://patchwork.plctlab.org/api/1.2/patches/165035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8fa47abb2dcfb91f8707178973db942fdd0f3c2.1699983736.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:50:35","name":"[v2,3/8] c: Turn -Wimplicit-function-declaration into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8fa47abb2dcfb91f8707178973db942fdd0f3c2.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165038,"url":"https://patchwork.plctlab.org/api/1.2/patches/165038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com/","msgid":"<78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:44","name":"[v2,5/8] c: Do not ignore some forms of -Wimplicit-int in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165036,"url":"https://patchwork.plctlab.org/api/1.2/patches/165036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com/","msgid":"<84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:48","name":"[v2,6/8] c: Turn -Wreturn-mismatch into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165037,"url":"https://patchwork.plctlab.org/api/1.2/patches/165037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com/","msgid":"<3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:53","name":"[v2,7/8] c: Turn -Wincompatible-pointer-types into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165039,"url":"https://patchwork.plctlab.org/api/1.2/patches/165039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5f0cb7b4691598e5f61634f08d162f5d7e90d38.1699983736.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:50:58","name":"[v2,8/8] c: Add new -Wdeclaration-missing-parameter-type permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5f0cb7b4691598e5f61634f08d162f5d7e90d38.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165056,"url":"https://patchwork.plctlab.org/api/1.2/patches/165056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191309.3709363-1-dmalcolm@redhat.com/","msgid":"<20231114191309.3709363-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:09","name":"[pushed] diagnostics: convert diagnostic_ready_p to an inline function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191309.3709363-1-dmalcolm@redhat.com/mbox/"},{"id":165057,"url":"https://patchwork.plctlab.org/api/1.2/patches/165057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191313.3709388-1-dmalcolm@redhat.com/","msgid":"<20231114191313.3709388-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:13","name":"[pushed] diagnostics: make m_text_callbacks private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191313.3709388-1-dmalcolm@redhat.com/mbox/"},{"id":165058,"url":"https://patchwork.plctlab.org/api/1.2/patches/165058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191319.3709422-1-dmalcolm@redhat.com/","msgid":"<20231114191319.3709422-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:19","name":"[pushed] diagnostics: make option-handling callbacks private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191319.3709422-1-dmalcolm@redhat.com/mbox/"},{"id":165063,"url":"https://patchwork.plctlab.org/api/1.2/patches/165063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114200014.2394259-1-dimitar@dinux.eu/","msgid":"<20231114200014.2394259-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-11-14T20:00:14","name":"[committed] testsuite: Ignore warning for unsupported option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114200014.2394259-1-dimitar@dinux.eu/mbox/"},{"id":165081,"url":"https://patchwork.plctlab.org/api/1.2/patches/165081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114205638.3720804-1-dmalcolm@redhat.com/","msgid":"<20231114205638.3720804-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T20:56:38","name":"[pushed] analyzer: enable taint state machine by default [PR103533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114205638.3720804-1-dmalcolm@redhat.com/mbox/"},{"id":165087,"url":"https://patchwork.plctlab.org/api/1.2/patches/165087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114210445.1469279-1-ppalka@redhat.com/","msgid":"<20231114210445.1469279-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T21:04:45","name":"c++: partially inst requires-expr in noexcept-spec [PR101043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114210445.1469279-1-ppalka@redhat.com/mbox/"},{"id":165101,"url":"https://patchwork.plctlab.org/api/1.2/patches/165101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114215404.163508-2-xry111@xry111.site/","msgid":"<20231114215404.163508-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-14T21:52:28","name":"[v2] LoongArch: Remove redundant barrier instructions before LL-SC loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114215404.163508-2-xry111@xry111.site/mbox/"},{"id":165107,"url":"https://patchwork.plctlab.org/api/1.2/patches/165107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114220825.22074-4-sebastian.huber@embedded-brains.de/","msgid":"<20231114220825.22074-4-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-14T22:08:24","name":"[3/4] gcov: Add gen_counter_update()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114220825.22074-4-sebastian.huber@embedded-brains.de/mbox/"},{"id":165129,"url":"https://patchwork.plctlab.org/api/1.2/patches/165129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114223251.951537-1-jwakely@redhat.com/","msgid":"<20231114223251.951537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T22:32:21","name":"[committed] libstdc++: Fix std::hash [PR112348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114223251.951537-1-jwakely@redhat.com/mbox/"},{"id":165131,"url":"https://patchwork.plctlab.org/api/1.2/patches/165131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114224539.988344-1-jwakely@redhat.com/","msgid":"<20231114224539.988344-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T22:45:23","name":"[committed] libstdc++: Fix uses of signed types with functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114224539.988344-1-jwakely@redhat.com/mbox/"},{"id":165132,"url":"https://patchwork.plctlab.org/api/1.2/patches/165132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115002128.2143444-1-vineetg@rivosinc.com/","msgid":"<20231115002128.2143444-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T00:21:28","name":"[RESEND,v4] RISC-V: elide unnecessary sign extend when expanding cmp_and_jump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115002128.2143444-1-vineetg@rivosinc.com/mbox/"},{"id":165134,"url":"https://patchwork.plctlab.org/api/1.2/patches/165134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005203.3748210-1-dmalcolm@redhat.com/","msgid":"<20231115005203.3748210-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-15T00:52:03","name":"[pushed] json.cc: use SELFTEST_LOCATION in selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005203.3748210-1-dmalcolm@redhat.com/mbox/"},{"id":165135,"url":"https://patchwork.plctlab.org/api/1.2/patches/165135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005457.3748674-1-dmalcolm@redhat.com/","msgid":"<20231115005457.3748674-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-15T00:54:57","name":"[PATCH/RFC] json.cc: format JSON output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005457.3748674-1-dmalcolm@redhat.com/mbox/"},{"id":165142,"url":"https://patchwork.plctlab.org/api/1.2/patches/165142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115013317.88282-1-patrick@rivosinc.com/","msgid":"<20231115013317.88282-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T01:33:17","name":"RISC-V: Fix ICE in non-canonical march parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115013317.88282-1-patrick@rivosinc.com/mbox/"},{"id":165140,"url":"https://patchwork.plctlab.org/api/1.2/patches/165140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com/","msgid":"<4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T02:24:10","name":"Clean up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com/mbox/"},{"id":165141,"url":"https://patchwork.plctlab.org/api/1.2/patches/165141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com/","msgid":"<87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T02:26:28","name":"Clean up by_pieces_ninsns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com/mbox/"},{"id":165144,"url":"https://patchwork.plctlab.org/api/1.2/patches/165144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd6311b1-9371-4c3f-b023-d3400c70fea6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T03:01:26","name":"rs6000: Only enable PCREL on supported ABIs [PR111045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd6311b1-9371-4c3f-b023-d3400c70fea6@linux.ibm.com/mbox/"},{"id":165145,"url":"https://patchwork.plctlab.org/api/1.2/patches/165145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-1-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:35","name":"[V2,1/3] rs6000: update num_insns_constant for 2 insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-1-guojiufu@linux.ibm.com/mbox/"},{"id":165147,"url":"https://patchwork.plctlab.org/api/1.2/patches/165147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-2-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:36","name":"[V2,2/3] Using pli to split 34bits constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-2-guojiufu@linux.ibm.com/mbox/"},{"id":165146,"url":"https://patchwork.plctlab.org/api/1.2/patches/165146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-3-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:37","name":"[V2,3/3] split complicate constant to memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-3-guojiufu@linux.ibm.com/mbox/"},{"id":165179,"url":"https://patchwork.plctlab.org/api/1.2/patches/165179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115034801.979185-1-pan2.li@intel.com/","msgid":"<20231115034801.979185-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-15T03:48:01","name":"[v1] RISC-V: Refine the mask generation for vec_init case 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115034801.979185-1-pan2.li@intel.com/mbox/"},{"id":165186,"url":"https://patchwork.plctlab.org/api/1.2/patches/165186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115053014.166349-1-tom@tromey.com/","msgid":"<20231115053014.166349-1-tom@tromey.com>","list_archive_url":null,"date":"2023-11-15T05:30:14","name":"Fix crash in libcc1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115053014.166349-1-tom@tromey.com/mbox/"},{"id":165188,"url":"https://patchwork.plctlab.org/api/1.2/patches/165188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115064107.2151843-1-vineetg@rivosinc.com/","msgid":"<20231115064107.2151843-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T06:41:07","name":"RISC-V: fix vsetvli pass testsuite failure [PR/112447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115064107.2151843-1-vineetg@rivosinc.com/mbox/"},{"id":165191,"url":"https://patchwork.plctlab.org/api/1.2/patches/165191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071236.1250103-1-pan2.li@intel.com/","msgid":"<20231115071236.1250103-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-15T07:12:36","name":"[v2] RISC-V: Refine the mask generation for vec_init case 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071236.1250103-1-pan2.li@intel.com/mbox/"},{"id":165192,"url":"https://patchwork.plctlab.org/api/1.2/patches/165192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071508.3273813-1-juzhe.zhong@rivai.ai/","msgid":"<20231115071508.3273813-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-15T07:15:08","name":"RISC-V: Disallow RVV mode address for any load/store[PR112535]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071508.3273813-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165195,"url":"https://patchwork.plctlab.org/api/1.2/patches/165195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVR6Ggrw8q5oUsi7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T07:58:18","name":"[committed] testsuite: Adjust gcc.dg/cpp/if-2.c for 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVR6Ggrw8q5oUsi7@tucnak/mbox/"},{"id":165202,"url":"https://patchwork.plctlab.org/api/1.2/patches/165202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be4a62d2-32eb-eb3b-56de-801d602e364d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T09:01:46","name":"sched: Remove debug counter sched_block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be4a62d2-32eb-eb3b-56de-801d602e364d@linux.ibm.com/mbox/"},{"id":165219,"url":"https://patchwork.plctlab.org/api/1.2/patches/165219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7b0d8fb-64a0-2ed2-f333-06b79133e68f@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T09:16:15","name":"rs6000: New pass to mitigate SP float load perf issue on Power10","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7b0d8fb-64a0-2ed2-f333-06b79133e68f@linux.ibm.com/mbox/"},{"id":165228,"url":"https://patchwork.plctlab.org/api/1.2/patches/165228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094327.3976469-1-hongyu.wang@intel.com/","msgid":"<20231115094327.3976469-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:43:27","name":"[i386] APX: Fix EGPR usage in several patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094327.3976469-1-hongyu.wang@intel.com/mbox/"},{"id":165232,"url":"https://patchwork.plctlab.org/api/1.2/patches/165232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-2-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:50","name":"[01/16,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-2-hongyu.wang@intel.com/mbox/"},{"id":165229,"url":"https://patchwork.plctlab.org/api/1.2/patches/165229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-3-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:51","name":"[02/16,APX,NDD] Restrict TImode register usage when NDD enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-3-hongyu.wang@intel.com/mbox/"},{"id":165235,"url":"https://patchwork.plctlab.org/api/1.2/patches/165235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-4-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:52","name":"[03/16,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-4-hongyu.wang@intel.com/mbox/"},{"id":165230,"url":"https://patchwork.plctlab.org/api/1.2/patches/165230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-5-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:53","name":"[04/16,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-5-hongyu.wang@intel.com/mbox/"},{"id":165238,"url":"https://patchwork.plctlab.org/api/1.2/patches/165238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-6-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:54","name":"[05/16,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-6-hongyu.wang@intel.com/mbox/"},{"id":165231,"url":"https://patchwork.plctlab.org/api/1.2/patches/165231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-7-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:55","name":"[06/16,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-7-hongyu.wang@intel.com/mbox/"},{"id":165239,"url":"https://patchwork.plctlab.org/api/1.2/patches/165239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-8-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:56","name":"[07/16,APX,NDD] Support APX NDD for sbb insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-8-hongyu.wang@intel.com/mbox/"},{"id":165233,"url":"https://patchwork.plctlab.org/api/1.2/patches/165233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-9-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:57","name":"[08/16,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-9-hongyu.wang@intel.com/mbox/"},{"id":165236,"url":"https://patchwork.plctlab.org/api/1.2/patches/165236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-10-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:58","name":"[09/16,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-10-hongyu.wang@intel.com/mbox/"},{"id":165241,"url":"https://patchwork.plctlab.org/api/1.2/patches/165241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-11-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:59","name":"[10/16,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-11-hongyu.wang@intel.com/mbox/"},{"id":165242,"url":"https://patchwork.plctlab.org/api/1.2/patches/165242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-12-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:00","name":"[11/16,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-12-hongyu.wang@intel.com/mbox/"},{"id":165237,"url":"https://patchwork.plctlab.org/api/1.2/patches/165237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-13-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:01","name":"[12/16,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-13-hongyu.wang@intel.com/mbox/"},{"id":165244,"url":"https://patchwork.plctlab.org/api/1.2/patches/165244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-14-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:02","name":"[13/16,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-14-hongyu.wang@intel.com/mbox/"},{"id":165234,"url":"https://patchwork.plctlab.org/api/1.2/patches/165234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-15-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:03","name":"[14/16,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-15-hongyu.wang@intel.com/mbox/"},{"id":165243,"url":"https://patchwork.plctlab.org/api/1.2/patches/165243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-16-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:04","name":"[15/16,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-16-hongyu.wang@intel.com/mbox/"},{"id":165240,"url":"https://patchwork.plctlab.org/api/1.2/patches/165240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-17-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:05","name":"[16/16,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-17-hongyu.wang@intel.com/mbox/"},{"id":165275,"url":"https://patchwork.plctlab.org/api/1.2/patches/165275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115104854.1784462-1-rearnsha@arm.com/","msgid":"<20231115104854.1784462-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-15T10:48:54","name":"[committed] arm: testsuite: fix test for armv6t2 hardware","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115104854.1784462-1-rearnsha@arm.com/mbox/"},{"id":165278,"url":"https://patchwork.plctlab.org/api/1.2/patches/165278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkIHRolM2qc0o4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T10:57:36","name":"[2/4] libsanitizer: Apply local patches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkIHRolM2qc0o4@tucnak/mbox/"},{"id":165279,"url":"https://patchwork.plctlab.org/api/1.2/patches/165279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkgWx1fGtpCl07@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T10:59:13","name":"[3/4] libsanitizer: Adjust the asan/sanity-check-pure-c-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkgWx1fGtpCl07@tucnak/mbox/"},{"id":165280,"url":"https://patchwork.plctlab.org/api/1.2/patches/165280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlPz/p3ZzphPeF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T11:02:23","name":"[4/4] libsanitizer: Readd __ubsan_handle_function_type_mismatch_v1{,_abort}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlPz/p3ZzphPeF@tucnak/mbox/"},{"id":165281,"url":"https://patchwork.plctlab.org/api/1.2/patches/165281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlSHRh9Q1vGvMH@localhost.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-15T11:02:32","name":"[PING,v2] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlSHRh9Q1vGvMH@localhost.localdomain/mbox/"},{"id":165331,"url":"https://patchwork.plctlab.org/api/1.2/patches/165331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113001.1048257-1-jwakely@redhat.com/","msgid":"<20231115113001.1048257-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-15T11:28:38","name":"[committed] libstdc++: std::stacktrace tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113001.1048257-1-jwakely@redhat.com/mbox/"},{"id":165343,"url":"https://patchwork.plctlab.org/api/1.2/patches/165343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113019.1048370-1-jwakely@redhat.com/","msgid":"<20231115113019.1048370-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-15T11:30:03","name":"[committed] libstdc++: Fix std::deque::operator[] Xmethod [PR112491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113019.1048370-1-jwakely@redhat.com/mbox/"},{"id":165321,"url":"https://patchwork.plctlab.org/api/1.2/patches/165321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121204.1B4C5385C410@sourceware.org/","msgid":"<20231115121204.1B4C5385C410@sourceware.org>","list_archive_url":null,"date":"2023-11-15T12:11:35","name":"Fix ICE with SLP and -fdbg-cnt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121204.1B4C5385C410@sourceware.org/mbox/"},{"id":165322,"url":"https://patchwork.plctlab.org/api/1.2/patches/165322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121218.09387385B531@sourceware.org/","msgid":"<20231115121218.09387385B531@sourceware.org>","list_archive_url":null,"date":"2023-11-15T12:11:50","name":"tree-optimization/112282 - wrong-code with ifcvt hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121218.09387385B531@sourceware.org/mbox/"},{"id":165344,"url":"https://patchwork.plctlab.org/api/1.2/patches/165344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131252.25924-1-jchrist@linux.ibm.com/","msgid":"<20231115131252.25924-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:12:52","name":"s390: Fix ICE in testcase pr89233","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131252.25924-1-jchrist@linux.ibm.com/mbox/"},{"id":165345,"url":"https://patchwork.plctlab.org/api/1.2/patches/165345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131519.26144-1-jchrist@linux.ibm.com/","msgid":"<20231115131519.26144-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:15:19","name":"s390: split int128 load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131519.26144-1-jchrist@linux.ibm.com/mbox/"},{"id":165346,"url":"https://patchwork.plctlab.org/api/1.2/patches/165346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131525.26166-1-jchrist@linux.ibm.com/","msgid":"<20231115131525.26166-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:15:25","name":"s390: implement flags output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131525.26166-1-jchrist@linux.ibm.com/mbox/"},{"id":165363,"url":"https://patchwork.plctlab.org/api/1.2/patches/165363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115132949.1726209-1-stefansf@linux.ibm.com/","msgid":"<20231115132949.1726209-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:29:49","name":"s390: Fix generation of s390-gen-builtins.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115132949.1726209-1-stefansf@linux.ibm.com/mbox/"},{"id":165392,"url":"https://patchwork.plctlab.org/api/1.2/patches/165392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com/","msgid":"<8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com>","list_archive_url":null,"date":"2023-11-15T14:09:36","name":"[committed] amdgcn: simplify secondary reload patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com/mbox/"},{"id":165393,"url":"https://patchwork.plctlab.org/api/1.2/patches/165393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd91ab4e-7e7a-46a7-a4df-207b323140b9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T14:10:47","name":"[committed] amdgcn: Add Accelerator VGPR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd91ab4e-7e7a-46a7-a4df-207b323140b9@codesourcery.com/mbox/"},{"id":165399,"url":"https://patchwork.plctlab.org/api/1.2/patches/165399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5rfum3v.fsf@euler.schwinge.homeip.net/","msgid":"<87a5rfum3v.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-15T14:28:36","name":"nvptx: Extend '\''brev'\'' test cases (was: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5rfum3v.fsf@euler.schwinge.homeip.net/mbox/"},{"id":165407,"url":"https://patchwork.plctlab.org/api/1.2/patches/165407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y23ulq5.fsf@euler.schwinge.homeip.net/","msgid":"<875y23ulq5.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-15T14:36:50","name":"nvptx: Fix copy'\''n'\''paste-o in '\''__builtin_nvptx_brev'\'' description (was: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y23ulq5.fsf@euler.schwinge.homeip.net/mbox/"},{"id":165497,"url":"https://patchwork.plctlab.org/api/1.2/patches/165497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com/","msgid":"<4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com>","list_archive_url":null,"date":"2023-11-15T16:51:20","name":"Fortran: fix reallocation on assignment of polymorphic variables [PR110415]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com/mbox/"},{"id":165502,"url":"https://patchwork.plctlab.org/api/1.2/patches/165502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18011-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:02:10","name":"AArch64: only discount MLA for vector and scalar statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18011-tamar@arm.com/mbox/"},{"id":165509,"url":"https://patchwork.plctlab.org/api/1.2/patches/165509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT6y12WEa9cwQqo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:07:23","name":"[2/6] AArch64: Remove special handling of generic cpu.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT6y12WEa9cwQqo@arm.com/mbox/"},{"id":165512,"url":"https://patchwork.plctlab.org/api/1.2/patches/165512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT7EuX7I1X0+xfV@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:08:34","name":"[6/6] AArch64: only emit mismatch error when features would be disabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT7EuX7I1X0+xfV@arm.com/mbox/"},{"id":165525,"url":"https://patchwork.plctlab.org/api/1.2/patches/165525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173706.2159712-1-vineetg@rivosinc.com/","msgid":"<20231115173706.2159712-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T17:37:06","name":"[Committed] RISC-V: elide unnecessary sign extend when expanding cmp_and_jump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173706.2159712-1-vineetg@rivosinc.com/mbox/"},{"id":165540,"url":"https://patchwork.plctlab.org/api/1.2/patches/165540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173913.2159755-1-vineetg@rivosinc.com/","msgid":"<20231115173913.2159755-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T17:39:13","name":"[Committed] RISC-V: fix vsetvli pass testsuite failure [PR/112447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173913.2159755-1-vineetg@rivosinc.com/mbox/"},{"id":165543,"url":"https://patchwork.plctlab.org/api/1.2/patches/165543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115180350.2126787-1-ppalka@redhat.com/","msgid":"<20231115180350.2126787-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-15T18:03:49","name":"c++: constantness of call to function pointer [PR111703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115180350.2126787-1-ppalka@redhat.com/mbox/"},{"id":165545,"url":"https://patchwork.plctlab.org/api/1.2/patches/165545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115182815.98917-1-patrick@rivosinc.com/","msgid":"<20231115182815.98917-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T18:28:15","name":"[Committed] RISC-V: Fix ICE in non-canonical march parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115182815.98917-1-patrick@rivosinc.com/mbox/"},{"id":165560,"url":"https://patchwork.plctlab.org/api/1.2/patches/165560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115193125.1888314-1-mjw@redhat.com/","msgid":"<20231115193125.1888314-1-mjw@redhat.com>","list_archive_url":null,"date":"2023-11-15T19:31:25","name":"[COMMITTED] Regenerate libiberty/aclocal.m4 with aclocal 1.15.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115193125.1888314-1-mjw@redhat.com/mbox/"},{"id":165627,"url":"https://patchwork.plctlab.org/api/1.2/patches/165627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVVFBevWkXfRbaVe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T22:24:05","name":"[v3] c++: fix parsing with auto(x) [PR112410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVVFBevWkXfRbaVe@redhat.com/mbox/"},{"id":165629,"url":"https://patchwork.plctlab.org/api/1.2/patches/165629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115233042.557245-1-ewlu@rivosinc.com/","msgid":"<20231115233042.557245-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T23:30:42","name":"RISC-V: Change unaligned fast/slow/avoid macros to misaligned [PR111557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115233042.557245-1-ewlu@rivosinc.com/mbox/"},{"id":165631,"url":"https://patchwork.plctlab.org/api/1.2/patches/165631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com/","msgid":"<1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T23:50:17","name":"rs6000: Disassemble opaque modes using subregs to allow optimizations [PR109116]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com/mbox/"},{"id":165690,"url":"https://patchwork.plctlab.org/api/1.2/patches/165690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116040907.1647406-1-juzhe.zhong@rivai.ai/","msgid":"<20231116040907.1647406-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-16T04:09:07","name":"VECT: Clear LOOP_VINFO_USING_SELECT_VL_P when loop is not partial vectorized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116040907.1647406-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165698,"url":"https://patchwork.plctlab.org/api/1.2/patches/165698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116053614.3352917-1-hongtao.liu@intel.com/","msgid":"<20231116053614.3352917-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-16T05:36:14","name":"Fix ICE of unrecognizable insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116053614.3352917-1-hongtao.liu@intel.com/mbox/"},{"id":165700,"url":"https://patchwork.plctlab.org/api/1.2/patches/165700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061551.1218932-1-philipp.tomsich@vrull.eu/","msgid":"<20231116061551.1218932-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-11-16T06:15:51","name":"aarch64: costs: update for TARGET_CSSC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061551.1218932-1-philipp.tomsich@vrull.eu/mbox/"},{"id":165701,"url":"https://patchwork.plctlab.org/api/1.2/patches/165701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061607.1218967-1-philipp.tomsich@vrull.eu/","msgid":"<20231116061607.1218967-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-11-16T06:16:07","name":"aarch64: Add support for Ampere-1B (-mcpu=ampere1b) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061607.1218967-1-philipp.tomsich@vrull.eu/mbox/"},{"id":165702,"url":"https://patchwork.plctlab.org/api/1.2/patches/165702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061709.9897-1-xujiahao@loongson.cn/","msgid":"<20231116061709.9897-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T06:17:09","name":"LoongArch: Increase cost of vector aligned store/load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061709.9897-1-xujiahao@loongson.cn/mbox/"},{"id":165712,"url":"https://patchwork.plctlab.org/api/1.2/patches/165712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVW+SSY4R6bixlAJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-16T07:01:29","name":"slp: Fix handling of IFN_CLZ/CTZ [PR112536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVW+SSY4R6bixlAJ@tucnak/mbox/"},{"id":165714,"url":"https://patchwork.plctlab.org/api/1.2/patches/165714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVXBySqtaPRGHAmX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-16T07:16:25","name":"i386: Fix mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi peephole2 [PR112526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVXBySqtaPRGHAmX@tucnak/mbox/"},{"id":165717,"url":"https://patchwork.plctlab.org/api/1.2/patches/165717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116072745.6177-1-chenglulu@loongson.cn/","msgid":"<20231116072745.6177-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-16T07:27:46","name":"[v2] LoongArch: Add code generation support for call36 function calls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116072745.6177-1-chenglulu@loongson.cn/mbox/"},{"id":165719,"url":"https://patchwork.plctlab.org/api/1.2/patches/165719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080113.1250131-1-yangyujie@loongson.cn/","msgid":"<20231116080113.1250131-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-16T08:01:13","name":"libsanitizer: adjust triplet pattern to allow loongarch64-linux* targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080113.1250131-1-yangyujie@loongson.cn/mbox/"},{"id":165735,"url":"https://patchwork.plctlab.org/api/1.2/patches/165735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-1-jwakely@redhat.com/","msgid":"<20231116080314.1218556-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:02:20","name":"[committed,1/2] libstdc++: Adjust feature test in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-1-jwakely@redhat.com/mbox/"},{"id":165720,"url":"https://patchwork.plctlab.org/api/1.2/patches/165720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-2-jwakely@redhat.com/","msgid":"<20231116080314.1218556-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:02:21","name":"[committed,2/2] libstdc++: Use 202100L as feature test check for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-2-jwakely@redhat.com/mbox/"},{"id":165743,"url":"https://patchwork.plctlab.org/api/1.2/patches/165743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-1-jwakely@redhat.com/","msgid":"<20231116081135.1220930-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:11:00","name":"[committed,1/2] libstdc++: Test for feature test macros more accurately","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-1-jwakely@redhat.com/mbox/"},{"id":165742,"url":"https://patchwork.plctlab.org/api/1.2/patches/165742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-2-jwakely@redhat.com/","msgid":"<20231116081135.1220930-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:11:01","name":"[committed,2/2] libstdc++: Only declare feature test macros in standard headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-2-jwakely@redhat.com/mbox/"},{"id":165736,"url":"https://patchwork.plctlab.org/api/1.2/patches/165736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081324.1221069-1-jwakely@redhat.com/","msgid":"<20231116081324.1221069-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:12:39","name":"[committed] libstdc++: Implement std::out_ptr and std::inout_ptr for C++23 [PR111667]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081324.1221069-1-jwakely@redhat.com/mbox/"},{"id":165723,"url":"https://patchwork.plctlab.org/api/1.2/patches/165723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116082744.5839-1-xujiahao@loongson.cn/","msgid":"<20231116082744.5839-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T08:27:44","name":"[1/2] LoongArch: Increase cost of vector aligned store/load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116082744.5839-1-xujiahao@loongson.cn/mbox/"},{"id":165737,"url":"https://patchwork.plctlab.org/api/1.2/patches/165737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e07b1b73-b64d-469a-8d45-3e0e6b967791@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T09:33:39","name":"[V2] tree-optimization: Add register pressure heuristics and appropriate use of profile data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e07b1b73-b64d-469a-8d45-3e0e6b967791@linux.ibm.com/mbox/"},{"id":165744,"url":"https://patchwork.plctlab.org/api/1.2/patches/165744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116100155.2460745-1-yangyujie@loongson.cn/","msgid":"<20231116100155.2460745-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-16T10:01:55","name":"libphobos: Fix static build.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116100155.2460745-1-yangyujie@loongson.cn/mbox/"},{"id":165755,"url":"https://patchwork.plctlab.org/api/1.2/patches/165755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116104710.1279964-1-hongtao.liu@intel.com/","msgid":"<20231116104710.1279964-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-16T10:47:10","name":"[V2] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VCE d))).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116104710.1279964-1-hongtao.liu@intel.com/mbox/"},{"id":165786,"url":"https://patchwork.plctlab.org/api/1.2/patches/165786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120730.1312100-1-stefansf@linux.ibm.com/","msgid":"<20231116120730.1312100-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-16T12:07:30","name":"s390: Streamline NNPA builtins with their LLVM counterparts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120730.1312100-1-stefansf@linux.ibm.com/mbox/"},{"id":165781,"url":"https://patchwork.plctlab.org/api/1.2/patches/165781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120815.23279-1-xujiahao@loongson.cn/","msgid":"<20231116120815.23279-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:08:15","name":"LoongArch: Fix scan-assembler-times of lasx/lsx test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120815.23279-1-xujiahao@loongson.cn/mbox/"},{"id":165788,"url":"https://patchwork.plctlab.org/api/1.2/patches/165788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123004.3731806-1-liwei@loongson.cn/","msgid":"<20231116123004.3731806-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:30:04","name":"[v1] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123004.3731806-1-liwei@loongson.cn/mbox/"},{"id":165789,"url":"https://patchwork.plctlab.org/api/1.2/patches/165789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123109.41084-1-xujiahao@loongson.cn/","msgid":"<20231116123109.41084-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:31:09","name":"LoongArch: Fix scan-assembler-times of lasx/lsx test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123109.41084-1-xujiahao@loongson.cn/mbox/"},{"id":165794,"url":"https://patchwork.plctlab.org/api/1.2/patches/165794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce3c556f-a63e-4328-bab3-6530126f5187@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T13:01:38","name":"Fortran: Accept -std=f2023 support, update line-length for Fortran 2023","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce3c556f-a63e-4328-bab3-6530126f5187@codesourcery.com/mbox/"},{"id":165806,"url":"https://patchwork.plctlab.org/api/1.2/patches/165806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-3-xry111@xry111.site/","msgid":"<20231116131836.504699-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:33","name":"[1/5] LoongArch: Switch loongarch-def to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-3-xry111@xry111.site/mbox/"},{"id":165805,"url":"https://patchwork.plctlab.org/api/1.2/patches/165805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-4-xry111@xry111.site/","msgid":"<20231116131836.504699-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:34","name":"[2/5] LoongArch: genopts: Add infrastructure to generate code for new features in ISA evolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-4-xry111@xry111.site/mbox/"},{"id":165803,"url":"https://patchwork.plctlab.org/api/1.2/patches/165803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-5-xry111@xry111.site/","msgid":"<20231116131836.504699-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:35","name":"[3/5] LoongArch: Take the advantage of -mdiv32 if it'\''s enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-5-xry111@xry111.site/mbox/"},{"id":165804,"url":"https://patchwork.plctlab.org/api/1.2/patches/165804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-6-xry111@xry111.site/","msgid":"<20231116131836.504699-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:36","name":"[4/5] LoongArch: Don'\''t emit dbar 0x700 if -mld-seq-sa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-6-xry111@xry111.site/mbox/"},{"id":165807,"url":"https://patchwork.plctlab.org/api/1.2/patches/165807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-7-xry111@xry111.site/","msgid":"<20231116131836.504699-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:37","name":"[5/5] LoongArch: Add -march=la664 and -mtune=la664","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-7-xry111@xry111.site/mbox/"},{"id":165809,"url":"https://patchwork.plctlab.org/api/1.2/patches/165809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116133643.3989600-1-dmalcolm@redhat.com/","msgid":"<20231116133643.3989600-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:36:43","name":"[pushed] diagnostics: make m_lang_mask private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116133643.3989600-1-dmalcolm@redhat.com/mbox/"},{"id":165819,"url":"https://patchwork.plctlab.org/api/1.2/patches/165819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-1-jwakely@redhat.com/","msgid":"<20231116134736.1287539-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:45:37","name":"[1/2] libstdc++: Atomic wait/notify ABI stabilization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-1-jwakely@redhat.com/mbox/"},{"id":165853,"url":"https://patchwork.plctlab.org/api/1.2/patches/165853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-2-jwakely@redhat.com/","msgid":"<20231116134736.1287539-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:45:38","name":"[2/2] libstdc++: Pass __wait_args to internal API by const pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-2-jwakely@redhat.com/mbox/"},{"id":165831,"url":"https://patchwork.plctlab.org/api/1.2/patches/165831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8a1rdwy.fsf@oldenburg.str.redhat.com/","msgid":"<87v8a1rdwy.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-16T14:06:05","name":"[COMMITTED] gcc.c-torture/execute/931004-13.c: Fix declaration of main","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8a1rdwy.fsf@oldenburg.str.redhat.com/mbox/"},{"id":165837,"url":"https://patchwork.plctlab.org/api/1.2/patches/165837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-2-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:55","name":"[1/4] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-2-dmalcolm@redhat.com/mbox/"},{"id":165842,"url":"https://patchwork.plctlab.org/api/1.2/patches/165842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-3-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:56","name":"[2/4] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-3-dmalcolm@redhat.com/mbox/"},{"id":165840,"url":"https://patchwork.plctlab.org/api/1.2/patches/165840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-4-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:57","name":"[3/4] opts: add logic to generate options-urls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-4-dmalcolm@redhat.com/mbox/"},{"id":165839,"url":"https://patchwork.plctlab.org/api/1.2/patches/165839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-5-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:58","name":"[4/4] options: wire up options-urls.cc into gcc_urlifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-5-dmalcolm@redhat.com/mbox/"},{"id":165854,"url":"https://patchwork.plctlab.org/api/1.2/patches/165854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-1-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:12","name":"[1/6] arm: Fix arm_simd_types and MVE scalar_types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-1-christophe.lyon@linaro.org/mbox/"},{"id":165856,"url":"https://patchwork.plctlab.org/api/1.2/patches/165856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-2-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:13","name":"[2/6] arm: [MVE intrinsics] Add support for void and load/store pointers as argument types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-2-christophe.lyon@linaro.org/mbox/"},{"id":165858,"url":"https://patchwork.plctlab.org/api/1.2/patches/165858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-3-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:14","name":"[3/6] arm: [MVE intrinsics] Add support for contiguous loads and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-3-christophe.lyon@linaro.org/mbox/"},{"id":165855,"url":"https://patchwork.plctlab.org/api/1.2/patches/165855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-4-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:15","name":"[4/6] arm: [MVE intrinsics] add load and store shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-4-christophe.lyon@linaro.org/mbox/"},{"id":165857,"url":"https://patchwork.plctlab.org/api/1.2/patches/165857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-5-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:16","name":"[5/6] arm: [MVE intrinsics] fix vst1 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-5-christophe.lyon@linaro.org/mbox/"},{"id":165859,"url":"https://patchwork.plctlab.org/api/1.2/patches/165859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-6-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:17","name":"[6/6] arm: [MVE intrinsics] rework vldq1 vst1q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-6-christophe.lyon@linaro.org/mbox/"},{"id":165883,"url":"https://patchwork.plctlab.org/api/1.2/patches/165883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116155108.2207222-1-ppalka@redhat.com/","msgid":"<20231116155108.2207222-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-16T15:51:07","name":"[pushed] c++: add fixed testcases [PR98614, PR104802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116155108.2207222-1-ppalka@redhat.com/mbox/"},{"id":165898,"url":"https://patchwork.plctlab.org/api/1.2/patches/165898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-16T16:49:55","name":"sra: SRA of non-escaped aggregates passed by reference to calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":165901,"url":"https://patchwork.plctlab.org/api/1.2/patches/165901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/jghdu6aruqa5acmjpeb32o2tskao4t27c6xcyt7vfhj4cnxare@4vxlgjyirna4/","msgid":"","list_archive_url":null,"date":"2023-11-16T17:15:34","name":"[COMMITTED] Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/jghdu6aruqa5acmjpeb32o2tskao4t27c6xcyt7vfhj4cnxare@4vxlgjyirna4/mbox/"},{"id":165908,"url":"https://patchwork.plctlab.org/api/1.2/patches/165908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZXWV_WT5f9H4v5@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-16T17:54:33","name":"[committed] hppa: Revise REG+D address support to allow long displacements before reload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZXWV_WT5f9H4v5@mx3210.localdomain/mbox/"},{"id":165910,"url":"https://patchwork.plctlab.org/api/1.2/patches/165910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaRu6BvaxQVqJ4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:07:02","name":"[02/11] rtl-ssa: Add some helpers for removing accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaRu6BvaxQVqJ4@arm.com/mbox/"},{"id":165911,"url":"https://patchwork.plctlab.org/api/1.2/patches/165911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaXJY/K04w2ojw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:07:24","name":"[03/11] aarch64, testsuite: Fix up auto-init-padding tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaXJY/K04w2ojw@arm.com/mbox/"},{"id":165915,"url":"https://patchwork.plctlab.org/api/1.2/patches/165915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbB0KHxzDkN0ci@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:10:15","name":"[09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbB0KHxzDkN0ci@arm.com/mbox/"},{"id":165917,"url":"https://patchwork.plctlab.org/api/1.2/patches/165917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbYrRa/M+jTFcm@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:11:46","name":"[11/11] aarch64: Use individual loads/stores for mem{cpy,set} expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbYrRa/M+jTFcm@arm.com/mbox/"},{"id":165938,"url":"https://patchwork.plctlab.org/api/1.2/patches/165938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVaAylotDULKTs/N@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T20:51:22","name":"[v5] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVaAylotDULKTs/N@redhat.com/mbox/"},{"id":165942,"url":"https://patchwork.plctlab.org/api/1.2/patches/165942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at/","msgid":"<3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-16T21:38:08","name":"[1/4] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at/mbox/"},{"id":165943,"url":"https://patchwork.plctlab.org/api/1.2/patches/165943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb7bd855a76bcf89b5b0823882a8ec0d828c7291.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-16T21:38:47","name":"[2/4] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb7bd855a76bcf89b5b0823882a8ec0d828c7291.camel@tugraz.at/mbox/"},{"id":165944,"url":"https://patchwork.plctlab.org/api/1.2/patches/165944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at/","msgid":"<223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-16T21:39:26","name":"[3/4] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at/mbox/"},{"id":165945,"url":"https://patchwork.plctlab.org/api/1.2/patches/165945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e926b4d4153c5feb41a22ba10f54f571bc38a19b.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-16T21:40:09","name":"[4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e926b4d4153c5feb41a22ba10f54f571bc38a19b.camel@tugraz.at/mbox/"},{"id":165947,"url":"https://patchwork.plctlab.org/api/1.2/patches/165947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/531885fa576a672454e6630549858842588c800e.camel@zoho.com/","msgid":"<531885fa576a672454e6630549858842588c800e.camel@zoho.com>","list_archive_url":null,"date":"2023-11-16T22:28:05","name":"libgccjit: Fix ira cost segfault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/531885fa576a672454e6630549858842588c800e.camel@zoho.com/mbox/"},{"id":165953,"url":"https://patchwork.plctlab.org/api/1.2/patches/165953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7ffe995942c43dd8f462b16d234e475a73e4e86.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T22:36:36","name":"libgccjit Fix a RTL bug for libgccjit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7ffe995942c43dd8f462b16d234e475a73e4e86.camel@zoho.com/mbox/"},{"id":165965,"url":"https://patchwork.plctlab.org/api/1.2/patches/165965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-1-hongtao.liu@intel.com/","msgid":"<20231117000934.2301995-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T00:09:33","name":"[1/2] Support reduc_{plus, xor, and, ior}_scal_m for vector integer mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-1-hongtao.liu@intel.com/mbox/"},{"id":165964,"url":"https://patchwork.plctlab.org/api/1.2/patches/165964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-2-hongtao.liu@intel.com/","msgid":"<20231117000934.2301995-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T00:09:34","name":"[2/2] Add i?86-*-* and x86_64-*-* to vect_logical_reduc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-2-hongtao.liu@intel.com/mbox/"},{"id":165976,"url":"https://patchwork.plctlab.org/api/1.2/patches/165976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117023802.476523-1-liwei@loongson.cn/","msgid":"<20231117023802.476523-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-17T02:38:02","name":"[v2] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117023802.476523-1-liwei@loongson.cn/mbox/"},{"id":165977,"url":"https://patchwork.plctlab.org/api/1.2/patches/165977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com/","msgid":"<408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-17T02:53:05","name":"[v2,2/5] c-family: Simplify attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com/mbox/"},{"id":165978,"url":"https://patchwork.plctlab.org/api/1.2/patches/165978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com/","msgid":"<10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-17T02:54:17","name":"[v2,3/5] ada: Improve attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com/mbox/"},{"id":165980,"url":"https://patchwork.plctlab.org/api/1.2/patches/165980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117044319.3912782-1-juzhe.zhong@rivai.ai/","msgid":"<20231117044319.3912782-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T04:43:19","name":"RISC-V: Optimize VLA SLP with duplicate VLA shuffle indice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117044319.3912782-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165983,"url":"https://patchwork.plctlab.org/api/1.2/patches/165983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051058.535141-1-hongtao.liu@intel.com/","msgid":"<20231117051058.535141-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T05:10:58","name":"Support cbranchm for Vector HI/QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051058.535141-1-hongtao.liu@intel.com/mbox/"},{"id":165984,"url":"https://patchwork.plctlab.org/api/1.2/patches/165984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051232.10396-1-xuli1@eswincomputing.com/","msgid":"<20231117051232.10396-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-17T05:12:32","name":"RISC-V: Implement -mmemcpy-strategy= options[PR112537]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051232.10396-1-xuli1@eswincomputing.com/mbox/"},{"id":165990,"url":"https://patchwork.plctlab.org/api/1.2/patches/165990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117063640.1242505-1-yangyujie@loongson.cn/","msgid":"<20231117063640.1242505-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-17T06:36:40","name":"LoongArch: Fix eh_return epilogue for normal returns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117063640.1242505-1-yangyujie@loongson.cn/mbox/"},{"id":166001,"url":"https://patchwork.plctlab.org/api/1.2/patches/166001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f97dabfe-37f9-4b83-b293-64d0421782a4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T07:25:23","name":"[V12] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f97dabfe-37f9-4b83-b293-64d0421782a4@linux.ibm.com/mbox/"},{"id":166002,"url":"https://patchwork.plctlab.org/api/1.2/patches/166002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117072548.3543202-1-hongyu.wang@intel.com/","msgid":"<20231117072548.3543202-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-17T07:25:48","name":"[APX,PPX] Support Intel APX PPX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117072548.3543202-1-hongyu.wang@intel.com/mbox/"},{"id":166005,"url":"https://patchwork.plctlab.org/api/1.2/patches/166005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117073549.1841897-1-juzhe.zhong@rivai.ai/","msgid":"<20231117073549.1841897-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T07:35:49","name":"RISC-V: Fix bug of tuple move splitter[PR112561]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117073549.1841897-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166006,"url":"https://patchwork.plctlab.org/api/1.2/patches/166006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com/","msgid":"<2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com>","list_archive_url":null,"date":"2023-11-17T07:46:40","name":"[V3] tree-optimization: Add register pressure heuristics and appropriate use of profile data.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com/mbox/"},{"id":166926,"url":"https://patchwork.plctlab.org/api/1.2/patches/166926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117090021.16805-1-xujiahao@loongson.cn/","msgid":"<20231117090021.16805-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-17T09:00:21","name":"LoongArch: Add support for xorsign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117090021.16805-1-xujiahao@loongson.cn/mbox/"},{"id":166148,"url":"https://patchwork.plctlab.org/api/1.2/patches/166148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/69673087-0686-4642-adaf-70d40c08db6c@gjlay.de/","msgid":"<69673087-0686-4642-adaf-70d40c08db6c@gjlay.de>","list_archive_url":null,"date":"2023-11-17T12:21:12","name":"[avr,committed] PR target/53372: Don'\''t ignore section attribute with address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/69673087-0686-4642-adaf-70d40c08db6c@gjlay.de/mbox/"},{"id":166178,"url":"https://patchwork.plctlab.org/api/1.2/patches/166178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdsZJor+tYlrQKm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T13:36:36","name":"vect: Fix check_reduction_path [PR112374]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdsZJor+tYlrQKm@tucnak/mbox/"},{"id":166179,"url":"https://patchwork.plctlab.org/api/1.2/patches/166179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdu8BjuGofK3TeU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T13:47:28","name":"match.pd: Optimize ctz/popcount/parity/ffs on extended argument [PR112566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdu8BjuGofK3TeU@tucnak/mbox/"},{"id":166180,"url":"https://patchwork.plctlab.org/api/1.2/patches/166180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117134800.1004906-1-juzhe.zhong@rivai.ai/","msgid":"<20231117134800.1004906-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T13:48:00","name":"[V2] RISC-V: Fix bug of tuple move splitter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117134800.1004906-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166181,"url":"https://patchwork.plctlab.org/api/1.2/patches/166181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de/","msgid":"<20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-17T13:50:55","name":"tree-optimization/112585 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de/mbox/"},{"id":166182,"url":"https://patchwork.plctlab.org/api/1.2/patches/166182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdyIFfKpN9rkOWh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T14:01:04","name":"tree-ssa-math-opts: popcount (X) == 1 to (X ^ (X - 1)) > (X - 1) optimization [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdyIFfKpN9rkOWh@tucnak/mbox/"},{"id":166183,"url":"https://patchwork.plctlab.org/api/1.2/patches/166183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdy3Dpq5YryeUpb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T14:04:12","name":"middle-end, v2: Add new value for vector types for __builtin_classify_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdy3Dpq5YryeUpb@tucnak/mbox/"},{"id":166237,"url":"https://patchwork.plctlab.org/api/1.2/patches/166237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144156.1469262-1-jwakely@redhat.com/","msgid":"<20231117144156.1469262-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:41:43","name":"[committed] libstdc++: Fix Doxygen markup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144156.1469262-1-jwakely@redhat.com/mbox/"},{"id":166240,"url":"https://patchwork.plctlab.org/api/1.2/patches/166240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144838.1478158-1-jwakely@redhat.com/","msgid":"<20231117144838.1478158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:48:19","name":"[committed] libstdc++: Add more Doxygen comments and another test for std::out_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144838.1478158-1-jwakely@redhat.com/mbox/"},{"id":166250,"url":"https://patchwork.plctlab.org/api/1.2/patches/166250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144911.1481829-1-jwakely@redhat.com/","msgid":"<20231117144911.1481829-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:49:05","name":"[committed] libstdc++: Adjust std::in_range template parameter name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144911.1481829-1-jwakely@redhat.com/mbox/"},{"id":166218,"url":"https://patchwork.plctlab.org/api/1.2/patches/166218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf541jy9.fsf@euler.schwinge.homeip.net/","msgid":"<87sf541jy9.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-17T15:24:46","name":"Add '\''libgomp.c++/static-local-variable-1.C'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf541jy9.fsf@euler.schwinge.homeip.net/mbox/"},{"id":166259,"url":"https://patchwork.plctlab.org/api/1.2/patches/166259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117153138.1510158-1-jwakely@redhat.com/","msgid":"<20231117153138.1510158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:29:17","name":"[committed] libstdc++: Define C++26 saturation arithmetic functions (P0543R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117153138.1510158-1-jwakely@redhat.com/mbox/"},{"id":166274,"url":"https://patchwork.plctlab.org/api/1.2/patches/166274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117154139.1510875-1-jwakely@redhat.com/","msgid":"<20231117154139.1510875-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:41:29","name":"[committed] libstdc++: Regenerate config.h.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117154139.1510875-1-jwakely@redhat.com/mbox/"},{"id":166275,"url":"https://patchwork.plctlab.org/api/1.2/patches/166275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155300.1513586-1-jwakely@redhat.com/","msgid":"<20231117155300.1513586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:49:47","name":"libstdc++: Define std::ranges::to for C++23 (P1206R7) [PR111055]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155300.1513586-1-jwakely@redhat.com/mbox/"},{"id":166238,"url":"https://patchwork.plctlab.org/api/1.2/patches/166238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155420.1513704-1-jwakely@redhat.com/","msgid":"<20231117155420.1513704-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:53:15","name":"libstdc++: Add fast path for std::format(\"{}\", x) [PR110801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155420.1513704-1-jwakely@redhat.com/mbox/"},{"id":166276,"url":"https://patchwork.plctlab.org/api/1.2/patches/166276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-1-jwakely@redhat.com/","msgid":"<20231117160320.1513815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:54:38","name":"[1/2] libstdc++: Implement C++23 header [PR107760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-1-jwakely@redhat.com/mbox/"},{"id":166239,"url":"https://patchwork.plctlab.org/api/1.2/patches/166239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-2-jwakely@redhat.com/","msgid":"<20231117160320.1513815-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:54:39","name":"[2/2] libstdc++: Ensure valid UTF-8 in std::vprint_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-2-jwakely@redhat.com/mbox/"},{"id":166281,"url":"https://patchwork.plctlab.org/api/1.2/patches/166281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rcqnyq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T17:38:53","name":"[1/5] aarch64: Add +sme2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rcqnyq.fsf@arm.com/mbox/"},{"id":166315,"url":"https://patchwork.plctlab.org/api/1.2/patches/166315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz/","msgid":"<81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:16:37","name":"[1/7] lto: Skip flag OPT_fltrans_output_list_.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz/mbox/"},{"id":166316,"url":"https://patchwork.plctlab.org/api/1.2/patches/166316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz/","msgid":"<1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:16:52","name":"[2/7] lto: Remove random_seed from section name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz/mbox/"},{"id":166318,"url":"https://patchwork.plctlab.org/api/1.2/patches/166318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0af7bafad94bf9d146be76842d41fadfe24be23.1700222403.git.mjires@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-11-17T20:17:01","name":"[3/7] Lockfile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0af7bafad94bf9d146be76842d41fadfe24be23.1700222403.git.mjires@suse.cz/mbox/"},{"id":166317,"url":"https://patchwork.plctlab.org/api/1.2/patches/166317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz/","msgid":"<788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:11","name":"[4/7] lto: Implement ltrans cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz/mbox/"},{"id":166321,"url":"https://patchwork.plctlab.org/api/1.2/patches/166321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz/","msgid":"<6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:18","name":"[5/7] lto: Implement cache partitioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz/mbox/"},{"id":166327,"url":"https://patchwork.plctlab.org/api/1.2/patches/166327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz/","msgid":"<1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:26","name":"[6/7] lto: squash order of symbols in partitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz/mbox/"},{"id":166329,"url":"https://patchwork.plctlab.org/api/1.2/patches/166329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz/","msgid":"<7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:34","name":"[7/7] lto: partition specific lto_clone_numbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz/mbox/"},{"id":166331,"url":"https://patchwork.plctlab.org/api/1.2/patches/166331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-3-xry111@xry111.site/","msgid":"<20231117204323.453536-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:19","name":"[v2,2/6] LoongArch: genopts: Add infrastructure to generate code for new features in ISA evolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-3-xry111@xry111.site/mbox/"},{"id":166335,"url":"https://patchwork.plctlab.org/api/1.2/patches/166335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-4-xry111@xry111.site/","msgid":"<20231117204323.453536-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:20","name":"[v2,3/6] LoongArch: Add evolution features of base ISA revisions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-4-xry111@xry111.site/mbox/"},{"id":166334,"url":"https://patchwork.plctlab.org/api/1.2/patches/166334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-5-xry111@xry111.site/","msgid":"<20231117204323.453536-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:21","name":"[v2,4/6] LoongArch: Take the advantage of -mdiv32 if it'\''s enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-5-xry111@xry111.site/mbox/"},{"id":166332,"url":"https://patchwork.plctlab.org/api/1.2/patches/166332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-6-xry111@xry111.site/","msgid":"<20231117204323.453536-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:22","name":"[v2,5/6] LoongArch: Don'\''t emit dbar 0x700 if -mld-seq-sa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-6-xry111@xry111.site/mbox/"},{"id":166333,"url":"https://patchwork.plctlab.org/api/1.2/patches/166333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-7-xry111@xry111.site/","msgid":"<20231117204323.453536-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:23","name":"[v2,6/6] LoongArch: Add fine-grained control for LAM_BH and LAMCAS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-7-xry111@xry111.site/mbox/"},{"id":166336,"url":"https://patchwork.plctlab.org/api/1.2/patches/166336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204818.454828-3-xry111@xry111.site/","msgid":"<20231117204818.454828-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:48:20","name":"LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204818.454828-3-xry111@xry111.site/mbox/"},{"id":166402,"url":"https://patchwork.plctlab.org/api/1.2/patches/166402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117214610.173872-1-polacek@redhat.com/","msgid":"<20231117214610.173872-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-11-17T21:46:10","name":"c++: P2280R4, Using unknown refs in constant expr [PR106650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117214610.173872-1-polacek@redhat.com/mbox/"},{"id":166416,"url":"https://patchwork.plctlab.org/api/1.2/patches/166416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fedb53cc48e2062a25d9ba401f96735f42b0e9c8.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T22:36:50","name":"libgccjit: Add vector permutation and vector access operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fedb53cc48e2062a25d9ba401f96735f42b0e9c8.camel@zoho.com/mbox/"},{"id":166419,"url":"https://patchwork.plctlab.org/api/1.2/patches/166419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118010347.39147-1-dmalcolm@redhat.com/","msgid":"<20231118010347.39147-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-18T01:03:47","name":"[pushed] analyzer: new warning: -Wanalyzer-infinite-loop [PR106147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118010347.39147-1-dmalcolm@redhat.com/mbox/"},{"id":166431,"url":"https://patchwork.plctlab.org/api/1.2/patches/166431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031149.1010835-1-juzhe.zhong@rivai.ai/","msgid":"<20231118031149.1010835-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-18T03:11:49","name":"RISC-V: Refactor RVV iterators[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031149.1010835-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166432,"url":"https://patchwork.plctlab.org/api/1.2/patches/166432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031513.31109-1-chenglulu@loongson.cn/","msgid":"<20231118031513.31109-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-18T03:15:13","name":"LoongArch: Modify MUSL_DYNAMIC_LINKER.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031513.31109-1-chenglulu@loongson.cn/mbox/"},{"id":166457,"url":"https://patchwork.plctlab.org/api/1.2/patches/166457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118065916.14855-1-guojie@loongson.cn/","msgid":"<20231118065916.14855-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-18T06:59:16","name":"LoongArch: Optimize the loading of immediate numbers with the same high and low 32-bit values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118065916.14855-1-guojie@loongson.cn/mbox/"},{"id":166470,"url":"https://patchwork.plctlab.org/api/1.2/patches/166470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com/","msgid":"<1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com>","list_archive_url":null,"date":"2023-11-18T08:36:14","name":"tree-optimization: Add register pressure in LICM at tree-ssa level optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com/mbox/"},{"id":166481,"url":"https://patchwork.plctlab.org/api/1.2/patches/166481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZViRqiN7i3waSY2v@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T10:27:54","name":"tree-ssa-math-opts: popcount (X) == 1 to (X ^ (X - 1)) > (X - 1) optimization for direct optab [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZViRqiN7i3waSY2v@tucnak/mbox/"},{"id":166494,"url":"https://patchwork.plctlab.org/api/1.2/patches/166494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118104248.11513-1-kito.cheng@sifive.com/","msgid":"<20231118104248.11513-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-18T10:42:48","name":"[committed] RISC-V: Fix mismatched new delete for unique_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118104248.11513-1-kito.cheng@sifive.com/mbox/"},{"id":166584,"url":"https://patchwork.plctlab.org/api/1.2/patches/166584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171637280.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-18T16:50:43","name":"[13/44] RISC-V/testsuite: Add branchless cases for FP cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171637280.5892@tpp.orcam.me.uk/mbox/"},{"id":166608,"url":"https://patchwork.plctlab.org/api/1.2/patches/166608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118174554.25661-2-xry111@xry111.site/","msgid":"<20231118174554.25661-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-18T17:45:55","name":"LoongArch: Fix \"-mexplict-relocs=none -mcmodel=medium\" producing %call36 when the assembler does not support it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118174554.25661-2-xry111@xry111.site/mbox/"},{"id":166649,"url":"https://patchwork.plctlab.org/api/1.2/patches/166649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118195008.579211-1-arsen@aarsen.me/","msgid":"<20231118195008.579211-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-18T18:46:56","name":"libstdc++: implement std::generator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118195008.579211-1-arsen@aarsen.me/mbox/"},{"id":166626,"url":"https://patchwork.plctlab.org/api/1.2/patches/166626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkQ8KJMpceSkrbj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:30:56","name":"c-family, middle-end: Add __builtin_c[lt]zg (arg, 0ULL) exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkQ8KJMpceSkrbj@tucnak/mbox/"},{"id":166647,"url":"https://patchwork.plctlab.org/api/1.2/patches/166647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkSgmHeKHwnznyf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:37:38","name":"c: Add __builtin_bit_complement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkSgmHeKHwnznyf@tucnak/mbox/"},{"id":166648,"url":"https://patchwork.plctlab.org/api/1.2/patches/166648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkTsF8twXnINNrz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:42:40","name":"c: Add __builtin_stdc_bit_{width,floor,ceil} builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkTsF8twXnINNrz@tucnak/mbox/"},{"id":166650,"url":"https://patchwork.plctlab.org/api/1.2/patches/166650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c179e0ea10f1d14b56ada367b0cda0fafe5b5632.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:12:32","name":"[1/4] c: runtime checking for assigment of VM types 1/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c179e0ea10f1d14b56ada367b0cda0fafe5b5632.camel@tugraz.at/mbox/"},{"id":166651,"url":"https://patchwork.plctlab.org/api/1.2/patches/166651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at/","msgid":"<2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-18T21:13:03","name":"[2/4] c: runtime checking for assigment of VM types 2/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at/mbox/"},{"id":166652,"url":"https://patchwork.plctlab.org/api/1.2/patches/166652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at/","msgid":"<5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-18T21:13:44","name":"[3/4] c: runtime checking for assigment of VM types 3/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at/mbox/"},{"id":166653,"url":"https://patchwork.plctlab.org/api/1.2/patches/166653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec98368eda9967482368e0bdf0cfb7ed7790c3c3.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:14:17","name":"[4/4] c: runtime checking for assigment of VM types 4/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec98368eda9967482368e0bdf0cfb7ed7790c3c3.camel@tugraz.at/mbox/"},{"id":166654,"url":"https://patchwork.plctlab.org/api/1.2/patches/166654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqQpP8SQeLwAgsmXDt47dFL5MTxLOpx73wGjSy7-7jnmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:42:02","name":"RFA: RISC-V: Add support for XCVhwlp extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqQpP8SQeLwAgsmXDt47dFL5MTxLOpx73wGjSy7-7jnmg@mail.gmail.com/mbox/"},{"id":166656,"url":"https://patchwork.plctlab.org/api/1.2/patches/166656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214432.1636488-1-jwakely@redhat.com/","msgid":"<20231118214432.1636488-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-18T21:44:02","name":"[committed,v2] libstdc++: Add fast path for std::format(\"{}\", x) [PR110801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214432.1636488-1-jwakely@redhat.com/mbox/"},{"id":166657,"url":"https://patchwork.plctlab.org/api/1.2/patches/166657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214511.1636561-1-jwakely@redhat.com/","msgid":"<20231118214511.1636561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-18T21:44:36","name":"[committed] libstdc++: Check string value_type in std::make_format_args [PR112607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214511.1636561-1-jwakely@redhat.com/mbox/"},{"id":166658,"url":"https://patchwork.plctlab.org/api/1.2/patches/166658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVljEevbGcssSuh8@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-19T01:21:21","name":"Propagate value ranges of return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVljEevbGcssSuh8@kam.mff.cuni.cz/mbox/"},{"id":166659,"url":"https://patchwork.plctlab.org/api/1.2/patches/166659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014318.203251-1-dmalcolm@redhat.com/","msgid":"<20231119014318.203251-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-19T01:43:18","name":"[pushed] analyzer: new warning: -Wanalyzer-undefined-behavior-strtok [PR107573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014318.203251-1-dmalcolm@redhat.com/mbox/"},{"id":166660,"url":"https://patchwork.plctlab.org/api/1.2/patches/166660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014533.1838815-1-juzhe.zhong@rivai.ai/","msgid":"<20231119014533.1838815-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-19T01:45:33","name":"[Committed,V3] RISC-V: Fix bug of tuple move splitter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014533.1838815-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166673,"url":"https://patchwork.plctlab.org/api/1.2/patches/166673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171317470.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:21","name":"[01/44] testsuite: Add cases for conditional-move and conditional-add operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171317470.5892@tpp.orcam.me.uk/mbox/"},{"id":166674,"url":"https://patchwork.plctlab.org/api/1.2/patches/166674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171344110.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:39","name":"[02/44] RISC-V/testsuite: Add cases for integer SFB cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171344110.5892@tpp.orcam.me.uk/mbox/"},{"id":166675,"url":"https://patchwork.plctlab.org/api/1.2/patches/166675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171356430.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:53","name":"[03/44] RISC-V: Reorder comment on SFB patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171356430.5892@tpp.orcam.me.uk/mbox/"},{"id":166676,"url":"https://patchwork.plctlab.org/api/1.2/patches/166676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171401210.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:03","name":"[04/44] RISC-V: Sanitise NEED_EQ_NE_P case with `riscv_emit_int_compare'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171401210.5892@tpp.orcam.me.uk/mbox/"},{"id":166677,"url":"https://patchwork.plctlab.org/api/1.2/patches/166677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171416130.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:12","name":"[05/44] RISC-V: Fix `mode'\'' usage in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171416130.5892@tpp.orcam.me.uk/mbox/"},{"id":166678,"url":"https://patchwork.plctlab.org/api/1.2/patches/166678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171423450.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:21","name":"[06/44] RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171423450.5892@tpp.orcam.me.uk/mbox/"},{"id":166680,"url":"https://patchwork.plctlab.org/api/1.2/patches/166680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171447330.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:31","name":"[07/44] RISC-V: Use `nullptr'\'' in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171447330.5892@tpp.orcam.me.uk/mbox/"},{"id":166679,"url":"https://patchwork.plctlab.org/api/1.2/patches/166679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171455150.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:41","name":"[08/44] RISC-V: Simplify EQ vs NE selection in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171455150.5892@tpp.orcam.me.uk/mbox/"},{"id":166681,"url":"https://patchwork.plctlab.org/api/1.2/patches/166681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171501110.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:52","name":"[09/44] RISC-V: Rework branch costing model for if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171501110.5892@tpp.orcam.me.uk/mbox/"},{"id":166682,"url":"https://patchwork.plctlab.org/api/1.2/patches/166682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171516550.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:06","name":"[10/44] RISC-V/testsuite: Add branched cases for integer cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171516550.5892@tpp.orcam.me.uk/mbox/"},{"id":166683,"url":"https://patchwork.plctlab.org/api/1.2/patches/166683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171619400.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:20","name":"[11/44] RISC-V/testsuite: Add branchless cases for integer cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171619400.5892@tpp.orcam.me.uk/mbox/"},{"id":166685,"url":"https://patchwork.plctlab.org/api/1.2/patches/166685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171632580.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:34","name":"[12/44] RISC-V/testsuite: Add branched cases for FP cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171632580.5892@tpp.orcam.me.uk/mbox/"},{"id":166687,"url":"https://patchwork.plctlab.org/api/1.2/patches/166687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171722590.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:04","name":"[14/44] RISC-V: Also invert the cond-move condition for GEU and LEU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171722590.5892@tpp.orcam.me.uk/mbox/"},{"id":166691,"url":"https://patchwork.plctlab.org/api/1.2/patches/166691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180358190.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:13","name":"[15/44] RISC-V/testsuite: Add branched cases for GEU and LEU cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180358190.5892@tpp.orcam.me.uk/mbox/"},{"id":166686,"url":"https://patchwork.plctlab.org/api/1.2/patches/166686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180416250.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:24","name":"[16/44] RISC-V/testsuite: Add branchless cases for GEU and LEU cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180416250.5892@tpp.orcam.me.uk/mbox/"},{"id":166688,"url":"https://patchwork.plctlab.org/api/1.2/patches/166688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180424040.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:35","name":"[17/44] RISC-V: Avoid extraneous EQ or NE operation in cond-move expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180424040.5892@tpp.orcam.me.uk/mbox/"},{"id":166689,"url":"https://patchwork.plctlab.org/api/1.2/patches/166689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181735420.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:47","name":"[18/44] RISC-V/testsuite: Add branched cases for equality cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181735420.5892@tpp.orcam.me.uk/mbox/"},{"id":166690,"url":"https://patchwork.plctlab.org/api/1.2/patches/166690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181747220.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:00","name":"[19/44] RISC-V/testsuite: Add branchless cases for equality cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181747220.5892@tpp.orcam.me.uk/mbox/"},{"id":166692,"url":"https://patchwork.plctlab.org/api/1.2/patches/166692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181755221.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:13","name":"[20/44] RISC-V: Also accept constants for T-Head cond-move comparison operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181755221.5892@tpp.orcam.me.uk/mbox/"},{"id":166693,"url":"https://patchwork.plctlab.org/api/1.2/patches/166693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181804140.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:25","name":"[21/44] RISC-V: Also accept constants for T-Head cond-move data input operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181804140.5892@tpp.orcam.me.uk/mbox/"},{"id":166694,"url":"https://patchwork.plctlab.org/api/1.2/patches/166694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181813500.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:03","name":"[22/44] RISC-V: Fold all the cond-move variants together","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181813500.5892@tpp.orcam.me.uk/mbox/"},{"id":166695,"url":"https://patchwork.plctlab.org/api/1.2/patches/166695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181823240.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:13","name":"[23/44] RISC-V/testsuite: Add branched cases for T-Head non-equality cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181823240.5892@tpp.orcam.me.uk/mbox/"},{"id":166697,"url":"https://patchwork.plctlab.org/api/1.2/patches/166697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181827560.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:26","name":"[24/44] RISC-V/testsuite: Add branchless cases for T-Head non-equality cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181827560.5892@tpp.orcam.me.uk/mbox/"},{"id":166696,"url":"https://patchwork.plctlab.org/api/1.2/patches/166696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181830580.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:38","name":"[25/44] RISC-V: Implement `riscv_emit_unary'\'' helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181830580.5892@tpp.orcam.me.uk/mbox/"},{"id":166698,"url":"https://patchwork.plctlab.org/api/1.2/patches/166698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181833450.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:48","name":"[26/44] RISC-V: Add `movMODEcc'\'' implementation for generic targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181833450.5892@tpp.orcam.me.uk/mbox/"},{"id":166701,"url":"https://patchwork.plctlab.org/api/1.2/patches/166701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182042320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:59","name":"[27/44] RISC-V/testsuite: Add branched cases for generic integer cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182042320.5892@tpp.orcam.me.uk/mbox/"},{"id":166699,"url":"https://patchwork.plctlab.org/api/1.2/patches/166699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182049270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:12","name":"[28/44] RISC-V/testsuite: Add branchless cases for generic integer cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182049270.5892@tpp.orcam.me.uk/mbox/"},{"id":166704,"url":"https://patchwork.plctlab.org/api/1.2/patches/166704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182054440.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:24","name":"[29/44] RISC-V: Add `addMODEcc'\'' implementation for generic targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182054440.5892@tpp.orcam.me.uk/mbox/"},{"id":166700,"url":"https://patchwork.plctlab.org/api/1.2/patches/166700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182112500.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:33","name":"[30/44] RISC-V/testsuite: Add branched cases for generic integer cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182112500.5892@tpp.orcam.me.uk/mbox/"},{"id":166702,"url":"https://patchwork.plctlab.org/api/1.2/patches/166702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182117360.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:47","name":"[31/44] RISC-V/testsuite: Add branchless cases for generic integer cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182117360.5892@tpp.orcam.me.uk/mbox/"},{"id":166706,"url":"https://patchwork.plctlab.org/api/1.2/patches/166706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182127160.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:01","name":"[32/44] RISC-V: Only use SUBREG if applicable in `riscv_expand_float_scc'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182127160.5892@tpp.orcam.me.uk/mbox/"},{"id":166703,"url":"https://patchwork.plctlab.org/api/1.2/patches/166703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182143010.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:13","name":"[33/44] RISC-V: Also allow FP conditions in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182143010.5892@tpp.orcam.me.uk/mbox/"},{"id":166705,"url":"https://patchwork.plctlab.org/api/1.2/patches/166705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182155320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:23","name":"[34/44] RISC-V: Provide FP conditional-branch instructions for if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182155320.5892@tpp.orcam.me.uk/mbox/"},{"id":166708,"url":"https://patchwork.plctlab.org/api/1.2/patches/166708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182249380.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:37","name":"[35/44] RISC-V: Avoid extraneous integer comparison for FP comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182249380.5892@tpp.orcam.me.uk/mbox/"},{"id":166710,"url":"https://patchwork.plctlab.org/api/1.2/patches/166710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182330230.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:48","name":"[36/44] RISC-V/testsuite: Add branched cases for generic FP cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182330230.5892@tpp.orcam.me.uk/mbox/"},{"id":166707,"url":"https://patchwork.plctlab.org/api/1.2/patches/166707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182335270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:00","name":"[37/44] RISC-V/testsuite: Add branchless cases for generic FP cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182335270.5892@tpp.orcam.me.uk/mbox/"},{"id":166709,"url":"https://patchwork.plctlab.org/api/1.2/patches/166709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182342520.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:09","name":"[38/44] RISC-V/testsuite: Add branched cases for generic FP cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182342520.5892@tpp.orcam.me.uk/mbox/"},{"id":166712,"url":"https://patchwork.plctlab.org/api/1.2/patches/166712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190132400.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:21","name":"[39/44] RISC-V/testsuite: Add branchless cases for generic FP cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190132400.5892@tpp.orcam.me.uk/mbox/"},{"id":166711,"url":"https://patchwork.plctlab.org/api/1.2/patches/166711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190143100.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:34","name":"[40/44] RISC-V: Handle FP NE operator via inversion in cond-operation expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190143100.5892@tpp.orcam.me.uk/mbox/"},{"id":166713,"url":"https://patchwork.plctlab.org/api/1.2/patches/166713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190156200.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:45","name":"[41/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190156200.5892@tpp.orcam.me.uk/mbox/"},{"id":166714,"url":"https://patchwork.plctlab.org/api/1.2/patches/166714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190204040.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:56","name":"[42/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190204040.5892@tpp.orcam.me.uk/mbox/"},{"id":166715,"url":"https://patchwork.plctlab.org/api/1.2/patches/166715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190216320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:44:07","name":"[43/44] RISC-V/testsuite: Add branched cases for FP NE cond-add operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190216320.5892@tpp.orcam.me.uk/mbox/"},{"id":166716,"url":"https://patchwork.plctlab.org/api/1.2/patches/166716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190221350.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:44:17","name":"[44/44] RISC-V/testsuite: Add branchless cases for FP NE cond-add operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190221350.5892@tpp.orcam.me.uk/mbox/"},{"id":166717,"url":"https://patchwork.plctlab.org/api/1.2/patches/166717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119070102.3053-2-xry111@xry111.site/","msgid":"<20231119070102.3053-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T07:01:03","name":"LoongArch: Optimize LSX vector shuffle on floating-point vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119070102.3053-2-xry111@xry111.site/mbox/"},{"id":166758,"url":"https://patchwork.plctlab.org/api/1.2/patches/166758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190609100.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T11:24:37","name":"RISC-V: Remove duplicate `order_operator'\'' predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190609100.5892@tpp.orcam.me.uk/mbox/"},{"id":166759,"url":"https://patchwork.plctlab.org/api/1.2/patches/166759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190446360.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T11:27:02","name":"testsuite: Fix subexpressions with `scan-assembler-times'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190446360.5892@tpp.orcam.me.uk/mbox/"},{"id":166786,"url":"https://patchwork.plctlab.org/api/1.2/patches/166786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119113331.265881-1-dmalcolm@redhat.com/","msgid":"<20231119113331.265881-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-19T11:33:31","name":"[pushed] libcpp: split decls out to rich-location.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119113331.265881-1-dmalcolm@redhat.com/mbox/"},{"id":166811,"url":"https://patchwork.plctlab.org/api/1.2/patches/166811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119140803.4168318-1-juzhe.zhong@rivai.ai/","msgid":"<20231119140803.4168318-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-19T14:08:03","name":"[Committed,V2] RISC-V: Optimize constant AVL for LRA pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119140803.4168318-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166816,"url":"https://patchwork.plctlab.org/api/1.2/patches/166816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-2-xry111@xry111.site/","msgid":"<20231119143037.16443-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:35","name":"[v2,1/3] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-2-xry111@xry111.site/mbox/"},{"id":166814,"url":"https://patchwork.plctlab.org/api/1.2/patches/166814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-3-xry111@xry111.site/","msgid":"<20231119143037.16443-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:36","name":"[v2,2/3] LoongArch: Use standard pattern name and RTX code for LSX/LASX muh instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-3-xry111@xry111.site/mbox/"},{"id":166815,"url":"https://patchwork.plctlab.org/api/1.2/patches/166815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-4-xry111@xry111.site/","msgid":"<20231119143037.16443-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:37","name":"[v2,3/3] LoongArch: Use standard pattern name and RTX code for LSX/LASX rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-4-xry111@xry111.site/mbox/"},{"id":166889,"url":"https://patchwork.plctlab.org/api/1.2/patches/166889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com/","msgid":"<289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com>","list_archive_url":null,"date":"2023-11-19T21:19:50","name":"[committed] RISC-V: Infrastructure for instruction fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com/mbox/"},{"id":166906,"url":"https://patchwork.plctlab.org/api/1.2/patches/166906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVqD4QG/X2nj6GrP@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-19T21:53:37","name":"libstdc++: Speed up push_back","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVqD4QG/X2nj6GrP@kam.mff.cuni.cz/mbox/"},{"id":166910,"url":"https://patchwork.plctlab.org/api/1.2/patches/166910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-2-xry111@xry111.site/","msgid":"<20231120004728.205167-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:24","name":"[v3,1/5] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-2-xry111@xry111.site/mbox/"},{"id":166911,"url":"https://patchwork.plctlab.org/api/1.2/patches/166911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-3-xry111@xry111.site/","msgid":"<20231120004728.205167-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:25","name":"[v3,2/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX muh instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-3-xry111@xry111.site/mbox/"},{"id":166912,"url":"https://patchwork.plctlab.org/api/1.2/patches/166912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-4-xry111@xry111.site/","msgid":"<20231120004728.205167-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:26","name":"[v3,3/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-4-xry111@xry111.site/mbox/"},{"id":166913,"url":"https://patchwork.plctlab.org/api/1.2/patches/166913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-5-xry111@xry111.site/","msgid":"<20231120004728.205167-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:27","name":"[v3,4/5] LoongArch: Remove lrint_allow_inexact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-5-xry111@xry111.site/mbox/"},{"id":166914,"url":"https://patchwork.plctlab.org/api/1.2/patches/166914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-6-xry111@xry111.site/","msgid":"<20231120004728.205167-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:28","name":"[v3,5/5] LoongArch: Use LSX for scalar FP rounding with explicit rounding mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-6-xry111@xry111.site/mbox/"},{"id":166915,"url":"https://patchwork.plctlab.org/api/1.2/patches/166915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com/","msgid":"<6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com>","list_archive_url":null,"date":"2023-11-20T00:47:56","name":"[RFA] New pass for sign/zero extension elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com/mbox/"},{"id":166923,"url":"https://patchwork.plctlab.org/api/1.2/patches/166923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025356.2937834-1-jason@redhat.com/","msgid":"<20231120025356.2937834-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:53:56","name":"[pushed] c++: add DECL_IMPLICIT_TEMPLATE_PARM_P macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025356.2937834-1-jason@redhat.com/mbox/"},{"id":166924,"url":"https://patchwork.plctlab.org/api/1.2/patches/166924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025415.2938041-1-jason@redhat.com/","msgid":"<20231120025415.2938041-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:54:15","name":"[pushed] c++: compare one level of template parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025415.2938041-1-jason@redhat.com/mbox/"},{"id":166925,"url":"https://patchwork.plctlab.org/api/1.2/patches/166925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025517.1678251-1-hongtao.liu@intel.com/","msgid":"<20231120025517.1678251-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-20T02:55:17","name":"[x86] Support reduc_{and, ior, xor}_scal_m for V4HI/V8QI/V4QImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025517.1678251-1-hongtao.liu@intel.com/mbox/"},{"id":166935,"url":"https://patchwork.plctlab.org/api/1.2/patches/166935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025547.2938444-1-jason@redhat.com/","msgid":"<20231120025547.2938444-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:55:47","name":"[RFC] c++: mangle function template constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025547.2938444-1-jason@redhat.com/mbox/"},{"id":166936,"url":"https://patchwork.plctlab.org/api/1.2/patches/166936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120041211.3957366-1-juzhe.zhong@rivai.ai/","msgid":"<20231120041211.3957366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T04:12:11","name":"[BUG,FIX] RISC-V: Fix VLS DI mode of slide1 instruction attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120041211.3957366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166943,"url":"https://patchwork.plctlab.org/api/1.2/patches/166943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfJWSMWzTwLWDu@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:23:01","name":"[1/4] Add vector pair modes to PowerPC (patch attached)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfJWSMWzTwLWDu@cowardly-lion.the-meissners.org/mbox/"},{"id":166944,"url":"https://patchwork.plctlab.org/api/1.2/patches/166944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfXZj3iaioq8FP@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:23:57","name":"[2/4] Vector pair floating point support for PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfXZj3iaioq8FP@cowardly-lion.the-meissners.org/mbox/"},{"id":166945,"url":"https://patchwork.plctlab.org/api/1.2/patches/166945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrf21be5Lm4hvRF@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:26:03","name":"[3/4] Add integer vector pair mode support to PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrf21be5Lm4hvRF@cowardly-lion.the-meissners.org/mbox/"},{"id":166946,"url":"https://patchwork.plctlab.org/api/1.2/patches/166946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrgEJGzDEnnQiH5@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:26:56","name":"[4/4] Add vector pair tests to PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrgEJGzDEnnQiH5@cowardly-lion.the-meissners.org/mbox/"},{"id":166982,"url":"https://patchwork.plctlab.org/api/1.2/patches/166982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/944137EFF18E5234+2023112016463085631915@rivai.ai/","msgid":"<944137EFF18E5234+2023112016463085631915@rivai.ai>","list_archive_url":null,"date":"2023-11-20T08:46:31","name":"??????: Re: [PATCH] DOC/IFN/OPTAB: Add mask_len_strided_load/mask_len_strided_store DOC/OPTAB/IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/944137EFF18E5234+2023112016463085631915@rivai.ai/mbox/"},{"id":166986,"url":"https://patchwork.plctlab.org/api/1.2/patches/166986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5r8kdei.fsf@euler.schwinge.homeip.net/","msgid":"<87a5r8kdei.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-20T09:00:21","name":"GCC developer room at FOSDEM 2024: Call for Participation open","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5r8kdei.fsf@euler.schwinge.homeip.net/mbox/"},{"id":167015,"url":"https://patchwork.plctlab.org/api/1.2/patches/167015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com/","msgid":"<6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:55:49","name":"[v3,01/11] aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167016,"url":"https://patchwork.plctlab.org/api/1.2/patches/167016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcab4866c14b323b00d92348ddb975d79f713ef9.1700473918.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-20T09:55:54","name":"[v3,02/11] aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcab4866c14b323b00d92348ddb975d79f713ef9.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167019,"url":"https://patchwork.plctlab.org/api/1.2/patches/167019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2be3b364f48b17c37fe882e45c0569cd73c481e.1700473918.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-20T09:55:59","name":"[v3,03/11] gm2: Add missing declaration of m2pim_M2RTS_Terminate to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2be3b364f48b17c37fe882e45c0569cd73c481e.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167021,"url":"https://patchwork.plctlab.org/api/1.2/patches/167021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com/","msgid":"<39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:03","name":"[v3,04/11] Add tests for validating future C permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167022,"url":"https://patchwork.plctlab.org/api/1.2/patches/167022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com/","msgid":"<145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:09","name":"[v3,05/11] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167020,"url":"https://patchwork.plctlab.org/api/1.2/patches/167020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com/","msgid":"<7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:26","name":"[v3,08/11] c: Do not ignore some forms of -Wimplicit-int in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167023,"url":"https://patchwork.plctlab.org/api/1.2/patches/167023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com/","msgid":"<2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:30","name":"[v3,09/11] c: Turn -Wreturn-mismatch into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167025,"url":"https://patchwork.plctlab.org/api/1.2/patches/167025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com/","msgid":"<9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:36","name":"[v3,10/11] c: Turn -Wincompatible-pointer-types into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167024,"url":"https://patchwork.plctlab.org/api/1.2/patches/167024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com/","msgid":"<700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:42","name":"[v3,11/11] c: Add new -Wdeclaration-missing-parameter-type permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167031,"url":"https://patchwork.plctlab.org/api/1.2/patches/167031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120104158.4141376-1-juzhe.zhong@rivai.ai/","msgid":"<20231120104158.4141376-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T10:41:58","name":"RISC-V Regression: Remove scalable compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120104158.4141376-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167032,"url":"https://patchwork.plctlab.org/api/1.2/patches/167032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com/","msgid":"<545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com>","list_archive_url":null,"date":"2023-11-20T10:42:02","name":"OpenMP: Add uses_allocators support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com/mbox/"},{"id":167095,"url":"https://patchwork.plctlab.org/api/1.2/patches/167095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120120649.672893-2-maxim.kuvyrkov@linaro.org/","msgid":"<20231120120649.672893-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-20T12:06:49","name":"[1/1] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120120649.672893-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":167114,"url":"https://patchwork.plctlab.org/api/1.2/patches/167114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131114.2801087-1-juzhe.zhong@rivai.ai/","msgid":"<20231120131114.2801087-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T13:11:14","name":"[BUG,FIX] RISC-V: Fix intermediate mode on slide1 instruction for SEW64 on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131114.2801087-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167190,"url":"https://patchwork.plctlab.org/api/1.2/patches/167190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131237.1825680-1-jwakely@redhat.com/","msgid":"<20231120131237.1825680-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-20T13:12:29","name":"[wwwdocs] Add new libstdc++ features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131237.1825680-1-jwakely@redhat.com/mbox/"},{"id":167256,"url":"https://patchwork.plctlab.org/api/1.2/patches/167256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131726.52280-1-ishitatsuyuki@gmail.com/","msgid":"<20231120131726.52280-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-11-20T13:17:26","name":"[v3] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131726.52280-1-ishitatsuyuki@gmail.com/mbox/"},{"id":167129,"url":"https://patchwork.plctlab.org/api/1.2/patches/167129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120132659.3577496-1-ben.boeckel@kitware.com/","msgid":"<20231120132659.3577496-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T13:26:59","name":"[1/1] gcc-14: document P1689R5 scanning output support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120132659.3577496-1-ben.boeckel@kitware.com/mbox/"},{"id":167147,"url":"https://patchwork.plctlab.org/api/1.2/patches/167147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140023.591B83891C17@sourceware.org/","msgid":"<20231120140023.591B83891C17@sourceware.org>","list_archive_url":null,"date":"2023-11-20T13:59:56","name":"tree-optimization/112618 - unused .MASK_CALL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140023.591B83891C17@sourceware.org/mbox/"},{"id":167148,"url":"https://patchwork.plctlab.org/api/1.2/patches/167148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140036.CEB293882060@sourceware.org/","msgid":"<20231120140036.CEB293882060@sourceware.org>","list_archive_url":null,"date":"2023-11-20T14:00:09","name":"tree-optimization/112281 - loop distribution and zero dependence distances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140036.CEB293882060@sourceware.org/mbox/"},{"id":167149,"url":"https://patchwork.plctlab.org/api/1.2/patches/167149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140107.821F83890433@sourceware.org/","msgid":"<20231120140107.821F83890433@sourceware.org>","list_archive_url":null,"date":"2023-11-20T14:00:25","name":"middle-end/112622 - convert and vector-to-float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140107.821F83890433@sourceware.org/mbox/"},{"id":167207,"url":"https://patchwork.plctlab.org/api/1.2/patches/167207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120144854.676590-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231120144854.676590-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-20T14:48:54","name":"[v2] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120144854.676590-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":167254,"url":"https://patchwork.plctlab.org/api/1.2/patches/167254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162225.3620105-1-ben.boeckel@kitware.com/","msgid":"<20231120162225.3620105-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T16:22:25","name":"[1/1] email: fix bug and patch email addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162225.3620105-1-ben.boeckel@kitware.com/mbox/"},{"id":167255,"url":"https://patchwork.plctlab.org/api/1.2/patches/167255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162256.3620350-1-ben.boeckel@kitware.com/","msgid":"<20231120162256.3620350-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T16:22:56","name":"[1/1] gcc-14: document P1689R5 scanning output support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162256.3620350-1-ben.boeckel@kitware.com/mbox/"},{"id":167370,"url":"https://patchwork.plctlab.org/api/1.2/patches/167370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120191447.2189928-1-jiawei@iscas.ac.cn/","msgid":"<20231120191447.2189928-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-20T19:14:47","name":"[RFC] RISC-V: Support RISC-V Profiles in -march option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120191447.2189928-1-jiawei@iscas.ac.cn/mbox/"},{"id":167473,"url":"https://patchwork.plctlab.org/api/1.2/patches/167473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121021837.1558057-1-juzhe.zhong@rivai.ai/","msgid":"<20231121021837.1558057-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T02:18:37","name":"[Committed] RISC-V: Fix reduc_run-9.c test value check bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121021837.1558057-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167485,"url":"https://patchwork.plctlab.org/api/1.2/patches/167485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1fe7bb89af19e0cb17386057431ffa4e908b8ff.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-11-21T03:09:58","name":"Pushed: LoongArch: Fix libgcc build failure when libc is not available (was Re: genopts: Add infrastructure to generate code for new features in ISA evolution)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1fe7bb89af19e0cb17386057431ffa4e908b8ff.camel@xry111.site/mbox/"},{"id":167491,"url":"https://patchwork.plctlab.org/api/1.2/patches/167491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-1-ben.boeckel@kitware.com/","msgid":"<20231121043959.3683025-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-21T04:39:58","name":"[1/1] email: fix bug and patch email addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-1-ben.boeckel@kitware.com/mbox/"},{"id":167492,"url":"https://patchwork.plctlab.org/api/1.2/patches/167492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-2-ben.boeckel@kitware.com/","msgid":"<20231121043959.3683025-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-21T04:39:59","name":"[2/2] bugzilla: remove `gcc-bugs@` mailing list address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-2-ben.boeckel@kitware.com/mbox/"},{"id":167519,"url":"https://patchwork.plctlab.org/api/1.2/patches/167519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121072042.A6D4E3858C2F@sourceware.org/","msgid":"<20231121072042.A6D4E3858C2F@sourceware.org>","list_archive_url":null,"date":"2023-11-21T07:20:16","name":"tree-optimization/111970 - fix issue with SLP of emulated gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121072042.A6D4E3858C2F@sourceware.org/mbox/"},{"id":167527,"url":"https://patchwork.plctlab.org/api/1.2/patches/167527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121074133.359B43858C2B@sourceware.org/","msgid":"<20231121074133.359B43858C2B@sourceware.org>","list_archive_url":null,"date":"2023-11-21T07:41:07","name":"middle-end/112622 - adjust arm testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121074133.359B43858C2B@sourceware.org/mbox/"},{"id":167534,"url":"https://patchwork.plctlab.org/api/1.2/patches/167534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxnFzQjWHKc90u9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T08:15:21","name":"builtins: Fix fold_builtin_query clzg/ctzg side-effects handling [PR112639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxnFzQjWHKc90u9@tucnak/mbox/"},{"id":167552,"url":"https://patchwork.plctlab.org/api/1.2/patches/167552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com/","msgid":"<033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com>","list_archive_url":null,"date":"2023-11-21T08:30:17","name":"rtl-optimization: Modify loop live data with livein of loop header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com/mbox/"},{"id":167558,"url":"https://patchwork.plctlab.org/api/1.2/patches/167558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxuwE3jA7cIIf71@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T08:48:00","name":"testsuite: Fix up pr111309-2.c on arm [PR111309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxuwE3jA7cIIf71@tucnak/mbox/"},{"id":167610,"url":"https://patchwork.plctlab.org/api/1.2/patches/167610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121100209.315304-1-juzhe.zhong@rivai.ai/","msgid":"<20231121100209.315304-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T10:02:09","name":"[BUG,FIX] RISC-V: Disallow COSNT_VECTOR for DI on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121100209.315304-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167633,"url":"https://patchwork.plctlab.org/api/1.2/patches/167633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121102958.53303-1-sebastian.huber@embedded-brains.de/","msgid":"<20231121102958.53303-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-21T10:29:58","name":"[v2] gcov: Fix integer types in gen_counter_update()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121102958.53303-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":167661,"url":"https://patchwork.plctlab.org/api/1.2/patches/167661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89v5pnp.fsf@euler.schwinge.homeip.net/","msgid":"<87v89v5pnp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-21T11:09:14","name":"Fix '\''gcc.dg/tree-ssa/return-value-range-1.c'\'' (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89v5pnp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":167742,"url":"https://patchwork.plctlab.org/api/1.2/patches/167742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121125642.2665901-1-juzhe.zhong@rivai.ai/","msgid":"<20231121125642.2665901-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T12:56:42","name":"[Committed] RISC-V: Add missing dump check of pr112438.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121125642.2665901-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167745,"url":"https://patchwork.plctlab.org/api/1.2/patches/167745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dWYu-AKeY4Tx7EvAMCbTpi8vcvr8Xl_o3ZRez4jYtClI9TD5vOf8Qk41sEh6gBbyjlvCOQHPI1woLPVnHY9g9JJu8FRm6eqUtE2L0hsNc=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-21T13:04:35","name":"[v5,1/1] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dWYu-AKeY4Tx7EvAMCbTpi8vcvr8Xl_o3ZRez4jYtClI9TD5vOf8Qk41sEh6gBbyjlvCOQHPI1woLPVnHY9g9JJu8FRm6eqUtE2L0hsNc=@protonmail.com/mbox/"},{"id":167746,"url":"https://patchwork.plctlab.org/api/1.2/patches/167746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121133224.105698-1-ibuclaw@gdcproject.org/","msgid":"<20231121133224.105698-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-21T13:32:24","name":"[committed] d: Merge upstream dmd 65a3da148c, phobos fc06c514a.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121133224.105698-1-ibuclaw@gdcproject.org/mbox/"},{"id":167777,"url":"https://patchwork.plctlab.org/api/1.2/patches/167777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121140827.109435-1-ibuclaw@gdcproject.org/","msgid":"<20231121140827.109435-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-21T14:08:27","name":"[committed] d: Merge upstream dmd ff57fec515, druntime ff57fec515, phobos 17bafda79.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121140827.109435-1-ibuclaw@gdcproject.org/mbox/"},{"id":167794,"url":"https://patchwork.plctlab.org/api/1.2/patches/167794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143505.AA1DA3858401@sourceware.org/","msgid":"<20231121143505.AA1DA3858401@sourceware.org>","list_archive_url":null,"date":"2023-11-21T14:34:36","name":"Move VF based dependence check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143505.AA1DA3858401@sourceware.org/mbox/"},{"id":167795,"url":"https://patchwork.plctlab.org/api/1.2/patches/167795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143529.5B1003858C30@sourceware.org/","msgid":"<20231121143529.5B1003858C30@sourceware.org>","list_archive_url":null,"date":"2023-11-21T14:35:02","name":"tree-optimization/112623 - forwprop VEC_PACK_TRUNC generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143529.5B1003858C30@sourceware.org/mbox/"},{"id":167800,"url":"https://patchwork.plctlab.org/api/1.2/patches/167800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhfi2k2.fsf@oldenburg.str.redhat.com/","msgid":"<874jhfi2k2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-21T14:49:49","name":"gcc.misc-tests/linkage-y.c: Compatibility with C99+ system compilers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhfi2k2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":167815,"url":"https://patchwork.plctlab.org/api/1.2/patches/167815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160633.2174974-1-rearnsha@arm.com/","msgid":"<20231121160633.2174974-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-21T16:06:33","name":"arm: libgcc: provide implementations of __sync_synchronize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160633.2174974-1-rearnsha@arm.com/mbox/"},{"id":167858,"url":"https://patchwork.plctlab.org/api/1.2/patches/167858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160845.2030365-1-jwakely@redhat.com/","msgid":"<20231121160845.2030365-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:08:14","name":"[committed] libstdc++: Fix std::tr2::dynamic_bitset support for alternate characters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160845.2030365-1-jwakely@redhat.com/mbox/"},{"id":167859,"url":"https://patchwork.plctlab.org/api/1.2/patches/167859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161026.2031101-1-jwakely@redhat.com/","msgid":"<20231121161026.2031101-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:10:17","name":"[committed] libstdc++: Add std::span::at for C++26 (P2821R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161026.2031101-1-jwakely@redhat.com/mbox/"},{"id":167860,"url":"https://patchwork.plctlab.org/api/1.2/patches/167860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161105.2031146-1-jwakely@redhat.com/","msgid":"<20231121161105.2031146-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:10:27","name":"[committed] libstdc++: Add freestanding feature test macros (P2407R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161105.2031146-1-jwakely@redhat.com/mbox/"},{"id":167856,"url":"https://patchwork.plctlab.org/api/1.2/patches/167856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161136.2031190-1-jwakely@redhat.com/","msgid":"<20231121161136.2031190-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:11:07","name":"[committed] libstdc++: Do not declare strtok for C++26 freestanding (P2937R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161136.2031190-1-jwakely@redhat.com/mbox/"},{"id":167855,"url":"https://patchwork.plctlab.org/api/1.2/patches/167855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzZptbmO3+I4mZt@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-21T16:24:06","name":"libstdc++: Turn memmove to memcpy in vector reallocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzZptbmO3+I4mZt@kam.mff.cuni.cz/mbox/"},{"id":167849,"url":"https://patchwork.plctlab.org/api/1.2/patches/167849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzmDvmAqHI4SulJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T17:17:02","name":"c++, v3: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzmDvmAqHI4SulJ@tucnak/mbox/"},{"id":167863,"url":"https://patchwork.plctlab.org/api/1.2/patches/167863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180054.3949602-1-manolis.tsamis@vrull.eu/","msgid":"<20231121180054.3949602-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-11-21T18:00:54","name":"[v2] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180054.3949602-1-manolis.tsamis@vrull.eu/mbox/"},{"id":167867,"url":"https://patchwork.plctlab.org/api/1.2/patches/167867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180434.3991921-1-manolis.tsamis@vrull.eu/","msgid":"<20231121180434.3991921-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-11-21T18:04:34","name":"[v2] ifcvt: Remove obsolete code for subreg handling in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180434.3991921-1-manolis.tsamis@vrull.eu/mbox/"},{"id":167920,"url":"https://patchwork.plctlab.org/api/1.2/patches/167920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV0NjIfSpsMuqr7+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T20:05:32","name":"[committed] sanitizer: Fix build on SPARC/Solaris with Solaris as [PR112562]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV0NjIfSpsMuqr7+@tucnak/mbox/"},{"id":167957,"url":"https://patchwork.plctlab.org/api/1.2/patches/167957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kiu7f3.fsf@euler.schwinge.homeip.net/","msgid":"<87r0kiu7f3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-21T21:24:00","name":"Fix '\''gcc.dg/tree-ssa/return-value-range-1.c'\'' for '\''char'\'' defaulting to '\''unsigned'\'' (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kiu7f3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":168007,"url":"https://patchwork.plctlab.org/api/1.2/patches/168007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-2-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:14","name":"[1/5] libdiagnostics v2: header and examples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-2-dmalcolm@redhat.com/mbox/"},{"id":168005,"url":"https://patchwork.plctlab.org/api/1.2/patches/168005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-6-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:18","name":"[5/5] diagnostics: don'\''t print annotation lines when there'\''s no column info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-6-dmalcolm@redhat.com/mbox/"},{"id":168010,"url":"https://patchwork.plctlab.org/api/1.2/patches/168010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-7-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:19","name":"binutils: v2: experimental use of libdiagnostics in gas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-7-dmalcolm@redhat.com/mbox/"},{"id":168035,"url":"https://patchwork.plctlab.org/api/1.2/patches/168035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121232704.12336-3-palmer@rivosinc.com/","msgid":"<20231121232704.12336-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-11-21T23:27:05","name":"[1/2] testsuite/unroll-8: Avoid triggering undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121232704.12336-3-palmer@rivosinc.com/mbox/"},{"id":168058,"url":"https://patchwork.plctlab.org/api/1.2/patches/168058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311220044380.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-22T01:40:48","name":"ARM/testsuite: Use non-capturing parentheses with pr53447-5.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311220044380.5892@tpp.orcam.me.uk/mbox/"},{"id":168062,"url":"https://patchwork.plctlab.org/api/1.2/patches/168062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122020423.4699F20424@pchp3.se.axis.com/","msgid":"<20231122020423.4699F20424@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-22T02:04:23","name":"testsuite: Tweak xfail bogus g++.dg/warn/Wstringop-overflow-4.C:144, PR106120","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122020423.4699F20424@pchp3.se.axis.com/mbox/"},{"id":168076,"url":"https://patchwork.plctlab.org/api/1.2/patches/168076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031652.3403525-1-quic_apinski@quicinc.com/","msgid":"<20231122031652.3403525-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-22T03:16:52","name":"Fix gcc.target/aarch64/movk.c testcase after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031652.3403525-1-quic_apinski@quicinc.com/mbox/"},{"id":168077,"url":"https://patchwork.plctlab.org/api/1.2/patches/168077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031756.3403606-1-quic_apinski@quicinc.com/","msgid":"<20231122031756.3403606-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-22T03:17:56","name":"Fix gcc.target/aarch64/movk.c testcase after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031756.3403606-1-quic_apinski@quicinc.com/mbox/"},{"id":168082,"url":"https://patchwork.plctlab.org/api/1.2/patches/168082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033108.3654950-1-hongyu.wang@intel.com/","msgid":"<20231122033108.3654950-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-22T03:31:08","name":"[APX,PUSH2POP2] Adjust operand order for PUSH2POP2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033108.3654950-1-hongyu.wang@intel.com/mbox/"},{"id":168090,"url":"https://patchwork.plctlab.org/api/1.2/patches/168090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033729.3335056-1-jason@redhat.com/","msgid":"<20231122033729.3335056-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T03:37:29","name":"[pushed] c++: start_preparsed_function tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033729.3335056-1-jason@redhat.com/mbox/"},{"id":168095,"url":"https://patchwork.plctlab.org/api/1.2/patches/168095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122041548.3655374-1-hongtao.liu@intel.com/","msgid":"<20231122041548.3655374-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-22T04:15:48","name":"Set AVOID_256FMA_CHAINS TO m_GENERIC as it'\''s generally good to new platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122041548.3655374-1-hongtao.liu@intel.com/mbox/"},{"id":168108,"url":"https://patchwork.plctlab.org/api/1.2/patches/168108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122061201.3690516-1-juzhe.zhong@rivai.ai/","msgid":"<20231122061201.3690516-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-22T06:12:01","name":"RISC-V: Fix permutation indice mode bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122061201.3690516-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168262,"url":"https://patchwork.plctlab.org/api/1.2/patches/168262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122095455.2215921-1-christophe.lyon@linaro.org/","msgid":"<20231122095455.2215921-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-22T09:54:55","name":"arm: [MVE intrinsics] Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122095455.2215921-1-christophe.lyon@linaro.org/mbox/"},{"id":168268,"url":"https://patchwork.plctlab.org/api/1.2/patches/168268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3RVUdjeIKL0c6x@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:00:53","name":"c++, v4: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3RVUdjeIKL0c6x@tucnak/mbox/"},{"id":168292,"url":"https://patchwork.plctlab.org/api/1.2/patches/168292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3YF+HaB1/Zj9N6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:29:43","name":"tree: Fix up try_catch_may_fallthru [PR112619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3YF+HaB1/Zj9N6@tucnak/mbox/"},{"id":168295,"url":"https://patchwork.plctlab.org/api/1.2/patches/168295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3ZKmCC+HrLTXwP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:34:18","name":"[committed] testsuite: Add testcase for already fixed PR112518","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3ZKmCC+HrLTXwP@tucnak/mbox/"},{"id":168303,"url":"https://patchwork.plctlab.org/api/1.2/patches/168303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122105322.1478693-1-juzhe.zhong@rivai.ai/","msgid":"<20231122105322.1478693-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-22T10:53:22","name":"RISC-V: Fix incorrect use of vcompress in permutation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122105322.1478693-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168311,"url":"https://patchwork.plctlab.org/api/1.2/patches/168311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-2-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:08","name":"[v3,1/8] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168314,"url":"https://patchwork.plctlab.org/api/1.2/patches/168314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-3-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-3-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:09","name":"[v3,2/8] Unify implementations of print_hard_reg_set()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-3-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168315,"url":"https://patchwork.plctlab.org/api/1.2/patches/168315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-4-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-4-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:10","name":"[v3,3/8] Simplify handling of INSN_ and EXPR_LISTs in sched-rgn.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-4-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168316,"url":"https://patchwork.plctlab.org/api/1.2/patches/168316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-5-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-5-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:11","name":"[v3,4/8] Improve and fix sched-deps.cc: dump_dep() and dump_lists().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-5-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168312,"url":"https://patchwork.plctlab.org/api/1.2/patches/168312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-6-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-6-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:12","name":"[v3,5/8] Add a bit more logging scheduler'\''s dependency analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-6-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168313,"url":"https://patchwork.plctlab.org/api/1.2/patches/168313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-7-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-7-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:13","name":"[v3,6/8] sched_deps.cc: Simplify initialization of dependency contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-7-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168317,"url":"https://patchwork.plctlab.org/api/1.2/patches/168317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-8-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-8-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:14","name":"[v3,7/8] Improve logging of register data in scheduler dependency analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-8-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168386,"url":"https://patchwork.plctlab.org/api/1.2/patches/168386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com/","msgid":"<7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com>","list_archive_url":null,"date":"2023-11-22T14:06:10","name":"[pushed,PR112610,IRA] : Fix using undefined dump file in IRA code during insn scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com/mbox/"},{"id":168396,"url":"https://patchwork.plctlab.org/api/1.2/patches/168396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f840b1c7-581e-4132-8c7c-bf60bf9e18b9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-22T14:27:55","name":"[committed] amdgcn: Fix vector TImode reload loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f840b1c7-581e-4132-8c7c-bf60bf9e18b9@codesourcery.com/mbox/"},{"id":168402,"url":"https://patchwork.plctlab.org/api/1.2/patches/168402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122143911.16620-1-jose.marchesi@oracle.com/","msgid":"<20231122143911.16620-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-22T14:39:11","name":"libgcc: mark __hardcfr_check_fail as always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122143911.16620-1-jose.marchesi@oracle.com/mbox/"},{"id":168403,"url":"https://patchwork.plctlab.org/api/1.2/patches/168403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122144041.C53983858C33@sourceware.org/","msgid":"<20231122144041.C53983858C33@sourceware.org>","list_archive_url":null,"date":"2023-11-22T14:40:16","name":"tree-optimization/112344 - wrong final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122144041.C53983858C33@sourceware.org/mbox/"},{"id":168409,"url":"https://patchwork.plctlab.org/api/1.2/patches/168409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311221501050.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-22T15:21:27","name":"AArch64/testsuite: Use non-capturing parentheses with ccmp_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311221501050.5892@tpp.orcam.me.uk/mbox/"},{"id":168486,"url":"https://patchwork.plctlab.org/api/1.2/patches/168486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leapu2sq.fsf@euler.schwinge.homeip.net/","msgid":"<87leapu2sq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-22T17:16:05","name":"Adjust '\''libgomp.c/declare-variant-{3,4}-[...]'\'' for inter-procedural value range propagation (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leapu2sq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":168491,"url":"https://patchwork.plctlab.org/api/1.2/patches/168491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122172657.542419-1-ppalka@redhat.com/","msgid":"<20231122172657.542419-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-22T17:26:57","name":"c++: alias template of non-template class [PR112633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122172657.542419-1-ppalka@redhat.com/mbox/"},{"id":168548,"url":"https://patchwork.plctlab.org/api/1.2/patches/168548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5ih3BNkEn-7As4@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-22T20:20:23","name":"[committed] hppa: Fix integer REG+D address reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5ih3BNkEn-7As4@mx3210.localdomain/mbox/"},{"id":168549,"url":"https://patchwork.plctlab.org/api/1.2/patches/168549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5j6Akii0sC2caT@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-22T20:26:16","name":"[committed] hppa: Define MAX_FIXED_MODE_SIZE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5j6Akii0sC2caT@mx3210.localdomain/mbox/"},{"id":168596,"url":"https://patchwork.plctlab.org/api/1.2/patches/168596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-1-jason@redhat.com/","msgid":"<20231122211235.3503229-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T21:12:34","name":"[1/2] c-family: -Waddress-of-packed-member and casts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-1-jason@redhat.com/mbox/"},{"id":168597,"url":"https://patchwork.plctlab.org/api/1.2/patches/168597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-2-jason@redhat.com/","msgid":"<20231122211235.3503229-2-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T21:12:35","name":"[2/2] c-family: rename warn_for_address_or_pointer_of_packed_member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-2-jason@redhat.com/mbox/"},{"id":168631,"url":"https://patchwork.plctlab.org/api/1.2/patches/168631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122220731.1121607-1-ppalka@redhat.com/","msgid":"<20231122220731.1121607-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-22T22:07:31","name":"c++: Implement P2582R1, CTAD from inherited constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122220731.1121607-1-ppalka@redhat.com/mbox/"},{"id":168661,"url":"https://patchwork.plctlab.org/api/1.2/patches/168661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232350.1C78333ECB@hamza.pair.com/","msgid":"<20231122232350.1C78333ECB@hamza.pair.com>","list_archive_url":null,"date":"2023-11-22T23:23:48","name":"[pushed] wwwdocs: branching: No longer refer to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232350.1C78333ECB@hamza.pair.com/mbox/"},{"id":168664,"url":"https://patchwork.plctlab.org/api/1.2/patches/168664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232520.39C4733E8D@hamza.pair.com/","msgid":"<20231122232520.39C4733E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-22T23:25:18","name":"[pushed] wwwdocs: releasing: No longer refer to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232520.39C4733E8D@hamza.pair.com/mbox/"},{"id":168671,"url":"https://patchwork.plctlab.org/api/1.2/patches/168671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123004751.7797533EC4@hamza.pair.com/","msgid":"<20231123004751.7797533EC4@hamza.pair.com>","list_archive_url":null,"date":"2023-11-23T00:47:49","name":"[pushed] wwwdocs: faq: Refer to gcc-testresults instead of buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123004751.7797533EC4@hamza.pair.com/mbox/"},{"id":168680,"url":"https://patchwork.plctlab.org/api/1.2/patches/168680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com/","msgid":"<447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com>","list_archive_url":null,"date":"2023-11-23T01:22:30","name":"[PATCHv2] Clean up by_pieces_ninsns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com/mbox/"},{"id":168709,"url":"https://patchwork.plctlab.org/api/1.2/patches/168709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030417.29993-1-guojie@loongson.cn/","msgid":"<20231123030417.29993-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-23T03:04:17","name":"[v2] LoongArch: Optimize the loading of immediate numbers with the same high and low 32-bit values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030417.29993-1-guojie@loongson.cn/mbox/"},{"id":168711,"url":"https://patchwork.plctlab.org/api/1.2/patches/168711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030556.31356-1-guojie@loongson.cn/","msgid":"<20231123030556.31356-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-23T03:05:56","name":"LoongArch: Fix runtime error in a gcc build with --with-build-config=bootstrap-ubsan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030556.31356-1-guojie@loongson.cn/mbox/"},{"id":168719,"url":"https://patchwork.plctlab.org/api/1.2/patches/168719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123054758.28829-1-wangfeng@eswincomputing.com/","msgid":"<20231123054758.28829-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-23T05:47:58","name":"gimple-vr-values:Add constraint for gimple-cond optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123054758.28829-1-wangfeng@eswincomputing.com/mbox/"},{"id":168720,"url":"https://patchwork.plctlab.org/api/1.2/patches/168720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123060949.618089-1-haochen.jiang@intel.com/","msgid":"<20231123060949.618089-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-23T06:09:49","name":"i386: Fix AVX512 and AVX10 option issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123060949.618089-1-haochen.jiang@intel.com/mbox/"},{"id":168768,"url":"https://patchwork.plctlab.org/api/1.2/patches/168768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123080116.2449B3858426@sourceware.org/","msgid":"<20231123080116.2449B3858426@sourceware.org>","list_archive_url":null,"date":"2023-11-23T08:00:49","name":"middle-end/32667 - document cpymem and memcpy exact overlap requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123080116.2449B3858426@sourceware.org/mbox/"},{"id":168825,"url":"https://patchwork.plctlab.org/api/1.2/patches/168825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8eh+8HZl/ejibp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T09:42:31","name":"lower-bitint: Fix up -fnon-call-exceptions bit-field load lowering [PR112668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8eh+8HZl/ejibp@tucnak/mbox/"},{"id":168840,"url":"https://patchwork.plctlab.org/api/1.2/patches/168840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8jppJSXdScNAjH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T10:04:22","name":"expr: Fix &bitint_var handling in initializers [PR112336]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8jppJSXdScNAjH@tucnak/mbox/"},{"id":168897,"url":"https://patchwork.plctlab.org/api/1.2/patches/168897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105527.2347252-1-jwakely@redhat.com/","msgid":"<20231123105527.2347252-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T10:54:56","name":"c++: Make g++.dg/opt/pr110879.C require C++11 [PR110879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105527.2347252-1-jwakely@redhat.com/mbox/"},{"id":168867,"url":"https://patchwork.plctlab.org/api/1.2/patches/168867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105503.3913200-1-juzhe.zhong@rivai.ai/","msgid":"<20231123105503.3913200-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T10:55:03","name":"[Committed] RISC-V: Refine some codes of riscv-v.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105503.3913200-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168873,"url":"https://patchwork.plctlab.org/api/1.2/patches/168873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123110409.3914102-1-juzhe.zhong@rivai.ai/","msgid":"<20231123110409.3914102-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T11:04:09","name":"RISC-V: Disable AVL propagation of vrgather instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123110409.3914102-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168888,"url":"https://patchwork.plctlab.org/api/1.2/patches/168888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmxC+Lk1Fk7o4iGhy0G=svOB3ZoYfAdf835-PUvc5rMZw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-23T11:36:24","name":"[aarch64] PR111702 - ICE in insert_regs after interleave+zip1 vector initialization patch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmxC+Lk1Fk7o4iGhy0G=svOB3ZoYfAdf835-PUvc5rMZw@mail.gmail.com/mbox/"},{"id":168898,"url":"https://patchwork.plctlab.org/api/1.2/patches/168898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123115952.1502588-1-juzhe.zhong@rivai.ai/","msgid":"<20231123115952.1502588-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T11:59:52","name":"[Committed,V2] RISC-V: Disable AVL propagation of vrgather instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123115952.1502588-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168902,"url":"https://patchwork.plctlab.org/api/1.2/patches/168902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123120735.1632594-1-juzhe.zhong@rivai.ai/","msgid":"<20231123120735.1632594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T12:07:35","name":"[Committed] RISC-V: Add wrapper for emit vec_extract[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123120735.1632594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168925,"url":"https://patchwork.plctlab.org/api/1.2/patches/168925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123125910.1889955-1-juzhe.zhong@rivai.ai/","msgid":"<20231123125910.1889955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T12:59:10","name":"RISC-V: Optimize a special case of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123125910.1889955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168948,"url":"https://patchwork.plctlab.org/api/1.2/patches/168948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123134751.25302-1-sebastian.huber@embedded-brains.de/","msgid":"<20231123134751.25302-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-23T13:47:51","name":"gcov: No atomic ops for -fprofile-update=single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123134751.25302-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":168952,"url":"https://patchwork.plctlab.org/api/1.2/patches/168952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV9aCyCiwKDkpvwy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T13:56:27","name":"lower-bitint, v3: Fix up -fnon-call-exceptions bit-field load lowering [PR112668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV9aCyCiwKDkpvwy@tucnak/mbox/"},{"id":168955,"url":"https://patchwork.plctlab.org/api/1.2/patches/168955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com/","msgid":"<43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com>","list_archive_url":null,"date":"2023-11-23T14:21:41","name":"OpenMP: Accept argument to depobj'\''s destroy clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com/mbox/"},{"id":168977,"url":"https://patchwork.plctlab.org/api/1.2/patches/168977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123151656.30332-1-jose.marchesi@oracle.com/","msgid":"<20231123151656.30332-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-23T15:16:56","name":"[V2] libgcc: mark __hardcfr_check_fail as always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123151656.30332-1-jose.marchesi@oracle.com/mbox/"},{"id":169011,"url":"https://patchwork.plctlab.org/api/1.2/patches/169011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123155627.2335026-1-christophe.lyon@linaro.org/","msgid":"<20231123155627.2335026-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-23T15:56:27","name":"arm: [MVE intrinsics] Add default clause to full_width_access::memory_vector_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123155627.2335026-1-christophe.lyon@linaro.org/mbox/"},{"id":169027,"url":"https://patchwork.plctlab.org/api/1.2/patches/169027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV+B5aYQheJ347xT@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-23T16:46:29","name":"[v5] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV+B5aYQheJ347xT@redhat.com/mbox/"},{"id":169054,"url":"https://patchwork.plctlab.org/api/1.2/patches/169054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170736.40CD020427@pchp3.se.axis.com/","msgid":"<20231123170736.40CD020427@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:07:36","name":"[1/3] contrib/regression/btest-gcc.sh: Handle multiple options.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170736.40CD020427@pchp3.se.axis.com/mbox/"},{"id":169056,"url":"https://patchwork.plctlab.org/api/1.2/patches/169056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170820.5BB4120432@pchp3.se.axis.com/","msgid":"<20231123170820.5BB4120432@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:08:20","name":"[2/3] contrib/regression/btest-gcc.sh: Simplify option handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170820.5BB4120432@pchp3.se.axis.com/mbox/"},{"id":169057,"url":"https://patchwork.plctlab.org/api/1.2/patches/169057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170926.D33BA20432@pchp3.se.axis.com/","msgid":"<20231123170926.D33BA20432@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:09:26","name":"[3/3] contrib/regression/btest-gcc.sh: Optionally handle XPASS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170926.D33BA20432@pchp3.se.axis.com/mbox/"},{"id":169088,"url":"https://patchwork.plctlab.org/api/1.2/patches/169088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123174450.2450203-1-jwakely@redhat.com/","msgid":"<20231123174450.2450203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T17:44:37","name":"[committed] libstdc++: Fix access error in __gnu_test::uneq_allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123174450.2450203-1-jwakely@redhat.com/mbox/"},{"id":169087,"url":"https://patchwork.plctlab.org/api/1.2/patches/169087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123175247.2451163-1-jwakely@redhat.com/","msgid":"<20231123175247.2451163-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T17:51:38","name":"[committed,v2] libstdc++: Define std::ranges::to for C++23 (P1206R7) [PR111055]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123175247.2451163-1-jwakely@redhat.com/mbox/"},{"id":169084,"url":"https://patchwork.plctlab.org/api/1.2/patches/169084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7b2e5fb-593d-45ac-999c-20811a75467d@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-11-23T18:09:51","name":"[avr,committed] Fix PR86776","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7b2e5fb-593d-45ac-999c-20811a75467d@gjlay.de/mbox/"},{"id":169089,"url":"https://patchwork.plctlab.org/api/1.2/patches/169089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-mtaDZJhqKnOgs@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T19:23:33","name":"[committed] hppa: Don'\''t skip check for warning at line 411 in Wattributes.c on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-mtaDZJhqKnOgs@mx3210.localdomain/mbox/"},{"id":169090,"url":"https://patchwork.plctlab.org/api/1.2/patches/169090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-noM-Cr2S9p5VU@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T19:27:28","name":"[committed] hppa: xfail scan-assembler-not check in g++.dg/cpp0x/initlist-const1.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-noM-Cr2S9p5VU@mx3210.localdomain/mbox/"},{"id":169120,"url":"https://patchwork.plctlab.org/api/1.2/patches/169120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-7qGTqufuUgo4P@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:52:56","name":"[committed] hppa: Export main in pr104869.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-7qGTqufuUgo4P@mx3210.localdomain/mbox/"},{"id":169121,"url":"https://patchwork.plctlab.org/api/1.2/patches/169121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-8ZH8myH1bUMhj@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:56:04","name":"[committed] hppa: Fix gcc.dg/analyzer/fd-4.c on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-8ZH8myH1bUMhj@mx3210.localdomain/mbox/"},{"id":169122,"url":"https://patchwork.plctlab.org/api/1.2/patches/169122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-9DtsY8vncIp5V@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:58:54","name":"[committed] hppa: Fix g++.dg/modules/bad-mapper-1.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-9DtsY8vncIp5V@mx3210.localdomain/mbox/"},{"id":169124,"url":"https://patchwork.plctlab.org/api/1.2/patches/169124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123213854.2B7D333E9E@hamza.pair.com/","msgid":"<20231123213854.2B7D333E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-11-23T21:38:51","name":"[pushed] wwwdocs: conduct: Use licensebuttons.net","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123213854.2B7D333E9E@hamza.pair.com/mbox/"},{"id":169132,"url":"https://patchwork.plctlab.org/api/1.2/patches/169132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123231800.3823357-1-juzhe.zhong@rivai.ai/","msgid":"<20231123231800.3823357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T23:18:00","name":"[V2] RISC-V: Optimize a special case of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123231800.3823357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169171,"url":"https://patchwork.plctlab.org/api/1.2/patches/169171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124050418.1547599-1-juzhe.zhong@rivai.ai/","msgid":"<20231124050418.1547599-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-24T05:04:18","name":"[Committed] RISC-V: Disable BSWAP optimization for NUNITS < 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124050418.1547599-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169173,"url":"https://patchwork.plctlab.org/api/1.2/patches/169173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124053241.64194-1-xry111@xry111.site/","msgid":"<20231124053241.64194-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-24T05:28:22","name":"Only allow (int)trunc(x) to (int)x simplification with -ffp-int-builtin-inexact [PR107723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124053241.64194-1-xry111@xry111.site/mbox/"},{"id":169220,"url":"https://patchwork.plctlab.org/api/1.2/patches/169220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124070128.0F706132E2@imap2.dmz-prg2.suse.org/","msgid":"<20231124070128.0F706132E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-11-24T07:01:27","name":"tree-optimization/112344 - relax final value-replacement fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124070128.0F706132E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":169275,"url":"https://patchwork.plctlab.org/api/1.2/patches/169275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBbkuhQ8TzBgrhU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:15:14","name":"lower-bitint: Lower FLOAT_EXPR from BITINT_TYPE INTEGER_CST [PR112679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBbkuhQ8TzBgrhU@tucnak/mbox/"},{"id":169276,"url":"https://patchwork.plctlab.org/api/1.2/patches/169276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBdDpASQrBk+5+0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:21:34","name":"match.pd: Avoid simplification into invalid BIT_FIELD_REFs [PR112673]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBdDpASQrBk+5+0@tucnak/mbox/"},{"id":169278,"url":"https://patchwork.plctlab.org/api/1.2/patches/169278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBfOrpCVK8K1m34@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:30:50","name":"i386: Fix ICE during cbranchv16qi4 expansion [PR112681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBfOrpCVK8K1m34@tucnak/mbox/"},{"id":169279,"url":"https://patchwork.plctlab.org/api/1.2/patches/169279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124083428.3153486-1-juzhe.zhong@rivai.ai/","msgid":"<20231124083428.3153486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-24T08:34:28","name":"RISC-V: Fix inconsistency among all vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124083428.3153486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169280,"url":"https://patchwork.plctlab.org/api/1.2/patches/169280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBgF6OXcpQ8HMAM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:34:31","name":"c++, v3: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBgF6OXcpQ8HMAM@tucnak/mbox/"},{"id":169297,"url":"https://patchwork.plctlab.org/api/1.2/patches/169297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com/","msgid":"<2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com>","list_archive_url":null,"date":"2023-11-24T08:42:50","name":"[Binutils] AArch64: Enable Debug (FEAT_DEBUGv8p9) extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com/mbox/"},{"id":169378,"url":"https://patchwork.plctlab.org/api/1.2/patches/169378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7836aa028e374b3d127fcd4ab01655697db94be.1700821042.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T10:18:13","name":"[v1,1/1] RISC-V: Initial RV64E and LP64E support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7836aa028e374b3d127fcd4ab01655697db94be.1700821042.git.research_trasio@irq.a4lg.com/mbox/"},{"id":169379,"url":"https://patchwork.plctlab.org/api/1.2/patches/169379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org/","msgid":"<20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-11-24T10:25:32","name":"tree-optimization/112677 - stack corruption with .COND_* reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":169402,"url":"https://patchwork.plctlab.org/api/1.2/patches/169402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45565a8-53d6-49a8-a46a-7b885f4e6188@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T12:24:43","name":"[v3] OpenMP: Accept argument to depobj'\''s destroy clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45565a8-53d6-49a8-a46a-7b885f4e6188@codesourcery.com/mbox/"},{"id":169406,"url":"https://patchwork.plctlab.org/api/1.2/patches/169406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ens4hq.fsf@euler.schwinge.homeip.net/","msgid":"<87y1ens4hq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T12:46:57","name":"testsuite: Add '\''only_for_offload_target'\'' wrapper for '\''scan-offload-tree-dump'\'' etc. (was: drop -aux{dir,base}, revamp -dump{dir,base})","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ens4hq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169435,"url":"https://patchwork.plctlab.org/api/1.2/patches/169435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com/","msgid":"<958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T13:51:28","name":"OpenMP: Add -Wopenmp and use it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com/mbox/"},{"id":169452,"url":"https://patchwork.plctlab.org/api/1.2/patches/169452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89rryiv.fsf@euler.schwinge.homeip.net/","msgid":"<87v89rryiv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T14:55:52","name":"GCN: Tag '\''-march=[...]'\'', '\''-mtune=[...]'\'' as '\''Negative'\'' of themselves [PR112669] (was: [gcn][patch] Add -mgpu option and plumb in assembler/linker)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89rryiv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169459,"url":"https://patchwork.plctlab.org/api/1.2/patches/169459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf4vry1i.fsf@euler.schwinge.homeip.net/","msgid":"<87sf4vry1i.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T15:06:17","name":"GCN: Remove '\''last_arg'\'' spec function (was: GCN: Tag '\''-march=[...]'\'', '\''-mtune=[...]'\'' as '\''Negative'\'' of themselves [PR112669])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf4vry1i.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169484,"url":"https://patchwork.plctlab.org/api/1.2/patches/169484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDHDJ9ih0esQnlM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T15:53:48","name":"mips: Fix up mips*-sde-elf* build [PR112300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDHDJ9ih0esQnlM@tucnak/mbox/"},{"id":169486,"url":"https://patchwork.plctlab.org/api/1.2/patches/169486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be2d7503-cf71-47ea-9fb5-5f069e3cdd9c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T16:07:50","name":"[GCN] install.texi: Update GCN entry - @uref and LLVM version remark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be2d7503-cf71-47ea-9fb5-5f069e3cdd9c@codesourcery.com/mbox/"},{"id":169491,"url":"https://patchwork.plctlab.org/api/1.2/patches/169491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com/","msgid":"<9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T16:20:27","name":"[wwwdocs,GCN] gcc-14/changes.html: GCN - Mention improvements due to VGPR register use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com/mbox/"},{"id":169492,"url":"https://patchwork.plctlab.org/api/1.2/patches/169492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9847458-8898-4a5b-a461-659ea771fbec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T16:22:22","name":"[wwwdocs,OpenACC] gcc-14/changes.html: OpenACC - mention support for first 2.7 features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9847458-8898-4a5b-a461-659ea771fbec@codesourcery.com/mbox/"},{"id":169494,"url":"https://patchwork.plctlab.org/api/1.2/patches/169494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cm7jex5.fsf@oracle.com/","msgid":"<877cm7jex5.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-24T16:26:30","name":"bpf: Throw error when external libcalls are generated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cm7jex5.fsf@oracle.com/mbox/"},{"id":169495,"url":"https://patchwork.plctlab.org/api/1.2/patches/169495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com/","msgid":"<13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T16:26:44","name":"[wwwdocs,OpenMP] gcc-14/changes.html + projects/gomp/: OpenMP update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com/mbox/"},{"id":169519,"url":"https://patchwork.plctlab.org/api/1.2/patches/169519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com/","msgid":"<96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com>","list_archive_url":null,"date":"2023-11-24T16:53:04","name":"PR tree-optimization/111922 - Ensure wi_fold arguments match precisions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com/mbox/"},{"id":169532,"url":"https://patchwork.plctlab.org/api/1.2/patches/169532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDd6GTD5UUV50Ht@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-24T17:31:20","name":"[committed] hppa: Use INT14_OK_STRICT in a couple of places in pa_emit_move_sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDd6GTD5UUV50Ht@mx3210.localdomain/mbox/"},{"id":169535,"url":"https://patchwork.plctlab.org/api/1.2/patches/169535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDmZeOZWcb9K2N0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T18:07:33","name":"aarch64: Fix up aarch64_simd_stp [PR109977]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDmZeOZWcb9K2N0@tucnak/mbox/"},{"id":169536,"url":"https://patchwork.plctlab.org/api/1.2/patches/169536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124180922.1302655-1-ppalka@redhat.com/","msgid":"<20231124180922.1302655-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-24T18:09:22","name":"c++/modules: alias CTAD and specializations table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124180922.1302655-1-ppalka@redhat.com/mbox/"},{"id":169547,"url":"https://patchwork.plctlab.org/api/1.2/patches/169547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7574843-ce81-4fdd-abf9-186640112a69@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T18:56:21","name":"[committed] c-family/c.opt (-Wopenmp): Add missing tailing '\''.'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7574843-ce81-4fdd-abf9-186640112a69@codesourcery.com/mbox/"},{"id":169629,"url":"https://patchwork.plctlab.org/api/1.2/patches/169629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125031536.DA3EE2042A@pchp3.se.axis.com/","msgid":"<20231125031536.DA3EE2042A@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-25T03:15:36","name":"testsuite/gcc.dg/uninit-pred-9_b.c:20: Fix XPASS for various targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125031536.DA3EE2042A@pchp3.se.axis.com/mbox/"},{"id":169637,"url":"https://patchwork.plctlab.org/api/1.2/patches/169637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWGf3nsyohGl2pLd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-25T07:18:54","name":"i386: Fix up *jcc_bt*_mask{,_1} [PR111408]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWGf3nsyohGl2pLd@tucnak/mbox/"},{"id":169659,"url":"https://patchwork.plctlab.org/api/1.2/patches/169659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125082432.630165-1-juzhe.zhong@rivai.ai/","msgid":"<20231125082432.630165-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-25T08:24:32","name":"RISC-V: Remove incorrect function gate gather_scatter_valid_offset_mode_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125082432.630165-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169688,"url":"https://patchwork.plctlab.org/api/1.2/patches/169688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125094721.18913-1-jose.marchesi@oracle.com/","msgid":"<20231125094721.18913-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-25T09:47:21","name":"Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125094721.18913-1-jose.marchesi@oracle.com/mbox/"},{"id":169689,"url":"https://patchwork.plctlab.org/api/1.2/patches/169689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com/","msgid":"<3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com>","list_archive_url":null,"date":"2023-11-25T09:50:38","name":"[pushed] wwwdocs: readings: Update OpenPOWER link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com/mbox/"},{"id":169693,"url":"https://patchwork.plctlab.org/api/1.2/patches/169693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWHJzN4hJHFSZ28f@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-25T10:17:48","name":"rs6000: Canonicalize copysign (x, -1) back to -abs (x) in the backend [PR112606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWHJzN4hJHFSZ28f@tucnak/mbox/"},{"id":169700,"url":"https://patchwork.plctlab.org/api/1.2/patches/169700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125111907.5731533E8D@hamza.pair.com/","msgid":"<20231125111907.5731533E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T11:19:05","name":"[pushed] doc: Update ISO C++ reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125111907.5731533E8D@hamza.pair.com/mbox/"},{"id":169701,"url":"https://patchwork.plctlab.org/api/1.2/patches/169701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125112534.13312-1-sebastian.huber@embedded-brains.de/","msgid":"<20231125112534.13312-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-25T11:25:34","name":"Update GMP/MPFR/MPC/ISL/gettext to latest release","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125112534.13312-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":169714,"url":"https://patchwork.plctlab.org/api/1.2/patches/169714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125123348.19E1633EA0@hamza.pair.com/","msgid":"<20231125123348.19E1633EA0@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T12:33:46","name":"[pushed] doc: Remove obsolete notes on GCC 4.x on FreeBSD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125123348.19E1633EA0@hamza.pair.com/mbox/"},{"id":169731,"url":"https://patchwork.plctlab.org/api/1.2/patches/169731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125131103.A4C0833E8B@hamza.pair.com/","msgid":"<20231125131103.A4C0833E8B@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T13:11:02","name":"[pushed] doc: Complete and sort the list of front ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125131103.A4C0833E8B@hamza.pair.com/mbox/"},{"id":169747,"url":"https://patchwork.plctlab.org/api/1.2/patches/169747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144320.855A033EA0@hamza.pair.com/","msgid":"<20231125144320.855A033EA0@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T14:43:18","name":"[pushed] wwwdocs: gcc-13: Refer to GCC (instead of gcc)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144320.855A033EA0@hamza.pair.com/mbox/"},{"id":169748,"url":"https://patchwork.plctlab.org/api/1.2/patches/169748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144527.2699733E8D@hamza.pair.com/","msgid":"<20231125144527.2699733E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T14:45:25","name":"[pushed] wwwdocs: reading: Update the MicroBlaze section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144527.2699733E8D@hamza.pair.com/mbox/"},{"id":169814,"url":"https://patchwork.plctlab.org/api/1.2/patches/169814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126004616.2690148-1-juzhe.zhong@rivai.ai/","msgid":"<20231126004616.2690148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-26T00:46:16","name":"[Committed] RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126004616.2690148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169826,"url":"https://patchwork.plctlab.org/api/1.2/patches/169826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-1-quic_apinski@quicinc.com/","msgid":"<20231126025800.1381015-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T02:57:59","name":"[1/2] Fix contracts-tmpl-spec2.C on targets where plain char is unsigned by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-1-quic_apinski@quicinc.com/mbox/"},{"id":169827,"url":"https://patchwork.plctlab.org/api/1.2/patches/169827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-2-quic_apinski@quicinc.com/","msgid":"<20231126025800.1381015-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T02:58:00","name":"[2/2] Fix gcc.target/aarch64/simd/vmulxd_{f64, f32}_2.c after after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-2-quic_apinski@quicinc.com/mbox/"},{"id":169829,"url":"https://patchwork.plctlab.org/api/1.2/patches/169829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126043003.1412233-1-quic_apinski@quicinc.com/","msgid":"<20231126043003.1412233-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T04:30:03","name":"[COMMITTED] Fix gcc.dg/vla-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126043003.1412233-1-quic_apinski@quicinc.com/mbox/"},{"id":169845,"url":"https://patchwork.plctlab.org/api/1.2/patches/169845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126091355.2309349-1-juzhe.zhong@rivai.ai/","msgid":"<20231126091355.2309349-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-26T09:13:55","name":"[Committed] RISC-V: Disable AVL propagation of slidedown instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126091355.2309349-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169889,"url":"https://patchwork.plctlab.org/api/1.2/patches/169889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN0hSsiN29KT7J4@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:38:29","name":"[committed] hppa: Really fix g++.dg/modules/bad-mapper-1.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN0hSsiN29KT7J4@mx3210.localdomain/mbox/"},{"id":169890,"url":"https://patchwork.plctlab.org/api/1.2/patches/169890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126163858.9328-1-amonakov@ispras.ru/","msgid":"<20231126163858.9328-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-11-26T16:38:58","name":"[committed] sort.cc: fix mentions of sorting networks in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126163858.9328-1-amonakov@ispras.ru/mbox/"},{"id":169891,"url":"https://patchwork.plctlab.org/api/1.2/patches/169891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN1Oz2R-p6TXRsf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:41:31","name":"[committed] hppa: Fix pr104869.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN1Oz2R-p6TXRsf@mx3210.localdomain/mbox/"},{"id":169892,"url":"https://patchwork.plctlab.org/api/1.2/patches/169892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2NbuWyWNxe4ce@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:45:41","name":"[committed] Skip analyzer socket tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2NbuWyWNxe4ce@mx3210.localdomain/mbox/"},{"id":169893,"url":"https://patchwork.plctlab.org/api/1.2/patches/169893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2twQpxjbt_yhY@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:47:51","name":"[committed] Skip analyzer strndup test on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2twQpxjbt_yhY@mx3210.localdomain/mbox/"},{"id":169916,"url":"https://patchwork.plctlab.org/api/1.2/patches/169916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126233154.3D67420425@pchp3.se.axis.com/","msgid":"<20231126233154.3D67420425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-26T23:31:54","name":"[Committed] testsuite/gcc.dg/uninit-pred-9_b.c:23: Un-xfail for MMIX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126233154.3D67420425@pchp3.se.axis.com/mbox/"},{"id":169967,"url":"https://patchwork.plctlab.org/api/1.2/patches/169967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127043333.1955900-1-quic_apinski@quicinc.com/","msgid":"<20231127043333.1955900-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T04:33:33","name":"aarch64: Improve cost of `a ? {-,}1 : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127043333.1955900-1-quic_apinski@quicinc.com/mbox/"},{"id":169968,"url":"https://patchwork.plctlab.org/api/1.2/patches/169968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com/","msgid":"<56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T04:40:11","name":"[PING^2,V15,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com/mbox/"},{"id":169969,"url":"https://patchwork.plctlab.org/api/1.2/patches/169969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8cc83-b615-43ed-929a-8b6c35842cc3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T04:43:31","name":"[PING,^2,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8cc83-b615-43ed-929a-8b6c35842cc3@linux.ibm.com/mbox/"},{"id":170005,"url":"https://patchwork.plctlab.org/api/1.2/patches/170005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127062618.21624-1-jose.marchesi@oracle.com/","msgid":"<20231127062618.21624-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-27T06:26:18","name":"[COMMITTED] bpf: remove bpf-helpers.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127062618.21624-1-jose.marchesi@oracle.com/mbox/"},{"id":170050,"url":"https://patchwork.plctlab.org/api/1.2/patches/170050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127083458.307226-1-shihua@iscas.ac.cn/","msgid":"<20231127083458.307226-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-27T08:34:57","name":"Add C intrinsics for scalar crypto extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127083458.307226-1-shihua@iscas.ac.cn/mbox/"},{"id":170068,"url":"https://patchwork.plctlab.org/api/1.2/patches/170068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127094330.EB06E3857BBB@sourceware.org/","msgid":"<20231127094330.EB06E3857BBB@sourceware.org>","list_archive_url":null,"date":"2023-11-27T09:42:59","name":"tree-optimization/112706 - missed simplification of condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127094330.EB06E3857BBB@sourceware.org/mbox/"},{"id":170069,"url":"https://patchwork.plctlab.org/api/1.2/patches/170069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127095355.1535636-2-stefansf@linux.ibm.com/","msgid":"<20231127095355.1535636-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T09:53:56","name":"s390: Fixup builtins vec_rli and verll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127095355.1535636-2-stefansf@linux.ibm.com/mbox/"},{"id":170104,"url":"https://patchwork.plctlab.org/api/1.2/patches/170104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4rxun8.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T12:12:11","name":"Treat \"p\" in asms as addressing VOIDmode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4rxun8.fsf@arm.com/mbox/"},{"id":170117,"url":"https://patchwork.plctlab.org/api/1.2/patches/170117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127123819.1772162-2-stefansf@linux.ibm.com/","msgid":"<20231127123819.1772162-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T12:38:20","name":"s390: Add missing builtin type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127123819.1772162-2-stefansf@linux.ibm.com/mbox/"},{"id":170131,"url":"https://patchwork.plctlab.org/api/1.2/patches/170131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzfyzz75d.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-11-27T12:56:46","name":"libsanitizer: Check assembler support for symbol assignment [PR112563]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzfyzz75d.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":170134,"url":"https://patchwork.plctlab.org/api/1.2/patches/170134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7e3bc8332cd58ce6039292b92e112b6d2a9dd84.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-27T13:16:48","name":"[V4,4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7e3bc8332cd58ce6039292b92e112b6d2a9dd84.camel@tugraz.at/mbox/"},{"id":170137,"url":"https://patchwork.plctlab.org/api/1.2/patches/170137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127132412.2440640-1-juzhe.zhong@rivai.ai/","msgid":"<20231127132412.2440640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-27T13:24:12","name":"RISC-V: Fix VSETVL PASS regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127132412.2440640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":170138,"url":"https://patchwork.plctlab.org/api/1.2/patches/170138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com/","msgid":"<4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com>","list_archive_url":null,"date":"2023-11-27T13:38:48","name":"[committed] amdgcn: Disallow TImode vector permute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com/mbox/"},{"id":170188,"url":"https://patchwork.plctlab.org/api/1.2/patches/170188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127143154.6FA693857735@sourceware.org/","msgid":"<20231127143154.6FA693857735@sourceware.org>","list_archive_url":null,"date":"2023-11-27T14:31:22","name":"tree-optimization/112653 - PTA and return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127143154.6FA693857735@sourceware.org/mbox/"},{"id":170208,"url":"https://patchwork.plctlab.org/api/1.2/patches/170208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzb6pc.fsf@oracle.com/","msgid":"<87msuzb6pc.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-27T14:40:15","name":"bpf: Throw error when external libcalls are generated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzb6pc.fsf@oracle.com/mbox/"},{"id":170210,"url":"https://patchwork.plctlab.org/api/1.2/patches/170210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttp7w8zx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T14:45:06","name":"[pushed] aarch64: Move and generalise vect_all_same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttp7w8zx.fsf@arm.com/mbox/"},{"id":170211,"url":"https://patchwork.plctlab.org/api/1.2/patches/170211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7ffw8yv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T14:45:44","name":"[pushed] aarch64: Remove redundant zeroing/merging in SVE intrinsics [PR106326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7ffw8yv.fsf@arm.com/mbox/"},{"id":170212,"url":"https://patchwork.plctlab.org/api/1.2/patches/170212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzs14u.fsf@euler.schwinge.homeip.net/","msgid":"<87msuzs14u.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-27T14:48:33","name":"hurd: Add multilib paths for gnu-x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzs14u.fsf@euler.schwinge.homeip.net/mbox/"},{"id":170217,"url":"https://patchwork.plctlab.org/api/1.2/patches/170217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3s0z1.fsf@euler.schwinge.homeip.net/","msgid":"<87jzq3s0z1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-27T14:52:02","name":"hurd: Ad default-pie and static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3s0z1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":170344,"url":"https://patchwork.plctlab.org/api/1.2/patches/170344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3az8b.fsf@oracle.com/","msgid":"<87jzq3az8b.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-27T17:21:40","name":"[v2] Fixed problem with BTF defining smaller enums.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3az8b.fsf@oracle.com/mbox/"},{"id":170348,"url":"https://patchwork.plctlab.org/api/1.2/patches/170348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com/","msgid":"<4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com>","list_archive_url":null,"date":"2023-11-27T17:35:22","name":"[v2] Fortran: fix reallocation on assignment of polymorphic variables [PR110415]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com/mbox/"},{"id":170352,"url":"https://patchwork.plctlab.org/api/1.2/patches/170352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127180209.548531-1-rearnsha@arm.com/","msgid":"<20231127180209.548531-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-27T18:02:09","name":"[committed] arm: libgcc: tweak warning from __sync_synchronize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127180209.548531-1-rearnsha@arm.com/mbox/"},{"id":170357,"url":"https://patchwork.plctlab.org/api/1.2/patches/170357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-27T18:16:17","name":"tree-sra: Avoid returns of references to SRA candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":170486,"url":"https://patchwork.plctlab.org/api/1.2/patches/170486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18033-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T22:40:37","name":"middle-end: prevent LIM from hoising vector compares from gconds if target does not support it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18033-tamar@arm.com/mbox/"},{"id":170487,"url":"https://patchwork.plctlab.org/api/1.2/patches/170487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18034-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T22:40:58","name":"middle-end: refactor vectorizable_live_operation into helper method for codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18034-tamar@arm.com/mbox/"},{"id":170495,"url":"https://patchwork.plctlab.org/api/1.2/patches/170495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127225818.613815-1-quic_apinski@quicinc.com/","msgid":"<20231127225818.613815-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T22:58:18","name":"[COMMITTED] Fix time-profiler-3.c after r14-5628-g53ba8d669550d3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127225818.613815-1-quic_apinski@quicinc.com/mbox/"},{"id":170496,"url":"https://patchwork.plctlab.org/api/1.2/patches/170496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127230845.615689-1-quic_apinski@quicinc.com/","msgid":"<20231127230845.615689-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T23:08:45","name":"aarch64: Improve cost of `a ? {-,}1 : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127230845.615689-1-quic_apinski@quicinc.com/mbox/"},{"id":170509,"url":"https://patchwork.plctlab.org/api/1.2/patches/170509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWUreYSYOpXs0jze@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-27T23:51:21","name":"fold-mem-offsets: Fix powerpc64le-linux profiledbootstrap [PR111601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWUreYSYOpXs0jze@tucnak/mbox/"},{"id":170521,"url":"https://patchwork.plctlab.org/api/1.2/patches/170521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128023227.36200-1-gaofei@eswincomputing.com/","msgid":"<20231128023227.36200-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T02:32:24","name":"[1/4,RISC-V] prefer Zicond primitive semantics to SFB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128023227.36200-1-gaofei@eswincomputing.com/mbox/"},{"id":170522,"url":"https://patchwork.plctlab.org/api/1.2/patches/170522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128025527.36740-1-wangfeng@eswincomputing.com/","msgid":"<20231128025527.36740-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T02:55:27","name":"[v2] gimple-match.pd Add more optimization for gimple_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128025527.36740-1-wangfeng@eswincomputing.com/mbox/"},{"id":170530,"url":"https://patchwork.plctlab.org/api/1.2/patches/170530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128044326.734466-1-quic_apinski@quicinc.com/","msgid":"<20231128044326.734466-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-28T04:43:26","name":"MATCH: Fix invalid signed boolean type usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128044326.734466-1-quic_apinski@quicinc.com/mbox/"},{"id":170574,"url":"https://patchwork.plctlab.org/api/1.2/patches/170574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073837.2451935-1-liwei@loongson.cn/","msgid":"<20231128073837.2451935-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:38:37","name":"[v1,1/2] LoongArch: Accelerate optimization of scalar signed/unsigned popcount.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073837.2451935-1-liwei@loongson.cn/mbox/"},{"id":170575,"url":"https://patchwork.plctlab.org/api/1.2/patches/170575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073900.2452086-1-liwei@loongson.cn/","msgid":"<20231128073900.2452086-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:39:00","name":"[v1,2/2] LoongArch: Optimize vector constant extract-{even/odd} permutation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073900.2452086-1-liwei@loongson.cn/mbox/"},{"id":170576,"url":"https://patchwork.plctlab.org/api/1.2/patches/170576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/deee9182-fe94-42a3-b53a-6336f6b1bec3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-28T07:43:21","name":"Expand: Pass down equality only flag to cmpmem expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/deee9182-fe94-42a3-b53a-6336f6b1bec3@linux.ibm.com/mbox/"},{"id":170579,"url":"https://patchwork.plctlab.org/api/1.2/patches/170579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075212.3526692-1-hongtao.liu@intel.com/","msgid":"<20231128075212.3526692-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-28T07:52:12","name":"Take register pressure into account for vec_construct when the components are not loaded from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075212.3526692-1-hongtao.liu@intel.com/mbox/"},{"id":170580,"url":"https://patchwork.plctlab.org/api/1.2/patches/170580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075424.18703-1-chenxiaolong@loongson.cn/","msgid":"<20231128075424.18703-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:54:24","name":"[v1] LoongArch: Added vectorized hardware inspection for testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075424.18703-1-chenxiaolong@loongson.cn/mbox/"},{"id":170582,"url":"https://patchwork.plctlab.org/api/1.2/patches/170582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075635.2484351-1-liwei@loongson.cn/","msgid":"<20231128075635.2484351-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:56:35","name":"[v1] LoongArch: Remove duplicate definition of CLZ_DEFINED_VALUE_AT_ZERO.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075635.2484351-1-liwei@loongson.cn/mbox/"},{"id":170584,"url":"https://patchwork.plctlab.org/api/1.2/patches/170584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128080033.1105900-1-juzhe.zhong@rivai.ai/","msgid":"<20231128080033.1105900-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-28T08:00:33","name":"RISC-V: Disallow poly (1,1) VLA SLP interleave vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128080033.1105900-1-juzhe.zhong@rivai.ai/mbox/"},{"id":170600,"url":"https://patchwork.plctlab.org/api/1.2/patches/170600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWjN0dxBKkIod2F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:22:15","name":"c++: Fix up __has_extension (cxx_init_captures)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWjN0dxBKkIod2F@tucnak/mbox/"},{"id":170602,"url":"https://patchwork.plctlab.org/api/1.2/patches/170602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128082716.1437220-1-dmalcolm@redhat.com/","msgid":"<20231128082716.1437220-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-28T08:27:15","name":"[pushed] analyzer: install header files for use by plugins [PR109077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128082716.1437220-1-dmalcolm@redhat.com/mbox/"},{"id":170605,"url":"https://patchwork.plctlab.org/api/1.2/patches/170605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWk9ObmRt5RlIuV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:29:40","name":"match.pd: Fix popcount (X) + popcount (Y) simplification [PR112719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWk9ObmRt5RlIuV@tucnak/mbox/"},{"id":170618,"url":"https://patchwork.plctlab.org/api/1.2/patches/170618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWmdfKznvpqZ2Ua@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:36:05","name":"match.pd: Fix parity (X) ^ parity (Y) simplification [PR112719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWmdfKznvpqZ2Ua@tucnak/mbox/"},{"id":170637,"url":"https://patchwork.plctlab.org/api/1.2/patches/170637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWrgW9blojZXhV1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:57:37","name":"testsuite: Fix up pr111754.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWrgW9blojZXhV1@tucnak/mbox/"},{"id":170643,"url":"https://patchwork.plctlab.org/api/1.2/patches/170643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093809.2970405-1-poulhies@adacore.com/","msgid":"<20231128093809.2970405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:09","name":"[COMMITTED] ada: Fix predicate failure that occurred in a test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093809.2970405-1-poulhies@adacore.com/mbox/"},{"id":170644,"url":"https://patchwork.plctlab.org/api/1.2/patches/170644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093829.2970640-1-poulhies@adacore.com/","msgid":"<20231128093829.2970640-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:29","name":"[COMMITTED] ada: Remove dependency on System.Val_Bool in System.Img_Bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093829.2970640-1-poulhies@adacore.com/mbox/"},{"id":170646,"url":"https://patchwork.plctlab.org/api/1.2/patches/170646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093842.2970706-1-poulhies@adacore.com/","msgid":"<20231128093842.2970706-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:42","name":"[COMMITTED] ada: Handle unchecked conversion in bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093842.2970706-1-poulhies@adacore.com/mbox/"},{"id":170648,"url":"https://patchwork.plctlab.org/api/1.2/patches/170648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093851.2970777-1-poulhies@adacore.com/","msgid":"<20231128093851.2970777-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:51","name":"[COMMITTED] ada: Fix internal error on declare expression in expression function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093851.2970777-1-poulhies@adacore.com/mbox/"},{"id":170647,"url":"https://patchwork.plctlab.org/api/1.2/patches/170647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093900.2970843-1-poulhies@adacore.com/","msgid":"<20231128093900.2970843-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:00","name":"[COMMITTED] ada: Type error on container aggregate with loop_parameter_specification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093900.2970843-1-poulhies@adacore.com/mbox/"},{"id":170649,"url":"https://patchwork.plctlab.org/api/1.2/patches/170649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093912.2970916-1-poulhies@adacore.com/","msgid":"<20231128093912.2970916-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:12","name":"[COMMITTED] ada: Add new predicate Is_Address_Compatible_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093912.2970916-1-poulhies@adacore.com/mbox/"},{"id":170650,"url":"https://patchwork.plctlab.org/api/1.2/patches/170650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093921.2970982-1-poulhies@adacore.com/","msgid":"<20231128093921.2970982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:21","name":"[COMMITTED] ada: Fix premature finalization for nested return within extended one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093921.2970982-1-poulhies@adacore.com/mbox/"},{"id":170653,"url":"https://patchwork.plctlab.org/api/1.2/patches/170653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093931.2971051-1-poulhies@adacore.com/","msgid":"<20231128093931.2971051-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:31","name":"[COMMITTED] ada: Fix incorrect quoting in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093931.2971051-1-poulhies@adacore.com/mbox/"},{"id":170652,"url":"https://patchwork.plctlab.org/api/1.2/patches/170652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093940.2971116-1-poulhies@adacore.com/","msgid":"<20231128093940.2971116-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:40","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093940.2971116-1-poulhies@adacore.com/mbox/"},{"id":170656,"url":"https://patchwork.plctlab.org/api/1.2/patches/170656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093950.2971184-1-poulhies@adacore.com/","msgid":"<20231128093950.2971184-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:50","name":"[COMMITTED] ada: False alarms from -gnatw.t with generic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093950.2971184-1-poulhies@adacore.com/mbox/"},{"id":170654,"url":"https://patchwork.plctlab.org/api/1.2/patches/170654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093959.2971252-1-poulhies@adacore.com/","msgid":"<20231128093959.2971252-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:59","name":"[COMMITTED] ada: Errors on instance of Multiway_Trees with discriminated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093959.2971252-1-poulhies@adacore.com/mbox/"},{"id":170655,"url":"https://patchwork.plctlab.org/api/1.2/patches/170655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128094008.2971318-1-poulhies@adacore.com/","msgid":"<20231128094008.2971318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:40:08","name":"[COMMITTED] ada: Error compiling reduction expression with overloaded reducer subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128094008.2971318-1-poulhies@adacore.com/mbox/"},{"id":170670,"url":"https://patchwork.plctlab.org/api/1.2/patches/170670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128101047.12989-1-gaofei@eswincomputing.com/","msgid":"<20231128101047.12989-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T10:10:47","name":"[ifcvt,V2] optimize x=c ? (y and z) : y, where z is a reg or imm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128101047.12989-1-gaofei@eswincomputing.com/mbox/"},{"id":170735,"url":"https://patchwork.plctlab.org/api/1.2/patches/170735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e15951ed-3430-46bf-9a5f-2d57c16452d0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-28T11:28:05","name":"OpenMP: Support acquires/release in '\''omp require atomic_default_mem_order'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e15951ed-3430-46bf-9a5f-2d57c16452d0@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-11/mbox/"},{"id":46,"url":"https://patchwork.plctlab.org/api/1.2/bundles/46/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-12","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":172177,"url":"https://patchwork.plctlab.org/api/1.2/patches/172177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129114905.3057404-1-christoph.muellner@vrull.eu/","msgid":"<20231129114905.3057404-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-29T11:49:05","name":"[RFC] RISC-V: Remove f{r,s}flags builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129114905.3057404-1-christoph.muellner@vrull.eu/mbox/"},{"id":171653,"url":"https://patchwork.plctlab.org/api/1.2/patches/171653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129231446.204221-1-juzhe.zhong@rivai.ai/","msgid":"<20231129231446.204221-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-29T23:14:46","name":"[Committed] RISC-V: Rename vconstraint into group_overlap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129231446.204221-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171654,"url":"https://patchwork.plctlab.org/api/1.2/patches/171654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org/","msgid":"<4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org>","list_archive_url":null,"date":"2023-11-29T23:46:07","name":": gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org/mbox/"},{"id":171655,"url":"https://patchwork.plctlab.org/api/1.2/patches/171655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130000547.GA62552@ldh-imac.local/","msgid":"<20231130000547.GA62552@ldh-imac.local>","list_archive_url":null,"date":"2023-11-30T00:05:47","name":"ping: [PATCH] diagnostics: Fix behavior of permerror options after diagnostic pop [PR111918]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130000547.GA62552@ldh-imac.local/mbox/"},{"id":171704,"url":"https://patchwork.plctlab.org/api/1.2/patches/171704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130023842.2332222-1-juzhe.zhong@rivai.ai/","msgid":"<20231130023842.2332222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T02:38:42","name":"[Committed] RISC-V: Support highpart overlap for floating-point widen instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130023842.2332222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171718,"url":"https://patchwork.plctlab.org/api/1.2/patches/171718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc7b70fa3497664a58b3c0b36fa94f9ec87d4f22.1701312907.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T02:55:44","name":"[committed,(pre-approved)] RISC-V: Fix '\''E'\'' extension version to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc7b70fa3497664a58b3c0b36fa94f9ec87d4f22.1701312907.git.research_trasio@irq.a4lg.com/mbox/"},{"id":171722,"url":"https://patchwork.plctlab.org/api/1.2/patches/171722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130032206.17968-1-chenglulu@loongson.cn/","msgid":"<20231130032206.17968-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-30T03:22:06","name":"[v2] LoongArch: Add intrinsic function descriptions for LSX and LASX instructions to doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130032206.17968-1-chenglulu@loongson.cn/mbox/"},{"id":171734,"url":"https://patchwork.plctlab.org/api/1.2/patches/171734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130050027.700656-1-jason@redhat.com/","msgid":"<20231130050027.700656-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-30T05:00:27","name":"[pushed] c++: remove LAMBDA_EXPR_MUTABLE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130050027.700656-1-jason@redhat.com/mbox/"},{"id":171742,"url":"https://patchwork.plctlab.org/api/1.2/patches/171742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130061652.1382-1-wangfeng@eswincomputing.com/","msgid":"<20231130061652.1382-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-30T06:16:52","name":"RISC-V: Update crypto vector ISA info with latest spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130061652.1382-1-wangfeng@eswincomputing.com/mbox/"},{"id":171748,"url":"https://patchwork.plctlab.org/api/1.2/patches/171748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130064905.2716758-1-juzhe.zhong@rivai.ai/","msgid":"<20231130064905.2716758-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T06:49:05","name":"RISC-V: Support widening register overlap for vf4/vf8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130064905.2716758-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171750,"url":"https://patchwork.plctlab.org/api/1.2/patches/171750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130072105.2462309-1-pan2.li@intel.com/","msgid":"<20231130072105.2462309-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-30T07:21:05","name":"[v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130072105.2462309-1-pan2.li@intel.com/mbox/"},{"id":171762,"url":"https://patchwork.plctlab.org/api/1.2/patches/171762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qc71xqw.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-30T07:55:19","name":"hardcfr: libgcc sym versioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qc71xqw.fsf@lxoliva.fsfla.org/mbox/"},{"id":171771,"url":"https://patchwork.plctlab.org/api/1.2/patches/171771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240A5E3CCDD06E80624CE9BE882A@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T08:27:33","name":"aarch64: modify Ampere CPU tunings on reassociation/FMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240A5E3CCDD06E80624CE9BE882A@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":171792,"url":"https://patchwork.plctlab.org/api/1.2/patches/171792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130094623.14211-1-xry111@xry111.site/","msgid":"<20231130094623.14211-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-30T09:46:18","name":"doc: Update the status of build directory not fully separated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130094623.14211-1-xry111@xry111.site/mbox/"},{"id":171798,"url":"https://patchwork.plctlab.org/api/1.2/patches/171798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101545.3206213-1-christophe.lyon@linaro.org/","msgid":"<20231130101545.3206213-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-30T10:15:45","name":"testsuite/arm: Fix bfloat16_vector_typecheck_[12].c tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101545.3206213-1-christophe.lyon@linaro.org/mbox/"},{"id":171799,"url":"https://patchwork.plctlab.org/api/1.2/patches/171799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101848.3093719-1-poulhies@adacore.com/","msgid":"<20231130101848.3093719-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:18:47","name":"[COMMITTED] ada: Constant_Indexing used when context requires a variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101848.3093719-1-poulhies@adacore.com/mbox/"},{"id":171800,"url":"https://patchwork.plctlab.org/api/1.2/patches/171800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101900.3093876-1-poulhies@adacore.com/","msgid":"<20231130101900.3093876-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:00","name":"[COMMITTED] ada: Fix wrong finalization for qualified aggregate of limited type in allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101900.3093876-1-poulhies@adacore.com/mbox/"},{"id":171801,"url":"https://patchwork.plctlab.org/api/1.2/patches/171801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101902.3093945-1-poulhies@adacore.com/","msgid":"<20231130101902.3093945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:02","name":"[COMMITTED] ada: Fix predicate check failure in Expand_Allocator_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101902.3093945-1-poulhies@adacore.com/mbox/"},{"id":171805,"url":"https://patchwork.plctlab.org/api/1.2/patches/171805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101904.3094006-1-poulhies@adacore.com/","msgid":"<20231130101904.3094006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:03","name":"[COMMITTED] ada: Too-strict conformance checking for formal discriminated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101904.3094006-1-poulhies@adacore.com/mbox/"},{"id":171802,"url":"https://patchwork.plctlab.org/api/1.2/patches/171802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101905.3094070-1-poulhies@adacore.com/","msgid":"<20231130101905.3094070-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:05","name":"[COMMITTED] ada: Add comment describing Partition_Elaboration_Policy dependency.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101905.3094070-1-poulhies@adacore.com/mbox/"},{"id":171806,"url":"https://patchwork.plctlab.org/api/1.2/patches/171806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101909.3094195-1-poulhies@adacore.com/","msgid":"<20231130101909.3094195-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:09","name":"[COMMITTED] ada: Crash initializing component of private record type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101909.3094195-1-poulhies@adacore.com/mbox/"},{"id":171814,"url":"https://patchwork.plctlab.org/api/1.2/patches/171814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101910.3094256-1-poulhies@adacore.com/","msgid":"<20231130101910.3094256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:10","name":"[COMMITTED] ada: Fix spelling of functions with(out) \"side effects\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101910.3094256-1-poulhies@adacore.com/mbox/"},{"id":171815,"url":"https://patchwork.plctlab.org/api/1.2/patches/171815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101912.3094317-1-poulhies@adacore.com/","msgid":"<20231130101912.3094317-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:12","name":"[COMMITTED] ada: Ignore defered compile time errors without backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101912.3094317-1-poulhies@adacore.com/mbox/"},{"id":171811,"url":"https://patchwork.plctlab.org/api/1.2/patches/171811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101914.3094378-1-poulhies@adacore.com/","msgid":"<20231130101914.3094378-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:14","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101914.3094378-1-poulhies@adacore.com/mbox/"},{"id":171819,"url":"https://patchwork.plctlab.org/api/1.2/patches/171819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101916.3094439-1-poulhies@adacore.com/","msgid":"<20231130101916.3094439-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:16","name":"[COMMITTED] ada: Remove SPARK legality checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101916.3094439-1-poulhies@adacore.com/mbox/"},{"id":171816,"url":"https://patchwork.plctlab.org/api/1.2/patches/171816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101918.3094500-1-poulhies@adacore.com/","msgid":"<20231130101918.3094500-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:17","name":"[COMMITTED] ada: Support Put_Image for types in user-defined instances of predefined generics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101918.3094500-1-poulhies@adacore.com/mbox/"},{"id":171817,"url":"https://patchwork.plctlab.org/api/1.2/patches/171817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101919.3094562-1-poulhies@adacore.com/","msgid":"<20231130101919.3094562-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:19","name":"[COMMITTED] ada: Rework fix for wrong finalization of qualified aggregate in allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101919.3094562-1-poulhies@adacore.com/mbox/"},{"id":171820,"url":"https://patchwork.plctlab.org/api/1.2/patches/171820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130102014.3198938-1-juzhe.zhong@rivai.ai/","msgid":"<20231130102014.3198938-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T10:20:14","name":"RISC-V: Remove earlyclobber for wx/wf instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130102014.3198938-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171884,"url":"https://patchwork.plctlab.org/api/1.2/patches/171884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130134205.12445-1-xry111@xry111.site/","msgid":"<20231130134205.12445-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-30T13:41:07","name":"[v2] doc: Update the status of build directory not fully separated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130134205.12445-1-xry111@xry111.site/mbox/"},{"id":171927,"url":"https://patchwork.plctlab.org/api/1.2/patches/171927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt34wne3hn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:10:28","name":"Ping: [PATCH] Add a late-combine pass [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt34wne3hn.fsf@arm.com/mbox/"},{"id":171928,"url":"https://patchwork.plctlab.org/api/1.2/patches/171928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmtzcous.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:11:55","name":"Ping: [PATCH] Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmtzcous.fsf@arm.com/mbox/"},{"id":171943,"url":"https://patchwork.plctlab.org/api/1.2/patches/171943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWihkd4+/v4UmLkD@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:52:01","name":"[wwwdocs] gcc-14/changes.html: Update C++ news for GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWihkd4+/v4UmLkD@redhat.com/mbox/"},{"id":171944,"url":"https://patchwork.plctlab.org/api/1.2/patches/171944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qv5lwl.fsf@euler.schwinge.homeip.net/","msgid":"<87a5qv5lwl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-30T14:57:30","name":"In '\''libgomp.c/declare-variant-{3,4}-*.c'\'', restrict '\''scan-offload-tree-dump'\''s to '\''only_for_offload_target [...]'\'' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qv5lwl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":171949,"url":"https://patchwork.plctlab.org/api/1.2/patches/171949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877clz5lta.fsf@euler.schwinge.homeip.net/","msgid":"<877clz5lta.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-30T14:59:29","name":"Spin '\''dg-do run'\'' part of '\''libgomp.c/declare-variant-3-sm30.c'\'' off into new '\''libgomp.c/declare-variant-3.c'\'' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877clz5lta.fsf@euler.schwinge.homeip.net/mbox/"},{"id":171952,"url":"https://patchwork.plctlab.org/api/1.2/patches/171952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-11-30T15:15:04","name":"Fix '\''libgomp.c/declare-variant-4-*.c'\'', add '\''libgomp.c/declare-variant-4.c'\'' (was: [PATCH] amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":171965,"url":"https://patchwork.plctlab.org/api/1.2/patches/171965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154547.17694-1-jchrist@linux.ibm.com/","msgid":"<20231130154547.17694-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-30T15:45:47","name":"s390x: Fix PR112753","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154547.17694-1-jchrist@linux.ibm.com/mbox/"},{"id":172016,"url":"https://patchwork.plctlab.org/api/1.2/patches/172016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154744.74164-1-jwakely@redhat.com/","msgid":"<20231130154744.74164-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:47:24","name":"[committed] libstdc++: Fix std::ranges::to errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154744.74164-1-jwakely@redhat.com/mbox/"},{"id":171966,"url":"https://patchwork.plctlab.org/api/1.2/patches/171966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155041.74365-1-jwakely@redhat.com/","msgid":"<20231130155041.74365-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:49:59","name":"libstdc++: Implement LGW 4016 for std::ranges::to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155041.74365-1-jwakely@redhat.com/mbox/"},{"id":172003,"url":"https://patchwork.plctlab.org/api/1.2/patches/172003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155155.74430-1-jwakely@redhat.com/","msgid":"<20231130155155.74430-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:50:50","name":"libstdc++: Add workaround to std::ranges::subrange [PR111948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155155.74430-1-jwakely@redhat.com/mbox/"},{"id":171990,"url":"https://patchwork.plctlab.org/api/1.2/patches/171990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130162054.89738-1-sebastian.huber@embedded-brains.de/","msgid":"<20231130162054.89738-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-30T16:20:54","name":"gcov: Fix __LIBGCC_HAVE_LIBATOMIC definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130162054.89738-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":172081,"url":"https://patchwork.plctlab.org/api/1.2/patches/172081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org/","msgid":"<5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org>","list_archive_url":null,"date":"2023-11-30T17:59:56","name":"htdocs/git.html: correct spelling and use git in example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org/mbox/"},{"id":172118,"url":"https://patchwork.plctlab.org/api/1.2/patches/172118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130192252.3123291-1-ppalka@redhat.com/","msgid":"<20231130192252.3123291-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-30T19:22:52","name":"libstdc++: Simplify ranges::to closure objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130192252.3123291-1-ppalka@redhat.com/mbox/"},{"id":172160,"url":"https://patchwork.plctlab.org/api/1.2/patches/172160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130213149.25254-1-manos.anagnostakis@vrull.eu/","msgid":"<20231130213149.25254-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-11-30T21:31:49","name":"[v3] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130213149.25254-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":172145,"url":"https://patchwork.plctlab.org/api/1.2/patches/172145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221727.3044519-1-indu.bhagat@oracle.com/","msgid":"<20231130221727.3044519-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-11-30T22:17:27","name":"btf: fix PR debug/112768","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221727.3044519-1-indu.bhagat@oracle.com/mbox/"},{"id":172147,"url":"https://patchwork.plctlab.org/api/1.2/patches/172147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221818.3044556-1-indu.bhagat@oracle.com/","msgid":"<20231130221818.3044556-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-11-30T22:18:18","name":"btf: fix PR debug/112656","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221818.3044556-1-indu.bhagat@oracle.com/mbox/"},{"id":172146,"url":"https://patchwork.plctlab.org/api/1.2/patches/172146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com/","msgid":"<2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com>","list_archive_url":null,"date":"2023-11-30T22:22:35","name":"RISC-V: Vectorized str(n)cmp and strlen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com/mbox/"},{"id":172194,"url":"https://patchwork.plctlab.org/api/1.2/patches/172194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201005110.2689714-1-juzhe.zhong@rivai.ai/","msgid":"<20231201005110.2689714-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T00:51:10","name":"RISC-V: Fix VSETVL PASS regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201005110.2689714-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172217,"url":"https://patchwork.plctlab.org/api/1.2/patches/172217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201022100.955917-2-haochen.jiang@intel.com/","msgid":"<20231201022100.955917-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-01T02:21:00","name":"i386: Mark Xeon Phi ISAs as deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201022100.955917-2-haochen.jiang@intel.com/mbox/"},{"id":172220,"url":"https://patchwork.plctlab.org/api/1.2/patches/172220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201023850.1118763-1-hongtao.liu@intel.com/","msgid":"<20231201023850.1118763-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-01T02:38:50","name":"Take register pressure into account for vec_construct/scalar_to_vec when the components are not loaded from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201023850.1118763-1-hongtao.liu@intel.com/mbox/"},{"id":172222,"url":"https://patchwork.plctlab.org/api/1.2/patches/172222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com/","msgid":"<770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com>","list_archive_url":null,"date":"2023-12-01T02:41:43","name":"[patch-1,rs6000] enable fctiw on old archs [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com/mbox/"},{"id":172221,"url":"https://patchwork.plctlab.org/api/1.2/patches/172221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com/","msgid":"<85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com>","list_archive_url":null,"date":"2023-12-01T02:42:03","name":"[patch-2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com/mbox/"},{"id":172235,"url":"https://patchwork.plctlab.org/api/1.2/patches/172235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201035003.857697-1-jason@redhat.com/","msgid":"<20231201035003.857697-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-01T03:50:03","name":"c++: lambda capture and explicit object parm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201035003.857697-1-jason@redhat.com/mbox/"},{"id":172286,"url":"https://patchwork.plctlab.org/api/1.2/patches/172286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201070027.581910-1-juzhe.zhong@rivai.ai/","msgid":"<20231201070027.581910-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T07:00:27","name":"RISC-V: Support highpart register overlap for widen vx/vf instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201070027.581910-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172301,"url":"https://patchwork.plctlab.org/api/1.2/patches/172301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmLSvbSQY8TVNnp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:29:14","name":"lower-bitint: Fix _BitInt .{ADD,SUB}_OVERFLOW lowering [PR112750]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmLSvbSQY8TVNnp@tucnak/mbox/"},{"id":172302,"url":"https://patchwork.plctlab.org/api/1.2/patches/172302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmMi5qkXwmNgBYY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:34:35","name":"lower-bitint: Fix ICE on bitint-39.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmMi5qkXwmNgBYY@tucnak/mbox/"},{"id":172304,"url":"https://patchwork.plctlab.org/api/1.2/patches/172304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-2-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:24","name":"[v2,1/3] LoongArch: Adjust D version strings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-2-yangyujie@loongson.cn/mbox/"},{"id":172306,"url":"https://patchwork.plctlab.org/api/1.2/patches/172306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-3-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:25","name":"[v2,2/3] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-3-yangyujie@loongson.cn/mbox/"},{"id":172305,"url":"https://patchwork.plctlab.org/api/1.2/patches/172305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-4-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:26","name":"[v2,3/3] libphobos: LoongArch hardware support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-4-yangyujie@loongson.cn/mbox/"},{"id":172307,"url":"https://patchwork.plctlab.org/api/1.2/patches/172307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201075235.2345384-1-pan2.li@intel.com/","msgid":"<20231201075235.2345384-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-01T07:52:35","name":"[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201075235.2345384-1-pan2.li@intel.com/mbox/"},{"id":172308,"url":"https://patchwork.plctlab.org/api/1.2/patches/172308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmSCTzJaaBoRJjq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:58:01","name":"lower-bitint: Fix up maximum addition/subtraction/multiplication result computations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmSCTzJaaBoRJjq@tucnak/mbox/"},{"id":172310,"url":"https://patchwork.plctlab.org/api/1.2/patches/172310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmTzwDzPS0bLtv9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T08:05:35","name":"lower-bitint: Fix up handle_operand_addr for 0 constants [PR112771]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmTzwDzPS0bLtv9@tucnak/mbox/"},{"id":172311,"url":"https://patchwork.plctlab.org/api/1.2/patches/172311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmU57saVAdB1wGp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T08:10:15","name":"lower-bitint: Fix lowering of middle sized _BitInt operations which can throw [PR112770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmU57saVAdB1wGp@tucnak/mbox/"},{"id":172312,"url":"https://patchwork.plctlab.org/api/1.2/patches/172312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081410.1441609-1-juzhe.zhong@rivai.ai/","msgid":"<20231201081410.1441609-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T08:14:10","name":"RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081410.1441609-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172313,"url":"https://patchwork.plctlab.org/api/1.2/patches/172313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081902.33740-1-sebastian.huber@embedded-brains.de/","msgid":"<20231201081902.33740-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-12-01T08:19:02","name":"gcov: Fix use of __LIBGCC_HAVE_LIBATOMIC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081902.33740-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":172337,"url":"https://patchwork.plctlab.org/api/1.2/patches/172337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com/","msgid":"<004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-01T09:22:44","name":"[RISC-V] Improve style to work around PR 60994 in host compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com/mbox/"},{"id":172380,"url":"https://patchwork.plctlab.org/api/1.2/patches/172380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201094726.14266-1-jose.marchesi@oracle.com/","msgid":"<20231201094726.14266-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-12-01T09:47:26","name":"[COMMITTED] bpf: quote section names whenever necessary in assembly output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201094726.14266-1-jose.marchesi@oracle.com/mbox/"},{"id":172386,"url":"https://patchwork.plctlab.org/api/1.2/patches/172386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201095524.1896396-1-mengqinggang@loongson.cn/","msgid":"<20231201095524.1896396-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-12-01T09:55:24","name":"LoongArch: Add support for TLS descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201095524.1896396-1-mengqinggang@loongson.cn/mbox/"},{"id":172399,"url":"https://patchwork.plctlab.org/api/1.2/patches/172399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-2-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:25","name":"[v3,1/3] LoongArch: Adjust D version strings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-2-yangyujie@loongson.cn/mbox/"},{"id":172401,"url":"https://patchwork.plctlab.org/api/1.2/patches/172401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-3-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:26","name":"[v3,2/3] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-3-yangyujie@loongson.cn/mbox/"},{"id":172400,"url":"https://patchwork.plctlab.org/api/1.2/patches/172400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-4-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:27","name":"[v3,3/3] libruntime: Add fiber context switch code for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-4-yangyujie@loongson.cn/mbox/"},{"id":172402,"url":"https://patchwork.plctlab.org/api/1.2/patches/172402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201101158.2774595-1-pan2.li@intel.com/","msgid":"<20231201101158.2774595-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-01T10:11:58","name":"[v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201101158.2774595-1-pan2.li@intel.com/mbox/"},{"id":172404,"url":"https://patchwork.plctlab.org/api/1.2/patches/172404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWm00S+EZNfpqn2l@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T10:26:25","name":"extend.texi: Fix up defbuiltin* with spaces in return type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWm00S+EZNfpqn2l@tucnak/mbox/"},{"id":172448,"url":"https://patchwork.plctlab.org/api/1.2/patches/172448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuuyxkj.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T11:25:00","name":"[v7] Introduce attribute sym_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuuyxkj.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":172449,"url":"https://patchwork.plctlab.org/api/1.2/patches/172449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWnDFz+FcrkpsHzE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T11:27:19","name":"testsuite: Tweak some further tests for modern C changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWnDFz+FcrkpsHzE@tucnak/mbox/"},{"id":172450,"url":"https://patchwork.plctlab.org/api/1.2/patches/172450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201112739.7352F13928@imap2.dmz-prg2.suse.org/","msgid":"<20231201112739.7352F13928@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-01T11:27:38","name":"Fix ambiguity between vect_get_vec_defs with/without vectype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201112739.7352F13928@imap2.dmz-prg2.suse.org/mbox/"},{"id":172474,"url":"https://patchwork.plctlab.org/api/1.2/patches/172474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201123150.1940367-1-juzhe.zhong@rivai.ai/","msgid":"<20231201123150.1940367-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T12:31:50","name":"RISC-V: Fix incorrect combine of extended scalar pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201123150.1940367-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172478,"url":"https://patchwork.plctlab.org/api/1.2/patches/172478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oril5iytae.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T12:57:29","name":"hardcfr: make builtin_return tests more portable [PR112334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oril5iytae.fsf@lxoliva.fsfla.org/mbox/"},{"id":172497,"url":"https://patchwork.plctlab.org/api/1.2/patches/172497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-1-dmalcolm@redhat.com/","msgid":"<20231201135851.1841421-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-01T13:58:49","name":"[pushed] docs: remove stray reference to -fanalyzer-checker=taint [PR103533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-1-dmalcolm@redhat.com/mbox/"},{"id":172499,"url":"https://patchwork.plctlab.org/api/1.2/patches/172499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-2-dmalcolm@redhat.com/","msgid":"<20231201135851.1841421-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-01T13:58:50","name":"[pushed] diagnostics, analyzer: add optional per-diagnostic property bags to SARIF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-2-dmalcolm@redhat.com/mbox/"},{"id":172523,"url":"https://patchwork.plctlab.org/api/1.2/patches/172523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg6yn48.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:10:47","name":"untyped calls: enable target switching [PR112334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg6yn48.fsf@lxoliva.fsfla.org/mbox/"},{"id":172524,"url":"https://patchwork.plctlab.org/api/1.2/patches/172524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddfs0mt0oc.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:14:27","name":"ada: Fix Ada bootstrap on macOS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddfs0mt0oc.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":172539,"url":"https://patchwork.plctlab.org/api/1.2/patches/172539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9eef014-3fc1-45d2-88bf-6aa4bb0b2fe8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:20:30","name":"RISC-V: Fix rawmemchr implementation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9eef014-3fc1-45d2-88bf-6aa4bb0b2fe8@gmail.com/mbox/"},{"id":172540,"url":"https://patchwork.plctlab.org/api/1.2/patches/172540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com/","msgid":"<10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com>","list_archive_url":null,"date":"2023-12-01T15:21:10","name":"RISC-V: Rename and unify stringop strategy handling [NFC].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com/mbox/"},{"id":172541,"url":"https://patchwork.plctlab.org/api/1.2/patches/172541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com/","msgid":"<072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com>","list_archive_url":null,"date":"2023-12-01T15:21:47","name":"RISC-V: Add vectorized strlen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com/mbox/"},{"id":172542,"url":"https://patchwork.plctlab.org/api/1.2/patches/172542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da68b14f-5562-4533-b583-6469c1e0414e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:23:13","name":"RISC-V: Add vectorized strcmp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da68b14f-5562-4533-b583-6469c1e0414e@gmail.com/mbox/"},{"id":172547,"url":"https://patchwork.plctlab.org/api/1.2/patches/172547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs0luded.fsf@euler.schwinge.homeip.net/","msgid":"<87fs0luded.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-01T15:54:18","name":"c: Turn -Wimplicit-function-declaration into a permerror: Fix '\''gcc.dg/gnu23-builtins-no-dfp-1.c'\'' (was: [PATCH v3 06/11] c: Turn -Wimplicit-function-declaration into a permerror)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs0luded.fsf@euler.schwinge.homeip.net/mbox/"},{"id":172603,"url":"https://patchwork.plctlab.org/api/1.2/patches/172603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172428.C114A33E6C@hamza.pair.com/","msgid":"<20231201172428.C114A33E6C@hamza.pair.com>","list_archive_url":null,"date":"2023-12-01T17:24:26","name":"[pushed] wwwdocs: conduct: Change further creativecommons.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172428.C114A33E6C@hamza.pair.com/mbox/"},{"id":172612,"url":"https://patchwork.plctlab.org/api/1.2/patches/172612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172837.8BA1633E4C@hamza.pair.com/","msgid":"<20231201172837.8BA1633E4C@hamza.pair.com>","list_archive_url":null,"date":"2023-12-01T17:28:34","name":"[pushed] wwwdocs: benchmarks: Remove http://annwm.lbl.gov/bench/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172837.8BA1633E4C@hamza.pair.com/mbox/"},{"id":172615,"url":"https://patchwork.plctlab.org/api/1.2/patches/172615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com/","msgid":"<04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com>","list_archive_url":null,"date":"2023-12-01T18:02:21","name":"[pushed,PR112445,LRA] : Fix \"unable to find a register to spill\" error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com/mbox/"},{"id":172630,"url":"https://patchwork.plctlab.org/api/1.2/patches/172630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com/","msgid":"<6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com>","list_archive_url":null,"date":"2023-12-01T19:13:53","name":"[COMMITTED] Use range_compatible_p in check_operands_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com/mbox/"},{"id":172631,"url":"https://patchwork.plctlab.org/api/1.2/patches/172631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201193359.108618-1-polacek@redhat.com/","msgid":"<20231201193359.108618-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-01T19:33:59","name":"gcc: Disallow trampolines when -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201193359.108618-1-polacek@redhat.com/mbox/"},{"id":172686,"url":"https://patchwork.plctlab.org/api/1.2/patches/172686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWpuJTrUXSL9nSPS@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T23:37:09","name":"[v6] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWpuJTrUXSL9nSPS@redhat.com/mbox/"},{"id":172731,"url":"https://patchwork.plctlab.org/api/1.2/patches/172731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202005914.3621843-1-pan2.li@intel.com/","msgid":"<20231202005914.3621843-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-02T00:59:14","name":"[v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202005914.3621843-1-pan2.li@intel.com/mbox/"},{"id":172739,"url":"https://patchwork.plctlab.org/api/1.2/patches/172739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-2-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:23","name":"[1/3] MATCH: Fix zero_one_valued_p'\''s convert pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-2-quic_apinski@quicinc.com/mbox/"},{"id":172740,"url":"https://patchwork.plctlab.org/api/1.2/patches/172740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-3-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-3-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:24","name":"[2/3] Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-3-quic_apinski@quicinc.com/mbox/"},{"id":172741,"url":"https://patchwork.plctlab.org/api/1.2/patches/172741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-4-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-4-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:25","name":"[3/3] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-4-quic_apinski@quicinc.com/mbox/"},{"id":172751,"url":"https://patchwork.plctlab.org/api/1.2/patches/172751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-2-chenglulu@loongson.cn/","msgid":"<20231202081441.4799-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-02T08:14:40","name":"[v1,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-2-chenglulu@loongson.cn/mbox/"},{"id":172750,"url":"https://patchwork.plctlab.org/api/1.2/patches/172750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-3-chenglulu@loongson.cn/","msgid":"<20231202081441.4799-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-02T08:14:41","name":"[v1,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-3-chenglulu@loongson.cn/mbox/"},{"id":172802,"url":"https://patchwork.plctlab.org/api/1.2/patches/172802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsKeJlGr1NLWweo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T10:44:08","name":"pro_and_epilogue: Call df_note_add_problem () if SHRINK_WRAPPING_ENABLED [PR112760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsKeJlGr1NLWweo@tucnak/mbox/"},{"id":172805,"url":"https://patchwork.plctlab.org/api/1.2/patches/172805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsMN6iX/Cp+B5qJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T10:51:35","name":"c++: #pragma GCC unroll C++ fixes [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsMN6iX/Cp+B5qJ@tucnak/mbox/"},{"id":172806,"url":"https://patchwork.plctlab.org/api/1.2/patches/172806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsPafxjNGE9t0M1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T11:05:13","name":"lower-bitint: Fix up lower_addsub_overflow [PR112807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsPafxjNGE9t0M1@tucnak/mbox/"},{"id":172816,"url":"https://patchwork.plctlab.org/api/1.2/patches/172816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0df7f13-58a2-42fd-9180-87d8bd6f3163@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-12-02T11:57:52","name":"htdocs/contribute.html: correct disctinct->distinct spelling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0df7f13-58a2-42fd-9180-87d8bd6f3163@jguk.org/mbox/"},{"id":172829,"url":"https://patchwork.plctlab.org/api/1.2/patches/172829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edg4epw5.fsf@oldenburg.str.redhat.com/","msgid":"<87edg4epw5.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-12-02T12:43:22","name":"libgcov: Call __builtin_fork instead of fork","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edg4epw5.fsf@oldenburg.str.redhat.com/mbox/"},{"id":172859,"url":"https://patchwork.plctlab.org/api/1.2/patches/172859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202155249.1334525-1-arsen@aarsen.me/","msgid":"<20231202155249.1334525-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-02T15:47:56","name":"download_prerequisites: add --only-gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202155249.1334525-1-arsen@aarsen.me/mbox/"},{"id":172867,"url":"https://patchwork.plctlab.org/api/1.2/patches/172867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuswkss.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-02T17:56:03","name":"[v5] Introduce strub: machine-independent stack scrubbing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuswkss.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":172875,"url":"https://patchwork.plctlab.org/api/1.2/patches/172875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202211554.2319770-1-christoph.muellner@vrull.eu/","msgid":"<20231202211554.2319770-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-02T21:15:54","name":"RISC-V: Document optimization parameter riscv-strcmp-inline-limit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202211554.2319770-1-christoph.muellner@vrull.eu/mbox/"},{"id":172894,"url":"https://patchwork.plctlab.org/api/1.2/patches/172894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddc1341d-9c7c-46e2-a1d4-50223f31c089@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-12-03T00:17:40","name":"gcc/doc: spelling mistakes and example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddc1341d-9c7c-46e2-a1d4-50223f31c089@jguk.org/mbox/"},{"id":172897,"url":"https://patchwork.plctlab.org/api/1.2/patches/172897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-2-ams@codesourcery.com/","msgid":"<20231203003224.1638841-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:22","name":"[v3,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-2-ams@codesourcery.com/mbox/"},{"id":172896,"url":"https://patchwork.plctlab.org/api/1.2/patches/172896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-3-ams@codesourcery.com/","msgid":"<20231203003224.1638841-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:23","name":"[v3,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-3-ams@codesourcery.com/mbox/"},{"id":172898,"url":"https://patchwork.plctlab.org/api/1.2/patches/172898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-4-ams@codesourcery.com/","msgid":"<20231203003224.1638841-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:24","name":"[v3,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-4-ams@codesourcery.com/mbox/"},{"id":172895,"url":"https://patchwork.plctlab.org/api/1.2/patches/172895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org/","msgid":"<367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org>","list_archive_url":null,"date":"2023-12-03T00:32:29","name":"wwwdocs: spelling mistakes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org/mbox/"},{"id":172904,"url":"https://patchwork.plctlab.org/api/1.2/patches/172904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca9c93a6-d9f2-4cd8-87b5-d7b0b68502c1@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:00:19","name":"[committed] Fix frv build after C99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca9c93a6-d9f2-4cd8-87b5-d7b0b68502c1@gmail.com/mbox/"},{"id":172905,"url":"https://patchwork.plctlab.org/api/1.2/patches/172905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbb5313e-ba18-42c0-b310-9f9b41a8abbe@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:04:52","name":"[committed] Fix minor testsuite problems on H8 after C99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbb5313e-ba18-42c0-b310-9f9b41a8abbe@gmail.com/mbox/"},{"id":172906,"url":"https://patchwork.plctlab.org/api/1.2/patches/172906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fdadd430-7724-4c18-be25-936147176a4a@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:10:16","name":"[committed] Fix rx build failure in libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fdadd430-7724-4c18-be25-936147176a4a@gmail.com/mbox/"},{"id":172907,"url":"https://patchwork.plctlab.org/api/1.2/patches/172907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com/","msgid":"<012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:14:49","name":"[committed] Fix nios2 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com/mbox/"},{"id":172909,"url":"https://patchwork.plctlab.org/api/1.2/patches/172909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com/","msgid":"<3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:25:02","name":"[committed] Fix a few arc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com/mbox/"},{"id":172911,"url":"https://patchwork.plctlab.org/api/1.2/patches/172911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c39d1bb0-a8fe-4644-ae0e-0977a430f183@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:33:57","name":"[committed] Fix comp-goto-1.c on 16 bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c39d1bb0-a8fe-4644-ae0e-0977a430f183@gmail.com/mbox/"},{"id":172912,"url":"https://patchwork.plctlab.org/api/1.2/patches/172912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d38084ec-7007-4454-9f0a-5f5f9e8dac40@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:41:48","name":"[committed] Fix pr65369.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d38084ec-7007-4454-9f0a-5f5f9e8dac40@gmail.com/mbox/"},{"id":172913,"url":"https://patchwork.plctlab.org/api/1.2/patches/172913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com/","msgid":"<66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:47:30","name":"[committed] Fix build of libgcc on ports using FDPIC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com/mbox/"},{"id":172914,"url":"https://patchwork.plctlab.org/api/1.2/patches/172914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com/","msgid":"<3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:55:58","name":"[committed] Fix gnu23-builtins-no-dfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com/mbox/"},{"id":172926,"url":"https://patchwork.plctlab.org/api/1.2/patches/172926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7clva91r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T10:13:04","name":"lra: Updates of biggest mode for hard regs [PR112278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7clva91r.fsf@arm.com/mbox/"},{"id":172944,"url":"https://patchwork.plctlab.org/api/1.2/patches/172944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/656c78b2.170a0220.62689.59e8@mx.google.com/","msgid":"<656c78b2.170a0220.62689.59e8@mx.google.com>","list_archive_url":null,"date":"2023-12-03T12:46:36","name":"c++/modules: Prevent treating suppressed debug info as extern template [PR112820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/656c78b2.170a0220.62689.59e8@mx.google.com/mbox/"},{"id":172970,"url":"https://patchwork.plctlab.org/api/1.2/patches/172970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzJot9+UHOofuSX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-03T18:32:02","name":"testsuite: Fix up gcc.target/aarch64/pr112406.c for modern C [PR112406]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzJot9+UHOofuSX@tucnak/mbox/"},{"id":172971,"url":"https://patchwork.plctlab.org/api/1.2/patches/172971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzKks5+qQ/i4t2A@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-03T18:36:02","name":"testsuite: Fix up gcc.target/s390/pr96127.c test for modern C [PR96127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzKks5+qQ/i4t2A@tucnak/mbox/"},{"id":173020,"url":"https://patchwork.plctlab.org/api/1.2/patches/173020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203224741.3438009-1-juzhe.zhong@rivai.ai/","msgid":"<20231203224741.3438009-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-03T22:47:41","name":"[Committed] RISC-V: Robostify the W43, W86, W87 constraint enabled attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203224741.3438009-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173027,"url":"https://patchwork.plctlab.org/api/1.2/patches/173027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com/","msgid":"<006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-03T23:24:12","name":"Workaround array_slice constructor portability issues (with older g++).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com/mbox/"},{"id":173049,"url":"https://patchwork.plctlab.org/api/1.2/patches/173049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-2-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:04","name":"[2/7] RISC-V: Add intrinsic functions for crypto vector Zvbc extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-2-wangfeng@eswincomputing.com/mbox/"},{"id":173050,"url":"https://patchwork.plctlab.org/api/1.2/patches/173050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-3-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:05","name":"[3/7] RISC-V: Add intrinsic functions for crypto vector Zvkg extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-3-wangfeng@eswincomputing.com/mbox/"},{"id":173051,"url":"https://patchwork.plctlab.org/api/1.2/patches/173051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-4-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:06","name":"[4/7] RISC-V: Add intrinsic functions for crypto vector Zvkned extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-4-wangfeng@eswincomputing.com/mbox/"},{"id":173053,"url":"https://patchwork.plctlab.org/api/1.2/patches/173053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-5-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-5-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:07","name":"[5/7] RISC-V: Add intrinsic functions for crypto vector Zvknh[ab] extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-5-wangfeng@eswincomputing.com/mbox/"},{"id":173052,"url":"https://patchwork.plctlab.org/api/1.2/patches/173052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-6-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-6-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:08","name":"[6/7] RISC-V: Add intrinsic functions for crypto vector Zvksed extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-6-wangfeng@eswincomputing.com/mbox/"},{"id":173054,"url":"https://patchwork.plctlab.org/api/1.2/patches/173054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-7-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-7-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:09","name":"[7/7] RISC-V: Add intrinsic functions for crypto vector Zvksh extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-7-wangfeng@eswincomputing.com/mbox/"},{"id":173067,"url":"https://patchwork.plctlab.org/api/1.2/patches/173067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204043945.367103-1-juzhe.zhong@rivai.ai/","msgid":"<20231204043945.367103-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T04:39:45","name":"RISC-V: Fix overlap group incorrect overlap on v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204043945.367103-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173068,"url":"https://patchwork.plctlab.org/api/1.2/patches/173068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204053208.908533-1-hongtao.liu@intel.com/","msgid":"<20231204053208.908533-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-04T05:32:08","name":"Don'\''t vectorize when vector stmts are only vec_contruct and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204053208.908533-1-hongtao.liu@intel.com/mbox/"},{"id":173074,"url":"https://patchwork.plctlab.org/api/1.2/patches/173074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064003.80016-1-kito.cheng@sifive.com/","msgid":"<20231204064003.80016-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:03","name":"[committed] RISC-V: Refine riscv_subset_list::parse [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064003.80016-1-kito.cheng@sifive.com/mbox/"},{"id":173075,"url":"https://patchwork.plctlab.org/api/1.2/patches/173075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064010.80032-1-kito.cheng@sifive.com/","msgid":"<20231204064010.80032-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:10","name":"[committed] RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional implication [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064010.80032-1-kito.cheng@sifive.com/mbox/"},{"id":173076,"url":"https://patchwork.plctlab.org/api/1.2/patches/173076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064018.80048-1-kito.cheng@sifive.com/","msgid":"<20231204064018.80048-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:18","name":"[committed] RISC-V: Add sifive-x280 to -mcpu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064018.80048-1-kito.cheng@sifive.com/mbox/"},{"id":173078,"url":"https://patchwork.plctlab.org/api/1.2/patches/173078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064319.30859-1-wangfeng@eswincomputing.com/","msgid":"<20231204064319.30859-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T06:43:19","name":"[v2] RISC-V: Update crypto vector ISA info with latest spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064319.30859-1-wangfeng@eswincomputing.com/mbox/"},{"id":173080,"url":"https://patchwork.plctlab.org/api/1.2/patches/173080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204070118.1092995-1-hongtao.liu@intel.com/","msgid":"<20231204070118.1092995-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-04T07:01:18","name":"Support udot_prodv*qi with emulation sdot_prodv*hi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204070118.1092995-1-hongtao.liu@intel.com/mbox/"},{"id":173090,"url":"https://patchwork.plctlab.org/api/1.2/patches/173090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2BNARKl5/NbRVg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:35:16","name":"i386: Fix up signbit2 expander [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2BNARKl5/NbRVg@tucnak/mbox/"},{"id":173091,"url":"https://patchwork.plctlab.org/api/1.2/patches/173091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2Bmkzh2VZDhtT9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:36:58","name":"extend.texi: Mark builtin arguments with @var{...}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2Bmkzh2VZDhtT9@tucnak/mbox/"},{"id":173093,"url":"https://patchwork.plctlab.org/api/1.2/patches/173093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2CrlKlvGbe8zpT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:41:34","name":"i386: Fix rtl checking ICE in ix86_elim_entry_set_got [PR112837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2CrlKlvGbe8zpT@tucnak/mbox/"},{"id":173096,"url":"https://patchwork.plctlab.org/api/1.2/patches/173096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204074823.17970-1-kito.cheng@sifive.com/","msgid":"<20231204074823.17970-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T07:48:23","name":"RISC-V: Check if zcd conflicts with zcmt and zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204074823.17970-1-kito.cheng@sifive.com/mbox/"},{"id":173123,"url":"https://patchwork.plctlab.org/api/1.2/patches/173123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204080907.444794-1-pan2.li@intel.com/","msgid":"<20231204080907.444794-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-04T08:09:07","name":"[v1] RISC-V: Add test case for bug PR112813","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204080907.444794-1-pan2.li@intel.com/mbox/"},{"id":173140,"url":"https://patchwork.plctlab.org/api/1.2/patches/173140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204085106.400729-1-juzhe.zhong@rivai.ai/","msgid":"<20231204085106.400729-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T08:51:06","name":"RISC-V: Remove earlyclobber from widen reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204085106.400729-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173150,"url":"https://patchwork.plctlab.org/api/1.2/patches/173150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093506.E9DA913588@imap2.dmz-prg2.suse.org/","msgid":"<20231204093506.E9DA913588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T09:35:06","name":"[1/2,RFC] middle-end/112830 - memcpy expansion drops address-spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093506.E9DA913588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173153,"url":"https://patchwork.plctlab.org/api/1.2/patches/173153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093538.661DF13588@imap2.dmz-prg2.suse.org/","msgid":"<20231204093538.661DF13588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T09:35:38","name":"[2/2] middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093538.661DF13588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173180,"url":"https://patchwork.plctlab.org/api/1.2/patches/173180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b40da958-d5ee-817b-3e0c-30cb4bc3a091@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T09:49:17","name":"range: Workaround different type precision issue between _Float128 and long double [PR112788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b40da958-d5ee-817b-3e0c-30cb4bc3a091@linux.ibm.com/mbox/"},{"id":173183,"url":"https://patchwork.plctlab.org/api/1.2/patches/173183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204095500.1569673-1-christoph.muellner@vrull.eu/","msgid":"<20231204095500.1569673-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-04T09:55:00","name":"[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204095500.1569673-1-christoph.muellner@vrull.eu/mbox/"},{"id":173189,"url":"https://patchwork.plctlab.org/api/1.2/patches/173189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR0102MB348749DE7F642DFC46298CEBE186A@SN6PR0102MB3487.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:05:05","name":"tree-optimization/PR112774 - SCEV: extend the chrec tree with a nonwrapping flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR0102MB348749DE7F642DFC46298CEBE186A@SN6PR0102MB3487.prod.exchangelabs.com/mbox/"},{"id":173195,"url":"https://patchwork.plctlab.org/api/1.2/patches/173195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101142.411128-1-juzhe.zhong@rivai.ai/","msgid":"<20231204101142.411128-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T10:11:42","name":"RISC-V: Support highest-number regno overlap for widen ternary vx instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101142.411128-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173200,"url":"https://patchwork.plctlab.org/api/1.2/patches/173200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101408.570468-1-stefansf@linux.ibm.com/","msgid":"<20231204101408.570468-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-12-04T10:14:08","name":"s390: Fix expansion of vec_step","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101408.570468-1-stefansf@linux.ibm.com/mbox/"},{"id":173209,"url":"https://patchwork.plctlab.org/api/1.2/patches/173209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddwmtus1y1.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:21:26","name":"libiberty: Fix pex_unix_wait return type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddwmtus1y1.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173216,"url":"https://patchwork.plctlab.org/api/1.2/patches/173216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf4is1p2.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:26:49","name":"gm2: Fix mc/mc.flex compilation on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf4is1p2.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173217,"url":"https://patchwork.plctlab.org/api/1.2/patches/173217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddleaas1e1.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:33:26","name":"ada: Fix Ada bootstrap on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddleaas1e1.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173218,"url":"https://patchwork.plctlab.org/api/1.2/patches/173218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddh6kys0zi.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:42:09","name":"libssp: Fix gets-chk.c compilation on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddh6kys0zi.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173221,"url":"https://patchwork.plctlab.org/api/1.2/patches/173221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com/","msgid":"<005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com>","list_archive_url":null,"date":"2023-12-04T10:55:14","name":"expmed: Perform mask extraction via QImode [PR112773].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com/mbox/"},{"id":173235,"url":"https://patchwork.plctlab.org/api/1.2/patches/173235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204115340.CA9C813588@imap2.dmz-prg2.suse.org/","msgid":"<20231204115340.CA9C813588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T11:53:40","name":"tree-optimization/112827 - corrupt SCEV cache during SCCP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204115340.CA9C813588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173257,"url":"https://patchwork.plctlab.org/api/1.2/patches/173257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204121433.54245-1-chenxiaolong@loongson.cn/","msgid":"<20231204121433.54245-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-04T12:14:33","name":"[v1] LoongArch: Modify the check type of the vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204121433.54245-1-chenxiaolong@loongson.cn/mbox/"},{"id":173271,"url":"https://patchwork.plctlab.org/api/1.2/patches/173271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org/","msgid":"<20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T12:34:44","name":"c/86869 - preserve address-space info when building qualified ARRAY_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":173302,"url":"https://patchwork.plctlab.org/api/1.2/patches/173302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/157b3c54-d18f-4908-b20b-b6726545b999@gmail.com/","msgid":"<157b3c54-d18f-4908-b20b-b6726545b999@gmail.com>","list_archive_url":null,"date":"2023-12-04T13:17:43","name":"RISC-V: Fix two testscases related to -std changes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/157b3c54-d18f-4908-b20b-b6726545b999@gmail.com/mbox/"},{"id":173303,"url":"https://patchwork.plctlab.org/api/1.2/patches/173303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleaa6r6u.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T13:19:21","name":"Restore build with GCC 4.8 to GCC 5 (was Re: [PATCH] Workaround array_slice constructor portability issues (with older g++).)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleaa6r6u.fsf_-_@arm.com/mbox/"},{"id":173320,"url":"https://patchwork.plctlab.org/api/1.2/patches/173320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org/","msgid":"<20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T13:24:29","name":"c/89270 - honor registered_builtin_types in type_for_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173330,"url":"https://patchwork.plctlab.org/api/1.2/patches/173330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132549.809D513588@imap2.dmz-prg2.suse.org/","msgid":"<20231204132549.809D513588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T13:25:49","name":"tree-optimization/112818 - re-instantiate vector type size check for bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132549.809D513588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173337,"url":"https://patchwork.plctlab.org/api/1.2/patches/173337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204133206.444790-1-juzhe.zhong@rivai.ai/","msgid":"<20231204133206.444790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T13:32:06","name":"[V2] RISC-V: Support highest-number regno overlap for widen ternary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204133206.444790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173344,"url":"https://patchwork.plctlab.org/api/1.2/patches/173344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204134456.453587-1-juzhe.zhong@rivai.ai/","msgid":"<20231204134456.453587-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T13:44:56","name":"[Committed,V2] RISC-V: Fix overlap group incorrect overlap on v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204134456.453587-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173402,"url":"https://patchwork.plctlab.org/api/1.2/patches/173402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org/","msgid":"<20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T14:33:41","name":"middle-end/112785 - guard against last_clique overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":173486,"url":"https://patchwork.plctlab.org/api/1.2/patches/173486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204164231.784822-1-hawkinsw@obs.cr/","msgid":"<20231204164231.784822-1-hawkinsw@obs.cr>","list_archive_url":null,"date":"2023-12-04T16:42:31","name":"libstdc++: Add test for LWG Issue 3897","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204164231.784822-1-hawkinsw@obs.cr/mbox/"},{"id":173464,"url":"https://patchwork.plctlab.org/api/1.2/patches/173464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com/","msgid":"<2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com>","list_archive_url":null,"date":"2023-12-04T17:09:19","name":"[committed] Fix HImode load mnemonic on microblaze port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com/mbox/"},{"id":173490,"url":"https://patchwork.plctlab.org/api/1.2/patches/173490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204180042.12450-1-manos.anagnostakis@vrull.eu/","msgid":"<20231204180042.12450-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-04T18:00:42","name":"[v4] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204180042.12450-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":173565,"url":"https://patchwork.plctlab.org/api/1.2/patches/173565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW41P9Vh3DjB0BYE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T20:23:27","name":"[v7] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW41P9Vh3DjB0BYE@redhat.com/mbox/"},{"id":173604,"url":"https://patchwork.plctlab.org/api/1.2/patches/173604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234129.1445044-1-jason@redhat.com/","msgid":"<20231204234129.1445044-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-04T23:41:29","name":"[pushed] c++: fix constexpr noreturn diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234129.1445044-1-jason@redhat.com/mbox/"},{"id":173605,"url":"https://patchwork.plctlab.org/api/1.2/patches/173605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234715.9773-1-david.faust@oracle.com/","msgid":"<20231204234715.9773-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-12-04T23:47:15","name":"btf: avoid wrong DATASEC entries for extern vars [PR112849]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234715.9773-1-david.faust@oracle.com/mbox/"},{"id":173626,"url":"https://patchwork.plctlab.org/api/1.2/patches/173626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW5yUyoZa6jJUfzU@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T00:44:03","name":"[v8] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW5yUyoZa6jJUfzU@redhat.com/mbox/"},{"id":173627,"url":"https://patchwork.plctlab.org/api/1.2/patches/173627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205005541.38072-1-vincenzopalazzodev@gmail.com/","msgid":"<20231205005541.38072-1-vincenzopalazzodev@gmail.com>","list_archive_url":null,"date":"2023-12-05T00:55:37","name":"[RFC,1/1] nix: add a simple flake nix shell","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205005541.38072-1-vincenzopalazzodev@gmail.com/mbox/"},{"id":173688,"url":"https://patchwork.plctlab.org/api/1.2/patches/173688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-2-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:32","name":"[01/17,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-2-hongyu.wang@intel.com/mbox/"},{"id":173685,"url":"https://patchwork.plctlab.org/api/1.2/patches/173685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-3-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:33","name":"[02/17,APX,NDD] Restrict TImode register usage when NDD enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-3-hongyu.wang@intel.com/mbox/"},{"id":173681,"url":"https://patchwork.plctlab.org/api/1.2/patches/173681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-4-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:34","name":"[03/17,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-4-hongyu.wang@intel.com/mbox/"},{"id":173677,"url":"https://patchwork.plctlab.org/api/1.2/patches/173677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-5-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:35","name":"[04/17,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-5-hongyu.wang@intel.com/mbox/"},{"id":173690,"url":"https://patchwork.plctlab.org/api/1.2/patches/173690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-6-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:36","name":"[05/17,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-6-hongyu.wang@intel.com/mbox/"},{"id":173679,"url":"https://patchwork.plctlab.org/api/1.2/patches/173679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-7-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:37","name":"[06/17,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-7-hongyu.wang@intel.com/mbox/"},{"id":173682,"url":"https://patchwork.plctlab.org/api/1.2/patches/173682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-9-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:39","name":"[08/17,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-9-hongyu.wang@intel.com/mbox/"},{"id":173686,"url":"https://patchwork.plctlab.org/api/1.2/patches/173686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-10-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:40","name":"[09/17,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-10-hongyu.wang@intel.com/mbox/"},{"id":173689,"url":"https://patchwork.plctlab.org/api/1.2/patches/173689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-11-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:41","name":"[10/17,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-11-hongyu.wang@intel.com/mbox/"},{"id":173687,"url":"https://patchwork.plctlab.org/api/1.2/patches/173687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-12-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:42","name":"[11/17,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-12-hongyu.wang@intel.com/mbox/"},{"id":173695,"url":"https://patchwork.plctlab.org/api/1.2/patches/173695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-13-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:43","name":"[12/17,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-13-hongyu.wang@intel.com/mbox/"},{"id":173706,"url":"https://patchwork.plctlab.org/api/1.2/patches/173706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-14-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:44","name":"[13/17,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-14-hongyu.wang@intel.com/mbox/"},{"id":173694,"url":"https://patchwork.plctlab.org/api/1.2/patches/173694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-15-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:45","name":"[14/17,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-15-hongyu.wang@intel.com/mbox/"},{"id":173703,"url":"https://patchwork.plctlab.org/api/1.2/patches/173703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-16-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:46","name":"[15/17,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-16-hongyu.wang@intel.com/mbox/"},{"id":173680,"url":"https://patchwork.plctlab.org/api/1.2/patches/173680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-17-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:47","name":"[16/17,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-17-hongyu.wang@intel.com/mbox/"},{"id":173691,"url":"https://patchwork.plctlab.org/api/1.2/patches/173691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-18-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-18-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:48","name":"[17/17,APX,NDD] Support TImode shift for NDD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-18-hongyu.wang@intel.com/mbox/"},{"id":173676,"url":"https://patchwork.plctlab.org/api/1.2/patches/173676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-2-chenglulu@loongson.cn/","msgid":"<20231205023019.32452-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-05T02:30:18","name":"[v2,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-2-chenglulu@loongson.cn/mbox/"},{"id":173678,"url":"https://patchwork.plctlab.org/api/1.2/patches/173678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-3-chenglulu@loongson.cn/","msgid":"<20231205023019.32452-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-05T02:30:19","name":"[v2,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-3-chenglulu@loongson.cn/mbox/"},{"id":173712,"url":"https://patchwork.plctlab.org/api/1.2/patches/173712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205032250.1270125-1-juzhe.zhong@rivai.ai/","msgid":"<20231205032250.1270125-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-05T03:22:50","name":"RISC-V: Add blocker for gather/scatter auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205032250.1270125-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173740,"url":"https://patchwork.plctlab.org/api/1.2/patches/173740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205064435.61292-1-chenxiaolong@loongson.cn/","msgid":"<20231205064435.61292-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-05T06:44:35","name":"[v2] LoongArch: Add asm modifiers to the LSX and LASX directives in the doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205064435.61292-1-chenxiaolong@loongson.cn/mbox/"},{"id":173742,"url":"https://patchwork.plctlab.org/api/1.2/patches/173742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7JaQLM06KIRzzO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T06:55:37","name":"c++: Further #pragma GCC unroll C++ fix [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7JaQLM06KIRzzO@tucnak/mbox/"},{"id":173748,"url":"https://patchwork.plctlab.org/api/1.2/patches/173748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7KsNfUi1xWiLqA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:01:04","name":"i386: Improve code generation for vector __builtin_signbit (x.x[i]) ? -1 : 0 [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7KsNfUi1xWiLqA@tucnak/mbox/"},{"id":173751,"url":"https://patchwork.plctlab.org/api/1.2/patches/173751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-2-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:43","name":"[v2,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-2-xujiahao@loongson.cn/mbox/"},{"id":173750,"url":"https://patchwork.plctlab.org/api/1.2/patches/173750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-3-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:44","name":"[v2,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-3-xujiahao@loongson.cn/mbox/"},{"id":173752,"url":"https://patchwork.plctlab.org/api/1.2/patches/173752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-4-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:45","name":"[v2,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-4-xujiahao@loongson.cn/mbox/"},{"id":173753,"url":"https://patchwork.plctlab.org/api/1.2/patches/173753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-5-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-5-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:46","name":"[v2,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-5-xujiahao@loongson.cn/mbox/"},{"id":173754,"url":"https://patchwork.plctlab.org/api/1.2/patches/173754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-6-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-6-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:47","name":"[v2,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-6-xujiahao@loongson.cn/mbox/"},{"id":173749,"url":"https://patchwork.plctlab.org/api/1.2/patches/173749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070152.38360-1-ishitatsuyuki@gmail.com/","msgid":"<20231205070152.38360-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-12-05T07:01:52","name":"[v4] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070152.38360-1-ishitatsuyuki@gmail.com/mbox/"},{"id":173756,"url":"https://patchwork.plctlab.org/api/1.2/patches/173756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Pa/CMxK3y4X/q@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:21:15","name":"lower-bitint: Make temporarily wrong IL less wrong [PR112843]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Pa/CMxK3y4X/q@tucnak/mbox/"},{"id":173758,"url":"https://patchwork.plctlab.org/api/1.2/patches/173758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205072952.8E9B63857022@sourceware.org/","msgid":"<20231205072952.8E9B63857022@sourceware.org>","list_archive_url":null,"date":"2023-12-05T07:25:43","name":"tree-optimization/112827 - more SCEV cprop fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205072952.8E9B63857022@sourceware.org/mbox/"},{"id":173757,"url":"https://patchwork.plctlab.org/api/1.2/patches/173757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Q+r/AEiTcoPYO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:27:54","name":"i386: Fix -fcf-protection -Os ICE due to movabsq peephole2 [PR112845]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Q+r/AEiTcoPYO@tucnak/mbox/"},{"id":173767,"url":"https://patchwork.plctlab.org/api/1.2/patches/173767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7T8HZqnnI2FXJQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:40:32","name":"c++: Implement C++ DR 2262 - Attributes for asm-definition [PR110734]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7T8HZqnnI2FXJQ@tucnak/mbox/"},{"id":173775,"url":"https://patchwork.plctlab.org/api/1.2/patches/173775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Wl3w5VO475hHc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:51:51","name":"c++: Fix parsing [[]][[]];","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Wl3w5VO475hHc@tucnak/mbox/"},{"id":173779,"url":"https://patchwork.plctlab.org/api/1.2/patches/173779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Zs6KdXyx1k+K1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T08:05:07","name":"lower-bitint, v2: Make temporarily wrong IL less wrong [PR112843]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Zs6KdXyx1k+K1@tucnak/mbox/"},{"id":173788,"url":"https://patchwork.plctlab.org/api/1.2/patches/173788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-1-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:44","name":"[1/5,V3,ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-1-gaofei@eswincomputing.com/mbox/"},{"id":173789,"url":"https://patchwork.plctlab.org/api/1.2/patches/173789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-3-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:46","name":"[3/5,ifcvt] optimize x=c ? (y AND z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-3-gaofei@eswincomputing.com/mbox/"},{"id":173790,"url":"https://patchwork.plctlab.org/api/1.2/patches/173790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-4-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:47","name":"[4/5,ifcvt] optimize x=c ? (y op const_int) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-4-gaofei@eswincomputing.com/mbox/"},{"id":173791,"url":"https://patchwork.plctlab.org/api/1.2/patches/173791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-5-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-5-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:48","name":"[5/5,ifcvt] optimize extension for x=c ? (y op z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-5-gaofei@eswincomputing.com/mbox/"},{"id":173792,"url":"https://patchwork.plctlab.org/api/1.2/patches/173792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205082237.16713-1-xuli1@eswincomputing.com/","msgid":"<20231205082237.16713-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:22:37","name":"RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205082237.16713-1-xuli1@eswincomputing.com/mbox/"},{"id":173797,"url":"https://patchwork.plctlab.org/api/1.2/patches/173797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083139.5D23C384F9BB@sourceware.org/","msgid":"<20231205083139.5D23C384F9BB@sourceware.org>","list_archive_url":null,"date":"2023-12-05T08:27:18","name":"tree-optimization/112843 - update_stmt doing wrong things","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083139.5D23C384F9BB@sourceware.org/mbox/"},{"id":173805,"url":"https://patchwork.plctlab.org/api/1.2/patches/173805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083804.27652-1-xuli1@eswincomputing.com/","msgid":"<20231205083804.27652-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:38:04","name":"[v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083804.27652-1-xuli1@eswincomputing.com/mbox/"},{"id":173831,"url":"https://patchwork.plctlab.org/api/1.2/patches/173831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5qp3shy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:31:37","name":"[pushed] Allow prologues and epilogues to be inserted later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5qp3shy.fsf@arm.com/mbox/"},{"id":173832,"url":"https://patchwork.plctlab.org/api/1.2/patches/173832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qc15728.fsf@euler.schwinge.homeip.net/","msgid":"<871qc15728.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-05T09:31:43","name":"[v2] c: Turn -Wimplicit-function-declaration into a permerror: Fix '\''gcc.dg/gnu23-builtins-no-dfp-1.c'\'' (was: [committed] Fix gnu23-builtins-no-dfp)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qc15728.fsf@euler.schwinge.homeip.net/mbox/"},{"id":173841,"url":"https://patchwork.plctlab.org/api/1.2/patches/173841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wmtt3sam.fsf@euler.schwinge.homeip.net/","msgid":"<87wmtt3sam.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-05T09:36:01","name":"Modula-2: Support '\''-isysroot [...]'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wmtt3sam.fsf@euler.schwinge.homeip.net/mbox/"},{"id":173842,"url":"https://patchwork.plctlab.org/api/1.2/patches/173842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jgx3s8r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:37:08","name":"Add a target hook for sibcall epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jgx3s8r.fsf@arm.com/mbox/"},{"id":173851,"url":"https://patchwork.plctlab.org/api/1.2/patches/173851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1e92da6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:45:37","name":"Add a new target hook: TARGET_START_CALL_ARGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1e92da6.fsf@arm.com/mbox/"},{"id":173862,"url":"https://patchwork.plctlab.org/api/1.2/patches/173862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4h2cuo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:54:55","name":"[pushed] Allow targets to add USEs to asms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4h2cuo.fsf@arm.com/mbox/"},{"id":173894,"url":"https://patchwork.plctlab.org/api/1.2/patches/173894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-2-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:12:59","name":"[pushed,v2,01/25] aarch64: Generalise require_immediate_lane_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-2-richard.sandiford@arm.com/mbox/"},{"id":173896,"url":"https://patchwork.plctlab.org/api/1.2/patches/173896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-3-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:00","name":"[pushed,v2,02/25] aarch64: Use SVE'\''s RDVL instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-3-richard.sandiford@arm.com/mbox/"},{"id":173895,"url":"https://patchwork.plctlab.org/api/1.2/patches/173895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-4-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:01","name":"[pushed,v2,03/25] aarch64: Make AARCH64_FL_SVE requirements explicit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-4-richard.sandiford@arm.com/mbox/"},{"id":173897,"url":"https://patchwork.plctlab.org/api/1.2/patches/173897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-5-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:02","name":"[pushed,v2,04/25] aarch64: Add group suffixes to SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-5-richard.sandiford@arm.com/mbox/"},{"id":173903,"url":"https://patchwork.plctlab.org/api/1.2/patches/173903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-7-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:04","name":"[pushed,v2,06/25] aarch64: Generalise some SVE ACLE error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-7-richard.sandiford@arm.com/mbox/"},{"id":173902,"url":"https://patchwork.plctlab.org/api/1.2/patches/173902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-8-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-8-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:05","name":"[pushed,v2,07/25] aarch64: Replace vague \"previous arguments\" message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-8-richard.sandiford@arm.com/mbox/"},{"id":173899,"url":"https://patchwork.plctlab.org/api/1.2/patches/173899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-10-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-10-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:07","name":"[pushed,v2,09/25] aarch64: Tweak error message for (tuple, vector) pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-10-richard.sandiford@arm.com/mbox/"},{"id":173900,"url":"https://patchwork.plctlab.org/api/1.2/patches/173900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-11-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-11-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:08","name":"[pushed,v2,10/25] aarch64: Add tuple forms of svreinterpret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-11-richard.sandiford@arm.com/mbox/"},{"id":173904,"url":"https://patchwork.plctlab.org/api/1.2/patches/173904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-12-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-12-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:09","name":"[pushed,v2,11/25] aarch64: Add arm_streaming(_compatible) attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-12-richard.sandiford@arm.com/mbox/"},{"id":173907,"url":"https://patchwork.plctlab.org/api/1.2/patches/173907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-14-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-14-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:11","name":"[pushed,v2,13/25] aarch64: Distinguish streaming-compatible AdvSIMD insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-14-richard.sandiford@arm.com/mbox/"},{"id":173912,"url":"https://patchwork.plctlab.org/api/1.2/patches/173912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-15-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-15-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:12","name":"[pushed,v2,14/25] aarch64: Mark relevant SVE instructions as non-streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-15-richard.sandiford@arm.com/mbox/"},{"id":173908,"url":"https://patchwork.plctlab.org/api/1.2/patches/173908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-16-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-16-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:13","name":"[pushed,v2,15/25] aarch64: Switch PSTATE.SM around calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-16-richard.sandiford@arm.com/mbox/"},{"id":173910,"url":"https://patchwork.plctlab.org/api/1.2/patches/173910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-17-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-17-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:14","name":"[pushed,v2,16/25] aarch64: Add support for SME ZA attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-17-richard.sandiford@arm.com/mbox/"},{"id":173905,"url":"https://patchwork.plctlab.org/api/1.2/patches/173905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-18-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-18-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:15","name":"[pushed,v2,17/25] aarch64: Add a register class for w12-w15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-18-richard.sandiford@arm.com/mbox/"},{"id":173906,"url":"https://patchwork.plctlab.org/api/1.2/patches/173906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-19-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-19-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:16","name":"[pushed,v2,18/25] aarch64: Add a VNx1TI mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-19-richard.sandiford@arm.com/mbox/"},{"id":173911,"url":"https://patchwork.plctlab.org/api/1.2/patches/173911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-20-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-20-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:17","name":"[pushed,v2,19/25] aarch64: Generalise unspec_based_function_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-20-richard.sandiford@arm.com/mbox/"},{"id":173915,"url":"https://patchwork.plctlab.org/api/1.2/patches/173915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-21-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-21-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:18","name":"[pushed,v2,20/25] aarch64: Generalise _m rules for SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-21-richard.sandiford@arm.com/mbox/"},{"id":173917,"url":"https://patchwork.plctlab.org/api/1.2/patches/173917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-22-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-22-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:19","name":"[pushed,v2,21/25] aarch64: Add support for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-22-richard.sandiford@arm.com/mbox/"},{"id":173901,"url":"https://patchwork.plctlab.org/api/1.2/patches/173901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-23-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-23-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:20","name":"[pushed,v2,22/25] aarch64: Add support for __arm_locally_streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-23-richard.sandiford@arm.com/mbox/"},{"id":173913,"url":"https://patchwork.plctlab.org/api/1.2/patches/173913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-24-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-24-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:21","name":"[pushed,v2,23/25] aarch64: Handle PSTATE.SM across abnormal edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-24-richard.sandiford@arm.com/mbox/"},{"id":173914,"url":"https://patchwork.plctlab.org/api/1.2/patches/173914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-25-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-25-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:22","name":"[pushed,v2,24/25] aarch64: Enforce inlining restrictions for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-25-richard.sandiford@arm.com/mbox/"},{"id":173916,"url":"https://patchwork.plctlab.org/api/1.2/patches/173916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-26-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-26-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:23","name":"[pushed,v2,25/25] aarch64: Update sibcall handling for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-26-richard.sandiford@arm.com/mbox/"},{"id":173918,"url":"https://patchwork.plctlab.org/api/1.2/patches/173918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-2-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:24:59","name":"[pushed,v2,1/5] aarch64: Add +sme2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-2-richard.sandiford@arm.com/mbox/"},{"id":173920,"url":"https://patchwork.plctlab.org/api/1.2/patches/173920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-3-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:00","name":"[pushed,v2,2/5] aarch64: Add svcount_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-3-richard.sandiford@arm.com/mbox/"},{"id":173919,"url":"https://patchwork.plctlab.org/api/1.2/patches/173919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-4-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:01","name":"[pushed,v2,3/5] aarch64: Add svboolx2_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-4-richard.sandiford@arm.com/mbox/"},{"id":173921,"url":"https://patchwork.plctlab.org/api/1.2/patches/173921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-5-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:02","name":"[pushed,v2,4/5] aarch64: Add ZT0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-5-richard.sandiford@arm.com/mbox/"},{"id":173922,"url":"https://patchwork.plctlab.org/api/1.2/patches/173922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW78YWaxl9JCrqMh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:33:05","name":"libgfortran: Fix -Wincompatible-pointer-types errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW78YWaxl9JCrqMh@tucnak/mbox/"},{"id":173960,"url":"https://patchwork.plctlab.org/api/1.2/patches/173960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8BTQWe6/1wk+Qo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:54:05","name":"[v2,06/11] aarch64: Fix up aarch64_print_operand xzr/wzr case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8BTQWe6/1wk+Qo@arm.com/mbox/"},{"id":173964,"url":"https://patchwork.plctlab.org/api/1.2/patches/173964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CJOWPBqyA/uqm@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:57:40","name":"[v2,09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CJOWPBqyA/uqm@arm.com/mbox/"},{"id":173963,"url":"https://patchwork.plctlab.org/api/1.2/patches/173963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CM4RO7kxacSjh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:57:55","name":"driver: Fix bootstrap with --enable-default-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CM4RO7kxacSjh@tucnak/mbox/"},{"id":173980,"url":"https://patchwork.plctlab.org/api/1.2/patches/173980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8HrtwZd4pBIjty@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T11:21:18","name":"[v2,08/11] aarch64: Generalize writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8HrtwZd4pBIjty@arm.com/mbox/"},{"id":174017,"url":"https://patchwork.plctlab.org/api/1.2/patches/174017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-2-shihua@iscas.ac.cn/","msgid":"<20231205120312.2821765-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-05T12:03:11","name":"[1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-2-shihua@iscas.ac.cn/mbox/"},{"id":174018,"url":"https://patchwork.plctlab.org/api/1.2/patches/174018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-3-shihua@iscas.ac.cn/","msgid":"<20231205120312.2821765-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-05T12:03:12","name":"[2/2] RISC-V: Add C intrinsics of Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-3-shihua@iscas.ac.cn/mbox/"},{"id":174042,"url":"https://patchwork.plctlab.org/api/1.2/patches/174042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205125727.1805615-1-juzhe.zhong@rivai.ai/","msgid":"<20231205125727.1805615-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-05T12:57:27","name":"RISC-V: Block VLSmodes according to TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205125727.1805615-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174047,"url":"https://patchwork.plctlab.org/api/1.2/patches/174047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131449.71AAD3857437@sourceware.org/","msgid":"<20231205131449.71AAD3857437@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:10:39","name":"tree-optimization/112856 - fix LC SSA after loop header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131449.71AAD3857437@sourceware.org/mbox/"},{"id":174048,"url":"https://patchwork.plctlab.org/api/1.2/patches/174048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131539.8FFE73857BA7@sourceware.org/","msgid":"<20231205131539.8FFE73857BA7@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:11:27","name":"middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131539.8FFE73857BA7@sourceware.org/mbox/"},{"id":174057,"url":"https://patchwork.plctlab.org/api/1.2/patches/174057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135854.970253858032@sourceware.org/","msgid":"<20231205135854.970253858032@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:54:45","name":"ipa/92606 - IPA ICF merging variables in different address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135854.970253858032@sourceware.org/mbox/"},{"id":174058,"url":"https://patchwork.plctlab.org/api/1.2/patches/174058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135923.72256385C6FD@sourceware.org/","msgid":"<20231205135923.72256385C6FD@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:55:05","name":"sanitizer/111736 - skip ASAN for globals in alternate address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135923.72256385C6FD@sourceware.org/mbox/"},{"id":174059,"url":"https://patchwork.plctlab.org/api/1.2/patches/174059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com/","msgid":"<007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-05T13:59:48","name":"[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com/mbox/"},{"id":174063,"url":"https://patchwork.plctlab.org/api/1.2/patches/174063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205142220.CDC273853337@sourceware.org/","msgid":"<20231205142220.CDC273853337@sourceware.org>","list_archive_url":null,"date":"2023-12-05T14:18:05","name":"middle-end/112860 - -fgimple can skip ISEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205142220.CDC273853337@sourceware.org/mbox/"},{"id":174065,"url":"https://patchwork.plctlab.org/api/1.2/patches/174065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205143016.17956-1-manos.anagnostakis@vrull.eu/","msgid":"<20231205143016.17956-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-05T14:30:16","name":"[v5] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205143016.17956-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":174073,"url":"https://patchwork.plctlab.org/api/1.2/patches/174073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205150946.3542939-1-victor.donascimento@arm.com/","msgid":"<20231205150946.3542939-1-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-12-05T15:09:41","name":"[v3] aarch64: Implement the ACLE instruction/data prefetch functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205150946.3542939-1-victor.donascimento@arm.com/mbox/"},{"id":174075,"url":"https://patchwork.plctlab.org/api/1.2/patches/174075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com/","msgid":"<6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com>","list_archive_url":null,"date":"2023-12-05T15:13:22","name":"RISC-V: Add vec_init expander for masks [PR112854].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com/mbox/"},{"id":174077,"url":"https://patchwork.plctlab.org/api/1.2/patches/174077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151631.3202932-1-christoph.muellner@vrull.eu/","msgid":"<20231205151631.3202932-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-05T15:16:31","name":"RISC-V: xtheadfmemidx: Disable if xtheadmemidx is not available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151631.3202932-1-christoph.muellner@vrull.eu/mbox/"},{"id":174078,"url":"https://patchwork.plctlab.org/api/1.2/patches/174078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151644.3203029-1-christoph.muellner@vrull.eu/","msgid":"<20231205151644.3203029-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-05T15:16:44","name":"RISC-V: xtheadmemidx: Document inline asm issue with memory constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151644.3203029-1-christoph.muellner@vrull.eu/mbox/"},{"id":174106,"url":"https://patchwork.plctlab.org/api/1.2/patches/174106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9JwlgLTEUHgY/y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T16:03:14","name":"c++, v2: Further #pragma GCC unroll C++ fix [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9JwlgLTEUHgY/y@tucnak/mbox/"},{"id":174112,"url":"https://patchwork.plctlab.org/api/1.2/patches/174112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205164151.27101-1-egallager@gcc.gnu.org/","msgid":"<20231205164151.27101-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-05T16:41:52","name":"remove qmtest-related Makefile targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205164151.27101-1-egallager@gcc.gnu.org/mbox/"},{"id":174151,"url":"https://patchwork.plctlab.org/api/1.2/patches/174151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205165002.565846-1-jwakely@redhat.com/","msgid":"<20231205165002.565846-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-05T16:49:40","name":"[committed] libstdc++: Disable std::formatter::set_debug_format [PR112832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205165002.565846-1-jwakely@redhat.com/mbox/"},{"id":174138,"url":"https://patchwork.plctlab.org/api/1.2/patches/174138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9XL+ac5rY9XbF9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T17:00:31","name":"c++, v2: Fix parsing [[]][[]];","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9XL+ac5rY9XbF9@tucnak/mbox/"},{"id":174147,"url":"https://patchwork.plctlab.org/api/1.2/patches/174147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com/","msgid":"<4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com>","list_archive_url":null,"date":"2023-12-05T17:29:10","name":"tsystem.h: Declare calloc/realloc #ifdef inhibit_libc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com/mbox/"},{"id":174169,"url":"https://patchwork.plctlab.org/api/1.2/patches/174169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205184929.76195-1-polacek@redhat.com/","msgid":"<20231205184929.76195-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-05T18:49:29","name":"build: unbreak bootstrap on uclinux targets [PR112762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205184929.76195-1-polacek@redhat.com/mbox/"},{"id":174175,"url":"https://patchwork.plctlab.org/api/1.2/patches/174175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com/","msgid":"<206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:30:14","name":"aarch64: Add missing driver-aarch64 dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com/mbox/"},{"id":174176,"url":"https://patchwork.plctlab.org/api/1.2/patches/174176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com/","msgid":"<0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:32:43","name":"aarch64 testsuite: Check entire .arch string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com/mbox/"},{"id":174178,"url":"https://patchwork.plctlab.org/api/1.2/patches/174178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com/","msgid":"<58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:33:33","name":"aarch64: Fix +nocrypto handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com/mbox/"},{"id":174180,"url":"https://patchwork.plctlab.org/api/1.2/patches/174180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd8d2cd0-35b7-f32d-2c9a-f9ddfb924530@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T19:34:21","name":"aarch64: Fix +nopredres, +nols64 and +nomops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd8d2cd0-35b7-f32d-2c9a-f9ddfb924530@e124511.cambridge.arm.com/mbox/"},{"id":174184,"url":"https://patchwork.plctlab.org/api/1.2/patches/174184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205195619.547273-1-j@lambda.is/","msgid":"<20231205195619.547273-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-05T19:56:19","name":"[v7] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205195619.547273-1-j@lambda.is/mbox/"},{"id":174188,"url":"https://patchwork.plctlab.org/api/1.2/patches/174188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205203136.94832-1-polacek@redhat.com/","msgid":"<20231205203136.94832-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-05T20:31:36","name":"c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205203136.94832-1-polacek@redhat.com/mbox/"},{"id":174208,"url":"https://patchwork.plctlab.org/api/1.2/patches/174208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-2-indu.bhagat@oracle.com/","msgid":"<20231205213632.947369-2-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-12-05T21:36:31","name":"[[PATCH,GCC13] 1/2] bfd: linker: merge .sframe sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-2-indu.bhagat@oracle.com/mbox/"},{"id":174209,"url":"https://patchwork.plctlab.org/api/1.2/patches/174209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-3-indu.bhagat@oracle.com/","msgid":"<20231205213632.947369-3-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-12-05T21:36:32","name":"[[PATCH,GCC13] 2/2] toplevel: Makefile.def: add install-strip dependency on libsframe","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-3-indu.bhagat@oracle.com/mbox/"},{"id":174217,"url":"https://patchwork.plctlab.org/api/1.2/patches/174217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+e17v8kftQKh57@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:06:15","name":"libiberty: Fix build with GCC < 7","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+e17v8kftQKh57@tucnak/mbox/"},{"id":174220,"url":"https://patchwork.plctlab.org/api/1.2/patches/174220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+hoNiyGaXIYKV8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:18:08","name":"lower-bitint: Fix arithmetics followed by extension by many bits [PR112809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+hoNiyGaXIYKV8@tucnak/mbox/"},{"id":174222,"url":"https://patchwork.plctlab.org/api/1.2/patches/174222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+i2GmeDAwxA0ZB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:23:20","name":"i386: Move vzeroupper pass from after reload pass to after postreload_cse [PR112760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+i2GmeDAwxA0ZB@tucnak/mbox/"},{"id":174238,"url":"https://patchwork.plctlab.org/api/1.2/patches/174238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205233450.614809-1-jwakely@redhat.com/","msgid":"<20231205233450.614809-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-05T23:34:27","name":"[committed] libstdc++: Redefine __glibcxx_assert to work in C++23 constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205233450.614809-1-jwakely@redhat.com/mbox/"},{"id":174243,"url":"https://patchwork.plctlab.org/api/1.2/patches/174243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206003906.2945650-1-ewlu@rivosinc.com/","msgid":"<20231206003906.2945650-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-06T00:39:06","name":"RISC-V: Remove xfail from ssa-fre-3.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206003906.2945650-1-ewlu@rivosinc.com/mbox/"},{"id":174270,"url":"https://patchwork.plctlab.org/api/1.2/patches/174270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206015211.682650-1-lhyatt@gmail.com/","msgid":"<20231206015211.682650-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-06T01:52:11","name":"c-family: Fix ICE with large column number after restoring a PCH [PR105608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206015211.682650-1-lhyatt@gmail.com/mbox/"},{"id":174273,"url":"https://patchwork.plctlab.org/api/1.2/patches/174273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg0rshb.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-06T02:10:24","name":"[v8] Introduce attribute sym_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg0rshb.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":174289,"url":"https://patchwork.plctlab.org/api/1.2/patches/174289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022101.1695009-1-jason@redhat.com/","msgid":"<20231206022101.1695009-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-06T02:21:01","name":"[RFA,(libstdc++)] c++: partial ordering of object parameter [PR53499]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022101.1695009-1-jason@redhat.com/mbox/"},{"id":174275,"url":"https://patchwork.plctlab.org/api/1.2/patches/174275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022931.33437-1-yangyujie@loongson.cn/","msgid":"<20231206022931.33437-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-06T02:29:31","name":"testsuite: Adjust for the new permerror -Wincompatible-pointer-types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022931.33437-1-yangyujie@loongson.cn/mbox/"},{"id":174276,"url":"https://patchwork.plctlab.org/api/1.2/patches/174276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-1-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:21","name":"[1/4] RISC-V: Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-1-wangfeng@eswincomputing.com/mbox/"},{"id":174277,"url":"https://patchwork.plctlab.org/api/1.2/patches/174277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-2-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:22","name":"[2/4] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-2-wangfeng@eswincomputing.com/mbox/"},{"id":174278,"url":"https://patchwork.plctlab.org/api/1.2/patches/174278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-3-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:23","name":"[3/4] RISC-V: Add crypto vector machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-3-wangfeng@eswincomputing.com/mbox/"},{"id":174279,"url":"https://patchwork.plctlab.org/api/1.2/patches/174279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-4-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:24","name":"[4/4] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-4-wangfeng@eswincomputing.com/mbox/"},{"id":174290,"url":"https://patchwork.plctlab.org/api/1.2/patches/174290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18055-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T04:03:00","name":"middle-end: correct loop bounds for early breaks and peeled vector loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18055-tamar@arm.com/mbox/"},{"id":174291,"url":"https://patchwork.plctlab.org/api/1.2/patches/174291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18056-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T04:03:33","name":"middle-end: Fix peeled vect loop IV values.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18056-tamar@arm.com/mbox/"},{"id":174293,"url":"https://patchwork.plctlab.org/api/1.2/patches/174293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206044936.16515-1-xuli1@eswincomputing.com/","msgid":"<20231206044936.16515-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T04:49:36","name":"RISC-V: Remove useless modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206044936.16515-1-xuli1@eswincomputing.com/mbox/"},{"id":174295,"url":"https://patchwork.plctlab.org/api/1.2/patches/174295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-1-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:25","name":"[V3,1/3] rs6000: update num_insns_constant for 2 insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-1-guojiufu@linux.ibm.com/mbox/"},{"id":174296,"url":"https://patchwork.plctlab.org/api/1.2/patches/174296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-2-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:26","name":"[V3,2/3] Using pli for constant splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-2-guojiufu@linux.ibm.com/mbox/"},{"id":174297,"url":"https://patchwork.plctlab.org/api/1.2/patches/174297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-3-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:27","name":"[V3,3/3] split complicate constant to memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-3-guojiufu@linux.ibm.com/mbox/"},{"id":174332,"url":"https://patchwork.plctlab.org/api/1.2/patches/174332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206064416.1450871-1-yangyujie@loongson.cn/","msgid":"<20231206064416.1450871-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-06T06:44:16","name":"[v2] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206064416.1450871-1-yangyujie@loongson.cn/mbox/"},{"id":174335,"url":"https://patchwork.plctlab.org/api/1.2/patches/174335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-2-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:49","name":"[v3,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-2-xujiahao@loongson.cn/mbox/"},{"id":174338,"url":"https://patchwork.plctlab.org/api/1.2/patches/174338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-3-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:50","name":"[v3,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-3-xujiahao@loongson.cn/mbox/"},{"id":174336,"url":"https://patchwork.plctlab.org/api/1.2/patches/174336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-4-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:51","name":"[v3,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-4-xujiahao@loongson.cn/mbox/"},{"id":174339,"url":"https://patchwork.plctlab.org/api/1.2/patches/174339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-5-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-5-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:52","name":"[v3,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-5-xujiahao@loongson.cn/mbox/"},{"id":174337,"url":"https://patchwork.plctlab.org/api/1.2/patches/174337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-6-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-6-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:53","name":"[v3,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-6-xujiahao@loongson.cn/mbox/"},{"id":174383,"url":"https://patchwork.plctlab.org/api/1.2/patches/174383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-2-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:21","name":"[01/16,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-2-hongyu.wang@intel.com/mbox/"},{"id":174396,"url":"https://patchwork.plctlab.org/api/1.2/patches/174396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-3-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:22","name":"[02/16,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-3-hongyu.wang@intel.com/mbox/"},{"id":174385,"url":"https://patchwork.plctlab.org/api/1.2/patches/174385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-4-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:23","name":"[03/16,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-4-hongyu.wang@intel.com/mbox/"},{"id":174390,"url":"https://patchwork.plctlab.org/api/1.2/patches/174390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-5-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:24","name":"[04/16,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-5-hongyu.wang@intel.com/mbox/"},{"id":174399,"url":"https://patchwork.plctlab.org/api/1.2/patches/174399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-6-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:25","name":"[05/16,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-6-hongyu.wang@intel.com/mbox/"},{"id":174391,"url":"https://patchwork.plctlab.org/api/1.2/patches/174391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-7-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:26","name":"[06/16,APX,NDD] Support APX NDD for sbb insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-7-hongyu.wang@intel.com/mbox/"},{"id":174393,"url":"https://patchwork.plctlab.org/api/1.2/patches/174393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-8-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:27","name":"[07/16,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-8-hongyu.wang@intel.com/mbox/"},{"id":174382,"url":"https://patchwork.plctlab.org/api/1.2/patches/174382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-9-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:28","name":"[08/16,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-9-hongyu.wang@intel.com/mbox/"},{"id":174392,"url":"https://patchwork.plctlab.org/api/1.2/patches/174392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-10-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:29","name":"[09/16,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-10-hongyu.wang@intel.com/mbox/"},{"id":174389,"url":"https://patchwork.plctlab.org/api/1.2/patches/174389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-11-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:30","name":"[10/16,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-11-hongyu.wang@intel.com/mbox/"},{"id":174397,"url":"https://patchwork.plctlab.org/api/1.2/patches/174397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-12-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:31","name":"[11/16,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-12-hongyu.wang@intel.com/mbox/"},{"id":174398,"url":"https://patchwork.plctlab.org/api/1.2/patches/174398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-13-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:32","name":"[12/16,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-13-hongyu.wang@intel.com/mbox/"},{"id":174401,"url":"https://patchwork.plctlab.org/api/1.2/patches/174401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-14-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:33","name":"[13/16,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-14-hongyu.wang@intel.com/mbox/"},{"id":174395,"url":"https://patchwork.plctlab.org/api/1.2/patches/174395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-15-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:34","name":"[14/16,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-15-hongyu.wang@intel.com/mbox/"},{"id":174394,"url":"https://patchwork.plctlab.org/api/1.2/patches/174394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-16-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:35","name":"[15/16,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-16-hongyu.wang@intel.com/mbox/"},{"id":174400,"url":"https://patchwork.plctlab.org/api/1.2/patches/174400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-17-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:36","name":"[16/16,APX,NDD] Support TImode shift for NDD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-17-hongyu.wang@intel.com/mbox/"},{"id":174406,"url":"https://patchwork.plctlab.org/api/1.2/patches/174406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df01d123-2ae1-4d43-b0c9-2e2f9b5d29e1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T08:13:08","name":"[patch-1v2,rs6000] enable fctiw on old archs [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df01d123-2ae1-4d43-b0c9-2e2f9b5d29e1@linux.ibm.com/mbox/"},{"id":174407,"url":"https://patchwork.plctlab.org/api/1.2/patches/174407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com/","msgid":"<98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T08:13:49","name":"[patch-2v2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com/mbox/"},{"id":174440,"url":"https://patchwork.plctlab.org/api/1.2/patches/174440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206092758.1000447-1-guojiufu@linux.ibm.com/","msgid":"<20231206092758.1000447-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T09:27:58","name":"treat argp-based mem as frame related in dse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206092758.1000447-1-guojiufu@linux.ibm.com/mbox/"},{"id":174441,"url":"https://patchwork.plctlab.org/api/1.2/patches/174441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXBHF0Qggxkoz/ej@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-06T10:04:07","name":"libgcc: Avoid -Wbuiltin-declaration-mismatch warnings in emutls.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXBHF0Qggxkoz/ej@tucnak/mbox/"},{"id":174562,"url":"https://patchwork.plctlab.org/api/1.2/patches/174562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f622a1-4d4d-e79d-8886-339e56b30b7d@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T12:44:26","name":"[1/5] aarch64: Add cpu feature detection to libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f622a1-4d4d-e79d-8886-339e56b30b7d@e124511.cambridge.arm.com/mbox/"},{"id":174563,"url":"https://patchwork.plctlab.org/api/1.2/patches/174563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com/","msgid":"<53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-06T12:45:08","name":"[v3,2/5] c-family: Simplify attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com/mbox/"},{"id":174564,"url":"https://patchwork.plctlab.org/api/1.2/patches/174564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e195769a-c51a-83c1-9b64-42bdd7f21155@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T12:45:53","name":"[v3,3/5] ada: Improve attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e195769a-c51a-83c1-9b64-42bdd7f21155@e124511.cambridge.arm.com/mbox/"},{"id":174565,"url":"https://patchwork.plctlab.org/api/1.2/patches/174565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com/","msgid":"<2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-06T12:47:15","name":"[v3,5/5] aarch64: Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com/mbox/"},{"id":174570,"url":"https://patchwork.plctlab.org/api/1.2/patches/174570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206130351.2573949-1-juzhe.zhong@rivai.ai/","msgid":"<20231206130351.2573949-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T13:03:50","name":"RISC-V: Fix VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206130351.2573949-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174577,"url":"https://patchwork.plctlab.org/api/1.2/patches/174577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206134653.29261-1-manos.anagnostakis@vrull.eu/","msgid":"<20231206134653.29261-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-06T13:46:53","name":"[v6] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206134653.29261-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":174593,"url":"https://patchwork.plctlab.org/api/1.2/patches/174593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCA4SDkDbMT4Gaa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-06T14:10:41","name":"c++: Don'\''t diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCA4SDkDbMT4Gaa@tucnak/mbox/"},{"id":174666,"url":"https://patchwork.plctlab.org/api/1.2/patches/174666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142930.739485-1-jwakely@redhat.com/","msgid":"<20231206142930.739485-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-06T14:18:12","name":"libstdc++: Make __gnu_debug::vector usable in constant expressions [PR109536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142930.739485-1-jwakely@redhat.com/mbox/"},{"id":174601,"url":"https://patchwork.plctlab.org/api/1.2/patches/174601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142646.3402479-1-juzhe.zhong@rivai.ai/","msgid":"<20231206142646.3402479-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T14:26:46","name":"[Committed,V2] RISC-V: Fix VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142646.3402479-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174602,"url":"https://patchwork.plctlab.org/api/1.2/patches/174602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206143444.2760326-1-gb.devel@gmail.com/","msgid":"<20231206143444.2760326-1-gb.devel@gmail.com>","list_archive_url":null,"date":"2023-12-06T14:34:44","name":"libstdc++: Fix testsuite with -Wformat","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206143444.2760326-1-gb.devel@gmail.com/mbox/"},{"id":174644,"url":"https://patchwork.plctlab.org/api/1.2/patches/174644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCWo0zhECpJlU9A@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-06T15:43:31","name":"[committed] Fix c-c++-common/fhardened-[12].c test fails on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCWo0zhECpJlU9A@mx3210.localdomain/mbox/"},{"id":174646,"url":"https://patchwork.plctlab.org/api/1.2/patches/174646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206154833.2878478-1-gb.devel@gmail.com/","msgid":"<20231206154833.2878478-1-gb.devel@gmail.com>","list_archive_url":null,"date":"2023-12-06T15:48:33","name":"c++: Handle '\''#pragma GCC target optimize'\'' early [PR48026]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206154833.2878478-1-gb.devel@gmail.com/mbox/"},{"id":174667,"url":"https://patchwork.plctlab.org/api/1.2/patches/174667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLZaogJSoL7S2T_JKfMU=NAmEee15064K2aktPGttvUow@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T16:09:36","name":"{Patch, fortran] PR112834 - Class array function selector causes chain of syntax and other spurious errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLZaogJSoL7S2T_JKfMU=NAmEee15064K2aktPGttvUow@mail.gmail.com/mbox/"},{"id":174673,"url":"https://patchwork.plctlab.org/api/1.2/patches/174673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com/","msgid":"<24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com>","list_archive_url":null,"date":"2023-12-06T16:50:48","name":"libiberty/buildargv: POSIX behaviour for backslash handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com/mbox/"},{"id":174677,"url":"https://patchwork.plctlab.org/api/1.2/patches/174677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-2-ams@codesourcery.com/","msgid":"<20231206170020.1675302-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:18","name":"[committed,v4,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-2-ams@codesourcery.com/mbox/"},{"id":174675,"url":"https://patchwork.plctlab.org/api/1.2/patches/174675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-3-ams@codesourcery.com/","msgid":"<20231206170020.1675302-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:19","name":"[committed,v4,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-3-ams@codesourcery.com/mbox/"},{"id":174676,"url":"https://patchwork.plctlab.org/api/1.2/patches/174676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-4-ams@codesourcery.com/","msgid":"<20231206170020.1675302-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:20","name":"[committed,v4,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-4-ams@codesourcery.com/mbox/"},{"id":174683,"url":"https://patchwork.plctlab.org/api/1.2/patches/174683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206174245.2462114-1-dmalcolm@redhat.com/","msgid":"<20231206174245.2462114-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-06T17:42:45","name":"[pushed] diagnostics: use const and references for diagnostic_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206174245.2462114-1-dmalcolm@redhat.com/mbox/"},{"id":174687,"url":"https://patchwork.plctlab.org/api/1.2/patches/174687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206175011.2462694-1-dmalcolm@redhat.com/","msgid":"<20231206175011.2462694-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-06T17:50:11","name":"[pushed] v2: diagnostics: prettify JSON output formats","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206175011.2462694-1-dmalcolm@redhat.com/mbox/"},{"id":174707,"url":"https://patchwork.plctlab.org/api/1.2/patches/174707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3350dc3b-3471-453b-b631-810939609ba9@arm.com/","msgid":"<3350dc3b-3471-453b-b631-810939609ba9@arm.com>","list_archive_url":null,"date":"2023-12-06T18:49:23","name":"veclower: improve selection of vector mode when lowering [PR 112787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3350dc3b-3471-453b-b631-810939609ba9@arm.com/mbox/"},{"id":174742,"url":"https://patchwork.plctlab.org/api/1.2/patches/174742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca36c23-78f7-478f-bdce-6bfe0afaf92b-1701894736658@3c-app-gmx-bap48/","msgid":"","list_archive_url":null,"date":"2023-12-06T20:32:16","name":"Fortran: function returning contiguous class array [PR105543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca36c23-78f7-478f-bdce-6bfe0afaf92b-1701894736658@3c-app-gmx-bap48/mbox/"},{"id":174749,"url":"https://patchwork.plctlab.org/api/1.2/patches/174749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org/","msgid":"<9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org>","list_archive_url":null,"date":"2023-12-06T22:33:14","name":"htdocs: correct spelling and use https in examples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org/mbox/"},{"id":174750,"url":"https://patchwork.plctlab.org/api/1.2/patches/174750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206223502.2323591-1-juzhe.zhong@rivai.ai/","msgid":"<20231206223502.2323591-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T22:35:02","name":"[Committed] RISC-V: Fix PR112888 ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206223502.2323591-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174780,"url":"https://patchwork.plctlab.org/api/1.2/patches/174780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206235431.69392-1-polacek@redhat.com/","msgid":"<20231206235431.69392-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-06T23:54:31","name":"aarch64: add -fno-stack-protector to tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206235431.69392-1-polacek@redhat.com/mbox/"},{"id":174815,"url":"https://patchwork.plctlab.org/api/1.2/patches/174815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207002822.2498142-1-dmalcolm@redhat.com/","msgid":"<20231207002822.2498142-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-07T00:28:22","name":"[pushed] analyzer: fix taint false positives with UNKNOWN [PR112850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207002822.2498142-1-dmalcolm@redhat.com/mbox/"},{"id":174872,"url":"https://patchwork.plctlab.org/api/1.2/patches/174872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207014011.1512-2-yangyujie@loongson.cn/","msgid":"<20231207014011.1512-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-07T01:40:11","name":"[v3] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207014011.1512-2-yangyujie@loongson.cn/mbox/"},{"id":174877,"url":"https://patchwork.plctlab.org/api/1.2/patches/174877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-1-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:11","name":"[1/4,v2] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-1-wangfeng@eswincomputing.com/mbox/"},{"id":174879,"url":"https://patchwork.plctlab.org/api/1.2/patches/174879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-2-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:12","name":"[2/4,v2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-2-wangfeng@eswincomputing.com/mbox/"},{"id":174880,"url":"https://patchwork.plctlab.org/api/1.2/patches/174880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-3-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:13","name":"[3/4,v2] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-3-wangfeng@eswincomputing.com/mbox/"},{"id":174881,"url":"https://patchwork.plctlab.org/api/1.2/patches/174881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-4-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:14","name":"[4/4,v2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-4-wangfeng@eswincomputing.com/mbox/"},{"id":174895,"url":"https://patchwork.plctlab.org/api/1.2/patches/174895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpqd6u0.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-07T03:33:59","name":"strub: enable conditional support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpqd6u0.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":174924,"url":"https://patchwork.plctlab.org/api/1.2/patches/174924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-2-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:56","name":"[v26,01/23] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-2-kmatsui@gcc.gnu.org/mbox/"},{"id":174925,"url":"https://patchwork.plctlab.org/api/1.2/patches/174925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-3-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:57","name":"[v26,02/23] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-3-kmatsui@gcc.gnu.org/mbox/"},{"id":174926,"url":"https://patchwork.plctlab.org/api/1.2/patches/174926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-4-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:58","name":"[v26,03/23] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-4-kmatsui@gcc.gnu.org/mbox/"},{"id":174927,"url":"https://patchwork.plctlab.org/api/1.2/patches/174927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-5-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:59","name":"[v26,04/23] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-5-kmatsui@gcc.gnu.org/mbox/"},{"id":174928,"url":"https://patchwork.plctlab.org/api/1.2/patches/174928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-6-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:00","name":"[v26,05/23] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-6-kmatsui@gcc.gnu.org/mbox/"},{"id":174929,"url":"https://patchwork.plctlab.org/api/1.2/patches/174929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-7-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:01","name":"[v26,06/23] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-7-kmatsui@gcc.gnu.org/mbox/"},{"id":174930,"url":"https://patchwork.plctlab.org/api/1.2/patches/174930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-8-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:02","name":"[v26,07/23] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-8-kmatsui@gcc.gnu.org/mbox/"},{"id":174931,"url":"https://patchwork.plctlab.org/api/1.2/patches/174931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-9-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:03","name":"[v26,08/23] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-9-kmatsui@gcc.gnu.org/mbox/"},{"id":174932,"url":"https://patchwork.plctlab.org/api/1.2/patches/174932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-10-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:04","name":"[v26,09/23] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-10-kmatsui@gcc.gnu.org/mbox/"},{"id":174933,"url":"https://patchwork.plctlab.org/api/1.2/patches/174933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-11-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:05","name":"[v26,10/23] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-11-kmatsui@gcc.gnu.org/mbox/"},{"id":174934,"url":"https://patchwork.plctlab.org/api/1.2/patches/174934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-12-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:06","name":"[v26,11/23] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-12-kmatsui@gcc.gnu.org/mbox/"},{"id":174935,"url":"https://patchwork.plctlab.org/api/1.2/patches/174935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-13-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:07","name":"[v26,12/23] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-13-kmatsui@gcc.gnu.org/mbox/"},{"id":174936,"url":"https://patchwork.plctlab.org/api/1.2/patches/174936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-14-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:08","name":"[v26,13/23] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-14-kmatsui@gcc.gnu.org/mbox/"},{"id":174937,"url":"https://patchwork.plctlab.org/api/1.2/patches/174937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-15-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:09","name":"[v26,14/23] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-15-kmatsui@gcc.gnu.org/mbox/"},{"id":174938,"url":"https://patchwork.plctlab.org/api/1.2/patches/174938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-16-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:10","name":"[v26,15/23] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-16-kmatsui@gcc.gnu.org/mbox/"},{"id":174939,"url":"https://patchwork.plctlab.org/api/1.2/patches/174939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-17-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:11","name":"[v26,16/23] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-17-kmatsui@gcc.gnu.org/mbox/"},{"id":174940,"url":"https://patchwork.plctlab.org/api/1.2/patches/174940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-18-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:12","name":"[v26,17/23] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-18-kmatsui@gcc.gnu.org/mbox/"},{"id":174941,"url":"https://patchwork.plctlab.org/api/1.2/patches/174941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-19-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:13","name":"[v26,18/23] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-19-kmatsui@gcc.gnu.org/mbox/"},{"id":174943,"url":"https://patchwork.plctlab.org/api/1.2/patches/174943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-20-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:14","name":"[v26,19/23] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-20-kmatsui@gcc.gnu.org/mbox/"},{"id":174942,"url":"https://patchwork.plctlab.org/api/1.2/patches/174942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-21-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:15","name":"[v26,20/23] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-21-kmatsui@gcc.gnu.org/mbox/"},{"id":174945,"url":"https://patchwork.plctlab.org/api/1.2/patches/174945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-22-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:16","name":"[v26,21/23] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-22-kmatsui@gcc.gnu.org/mbox/"},{"id":174944,"url":"https://patchwork.plctlab.org/api/1.2/patches/174944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-23-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:17","name":"[v26,22/23] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-23-kmatsui@gcc.gnu.org/mbox/"},{"id":174946,"url":"https://patchwork.plctlab.org/api/1.2/patches/174946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-24-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:18","name":"[v26,23/23] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-24-kmatsui@gcc.gnu.org/mbox/"},{"id":174981,"url":"https://patchwork.plctlab.org/api/1.2/patches/174981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5JuY6sJleFmQu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:49:58","name":"tree-ssa-dce: Fix up maybe_optimize_arith_overflow for BITINT_TYPE [PR112880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5JuY6sJleFmQu@tucnak/mbox/"},{"id":174982,"url":"https://patchwork.plctlab.org/api/1.2/patches/174982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5iPc/yqEcx8yS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:51:36","name":"expr: Handle BITINT_TYPE in count_type_elements [PR112881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5iPc/yqEcx8yS@tucnak/mbox/"},{"id":174983,"url":"https://patchwork.plctlab.org/api/1.2/patches/174983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF6Afn0+K3Mx+I7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:53:37","name":"c-family: Fix up -fno-debug-cpp [PR111965]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF6Afn0+K3Mx+I7@tucnak/mbox/"},{"id":175017,"url":"https://patchwork.plctlab.org/api/1.2/patches/175017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEBmzbYlbFIlyv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:36:22","name":"Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEBmzbYlbFIlyv@tucnak/mbox/"},{"id":175021,"url":"https://patchwork.plctlab.org/api/1.2/patches/175021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEqWQnsyIHljTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:39:05","name":"v2: Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEqWQnsyIHljTu@tucnak/mbox/"},{"id":175023,"url":"https://patchwork.plctlab.org/api/1.2/patches/175023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGHrGaIVD5gZxbz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:51:56","name":"[committed] testsuite: Add testcase for already fixed PR [PR111068]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGHrGaIVD5gZxbz@tucnak/mbox/"},{"id":175061,"url":"https://patchwork.plctlab.org/api/1.2/patches/175061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGQVwm2w+l5T3RC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T09:28:55","name":"c++: Unshare folded SAVE_EXPR arguments during cp_fold [PR112727]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGQVwm2w+l5T3RC@tucnak/mbox/"},{"id":175071,"url":"https://patchwork.plctlab.org/api/1.2/patches/175071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101526.3649249-1-juzhe.zhong@rivai.ai/","msgid":"<20231207101526.3649249-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T10:15:26","name":"RISC-V: Support interleave vector with different step sequence for VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101526.3649249-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175072,"url":"https://patchwork.plctlab.org/api/1.2/patches/175072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-2-shihua@iscas.ac.cn/","msgid":"<20231207101639.3695340-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-07T10:16:38","name":"[V2,1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-2-shihua@iscas.ac.cn/mbox/"},{"id":175073,"url":"https://patchwork.plctlab.org/api/1.2/patches/175073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-3-shihua@iscas.ac.cn/","msgid":"<20231207101639.3695340-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-07T10:16:39","name":"[V2,2/2] RISC-V: Add C intrinsics of Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-3-shihua@iscas.ac.cn/mbox/"},{"id":175074,"url":"https://patchwork.plctlab.org/api/1.2/patches/175074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207102440.3721252-1-juzhe.zhong@rivai.ai/","msgid":"<20231207102440.3721252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T10:24:40","name":"RISC-V: Support interleave vector with different step sequence for VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207102440.3721252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175100,"url":"https://patchwork.plctlab.org/api/1.2/patches/175100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-2-iii@linux.ibm.com/","msgid":"<20231207121005.3425208-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2023-12-07T12:08:26","name":"[1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-2-iii@linux.ibm.com/mbox/"},{"id":175101,"url":"https://patchwork.plctlab.org/api/1.2/patches/175101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-3-iii@linux.ibm.com/","msgid":"<20231207121005.3425208-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2023-12-07T12:08:27","name":"[2/2] asan: Align .LASANPC on function boundary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-3-iii@linux.ibm.com/mbox/"},{"id":175102,"url":"https://patchwork.plctlab.org/api/1.2/patches/175102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121220.3351398-1-juzhe.zhong@rivai.ai/","msgid":"<20231207121220.3351398-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T12:12:20","name":"RISC-V: Fix AVL propagation ICE for vleff/vlsegff","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121220.3351398-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175103,"url":"https://patchwork.plctlab.org/api/1.2/patches/175103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121727.1940-1-wangfeng@eswincomputing.com/","msgid":"<20231207121727.1940-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T12:17:27","name":"RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121727.1940-1-wangfeng@eswincomputing.com/mbox/"},{"id":175112,"url":"https://patchwork.plctlab.org/api/1.2/patches/175112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207122014.19826-2-xry111@xry111.site/","msgid":"<20231207122014.19826-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-07T12:20:15","name":"LoongArch: Allow -mcmodel=extreme and model attribute with -mexplicit-relocs=auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207122014.19826-2-xry111@xry111.site/mbox/"},{"id":175187,"url":"https://patchwork.plctlab.org/api/1.2/patches/175187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHaEK7W9JFjejWQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:43:28","name":"[v3,08/11] aarch64: Generalize writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHaEK7W9JFjejWQ@arm.com/mbox/"},{"id":175188,"url":"https://patchwork.plctlab.org/api/1.2/patches/175188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHamDMfAEnFxERI@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:45:44","name":"[v3,09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHamDMfAEnFxERI@arm.com/mbox/"},{"id":175189,"url":"https://patchwork.plctlab.org/api/1.2/patches/175189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHbUKrMdYHxJ7Dg@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:48:48","name":"[v3,10/11] aarch64: Add new load/store pair fusion pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHbUKrMdYHxJ7Dg@arm.com/mbox/"},{"id":175205,"url":"https://patchwork.plctlab.org/api/1.2/patches/175205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-2-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:54","name":"[v2,1/3,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175204,"url":"https://patchwork.plctlab.org/api/1.2/patches/175204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-3-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:55","name":"[v2,2/3,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175203,"url":"https://patchwork.plctlab.org/api/1.2/patches/175203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-4-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:56","name":"[v2,3/3,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175209,"url":"https://patchwork.plctlab.org/api/1.2/patches/175209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-2-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:42","name":"[v2,1/3,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175208,"url":"https://patchwork.plctlab.org/api/1.2/patches/175208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-3-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:43","name":"[v2,2/3,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175210,"url":"https://patchwork.plctlab.org/api/1.2/patches/175210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-4-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:44","name":"[v2,3/3,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175213,"url":"https://patchwork.plctlab.org/api/1.2/patches/175213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-2-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:50","name":"[v2,1/3,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175211,"url":"https://patchwork.plctlab.org/api/1.2/patches/175211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-3-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:51","name":"[v2,2/3,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175212,"url":"https://patchwork.plctlab.org/api/1.2/patches/175212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-4-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:52","name":"[v2,3/3,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175216,"url":"https://patchwork.plctlab.org/api/1.2/patches/175216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-2-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:04","name":"[v2,1/3,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175215,"url":"https://patchwork.plctlab.org/api/1.2/patches/175215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-3-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:05","name":"[v2,2/3,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175214,"url":"https://patchwork.plctlab.org/api/1.2/patches/175214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-4-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:06","name":"[v2,3/3,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175256,"url":"https://patchwork.plctlab.org/api/1.2/patches/175256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-2-sandra@codesourcery.com/","msgid":"<20231207155247.372718-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:44","name":"[V3,1/4] OpenMP: Introduce accessor macros and constructors for context selectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-2-sandra@codesourcery.com/mbox/"},{"id":175249,"url":"https://patchwork.plctlab.org/api/1.2/patches/175249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-3-sandra@codesourcery.com/","msgid":"<20231207155247.372718-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:45","name":"[V3,2/4] OpenMP: Unify representation of name-list properties.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-3-sandra@codesourcery.com/mbox/"},{"id":175264,"url":"https://patchwork.plctlab.org/api/1.2/patches/175264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-4-sandra@codesourcery.com/","msgid":"<20231207155247.372718-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:46","name":"[V3,3/4] OpenMP: Use enumerators for names of trait-sets and traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-4-sandra@codesourcery.com/mbox/"},{"id":175257,"url":"https://patchwork.plctlab.org/api/1.2/patches/175257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-5-sandra@codesourcery.com/","msgid":"<20231207155247.372718-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:47","name":"[V3,4/4] OpenMP: Permit additional selector properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-5-sandra@codesourcery.com/mbox/"},{"id":175276,"url":"https://patchwork.plctlab.org/api/1.2/patches/175276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162651.685329-1-poulhies@adacore.com/","msgid":"<20231207162651.685329-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-07T16:25:39","name":"testsuite: add missing dg-require ifunc in pr105554.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162651.685329-1-poulhies@adacore.com/mbox/"},{"id":175278,"url":"https://patchwork.plctlab.org/api/1.2/patches/175278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162817.686879-1-poulhies@adacore.com/","msgid":"<20231207162817.686879-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-07T16:28:09","name":"testsuite: require avx_runtime for vect-simd-clone-17f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162817.686879-1-poulhies@adacore.com/mbox/"},{"id":175288,"url":"https://patchwork.plctlab.org/api/1.2/patches/175288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:46:38","name":"[2/4] libgcc: aarch64: Configure check for __getauxval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175289,"url":"https://patchwork.plctlab.org/api/1.2/patches/175289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:46:51","name":"[3/4] libgcc: aarch64: Add SME runtime support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175291,"url":"https://patchwork.plctlab.org/api/1.2/patches/175291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:47:05","name":"[4/4] libgcc: aarch64: Add SME unwinder support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175313,"url":"https://patchwork.plctlab.org/api/1.2/patches/175313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or34wddhnw.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-07T17:52:19","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or34wddhnw.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":175363,"url":"https://patchwork.plctlab.org/api/1.2/patches/175363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlea5x05m.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T19:50:13","name":"[pushed,v2] aarch64: Add an early RA for strided registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlea5x05m.fsf@arm.com/mbox/"},{"id":175367,"url":"https://patchwork.plctlab.org/api/1.2/patches/175367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207200046.79350-1-ewlu@rivosinc.com/","msgid":"<20231207200046.79350-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-07T20:00:46","name":"RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207200046.79350-1-ewlu@rivosinc.com/mbox/"},{"id":175450,"url":"https://patchwork.plctlab.org/api/1.2/patches/175450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205558.950070-1-jwakely@redhat.com/","msgid":"<20231207205558.950070-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:55:45","name":"[committed] libstdc++: Fix recent changes to __glibcxx_assert [PR112882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205558.950070-1-jwakely@redhat.com/mbox/"},{"id":175464,"url":"https://patchwork.plctlab.org/api/1.2/patches/175464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205625.950093-1-jwakely@redhat.com/","msgid":"<20231207205625.950093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:56:00","name":"[committed] libstdc++: Use instead of in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205625.950093-1-jwakely@redhat.com/mbox/"},{"id":175455,"url":"https://patchwork.plctlab.org/api/1.2/patches/175455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205720.950537-1-jwakely@redhat.com/","msgid":"<20231207205720.950537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:57:07","name":"[committed] libstdc++: Fix misleading typedef name in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205720.950537-1-jwakely@redhat.com/mbox/"},{"id":175451,"url":"https://patchwork.plctlab.org/api/1.2/patches/175451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207220910.3487816-1-juzhe.zhong@rivai.ai/","msgid":"<20231207220910.3487816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T22:09:10","name":"[Committed,V2] RISC-V: Support interleave vector with different step sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207220910.3487816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175457,"url":"https://patchwork.plctlab.org/api/1.2/patches/175457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com/","msgid":"<295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:26:01","name":"libgccjit: Fix get_size of size_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com/mbox/"},{"id":175467,"url":"https://patchwork.plctlab.org/api/1.2/patches/175467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com/","msgid":"<2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:29:55","name":"libgccjit: Make new_array_type take unsigned long","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com/mbox/"},{"id":175465,"url":"https://patchwork.plctlab.org/api/1.2/patches/175465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com/","msgid":"<2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:32:06","name":"libgccjit: Make is_int return false on vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com/mbox/"},{"id":175466,"url":"https://patchwork.plctlab.org/api/1.2/patches/175466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com/","msgid":"<447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:34:23","name":"libgccjit: Add type checks in gcc_jit_block_add_assignment_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com/mbox/"},{"id":175528,"url":"https://patchwork.plctlab.org/api/1.2/patches/175528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208021655.1595917-1-hongtao.liu@intel.com/","msgid":"<20231208021655.1595917-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-08T02:16:55","name":"Don'\''t assume it'\''s AVX_U128_CLEAN after call_insn whose abi.mode_clobber(V4DImode) deosn'\''t contains all SSE_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208021655.1595917-1-hongtao.liu@intel.com/mbox/"},{"id":175533,"url":"https://patchwork.plctlab.org/api/1.2/patches/175533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208024439.10538-1-wangfeng@eswincomputing.com/","msgid":"<20231208024439.10538-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-08T02:44:39","name":"[v2] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208024439.10538-1-wangfeng@eswincomputing.com/mbox/"},{"id":175611,"url":"https://patchwork.plctlab.org/api/1.2/patches/175611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208063510.1806832-1-juzhe.zhong@rivai.ai/","msgid":"<20231208063510.1806832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-08T06:35:10","name":"[Committed] RISC-V: Remove redundant check of better_main_loop_than_p in COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208063510.1806832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175635,"url":"https://patchwork.plctlab.org/api/1.2/patches/175635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208070250.2837967-1-haochen.jiang@intel.com/","msgid":"<20231208070250.2837967-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-08T07:02:50","name":"[gcc-wwwdocs] gcc-13/14: Mention recent update for x86_64 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208070250.2837967-1-haochen.jiang@intel.com/mbox/"},{"id":175642,"url":"https://patchwork.plctlab.org/api/1.2/patches/175642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208071200.3238127-1-hongtao.liu@intel.com/","msgid":"<20231208071200.3238127-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-08T07:12:00","name":"[ICE] Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208071200.3238127-1-hongtao.liu@intel.com/mbox/"},{"id":175654,"url":"https://patchwork.plctlab.org/api/1.2/patches/175654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLHoMaZQbNKF3vh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:37:04","name":"haifa-sched: Avoid overflows in extend_h_i_d [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLHoMaZQbNKF3vh@tucnak/mbox/"},{"id":175661,"url":"https://patchwork.plctlab.org/api/1.2/patches/175661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLInnHKUBvv3lkg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:41:18","name":"vr-values: Avoid ICEs on large _BitInt cast to floating point [PR112901]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLInnHKUBvv3lkg@tucnak/mbox/"},{"id":175671,"url":"https://patchwork.plctlab.org/api/1.2/patches/175671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLMEHNbRSol8kS2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:56:00","name":"lower-bitint: Avoid merging non-mergeable stmt with cast and mergeable stmt [PR112902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLMEHNbRSol8kS2@tucnak/mbox/"},{"id":175673,"url":"https://patchwork.plctlab.org/api/1.2/patches/175673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208080047.875024-1-pan2.li@intel.com/","msgid":"<20231208080047.875024-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-08T08:00:47","name":"[v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208080047.875024-1-pan2.li@intel.com/mbox/"},{"id":175675,"url":"https://patchwork.plctlab.org/api/1.2/patches/175675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208082037.6960F138FF@imap2.dmz-prg2.suse.org/","msgid":"<20231208082037.6960F138FF@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-08T08:20:36","name":"Shrink out-of-SSA dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208082037.6960F138FF@imap2.dmz-prg2.suse.org/mbox/"},{"id":175714,"url":"https://patchwork.plctlab.org/api/1.2/patches/175714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208095446.344402-1-yangyujie@loongson.cn/","msgid":"<20231208095446.344402-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T09:54:46","name":"[v4] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208095446.344402-1-yangyujie@loongson.cn/mbox/"},{"id":175716,"url":"https://patchwork.plctlab.org/api/1.2/patches/175716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100118.344571-1-yangyujie@loongson.cn/","msgid":"<20231208100118.344571-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:01:18","name":"[v5] LoongArch: Fix eh_return epilogue for normal returns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100118.344571-1-yangyujie@loongson.cn/mbox/"},{"id":175722,"url":"https://patchwork.plctlab.org/api/1.2/patches/175722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-2-yangyujie@loongson.cn/","msgid":"<20231208100942.344748-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:09:41","name":"[v3,1/2] libruntime: Add fiber context switch code for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-2-yangyujie@loongson.cn/mbox/"},{"id":175723,"url":"https://patchwork.plctlab.org/api/1.2/patches/175723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-3-yangyujie@loongson.cn/","msgid":"<20231208100942.344748-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:09:42","name":"[v3,2/2] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-3-yangyujie@loongson.cn/mbox/"},{"id":175789,"url":"https://patchwork.plctlab.org/api/1.2/patches/175789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2066e8c2-df88-4d25-a5f0-60fe92102486-1702031284725@3c-app-gmx-bs48/","msgid":"","list_archive_url":null,"date":"2023-12-08T10:28:04","name":"Fortran: allow NULL() for POINTER, OPTIONAL, CONTIGUOUS dummy [PR111503]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2066e8c2-df88-4d25-a5f0-60fe92102486-1702031284725@3c-app-gmx-bs48/mbox/"},{"id":175756,"url":"https://patchwork.plctlab.org/api/1.2/patches/175756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208103109.A8303138FF@imap2.dmz-prg2.suse.org/","msgid":"<20231208103109.A8303138FF@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-08T10:31:09","name":"tree-optimization/112909 - uninit diagnostic with abnormal copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208103109.A8303138FF@imap2.dmz-prg2.suse.org/mbox/"},{"id":175776,"url":"https://patchwork.plctlab.org/api/1.2/patches/175776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXL1MK1Bt7gCzwXx@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T10:51:28","name":"[v2] libgcc: aarch64: Add SME runtime support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXL1MK1Bt7gCzwXx@arm.com/mbox/"},{"id":175801,"url":"https://patchwork.plctlab.org/api/1.2/patches/175801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208123737.3611857-1-szabolcs.nagy@arm.com/","msgid":"<20231208123737.3611857-1-szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-08T12:37:37","name":"[committed] libgcc: Fix config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208123737.3611857-1-szabolcs.nagy@arm.com/mbox/"},{"id":175814,"url":"https://patchwork.plctlab.org/api/1.2/patches/175814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208134950.14883-2-amonakov@ispras.ru/","msgid":"<20231208134950.14883-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-12-08T13:49:50","name":"[1/1] object lifetime instrumentation for Valgrind [PR66487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208134950.14883-2-amonakov@ispras.ru/mbox/"},{"id":175820,"url":"https://patchwork.plctlab.org/api/1.2/patches/175820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c45f7b80-b8d6-4f5c-ab3b-5841c04e2c46@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T14:28:59","name":"OpenMP: Handle same-directive mapped vars with pointer predefined firstprivate [PR110639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c45f7b80-b8d6-4f5c-ab3b-5841c04e2c46@codesourcery.com/mbox/"},{"id":175873,"url":"https://patchwork.plctlab.org/api/1.2/patches/175873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXMzFgCxnBWu6Cen@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-12-08T15:15:34","name":"[v3] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXMzFgCxnBWu6Cen@fkdesktop.suse.cz/mbox/"},{"id":175933,"url":"https://patchwork.plctlab.org/api/1.2/patches/175933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at/","msgid":"<6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-08T16:43:50","name":"[C] Fix regression causing ICE for structs with VLAs [PR 112488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at/mbox/"},{"id":175982,"url":"https://patchwork.plctlab.org/api/1.2/patches/175982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXNX/AUfHDOf+57y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T17:53:00","name":"c++, v2: Don'\''t diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXNX/AUfHDOf+57y@tucnak/mbox/"},{"id":176005,"url":"https://patchwork.plctlab.org/api/1.2/patches/176005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208184624.90158-1-polacek@redhat.com/","msgid":"<20231208184624.90158-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-08T18:46:24","name":"[pushed] c++: Add fixed test [PR88848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208184624.90158-1-polacek@redhat.com/mbox/"},{"id":176030,"url":"https://patchwork.plctlab.org/api/1.2/patches/176030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com/","msgid":"<85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com>","list_archive_url":null,"date":"2023-12-08T20:53:26","name":"[pushed,PR112875,LRA] : Fix an assert in lra elimination code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com/mbox/"},{"id":176031,"url":"https://patchwork.plctlab.org/api/1.2/patches/176031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210256.2705893-1-dmalcolm@redhat.com/","msgid":"<20231208210256.2705893-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-08T21:02:56","name":"[pushed] analyzer: fix ICE on infoleak with poisoned size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210256.2705893-1-dmalcolm@redhat.com/mbox/"},{"id":176033,"url":"https://patchwork.plctlab.org/api/1.2/patches/176033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210304.2705943-1-dmalcolm@redhat.com/","msgid":"<20231208210304.2705943-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-08T21:03:04","name":"[pushed] analyzer: avoid taint for (TAINTED % NON_TAINTED)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210304.2705943-1-dmalcolm@redhat.com/mbox/"},{"id":176043,"url":"https://patchwork.plctlab.org/api/1.2/patches/176043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXOHWR4pNh5gNs2C@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T21:15:05","name":"[v2] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXOHWR4pNh5gNs2C@redhat.com/mbox/"},{"id":176078,"url":"https://patchwork.plctlab.org/api/1.2/patches/176078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208233759.2732806-1-ewlu@rivosinc.com/","msgid":"<20231208233759.2732806-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-08T23:37:59","name":"[V2] RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208233759.2732806-1-ewlu@rivosinc.com/mbox/"},{"id":176088,"url":"https://patchwork.plctlab.org/api/1.2/patches/176088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209004356.67577-1-mark@klomp.org/","msgid":"<20231209004356.67577-1-mark@klomp.org>","list_archive_url":null,"date":"2023-12-09T00:43:56","name":"[gcc-wwwdocs,COMMITTED] Disallow /cgit for web robots","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209004356.67577-1-mark@klomp.org/mbox/"},{"id":176110,"url":"https://patchwork.plctlab.org/api/1.2/patches/176110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkb0b00e.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:08:49","name":"strub: add note on attribute access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkb0b00e.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":176111,"url":"https://patchwork.plctlab.org/api/1.2/patches/176111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1e49kpn.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:24:36","name":"-finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1e49kpn.fsf@lxoliva.fsfla.org/mbox/"},{"id":176112,"url":"https://patchwork.plctlab.org/api/1.2/patches/176112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttos9kni.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:25:53","name":"-finline-stringops: don'\''t assume ptr_mode ptr in memset [PR112804]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttos9kni.fsf@lxoliva.fsfla.org/mbox/"},{"id":176113,"url":"https://patchwork.plctlab.org/api/1.2/patches/176113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplzg9jqu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:45:29","name":"-finline-stringops: check base blksize for memset [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplzg9jqu.fsf@lxoliva.fsfla.org/mbox/"},{"id":176114,"url":"https://patchwork.plctlab.org/api/1.2/patches/176114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea49jm5.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:48:18","name":"multiflags: fix doc warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea49jm5.fsf@lxoliva.fsfla.org/mbox/"},{"id":176117,"url":"https://patchwork.plctlab.org/api/1.2/patches/176117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209040629.1104489-1-juzhe.zhong@rivai.ai/","msgid":"<20231209040629.1104489-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-09T04:06:29","name":"RISC-V: Support highest overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209040629.1104489-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176132,"url":"https://patchwork.plctlab.org/api/1.2/patches/176132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyvfambh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T07:04:34","name":"[v2] -finline-stringops: check base blksize for memset [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyvfambh.fsf@lxoliva.fsfla.org/mbox/"},{"id":176148,"url":"https://patchwork.plctlab.org/api/1.2/patches/176148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209083153.1131680-1-juzhe.zhong@rivai.ai/","msgid":"<20231209083153.1131680-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-09T08:31:53","name":"[Committed] RISC-V: Fix VLS mode movmiaslign bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209083153.1131680-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176151,"url":"https://patchwork.plctlab.org/api/1.2/patches/176151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXQ0yJgLGWxAYnm0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-09T09:35:04","name":"phiopt: Fix ICE with large --param l1-cache-line-size= [PR112887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXQ0yJgLGWxAYnm0@tucnak/mbox/"},{"id":176178,"url":"https://patchwork.plctlab.org/api/1.2/patches/176178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5cad739-77d0-4712-ac59-ec5b853bd964@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-09T13:18:36","name":"RISC-V: Recognize stepped series in expand_vec_perm_const.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5cad739-77d0-4712-ac59-ec5b853bd964@gmail.com/mbox/"},{"id":176191,"url":"https://patchwork.plctlab.org/api/1.2/patches/176191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140706.1100111-1-jwakely@redhat.com/","msgid":"<20231209140706.1100111-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-09T14:06:50","name":"[committed] libstdc++: Fix resolution of LWG 4016 for std::ranges::to [PR112876]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140706.1100111-1-jwakely@redhat.com/mbox/"},{"id":176193,"url":"https://patchwork.plctlab.org/api/1.2/patches/176193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140830.1100203-1-jwakely@redhat.com/","msgid":"<20231209140830.1100203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-09T14:07:26","name":"[committed] libstdc++: Fix value of __cpp_lib_format macro [PR111826]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140830.1100203-1-jwakely@redhat.com/mbox/"},{"id":176189,"url":"https://patchwork.plctlab.org/api/1.2/patches/176189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXR6bqrAb2qXdjuU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-09T14:32:14","name":"[committed] testsuite: Add testcase for already fixed PR [PR112924]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXR6bqrAb2qXdjuU@tucnak/mbox/"},{"id":176192,"url":"https://patchwork.plctlab.org/api/1.2/patches/176192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209153944.3746165-1-lipeng.zhu@intel.com/","msgid":"<20231209153944.3746165-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-12-09T15:39:45","name":"[v7] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209153944.3746165-1-lipeng.zhu@intel.com/mbox/"},{"id":176196,"url":"https://patchwork.plctlab.org/api/1.2/patches/176196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209163831.5320-1-xry111@xry111.site/","msgid":"<20231209163831.5320-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T16:38:11","name":"LoongArch: Fix warnings building libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209163831.5320-1-xry111@xry111.site/mbox/"},{"id":176200,"url":"https://patchwork.plctlab.org/api/1.2/patches/176200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-3-xry111@xry111.site/","msgid":"<20231209170347.12601-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:46","name":"[1/3] LoongArch: Include rtl.h for COSTS_N_INSNS instead of hard coding our own","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-3-xry111@xry111.site/mbox/"},{"id":176199,"url":"https://patchwork.plctlab.org/api/1.2/patches/176199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-4-xry111@xry111.site/","msgid":"<20231209170347.12601-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:47","name":"[2/3] LoongArch: Fix instruction costs [PR112936]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-4-xry111@xry111.site/mbox/"},{"id":176201,"url":"https://patchwork.plctlab.org/api/1.2/patches/176201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-5-xry111@xry111.site/","msgid":"<20231209170347.12601-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:48","name":"[3/3] LoongArch: Add alslsi3_extend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-5-xry111@xry111.site/mbox/"},{"id":176224,"url":"https://patchwork.plctlab.org/api/1.2/patches/176224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at/","msgid":"<7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-09T19:58:11","name":"v2 [C PATCH] Fix regression causing ICE for structs with VLAs [PR 112488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at/mbox/"},{"id":176241,"url":"https://patchwork.plctlab.org/api/1.2/patches/176241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209205653.3930232-1-tom@tromey.com/","msgid":"<20231209205653.3930232-1-tom@tromey.com>","list_archive_url":null,"date":"2023-12-09T20:56:53","name":"Add some new DW_IDX_* constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209205653.3930232-1-tom@tromey.com/mbox/"},{"id":176309,"url":"https://patchwork.plctlab.org/api/1.2/patches/176309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210085546.1531375-1-quic_apinski@quicinc.com/","msgid":"<20231210085546.1531375-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T08:55:46","name":"aarch64: Fix wrong code for bfloat when f16 is enabled [PR 111867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210085546.1531375-1-quic_apinski@quicinc.com/mbox/"},{"id":176315,"url":"https://patchwork.plctlab.org/api/1.2/patches/176315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210092125.1535761-1-quic_apinski@quicinc.com/","msgid":"<20231210092125.1535761-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T09:21:25","name":"expr: catch more `a*bool` while expanding [PR 112935]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210092125.1535761-1-quic_apinski@quicinc.com/mbox/"},{"id":176349,"url":"https://patchwork.plctlab.org/api/1.2/patches/176349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT37r+cbCfdcvS1naPELSSyeveg_ueSdzNB-dS+8AaybHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T14:59:47","name":"tree-cfg: Fix misleading error message in verify_gimple_assign_single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT37r+cbCfdcvS1naPELSSyeveg_ueSdzNB-dS+8AaybHA@mail.gmail.com/mbox/"},{"id":176361,"url":"https://patchwork.plctlab.org/api/1.2/patches/176361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210152015.126126-2-xndchn@gmail.com/","msgid":"<20231210152015.126126-2-xndchn@gmail.com>","list_archive_url":null,"date":"2023-12-10T15:20:15","name":"tree-cfg: Fix misleading error message in verify_gimple_assign_single.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210152015.126126-2-xndchn@gmail.com/mbox/"},{"id":176368,"url":"https://patchwork.plctlab.org/api/1.2/patches/176368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8bce888-17ba-4349-9d69-ef7ca66b0923@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T16:36:10","name":"[committed] Fix length computation for logical shifts on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8bce888-17ba-4349-9d69-ef7ca66b0923@gmail.com/mbox/"},{"id":176370,"url":"https://patchwork.plctlab.org/api/1.2/patches/176370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com/","msgid":"<52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com>","list_archive_url":null,"date":"2023-12-10T17:08:15","name":"[committed] Fix length computation of single bit bitfield extraction on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com/mbox/"},{"id":176376,"url":"https://patchwork.plctlab.org/api/1.2/patches/176376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b20a943c-30b3-4b6a-a045-08b3f5a99dd7@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T17:33:01","name":"[committed] Provide patterns for signed bitfield extractions on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b20a943c-30b3-4b6a-a045-08b3f5a99dd7@gmail.com/mbox/"},{"id":176379,"url":"https://patchwork.plctlab.org/api/1.2/patches/176379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03662208-651f-458c-93a9-7aebdbc02586@gmail.com/","msgid":"<03662208-651f-458c-93a9-7aebdbc02586@gmail.com>","list_archive_url":null,"date":"2023-12-10T17:44:00","name":"[committed] Support uaddv and usubv on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03662208-651f-458c-93a9-7aebdbc02586@gmail.com/mbox/"},{"id":176394,"url":"https://patchwork.plctlab.org/api/1.2/patches/176394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzfyhkf6g.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:53:11","name":"[pushed] aarch64: Add -funwind-tables to some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzfyhkf6g.fsf@arm.com/mbox/"},{"id":176395,"url":"https://patchwork.plctlab.org/api/1.2/patches/176395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf49kf5l.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:53:42","name":"[pushed] aarch64: Skip some SME register save tests on BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf49kf5l.fsf@arm.com/mbox/"},{"id":176396,"url":"https://patchwork.plctlab.org/api/1.2/patches/176396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsuhkf4r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:54:12","name":"[pushed] aarch64: XFAIL some SME tests for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsuhkf4r.fsf@arm.com/mbox/"},{"id":176397,"url":"https://patchwork.plctlab.org/api/1.2/patches/176397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6kpkf3r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:54:48","name":"[pushed] aarch64: Fix SMSTART/SMSTOP save/restore for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6kpkf3r.fsf@arm.com/mbox/"},{"id":176399,"url":"https://patchwork.plctlab.org/api/1.2/patches/176399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-2-quic_apinski@quicinc.com/","msgid":"<20231210195650.1772459-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T19:56:49","name":"[1/2] analyzer: Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-2-quic_apinski@quicinc.com/mbox/"},{"id":176398,"url":"https://patchwork.plctlab.org/api/1.2/patches/176398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-3-quic_apinski@quicinc.com/","msgid":"<20231210195650.1772459-3-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T19:56:50","name":"[PATCHv2,2/2] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-3-quic_apinski@quicinc.com/mbox/"},{"id":176417,"url":"https://patchwork.plctlab.org/api/1.2/patches/176417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211011417.18263-1-wangfeng@eswincomputing.com/","msgid":"<20231211011417.18263-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-11T01:14:17","name":"[v3] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211011417.18263-1-wangfeng@eswincomputing.com/mbox/"},{"id":176421,"url":"https://patchwork.plctlab.org/api/1.2/patches/176421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com/","msgid":"<1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T01:49:26","name":"[rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com/mbox/"},{"id":176436,"url":"https://patchwork.plctlab.org/api/1.2/patches/176436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3179721-0e0a-4790-b244-55c95465ecc3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T02:54:32","name":"[rs6000] Clean up pre-checking of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3179721-0e0a-4790-b244-55c95465ecc3@linux.ibm.com/mbox/"},{"id":176447,"url":"https://patchwork.plctlab.org/api/1.2/patches/176447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-1-guojiufu@linux.ibm.com/","msgid":"<20231211032604.3299841-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T03:26:03","name":"[V4,1/3] rs6000: accurate num_insns_constant_gpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-1-guojiufu@linux.ibm.com/mbox/"},{"id":176448,"url":"https://patchwork.plctlab.org/api/1.2/patches/176448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-2-guojiufu@linux.ibm.com/","msgid":"<20231211032604.3299841-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T03:26:04","name":"[V4,2/3] Using pli for constant splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-2-guojiufu@linux.ibm.com/mbox/"},{"id":176475,"url":"https://patchwork.plctlab.org/api/1.2/patches/176475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211051919.3236502-1-juzhe.zhong@rivai.ai/","msgid":"<20231211051919.3236502-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T05:19:19","name":"RISC-V: Remove poly selftest when --preference=fixed-vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211051919.3236502-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176503,"url":"https://patchwork.plctlab.org/api/1.2/patches/176503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211064939.1751320-1-hongtao.liu@intel.com/","msgid":"<20231211064939.1751320-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-11T06:49:39","name":"[v3] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VCE d))).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211064939.1751320-1-hongtao.liu@intel.com/mbox/"},{"id":176511,"url":"https://patchwork.plctlab.org/api/1.2/patches/176511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211073019.2352703-1-juzhe.zhong@rivai.ai/","msgid":"<20231211073019.2352703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T07:30:19","name":"[Committed] RISC-V: Fix ICE in extract_single_source","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211073019.2352703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176533,"url":"https://patchwork.plctlab.org/api/1.2/patches/176533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211083734.2548970-1-juzhe.zhong@rivai.ai/","msgid":"<20231211083734.2548970-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T08:37:34","name":"RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211083734.2548970-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176534,"url":"https://patchwork.plctlab.org/api/1.2/patches/176534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXbK8qYENq521KSd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-11T08:40:18","name":"testsuite: Disable -fstack-protector* for some strub tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXbK8qYENq521KSd@tucnak/mbox/"},{"id":176553,"url":"https://patchwork.plctlab.org/api/1.2/patches/176553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211091928.D2392385840C@sourceware.org/","msgid":"<20231211091928.D2392385840C@sourceware.org>","list_archive_url":null,"date":"2023-12-11T09:17:58","name":"ipa/92606 - properly handle no_icf attribute for variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211091928.D2392385840C@sourceware.org/mbox/"},{"id":176557,"url":"https://patchwork.plctlab.org/api/1.2/patches/176557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c41ae3-d053-41b9-8b66-35e88d1590e7@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-12-11T09:28:31","name":"[avr] PR112944: Support .rodata in RAM for AVR64* and AVR128* devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c41ae3-d053-41b9-8b66-35e88d1590e7@gjlay.de/mbox/"},{"id":176564,"url":"https://patchwork.plctlab.org/api/1.2/patches/176564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-2-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-2-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:26","name":"[1/3] RISC-V: movmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-2-slewis@rivosinc.com/mbox/"},{"id":176565,"url":"https://patchwork.plctlab.org/api/1.2/patches/176565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-3-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-3-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:27","name":"[2/3] RISC-V: setmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-3-slewis@rivosinc.com/mbox/"},{"id":176566,"url":"https://patchwork.plctlab.org/api/1.2/patches/176566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-4-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-4-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:28","name":"[3/3] RISC-V: cmpmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-4-slewis@rivosinc.com/mbox/"},{"id":176576,"url":"https://patchwork.plctlab.org/api/1.2/patches/176576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211100710.348988-1-ibuclaw@gdcproject.org/","msgid":"<20231211100710.348988-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-12-11T10:07:10","name":"[committed] d: Merge upstream dmd, druntime 2bbf64907c, phobos b64bfbf91","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211100710.348988-1-ibuclaw@gdcproject.org/mbox/"},{"id":176586,"url":"https://patchwork.plctlab.org/api/1.2/patches/176586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd5y15qbec.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-11T10:30:35","name":"ada: Fix Ada bootstrap on FreeBSD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd5y15qbec.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":176613,"url":"https://patchwork.plctlab.org/api/1.2/patches/176613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com/","msgid":"<16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T11:45:27","name":"OpenMP: Minor '\''!$omp allocators'\'' cleanup - and still: Re: [patch] OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com/mbox/"},{"id":176634,"url":"https://patchwork.plctlab.org/api/1.2/patches/176634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211120156.1720292-1-juzhe.zhong@rivai.ai/","msgid":"<20231211120156.1720292-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T12:01:56","name":"RISC-V: Robostify shuffle index used by vrgather and fix regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211120156.1720292-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176654,"url":"https://patchwork.plctlab.org/api/1.2/patches/176654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211121903.1864526-1-juzhe.zhong@rivai.ai/","msgid":"<20231211121903.1864526-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T12:19:03","name":"[COMMITTED,V2] RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211121903.1864526-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176671,"url":"https://patchwork.plctlab.org/api/1.2/patches/176671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211122020.3645581-1-hongyu.wang@intel.com/","msgid":"<20231211122020.3645581-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-11T12:20:20","name":"i386: Fix missed APX_NDD check for shift/rotate expanders [PR 112943]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211122020.3645581-1-hongyu.wang@intel.com/mbox/"},{"id":176696,"url":"https://patchwork.plctlab.org/api/1.2/patches/176696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211125158.2872910-2-mikpelinux@gmail.com/","msgid":"<20231211125158.2872910-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-12-11T12:51:39","name":"wrong code on m68k with -mlong-jump-table-offsets and -malign-int (PR target/112413)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211125158.2872910-2-mikpelinux@gmail.com/mbox/"},{"id":176722,"url":"https://patchwork.plctlab.org/api/1.2/patches/176722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211135401.1227845-1-poulhies@adacore.com/","msgid":"<20231211135401.1227845-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-11T13:35:52","name":"[v2] testsuite: adjust call to abort in excess-precision-12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211135401.1227845-1-poulhies@adacore.com/mbox/"},{"id":176721,"url":"https://patchwork.plctlab.org/api/1.2/patches/176721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com/","msgid":"<76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com>","list_archive_url":null,"date":"2023-12-11T13:40:37","name":"RISC-V: testsuite: Fix strcmp-run.c test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com/mbox/"},{"id":176728,"url":"https://patchwork.plctlab.org/api/1.2/patches/176728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com/","msgid":"<20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com>","list_archive_url":null,"date":"2023-12-11T14:21:30","name":"Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com/mbox/"},{"id":176741,"url":"https://patchwork.plctlab.org/api/1.2/patches/176741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com/","msgid":"<3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com>","list_archive_url":null,"date":"2023-12-11T15:13:03","name":"[v4] aarch64: SVE/NEON Bridging intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com/mbox/"},{"id":176742,"url":"https://patchwork.plctlab.org/api/1.2/patches/176742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y14g3vt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T15:23:02","name":"Ping: [PATCH] Treat \"p\" in asms as addressing VOIDmode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y14g3vt.fsf@arm.com/mbox/"},{"id":176743,"url":"https://patchwork.plctlab.org/api/1.2/patches/176743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttooepa1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T15:23:50","name":"Ping: [PATCH] Add a late-combine pass [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttooepa1.fsf@arm.com/mbox/"},{"id":176809,"url":"https://patchwork.plctlab.org/api/1.2/patches/176809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170004.1393588-1-ppalka@redhat.com/","msgid":"<20231211170004.1393588-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-11T17:00:04","name":"[pushed] c++: add fixed testcase [PR63378]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170004.1393588-1-ppalka@redhat.com/mbox/"},{"id":176810,"url":"https://patchwork.plctlab.org/api/1.2/patches/176810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-2-ams@codesourcery.com/","msgid":"<20231211170405.2538247-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:00","name":"[v3,1/6] libgomp: basic pinned memory on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-2-ams@codesourcery.com/mbox/"},{"id":176811,"url":"https://patchwork.plctlab.org/api/1.2/patches/176811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-3-ams@codesourcery.com/","msgid":"<20231211170405.2538247-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:01","name":"[v3,2/6] libgomp, openmp: Add ompx_pinned_mem_alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-3-ams@codesourcery.com/mbox/"},{"id":176812,"url":"https://patchwork.plctlab.org/api/1.2/patches/176812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-4-ams@codesourcery.com/","msgid":"<20231211170405.2538247-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:02","name":"[v3,3/6] openmp: Add -foffload-memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-4-ams@codesourcery.com/mbox/"},{"id":176814,"url":"https://patchwork.plctlab.org/api/1.2/patches/176814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-5-ams@codesourcery.com/","msgid":"<20231211170405.2538247-5-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:03","name":"[v3,4/6] openmp: -foffload-memory=pinned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-5-ams@codesourcery.com/mbox/"},{"id":176813,"url":"https://patchwork.plctlab.org/api/1.2/patches/176813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-6-ams@codesourcery.com/","msgid":"<20231211170405.2538247-6-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:04","name":"[v3,5/6] libgomp, nvptx: Cuda pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-6-ams@codesourcery.com/mbox/"},{"id":176815,"url":"https://patchwork.plctlab.org/api/1.2/patches/176815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-7-ams@codesourcery.com/","msgid":"<20231211170405.2538247-7-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:05","name":"[v3,6/6] libgomp: fine-grained pinned memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-7-ams@codesourcery.com/mbox/"},{"id":176856,"url":"https://patchwork.plctlab.org/api/1.2/patches/176856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkaw8vlx.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-11T18:03:38","name":"[v2,FYI] -finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkaw8vlx.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":176892,"url":"https://patchwork.plctlab.org/api/1.2/patches/176892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211191039.957070-1-jason@redhat.com/","msgid":"<20231211191039.957070-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-11T19:10:39","name":"[pushed] testsuite: update mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211191039.957070-1-jason@redhat.com/mbox/"},{"id":176917,"url":"https://patchwork.plctlab.org/api/1.2/patches/176917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211212240.3029438-1-dmalcolm@redhat.com/","msgid":"<20231211212240.3029438-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-11T21:22:40","name":"analyzer: fix uninitialized bitmap [PR112955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211212240.3029438-1-dmalcolm@redhat.com/mbox/"},{"id":177005,"url":"https://patchwork.plctlab.org/api/1.2/patches/177005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttoo6wb7.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T01:31:24","name":"multiflags: fix doc warning properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttoo6wb7.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177006,"url":"https://patchwork.plctlab.org/api/1.2/patches/177006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea06uut.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T02:02:50","name":"[#1/2] strub: handle volatile promoted args in internal strub [PR112938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea06uut.fsf@lxoliva.fsfla.org/mbox/"},{"id":177009,"url":"https://patchwork.plctlab.org/api/1.2/patches/177009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020310.21388-1-wangfeng@eswincomputing.com/","msgid":"<20231212020310.21388-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:03:10","name":"[committed] MAINTAINERS: Add myself to write after approval and DCO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020310.21388-1-wangfeng@eswincomputing.com/mbox/"},{"id":177011,"url":"https://patchwork.plctlab.org/api/1.2/patches/177011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020638.4131759-1-juzhe.zhong@rivai.ai/","msgid":"<20231212020638.4131759-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T02:06:38","name":"[Committed] RISC-V: Move RVV POLY VALUE estimation from riscv.cc to riscv-v.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020638.4131759-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177012,"url":"https://patchwork.plctlab.org/api/1.2/patches/177012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021326.36564-1-wangfeng@eswincomputing.com/","msgid":"<20231212021326.36564-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:13:26","name":"[committed] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021326.36564-1-wangfeng@eswincomputing.com/mbox/"},{"id":177013,"url":"https://patchwork.plctlab.org/api/1.2/patches/177013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021910.8078-1-wangfeng@eswincomputing.com/","msgid":"<20231212021910.8078-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:19:10","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021910.8078-1-wangfeng@eswincomputing.com/mbox/"},{"id":177050,"url":"https://patchwork.plctlab.org/api/1.2/patches/177050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212023259.3053155-1-dmalcolm@redhat.com/","msgid":"<20231212023259.3053155-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-12T02:32:59","name":"[pushed] analyzer: add more test coverage for tainted modulus","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212023259.3053155-1-dmalcolm@redhat.com/mbox/"},{"id":177060,"url":"https://patchwork.plctlab.org/api/1.2/patches/177060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6ko6sr3.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T02:48:16","name":"[#2/2] strub: drop volatile from wrapper args [PR112938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6ko6sr3.fsf@lxoliva.fsfla.org/mbox/"},{"id":177062,"url":"https://patchwork.plctlab.org/api/1.2/patches/177062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212030031.1023808-1-jason@redhat.com/","msgid":"<20231212030031.1023808-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-12T03:00:31","name":"contrib: add git gcc-style alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212030031.1023808-1-jason@redhat.com/mbox/"},{"id":177104,"url":"https://patchwork.plctlab.org/api/1.2/patches/177104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212061208.234184-1-hongtao.liu@intel.com/","msgid":"<20231212061208.234184-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-12T06:12:08","name":"Adjust vectorized cost for reduction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212061208.234184-1-hongtao.liu@intel.com/mbox/"},{"id":177106,"url":"https://patchwork.plctlab.org/api/1.2/patches/177106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212064754.6623-1-xry111@xry111.site/","msgid":"<20231212064754.6623-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-12T06:47:28","name":"LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212064754.6623-1-xry111@xry111.site/mbox/"},{"id":177110,"url":"https://patchwork.plctlab.org/api/1.2/patches/177110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55a3078-56d0-1646-a96c-4e923a90833d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T07:02:49","name":"[draft,v2] sched: Don'\''t skip empty block in scheduling [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55a3078-56d0-1646-a96c-4e923a90833d@linux.ibm.com/mbox/"},{"id":177114,"url":"https://patchwork.plctlab.org/api/1.2/patches/177114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212071552.2CAE4385AC1C@sourceware.org/","msgid":"<20231212071552.2CAE4385AC1C@sourceware.org>","list_archive_url":null,"date":"2023-12-12T07:14:23","name":"tree-optimization/112939 - VN PHI visiting and -ftrivial-auto-var-init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212071552.2CAE4385AC1C@sourceware.org/mbox/"},{"id":177132,"url":"https://patchwork.plctlab.org/api/1.2/patches/177132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXgVTUV4I01zdMRS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T08:09:49","name":"[committed] libquadmath: Restore linking against -lm on most targets [PR112963]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXgVTUV4I01zdMRS@tucnak/mbox/"},{"id":177137,"url":"https://patchwork.plctlab.org/api/1.2/patches/177137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082129.2556235-1-quic_apinski@quicinc.com/","msgid":"<20231212082129.2556235-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-12T08:21:29","name":"aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082129.2556235-1-quic_apinski@quicinc.com/mbox/"},{"id":177175,"url":"https://patchwork.plctlab.org/api/1.2/patches/177175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082849.1845268-1-pan2.li@intel.com/","msgid":"<20231212082849.1845268-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-12T08:28:49","name":"[v1] RISC-V: Disable RVV VCOMPRESS avl propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082849.1845268-1-pan2.li@intel.com/mbox/"},{"id":177208,"url":"https://patchwork.plctlab.org/api/1.2/patches/177208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212095006.12830-1-xujiahao@loongson.cn/","msgid":"<20231212095006.12830-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-12T09:50:06","name":"LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212095006.12830-1-xujiahao@loongson.cn/mbox/"},{"id":177215,"url":"https://patchwork.plctlab.org/api/1.2/patches/177215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212100132.3006956-1-demin.han@starfivetech.com/","msgid":"<20231212100132.3006956-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-12T10:01:32","name":"RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212100132.3006956-1-demin.han@starfivetech.com/mbox/"},{"id":177234,"url":"https://patchwork.plctlab.org/api/1.2/patches/177234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105315.55F403857BA4@sourceware.org/","msgid":"<20231212105315.55F403857BA4@sourceware.org>","list_archive_url":null,"date":"2023-12-12T10:51:40","name":"tree-optimization/112736 - avoid overread with non-grouped SLP load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105315.55F403857BA4@sourceware.org/mbox/"},{"id":177235,"url":"https://patchwork.plctlab.org/api/1.2/patches/177235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105411.1184445-1-juzhe.zhong@rivai.ai/","msgid":"<20231212105411.1184445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T10:54:11","name":"RISC-V: Refactor Dynamic LMUL codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105411.1184445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177261,"url":"https://patchwork.plctlab.org/api/1.2/patches/177261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212111412.29351-1-xujiahao@loongson.cn/","msgid":"<20231212111412.29351-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-12T11:14:12","name":"[v2] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212111412.29351-1-xujiahao@loongson.cn/mbox/"},{"id":177275,"url":"https://patchwork.plctlab.org/api/1.2/patches/177275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-1-j@lambda.is/","msgid":"<20231212114125.1998866-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-12T11:41:24","name":"[v8,1/2] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-1-j@lambda.is/mbox/"},{"id":177274,"url":"https://patchwork.plctlab.org/api/1.2/patches/177274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-2-j@lambda.is/","msgid":"<20231212114125.1998866-2-j@lambda.is>","list_archive_url":null,"date":"2023-12-12T11:41:25","name":"[v8,2/2] Add gcov MC/DC tests for GDC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-2-j@lambda.is/mbox/"},{"id":177288,"url":"https://patchwork.plctlab.org/api/1.2/patches/177288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212120809.13996-1-jiawei@iscas.ac.cn/","msgid":"<20231212120809.13996-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-12T12:08:09","name":"[v2] RISC-V: Supports RISC-V Profiles in '\''-march'\'' option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212120809.13996-1-jiawei@iscas.ac.cn/mbox/"},{"id":177289,"url":"https://patchwork.plctlab.org/api/1.2/patches/177289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T12:09:22","name":"[committed] testsuite: Fix up test directive syntax errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"},{"id":177419,"url":"https://patchwork.plctlab.org/api/1.2/patches/177419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745200.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:04:33","name":"[DejaGNU,1/1] Support per-test execution timeout factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745200.5892@tpp.orcam.me.uk/mbox/"},{"id":177370,"url":"https://patchwork.plctlab.org/api/1.2/patches/177370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745330.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:04:51","name":"[GCC,1/1] testsuite: Support test execution timeout factor as a keyword","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745330.5892@tpp.orcam.me.uk/mbox/"},{"id":177374,"url":"https://patchwork.plctlab.org/api/1.2/patches/177374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212141410.8B98C385C419@sourceware.org/","msgid":"<20231212141410.8B98C385C419@sourceware.org>","list_archive_url":null,"date":"2023-12-12T14:12:39","name":"tree-optimization/112961 - include latch in if-conversion CSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212141410.8B98C385C419@sourceware.org/mbox/"},{"id":177377,"url":"https://patchwork.plctlab.org/api/1.2/patches/177377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212142552.102285-1-juzhe.zhong@rivai.ai/","msgid":"<20231212142552.102285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T14:25:52","name":"RISC-V: Apply vla vs. vls mode heuristic vector COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212142552.102285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177382,"url":"https://patchwork.plctlab.org/api/1.2/patches/177382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhwQVQzBiy2hv89@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:37:53","name":"Disable FMADD in chains for Zen4 and generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhwQVQzBiy2hv89@kam.mff.cuni.cz/mbox/"},{"id":177405,"url":"https://patchwork.plctlab.org/api/1.2/patches/177405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212152258.4164170-1-szabolcs.nagy@arm.com/","msgid":"<20231212152258.4164170-1-szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-12T15:22:58","name":"[v3] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212152258.4164170-1-szabolcs.nagy@arm.com/mbox/"},{"id":177468,"url":"https://patchwork.plctlab.org/api/1.2/patches/177468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-12-12T16:50:19","name":"SRA: Force gimple operand in an additional corner case (PR 112822)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":177502,"url":"https://patchwork.plctlab.org/api/1.2/patches/177502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212174845.1197227-1-jason@redhat.com/","msgid":"<20231212174845.1197227-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-12T17:48:45","name":"[pushed] testsuite: fix is_nothrow_default_constructible8.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212174845.1197227-1-jason@redhat.com/mbox/"},{"id":177508,"url":"https://patchwork.plctlab.org/api/1.2/patches/177508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184037.3040106-1-ppalka@redhat.com/","msgid":"<20231212184037.3040106-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-12T18:40:37","name":"c++: unifying FUNCTION_DECLs [PR93740]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184037.3040106-1-ppalka@redhat.com/mbox/"},{"id":177509,"url":"https://patchwork.plctlab.org/api/1.2/patches/177509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184436.64547-1-xry111@xry111.site/","msgid":"<20231212184436.64547-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-12T18:43:36","name":"[pushed] LoongArch: testsuite: Remove XFAIL in vect-ftint-no-inexact.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184436.64547-1-xry111@xry111.site/mbox/"},{"id":177530,"url":"https://patchwork.plctlab.org/api/1.2/patches/177530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6a844a01ebf4b6bb72efbc5f1c3e919@DRWHoldings.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T19:29:40","name":"c++: Fix warmth propagation for member function templates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6a844a01ebf4b6bb72efbc5f1c3e919@DRWHoldings.com/mbox/"},{"id":177533,"url":"https://patchwork.plctlab.org/api/1.2/patches/177533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-2-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:51","name":"[v4,1/3] RISC-V: Add support for XCVelw extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-2-mary.bennett@embecosm.com/mbox/"},{"id":177534,"url":"https://patchwork.plctlab.org/api/1.2/patches/177534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-3-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:52","name":"[v4,2/3] RISC-V: Update XCValu constraints to match other vendors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-3-mary.bennett@embecosm.com/mbox/"},{"id":177535,"url":"https://patchwork.plctlab.org/api/1.2/patches/177535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-4-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-4-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:53","name":"[v4,3/3] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-4-mary.bennett@embecosm.com/mbox/"},{"id":177602,"url":"https://patchwork.plctlab.org/api/1.2/patches/177602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212212143.64983-1-ppalka@redhat.com/","msgid":"<20231212212143.64983-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-12T21:21:43","name":"c++: unifying constants vs their type [PR99186, PR104867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212212143.64983-1-ppalka@redhat.com/mbox/"},{"id":177634,"url":"https://patchwork.plctlab.org/api/1.2/patches/177634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212223511.15390-1-david.faust@oracle.com/","msgid":"<20231212223511.15390-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-12-12T22:35:11","name":"btf: change encoding of forward-declared enums [PR111735]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212223511.15390-1-david.faust@oracle.com/mbox/"},{"id":177690,"url":"https://patchwork.plctlab.org/api/1.2/patches/177690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224646.1518312-1-jwakely@redhat.com/","msgid":"<20231212224646.1518312-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:18","name":"[committed] libstdc++: Remove redundant -std flags from Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224646.1518312-1-jwakely@redhat.com/mbox/"},{"id":177673,"url":"https://patchwork.plctlab.org/api/1.2/patches/177673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224654.1518338-1-jwakely@redhat.com/","msgid":"<20231212224654.1518338-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:47","name":"[committed] libstdc++: Fix std::format output of %C for negative years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224654.1518338-1-jwakely@redhat.com/mbox/"},{"id":177716,"url":"https://patchwork.plctlab.org/api/1.2/patches/177716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224702.1518352-1-jwakely@redhat.com/","msgid":"<20231212224702.1518352-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:55","name":"[committed] libstdc++: Fix std::format(\"{}\", '\''c'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224702.1518352-1-jwakely@redhat.com/mbox/"},{"id":177635,"url":"https://patchwork.plctlab.org/api/1.2/patches/177635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXjjT8Yn80pq7Bky@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T22:48:47","name":"[v3] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXjjT8Yn80pq7Bky@redhat.com/mbox/"},{"id":177668,"url":"https://patchwork.plctlab.org/api/1.2/patches/177668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212231803.339670-1-lhyatt@gmail.com/","msgid":"<20231212231803.339670-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-12T23:18:03","name":"libcpp: Fix macro expansion for argument of __has_include [PR110558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212231803.339670-1-lhyatt@gmail.com/mbox/"},{"id":177735,"url":"https://patchwork.plctlab.org/api/1.2/patches/177735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213013107.34464-1-chenxiaolong@loongson.cn/","msgid":"<20231213013107.34464-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-13T01:31:07","name":"[v2] LoongArch: Modify the check type of the vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213013107.34464-1-chenxiaolong@loongson.cn/mbox/"},{"id":177752,"url":"https://patchwork.plctlab.org/api/1.2/patches/177752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213021752.348476-1-haochen.jiang@intel.com/","msgid":"<20231213021752.348476-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-13T02:17:52","name":"i386: Fix PR110790 testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213021752.348476-1-haochen.jiang@intel.com/mbox/"},{"id":177759,"url":"https://patchwork.plctlab.org/api/1.2/patches/177759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkau6bvu.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-13T03:04:53","name":"[#2a/2] ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkau6bvu.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177760,"url":"https://patchwork.plctlab.org/api/1.2/patches/177760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5qe6btb.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-13T03:06:24","name":"[#2a/2] strub: indirect volatile parms in wrappers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5qe6btb.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177766,"url":"https://patchwork.plctlab.org/api/1.2/patches/177766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213032451.8054-1-zengxiao@eswincomputing.com/","msgid":"<20231213032451.8054-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T03:24:51","name":"RISC-V: Add Zvfbfmin extension to the -march= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213032451.8054-1-zengxiao@eswincomputing.com/mbox/"},{"id":177769,"url":"https://patchwork.plctlab.org/api/1.2/patches/177769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213035405.2118-1-palmer@rivosinc.com/","msgid":"<20231213035405.2118-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-13T03:54:05","name":"RISC-V: Don'\''t make Ztso imply A","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213035405.2118-1-palmer@rivosinc.com/mbox/"},{"id":177782,"url":"https://patchwork.plctlab.org/api/1.2/patches/177782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213054811.331836-1-juzhe.zhong@rivai.ai/","msgid":"<20231213054811.331836-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-13T05:48:11","name":"RISC-V: Postpone full available optimization [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213054811.331836-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177807,"url":"https://patchwork.plctlab.org/api/1.2/patches/177807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213072558.805297-1-demin.han@starfivetech.com/","msgid":"<20231213072558.805297-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-13T07:25:58","name":"RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213072558.805297-1-demin.han@starfivetech.com/mbox/"},{"id":177811,"url":"https://patchwork.plctlab.org/api/1.2/patches/177811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213080009.3E0F4385AE43@sourceware.org/","msgid":"<20231213080009.3E0F4385AE43@sourceware.org>","list_archive_url":null,"date":"2023-12-13T07:58:40","name":"middle-end/111591 - explain why TBAA doesn'\''t need adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213080009.3E0F4385AE43@sourceware.org/mbox/"},{"id":177814,"url":"https://patchwork.plctlab.org/api/1.2/patches/177814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213082244.3760797-1-shihua@iscas.ac.cn/","msgid":"<20231213082244.3760797-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-13T08:22:44","name":"RISC-V: fix scalar crypto pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213082244.3760797-1-shihua@iscas.ac.cn/mbox/"},{"id":177815,"url":"https://patchwork.plctlab.org/api/1.2/patches/177815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlqLxcI69T1ypbA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:24:15","name":"attribs: Fix valgrind failures on -Wno-attributes* tests [PR112953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlqLxcI69T1ypbA@tucnak/mbox/"},{"id":177817,"url":"https://patchwork.plctlab.org/api/1.2/patches/177817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXltpRf/CIlKnbxD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:39:01","name":"libcpp: Fix valgrind errors on pr88974.c [PR112956]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXltpRf/CIlKnbxD@tucnak/mbox/"},{"id":177818,"url":"https://patchwork.plctlab.org/api/1.2/patches/177818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084337.89B8A385B534@sourceware.org/","msgid":"<20231213084337.89B8A385B534@sourceware.org>","list_archive_url":null,"date":"2023-12-13T08:42:09","name":"tree-optimization/112991 - re-do PR112961 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084337.89B8A385B534@sourceware.org/mbox/"},{"id":177819,"url":"https://patchwork.plctlab.org/api/1.2/patches/177819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlu12NJxQVbvYfG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:44:07","name":"i386: Fix ICE on __builtin_ia32_pabsd128 without lhs [PR112962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlu12NJxQVbvYfG@tucnak/mbox/"},{"id":177820,"url":"https://patchwork.plctlab.org/api/1.2/patches/177820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084617.687873860745@sourceware.org/","msgid":"<20231213084617.687873860745@sourceware.org>","list_archive_url":null,"date":"2023-12-13T08:44:50","name":"tree-optimization/112990 - unsupported VEC_PERM from match pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084617.687873860745@sourceware.org/mbox/"},{"id":177823,"url":"https://patchwork.plctlab.org/api/1.2/patches/177823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213090800.5F671385B526@sourceware.org/","msgid":"<20231213090800.5F671385B526@sourceware.org>","list_archive_url":null,"date":"2023-12-13T09:06:20","name":"Avoid losing MEM_REF offset in MEM_EXPR adjustment for stack slot sharing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213090800.5F671385B526@sourceware.org/mbox/"},{"id":177826,"url":"https://patchwork.plctlab.org/api/1.2/patches/177826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-1-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:47","name":"[v2,1/4] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-1-wangfeng@eswincomputing.com/mbox/"},{"id":177827,"url":"https://patchwork.plctlab.org/api/1.2/patches/177827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-2-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:48","name":"[v3,2/4] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-2-wangfeng@eswincomputing.com/mbox/"},{"id":177828,"url":"https://patchwork.plctlab.org/api/1.2/patches/177828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-3-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:49","name":"[v3,3/4] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-3-wangfeng@eswincomputing.com/mbox/"},{"id":177829,"url":"https://patchwork.plctlab.org/api/1.2/patches/177829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-4-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:50","name":"[v3,4/4] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-4-wangfeng@eswincomputing.com/mbox/"},{"id":177831,"url":"https://patchwork.plctlab.org/api/1.2/patches/177831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213092107.191733-1-juzhe.zhong@rivai.ai/","msgid":"<20231213092107.191733-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-13T09:21:07","name":"Middle-end: Adjust decrement IV style partial vectorization COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213092107.191733-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177832,"url":"https://patchwork.plctlab.org/api/1.2/patches/177832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl3pyJVPCP9L521@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T09:21:43","name":"i386: Make most MD builtins nothrow, leaf [PR112962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl3pyJVPCP9L521@tucnak/mbox/"},{"id":177841,"url":"https://patchwork.plctlab.org/api/1.2/patches/177841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl+DgQFUfnH5dJY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T09:49:02","name":"c++: Fix tinst_level::to_list [PR112968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl+DgQFUfnH5dJY@tucnak/mbox/"},{"id":177843,"url":"https://patchwork.plctlab.org/api/1.2/patches/177843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXmAzPc15GJrckZM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T10:00:44","name":"lower-bitint: Fix lowering of non-_BitInt to _BitInt cast merged with some wider cast [PR112940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXmAzPc15GJrckZM@tucnak/mbox/"},{"id":177881,"url":"https://patchwork.plctlab.org/api/1.2/patches/177881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213110733.4089129-1-c@jia.je/","msgid":"<20231213110733.4089129-1-c@jia.je>","list_archive_url":null,"date":"2023-12-13T11:07:22","name":"extend.texi: Fix typos in LSX intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213110733.4089129-1-c@jia.je/mbox/"},{"id":177890,"url":"https://patchwork.plctlab.org/api/1.2/patches/177890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213111203.618197-1-demin.han@starfivetech.com/","msgid":"<20231213111203.618197-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-13T11:12:03","name":"[v2] RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213111203.618197-1-demin.han@starfivetech.com/mbox/"},{"id":178036,"url":"https://patchwork.plctlab.org/api/1.2/patches/178036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123140.1610945-1-jwakely@redhat.com/","msgid":"<20231213123140.1610945-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-13T12:30:35","name":"[committed] libstdc++: Fix regression in std::format output of %Y for negative years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123140.1610945-1-jwakely@redhat.com/mbox/"},{"id":177942,"url":"https://patchwork.plctlab.org/api/1.2/patches/177942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123224.0020C385332C@sourceware.org/","msgid":"<20231213123224.0020C385332C@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:30:52","name":"[1/6] Reduce the number of get_vectype_for_scalar_type calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123224.0020C385332C@sourceware.org/mbox/"},{"id":177944,"url":"https://patchwork.plctlab.org/api/1.2/patches/177944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123257.BA2D6384DEF7@sourceware.org/","msgid":"<20231213123257.BA2D6384DEF7@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:30:59","name":"[2/6] Set LOOP_VINFO_VECT_FACTOR only when it is final","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123257.BA2D6384DEF7@sourceware.org/mbox/"},{"id":177946,"url":"https://patchwork.plctlab.org/api/1.2/patches/177946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123306.2BC39388300A@sourceware.org/","msgid":"<20231213123306.2BC39388300A@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:05","name":"[3/6] Query an appropriate offset vector type in vect_gather_scatter_fn_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123306.2BC39388300A@sourceware.org/mbox/"},{"id":177943,"url":"https://patchwork.plctlab.org/api/1.2/patches/177943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123246.16BE53845159@sourceware.org/","msgid":"<20231213123246.16BE53845159@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:12","name":"[4/6] More explicit vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123246.16BE53845159@sourceware.org/mbox/"},{"id":177945,"url":"https://patchwork.plctlab.org/api/1.2/patches/177945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123300.DFB4D387543C@sourceware.org/","msgid":"<20231213123300.DFB4D387543C@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:20","name":"[5/6] Allow poly_uint64 for group_size args to vector type query routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123300.DFB4D387543C@sourceware.org/mbox/"},{"id":177947,"url":"https://patchwork.plctlab.org/api/1.2/patches/177947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123336.4544D3858D39@sourceware.org/","msgid":"<20231213123336.4544D3858D39@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:27","name":"[6/6] Defer assigning vector types until after VF is determined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123336.4544D3858D39@sourceware.org/mbox/"},{"id":177985,"url":"https://patchwork.plctlab.org/api/1.2/patches/177985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213131748.35135-1-wangfeng@eswincomputing.com/","msgid":"<20231213131748.35135-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T13:17:48","name":"[committed] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213131748.35135-1-wangfeng@eswincomputing.com/mbox/"},{"id":177993,"url":"https://patchwork.plctlab.org/api/1.2/patches/177993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213134927.3453856-1-pan2.li@intel.com/","msgid":"<20231213134927.3453856-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-13T13:49:27","name":"[v1] RISC-V: Refine test cases for both PR112929 and PR112988","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213134927.3453856-1-pan2.li@intel.com/mbox/"},{"id":178043,"url":"https://patchwork.plctlab.org/api/1.2/patches/178043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213142240.7974-1-xry111@xry111.site/","msgid":"<20231213142240.7974-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-13T14:20:09","name":"LoongArch: Use the movcf2gr instruction to implement cstore4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213142240.7974-1-xry111@xry111.site/mbox/"},{"id":178065,"url":"https://patchwork.plctlab.org/api/1.2/patches/178065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2ebaca6-7bae-7130-a160-33c4e7152670@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T14:47:47","name":"[committed,v2] aarch64: Add missing driver-aarch64 dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2ebaca6-7bae-7130-a160-33c4e7152670@e124511.cambridge.arm.com/mbox/"},{"id":178066,"url":"https://patchwork.plctlab.org/api/1.2/patches/178066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com/","msgid":"<4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-13T14:49:50","name":"[committed,v2] aarch64 testsuite: Check entire .arch string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com/mbox/"},{"id":178067,"url":"https://patchwork.plctlab.org/api/1.2/patches/178067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com/","msgid":"<4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-13T14:52:26","name":"[v2] aarch64: Fix +nocrypto handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com/mbox/"},{"id":178069,"url":"https://patchwork.plctlab.org/api/1.2/patches/178069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bffc7bdd-e883-697a-d210-729aab43d67d@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T14:58:45","name":"[v2] aarch64: Fix +nopredres, +nols64 and +nomops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bffc7bdd-e883-697a-d210-729aab43d67d@e124511.cambridge.arm.com/mbox/"},{"id":178085,"url":"https://patchwork.plctlab.org/api/1.2/patches/178085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c65c1f10-1591-40c2-a3a8-2281ab5a7ff3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T15:17:52","name":"[wwwdocs] gcc-14/changes.html + project/gomp/: Update OpenMP status","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c65c1f10-1591-40c2-a3a8-2281ab5a7ff3@codesourcery.com/mbox/"},{"id":178101,"url":"https://patchwork.plctlab.org/api/1.2/patches/178101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213152615.4132230-1-c@jia.je/","msgid":"<20231213152615.4132230-1-c@jia.je>","list_archive_url":null,"date":"2023-12-13T15:26:01","name":"[v2] extend.texi: Fix typos in LSX intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213152615.4132230-1-c@jia.je/mbox/"},{"id":178142,"url":"https://patchwork.plctlab.org/api/1.2/patches/178142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4031e78-a5a0-4856-b951-643c4cc9de07@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T15:46:45","name":"[committed] amdgcn: XNACK support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4031e78-a5a0-4856-b951-643c4cc9de07@codesourcery.com/mbox/"},{"id":178147,"url":"https://patchwork.plctlab.org/api/1.2/patches/178147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXnX24ZRkpHr7B-m@localhost.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-13T16:12:11","name":"[v4] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXnX24ZRkpHr7B-m@localhost.localdomain/mbox/"},{"id":178172,"url":"https://patchwork.plctlab.org/api/1.2/patches/178172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-1-jason@redhat.com/","msgid":"<20231213164740.1591535-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:37","name":"[pushed,1/4] c++: copy location to AGGR_INIT_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-1-jason@redhat.com/mbox/"},{"id":178175,"url":"https://patchwork.plctlab.org/api/1.2/patches/178175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-2-jason@redhat.com/","msgid":"<20231213164740.1591535-2-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:38","name":"[pushed,2/4] c++: constant direct-initialization [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-2-jason@redhat.com/mbox/"},{"id":178173,"url":"https://patchwork.plctlab.org/api/1.2/patches/178173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-3-jason@redhat.com/","msgid":"<20231213164740.1591535-3-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:39","name":"[pushed,3/4] c++: fix in-charge parm in constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-3-jason@redhat.com/mbox/"},{"id":178174,"url":"https://patchwork.plctlab.org/api/1.2/patches/178174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-4-jason@redhat.com/","msgid":"<20231213164740.1591535-4-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:40","name":"[pushed,4/4] c++: End lifetime of objects in constexpr after destructor call [PR71093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-4-jason@redhat.com/mbox/"},{"id":178176,"url":"https://patchwork.plctlab.org/api/1.2/patches/178176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213165100.3260078-1-quic_apinski@quicinc.com/","msgid":"<20231213165100.3260078-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-13T16:51:00","name":"middle-end: Fix up constant handling in emit_conditional_move [PR111260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213165100.3260078-1-quic_apinski@quicinc.com/mbox/"},{"id":178291,"url":"https://patchwork.plctlab.org/api/1.2/patches/178291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213200622.1648999-1-jason@redhat.com/","msgid":"<20231213200622.1648999-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T20:06:22","name":"[pushed] c++: TARGET_EXPR location in default arg [PR96997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213200622.1648999-1-jason@redhat.com/mbox/"},{"id":178292,"url":"https://patchwork.plctlab.org/api/1.2/patches/178292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qd97s2.fsf@euler.schwinge.homeip.net/","msgid":"<87a5qd97s2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-13T20:17:33","name":"Fix '\''libgomp/config/linux/allocator.c'\'' '\''size_t'\'' vs. '\''%ld'\'' format string mismatch (was: Build breakage)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qd97s2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178303,"url":"https://patchwork.plctlab.org/api/1.2/patches/178303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXob/Cn/URXcaNVP@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T21:02:52","name":"[2/2] aarch64: Handle autoinc addresses in ld1rq splitter [PR112906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXob/Cn/URXcaNVP@arm.com/mbox/"},{"id":178304,"url":"https://patchwork.plctlab.org/api/1.2/patches/178304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213210754.2641613-1-ewlu@rivosinc.com/","msgid":"<20231213210754.2641613-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-13T21:07:54","name":"[V3] RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213210754.2641613-1-ewlu@rivosinc.com/mbox/"},{"id":178383,"url":"https://patchwork.plctlab.org/api/1.2/patches/178383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39c1ec0-e16d-4235-9f6d-77f61cb3162b@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T00:26:20","name":"[committed] Minor testsuite fallout from c99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39c1ec0-e16d-4235-9f6d-77f61cb3162b@gmail.com/mbox/"},{"id":178415,"url":"https://patchwork.plctlab.org/api/1.2/patches/178415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214010904.1724915-1-jwakely@redhat.com/","msgid":"<20231214010904.1724915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-14T01:07:32","name":"libstdc++: Optimize std::is_trivially_destructible_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214010904.1724915-1-jwakely@redhat.com/mbox/"},{"id":178402,"url":"https://patchwork.plctlab.org/api/1.2/patches/178402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214012301.2193148-1-vladimir.mezentsev@oracle.com/","msgid":"<20231214012301.2193148-1-vladimir.mezentsev@oracle.com>","list_archive_url":null,"date":"2023-12-14T01:23:01","name":"gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214012301.2193148-1-vladimir.mezentsev@oracle.com/mbox/"},{"id":178427,"url":"https://patchwork.plctlab.org/api/1.2/patches/178427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214025530.2007037-1-haochen.jiang@intel.com/","msgid":"<20231214025530.2007037-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-14T02:55:30","name":"i386: Remove RAO-INT from Grand Ridge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214025530.2007037-1-haochen.jiang@intel.com/mbox/"},{"id":178440,"url":"https://patchwork.plctlab.org/api/1.2/patches/178440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214032343.124505-1-juzhe.zhong@rivai.ai/","msgid":"<20231214032343.124505-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T03:23:43","name":"RISC-V: Add RVV builtin vectorization cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214032343.124505-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178560,"url":"https://patchwork.plctlab.org/api/1.2/patches/178560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqrcOiMerjD2VnT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:14:56","name":"[committed] testsuite: Fix up target-enter-data-1.c on 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqrcOiMerjD2VnT@tucnak/mbox/"},{"id":178542,"url":"https://patchwork.plctlab.org/api/1.2/patches/178542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwHvSUCdIHr3tp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:34:54","name":"match.pd: Simplify (t * u) / v -> t * (u / v) [PR112994]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwHvSUCdIHr3tp@tucnak/mbox/"},{"id":178544,"url":"https://patchwork.plctlab.org/api/1.2/patches/178544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwuCz6am3WB+9c@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:37:28","name":"match.pd: Simplify (t * u) / (t * v) [PR112994]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwuCz6am3WB+9c@tucnak/mbox/"},{"id":178549,"url":"https://patchwork.plctlab.org/api/1.2/patches/178549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org/","msgid":"<20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T07:41:00","name":"tree-optimization/110640 - testcase for fixed bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org/mbox/"},{"id":178555,"url":"https://patchwork.plctlab.org/api/1.2/patches/178555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074752.6196-1-juzhe.zhong@rivai.ai/","msgid":"<20231214074752.6196-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T07:47:52","name":"[Committed] RISC-V: Add failed SLP testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074752.6196-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178556,"url":"https://patchwork.plctlab.org/api/1.2/patches/178556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214075402.464671-1-hongyu.wang@intel.com/","msgid":"<20231214075402.464671-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-14T07:54:02","name":"i386: Sync move_max/store_max with prefer-vector-width [PR112824]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214075402.464671-1-hongyu.wang@intel.com/mbox/"},{"id":178561,"url":"https://patchwork.plctlab.org/api/1.2/patches/178561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com/","msgid":"<67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com>","list_archive_url":null,"date":"2023-12-14T08:18:47","name":"expmed: Get vec_extract element mode from insn_data, [PR112999]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com/mbox/"},{"id":178670,"url":"https://patchwork.plctlab.org/api/1.2/patches/178670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214112645.6454-1-xujiahao@loongson.cn/","msgid":"<20231214112645.6454-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-14T11:26:45","name":"LoongArch: Fix incorrect code generation for sad pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214112645.6454-1-xujiahao@loongson.cn/mbox/"},{"id":178697,"url":"https://patchwork.plctlab.org/api/1.2/patches/178697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214120713.23896-1-wangfeng@eswincomputing.com/","msgid":"<20231214120713.23896-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-14T12:07:13","name":"Revert \"RISC-V: Add avail interface into function_group_info\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214120713.23896-1-wangfeng@eswincomputing.com/mbox/"},{"id":178712,"url":"https://patchwork.plctlab.org/api/1.2/patches/178712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214124904.5801-1-xujiahao@loongson.cn/","msgid":"<20231214124904.5801-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-14T12:49:04","name":"[v2] LoongArch: Fix incorrect code generation for sad pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214124904.5801-1-xujiahao@loongson.cn/mbox/"},{"id":178714,"url":"https://patchwork.plctlab.org/api/1.2/patches/178714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214125453.9824-1-wangfeng@eswincomputing.com/","msgid":"<20231214125453.9824-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-14T12:54:53","name":"[committed] Revert \"RISC-V: Add avail interface into function_group_info\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214125453.9824-1-wangfeng@eswincomputing.com/mbox/"},{"id":178725,"url":"https://patchwork.plctlab.org/api/1.2/patches/178725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfyc7wc1.fsf@euler.schwinge.homeip.net/","msgid":"<87zfyc7wc1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-14T13:22:22","name":"In '\''gcc/gimple-ssa-sccopy.cc'\'', '\''#define INCLUDE_ALGORITHM'\'' instead of '\''#include '\'' (was: [PATCH v4] A new copy propagation and PHI elimination pass)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfyc7wc1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178738,"url":"https://patchwork.plctlab.org/api/1.2/patches/178738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f530c44f-450a-43b9-98ed-d390ebf5f3c8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T13:33:24","name":"[committed] Fix m68k testcase for c99","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f530c44f-450a-43b9-98ed-d390ebf5f3c8@gmail.com/mbox/"},{"id":178743,"url":"https://patchwork.plctlab.org/api/1.2/patches/178743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214134559.137710-1-juzhe.zhong@rivai.ai/","msgid":"<20231214134559.137710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T13:45:59","name":"Middle-end: Do not model address cost for SELECT_VL style vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214134559.137710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178744,"url":"https://patchwork.plctlab.org/api/1.2/patches/178744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y10vqun.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T13:46:56","name":"aarch64: Improve handling of accumulators in early-ra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y10vqun.fsf@arm.com/mbox/"},{"id":178747,"url":"https://patchwork.plctlab.org/api/1.2/patches/178747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214141340.3301765-1-dmalcolm@redhat.com/","msgid":"<20231214141340.3301765-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T14:13:40","name":"[pushed] analyzer: cleanups [PR112655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214141340.3301765-1-dmalcolm@redhat.com/mbox/"},{"id":178769,"url":"https://patchwork.plctlab.org/api/1.2/patches/178769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-2-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:40","name":"[1/4;,v3] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-2-dmalcolm@redhat.com/mbox/"},{"id":178771,"url":"https://patchwork.plctlab.org/api/1.2/patches/178771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-3-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:41","name":"[2/4;,v3] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-3-dmalcolm@redhat.com/mbox/"},{"id":178766,"url":"https://patchwork.plctlab.org/api/1.2/patches/178766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-4-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:42","name":"[3/4;,v2] opts: add logic to generate options-urls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-4-dmalcolm@redhat.com/mbox/"},{"id":178767,"url":"https://patchwork.plctlab.org/api/1.2/patches/178767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-5-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:43","name":"[4/4;,v2] options: wire up options-urls.cc into gcc_urlifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-5-dmalcolm@redhat.com/mbox/"},{"id":178768,"url":"https://patchwork.plctlab.org/api/1.2/patches/178768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-2-arthur.cohen@embecosm.com/","msgid":"<20231214150539.12345-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-12-14T15:05:37","name":"[COMMITTED,1/4] libgrust: Add ChangeLog file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-2-arthur.cohen@embecosm.com/mbox/"},{"id":178770,"url":"https://patchwork.plctlab.org/api/1.2/patches/178770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-3-arthur.cohen@embecosm.com/","msgid":"<20231214150539.12345-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-12-14T15:05:39","name":"[COMMITTED,2/4] libgrust: Add entry for maintainers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-3-arthur.cohen@embecosm.com/mbox/"},{"id":178776,"url":"https://patchwork.plctlab.org/api/1.2/patches/178776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150806.519A1134B0@imap2.dmz-prg2.suse.org/","msgid":"<20231214150806.519A1134B0@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T15:08:05","name":"tree-optimization/112793 - SLP of constant/external code-generated twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150806.519A1134B0@imap2.dmz-prg2.suse.org/mbox/"},{"id":178786,"url":"https://patchwork.plctlab.org/api/1.2/patches/178786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214155543.0B013138F2@imap2.dmz-prg2.suse.org/","msgid":"<20231214155543.0B013138F2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T15:55:42","name":"tree-optimization/113018 - ICE with BB reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214155543.0B013138F2@imap2.dmz-prg2.suse.org/mbox/"},{"id":178881,"url":"https://patchwork.plctlab.org/api/1.2/patches/178881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191719.1941342-1-ppalka@redhat.com/","msgid":"<20231214191719.1941342-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-14T19:17:19","name":"c++: abi_tag attribute on templates [PR109715]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191719.1941342-1-ppalka@redhat.com/mbox/"},{"id":178882,"url":"https://patchwork.plctlab.org/api/1.2/patches/178882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191725.1941372-1-ppalka@redhat.com/","msgid":"<20231214191725.1941372-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-14T19:17:25","name":"c++: section attribute on templates [PR70435, PR88061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191725.1941372-1-ppalka@redhat.com/mbox/"},{"id":178887,"url":"https://patchwork.plctlab.org/api/1.2/patches/178887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmtg36na.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:50:49","name":"hardened: use LD_PIE_SPEC only if defined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmtg36na.fsf@lxoliva.fsfla.org/mbox/"},{"id":178888,"url":"https://patchwork.plctlab.org/api/1.2/patches/178888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf4436ki.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:52:29","name":"strub: avoid lto inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf4436ki.fsf@lxoliva.fsfla.org/mbox/"},{"id":178890,"url":"https://patchwork.plctlab.org/api/1.2/patches/178890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7es36hr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:54:08","name":"strub: use opt_for_fn during ipa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7es36hr.fsf@lxoliva.fsfla.org/mbox/"},{"id":178894,"url":"https://patchwork.plctlab.org/api/1.2/patches/178894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpg35fe.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T20:17:09","name":"[#1/2] strub: sparc: omit frame in strub_leave [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpg35fe.fsf@lxoliva.fsfla.org/mbox/"},{"id":178901,"url":"https://patchwork.plctlab.org/api/1.2/patches/178901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXttN88kOtvRVn4t@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T21:01:43","name":"[v4] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXttN88kOtvRVn4t@redhat.com/mbox/"},{"id":178902,"url":"https://patchwork.plctlab.org/api/1.2/patches/178902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214210227.1190177-1-polacek@redhat.com/","msgid":"<20231214210227.1190177-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-14T21:02:27","name":"c++: fix parsing with auto(x) at block scope [PR112482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214210227.1190177-1-polacek@redhat.com/mbox/"},{"id":178903,"url":"https://patchwork.plctlab.org/api/1.2/patches/178903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il504hnr.fsf@euler.schwinge.homeip.net/","msgid":"<87il504hnr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-14T21:07:36","name":"Update '\''gcc.dg/vect/vect-simd-clone-*.c'\'' GCN '\''dg-warning'\''s (was: [PATCH] aarch64: enable mixed-types for aarch64 simdclones)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il504hnr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178911,"url":"https://patchwork.plctlab.org/api/1.2/patches/178911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs04324k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T21:28:27","name":"[#2/2] strub: sparc64: unbias the stack address [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs04324k.fsf@lxoliva.fsfla.org/mbox/"},{"id":178912,"url":"https://patchwork.plctlab.org/api/1.2/patches/178912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213201.180346-1-patrick@rivosinc.com/","msgid":"<20231214213201.180346-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-12-14T21:32:01","name":"RISC-V: Add -fno-vect-cost-model to pr112773 testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213201.180346-1-patrick@rivosinc.com/mbox/"},{"id":178914,"url":"https://patchwork.plctlab.org/api/1.2/patches/178914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213800.796944-1-quic_apinski@quicinc.com/","msgid":"<20231214213800.796944-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-14T21:38:00","name":"[COMMITTED] middle-end: Fix up constant handling in emit_conditional_move [PR111260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213800.796944-1-quic_apinski@quicinc.com/mbox/"},{"id":178929,"url":"https://patchwork.plctlab.org/api/1.2/patches/178929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214215544.3328245-1-dmalcolm@redhat.com/","msgid":"<20231214215544.3328245-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T21:55:44","name":"[pushed] testsuite: move more analyzer test cases to c-c++-common (3) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214215544.3328245-1-dmalcolm@redhat.com/mbox/"},{"id":178932,"url":"https://patchwork.plctlab.org/api/1.2/patches/178932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt+RP0GTiKhocIW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:14:28","name":"lower-bitint: Fix .{ADD,SUB,MUL}_OVERFLOW with _BitInt large/huge INTEGER_CST arguments [PR113003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt+RP0GTiKhocIW@tucnak/mbox/"},{"id":178934,"url":"https://patchwork.plctlab.org/api/1.2/patches/178934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt/yRs1g4MhLj+W@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:20:57","name":"bitint: Introduce abi_limb_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt/yRs1g4MhLj+W@tucnak/mbox/"},{"id":178936,"url":"https://patchwork.plctlab.org/api/1.2/patches/178936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222206.59796-1-juzhe.zhong@rivai.ai/","msgid":"<20231214222206.59796-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T22:22:06","name":"[Committed] RISC-V: Adjust test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222206.59796-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178940,"url":"https://patchwork.plctlab.org/api/1.2/patches/178940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222432.60088-1-juzhe.zhong@rivai.ai/","msgid":"<20231214222432.60088-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T22:24:32","name":"[Committed] RISC-V: Tweak generic vector COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222432.60088-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178942,"url":"https://patchwork.plctlab.org/api/1.2/patches/178942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXuBaGAdwlccjKq8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:27:52","name":"match.pd: Optimize sign-extension followed by truncation [PR113024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXuBaGAdwlccjKq8@tucnak/mbox/"},{"id":178986,"url":"https://patchwork.plctlab.org/api/1.2/patches/178986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000208.2068561-1-jwakely@redhat.com/","msgid":"<20231215000208.2068561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:01:46","name":"[committed] libstdc++: Fix %S format of duration with floating-point rep","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000208.2068561-1-jwakely@redhat.com/mbox/"},{"id":178985,"url":"https://patchwork.plctlab.org/api/1.2/patches/178985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000216.2068946-1-jwakely@redhat.com/","msgid":"<20231215000216.2068946-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:09","name":"[committed] libstdc++: Add dg-output to two tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000216.2068946-1-jwakely@redhat.com/mbox/"},{"id":178988,"url":"https://patchwork.plctlab.org/api/1.2/patches/178988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000224.2069098-1-jwakely@redhat.com/","msgid":"<20231215000224.2069098-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:17","name":"[committed] libstdc++: Tweaks for std::format fast path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000224.2069098-1-jwakely@redhat.com/mbox/"},{"id":178987,"url":"https://patchwork.plctlab.org/api/1.2/patches/178987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000243.2069266-1-jwakely@redhat.com/","msgid":"<20231215000243.2069266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:25","name":"[committed] libstdc++: Fix filebuf::native_handle() for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000243.2069266-1-jwakely@redhat.com/mbox/"},{"id":178993,"url":"https://patchwork.plctlab.org/api/1.2/patches/178993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000350.2069578-1-jwakely@redhat.com/","msgid":"<20231215000350.2069578-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:44","name":"[committed] libstdc++: Implement C++23 header [PR107760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000350.2069578-1-jwakely@redhat.com/mbox/"},{"id":178989,"url":"https://patchwork.plctlab.org/api/1.2/patches/178989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215012258.31512-1-zengxiao@eswincomputing.com/","msgid":"<20231215012258.31512-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-12-15T01:22:58","name":"[PING^1] RISC-V: Add Zvfbfmin extension to the -march= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215012258.31512-1-zengxiao@eswincomputing.com/mbox/"},{"id":178996,"url":"https://patchwork.plctlab.org/api/1.2/patches/178996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215023314.2708937-1-haochen.jiang@intel.com/","msgid":"<20231215023314.2708937-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-15T02:33:14","name":"i386: Allow 64 bit mask register for -mno-evex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215023314.2708937-1-haochen.jiang@intel.com/mbox/"},{"id":179019,"url":"https://patchwork.plctlab.org/api/1.2/patches/179019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215025750.159162-1-juzhe.zhong@rivai.ai/","msgid":"<20231215025750.159162-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T02:57:50","name":"RISC-V: Fix vmerge optimization bug in vec_perm vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215025750.159162-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179020,"url":"https://patchwork.plctlab.org/api/1.2/patches/179020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215030115.2757951-1-hongyu.wang@intel.com/","msgid":"<20231215030115.2757951-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-15T03:01:15","name":"testsuite: Require dfp for pr112943.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215030115.2757951-1-hongyu.wang@intel.com/mbox/"},{"id":179085,"url":"https://patchwork.plctlab.org/api/1.2/patches/179085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215080610.92416-1-juzhe.zhong@rivai.ai/","msgid":"<20231215080610.92416-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T08:06:10","name":"[Committed] RISC-V: Remove xfail for some of the SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215080610.92416-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179095,"url":"https://patchwork.plctlab.org/api/1.2/patches/179095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082234.421EE33E93@hamza.pair.com/","msgid":"<20231215082234.421EE33E93@hamza.pair.com>","list_archive_url":null,"date":"2023-12-15T08:22:28","name":"[pushed] doc: Update nvptx-tools Github link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082234.421EE33E93@hamza.pair.com/mbox/"},{"id":179098,"url":"https://patchwork.plctlab.org/api/1.2/patches/179098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082512.7FF7633E7A@hamza.pair.com/","msgid":"<20231215082512.7FF7633E7A@hamza.pair.com>","list_archive_url":null,"date":"2023-12-15T08:25:07","name":"[pushed] wwwdocs: projects/cli: Update ECMA reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082512.7FF7633E7A@hamza.pair.com/mbox/"},{"id":179111,"url":"https://patchwork.plctlab.org/api/1.2/patches/179111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com/","msgid":"<834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com>","list_archive_url":null,"date":"2023-12-15T08:52:01","name":"sel-sched: Verify change before replacing dest in EXPR_INSN_RTX [PR112995]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com/mbox/"},{"id":179117,"url":"https://patchwork.plctlab.org/api/1.2/patches/179117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215090223.3311-1-xry111@xry111.site/","msgid":"<20231215090223.3311-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-15T08:57:31","name":"[v2] LoongArch: Implement FCCmode reload and cstore4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215090223.3311-1-xry111@xry111.site/mbox/"},{"id":179196,"url":"https://patchwork.plctlab.org/api/1.2/patches/179196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215112809.0EBC513912@imap2.dmz-prg2.suse.org/","msgid":"<20231215112809.0EBC513912@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-15T11:28:08","name":"tree-optimization/113026 - avoid vector epilog in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215112809.0EBC513912@imap2.dmz-prg2.suse.org/mbox/"},{"id":179258,"url":"https://patchwork.plctlab.org/api/1.2/patches/179258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125531.279066-1-juzhe.zhong@rivai.ai/","msgid":"<20231215125531.279066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T12:55:31","name":"[V2] RISC-V: Fix vmerge optimization bug in vec_perm vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125531.279066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179262,"url":"https://patchwork.plctlab.org/api/1.2/patches/179262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125727.308264-1-xry111@xry111.site/","msgid":"<20231215125727.308264-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-15T12:56:35","name":"LoongArch: Remove constraint z from movsi_internal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125727.308264-1-xry111@xry111.site/mbox/"},{"id":179346,"url":"https://patchwork.plctlab.org/api/1.2/patches/179346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132227.2139454-1-jwakely@redhat.com/","msgid":"<20231215132227.2139454-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:21:51","name":"[committed] libstdc++: Do not add padding for std::print to std::ostream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132227.2139454-1-jwakely@redhat.com/mbox/"},{"id":179347,"url":"https://patchwork.plctlab.org/api/1.2/patches/179347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132244.2139474-1-jwakely@redhat.com/","msgid":"<20231215132244.2139474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:22:28","name":"[committed] libstdc++: Simplify std::vprint_unicode for non-Windows targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132244.2139474-1-jwakely@redhat.com/mbox/"},{"id":179284,"url":"https://patchwork.plctlab.org/api/1.2/patches/179284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132254.2139490-1-jwakely@redhat.com/","msgid":"<20231215132254.2139490-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:22:45","name":"[committed] libstdc++: Fix std::print test case for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132254.2139490-1-jwakely@redhat.com/mbox/"},{"id":179514,"url":"https://patchwork.plctlab.org/api/1.2/patches/179514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-2-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:26","name":"[1/3,RFC] RISC-V: Add non-vector types to pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-2-ewlu@rivosinc.com/mbox/"},{"id":179515,"url":"https://patchwork.plctlab.org/api/1.2/patches/179515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-3-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:27","name":"[2/3,RFC] RISC-V: Add vector related reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-3-ewlu@rivosinc.com/mbox/"},{"id":179516,"url":"https://patchwork.plctlab.org/api/1.2/patches/179516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-4-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:28","name":"[3/3,RFC] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-4-ewlu@rivosinc.com/mbox/"},{"id":179678,"url":"https://patchwork.plctlab.org/api/1.2/patches/179678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/657ced36.170a0220.f138a.ff27@mx.google.com/","msgid":"<657ced36.170a0220.f138a.ff27@mx.google.com>","list_archive_url":null,"date":"2023-12-16T00:20:02","name":"c++: Fix unchecked use of CLASSTYPE_AS_BASE [PR113031]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/657ced36.170a0220.f138a.ff27@mx.google.com/mbox/"},{"id":179720,"url":"https://patchwork.plctlab.org/api/1.2/patches/179720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com/","msgid":"<3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-16T00:47:23","name":"[committed,v4,5/5] aarch64: Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com/mbox/"},{"id":179852,"url":"https://patchwork.plctlab.org/api/1.2/patches/179852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216140544.3424839-1-dmalcolm@redhat.com/","msgid":"<20231216140544.3424839-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T14:05:44","name":"[pushed] analyzer: use bit-level granularity for concrete bounds-checking [PR112792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216140544.3424839-1-dmalcolm@redhat.com/mbox/"},{"id":179864,"url":"https://patchwork.plctlab.org/api/1.2/patches/179864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216155609.562884-1-hjl.tools@gmail.com/","msgid":"<20231216155609.562884-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-12-16T15:56:09","name":"x86: Get the previous shadow stack pointer from the restore token","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216155609.562884-1-hjl.tools@gmail.com/mbox/"},{"id":179915,"url":"https://patchwork.plctlab.org/api/1.2/patches/179915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-aad8c14c-b211-4687-96a9-db32950c47a1-1702751317953@3c-app-gmx-bs38/","msgid":"","list_archive_url":null,"date":"2023-12-16T18:28:37","name":"Fortran: fix argument passing to CONTIGUOUS,TARGET dummy [PR97592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-aad8c14c-b211-4687-96a9-db32950c47a1-1702751317953@3c-app-gmx-bs38/mbox/"},{"id":179916,"url":"https://patchwork.plctlab.org/api/1.2/patches/179916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216184406.1779682-1-hjl.tools@gmail.com/","msgid":"<20231216184406.1779682-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-12-16T18:44:06","name":"libstdc++: Update some baseline_symbols.txt (x32)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216184406.1779682-1-hjl.tools@gmail.com/mbox/"},{"id":179921,"url":"https://patchwork.plctlab.org/api/1.2/patches/179921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKqmYPYDrC+fm=WdDj6x=9xkZT3FfWgyUBH0L-7yz_yScAN7Qg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-16T20:10:33","name":"PR libstdc++/112682 More efficient std::basic_string move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKqmYPYDrC+fm=WdDj6x=9xkZT3FfWgyUBH0L-7yz_yScAN7Qg@mail.gmail.com/mbox/"},{"id":179926,"url":"https://patchwork.plctlab.org/api/1.2/patches/179926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212341.3443227-1-dmalcolm@redhat.com/","msgid":"<20231216212341.3443227-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T21:23:41","name":"[pushed] json: fix escaping of object keys","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212341.3443227-1-dmalcolm@redhat.com/mbox/"},{"id":179927,"url":"https://patchwork.plctlab.org/api/1.2/patches/179927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212347.3443252-1-dmalcolm@redhat.com/","msgid":"<20231216212347.3443252-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T21:23:47","name":"[pushed] analyzer: add sarif properties for bounds checking diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212347.3443252-1-dmalcolm@redhat.com/mbox/"},{"id":179929,"url":"https://patchwork.plctlab.org/api/1.2/patches/179929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225519.2306598-1-jwakely@redhat.com/","msgid":"<20231216225519.2306598-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-16T22:54:40","name":"[wwwdocs] Document std::print and std::ranges::to for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225519.2306598-1-jwakely@redhat.com/mbox/"},{"id":179936,"url":"https://patchwork.plctlab.org/api/1.2/patches/179936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225604.2306724-1-jwakely@redhat.com/","msgid":"<20231216225604.2306724-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-16T22:55:55","name":"[wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225604.2306724-1-jwakely@redhat.com/mbox/"},{"id":179931,"url":"https://patchwork.plctlab.org/api/1.2/patches/179931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217000341.2325821-1-jwakely@redhat.com/","msgid":"<20231217000341.2325821-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-17T00:03:24","name":"[committed] libstdc++: Fix bootstrap on AIX due to fileno macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217000341.2325821-1-jwakely@redhat.com/mbox/"},{"id":179941,"url":"https://patchwork.plctlab.org/api/1.2/patches/179941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217012149.AA1DE33E9F@hamza.pair.com/","msgid":"<20231217012149.AA1DE33E9F@hamza.pair.com>","list_archive_url":null,"date":"2023-12-17T01:21:44","name":"[pushed] doc: Remove references to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217012149.AA1DE33E9F@hamza.pair.com/mbox/"},{"id":179942,"url":"https://patchwork.plctlab.org/api/1.2/patches/179942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com/","msgid":"<4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com>","list_archive_url":null,"date":"2023-12-17T01:35:24","name":"install: Streamline the hppa*-hp-hpux* section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com/mbox/"},{"id":179966,"url":"https://patchwork.plctlab.org/api/1.2/patches/179966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217072809.A836633EA9@hamza.pair.com/","msgid":"<20231217072809.A836633EA9@hamza.pair.com>","list_archive_url":null,"date":"2023-12-17T07:28:04","name":"[doc] install: Drop hppa*-hp-hpux10, remove old notes on hppa*-hp-hpux11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217072809.A836633EA9@hamza.pair.com/mbox/"},{"id":180031,"url":"https://patchwork.plctlab.org/api/1.2/patches/180031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151309.4128-2-xry111@xry111.site/","msgid":"<20231217151309.4128-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-17T15:12:18","name":"LoongArch: Fix FP vector comparsons [PR113034]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151309.4128-2-xry111@xry111.site/mbox/"},{"id":180032,"url":"https://patchwork.plctlab.org/api/1.2/patches/180032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151713.4959-1-xry111@xry111.site/","msgid":"<20231217151713.4959-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-17T15:16:37","name":"LoongArch: Add sign_extend pattern for 32-bit rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151713.4959-1-xry111@xry111.site/mbox/"},{"id":180036,"url":"https://patchwork.plctlab.org/api/1.2/patches/180036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfk6dr6.fsf@oldenburg.str.redhat.com/","msgid":"<87edfk6dr6.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-12-17T15:38:05","name":"c-family: Use -Wdiscarded-qualifiers for ignored qualifiers in __atomic_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfk6dr6.fsf@oldenburg.str.redhat.com/mbox/"},{"id":180051,"url":"https://patchwork.plctlab.org/api/1.2/patches/180051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at/","msgid":"<0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:41:50","name":"[V5,C,1/4] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at/mbox/"},{"id":180052,"url":"https://patchwork.plctlab.org/api/1.2/patches/180052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at/","msgid":"<28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:02","name":"[V5,C,2/4] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at/mbox/"},{"id":180053,"url":"https://patchwork.plctlab.org/api/1.2/patches/180053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at/","msgid":"<4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:29","name":"[V5,C,3/4] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at/mbox/"},{"id":180054,"url":"https://patchwork.plctlab.org/api/1.2/patches/180054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at/","msgid":"<65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:41","name":"[V5,C,4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at/mbox/"},{"id":180057,"url":"https://patchwork.plctlab.org/api/1.2/patches/180057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190242.4132478-1-sandra@codesourcery.com/","msgid":"<20231217190242.4132478-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-17T19:02:41","name":"[V4,3/5] OpenMP: Use enumerators for names of trait-sets and traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190242.4132478-1-sandra@codesourcery.com/mbox/"},{"id":180058,"url":"https://patchwork.plctlab.org/api/1.2/patches/180058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190310.4132740-1-sandra@codesourcery.com/","msgid":"<20231217190310.4132740-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-17T19:03:10","name":"[5/5] OpenMP: Add prettyprinter support for context selectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190310.4132740-1-sandra@codesourcery.com/mbox/"},{"id":180076,"url":"https://patchwork.plctlab.org/api/1.2/patches/180076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/657f6d54.170a0220.7e557.2d05@mx.google.com/","msgid":"<657f6d54.170a0220.7e557.2d05@mx.google.com>","list_archive_url":null,"date":"2023-12-17T21:51:11","name":"c++: Check null pointer deref when calling memfn in constexpr [PR102420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/657f6d54.170a0220.7e557.2d05@mx.google.com/mbox/"},{"id":180097,"url":"https://patchwork.plctlab.org/api/1.2/patches/180097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218002223.2899237-1-pan2.li@intel.com/","msgid":"<20231218002223.2899237-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T00:22:23","name":"[v1] RISC-V: Fix POLY INT handle bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218002223.2899237-1-pan2.li@intel.com/mbox/"},{"id":180107,"url":"https://patchwork.plctlab.org/api/1.2/patches/180107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com/","msgid":"<17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T02:43:40","name":"[Patchv2,rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com/mbox/"},{"id":180108,"url":"https://patchwork.plctlab.org/api/1.2/patches/180108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com/","msgid":"<15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T02:44:09","name":"[Patchv2,rs6000] Clean up pre-checkings of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com/mbox/"},{"id":180128,"url":"https://patchwork.plctlab.org/api/1.2/patches/180128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032013.99095-1-juzhe.zhong@rivai.ai/","msgid":"<20231218032013.99095-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T03:20:13","name":"RISC-V: Fix natural regsize for fixed-vlmax of -march=rv64gc_zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032013.99095-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180131,"url":"https://patchwork.plctlab.org/api/1.2/patches/180131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032800.18938-1-wangfeng@eswincomputing.com/","msgid":"<20231218032800.18938-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T03:28:00","name":"RISC-V: Add required_extensions in function_group","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032800.18938-1-wangfeng@eswincomputing.com/mbox/"},{"id":180132,"url":"https://patchwork.plctlab.org/api/1.2/patches/180132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-1-syq@gcc.gnu.org/","msgid":"<20231218034422.2668628-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-18T03:44:21","name":"[1/2] MIPS: host_detect_local_cpu, init ret with concat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-1-syq@gcc.gnu.org/mbox/"},{"id":180133,"url":"https://patchwork.plctlab.org/api/1.2/patches/180133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-2-syq@gcc.gnu.org/","msgid":"<20231218034422.2668628-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-18T03:44:22","name":"[2/2] libiberty/reconcat: Add note about append string to NULL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-2-syq@gcc.gnu.org/mbox/"},{"id":180155,"url":"https://patchwork.plctlab.org/api/1.2/patches/180155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218064035.36034-1-xuli1@eswincomputing.com/","msgid":"<20231218064035.36034-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T06:40:35","name":"testsuite: Fix cpymem-1.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218064035.36034-1-xuli1@eswincomputing.com/mbox/"},{"id":180161,"url":"https://patchwork.plctlab.org/api/1.2/patches/180161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218065256.203306-1-juzhe.zhong@rivai.ai/","msgid":"<20231218065256.203306-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T06:52:56","name":"RISC-V: Enable vect test for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218065256.203306-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180163,"url":"https://patchwork.plctlab.org/api/1.2/patches/180163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070433.2000339-1-pan2.li@intel.com/","msgid":"<20231218070433.2000339-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T07:04:33","name":"[v1] RISC-V: Bugfix for the RVV const vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070433.2000339-1-pan2.li@intel.com/mbox/"},{"id":180165,"url":"https://patchwork.plctlab.org/api/1.2/patches/180165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070502.11111-1-xuli1@eswincomputing.com/","msgid":"<20231218070502.11111-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T07:05:02","name":"[v2] testsuite: Fix cpymem-1.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070502.11111-1-xuli1@eswincomputing.com/mbox/"},{"id":180177,"url":"https://patchwork.plctlab.org/api/1.2/patches/180177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218073557.2020740-1-pan2.li@intel.com/","msgid":"<20231218073557.2020740-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T07:35:57","name":"[v2] RISC-V: Bugfix for the RVV const vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218073557.2020740-1-pan2.li@intel.com/mbox/"},{"id":180202,"url":"https://patchwork.plctlab.org/api/1.2/patches/180202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAEH+Oi9+15lmzw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T08:34:39","name":"tree-object-size: Robustify alloc_size attribute handling [PR113013]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAEH+Oi9+15lmzw@tucnak/mbox/"},{"id":180209,"url":"https://patchwork.plctlab.org/api/1.2/patches/180209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r5r99or.fsf@calavera/","msgid":"<878r5r99or.fsf@calavera>","list_archive_url":null,"date":"2023-12-18T08:36:37","name":"Patch: Remove unneeded double operation in libstdc++-v3/src/c++17/fs_path.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r5r99or.fsf@calavera/mbox/"},{"id":180210,"url":"https://patchwork.plctlab.org/api/1.2/patches/180210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAIw7rXF2tx9CBg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T08:54:27","name":"[committed] testsuite: Fix up abi-tag25a.C test for C++11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAIw7rXF2tx9CBg@tucnak/mbox/"},{"id":180230,"url":"https://patchwork.plctlab.org/api/1.2/patches/180230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218094908.54114-1-juzhe.zhong@rivai.ai/","msgid":"<20231218094908.54114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T09:49:08","name":"[V2] RISC-V: Enable vect test for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218094908.54114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180277,"url":"https://patchwork.plctlab.org/api/1.2/patches/180277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218105929.65434-1-juzhe.zhong@rivai.ai/","msgid":"<20231218105929.65434-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T10:59:29","name":"RISC-V: Support one more overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218105929.65434-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180278,"url":"https://patchwork.plctlab.org/api/1.2/patches/180278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAnI7An6G6XWFSm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T11:04:03","name":"[committed] libgomp: Make libgomp.c/declare-variant-1.c test x86 specific","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAnI7An6G6XWFSm@tucnak/mbox/"},{"id":180287,"url":"https://patchwork.plctlab.org/api/1.2/patches/180287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218113521.71738-1-juzhe.zhong@rivai.ai/","msgid":"<20231218113521.71738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T11:35:21","name":"[V2] RISC-V: Support one more overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218113521.71738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180316,"url":"https://patchwork.plctlab.org/api/1.2/patches/180316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115144.23CE43857C63@sourceware.org/","msgid":"<20231218115144.23CE43857C63@sourceware.org>","list_archive_url":null,"date":"2023-12-18T11:50:06","name":"c/111975 - GIMPLE FE dumping and parsing of TARGET_MEM_REF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115144.23CE43857C63@sourceware.org/mbox/"},{"id":180326,"url":"https://patchwork.plctlab.org/api/1.2/patches/180326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-2-andre.simoesdiasvieira@arm.com/","msgid":"<20231218115323.15980-2-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2023-12-18T11:53:22","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-2-andre.simoesdiasvieira@arm.com/mbox/"},{"id":180328,"url":"https://patchwork.plctlab.org/api/1.2/patches/180328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-3-andre.simoesdiasvieira@arm.com/","msgid":"<20231218115323.15980-3-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2023-12-18T11:53:23","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-3-andre.simoesdiasvieira@arm.com/mbox/"},{"id":180428,"url":"https://patchwork.plctlab.org/api/1.2/patches/180428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134251.1513432-1-xry111@xry111.site/","msgid":"<20231218134251.1513432-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-18T13:42:02","name":"middle-end: Call negate_rtx instead of simplify_gen_unary expanding rotate shift [PR113033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134251.1513432-1-xry111@xry111.site/mbox/"},{"id":180430,"url":"https://patchwork.plctlab.org/api/1.2/patches/180430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134414.1513666-1-xry111@xry111.site/","msgid":"<20231218134414.1513666-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-18T13:43:43","name":"LoongArch: Expand left rotate to right rotate with negated amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134414.1513666-1-xry111@xry111.site/mbox/"},{"id":180450,"url":"https://patchwork.plctlab.org/api/1.2/patches/180450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218141024.89DCC3857C56@sourceware.org/","msgid":"<20231218141024.89DCC3857C56@sourceware.org>","list_archive_url":null,"date":"2023-12-18T14:08:49","name":"middle-end/111975 - dump -> GIMPLE FE roundtrip improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218141024.89DCC3857C56@sourceware.org/mbox/"},{"id":180456,"url":"https://patchwork.plctlab.org/api/1.2/patches/180456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org/","msgid":"<610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org>","list_archive_url":null,"date":"2023-12-18T14:35:06","name":"SECURITY.txt: Drop \"exploitable\" in reference to hardening issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org/mbox/"},{"id":180553,"url":"https://patchwork.plctlab.org/api/1.2/patches/180553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218163424.1066771-1-quic_apinski@quicinc.com/","msgid":"<20231218163424.1066771-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-18T16:34:24","name":"[COMMITTED] SCCP: Fix ODR issues when compiling with LTO [PR 113054}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218163424.1066771-1-quic_apinski@quicinc.com/mbox/"},{"id":180558,"url":"https://patchwork.plctlab.org/api/1.2/patches/180558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218164252.1963249-1-siddhesh@gotplt.org/","msgid":"<20231218164252.1963249-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-12-18T16:42:52","name":"tree-object-size: Always set computed bit for bdos [PR113012]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218164252.1963249-1-siddhesh@gotplt.org/mbox/"},{"id":180570,"url":"https://patchwork.plctlab.org/api/1.2/patches/180570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218165221.44037-2-xndchn@gmail.com/","msgid":"<20231218165221.44037-2-xndchn@gmail.com>","list_archive_url":null,"date":"2023-12-18T16:52:21","name":"gimple-fold.cc: enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contain padding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218165221.44037-2-xndchn@gmail.com/mbox/"},{"id":180571,"url":"https://patchwork.plctlab.org/api/1.2/patches/180571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6kfsazx.fsf@euler.schwinge.homeip.net/","msgid":"<87h6kfsazx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-18T16:58:58","name":"libgrust: '\''AM_ENABLE_MULTILIB'\'' only for target builds [PR113056] (was: [PATCH v2 2/4] libgrust: Add libproc_macro and build system)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6kfsazx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":180587,"url":"https://patchwork.plctlab.org/api/1.2/patches/180587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01db01da31d6$33055200$990ff600$@nextmovesoftware.com/","msgid":"<01db01da31d6$33055200$990ff600$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-18T17:18:19","name":"[x86] Improved TImode (128-bit) integer constants on x86_64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01db01da31d6$33055200$990ff600$@nextmovesoftware.com/mbox/"},{"id":180627,"url":"https://patchwork.plctlab.org/api/1.2/patches/180627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6dbf6f4f-922c-4228-a34b-1b17489db6cd-1702923119190@3c-app-gmx-bs40/","msgid":"","list_archive_url":null,"date":"2023-12-18T18:11:59","name":"Fortran: update DATE_AND_TIME intrinsic for Fortran 2018 [PR96580]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6dbf6f4f-922c-4228-a34b-1b17489db6cd-1702923119190@3c-app-gmx-bs40/mbox/"},{"id":180620,"url":"https://patchwork.plctlab.org/api/1.2/patches/180620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218185251.57671-1-krebbel@linux.ibm.com/","msgid":"<20231218185251.57671-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T18:52:51","name":"[Committed] IBM Z: Cover weak symbols with -munaligned-symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218185251.57671-1-krebbel@linux.ibm.com/mbox/"},{"id":180626,"url":"https://patchwork.plctlab.org/api/1.2/patches/180626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYCaIpyzJkqFTJBq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T19:14:42","name":"c: Split -Wcalloc-transposed-args warning from -Walloc-size, -Walloc-size fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYCaIpyzJkqFTJBq@tucnak/mbox/"},{"id":180637,"url":"https://patchwork.plctlab.org/api/1.2/patches/180637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195004.1238589-1-ppalka@redhat.com/","msgid":"<20231218195004.1238589-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:04","name":"c++: [[deprecated]] on template redecl [PR84542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195004.1238589-1-ppalka@redhat.com/mbox/"},{"id":180638,"url":"https://patchwork.plctlab.org/api/1.2/patches/180638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45c5452-1b17-43fe-a858-7bce23ee88f1@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T19:50:09","name":"fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45c5452-1b17-43fe-a858-7bce23ee88f1@gmail.com/mbox/"},{"id":180639,"url":"https://patchwork.plctlab.org/api/1.2/patches/180639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195013.1241371-1-ppalka@redhat.com/","msgid":"<20231218195013.1241371-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:13","name":"c++: local class memfn synth from uneval context [PR113063]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195013.1241371-1-ppalka@redhat.com/mbox/"},{"id":180640,"url":"https://patchwork.plctlab.org/api/1.2/patches/180640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195021.1244349-1-ppalka@redhat.com/","msgid":"<20231218195021.1244349-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:21","name":"c++: bad direct reference binding [PR113064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195021.1244349-1-ppalka@redhat.com/mbox/"},{"id":180654,"url":"https://patchwork.plctlab.org/api/1.2/patches/180654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z2AumLYtfSzYa_c=O5L35Q-C4ChERqj0ixXRsH+Khp_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T21:27:19","name":"[committed] i386: Eliminate redundant compare between set{z, nz} and j{z, nz}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z2AumLYtfSzYa_c=O5L35Q-C4ChERqj0ixXRsH+Khp_g@mail.gmail.com/mbox/"},{"id":180656,"url":"https://patchwork.plctlab.org/api/1.2/patches/180656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218213135.2720773-1-jason@redhat.com/","msgid":"<20231218213135.2720773-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-18T21:31:35","name":"[RFC] c++/modules: __class_type_info and modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218213135.2720773-1-jason@redhat.com/mbox/"},{"id":180667,"url":"https://patchwork.plctlab.org/api/1.2/patches/180667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/269d021e-7aad-22de-1469-f332abbfede9@redhat.com/","msgid":"<269d021e-7aad-22de-1469-f332abbfede9@redhat.com>","list_archive_url":null,"date":"2023-12-18T22:16:38","name":"[pushed,PR112918,LRA] : Fixing IRA ICE on m68k","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/269d021e-7aad-22de-1469-f332abbfede9@redhat.com/mbox/"},{"id":180670,"url":"https://patchwork.plctlab.org/api/1.2/patches/180670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYDHvnz5bi//bzdQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T22:29:18","name":"aarch64: Fix parens in aarch64_stp_reg_operand [PR113061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYDHvnz5bi//bzdQ@arm.com/mbox/"},{"id":180683,"url":"https://patchwork.plctlab.org/api/1.2/patches/180683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218230631.1779040-1-ppalka@redhat.com/","msgid":"<20231218230631.1779040-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T23:06:31","name":"[pushed] libstdc++: Make ranges::to closure objects SFINAE-friendly [PR112802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218230631.1779040-1-ppalka@redhat.com/mbox/"},{"id":180702,"url":"https://patchwork.plctlab.org/api/1.2/patches/180702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219012341.11792-1-wangfeng@eswincomputing.com/","msgid":"<20231219012341.11792-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T01:23:41","name":"[committed] RISC-V: Add required_extensions in function_group","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219012341.11792-1-wangfeng@eswincomputing.com/mbox/"},{"id":180705,"url":"https://patchwork.plctlab.org/api/1.2/patches/180705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219013049.3165982-1-syq@gcc.gnu.org/","msgid":"<20231219013049.3165982-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-19T01:30:49","name":"[v2] MIPS: Put the ret to the end of args of reconcat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219013049.3165982-1-syq@gcc.gnu.org/mbox/"},{"id":180709,"url":"https://patchwork.plctlab.org/api/1.2/patches/180709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219014455.33713-1-xuli1@eswincomputing.com/","msgid":"<20231219014455.33713-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T01:44:55","name":"testsuite: Fix cpymem-2.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219014455.33713-1-xuli1@eswincomputing.com/mbox/"},{"id":180738,"url":"https://patchwork.plctlab.org/api/1.2/patches/180738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219041633.209503-1-juzhe.zhong@rivai.ai/","msgid":"<20231219041633.209503-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T04:16:33","name":"[Committed] RISC-V: Remove 256/512/1024 VLS vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219041633.209503-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180748,"url":"https://patchwork.plctlab.org/api/1.2/patches/180748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219043523.215375-1-juzhe.zhong@rivai.ai/","msgid":"<20231219043523.215375-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T04:35:23","name":"[Committed] RISC-V: Fix FAIL of dynamic-lmul2-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219043523.215375-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180759,"url":"https://patchwork.plctlab.org/api/1.2/patches/180759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053000.2741-1-xuli1@eswincomputing.com/","msgid":"<20231219053000.2741-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T05:30:00","name":"testsuite: Fix dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053000.2741-1-xuli1@eswincomputing.com/mbox/"},{"id":180761,"url":"https://patchwork.plctlab.org/api/1.2/patches/180761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053853.3764283-1-hongtao.liu@intel.com/","msgid":"<20231219053853.3764283-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-19T05:38:53","name":"Optimize A < B ? A : B to MIN_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053853.3764283-1-hongtao.liu@intel.com/mbox/"},{"id":180788,"url":"https://patchwork.plctlab.org/api/1.2/patches/180788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-2-xry111@xry111.site/","msgid":"<20231219065957.70665-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-19T06:59:56","name":"[1/2] LoongArch: Use force_reg instead of gen_reg_rtx + emit_move_insn in vec_init expander [PR113033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-2-xry111@xry111.site/mbox/"},{"id":180789,"url":"https://patchwork.plctlab.org/api/1.2/patches/180789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-3-xry111@xry111.site/","msgid":"<20231219065957.70665-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-19T06:59:57","name":"[2/2] LoongArch: Clean up vec_init expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-3-xry111@xry111.site/mbox/"},{"id":180828,"url":"https://patchwork.plctlab.org/api/1.2/patches/180828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084231.1758550-1-juzhe.zhong@rivai.ai/","msgid":"<20231219084231.1758550-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T08:42:30","name":"[Committed] RISC-V: Force scalable vector on all vsetvl tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084231.1758550-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180827,"url":"https://patchwork.plctlab.org/api/1.2/patches/180827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084317.58579-1-chenxiaolong@loongson.cn/","msgid":"<20231219084317.58579-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-19T08:43:17","name":"[v1] LoongArch: Fix builtin function prototypes for LASX in doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084317.58579-1-chenxiaolong@loongson.cn/mbox/"},{"id":180839,"url":"https://patchwork.plctlab.org/api/1.2/patches/180839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFbkrzkdwHhPghN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-19T09:00:02","name":"i386: Fix mmx.md signbit expanders [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFbkrzkdwHhPghN@tucnak/mbox/"},{"id":180844,"url":"https://patchwork.plctlab.org/api/1.2/patches/180844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFgN6TSlhCDc6xA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-19T09:19:51","name":"aarch64: Validate register operands early in ldp fusion pass [PR113062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFgN6TSlhCDc6xA@arm.com/mbox/"},{"id":180851,"url":"https://patchwork.plctlab.org/api/1.2/patches/180851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-2-slewis@rivosinc.com/","msgid":"<20231219095348.356551-2-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:46","name":"[v2,1/3] RISC-V: movmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-2-slewis@rivosinc.com/mbox/"},{"id":180853,"url":"https://patchwork.plctlab.org/api/1.2/patches/180853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-3-slewis@rivosinc.com/","msgid":"<20231219095348.356551-3-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:47","name":"[v2,2/3] RISC-V: setmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-3-slewis@rivosinc.com/mbox/"},{"id":180852,"url":"https://patchwork.plctlab.org/api/1.2/patches/180852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-4-slewis@rivosinc.com/","msgid":"<20231219095348.356551-4-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:48","name":"[v2,3/3] RISC-V: cmpmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-4-slewis@rivosinc.com/mbox/"},{"id":180862,"url":"https://patchwork.plctlab.org/api/1.2/patches/180862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219105635.2566878-1-juzhe.zhong@rivai.ai/","msgid":"<20231219105635.2566878-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T10:56:35","name":"[Committed] RISC-V: Refine some codes of expand_const_vector [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219105635.2566878-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180872,"url":"https://patchwork.plctlab.org/api/1.2/patches/180872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219110449.30805-1-chenglulu@loongson.cn/","msgid":"<20231219110449.30805-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-19T11:04:50","name":"LoongArch: Added TLS Le Relax support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219110449.30805-1-chenglulu@loongson.cn/mbox/"},{"id":180876,"url":"https://patchwork.plctlab.org/api/1.2/patches/180876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219111913.2568903-1-juzhe.zhong@rivai.ai/","msgid":"<20231219111913.2568903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T11:19:13","name":"Regression FIX: Remove vect_variable_length XFAIL from some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219111913.2568903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180877,"url":"https://patchwork.plctlab.org/api/1.2/patches/180877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net/","msgid":"<87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-19T11:20:01","name":"Unify OpenACC/C and C++ behavior re duplicate OpenACC '\''declare'\'' directives for '\''extern'\'' variables [PR90868] (was: [committed] [PR90868] Document status quo for duplicate OpenACC '\''declare'\'' directives for '\''extern'\'' variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net/mbox/"},{"id":180883,"url":"https://patchwork.plctlab.org/api/1.2/patches/180883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219114048.2570818-1-juzhe.zhong@rivai.ai/","msgid":"<20231219114048.2570818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T11:40:48","name":"RISC-V: Fix FAIL of bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219114048.2570818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180904,"url":"https://patchwork.plctlab.org/api/1.2/patches/180904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123235.08F453861816@sourceware.org/","msgid":"<20231219123235.08F453861816@sourceware.org>","list_archive_url":null,"date":"2023-12-19T12:30:58","name":"tree-optimization/113073 - amend PR112736 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123235.08F453861816@sourceware.org/mbox/"},{"id":180905,"url":"https://patchwork.plctlab.org/api/1.2/patches/180905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123251.29740386076C@sourceware.org/","msgid":"<20231219123251.29740386076C@sourceware.org>","list_archive_url":null,"date":"2023-12-19T12:31:13","name":"tree-optimization/113080 - missing final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123251.29740386076C@sourceware.org/mbox/"},{"id":180987,"url":"https://patchwork.plctlab.org/api/1.2/patches/180987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219142956.454370-1-poulhies@adacore.com/","msgid":"<20231219142956.454370-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:29:56","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219142956.454370-1-poulhies@adacore.com/mbox/"},{"id":180988,"url":"https://patchwork.plctlab.org/api/1.2/patches/180988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143005.454530-1-poulhies@adacore.com/","msgid":"<20231219143005.454530-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:05","name":"[COMMITTED] ada: Illegal instance of Generic_1.Generic_2 incorrectly accepted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143005.454530-1-poulhies@adacore.com/mbox/"},{"id":180990,"url":"https://patchwork.plctlab.org/api/1.2/patches/180990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143008.454633-1-poulhies@adacore.com/","msgid":"<20231219143008.454633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:08","name":"[COMMITTED] ada: Cleanup SPARK legality checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143008.454633-1-poulhies@adacore.com/mbox/"},{"id":181014,"url":"https://patchwork.plctlab.org/api/1.2/patches/181014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143027.454697-1-poulhies@adacore.com/","msgid":"<20231219143027.454697-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:10","name":"[COMMITTED] ada: Do not issue SPARK legality error if SPARK_Mode ignored","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143027.454697-1-poulhies@adacore.com/mbox/"},{"id":180992,"url":"https://patchwork.plctlab.org/api/1.2/patches/180992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143030.454782-1-poulhies@adacore.com/","msgid":"<20231219143030.454782-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:30","name":"[COMMITTED] ada: Restore object constraint optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143030.454782-1-poulhies@adacore.com/mbox/"},{"id":180995,"url":"https://patchwork.plctlab.org/api/1.2/patches/180995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143032.454847-1-poulhies@adacore.com/","msgid":"<20231219143032.454847-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:32","name":"[COMMITTED] ada: Cope with Sem_Util.Enclosing_Declaration oddness.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143032.454847-1-poulhies@adacore.com/mbox/"},{"id":180993,"url":"https://patchwork.plctlab.org/api/1.2/patches/180993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143034.454911-1-poulhies@adacore.com/","msgid":"<20231219143034.454911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:33","name":"[COMMITTED] ada: Plug small loophole in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143034.454911-1-poulhies@adacore.com/mbox/"},{"id":180997,"url":"https://patchwork.plctlab.org/api/1.2/patches/180997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143035.454977-1-poulhies@adacore.com/","msgid":"<20231219143035.454977-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:35","name":"[COMMITTED] ada: Fix spurious visibility error on parent'\''s component in instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143035.454977-1-poulhies@adacore.com/mbox/"},{"id":181015,"url":"https://patchwork.plctlab.org/api/1.2/patches/181015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143037.455041-1-poulhies@adacore.com/","msgid":"<20231219143037.455041-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:37","name":"[COMMITTED] ada: Add missing guard to previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143037.455041-1-poulhies@adacore.com/mbox/"},{"id":180998,"url":"https://patchwork.plctlab.org/api/1.2/patches/180998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143039.455106-1-poulhies@adacore.com/","msgid":"<20231219143039.455106-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:39","name":"[COMMITTED] ada: Fix SPARK expansion of container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143039.455106-1-poulhies@adacore.com/mbox/"},{"id":181008,"url":"https://patchwork.plctlab.org/api/1.2/patches/181008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143041.455170-1-poulhies@adacore.com/","msgid":"<20231219143041.455170-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:41","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143041.455170-1-poulhies@adacore.com/mbox/"},{"id":181004,"url":"https://patchwork.plctlab.org/api/1.2/patches/181004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143043.455234-1-poulhies@adacore.com/","msgid":"<20231219143043.455234-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:43","name":"[COMMITTED] ada: Fix crash on concurrent type aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143043.455234-1-poulhies@adacore.com/mbox/"},{"id":180996,"url":"https://patchwork.plctlab.org/api/1.2/patches/180996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143045.455298-1-poulhies@adacore.com/","msgid":"<20231219143045.455298-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:45","name":"[COMMITTED] ada: Adapt Ada.Command_Line to work on configurable runtimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143045.455298-1-poulhies@adacore.com/mbox/"},{"id":181001,"url":"https://patchwork.plctlab.org/api/1.2/patches/181001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143047.455362-1-poulhies@adacore.com/","msgid":"<20231219143047.455362-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:47","name":"[COMMITTED] ada: Remove No_Dynamic_Priorities from Restricted_Tasking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143047.455362-1-poulhies@adacore.com/mbox/"},{"id":181016,"url":"https://patchwork.plctlab.org/api/1.2/patches/181016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143049.455426-1-poulhies@adacore.com/","msgid":"<20231219143049.455426-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:49","name":"[COMMITTED] ada: Rename Is_Constr_Subt_For_UN_Aliased flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143049.455426-1-poulhies@adacore.com/mbox/"},{"id":181003,"url":"https://patchwork.plctlab.org/api/1.2/patches/181003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143050.455490-1-poulhies@adacore.com/","msgid":"<20231219143050.455490-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:50","name":"[COMMITTED] ada: Ignore unconstrained components as inputs for Depends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143050.455490-1-poulhies@adacore.com/mbox/"},{"id":181011,"url":"https://patchwork.plctlab.org/api/1.2/patches/181011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143052.455554-1-poulhies@adacore.com/","msgid":"<20231219143052.455554-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:52","name":"[COMMITTED] ada: Optimize performance and remove dynamic frame requirement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143052.455554-1-poulhies@adacore.com/mbox/"},{"id":181017,"url":"https://patchwork.plctlab.org/api/1.2/patches/181017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143054.455618-1-poulhies@adacore.com/","msgid":"<20231219143054.455618-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:54","name":"[COMMITTED] ada: gnatbind: Do not generate Ada.Command_Line references when not used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143054.455618-1-poulhies@adacore.com/mbox/"},{"id":181006,"url":"https://patchwork.plctlab.org/api/1.2/patches/181006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143056.455682-1-poulhies@adacore.com/","msgid":"<20231219143056.455682-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:56","name":"[COMMITTED] ada: Remove unreferenced utility routine Get_Logical_Line_Number_Img","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143056.455682-1-poulhies@adacore.com/mbox/"},{"id":181007,"url":"https://patchwork.plctlab.org/api/1.2/patches/181007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143057.455747-1-poulhies@adacore.com/","msgid":"<20231219143057.455747-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:57","name":"[COMMITTED] ada: Fix style and typos in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143057.455747-1-poulhies@adacore.com/mbox/"},{"id":181009,"url":"https://patchwork.plctlab.org/api/1.2/patches/181009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143059.455817-1-poulhies@adacore.com/","msgid":"<20231219143059.455817-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:59","name":"[COMMITTED] ada: Compiler hangs on container aggregate with function call as key expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143059.455817-1-poulhies@adacore.com/mbox/"},{"id":181013,"url":"https://patchwork.plctlab.org/api/1.2/patches/181013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143101.455881-1-poulhies@adacore.com/","msgid":"<20231219143101.455881-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:01","name":"[COMMITTED] ada: Rework comment in Expand_Ctrl_Function_Call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143101.455881-1-poulhies@adacore.com/mbox/"},{"id":181018,"url":"https://patchwork.plctlab.org/api/1.2/patches/181018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143103.455945-1-poulhies@adacore.com/","msgid":"<20231219143103.455945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:03","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143103.455945-1-poulhies@adacore.com/mbox/"},{"id":181020,"url":"https://patchwork.plctlab.org/api/1.2/patches/181020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143104.456009-1-poulhies@adacore.com/","msgid":"<20231219143104.456009-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:04","name":"[COMMITTED] ada: Missing error on positional container aggregates for types with Add_Named","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143104.456009-1-poulhies@adacore.com/mbox/"},{"id":181010,"url":"https://patchwork.plctlab.org/api/1.2/patches/181010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143106.456073-1-poulhies@adacore.com/","msgid":"<20231219143106.456073-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:06","name":"[COMMITTED] ada: Check all interfaces for valid iterator type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143106.456073-1-poulhies@adacore.com/mbox/"},{"id":181023,"url":"https://patchwork.plctlab.org/api/1.2/patches/181023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143108.456179-1-poulhies@adacore.com/","msgid":"<20231219143108.456179-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:08","name":"[COMMITTED] ada: Fix internal error on call with parameter of predicated subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143108.456179-1-poulhies@adacore.com/mbox/"},{"id":181005,"url":"https://patchwork.plctlab.org/api/1.2/patches/181005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143109.456243-1-poulhies@adacore.com/","msgid":"<20231219143109.456243-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:09","name":"[COMMITTED] ada: Add makefile targets for building/installing html doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143109.456243-1-poulhies@adacore.com/mbox/"},{"id":181130,"url":"https://patchwork.plctlab.org/api/1.2/patches/181130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219172153.2298161-1-siddhesh@gotplt.org/","msgid":"<20231219172153.2298161-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-12-19T17:21:53","name":"tree-object-size: Clean up unknown propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219172153.2298161-1-siddhesh@gotplt.org/mbox/"},{"id":181258,"url":"https://patchwork.plctlab.org/api/1.2/patches/181258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com/","msgid":"<42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com>","list_archive_url":null,"date":"2023-12-19T20:54:34","name":"gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com/mbox/"},{"id":181308,"url":"https://patchwork.plctlab.org/api/1.2/patches/181308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221731.2944661-1-jason@redhat.com/","msgid":"<20231219221731.2944661-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-19T22:17:31","name":"[RFA] opts: -Werror=foo always implies -Wfoo [PR106213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221731.2944661-1-jason@redhat.com/mbox/"},{"id":181309,"url":"https://patchwork.plctlab.org/api/1.2/patches/181309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221935.79287-1-polacek@redhat.com/","msgid":"<20231219221935.79287-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-19T22:19:35","name":"sccopy: remove unused data member [PR113069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221935.79287-1-polacek@redhat.com/mbox/"},{"id":181343,"url":"https://patchwork.plctlab.org/api/1.2/patches/181343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplz13g5q.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-19T23:51:13","name":"[#2v2/2] strub: sparc64: unbias the stack address [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplz13g5q.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":181422,"url":"https://patchwork.plctlab.org/api/1.2/patches/181422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6kd38ob.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T02:32:52","name":"[FYI] -finline-stringops: copy timeout factor from memcmp-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6kd38ob.fsf@lxoliva.fsfla.org/mbox/"},{"id":181423,"url":"https://patchwork.plctlab.org/api/1.2/patches/181423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220023922.1076198-1-pan2.li@intel.com/","msgid":"<20231220023922.1076198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T02:39:22","name":"[v1] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220023922.1076198-1-pan2.li@intel.com/mbox/"},{"id":181429,"url":"https://patchwork.plctlab.org/api/1.2/patches/181429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyv137pa.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T02:53:53","name":"-finline-stringops: allow expansion into edges [PR113002]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyv137pa.fsf@lxoliva.fsfla.org/mbox/"},{"id":181453,"url":"https://patchwork.plctlab.org/api/1.2/patches/181453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com/","msgid":"<346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com>","list_archive_url":null,"date":"2023-12-20T04:25:23","name":"[committed] Stop forcing unsigned bitfields on mcore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com/mbox/"},{"id":181455,"url":"https://patchwork.plctlab.org/api/1.2/patches/181455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com/","msgid":"<4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com>","list_archive_url":null,"date":"2023-12-20T04:29:12","name":"[committed,gcc-wwwdocs] Add blurb about bitfield signedness on mcore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com/mbox/"},{"id":181461,"url":"https://patchwork.plctlab.org/api/1.2/patches/181461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFmAMQ214FmTReOkMaxCuxEiCKO7gWGAittA=H08K3x8ewTJbw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T04:32:37","name":"Fortran: Use non conflicting file extensions for intermediates [PR81615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFmAMQ214FmTReOkMaxCuxEiCKO7gWGAittA=H08K3x8ewTJbw@mail.gmail.com/mbox/"},{"id":181481,"url":"https://patchwork.plctlab.org/api/1.2/patches/181481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8r5p2xmp.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T06:31:26","name":"compare_tests: distinguish c-c++-common results by tool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8r5p2xmp.fsf@lxoliva.fsfla.org/mbox/"},{"id":181485,"url":"https://patchwork.plctlab.org/api/1.2/patches/181485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065011.2696544-1-juzhe.zhong@rivai.ai/","msgid":"<20231220065011.2696544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T06:50:11","name":"RISC-V: Fix bug of VSETVL fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065011.2696544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181486,"url":"https://patchwork.plctlab.org/api/1.2/patches/181486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065526.2698027-1-juzhe.zhong@rivai.ai/","msgid":"<20231220065526.2698027-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T06:55:26","name":"RISC-V: Optimize SELECT_VL codegen when length is known as smaller than VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065526.2698027-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181488,"url":"https://patchwork.plctlab.org/api/1.2/patches/181488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065606.2695737-1-pan2.li@intel.com/","msgid":"<20231220065606.2695737-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T06:56:06","name":"[v2] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065606.2695737-1-pan2.li@intel.com/mbox/"},{"id":181490,"url":"https://patchwork.plctlab.org/api/1.2/patches/181490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-1-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:28","name":"[v4,1/3] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-1-wangfeng@eswincomputing.com/mbox/"},{"id":181491,"url":"https://patchwork.plctlab.org/api/1.2/patches/181491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-2-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:29","name":"[v4,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-2-wangfeng@eswincomputing.com/mbox/"},{"id":181492,"url":"https://patchwork.plctlab.org/api/1.2/patches/181492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-3-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:30","name":"[v4,3/3] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-3-wangfeng@eswincomputing.com/mbox/"},{"id":181521,"url":"https://patchwork.plctlab.org/api/1.2/patches/181521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220081537.2013818-1-demin.han@starfivetech.com/","msgid":"<20231220081537.2013818-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-20T08:15:37","name":"RISC-V: Fix calculation of max live vregs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220081537.2013818-1-demin.han@starfivetech.com/mbox/"},{"id":181522,"url":"https://patchwork.plctlab.org/api/1.2/patches/181522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv88tz3v8.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:15:39","name":"[FYI] www: new AdaCore-contributed hardening features in gcc 13 and 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv88tz3v8.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":181525,"url":"https://patchwork.plctlab.org/api/1.2/patches/181525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220082040.2920483-1-juzhe.zhong@rivai.ai/","msgid":"<20231220082040.2920483-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T08:20:40","name":"[Committed] RISC-V: Fix ICE of moving SUBREG of vector mode to DImode scalar register on RV32 system.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220082040.2920483-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181531,"url":"https://patchwork.plctlab.org/api/1.2/patches/181531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7Ut6SzciCSpBkUvpN=Rook1q4pOWPZ3uC+tprZRa4YdMQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:39:24","name":"RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7Ut6SzciCSpBkUvpN=Rook1q4pOWPZ3uC+tprZRa4YdMQ@mail.gmail.com/mbox/"},{"id":181545,"url":"https://patchwork.plctlab.org/api/1.2/patches/181545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c10d0643-4cab-42a7-96ac-3fee9106f46a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:51:19","name":"[Patchv3,rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c10d0643-4cab-42a7-96ac-3fee9106f46a@linux.ibm.com/mbox/"},{"id":181546,"url":"https://patchwork.plctlab.org/api/1.2/patches/181546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f440fe00-9ac5-48b8-a33e-b0672cf5be94@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:56:26","name":"[rs6000] Call library for block memory compare when optimizing for size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f440fe00-9ac5-48b8-a33e-b0672cf5be94@linux.ibm.com/mbox/"},{"id":181551,"url":"https://patchwork.plctlab.org/api/1.2/patches/181551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com/","msgid":"<3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com>","list_archive_url":null,"date":"2023-12-20T09:25:42","name":"sched: Don'\''t skip empty block by removing no_real_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com/mbox/"},{"id":181552,"url":"https://patchwork.plctlab.org/api/1.2/patches/181552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYKz2fbKlwr0hIHC@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T09:28:57","name":"[v2] aarch64: Validate register operands early in ldp fusion pass [PR113062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYKz2fbKlwr0hIHC@arm.com/mbox/"},{"id":181554,"url":"https://patchwork.plctlab.org/api/1.2/patches/181554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220093533.3390676-1-pan2.li@intel.com/","msgid":"<20231220093533.3390676-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T09:35:33","name":"[v3] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220093533.3390676-1-pan2.li@intel.com/mbox/"},{"id":181597,"url":"https://patchwork.plctlab.org/api/1.2/patches/181597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYLAaEykjTR0a36e@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-20T10:22:32","name":"lower-bitint: Fix up handling of nested casts in mergeable stmt handling [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYLAaEykjTR0a36e@tucnak/mbox/"},{"id":181629,"url":"https://patchwork.plctlab.org/api/1.2/patches/181629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123039.502-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231220123039.502-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-20T12:30:39","name":"[v3,3/6] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123039.502-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":181630,"url":"https://patchwork.plctlab.org/api/1.2/patches/181630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123419.608-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231220123419.608-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-20T12:34:19","name":"[v3,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123419.608-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":181643,"url":"https://patchwork.plctlab.org/api/1.2/patches/181643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220134450.CBA93386181E@sourceware.org/","msgid":"<20231220134450.CBA93386181E@sourceware.org>","list_archive_url":null,"date":"2023-12-20T13:43:13","name":"Improve DCE of dead parts of a permute chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220134450.CBA93386181E@sourceware.org/mbox/"},{"id":181661,"url":"https://patchwork.plctlab.org/api/1.2/patches/181661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfhrmf2.fsf@euler.schwinge.homeip.net/","msgid":"<87edfhrmf2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-20T14:14:25","name":"No libstdc++ for GCN (was: No libstdc++ for nvptx)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfhrmf2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":181665,"url":"https://patchwork.plctlab.org/api/1.2/patches/181665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220144829.765056-1-abidh@codesourcery.com/","msgid":"<20231220144829.765056-1-abidh@codesourcery.com>","list_archive_url":null,"date":"2023-12-20T14:48:29","name":"[OpenACC] Add tests for implied copy of variables in reduction clause.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220144829.765056-1-abidh@codesourcery.com/mbox/"},{"id":181741,"url":"https://patchwork.plctlab.org/api/1.2/patches/181741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173104.3105138-1-jason@redhat.com/","msgid":"<20231220173104.3105138-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-20T17:31:04","name":"[pushed] c++: xvalue array subscript [PR103185]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173104.3105138-1-jason@redhat.com/mbox/"},{"id":181742,"url":"https://patchwork.plctlab.org/api/1.2/patches/181742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173117.3105333-1-jason@redhat.com/","msgid":"<20231220173117.3105333-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-20T17:31:17","name":"[pushed] c++: throwing dtor and empty try [PR113088]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173117.3105333-1-jason@redhat.com/mbox/"},{"id":181745,"url":"https://patchwork.plctlab.org/api/1.2/patches/181745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220180836.24936-1-palmer@rivosinc.com/","msgid":"<20231220180836.24936-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:08:36","name":"RISC-V: Document -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220180836.24936-1-palmer@rivosinc.com/mbox/"},{"id":181746,"url":"https://patchwork.plctlab.org/api/1.2/patches/181746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220181639.25609-2-palmer@rivosinc.com/","msgid":"<20231220181639.25609-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:16:40","name":"[wwwdocs] RISC-V: Add -mcmodel=large for GCC-14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220181639.25609-2-palmer@rivosinc.com/mbox/"},{"id":181747,"url":"https://patchwork.plctlab.org/api/1.2/patches/181747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220184109.27977-1-palmer@rivosinc.com/","msgid":"<20231220184109.27977-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:41:09","name":"RISC-V: Add --with-cmodel configure-time argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220184109.27977-1-palmer@rivosinc.com/mbox/"},{"id":181749,"url":"https://patchwork.plctlab.org/api/1.2/patches/181749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220190824.399818-1-kmatsui@gcc.gnu.org/","msgid":"<20231220190824.399818-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-20T19:08:24","name":"testsuite: Remove testsuite_tr1.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220190824.399818-1-kmatsui@gcc.gnu.org/mbox/"},{"id":181750,"url":"https://patchwork.plctlab.org/api/1.2/patches/181750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYM+cZIJOmWDZTSH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-20T19:20:17","name":"c++: Enable -Walloc-size and -Wcalloc-transposed-args warnings for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYM+cZIJOmWDZTSH@tucnak/mbox/"},{"id":181789,"url":"https://patchwork.plctlab.org/api/1.2/patches/181789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220220749.632100-1-ppalka@redhat.com/","msgid":"<20231220220749.632100-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-20T22:07:49","name":"c++: fix -Wparentheses with boolean-like class types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220220749.632100-1-ppalka@redhat.com/mbox/"},{"id":181940,"url":"https://patchwork.plctlab.org/api/1.2/patches/181940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com/","msgid":"<138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com>","list_archive_url":null,"date":"2023-12-21T01:37:52","name":"[Patchv3,rs6000] Clean up pre-checkings of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com/mbox/"},{"id":181942,"url":"https://patchwork.plctlab.org/api/1.2/patches/181942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221020627.3266898-1-jason@redhat.com/","msgid":"<20231221020627.3266898-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-21T02:06:27","name":"[pushed] c++: computed goto warning [PR37722]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221020627.3266898-1-jason@redhat.com/mbox/"},{"id":181944,"url":"https://patchwork.plctlab.org/api/1.2/patches/181944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221022518.4175834-1-pan2.li@intel.com/","msgid":"<20231221022518.4175834-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-21T02:25:18","name":"[v1] RISC-V: XFail the signbit-5 run test for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221022518.4175834-1-pan2.li@intel.com/mbox/"},{"id":181951,"url":"https://patchwork.plctlab.org/api/1.2/patches/181951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221024805.7671-1-wangfeng@eswincomputing.com/","msgid":"<20231221024805.7671-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-21T02:48:05","name":"[v5,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221024805.7671-1-wangfeng@eswincomputing.com/mbox/"},{"id":182005,"url":"https://patchwork.plctlab.org/api/1.2/patches/182005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredfgytmv.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-21T06:08:56","name":"[2/2,FYI] -finline-stringops: drop obsolete comment [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredfgytmv.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":182017,"url":"https://patchwork.plctlab.org/api/1.2/patches/182017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPidUHpLRVI4+tY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-21T07:00:05","name":"lower-bitint: Avoid nested casts in muldiv/float operands [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPidUHpLRVI4+tY@tucnak/mbox/"},{"id":182018,"url":"https://patchwork.plctlab.org/api/1.2/patches/182018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPjpltT0cX5jauL@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-21T07:05:10","name":"ubsan: Add workaround for missing bitint libubsan support for shifts [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPjpltT0cX5jauL@tucnak/mbox/"},{"id":182045,"url":"https://patchwork.plctlab.org/api/1.2/patches/182045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221082558.449203-1-haochen.jiang@intel.com/","msgid":"<20231221082558.449203-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-21T08:25:58","name":"[gcc-wwwdocs,v2] gcc-13/14: Mention recent update for x86_64 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221082558.449203-1-haochen.jiang@intel.com/mbox/"},{"id":182060,"url":"https://patchwork.plctlab.org/api/1.2/patches/182060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221085750.3541650-1-juzhe.zhong@rivai.ai/","msgid":"<20231221085750.3541650-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-21T08:57:50","name":"[Committed] RISC-V: Add dynamic LMUL test for x264","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221085750.3541650-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182142,"url":"https://patchwork.plctlab.org/api/1.2/patches/182142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfrzvluu4.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T10:21:23","name":"[pushed] aarch64: Fix cut-&-pasto in early RA pass [PR112948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfrzvluu4.fsf@arm.com/mbox/"},{"id":182143,"url":"https://patchwork.plctlab.org/api/1.2/patches/182143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5q3lut9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T10:21:54","name":"[pushed] aarch64: Fix early RA handling of deleted insns [PR113094]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5q3lut9.fsf@arm.com/mbox/"},{"id":182172,"url":"https://patchwork.plctlab.org/api/1.2/patches/182172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221123750.2303405-1-lhyatt@gmail.com/","msgid":"<20231221123750.2303405-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-21T12:37:50","name":"libcpp: Fix __has_include_next ICE in the last directory of the path [PR80755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221123750.2303405-1-lhyatt@gmail.com/mbox/"},{"id":182229,"url":"https://patchwork.plctlab.org/api/1.2/patches/182229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com/","msgid":"<9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com>","list_archive_url":null,"date":"2023-12-21T13:33:39","name":"libgccjit: Allow comparing aligned int types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com/mbox/"},{"id":182247,"url":"https://patchwork.plctlab.org/api/1.2/patches/182247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com/","msgid":"<455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com>","list_archive_url":null,"date":"2023-12-21T13:42:11","name":"libgccjit: Support signed char flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com/mbox/"},{"id":182287,"url":"https://patchwork.plctlab.org/api/1.2/patches/182287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZfQ=uDLqEoutbKMj5Y3qOT0T4GcBNrNybT3jP6+oNEEA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T15:02:58","name":"[committed] i386: Fix shifts with high register input operand [PR113044]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZfQ=uDLqEoutbKMj5Y3qOT0T4GcBNrNybT3jP6+oNEEA@mail.gmail.com/mbox/"},{"id":182388,"url":"https://patchwork.plctlab.org/api/1.2/patches/182388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221164914.943125-1-christophe.lyon@linaro.org/","msgid":"<20231221164914.943125-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-12-21T16:49:14","name":"Allow overriding EXPECT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221164914.943125-1-christophe.lyon@linaro.org/mbox/"},{"id":182362,"url":"https://patchwork.plctlab.org/api/1.2/patches/182362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5e30c7a9f9d27a2ef19d1f7ee5335aa14c7860e.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T16:59:45","name":"libgccjit: Allow sending a const pointer as argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5e30c7a9f9d27a2ef19d1f7ee5335aa14c7860e.camel@zoho.com/mbox/"},{"id":182432,"url":"https://patchwork.plctlab.org/api/1.2/patches/182432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221193243.368541-1-arsen@aarsen.me/","msgid":"<20231221193243.368541-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T19:19:29","name":"toplevel: don'\''t override gettext-runtime/configure-discovered build args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221193243.368541-1-arsen@aarsen.me/mbox/"},{"id":182454,"url":"https://patchwork.plctlab.org/api/1.2/patches/182454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-2-arsen@aarsen.me/","msgid":"<20231221211909.371736-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T20:01:31","name":"[v2,1/2] libstdc++: add missing include in ranges_util.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-2-arsen@aarsen.me/mbox/"},{"id":182464,"url":"https://patchwork.plctlab.org/api/1.2/patches/182464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-3-arsen@aarsen.me/","msgid":"<20231221211909.371736-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T20:01:32","name":"[v2,2/2] libstdc++: implement std::generator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-3-arsen@aarsen.me/mbox/"},{"id":182445,"url":"https://patchwork.plctlab.org/api/1.2/patches/182445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221201041.2709909-1-quic_apinski@quicinc.com/","msgid":"<20231221201041.2709909-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-21T20:10:41","name":"Document cond_copysign and cond_len_copysign optabs [PR112951]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221201041.2709909-1-quic_apinski@quicinc.com/mbox/"},{"id":182451,"url":"https://patchwork.plctlab.org/api/1.2/patches/182451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b963fdad41d8b038e9da2e85319427c9472cff57.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T21:01:27","name":"libgccjit: Add convert vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b963fdad41d8b038e9da2e85319427c9472cff57.camel@zoho.com/mbox/"},{"id":182455,"url":"https://patchwork.plctlab.org/api/1.2/patches/182455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at/","msgid":"<9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-21T21:47:59","name":"[V6] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at/mbox/"},{"id":182490,"url":"https://patchwork.plctlab.org/api/1.2/patches/182490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222001945.3536355-1-jason@redhat.com/","msgid":"<20231222001945.3536355-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T00:19:45","name":"[pushed] testsuite: suppress mangling compatibility aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222001945.3536355-1-jason@redhat.com/mbox/"},{"id":182491,"url":"https://patchwork.plctlab.org/api/1.2/patches/182491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222002002.3536507-1-jason@redhat.com/","msgid":"<20231222002002.3536507-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T00:20:02","name":"[pushed] c++: sizeof... mangling with alias template [PR95298]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222002002.3536507-1-jason@redhat.com/mbox/"},{"id":182495,"url":"https://patchwork.plctlab.org/api/1.2/patches/182495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222005914.13748-1-wangfeng@eswincomputing.com/","msgid":"<20231222005914.13748-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T00:59:14","name":"[v6,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222005914.13748-1-wangfeng@eswincomputing.com/mbox/"},{"id":182500,"url":"https://patchwork.plctlab.org/api/1.2/patches/182500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222013806.5853-1-wangfeng@eswincomputing.com/","msgid":"<20231222013806.5853-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T01:38:06","name":"[v7,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222013806.5853-1-wangfeng@eswincomputing.com/mbox/"},{"id":182505,"url":"https://patchwork.plctlab.org/api/1.2/patches/182505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222015936.8935-1-wangfeng@eswincomputing.com/","msgid":"<20231222015936.8935-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T01:59:36","name":"RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222015936.8935-1-wangfeng@eswincomputing.com/mbox/"},{"id":182508,"url":"https://patchwork.plctlab.org/api/1.2/patches/182508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222022901.1253705-1-sandra@codesourcery.com/","msgid":"<20231222022901.1253705-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-22T02:29:01","name":"[Committed,obvious] Testsuite: Fix failures in g++.dg/analyzer/placement-new-size.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222022901.1253705-1-sandra@codesourcery.com/mbox/"},{"id":182512,"url":"https://patchwork.plctlab.org/api/1.2/patches/182512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222023605.3894839-1-lipeng.zhu@intel.com/","msgid":"<20231222023605.3894839-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-12-22T02:36:06","name":"libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222023605.3894839-1-lipeng.zhu@intel.com/mbox/"},{"id":182511,"url":"https://patchwork.plctlab.org/api/1.2/patches/182511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222031754.3556161-1-jason@redhat.com/","msgid":"<20231222031754.3556161-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T03:17:54","name":"[pushed] c++: computed goto from catch block [PR81438]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222031754.3556161-1-jason@redhat.com/mbox/"},{"id":182587,"url":"https://patchwork.plctlab.org/api/1.2/patches/182587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVE5zMA/0hCcNxV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:12:23","name":"lower-bitint: Fix handle_cast ICE [PR113102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVE5zMA/0hCcNxV@tucnak/mbox/"},{"id":182588,"url":"https://patchwork.plctlab.org/api/1.2/patches/182588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVGEs0RMZelMjez@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:17:22","name":"lower-bitint: Handle unreleased SSA_NAMEs from earlier passes gracefully [PR113102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVGEs0RMZelMjez@tucnak/mbox/"},{"id":182589,"url":"https://patchwork.plctlab.org/api/1.2/patches/182589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222081844.782313-1-panchenghui@loongson.cn/","msgid":"<20231222081844.782313-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-12-22T08:18:44","name":"[v1] LoongArch: Fix ICE when passing two same vector argument consecutively","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222081844.782313-1-panchenghui@loongson.cn/mbox/"},{"id":182591,"url":"https://patchwork.plctlab.org/api/1.2/patches/182591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVHCsf63PsOhpIS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:21:30","name":"symtab-thunks: Use aggregate_value_p even on is_gimple_reg_type returns [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVHCsf63PsOhpIS@tucnak/mbox/"},{"id":182592,"url":"https://patchwork.plctlab.org/api/1.2/patches/182592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222082203.888077-1-panchenghui@loongson.cn/","msgid":"<20231222082203.888077-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-12-22T08:22:03","name":"[v1] LoongArch: Fix insn output of vec_concat templates for LASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222082203.888077-1-panchenghui@loongson.cn/mbox/"},{"id":182595,"url":"https://patchwork.plctlab.org/api/1.2/patches/182595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVKa0ZMbjsP+n1h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:35:55","name":"combine: Don'\''t optimize paradoxical SUBREG AND CONST_INT on WORD_REGISTER_OPERATIONS targets [PR112758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVKa0ZMbjsP+n1h@tucnak/mbox/"},{"id":182596,"url":"https://patchwork.plctlab.org/api/1.2/patches/182596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7U-33VeGbCXsu2Xo2=5=aESTZTw8DEE7t1xQ_eogp=cNA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-22T09:23:13","name":"RISC-V: Support -m[no-]unaligned-access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7U-33VeGbCXsu2Xo2=5=aESTZTw8DEE7t1xQ_eogp=cNA@mail.gmail.com/mbox/"},{"id":182602,"url":"https://patchwork.plctlab.org/api/1.2/patches/182602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222095156.304068-1-juzhe.zhong@rivai.ai/","msgid":"<20231222095156.304068-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-22T09:51:56","name":"RISC-V: Make PHI initial value occupy live V_REG in dynamic LMUL cost model analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222095156.304068-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182608,"url":"https://patchwork.plctlab.org/api/1.2/patches/182608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222100547.454123-1-kmatsui@gcc.gnu.org/","msgid":"<20231222100547.454123-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-22T10:05:47","name":"[committed] c++: testsuite: Remove testsuite_tr1.h includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222100547.454123-1-kmatsui@gcc.gnu.org/mbox/"},{"id":182612,"url":"https://patchwork.plctlab.org/api/1.2/patches/182612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com/","msgid":"<026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-22T10:14:06","name":"[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com/mbox/"},{"id":182614,"url":"https://patchwork.plctlab.org/api/1.2/patches/182614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com/","msgid":"<027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-22T10:25:39","name":"[x86_64] PR target/112992: Optimize mode for broadcast of constants.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com/mbox/"},{"id":182676,"url":"https://patchwork.plctlab.org/api/1.2/patches/182676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222141038.6657-1-amonakov@ispras.ru/","msgid":"<20231222141038.6657-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-12-22T14:10:38","name":"[v2] object lifetime instrumentation for Valgrind [PR66487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222141038.6657-1-amonakov@ispras.ru/mbox/"},{"id":182679,"url":"https://patchwork.plctlab.org/api/1.2/patches/182679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e0f36d10599dcbda88502b9631c3aae1119644.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-22T14:39:48","name":"libgccjit: Add missing builtins needed by optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e0f36d10599dcbda88502b9631c3aae1119644.camel@zoho.com/mbox/"},{"id":182702,"url":"https://patchwork.plctlab.org/api/1.2/patches/182702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com/","msgid":"<8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com>","list_archive_url":null,"date":"2023-12-22T15:25:41","name":"libgccjit: Implement sizeof operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com/mbox/"},{"id":182770,"url":"https://patchwork.plctlab.org/api/1.2/patches/182770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222194513.294048-1-vineetg@rivosinc.com/","msgid":"<20231222194513.294048-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-12-22T19:45:13","name":"RISC-V: RVV: add toggle to control vsetvl pass behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222194513.294048-1-vineetg@rivosinc.com/mbox/"},{"id":182787,"url":"https://patchwork.plctlab.org/api/1.2/patches/182787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222205230.182419-1-mark@klomp.org/","msgid":"<20231222205230.182419-1-mark@klomp.org>","list_archive_url":null,"date":"2023-12-22T20:52:30","name":"[COMMITTED] robots.txt: Disallow a few more bugzilla queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222205230.182419-1-mark@klomp.org/mbox/"},{"id":182803,"url":"https://patchwork.plctlab.org/api/1.2/patches/182803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222230742.1807755-1-juzhe.zhong@rivai.ai/","msgid":"<20231222230742.1807755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-22T23:07:42","name":"[Committed] RISC-V: Make PHI initial value occupy live V_REG in dynamic LMUL cost model analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222230742.1807755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182938,"url":"https://patchwork.plctlab.org/api/1.2/patches/182938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-1-syq@gcc.gnu.org/","msgid":"<20231223084835.4135176-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:48:34","name":"[commit,v3,1/2] MIPS: Put the ret to the end of args of reconcat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-1-syq@gcc.gnu.org/mbox/"},{"id":182939,"url":"https://patchwork.plctlab.org/api/1.2/patches/182939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-2-syq@gcc.gnu.org/","msgid":"<20231223084835.4135176-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:48:35","name":"[commit,v3,2/2] MIPS: Don'\''t add nan2008 option for -mtune=native","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-2-syq@gcc.gnu.org/mbox/"},{"id":182940,"url":"https://patchwork.plctlab.org/api/1.2/patches/182940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223085858.4136369-1-syq@gcc.gnu.org/","msgid":"<20231223085858.4136369-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:58:58","name":"[v3] EXPR: Emit an truncate if 31+ bits polluted for SImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223085858.4136369-1-syq@gcc.gnu.org/mbox/"},{"id":182949,"url":"https://patchwork.plctlab.org/api/1.2/patches/182949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223110733.2565292-1-pan2.li@intel.com/","msgid":"<20231223110733.2565292-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-23T11:07:33","name":"[v1] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223110733.2565292-1-pan2.li@intel.com/mbox/"},{"id":182955,"url":"https://patchwork.plctlab.org/api/1.2/patches/182955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223123957.2652658-1-pan2.li@intel.com/","msgid":"<20231223123957.2652658-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-23T12:39:57","name":"[v2] RISC-V: XFail the signbit-5 run test for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223123957.2652658-1-pan2.li@intel.com/mbox/"},{"id":183001,"url":"https://patchwork.plctlab.org/api/1.2/patches/183001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223183516.3712049-1-quic_apinski@quicinc.com/","msgid":"<20231223183516.3712049-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-23T18:35:16","name":"reassoc vs uninitialized variable {PR112581]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223183516.3712049-1-quic_apinski@quicinc.com/mbox/"},{"id":183008,"url":"https://patchwork.plctlab.org/api/1.2/patches/183008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-2-kmatsui@gcc.gnu.org/","msgid":"<20231223213542.448971-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T21:20:26","name":"[1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-2-kmatsui@gcc.gnu.org/mbox/"},{"id":183009,"url":"https://patchwork.plctlab.org/api/1.2/patches/183009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-3-kmatsui@gcc.gnu.org/","msgid":"<20231223213542.448971-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T21:20:27","name":"[2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-3-kmatsui@gcc.gnu.org/mbox/"},{"id":183010,"url":"https://patchwork.plctlab.org/api/1.2/patches/183010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-2-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:42","name":"[v2,1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-2-kmatsui@gcc.gnu.org/mbox/"},{"id":183011,"url":"https://patchwork.plctlab.org/api/1.2/patches/183011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-3-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:43","name":"[v2,2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-3-kmatsui@gcc.gnu.org/mbox/"},{"id":183012,"url":"https://patchwork.plctlab.org/api/1.2/patches/183012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-4-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:44","name":"[v2,3/8] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-4-kmatsui@gcc.gnu.org/mbox/"},{"id":183013,"url":"https://patchwork.plctlab.org/api/1.2/patches/183013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-5-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:45","name":"[v2,4/8] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-5-kmatsui@gcc.gnu.org/mbox/"},{"id":183015,"url":"https://patchwork.plctlab.org/api/1.2/patches/183015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-6-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:46","name":"[v2,5/8] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-6-kmatsui@gcc.gnu.org/mbox/"},{"id":183014,"url":"https://patchwork.plctlab.org/api/1.2/patches/183014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-7-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:47","name":"[v2,6/8] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-7-kmatsui@gcc.gnu.org/mbox/"},{"id":183016,"url":"https://patchwork.plctlab.org/api/1.2/patches/183016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-8-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:48","name":"[v2,7/8] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-8-kmatsui@gcc.gnu.org/mbox/"},{"id":183017,"url":"https://patchwork.plctlab.org/api/1.2/patches/183017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-9-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:49","name":"[v2,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-9-kmatsui@gcc.gnu.org/mbox/"},{"id":183022,"url":"https://patchwork.plctlab.org/api/1.2/patches/183022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223230558.849031-1-kmatsui@gcc.gnu.org/","msgid":"<20231223230558.849031-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T23:05:58","name":"[v2] libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223230558.849031-1-kmatsui@gcc.gnu.org/mbox/"},{"id":183023,"url":"https://patchwork.plctlab.org/api/1.2/patches/183023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com/","msgid":"<013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-23T23:37:50","name":"[ARC] Table-driven ashlsi implementation for better code/rtx_costs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com/mbox/"},{"id":183026,"url":"https://patchwork.plctlab.org/api/1.2/patches/183026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224004716.6D2D62043F@pchp3.se.axis.com/","msgid":"<20231224004716.6D2D62043F@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-12-24T00:47:16","name":"[committed] CRIS: Fix PR middle-end/113109; \"throw\" failing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224004716.6D2D62043F@pchp3.se.axis.com/mbox/"},{"id":183051,"url":"https://patchwork.plctlab.org/api/1.2/patches/183051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224123608.6650-1-xry111@xry111.site/","msgid":"<20231224123608.6650-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-24T12:33:14","name":"[v2] LoongArch: Expand left rotate to right rotate with negated amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224123608.6650-1-xry111@xry111.site/mbox/"},{"id":183109,"url":"https://patchwork.plctlab.org/api/1.2/patches/183109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYiCY3BstREB_3Yy@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-24T19:11:31","name":"[committed] hppa: Fix pr110279-1.c on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYiCY3BstREB_3Yy@mx3210.localdomain/mbox/"},{"id":183110,"url":"https://patchwork.plctlab.org/api/1.2/patches/183110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18110-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-24T19:15:33","name":"[testsuite] : Add more pragma novector to new tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18110-tamar@arm.com/mbox/"},{"id":183117,"url":"https://patchwork.plctlab.org/api/1.2/patches/183117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225032023.3061334-1-liwei@loongson.cn/","msgid":"<20231225032023.3061334-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-25T03:20:23","name":"[v1] LoongArch: Fixed bug in *bstrins__for_ior_mask template.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225032023.3061334-1-liwei@loongson.cn/mbox/"},{"id":183118,"url":"https://patchwork.plctlab.org/api/1.2/patches/183118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225040034.251374-1-quic_apinski@quicinc.com/","msgid":"<20231225040034.251374-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-25T04:00:34","name":"[COMMITTED] match: Improve `(a != b) ? (a + b) : (2 * a)` pattern [PR19832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225040034.251374-1-quic_apinski@quicinc.com/mbox/"},{"id":183129,"url":"https://patchwork.plctlab.org/api/1.2/patches/183129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225061952.897770-1-juzhe.zhong@rivai.ai/","msgid":"<20231225061952.897770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-25T06:19:52","name":"[Committed] RISC-V: Add one more ASM check in PR113112-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225061952.897770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183130,"url":"https://patchwork.plctlab.org/api/1.2/patches/183130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225062939.767-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231225062939.767-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-25T06:29:39","name":"[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225062939.767-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183161,"url":"https://patchwork.plctlab.org/api/1.2/patches/183161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225084521.78251-1-kito.cheng@sifive.com/","msgid":"<20231225084521.78251-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-25T08:45:21","name":"RISC-V: Fix misaligned stack offset for interrupt function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225084521.78251-1-kito.cheng@sifive.com/mbox/"},{"id":183164,"url":"https://patchwork.plctlab.org/api/1.2/patches/183164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225091725.1574738-1-juzhe.zhong@rivai.ai/","msgid":"<20231225091725.1574738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-25T09:17:25","name":"RISC-V: Move RVV V_REGS liveness computation into analyze_loop_vinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225091725.1574738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183222,"url":"https://patchwork.plctlab.org/api/1.2/patches/183222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225161723.3197-1-xry111@xry111.site/","msgid":"<20231225161723.3197-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-25T16:14:02","name":"[v2] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225161723.3197-1-xry111@xry111.site/mbox/"},{"id":183271,"url":"https://patchwork.plctlab.org/api/1.2/patches/183271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-2-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:04","name":"[V3,1/3] RISC-V: Remove the Scalar Bitmanip and Crypto Built-In function testsuites","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-2-shihua@iscas.ac.cn/mbox/"},{"id":183272,"url":"https://patchwork.plctlab.org/api/1.2/patches/183272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-3-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:05","name":"[V3,2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-3-shihua@iscas.ac.cn/mbox/"},{"id":183273,"url":"https://patchwork.plctlab.org/api/1.2/patches/183273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-4-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:06","name":"[V3,3/3] RISC-V: Add C intrinsic for Scalar Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-4-shihua@iscas.ac.cn/mbox/"},{"id":183286,"url":"https://patchwork.plctlab.org/api/1.2/patches/183286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226084227.2466936-1-juzhe.zhong@rivai.ai/","msgid":"<20231226084227.2466936-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-26T08:42:27","name":"[Committed] RISC-V: Some minior tweak on dynamic LMUL cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226084227.2466936-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183288,"url":"https://patchwork.plctlab.org/api/1.2/patches/183288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226093445.1860961-1-pan2.li@intel.com/","msgid":"<20231226093445.1860961-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-26T09:34:45","name":"[v2] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226093445.1860961-1-pan2.li@intel.com/mbox/"},{"id":183306,"url":"https://patchwork.plctlab.org/api/1.2/patches/183306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226105349.2755983-1-juzhe.zhong@rivai.ai/","msgid":"<20231226105349.2755983-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-26T10:53:49","name":"[Committed] RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226105349.2755983-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183381,"url":"https://patchwork.plctlab.org/api/1.2/patches/183381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226223818.128525-1-xry111@xry111.site/","msgid":"<20231226223818.128525-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-26T22:37:20","name":"LoongArch: Fix infinite secondary reloading of FCCmode [PR113148]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226223818.128525-1-xry111@xry111.site/mbox/"},{"id":183390,"url":"https://patchwork.plctlab.org/api/1.2/patches/183390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227015222.3393770-1-juzhe.zhong@rivai.ai/","msgid":"<20231227015222.3393770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T01:52:22","name":"RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length is in range [0, 31]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227015222.3393770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183393,"url":"https://patchwork.plctlab.org/api/1.2/patches/183393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227023826.226460-1-juzhe.zhong@rivai.ai/","msgid":"<20231227023826.226460-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T02:38:26","name":"[V2] RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length is in range [0, 31]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227023826.226460-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183436,"url":"https://patchwork.plctlab.org/api/1.2/patches/183436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227081641.1031426-1-juzhe.zhong@rivai.ai/","msgid":"<20231227081641.1031426-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T08:16:41","name":"[Committed] RISC-V: Make known NITERS loop be aware of dynamic lmul cost model liveness information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227081641.1031426-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183438,"url":"https://patchwork.plctlab.org/api/1.2/patches/183438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-2-chenglulu@loongson.cn/","msgid":"<20231227084654.20614-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-27T08:46:53","name":"[1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-2-chenglulu@loongson.cn/mbox/"},{"id":183437,"url":"https://patchwork.plctlab.org/api/1.2/patches/183437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-3-chenglulu@loongson.cn/","msgid":"<20231227084654.20614-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-27T08:46:54","name":"[2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-3-chenglulu@loongson.cn/mbox/"},{"id":183456,"url":"https://patchwork.plctlab.org/api/1.2/patches/183456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240670EE838D161E6A3810BE89FA@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-27T10:40:57","name":"aarch64: add '\''AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240670EE838D161E6A3810BE89FA@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":183552,"url":"https://patchwork.plctlab.org/api/1.2/patches/183552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at/","msgid":"<8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-27T19:23:50","name":"[C] C: Fix type compatibility for structs with variable sized fields.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at/mbox/"},{"id":183601,"url":"https://patchwork.plctlab.org/api/1.2/patches/183601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228013332.1707891-1-juzhe.zhong@rivai.ai/","msgid":"<20231228013332.1707891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-28T01:33:32","name":"[Committed] RISC-V: Make dynamic LMUL cost model more accurate for conversion codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228013332.1707891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183660,"url":"https://patchwork.plctlab.org/api/1.2/patches/183660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228065906.3356210-1-liwei@loongson.cn/","msgid":"<20231228065906.3356210-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-28T06:59:06","name":"[v1] LoongArch: Merge constant vector permuatation implementations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228065906.3356210-1-liwei@loongson.cn/mbox/"},{"id":183699,"url":"https://patchwork.plctlab.org/api/1.2/patches/183699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZD_jCdu6jTbHVyh3=u_kt7cbzZgBT5Ejdr8E8nhoyLaQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-28T11:33:13","name":"[committed] i386: Cleanup ix86_expand_{unary|binary}_operator issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZD_jCdu6jTbHVyh3=u_kt7cbzZgBT5Ejdr8E8nhoyLaQ@mail.gmail.com/mbox/"},{"id":183714,"url":"https://patchwork.plctlab.org/api/1.2/patches/183714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228122646.2594388-1-liwei@loongson.cn/","msgid":"<20231228122646.2594388-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-28T12:26:46","name":"[v2] LoongArch: Merge constant vector permuatation implementations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228122646.2594388-1-liwei@loongson.cn/mbox/"},{"id":183736,"url":"https://patchwork.plctlab.org/api/1.2/patches/183736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228135631.3581609-1-syq@gcc.gnu.org/","msgid":"<20231228135631.3581609-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-28T13:56:31","name":"MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228135631.3581609-1-syq@gcc.gnu.org/mbox/"},{"id":183754,"url":"https://patchwork.plctlab.org/api/1.2/patches/183754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005901da399e$7d13b330$773b1990$@nextmovesoftware.com/","msgid":"<005901da399e$7d13b330$773b1990$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-28T14:59:40","name":"Improved RTL expansion of field assignments into promoted registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005901da399e$7d13b330$773b1990$@nextmovesoftware.com/mbox/"},{"id":183776,"url":"https://patchwork.plctlab.org/api/1.2/patches/183776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228161611.10555-1-xry111@xry111.site/","msgid":"<20231228161611.10555-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-28T16:11:51","name":"[v3] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228161611.10555-1-xry111@xry111.site/mbox/"},{"id":183816,"url":"https://patchwork.plctlab.org/api/1.2/patches/183816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229012102.2424314-1-juzhe.zhong@rivai.ai/","msgid":"<20231229012102.2424314-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-29T01:21:02","name":"RISC-V: Count pointer type SSA into RVV regs liveness for dynamic LMUL cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229012102.2424314-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183817,"url":"https://patchwork.plctlab.org/api/1.2/patches/183817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229013936.2576234-1-juzhe.zhong@rivai.ai/","msgid":"<20231229013936.2576234-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-29T01:39:36","name":"[Committed] RISC-V: Robostify testcase pr113112-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229013936.2576234-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183819,"url":"https://patchwork.plctlab.org/api/1.2/patches/183819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014515.40945-1-chenxiaolong@loongson.cn/","msgid":"<20231229014515.40945-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T01:45:15","name":"[v1] LoongArch: testsuite:Fix FAIL in lasx-xvstelm.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014515.40945-1-chenxiaolong@loongson.cn/mbox/"},{"id":183820,"url":"https://patchwork.plctlab.org/api/1.2/patches/183820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014634.926-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229014634.926-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T01:46:34","name":"[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014634.926-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183821,"url":"https://patchwork.plctlab.org/api/1.2/patches/183821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014923.979-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229014923.979-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T01:49:23","name":"[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014923.979-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183823,"url":"https://patchwork.plctlab.org/api/1.2/patches/183823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com/","msgid":"<291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:09:51","name":"?????????[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183824,"url":"https://patchwork.plctlab.org/api/1.2/patches/183824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com/","msgid":"<60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:11:10","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183826,"url":"https://patchwork.plctlab.org/api/1.2/patches/183826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021222.24002-1-chenxiaolong@loongson.cn/","msgid":"<20231229021222.24002-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:22","name":"[v1,1/8] LoongArch: testsuite:Add detection procedures supported by the target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021222.24002-1-chenxiaolong@loongson.cn/mbox/"},{"id":183827,"url":"https://patchwork.plctlab.org/api/1.2/patches/183827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021235.24065-1-chenxiaolong@loongson.cn/","msgid":"<20231229021235.24065-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:35","name":"[v1,2/8] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021235.24065-1-chenxiaolong@loongson.cn/mbox/"},{"id":183831,"url":"https://patchwork.plctlab.org/api/1.2/patches/183831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021246.24122-1-chenxiaolong@loongson.cn/","msgid":"<20231229021246.24122-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:46","name":"[v1,3/8] LoongArch: testsuite:Added test support for vect-{82, 83}.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021246.24122-1-chenxiaolong@loongson.cn/mbox/"},{"id":183832,"url":"https://patchwork.plctlab.org/api/1.2/patches/183832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021256.24210-1-chenxiaolong@loongson.cn/","msgid":"<20231229021256.24210-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:56","name":"[v1,4/8] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021256.24210-1-chenxiaolong@loongson.cn/mbox/"},{"id":183828,"url":"https://patchwork.plctlab.org/api/1.2/patches/183828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021308.24800-1-chenxiaolong@loongson.cn/","msgid":"<20231229021308.24800-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:08","name":"[v1,5/8] LoongArch: testsuite:Modify the test behavior in file pr60510.f.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021308.24800-1-chenxiaolong@loongson.cn/mbox/"},{"id":183830,"url":"https://patchwork.plctlab.org/api/1.2/patches/183830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021318.28603-1-chenxiaolong@loongson.cn/","msgid":"<20231229021318.28603-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:18","name":"[v1,6/8] LoongArch: testsuite:Added additional vectorization \"-mlasx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021318.28603-1-chenxiaolong@loongson.cn/mbox/"},{"id":183829,"url":"https://patchwork.plctlab.org/api/1.2/patches/183829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021327.30356-1-chenxiaolong@loongson.cn/","msgid":"<20231229021327.30356-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:27","name":"[v1,7/8] LoongArch: testsuite:Added additional vectorization \"-mlsx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021327.30356-1-chenxiaolong@loongson.cn/mbox/"},{"id":183833,"url":"https://patchwork.plctlab.org/api/1.2/patches/183833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021337.32306-1-chenxiaolong@loongson.cn/","msgid":"<20231229021337.32306-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:37","name":"[v1,8/8] LoongArch: testsuite:Modify the result check in the FMA file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021337.32306-1-chenxiaolong@loongson.cn/mbox/"},{"id":183834,"url":"https://patchwork.plctlab.org/api/1.2/patches/183834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com/","msgid":"<3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:17:24","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183835,"url":"https://patchwork.plctlab.org/api/1.2/patches/183835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b64626-1ddc-4d85-8ba9-2a5927045ba3.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T02:25:04","name":"Re???Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b64626-1ddc-4d85-8ba9-2a5927045ba3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183838,"url":"https://patchwork.plctlab.org/api/1.2/patches/183838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d093d0eb-0fa5-4567-88f8-c2d45e4b5241.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T02:30:57","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d093d0eb-0fa5-4567-88f8-c2d45e4b5241.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183845,"url":"https://patchwork.plctlab.org/api/1.2/patches/183845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040015.6275-1-chenxiaolong@loongson.cn/","msgid":"<20231229040015.6275-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T04:00:15","name":"[v1] LoongArch: testsuite:Add the \"-ffast-math\" compilation option for the file vect-fmin-3.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040015.6275-1-chenxiaolong@loongson.cn/mbox/"},{"id":183846,"url":"https://patchwork.plctlab.org/api/1.2/patches/183846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040517.1100-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229040517.1100-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:05:17","name":"[v4] RISC-V: Refactor riscv-vector-builtins-bases.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040517.1100-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183847,"url":"https://patchwork.plctlab.org/api/1.2/patches/183847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229041355.1313-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229041355.1313-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:13:55","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229041355.1313-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183848,"url":"https://patchwork.plctlab.org/api/1.2/patches/183848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042114.1419-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229042114.1419-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:21:14","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042114.1419-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183849,"url":"https://patchwork.plctlab.org/api/1.2/patches/183849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042158.1472-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229042158.1472-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:21:58","name":"[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042158.1472-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183850,"url":"https://patchwork.plctlab.org/api/1.2/patches/183850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229044849.2340165-1-quic_apinski@quicinc.com/","msgid":"<20231229044849.2340165-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-29T04:48:49","name":"Fix gen-vect-26.c testcase after loops with multiple exits [PR113167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229044849.2340165-1-quic_apinski@quicinc.com/mbox/"},{"id":183861,"url":"https://patchwork.plctlab.org/api/1.2/patches/183861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074417.19547-1-chenxiaolong@loongson.cn/","msgid":"<20231229074417.19547-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T07:44:17","name":"[v1] LoongArch: testsuite:Add loongarch to gcc.dg/vect/slp-21.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074417.19547-1-chenxiaolong@loongson.cn/mbox/"},{"id":183865,"url":"https://patchwork.plctlab.org/api/1.2/patches/183865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074806.20549-1-chenxiaolong@loongson.cn/","msgid":"<20231229074806.20549-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T07:48:06","name":"[v1] LoongArch: testsuite:Add loongarch to gcc.dg/vect/slp-26.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074806.20549-1-chenxiaolong@loongson.cn/mbox/"},{"id":183876,"url":"https://patchwork.plctlab.org/api/1.2/patches/183876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZoDVk7zoznZbtrwuog-VGHfvk-arfVse1MRsWgFTkVCQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T08:55:39","name":"[committed] i386: Fix TARGET_USE_VECTOR_FP_CONVERTS SF->DF float_extend splitter [PR113133]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZoDVk7zoznZbtrwuog-VGHfvk-arfVse1MRsWgFTkVCQ@mail.gmail.com/mbox/"},{"id":183889,"url":"https://patchwork.plctlab.org/api/1.2/patches/183889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A0BE148A219601098F3CF79DA@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T10:28:38","name":"Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A0BE148A219601098F3CF79DA@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":183891,"url":"https://patchwork.plctlab.org/api/1.2/patches/183891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-1-syq@gcc.gnu.org/","msgid":"<20231229110004.2724974-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T11:00:03","name":"[1/2] MIPS: add pattern insqisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-1-syq@gcc.gnu.org/mbox/"},{"id":183892,"url":"https://patchwork.plctlab.org/api/1.2/patches/183892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-2-syq@gcc.gnu.org/","msgid":"<20231229110004.2724974-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T11:00:04","name":"[2/2] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-2-syq@gcc.gnu.org/mbox/"},{"id":183899,"url":"https://patchwork.plctlab.org/api/1.2/patches/183899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5d29a764f3cc8357e0dd344b96b2861335b9588.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-12-29T12:11:36","name":"Pushed: [PATCH v4] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5d29a764f3cc8357e0dd344b96b2861335b9588.camel@xry111.site/mbox/"},{"id":183900,"url":"https://patchwork.plctlab.org/api/1.2/patches/183900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229121301.47289-1-xry111@xry111.site/","msgid":"<20231229121301.47289-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-29T12:12:38","name":"[pushed] LoongArch: Fix the format of bstrins__for_ior_mask condition (NFC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229121301.47289-1-xry111@xry111.site/mbox/"},{"id":183915,"url":"https://patchwork.plctlab.org/api/1.2/patches/183915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18115-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T14:41:08","name":"AArch64 Update costing for vector conversions [PR110625]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18115-tamar@arm.com/mbox/"},{"id":183916,"url":"https://patchwork.plctlab.org/api/1.2/patches/183916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17512-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T14:42:52","name":"[20/21] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17512-tamar@arm.com/mbox/"},{"id":183922,"url":"https://patchwork.plctlab.org/api/1.2/patches/183922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-1-syq@gcc.gnu.org/","msgid":"<20231229161754.2802162-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T16:17:53","name":"[v2,1/2] MIPS: add pattern insqisi_extended and inshisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-1-syq@gcc.gnu.org/mbox/"},{"id":183923,"url":"https://patchwork.plctlab.org/api/1.2/patches/183923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-2-syq@gcc.gnu.org/","msgid":"<20231229161754.2802162-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T16:17:54","name":"[v2,2/2] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-2-syq@gcc.gnu.org/mbox/"},{"id":183927,"url":"https://patchwork.plctlab.org/api/1.2/patches/183927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-1-syq@gcc.gnu.org/","msgid":"<20231229174649.2811234-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T17:46:48","name":"[1/2] RTX_COST: Count instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-1-syq@gcc.gnu.org/mbox/"},{"id":183928,"url":"https://patchwork.plctlab.org/api/1.2/patches/183928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-2-syq@gcc.gnu.org/","msgid":"<20231229174649.2811234-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T17:46:49","name":"[2/2] MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-2-syq@gcc.gnu.org/mbox/"},{"id":183974,"url":"https://patchwork.plctlab.org/api/1.2/patches/183974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk/","msgid":"<91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk>","list_archive_url":null,"date":"2023-12-30T00:29:43","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk/mbox/"},{"id":183976,"url":"https://patchwork.plctlab.org/api/1.2/patches/183976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292020210.28105@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-12-30T01:23:31","name":"libstdc++ testsuite/20_util/hash/quality.cc: Increase timeout 3x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292020210.28105@arjuna.pair.com/mbox/"},{"id":183977,"url":"https://patchwork.plctlab.org/api/1.2/patches/183977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292023350.28105@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-12-30T01:41:26","name":"libstdc++ testsuite/std/ranges/iota/max_size_type.cc: Reduce /10 for simulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292023350.28105@arjuna.pair.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/mbox/"},{"id":56,"url":"https://patchwork.plctlab.org/api/1.2/bundles/56/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2024-01","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":184129,"url":"https://patchwork.plctlab.org/api/1.2/patches/184129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-1-j@lambda.is/","msgid":"<20231231155127.506883-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-31T15:51:26","name":"[v9,1/2] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-1-j@lambda.is/mbox/"},{"id":184128,"url":"https://patchwork.plctlab.org/api/1.2/patches/184128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-2-j@lambda.is/","msgid":"<20231231155127.506883-2-j@lambda.is>","list_archive_url":null,"date":"2023-12-31T15:51:27","name":"[v9,2/2] Add gcov MC/DC tests for GDC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-2-j@lambda.is/mbox/"},{"id":184130,"url":"https://patchwork.plctlab.org/api/1.2/patches/184130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com/","msgid":"<04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-31T16:23:18","name":"[middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com/mbox/"},{"id":184142,"url":"https://patchwork.plctlab.org/api/1.2/patches/184142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231191738.126529-1-xry111@xry111.site/","msgid":"<20231231191738.126529-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-31T19:15:10","name":"LoongArch: Provide fmin/fmax RTL pattern for vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231191738.126529-1-xry111@xry111.site/mbox/"},{"id":184154,"url":"https://patchwork.plctlab.org/api/1.2/patches/184154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101040329.3895909-1-quic_apinski@quicinc.com/","msgid":"<20240101040329.3895909-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-01T04:03:29","name":"Match: Improve inverted_equal_p for bool and `^` and `==` [PR113186]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101040329.3895909-1-quic_apinski@quicinc.com/mbox/"},{"id":184161,"url":"https://patchwork.plctlab.org/api/1.2/patches/184161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-1-bugaevc@gmail.com/","msgid":"<20240101115356.614446-1-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:54","name":"[gcc,1/3] Move GNU/Hurd startfile spec from config/i386/gnu.h to config/gnu.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-1-bugaevc@gmail.com/mbox/"},{"id":184160,"url":"https://patchwork.plctlab.org/api/1.2/patches/184160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-2-bugaevc@gmail.com/","msgid":"<20240101115356.614446-2-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:55","name":"[gcc,2/3] aarch64: Add support for aarch64-gnu (GNU/Hurd on AArch64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-2-bugaevc@gmail.com/mbox/"},{"id":184158,"url":"https://patchwork.plctlab.org/api/1.2/patches/184158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-3-bugaevc@gmail.com/","msgid":"<20240101115356.614446-3-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:56","name":"[gcc,3/3] libgcc: Add basic support for aarch64-gnu (GNU/Hurd on AArch64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-3-bugaevc@gmail.com/mbox/"},{"id":184175,"url":"https://patchwork.plctlab.org/api/1.2/patches/184175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101164807.3812140-1-syq@gcc.gnu.org/","msgid":"<20240101164807.3812140-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-01T16:48:07","name":"config-ml.in: Fix multi-os-dir search","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101164807.3812140-1-syq@gcc.gnu.org/mbox/"},{"id":184182,"url":"https://patchwork.plctlab.org/api/1.2/patches/184182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com/","msgid":"<49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com>","list_archive_url":null,"date":"2024-01-01T21:04:42","name":"[RFA,V3] new pass for sign/zero extension elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com/mbox/"},{"id":184189,"url":"https://patchwork.plctlab.org/api/1.2/patches/184189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102012032.21154-1-wangfeng@eswincomputing.com/","msgid":"<20240102012032.21154-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T01:20:32","name":"[committed] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102012032.21154-1-wangfeng@eswincomputing.com/mbox/"},{"id":184193,"url":"https://patchwork.plctlab.org/api/1.2/patches/184193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102015204.2146749-1-juzhe.zhong@rivai.ai/","msgid":"<20240102015204.2146749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T01:52:04","name":"[Committed] RISC-V: Declare STMT_VINFO_TYPE (...) as local variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102015204.2146749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184199,"url":"https://patchwork.plctlab.org/api/1.2/patches/184199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102022513.29490-1-wangfeng@eswincomputing.com/","msgid":"<20240102022513.29490-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T02:25:13","name":"[committed] RISC-V: Modify copyright year of vector-crypto.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102022513.29490-1-wangfeng@eswincomputing.com/mbox/"},{"id":184206,"url":"https://patchwork.plctlab.org/api/1.2/patches/184206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com/","msgid":"<3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T03:03:11","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184207,"url":"https://patchwork.plctlab.org/api/1.2/patches/184207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2401012219490.56278@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2024-01-02T03:22:53","name":"testsuite: Reduce gcc.dg/torture/inline-mem-cpy-1.c by 11 for simulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2401012219490.56278@arjuna.pair.com/mbox/"},{"id":184208,"url":"https://patchwork.plctlab.org/api/1.2/patches/184208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102033743.2158114-1-juzhe.zhong@rivai.ai/","msgid":"<20240102033743.2158114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T03:37:43","name":"RISC-V: Make liveness be aware of rgroup number of LENS[dynamic LMUL]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102033743.2158114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184209,"url":"https://patchwork.plctlab.org/api/1.2/patches/184209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com/","msgid":"<6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T03:40:01","name":"Re???Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184268,"url":"https://patchwork.plctlab.org/api/1.2/patches/184268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102072655.1533350-1-juzhe.zhong@rivai.ai/","msgid":"<20240102072655.1533350-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T07:26:55","name":"[Committed] RISC-V: Add simplification of dummy len and dummy mask COND_LEN_xxx pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102072655.1533350-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184274,"url":"https://patchwork.plctlab.org/api/1.2/patches/184274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-1-wangfeng@eswincomputing.com/","msgid":"<20240102074706.35947-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T07:47:05","name":"[v5,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-1-wangfeng@eswincomputing.com/mbox/"},{"id":184275,"url":"https://patchwork.plctlab.org/api/1.2/patches/184275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-2-wangfeng@eswincomputing.com/","msgid":"<20240102074706.35947-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T07:47:06","name":"[v5,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-2-wangfeng@eswincomputing.com/mbox/"},{"id":184289,"url":"https://patchwork.plctlab.org/api/1.2/patches/184289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102091814.8445-1-wangfeng@eswincomputing.com/","msgid":"<20240102091814.8445-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T09:18:14","name":"[v6,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102091814.8445-1-wangfeng@eswincomputing.com/mbox/"},{"id":184291,"url":"https://patchwork.plctlab.org/api/1.2/patches/184291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-2-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:34","name":"[v3,01/12,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-2-Ezra.Sitorus@arm.com/mbox/"},{"id":184298,"url":"https://patchwork.plctlab.org/api/1.2/patches/184298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-3-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:35","name":"[v3,02/12,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-3-Ezra.Sitorus@arm.com/mbox/"},{"id":184292,"url":"https://patchwork.plctlab.org/api/1.2/patches/184292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-4-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:36","name":"[v3,03/12,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-4-Ezra.Sitorus@arm.com/mbox/"},{"id":184296,"url":"https://patchwork.plctlab.org/api/1.2/patches/184296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-5-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-5-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:37","name":"[v3,04/12,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-5-Ezra.Sitorus@arm.com/mbox/"},{"id":184293,"url":"https://patchwork.plctlab.org/api/1.2/patches/184293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-6-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-6-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:38","name":"[v3,05/12,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-6-Ezra.Sitorus@arm.com/mbox/"},{"id":184300,"url":"https://patchwork.plctlab.org/api/1.2/patches/184300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-7-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-7-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:39","name":"[v3,06/12,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-7-Ezra.Sitorus@arm.com/mbox/"},{"id":184297,"url":"https://patchwork.plctlab.org/api/1.2/patches/184297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-8-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-8-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:40","name":"[v3,07/12,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-8-Ezra.Sitorus@arm.com/mbox/"},{"id":184301,"url":"https://patchwork.plctlab.org/api/1.2/patches/184301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-9-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-9-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:41","name":"[v3,08/12,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-9-Ezra.Sitorus@arm.com/mbox/"},{"id":184299,"url":"https://patchwork.plctlab.org/api/1.2/patches/184299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-10-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-10-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:42","name":"[v3,09/12,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-10-Ezra.Sitorus@arm.com/mbox/"},{"id":184294,"url":"https://patchwork.plctlab.org/api/1.2/patches/184294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-11-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-11-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:43","name":"[v3,10/12,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-11-Ezra.Sitorus@arm.com/mbox/"},{"id":184302,"url":"https://patchwork.plctlab.org/api/1.2/patches/184302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-12-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-12-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:44","name":"[v3,11/12,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-12-Ezra.Sitorus@arm.com/mbox/"},{"id":184303,"url":"https://patchwork.plctlab.org/api/1.2/patches/184303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-13-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-13-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:45","name":"[v3,12/12,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-13-Ezra.Sitorus@arm.com/mbox/"},{"id":184305,"url":"https://patchwork.plctlab.org/api/1.2/patches/184305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8655609-aa36-4d1d-845e-da3f7fa3be89.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-02T09:48:38","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8655609-aa36-4d1d-845e-da3f7fa3be89.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184348,"url":"https://patchwork.plctlab.org/api/1.2/patches/184348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102115538.1471137-1-pan2.li@intel.com/","msgid":"<20240102115538.1471137-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-02T11:55:38","name":"[v3] RISC-V: Bugfix for doesn'\''t honor no-signed-zeros option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102115538.1471137-1-pan2.li@intel.com/mbox/"},{"id":184319,"url":"https://patchwork.plctlab.org/api/1.2/patches/184319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102123943.1525-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240102123943.1525-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T12:39:43","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102123943.1525-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184357,"url":"https://patchwork.plctlab.org/api/1.2/patches/184357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmil4bj0t1.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2024-01-02T13:56:58","name":"libsanitizer: Enable LSan and TSan for riscv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmil4bj0t1.fsf@suse.de/mbox/"},{"id":184392,"url":"https://patchwork.plctlab.org/api/1.2/patches/184392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw/","msgid":"<1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw>","list_archive_url":null,"date":"2024-01-02T15:21:21","name":"[OpenACC,2.7] Implement reductions for arrays and structs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw/mbox/"},{"id":184431,"url":"https://patchwork.plctlab.org/api/1.2/patches/184431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102174826.1868173-1-ppalka@redhat.com/","msgid":"<20240102174826.1868173-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-02T17:48:26","name":"libstdc++: testsuite: reduce max_size_type.cc exec time [PR113175]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102174826.1868173-1-ppalka@redhat.com/mbox/"},{"id":184440,"url":"https://patchwork.plctlab.org/api/1.2/patches/184440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-2-iii@linux.ibm.com/","msgid":"<20240102194511.3171559-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-02T19:41:37","name":"[v2,1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-2-iii@linux.ibm.com/mbox/"},{"id":184439,"url":"https://patchwork.plctlab.org/api/1.2/patches/184439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-3-iii@linux.ibm.com/","msgid":"<20240102194511.3171559-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-02T19:41:38","name":"[v2,2/2] asan: Align .LASANPC on function boundary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-3-iii@linux.ibm.com/mbox/"},{"id":184443,"url":"https://patchwork.plctlab.org/api/1.2/patches/184443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102201720.1526-1-trdthg47@gmail.com/","msgid":"<20240102201720.1526-1-trdthg47@gmail.com>","list_archive_url":null,"date":"2024-01-02T20:17:20","name":"RISC-V: Implement ZACAS extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102201720.1526-1-trdthg47@gmail.com/mbox/"},{"id":184534,"url":"https://patchwork.plctlab.org/api/1.2/patches/184534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659490fd.170a0220.1ce2e.503a@mx.google.com/","msgid":"<659490fd.170a0220.1ce2e.503a@mx.google.com>","list_archive_url":null,"date":"2024-01-02T22:40:55","name":"c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659490fd.170a0220.1ce2e.503a@mx.google.com/mbox/"},{"id":184535,"url":"https://patchwork.plctlab.org/api/1.2/patches/184535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659491a5.170a0220.6af69.6797@mx.google.com/","msgid":"<659491a5.170a0220.6af69.6797@mx.google.com>","list_archive_url":null,"date":"2024-01-02T22:43:44","name":"c++/modules: Fix ICE when writing nontrivial variable initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659491a5.170a0220.6af69.6797@mx.google.com/mbox/"},{"id":184540,"url":"https://patchwork.plctlab.org/api/1.2/patches/184540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102233830.339489-1-dmalcolm@redhat.com/","msgid":"<20240102233830.339489-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-02T23:38:30","name":"[1/4;,v4] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102233830.339489-1-dmalcolm@redhat.com/mbox/"},{"id":184548,"url":"https://patchwork.plctlab.org/api/1.2/patches/184548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103010109.21997-1-wangfeng@eswincomputing.com/","msgid":"<20240103010109.21997-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-03T01:01:09","name":"[v6,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103010109.21997-1-wangfeng@eswincomputing.com/mbox/"},{"id":184554,"url":"https://patchwork.plctlab.org/api/1.2/patches/184554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103012828.2446443-3-victor.donascimento@arm.com/","msgid":"<20240103012828.2446443-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2024-01-03T01:28:19","name":"[v3,2/3] libatomic: Enable LSE128 128-bit atomics for armv9.4-a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103012828.2446443-3-victor.donascimento@arm.com/mbox/"},{"id":184628,"url":"https://patchwork.plctlab.org/api/1.2/patches/184628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103052145.28042-1-wangfeng@eswincomputing.com/","msgid":"<20240103052145.28042-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-03T05:21:45","name":"[v7,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103052145.28042-1-wangfeng@eswincomputing.com/mbox/"},{"id":184630,"url":"https://patchwork.plctlab.org/api/1.2/patches/184630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103061535.1737-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240103061535.1737-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-03T06:15:35","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103061535.1737-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184689,"url":"https://patchwork.plctlab.org/api/1.2/patches/184689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65953088.050a0220.d187.0c52@mx.google.com/","msgid":"<65953088.050a0220.d187.0c52@mx.google.com>","list_archive_url":null,"date":"2024-01-03T10:01:38","name":"c++: Export usings referring to global module fragment [PR109679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65953088.050a0220.d187.0c52@mx.google.com/mbox/"},{"id":184691,"url":"https://patchwork.plctlab.org/api/1.2/patches/184691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103100652.3891154-1-juzhe.zhong@rivai.ai/","msgid":"<20240103100652.3891154-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T10:06:52","name":"RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103100652.3891154-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184702,"url":"https://patchwork.plctlab.org/api/1.2/patches/184702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103105058.3068052-1-juzhe.zhong@rivai.ai/","msgid":"<20240103105058.3068052-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T10:50:58","name":"[V2] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103105058.3068052-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184713,"url":"https://patchwork.plctlab.org/api/1.2/patches/184713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZVH3QTlOXjznnGf@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-03T11:41:17","name":"[committed] Small tweaks for update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZVH3QTlOXjznnGf@tucnak/mbox/"},{"id":184733,"url":"https://patchwork.plctlab.org/api/1.2/patches/184733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65955649.170a0220.e1f37.25c3@mx.google.com/","msgid":"<65955649.170a0220.e1f37.25c3@mx.google.com>","list_archive_url":null,"date":"2024-01-03T12:42:43","name":"[v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65955649.170a0220.e1f37.25c3@mx.google.com/mbox/"},{"id":184774,"url":"https://patchwork.plctlab.org/api/1.2/patches/184774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com/","msgid":"<79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T14:47:54","name":"[committed] Re: [PATCH] openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com/mbox/"},{"id":184784,"url":"https://patchwork.plctlab.org/api/1.2/patches/184784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT2zjNN6Pf88rkKw5c0P0k4McCeYpkKO9-VCE1bvB4tmAg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-03T15:42:58","name":"Ping: [PATCH] enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contains padding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT2zjNN6Pf88rkKw5c0P0k4McCeYpkKO9-VCE1bvB4tmAg@mail.gmail.com/mbox/"},{"id":184786,"url":"https://patchwork.plctlab.org/api/1.2/patches/184786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com/","msgid":"<598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T15:54:13","name":"[committed] Re: [PATCH] openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com/mbox/"},{"id":184817,"url":"https://patchwork.plctlab.org/api/1.2/patches/184817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com/","msgid":"<7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T18:31:25","name":"libgomp.texi: Document omp_display_env","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com/mbox/"},{"id":184822,"url":"https://patchwork.plctlab.org/api/1.2/patches/184822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103184906.2568371-1-ppalka@redhat.com/","msgid":"<20240103184906.2568371-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-03T18:49:06","name":"c++: explicit inst w/ many constrained partial specs [PR104634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103184906.2568371-1-ppalka@redhat.com/mbox/"},{"id":184826,"url":"https://patchwork.plctlab.org/api/1.2/patches/184826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103200628.2795374-1-ppalka@redhat.com/","msgid":"<20240103200628.2795374-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-03T20:06:28","name":"[2/1] c++: access of class-scope partial tmpl spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103200628.2795374-1-ppalka@redhat.com/mbox/"},{"id":184857,"url":"https://patchwork.plctlab.org/api/1.2/patches/184857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103223843.2236692-1-juzhe.zhong@rivai.ai/","msgid":"<20240103223843.2236692-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T22:38:43","name":"[Committed,V3] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103223843.2236692-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184858,"url":"https://patchwork.plctlab.org/api/1.2/patches/184858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103224331.2237500-1-juzhe.zhong@rivai.ai/","msgid":"<20240103224331.2237500-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T22:43:31","name":"[Committed] RISC-V: Fix indent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103224331.2237500-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184890,"url":"https://patchwork.plctlab.org/api/1.2/patches/184890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-1-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:16","name":"[committed] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-1-syq@gcc.gnu.org/mbox/"},{"id":184891,"url":"https://patchwork.plctlab.org/api/1.2/patches/184891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-2-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:17","name":"[committed] MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-2-syq@gcc.gnu.org/mbox/"},{"id":184892,"url":"https://patchwork.plctlab.org/api/1.2/patches/184892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-3-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-3-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:18","name":"[committed] MIPS: Add pattern insqisi_extended and inshisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-3-syq@gcc.gnu.org/mbox/"},{"id":184893,"url":"https://patchwork.plctlab.org/api/1.2/patches/184893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-4-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-4-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:19","name":"[committed] MIPS/testsuite: Include stdio.h in mipscop tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-4-syq@gcc.gnu.org/mbox/"},{"id":184895,"url":"https://patchwork.plctlab.org/api/1.2/patches/184895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104022912.1896-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104022912.1896-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T02:29:12","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104022912.1896-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184897,"url":"https://patchwork.plctlab.org/api/1.2/patches/184897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023407.1949-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104023407.1949-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T02:34:07","name":"[v4] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023407.1949-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184898,"url":"https://patchwork.plctlab.org/api/1.2/patches/184898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023753.22590-1-chenglulu@loongson.cn/","msgid":"<20240104023753.22590-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-04T02:37:53","name":"LoongArch: Fixed the problem of incorrect judgment of the immediate field of the [x]vld/[x]vst instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023753.22590-1-chenglulu@loongson.cn/mbox/"},{"id":184908,"url":"https://patchwork.plctlab.org/api/1.2/patches/184908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104044835.1088123-1-sandra@codesourcery.com/","msgid":"<20240104044835.1088123-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-04T04:48:35","name":"[committed,obvious] OpenMP: trivial cleanups to omp-general.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104044835.1088123-1-sandra@codesourcery.com/mbox/"},{"id":184916,"url":"https://patchwork.plctlab.org/api/1.2/patches/184916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104065233.3958-1-juzhe.zhong@rivai.ai/","msgid":"<20240104065233.3958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T06:52:33","name":"[Committed] RISC-V: Refine LMUL computation for MASK_LEN_LOAD/MASK_LEN_STORE IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104065233.3958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184935,"url":"https://patchwork.plctlab.org/api/1.2/patches/184935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104082726.16368-1-juzhe.zhong@rivai.ai/","msgid":"<20240104082726.16368-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T08:27:26","name":"RISC-V: Teach liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104082726.16368-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184944,"url":"https://patchwork.plctlab.org/api/1.2/patches/184944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104084606.220114-1-juzhe.zhong@rivai.ai/","msgid":"<20240104084606.220114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T08:46:06","name":"[Committed,V2] RISC-V: Make liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104084606.220114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184945,"url":"https://patchwork.plctlab.org/api/1.2/patches/184945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZw8ospwLFcL1GR@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T08:48:50","name":"lower-bitint: Punt .*_OVERFLOW optimization if cast from IMAGPART_EXPR appears before REALPART_EXPR [PR113119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZw8ospwLFcL1GR@tucnak/mbox/"},{"id":184947,"url":"https://patchwork.plctlab.org/api/1.2/patches/184947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZzov90j4WZ/03I@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:00:18","name":"lower-bitint: Fix up lowering of huge _BitInt 0 PHI args [PR113120]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZzov90j4WZ/03I@tucnak/mbox/"},{"id":184955,"url":"https://patchwork.plctlab.org/api/1.2/patches/184955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ2PI1JG//L1n0m@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:11:24","name":"Improve __builtin_popcount* (x) == 1 generation if x is known != 0 [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ2PI1JG//L1n0m@tucnak/mbox/"},{"id":184957,"url":"https://patchwork.plctlab.org/api/1.2/patches/184957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092425.1844-2-mikpelinux@gmail.com/","msgid":"<20240104092425.1844-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2024-01-04T09:23:53","name":"Avoid ICE with m68k-elf -malign-int and libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092425.1844-2-mikpelinux@gmail.com/mbox/"},{"id":184959,"url":"https://patchwork.plctlab.org/api/1.2/patches/184959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092833.1116-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104092833.1116-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T09:28:33","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092833.1116-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184962,"url":"https://patchwork.plctlab.org/api/1.2/patches/184962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ7vGAu19HuMlge@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:34:52","name":"scev: Avoid ICE on results used in abnormal PHI args [PR113201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ7vGAu19HuMlge@tucnak/mbox/"},{"id":184983,"url":"https://patchwork.plctlab.org/api/1.2/patches/184983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104122915.3580970-1-juzhe.zhong@rivai.ai/","msgid":"<20240104122915.3580970-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T12:29:15","name":"[Committed,V3] RISC-V: Make liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104122915.3580970-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185013,"url":"https://patchwork.plctlab.org/api/1.2/patches/185013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104140724.3053486-1-jwakely@redhat.com/","msgid":"<20240104140724.3053486-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:06:49","name":"contrib: Add script name to usage error in gen_wcwidth.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104140724.3053486-1-jwakely@redhat.com/mbox/"},{"id":185021,"url":"https://patchwork.plctlab.org/api/1.2/patches/185021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142701.427320-1-dmalcolm@redhat.com/","msgid":"<20240104142701.427320-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:01","name":"[pushed] analyzer: handle arrays of unknown size in access diagrams [PR113222]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142701.427320-1-dmalcolm@redhat.com/mbox/"},{"id":185022,"url":"https://patchwork.plctlab.org/api/1.2/patches/185022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142716.427365-1-dmalcolm@redhat.com/","msgid":"<20240104142716.427365-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:16","name":"[pushed] analyzer: fix deref-before-check false positives due to inlining [PR112790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142716.427365-1-dmalcolm@redhat.com/mbox/"},{"id":185023,"url":"https://patchwork.plctlab.org/api/1.2/patches/185023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142728.427423-1-dmalcolm@redhat.com/","msgid":"<20240104142728.427423-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:28","name":"[pushed] analyzer: add sarif properties for checker events","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142728.427423-1-dmalcolm@redhat.com/mbox/"},{"id":185030,"url":"https://patchwork.plctlab.org/api/1.2/patches/185030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZbHOli2kMYK3n6r@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2024-01-04T14:56:58","name":"Add -falign-all-functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZbHOli2kMYK3n6r@kam.mff.cuni.cz/mbox/"},{"id":185035,"url":"https://patchwork.plctlab.org/api/1.2/patches/185035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104150405.3055716-1-jwakely@redhat.com/","msgid":"<20240104150405.3055716-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-04T15:02:51","name":"contrib: Remove C-style comments from Python files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104150405.3055716-1-jwakely@redhat.com/mbox/"},{"id":185052,"url":"https://patchwork.plctlab.org/api/1.2/patches/185052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104153735.2356348-2-arthur.cohen@embecosm.com/","msgid":"<20240104153735.2356348-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-04T15:33:53","name":"[COMMITTED] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104153735.2356348-2-arthur.cohen@embecosm.com/mbox/"},{"id":185064,"url":"https://patchwork.plctlab.org/api/1.2/patches/185064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de/","msgid":"<83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de>","list_archive_url":null,"date":"2024-01-04T16:28:02","name":"[avr,applied] PR target/112952 Fix attribute \"io\" et al. handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de/mbox/"},{"id":185122,"url":"https://patchwork.plctlab.org/api/1.2/patches/185122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-1-arsen@aarsen.me/","msgid":"<20240104185321.3276425-1-arsen@aarsen.me>","list_archive_url":null,"date":"2024-01-04T18:52:58","name":"[pushed,1/2] libstdc++: rename _A badname in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-1-arsen@aarsen.me/mbox/"},{"id":185121,"url":"https://patchwork.plctlab.org/api/1.2/patches/185121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-2-arsen@aarsen.me/","msgid":"<20240104185321.3276425-2-arsen@aarsen.me>","list_archive_url":null,"date":"2024-01-04T18:52:59","name":"[pushed,2/2] libstdc++: fix typo in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-2-arsen@aarsen.me/mbox/"},{"id":185124,"url":"https://patchwork.plctlab.org/api/1.2/patches/185124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea/","msgid":"<2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea>","list_archive_url":null,"date":"2024-01-04T19:16:27","name":":Re: [PATCH v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea/mbox/"},{"id":185161,"url":"https://patchwork.plctlab.org/api/1.2/patches/185161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8ae8f6f-97c3-4c93-b253-db8d653b560e@hazardy.de/","msgid":"","list_archive_url":null,"date":"2024-01-04T22:33:28","name":"[5/4] libbacktrace: improve getting debug information for loaded dlls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8ae8f6f-97c3-4c93-b253-db8d653b560e@hazardy.de/mbox/"},{"id":185175,"url":"https://patchwork.plctlab.org/api/1.2/patches/185175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105004732.1804-1-wangfeng@eswincomputing.com/","msgid":"<20240105004732.1804-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T00:47:32","name":"[committed] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105004732.1804-1-wangfeng@eswincomputing.com/mbox/"},{"id":185176,"url":"https://patchwork.plctlab.org/api/1.2/patches/185176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105005044.4712-1-wangfeng@eswincomputing.com/","msgid":"<20240105005044.4712-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T00:50:44","name":"[committed] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105005044.4712-1-wangfeng@eswincomputing.com/mbox/"},{"id":185186,"url":"https://patchwork.plctlab.org/api/1.2/patches/185186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105014325.1490280-1-lipeng.zhu@intel.com/","msgid":"<20240105014325.1490280-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2024-01-05T01:43:26","name":"[v2] libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105014325.1490280-1-lipeng.zhu@intel.com/mbox/"},{"id":185191,"url":"https://patchwork.plctlab.org/api/1.2/patches/185191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105015335.2892020-1-juzhe.zhong@rivai.ai/","msgid":"<20240105015335.2892020-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-05T01:53:35","name":"RISC-V: Teach liveness computation loop invariant shift amount[Dynamic LMUL]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105015335.2892020-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185207,"url":"https://patchwork.plctlab.org/api/1.2/patches/185207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-2-chenglulu@loongson.cn/","msgid":"<20240105034021.30177-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:40:20","name":"[v2,1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-2-chenglulu@loongson.cn/mbox/"},{"id":185206,"url":"https://patchwork.plctlab.org/api/1.2/patches/185206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-3-chenglulu@loongson.cn/","msgid":"<20240105034021.30177-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:40:21","name":"[v2,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-3-chenglulu@loongson.cn/mbox/"},{"id":185210,"url":"https://patchwork.plctlab.org/api/1.2/patches/185210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-2-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:23","name":"[v2,1/7] LoongArch: testsuite:Added support for vector object detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-2-chenxiaolong@loongson.cn/mbox/"},{"id":185208,"url":"https://patchwork.plctlab.org/api/1.2/patches/185208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-3-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:24","name":"[v2,2/7] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-3-chenxiaolong@loongson.cn/mbox/"},{"id":185211,"url":"https://patchwork.plctlab.org/api/1.2/patches/185211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-4-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:25","name":"[v2,3/7] LoongArch: testsuite:Added detection support for LoongArch architecture in vect-{82, 83}.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-4-chenxiaolong@loongson.cn/mbox/"},{"id":185212,"url":"https://patchwork.plctlab.org/api/1.2/patches/185212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-5-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:26","name":"[v2,4/7] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-5-chenxiaolong@loongson.cn/mbox/"},{"id":185213,"url":"https://patchwork.plctlab.org/api/1.2/patches/185213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-6-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:27","name":"[v2,5/7] LoongArch: testsuite:Delete the default run behavior in pr60510.f.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-6-chenxiaolong@loongson.cn/mbox/"},{"id":185214,"url":"https://patchwork.plctlab.org/api/1.2/patches/185214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-7-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:28","name":"[v2,6/7] LoongArch: testsuite:Added additional vectorization \"-mlasx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-7-chenxiaolong@loongson.cn/mbox/"},{"id":185209,"url":"https://patchwork.plctlab.org/api/1.2/patches/185209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-8-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:29","name":"[v2,7/7] LoongArch: testsuite:Give up the detection of the gcc.dg/fma-{3, 4, 6, 7}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-8-chenxiaolong@loongson.cn/mbox/"},{"id":185216,"url":"https://patchwork.plctlab.org/api/1.2/patches/185216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105040711.2146204-1-juzhe.zhong@rivai.ai/","msgid":"<20240105040711.2146204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-05T04:07:11","name":"RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105040711.2146204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185219,"url":"https://patchwork.plctlab.org/api/1.2/patches/185219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105050300.3455412-1-admin@levyhsu.com/","msgid":"<20240105050300.3455412-1-admin@levyhsu.com>","list_archive_url":null,"date":"2024-01-05T05:03:00","name":"[x86_64] PR target/107563: Add 3-instruction subroutine vector shift in ix86_expand_vec_perm_const_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105050300.3455412-1-admin@levyhsu.com/mbox/"},{"id":185228,"url":"https://patchwork.plctlab.org/api/1.2/patches/185228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105060522.26253-1-chenxiaolong@loongson.cn/","msgid":"<20240105060522.26253-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:05:22","name":"[v3] LoongArch: testsuite:Added support for vector object detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105060522.26253-1-chenxiaolong@loongson.cn/mbox/"},{"id":185239,"url":"https://patchwork.plctlab.org/api/1.2/patches/185239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-2-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:32","name":"[1/4] LoongArch: Handle ISA evolution switches along with other options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-2-yangyujie@loongson.cn/mbox/"},{"id":185238,"url":"https://patchwork.plctlab.org/api/1.2/patches/185238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-3-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:33","name":"[2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-3-yangyujie@loongson.cn/mbox/"},{"id":185242,"url":"https://patchwork.plctlab.org/api/1.2/patches/185242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-4-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:34","name":"[3/4] LoongArch: Use enums for constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-4-yangyujie@loongson.cn/mbox/"},{"id":185241,"url":"https://patchwork.plctlab.org/api/1.2/patches/185241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-5-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:35","name":"[4/4] LoongArch: Simplify -mexplicit-reloc definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-5-yangyujie@loongson.cn/mbox/"},{"id":185247,"url":"https://patchwork.plctlab.org/api/1.2/patches/185247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-1-cederman@gaisler.com/","msgid":"<20240105071913.593978-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:10","name":"sparc: Char arrays are 64-bit aligned on SPARC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-1-cederman@gaisler.com/mbox/"},{"id":185248,"url":"https://patchwork.plctlab.org/api/1.2/patches/185248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-2-cederman@gaisler.com/","msgid":"<20240105071913.593978-2-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:11","name":"[1/2] sparc: Revert membar optimization that is not suitable for LEON5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-2-cederman@gaisler.com/mbox/"},{"id":185249,"url":"https://patchwork.plctlab.org/api/1.2/patches/185249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-3-cederman@gaisler.com/","msgid":"<20240105071913.593978-3-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:12","name":"sparc: Treat instructions with length 0 as empty","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-3-cederman@gaisler.com/mbox/"},{"id":185250,"url":"https://patchwork.plctlab.org/api/1.2/patches/185250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-4-cederman@gaisler.com/","msgid":"<20240105071913.593978-4-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:13","name":"[2/2] sparc: Add errata workaround to membar patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-4-cederman@gaisler.com/mbox/"},{"id":185251,"url":"https://patchwork.plctlab.org/api/1.2/patches/185251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073713.1799828-1-xujiahao@loongson.cn/","msgid":"<20240105073713.1799828-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:37:13","name":"LoongArch: Improve lasx_xvpermi_q_ insn pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073713.1799828-1-xujiahao@loongson.cn/mbox/"},{"id":185252,"url":"https://patchwork.plctlab.org/api/1.2/patches/185252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073744.1800307-1-xujiahao@loongson.cn/","msgid":"<20240105073744.1800307-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:37:44","name":"LoongArch: Optimize zero_extendqisi2 and zero_extendqidi2 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073744.1800307-1-xujiahao@loongson.cn/mbox/"},{"id":185253,"url":"https://patchwork.plctlab.org/api/1.2/patches/185253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073825.1806927-1-xujiahao@loongson.cn/","msgid":"<20240105073825.1806927-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:38:25","name":"LoongArch: Implenment vec_init where N is a LSX vector mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073825.1806927-1-xujiahao@loongson.cn/mbox/"},{"id":185254,"url":"https://patchwork.plctlab.org/api/1.2/patches/185254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074330.2309587-1-quic_apinski@quicinc.com/","msgid":"<20240105074330.2309587-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-05T07:43:30","name":"[PATCHv2] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074330.2309587-1-quic_apinski@quicinc.com/mbox/"},{"id":185256,"url":"https://patchwork.plctlab.org/api/1.2/patches/185256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-2-chenglulu@loongson.cn/","msgid":"<20240105074412.14096-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:44:11","name":"[v3,1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-2-chenglulu@loongson.cn/mbox/"},{"id":185255,"url":"https://patchwork.plctlab.org/api/1.2/patches/185255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-3-chenglulu@loongson.cn/","msgid":"<20240105074412.14096-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:44:12","name":"[v3,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-3-chenglulu@loongson.cn/mbox/"},{"id":185285,"url":"https://patchwork.plctlab.org/api/1.2/patches/185285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083908.349586-1-kito.cheng@sifive.com/","msgid":"<20240105083908.349586-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-05T08:39:08","name":"[committed] RISC-V: Clean up testsuite for multi-lib testing [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083908.349586-1-kito.cheng@sifive.com/mbox/"},{"id":185286,"url":"https://patchwork.plctlab.org/api/1.2/patches/185286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083923.349630-1-kito.cheng@sifive.com/","msgid":"<20240105083923.349630-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-05T08:39:23","name":"[committed] RISC-V: Clean up unused variable [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083923.349630-1-kito.cheng@sifive.com/mbox/"},{"id":185296,"url":"https://patchwork.plctlab.org/api/1.2/patches/185296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105085152.18530-1-wangfeng@eswincomputing.com/","msgid":"<20240105085152.18530-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T08:51:52","name":"[v7,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105085152.18530-1-wangfeng@eswincomputing.com/mbox/"},{"id":185316,"url":"https://patchwork.plctlab.org/api/1.2/patches/185316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105092344.23778-1-wangfeng@eswincomputing.com/","msgid":"<20240105092344.23778-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T09:23:44","name":"RISC-V: Fix avl-type operand index error for ZVBC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105092344.23778-1-wangfeng@eswincomputing.com/mbox/"},{"id":185355,"url":"https://patchwork.plctlab.org/api/1.2/patches/185355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102432.3180887-1-jwakely@redhat.com/","msgid":"<20240105102432.3180887-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:23:48","name":"[committed] libstdc++: Use if-constexpr in std::__try_use_facet [PR113099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102432.3180887-1-jwakely@redhat.com/mbox/"},{"id":185359,"url":"https://patchwork.plctlab.org/api/1.2/patches/185359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102514.3180917-1-jwakely@redhat.com/","msgid":"<20240105102514.3180917-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:24:33","name":"[committed] libstdc++: Remove UB from month and weekday additions and subtractions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102514.3180917-1-jwakely@redhat.com/mbox/"},{"id":185374,"url":"https://patchwork.plctlab.org/api/1.2/patches/185374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102537.3180942-1-jwakely@redhat.com/","msgid":"<20240105102537.3180942-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:25:15","name":"[committed] libstdc++: Fix std::char_traits::move [PR113200]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102537.3180942-1-jwakely@redhat.com/mbox/"},{"id":185390,"url":"https://patchwork.plctlab.org/api/1.2/patches/185390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105124815.2739660-1-yangyujie@loongson.cn/","msgid":"<20240105124815.2739660-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T12:48:15","name":"LoongArch: Implement option save/restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105124815.2739660-1-yangyujie@loongson.cn/mbox/"},{"id":185434,"url":"https://patchwork.plctlab.org/api/1.2/patches/185434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105142815.3250409-1-jwakely@redhat.com/","msgid":"<20240105142815.3250409-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:27:41","name":"[committed] libstdc++: Do not use __is_convertible unconditionally [PR113241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105142815.3250409-1-jwakely@redhat.com/mbox/"},{"id":185450,"url":"https://patchwork.plctlab.org/api/1.2/patches/185450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144120.3257340-1-jwakely@redhat.com/","msgid":"<20240105144120.3257340-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:36:32","name":"libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144120.3257340-1-jwakely@redhat.com/mbox/"},{"id":185445,"url":"https://patchwork.plctlab.org/api/1.2/patches/185445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144324.3257646-1-jwakely@redhat.com/","msgid":"<20240105144324.3257646-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:42:56","name":"[committed] libstdc++: Avoid overflow when appending to std::filesystem::path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144324.3257646-1-jwakely@redhat.com/mbox/"},{"id":185455,"url":"https://patchwork.plctlab.org/api/1.2/patches/185455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0iv4uh5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-05T16:26:30","name":"[pushed] aarch64: Extend VECT_COMPARE_COSTS to !SVE [PR113104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0iv4uh5.fsf@arm.com/mbox/"},{"id":185457,"url":"https://patchwork.plctlab.org/api/1.2/patches/185457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9z4u9z.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-05T16:30:48","name":"aarch64: Rework uxtl->zip optimisation [PR113196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9z4u9z.fsf@arm.com/mbox/"},{"id":185467,"url":"https://patchwork.plctlab.org/api/1.2/patches/185467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105165056.571235-1-ppalka@redhat.com/","msgid":"<20240105165056.571235-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-05T16:50:56","name":"c++: address of NTTP object as targ [PR113242]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105165056.571235-1-ppalka@redhat.com/mbox/"},{"id":185470,"url":"https://patchwork.plctlab.org/api/1.2/patches/185470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com/","msgid":"<0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com>","list_archive_url":null,"date":"2024-01-05T17:09:15","name":"libgccjit: Add support for setting the comment ident","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com/mbox/"},{"id":185476,"url":"https://patchwork.plctlab.org/api/1.2/patches/185476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105175224.3012-3-andre.simoesdiasvieira@arm.com/","msgid":"<20240105175224.3012-3-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2024-01-05T17:52:24","name":"[v2,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105175224.3012-3-andre.simoesdiasvieira@arm.com/mbox/"},{"id":185516,"url":"https://patchwork.plctlab.org/api/1.2/patches/185516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com/","msgid":"<0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com>","list_archive_url":null,"date":"2024-01-05T18:55:56","name":"omp_target_is_accessible (was: [patch] libgomp.texi: Document omp_display_env)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com/mbox/"},{"id":185532,"url":"https://patchwork.plctlab.org/api/1.2/patches/185532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105200116.1382389-1-ppalka@redhat.com/","msgid":"<20240105200116.1382389-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-05T20:01:16","name":"c++: reference variable as default targ [PR101463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105200116.1382389-1-ppalka@redhat.com/mbox/"},{"id":185554,"url":"https://patchwork.plctlab.org/api/1.2/patches/185554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-49bdfa50-9653-4b2e-837d-7e0f676da71f-1704490707716@3c-app-gmx-bs15/","msgid":"","list_archive_url":null,"date":"2024-01-05T21:38:27","name":"Fortran: bogus warnings with REPEAT intrinsic and -Wconversion-extra [PR96724]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-49bdfa50-9653-4b2e-837d-7e0f676da71f-1704490707716@3c-app-gmx-bs15/mbox/"},{"id":185551,"url":"https://patchwork.plctlab.org/api/1.2/patches/185551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiAHl_TMOICKNPx@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T22:18:06","name":"PR target/112886, Add %S to print_operand for vector pair support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiAHl_TMOICKNPx@cowardly-lion.the-meissners.org/mbox/"},{"id":185564,"url":"https://patchwork.plctlab.org/api/1.2/patches/185564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSSeBqMdd64W7V@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:35:37","name":"Repost [PATCH 1/6] Add -mcpu=future","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSSeBqMdd64W7V@cowardly-lion.the-meissners.org/mbox/"},{"id":185565,"url":"https://patchwork.plctlab.org/api/1.2/patches/185565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSrcdY46vL40E4@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:37:17","name":"Repost [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSrcdY46vL40E4@cowardly-lion.the-meissners.org/mbox/"},{"id":185566,"url":"https://patchwork.plctlab.org/api/1.2/patches/185566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiS7-05Y1n48bjk@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:38:23","name":"Repost [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiS7-05Y1n48bjk@cowardly-lion.the-meissners.org/mbox/"},{"id":185567,"url":"https://patchwork.plctlab.org/api/1.2/patches/185567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTS0adUUPx7wjY@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:39:55","name":"Repost [PATCH 4/6] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTS0adUUPx7wjY@cowardly-lion.the-meissners.org/mbox/"},{"id":185568,"url":"https://patchwork.plctlab.org/api/1.2/patches/185568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTiojbYNzVvJEV@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:40:58","name":"Repost [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTiojbYNzVvJEV@cowardly-lion.the-meissners.org/mbox/"},{"id":185569,"url":"https://patchwork.plctlab.org/api/1.2/patches/185569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTyrsBFO92FG84@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:42:02","name":"Repost [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTyrsBFO92FG84@cowardly-lion.the-meissners.org/mbox/"},{"id":185572,"url":"https://patchwork.plctlab.org/api/1.2/patches/185572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106003223.910964-1-mark@klomp.org/","msgid":"<20240106003223.910964-1-mark@klomp.org>","list_archive_url":null,"date":"2024-01-06T00:32:23","name":"[COMMITTED] Regenerate libgomp/configure for copyright year update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106003223.910964-1-mark@klomp.org/mbox/"},{"id":185575,"url":"https://patchwork.plctlab.org/api/1.2/patches/185575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106020855.1556409-1-juzhe.zhong@rivai.ai/","msgid":"<20240106020855.1556409-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T02:08:55","name":"[Committed,V2] RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106020855.1556409-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185576,"url":"https://patchwork.plctlab.org/api/1.2/patches/185576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106022921.1714868-1-juzhe.zhong@rivai.ai/","msgid":"<20240106022921.1714868-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T02:29:21","name":"[Committed,V2] RISC-V: Teach liveness computation loop invariant shift amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106022921.1714868-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185588,"url":"https://patchwork.plctlab.org/api/1.2/patches/185588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-2-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:35","name":"[v3,1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-2-kmatsui@gcc.gnu.org/mbox/"},{"id":185582,"url":"https://patchwork.plctlab.org/api/1.2/patches/185582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-3-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:36","name":"[v3,2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-3-kmatsui@gcc.gnu.org/mbox/"},{"id":185583,"url":"https://patchwork.plctlab.org/api/1.2/patches/185583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-4-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:37","name":"[v3,3/8] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-4-kmatsui@gcc.gnu.org/mbox/"},{"id":185584,"url":"https://patchwork.plctlab.org/api/1.2/patches/185584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-5-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:38","name":"[v3,4/8] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-5-kmatsui@gcc.gnu.org/mbox/"},{"id":185586,"url":"https://patchwork.plctlab.org/api/1.2/patches/185586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-6-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:39","name":"[v3,5/8] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-6-kmatsui@gcc.gnu.org/mbox/"},{"id":185587,"url":"https://patchwork.plctlab.org/api/1.2/patches/185587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-7-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:40","name":"[v3,6/8] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-7-kmatsui@gcc.gnu.org/mbox/"},{"id":185585,"url":"https://patchwork.plctlab.org/api/1.2/patches/185585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-8-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:41","name":"[v3,7/8] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-8-kmatsui@gcc.gnu.org/mbox/"},{"id":185589,"url":"https://patchwork.plctlab.org/api/1.2/patches/185589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-9-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:42","name":"[v3,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-9-kmatsui@gcc.gnu.org/mbox/"},{"id":185590,"url":"https://patchwork.plctlab.org/api/1.2/patches/185590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106051038.213211-1-juzhe.zhong@rivai.ai/","msgid":"<20240106051038.213211-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T05:10:38","name":"[Committed] RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106051038.213211-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185618,"url":"https://patchwork.plctlab.org/api/1.2/patches/185618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkSSMmtFTYYKjAE@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-06T08:41:44","name":"gimplify: Fix ICE in recalculate_side_effects [PR113228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkSSMmtFTYYKjAE@tucnak/mbox/"},{"id":185621,"url":"https://patchwork.plctlab.org/api/1.2/patches/185621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-1-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:07","name":"[1/3] LoongArch: Optimized some of the symbolic expansion instructions generated during bitwise operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-1-chenglulu@loongson.cn/mbox/"},{"id":185620,"url":"https://patchwork.plctlab.org/api/1.2/patches/185620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-2-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:08","name":"[2/3] LoongArch: Redundant sign extension elimination optimization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-2-chenglulu@loongson.cn/mbox/"},{"id":185622,"url":"https://patchwork.plctlab.org/api/1.2/patches/185622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-3-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:09","name":"[3/3] LoongArch: Redundant sign extension elimination optimization 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-3-chenglulu@loongson.cn/mbox/"},{"id":185623,"url":"https://patchwork.plctlab.org/api/1.2/patches/185623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkWh7Sz1/ugsVjU@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-06T08:59:51","name":"vect: Fix ICE in vect_analyze_loop_costing [PR113210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkWh7Sz1/ugsVjU@tucnak/mbox/"},{"id":185634,"url":"https://patchwork.plctlab.org/api/1.2/patches/185634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com/","msgid":"<03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-06T13:30:34","name":"[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com/mbox/"},{"id":185657,"url":"https://patchwork.plctlab.org/api/1.2/patches/185657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106151802.3356059-1-jwakely@redhat.com/","msgid":"<20240106151802.3356059-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-06T15:17:49","name":"[v2] libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106151802.3356059-1-jwakely@redhat.com/mbox/"},{"id":185663,"url":"https://patchwork.plctlab.org/api/1.2/patches/185663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLh4RyAki7FV8vVLJDZydqT3hcaLKyMFjt4qvkEmWQiLg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-06T17:26:16","name":"[Patch, fortran PR89645/99065 No IMPLICIT type error with: ASSOCIATE( X => function() )","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLh4RyAki7FV8vVLJDZydqT3hcaLKyMFjt4qvkEmWQiLg@mail.gmail.com/mbox/"},{"id":185669,"url":"https://patchwork.plctlab.org/api/1.2/patches/185669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de/","msgid":"<74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de>","list_archive_url":null,"date":"2024-01-06T18:36:05","name":"[testsuite,applied] PR52641: Fix more sloppy tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de/mbox/"},{"id":185670,"url":"https://patchwork.plctlab.org/api/1.2/patches/185670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-2-sandra@codesourcery.com/","msgid":"<20240106185257.126445-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:49","name":"[1/8] OpenMP: metadirective tree data structures and front-end interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-2-sandra@codesourcery.com/mbox/"},{"id":185671,"url":"https://patchwork.plctlab.org/api/1.2/patches/185671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-3-sandra@codesourcery.com/","msgid":"<20240106185257.126445-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:50","name":"[2/8] OpenMP: middle-end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-3-sandra@codesourcery.com/mbox/"},{"id":185672,"url":"https://patchwork.plctlab.org/api/1.2/patches/185672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-4-sandra@codesourcery.com/","msgid":"<20240106185257.126445-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:51","name":"[3/8] libgomp: runtime support for target_device selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-4-sandra@codesourcery.com/mbox/"},{"id":185673,"url":"https://patchwork.plctlab.org/api/1.2/patches/185673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-5-sandra@codesourcery.com/","msgid":"<20240106185257.126445-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:52","name":"[4/8] OpenMP: C front end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-5-sandra@codesourcery.com/mbox/"},{"id":185674,"url":"https://patchwork.plctlab.org/api/1.2/patches/185674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-6-sandra@codesourcery.com/","msgid":"<20240106185257.126445-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:53","name":"[5/8] OpenMP: C++ front-end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-6-sandra@codesourcery.com/mbox/"},{"id":185677,"url":"https://patchwork.plctlab.org/api/1.2/patches/185677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-7-sandra@codesourcery.com/","msgid":"<20240106185257.126445-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:54","name":"[6/8] OpenMP: common c/c++ testcases for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-7-sandra@codesourcery.com/mbox/"},{"id":185675,"url":"https://patchwork.plctlab.org/api/1.2/patches/185675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-8-sandra@codesourcery.com/","msgid":"<20240106185257.126445-8-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:55","name":"[7/8] OpenMP: Fortran front-end support for metadirectives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-8-sandra@codesourcery.com/mbox/"},{"id":185676,"url":"https://patchwork.plctlab.org/api/1.2/patches/185676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-9-sandra@codesourcery.com/","msgid":"<20240106185257.126445-9-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:56","name":"[8/8] OpenMP: Update documentation of metadirective implementation status.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-9-sandra@codesourcery.com/mbox/"},{"id":185685,"url":"https://patchwork.plctlab.org/api/1.2/patches/185685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f09b2f16-ea11-45d9-b74c-a983be908e91@net-b.de/","msgid":"","list_archive_url":null,"date":"2024-01-06T21:20:48","name":"gcn.h: Add builtin_define (\"__gfx1030\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f09b2f16-ea11-45d9-b74c-a983be908e91@net-b.de/mbox/"},{"id":185696,"url":"https://patchwork.plctlab.org/api/1.2/patches/185696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/qFJs-vqcMVgr5VFvNrULQ3BL2GM2v_qgabqCA6KH3aDONEBK2La5VDARf_AJplVr5hafQ2T7SO6eQLh3omCRDfONNa2_p_mcsZWmPmM0Ajc=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-07T00:00:10","name":"[v8,1/4] c++: P0847R7 (deducing this) - prerequisite changes. [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/qFJs-vqcMVgr5VFvNrULQ3BL2GM2v_qgabqCA6KH3aDONEBK2La5VDARf_AJplVr5hafQ2T7SO6eQLh3omCRDfONNa2_p_mcsZWmPmM0Ajc=@protonmail.com/mbox/"},{"id":185697,"url":"https://patchwork.plctlab.org/api/1.2/patches/185697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/O5vVsH8QiXR-oPGrQJkZJA5M1iFbHewAJ3RfeDGvo-sXwz2qRjs7QyevmuzV792p3A8S8wQsubjri-Sy1DJtePA7NuEJhA_15EWsOrqd0Dg=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-07T00:03:19","name":"[v8,3/4] c++: P0847R7 (deducing this) - diagnostics. [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/O5vVsH8QiXR-oPGrQJkZJA5M1iFbHewAJ3RfeDGvo-sXwz2qRjs7QyevmuzV792p3A8S8wQsubjri-Sy1DJtePA7NuEJhA_15EWsOrqd0Dg=@protonmail.com/mbox/"},{"id":185702,"url":"https://patchwork.plctlab.org/api/1.2/patches/185702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107003654.1629705-1-juzhe.zhong@rivai.ai/","msgid":"<20240107003654.1629705-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-07T00:36:54","name":"[Committed] RISC-V: Use MAX instead of std::max [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107003654.1629705-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185707,"url":"https://patchwork.plctlab.org/api/1.2/patches/185707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010049.3402703-1-jwakely@redhat.com/","msgid":"<20240107010049.3402703-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-07T01:00:27","name":"[committed] libstdc++: Remove dg-timeout-factor from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010049.3402703-1-jwakely@redhat.com/mbox/"},{"id":185704,"url":"https://patchwork.plctlab.org/api/1.2/patches/185704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010056.3402724-1-jwakely@redhat.com/","msgid":"<20240107010056.3402724-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-07T01:00:51","name":"[committed] libstdc++: Avoid conflicting declaration in eh_call.cc [PR112997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010056.3402724-1-jwakely@redhat.com/mbox/"},{"id":185725,"url":"https://patchwork.plctlab.org/api/1.2/patches/185725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc7da78e-c215-4129-94ce-442277596802@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T12:14:10","name":"[testsuite,applied] PR52641: Fix more fallout from sloppy tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc7da78e-c215-4129-94ce-442277596802@gjlay.de/mbox/"},{"id":185736,"url":"https://patchwork.plctlab.org/api/1.2/patches/185736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com/","msgid":"<9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com>","list_archive_url":null,"date":"2024-01-07T12:56:48","name":"Add __cow_string C string constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com/mbox/"},{"id":185742,"url":"https://patchwork.plctlab.org/api/1.2/patches/185742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5db37f0-9e5e-471a-9ac3-16176d215e33@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T15:53:04","name":"[testsuite,applied] PR52641 Fix more fallout from sloppy tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5db37f0-9e5e-471a-9ac3-16176d215e33@gjlay.de/mbox/"},{"id":185747,"url":"https://patchwork.plctlab.org/api/1.2/patches/185747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com/","msgid":"<51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com>","list_archive_url":null,"date":"2024-01-07T16:55:01","name":"[committed] Fix typo in last change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com/mbox/"},{"id":185757,"url":"https://patchwork.plctlab.org/api/1.2/patches/185757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b53b0b78-c963-4d4f-83c5-2aa6071f5163@net-b.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T19:20:19","name":"GCN: Add pre-initial support for gfx1100","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b53b0b78-c963-4d4f-83c5-2aa6071f5163@net-b.de/mbox/"},{"id":185760,"url":"https://patchwork.plctlab.org/api/1.2/patches/185760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de/","msgid":"<2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de>","list_archive_url":null,"date":"2024-01-07T20:12:01","name":"[avr,applied] Fix some avr test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de/mbox/"},{"id":185761,"url":"https://patchwork.plctlab.org/api/1.2/patches/185761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107203259.1705373-1-ppalka@redhat.com/","msgid":"<20240107203259.1705373-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-07T20:32:59","name":"libstdc++: reduce std::variant template instantiation depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107203259.1705373-1-ppalka@redhat.com/mbox/"},{"id":185771,"url":"https://patchwork.plctlab.org/api/1.2/patches/185771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401072322250.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-08T00:06:20","name":"RISC-V: Also handle sign extension in branch costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401072322250.5892@tpp.orcam.me.uk/mbox/"},{"id":185776,"url":"https://patchwork.plctlab.org/api/1.2/patches/185776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108005831.35467-1-wangfeng@eswincomputing.com/","msgid":"<20240108005831.35467-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T00:58:31","name":"[committed] RISC-V: Fix avl-type operand index error for ZVBC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108005831.35467-1-wangfeng@eswincomputing.com/mbox/"},{"id":185777,"url":"https://patchwork.plctlab.org/api/1.2/patches/185777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT3=TCsF2GcsawmbOReDjwVPmxpSLw1_CTZX5NE6HUtu+g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T01:01:48","name":"libstdc++: atomic: Add missing clear_padding in __atomic_float constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT3=TCsF2GcsawmbOReDjwVPmxpSLw1_CTZX5NE6HUtu+g@mail.gmail.com/mbox/"},{"id":185782,"url":"https://patchwork.plctlab.org/api/1.2/patches/185782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-2-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:07","name":"[v2,1/4] LoongArch: Handle ISA evolution switches along with other options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-2-yangyujie@loongson.cn/mbox/"},{"id":185783,"url":"https://patchwork.plctlab.org/api/1.2/patches/185783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-3-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:08","name":"[v2,2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-3-yangyujie@loongson.cn/mbox/"},{"id":185779,"url":"https://patchwork.plctlab.org/api/1.2/patches/185779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-4-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:09","name":"[v2,3/4] LoongArch: Use enums for constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-4-yangyujie@loongson.cn/mbox/"},{"id":185780,"url":"https://patchwork.plctlab.org/api/1.2/patches/185780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-5-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:10","name":"[v2,4/4] LoongArch: Simplify -mexplicit-reloc definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-5-yangyujie@loongson.cn/mbox/"},{"id":185791,"url":"https://patchwork.plctlab.org/api/1.2/patches/185791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011621.3670359-1-jwakely@redhat.com/","msgid":"<20240108011621.3670359-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:15:50","name":"[committed] libstdc++: Implement P2909R4 (\"Dude, where'\''s my char?\") for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011621.3670359-1-jwakely@redhat.com/mbox/"},{"id":185797,"url":"https://patchwork.plctlab.org/api/1.2/patches/185797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011829.3670492-1-jwakely@redhat.com/","msgid":"<20240108011829.3670492-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:17:14","name":"[committed,V3] libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011829.3670492-1-jwakely@redhat.com/mbox/"},{"id":185796,"url":"https://patchwork.plctlab.org/api/1.2/patches/185796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-1-jwakely@redhat.com/","msgid":"<20240108011930.3670651-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:19:01","name":"[committed,1/2] libstdc++: Implement P2905R2 \"Runtime format strings\" for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-1-jwakely@redhat.com/mbox/"},{"id":185778,"url":"https://patchwork.plctlab.org/api/1.2/patches/185778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-2-jwakely@redhat.com/","msgid":"<20240108011930.3670651-2-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:19:02","name":"[committed,2/2] libstdc++: Implement P2918R0 \"Runtime format strings II\" for C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-2-jwakely@redhat.com/mbox/"},{"id":185792,"url":"https://patchwork.plctlab.org/api/1.2/patches/185792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com/","msgid":"<91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com>","list_archive_url":null,"date":"2024-01-08T02:35:07","name":"strub: Only unbias stack point for SPARC_STACK_BOUNDARY_HACK [PR113100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com/mbox/"},{"id":185793,"url":"https://patchwork.plctlab.org/api/1.2/patches/185793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d768bc05-07db-9bd3-eade-f264e81ae952@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:23","name":"testsuite, rs6000: Adjust pcrel-sibcall-1.c with noipa [PR112751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d768bc05-07db-9bd3-eade-f264e81ae952@linux.ibm.com/mbox/"},{"id":185794,"url":"https://patchwork.plctlab.org/api/1.2/patches/185794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de211e8d-761f-8b37-745e-138ed9284013@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:46","name":"rs6000: Eliminate zext fed by vclzlsbb [PR111480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de211e8d-761f-8b37-745e-138ed9284013@linux.ibm.com/mbox/"},{"id":185795,"url":"https://patchwork.plctlab.org/api/1.2/patches/185795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4bc12b8-2d66-3227-6101-bbb0bcb1e3b1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:52","name":"rs6000: Make copysign (x, -1) back to -abs (x) for IEEE128 float [PR112606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4bc12b8-2d66-3227-6101-bbb0bcb1e3b1@linux.ibm.com/mbox/"},{"id":185798,"url":"https://patchwork.plctlab.org/api/1.2/patches/185798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108030830.1303730-1-hongyu.wang@intel.com/","msgid":"<20240108030830.1303730-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-08T03:08:30","name":"i386: [APX] Add missing document for APX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108030830.1303730-1-hongyu.wang@intel.com/mbox/"},{"id":185813,"url":"https://patchwork.plctlab.org/api/1.2/patches/185813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108061126.792885-1-kito.cheng@sifive.com/","msgid":"<20240108061126.792885-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T06:11:26","name":"[committed] RISC-V: Fix testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108061126.792885-1-kito.cheng@sifive.com/mbox/"},{"id":185814,"url":"https://patchwork.plctlab.org/api/1.2/patches/185814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com/","msgid":"<05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com>","list_archive_url":null,"date":"2024-01-08T06:15:54","name":"[1/2] arm: Add cortex-m52 core","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com/mbox/"},{"id":185816,"url":"https://patchwork.plctlab.org/api/1.2/patches/185816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com/","msgid":"<0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com>","list_archive_url":null,"date":"2024-01-08T06:16:37","name":"[2/2] arm: Add cortex-m52 doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com/mbox/"},{"id":185839,"url":"https://patchwork.plctlab.org/api/1.2/patches/185839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108082029.751159-1-cederman@gaisler.com/","msgid":"<20240108082029.751159-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-08T08:20:29","name":"testsuite: Skip ifcvt-4.c for SPARC V8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108082029.751159-1-cederman@gaisler.com/mbox/"},{"id":185843,"url":"https://patchwork.plctlab.org/api/1.2/patches/185843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108084049.2591110-1-haochen.jiang@intel.com/","msgid":"<20240108084049.2591110-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-08T08:40:49","name":"i386: Fix recent testcase fail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108084049.2591110-1-haochen.jiang@intel.com/mbox/"},{"id":185862,"url":"https://patchwork.plctlab.org/api/1.2/patches/185862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-1-wangfeng@eswincomputing.com/","msgid":"<20240108091201.8087-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T09:12:00","name":"[v8,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-1-wangfeng@eswincomputing.com/mbox/"},{"id":185863,"url":"https://patchwork.plctlab.org/api/1.2/patches/185863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-2-wangfeng@eswincomputing.com/","msgid":"<20240108091201.8087-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T09:12:01","name":"[v7,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-2-wangfeng@eswincomputing.com/mbox/"},{"id":185871,"url":"https://patchwork.plctlab.org/api/1.2/patches/185871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108092434.554918-1-iii@linux.ibm.com/","msgid":"<20240108092434.554918-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-08T09:22:57","name":"asan: Do not call asan_function_start () without the current function [PR113251]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108092434.554918-1-iii@linux.ibm.com/mbox/"},{"id":185878,"url":"https://patchwork.plctlab.org/api/1.2/patches/185878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108095641.D66D8385842A@sourceware.org/","msgid":"<20240108095641.D66D8385842A@sourceware.org>","list_archive_url":null,"date":"2024-01-08T09:50:44","name":"Clarify -mmovbe documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108095641.D66D8385842A@sourceware.org/mbox/"},{"id":185879,"url":"https://patchwork.plctlab.org/api/1.2/patches/185879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659bc714.170a0220.c04dd.cc6a@mx.google.com/","msgid":"<659bc714.170a0220.c04dd.cc6a@mx.google.com>","list_archive_url":null,"date":"2024-01-08T09:57:35","name":"[v2] c++/modules: Differentiate extern templates and TYPE_DECL_SUPPRESS_DEBUG [PR112820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659bc714.170a0220.c04dd.cc6a@mx.google.com/mbox/"},{"id":185886,"url":"https://patchwork.plctlab.org/api/1.2/patches/185886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com/","msgid":"<49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com>","list_archive_url":null,"date":"2024-01-08T10:01:23","name":"[committed] amdgcn: Don'\''t double-count AVGPRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com/mbox/"},{"id":185887,"url":"https://patchwork.plctlab.org/api/1.2/patches/185887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbb77a85-a528-4ba0-bf50-8515bca5e4a7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T10:03:48","name":"[committed] amdgcn: Match new XNACK defaults in mkoffload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbb77a85-a528-4ba0-bf50-8515bca5e4a7@codesourcery.com/mbox/"},{"id":185907,"url":"https://patchwork.plctlab.org/api/1.2/patches/185907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108105552.714778-1-cupertino.miranda@oracle.com/","msgid":"<20240108105552.714778-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2024-01-08T10:55:52","name":"btf: print string position as comment for validation and testing purposes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108105552.714778-1-cupertino.miranda@oracle.com/mbox/"},{"id":185895,"url":"https://patchwork.plctlab.org/api/1.2/patches/185895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108110505.715284-1-cupertino.miranda@oracle.com/","msgid":"<20240108110505.715284-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2024-01-08T11:05:05","name":"bpf: Correct BTF for kernel_helper attributed decls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108110505.715284-1-cupertino.miranda@oracle.com/mbox/"},{"id":185917,"url":"https://patchwork.plctlab.org/api/1.2/patches/185917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108113513.554483858CDB@sourceware.org/","msgid":"<20240108113513.554483858CDB@sourceware.org>","list_archive_url":null,"date":"2024-01-08T11:29:24","name":"tree-optimization/113026 - avoid vector epilog in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108113513.554483858CDB@sourceware.org/mbox/"},{"id":185985,"url":"https://patchwork.plctlab.org/api/1.2/patches/185985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18133-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T12:56:38","name":"[frontend] : don'\''t ice with pragma NOVECTOR if loop in C has no condition [PR113267]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18133-tamar@arm.com/mbox/"},{"id":185992,"url":"https://patchwork.plctlab.org/api/1.2/patches/185992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108131456.803003-2-mary.bennett@embecosm.com/","msgid":"<20240108131456.803003-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-08T13:14:56","name":"[v5,1/1] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108131456.803003-2-mary.bennett@embecosm.com/mbox/"},{"id":186006,"url":"https://patchwork.plctlab.org/api/1.2/patches/186006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-2-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:34","name":"[1/5] RISC-V: Extract part parsing base ISA logic into a standalone function [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-2-kito.cheng@sifive.com/mbox/"},{"id":186007,"url":"https://patchwork.plctlab.org/api/1.2/patches/186007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-3-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:35","name":"[2/5] RISC-V: Relax the -march string for accept any order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-3-kito.cheng@sifive.com/mbox/"},{"id":186008,"url":"https://patchwork.plctlab.org/api/1.2/patches/186008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-4-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:36","name":"[3/5] RISC-V: Remove unused function in riscv_subset_list [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-4-kito.cheng@sifive.com/mbox/"},{"id":186012,"url":"https://patchwork.plctlab.org/api/1.2/patches/186012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-5-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:37","name":"[4/5] RISC-V: Update testsuite due to -march string relaxation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-5-kito.cheng@sifive.com/mbox/"},{"id":186015,"url":"https://patchwork.plctlab.org/api/1.2/patches/186015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-6-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-6-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:38","name":"[5/5] RISC-V: Document the syntax of -march","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-6-kito.cheng@sifive.com/mbox/"},{"id":186065,"url":"https://patchwork.plctlab.org/api/1.2/patches/186065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com/","msgid":"<00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-08T16:07:29","name":"[libatomic] Fix testsuite regressions on ARM [raspberry pi].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com/mbox/"},{"id":186072,"url":"https://patchwork.plctlab.org/api/1.2/patches/186072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108161333.3785051-1-jwakely@redhat.com/","msgid":"<20240108161333.3785051-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T16:13:05","name":"[committed] libstdc++: Remove std::__unicode::__null_sentinel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108161333.3785051-1-jwakely@redhat.com/mbox/"},{"id":186101,"url":"https://patchwork.plctlab.org/api/1.2/patches/186101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108184010.2235409-1-ppalka@redhat.com/","msgid":"<20240108184010.2235409-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:40:10","name":"c++: non-dep array list-init w/ non-triv dtor [PR109899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108184010.2235409-1-ppalka@redhat.com/mbox/"},{"id":186106,"url":"https://patchwork.plctlab.org/api/1.2/patches/186106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com/","msgid":"<815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:53:21","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com/mbox/"},{"id":186110,"url":"https://patchwork.plctlab.org/api/1.2/patches/186110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com/","msgid":"<28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:59:38","name":"[committed] steering.html: Update my affiliation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com/mbox/"},{"id":186139,"url":"https://patchwork.plctlab.org/api/1.2/patches/186139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZxdVv8wUQ0dVY55@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T20:38:46","name":"[committed] hppa: Fix bind_c_coms.f90 and bind_c_vars.f90 tests on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZxdVv8wUQ0dVY55@mx3210.localdomain/mbox/"},{"id":186146,"url":"https://patchwork.plctlab.org/api/1.2/patches/186146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx2CtWx8EMNjxS0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T22:24:10","name":"[committed] Skip gfortran.dg/dec_math.f90 on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx2CtWx8EMNjxS0@mx3210.localdomain/mbox/"},{"id":186147,"url":"https://patchwork.plctlab.org/api/1.2/patches/186147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx4jvGxSRkS0vAw@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T22:34:54","name":"[committed] xfail dg-final \"Sunk statements: 5\" on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx4jvGxSRkS0vAw@mx3210.localdomain/mbox/"},{"id":186171,"url":"https://patchwork.plctlab.org/api/1.2/patches/186171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV3P223MB091644C520D34FF0A7166513D66B2@LV3P223MB0916.NAMP223.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2024-01-08T23:32:16","name":"Resolve issue with Canadian build for x86_64-w64-mingw32 multilibs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV3P223MB091644C520D34FF0A7166513D66B2@LV3P223MB0916.NAMP223.PROD.OUTLOOK.COM/mbox/"},{"id":186187,"url":"https://patchwork.plctlab.org/api/1.2/patches/186187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109012453.675353-1-juzhe.zhong@rivai.ai/","msgid":"<20240109012453.675353-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T01:24:53","name":"RISC-V: Fix loop invariant check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109012453.675353-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186188,"url":"https://patchwork.plctlab.org/api/1.2/patches/186188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090941460629701@eswincomputing.com/","msgid":"<202401090941460629701@eswincomputing.com>","list_archive_url":null,"date":"2024-01-09T01:41:46","name":"??????: Re: [PATCH v8 2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090941460629701@eswincomputing.com/mbox/"},{"id":186189,"url":"https://patchwork.plctlab.org/api/1.2/patches/186189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090942058650372@eswincomputing.com/","msgid":"<202401090942058650372@eswincomputing.com>","list_archive_url":null,"date":"2024-01-09T01:42:06","name":"??????: Re: [PATCH v7 1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090942058650372@eswincomputing.com/mbox/"},{"id":186190,"url":"https://patchwork.plctlab.org/api/1.2/patches/186190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021054.1095824-1-juzhe.zhong@rivai.ai/","msgid":"<20240109021054.1095824-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T02:10:54","name":"[Committed] RISC-V: Fix comments of segment load/store intrinsic[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021054.1095824-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186191,"url":"https://patchwork.plctlab.org/api/1.2/patches/186191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com/","msgid":"<2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T02:12:26","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186192,"url":"https://patchwork.plctlab.org/api/1.2/patches/186192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021340.1129665-1-juzhe.zhong@rivai.ai/","msgid":"<20240109021340.1129665-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T02:13:40","name":"[Committed] RISC-V: Fix comments of segment load/store intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021340.1129665-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186197,"url":"https://patchwork.plctlab.org/api/1.2/patches/186197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109031851.1026-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240109031851.1026-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T03:18:51","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109031851.1026-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186198,"url":"https://patchwork.plctlab.org/api/1.2/patches/186198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com/","msgid":"<8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T03:23:05","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186227,"url":"https://patchwork.plctlab.org/api/1.2/patches/186227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070211.325219-1-haochen.jiang@intel.com/","msgid":"<20240109070211.325219-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:02:11","name":"Add -mevex512 into invoke.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070211.325219-1-haochen.jiang@intel.com/mbox/"},{"id":186229,"url":"https://patchwork.plctlab.org/api/1.2/patches/186229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070702.413866-1-hongyu.wang@intel.com/","msgid":"<20240109070702.413866-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:07:02","name":"i386: [APX] Document inline asm behavior and new switch for APX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070702.413866-1-hongyu.wang@intel.com/mbox/"},{"id":186230,"url":"https://patchwork.plctlab.org/api/1.2/patches/186230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109071205.417812-1-hongyu.wang@intel.com/","msgid":"<20240109071205.417812-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:12:04","name":"[wwwdocs] gcc-14/changes: Update APX inline asm behavior for x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109071205.417812-1-hongyu.wang@intel.com/mbox/"},{"id":186249,"url":"https://patchwork.plctlab.org/api/1.2/patches/186249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSk8vgLAXGVJb_TZq+yJL1EEZ2B9x6yFnDDkruu5tTUUZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:20:02","name":"c++: side effect in nullptr_t conversion fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSk8vgLAXGVJb_TZq+yJL1EEZ2B9x6yFnDDkruu5tTUUZA@mail.gmail.com/mbox/"},{"id":186277,"url":"https://patchwork.plctlab.org/api/1.2/patches/186277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0HuOnrY+ZxfYQu@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:45:44","name":"vect: Ensure both NITERSM1 and NITERS are INTEGER_CSTs or neither of them [PR113210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0HuOnrY+ZxfYQu@tucnak/mbox/"},{"id":186283,"url":"https://patchwork.plctlab.org/api/1.2/patches/186283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0JQX+D1CeEH9aB@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:52:17","name":"c-family: copy attribute diagnostic fixes [PR113262]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0JQX+D1CeEH9aB@tucnak/mbox/"},{"id":186284,"url":"https://patchwork.plctlab.org/api/1.2/patches/186284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0LVCjnhnI4r5qs@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T09:01:08","name":"[committed] libgomp: Use absolute pathname to testsuite/flock [PR113192]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0LVCjnhnI4r5qs@tucnak/mbox/"},{"id":186297,"url":"https://patchwork.plctlab.org/api/1.2/patches/186297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3275505.44csPzL39Z@fomalhaut/","msgid":"<3275505.44csPzL39Z@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:16:22","name":"Fix PR rtl-optimization/113140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3275505.44csPzL39Z@fomalhaut/mbox/"},{"id":186298,"url":"https://patchwork.plctlab.org/api/1.2/patches/186298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3783379.kQq0lBPeGt@fomalhaut/","msgid":"<3783379.kQq0lBPeGt@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:23:44","name":"[Ada] Fix PR ada/113195","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3783379.kQq0lBPeGt@fomalhaut/mbox/"},{"id":186296,"url":"https://patchwork.plctlab.org/api/1.2/patches/186296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5902287.MhkbZ0Pkbq@fomalhaut/","msgid":"<5902287.MhkbZ0Pkbq@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:27:10","name":"Fix PR rtl-optimization/113140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5902287.MhkbZ0Pkbq@fomalhaut/mbox/"},{"id":186302,"url":"https://patchwork.plctlab.org/api/1.2/patches/186302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2177833.Mh6RI2rZIc@fomalhaut/","msgid":"<2177833.Mh6RI2rZIc@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:50:27","name":"[Ada] Fix PR ada/112781 (1/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2177833.Mh6RI2rZIc@fomalhaut/mbox/"},{"id":186307,"url":"https://patchwork.plctlab.org/api/1.2/patches/186307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2180612.Icojqenx9y@fomalhaut/","msgid":"<2180612.Icojqenx9y@fomalhaut>","list_archive_url":null,"date":"2024-01-09T10:07:46","name":"[Ada] Fix PR ada/112781 (2/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2180612.Icojqenx9y@fomalhaut/mbox/"},{"id":186311,"url":"https://patchwork.plctlab.org/api/1.2/patches/186311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109104648.675293-1-hongtao.liu@intel.com/","msgid":"<20240109104648.675293-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-09T10:46:48","name":"Optimize A < B ? A : B to MIN_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109104648.675293-1-hongtao.liu@intel.com/mbox/"},{"id":186317,"url":"https://patchwork.plctlab.org/api/1.2/patches/186317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109105253.332676-1-iii@linux.ibm.com/","msgid":"<20240109105253.332676-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-09T10:51:16","name":"rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109105253.332676-1-iii@linux.ibm.com/mbox/"},{"id":186323,"url":"https://patchwork.plctlab.org/api/1.2/patches/186323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccb585d7-8db8-4500-9a19-2c4e47f5bcfa@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T11:14:36","name":"rs6000: New pass for replacement of adjacent lxv with lxvp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccb585d7-8db8-4500-9a19-2c4e47f5bcfa@linux.ibm.com/mbox/"},{"id":186349,"url":"https://patchwork.plctlab.org/api/1.2/patches/186349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109123646.555D13858292@sourceware.org/","msgid":"<20240109123646.555D13858292@sourceware.org>","list_archive_url":null,"date":"2024-01-09T12:31:00","name":"tree-optimization/113026 - fix vector epilogue maximum iter bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109123646.555D13858292@sourceware.org/mbox/"},{"id":186393,"url":"https://patchwork.plctlab.org/api/1.2/patches/186393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109124340.3886305-1-jwakely@redhat.com/","msgid":"<20240109124340.3886305-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T12:33:10","name":"[gcc-13] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109124340.3886305-1-jwakely@redhat.com/mbox/"},{"id":186361,"url":"https://patchwork.plctlab.org/api/1.2/patches/186361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ1FgF0xzHtfSefX@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T13:09:20","name":"[committed] aarch64: Fix up GC of aarch64_simd_types [PR113270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ1FgF0xzHtfSefX@tucnak/mbox/"},{"id":186366,"url":"https://patchwork.plctlab.org/api/1.2/patches/186366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131529.743785-1-poulhies@adacore.com/","msgid":"<20240109131529.743785-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:29","name":"[COMMITTED] ada: Avoid xref on out params of TSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131529.743785-1-poulhies@adacore.com/mbox/"},{"id":186369,"url":"https://patchwork.plctlab.org/api/1.2/patches/186369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131530.743848-1-poulhies@adacore.com/","msgid":"<20240109131530.743848-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:30","name":"[COMMITTED] ada: Remove unreachable code in Resolve_Extension_Aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131530.743848-1-poulhies@adacore.com/mbox/"},{"id":186364,"url":"https://patchwork.plctlab.org/api/1.2/patches/186364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131532.743911-1-poulhies@adacore.com/","msgid":"<20240109131532.743911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:32","name":"[COMMITTED] ada: Fix precondition in Interfaces.C.Strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131532.743911-1-poulhies@adacore.com/mbox/"},{"id":186365,"url":"https://patchwork.plctlab.org/api/1.2/patches/186365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131533.744010-1-poulhies@adacore.com/","msgid":"<20240109131533.744010-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:33","name":"[COMMITTED] ada: Error compiling Ada 2022 object renaming with no subtype mark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131533.744010-1-poulhies@adacore.com/mbox/"},{"id":186368,"url":"https://patchwork.plctlab.org/api/1.2/patches/186368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131535.744072-1-poulhies@adacore.com/","msgid":"<20240109131535.744072-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:35","name":"[COMMITTED] ada: Fix bug in Sem_Util.Enclosing_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131535.744072-1-poulhies@adacore.com/mbox/"},{"id":186367,"url":"https://patchwork.plctlab.org/api/1.2/patches/186367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131537.744133-1-poulhies@adacore.com/","msgid":"<20240109131537.744133-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:37","name":"[COMMITTED] ada: Fix uses of not Present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131537.744133-1-poulhies@adacore.com/mbox/"},{"id":186375,"url":"https://patchwork.plctlab.org/api/1.2/patches/186375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131538.744194-1-poulhies@adacore.com/","msgid":"<20240109131538.744194-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:38","name":"[COMMITTED] ada: Remove dead code for GNATprove inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131538.744194-1-poulhies@adacore.com/mbox/"},{"id":186378,"url":"https://patchwork.plctlab.org/api/1.2/patches/186378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131540.744255-1-poulhies@adacore.com/","msgid":"<20240109131540.744255-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:40","name":"[COMMITTED] ada: Remove dead detection of recursive inlined subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131540.744255-1-poulhies@adacore.com/mbox/"},{"id":186380,"url":"https://patchwork.plctlab.org/api/1.2/patches/186380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131542.744317-1-poulhies@adacore.com/","msgid":"<20240109131542.744317-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:42","name":"[COMMITTED] ada: More aggressive inlining of subprogram calls in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131542.744317-1-poulhies@adacore.com/mbox/"},{"id":186374,"url":"https://patchwork.plctlab.org/api/1.2/patches/186374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131544.744378-1-poulhies@adacore.com/","msgid":"<20240109131544.744378-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:44","name":"[COMMITTED] ada: Remove side effects depending on the context of subtype declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131544.744378-1-poulhies@adacore.com/mbox/"},{"id":186370,"url":"https://patchwork.plctlab.org/api/1.2/patches/186370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131545.744441-1-poulhies@adacore.com/","msgid":"<20240109131545.744441-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:45","name":"[COMMITTED] ada: Cannot requeue to a procedure implemented by an entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131545.744441-1-poulhies@adacore.com/mbox/"},{"id":186373,"url":"https://patchwork.plctlab.org/api/1.2/patches/186373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131547.744502-1-poulhies@adacore.com/","msgid":"<20240109131547.744502-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:47","name":"[COMMITTED] ada: Add __atomic_store_n binding to System.Atomic_Primitives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131547.744502-1-poulhies@adacore.com/mbox/"},{"id":186377,"url":"https://patchwork.plctlab.org/api/1.2/patches/186377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131549.744564-1-poulhies@adacore.com/","msgid":"<20240109131549.744564-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:49","name":"[COMMITTED] ada: Fix internal error on class-wide allocator inside if-expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131549.744564-1-poulhies@adacore.com/mbox/"},{"id":186376,"url":"https://patchwork.plctlab.org/api/1.2/patches/186376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131551.744625-1-poulhies@adacore.com/","msgid":"<20240109131551.744625-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:51","name":"[COMMITTED] ada: Fix limited_with in Check_Scil; allow for <> in pp of aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131551.744625-1-poulhies@adacore.com/mbox/"},{"id":186381,"url":"https://patchwork.plctlab.org/api/1.2/patches/186381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131553.744686-1-poulhies@adacore.com/","msgid":"<20240109131553.744686-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:53","name":"[COMMITTED] ada: Remove unused runtime entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131553.744686-1-poulhies@adacore.com/mbox/"},{"id":186372,"url":"https://patchwork.plctlab.org/api/1.2/patches/186372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131554.744749-1-poulhies@adacore.com/","msgid":"<20240109131554.744749-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:54","name":"[COMMITTED] ada: Excess elements created for indexed aggregates with iterator_specifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131554.744749-1-poulhies@adacore.com/mbox/"},{"id":186382,"url":"https://patchwork.plctlab.org/api/1.2/patches/186382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131556.744810-1-poulhies@adacore.com/","msgid":"<20240109131556.744810-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:56","name":"[COMMITTED] ada: Allow passing private types to generic formal incomplete types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131556.744810-1-poulhies@adacore.com/mbox/"},{"id":186371,"url":"https://patchwork.plctlab.org/api/1.2/patches/186371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131557.744875-1-poulhies@adacore.com/","msgid":"<20240109131557.744875-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:57","name":"[COMMITTED] ada: Minor change replacing \"not Present\" tests with \"No\" tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131557.744875-1-poulhies@adacore.com/mbox/"},{"id":186383,"url":"https://patchwork.plctlab.org/api/1.2/patches/186383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131559.744937-1-poulhies@adacore.com/","msgid":"<20240109131559.744937-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:59","name":"[COMMITTED] ada: Do not count comparison of addresses as a modification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131559.744937-1-poulhies@adacore.com/mbox/"},{"id":186379,"url":"https://patchwork.plctlab.org/api/1.2/patches/186379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131601.744998-1-poulhies@adacore.com/","msgid":"<20240109131601.744998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:16:00","name":"[COMMITTED] ada: Preliminary cleanup in aliasing support code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131601.744998-1-poulhies@adacore.com/mbox/"},{"id":186384,"url":"https://patchwork.plctlab.org/api/1.2/patches/186384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131602.745077-1-poulhies@adacore.com/","msgid":"<20240109131602.745077-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:16:02","name":"[COMMITTED] ada: Fix bogus Constraint_Error on allocator for access to array of access type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131602.745077-1-poulhies@adacore.com/mbox/"},{"id":186389,"url":"https://patchwork.plctlab.org/api/1.2/patches/186389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109133640.752216-1-poulhies@adacore.com/","msgid":"<20240109133640.752216-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:36:21","name":"[COMMITTED] ada: Document new SPARK aspect and pragma Always_Terminates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109133640.752216-1-poulhies@adacore.com/mbox/"},{"id":186463,"url":"https://patchwork.plctlab.org/api/1.2/patches/186463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109164659.1822407-1-hjl.tools@gmail.com/","msgid":"<20240109164659.1822407-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2024-01-09T16:46:59","name":"hwasan: Check if Intel LAM_U57 is enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109164659.1822407-1-hjl.tools@gmail.com/mbox/"},{"id":186469,"url":"https://patchwork.plctlab.org/api/1.2/patches/186469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ymbmewlenjtl77ddxvqzcdwpulgspxbimddcbnloo7hsfdpw6y@y5gsaomrxx6b/","msgid":"","list_archive_url":null,"date":"2024-01-09T16:49:34","name":"[2/7,v2] lto: Remove random_seed from section name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ymbmewlenjtl77ddxvqzcdwpulgspxbimddcbnloo7hsfdpw6y@y5gsaomrxx6b/mbox/"},{"id":186471,"url":"https://patchwork.plctlab.org/api/1.2/patches/186471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb5f51fa-dbbc-463f-968d-a28a71ecc535@gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T17:10:45","name":"[committed] Fix minor bug on mn103 port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb5f51fa-dbbc-463f-968d-a28a71ecc535@gmail.com/mbox/"},{"id":186473,"url":"https://patchwork.plctlab.org/api/1.2/patches/186473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d45fd0b5-9706-48a8-88df-f355904954a3@gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T17:19:37","name":"[committed] Fix minor bug in epiphany port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d45fd0b5-9706-48a8-88df-f355904954a3@gmail.com/mbox/"},{"id":186511,"url":"https://patchwork.plctlab.org/api/1.2/patches/186511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109172054.3968493-1-jwakely@redhat.com/","msgid":"<20240109172054.3968493-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T17:20:39","name":"[committed] libstdc++: Simplify some chrono formatters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109172054.3968493-1-jwakely@redhat.com/mbox/"},{"id":186562,"url":"https://patchwork.plctlab.org/api/1.2/patches/186562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3238326.AJdgDx1Vlc@fomalhaut/","msgid":"<3238326.AJdgDx1Vlc@fomalhaut>","list_archive_url":null,"date":"2024-01-09T20:17:29","name":"Fix debug info for enumeration types with reverse Scalar_Storage_Order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3238326.AJdgDx1Vlc@fomalhaut/mbox/"},{"id":186572,"url":"https://patchwork.plctlab.org/api/1.2/patches/186572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87plyauqmd.fsf@igel.home/","msgid":"<87plyauqmd.fsf@igel.home>","list_archive_url":null,"date":"2024-01-09T21:46:34","name":"Fix spurious match in extract_symvers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87plyauqmd.fsf@igel.home/mbox/"},{"id":186595,"url":"https://patchwork.plctlab.org/api/1.2/patches/186595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109215933.4054953-1-jwakely@redhat.com/","msgid":"<20240109215933.4054953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T21:57:25","name":"libstdc++: Prefer posix_memalign for aligned-new [PR113258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109215933.4054953-1-jwakely@redhat.com/mbox/"},{"id":186637,"url":"https://patchwork.plctlab.org/api/1.2/patches/186637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109234450.4142610-1-jwakely@redhat.com/","msgid":"<20240109234450.4142610-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T23:44:34","name":"[committed] libstdc++: Fix Unicode property detection functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109234450.4142610-1-jwakely@redhat.com/mbox/"},{"id":186625,"url":"https://patchwork.plctlab.org/api/1.2/patches/186625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109235210.605208-1-iii@linux.ibm.com/","msgid":"<20240109235210.605208-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-09T23:47:39","name":"[v2] rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109235210.605208-1-iii@linux.ibm.com/mbox/"},{"id":186641,"url":"https://patchwork.plctlab.org/api/1.2/patches/186641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110010005.463710-1-juzhe.zhong@rivai.ai/","msgid":"<20240110010005.463710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T01:00:05","name":"[Committed] RISC-V: Robostify dynamic lmul test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110010005.463710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186662,"url":"https://patchwork.plctlab.org/api/1.2/patches/186662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-2-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:56","name":"[V2,1/4,RFC] RISC-V: Add non-vector types to dfa pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-2-ewlu@rivosinc.com/mbox/"},{"id":186660,"url":"https://patchwork.plctlab.org/api/1.2/patches/186660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-3-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:57","name":"[V2,2/4,RFC] RISC-V: Add vector related reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-3-ewlu@rivosinc.com/mbox/"},{"id":186663,"url":"https://patchwork.plctlab.org/api/1.2/patches/186663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-4-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:58","name":"[V2,3/4,RFC] RISC-V: Use default cost model for insn scheduling for tests affected in PR113249","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-4-ewlu@rivosinc.com/mbox/"},{"id":186661,"url":"https://patchwork.plctlab.org/api/1.2/patches/186661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-5-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:59","name":"[V2,4/4,RFC] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-5-ewlu@rivosinc.com/mbox/"},{"id":186664,"url":"https://patchwork.plctlab.org/api/1.2/patches/186664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com/","msgid":"<1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com>","list_archive_url":null,"date":"2024-01-10T01:35:24","name":"[rs6000] Refactor expand_compare_loop and split it to two functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com/mbox/"},{"id":186665,"url":"https://patchwork.plctlab.org/api/1.2/patches/186665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013802.912942-1-juzhe.zhong@rivai.ai/","msgid":"<20240110013802.912942-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T01:38:02","name":"RISC-V: Minor tweak dynamic cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013802.912942-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186666,"url":"https://patchwork.plctlab.org/api/1.2/patches/186666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020210.2062140-1-hongtao.liu@intel.com/","msgid":"<20240110020210.2062140-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-10T02:02:10","name":"Update documents for fcf-protection=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020210.2062140-1-hongtao.liu@intel.com/mbox/"},{"id":186667,"url":"https://patchwork.plctlab.org/api/1.2/patches/186667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020445.23201-1-vapier@gentoo.org/","msgid":"<20240110020445.23201-1-vapier@gentoo.org>","list_archive_url":null,"date":"2024-01-10T02:04:45","name":"config: delete unused CYG_AC_PATH_LIBERTY macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020445.23201-1-vapier@gentoo.org/mbox/"},{"id":186669,"url":"https://patchwork.plctlab.org/api/1.2/patches/186669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110022249.1079-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110022249.1079-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T02:22:49","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110022249.1079-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186671,"url":"https://patchwork.plctlab.org/api/1.2/patches/186671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110023452.2312519-1-haochen.jiang@intel.com/","msgid":"<20240110023452.2312519-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-10T02:34:52","name":"Add -mevex512 into invoke.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110023452.2312519-1-haochen.jiang@intel.com/mbox/"},{"id":186674,"url":"https://patchwork.plctlab.org/api/1.2/patches/186674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com/","msgid":"<634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T02:57:39","name":"Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186677,"url":"https://patchwork.plctlab.org/api/1.2/patches/186677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110030650.1338056-1-juzhe.zhong@rivai.ai/","msgid":"<20240110030650.1338056-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T03:06:50","name":"[V2] RISC-V: Minor tweak dynamic cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110030650.1338056-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186683,"url":"https://patchwork.plctlab.org/api/1.2/patches/186683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110050538.2465410-1-juzhe.zhong@rivai.ai/","msgid":"<20240110050538.2465410-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T05:05:38","name":"RISC-V: Refine unsigned avg_floor/avg_ceil","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110050538.2465410-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186694,"url":"https://patchwork.plctlab.org/api/1.2/patches/186694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com/","msgid":"<446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com>","list_archive_url":null,"date":"2024-01-10T07:06:55","name":"[wwwdoc] gcc-14: Add arm cortex-m52 cpu support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com/mbox/"},{"id":186701,"url":"https://patchwork.plctlab.org/api/1.2/patches/186701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com/","msgid":"<5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T07:16:43","name":"Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186704,"url":"https://patchwork.plctlab.org/api/1.2/patches/186704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072459.8851-1-chenxiaolong@loongson.cn/","msgid":"<20240110072459.8851-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-10T07:24:59","name":"[v1] LoongArch: testsuite:Fixed a bug that added a target check error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072459.8851-1-chenxiaolong@loongson.cn/mbox/"},{"id":186703,"url":"https://patchwork.plctlab.org/api/1.2/patches/186703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072521.8916-1-chenxiaolong@loongson.cn/","msgid":"<20240110072521.8916-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-10T07:25:21","name":"[v2] LoongArch: testsuite:Added support for loongarch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072521.8916-1-chenxiaolong@loongson.cn/mbox/"},{"id":186705,"url":"https://patchwork.plctlab.org/api/1.2/patches/186705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d06bcdaa-52c5-4e43-9679-cff63bf4938c.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T07:26:44","name":"?????????Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d06bcdaa-52c5-4e43-9679-cff63bf4938c.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186706,"url":"https://patchwork.plctlab.org/api/1.2/patches/186706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cd3b62c3-1f15-4f8b-af72-eeb5b1f0376c.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T07:28:22","name":"Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cd3b62c3-1f15-4f8b-af72-eeb5b1f0376c.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186708,"url":"https://patchwork.plctlab.org/api/1.2/patches/186708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110073455.1656619-1-haochen.jiang@intel.com/","msgid":"<20240110073455.1656619-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-10T07:34:55","name":"i386: Add AVX10.1 related macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110073455.1656619-1-haochen.jiang@intel.com/mbox/"},{"id":186710,"url":"https://patchwork.plctlab.org/api/1.2/patches/186710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110074457.1749380-1-hongtao.liu@intel.com/","msgid":"<20240110074457.1749380-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-10T07:44:57","name":"Document refactoring of the option -fcf-protection=x.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110074457.1749380-1-hongtao.liu@intel.com/mbox/"},{"id":187019,"url":"https://patchwork.plctlab.org/api/1.2/patches/187019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-2-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:52","name":"[01/14] c++: Implement __is_integral built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187018,"url":"https://patchwork.plctlab.org/api/1.2/patches/187018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-3-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:53","name":"[02/14] libstdc++: Optimize std::is_integral compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-3-kmatsui@gcc.gnu.org/mbox/"},{"id":187020,"url":"https://patchwork.plctlab.org/api/1.2/patches/187020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-4-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:54","name":"[03/14] c++: Implement __is_floating_point built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-4-kmatsui@gcc.gnu.org/mbox/"},{"id":187010,"url":"https://patchwork.plctlab.org/api/1.2/patches/187010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-5-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:55","name":"[04/14] libstdc++: Optimize std::is_floating_point compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-5-kmatsui@gcc.gnu.org/mbox/"},{"id":187022,"url":"https://patchwork.plctlab.org/api/1.2/patches/187022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-6-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:56","name":"[05/14] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-6-kmatsui@gcc.gnu.org/mbox/"},{"id":187011,"url":"https://patchwork.plctlab.org/api/1.2/patches/187011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-7-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:57","name":"[06/14] libstdc++: Optimize std::is_arithmetic compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-7-kmatsui@gcc.gnu.org/mbox/"},{"id":187017,"url":"https://patchwork.plctlab.org/api/1.2/patches/187017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-8-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:58","name":"[07/14] libstdc++: Optimize std::is_fundamental compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-8-kmatsui@gcc.gnu.org/mbox/"},{"id":187016,"url":"https://patchwork.plctlab.org/api/1.2/patches/187016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-9-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:59","name":"[08/14] libstdc++: Optimize std::is_compound compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-9-kmatsui@gcc.gnu.org/mbox/"},{"id":187013,"url":"https://patchwork.plctlab.org/api/1.2/patches/187013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-10-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:00","name":"[09/14] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-10-kmatsui@gcc.gnu.org/mbox/"},{"id":187009,"url":"https://patchwork.plctlab.org/api/1.2/patches/187009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-11-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:01","name":"[10/14] libstdc++: Optimize std::is_unsigned compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-11-kmatsui@gcc.gnu.org/mbox/"},{"id":187015,"url":"https://patchwork.plctlab.org/api/1.2/patches/187015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-12-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:02","name":"[11/14] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-12-kmatsui@gcc.gnu.org/mbox/"},{"id":187021,"url":"https://patchwork.plctlab.org/api/1.2/patches/187021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-13-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:03","name":"[12/14] libstdc++: Optimize std::is_signed compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-13-kmatsui@gcc.gnu.org/mbox/"},{"id":187012,"url":"https://patchwork.plctlab.org/api/1.2/patches/187012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-14-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:04","name":"[13/14] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-14-kmatsui@gcc.gnu.org/mbox/"},{"id":187014,"url":"https://patchwork.plctlab.org/api/1.2/patches/187014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-15-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:05","name":"[14/14] libstdc++: Optimize std::is_scalar compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-15-kmatsui@gcc.gnu.org/mbox/"},{"id":186725,"url":"https://patchwork.plctlab.org/api/1.2/patches/186725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110092737.1238-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110092737.1238-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:27:36","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110092737.1238-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186726,"url":"https://patchwork.plctlab.org/api/1.2/patches/186726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110093141.1291-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110093141.1291-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:31:41","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110093141.1291-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186728,"url":"https://patchwork.plctlab.org/api/1.2/patches/186728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ5m3bq5IlVoU9fK@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T09:43:57","name":"sra: Partial fix for BITINT_TYPEs [PR113120]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ5m3bq5IlVoU9fK@tucnak/mbox/"},{"id":186744,"url":"https://patchwork.plctlab.org/api/1.2/patches/186744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com/","msgid":"<4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:55:16","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186748,"url":"https://patchwork.plctlab.org/api/1.2/patches/186748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110095828.3863165-1-juzhe.zhong@rivai.ai/","msgid":"<20240110095828.3863165-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T09:58:28","name":"RISC-V: Switch RVV cost model to generic vector cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110095828.3863165-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186794,"url":"https://patchwork.plctlab.org/api/1.2/patches/186794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com/","msgid":"<09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T11:06:06","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186798,"url":"https://patchwork.plctlab.org/api/1.2/patches/186798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3295706-8095-4dc3-8a8e-26c9a9bb50f1.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T11:08:53","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3295706-8095-4dc3-8a8e-26c9a9bb50f1.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186805,"url":"https://patchwork.plctlab.org/api/1.2/patches/186805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com/","msgid":"<514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T11:14:12","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186804,"url":"https://patchwork.plctlab.org/api/1.2/patches/186804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ58BGhG67Pw0tY6@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T11:14:12","name":"libgomp, v2: Use absolute pathname to testsuite/flock [PR113192]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ58BGhG67Pw0tY6@tucnak/mbox/"},{"id":186857,"url":"https://patchwork.plctlab.org/api/1.2/patches/186857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ6MFMMbnTl6jlOk@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T12:22:44","name":"[v2] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ6MFMMbnTl6jlOk@arm.com/mbox/"},{"id":186862,"url":"https://patchwork.plctlab.org/api/1.2/patches/186862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110130318.976927-1-julian@codesourcery.com/","msgid":"<20240110130318.976927-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-10T13:03:18","name":"OpenMP: Fix new lvalue-parsing map/to/from tests for 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110130318.976927-1-julian@codesourcery.com/mbox/"},{"id":186864,"url":"https://patchwork.plctlab.org/api/1.2/patches/186864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110131448.989596-1-julian@codesourcery.com/","msgid":"<20240110131448.989596-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-10T13:14:48","name":"OpenMP: Fix g++.dg/gomp/bad-array-section-10.C for C++23 and up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110131448.989596-1-julian@codesourcery.com/mbox/"},{"id":186882,"url":"https://patchwork.plctlab.org/api/1.2/patches/186882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-1-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:03","name":"[pushed,1/3] pretty-print: add selftest coverage for numbered args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-1-dmalcolm@redhat.com/mbox/"},{"id":186884,"url":"https://patchwork.plctlab.org/api/1.2/patches/186884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-2-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:04","name":"[pushed,2/3] pretty-print: support urlification in phase 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-2-dmalcolm@redhat.com/mbox/"},{"id":186883,"url":"https://patchwork.plctlab.org/api/1.2/patches/186883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-3-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:05","name":"[pushed,3/3] gcc-urlifier: handle option prefixes such as '\''-fno-'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-3-dmalcolm@redhat.com/mbox/"},{"id":186917,"url":"https://patchwork.plctlab.org/api/1.2/patches/186917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110142702.6AEDA3857C62@sourceware.org/","msgid":"<20240110142702.6AEDA3857C62@sourceware.org>","list_archive_url":null,"date":"2024-01-10T14:21:13","name":"tree-optimization/113078 - conditional subtraction reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110142702.6AEDA3857C62@sourceware.org/mbox/"},{"id":186920,"url":"https://patchwork.plctlab.org/api/1.2/patches/186920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110143244.7CF7C385DC1C@sourceware.org/","msgid":"<20240110143244.7CF7C385DC1C@sourceware.org>","list_archive_url":null,"date":"2024-01-10T14:25:57","name":"middle-end/112740 - vector boolean CTOR expansion issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110143244.7CF7C385DC1C@sourceware.org/mbox/"},{"id":186941,"url":"https://patchwork.plctlab.org/api/1.2/patches/186941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110154521.146111-1-juzhe.zhong@rivai.ai/","msgid":"<20240110154521.146111-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T15:45:21","name":"[V2] RISC-V: Switch RVV cost model.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110154521.146111-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186948,"url":"https://patchwork.plctlab.org/api/1.2/patches/186948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ7D2DRQbU1cWJcp@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T16:20:40","name":"[committed] testsuite: Add testcase for already fixed PR [PR112734]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ7D2DRQbU1cWJcp@tucnak/mbox/"},{"id":186954,"url":"https://patchwork.plctlab.org/api/1.2/patches/186954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401101525220.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-10T16:40:55","name":"[committed] RISC-V/testsuite: Fix comment termination in pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401101525220.5892@tpp.orcam.me.uk/mbox/"},{"id":187086,"url":"https://patchwork.plctlab.org/api/1.2/patches/187086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ8H6HIA1GDmR2T/@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T21:11:04","name":"[v3] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ8H6HIA1GDmR2T/@arm.com/mbox/"},{"id":187090,"url":"https://patchwork.plctlab.org/api/1.2/patches/187090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659F0AAE000252DE0C340001@message.bloomberg.net/","msgid":"<659F0AAE000252DE0C340001@message.bloomberg.net>","list_archive_url":null,"date":"2024-01-10T21:22:54","name":"libstdc++: std/ranges - Remove a duplicate define directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659F0AAE000252DE0C340001@message.bloomberg.net/mbox/"},{"id":187091,"url":"https://patchwork.plctlab.org/api/1.2/patches/187091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b294d87f-8994-4d8d-8498-943784df4415@jguk.org/","msgid":"","list_archive_url":null,"date":"2024-01-10T21:25:28","name":"[v2] gcc/doc: spelling mistakes and example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b294d87f-8994-4d8d-8498-943784df4415@jguk.org/mbox/"},{"id":187092,"url":"https://patchwork.plctlab.org/api/1.2/patches/187092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org/","msgid":"<74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org>","list_archive_url":null,"date":"2024-01-10T21:28:09","name":"[v2] : gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org/mbox/"},{"id":187102,"url":"https://patchwork.plctlab.org/api/1.2/patches/187102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110214007.2478417-1-ppalka@redhat.com/","msgid":"<20240110214007.2478417-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-10T21:40:07","name":"libstdc++/ranges: Use perfect forwarding in _Pipe and _Partial ctors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110214007.2478417-1-ppalka@redhat.com/mbox/"},{"id":187104,"url":"https://patchwork.plctlab.org/api/1.2/patches/187104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110220813.2501087-1-ppalka@redhat.com/","msgid":"<20240110220813.2501087-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-10T22:08:13","name":"libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT for _Nth_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110220813.2501087-1-ppalka@redhat.com/mbox/"},{"id":187099,"url":"https://patchwork.plctlab.org/api/1.2/patches/187099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-80e5478a-8a63-4954-a58d-6a37b29fc223-1704925462311@3c-app-gmx-bap04/","msgid":"","list_archive_url":null,"date":"2024-01-10T22:24:22","name":"Fortran: annotations for DO CONCURRENT loops [PR113305]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-80e5478a-8a63-4954-a58d-6a37b29fc223-1704925462311@3c-app-gmx-bap04/mbox/"},{"id":187115,"url":"https://patchwork.plctlab.org/api/1.2/patches/187115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A8288448AC9BB7DA2517F7692@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T23:42:45","name":"PING: [PATCH] Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A8288448AC9BB7DA2517F7692@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":187123,"url":"https://patchwork.plctlab.org/api/1.2/patches/187123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111002623.2514687-1-ppalka@redhat.com/","msgid":"<20240111002623.2514687-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-11T00:26:23","name":"libstdc++/ranges: Use C++23 deducing this for _Pipe and _Partial","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111002623.2514687-1-ppalka@redhat.com/mbox/"},{"id":187120,"url":"https://patchwork.plctlab.org/api/1.2/patches/187120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111010710.354540-1-yangyujie@loongson.cn/","msgid":"<20240111010710.354540-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:07:10","name":"[v2] LoongArch: Implement option save/restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111010710.354540-1-yangyujie@loongson.cn/mbox/"},{"id":187124,"url":"https://patchwork.plctlab.org/api/1.2/patches/187124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012045.354659-1-yangyujie@loongson.cn/","msgid":"<20240111012045.354659-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:20:45","name":"LoongArch: Split loongarch_option_override_internal into smaller procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012045.354659-1-yangyujie@loongson.cn/mbox/"},{"id":187130,"url":"https://patchwork.plctlab.org/api/1.2/patches/187130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012810.354901-1-yangyujie@loongson.cn/","msgid":"<20240111012810.354901-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:28:10","name":"[v2] LoongArch: Split loongarch_option_override_internal into smaller procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012810.354901-1-yangyujie@loongson.cn/mbox/"},{"id":187119,"url":"https://patchwork.plctlab.org/api/1.2/patches/187119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111013842.925454-1-pan2.li@intel.com/","msgid":"<20240111013842.925454-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-11T01:38:42","name":"[v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111013842.925454-1-pan2.li@intel.com/mbox/"},{"id":187148,"url":"https://patchwork.plctlab.org/api/1.2/patches/187148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111024223.264227-1-juzhe.zhong@rivai.ai/","msgid":"<20240111024223.264227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T02:42:23","name":"RISC-V: VLA preempts VLS on unknown NITERS loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111024223.264227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187154,"url":"https://patchwork.plctlab.org/api/1.2/patches/187154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111034415.431657-1-maskray@google.com/","msgid":"<20240111034415.431657-1-maskray@google.com>","list_archive_url":null,"date":"2024-01-11T03:44:15","name":"i386: Add \"z\" constraint for symbolic address/label reference [PR105576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111034415.431657-1-maskray@google.com/mbox/"},{"id":187163,"url":"https://patchwork.plctlab.org/api/1.2/patches/187163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111041416.4172875-1-kmatsui@gcc.gnu.org/","msgid":"<20240111041416.4172875-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T04:14:16","name":"[committed] libstdc++: Optimize std::is_compound compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111041416.4172875-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187166,"url":"https://patchwork.plctlab.org/api/1.2/patches/187166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111042343.1172849-1-quic_apinski@quicinc.com/","msgid":"<20240111042343.1172849-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-11T04:23:43","name":"match: Delay folding of 1/x into `(x+1u)<2u?x:0` until late [PR113301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111042343.1172849-1-quic_apinski@quicinc.com/mbox/"},{"id":187174,"url":"https://patchwork.plctlab.org/api/1.2/patches/187174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659f86dd.050a0220.c8110.0a09@mx.google.com/","msgid":"<659f86dd.050a0220.c8110.0a09@mx.google.com>","list_archive_url":null,"date":"2024-01-11T06:12:41","name":"c++/modules: Support thread_local statics in header modules [PR113292]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659f86dd.050a0220.c8110.0a09@mx.google.com/mbox/"},{"id":187179,"url":"https://patchwork.plctlab.org/api/1.2/patches/187179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111062222.525186-1-kmatsui@gcc.gnu.org/","msgid":"<20240111062222.525186-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T06:22:22","name":"libstdc++: Fix error handling for std::filesystem::equivalent [PR113250]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111062222.525186-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187220,"url":"https://patchwork.plctlab.org/api/1.2/patches/187220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111075915.45BB13861821@sourceware.org/","msgid":"<20240111075915.45BB13861821@sourceware.org>","list_archive_url":null,"date":"2024-01-11T07:53:27","name":"tree-optimization/111003 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111075915.45BB13861821@sourceware.org/mbox/"},{"id":187223,"url":"https://patchwork.plctlab.org/api/1.2/patches/187223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ+kwBq3N0gXC/LO@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-11T08:20:16","name":"libgcc: Use may_alias attribute in bitint handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ+kwBq3N0gXC/LO@tucnak/mbox/"},{"id":187234,"url":"https://patchwork.plctlab.org/api/1.2/patches/187234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111082329.1198064-1-juzhe.zhong@rivai.ai/","msgid":"<20240111082329.1198064-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T08:23:29","name":"RISC-V: Increase scalar_to_vec_cost from 1 to 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111082329.1198064-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187236,"url":"https://patchwork.plctlab.org/api/1.2/patches/187236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/edc970c5-024a-4466-a0fe-9d237b9316c2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T08:28:59","name":"[rs6000] Eliminate unnecessary byte swaps for block clear on P8 LE [PR113325]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/edc970c5-024a-4466-a0fe-9d237b9316c2@linux.ibm.com/mbox/"},{"id":187241,"url":"https://patchwork.plctlab.org/api/1.2/patches/187241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111084640.1397-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111084640.1397-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T08:46:40","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111084640.1397-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187242,"url":"https://patchwork.plctlab.org/api/1.2/patches/187242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111085043.1246942-1-pan2.li@intel.com/","msgid":"<20240111085043.1246942-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-11T08:50:43","name":"[v5] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111085043.1246942-1-pan2.li@intel.com/mbox/"},{"id":187260,"url":"https://patchwork.plctlab.org/api/1.2/patches/187260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111090609.1043115-1-kito.cheng@sifive.com/","msgid":"<20240111090609.1043115-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-11T09:06:09","name":"RISC-V: Documnet the list of supported extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111090609.1043115-1-kito.cheng@sifive.com/mbox/"},{"id":187261,"url":"https://patchwork.plctlab.org/api/1.2/patches/187261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a25951ff-b66f-46ff-ad4f-46398f32cae6.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:11:09","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a25951ff-b66f-46ff-ad4f-46398f32cae6.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187262,"url":"https://patchwork.plctlab.org/api/1.2/patches/187262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5c1ab2b-5a15-4dd9-9bc1-c69d5b852f73.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:14:23","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5c1ab2b-5a15-4dd9-9bc1-c69d5b852f73.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187263,"url":"https://patchwork.plctlab.org/api/1.2/patches/187263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b04e4d2b-e8b3-4233-8a32-66144d8a5c3d.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:21:48","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b04e4d2b-e8b3-4233-8a32-66144d8a5c3d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187265,"url":"https://patchwork.plctlab.org/api/1.2/patches/187265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff66ca2e-d5c5-474d-af6c-7dcf37efb07e.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:26:20","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff66ca2e-d5c5-474d-af6c-7dcf37efb07e.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187266,"url":"https://patchwork.plctlab.org/api/1.2/patches/187266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com/","msgid":"<0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:29:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187269,"url":"https://patchwork.plctlab.org/api/1.2/patches/187269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d99c1d06-b029-4997-bb0b-9b886901220b.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:35:39","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d99c1d06-b029-4997-bb0b-9b886901220b.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187270,"url":"https://patchwork.plctlab.org/api/1.2/patches/187270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com/","msgid":"<5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:38:00","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187271,"url":"https://patchwork.plctlab.org/api/1.2/patches/187271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-1-kmatsui@gcc.gnu.org/","msgid":"<20240111094038.876653-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:40:37","name":"[v2,1/2] libstdc++: Fix error handling in filesystem::equivalent [PR113250]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187272,"url":"https://patchwork.plctlab.org/api/1.2/patches/187272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-2-kmatsui@gcc.gnu.org/","msgid":"<20240111094038.876653-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:40:38","name":"[v2,2/2] libstdc++: Use using instead of typedef in opts-common.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187275,"url":"https://patchwork.plctlab.org/api/1.2/patches/187275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095210.1450-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111095210.1450-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:52:10","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095210.1450-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187276,"url":"https://patchwork.plctlab.org/api/1.2/patches/187276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6c4cd7-993d-43f2-a3c2-541f13bbbf1f.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:54:09","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6c4cd7-993d-43f2-a3c2-541f13bbbf1f.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187277,"url":"https://patchwork.plctlab.org/api/1.2/patches/187277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095922.2148110-1-syq@gcc.gnu.org/","msgid":"<20240111095922.2148110-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:59:21","name":"[commit] MIPS: Add ATTRIBUTE_UNUSED to mips_start_function_definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095922.2148110-1-syq@gcc.gnu.org/mbox/"},{"id":187280,"url":"https://patchwork.plctlab.org/api/1.2/patches/187280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111101202.952224-2-kmatsui@gcc.gnu.org/","msgid":"<20240111101202.952224-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T10:12:02","name":"[v3,2/2] libstdc++: Use using instead of typedef in opts-common.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111101202.952224-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187284,"url":"https://patchwork.plctlab.org/api/1.2/patches/187284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111103217.1306207-1-quic_apinski@quicinc.com/","msgid":"<20240111103217.1306207-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-11T10:32:17","name":"expr: Limit the store flag optimization for single bit to non-vectors [PR113322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111103217.1306207-1-quic_apinski@quicinc.com/mbox/"},{"id":187298,"url":"https://patchwork.plctlab.org/api/1.2/patches/187298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e75feb-9a34-4fce-845e-536ae3ed43c0.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T10:54:50","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e75feb-9a34-4fce-845e-536ae3ed43c0.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187305,"url":"https://patchwork.plctlab.org/api/1.2/patches/187305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111110322.1503-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111110322.1503-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T11:03:22","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111110322.1503-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187314,"url":"https://patchwork.plctlab.org/api/1.2/patches/187314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113619.2063055-1-liwei@loongson.cn/","msgid":"<20240111113619.2063055-1-liwei@loongson.cn>","list_archive_url":null,"date":"2024-01-11T11:36:19","name":"[v2,1/2] LoongArch: Redundant sign extension elimination optimization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113619.2063055-1-liwei@loongson.cn/mbox/"},{"id":187315,"url":"https://patchwork.plctlab.org/api/1.2/patches/187315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113633.2063159-1-liwei@loongson.cn/","msgid":"<20240111113633.2063159-1-liwei@loongson.cn>","list_archive_url":null,"date":"2024-01-11T11:36:33","name":"[v2,2/2] LoongArch: Redundant sign extension elimination optimization 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113633.2063159-1-liwei@loongson.cn/mbox/"},{"id":187317,"url":"https://patchwork.plctlab.org/api/1.2/patches/187317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ_Tlecj-1lW6uN_@elastic.org/","msgid":"","list_archive_url":null,"date":"2024-01-11T11:40:05","name":"[wwwdocs] tweak for sourceware account request alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ_Tlecj-1lW6uN_@elastic.org/mbox/"},{"id":187347,"url":"https://patchwork.plctlab.org/api/1.2/patches/187347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com/","msgid":"<801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T12:05:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187359,"url":"https://patchwork.plctlab.org/api/1.2/patches/187359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c51e9768-8ff2-498b-aac7-5b2a4cd26142.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T12:18:22","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c51e9768-8ff2-498b-aac7-5b2a4cd26142.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187364,"url":"https://patchwork.plctlab.org/api/1.2/patches/187364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com/","msgid":"<2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T12:31:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187365,"url":"https://patchwork.plctlab.org/api/1.2/patches/187365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf5f8efe-48aa-4488-92c3-fed6cf5d80a3.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T12:36:52","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf5f8efe-48aa-4488-92c3-fed6cf5d80a3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187399,"url":"https://patchwork.plctlab.org/api/1.2/patches/187399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111124909.208285-1-jwakely@redhat.com/","msgid":"<20240111124909.208285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T12:48:32","name":"[wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111124909.208285-1-jwakely@redhat.com/mbox/"},{"id":187396,"url":"https://patchwork.plctlab.org/api/1.2/patches/187396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111125046.208397-1-jwakely@redhat.com/","msgid":"<20240111125046.208397-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T12:49:20","name":"[wwwdocs] Document additional symbols in libstdc++exp.a for GCC 13.3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111125046.208397-1-jwakely@redhat.com/mbox/"},{"id":187382,"url":"https://patchwork.plctlab.org/api/1.2/patches/187382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de/","msgid":"<693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de>","list_archive_url":null,"date":"2024-01-11T13:39:20","name":"[avr,applied] Small improvements to texi documentation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de/mbox/"},{"id":187384,"url":"https://patchwork.plctlab.org/api/1.2/patches/187384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111135012.8A68B3857BB0@sourceware.org/","msgid":"<20240111135012.8A68B3857BB0@sourceware.org>","list_archive_url":null,"date":"2024-01-11T13:44:18","name":"tree-optimization/112636 - estimate niters before header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111135012.8A68B3857BB0@sourceware.org/mbox/"},{"id":187385,"url":"https://patchwork.plctlab.org/api/1.2/patches/187385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111134948.3112510-1-juzhe.zhong@rivai.ai/","msgid":"<20240111134948.3112510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T13:49:48","name":"[V2] RISC-V: Adjust scalar_to_vec cost accurately","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111134948.3112510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187392,"url":"https://patchwork.plctlab.org/api/1.2/patches/187392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111140407.E34013857BB0@sourceware.org/","msgid":"<20240111140407.E34013857BB0@sourceware.org>","list_archive_url":null,"date":"2024-01-11T13:58:23","name":"[s390] target/112280 - properly guard permute query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111140407.E34013857BB0@sourceware.org/mbox/"},{"id":187394,"url":"https://patchwork.plctlab.org/api/1.2/patches/187394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141328.AB719386186A@sourceware.org/","msgid":"<20240111141328.AB719386186A@sourceware.org>","list_archive_url":null,"date":"2024-01-11T14:07:34","name":"tree-optimization/112505 - bit-precision induction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141328.AB719386186A@sourceware.org/mbox/"},{"id":187395,"url":"https://patchwork.plctlab.org/api/1.2/patches/187395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141340.7F7D738618AB@sourceware.org/","msgid":"<20240111141340.7F7D738618AB@sourceware.org>","list_archive_url":null,"date":"2024-01-11T14:07:45","name":"tree-optimization/113126 - vector extension compare optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141340.7F7D738618AB@sourceware.org/mbox/"},{"id":187393,"url":"https://patchwork.plctlab.org/api/1.2/patches/187393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c05200b5-0d3d-4a9c-b67b-f9a98bc24c2e.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T14:11:11","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c05200b5-0d3d-4a9c-b67b-f9a98bc24c2e.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187401,"url":"https://patchwork.plctlab.org/api/1.2/patches/187401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-3-arthur.cohen@embecosm.com/","msgid":"<20240111142355.1110429-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:22:08","name":"[1/2] gccrs: fixup: Fix bootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-3-arthur.cohen@embecosm.com/mbox/"},{"id":187400,"url":"https://patchwork.plctlab.org/api/1.2/patches/187400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-4-arthur.cohen@embecosm.com/","msgid":"<20240111142355.1110429-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:22:09","name":"[2/2] gccrs: fixup: Fix missing build dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-4-arthur.cohen@embecosm.com/mbox/"},{"id":187402,"url":"https://patchwork.plctlab.org/api/1.2/patches/187402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com/","msgid":"<937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com>","list_archive_url":null,"date":"2024-01-11T14:35:10","name":"[pushed,PR112918,LRA] : Fixing IRA ICE on m68k","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com/mbox/"},{"id":187407,"url":"https://patchwork.plctlab.org/api/1.2/patches/187407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111144118.274895-2-mary.bennett@embecosm.com/","msgid":"<20240111144118.274895-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:41:18","name":"[v2,1/1] RISC-V: Add support for XCVmem extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111144118.274895-2-mary.bennett@embecosm.com/mbox/"},{"id":187425,"url":"https://patchwork.plctlab.org/api/1.2/patches/187425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de/","msgid":"<7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de>","list_archive_url":null,"date":"2024-01-11T15:35:53","name":"[avr,applied] invoke.texi: Move avr internal options to their own @subsubsection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de/mbox/"},{"id":187429,"url":"https://patchwork.plctlab.org/api/1.2/patches/187429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111155202.1518245-1-jason@redhat.com/","msgid":"<20240111155202.1518245-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T15:52:02","name":"testsuite: remove xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111155202.1518245-1-jason@redhat.com/mbox/"},{"id":187461,"url":"https://patchwork.plctlab.org/api/1.2/patches/187461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com/","msgid":"<1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com>","list_archive_url":null,"date":"2024-01-11T16:03:15","name":"libstdc++: use updated type for __unexpected_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com/mbox/"},{"id":187459,"url":"https://patchwork.plctlab.org/api/1.2/patches/187459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaAlc7laA0EbGjRn@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-11T17:29:23","name":"[V2] PR target/112886, Add %S to print_operand for vector pair support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaAlc7laA0EbGjRn@cowardly-lion.the-meissners.org/mbox/"},{"id":187471,"url":"https://patchwork.plctlab.org/api/1.2/patches/187471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111175837.420604-1-jwakely@redhat.com/","msgid":"<20240111175837.420604-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T17:56:46","name":"[committed] libstdc++: Add GDB printer for std::integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111175837.420604-1-jwakely@redhat.com/mbox/"},{"id":187474,"url":"https://patchwork.plctlab.org/api/1.2/patches/187474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111180442.421194-1-jwakely@redhat.com/","msgid":"<20240111180442.421194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T18:03:21","name":"libstdc++: Make PSTL algorithms accept C++20 iterators [PR110512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111180442.421194-1-jwakely@redhat.com/mbox/"},{"id":187469,"url":"https://patchwork.plctlab.org/api/1.2/patches/187469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111182425.547195-1-maskray@google.com/","msgid":"<20240111182425.547195-1-maskray@google.com>","list_archive_url":null,"date":"2024-01-11T18:24:25","name":"i386: Add \"Ws\" constraint for symbolic address/label reference [PR105576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111182425.547195-1-maskray@google.com/mbox/"},{"id":187481,"url":"https://patchwork.plctlab.org/api/1.2/patches/187481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201346.566341-1-julian@codesourcery.com/","msgid":"<20240111201346.566341-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-11T20:13:46","name":"OpenMP 5.1: WIP delimited (begin/end) '\''declare variant'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201346.566341-1-julian@codesourcery.com/mbox/"},{"id":187492,"url":"https://patchwork.plctlab.org/api/1.2/patches/187492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201900.491691-1-jwakely@redhat.com/","msgid":"<20240111201900.491691-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T20:18:29","name":"[committed] libstdc++: Document addition of libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201900.491691-1-jwakely@redhat.com/mbox/"},{"id":187496,"url":"https://patchwork.plctlab.org/api/1.2/patches/187496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111202352.513513-1-jwakely@redhat.com/","msgid":"<20240111202352.513513-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T20:23:07","name":"libstdc++: Fix std::runtime_format deviations from the spec [PR113320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111202352.513513-1-jwakely@redhat.com/mbox/"},{"id":187487,"url":"https://patchwork.plctlab.org/api/1.2/patches/187487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSmw7cVkTP6w9gwQDH2u48XQCciJLGr2G3qABzMpq2PmMQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T20:34:33","name":"[v2] c++: side effect in nullptr_t conversion fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSmw7cVkTP6w9gwQDH2u48XQCciJLGr2G3qABzMpq2PmMQ@mail.gmail.com/mbox/"},{"id":187503,"url":"https://patchwork.plctlab.org/api/1.2/patches/187503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111212819.533282-1-jwakely@redhat.com/","msgid":"<20240111212819.533282-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T21:26:52","name":"[committed] libstdc++: Fix spelling mistake in new doc addition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111212819.533282-1-jwakely@redhat.com/mbox/"},{"id":187497,"url":"https://patchwork.plctlab.org/api/1.2/patches/187497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111213310.1566285-1-jason@redhat.com/","msgid":"<20240111213310.1566285-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T21:33:10","name":"[RFC] codingconventions: add lambda guidelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111213310.1566285-1-jason@redhat.com/mbox/"},{"id":187502,"url":"https://patchwork.plctlab.org/api/1.2/patches/187502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111220148.1575375-1-jason@redhat.com/","msgid":"<20240111220148.1575375-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T22:01:48","name":"[pushed] c++: corresponding object parms [PR113191]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111220148.1575375-1-jason@redhat.com/mbox/"},{"id":187508,"url":"https://patchwork.plctlab.org/api/1.2/patches/187508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111221651.585639-1-jwakely@redhat.com/","msgid":"<20240111221651.585639-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T22:16:35","name":"libstdc++: Implement P2255R2 dangling checks for std::tuple [PR108822]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111221651.585639-1-jwakely@redhat.com/mbox/"},{"id":187505,"url":"https://patchwork.plctlab.org/api/1.2/patches/187505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111230548.623208-1-jwakely@redhat.com/","msgid":"<20240111230548.623208-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T23:04:29","name":"libstdc++: Fix non-portable results from 64-bit std::subtract_with_carry_engine [PR107466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111230548.623208-1-jwakely@redhat.com/mbox/"},{"id":187510,"url":"https://patchwork.plctlab.org/api/1.2/patches/187510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112306560.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:35:37","name":"[1/2] RISC-V/testsuite: Widen coverage for pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112306560.5892@tpp.orcam.me.uk/mbox/"},{"id":187511,"url":"https://patchwork.plctlab.org/api/1.2/patches/187511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112325170.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:35:49","name":"[2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112325170.5892@tpp.orcam.me.uk/mbox/"},{"id":187515,"url":"https://patchwork.plctlab.org/api/1.2/patches/187515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce5b809b30de16c037120c35859e5180903aa949.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:42:43","name":"libgccjit: Fix float playback for cross-compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce5b809b30de16c037120c35859e5180903aa949.camel@zoho.com/mbox/"},{"id":187528,"url":"https://patchwork.plctlab.org/api/1.2/patches/187528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com/","msgid":"<98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T00:49:58","name":"?????????Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187533,"url":"https://patchwork.plctlab.org/api/1.2/patches/187533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112013511.24964-1-wangfeng@eswincomputing.com/","msgid":"<20240112013511.24964-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-12T01:35:11","name":"RISC-V: Modify ABI-name length of vfloat16m8_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112013511.24964-1-wangfeng@eswincomputing.com/mbox/"},{"id":187542,"url":"https://patchwork.plctlab.org/api/1.2/patches/187542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015205.4402-1-chenxiaolong@loongson.cn/","msgid":"<20240112015205.4402-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-12T01:52:05","name":"[v1] LoongArch: testsuite:Added additional vectorization \"-mlsx\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015205.4402-1-chenxiaolong@loongson.cn/mbox/"},{"id":187543,"url":"https://patchwork.plctlab.org/api/1.2/patches/187543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015224.4476-1-chenxiaolong@loongson.cn/","msgid":"<20240112015224.4476-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-12T01:52:24","name":"[v1] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015224.4476-1-chenxiaolong@loongson.cn/mbox/"},{"id":187548,"url":"https://patchwork.plctlab.org/api/1.2/patches/187548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112022543.1380261-1-haochen.jiang@intel.com/","msgid":"<20240112022543.1380261-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-12T02:25:43","name":"i386: Remove redundant move in vnni pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112022543.1380261-1-haochen.jiang@intel.com/mbox/"},{"id":187554,"url":"https://patchwork.plctlab.org/api/1.2/patches/187554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112025215.1776738-1-pan2.li@intel.com/","msgid":"<20240112025215.1776738-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-12T02:52:15","name":"[v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112025215.1776738-1-pan2.li@intel.com/mbox/"},{"id":187557,"url":"https://patchwork.plctlab.org/api/1.2/patches/187557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032029.1609-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240112032029.1609-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:20:29","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032029.1609-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187558,"url":"https://patchwork.plctlab.org/api/1.2/patches/187558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032210.1715-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240112032210.1715-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:22:10","name":"[v6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032210.1715-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187559,"url":"https://patchwork.plctlab.org/api/1.2/patches/187559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com/","msgid":"<9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:26:35","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187567,"url":"https://patchwork.plctlab.org/api/1.2/patches/187567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112045633.2643599-1-sandra@codesourcery.com/","msgid":"<20240112045633.2643599-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-12T04:56:32","name":"[Committed] libgcc, nios2: Fix exception handling on nios2 with -fpic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112045633.2643599-1-sandra@codesourcery.com/mbox/"},{"id":187584,"url":"https://patchwork.plctlab.org/api/1.2/patches/187584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com/","msgid":"<166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com>","list_archive_url":null,"date":"2024-01-12T06:48:44","name":"[rs6000] Enable block compare expand on P9 with m32 and mpowerpc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com/mbox/"},{"id":187600,"url":"https://patchwork.plctlab.org/api/1.2/patches/187600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112074035.3683903-1-juzhe.zhong@rivai.ai/","msgid":"<20240112074035.3683903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-12T07:40:35","name":"[Committed] RISC-V: Enhance a testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112074035.3683903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187602,"url":"https://patchwork.plctlab.org/api/1.2/patches/187602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112085025.641DA136A4@imap1.dmz-prg2.suse.org/","msgid":"<20240112085025.641DA136A4@imap1.dmz-prg2.suse.org>","list_archive_url":null,"date":"2024-01-12T08:50:16","name":"middle-end/113344 - is_truth_type_for vs GENERIC tcc_comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112085025.641DA136A4@imap1.dmz-prg2.suse.org/mbox/"},{"id":187625,"url":"https://patchwork.plctlab.org/api/1.2/patches/187625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112092844.260890-1-juzhe.zhong@rivai.ai/","msgid":"<20240112092844.260890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-12T09:28:44","name":"[V3] RISC-V: Adjust scalar_to_vec cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112092844.260890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187627,"url":"https://patchwork.plctlab.org/api/1.2/patches/187627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEGUldmPTM5d31b@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:28:51","name":"c: Avoid _BitInt indexes > sizetype in ARRAY_REFs [PR113315]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEGUldmPTM5d31b@tucnak/mbox/"},{"id":187628,"url":"https://patchwork.plctlab.org/api/1.2/patches/187628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEHikflGhduPrnv@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:34:04","name":"lower-bitint: Fix up handling of uninitialized large/huge _BitInt call arguments [PR113316]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEHikflGhduPrnv@tucnak/mbox/"},{"id":187630,"url":"https://patchwork.plctlab.org/api/1.2/patches/187630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEIaLhkFP2KOwCC@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:37:46","name":"lower-bitint: Fix a typo in a condition [PR113323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEIaLhkFP2KOwCC@tucnak/mbox/"},{"id":187631,"url":"https://patchwork.plctlab.org/api/1.2/patches/187631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:43:27","name":"sra: Punt for too large _BitInt accesses [PR113330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"},{"id":187700,"url":"https://patchwork.plctlab.org/api/1.2/patches/187700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094507.683543-1-jwakely@redhat.com/","msgid":"<20240112094507.683543-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T09:44:52","name":"[committed] libstdc++: Fix incorrect PR number in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094507.683543-1-jwakely@redhat.com/mbox/"},{"id":187707,"url":"https://patchwork.plctlab.org/api/1.2/patches/187707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094855.684825-1-jwakely@redhat.com/","msgid":"<20240112094855.684825-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T09:48:20","name":"[committed] libstdc++: Implement C++23 P1951R1 (Default Args for pair'\''s Forwarding Ctor) [PR105505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094855.684825-1-jwakely@redhat.com/mbox/"},{"id":187649,"url":"https://patchwork.plctlab.org/api/1.2/patches/187649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaELkogkBMt9fsWx@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:51:14","name":"[committed] testsuite: Fix up preprocessor conditions in bitint-31.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaELkogkBMt9fsWx@tucnak/mbox/"},{"id":187657,"url":"https://patchwork.plctlab.org/api/1.2/patches/187657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEMw1B73Ngv3ie1@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:56:19","name":"lower-bitint: Fix up handling of unsigned INTEGER_CSTs operands with lots of 1s in the upper bits [PR113334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEMw1B73Ngv3ie1@tucnak/mbox/"},{"id":187660,"url":"https://patchwork.plctlab.org/api/1.2/patches/187660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEOgF4jwjfK6QwE@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T10:03:44","name":"varasm: Fix up process_pending_assemble_externals [PR113182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEOgF4jwjfK6QwE@tucnak/mbox/"},{"id":187718,"url":"https://patchwork.plctlab.org/api/1.2/patches/187718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzoespp0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:26:19","name":"[PATCHv3] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzoespp0.fsf@arm.com/mbox/"},{"id":187719,"url":"https://patchwork.plctlab.org/api/1.2/patches/187719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9qspgy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:31:09","name":"[1/2] aarch64: Use a separate group for SME builtins [PR112989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9qspgy.fsf@arm.com/mbox/"},{"id":187720,"url":"https://patchwork.plctlab.org/api/1.2/patches/187720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jfispfv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:31:48","name":"[2/2] aarch64: Use a global map to detect duplicated overloads [PR112989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jfispfv.fsf@arm.com/mbox/"},{"id":187721,"url":"https://patchwork.plctlab.org/api/1.2/patches/187721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmseraih.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:39:34","name":"[pushed] aarch64: Rework uxtl->zip optimisation [PR113196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmseraih.fsf@arm.com/mbox/"},{"id":187724,"url":"https://patchwork.plctlab.org/api/1.2/patches/187724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaE0eq4+3Fn78jqj@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:45:46","name":"c++, demangle: Implement https://github.com/itanium-cxx-abi/cxx-abi/issues/148 non-proposal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaE0eq4+3Fn78jqj@tucnak/mbox/"},{"id":187726,"url":"https://patchwork.plctlab.org/api/1.2/patches/187726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de/","msgid":"<238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de>","list_archive_url":null,"date":"2024-01-12T12:51:41","name":"[avr,applied] Fix PR107201 -nodevicelib not working for all devices.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de/mbox/"},{"id":187742,"url":"https://patchwork.plctlab.org/api/1.2/patches/187742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bk9q8xac.fsf@euler.schwinge.homeip.net/","msgid":"<87bk9q8xac.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2024-01-12T14:02:35","name":"GCN: Enable effective-target '\''vect_early_break'\'', '\''vect_early_break_hw'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bk9q8xac.fsf@euler.schwinge.homeip.net/mbox/"},{"id":187744,"url":"https://patchwork.plctlab.org/api/1.2/patches/187744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112140658.62598-1-iain@sandoe.co.uk/","msgid":"<20240112140658.62598-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-12T14:06:58","name":"[pushed] Darwin, powerpc: Fix bootstrap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112140658.62598-1-iain@sandoe.co.uk/mbox/"},{"id":187748,"url":"https://patchwork.plctlab.org/api/1.2/patches/187748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141230.62685-1-iain@sandoe.co.uk/","msgid":"<20240112141230.62685-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-12T14:12:30","name":"[pushed] Objective-C, Darwin: Fix a regression in handling bad receivers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141230.62685-1-iain@sandoe.co.uk/mbox/"},{"id":187749,"url":"https://patchwork.plctlab.org/api/1.2/patches/187749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141616.353D913782@imap1.dmz-prg2.suse.org/","msgid":"<20240112141616.353D913782@imap1.dmz-prg2.suse.org>","list_archive_url":null,"date":"2024-01-12T14:16:11","name":"tree-optimization/109893 - allow more backwards jump threading","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141616.353D913782@imap1.dmz-prg2.suse.org/mbox/"},{"id":187802,"url":"https://patchwork.plctlab.org/api/1.2/patches/187802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0409d57-9d8f-4f45-85f1-e8204f464245@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-12T17:52:36","name":"[avr,applied] Fix documentation for attribute \"address\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0409d57-9d8f-4f45-85f1-e8204f464245@gjlay.de/mbox/"},{"id":187803,"url":"https://patchwork.plctlab.org/api/1.2/patches/187803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de/","msgid":"<0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de>","list_archive_url":null,"date":"2024-01-12T18:07:01","name":"[avr,applied] Add link to sample ld-script in avr-gcc wiki.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de/mbox/"},{"id":187809,"url":"https://patchwork.plctlab.org/api/1.2/patches/187809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-2-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:40","name":"[V3,1/4] RISC-V: Add non-vector types to dfa pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-2-ewlu@rivosinc.com/mbox/"},{"id":187810,"url":"https://patchwork.plctlab.org/api/1.2/patches/187810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-3-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:41","name":"[V3,2/4] RISC-V: Add vector related pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-3-ewlu@rivosinc.com/mbox/"},{"id":187812,"url":"https://patchwork.plctlab.org/api/1.2/patches/187812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-4-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:42","name":"[V3,3/4] RISC-V: Use default cost model for insn scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-4-ewlu@rivosinc.com/mbox/"},{"id":187811,"url":"https://patchwork.plctlab.org/api/1.2/patches/187811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-5-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:43","name":"[V3,4/4] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-5-ewlu@rivosinc.com/mbox/"},{"id":187819,"url":"https://patchwork.plctlab.org/api/1.2/patches/187819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de/","msgid":"<5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de>","list_archive_url":null,"date":"2024-01-12T19:23:20","name":"[v2] Fortran: annotations for DO CONCURRENT loops [PR113305]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de/mbox/"},{"id":187827,"url":"https://patchwork.plctlab.org/api/1.2/patches/187827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-1-ppalka@redhat.com/","msgid":"<20240112200909.2649164-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-12T20:09:08","name":"[1/2] libstdc++: Use C++23 deducing this in std::bind_front","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-1-ppalka@redhat.com/mbox/"},{"id":187828,"url":"https://patchwork.plctlab.org/api/1.2/patches/187828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-2-ppalka@redhat.com/","msgid":"<20240112200909.2649164-2-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-12T20:09:09","name":"[2/2] libstdc++: Implement C++23 std::bind_pack from P2387R3 [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-2-ppalka@redhat.com/mbox/"},{"id":187845,"url":"https://patchwork.plctlab.org/api/1.2/patches/187845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112224145.1090544-1-jwakely@redhat.com/","msgid":"<20240112224145.1090544-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T22:29:03","name":"[WIP] libstdc++: Implement C++26 std::text_encoding [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112224145.1090544-1-jwakely@redhat.com/mbox/"},{"id":187846,"url":"https://patchwork.plctlab.org/api/1.2/patches/187846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112225924.1097416-1-jwakely@redhat.com/","msgid":"<20240112225924.1097416-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T22:58:29","name":"libstdc++: Update tzdata to 2023d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112225924.1097416-1-jwakely@redhat.com/mbox/"},{"id":187856,"url":"https://patchwork.plctlab.org/api/1.2/patches/187856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113005515.1029712-1-thiago.bauermann@linaro.org/","msgid":"<20240113005515.1029712-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2024-01-13T00:55:15","name":"testsuite: Fix fallout of turning warnings into errors on 32-bit Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113005515.1029712-1-thiago.bauermann@linaro.org/mbox/"},{"id":187859,"url":"https://patchwork.plctlab.org/api/1.2/patches/187859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113015133.741517-1-juzhe.zhong@rivai.ai/","msgid":"<20240113015133.741517-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-13T01:51:33","name":"RISC-V: Adjust loop len by costing 1 when NITER < VF [GCC 14 regression]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113015133.741517-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187869,"url":"https://patchwork.plctlab.org/api/1.2/patches/187869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113043706.2216775-1-quic_apinski@quicinc.com/","msgid":"<20240113043706.2216775-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-13T04:37:06","name":"[COMMITTED] Add a few testcases for fix missed optimization regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113043706.2216775-1-quic_apinski@quicinc.com/mbox/"},{"id":187872,"url":"https://patchwork.plctlab.org/api/1.2/patches/187872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113063709.19072-1-chenglulu@loongson.cn/","msgid":"<20240113063709.19072-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-13T06:37:09","name":"LoongArch: Assign the '\''/u'\'' attribute to the mem to which the global offset table belongs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113063709.19072-1-chenglulu@loongson.cn/mbox/"},{"id":187874,"url":"https://patchwork.plctlab.org/api/1.2/patches/187874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072817.31932-1-chenxiaolong@loongson.cn/","msgid":"<20240113072817.31932-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-13T07:28:17","name":"[v2] LoongArch: testsuite:Added additional vectorization \"-mlsx\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072817.31932-1-chenxiaolong@loongson.cn/mbox/"},{"id":187875,"url":"https://patchwork.plctlab.org/api/1.2/patches/187875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072834.32021-1-chenxiaolong@loongson.cn/","msgid":"<20240113072834.32021-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-13T07:28:34","name":"[v2] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072834.32021-1-chenxiaolong@loongson.cn/mbox/"},{"id":187881,"url":"https://patchwork.plctlab.org/api/1.2/patches/187881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaJbBs0d2PeCzubq@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-13T09:42:30","name":"lower-bitint: Fix up handle_operand_addr INTEGER_CST handling [PR113361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaJbBs0d2PeCzubq@tucnak/mbox/"},{"id":187898,"url":"https://patchwork.plctlab.org/api/1.2/patches/187898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4mkmPfFHVrzEHg6SA_o8YMs3QHv2dpX_f3E+rrdv4iYuA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T11:18:37","name":"[v2] libstdc++: Update tzdata to 2023d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4mkmPfFHVrzEHg6SA_o8YMs3QHv2dpX_f3E+rrdv4iYuA@mail.gmail.com/mbox/"},{"id":187902,"url":"https://patchwork.plctlab.org/api/1.2/patches/187902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113124834.1296437-1-jwakely@redhat.com/","msgid":"<20240113124834.1296437-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-13T12:44:01","name":"[v2] libstdc++: Implement C++26 std::text_encoding [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113124834.1296437-1-jwakely@redhat.com/mbox/"},{"id":187903,"url":"https://patchwork.plctlab.org/api/1.2/patches/187903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-2-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-2-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:15","name":"[1/4] testsuite, jit: test-alias-attribute.c requires alias support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-2-iain@sandoe.co.uk/mbox/"},{"id":187904,"url":"https://patchwork.plctlab.org/api/1.2/patches/187904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-3-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-3-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:16","name":"[2/4] testsuite, jit: Handle whitespace in test-link-section-assembler.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-3-iain@sandoe.co.uk/mbox/"},{"id":187906,"url":"https://patchwork.plctlab.org/api/1.2/patches/187906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-4-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-4-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:17","name":"[3/4] testsuite, jit: Allow for target-specific assembler scans.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-4-iain@sandoe.co.uk/mbox/"},{"id":187905,"url":"https://patchwork.plctlab.org/api/1.2/patches/187905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-5-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-5-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:18","name":"[4/4] testsuite,jit: Handle Darwin/Mach-O in assembler tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-5-iain@sandoe.co.uk/mbox/"},{"id":187921,"url":"https://patchwork.plctlab.org/api/1.2/patches/187921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKv0rFkGjlDO14D@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T15:44:18","name":"[2/4] rtl-ssa: Support for creating new uses [PR113070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKv0rFkGjlDO14D@arm.com/mbox/"},{"id":187922,"url":"https://patchwork.plctlab.org/api/1.2/patches/187922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKwCA4MBjcT5ViR@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T15:45:12","name":"[3/4] rtl-ssa: Ensure new defs get inserted [PR113070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKwCA4MBjcT5ViR@arm.com/mbox/"},{"id":187926,"url":"https://patchwork.plctlab.org/api/1.2/patches/187926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaLSbt_K2DroYebC@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-13T18:11:58","name":"[committed] hppa64: Fix fmt_f_default_field_width_3.f90 and fmt_g_default_field_width_3.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaLSbt_K2DroYebC@mx3210.localdomain/mbox/"},{"id":187933,"url":"https://patchwork.plctlab.org/api/1.2/patches/187933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113204655.1052804-1-thiago.bauermann@linaro.org/","msgid":"<20240113204655.1052804-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2024-01-13T20:46:55","name":"testsuite: Turn errors back into warnings in arm/acle/cde-mve-error-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113204655.1052804-1-thiago.bauermann@linaro.org/mbox/"},{"id":187934,"url":"https://patchwork.plctlab.org/api/1.2/patches/187934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a5fb737b-a44a-44b3-a0a0-599d2c1f89bf-1705180362791@3c-app-gmx-bs12/","msgid":"","list_archive_url":null,"date":"2024-01-13T21:12:42","name":"Fortran: intrinsic ISHFTC and missing optional argument SIZE [PR67277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a5fb737b-a44a-44b3-a0a0-599d2c1f89bf-1705180362791@3c-app-gmx-bs12/mbox/"},{"id":187936,"url":"https://patchwork.plctlab.org/api/1.2/patches/187936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113221251.2180315-1-lhyatt@gmail.com/","msgid":"<20240113221251.2180315-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2024-01-13T22:12:51","name":"libcpp: Support extended characters for #pragma {push, pop}_macro [PR109704]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113221251.2180315-1-lhyatt@gmail.com/mbox/"},{"id":187939,"url":"https://patchwork.plctlab.org/api/1.2/patches/187939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240114000534.1775261-1-me@jdemille.com/","msgid":"<20240114000534.1775261-1-me@jdemille.com>","list_archive_url":null,"date":"2024-01-14T00:05:27","name":"libsupc++: Fix UB terminating on foreign exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240114000534.1775261-1-me@jdemille.com/mbox/"},{"id":187961,"url":"https://patchwork.plctlab.org/api/1.2/patches/187961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de/","msgid":"<3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de>","list_archive_url":null,"date":"2024-01-14T13:05:11","name":"[avr,ping,#3] PR target/112944: Support .rodata in RAM for AVR64* and AVR128* devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de/mbox/"},{"id":187963,"url":"https://patchwork.plctlab.org/api/1.2/patches/187963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98216ca7-6a10-4342-b510-1f362127f619@net-b.de/","msgid":"<98216ca7-6a10-4342-b510-1f362127f619@net-b.de>","list_archive_url":null,"date":"2024-01-14T14:26:59","name":"libgomp.texi: Document omp_pause_resource{,_all}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98216ca7-6a10-4342-b510-1f362127f619@net-b.de/mbox/"},{"id":187973,"url":"https://patchwork.plctlab.org/api/1.2/patches/187973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4131a17-61dd-4720-8667-b20ec240d1f0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-14T15:25:39","name":"[V1] rs6000: New pass for replacement of adjacent (load) lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4131a17-61dd-4720-8667-b20ec240d1f0@linux.ibm.com/mbox/"},{"id":187976,"url":"https://patchwork.plctlab.org/api/1.2/patches/187976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQn8iXTqDDMPQUN@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T18:29:06","name":"[committed] Skip several analyzer socket tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQn8iXTqDDMPQUN@mx3210.localdomain/mbox/"},{"id":187978,"url":"https://patchwork.plctlab.org/api/1.2/patches/187978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de/","msgid":"<61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de>","list_archive_url":null,"date":"2024-01-14T18:41:30","name":"[wwwdocs,avr,applied] Add AVR news for v14.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de/mbox/"},{"id":187979,"url":"https://patchwork.plctlab.org/api/1.2/patches/187979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQsIUJHRKtUzBiP@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T18:46:57","name":"[committed] Fix dg-warning on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQsIUJHRKtUzBiP@mx3210.localdomain/mbox/"},{"id":187981,"url":"https://patchwork.plctlab.org/api/1.2/patches/187981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com/","msgid":"<00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-14T19:32:18","name":"[PATCH/RFC] Add --with-dwarf4 configure option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com/mbox/"},{"id":187984,"url":"https://patchwork.plctlab.org/api/1.2/patches/187984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRFHhlb7Ncc_lTW@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T20:33:34","name":"[committed] Skip several gcc.dg/builtin-dynamic-object-size tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRFHhlb7Ncc_lTW@mx3210.localdomain/mbox/"},{"id":187985,"url":"https://patchwork.plctlab.org/api/1.2/patches/187985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRJ2yYFlRieBHVD@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T20:53:47","name":"[committed] Disable tests for strdup/strndup on __hpux__ in various builtin-object-size tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRJ2yYFlRieBHVD@mx3210.localdomain/mbox/"},{"id":187992,"url":"https://patchwork.plctlab.org/api/1.2/patches/187992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de/","msgid":"<301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de>","list_archive_url":null,"date":"2024-01-14T23:15:32","name":"libgomp.texi: Document omp_pause_resource{,_all} and omp_target_memcpy* (was: [Patch] libgomp.texi: Document omp_pause_resource{,_all})","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de/mbox/"},{"id":188009,"url":"https://patchwork.plctlab.org/api/1.2/patches/188009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115012240.3180569-1-juzhe.zhong@rivai.ai/","msgid":"<20240115012240.3180569-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T01:22:40","name":"RISC-V: Adjust loop len by costing 1 when NITER < VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115012240.3180569-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188010,"url":"https://patchwork.plctlab.org/api/1.2/patches/188010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115024953.4166360-1-juzhe.zhong@rivai.ai/","msgid":"<20240115024953.4166360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T02:49:53","name":"RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115024953.4166360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188028,"url":"https://patchwork.plctlab.org/api/1.2/patches/188028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115055420.2427723-1-syq@gcc.gnu.org/","msgid":"<20240115055420.2427723-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-15T05:54:20","name":"MIPS: avoid $gp store if global_pointer is not $gp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115055420.2427723-1-syq@gcc.gnu.org/mbox/"},{"id":188029,"url":"https://patchwork.plctlab.org/api/1.2/patches/188029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-1-yanzhang.wang@intel.com/","msgid":"<20240115060515.1603031-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2024-01-15T06:00:30","name":"[1/2] RISC-V: delete all the vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-1-yanzhang.wang@intel.com/mbox/"},{"id":188031,"url":"https://patchwork.plctlab.org/api/1.2/patches/188031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-2-yanzhang.wang@intel.com/","msgid":"<20240115060515.1603031-2-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2024-01-15T06:00:31","name":"[2/2] RISC-V: delete vector abi checking in all relevant tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-2-yanzhang.wang@intel.com/mbox/"},{"id":188037,"url":"https://patchwork.plctlab.org/api/1.2/patches/188037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115065738.869086-1-juzhe.zhong@rivai.ai/","msgid":"<20240115065738.869086-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T06:57:38","name":"[Committed] RISC-V: Fix attributes bug configuration of ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115065738.869086-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188070,"url":"https://patchwork.plctlab.org/api/1.2/patches/188070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-3-shihua@iscas.ac.cn/","msgid":"<20240115083135.2120665-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2024-01-15T08:31:34","name":"[v4,2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-3-shihua@iscas.ac.cn/mbox/"},{"id":188071,"url":"https://patchwork.plctlab.org/api/1.2/patches/188071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-4-shihua@iscas.ac.cn/","msgid":"<20240115083135.2120665-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2024-01-15T08:31:35","name":"[v4,3/3] RISC-V: Add C intrinsic for Scalar Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-4-shihua@iscas.ac.cn/mbox/"},{"id":188068,"url":"https://patchwork.plctlab.org/api/1.2/patches/188068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaTt3wGIOZSH4AaT@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-15T08:33:35","name":"lower-bitint: Fix up handling of INTEGER_CSTs in handle_operand in right shifts or comparisons [PR113370]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaTt3wGIOZSH4AaT@tucnak/mbox/"},{"id":188081,"url":"https://patchwork.plctlab.org/api/1.2/patches/188081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115092537.1706919-1-iii@linux.ibm.com/","msgid":"<20240115092537.1706919-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-15T09:22:28","name":"Mark ASM_OUTPUT_FUNCTION_LABEL ()'\''s DECL argument as used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115092537.1706919-1-iii@linux.ibm.com/mbox/"},{"id":188091,"url":"https://patchwork.plctlab.org/api/1.2/patches/188091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a4fdbe.050a0220.b4d36.7277@mx.google.com/","msgid":"<65a4fdbe.050a0220.b4d36.7277@mx.google.com>","list_archive_url":null,"date":"2024-01-15T09:41:14","name":"c++: Fix ENABLE_SCOPE_CHECKING printing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a4fdbe.050a0220.b4d36.7277@mx.google.com/mbox/"},{"id":188093,"url":"https://patchwork.plctlab.org/api/1.2/patches/188093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2200ee1-d467-41ec-b380-dd437586a6ed@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-15T09:50:03","name":"[avr,applied] Fix PR target/113156 - ICE when building libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2200ee1-d467-41ec-b380-dd437586a6ed@gjlay.de/mbox/"},{"id":188094,"url":"https://patchwork.plctlab.org/api/1.2/patches/188094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115095050.1870115-1-juzhe.zhong@rivai.ai/","msgid":"<20240115095050.1870115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T09:50:50","name":"[Committed] RISC-V: Add optimized dump check of VLS reduc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115095050.1870115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188112,"url":"https://patchwork.plctlab.org/api/1.2/patches/188112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115113240.B85A03857B8B@sourceware.org/","msgid":"<20240115113240.B85A03857B8B@sourceware.org>","list_archive_url":null,"date":"2024-01-15T11:26:48","name":"tree-optimization/113385 - wrong loop father with early exit vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115113240.B85A03857B8B@sourceware.org/mbox/"},{"id":188115,"url":"https://patchwork.plctlab.org/api/1.2/patches/188115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115114348.3149415-1-juzhe.zhong@rivai.ai/","msgid":"<20240115114348.3149415-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T11:43:48","name":"[Committed,V3] RISC-V: Adjust loop len by costing 1 when NITER < VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115114348.3149415-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188116,"url":"https://patchwork.plctlab.org/api/1.2/patches/188116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115120014.3526204-1-juzhe.zhong@rivai.ai/","msgid":"<20240115120014.3526204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T12:00:14","name":"[Committed,V2] RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115120014.3526204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188164,"url":"https://patchwork.plctlab.org/api/1.2/patches/188164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134013.752A73858C54@sourceware.org/","msgid":"<20240115134013.752A73858C54@sourceware.org>","list_archive_url":null,"date":"2024-01-15T13:34:23","name":"[1/2] rtl-optimization/113255 - base_alias_check vs. pointer difference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134013.752A73858C54@sourceware.org/mbox/"},{"id":188167,"url":"https://patchwork.plctlab.org/api/1.2/patches/188167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134112.E83AB3858418@sourceware.org/","msgid":"<20240115134112.E83AB3858418@sourceware.org>","list_archive_url":null,"date":"2024-01-15T13:34:28","name":"[2/2] find_base_value part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134112.E83AB3858418@sourceware.org/mbox/"},{"id":188226,"url":"https://patchwork.plctlab.org/api/1.2/patches/188226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2719a083-baca-3671-7a49-e7796d68adfb@redhat.com/","msgid":"<2719a083-baca-3671-7a49-e7796d68adfb@redhat.com>","list_archive_url":null,"date":"2024-01-15T15:26:48","name":"[pushed,PR113354,LRA] : Fixing LRA failure on building MIPS GCC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2719a083-baca-3671-7a49-e7796d68adfb@redhat.com/mbox/"},{"id":188240,"url":"https://patchwork.plctlab.org/api/1.2/patches/188240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e03910-0224-4717-aa4c-66466ded245a@gjlay.de/","msgid":"<59e03910-0224-4717-aa4c-66466ded245a@gjlay.de>","list_archive_url":null,"date":"2024-01-15T16:11:59","name":"[avr,applied] Document -mskip-bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e03910-0224-4717-aa4c-66466ded245a@gjlay.de/mbox/"},{"id":188257,"url":"https://patchwork.plctlab.org/api/1.2/patches/188257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaVfSC1DDWgeXD44@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-15T16:37:28","name":"[committed] testsuite: Add testcase for already fixed PR [PR113048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaVfSC1DDWgeXD44@tucnak/mbox/"},{"id":188269,"url":"https://patchwork.plctlab.org/api/1.2/patches/188269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115171829.1500537-1-jwakely@redhat.com/","msgid":"<20240115171829.1500537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-15T17:18:11","name":"[committed] libstdc++: Use variable template to fix -fconcepts-ts error [PR113366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115171829.1500537-1-jwakely@redhat.com/mbox/"},{"id":188324,"url":"https://patchwork.plctlab.org/api/1.2/patches/188324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115184920.2752407-1-ppalka@redhat.com/","msgid":"<20240115184920.2752407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-15T18:49:20","name":"libstdc++: Implement P2836R1 changes to const_iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115184920.2752407-1-ppalka@redhat.com/mbox/"},{"id":188317,"url":"https://patchwork.plctlab.org/api/1.2/patches/188317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115191841.1208268-1-hjl.tools@gmail.com/","msgid":"<20240115191841.1208268-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2024-01-15T19:18:41","name":"Remove --save-temps from some compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115191841.1208268-1-hjl.tools@gmail.com/mbox/"},{"id":188343,"url":"https://patchwork.plctlab.org/api/1.2/patches/188343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115204803.1550804-1-jwakely@redhat.com/","msgid":"<20240115204803.1550804-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-15T20:45:33","name":"[v3] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115204803.1550804-1-jwakely@redhat.com/mbox/"},{"id":188344,"url":"https://patchwork.plctlab.org/api/1.2/patches/188344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221448.498382-1-polacek@redhat.com/","msgid":"<20240115221448.498382-1-polacek@redhat.com>","list_archive_url":null,"date":"2024-01-15T22:14:48","name":"c++: ICE with auto in template arg [PR110065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221448.498382-1-polacek@redhat.com/mbox/"},{"id":188345,"url":"https://patchwork.plctlab.org/api/1.2/patches/188345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221905.3644823-1-quic_apinski@quicinc.com/","msgid":"<20240115221905.3644823-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-15T22:19:05","name":"[COMMITTED] Add myself to the DCO section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221905.3644823-1-quic_apinski@quicinc.com/mbox/"},{"id":188351,"url":"https://patchwork.plctlab.org/api/1.2/patches/188351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000540.1054362-1-dmalcolm@redhat.com/","msgid":"<20240116000540.1054362-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-16T00:05:40","name":"[pushed] analyzer: casting all zeroes should give all zeroes [PR113333]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000540.1054362-1-dmalcolm@redhat.com/mbox/"},{"id":188352,"url":"https://patchwork.plctlab.org/api/1.2/patches/188352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000550.1054419-1-dmalcolm@redhat.com/","msgid":"<20240116000550.1054419-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-16T00:05:50","name":"[pushed] analyzer: fix false +ves from -Wanalyzer-tainted-array-index with unsigned char index [PR106229]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000550.1054419-1-dmalcolm@redhat.com/mbox/"},{"id":188353,"url":"https://patchwork.plctlab.org/api/1.2/patches/188353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022001da4819$20d652b0$6282f810$@nextmovesoftware.com/","msgid":"<022001da4819$20d652b0$6282f810$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-16T01:12:50","name":"PR rtl-optimization/111267: Improved forward propagation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022001da4819$20d652b0$6282f810$@nextmovesoftware.com/mbox/"},{"id":188357,"url":"https://patchwork.plctlab.org/api/1.2/patches/188357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com/","msgid":"<4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com>","list_archive_url":null,"date":"2024-01-16T02:04:38","name":"[expand] Add const0 move checking for CLEAR_BY_PIECES optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com/mbox/"},{"id":188364,"url":"https://patchwork.plctlab.org/api/1.2/patches/188364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022320.51782-1-xujiahao@loongson.cn/","msgid":"<20240116022320.51782-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:23:20","name":"LoongArch: Split vec_selects of bottom elements into simple move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022320.51782-1-xujiahao@loongson.cn/mbox/"},{"id":188365,"url":"https://patchwork.plctlab.org/api/1.2/patches/188365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022417.51862-1-xujiahao@loongson.cn/","msgid":"<20240116022417.51862-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:24:17","name":"LoongArch: Fix pattern vec_concatz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022417.51862-1-xujiahao@loongson.cn/mbox/"},{"id":188366,"url":"https://patchwork.plctlab.org/api/1.2/patches/188366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116023231.53164-1-xujiahao@loongson.cn/","msgid":"<20240116023231.53164-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:32:31","name":"[v3] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116023231.53164-1-xujiahao@loongson.cn/mbox/"},{"id":188367,"url":"https://patchwork.plctlab.org/api/1.2/patches/188367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com/","msgid":"<53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com>","list_archive_url":null,"date":"2024-01-16T02:42:29","name":"testsuite: Fix vect_long_mult on Power [PR109705]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com/mbox/"},{"id":188368,"url":"https://patchwork.plctlab.org/api/1.2/patches/188368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116030449.379762-1-juzhe.zhong@rivai.ai/","msgid":"<20240116030449.379762-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T03:04:49","name":"RISC-V: Report Sorry when users enable RVV in big-endian mode [PR113404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116030449.379762-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188427,"url":"https://patchwork.plctlab.org/api/1.2/patches/188427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116063510.3692246-1-juzhe.zhong@rivai.ai/","msgid":"<20240116063510.3692246-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T06:35:10","name":"test regression fix: Remove xfail for variable length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116063510.3692246-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188430,"url":"https://patchwork.plctlab.org/api/1.2/patches/188430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116065216.3834327-1-juzhe.zhong@rivai.ai/","msgid":"<20240116065216.3834327-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T06:52:16","name":"test regression fix: Remove xfail for variable length targets of bb-slp-subgroups-3.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116065216.3834327-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188448,"url":"https://patchwork.plctlab.org/api/1.2/patches/188448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116080400.4059284-1-juzhe.zhong@rivai.ai/","msgid":"<20240116080400.4059284-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T08:04:00","name":"[v2] test regression fix: Add vect128 for bb-slp-43.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116080400.4059284-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188450,"url":"https://patchwork.plctlab.org/api/1.2/patches/188450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY7tdB4aoXBPNql@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-16T08:17:57","name":"cfgexpand: Workaround CSE of ADDR_EXPRs in VAR_DECL partitioning [PR113372]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY7tdB4aoXBPNql@tucnak/mbox/"},{"id":188452,"url":"https://patchwork.plctlab.org/api/1.2/patches/188452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY8/lXoOQ82jN//@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-16T08:23:26","name":"libgcc: Fix __builtin_nested_func_ptr_{created,deleted} symbol versions [PR113402]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY8/lXoOQ82jN//@tucnak/mbox/"},{"id":188485,"url":"https://patchwork.plctlab.org/api/1.2/patches/188485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d497e5d1-108b-48af-9eaf-e5bd089db414@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-16T10:42:16","name":"[avr,applied] Add support for AVR16EB, ABR16EA and AVR32EA devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d497e5d1-108b-48af-9eaf-e5bd089db414@gjlay.de/mbox/"},{"id":188494,"url":"https://patchwork.plctlab.org/api/1.2/patches/188494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116110523.2365505-1-tejas.belagod@arm.com/","msgid":"<20240116110523.2365505-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2024-01-16T11:05:23","name":"AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116110523.2365505-1-tejas.belagod@arm.com/mbox/"},{"id":188497,"url":"https://patchwork.plctlab.org/api/1.2/patches/188497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111025.14659-1-iain@sandoe.co.uk/","msgid":"<20240116111025.14659-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:10:25","name":"jit, Darwin: Implement library exports list.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111025.14659-1-iain@sandoe.co.uk/mbox/"},{"id":188500,"url":"https://patchwork.plctlab.org/api/1.2/patches/188500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111213.42899-1-iain@sandoe.co.uk/","msgid":"<20240116111213.42899-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:12:13","name":"testsuite, jit: Stabilize error output.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111213.42899-1-iain@sandoe.co.uk/mbox/"},{"id":188501,"url":"https://patchwork.plctlab.org/api/1.2/patches/188501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111335.55596-1-iain@sandoe.co.uk/","msgid":"<20240116111335.55596-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:13:35","name":"testsuite, jit, Darwin: Add libSystem to a test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111335.55596-1-iain@sandoe.co.uk/mbox/"},{"id":188503,"url":"https://patchwork.plctlab.org/api/1.2/patches/188503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2170135.irdbgypaU6@fomalhaut/","msgid":"<2170135.irdbgypaU6@fomalhaut>","list_archive_url":null,"date":"2024-01-16T11:17:56","name":"[c-family] Fix PR ada/113397","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2170135.irdbgypaU6@fomalhaut/mbox/"},{"id":188517,"url":"https://patchwork.plctlab.org/api/1.2/patches/188517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2024-01-16T12:39:27","name":"ipa: Self-DCE of uses of removed call LHSs (PR 108007)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":188530,"url":"https://patchwork.plctlab.org/api/1.2/patches/188530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116140500.43D0D3858C29@sourceware.org/","msgid":"<20240116140500.43D0D3858C29@sourceware.org>","list_archive_url":null,"date":"2024-01-16T13:59:00","name":"tree-optimization/113371 - avoid prologue peeling for peeled early exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116140500.43D0D3858C29@sourceware.org/mbox/"},{"id":188548,"url":"https://patchwork.plctlab.org/api/1.2/patches/188548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaaNfgr8IuHDy4F5@zen.kayari.org/","msgid":"","list_archive_url":null,"date":"2024-01-16T14:06:54","name":"[v4] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaaNfgr8IuHDy4F5@zen.kayari.org/mbox/"},{"id":188535,"url":"https://patchwork.plctlab.org/api/1.2/patches/188535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116141139.3477027-1-cederman@gaisler.com/","msgid":"<20240116141139.3477027-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-16T14:11:39","name":"libsanitizer: Replace memcpy with internal version in sanitizer_common","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116141139.3477027-1-cederman@gaisler.com/mbox/"},{"id":188556,"url":"https://patchwork.plctlab.org/api/1.2/patches/188556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116143818.3336042-1-ppalka@redhat.com/","msgid":"<20240116143818.3336042-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-16T14:38:18","name":"libstdc++: Implement P2540R1 change to views::cartesian_product()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116143818.3336042-1-ppalka@redhat.com/mbox/"},{"id":188540,"url":"https://patchwork.plctlab.org/api/1.2/patches/188540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116144916.8449F386180D@sourceware.org/","msgid":"<20240116144916.8449F386180D@sourceware.org>","list_archive_url":null,"date":"2024-01-16T14:43:15","name":"tree-optimization/113373 - work around early exit vect missing LC PHI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116144916.8449F386180D@sourceware.org/mbox/"},{"id":188541,"url":"https://patchwork.plctlab.org/api/1.2/patches/188541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116150016.3471-1-iain@sandoe.co.uk/","msgid":"<20240116150016.3471-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T15:00:16","name":"lto, Darwin: Fix offload section names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116150016.3471-1-iain@sandoe.co.uk/mbox/"},{"id":188551,"url":"https://patchwork.plctlab.org/api/1.2/patches/188551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr/","msgid":"<3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr>","list_archive_url":null,"date":"2024-01-16T15:25:10","name":"Spec Files: remove documentation about obsolete spec strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr/mbox/"},{"id":188559,"url":"https://patchwork.plctlab.org/api/1.2/patches/188559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116162552.461635-2-mary.bennett@embecosm.com/","msgid":"<20240116162552.461635-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:25:52","name":"[v2,1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116162552.461635-2-mary.bennett@embecosm.com/mbox/"},{"id":188565,"url":"https://patchwork.plctlab.org/api/1.2/patches/188565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-2-mary.bennett@embecosm.com/","msgid":"<20240116163529.623568-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:35:28","name":"[v2,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-2-mary.bennett@embecosm.com/mbox/"},{"id":188564,"url":"https://patchwork.plctlab.org/api/1.2/patches/188564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-3-mary.bennett@embecosm.com/","msgid":"<20240116163529.623568-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:35:29","name":"[v2,2/2] RISC-V: Fix XCValu test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-3-mary.bennett@embecosm.com/mbox/"},{"id":188572,"url":"https://patchwork.plctlab.org/api/1.2/patches/188572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-2-mary.bennett@embecosm.com/","msgid":"<20240116171351.913881-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T17:13:50","name":"[v3,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-2-mary.bennett@embecosm.com/mbox/"},{"id":188571,"url":"https://patchwork.plctlab.org/api/1.2/patches/188571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-3-mary.bennett@embecosm.com/","msgid":"<20240116171351.913881-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T17:13:51","name":"[v3,2/2] RISC-V: Fix XCValu test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-3-mary.bennett@embecosm.com/mbox/"},{"id":188574,"url":"https://patchwork.plctlab.org/api/1.2/patches/188574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826A88BC9275089F005A3D83732@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2024-01-16T17:23:17","name":"AArch64: Add -mcpu=cobalt-100","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826A88BC9275089F005A3D83732@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":188590,"url":"https://patchwork.plctlab.org/api/1.2/patches/188590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zaba3-29rbMcC2pR@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T19:37:03","name":"[committed] xfail all scan-tree-dump-times checks on hppa*64*-*-* in sra-17.c and sra-18.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zaba3-29rbMcC2pR@mx3210.localdomain/mbox/"},{"id":188592,"url":"https://patchwork.plctlab.org/api/1.2/patches/188592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZabkNqYZVt-rC5ng@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T20:16:54","name":"[committed] Skip various cmp-mem-const tests on lp64 hppa*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZabkNqYZVt-rC5ng@mx3210.localdomain/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/mbox/"}]' + bundle_name_list='gcc-patch_2022-10 gcc-patch_2022-09 gcc-patch_2022-11 gcc-patch_2022-12 gcc-patch_2023-01 gcc-patch_2023-02 gcc-patch_2023-03 gcc-patch_2023-04 gcc-patch_2023-05 gcc-patch_2023-06 gcc-patch_2023-07 gcc-patch_2023-08 gcc-patch_2023-09 gcc-patch_2023-10 gcc-patch_2023-11 gcc-patch_2023-12 gcc-patch_2024-01' + [[ gcc-patch_2022-10 gcc-patch_2022-09 gcc-patch_2022-11 gcc-patch_2022-12 gcc-patch_2023-01 gcc-patch_2023-02 gcc-patch_2023-03 gcc-patch_2023-04 gcc-patch_2023-05 gcc-patch_2023-06 gcc-patch_2023-07 gcc-patch_2023-08 gcc-patch_2023-09 gcc-patch_2023-10 gcc-patch_2023-11 gcc-patch_2023-12 gcc-patch_2024-01 =~ 2024-01 ]] ++ jq -rc --arg bundle_name gcc-patch_2024-01 '.[] | select(.name==$bundle_name) | (.id|tostring)' ++ echo '[{"id":4,"url":"https://patchwork.plctlab.org/api/1.2/bundles/4/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-10/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-10","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":1618,"url":"https://patchwork.plctlab.org/api/1.2/patches/1618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001005720.28208-1-palmer@rivosinc.com/","msgid":"<20221001005720.28208-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-01T00:57:20","name":"Fix the build of record_edge_info()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001005720.28208-1-palmer@rivosinc.com/mbox/"},{"id":1621,"url":"https://patchwork.plctlab.org/api/1.2/patches/1621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041443.2211752-1-jason@redhat.com/","msgid":"<20221001041443.2211752-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-01T04:14:43","name":"[pushed] c++: cast split_nonconstant_init return val to void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041443.2211752-1-jason@redhat.com/mbox/"},{"id":1622,"url":"https://patchwork.plctlab.org/api/1.2/patches/1622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041502.2211988-1-jason@redhat.com/","msgid":"<20221001041502.2211988-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-01T04:15:02","name":"[pushed] c++: loop through array CONSTRUCTOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001041502.2211988-1-jason@redhat.com/mbox/"},{"id":1624,"url":"https://patchwork.plctlab.org/api/1.2/patches/1624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com/","msgid":"<36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com>","list_archive_url":null,"date":"2022-10-01T04:52:12","name":"[committed] Improve Z flag handling on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36f8c642-9cc5-9fb5-5e76-e01a001f57f7@gmail.com/mbox/"},{"id":1628,"url":"https://patchwork.plctlab.org/api/1.2/patches/1628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001075659.63410-1-julian@codesourcery.com/","msgid":"<20221001075659.63410-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-01T07:56:59","name":"OpenACC: Fix struct-component-kind-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001075659.63410-1-julian@codesourcery.com/mbox/"},{"id":1629,"url":"https://patchwork.plctlab.org/api/1.2/patches/1629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com/","msgid":"<0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com>","list_archive_url":null,"date":"2022-10-01T18:34:45","name":"Adding a new thread model to GCC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f1f223a-3756-1da3-bd1d-b87edd34e1f9@126.com/mbox/"},{"id":1630,"url":"https://patchwork.plctlab.org/api/1.2/patches/1630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001184004.3599748-1-arsen@aarsen.me/","msgid":"<20221001184004.3599748-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-01T18:40:05","name":"libstdc++: Use ///< for inline documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221001184004.3599748-1-arsen@aarsen.me/mbox/"},{"id":1632,"url":"https://patchwork.plctlab.org/api/1.2/patches/1632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzl3afY3XTnM7sQ+@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-02T11:35:05","name":"c++: Disallow jumps into statement expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzl3afY3XTnM7sQ+@tucnak/mbox/"},{"id":1633,"url":"https://patchwork.plctlab.org/api/1.2/patches/1633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzmjs5JhXasdpTx4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-02T14:44:03","name":"[committed] tree-cfg: Fix a verification diagnostic typo [PR107121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzmjs5JhXasdpTx4@tucnak/mbox/"},{"id":1634,"url":"https://patchwork.plctlab.org/api/1.2/patches/1634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd6be261-fe0d-5b35-cffc-3eafded00bec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-02T17:47:18","name":"Fortran: Add OpenMP'\''s assume(s) directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd6be261-fe0d-5b35-cffc-3eafded00bec@codesourcery.com/mbox/"},{"id":1636,"url":"https://patchwork.plctlab.org/api/1.2/patches/1636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5bb46ca-bb5f-f177-5082-b16f38004ecb@netcologne.de/","msgid":"","list_archive_url":null,"date":"2022-10-02T20:07:34","name":"[RFC.,Fortran] Some clobbering for INTENT(OUT) arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5bb46ca-bb5f-f177-5082-b16f38004ecb@netcologne.de/mbox/"},{"id":1639,"url":"https://patchwork.plctlab.org/api/1.2/patches/1639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542EFA4C26432C5D92ADA04915B9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T06:08:37","name":"Set discriminators for call stmts on the same line within the same basic block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542EFA4C26432C5D92ADA04915B9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1645,"url":"https://patchwork.plctlab.org/api/1.2/patches/1645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003104351.408835-1-christophe.lyon@arm.com/","msgid":"<20221003104351.408835-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-10-03T10:43:51","name":"arm: Add missing early clobber to MVE vrev64q_m patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003104351.408835-1-christophe.lyon@arm.com/mbox/"},{"id":1650,"url":"https://patchwork.plctlab.org/api/1.2/patches/1650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-1-aldyh@redhat.com/","msgid":"<20221003110815.1075975-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:12","name":"[COMMITTED] Do not compare incompatible ranges in ipa-prop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-1-aldyh@redhat.com/mbox/"},{"id":1653,"url":"https://patchwork.plctlab.org/api/1.2/patches/1653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-2-aldyh@redhat.com/","msgid":"<20221003110815.1075975-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:13","name":"[COMMITTED] Do not compare nonzero masks for varying.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-2-aldyh@redhat.com/mbox/"},{"id":1651,"url":"https://patchwork.plctlab.org/api/1.2/patches/1651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-3-aldyh@redhat.com/","msgid":"<20221003110815.1075975-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:14","name":"[COMMITTED] Avoid comparing ranges when sub-ranges is 0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-3-aldyh@redhat.com/mbox/"},{"id":1652,"url":"https://patchwork.plctlab.org/api/1.2/patches/1652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-4-aldyh@redhat.com/","msgid":"<20221003110815.1075975-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:08:15","name":"[COMMITTED] Do not pessimize range in set_nonzero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003110815.1075975-4-aldyh@redhat.com/mbox/"},{"id":1654,"url":"https://patchwork.plctlab.org/api/1.2/patches/1654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003114641.367692-1-jwakely@redhat.com/","msgid":"<20221003114641.367692-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-03T11:46:41","name":"[committed] libstdc++: Fix tests broken by C++23 P2266R3 \"Simpler implicit move\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003114641.367692-1-jwakely@redhat.com/mbox/"},{"id":1655,"url":"https://patchwork.plctlab.org/api/1.2/patches/1655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddy1txazmv.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-10-03T11:57:12","name":"[COMMITTED] libsanitizer: Fix Solaris 11.3 compilation of sanitizer_procmaps_solaris.cpp [PR105531]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddy1txazmv.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":1657,"url":"https://patchwork.plctlab.org/api/1.2/patches/1657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210031311260.789254@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-03T13:12:04","name":"[committed] c: Adjust LDBL_EPSILON for C2x for IBM long double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210031311260.789254@digraph.polyomino.org.uk/mbox/"},{"id":1658,"url":"https://patchwork.plctlab.org/api/1.2/patches/1658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39a8cab-7d04-ddc2-0e46-540325c6e84e@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T14:14:22","name":"PR tree-optimization/107109 - Don'\''t process undefined range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39a8cab-7d04-ddc2-0e46-540325c6e84e@redhat.com/mbox/"},{"id":1661,"url":"https://patchwork.plctlab.org/api/1.2/patches/1661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzs2gj1TqcWkldfN@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-03T19:22:42","name":"c++, c, v2: Implement C++23 P1774R8 - Portable assumptions [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzs2gj1TqcWkldfN@tucnak/mbox/"},{"id":1662,"url":"https://patchwork.plctlab.org/api/1.2/patches/1662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003203543.154431-1-arsen@aarsen.me/","msgid":"<20221003203543.154431-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-03T20:35:44","name":"elf: ELF toolchain --without-{headers, newlib} should provide stdint.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003203543.154431-1-arsen@aarsen.me/mbox/"},{"id":1663,"url":"https://patchwork.plctlab.org/api/1.2/patches/1663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003210247.457336-1-jwakely@redhat.com/","msgid":"<20221003210247.457336-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-03T21:02:47","name":"[committed] libstdc++: Update status docs for compare_exchange padding bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003210247.457336-1-jwakely@redhat.com/mbox/"},{"id":1664,"url":"https://patchwork.plctlab.org/api/1.2/patches/1664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212402.3337669-1-philipp.tomsich@vrull.eu/","msgid":"<20221003212402.3337669-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-03T21:24:02","name":"aarch64: update Ampere-1 core definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212402.3337669-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1665,"url":"https://patchwork.plctlab.org/api/1.2/patches/1665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212419.3337714-1-philipp.tomsich@vrull.eu/","msgid":"<20221003212419.3337714-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-03T21:24:19","name":"aarch64: fix off-by-one in reading cpuinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221003212419.3337714-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1666,"url":"https://patchwork.plctlab.org/api/1.2/patches/1666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ead367999f6136b51ae6206184a1193864b234aa.1664836268.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-03T22:32:14","name":"diagnostics: Add test for fixed _Pragma location issue [PR91669]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ead367999f6136b51ae6206184a1193864b234aa.1664836268.git.lhyatt@gmail.com/mbox/"},{"id":1667,"url":"https://patchwork.plctlab.org/api/1.2/patches/1667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004004216.1994023-1-ppalka@redhat.com/","msgid":"<20221004004216.1994023-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T00:42:16","name":"c++: install cp-trait.def as part of plugin headers [PR107136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004004216.1994023-1-ppalka@redhat.com/mbox/"},{"id":1668,"url":"https://patchwork.plctlab.org/api/1.2/patches/1668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004011115.2009591-1-ppalka@redhat.com/","msgid":"<20221004011115.2009591-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T01:11:15","name":"libstdc++: Implement ranges::join_with_view from P2441R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004011115.2009591-1-ppalka@redhat.com/mbox/"},{"id":1669,"url":"https://patchwork.plctlab.org/api/1.2/patches/1669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004042831.1419926-1-aldyh@redhat.com/","msgid":"<20221004042831.1419926-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T04:28:31","name":"[COMMITTED,PR107130] range-ops: Separate out ffs and popcount optimizations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004042831.1419926-1-aldyh@redhat.com/mbox/"},{"id":1670,"url":"https://patchwork.plctlab.org/api/1.2/patches/1670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004073530.1461390-1-aldyh@redhat.com/","msgid":"<20221004073530.1461390-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T07:35:30","name":"[COMMITTED] Convert nonzero mask in irange to wide_int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004073530.1461390-1-aldyh@redhat.com/mbox/"},{"id":1674,"url":"https://patchwork.plctlab.org/api/1.2/patches/1674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv3kyZFBYlJpeyL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-04T09:06:27","name":"middle-end, c++, i386, libgcc: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv3kyZFBYlJpeyL@tucnak/mbox/"},{"id":1675,"url":"https://patchwork.plctlab.org/api/1.2/patches/1675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv4q6gMMgJnAMQj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-04T09:11:07","name":"attribs: Add missing auto_diagnostic_group 3 times","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzv4q6gMMgJnAMQj@tucnak/mbox/"},{"id":1680,"url":"https://patchwork.plctlab.org/api/1.2/patches/1680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004112849.27678-1-stefansf@linux.ibm.com/","msgid":"<20221004112849.27678-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2022-10-04T11:28:50","name":"cselib: Skip BImode while keeping track of subvalue relations [PR107088]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004112849.27678-1-stefansf@linux.ibm.com/mbox/"},{"id":1685,"url":"https://patchwork.plctlab.org/api/1.2/patches/1685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-1-jwakely@redhat.com/","msgid":"<20221004141138.530214-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:35","name":"[committed] libstdc++: Define functions for freestanding [PR107135]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-1-jwakely@redhat.com/mbox/"},{"id":1683,"url":"https://patchwork.plctlab.org/api/1.2/patches/1683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-2-jwakely@redhat.com/","msgid":"<20221004141138.530214-2-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:36","name":"[committed] libstdc++: Make work freestanding [PR107134]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-2-jwakely@redhat.com/mbox/"},{"id":1682,"url":"https://patchwork.plctlab.org/api/1.2/patches/1682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-3-jwakely@redhat.com/","msgid":"<20221004141138.530214-3-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:37","name":"[committed] libstdc++: Enable std::hash> [PR107139]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-3-jwakely@redhat.com/mbox/"},{"id":1684,"url":"https://patchwork.plctlab.org/api/1.2/patches/1684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-4-jwakely@redhat.com/","msgid":"<20221004141138.530214-4-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T14:11:38","name":"[committed] libstdc++: Disable test for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004141138.530214-4-jwakely@redhat.com/mbox/"},{"id":1686,"url":"https://patchwork.plctlab.org/api/1.2/patches/1686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004151200.1275636-2-ben.boeckel@kitware.com/","msgid":"<20221004151200.1275636-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-04T15:12:00","name":"[RESEND,1/1] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004151200.1275636-2-ben.boeckel@kitware.com/mbox/"},{"id":1687,"url":"https://patchwork.plctlab.org/api/1.2/patches/1687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152132.GA1906@delia.home/","msgid":"<20221004152132.GA1906@delia.home>","list_archive_url":null,"date":"2022-10-04T15:21:33","name":"Add --without-makeinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152132.GA1906@delia.home/mbox/"},{"id":1688,"url":"https://patchwork.plctlab.org/api/1.2/patches/1688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-2-qing.zhao@oracle.com/","msgid":"<20221004152154.1665626-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-04T15:21:52","name":"[GCC13,V5,1/2] Add a new option -fstrict-flex-arrays[=n] and new attribute strict_flex_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-2-qing.zhao@oracle.com/mbox/"},{"id":1689,"url":"https://patchwork.plctlab.org/api/1.2/patches/1689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-3-qing.zhao@oracle.com/","msgid":"<20221004152154.1665626-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-04T15:21:53","name":"[GCC13,V5,2/2] Use array_at_struct_end_p in __builtin_object_size [PR101836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004152154.1665626-3-qing.zhao@oracle.com/mbox/"},{"id":1692,"url":"https://patchwork.plctlab.org/api/1.2/patches/1692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0znk0h0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T16:38:51","name":"aarch64: Define __ARM_FEATURE_RCPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0znk0h0.fsf@arm.com/mbox/"},{"id":1693,"url":"https://patchwork.plctlab.org/api/1.2/patches/1693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164624.558722-1-jwakely@redhat.com/","msgid":"<20221004164624.558722-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:24","name":"[committed] libstdc++: Refactor seed sequence constraints in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164624.558722-1-jwakely@redhat.com/mbox/"},{"id":1694,"url":"https://patchwork.plctlab.org/api/1.2/patches/1694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164631.558750-1-jwakely@redhat.com/","msgid":"<20221004164631.558750-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:31","name":"[committed] libstdc++: Use new built-ins __remove_cv, __remove_reference etc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164631.558750-1-jwakely@redhat.com/mbox/"},{"id":1695,"url":"https://patchwork.plctlab.org/api/1.2/patches/1695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164637.558771-1-jwakely@redhat.com/","msgid":"<20221004164637.558771-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:46:37","name":"[committed] libstdc++: Fix test FAIL for old std::string ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004164637.558771-1-jwakely@redhat.com/mbox/"},{"id":1696,"url":"https://patchwork.plctlab.org/api/1.2/patches/1696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004165109.559028-1-jwakely@redhat.com/","msgid":"<20221004165109.559028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-04T16:51:09","name":"[RFC] libstdc++: Generate error_constants.h from [PR104883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004165109.559028-1-jwakely@redhat.com/mbox/"},{"id":1697,"url":"https://patchwork.plctlab.org/api/1.2/patches/1697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFFmr-7NZef+QOtv2rzcvu4Sc66sTsikGf_gju_fFgGGwi0m_w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T17:06:21","name":"improved const shifts for AVR targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFFmr-7NZef+QOtv2rzcvu4Sc66sTsikGf_gju_fFgGGwi0m_w@mail.gmail.com/mbox/"},{"id":1698,"url":"https://patchwork.plctlab.org/api/1.2/patches/1698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901CEA2D310CDB76A47600C835A9@AS4PR08MB7901.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T17:22:35","name":"[AArch64] Improve immediate expansion [PR106583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901CEA2D310CDB76A47600C835A9@AS4PR08MB7901.eurprd08.prod.outlook.com/mbox/"},{"id":1699,"url":"https://patchwork.plctlab.org/api/1.2/patches/1699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004173631.2958133-1-ppalka@redhat.com/","msgid":"<20221004173631.2958133-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-04T17:36:31","name":"c++ modules: lazy loading from within template [PR99377]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004173631.2958133-1-ppalka@redhat.com/mbox/"},{"id":1700,"url":"https://patchwork.plctlab.org/api/1.2/patches/1700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004175221.1493497-1-aldyh@redhat.com/","msgid":"<20221004175221.1493497-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-04T17:52:21","name":"[COMMITTED] Remove assert from set_nonzero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004175221.1493497-1-aldyh@redhat.com/mbox/"},{"id":1701,"url":"https://patchwork.plctlab.org/api/1.2/patches/1701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6d934a50-8304-4704-bce4-36a2afbc687e-1664911631690@3c-app-gmx-bs14/","msgid":"","list_archive_url":null,"date":"2022-10-04T19:27:11","name":"Fortran: reject procedures and procedure pointers as output item [PR107074]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6d934a50-8304-4704-bce4-36a2afbc687e-1664911631690@3c-app-gmx-bs14/mbox/"},{"id":1703,"url":"https://patchwork.plctlab.org/api/1.2/patches/1703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-79a6df2f-08a1-4f6d-9431-70f884d1c05c-1664918395982@3c-app-gmx-bs23/","msgid":"","list_archive_url":null,"date":"2022-10-04T21:19:56","name":"Fortran: error recovery for invalid types in array constructors [PR107000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-79a6df2f-08a1-4f6d-9431-70f884d1c05c-1664918395982@3c-app-gmx-bs23/mbox/"},{"id":1704,"url":"https://patchwork.plctlab.org/api/1.2/patches/1704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004225229.3104706-1-jason@redhat.com/","msgid":"<20221004225229.3104706-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-04T22:52:29","name":"[pushed] c++: fix debug info for array temporary [PR107154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221004225229.3104706-1-jason@redhat.com/mbox/"},{"id":1705,"url":"https://patchwork.plctlab.org/api/1.2/patches/1705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzy8bdzUiCfLImkn@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-04T23:06:21","name":"[v2] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzy8bdzUiCfLImkn@redhat.com/mbox/"},{"id":1706,"url":"https://patchwork.plctlab.org/api/1.2/patches/1706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002418.710712-1-dmalcolm@redhat.com/","msgid":"<20221005002418.710712-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:18","name":"[committed] analyzer: widening_svalues take a function_point rather than a program_point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002418.710712-1-dmalcolm@redhat.com/mbox/"},{"id":1707,"url":"https://patchwork.plctlab.org/api/1.2/patches/1707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002423.710736-1-dmalcolm@redhat.com/","msgid":"<20221005002423.710736-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:23","name":"[committed] analyzer: fold -(-(VAL)) to VAL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002423.710736-1-dmalcolm@redhat.com/mbox/"},{"id":1709,"url":"https://patchwork.plctlab.org/api/1.2/patches/1709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002427.710760-1-dmalcolm@redhat.com/","msgid":"<20221005002427.710760-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:27","name":"[committed] analyzer: move region_model_manager decl to its own header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002427.710760-1-dmalcolm@redhat.com/mbox/"},{"id":1708,"url":"https://patchwork.plctlab.org/api/1.2/patches/1708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002431.710784-1-dmalcolm@redhat.com/","msgid":"<20221005002431.710784-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T00:24:31","name":"[committed] analyzer: revamp side-effects of call summaries [PR107072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005002431.710784-1-dmalcolm@redhat.com/mbox/"},{"id":1720,"url":"https://patchwork.plctlab.org/api/1.2/patches/1720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1UiUPXZGIGXRJV@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-05T09:55:21","name":"c++, c, v3: Implement C++23 P1774R8 - Portable assumptions [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1UiUPXZGIGXRJV@tucnak/mbox/"},{"id":1721,"url":"https://patchwork.plctlab.org/api/1.2/patches/1721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz/","msgid":"<52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz>","list_archive_url":null,"date":"2022-10-05T10:15:33","name":"[pushed] testsuite: mark a test with xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52735d80-c108-6027-b6a8-11266ab92d5a@suse.cz/mbox/"},{"id":1722,"url":"https://patchwork.plctlab.org/api/1.2/patches/1722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz/","msgid":"<7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz>","list_archive_url":null,"date":"2022-10-05T11:35:10","name":"[pushed] analyzer: remove unused variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f5424c9-23b0-823e-9a1f-7b4da7d8ac10@suse.cz/mbox/"},{"id":1723,"url":"https://patchwork.plctlab.org/api/1.2/patches/1723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df64a08d-7bbf-8270-b922-bf7016f874de@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-05T11:41:37","name":"IPA: support -flto + -flive-patching=inline-clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df64a08d-7bbf-8270-b922-bf7016f874de@suse.cz/mbox/"},{"id":1724,"url":"https://patchwork.plctlab.org/api/1.2/patches/1724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6876baac-15f9-0450-72ec-1f0b85348392@suse.cz/","msgid":"<6876baac-15f9-0450-72ec-1f0b85348392@suse.cz>","list_archive_url":null,"date":"2022-10-05T11:42:37","name":"c: support attribs starting with '\''_'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6876baac-15f9-0450-72ec-1f0b85348392@suse.cz/mbox/"},{"id":1725,"url":"https://patchwork.plctlab.org/api/1.2/patches/1725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eea8eca0-6b5d-c5fa-e5bd-aa5409bd78c6@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-05T11:49:40","name":"c: support attribs starting with '\''_'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eea8eca0-6b5d-c5fa-e5bd-aa5409bd78c6@suse.cz/mbox/"},{"id":1728,"url":"https://patchwork.plctlab.org/api/1.2/patches/1728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-05T12:04:02","name":"[1/2] gcov: test switch/break line counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-2-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1726,"url":"https://patchwork.plctlab.org/api/1.2/patches/1726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-05T12:04:03","name":"[2/2] Split edge when edge locus and dest don'\''t match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005120403.68935-3-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1727,"url":"https://patchwork.plctlab.org/api/1.2/patches/1727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1y4yx9FYrPBeEw@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-05T12:04:51","name":"c++: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz1y4yx9FYrPBeEw@tucnak/mbox/"},{"id":1729,"url":"https://patchwork.plctlab.org/api/1.2/patches/1729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122154.1579701-1-aldyh@redhat.com/","msgid":"<20221005122154.1579701-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:21:53","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Pass nonzero masks through cast.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122154.1579701-1-aldyh@redhat.com/mbox/"},{"id":1730,"url":"https://patchwork.plctlab.org/api/1.2/patches/1730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-1-aldyh@redhat.com/","msgid":"<20221005122236.1579762-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:22:35","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Pass nonzero masks through cast.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-1-aldyh@redhat.com/mbox/"},{"id":1731,"url":"https://patchwork.plctlab.org/api/1.2/patches/1731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-2-aldyh@redhat.com/","msgid":"<20221005122236.1579762-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:22:36","name":"[COMMITTED,PR,tree-optimization/107052] range-ops: Take into account nonzero mask in popcount.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005122236.1579762-2-aldyh@redhat.com/mbox/"},{"id":1732,"url":"https://patchwork.plctlab.org/api/1.2/patches/1732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901314F7E77FB81A079AE5F835D9@AS4PR08MB7901.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-05T12:30:22","name":"[AArch64] Improve bit tests [PR105773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS4PR08MB7901314F7E77FB81A079AE5F835D9@AS4PR08MB7901.eurprd08.prod.outlook.com/mbox/"},{"id":1733,"url":"https://patchwork.plctlab.org/api/1.2/patches/1733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005124628.701564-1-jwakely@redhat.com/","msgid":"<20221005124628.701564-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-05T12:46:28","name":"[committed] libstdc++: Guard use of new built-in with __has_builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005124628.701564-1-jwakely@redhat.com/mbox/"},{"id":1734,"url":"https://patchwork.plctlab.org/api/1.2/patches/1734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005131611.703378-1-jwakely@redhat.com/","msgid":"<20221005131611.703378-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-05T13:16:11","name":"[committed] libtdc++: Regenerate Makefile.in after freestanding header changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005131611.703378-1-jwakely@redhat.com/mbox/"},{"id":1735,"url":"https://patchwork.plctlab.org/api/1.2/patches/1735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005134932.1584257-1-aldyh@redhat.com/","msgid":"<20221005134932.1584257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-05T13:49:32","name":"[COMMITTED] range-op: Keep nonzero mask up to date with truncating casts.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005134932.1584257-1-aldyh@redhat.com/mbox/"},{"id":1736,"url":"https://patchwork.plctlab.org/api/1.2/patches/1736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005141023.3206443-1-jason@redhat.com/","msgid":"<20221005141023.3206443-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-05T14:10:23","name":"[pushed] c++: lvalue_kind tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005141023.3206443-1-jason@redhat.com/mbox/"},{"id":1737,"url":"https://patchwork.plctlab.org/api/1.2/patches/1737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005145639.273140-1-torbjorn.svensson@foss.st.com/","msgid":"<20221005145639.273140-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-05T14:56:39","name":"[v2] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005145639.273140-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1738,"url":"https://patchwork.plctlab.org/api/1.2/patches/1738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4094054.1IzOArtZ34@fomalhaut/","msgid":"<4094054.1IzOArtZ34@fomalhaut>","list_archive_url":null,"date":"2022-10-05T15:36:48","name":"Fix wrong code generated by unroll-and-jam pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4094054.1IzOArtZ34@fomalhaut/mbox/"},{"id":1739,"url":"https://patchwork.plctlab.org/api/1.2/patches/1739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175630.748655-1-dmalcolm@redhat.com/","msgid":"<20221005175630.748655-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T17:56:30","name":"[committed] analyzer: fix ICEs seen with call summaries on PR 107060","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175630.748655-1-dmalcolm@redhat.com/mbox/"},{"id":1740,"url":"https://patchwork.plctlab.org/api/1.2/patches/1740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175634.748680-1-dmalcolm@redhat.com/","msgid":"<20221005175634.748680-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T17:56:34","name":"[committed] analyzer: simplify some includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005175634.748680-1-dmalcolm@redhat.com/mbox/"},{"id":1741,"url":"https://patchwork.plctlab.org/api/1.2/patches/1741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005181127.749161-1-dmalcolm@redhat.com/","msgid":"<20221005181127.749161-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-05T18:11:27","name":"[committed] analyzer: add regression test for PR 107158","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005181127.749161-1-dmalcolm@redhat.com/mbox/"},{"id":1742,"url":"https://patchwork.plctlab.org/api/1.2/patches/1742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz/","msgid":"<29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz>","list_archive_url":null,"date":"2022-10-05T18:41:48","name":"[pushed] contrib: run fetch before pushing Daily bump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29487d53-ef09-764b-cbd0-0fa09f459fc3@suse.cz/mbox/"},{"id":1744,"url":"https://patchwork.plctlab.org/api/1.2/patches/1744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org/","msgid":"<19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2022-10-05T19:08:39","name":"[1/3] rs6000: Remove \"wD\" from *vsx_extract__store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1743,"url":"https://patchwork.plctlab.org/api/1.2/patches/1743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe062c35be96fbcac92681f9e986745f4be78b6f.1664994970.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-05T19:08:40","name":"[2/3] rs6000: Rework vsx_extract_","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe062c35be96fbcac92681f9e986745f4be78b6f.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1745,"url":"https://patchwork.plctlab.org/api/1.2/patches/1745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org/","msgid":"<0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2022-10-05T19:08:41","name":"[3/3] rs6000: Remove the wD constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org/mbox/"},{"id":1747,"url":"https://patchwork.plctlab.org/api/1.2/patches/1747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-2-qing.zhao@oracle.com/","msgid":"<20221005191320.2087486-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-05T19:13:19","name":"[GCC13,V6,1/2] Add a new option -fstrict-flex-arrays[=n] and new attribute strict_flex_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-2-qing.zhao@oracle.com/mbox/"},{"id":1746,"url":"https://patchwork.plctlab.org/api/1.2/patches/1746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-3-qing.zhao@oracle.com/","msgid":"<20221005191320.2087486-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-10-05T19:13:20","name":"[GCC13,V6,2/2] Use array_at_struct_end_p in __builtin_object_size [PR101836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005191320.2087486-3-qing.zhao@oracle.com/mbox/"},{"id":1748,"url":"https://patchwork.plctlab.org/api/1.2/patches/1748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005212744.640285-1-polacek@redhat.com/","msgid":"<20221005212744.640285-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-05T21:27:44","name":"c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221005212744.640285-1-polacek@redhat.com/mbox/"},{"id":1749,"url":"https://patchwork.plctlab.org/api/1.2/patches/1749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210060120550.917581@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-06T01:21:22","name":"c: C2x typeof","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210060120550.917581@digraph.polyomino.org.uk/mbox/"},{"id":1750,"url":"https://patchwork.plctlab.org/api/1.2/patches/1750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006020226.3629040-1-ppalka@redhat.com/","msgid":"<20221006020226.3629040-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-06T02:02:26","name":"c++: remove optimize_specialization_lookup_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006020226.3629040-1-ppalka@redhat.com/mbox/"},{"id":1753,"url":"https://patchwork.plctlab.org/api/1.2/patches/1753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-1-aldyh@redhat.com/","msgid":"<20221006062318.1709996-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:16","name":"[COMMITTED] Do not double print INF and NAN in frange pretty printer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-1-aldyh@redhat.com/mbox/"},{"id":1755,"url":"https://patchwork.plctlab.org/api/1.2/patches/1755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-2-aldyh@redhat.com/","msgid":"<20221006062318.1709996-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:17","name":"[COMMITTED] Do not check finite_operands_p twice in range-ops-float.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-2-aldyh@redhat.com/mbox/"},{"id":1754,"url":"https://patchwork.plctlab.org/api/1.2/patches/1754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-3-aldyh@redhat.com/","msgid":"<20221006062318.1709996-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T06:23:18","name":"[COMMITTED] Setting explicit NANs sets UNDEFINED for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006062318.1709996-3-aldyh@redhat.com/mbox/"},{"id":1756,"url":"https://patchwork.plctlab.org/api/1.2/patches/1756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz6VAi7u7pMLbb4K@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T08:42:42","name":"[committed] openmp: Map holds clause to IFN_ASSUME for C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz6VAi7u7pMLbb4K@tucnak/mbox/"},{"id":1757,"url":"https://patchwork.plctlab.org/api/1.2/patches/1757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006091056.1480675-1-claziss@gmail.com/","msgid":"<20221006091056.1480675-1-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-06T09:10:56","name":"[committed] arc: Remove max-page-size and common-page-size forced setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006091056.1480675-1-claziss@gmail.com/mbox/"},{"id":1758,"url":"https://patchwork.plctlab.org/api/1.2/patches/1758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz/","msgid":"<045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz>","list_archive_url":null,"date":"2022-10-06T09:16:17","name":"[pushed] git_update_version: add robust logging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/045f9965-d9fd-2c0e-7f14-0f0c1027d633@suse.cz/mbox/"},{"id":1759,"url":"https://patchwork.plctlab.org/api/1.2/patches/1759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092544.260196-1-poulhies@adacore.com/","msgid":"<20221006092544.260196-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:25:44","name":"[COMMITED] ada: Fix spurious warning on unreferenced refinement constituents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092544.260196-1-poulhies@adacore.com/mbox/"},{"id":1760,"url":"https://patchwork.plctlab.org/api/1.2/patches/1760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092643.260420-1-poulhies@adacore.com/","msgid":"<20221006092643.260420-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:26:43","name":"[COMMITED] ada: Disable slice-of-component optimization in some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092643.260420-1-poulhies@adacore.com/mbox/"},{"id":1761,"url":"https://patchwork.plctlab.org/api/1.2/patches/1761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092734.260579-1-poulhies@adacore.com/","msgid":"<20221006092734.260579-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:27:34","name":"[COMMITED] ada: Do not issue compiler warnings in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092734.260579-1-poulhies@adacore.com/mbox/"},{"id":1762,"url":"https://patchwork.plctlab.org/api/1.2/patches/1762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092810.260715-1-poulhies@adacore.com/","msgid":"<20221006092810.260715-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:28:10","name":"[COMMITED] ada: Clean up slice-of-component optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092810.260715-1-poulhies@adacore.com/mbox/"},{"id":1763,"url":"https://patchwork.plctlab.org/api/1.2/patches/1763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092840.607374-1-philipp.tomsich@vrull.eu/","msgid":"<20221006092840.607374-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-06T09:28:39","name":"[v2] aarch64: fix off-by-one in reading cpuinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092840.607374-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1764,"url":"https://patchwork.plctlab.org/api/1.2/patches/1764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092847.260877-1-poulhies@adacore.com/","msgid":"<20221006092847.260877-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:28:47","name":"[COMMITED] ada: Accessibility error incorrectly flagged on call within Pre'\''Class expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092847.260877-1-poulhies@adacore.com/mbox/"},{"id":1765,"url":"https://patchwork.plctlab.org/api/1.2/patches/1765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092929.261152-1-poulhies@adacore.com/","msgid":"<20221006092929.261152-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:29","name":"[COMMITED] ada: Incorrect inferences drawn from if/elsif/while conditions with -gnatVo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092929.261152-1-poulhies@adacore.com/mbox/"},{"id":1767,"url":"https://patchwork.plctlab.org/api/1.2/patches/1767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092943.261301-1-poulhies@adacore.com/","msgid":"<20221006092943.261301-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:43","name":"[COMMITED] ada: Add C declarations for Storage Model support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092943.261301-1-poulhies@adacore.com/mbox/"},{"id":1768,"url":"https://patchwork.plctlab.org/api/1.2/patches/1768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.607412-1-philipp.tomsich@vrull.eu/","msgid":"<20221006092951.607412-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-10-06T09:29:51","name":"[v2] aarch64: update Ampere-1 core definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.607412-1-philipp.tomsich@vrull.eu/mbox/"},{"id":1766,"url":"https://patchwork.plctlab.org/api/1.2/patches/1766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.261362-1-poulhies@adacore.com/","msgid":"<20221006092951.261362-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:29:51","name":"[COMMITED] ada: Fix inserting of validity checks in lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006092951.261362-1-poulhies@adacore.com/mbox/"},{"id":1772,"url":"https://patchwork.plctlab.org/api/1.2/patches/1772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093006.261475-1-poulhies@adacore.com/","msgid":"<20221006093006.261475-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:30:06","name":"[COMMITED] ada: stack scrubbing: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093006.261475-1-poulhies@adacore.com/mbox/"},{"id":1769,"url":"https://patchwork.plctlab.org/api/1.2/patches/1769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093051.261719-1-poulhies@adacore.com/","msgid":"<20221006093051.261719-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:30:51","name":"[COMMITED] ada: hardened booleans: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093051.261719-1-poulhies@adacore.com/mbox/"},{"id":1770,"url":"https://patchwork.plctlab.org/api/1.2/patches/1770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093108.261899-1-poulhies@adacore.com/","msgid":"<20221006093108.261899-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:08","name":"[COMMITED] ada: hardened conditionals: exemplify codegen changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093108.261899-1-poulhies@adacore.com/mbox/"},{"id":1771,"url":"https://patchwork.plctlab.org/api/1.2/patches/1771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093112.261959-1-poulhies@adacore.com/","msgid":"<20221006093112.261959-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:12","name":"[COMMITED] ada: Cleanup related to lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093112.261959-1-poulhies@adacore.com/mbox/"},{"id":1773,"url":"https://patchwork.plctlab.org/api/1.2/patches/1773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093127.262068-1-poulhies@adacore.com/","msgid":"<20221006093127.262068-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:27","name":"[COMMITED] ada: Reject conditional goto in lock-free protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093127.262068-1-poulhies@adacore.com/mbox/"},{"id":1774,"url":"https://patchwork.plctlab.org/api/1.2/patches/1774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093142.262226-1-poulhies@adacore.com/","msgid":"<20221006093142.262226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:42","name":"[COMMITED] ada: Minor potential bug in sem_ch6.adb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093142.262226-1-poulhies@adacore.com/mbox/"},{"id":1775,"url":"https://patchwork.plctlab.org/api/1.2/patches/1775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093147.262286-1-poulhies@adacore.com/","msgid":"<20221006093147.262286-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-10-06T09:31:47","name":"[COMMITED] ada: Implementation of support for storage models in gigi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006093147.262286-1-poulhies@adacore.com/mbox/"},{"id":1778,"url":"https://patchwork.plctlab.org/api/1.2/patches/1778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006100752.1E029383FB9B@sourceware.org/","msgid":"<20221006100752.1E029383FB9B@sourceware.org>","list_archive_url":null,"date":"2022-10-06T10:07:08","name":"tree-optimization/107107 - tail-merging VN wrong-code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006100752.1E029383FB9B@sourceware.org/mbox/"},{"id":1779,"url":"https://patchwork.plctlab.org/api/1.2/patches/1779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006105110.1719060-1-aldyh@redhat.com/","msgid":"<20221006105110.1719060-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T10:51:10","name":"[RFC] Add op1_range for __builtin_signbit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006105110.1719060-1-aldyh@redhat.com/mbox/"},{"id":1780,"url":"https://patchwork.plctlab.org/api/1.2/patches/1780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e747364c-f716-1661-2570-590a4c47820c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T10:55:01","name":"openmp: Map holds clause to IFN_ASSUME for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e747364c-f716-1661-2570-590a4c47820c@codesourcery.com/mbox/"},{"id":1782,"url":"https://patchwork.plctlab.org/api/1.2/patches/1782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006122037.48AAF3839DFC@sourceware.org/","msgid":"<20221006122037.48AAF3839DFC@sourceware.org>","list_archive_url":null,"date":"2022-10-06T12:19:53","name":"middle-end/107115 - avoid bogus redundant store removal during RTL expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006122037.48AAF3839DFC@sourceware.org/mbox/"},{"id":1783,"url":"https://patchwork.plctlab.org/api/1.2/patches/1783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu/","msgid":"<20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2022-10-06T14:34:00","name":"[RFC] c++: parser - Support for target address spaces in C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006143400.es3u6ebqt3xkw6jp@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":1784,"url":"https://patchwork.plctlab.org/api/1.2/patches/1784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz7rBzPwUuBl4VQb@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T14:49:43","name":"[v2] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz7rBzPwUuBl4VQb@redhat.com/mbox/"},{"id":1785,"url":"https://patchwork.plctlab.org/api/1.2/patches/1785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com/","msgid":"<55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com>","list_archive_url":null,"date":"2022-10-06T16:01:36","name":"gcc-12: FTBFS on hurd-i386","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55b2e9b94567fdba6e88e3a35af8773c2ed772e9.camel@gmail.com/mbox/"},{"id":1786,"url":"https://patchwork.plctlab.org/api/1.2/patches/1786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006161916.4118820-1-ppalka@redhat.com/","msgid":"<20221006161916.4118820-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-06T16:19:16","name":"c++ modules: static var in inline function [PR104433]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006161916.4118820-1-ppalka@redhat.com/mbox/"},{"id":1787,"url":"https://patchwork.plctlab.org/api/1.2/patches/1787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ObKI+7c+ai+g4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T17:20:44","name":"c++, v2: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ObKI+7c+ai+g4@tucnak/mbox/"},{"id":1788,"url":"https://patchwork.plctlab.org/api/1.2/patches/1788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2601473.BddDVKsqQX@fomalhaut/","msgid":"<2601473.BddDVKsqQX@fomalhaut>","list_archive_url":null,"date":"2022-10-06T17:25:53","name":"Reduce DF computation at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2601473.BddDVKsqQX@fomalhaut/mbox/"},{"id":1789,"url":"https://patchwork.plctlab.org/api/1.2/patches/1789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com/","msgid":"<4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com>","list_archive_url":null,"date":"2022-10-06T17:38:09","name":"Fix gdb FilteringTypePrinter (again)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d1dc3d4-e945-d283-964a-4dab3b3cb33e@gmail.com/mbox/"},{"id":1790,"url":"https://patchwork.plctlab.org/api/1.2/patches/1790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006182251.3453018-1-jason@redhat.com/","msgid":"<20221006182251.3453018-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-06T18:22:51","name":"[RFA] gimplify: prevent some C++ temporary elision","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006182251.3453018-1-jason@redhat.com/mbox/"},{"id":1791,"url":"https://patchwork.plctlab.org/api/1.2/patches/1791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ecbP4fDo7NivD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T18:29:05","name":"c++, v3: Improve handling of foreigner namespace attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz8ecbP4fDo7NivD@tucnak/mbox/"},{"id":1792,"url":"https://patchwork.plctlab.org/api/1.2/patches/1792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006190255.361385-1-cf.natali@gmail.com/","msgid":"<20221006190255.361385-1-cf.natali@gmail.com>","list_archive_url":null,"date":"2022-10-06T19:02:56","name":"[v2] libstdc++: basic_filebuf: don'\''t flush more often than necessary.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006190255.361385-1-cf.natali@gmail.com/mbox/"},{"id":1794,"url":"https://patchwork.plctlab.org/api/1.2/patches/1794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195038.807580-1-dmalcolm@redhat.com/","msgid":"<20221006195038.807580-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-06T19:50:38","name":"[committed] analyzer: fixes to call_summary_replay::dump_to_pp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195038.807580-1-dmalcolm@redhat.com/mbox/"},{"id":1793,"url":"https://patchwork.plctlab.org/api/1.2/patches/1793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195043.807604-1-dmalcolm@redhat.com/","msgid":"<20221006195043.807604-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-06T19:50:43","name":"[committed] analyzer: fix another ICE in PR 107158","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006195043.807604-1-dmalcolm@redhat.com/mbox/"},{"id":1795,"url":"https://patchwork.plctlab.org/api/1.2/patches/1795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006204035.1796190-1-aldyh@redhat.com/","msgid":"<20221006204035.1796190-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-06T20:40:35","name":"[COMMITTED,PR107170] Avoid copying incompatible types in legacy VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221006204035.1796190-1-aldyh@redhat.com/mbox/"},{"id":1796,"url":"https://patchwork.plctlab.org/api/1.2/patches/1796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2128dcf14408b394358f51802e73bcc9d922889.camel@vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T21:29:57","name":"[rs6000] Fix addg6s builtin with long long parameters. (PR100693)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2128dcf14408b394358f51802e73bcc9d922889.camel@vnet.ibm.com/mbox/"},{"id":1797,"url":"https://patchwork.plctlab.org/api/1.2/patches/1797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9L+2VE5evyna+Z@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-06T21:43:23","name":"[v3] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9L+2VE5evyna+Z@redhat.com/mbox/"},{"id":1798,"url":"https://patchwork.plctlab.org/api/1.2/patches/1798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9UXQV4MrH5TbOC@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-06T22:19:09","name":"[committed] libgcc, arc: Fix build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz9UXQV4MrH5TbOC@tucnak/mbox/"},{"id":1799,"url":"https://patchwork.plctlab.org/api/1.2/patches/1799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz+LH/upS8aybRBM@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T02:12:47","name":"[v3] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz+LH/upS8aybRBM@redhat.com/mbox/"},{"id":1800,"url":"https://patchwork.plctlab.org/api/1.2/patches/1800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXeSRifWKVEE3vW87v7CMJ--04uB=0i=dxKBA=8piwKcA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T02:15:39","name":"Go patch committed: better argument checking for builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXeSRifWKVEE3vW87v7CMJ--04uB=0i=dxKBA=8piwKcA@mail.gmail.com/mbox/"},{"id":1802,"url":"https://patchwork.plctlab.org/api/1.2/patches/1802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007040325.21276-1-kito.cheng@sifive.com/","msgid":"<20221007040325.21276-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-07T04:03:25","name":"PR middle-end/88345: Honor -falign-functions=N even optimized for size.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007040325.21276-1-kito.cheng@sifive.com/mbox/"},{"id":1804,"url":"https://patchwork.plctlab.org/api/1.2/patches/1804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz/REPRnQs0T2CXz@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-07T07:11:12","name":"[committed] Fix comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yz/REPRnQs0T2CXz@tucnak/mbox/"},{"id":1805,"url":"https://patchwork.plctlab.org/api/1.2/patches/1805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbd6fff8-30fe-c840-ddf9-56f5bfaa6e16@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-07T08:11:39","name":"[pushed] remove dead variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbd6fff8-30fe-c840-ddf9-56f5bfaa6e16@suse.cz/mbox/"},{"id":1806,"url":"https://patchwork.plctlab.org/api/1.2/patches/1806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz/","msgid":"<4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz>","list_archive_url":null,"date":"2022-10-07T08:24:17","name":"[pushed] fix clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4971570f-8bfa-e1d2-626e-41f9c7784708@suse.cz/mbox/"},{"id":1807,"url":"https://patchwork.plctlab.org/api/1.2/patches/1807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz/","msgid":"<844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz>","list_archive_url":null,"date":"2022-10-07T08:35:35","name":"[pushed] libdecnumber: remove unused variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/844e2b88-0b60-39be-ae68-3bd47fa2cfb9@suse.cz/mbox/"},{"id":1808,"url":"https://patchwork.plctlab.org/api/1.2/patches/1808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz/","msgid":"<22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz>","list_archive_url":null,"date":"2022-10-07T09:36:24","name":"[pushed] contrib: remove extra fetch from git_update_version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22713979-9a16-d42d-8fd4-615131d42ddb@suse.cz/mbox/"},{"id":1809,"url":"https://patchwork.plctlab.org/api/1.2/patches/1809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007114350.1212377-1-jwakely@redhat.com/","msgid":"<20221007114350.1212377-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:43:50","name":"[committed] libstdc++: Use bold style for DR titles in the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007114350.1212377-1-jwakely@redhat.com/mbox/"},{"id":1810,"url":"https://patchwork.plctlab.org/api/1.2/patches/1810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115701.1226696-1-jwakely@redhat.com/","msgid":"<20221007115701.1226696-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:57:01","name":"[committed] libstdc++: Shuffle header dependencies of ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115701.1226696-1-jwakely@redhat.com/mbox/"},{"id":1811,"url":"https://patchwork.plctlab.org/api/1.2/patches/1811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115713.1226717-1-jwakely@redhat.com/","msgid":"<20221007115713.1226717-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T11:57:13","name":"[committed] libstdc++: Add --disable-libstdcxx-hosted as an alias for hosted-libstdcxx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007115713.1226717-1-jwakely@redhat.com/mbox/"},{"id":1812,"url":"https://patchwork.plctlab.org/api/1.2/patches/1812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007122659.274CA13A3D@imap2.suse-dmz.suse.de/","msgid":"<20221007122659.274CA13A3D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-07T12:26:56","name":"tree-optimization/107153 - autopar SSA update issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007122659.274CA13A3D@imap2.suse-dmz.suse.de/mbox/"},{"id":1813,"url":"https://patchwork.plctlab.org/api/1.2/patches/1813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org/","msgid":"<44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org>","list_archive_url":null,"date":"2022-10-07T12:27:40","name":"c++: Lambda context mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44fbc15f-6f48-94c0-a51a-e5b99190ffbc@acm.org/mbox/"},{"id":1814,"url":"https://patchwork.plctlab.org/api/1.2/patches/1814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007132828.335317-1-torbjorn.svensson@foss.st.com/","msgid":"<20221007132828.335317-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-07T13:28:29","name":"[v3] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007132828.335317-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1815,"url":"https://patchwork.plctlab.org/api/1.2/patches/1815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007134901.5078-1-palmer@rivosinc.com/","msgid":"<20221007134901.5078-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-07T13:49:01","name":"doc: -falign-functions doesn'\''t override the __attribute__((align(N)))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007134901.5078-1-palmer@rivosinc.com/mbox/"},{"id":1816,"url":"https://patchwork.plctlab.org/api/1.2/patches/1816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org/","msgid":"<7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org>","list_archive_url":null,"date":"2022-10-07T14:22:18","name":"libiberty: Demangle variadic template lambdas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e3c33fb-aa04-57a9-c93f-24d8747e6b8c@acm.org/mbox/"},{"id":1817,"url":"https://patchwork.plctlab.org/api/1.2/patches/1817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com/","msgid":"<798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com>","list_archive_url":null,"date":"2022-10-07T14:26:58","name":"[v5] libgomp/nvptx: Prepare for reverse-offload callback handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/798d7ee1-2ffa-a591-38cb-a9ad421265d0@codesourcery.com/mbox/"},{"id":1818,"url":"https://patchwork.plctlab.org/api/1.2/patches/1818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007150952.102429-1-ppalka@redhat.com/","msgid":"<20221007150952.102429-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-07T15:09:52","name":"c++ modules: ICE with bitfield member in class template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007150952.102429-1-ppalka@redhat.com/mbox/"},{"id":1819,"url":"https://patchwork.plctlab.org/api/1.2/patches/1819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007155452.1299670-1-jwakely@redhat.com/","msgid":"<20221007155452.1299670-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-07T15:54:52","name":"libstdc++: Allow emergency EH alloc pool size to be tuned [PR68606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007155452.1299670-1-jwakely@redhat.com/mbox/"},{"id":1820,"url":"https://patchwork.plctlab.org/api/1.2/patches/1820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0BPdGc2AH9/gUtn@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T16:10:28","name":"[v4] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0BPdGc2AH9/gUtn@redhat.com/mbox/"},{"id":1821,"url":"https://patchwork.plctlab.org/api/1.2/patches/1821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007164509.854924-1-dmalcolm@redhat.com/","msgid":"<20221007164509.854924-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-07T16:45:09","name":"[committed] analyzer: extract bits from integer constants [PR105783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007164509.854924-1-dmalcolm@redhat.com/mbox/"},{"id":1822,"url":"https://patchwork.plctlab.org/api/1.2/patches/1822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr/","msgid":"<43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr>","list_archive_url":null,"date":"2022-10-07T20:26:18","name":"[v3] Fortran: error recovery for invalid types in array constructors [PR107000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43da1a08-ddc3-bb5c-6f64-cf17f891e35e@orange.fr/mbox/"},{"id":1823,"url":"https://patchwork.plctlab.org/api/1.2/patches/1823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007204506.cokw3lkkn5aequ5h@begin/","msgid":"<20221007204506.cokw3lkkn5aequ5h@begin>","list_archive_url":null,"date":"2022-10-07T20:45:06","name":"[PATCHv2] libstdc++: Mark pieces of gnu-linux/os_support.h linux-specific","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221007204506.cokw3lkkn5aequ5h@begin/mbox/"},{"id":1824,"url":"https://patchwork.plctlab.org/api/1.2/patches/1824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CVRvVh+I5pixLz@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T21:08:22","name":"[v4] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CVRvVh+I5pixLz@redhat.com/mbox/"},{"id":1825,"url":"https://patchwork.plctlab.org/api/1.2/patches/1825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CZa5mUxrBQ1WEL@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-07T21:26:03","name":"[v5] c++: fixes for derived-to-base reference binding [PR107085]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0CZa5mUxrBQ1WEL@redhat.com/mbox/"},{"id":1826,"url":"https://patchwork.plctlab.org/api/1.2/patches/1826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221008002758.3749441-1-jason@redhat.com/","msgid":"<20221008002758.3749441-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-08T00:27:58","name":"[pushed] c++: track whether we expect a TARGET_EXPR to be elided","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221008002758.3749441-1-jason@redhat.com/mbox/"},{"id":1835,"url":"https://patchwork.plctlab.org/api/1.2/patches/1835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com/","msgid":"<5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-08T21:18:04","name":"preprocessor: Fix tracking of system header state [PR60014, PR60723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dce970b21e788deaa3d08f21995d8cb3cdb3752.1665263871.git.lhyatt@gmail.com/mbox/"},{"id":1837,"url":"https://patchwork.plctlab.org/api/1.2/patches/1837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-1-dimitar@dinux.eu/","msgid":"<20221009114049.29943-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-10-09T11:40:48","name":"[committed] pru: Optimize DI shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-1-dimitar@dinux.eu/mbox/"},{"id":1838,"url":"https://patchwork.plctlab.org/api/1.2/patches/1838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-2-dimitar@dinux.eu/","msgid":"<20221009114049.29943-2-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-10-09T11:40:49","name":"[committed] pru: Add cbranchdi4 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221009114049.29943-2-dimitar@dinux.eu/mbox/"},{"id":1839,"url":"https://patchwork.plctlab.org/api/1.2/patches/1839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1246dffc-383d-4eea-b3f8-03d5ac39aece-1665341826741@3c-app-gmx-bs08/","msgid":"","list_archive_url":null,"date":"2022-10-09T18:57:06","name":"Fortran: fix check of polymorphic elements in data transfers [PR100971]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1246dffc-383d-4eea-b3f8-03d5ac39aece-1665341826741@3c-app-gmx-bs08/mbox/"},{"id":1840,"url":"https://patchwork.plctlab.org/api/1.2/patches/1840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4cb5dc305cb30c0c9983e2048c66a31199be892.1665351784.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-09T21:51:34","name":"[v4,1/4] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4cb5dc305cb30c0c9983e2048c66a31199be892.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1841,"url":"https://patchwork.plctlab.org/api/1.2/patches/1841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com/","msgid":"<8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:35","name":"[v4,2/4] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f25b1d4aa40f4d76b864c9e5635f0bda6f6c3d2.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1843,"url":"https://patchwork.plctlab.org/api/1.2/patches/1843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com/","msgid":"<2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:36","name":"[v4,3/4] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf61b61db094bb9f38c35828e53cd715878e384.1665351784.git.julian@codesourcery.com/mbox/"},{"id":1842,"url":"https://patchwork.plctlab.org/api/1.2/patches/1842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com/","msgid":"<3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-09T21:51:37","name":"[v4,4/4] OpenMP/OpenACC: Unordered/non-constant component offset struct mapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff03cb463d35ffe96b1271a146f24899b2cb573.1665351785.git.julian@codesourcery.com/mbox/"},{"id":1846,"url":"https://patchwork.plctlab.org/api/1.2/patches/1846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010012601.2741373-1-hongtao.liu@intel.com/","msgid":"<20221010012601.2741373-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-10T01:26:01","name":"[x86] Fix unrecognizable insn of cvtss2si.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010012601.2741373-1-hongtao.liu@intel.com/mbox/"},{"id":1847,"url":"https://patchwork.plctlab.org/api/1.2/patches/1847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-1-claziss@gmail.com/","msgid":"<20221010072902.3669746-1-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:28:58","name":"[committed,1/5] arc: Fix enter pattern instruction'\''s offsets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-1-claziss@gmail.com/mbox/"},{"id":1848,"url":"https://patchwork.plctlab.org/api/1.2/patches/1848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-2-claziss@gmail.com/","msgid":"<20221010072902.3669746-2-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:28:59","name":"[committed,2/5] arc: Remove Rcr constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-2-claziss@gmail.com/mbox/"},{"id":1850,"url":"https://patchwork.plctlab.org/api/1.2/patches/1850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-3-claziss@gmail.com/","msgid":"<20221010072902.3669746-3-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:00","name":"[committed,3/5] arc: Remove Rcw constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-3-claziss@gmail.com/mbox/"},{"id":1851,"url":"https://patchwork.plctlab.org/api/1.2/patches/1851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-4-claziss@gmail.com/","msgid":"<20221010072902.3669746-4-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:01","name":"[committed,4/5] arc: Remove Rcq constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-4-claziss@gmail.com/mbox/"},{"id":1849,"url":"https://patchwork.plctlab.org/api/1.2/patches/1849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-5-claziss@gmail.com/","msgid":"<20221010072902.3669746-5-claziss@gmail.com>","list_archive_url":null,"date":"2022-10-10T07:29:02","name":"[committed,5/5] arc: Remove obsolete mRcq and mRcw options.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010072902.3669746-5-claziss@gmail.com/mbox/"},{"id":1852,"url":"https://patchwork.plctlab.org/api/1.2/patches/1852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0PMXoRzh+dg/a1n@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T07:40:14","name":"[committed] openmp, fortran: Fix up IFN_ASSUME call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0PMXoRzh+dg/a1n@tucnak/mbox/"},{"id":1853,"url":"https://patchwork.plctlab.org/api/1.2/patches/1853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af86e552-974d-4233-8943-4dd155b00594@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T08:20:38","name":"[GCC] arm: Add cde feature support for Cortex-M55 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af86e552-974d-4233-8943-4dd155b00594@AZ-NEU-EX04.Arm.com/mbox/"},{"id":1854,"url":"https://patchwork.plctlab.org/api/1.2/patches/1854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Pd0i4FCMyx6ukZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T08:54:42","name":"middle-end IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Pd0i4FCMyx6ukZ@tucnak/mbox/"},{"id":1855,"url":"https://patchwork.plctlab.org/api/1.2/patches/1855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Puy8QL8/9zgNXp@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-10T10:07:07","name":"Require fgraphite effective target for pr107153.c test [PR107153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Puy8QL8/9zgNXp@tucnak/mbox/"},{"id":1856,"url":"https://patchwork.plctlab.org/api/1.2/patches/1856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010110339.E9E2513479@imap2.suse-dmz.suse.de/","msgid":"<20221010110339.E9E2513479@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-10T11:03:39","name":"[RFT] Vectorization of first-order recurrences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010110339.E9E2513479@imap2.suse-dmz.suse.de/mbox/"},{"id":1857,"url":"https://patchwork.plctlab.org/api/1.2/patches/1857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010112005.1523979-1-jwakely@redhat.com/","msgid":"<20221010112005.1523979-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-10T11:20:05","name":"[committed] libstdc++: std::make_signed_t should be ill-formed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010112005.1523979-1-jwakely@redhat.com/mbox/"},{"id":1862,"url":"https://patchwork.plctlab.org/api/1.2/patches/1862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-1-aldyh@redhat.com/","msgid":"<20221010124946.154152-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:42","name":"[COMMITTED] Return non-legacy ranges in range.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-1-aldyh@redhat.com/mbox/"},{"id":1859,"url":"https://patchwork.plctlab.org/api/1.2/patches/1859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-2-aldyh@redhat.com/","msgid":"<20221010124946.154152-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:43","name":"[COMMITTED] x UNORD x should set NAN on the TRUE side (and !NAN on the FALSE side).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-2-aldyh@redhat.com/mbox/"},{"id":1858,"url":"https://patchwork.plctlab.org/api/1.2/patches/1858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-3-aldyh@redhat.com/","msgid":"<20221010124946.154152-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:44","name":"[COMMITTED] The true side of x != x should set NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-3-aldyh@redhat.com/mbox/"},{"id":1861,"url":"https://patchwork.plctlab.org/api/1.2/patches/1861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-4-aldyh@redhat.com/","msgid":"<20221010124946.154152-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:45","name":"[COMMITTED] Add frange::maybe_isnan (bool sign).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-4-aldyh@redhat.com/mbox/"},{"id":1860,"url":"https://patchwork.plctlab.org/api/1.2/patches/1860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-5-aldyh@redhat.com/","msgid":"<20221010124946.154152-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T12:49:46","name":"[COMMITTED] Make range-op-float entries public.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010124946.154152-5-aldyh@redhat.com/mbox/"},{"id":1863,"url":"https://patchwork.plctlab.org/api/1.2/patches/1863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131315.13580-1-kito.cheng@sifive.com/","msgid":"<20221010131315.13580-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:13:15","name":"[committed] RISC-V: Add newline to the end of file [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131315.13580-1-kito.cheng@sifive.com/mbox/"},{"id":1864,"url":"https://patchwork.plctlab.org/api/1.2/patches/1864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131418.13632-1-kito.cheng@sifive.com/","msgid":"<20221010131418.13632-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:14:18","name":"[committed] RISC-V: Adjust testcase for rvv/base/user-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131418.13632-1-kito.cheng@sifive.com/mbox/"},{"id":1865,"url":"https://patchwork.plctlab.org/api/1.2/patches/1865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131436.13678-1-kito.cheng@sifive.com/","msgid":"<20221010131436.13678-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-10T13:14:36","name":"[committed] RISC-V: Add riscv_vector.h wrapper in testsuite to prevent pull in stdint.h from C library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010131436.13678-1-kito.cheng@sifive.com/mbox/"},{"id":1866,"url":"https://patchwork.plctlab.org/api/1.2/patches/1866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134322.169275-1-juzhe.zhong@rivai.ai/","msgid":"<20221010134322.169275-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:43:22","name":"RISC-V: Add missing vsetvl instruction type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134322.169275-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1867,"url":"https://patchwork.plctlab.org/api/1.2/patches/1867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134928.171673-1-juzhe.zhong@rivai.ai/","msgid":"<20221010134928.171673-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:49:28","name":"RISC-V: move struct vector_type_info from *.h to *.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010134928.171673-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1868,"url":"https://patchwork.plctlab.org/api/1.2/patches/1868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010135721.173181-1-juzhe.zhong@rivai.ai/","msgid":"<20221010135721.173181-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-10T13:57:21","name":"RISC-V: move struct vector_type_info from *.h to *.cc and change \"user_name\" into \"name\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010135721.173181-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1869,"url":"https://patchwork.plctlab.org/api/1.2/patches/1869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu/","msgid":"<20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2022-10-10T14:11:41","name":"[RFC] Add support for vectors in comparisons (like the C++ frontend does)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010141141.krpmtzmbgadlo3db@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":1870,"url":"https://patchwork.plctlab.org/api/1.2/patches/1870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsfviww8.fsf@euler.schwinge.homeip.net/","msgid":"<87fsfviww8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-10T14:19:35","name":"Restore default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'' (was: [PATCH 1/3] STABS: remove -gstabs and -gxcoff functionality)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsfviww8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":1874,"url":"https://patchwork.plctlab.org/api/1.2/patches/1874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00Blzp-Rc@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:18","name":"2/19 modula2 front end: Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00Blzp-Rc@lancelot/mbox/"},{"id":1876,"url":"https://patchwork.plctlab.org/api/1.2/patches/1876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00BlzX-GX@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:18","name":"1/19 modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukQ-00BlzX-GX@lancelot/mbox/"},{"id":1882,"url":"https://patchwork.plctlab.org/api/1.2/patches/1882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm0N-LJ@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:19","name":"4/19 modula2 front end: libgm2/libm2pim contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm0N-LJ@lancelot/mbox/"},{"id":1872,"url":"https://patchwork.plctlab.org/api/1.2/patches/1872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm08-7e@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:19","name":"3/19 modula2 front end: gm2 driver files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukR-00Bm08-7e@lancelot/mbox/"},{"id":1871,"url":"https://patchwork.plctlab.org/api/1.2/patches/1871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm11-Pu@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"7/19 modula2 front end: libgm2/libm2log contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm11-Pu@lancelot/mbox/"},{"id":1881,"url":"https://patchwork.plctlab.org/api/1.2/patches/1881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0a-3R@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"5/19 modula2 front end: libgm2/libm2iso contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0a-3R@lancelot/mbox/"},{"id":1873,"url":"https://patchwork.plctlab.org/api/1.2/patches/1873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0n-FL@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:20","name":"6/19 modula2 front end: libgm2/libm2min contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukS-00Bm0n-FL@lancelot/mbox/"},{"id":1877,"url":"https://patchwork.plctlab.org/api/1.2/patches/1877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1X-Kn@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:21","name":"9/19 modula2 front end: plugin source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1X-Kn@lancelot/mbox/"},{"id":1875,"url":"https://patchwork.plctlab.org/api/1.2/patches/1875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1G-6p@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:21","name":"8/19 modula2 front end: libgm2 contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukT-00Bm1G-6p@lancelot/mbox/"},{"id":1883,"url":"https://patchwork.plctlab.org/api/1.2/patches/1883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm2V-Q5@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:22","name":"11/19 modula2 front end: gimple interface *[a-d]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm2V-Q5@lancelot/mbox/"},{"id":1884,"url":"https://patchwork.plctlab.org/api/1.2/patches/1884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm22-62@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:22","name":"10/19 modula2 front end: gimple interface header files *.h and *.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukU-00Bm22-62@lancelot/mbox/"},{"id":1887,"url":"https://patchwork.plctlab.org/api/1.2/patches/1887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukV-00Bm34-D9@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:23","name":"12/19 modula2 front end: gimple interface *[e-f]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukV-00Bm34-D9@lancelot/mbox/"},{"id":1879,"url":"https://patchwork.plctlab.org/api/1.2/patches/1879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3W-F9@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:24","name":"14/19 modula2 front end: gimple interface remainder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3W-F9@lancelot/mbox/"},{"id":1878,"url":"https://patchwork.plctlab.org/api/1.2/patches/1878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3H-01@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:24","name":"13/19 modula2 front end: gimple interface *[g-m]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukW-00Bm3H-01@lancelot/mbox/"},{"id":1885,"url":"https://patchwork.plctlab.org/api/1.2/patches/1885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm41-MC@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:25","name":"16/19 modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm41-MC@lancelot/mbox/"},{"id":1886,"url":"https://patchwork.plctlab.org/api/1.2/patches/1886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm3i-29@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:25","name":"15/19 modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukX-00Bm3i-29@lancelot/mbox/"},{"id":1880,"url":"https://patchwork.plctlab.org/api/1.2/patches/1880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukY-00Bm4O-2a@lancelot/","msgid":"","list_archive_url":null,"date":"2022-10-10T15:31:26","name":"17/19 modula2 front end: dejagnu expect library scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1ohukY-00Bm4O-2a@lancelot/mbox/"},{"id":1888,"url":"https://patchwork.plctlab.org/api/1.2/patches/1888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010185829.312666-1-aldyh@redhat.com/","msgid":"<20221010185829.312666-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-10T18:58:29","name":"Avoid calling tracer.trailer() twice.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221010185829.312666-1-aldyh@redhat.com/mbox/"},{"id":1889,"url":"https://patchwork.plctlab.org/api/1.2/patches/1889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Rv6e2hgWpo77D/@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T19:18:01","name":"[v5] c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Rv6e2hgWpo77D/@redhat.com/mbox/"},{"id":1891,"url":"https://patchwork.plctlab.org/api/1.2/patches/1891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVgcPODk5EbUiTnNtFH3cQikzcpC=_WU0fTUABPLxG_AQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T21:27:29","name":"Go patch committed: Only build thunk struct type when needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVgcPODk5EbUiTnNtFH3cQikzcpC=_WU0fTUABPLxG_AQ@mail.gmail.com/mbox/"},{"id":1892,"url":"https://patchwork.plctlab.org/api/1.2/patches/1892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW9LELz-3fnT05qAkV8POsV0omaCvxvugYX=SWat7iKyg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-10T21:46:29","name":"Go patch committed: Treat S(\"\") as a string constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW9LELz-3fnT05qAkV8POsV0omaCvxvugYX=SWat7iKyg@mail.gmail.com/mbox/"},{"id":1896,"url":"https://patchwork.plctlab.org/api/1.2/patches/1896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354293045D32BFB1659CB2D691239@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T00:36:59","name":"[ICE] Fix for PR107193.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354293045D32BFB1659CB2D691239@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1898,"url":"https://patchwork.plctlab.org/api/1.2/patches/1898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011025113.624107-1-ppalka@redhat.com/","msgid":"<20221011025113.624107-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-11T02:51:13","name":"libstdc++: Implement ranges::repeat_view from P2474R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011025113.624107-1-ppalka@redhat.com/mbox/"},{"id":1899,"url":"https://patchwork.plctlab.org/api/1.2/patches/1899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db08f7bd-9bb5-5ab4-ca1c-0cb5dbe851f5@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T04:46:35","name":"[committed,PR,rtl-optimization/107182] Clear EDGE_CROSSING for jump->ret optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db08f7bd-9bb5-5ab4-ca1c-0cb5dbe851f5@gmail.com/mbox/"},{"id":1900,"url":"https://patchwork.plctlab.org/api/1.2/patches/1900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011044820.312228-1-juzhe.zhong@rivai.ai/","msgid":"<20221011044820.312228-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T04:48:20","name":"RISC-V: Move function place to make it looks better.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011044820.312228-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1901,"url":"https://patchwork.plctlab.org/api/1.2/patches/1901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011061521.65729-1-juzhe.zhong@rivai.ai/","msgid":"<20221011061521.65729-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:15:21","name":"RISC-V: Refine register_builtin_types function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011061521.65729-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1902,"url":"https://patchwork.plctlab.org/api/1.2/patches/1902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062159.69697-1-juzhe.zhong@rivai.ai/","msgid":"<20221011062159.69697-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:21:59","name":"RISC-V: Clang-format add_vector_attribute function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062159.69697-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1903,"url":"https://patchwork.plctlab.org/api/1.2/patches/1903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062333.70907-1-juzhe.zhong@rivai.ai/","msgid":"<20221011062333.70907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:23:33","name":"RISC-V: Remove TUPLE size macro define.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011062333.70907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1904,"url":"https://patchwork.plctlab.org/api/1.2/patches/1904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063156.115984-1-juzhe.zhong@rivai.ai/","msgid":"<20221011063156.115984-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:31:56","name":"RISC-V: Refine riscv-vector-builtins.o include files and makefile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063156.115984-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1905,"url":"https://patchwork.plctlab.org/api/1.2/patches/1905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063627.131177-1-juzhe.zhong@rivai.ai/","msgid":"<20221011063627.131177-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-11T06:36:27","name":"RISC-V: Clang-format vector_type_index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011063627.131177-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1906,"url":"https://patchwork.plctlab.org/api/1.2/patches/1906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz/","msgid":"<746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz>","list_archive_url":null,"date":"2022-10-11T06:54:25","name":"[(pushed)] ranger: add override keyword","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/746c04da-c92d-c069-3f2f-1e82a0eb6014@suse.cz/mbox/"},{"id":1907,"url":"https://patchwork.plctlab.org/api/1.2/patches/1907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1acd025-c91f-58b7-3b34-40635bb38cac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T07:38:48","name":"[PATCH-1,rs6000] Generate permute index directly for little endian target [PR100866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1acd025-c91f-58b7-3b34-40635bb38cac@linux.ibm.com/mbox/"},{"id":1908,"url":"https://patchwork.plctlab.org/api/1.2/patches/1908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011080316.1778261-1-hongtao.liu@intel.com/","msgid":"<20221011080316.1778261-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-11T08:03:16","name":"[x86] Add define_insn_and_split to support general version of \"kxnor\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011080316.1778261-1-hongtao.liu@intel.com/mbox/"},{"id":1909,"url":"https://patchwork.plctlab.org/api/1.2/patches/1909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011083137.336470-1-aldyh@redhat.com/","msgid":"<20221011083137.336470-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T08:31:37","name":"[COMMITTED,PR107195] Set range to zero when nonzero mask is 0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011083137.336470-1-aldyh@redhat.com/mbox/"},{"id":1913,"url":"https://patchwork.plctlab.org/api/1.2/patches/1913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com/","msgid":"<45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:03","name":"[committed,1/6] amdgcn: add multiple vector sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45381d6f9f4e7b5c7b062f5ad8cc9788091c2d07.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1910,"url":"https://patchwork.plctlab.org/api/1.2/patches/1910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com/","msgid":"<0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:04","name":"[committed,2/6] amdgcn: Resolve insn conditions at compile time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1911,"url":"https://patchwork.plctlab.org/api/1.2/patches/1911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com/","msgid":"<5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:05","name":"[committed,3/6] amdgcn: Add vec_extract for partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5cfe08555034b29f301dcfb99a3691c81b2e2def.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1912,"url":"https://patchwork.plctlab.org/api/1.2/patches/1912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com/","msgid":"<769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com>","list_archive_url":null,"date":"2022-10-11T11:02:06","name":"[committed,4/6] amdgcn: vec_init for multiple vector sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/769a10d0fc45e4923d7eb631170a117529ad5e39.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1914,"url":"https://patchwork.plctlab.org/api/1.2/patches/1914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf6b5c74a6f1927174091c73aa51401895ef92f0.1665485382.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T11:02:07","name":"[committed,5/6] amdgcn: Add vector integer negate insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf6b5c74a6f1927174091c73aa51401895ef92f0.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1915,"url":"https://patchwork.plctlab.org/api/1.2/patches/1915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9a05594d227cde79a67dc715bd9d82e9c464e9.1665485382.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-11T11:02:08","name":"[committed,6/6] amdgcn: vector testsuite tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9a05594d227cde79a67dc715bd9d82e9c464e9.1665485382.git.ams@codesourcery.com/mbox/"},{"id":1916,"url":"https://patchwork.plctlab.org/api/1.2/patches/1916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011111653.6CDD23857B99@sourceware.org/","msgid":"<20221011111653.6CDD23857B99@sourceware.org>","list_archive_url":null,"date":"2022-10-11T11:15:24","name":"tree-optimization/107212 - SLP reduction of reduction paths","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011111653.6CDD23857B99@sourceware.org/mbox/"},{"id":1917,"url":"https://patchwork.plctlab.org/api/1.2/patches/1917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org/","msgid":"<84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org>","list_archive_url":null,"date":"2022-10-11T11:41:02","name":"libiberty: Demangling '\''M'\'' prefixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84155431-f95e-24d5-5d4c-67b98bc93e39@acm.org/mbox/"},{"id":1918,"url":"https://patchwork.plctlab.org/api/1.2/patches/1918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-11T12:43:02","name":"[1/2] gcov: test switch/break line counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1919,"url":"https://patchwork.plctlab.org/api/1.2/patches/1919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-11T12:43:03","name":"[2/2] gcov: test line count for label in then/else block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011124303.99673-2-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1920,"url":"https://patchwork.plctlab.org/api/1.2/patches/1920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VwowKL1r/QXhLo@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-11T13:33:23","name":"c++: Implement excess precision support for C++ [PR107097, PR323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VwowKL1r/QXhLo@tucnak/mbox/"},{"id":1921,"url":"https://patchwork.plctlab.org/api/1.2/patches/1921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VxcOxwjGbN6rKl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-11T13:36:48","name":"middle-end, v2: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0VxcOxwjGbN6rKl@tucnak/mbox/"},{"id":1922,"url":"https://patchwork.plctlab.org/api/1.2/patches/1922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-1-aldyh@redhat.com/","msgid":"<20221011135136.369644-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:33","name":"[COMMITTED] Move TRUE case first in range-op.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-1-aldyh@redhat.com/mbox/"},{"id":1923,"url":"https://patchwork.plctlab.org/api/1.2/patches/1923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-2-aldyh@redhat.com/","msgid":"<20221011135136.369644-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:34","name":"[COMMITTED] Share common ordered comparison code with UN*_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-2-aldyh@redhat.com/mbox/"},{"id":1925,"url":"https://patchwork.plctlab.org/api/1.2/patches/1925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-3-aldyh@redhat.com/","msgid":"<20221011135136.369644-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:35","name":"[COMMITTED] Implement op1_range operators for unordered comparisons.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-3-aldyh@redhat.com/mbox/"},{"id":1924,"url":"https://patchwork.plctlab.org/api/1.2/patches/1924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-4-aldyh@redhat.com/","msgid":"<20221011135136.369644-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-11T13:51:36","name":"[COMMITTED] Implement ABS_EXPR operator for frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011135136.369644-4-aldyh@redhat.com/mbox/"},{"id":1926,"url":"https://patchwork.plctlab.org/api/1.2/patches/1926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011153507.784631-1-ppalka@redhat.com/","msgid":"<20221011153507.784631-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-11T15:35:07","name":"c++ modules: ICE with templated friend and std namespace [PR100134]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011153507.784631-1-ppalka@redhat.com/mbox/"},{"id":1927,"url":"https://patchwork.plctlab.org/api/1.2/patches/1927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011165750.328974-1-polacek@redhat.com/","msgid":"<20221011165750.328974-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-11T16:57:50","name":"testsuite: Only run -fcf-protection test on i?86/x86_64 [PR107213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011165750.328974-1-polacek@redhat.com/mbox/"},{"id":1930,"url":"https://patchwork.plctlab.org/api/1.2/patches/1930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-87876f1f-d6af-46cb-899e-014572306581-1665514076911@3c-app-gmx-bap36/","msgid":"","list_archive_url":null,"date":"2022-10-11T18:47:56","name":"Fortran: check types of source expressions before conversion [PR107215]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-87876f1f-d6af-46cb-899e-014572306581-1665514076911@3c-app-gmx-bap36/mbox/"},{"id":1931,"url":"https://patchwork.plctlab.org/api/1.2/patches/1931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011200003.695682-1-polacek@redhat.com/","msgid":"<20221011200003.695682-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-11T20:00:03","name":"c++: ICE with VEC_INIT_EXPR and defarg [PR106925]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011200003.695682-1-polacek@redhat.com/mbox/"},{"id":1932,"url":"https://patchwork.plctlab.org/api/1.2/patches/1932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-820c5571-4877-4f7c-bb95-3c9a5487d6a6-1665519780978@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2022-10-11T20:23:01","name":"Fortran: check types of operands of arithmetic binary operations [PR107217]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-820c5571-4877-4f7c-bb95-3c9a5487d6a6-1665519780978@3c-app-gmx-bs49/mbox/"},{"id":1933,"url":"https://patchwork.plctlab.org/api/1.2/patches/1933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-2-palmer@rivosinc.com/","msgid":"<20221011210156.7710-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:54","name":"[v2,1/3] doc: -falign-functions doesn'\''t override the __attribute__((align(N)))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-2-palmer@rivosinc.com/mbox/"},{"id":1935,"url":"https://patchwork.plctlab.org/api/1.2/patches/1935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-3-palmer@rivosinc.com/","msgid":"<20221011210156.7710-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:55","name":"[v2,2/3] doc: -falign-functions is ignored under -Os","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-3-palmer@rivosinc.com/mbox/"},{"id":1934,"url":"https://patchwork.plctlab.org/api/1.2/patches/1934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-4-palmer@rivosinc.com/","msgid":"<20221011210156.7710-4-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-11T21:01:56","name":"[v2,3/3] doc: -falign-functions is ignored for cold/size-optimized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011210156.7710-4-palmer@rivosinc.com/mbox/"},{"id":1936,"url":"https://patchwork.plctlab.org/api/1.2/patches/1936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011215831.67154-1-iain@sandoe.co.uk/","msgid":"<20221011215831.67154-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-10-11T21:58:31","name":"coroutines: Use cp_build_init_expr consistently.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221011215831.67154-1-iain@sandoe.co.uk/mbox/"},{"id":1937,"url":"https://patchwork.plctlab.org/api/1.2/patches/1937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2257020.ElGaqSPkdT@fomalhaut/","msgid":"<2257020.ElGaqSPkdT@fomalhaut>","list_archive_url":null,"date":"2022-10-11T22:42:30","name":"[Ada] Enable support for atomic primitives on SPARC/Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2257020.ElGaqSPkdT@fomalhaut/mbox/"},{"id":1938,"url":"https://patchwork.plctlab.org/api/1.2/patches/1938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1908900.PYKUYFuaPT@fomalhaut/","msgid":"<1908900.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2022-10-11T22:57:58","name":"Fix emit_group_store regression on big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1908900.PYKUYFuaPT@fomalhaut/mbox/"},{"id":1939,"url":"https://patchwork.plctlab.org/api/1.2/patches/1939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012014236.301092-1-juzhe.zhong@rivai.ai/","msgid":"<20221012014236.301092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-12T01:42:36","name":"RISC-V: Add new line at end of file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012014236.301092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1940,"url":"https://patchwork.plctlab.org/api/1.2/patches/1940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012025945.578-1-lili.cui@intel.com/","msgid":"<20221012025945.578-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-12T02:59:45","name":"Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012025945.578-1-lili.cui@intel.com/mbox/"},{"id":1942,"url":"https://patchwork.plctlab.org/api/1.2/patches/1942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012031605.2071672-1-chenglulu@loongson.cn/","msgid":"<20221012031605.2071672-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-12T03:16:06","name":"LoongArch: Fixed a bug in the loongarch architecture of libitm package.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012031605.2071672-1-chenglulu@loongson.cn/mbox/"},{"id":1943,"url":"https://patchwork.plctlab.org/api/1.2/patches/1943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012064820.151529-1-guojiufu@linux.ibm.com/","msgid":"<20221012064820.151529-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-12T06:48:20","name":"[V4] rs6000: cannot_force_const_mem for HIGH code rtx[PR106460]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012064820.151529-1-guojiufu@linux.ibm.com/mbox/"},{"id":1945,"url":"https://patchwork.plctlab.org/api/1.2/patches/1945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-1-aldyh@redhat.com/","msgid":"<20221012065050.412900-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:46","name":"[COMMITTED] Add default relation_kind to floating point range-op entries.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-1-aldyh@redhat.com/mbox/"},{"id":1948,"url":"https://patchwork.plctlab.org/api/1.2/patches/1948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-2-aldyh@redhat.com/","msgid":"<20221012065050.412900-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:47","name":"[COMMITTED] Add an frange(type) constructor analogous to the irange version.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-2-aldyh@redhat.com/mbox/"},{"id":1946,"url":"https://patchwork.plctlab.org/api/1.2/patches/1946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-3-aldyh@redhat.com/","msgid":"<20221012065050.412900-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:48","name":"[COMMITTED] Disable tree to bool conversion in frange::update_nan.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-3-aldyh@redhat.com/mbox/"},{"id":1944,"url":"https://patchwork.plctlab.org/api/1.2/patches/1944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-4-aldyh@redhat.com/","msgid":"<20221012065050.412900-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:49","name":"[COMMITTED] Add method to query the sign of a NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-4-aldyh@redhat.com/mbox/"},{"id":1947,"url":"https://patchwork.plctlab.org/api/1.2/patches/1947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-5-aldyh@redhat.com/","msgid":"<20221012065050.412900-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T06:50:50","name":"[COMMITTED] Add stubs for floating point range-op tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012065050.412900-5-aldyh@redhat.com/mbox/"},{"id":1949,"url":"https://patchwork.plctlab.org/api/1.2/patches/1949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fb389c8-a541-ed41-1786-6325decae530@suse.cz/","msgid":"<6fb389c8-a541-ed41-1786-6325decae530@suse.cz>","list_archive_url":null,"date":"2022-10-12T07:32:30","name":"[(pushed)] regenerate configure files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fb389c8-a541-ed41-1786-6325decae530@suse.cz/mbox/"},{"id":1950,"url":"https://patchwork.plctlab.org/api/1.2/patches/1950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012075014.2922-1-lili.cui@intel.com/","msgid":"<20221012075014.2922-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-12T07:50:14","name":"MAINTAINERS: Add myself for write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012075014.2922-1-lili.cui@intel.com/mbox/"},{"id":1951,"url":"https://patchwork.plctlab.org/api/1.2/patches/1951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com/","msgid":"<63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com>","list_archive_url":null,"date":"2022-10-12T08:12:21","name":"[v2] rs6000: Rework option -mpowerpc64 handling [PR106680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com/mbox/"},{"id":1952,"url":"https://patchwork.plctlab.org/api/1.2/patches/1952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Z5lozuTufmyMpL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T08:23:50","name":"machmode: Introduce GET_MODE_NEXT_MODE with previous GET_MODE_WIDER_MODE meaning, add new GET_MODE_WIDER_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0Z5lozuTufmyMpL@tucnak/mbox/"},{"id":1953,"url":"https://patchwork.plctlab.org/api/1.2/patches/1953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz/","msgid":"<75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz>","list_archive_url":null,"date":"2022-10-12T08:52:47","name":"[COMMITTED] gcov: rename gcov_write_summary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75cc66bb-b74c-e1ea-ca23-85cf555d6359@suse.cz/mbox/"},{"id":1954,"url":"https://patchwork.plctlab.org/api/1.2/patches/1954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-10-12T10:16:19","name":"Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012101619.7221-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":1955,"url":"https://patchwork.plctlab.org/api/1.2/patches/1955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0af9v/wVgkAk3SW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T11:07:34","name":"machmode, v2: Introduce GET_MODE_NEXT_MODE with previous GET_MODE_WIDER_MODE meaning, add new GET_MODE_WIDER_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0af9v/wVgkAk3SW@tucnak/mbox/"},{"id":1956,"url":"https://patchwork.plctlab.org/api/1.2/patches/1956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012115252.1881060-1-jwakely@redhat.com/","msgid":"<20221012115252.1881060-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-12T11:52:52","name":"libgcc: Quote variable in Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012115252.1881060-1-jwakely@redhat.com/mbox/"},{"id":1957,"url":"https://patchwork.plctlab.org/api/1.2/patches/1957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebcb6977-c445-264e-ce06-d56beb4bbcc0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T14:05:32","name":"libgomp: Add offload_device_gcn check, add requires-4a.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebcb6977-c445-264e-ce06-d56beb4bbcc0@codesourcery.com/mbox/"},{"id":1958,"url":"https://patchwork.plctlab.org/api/1.2/patches/1958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012142300.16833-1-xry111@xry111.site/","msgid":"<20221012142300.16833-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-10-12T14:23:00","name":"LoongArch: implement count_{leading,trailing}_zeros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012142300.16833-1-xry111@xry111.site/mbox/"},{"id":1959,"url":"https://patchwork.plctlab.org/api/1.2/patches/1959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012153752.427563-1-jason@redhat.com/","msgid":"<20221012153752.427563-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-12T15:37:52","name":"[pushed] c++: defer all consteval in default args [DR2631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012153752.427563-1-jason@redhat.com/mbox/"},{"id":1960,"url":"https://patchwork.plctlab.org/api/1.2/patches/1960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bq9gWcofbF1jVr@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:27:34","name":"[v2] c++: ICE with VEC_INIT_EXPR and defarg [PR106925]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bq9gWcofbF1jVr@redhat.com/mbox/"},{"id":1961,"url":"https://patchwork.plctlab.org/api/1.2/patches/1961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwi5uCACMPSzN/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:51:23","name":"[committed] libgomp: Fix up creation of artificial teams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwi5uCACMPSzN/@tucnak/mbox/"},{"id":1962,"url":"https://patchwork.plctlab.org/api/1.2/patches/1962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwv5mXC2V8Hu1s@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:52:15","name":"[committed] libgomp: Add omp_in_explicit_task support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bwv5mXC2V8Hu1s@tucnak/mbox/"},{"id":1963,"url":"https://patchwork.plctlab.org/api/1.2/patches/1963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bw7VWQp+vGpCoe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-12T16:53:01","name":"[committed] libgomp: Fix up OpenMP 5.2 feature bullet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0bw7VWQp+vGpCoe@tucnak/mbox/"},{"id":1965,"url":"https://patchwork.plctlab.org/api/1.2/patches/1965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com/","msgid":"<3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com>","list_archive_url":null,"date":"2022-10-12T17:29:02","name":"vect: Don'\''t pattern match BITFIELD_REF'\''s of non-integrals [PR107226]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fd8eef5-213d-23bd-4bcd-de7157d2de18@arm.com/mbox/"},{"id":1964,"url":"https://patchwork.plctlab.org/api/1.2/patches/1964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f84887dd-1d9e-e53f-b171-494426634026@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T17:29:07","name":"ifcvt: Fix bitpos calculation in bitfield lowering [PR107229]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f84887dd-1d9e-e53f-b171-494426634026@arm.com/mbox/"},{"id":1966,"url":"https://patchwork.plctlab.org/api/1.2/patches/1966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012182748.424078-1-aldyh@redhat.com/","msgid":"<20221012182748.424078-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-12T18:27:49","name":"[COMMITTED] Add range-op entry for floating point NEGATE_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012182748.424078-1-aldyh@redhat.com/mbox/"},{"id":1967,"url":"https://patchwork.plctlab.org/api/1.2/patches/1967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com/","msgid":"<1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com>","list_archive_url":null,"date":"2022-10-12T19:23:46","name":"xtensa: Add workaround for pSRAM cache issue in ESP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d246717a8e33db0760aaa4d5ce614489b4dab80.camel@espressif.com/mbox/"},{"id":1968,"url":"https://patchwork.plctlab.org/api/1.2/patches/1968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0cX0wQJBbmESbG1@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-12T19:38:59","name":"[wwwdocs] porting_to: Two-stage overload resolution for implicit move removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0cX0wQJBbmESbG1@redhat.com/mbox/"},{"id":1969,"url":"https://patchwork.plctlab.org/api/1.2/patches/1969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c0a8c36e-266b-4a31-89b5-242246403fc5-1665603941818@3c-app-gmx-bs25/","msgid":"","list_archive_url":null,"date":"2022-10-12T19:45:41","name":"Fortran: simplify array constructors with typespec [PR93483, PR107216, PR107219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c0a8c36e-266b-4a31-89b5-242246403fc5-1665603941818@3c-app-gmx-bs25/mbox/"},{"id":1970,"url":"https://patchwork.plctlab.org/api/1.2/patches/1970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012194734.85319-1-arsen@aarsen.me/","msgid":"<20221012194734.85319-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-12T19:47:35","name":"libstdc++: respect with-{headers, newlib} for default hosted value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221012194734.85319-1-arsen@aarsen.me/mbox/"},{"id":1971,"url":"https://patchwork.plctlab.org/api/1.2/patches/1971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8266b5be-256c-4be2-84db-3a880e849d41@gmail.com/","msgid":"<8266b5be-256c-4be2-84db-3a880e849d41@gmail.com>","list_archive_url":null,"date":"2022-10-12T20:18:37","name":"PR 107189 Remove useless _Alloc_node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8266b5be-256c-4be2-84db-3a880e849d41@gmail.com/mbox/"},{"id":1972,"url":"https://patchwork.plctlab.org/api/1.2/patches/1972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210130113580.2063768@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-13T01:14:35","name":"[committed] c: Do not use *_IS_IEC_60559 == 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210130113580.2063768@digraph.polyomino.org.uk/mbox/"},{"id":1973,"url":"https://patchwork.plctlab.org/api/1.2/patches/1973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031009.60175-1-liwei.xu@intel.com/","msgid":"<20221013031009.60175-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-13T03:10:09","name":"Optimize indentical permuation in my last r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031009.60175-1-liwei.xu@intel.com/mbox/"},{"id":1974,"url":"https://patchwork.plctlab.org/api/1.2/patches/1974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031518.66289-1-liwei.xu@intel.com/","msgid":"<20221013031518.66289-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-13T03:15:18","name":"Optimize identical permutation in my last r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013031518.66289-1-liwei.xu@intel.com/mbox/"},{"id":1975,"url":"https://patchwork.plctlab.org/api/1.2/patches/1975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0e1QH++UvHO7MtJ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T06:50:40","name":"middle-end, v3: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0e1QH++UvHO7MtJ@tucnak/mbox/"},{"id":1995,"url":"https://patchwork.plctlab.org/api/1.2/patches/1995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d77b6541-1a2a-f15d-6855-14e206081fa4@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-13T09:37:47","name":"[DOCS] Python Language Conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d77b6541-1a2a-f15d-6855-14e206081fa4@suse.cz/mbox/"},{"id":2016,"url":"https://patchwork.plctlab.org/api/1.2/patches/2016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013110318.34FB413AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013110318.34FB413AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T11:03:17","name":"Diagnose return statement in match.pd (with { ... } expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013110318.34FB413AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2033,"url":"https://patchwork.plctlab.org/api/1.2/patches/2033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3194055.aeNJFYEL58@fomalhaut/","msgid":"<3194055.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2022-10-13T12:06:15","name":"Fix bogus -Wstringop-overflow warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3194055.aeNJFYEL58@fomalhaut/mbox/"},{"id":2037,"url":"https://patchwork.plctlab.org/api/1.2/patches/2037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013121701.473585-1-aldyh@redhat.com/","msgid":"<20221013121701.473585-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-13T12:17:01","name":"[COMMITTED] Add op1_op2_relation for float operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013121701.473585-1-aldyh@redhat.com/mbox/"},{"id":2040,"url":"https://patchwork.plctlab.org/api/1.2/patches/2040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013123649.474497-1-aldyh@redhat.com/","msgid":"<20221013123649.474497-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-13T12:36:49","name":"[PR24021] Implement PLUS_EXPR range-op entry for floats.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013123649.474497-1-aldyh@redhat.com/mbox/"},{"id":2049,"url":"https://patchwork.plctlab.org/api/1.2/patches/2049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131632.1017D13AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013131632.1017D13AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T13:16:31","name":"tree-optimization/107160 - avoid reusing multiple accumulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131632.1017D13AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2052,"url":"https://patchwork.plctlab.org/api/1.2/patches/2052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131957.8C67013AAA@imap2.suse-dmz.suse.de/","msgid":"<20221013131957.8C67013AAA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-13T13:19:56","name":"tree-optimization/107247 - reduce SLP reduction accumulator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013131957.8C67013AAA@imap2.suse-dmz.suse.de/mbox/"},{"id":2057,"url":"https://patchwork.plctlab.org/api/1.2/patches/2057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013140152.29237-1-shiyulong@iscas.ac.cn/","msgid":"<20221013140152.29237-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-13T14:01:52","name":"[V1] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013140152.29237-1-shiyulong@iscas.ac.cn/mbox/"},{"id":2061,"url":"https://patchwork.plctlab.org/api/1.2/patches/2061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz/","msgid":"<79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz>","list_archive_url":null,"date":"2022-10-13T14:25:52","name":"use proper DECL_INITIAL for VTV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79ffd1f4-684e-dead-9d77-f1567acbc1d8@suse.cz/mbox/"},{"id":2073,"url":"https://patchwork.plctlab.org/api/1.2/patches/2073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com/","msgid":"<8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:30:29","name":"[COMMITTED,1/4] Add partial equivalence support to the relation oracle.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6b6582-59c7-6e1d-4bd9-6673d455a7af@redhat.com/mbox/"},{"id":2074,"url":"https://patchwork.plctlab.org/api/1.2/patches/2074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com/","msgid":"<70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:30:55","name":"[COMMITTED,2/4] Add equivalence iterator to relation oracle.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70c3023e-cbc0-312b-431b-7fd8eda37e74@redhat.com/mbox/"},{"id":2076,"url":"https://patchwork.plctlab.org/api/1.2/patches/2076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c37a5a77-af50-e266-b29b-b05190546f0d@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-13T15:31:23","name":"[COMMITTED,3/4] Add partial equivalence recognition to cast and bitwise and.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c37a5a77-af50-e266-b29b-b05190546f0d@redhat.com/mbox/"},{"id":2075,"url":"https://patchwork.plctlab.org/api/1.2/patches/2075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com/","msgid":"<8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:31:40","name":"[COMMITTED,4/4] PR tree-optimization/102540 - propagate partial equivs in the cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fef9e41-6f71-c3d8-09b9-419201b6c9e7@redhat.com/mbox/"},{"id":2077,"url":"https://patchwork.plctlab.org/api/1.2/patches/2077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013153921.3795800-1-ppalka@redhat.com/","msgid":"<20221013153921.3795800-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-13T15:39:21","name":"c++ modules: verify_type failure with typedef enum [PR106848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013153921.3795800-1-ppalka@redhat.com/mbox/"},{"id":2091,"url":"https://patchwork.plctlab.org/api/1.2/patches/2091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0g/g0JYbV33TZiW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:40:35","name":"c++, v2: Implement excess precision support for C++ [PR107097, PR323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0g/g0JYbV33TZiW@tucnak/mbox/"},{"id":2094,"url":"https://patchwork.plctlab.org/api/1.2/patches/2094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hAqDSTjECCqE9j@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:45:28","name":"c++: Excess precision for ? int : float or int == float [PR107097, PR82071, PR87390]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hAqDSTjECCqE9j@tucnak/mbox/"},{"id":2095,"url":"https://patchwork.plctlab.org/api/1.2/patches/2095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hB6+3EJYPYkHkN@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-13T16:50:51","name":"middle-end, c++, i386, libgcc, v2: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0hB6+3EJYPYkHkN@tucnak/mbox/"},{"id":2099,"url":"https://patchwork.plctlab.org/api/1.2/patches/2099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com/","msgid":"<8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com>","list_archive_url":null,"date":"2022-10-13T17:02:06","name":"testsuite: Fix failure in test pr105586.c [PR107171]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8723e38f-f7ee-aac7-7b8d-3dce61038a9f@linux.vnet.ibm.com/mbox/"},{"id":2242,"url":"https://patchwork.plctlab.org/api/1.2/patches/2242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d66ffad0-41c4-dd43-4b8f-d37b41f04668@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-13T18:10:47","name":"libgomp: Add Fortran testcases for omp_in_explicit_task","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d66ffad0-41c4-dd43-4b8f-d37b41f04668@codesourcery.com/mbox/"},{"id":2343,"url":"https://patchwork.plctlab.org/api/1.2/patches/2343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013190427.181432-1-ppalka@redhat.com/","msgid":"<20221013190427.181432-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-13T19:04:27","name":"c++ modules: ICE with dynamic_cast [PR106304]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013190427.181432-1-ppalka@redhat.com/mbox/"},{"id":2353,"url":"https://patchwork.plctlab.org/api/1.2/patches/2353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013201332.1157829-1-dmalcolm@redhat.com/","msgid":"<20221013201332.1157829-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-13T20:13:32","name":"[committed] analyzer: fix ICE introduced in r13-3168 [PR107210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221013201332.1157829-1-dmalcolm@redhat.com/mbox/"},{"id":2447,"url":"https://patchwork.plctlab.org/api/1.2/patches/2447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9063ef11e8eff2f1aa24d949235e687de4ce968.1665699882.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-13T23:56:03","name":"Always enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9063ef11e8eff2f1aa24d949235e687de4ce968.1665699882.git.segher@kernel.crashing.org/mbox/"},{"id":2463,"url":"https://patchwork.plctlab.org/api/1.2/patches/2463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210140219040.2099903@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-14T02:19:37","name":"[committed] c: C2x storage class specifiers in compound literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210140219040.2099903@digraph.polyomino.org.uk/mbox/"},{"id":2465,"url":"https://patchwork.plctlab.org/api/1.2/patches/2465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014023219.1395533-1-chenglulu@loongson.cn/","msgid":"<20221014023219.1395533-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-14T02:32:20","name":"[v2] LoongArch: Optimize the implementation of stack check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014023219.1395533-1-chenglulu@loongson.cn/mbox/"},{"id":2480,"url":"https://patchwork.plctlab.org/api/1.2/patches/2480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014031748.55813-1-guojiufu@linux.ibm.com/","msgid":"<20221014031748.55813-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-14T03:17:48","name":"rs6000: Enable const_anchor for '\''addi'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014031748.55813-1-guojiufu@linux.ibm.com/mbox/"},{"id":2530,"url":"https://patchwork.plctlab.org/api/1.2/patches/2530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014062821.BE43833EEA@hamza.pair.com/","msgid":"<20221014062821.BE43833EEA@hamza.pair.com>","list_archive_url":null,"date":"2022-10-14T06:28:16","name":"[committed] wwwdocs: *: Consistently format around ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014062821.BE43833EEA@hamza.pair.com/mbox/"},{"id":2550,"url":"https://patchwork.plctlab.org/api/1.2/patches/2550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-2-haochen.jiang@intel.com/","msgid":"<20221014074058.7709-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:40:57","name":"[1/2] Initial Raptorlake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-2-haochen.jiang@intel.com/mbox/"},{"id":2549,"url":"https://patchwork.plctlab.org/api/1.2/patches/2549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-3-haochen.jiang@intel.com/","msgid":"<20221014074058.7709-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:40:58","name":"[2/2] Initial Meteorlake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014074058.7709-3-haochen.jiang@intel.com/mbox/"},{"id":2553,"url":"https://patchwork.plctlab.org/api/1.2/patches/2553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-2-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:40","name":"[1/6] Support Intel AVX-IFMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-2-haochen.jiang@intel.com/mbox/"},{"id":2556,"url":"https://patchwork.plctlab.org/api/1.2/patches/2556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-3-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:41","name":"[2/6] Support Intel AVX-VNNI-INT8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-3-haochen.jiang@intel.com/mbox/"},{"id":2554,"url":"https://patchwork.plctlab.org/api/1.2/patches/2554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-4-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:42","name":"[3/6] i386: Add intrinsic for vector __bf16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-4-haochen.jiang@intel.com/mbox/"},{"id":2559,"url":"https://patchwork.plctlab.org/api/1.2/patches/2559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-5-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:43","name":"[4/6] Support Intel AVX-NE-CONVERT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-5-haochen.jiang@intel.com/mbox/"},{"id":2558,"url":"https://patchwork.plctlab.org/api/1.2/patches/2558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-6-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-6-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:44","name":"[5/6] Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-6-haochen.jiang@intel.com/mbox/"},{"id":2555,"url":"https://patchwork.plctlab.org/api/1.2/patches/2555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-7-haochen.jiang@intel.com/","msgid":"<20221014075445.7938-7-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:54:45","name":"[6/6] Initial Sierra Forest Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075445.7938-7-haochen.jiang@intel.com/mbox/"},{"id":2563,"url":"https://patchwork.plctlab.org/api/1.2/patches/2563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075843.8074-1-haochen.jiang@intel.com/","msgid":"<20221014075843.8074-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T07:58:43","name":"Support Intel AMX-FP16 ISA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014075843.8074-1-haochen.jiang@intel.com/mbox/"},{"id":2571,"url":"https://patchwork.plctlab.org/api/1.2/patches/2571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-2-haochen.jiang@intel.com/","msgid":"<20221014081945.8318-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:19:44","name":"[1/3] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-2-haochen.jiang@intel.com/mbox/"},{"id":2570,"url":"https://patchwork.plctlab.org/api/1.2/patches/2570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-3-haochen.jiang@intel.com/","msgid":"<20221014081945.8318-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:19:45","name":"[2/3] Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014081945.8318-3-haochen.jiang@intel.com/mbox/"},{"id":2583,"url":"https://patchwork.plctlab.org/api/1.2/patches/2583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-2-haochen.jiang@intel.com/","msgid":"<20221014083406.8406-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:34:05","name":"[1/2] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-2-haochen.jiang@intel.com/mbox/"},{"id":2582,"url":"https://patchwork.plctlab.org/api/1.2/patches/2582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-3-haochen.jiang@intel.com/","msgid":"<20221014083406.8406-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-14T08:34:06","name":"[2/2] Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014083406.8406-3-haochen.jiang@intel.com/mbox/"},{"id":2600,"url":"https://patchwork.plctlab.org/api/1.2/patches/2600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014091135.2477155-1-jwakely@redhat.com/","msgid":"<20221014091135.2477155-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T09:11:35","name":"[committed] libstdc++: Use markdown in Doxygen comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014091135.2477155-1-jwakely@redhat.com/mbox/"},{"id":2629,"url":"https://patchwork.plctlab.org/api/1.2/patches/2629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014095120.D070313A4A@imap2.suse-dmz.suse.de/","msgid":"<20221014095120.D070313A4A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-14T09:51:20","name":"tree-optimization/107254 - check and support live lanes from permutes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014095120.D070313A4A@imap2.suse-dmz.suse.de/mbox/"},{"id":2634,"url":"https://patchwork.plctlab.org/api/1.2/patches/2634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2850050.e9J7NaK4W3@fomalhaut/","msgid":"<2850050.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2022-10-14T10:00:44","name":"[SPARC] Fix PR target/107248","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2850050.e9J7NaK4W3@fomalhaut/mbox/"},{"id":2635,"url":"https://patchwork.plctlab.org/api/1.2/patches/2635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014100316.568795-1-aldyh@redhat.com/","msgid":"<20221014100316.568795-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T10:03:16","name":"[COMMITTED] Add cases for CFN_BUILT_IN_SIGNBIT[FL].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014100316.568795-1-aldyh@redhat.com/mbox/"},{"id":2653,"url":"https://patchwork.plctlab.org/api/1.2/patches/2653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp/","msgid":"<3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-14T11:06:08","name":"xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3296b387-083a-40cf-1bb5-40269e804f52@yahoo.co.jp/mbox/"},{"id":2696,"url":"https://patchwork.plctlab.org/api/1.2/patches/2696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-1-julian@codesourcery.com/","msgid":"<20221014133856.3388109-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-14T13:38:55","name":"[og12] amdgcn: Use FLAT addressing for all functions with pointer arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-1-julian@codesourcery.com/mbox/"},{"id":2697,"url":"https://patchwork.plctlab.org/api/1.2/patches/2697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-2-julian@codesourcery.com/","msgid":"<20221014133856.3388109-2-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-14T13:38:56","name":"[og12] OpenACC: Don'\''t gang-privatize artificial variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014133856.3388109-2-julian@codesourcery.com/mbox/"},{"id":2703,"url":"https://patchwork.plctlab.org/api/1.2/patches/2703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-1-aldyh@redhat.com/","msgid":"<20221014142652.671475-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:50","name":"[COMMITTED] Drop -0.0 in frange::set() for !HONOR_SIGNED_ZEROS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-1-aldyh@redhat.com/mbox/"},{"id":2702,"url":"https://patchwork.plctlab.org/api/1.2/patches/2702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-2-aldyh@redhat.com/","msgid":"<20221014142652.671475-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:51","name":"[COMMITTED] Normalize ranges over the range for both bounds when -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-2-aldyh@redhat.com/mbox/"},{"id":2704,"url":"https://patchwork.plctlab.org/api/1.2/patches/2704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-3-aldyh@redhat.com/","msgid":"<20221014142652.671475-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:26:52","name":"[COMMITTED] Replace CFN_BUILTIN_SIGNBIT* cases with CASE_FLT_FN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014142652.671475-3-aldyh@redhat.com/mbox/"},{"id":2705,"url":"https://patchwork.plctlab.org/api/1.2/patches/2705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143047.672008-1-aldyh@redhat.com/","msgid":"<20221014143047.672008-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:30:47","name":"Check rvc_normal in real_isdenormal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143047.672008-1-aldyh@redhat.com/mbox/"},{"id":2714,"url":"https://patchwork.plctlab.org/api/1.2/patches/2714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143602.2512815-1-jwakely@redhat.com/","msgid":"<20221014143602.2512815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:36:02","name":"[committed] libstdc++: Simplify print_raw function for debug assertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143602.2512815-1-jwakely@redhat.com/mbox/"},{"id":2715,"url":"https://patchwork.plctlab.org/api/1.2/patches/2715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143655.2512929-1-jwakely@redhat.com/","msgid":"<20221014143655.2512929-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-14T14:36:55","name":"[committed] libstdc++: Disable all emergency EH pool code if obj-count == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014143655.2512929-1-jwakely@redhat.com/mbox/"},{"id":2724,"url":"https://patchwork.plctlab.org/api/1.2/patches/2724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014150851.677560-1-aldyh@redhat.com/","msgid":"<20221014150851.677560-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-14T15:08:51","name":"Implement range-op entry for __builtin_copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014150851.677560-1-aldyh@redhat.com/mbox/"},{"id":2754,"url":"https://patchwork.plctlab.org/api/1.2/patches/2754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c57bf84c-383e-1591-1c44-1b652fc1499f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T16:38:09","name":"[committed] gfortran.dg/c-interop/deferred-character-2.f90: Fix dg-do","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c57bf84c-383e-1591-1c44-1b652fc1499f@codesourcery.com/mbox/"},{"id":2756,"url":"https://patchwork.plctlab.org/api/1.2/patches/2756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jw6mk1s.fsf@oldenburg.str.redhat.com/","msgid":"<874jw6mk1s.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-14T16:44:47","name":"libgcc: Move cfa_how into potential padding in struct frame_state_reg_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jw6mk1s.fsf@oldenburg.str.redhat.com/mbox/"},{"id":2757,"url":"https://patchwork.plctlab.org/api/1.2/patches/2757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014170018.892575-1-ppalka@redhat.com/","msgid":"<20221014170018.892575-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-14T17:00:18","name":"c++ modules: streaming constexpr_fundef [PR101449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014170018.892575-1-ppalka@redhat.com/mbox/"},{"id":2759,"url":"https://patchwork.plctlab.org/api/1.2/patches/2759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c72ceaca-53e4-3deb-c0a6-57af9b2935a4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T17:04:06","name":"libgomp: fix hang on fatal error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c72ceaca-53e4-3deb-c0a6-57af9b2935a4@codesourcery.com/mbox/"},{"id":2784,"url":"https://patchwork.plctlab.org/api/1.2/patches/2784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014180945.697F933E53@hamza.pair.com/","msgid":"<20221014180945.697F933E53@hamza.pair.com>","list_archive_url":null,"date":"2022-10-14T18:09:38","name":"[committed] wwwdocs: *: Omit trailing slash for CSS references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014180945.697F933E53@hamza.pair.com/mbox/"},{"id":2859,"url":"https://patchwork.plctlab.org/api/1.2/patches/2859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014195648.8865-1-palmer@rivosinc.com/","msgid":"<20221014195648.8865-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-10-14T19:56:48","name":"[v2] RISC-V: Implement __clear_cache via __builtin___clear_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014195648.8865-1-palmer@rivosinc.com/mbox/"},{"id":2833,"url":"https://patchwork.plctlab.org/api/1.2/patches/2833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7e998fb-2ab6-71a2-7e58-c72a08a453a7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-14T21:18:15","name":"Fortran: Fixes for kind=4 characters strings [PR107266]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7e998fb-2ab6-71a2-7e58-c72a08a453a7@codesourcery.com/mbox/"},{"id":2889,"url":"https://patchwork.plctlab.org/api/1.2/patches/2889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014230236.134044-1-juzhe.zhong@rivai.ai/","msgid":"<20221014230236.134044-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-14T23:02:36","name":"RISC-V: Reorganize mangle_builtin_type.[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221014230236.134044-1-juzhe.zhong@rivai.ai/mbox/"},{"id":2890,"url":"https://patchwork.plctlab.org/api/1.2/patches/2890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210142309130.2164505@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-14T23:10:11","name":"[committed] preprocessor: C2x identifier rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210142309130.2164505@digraph.polyomino.org.uk/mbox/"},{"id":2903,"url":"https://patchwork.plctlab.org/api/1.2/patches/2903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015035548.274704-1-guillermo.e.martinez@oracle.com/","msgid":"<20221015035548.274704-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-10-15T03:55:48","name":"[v3] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015035548.274704-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":2920,"url":"https://patchwork.plctlab.org/api/1.2/patches/2920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfjps6kf.fsf@euler.schwinge.homeip.net/","msgid":"<87sfjps6kf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-15T10:51:44","name":"libstdc++: Address '\''-Wunused-function'\'' for '\''print_raw'\'' (was: [committed] libstdc++: Simplify print_raw function for debug assertions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfjps6kf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":2971,"url":"https://patchwork.plctlab.org/api/1.2/patches/2971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202210.2687628-1-jwakely@redhat.com/","msgid":"<20221015202210.2687628-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-15T20:22:10","name":"[committed] libstdc++: Fix uses_allocator_construction args for cv pair (LWG 3677)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202210.2687628-1-jwakely@redhat.com/mbox/"},{"id":2972,"url":"https://patchwork.plctlab.org/api/1.2/patches/2972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202518.2687700-1-jwakely@redhat.com/","msgid":"<20221015202518.2687700-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-15T20:25:18","name":"[committed] libstdc++: Implement constexpr std::to_chars for C++23 (P2291R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221015202518.2687700-1-jwakely@redhat.com/mbox/"},{"id":2979,"url":"https://patchwork.plctlab.org/api/1.2/patches/2979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com/","msgid":"<81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com>","list_archive_url":null,"date":"2022-10-16T03:41:42","name":"[committed] Fix bug in register move costing on H8/300","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81e45aaf-7e44-fa07-35df-f66d988879ae@gmail.com/mbox/"},{"id":2998,"url":"https://patchwork.plctlab.org/api/1.2/patches/2998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vYOUijciWziskx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-16T10:09:39","name":"builtins: Add various __builtin_*f{16,32,64,128,32x,64x,128x} builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vYOUijciWziskx@tucnak/mbox/"},{"id":2999,"url":"https://patchwork.plctlab.org/api/1.2/patches/2999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vayeXfX4DsqW6g@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-16T10:20:10","name":"[RFC] libstdc++, v2: Partial library support for std::float{16,32,64,128}_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0vayeXfX4DsqW6g@tucnak/mbox/"},{"id":3043,"url":"https://patchwork.plctlab.org/api/1.2/patches/3043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7c1fd20-0448-af53-0ca2-255ba184ebde@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-16T15:04:04","name":"[committed] Rename \"Z\" constraint on H8/300 to \"Zz\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7c1fd20-0448-af53-0ca2-255ba184ebde@gmail.com/mbox/"},{"id":3073,"url":"https://patchwork.plctlab.org/api/1.2/patches/3073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com/","msgid":"<11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com>","list_archive_url":null,"date":"2022-10-16T16:51:52","name":"[committed] Add new constraints for upcoming autoinc fixes on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11801f7f-028c-a2b4-409d-16bfafccde01@gmail.com/mbox/"},{"id":3142,"url":"https://patchwork.plctlab.org/api/1.2/patches/3142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221016181531.225006-1-ovpanait@gmail.com/","msgid":"<20221016181531.225006-1-ovpanait@gmail.com>","list_archive_url":null,"date":"2022-10-16T18:15:31","name":"microblaze: use strverscmp() in MICROBLAZE_VERSION_COMPARE()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221016181531.225006-1-ovpanait@gmail.com/mbox/"},{"id":3146,"url":"https://patchwork.plctlab.org/api/1.2/patches/3146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-691dab4a-f7d3-4e48-a67b-488e2f830917-1665945998916@3c-app-gmx-bap23/","msgid":"","list_archive_url":null,"date":"2022-10-16T18:46:38","name":"Fortran: check type of operands of logical operations, comparisons [PR107272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-691dab4a-f7d3-4e48-a67b-488e2f830917-1665945998916@3c-app-gmx-bap23/mbox/"},{"id":3148,"url":"https://patchwork.plctlab.org/api/1.2/patches/3148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F829E8CE4F809219707791269@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-16T20:24:53","name":"Don'\''t print discriminators for -fcompare-debug.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F829E8CE4F809219707791269@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":3199,"url":"https://patchwork.plctlab.org/api/1.2/patches/3199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017032429.282693-1-liwei.xu@intel.com/","msgid":"<20221017032429.282693-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-10-17T03:24:29","name":"Move scanning pass of forwprop-19.c to dse1 for r13-3212-gb88adba751da63","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017032429.282693-1-liwei.xu@intel.com/mbox/"},{"id":3252,"url":"https://patchwork.plctlab.org/api/1.2/patches/3252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017073047.117398-1-juzhe.zhong@rivai.ai/","msgid":"<20221017073047.117398-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T07:30:47","name":"RISC-V: Fix format[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017073047.117398-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3257,"url":"https://patchwork.plctlab.org/api/1.2/patches/3257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rlej3o6.fsf@euler.schwinge.homeip.net/","msgid":"<878rlej3o6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T07:43:37","name":"Add '\''c-c++-common/torture/pr107195-1.c'\'' [PR107195] (was: [COMMITTED] [PR107195] Set range to zero when nonzero mask is 0.)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rlej3o6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3271,"url":"https://patchwork.plctlab.org/api/1.2/patches/3271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017082043.114653-1-juzhe.zhong@rivai.ai/","msgid":"<20221017082043.114653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T08:20:43","name":"RISC-V: Add RVV intrinsic basic framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017082043.114653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3280,"url":"https://patchwork.plctlab.org/api/1.2/patches/3280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017083642.184867-1-juzhe.zhong@rivai.ai/","msgid":"<20221017083642.184867-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-17T08:36:42","name":"RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017083642.184867-1-juzhe.zhong@rivai.ai/mbox/"},{"id":3295,"url":"https://patchwork.plctlab.org/api/1.2/patches/3295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgdun7ja.fsf@oldenburg.str.redhat.com/","msgid":"<87zgdun7ja.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-17T09:06:33","name":"libgcc: Special-case BFD ld unwind table encodings in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgdun7ja.fsf@oldenburg.str.redhat.com/mbox/"},{"id":3408,"url":"https://patchwork.plctlab.org/api/1.2/patches/3408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875ygiirt6.fsf@euler.schwinge.homeip.net/","msgid":"<875ygiirt6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T11:59:49","name":"Fix nvptx-specific '\''-foffload-options'\'' syntax in '\''libgomp.c/reverse-offload-sm30.c'\'' (was: [Patch] nvptx/mkoffload.cc: Warn instead of error when reverse offload is not possible)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875ygiirt6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3411,"url":"https://patchwork.plctlab.org/api/1.2/patches/3411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qr6ire8.fsf@euler.schwinge.homeip.net/","msgid":"<871qr6ire8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T12:08:47","name":"Tag '\''gcc/gimple-expr.cc:mark_addressable_2'\'' as '\''static'\'' (was: [PR67891] drop is_gimple_reg test from set_parm_rtl)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qr6ire8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3423,"url":"https://patchwork.plctlab.org/api/1.2/patches/3423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8oihc0c.fsf@euler.schwinge.homeip.net/","msgid":"<87v8oihc0c.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-17T12:26:27","name":"GCN: Restore build with GCC 4.8 (was: [committed 1/6] amdgcn: add multiple vector sizes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8oihc0c.fsf@euler.schwinge.homeip.net/mbox/"},{"id":3434,"url":"https://patchwork.plctlab.org/api/1.2/patches/3434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edv6mwp5.fsf@oldenburg.str.redhat.com/","msgid":"<87edv6mwp5.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-17T13:00:38","name":"libgcc: Mostly vectorize CIE encoding extraction for FDEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edv6mwp5.fsf@oldenburg.str.redhat.com/mbox/"},{"id":3456,"url":"https://patchwork.plctlab.org/api/1.2/patches/3456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cddfdaaa-5384-a4bc-ace5-5319962c4443@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-17T13:25:04","name":"[COMMITTED] Don'\''t set useless relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cddfdaaa-5384-a4bc-ace5-5319962c4443@redhat.com/mbox/"},{"id":3457,"url":"https://patchwork.plctlab.org/api/1.2/patches/3457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com/","msgid":"<03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:24","name":"[COMMITTED] Fix nan updating in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ebe7bc-13bf-a37f-7f8d-d2146e2df918@redhat.com/mbox/"},{"id":3458,"url":"https://patchwork.plctlab.org/api/1.2/patches/3458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com/","msgid":"<0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:40","name":"[COMMITTED] Add relation_trio class for range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f993407-dc43-c120-8bad-4b6c5b7a1aad@redhat.com/mbox/"},{"id":3459,"url":"https://patchwork.plctlab.org/api/1.2/patches/3459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com/","msgid":"<65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:25:59","name":"[COMMITTED] Add 3 floating NAN tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c19cf9-5709-3be3-5cd4-7a75dbd53c6a@redhat.com/mbox/"},{"id":3462,"url":"https://patchwork.plctlab.org/api/1.2/patches/3462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017132838.24693-1-aldyh@redhat.com/","msgid":"<20221017132838.24693-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:28:38","name":"[COMMITTED] Do not test for -Inf when flag_finite_math_only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017132838.24693-1-aldyh@redhat.com/mbox/"},{"id":3464,"url":"https://patchwork.plctlab.org/api/1.2/patches/3464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017133925.34686-1-aldyh@redhat.com/","msgid":"<20221017133925.34686-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T13:39:25","name":"[COMMITTED,PR10582] Add test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017133925.34686-1-aldyh@redhat.com/mbox/"},{"id":3484,"url":"https://patchwork.plctlab.org/api/1.2/patches/3484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017144437.157424-1-jwjagersma@gmail.com/","msgid":"<20221017144437.157424-1-jwjagersma@gmail.com>","list_archive_url":null,"date":"2022-10-17T14:44:37","name":"i386: Allow setting target attribute from conditional expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017144437.157424-1-jwjagersma@gmail.com/mbox/"},{"id":3572,"url":"https://patchwork.plctlab.org/api/1.2/patches/3572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y014Rs9LF2AT3Dow@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-17T15:44:06","name":"middle-end, v4: IFN_ASSUME support [PR106654]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y014Rs9LF2AT3Dow@tucnak/mbox/"},{"id":3589,"url":"https://patchwork.plctlab.org/api/1.2/patches/3589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y02CFLLygVNSOmL2@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-17T16:25:56","name":"libstdc++, v3: Partial library support for std::float{16,32,64,128}_t and std::bfloat16_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y02CFLLygVNSOmL2@tucnak/mbox/"},{"id":3590,"url":"https://patchwork.plctlab.org/api/1.2/patches/3590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017162632.1085359-1-ppalka@redhat.com/","msgid":"<20221017162632.1085359-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-17T16:26:32","name":"libstdc++: Redefine __from_chars_alnum_to_val'\''s table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017162632.1085359-1-ppalka@redhat.com/mbox/"},{"id":3648,"url":"https://patchwork.plctlab.org/api/1.2/patches/3648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017180844.3492051-1-ibuclaw@gdcproject.org/","msgid":"<20221017180844.3492051-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-10-17T18:08:44","name":"d: Remove D-specific version definitions from target headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017180844.3492051-1-ibuclaw@gdcproject.org/mbox/"},{"id":3656,"url":"https://patchwork.plctlab.org/api/1.2/patches/3656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017185618.78502-1-aldyh@redhat.com/","msgid":"<20221017185618.78502-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-17T18:56:18","name":"[COMMITTED] Make sure exported range for SSA post-dominates the DEF in set_global_ranges_from_unreachable_edges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017185618.78502-1-aldyh@redhat.com/mbox/"},{"id":3696,"url":"https://patchwork.plctlab.org/api/1.2/patches/3696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017200926.1230070-1-ppalka@redhat.com/","msgid":"<20221017200926.1230070-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-17T20:09:26","name":"libstdc++: Implement ranges::stride_view from P1899R3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221017200926.1230070-1-ppalka@redhat.com/mbox/"},{"id":3824,"url":"https://patchwork.plctlab.org/api/1.2/patches/3824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0111671-f8c5-0daf-8fe6-03a38055e9b0@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-17T23:25:39","name":"[committed] Add missing splitter for H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0111671-f8c5-0daf-8fe6-03a38055e9b0@gmail.com/mbox/"},{"id":3827,"url":"https://patchwork.plctlab.org/api/1.2/patches/3827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com/","msgid":"<0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:38:11","name":"[committed] Enable REE for H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac60d36-8412-b8fe-44e3-0be5836717df@gmail.com/mbox/"},{"id":3828,"url":"https://patchwork.plctlab.org/api/1.2/patches/3828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com/","msgid":"<3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:47:16","name":"[committed] More infrastructure to avoid bogus RTL on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa2cc41-0ad2-e106-56d4-f839ae2c1078@gmail.com/mbox/"},{"id":3832,"url":"https://patchwork.plctlab.org/api/1.2/patches/3832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com/","msgid":"<1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com>","list_archive_url":null,"date":"2022-10-17T23:55:05","name":"[committed,PR,target/101697] Fix bogus RTL on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f041491-d9d2-5fa2-c889-b29e91b69798@gmail.com/mbox/"},{"id":3859,"url":"https://patchwork.plctlab.org/api/1.2/patches/3859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab0052a8-e12a-a761-c71f-4ca5c4a355e2@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T01:05:17","name":"[COMMITTED] PR tree-optimization/107273 - Merge partial relation precisions properly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab0052a8-e12a-a761-c71f-4ca5c4a355e2@redhat.com/mbox/"},{"id":3913,"url":"https://patchwork.plctlab.org/api/1.2/patches/3913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1609279-d845-30a1-1ec6-ed0ca6c60a68@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-18T02:57:31","name":"[v2] xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1609279-d845-30a1-1ec6-ed0ca6c60a68@yahoo.co.jp/mbox/"},{"id":4008,"url":"https://patchwork.plctlab.org/api/1.2/patches/4008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018083022.2B11F139D2@imap2.suse-dmz.suse.de/","msgid":"<20221018083022.2B11F139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-18T08:30:21","name":"tree-optimization/107301 - check if we can duplicate block before doing so","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018083022.2B11F139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":4009,"url":"https://patchwork.plctlab.org/api/1.2/patches/4009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0888cc2d-2040-52c3-1201-16400567300b@arm.com/","msgid":"<0888cc2d-2040-52c3-1201-16400567300b@arm.com>","list_archive_url":null,"date":"2022-10-18T08:35:15","name":"ifcvt: Do not lower bitfields if we can'\''t analyze dr'\''s [PR107275]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0888cc2d-2040-52c3-1201-16400567300b@arm.com/mbox/"},{"id":4043,"url":"https://patchwork.plctlab.org/api/1.2/patches/4043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091050.82778-1-haochen.jiang@intel.com/","msgid":"<20221018091050.82778-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:10:50","name":"[v2] Support Intel AVX-VNNI-INT8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091050.82778-1-haochen.jiang@intel.com/mbox/"},{"id":4046,"url":"https://patchwork.plctlab.org/api/1.2/patches/4046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091727.82856-1-haochen.jiang@intel.com/","msgid":"<20221018091727.82856-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:17:27","name":"i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018091727.82856-1-haochen.jiang@intel.com/mbox/"},{"id":4047,"url":"https://patchwork.plctlab.org/api/1.2/patches/4047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018092024.84082-1-haochen.jiang@intel.com/","msgid":"<20221018092024.84082-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-18T09:20:24","name":"[v2] Add a parameter for the builtin function of prefetch to align with LLVM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018092024.84082-1-haochen.jiang@intel.com/mbox/"},{"id":4055,"url":"https://patchwork.plctlab.org/api/1.2/patches/4055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0z5jws2.fsf@oldenburg.str.redhat.com/","msgid":"<87r0z5jws2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T09:39:25","name":"libsanitizer: Avoid implicit function declaration in configure test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0z5jws2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4065,"url":"https://patchwork.plctlab.org/api/1.2/patches/4065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h701jvk2.fsf@oldenburg.str.redhat.com/","msgid":"<87h701jvk2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T10:05:49","name":"libiberty: Fix C89-isms in configure tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h701jvk2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4075,"url":"https://patchwork.plctlab.org/api/1.2/patches/4075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2eae96f7642b974a6c0fd3d90fec80e9f65936f.1666088224.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T10:39:02","name":"[v5,1/4] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2eae96f7642b974a6c0fd3d90fec80e9f65936f.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4077,"url":"https://patchwork.plctlab.org/api/1.2/patches/4077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com/","msgid":"<8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:03","name":"[v5,2/4] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fcf3df1b40ea77cbb8088962cbcdf6935d2ded3.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4074,"url":"https://patchwork.plctlab.org/api/1.2/patches/4074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com/","msgid":"<80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:04","name":"[v5,3/4] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80f87c37a4f8b9f1f61c1668ecb750cefb1aec77.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4076,"url":"https://patchwork.plctlab.org/api/1.2/patches/4076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com/","msgid":"<83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T10:39:05","name":"[v5,4/4] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83e376b5851e1ac534ddca17d3ebb3828050c5d1.1666088224.git.julian@codesourcery.com/mbox/"},{"id":4078,"url":"https://patchwork.plctlab.org/api/1.2/patches/4078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018104758.20724139D2@imap2.suse-dmz.suse.de/","msgid":"<20221018104758.20724139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-18T10:47:57","name":"tree-optimization/107302 - fix vec_perm placement for recurrence vect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018104758.20724139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":4093,"url":"https://patchwork.plctlab.org/api/1.2/patches/4093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y06KvPa5EeXFijaV@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T11:15:08","name":"[ping,wwwdocs] Add reference to pp_format to Coding Conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y06KvPa5EeXFijaV@redhat.com/mbox/"},{"id":4180,"url":"https://patchwork.plctlab.org/api/1.2/patches/4180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6czap6y5j.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-18T13:48:08","name":"SRA: Limit replacement creation for accesses propagated from LHSs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6czap6y5j.fsf@suse.cz/mbox/"},{"id":4185,"url":"https://patchwork.plctlab.org/api/1.2/patches/4185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210181407500.2354457@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-18T14:08:40","name":"[committed] c: C2x enums wider than int [PR36113]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210181407500.2354457@digraph.polyomino.org.uk/mbox/"},{"id":4187,"url":"https://patchwork.plctlab.org/api/1.2/patches/4187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8ohi5ng.fsf@oldenburg.str.redhat.com/","msgid":"<87v8ohi5ng.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-10-18T14:10:43","name":"[v2] libiberty: Fix C89-isms in configure tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8ohi5ng.fsf@oldenburg.str.redhat.com/mbox/"},{"id":4191,"url":"https://patchwork.plctlab.org/api/1.2/patches/4191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018141310.3139378-1-ppalka@redhat.com/","msgid":"<20221018141310.3139378-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T14:13:10","name":"c++ modules: stream non-trailing default targs [PR105045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018141310.3139378-1-ppalka@redhat.com/mbox/"},{"id":4214,"url":"https://patchwork.plctlab.org/api/1.2/patches/4214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018151212.1523137-1-manolis.tsamis@vrull.eu/","msgid":"<20221018151212.1523137-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-10-18T15:12:12","name":"[v2] Enable shrink wrapping for the RISC-V target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018151212.1523137-1-manolis.tsamis@vrull.eu/mbox/"},{"id":4269,"url":"https://patchwork.plctlab.org/api/1.2/patches/4269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018173829.392773-1-polacek@redhat.com/","msgid":"<20221018173829.392773-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-18T17:38:29","name":"c++: Mitigate -Wuseless-cast with classes [PR85043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018173829.392773-1-polacek@redhat.com/mbox/"},{"id":4275,"url":"https://patchwork.plctlab.org/api/1.2/patches/4275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-1-ppalka@redhat.com/","msgid":"<20221018181050.1629201-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T18:10:49","name":"[1/2] c++ modules: streaming enum with no enumerators [PR102600]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-1-ppalka@redhat.com/mbox/"},{"id":4276,"url":"https://patchwork.plctlab.org/api/1.2/patches/4276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-2-ppalka@redhat.com/","msgid":"<20221018181050.1629201-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-18T18:10:50","name":"[2/2] c++ modules: always stream TYPE_MIN/MAX_VALUE for enums [PR106848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018181050.1629201-2-ppalka@redhat.com/mbox/"},{"id":4303,"url":"https://patchwork.plctlab.org/api/1.2/patches/4303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com/","msgid":"<9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com>","list_archive_url":null,"date":"2022-10-18T19:27:04","name":"OpenMP: Fix reverse offload GOMP_TARGET_REV IFN corner cases [PR107236]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e2d0331-92c4-c8a6-a662-61f298fb3976@codesourcery.com/mbox/"},{"id":4322,"url":"https://patchwork.plctlab.org/api/1.2/patches/4322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018211204.0BCA533E4A@hamza.pair.com/","msgid":"<20221018211204.0BCA533E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-18T21:12:00","name":"[committed] wwwdocs: *: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018211204.0BCA533E4A@hamza.pair.com/mbox/"},{"id":4342,"url":"https://patchwork.plctlab.org/api/1.2/patches/4342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa605ce17fbe4783b46a2cea7b3fa6d99d2cbfe6.1666131048.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-18T22:14:54","name":"pch: Fix streaming of strings with embedded null bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa605ce17fbe4783b46a2cea7b3fa6d99d2cbfe6.1666131048.git.lhyatt@gmail.com/mbox/"},{"id":4364,"url":"https://patchwork.plctlab.org/api/1.2/patches/4364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018232301.264776-1-hongtao.liu@intel.com/","msgid":"<20221018232301.264776-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-18T23:23:01","name":"Canonicalize vec_perm index to make the first index come from the first vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221018232301.264776-1-hongtao.liu@intel.com/mbox/"},{"id":4365,"url":"https://patchwork.plctlab.org/api/1.2/patches/4365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210182326090.2363097@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-18T23:26:40","name":"[committed] c: Diagnose \"enum tag;\" after definition [PR107164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210182326090.2363097@digraph.polyomino.org.uk/mbox/"},{"id":4421,"url":"https://patchwork.plctlab.org/api/1.2/patches/4421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com/","msgid":"<31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com>","list_archive_url":null,"date":"2022-10-19T03:18:42","name":"vect: Try folding first for shifted value generation [PR107240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31c05be7-64bf-8d93-934c-63262e082e68@linux.ibm.com/mbox/"},{"id":4422,"url":"https://patchwork.plctlab.org/api/1.2/patches/4422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3c052a5-70d2-56e7-226d-5b148924df6b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T03:19:00","name":"rs6000/test: Support vect_long_long effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3c052a5-70d2-56e7-226d-5b148924df6b@linux.ibm.com/mbox/"},{"id":4441,"url":"https://patchwork.plctlab.org/api/1.2/patches/4441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019060321.61112-1-hongyu.wang@intel.com/","msgid":"<20221019060321.61112-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-10-19T06:03:21","name":"Support Intel AVX-IFMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019060321.61112-1-hongyu.wang@intel.com/mbox/"},{"id":4445,"url":"https://patchwork.plctlab.org/api/1.2/patches/4445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6f0093a-cba8-6b60-aacc-ca02f781844b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T06:22:11","name":"s390: Fix bootstrap error with checking and -m31","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6f0093a-cba8-6b60-aacc-ca02f781844b@linux.ibm.com/mbox/"},{"id":4467,"url":"https://patchwork.plctlab.org/api/1.2/patches/4467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+rxzMBPmFcWzqe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T07:48:23","name":"c++: Don'\''t shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_constant_expression [PR107295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+rxzMBPmFcWzqe@tucnak/mbox/"},{"id":4468,"url":"https://patchwork.plctlab.org/api/1.2/patches/4468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+tShfF4ku2nMoM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T07:54:50","name":"expr: Fix ICE on BFmode -> SFmode conversion of constant [PR107262]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+tShfF4ku2nMoM@tucnak/mbox/"},{"id":4469,"url":"https://patchwork.plctlab.org/api/1.2/patches/4469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+upcPTOYp9/pFM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:00:37","name":"c++: Fix up mangling ICE with void{} [PR106863]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+upcPTOYp9/pFM@tucnak/mbox/"},{"id":4470,"url":"https://patchwork.plctlab.org/api/1.2/patches/4470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+vA4HZAdC68eE4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:02:11","name":"match.pd: Add 2 TYPE_OVERFLOW_SANITIZED checks [PR106990]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+vA4HZAdC68eE4@tucnak/mbox/"},{"id":4476,"url":"https://patchwork.plctlab.org/api/1.2/patches/4476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp/","msgid":"<3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-19T08:16:24","name":"[v3] xtensa: Prepare the transition from Reload to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3054719f-6688-211c-da07-93c0fbf7c038@yahoo.co.jp/mbox/"},{"id":4479,"url":"https://patchwork.plctlab.org/api/1.2/patches/4479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+z9IfvRybw/D2c@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:23:16","name":"libstdc++-v3: Implement {,b}float16_t nextafter and some fixes [PR106652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+z9IfvRybw/D2c@tucnak/mbox/"},{"id":4582,"url":"https://patchwork.plctlab.org/api/1.2/patches/4582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+6OPW020p5Zran@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T08:50:00","name":"i386: Fix up __bf16 handling on ia32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0+6OPW020p5Zran@tucnak/mbox/"},{"id":4605,"url":"https://patchwork.plctlab.org/api/1.2/patches/4605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019085530.9691513345@imap2.suse-dmz.suse.de/","msgid":"<20221019085530.9691513345@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-19T08:55:30","name":"tree-optimization/106781 - adjust cgraph lhs removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019085530.9691513345@imap2.suse-dmz.suse.de/mbox/"},{"id":4918,"url":"https://patchwork.plctlab.org/api/1.2/patches/4918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019094214.1734353-1-torbjorn.svensson@foss.st.com/","msgid":"<20221019094214.1734353-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-19T09:42:15","name":"arm: Allow to override location of .gnu.sgstubs section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019094214.1734353-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":5239,"url":"https://patchwork.plctlab.org/api/1.2/patches/5239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5888ab6-564e-33ad-452b-f69e52c66b31@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T11:27:22","name":"Fortran: Fix non_negative_strides_array_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5888ab6-564e-33ad-452b-f69e52c66b31@codesourcery.com/mbox/"},{"id":5406,"url":"https://patchwork.plctlab.org/api/1.2/patches/5406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0/0mF4j3680bCG8@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T12:59:04","name":"libstdc++-v3: Some std::*float*_t charconv and i/ostream overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y0/0mF4j3680bCG8@tucnak/mbox/"},{"id":5444,"url":"https://patchwork.plctlab.org/api/1.2/patches/5444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a41c1abe-3bd4-9079-6d06-a7a00b5aa3ef@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-19T13:24:43","name":"[(pushed)] avr: remove useless @tie{} directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a41c1abe-3bd4-9079-6d06-a7a00b5aa3ef@suse.cz/mbox/"},{"id":5536,"url":"https://patchwork.plctlab.org/api/1.2/patches/5536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019140212.44796-1-aldyh@redhat.com/","msgid":"<20221019140212.44796-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-19T14:02:12","name":"[COMMITTED,PR,tree-optimization/107312] Make range_true_and_false work with 1-bit signed types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019140212.44796-1-aldyh@redhat.com/mbox/"},{"id":5573,"url":"https://patchwork.plctlab.org/api/1.2/patches/5573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141341.3218C33E1B@hamza.pair.com/","msgid":"<20221019141341.3218C33E1B@hamza.pair.com>","list_archive_url":null,"date":"2022-10-19T14:13:38","name":"[committed] wwwdocs: codingconventions: Fix two typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141341.3218C33E1B@hamza.pair.com/mbox/"},{"id":5587,"url":"https://patchwork.plctlab.org/api/1.2/patches/5587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c64b0db5-9acb-ac22-1473-8759c1188a90@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T14:18:42","name":"[OG12,committed] Fortran: Fix delinearization regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c64b0db5-9acb-ac22-1473-8759c1188a90@codesourcery.com/mbox/"},{"id":5591,"url":"https://patchwork.plctlab.org/api/1.2/patches/5591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141949.1741947-1-torbjorn.svensson@foss.st.com/","msgid":"<20221019141949.1741947-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-19T14:19:50","name":"[v4] testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019141949.1741947-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":5594,"url":"https://patchwork.plctlab.org/api/1.2/patches/5594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019143141.248710-1-ppalka@redhat.com/","msgid":"<20221019143141.248710-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-19T14:31:41","name":"libstdc++: Fix typo in stride_view'\''s operator- [PR107313]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019143141.248710-1-ppalka@redhat.com/mbox/"},{"id":5693,"url":"https://patchwork.plctlab.org/api/1.2/patches/5693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AXafpqS9xxvvTp@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T15:27:37","name":"testsuite: Default make check-g++ vs. tests for newest C++ standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AXafpqS9xxvvTp@tucnak/mbox/"},{"id":5695,"url":"https://patchwork.plctlab.org/api/1.2/patches/5695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca0fe26c-5422-d5ee-27b0-cdfbee80b0dc@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T15:37:17","name":"[OG12,committed] Fix omp-expand.cc'\''s expand_omp_target for OpenACC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca0fe26c-5422-d5ee-27b0-cdfbee80b0dc@codesourcery.com/mbox/"},{"id":5725,"url":"https://patchwork.plctlab.org/api/1.2/patches/5725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com/","msgid":"<0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com>","list_archive_url":null,"date":"2022-10-19T16:04:03","name":"[COMMITTED] Use Value_Range when applying inferred ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0dfdbb0d-3ea3-70e6-7a16-51bcc0d9a86c@redhat.com/mbox/"},{"id":5741,"url":"https://patchwork.plctlab.org/api/1.2/patches/5741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AkY7V2xil5Wpub@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-19T16:22:59","name":"testsuite: Fix up c2x-enum-1.c for 32-bit arches [PR107311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1AkY7V2xil5Wpub@tucnak/mbox/"},{"id":5742,"url":"https://patchwork.plctlab.org/api/1.2/patches/5742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1An8APGvWejfjHX@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-19T16:38:08","name":"[v2] c++: Mitigate -Wuseless-cast with classes [PR85043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1An8APGvWejfjHX@redhat.com/mbox/"},{"id":5744,"url":"https://patchwork.plctlab.org/api/1.2/patches/5744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019164645.301739-1-ppalka@redhat.com/","msgid":"<20221019164645.301739-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-19T16:46:45","name":"libstdc++: Implement P2474R2 changes to views::take/drop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019164645.301739-1-ppalka@redhat.com/mbox/"},{"id":5821,"url":"https://patchwork.plctlab.org/api/1.2/patches/5821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019191929.3262862-1-arsen@aarsen.me/","msgid":"<20221019191929.3262862-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-19T19:19:31","name":"libstdc++: Enable _GLIBCXX_WEAK_DEFINITION on more platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019191929.3262862-1-arsen@aarsen.me/mbox/"},{"id":5839,"url":"https://patchwork.plctlab.org/api/1.2/patches/5839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d13d78b2-088f-400d-978c-b700912aeb30-1666212584693@3c-app-gmx-bap39/","msgid":"","list_archive_url":null,"date":"2022-10-19T20:49:44","name":"Fortran: error recovery with references of bad array constructors [PR105633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d13d78b2-088f-400d-978c-b700912aeb30-1666212584693@3c-app-gmx-bap39/mbox/"},{"id":5849,"url":"https://patchwork.plctlab.org/api/1.2/patches/5849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019205249.1502419-1-dmalcolm@redhat.com/","msgid":"<20221019205249.1502419-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-19T20:52:49","name":"[committed] analyzer: fix ICE on __builtin_ms_va_copy [PR105765]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019205249.1502419-1-dmalcolm@redhat.com/mbox/"},{"id":5851,"url":"https://patchwork.plctlab.org/api/1.2/patches/5851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019211550.135116-1-aldyh@redhat.com/","msgid":"<20221019211550.135116-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-19T21:15:50","name":"[COMMITTED] Always check result from build_ in range-op-float.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019211550.135116-1-aldyh@redhat.com/mbox/"},{"id":5855,"url":"https://patchwork.plctlab.org/api/1.2/patches/5855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210192155530.14960@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-19T21:56:41","name":"[committed] c: C2x %wN, %wfN format checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210192155530.14960@digraph.polyomino.org.uk/mbox/"},{"id":5866,"url":"https://patchwork.plctlab.org/api/1.2/patches/5866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019220638.13422-1-david.faust@oracle.com/","msgid":"<20221019220638.13422-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-19T22:06:38","name":"bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221019220638.13422-1-david.faust@oracle.com/mbox/"},{"id":5930,"url":"https://patchwork.plctlab.org/api/1.2/patches/5930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com/","msgid":"<06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-19T23:08:54","name":"diagnostics: Allow FEs to keep customizations for middle end [PR101551, PR106274]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/06ea9c1bd7e9b1493a1e740d8b6cf6f72be3db3e.1666220603.git.lhyatt@gmail.com/mbox/"},{"id":5942,"url":"https://patchwork.plctlab.org/api/1.2/patches/5942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020000559.371886-1-whh8b@obs.cr/","msgid":"<20221020000559.371886-1-whh8b@obs.cr>","list_archive_url":null,"date":"2022-10-20T00:05:59","name":"libstdc++: Refactor implementation of operator+ for std::string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020000559.371886-1-whh8b@obs.cr/mbox/"},{"id":5945,"url":"https://patchwork.plctlab.org/api/1.2/patches/5945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com/","msgid":"<8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com>","list_archive_url":null,"date":"2022-10-20T00:37:57","name":"[COMMITTED] PR c++/106654 - Add assume support to VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8601499b-9b56-5ecd-4838-b9fbd120b043@redhat.com/mbox/"},{"id":5957,"url":"https://patchwork.plctlab.org/api/1.2/patches/5957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020020507.616781-1-guillermo.e.martinez@oracle.com/","msgid":"<20221020020507.616781-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-10-20T02:05:07","name":"[v4] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020020507.616781-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":6097,"url":"https://patchwork.plctlab.org/api/1.2/patches/6097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020092917.358DD13494@imap2.suse-dmz.suse.de/","msgid":"<20221020092917.358DD13494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-20T09:29:16","name":"c/107305 - avoid ICEing with invalid GIMPLE input to the GIMPLE FE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020092917.358DD13494@imap2.suse-dmz.suse.de/mbox/"},{"id":6102,"url":"https://patchwork.plctlab.org/api/1.2/patches/6102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-2-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:32","name":"[v4,1/4] RISC-V: Minimal support of z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-2-jiawei@iscas.ac.cn/mbox/"},{"id":6103,"url":"https://patchwork.plctlab.org/api/1.2/patches/6103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-3-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:33","name":"[v4,2/4] RISC-V: Target support for z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-3-jiawei@iscas.ac.cn/mbox/"},{"id":6105,"url":"https://patchwork.plctlab.org/api/1.2/patches/6105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-4-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:34","name":"[v4,3/4] RISC-V: Limit regs use for z*inx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-4-jiawei@iscas.ac.cn/mbox/"},{"id":6104,"url":"https://patchwork.plctlab.org/api/1.2/patches/6104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-5-jiawei@iscas.ac.cn/","msgid":"<20221020093235.5071-5-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-10-20T09:32:35","name":"[v4,4/4] RISC-V: Add zhinx/zhinxmin testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020093235.5071-5-jiawei@iscas.ac.cn/mbox/"},{"id":6108,"url":"https://patchwork.plctlab.org/api/1.2/patches/6108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0z27s0v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:39:44","name":"[pushed] aarch64: Fix matching of BRKNS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0z27s0v.fsf@arm.com/mbox/"},{"id":6109,"url":"https://patchwork.plctlab.org/api/1.2/patches/6109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk04u7rz0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:40:51","name":"[pushed] aarch64: Prevent generation of /M BRKAS and BRKBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk04u7rz0.fsf@arm.com/mbox/"},{"id":6111,"url":"https://patchwork.plctlab.org/api/1.2/patches/6111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedv27ry0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:41:27","name":"[pushed] aarch64: Replace CONSTEXPR with constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedv27ry0.fsf@arm.com/mbox/"},{"id":6112,"url":"https://patchwork.plctlab.org/api/1.2/patches/6112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rla7rwz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:42:04","name":"[pushed] aarch64: Use using directives to inherit constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rla7rwz.fsf@arm.com/mbox/"},{"id":6110,"url":"https://patchwork.plctlab.org/api/1.2/patches/6110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35bi7rw0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T09:42:39","name":"[pushed] aarch64: Commonise some folding code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35bi7rw0.fsf@arm.com/mbox/"},{"id":6113,"url":"https://patchwork.plctlab.org/api/1.2/patches/6113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7u6hl7c.fsf@euler.schwinge.homeip.net/","msgid":"<87o7u6hl7c.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T09:56:55","name":"Make '\''autoreconf'\'' work for '\''gcc'\'', '\''libobjc'\'' (was: [PATCH] regenerate configure files and config.h.in files)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7u6hl7c.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6128,"url":"https://patchwork.plctlab.org/api/1.2/patches/6128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lepahkt3.fsf@euler.schwinge.homeip.net/","msgid":"<87lepahkt3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T10:05:28","name":"amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421] (was: [PATCH] [og12] amdgcn: Use FLAT addressing for all functions with pointer arguments)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lepahkt3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6140,"url":"https://patchwork.plctlab.org/api/1.2/patches/6140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zyhk5r.fsf@euler.schwinge.homeip.net/","msgid":"<87h6zyhk5r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T10:19:28","name":"Add '\''libgomp.oacc-c-c++-common/private-big-1.c'\'' [PR105421] (was: amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zyhk5r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6151,"url":"https://patchwork.plctlab.org/api/1.2/patches/6151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de/","msgid":"<20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-20T10:49:42","name":"Avoid PHI - PHI recurrence in vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020104942.DDA6113AF5@imap2.suse-dmz.suse.de/mbox/"},{"id":6154,"url":"https://patchwork.plctlab.org/api/1.2/patches/6154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020110305.23A3033E79@hamza.pair.com/","msgid":"<20221020110305.23A3033E79@hamza.pair.com>","list_archive_url":null,"date":"2022-10-20T11:03:03","name":"[committed] wwwdocs: *: Omit trailing slash for tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020110305.23A3033E79@hamza.pair.com/mbox/"},{"id":6155,"url":"https://patchwork.plctlab.org/api/1.2/patches/6155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a65qhhk0.fsf@euler.schwinge.homeip.net/","msgid":"<87a65qhhk0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-20T11:15:43","name":"Remove support for Intel MIC offloading (was: [PATCH] Remove dead code.)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a65qhhk0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":6162,"url":"https://patchwork.plctlab.org/api/1.2/patches/6162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-10-20T11:38:43","name":"Add '\''gcc.dg/tree-ssa/pr107195-3.c'\'' [PR107195] (was: Add '\''c-c++-common/torture/pr107195-1.c'\'' [PR107195] (was: [COMMITTED] [PR107195] Set range to zero when nonzero mask is 0.))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1taencs.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":6171,"url":"https://patchwork.plctlab.org/api/1.2/patches/6171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5Qw0au5ahZKvj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:04:19","name":"[committed] passes: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5Qw0au5ahZKvj@tucnak/mbox/"},{"id":6172,"url":"https://patchwork.plctlab.org/api/1.2/patches/6172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5fSXzOgOZcX67@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:05:17","name":"[committed] testsuite: Add some missing -Wno-psabi options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1E5fSXzOgOZcX67@tucnak/mbox/"},{"id":6182,"url":"https://patchwork.plctlab.org/api/1.2/patches/6182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FDkdIxfNGPH7KZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T12:48:17","name":"match.pd: Fix up gcc.dg/pr54346.c on i686-linux [PR54346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FDkdIxfNGPH7KZ@tucnak/mbox/"},{"id":6183,"url":"https://patchwork.plctlab.org/api/1.2/patches/6183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020125615.2198195-1-arsen@aarsen.me/","msgid":"<20221020125615.2198195-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T12:56:16","name":"libstdc++: Don'\''t use gstdint.h anymore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020125615.2198195-1-arsen@aarsen.me/mbox/"},{"id":6210,"url":"https://patchwork.plctlab.org/api/1.2/patches/6210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f65c009b-bbff-3358-b3f4-c4ce73f01d7c@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T13:58:09","name":"vect: Fix vectype when widening container type in bitfield pattern [PR107326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f65c009b-bbff-3358-b3f4-c4ce73f01d7c@arm.com/mbox/"},{"id":6211,"url":"https://patchwork.plctlab.org/api/1.2/patches/6211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020140740.415427-1-ppalka@redhat.com/","msgid":"<20221020140740.415427-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:07:40","name":"c++ modules: handle CONCEPT_DECL in node_template_info [PR102963]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020140740.415427-1-ppalka@redhat.com/mbox/"},{"id":6215,"url":"https://patchwork.plctlab.org/api/1.2/patches/6215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-1-aldyh@redhat.com/","msgid":"<20221020141336.228799-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:13:35","name":"[COMMITTED] Replace finite_operands_p with maybe_isnan.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-1-aldyh@redhat.com/mbox/"},{"id":6214,"url":"https://patchwork.plctlab.org/api/1.2/patches/6214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-2-aldyh@redhat.com/","msgid":"<20221020141336.228799-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T14:13:36","name":"[COMMITTED] Do not set NAN flags for VARYING ranges when !HONOR_NANS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020141336.228799-2-aldyh@redhat.com/mbox/"},{"id":6221,"url":"https://patchwork.plctlab.org/api/1.2/patches/6221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020142019.2418744-1-arsen@aarsen.me/","msgid":"<20221020142019.2418744-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T14:20:19","name":"[v2] libstdc++: Don'\''t use gstdint.h anymore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020142019.2418744-1-arsen@aarsen.me/mbox/"},{"id":6224,"url":"https://patchwork.plctlab.org/api/1.2/patches/6224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FdaWQjQMbkJ3rB@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-20T14:38:33","name":"c++, v2: Fix up mangling ICE with void{} [PR106863]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1FdaWQjQMbkJ3rB@tucnak/mbox/"},{"id":6235,"url":"https://patchwork.plctlab.org/api/1.2/patches/6235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020145849.2459976-1-arsen@aarsen.me/","msgid":"<20221020145849.2459976-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T14:58:53","name":"libstdc++: Make placeholders inline when inline variables are available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020145849.2459976-1-arsen@aarsen.me/mbox/"},{"id":6265,"url":"https://patchwork.plctlab.org/api/1.2/patches/6265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020154948.2511787-1-arsen@aarsen.me/","msgid":"<20221020154948.2511787-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-10-20T15:49:50","name":"libstdc++: Enable building libstdc++.{a,so} when !HOSTED","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020154948.2511787-1-arsen@aarsen.me/mbox/"},{"id":6282,"url":"https://patchwork.plctlab.org/api/1.2/patches/6282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz/","msgid":"<33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz>","list_archive_url":null,"date":"2022-10-20T16:07:38","name":"[(pushed)] Remove dead link to Buildbot.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33d3376e-0ecd-6fd1-c0be-e4aaf63e7b9a@suse.cz/mbox/"},{"id":6284,"url":"https://patchwork.plctlab.org/api/1.2/patches/6284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020161414.7430-1-julian@codesourcery.com/","msgid":"<20221020161414.7430-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-10-20T16:14:13","name":"OpenMP: Duplicate checking for map clauses in Fortran (PR107214)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020161414.7430-1-julian@codesourcery.com/mbox/"},{"id":6298,"url":"https://patchwork.plctlab.org/api/1.2/patches/6298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfSSoVe+gmnco1uwJiE6=VFHboNXweEehqLsw763c5OwwA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T16:33:40","name":"PATCH: c++tools: fix compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfSSoVe+gmnco1uwJiE6=VFHboNXweEehqLsw763c5OwwA@mail.gmail.com/mbox/"},{"id":6299,"url":"https://patchwork.plctlab.org/api/1.2/patches/6299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020164633.256422-1-aldyh@redhat.com/","msgid":"<20221020164633.256422-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T16:46:33","name":"[COMMITTED] A false UNORDERED_ means neither operand can be a NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020164633.256422-1-aldyh@redhat.com/mbox/"},{"id":6300,"url":"https://patchwork.plctlab.org/api/1.2/patches/6300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com/","msgid":"<562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com>","list_archive_url":null,"date":"2022-10-20T16:50:44","name":"Fix uninitialized variable warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/562bb602-4a49-46b5-acd2-5755372aa755@eagercon.com/mbox/"},{"id":6303,"url":"https://patchwork.plctlab.org/api/1.2/patches/6303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020165734.1113688-1-hjl.tools@gmail.com/","msgid":"<20221020165734.1113688-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-20T16:57:34","name":"Always use TYPE_MODE instead of DECL_MODE for vector field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020165734.1113688-1-hjl.tools@gmail.com/mbox/"},{"id":6312,"url":"https://patchwork.plctlab.org/api/1.2/patches/6312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffef327d-54c2-1c52-319a-419d11c60bf0@eagerm.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T17:35:37","name":"Microblaze: Fix uninitialized variable warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffef327d-54c2-1c52-319a-419d11c60bf0@eagerm.com/mbox/"},{"id":6313,"url":"https://patchwork.plctlab.org/api/1.2/patches/6313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com/","msgid":"<3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com>","list_archive_url":null,"date":"2022-10-20T17:38:08","name":"[OG12] libgomp.c-c++-common/requires-4.c: dg-xfail-run-if for USM with -foffload-memory=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3df859fd-fb25-1930-5448-33299b51549a@codesourcery.com/mbox/"},{"id":6315,"url":"https://patchwork.plctlab.org/api/1.2/patches/6315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdea12bb-4d15-62a1-5e55-5948434568ab@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-20T17:41:53","name":"[OG12] omp-oacc-kernels-decompose.cc: fix -fcompare-debug with GIMPLE_DEBUG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdea12bb-4d15-62a1-5e55-5948434568ab@codesourcery.com/mbox/"},{"id":6364,"url":"https://patchwork.plctlab.org/api/1.2/patches/6364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194222.259811-1-aldyh@redhat.com/","msgid":"<20221020194222.259811-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T19:42:22","name":"[COMMITTED] Add op[12]_range for UNORDERED_LT entries in range-op.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194222.259811-1-aldyh@redhat.com/mbox/"},{"id":6366,"url":"https://patchwork.plctlab.org/api/1.2/patches/6366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194326.260151-1-aldyh@redhat.com/","msgid":"<20221020194326.260151-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-20T19:43:26","name":"[COMMITTED,PR,c++/106654] Handle non-irange ranges in get_range_global for default defs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020194326.260151-1-aldyh@redhat.com/mbox/"},{"id":6376,"url":"https://patchwork.plctlab.org/api/1.2/patches/6376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020202053.3389227-1-jason@redhat.com/","msgid":"<20221020202053.3389227-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-20T20:20:53","name":"[RFA] tree: add build_string_literal overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020202053.3389227-1-jason@redhat.com/mbox/"},{"id":6397,"url":"https://patchwork.plctlab.org/api/1.2/patches/6397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020204825.3248771-1-torbjorn.svensson@foss.st.com/","msgid":"<20221020204825.3248771-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-20T20:48:26","name":"cpp/remap: Only override if string matched","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020204825.3248771-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":6423,"url":"https://patchwork.plctlab.org/api/1.2/patches/6423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020215402.ED7CC33E63@hamza.pair.com/","msgid":"<20221020215402.ED7CC33E63@hamza.pair.com>","list_archive_url":null,"date":"2022-10-20T21:54:01","name":"[committed] wwwdocs: *: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221020215402.ED7CC33E63@hamza.pair.com/mbox/"},{"id":6471,"url":"https://patchwork.plctlab.org/api/1.2/patches/6471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ0PR11MB5600A9CDD52DBEC97E81257D9E2D9@SJ0PR11MB5600.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-21T01:52:06","name":"Ping^3 [PATCH V2] Add attribute hot judgement for INLINE_HINT_known_hot hint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ0PR11MB5600A9CDD52DBEC97E81257D9E2D9@SJ0PR11MB5600.namprd11.prod.outlook.com/mbox/"},{"id":6491,"url":"https://patchwork.plctlab.org/api/1.2/patches/6491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/faee7f9c-aef5-33e7-5f22-a52464ee4c35@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-21T02:58:35","name":"xtensa: Make register A0 allocable for the CALL0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/faee7f9c-aef5-33e7-5f22-a52464ee4c35@yahoo.co.jp/mbox/"},{"id":6510,"url":"https://patchwork.plctlab.org/api/1.2/patches/6510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021050159.121335-1-monk.chiang@sifive.com/","msgid":"<20221021050159.121335-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2022-10-21T05:01:59","name":"RISC-V: Add type attribute for atomic instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021050159.121335-1-monk.chiang@sifive.com/mbox/"},{"id":6532,"url":"https://patchwork.plctlab.org/api/1.2/patches/6532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021065447.GA10032@delia/","msgid":"<20221021065447.GA10032@delia>","list_archive_url":null,"date":"2022-10-21T06:54:48","name":"[committed] Don'\''t build readline/libreadline.a, when --with-system-readline is supplied","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021065447.GA10032@delia/mbox/"},{"id":6533,"url":"https://patchwork.plctlab.org/api/1.2/patches/6533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021071435.00F4633E4A@hamza.pair.com/","msgid":"<20221021071435.00F4633E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-21T07:14:31","name":"[committed] wwwdocs: style: Simplify handling of containers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021071435.00F4633E4A@hamza.pair.com/mbox/"},{"id":6534,"url":"https://patchwork.plctlab.org/api/1.2/patches/6534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JHE6thlGROTB36@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:15:31","name":"i386: Fix up BFmode comparisons in conditional moves [PR107322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JHE6thlGROTB36@tucnak/mbox/"},{"id":6537,"url":"https://patchwork.plctlab.org/api/1.2/patches/6537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JI5QFI4PPKRDJk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:23:17","name":"builtins: Add __builtin_nextafterf16b builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JI5QFI4PPKRDJk@tucnak/mbox/"},{"id":6540,"url":"https://patchwork.plctlab.org/api/1.2/patches/6540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKSqMSPD9xR8qk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:29:14","name":"libstdc++: Small extended float support tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKSqMSPD9xR8qk@tucnak/mbox/"},{"id":6541,"url":"https://patchwork.plctlab.org/api/1.2/patches/6541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKrxD7/o9itqqG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:30:55","name":"c++, v2: Don'\''t shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_constant_expression [PR107295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1JKrxD7/o9itqqG@tucnak/mbox/"},{"id":6542,"url":"https://patchwork.plctlab.org/api/1.2/patches/6542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0z1ljk2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-10-21T07:31:09","name":"[zero-call-used-regs] Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0z1ljk2.fsf@lxoliva.fsfla.org/mbox/"},{"id":6599,"url":"https://patchwork.plctlab.org/api/1.2/patches/6599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021091621.335F21331A@imap2.suse-dmz.suse.de/","msgid":"<20221021091621.335F21331A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-21T09:16:20","name":"tree-optimization/107323 - loop distribution partition ordering issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021091621.335F21331A@imap2.suse-dmz.suse.de/mbox/"},{"id":6607,"url":"https://patchwork.plctlab.org/api/1.2/patches/6607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021095119.473425-1-jwakely@redhat.com/","msgid":"<20221021095119.473425-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-21T09:51:19","name":"[committed] libstdc++: Fix std::move_only_function for incomplete parameter types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021095119.473425-1-jwakely@redhat.com/mbox/"},{"id":6668,"url":"https://patchwork.plctlab.org/api/1.2/patches/6668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021122414.3375395-1-torbjorn.svensson@foss.st.com/","msgid":"<20221021122414.3375395-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-21T12:24:15","name":"lto: Always quote path to touch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021122414.3375395-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":6709,"url":"https://patchwork.plctlab.org/api/1.2/patches/6709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021131426.308205-1-aldyh@redhat.com/","msgid":"<20221021131426.308205-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-21T13:14:26","name":"Rename nonzero_bits to known_zero_bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021131426.308205-1-aldyh@redhat.com/mbox/"},{"id":6729,"url":"https://patchwork.plctlab.org/api/1.2/patches/6729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-2-dimitrije.milosevic@syrmia.com/","msgid":"<20221021135203.626255-2-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-10-21T13:52:02","name":"[1/2] ivopts: Revert computation of address cost complexity.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-2-dimitrije.milosevic@syrmia.com/mbox/"},{"id":6731,"url":"https://patchwork.plctlab.org/api/1.2/patches/6731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-3-dimitrije.milosevic@syrmia.com/","msgid":"<20221021135203.626255-3-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-10-21T13:52:03","name":"[2/2] ivopts: Consider number of invariants when calculating register pressure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021135203.626255-3-dimitrije.milosevic@syrmia.com/mbox/"},{"id":6800,"url":"https://patchwork.plctlab.org/api/1.2/patches/6800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1K9+NDQQlJp87YK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T15:42:48","name":"builtins: Add various complex builtins for _Float{16,32,64,128,32x,64x,128x}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1K9+NDQQlJp87YK@tucnak/mbox/"},{"id":6804,"url":"https://patchwork.plctlab.org/api/1.2/patches/6804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1LBm4u+R3Ka28Dj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-21T15:58:19","name":"libstdc++-v3: support for extended floating point types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1LBm4u+R3Ka28Dj@tucnak/mbox/"},{"id":6805,"url":"https://patchwork.plctlab.org/api/1.2/patches/6805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-1-dmalcolm@redhat.com/","msgid":"<20221021160150.1600351-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-21T16:01:49","name":"[1/2] Add gcc/make-unique.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-1-dmalcolm@redhat.com/mbox/"},{"id":6806,"url":"https://patchwork.plctlab.org/api/1.2/patches/6806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-2-dmalcolm@redhat.com/","msgid":"<20221021160150.1600351-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-21T16:01:50","name":"[2/2] analyzer: use std::unique_ptr for pending_diagnostic/note","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021160150.1600351-2-dmalcolm@redhat.com/mbox/"},{"id":6863,"url":"https://patchwork.plctlab.org/api/1.2/patches/6863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com/","msgid":"<129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com>","list_archive_url":null,"date":"2022-10-21T16:42:31","name":"vect: Make vect_check_gather_scatter reject offsets that aren'\''t multiples of BITS_PER_UNIT [PR107346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/129db1b0-0d2a-b768-bc80-9f73d665e8f8@arm.com/mbox/"},{"id":7021,"url":"https://patchwork.plctlab.org/api/1.2/patches/7021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210212214320.150427@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-10-21T22:15:11","name":"c: tree: target: C2x (...) function prototypes and va_start relaxation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2210212214320.150427@digraph.polyomino.org.uk/mbox/"},{"id":7022,"url":"https://patchwork.plctlab.org/api/1.2/patches/7022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfa5eafc-d6a9-dfe3-7bb5-e82932de0add@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-10-21T22:46:13","name":"[v2] xtensa: Make register A0 allocable for the CALL0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfa5eafc-d6a9-dfe3-7bb5-e82932de0add@yahoo.co.jp/mbox/"},{"id":7023,"url":"https://patchwork.plctlab.org/api/1.2/patches/7023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232824.1093138-1-polacek@redhat.com/","msgid":"<20221021232824.1093138-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-21T23:28:24","name":"c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232824.1093138-1-polacek@redhat.com/mbox/"},{"id":7024,"url":"https://patchwork.plctlab.org/api/1.2/patches/7024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232922.1093229-1-polacek@redhat.com/","msgid":"<20221021232922.1093229-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-21T23:29:22","name":"c++: ICE with invalid structured bindings [PR107276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221021232922.1093229-1-polacek@redhat.com/mbox/"},{"id":7880,"url":"https://patchwork.plctlab.org/api/1.2/patches/7880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com/","msgid":"<9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com>","list_archive_url":null,"date":"2022-10-22T11:54:20","name":"libgcc: Update '\''gthr-mcf.h'\'' to include a dedicated header for libobjc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d2923cb-90cb-a0da-3b80-ac9e543af880@126.com/mbox/"},{"id":7893,"url":"https://patchwork.plctlab.org/api/1.2/patches/7893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022142529.376406-1-aldyh@redhat.com/","msgid":"<20221022142529.376406-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-22T14:25:29","name":"[COMMITTED] Update selftest such that [-Inf, +Inf] is always VARYING for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022142529.376406-1-aldyh@redhat.com/mbox/"},{"id":7917,"url":"https://patchwork.plctlab.org/api/1.2/patches/7917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022175911.08E2733ED8@hamza.pair.com/","msgid":"<20221022175911.08E2733ED8@hamza.pair.com>","list_archive_url":null,"date":"2022-10-22T17:59:08","name":"[committed] wwwdocs: index: Rotate news from 2018-08 to 2020-12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221022175911.08E2733ED8@hamza.pair.com/mbox/"},{"id":7967,"url":"https://patchwork.plctlab.org/api/1.2/patches/7967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023093454.7et6anfgzksfssxg@begin/","msgid":"<20221023093454.7et6anfgzksfssxg@begin>","list_archive_url":null,"date":"2022-10-23T09:34:54","name":": Fix static-pie on Hurd target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023093454.7et6anfgzksfssxg@begin/mbox/"},{"id":8042,"url":"https://patchwork.plctlab.org/api/1.2/patches/8042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023145633.501586-1-aldyh@redhat.com/","msgid":"<20221023145633.501586-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-23T14:56:33","name":"[PR,tree-optimization/107365] Check HONOR_NANS instead of flag_finite_math_only in frange:verify_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023145633.501586-1-aldyh@redhat.com/mbox/"},{"id":8060,"url":"https://patchwork.plctlab.org/api/1.2/patches/8060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023165224.97237-1-keegan@undefinedbehaviour.org/","msgid":"<20221023165224.97237-1-keegan@undefinedbehaviour.org>","list_archive_url":null,"date":"2022-10-23T16:52:24","name":"c: If -fplan9-extensions, allow duplicate field declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221023165224.97237-1-keegan@undefinedbehaviour.org/mbox/"},{"id":8102,"url":"https://patchwork.plctlab.org/api/1.2/patches/8102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024002828.28861-1-mark@harmstone.com/","msgid":"<20221024002828.28861-1-mark@harmstone.com>","list_archive_url":null,"date":"2022-10-24T00:28:28","name":"Add -gcodeview option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024002828.28861-1-mark@harmstone.com/mbox/"},{"id":8110,"url":"https://patchwork.plctlab.org/api/1.2/patches/8110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024013916.14043-1-juzhe.zhong@rivai.ai/","msgid":"<20221024013916.14043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T01:39:16","name":"RISC-V: Fix REG_CLASS_CONTENTS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024013916.14043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8115,"url":"https://patchwork.plctlab.org/api/1.2/patches/8115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024015344.22546-1-juzhe.zhong@rivai.ai/","msgid":"<20221024015344.22546-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T01:53:44","name":"RISC-V: Support (set (mem) (const_poly_int)) handling and remove TI/TF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024015344.22546-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8116,"url":"https://patchwork.plctlab.org/api/1.2/patches/8116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020312.26851-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020312.26851-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:03:12","name":"RISC-V: Support (set (mem) (const_poly_int))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020312.26851-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8121,"url":"https://patchwork.plctlab.org/api/1.2/patches/8121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020524.27704-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020524.27704-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:05:24","name":"RISC-V: Remove unused TI/TF vector modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020524.27704-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8122,"url":"https://patchwork.plctlab.org/api/1.2/patches/8122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020853.29547-1-juzhe.zhong@rivai.ai/","msgid":"<20221024020853.29547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:08:53","name":"RISC-V: Support load/store in mov pattern for RVV modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024020853.29547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8125,"url":"https://patchwork.plctlab.org/api/1.2/patches/8125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022028.197505-1-juzhe.zhong@rivai.ai/","msgid":"<20221024022028.197505-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:20:28","name":"RISC-V: Replace CONSTEXPR with constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022028.197505-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8127,"url":"https://patchwork.plctlab.org/api/1.2/patches/8127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022737.52627-1-juzhe.zhong@rivai.ai/","msgid":"<20221024022737.52627-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T02:27:37","name":"RISC-V: Support (set (mem) (const_poly_int))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024022737.52627-1-juzhe.zhong@rivai.ai/mbox/"},{"id":8129,"url":"https://patchwork.plctlab.org/api/1.2/patches/8129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024024604.18324-1-lili.cui@intel.com/","msgid":"<20221024024604.18324-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-10-24T02:46:04","name":"ix86: Suggest unroll factor for loop vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024024604.18324-1-lili.cui@intel.com/mbox/"},{"id":8137,"url":"https://patchwork.plctlab.org/api/1.2/patches/8137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4b84496-105a-200f-3a88-2b0a33ce638d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T03:14:20","name":"[PATCH-2,rs6000] Reverse V8HI on Power8 by vector rotation [PR100866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4b84496-105a-200f-3a88-2b0a33ce638d@linux.ibm.com/mbox/"},{"id":8181,"url":"https://patchwork.plctlab.org/api/1.2/patches/8181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y8dfwmYoaac6EW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-24T07:19:17","name":"c, c++: Fix up excess precision handling of scalar_to_vector conversion [PR107358]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y8dfwmYoaac6EW@tucnak/mbox/"},{"id":8184,"url":"https://patchwork.plctlab.org/api/1.2/patches/8184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y+XfMW7lkamX2r@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-24T07:27:25","name":"c++: Fix up constexpr handling of char/signed char/short pre/post inc/decrement [PR105774]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1Y+XfMW7lkamX2r@tucnak/mbox/"},{"id":8228,"url":"https://patchwork.plctlab.org/api/1.2/patches/8228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1910003.PYKUYFuaPT@fomalhaut/","msgid":"<1910003.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:25:10","name":"Relax assertion in profile.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1910003.PYKUYFuaPT@fomalhaut/mbox/"},{"id":8247,"url":"https://patchwork.plctlab.org/api/1.2/patches/8247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3519176.R56niFO833@fomalhaut/","msgid":"<3519176.R56niFO833@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:54:55","name":"ARM: Make ARMv8-M attribute cmse_nonsecure_call work in Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3519176.R56niFO833@fomalhaut/mbox/"},{"id":8248,"url":"https://patchwork.plctlab.org/api/1.2/patches/8248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1806820.atdPhlSkOF@fomalhaut/","msgid":"<1806820.atdPhlSkOF@fomalhaut>","list_archive_url":null,"date":"2022-10-24T08:57:31","name":"Aarch64: Do not define DONT_USE_BUILTIN_SETJMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1806820.atdPhlSkOF@fomalhaut/mbox/"},{"id":8252,"url":"https://patchwork.plctlab.org/api/1.2/patches/8252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024090125.16371-1-haochen.jiang@intel.com/","msgid":"<20221024090125.16371-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-24T09:01:25","name":"Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024090125.16371-1-haochen.jiang@intel.com/mbox/"},{"id":8288,"url":"https://patchwork.plctlab.org/api/1.2/patches/8288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024095530.16284-1-kito.cheng@sifive.com/","msgid":"<20221024095530.16284-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-10-24T09:55:30","name":"RISC-V: Add h extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024095530.16284-1-kito.cheng@sifive.com/mbox/"},{"id":8324,"url":"https://patchwork.plctlab.org/api/1.2/patches/8324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com/","msgid":"<95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com>","list_archive_url":null,"date":"2022-10-24T10:43:08","name":"vect: Fix wrong shift_n after widening on BE [PR107338]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95d598d7-4f00-ad36-08f9-4b5942e48e42@linux.ibm.com/mbox/"},{"id":9131,"url":"https://patchwork.plctlab.org/api/1.2/patches/9131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024133316.33026-1-aldyh@redhat.com/","msgid":"<20221024133316.33026-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-24T13:33:16","name":"[PR,tree-optimization/107355] Handle NANs in abs range-op entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024133316.33026-1-aldyh@redhat.com/mbox/"},{"id":9516,"url":"https://patchwork.plctlab.org/api/1.2/patches/9516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024142414.161380-1-juzhe.zhong@rivai.ai/","msgid":"<20221024142414.161380-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-24T14:24:14","name":"RISC-V: Fix typo.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024142414.161380-1-juzhe.zhong@rivai.ai/mbox/"},{"id":9688,"url":"https://patchwork.plctlab.org/api/1.2/patches/9688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com/","msgid":"<7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com>","list_archive_url":null,"date":"2022-10-24T16:26:44","name":"[OG12,commit] amdgcn, libgomp: USM allocation update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bb722dc-0e73-dce2-d05f-d471663366a4@codesourcery.com/mbox/"},{"id":9689,"url":"https://patchwork.plctlab.org/api/1.2/patches/9689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024162726.3463437-1-ppalka@redhat.com/","msgid":"<20221024162726.3463437-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-24T16:27:26","name":"c++: remove use_default_args parm of coerce_template_parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024162726.3463437-1-ppalka@redhat.com/mbox/"},{"id":9730,"url":"https://patchwork.plctlab.org/api/1.2/patches/9730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9795e65-9425-9216-0556-a82266b7c336@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T16:38:23","name":"[OG12,commit] amdgcn: disallow USM on gfx908","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9795e65-9425-9216-0556-a82266b7c336@codesourcery.com/mbox/"},{"id":9771,"url":"https://patchwork.plctlab.org/api/1.2/patches/9771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com/","msgid":"<264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com>","list_archive_url":null,"date":"2022-10-24T16:50:40","name":"[OG12,commit] vect: WORKAROUND vectorizer bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/264e9c27-cef4-b2a5-8758-a8b621428e01@codesourcery.com/mbox/"},{"id":9870,"url":"https://patchwork.plctlab.org/api/1.2/patches/9870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1bHteXKidcJWWie@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-24T17:13:25","name":"[v2] c++: ICE with invalid structured bindings [PR107276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1bHteXKidcJWWie@redhat.com/mbox/"},{"id":9925,"url":"https://patchwork.plctlab.org/api/1.2/patches/9925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd09944-8210-be23-dc1b-5a435f8eae26@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-24T18:24:22","name":"[(pushed)] x86: fix VENDOR_MAX enum value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd09944-8210-be23-dc1b-5a435f8eae26@suse.cz/mbox/"},{"id":10070,"url":"https://patchwork.plctlab.org/api/1.2/patches/10070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt9lvw3y.fsf@euler.schwinge.homeip.net/","msgid":"<87mt9lvw3y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-24T19:51:13","name":"libgomp/nvptx: Prepare for reverse-offload callback handling, resolve spurious SIGSEGVs (was: [Patch][v5] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt9lvw3y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":10136,"url":"https://patchwork.plctlab.org/api/1.2/patches/10136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024201927.300C733E59@hamza.pair.com/","msgid":"<20221024201927.300C733E59@hamza.pair.com>","list_archive_url":null,"date":"2022-10-24T20:19:24","name":"[committed] wwwdocs: search: Remove trailing slashes on tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024201927.300C733E59@hamza.pair.com/mbox/"},{"id":10275,"url":"https://patchwork.plctlab.org/api/1.2/patches/10275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205233.1760101-1-dmalcolm@redhat.com/","msgid":"<20221024205233.1760101-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:52:33","name":"[committed] analyzer: handle \"pipe\" and \"pipe2\" [PR106300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205233.1760101-1-dmalcolm@redhat.com/mbox/"},{"id":10276,"url":"https://patchwork.plctlab.org/api/1.2/patches/10276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205312.1760173-1-dmalcolm@redhat.com/","msgid":"<20221024205312.1760173-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:53:12","name":"[committed] analyzer: simplify sm_state_map lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205312.1760173-1-dmalcolm@redhat.com/mbox/"},{"id":10277,"url":"https://patchwork.plctlab.org/api/1.2/patches/10277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205348.1760258-1-dmalcolm@redhat.com/","msgid":"<20221024205348.1760258-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:53:48","name":"[committed] analyzer: handle (NULL == &VAR) [PR107345]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205348.1760258-1-dmalcolm@redhat.com/mbox/"},{"id":10278,"url":"https://patchwork.plctlab.org/api/1.2/patches/10278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205453.1760357-1-dmalcolm@redhat.com/","msgid":"<20221024205453.1760357-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:54:53","name":"[committed] diagnostics: fix ICE in sarif output with NULL filename [PR107366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205453.1760357-1-dmalcolm@redhat.com/mbox/"},{"id":10279,"url":"https://patchwork.plctlab.org/api/1.2/patches/10279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205554.1760903-1-dmalcolm@redhat.com/","msgid":"<20221024205554.1760903-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-24T20:55:54","name":"[commited] analyzer: fix ICE on va_copy [PR107349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221024205554.1760903-1-dmalcolm@redhat.com/mbox/"},{"id":10477,"url":"https://patchwork.plctlab.org/api/1.2/patches/10477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025032238.322211-1-juzhe.zhong@rivai.ai/","msgid":"<20221025032238.322211-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-25T03:22:38","name":"RISC-V: ADJUST_NUNITS according to -march.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025032238.322211-1-juzhe.zhong@rivai.ai/mbox/"},{"id":10484,"url":"https://patchwork.plctlab.org/api/1.2/patches/10484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz/","msgid":"<766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz>","list_archive_url":null,"date":"2022-10-25T04:23:53","name":"[pushed] i386: fix pedantic warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/766301d1-6219-c5ac-796b-a3c507912cdd@suse.cz/mbox/"},{"id":10485,"url":"https://patchwork.plctlab.org/api/1.2/patches/10485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz/","msgid":"<1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz>","list_archive_url":null,"date":"2022-10-25T05:01:02","name":"riscv: fix cross compiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1842f47d-a6e7-8a9e-3ec7-82c7f7d33f57@suse.cz/mbox/"},{"id":10510,"url":"https://patchwork.plctlab.org/api/1.2/patches/10510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025061733.41146-1-monk.chiang@sifive.com/","msgid":"<20221025061733.41146-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2022-10-25T06:17:33","name":"RISC-V: Recognized Svinval and Svnapot extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025061733.41146-1-monk.chiang@sifive.com/mbox/"},{"id":10577,"url":"https://patchwork.plctlab.org/api/1.2/patches/10577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025080230.C01D613A64@imap2.suse-dmz.suse.de/","msgid":"<20221025080230.C01D613A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T08:02:30","name":"tree-optimization/100756 - niter analysis and folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025080230.C01D613A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10591,"url":"https://patchwork.plctlab.org/api/1.2/patches/10591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1eiocGGtzckn57A@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:47:29","name":"[committed] gimplify: Don'\''t add GIMPLE_ASSUME if errors were seen [PR107369]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1eiocGGtzckn57A@tucnak/mbox/"},{"id":10592,"url":"https://patchwork.plctlab.org/api/1.2/patches/10592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ei1ZtN132Hr3h3@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:48:21","name":"[committed] gimplify: Call gimple_boolify on IFN_ASSUME argument [PR107368]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ei1ZtN132Hr3h3@tucnak/mbox/"},{"id":10593,"url":"https://patchwork.plctlab.org/api/1.2/patches/10593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ejAIVkd8y4CNJW@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-25T08:49:04","name":"[committed] gimplify: Fix comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ejAIVkd8y4CNJW@tucnak/mbox/"},{"id":10640,"url":"https://patchwork.plctlab.org/api/1.2/patches/10640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de/","msgid":"<20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T09:15:09","name":"Move NOP stripping in SCEV analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025091509.A7EBC134CA@imap2.suse-dmz.suse.de/mbox/"},{"id":10685,"url":"https://patchwork.plctlab.org/api/1.2/patches/10685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025100103.1736564-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025100103.1736564-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T10:01:04","name":"IRA: Make sure array is big enough","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025100103.1736564-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10697,"url":"https://patchwork.plctlab.org/api/1.2/patches/10697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025101132.58E5F13A64@imap2.suse-dmz.suse.de/","msgid":"<20221025101132.58E5F13A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T10:11:31","name":"tree-optimization/107176 - SCEV analysis association issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025101132.58E5F13A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10780,"url":"https://patchwork.plctlab.org/api/1.2/patches/10780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025130926.6319B13A64@imap2.suse-dmz.suse.de/","msgid":"<20221025130926.6319B13A64@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-25T13:09:26","name":"unswitch most profitable condition first","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025130926.6319B13A64@imap2.suse-dmz.suse.de/mbox/"},{"id":10790,"url":"https://patchwork.plctlab.org/api/1.2/patches/10790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025135323.98303-1-juzhe.zhong@rivai.ai/","msgid":"<20221025135323.98303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-25T13:53:23","name":"RISC-V: Fix a mistake in previous patch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025135323.98303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":10831,"url":"https://patchwork.plctlab.org/api/1.2/patches/10831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025141919.1789727-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025141919.1789727-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T14:19:20","name":"c++: Use in-process client when networking is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025141919.1789727-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10860,"url":"https://patchwork.plctlab.org/api/1.2/patches/10860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025151512.1791109-1-torbjorn.svensson@foss.st.com/","msgid":"<20221025151512.1791109-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-25T15:15:13","name":"testsuite: Windows paths use \\ and not /","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025151512.1791109-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":10866,"url":"https://patchwork.plctlab.org/api/1.2/patches/10866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1f+66oVJSTeTkCc@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T15:21:15","name":"[v2] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1f+66oVJSTeTkCc@redhat.com/mbox/"},{"id":10882,"url":"https://patchwork.plctlab.org/api/1.2/patches/10882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0ac4d330fe0803b052aa11e07ac078849a6a828.1666652978.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-10-25T16:29:21","name":"rs6000: Add CCANY; replace signed by ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0ac4d330fe0803b052aa11e07ac078849a6a828.1666652978.git.segher@kernel.crashing.org/mbox/"},{"id":10886,"url":"https://patchwork.plctlab.org/api/1.2/patches/10886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163709.95817-1-jason@redhat.com/","msgid":"<20221025163709.95817-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T16:37:09","name":"[pushed] c++: improve failed constexpr assume diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163709.95817-1-jason@redhat.com/mbox/"},{"id":10887,"url":"https://patchwork.plctlab.org/api/1.2/patches/10887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163750.96139-1-jason@redhat.com/","msgid":"<20221025163750.96139-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T16:37:50","name":"[pushed] c++: constexpr-evaluate more assumes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025163750.96139-1-jason@redhat.com/mbox/"},{"id":10899,"url":"https://patchwork.plctlab.org/api/1.2/patches/10899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025172443.6732-1-david.faust@oracle.com/","msgid":"<20221025172443.6732-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-25T17:24:43","name":"[v2] bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025172443.6732-1-david.faust@oracle.com/mbox/"},{"id":10912,"url":"https://patchwork.plctlab.org/api/1.2/patches/10912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJbH2PyhVRnAgtEPnHc+3-XpdXVVbmV70V2rNmxFh5YRDmb1tw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T17:39:33","name":"tsan: fix test for machines without pthread_cond_clockwait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJbH2PyhVRnAgtEPnHc+3-XpdXVVbmV70V2rNmxFh5YRDmb1tw@mail.gmail.com/mbox/"},{"id":10914,"url":"https://patchwork.plctlab.org/api/1.2/patches/10914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025180506.108938-1-jason@redhat.com/","msgid":"<20221025180506.108938-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-25T18:05:06","name":"[pushed] c++: correct fold_operand change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025180506.108938-1-jason@redhat.com/mbox/"},{"id":10939,"url":"https://patchwork.plctlab.org/api/1.2/patches/10939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025185733.F0F3A33E37@hamza.pair.com/","msgid":"<20221025185733.F0F3A33E37@hamza.pair.com>","list_archive_url":null,"date":"2022-10-25T18:57:30","name":"[committed] wwwdocs: contribute: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025185733.F0F3A33E37@hamza.pair.com/mbox/"},{"id":10973,"url":"https://patchwork.plctlab.org/api/1.2/patches/10973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f068e565-e2a0-2b51-cb63-952e16b7c024@acm.org/","msgid":"","list_archive_url":null,"date":"2022-10-25T20:16:11","name":"c++: Adjust synthetic template parm creation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f068e565-e2a0-2b51-cb63-952e16b7c024@acm.org/mbox/"},{"id":10984,"url":"https://patchwork.plctlab.org/api/1.2/patches/10984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025205901.125058-1-aldyh@redhat.com/","msgid":"<20221025205901.125058-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-25T20:59:01","name":"Convert flag_finite_math_only uses in frange to HONOR_*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025205901.125058-1-aldyh@redhat.com/mbox/"},{"id":10985,"url":"https://patchwork.plctlab.org/api/1.2/patches/10985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025210140.125230-1-aldyh@redhat.com/","msgid":"<20221025210140.125230-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-10-25T21:01:40","name":"[PR,tree-optimization/107394] Canonicalize global franges as they are read back.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221025210140.125230-1-aldyh@redhat.com/mbox/"},{"id":10986,"url":"https://patchwork.plctlab.org/api/1.2/patches/10986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E4C2614134D89E599B691319@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-25T21:06:59","name":"[PUSHED] Start using discriminators in AutoFDO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E4C2614134D89E599B691319@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":11024,"url":"https://patchwork.plctlab.org/api/1.2/patches/11024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3525A6EC99FBB9619679FDBB91309@DS7PR21MB3525.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T00:38:12","name":"[PUSHED] Don'\''t force DWARF4 for AutoFDO tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3525A6EC99FBB9619679FDBB91309@DS7PR21MB3525.namprd21.prod.outlook.com/mbox/"},{"id":11037,"url":"https://patchwork.plctlab.org/api/1.2/patches/11037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026022847.2932438-1-hongtao.liu@intel.com/","msgid":"<20221026022847.2932438-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-26T02:28:47","name":"[x86] Enable V4BFmode and V2BFmode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026022847.2932438-1-hongtao.liu@intel.com/mbox/"},{"id":11070,"url":"https://patchwork.plctlab.org/api/1.2/patches/11070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026055248.94100-1-hongyu.wang@intel.com/","msgid":"<20221026055248.94100-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-10-26T05:52:48","name":"i386: Enable small loop unrolling for O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026055248.94100-1-hongyu.wang@intel.com/mbox/"},{"id":11074,"url":"https://patchwork.plctlab.org/api/1.2/patches/11074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp/","msgid":"<9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp>","list_archive_url":null,"date":"2022-10-26T06:27:51","name":"xtensa: Fix out-of-bounds array access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9871cd37-f2da-ad03-3083-22ff70422ddc@yahoo.co.jp/mbox/"},{"id":11102,"url":"https://patchwork.plctlab.org/api/1.2/patches/11102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026074950.10462-1-sebastian.huber@embedded-brains.de/","msgid":"<20221026074950.10462-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-10-26T07:49:50","name":"riscv/RTEMS: Add RISCV_GCOV_TYPE_SIZE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026074950.10462-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":11104,"url":"https://patchwork.plctlab.org/api/1.2/patches/11104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-2-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:26","name":"[Rust,front-end,v3,01/46] Use DW_ATE_UTF for the Rust '\''char'\'' type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-2-arthur.cohen@embecosm.com/mbox/"},{"id":11109,"url":"https://patchwork.plctlab.org/api/1.2/patches/11109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-3-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:27","name":"[Rust,front-end,v3,02/46] gccrs: Add nessecary hooks for a Rust front-end testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-3-arthur.cohen@embecosm.com/mbox/"},{"id":11112,"url":"https://patchwork.plctlab.org/api/1.2/patches/11112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-4-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:28","name":"[Rust,front-end,v3,03/46] gccrs: Add Debug info testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-4-arthur.cohen@embecosm.com/mbox/"},{"id":11108,"url":"https://patchwork.plctlab.org/api/1.2/patches/11108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-5-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:29","name":"[Rust,front-end,v3,04/46] gccrs: Add link cases testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-5-arthur.cohen@embecosm.com/mbox/"},{"id":11116,"url":"https://patchwork.plctlab.org/api/1.2/patches/11116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-6-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:30","name":"[Rust,front-end,v3,05/46] gccrs: Add general compilation test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-6-arthur.cohen@embecosm.com/mbox/"},{"id":11107,"url":"https://patchwork.plctlab.org/api/1.2/patches/11107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-7-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:31","name":"[Rust,front-end,v3,06/46] gccrs: Add execution test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-7-arthur.cohen@embecosm.com/mbox/"},{"id":11111,"url":"https://patchwork.plctlab.org/api/1.2/patches/11111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-8-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:32","name":"[Rust,front-end,v3,07/46] gccrs: Add gcc-check-target check-rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-8-arthur.cohen@embecosm.com/mbox/"},{"id":11121,"url":"https://patchwork.plctlab.org/api/1.2/patches/11121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-9-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:33","name":"[Rust,front-end,v3,08/46] gccrs: Add Rust front-end base AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-9-arthur.cohen@embecosm.com/mbox/"},{"id":11114,"url":"https://patchwork.plctlab.org/api/1.2/patches/11114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-10-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:34","name":"[Rust,front-end,v3,09/46] gccrs: Add definitions of Rust Items in AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-10-arthur.cohen@embecosm.com/mbox/"},{"id":11127,"url":"https://patchwork.plctlab.org/api/1.2/patches/11127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-11-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:35","name":"[Rust,front-end,v3,10/46] gccrs: Add full definitions of Rust AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-11-arthur.cohen@embecosm.com/mbox/"},{"id":11110,"url":"https://patchwork.plctlab.org/api/1.2/patches/11110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-12-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:36","name":"[Rust,front-end,v3,11/46] gccrs: Add Rust AST visitors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-12-arthur.cohen@embecosm.com/mbox/"},{"id":11113,"url":"https://patchwork.plctlab.org/api/1.2/patches/11113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-13-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:37","name":"[Rust,front-end,v3,12/46] gccrs: Add Lexer for Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-13-arthur.cohen@embecosm.com/mbox/"},{"id":11115,"url":"https://patchwork.plctlab.org/api/1.2/patches/11115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-14-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:38","name":"[Rust,front-end,v3,13/46] gccrs: Add Parser for Rust front-end pt.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-14-arthur.cohen@embecosm.com/mbox/"},{"id":11118,"url":"https://patchwork.plctlab.org/api/1.2/patches/11118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-15-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:39","name":"[Rust,front-end,v3,14/46] gccrs: Add Parser for Rust front-end pt.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-15-arthur.cohen@embecosm.com/mbox/"},{"id":11123,"url":"https://patchwork.plctlab.org/api/1.2/patches/11123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-16-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:40","name":"[Rust,front-end,v3,15/46] gccrs: Add expansion pass for the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-16-arthur.cohen@embecosm.com/mbox/"},{"id":11119,"url":"https://patchwork.plctlab.org/api/1.2/patches/11119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-17-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:41","name":"[Rust,front-end,v3,16/46] gccrs: Add name resolution pass to the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-17-arthur.cohen@embecosm.com/mbox/"},{"id":11122,"url":"https://patchwork.plctlab.org/api/1.2/patches/11122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-18-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:42","name":"[Rust,front-end,v3,17/46] gccrs: Add declarations for Rust HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-18-arthur.cohen@embecosm.com/mbox/"},{"id":11124,"url":"https://patchwork.plctlab.org/api/1.2/patches/11124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-19-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:43","name":"[Rust,front-end,v3,18/46] gccrs: Add HIR definitions and visitor framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-19-arthur.cohen@embecosm.com/mbox/"},{"id":11128,"url":"https://patchwork.plctlab.org/api/1.2/patches/11128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-20-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:44","name":"[Rust,front-end,v3,19/46] gccrs: Add AST to HIR lowering pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-20-arthur.cohen@embecosm.com/mbox/"},{"id":11120,"url":"https://patchwork.plctlab.org/api/1.2/patches/11120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-21-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:45","name":"[Rust,front-end,v3,20/46] gccrs: Add wrapper for make_unique","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-21-arthur.cohen@embecosm.com/mbox/"},{"id":11139,"url":"https://patchwork.plctlab.org/api/1.2/patches/11139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-22-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:46","name":"[Rust,front-end,v3,21/46] gccrs: Add port of FNV hash used during legacy symbol mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-22-arthur.cohen@embecosm.com/mbox/"},{"id":11125,"url":"https://patchwork.plctlab.org/api/1.2/patches/11125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-23-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:47","name":"[Rust,front-end,v3,22/46] gccrs: Add Rust ABI enum helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-23-arthur.cohen@embecosm.com/mbox/"},{"id":11129,"url":"https://patchwork.plctlab.org/api/1.2/patches/11129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-24-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:48","name":"[Rust,front-end,v3,23/46] gccrs: Add Base62 implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-24-arthur.cohen@embecosm.com/mbox/"},{"id":11126,"url":"https://patchwork.plctlab.org/api/1.2/patches/11126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-25-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:49","name":"[Rust,front-end,v3,24/46] gccrs: Add implementation of Optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-25-arthur.cohen@embecosm.com/mbox/"},{"id":11131,"url":"https://patchwork.plctlab.org/api/1.2/patches/11131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-26-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:50","name":"[Rust,front-end,v3,25/46] gccrs: Add attributes checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-26-arthur.cohen@embecosm.com/mbox/"},{"id":11132,"url":"https://patchwork.plctlab.org/api/1.2/patches/11132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-27-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:51","name":"[Rust,front-end,v3,26/46] gccrs: Add helpers mappings canonical path and lang items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-27-arthur.cohen@embecosm.com/mbox/"},{"id":11135,"url":"https://patchwork.plctlab.org/api/1.2/patches/11135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-28-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:52","name":"[Rust,front-end,v3,27/46] gccrs: Add type resolution and trait solving pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-28-arthur.cohen@embecosm.com/mbox/"},{"id":11137,"url":"https://patchwork.plctlab.org/api/1.2/patches/11137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-29-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:53","name":"[Rust,front-end,v3,28/46] gccrs: Add Rust type information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-29-arthur.cohen@embecosm.com/mbox/"},{"id":11145,"url":"https://patchwork.plctlab.org/api/1.2/patches/11145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-30-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:54","name":"[Rust,front-end,v3,29/46] gccrs: Add remaining type system transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-30-arthur.cohen@embecosm.com/mbox/"},{"id":11142,"url":"https://patchwork.plctlab.org/api/1.2/patches/11142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-31-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:55","name":"[Rust,front-end,v3,30/46] gccrs: Add unsafe checks for Rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-31-arthur.cohen@embecosm.com/mbox/"},{"id":11130,"url":"https://patchwork.plctlab.org/api/1.2/patches/11130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-32-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:56","name":"[Rust,front-end,v3,31/46] gccrs: Add const checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-32-arthur.cohen@embecosm.com/mbox/"},{"id":11148,"url":"https://patchwork.plctlab.org/api/1.2/patches/11148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-33-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:57","name":"[Rust,front-end,v3,32/46] gccrs: Add privacy checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-33-arthur.cohen@embecosm.com/mbox/"},{"id":11144,"url":"https://patchwork.plctlab.org/api/1.2/patches/11144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-34-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:58","name":"[Rust,front-end,v3,33/46] gccrs: Add dead code scan on HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-34-arthur.cohen@embecosm.com/mbox/"},{"id":11143,"url":"https://patchwork.plctlab.org/api/1.2/patches/11143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-35-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:17:59","name":"[Rust,front-end,v3,34/46] gccrs: Add unused variable scan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-35-arthur.cohen@embecosm.com/mbox/"},{"id":11150,"url":"https://patchwork.plctlab.org/api/1.2/patches/11150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-36-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:00","name":"[Rust,front-end,v3,35/46] gccrs: Add metadata ouptput pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-36-arthur.cohen@embecosm.com/mbox/"},{"id":11147,"url":"https://patchwork.plctlab.org/api/1.2/patches/11147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-37-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:01","name":"[Rust,front-end,v3,36/46] gccrs: Add base for HIR to GCC GENERIC lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-37-arthur.cohen@embecosm.com/mbox/"},{"id":11136,"url":"https://patchwork.plctlab.org/api/1.2/patches/11136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-38-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:02","name":"[Rust,front-end,v3,37/46] gccrs: Add HIR to GCC GENERIC lowering for all nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-38-arthur.cohen@embecosm.com/mbox/"},{"id":11134,"url":"https://patchwork.plctlab.org/api/1.2/patches/11134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-39-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:03","name":"[Rust,front-end,v3,38/46] gccrs: Add HIR to GCC GENERIC lowering entry point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-39-arthur.cohen@embecosm.com/mbox/"},{"id":11151,"url":"https://patchwork.plctlab.org/api/1.2/patches/11151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-40-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:04","name":"[Rust,front-end,v3,39/46] gccrs: These are wrappers ported from reusing gccgo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-40-arthur.cohen@embecosm.com/mbox/"},{"id":11149,"url":"https://patchwork.plctlab.org/api/1.2/patches/11149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-41-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:05","name":"[Rust,front-end,v3,40/46] gccrs: Add GCC Rust front-end Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-41-arthur.cohen@embecosm.com/mbox/"},{"id":11141,"url":"https://patchwork.plctlab.org/api/1.2/patches/11141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-42-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:06","name":"[Rust,front-end,v3,41/46] gccrs: Add config-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-42-arthur.cohen@embecosm.com/mbox/"},{"id":11152,"url":"https://patchwork.plctlab.org/api/1.2/patches/11152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-43-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:07","name":"[Rust,front-end,v3,42/46] gccrs: Add lang-spec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-43-arthur.cohen@embecosm.com/mbox/"},{"id":11153,"url":"https://patchwork.plctlab.org/api/1.2/patches/11153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-44-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:08","name":"[Rust,front-end,v3,43/46] gccrs: Add lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-44-arthur.cohen@embecosm.com/mbox/"},{"id":11154,"url":"https://patchwork.plctlab.org/api/1.2/patches/11154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-45-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:09","name":"[Rust,front-end,v3,44/46] gccrs: Add compiler driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-45-arthur.cohen@embecosm.com/mbox/"},{"id":11146,"url":"https://patchwork.plctlab.org/api/1.2/patches/11146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-46-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:10","name":"[Rust,front-end,v3,45/46] gccrs: Compiler proper interface kicks off the pipeline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-46-arthur.cohen@embecosm.com/mbox/"},{"id":11155,"url":"https://patchwork.plctlab.org/api/1.2/patches/11155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-47-arthur.cohen@embecosm.com/","msgid":"<20221026081811.602573-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-10-26T08:18:11","name":"[Rust,front-end,v3,46/46] gccrs: Add README, CONTRIBUTING and compiler logo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026081811.602573-47-arthur.cohen@embecosm.com/mbox/"},{"id":11156,"url":"https://patchwork.plctlab.org/api/1.2/patches/11156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1juZu+TsIub4jZj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-26T08:23:02","name":"c++: Fix excess precision related ICE on invalid binop [PR107382, PR107383]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1juZu+TsIub4jZj@tucnak/mbox/"},{"id":11172,"url":"https://patchwork.plctlab.org/api/1.2/patches/11172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com/","msgid":"<8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com>","list_archive_url":null,"date":"2022-10-26T09:46:06","name":"[OG12,committed] Handle operator new with alignment in USM transform","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8704a14d-6b26-edbf-0292-f03376340fa4@mentor.com/mbox/"},{"id":11197,"url":"https://patchwork.plctlab.org/api/1.2/patches/11197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9321d38e-a185-5505-62a5-574d64446798@suse.cz/","msgid":"<9321d38e-a185-5505-62a5-574d64446798@suse.cz>","list_archive_url":null,"date":"2022-10-26T11:09:18","name":"docs: document sanitizers can trigger warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9321d38e-a185-5505-62a5-574d64446798@suse.cz/mbox/"},{"id":11207,"url":"https://patchwork.plctlab.org/api/1.2/patches/11207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026114052.17713-1-guojiufu@linux.ibm.com/","msgid":"<20221026114052.17713-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-10-26T11:40:52","name":"[V2] rs6000: Support to build constants by li/lis+oris/xoris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026114052.17713-1-guojiufu@linux.ibm.com/mbox/"},{"id":11219,"url":"https://patchwork.plctlab.org/api/1.2/patches/11219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zq4wgf.fsf@euler.schwinge.homeip.net/","msgid":"<87h6zq4wgf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-26T12:10:24","name":"Document '\''distclean-stage[N]'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6zq4wgf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":11271,"url":"https://patchwork.plctlab.org/api/1.2/patches/11271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-10-26T13:46:47","name":"[PING] options: Clarify '\''Init'\'' option property usage for streaming optimization (was: [PATCH] options, lto: Optimize streaming of optimization nodes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87eduud7eg.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":11279,"url":"https://patchwork.plctlab.org/api/1.2/patches/11279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4eb1be6-f004-3699-4657-42f98eef6480@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T13:49:36","name":"[COMMITTED] Check if varying may also be non-negative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4eb1be6-f004-3699-4657-42f98eef6480@redhat.com/mbox/"},{"id":11282,"url":"https://patchwork.plctlab.org/api/1.2/patches/11282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026135238.24678-1-amonakov@ispras.ru/","msgid":"<20221026135238.24678-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-10-26T13:52:38","name":"ipa-visibility: remove assert in TLS optimization [PR107353]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026135238.24678-1-amonakov@ispras.ru/mbox/"},{"id":11323,"url":"https://patchwork.plctlab.org/api/1.2/patches/11323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1lb4uJuWVdEF0x0@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T16:10:10","name":"[v3] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1lb4uJuWVdEF0x0@redhat.com/mbox/"},{"id":11341,"url":"https://patchwork.plctlab.org/api/1.2/patches/11341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1l77ThNE1f4jusN@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-10-26T18:26:53","name":"[v4] c++: Implement -Wdangling-reference [PR106393]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1l77ThNE1f4jusN@redhat.com/mbox/"},{"id":11359,"url":"https://patchwork.plctlab.org/api/1.2/patches/11359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026185857.234023-1-hjl.tools@gmail.com/","msgid":"<20221026185857.234023-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-26T18:58:57","name":"x86: Replace ne:CCC/ne:CCO with UNSPEC_CC_NE in neg patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026185857.234023-1-hjl.tools@gmail.com/mbox/"},{"id":11406,"url":"https://patchwork.plctlab.org/api/1.2/patches/11406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8c1203c-bd17-4bfc-85c9-854076a1c363-1666811738919@3c-app-gmx-bap72/","msgid":"","list_archive_url":null,"date":"2022-10-26T19:15:38","name":"Fortran: BOZ literal constants are not compatible to any type [PR103413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8c1203c-bd17-4bfc-85c9-854076a1c363-1666811738919@3c-app-gmx-bap72/mbox/"},{"id":11407,"url":"https://patchwork.plctlab.org/api/1.2/patches/11407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026192311.12260-1-david.faust@oracle.com/","msgid":"<20221026192311.12260-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-10-26T19:23:11","name":"[v3] bpf: add preserve_field_info builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026192311.12260-1-david.faust@oracle.com/mbox/"},{"id":11439,"url":"https://patchwork.plctlab.org/api/1.2/patches/11439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026204005.1864136-1-dmalcolm@redhat.com/","msgid":"<20221026204005.1864136-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T20:40:05","name":"[v3] Add gcc/make-unique.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026204005.1864136-1-dmalcolm@redhat.com/mbox/"},{"id":11443,"url":"https://patchwork.plctlab.org/api/1.2/patches/11443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026211806.1866873-1-dmalcolm@redhat.com/","msgid":"<20221026211806.1866873-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T21:18:06","name":"[committed] analyzer: add sm-fd.dot","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026211806.1866873-1-dmalcolm@redhat.com/mbox/"},{"id":11444,"url":"https://patchwork.plctlab.org/api/1.2/patches/11444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026212300.1867175-1-dmalcolm@redhat.com/","msgid":"<20221026212300.1867175-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-26T21:23:00","name":"[committed] analyzer: fixes to file-descriptor handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026212300.1867175-1-dmalcolm@redhat.com/mbox/"},{"id":11447,"url":"https://patchwork.plctlab.org/api/1.2/patches/11447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026221226.9957A33E26@hamza.pair.com/","msgid":"<20221026221226.9957A33E26@hamza.pair.com>","list_archive_url":null,"date":"2022-10-26T22:12:23","name":"[committed] wwwdocs: style: Remove link to validator.w3.org in footer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221026221226.9957A33E26@hamza.pair.com/mbox/"},{"id":11533,"url":"https://patchwork.plctlab.org/api/1.2/patches/11533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027033829.22918-1-mark@harmstone.com/","msgid":"<20221027033829.22918-1-mark@harmstone.com>","list_archive_url":null,"date":"2022-10-27T03:38:29","name":"[v2] Add -gcodeview option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027033829.22918-1-mark@harmstone.com/mbox/"},{"id":11620,"url":"https://patchwork.plctlab.org/api/1.2/patches/11620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc97e1d1-e256-d887-9a52-bef93e70d260@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-10-27T07:09:59","name":"testsuite: Adjust vect-bitfield-read-* with vect_shift and vect_long_long [PR107240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc97e1d1-e256-d887-9a52-bef93e70d260@linux.ibm.com/mbox/"},{"id":11638,"url":"https://patchwork.plctlab.org/api/1.2/patches/11638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o6fhwgbVZoh4Pe@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-27T07:59:58","name":"libstdc++: std::to_chars std::{,b}float16_t support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o6fhwgbVZoh4Pe@tucnak/mbox/"},{"id":11639,"url":"https://patchwork.plctlab.org/api/1.2/patches/11639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o+hfO6L6AGXcE4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:17:09","name":"c++: Fix ICE on g++.dg/modules/adl-3_c.C [PR107379]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1o+hfO6L6AGXcE4@tucnak/mbox/"},{"id":11644,"url":"https://patchwork.plctlab.org/api/1.2/patches/11644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39da44c-7a2f-3f24-0876-50aa1a28d33f@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:30:32","name":"[(pushed)] lto: do not load LTO stream for aliases [PR107418]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39da44c-7a2f-3f24-0876-50aa1a28d33f@suse.cz/mbox/"},{"id":11656,"url":"https://patchwork.plctlab.org/api/1.2/patches/11656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0954f7-b256-4b1a-3e6e-2464b22cca98@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-10-27T08:42:00","name":"lto-dump: modernize a bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0954f7-b256-4b1a-3e6e-2464b22cca98@suse.cz/mbox/"},{"id":11737,"url":"https://patchwork.plctlab.org/api/1.2/patches/11737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261AB4B9363DFAEE94800AD91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-27T10:51:24","name":"RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261AB4B9363DFAEE94800AD91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":11739,"url":"https://patchwork.plctlab.org/api/1.2/patches/11739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027105354.3151191-1-hongtao.liu@intel.com/","msgid":"<20221027105354.3151191-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-27T10:53:54","name":"[x86] Fix incorrect digit constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027105354.3151191-1-hongtao.liu@intel.com/mbox/"},{"id":11776,"url":"https://patchwork.plctlab.org/api/1.2/patches/11776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261ABB716605DE32EC2C58B91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-27T12:49:42","name":"[v2] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261ABB716605DE32EC2C58B91339@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":11796,"url":"https://patchwork.plctlab.org/api/1.2/patches/11796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmed2yhk.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-27T13:21:43","name":"[pushed] aarch64: Reinstate some uses of CONSTEXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmed2yhk.fsf@arm.com/mbox/"},{"id":11806,"url":"https://patchwork.plctlab.org/api/1.2/patches/11806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027144152.335455-1-juzhe.zhong@rivai.ai/","msgid":"<20221027144152.335455-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-27T14:41:52","name":"RISC-V: Change constexpr back to CONSTEXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027144152.335455-1-juzhe.zhong@rivai.ai/mbox/"},{"id":11835,"url":"https://patchwork.plctlab.org/api/1.2/patches/11835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1666883439-7725-1-git-send-email-apinski@marvell.com/","msgid":"<1666883439-7725-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-10-27T15:10:39","name":"Use simple_dce_from_worklist with match_simplify_replacement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1666883439-7725-1-git-send-email-apinski@marvell.com/mbox/"},{"id":11853,"url":"https://patchwork.plctlab.org/api/1.2/patches/11853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027153906.24773-1-polacek@redhat.com/","msgid":"<20221027153906.24773-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-27T15:39:06","name":"c++: -Wdangling-reference and system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027153906.24773-1-polacek@redhat.com/mbox/"},{"id":11855,"url":"https://patchwork.plctlab.org/api/1.2/patches/11855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa228d19-9f9a-7cda-ddb2-8ce6380bcbc2@acm.org/","msgid":"","list_archive_url":null,"date":"2022-10-27T16:00:39","name":"c++: Templated lambda mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa228d19-9f9a-7cda-ddb2-8ce6380bcbc2@acm.org/mbox/"},{"id":11876,"url":"https://patchwork.plctlab.org/api/1.2/patches/11876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027164750.97737-1-ppalka@redhat.com/","msgid":"<20221027164750.97737-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-27T16:47:50","name":"libstdc++: Implement ranges::cartesian_product_view from P2374R4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027164750.97737-1-ppalka@redhat.com/mbox/"},{"id":11894,"url":"https://patchwork.plctlab.org/api/1.2/patches/11894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com/","msgid":"<38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-10-27T17:30:11","name":"c++: libcpp: Support raw strings with newlines in directives [PR55971]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b67944c0759299533ad163d002247996fa5e33.1666891579.git.lhyatt@gmail.com/mbox/"},{"id":11907,"url":"https://patchwork.plctlab.org/api/1.2/patches/11907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027181125.1658982-1-christoph.muellner@vrull.eu/","msgid":"<20221027181125.1658982-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-10-27T18:11:25","name":"RISC-V: Add Zawrs ISA extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027181125.1658982-1-christoph.muellner@vrull.eu/mbox/"},{"id":12004,"url":"https://patchwork.plctlab.org/api/1.2/patches/12004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-2-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:42","name":"[v2,1/3] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-2-ben.boeckel@kitware.com/mbox/"},{"id":12002,"url":"https://patchwork.plctlab.org/api/1.2/patches/12002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-3-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:43","name":"[v2,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-3-ben.boeckel@kitware.com/mbox/"},{"id":12003,"url":"https://patchwork.plctlab.org/api/1.2/patches/12003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-4-ben.boeckel@kitware.com/","msgid":"<20221027231645.67623-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-10-27T23:16:44","name":"[v2,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221027231645.67623-4-ben.boeckel@kitware.com/mbox/"},{"id":12018,"url":"https://patchwork.plctlab.org/api/1.2/patches/12018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da969aa1-aa99-74eb-3bbb-7b7bdd31cf38@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T00:38:27","name":"[committed] c: C2x enums with fixed underlying type [PR61469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da969aa1-aa99-74eb-3bbb-7b7bdd31cf38@codesourcery.com/mbox/"},{"id":12085,"url":"https://patchwork.plctlab.org/api/1.2/patches/12085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548761EC65B3DE7F66955887EC329@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T06:20:06","name":"i386: using __bf16 for AVX512BF16 intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548761EC65B3DE7F66955887EC329@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":12145,"url":"https://patchwork.plctlab.org/api/1.2/patches/12145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028080146.1586483-1-chenglulu@loongson.cn/","msgid":"<20221028080146.1586483-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-28T08:01:46","name":"[v3] LoongArch: Libvtv add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028080146.1586483-1-chenglulu@loongson.cn/mbox/"},{"id":12151,"url":"https://patchwork.plctlab.org/api/1.2/patches/12151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028083155.6628513A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028083155.6628513A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T08:31:54","name":"Adjust gcc.dg/vect/pr100756.c for V8SI and V16SI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028083155.6628513A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12153,"url":"https://patchwork.plctlab.org/api/1.2/patches/12153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261358467675A63EEE7B55D91329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-28T08:39:27","name":"[v3] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB0261358467675A63EEE7B55D91329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12157,"url":"https://patchwork.plctlab.org/api/1.2/patches/12157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8735b849h6.fsf@euler.schwinge.homeip.net/","msgid":"<8735b849h6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-10-28T08:51:17","name":"OpenACC: Don'\''t gang-privatize artificial variables [PR90115] (was: [PATCH] [og12] OpenACC: Don'\''t gang-privatize artificial variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8735b849h6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":12167,"url":"https://patchwork.plctlab.org/api/1.2/patches/12167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ucRnr9uUesOXnc@tucnak/","msgid":"","list_archive_url":null,"date":"2022-10-28T09:09:26","name":"[committed] openmp: Allow optional comma after directive-specifier in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1ucRnr9uUesOXnc@tucnak/mbox/"},{"id":12168,"url":"https://patchwork.plctlab.org/api/1.2/patches/12168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1930502.usQuhbGJ8B@fomalhaut/","msgid":"<1930502.usQuhbGJ8B@fomalhaut>","list_archive_url":null,"date":"2022-10-28T09:10:29","name":"Restore RTL alias analysis for hard frame pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1930502.usQuhbGJ8B@fomalhaut/mbox/"},{"id":12169,"url":"https://patchwork.plctlab.org/api/1.2/patches/12169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028091500.2748920-1-torbjorn.svensson@foss.st.com/","msgid":"<20221028091500.2748920-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-10-28T09:15:01","name":"c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028091500.2748920-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":12248,"url":"https://patchwork.plctlab.org/api/1.2/patches/12248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB026166C70CCE09404AFC2B4891329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-28T12:34:08","name":"[v4] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OSYP286MB026166C70CCE09404AFC2B4891329@OSYP286MB0261.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12264,"url":"https://patchwork.plctlab.org/api/1.2/patches/12264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:06:29","name":"tree-optimization/107435 - ICE with recurrence vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130629.7CEC513A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12265,"url":"https://patchwork.plctlab.org/api/1.2/patches/12265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:06:41","name":"tree-optimization/107447 - avoid hoisting returns-twice calls in LIM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028130641.EA01A13A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12269,"url":"https://patchwork.plctlab.org/api/1.2/patches/12269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de/","msgid":"<20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-10-28T13:22:46","name":"tree-optimization/107407 - wrong code with DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028132247.28A0E13A6E@imap2.suse-dmz.suse.de/mbox/"},{"id":12341,"url":"https://patchwork.plctlab.org/api/1.2/patches/12341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028142754.145622-1-jwakely@redhat.com/","msgid":"<20221028142754.145622-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-28T14:27:54","name":"[committed] libstdc++: Fix allocator propagation in regex algorithms [PR107376]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028142754.145622-1-jwakely@redhat.com/mbox/"},{"id":12388,"url":"https://patchwork.plctlab.org/api/1.2/patches/12388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028151553.918472-1-jason@redhat.com/","msgid":"<20221028151553.918472-1-jason@redhat.com>","list_archive_url":null,"date":"2022-10-28T15:15:53","name":"[pushed] c++: apply friend attributes sooner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028151553.918472-1-jason@redhat.com/mbox/"},{"id":12448,"url":"https://patchwork.plctlab.org/api/1.2/patches/12448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrleozaov1.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T16:34:42","name":"[10/15,V3] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrleozaov1.fsf_-_@arm.com/mbox/"},{"id":12449,"url":"https://patchwork.plctlab.org/api/1.2/patches/12449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrh6znaolq.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-28T16:40:17","name":"[12/15,V3] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrh6znaolq.fsf_-_@arm.com/mbox/"},{"id":12531,"url":"https://patchwork.plctlab.org/api/1.2/patches/12531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-04843f20-2dab-41c6-87fa-c939f57d02b3-1666987979945@3c-app-gmx-bs25/","msgid":"","list_archive_url":null,"date":"2022-10-28T20:12:59","name":"Fortran: ordering of hidden procedure arguments [PR107441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-04843f20-2dab-41c6-87fa-c939f57d02b3-1666987979945@3c-app-gmx-bs25/mbox/"},{"id":12538,"url":"https://patchwork.plctlab.org/api/1.2/patches/12538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028204233.409310-1-polacek@redhat.com/","msgid":"<20221028204233.409310-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-10-28T20:42:33","name":"c++: Tweaks for -Wredundant-move [PR107363]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028204233.409310-1-polacek@redhat.com/mbox/"},{"id":12608,"url":"https://patchwork.plctlab.org/api/1.2/patches/12608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028235632.194108-1-jwakely@redhat.com/","msgid":"<20221028235632.194108-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-10-28T23:56:32","name":"[committed] libstdc++: Fix dangling reference in filesystem::path::filename()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221028235632.194108-1-jwakely@redhat.com/mbox/"},{"id":12650,"url":"https://patchwork.plctlab.org/api/1.2/patches/12650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029065320.2561317-1-chenglulu@loongson.cn/","msgid":"<20221029065320.2561317-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T06:53:22","name":"[v4] Libvtv: Add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029065320.2561317-1-chenglulu@loongson.cn/mbox/"},{"id":12654,"url":"https://patchwork.plctlab.org/api/1.2/patches/12654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-2-chenglulu@loongson.cn/","msgid":"<20221029070524.2570782-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T07:05:24","name":"[v1,1/2] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-2-chenglulu@loongson.cn/mbox/"},{"id":12653,"url":"https://patchwork.plctlab.org/api/1.2/patches/12653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-3-chenglulu@loongson.cn/","msgid":"<20221029070524.2570782-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-10-29T07:05:25","name":"[v1,2/2] LoongArch: Add prefetch insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029070524.2570782-3-chenglulu@loongson.cn/mbox/"},{"id":12658,"url":"https://patchwork.plctlab.org/api/1.2/patches/12658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029074131.1654166-1-ibuclaw@gdcproject.org/","msgid":"<20221029074131.1654166-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-10-29T07:41:31","name":"[committed] d: Make TARGET_D_MINFO_SECTION hooks in elfos.h the language default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029074131.1654166-1-ibuclaw@gdcproject.org/mbox/"},{"id":12663,"url":"https://patchwork.plctlab.org/api/1.2/patches/12663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029082755.781D833E4F@hamza.pair.com/","msgid":"<20221029082755.781D833E4F@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T08:27:52","name":"[committed] wwwdocs: contribute: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029082755.781D833E4F@hamza.pair.com/mbox/"},{"id":12668,"url":"https://patchwork.plctlab.org/api/1.2/patches/12668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYAP286MB0265EBD8D4F0E0E57E9EA44E91359@TYAP286MB0265.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2022-10-29T09:01:18","name":"[v5] RISC-V: Libitm add RISC-V support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYAP286MB0265EBD8D4F0E0E57E9EA44E91359@TYAP286MB0265.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":12697,"url":"https://patchwork.plctlab.org/api/1.2/patches/12697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21653628.EfDdHjke4D@fomalhaut/","msgid":"<21653628.EfDdHjke4D@fomalhaut>","list_archive_url":null,"date":"2022-10-29T12:14:23","name":"Repair --disable-sjlj-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21653628.EfDdHjke4D@fomalhaut/mbox/"},{"id":12725,"url":"https://patchwork.plctlab.org/api/1.2/patches/12725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150307.06C1433E4D@hamza.pair.com/","msgid":"<20221029150307.06C1433E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:03:04","name":"[committed] wwwdocs: bugs: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150307.06C1433E4D@hamza.pair.com/mbox/"},{"id":12726,"url":"https://patchwork.plctlab.org/api/1.2/patches/12726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150603.93D9C33E63@hamza.pair.com/","msgid":"<20221029150603.93D9C33E63@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:06:01","name":"[committed] wwwdocs: readings: Update Go-related links to new site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150603.93D9C33E63@hamza.pair.com/mbox/"},{"id":12727,"url":"https://patchwork.plctlab.org/api/1.2/patches/12727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150914.4FA8533E4C@hamza.pair.com/","msgid":"<20221029150914.4FA8533E4C@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T15:09:12","name":"[committed] wwwdocs: frontends: Adjust Sourceforge links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029150914.4FA8533E4C@hamza.pair.com/mbox/"},{"id":12775,"url":"https://patchwork.plctlab.org/api/1.2/patches/12775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211510.8DC5333E4A@hamza.pair.com/","msgid":"<20221029211510.8DC5333E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:15:07","name":"[committed] wwwdocs: gcc-10: Update two developer.arm.com links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211510.8DC5333E4A@hamza.pair.com/mbox/"},{"id":12777,"url":"https://patchwork.plctlab.org/api/1.2/patches/12777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211820.18BD833E4D@hamza.pair.com/","msgid":"<20221029211820.18BD833E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:18:17","name":"[committed] wwwdocs: testing: Switch www.netlib.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029211820.18BD833E4D@hamza.pair.com/mbox/"},{"id":12778,"url":"https://patchwork.plctlab.org/api/1.2/patches/12778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029213327.0296B33E55@hamza.pair.com/","msgid":"<20221029213327.0296B33E55@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:33:24","name":"[committed] wwwdocs: gcc-4.3: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029213327.0296B33E55@hamza.pair.com/mbox/"},{"id":12779,"url":"https://patchwork.plctlab.org/api/1.2/patches/12779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029214021.C993D33E4D@hamza.pair.com/","msgid":"<20221029214021.C993D33E4D@hamza.pair.com>","list_archive_url":null,"date":"2022-10-29T21:40:20","name":"[committed] wwwdocs: projects: Remove extra slash at end of ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221029214021.C993D33E4D@hamza.pair.com/mbox/"},{"id":13092,"url":"https://patchwork.plctlab.org/api/1.2/patches/13092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031011036.1158443-1-hongtao.liu@intel.com/","msgid":"<20221031011036.1158443-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-31T01:10:36","name":"[V2,x86] Fix incorrect digit constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031011036.1158443-1-hongtao.liu@intel.com/mbox/"},{"id":13093,"url":"https://patchwork.plctlab.org/api/1.2/patches/13093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031012310.1237451-1-hongtao.liu@intel.com/","msgid":"<20221031012310.1237451-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-10-31T01:23:10","name":"Enable more optimization for 32-bit/64-bit shrd/shld with imm shift count.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031012310.1237451-1-hongtao.liu@intel.com/mbox/"},{"id":13094,"url":"https://patchwork.plctlab.org/api/1.2/patches/13094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031014022.250112-1-juzhe.zhong@rivai.ai/","msgid":"<20221031014022.250112-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-10-31T01:40:22","name":"RISC-V: Fix RVV testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031014022.250112-1-juzhe.zhong@rivai.ai/mbox/"},{"id":13212,"url":"https://patchwork.plctlab.org/api/1.2/patches/13212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaQR7+ZB3JNvjWm9RGFsNSFH7uTgX0QYkxLiG=vdgJkxA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:14:04","name":"Update email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaQR7+ZB3JNvjWm9RGFsNSFH7uTgX0QYkxLiG=vdgJkxA@mail.gmail.com/mbox/"},{"id":13235,"url":"https://patchwork.plctlab.org/api/1.2/patches/13235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16485-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:53:08","name":"[1/2] middle-end: Add new tbranch optab to add support for bit-test-and-branch operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16485-tamar@arm.com/mbox/"},{"id":13236,"url":"https://patchwork.plctlab.org/api/1.2/patches/13236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3ThtA9vUT43aA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:53:50","name":"[2/2] AArch64 Support new tbranch optab.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3ThtA9vUT43aA@arm.com/mbox/"},{"id":13237,"url":"https://patchwork.plctlab.org/api/1.2/patches/13237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3Yxws77tZN9pN@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:54:11","name":"AArch64 Extend umov and sbfx patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+3Yxws77tZN9pN@arm.com/mbox/"},{"id":13241,"url":"https://patchwork.plctlab.org/api/1.2/patches/13241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16240-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:56:42","name":"[1/8] middle-end: Recognize scalar reductions from bitfields and array_refs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16240-tamar@arm.com/mbox/"},{"id":13239,"url":"https://patchwork.plctlab.org/api/1.2/patches/13239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4GFnUyuwSK1hy@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:57:12","name":"[2/8] middle-end: Recognize scalar widening reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4GFnUyuwSK1hy@arm.com/mbox/"},{"id":13240,"url":"https://patchwork.plctlab.org/api/1.2/patches/13240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4Nu1ryQIKoOQA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:57:42","name":"[3/8] middle-end: Support extractions of subvectors from arbitrary element position inside a vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4Nu1ryQIKoOQA@arm.com/mbox/"},{"id":13242,"url":"https://patchwork.plctlab.org/api/1.2/patches/13242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4UYIESInTYiGq@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:58:09","name":"[4/8] AArch64 aarch64: Implement widening reduction patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4UYIESInTYiGq@arm.com/mbox/"},{"id":13244,"url":"https://patchwork.plctlab.org/api/1.2/patches/13244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4euF0rUwFIjTL@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:58:50","name":"[5/8] AArch64 aarch64: Make existing V2HF be usable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4euF0rUwFIjTL@arm.com/mbox/"},{"id":13243,"url":"https://patchwork.plctlab.org/api/1.2/patches/13243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4kpUXZfolj+cr@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:59:14","name":"[6/8] AArch64: Add peephole and scheduling logic for pairwise operations that appear late in RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4kpUXZfolj+cr@arm.com/mbox/"},{"id":13245,"url":"https://patchwork.plctlab.org/api/1.2/patches/13245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4qItMrQHbdqqD@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T11:59:36","name":"[7/8] AArch64: Consolidate zero and sign extension patterns and add missing ones.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+4qItMrQHbdqqD@arm.com/mbox/"},{"id":13246,"url":"https://patchwork.plctlab.org/api/1.2/patches/13246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+41nrRB4ZMXZZA@arm.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T12:00:22","name":"[8/8] AArch64: Have reload not choose to do add on the scalar side if both values exist on the SIMD side.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y1+41nrRB4ZMXZZA@arm.com/mbox/"},{"id":13263,"url":"https://patchwork.plctlab.org/api/1.2/patches/13263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com/","msgid":"<7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T13:02:59","name":"[committed] amdgcn: Silence unused parameter warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ebbe97d-39e5-6da1-1eec-2507a60af9db@codesourcery.com/mbox/"},{"id":13265,"url":"https://patchwork.plctlab.org/api/1.2/patches/13265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0c50451-2b18-7bea-4fed-f3c94192d35a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T13:03:07","name":"[committed] amdgcn: multi-size vector reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0c50451-2b18-7bea-4fed-f3c94192d35a@codesourcery.com/mbox/"},{"id":13264,"url":"https://patchwork.plctlab.org/api/1.2/patches/13264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com/","msgid":"<500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T13:03:13","name":"[committed] amdgcn: add fmin/fmax patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/500fa1bc-9f12-c29e-e377-8b728727cf3b@codesourcery.com/mbox/"},{"id":13272,"url":"https://patchwork.plctlab.org/api/1.2/patches/13272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com/","msgid":"<51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com>","list_archive_url":null,"date":"2022-10-31T14:46:25","name":"OpenMP/Fortran: '\''target update'\'' with strides + DT components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/51e764f7-635f-9754-dc4b-d2cd2b58435d@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-10/mbox/"},{"id":5,"url":"https://patchwork.plctlab.org/api/1.2/bundles/5/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-09/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-09","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":1175,"url":"https://patchwork.plctlab.org/api/1.2/patches/1175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9f0c5c3-235c-26b3-f884-daf761ec16a1@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T07:15:14","name":"[committed] libgomp.texi: move item from gcn to nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9f0c5c3-235c-26b3-f884-daf761ec16a1@codesourcery.com/mbox/"},{"id":1176,"url":"https://patchwork.plctlab.org/api/1.2/patches/1176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth71b65ip.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T08:30:06","name":"[pushed] aarch64: Disassociate ls64 from simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth71b65ip.fsf@arm.com/mbox/"},{"id":1177,"url":"https://patchwork.plctlab.org/api/1.2/patches/1177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkrj65hr.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T08:30:40","name":"[pushed] aarch64: Vector move fixes for +nosimd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkrj65hr.fsf@arm.com/mbox/"},{"id":1178,"url":"https://patchwork.plctlab.org/api/1.2/patches/1178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085150.0F518139B3@imap2.suse-dmz.suse.de/","msgid":"<20220913085150.0F518139B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-13T08:51:49","name":"tree-optimization/106913 - ICE with -da and -Wuninitialized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085150.0F518139B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1179,"url":"https://patchwork.plctlab.org/api/1.2/patches/1179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de/","msgid":"<20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-13T08:52:03","name":"middle-end/106909 - CTRL altering flag after folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913085203.CD1E9139B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1180,"url":"https://patchwork.plctlab.org/api/1.2/patches/1180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913093616.1422179-1-jiawei@iscas.ac.cn/","msgid":"<20220913093616.1422179-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-09-13T09:36:16","name":"[V2] RISC-V:Add '\''-m[no]-csr-check'\'' option in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913093616.1422179-1-jiawei@iscas.ac.cn/mbox/"},{"id":1181,"url":"https://patchwork.plctlab.org/api/1.2/patches/1181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com/","msgid":"<020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T09:56:58","name":"PR target/106877: Robustify reg-stack to malformed asm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020401d8c757$2af45f10$80dd1d30$@nextmovesoftware.com/mbox/"},{"id":1182,"url":"https://patchwork.plctlab.org/api/1.2/patches/1182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com/","msgid":"<62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com>","list_archive_url":null,"date":"2022-09-13T11:03:35","name":"[OG12] openmp: Fix handling of target constructs in static member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62eb3792-62f6-7ebf-aa41-01d03287b573@mentor.com/mbox/"},{"id":1183,"url":"https://patchwork.plctlab.org/api/1.2/patches/1183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913114538.2741902-1-ppalka@redhat.com/","msgid":"<20220913114538.2741902-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-13T11:45:38","name":"c++: some missing-SFINAE fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913114538.2741902-1-ppalka@redhat.com/mbox/"},{"id":1184,"url":"https://patchwork.plctlab.org/api/1.2/patches/1184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913142118.3183120-1-ppalka@redhat.com/","msgid":"<20220913142118.3183120-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-13T14:21:18","name":"[committed] c++: remove single-parameter version of mark_used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913142118.3183120-1-ppalka@redhat.com/mbox/"},{"id":1185,"url":"https://patchwork.plctlab.org/api/1.2/patches/1185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913153237.305471-1-xry111@xry111.site/","msgid":"<20220913153237.305471-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-13T15:32:37","name":"LoongArch: Prepare static PIE support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913153237.305471-1-xry111@xry111.site/mbox/"},{"id":1186,"url":"https://patchwork.plctlab.org/api/1.2/patches/1186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyCy9OxAaLBDi+1V@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-13T16:42:28","name":"c++: Implement C++23 P1169R4 - static operator() [PR106651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyCy9OxAaLBDi+1V@tucnak/mbox/"},{"id":1187,"url":"https://patchwork.plctlab.org/api/1.2/patches/1187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyC4X5weKJ5HpmpZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-13T17:05:35","name":"[committed] libgomp: Appease some static analyzers [PR106906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyC4X5weKJ5HpmpZ@tucnak/mbox/"},{"id":1188,"url":"https://patchwork.plctlab.org/api/1.2/patches/1188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com/","msgid":"<000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T17:54:58","name":"PR tree-optimization/71343: Value number X<<2 as X*4.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000e01d8c799$f1d2fe10$d578fa30$@nextmovesoftware.com/mbox/"},{"id":1189,"url":"https://patchwork.plctlab.org/api/1.2/patches/1189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002d01d8c79f$dc5fe830$951fb890$@nextmovesoftware.com/","msgid":"<002d01d8c79f$dc5fe830$951fb890$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-09-13T18:37:20","name":"Optimize (X<","list_archive_url":null,"date":"2022-09-13T21:01:42","name":"[v3,01/11] OpenMP 5.0: Clause ordering for OpenMP 5.0 (topological sorting by base pointer)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/839df7d51e5bf6f29054e83b3c017f57df5c1149.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1190,"url":"https://patchwork.plctlab.org/api/1.2/patches/1190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com/","msgid":"<13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:01:43","name":"[v3,02/11] Remove omp_target_reorder_clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13cf15f3f3f3039bc7bf0c66a11d467f16a5d307.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1192,"url":"https://patchwork.plctlab.org/api/1.2/patches/1192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com/","msgid":"<76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:01:44","name":"[v3,03/11] OpenMP/OpenACC struct sibling list gimplification extension and rework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76cdecccc148288ba2b1516b1c69099ba12fcfe4.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1193,"url":"https://patchwork.plctlab.org/api/1.2/patches/1193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2f84c39600751588e8cf4a7809f5644055fa727.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:01:45","name":"[v3,04/11] OpenMP/OpenACC: mapping group list-handling improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2f84c39600751588e8cf4a7809f5644055fa727.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1194,"url":"https://patchwork.plctlab.org/api/1.2/patches/1194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com/","msgid":"<479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:15","name":"[v3,05/11] OpenMP: push attaches to end of clause list in \"target\" regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/479bff9d51ee4db1ff46e0edaaf24d2a601f7a0d.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1197,"url":"https://patchwork.plctlab.org/api/1.2/patches/1197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3be658301113143e5ff5efea74e46ea6efc3e5f.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:03:16","name":"[v3,06/11] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3be658301113143e5ff5efea74e46ea6efc3e5f.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1195,"url":"https://patchwork.plctlab.org/api/1.2/patches/1195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com/","msgid":"<4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:17","name":"[v3,07/11] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c462bdaea797b68b36cc58154dfee31213072b2.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1199,"url":"https://patchwork.plctlab.org/api/1.2/patches/1199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1d4786dbfd1f5cd31f809dfc713478e44c5232b.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:03:18","name":"[v3,08/11] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1d4786dbfd1f5cd31f809dfc713478e44c5232b.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1196,"url":"https://patchwork.plctlab.org/api/1.2/patches/1196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com/","msgid":"<1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:03:19","name":"[v3,09/11] FYI/unfinished: OpenMP: lvalue parsing for map clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ce800cfe1da2cae69edaa75fe20f3897dd5cfe0.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1200,"url":"https://patchwork.plctlab.org/api/1.2/patches/1200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c2a998d8013d8d5b7abd56729b1ecf13c397a6.1663101299.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-13T21:04:29","name":"[v3,10/11] Use OMP_ARRAY_SECTION instead of TREE_LIST in C++ FE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c2a998d8013d8d5b7abd56729b1ecf13c397a6.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1198,"url":"https://patchwork.plctlab.org/api/1.2/patches/1198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com/","msgid":"<2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-13T21:04:30","name":"[v3,11/11] FYI/unfinished: OpenMP 5.0 \"declare mapper\" support for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d52a6cf5ba904abd98d028a163c1012becf95a6.1663101299.git.julian@codesourcery.com/mbox/"},{"id":1201,"url":"https://patchwork.plctlab.org/api/1.2/patches/1201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913215743.2712390-1-jcmvbkbc@gmail.com/","msgid":"<20220913215743.2712390-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-09-13T21:57:43","name":"xtensa: gcc: implement MI thunk generation for call0 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220913215743.2712390-1-jcmvbkbc@gmail.com/mbox/"},{"id":1202,"url":"https://patchwork.plctlab.org/api/1.2/patches/1202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914012511.1012154-1-hongtao.liu@intel.com/","msgid":"<20220914012511.1012154-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-14T01:25:11","name":"[ICE] Check another epilog variable peeling case in vectorizable_nonlinear_induction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914012511.1012154-1-hongtao.liu@intel.com/mbox/"},{"id":1203,"url":"https://patchwork.plctlab.org/api/1.2/patches/1203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyGGD/5HXAXh13N0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-14T07:43:11","name":"Disallow pointer operands for |, ^ and partly & [PR106878]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyGGD/5HXAXh13N0@tucnak/mbox/"},{"id":1204,"url":"https://patchwork.plctlab.org/api/1.2/patches/1204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914095705.00384134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914095705.00384134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T09:57:04","name":"tree-optimization/106934 - avoid BIT_FIELD_REF of bitfields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914095705.00384134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1205,"url":"https://patchwork.plctlab.org/api/1.2/patches/1205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914121921.j46kmn2btdwmj3sc@lug-owl.de/","msgid":"<20220914121921.j46kmn2btdwmj3sc@lug-owl.de>","list_archive_url":null,"date":"2022-09-14T12:19:21","name":"[COMMITTED] Fix unused variable warning (was: [PATCH 1/3] STABS: remove -gstabs and -gxcoff functionality)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914121921.j46kmn2btdwmj3sc@lug-owl.de/mbox/"},{"id":1206,"url":"https://patchwork.plctlab.org/api/1.2/patches/1206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914124935.1221658-1-aldyh@redhat.com/","msgid":"<20220914124935.1221658-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T12:49:35","name":"[COMMITTED,PR106936] Remove assert from get_value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914124935.1221658-1-aldyh@redhat.com/mbox/"},{"id":1207,"url":"https://patchwork.plctlab.org/api/1.2/patches/1207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914125001.E5607134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914125001.E5607134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T12:50:01","name":"tree-optimization/106938 - cleanup abnormal edges after inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914125001.E5607134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1208,"url":"https://patchwork.plctlab.org/api/1.2/patches/1208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914140656.640BF134B3@imap2.suse-dmz.suse.de/","msgid":"<20220914140656.640BF134B3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-14T14:06:55","name":"Move void_list_node init to common code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914140656.640BF134B3@imap2.suse-dmz.suse.de/mbox/"},{"id":1209,"url":"https://patchwork.plctlab.org/api/1.2/patches/1209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914141900.3489407-1-ppalka@redhat.com/","msgid":"<20220914141900.3489407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-14T14:19:00","name":"libstdc++: Implement ranges::chunk_by_view from P2443R1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914141900.3489407-1-ppalka@redhat.com/mbox/"},{"id":1210,"url":"https://patchwork.plctlab.org/api/1.2/patches/1210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rmm82c5.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T14:20:26","name":"[10/15,V2] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rmm82c5.fsf_-_@arm.com/mbox/"},{"id":1215,"url":"https://patchwork.plctlab.org/api/1.2/patches/1215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-1-aldyh@redhat.com/","msgid":"<20220914150852.1244397-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:48","name":"[COMMITTED] Minor fixes to frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-1-aldyh@redhat.com/mbox/"},{"id":1214,"url":"https://patchwork.plctlab.org/api/1.2/patches/1214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-2-aldyh@redhat.com/","msgid":"<20220914150852.1244397-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:49","name":"[COMMITTED] Provide cleaner set_nan(), clear_nan(), and update_nan() methods.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-2-aldyh@redhat.com/mbox/"},{"id":1211,"url":"https://patchwork.plctlab.org/api/1.2/patches/1211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-3-aldyh@redhat.com/","msgid":"<20220914150852.1244397-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:50","name":"[COMMITTED] Use frange::set_nan() from the generic frange::set().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-3-aldyh@redhat.com/mbox/"},{"id":1213,"url":"https://patchwork.plctlab.org/api/1.2/patches/1213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-4-aldyh@redhat.com/","msgid":"<20220914150852.1244397-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:51","name":"[COMMITTED] Pass full range to build_* in range-op-float.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-4-aldyh@redhat.com/mbox/"},{"id":1212,"url":"https://patchwork.plctlab.org/api/1.2/patches/1212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-5-aldyh@redhat.com/","msgid":"<20220914150852.1244397-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-14T15:08:52","name":"[COMMITTED] frange: add both zeros to ranges when there'\''s the possiblity of equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914150852.1244397-5-aldyh@redhat.com/mbox/"},{"id":1216,"url":"https://patchwork.plctlab.org/api/1.2/patches/1216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com/","msgid":"<8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com>","list_archive_url":null,"date":"2022-09-14T17:22:08","name":"[_GLIBCXX_INLINE_VERSION] Cleanup gnu-versioned-namespace.ver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8998e783-a06a-675b-afd0-b41e7195c1a9@gmail.com/mbox/"},{"id":1217,"url":"https://patchwork.plctlab.org/api/1.2/patches/1217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com/","msgid":"<99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com>","list_archive_url":null,"date":"2022-09-14T17:26:16","name":"[_GLIBCXX_INLINE_VERSION] Fix test dg-prune-output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/99765d4f-2ac6-5877-69b6-1bd8684c20ff@gmail.com/mbox/"},{"id":1218,"url":"https://patchwork.plctlab.org/api/1.2/patches/1218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d354aa-07ef-5e3a-991e-deba88ee0175@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T17:31:34","name":"OpenMP: Enable vectorization in all OpenMP loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d354aa-07ef-5e3a-991e-deba88ee0175@codesourcery.com/mbox/"},{"id":1219,"url":"https://patchwork.plctlab.org/api/1.2/patches/1219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com/","msgid":"<0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com>","list_archive_url":null,"date":"2022-09-14T17:32:11","name":"OpenMP: Generate SIMD clones for functions with \"declare target\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b64e323-63f9-e4b7-eb7f-83f3b5e3125b@codesourcery.com/mbox/"},{"id":1220,"url":"https://patchwork.plctlab.org/api/1.2/patches/1220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANP1oa0QMfUCRwGpP46Hz3xz9CsHEkHdMJXJ5sv+92-boR3u5Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-14T18:09:56","name":"mips: Add appropriate linker flags when compiling with -static-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANP1oa0QMfUCRwGpP46Hz3xz9CsHEkHdMJXJ5sv+92-boR3u5Q@mail.gmail.com/mbox/"},{"id":1221,"url":"https://patchwork.plctlab.org/api/1.2/patches/1221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182315.263596-1-jwakely@redhat.com/","msgid":"<20220914182315.263596-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:15","name":"[committed] libstdc++: Document LWG 1203 API change in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182315.263596-1-jwakely@redhat.com/mbox/"},{"id":1223,"url":"https://patchwork.plctlab.org/api/1.2/patches/1223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182329.263649-1-jwakely@redhat.com/","msgid":"<20220914182329.263649-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:29","name":"[committed] libstdc++: Add assertion to std::promise::set_exception (LWG 2276)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182329.263649-1-jwakely@redhat.com/mbox/"},{"id":1222,"url":"https://patchwork.plctlab.org/api/1.2/patches/1222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182337.263664-1-jwakely@redhat.com/","msgid":"<20220914182337.263664-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T18:23:37","name":"[committed] libstdc++: Add comment to 17_intro/names.cc test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914182337.263664-1-jwakely@redhat.com/mbox/"},{"id":1224,"url":"https://patchwork.plctlab.org/api/1.2/patches/1224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220435.276306-1-jwakely@redhat.com/","msgid":"<20220914220435.276306-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T22:04:35","name":"[committed] libstdc++: Add missing header to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220435.276306-1-jwakely@redhat.com/mbox/"},{"id":1225,"url":"https://patchwork.plctlab.org/api/1.2/patches/1225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220449.276340-1-jwakely@redhat.com/","msgid":"<20220914220449.276340-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-14T22:04:49","name":"[committed] libstdc++: Add TSan annotations to std::atomic>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220914220449.276340-1-jwakely@redhat.com/mbox/"},{"id":1226,"url":"https://patchwork.plctlab.org/api/1.2/patches/1226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209142301140.3158477@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-14T23:02:00","name":"float.h: Do not define INFINITY for C2x when infinities not supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209142301140.3158477@digraph.polyomino.org.uk/mbox/"},{"id":1227,"url":"https://patchwork.plctlab.org/api/1.2/patches/1227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548726F51948DD72BB8532B8EC499@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-15T03:36:19","name":"i386: Fixed vec_init_dup_v16bf [PR106887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB548726F51948DD72BB8532B8EC499@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":1228,"url":"https://patchwork.plctlab.org/api/1.2/patches/1228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915054026.1359564-1-aldyh@redhat.com/","msgid":"<20220915054026.1359564-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-15T05:40:27","name":"Rewrite NAN and sign handling in frange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915054026.1359564-1-aldyh@redhat.com/mbox/"},{"id":1229,"url":"https://patchwork.plctlab.org/api/1.2/patches/1229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915065416.1172508-1-torbjorn.svensson@foss.st.com/","msgid":"<20220915065416.1172508-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-15T06:54:16","name":"testsuite: Disable zero-scratch-regs-{7, 9, 11}.c on arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915065416.1172508-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1230,"url":"https://patchwork.plctlab.org/api/1.2/patches/1230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915082853.109235-1-juzhe.zhong@rivai.ai/","msgid":"<20220915082853.109235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T08:28:53","name":"RISC-V: Support poly move manipulation and selftests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915082853.109235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1231,"url":"https://patchwork.plctlab.org/api/1.2/patches/1231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915083052.74903-1-guojiufu@linux.ibm.com/","msgid":"<20220915083052.74903-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-09-15T08:30:52","name":"rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915083052.74903-1-guojiufu@linux.ibm.com/mbox/"},{"id":1232,"url":"https://patchwork.plctlab.org/api/1.2/patches/1232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915084130.130148-1-juzhe.zhong@rivai.ai/","msgid":"<20220915084130.130148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T08:41:30","name":"RISC-V: Add RVV machine modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915084130.130148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1233,"url":"https://patchwork.plctlab.org/api/1.2/patches/1233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113730.19569-1-julian@codesourcery.com/","msgid":"<20220915113730.19569-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-15T11:37:30","name":"Fix c-c++-common/goacc/mdc-2.c and g++.dg/goacc/mdc.C tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113730.19569-1-julian@codesourcery.com/mbox/"},{"id":1234,"url":"https://patchwork.plctlab.org/api/1.2/patches/1234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113943.264538-1-juzhe.zhong@rivai.ai/","msgid":"<20220915113943.264538-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-15T11:39:43","name":"RISC-V: Add RVV machine modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915113943.264538-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1235,"url":"https://patchwork.plctlab.org/api/1.2/patches/1235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915120224.56342-1-julian@codesourcery.com/","msgid":"<20220915120224.56342-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-15T12:02:24","name":"Fix c-c++-common/gomp/target-50.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915120224.56342-1-julian@codesourcery.com/mbox/"},{"id":1236,"url":"https://patchwork.plctlab.org/api/1.2/patches/1236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de/","msgid":"<20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-15T12:23:14","name":"tree-optimization/106922 - PRE and virtual operand translation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915122315.5F5DB133B6@imap2.suse-dmz.suse.de/mbox/"},{"id":1237,"url":"https://patchwork.plctlab.org/api/1.2/patches/1237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915125234.1180957-1-torbjorn.svensson@foss.st.com/","msgid":"<20220915125234.1180957-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-15T12:52:35","name":"[pushed] MAINTAINERS: Add myself to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915125234.1180957-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1238,"url":"https://patchwork.plctlab.org/api/1.2/patches/1238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915155822.4021344-1-ppalka@redhat.com/","msgid":"<20220915155822.4021344-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T15:58:22","name":"c++: constraint matching, TEMPLATE_ID_EXPR, current inst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915155822.4021344-1-ppalka@redhat.com/mbox/"},{"id":1239,"url":"https://patchwork.plctlab.org/api/1.2/patches/1239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915180312.1596193-1-ppalka@redhat.com/","msgid":"<20220915180312.1596193-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T18:03:12","name":"c++: '\''mutable'\'' within constexpr [PR92505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915180312.1596193-1-ppalka@redhat.com/mbox/"},{"id":1240,"url":"https://patchwork.plctlab.org/api/1.2/patches/1240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915201627.2942314-1-ppalka@redhat.com/","msgid":"<20220915201627.2942314-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-15T20:16:27","name":"c++: modules ICE with typename friend declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915201627.2942314-1-ppalka@redhat.com/mbox/"},{"id":1241,"url":"https://patchwork.plctlab.org/api/1.2/patches/1241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-677b8c14-ffe9-47f3-a4e6-6a6286f00ea4-1663273406376@3c-app-gmx-bs69/","msgid":"","list_archive_url":null,"date":"2022-09-15T20:23:26","name":"[committed] Fortran: error recovery for bad deferred character length assignment [PR104314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-677b8c14-ffe9-47f3-a4e6-6a6286f00ea4-1663273406376@3c-app-gmx-bs69/mbox/"},{"id":1242,"url":"https://patchwork.plctlab.org/api/1.2/patches/1242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915204623.407931-1-jwakely@redhat.com/","msgid":"<20220915204623.407931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-15T20:46:23","name":"[committed] libstdc++: Tweak TSan annotations for std::atomic>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915204623.407931-1-jwakely@redhat.com/mbox/"},{"id":1243,"url":"https://patchwork.plctlab.org/api/1.2/patches/1243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6f4abfa3-3785-43e9-a9e9-2c4de9afa4ba-1663275092004@3c-app-gmx-bs27/","msgid":"","list_archive_url":null,"date":"2022-09-15T20:51:32","name":"[committed] Fortran: catch NULL pointer dereferences while simplifying PACK [PR106857]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6f4abfa3-3785-43e9-a9e9-2c4de9afa4ba-1663275092004@3c-app-gmx-bs27/mbox/"},{"id":1244,"url":"https://patchwork.plctlab.org/api/1.2/patches/1244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915225856.413536-1-jwakely@redhat.com/","msgid":"<20220915225856.413536-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-15T22:58:56","name":"[committed] libstdc++: Remove unnecessary header from ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220915225856.413536-1-jwakely@redhat.com/mbox/"},{"id":1245,"url":"https://patchwork.plctlab.org/api/1.2/patches/1245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916005443.3305032-1-hongtao.liu@intel.com/","msgid":"<20220916005443.3305032-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T00:54:43","name":"Modernize ix86_builtin_vectorized_function with corresponding expanders.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916005443.3305032-1-hongtao.liu@intel.com/mbox/"},{"id":1246,"url":"https://patchwork.plctlab.org/api/1.2/patches/1246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916010659.37555-1-hongtao.liu@intel.com/","msgid":"<20220916010659.37555-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T01:06:59","name":"[x86] Don'\''t optimize cmp mem, 0 to load mem, reg + test reg, reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916010659.37555-1-hongtao.liu@intel.com/mbox/"},{"id":1247,"url":"https://patchwork.plctlab.org/api/1.2/patches/1247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916060052.48335-1-hongtao.liu@intel.com/","msgid":"<20220916060052.48335-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-16T06:00:52","name":"[x86] Adjust issue_rate for latest Intel processors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916060052.48335-1-hongtao.liu@intel.com/mbox/"},{"id":1248,"url":"https://patchwork.plctlab.org/api/1.2/patches/1248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilln4uo0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-16T07:58:55","name":"vect: Fix missed gather load opportunity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilln4uo0.fsf@arm.com/mbox/"},{"id":1249,"url":"https://patchwork.plctlab.org/api/1.2/patches/1249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbv4udm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-16T08:05:09","name":"vect: Fix SLP layout handling of masked loads [PR106794]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbv4udm.fsf@arm.com/mbox/"},{"id":1250,"url":"https://patchwork.plctlab.org/api/1.2/patches/1250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916100608.491243-1-jwakely@redhat.com/","msgid":"<20220916100608.491243-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T10:06:08","name":"[committed] libstdc++: Document new libstdc++.so symbol versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916100608.491243-1-jwakely@redhat.com/mbox/"},{"id":1251,"url":"https://patchwork.plctlab.org/api/1.2/patches/1251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de/","msgid":"<2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de>","list_archive_url":null,"date":"2022-09-16T10:19:36","name":"[v4] eliminate mutex in fast path of __register_frame","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a4776b9-9271-bb3c-a626-d5ec22dae6f3@in.tum.de/mbox/"},{"id":1252,"url":"https://patchwork.plctlab.org/api/1.2/patches/1252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916122314.3826744-1-yunqiang.su@cipunited.com/","msgid":"<20220916122314.3826744-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2022-09-16T12:23:14","name":"[v2] MIPS: improve -march=native arch detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916122314.3826744-1-yunqiang.su@cipunited.com/mbox/"},{"id":1253,"url":"https://patchwork.plctlab.org/api/1.2/patches/1253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916124240.176613-1-jason@redhat.com/","msgid":"<20220916124240.176613-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-16T12:42:40","name":"[pushed] c++: member fn in omp loc list [PR106858]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916124240.176613-1-jason@redhat.com/mbox/"},{"id":1254,"url":"https://patchwork.plctlab.org/api/1.2/patches/1254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161759.510516-1-jwakely@redhat.com/","msgid":"<20220916161759.510516-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:17:59","name":"[committed] libstdc++: Fix Doxygen commands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161759.510516-1-jwakely@redhat.com/mbox/"},{"id":1256,"url":"https://patchwork.plctlab.org/api/1.2/patches/1256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161814.510563-1-jwakely@redhat.com/","msgid":"<20220916161814.510563-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:14","name":"[committed] libstdc++: Remove __alloc_neq helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161814.510563-1-jwakely@redhat.com/mbox/"},{"id":1255,"url":"https://patchwork.plctlab.org/api/1.2/patches/1255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161826.510606-1-jwakely@redhat.com/","msgid":"<20220916161826.510606-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:26","name":"[committed] libstdc++: Do not use nullptr in C++03-compatible code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161826.510606-1-jwakely@redhat.com/mbox/"},{"id":1257,"url":"https://patchwork.plctlab.org/api/1.2/patches/1257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161857.510663-1-jwakely@redhat.com/","msgid":"<20220916161857.510663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T16:18:57","name":"[committed] libstdc++: Fix tr1::variate_generator::engine_value_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916161857.510663-1-jwakely@redhat.com/mbox/"},{"id":1258,"url":"https://patchwork.plctlab.org/api/1.2/patches/1258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916184922.3274016-1-slyich@gmail.com/","msgid":"<20220916184922.3274016-1-slyich@gmail.com>","list_archive_url":null,"date":"2022-09-16T18:49:22","name":"gcc/config/t-i386: add build dependencies on i386-builtin-types.inc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916184922.3274016-1-slyich@gmail.com/mbox/"},{"id":1259,"url":"https://patchwork.plctlab.org/api/1.2/patches/1259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916202127.579816-1-jwakely@redhat.com/","msgid":"<20220916202127.579816-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-16T20:21:27","name":"[committed] libstdc++: Fix compare_exchange_padding.cc test for std::atomic_ref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220916202127.579816-1-jwakely@redhat.com/mbox/"},{"id":1360,"url":"https://patchwork.plctlab.org/api/1.2/patches/1360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105053.E298E1346B@imap2.suse-dmz.suse.de/","msgid":"<20220922105053.E298E1346B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T10:50:53","name":"tree-optimization/99407 - DSE with data-ref analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105053.E298E1346B@imap2.suse-dmz.suse.de/mbox/"},{"id":1361,"url":"https://patchwork.plctlab.org/api/1.2/patches/1361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105533.1837026-1-jcmvbkbc@gmail.com/","msgid":"<20220922105533.1837026-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-09-22T10:55:33","name":"[COMMITTED] xtensa: gcc: enable section anchors support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922105533.1837026-1-jcmvbkbc@gmail.com/mbox/"},{"id":1362,"url":"https://patchwork.plctlab.org/api/1.2/patches/1362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de/","msgid":"<20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T11:10:08","name":"tree-optimization/106922 - missed FRE/PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922111009.3EF0413AA5@imap2.suse-dmz.suse.de/mbox/"},{"id":1363,"url":"https://patchwork.plctlab.org/api/1.2/patches/1363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz/","msgid":"<5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz>","list_archive_url":null,"date":"2022-09-22T11:10:46","name":"remove -gz=zlib-gnu option value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e5b1311-2db1-656f-d9de-c180224802ac@suse.cz/mbox/"},{"id":1364,"url":"https://patchwork.plctlab.org/api/1.2/patches/1364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz/","msgid":"<3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz>","list_archive_url":null,"date":"2022-09-22T12:26:39","name":"[v2] remove -gz=zlib-gnu option value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f360308-03b5-0c2c-6b8f-dda38f5b6121@suse.cz/mbox/"},{"id":1365,"url":"https://patchwork.plctlab.org/api/1.2/patches/1365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz/","msgid":"<19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz>","list_archive_url":null,"date":"2022-09-22T12:51:05","name":"support -gz=zstd for both linker and assembler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19677278-9d77-d0ab-1257-225f2d33e6cd@suse.cz/mbox/"},{"id":1366,"url":"https://patchwork.plctlab.org/api/1.2/patches/1366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz/","msgid":"<8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz>","list_archive_url":null,"date":"2022-09-22T13:04:47","name":"[DOCS] changes: mentioned ignore -gz=zlib-gnu option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d90f74b-c3ec-880b-8dcb-75c14d6cb5b5@suse.cz/mbox/"},{"id":1367,"url":"https://patchwork.plctlab.org/api/1.2/patches/1367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de/","msgid":"<20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-22T13:19:38","name":"tree-optimization/102801 - testcase for uninit diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922131938.AAC0C1346B@imap2.suse-dmz.suse.de/mbox/"},{"id":1368,"url":"https://patchwork.plctlab.org/api/1.2/patches/1368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVBpzhKda=cjGc5qo=bYESO_zcfpt3Ba6GUQNXNBPMLjA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T13:28:29","name":"libgo patch committed: Add cgo.Incomplete","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVBpzhKda=cjGc5qo=bYESO_zcfpt3Ba6GUQNXNBPMLjA@mail.gmail.com/mbox/"},{"id":1369,"url":"https://patchwork.plctlab.org/api/1.2/patches/1369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922133900.142238-1-polacek@redhat.com/","msgid":"<20220922133900.142238-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-22T13:39:00","name":"c++: Implement __is_{nothrow_,}convertible [PR106784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922133900.142238-1-polacek@redhat.com/mbox/"},{"id":1370,"url":"https://patchwork.plctlab.org/api/1.2/patches/1370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz/","msgid":"<744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz>","list_archive_url":null,"date":"2022-09-22T13:58:53","name":"opts: fix --help=common with '\''\\t'\'' description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/744c4c66-b7cb-f99f-a63e-1cc58c291e96@suse.cz/mbox/"},{"id":1371,"url":"https://patchwork.plctlab.org/api/1.2/patches/1371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-1-jwakely@redhat.com/","msgid":"<20220922142353.1139862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:23:52","name":"[committed,1/2] libstdc++: Rearrange tests for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-1-jwakely@redhat.com/mbox/"},{"id":1372,"url":"https://patchwork.plctlab.org/api/1.2/patches/1372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-2-jwakely@redhat.com/","msgid":"<20220922142353.1139862-2-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:23:53","name":"[committed,2/2] libstdc++: Implement constexpr std::bitset for C++23 (P2417R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142353.1139862-2-jwakely@redhat.com/mbox/"},{"id":1373,"url":"https://patchwork.plctlab.org/api/1.2/patches/1373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142515.1140135-1-jwakely@redhat.com/","msgid":"<20220922142515.1140135-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-22T14:25:15","name":"[committed] libiberty: Refer to Bugzilla in README","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922142515.1140135-1-jwakely@redhat.com/mbox/"},{"id":1374,"url":"https://patchwork.plctlab.org/api/1.2/patches/1374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMXYATzMsLq2-YSHfA+pFTrM376Fn=E3iQ=Z4N3FRu-EPA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T15:02:19","name":"TYPE_{MIN/MAX}_VALUE for floats?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMXYATzMsLq2-YSHfA+pFTrM376Fn=E3iQ=Z4N3FRu-EPA@mail.gmail.com/mbox/"},{"id":1375,"url":"https://patchwork.plctlab.org/api/1.2/patches/1375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyyFs7w3npTxkci7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-22T15:56:35","name":"[RFC] __trunc{tf,xf,df,sf,hf}bf2, __truncbfhf2 and __extendbfsf2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YyyFs7w3npTxkci7@tucnak/mbox/"},{"id":1376,"url":"https://patchwork.plctlab.org/api/1.2/patches/1376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164057.4107373-1-torbjorn.svensson@foss.st.com/","msgid":"<20220922164057.4107373-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-22T16:40:58","name":"testsuite: Sanitize fails for SP FPU on Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164057.4107373-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1377,"url":"https://patchwork.plctlab.org/api/1.2/patches/1377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164752.2566043-1-aldyh@redhat.com/","msgid":"<20220922164752.2566043-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:47:52","name":"Add debug functions for REAL_VALUE_TYPE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164752.2566043-1-aldyh@redhat.com/mbox/"},{"id":1379,"url":"https://patchwork.plctlab.org/api/1.2/patches/1379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-1-aldyh@redhat.com/","msgid":"<20220922164911.2566143-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:49:10","name":"frange: dump hex values when dumping FP numbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-1-aldyh@redhat.com/mbox/"},{"id":1378,"url":"https://patchwork.plctlab.org/api/1.2/patches/1378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-2-aldyh@redhat.com/","msgid":"<20220922164911.2566143-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-22T16:49:11","name":"frange: drop endpoints to min/max representable numbers for -ffinite-math-only.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922164911.2566143-2-aldyh@redhat.com/mbox/"},{"id":1380,"url":"https://patchwork.plctlab.org/api/1.2/patches/1380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com/","msgid":"<0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com>","list_archive_url":null,"date":"2022-09-22T17:06:16","name":"[_GLIBCXX_DEBUG,_GLIBCXX_INLINE_VERSION] Add missing printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0227a2ef-9efa-6bb2-6529-cb38d081f8be@gmail.com/mbox/"},{"id":1381,"url":"https://patchwork.plctlab.org/api/1.2/patches/1381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922182502.3218391-1-ppalka@redhat.com/","msgid":"<20220922182502.3218391-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:25:02","name":"c++ modules: ICE with class NTTP argument [PR100616]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220922182502.3218391-1-ppalka@redhat.com/mbox/"},{"id":1382,"url":"https://patchwork.plctlab.org/api/1.2/patches/1382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17227f0-cdcf-f25b-58fb-4ad2751ff772@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T18:53:24","name":"[01/17] Replace another snippet with a call to, gimple_range_ssa_names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17227f0-cdcf-f25b-58fb-4ad2751ff772@redhat.com/mbox/"},{"id":1383,"url":"https://patchwork.plctlab.org/api/1.2/patches/1383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com/","msgid":"<1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:55:20","name":"[02/17] Adjust range_op_handler to store the handler directly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c18ea06-495c-52f5-67ea-b116ef0df3bc@redhat.com/mbox/"},{"id":1384,"url":"https://patchwork.plctlab.org/api/1.2/patches/1384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com/","msgid":"<6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:56:29","name":"[03/17] Create gimple_range_op_handler in a new source file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d24be24-0924-f56b-7dfe-18b251b42ed5@redhat.com/mbox/"},{"id":1385,"url":"https://patchwork.plctlab.org/api/1.2/patches/1385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc2b47bd-57ab-e9bf-50b0-cbdf89f976da@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T18:58:04","name":"[04/17] Fix calc_op1 for undefined op2_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc2b47bd-57ab-e9bf-50b0-cbdf89f976da@redhat.com/mbox/"},{"id":1386,"url":"https://patchwork.plctlab.org/api/1.2/patches/1386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com/","msgid":"<78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com>","list_archive_url":null,"date":"2022-09-22T18:59:22","name":"[05/17] Add missing float fold_range prototype for floats.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78509fb2-e386-0cbe-db5f-abca5cfe48f6@redhat.com/mbox/"},{"id":1387,"url":"https://patchwork.plctlab.org/api/1.2/patches/1387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com/","msgid":"<35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:00:27","name":"[06/17] Always check the return value of fold_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35eb7b99-9e99-dded-2dbc-1bc400df0a48@redhat.com/mbox/"},{"id":1388,"url":"https://patchwork.plctlab.org/api/1.2/patches/1388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com/","msgid":"<4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:01:37","name":"[07/17] Add range-ops support for builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ca8b041-459d-6fbc-794f-d1d93a266f95@redhat.com/mbox/"},{"id":1389,"url":"https://patchwork.plctlab.org/api/1.2/patches/1389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37539494-f250-1f45-1dbd-e3f82c296136@redhat.com/","msgid":"<37539494-f250-1f45-1dbd-e3f82c296136@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:02:23","name":"[08/17] Convert CFN_BUILT_IN_SIGNBIT to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37539494-f250-1f45-1dbd-e3f82c296136@redhat.com/mbox/"},{"id":1390,"url":"https://patchwork.plctlab.org/api/1.2/patches/1390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/99671c98-c81e-1fa3-b851-263492a54669@redhat.com/","msgid":"<99671c98-c81e-1fa3-b851-263492a54669@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:05:08","name":"[09/17] Convert CFN_BUILT_IN_TOUPPER and TOLOWER to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/99671c98-c81e-1fa3-b851-263492a54669@redhat.com/mbox/"},{"id":1391,"url":"https://patchwork.plctlab.org/api/1.2/patches/1391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21789ec-cfab-4503-410f-48bbd905d4c6@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:05:13","name":"[10/17] Convert CFN_BUILT_FFS and CFN_POPCOUNT to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21789ec-cfab-4503-410f-48bbd905d4c6@redhat.com/mbox/"},{"id":1392,"url":"https://patchwork.plctlab.org/api/1.2/patches/1392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2ad2282-85ff-da6b-970a-66e63c925957@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:05:19","name":"[11/17] Convert CFN_CLZ builtins to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2ad2282-85ff-da6b-970a-66e63c925957@redhat.com/mbox/"},{"id":1393,"url":"https://patchwork.plctlab.org/api/1.2/patches/1393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com/","msgid":"<622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com>","list_archive_url":null,"date":"2022-09-22T19:05:36","name":"[12/17] Convert CFN_CTZ builtins to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/622e4a48-eae4-600f-db3c-c478f537caa7@redhat.com/mbox/"},{"id":1395,"url":"https://patchwork.plctlab.org/api/1.2/patches/1395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffc36af1-4096-fba9-ae43-61e105b7e20d@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:06:14","name":"[13/17] Convert CFN_BUILT_IN_CLRSB to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffc36af1-4096-fba9-ae43-61e105b7e20d@redhat.com/mbox/"},{"id":1394,"url":"https://patchwork.plctlab.org/api/1.2/patches/1394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2f34a94-1eb8-07a6-f174-55246161e1a5@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:06:50","name":"[14/17] Convert CFN_BUILT_IN_UBSAN_CHECK_* to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2f34a94-1eb8-07a6-f174-55246161e1a5@redhat.com/mbox/"},{"id":1396,"url":"https://patchwork.plctlab.org/api/1.2/patches/1396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc889d03-0184-d34c-5d54-87f7c9763195@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:08:16","name":"[15/17] Convert CFN_BUILT_IN_STRLEN to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc889d03-0184-d34c-5d54-87f7c9763195@redhat.com/mbox/"},{"id":1397,"url":"https://patchwork.plctlab.org/api/1.2/patches/1397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a297a47e-cc9f-12b3-ab99-dd52f897e16a@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:10:07","name":"[16/17] Convert CFN_BUILT_IN_GOACC_DIM_* to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a297a47e-cc9f-12b3-ab99-dd52f897e16a@redhat.com/mbox/"},{"id":1398,"url":"https://patchwork.plctlab.org/api/1.2/patches/1398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d97e89ef-7296-3cf4-3e52-e9aedcbc7432@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-22T19:10:45","name":"[17/17] Convert CFN_BUILT_IN_PARITY to range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d97e89ef-7296-3cf4-3e52-e9aedcbc7432@redhat.com/mbox/"},{"id":1399,"url":"https://patchwork.plctlab.org/api/1.2/patches/1399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy1Sjn8VA1HVBkB7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-23T06:30:38","name":"attribs: Improve diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy1Sjn8VA1HVBkB7@tucnak/mbox/"},{"id":1400,"url":"https://patchwork.plctlab.org/api/1.2/patches/1400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923064254.326775-1-hongtao.liu@intel.com/","msgid":"<20220923064254.326775-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-23T06:42:54","name":"[x86] Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_const_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923064254.326775-1-hongtao.liu@intel.com/mbox/"},{"id":1401,"url":"https://patchwork.plctlab.org/api/1.2/patches/1401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923084330.4131742-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923084330.4131742-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T08:43:31","name":"[testsuite,arm] Fix cmse-15.c expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923084330.4131742-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1402,"url":"https://patchwork.plctlab.org/api/1.2/patches/1402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16239-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:17:23","name":"[2/2] AArch64 Add support for neg on v1df","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16239-tamar@arm.com/mbox/"},{"id":1403,"url":"https://patchwork.plctlab.org/api/1.2/patches/1403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16259-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:18:14","name":"middle-end Recognize more conditional comparisons idioms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16259-tamar@arm.com/mbox/"},{"id":1404,"url":"https://patchwork.plctlab.org/api/1.2/patches/1404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15680-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:21:20","name":"middle-end fix floating out of constants in conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15680-tamar@arm.com/mbox/"},{"id":1405,"url":"https://patchwork.plctlab.org/api/1.2/patches/1405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16250-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:23:03","name":"[testsuite] : make check-functions-body dump expected and seen cases on failure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16250-tamar@arm.com/mbox/"},{"id":1406,"url":"https://patchwork.plctlab.org/api/1.2/patches/1406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16248-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:24:56","name":"[1/2] middle-end: RFC: On expansion of conditional branches, give hint if argument is a truth type to backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16248-tamar@arm.com/mbox/"},{"id":1407,"url":"https://patchwork.plctlab.org/api/1.2/patches/1407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy17hn8LsinOmJID@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:25:26","name":"[2/2] AArch64 Extend tbz pattern to allow SI to SI extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy17hn8LsinOmJID@arm.com/mbox/"},{"id":1408,"url":"https://patchwork.plctlab.org/api/1.2/patches/1408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15779-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:08","name":"[1/4] middle-end Support not decomposing specific divisions during vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15779-tamar@arm.com/mbox/"},{"id":1411,"url":"https://patchwork.plctlab.org/api/1.2/patches/1411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19Z/q/HPJ6wm5w@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:27","name":"[2/4] AArch64 Add implementation for pow2 bitmask division.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19Z/q/HPJ6wm5w@arm.com/mbox/"},{"id":1409,"url":"https://patchwork.plctlab.org/api/1.2/patches/1409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19es5TOyWlHsnk@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:33:46","name":"[3/4] AArch64 Add SVE2 implementation for pow2 bitmask division","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19es5TOyWlHsnk@arm.com/mbox/"},{"id":1410,"url":"https://patchwork.plctlab.org/api/1.2/patches/1410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19kZozCiweoBcT@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T09:34:09","name":"[4/4] AArch64 sve2: rewrite pack + NARROWB + NARROWB to NARROWB + NARROWT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy19kZozCiweoBcT@arm.com/mbox/"},{"id":1412,"url":"https://patchwork.plctlab.org/api/1.2/patches/1412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8bae7c0-2c0a-7022-9b7b-8ca41ef01544@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T10:39:43","name":"[committed] MAINTAINERS: Add myself to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8bae7c0-2c0a-7022-9b7b-8ca41ef01544@codesourcery.com/mbox/"},{"id":1413,"url":"https://patchwork.plctlab.org/api/1.2/patches/1413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15776-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T11:42:12","name":"[1/2] middle-end Fold BIT_FIELD_REF and Shifts into BIT_FIELD_REFs alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-15776-tamar@arm.com/mbox/"},{"id":1414,"url":"https://patchwork.plctlab.org/api/1.2/patches/1414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy2b1o/foRR6xvBZ@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T11:43:18","name":"[2/2] AArch64 Perform more late folding of reg moves and shifts which arrive after expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yy2b1o/foRR6xvBZ@arm.com/mbox/"},{"id":1415,"url":"https://patchwork.plctlab.org/api/1.2/patches/1415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115838.1327654-1-jwakely@redhat.com/","msgid":"<20220923115838.1327654-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T11:58:38","name":"[committed] libstdc++: Optimize std::bitset::to_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115838.1327654-1-jwakely@redhat.com/mbox/"},{"id":1416,"url":"https://patchwork.plctlab.org/api/1.2/patches/1416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115950.1327715-1-jwakely@redhat.com/","msgid":"<20220923115950.1327715-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T11:59:50","name":"[committed] libstdc++: Enable constexpr std::bitset for debug mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923115950.1327715-1-jwakely@redhat.com/mbox/"},{"id":1417,"url":"https://patchwork.plctlab.org/api/1.2/patches/1417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923120331.4136741-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923120331.4136741-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T12:03:32","name":"testsuite: Verify that module-mapper is avialable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923120331.4136741-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1418,"url":"https://patchwork.plctlab.org/api/1.2/patches/1418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923123258.176D213A00@imap2.suse-dmz.suse.de/","msgid":"<20220923123258.176D213A00@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-23T12:32:57","name":"tree-optimization/106922 - extend same-val clobber FRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923123258.176D213A00@imap2.suse-dmz.suse.de/mbox/"},{"id":1419,"url":"https://patchwork.plctlab.org/api/1.2/patches/1419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923125830.2715538-1-aldyh@redhat.com/","msgid":"<20220923125830.2715538-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-23T12:58:30","name":"[COMMITTED] frange: Make the setter taking trees a wrapper.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923125830.2715538-1-aldyh@redhat.com/mbox/"},{"id":1420,"url":"https://patchwork.plctlab.org/api/1.2/patches/1420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923135914.24219-1-soeren@soeren-tempel.net/","msgid":"<20220923135914.24219-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-09-23T13:59:14","name":"[v2] libgo: Portable access to thread ID in struct sigevent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923135914.24219-1-soeren@soeren-tempel.net/mbox/"},{"id":1421,"url":"https://patchwork.plctlab.org/api/1.2/patches/1421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923141522.1393426-1-jwakely@redhat.com/","msgid":"<20220923141522.1393426-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-23T14:15:22","name":"[committed] libstdc++: Micro-optimizaion for std::bitset stream extraction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923141522.1393426-1-jwakely@redhat.com/mbox/"},{"id":1422,"url":"https://patchwork.plctlab.org/api/1.2/patches/1422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b694809c-c969-1d8f-196b-589194312c02@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T15:24:23","name":"OpenACC: Fix reduction tree-sharing issue [PR106982]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b694809c-c969-1d8f-196b-589194312c02@codesourcery.com/mbox/"},{"id":1423,"url":"https://patchwork.plctlab.org/api/1.2/patches/1423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rmaqetf.fsf@euler.schwinge.homeip.net/","msgid":"<878rmaqetf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-09-23T15:40:44","name":"[og12] Come up with {,UN}LIKELY macros (was: [Patch][2/3][v2] nvptx: libgomp+mkoffload.cc: Prepare for reverse offload fn lookup)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rmaqetf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":1424,"url":"https://patchwork.plctlab.org/api/1.2/patches/1424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923154924.GA66899@adacore.com/","msgid":"<20220923154924.GA66899@adacore.com>","list_archive_url":null,"date":"2022-09-23T15:49:24","name":"Fix thinko in powerpc default specs for -mabi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923154924.GA66899@adacore.com/mbox/"},{"id":1425,"url":"https://patchwork.plctlab.org/api/1.2/patches/1425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184026.379494-1-polacek@redhat.com/","msgid":"<20220923184026.379494-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-23T18:40:26","name":"c++: Don'\''t quote nothrow in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184026.379494-1-polacek@redhat.com/mbox/"},{"id":1426,"url":"https://patchwork.plctlab.org/api/1.2/patches/1426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184344.4147951-1-torbjorn.svensson@foss.st.com/","msgid":"<20220923184344.4147951-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-23T18:43:44","name":"Fix typo in chapter level for RISC-V attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220923184344.4147951-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1427,"url":"https://patchwork.plctlab.org/api/1.2/patches/1427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542E50C76592E21B7207AB491519@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-23T18:53:16","name":"Fix profile count comparison.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542E50C76592E21B7207AB491519@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1428,"url":"https://patchwork.plctlab.org/api/1.2/patches/1428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209232123240.183299@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-23T21:24:07","name":"[committed] testsuite: Add more C2x tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209232123240.183299@digraph.polyomino.org.uk/mbox/"},{"id":1429,"url":"https://patchwork.plctlab.org/api/1.2/patches/1429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000747.1717312-1-jwakely@redhat.com/","msgid":"<20220924000747.1717312-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T00:07:47","name":"[committed] libstdc++: Fix std::is_nothrow_invocable_r for uncopyable prvalues [PR91456]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000747.1717312-1-jwakely@redhat.com/mbox/"},{"id":1430,"url":"https://patchwork.plctlab.org/api/1.2/patches/1430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000753.1717363-1-jwakely@redhat.com/","msgid":"<20220924000753.1717363-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T00:07:53","name":"[committed] libstdc++: Add test for type traits not having friend access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924000753.1717363-1-jwakely@redhat.com/mbox/"},{"id":1431,"url":"https://patchwork.plctlab.org/api/1.2/patches/1431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924011611.433106-1-polacek@redhat.com/","msgid":"<20220924011611.433106-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-24T01:16:11","name":"c++: P2513R4, char8_t Compatibility and Portability Fix [PR106656]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924011611.433106-1-polacek@redhat.com/mbox/"},{"id":1432,"url":"https://patchwork.plctlab.org/api/1.2/patches/1432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924124722.1946365-1-xry111@xry111.site/","msgid":"<20220924124722.1946365-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-24T12:47:22","name":"LoongArch: Use UNSPEC for fmin/fmax RTL pattern [PR105414]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924124722.1946365-1-xry111@xry111.site/mbox/"},{"id":1433,"url":"https://patchwork.plctlab.org/api/1.2/patches/1433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924141912.1892292-1-jwakely@redhat.com/","msgid":"<20220924141912.1892292-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-24T14:19:12","name":"[committed] libstdc++: Simplify detection idiom using concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220924141912.1892292-1-jwakely@redhat.com/mbox/"},{"id":1434,"url":"https://patchwork.plctlab.org/api/1.2/patches/1434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220925112537.2209847-1-xry111@xry111.site/","msgid":"<20220925112537.2209847-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-25T11:25:37","name":"LoongArch: Add prefetch instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220925112537.2209847-1-xry111@xry111.site/mbox/"},{"id":1435,"url":"https://patchwork.plctlab.org/api/1.2/patches/1435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada747e8-6ba5-70f9-f7a8-eb1685b3b09b@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-09-25T16:28:55","name":"[RFA] Minor improvement to coremark, avoid unconditional jump to return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada747e8-6ba5-70f9-f7a8-eb1685b3b09b@ventanamicro.com/mbox/"},{"id":1436,"url":"https://patchwork.plctlab.org/api/1.2/patches/1436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7af00afc-50de-4985-97b2-100ac2a7285b-1664139876212@3c-app-gmx-bap15/","msgid":"","list_archive_url":null,"date":"2022-09-25T21:04:36","name":"Proxy ping [PATCH] Fortran: Fix ICE and wrong code for assumed-rank arrays [PR100029, PR100040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7af00afc-50de-4985-97b2-100ac2a7285b-1664139876212@3c-app-gmx-bap15/mbox/"},{"id":1437,"url":"https://patchwork.plctlab.org/api/1.2/patches/1437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020010.779566-1-chenglulu@loongson.cn/","msgid":"<20220926020010.779566-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-26T02:00:10","name":"LoongArch: Libvtv add LoongArch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020010.779566-1-chenglulu@loongson.cn/mbox/"},{"id":1438,"url":"https://patchwork.plctlab.org/api/1.2/patches/1438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020504.791159-1-chenglulu@loongson.cn/","msgid":"<20220926020504.791159-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-26T02:05:04","name":"LoongArch: Libitm add LoongArch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926020504.791159-1-chenglulu@loongson.cn/mbox/"},{"id":1439,"url":"https://patchwork.plctlab.org/api/1.2/patches/1439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926031434.47605-1-hongtao.liu@intel.com/","msgid":"<20220926031434.47605-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-26T03:14:34","name":"[x86] Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_const_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926031434.47605-1-hongtao.liu@intel.com/mbox/"},{"id":1440,"url":"https://patchwork.plctlab.org/api/1.2/patches/1440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com/","msgid":"<1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com>","list_archive_url":null,"date":"2022-09-26T03:35:28","name":"[v7,rs6000] Implemented f[min/max]_optab by xs[min/max]dp [PR103605]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a6959ac-53c5-070b-e600-6fc1bab56ae4@linux.ibm.com/mbox/"},{"id":1441,"url":"https://patchwork.plctlab.org/api/1.2/patches/1441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926051937.729321-1-lin1.hu@intel.com/","msgid":"<20220926051937.729321-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2022-09-26T05:19:37","name":"testsuite: Fix up avx256-unaligned-store-3.c test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926051937.729321-1-lin1.hu@intel.com/mbox/"},{"id":1442,"url":"https://patchwork.plctlab.org/api/1.2/patches/1442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065604.783193-1-liwei.xu@intel.com/","msgid":"<20220926065604.783193-1-liwei.xu@intel.com>","list_archive_url":null,"date":"2022-09-26T06:56:04","name":"Optimize nested permutation to single VEC_PERM_EXPR [PR54346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065604.783193-1-liwei.xu@intel.com/mbox/"},{"id":1443,"url":"https://patchwork.plctlab.org/api/1.2/patches/1443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065805.15717-1-xry111@xry111.site/","msgid":"<20220926065805.15717-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-09-26T06:58:05","name":"LoongArch: Pass cache information to optimizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926065805.15717-1-xry111@xry111.site/mbox/"},{"id":1444,"url":"https://patchwork.plctlab.org/api/1.2/patches/1444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1836c77d-56f0-fd92-6453-9978b246c969@suse.cz/","msgid":"<1836c77d-56f0-fd92-6453-9978b246c969@suse.cz>","list_archive_url":null,"date":"2022-09-26T07:46:25","name":"[pushed] ranger: remove unused function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1836c77d-56f0-fd92-6453-9978b246c969@suse.cz/mbox/"},{"id":1463,"url":"https://patchwork.plctlab.org/api/1.2/patches/1463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzFjMj+hcggRdc8F@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-26T08:30:44","name":"reassoc: Handle OFFSET_TYPE like POINTER_TYPE in optimize_range_tests_cmp_bitwise [PR107029[","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzFjMj+hcggRdc8F@tucnak/mbox/"},{"id":1445,"url":"https://patchwork.plctlab.org/api/1.2/patches/1445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091315.272096-1-poulhies@adacore.com/","msgid":"<20220926091315.272096-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:15","name":"[COMMITED] ada: Tune comment of routine for detecting junk names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091315.272096-1-poulhies@adacore.com/mbox/"},{"id":1447,"url":"https://patchwork.plctlab.org/api/1.2/patches/1447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091326.272406-1-poulhies@adacore.com/","msgid":"<20220926091326.272406-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:26","name":"[COMMITED] ada: Deconstruct build support for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091326.272406-1-poulhies@adacore.com/mbox/"},{"id":1446,"url":"https://patchwork.plctlab.org/api/1.2/patches/1446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091333.272502-1-poulhies@adacore.com/","msgid":"<20220926091333.272502-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:33","name":"[COMMITED] ada: Remove definition of MAXPATHLEN for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091333.272502-1-poulhies@adacore.com/mbox/"},{"id":1449,"url":"https://patchwork.plctlab.org/api/1.2/patches/1449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091341.272596-1-poulhies@adacore.com/","msgid":"<20220926091341.272596-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:13:41","name":"[COMMITED] ada: Remove socket definitions for ancient MinGW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091341.272596-1-poulhies@adacore.com/mbox/"},{"id":1448,"url":"https://patchwork.plctlab.org/api/1.2/patches/1448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091437.272873-1-poulhies@adacore.com/","msgid":"<20220926091437.272873-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:37","name":"[COMMITED] ada: Improve accessibility check generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091437.272873-1-poulhies@adacore.com/mbox/"},{"id":1451,"url":"https://patchwork.plctlab.org/api/1.2/patches/1451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091453.273010-1-poulhies@adacore.com/","msgid":"<20220926091453.273010-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:53","name":"[COMMITED] ada: Only reject volatile ghost objects when SPARK_Mode is On","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091453.273010-1-poulhies@adacore.com/mbox/"},{"id":1450,"url":"https://patchwork.plctlab.org/api/1.2/patches/1450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091458.273107-1-poulhies@adacore.com/","msgid":"<20220926091458.273107-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:14:58","name":"[COMMITED] ada: Delay expansion of iterated component association","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091458.273107-1-poulhies@adacore.com/mbox/"},{"id":1454,"url":"https://patchwork.plctlab.org/api/1.2/patches/1454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091505.273202-1-poulhies@adacore.com/","msgid":"<20220926091505.273202-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:05","name":"[COMMITED] ada: Delay expansion of iterator specification in preanalysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091505.273202-1-poulhies@adacore.com/mbox/"},{"id":1456,"url":"https://patchwork.plctlab.org/api/1.2/patches/1456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091511.273296-1-poulhies@adacore.com/","msgid":"<20220926091511.273296-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:11","name":"[COMMITED] ada: Make Original_Aspect_Pragma_Name more precise","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091511.273296-1-poulhies@adacore.com/mbox/"},{"id":1453,"url":"https://patchwork.plctlab.org/api/1.2/patches/1453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091516.273390-1-poulhies@adacore.com/","msgid":"<20220926091516.273390-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:16","name":"[COMMITED] ada: Document support for the mold linker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091516.273390-1-poulhies@adacore.com/mbox/"},{"id":1455,"url":"https://patchwork.plctlab.org/api/1.2/patches/1455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091522.273508-1-poulhies@adacore.com/","msgid":"<20220926091522.273508-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:22","name":"[COMMITED] ada: Improve CUDA host-side and device-side binder support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091522.273508-1-poulhies@adacore.com/mbox/"},{"id":1452,"url":"https://patchwork.plctlab.org/api/1.2/patches/1452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091526.273603-1-poulhies@adacore.com/","msgid":"<20220926091526.273603-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:26","name":"[COMMITED] ada: Document Long_Long_Long_Size parameter for -gnateT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091526.273603-1-poulhies@adacore.com/mbox/"},{"id":1458,"url":"https://patchwork.plctlab.org/api/1.2/patches/1458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091531.273721-1-poulhies@adacore.com/","msgid":"<20220926091531.273721-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:31","name":"[COMMITED] ada: Remove unreferenced C macro from OS constants template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091531.273721-1-poulhies@adacore.com/mbox/"},{"id":1457,"url":"https://patchwork.plctlab.org/api/1.2/patches/1457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091537.273815-1-poulhies@adacore.com/","msgid":"<20220926091537.273815-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:37","name":"[COMMITED] ada: Remove unreferenced Rtsfind entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091537.273815-1-poulhies@adacore.com/mbox/"},{"id":1460,"url":"https://patchwork.plctlab.org/api/1.2/patches/1460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091542.273909-1-poulhies@adacore.com/","msgid":"<20220926091542.273909-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:15:42","name":"[COMMITED] ada: Fix location of pragmas coming from aspects in top-level instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091542.273909-1-poulhies@adacore.com/mbox/"},{"id":1459,"url":"https://patchwork.plctlab.org/api/1.2/patches/1459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091626.274146-1-poulhies@adacore.com/","msgid":"<20220926091626.274146-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:16:26","name":"[COMMITED] ada: Doc: rename Valid_Image to Valid_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091626.274146-1-poulhies@adacore.com/mbox/"},{"id":1461,"url":"https://patchwork.plctlab.org/api/1.2/patches/1461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091739.274489-1-poulhies@adacore.com/","msgid":"<20220926091739.274489-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-26T09:17:39","name":"[COMMITED] ada: Remove GNATmetric'\''s documentation from GNAT'\''s documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926091739.274489-1-poulhies@adacore.com/mbox/"},{"id":1462,"url":"https://patchwork.plctlab.org/api/1.2/patches/1462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz/","msgid":"<72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz>","list_archive_url":null,"date":"2022-09-26T10:07:56","name":"[pushed] s390: fix wrong refactoring","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72fdc8a3-35f1-4f4d-f793-1d6376077170@suse.cz/mbox/"},{"id":1464,"url":"https://patchwork.plctlab.org/api/1.2/patches/1464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926121759.3179767-1-aldyh@redhat.com/","msgid":"<20220926121759.3179767-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-26T12:18:00","name":"[PR107009] Set ranges from unreachable edges for all known ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926121759.3179767-1-aldyh@redhat.com/mbox/"},{"id":1465,"url":"https://patchwork.plctlab.org/api/1.2/patches/1465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926125953.2149422-1-jwakely@redhat.com/","msgid":"<20220926125953.2149422-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T12:59:53","name":"[committed] libstdc++: Add #if around non-C++03 code in std::bitset [PR107037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926125953.2149422-1-jwakely@redhat.com/mbox/"},{"id":1466,"url":"https://patchwork.plctlab.org/api/1.2/patches/1466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926143620.24037-1-ppalka@redhat.com/","msgid":"<20220926143620.24037-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-26T14:36:20","name":"c++ modules: variable template partial spec fixes [PR107033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926143620.24037-1-ppalka@redhat.com/mbox/"},{"id":1467,"url":"https://patchwork.plctlab.org/api/1.2/patches/1467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com/","msgid":"<1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com>","list_archive_url":null,"date":"2022-09-26T15:16:44","name":"Update my email address and DCO entry in MAINTAINERS file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e58041e-93be-682f-8ba6-8ab5988b89d3@ventanamicro.com/mbox/"},{"id":1468,"url":"https://patchwork.plctlab.org/api/1.2/patches/1468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com/","msgid":"<645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com>","list_archive_url":null,"date":"2022-09-26T15:20:53","name":"Update for gcc steering committee page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/645f6940-ccf0-cc15-8267-43e3ccc73b66@ventanamicro.com/mbox/"},{"id":1469,"url":"https://patchwork.plctlab.org/api/1.2/patches/1469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926152258.20921-1-polacek@redhat.com/","msgid":"<20220926152258.20921-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-26T15:22:58","name":"c++: Instantiate less when evaluating __is_convertible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926152258.20921-1-polacek@redhat.com/mbox/"},{"id":1470,"url":"https://patchwork.plctlab.org/api/1.2/patches/1470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHSgNWwCii2jawR@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-26T16:25:36","name":"[v2] c++: Instantiate less when evaluating __is_convertible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHSgNWwCii2jawR@redhat.com/mbox/"},{"id":1471,"url":"https://patchwork.plctlab.org/api/1.2/patches/1471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHVB2eFlmeaIZoO@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-26T16:36:23","name":"openmp: Add OpenMP assume, assumes and begin/end assumes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzHVB2eFlmeaIZoO@tucnak/mbox/"},{"id":1472,"url":"https://patchwork.plctlab.org/api/1.2/patches/1472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926172441.3219466-1-aldyh@redhat.com/","msgid":"<20220926172441.3219466-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-26T17:24:41","name":"[COMMITTED] Optimize [0 = x & MASK] in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926172441.3219466-1-aldyh@redhat.com/mbox/"},{"id":1473,"url":"https://patchwork.plctlab.org/api/1.2/patches/1473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz/","msgid":"<073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz>","list_archive_url":null,"date":"2022-09-26T19:05:20","name":"[pushed] docs: add missing dash in option name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/073b479e-772b-9667-1f76-b729d49fa1eb@suse.cz/mbox/"},{"id":1474,"url":"https://patchwork.plctlab.org/api/1.2/patches/1474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzIDZSRNR65/L5zu@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-26T19:54:13","name":"[v2] c++: Don'\''t quote nothrow in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzIDZSRNR65/L5zu@redhat.com/mbox/"},{"id":1475,"url":"https://patchwork.plctlab.org/api/1.2/patches/1475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926222725.GA19652@ldh-imac.local/","msgid":"<20220926222725.GA19652@ldh-imac.local>","list_archive_url":null,"date":"2022-09-26T22:27:25","name":"Ping^3: [PATCH] libcpp: Handle extended characters in user-defined literal suffix [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926222725.GA19652@ldh-imac.local/mbox/"},{"id":1477,"url":"https://patchwork.plctlab.org/api/1.2/patches/1477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224904.2235882-1-jwakely@redhat.com/","msgid":"<20220926224904.2235882-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T22:49:04","name":"[committed] libstdc++: Use new built-ins for std::is_convertible traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224904.2235882-1-jwakely@redhat.com/mbox/"},{"id":1476,"url":"https://patchwork.plctlab.org/api/1.2/patches/1476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224909.2235959-1-jwakely@redhat.com/","msgid":"<20220926224909.2235959-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-26T22:49:09","name":"[committed] libstdc++: Update std::pointer_traits to match new LWG 3545 wording","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220926224909.2235959-1-jwakely@redhat.com/mbox/"},{"id":1478,"url":"https://patchwork.plctlab.org/api/1.2/patches/1478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-2-iii@linux.ibm.com/","msgid":"<20220927002334.651057-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2022-09-27T00:23:33","name":"[v5,1/2] asan: specify alignment for LASANPC labels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-2-iii@linux.ibm.com/mbox/"},{"id":1479,"url":"https://patchwork.plctlab.org/api/1.2/patches/1479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-3-iii@linux.ibm.com/","msgid":"<20220927002334.651057-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2022-09-27T00:23:34","name":"[v5,2/2] IBM zSystems: Define CODE_LABEL_BOUNDARY","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927002334.651057-3-iii@linux.ibm.com/mbox/"},{"id":1480,"url":"https://patchwork.plctlab.org/api/1.2/patches/1480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4086807d-97d1-ec58-1617-24dda537010a@gmail.com/","msgid":"<4086807d-97d1-ec58-1617-24dda537010a@gmail.com>","list_archive_url":null,"date":"2022-09-27T01:12:23","name":"libgompd: Add thread handles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4086807d-97d1-ec58-1617-24dda537010a@gmail.com/mbox/"},{"id":1481,"url":"https://patchwork.plctlab.org/api/1.2/patches/1481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927031639.186950-1-chenglulu@loongson.cn/","msgid":"<20220927031639.186950-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T03:16:39","name":"Libvtv-test: Fix the problem that scansarif.exp cannot be found in libvtv regression test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927031639.186950-1-chenglulu@loongson.cn/mbox/"},{"id":1482,"url":"https://patchwork.plctlab.org/api/1.2/patches/1482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927060228.573975-1-chenglulu@loongson.cn/","msgid":"<20220927060228.573975-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T06:02:28","name":"[v2] Libvtv-test: Fix bug that scansarif.exp cannot be found in libvtv regression test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927060228.573975-1-chenglulu@loongson.cn/mbox/"},{"id":1483,"url":"https://patchwork.plctlab.org/api/1.2/patches/1483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com/","msgid":"<86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com>","list_archive_url":null,"date":"2022-09-27T06:19:16","name":"[committed] Fix ICE'\''s due to jump-to-return optimization changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86bc153e-8fc7-5654-07f2-a6c16fd346c1@ventanamicro.com/mbox/"},{"id":1488,"url":"https://patchwork.plctlab.org/api/1.2/patches/1488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927074928.804896-1-chenglulu@loongson.cn/","msgid":"<20220927074928.804896-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-09-27T07:49:29","name":"[v2] LoongArch: Libvtv add loongarch support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927074928.804896-1-chenglulu@loongson.cn/mbox/"},{"id":1484,"url":"https://patchwork.plctlab.org/api/1.2/patches/1484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084453.3409529-1-aldyh@redhat.com/","msgid":"<20220927084453.3409529-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T08:44:53","name":"[COMMITTED] Add an irange setter for wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084453.3409529-1-aldyh@redhat.com/mbox/"},{"id":1485,"url":"https://patchwork.plctlab.org/api/1.2/patches/1485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzK4JeacvF923uZd@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-27T08:45:25","name":"[RFC] libstdc++: Partial library support for std::float{16,32,64,128}_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzK4JeacvF923uZd@tucnak/mbox/"},{"id":1486,"url":"https://patchwork.plctlab.org/api/1.2/patches/1486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084606.3409637-1-aldyh@redhat.com/","msgid":"<20220927084606.3409637-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T08:46:06","name":"[COMMITTED] irange: keep better track of powers of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927084606.3409637-1-aldyh@redhat.com/mbox/"},{"id":1487,"url":"https://patchwork.plctlab.org/api/1.2/patches/1487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927092608.228176-1-juzhe.zhong@rivai.ai/","msgid":"<20220927092608.228176-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-27T09:26:08","name":"RISC-V: Add ABI-defined RVV types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927092608.228176-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1489,"url":"https://patchwork.plctlab.org/api/1.2/patches/1489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927103510.2321453-1-jwakely@redhat.com/","msgid":"<20220927103510.2321453-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-27T10:35:10","name":"c++: Make __is_{, nothrow_}convertible SFINAE on access [PR107049]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927103510.2321453-1-jwakely@redhat.com/mbox/"},{"id":1490,"url":"https://patchwork.plctlab.org/api/1.2/patches/1490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzLSIMAZZhPejSzT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-27T10:36:16","name":"[committed] fixincludes: FIx up for Debian/Ubuntu includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzLSIMAZZhPejSzT@tucnak/mbox/"},{"id":1491,"url":"https://patchwork.plctlab.org/api/1.2/patches/1491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927110013.2378598-1-jwakely@redhat.com/","msgid":"<20220927110013.2378598-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-27T11:00:13","name":"[committed] libstdc++: Adjust deduction guides for static operator() [PR106651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927110013.2378598-1-jwakely@redhat.com/mbox/"},{"id":1492,"url":"https://patchwork.plctlab.org/api/1.2/patches/1492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927144019.194796-1-torbjorn.svensson@foss.st.com/","msgid":"<20220927144019.194796-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-27T14:40:20","name":"testsuite: Skip intrinsics test if arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927144019.194796-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1493,"url":"https://patchwork.plctlab.org/api/1.2/patches/1493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927150131.3487543-1-aldyh@redhat.com/","msgid":"<20220927150131.3487543-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-09-27T15:01:31","name":"[COMMITTED] range-ops: Calculate the popcount of a singleton.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927150131.3487543-1-aldyh@redhat.com/mbox/"},{"id":1494,"url":"https://patchwork.plctlab.org/api/1.2/patches/1494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927151214.1082396-1-andrea.corallo@arm.com/","msgid":"<20220927151214.1082396-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-09-27T15:12:14","name":"Don'\''t ICE running selftests if errors were raised [PR99723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927151214.1082396-1-andrea.corallo@arm.com/mbox/"},{"id":1495,"url":"https://patchwork.plctlab.org/api/1.2/patches/1495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV8j=NpiABvshLg0FOZm+pk44B8FH1+ejFgpxX+6=ZbUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T16:28:59","name":"libgo patch committed: Synchronize empty struct field handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV8j=NpiABvshLg0FOZm+pk44B8FH1+ejFgpxX+6=ZbUA@mail.gmail.com/mbox/"},{"id":1496,"url":"https://patchwork.plctlab.org/api/1.2/patches/1496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-00fca6df-5ba0-4282-afff-39debc94a9ae-1664305529428@3c-app-gmx-bap61/","msgid":"","list_archive_url":null,"date":"2022-09-27T19:05:29","name":"Fortran: error recovery while simplifying intrinsic UNPACK [PR107054]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-00fca6df-5ba0-4282-afff-39debc94a9ae-1664305529428@3c-app-gmx-bap61/mbox/"},{"id":1497,"url":"https://patchwork.plctlab.org/api/1.2/patches/1497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-1-ppalka@redhat.com/","msgid":"<20220927195030.2024439-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-27T19:50:29","name":"[1/2] c++: introduce TRAIT_TYPE alongside TRAIT_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-1-ppalka@redhat.com/mbox/"},{"id":1498,"url":"https://patchwork.plctlab.org/api/1.2/patches/1498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-2-ppalka@redhat.com/","msgid":"<20220927195030.2024439-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-27T19:50:30","name":"[2/2] c++: implement __remove_cv, __remove_reference and __remove_cvref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927195030.2024439-2-ppalka@redhat.com/mbox/"},{"id":1499,"url":"https://patchwork.plctlab.org/api/1.2/patches/1499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f41501c6-4a9a-6dc0-7224-0f9a721a0765@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T19:53:56","name":"[RFA] Avoid unnecessary load-immediate in coremark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f41501c6-4a9a-6dc0-7224-0f9a721a0765@ventanamicro.com/mbox/"},{"id":1500,"url":"https://patchwork.plctlab.org/api/1.2/patches/1500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzNcYqVuH+FsC8Wh@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-27T20:26:10","name":"[v3] c++: Implement C++23 P2266R1, Simpler implicit move [PR101165]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzNcYqVuH+FsC8Wh@redhat.com/mbox/"},{"id":1501,"url":"https://patchwork.plctlab.org/api/1.2/patches/1501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927233454.144656-1-hjl.tools@gmail.com/","msgid":"<20220927233454.144656-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-09-27T23:34:54","name":"i386: Mark XMM4-XMM6 as clobbered by encodekey128/encodekey256","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220927233454.144656-1-hjl.tools@gmail.com/mbox/"},{"id":1502,"url":"https://patchwork.plctlab.org/api/1.2/patches/1502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354209704F36E049F69EFBB091549@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T00:39:18","name":"[PUSHED] Fix AutoFDO tests to not look for hot/cold splitting.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB354209704F36E049F69EFBB091549@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1503,"url":"https://patchwork.plctlab.org/api/1.2/patches/1503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com/","msgid":"<9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com>","list_archive_url":null,"date":"2022-09-28T05:30:46","name":"rs6000: Rework option -mpowerpc64 handling [PR106680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d9f1f43-b528-387d-45a7-1d89400de0fc@linux.ibm.com/mbox/"},{"id":1504,"url":"https://patchwork.plctlab.org/api/1.2/patches/1504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35ccvwem.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T06:35:29","name":"Add OPTIONS_H_EXTRA to GTFILES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35ccvwem.fsf@arm.com/mbox/"},{"id":1505,"url":"https://patchwork.plctlab.org/api/1.2/patches/1505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f071b915-d4ce-a7c2-beb1-3b8c634d8985@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T07:39:44","name":"[wwwdocs] gcc-13/changes.html: Add nvptx'\''s --with-arch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f071b915-d4ce-a7c2-beb1-3b8c634d8985@codesourcery.com/mbox/"},{"id":1506,"url":"https://patchwork.plctlab.org/api/1.2/patches/1506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com/","msgid":"<98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T08:31:20","name":"[committed] libgomp.texi: Status '\''P'\'' for '\''assume'\'', remove duplicated line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98680f21-4bca-600b-d959-5df2f4714d80@codesourcery.com/mbox/"},{"id":1507,"url":"https://patchwork.plctlab.org/api/1.2/patches/1507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928121926.13280-1-andrea.corallo@arm.com/","msgid":"<20220928121926.13280-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-09-28T12:19:26","name":"arm: Define __ARM_FEATURE_AES and __ARM_FEATURE_SHA2 when march +crypto is selected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928121926.13280-1-andrea.corallo@arm.com/mbox/"},{"id":1508,"url":"https://patchwork.plctlab.org/api/1.2/patches/1508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928132024.64984-1-julian@codesourcery.com/","msgid":"<20220928132024.64984-1-julian@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T13:20:24","name":"OpenACC: whole struct vs. component mappings (PR107028)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928132024.64984-1-julian@codesourcery.com/mbox/"},{"id":1509,"url":"https://patchwork.plctlab.org/api/1.2/patches/1509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com/","msgid":"<87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com>","list_archive_url":null,"date":"2022-09-28T15:05:38","name":"vect: while_ult for integer mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87180de9-d0d4-b92f-405f-100aca3d5cf8@codesourcery.com/mbox/"},{"id":1510,"url":"https://patchwork.plctlab.org/api/1.2/patches/1510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzSQP8RpiJBScioT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-28T18:19:43","name":"fixincludes: Fix up powerpc floatn.h tweaks [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzSQP8RpiJBScioT@tucnak/mbox/"},{"id":1511,"url":"https://patchwork.plctlab.org/api/1.2/patches/1511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1355b5b-71cc-6726-c4e2-c1828d7a5850@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-09-28T20:42:01","name":"Fix gdb printers for std::string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1355b5b-71cc-6726-c4e2-c1828d7a5850@gmail.com/mbox/"},{"id":1512,"url":"https://patchwork.plctlab.org/api/1.2/patches/1512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e990a883-f6c0-7993-ae17-47be8f999a74@acm.org/","msgid":"","list_archive_url":null,"date":"2022-09-28T20:44:29","name":"c++: Add DECL_NTTP_OBJECT_P lang flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e990a883-f6c0-7993-ae17-47be8f999a74@acm.org/mbox/"},{"id":1513,"url":"https://patchwork.plctlab.org/api/1.2/patches/1513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928211501.2647123-1-guillermo.e.martinez@oracle.com/","msgid":"<20220928211501.2647123-1-guillermo.e.martinez@oracle.com>","list_archive_url":null,"date":"2022-09-28T21:15:01","name":"[v2] btf: Add support to BTF_KIND_ENUM64 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928211501.2647123-1-guillermo.e.martinez@oracle.com/mbox/"},{"id":1514,"url":"https://patchwork.plctlab.org/api/1.2/patches/1514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928212634.1275032-1-polacek@redhat.com/","msgid":"<20220928212634.1275032-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-28T21:26:34","name":"c++: Remove maybe-rvalue OR in implicit move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928212634.1275032-1-polacek@redhat.com/mbox/"},{"id":1515,"url":"https://patchwork.plctlab.org/api/1.2/patches/1515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233554.2670010-1-jwakely@redhat.com/","msgid":"<20220928233554.2670010-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-28T23:35:54","name":"[committed] libstdc++: Make INVOKE refuse to create dangling references [PR70692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233554.2670010-1-jwakely@redhat.com/mbox/"},{"id":1516,"url":"https://patchwork.plctlab.org/api/1.2/patches/1516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233634.2670028-1-jwakely@redhat.com/","msgid":"<20220928233634.2670028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-28T23:36:34","name":"[committed] libstdc++: Disable volatile-qualified std::bind for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220928233634.2670028-1-jwakely@redhat.com/mbox/"},{"id":1517,"url":"https://patchwork.plctlab.org/api/1.2/patches/1517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929050051.30330-1-hongtao.liu@intel.com/","msgid":"<20220929050051.30330-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-09-29T05:00:51","name":"Check nonlinear iv in vect_can_advance_ivs_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929050051.30330-1-hongtao.liu@intel.com/mbox/"},{"id":1518,"url":"https://patchwork.plctlab.org/api/1.2/patches/1518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVECKV7e5nDSA0S@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T07:06:48","name":"driver, cppdefault: Unbreak bootstrap on Debian/Ubuntu [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVECKV7e5nDSA0S@tucnak/mbox/"},{"id":1519,"url":"https://patchwork.plctlab.org/api/1.2/patches/1519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091021.359477-1-poulhies@adacore.com/","msgid":"<20220929091021.359477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:10:21","name":"[COMMITED] ada: Fix checking of Refined_State with nested package renamings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091021.359477-1-poulhies@adacore.com/mbox/"},{"id":1520,"url":"https://patchwork.plctlab.org/api/1.2/patches/1520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091050.359634-1-poulhies@adacore.com/","msgid":"<20220929091050.359634-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:10:50","name":"[COMMITED] ada: Improve efficiency of slice-of-component assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091050.359634-1-poulhies@adacore.com/mbox/"},{"id":1521,"url":"https://patchwork.plctlab.org/api/1.2/patches/1521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091106.359762-1-poulhies@adacore.com/","msgid":"<20220929091106.359762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:11:06","name":"[COMMITED] ada: Further tweak new expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091106.359762-1-poulhies@adacore.com/mbox/"},{"id":1522,"url":"https://patchwork.plctlab.org/api/1.2/patches/1522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091119.359856-1-poulhies@adacore.com/","msgid":"<20220929091119.359856-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-09-29T09:11:19","name":"[COMMITED] ada: Remove duplicated doc comment section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929091119.359856-1-poulhies@adacore.com/mbox/"},{"id":1523,"url":"https://patchwork.plctlab.org/api/1.2/patches/1523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVtB20h3jGKmYg1@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:01:43","name":"i386, rs6000, ia64, s390: Fix C++ ICEs with _Float64x or _Float128 [PR107080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzVtB20h3jGKmYg1@tucnak/mbox/"},{"id":1524,"url":"https://patchwork.plctlab.org/api/1.2/patches/1524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5569bd4-c7b5-8802-7a0b-4730a229a7e7@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:28:05","name":"[v2,DOCS] changes: mentioned ignore -gz=zlib-gnu option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5569bd4-c7b5-8802-7a0b-4730a229a7e7@suse.cz/mbox/"},{"id":1525,"url":"https://patchwork.plctlab.org/api/1.2/patches/1525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleq2tqfs.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:39:35","name":"[01/17] aarch64: Rename AARCH64_ISA architecture-level macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleq2tqfs.fsf@arm.com/mbox/"},{"id":1526,"url":"https://patchwork.plctlab.org/api/1.2/patches/1526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth70qtqfh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:39:46","name":"[02/17] aarch64: Rename AARCH64_FL architecture-level macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth70qtqfh.fsf@arm.com/mbox/"},{"id":1528,"url":"https://patchwork.plctlab.org/api/1.2/patches/1528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbetqf1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:02","name":"[03/17] aarch64: Rename AARCH64_FL_FOR_ARCH macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptczbetqf1.fsf@arm.com/mbox/"},{"id":1527,"url":"https://patchwork.plctlab.org/api/1.2/patches/1527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rm2tqeo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:15","name":"[04/17] aarch64: Add \"V\" to aarch64-arches.def names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rm2tqeo.fsf@arm.com/mbox/"},{"id":1529,"url":"https://patchwork.plctlab.org/api/1.2/patches/1529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jwqtqeb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:28","name":"[05/17] aarch64: Small config.gcc cleanups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jwqtqeb.fsf@arm.com/mbox/"},{"id":1531,"url":"https://patchwork.plctlab.org/api/1.2/patches/1531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgeisbti.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:41","name":"[06/17] aarch64: Avoid redundancy in aarch64-cores.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgeisbti.fsf@arm.com/mbox/"},{"id":1530,"url":"https://patchwork.plctlab.org/api/1.2/patches/1530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8p6sbt6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:40:53","name":"[07/17] aarch64: Remove AARCH64_FL_RCPC8_4 [PR107025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8p6sbt6.fsf@arm.com/mbox/"},{"id":1534,"url":"https://patchwork.plctlab.org/api/1.2/patches/1534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0zusbst.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:06","name":"[08/17] aarch64: Fix transitive closure of features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0zusbst.fsf@arm.com/mbox/"},{"id":1532,"url":"https://patchwork.plctlab.org/api/1.2/patches/1532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmtaisbsh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:18","name":"[09/17] aarch64: Reorder an entry in aarch64-option-extensions.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmtaisbsh.fsf@arm.com/mbox/"},{"id":1536,"url":"https://patchwork.plctlab.org/api/1.2/patches/1536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6sbs2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:33","name":"[10/17] aarch64: Simplify feature definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6sbs2.fsf@arm.com/mbox/"},{"id":1539,"url":"https://patchwork.plctlab.org/api/1.2/patches/1539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedvusbrq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:45","name":"[11/17] aarch64: Simplify generation of .arch strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedvusbrq.fsf@arm.com/mbox/"},{"id":1533,"url":"https://patchwork.plctlab.org/api/1.2/patches/1533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta66isbre.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:41:57","name":"[12/17] aarch64: Avoid std::string in static data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta66isbre.fsf@arm.com/mbox/"},{"id":1540,"url":"https://patchwork.plctlab.org/api/1.2/patches/1540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yh6sbr2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:09","name":"[13/17] aarch64: Tweak constness of option-related data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yh6sbr2.fsf@arm.com/mbox/"},{"id":1537,"url":"https://patchwork.plctlab.org/api/1.2/patches/1537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qrusbqi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:29","name":"[14/17] aarch64: Make more use of aarch64_feature_flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qrusbqi.fsf@arm.com/mbox/"},{"id":1535,"url":"https://patchwork.plctlab.org/api/1.2/patches/1535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwn9mqx5q.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:41","name":"[15/17] aarch64: Tweak contents of flags_on/off fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwn9mqx5q.fsf@arm.com/mbox/"},{"id":1538,"url":"https://patchwork.plctlab.org/api/1.2/patches/1538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfkaqx5e.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:42:53","name":"[16/17] aarch64: Tweak handling of -mgeneral-regs-only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfkaqx5e.fsf@arm.com/mbox/"},{"id":1541,"url":"https://patchwork.plctlab.org/api/1.2/patches/1541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7uyqx51.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:43:06","name":"[17/17] aarch64: Remove redundant TARGET_* checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7uyqx51.fsf@arm.com/mbox/"},{"id":1542,"url":"https://patchwork.plctlab.org/api/1.2/patches/1542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6qx3a.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T10:44:09","name":"[pushed] data-ref: Fix ranges_maybe_overlap_p test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptill6qx3a.fsf@arm.com/mbox/"},{"id":1543,"url":"https://patchwork.plctlab.org/api/1.2/patches/1543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929110723.277330-1-juzhe.zhong@rivai.ai/","msgid":"<20220929110723.277330-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-29T11:07:23","name":"[Unfinished] Add first-order recurrence autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929110723.277330-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1544,"url":"https://patchwork.plctlab.org/api/1.2/patches/1544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org/","msgid":"<31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org>","list_archive_url":null,"date":"2022-09-29T11:43:38","name":"c++: import/export NTTP objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31defc3d-cc4f-f42f-8f7e-a2272998513e@acm.org/mbox/"},{"id":1545,"url":"https://patchwork.plctlab.org/api/1.2/patches/1545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929115423.2725537-1-jwakely@redhat.com/","msgid":"<20220929115423.2725537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-29T11:54:23","name":"[committed] libstdc++: Guard use of new built-in with __has_builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929115423.2725537-1-jwakely@redhat.com/mbox/"},{"id":1546,"url":"https://patchwork.plctlab.org/api/1.2/patches/1546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929144912.21826-1-soeren@soeren-tempel.net/","msgid":"<20220929144912.21826-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-09-29T14:49:12","name":"libgo: use _off_t for mmap offset argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929144912.21826-1-soeren@soeren-tempel.net/mbox/"},{"id":1548,"url":"https://patchwork.plctlab.org/api/1.2/patches/1548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145727.269135-1-christophe.lyon@arm.com/","msgid":"<20220929145727.269135-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-09-29T14:57:27","name":"testsuite: [arm] Relax expected register names in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145727.269135-1-christophe.lyon@arm.com/mbox/"},{"id":1547,"url":"https://patchwork.plctlab.org/api/1.2/patches/1547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145740.4846-1-shorne@gmail.com/","msgid":"<20220929145740.4846-1-shorne@gmail.com>","list_archive_url":null,"date":"2022-09-29T14:57:40","name":"or1k: Only define TARGET_HAVE_TLS when HAVE_AS_TLS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929145740.4846-1-shorne@gmail.com/mbox/"},{"id":1549,"url":"https://patchwork.plctlab.org/api/1.2/patches/1549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929150504.829703-1-ppalka@redhat.com/","msgid":"<20220929150504.829703-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-29T15:05:04","name":"[RFC] c++: streamline process for adding new builtin trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929150504.829703-1-ppalka@redhat.com/mbox/"},{"id":1550,"url":"https://patchwork.plctlab.org/api/1.2/patches/1550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrk05mi3q5.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T15:45:38","name":"[12/15,V2] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrk05mi3q5.fsf_-_@arm.com/mbox/"},{"id":1551,"url":"https://patchwork.plctlab.org/api/1.2/patches/1551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzXABvJX2wl3gHkK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-29T15:55:50","name":"[RFC] c++, i386, arm, aarch64, libgcc: std::bfloat16_t and __bf16 arithmetic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzXABvJX2wl3gHkK@tucnak/mbox/"},{"id":1552,"url":"https://patchwork.plctlab.org/api/1.2/patches/1552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9f3e89e-afcb-84b4-7eba-6d029f627012@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T16:29:42","name":"[committed] amdgcn: remove unused variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9f3e89e-afcb-84b4-7eba-6d029f627012@codesourcery.com/mbox/"},{"id":1553,"url":"https://patchwork.plctlab.org/api/1.2/patches/1553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929173809.2234264-1-torbjorn.svensson@foss.st.com/","msgid":"<20220929173809.2234264-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-29T17:38:10","name":"testsuite: /dev/null is not accessible on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929173809.2234264-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1554,"url":"https://patchwork.plctlab.org/api/1.2/patches/1554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929174956.1915381-1-jason@redhat.com/","msgid":"<20220929174956.1915381-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:49:56","name":"[pushed] c++: reduce temporaries in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929174956.1915381-1-jason@redhat.com/mbox/"},{"id":1555,"url":"https://patchwork.plctlab.org/api/1.2/patches/1555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175047.1915926-1-jason@redhat.com/","msgid":"<20220929175047.1915926-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:50:47","name":"[pushed] c++: fix class-valued ?: extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175047.1915926-1-jason@redhat.com/mbox/"},{"id":1556,"url":"https://patchwork.plctlab.org/api/1.2/patches/1556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175120.1916164-1-jason@redhat.com/","msgid":"<20220929175120.1916164-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T17:51:20","name":"[pushed] c++: check DECL_INITIAL for constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929175120.1916164-1-jason@redhat.com/mbox/"},{"id":1557,"url":"https://patchwork.plctlab.org/api/1.2/patches/1557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929180710.2235253-1-torbjorn.svensson@foss.st.com/","msgid":"<20220929180710.2235253-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-29T18:07:11","name":"testsuite: Windows reports errors with CreateProcess","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929180710.2235253-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1558,"url":"https://patchwork.plctlab.org/api/1.2/patches/1558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929191120.1938729-1-jason@redhat.com/","msgid":"<20220929191120.1938729-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-29T19:11:20","name":"[pushed] c++: fix triviality of class with unsatisfied op=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929191120.1938729-1-jason@redhat.com/mbox/"},{"id":1559,"url":"https://patchwork.plctlab.org/api/1.2/patches/1559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com/","msgid":"<81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-09-29T22:10:28","name":"diagnostics: Fix virtual location for -Wuninitialized [PR69543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81f46d99de6ed37b7a65914d743d996a3a39ea9f.1664489390.git.lhyatt@gmail.com/mbox/"},{"id":1560,"url":"https://patchwork.plctlab.org/api/1.2/patches/1560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85abdd6-5261-49b2-2fbc-6a26644625c1@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:34:52","name":"PR tree-optimization/102892 - Remove undefined behaviour from testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85abdd6-5261-49b2-2fbc-6a26644625c1@redhat.com/mbox/"},{"id":1561,"url":"https://patchwork.plctlab.org/api/1.2/patches/1561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16763009-abeb-5785-80fc-40cd755fef0c@redhat.com/","msgid":"<16763009-abeb-5785-80fc-40cd755fef0c@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:35:09","name":"Audit op1_range and op2_range for undefined LHS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16763009-abeb-5785-80fc-40cd755fef0c@redhat.com/mbox/"},{"id":1562,"url":"https://patchwork.plctlab.org/api/1.2/patches/1562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8178ef8-4fc8-f7c3-80fa-1af995c23d3c@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:35:32","name":"Move class value_relation the header file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8178ef8-4fc8-f7c3-80fa-1af995c23d3c@redhat.com/mbox/"},{"id":1563,"url":"https://patchwork.plctlab.org/api/1.2/patches/1563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55e35d6-332a-87ec-145f-493010748ff8@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:36:01","name":"Track value_relations in GORI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55e35d6-332a-87ec-145f-493010748ff8@redhat.com/mbox/"},{"id":1564,"url":"https://patchwork.plctlab.org/api/1.2/patches/1564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8fde85d-7758-a00e-0cd5-da3283d70189@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-09-29T22:36:53","name":"Refine ranges using relations in GORI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8fde85d-7758-a00e-0cd5-da3283d70189@redhat.com/mbox/"},{"id":1565,"url":"https://patchwork.plctlab.org/api/1.2/patches/1565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b234c9a-5020-c97c-c379-877c4c018293@redhat.com/","msgid":"<9b234c9a-5020-c97c-c379-877c4c018293@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:38:10","name":"Process unsigned overflow relations for plus and minus in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b234c9a-5020-c97c-c379-877c4c018293@redhat.com/mbox/"},{"id":1566,"url":"https://patchwork.plctlab.org/api/1.2/patches/1566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929224945.90798-1-polacek@redhat.com/","msgid":"<20220929224945.90798-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-09-29T22:49:45","name":"c-family: ICE with [[gnu::nocf_check]] [PR106937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220929224945.90798-1-polacek@redhat.com/mbox/"},{"id":1567,"url":"https://patchwork.plctlab.org/api/1.2/patches/1567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209292259440.527883@digraph.polyomino.org.uk/","msgid":"","list_archive_url":null,"date":"2022-09-29T23:00:30","name":"[committed] c: C2x noreturn attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.22.394.2209292259440.527883@digraph.polyomino.org.uk/mbox/"},{"id":1568,"url":"https://patchwork.plctlab.org/api/1.2/patches/1568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930012822.1994426-1-jason@redhat.com/","msgid":"<20220930012822.1994426-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-30T01:28:22","name":"[pushed] c++: reduce redundant TARGET_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930012822.1994426-1-jason@redhat.com/mbox/"},{"id":1569,"url":"https://patchwork.plctlab.org/api/1.2/patches/1569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930020523.21483-1-kito.cheng@sifive.com/","msgid":"<20220930020523.21483-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-09-30T02:05:23","name":"RISC-V: Support --target-help for -mcpu/-mtune","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930020523.21483-1-kito.cheng@sifive.com/mbox/"},{"id":1570,"url":"https://patchwork.plctlab.org/api/1.2/patches/1570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542346DCE5393A1BEDAB13E91569@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-09-30T06:28:01","name":"Emit discriminators for inlined call sites.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542346DCE5393A1BEDAB13E91569@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":1571,"url":"https://patchwork.plctlab.org/api/1.2/patches/1571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930065816.170458-1-juzhe.zhong@rivai.ai/","msgid":"<20220930065816.170458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-30T06:58:16","name":"RISC-V: Introduce RVV header to enable builtin types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930065816.170458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1572,"url":"https://patchwork.plctlab.org/api/1.2/patches/1572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzaYvq2n3/u8oVLd@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T07:20:30","name":"fixincludes: Deal also with the _Float128x cases [PR107059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzaYvq2n3/u8oVLd@tucnak/mbox/"},{"id":1574,"url":"https://patchwork.plctlab.org/api/1.2/patches/1574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930080033.70151-1-juzhe.zhong@rivai.ai/","msgid":"<20220930080033.70151-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-09-30T08:00:33","name":"Add first-order recurrence autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930080033.70151-1-juzhe.zhong@rivai.ai/mbox/"},{"id":1575,"url":"https://patchwork.plctlab.org/api/1.2/patches/1575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com/","msgid":"<1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com>","list_archive_url":null,"date":"2022-09-30T08:00:49","name":"install.texi: gcn - update llvm reqirements, gcn/nvptx - newlib use version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1055cfc9-3358-4d11-ed90-f33ec8b8423e@codesourcery.com/mbox/"},{"id":1576,"url":"https://patchwork.plctlab.org/api/1.2/patches/1576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930081806.2252641-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930081806.2252641-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T08:18:06","name":"testsuite: Colon is reserved on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930081806.2252641-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1587,"url":"https://patchwork.plctlab.org/api/1.2/patches/1587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com/","msgid":"<6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com>","list_archive_url":null,"date":"2022-09-30T10:41:19","name":"Fortran: Update use_device_ptr for OpenMP 5.1 [PR105318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6005cea4-c89e-0c31-1c61-d322dcf072e7@codesourcery.com/mbox/"},{"id":1588,"url":"https://patchwork.plctlab.org/api/1.2/patches/1588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930105003.7C8A813776@imap2.suse-dmz.suse.de/","msgid":"<20220930105003.7C8A813776@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-09-30T10:50:03","name":"tree-optimization/107095 - fix typo in .MASK_STORE DSE handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930105003.7C8A813776@imap2.suse-dmz.suse.de/mbox/"},{"id":1589,"url":"https://patchwork.plctlab.org/api/1.2/patches/1589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930111938.354664-1-christophe.lyon@arm.com/","msgid":"<20220930111938.354664-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-09-30T11:19:38","name":"[v2] testsuite: [arm] Relax expected register names in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930111938.354664-1-christophe.lyon@arm.com/mbox/"},{"id":1595,"url":"https://patchwork.plctlab.org/api/1.2/patches/1595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930134620.106589-1-jwakely@redhat.com/","msgid":"<20220930134620.106589-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T13:46:20","name":"[committed] libstdc++: Add missing include to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930134620.106589-1-jwakely@redhat.com/mbox/"},{"id":1597,"url":"https://patchwork.plctlab.org/api/1.2/patches/1597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930153845.2268381-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930153845.2268381-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T15:38:46","name":"testsuite: Windows paths use \\ and not /","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930153845.2268381-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1598,"url":"https://patchwork.plctlab.org/api/1.2/patches/1598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930162212.2270178-1-torbjorn.svensson@foss.st.com/","msgid":"<20220930162212.2270178-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-09-30T16:22:13","name":"[v3] testsuite: Only run test on target if VMA == LMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930162212.2270178-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":1599,"url":"https://patchwork.plctlab.org/api/1.2/patches/1599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzcbZogl8uzaBpc6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T16:37:58","name":"openmp: Add begin declare target support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/YzcbZogl8uzaBpc6@tucnak/mbox/"},{"id":1600,"url":"https://patchwork.plctlab.org/api/1.2/patches/1600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-2-arsen@aarsen.me/","msgid":"<20220930164556.1198044-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:47","name":"[01/10] libstdc++: Make _GLIBCXX_HOSTED respect -ffreestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-2-arsen@aarsen.me/mbox/"},{"id":1602,"url":"https://patchwork.plctlab.org/api/1.2/patches/1602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-3-arsen@aarsen.me/","msgid":"<20220930164556.1198044-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:48","name":"[02/10] libstdc++: Filter out unconditional default include","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-3-arsen@aarsen.me/mbox/"},{"id":1603,"url":"https://patchwork.plctlab.org/api/1.2/patches/1603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-4-arsen@aarsen.me/","msgid":"<20220930164556.1198044-4-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:49","name":"[03/10] libstdc++: Adjust precompiled headers for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-4-arsen@aarsen.me/mbox/"},{"id":1606,"url":"https://patchwork.plctlab.org/api/1.2/patches/1606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-5-arsen@aarsen.me/","msgid":"<20220930164556.1198044-5-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:50","name":"[04/10] libstdc++: Mark headers that must be hosted as such [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-5-arsen@aarsen.me/mbox/"},{"id":1601,"url":"https://patchwork.plctlab.org/api/1.2/patches/1601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-6-arsen@aarsen.me/","msgid":"<20220930164556.1198044-6-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:51","name":"[05/10] c-family: Implement new `int main'\'' semantics in freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-6-arsen@aarsen.me/mbox/"},{"id":1604,"url":"https://patchwork.plctlab.org/api/1.2/patches/1604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-7-arsen@aarsen.me/","msgid":"<20220930164556.1198044-7-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:52","name":"[06/10] libstdc++: Rework how freestanding install works [PR106953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-7-arsen@aarsen.me/mbox/"},{"id":1609,"url":"https://patchwork.plctlab.org/api/1.2/patches/1609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-8-arsen@aarsen.me/","msgid":"<20220930164556.1198044-8-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:53","name":"[07/10] libstdc++: Make some tests work on freestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-8-arsen@aarsen.me/mbox/"},{"id":1605,"url":"https://patchwork.plctlab.org/api/1.2/patches/1605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-9-arsen@aarsen.me/","msgid":"<20220930164556.1198044-9-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:54","name":"[08/10] libstdc++: Add effective-target '\''hosted'\'' for testsuite [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-9-arsen@aarsen.me/mbox/"},{"id":1607,"url":"https://patchwork.plctlab.org/api/1.2/patches/1607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-10-arsen@aarsen.me/","msgid":"<20220930164556.1198044-10-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:55","name":"[09/10] libstdc++: Re-enable std::hash in freestanding [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-10-arsen@aarsen.me/mbox/"},{"id":1608,"url":"https://patchwork.plctlab.org/api/1.2/patches/1608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-11-arsen@aarsen.me/","msgid":"<20220930164556.1198044-11-arsen@aarsen.me>","list_archive_url":null,"date":"2022-09-30T16:45:56","name":"[10/10] libstdc++: Disable hosted-only tests [PR103626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930164556.1198044-11-arsen@aarsen.me/mbox/"},{"id":1610,"url":"https://patchwork.plctlab.org/api/1.2/patches/1610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzcjxp+y+yXlUO8y@tucnak/","msgid":"","list_archive_url":null,"date":"2022-09-30T17:13:42","name":"arm, aarch64, csky: Fix C++ ICEs with _Float16 and __fp16 [PR107080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Yzcjxp+y+yXlUO8y@tucnak/mbox/"},{"id":1611,"url":"https://patchwork.plctlab.org/api/1.2/patches/1611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930172019.1459433-1-ppalka@redhat.com/","msgid":"<20220930172019.1459433-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-09-30T17:20:19","name":"c++: make some cp_trait_kind switch statements exhaustive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930172019.1459433-1-ppalka@redhat.com/mbox/"},{"id":1613,"url":"https://patchwork.plctlab.org/api/1.2/patches/1613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205708.170313-1-jwakely@redhat.com/","msgid":"<20220930205708.170313-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:08","name":"[committed] libstdc++: Remove non-standard public members in std::bitset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205708.170313-1-jwakely@redhat.com/mbox/"},{"id":1612,"url":"https://patchwork.plctlab.org/api/1.2/patches/1612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205713.170346-1-jwakely@redhat.com/","msgid":"<20220930205713.170346-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:13","name":"[committed] libstdc++: Optimize operator>> for std::bitset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205713.170346-1-jwakely@redhat.com/mbox/"},{"id":1614,"url":"https://patchwork.plctlab.org/api/1.2/patches/1614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205717.170362-1-jwakely@redhat.com/","msgid":"<20220930205717.170362-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-09-30T20:57:17","name":"[committed] libstdc++: Remove dependency from std::bitset::to_ulong() test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930205717.170362-1-jwakely@redhat.com/mbox/"},{"id":1615,"url":"https://patchwork.plctlab.org/api/1.2/patches/1615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930220623.2161990-1-jason@redhat.com/","msgid":"<20220930220623.2161990-1-jason@redhat.com>","list_archive_url":null,"date":"2022-09-30T22:06:23","name":"[RFC] c++: fix broken conversion in coroutines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20220930220623.2161990-1-jason@redhat.com/mbox/"},{"id":1616,"url":"https://patchwork.plctlab.org/api/1.2/patches/1616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com/","msgid":"<44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com>","list_archive_url":null,"date":"2022-09-30T23:05:47","name":"[committed] Minor cleanup/prep in DOM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44815a60-2cd4-9408-64a9-d718163bca71@ventanamicro.com/mbox/"},{"id":1617,"url":"https://patchwork.plctlab.org/api/1.2/patches/1617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com/","msgid":"<6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com>","list_archive_url":null,"date":"2022-09-30T23:32:34","name":"[committed] More gimple const/copy propagation opportunities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6baf42b9-0534-dc81-7a54-11317c732a68@ventanamicro.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-09/mbox/"},{"id":10,"url":"https://patchwork.plctlab.org/api/1.2/bundles/10/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-11","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":13283,"url":"https://patchwork.plctlab.org/api/1.2/patches/13283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c12f3e33-3ccc-4c78-20b1-6e64049d74dc@ubuntu.com/","msgid":"","list_archive_url":null,"date":"2022-10-31T15:33:42","name":"[ada] fix libgnat build on x86_64-linux-gnux32 with glibc <= 2.31","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c12f3e33-3ccc-4c78-20b1-6e64049d74dc@ubuntu.com/mbox/"},{"id":13294,"url":"https://patchwork.plctlab.org/api/1.2/patches/13294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-2-gnu@danielengel.com/","msgid":"<20221031154529.3627576-2-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:56","name":"[v7,01/34] Add and restructure function declaration macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-2-gnu@danielengel.com/mbox/"},{"id":13298,"url":"https://patchwork.plctlab.org/api/1.2/patches/13298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-3-gnu@danielengel.com/","msgid":"<20221031154529.3627576-3-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:57","name":"[v7,02/34] Rename THUMB_FUNC_START to THUMB_FUNC_ENTRY","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-3-gnu@danielengel.com/mbox/"},{"id":13302,"url":"https://patchwork.plctlab.org/api/1.2/patches/13302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-4-gnu@danielengel.com/","msgid":"<20221031154529.3627576-4-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:58","name":"[v7,03/34] Fix syntax warnings on conditional instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-4-gnu@danielengel.com/mbox/"},{"id":13295,"url":"https://patchwork.plctlab.org/api/1.2/patches/13295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-5-gnu@danielengel.com/","msgid":"<20221031154529.3627576-5-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:44:59","name":"[v7,04/34] Reorganize LIB1ASMFUNCS object wrapper macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-5-gnu@danielengel.com/mbox/"},{"id":13299,"url":"https://patchwork.plctlab.org/api/1.2/patches/13299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-6-gnu@danielengel.com/","msgid":"<20221031154529.3627576-6-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:00","name":"[v7,05/34] Add the __HAVE_FEATURE_IT and IT() macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-6-gnu@danielengel.com/mbox/"},{"id":13297,"url":"https://patchwork.plctlab.org/api/1.2/patches/13297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-7-gnu@danielengel.com/","msgid":"<20221031154529.3627576-7-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:01","name":"[v7,06/34] Refactor '\''clz'\'' functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-7-gnu@danielengel.com/mbox/"},{"id":13296,"url":"https://patchwork.plctlab.org/api/1.2/patches/13296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-8-gnu@danielengel.com/","msgid":"<20221031154529.3627576-8-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:02","name":"[v7,07/34] Refactor '\''ctz'\'' functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-8-gnu@danielengel.com/mbox/"},{"id":13301,"url":"https://patchwork.plctlab.org/api/1.2/patches/13301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-9-gnu@danielengel.com/","msgid":"<20221031154529.3627576-9-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:03","name":"[v7,08/34] Refactor 64-bit shift functions into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-9-gnu@danielengel.com/mbox/"},{"id":13303,"url":"https://patchwork.plctlab.org/api/1.2/patches/13303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-10-gnu@danielengel.com/","msgid":"<20221031154529.3627576-10-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:04","name":"[v7,09/34] Import '\''clz'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-10-gnu@danielengel.com/mbox/"},{"id":13305,"url":"https://patchwork.plctlab.org/api/1.2/patches/13305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-11-gnu@danielengel.com/","msgid":"<20221031154529.3627576-11-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:05","name":"[v7,10/34] Import '\''ctz'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-11-gnu@danielengel.com/mbox/"},{"id":13307,"url":"https://patchwork.plctlab.org/api/1.2/patches/13307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-12-gnu@danielengel.com/","msgid":"<20221031154529.3627576-12-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:06","name":"[v7,11/34] Import 64-bit shift functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-12-gnu@danielengel.com/mbox/"},{"id":13310,"url":"https://patchwork.plctlab.org/api/1.2/patches/13310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-13-gnu@danielengel.com/","msgid":"<20221031154529.3627576-13-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:07","name":"[v7,12/34] Import '\''clrsb'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-13-gnu@danielengel.com/mbox/"},{"id":13308,"url":"https://patchwork.plctlab.org/api/1.2/patches/13308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-14-gnu@danielengel.com/","msgid":"<20221031154529.3627576-14-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:08","name":"[v7,13/34] Import '\''ffs'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-14-gnu@danielengel.com/mbox/"},{"id":13313,"url":"https://patchwork.plctlab.org/api/1.2/patches/13313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-15-gnu@danielengel.com/","msgid":"<20221031154529.3627576-15-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:09","name":"[v7,14/34] Import '\''parity'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-15-gnu@danielengel.com/mbox/"},{"id":13300,"url":"https://patchwork.plctlab.org/api/1.2/patches/13300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-16-gnu@danielengel.com/","msgid":"<20221031154529.3627576-16-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:10","name":"[v7,15/34] Import '\''popcnt'\'' functions from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-16-gnu@danielengel.com/mbox/"},{"id":13311,"url":"https://patchwork.plctlab.org/api/1.2/patches/13311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-17-gnu@danielengel.com/","msgid":"<20221031154529.3627576-17-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:11","name":"[v7,16/34] Refactor Thumb-1 64-bit comparison into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-17-gnu@danielengel.com/mbox/"},{"id":13304,"url":"https://patchwork.plctlab.org/api/1.2/patches/13304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-18-gnu@danielengel.com/","msgid":"<20221031154529.3627576-18-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:12","name":"[v7,17/34] Import 64-bit comparison from CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-18-gnu@danielengel.com/mbox/"},{"id":13309,"url":"https://patchwork.plctlab.org/api/1.2/patches/13309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-19-gnu@danielengel.com/","msgid":"<20221031154529.3627576-19-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:13","name":"[v7,18/34] Merge Thumb-2 optimizations for 64-bit comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-19-gnu@danielengel.com/mbox/"},{"id":13314,"url":"https://patchwork.plctlab.org/api/1.2/patches/13314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-20-gnu@danielengel.com/","msgid":"<20221031154529.3627576-20-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:14","name":"[v7,19/34] Import 32-bit division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-20-gnu@danielengel.com/mbox/"},{"id":13319,"url":"https://patchwork.plctlab.org/api/1.2/patches/13319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-21-gnu@danielengel.com/","msgid":"<20221031154529.3627576-21-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:15","name":"[v7,20/34] Refactor Thumb-1 64-bit division into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-21-gnu@danielengel.com/mbox/"},{"id":13312,"url":"https://patchwork.plctlab.org/api/1.2/patches/13312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-22-gnu@danielengel.com/","msgid":"<20221031154529.3627576-22-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:16","name":"[v7,21/34] Import 64-bit division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-22-gnu@danielengel.com/mbox/"},{"id":13315,"url":"https://patchwork.plctlab.org/api/1.2/patches/13315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-23-gnu@danielengel.com/","msgid":"<20221031154529.3627576-23-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:17","name":"[v7,22/34] Import integer multiplication from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-23-gnu@danielengel.com/mbox/"},{"id":13321,"url":"https://patchwork.plctlab.org/api/1.2/patches/13321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-24-gnu@danielengel.com/","msgid":"<20221031154529.3627576-24-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:18","name":"[v7,23/34] Refactor Thumb-1 float comparison into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-24-gnu@danielengel.com/mbox/"},{"id":13318,"url":"https://patchwork.plctlab.org/api/1.2/patches/13318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-25-gnu@danielengel.com/","msgid":"<20221031154529.3627576-25-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:19","name":"[v7,24/34] Import float comparison from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-25-gnu@danielengel.com/mbox/"},{"id":13316,"url":"https://patchwork.plctlab.org/api/1.2/patches/13316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-26-gnu@danielengel.com/","msgid":"<20221031154529.3627576-26-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:20","name":"[v7,25/34] Refactor Thumb-1 float subtraction into a new file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-26-gnu@danielengel.com/mbox/"},{"id":13323,"url":"https://patchwork.plctlab.org/api/1.2/patches/13323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-27-gnu@danielengel.com/","msgid":"<20221031154529.3627576-27-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:21","name":"[v7,26/34] Import float addition and subtraction from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-27-gnu@danielengel.com/mbox/"},{"id":13328,"url":"https://patchwork.plctlab.org/api/1.2/patches/13328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-28-gnu@danielengel.com/","msgid":"<20221031154529.3627576-28-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:22","name":"[v7,27/34] Import float multiplication from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-28-gnu@danielengel.com/mbox/"},{"id":13329,"url":"https://patchwork.plctlab.org/api/1.2/patches/13329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-29-gnu@danielengel.com/","msgid":"<20221031154529.3627576-29-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:23","name":"[v7,28/34] Import float division from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-29-gnu@danielengel.com/mbox/"},{"id":13332,"url":"https://patchwork.plctlab.org/api/1.2/patches/13332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-30-gnu@danielengel.com/","msgid":"<20221031154529.3627576-30-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:24","name":"[v7,29/34] Import integer-to-float conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-30-gnu@danielengel.com/mbox/"},{"id":13334,"url":"https://patchwork.plctlab.org/api/1.2/patches/13334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-31-gnu@danielengel.com/","msgid":"<20221031154529.3627576-31-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:25","name":"[v7,30/34] Import float-to-integer conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-31-gnu@danielengel.com/mbox/"},{"id":13330,"url":"https://patchwork.plctlab.org/api/1.2/patches/13330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-32-gnu@danielengel.com/","msgid":"<20221031154529.3627576-32-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:26","name":"[v7,31/34] Import float<->double conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-32-gnu@danielengel.com/mbox/"},{"id":13335,"url":"https://patchwork.plctlab.org/api/1.2/patches/13335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-33-gnu@danielengel.com/","msgid":"<20221031154529.3627576-33-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:27","name":"[v7,32/34] Import float<->__fp16 conversion from the CM0 library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-33-gnu@danielengel.com/mbox/"},{"id":13327,"url":"https://patchwork.plctlab.org/api/1.2/patches/13327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-34-gnu@danielengel.com/","msgid":"<20221031154529.3627576-34-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:28","name":"[v7,33/34] Drop single-precision Thumb-1 soft-float functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-34-gnu@danielengel.com/mbox/"},{"id":13336,"url":"https://patchwork.plctlab.org/api/1.2/patches/13336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-35-gnu@danielengel.com/","msgid":"<20221031154529.3627576-35-gnu@danielengel.com>","list_archive_url":null,"date":"2022-10-31T15:45:29","name":"[v7,34/34] Add -mpure-code support to the CM0 functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031154529.3627576-35-gnu@danielengel.com/mbox/"},{"id":13412,"url":"https://patchwork.plctlab.org/api/1.2/patches/13412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031190742.2116564-1-dmalcolm@redhat.com/","msgid":"<20221031190742.2116564-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-10-31T19:07:42","name":"c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031190742.2116564-1-dmalcolm@redhat.com/mbox/"},{"id":13431,"url":"https://patchwork.plctlab.org/api/1.2/patches/13431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031203310.852924-1-ppalka@redhat.com/","msgid":"<20221031203310.852924-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-10-31T20:33:10","name":"libstdc++: Implement ranges::as_rvalue_view from P2446R2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031203310.852924-1-ppalka@redhat.com/mbox/"},{"id":13440,"url":"https://patchwork.plctlab.org/api/1.2/patches/13440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031210618.695953-1-hjl.tools@gmail.com/","msgid":"<20221031210618.695953-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-10-31T21:06:18","name":"x86: Track converted/skipped registers in STV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221031210618.695953-1-hjl.tools@gmail.com/mbox/"},{"id":13491,"url":"https://patchwork.plctlab.org/api/1.2/patches/13491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487305F99BDE4F531490D69EC369@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T01:20:40","name":"[wwwdocs,GCC13] Mention Intel __bf16 support in AVX512BF16 intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487305F99BDE4F531490D69EC369@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":13492,"url":"https://patchwork.plctlab.org/api/1.2/patches/13492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101012344.1456215-1-jason@redhat.com/","msgid":"<20221101012344.1456215-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-01T01:23:44","name":"[pushed] c++: set TREE_NOTHROW after genericize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101012344.1456215-1-jason@redhat.com/mbox/"},{"id":13530,"url":"https://patchwork.plctlab.org/api/1.2/patches/13530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101061915.1677615-1-chenglulu@loongson.cn/","msgid":"<20221101061915.1677615-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-01T06:19:15","name":"[v2] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101061915.1677615-1-chenglulu@loongson.cn/mbox/"},{"id":13583,"url":"https://patchwork.plctlab.org/api/1.2/patches/13583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2DoqF9dtrknNICD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-01T09:36:40","name":"libstdc++: std::from_chars std::{,b}float16_t support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2DoqF9dtrknNICD@tucnak/mbox/"},{"id":13594,"url":"https://patchwork.plctlab.org/api/1.2/patches/13594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094525.CD8F533E65@hamza.pair.com/","msgid":"<20221101094525.CD8F533E65@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:45:22","name":"[committed] wwwdocs: projects/tree-ssa: Adjust mark up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094525.CD8F533E65@hamza.pair.com/mbox/"},{"id":13595,"url":"https://patchwork.plctlab.org/api/1.2/patches/13595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094640.E321433E61@hamza.pair.com/","msgid":"<20221101094640.E321433E61@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:46:38","name":"[committed] wwwdocs: readings: Remove ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094640.E321433E61@hamza.pair.com/mbox/"},{"id":13597,"url":"https://patchwork.plctlab.org/api/1.2/patches/13597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094858.CC1B233E61@hamza.pair.com/","msgid":"<20221101094858.CC1B233E61@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T09:48:56","name":"[committed] wwwdocs: codingconventions: Move two links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101094858.CC1B233E61@hamza.pair.com/mbox/"},{"id":13617,"url":"https://patchwork.plctlab.org/api/1.2/patches/13617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b94b0feb-c5f9-430b-1911-182faa10fe79@acm.org/","msgid":"","list_archive_url":null,"date":"2022-11-01T10:23:18","name":"c++: Reorganize per-scope lambda discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b94b0feb-c5f9-430b-1911-182faa10fe79@acm.org/mbox/"},{"id":13630,"url":"https://patchwork.plctlab.org/api/1.2/patches/13630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101111831.390F033E63@hamza.pair.com/","msgid":"<20221101111831.390F033E63@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T11:18:24","name":"[committed] wwwdocs: *: Remove extraneous whitespaces around headings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101111831.390F033E63@hamza.pair.com/mbox/"},{"id":13638,"url":"https://patchwork.plctlab.org/api/1.2/patches/13638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120102.DDB8833E4C@hamza.pair.com/","msgid":"<20221101120102.DDB8833E4C@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:01:00","name":"[committed] wwwdocs: codingconventions: Properly link to flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120102.DDB8833E4C@hamza.pair.com/mbox/"},{"id":13639,"url":"https://patchwork.plctlab.org/api/1.2/patches/13639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120444.412376-1-chenglulu@loongson.cn/","msgid":"<20221101120444.412376-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-01T12:04:45","name":"[v3] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120444.412376-1-chenglulu@loongson.cn/mbox/"},{"id":13640,"url":"https://patchwork.plctlab.org/api/1.2/patches/13640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120535.7CC5733E13@hamza.pair.com/","msgid":"<20221101120535.7CC5733E13@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:05:33","name":"[committed] wwwdocs: gcc-4.4: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120535.7CC5733E13@hamza.pair.com/mbox/"},{"id":13643,"url":"https://patchwork.plctlab.org/api/1.2/patches/13643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120952.60F9933E4A@hamza.pair.com/","msgid":"<20221101120952.60F9933E4A@hamza.pair.com>","list_archive_url":null,"date":"2022-11-01T12:09:50","name":"[committed] wwwdocs: readings: Switch sourceforge.net sub-sites to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101120952.60F9933E4A@hamza.pair.com/mbox/"},{"id":13644,"url":"https://patchwork.plctlab.org/api/1.2/patches/13644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2EOfVFPvNucL8ht@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-01T12:18:05","name":"libstdc++: Shortest denormal hex std::to_chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2EOfVFPvNucL8ht@tucnak/mbox/"},{"id":13655,"url":"https://patchwork.plctlab.org/api/1.2/patches/13655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982542953A831514A369D9883369@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T13:08:18","name":"[AArch64] Cleanup move immediate code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982542953A831514A369D9883369@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":13656,"url":"https://patchwork.plctlab.org/api/1.2/patches/13656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com/","msgid":"<92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:19:11","name":"[COMMITTED] Irange::intersect with nonzero bits can indicate change incorrectly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fa3f27-cfe1-c1f5-6796-365d548159bb@redhat.com/mbox/"},{"id":13657,"url":"https://patchwork.plctlab.org/api/1.2/patches/13657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com/","msgid":"<052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:19:27","name":"[COMMITTED] Allow ranger queries on exit block.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/052c0ba5-79fc-ad55-bfa9-38b5b3394e11@redhat.com/mbox/"},{"id":13658,"url":"https://patchwork.plctlab.org/api/1.2/patches/13658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com/","msgid":"<3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:20:00","name":"[COMMITTED] Remove builtin_unreachable in ranger VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e171105-8cae-e91d-ecc5-87c534b18cc1@redhat.com/mbox/"},{"id":13681,"url":"https://patchwork.plctlab.org/api/1.2/patches/13681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/100da11f-424c-71e0-1275-f161b94ffa46@redhat.com/","msgid":"<100da11f-424c-71e0-1275-f161b94ffa46@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:58:00","name":"[COMMITTED] Make ranger the vrp1 default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/100da11f-424c-71e0-1275-f161b94ffa46@redhat.com/mbox/"},{"id":13682,"url":"https://patchwork.plctlab.org/api/1.2/patches/13682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101135941.444266-1-jwakely@redhat.com/","msgid":"<20221101135941.444266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-01T13:59:41","name":"doc: Remove outdated reference to \"core\" and front-end downloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101135941.444266-1-jwakely@redhat.com/mbox/"},{"id":13759,"url":"https://patchwork.plctlab.org/api/1.2/patches/13759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-2-amonakov@ispras.ru/","msgid":"<20221101162637.14238-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-01T16:26:36","name":"[1/2] i386: correct x87&SSE division modeling in znver.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-2-amonakov@ispras.ru/mbox/"},{"id":13760,"url":"https://patchwork.plctlab.org/api/1.2/patches/13760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-3-amonakov@ispras.ru/","msgid":"<20221101162637.14238-3-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-01T16:26:37","name":"[2/2] i386: correct x87&SSE multiplication modeling in znver.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101162637.14238-3-amonakov@ispras.ru/mbox/"},{"id":13802,"url":"https://patchwork.plctlab.org/api/1.2/patches/13802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101170156.52672-1-polacek@redhat.com/","msgid":"<20221101170156.52672-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-01T17:01:56","name":"c++: Disable -Wignored-qualifiers for template args [PR107492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101170156.52672-1-polacek@redhat.com/mbox/"},{"id":13813,"url":"https://patchwork.plctlab.org/api/1.2/patches/13813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T17:25:13","name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"},{"id":13829,"url":"https://patchwork.plctlab.org/api/1.2/patches/13829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc4dfa6e-997a-cdd1-4370-1d0ebc0363fd@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T18:04:38","name":"[COMMITTED] PR tree-optimization/107497 - Make sure ssa-name is valid.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc4dfa6e-997a-cdd1-4370-1d0ebc0363fd@redhat.com/mbox/"},{"id":13838,"url":"https://patchwork.plctlab.org/api/1.2/patches/13838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101182537.50407-1-aldyh@redhat.com/","msgid":"<20221101182537.50407-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-01T18:25:37","name":"[COMMITTED,PR,tree-optimization/107490] Handle NANs in op[12]_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101182537.50407-1-aldyh@redhat.com/mbox/"},{"id":13899,"url":"https://patchwork.plctlab.org/api/1.2/patches/13899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101213029.940043-1-ppalka@redhat.com/","msgid":"<20221101213029.940043-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-01T21:30:29","name":"libstdc++: Fix ERANGE behavior for fallback FP std::from_chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101213029.940043-1-ppalka@redhat.com/mbox/"},{"id":13900,"url":"https://patchwork.plctlab.org/api/1.2/patches/13900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3cc7fc1-9fdb-4693-07e6-e6f356cf6b2c@acm.org/","msgid":"","list_archive_url":null,"date":"2022-11-01T21:46:45","name":"c++: per-scope, per-signature lambda discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3cc7fc1-9fdb-4693-07e6-e6f356cf6b2c@acm.org/mbox/"},{"id":13922,"url":"https://patchwork.plctlab.org/api/1.2/patches/13922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101220652.588178-1-polacek@redhat.com/","msgid":"<20221101220652.588178-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-01T22:06:52","name":"c++: Quash -Wdangling-reference for member operator* [PR107488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101220652.588178-1-polacek@redhat.com/mbox/"},{"id":13998,"url":"https://patchwork.plctlab.org/api/1.2/patches/13998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HYqx4zLCNCT0Zy@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:40:43","name":"[1/3] Rework 128-bit complex multiply and divide, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HYqx4zLCNCT0Zy@toto.the-meissners.org/mbox/"},{"id":13999,"url":"https://patchwork.plctlab.org/api/1.2/patches/13999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZFlHH8HuvhGL4@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:42:30","name":"[2/3] Make __float128 use the _Float128 type, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZFlHH8HuvhGL4@toto.the-meissners.org/mbox/"},{"id":14000,"url":"https://patchwork.plctlab.org/api/1.2/patches/14000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZcYMCCcyEADyD@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-02T02:44:01","name":"[3/3] Update float 128-bit conversions, PR target/107299.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2HZcYMCCcyEADyD@toto.the-meissners.org/mbox/"},{"id":14013,"url":"https://patchwork.plctlab.org/api/1.2/patches/14013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102033728.99379-1-hongyu.wang@intel.com/","msgid":"<20221102033728.99379-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-02T03:37:28","name":"[V2] Enable small loop unrolling for O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102033728.99379-1-hongyu.wang@intel.com/mbox/"},{"id":14068,"url":"https://patchwork.plctlab.org/api/1.2/patches/14068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com/","msgid":"<94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-02T07:59:06","name":"vect: Fold LEN_{LOAD,STORE} if it'\''s for the whole vector [PR107412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94ac390b-a770-c868-051b-75319eb7f81d@linux.ibm.com/mbox/"},{"id":14070,"url":"https://patchwork.plctlab.org/api/1.2/patches/14070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com/","msgid":"<3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com>","list_archive_url":null,"date":"2022-11-02T08:01:06","name":"testsuite: Fix gen-vect-34.c with vect_masked_load [PR106806]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fac9b35-b170-1af7-f4d2-796f9be816bf@linux.ibm.com/mbox/"},{"id":14123,"url":"https://patchwork.plctlab.org/api/1.2/patches/14123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8nxiurb.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:13:44","name":"builtins: Guard builtins.cc against HUGE_VAL and NAN definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8nxiurb.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":14156,"url":"https://patchwork.plctlab.org/api/1.2/patches/14156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I3pr1Eyn120h1C@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:25:58","name":"libstdc++: Add _Float128 to_chars/from_chars support for x86, ia64 and ppc64le with glibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I3pr1Eyn120h1C@tucnak/mbox/"},{"id":14165,"url":"https://patchwork.plctlab.org/api/1.2/patches/14165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I62a8i1u1I7EaE@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-02T09:39:37","name":"libstdc++: _Bfloat16 for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2I62a8i1u1I7EaE@tucnak/mbox/"},{"id":14174,"url":"https://patchwork.plctlab.org/api/1.2/patches/14174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102104713.643862-1-richard.purdie@linuxfoundation.org/","msgid":"<20221102104713.643862-1-richard.purdie@linuxfoundation.org>","list_archive_url":null,"date":"2022-11-02T10:47:13","name":"[v2] libcpp: Avoid remapping filenames within directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102104713.643862-1-richard.purdie@linuxfoundation.org/mbox/"},{"id":14215,"url":"https://patchwork.plctlab.org/api/1.2/patches/14215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-2-jiawei@iscas.ac.cn/","msgid":"<20221102125235.2325572-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-02T12:52:34","name":"[RFC] RISC-V: Minimal supports for new extensions in profile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-2-jiawei@iscas.ac.cn/mbox/"},{"id":14216,"url":"https://patchwork.plctlab.org/api/1.2/patches/14216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-3-jiawei@iscas.ac.cn/","msgid":"<20221102125235.2325572-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-02T12:52:35","name":"[RFC] RISC-V: Add profile supports.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125235.2325572-3-jiawei@iscas.ac.cn/mbox/"},{"id":14218,"url":"https://patchwork.plctlab.org/api/1.2/patches/14218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125631.634887-1-jwakely@redhat.com/","msgid":"<20221102125631.634887-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T12:56:31","name":"[committed] libstdc++: Ignore -Wignored-qualifiers warning in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125631.634887-1-jwakely@redhat.com/mbox/"},{"id":14219,"url":"https://patchwork.plctlab.org/api/1.2/patches/14219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125638.634917-1-jwakely@redhat.com/","msgid":"<20221102125638.634917-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T12:56:38","name":"[committed] libstdc++: Remove unnecessary variant member in std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102125638.634917-1-jwakely@redhat.com/mbox/"},{"id":14221,"url":"https://patchwork.plctlab.org/api/1.2/patches/14221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102131004.3816486-1-christophe.lyon@arm.com/","msgid":"<20221102131004.3816486-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-02T13:10:04","name":"genmultilib: Add sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102131004.3816486-1-christophe.lyon@arm.com/mbox/"},{"id":14236,"url":"https://patchwork.plctlab.org/api/1.2/patches/14236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102134028.1032216-1-ppalka@redhat.com/","msgid":"<20221102134028.1032216-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-02T13:40:28","name":"libstdc++: Declare const global variables inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102134028.1032216-1-ppalka@redhat.com/mbox/"},{"id":14274,"url":"https://patchwork.plctlab.org/api/1.2/patches/14274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16498-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-02T14:45:39","name":"[1/2] middle-end: Support early break/return auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16498-tamar@arm.com/mbox/"},{"id":14273,"url":"https://patchwork.plctlab.org/api/1.2/patches/14273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2KCrKb019Z1/HgC@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-02T14:46:04","name":"[2/2] AArch64 Add implementation for vector cbranch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2KCrKb019Z1/HgC@arm.com/mbox/"},{"id":14277,"url":"https://patchwork.plctlab.org/api/1.2/patches/14277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102145904.2958916-1-christoph.muellner@vrull.eu/","msgid":"<20221102145904.2958916-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-02T14:59:04","name":"[wwwdocs] gcc-13: riscv: Document the Zawrs support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102145904.2958916-1-christoph.muellner@vrull.eu/mbox/"},{"id":14313,"url":"https://patchwork.plctlab.org/api/1.2/patches/14313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com/","msgid":"<9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com>","list_archive_url":null,"date":"2022-11-02T15:57:56","name":"Fortran/OpenMP: Fix DT struct-component with '\''alloc'\'' and array descr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d44e561-cad7-d881-95fe-a696cdcfa531@codesourcery.com/mbox/"},{"id":14318,"url":"https://patchwork.plctlab.org/api/1.2/patches/14318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102160308.3675197-1-torbjorn.svensson@foss.st.com/","msgid":"<20221102160308.3675197-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-02T16:03:09","name":"[v2] c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102160308.3675197-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":14455,"url":"https://patchwork.plctlab.org/api/1.2/patches/14455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102190819.862078-1-hjl.tools@gmail.com/","msgid":"<20221102190819.862078-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-11-02T19:08:19","name":"Extend optimization for integer bit test on __atomic_fetch_[or|and]_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102190819.862078-1-hjl.tools@gmail.com/mbox/"},{"id":14472,"url":"https://patchwork.plctlab.org/api/1.2/patches/14472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877d0dktqv.fsf@euler.schwinge.homeip.net/","msgid":"<877d0dktqv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:04:56","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-1.f90'\'' (was: [gomp4] add support for fortran allocate support with declare create)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877d0dktqv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14473,"url":"https://patchwork.plctlab.org/api/1.2/patches/14473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jvhktgx.fsf@euler.schwinge.homeip.net/","msgid":"<874jvhktgx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:10:54","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-1-runtime.f90'\'' (was: Add '\''libgomp.oacc-fortran/declare-allocatable-1.f90'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jvhktgx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14474,"url":"https://patchwork.plctlab.org/api/1.2/patches/14474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qqlkt98.fsf@euler.schwinge.homeip.net/","msgid":"<871qqlkt98.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:15:31","name":"Add '\''libgomp.oacc-fortran/declare-allocatable-array_descriptor-1-runtime.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qqlkt98.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14475,"url":"https://patchwork.plctlab.org/api/1.2/patches/14475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1stjeda.fsf@euler.schwinge.homeip.net/","msgid":"<87y1stjeda.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:22:25","name":"Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part I [PR106643]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1stjeda.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14476,"url":"https://patchwork.plctlab.org/api/1.2/patches/14476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102203332.672558-1-jwakely@redhat.com/","msgid":"<20221102203332.672558-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-02T20:33:32","name":"[committed] libstdc++: Remove more redundant union members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221102203332.672558-1-jwakely@redhat.com/mbox/"},{"id":14477,"url":"https://patchwork.plctlab.org/api/1.2/patches/14477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu3hjdt6.fsf@euler.schwinge.homeip.net/","msgid":"<87tu3hjdt6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-02T20:34:29","name":"Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part II [PR106643, PR96668] (was: Support OpenACC '\''declare create'\'' with Fortran allocatable arrays, part I [PR106643])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu3hjdt6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":14493,"url":"https://patchwork.plctlab.org/api/1.2/patches/14493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-2-git-send-email-apinski@marvell.com/","msgid":"<1667425595-2654-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-02T21:46:34","name":"[1/2] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-2-git-send-email-apinski@marvell.com/mbox/"},{"id":14494,"url":"https://patchwork.plctlab.org/api/1.2/patches/14494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-3-git-send-email-apinski@marvell.com/","msgid":"<1667425595-2654-3-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-02T21:46:35","name":"[2/2] Add assert for type on tree_nonzero_bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1667425595-2654-3-git-send-email-apinski@marvell.com/mbox/"},{"id":14612,"url":"https://patchwork.plctlab.org/api/1.2/patches/14612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a2f23bc1-b419-050-2d13-3d162065622@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T02:55:25","name":"[committed] c: C2x auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a2f23bc1-b419-050-2d13-3d162065622@codesourcery.com/mbox/"},{"id":14674,"url":"https://patchwork.plctlab.org/api/1.2/patches/14674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103062657.58427-1-haochen.jiang@intel.com/","msgid":"<20221103062657.58427-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-03T06:26:57","name":"Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103062657.58427-1-haochen.jiang@intel.com/mbox/"},{"id":14784,"url":"https://patchwork.plctlab.org/api/1.2/patches/14784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103093748.2671754-1-torbjorn.svensson@foss.st.com/","msgid":"<20221103093748.2671754-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-03T09:37:49","name":"[v2] c++: Use in-process client when networking is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103093748.2671754-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":14790,"url":"https://patchwork.plctlab.org/api/1.2/patches/14790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103095259.4095606-1-christophe.lyon@arm.com/","msgid":"<20221103095259.4095606-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-03T09:52:59","name":"[v2] genmultilib: Add sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103095259.4095606-1-christophe.lyon@arm.com/mbox/"},{"id":14826,"url":"https://patchwork.plctlab.org/api/1.2/patches/14826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103114152.708336-1-jwakely@redhat.com/","msgid":"<20221103114152.708336-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-03T11:41:52","name":"[committed] libstdc++: Add missing move in ranges::copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103114152.708336-1-jwakely@redhat.com/mbox/"},{"id":14843,"url":"https://patchwork.plctlab.org/api/1.2/patches/14843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103123340.1402161-1-ppalka@redhat.com/","msgid":"<20221103123340.1402161-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-03T12:33:40","name":"c++: constexpr error with defaulted virtual dtor [PR93413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103123340.1402161-1-ppalka@redhat.com/mbox/"},{"id":14873,"url":"https://patchwork.plctlab.org/api/1.2/patches/14873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aPtttQkEet6+FDeCkw4TJ+zSt-vT+Jy822vM=uh+PPfA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T13:23:03","name":"i386: Fix uninitialized register after peephole2 conversion [PR107404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aPtttQkEet6+FDeCkw4TJ+zSt-vT+Jy822vM=uh+PPfA@mail.gmail.com/mbox/"},{"id":14874,"url":"https://patchwork.plctlab.org/api/1.2/patches/14874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com/","msgid":"<23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com>","list_archive_url":null,"date":"2022-11-03T13:35:03","name":"OpenMP/Fortran: '\''target update'\'' with DT components (was: [Patch] OpenMP/Fortran: '\''target update'\'' with strides + DT components)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23585d74-e7dc-10ca-97ac-124a3a513151@codesourcery.com/mbox/"},{"id":14878,"url":"https://patchwork.plctlab.org/api/1.2/patches/14878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com/","msgid":"<785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com>","list_archive_url":null,"date":"2022-11-03T13:43:06","name":"ifcvt: Support bitfield lowering of multiple-exit loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/785436fa-0ef9-e424-030d-f7b2bdf9c935@arm.com/mbox/"},{"id":14919,"url":"https://patchwork.plctlab.org/api/1.2/patches/14919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103142440.2260186-1-dmalcolm@redhat.com/","msgid":"<20221103142440.2260186-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T14:24:40","name":"[committed] analyzer: fix ICE when pipe'\''s arg isn'\''t a pointer [PR107486]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103142440.2260186-1-dmalcolm@redhat.com/mbox/"},{"id":14953,"url":"https://patchwork.plctlab.org/api/1.2/patches/14953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103154530.1442773-1-ppalka@redhat.com/","msgid":"<20221103154530.1442773-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-03T15:45:30","name":"c++: requires-expr substitution and access checking [PR107179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103154530.1442773-1-ppalka@redhat.com/mbox/"},{"id":15019,"url":"https://patchwork.plctlab.org/api/1.2/patches/15019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com/","msgid":"<6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com>","list_archive_url":null,"date":"2022-11-03T16:49:31","name":"[COMMITTED] Update range query cache when a statement is updated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b89d319-89ce-ec7b-f346-6e05ceac493d@redhat.com/mbox/"},{"id":15039,"url":"https://patchwork.plctlab.org/api/1.2/patches/15039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f06aa3e6-99ac-bf5e-139b-c7686410db5b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-03T17:47:35","name":"amdgcn: Fix instruction generation for exp2 and log2 operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f06aa3e6-99ac-bf5e-139b-c7686410db5b@codesourcery.com/mbox/"},{"id":15054,"url":"https://patchwork.plctlab.org/api/1.2/patches/15054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-2-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:28","name":"[committed,1/8] analyzer: use std::unique_ptr for pending_diagnostic/note","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-2-dmalcolm@redhat.com/mbox/"},{"id":15049,"url":"https://patchwork.plctlab.org/api/1.2/patches/15049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-3-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:29","name":"[committed,2/8] analyzer: use std::unique_ptr for saved_diagnostic::m_stmt_finder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-3-dmalcolm@redhat.com/mbox/"},{"id":15051,"url":"https://patchwork.plctlab.org/api/1.2/patches/15051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-4-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:30","name":"[committed,3/8] analyzer: use std::unique_ptr for custom_edge_info pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-4-dmalcolm@redhat.com/mbox/"},{"id":15050,"url":"https://patchwork.plctlab.org/api/1.2/patches/15050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-5-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:31","name":"[committed,4/8] analyzer: use std::unique_ptr for feasibility_problems and exploded_path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-5-dmalcolm@redhat.com/mbox/"},{"id":15055,"url":"https://patchwork.plctlab.org/api/1.2/patches/15055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-6-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:32","name":"[committed,5/8] analyzer: use std::unique_ptr for checker_event","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-6-dmalcolm@redhat.com/mbox/"},{"id":15053,"url":"https://patchwork.plctlab.org/api/1.2/patches/15053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-7-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:33","name":"[committed,6/8] analyzer: use std::unique_ptr during bifurcation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-7-dmalcolm@redhat.com/mbox/"},{"id":15052,"url":"https://patchwork.plctlab.org/api/1.2/patches/15052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-8-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-8-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:34","name":"[committed,7/8] analyzer: use std::unique_ptr for known functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-8-dmalcolm@redhat.com/mbox/"},{"id":15056,"url":"https://patchwork.plctlab.org/api/1.2/patches/15056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-9-dmalcolm@redhat.com/","msgid":"<20221103175135.2269543-9-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-03T17:51:35","name":"[committed,8/8] analyzer: use std::unique_ptr for state machines from plugins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103175135.2269543-9-dmalcolm@redhat.com/mbox/"},{"id":15102,"url":"https://patchwork.plctlab.org/api/1.2/patches/15102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103185238.2104412-1-jason@redhat.com/","msgid":"<20221103185238.2104412-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T18:52:38","name":"[pushed] c++: change -fconcepts to mean C++20 concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103185238.2104412-1-jason@redhat.com/mbox/"},{"id":15126,"url":"https://patchwork.plctlab.org/api/1.2/patches/15126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103192646.2108551-1-jason@redhat.com/","msgid":"<20221103192646.2108551-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:26:46","name":"[pushed] c++: change -fconcepts to mean C++20 concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103192646.2108551-1-jason@redhat.com/mbox/"},{"id":15127,"url":"https://patchwork.plctlab.org/api/1.2/patches/15127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com/","msgid":"<8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:28:59","name":"[COMMITTED] Add testcases resolved with ranger as VRP1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fb928cd-2a2d-3de5-9f33-08918dc9bac5@redhat.com/mbox/"},{"id":15152,"url":"https://patchwork.plctlab.org/api/1.2/patches/15152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195750.2113734-1-jason@redhat.com/","msgid":"<20221103195750.2113734-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:57:50","name":"[RFA] libstdc++: add experimental Contracts support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195750.2113734-1-jason@redhat.com/mbox/"},{"id":15153,"url":"https://patchwork.plctlab.org/api/1.2/patches/15153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195902.2114479-1-jason@redhat.com/","msgid":"<20221103195902.2114479-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-03T19:59:02","name":"[RFA] input: add get_source_text_between","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103195902.2114479-1-jason@redhat.com/mbox/"},{"id":15185,"url":"https://patchwork.plctlab.org/api/1.2/patches/15185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103204741.516199-1-aldot@gcc.gnu.org/","msgid":"<20221103204741.516199-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-03T20:47:41","name":"cgraph_node: Remove redundant section clearing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103204741.516199-1-aldot@gcc.gnu.org/mbox/"},{"id":15194,"url":"https://patchwork.plctlab.org/api/1.2/patches/15194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103210049.516886-1-aldot@gcc.gnu.org/","msgid":"<20221103210049.516886-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-03T21:00:49","name":"Plug memory leak in attribute target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103210049.516886-1-aldot@gcc.gnu.org/mbox/"},{"id":15227,"url":"https://patchwork.plctlab.org/api/1.2/patches/15227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103232355.5eb1d235@nbbrfq/","msgid":"<20221103232355.5eb1d235@nbbrfq>","list_archive_url":null,"date":"2022-11-03T22:23:55","name":"RFH: attr target_clones default assembler name ignored?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221103232355.5eb1d235@nbbrfq/mbox/"},{"id":15262,"url":"https://patchwork.plctlab.org/api/1.2/patches/15262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104000432.15254-1-hongyu.wang@intel.com/","msgid":"<20221104000432.15254-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-04T00:04:32","name":"Optimize VEC_PERM_EXPR with same permutation index and operation [PR98167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104000432.15254-1-hongyu.wang@intel.com/mbox/"},{"id":15264,"url":"https://patchwork.plctlab.org/api/1.2/patches/15264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104005331.775049-1-kevinl@rivosinc.com/","msgid":"<20221104005331.775049-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-04T00:53:31","name":"[v3] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104005331.775049-1-kevinl@rivosinc.com/mbox/"},{"id":15382,"url":"https://patchwork.plctlab.org/api/1.2/patches/15382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104063942.1594844-1-xry111@xry111.site/","msgid":"<20221104063942.1594844-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-04T06:39:41","name":"LoongArch: fix signed overflow in loongarch_emit_int_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104063942.1594844-1-xry111@xry111.site/mbox/"},{"id":15412,"url":"https://patchwork.plctlab.org/api/1.2/patches/15412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104074632.19951-1-haochen.jiang@intel.com/","msgid":"<20221104074632.19951-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-04T07:46:32","name":"Support Intel prefetchit0/t1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104074632.19951-1-haochen.jiang@intel.com/mbox/"},{"id":15419,"url":"https://patchwork.plctlab.org/api/1.2/patches/15419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104081150.22062-1-haochen.jiang@intel.com/","msgid":"<20221104081150.22062-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-04T08:11:50","name":"Initial Granite Rapids support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104081150.22062-1-haochen.jiang@intel.com/mbox/"},{"id":15428,"url":"https://patchwork.plctlab.org/api/1.2/patches/15428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TVUXHelLjgA8Yq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:03:13","name":"libcpp: Update to Unicode 15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TVUXHelLjgA8Yq@tucnak/mbox/"},{"id":15429,"url":"https://patchwork.plctlab.org/api/1.2/patches/15429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pme32idj.fsf@euler.schwinge.homeip.net/","msgid":"<87pme32idj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-04T09:12:24","name":"Better integrate default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'' (was: Restore default '\''sorry'\'' '\''TARGET_ASM_CONSTRUCTOR'\'', '\''TARGET_ASM_DESTRUCTOR'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pme32idj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":15430,"url":"https://patchwork.plctlab.org/api/1.2/patches/15430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TX+6SSEZw1fIsz@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:14:35","name":"testsuite: Add testcase from C++23 P2314R4 - Character sets and encodings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2TX+6SSEZw1fIsz@tucnak/mbox/"},{"id":15434,"url":"https://patchwork.plctlab.org/api/1.2/patches/15434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7447720.EvYhyI6sBW@fomalhaut/","msgid":"<7447720.EvYhyI6sBW@fomalhaut>","list_archive_url":null,"date":"2022-11-04T09:27:23","name":"Fix recent thinko in operand_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7447720.EvYhyI6sBW@fomalhaut/mbox/"},{"id":15444,"url":"https://patchwork.plctlab.org/api/1.2/patches/15444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rkr12mj.fsf@oldenburg.str.redhat.com/","msgid":"<878rkr12mj.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-11-04T09:37:56","name":"[v2] libgcc: Mostly vectorize CIE encoding extraction for FDEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rkr12mj.fsf@oldenburg.str.redhat.com/mbox/"},{"id":15449,"url":"https://patchwork.plctlab.org/api/1.2/patches/15449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRY=KG-cL4GtX-wZBKd06WjNtDyeTLPDgL8WvzkJaoJDzA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T09:51:17","name":"Update Affiliation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRY=KG-cL4GtX-wZBKd06WjNtDyeTLPDgL8WvzkJaoJDzA@mail.gmail.com/mbox/"},{"id":15451,"url":"https://patchwork.plctlab.org/api/1.2/patches/15451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cza32fxi.fsf@euler.schwinge.homeip.net/","msgid":"<87cza32fxi.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-04T10:05:13","name":"GCC 13: OpenMP offloading to Intel MIC has been removed (was: Remove support for Intel MIC offloading)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cza32fxi.fsf@euler.schwinge.homeip.net/mbox/"},{"id":15489,"url":"https://patchwork.plctlab.org/api/1.2/patches/15489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104121734.828189-1-jwakely@redhat.com/","msgid":"<20221104121734.828189-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T12:17:34","name":"doc: Document correct -fwide-exec-charset defaults [PR41041]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104121734.828189-1-jwakely@redhat.com/mbox/"},{"id":15504,"url":"https://patchwork.plctlab.org/api/1.2/patches/15504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104124800.910588-1-siddhesh@gotplt.org/","msgid":"<20221104124800.910588-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-11-04T12:48:00","name":"[v2] tree-object-size: Support strndup and strdup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104124800.910588-1-siddhesh@gotplt.org/mbox/"},{"id":15524,"url":"https://patchwork.plctlab.org/api/1.2/patches/15524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com/","msgid":"<44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:09","name":"[1/6] diagnostics: Fix macro tracking for ad-hoc locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44cead99227a4bbb93860813c168163999b8d164.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15526,"url":"https://patchwork.plctlab.org/api/1.2/patches/15526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com/","msgid":"<65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:10","name":"[2/6] diagnostics: Use an inline function rather than hardcoding string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65bfbf319942664358737a1d9d9103f7304199d0.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15525,"url":"https://patchwork.plctlab.org/api/1.2/patches/15525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com/","msgid":"<2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:11","name":"[3/6] libcpp: Fix paste error with unknown pragma after macro expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2222c8ff04699ae5671e1b654aafe5502259feaa.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15527,"url":"https://patchwork.plctlab.org/api/1.2/patches/15527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbe5ba2a7d067eb725c0733ca3960fab969cf139.1667514153.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T13:44:12","name":"[4/6] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbe5ba2a7d067eb725c0733ca3960fab969cf139.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15528,"url":"https://patchwork.plctlab.org/api/1.2/patches/15528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bef0a344e3c76fa7deb8d3fbb9fcfb8cd2257f97.1667514153.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T13:44:13","name":"[5/6] diagnostics: Support generated data in additional contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bef0a344e3c76fa7deb8d3fbb9fcfb8cd2257f97.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15529,"url":"https://patchwork.plctlab.org/api/1.2/patches/15529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com/","msgid":"<3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2022-11-04T13:44:14","name":"[6/6] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3712797708c5c5d83b767bf48cb876f193d80ea2.1667514153.git.lhyatt@gmail.com/mbox/"},{"id":15530,"url":"https://patchwork.plctlab.org/api/1.2/patches/15530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135338.85230-1-poulhies@adacore.com/","msgid":"<20221104135338.85230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:53:38","name":"[COMMITTED] ada: Generate host-side CUDA_Register_Function calls for device'\''s adainit/adafinal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135338.85230-1-poulhies@adacore.com/mbox/"},{"id":15531,"url":"https://patchwork.plctlab.org/api/1.2/patches/15531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135347.85341-1-poulhies@adacore.com/","msgid":"<20221104135347.85341-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:53:47","name":"[COMMITTED] ada: Reject expanded global names in lock-free protected objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135347.85341-1-poulhies@adacore.com/mbox/"},{"id":15533,"url":"https://patchwork.plctlab.org/api/1.2/patches/15533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135418.85406-1-poulhies@adacore.com/","msgid":"<20221104135418.85406-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:54:18","name":"[COMMITTED] ada: Remove VxWorks 6 and VxWorks 653 2.x content from the UGX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135418.85406-1-poulhies@adacore.com/mbox/"},{"id":15532,"url":"https://patchwork.plctlab.org/api/1.2/patches/15532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135427.85477-1-poulhies@adacore.com/","msgid":"<20221104135427.85477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:54:27","name":"[COMMITTED] ada: Support lock-free protected objects with pragma Initialize_Scalars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135427.85477-1-poulhies@adacore.com/mbox/"},{"id":15534,"url":"https://patchwork.plctlab.org/api/1.2/patches/15534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135551.85648-1-poulhies@adacore.com/","msgid":"<20221104135551.85648-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:55:51","name":"[COMMITTED] ada: Generate missing object decls for adainit/adafinal registration calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135551.85648-1-poulhies@adacore.com/mbox/"},{"id":15536,"url":"https://patchwork.plctlab.org/api/1.2/patches/15536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135613.85774-1-poulhies@adacore.com/","msgid":"<20221104135613.85774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:13","name":"[COMMITTED] ada: Allow enabling a restricted set of language extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135613.85774-1-poulhies@adacore.com/mbox/"},{"id":15540,"url":"https://patchwork.plctlab.org/api/1.2/patches/15540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135622.85834-1-poulhies@adacore.com/","msgid":"<20221104135622.85834-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:22","name":"[COMMITTED] ada: Small editorial changes to documentation comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135622.85834-1-poulhies@adacore.com/mbox/"},{"id":15545,"url":"https://patchwork.plctlab.org/api/1.2/patches/15545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135628.85893-1-poulhies@adacore.com/","msgid":"<20221104135628.85893-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:28","name":"[COMMITTED] ada: Improve efficiency of scope stack restoration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135628.85893-1-poulhies@adacore.com/mbox/"},{"id":15550,"url":"https://patchwork.plctlab.org/api/1.2/patches/15550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135636.85954-1-poulhies@adacore.com/","msgid":"<20221104135636.85954-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:36","name":"[COMMITTED] ada: Fix various typos in GNAT RM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135636.85954-1-poulhies@adacore.com/mbox/"},{"id":15537,"url":"https://patchwork.plctlab.org/api/1.2/patches/15537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135643.86019-1-poulhies@adacore.com/","msgid":"<20221104135643.86019-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:43","name":"[COMMITTED] ada: Fix various typos in node and entity description comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135643.86019-1-poulhies@adacore.com/mbox/"},{"id":15538,"url":"https://patchwork.plctlab.org/api/1.2/patches/15538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135649.86081-1-poulhies@adacore.com/","msgid":"<20221104135649.86081-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:49","name":"[COMMITTED] ada: Refactor: replace uses of `not Present(X)` with `No (X)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135649.86081-1-poulhies@adacore.com/mbox/"},{"id":15554,"url":"https://patchwork.plctlab.org/api/1.2/patches/15554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135654.86140-1-poulhies@adacore.com/","msgid":"<20221104135654.86140-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:56:54","name":"[COMMITTED] ada: Remove sa_messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135654.86140-1-poulhies@adacore.com/mbox/"},{"id":15542,"url":"https://patchwork.plctlab.org/api/1.2/patches/15542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135702.86200-1-poulhies@adacore.com/","msgid":"<20221104135702.86200-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:02","name":"[COMMITTED] ada: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135702.86200-1-poulhies@adacore.com/mbox/"},{"id":15544,"url":"https://patchwork.plctlab.org/api/1.2/patches/15544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135708.86262-1-poulhies@adacore.com/","msgid":"<20221104135708.86262-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:08","name":"[COMMITTED] ada: Skip dynamic interface conversion under configurable runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135708.86262-1-poulhies@adacore.com/mbox/"},{"id":15549,"url":"https://patchwork.plctlab.org/api/1.2/patches/15549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135713.86322-1-poulhies@adacore.com/","msgid":"<20221104135713.86322-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:13","name":"[COMMITTED] ada: Skip dynamic interface conversion under configurable runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135713.86322-1-poulhies@adacore.com/mbox/"},{"id":15553,"url":"https://patchwork.plctlab.org/api/1.2/patches/15553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135721.86383-1-poulhies@adacore.com/","msgid":"<20221104135721.86383-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:21","name":"[COMMITTED] ada: Simplify detection of controlling formals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135721.86383-1-poulhies@adacore.com/mbox/"},{"id":15558,"url":"https://patchwork.plctlab.org/api/1.2/patches/15558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135728.86443-1-poulhies@adacore.com/","msgid":"<20221104135728.86443-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:28","name":"[COMMITTED] ada: Fix repeated killing of private entity values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135728.86443-1-poulhies@adacore.com/mbox/"},{"id":15541,"url":"https://patchwork.plctlab.org/api/1.2/patches/15541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135734.86504-1-poulhies@adacore.com/","msgid":"<20221104135734.86504-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:34","name":"[COMMITTED] ada: Fix loop unnesting issue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135734.86504-1-poulhies@adacore.com/mbox/"},{"id":15560,"url":"https://patchwork.plctlab.org/api/1.2/patches/15560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135743.86571-1-poulhies@adacore.com/","msgid":"<20221104135743.86571-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:43","name":"[COMMITTED] ada: Fix various typos in GNAT User'\''s Guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135743.86571-1-poulhies@adacore.com/mbox/"},{"id":15547,"url":"https://patchwork.plctlab.org/api/1.2/patches/15547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135752.86633-1-poulhies@adacore.com/","msgid":"<20221104135752.86633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:57:52","name":"[COMMITTED] ada: Cleanup clearing flags on package variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135752.86633-1-poulhies@adacore.com/mbox/"},{"id":15552,"url":"https://patchwork.plctlab.org/api/1.2/patches/15552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135801.86694-1-poulhies@adacore.com/","msgid":"<20221104135801.86694-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:01","name":"[COMMITTED] ada: Avoid repeated iteration over private protected components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135801.86694-1-poulhies@adacore.com/mbox/"},{"id":15556,"url":"https://patchwork.plctlab.org/api/1.2/patches/15556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135810.86760-1-poulhies@adacore.com/","msgid":"<20221104135810.86760-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:10","name":"[COMMITTED] ada: Flag unsupported dispatching constructor calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135810.86760-1-poulhies@adacore.com/mbox/"},{"id":15546,"url":"https://patchwork.plctlab.org/api/1.2/patches/15546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135815.86869-1-poulhies@adacore.com/","msgid":"<20221104135815.86869-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:15","name":"[COMMITTED] ada: Remove redundant calls in handling of aspect specifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135815.86869-1-poulhies@adacore.com/mbox/"},{"id":15551,"url":"https://patchwork.plctlab.org/api/1.2/patches/15551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135824.86935-1-poulhies@adacore.com/","msgid":"<20221104135824.86935-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:24","name":"[COMMITTED] ada: Static intrinsic functions are a core language extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135824.86935-1-poulhies@adacore.com/mbox/"},{"id":15562,"url":"https://patchwork.plctlab.org/api/1.2/patches/15562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135831.86995-1-poulhies@adacore.com/","msgid":"<20221104135831.86995-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:31","name":"[COMMITTED] ada: Cleanup code for warnings about unset references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135831.86995-1-poulhies@adacore.com/mbox/"},{"id":15564,"url":"https://patchwork.plctlab.org/api/1.2/patches/15564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135838.87055-1-poulhies@adacore.com/","msgid":"<20221104135838.87055-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:38","name":"[COMMITTED] ada: Cleanup code for unreferenced variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135838.87055-1-poulhies@adacore.com/mbox/"},{"id":15555,"url":"https://patchwork.plctlab.org/api/1.2/patches/15555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135844.87117-1-poulhies@adacore.com/","msgid":"<20221104135844.87117-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:44","name":"[COMMITTED] ada: Cleanup code for warnings about unreferenced formal parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135844.87117-1-poulhies@adacore.com/mbox/"},{"id":15559,"url":"https://patchwork.plctlab.org/api/1.2/patches/15559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135850.87177-1-poulhies@adacore.com/","msgid":"<20221104135850.87177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:50","name":"[COMMITTED] ada: Fix typo in comment referring to pragma Restrictions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135850.87177-1-poulhies@adacore.com/mbox/"},{"id":15561,"url":"https://patchwork.plctlab.org/api/1.2/patches/15561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135856.87236-1-poulhies@adacore.com/","msgid":"<20221104135856.87236-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:58:56","name":"[COMMITTED] ada: Fix couple of issues with arrays indexed by enumeration type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135856.87236-1-poulhies@adacore.com/mbox/"},{"id":15563,"url":"https://patchwork.plctlab.org/api/1.2/patches/15563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135903.87298-1-poulhies@adacore.com/","msgid":"<20221104135903.87298-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-04T13:59:03","name":"[COMMITTED] ada: Fix for validity checks combined with aliasing checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104135903.87298-1-poulhies@adacore.com/mbox/"},{"id":15565,"url":"https://patchwork.plctlab.org/api/1.2/patches/15565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140612.834725-1-jwakely@redhat.com/","msgid":"<20221104140612.834725-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:06:12","name":"[committed] libstdc++: Define _GNU_SOURCE for secure_getenv on Cygwin [PR107511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140612.834725-1-jwakely@redhat.com/mbox/"},{"id":15573,"url":"https://patchwork.plctlab.org/api/1.2/patches/15573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140618.834765-1-jwakely@redhat.com/","msgid":"<20221104140618.834765-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:06:18","name":"[committed] libstdc++: Simplify lifetime of eh_globals variable [PR107500]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104140618.834765-1-jwakely@redhat.com/mbox/"},{"id":15583,"url":"https://patchwork.plctlab.org/api/1.2/patches/15583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104141905.312059-1-aldyh@redhat.com/","msgid":"<20221104141905.312059-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:19:05","name":"[COMMITTED] Set nonzero bits for multiplication and divisions by a power of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104141905.312059-1-aldyh@redhat.com/mbox/"},{"id":15606,"url":"https://patchwork.plctlab.org/api/1.2/patches/15606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104143719.1709284-1-xry111@xry111.site/","msgid":"<20221104143719.1709284-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-04T14:37:19","name":"LoongArch: Add fcopysign instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104143719.1709284-1-xry111@xry111.site/mbox/"},{"id":15607,"url":"https://patchwork.plctlab.org/api/1.2/patches/15607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104144026.2311096-1-jason@redhat.com/","msgid":"<20221104144026.2311096-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-04T14:40:26","name":"[RFC] c++: implement P1492 contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104144026.2311096-1-jason@redhat.com/mbox/"},{"id":15628,"url":"https://patchwork.plctlab.org/api/1.2/patches/15628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-1-ppalka@redhat.com/","msgid":"<20221104150525.2968778-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-04T15:05:24","name":"[1/2] c++: correct __has_attribute(init_priority)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-1-ppalka@redhat.com/mbox/"},{"id":15629,"url":"https://patchwork.plctlab.org/api/1.2/patches/15629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-2-ppalka@redhat.com/","msgid":"<20221104150525.2968778-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-04T15:05:25","name":"[2/2] libstdc++: Move stream initialization into compiled library [PR44952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104150525.2968778-2-ppalka@redhat.com/mbox/"},{"id":15680,"url":"https://patchwork.plctlab.org/api/1.2/patches/15680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104173920.5313660c@nbbrfq/","msgid":"<20221104173920.5313660c@nbbrfq>","list_archive_url":null,"date":"2022-11-04T16:39:20","name":"symtab: also change RTL decl name [was: RFH: attr target_clones default assembler name ignored?]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104173920.5313660c@nbbrfq/mbox/"},{"id":15708,"url":"https://patchwork.plctlab.org/api/1.2/patches/15708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB3PR08MB89866C068CE122E2FEEF152E833B9@DB3PR08MB8986.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-04T17:11:40","name":"[committed] AArch64: Fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB3PR08MB89866C068CE122E2FEEF152E833B9@DB3PR08MB8986.eurprd08.prod.outlook.com/mbox/"},{"id":15723,"url":"https://patchwork.plctlab.org/api/1.2/patches/15723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104172537.1039148-1-richard.purdie@linuxfoundation.org/","msgid":"<20221104172537.1039148-1-richard.purdie@linuxfoundation.org>","list_archive_url":null,"date":"2022-11-04T17:25:37","name":"gcc/file-prefix-map: Fix NULL filename handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221104172537.1039148-1-richard.purdie@linuxfoundation.org/mbox/"},{"id":15973,"url":"https://patchwork.plctlab.org/api/1.2/patches/15973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105140155.1206577-1-jwakely@redhat.com/","msgid":"<20221105140155.1206577-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-05T14:01:55","name":"[committed] libstdc++: Do not use SFINAE for propagate_const conversions [PR107525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105140155.1206577-1-jwakely@redhat.com/mbox/"},{"id":16012,"url":"https://patchwork.plctlab.org/api/1.2/patches/16012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191021.3081198-1-ibuclaw@gdcproject.org/","msgid":"<20221105191021.3081198-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-05T19:10:21","name":"[committed] d: Add support for vector comparison operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191021.3081198-1-ibuclaw@gdcproject.org/mbox/"},{"id":16013,"url":"https://patchwork.plctlab.org/api/1.2/patches/16013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191906.3087155-1-ibuclaw@gdcproject.org/","msgid":"<20221105191906.3087155-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-05T19:19:06","name":"[committed] d: Adjust attr_register2.d to pass when compiling with -m32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105191906.3087155-1-ibuclaw@gdcproject.org/mbox/"},{"id":16039,"url":"https://patchwork.plctlab.org/api/1.2/patches/16039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dee92d68-139c-9a2d-325e-2c3f402291e8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-05T22:28:47","name":"Fortran: Fix reallocation on assignment for kind=4 strings [PR107508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dee92d68-139c-9a2d-325e-2c3f402291e8@codesourcery.com/mbox/"},{"id":16042,"url":"https://patchwork.plctlab.org/api/1.2/patches/16042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225423.AFA9633E1C@hamza.pair.com/","msgid":"<20221105225423.AFA9633E1C@hamza.pair.com>","list_archive_url":null,"date":"2022-11-05T22:54:20","name":"[committed] wwwdocs: codingrationale: Switch www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225423.AFA9633E1C@hamza.pair.com/mbox/"},{"id":16043,"url":"https://patchwork.plctlab.org/api/1.2/patches/16043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225906.CC21733E18@hamza.pair.com/","msgid":"<20221105225906.CC21733E18@hamza.pair.com>","list_archive_url":null,"date":"2022-11-05T22:59:04","name":"[committed] wwwdocs: gcc-4.8: Move three links from http to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221105225906.CC21733E18@hamza.pair.com/mbox/"},{"id":16054,"url":"https://patchwork.plctlab.org/api/1.2/patches/16054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106000102.18696-1-kito.cheng@sifive.com/","msgid":"<20221106000102.18696-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-11-06T00:01:02","name":"RISC-V: Fix RVV related testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106000102.18696-1-kito.cheng@sifive.com/mbox/"},{"id":16102,"url":"https://patchwork.plctlab.org/api/1.2/patches/16102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106085633.267351-1-juzhe.zhong@rivai.ai/","msgid":"<20221106085633.267351-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-06T08:56:33","name":"RISC-V: Add RVV registers register spilling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106085633.267351-1-juzhe.zhong@rivai.ai/mbox/"},{"id":16132,"url":"https://patchwork.plctlab.org/api/1.2/patches/16132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870D12EAC564A973CA9788EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-06T12:55:41","name":"Support Intel RAO-INT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870D12EAC564A973CA9788EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16133,"url":"https://patchwork.plctlab.org/api/1.2/patches/16133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487D12DCC77C6F69B1B6775EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-06T12:59:25","name":"i386: Prefer remote atomic insn for atomic_fetch{add, and, or, xor}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB5487D12DCC77C6F69B1B6775EC3D9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16157,"url":"https://patchwork.plctlab.org/api/1.2/patches/16157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106161420.522485-1-aldyh@redhat.com/","msgid":"<20221106161420.522485-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-06T16:14:20","name":"Use bit-CCP in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221106161420.522485-1-aldyh@redhat.com/mbox/"},{"id":16212,"url":"https://patchwork.plctlab.org/api/1.2/patches/16212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-2-haochen.jiang@intel.com/","msgid":"<20221107014114.71155-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-07T01:41:13","name":"[1/2] Initial Grand Ridge support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-2-haochen.jiang@intel.com/mbox/"},{"id":16213,"url":"https://patchwork.plctlab.org/api/1.2/patches/16213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-3-haochen.jiang@intel.com/","msgid":"<20221107014114.71155-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-07T01:41:14","name":"[2/2] Add m_CORE_ATOM for atom cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107014114.71155-3-haochen.jiang@intel.com/mbox/"},{"id":16262,"url":"https://patchwork.plctlab.org/api/1.2/patches/16262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com/","msgid":"<91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com>","list_archive_url":null,"date":"2022-11-07T06:45:05","name":"[v4,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d596d0-e4ca-f60f-4fe0-d96e35d62de2@linux.ibm.com/mbox/"},{"id":16292,"url":"https://patchwork.plctlab.org/api/1.2/patches/16292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2i/dVyDDbzKHeoO@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:19:01","name":"libstdc++: Update from latest fast_float [PR107468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2i/dVyDDbzKHeoO@tucnak/mbox/"},{"id":16293,"url":"https://patchwork.plctlab.org/api/1.2/patches/16293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2jA5jLpvM8e2Cfu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:25:10","name":"[committed] Add another commit to ignore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2jA5jLpvM8e2Cfu@tucnak/mbox/"},{"id":16296,"url":"https://patchwork.plctlab.org/api/1.2/patches/16296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083828.150145-1-poulhies@adacore.com/","msgid":"<20221107083828.150145-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:38:28","name":"[COMMITTED] ada: Remove useless validity suppression for attribute Input","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083828.150145-1-poulhies@adacore.com/mbox/"},{"id":16297,"url":"https://patchwork.plctlab.org/api/1.2/patches/16297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083901.150264-1-poulhies@adacore.com/","msgid":"<20221107083901.150264-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:01","name":"[COMMITTED] ada: Fix missing tag for with of an obsolescent function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083901.150264-1-poulhies@adacore.com/mbox/"},{"id":16298,"url":"https://patchwork.plctlab.org/api/1.2/patches/16298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083913.150332-1-poulhies@adacore.com/","msgid":"<20221107083913.150332-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:13","name":"[COMMITTED] ada: Reject misplaced pragma Obsolescent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083913.150332-1-poulhies@adacore.com/mbox/"},{"id":16299,"url":"https://patchwork.plctlab.org/api/1.2/patches/16299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083922.150400-1-poulhies@adacore.com/","msgid":"<20221107083922.150400-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:22","name":"[COMMITTED] ada: Simplify detection of pragmas in the context items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083922.150400-1-poulhies@adacore.com/mbox/"},{"id":16300,"url":"https://patchwork.plctlab.org/api/1.2/patches/16300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083928.150465-1-poulhies@adacore.com/","msgid":"<20221107083928.150465-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:28","name":"[COMMITTED] ada: Don'\''t reuse operator nodes in expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083928.150465-1-poulhies@adacore.com/mbox/"},{"id":16301,"url":"https://patchwork.plctlab.org/api/1.2/patches/16301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083934.150530-1-poulhies@adacore.com/","msgid":"<20221107083934.150530-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:34","name":"[COMMITTED] ada: Create operator nodes in functional style","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083934.150530-1-poulhies@adacore.com/mbox/"},{"id":16302,"url":"https://patchwork.plctlab.org/api/1.2/patches/16302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083940.150593-1-poulhies@adacore.com/","msgid":"<20221107083940.150593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:40","name":"[COMMITTED] ada: Cleanup WITH clauses after switching from obsolescent Ada 83 unit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083940.150593-1-poulhies@adacore.com/mbox/"},{"id":16303,"url":"https://patchwork.plctlab.org/api/1.2/patches/16303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083944.150656-1-poulhies@adacore.com/","msgid":"<20221107083944.150656-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:44","name":"[COMMITTED] ada: Tune layout after switching to Ada 2022 aggregate syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083944.150656-1-poulhies@adacore.com/mbox/"},{"id":16307,"url":"https://patchwork.plctlab.org/api/1.2/patches/16307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083950.150721-1-poulhies@adacore.com/","msgid":"<20221107083950.150721-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:50","name":"[COMMITTED] ada: Put_Image aspect spec incorrectly not inherited","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083950.150721-1-poulhies@adacore.com/mbox/"},{"id":16311,"url":"https://patchwork.plctlab.org/api/1.2/patches/16311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083955.150787-1-poulhies@adacore.com/","msgid":"<20221107083955.150787-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:55","name":"[COMMITTED] ada: Cleanup comment about mapping parameters when inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083955.150787-1-poulhies@adacore.com/mbox/"},{"id":16306,"url":"https://patchwork.plctlab.org/api/1.2/patches/16306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083959.150855-1-poulhies@adacore.com/","msgid":"<20221107083959.150855-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:39:59","name":"[COMMITTED] ada: Clean up code for visibility of generic actuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107083959.150855-1-poulhies@adacore.com/mbox/"},{"id":16314,"url":"https://patchwork.plctlab.org/api/1.2/patches/16314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084005.150919-1-poulhies@adacore.com/","msgid":"<20221107084005.150919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:05","name":"[COMMITTED] ada: Clean up unnecesary call in resolution of overloaded expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084005.150919-1-poulhies@adacore.com/mbox/"},{"id":16309,"url":"https://patchwork.plctlab.org/api/1.2/patches/16309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084011.150984-1-poulhies@adacore.com/","msgid":"<20221107084011.150984-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:11","name":"[COMMITTED] ada: Allow reuse of Enclosing_Declaration_Or_Statement by GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084011.150984-1-poulhies@adacore.com/mbox/"},{"id":16305,"url":"https://patchwork.plctlab.org/api/1.2/patches/16305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084016.151048-1-poulhies@adacore.com/","msgid":"<20221107084016.151048-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:16","name":"[COMMITTED] ada: Reject boxes in delta array aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084016.151048-1-poulhies@adacore.com/mbox/"},{"id":16308,"url":"https://patchwork.plctlab.org/api/1.2/patches/16308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084021.151112-1-poulhies@adacore.com/","msgid":"<20221107084021.151112-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:21","name":"[COMMITTED] ada: Remove redundant suppression for non-modified IN OUT parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084021.151112-1-poulhies@adacore.com/mbox/"},{"id":16318,"url":"https://patchwork.plctlab.org/api/1.2/patches/16318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084026.151175-1-poulhies@adacore.com/","msgid":"<20221107084026.151175-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:26","name":"[COMMITTED] ada: Cleanup detection of code within generic instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084026.151175-1-poulhies@adacore.com/mbox/"},{"id":16312,"url":"https://patchwork.plctlab.org/api/1.2/patches/16312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084034.151239-1-poulhies@adacore.com/","msgid":"<20221107084034.151239-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:34","name":"[COMMITTED] ada: Flip warning suppression routine to positive meaning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084034.151239-1-poulhies@adacore.com/mbox/"},{"id":16315,"url":"https://patchwork.plctlab.org/api/1.2/patches/16315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084040.151303-1-poulhies@adacore.com/","msgid":"<20221107084040.151303-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:40","name":"[COMMITTED] ada: Deconstruct Safe_To_Capture_In_Parameter_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084040.151303-1-poulhies@adacore.com/mbox/"},{"id":16321,"url":"https://patchwork.plctlab.org/api/1.2/patches/16321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084046.151369-1-poulhies@adacore.com/","msgid":"<20221107084046.151369-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:46","name":"[COMMITTED] ada: Suppress warnings on derived True/False","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084046.151369-1-poulhies@adacore.com/mbox/"},{"id":16313,"url":"https://patchwork.plctlab.org/api/1.2/patches/16313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084050.151435-1-poulhies@adacore.com/","msgid":"<20221107084050.151435-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:50","name":"[COMMITTED] ada: Clean up unnecessary nesting in code for DLL libraries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084050.151435-1-poulhies@adacore.com/mbox/"},{"id":16324,"url":"https://patchwork.plctlab.org/api/1.2/patches/16324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084055.151501-1-poulhies@adacore.com/","msgid":"<20221107084055.151501-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:55","name":"[COMMITTED] ada: Fix detection of external calls to protected objects in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084055.151501-1-poulhies@adacore.com/mbox/"},{"id":16310,"url":"https://patchwork.plctlab.org/api/1.2/patches/16310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084059.151565-1-poulhies@adacore.com/","msgid":"<20221107084059.151565-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:40:59","name":"[COMMITTED] ada: Rework CUDA host-side invocation of device-side elaboration code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084059.151565-1-poulhies@adacore.com/mbox/"},{"id":16317,"url":"https://patchwork.plctlab.org/api/1.2/patches/16317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084103.151630-1-poulhies@adacore.com/","msgid":"<20221107084103.151630-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:03","name":"[COMMITTED] ada: Fixed elaboration of CUDA programs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084103.151630-1-poulhies@adacore.com/mbox/"},{"id":16319,"url":"https://patchwork.plctlab.org/api/1.2/patches/16319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084108.151693-1-poulhies@adacore.com/","msgid":"<20221107084108.151693-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:08","name":"[COMMITTED] ada: Fix inherited postconditions in inlined subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084108.151693-1-poulhies@adacore.com/mbox/"},{"id":16325,"url":"https://patchwork.plctlab.org/api/1.2/patches/16325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084114.151758-1-poulhies@adacore.com/","msgid":"<20221107084114.151758-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:14","name":"[COMMITTED] ada: Inline composite node kind AST queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084114.151758-1-poulhies@adacore.com/mbox/"},{"id":16320,"url":"https://patchwork.plctlab.org/api/1.2/patches/16320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084129.151825-1-poulhies@adacore.com/","msgid":"<20221107084129.151825-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:29","name":"[COMMITTED] ada: New warning about noncomposing user-defined \"=\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084129.151825-1-poulhies@adacore.com/mbox/"},{"id":16322,"url":"https://patchwork.plctlab.org/api/1.2/patches/16322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084135.151888-1-poulhies@adacore.com/","msgid":"<20221107084135.151888-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:35","name":"[COMMITTED] ada: Use named notation in calls to Expand_Composite_Equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084135.151888-1-poulhies@adacore.com/mbox/"},{"id":16326,"url":"https://patchwork.plctlab.org/api/1.2/patches/16326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084140.151953-1-poulhies@adacore.com/","msgid":"<20221107084140.151953-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:40","name":"[COMMITTED] ada: Fix performance regression related to references in Refined_State","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084140.151953-1-poulhies@adacore.com/mbox/"},{"id":16327,"url":"https://patchwork.plctlab.org/api/1.2/patches/16327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084147.152022-1-poulhies@adacore.com/","msgid":"<20221107084147.152022-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:47","name":"[COMMITTED] ada: Tune hash function for cross-reference entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084147.152022-1-poulhies@adacore.com/mbox/"},{"id":16323,"url":"https://patchwork.plctlab.org/api/1.2/patches/16323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084152.152087-1-poulhies@adacore.com/","msgid":"<20221107084152.152087-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-07T08:41:52","name":"[COMMITTED] ada: Document that gprof won'\''t work on windows with PIE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107084152.152087-1-poulhies@adacore.com/mbox/"},{"id":16328,"url":"https://patchwork.plctlab.org/api/1.2/patches/16328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz/","msgid":"<75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz>","list_archive_url":null,"date":"2022-11-07T08:51:08","name":"[(pushed)] Mitigate clang warnings:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75e3842a-f9d2-b90a-5e19-30afcf0f1fa6@suse.cz/mbox/"},{"id":16331,"url":"https://patchwork.plctlab.org/api/1.2/patches/16331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkra6539m5r.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-07T08:57:52","name":"[10/15,V4] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkra6539m5r.fsf_-_@arm.com/mbox/"},{"id":16332,"url":"https://patchwork.plctlab.org/api/1.2/patches/16332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107090211.E59EA13494@imap2.suse-dmz.suse.de/","msgid":"<20221107090211.E59EA13494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-07T09:02:11","name":"[RFC] tree-optimization/107389 - use __builtin_assume_alignment at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107090211.E59EA13494@imap2.suse-dmz.suse.de/mbox/"},{"id":16346,"url":"https://patchwork.plctlab.org/api/1.2/patches/16346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870966ACA7650A8A81A230EC3C9@DM4PR11MB5487.namprd11.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-07T09:32:20","name":"[committed] i386: Fix typo in sse-22.c pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM4PR11MB54870966ACA7650A8A81A230EC3C9@DM4PR11MB5487.namprd11.prod.outlook.com/mbox/"},{"id":16349,"url":"https://patchwork.plctlab.org/api/1.2/patches/16349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107094645.3718427-1-jcmvbkbc@gmail.com/","msgid":"<20221107094645.3718427-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-07T09:46:45","name":"[RFA] gcc: fix PR rtl-optimization/107482","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107094645.3718427-1-jcmvbkbc@gmail.com/mbox/"},{"id":16381,"url":"https://patchwork.plctlab.org/api/1.2/patches/16381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107114238.663927-1-aldyh@redhat.com/","msgid":"<20221107114238.663927-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-07T11:42:38","name":"[COMMITTED,range-op] Restrict division by power of 2 optimization to positive numbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107114238.663927-1-aldyh@redhat.com/mbox/"},{"id":16404,"url":"https://patchwork.plctlab.org/api/1.2/patches/16404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107130302.22073-1-amonakov@ispras.ru/","msgid":"<20221107130302.22073-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-11-07T13:03:02","name":"[committed] tree-ssa-sink: do not touch calls that return twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107130302.22073-1-amonakov@ispras.ru/mbox/"},{"id":16411,"url":"https://patchwork.plctlab.org/api/1.2/patches/16411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0yesygv.fsf_-_@debian/","msgid":"<87r0yesygv.fsf_-_@debian>","list_archive_url":null,"date":"2022-11-07T13:09:20","name":"[v2,16/19] modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0yesygv.fsf_-_@debian/mbox/"},{"id":16475,"url":"https://patchwork.plctlab.org/api/1.2/patches/16475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de/","msgid":"<20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-07T14:26:20","name":"unswitching of outer loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107142620.72D1F13AC7@imap2.suse-dmz.suse.de/mbox/"},{"id":16635,"url":"https://patchwork.plctlab.org/api/1.2/patches/16635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29a64538-62fa-63a6-39ed-ed9165679e43@acm.org/","msgid":"<29a64538-62fa-63a6-39ed-ed9165679e43@acm.org>","list_archive_url":null,"date":"2022-11-07T18:27:56","name":"C++: Template lambda mangling testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29a64538-62fa-63a6-39ed-ed9165679e43@acm.org/mbox/"},{"id":16639,"url":"https://patchwork.plctlab.org/api/1.2/patches/16639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107185801.326-1-palmer@rivosinc.com/","msgid":"<20221107185801.326-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-07T18:58:01","name":"invoke: RISC-V'\''s -march doesn'\''t take ISA strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107185801.326-1-palmer@rivosinc.com/mbox/"},{"id":16661,"url":"https://patchwork.plctlab.org/api/1.2/patches/16661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107195856.791257-1-aldyh@redhat.com/","msgid":"<20221107195856.791257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-07T19:58:56","name":"[COMMITTED] Improve multiplication by powers of 2 in range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107195856.791257-1-aldyh@redhat.com/mbox/"},{"id":16677,"url":"https://patchwork.plctlab.org/api/1.2/patches/16677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107205752.2735464-1-jason@redhat.com/","msgid":"<20221107205752.2735464-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-07T20:57:52","name":"[RFC(libstdc++)] c++: implement P2468R2, the equality operator you are looking for","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107205752.2735464-1-jason@redhat.com/mbox/"},{"id":16741,"url":"https://patchwork.plctlab.org/api/1.2/patches/16741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de/","msgid":"<24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de>","list_archive_url":null,"date":"2022-11-07T21:45:47","name":"[v3] Fortran: ordering of hidden procedure arguments [PR107441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24c6acfa-6745-c7a3-4bbd-54bd0fa31454@gmx.de/mbox/"},{"id":16747,"url":"https://patchwork.plctlab.org/api/1.2/patches/16747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224254.12230-1-david.faust@oracle.com/","msgid":"<20221107224254.12230-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-07T22:42:54","name":"[committed] bpf: cleanup missed refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224254.12230-1-david.faust@oracle.com/mbox/"},{"id":16749,"url":"https://patchwork.plctlab.org/api/1.2/patches/16749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224829.12440-1-david.faust@oracle.com/","msgid":"<20221107224829.12440-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-07T22:48:29","name":"bpf: Use enum for resolved overloaded builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221107224829.12440-1-david.faust@oracle.com/mbox/"},{"id":16787,"url":"https://patchwork.plctlab.org/api/1.2/patches/16787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com/","msgid":"<3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com>","list_archive_url":null,"date":"2022-11-08T00:23:01","name":"[COMMITTED] PR tree-optimization/104530 - Add transitive inferred range processing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a76b0ec-98eb-503a-c8f1-8dd5946435b3@redhat.com/mbox/"},{"id":16794,"url":"https://patchwork.plctlab.org/api/1.2/patches/16794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108011751.286433-1-hongtao.liu@intel.com/","msgid":"<20221108011751.286433-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-08T01:17:51","name":"Fix incorrect insn type to avoid ICE in memory attr auto-detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108011751.286433-1-hongtao.liu@intel.com/mbox/"},{"id":16821,"url":"https://patchwork.plctlab.org/api/1.2/patches/16821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com/","msgid":"<454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-08T02:48:56","name":"rtl: Try to remove EH edges after {pro,epi}logue generation [PR90259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/454e83e7-e7a2-6e10-e051-b33c2d1b580d@linux.ibm.com/mbox/"},{"id":16822,"url":"https://patchwork.plctlab.org/api/1.2/patches/16822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025322.6499-1-lili.cui@intel.com/","msgid":"<20221108025322.6499-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-11-08T02:53:22","name":"Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025322.6499-1-lili.cui@intel.com/mbox/"},{"id":16823,"url":"https://patchwork.plctlab.org/api/1.2/patches/16823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025725.2493707-1-dmalcolm@redhat.com/","msgid":"<20221108025725.2493707-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:25","name":"[committed] analyzer: fix \"when '\''strchr'\'' returns non-NULL\" message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025725.2493707-1-dmalcolm@redhat.com/mbox/"},{"id":16824,"url":"https://patchwork.plctlab.org/api/1.2/patches/16824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025729.2493732-1-dmalcolm@redhat.com/","msgid":"<20221108025729.2493732-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:29","name":"[committed] analyzer: introduce succeed_or_fail_call_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025729.2493732-1-dmalcolm@redhat.com/mbox/"},{"id":16825,"url":"https://patchwork.plctlab.org/api/1.2/patches/16825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025733.2493756-1-dmalcolm@redhat.com/","msgid":"<20221108025733.2493756-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T02:57:33","name":"[commited] analyzer: start adding support for errno","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108025733.2493756-1-dmalcolm@redhat.com/mbox/"},{"id":16828,"url":"https://patchwork.plctlab.org/api/1.2/patches/16828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030252.2494185-1-dmalcolm@redhat.com/","msgid":"<20221108030252.2494185-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:02:52","name":"analyzer: add warnings relating to sockets [PR106140]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030252.2494185-1-dmalcolm@redhat.com/mbox/"},{"id":16837,"url":"https://patchwork.plctlab.org/api/1.2/patches/16837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030940.1539533-1-jwakely@redhat.com/","msgid":"<20221108030940.1539533-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:09:40","name":"[committed] libstdc++: Remove empty elements in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030940.1539533-1-jwakely@redhat.com/mbox/"},{"id":16838,"url":"https://patchwork.plctlab.org/api/1.2/patches/16838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030951.1539586-1-jwakely@redhat.com/","msgid":"<20221108030951.1539586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T03:09:51","name":"[committed] libstdc++: Update my author blurb in the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108030951.1539586-1-jwakely@redhat.com/mbox/"},{"id":16856,"url":"https://patchwork.plctlab.org/api/1.2/patches/16856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108043657.2064455-1-kevinl@rivosinc.com/","msgid":"<20221108043657.2064455-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-08T04:36:58","name":"[v2] RISC-V missing __builtin_lceil and __builtin_lfloor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108043657.2064455-1-kevinl@rivosinc.com/mbox/"},{"id":16890,"url":"https://patchwork.plctlab.org/api/1.2/patches/16890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108071438.2523863-1-sam@gentoo.org/","msgid":"<20221108071438.2523863-1-sam@gentoo.org>","list_archive_url":null,"date":"2022-11-08T07:14:38","name":"maintainer-scripts/gcc_release: compress xz in parallel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108071438.2523863-1-sam@gentoo.org/mbox/"},{"id":16931,"url":"https://patchwork.plctlab.org/api/1.2/patches/16931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084123.300670-1-poulhies@adacore.com/","msgid":"<20221108084123.300670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:23","name":"[COMMITTED] ada: Add new -gnatw_q switch to usage message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084123.300670-1-poulhies@adacore.com/mbox/"},{"id":16932,"url":"https://patchwork.plctlab.org/api/1.2/patches/16932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084133.300737-1-poulhies@adacore.com/","msgid":"<20221108084133.300737-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:33","name":"[COMMITTED] ada: Raise Tag_Error when Ada.Tags operations are called with No_Tag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084133.300737-1-poulhies@adacore.com/mbox/"},{"id":16934,"url":"https://patchwork.plctlab.org/api/1.2/patches/16934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084139.300802-1-poulhies@adacore.com/","msgid":"<20221108084139.300802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:39","name":"[COMMITTED] ada: Missing master of task causing assertion failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084139.300802-1-poulhies@adacore.com/mbox/"},{"id":16937,"url":"https://patchwork.plctlab.org/api/1.2/patches/16937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084144.300867-1-poulhies@adacore.com/","msgid":"<20221108084144.300867-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:44","name":"[COMMITTED] ada: Reject record delta aggregates with limited expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084144.300867-1-poulhies@adacore.com/mbox/"},{"id":16933,"url":"https://patchwork.plctlab.org/api/1.2/patches/16933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084150.300930-1-poulhies@adacore.com/","msgid":"<20221108084150.300930-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:50","name":"[COMMITTED] ada: Allow initialization of limited objects with delta aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084150.300930-1-poulhies@adacore.com/mbox/"},{"id":16936,"url":"https://patchwork.plctlab.org/api/1.2/patches/16936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084155.300994-1-poulhies@adacore.com/","msgid":"<20221108084155.300994-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:41:55","name":"[COMMITTED] ada: Reject limited objects in array and record delta aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084155.300994-1-poulhies@adacore.com/mbox/"},{"id":16935,"url":"https://patchwork.plctlab.org/api/1.2/patches/16935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084201.301060-1-poulhies@adacore.com/","msgid":"<20221108084201.301060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:01","name":"[COMMITTED] ada: Remove obsolete code in Resolve_If_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084201.301060-1-poulhies@adacore.com/mbox/"},{"id":16940,"url":"https://patchwork.plctlab.org/api/1.2/patches/16940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084207.301124-1-poulhies@adacore.com/","msgid":"<20221108084207.301124-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:07","name":"[COMMITTED] ada: Cleanup local variable that is only set as an out parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084207.301124-1-poulhies@adacore.com/mbox/"},{"id":16939,"url":"https://patchwork.plctlab.org/api/1.2/patches/16939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084212.301188-1-poulhies@adacore.com/","msgid":"<20221108084212.301188-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:12","name":"[COMMITTED] ada: Remove unneeded code in handling formal type defaults","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084212.301188-1-poulhies@adacore.com/mbox/"},{"id":16943,"url":"https://patchwork.plctlab.org/api/1.2/patches/16943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084217.301254-1-poulhies@adacore.com/","msgid":"<20221108084217.301254-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:17","name":"[COMMITTED] ada: Fix inconsistent whitespace in Ada.Numerics.Generic_Complex_Arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084217.301254-1-poulhies@adacore.com/mbox/"},{"id":16945,"url":"https://patchwork.plctlab.org/api/1.2/patches/16945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084222.301318-1-poulhies@adacore.com/","msgid":"<20221108084222.301318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:22","name":"[COMMITTED] ada: Fix expansion of '\''Wide_Image and '\''Wide_Wide_Image on composite types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084222.301318-1-poulhies@adacore.com/mbox/"},{"id":16941,"url":"https://patchwork.plctlab.org/api/1.2/patches/16941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084227.301381-1-poulhies@adacore.com/","msgid":"<20221108084227.301381-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:27","name":"[COMMITTED] ada: Preanalyze classwide contracts as spec expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084227.301381-1-poulhies@adacore.com/mbox/"},{"id":16944,"url":"https://patchwork.plctlab.org/api/1.2/patches/16944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084234.301451-1-poulhies@adacore.com/","msgid":"<20221108084234.301451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:34","name":"[COMMITTED] ada: Remove redundant line in Analyze_Qualified_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084234.301451-1-poulhies@adacore.com/mbox/"},{"id":16946,"url":"https://patchwork.plctlab.org/api/1.2/patches/16946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084238.301516-1-poulhies@adacore.com/","msgid":"<20221108084238.301516-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:38","name":"[COMMITTED] ada: Minor consistency tweaks in Sem_Ch4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084238.301516-1-poulhies@adacore.com/mbox/"},{"id":16948,"url":"https://patchwork.plctlab.org/api/1.2/patches/16948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084244.301581-1-poulhies@adacore.com/","msgid":"<20221108084244.301581-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:44","name":"[COMMITTED] ada: Improve handling of declare expressions in deferred-freezing contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084244.301581-1-poulhies@adacore.com/mbox/"},{"id":16938,"url":"https://patchwork.plctlab.org/api/1.2/patches/16938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084250.301647-1-poulhies@adacore.com/","msgid":"<20221108084250.301647-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:50","name":"[COMMITTED] ada: Align -gnatwc'\''s documentation with its behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084250.301647-1-poulhies@adacore.com/mbox/"},{"id":16949,"url":"https://patchwork.plctlab.org/api/1.2/patches/16949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084258.301710-1-poulhies@adacore.com/","msgid":"<20221108084258.301710-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:42:58","name":"[COMMITTED] ada: Move warnings switches -- initial work","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084258.301710-1-poulhies@adacore.com/mbox/"},{"id":16953,"url":"https://patchwork.plctlab.org/api/1.2/patches/16953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084303.301774-1-poulhies@adacore.com/","msgid":"<20221108084303.301774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:03","name":"[COMMITTED] ada: Enforce matching of extra formals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084303.301774-1-poulhies@adacore.com/mbox/"},{"id":16942,"url":"https://patchwork.plctlab.org/api/1.2/patches/16942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084315.301840-1-poulhies@adacore.com/","msgid":"<20221108084315.301840-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:15","name":"[COMMITTED] ada: Implement RM 4.5.7(10/3) name resolution rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084315.301840-1-poulhies@adacore.com/mbox/"},{"id":16952,"url":"https://patchwork.plctlab.org/api/1.2/patches/16952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084321.301906-1-poulhies@adacore.com/","msgid":"<20221108084321.301906-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:21","name":"[COMMITTED] ada: Propagate aspect Ghost when instantiating null formal procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084321.301906-1-poulhies@adacore.com/mbox/"},{"id":16947,"url":"https://patchwork.plctlab.org/api/1.2/patches/16947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084331.301970-1-poulhies@adacore.com/","msgid":"<20221108084331.301970-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:31","name":"[COMMITTED] ada: Small consistency fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084331.301970-1-poulhies@adacore.com/mbox/"},{"id":16950,"url":"https://patchwork.plctlab.org/api/1.2/patches/16950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084340.302036-1-poulhies@adacore.com/","msgid":"<20221108084340.302036-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:40","name":"[COMMITTED] ada: Set Support_Atomic_Primitives for VxWorks 7 runtimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084340.302036-1-poulhies@adacore.com/mbox/"},{"id":16951,"url":"https://patchwork.plctlab.org/api/1.2/patches/16951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084344.302102-1-poulhies@adacore.com/","msgid":"<20221108084344.302102-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:44","name":"[COMMITTED] ada: Adjust classwide contract expression preanalysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084344.302102-1-poulhies@adacore.com/mbox/"},{"id":16954,"url":"https://patchwork.plctlab.org/api/1.2/patches/16954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084350.302166-1-poulhies@adacore.com/","msgid":"<20221108084350.302166-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:50","name":"[COMMITTED] ada: Clean up call to check if aspects are present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084350.302166-1-poulhies@adacore.com/mbox/"},{"id":16956,"url":"https://patchwork.plctlab.org/api/1.2/patches/16956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084355.302230-1-poulhies@adacore.com/","msgid":"<20221108084355.302230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:43:55","name":"[COMMITTED] ada: Compile-time simplification of '\''Image incorrectly ignores Put_Image","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084355.302230-1-poulhies@adacore.com/mbox/"},{"id":16955,"url":"https://patchwork.plctlab.org/api/1.2/patches/16955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084400.302294-1-poulhies@adacore.com/","msgid":"<20221108084400.302294-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-08T08:44:00","name":"[COMMITTED] ada: Fix oversight in implementation of allocators for storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108084400.302294-1-poulhies@adacore.com/mbox/"},{"id":16963,"url":"https://patchwork.plctlab.org/api/1.2/patches/16963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108093200.3750500-1-jcmvbkbc@gmail.com/","msgid":"<20221108093200.3750500-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-08T09:32:00","name":"[COMMITTED] gcc: fix PR rtl-optimization/107482","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108093200.3750500-1-jcmvbkbc@gmail.com/mbox/"},{"id":16975,"url":"https://patchwork.plctlab.org/api/1.2/patches/16975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2otxo2bEDKbOBth@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T10:21:58","name":"[committed] libstdc++: Uncomment denorm_min test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2otxo2bEDKbOBth@tucnak/mbox/"},{"id":16979,"url":"https://patchwork.plctlab.org/api/1.2/patches/16979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2oycVBgmY/RQPZb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T10:41:53","name":"i386: Improve vector [GL]E{,U} comparison against vector constants [PR107546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2oycVBgmY/RQPZb@tucnak/mbox/"},{"id":16983,"url":"https://patchwork.plctlab.org/api/1.2/patches/16983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2o3IekL8TZKHdlR@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T11:01:53","name":"cdce: Fix up get_no_error_domain for new f{16,32,64,128} builtins [PR107547]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2o3IekL8TZKHdlR@tucnak/mbox/"},{"id":16996,"url":"https://patchwork.plctlab.org/api/1.2/patches/16996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pCbby26nP6ipNf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T11:50:05","name":"testsuite: Fix up pr107541.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pCbby26nP6ipNf@tucnak/mbox/"},{"id":17008,"url":"https://patchwork.plctlab.org/api/1.2/patches/17008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108121539.E4F9F13398@imap2.suse-dmz.suse.de/","msgid":"<20221108121539.E4F9F13398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-08T12:15:39","name":"[RFC] tree-optimization/99416 - loop distribution wrt vect data dependence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108121539.E4F9F13398@imap2.suse-dmz.suse.de/mbox/"},{"id":17022,"url":"https://patchwork.plctlab.org/api/1.2/patches/17022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108125348.BFC2213398@imap2.suse-dmz.suse.de/","msgid":"<20221108125348.BFC2213398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-08T12:53:48","name":"[v2] tree-optimization/107389 - honor __builtin_assume_alignment at -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108125348.BFC2213398@imap2.suse-dmz.suse.de/mbox/"},{"id":17058,"url":"https://patchwork.plctlab.org/api/1.2/patches/17058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108142458.862678-1-aldyh@redhat.com/","msgid":"<20221108142458.862678-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-08T14:24:58","name":"CCP: handle division by a power of 2 as a right shift.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108142458.862678-1-aldyh@redhat.com/mbox/"},{"id":17074,"url":"https://patchwork.plctlab.org/api/1.2/patches/17074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com/","msgid":"<952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com>","list_archive_url":null,"date":"2022-11-08T14:35:28","name":"amdgcn: Add builtins for vectorized native versions of abs, floorf and floor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/952c73e5-ba66-0a5a-e33e-1feb6396743e@codesourcery.com/mbox/"},{"id":17076,"url":"https://patchwork.plctlab.org/api/1.2/patches/17076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pq4z+Ig95RN1/z@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-08T14:42:43","name":"[RFC] c++: Minimal handling of carries_dependency attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2pq4z+Ig95RN1/z@tucnak/mbox/"},{"id":17104,"url":"https://patchwork.plctlab.org/api/1.2/patches/17104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-2-qing.zhao@oracle.com/","msgid":"<20221108145113.955321-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-11-08T14:51:12","name":"[1/2] Change the name of array_at_struct_end_p to array_ref_flexible_size_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-2-qing.zhao@oracle.com/mbox/"},{"id":17093,"url":"https://patchwork.plctlab.org/api/1.2/patches/17093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-3-qing.zhao@oracle.com/","msgid":"<20221108145113.955321-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-11-08T14:51:13","name":"[2/2] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108145113.955321-3-qing.zhao@oracle.com/mbox/"},{"id":17094,"url":"https://patchwork.plctlab.org/api/1.2/patches/17094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcec9860-4091-3b32-3a55-4bd5df85e010@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T15:08:06","name":"[COMMITTED] amdgcn: Fix expansion of GCN_BUILTIN_LDEXPV builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcec9860-4091-3b32-3a55-4bd5df85e010@codesourcery.com/mbox/"},{"id":17133,"url":"https://patchwork.plctlab.org/api/1.2/patches/17133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174625.1764584-1-jwakely@redhat.com/","msgid":"<20221108174625.1764584-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:25","name":"[committed] libstdc++: Add always_inline to most allocator functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174625.1764584-1-jwakely@redhat.com/mbox/"},{"id":17137,"url":"https://patchwork.plctlab.org/api/1.2/patches/17137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174641.1764608-1-jwakely@redhat.com/","msgid":"<20221108174641.1764608-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:41","name":"[committed] libstdc++: Fix -Wsystem-headers warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174641.1764608-1-jwakely@redhat.com/mbox/"},{"id":17139,"url":"https://patchwork.plctlab.org/api/1.2/patches/17139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174648.1764639-1-jwakely@redhat.com/","msgid":"<20221108174648.1764639-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-08T17:46:48","name":"[committed] libstdc++: Fix -Wsystem-headers warnings in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108174648.1764639-1-jwakely@redhat.com/mbox/"},{"id":17147,"url":"https://patchwork.plctlab.org/api/1.2/patches/17147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df0993a57a506629ba121656e5384c1500cb6338.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:14","name":"[1/3] Compute a table of DWARF register sizes at compile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df0993a57a506629ba121656e5384c1500cb6338.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17149,"url":"https://patchwork.plctlab.org/api/1.2/patches/17149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f08400a5054aadb4fa6e2da62a2768700944b591.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:30","name":"[2/3] Define __LIBGCC_DWARF_REG_SIZES_CONSTANT__ if DWARF register size is constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f08400a5054aadb4fa6e2da62a2768700944b591.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17148,"url":"https://patchwork.plctlab.org/api/1.2/patches/17148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5de1b7feecc0ce5bec77e6a21032ab1f6c0a315.1667930077.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:05:40","name":"[3/3] libgcc: Specialize execute_cfa_program in DWARF unwinder for alignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e5de1b7feecc0ce5bec77e6a21032ab1f6c0a315.1667930077.git.fweimer@redhat.com/mbox/"},{"id":17159,"url":"https://patchwork.plctlab.org/api/1.2/patches/17159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRZonrXGHcaqVLNduyoAXa8mT+5TiYk29PsXd4sBwfa2JA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T18:20:20","name":"[Arm] Fix PR 92999","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRZonrXGHcaqVLNduyoAXa8mT+5TiYk29PsXd4sBwfa2JA@mail.gmail.com/mbox/"},{"id":17161,"url":"https://patchwork.plctlab.org/api/1.2/patches/17161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108183108.1233500-1-thomas@codesourcery.com/","msgid":"<20221108183108.1233500-1-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-11-08T18:31:08","name":"[newlib] Generally make all '\''long double complex'\'' methods available in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108183108.1233500-1-thomas@codesourcery.com/mbox/"},{"id":17190,"url":"https://patchwork.plctlab.org/api/1.2/patches/17190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195415.2701208-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195415.2701208-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:15","name":"RISC-V: costs: handle BSWAP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195415.2701208-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17191,"url":"https://patchwork.plctlab.org/api/1.2/patches/17191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195434.2701247-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195434.2701247-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:34","name":"RISC-V: costs: support shift-and-add in strength-reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195434.2701247-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17192,"url":"https://patchwork.plctlab.org/api/1.2/patches/17192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195456.2701279-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195456.2701279-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:54:56","name":"RISC-V: optimize '\''(a >= 0) ? b : 0'\'' to srai + andn, if compiling for Zbb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195456.2701279-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17193,"url":"https://patchwork.plctlab.org/api/1.2/patches/17193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195509.2701313-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195509.2701313-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:55:09","name":"RISC-V: branch-(not)equals-zero compares against $zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195509.2701313-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17194,"url":"https://patchwork.plctlab.org/api/1.2/patches/17194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195547.2701347-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195547.2701347-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:55:47","name":"RISC-V: bitmanip: use bexti for \"(a & (1 << BIT_NO)) ? 0 : -1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195547.2701347-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17195,"url":"https://patchwork.plctlab.org/api/1.2/patches/17195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195617.2701379-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195617.2701379-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:56:17","name":"RISC-V: split to allow formation of sh[123]add before divw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195617.2701379-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17196,"url":"https://patchwork.plctlab.org/api/1.2/patches/17196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195730.2701496-1-philipp.tomsich@vrull.eu/","msgid":"<20221108195730.2701496-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T19:57:30","name":"RISC-V: Optimize slli(.uw)? + addw + zext.w into sh[123]add + zext.w","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108195730.2701496-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17199,"url":"https://patchwork.plctlab.org/api/1.2/patches/17199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/adca186b-24e1-20da-9e4d-0acb6754f133@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2022-11-08T20:02:20","name":"match.pd: rewrite select to branchless expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/adca186b-24e1-20da-9e4d-0acb6754f133@rivosinc.com/mbox/"},{"id":17200,"url":"https://patchwork.plctlab.org/api/1.2/patches/17200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108200323.2719563-1-philipp.tomsich@vrull.eu/","msgid":"<20221108200323.2719563-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:03:23","name":"RISC-V: allow bseti on SImode without sign-extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108200323.2719563-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17209,"url":"https://patchwork.plctlab.org/api/1.2/patches/17209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmdx42bm.fsf@euler.schwinge.homeip.net/","msgid":"<87pmdx42bm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-08T20:29:49","name":"nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmdx42bm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":17213,"url":"https://patchwork.plctlab.org/api/1.2/patches/17213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204625.2794920-1-philipp.tomsich@vrull.eu/","msgid":"<20221108204625.2794920-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:46:25","name":"RISC-V: Optimize branches testing a bit-range or a shifted immediate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204625.2794920-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17216,"url":"https://patchwork.plctlab.org/api/1.2/patches/17216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204637.2794952-1-philipp.tomsich@vrull.eu/","msgid":"<20221108204637.2794952-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-08T20:46:36","name":"RISC-V: No extensions for SImode min/max against safe constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108204637.2794952-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17263,"url":"https://patchwork.plctlab.org/api/1.2/patches/17263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108225413.2538404-1-dmalcolm@redhat.com/","msgid":"<20221108225413.2538404-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-08T22:54:13","name":"[committed] analyzer: eliminate region_model::eval_condition_without_cm [PR101962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221108225413.2538404-1-dmalcolm@redhat.com/mbox/"},{"id":17283,"url":"https://patchwork.plctlab.org/api/1.2/patches/17283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109000631.2814859-1-philipp.tomsich@vrull.eu/","msgid":"<20221109000631.2814859-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T00:06:31","name":"[v2] RISC-V: No extensions for SImode min/max against safe constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109000631.2814859-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17306,"url":"https://patchwork.plctlab.org/api/1.2/patches/17306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-3-ben.boeckel@kitware.com/","msgid":"<20221109021048.2123704-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-11-09T02:10:47","name":"[v3,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-3-ben.boeckel@kitware.com/mbox/"},{"id":17307,"url":"https://patchwork.plctlab.org/api/1.2/patches/17307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-4-ben.boeckel@kitware.com/","msgid":"<20221109021048.2123704-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-11-09T02:10:48","name":"[v3,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109021048.2123704-4-ben.boeckel@kitware.com/mbox/"},{"id":17325,"url":"https://patchwork.plctlab.org/api/1.2/patches/17325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109030036.19175-1-palmer@rivosinc.com/","msgid":"<20221109030036.19175-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-09T03:00:36","name":"RISC-V: Add the Zihpm and Zicntr extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109030036.19175-1-palmer@rivosinc.com/mbox/"},{"id":17362,"url":"https://patchwork.plctlab.org/api/1.2/patches/17362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-1-aldyh@redhat.com/","msgid":"<20221109070758.1030615-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T07:07:57","name":"[COMMITTED,range-op-float] Abstract out binary operator code out of PLUS_EXPR entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-1-aldyh@redhat.com/mbox/"},{"id":17361,"url":"https://patchwork.plctlab.org/api/1.2/patches/17361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-2-aldyh@redhat.com/","msgid":"<20221109070758.1030615-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T07:07:58","name":"[COMMITTED,range-op-float] Implement MINUS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109070758.1030615-2-aldyh@redhat.com/mbox/"},{"id":17364,"url":"https://patchwork.plctlab.org/api/1.2/patches/17364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109071302.78435-1-haochen.jiang@intel.com/","msgid":"<20221109071302.78435-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-09T07:13:02","name":"i386: Add ISA check for newly introduced prefetch builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109071302.78435-1-haochen.jiang@intel.com/mbox/"},{"id":17368,"url":"https://patchwork.plctlab.org/api/1.2/patches/17368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-2-xry111@xry111.site/","msgid":"<20221109072147.789090-2-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:44","name":"[1/4] LoongArch: Rename frint_ to rint2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-2-xry111@xry111.site/mbox/"},{"id":17365,"url":"https://patchwork.plctlab.org/api/1.2/patches/17365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-3-xry111@xry111.site/","msgid":"<20221109072147.789090-3-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:45","name":"[2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-3-xry111@xry111.site/mbox/"},{"id":17366,"url":"https://patchwork.plctlab.org/api/1.2/patches/17366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-4-xry111@xry111.site/","msgid":"<20221109072147.789090-4-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:46","name":"[3/4] LoongArch: Add fscaleb.{s, d} instructions as ldexp{sf, df}3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-4-xry111@xry111.site/mbox/"},{"id":17367,"url":"https://patchwork.plctlab.org/api/1.2/patches/17367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-5-xry111@xry111.site/","msgid":"<20221109072147.789090-5-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:21:47","name":"[4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072147.789090-5-xry111@xry111.site/mbox/"},{"id":17369,"url":"https://patchwork.plctlab.org/api/1.2/patches/17369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072645.790242-1-xry111@xry111.site/","msgid":"<20221109072645.790242-1-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T07:26:45","name":"[v2] LoongArch: fix signed overflow in loongarch_emit_int_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109072645.790242-1-xry111@xry111.site/mbox/"},{"id":17415,"url":"https://patchwork.plctlab.org/api/1.2/patches/17415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109090246.1036213-1-aldyh@redhat.com/","msgid":"<20221109090246.1036213-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T09:02:46","name":"[COMMITTED] Implement op[12]_range operators for PLUS_EXPR and MINUS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109090246.1036213-1-aldyh@redhat.com/mbox/"},{"id":17419,"url":"https://patchwork.plctlab.org/api/1.2/patches/17419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz/","msgid":"<75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz>","list_archive_url":null,"date":"2022-11-09T09:09:27","name":"[(pushed)] sphinx: fix building if sphinx-build is missing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75c37723-6963-db1a-0eb3-d71e16aecd7b@suse.cz/mbox/"},{"id":17436,"url":"https://patchwork.plctlab.org/api/1.2/patches/17436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz/","msgid":"<7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz>","list_archive_url":null,"date":"2022-11-09T10:05:49","name":"[(pushed)] avr: sphinx: port gen-avr-mmcu to RST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cef042e-aa55-3a8f-e637-1106dcfa1162@suse.cz/mbox/"},{"id":17460,"url":"https://patchwork.plctlab.org/api/1.2/patches/17460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2uHDeXiivo401ni@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-09T10:55:09","name":"Fix up foperator_abs::op1_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2uHDeXiivo401ni@tucnak/mbox/"},{"id":17480,"url":"https://patchwork.plctlab.org/api/1.2/patches/17480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz/","msgid":"<57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:13:04","name":"[DOCS] sphinx: align documentation links with project names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57f949fd-5997-81de-a54d-8c4365d5f894@suse.cz/mbox/"},{"id":17483,"url":"https://patchwork.plctlab.org/api/1.2/patches/17483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz/","msgid":"<482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:13:37","name":"[DOCS] sphinx: use new Sphinx links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/482ae3dd-15f7-1e81-92e6-51a148e3bbc4@suse.cz/mbox/"},{"id":17494,"url":"https://patchwork.plctlab.org/api/1.2/patches/17494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr5yfo9y2m.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-09T11:17:21","name":"[6/12,V2] arm: Add pointer authentication for stack-unwinding runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr5yfo9y2m.fsf_-_@arm.com/mbox/"},{"id":17507,"url":"https://patchwork.plctlab.org/api/1.2/patches/17507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz/","msgid":"<00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz>","list_archive_url":null,"date":"2022-11-09T11:52:53","name":"[(pushed)] sphinx: update crontab with new script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d9c7ff-ed73-716f-e01e-64458971b1a2@suse.cz/mbox/"},{"id":17522,"url":"https://patchwork.plctlab.org/api/1.2/patches/17522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3c5344-171c-783e-e485-611223baf5bc@suse.cz/","msgid":"<4b3c5344-171c-783e-e485-611223baf5bc@suse.cz>","list_archive_url":null,"date":"2022-11-09T12:12:05","name":"[(pushed)] sphinx: update diagnostics URLs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3c5344-171c-783e-e485-611223baf5bc@suse.cz/mbox/"},{"id":17538,"url":"https://patchwork.plctlab.org/api/1.2/patches/17538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89824348B31E96B4F6432A3C833E9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-09T12:40:05","name":"AArch64: Add fma_reassoc_width [PR107413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89824348B31E96B4F6432A3C833E9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":17539,"url":"https://patchwork.plctlab.org/api/1.2/patches/17539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz/","msgid":"<60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz>","list_archive_url":null,"date":"2022-11-09T12:41:02","name":"[(pushed)] docs: fix: WARNING: Parsing of expression failed. Using fallback parser.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60dbd5ca-ae0b-a968-a702-23fccd82889f@suse.cz/mbox/"},{"id":17546,"url":"https://patchwork.plctlab.org/api/1.2/patches/17546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1d91c0b-5326-ce2e-3f78-8a9de6af9a37@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-09T13:41:27","name":"changelog: check for space after tab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1d91c0b-5326-ce2e-3f78-8a9de6af9a37@suse.cz/mbox/"},{"id":17550,"url":"https://patchwork.plctlab.org/api/1.2/patches/17550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135046.17EDE1331F@imap2.suse-dmz.suse.de/","msgid":"<20221109135046.17EDE1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-09T13:50:45","name":"tree-optimization/84646 - remove premature thread path rejection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135046.17EDE1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":17553,"url":"https://patchwork.plctlab.org/api/1.2/patches/17553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-2-xry111@xry111.site/","msgid":"<20221109135329.952128-2-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:26","name":"[v2,1/4] LoongArch: Rename frint_ to rint2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-2-xry111@xry111.site/mbox/"},{"id":17557,"url":"https://patchwork.plctlab.org/api/1.2/patches/17557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-3-xry111@xry111.site/","msgid":"<20221109135329.952128-3-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:27","name":"[v2,2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-3-xry111@xry111.site/mbox/"},{"id":17554,"url":"https://patchwork.plctlab.org/api/1.2/patches/17554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-4-xry111@xry111.site/","msgid":"<20221109135329.952128-4-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:28","name":"[v2,3/4] LoongArch: Add fscaleb.{s, d} instructions as ldexp{sf, df}3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-4-xry111@xry111.site/mbox/"},{"id":17558,"url":"https://patchwork.plctlab.org/api/1.2/patches/17558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-5-xry111@xry111.site/","msgid":"<20221109135329.952128-5-xry111@xry111.site>","list_archive_url":null,"date":"2022-11-09T13:53:29","name":"[v2,4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109135329.952128-5-xry111@xry111.site/mbox/"},{"id":17559,"url":"https://patchwork.plctlab.org/api/1.2/patches/17559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz/","msgid":"<70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz>","list_archive_url":null,"date":"2022-11-09T13:54:48","name":"[RFC] docs: remove documentation for unsupported releases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70755dd7-6b64-d24b-560d-b5433c9cc344@suse.cz/mbox/"},{"id":17608,"url":"https://patchwork.plctlab.org/api/1.2/patches/17608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com/","msgid":"<78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-09T14:32:35","name":"[GCC,13/15,v4] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78382b9a-a434-4222-9c2b-bf3f7d35ef17@AZ-NEU-EX04.Arm.com/mbox/"},{"id":17609,"url":"https://patchwork.plctlab.org/api/1.2/patches/17609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz/","msgid":"<145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz>","list_archive_url":null,"date":"2022-11-09T14:39:36","name":"[(pushed)] docs: fix links pointing to gcc.gnu.org/install","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/145f7489-42f8-db22-d92c-4dfe4a03da35@suse.cz/mbox/"},{"id":17637,"url":"https://patchwork.plctlab.org/api/1.2/patches/17637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109154139.4561-1-jwakely@redhat.com/","msgid":"<20221109154139.4561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-09T15:41:39","name":"[wwwdocs] Add httpd redirects for texinfo trunk docs and for each release series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109154139.4561-1-jwakely@redhat.com/mbox/"},{"id":17711,"url":"https://patchwork.plctlab.org/api/1.2/patches/17711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109172148.41333-1-aldyh@redhat.com/","msgid":"<20221109172148.41333-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-09T17:21:48","name":"[COMMITTED] Clear NAN when reading back a global range if necessary.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109172148.41333-1-aldyh@redhat.com/mbox/"},{"id":17737,"url":"https://patchwork.plctlab.org/api/1.2/patches/17737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz/","msgid":"<963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz>","list_archive_url":null,"date":"2022-11-09T18:37:09","name":"[(pushed)] docs: create sources tarball","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/963db32b-c341-1553-af6c-2a5cf9e32861@suse.cz/mbox/"},{"id":17739,"url":"https://patchwork.plctlab.org/api/1.2/patches/17739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44555a43-3840-bf91-ee39-0a468ae524be@suse.cz/","msgid":"<44555a43-3840-bf91-ee39-0a468ae524be@suse.cz>","list_archive_url":null,"date":"2022-11-09T18:39:48","name":"[(pushed)] Include docs-sources in onlinedocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44555a43-3840-bf91-ee39-0a468ae524be@suse.cz/mbox/"},{"id":17763,"url":"https://patchwork.plctlab.org/api/1.2/patches/17763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-2-aldot@gcc.gnu.org/","msgid":"<20221109190225.96037-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-09T19:02:24","name":"[1/2] symtab: also change RTL decl name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-2-aldot@gcc.gnu.org/mbox/"},{"id":17764,"url":"https://patchwork.plctlab.org/api/1.2/patches/17764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-3-aldot@gcc.gnu.org/","msgid":"<20221109190225.96037-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-09T19:02:25","name":"[2/2] Fortran: add attribute target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109190225.96037-3-aldot@gcc.gnu.org/mbox/"},{"id":17777,"url":"https://patchwork.plctlab.org/api/1.2/patches/17777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz/","msgid":"<97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz>","list_archive_url":null,"date":"2022-11-09T19:33:51","name":"[(pushed)] sphinx: add missing HAS_SPHINX_BUILD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97cc7812-2e50-7965-3cb1-31ce1f82ea70@suse.cz/mbox/"},{"id":17795,"url":"https://patchwork.plctlab.org/api/1.2/patches/17795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz/","msgid":"<8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz>","list_archive_url":null,"date":"2022-11-09T19:57:18","name":"[(pushed)] docs: Fix expected diagnostics URL [PR107599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e8b7cc4-e328-7fb1-2364-d87ae3680a66@suse.cz/mbox/"},{"id":17803,"url":"https://patchwork.plctlab.org/api/1.2/patches/17803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-60fde88b-2e53-405e-b0d6-3cc97ef45980-1668025063811@3c-app-gmx-bap34/","msgid":"","list_archive_url":null,"date":"2022-11-09T20:17:43","name":"[committed] Fortran: avoid NULL pointer dereference on bad EQUIVALENCEs [PR107559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-60fde88b-2e53-405e-b0d6-3cc97ef45980-1668025063811@3c-app-gmx-bap34/mbox/"},{"id":17814,"url":"https://patchwork.plctlab.org/api/1.2/patches/17814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17c8fc65-adb9-4e07-a987-865911332259-1668027022980@3c-app-gmx-bap34/","msgid":"","list_archive_url":null,"date":"2022-11-09T20:50:22","name":"Proxy ping [PATCH] Fortran: diagnostics for actual arguments to pointer dummy arguments [PR94104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17c8fc65-adb9-4e07-a987-865911332259-1668027022980@3c-app-gmx-bap34/mbox/"},{"id":17815,"url":"https://patchwork.plctlab.org/api/1.2/patches/17815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109205305.96262-1-polacek@redhat.com/","msgid":"<20221109205305.96262-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-09T20:53:05","name":"c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109205305.96262-1-polacek@redhat.com/mbox/"},{"id":17835,"url":"https://patchwork.plctlab.org/api/1.2/patches/17835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109213132.2698221-1-arsen@aarsen.me/","msgid":"<20221109213132.2698221-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-11-09T21:31:34","name":"doc: Use a separate directory for new modules we add to PATH","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109213132.2698221-1-arsen@aarsen.me/mbox/"},{"id":17852,"url":"https://patchwork.plctlab.org/api/1.2/patches/17852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109221205.61966-1-jwakely@redhat.com/","msgid":"<20221109221205.61966-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-09T22:12:05","name":"[v2] doc: Remove outdated reference to \"core\" and front-end downloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109221205.61966-1-jwakely@redhat.com/mbox/"},{"id":17856,"url":"https://patchwork.plctlab.org/api/1.2/patches/17856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109222250.2594117-1-dmalcolm@redhat.com/","msgid":"<20221109222250.2594117-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-09T22:22:50","name":"[committed] analyzer: better logging of event creation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109222250.2594117-1-dmalcolm@redhat.com/mbox/"},{"id":17864,"url":"https://patchwork.plctlab.org/api/1.2/patches/17864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230718.3240479-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230718.3240479-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:18","name":"RISC-V: Optimise adding a (larger than simm12) constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230718.3240479-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17865,"url":"https://patchwork.plctlab.org/api/1.2/patches/17865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230736.3240512-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230736.3240512-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:36","name":"RISC-V: Implement movmisalign to enable SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230736.3240512-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17866,"url":"https://patchwork.plctlab.org/api/1.2/patches/17866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230747.3240551-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230747.3240551-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:07:47","name":"ifcombine: recognize single bit test of sign-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230747.3240551-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17867,"url":"https://patchwork.plctlab.org/api/1.2/patches/17867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230815.3240583-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230815.3240583-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:08:15","name":"ifcombine: fold two bit tests with different polarity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230815.3240583-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17868,"url":"https://patchwork.plctlab.org/api/1.2/patches/17868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230842.3240615-1-philipp.tomsich@vrull.eu/","msgid":"<20221109230842.3240615-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:08:42","name":"[v2,WIP] RISC-V: Replace zero_extendsidi2_shifted with generalized split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109230842.3240615-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17869,"url":"https://patchwork.plctlab.org/api/1.2/patches/17869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109231006.3240799-1-philipp.tomsich@vrull.eu/","msgid":"<20221109231006.3240799-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:10:06","name":"[v3] RISC-V: Replace zero_extendsidi2_shifted with generalized split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109231006.3240799-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17870,"url":"https://patchwork.plctlab.org/api/1.2/patches/17870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109234948.3279391-1-philipp.tomsich@vrull.eu/","msgid":"<20221109234948.3279391-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-09T23:49:48","name":"RISC-V: Fix selection of pipeline model for sifive-7-series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221109234948.3279391-1-philipp.tomsich@vrull.eu/mbox/"},{"id":17872,"url":"https://patchwork.plctlab.org/api/1.2/patches/17872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUsKk8N+EUsVjQS1sSRmsw+QKx4xPo7y4wOg6WLr0pqeQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T00:09:01","name":"Go patch committed: Define __atomic_fetch_add functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUsKk8N+EUsVjQS1sSRmsw+QKx4xPo7y4wOg6WLr0pqeQ@mail.gmail.com/mbox/"},{"id":17887,"url":"https://patchwork.plctlab.org/api/1.2/patches/17887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668042934-1377-1-git-send-email-apinski@marvell.com/","msgid":"<1668042934-1377-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-10T01:15:34","name":"Remove SLOW_SHORT_ACCESS from target headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668042934-1377-1-git-send-email-apinski@marvell.com/mbox/"},{"id":17914,"url":"https://patchwork.plctlab.org/api/1.2/patches/17914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110015608.454675-1-polacek@redhat.com/","msgid":"<20221110015608.454675-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-10T01:56:08","name":"c++: Extend -Wdangling-reference for std::minmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110015608.454675-1-polacek@redhat.com/mbox/"},{"id":17917,"url":"https://patchwork.plctlab.org/api/1.2/patches/17917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110020031.152520-1-jwakely@redhat.com/","msgid":"<20221110020031.152520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-10T02:00:31","name":"[committed] libstdc++: Optimize std::destructible concept","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110020031.152520-1-jwakely@redhat.com/mbox/"},{"id":17925,"url":"https://patchwork.plctlab.org/api/1.2/patches/17925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xll905otHWkzxl@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:44:39","name":"[1/6] PowerPC: Add -mcpu=future","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xll905otHWkzxl@toto.the-meissners.org/mbox/"},{"id":17926,"url":"https://patchwork.plctlab.org/api/1.2/patches/17926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xl0/RvJdmvchfJ@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:45:39","name":"[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xl0/RvJdmvchfJ@toto.the-meissners.org/mbox/"},{"id":17927,"url":"https://patchwork.plctlab.org/api/1.2/patches/17927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xmDFSXZ3ATDcpO@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:46:36","name":"[3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xmDFSXZ3ATDcpO@toto.the-meissners.org/mbox/"},{"id":17928,"url":"https://patchwork.plctlab.org/api/1.2/patches/17928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xm8GdMwRMEkbRA@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:50:24","name":"[4/6] PowerPC: Make MMA insns support DMR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xm8GdMwRMEkbRA@toto.the-meissners.org/mbox/"},{"id":17929,"url":"https://patchwork.plctlab.org/api/1.2/patches/17929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xnRFz8ioc+r7Jk@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:51:48","name":"[5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xnRFz8ioc+r7Jk@toto.the-meissners.org/mbox/"},{"id":17930,"url":"https://patchwork.plctlab.org/api/1.2/patches/17930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xngfGkkZBwBVcO@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-10T02:52:49","name":"[6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2xngfGkkZBwBVcO@toto.the-meissners.org/mbox/"},{"id":17931,"url":"https://patchwork.plctlab.org/api/1.2/patches/17931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110031345.193991-1-jwakely@redhat.com/","msgid":"<20221110031345.193991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-10T03:13:45","name":"c-family: Support #pragma region/endregion [PR85487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110031345.193991-1-jwakely@redhat.com/mbox/"},{"id":17953,"url":"https://patchwork.plctlab.org/api/1.2/patches/17953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz/","msgid":"<9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz>","list_archive_url":null,"date":"2022-11-10T05:33:17","name":"[(pushed)] doc: Modernize baseconf.py.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9731aeaa-c81b-8862-0f74-5715725f5a14@suse.cz/mbox/"},{"id":17955,"url":"https://patchwork.plctlab.org/api/1.2/patches/17955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz/","msgid":"<6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz>","list_archive_url":null,"date":"2022-11-10T05:38:50","name":"[(pushed)] maintainer-scripts: fix superfluous '\''sh'\'' for Python script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a787a97-83e1-151c-a5ee-3dd03e82d844@suse.cz/mbox/"},{"id":17957,"url":"https://patchwork.plctlab.org/api/1.2/patches/17957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110060143.28132-1-haochen.jiang@intel.com/","msgid":"<20221110060143.28132-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-10T06:01:43","name":"[wwwdocs] gcc-13: Mention Intel new ISA and march support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110060143.28132-1-haochen.jiang@intel.com/mbox/"},{"id":18003,"url":"https://patchwork.plctlab.org/api/1.2/patches/18003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110080742.59F2733E46@hamza.pair.com/","msgid":"<20221110080742.59F2733E46@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T08:07:40","name":"[committed] wwwdocs: c99status: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110080742.59F2733E46@hamza.pair.com/mbox/"},{"id":18013,"url":"https://patchwork.plctlab.org/api/1.2/patches/18013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110084212.37FF333E18@hamza.pair.com/","msgid":"<20221110084212.37FF333E18@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T08:42:10","name":"[committed] wwwdocs: gcc-4.8: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110084212.37FF333E18@hamza.pair.com/mbox/"},{"id":18027,"url":"https://patchwork.plctlab.org/api/1.2/patches/18027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2zEZ6f0v/74nBbT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-10T09:29:11","name":"i386: Fix up ix86_expand_int_sse_cmp [PR107585]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2zEZ6f0v/74nBbT@tucnak/mbox/"},{"id":18032,"url":"https://patchwork.plctlab.org/api/1.2/patches/18032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110094331.7804333E60@hamza.pair.com/","msgid":"<20221110094331.7804333E60@hamza.pair.com>","list_archive_url":null,"date":"2022-11-10T09:43:28","name":"[committed] wwwdocs: readings: Remove linux-c6x.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110094331.7804333E60@hamza.pair.com/mbox/"},{"id":18046,"url":"https://patchwork.plctlab.org/api/1.2/patches/18046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-2-aldot@gcc.gnu.org/","msgid":"<20221110102031.1366016-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-10T10:20:30","name":"[1/2] Fortran: Cleanup struct ext_attr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-2-aldot@gcc.gnu.org/mbox/"},{"id":18047,"url":"https://patchwork.plctlab.org/api/1.2/patches/18047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-3-aldot@gcc.gnu.org/","msgid":"<20221110102031.1366016-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-10T10:20:31","name":"[2/2] Fortran: Add attribute flatten","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110102031.1366016-3-aldot@gcc.gnu.org/mbox/"},{"id":18050,"url":"https://patchwork.plctlab.org/api/1.2/patches/18050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae8406c3-b85a-4bd9-9bd2-fff5474a1772@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T10:23:21","name":"[GCC] arm: Add support for Cortex-X1C CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae8406c3-b85a-4bd9-9bd2-fff5474a1772@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18058,"url":"https://patchwork.plctlab.org/api/1.2/patches/18058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c24cd3a3-6f3f-437d-b7ec-a9fea09378df@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T10:37:50","name":"[GCC] arm: Add support for new frame unwinding instruction \"0xb5\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c24cd3a3-6f3f-437d-b7ec-a9fea09378df@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18076,"url":"https://patchwork.plctlab.org/api/1.2/patches/18076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3d17147-aa74-aa6a-a435-2c8445e5b03b@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T11:16:55","name":"[1/2] aarch64: Enable the use of LDAPR for load-acquire semantics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3d17147-aa74-aa6a-a435-2c8445e5b03b@arm.com/mbox/"},{"id":18077,"url":"https://patchwork.plctlab.org/api/1.2/patches/18077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5c31297-4b0e-aaf5-227d-d69dbafb7e24@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-10T11:20:01","name":"[2/2] aarch64: Add support for widening LDAPR instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5c31297-4b0e-aaf5-227d-d69dbafb7e24@arm.com/mbox/"},{"id":18084,"url":"https://patchwork.plctlab.org/api/1.2/patches/18084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9468d0c-9136-edd2-390c-b49821ce8296@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-10T12:09:06","name":"sphinx: support Sphinx in lib*/Makefile.am.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9468d0c-9136-edd2-390c-b49821ce8296@suse.cz/mbox/"},{"id":18114,"url":"https://patchwork.plctlab.org/api/1.2/patches/18114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz/","msgid":"<7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz>","list_archive_url":null,"date":"2022-11-10T12:57:07","name":"[(pushed)] sphinx: add missing newline for conf.py files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7572600a-e61c-6ccf-724e-e5fa76ee86f5@suse.cz/mbox/"},{"id":18115,"url":"https://patchwork.plctlab.org/api/1.2/patches/18115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz/","msgid":"<247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz>","list_archive_url":null,"date":"2022-11-10T12:58:50","name":"[(pushed)] sphinx: add missing newline for conf.py files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/247a3321-b726-f17c-fd88-9e2e020bac18@suse.cz/mbox/"},{"id":18124,"url":"https://patchwork.plctlab.org/api/1.2/patches/18124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110131102.1091513B58@imap2.suse-dmz.suse.de/","msgid":"<20221110131102.1091513B58@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T13:11:01","name":"Restore CCP copy propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110131102.1091513B58@imap2.suse-dmz.suse.de/mbox/"},{"id":18134,"url":"https://patchwork.plctlab.org/api/1.2/patches/18134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y20AQOMOIzv3lvDR@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-10T13:44:32","name":"range-op: Implement floating point multiplication fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y20AQOMOIzv3lvDR@tucnak/mbox/"},{"id":18138,"url":"https://patchwork.plctlab.org/api/1.2/patches/18138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm5yfmc3v6.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2022-11-10T13:53:49","name":"doc: formatting fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm5yfmc3v6.fsf@suse.de/mbox/"},{"id":18149,"url":"https://patchwork.plctlab.org/api/1.2/patches/18149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110141936.62A821332F@imap2.suse-dmz.suse.de/","msgid":"<20221110141936.62A821332F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T14:19:36","name":"better PHI copy propagation for forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110141936.62A821332F@imap2.suse-dmz.suse.de/mbox/"},{"id":18151,"url":"https://patchwork.plctlab.org/api/1.2/patches/18151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com/","msgid":"<6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com>","list_archive_url":null,"date":"2022-11-10T14:37:13","name":"[RESEND] riscv: improve the cost model for loading a 64bit constant in rv32.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6787a2d509d2b8ef27083d3b9806661eb8f56102.1668090837.git.sinan.lin@linux.alibaba.com/mbox/"},{"id":18153,"url":"https://patchwork.plctlab.org/api/1.2/patches/18153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110150345.157116-1-aldyh@redhat.com/","msgid":"<20221110150345.157116-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-10T15:03:46","name":"Do not specify NAN sign in frange::set_nonnegative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110150345.157116-1-aldyh@redhat.com/mbox/"},{"id":18159,"url":"https://patchwork.plctlab.org/api/1.2/patches/18159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110151434.7F16613B58@imap2.suse-dmz.suse.de/","msgid":"<20221110151434.7F16613B58@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-10T15:14:34","name":"Make last DCE remove empty loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110151434.7F16613B58@imap2.suse-dmz.suse.de/mbox/"},{"id":18230,"url":"https://patchwork.plctlab.org/api/1.2/patches/18230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdbe6424-b2f6-d632-1449-22dc00fb7697@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-10T17:03:13","name":"[(pushed)] docs: move label directly before title","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cdbe6424-b2f6-d632-1449-22dc00fb7697@suse.cz/mbox/"},{"id":18281,"url":"https://patchwork.plctlab.org/api/1.2/patches/18281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110183715.2644564-1-dmalcolm@redhat.com/","msgid":"<20221110183715.2644564-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-10T18:37:15","name":"[committed] analyzer: new warning: -Wanalyzer-deref-before-check [PR99671]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110183715.2644564-1-dmalcolm@redhat.com/mbox/"},{"id":18299,"url":"https://patchwork.plctlab.org/api/1.2/patches/18299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-1-ppalka@redhat.com/","msgid":"<20221110195602.2434376-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-10T19:56:01","name":"[1/2] c++: remove function_p parm from tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-1-ppalka@redhat.com/mbox/"},{"id":18300,"url":"https://patchwork.plctlab.org/api/1.2/patches/18300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-2-ppalka@redhat.com/","msgid":"<20221110195602.2434376-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-10T19:56:02","name":"[2/2] c++: remove i_c_e_p parm from tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110195602.2434376-2-ppalka@redhat.com/mbox/"},{"id":18329,"url":"https://patchwork.plctlab.org/api/1.2/patches/18329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213403.3592364-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213403.3592364-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:34:03","name":"[v2] RISC-V: costs: support shift-and-add in strength-reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213403.3592364-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18330,"url":"https://patchwork.plctlab.org/api/1.2/patches/18330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213445.3592438-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213445.3592438-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:34:45","name":"RISC-V: Use bseti to cover more immediates than with ori alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213445.3592438-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18331,"url":"https://patchwork.plctlab.org/api/1.2/patches/18331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213501.3592470-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213501.3592470-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:35:01","name":"RISC-V: Use binvi to cover more immediates than with xori alone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213501.3592470-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18332,"url":"https://patchwork.plctlab.org/api/1.2/patches/18332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213617.3592572-1-philipp.tomsich@vrull.eu/","msgid":"<20221110213617.3592572-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-10T21:36:17","name":"RISC-V: Optimize masking with two clear bits not a SMALL_OPERAND","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221110213617.3592572-1-philipp.tomsich@vrull.eu/mbox/"},{"id":18333,"url":"https://patchwork.plctlab.org/api/1.2/patches/18333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c4cc511a-5cda-481e-b712-133f9bc73ffe-1668117408459@3c-app-gmx-bs59/","msgid":"","list_archive_url":null,"date":"2022-11-10T21:56:48","name":"Fortran: fix treatment of character, value, optional dummy arguments [PR107444]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c4cc511a-5cda-481e-b712-133f9bc73ffe-1668117408459@3c-app-gmx-bs59/mbox/"},{"id":18343,"url":"https://patchwork.plctlab.org/api/1.2/patches/18343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/OP472vRO_13s3y8PI5nplVOCz6jhAMLTrsiRNglJYpsVepytiMkTHLMJAgzi83RBq0Lbv9VU0QNCuLNKiTUtVPJebd8pQPSAvXgzU7QL35k=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-11-10T23:07:30","name":"d: Update __FreeBSD_version values [PR107469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/OP472vRO_13s3y8PI5nplVOCz6jhAMLTrsiRNglJYpsVepytiMkTHLMJAgzi83RBq0Lbv9VU0QNCuLNKiTUtVPJebd8pQPSAvXgzU7QL35k=@lorenzosalvadore.it/mbox/"},{"id":18344,"url":"https://patchwork.plctlab.org/api/1.2/patches/18344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org/","msgid":"<3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org>","list_archive_url":null,"date":"2022-11-10T23:25:26","name":"demangler: Templated lambda demangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e672ca0-2608-e30a-0cf8-0fc9af0d6729@acm.org/mbox/"},{"id":18370,"url":"https://patchwork.plctlab.org/api/1.2/patches/18370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-2-hongtao.liu@intel.com/","msgid":"<20221111012631.76776-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-11T01:26:30","name":"[1/2] Implement hwasan target_hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-2-hongtao.liu@intel.com/mbox/"},{"id":18369,"url":"https://patchwork.plctlab.org/api/1.2/patches/18369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-3-hongtao.liu@intel.com/","msgid":"<20221111012631.76776-3-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-11T01:26:31","name":"[2/2] Enable hwasan for x86-64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111012631.76776-3-hongtao.liu@intel.com/mbox/"},{"id":18390,"url":"https://patchwork.plctlab.org/api/1.2/patches/18390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9934c80-5182-9a7b-f9fe-f7b14e458e16@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T02:28:01","name":"[v2] match.pd: rewrite select to branchless expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9934c80-5182-9a7b-f9fe-f7b14e458e16@rivosinc.com/mbox/"},{"id":18392,"url":"https://patchwork.plctlab.org/api/1.2/patches/18392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111024330.87663-1-haochen.jiang@intel.com/","msgid":"<20221111024330.87663-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-11-11T02:43:30","name":"i386: Add AMX-TILE dependency for AMX related ISAs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111024330.87663-1-haochen.jiang@intel.com/mbox/"},{"id":18393,"url":"https://patchwork.plctlab.org/api/1.2/patches/18393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025244.188157-1-polacek@redhat.com/","msgid":"<20221111025244.188157-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T02:52:44","name":"configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025244.188157-1-polacek@redhat.com/mbox/"},{"id":18394,"url":"https://patchwork.plctlab.org/api/1.2/patches/18394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025309.188226-1-polacek@redhat.com/","msgid":"<20221111025309.188226-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T02:53:09","name":"configure: Implement --enable-host-bind-now","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111025309.188226-1-polacek@redhat.com/mbox/"},{"id":18469,"url":"https://patchwork.plctlab.org/api/1.2/patches/18469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-11-11T05:21:42","name":"[v2] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111052141.29815-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":18470,"url":"https://patchwork.plctlab.org/api/1.2/patches/18470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053043.563832-1-jwakely@redhat.com/","msgid":"<20221111053043.563832-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:43","name":"[committed] libstdc++: Avoid redundant checks in std::use_facet [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053043.563832-1-jwakely@redhat.com/mbox/"},{"id":18471,"url":"https://patchwork.plctlab.org/api/1.2/patches/18471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053054.563891-1-jwakely@redhat.com/","msgid":"<20221111053054.563891-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:54","name":"[committed] libstdc++: Fix test that uses C++17 variable template in C++14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053054.563891-1-jwakely@redhat.com/mbox/"},{"id":18472,"url":"https://patchwork.plctlab.org/api/1.2/patches/18472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053059.563909-1-jwakely@redhat.com/","msgid":"<20221111053059.563909-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:30:59","name":"[committed] libstdc++: Add missing definition for in C++14 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053059.563909-1-jwakely@redhat.com/mbox/"},{"id":18473,"url":"https://patchwork.plctlab.org/api/1.2/patches/18473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053108.563931-1-jwakely@redhat.com/","msgid":"<20221111053108.563931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T05:31:08","name":"[committed] libstdc++: Fix tests with non-const operator==","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111053108.563931-1-jwakely@redhat.com/mbox/"},{"id":18522,"url":"https://patchwork.plctlab.org/api/1.2/patches/18522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y238ewF+UgXC2kFk@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T07:40:43","name":"c++: Implement C++23 P2589R1 - - static operator[]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y238ewF+UgXC2kFk@tucnak/mbox/"},{"id":18524,"url":"https://patchwork.plctlab.org/api/1.2/patches/18524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y239B6R5TVWj2/jM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T07:43:03","name":"c++: Implement CWG 2654 - Un-deprecation of compound volatile assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y239B6R5TVWj2/jM@tucnak/mbox/"},{"id":18537,"url":"https://patchwork.plctlab.org/api/1.2/patches/18537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111082532.24898-1-guojiufu@linux.ibm.com/","msgid":"<20221111082532.24898-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-11T08:25:32","name":"Using sub-scalars mode to move struct block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111082532.24898-1-guojiufu@linux.ibm.com/mbox/"},{"id":18554,"url":"https://patchwork.plctlab.org/api/1.2/patches/18554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24NZRBs5H9In4Cr@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T08:52:53","name":"range-op, v2: Implement floating point multiplication fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24NZRBs5H9In4Cr@tucnak/mbox/"},{"id":18584,"url":"https://patchwork.plctlab.org/api/1.2/patches/18584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111090838.7194-1-lili.cui@intel.com/","msgid":"<20221111090838.7194-1-lili.cui@intel.com>","list_archive_url":null,"date":"2022-11-11T09:08:38","name":"x86: Enable 256 move by pieces for ALDERLAKE and AVX2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111090838.7194-1-lili.cui@intel.com/mbox/"},{"id":18585,"url":"https://patchwork.plctlab.org/api/1.2/patches/18585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24RVgktf3A5X5Di@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T09:09:42","name":"range-op: Implement floating point division fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24RVgktf3A5X5Di@tucnak/mbox/"},{"id":18636,"url":"https://patchwork.plctlab.org/api/1.2/patches/18636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24df+rg4zNzHGKK@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T10:01:35","name":"range-op: Cleanup floating point multiplication and division fold_range [PR107569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24df+rg4zNzHGKK@tucnak/mbox/"},{"id":18683,"url":"https://patchwork.plctlab.org/api/1.2/patches/18683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24wszWBpJVRv1ma@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-11T11:23:31","name":"libstdc++: Set active union member in constexpr std::string [PR103295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y24wszWBpJVRv1ma@Thaum.localdomain/mbox/"},{"id":18700,"url":"https://patchwork.plctlab.org/api/1.2/patches/18700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2426uaT5d2Zc7M9@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T11:50:02","name":"range-op: Implement op[12]_range operators for {PLUS,MINUS,MULT,RDIV}_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2426uaT5d2Zc7M9@tucnak/mbox/"},{"id":18708,"url":"https://patchwork.plctlab.org/api/1.2/patches/18708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com/","msgid":"<57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T11:58:04","name":"[GCC] aarch64: Add support for Cortex-A715 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57730a7d-36bf-4bb5-8dca-12a453f9e969@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18721,"url":"https://patchwork.plctlab.org/api/1.2/patches/18721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com/","msgid":"<274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T12:11:29","name":"[GCC] aarch64: Add support for Cortex-X1C CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/274fcfd3-34cd-452e-9785-0810e677569c@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18725,"url":"https://patchwork.plctlab.org/api/1.2/patches/18725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz/","msgid":"<161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz>","list_archive_url":null,"date":"2022-11-11T12:33:51","name":"[(pushed)] sphinx: stop using parallel mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/161b50ae-626e-4e34-e3e8-d00cc4c29e14@suse.cz/mbox/"},{"id":18729,"url":"https://patchwork.plctlab.org/api/1.2/patches/18729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111130221.541603-1-oriachiuan@gmail.com/","msgid":"<20221111130221.541603-1-oriachiuan@gmail.com>","list_archive_url":null,"date":"2022-11-11T13:02:21","name":"fix small const data for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111130221.541603-1-oriachiuan@gmail.com/mbox/"},{"id":18738,"url":"https://patchwork.plctlab.org/api/1.2/patches/18738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz/","msgid":"<15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz>","list_archive_url":null,"date":"2022-11-11T13:27:21","name":"[(pushed)] jit: doc: Use shared Indices and tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15f3ae52-5c7b-c49e-fe92-2152fcc1359c@suse.cz/mbox/"},{"id":18739,"url":"https://patchwork.plctlab.org/api/1.2/patches/18739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111133112.85A4A13273@imap2.suse-dmz.suse.de/","msgid":"<20221111133112.85A4A13273@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-11T13:31:12","name":"tree-optimization/107618 - enhance copy propagation of constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111133112.85A4A13273@imap2.suse-dmz.suse.de/mbox/"},{"id":18740,"url":"https://patchwork.plctlab.org/api/1.2/patches/18740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25QhrM0bMcTmpAn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:39:18","name":"[0/8] middle-end: Ensure at_stmt is defined before an early exit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25QhrM0bMcTmpAn@e124511.cambridge.arm.com/mbox/"},{"id":18742,"url":"https://patchwork.plctlab.org/api/1.2/patches/18742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25SMeZZryZD/ZSN@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:46:25","name":"[2/8] middle-end: Remove prototype for number_of_iterations_popcount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25SMeZZryZD/ZSN@e124511.cambridge.arm.com/mbox/"},{"id":18741,"url":"https://patchwork.plctlab.org/api/1.2/patches/18741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26247edc-2f04-844e-f8ca-87892632377b@suse.cz/","msgid":"<26247edc-2f04-844e-f8ca-87892632377b@suse.cz>","list_archive_url":null,"date":"2022-11-11T13:47:01","name":"doc: Ada: include Indices and Tables in manuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26247edc-2f04-844e-f8ca-87892632377b@suse.cz/mbox/"},{"id":18778,"url":"https://patchwork.plctlab.org/api/1.2/patches/18778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25TqHuEvlEQEF6Q@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T13:52:40","name":"[3/8] middle-end: Refactor number_of_iterations_popcount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y25TqHuEvlEQEF6Q@e124511.cambridge.arm.com/mbox/"},{"id":18744,"url":"https://patchwork.plctlab.org/api/1.2/patches/18744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-1-aldyh@redhat.com/","msgid":"<20221111135318.235387-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:14","name":"[COMMITTED,range-ops] Add tree code to range_operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-1-aldyh@redhat.com/mbox/"},{"id":18745,"url":"https://patchwork.plctlab.org/api/1.2/patches/18745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-2-aldyh@redhat.com/","msgid":"<20221111135318.235387-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:15","name":"[COMMITTED,range-ops] Use existing tree code for *DIV_EXPR entries.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-2-aldyh@redhat.com/mbox/"},{"id":18743,"url":"https://patchwork.plctlab.org/api/1.2/patches/18743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-3-aldyh@redhat.com/","msgid":"<20221111135318.235387-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:16","name":"[COMMITTED,range-ops] Update known bitmasks using CCP for all operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-3-aldyh@redhat.com/mbox/"},{"id":18746,"url":"https://patchwork.plctlab.org/api/1.2/patches/18746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-4-aldyh@redhat.com/","msgid":"<20221111135318.235387-4-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:17","name":"[COMMITTED,range-ops] Avoid unnecessary intersection in update_known_bitmask.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-4-aldyh@redhat.com/mbox/"},{"id":18751,"url":"https://patchwork.plctlab.org/api/1.2/patches/18751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-5-aldyh@redhat.com/","msgid":"<20221111135318.235387-5-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T13:53:18","name":"[COMMITTED,range-ops] Remove specialized fold_range methods for various operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111135318.235387-5-aldyh@redhat.com/mbox/"},{"id":18846,"url":"https://patchwork.plctlab.org/api/1.2/patches/18846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FD8B866FE4B8058A80B483009@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:22:16","name":"libatomic: Add support for LSE and LSE2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FD8B866FE4B8058A80B483009@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":18851,"url":"https://patchwork.plctlab.org/api/1.2/patches/18851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111143614.8F25313357@imap2.suse-dmz.suse.de/","msgid":"<20221111143614.8F25313357@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-11T14:36:14","name":"tree-optimization/107554 - fix ICE in stlen optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111143614.8F25313357@imap2.suse-dmz.suse.de/mbox/"},{"id":18859,"url":"https://patchwork.plctlab.org/api/1.2/patches/18859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16561-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:44:55","name":"[i386] : Update ix86_can_change_mode_class target hook to accept QImode conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16561-tamar@arm.com/mbox/"},{"id":18856,"url":"https://patchwork.plctlab.org/api/1.2/patches/18856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16562-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:45:42","name":"AArch64 Fix vector re-interpretation between partial SIMD modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16562-tamar@arm.com/mbox/"},{"id":18862,"url":"https://patchwork.plctlab.org/api/1.2/patches/18862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982C07FA68CA1BAF8B6C10883009@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T14:48:24","name":"AArch64: Add support for -mdirect-extern-access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982C07FA68CA1BAF8B6C10883009@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":18879,"url":"https://patchwork.plctlab.org/api/1.2/patches/18879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com/","msgid":"<8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2022-11-11T15:08:04","name":"[GCC] aarch64: Add support for Cortex-X3 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8996c099-7c59-494b-a517-ee52ff8d54d1@AZ-NEU-EX04.Arm.com/mbox/"},{"id":18881,"url":"https://patchwork.plctlab.org/api/1.2/patches/18881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com/","msgid":"<853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com>","list_archive_url":null,"date":"2022-11-11T15:13:01","name":"[wwwdocs] projects/gomp: TR11 + GCC13 update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/853627e4-b2a4-1c50-9d91-cdbb8396cca0@siemens.com/mbox/"},{"id":18898,"url":"https://patchwork.plctlab.org/api/1.2/patches/18898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com/","msgid":"<3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com>","list_archive_url":null,"date":"2022-11-11T16:17:17","name":"[COMMITTED] process transitive inferred ranges in pre_fold_stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c68cb87-a088-85a0-0379-6aa893e36796@redhat.com/mbox/"},{"id":18901,"url":"https://patchwork.plctlab.org/api/1.2/patches/18901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfipsbte.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:19:57","name":"Handle epilogues that contain jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsfipsbte.fsf@arm.com/mbox/"},{"id":18903,"url":"https://patchwork.plctlab.org/api/1.2/patches/18903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt8xsbrl.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:21:02","name":"Allow prologues and epilogues to be inserted later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt8xsbrl.fsf@arm.com/mbox/"},{"id":18905,"url":"https://patchwork.plctlab.org/api/1.2/patches/18905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z5sbpy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:22:01","name":"Add a target hook for sibcall epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z5sbpy.fsf@arm.com/mbox/"},{"id":18907,"url":"https://patchwork.plctlab.org/api/1.2/patches/18907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpdsbev.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T16:28:40","name":"Add a new target hook: TARGET_START_CALL_ARGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpdsbev.fsf@arm.com/mbox/"},{"id":18921,"url":"https://patchwork.plctlab.org/api/1.2/patches/18921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26BNiMCgUMaOpW5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:07:02","name":"c++: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26BNiMCgUMaOpW5@tucnak/mbox/"},{"id":18927,"url":"https://patchwork.plctlab.org/api/1.2/patches/18927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yfls8j1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:30:58","name":"Allow targets to add USEs to asms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5yfls8j1.fsf@arm.com/mbox/"},{"id":18928,"url":"https://patchwork.plctlab.org/api/1.2/patches/18928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcxqtwt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:32:02","name":"aarch64: Use SVE'\''s RDVL instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcxqtwt.fsf@arm.com/mbox/"},{"id":18932,"url":"https://patchwork.plctlab.org/api/1.2/patches/18932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af40d679-cf52-f422-2b4f-9e6306c8508e@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T17:39:55","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af40d679-cf52-f422-2b4f-9e6306c8508e@arm.com/mbox/"},{"id":18933,"url":"https://patchwork.plctlab.org/api/1.2/patches/18933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com/","msgid":"<212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com>","list_archive_url":null,"date":"2022-11-11T17:40:55","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212ceca7-21f7-7d99-9543-9e39d9056aba@arm.com/mbox/"},{"id":18934,"url":"https://patchwork.plctlab.org/api/1.2/patches/18934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111174424.686786-1-jwakely@redhat.com/","msgid":"<20221111174424.686786-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-11T17:44:24","name":"[committed] libstdc++: Fix wstring conversions in filesystem::path [PR95048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111174424.686786-1-jwakely@redhat.com/mbox/"},{"id":18937,"url":"https://patchwork.plctlab.org/api/1.2/patches/18937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111181147.278546-1-aldyh@redhat.com/","msgid":"<20221111181147.278546-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-11T18:11:47","name":"[range-ops] Add ability to represent open intervals in frange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111181147.278546-1-aldyh@redhat.com/mbox/"},{"id":18967,"url":"https://patchwork.plctlab.org/api/1.2/patches/18967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26XubanUrWdwJZF@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:43:05","name":"[4/8] Modify test, to prevent the next patch breaking it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26XubanUrWdwJZF@e124511.cambridge.arm.com/mbox/"},{"id":18968,"url":"https://patchwork.plctlab.org/api/1.2/patches/18968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111184759.2531849-1-ppalka@redhat.com/","msgid":"<20221111184759.2531849-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-11T18:47:59","name":"c++: init_priority and SUPPORTS_INIT_PRIORITY [PR107638]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111184759.2531849-1-ppalka@redhat.com/mbox/"},{"id":18973,"url":"https://patchwork.plctlab.org/api/1.2/patches/18973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26ZZNEHkjv+eR+p@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:50:12","name":"[5/8] middle-end: Add cltz_complement idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26ZZNEHkjv+eR+p@e124511.cambridge.arm.com/mbox/"},{"id":18977,"url":"https://patchwork.plctlab.org/api/1.2/patches/18977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26aTm8CDN6Jockb@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T18:54:06","name":"[6/8] docs: Add popcount, clz and ctz target attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26aTm8CDN6Jockb@e124511.cambridge.arm.com/mbox/"},{"id":18978,"url":"https://patchwork.plctlab.org/api/1.2/patches/18978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26b9g+LgJPnRItn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T19:01:10","name":"[7/8] middle-end: Add c[lt]z idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26b9g+LgJPnRItn@e124511.cambridge.arm.com/mbox/"},{"id":18979,"url":"https://patchwork.plctlab.org/api/1.2/patches/18979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26dZqWmy8qJdpjn@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-11T19:07:18","name":"[8/8] middle-end: Expand comment for tree_niter_desc.max","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y26dZqWmy8qJdpjn@e124511.cambridge.arm.com/mbox/"},{"id":18981,"url":"https://patchwork.plctlab.org/api/1.2/patches/18981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111194356.3922768-1-jcmvbkbc@gmail.com/","msgid":"<20221111194356.3922768-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-11T19:43:56","name":"gcc: m68k: fix PR target/107645","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111194356.3922768-1-jcmvbkbc@gmail.com/mbox/"},{"id":18982,"url":"https://patchwork.plctlab.org/api/1.2/patches/18982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com/","msgid":"<914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com>","list_archive_url":null,"date":"2022-11-11T19:53:24","name":"[COMMITTED] PR tree-optimization/107523 - Don'\''t add dependencies in update_stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/914466c0-8b44-bee7-20b9-fe8d856308d7@redhat.com/mbox/"},{"id":18989,"url":"https://patchwork.plctlab.org/api/1.2/patches/18989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111202226.103649-1-polacek@redhat.com/","msgid":"<20221111202226.103649-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-11T20:22:26","name":"c++: Disable -Wdangling-reference when initing T&","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111202226.103649-1-polacek@redhat.com/mbox/"},{"id":18993,"url":"https://patchwork.plctlab.org/api/1.2/patches/18993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211236.2707086-1-dmalcolm@redhat.com/","msgid":"<20221111211236.2707086-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:12:36","name":"[committed] analyzer: new warning: -Wanalyzer-infinite-recursion [PR106147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211236.2707086-1-dmalcolm@redhat.com/mbox/"},{"id":18994,"url":"https://patchwork.plctlab.org/api/1.2/patches/18994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211251.2707146-1-dmalcolm@redhat.com/","msgid":"<20221111211251.2707146-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:12:51","name":"[committed] analyzer: split out checker_event classes to their own header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111211251.2707146-1-dmalcolm@redhat.com/mbox/"},{"id":19003,"url":"https://patchwork.plctlab.org/api/1.2/patches/19003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111215421.2709259-1-dmalcolm@redhat.com/","msgid":"<20221111215421.2709259-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-11T21:54:21","name":"[committed] analyzer: more state machine documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221111215421.2709259-1-dmalcolm@redhat.com/mbox/"},{"id":19066,"url":"https://patchwork.plctlab.org/api/1.2/patches/19066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014353.810822-1-jwakely@redhat.com/","msgid":"<20221112014353.810822-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-12T01:43:53","name":"[committed] libstdc++: Define INSTANTIATE_FACET_ACCESSORS macro in compat source [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014353.810822-1-jwakely@redhat.com/mbox/"},{"id":19068,"url":"https://patchwork.plctlab.org/api/1.2/patches/19068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014433.814465-1-jwakely@redhat.com/","msgid":"<20221112014433.814465-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-12T01:44:33","name":"[committed] libstdc++: Simplify build targets for debug library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112014433.814465-1-jwakely@redhat.com/mbox/"},{"id":19067,"url":"https://patchwork.plctlab.org/api/1.2/patches/19067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8nlkkth.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:44:58","name":"[01/12] ipa: IPA-SRA split detection simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8nlkkth.fsf@suse.cz/mbox/"},{"id":19069,"url":"https://patchwork.plctlab.org/api/1.2/patches/19069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6tu35kksn.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:45:28","name":"[02/12] ipa-cp: Do not consider useless aggregate constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6tu35kksn.fsf@suse.cz/mbox/"},{"id":19070,"url":"https://patchwork.plctlab.org/api/1.2/patches/19070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfipkksb.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:45:40","name":"[03/12] ipa-cp: Write transformation summaries of all functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfipkksb.fsf@suse.cz/mbox/"},{"id":19071,"url":"https://patchwork.plctlab.org/api/1.2/patches/19071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6r0y9kkrq.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:01","name":"[04/12] ipa: Better way of applying both IPA-CP and IPA-SRA (PR 103227)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6r0y9kkrq.fsf@suse.cz/mbox/"},{"id":19073,"url":"https://patchwork.plctlab.org/api/1.2/patches/19073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pmdtkkrk.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:07","name":"[05/12] ipa-sra: Dump edge summaries also for non-candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pmdtkkrk.fsf@suse.cz/mbox/"},{"id":19072,"url":"https://patchwork.plctlab.org/api/1.2/patches/19072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7tdkkqz.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:28","name":"[06/12] ipa-cp: Leave removal of unused parameters to IPA-SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7tdkkqz.fsf@suse.cz/mbox/"},{"id":19075,"url":"https://patchwork.plctlab.org/api/1.2/patches/19075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt8xkkqs.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:35","name":"[07/12] ipa-sra: Treat REFERENCE_TYPES as always dereferencable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt8xkkqs.fsf@suse.cz/mbox/"},{"id":19076,"url":"https://patchwork.plctlab.org/api/1.2/patches/19076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6leohkkq8.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:46:55","name":"[08/12] ipa-sra: Move caller->callee propagation before callee->caller one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6leohkkq8.fsf@suse.cz/mbox/"},{"id":19074,"url":"https://patchwork.plctlab.org/api/1.2/patches/19074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6k041kkpy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:05","name":"[09/12] ipa-sra: Be optimistic about Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6k041kkpy.fsf@suse.cz/mbox/"},{"id":19079,"url":"https://patchwork.plctlab.org/api/1.2/patches/19079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6iljlkkp4.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:35","name":"[10/12] ipa-sra: Forward propagation of sizes which are safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6iljlkkp4.fsf@suse.cz/mbox/"},{"id":19077,"url":"https://patchwork.plctlab.org/api/1.2/patches/19077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6h6z5kkoy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:41","name":"[11/12] ipa-sra: Make scan_expr_access bail out on uninteresting expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6h6z5kkoy.fsf@suse.cz/mbox/"},{"id":19078,"url":"https://patchwork.plctlab.org/api/1.2/patches/19078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fsepkkou.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-12T01:47:45","name":"[12/12] ipa: Avoid looking for IPA-SRA replacements where there are none","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fsepkkou.fsf@suse.cz/mbox/"},{"id":19089,"url":"https://patchwork.plctlab.org/api/1.2/patches/19089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032310.2723361-1-dmalcolm@redhat.com/","msgid":"<20221112032310.2723361-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-12T03:23:10","name":"[v2] c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032310.2723361-1-dmalcolm@redhat.com/mbox/"},{"id":19097,"url":"https://patchwork.plctlab.org/api/1.2/patches/19097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032740.2724091-1-dmalcolm@redhat.com/","msgid":"<20221112032740.2724091-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-12T03:27:40","name":"[v2] analyzer: add warnings relating to sockets [PR106140]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112032740.2724091-1-dmalcolm@redhat.com/mbox/"},{"id":19112,"url":"https://patchwork.plctlab.org/api/1.2/patches/19112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com/","msgid":"<2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com>","list_archive_url":null,"date":"2022-11-12T04:55:30","name":"c: C2x constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2dd14b67-f6f-6b30-46a0-8166a1e515c9@codesourcery.com/mbox/"},{"id":19113,"url":"https://patchwork.plctlab.org/api/1.2/patches/19113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28qK55092Ii3COP@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-12T05:07:55","name":"[7] PowerPC: Add -mcpu=future saturating subtract built-ins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28qK55092Ii3COP@toto.the-meissners.org/mbox/"},{"id":19114,"url":"https://patchwork.plctlab.org/api/1.2/patches/19114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28q48o93tWF223A@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-11-12T05:10:59","name":"[8] PowerPC: Support load/store vector with right length.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y28q48o93tWF223A@toto.the-meissners.org/mbox/"},{"id":19121,"url":"https://patchwork.plctlab.org/api/1.2/patches/19121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112073756.912800-1-chenglulu@loongson.cn/","msgid":"<20221112073756.912800-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-12T07:37:56","name":"[v2] LoongArch: Add prefetch instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112073756.912800-1-chenglulu@loongson.cn/mbox/"},{"id":19130,"url":"https://patchwork.plctlab.org/api/1.2/patches/19130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29dkunenk2cCh7w@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T08:47:14","name":"libstdc++: Fix up to_chars ppc64le _Float128 overloads [PR107636]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29dkunenk2cCh7w@tucnak/mbox/"},{"id":19131,"url":"https://patchwork.plctlab.org/api/1.2/patches/19131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29erF8D0T/tXav0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T08:51:56","name":"[committed] libgomp: Fix up build on mingw [PR107641]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y29erF8D0T/tXav0@tucnak/mbox/"},{"id":19136,"url":"https://patchwork.plctlab.org/api/1.2/patches/19136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112090754.997467-1-chenglulu@loongson.cn/","msgid":"<20221112090754.997467-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-12T09:07:54","name":"[v2] LoongArch: Optimize the implementation of stack check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112090754.997467-1-chenglulu@loongson.cn/mbox/"},{"id":19163,"url":"https://patchwork.plctlab.org/api/1.2/patches/19163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112102859.302600-1-aldyh@redhat.com/","msgid":"<20221112102859.302600-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-12T10:28:59","name":"[COMMITTED,frange] Avoid testing signed zero test for -fno-signed-zeros.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112102859.302600-1-aldyh@redhat.com/mbox/"},{"id":19166,"url":"https://patchwork.plctlab.org/api/1.2/patches/19166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2+CSlWHeS+aGxVZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-12T11:23:54","name":"c++: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y2+CSlWHeS+aGxVZ@tucnak/mbox/"},{"id":19222,"url":"https://patchwork.plctlab.org/api/1.2/patches/19222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112165331.349041-1-polacek@redhat.com/","msgid":"<20221112165331.349041-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-12T16:53:31","name":"c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112165331.349041-1-polacek@redhat.com/mbox/"},{"id":19223,"url":"https://patchwork.plctlab.org/api/1.2/patches/19223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com/","msgid":"<77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com>","list_archive_url":null,"date":"2022-11-12T18:18:18","name":"ginclude: C2x header version macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77db8c82-5856-2c9c-7583-8534e0c92ee4@codesourcery.com/mbox/"},{"id":19224,"url":"https://patchwork.plctlab.org/api/1.2/patches/19224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112183048.389811-1-aldyh@redhat.com/","msgid":"<20221112183048.389811-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-12T18:30:48","name":"[PR68097] Try to avoid recursing for floats in tree_*_nonnegative_warnv_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112183048.389811-1-aldyh@redhat.com/mbox/"},{"id":19241,"url":"https://patchwork.plctlab.org/api/1.2/patches/19241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112210535.45202-1-aldot@gcc.gnu.org/","msgid":"<20221112210535.45202-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T21:05:35","name":"Fortran: Remove unused declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112210535.45202-1-aldot@gcc.gnu.org/mbox/"},{"id":19258,"url":"https://patchwork.plctlab.org/api/1.2/patches/19258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-2-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:37","name":"[1/7] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19259,"url":"https://patchwork.plctlab.org/api/1.2/patches/19259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-3-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:38","name":"[2/7] RISC-V: Generate vt.maskc on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19261,"url":"https://patchwork.plctlab.org/api/1.2/patches/19261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-4-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:39","name":"[3/7] RISC-V: Support noce_try_store_flag_mask as vt.maskc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-4-philipp.tomsich@vrull.eu/mbox/"},{"id":19262,"url":"https://patchwork.plctlab.org/api/1.2/patches/19262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-5-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:40","name":"[4/7] RISC-V: Recognize sign-extract + and cases for XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-5-philipp.tomsich@vrull.eu/mbox/"},{"id":19263,"url":"https://patchwork.plctlab.org/api/1.2/patches/19263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-6-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:41","name":"[5/7] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-6-philipp.tomsich@vrull.eu/mbox/"},{"id":19260,"url":"https://patchwork.plctlab.org/api/1.2/patches/19260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-7-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:42","name":"[6/7] RISC-V: Support immediates in XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-7-philipp.tomsich@vrull.eu/mbox/"},{"id":19264,"url":"https://patchwork.plctlab.org/api/1.2/patches/19264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-8-philipp.tomsich@vrull.eu/","msgid":"<20221112212943.3068249-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-12T21:29:43","name":"[7/7] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112212943.3068249-8-philipp.tomsich@vrull.eu/mbox/"},{"id":19270,"url":"https://patchwork.plctlab.org/api/1.2/patches/19270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-2-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-2-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:39","name":"[1/5] c: Set the locus of the function result decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-2-aldot@gcc.gnu.org/mbox/"},{"id":19268,"url":"https://patchwork.plctlab.org/api/1.2/patches/19268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-3-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-3-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:40","name":"[2/5] c++: Set the locus of the function result decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-3-aldot@gcc.gnu.org/mbox/"},{"id":19271,"url":"https://patchwork.plctlab.org/api/1.2/patches/19271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-4-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-4-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:41","name":"[3/5] Fortran: Narrow return types [PR78798]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-4-aldot@gcc.gnu.org/mbox/"},{"id":19269,"url":"https://patchwork.plctlab.org/api/1.2/patches/19269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-5-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-5-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:42","name":"[4/5] value-range: Add as_string diagnostics helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-5-aldot@gcc.gnu.org/mbox/"},{"id":19272,"url":"https://patchwork.plctlab.org/api/1.2/patches/19272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-6-aldot@gcc.gnu.org/","msgid":"<20221112234543.95441-6-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-12T23:45:43","name":"[5/5] gimple: Add pass to note possible type demotions; IPA pro/demotion; DO NOT MERGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221112234543.95441-6-aldot@gcc.gnu.org/mbox/"},{"id":19281,"url":"https://patchwork.plctlab.org/api/1.2/patches/19281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011445.920711-1-jwakely@redhat.com/","msgid":"<20221113011445.920711-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:14:45","name":"[committed] libstdc++: Allow std::to_chars for 128-bit integers in strict mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011445.920711-1-jwakely@redhat.com/mbox/"},{"id":19282,"url":"https://patchwork.plctlab.org/api/1.2/patches/19282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011454.920766-1-jwakely@redhat.com/","msgid":"<20221113011454.920766-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:14:54","name":"[committed] libstdc++: Implement C++20 [PR104166]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011454.920766-1-jwakely@redhat.com/mbox/"},{"id":19283,"url":"https://patchwork.plctlab.org/api/1.2/patches/19283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011640.920781-1-jwakely@redhat.com/","msgid":"<20221113011640.920781-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-13T01:16:40","name":"[committed] libstdc++: Add C++20 clocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113011640.920781-1-jwakely@redhat.com/mbox/"},{"id":19311,"url":"https://patchwork.plctlab.org/api/1.2/patches/19311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzqjwp.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T09:32:38","name":"builtins: Commonise default handling of nonlocal_goto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzqjwp.fsf@arm.com/mbox/"},{"id":19316,"url":"https://patchwork.plctlab.org/api/1.2/patches/19316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk03zp42v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T09:59:52","name":"[01/16] aarch64: Add arm_streaming(_compatible) attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk03zp42v.fsf@arm.com/mbox/"},{"id":19317,"url":"https://patchwork.plctlab.org/api/1.2/patches/19317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsenp42e.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:09","name":"[02/16] aarch64: Add +sme","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsenp42e.fsf@arm.com/mbox/"},{"id":19318,"url":"https://patchwork.plctlab.org/api/1.2/patches/19318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpbp41y.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:25","name":"[03/16] aarch64: Distinguish streaming-compatible AdvSIMD insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkpbp41y.fsf@arm.com/mbox/"},{"id":19319,"url":"https://patchwork.plctlab.org/api/1.2/patches/19319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzp41i.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:41","name":"[04/16] aarch64: Mark relevant SVE instructions as non-streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7czzp41i.fsf@arm.com/mbox/"},{"id":19323,"url":"https://patchwork.plctlab.org/api/1.2/patches/19323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35anp411.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:00:58","name":"[05/16] aarch64: Switch PSTATE.SM around calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt35anp411.fsf@arm.com/mbox/"},{"id":19327,"url":"https://patchwork.plctlab.org/api/1.2/patches/19327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1sfnpg7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:12","name":"[06/16] aarch64: Add support for SME ZA attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1sfnpg7.fsf@arm.com/mbox/"},{"id":19322,"url":"https://patchwork.plctlab.org/api/1.2/patches/19322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpttu33npft.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:26","name":"[07/16] aarch64: Add a register class for w12-w15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpttu33npft.fsf@arm.com/mbox/"},{"id":19321,"url":"https://patchwork.plctlab.org/api/1.2/patches/19321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmdrnpfh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:38","name":"[08/16] aarch64: Add a VNx1TI mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmdrnpfh.fsf@arm.com/mbox/"},{"id":19329,"url":"https://patchwork.plctlab.org/api/1.2/patches/19329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleofnpf2.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:01:53","name":"[09/16] aarch64: Make AARCH64_FL_SVE requirements explicit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleofnpf2.fsf@arm.com/mbox/"},{"id":19325,"url":"https://patchwork.plctlab.org/api/1.2/patches/19325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z3npen.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:08","name":"[10/16] aarch64: Generalise unspec_based_function_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6z3npen.fsf@arm.com/mbox/"},{"id":19328,"url":"https://patchwork.plctlab.org/api/1.2/patches/19328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz9rnpe9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:22","name":"[11/16] aarch64: Generalise _m rules for SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz9rnpe9.fsf@arm.com/mbox/"},{"id":19331,"url":"https://patchwork.plctlab.org/api/1.2/patches/19331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rkfnpdx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:34","name":"[12/16] aarch64: Tweaks to function_resolver::resolve_to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rkfnpdx.fsf@arm.com/mbox/"},{"id":19332,"url":"https://patchwork.plctlab.org/api/1.2/patches/19332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jv3npd8.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:02:59","name":"[13/16] aarch64: Add support for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jv3npd8.fsf@arm.com/mbox/"},{"id":19324,"url":"https://patchwork.plctlab.org/api/1.2/patches/19324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcvmasc.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:15","name":"[14/16] aarch64: Add support for arm_locally_streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcvmasc.fsf@arm.com/mbox/"},{"id":19330,"url":"https://patchwork.plctlab.org/api/1.2/patches/19330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8njmarz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:28","name":"[15/16] aarch64: Enforce inlining restrictions for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8njmarz.fsf@arm.com/mbox/"},{"id":19326,"url":"https://patchwork.plctlab.org/api/1.2/patches/19326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0y7mari.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T10:03:45","name":"[16/16] aarch64: Update sibcall handling for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0y7mari.fsf@arm.com/mbox/"},{"id":19350,"url":"https://patchwork.plctlab.org/api/1.2/patches/19350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYaMLHMM3JCf0W@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:43:36","name":"c++, v2: Implement CWG 2654 - Un-deprecation of compound volatile assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYaMLHMM3JCf0W@tucnak/mbox/"},{"id":19351,"url":"https://patchwork.plctlab.org/api/1.2/patches/19351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYxNPWpM23FCtj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:45:08","name":"c++, v2: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DYxNPWpM23FCtj@tucnak/mbox/"},{"id":19352,"url":"https://patchwork.plctlab.org/api/1.2/patches/19352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DZ8MaCk7KWlPoa@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T11:50:08","name":"c++, v2: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3DZ8MaCk7KWlPoa@tucnak/mbox/"},{"id":19365,"url":"https://patchwork.plctlab.org/api/1.2/patches/19365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113150912.1292332-1-christoph.muellner@vrull.eu/","msgid":"<20221113150912.1292332-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:09:12","name":"[RFC] ipa-guarded-deref: Add new pass to dereference function pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113150912.1292332-1-christoph.muellner@vrull.eu/mbox/"},{"id":19368,"url":"https://patchwork.plctlab.org/api/1.2/patches/19368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db31cb32-a2d1-8f75-cc00-cbb679940dad@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-13T15:36:16","name":"[(pushed)] configure: always set SPHINX_BUILD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db31cb32-a2d1-8f75-cc00-cbb679940dad@suse.cz/mbox/"},{"id":19369,"url":"https://patchwork.plctlab.org/api/1.2/patches/19369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113153741.1305175-1-christoph.muellner@vrull.eu/","msgid":"<20221113153741.1305175-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:37:41","name":"[RFC] ipa-cp: Speculatively call specialized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113153741.1305175-1-christoph.muellner@vrull.eu/mbox/"},{"id":19370,"url":"https://patchwork.plctlab.org/api/1.2/patches/19370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz/","msgid":"<811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz>","list_archive_url":null,"date":"2022-11-13T15:41:04","name":"[(pushed)] sphinx: include todolist only if INCLUDE_TODO env. set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/811ea56c-0869-e591-d9b0-2bf25ca23606@suse.cz/mbox/"},{"id":19371,"url":"https://patchwork.plctlab.org/api/1.2/patches/19371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113154320.3083043-1-philipp.tomsich@vrull.eu/","msgid":"<20221113154320.3083043-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T15:43:20","name":"doc: Update Jeff Law'\''s email-address in contrib.rst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113154320.3083043-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19379,"url":"https://patchwork.plctlab.org/api/1.2/patches/19379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113160215.3084008-1-philipp.tomsich@vrull.eu/","msgid":"<20221113160215.3084008-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T16:02:15","name":"aarch64: Add support for Ampere-1A (-mcpu=ampere1a) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113160215.3084008-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19383,"url":"https://patchwork.plctlab.org/api/1.2/patches/19383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3En3SZJqYryOI++@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-13T17:22:37","name":"[committed] hppa: Skip guality tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3En3SZJqYryOI++@mx3210.localdomain/mbox/"},{"id":19386,"url":"https://patchwork.plctlab.org/api/1.2/patches/19386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113180527.2907744-1-arsen@aarsen.me/","msgid":"<20221113180527.2907744-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-11-13T18:05:27","name":"libstdc++: Fix python/ not making install directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113180527.2907744-1-arsen@aarsen.me/mbox/"},{"id":19432,"url":"https://patchwork.plctlab.org/api/1.2/patches/19432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113200553.440728-1-aldyh@redhat.com/","msgid":"<20221113200553.440728-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-13T20:05:53","name":"[range-ops] Implement sqrt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113200553.440728-1-aldyh@redhat.com/mbox/"},{"id":19444,"url":"https://patchwork.plctlab.org/api/1.2/patches/19444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204119.4061447-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204119.4061447-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:41:18","name":"RISC-V: Use .p2align for code-alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204119.4061447-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19445,"url":"https://patchwork.plctlab.org/api/1.2/patches/19445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204139.4061479-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204139.4061479-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:41:39","name":"RISC-V: Zihintpause: add __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204139.4061479-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19446,"url":"https://patchwork.plctlab.org/api/1.2/patches/19446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-2-philipp.tomsich@vrull.eu/","msgid":"<20221113204824.4062042-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:23","name":"[v2,1/2] RISC-V: Add basic support for the Ventana-VT1 core","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19448,"url":"https://patchwork.plctlab.org/api/1.2/patches/19448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-3-philipp.tomsich@vrull.eu/","msgid":"<20221113204824.4062042-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:24","name":"[v2,2/2] RISC-V: Add instruction fusion (for ventana-vt1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204824.4062042-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19447,"url":"https://patchwork.plctlab.org/api/1.2/patches/19447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204840.4062092-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204840.4062092-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:40","name":"RISC-V: Split \"(a & (1UL << bitno)) ? 0 : -1\" to bext + addi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204840.4062092-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19450,"url":"https://patchwork.plctlab.org/api/1.2/patches/19450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204849.4062129-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204849.4062129-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:49","name":"RISC-V: Split \"(a & (1UL << bitno)) ? 0 : 1\" to bext + xori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204849.4062129-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19449,"url":"https://patchwork.plctlab.org/api/1.2/patches/19449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204858.4062163-1-philipp.tomsich@vrull.eu/","msgid":"<20221113204858.4062163-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T20:48:58","name":"RISC-V: Handle \"(a & twobits) == singlebit\" in branches using Zbs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113204858.4062163-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19451,"url":"https://patchwork.plctlab.org/api/1.2/patches/19451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Fa4u7MiqH3OS/C@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-13T21:00:18","name":"aarch64: Add bfloat16_t support for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Fa4u7MiqH3OS/C@tucnak/mbox/"},{"id":19452,"url":"https://patchwork.plctlab.org/api/1.2/patches/19452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc0f818a-1f14-5519-3b3b-3d8141ca96dd@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-13T21:10:34","name":"sphinx: more build fixing if sphinx-build is missing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc0f818a-1f14-5519-3b3b-3d8141ca96dd@redhat.com/mbox/"},{"id":19453,"url":"https://patchwork.plctlab.org/api/1.2/patches/19453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-2-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:22","name":"[v2,1/8] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-2-philipp.tomsich@vrull.eu/mbox/"},{"id":19454,"url":"https://patchwork.plctlab.org/api/1.2/patches/19454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-3-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:23","name":"[v2,2/8] RISC-V: Generate vt.maskc on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-3-philipp.tomsich@vrull.eu/mbox/"},{"id":19457,"url":"https://patchwork.plctlab.org/api/1.2/patches/19457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-4-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:24","name":"[v2,3/8] RISC-V: Support noce_try_store_flag_mask as vt.maskc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-4-philipp.tomsich@vrull.eu/mbox/"},{"id":19455,"url":"https://patchwork.plctlab.org/api/1.2/patches/19455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-5-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:25","name":"[v2,4/8] RISC-V: Recognize sign-extract + and cases for XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-5-philipp.tomsich@vrull.eu/mbox/"},{"id":19458,"url":"https://patchwork.plctlab.org/api/1.2/patches/19458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-6-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:26","name":"[v2,5/8] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-6-philipp.tomsich@vrull.eu/mbox/"},{"id":19456,"url":"https://patchwork.plctlab.org/api/1.2/patches/19456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-7-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:27","name":"[v2,6/8] RISC-V: Support immediates in XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-7-philipp.tomsich@vrull.eu/mbox/"},{"id":19460,"url":"https://patchwork.plctlab.org/api/1.2/patches/19460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-8-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:28","name":"[v2,7/8] RISC-V: Ventana-VT1 supports XVentanaCondOps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-8-philipp.tomsich@vrull.eu/mbox/"},{"id":19459,"url":"https://patchwork.plctlab.org/api/1.2/patches/19459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-9-philipp.tomsich@vrull.eu/","msgid":"<20221113212030.4078815-9-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:20:29","name":"[v2,8/8] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113212030.4078815-9-philipp.tomsich@vrull.eu/mbox/"},{"id":19461,"url":"https://patchwork.plctlab.org/api/1.2/patches/19461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-2-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:30","name":"[1/7] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-2-christoph.muellner@vrull.eu/mbox/"},{"id":19462,"url":"https://patchwork.plctlab.org/api/1.2/patches/19462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-3-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:31","name":"[2/7] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-3-christoph.muellner@vrull.eu/mbox/"},{"id":19465,"url":"https://patchwork.plctlab.org/api/1.2/patches/19465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-4-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:32","name":"[3/7] riscv: thead: Add support for XTheadBa and XTheadBs ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-4-christoph.muellner@vrull.eu/mbox/"},{"id":19463,"url":"https://patchwork.plctlab.org/api/1.2/patches/19463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-5-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:33","name":"[4/7] riscv: thead: Add support for XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-5-christoph.muellner@vrull.eu/mbox/"},{"id":19464,"url":"https://patchwork.plctlab.org/api/1.2/patches/19464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-6-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:34","name":"[5/7] riscv: thead: Add support for XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-6-christoph.muellner@vrull.eu/mbox/"},{"id":19467,"url":"https://patchwork.plctlab.org/api/1.2/patches/19467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-7-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:35","name":"[6/7] riscv: thead: Add support for XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-7-christoph.muellner@vrull.eu/mbox/"},{"id":19466,"url":"https://patchwork.plctlab.org/api/1.2/patches/19466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-8-christoph.muellner@vrull.eu/","msgid":"<20221113214636.2747737-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T21:46:36","name":"[7/7] riscv: Add basic extension support for XTheadFmv and XTheadInt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113214636.2747737-8-christoph.muellner@vrull.eu/mbox/"},{"id":19469,"url":"https://patchwork.plctlab.org/api/1.2/patches/19469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113220057.2753718-1-christoph.muellner@vrull.eu/","msgid":"<20221113220057.2753718-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T22:00:57","name":"[RFC] riscv: thead: Add support for XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113220057.2753718-1-christoph.muellner@vrull.eu/mbox/"},{"id":19471,"url":"https://patchwork.plctlab.org/api/1.2/patches/19471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230309.2819841-1-dmalcolm@redhat.com/","msgid":"<20221113230309.2819841-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-13T23:03:09","name":"[committed] analyzer: new warning: -Wanalyzer-tainted-assertion [PR106235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230309.2819841-1-dmalcolm@redhat.com/mbox/"},{"id":19474,"url":"https://patchwork.plctlab.org/api/1.2/patches/19474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-2-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:15","name":"[1/7] riscv: bitmanip: add orc.b as an unspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-2-christoph.muellner@vrull.eu/mbox/"},{"id":19475,"url":"https://patchwork.plctlab.org/api/1.2/patches/19475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-3-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:16","name":"[2/7] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-3-christoph.muellner@vrull.eu/mbox/"},{"id":19473,"url":"https://patchwork.plctlab.org/api/1.2/patches/19473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-4-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:17","name":"[3/7] riscv: Enable overlap-by-pieces via tune param","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-4-christoph.muellner@vrull.eu/mbox/"},{"id":19476,"url":"https://patchwork.plctlab.org/api/1.2/patches/19476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-5-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:18","name":"[4/7] riscv: Move riscv_block_move_loop to separate file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-5-christoph.muellner@vrull.eu/mbox/"},{"id":19472,"url":"https://patchwork.plctlab.org/api/1.2/patches/19472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-6-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:19","name":"[5/7] riscv: Use by-pieces to do overlapping accesses in block_move_straight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-6-christoph.muellner@vrull.eu/mbox/"},{"id":19477,"url":"https://patchwork.plctlab.org/api/1.2/patches/19477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-7-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:20","name":"[6/7] riscv: Add support for strlen inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-7-christoph.muellner@vrull.eu/mbox/"},{"id":19478,"url":"https://patchwork.plctlab.org/api/1.2/patches/19478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-8-christoph.muellner@vrull.eu/","msgid":"<20221113230521.712693-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-13T23:05:21","name":"[7/7] riscv: Add support for str(n)cmp inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221113230521.712693-8-christoph.muellner@vrull.eu/mbox/"},{"id":19523,"url":"https://patchwork.plctlab.org/api/1.2/patches/19523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff799b68-b3d6-7a97-d203-dfb2a427bb5d@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-14T02:52:58","name":"[(pushed)] gcc-changelog: temporarily disable check_line_start","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff799b68-b3d6-7a97-d203-dfb2a427bb5d@suse.cz/mbox/"},{"id":19542,"url":"https://patchwork.plctlab.org/api/1.2/patches/19542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-1-ppalka@redhat.com/","msgid":"<20221114045047.362745-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:45","name":"[1/3] libstdc++: Implement ranges::contains/contains_subrange from P2302R4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-1-ppalka@redhat.com/mbox/"},{"id":19543,"url":"https://patchwork.plctlab.org/api/1.2/patches/19543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-2-ppalka@redhat.com/","msgid":"<20221114045047.362745-2-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:46","name":"[2/3] libstdc++: Implement ranges::iota from P2440R1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-2-ppalka@redhat.com/mbox/"},{"id":19544,"url":"https://patchwork.plctlab.org/api/1.2/patches/19544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-3-ppalka@redhat.com/","msgid":"<20221114045047.362745-3-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-14T04:50:47","name":"[3/3] libstdc++: Implement ranges::find_last{, _if, _if_not} from P1223R5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114045047.362745-3-ppalka@redhat.com/mbox/"},{"id":19551,"url":"https://patchwork.plctlab.org/api/1.2/patches/19551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114070937.17B8013A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114070937.17B8013A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T07:09:36","name":"restrict gcc.dg/pr107554.c to 64bit platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114070937.17B8013A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19562,"url":"https://patchwork.plctlab.org/api/1.2/patches/19562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hy1ckL3ZluEOSi@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T07:48:37","name":"libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hy1ckL3ZluEOSi@tucnak/mbox/"},{"id":19566,"url":"https://patchwork.plctlab.org/api/1.2/patches/19566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hz0QswGCGclWGu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T07:52:49","name":"i386: Emit 16b atomics inline with -m64 -mcx16 -mavx [PR104688]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Hz0QswGCGclWGu@tucnak/mbox/"},{"id":19663,"url":"https://patchwork.plctlab.org/api/1.2/patches/19663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IaE4OIQGHhvhXv@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T10:36:03","name":"c++: Add testcase for DR 2392","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IaE4OIQGHhvhXv@tucnak/mbox/"},{"id":19669,"url":"https://patchwork.plctlab.org/api/1.2/patches/19669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IbNWSVE+Ydjk4u@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T10:40:53","name":"c++: Allow attributes on concepts - DR 2428","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3IbNWSVE+Ydjk4u@tucnak/mbox/"},{"id":19719,"url":"https://patchwork.plctlab.org/api/1.2/patches/19719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3ImZ/fcwjmMFQyb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T11:28:39","name":"c++: Alignment changes to layout compatibility/common initial sequence - DR2583","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3ImZ/fcwjmMFQyb@tucnak/mbox/"},{"id":19727,"url":"https://patchwork.plctlab.org/api/1.2/patches/19727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Ip4JHD7cg8W8MG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T11:43:28","name":"c++: Add testcase for DR 2604","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Ip4JHD7cg8W8MG@tucnak/mbox/"},{"id":19810,"url":"https://patchwork.plctlab.org/api/1.2/patches/19810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T13:34:57","name":"remove duplicate match.pd patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114133458.7A9F413A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19814,"url":"https://patchwork.plctlab.org/api/1.2/patches/19814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135136.52466-1-poulhies@adacore.com/","msgid":"<20221114135136.52466-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:36","name":"[COMMITTED] ada: Remove gnatcheck reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135136.52466-1-poulhies@adacore.com/mbox/"},{"id":19815,"url":"https://patchwork.plctlab.org/api/1.2/patches/19815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135146.52584-1-poulhies@adacore.com/","msgid":"<20221114135146.52584-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:46","name":"[COMMITTED] ada: Improve location of error messages in instantiations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135146.52584-1-poulhies@adacore.com/mbox/"},{"id":19817,"url":"https://patchwork.plctlab.org/api/1.2/patches/19817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135156.52647-1-poulhies@adacore.com/","msgid":"<20221114135156.52647-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:51:56","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on QNX and RTEMS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135156.52647-1-poulhies@adacore.com/mbox/"},{"id":19818,"url":"https://patchwork.plctlab.org/api/1.2/patches/19818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135202.52712-1-poulhies@adacore.com/","msgid":"<20221114135202.52712-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:02","name":"[COMMITTED] ada: Expand generic formal subprograms with contracts for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135202.52712-1-poulhies@adacore.com/mbox/"},{"id":19823,"url":"https://patchwork.plctlab.org/api/1.2/patches/19823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135208.52775-1-poulhies@adacore.com/","msgid":"<20221114135208.52775-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:08","name":"[COMMITTED] ada: Fix style in code for generic formal subprograms with contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135208.52775-1-poulhies@adacore.com/mbox/"},{"id":19825,"url":"https://patchwork.plctlab.org/api/1.2/patches/19825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135212.52840-1-poulhies@adacore.com/","msgid":"<20221114135212.52840-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:12","name":"[COMMITTED] ada: Adjust locations in aspects on generic formal subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135212.52840-1-poulhies@adacore.com/mbox/"},{"id":19822,"url":"https://patchwork.plctlab.org/api/1.2/patches/19822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135219.52903-1-poulhies@adacore.com/","msgid":"<20221114135219.52903-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:19","name":"[COMMITTED] ada: Fix error on SPARK_Mode on library-level separate body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135219.52903-1-poulhies@adacore.com/mbox/"},{"id":19824,"url":"https://patchwork.plctlab.org/api/1.2/patches/19824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135224.52966-1-poulhies@adacore.com/","msgid":"<20221114135224.52966-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:24","name":"[COMMITTED] ada: Fix non-capturing parentheses handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135224.52966-1-poulhies@adacore.com/mbox/"},{"id":19816,"url":"https://patchwork.plctlab.org/api/1.2/patches/19816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135229.53029-1-poulhies@adacore.com/","msgid":"<20221114135229.53029-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:29","name":"[COMMITTED] ada: Crash on applying '\''Pos to expression of a type derived from a formal type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135229.53029-1-poulhies@adacore.com/mbox/"},{"id":19820,"url":"https://patchwork.plctlab.org/api/1.2/patches/19820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135240.53093-1-poulhies@adacore.com/","msgid":"<20221114135240.53093-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:40","name":"[COMMITTED] ada: hardcfr docs: add optional checkpoints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135240.53093-1-poulhies@adacore.com/mbox/"},{"id":19828,"url":"https://patchwork.plctlab.org/api/1.2/patches/19828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135245.53157-1-poulhies@adacore.com/","msgid":"<20221114135245.53157-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:45","name":"[COMMITTED] ada: Flag unsupported dispatching constructor calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135245.53157-1-poulhies@adacore.com/mbox/"},{"id":19826,"url":"https://patchwork.plctlab.org/api/1.2/patches/19826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135252.53221-1-poulhies@adacore.com/","msgid":"<20221114135252.53221-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:52","name":"[COMMITTED] ada: Remove incorrect comments about initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135252.53221-1-poulhies@adacore.com/mbox/"},{"id":19819,"url":"https://patchwork.plctlab.org/api/1.2/patches/19819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135258.53285-1-poulhies@adacore.com/","msgid":"<20221114135258.53285-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-14T13:52:58","name":"[COMMITTED] ada: Silence CodePeer false positive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135258.53285-1-poulhies@adacore.com/mbox/"},{"id":19821,"url":"https://patchwork.plctlab.org/api/1.2/patches/19821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135324.19352-1-philipp.tomsich@vrull.eu/","msgid":"<20221114135324.19352-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T13:53:24","name":"[v2] aarch64: Add support for Ampere-1A (-mcpu=ampere1a) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114135324.19352-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19830,"url":"https://patchwork.plctlab.org/api/1.2/patches/19830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3JJXGaKji0gKDlV@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-14T13:57:48","name":"libstdc++: Fix up for extended floating point types [PR107649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3JJXGaKji0gKDlV@tucnak/mbox/"},{"id":19836,"url":"https://patchwork.plctlab.org/api/1.2/patches/19836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114144235.20390-1-philipp.tomsich@vrull.eu/","msgid":"<20221114144235.20390-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T14:42:35","name":"GCC13: aarch64: Document new cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114144235.20390-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19849,"url":"https://patchwork.plctlab.org/api/1.2/patches/19849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114145348.20652-1-philipp.tomsich@vrull.eu/","msgid":"<20221114145348.20652-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-14T14:53:48","name":"[v2] gcc-13: aarch64: Document new cores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114145348.20652-1-philipp.tomsich@vrull.eu/mbox/"},{"id":19852,"url":"https://patchwork.plctlab.org/api/1.2/patches/19852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668438395-2326-1-git-send-email-apinski@marvell.com/","msgid":"<1668438395-2326-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-14T15:06:35","name":"[COMMITTED] Fix some @opindex with - in the front","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668438395-2326-1-git-send-email-apinski@marvell.com/mbox/"},{"id":19855,"url":"https://patchwork.plctlab.org/api/1.2/patches/19855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668439517-2899-1-git-send-email-apinski@marvell.com/","msgid":"<1668439517-2899-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-14T15:25:17","name":"[COMMITTED] Fix @opindex for m80387","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668439517-2899-1-git-send-email-apinski@marvell.com/mbox/"},{"id":19859,"url":"https://patchwork.plctlab.org/api/1.2/patches/19859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-2-krebbel@linux.ibm.com/","msgid":"<20221114152657.43632-2-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2022-11-14T15:26:56","name":"[1/2] New reg note REG_CFA_NORESTORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-2-krebbel@linux.ibm.com/mbox/"},{"id":19858,"url":"https://patchwork.plctlab.org/api/1.2/patches/19858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-3-krebbel@linux.ibm.com/","msgid":"<20221114152657.43632-3-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2022-11-14T15:26:57","name":"[2/2] IBM zSystems: Save argument registers to the stack -mpreserve-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114152657.43632-3-krebbel@linux.ibm.com/mbox/"},{"id":19868,"url":"https://patchwork.plctlab.org/api/1.2/patches/19868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM6PR12MB4795D38A7C29749BBDEABB98E3059@DM6PR12MB4795.namprd12.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T16:18:43","name":"[X86_64] Separate znver4 insn reservations from older znvers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DM6PR12MB4795D38A7C29749BBDEABB98E3059@DM6PR12MB4795.namprd12.prod.outlook.com/mbox/"},{"id":19876,"url":"https://patchwork.plctlab.org/api/1.2/patches/19876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114162918.1563116-1-jiawei@iscas.ac.cn/","msgid":"<20221114162918.1563116-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-14T16:29:18","name":"RISC-V: Optimal RVV epilogue logic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114162918.1563116-1-jiawei@iscas.ac.cn/mbox/"},{"id":19961,"url":"https://patchwork.plctlab.org/api/1.2/patches/19961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114180832.49DD013A8C@imap2.suse-dmz.suse.de/","msgid":"<20221114180832.49DD013A8C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-14T18:08:31","name":"tree-optimization/107485 - fix non-call exception ICE with inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114180832.49DD013A8C@imap2.suse-dmz.suse.de/mbox/"},{"id":19999,"url":"https://patchwork.plctlab.org/api/1.2/patches/19999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3KO4nPza2D9nJMQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T18:54:26","name":"[wwwdocs] cxx-status: Add C++23 papers from the Nov 2022 Kona WG21 plenary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3KO4nPza2D9nJMQ@redhat.com/mbox/"},{"id":20005,"url":"https://patchwork.plctlab.org/api/1.2/patches/20005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16593-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T19:00:14","name":"[committed] middle-end: Fix can_special_div_by_const doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16593-tamar@arm.com/mbox/"},{"id":20020,"url":"https://patchwork.plctlab.org/api/1.2/patches/20020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16594-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-14T20:08:20","name":"[committed] middle-end: Fix addsub patch removing return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16594-tamar@arm.com/mbox/"},{"id":20049,"url":"https://patchwork.plctlab.org/api/1.2/patches/20049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211141505170.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-14T22:03:56","name":"[committed] ira: Fix `create_insn_allocnos'\'' `outer'\'' parameter documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211141505170.19931@tpp.orcam.me.uk/mbox/"},{"id":20057,"url":"https://patchwork.plctlab.org/api/1.2/patches/20057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114225213.3714883-1-jason@redhat.com/","msgid":"<20221114225213.3714883-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-14T22:52:13","name":"[pushed] c++: only declare satisfied friends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221114225213.3714883-1-jason@redhat.com/mbox/"},{"id":20058,"url":"https://patchwork.plctlab.org/api/1.2/patches/20058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com/","msgid":"<24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com>","list_archive_url":null,"date":"2022-11-14T23:00:09","name":"[committed] wwwdocs: gcc-13: Add release notes for more C23 features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a4e3af-b4ff-7213-1b26-756b1d72c674@codesourcery.com/mbox/"},{"id":20088,"url":"https://patchwork.plctlab.org/api/1.2/patches/20088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142306400.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-14T23:21:41","name":"ira: Remove duplicate `memset'\'' over `full_costs'\'' from `assign_hard_reg'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142306400.19931@tpp.orcam.me.uk/mbox/"},{"id":20107,"url":"https://patchwork.plctlab.org/api/1.2/patches/20107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Lea4Fo/Hl8iFNZ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T00:33:47","name":"[v2] c++: Disable -Wignored-qualifiers for template args [PR107492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Lea4Fo/Hl8iFNZ@redhat.com/mbox/"},{"id":20167,"url":"https://patchwork.plctlab.org/api/1.2/patches/20167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115033559.66827-1-hongyu.wang@intel.com/","msgid":"<20221115033559.66827-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-15T03:35:59","name":"doc: Reword the description of -mrelax-cmpxchg-loop [PR 107676]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115033559.66827-1-hongyu.wang@intel.com/mbox/"},{"id":20172,"url":"https://patchwork.plctlab.org/api/1.2/patches/20172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668486450-9315-1-git-send-email-apinski@marvell.com/","msgid":"<1668486450-9315-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:27:30","name":"Fix @opindex for mcall-aixdesc and mcall-openbsd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668486450-9315-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20181,"url":"https://patchwork.plctlab.org/api/1.2/patches/20181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487081-9637-1-git-send-email-apinski@marvell.com/","msgid":"<1668487081-9637-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:38:01","name":"Remove documentation for MeP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487081-9637-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20182,"url":"https://patchwork.plctlab.org/api/1.2/patches/20182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487461-9942-1-git-send-email-apinski@marvell.com/","msgid":"<1668487461-9942-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T04:44:21","name":"Remove the picoChip documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668487461-9942-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20183,"url":"https://patchwork.plctlab.org/api/1.2/patches/20183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ad110-065e-9414-1312-bff5a0644e97@siemens.com/","msgid":"<927ad110-065e-9414-1312-bff5a0644e97@siemens.com>","list_archive_url":null,"date":"2022-11-15T04:46:15","name":"[v4] OpenMP: Generate SIMD clones for functions with \"declare target\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ad110-065e-9414-1312-bff5a0644e97@siemens.com/mbox/"},{"id":20196,"url":"https://patchwork.plctlab.org/api/1.2/patches/20196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668488508-10524-1-git-send-email-apinski@marvell.com/","msgid":"<1668488508-10524-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-15T05:01:48","name":"Remove Score documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668488508-10524-1-git-send-email-apinski@marvell.com/mbox/"},{"id":20212,"url":"https://patchwork.plctlab.org/api/1.2/patches/20212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115064624.2352237-2-zengxiao@eswincomputing.com/","msgid":"<20221115064624.2352237-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T06:46:24","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115064624.2352237-2-zengxiao@eswincomputing.com/mbox/"},{"id":20213,"url":"https://patchwork.plctlab.org/api/1.2/patches/20213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115065159.2353620-2-zengxiao@eswincomputing.com/","msgid":"<20221115065159.2353620-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T06:51:59","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115065159.2353620-2-zengxiao@eswincomputing.com/mbox/"},{"id":20224,"url":"https://patchwork.plctlab.org/api/1.2/patches/20224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3NAj5CVTklLb8xg@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-15T07:32:31","name":"[committed] c++: Fix a typo in function name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3NAj5CVTklLb8xg@tucnak/mbox/"},{"id":20234,"url":"https://patchwork.plctlab.org/api/1.2/patches/20234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115080925.2354502-2-zengxiao@eswincomputing.com/","msgid":"<20221115080925.2354502-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2022-11-15T08:09:25","name":"[V1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115080925.2354502-2-zengxiao@eswincomputing.com/mbox/"},{"id":20240,"url":"https://patchwork.plctlab.org/api/1.2/patches/20240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-2-jiawei@iscas.ac.cn/","msgid":"<20221115083358.4130952-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T08:33:57","name":"[v2,1/2] RISC-V: Add spill sp adjust check testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-2-jiawei@iscas.ac.cn/mbox/"},{"id":20239,"url":"https://patchwork.plctlab.org/api/1.2/patches/20239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-3-jiawei@iscas.ac.cn/","msgid":"<20221115083358.4130952-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T08:33:58","name":"[v2,2/2] RISC-V: Optimize RVV epilogue logic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115083358.4130952-3-jiawei@iscas.ac.cn/mbox/"},{"id":20292,"url":"https://patchwork.plctlab.org/api/1.2/patches/20292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16595-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T10:33:36","name":"middle-end: replace GET_MODE_WIDER_MODE with GET_MODE_NEXT_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16595-tamar@arm.com/mbox/"},{"id":20329,"url":"https://patchwork.plctlab.org/api/1.2/patches/20329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115113713.1131991-1-jwakely@redhat.com/","msgid":"<20221115113713.1131991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T11:37:13","name":"[committed] libstdc++: Document use of Markdown for Doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115113713.1131991-1-jwakely@redhat.com/mbox/"},{"id":20345,"url":"https://patchwork.plctlab.org/api/1.2/patches/20345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115121345.3650155-1-chenyixuan@iscas.ac.cn/","msgid":"<20221115121345.3650155-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-15T12:13:45","name":"Optimize testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115121345.3650155-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":20352,"url":"https://patchwork.plctlab.org/api/1.2/patches/20352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3OF0UXlqmuibCUZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-15T12:28:01","name":"c++: Fix up calls to static operator() or operator[] [PR107624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3OF0UXlqmuibCUZ@tucnak/mbox/"},{"id":20363,"url":"https://patchwork.plctlab.org/api/1.2/patches/20363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115130328.15413-1-hejinyang@loongson.cn/","msgid":"<20221115130328.15413-1-hejinyang@loongson.cn>","list_archive_url":null,"date":"2022-11-15T13:03:28","name":"LoongArch: Fix atomic_exchange make comparison and may jump out","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115130328.15413-1-hejinyang@loongson.cn/mbox/"},{"id":20369,"url":"https://patchwork.plctlab.org/api/1.2/patches/20369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz/","msgid":"<00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz>","list_archive_url":null,"date":"2022-11-15T13:19:04","name":"[(pushed)] libsanitizer: use git clone --depth 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f99859-ed54-0e2b-3b62-3272f8477429@suse.cz/mbox/"},{"id":20401,"url":"https://patchwork.plctlab.org/api/1.2/patches/20401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143119.1155190-1-jwakely@redhat.com/","msgid":"<20221115143119.1155190-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:19","name":"[committed] libstdc++: Fix detection of std::format support for __float128 [PR107693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143119.1155190-1-jwakely@redhat.com/mbox/"},{"id":20402,"url":"https://patchwork.plctlab.org/api/1.2/patches/20402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143134.1155246-1-jwakely@redhat.com/","msgid":"<20221115143134.1155246-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:34","name":"[committed] libstc++: std::formattable concept should not be defined for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143134.1155246-1-jwakely@redhat.com/mbox/"},{"id":20403,"url":"https://patchwork.plctlab.org/api/1.2/patches/20403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143145.1155275-1-jwakely@redhat.com/","msgid":"<20221115143145.1155275-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-15T14:31:45","name":"[committed] libstdc++: Fix std::format test for strict -std=c++20 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115143145.1155275-1-jwakely@redhat.com/mbox/"},{"id":20469,"url":"https://patchwork.plctlab.org/api/1.2/patches/20469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115163135.604240-1-aldyh@redhat.com/","msgid":"<20221115163135.604240-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-15T16:31:35","name":"[range-ops] Minor readability fix.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115163135.604240-1-aldyh@redhat.com/mbox/"},{"id":20474,"url":"https://patchwork.plctlab.org/api/1.2/patches/20474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142117380.19931@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-15T17:02:13","name":"testsuite: Fix missing EFFECTIVE_TARGETS variable errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211142117380.19931@tpp.orcam.me.uk/mbox/"},{"id":20505,"url":"https://patchwork.plctlab.org/api/1.2/patches/20505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af77b16e0296d57c2df5a5edb7c2aa25c3290cb1.camel@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-15T18:35:05","name":"[v3] c, analyzer: support named constants in analyzer [PR106302]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af77b16e0296d57c2df5a5edb7c2aa25c3290cb1.camel@redhat.com/mbox/"},{"id":20506,"url":"https://patchwork.plctlab.org/api/1.2/patches/20506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com/","msgid":"<1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com>","list_archive_url":null,"date":"2022-11-15T18:47:25","name":"nvptx/mkoffload.cc: Fix \"$nohost\" check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1fbc0c22-96d7-dc6d-b2b7-8a07f4ba0ac4@codesourcery.com/mbox/"},{"id":20510,"url":"https://patchwork.plctlab.org/api/1.2/patches/20510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190523.23018-1-david.faust@oracle.com/","msgid":"<20221115190523.23018-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-11-15T19:05:23","name":"[committed] bpf: avoid possible use of uninitialized variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190523.23018-1-david.faust@oracle.com/mbox/"},{"id":20512,"url":"https://patchwork.plctlab.org/api/1.2/patches/20512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190806.2756221-1-kevinl@rivosinc.com/","msgid":"<20221115190806.2756221-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-15T19:08:06","name":"RISC-V uninit-pred-9_b.c failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115190806.2756221-1-kevinl@rivosinc.com/mbox/"},{"id":20553,"url":"https://patchwork.plctlab.org/api/1.2/patches/20553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-98e07e65-78c9-4364-866f-6b4d29f24992-1668545104036@3c-app-gmx-bs61/","msgid":"","list_archive_url":null,"date":"2022-11-15T20:45:04","name":"Fortran: ICE in simplification of array expression involving power [PR107680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-98e07e65-78c9-4364-866f-6b4d29f24992-1668545104036@3c-app-gmx-bs61/mbox/"},{"id":20620,"url":"https://patchwork.plctlab.org/api/1.2/patches/20620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115223648.196471-1-christoph.muellner@vrull.eu/","msgid":"<20221115223648.196471-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-15T22:36:48","name":"doc: invoke: riscv: Fix closing block bracket","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115223648.196471-1-christoph.muellner@vrull.eu/mbox/"},{"id":20627,"url":"https://patchwork.plctlab.org/api/1.2/patches/20627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115230845.210285-1-christoph.muellner@vrull.eu/","msgid":"<20221115230845.210285-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-15T23:08:45","name":"doc: invoke: pru/riscv: Fix option list formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221115230845.210285-1-christoph.muellner@vrull.eu/mbox/"},{"id":20643,"url":"https://patchwork.plctlab.org/api/1.2/patches/20643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3QvHg2twpwSpCZJ@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T00:30:22","name":"[v2] c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3QvHg2twpwSpCZJ@redhat.com/mbox/"},{"id":20662,"url":"https://patchwork.plctlab.org/api/1.2/patches/20662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021027.519897-1-chenglulu@loongson.cn/","msgid":"<20221116021027.519897-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-16T02:10:28","name":"[v3] LoongArch: Add prefetch instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021027.519897-1-chenglulu@loongson.cn/mbox/"},{"id":20661,"url":"https://patchwork.plctlab.org/api/1.2/patches/20661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021154.4AE372042F@pchp3.se.axis.com/","msgid":"<20221116021154.4AE372042F@pchp3.se.axis.com>","list_archive_url":null,"date":"2022-11-16T02:11:54","name":"testsuite: Fix mistransformed gcov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116021154.4AE372042F@pchp3.se.axis.com/mbox/"},{"id":20664,"url":"https://patchwork.plctlab.org/api/1.2/patches/20664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com/","msgid":"<153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com>","list_archive_url":null,"date":"2022-11-16T02:32:42","name":"[rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/153badc6-8afc-0695-32b2-ab5a9e0a161d@linux.ibm.com/mbox/"},{"id":20670,"url":"https://patchwork.plctlab.org/api/1.2/patches/20670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116024619.1465996-1-ppalka@redhat.com/","msgid":"<20221116024619.1465996-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-16T02:46:19","name":"libstdc++: Fix stream initialization with static library [PR107701]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116024619.1465996-1-ppalka@redhat.com/mbox/"},{"id":20735,"url":"https://patchwork.plctlab.org/api/1.2/patches/20735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SGHV9P/xR6N2zg@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T06:41:33","name":"[committed] range-op-float: Fix up float_binary_op_range_finish [PR107668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SGHV9P/xR6N2zg@tucnak/mbox/"},{"id":20736,"url":"https://patchwork.plctlab.org/api/1.2/patches/20736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e73c1320-0738-7645-b0fa-1da62a31ab94@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T06:48:25","name":"[1/2] rs6000: Emit vector fp comparison directly in rs6000_emit_vector_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e73c1320-0738-7645-b0fa-1da62a31ab94@linux.ibm.com/mbox/"},{"id":20738,"url":"https://patchwork.plctlab.org/api/1.2/patches/20738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com/","msgid":"<247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com>","list_archive_url":null,"date":"2022-11-16T06:51:04","name":"[2/2] rs6000: Refine integer comparison handlings in rs6000_emit_vector_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com/mbox/"},{"id":20747,"url":"https://patchwork.plctlab.org/api/1.2/patches/20747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1d78b22-e5e9-5104-a3aa-750d8bb6cba2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T07:29:20","name":"Fix typo in gimple_fold_partial_load_store_mem_ref","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1d78b22-e5e9-5104-a3aa-750d8bb6cba2@linux.ibm.com/mbox/"},{"id":20788,"url":"https://patchwork.plctlab.org/api/1.2/patches/20788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Selj1pt9/Jq0Yt@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T08:25:58","name":"c++, v2: Fix up calls to static operator() or operator[] [PR107624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3Selj1pt9/Jq0Yt@tucnak/mbox/"},{"id":20822,"url":"https://patchwork.plctlab.org/api/1.2/patches/20822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SoCZfrEbw3KN3t@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T09:06:17","name":"libgcc, i386: Add __fix{,uns}bfti and __float{,un}tibf [PR107703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3SoCZfrEbw3KN3t@tucnak/mbox/"},{"id":20871,"url":"https://patchwork.plctlab.org/api/1.2/patches/20871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S4wvO/i4rBQPVj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T10:17:38","name":"c++, v3: Implement CWG2635 - Constrained structured bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S4wvO/i4rBQPVj@tucnak/mbox/"},{"id":20893,"url":"https://patchwork.plctlab.org/api/1.2/patches/20893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S9AnlIctx/iFPf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T10:35:46","name":"c++, v2: Alignment changes to layout compatibility/common initial sequence - DR2583","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3S9AnlIctx/iFPf@tucnak/mbox/"},{"id":20974,"url":"https://patchwork.plctlab.org/api/1.2/patches/20974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31a32901-1912-988b-c641-1f23093e8563@codesourcery.com/","msgid":"<31a32901-1912-988b-c641-1f23093e8563@codesourcery.com>","list_archive_url":null,"date":"2022-11-16T11:42:16","name":"gcn: Add __builtin_gcn_kernarg_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31a32901-1912-988b-c641-1f23093e8563@codesourcery.com/mbox/"},{"id":20978,"url":"https://patchwork.plctlab.org/api/1.2/patches/20978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3TOsnjlLHvSarjl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-16T11:51:14","name":"libgcc, i386, optabs, v2: Add __float{, un}tibf to libgcc and expand BF -> integral through SF intermediate [PR107703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3TOsnjlLHvSarjl@tucnak/mbox/"},{"id":21060,"url":"https://patchwork.plctlab.org/api/1.2/patches/21060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132920.2958143-1-dmalcolm@redhat.com/","msgid":"<20221116132920.2958143-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:29:20","name":"[committed] analyzer: split out checker-path.cc into a new checker-event.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132920.2958143-1-dmalcolm@redhat.com/mbox/"},{"id":21062,"url":"https://patchwork.plctlab.org/api/1.2/patches/21062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132942.2958189-1-dmalcolm@redhat.com/","msgid":"<20221116132942.2958189-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:29:42","name":"[committed] analyzer: use known_function to simplify region_model::on_call_{pre, post}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116132942.2958189-1-dmalcolm@redhat.com/mbox/"},{"id":21069,"url":"https://patchwork.plctlab.org/api/1.2/patches/21069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133815.1351836-1-jwakely@redhat.com/","msgid":"<20221116133815.1351836-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:38:15","name":"[committed] libstdc++: Improve comments on pretty printer code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133815.1351836-1-jwakely@redhat.com/mbox/"},{"id":21070,"url":"https://patchwork.plctlab.org/api/1.2/patches/21070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133834.1351862-1-jwakely@redhat.com/","msgid":"<20221116133834.1351862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T13:38:34","name":"[committed] libstdc++: Fix std::any pretty printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116133834.1351862-1-jwakely@redhat.com/mbox/"},{"id":21080,"url":"https://patchwork.plctlab.org/api/1.2/patches/21080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz/","msgid":"<66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz>","list_archive_url":null,"date":"2022-11-16T14:14:41","name":"[(pushed)] libatomic: regenerate Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66bd5c67-c48a-ce15-0293-2a6c4c459db6@suse.cz/mbox/"},{"id":21117,"url":"https://patchwork.plctlab.org/api/1.2/patches/21117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116150735.1374787-1-jwakely@redhat.com/","msgid":"<20221116150735.1374787-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T15:07:35","name":"[committed] libstdc++: Add test for chrono::utc_clock leap second offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116150735.1374787-1-jwakely@redhat.com/mbox/"},{"id":21120,"url":"https://patchwork.plctlab.org/api/1.2/patches/21120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153408.86FA313480@imap2.suse-dmz.suse.de/","msgid":"<20221116153408.86FA313480@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-16T15:34:08","name":"middle-end/107679 - fix SSA rewrite of clobber of parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153408.86FA313480@imap2.suse-dmz.suse.de/mbox/"},{"id":21121,"url":"https://patchwork.plctlab.org/api/1.2/patches/21121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153421.1EE2513480@imap2.suse-dmz.suse.de/","msgid":"<20221116153421.1EE2513480@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-16T15:34:20","name":"tree-optimization/107686 - fix bitfield ref through vec_unpack optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116153421.1EE2513480@imap2.suse-dmz.suse.de/mbox/"},{"id":21133,"url":"https://patchwork.plctlab.org/api/1.2/patches/21133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ORTB8ja1orPQI2PlPNzQUO4jsLD8w4L7DFPV-Gc_lt29nt6oJn7d4sVnjtdlnn4ehnd0FBYvRUR0lH1QTVFVku2n94g-7xC5xi2Nq2jUSG0=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-11-16T16:03:17","name":"jit: Install jit headers in $(libsubincludedir) [PR 101491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ORTB8ja1orPQI2PlPNzQUO4jsLD8w4L7DFPV-Gc_lt29nt6oJn7d4sVnjtdlnn4ehnd0FBYvRUR0lH1QTVFVku2n94g-7xC5xi2Nq2jUSG0=@lorenzosalvadore.it/mbox/"},{"id":21134,"url":"https://patchwork.plctlab.org/api/1.2/patches/21134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3UKmGtHHRaNahjM@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-16T16:06:48","name":"[v3] c++: P2448 - Relaxing some constexpr restrictions [PR106649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3UKmGtHHRaNahjM@redhat.com/mbox/"},{"id":21254,"url":"https://patchwork.plctlab.org/api/1.2/patches/21254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-db3546b8-31ca-43d1-bb5f-962f38c399c4-1668631813744@3c-app-gmx-bap19/","msgid":"","list_archive_url":null,"date":"2022-11-16T20:50:13","name":"Fortran: error recovery after reference to bad CLASS variable [PR107681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-db3546b8-31ca-43d1-bb5f-962f38c399c4-1668631813744@3c-app-gmx-bap19/mbox/"},{"id":21273,"url":"https://patchwork.plctlab.org/api/1.2/patches/21273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116205950.1420057-1-jwakely@redhat.com/","msgid":"<20221116205950.1420057-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T20:59:50","name":"[committed] libstdc++: Disable std::format of _Float128 if std::to_chars is innaccurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116205950.1420057-1-jwakely@redhat.com/mbox/"},{"id":21274,"url":"https://patchwork.plctlab.org/api/1.2/patches/21274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210006.1420105-1-jwakely@redhat.com/","msgid":"<20221116210006.1420105-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:06","name":"[committed] libstdc++: Adjust for Clang compatibility [PR107712]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210006.1420105-1-jwakely@redhat.com/mbox/"},{"id":21275,"url":"https://patchwork.plctlab.org/api/1.2/patches/21275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210014.1420128-1-jwakely@redhat.com/","msgid":"<20221116210014.1420128-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:14","name":"[committed] libstdc++: Improve performance of chrono::utc_clock::now()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210014.1420128-1-jwakely@redhat.com/mbox/"},{"id":21277,"url":"https://patchwork.plctlab.org/api/1.2/patches/21277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210023.1420143-1-jwakely@redhat.com/","msgid":"<20221116210023.1420143-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-16T21:00:23","name":"[committed] libstdc++: Fix dumb typos in ALT128 support in [PR107720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116210023.1420143-1-jwakely@redhat.com/mbox/"},{"id":21281,"url":"https://patchwork.plctlab.org/api/1.2/patches/21281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116211614.904834-1-kevinl@rivosinc.com/","msgid":"<20221116211614.904834-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2022-11-16T21:16:14","name":"[v3] RISC-V missing __builtin_lceil and __builtin_lfloor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116211614.904834-1-kevinl@rivosinc.com/mbox/"},{"id":21311,"url":"https://patchwork.plctlab.org/api/1.2/patches/21311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f69af5d4-c8de-4af1-94d3-d9f20963f1ef-1668635898373@3c-app-gmx-bap19/","msgid":"","list_archive_url":null,"date":"2022-11-16T21:58:18","name":"[committed] Fortran: ICE on procedure arguments with non-integer length [PR107707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f69af5d4-c8de-4af1-94d3-d9f20963f1ef-1668635898373@3c-app-gmx-bap19/mbox/"},{"id":21318,"url":"https://patchwork.plctlab.org/api/1.2/patches/21318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225115.2985194-1-dmalcolm@redhat.com/","msgid":"<20221116225115.2985194-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T22:51:15","name":"[committed] analyzer: log the stashing of named constants [PR107711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225115.2985194-1-dmalcolm@redhat.com/mbox/"},{"id":21319,"url":"https://patchwork.plctlab.org/api/1.2/patches/21319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225137.2985245-1-dmalcolm@redhat.com/","msgid":"<20221116225137.2985245-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-16T22:51:37","name":"[committed] analyzer: more test coverage for named constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116225137.2985245-1-dmalcolm@redhat.com/mbox/"},{"id":21343,"url":"https://patchwork.plctlab.org/api/1.2/patches/21343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116235429.25268-1-hongyu.wang@intel.com/","msgid":"<20221116235429.25268-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-16T23:54:29","name":"rs6000: Adjust loop_unroll_adjust to match middle-end change [PR 107692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221116235429.25268-1-hongyu.wang@intel.com/mbox/"},{"id":21349,"url":"https://patchwork.plctlab.org/api/1.2/patches/21349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117003508.1432092-1-jwakely@redhat.com/","msgid":"<20221117003508.1432092-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-17T00:35:08","name":"[committed] libstdc++: Ensure std::to_chars overloads all declared in [PR107720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117003508.1432092-1-jwakely@redhat.com/mbox/"},{"id":21378,"url":"https://patchwork.plctlab.org/api/1.2/patches/21378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc69d060-9336-a1fd-fd9b-6bc9a024eb57@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-17T01:51:38","name":"[committed] Fix multiple recent sh3/sh3eb regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc69d060-9336-a1fd-fd9b-6bc9a024eb57@gmail.com/mbox/"},{"id":21392,"url":"https://patchwork.plctlab.org/api/1.2/patches/21392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117030530.2995977-1-dmalcolm@redhat.com/","msgid":"<20221117030530.2995977-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-17T03:05:30","name":"c: fix ICE with -fanalyzer and -Wunused-macros [PR107711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117030530.2995977-1-dmalcolm@redhat.com/mbox/"},{"id":21422,"url":"https://patchwork.plctlab.org/api/1.2/patches/21422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16601-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-17T04:09:49","name":"middle-end: ensure that VEC_PERM operands get lowered to the same SSA_NAME. [PR107717]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16601-tamar@arm.com/mbox/"},{"id":21456,"url":"https://patchwork.plctlab.org/api/1.2/patches/21456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117061549.178481-1-guojiufu@linux.ibm.com/","msgid":"<20221117061549.178481-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-17T06:15:49","name":"[V2] Use subscalar mode to move struct block for parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117061549.178481-1-guojiufu@linux.ibm.com/mbox/"},{"id":21461,"url":"https://patchwork.plctlab.org/api/1.2/patches/21461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117063852.29869-1-hejinyang@loongson.cn/","msgid":"<20221117063852.29869-1-hejinyang@loongson.cn>","list_archive_url":null,"date":"2022-11-17T06:38:52","name":"[v2] LoongArch: Fix atomic_exchange expanding [PR107713]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117063852.29869-1-hejinyang@loongson.cn/mbox/"},{"id":21460,"url":"https://patchwork.plctlab.org/api/1.2/patches/21460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com/","msgid":"<438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com>","list_archive_url":null,"date":"2022-11-17T06:39:20","name":"[PATCHv2,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com/mbox/"},{"id":21516,"url":"https://patchwork.plctlab.org/api/1.2/patches/21516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3X7UH00hQtTnQSj@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-17T09:13:52","name":"c++, v3: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3X7UH00hQtTnQSj@tucnak/mbox/"},{"id":21526,"url":"https://patchwork.plctlab.org/api/1.2/patches/21526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095355.1928564-1-chenyixuan@iscas.ac.cn/","msgid":"<20221117095355.1928564-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-17T09:53:55","name":"Ver.2: Add compile option \"-msmall-data-limit=0\" to avoid using .srodata section for riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095355.1928564-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":21536,"url":"https://patchwork.plctlab.org/api/1.2/patches/21536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095909.2896386-1-chenglulu@loongson.cn/","msgid":"<20221117095909.2896386-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-17T09:59:09","name":"[v4] LoongArch: Optimize immediate load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117095909.2896386-1-chenglulu@loongson.cn/mbox/"},{"id":21549,"url":"https://patchwork.plctlab.org/api/1.2/patches/21549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117105236.2480943-1-manolis.tsamis@vrull.eu/","msgid":"<20221117105236.2480943-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-11-17T10:52:36","name":"[v3] Enable shrink wrapping for the RISC-V target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117105236.2480943-1-manolis.tsamis@vrull.eu/mbox/"},{"id":21666,"url":"https://patchwork.plctlab.org/api/1.2/patches/21666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117132021.1143935-1-torbjorn.svensson@foss.st.com/","msgid":"<20221117132021.1143935-1-torbjorn.svensson@foss.st.com>","list_archive_url":null,"date":"2022-11-17T13:20:22","name":"[v3] c++: Allow module name to be a single letter on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117132021.1143935-1-torbjorn.svensson@foss.st.com/mbox/"},{"id":21845,"url":"https://patchwork.plctlab.org/api/1.2/patches/21845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-2-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:35","name":"[01/35] arm: improve vcreateq* tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-2-andrea.corallo@arm.com/mbox/"},{"id":21802,"url":"https://patchwork.plctlab.org/api/1.2/patches/21802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-3-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-3-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:36","name":"[02/35] arm: fix '\''vmsr'\'' spacing and register capitalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-3-andrea.corallo@arm.com/mbox/"},{"id":21803,"url":"https://patchwork.plctlab.org/api/1.2/patches/21803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-4-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:37","name":"[03/35] arm: improve tests and fix vddupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-4-andrea.corallo@arm.com/mbox/"},{"id":21804,"url":"https://patchwork.plctlab.org/api/1.2/patches/21804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-5-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:38","name":"[04/35] arm: improve tests and fix vdwdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-5-andrea.corallo@arm.com/mbox/"},{"id":21806,"url":"https://patchwork.plctlab.org/api/1.2/patches/21806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-6-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:39","name":"[05/35] arm: improve vidupq* tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-6-andrea.corallo@arm.com/mbox/"},{"id":21807,"url":"https://patchwork.plctlab.org/api/1.2/patches/21807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-7-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-7-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:40","name":"[06/35] arm: improve tests and fix vdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-7-andrea.corallo@arm.com/mbox/"},{"id":21837,"url":"https://patchwork.plctlab.org/api/1.2/patches/21837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-8-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:41","name":"[07/35] arm: improve tests and fix vcmp*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-8-andrea.corallo@arm.com/mbox/"},{"id":21824,"url":"https://patchwork.plctlab.org/api/1.2/patches/21824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-9-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:42","name":"[08/35] arm: improve tests for vmin*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-9-andrea.corallo@arm.com/mbox/"},{"id":21840,"url":"https://patchwork.plctlab.org/api/1.2/patches/21840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-10-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:43","name":"[09/35] arm: improve tests for vmax*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-10-andrea.corallo@arm.com/mbox/"},{"id":21805,"url":"https://patchwork.plctlab.org/api/1.2/patches/21805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-11-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-11-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:44","name":"[10/35] arm: improve tests for vabavq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-11-andrea.corallo@arm.com/mbox/"},{"id":21813,"url":"https://patchwork.plctlab.org/api/1.2/patches/21813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-12-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-12-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:45","name":"[11/35] arm: improve tests for vabdq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-12-andrea.corallo@arm.com/mbox/"},{"id":21811,"url":"https://patchwork.plctlab.org/api/1.2/patches/21811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-13-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-13-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:46","name":"[12/35] arm: improve tests and fix vabsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-13-andrea.corallo@arm.com/mbox/"},{"id":21849,"url":"https://patchwork.plctlab.org/api/1.2/patches/21849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-14-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-14-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:47","name":"[13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-14-andrea.corallo@arm.com/mbox/"},{"id":21842,"url":"https://patchwork.plctlab.org/api/1.2/patches/21842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-15-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-15-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:48","name":"[14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-15-andrea.corallo@arm.com/mbox/"},{"id":21846,"url":"https://patchwork.plctlab.org/api/1.2/patches/21846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-16-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-16-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:49","name":"[15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-16-andrea.corallo@arm.com/mbox/"},{"id":21814,"url":"https://patchwork.plctlab.org/api/1.2/patches/21814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-17-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-17-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:50","name":"[16/35] arm: Add integer vector overloading of vsubq_x instrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-17-andrea.corallo@arm.com/mbox/"},{"id":21841,"url":"https://patchwork.plctlab.org/api/1.2/patches/21841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-18-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-18-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:51","name":"[17/35] arm: improve tests and fix vadd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-18-andrea.corallo@arm.com/mbox/"},{"id":21827,"url":"https://patchwork.plctlab.org/api/1.2/patches/21827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-19-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-19-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:52","name":"[18/35] arm: improve tests for vmulq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-19-andrea.corallo@arm.com/mbox/"},{"id":21821,"url":"https://patchwork.plctlab.org/api/1.2/patches/21821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-20-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-20-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:53","name":"[19/35] arm: improve tests and fix vsubq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-20-andrea.corallo@arm.com/mbox/"},{"id":21812,"url":"https://patchwork.plctlab.org/api/1.2/patches/21812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-21-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-21-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:54","name":"[20/35] arm: improve tests for vfmasq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-21-andrea.corallo@arm.com/mbox/"},{"id":21834,"url":"https://patchwork.plctlab.org/api/1.2/patches/21834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-22-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-22-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:55","name":"[21/35] arm: improve tests for vhaddq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-22-andrea.corallo@arm.com/mbox/"},{"id":21823,"url":"https://patchwork.plctlab.org/api/1.2/patches/21823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-23-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-23-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:56","name":"[22/35] arm: improve tests for vhsubq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-23-andrea.corallo@arm.com/mbox/"},{"id":21820,"url":"https://patchwork.plctlab.org/api/1.2/patches/21820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-24-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-24-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:57","name":"[23/35] arm: improve tests for viwdupq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-24-andrea.corallo@arm.com/mbox/"},{"id":21819,"url":"https://patchwork.plctlab.org/api/1.2/patches/21819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-25-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-25-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:58","name":"[24/35] arm: improve tests for vmladavaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-25-andrea.corallo@arm.com/mbox/"},{"id":21825,"url":"https://patchwork.plctlab.org/api/1.2/patches/21825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-26-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-26-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:37:59","name":"[25/35] arm: improve tests and fix vmlaldavaxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-26-andrea.corallo@arm.com/mbox/"},{"id":21829,"url":"https://patchwork.plctlab.org/api/1.2/patches/21829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-27-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-27-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:00","name":"[26/35] arm: improve tests for vmlasq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-27-andrea.corallo@arm.com/mbox/"},{"id":21816,"url":"https://patchwork.plctlab.org/api/1.2/patches/21816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-28-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-28-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:01","name":"[27/35] arm: improve tests for vqaddq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-28-andrea.corallo@arm.com/mbox/"},{"id":21826,"url":"https://patchwork.plctlab.org/api/1.2/patches/21826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-29-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-29-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:02","name":"[28/35] arm: improve tests for vqdmlahq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-29-andrea.corallo@arm.com/mbox/"},{"id":21836,"url":"https://patchwork.plctlab.org/api/1.2/patches/21836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-30-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-30-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:03","name":"[29/35] arm: improve tests for vqdmul*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-30-andrea.corallo@arm.com/mbox/"},{"id":21822,"url":"https://patchwork.plctlab.org/api/1.2/patches/21822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-31-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-31-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:04","name":"[30/35] arm: improve tests for vqrdmlahq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-31-andrea.corallo@arm.com/mbox/"},{"id":21810,"url":"https://patchwork.plctlab.org/api/1.2/patches/21810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-32-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-32-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:05","name":"[31/35] arm: improve tests for vqrdmlashq_m*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-32-andrea.corallo@arm.com/mbox/"},{"id":21835,"url":"https://patchwork.plctlab.org/api/1.2/patches/21835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-33-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-33-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:06","name":"[32/35] arm: improve tests for vqsubq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-33-andrea.corallo@arm.com/mbox/"},{"id":21817,"url":"https://patchwork.plctlab.org/api/1.2/patches/21817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-34-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-34-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:07","name":"[33/35] arm: improve tests and fix vrmlaldavhaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-34-andrea.corallo@arm.com/mbox/"},{"id":21828,"url":"https://patchwork.plctlab.org/api/1.2/patches/21828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-35-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-35-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:08","name":"[34/35] arm: improve tests for vrshlq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-35-andrea.corallo@arm.com/mbox/"},{"id":21808,"url":"https://patchwork.plctlab.org/api/1.2/patches/21808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-36-andrea.corallo@arm.com/","msgid":"<20221117163809.1009526-36-andrea.corallo@arm.com>","list_archive_url":null,"date":"2022-11-17T16:38:09","name":"[35/35] arm: improve tests for vsetq_lane*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117163809.1009526-36-andrea.corallo@arm.com/mbox/"},{"id":21859,"url":"https://patchwork.plctlab.org/api/1.2/patches/21859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117174449.825329-1-aldyh@redhat.com/","msgid":"<20221117174449.825329-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-17T17:44:49","name":"[COMMITTED,PR,tree-optimization/107732,range-ops] Handle attempt to abs() negatives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117174449.825329-1-aldyh@redhat.com/mbox/"},{"id":21860,"url":"https://patchwork.plctlab.org/api/1.2/patches/21860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668707958-10346-1-git-send-email-apinski@marvell.com/","msgid":"<1668707958-10346-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-17T17:59:18","name":"[COMMITTED] Fix PR 107734: valgrind errors with sbitmap in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668707958-10346-1-git-send-email-apinski@marvell.com/mbox/"},{"id":21870,"url":"https://patchwork.plctlab.org/api/1.2/patches/21870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117183810.33353-1-polacek@redhat.com/","msgid":"<20221117183810.33353-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-11-17T18:38:10","name":"c++: constinit on pointer to function [PR104066]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117183810.33353-1-polacek@redhat.com/mbox/"},{"id":21894,"url":"https://patchwork.plctlab.org/api/1.2/patches/21894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3acqbULfy3PULmc@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-17T20:42:17","name":"c++, v4: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3acqbULfy3PULmc@tucnak/mbox/"},{"id":21895,"url":"https://patchwork.plctlab.org/api/1.2/patches/21895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9afc12d0-717f-45c1-81cf-6d4fc8d6249e-1668718081298@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2022-11-17T20:48:01","name":"Fortran: reject NULL actual argument without explicit interface [PR107576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9afc12d0-717f-45c1-81cf-6d4fc8d6249e-1668718081298@3c-app-gmx-bap50/mbox/"},{"id":21903,"url":"https://patchwork.plctlab.org/api/1.2/patches/21903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117210259.154569-1-aldot@gcc.gnu.org/","msgid":"<20221117210259.154569-1-aldot@gcc.gnu.org>","list_archive_url":null,"date":"2022-11-17T21:02:59","name":"libcpp: Add missing config for --enable-valgrind-annotations [PR107691]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221117210259.154569-1-aldot@gcc.gnu.org/mbox/"},{"id":22039,"url":"https://patchwork.plctlab.org/api/1.2/patches/22039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118014522.1989180-1-hongtao.liu@intel.com/","msgid":"<20221118014522.1989180-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-18T01:45:22","name":"[x86] define builtins for \"shared\" avxneconvert-avx512bf16vl builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118014522.1989180-1-hongtao.liu@intel.com/mbox/"},{"id":22062,"url":"https://patchwork.plctlab.org/api/1.2/patches/22062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118021223.348112-1-christoph.muellner@vrull.eu/","msgid":"<20221118021223.348112-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-18T02:12:23","name":"RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118021223.348112-1-christoph.muellner@vrull.eu/mbox/"},{"id":22085,"url":"https://patchwork.plctlab.org/api/1.2/patches/22085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-1-git-send-email-apinski@marvell.com/","msgid":"<1668741911-1727-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T03:25:10","name":"[1/2] Fix PRs 106764, 106765, and 107307, all ICE after invalid re-declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-1-git-send-email-apinski@marvell.com/mbox/"},{"id":22084,"url":"https://patchwork.plctlab.org/api/1.2/patches/22084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-2-git-send-email-apinski@marvell.com/","msgid":"<1668741911-1727-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T03:25:11","name":"[2/2] Fix PR middle-end/107705: ICE after reclaration error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668741911-1727-2-git-send-email-apinski@marvell.com/mbox/"},{"id":22100,"url":"https://patchwork.plctlab.org/api/1.2/patches/22100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118042706.10725-1-palmer@rivosinc.com/","msgid":"<20221118042706.10725-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-18T04:27:06","name":"RISC-V: Note that __builtin_riscv_pause() implies Xgnuzihintpausestate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118042706.10725-1-palmer@rivosinc.com/mbox/"},{"id":22107,"url":"https://patchwork.plctlab.org/api/1.2/patches/22107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118054904.240603-1-chenyixuan@iscas.ac.cn/","msgid":"<20221118054904.240603-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-18T05:49:04","name":"optimize the testcase for architectures that use \".srodata\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118054904.240603-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":22162,"url":"https://patchwork.plctlab.org/api/1.2/patches/22162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118073700.151791345B@imap2.suse-dmz.suse.de/","msgid":"<20221118073700.151791345B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-18T07:36:59","name":"tree-optimization/107647 - avoid FMA from SLP with -ffp-contract=off","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118073700.151791345B@imap2.suse-dmz.suse.de/mbox/"},{"id":22213,"url":"https://patchwork.plctlab.org/api/1.2/patches/22213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3dL8nv/qF+qb1j3@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-18T09:10:10","name":"c++, v5: Implement C++23 P2647R1 - Permitting static constexpr variables in constexpr functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3dL8nv/qF+qb1j3@tucnak/mbox/"},{"id":22269,"url":"https://patchwork.plctlab.org/api/1.2/patches/22269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-2-philipp.tomsich@vrull.eu/","msgid":"<20221118111001.1488517-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-18T11:10:00","name":"[v2,1/2] RISC-V: Use bseti/bclri/binvi to extend reach of ori/andi/xori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-2-philipp.tomsich@vrull.eu/mbox/"},{"id":22270,"url":"https://patchwork.plctlab.org/api/1.2/patches/22270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-3-philipp.tomsich@vrull.eu/","msgid":"<20221118111001.1488517-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-18T11:10:01","name":"[v2,2/2] RISC-V: Handle \"(a & twobits) == singlebit\" in branches using Zbs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118111001.1488517-3-philipp.tomsich@vrull.eu/mbox/"},{"id":22402,"url":"https://patchwork.plctlab.org/api/1.2/patches/22402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com/","msgid":"<1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com>","list_archive_url":null,"date":"2022-11-18T17:20:29","name":"gcn: Add __builtin_gcn_{get_stack_limit,first_call_this_thread_p}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bec26d6-e2c5-3408-4f61-0fb17e730b3e@codesourcery.com/mbox/"},{"id":22412,"url":"https://patchwork.plctlab.org/api/1.2/patches/22412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668794731-9349-1-git-send-email-apinski@marvell.com/","msgid":"<1668794731-9349-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-18T18:05:31","name":"constexprify some tree variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668794731-9349-1-git-send-email-apinski@marvell.com/mbox/"},{"id":22440,"url":"https://patchwork.plctlab.org/api/1.2/patches/22440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcoayyz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-18T18:39:48","name":"gomp: Various fixes for SVE types [PR101018]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzgcoayyz.fsf@arm.com/mbox/"},{"id":22513,"url":"https://patchwork.plctlab.org/api/1.2/patches/22513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118214339.3620949-1-ppalka@redhat.com/","msgid":"<20221118214339.3620949-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-18T21:43:39","name":"c++: cache the normal form of a concept-id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118214339.3620949-1-ppalka@redhat.com/mbox/"},{"id":22517,"url":"https://patchwork.plctlab.org/api/1.2/patches/22517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118215946.3621557-1-ppalka@redhat.com/","msgid":"<20221118215946.3621557-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-18T21:59:46","name":"c++: remove coerce_innermost_template_parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118215946.3621557-1-ppalka@redhat.com/mbox/"},{"id":22518,"url":"https://patchwork.plctlab.org/api/1.2/patches/22518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118220326.3093911-1-dmalcolm@redhat.com/","msgid":"<20221118220326.3093911-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-18T22:03:26","name":"[committed] analyzer: move more impl_* to known_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221118220326.3093911-1-dmalcolm@redhat.com/mbox/"},{"id":22664,"url":"https://patchwork.plctlab.org/api/1.2/patches/22664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-11-18T23:25:16","name":"nvptx: In '\''STARTFILE_SPEC'\'', fix '\''crt0.o'\'' for '\''-mmainkernel'\'' (was: [MentorEmbedded/nvptx-tools] Match standard '\''ld'\'' \"search\" behavior (PR #38))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87iljbalr7.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":22814,"url":"https://patchwork.plctlab.org/api/1.2/patches/22814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3gazoJNHo0bHBR9@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-11-18T23:52:46","name":"[v2] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3gazoJNHo0bHBR9@redhat.com/mbox/"},{"id":23086,"url":"https://patchwork.plctlab.org/api/1.2/patches/23086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119004136.3101136-1-dmalcolm@redhat.com/","msgid":"<20221119004136.3101136-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-19T00:41:36","name":"[committed] analyzer: fix feasibility false +ve on jumps through function ptrs [PR107582]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119004136.3101136-1-dmalcolm@redhat.com/mbox/"},{"id":23220,"url":"https://patchwork.plctlab.org/api/1.2/patches/23220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119062532.75190-1-hongyu.wang@intel.com/","msgid":"<20221119062532.75190-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-11-19T06:25:32","name":"i386: Only enable small loop unrolling in backend [PR 107602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119062532.75190-1-hongyu.wang@intel.com/mbox/"},{"id":23236,"url":"https://patchwork.plctlab.org/api/1.2/patches/23236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iV4SQrZRB2TJxD@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T08:37:53","name":"i386: Uglify some local identifiers in *intrin.h [PR107748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iV4SQrZRB2TJxD@tucnak/mbox/"},{"id":23237,"url":"https://patchwork.plctlab.org/api/1.2/patches/23237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iZZpCSBrzTZVP4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T08:52:54","name":"i386: Outline fast BF -> SF conversion and fix up sNaN handling in it [PR107628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iZZpCSBrzTZVP4@tucnak/mbox/"},{"id":23240,"url":"https://patchwork.plctlab.org/api/1.2/patches/23240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iexgMbUBm5mi7A@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-19T09:15:50","name":"reg-stack: Fix a -fcompare-debug bug in reg-stack [PR107183]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3iexgMbUBm5mi7A@tucnak/mbox/"},{"id":23268,"url":"https://patchwork.plctlab.org/api/1.2/patches/23268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9630c4c-1df6-4dd5-f7e1-3d63c2e1f34d@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-19T13:02:44","name":"Fix in _GLIBCXX_INLINE_VERSION mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9630c4c-1df6-4dd5-f7e1-3d63c2e1f34d@gmail.com/mbox/"},{"id":23270,"url":"https://patchwork.plctlab.org/api/1.2/patches/23270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150817.1673878-1-jwakely@redhat.com/","msgid":"<20221119150817.1673878-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:17","name":"[committed] libstdc++: Fix one more malformed requires-clause [PR107649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150817.1673878-1-jwakely@redhat.com/mbox/"},{"id":23271,"url":"https://patchwork.plctlab.org/api/1.2/patches/23271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150840.1673902-1-jwakely@redhat.com/","msgid":"<20221119150840.1673902-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:40","name":"[committed] libstdc++: Fix Doxygen warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150840.1673902-1-jwakely@redhat.com/mbox/"},{"id":23272,"url":"https://patchwork.plctlab.org/api/1.2/patches/23272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150847.1673947-1-jwakely@redhat.com/","msgid":"<20221119150847.1673947-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T15:08:47","name":"[committed] libstdc++: Fix -Wsign-compare warnings in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119150847.1673947-1-jwakely@redhat.com/mbox/"},{"id":23302,"url":"https://patchwork.plctlab.org/api/1.2/patches/23302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119174453.1688270-1-jwakely@redhat.com/","msgid":"<20221119174453.1688270-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-19T17:44:53","name":"[committed] libstdc++: Add always_inline to trivial range access functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221119174453.1688270-1-jwakely@redhat.com/mbox/"},{"id":23367,"url":"https://patchwork.plctlab.org/api/1.2/patches/23367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668907504-29652-1-git-send-email-apinski@marvell.com/","msgid":"<1668907504-29652-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-20T01:25:04","name":"Fix PR 106560: Another ICE after conflicting types of redeclaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1668907504-29652-1-git-send-email-apinski@marvell.com/mbox/"},{"id":23369,"url":"https://patchwork.plctlab.org/api/1.2/patches/23369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com/","msgid":"<3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com>","list_archive_url":null,"date":"2022-11-20T01:50:52","name":"[committed] Fix test to not depend on DECL_UIDs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ebe79f4-af7d-0817-456c-331dfb2e3f56@ventanamicro.com/mbox/"},{"id":23373,"url":"https://patchwork.plctlab.org/api/1.2/patches/23373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com/","msgid":"<66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com>","list_archive_url":null,"date":"2022-11-20T02:26:52","name":"[committed,PR,other/104044] Remove extraneous semicolons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66077669-ff3c-f90a-cd86-eea49878863c@ventanamicro.com/mbox/"},{"id":23401,"url":"https://patchwork.plctlab.org/api/1.2/patches/23401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221120100257.281467-1-dimitar@dinux.eu/","msgid":"<20221120100257.281467-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2022-11-20T10:02:57","name":"testsuite: Add filter for target socket support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221120100257.281467-1-dimitar@dinux.eu/mbox/"},{"id":23438,"url":"https://patchwork.plctlab.org/api/1.2/patches/23438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff23edb1b10b4b6d099bb8a436910dd282d508fe.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2022-11-20T19:03:12","name":"libgccjit: Fix float vector comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff23edb1b10b4b6d099bb8a436910dd282d508fe.camel@zoho.com/mbox/"},{"id":23476,"url":"https://patchwork.plctlab.org/api/1.2/patches/23476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaUaDNB_rGUUPBOWQHZVCFN8uoiCVEWcoAX3q9MvyyPWw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-20T22:50:06","name":"[Arm] Add neon_fcmla and neon_fcadd as neon_type instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJA7tRaUaDNB_rGUUPBOWQHZVCFN8uoiCVEWcoAX3q9MvyyPWw@mail.gmail.com/mbox/"},{"id":23510,"url":"https://patchwork.plctlab.org/api/1.2/patches/23510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121021150.3348406-1-hongtao.liu@intel.com/","msgid":"<20221121021150.3348406-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-21T02:11:50","name":"[x86] Some tidy up for RA related hooks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121021150.3348406-1-hongtao.liu@intel.com/mbox/"},{"id":23548,"url":"https://patchwork.plctlab.org/api/1.2/patches/23548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-1-sebastian.huber@embedded-brains.de/","msgid":"<20221121072526.103446-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-11-21T07:25:25","name":"[v2,1/2] Allow subtarget customization of CC1_SPEC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":23550,"url":"https://patchwork.plctlab.org/api/1.2/patches/23550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-2-sebastian.huber@embedded-brains.de/","msgid":"<20221121072526.103446-2-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-11-21T07:25:26","name":"[v2,2/2] RTEMS: Use local-exec TLS model by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121072526.103446-2-sebastian.huber@embedded-brains.de/mbox/"},{"id":23577,"url":"https://patchwork.plctlab.org/api/1.2/patches/23577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz/","msgid":"<0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz>","list_archive_url":null,"date":"2022-11-21T08:04:31","name":"[(pushed)] build: re-configure 2 files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0aedabc8-833c-acd9-5bd7-db07ce067e22@suse.cz/mbox/"},{"id":23580,"url":"https://patchwork.plctlab.org/api/1.2/patches/23580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz/","msgid":"<52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz>","list_archive_url":null,"date":"2022-11-21T08:19:24","name":"changelog: Fix extra space after tab. fix extra spaces after tab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52b0c775-8950-7217-a861-6b1914f72fc7@suse.cz/mbox/"},{"id":23630,"url":"https://patchwork.plctlab.org/api/1.2/patches/23630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJOtW+5=-WA_i7cXxrWSOVKDc_PQbtNOoaLmEQJrk3oU=uLUdw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T09:57:15","name":"[PING,sanitizer/106558] asan: fix unsafe optimization of Asan checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJOtW+5=-WA_i7cXxrWSOVKDc_PQbtNOoaLmEQJrk3oU=uLUdw@mail.gmail.com/mbox/"},{"id":23634,"url":"https://patchwork.plctlab.org/api/1.2/patches/23634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101329.258908-1-poulhies@adacore.com/","msgid":"<20221121101329.258908-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:29","name":"[COMMITTED] ada: Tweak error messages on misplaced with keywords","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101329.258908-1-poulhies@adacore.com/mbox/"},{"id":23635,"url":"https://patchwork.plctlab.org/api/1.2/patches/23635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101338.259014-1-poulhies@adacore.com/","msgid":"<20221121101338.259014-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:38","name":"[COMMITTED] ada: Fix gnatmake'\''s parsing of adc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101338.259014-1-poulhies@adacore.com/mbox/"},{"id":23640,"url":"https://patchwork.plctlab.org/api/1.2/patches/23640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101346.259079-1-poulhies@adacore.com/","msgid":"<20221121101346.259079-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:46","name":"[COMMITTED] ada: Reject nonconfirming Size attribute value for aliased object","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101346.259079-1-poulhies@adacore.com/mbox/"},{"id":23641,"url":"https://patchwork.plctlab.org/api/1.2/patches/23641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101356.259145-1-poulhies@adacore.com/","msgid":"<20221121101356.259145-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:13:56","name":"[COMMITTED] ada: Improve documentation for -gnatw.h warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101356.259145-1-poulhies@adacore.com/mbox/"},{"id":23648,"url":"https://patchwork.plctlab.org/api/1.2/patches/23648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101405.259209-1-poulhies@adacore.com/","msgid":"<20221121101405.259209-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:05","name":"[COMMITTED] ada: Move warnings switches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101405.259209-1-poulhies@adacore.com/mbox/"},{"id":23645,"url":"https://patchwork.plctlab.org/api/1.2/patches/23645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101410.259273-1-poulhies@adacore.com/","msgid":"<20221121101410.259273-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:10","name":"[COMMITTED] ada: Disable subprogram call validation in CodePeer mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101410.259273-1-poulhies@adacore.com/mbox/"},{"id":23639,"url":"https://patchwork.plctlab.org/api/1.2/patches/23639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101418.259338-1-poulhies@adacore.com/","msgid":"<20221121101418.259338-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:18","name":"[COMMITTED] ada: Ada 2022 Image attribute bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101418.259338-1-poulhies@adacore.com/mbox/"},{"id":23647,"url":"https://patchwork.plctlab.org/api/1.2/patches/23647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101426.259405-1-poulhies@adacore.com/","msgid":"<20221121101426.259405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:26","name":"[COMMITTED] ada: Small cleanup in Expand_N_Object_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101426.259405-1-poulhies@adacore.com/mbox/"},{"id":23650,"url":"https://patchwork.plctlab.org/api/1.2/patches/23650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101431.259470-1-poulhies@adacore.com/","msgid":"<20221121101431.259470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:31","name":"[COMMITTED] ada: Internal compiler error for Sequential Partition_Elaboration_Policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101431.259470-1-poulhies@adacore.com/mbox/"},{"id":23644,"url":"https://patchwork.plctlab.org/api/1.2/patches/23644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101437.259534-1-poulhies@adacore.com/","msgid":"<20221121101437.259534-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:37","name":"[COMMITTED] ada: Minor tweak in assertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101437.259534-1-poulhies@adacore.com/mbox/"},{"id":23651,"url":"https://patchwork.plctlab.org/api/1.2/patches/23651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101444.259598-1-poulhies@adacore.com/","msgid":"<20221121101444.259598-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:44","name":"[COMMITTED] ada: Order pragmas alphabetically in reference manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101444.259598-1-poulhies@adacore.com/mbox/"},{"id":23643,"url":"https://patchwork.plctlab.org/api/1.2/patches/23643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101449.259662-1-poulhies@adacore.com/","msgid":"<20221121101449.259662-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:49","name":"[COMMITTED] ada: Do not share Packed Array Type if sizes of types differ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101449.259662-1-poulhies@adacore.com/mbox/"},{"id":23646,"url":"https://patchwork.plctlab.org/api/1.2/patches/23646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101453.259725-1-poulhies@adacore.com/","msgid":"<20221121101453.259725-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-21T10:14:53","name":"[COMMITTED] ada: Adjust recent change for returns involving function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121101453.259725-1-poulhies@adacore.com/mbox/"},{"id":23652,"url":"https://patchwork.plctlab.org/api/1.2/patches/23652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121102909.1603846-1-ibuclaw@gdcproject.org/","msgid":"<20221121102909.1603846-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-21T10:29:09","name":"maintainer-scripts: Add gdc to update_web_docs_git","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121102909.1603846-1-ibuclaw@gdcproject.org/mbox/"},{"id":23693,"url":"https://patchwork.plctlab.org/api/1.2/patches/23693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115720.2510778-1-philipp.tomsich@vrull.eu/","msgid":"<20221121115720.2510778-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2022-11-21T11:57:20","name":"[PR107786,COMMITTED] RISC-V: Fix ICE in branch_shiftedarith_equals_zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115720.2510778-1-philipp.tomsich@vrull.eu/mbox/"},{"id":23698,"url":"https://patchwork.plctlab.org/api/1.2/patches/23698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115915.374247-1-christophe.lyon@arm.com/","msgid":"<20221121115915.374247-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-21T11:59:15","name":"genmultilib: Fix sanity check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121115915.374247-1-christophe.lyon@arm.com/mbox/"},{"id":23748,"url":"https://patchwork.plctlab.org/api/1.2/patches/23748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com/","msgid":"<23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com>","list_archive_url":null,"date":"2022-11-21T13:40:59","name":"libgomp/gcn: fix/improve struct output (was: [Patch] libgomp/gcn: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23880d62-9f02-8073-a8ea-52032f979089@codesourcery.com/mbox/"},{"id":23941,"url":"https://patchwork.plctlab.org/api/1.2/patches/23941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMWq0RZKyuQQ4uQ8eT2abg=N0MQEpoQ1TvSiZUz+kvEb-A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T16:35:18","name":"Remove legacy VRP (maybe?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGm3qMWq0RZKyuQQ4uQ8eT2abg=N0MQEpoQ1TvSiZUz+kvEb-A@mail.gmail.com/mbox/"},{"id":23991,"url":"https://patchwork.plctlab.org/api/1.2/patches/23991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185115.2021818-1-jwakely@redhat.com/","msgid":"<20221121185115.2021818-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:15","name":"[committed] libstdc++: Improve Doxygen comments in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185115.2021818-1-jwakely@redhat.com/mbox/"},{"id":23993,"url":"https://patchwork.plctlab.org/api/1.2/patches/23993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185123.2021836-1-jwakely@redhat.com/","msgid":"<20221121185123.2021836-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:23","name":"[committed] libstdc++: Check static assertions earlier in chrono::duration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185123.2021836-1-jwakely@redhat.com/mbox/"},{"id":23992,"url":"https://patchwork.plctlab.org/api/1.2/patches/23992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185130.2021855-1-jwakely@redhat.com/","msgid":"<20221121185130.2021855-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T18:51:30","name":"[committed] libstdc++: Reduce size of std::bind_front(F) result","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121185130.2021855-1-jwakely@redhat.com/mbox/"},{"id":24011,"url":"https://patchwork.plctlab.org/api/1.2/patches/24011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121204341.2024118-1-jwakely@redhat.com/","msgid":"<20221121204341.2024118-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-21T20:43:41","name":"libstdc++: Make chrono::hh_mm_ss more compact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121204341.2024118-1-jwakely@redhat.com/mbox/"},{"id":24016,"url":"https://patchwork.plctlab.org/api/1.2/patches/24016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E6C2EE445568BFA6BA4910A9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T21:26:49","name":"Fix count comparison in ipa-cp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB35427E6C2EE445568BFA6BA4910A9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":24039,"url":"https://patchwork.plctlab.org/api/1.2/patches/24039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F5D5271CA9CEEE3C4EF9910A9@CY5PR21MB3542.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-11-21T21:57:29","name":"Fix autoprofiledbootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CY5PR21MB3542F5D5271CA9CEEE3C4EF9910A9@CY5PR21MB3542.namprd21.prod.outlook.com/mbox/"},{"id":24044,"url":"https://patchwork.plctlab.org/api/1.2/patches/24044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wC9ytEbTC0OidM@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-21T23:00:07","name":"c++: Fix up -fcontract* options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wC9ytEbTC0OidM@tucnak/mbox/"},{"id":24045,"url":"https://patchwork.plctlab.org/api/1.2/patches/24045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wDPIFQikJu2Opz@wildebeest.org/","msgid":"","list_archive_url":null,"date":"2022-11-21T23:01:16","name":"Activate gcc builder problem emails (Was: [PATCH v2] genmultilib: Add sanity check)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3wDPIFQikJu2Opz@wildebeest.org/mbox/"},{"id":24047,"url":"https://patchwork.plctlab.org/api/1.2/patches/24047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121233147.523576-1-jason@redhat.com/","msgid":"<20221121233147.523576-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-21T23:31:47","name":"[RFA(configure)] c++: provide strchrnul on targets without it [PR107781]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221121233147.523576-1-jason@redhat.com/mbox/"},{"id":24058,"url":"https://patchwork.plctlab.org/api/1.2/patches/24058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001410.3254534-1-dmalcolm@redhat.com/","msgid":"<20221122001410.3254534-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:10","name":"[committed] analyzer, testsuite: add more examples taken from CWE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001410.3254534-1-dmalcolm@redhat.com/mbox/"},{"id":24059,"url":"https://patchwork.plctlab.org/api/1.2/patches/24059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001421.3254582-1-dmalcolm@redhat.com/","msgid":"<20221122001421.3254582-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:21","name":"[committed] analyzer: fix ICE on writes to errno [PR107777]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001421.3254582-1-dmalcolm@redhat.com/mbox/"},{"id":24061,"url":"https://patchwork.plctlab.org/api/1.2/patches/24061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001446.3254636-1-dmalcolm@redhat.com/","msgid":"<20221122001446.3254636-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:14:46","name":"[committed] analyzer: fix ICE on '\''bind'\'' with non-pointer arg [P107783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001446.3254636-1-dmalcolm@redhat.com/mbox/"},{"id":24060,"url":"https://patchwork.plctlab.org/api/1.2/patches/24060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001500.3254683-1-dmalcolm@redhat.com/","msgid":"<20221122001500.3254683-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T00:15:00","name":"[committed] analyzer: fix ICE on '\''bind'\'' that returns a struct [PR107788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122001500.3254683-1-dmalcolm@redhat.com/mbox/"},{"id":24100,"url":"https://patchwork.plctlab.org/api/1.2/patches/24100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122012609.550872-1-jason@redhat.com/","msgid":"<20221122012609.550872-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-22T01:26:09","name":"[pushed] c++: contracts fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122012609.550872-1-jason@redhat.com/mbox/"},{"id":24170,"url":"https://patchwork.plctlab.org/api/1.2/patches/24170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122070540.F235B13AA1@imap2.suse-dmz.suse.de/","msgid":"<20221122070540.F235B13AA1@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-22T07:05:40","name":"tree-optimization/107766 - ICE with recent -ffp-contract=off fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122070540.F235B13AA1@imap2.suse-dmz.suse.de/mbox/"},{"id":24179,"url":"https://patchwork.plctlab.org/api/1.2/patches/24179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de/","msgid":"<80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de>","list_archive_url":null,"date":"2022-11-22T08:00:51","name":"speed up end_fde_sort using radix sort","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80659153-a4ea-8f66-c317-a8a750f34a01@in.tum.de/mbox/"},{"id":24199,"url":"https://patchwork.plctlab.org/api/1.2/patches/24199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084235.1216435-1-chenyixuan@iscas.ac.cn/","msgid":"<20221122084235.1216435-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-22T08:42:35","name":"Riscv don'\''t support \"-fprefetch-loop-arrays\", skip.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084235.1216435-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":24200,"url":"https://patchwork.plctlab.org/api/1.2/patches/24200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084850.B6CA313B01@imap2.suse-dmz.suse.de/","msgid":"<20221122084850.B6CA313B01@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-22T08:48:50","name":"tree-optimization/107672 - avoid vector mode type_for_mode call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122084850.B6CA313B01@imap2.suse-dmz.suse.de/mbox/"},{"id":24216,"url":"https://patchwork.plctlab.org/api/1.2/patches/24216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122090114.38090-1-christophe.lyon@arm.com/","msgid":"<20221122090114.38090-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-22T09:01:14","name":"aarch64: Fix test_dfp_17.c for big-endian [PR 107604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122090114.38090-1-christophe.lyon@arm.com/mbox/"},{"id":24220,"url":"https://patchwork.plctlab.org/api/1.2/patches/24220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3yXEaqKdvWxf9v0@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-22T09:32:01","name":"c-family: Fix up -Wsign-compare BIT_NOT_EXPR handling [PR107465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3yXEaqKdvWxf9v0@tucnak/mbox/"},{"id":24223,"url":"https://patchwork.plctlab.org/api/1.2/patches/24223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f680ae3e-7819-22e0-ca83-72c98135e034@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-22T09:41:28","name":"d: respect --enable-link-mutex configure option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f680ae3e-7819-22e0-ca83-72c98135e034@suse.cz/mbox/"},{"id":24231,"url":"https://patchwork.plctlab.org/api/1.2/patches/24231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122094842.2629693-1-chenyixuan@iscas.ac.cn/","msgid":"<20221122094842.2629693-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2022-11-22T09:48:42","name":"Ver2: Riscv don'\''t support \"-fprefetch-loop-arrays\" option, add \"-w\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122094842.2629693-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":24260,"url":"https://patchwork.plctlab.org/api/1.2/patches/24260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122104019.2092679-1-jwakely@redhat.com/","msgid":"<20221122104019.2092679-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T10:40:19","name":"[committed] libstdc++: Fix pool resource build errors for H8 [PR107801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122104019.2092679-1-jwakely@redhat.com/mbox/"},{"id":24268,"url":"https://patchwork.plctlab.org/api/1.2/patches/24268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4442231.LvFx2qVVIh@fomalhaut/","msgid":"<4442231.LvFx2qVVIh@fomalhaut>","list_archive_url":null,"date":"2022-11-22T11:05:16","name":"Fix wrong array type conversion with different storage order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4442231.LvFx2qVVIh@fomalhaut/mbox/"},{"id":24267,"url":"https://patchwork.plctlab.org/api/1.2/patches/24267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122110602.94F003857C71@sourceware.org/","msgid":"<20221122110602.94F003857C71@sourceware.org>","list_archive_url":null,"date":"2022-11-22T11:05:16","name":"tree-optimization/107803 - abnormal cleanup from the SSA propagator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122110602.94F003857C71@sourceware.org/mbox/"},{"id":24335,"url":"https://patchwork.plctlab.org/api/1.2/patches/24335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9fqixe.fsf@oldenburg.str.redhat.com/","msgid":"<87cz9fqixe.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2022-11-22T12:21:01","name":"c: Propagate erroneous types to declaration specifiers [PR107805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9fqixe.fsf@oldenburg.str.redhat.com/mbox/"},{"id":24338,"url":"https://patchwork.plctlab.org/api/1.2/patches/24338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123620.336156-1-poulhies@adacore.com/","msgid":"<20221122123620.336156-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:20","name":"[COMMITTED] ada: Fix recent assertion failure on GPR2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123620.336156-1-poulhies@adacore.com/mbox/"},{"id":24339,"url":"https://patchwork.plctlab.org/api/1.2/patches/24339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123639.336264-1-poulhies@adacore.com/","msgid":"<20221122123639.336264-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:39","name":"[COMMITTED] ada: Fix formatting glitches in Make_Tag_Assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123639.336264-1-poulhies@adacore.com/mbox/"},{"id":24340,"url":"https://patchwork.plctlab.org/api/1.2/patches/24340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123646.336327-1-poulhies@adacore.com/","msgid":"<20221122123646.336327-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:46","name":"[COMMITTED] ada: Adjust number of errors when removing warning in dead code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123646.336327-1-poulhies@adacore.com/mbox/"},{"id":24341,"url":"https://patchwork.plctlab.org/api/1.2/patches/24341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123654.336392-1-poulhies@adacore.com/","msgid":"<20221122123654.336392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:54","name":"[COMMITTED] ada: Disable checking of Elab_Spec procedures in CodePeer_Mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123654.336392-1-poulhies@adacore.com/mbox/"},{"id":24342,"url":"https://patchwork.plctlab.org/api/1.2/patches/24342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123659.336456-1-poulhies@adacore.com/","msgid":"<20221122123659.336456-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-22T12:36:59","name":"[COMMITTED] ada: Accept aspects Global and Depends on abstract subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122123659.336456-1-poulhies@adacore.com/mbox/"},{"id":24389,"url":"https://patchwork.plctlab.org/api/1.2/patches/24389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-1-aldyh@redhat.com/","msgid":"<20221122135801.1945438-1-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:57:59","name":"Remove ASSERT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-1-aldyh@redhat.com/mbox/"},{"id":24391,"url":"https://patchwork.plctlab.org/api/1.2/patches/24391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-2-aldyh@redhat.com/","msgid":"<20221122135801.1945438-2-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:58:00","name":"Remove follow_assert_exprs from overflow_comparison.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-2-aldyh@redhat.com/mbox/"},{"id":24390,"url":"https://patchwork.plctlab.org/api/1.2/patches/24390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-3-aldyh@redhat.com/","msgid":"<20221122135801.1945438-3-aldyh@redhat.com>","list_archive_url":null,"date":"2022-11-22T13:58:01","name":"Remove use_equiv_p in vr-values.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122135801.1945438-3-aldyh@redhat.com/mbox/"},{"id":24401,"url":"https://patchwork.plctlab.org/api/1.2/patches/24401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edtvulho.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-22T14:12:03","name":"ipa-cp: Do not be too optimistic about self-recursive edges (PR 107661)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edtvulho.fsf@suse.cz/mbox/"},{"id":24408,"url":"https://patchwork.plctlab.org/api/1.2/patches/24408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122142955.677712-1-jason@redhat.com/","msgid":"<20221122142955.677712-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-22T14:29:55","name":"[pushed] c++: don'\''t use strchrnul [PR107781]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122142955.677712-1-jason@redhat.com/mbox/"},{"id":24494,"url":"https://patchwork.plctlab.org/api/1.2/patches/24494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175454.2141215-1-jwakely@redhat.com/","msgid":"<20221122175454.2141215-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T17:54:54","name":"[committed] libstdc++: Add testcase for fs::path constraint recursion [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175454.2141215-1-jwakely@redhat.com/mbox/"},{"id":24495,"url":"https://patchwork.plctlab.org/api/1.2/patches/24495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175502.2141235-1-jwakely@redhat.com/","msgid":"<20221122175502.2141235-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T17:55:02","name":"[committed] libstdc++: Replace std::isdigit and std::isxdigit in [PR107817]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122175502.2141235-1-jwakely@redhat.com/mbox/"},{"id":24594,"url":"https://patchwork.plctlab.org/api/1.2/patches/24594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122215026.2156686-1-jwakely@redhat.com/","msgid":"<20221122215026.2156686-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-22T21:50:26","name":"[committed] libstdc++: Add workaround for fs::path constraint recursion [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122215026.2156686-1-jwakely@redhat.com/mbox/"},{"id":24598,"url":"https://patchwork.plctlab.org/api/1.2/patches/24598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dbdce3d4-1d85-4628-b9ea-d4935aaa02df-1669153996745@3c-app-gmx-bap12/","msgid":"","list_archive_url":null,"date":"2022-11-22T21:53:16","name":"Fortran: error recovery on associate with bad selector [PR107577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dbdce3d4-1d85-4628-b9ea-d4935aaa02df-1669153996745@3c-app-gmx-bap12/mbox/"},{"id":24606,"url":"https://patchwork.plctlab.org/api/1.2/patches/24606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223633.3308746-1-dmalcolm@redhat.com/","msgid":"<20221122223633.3308746-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:33","name":"[committed] analyzer: eliminate region_model::impl_call_* special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223633.3308746-1-dmalcolm@redhat.com/mbox/"},{"id":24607,"url":"https://patchwork.plctlab.org/api/1.2/patches/24607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223649.3308793-1-dmalcolm@redhat.com/","msgid":"<20221122223649.3308793-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:49","name":"[committed] analyzer: fix '\''errno'\'' on Solaris and OS X [PR107807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223649.3308793-1-dmalcolm@redhat.com/mbox/"},{"id":24608,"url":"https://patchwork.plctlab.org/api/1.2/patches/24608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223659.3308837-1-dmalcolm@redhat.com/","msgid":"<20221122223659.3308837-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:36:59","name":"[committed] analyzer: fix ICE on '\''bind(INT_CST, ...)'\'' [PR107783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223659.3308837-1-dmalcolm@redhat.com/mbox/"},{"id":24609,"url":"https://patchwork.plctlab.org/api/1.2/patches/24609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223711.3308884-1-dmalcolm@redhat.com/","msgid":"<20221122223711.3308884-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-22T22:37:11","name":"[committed] analyzer: only look for named functions in root ns [PR107788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221122223711.3308884-1-dmalcolm@redhat.com/mbox/"},{"id":24627,"url":"https://patchwork.plctlab.org/api/1.2/patches/24627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com/","msgid":"<293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com>","list_archive_url":null,"date":"2022-11-22T23:20:58","name":"[committed,RISC-V] Fix recent rvv/base/spill testcase failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/293c6900-a6b8-9bcb-9752-5f41554e80c5@ventanamicro.com/mbox/"},{"id":24628,"url":"https://patchwork.plctlab.org/api/1.2/patches/24628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db876775-3e1b-172f-18e3-d593ef766832@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2022-11-22T23:24:36","name":"[committed] Fix comment typos noticed by Bernhard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db876775-3e1b-172f-18e3-d593ef766832@ventanamicro.com/mbox/"},{"id":24664,"url":"https://patchwork.plctlab.org/api/1.2/patches/24664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com/","msgid":"<4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com>","list_archive_url":null,"date":"2022-11-23T02:54:42","name":"Change the behavior of predicate check failure on cbranchcc4 operand0 in prepare_cmp_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a052a62-7861-ed6f-9801-3b58ac384f81@linux.ibm.com/mbox/"},{"id":24740,"url":"https://patchwork.plctlab.org/api/1.2/patches/24740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123064934.1560808-1-chenglulu@loongson.cn/","msgid":"<20221123064934.1560808-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-11-23T06:49:35","name":"[v1] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123064934.1560808-1-chenglulu@loongson.cn/mbox/"},{"id":24752,"url":"https://patchwork.plctlab.org/api/1.2/patches/24752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com/","msgid":"<75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com>","list_archive_url":null,"date":"2022-11-23T07:08:44","name":"Add a new conversion for conditional ternary set into ifcvt [PR106536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75fb4899-ceb2-e6a9-0dd4-577de9a8b976@linux.ibm.com/mbox/"},{"id":24800,"url":"https://patchwork.plctlab.org/api/1.2/patches/24800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33fGGNXV6JNCK1p@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:51:36","name":"diagnostics: Fix selftest ICE in certain locales [PR107722]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33fGGNXV6JNCK1p@tucnak/mbox/"},{"id":24801,"url":"https://patchwork.plctlab.org/api/1.2/patches/24801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33f5EQ0InVdAs3/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:55:00","name":"libstdc++: Fix libstdc++ build on some targets [PR107811]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33f5EQ0InVdAs3/@tucnak/mbox/"},{"id":24802,"url":"https://patchwork.plctlab.org/api/1.2/patches/24802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33hBb0fLsB9QjWU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T08:59:49","name":"c: Fix compile time hog in c_genericize [PR107127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y33hBb0fLsB9QjWU@tucnak/mbox/"},{"id":24826,"url":"https://patchwork.plctlab.org/api/1.2/patches/24826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ac22ef05-6313-23fc-5972-e97b380601fe@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-23T09:40:23","name":"lto: fix usage of timer in materialize_cgraph","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ac22ef05-6313-23fc-5972-e97b380601fe@suse.cz/mbox/"},{"id":24846,"url":"https://patchwork.plctlab.org/api/1.2/patches/24846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123101038.2192550-1-jwakely@redhat.com/","msgid":"<20221123101038.2192550-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-23T10:10:38","name":"doc: -Wdelete-non-virtual-dtor supersedes -Wnon-virtual-dtor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123101038.2192550-1-jwakely@redhat.com/mbox/"},{"id":24847,"url":"https://patchwork.plctlab.org/api/1.2/patches/24847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123102116.2194553-1-jwakely@redhat.com/","msgid":"<20221123102116.2194553-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-23T10:21:16","name":"[committed] libstdc++: Fix unsafe use of dirent::d_name [PR107814]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123102116.2194553-1-jwakely@redhat.com/mbox/"},{"id":24891,"url":"https://patchwork.plctlab.org/api/1.2/patches/24891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3331bxiUwkukHjb@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-23T10:37:09","name":"c-family: Incremental fix for -Wsign-compare BIT_NOT_EXPR handling [PR107465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3331bxiUwkukHjb@tucnak/mbox/"},{"id":24946,"url":"https://patchwork.plctlab.org/api/1.2/patches/24946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123122820.3150670-1-hongtao.liu@intel.com/","msgid":"<20221123122820.3150670-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-23T12:28:20","name":"[x86] Fix incorrect implementation for mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221123122820.3150670-1-hongtao.liu@intel.com/mbox/"},{"id":24951,"url":"https://patchwork.plctlab.org/api/1.2/patches/24951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt8hpzro.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-11-23T13:27:07","name":"analyzer: Use __builtin_alloca in gcc.dg/analyzer/call-summaries-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt8hpzro.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":24973,"url":"https://patchwork.plctlab.org/api/1.2/patches/24973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru/","msgid":"<9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru>","list_archive_url":null,"date":"2022-11-23T13:29:46","name":"Make Warray-bounds alias to Warray-bounds= [PR107787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9795E6AA-E646-4134-AABE-23F530F5219E@ispras.ru/mbox/"},{"id":25010,"url":"https://patchwork.plctlab.org/api/1.2/patches/25010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16645-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-23T14:24:44","name":"AArch64 sve2: Fix expansion of division [PR107830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16645-tamar@arm.com/mbox/"},{"id":25279,"url":"https://patchwork.plctlab.org/api/1.2/patches/25279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124012200.103783-1-hongtao.liu@intel.com/","msgid":"<20221124012200.103783-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-24T01:22:00","name":"[v2,x86] Fix incorrect _mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124012200.103783-1-hongtao.liu@intel.com/mbox/"},{"id":25282,"url":"https://patchwork.plctlab.org/api/1.2/patches/25282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-1-dmalcolm@redhat.com/","msgid":"<20221124015203.3367244-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:02","name":"[committed,1/2] analyzer: move known funs for fds to sm-fd.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-1-dmalcolm@redhat.com/mbox/"},{"id":25281,"url":"https://patchwork.plctlab.org/api/1.2/patches/25281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-2-dmalcolm@redhat.com/","msgid":"<20221124015203.3367244-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:03","name":"[committed,2/2] analyzer: eliminate region_model::on_ fns for sockets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015203.3367244-2-dmalcolm@redhat.com/mbox/"},{"id":25284,"url":"https://patchwork.plctlab.org/api/1.2/patches/25284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015221.3367288-1-dmalcolm@redhat.com/","msgid":"<20221124015221.3367288-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:21","name":"[committed] analyzer: fix nondeterminism in logs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015221.3367288-1-dmalcolm@redhat.com/mbox/"},{"id":25283,"url":"https://patchwork.plctlab.org/api/1.2/patches/25283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015233.3367331-1-dmalcolm@redhat.com/","msgid":"<20221124015233.3367331-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-24T01:52:33","name":"[committed] analyzer: revamp of heap-allocated regions [PR106473]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124015233.3367331-1-dmalcolm@redhat.com/mbox/"},{"id":25343,"url":"https://patchwork.plctlab.org/api/1.2/patches/25343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e42c1e38-a53e-885d-8e0a-6b4d218c6328@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-24T07:42:43","name":"[(pushed)] analyzer: fix Clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e42c1e38-a53e-885d-8e0a-6b4d218c6328@suse.cz/mbox/"},{"id":25390,"url":"https://patchwork.plctlab.org/api/1.2/patches/25390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3810xiZcwOyI+7f@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:13:55","name":"c++: Don'\''t clear TREE_READONLY for -fmerge-all-constants for non-aggregates [PR107558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y3810xiZcwOyI+7f@tucnak/mbox/"},{"id":25396,"url":"https://patchwork.plctlab.org/api/1.2/patches/25396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-2-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-2-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:49","name":"[1/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-2-linkw@linux.ibm.com/mbox/"},{"id":25398,"url":"https://patchwork.plctlab.org/api/1.2/patches/25398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-3-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-3-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:50","name":"[2/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-3-linkw@linux.ibm.com/mbox/"},{"id":25391,"url":"https://patchwork.plctlab.org/api/1.2/patches/25391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-4-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-4-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:51","name":"[3/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-4-linkw@linux.ibm.com/mbox/"},{"id":25399,"url":"https://patchwork.plctlab.org/api/1.2/patches/25399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-5-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-5-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:52","name":"[4/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-5-linkw@linux.ibm.com/mbox/"},{"id":25401,"url":"https://patchwork.plctlab.org/api/1.2/patches/25401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-6-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-6-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:53","name":"[5/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-6-linkw@linux.ibm.com/mbox/"},{"id":25392,"url":"https://patchwork.plctlab.org/api/1.2/patches/25392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-7-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-7-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:54","name":"[6/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-7-linkw@linux.ibm.com/mbox/"},{"id":25397,"url":"https://patchwork.plctlab.org/api/1.2/patches/25397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-8-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-8-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:55","name":"[7/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-8-linkw@linux.ibm.com/mbox/"},{"id":25402,"url":"https://patchwork.plctlab.org/api/1.2/patches/25402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-9-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-9-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:56","name":"[8/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-9-linkw@linux.ibm.com/mbox/"},{"id":25393,"url":"https://patchwork.plctlab.org/api/1.2/patches/25393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-10-linkw@linux.ibm.com/","msgid":"<20221124091557.514727-10-linkw@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:15:57","name":"[9/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124091557.514727-10-linkw@linux.ibm.com/mbox/"},{"id":25400,"url":"https://patchwork.plctlab.org/api/1.2/patches/25400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y383ZmQYu/NFCmpI@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:20:38","name":"libstdc++: Workaround buggy printf on Solaris in to_chars/float128_c++23.cc test [PR107815]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y383ZmQYu/NFCmpI@tucnak/mbox/"},{"id":25403,"url":"https://patchwork.plctlab.org/api/1.2/patches/25403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384D/1PiDqjqBdt@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:23:27","name":"libstdc++: Another merge from fast_float upstream [PR107468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384D/1PiDqjqBdt@tucnak/mbox/"},{"id":25404,"url":"https://patchwork.plctlab.org/api/1.2/patches/25404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384/VPTaUH2+Bi5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:27:25","name":"asan: Fix up error recovery for too large frames [PR107317]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y384/VPTaUH2+Bi5@tucnak/mbox/"},{"id":25405,"url":"https://patchwork.plctlab.org/api/1.2/patches/25405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y387Ra+X63ssy1UG@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T09:37:09","name":"[committed] testsuite: Fix up broken testcase [PR107127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y387Ra+X63ssy1UG@tucnak/mbox/"},{"id":25409,"url":"https://patchwork.plctlab.org/api/1.2/patches/25409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124094148.125303-1-guojiufu@linux.ibm.com/","msgid":"<20221124094148.125303-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-24T09:41:48","name":"[V2] Update block move for struct param or returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124094148.125303-1-guojiufu@linux.ibm.com/mbox/"},{"id":25420,"url":"https://patchwork.plctlab.org/api/1.2/patches/25420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101245.445226-1-poulhies@adacore.com/","msgid":"<20221124101245.445226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-24T10:12:45","name":"[COMMITTED] ada: Spurious error on Lock_Free protected type with discriminants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101245.445226-1-poulhies@adacore.com/mbox/"},{"id":25421,"url":"https://patchwork.plctlab.org/api/1.2/patches/25421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101258.445328-1-poulhies@adacore.com/","msgid":"<20221124101258.445328-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-24T10:12:58","name":"[COMMITTED] ada: Add assertion for the implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221124101258.445328-1-poulhies@adacore.com/mbox/"},{"id":25442,"url":"https://patchwork.plctlab.org/api/1.2/patches/25442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y39OUfw+3mJJirzf@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-24T10:58:25","name":"[committed] c++: Further -fcontract* option description fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y39OUfw+3mJJirzf@tucnak/mbox/"},{"id":25585,"url":"https://patchwork.plctlab.org/api/1.2/patches/25585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrwn7kv2dv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-24T14:43:56","name":"[35/35,V2] arm: improve tests for vsetq_lane*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrwn7kv2dv.fsf_-_@arm.com/mbox/"},{"id":25657,"url":"https://patchwork.plctlab.org/api/1.2/patches/25657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com/","msgid":"<64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com>","list_archive_url":null,"date":"2022-11-24T17:48:01","name":"libgomp: Add no-target-region rev offload test + fix plugin-nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64661eda-7f5f-da60-894f-00f90f1def04@codesourcery.com/mbox/"},{"id":25696,"url":"https://patchwork.plctlab.org/api/1.2/patches/25696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com/","msgid":"<5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com>","list_archive_url":null,"date":"2022-11-24T20:43:34","name":"gcc/jit/jit-recording.cc: recording::global::write_to_dump: Avoid crashes when writing psuedo-C for globals with string initializers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5bcb69810185bfa4d614aef0c57fb4641b1ae2eb.camel@gmail.com/mbox/"},{"id":25765,"url":"https://patchwork.plctlab.org/api/1.2/patches/25765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002131.41071-1-jwakely@redhat.com/","msgid":"<20221125002131.41071-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T00:21:31","name":"[committed] libstdc++: Update tests on trunk [PR106201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002131.41071-1-jwakely@redhat.com/mbox/"},{"id":25766,"url":"https://patchwork.plctlab.org/api/1.2/patches/25766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002356.42216-1-jwakely@redhat.com/","msgid":"<20221125002356.42216-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T00:23:56","name":"[committed] libstdc++: Change return type of std::bit_width to int (LWG 3656)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125002356.42216-1-jwakely@redhat.com/mbox/"},{"id":25781,"url":"https://patchwork.plctlab.org/api/1.2/patches/25781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f57923-175a-82ca-5c0f-769ac916647d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-25T02:13:38","name":"[OpenMP] GC unused SIMD clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f57923-175a-82ca-5c0f-769ac916647d@codesourcery.com/mbox/"},{"id":25824,"url":"https://patchwork.plctlab.org/api/1.2/patches/25824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125053904.1984263-1-hongtao.liu@intel.com/","msgid":"<20221125053904.1984263-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-25T05:39:04","name":"[V3,x86] Fix incorrect _mm_cvtsbh_ss.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125053904.1984263-1-hongtao.liu@intel.com/mbox/"},{"id":25872,"url":"https://patchwork.plctlab.org/api/1.2/patches/25872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075921.0706813A08@imap2.suse-dmz.suse.de/","msgid":"<20221125075921.0706813A08@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-25T07:59:20","name":"tree-optimization/107865 - ICE with outlining of loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075921.0706813A08@imap2.suse-dmz.suse.de/mbox/"},{"id":25873,"url":"https://patchwork.plctlab.org/api/1.2/patches/25873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075944.7DA6713A08@imap2.suse-dmz.suse.de/","msgid":"<20221125075944.7DA6713A08@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-25T07:59:44","name":"tree-optimization/106912 - IPA profile and pure/const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125075944.7DA6713A08@imap2.suse-dmz.suse.de/mbox/"},{"id":25883,"url":"https://patchwork.plctlab.org/api/1.2/patches/25883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12106563.O9o76ZdvQC@fomalhaut/","msgid":"<12106563.O9o76ZdvQC@fomalhaut>","list_archive_url":null,"date":"2022-11-25T09:21:52","name":"Fix thinko in operator_bitwise_xor::op1_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12106563.O9o76ZdvQC@fomalhaut/mbox/"},{"id":25915,"url":"https://patchwork.plctlab.org/api/1.2/patches/25915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com/","msgid":"<78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com>","list_archive_url":null,"date":"2022-11-25T10:34:35","name":"libgomp.texi: OpenMP Impl Status 5.1 additions + TR11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78217b1a-477e-912c-f5b0-884a298ddbf1@codesourcery.com/mbox/"},{"id":25930,"url":"https://patchwork.plctlab.org/api/1.2/patches/25930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9bl28f.fsf@euler.schwinge.homeip.net/","msgid":"<87cz9bl28f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-11-25T11:09:36","name":"[PING] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz9bl28f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":25994,"url":"https://patchwork.plctlab.org/api/1.2/patches/25994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68f00ea-199b-2980-0ae6-df53da370a5c@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-25T12:57:35","name":"i386: fix assert (__builtin_cpu_supports (\"x86-64\") >= 0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68f00ea-199b-2980-0ae6-df53da370a5c@suse.cz/mbox/"},{"id":26022,"url":"https://patchwork.plctlab.org/api/1.2/patches/26022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4DM8FVKsEnXonyu@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-11-25T14:10:56","name":"Fix resolution streaming with incremental linking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4DM8FVKsEnXonyu@kam.mff.cuni.cz/mbox/"},{"id":26027,"url":"https://patchwork.plctlab.org/api/1.2/patches/26027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125143229.3232391-1-rearnsha@arm.com/","msgid":"<20221125143229.3232391-1-rearnsha@arm.com>","list_archive_url":null,"date":"2022-11-25T14:32:29","name":"sync libsframe toplevel from binutils-gdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125143229.3232391-1-rearnsha@arm.com/mbox/"},{"id":26058,"url":"https://patchwork.plctlab.org/api/1.2/patches/26058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150804.128740-1-jwakely@redhat.com/","msgid":"<20221125150804.128740-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:04","name":"[committed] libstdc++: Add always_inline to trivial iterator operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150804.128740-1-jwakely@redhat.com/mbox/"},{"id":26059,"url":"https://patchwork.plctlab.org/api/1.2/patches/26059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150816.128776-1-jwakely@redhat.com/","msgid":"<20221125150816.128776-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:16","name":"[committed] libstdc++: Do not define operator!= in for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150816.128776-1-jwakely@redhat.com/mbox/"},{"id":26063,"url":"https://patchwork.plctlab.org/api/1.2/patches/26063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150830.128794-1-jwakely@redhat.com/","msgid":"<20221125150830.128794-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:30","name":"[committed] libstdc++: Call predicate with non-const values in std::erase_if [PR107850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150830.128794-1-jwakely@redhat.com/mbox/"},{"id":26065,"url":"https://patchwork.plctlab.org/api/1.2/patches/26065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150839.128831-1-jwakely@redhat.com/","msgid":"<20221125150839.128831-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-25T15:08:39","name":"[committed] libstdc++: Fix orphaned/nested output of configure checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125150839.128831-1-jwakely@redhat.com/mbox/"},{"id":26088,"url":"https://patchwork.plctlab.org/api/1.2/patches/26088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125160639.43024-1-juzhe.zhong@rivai.ai/","msgid":"<20221125160639.43024-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-25T16:06:39","name":"RISC-V: Add duplicate vector support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221125160639.43024-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26278,"url":"https://patchwork.plctlab.org/api/1.2/patches/26278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669480898-21885-1-git-send-email-apinski@marvell.com/","msgid":"<1669480898-21885-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-26T16:41:38","name":"tree-optimization/103356 Add missing (~a) == b folding for _Bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669480898-21885-1-git-send-email-apinski@marvell.com/mbox/"},{"id":26306,"url":"https://patchwork.plctlab.org/api/1.2/patches/26306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127021613.432881-1-softwaresale01@gmail.com/","msgid":"<20221127021613.432881-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2022-11-27T02:16:13","name":"rtl: add predicates for addition, subtraction & multiplication","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127021613.432881-1-softwaresale01@gmail.com/mbox/"},{"id":26383,"url":"https://patchwork.plctlab.org/api/1.2/patches/26383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127170256.3803408-1-christoph.muellner@vrull.eu/","msgid":"<20221127170256.3803408-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-11-27T17:02:56","name":"[v2] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221127170256.3803408-1-christoph.muellner@vrull.eu/mbox/"},{"id":26410,"url":"https://patchwork.plctlab.org/api/1.2/patches/26410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2d7545f7-09e7-44d8-ba71-166690b820a8-1669581157254@3c-app-gmx-bap47/","msgid":"","list_archive_url":null,"date":"2022-11-27T20:32:37","name":"Fortran: ICE with elemental and dummy argument with VALUE attribute [PR107819]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2d7545f7-09e7-44d8-ba71-166690b820a8-1669581157254@3c-app-gmx-bap47/mbox/"},{"id":26457,"url":"https://patchwork.plctlab.org/api/1.2/patches/26457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128021428.13824-1-wangfeng@eswincomputing.com/","msgid":"<20221128021428.13824-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T02:14:28","name":"RISC-V: Support the ins \"rol\" with immediate operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128021428.13824-1-wangfeng@eswincomputing.com/mbox/"},{"id":26511,"url":"https://patchwork.plctlab.org/api/1.2/patches/26511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052829.36087-2-gaofei@eswincomputing.com/","msgid":"<20221128052829.36087-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T05:28:29","name":"[1/1] RISC-V: fix stack access before allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052829.36087-2-gaofei@eswincomputing.com/mbox/"},{"id":26512,"url":"https://patchwork.plctlab.org/api/1.2/patches/26512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052904.36217-2-gaofei@eswincomputing.com/","msgid":"<20221128052904.36217-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-28T05:29:04","name":"[1/1] RISC-V: fix stack access before allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128052904.36217-2-gaofei@eswincomputing.com/mbox/"},{"id":26524,"url":"https://patchwork.plctlab.org/api/1.2/patches/26524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/323b61ce-7027-bad3-a061-c198d7268a22@gmail.com/","msgid":"<323b61ce-7027-bad3-a061-c198d7268a22@gmail.com>","list_archive_url":null,"date":"2022-11-28T06:01:22","name":"[_GLIBCXX_INLINE_VERSION] Adapt dg error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/323b61ce-7027-bad3-a061-c198d7268a22@gmail.com/mbox/"},{"id":26525,"url":"https://patchwork.plctlab.org/api/1.2/patches/26525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd8a96c6-216d-d774-8356-dad6c9150f15@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-28T06:07:07","name":"[_GLIBCXX_INLINE_VERSION] Adapt to_chars/from_chars symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd8a96c6-216d-d774-8356-dad6c9150f15@gmail.com/mbox/"},{"id":26574,"url":"https://patchwork.plctlab.org/api/1.2/patches/26574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com/","msgid":"<54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com>","list_archive_url":null,"date":"2022-11-28T07:40:47","name":"gcn: Fix __builtin_gcn_first_call_this_thread_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/54ee69be-7101-c4e0-fbca-3c7c3f1101b8@codesourcery.com/mbox/"},{"id":26575,"url":"https://patchwork.plctlab.org/api/1.2/patches/26575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128075944.239B11326E@imap2.suse-dmz.suse.de/","msgid":"<20221128075944.239B11326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T07:59:43","name":"tree-optimization/107867 - failed abnormal cleanup in forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128075944.239B11326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26582,"url":"https://patchwork.plctlab.org/api/1.2/patches/26582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4R1agyRgguWCyfT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-28T08:46:34","name":"i386: Fix up ix86_abi handling [PR106875]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4R1agyRgguWCyfT@tucnak/mbox/"},{"id":26585,"url":"https://patchwork.plctlab.org/api/1.2/patches/26585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128090434.44F5E13273@imap2.suse-dmz.suse.de/","msgid":"<20221128090434.44F5E13273@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T09:04:33","name":"tree-optimization/107876 - unswitching of switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128090434.44F5E13273@imap2.suse-dmz.suse.de/mbox/"},{"id":26608,"url":"https://patchwork.plctlab.org/api/1.2/patches/26608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128101653.0419F1326E@imap2.suse-dmz.suse.de/","msgid":"<20221128101653.0419F1326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T10:16:52","name":"tree-optimization/107493 - SCEV analysis with conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128101653.0419F1326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26655,"url":"https://patchwork.plctlab.org/api/1.2/patches/26655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5da61567-b5de-48db-83e0-d50da3d39520-1669636551837@3c-app-webde-bs19/","msgid":"","list_archive_url":null,"date":"2022-11-28T11:55:51","name":"coroutines: Fix promotion of class members in co_await statements [PR99576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5da61567-b5de-48db-83e0-d50da3d39520-1669636551837@3c-app-webde-bs19/mbox/"},{"id":26711,"url":"https://patchwork.plctlab.org/api/1.2/patches/26711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120437.171358-1-poulhies@adacore.com/","msgid":"<20221128120437.171358-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:37","name":"[COMMITTED] ada: Implement change to SPARK RM rule on state refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120437.171358-1-poulhies@adacore.com/mbox/"},{"id":26716,"url":"https://patchwork.plctlab.org/api/1.2/patches/26716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120451.171477-1-poulhies@adacore.com/","msgid":"<20221128120451.171477-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:51","name":"[COMMITTED] ada: Add PIE support to backtraces on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120451.171477-1-poulhies@adacore.com/mbox/"},{"id":26713,"url":"https://patchwork.plctlab.org/api/1.2/patches/26713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120458.171543-1-poulhies@adacore.com/","msgid":"<20221128120458.171543-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:04:58","name":"[COMMITTED] ada: Fix internal error on conversion as in/out actual with -gnatVa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120458.171543-1-poulhies@adacore.com/mbox/"},{"id":26714,"url":"https://patchwork.plctlab.org/api/1.2/patches/26714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120506.171614-1-poulhies@adacore.com/","msgid":"<20221128120506.171614-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:06","name":"[COMMITTED] ada: Annotate GNAT.Source_Info with an abstract state","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120506.171614-1-poulhies@adacore.com/mbox/"},{"id":26717,"url":"https://patchwork.plctlab.org/api/1.2/patches/26717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120524.171679-1-poulhies@adacore.com/","msgid":"<20221128120524.171679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:24","name":"[COMMITTED] ada: doc/share/conf.py: Switch the HTML documentation to using the RTD theme","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120524.171679-1-poulhies@adacore.com/mbox/"},{"id":26718,"url":"https://patchwork.plctlab.org/api/1.2/patches/26718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120535.171749-1-poulhies@adacore.com/","msgid":"<20221128120535.171749-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-11-28T12:05:35","name":"[COMMITTED] ada: Adjust runtime library and User'\''s Guide to PIE default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128120535.171749-1-poulhies@adacore.com/mbox/"},{"id":26724,"url":"https://patchwork.plctlab.org/api/1.2/patches/26724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0b14a63-ec38-89bc-5c0b-da87c3b28390@arm.com/","msgid":"","list_archive_url":null,"date":"2022-11-28T12:13:22","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0b14a63-ec38-89bc-5c0b-da87c3b28390@arm.com/mbox/"},{"id":26741,"url":"https://patchwork.plctlab.org/api/1.2/patches/26741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128130539.2124727-1-hongtao.liu@intel.com/","msgid":"<20221128130539.2124727-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-28T13:05:39","name":"[x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128130539.2124727-1-hongtao.liu@intel.com/mbox/"},{"id":26781,"url":"https://patchwork.plctlab.org/api/1.2/patches/26781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128135914.4068410-1-joakim@nohlgard.se/","msgid":"<20221128135914.4068410-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-11-28T13:59:14","name":"gcc: Use ld -r when checking for HAVE_LD_RO_RW_SECTION_MIXING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128135914.4068410-1-joakim@nohlgard.se/mbox/"},{"id":26782,"url":"https://patchwork.plctlab.org/api/1.2/patches/26782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128140251.4076484-1-joakim@nohlgard.se/","msgid":"<20221128140251.4076484-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-11-28T14:02:51","name":"c++: Fall back to global cpp spec if CPLUSPLUS_CPP_SPEC is not defined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128140251.4076484-1-joakim@nohlgard.se/mbox/"},{"id":26797,"url":"https://patchwork.plctlab.org/api/1.2/patches/26797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128141406.242953-1-juzhe.zhong@rivai.ai/","msgid":"<20221128141406.242953-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-28T14:14:06","name":"RISC-V: Add attributes for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128141406.242953-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26798,"url":"https://patchwork.plctlab.org/api/1.2/patches/26798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128142116.245036-1-juzhe.zhong@rivai.ai/","msgid":"<20221128142116.245036-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-28T14:21:16","name":"RISC-V: Remove tail && mask policy operand for vmclr, vmset, vmld, vmst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128142116.245036-1-juzhe.zhong@rivai.ai/mbox/"},{"id":26811,"url":"https://patchwork.plctlab.org/api/1.2/patches/26811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152003.41709-1-jwakely@redhat.com/","msgid":"<20221128152003.41709-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T15:20:03","name":"[committed] libstdc++: Make 16-bit std::subtract_with_carry_engine work [PR107466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152003.41709-1-jwakely@redhat.com/mbox/"},{"id":26812,"url":"https://patchwork.plctlab.org/api/1.2/patches/26812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152015.41760-1-jwakely@redhat.com/","msgid":"<20221128152015.41760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T15:20:15","name":"[committed] libstdc++: Prune versioned namespace from testsuite output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128152015.41760-1-jwakely@redhat.com/mbox/"},{"id":26875,"url":"https://patchwork.plctlab.org/api/1.2/patches/26875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170005.61262-1-jwakely@redhat.com/","msgid":"<20221128170005.61262-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:05","name":"[committed] libstdc++: Fix _Hash_bytes for I16LP32 targets [PR107885]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170005.61262-1-jwakely@redhat.com/mbox/"},{"id":26877,"url":"https://patchwork.plctlab.org/api/1.2/patches/26877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170020.61434-1-jwakely@redhat.com/","msgid":"<20221128170020.61434-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:20","name":"[committed] libstdc++: Fix std::string_view for I32LP16 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170020.61434-1-jwakely@redhat.com/mbox/"},{"id":26876,"url":"https://patchwork.plctlab.org/api/1.2/patches/26876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170028.61462-1-jwakely@redhat.com/","msgid":"<20221128170028.61462-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-28T17:00:28","name":"[committed] libstdc++: Fix src/c++17/memory_resource for H8 targets [PR107801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128170028.61462-1-jwakely@redhat.com/mbox/"},{"id":26902,"url":"https://patchwork.plctlab.org/api/1.2/patches/26902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211281635580.463@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2022-11-28T17:44:05","name":"[v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2211281635580.463@tpp.orcam.me.uk/mbox/"},{"id":26914,"url":"https://patchwork.plctlab.org/api/1.2/patches/26914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128184057.3FF501326E@imap2.suse-dmz.suse.de/","msgid":"<20221128184057.3FF501326E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-28T18:40:56","name":"tree-optimization/107896 - allow v2si to dimode unpacks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128184057.3FF501326E@imap2.suse-dmz.suse.de/mbox/"},{"id":26944,"url":"https://patchwork.plctlab.org/api/1.2/patches/26944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2ce9e1a0-ad68-4fad-8953-6b51b5cfb9de-1669665943770@3c-app-gmx-bs02/","msgid":"","list_archive_url":null,"date":"2022-11-28T20:05:43","name":"Fortran: intrinsic MERGE shall use all its arguments [PR107874]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2ce9e1a0-ad68-4fad-8953-6b51b5cfb9de-1669665943770@3c-app-gmx-bs02/mbox/"},{"id":26945,"url":"https://patchwork.plctlab.org/api/1.2/patches/26945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669666345-28322-1-git-send-email-apinski@marvell.com/","msgid":"<1669666345-28322-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-28T20:12:25","name":"[COMMITTED] Fix comment for (A / (1 << B)) -> (A >> B).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669666345-28322-1-git-send-email-apinski@marvell.com/mbox/"},{"id":26946,"url":"https://patchwork.plctlab.org/api/1.2/patches/26946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128201647.484582-1-ppalka@redhat.com/","msgid":"<20221128201647.484582-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:16:47","name":"c++: explicit specialization and trailing requirements [PR107864]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128201647.484582-1-ppalka@redhat.com/mbox/"},{"id":26953,"url":"https://patchwork.plctlab.org/api/1.2/patches/26953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205142.541060-1-jason@redhat.com/","msgid":"<20221128205142.541060-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:51:42","name":"[pushed] c++: be more strict about '\''concept bool'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205142.541060-1-jason@redhat.com/mbox/"},{"id":26954,"url":"https://patchwork.plctlab.org/api/1.2/patches/26954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205236.541407-1-jason@redhat.com/","msgid":"<20221128205236.541407-1-jason@redhat.com>","list_archive_url":null,"date":"2022-11-28T20:52:36","name":"[pushed] c++: simple-requirement starting with '\''typename'\'' [PR101733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128205236.541407-1-jason@redhat.com/mbox/"},{"id":26956,"url":"https://patchwork.plctlab.org/api/1.2/patches/26956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128212211.940206-1-ppalka@redhat.com/","msgid":"<20221128212211.940206-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-28T21:22:11","name":"c++: TYPENAME_TYPE lookup ignoring non-types [PR107773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128212211.940206-1-ppalka@redhat.com/mbox/"},{"id":26958,"url":"https://patchwork.plctlab.org/api/1.2/patches/26958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128213725.13926-1-palmer@rivosinc.com/","msgid":"<20221128213725.13926-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2022-11-28T21:37:25","name":"RISC-V: Fix up some wording in the mcpu/mtune comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221128213725.13926-1-palmer@rivosinc.com/mbox/"},{"id":26991,"url":"https://patchwork.plctlab.org/api/1.2/patches/26991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-2-jcmvbkbc@gmail.com/","msgid":"<20221129004551.2213723-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-29T00:45:50","name":"[v2,1/2] gcc: xtensa: allow dynamic configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-2-jcmvbkbc@gmail.com/mbox/"},{"id":26990,"url":"https://patchwork.plctlab.org/api/1.2/patches/26990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-3-jcmvbkbc@gmail.com/","msgid":"<20221129004551.2213723-3-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-11-29T00:45:51","name":"[v2,2/2] libgcc: xtensa: use built-in configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129004551.2213723-3-jcmvbkbc@gmail.com/mbox/"},{"id":27009,"url":"https://patchwork.plctlab.org/api/1.2/patches/27009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129012201.76355-1-juzhe.zhong@rivai.ai/","msgid":"<20221129012201.76355-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-11-29T01:22:01","name":"RISC-V: Remove tail && mask policy operand for vmclr, vmset, vmld, vmst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129012201.76355-1-juzhe.zhong@rivai.ai/mbox/"},{"id":27113,"url":"https://patchwork.plctlab.org/api/1.2/patches/27113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88ad246-a3b6-8f33-0cfd-98513928326a@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-11-29T08:34:54","name":"[(pushed)] re-run configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88ad246-a3b6-8f33-0cfd-98513928326a@suse.cz/mbox/"},{"id":27123,"url":"https://patchwork.plctlab.org/api/1.2/patches/27123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092511.5E60613428@imap2.suse-dmz.suse.de/","msgid":"<20221129092511.5E60613428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T09:25:11","name":"tree-optimization/107898 - ICE with -Walloca-larger-than","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092511.5E60613428@imap2.suse-dmz.suse.de/mbox/"},{"id":27124,"url":"https://patchwork.plctlab.org/api/1.2/patches/27124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092523.7E43313428@imap2.suse-dmz.suse.de/","msgid":"<20221129092523.7E43313428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T09:25:23","name":"ipa/107897 - avoid property verification ICE after error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129092523.7E43313428@imap2.suse-dmz.suse.de/mbox/"},{"id":27128,"url":"https://patchwork.plctlab.org/api/1.2/patches/27128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4XUPYRb92sFBZk4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T09:43:25","name":"range-op-float: Fix up multiplication and division reverse operation [PR107879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4XUPYRb92sFBZk4@tucnak/mbox/"},{"id":27138,"url":"https://patchwork.plctlab.org/api/1.2/patches/27138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129100446.3875697-1-manolis.tsamis@vrull.eu/","msgid":"<20221129100446.3875697-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-11-29T10:04:46","name":"[v2] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129100446.3875697-1-manolis.tsamis@vrull.eu/mbox/"},{"id":27169,"url":"https://patchwork.plctlab.org/api/1.2/patches/27169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3202323.aeNJFYEL58@fomalhaut/","msgid":"<3202323.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2022-11-29T10:47:21","name":"Fix PR ada/107810","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3202323.aeNJFYEL58@fomalhaut/mbox/"},{"id":27202,"url":"https://patchwork.plctlab.org/api/1.2/patches/27202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129115910.9268213428@imap2.suse-dmz.suse.de/","msgid":"<20221129115910.9268213428@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T11:59:10","name":"tree-optimization/106995 - if-conversion and vanishing loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129115910.9268213428@imap2.suse-dmz.suse.de/mbox/"},{"id":27212,"url":"https://patchwork.plctlab.org/api/1.2/patches/27212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X551/z9F08wuCL@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T12:24:07","name":"c++: Deduce range for structured bindings if expression is not type dependent [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X551/z9F08wuCL@tucnak/mbox/"},{"id":27214,"url":"https://patchwork.plctlab.org/api/1.2/patches/27214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X70nKAHnZLUNVa@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-29T12:32:18","name":"c++: Incremental fix for g++.dg/gomp/for-21.C [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4X70nKAHnZLUNVa@tucnak/mbox/"},{"id":27234,"url":"https://patchwork.plctlab.org/api/1.2/patches/27234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de/","msgid":"<20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-29T13:30:22","name":"tree-optimization/107852 - missed optimization with PHIs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129133022.99C0C13AF6@imap2.suse-dmz.suse.de/mbox/"},{"id":27243,"url":"https://patchwork.plctlab.org/api/1.2/patches/27243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-1-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:05","name":"[1/3] Use sub mode to move block for struct parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-1-guojiufu@linux.ibm.com/mbox/"},{"id":27244,"url":"https://patchwork.plctlab.org/api/1.2/patches/27244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-2-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:06","name":"[2/3] Use sub mode to move block for struct returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-2-guojiufu@linux.ibm.com/mbox/"},{"id":27245,"url":"https://patchwork.plctlab.org/api/1.2/patches/27245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-3-guojiufu@linux.ibm.com/","msgid":"<20221129134507.185951-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-29T13:45:07","name":"[3/3] Testcases for move sub blocks on param and ret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134507.185951-3-guojiufu@linux.ibm.com/mbox/"},{"id":27249,"url":"https://patchwork.plctlab.org/api/1.2/patches/27249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-1-christophe.lyon@arm.com/","msgid":"<20221129134728.242212-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-29T13:47:27","name":"[v2,1/2] aarch64: fix warning emission for ABI break since GCC 9.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-1-christophe.lyon@arm.com/mbox/"},{"id":27247,"url":"https://patchwork.plctlab.org/api/1.2/patches/27247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-2-christophe.lyon@arm.com/","msgid":"<20221129134728.242212-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-11-29T13:47:28","name":"[v2,2/2] aarch64: Fix bit-field alignment in param passing [PR105549]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129134728.242212-2-christophe.lyon@arm.com/mbox/"},{"id":27281,"url":"https://patchwork.plctlab.org/api/1.2/patches/27281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=0mHW4Aw2u-Kksy=OV5KY-G7_CW+mrT1QKPyKMrBi80g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-29T14:39:07","name":"[aarch64] Use dup and zip1 for interleaving elements in initializing vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=0mHW4Aw2u-Kksy=OV5KY-G7_CW+mrT1QKPyKMrBi80g@mail.gmail.com/mbox/"},{"id":27299,"url":"https://patchwork.plctlab.org/api/1.2/patches/27299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129153945.144056-1-jwakely@redhat.com/","msgid":"<20221129153945.144056-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T15:39:45","name":"[committed] libstdc++: Do not use __used or __packed as identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129153945.144056-1-jwakely@redhat.com/mbox/"},{"id":27310,"url":"https://patchwork.plctlab.org/api/1.2/patches/27310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd63de7d-171c-bc9b-a3c5-5a3254c1c8a2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-29T15:56:21","name":"amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd63de7d-171c-bc9b-a3c5-5a3254c1c8a2@codesourcery.com/mbox/"},{"id":27384,"url":"https://patchwork.plctlab.org/api/1.2/patches/27384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171432.149718-1-jwakely@redhat.com/","msgid":"<20221129171432.149718-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T17:14:32","name":"[committed] libstdc++: Remove unnecessary tag dispatching in std::vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171432.149718-1-jwakely@redhat.com/mbox/"},{"id":27385,"url":"https://patchwork.plctlab.org/api/1.2/patches/27385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171446.149751-1-jwakely@redhat.com/","msgid":"<20221129171446.149751-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-11-29T17:14:46","name":"[committed] libstdc++: Avoid bogus warning in std::vector::insert [PR107852]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129171446.149751-1-jwakely@redhat.com/mbox/"},{"id":27387,"url":"https://patchwork.plctlab.org/api/1.2/patches/27387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129174331.3124-1-soeren@soeren-tempel.net/","msgid":"<20221129174331.3124-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-11-29T17:43:31","name":"libgo: Don'\''t rely on GNU-specific strerror_r variant on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129174331.3124-1-soeren@soeren-tempel.net/mbox/"},{"id":27391,"url":"https://patchwork.plctlab.org/api/1.2/patches/27391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129175453.3644-1-soeren@soeren-tempel.net/","msgid":"<20221129175453.3644-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-11-29T17:54:53","name":"[v2] libgo: Don'\''t rely on GNU-specific strerror_r variant on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129175453.3644-1-soeren@soeren-tempel.net/mbox/"},{"id":27393,"url":"https://patchwork.plctlab.org/api/1.2/patches/27393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com/","msgid":"<9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com>","list_archive_url":null,"date":"2022-11-29T18:26:07","name":"libgomp.texi: List GCN'\''s '\''gfx803'\'' under OpenMP Context Selectors (was: amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b3bf7dc-4eb8-e210-94b7-b5cfc56458ca@codesourcery.com/mbox/"},{"id":27482,"url":"https://patchwork.plctlab.org/api/1.2/patches/27482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129200322.1544250-1-ppalka@redhat.com/","msgid":"<20221129200322.1544250-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-11-29T20:03:22","name":"c++: ICE with <=> of incompatible pointers [PR107542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221129200322.1544250-1-ppalka@redhat.com/mbox/"},{"id":27519,"url":"https://patchwork.plctlab.org/api/1.2/patches/27519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de/","msgid":"<776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de>","list_archive_url":null,"date":"2022-11-29T21:48:13","name":"libstdc++: Add error handler for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/776a72a7-a6b8-3bd2-d758-821c70420ed9@hazardy.de/mbox/"},{"id":27558,"url":"https://patchwork.plctlab.org/api/1.2/patches/27558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010722.3663721-1-dmalcolm@redhat.com/","msgid":"<20221130010722.3663721-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:22","name":"[committed] analyzer: fix folding of '\''(PTR + 0) => PTR'\'' [PR105784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010722.3663721-1-dmalcolm@redhat.com/mbox/"},{"id":27560,"url":"https://patchwork.plctlab.org/api/1.2/patches/27560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010736.3663768-1-dmalcolm@redhat.com/","msgid":"<20221130010736.3663768-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:36","name":"[committed] analyzer work on issues with flex-generated lexers [PR103546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010736.3663768-1-dmalcolm@redhat.com/mbox/"},{"id":27559,"url":"https://patchwork.plctlab.org/api/1.2/patches/27559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010751.3663828-1-dmalcolm@redhat.com/","msgid":"<20221130010751.3663828-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-11-30T01:07:51","name":"[committed] analyzer: move stdio known fns to sm-file.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130010751.3663828-1-dmalcolm@redhat.com/mbox/"},{"id":27567,"url":"https://patchwork.plctlab.org/api/1.2/patches/27567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130022152.190824-1-guojiufu@linux.ibm.com/","msgid":"<20221130022152.190824-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-11-30T02:21:52","name":"NFC: use more readable pattern to clean high 32 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130022152.190824-1-guojiufu@linux.ibm.com/mbox/"},{"id":27596,"url":"https://patchwork.plctlab.org/api/1.2/patches/27596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130052114.10229-1-hongtao.liu@intel.com/","msgid":"<20221130052114.10229-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-11-30T05:21:14","name":"[1/2,V2] Implement hwasan target_hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130052114.10229-1-hongtao.liu@intel.com/mbox/"},{"id":27621,"url":"https://patchwork.plctlab.org/api/1.2/patches/27621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz94q3db.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-11-30T07:59:44","name":"[PR107304] note test'\''s ifunc requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz94q3db.fsf@lxoliva.fsfla.org/mbox/"},{"id":27671,"url":"https://patchwork.plctlab.org/api/1.2/patches/27671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com/","msgid":"<009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com>","list_archive_url":null,"date":"2022-11-30T08:30:13","name":"rs6000: Fix some issues related to Power10 fusion [PR104024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com/mbox/"},{"id":27672,"url":"https://patchwork.plctlab.org/api/1.2/patches/27672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbef44d3-fc72-ca13-d29c-2635e8b9d7b1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T08:30:44","name":"[v2] predict: Adjust optimize_function_for_size_p [PR105818]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbef44d3-fc72-ca13-d29c-2635e8b9d7b1@linux.ibm.com/mbox/"},{"id":27674,"url":"https://patchwork.plctlab.org/api/1.2/patches/27674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130083717.14438-1-gaofei@eswincomputing.com/","msgid":"<20221130083717.14438-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-11-30T08:37:17","name":"RISC-V: optimize stack manipulation in save-restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130083717.14438-1-gaofei@eswincomputing.com/mbox/"},{"id":27706,"url":"https://patchwork.plctlab.org/api/1.2/patches/27706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4cmlqFFMt3p7Nz8@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-30T09:47:02","name":"tree-chrec: Fix up ICE on pointer multiplication [PR107835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4cmlqFFMt3p7Nz8@tucnak/mbox/"},{"id":27708,"url":"https://patchwork.plctlab.org/api/1.2/patches/27708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4co5oszzPoXjjkU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-11-30T09:56:54","name":"c-family: Account for integral promotions of left shifts for -Wshift-overflow warning [PR107846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4co5oszzPoXjjkU@tucnak/mbox/"},{"id":27740,"url":"https://patchwork.plctlab.org/api/1.2/patches/27740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130110030.9E7981331F@imap2.suse-dmz.suse.de/","msgid":"<20221130110030.9E7981331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:00:30","name":"tree-optimization/107919 - uninit diagnostic predicate simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130110030.9E7981331F@imap2.suse-dmz.suse.de/mbox/"},{"id":27760,"url":"https://patchwork.plctlab.org/api/1.2/patches/27760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115247.C39A113A70@imap2.suse-dmz.suse.de/","msgid":"<20221130115247.C39A113A70@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:52:47","name":"Improve uninit diagnostic dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115247.C39A113A70@imap2.suse-dmz.suse.de/mbox/"},{"id":27761,"url":"https://patchwork.plctlab.org/api/1.2/patches/27761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115302.8394013A70@imap2.suse-dmz.suse.de/","msgid":"<20221130115302.8394013A70@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-11-30T11:53:02","name":"tree-optimization/107919 - predicate simplification in uninit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130115302.8394013A70@imap2.suse-dmz.suse.de/mbox/"},{"id":27773,"url":"https://patchwork.plctlab.org/api/1.2/patches/27773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com/","msgid":"<8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-11-30T12:44:26","name":"[1/7] OpenMP/OpenACC: Refine condition for when map clause expansion happens","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a4b123a17578af0b75020092614df57dc53c35b.1669808720.git.julian@codesourcery.com/mbox/"},{"id":27774,"url":"https://patchwork.plctlab.org/api/1.2/patches/27774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f32cb0d7aa424d6fcfbeeb75987bf1101de520d1.1669808721.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T12:44:27","name":"[2/2] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f32cb0d7aa424d6fcfbeeb75987bf1101de520d1.1669808721.git.julian@codesourcery.com/mbox/"},{"id":27804,"url":"https://patchwork.plctlab.org/api/1.2/patches/27804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz/","msgid":"<13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz>","list_archive_url":null,"date":"2022-11-30T13:47:39","name":"[(pushed)] fix Clang warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13330943-7eca-20ac-b6e9-2c61d6aaf048@suse.cz/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/mbox/"},{"id":11,"url":"https://patchwork.plctlab.org/api/1.2/bundles/11/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-12/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2022-12","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":27857,"url":"https://patchwork.plctlab.org/api/1.2/patches/27857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e929111e-d5f2-8ed3-c3ec-f1280615d8fc@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-11-30T15:32:06","name":"[OG12] amdgcn: Support AMD-specific '\''isa'\'' and '\''arch'\'' traits in OpenMP context selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e929111e-d5f2-8ed3-c3ec-f1280615d8fc@codesourcery.com/mbox/"},{"id":27918,"url":"https://patchwork.plctlab.org/api/1.2/patches/27918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130171314.323962-1-ibuclaw@gdcproject.org/","msgid":"<20221130171314.323962-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T17:13:14","name":"[committed] d: Fix ICE on named continue label in an unrolled loop [PR107592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130171314.323962-1-ibuclaw@gdcproject.org/mbox/"},{"id":27919,"url":"https://patchwork.plctlab.org/api/1.2/patches/27919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-1-git-send-email-apinski@marvell.com/","msgid":"<1669828695-18532-1-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-30T17:18:14","name":"[1/2] Fix C/107926: Wrong error message when initializing char array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-1-git-send-email-apinski@marvell.com/mbox/"},{"id":27920,"url":"https://patchwork.plctlab.org/api/1.2/patches/27920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-2-git-send-email-apinski@marvell.com/","msgid":"<1669828695-18532-2-git-send-email-apinski@marvell.com>","list_archive_url":null,"date":"2022-11-30T17:18:15","name":"[2/2] Improve error message for excess elements in array initializer from {\"a\"}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1669828695-18532-2-git-send-email-apinski@marvell.com/mbox/"},{"id":27948,"url":"https://patchwork.plctlab.org/api/1.2/patches/27948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130181625.2011166-1-adhemerval.zanella@linaro.org/","msgid":"<20221130181625.2011166-1-adhemerval.zanella@linaro.org>","list_archive_url":null,"date":"2022-11-30T18:16:25","name":"longlong.h: Do no use asm input cast for clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130181625.2011166-1-adhemerval.zanella@linaro.org/mbox/"},{"id":27957,"url":"https://patchwork.plctlab.org/api/1.2/patches/27957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4el43pq83ixCe/N@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-11-30T18:50:11","name":"[committed] hppa: Fix addvdi3 and subvdi3 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4el43pq83ixCe/N@mx3210.localdomain/mbox/"},{"id":28019,"url":"https://patchwork.plctlab.org/api/1.2/patches/28019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213115.539282-1-ibuclaw@gdcproject.org/","msgid":"<20221130213115.539282-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:31:15","name":"[GCC-12,committed] d: Fix #error You must define PREFERRED_DEBUGGING_TYPE if DWARF is not supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213115.539282-1-ibuclaw@gdcproject.org/mbox/"},{"id":28020,"url":"https://patchwork.plctlab.org/api/1.2/patches/28020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213727.545475-1-ibuclaw@gdcproject.org/","msgid":"<20221130213727.545475-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:37:27","name":"[committed] d: Synchronize gdc documentation with options in d/lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213727.545475-1-ibuclaw@gdcproject.org/mbox/"},{"id":28021,"url":"https://patchwork.plctlab.org/api/1.2/patches/28021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213949.547614-1-ibuclaw@gdcproject.org/","msgid":"<20221130213949.547614-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:39:49","name":"[committed] d: Separate documentation indices into options and keywords.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130213949.547614-1-ibuclaw@gdcproject.org/mbox/"},{"id":28022,"url":"https://patchwork.plctlab.org/api/1.2/patches/28022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214234.550547-1-ibuclaw@gdcproject.org/","msgid":"<20221130214234.550547-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:42:34","name":"[committed] d: Update recipes for building html and pdf documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214234.550547-1-ibuclaw@gdcproject.org/mbox/"},{"id":28024,"url":"https://patchwork.plctlab.org/api/1.2/patches/28024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214812.554893-1-ibuclaw@gdcproject.org/","msgid":"<20221130214812.554893-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-11-30T21:48:12","name":"[committed] d: Add language reference section to documentation files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221130214812.554893-1-ibuclaw@gdcproject.org/mbox/"},{"id":28128,"url":"https://patchwork.plctlab.org/api/1.2/patches/28128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-1-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:17","name":"[1/3] rs6000: NFC use more readable pattern to clean high 32 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-1-guojiufu@linux.ibm.com/mbox/"},{"id":28129,"url":"https://patchwork.plctlab.org/api/1.2/patches/28129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-2-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:18","name":"[2/3] rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-2-guojiufu@linux.ibm.com/mbox/"},{"id":28130,"url":"https://patchwork.plctlab.org/api/1.2/patches/28130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-3-guojiufu@linux.ibm.com/","msgid":"<20221201013619.196004-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T01:36:19","name":"[3/3] rs6000: NFC no need copy_rtx in rs6000_emit_set_long_const and rs6000_emit_set_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201013619.196004-3-guojiufu@linux.ibm.com/mbox/"},{"id":28156,"url":"https://patchwork.plctlab.org/api/1.2/patches/28156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201023317.3722715-1-dmalcolm@redhat.com/","msgid":"<20221201023317.3722715-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:33:17","name":"[committed] analyzer: fix ICE on bind/connect with a constant fd [PR107928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201023317.3722715-1-dmalcolm@redhat.com/mbox/"},{"id":28163,"url":"https://patchwork.plctlab.org/api/1.2/patches/28163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-1-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:54","name":"[committed,1/7] analyzer: move bounds checking to a new bounds-checking.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-1-dmalcolm@redhat.com/mbox/"},{"id":28158,"url":"https://patchwork.plctlab.org/api/1.2/patches/28158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-2-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:55","name":"[committed,2/7] analyzer: fix wording of '\''number of bad bytes'\'' note [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-2-dmalcolm@redhat.com/mbox/"},{"id":28159,"url":"https://patchwork.plctlab.org/api/1.2/patches/28159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-3-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:56","name":"[committed,3/7] analyzer: add note about valid subscripts [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-3-dmalcolm@redhat.com/mbox/"},{"id":28161,"url":"https://patchwork.plctlab.org/api/1.2/patches/28161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-4-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:57","name":"[committed,4/7] analyzer: more bounds-checking wording tweaks [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-4-dmalcolm@redhat.com/mbox/"},{"id":28162,"url":"https://patchwork.plctlab.org/api/1.2/patches/28162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-5-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:58","name":"[committed,5/7] diagnostics: tweak diagnostic_path::interprocedural_p [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-5-dmalcolm@redhat.com/mbox/"},{"id":28160,"url":"https://patchwork.plctlab.org/api/1.2/patches/28160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-6-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:41:59","name":"[committed,6/7] analyzer: unify bounds-checking class hierarchies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-6-dmalcolm@redhat.com/mbox/"},{"id":28164,"url":"https://patchwork.plctlab.org/api/1.2/patches/28164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-7-dmalcolm@redhat.com/","msgid":"<20221201024200.3722982-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-01T02:42:00","name":"[committed,7/7] analyzer: fix i18n issues in symbolic out-of-bounds [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201024200.3722982-7-dmalcolm@redhat.com/mbox/"},{"id":28168,"url":"https://patchwork.plctlab.org/api/1.2/patches/28168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b2be13be3534681af5a64b8163a3c8c@amazon.com/","msgid":"<3b2be13be3534681af5a64b8163a3c8c@amazon.com>","list_archive_url":null,"date":"2022-12-01T03:04:52","name":"AArch64: Add UNSPECV_PATCHABLE_AREA [PR98776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b2be13be3534681af5a64b8163a3c8c@amazon.com/mbox/"},{"id":28182,"url":"https://patchwork.plctlab.org/api/1.2/patches/28182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201034639.136411-1-jason@redhat.com/","msgid":"<20221201034639.136411-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-01T03:46:39","name":"[pushed] c++: small contracts fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201034639.136411-1-jason@redhat.com/mbox/"},{"id":28187,"url":"https://patchwork.plctlab.org/api/1.2/patches/28187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201043155.9369-1-luolongjuna@gmail.com/","msgid":"<20221201043155.9369-1-luolongjuna@gmail.com>","list_archive_url":null,"date":"2022-12-01T04:31:55","name":"libcpp: suppress builtin macro redefined warnings for __LINE__","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201043155.9369-1-luolongjuna@gmail.com/mbox/"},{"id":28209,"url":"https://patchwork.plctlab.org/api/1.2/patches/28209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201061130.2696537-1-hongtao.liu@intel.com/","msgid":"<20221201061130.2696537-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-01T06:11:30","name":"[x86] Fix ICE due to incorrect insn type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201061130.2696537-1-hongtao.liu@intel.com/mbox/"},{"id":28230,"url":"https://patchwork.plctlab.org/api/1.2/patches/28230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4hhT8kVXen8yOX5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-01T08:09:51","name":"i386: Improve *concat3_{1,2,3,4} patterns [PR107627]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4hhT8kVXen8yOX5@tucnak/mbox/"},{"id":28244,"url":"https://patchwork.plctlab.org/api/1.2/patches/28244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-1-guojiufu@linux.ibm.com/","msgid":"<20221201084754.12959-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T08:47:53","name":"[1/2] rs6000: use lis;xoris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-1-guojiufu@linux.ibm.com/mbox/"},{"id":28245,"url":"https://patchwork.plctlab.org/api/1.2/patches/28245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-2-guojiufu@linux.ibm.com/","msgid":"<20221201084754.12959-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-01T08:47:54","name":"[2/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201084754.12959-2-guojiufu@linux.ibm.com/mbox/"},{"id":28259,"url":"https://patchwork.plctlab.org/api/1.2/patches/28259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de/","msgid":"<20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-01T09:18:22","name":"tree-optimization/107935 - fixup equivalence handling in PHI VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201091823.3D45F13B4A@imap2.suse-dmz.suse.de/mbox/"},{"id":28273,"url":"https://patchwork.plctlab.org/api/1.2/patches/28273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz/","msgid":"<74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz>","list_archive_url":null,"date":"2022-12-01T09:33:56","name":"gcc: remove incpath.o from CXX_C_OBJS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74d3217b-55b1-5f30-800e-e6ca655acf31@suse.cz/mbox/"},{"id":28275,"url":"https://patchwork.plctlab.org/api/1.2/patches/28275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201095335.355711320E@imap1.suse-dmz.suse.de/","msgid":"<20221201095335.355711320E@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-01T09:53:34","name":"tree-optimization/107937 - uninit predicate simplification fixup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201095335.355711320E@imap1.suse-dmz.suse.de/mbox/"},{"id":28282,"url":"https://patchwork.plctlab.org/api/1.2/patches/28282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4208860-1af9-6c47-6109-5c2fe4c9d444@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-01T09:59:07","name":"IPA: do not release body if still needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4208860-1af9-6c47-6109-5c2fe4c9d444@suse.cz/mbox/"},{"id":28288,"url":"https://patchwork.plctlab.org/api/1.2/patches/28288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-2-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:30","name":"[1/3] RISC-V: add a new parameter in riscv_first_stack_step.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-2-gaofei@eswincomputing.com/mbox/"},{"id":28287,"url":"https://patchwork.plctlab.org/api/1.2/patches/28287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-3-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:31","name":"[2/3] RISC-V: optimize stack manipulation in save-restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-3-gaofei@eswincomputing.com/mbox/"},{"id":28289,"url":"https://patchwork.plctlab.org/api/1.2/patches/28289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-4-gaofei@eswincomputing.com/","msgid":"<20221201100332.22226-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2022-12-01T10:03:32","name":"[3/3] RISC-V: make the stack manipulation codes more readable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201100332.22226-4-gaofei@eswincomputing.com/mbox/"},{"id":28295,"url":"https://patchwork.plctlab.org/api/1.2/patches/28295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4iCpoNWlMFJF4T5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-01T10:32:06","name":"c++, v2: Incremental fix for g++.dg/gomp/for-21.C [PR84469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4iCpoNWlMFJF4T5@tucnak/mbox/"},{"id":28377,"url":"https://patchwork.plctlab.org/api/1.2/patches/28377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201134316.3506324-1-christophe.lyon@arm.com/","msgid":"<20221201134316.3506324-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2022-12-01T13:43:16","name":"[committed] arm: Fix MVE testsuite fallouts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201134316.3506324-1-christophe.lyon@arm.com/mbox/"},{"id":28382,"url":"https://patchwork.plctlab.org/api/1.2/patches/28382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135505.457877-1-poulhies@adacore.com/","msgid":"<20221201135505.457877-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:05","name":"[COMMITTED] ada: Minor updates to gnat/doc configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135505.457877-1-poulhies@adacore.com/mbox/"},{"id":28384,"url":"https://patchwork.plctlab.org/api/1.2/patches/28384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135522.457972-1-poulhies@adacore.com/","msgid":"<20221201135522.457972-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:22","name":"[COMMITTED] ada: Fix minor issues in reference manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135522.457972-1-poulhies@adacore.com/mbox/"},{"id":28386,"url":"https://patchwork.plctlab.org/api/1.2/patches/28386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135532.458039-1-poulhies@adacore.com/","msgid":"<20221201135532.458039-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:32","name":"[COMMITTED] ada: Use the address type of a Storage_Model_Type for '\''Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135532.458039-1-poulhies@adacore.com/mbox/"},{"id":28385,"url":"https://patchwork.plctlab.org/api/1.2/patches/28385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135537.458104-1-poulhies@adacore.com/","msgid":"<20221201135537.458104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:37","name":"[COMMITTED] ada: Fix misphrasing in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135537.458104-1-poulhies@adacore.com/mbox/"},{"id":28387,"url":"https://patchwork.plctlab.org/api/1.2/patches/28387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135544.458168-1-poulhies@adacore.com/","msgid":"<20221201135544.458168-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:44","name":"[COMMITTED] ada: Further adjustments to User'\''s Guide for PIE default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135544.458168-1-poulhies@adacore.com/mbox/"},{"id":28388,"url":"https://patchwork.plctlab.org/api/1.2/patches/28388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135550.458256-1-poulhies@adacore.com/","msgid":"<20221201135550.458256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:50","name":"[COMMITTED] ada: Enforce Aggregate aspect legality rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135550.458256-1-poulhies@adacore.com/mbox/"},{"id":28389,"url":"https://patchwork.plctlab.org/api/1.2/patches/28389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135556.458319-1-poulhies@adacore.com/","msgid":"<20221201135556.458319-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-01T13:55:56","name":"[COMMITTED] ada: Strip conversions for the implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201135556.458319-1-poulhies@adacore.com/mbox/"},{"id":28408,"url":"https://patchwork.plctlab.org/api/1.2/patches/28408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201142235.GA12562@ldh-imac.local/","msgid":"<20221201142235.GA12562@ldh-imac.local>","list_archive_url":null,"date":"2022-12-01T14:22:35","name":"Ping^3: [PATCH] libcpp: Improve location for macro names [PR66290]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201142235.GA12562@ldh-imac.local/mbox/"},{"id":28409,"url":"https://patchwork.plctlab.org/api/1.2/patches/28409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3b7e809-537d-c2f0-c02d-b1050967edbd@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T14:35:34","name":"amdgcn: Add preprocessor builtins for every processor type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3b7e809-537d-c2f0-c02d-b1050967edbd@codesourcery.com/mbox/"},{"id":28426,"url":"https://patchwork.plctlab.org/api/1.2/patches/28426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4jJSkO6Ccew5OjL@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T15:33:30","name":"varasm: Fix type confusion bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4jJSkO6Ccew5OjL@arm.com/mbox/"},{"id":28454,"url":"https://patchwork.plctlab.org/api/1.2/patches/28454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201163752.2176490-1-ppalka@redhat.com/","msgid":"<20221201163752.2176490-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-01T16:37:52","name":"c++: explicit spec of constrained member tmpl [PR107522]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201163752.2176490-1-ppalka@redhat.com/mbox/"},{"id":28457,"url":"https://patchwork.plctlab.org/api/1.2/patches/28457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201165051.51853-1-jason@redhat.com/","msgid":"<20221201165051.51853-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-01T16:50:51","name":"[RFA] driver: fix validate_switches logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201165051.51853-1-jason@redhat.com/mbox/"},{"id":28458,"url":"https://patchwork.plctlab.org/api/1.2/patches/28458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898282DA41F5944167126D7883149@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T16:55:16","name":"libgcc: Fix uninitialized RA signing on AArch64 [PR107678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898282DA41F5944167126D7883149@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":28502,"url":"https://patchwork.plctlab.org/api/1.2/patches/28502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ca1641-f2b7-d9d2-6740-2c3fdf007bb5@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-01T18:19:47","name":"arm: Split up MVE _Generic associations to prevent type clashes [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ca1641-f2b7-d9d2-6740-2c3fdf007bb5@arm.com/mbox/"},{"id":28547,"url":"https://patchwork.plctlab.org/api/1.2/patches/28547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-36a140f9-17a0-4d3d-8a78-f2ae946960cb-1669926330700@3c-app-gmx-bs60/","msgid":"","list_archive_url":null,"date":"2022-12-01T20:25:30","name":"Fortran: error recovery simplifying UNPACK for insufficient FIELD [PR107922]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-36a140f9-17a0-4d3d-8a78-f2ae946960cb-1669926330700@3c-app-gmx-bs60/mbox/"},{"id":28551,"url":"https://patchwork.plctlab.org/api/1.2/patches/28551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201205702.2822213-1-ppalka@redhat.com/","msgid":"<20221201205702.2822213-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-01T20:57:02","name":"c++: comptypes ICE with BOUND_TEMPLATE_TEMPLATE_PARMs [PR107539]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221201205702.2822213-1-ppalka@redhat.com/mbox/"},{"id":28664,"url":"https://patchwork.plctlab.org/api/1.2/patches/28664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023541.3778122-1-dmalcolm@redhat.com/","msgid":"<20221202023541.3778122-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T02:35:41","name":"[committed] analyzer: add test coverage for string ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023541.3778122-1-dmalcolm@redhat.com/mbox/"},{"id":28665,"url":"https://patchwork.plctlab.org/api/1.2/patches/28665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023554.3778168-1-dmalcolm@redhat.com/","msgid":"<20221202023554.3778168-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T02:35:54","name":"[committed] analyzer: handle comparisons against negated symbolic values [PR107948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202023554.3778168-1-dmalcolm@redhat.com/mbox/"},{"id":28702,"url":"https://patchwork.plctlab.org/api/1.2/patches/28702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202042606.551350-1-hongtao.liu@intel.com/","msgid":"<20221202042606.551350-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-02T04:26:05","name":"[x86] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202042606.551350-1-hongtao.liu@intel.com/mbox/"},{"id":28726,"url":"https://patchwork.plctlab.org/api/1.2/patches/28726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a63fac98-4737-3f8d-44d9-92874ed814d6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T07:03:46","name":"[v5,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a63fac98-4737-3f8d-44d9-92874ed814d6@linux.ibm.com/mbox/"},{"id":28725,"url":"https://patchwork.plctlab.org/api/1.2/patches/28725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202070401.A01F6133DE@imap1.suse-dmz.suse.de/","msgid":"<20221202070401.A01F6133DE@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-02T07:04:01","name":"Add --param max-unswitch-depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202070401.A01F6133DE@imap1.suse-dmz.suse.de/mbox/"},{"id":28730,"url":"https://patchwork.plctlab.org/api/1.2/patches/28730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnaLY=sigq_+fXpBZ++UpEw4AD_XdNL4H-1Gy4Knp+cAw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T07:21:37","name":"[aarch64] PR107920 - Fix incorrect handling of virtual operands in svld1rq_impl::fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnaLY=sigq_+fXpBZ++UpEw4AD_XdNL4H-1Gy4Knp+cAw@mail.gmail.com/mbox/"},{"id":28800,"url":"https://patchwork.plctlab.org/api/1.2/patches/28800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yeuyxdv.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:21:00","name":"[testsuite,riscv] uninit-pred-9_b bogus warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yeuyxdv.fsf@lxoliva.fsfla.org/mbox/"},{"id":28802,"url":"https://patchwork.plctlab.org/api/1.2/patches/28802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qpiyx9a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:23:45","name":"[testsuite,riscv] skip ssa-sink-18.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qpiyx9a.fsf@lxoliva.fsfla.org/mbox/"},{"id":28812,"url":"https://patchwork.plctlab.org/api/1.2/patches/28812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn7axilx.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:25:30","name":"[testsuite,arm/aarch64] -fno-short-enums for auto-init-[12].c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn7axilx.fsf@lxoliva.fsfla.org/mbox/"},{"id":28816,"url":"https://patchwork.plctlab.org/api/1.2/patches/28816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfhyxik0.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:26:39","name":"[PR42093,arm,thumb2] disable tree-dce for test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfhyxik0.fsf@lxoliva.fsfla.org/mbox/"},{"id":28820,"url":"https://patchwork.plctlab.org/api/1.2/patches/28820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7smxieq.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:29:49","name":"[PR40457,arm] expand SI-aligned movdi into pair of movsi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7smxieq.fsf@lxoliva.fsfla.org/mbox/"},{"id":28821,"url":"https://patchwork.plctlab.org/api/1.2/patches/28821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork03axi6x.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:34:30","name":"[arm] xfail fp-uint64-convert-double tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork03axi6x.fsf@lxoliva.fsfla.org/mbox/"},{"id":28824,"url":"https://patchwork.plctlab.org/api/1.2/patches/28824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4nH2qqDl0WFBiYS@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:39:38","name":"i386: Save/restore recog_data in ix86_vector_duplicate_value [PR106577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4nH2qqDl0WFBiYS@tucnak/mbox/"},{"id":28831,"url":"https://patchwork.plctlab.org/api/1.2/patches/28831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsdyxhoy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-02T09:45:17","name":"[gcc-12,PR104308,analyzer] handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsdyxhoy.fsf@lxoliva.fsfla.org/mbox/"},{"id":28871,"url":"https://patchwork.plctlab.org/api/1.2/patches/28871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c210778d-e7d8-5d00-7255-329f7dfec052@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-02T11:27:29","name":"ipa: silent -Wodr notes with -w","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c210778d-e7d8-5d00-7255-329f7dfec052@suse.cz/mbox/"},{"id":28874,"url":"https://patchwork.plctlab.org/api/1.2/patches/28874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz/","msgid":"<332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz>","list_archive_url":null,"date":"2022-12-02T11:38:37","name":"[(pushed)] gcc: regenerate configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/332f91b3-83e3-8725-a6a1-8a7414002f73@suse.cz/mbox/"},{"id":28891,"url":"https://patchwork.plctlab.org/api/1.2/patches/28891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-2-thomas@codesourcery.com/","msgid":"<20221202120315.803120-2-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:07","name":"[1/9] nvptx: Re-enable '\''gcc.c-torture/compile/20080721-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-2-thomas@codesourcery.com/mbox/"},{"id":28890,"url":"https://patchwork.plctlab.org/api/1.2/patches/28890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-3-thomas@codesourcery.com/","msgid":"<20221202120315.803120-3-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:08","name":"[2/9] nvptx: Re-enable \"ptxas times out\" test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-3-thomas@codesourcery.com/mbox/"},{"id":28893,"url":"https://patchwork.plctlab.org/api/1.2/patches/28893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-4-thomas@codesourcery.com/","msgid":"<20221202120315.803120-4-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:09","name":"[3/9] nvptx: Re-enable test cases by removing effective target '\''freestanding'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-4-thomas@codesourcery.com/mbox/"},{"id":28894,"url":"https://patchwork.plctlab.org/api/1.2/patches/28894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-5-thomas@codesourcery.com/","msgid":"<20221202120315.803120-5-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:10","name":"[4/9] nvptx: Re-enable all variants of '\''gcc.c-torture/execute/20020529-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-5-thomas@codesourcery.com/mbox/"},{"id":28896,"url":"https://patchwork.plctlab.org/api/1.2/patches/28896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-6-thomas@codesourcery.com/","msgid":"<20221202120315.803120-6-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:11","name":"[5/9] nvptx: Re-enable '\''gcc.dg/special/weak-2.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-6-thomas@codesourcery.com/mbox/"},{"id":28898,"url":"https://patchwork.plctlab.org/api/1.2/patches/28898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-7-thomas@codesourcery.com/","msgid":"<20221202120315.803120-7-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:12","name":"[6/9] nvptx: Re-enable all variants of '\''c-c++-common/torture/complex-sign-mixed-add.c'\'', '\''c-c++-common/torture/complex-sign-mixed-sub.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-7-thomas@codesourcery.com/mbox/"},{"id":28892,"url":"https://patchwork.plctlab.org/api/1.2/patches/28892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-8-thomas@codesourcery.com/","msgid":"<20221202120315.803120-8-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:13","name":"[7/9] nvptx: Re-enable '\''gcc.dg/torture/c99-contract-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-8-thomas@codesourcery.com/mbox/"},{"id":28897,"url":"https://patchwork.plctlab.org/api/1.2/patches/28897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-9-thomas@codesourcery.com/","msgid":"<20221202120315.803120-9-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:14","name":"[8/9] nvptx: Re-enable \"Stack alignment causes use of alloca\" test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-9-thomas@codesourcery.com/mbox/"},{"id":28899,"url":"https://patchwork.plctlab.org/api/1.2/patches/28899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-10-thomas@codesourcery.com/","msgid":"<20221202120315.803120-10-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-02T12:03:15","name":"[9/9] nvptx: Re-enable '\''gcc.misc-tests/options.exp'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202120315.803120-10-thomas@codesourcery.com/mbox/"},{"id":28912,"url":"https://patchwork.plctlab.org/api/1.2/patches/28912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c654090-4263-a2f5-3651-312694a8f786@redhat.com/","msgid":"<1c654090-4263-a2f5-3651-312694a8f786@redhat.com>","list_archive_url":null,"date":"2022-12-02T13:30:32","name":"[committed,PR106462] LRA: Check hard reg availability of pseudo and its subreg for pseudo reload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c654090-4263-a2f5-3651-312694a8f786@redhat.com/mbox/"},{"id":28913,"url":"https://patchwork.plctlab.org/api/1.2/patches/28913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-12-02T13:35:35","name":"nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1rq7wt4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":28925,"url":"https://patchwork.plctlab.org/api/1.2/patches/28925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbc8f41c-fe12-b7af-c906-e19f1ce1224e@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T14:12:23","name":"Fix a few incorrect accesses.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbc8f41c-fe12-b7af-c906-e19f1ce1224e@redhat.com/mbox/"},{"id":28928,"url":"https://patchwork.plctlab.org/api/1.2/patches/28928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202143055.46CE813644@imap1.suse-dmz.suse.de/","msgid":"<20221202143055.46CE813644@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-02T14:30:54","name":"tree-optimization/107833 - invariant motion of uninit uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202143055.46CE813644@imap1.suse-dmz.suse.de/mbox/"},{"id":28944,"url":"https://patchwork.plctlab.org/api/1.2/patches/28944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202154512.310755-1-jason@redhat.com/","msgid":"<20221202154512.310755-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-02T15:45:12","name":"[RFA(tree)] c++: source position of lambda captures [PR84471]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202154512.310755-1-jason@redhat.com/mbox/"},{"id":29050,"url":"https://patchwork.plctlab.org/api/1.2/patches/29050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-2-cupertino.miranda@oracle.com/","msgid":"<20221202175225.2780-2-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2022-12-02T17:52:24","name":"[1/2] select .rodata for const volatile variables.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-2-cupertino.miranda@oracle.com/mbox/"},{"id":29049,"url":"https://patchwork.plctlab.org/api/1.2/patches/29049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-3-cupertino.miranda@oracle.com/","msgid":"<20221202175225.2780-3-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2022-12-02T17:52:25","name":"[2/2] Corrected pr25521.c target matching.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202175225.2780-3-cupertino.miranda@oracle.com/mbox/"},{"id":29082,"url":"https://patchwork.plctlab.org/api/1.2/patches/29082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202190110.3491914-1-ppalka@redhat.com/","msgid":"<20221202190110.3491914-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:01:10","name":"c++: substituting CONST_DECL_USING_P enumerator [PR103081]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202190110.3491914-1-ppalka@redhat.com/mbox/"},{"id":29086,"url":"https://patchwork.plctlab.org/api/1.2/patches/29086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202191104.3812885-1-dmalcolm@redhat.com/","msgid":"<20221202191104.3812885-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:11:04","name":"[trunk,PR104308,analyzer] handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202191104.3812885-1-dmalcolm@redhat.com/mbox/"},{"id":29091,"url":"https://patchwork.plctlab.org/api/1.2/patches/29091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202194228.3794597-1-ppalka@redhat.com/","msgid":"<20221202194228.3794597-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-02T19:42:28","name":"c++: unexpanded pack in requires-expr parm list [PR107417]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202194228.3794597-1-ppalka@redhat.com/mbox/"},{"id":29094,"url":"https://patchwork.plctlab.org/api/1.2/patches/29094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202202526.10504-1-iain@sandoe.co.uk/","msgid":"<20221202202526.10504-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-02T20:25:26","name":"coroutines: Do not promote temporaries that will be elided.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202202526.10504-1-iain@sandoe.co.uk/mbox/"},{"id":29115,"url":"https://patchwork.plctlab.org/api/1.2/patches/29115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213552.3820428-1-dmalcolm@redhat.com/","msgid":"<20221202213552.3820428-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T21:35:52","name":"[committed] analyzer: fixes to region creation messages [PR107851]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213552.3820428-1-dmalcolm@redhat.com/mbox/"},{"id":29116,"url":"https://patchwork.plctlab.org/api/1.2/patches/29116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213608.3820488-1-dmalcolm@redhat.com/","msgid":"<20221202213608.3820488-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-02T21:36:08","name":"[committed] analyzer: introduce struct event_loc_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221202213608.3820488-1-dmalcolm@redhat.com/mbox/"},{"id":29152,"url":"https://patchwork.plctlab.org/api/1.2/patches/29152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4qRJUvlu1VoykA9@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-02T23:58:29","name":"[v3] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y4qRJUvlu1VoykA9@redhat.com/mbox/"},{"id":29244,"url":"https://patchwork.plctlab.org/api/1.2/patches/29244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora644ykc0.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-03T08:15:11","name":"[PR102706,testsuite] -Wno-stringop-overflow vs Warray-bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora644ykc0.fsf@lxoliva.fsfla.org/mbox/"},{"id":29298,"url":"https://patchwork.plctlab.org/api/1.2/patches/29298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-76ab7545-a0b1-4fc6-9950-b47d9d13742d-1670092066726@3c-app-gmx-bs55/","msgid":"","list_archive_url":null,"date":"2022-12-03T18:27:46","name":"Fortran: error recovery handling invalid CLASS variable [PR107899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-76ab7545-a0b1-4fc6-9950-b47d9d13742d-1670092066726@3c-app-gmx-bs55/mbox/"},{"id":29300,"url":"https://patchwork.plctlab.org/api/1.2/patches/29300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/XEXAtikg5eNPBqsrJ2I9FS_DwVIKh3rZJRFUzbmyPpe_IpbJ96NXOpTQtdtsODI3NlnvaMQ5HV2VYrvXEE5UPByJTtIcDlISwnXW13PetJk=@lorenzosalvadore.it/","msgid":"","list_archive_url":null,"date":"2022-12-03T19:34:42","name":"Ping: [PATCH] jit: Install jit headers in $(libsubincludedir) [PR 101491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/XEXAtikg5eNPBqsrJ2I9FS_DwVIKh3rZJRFUzbmyPpe_IpbJ96NXOpTQtdtsODI3NlnvaMQ5HV2VYrvXEE5UPByJTtIcDlISwnXW13PetJk=@lorenzosalvadore.it/mbox/"},{"id":29340,"url":"https://patchwork.plctlab.org/api/1.2/patches/29340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a9bb8ff-dfa7-4a63-b4cf-99b4c9fe1d74-1670099062157@3c-app-gmx-bs13/","msgid":"","list_archive_url":null,"date":"2022-12-03T20:24:22","name":"Fortran: fix typo in documentation of intrinsic FLOOR [PR107870]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a9bb8ff-dfa7-4a63-b4cf-99b4c9fe1d74-1670099062157@3c-app-gmx-bs13/mbox/"},{"id":29398,"url":"https://patchwork.plctlab.org/api/1.2/patches/29398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204104437.32069-1-iain@sandoe.co.uk/","msgid":"<20221204104437.32069-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T10:44:37","name":"[pushed] libsanitizer, Darwin: Restrict build to Darwin 16 or newer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204104437.32069-1-iain@sandoe.co.uk/mbox/"},{"id":29403,"url":"https://patchwork.plctlab.org/api/1.2/patches/29403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204105345.33234-1-iain@sandoe.co.uk/","msgid":"<20221204105345.33234-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T10:53:45","name":"[pushed] libstdc++, Darwin: Fix weak attribute to use __weak__ instead of weak.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204105345.33234-1-iain@sandoe.co.uk/mbox/"},{"id":29405,"url":"https://patchwork.plctlab.org/api/1.2/patches/29405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204110815.34872-1-iain@sandoe.co.uk/","msgid":"<20221204110815.34872-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T11:08:15","name":"libstdc++, Darwin: Limit recursive mutex init to OS versions needing it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204110815.34872-1-iain@sandoe.co.uk/mbox/"},{"id":29412,"url":"https://patchwork.plctlab.org/api/1.2/patches/29412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204115150.35508-1-iain@sandoe.co.uk/","msgid":"<20221204115150.35508-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T11:51:50","name":"testsuite, X86, Darwin: Fix bf16 ABI tests for Mach-O/macOS ABI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204115150.35508-1-iain@sandoe.co.uk/mbox/"},{"id":29425,"url":"https://patchwork.plctlab.org/api/1.2/patches/29425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204163047.72124-1-iain@sandoe.co.uk/","msgid":"<20221204163047.72124-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-04T16:30:47","name":"c++, driver: Fix -static-libstdc++ for targets without Bstatic/dynamic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221204163047.72124-1-iain@sandoe.co.uk/mbox/"},{"id":29482,"url":"https://patchwork.plctlab.org/api/1.2/patches/29482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global/","msgid":"<20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global>","list_archive_url":null,"date":"2022-12-05T01:40:38","name":"[v3] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205014037.94341-1-jorgen.kvalsvik@woven-planet.global/mbox/"},{"id":29503,"url":"https://patchwork.plctlab.org/api/1.2/patches/29503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/905c34de-6333-1021-05e6-942922918b18@linux.ibm.com/","msgid":"<905c34de-6333-1021-05e6-942922918b18@linux.ibm.com>","list_archive_url":null,"date":"2022-12-05T03:07:56","name":"[v2] Return a NULL rtx when targets don'\''t support cbranchcc4 or predicate check fails in prepare_cmp_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/905c34de-6333-1021-05e6-942922918b18@linux.ibm.com/mbox/"},{"id":29519,"url":"https://patchwork.plctlab.org/api/1.2/patches/29519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042101.4144757-1-ppalka@redhat.com/","msgid":"<20221205042101.4144757-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-05T04:21:01","name":"tree, c++: declare some basic functions inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042101.4144757-1-ppalka@redhat.com/mbox/"},{"id":29520,"url":"https://patchwork.plctlab.org/api/1.2/patches/29520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042109.4144777-1-ppalka@redhat.com/","msgid":"<20221205042109.4144777-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-05T04:21:09","name":"tree, c++: optimize walk_tree_1 and cp_walk_subtrees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205042109.4144777-1-ppalka@redhat.com/mbox/"},{"id":29589,"url":"https://patchwork.plctlab.org/api/1.2/patches/29589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205081117.B59B11348F@imap1.suse-dmz.suse.de/","msgid":"<20221205081117.B59B11348F@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T08:11:17","name":"tree-optimization/107956 - ICE with NULL call LHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205081117.B59B11348F@imap1.suse-dmz.suse.de/mbox/"},{"id":29592,"url":"https://patchwork.plctlab.org/api/1.2/patches/29592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de/","msgid":"<20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T08:21:42","name":"plugins/107964 - install contracts.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205082142.A0D8B1348F@imap1.suse-dmz.suse.de/mbox/"},{"id":29632,"url":"https://patchwork.plctlab.org/api/1.2/patches/29632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43H+LkdiDQjILIU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T10:29:12","name":"match.pd: Don'\''t fold nan < x etc. for -ftrapping-math [PR106805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43H+LkdiDQjILIU@tucnak/mbox/"},{"id":29659,"url":"https://patchwork.plctlab.org/api/1.2/patches/29659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43dD0/eSrUNx/8Z@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T11:59:11","name":"range-op-float: Improve multiplication reverse operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y43dD0/eSrUNx/8Z@tucnak/mbox/"},{"id":29680,"url":"https://patchwork.plctlab.org/api/1.2/patches/29680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205134349.1730053-1-joakim@nohlgard.se/","msgid":"<20221205134349.1730053-1-joakim@nohlgard.se>","list_archive_url":null,"date":"2022-12-05T13:43:49","name":"[v2] gcc: Use ld -r when checking for HAVE_LD_RO_RW_SECTION_MIXING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205134349.1730053-1-joakim@nohlgard.se/mbox/"},{"id":29696,"url":"https://patchwork.plctlab.org/api/1.2/patches/29696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205135531.BBAC513326@imap1.suse-dmz.suse.de/","msgid":"<20221205135531.BBAC513326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T13:55:31","name":"tree-optimization/106868 - bogus -Wdangling-pointer diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205135531.BBAC513326@imap1.suse-dmz.suse.de/mbox/"},{"id":29699,"url":"https://patchwork.plctlab.org/api/1.2/patches/29699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205142850.969850-1-siddhesh@gotplt.org/","msgid":"<20221205142850.969850-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-05T14:28:50","name":"testsuite: Fix leaks in tree-dynamic-object-size-0.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205142850.969850-1-siddhesh@gotplt.org/mbox/"},{"id":29735,"url":"https://patchwork.plctlab.org/api/1.2/patches/29735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y44PYa8n3RkNIfCn@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T15:33:53","name":"range-op-float: Improve binary reverse operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y44PYa8n3RkNIfCn@tucnak/mbox/"},{"id":29736,"url":"https://patchwork.plctlab.org/api/1.2/patches/29736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205153955.5F6A813326@imap1.suse-dmz.suse.de/","msgid":"<20221205153955.5F6A813326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-05T15:39:55","name":"middle-end/40635 - SSA update losing PHI arg loations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221205153955.5F6A813326@imap1.suse-dmz.suse.de/mbox/"},{"id":29977,"url":"https://patchwork.plctlab.org/api/1.2/patches/29977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y446AHZfl9DZFrdx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-05T18:35:46","name":"range-op-float: Fix up ICE in lower_bound [PR107975]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y446AHZfl9DZFrdx@tucnak/mbox/"},{"id":30086,"url":"https://patchwork.plctlab.org/api/1.2/patches/30086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f321ea49-6adb-7f28-aa98-13168b961e3c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-06T05:44:49","name":"[v3,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f321ea49-6adb-7f28-aa98-13168b961e3c@linux.ibm.com/mbox/"},{"id":30111,"url":"https://patchwork.plctlab.org/api/1.2/patches/30111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206072340.C862C13326@imap1.suse-dmz.suse.de/","msgid":"<20221206072340.C862C13326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-06T07:23:40","name":"tree-optimization/104165 - bougs -Warray-bounds, add testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206072340.C862C13326@imap1.suse-dmz.suse.de/mbox/"},{"id":30115,"url":"https://patchwork.plctlab.org/api/1.2/patches/30115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com/","msgid":"<0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com>","list_archive_url":null,"date":"2022-12-06T07:45:07","name":"libgomp: Handle OpenMP'\''s reverse offloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0567b7c6-fede-72b8-63d1-1fc10dca36a0@codesourcery.com/mbox/"},{"id":30123,"url":"https://patchwork.plctlab.org/api/1.2/patches/30123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206080623.1879920-1-hongtao.liu@intel.com/","msgid":"<20221206080623.1879920-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-06T08:06:23","name":"[x86] Fix ICE due to condition mismatch between expander and define_insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206080623.1879920-1-hongtao.liu@intel.com/mbox/"},{"id":30144,"url":"https://patchwork.plctlab.org/api/1.2/patches/30144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b83d284d-c789-1e4a-f2c2-e06e2e6878fd@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-06T08:53:47","name":"[committed] libgomp.texi: Fix a OpenMP 5.2 and a TR11 impl-status item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b83d284d-c789-1e4a-f2c2-e06e2e6878fd@codesourcery.com/mbox/"},{"id":30146,"url":"https://patchwork.plctlab.org/api/1.2/patches/30146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com/","msgid":"<4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com>","list_archive_url":null,"date":"2022-12-06T08:59:17","name":"[wwwdocs] gcc-13/changes.html + projects/gomp: OpenMP GCC 13 update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f17329b-0550-780d-e55b-49b2dbcd1ea9@codesourcery.com/mbox/"},{"id":30150,"url":"https://patchwork.plctlab.org/api/1.2/patches/30150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206091153.27281-2-wangfeng@eswincomputing.com/","msgid":"<20221206091153.27281-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2022-12-06T09:11:53","name":"[v2,1/1] RISC-V: Optimze the reverse conditions of rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206091153.27281-2-wangfeng@eswincomputing.com/mbox/"},{"id":30183,"url":"https://patchwork.plctlab.org/api/1.2/patches/30183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206095020.A865B13326@imap1.suse-dmz.suse.de/","msgid":"<20221206095020.A865B13326@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-06T09:50:20","name":"tree-optimization/104475 - improve access diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206095020.A865B13326@imap1.suse-dmz.suse.de/mbox/"},{"id":30184,"url":"https://patchwork.plctlab.org/api/1.2/patches/30184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48S1d7kqcbRhfJ3@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:00:53","name":"Zen4 tuning part 1 - cost tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48S1d7kqcbRhfJ3@kam.mff.cuni.cz/mbox/"},{"id":30185,"url":"https://patchwork.plctlab.org/api/1.2/patches/30185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-2-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:33","name":"[Rust,front-end,v4,01/46] Use DW_ATE_UTF for the Rust '\''char'\'' type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-2-arthur.cohen@embecosm.com/mbox/"},{"id":30186,"url":"https://patchwork.plctlab.org/api/1.2/patches/30186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-3-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:34","name":"[Rust,front-end,v4,02/46] gccrs: Add necessary hooks for a Rust front-end testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-3-arthur.cohen@embecosm.com/mbox/"},{"id":30187,"url":"https://patchwork.plctlab.org/api/1.2/patches/30187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-4-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:35","name":"[Rust,front-end,v4,03/46] gccrs: Add Debug info testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-4-arthur.cohen@embecosm.com/mbox/"},{"id":30188,"url":"https://patchwork.plctlab.org/api/1.2/patches/30188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-5-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:36","name":"[Rust,front-end,v4,04/46] gccrs: Add link cases testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-5-arthur.cohen@embecosm.com/mbox/"},{"id":30192,"url":"https://patchwork.plctlab.org/api/1.2/patches/30192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-6-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:37","name":"[Rust,front-end,v4,05/46] gccrs: Add general compilation test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-6-arthur.cohen@embecosm.com/mbox/"},{"id":30190,"url":"https://patchwork.plctlab.org/api/1.2/patches/30190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-7-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:38","name":"[Rust,front-end,v4,06/46] gccrs: Add execution test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-7-arthur.cohen@embecosm.com/mbox/"},{"id":30189,"url":"https://patchwork.plctlab.org/api/1.2/patches/30189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-8-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:39","name":"[Rust,front-end,v4,07/46] gccrs: Add gcc-check-target check-rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-8-arthur.cohen@embecosm.com/mbox/"},{"id":30196,"url":"https://patchwork.plctlab.org/api/1.2/patches/30196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-9-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:40","name":"[Rust,front-end,v4,08/46] gccrs: Add Rust front-end base AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-9-arthur.cohen@embecosm.com/mbox/"},{"id":30201,"url":"https://patchwork.plctlab.org/api/1.2/patches/30201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-10-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:41","name":"[Rust,front-end,v4,09/46] gccrs: Add definitions of Rust Items in AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-10-arthur.cohen@embecosm.com/mbox/"},{"id":30194,"url":"https://patchwork.plctlab.org/api/1.2/patches/30194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-11-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:42","name":"[Rust,front-end,v4,10/46] gccrs: Add full definitions of Rust AST data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-11-arthur.cohen@embecosm.com/mbox/"},{"id":30191,"url":"https://patchwork.plctlab.org/api/1.2/patches/30191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-12-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:43","name":"[Rust,front-end,v4,11/46] gccrs: Add Rust AST visitors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-12-arthur.cohen@embecosm.com/mbox/"},{"id":30199,"url":"https://patchwork.plctlab.org/api/1.2/patches/30199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-13-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:44","name":"[Rust,front-end,v4,12/46] gccrs: Add Lexer for Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-13-arthur.cohen@embecosm.com/mbox/"},{"id":30193,"url":"https://patchwork.plctlab.org/api/1.2/patches/30193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-14-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:45","name":"[Rust,front-end,v4,13/46] gccrs: Add Parser for Rust front-end pt.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-14-arthur.cohen@embecosm.com/mbox/"},{"id":30195,"url":"https://patchwork.plctlab.org/api/1.2/patches/30195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-15-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:46","name":"[Rust,front-end,v4,14/46] gccrs: Add Parser for Rust front-end pt.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-15-arthur.cohen@embecosm.com/mbox/"},{"id":30198,"url":"https://patchwork.plctlab.org/api/1.2/patches/30198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-16-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:47","name":"[Rust,front-end,v4,15/46] gccrs: Add expansion pass for the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-16-arthur.cohen@embecosm.com/mbox/"},{"id":30200,"url":"https://patchwork.plctlab.org/api/1.2/patches/30200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-17-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:48","name":"[Rust,front-end,v4,16/46] gccrs: Add name resolution pass to the Rust front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-17-arthur.cohen@embecosm.com/mbox/"},{"id":30208,"url":"https://patchwork.plctlab.org/api/1.2/patches/30208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-18-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:49","name":"[Rust,front-end,v4,17/46] gccrs: Add declarations for Rust HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-18-arthur.cohen@embecosm.com/mbox/"},{"id":30207,"url":"https://patchwork.plctlab.org/api/1.2/patches/30207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-19-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:50","name":"[Rust,front-end,v4,18/46] gccrs: Add HIR definitions and visitor framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-19-arthur.cohen@embecosm.com/mbox/"},{"id":30209,"url":"https://patchwork.plctlab.org/api/1.2/patches/30209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-20-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:51","name":"[Rust,front-end,v4,19/46] gccrs: Add AST to HIR lowering pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-20-arthur.cohen@embecosm.com/mbox/"},{"id":30203,"url":"https://patchwork.plctlab.org/api/1.2/patches/30203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-21-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:52","name":"[Rust,front-end,v4,20/46] gccrs: Add wrapper for make_unique","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-21-arthur.cohen@embecosm.com/mbox/"},{"id":30213,"url":"https://patchwork.plctlab.org/api/1.2/patches/30213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-22-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:53","name":"[Rust,front-end,v4,21/46] gccrs: Add port of FNV hash used during legacy symbol mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-22-arthur.cohen@embecosm.com/mbox/"},{"id":30210,"url":"https://patchwork.plctlab.org/api/1.2/patches/30210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-23-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:54","name":"[Rust,front-end,v4,22/46] gccrs: Add Rust ABI enum helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-23-arthur.cohen@embecosm.com/mbox/"},{"id":30202,"url":"https://patchwork.plctlab.org/api/1.2/patches/30202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-24-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:55","name":"[Rust,front-end,v4,23/46] gccrs: Add Base62 implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-24-arthur.cohen@embecosm.com/mbox/"},{"id":30205,"url":"https://patchwork.plctlab.org/api/1.2/patches/30205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-25-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:56","name":"[Rust,front-end,v4,24/46] gccrs: Add implementation of Optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-25-arthur.cohen@embecosm.com/mbox/"},{"id":30211,"url":"https://patchwork.plctlab.org/api/1.2/patches/30211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-26-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:57","name":"[Rust,front-end,v4,25/46] gccrs: Add attributes checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-26-arthur.cohen@embecosm.com/mbox/"},{"id":30204,"url":"https://patchwork.plctlab.org/api/1.2/patches/30204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-27-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:58","name":"[Rust,front-end,v4,26/46] gccrs: Add helpers mappings canonical path and lang items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-27-arthur.cohen@embecosm.com/mbox/"},{"id":30219,"url":"https://patchwork.plctlab.org/api/1.2/patches/30219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-28-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:13:59","name":"[Rust,front-end,v4,27/46] gccrs: Add type resolution and trait solving pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-28-arthur.cohen@embecosm.com/mbox/"},{"id":30224,"url":"https://patchwork.plctlab.org/api/1.2/patches/30224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-29-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:00","name":"[Rust,front-end,v4,28/46] gccrs: Add Rust type information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-29-arthur.cohen@embecosm.com/mbox/"},{"id":30212,"url":"https://patchwork.plctlab.org/api/1.2/patches/30212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-30-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:01","name":"[Rust,front-end,v4,29/46] gccrs: Add remaining type system transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-30-arthur.cohen@embecosm.com/mbox/"},{"id":30214,"url":"https://patchwork.plctlab.org/api/1.2/patches/30214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-31-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:02","name":"[Rust,front-end,v4,30/46] gccrs: Add unsafe checks for Rust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-31-arthur.cohen@embecosm.com/mbox/"},{"id":30206,"url":"https://patchwork.plctlab.org/api/1.2/patches/30206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-32-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:03","name":"[Rust,front-end,v4,31/46] gccrs: Add const checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-32-arthur.cohen@embecosm.com/mbox/"},{"id":30217,"url":"https://patchwork.plctlab.org/api/1.2/patches/30217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-33-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:04","name":"[Rust,front-end,v4,32/46] gccrs: Add privacy checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-33-arthur.cohen@embecosm.com/mbox/"},{"id":30216,"url":"https://patchwork.plctlab.org/api/1.2/patches/30216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-34-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:05","name":"[Rust,front-end,v4,33/46] gccrs: Add dead code scan on HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-34-arthur.cohen@embecosm.com/mbox/"},{"id":30218,"url":"https://patchwork.plctlab.org/api/1.2/patches/30218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-35-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:07","name":"[Rust,front-end,v4,34/46] gccrs: Add unused variable scan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-35-arthur.cohen@embecosm.com/mbox/"},{"id":30215,"url":"https://patchwork.plctlab.org/api/1.2/patches/30215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-36-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:09","name":"[Rust,front-end,v4,35/46] gccrs: Add metadata output pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-36-arthur.cohen@embecosm.com/mbox/"},{"id":30228,"url":"https://patchwork.plctlab.org/api/1.2/patches/30228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-37-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:11","name":"[Rust,front-end,v4,36/46] gccrs: Add base for HIR to GCC GENERIC lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-37-arthur.cohen@embecosm.com/mbox/"},{"id":30222,"url":"https://patchwork.plctlab.org/api/1.2/patches/30222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-38-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:13","name":"[Rust,front-end,v4,37/46] gccrs: Add HIR to GCC GENERIC lowering for all nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-38-arthur.cohen@embecosm.com/mbox/"},{"id":30226,"url":"https://patchwork.plctlab.org/api/1.2/patches/30226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-39-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:15","name":"[Rust,front-end,v4,38/46] gccrs: Add HIR to GCC GENERIC lowering entry point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-39-arthur.cohen@embecosm.com/mbox/"},{"id":30220,"url":"https://patchwork.plctlab.org/api/1.2/patches/30220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-40-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:17","name":"[Rust,front-end,v4,39/46] gccrs: These are wrappers ported from reusing gccgo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-40-arthur.cohen@embecosm.com/mbox/"},{"id":30227,"url":"https://patchwork.plctlab.org/api/1.2/patches/30227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-41-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:18","name":"[Rust,front-end,v4,40/46] gccrs: Add GCC Rust front-end Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-41-arthur.cohen@embecosm.com/mbox/"},{"id":30221,"url":"https://patchwork.plctlab.org/api/1.2/patches/30221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-42-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:19","name":"[Rust,front-end,v4,41/46] gccrs: Add config-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-42-arthur.cohen@embecosm.com/mbox/"},{"id":30223,"url":"https://patchwork.plctlab.org/api/1.2/patches/30223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-43-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:20","name":"[Rust,front-end,v4,42/46] gccrs: Add lang-spec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-43-arthur.cohen@embecosm.com/mbox/"},{"id":30225,"url":"https://patchwork.plctlab.org/api/1.2/patches/30225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-44-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:21","name":"[Rust,front-end,v4,43/46] gccrs: Add lang.opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-44-arthur.cohen@embecosm.com/mbox/"},{"id":30229,"url":"https://patchwork.plctlab.org/api/1.2/patches/30229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-45-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:23","name":"[Rust,front-end,v4,44/46] gccrs: Add compiler driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-45-arthur.cohen@embecosm.com/mbox/"},{"id":30230,"url":"https://patchwork.plctlab.org/api/1.2/patches/30230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-46-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:25","name":"[Rust,front-end,v4,45/46] gccrs: Compiler proper interface kicks off the pipeline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-46-arthur.cohen@embecosm.com/mbox/"},{"id":30231,"url":"https://patchwork.plctlab.org/api/1.2/patches/30231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-47-arthur.cohen@embecosm.com/","msgid":"<20221206101417.778807-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-06T10:14:26","name":"[Rust,front-end,v4,46/46] gccrs: Add README, CONTRIBUTING and compiler logo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206101417.778807-47-arthur.cohen@embecosm.com/mbox/"},{"id":30232,"url":"https://patchwork.plctlab.org/api/1.2/patches/30232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dHK7UMNqkwdTs@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:44:44","name":"[committed] testsuite: Use -mnofpu for rx-*-* in ieee testsuite [PR107046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dHK7UMNqkwdTs@tucnak/mbox/"},{"id":30234,"url":"https://patchwork.plctlab.org/api/1.2/patches/30234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dxLVBpmVJLztI@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-06T10:47:32","name":"i386: Fix up expander conditions on cbranchbf4 and cstorebf4 [PR107969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48dxLVBpmVJLztI@tucnak/mbox/"},{"id":30238,"url":"https://patchwork.plctlab.org/api/1.2/patches/30238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48kD2pq/URhF8Ur@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-06T11:14:23","name":"Zen4 tuning part 2 - tuning flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y48kD2pq/URhF8Ur@kam.mff.cuni.cz/mbox/"},{"id":30265,"url":"https://patchwork.plctlab.org/api/1.2/patches/30265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206122707.494575-1-ibuclaw@gdcproject.org/","msgid":"<20221206122707.494575-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-06T12:27:07","name":"[committed] onlinedocs: Add documentation links to gdc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206122707.494575-1-ibuclaw@gdcproject.org/mbox/"},{"id":30303,"url":"https://patchwork.plctlab.org/api/1.2/patches/30303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206132624.1051104-1-jason@redhat.com/","msgid":"<20221206132624.1051104-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-06T13:26:24","name":"[RFA] build: add -Wconditionally-supported to strict_warn [PR64867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206132624.1051104-1-jason@redhat.com/mbox/"},{"id":30304,"url":"https://patchwork.plctlab.org/api/1.2/patches/30304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140126.716950-1-poulhies@adacore.com/","msgid":"<20221206140126.716950-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:26","name":"[COMMITTED] ada: Add Codepeer Exemption + simplify TO_C code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140126.716950-1-poulhies@adacore.com/mbox/"},{"id":30310,"url":"https://patchwork.plctlab.org/api/1.2/patches/30310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140137.717051-1-poulhies@adacore.com/","msgid":"<20221206140137.717051-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:37","name":"[COMMITTED] ada: Accessibility code reorganization and bug fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140137.717051-1-poulhies@adacore.com/mbox/"},{"id":30305,"url":"https://patchwork.plctlab.org/api/1.2/patches/30305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140149.717127-1-poulhies@adacore.com/","msgid":"<20221206140149.717127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:49","name":"[COMMITTED] ada: Use larger type for membership test of universal value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140149.717127-1-poulhies@adacore.com/mbox/"},{"id":30307,"url":"https://patchwork.plctlab.org/api/1.2/patches/30307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140158.717193-1-poulhies@adacore.com/","msgid":"<20221206140158.717193-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:01:58","name":"[COMMITTED] ada: Small adjustment to special resolution of membership test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140158.717193-1-poulhies@adacore.com/mbox/"},{"id":30308,"url":"https://patchwork.plctlab.org/api/1.2/patches/30308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140203.717258-1-poulhies@adacore.com/","msgid":"<20221206140203.717258-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:03","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140203.717258-1-poulhies@adacore.com/mbox/"},{"id":30311,"url":"https://patchwork.plctlab.org/api/1.2/patches/30311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140211.717323-1-poulhies@adacore.com/","msgid":"<20221206140211.717323-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:11","name":"[COMMITTED] ada: Fix spurious error in checking of SPARK elaboration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140211.717323-1-poulhies@adacore.com/mbox/"},{"id":30309,"url":"https://patchwork.plctlab.org/api/1.2/patches/30309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140219.717392-1-poulhies@adacore.com/","msgid":"<20221206140219.717392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:19","name":"[COMMITTED] ada: Suppress warning for specific constant valid condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140219.717392-1-poulhies@adacore.com/mbox/"},{"id":30306,"url":"https://patchwork.plctlab.org/api/1.2/patches/30306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140224.717457-1-poulhies@adacore.com/","msgid":"<20221206140224.717457-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:24","name":"[COMMITTED] ada: Spurious error on nested call using the prefix notation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140224.717457-1-poulhies@adacore.com/mbox/"},{"id":30312,"url":"https://patchwork.plctlab.org/api/1.2/patches/30312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140228.717520-1-poulhies@adacore.com/","msgid":"<20221206140228.717520-1-poulhies@adacore.com>","list_archive_url":null,"date":"2022-12-06T14:02:28","name":"[COMMITTED] ada: Allow No_Caching on volatile types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206140228.717520-1-poulhies@adacore.com/mbox/"},{"id":30338,"url":"https://patchwork.plctlab.org/api/1.2/patches/30338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qe5-LO@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,2/19] modula2 front end: Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qe5-LO@lancelot/mbox/"},{"id":30334,"url":"https://patchwork.plctlab.org/api/1.2/patches/30334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeL-Qd@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,3/19] modula2 front end: gm2 driver files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeL-Qd@lancelot/mbox/"},{"id":30337,"url":"https://patchwork.plctlab.org/api/1.2/patches/30337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeZ-WE@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,4/19] modula2 front end: libgm2/libm2pim contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004QeZ-WE@lancelot/mbox/"},{"id":30322,"url":"https://patchwork.plctlab.org/api/1.2/patches/30322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qdq-Gg@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:25","name":"[v3,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZED-004Qdq-Gg@lancelot/mbox/"},{"id":30323,"url":"https://patchwork.plctlab.org/api/1.2/patches/30323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qfk-S1@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,9/19] modula2 front end: plugin source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qfk-S1@lancelot/mbox/"},{"id":30319,"url":"https://patchwork.plctlab.org/api/1.2/patches/30319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qf1-Bo@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,6/19] modula2 front end: libgm2/libm2min contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qf1-Bo@lancelot/mbox/"},{"id":30320,"url":"https://patchwork.plctlab.org/api/1.2/patches/30320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qen-6m@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,5/19] modula2 front end: libgm2/libm2iso contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004Qen-6m@lancelot/mbox/"},{"id":30327,"url":"https://patchwork.plctlab.org/api/1.2/patches/30327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfW-Mo@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,8/19] modula2 front end: libgm2 contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfW-Mo@lancelot/mbox/"},{"id":30318,"url":"https://patchwork.plctlab.org/api/1.2/patches/30318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfF-Gz@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:26","name":"[v3,7/19] modula2 front end: libgm2/libm2log contents","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEE-004QfF-Gz@lancelot/mbox/"},{"id":30355,"url":"https://patchwork.plctlab.org/api/1.2/patches/30355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgF-C1@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,11/19] modula2 front end: gimple interface *[a-d]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgF-C1@lancelot/mbox/"},{"id":30329,"url":"https://patchwork.plctlab.org/api/1.2/patches/30329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qfy-3L@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,10/19] modula2 front end: gimple interface header files *.h and *.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qfy-3L@lancelot/mbox/"},{"id":30341,"url":"https://patchwork.plctlab.org/api/1.2/patches/30341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qgl-Sj@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,13/19] modula2 front end: gimple interface *[g-m]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004Qgl-Sj@lancelot/mbox/"},{"id":30360,"url":"https://patchwork.plctlab.org/api/1.2/patches/30360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgU-Kq@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:27","name":"[v3,12/19] modula2 front end: gimple interface *[e-f]*.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEF-004QgU-Kq@lancelot/mbox/"},{"id":30336,"url":"https://patchwork.plctlab.org/api/1.2/patches/30336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qhj-S4@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,17/19] modula2 front end: dejagnu expect library scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qhj-S4@lancelot/mbox/"},{"id":30339,"url":"https://patchwork.plctlab.org/api/1.2/patches/30339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhG-Bj@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,15/19] modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhG-Bj@lancelot/mbox/"},{"id":30359,"url":"https://patchwork.plctlab.org/api/1.2/patches/30359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qgz-29@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,14/19] modula2 front end: gimple interface remainder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004Qgz-29@lancelot/mbox/"},{"id":30340,"url":"https://patchwork.plctlab.org/api/1.2/patches/30340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhV-Lh@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T14:47:28","name":"[v3,16/19] modula2 front end: bootstrap and documentation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2ZEG-004QhV-Lh@lancelot/mbox/"},{"id":30426,"url":"https://patchwork.plctlab.org/api/1.2/patches/30426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-2-qing.zhao@oracle.com/","msgid":"<20221206161438.2396168-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:14:36","name":"[V2,1/1] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-2-qing.zhao@oracle.com/mbox/"},{"id":30425,"url":"https://patchwork.plctlab.org/api/1.2/patches/30425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-3-qing.zhao@oracle.com/","msgid":"<20221206161438.2396168-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:14:37","name":"[V3,1/2] Update -Warray-bounds with -fstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161438.2396168-3-qing.zhao@oracle.com/mbox/"},{"id":30427,"url":"https://patchwork.plctlab.org/api/1.2/patches/30427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161844.2397151-1-qing.zhao@oracle.com/","msgid":"<20221206161844.2397151-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2022-12-06T16:18:44","name":"[V3,2/2] Add a new warning option -Wstrict-flex-arrays.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206161844.2397151-1-qing.zhao@oracle.com/mbox/"},{"id":30465,"url":"https://patchwork.plctlab.org/api/1.2/patches/30465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206175702.987794-1-ppalka@redhat.com/","msgid":"<20221206175702.987794-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-06T17:57:02","name":"c++: NTTP object wrapper substitution fixes [PR103346, ...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206175702.987794-1-ppalka@redhat.com/mbox/"},{"id":30469,"url":"https://patchwork.plctlab.org/api/1.2/patches/30469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183631.4095755-1-dmalcolm@redhat.com/","msgid":"<20221206183631.4095755-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:36:31","name":"[committed] analyzer: split out more stuff from region-model-impl-calls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183631.4095755-1-dmalcolm@redhat.com/mbox/"},{"id":30470,"url":"https://patchwork.plctlab.org/api/1.2/patches/30470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183649.4095806-1-dmalcolm@redhat.com/","msgid":"<20221206183649.4095806-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:36:49","name":"[committed] analyzer: update internal docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183649.4095806-1-dmalcolm@redhat.com/mbox/"},{"id":30471,"url":"https://patchwork.plctlab.org/api/1.2/patches/30471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183743.4095884-1-dmalcolm@redhat.com/","msgid":"<20221206183743.4095884-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:37:43","name":"[committed] contrib: doxygen: add gcc/analyzer subdirectory to INPUT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183743.4095884-1-dmalcolm@redhat.com/mbox/"},{"id":30472,"url":"https://patchwork.plctlab.org/api/1.2/patches/30472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183800.4095931-1-dmalcolm@redhat.com/","msgid":"<20221206183800.4095931-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T18:38:00","name":"[committed] analyzer: use __attribute__((nonnull)) at top level of analysis [PR106325]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206183800.4095931-1-dmalcolm@redhat.com/mbox/"},{"id":30478,"url":"https://patchwork.plctlab.org/api/1.2/patches/30478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2dbP-006uqW-MN@lancelot/","msgid":"","list_archive_url":null,"date":"2022-12-06T19:27:39","name":"[v4,15/19] modula2 front end: cc1gm2 additional non modula2 source files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E1p2dbP-006uqW-MN@lancelot/mbox/"},{"id":30481,"url":"https://patchwork.plctlab.org/api/1.2/patches/30481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-1-gcc@hazardy.de/","msgid":"<20221206195028.37104-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:25","name":"[1/4] libbacktrace: change all pc related variables to uintptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-1-gcc@hazardy.de/mbox/"},{"id":30483,"url":"https://patchwork.plctlab.org/api/1.2/patches/30483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-2-gcc@hazardy.de/","msgid":"<20221206195028.37104-2-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:26","name":"[2/4] libbacktrace: detect executable path on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-2-gcc@hazardy.de/mbox/"},{"id":30482,"url":"https://patchwork.plctlab.org/api/1.2/patches/30482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-3-gcc@hazardy.de/","msgid":"<20221206195028.37104-3-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:27","name":"[3/4] libbacktrace: work with aslr on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-3-gcc@hazardy.de/mbox/"},{"id":30480,"url":"https://patchwork.plctlab.org/api/1.2/patches/30480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-4-gcc@hazardy.de/","msgid":"<20221206195028.37104-4-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-06T19:50:28","name":"[4/4] libbacktrace: get debug information for loaded dlls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206195028.37104-4-gcc@hazardy.de/mbox/"},{"id":30513,"url":"https://patchwork.plctlab.org/api/1.2/patches/30513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213420.232451-1-jwakely@redhat.com/","msgid":"<20221206213420.232451-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:34:20","name":"[committed] libstdc++: The Trouble with Tribbles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213420.232451-1-jwakely@redhat.com/mbox/"},{"id":30514,"url":"https://patchwork.plctlab.org/api/1.2/patches/30514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213631.238976-1-jwakely@redhat.com/","msgid":"<20221206213631.238976-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:36:31","name":"[committed] libstdc++: Add nodiscard attribute to mutex try_lock functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213631.238976-1-jwakely@redhat.com/mbox/"},{"id":30515,"url":"https://patchwork.plctlab.org/api/1.2/patches/30515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213654.239004-1-jwakely@redhat.com/","msgid":"<20221206213654.239004-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:36:54","name":"[committed] libstdc++: Add hint to compiler about vector invariants [PR106434]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206213654.239004-1-jwakely@redhat.com/mbox/"},{"id":30517,"url":"https://patchwork.plctlab.org/api/1.2/patches/30517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214054.239631-1-jwakely@redhat.com/","msgid":"<20221206214054.239631-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:40:54","name":"[committed] libstdc++: Add casts for integer-like difference type [PR107871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214054.239631-1-jwakely@redhat.com/mbox/"},{"id":30518,"url":"https://patchwork.plctlab.org/api/1.2/patches/30518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214100.239663-1-jwakely@redhat.com/","msgid":"<20221206214100.239663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-06T21:41:00","name":"[committed] libstdc++: Fix test that fails due to name clash with old glibc [PR107979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206214100.239663-1-jwakely@redhat.com/mbox/"},{"id":30544,"url":"https://patchwork.plctlab.org/api/1.2/patches/30544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206233146.4111115-1-dmalcolm@redhat.com/","msgid":"<20221206233146.4111115-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-06T23:31:46","name":"[committed] analyzer: don'\''t create bindings or binding keys for empty regions [PR107882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221206233146.4111115-1-dmalcolm@redhat.com/mbox/"},{"id":30575,"url":"https://patchwork.plctlab.org/api/1.2/patches/30575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207014152.3313833-1-chenglulu@loongson.cn/","msgid":"<20221207014152.3313833-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-07T01:41:53","name":"doc: Correct a clerical error in the document.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207014152.3313833-1-chenglulu@loongson.cn/mbox/"},{"id":30622,"url":"https://patchwork.plctlab.org/api/1.2/patches/30622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6fed247-243f-45c3-cfb3-53d7bdfc2b65@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T05:17:08","name":"[v2] Add a new conversion for conditional ternary set into ifcvt [PR106536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6fed247-243f-45c3-cfb3-53d7bdfc2b65@linux.ibm.com/mbox/"},{"id":30653,"url":"https://patchwork.plctlab.org/api/1.2/patches/30653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207063644.100134-1-hongyu.wang@intel.com/","msgid":"<20221207063644.100134-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2022-12-07T06:36:44","name":"i386: Avoid fma_chain for -march=alderlake and sapphirerapids.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207063644.100134-1-hongyu.wang@intel.com/mbox/"},{"id":30692,"url":"https://patchwork.plctlab.org/api/1.2/patches/30692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3383e0b-29d1-622b-3278-f10aa173fa62@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T08:08:09","name":"libgomp.texi: Reverse-offload updates (was: [Patch] libgomp: Handle OpenMP'\''s reverse offloads)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3383e0b-29d1-622b-3278-f10aa173fa62@codesourcery.com/mbox/"},{"id":30695,"url":"https://patchwork.plctlab.org/api/1.2/patches/30695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BO16zJ9vReV+Af@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T08:29:11","name":"range-op-float: Fix up frange_arithmetic [PR107967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BO16zJ9vReV+Af@tucnak/mbox/"},{"id":30725,"url":"https://patchwork.plctlab.org/api/1.2/patches/30725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BdQ2An000WISET@alf.mars/","msgid":"","list_archive_url":null,"date":"2022-12-07T09:30:43","name":"preprocessor: __has_include_next should not error out [PR80755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5BdQ2An000WISET@alf.mars/mbox/"},{"id":30760,"url":"https://patchwork.plctlab.org/api/1.2/patches/30760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207102739.73934134CD@imap1.suse-dmz.suse.de/","msgid":"<20221207102739.73934134CD@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T10:27:39","name":"ipa/105676 - pure attribute suggestion for const function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207102739.73934134CD@imap1.suse-dmz.suse.de/mbox/"},{"id":30783,"url":"https://patchwork.plctlab.org/api/1.2/patches/30783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207112501.989ED136B4@imap1.suse-dmz.suse.de/","msgid":"<20221207112501.989ED136B4@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T11:25:01","name":"tree-optimization/104475 - bogus -Wstringop-overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207112501.989ED136B4@imap1.suse-dmz.suse.de/mbox/"},{"id":30789,"url":"https://patchwork.plctlab.org/api/1.2/patches/30789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207113633.993896-1-arthur.cohen@embecosm.com/","msgid":"<20221207113633.993896-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2022-12-07T11:36:33","name":"[committed] MAINTAINERS: Add myself as Rust front-end maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207113633.993896-1-arthur.cohen@embecosm.com/mbox/"},{"id":30805,"url":"https://patchwork.plctlab.org/api/1.2/patches/30805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207120008.126895-1-guojiufu@linux.ibm.com/","msgid":"<20221207120008.126895-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-07T12:00:08","name":"[V3] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207120008.126895-1-guojiufu@linux.ibm.com/mbox/"},{"id":30815,"url":"https://patchwork.plctlab.org/api/1.2/patches/30815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5CCrWLFwPMSRtEx@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T12:10:21","name":"range-op-float: frange_arithmetic tweaks for MODE_COMPOSITE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5CCrWLFwPMSRtEx@tucnak/mbox/"},{"id":30853,"url":"https://patchwork.plctlab.org/api/1.2/patches/30853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207135418.F35F4136B4@imap1.suse-dmz.suse.de/","msgid":"<20221207135418.F35F4136B4@imap1.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-07T13:54:18","name":"tree-optimization/106904 - bogus -Wstringopt-overflow with vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207135418.F35F4136B4@imap1.suse-dmz.suse.de/mbox/"},{"id":30897,"url":"https://patchwork.plctlab.org/api/1.2/patches/30897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207153939.49157-1-iain@sandoe.co.uk/","msgid":"<20221207153939.49157-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-07T15:39:39","name":"c++, TLS: Support cross-tu static initialization for targets without alias support [PR106435].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207153939.49157-1-iain@sandoe.co.uk/mbox/"},{"id":30900,"url":"https://patchwork.plctlab.org/api/1.2/patches/30900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C2HQOXFT+RTCId@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T15:49:49","name":"range-op-float, v2: Fix up frange_arithmetic [PR107967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C2HQOXFT+RTCId@tucnak/mbox/"},{"id":30909,"url":"https://patchwork.plctlab.org/api/1.2/patches/30909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C54d2clIOm0hrr@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-07T16:05:53","name":"range-op-float, v2: frange_arithmetic tweaks for MODE_COMPOSITE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5C54d2clIOm0hrr@tucnak/mbox/"},{"id":30933,"url":"https://patchwork.plctlab.org/api/1.2/patches/30933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1752ce19-956b-a055-2585-a6b0e2827572@redhat.com/","msgid":"<1752ce19-956b-a055-2585-a6b0e2827572@redhat.com>","list_archive_url":null,"date":"2022-12-07T16:44:04","name":"PR tree-optimization/107985 - Ensure arguments to range-op handler are supported.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1752ce19-956b-a055-2585-a6b0e2827572@redhat.com/mbox/"},{"id":30950,"url":"https://patchwork.plctlab.org/api/1.2/patches/30950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982520FB2F4810235D350BD831A9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T17:15:14","name":"[COMMITTED] AArch64: Fix assert in aarch64_move_imm [PR108006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982520FB2F4810235D350BD831A9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":30998,"url":"https://patchwork.plctlab.org/api/1.2/patches/30998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207190903.78a6b37f@squid.athome/","msgid":"<20221207190903.78a6b37f@squid.athome>","list_archive_url":null,"date":"2022-12-07T19:09:03","name":"[1/2] OpenMP/Fortran: Combined directives with map/firstprivate of same symbol","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207190903.78a6b37f@squid.athome/mbox/"},{"id":30999,"url":"https://patchwork.plctlab.org/api/1.2/patches/30999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207191355.2e43ea14@squid.athome/","msgid":"<20221207191355.2e43ea14@squid.athome>","list_archive_url":null,"date":"2022-12-07T19:13:55","name":"[2/2] OpenMP: Duplicate checking for map clauses in Fortran (PR107214)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207191355.2e43ea14@squid.athome/mbox/"},{"id":31000,"url":"https://patchwork.plctlab.org/api/1.2/patches/31000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com/","msgid":"<8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com>","list_archive_url":null,"date":"2022-12-07T19:19:24","name":"[committed] preprocessor: Enable __VA_OPT__ for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8479e8c5-897e-b33e-ac6-f8f4e211fc29@codesourcery.com/mbox/"},{"id":31005,"url":"https://patchwork.plctlab.org/api/1.2/patches/31005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab2a758-711d-6d30-6561-a4189efff023@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T19:25:29","name":"[committed] testsuite: Add test for C90 auto with implicit int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab2a758-711d-6d30-6561-a4189efff023@codesourcery.com/mbox/"},{"id":31016,"url":"https://patchwork.plctlab.org/api/1.2/patches/31016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207201827.1720474-1-ppalka@redhat.com/","msgid":"<20221207201827.1720474-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-07T20:18:27","name":"c++: ICE with concepts TS multiple auto deduction [PR101886]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207201827.1720474-1-ppalka@redhat.com/mbox/"},{"id":31022,"url":"https://patchwork.plctlab.org/api/1.2/patches/31022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207203409.104322-1-polacek@redhat.com/","msgid":"<20221207203409.104322-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-12-07T20:34:09","name":"docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207203409.104322-1-polacek@redhat.com/mbox/"},{"id":31049,"url":"https://patchwork.plctlab.org/api/1.2/patches/31049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205517.526182-1-rzinsly@ventanamicro.com/","msgid":"<20221207205517.526182-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-07T20:55:17","name":"RISC-V: Produce better code with complex constants [PR95632] [PR106602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205517.526182-1-rzinsly@ventanamicro.com/mbox/"},{"id":31050,"url":"https://patchwork.plctlab.org/api/1.2/patches/31050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-63117869-4396-41cc-8f80-3f7d4d02e5d6-1670446640941@3c-app-gmx-bs03/","msgid":"","list_archive_url":null,"date":"2022-12-07T20:57:20","name":"Fortran: handle zero-sized arrays in ctors with typespec [PR108010]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-63117869-4396-41cc-8f80-3f7d4d02e5d6-1670446640941@3c-app-gmx-bs03/mbox/"},{"id":31053,"url":"https://patchwork.plctlab.org/api/1.2/patches/31053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-2-david.faust@oracle.com/","msgid":"<20221207205734.9287-2-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:32","name":"[1/3] btf: add '\''extern'\'' linkage for variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-2-david.faust@oracle.com/mbox/"},{"id":31051,"url":"https://patchwork.plctlab.org/api/1.2/patches/31051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-3-david.faust@oracle.com/","msgid":"<20221207205734.9287-3-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:33","name":"[2/3] btf: fix '\''extern const void'\'' variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-3-david.faust@oracle.com/mbox/"},{"id":31052,"url":"https://patchwork.plctlab.org/api/1.2/patches/31052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-4-david.faust@oracle.com/","msgid":"<20221207205734.9287-4-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-07T20:57:34","name":"[3/3] btf: correct generation for extern funcs [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207205734.9287-4-david.faust@oracle.com/mbox/"},{"id":31064,"url":"https://patchwork.plctlab.org/api/1.2/patches/31064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207215028.1851790-1-ppalka@redhat.com/","msgid":"<20221207215028.1851790-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-07T21:50:28","name":"c++: modules and std::source_location::current() def arg [PR100881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221207215028.1851790-1-ppalka@redhat.com/mbox/"},{"id":31077,"url":"https://patchwork.plctlab.org/api/1.2/patches/31077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3d8e34-802-15a9-d4e6-317cd1c324ff@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-07T22:08:56","name":"[committed] c: Diagnose auto constexpr used with a type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3d8e34-802-15a9-d4e6-317cd1c324ff@codesourcery.com/mbox/"},{"id":31098,"url":"https://patchwork.plctlab.org/api/1.2/patches/31098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVMYucfwKjxTZvvuumHhbcwKYhjc3=LDZxGNfhMqr6Lqg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T00:22:57","name":"Add zstd support to libbacktrace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVMYucfwKjxTZvvuumHhbcwKYhjc3=LDZxGNfhMqr6Lqg@mail.gmail.com/mbox/"},{"id":31133,"url":"https://patchwork.plctlab.org/api/1.2/patches/31133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com/","msgid":"<3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com>","list_archive_url":null,"date":"2022-12-08T03:08:22","name":"[v4,rs6000] Enable have_cbranchcc4 on rs6000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3c425be3-f987-5303-18f2-4300dd155c5c@linux.ibm.com/mbox/"},{"id":31249,"url":"https://patchwork.plctlab.org/api/1.2/patches/31249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208091851.3459448-1-jcmvbkbc@gmail.com/","msgid":"<20221208091851.3459448-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-08T09:18:51","name":"[COMMITTED] libgcc: xtensa: remove stray symbols from X*HAL macro definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208091851.3459448-1-jcmvbkbc@gmail.com/mbox/"},{"id":31254,"url":"https://patchwork.plctlab.org/api/1.2/patches/31254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5Gy/7jwJG2UdNTA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-08T09:48:47","name":"i386: Add *concat3_{5,6,7} patterns [PR107627]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5Gy/7jwJG2UdNTA@tucnak/mbox/"},{"id":31255,"url":"https://patchwork.plctlab.org/api/1.2/patches/31255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5G4RyqhX5c0p38G@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-08T10:11:19","name":"cfgbuild: Fix DEBUG_INSN handling in find_bb_boundaries [PR106719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5G4RyqhX5c0p38G@tucnak/mbox/"},{"id":31282,"url":"https://patchwork.plctlab.org/api/1.2/patches/31282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081053400.17722@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2022-12-08T10:54:04","name":"tree-optimization/107699 - missed &data._M_elems + _1 != &data._M_elems folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081053400.17722@jbgna.fhfr.qr/mbox/"},{"id":31283,"url":"https://patchwork.plctlab.org/api/1.2/patches/31283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208105944.660323-1-jose.marchesi@oracle.com/","msgid":"<20221208105944.660323-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-08T10:59:44","name":"expr.cc: avoid unexpected side effects in expand_expr_divmod optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208105944.660323-1-jose.marchesi@oracle.com/mbox/"},{"id":31292,"url":"https://patchwork.plctlab.org/api/1.2/patches/31292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081100520.17722@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2022-12-08T11:07:08","name":"tree-optimization/99919 - bogus uninit diagnostic with bitfield guards","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2212081100520.17722@jbgna.fhfr.qr/mbox/"},{"id":31381,"url":"https://patchwork.plctlab.org/api/1.2/patches/31381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5H1+kCo+hcQsDHU@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T14:34:34","name":"[v2] docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5H1+kCo+hcQsDHU@redhat.com/mbox/"},{"id":31434,"url":"https://patchwork.plctlab.org/api/1.2/patches/31434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16679-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T16:39:13","name":"AArch64 div-by-255, ensure that arguments are registers. [PR107988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16679-tamar@arm.com/mbox/"},{"id":31435,"url":"https://patchwork.plctlab.org/api/1.2/patches/31435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208164230.2208644-1-ppalka@redhat.com/","msgid":"<20221208164230.2208644-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-08T16:42:30","name":"c++: class-scope qualified constrained auto [PR107188]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208164230.2208644-1-ppalka@redhat.com/mbox/"},{"id":31458,"url":"https://patchwork.plctlab.org/api/1.2/patches/31458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183444.1648084-1-jason@redhat.com/","msgid":"<20221208183444.1648084-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:34:44","name":"[pushed] c++: fewer allocator temps [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183444.1648084-1-jason@redhat.com/mbox/"},{"id":31459,"url":"https://patchwork.plctlab.org/api/1.2/patches/31459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183540.8667-1-david.faust@oracle.com/","msgid":"<20221208183540.8667-1-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-08T18:35:40","name":"bpf: add define_insn for bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208183540.8667-1-david.faust@oracle.com/mbox/"},{"id":31460,"url":"https://patchwork.plctlab.org/api/1.2/patches/31460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184111.1649145-1-jason@redhat.com/","msgid":"<20221208184111.1649145-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:41:11","name":"[pushed] c++: avoid initializer_list [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184111.1649145-1-jason@redhat.com/mbox/"},{"id":31461,"url":"https://patchwork.plctlab.org/api/1.2/patches/31461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184528.1657376-1-jason@redhat.com/","msgid":"<20221208184528.1657376-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T18:45:28","name":"[pushed] c++: build initializer_list in a loop [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208184528.1657376-1-jason@redhat.com/mbox/"},{"id":31509,"url":"https://patchwork.plctlab.org/api/1.2/patches/31509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c8f6193c-a103-49ca-a08b-64c2de66ad54-1670536782690@3c-app-gmx-bap18/","msgid":"","list_archive_url":null,"date":"2022-12-08T21:59:42","name":"Fortran: diagnose and reject duplicate CONTIGUOUS attribute [PR108025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c8f6193c-a103-49ca-a08b-64c2de66ad54-1670536782690@3c-app-gmx-bap18/mbox/"},{"id":31510,"url":"https://patchwork.plctlab.org/api/1.2/patches/31510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208220112.1700553-1-jason@redhat.com/","msgid":"<20221208220112.1700553-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-08T22:01:12","name":"[RFA] gimplify: avoid unnecessary copy of init array [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221208220112.1700553-1-jason@redhat.com/mbox/"},{"id":31523,"url":"https://patchwork.plctlab.org/api/1.2/patches/31523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5JrqSFa/3Z2D4AR@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-08T22:56:41","name":"[v3] docs: Suggest options to improve ASAN stack traces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5JrqSFa/3Z2D4AR@redhat.com/mbox/"},{"id":31560,"url":"https://patchwork.plctlab.org/api/1.2/patches/31560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003551.443038-1-jwakely@redhat.com/","msgid":"<20221209003551.443038-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:35:51","name":"[committed] libstdc++: Change class-key for duration and time_point to class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003551.443038-1-jwakely@redhat.com/mbox/"},{"id":31561,"url":"https://patchwork.plctlab.org/api/1.2/patches/31561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003602.443084-1-jwakely@redhat.com/","msgid":"<20221209003602.443084-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:02","name":"[committed] libstdc++: Add [[nodiscard]] to chrono conversion functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003602.443084-1-jwakely@redhat.com/mbox/"},{"id":31563,"url":"https://patchwork.plctlab.org/api/1.2/patches/31563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003611.443110-1-jwakely@redhat.com/","msgid":"<20221209003611.443110-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:11","name":"[committed] libstdc++: Fix some -Wunused warnings in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003611.443110-1-jwakely@redhat.com/mbox/"},{"id":31562,"url":"https://patchwork.plctlab.org/api/1.2/patches/31562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003620.443129-1-jwakely@redhat.com/","msgid":"<20221209003620.443129-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-09T00:36:20","name":"[committed] libstdc++: Remove digit separators [PR108015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209003620.443129-1-jwakely@redhat.com/mbox/"},{"id":31604,"url":"https://patchwork.plctlab.org/api/1.2/patches/31604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022845.32233-1-dmalcolm@redhat.com/","msgid":"<20221209022845.32233-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:28:45","name":"[committed] analyzer: handle memmove like memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022845.32233-1-dmalcolm@redhat.com/mbox/"},{"id":31605,"url":"https://patchwork.plctlab.org/api/1.2/patches/31605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022919.32279-1-dmalcolm@redhat.com/","msgid":"<20221209022919.32279-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:29:19","name":"[committed] analyzer: fix ICE on region creation during get_referenced_base_regions [PR108003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022919.32279-1-dmalcolm@redhat.com/mbox/"},{"id":31606,"url":"https://patchwork.plctlab.org/api/1.2/patches/31606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022933.32326-1-dmalcolm@redhat.com/","msgid":"<20221209022933.32326-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-09T02:29:33","name":"[committed] analyzer: rename region-model-impl-calls.cc to kf.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209022933.32326-1-dmalcolm@redhat.com/mbox/"},{"id":31608,"url":"https://patchwork.plctlab.org/api/1.2/patches/31608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-2-uwu@icenowy.me/","msgid":"<20221209024349.845948-2-uwu@icenowy.me>","list_archive_url":null,"date":"2022-12-09T02:43:48","name":"[1/2] LoongArch: respect the with values in config.gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-2-uwu@icenowy.me/mbox/"},{"id":31609,"url":"https://patchwork.plctlab.org/api/1.2/patches/31609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-3-uwu@icenowy.me/","msgid":"<20221209024349.845948-3-uwu@icenowy.me>","list_archive_url":null,"date":"2022-12-09T02:43:49","name":"[2/2] LoongArch: drop loongarch-driver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209024349.845948-3-uwu@icenowy.me/mbox/"},{"id":31696,"url":"https://patchwork.plctlab.org/api/1.2/patches/31696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209094141.1565366-1-chenglulu@loongson.cn/","msgid":"<20221209094141.1565366-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-09T09:41:42","name":"[v3] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209094141.1565366-1-chenglulu@loongson.cn/mbox/"},{"id":31740,"url":"https://patchwork.plctlab.org/api/1.2/patches/31740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com/","msgid":"<08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com>","list_archive_url":null,"date":"2022-12-09T13:32:29","name":"Fix memory constraint on MVE v[ld/st][2/4] instructions [PR107714]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fcbcb4-c1c5-2e9f-1efd-e1d08fb7a3f6@arm.com/mbox/"},{"id":31746,"url":"https://patchwork.plctlab.org/api/1.2/patches/31746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209135609.55159-1-sebastian.huber@embedded-brains.de/","msgid":"<20221209135609.55159-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-09T13:56:09","name":"gcov: Fix -fprofile-update=atomic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209135609.55159-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":31774,"url":"https://patchwork.plctlab.org/api/1.2/patches/31774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rjgu0gv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-09T14:16:00","name":"[10/15,V5] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rjgu0gv.fsf_-_@arm.com/mbox/"},{"id":31779,"url":"https://patchwork.plctlab.org/api/1.2/patches/31779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982B7A11182C4919D157793831C9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2022-12-09T14:26:11","name":"AArch64: Enable TARGET_CONST_ANCHOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982B7A11182C4919D157793831C9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":31898,"url":"https://patchwork.plctlab.org/api/1.2/patches/31898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de/","msgid":"<7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de>","list_archive_url":null,"date":"2022-12-09T17:34:18","name":"initialize fde objects lazily","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d18f085-ae46-138d-4f04-df5857b7b014@in.tum.de/mbox/"},{"id":31904,"url":"https://patchwork.plctlab.org/api/1.2/patches/31904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209181938.29706-1-amonakov@ispras.ru/","msgid":"<20221209181938.29706-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2022-12-09T18:19:38","name":"i386: correct division modeling in lujiazui.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209181938.29706-1-amonakov@ispras.ru/mbox/"},{"id":31905,"url":"https://patchwork.plctlab.org/api/1.2/patches/31905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209182510.43515-1-rzinsly@ventanamicro.com/","msgid":"<20221209182510.43515-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-09T18:25:10","name":"[v2] RISC-V: Produce better code with complex constants [PR95632] [PR106602]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209182510.43515-1-rzinsly@ventanamicro.com/mbox/"},{"id":31923,"url":"https://patchwork.plctlab.org/api/1.2/patches/31923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com/","msgid":"<9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com>","list_archive_url":null,"date":"2022-12-09T20:14:55","name":"Fortran/OpenMP: align/allocator modifiers to the allocate clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa813e0-6bca-3bcb-5bfc-68a61e912064@codesourcery.com/mbox/"},{"id":31926,"url":"https://patchwork.plctlab.org/api/1.2/patches/31926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com/","msgid":"<091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com>","list_archive_url":null,"date":"2022-12-09T21:12:47","name":"Fortran: Replace simple '\''.'\'' quotes by %<.%>","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/091af345-e484-7cca-e7df-b31bffbbe293@codesourcery.com/mbox/"},{"id":31927,"url":"https://patchwork.plctlab.org/api/1.2/patches/31927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-896fac60-06d8-49ed-9a30-56ae2e8b7c7f-1670621235681@3c-app-gmx-bs62/","msgid":"","list_archive_url":null,"date":"2022-12-09T21:27:15","name":"Fortran: ICE on recursive derived types with allocatable components [PR107872]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-896fac60-06d8-49ed-9a30-56ae2e8b7c7f-1670621235681@3c-app-gmx-bs62/mbox/"},{"id":31935,"url":"https://patchwork.plctlab.org/api/1.2/patches/31935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209215720.3142097-1-ppalka@redhat.com/","msgid":"<20221209215720.3142097-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-09T21:57:20","name":"c++: extract_local_specs and unevaluated contexts [PR100295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221209215720.3142097-1-ppalka@redhat.com/mbox/"},{"id":31955,"url":"https://patchwork.plctlab.org/api/1.2/patches/31955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edt86q3q.fsf@debian/","msgid":"<87edt86q3q.fsf@debian>","list_archive_url":null,"date":"2022-12-10T00:48:25","name":"[v4,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edt86q3q.fsf@debian/mbox/"},{"id":31977,"url":"https://patchwork.plctlab.org/api/1.2/patches/31977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgbv225f.fsf@euler.schwinge.homeip.net/","msgid":"<87zgbv225f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-10T06:39:24","name":"Prepare '\''contrib/gcc-changelog/git_commit.py'\'' for GCC/Rust (was: Rust front-end patches v4)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgbv225f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":31982,"url":"https://patchwork.plctlab.org/api/1.2/patches/31982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcr1zg2.fsf@euler.schwinge.homeip.net/","msgid":"<87pmcr1zg2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-10T07:37:49","name":"Add stub '\''gcc/rust/ChangeLog'\'' (was: Prepare '\''contrib/gcc-changelog/git_commit.py'\'' for GCC/Rust)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcr1zg2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":31995,"url":"https://patchwork.plctlab.org/api/1.2/patches/31995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RSeiXwNVUa7+dw@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-10T09:33:46","name":"c++: Ensure !!var is not an lvalue [PR107065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RSeiXwNVUa7+dw@tucnak/mbox/"},{"id":31997,"url":"https://patchwork.plctlab.org/api/1.2/patches/31997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RT+ZOKX3pHseJu@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-10T09:40:09","name":"ivopts: Fix IP_END handling for asm goto [PR107997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5RT+ZOKX3pHseJu@tucnak/mbox/"},{"id":31998,"url":"https://patchwork.plctlab.org/api/1.2/patches/31998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-2-arsen@aarsen.me/","msgid":"<20221210094303.2180127-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:00","name":"[1/4] contracts: Lowercase {MAYBE,NEVER}_CONTINUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-2-arsen@aarsen.me/mbox/"},{"id":31999,"url":"https://patchwork.plctlab.org/api/1.2/patches/31999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-3-arsen@aarsen.me/","msgid":"<20221210094303.2180127-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:01","name":"[2/4] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-3-arsen@aarsen.me/mbox/"},{"id":32000,"url":"https://patchwork.plctlab.org/api/1.2/patches/32000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-4-arsen@aarsen.me/","msgid":"<20221210094303.2180127-4-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:02","name":"[3/4] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-4-arsen@aarsen.me/mbox/"},{"id":32001,"url":"https://patchwork.plctlab.org/api/1.2/patches/32001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-5-arsen@aarsen.me/","msgid":"<20221210094303.2180127-5-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T09:43:03","name":"[4/4] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210094303.2180127-5-arsen@aarsen.me/mbox/"},{"id":32006,"url":"https://patchwork.plctlab.org/api/1.2/patches/32006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcrpkfv.fsf@debian/","msgid":"<87pmcrpkfv.fsf@debian>","list_archive_url":null,"date":"2022-12-10T11:28:04","name":"[v5,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite. Addendum.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcrpkfv.fsf@debian/mbox/"},{"id":32012,"url":"https://patchwork.plctlab.org/api/1.2/patches/32012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210113744.38708-1-iain@sandoe.co.uk/","msgid":"<20221210113744.38708-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-10T11:37:44","name":"coroutines: Accept '\''extern \"C\"'\'' coroutines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210113744.38708-1-iain@sandoe.co.uk/mbox/"},{"id":32023,"url":"https://patchwork.plctlab.org/api/1.2/patches/32023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210131356.3385654-1-arsen@aarsen.me/","msgid":"<20221210131356.3385654-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-10T13:13:56","name":"contracts: Stop relying on mangling for naming .pre/.post clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210131356.3385654-1-arsen@aarsen.me/mbox/"},{"id":32059,"url":"https://patchwork.plctlab.org/api/1.2/patches/32059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210155427.31858-1-iain@sandoe.co.uk/","msgid":"<20221210155427.31858-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-10T15:54:27","name":"coroutines: Build pointer initializers with nullptr_node [PR107768]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210155427.31858-1-iain@sandoe.co.uk/mbox/"},{"id":32096,"url":"https://patchwork.plctlab.org/api/1.2/patches/32096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-23942435-f209-452a-b9e2-427a01a491ef-1670706846774@3c-app-gmx-bap38/","msgid":"","list_archive_url":null,"date":"2022-12-10T21:14:06","name":"Fortran: reject bad SIZE argument while simplifying ISHFTC [PR106911]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-23942435-f209-452a-b9e2-427a01a491ef-1670706846774@3c-app-gmx-bap38/mbox/"},{"id":32097,"url":"https://patchwork.plctlab.org/api/1.2/patches/32097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-24b92e9f-fa6e-4c3c-bad9-e66b6e0de14f-1670707406360@3c-app-gmx-bap38/","msgid":"","list_archive_url":null,"date":"2022-12-10T21:23:26","name":"Fortran: fix ICE on bad use of statement function [PR107995]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-24b92e9f-fa6e-4c3c-bad9-e66b6e0de14f-1670707406360@3c-app-gmx-bap38/mbox/"},{"id":32102,"url":"https://patchwork.plctlab.org/api/1.2/patches/32102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-3-ben.boeckel@kitware.com/","msgid":"<20221210222050.1674457-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-12-10T22:20:49","name":"[v4,2/3] libcpp: add a function to determine UTF-8 validity of a C string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-3-ben.boeckel@kitware.com/mbox/"},{"id":32103,"url":"https://patchwork.plctlab.org/api/1.2/patches/32103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-4-ben.boeckel@kitware.com/","msgid":"<20221210222050.1674457-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2022-12-10T22:20:50","name":"[v4,3/3] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221210222050.1674457-4-ben.boeckel@kitware.com/mbox/"},{"id":32175,"url":"https://patchwork.plctlab.org/api/1.2/patches/32175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1e2eb80-e4bb-0fa7-f3f3-3b17f6a8a885@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-11T11:03:21","name":"[committed] fortran/openmp.cc: Remove '\''s'\'' that slipped in during %<..%> replacement (was: [Patch] Fortran: Replace simple '\''.'\'' quotes by %<.%>)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1e2eb80-e4bb-0fa7-f3f3-3b17f6a8a885@codesourcery.com/mbox/"},{"id":32189,"url":"https://patchwork.plctlab.org/api/1.2/patches/32189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133234.64ABB13413@imap2.suse-dmz.suse.de/","msgid":"<20221211133234.64ABB13413@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-11T13:32:34","name":"[1/2] Treat ADDR_EXPR and CONSTRUCTOR as GIMPLE/GENERIC magically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133234.64ABB13413@imap2.suse-dmz.suse.de/mbox/"},{"id":32190,"url":"https://patchwork.plctlab.org/api/1.2/patches/32190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133252.1DDD913413@imap2.suse-dmz.suse.de/","msgid":"<20221211133252.1DDD913413@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-11T13:32:51","name":"[2/2] tree-optimization/89317 - missed folding of (p + 4) - &p->d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211133252.1DDD913413@imap2.suse-dmz.suse.de/mbox/"},{"id":32196,"url":"https://patchwork.plctlab.org/api/1.2/patches/32196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211154519.2681701-1-ibuclaw@gdcproject.org/","msgid":"<20221211154519.2681701-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T15:45:19","name":"[committed] d: Expand bsr intrinsic as `clz(arg) ^ (argsize - 1)'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211154519.2681701-1-ibuclaw@gdcproject.org/mbox/"},{"id":32197,"url":"https://patchwork.plctlab.org/api/1.2/patches/32197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3670826-b9cf-a1a4-4f74-373c356f0994@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-11T16:21:09","name":"[(pushed)] unidiff: use newline='\''\\n'\'' argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3670826-b9cf-a1a4-4f74-373c356f0994@suse.cz/mbox/"},{"id":32198,"url":"https://patchwork.plctlab.org/api/1.2/patches/32198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211175259.2795408-1-ibuclaw@gdcproject.org/","msgid":"<20221211175259.2795408-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T17:52:59","name":"[committed] d: Fix internal compiler error: in visit, at d/imports.cc:72 (PR108050)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211175259.2795408-1-ibuclaw@gdcproject.org/mbox/"},{"id":32199,"url":"https://patchwork.plctlab.org/api/1.2/patches/32199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211181354.2826180-1-ibuclaw@gdcproject.org/","msgid":"<20221211181354.2826180-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-11T18:13:54","name":"[GCC-12,committed] d: Remove \"final\" and \"override\" from visitor method.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221211181354.2826180-1-ibuclaw@gdcproject.org/mbox/"},{"id":32216,"url":"https://patchwork.plctlab.org/api/1.2/patches/32216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8917110-4059-42e7-976e-d948e16611f0-1670798023698@3c-app-gmx-bap41/","msgid":"","list_archive_url":null,"date":"2022-12-11T22:33:43","name":"Fortran: improve checking of assumed size array spec [PR102180]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a8917110-4059-42e7-976e-d948e16611f0-1670798023698@3c-app-gmx-bap41/mbox/"},{"id":32224,"url":"https://patchwork.plctlab.org/api/1.2/patches/32224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-1-guojiufu@linux.ibm.com/","msgid":"<20221212013829.111739-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:38:28","name":"[V4,1/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-1-guojiufu@linux.ibm.com/mbox/"},{"id":32225,"url":"https://patchwork.plctlab.org/api/1.2/patches/32225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-2-guojiufu@linux.ibm.com/","msgid":"<20221212013829.111739-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:38:29","name":"[V4,2/2] rs6000: use li;x?oris to build constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212013829.111739-2-guojiufu@linux.ibm.com/mbox/"},{"id":32228,"url":"https://patchwork.plctlab.org/api/1.2/patches/32228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212014401.112147-1-guojiufu@linux.ibm.com/","msgid":"<20221212014401.112147-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-12T01:44:01","name":"[V2] rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212014401.112147-1-guojiufu@linux.ibm.com/mbox/"},{"id":32264,"url":"https://patchwork.plctlab.org/api/1.2/patches/32264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212075441.50129138F3@imap2.suse-dmz.suse.de/","msgid":"<20221212075441.50129138F3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-12T07:54:40","name":"tree-optimization/89317 - another pattern for &p->x != p + 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212075441.50129138F3@imap2.suse-dmz.suse.de/mbox/"},{"id":32266,"url":"https://patchwork.plctlab.org/api/1.2/patches/32266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212085020.40B6813456@imap2.suse-dmz.suse.de/","msgid":"<20221212085020.40B6813456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-12T08:50:19","name":"Revert parts of ADDR_EXPR/CONSTRUCTOR treatment change in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212085020.40B6813456@imap2.suse-dmz.suse.de/mbox/"},{"id":32346,"url":"https://patchwork.plctlab.org/api/1.2/patches/32346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a691b49a-b340-2c23-f047-ae546b183122@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T12:25:21","name":"[(pushed)] mklog: do not parse binary file for PR entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a691b49a-b340-2c23-f047-ae546b183122@suse.cz/mbox/"},{"id":32401,"url":"https://patchwork.plctlab.org/api/1.2/patches/32401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140113.716862-1-jwakely@redhat.com/","msgid":"<20221212140113.716862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:13","name":"[committed] libstdc++: Make operator<< for stacktraces less templated (LWG 3515)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140113.716862-1-jwakely@redhat.com/mbox/"},{"id":32402,"url":"https://patchwork.plctlab.org/api/1.2/patches/32402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140124.716909-1-jwakely@redhat.com/","msgid":"<20221212140124.716909-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:24","name":"[committed] libstdc++: Define atomic lock-free type aliases for C++20 [PR98034]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140124.716909-1-jwakely@redhat.com/mbox/"},{"id":32403,"url":"https://patchwork.plctlab.org/api/1.2/patches/32403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140132.716931-1-jwakely@redhat.com/","msgid":"<20221212140132.716931-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:32","name":"[committed] libstdc++: Change names that clash with Win32 or Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140132.716931-1-jwakely@redhat.com/mbox/"},{"id":32405,"url":"https://patchwork.plctlab.org/api/1.2/patches/32405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140139.716962-1-jwakely@redhat.com/","msgid":"<20221212140139.716962-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:39","name":"[committed] libstdc++: Fix constraint on std::basic_format_string [PR108024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140139.716962-1-jwakely@redhat.com/mbox/"},{"id":32404,"url":"https://patchwork.plctlab.org/api/1.2/patches/32404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140146.716976-1-jwakely@redhat.com/","msgid":"<20221212140146.716976-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-12T14:01:46","name":"[committed] libstdc++: Add a test checking for chrono::duration overflows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212140146.716976-1-jwakely@redhat.com/mbox/"},{"id":32452,"url":"https://patchwork.plctlab.org/api/1.2/patches/32452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cywimyy.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:05","name":"[1/9] ipa-cp: Write transformation summaries of all functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cywimyy.fsf@suse.cz/mbox/"},{"id":32453,"url":"https://patchwork.plctlab.org/api/1.2/patches/32453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65yegimym.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:17","name":"[2/9] ipa: Better way of applying both IPA-CP and IPA-SRA (PR 103227)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65yegimym.fsf@suse.cz/mbox/"},{"id":32455,"url":"https://patchwork.plctlab.org/api/1.2/patches/32455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64ju0imyd.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:26","name":"[3/9] ipa-cp: Leave removal of unused parameters to IPA-SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64ju0imyd.fsf@suse.cz/mbox/"},{"id":32454,"url":"https://patchwork.plctlab.org/api/1.2/patches/32454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6359kimxk.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:52:55","name":"[4/9] ipa-sra: Treat REFERENCE_TYPES as always dereferencable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6359kimxk.fsf@suse.cz/mbox/"},{"id":32456,"url":"https://patchwork.plctlab.org/api/1.2/patches/32456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri61qp4imwz.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:16","name":"[5/9] ipa-sra: Move caller->callee propagation before callee->caller one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri61qp4imwz.fsf@suse.cz/mbox/"},{"id":32457,"url":"https://patchwork.plctlab.org/api/1.2/patches/32457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zgbsh8ca.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:25","name":"[6/9] ipa-sra: Be optimistic about Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zgbsh8ca.fsf@suse.cz/mbox/"},{"id":32460,"url":"https://patchwork.plctlab.org/api/1.2/patches/32460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1rch8bw.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:39","name":"[7/9] ipa-sra: Forward propagation of sizes which are safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1rch8bw.fsf@suse.cz/mbox/"},{"id":32458,"url":"https://patchwork.plctlab.org/api/1.2/patches/32458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6wn6wh8bn.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:48","name":"[8/9] ipa-sra: Make scan_expr_access bail out on uninteresting expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6wn6wh8bn.fsf@suse.cz/mbox/"},{"id":32459,"url":"https://patchwork.plctlab.org/api/1.2/patches/32459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8mgh8bg.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-12T16:53:55","name":"[9/9] ipa: Avoid looking for IPA-SRA replacements where there are none","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6v8mgh8bg.fsf@suse.cz/mbox/"},{"id":32463,"url":"https://patchwork.plctlab.org/api/1.2/patches/32463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172057.3527670-1-ppalka@redhat.com/","msgid":"<20221212172057.3527670-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-12T17:20:57","name":"c++: template friend with variadic constraints [PR108066]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172057.3527670-1-ppalka@redhat.com/mbox/"},{"id":32464,"url":"https://patchwork.plctlab.org/api/1.2/patches/32464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172749.49723-1-gcc@hazardy.de/","msgid":"<20221212172749.49723-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:27:49","name":"libstdc++: enable on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212172749.49723-1-gcc@hazardy.de/mbox/"},{"id":32465,"url":"https://patchwork.plctlab.org/api/1.2/patches/32465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175508.50143-1-gcc@hazardy.de/","msgid":"<20221212175508.50143-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:55:08","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175508.50143-1-gcc@hazardy.de/mbox/"},{"id":32466,"url":"https://patchwork.plctlab.org/api/1.2/patches/32466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175601.50166-1-gcc@hazardy.de/","msgid":"<20221212175601.50166-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-12T17:56:01","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212175601.50166-1-gcc@hazardy.de/mbox/"},{"id":32514,"url":"https://patchwork.plctlab.org/api/1.2/patches/32514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212192557.52896-1-ibuclaw@gdcproject.org/","msgid":"<20221212192557.52896-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-12T19:25:57","name":"[committed] d: Fix undefined reference to nested lambda in template (PR108055)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221212192557.52896-1-ibuclaw@gdcproject.org/mbox/"},{"id":32526,"url":"https://patchwork.plctlab.org/api/1.2/patches/32526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7efcc196-d97a-4fa6-bd76-48e9eb90d528-1670876532663@3c-app-gmx-bs69/","msgid":"","list_archive_url":null,"date":"2022-12-12T20:22:12","name":"Fortran: NULL pointer dereference while parsing a function [PR107423]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7efcc196-d97a-4fa6-bd76-48e9eb90d528-1670876532663@3c-app-gmx-bs69/mbox/"},{"id":32546,"url":"https://patchwork.plctlab.org/api/1.2/patches/32546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWouEWbE=TkZ63D8fPeyJTKCVkLyobwsO5Go6BtDxib7g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-12T22:18:32","name":"libgo patch committed: Bump major version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWouEWbE=TkZ63D8fPeyJTKCVkLyobwsO5Go6BtDxib7g@mail.gmail.com/mbox/"},{"id":32597,"url":"https://patchwork.plctlab.org/api/1.2/patches/32597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com/","msgid":"<1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com>","list_archive_url":null,"date":"2022-12-13T02:31:15","name":"libgccjit: Allow comparing vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1aec893b44d81c5558db3c3b2ac8b63e8c456469.camel@zoho.com/mbox/"},{"id":32649,"url":"https://patchwork.plctlab.org/api/1.2/patches/32649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5gZ0o1nzCq9MmR9@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-13T06:21:06","name":"[V2] Rework 128-bit complex multiply and divide, PR target/107299","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5gZ0o1nzCq9MmR9@toto.the-meissners.org/mbox/"},{"id":32655,"url":"https://patchwork.plctlab.org/api/1.2/patches/32655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213064927.1416-1-shihua@iscas.ac.cn/","msgid":"<20221213064927.1416-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2022-12-13T06:49:27","name":"[RFC] RISC-V: Support RV64-ILP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213064927.1416-1-shihua@iscas.ac.cn/mbox/"},{"id":32721,"url":"https://patchwork.plctlab.org/api/1.2/patches/32721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hD4qnv/ddcKxyQ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:20:34","name":"i386: Fix up *concat*_{5,6,7} patterns [PR108044]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hD4qnv/ddcKxyQ@tucnak/mbox/"},{"id":32722,"url":"https://patchwork.plctlab.org/api/1.2/patches/32722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hFd0dYk/ijv5jQ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:27:19","name":"vect-patterns: Fix up vect_recog_rotate_pattern [PR108064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hFd0dYk/ijv5jQ@tucnak/mbox/"},{"id":32725,"url":"https://patchwork.plctlab.org/api/1.2/patches/32725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hHQJj9a5Fa4ILA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:34:56","name":"[committed] libsanitizer: Fix up libbacktrace build after r13-4547 [PR108072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hHQJj9a5Fa4ILA@tucnak/mbox/"},{"id":32727,"url":"https://patchwork.plctlab.org/api/1.2/patches/32727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hImCyw/3IIhGuT@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:40:40","name":"c++, libstdc++: Add typeinfo for _Float{16,32,64,128,32x,64x} and __bf16 types [PR108075]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hImCyw/3IIhGuT@tucnak/mbox/"},{"id":32728,"url":"https://patchwork.plctlab.org/api/1.2/patches/32728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hJdyuDW5yvCyz6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-13T09:44:23","name":"libstdc++: Update backtrace-rename.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5hJdyuDW5yvCyz6@tucnak/mbox/"},{"id":32748,"url":"https://patchwork.plctlab.org/api/1.2/patches/32748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213104156.A1875383EB15@sourceware.org/","msgid":"<20221213104156.A1875383EB15@sourceware.org>","list_archive_url":null,"date":"2022-12-13T10:41:10","name":"tree-optimization/108076 - if-conversion and forced labels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213104156.A1875383EB15@sourceware.org/mbox/"},{"id":32794,"url":"https://patchwork.plctlab.org/api/1.2/patches/32794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilifeb2h.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2022-12-13T12:35:02","name":"build: doc: Obsolete Solaris 11.3 support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilifeb2h.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":32833,"url":"https://patchwork.plctlab.org/api/1.2/patches/32833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213141055.10CCA383B6EC@sourceware.org/","msgid":"<20221213141055.10CCA383B6EC@sourceware.org>","list_archive_url":null,"date":"2022-12-13T14:10:09","name":"tree-optimization/105801 - CCP and .DEFERRED_INIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213141055.10CCA383B6EC@sourceware.org/mbox/"},{"id":32871,"url":"https://patchwork.plctlab.org/api/1.2/patches/32871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com/","msgid":"<0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com>","list_archive_url":null,"date":"2022-12-13T16:12:22","name":"[OG12,committed] OpenMP, libgomp: Handle unified shared memory in omp_target_is_accessible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ff30ea1-ee5f-7f10-dcbc-bea85e2bfa81@codesourcery.com/mbox/"},{"id":32872,"url":"https://patchwork.plctlab.org/api/1.2/patches/32872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a599f6ae-ac6d-7c59-890a-104e4d5e3e1c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T16:29:26","name":"[Fortran] libgfortran'\''s ISO_Fortran_binding.c: Use GCC11 version for backward-only code [PR108056]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a599f6ae-ac6d-7c59-890a-104e4d5e3e1c@codesourcery.com/mbox/"},{"id":32873,"url":"https://patchwork.plctlab.org/api/1.2/patches/32873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa14a602-d3d2-c5f7-a5d6-62aff32b7b7e@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T16:38:22","name":"Fortran: Extend align-clause checks of OpenMP'\''s allocate clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa14a602-d3d2-c5f7-a5d6-62aff32b7b7e@codesourcery.com/mbox/"},{"id":32895,"url":"https://patchwork.plctlab.org/api/1.2/patches/32895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16700-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-13T17:14:27","name":"AArch64 Fix ILP32 tbranch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16700-tamar@arm.com/mbox/"},{"id":32901,"url":"https://patchwork.plctlab.org/api/1.2/patches/32901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com/","msgid":"<857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com>","list_archive_url":null,"date":"2022-12-13T17:44:27","name":"OpenMP: Parse align clause in allocate directive in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/857e44cb-92ce-7f1d-c036-579d2e345107@codesourcery.com/mbox/"},{"id":32923,"url":"https://patchwork.plctlab.org/api/1.2/patches/32923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-2-david.faust@oracle.com/","msgid":"<20221213184426.8861-2-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:24","name":"[v2,1/3] btf: add '\''extern'\'' linkage for variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-2-david.faust@oracle.com/mbox/"},{"id":32924,"url":"https://patchwork.plctlab.org/api/1.2/patches/32924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-3-david.faust@oracle.com/","msgid":"<20221213184426.8861-3-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:25","name":"[v2,2/3] btf: fix '\''extern const void'\'' variables [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-3-david.faust@oracle.com/mbox/"},{"id":32925,"url":"https://patchwork.plctlab.org/api/1.2/patches/32925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-4-david.faust@oracle.com/","msgid":"<20221213184426.8861-4-david.faust@oracle.com>","list_archive_url":null,"date":"2022-12-13T18:44:26","name":"[v2,3/3] btf: correct generation for extern funcs [PR106773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213184426.8861-4-david.faust@oracle.com/mbox/"},{"id":32946,"url":"https://patchwork.plctlab.org/api/1.2/patches/32946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213210247.50375-1-gcc@hazardy.de/","msgid":"<20221213210247.50375-1-gcc@hazardy.de>","list_archive_url":null,"date":"2022-12-13T21:02:47","name":"libstdc++: Deliver names of C functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213210247.50375-1-gcc@hazardy.de/mbox/"},{"id":32964,"url":"https://patchwork.plctlab.org/api/1.2/patches/32964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213224548.853922-1-ibuclaw@gdcproject.org/","msgid":"<20221213224548.853922-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T22:45:48","name":"[GCC-12,committed] libphobos: Backport library and bindings fixes from mainline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213224548.853922-1-ibuclaw@gdcproject.org/mbox/"},{"id":32976,"url":"https://patchwork.plctlab.org/api/1.2/patches/32976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230344.872210-1-ibuclaw@gdcproject.org/","msgid":"<20221213230344.872210-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T23:03:44","name":"[GCC-11,committed] libphobos: Backport library and bindings fixes from mainline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230344.872210-1-ibuclaw@gdcproject.org/mbox/"},{"id":32977,"url":"https://patchwork.plctlab.org/api/1.2/patches/32977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230552.874531-1-ibuclaw@gdcproject.org/","msgid":"<20221213230552.874531-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2022-12-13T23:05:52","name":"[GCC-10,committed] libphobos: Fix std.path.expandTilde raising onOutOfMemory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221213230552.874531-1-ibuclaw@gdcproject.org/mbox/"},{"id":33011,"url":"https://patchwork.plctlab.org/api/1.2/patches/33011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e072e22428810ff407f96ce3d9e062b8@matoro.tk/","msgid":"","list_archive_url":null,"date":"2022-12-14T01:04:09","name":"libgo: add hppa as known target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e072e22428810ff407f96ce3d9e062b8@matoro.tk/mbox/"},{"id":33013,"url":"https://patchwork.plctlab.org/api/1.2/patches/33013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214014338.85391-1-haochen.jiang@intel.com/","msgid":"<20221214014338.85391-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-12-14T01:43:38","name":"Fix intrin name in Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214014338.85391-1-haochen.jiang@intel.com/mbox/"},{"id":33018,"url":"https://patchwork.plctlab.org/api/1.2/patches/33018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214021842.1015348-1-hongtao.liu@intel.com/","msgid":"<20221214021842.1015348-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-14T02:18:42","name":"[x86] x86: Don'\''t add crtfastmath.o for -shared and add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214021842.1015348-1-hongtao.liu@intel.com/mbox/"},{"id":33073,"url":"https://patchwork.plctlab.org/api/1.2/patches/33073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214064825.240605-1-juzhe.zhong@rivai.ai/","msgid":"<20221214064825.240605-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T06:48:25","name":"RISC-V: Fix RVV mask mode size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214064825.240605-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33074,"url":"https://patchwork.plctlab.org/api/1.2/patches/33074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214065744.124007-1-juzhe.zhong@rivai.ai/","msgid":"<20221214065744.124007-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T06:57:44","name":"RISC-V: Change vlmul printing rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214065744.124007-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33075,"url":"https://patchwork.plctlab.org/api/1.2/patches/33075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214070156.37689-1-juzhe.zhong@rivai.ai/","msgid":"<20221214070156.37689-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:01:56","name":"RISC-V: Fix RVV machine mode attribute configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214070156.37689-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33082,"url":"https://patchwork.plctlab.org/api/1.2/patches/33082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214071345.153278-1-juzhe.zhong@rivai.ai/","msgid":"<20221214071345.153278-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:13:45","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214071345.153278-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33085,"url":"https://patchwork.plctlab.org/api/1.2/patches/33085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073106.122871-1-juzhe.zhong@rivai.ai/","msgid":"<20221214073106.122871-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:31:06","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073106.122871-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33087,"url":"https://patchwork.plctlab.org/api/1.2/patches/33087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073111.124081-1-juzhe.zhong@rivai.ai/","msgid":"<20221214073111.124081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T07:31:11","name":"RISC-V: Support VSETVL PASS for RVV support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214073111.124081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33089,"url":"https://patchwork.plctlab.org/api/1.2/patches/33089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214074848.39A3238358AD@sourceware.org/","msgid":"<20221214074848.39A3238358AD@sourceware.org>","list_archive_url":null,"date":"2022-12-14T07:48:03","name":"tree-optimization/107617 - big-endian .LEN_STORE VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214074848.39A3238358AD@sourceware.org/mbox/"},{"id":33090,"url":"https://patchwork.plctlab.org/api/1.2/patches/33090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz/","msgid":"<116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz>","list_archive_url":null,"date":"2022-12-14T07:55:01","name":"[(pushed)] docs: document --param=ipa-sra-ptrwrap-growth-factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/116bcbd3-f5f9-4219-953e-4ec9cef3c457@suse.cz/mbox/"},{"id":33091,"url":"https://patchwork.plctlab.org/api/1.2/patches/33091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhict3i.fsf@debian/","msgid":"<87sfhict3i.fsf@debian>","list_archive_url":null,"date":"2022-12-14T08:00:49","name":"[v5,1a/19] modula2 front end: (long unedited patches).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhict3i.fsf@debian/mbox/"},{"id":33097,"url":"https://patchwork.plctlab.org/api/1.2/patches/33097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214080931.192028-1-juzhe.zhong@rivai.ai/","msgid":"<20221214080931.192028-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:09:31","name":"RISC-V: Add testcases for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214080931.192028-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33098,"url":"https://patchwork.plctlab.org/api/1.2/patches/33098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081301.218683-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081301.218683-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:13:01","name":"RISC-V: Add testcases for VSETVL PASS 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081301.218683-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33099,"url":"https://patchwork.plctlab.org/api/1.2/patches/33099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081548.253313-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081548.253313-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:15:48","name":"RISC-V: Add testcases for VSETVL PASS 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081548.253313-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33103,"url":"https://patchwork.plctlab.org/api/1.2/patches/33103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081935.256992-1-juzhe.zhong@rivai.ai/","msgid":"<20221214081935.256992-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:19:35","name":"RISC-V: Add testcases for VSETVL PASS 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214081935.256992-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33104,"url":"https://patchwork.plctlab.org/api/1.2/patches/33104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214082558.261570-1-juzhe.zhong@rivai.ai/","msgid":"<20221214082558.261570-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:25:58","name":"RISC-V: Add testcases for VSETVL PASS 5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214082558.261570-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33106,"url":"https://patchwork.plctlab.org/api/1.2/patches/33106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214083902.169785-1-juzhe.zhong@rivai.ai/","msgid":"<20221214083902.169785-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:39:02","name":"RISC-V: Fix annotation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214083902.169785-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33110,"url":"https://patchwork.plctlab.org/api/1.2/patches/33110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214085148.229220-1-juzhe.zhong@rivai.ai/","msgid":"<20221214085148.229220-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T08:51:48","name":"RISC-V: Remove unused redundant vector attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214085148.229220-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33116,"url":"https://patchwork.plctlab.org/api/1.2/patches/33116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5mT93N/K83jqSz7@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-14T09:14:31","name":"rust: Fix up aarch64-linux bootstrap [PR106072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5mT93N/K83jqSz7@tucnak/mbox/"},{"id":33153,"url":"https://patchwork.plctlab.org/api/1.2/patches/33153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672593b-414a-d1b4-8e84-abdba0915410@suse.cz/","msgid":"<2672593b-414a-d1b4-8e84-abdba0915410@suse.cz>","list_archive_url":null,"date":"2022-12-14T10:34:24","name":"[(pushed)] mklog: do not depend on recent unidiff version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672593b-414a-d1b4-8e84-abdba0915410@suse.cz/mbox/"},{"id":33155,"url":"https://patchwork.plctlab.org/api/1.2/patches/33155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com/","msgid":"<11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com>","list_archive_url":null,"date":"2022-12-14T10:47:21","name":"Fortran/OpenMP: Add parsing support for allocators directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d6c8f4-cdb1-ddb6-8d48-f76c4c8e6382@codesourcery.com/mbox/"},{"id":33160,"url":"https://patchwork.plctlab.org/api/1.2/patches/33160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com/","msgid":"<055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com>","list_archive_url":null,"date":"2022-12-14T11:21:20","name":"rs6000: Raise error for __vector_{quad, pair} uses without MMA enabled [PR106736]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/055fe22a-9fae-f6b1-c7a8-36ccc37fa9a8@linux.ibm.com/mbox/"},{"id":33163,"url":"https://patchwork.plctlab.org/api/1.2/patches/33163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214113641.63320-1-juzhe.zhong@rivai.ai/","msgid":"<20221214113641.63320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-14T11:36:41","name":"RISC-V: Remove unit-stride store from ta attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214113641.63320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":33197,"url":"https://patchwork.plctlab.org/api/1.2/patches/33197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0c0c26b-dbcd-9619-ee9c-f3ff3081f4ea@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:07:38","name":"[(pushed)] contrib: add copyright for my scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0c0c26b-dbcd-9619-ee9c-f3ff3081f4ea@suse.cz/mbox/"},{"id":33198,"url":"https://patchwork.plctlab.org/api/1.2/patches/33198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a95b8b6e-5685-52fa-0190-793eede45b19@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:10:32","name":"contrib: add contrib to update-copyright.py script","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a95b8b6e-5685-52fa-0190-793eede45b19@suse.cz/mbox/"},{"id":33205,"url":"https://patchwork.plctlab.org/api/1.2/patches/33205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfRj26CgWLBq=9M4AsC5WhhXOW4s3ynbjoSt2n8mv6LbRA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T13:39:24","name":"libgccjit: Fix a failing test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfRj26CgWLBq=9M4AsC5WhhXOW4s3ynbjoSt2n8mv6LbRA@mail.gmail.com/mbox/"},{"id":33224,"url":"https://patchwork.plctlab.org/api/1.2/patches/33224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214141151.933092-1-jwakely@redhat.com/","msgid":"<20221214141151.933092-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-14T14:11:51","name":"[committed] libstdc++: Fix size passed to operator delete [PR108097]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214141151.933092-1-jwakely@redhat.com/mbox/"},{"id":33235,"url":"https://patchwork.plctlab.org/api/1.2/patches/33235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfhirp37.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T15:18:20","name":"ipa-sra: Fix address escape case when detecting Fortran descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfhirp37.fsf@suse.cz/mbox/"},{"id":33236,"url":"https://patchwork.plctlab.org/api/1.2/patches/33236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7s6rp25.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-14T15:18:58","name":"ipa-sra: Consider the first parameter of methods safe to dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7s6rp25.fsf@suse.cz/mbox/"},{"id":33251,"url":"https://patchwork.plctlab.org/api/1.2/patches/33251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkry1rarli2.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T16:35:49","name":"[10/15,V6] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkry1rarli2.fsf_-_@arm.com/mbox/"},{"id":33254,"url":"https://patchwork.plctlab.org/api/1.2/patches/33254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrsfhirla6.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-14T16:40:33","name":"[12/15,V4] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrsfhirla6.fsf_-_@arm.com/mbox/"},{"id":33266,"url":"https://patchwork.plctlab.org/api/1.2/patches/33266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214174825.2340493-1-ppalka@redhat.com/","msgid":"<20221214174825.2340493-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-14T17:48:25","name":"c++: local alias in typename in lambda [PR105518]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214174825.2340493-1-ppalka@redhat.com/mbox/"},{"id":33320,"url":"https://patchwork.plctlab.org/api/1.2/patches/33320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccd68154-65bc-bd4b-be6b-cf71d00ee8e6@gmx.de/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:03:08","name":"gcov: annotate uncovered branches [PR107537]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccd68154-65bc-bd4b-be6b-cf71d00ee8e6@gmx.de/mbox/"},{"id":33358,"url":"https://patchwork.plctlab.org/api/1.2/patches/33358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5oy3GcsxSQ5xpgM@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:32:28","name":"[1/3,V3] PR 107299, Rework 128-bit complex multiply and divide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5oy3GcsxSQ5xpgM@toto.the-meissners.org/mbox/"},{"id":33360,"url":"https://patchwork.plctlab.org/api/1.2/patches/33360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozVm5L+crILT33@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:34:30","name":"[2/3,V3] PR 107299, Make __float128 use the _Float128 type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozVm5L+crILT33@toto.the-meissners.org/mbox/"},{"id":33362,"url":"https://patchwork.plctlab.org/api/1.2/patches/33362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozoQgEvX1iAgY7@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2022-12-14T20:35:45","name":"[3/3,V3] PR 107299, Update float 128-bit conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5ozoQgEvX1iAgY7@toto.the-meissners.org/mbox/"},{"id":33374,"url":"https://patchwork.plctlab.org/api/1.2/patches/33374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214210938.356311-1-dmalcolm@redhat.com/","msgid":"<20221214210938.356311-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-14T21:09:38","name":"[committed] analyzer: don'\''t call binding_key::make on empty regions [PR108065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221214210938.356311-1-dmalcolm@redhat.com/mbox/"},{"id":33394,"url":"https://patchwork.plctlab.org/api/1.2/patches/33394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcla8yz.fsf@euler.schwinge.homeip.net/","msgid":"<87pmcla8yz.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-14T22:58:28","name":"Make '\''-frust-incomplete-and-experimental-compiler-do-not-use'\'' a '\''Common'\'' option (was: Rust front-end patches v4)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmcla8yz.fsf@euler.schwinge.homeip.net/mbox/"},{"id":33438,"url":"https://patchwork.plctlab.org/api/1.2/patches/33438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215000145.2381507-1-ppalka@redhat.com/","msgid":"<20221215000145.2381507-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-15T00:01:45","name":"c++: partial ordering with memfn pointer cst [PR108104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215000145.2381507-1-ppalka@redhat.com/mbox/"},{"id":33481,"url":"https://patchwork.plctlab.org/api/1.2/patches/33481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215052557.608641-1-jason@redhat.com/","msgid":"<20221215052557.608641-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-15T05:25:57","name":"[pushed] c++: fix initializer_list transformation [PR108071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215052557.608641-1-jason@redhat.com/mbox/"},{"id":33483,"url":"https://patchwork.plctlab.org/api/1.2/patches/33483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-1-hongtao.liu@intel.com/","msgid":"<20221215062137.3128845-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-15T06:21:36","name":"[V2,1/2] x86: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-1-hongtao.liu@intel.com/mbox/"},{"id":33484,"url":"https://patchwork.plctlab.org/api/1.2/patches/33484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-2-hongtao.liu@intel.com/","msgid":"<20221215062137.3128845-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2022-12-15T06:21:37","name":"[V2,2/2,x86] x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215062137.3128845-2-hongtao.liu@intel.com/mbox/"},{"id":33542,"url":"https://patchwork.plctlab.org/api/1.2/patches/33542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5rSYNlWHHku4M/H@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-15T07:53:04","name":"into-ssa: Fix emitting debug stmts after asm goto [PR108095]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5rSYNlWHHku4M/H@tucnak/mbox/"},{"id":33567,"url":"https://patchwork.plctlab.org/api/1.2/patches/33567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215103253.896A8388CA4D@sourceware.org/","msgid":"<20221215103253.896A8388CA4D@sourceware.org>","list_archive_url":null,"date":"2022-12-15T10:32:06","name":"middle-end/108086 - reduce operand scanner use from inliner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215103253.896A8388CA4D@sourceware.org/mbox/"},{"id":33609,"url":"https://patchwork.plctlab.org/api/1.2/patches/33609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5sR1W/p4K0CEMRU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-15T12:23:49","name":"testsuite: Add support for Rust and Modula-2 effective target tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5sR1W/p4K0CEMRU@tucnak/mbox/"},{"id":33646,"url":"https://patchwork.plctlab.org/api/1.2/patches/33646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215130013.46408388CF26@sourceware.org/","msgid":"<20221215130013.46408388CF26@sourceware.org>","list_archive_url":null,"date":"2022-12-15T12:58:37","name":"middle-end/108086 - avoid quadraticness in copy_edges_for_bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215130013.46408388CF26@sourceware.org/mbox/"},{"id":33656,"url":"https://patchwork.plctlab.org/api/1.2/patches/33656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhgbuy0.fsf@debian/","msgid":"<87sfhgbuy0.fsf@debian>","list_archive_url":null,"date":"2022-12-15T14:30:47","name":"[committed,pushed] PR-107607 m2: Remove bdepend on realpath, cut and echo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfhgbuy0.fsf@debian/mbox/"},{"id":33699,"url":"https://patchwork.plctlab.org/api/1.2/patches/33699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215161535.2731182-1-ppalka@redhat.com/","msgid":"<20221215161535.2731182-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-15T16:15:35","name":"c++: variadic using-decl with parm pack in terminal name [PR102104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215161535.2731182-1-ppalka@redhat.com/mbox/"},{"id":33710,"url":"https://patchwork.plctlab.org/api/1.2/patches/33710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215163340.1802736-1-siddhesh@gotplt.org/","msgid":"<20221215163340.1802736-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T16:33:40","name":"middle-end/70090: Document that -fsanitize=object-size uses dynamic size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215163340.1802736-1-siddhesh@gotplt.org/mbox/"},{"id":33732,"url":"https://patchwork.plctlab.org/api/1.2/patches/33732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215165814.1808816-1-siddhesh@gotplt.org/","msgid":"<20221215165814.1808816-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T16:58:14","name":"doc: Fix documentation for __builtin_dynamic_object_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215165814.1808816-1-siddhesh@gotplt.org/mbox/"},{"id":33778,"url":"https://patchwork.plctlab.org/api/1.2/patches/33778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a63ofrpf.fsf@euler.schwinge.homeip.net/","msgid":"<87a63ofrpf.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-15T18:27:08","name":"nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution (was: [committed][nvptx] Add uniform_warp_check insn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a63ofrpf.fsf@euler.schwinge.homeip.net/mbox/"},{"id":33799,"url":"https://patchwork.plctlab.org/api/1.2/patches/33799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215192548.1999425-1-siddhesh@gotplt.org/","msgid":"<20221215192548.1999425-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-15T19:25:48","name":"tree-optimization/105043: Object Size Checking docs cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221215192548.1999425-1-siddhesh@gotplt.org/mbox/"},{"id":33802,"url":"https://patchwork.plctlab.org/api/1.2/patches/33802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com/","msgid":"<5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com>","list_archive_url":null,"date":"2022-12-15T19:28:44","name":"[committed,PR90706] IRA: Check that reg classes contain a hard reg of given mode in reg move cost calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c4c52e4-81aa-359d-2842-ca313a0daf11@redhat.com/mbox/"},{"id":33901,"url":"https://patchwork.plctlab.org/api/1.2/patches/33901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216083034.ACE883817F8B@sourceware.org/","msgid":"<20221216083034.ACE883817F8B@sourceware.org>","list_archive_url":null,"date":"2022-12-16T08:29:39","name":"middle-end/108086 - more operand scanner reduction in inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216083034.ACE883817F8B@sourceware.org/mbox/"},{"id":33913,"url":"https://patchwork.plctlab.org/api/1.2/patches/33913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5w2HuVCI8qOxaTP@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-16T09:10:54","name":"loop-invariant: Split preheader edge if the preheader bb ends with jump [PR106751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5w2HuVCI8qOxaTP@tucnak/mbox/"},{"id":33917,"url":"https://patchwork.plctlab.org/api/1.2/patches/33917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com/","msgid":"<780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com>","list_archive_url":null,"date":"2022-12-16T09:18:11","name":"gcc-changelog/git_email.py: Support older unidiff.PatchSet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/780f0808-44d4-9d95-c1a9-d408f1475741@codesourcery.com/mbox/"},{"id":33918,"url":"https://patchwork.plctlab.org/api/1.2/patches/33918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216092922.B1681382EF28@sourceware.org/","msgid":"<20221216092922.B1681382EF28@sourceware.org>","list_archive_url":null,"date":"2022-12-16T09:28:38","name":"middle-end/108086 - remove PR28238 fix superseeded by PR34018 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216092922.B1681382EF28@sourceware.org/mbox/"},{"id":33937,"url":"https://patchwork.plctlab.org/api/1.2/patches/33937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216102521.73271-1-sebastian.huber@embedded-brains.de/","msgid":"<20221216102521.73271-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-16T10:25:21","name":"[v2] gcov: Fix -fprofile-update=atomic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216102521.73271-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":33938,"url":"https://patchwork.plctlab.org/api/1.2/patches/33938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5xIHotpDlePrJwq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-16T10:27:42","name":"hwasan: Add libhwasan_preinit.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5xIHotpDlePrJwq@tucnak/mbox/"},{"id":33940,"url":"https://patchwork.plctlab.org/api/1.2/patches/33940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz/","msgid":"<8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz>","list_archive_url":null,"date":"2022-12-16T11:23:32","name":"[(pushed)] gcc-changelog: do not use PatchSet.from_filename","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8535eafd-58cc-5454-a92c-6aaf242b686b@suse.cz/mbox/"},{"id":33944,"url":"https://patchwork.plctlab.org/api/1.2/patches/33944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85ead47-3163-ff07-4f7b-63f53e2557ee@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T11:45:59","name":"[OG12,committed] libgomp: Fix USM bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a85ead47-3163-ff07-4f7b-63f53e2557ee@codesourcery.com/mbox/"},{"id":33947,"url":"https://patchwork.plctlab.org/api/1.2/patches/33947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216120617.1A7CB384D6C3@sourceware.org/","msgid":"<20221216120617.1A7CB384D6C3@sourceware.org>","list_archive_url":null,"date":"2022-12-16T12:05:31","name":"middle-end/108086 - avoid unshare_expr when remapping SSA names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216120617.1A7CB384D6C3@sourceware.org/mbox/"},{"id":33948,"url":"https://patchwork.plctlab.org/api/1.2/patches/33948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5c3e7dc-2244-99ca-c584-f157eca131b4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T12:33:22","name":"gcc-changelog: Add warning for auto-added files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5c3e7dc-2244-99ca-c584-f157eca131b4@codesourcery.com/mbox/"},{"id":33955,"url":"https://patchwork.plctlab.org/api/1.2/patches/33955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216133437.56618383F208@sourceware.org/","msgid":"<20221216133437.56618383F208@sourceware.org>","list_archive_url":null,"date":"2022-12-16T13:33:53","name":"Simplify gimple_assign_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216133437.56618383F208@sourceware.org/mbox/"},{"id":33957,"url":"https://patchwork.plctlab.org/api/1.2/patches/33957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87k02r78va.fsf@debian/","msgid":"<87k02r78va.fsf@debian>","list_archive_url":null,"date":"2022-12-16T13:53:29","name":"[m2] Add missing m2.stage{profile,feedback} to Make-lang.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87k02r78va.fsf@debian/mbox/"},{"id":33958,"url":"https://patchwork.plctlab.org/api/1.2/patches/33958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2022-12-16T14:10:12","name":"Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere (was: Make '\''-frust-incomplete-and-experimental-compiler-do-not-use'\'' a '\''Common'\'' option)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6xv8mnv.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":33959,"url":"https://patchwork.plctlab.org/api/1.2/patches/33959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216143105.118483-1-jwakely@redhat.com/","msgid":"<20221216143105.118483-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T14:31:05","name":"[committed] libstdc++: Fix self-move for std::weak_ptr [PR108118]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216143105.118483-1-jwakely@redhat.com/mbox/"},{"id":33994,"url":"https://patchwork.plctlab.org/api/1.2/patches/33994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216161054.3663182-1-manolis.tsamis@vrull.eu/","msgid":"<20221216161054.3663182-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-12-16T16:10:54","name":"[v2] ipa-cp: Speculatively call specialized functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216161054.3663182-1-manolis.tsamis@vrull.eu/mbox/"},{"id":34001,"url":"https://patchwork.plctlab.org/api/1.2/patches/34001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd877978-48c4-4a9b-66f9-a105d9901ec1@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-16T16:19:00","name":"nvptx/mkoffload.cc: Add dummy proc for OpenMP rev-offload table [PR108098]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd877978-48c4-4a9b-66f9-a105d9901ec1@codesourcery.com/mbox/"},{"id":34026,"url":"https://patchwork.plctlab.org/api/1.2/patches/34026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216164526.224772-1-ppalka@redhat.com/","msgid":"<20221216164526.224772-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-16T16:45:26","name":"c++: empty captured var as template argument [PR107437]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216164526.224772-1-ppalka@redhat.com/mbox/"},{"id":34031,"url":"https://patchwork.plctlab.org/api/1.2/patches/34031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170118.457649-1-dmalcolm@redhat.com/","msgid":"<20221216170118.457649-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T17:01:18","name":"gccrs: add selftest-rust-gdb and selftest-rust-valgrind \"make\" targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170118.457649-1-dmalcolm@redhat.com/mbox/"},{"id":34032,"url":"https://patchwork.plctlab.org/api/1.2/patches/34032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170152.457701-1-dmalcolm@redhat.com/","msgid":"<20221216170152.457701-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T17:01:52","name":"gccrs: avoid printing to stderr in selftest::rust_flatten_list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216170152.457701-1-dmalcolm@redhat.com/mbox/"},{"id":34042,"url":"https://patchwork.plctlab.org/api/1.2/patches/34042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216182817.295303-1-polacek@redhat.com/","msgid":"<20221216182817.295303-1-polacek@redhat.com>","list_archive_url":null,"date":"2022-12-16T18:28:17","name":"c-family: Fix ICE with -Wsuggest-attribute [PR98487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216182817.295303-1-polacek@redhat.com/mbox/"},{"id":34069,"url":"https://patchwork.plctlab.org/api/1.2/patches/34069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216195355.465351-1-dmalcolm@redhat.com/","msgid":"<20221216195355.465351-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2022-12-16T19:53:55","name":"[committed] analyzer: add src_region param to region_model::check_for_poison [PR106479]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216195355.465351-1-dmalcolm@redhat.com/mbox/"},{"id":34085,"url":"https://patchwork.plctlab.org/api/1.2/patches/34085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210028.161738-1-jwakely@redhat.com/","msgid":"<20221216210028.161738-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:00:28","name":"[committed] libstdc++: Diagnose broken allocator rebind members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210028.161738-1-jwakely@redhat.com/mbox/"},{"id":34086,"url":"https://patchwork.plctlab.org/api/1.2/patches/34086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210237.161771-1-jwakely@redhat.com/","msgid":"<20221216210237.161771-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:02:37","name":"[committed] libstdc++: Fixes for std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210237.161771-1-jwakely@redhat.com/mbox/"},{"id":34087,"url":"https://patchwork.plctlab.org/api/1.2/patches/34087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210251.162105-1-jwakely@redhat.com/","msgid":"<20221216210251.162105-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-16T21:02:51","name":"[committed] libstdc++: Add monadic operations to std::expected for C++23 (P2505R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216210251.162105-1-jwakely@redhat.com/mbox/"},{"id":34091,"url":"https://patchwork.plctlab.org/api/1.2/patches/34091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216213132.578277-1-hjl.tools@gmail.com/","msgid":"<20221216213132.578277-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2022-12-16T21:31:32","name":"libsanitizer: Add __interceptor_sigsetjmp_internal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221216213132.578277-1-hjl.tools@gmail.com/mbox/"},{"id":34100,"url":"https://patchwork.plctlab.org/api/1.2/patches/34100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5zpMNyFTOcgqqDf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-16T21:54:56","name":"[committed] Suppress warning from -fstack-protector on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y5zpMNyFTOcgqqDf@mx3210.localdomain/mbox/"},{"id":34214,"url":"https://patchwork.plctlab.org/api/1.2/patches/34214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1r6aspb.fsf@debian/","msgid":"<87y1r6aspb.fsf@debian>","list_archive_url":null,"date":"2022-12-17T16:41:20","name":"[m2] : PR-108122 Reduce sleep times in gm2/pimcoroutines/run/pass/testtime.mod","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1r6aspb.fsf@debian/mbox/"},{"id":34218,"url":"https://patchwork.plctlab.org/api/1.2/patches/34218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com/","msgid":"<5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com>","list_archive_url":null,"date":"2022-12-17T17:12:43","name":"[fortran] PR107397 ICE in gfc_arith_plus, at fortran/arith.cc:654","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dac7c39-c0e3-f7e7-8625-b672fc728e0c@gmail.com/mbox/"},{"id":34269,"url":"https://patchwork.plctlab.org/api/1.2/patches/34269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f80f540e394e87ac70349bad109bfc4b465c7c98.1671310804.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2022-12-17T21:01:51","name":"rs6000: Add Rust support to traceback table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f80f540e394e87ac70349bad109bfc4b465c7c98.1671310804.git.segher@kernel.crashing.org/mbox/"},{"id":34270,"url":"https://patchwork.plctlab.org/api/1.2/patches/34270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-3d8a6fbe-9e01-4e21-960b-3fde6a9d9f51-1671312077244@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2022-12-17T21:21:17","name":"Fortran: incorrect array bounds when bound intrinsic used in decl [PR108131]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-3d8a6fbe-9e01-4e21-960b-3fde6a9d9f51-1671312077244@3c-app-gmx-bap49/mbox/"},{"id":34354,"url":"https://patchwork.plctlab.org/api/1.2/patches/34354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-2-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:28","name":"[v2,01/11] riscv: attr: Synchronize comments with code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-2-christoph.muellner@vrull.eu/mbox/"},{"id":34356,"url":"https://patchwork.plctlab.org/api/1.2/patches/34356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-3-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:29","name":"[v2,02/11] riscv: Restructure callee-saved register save/restore code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-3-christoph.muellner@vrull.eu/mbox/"},{"id":34360,"url":"https://patchwork.plctlab.org/api/1.2/patches/34360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-4-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:30","name":"[v2,03/11] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-4-christoph.muellner@vrull.eu/mbox/"},{"id":34357,"url":"https://patchwork.plctlab.org/api/1.2/patches/34357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-5-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:31","name":"[v2,04/11] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-5-christoph.muellner@vrull.eu/mbox/"},{"id":34361,"url":"https://patchwork.plctlab.org/api/1.2/patches/34361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-6-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:32","name":"[v2,05/11] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-6-christoph.muellner@vrull.eu/mbox/"},{"id":34358,"url":"https://patchwork.plctlab.org/api/1.2/patches/34358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-7-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:33","name":"[v2,06/11] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-7-christoph.muellner@vrull.eu/mbox/"},{"id":34359,"url":"https://patchwork.plctlab.org/api/1.2/patches/34359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-8-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:34","name":"[v2,07/11] riscv: thead: Add support for th XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-8-christoph.muellner@vrull.eu/mbox/"},{"id":34362,"url":"https://patchwork.plctlab.org/api/1.2/patches/34362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-9-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:35","name":"[v2,08/11] riscv: thead: Add support for XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-9-christoph.muellner@vrull.eu/mbox/"},{"id":34363,"url":"https://patchwork.plctlab.org/api/1.2/patches/34363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-10-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:36","name":"[v2,09/11] riscv: thead: Add support for XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-10-christoph.muellner@vrull.eu/mbox/"},{"id":34364,"url":"https://patchwork.plctlab.org/api/1.2/patches/34364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-11-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-11-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:37","name":"[v2,10/11] riscv: thead: Add support for XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-11-christoph.muellner@vrull.eu/mbox/"},{"id":34365,"url":"https://patchwork.plctlab.org/api/1.2/patches/34365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-12-christoph.muellner@vrull.eu/","msgid":"<20221219010838.3878675-12-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-19T01:08:38","name":"[v2,11/11] riscv: thead: Add support for XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219010838.3878675-12-christoph.muellner@vrull.eu/mbox/"},{"id":34452,"url":"https://patchwork.plctlab.org/api/1.2/patches/34452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com/","msgid":"<3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com>","list_archive_url":null,"date":"2022-12-19T06:27:57","name":"[v6,rs6000] Change mode and insn condition for VSX scalar extract/insert instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d530867-c6a2-15bf-fd65-54313622acda@linux.ibm.com/mbox/"},{"id":34453,"url":"https://patchwork.plctlab.org/api/1.2/patches/34453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e66cfc44-22c1-072d-0af2-b9fe585012a9@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T08:11:59","name":"fold-const: Treat fp conversion to a type with same mode as copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e66cfc44-22c1-072d-0af2-b9fe585012a9@linux.ibm.com/mbox/"},{"id":34458,"url":"https://patchwork.plctlab.org/api/1.2/patches/34458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz/","msgid":"<59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz>","list_archive_url":null,"date":"2022-12-19T09:02:28","name":"[(pushed)] gcc-changelog: stop using --flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59b9a1f9-573b-de01-316a-92d075b87c2f@suse.cz/mbox/"},{"id":34463,"url":"https://patchwork.plctlab.org/api/1.2/patches/34463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8e44598-adb6-8b3a-292b-6bef4622c86a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T09:09:09","name":"gfortran.dg/read_dir.f90: Make PASS on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8e44598-adb6-8b3a-292b-6bef4622c86a@codesourcery.com/mbox/"},{"id":34457,"url":"https://patchwork.plctlab.org/api/1.2/patches/34457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6A9BBI4OAIb0s9a@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T10:29:24","name":"[committed] testsuite: Fix up pr107397.f90 test [PR107397]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6A9BBI4OAIb0s9a@tucnak/mbox/"},{"id":34474,"url":"https://patchwork.plctlab.org/api/1.2/patches/34474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BFjLgQdwlgkNnZ@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:05:48","name":"c: Diagnose compound literals with function type [PR108043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BFjLgQdwlgkNnZ@tucnak/mbox/"},{"id":34475,"url":"https://patchwork.plctlab.org/api/1.2/patches/34475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BG1P7KYDd9dayC@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:11:16","name":"modula2: Fix up bootstrap on powerpc64le-linux [PR108147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BG1P7KYDd9dayC@tucnak/mbox/"},{"id":34477,"url":"https://patchwork.plctlab.org/api/1.2/patches/34477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111147.1768-1-juzhe.zhong@rivai.ai/","msgid":"<20221219111147.1768-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T11:11:47","name":"RISC-V: Simplify ASM checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111147.1768-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34478,"url":"https://patchwork.plctlab.org/api/1.2/patches/34478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111357.4515-1-juzhe.zhong@rivai.ai/","msgid":"<20221219111357.4515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T11:13:57","name":"RISC-V: Simplify ASM checks 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219111357.4515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34479,"url":"https://patchwork.plctlab.org/api/1.2/patches/34479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BI10ixEqaLah04@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T11:19:51","name":"modula2: Don'\''t treat % in Modula 2 messages specially","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BI10ixEqaLah04@tucnak/mbox/"},{"id":34535,"url":"https://patchwork.plctlab.org/api/1.2/patches/34535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6Be2p6281yCqfoq@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T12:53:46","name":"[committed] testsuite: Fix up pr64536.c for LLP64 targets [PR108151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6Be2p6281yCqfoq@tucnak/mbox/"},{"id":34546,"url":"https://patchwork.plctlab.org/api/1.2/patches/34546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz/","msgid":"<0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz>","list_archive_url":null,"date":"2022-12-19T13:40:29","name":"[(pushed)] gcc-changelog: allow digit in component name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b81f2a6-f80a-f28e-c731-5086b436e26a@suse.cz/mbox/"},{"id":34555,"url":"https://patchwork.plctlab.org/api/1.2/patches/34555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b85e2aab-e7a1-cbeb-f5bc-c465e32834a4@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-19T13:56:34","name":"[(pushed)] gcc-changelog: support digits in PR'\''s component in subject","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b85e2aab-e7a1-cbeb-f5bc-c465e32834a4@suse.cz/mbox/"},{"id":34558,"url":"https://patchwork.plctlab.org/api/1.2/patches/34558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219140645.34011-1-guojiufu@linux.ibm.com/","msgid":"<20221219140645.34011-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-19T14:06:45","name":"[V7] rs6000: Optimize cmp on rotated 16bits constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219140645.34011-1-guojiufu@linux.ibm.com/mbox/"},{"id":34557,"url":"https://patchwork.plctlab.org/api/1.2/patches/34557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BwMS8xkhs1IKk1@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-19T14:07:45","name":"[committed] testsuite: Fix up pr64536.c for LLP64 targets [PR108151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6BwMS8xkhs1IKk1@tucnak/mbox/"},{"id":34599,"url":"https://patchwork.plctlab.org/api/1.2/patches/34599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b50e7ca3-c2c2-c91f-c0c6-c284c7e35c60@redhat.com/","msgid":"","list_archive_url":null,"date":"2022-12-19T14:56:55","name":"PR tree-optimization/108139 - Don'\''t use PHI equivalences in range-on-entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b50e7ca3-c2c2-c91f-c0c6-c284c7e35c60@redhat.com/mbox/"},{"id":34606,"url":"https://patchwork.plctlab.org/api/1.2/patches/34606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219150626.2972660-1-rearnsha@arm.com/","msgid":"<20221219150626.2972660-1-rearnsha@arm.com>","list_archive_url":null,"date":"2022-12-19T15:06:26","name":"[committed] arm: correctly define __ARM_FEATURE_CLZ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219150626.2972660-1-rearnsha@arm.com/mbox/"},{"id":34614,"url":"https://patchwork.plctlab.org/api/1.2/patches/34614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219153607.E229F13498@imap2.suse-dmz.suse.de/","msgid":"<20221219153607.E229F13498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-19T15:36:07","name":"tree-optimization/108164 - undefined overflow with IV vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219153607.E229F13498@imap2.suse-dmz.suse.de/mbox/"},{"id":34639,"url":"https://patchwork.plctlab.org/api/1.2/patches/34639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219160245.55745-1-sebastian.huber@embedded-brains.de/","msgid":"<20221219160245.55745-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2022-12-19T16:02:45","name":"libatomic: Provide gthr.h default implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219160245.55745-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":34653,"url":"https://patchwork.plctlab.org/api/1.2/patches/34653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219165922.25443-1-soeren@soeren-tempel.net/","msgid":"<20221219165922.25443-1-soeren@soeren-tempel.net>","list_archive_url":null,"date":"2022-12-19T16:59:22","name":"libgo: check if -lucontext is required for {make, set, get}context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219165922.25443-1-soeren@soeren-tempel.net/mbox/"},{"id":34761,"url":"https://patchwork.plctlab.org/api/1.2/patches/34761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-1-thomas@codesourcery.com/","msgid":"<20221219204007.2818567-1-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-19T20:40:06","name":"[1/2] Add '\''gcc.target/nvptx/softstack-decl-1.c'\'', '\''gcc.target/nvptx/uniform-simt-decl-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-1-thomas@codesourcery.com/mbox/"},{"id":34762,"url":"https://patchwork.plctlab.org/api/1.2/patches/34762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-2-thomas@codesourcery.com/","msgid":"<20221219204007.2818567-2-thomas@codesourcery.com>","list_archive_url":null,"date":"2022-12-19T20:40:07","name":"[2/2] nvptx: Prevent emitting duplicate declarations for '\''__nvptx_stacks'\'', '\''__nvptx_uni'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219204007.2818567-2-thomas@codesourcery.com/mbox/"},{"id":34830,"url":"https://patchwork.plctlab.org/api/1.2/patches/34830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219230935.89797-1-juzhe.zhong@rivai.ai/","msgid":"<20221219230935.89797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T23:09:35","name":"RISC-V: Fix muti-line condition format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219230935.89797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34831,"url":"https://patchwork.plctlab.org/api/1.2/patches/34831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219231354.135626-1-juzhe.zhong@rivai.ai/","msgid":"<20221219231354.135626-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-19T23:13:54","name":"RISC-V: Fix incorrect annotation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221219231354.135626-1-juzhe.zhong@rivai.ai/mbox/"},{"id":34973,"url":"https://patchwork.plctlab.org/api/1.2/patches/34973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87len2cxwj.fsf@euler.schwinge.homeip.net/","msgid":"<87len2cxwj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-20T07:55:08","name":"[PING^2] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87len2cxwj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":34984,"url":"https://patchwork.plctlab.org/api/1.2/patches/34984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsdacxi0.fsf@euler.schwinge.homeip.net/","msgid":"<87fsdacxi0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-20T08:03:51","name":"[PING] nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsdacxi0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":34987,"url":"https://patchwork.plctlab.org/api/1.2/patches/34987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220081549.339006-1-dkm@kataplop.net/","msgid":"<20221220081549.339006-1-dkm@kataplop.net>","list_archive_url":null,"date":"2022-12-20T08:15:49","name":"[COMMITTED] rust: fix link serialization [PR108113]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220081549.339006-1-dkm@kataplop.net/mbox/"},{"id":34994,"url":"https://patchwork.plctlab.org/api/1.2/patches/34994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6F2oT1HjoJRCIL6@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-20T08:47:29","name":"libstdc++: Don'\''t call 4-5 argument to_chars with chars_format{}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6F2oT1HjoJRCIL6@tucnak/mbox/"},{"id":35000,"url":"https://patchwork.plctlab.org/api/1.2/patches/35000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3d6033e-2ae1-dbd0-8839-dd6329149f8c@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T09:22:04","name":"testsuite: Fix pr55569.c excess errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3d6033e-2ae1-dbd0-8839-dd6329149f8c@gmail.com/mbox/"},{"id":35027,"url":"https://patchwork.plctlab.org/api/1.2/patches/35027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6GRTuxVgQmxSZT5@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-20T10:41:18","name":"aarch64: Fix plugin header install","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6GRTuxVgQmxSZT5@tucnak/mbox/"},{"id":35029,"url":"https://patchwork.plctlab.org/api/1.2/patches/35029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-1-arsen@aarsen.me/","msgid":"<20221220104916.3000540-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:14","name":"[1/3] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-1-arsen@aarsen.me/mbox/"},{"id":35030,"url":"https://patchwork.plctlab.org/api/1.2/patches/35030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-2-arsen@aarsen.me/","msgid":"<20221220104916.3000540-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:15","name":"[2/3] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-2-arsen@aarsen.me/mbox/"},{"id":35031,"url":"https://patchwork.plctlab.org/api/1.2/patches/35031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-3-arsen@aarsen.me/","msgid":"<20221220104916.3000540-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-20T10:49:16","name":"[3/3] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220104916.3000540-3-arsen@aarsen.me/mbox/"},{"id":35051,"url":"https://patchwork.plctlab.org/api/1.2/patches/35051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220122323.3863293-1-manolis.tsamis@vrull.eu/","msgid":"<20221220122323.3863293-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2022-12-20T12:23:23","name":"[v3] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220122323.3863293-1-manolis.tsamis@vrull.eu/mbox/"},{"id":35090,"url":"https://patchwork.plctlab.org/api/1.2/patches/35090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220133626.05C2B1390E@imap2.suse-dmz.suse.de/","msgid":"<20221220133626.05C2B1390E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-20T13:36:25","name":"d/104749 - document host GDC version requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220133626.05C2B1390E@imap2.suse-dmz.suse.de/mbox/"},{"id":35109,"url":"https://patchwork.plctlab.org/api/1.2/patches/35109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145116.223955-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145116.223955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:51:16","name":"RISC-V: Remove side effects of vsetvl/vsetvlmax intriniscs in properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145116.223955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35114,"url":"https://patchwork.plctlab.org/api/1.2/patches/35114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145649.232331-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145649.232331-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:56:49","name":"RISC-V: Remove side effects of vsetvl pattern in RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145649.232331-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35116,"url":"https://patchwork.plctlab.org/api/1.2/patches/35116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145847.234303-1-juzhe.zhong@rivai.ai/","msgid":"<20221220145847.234303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-20T14:58:47","name":"RISC-V: Update vsetvl/vsetvlmax intrinsics to the latest api name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220145847.234303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":35119,"url":"https://patchwork.plctlab.org/api/1.2/patches/35119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220153034.2746407-1-ppalka@redhat.com/","msgid":"<20221220153034.2746407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-20T15:30:34","name":"c++, tree: walk TREE_VEC (and VECTOR_CST) in natural order [PR101886]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221220153034.2746407-1-ppalka@redhat.com/mbox/"},{"id":35139,"url":"https://patchwork.plctlab.org/api/1.2/patches/35139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/FF9C7E0B-5DF6-4FC2-B3C2-29F3CBCBE147@oracle.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T16:16:30","name":"gcc-13/changes.html: Mention -fstrict-flex-arrays and its impact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/FF9C7E0B-5DF6-4FC2-B3C2-29F3CBCBE147@oracle.com/mbox/"},{"id":35165,"url":"https://patchwork.plctlab.org/api/1.2/patches/35165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at/","msgid":"<95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-20T19:08:02","name":"[C] remove same_translation_unit_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95c59ca7ac23a6974ffb2175a4c7f33703fe12dc.camel@tugraz.at/mbox/"},{"id":35188,"url":"https://patchwork.plctlab.org/api/1.2/patches/35188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d347c3e7-b009-48e8-b790-9380995fd72a-1671568823481@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2022-12-20T20:40:23","name":"Fortran: a C interoperable function cannot have the CLASS attribute [PR95375]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d347c3e7-b009-48e8-b790-9380995fd72a-1671568823481@3c-app-gmx-bs49/mbox/"},{"id":35195,"url":"https://patchwork.plctlab.org/api/1.2/patches/35195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16717-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-20T21:32:19","name":"AArch64 relax constraints on FP16 insn PR108172","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16717-tamar@arm.com/mbox/"},{"id":35235,"url":"https://patchwork.plctlab.org/api/1.2/patches/35235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com/","msgid":"<6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T03:16:36","name":"[committed] rs6000: Fix the wrong location of OPTION_MASK_P10_FUSION setting hunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f698424-9e14-85d5-1af6-9b2b7bbaed4a@linux.ibm.com/mbox/"},{"id":35268,"url":"https://patchwork.plctlab.org/api/1.2/patches/35268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221062736.78036-1-guojiufu@linux.ibm.com/","msgid":"<20221221062736.78036-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T06:27:36","name":"loading float member of parameter stored via int registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221062736.78036-1-guojiufu@linux.ibm.com/mbox/"},{"id":35289,"url":"https://patchwork.plctlab.org/api/1.2/patches/35289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz/","msgid":"<84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz>","list_archive_url":null,"date":"2022-12-21T08:05:21","name":"[(pushed)] libgccjit: silent 2 Clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84798cab-dc97-a9c7-0629-82e3d03be246@suse.cz/mbox/"},{"id":35290,"url":"https://patchwork.plctlab.org/api/1.2/patches/35290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d730a0-3ae8-3dd0-848b-09ad67542bde@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:05:39","name":"go: fix clang warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d730a0-3ae8-3dd0-848b-09ad67542bde@suse.cz/mbox/"},{"id":35296,"url":"https://patchwork.plctlab.org/api/1.2/patches/35296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LB8TGAbA1fAFe4@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:21:05","name":"[committed] modula2: Fix lto profiledbootstrap on powerpc64le-linux and s390x-linux [PR108153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LB8TGAbA1fAFe4@tucnak/mbox/"},{"id":35297,"url":"https://patchwork.plctlab.org/api/1.2/patches/35297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LCdySCuQk6V90v@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-21T08:23:19","name":"[committed] openmp: Don'\''t try to destruct DECL_OMP_PRIVATIZED_MEMBER vars [PR108180]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LCdySCuQk6V90v@tucnak/mbox/"},{"id":35305,"url":"https://patchwork.plctlab.org/api/1.2/patches/35305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com/","msgid":"<718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com>","list_archive_url":null,"date":"2022-12-21T09:02:17","name":"[RFC/PATCH] Remove the workaround for _Float128 precision [PR107299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/718677e7-614d-7977-312d-05a75e1fd5b4@linux.ibm.com/mbox/"},{"id":35346,"url":"https://patchwork.plctlab.org/api/1.2/patches/35346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LxPU/HBAJ0fFQl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2022-12-21T11:42:53","name":"Make -fwhole-program to work with incremental LTO linking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6LxPU/HBAJ0fFQl@kam.mff.cuni.cz/mbox/"},{"id":35348,"url":"https://patchwork.plctlab.org/api/1.2/patches/35348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221121237.8718613913@imap2.suse-dmz.suse.de/","msgid":"<20221221121237.8718613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-21T12:12:37","name":"middle-end/107994 - ICE after error with comparison gimplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221121237.8718613913@imap2.suse-dmz.suse.de/mbox/"},{"id":35352,"url":"https://patchwork.plctlab.org/api/1.2/patches/35352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cyl0wb8.fsf@debian/","msgid":"<877cyl0wb8.fsf@debian>","list_archive_url":null,"date":"2022-12-21T12:34:51","name":"modula2: PR-108119 Disable m2 plugin m2rte","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cyl0wb8.fsf@debian/mbox/"},{"id":35358,"url":"https://patchwork.plctlab.org/api/1.2/patches/35358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221130901.39779-1-iain@sandoe.co.uk/","msgid":"<20221221130901.39779-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-21T13:09:01","name":"[pushed] libffi: Fix X86 32b Darwin build and EH frames.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221130901.39779-1-iain@sandoe.co.uk/mbox/"},{"id":35359,"url":"https://patchwork.plctlab.org/api/1.2/patches/35359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-2-dimitrije.milosevic@syrmia.com/","msgid":"<20221221131214.190579-2-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-12-21T13:12:13","name":"[1/2] ivopts: Compute complexity for unsupported addressing modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-2-dimitrije.milosevic@syrmia.com/mbox/"},{"id":35360,"url":"https://patchwork.plctlab.org/api/1.2/patches/35360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-3-dimitrije.milosevic@syrmia.com/","msgid":"<20221221131214.190579-3-dimitrije.milosevic@syrmia.com>","list_archive_url":null,"date":"2022-12-21T13:12:14","name":"[2/2] ivopts: Revert register pressure cost when there are enough registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221131214.190579-3-dimitrije.milosevic@syrmia.com/mbox/"},{"id":35391,"url":"https://patchwork.plctlab.org/api/1.2/patches/35391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221145254.389983-1-ppalka@redhat.com/","msgid":"<20221221145254.389983-1-ppalka@redhat.com>","list_archive_url":null,"date":"2022-12-21T14:52:54","name":"c++: get_nsdmi in template context [PR108116]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221145254.389983-1-ppalka@redhat.com/mbox/"},{"id":35424,"url":"https://patchwork.plctlab.org/api/1.2/patches/35424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com/","msgid":"<7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com>","list_archive_url":null,"date":"2022-12-21T15:51:25","name":"Fortran/OpenMP: Add parsing support for allocators/allocate directive (was: [Patch] Fortran/OpenMP: Add parsing support for allocators directive)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7839f6c0-2ea2-eab5-4660-111dec7cfcb2@codesourcery.com/mbox/"},{"id":35487,"url":"https://patchwork.plctlab.org/api/1.2/patches/35487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221183103.3800844-1-christoph.muellner@vrull.eu/","msgid":"<20221221183103.3800844-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2022-12-21T18:31:03","name":"[RFC] RISC-V: Add support for vector crypto extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221183103.3800844-1-christoph.muellner@vrull.eu/mbox/"},{"id":35543,"url":"https://patchwork.plctlab.org/api/1.2/patches/35543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-2-siddhesh@gotplt.org/","msgid":"<20221221222554.4141678-2-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-21T22:25:53","name":"[1/2] testsuite: Run __bos tests to completion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-2-siddhesh@gotplt.org/mbox/"},{"id":35540,"url":"https://patchwork.plctlab.org/api/1.2/patches/35540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-3-siddhesh@gotplt.org/","msgid":"<20221221222554.4141678-3-siddhesh@gotplt.org>","list_archive_url":null,"date":"2022-12-21T22:25:54","name":"[2/2] tree-object-size: More consistent behaviour with flex arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221221222554.4141678-3-siddhesh@gotplt.org/mbox/"},{"id":35004,"url":"https://patchwork.plctlab.org/api/1.2/patches/35004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222002711.116962-1-lipeng.zhu@intel.com/","msgid":"<20221222002711.116962-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-22T00:27:11","name":"libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222002711.116962-1-lipeng.zhu@intel.com/mbox/"},{"id":35032,"url":"https://patchwork.plctlab.org/api/1.2/patches/35032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222021947.117891-1-lipeng.zhu@intel.com/","msgid":"<20221222021947.117891-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-22T02:19:47","name":"libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222021947.117891-1-lipeng.zhu@intel.com/mbox/"},{"id":35644,"url":"https://patchwork.plctlab.org/api/1.2/patches/35644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222084321.7263613918@imap2.suse-dmz.suse.de/","msgid":"<20221222084321.7263613918@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T08:43:21","name":"Compare DECL_NOT_FLEXARRAY for LTO tree merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222084321.7263613918@imap2.suse-dmz.suse.de/mbox/"},{"id":35665,"url":"https://patchwork.plctlab.org/api/1.2/patches/35665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101538.660256-1-jwakely@redhat.com/","msgid":"<20221222101538.660256-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T10:15:38","name":"[committed] libstdc++: Add [[nodiscard]] in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101538.660256-1-jwakely@redhat.com/mbox/"},{"id":35666,"url":"https://patchwork.plctlab.org/api/1.2/patches/35666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101547.660304-1-jwakely@redhat.com/","msgid":"<20221222101547.660304-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T10:15:47","name":"[committed] libstdc++: Define and use variable templates in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222101547.660304-1-jwakely@redhat.com/mbox/"},{"id":35667,"url":"https://patchwork.plctlab.org/api/1.2/patches/35667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QwCSX4gGzWstiF@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:23:05","name":"cse: Fix up CSE const_anchor handling [PR108193]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QwCSX4gGzWstiF@tucnak/mbox/"},{"id":35669,"url":"https://patchwork.plctlab.org/api/1.2/patches/35669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QxsdUy2S2w//u/@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:30:09","name":"phiopt: Drop SSA_NAME_RANGE_INFO in maybe equal case [PR108166]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QxsdUy2S2w//u/@tucnak/mbox/"},{"id":35670,"url":"https://patchwork.plctlab.org/api/1.2/patches/35670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QyU5d2RLvwMP/q@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T10:32:51","name":"c, c++, cgraphunit: Prevent duplicated -Wunused-value warnings [PR108079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6QyU5d2RLvwMP/q@tucnak/mbox/"},{"id":35673,"url":"https://patchwork.plctlab.org/api/1.2/patches/35673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-1-arsen@aarsen.me/","msgid":"<20221222110306.3869396-1-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:06","name":"[1/3] libstdc++: Improve output of default contract violation handler [PR107792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-1-arsen@aarsen.me/mbox/"},{"id":35674,"url":"https://patchwork.plctlab.org/api/1.2/patches/35674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-2-arsen@aarsen.me/","msgid":"<20221222110306.3869396-2-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:07","name":"[2/3] contracts: Update testsuite against new default viol. handler format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-2-arsen@aarsen.me/mbox/"},{"id":35675,"url":"https://patchwork.plctlab.org/api/1.2/patches/35675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-3-arsen@aarsen.me/","msgid":"<20221222110306.3869396-3-arsen@aarsen.me>","list_archive_url":null,"date":"2022-12-22T11:03:08","name":"[3/3] contrib: Add dg-out-generator.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222110306.3869396-3-arsen@aarsen.me/mbox/"},{"id":35684,"url":"https://patchwork.plctlab.org/api/1.2/patches/35684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222112019.9549E138FD@imap2.suse-dmz.suse.de/","msgid":"<20221222112019.9549E138FD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T11:20:19","name":"tree-optimization/107451 - SLP load vectorization issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222112019.9549E138FD@imap2.suse-dmz.suse.de/mbox/"},{"id":35745,"url":"https://patchwork.plctlab.org/api/1.2/patches/35745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6RTdCmstcJUoFnU@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T12:54:12","name":"phiopt: Adjust instead of reset phires range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6RTdCmstcJUoFnU@tucnak/mbox/"},{"id":35767,"url":"https://patchwork.plctlab.org/api/1.2/patches/35767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222132150.37277138FD@imap2.suse-dmz.suse.de/","msgid":"<20221222132150.37277138FD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T13:21:49","name":"testsuite/107809 - fix vect-recurr testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222132150.37277138FD@imap2.suse-dmz.suse.de/mbox/"},{"id":35815,"url":"https://patchwork.plctlab.org/api/1.2/patches/35815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222145404.2AB0313918@imap2.suse-dmz.suse.de/","msgid":"<20221222145404.2AB0313918@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2022-12-22T14:54:03","name":"bootstrap/106482 - document minimal GCC version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222145404.2AB0313918@imap2.suse-dmz.suse.de/mbox/"},{"id":35880,"url":"https://patchwork.plctlab.org/api/1.2/patches/35880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rizz7xv.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:04:12","name":"[1/15,V2] arm: Make mbranch-protection opts parsing common to AArch32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr8rizz7xv.fsf_-_@arm.com/mbox/"},{"id":35881,"url":"https://patchwork.plctlab.org/api/1.2/patches/35881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SObwpkw+HVsLtx@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:05:51","name":"[committed] docs: Link to correct section for constraint modifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SObwpkw+HVsLtx@e124511.cambridge.arm.com/mbox/"},{"id":35882,"url":"https://patchwork.plctlab.org/api/1.2/patches/35882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOeoevE0LQJdzF@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:06:02","name":"[committed] docs: Fix inconsistent example predicate name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOeoevE0LQJdzF@e124511.cambridge.arm.com/mbox/"},{"id":35883,"url":"https://patchwork.plctlab.org/api/1.2/patches/35883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOhUlYMGLtprFN@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:06:13","name":"[committed] docs: Fix peephole paragraph ordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SOhUlYMGLtprFN@e124511.cambridge.arm.com/mbox/"},{"id":35885,"url":"https://patchwork.plctlab.org/api/1.2/patches/35885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr3597z7hl.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:13:58","name":"[12/15,V5] arm: implement bti injection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkr3597z7hl.fsf_-_@arm.com/mbox/"},{"id":35884,"url":"https://patchwork.plctlab.org/api/1.2/patches/35884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222171645.12064-1-jose.marchesi@oracle.com/","msgid":"<20221222171645.12064-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-22T17:16:45","name":"Disable sched1 in functions that call setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222171645.12064-1-jose.marchesi@oracle.com/mbox/"},{"id":35887,"url":"https://patchwork.plctlab.org/api/1.2/patches/35887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222173208.13317-1-jose.marchesi@oracle.com/","msgid":"<20221222173208.13317-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-22T17:32:08","name":"[V2] Disable sched1 in functions that call setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222173208.13317-1-jose.marchesi@oracle.com/mbox/"},{"id":35888,"url":"https://patchwork.plctlab.org/api/1.2/patches/35888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at/","msgid":"<9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T17:41:22","name":"[C] (for STAGE 1) Reorganize comptypes and related functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9609efd537d50fe41001cc3bf6bb341e65d5f795.camel@tugraz.at/mbox/"},{"id":35889,"url":"https://patchwork.plctlab.org/api/1.2/patches/35889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SW+ErptI8cj+EC@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:42:16","name":"[5/8,v2] middle-end: Add cltz_complement idiom recognition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SW+ErptI8cj+EC@e124511.cambridge.arm.com/mbox/"},{"id":35890,"url":"https://patchwork.plctlab.org/api/1.2/patches/35890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXCOp3jLSRgPkv@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:42:32","name":"[6/8,v2] docs: Add popcount, clz and ctz target attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXCOp3jLSRgPkv@e124511.cambridge.arm.com/mbox/"},{"id":35891,"url":"https://patchwork.plctlab.org/api/1.2/patches/35891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXOd4qtp4SX2qP@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2022-12-22T17:43:21","name":"[9/8] middle-end: Allow build_popcount_expr to use an IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6SXOd4qtp4SX2qP@e124511.cambridge.arm.com/mbox/"},{"id":35892,"url":"https://patchwork.plctlab.org/api/1.2/patches/35892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at/","msgid":"<710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T17:44:27","name":"[C] (for STAGE 1) UBSan instrumentation for assignment of VM types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/710940157fea32e9f628f8286891cfeb21646f37.camel@tugraz.at/mbox/"},{"id":35941,"url":"https://patchwork.plctlab.org/api/1.2/patches/35941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at/","msgid":"<5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at>","list_archive_url":null,"date":"2022-12-22T20:13:57","name":"regression tests for 103770 fixed on trunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5791bf0f0ae865ce3479da68fb4cf51b41ddd10d.camel@tugraz.at/mbox/"},{"id":35960,"url":"https://patchwork.plctlab.org/api/1.2/patches/35960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b54c9233-525b-4b08-b8cf-f7451c36cb72-1671743584325@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2022-12-22T21:13:04","name":"Fortran: check for invalid uses of statement functions arguments [PR69604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b54c9233-525b-4b08-b8cf-f7451c36cb72-1671743584325@3c-app-gmx-bap55/mbox/"},{"id":35965,"url":"https://patchwork.plctlab.org/api/1.2/patches/35965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6TPrATjd0SO/UrA@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-22T21:44:12","name":"phiopt, v2: Adjust instead of reset phires range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6TPrATjd0SO/UrA@tucnak/mbox/"},{"id":35990,"url":"https://patchwork.plctlab.org/api/1.2/patches/35990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com/","msgid":"<001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-22T23:09:31","name":"[x86] PR target/106933: Limit TImode STV to SSA-like def-use chains.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d9165a$73e9cc30$5bbd6490$@nextmovesoftware.com/mbox/"},{"id":35991,"url":"https://patchwork.plctlab.org/api/1.2/patches/35991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com/","msgid":"<001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-22T23:19:21","name":"[x86] PR target/107548: Handle vec_select in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001d01d9165b$d4690e30$7d3b2a90$@nextmovesoftware.com/mbox/"},{"id":36006,"url":"https://patchwork.plctlab.org/api/1.2/patches/36006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233704.772013-1-jwakely@redhat.com/","msgid":"<20221222233704.772013-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:37:04","name":"[committed] libstdc++: Implement C++20 time zone support in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233704.772013-1-jwakely@redhat.com/mbox/"},{"id":36005,"url":"https://patchwork.plctlab.org/api/1.2/patches/36005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233804.772229-1-jwakely@redhat.com/","msgid":"<20221222233804.772229-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:38:04","name":"[committed] libstdc++: Add GDB printers for types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233804.772229-1-jwakely@redhat.com/mbox/"},{"id":36008,"url":"https://patchwork.plctlab.org/api/1.2/patches/36008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233816.772318-1-jwakely@redhat.com/","msgid":"<20221222233816.772318-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:38:16","name":"[committed] libstdc++: Add helper function in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233816.772318-1-jwakely@redhat.com/mbox/"},{"id":36007,"url":"https://patchwork.plctlab.org/api/1.2/patches/36007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233957.2866911-1-jason@redhat.com/","msgid":"<20221222233957.2866911-1-jason@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:39:57","name":"[pushed] testsuite: don'\''t declare printf in coro.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222233957.2866911-1-jason@redhat.com/mbox/"},{"id":36010,"url":"https://patchwork.plctlab.org/api/1.2/patches/36010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234015.772332-1-jwakely@redhat.com/","msgid":"<20221222234015.772332-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:40:15","name":"[committed] libstdc++: Add std::format support to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234015.772332-1-jwakely@redhat.com/mbox/"},{"id":36009,"url":"https://patchwork.plctlab.org/api/1.2/patches/36009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234112.772515-1-jwakely@redhat.com/","msgid":"<20221222234112.772515-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-22T23:41:12","name":"[committed] libstdc++: Avoid recursion in __nothrow_wait_cv::wait [PR105730]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221222234112.772515-1-jwakely@redhat.com/mbox/"},{"id":36027,"url":"https://patchwork.plctlab.org/api/1.2/patches/36027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223005246.38622-1-juzhe.zhong@rivai.ai/","msgid":"<20221223005246.38622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T00:52:46","name":"RISC-V: Support vle.v/vse.v intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223005246.38622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36109,"url":"https://patchwork.plctlab.org/api/1.2/patches/36109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223033306.264797-1-juzhe.zhong@rivai.ai/","msgid":"<20221223033306.264797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T03:33:06","name":"RISC-V: Fix vle constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223033306.264797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36138,"url":"https://patchwork.plctlab.org/api/1.2/patches/36138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com/","msgid":"<9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2022-12-23T06:06:55","name":"[1/1] Fixed typo in RISCV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a484694-afb8-4100-a82c-d010c0007053.jinma@linux.alibaba.com/mbox/"},{"id":36164,"url":"https://patchwork.plctlab.org/api/1.2/patches/36164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223093357.3170-1-jose.marchesi@oracle.com/","msgid":"<20221223093357.3170-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T09:33:57","name":"[WWWDOCS] htdocs: news: GCC BPF in Compiler Explorer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223093357.3170-1-jose.marchesi@oracle.com/mbox/"},{"id":36175,"url":"https://patchwork.plctlab.org/api/1.2/patches/36175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223094421.832354-1-jwakely@redhat.com/","msgid":"<20221223094421.832354-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-23T09:44:21","name":"[committed] libstdc++: Remove problematic static_assert from src/c++20/tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223094421.832354-1-jwakely@redhat.com/mbox/"},{"id":36193,"url":"https://patchwork.plctlab.org/api/1.2/patches/36193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223095013.3630-1-jose.marchesi@oracle.com/","msgid":"<20221223095013.3630-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T09:50:13","name":"[WWWDOCS] htdocs: add an Atom feed for GCC news","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223095013.3630-1-jose.marchesi@oracle.com/mbox/"},{"id":36198,"url":"https://patchwork.plctlab.org/api/1.2/patches/36198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223100601.4485-1-jose.marchesi@oracle.com/","msgid":"<20221223100601.4485-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2022-12-23T10:06:01","name":"[WWWDOCS] htdocs: rotate news","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223100601.4485-1-jose.marchesi@oracle.com/mbox/"},{"id":36234,"url":"https://patchwork.plctlab.org/api/1.2/patches/36234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com/","msgid":"<856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:54","name":"[v6,01/11] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/856581eb8bd183afb8bd6029e079282e4d232705.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36236,"url":"https://patchwork.plctlab.org/api/1.2/patches/36236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com/","msgid":"<2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:55","name":"[v6,02/11] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f053e71203451848eb43006e1c4891d0353579c.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36239,"url":"https://patchwork.plctlab.org/api/1.2/patches/36239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com/","msgid":"<44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:56","name":"[v6,03/11] OpenMP/OpenACC: Refine condition for when map clause expansion happens","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44822b56c7eda01cea993e05c19aa7e881966b5a.1671796515.git.julian@codesourcery.com/mbox/"},{"id":36237,"url":"https://patchwork.plctlab.org/api/1.2/patches/36237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e97712f8f441bddd839f6b8dcea549f6ef247b71.1671796516.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-23T12:12:57","name":"[v6,04/11] OpenMP: implicitly map base pointer for array-section pointer components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e97712f8f441bddd839f6b8dcea549f6ef247b71.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36241,"url":"https://patchwork.plctlab.org/api/1.2/patches/36241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com/","msgid":"<4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:58","name":"[v6,05/11] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4880062aceb5d20bb557d082c668a2cd4d9cc773.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36235,"url":"https://patchwork.plctlab.org/api/1.2/patches/36235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com/","msgid":"<1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:12:59","name":"[v6,06/11] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c872f111bd3e88930872c4ecf31b56e57feee1c.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36238,"url":"https://patchwork.plctlab.org/api/1.2/patches/36238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com/","msgid":"<3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:00","name":"[v6,07/11] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bbe7d5add6431aac1fcf8d076c412907cfcd856.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36243,"url":"https://patchwork.plctlab.org/api/1.2/patches/36243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com/","msgid":"<7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:01","name":"[v6,08/11] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7af31eda70f95a2694db119ba644209f1d855011.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36242,"url":"https://patchwork.plctlab.org/api/1.2/patches/36242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb79a146432898f400ad52e364b0c7d27098f0ca.1671796516.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2022-12-23T12:13:02","name":"[v6,09/11] OpenMP: lvalue parsing for map clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb79a146432898f400ad52e364b0c7d27098f0ca.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36244,"url":"https://patchwork.plctlab.org/api/1.2/patches/36244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com/","msgid":"<59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:03","name":"[v6,10/11] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59d66ab42744d047328f75b9a1282782cfa7ca7f.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36240,"url":"https://patchwork.plctlab.org/api/1.2/patches/36240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com/","msgid":"<1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com>","list_archive_url":null,"date":"2022-12-23T12:13:04","name":"[v6,11/11] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bea970230e817bfc32957980b854fac1fe0a05c.1671796516.git.julian@codesourcery.com/mbox/"},{"id":36259,"url":"https://patchwork.plctlab.org/api/1.2/patches/36259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223124227.199969-1-juzhe.zhong@rivai.ai/","msgid":"<20221223124227.199969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-23T12:42:27","name":"RISC-V: Fix ICE for avl_info deprecated copy and pp_print error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223124227.199969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36276,"url":"https://patchwork.plctlab.org/api/1.2/patches/36276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7rup7f8.fsf@euler.schwinge.homeip.net/","msgid":"<87o7rup7f8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-23T13:37:47","name":"nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7rup7f8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":36277,"url":"https://patchwork.plctlab.org/api/1.2/patches/36277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223134717.852611-1-jwakely@redhat.com/","msgid":"<20221223134717.852611-1-jwakely@redhat.com>","list_archive_url":null,"date":"2022-12-23T13:47:17","name":"[committed] libstdc++: Fix Darwin bootstrap error in src/c++20/tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223134717.852611-1-jwakely@redhat.com/mbox/"},{"id":36279,"url":"https://patchwork.plctlab.org/api/1.2/patches/36279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ili2p60p.fsf@euler.schwinge.homeip.net/","msgid":"<87ili2p60p.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2022-12-23T14:08:06","name":"nvptx: '\''-mframe-malloc-threshold'\'', '\''-Wframe-malloc-threshold'\'' (was: Handling of large stack objects in GPU code generation -- maybe transform into heap allocation?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ili2p60p.fsf@euler.schwinge.homeip.net/mbox/"},{"id":36290,"url":"https://patchwork.plctlab.org/api/1.2/patches/36290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6XIZvKyJ+uzQEKl@tucnak/","msgid":"","list_archive_url":null,"date":"2022-12-23T15:25:26","name":"[committed] tree-ssa-dom: can_infer_simple_equiv fixes [PR108068]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6XIZvKyJ+uzQEKl@tucnak/mbox/"},{"id":36301,"url":"https://patchwork.plctlab.org/api/1.2/patches/36301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz/","msgid":"<677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz>","list_archive_url":null,"date":"2022-12-23T15:44:04","name":"strlen: do not use cond_expr for boundaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/677e6b2b-5198-f2b2-d5e5-dc388b77bcb0@suse.cz/mbox/"},{"id":36310,"url":"https://patchwork.plctlab.org/api/1.2/patches/36310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com/","msgid":"<00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-23T16:46:06","name":"[x86] Use movss/movsd to implement V4SI/V2DI VEC_PERM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e501d916ee$0ef7d210$2ce77630$@nextmovesoftware.com/mbox/"},{"id":36312,"url":"https://patchwork.plctlab.org/api/1.2/patches/36312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223170619.38428-1-iain@sandoe.co.uk/","msgid":"<20221223170619.38428-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-23T17:06:19","name":"libstdc++, configure: Fix GLIBCXX_ZONEINFO_DIR configuration macro.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221223170619.38428-1-iain@sandoe.co.uk/mbox/"},{"id":36384,"url":"https://patchwork.plctlab.org/api/1.2/patches/36384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224030800.221397-1-juzhe.zhong@rivai.ai/","msgid":"<20221224030800.221397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-24T03:08:00","name":"RISC-V: Fix ICE of visiting non-existing block in CFG.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224030800.221397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":36403,"url":"https://patchwork.plctlab.org/api/1.2/patches/36403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224113525.20201-1-iain@sandoe.co.uk/","msgid":"<20221224113525.20201-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:35:25","name":"libstdc++: Export the __gnu_cxx::zoneinfo_dir_override symbol.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224113525.20201-1-iain@sandoe.co.uk/mbox/"},{"id":36404,"url":"https://patchwork.plctlab.org/api/1.2/patches/36404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114009.20261-1-iain@sandoe.co.uk/","msgid":"<20221224114009.20261-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:40:09","name":"libstdc++: Test for tzdata.zi before fallback version files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114009.20261-1-iain@sandoe.co.uk/mbox/"},{"id":36405,"url":"https://patchwork.plctlab.org/api/1.2/patches/36405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114234.20419-1-iain@sandoe.co.uk/","msgid":"<20221224114234.20419-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T11:42:34","name":"libstdc++, testsuite: Correct an init.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224114234.20419-1-iain@sandoe.co.uk/mbox/"},{"id":36438,"url":"https://patchwork.plctlab.org/api/1.2/patches/36438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224174957.95123-1-iain@sandoe.co.uk/","msgid":"<20221224174957.95123-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T17:49:57","name":"[pushed] libgcc, Darwin: No early install for the compatibility libgcc_s.1.dylib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224174957.95123-1-iain@sandoe.co.uk/mbox/"},{"id":36439,"url":"https://patchwork.plctlab.org/api/1.2/patches/36439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190049.99806-1-iain@sandoe.co.uk/","msgid":"<20221224190049.99806-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-24T19:00:49","name":"Ada, Darwin: Do not link libgcc statically on Darwin [PR108202].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190049.99806-1-iain@sandoe.co.uk/mbox/"},{"id":36440,"url":"https://patchwork.plctlab.org/api/1.2/patches/36440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190343.3490-1-softwaresale01@gmail.com/","msgid":"<20221224190343.3490-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2022-12-24T19:03:43","name":"cp: warn uninitialized const/ref in base class [PR80681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221224190343.3490-1-softwaresale01@gmail.com/mbox/"},{"id":36454,"url":"https://patchwork.plctlab.org/api/1.2/patches/36454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com/","msgid":"<006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-24T22:13:36","name":"[Committed] Tweak new gcc.target/i386/pr107548-1.c for -march=cascadelake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006e01d917e4$f906e020$eb14a060$@nextmovesoftware.com/mbox/"},{"id":36466,"url":"https://patchwork.plctlab.org/api/1.2/patches/36466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221225115141.A09EC33E8A@hamza.pair.com/","msgid":"<20221225115141.A09EC33E8A@hamza.pair.com>","list_archive_url":null,"date":"2022-12-25T11:51:39","name":"[committed] wwwdocs: gcc-12: Spelling fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221225115141.A09EC33E8A@hamza.pair.com/mbox/"},{"id":36568,"url":"https://patchwork.plctlab.org/api/1.2/patches/36568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org/","msgid":"<881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org>","list_archive_url":null,"date":"2022-12-26T08:55:45","name":"[Bug,c/108224] add srandom random initstate setstate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/881e795d-34c8-0445-74cf-cb68192d2dfe@jguk.org/mbox/"},{"id":36647,"url":"https://patchwork.plctlab.org/api/1.2/patches/36647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8lyi5nn.fsf@debian/","msgid":"<87v8lyi5nn.fsf@debian>","list_archive_url":null,"date":"2022-12-26T14:46:52","name":"[modula2] PR-108142 Remove empty directories created in the build directory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8lyi5nn.fsf@debian/mbox/"},{"id":36671,"url":"https://patchwork.plctlab.org/api/1.2/patches/36671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6nbJLinJtSPip+8@mars/","msgid":"","list_archive_url":null,"date":"2022-12-26T17:34:28","name":"Add support for x86_64-*-gnu-* targets to build x86_64 gnumach/hurd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6nbJLinJtSPip+8@mars/mbox/"},{"id":36703,"url":"https://patchwork.plctlab.org/api/1.2/patches/36703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org/","msgid":"<2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org>","list_archive_url":null,"date":"2022-12-26T20:50:23","name":"Bugzilla Bug 81649 [PATCH]: Clarify LeakSanitizer in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bc4729d-77dc-ff59-81ed-ee617ac20fb1@jguk.org/mbox/"},{"id":36704,"url":"https://patchwork.plctlab.org/api/1.2/patches/36704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3166f68-a988-7476-bc71-7f3eb6d20deb@jguk.org/","msgid":"","list_archive_url":null,"date":"2022-12-26T21:00:05","name":"[PATCHJ] : Bugzilla 88860 - Clarify online manual infelicities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3166f68-a988-7476-bc71-7f3eb6d20deb@jguk.org/mbox/"},{"id":36705,"url":"https://patchwork.plctlab.org/api/1.2/patches/36705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/750917f3-555a-a5b8-9d55-261b0883153f@jguk.org/","msgid":"<750917f3-555a-a5b8-9d55-261b0883153f@jguk.org>","list_archive_url":null,"date":"2022-12-26T21:04:31","name":"Bugzilla 88860 - Clarify gcc online manual attribute format printf example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/750917f3-555a-a5b8-9d55-261b0883153f@jguk.org/mbox/"},{"id":36709,"url":"https://patchwork.plctlab.org/api/1.2/patches/36709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com/","msgid":"<7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com>","list_archive_url":null,"date":"2022-12-26T22:26:29","name":"[fortran] ICE in attr_decl1, at fortran/decl.c:8691","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7802b3ba-cf1d-84eb-6e64-e470ef8e911a@protonmail.com/mbox/"},{"id":36762,"url":"https://patchwork.plctlab.org/api/1.2/patches/36762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora639h4u9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:02:06","name":"[RFC] Introduce -finline-memset-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora639h4u9.fsf@lxoliva.fsfla.org/mbox/"},{"id":36761,"url":"https://patchwork.plctlab.org/api/1.2/patches/36761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydxh4l4.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:07:35","name":"[00/13] check hash table counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydxh4l4.fsf@lxoliva.fsfla.org/mbox/"},{"id":36763,"url":"https://patchwork.plctlab.org/api/1.2/patches/36763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qolh455.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:17:10","name":"[01/13] scoped tables: insert before further lookups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qolh455.fsf@lxoliva.fsfla.org/mbox/"},{"id":36764,"url":"https://patchwork.plctlab.org/api/1.2/patches/36764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6dfpia.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:18:37","name":"[02/13] varpool: do not add NULL vnodes to referenced","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6dfpia.fsf@lxoliva.fsfla.org/mbox/"},{"id":36765,"url":"https://patchwork.plctlab.org/api/1.2/patches/36765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfh1fpgc.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:19:47","name":"[03/13] tree-inline decl_map: skip mapping NULL to itself","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfh1fpgc.fsf@lxoliva.fsfla.org/mbox/"},{"id":36766,"url":"https://patchwork.plctlab.org/api/1.2/patches/36766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7rpfpcx.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:21:50","name":"[04/13,C++] constraint: insert norm entry once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7rpfpcx.fsf@lxoliva.fsfla.org/mbox/"},{"id":36767,"url":"https://patchwork.plctlab.org/api/1.2/patches/36767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork02dfpbv.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:22:28","name":"[05/13] ssa-loop-niter: skip caching of null operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork02dfpbv.fsf@lxoliva.fsfla.org/mbox/"},{"id":36769,"url":"https://patchwork.plctlab.org/api/1.2/patches/36769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsd1fpad.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:23:22","name":"[06/13] tree-inline decl_map: skip mapping result'\''s NULL default def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsd1fpad.fsf@lxoliva.fsfla.org/mbox/"},{"id":36768,"url":"https://patchwork.plctlab.org/api/1.2/patches/36768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbknpfp8w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:24:15","name":"[07/13] postreload-gcse: no insert on mere lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbknpfp8w.fsf@lxoliva.fsfla.org/mbox/"},{"id":36770,"url":"https://patchwork.plctlab.org/api/1.2/patches/36770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jthfp1e.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:28:45","name":"[08/13] tm: complete tm_restart insertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jthfp1e.fsf@lxoliva.fsfla.org/mbox/"},{"id":36771,"url":"https://patchwork.plctlab.org/api/1.2/patches/36771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzgb9eaev.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:30:00","name":"[09/13,C++] constexpr: request insert iff depth is ok","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzgb9eaev.fsf@lxoliva.fsfla.org/mbox/"},{"id":36772,"url":"https://patchwork.plctlab.org/api/1.2/patches/36772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8lxea5a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:35:45","name":"[10/13] lto: drop dummy partition mapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8lxea5a.fsf@lxoliva.fsfla.org/mbox/"},{"id":36773,"url":"https://patchwork.plctlab.org/api/1.2/patches/36773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0wlea1j.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:38:00","name":"[11/13] ada: don'\''t map NULL decl to locus","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0wlea1j.fsf@lxoliva.fsfla.org/mbox/"},{"id":36774,"url":"https://patchwork.plctlab.org/api/1.2/patches/36774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt79ea05.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:38:50","name":"[12/13] hash set: reject attempts to add empty values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt79ea05.fsf@lxoliva.fsfla.org/mbox/"},{"id":36775,"url":"https://patchwork.plctlab.org/api/1.2/patches/36775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilhxe9z1.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-27T04:39:30","name":"[13/13] hash-map: reject empty-looking insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilhxe9z1.fsf@lxoliva.fsfla.org/mbox/"},{"id":36778,"url":"https://patchwork.plctlab.org/api/1.2/patches/36778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d559758f-8e1d-3513-b5d2-055d123f87b2@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2022-12-27T06:30:12","name":"xtensa: Apply a few minor fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d559758f-8e1d-3513-b5d2-055d123f87b2@yahoo.co.jp/mbox/"},{"id":36780,"url":"https://patchwork.plctlab.org/api/1.2/patches/36780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227064246.2149251-1-chenglulu@loongson.cn/","msgid":"<20221227064246.2149251-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2022-12-27T06:42:47","name":"[v4] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227064246.2149251-1-chenglulu@loongson.cn/mbox/"},{"id":36935,"url":"https://patchwork.plctlab.org/api/1.2/patches/36935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227152127.57251-1-kito.cheng@sifive.com/","msgid":"<20221227152127.57251-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-12-27T15:21:27","name":"RISC-V: Return const ref. for vl_vtype_info::get_avl_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227152127.57251-1-kito.cheng@sifive.com/mbox/"},{"id":36943,"url":"https://patchwork.plctlab.org/api/1.2/patches/36943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227153018.100423-1-kito.cheng@sifive.com/","msgid":"<20221227153018.100423-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2022-12-27T15:30:18","name":"[committed] RISC-V: Add riscv_vector.h wrapper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227153018.100423-1-kito.cheng@sifive.com/mbox/"},{"id":36948,"url":"https://patchwork.plctlab.org/api/1.2/patches/36948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-1-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:01","name":"[COMMITTED,1/4] xtensa: Tabify, and trim trailing spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-1-jcmvbkbc@gmail.com/mbox/"},{"id":36946,"url":"https://patchwork.plctlab.org/api/1.2/patches/36946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-2-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:02","name":"[COMMITTED,2/4] xtensa: Clean up xtensa_expand_prologue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-2-jcmvbkbc@gmail.com/mbox/"},{"id":36945,"url":"https://patchwork.plctlab.org/api/1.2/patches/36945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-3-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-3-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:03","name":"[COMMITTED,3/4] xtensa: Change GP_RETURN{, _REG_COUNT} to GP_RETURN_{FIRST, LAST}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-3-jcmvbkbc@gmail.com/mbox/"},{"id":36944,"url":"https://patchwork.plctlab.org/api/1.2/patches/36944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-4-jcmvbkbc@gmail.com/","msgid":"<20221227154404.111654-4-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:04","name":"[COMMITTED,4/4] xtensa: Generate density instructions in set_frame_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154404.111654-4-jcmvbkbc@gmail.com/mbox/"},{"id":36947,"url":"https://patchwork.plctlab.org/api/1.2/patches/36947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154456.111741-1-jcmvbkbc@gmail.com/","msgid":"<20221227154456.111741-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-27T15:44:56","name":"[COMMITTED] gcc: xtensa: use define_c_enums instead of define_constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221227154456.111741-1-jcmvbkbc@gmail.com/mbox/"},{"id":37048,"url":"https://patchwork.plctlab.org/api/1.2/patches/37048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com/","msgid":"<00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T00:06:08","name":"[x86] Use ix86_expand_clear in ix86_split_ashl.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com/mbox/"},{"id":37050,"url":"https://patchwork.plctlab.org/api/1.2/patches/37050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com/","msgid":"<00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T00:32:52","name":"[x86_64] Add post-reload splitter for extendditi2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c901d91a53$edde8010$c99b8030$@nextmovesoftware.com/mbox/"},{"id":37060,"url":"https://patchwork.plctlab.org/api/1.2/patches/37060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com/","msgid":"<00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com>","list_archive_url":null,"date":"2022-12-28T01:15:23","name":"[x86] Provide zero_extend versions/variants of several patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e801d91a59$df0f3e70$9d2dbb50$@nextmovesoftware.com/mbox/"},{"id":37099,"url":"https://patchwork.plctlab.org/api/1.2/patches/37099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228040154.778-1-shihua@iscas.ac.cn/","msgid":"<20221228040154.778-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2022-12-28T04:01:54","name":"[RFC,v2] Support RV64-ILP32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228040154.778-1-shihua@iscas.ac.cn/mbox/"},{"id":37103,"url":"https://patchwork.plctlab.org/api/1.2/patches/37103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051108.196702-1-juzhe.zhong@rivai.ai/","msgid":"<20221228051108.196702-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-28T05:11:08","name":"RISC-V: Fix pointer tree type for store pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051108.196702-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37104,"url":"https://patchwork.plctlab.org/api/1.2/patches/37104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051947.219604-1-juzhe.zhong@rivai.ai/","msgid":"<20221228051947.219604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-28T05:19:47","name":"RISC-V: Change form of iterating blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228051947.219604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37128,"url":"https://patchwork.plctlab.org/api/1.2/patches/37128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz/","msgid":"<10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz>","list_archive_url":null,"date":"2022-12-28T08:16:54","name":"c: check if target_clone attrs are all string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10349745-e297-3e62-81ff-85ed0bf4460c@suse.cz/mbox/"},{"id":37152,"url":"https://patchwork.plctlab.org/api/1.2/patches/37152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d23be938-e91f-2f5b-f85f-c9e8105e272b@suse.cz/","msgid":"","list_archive_url":null,"date":"2022-12-28T09:18:57","name":"docs: fix Var documentation for .opt files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d23be938-e91f-2f5b-f85f-c9e8105e272b@suse.cz/mbox/"},{"id":37185,"url":"https://patchwork.plctlab.org/api/1.2/patches/37185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora637emmo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:30:39","name":"[14/17] parloops: don'\''t request insert that won'\''t be completed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora637emmo.fsf@lxoliva.fsfla.org/mbox/"},{"id":37189,"url":"https://patchwork.plctlab.org/api/1.2/patches/37189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydvemiz.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:32:52","name":"[15/17] prevent hash set/map insertion of deleted entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5ydvemiz.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":37192,"url":"https://patchwork.plctlab.org/api/1.2/patches/37192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qojelwj.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:46:20","name":"[16/17] check hash table counts at expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qojelwj.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":37193,"url":"https://patchwork.plctlab.org/api/1.2/patches/37193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6bd759.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2022-12-28T12:50:26","name":"[17/17] check hash table insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn6bd759.fsf@lxoliva.fsfla.org/mbox/"},{"id":37208,"url":"https://patchwork.plctlab.org/api/1.2/patches/37208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSexdb8vqz4JJH@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-28T14:28:11","name":"[1/2] libstdc++: Normalise _GLIBCXX20_DEPRECATED macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSexdb8vqz4JJH@Thaum.localdomain/mbox/"},{"id":37209,"url":"https://patchwork.plctlab.org/api/1.2/patches/37209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSiYH9k9JrId6H@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2022-12-28T14:28:25","name":"[2/2] libstdc++: Implement P1413R3 '\''deprecate aligned_storage and aligned_union'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y6xSiYH9k9JrId6H@Thaum.localdomain/mbox/"},{"id":37261,"url":"https://patchwork.plctlab.org/api/1.2/patches/37261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228181817.193462-1-rzinsly@ventanamicro.com/","msgid":"<20221228181817.193462-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2022-12-28T18:18:17","name":"RISC-V: Optimize min/max with SImode sources on 64-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221228181817.193462-1-rzinsly@ventanamicro.com/mbox/"},{"id":37371,"url":"https://patchwork.plctlab.org/api/1.2/patches/37371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp/","msgid":"<1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp>","list_archive_url":null,"date":"2022-12-29T12:14:33","name":"xtensa: Check DF availability before use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7667cb-0944-74c6-634b-709be374fc99@yahoo.co.jp/mbox/"},{"id":37419,"url":"https://patchwork.plctlab.org/api/1.2/patches/37419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229153402.40958-1-juzhe.zhong@rivai.ai/","msgid":"<20221229153402.40958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2022-12-29T15:34:02","name":"RISC-V: Fix inferior codegen for vse intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229153402.40958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":37453,"url":"https://patchwork.plctlab.org/api/1.2/patches/37453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229171432.236445-1-jcmvbkbc@gmail.com/","msgid":"<20221229171432.236445-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2022-12-29T17:14:32","name":"[COMMITTED] gcc: xtensa: use GP_RETURN_* instead of magic constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221229171432.236445-1-jcmvbkbc@gmail.com/mbox/"},{"id":37151,"url":"https://patchwork.plctlab.org/api/1.2/patches/37151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230001607.2232962-1-lipeng.zhu@intel.com/","msgid":"<20221230001607.2232962-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2022-12-30T00:16:07","name":"[v2] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230001607.2232962-1-lipeng.zhu@intel.com/mbox/"},{"id":37625,"url":"https://patchwork.plctlab.org/api/1.2/patches/37625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230094132.15562-1-iain@sandoe.co.uk/","msgid":"<20221230094132.15562-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T09:41:32","name":"[1/n] modula-2: Fix building the plugin for Darwin [PR107612].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230094132.15562-1-iain@sandoe.co.uk/mbox/"},{"id":37629,"url":"https://patchwork.plctlab.org/api/1.2/patches/37629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230095949.45279-1-iain@sandoe.co.uk/","msgid":"<20221230095949.45279-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T09:59:49","name":"[2/n] modula-2, libgm2: Add undefined, dynamic_lookup to m2 libs links.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230095949.45279-1-iain@sandoe.co.uk/mbox/"},{"id":37637,"url":"https://patchwork.plctlab.org/api/1.2/patches/37637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230100627.14753-1-iain@sandoe.co.uk/","msgid":"<20221230100627.14753-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:06:27","name":"[3/n] modula2: Ensure that module registration constructors are '\''extern'\'' [PR108183].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230100627.14753-1-iain@sandoe.co.uk/mbox/"},{"id":37638,"url":"https://patchwork.plctlab.org/api/1.2/patches/37638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230102046.8287-1-iain@sandoe.co.uk/","msgid":"<20221230102046.8287-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:20:46","name":"Darwin, crts: Provide scalb and significand as a crt [PR107631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230102046.8287-1-iain@sandoe.co.uk/mbox/"},{"id":37639,"url":"https://patchwork.plctlab.org/api/1.2/patches/37639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org/","msgid":"<66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org>","list_archive_url":null,"date":"2022-12-30T10:30:22","name":"update copyright year in libstdcc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66b92202-4a5c-aad3-2b73-2028411ecf82@jguk.org/mbox/"},{"id":37641,"url":"https://patchwork.plctlab.org/api/1.2/patches/37641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230105821.61331-1-iain@sandoe.co.uk/","msgid":"<20221230105821.61331-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-30T10:58:21","name":"[4/n] modula-2, driver: Handle static-libstd++ for targets without static/dynamic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221230105821.61331-1-iain@sandoe.co.uk/mbox/"},{"id":37717,"url":"https://patchwork.plctlab.org/api/1.2/patches/37717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc46419f69db826cab8742ecd967308584848c3.1672420755.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2022-12-30T17:21:37","name":"preprocessor: Don'\''t register pragmas in directives-only mode [PR108244]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc46419f69db826cab8742ecd967308584848c3.1672420755.git.lhyatt@gmail.com/mbox/"},{"id":37866,"url":"https://patchwork.plctlab.org/api/1.2/patches/37866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231135721.10758-1-iain@sandoe.co.uk/","msgid":"<20221231135721.10758-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T13:57:21","name":"modula-2, doc: Build dvi, ps and pdf doc in the gcc/doc directory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231135721.10758-1-iain@sandoe.co.uk/mbox/"},{"id":37867,"url":"https://patchwork.plctlab.org/api/1.2/patches/37867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231140347.10890-1-iain@sandoe.co.uk/","msgid":"<20221231140347.10890-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T14:03:47","name":"Modula-2, testsuite: No 96 bit floating type on Darwin.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231140347.10890-1-iain@sandoe.co.uk/mbox/"},{"id":37868,"url":"https://patchwork.plctlab.org/api/1.2/patches/37868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231141610.11021-1-iain@sandoe.co.uk/","msgid":"<20221231141610.11021-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2022-12-31T14:16:10","name":"configure: Do not build the unused libffi shared library.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221231141610.11021-1-iain@sandoe.co.uk/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-12/mbox/"},{"id":14,"url":"https://patchwork.plctlab.org/api/1.2/bundles/14/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-01/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-01","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":37954,"url":"https://patchwork.plctlab.org/api/1.2/patches/37954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com/","msgid":"<002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-01T15:55:26","name":"Fix RTL simplifications of FFS, POPCOUNT and PARITY.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002e01d91df9$79df2670$6d9d7350$@nextmovesoftware.com/mbox/"},{"id":37963,"url":"https://patchwork.plctlab.org/api/1.2/patches/37963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com/","msgid":"<005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-01T16:52:57","name":"[x86] PR target/108229: A minor STV compute_convert_gain tweak.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005a01d91e01$80bd4af0$8237e0d0$@nextmovesoftware.com/mbox/"},{"id":38068,"url":"https://patchwork.plctlab.org/api/1.2/patches/38068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102103805.4328-1-iain@sandoe.co.uk/","msgid":"<20230102103805.4328-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T10:38:05","name":"modula-2, driver: Implement handling for -static-libgm2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102103805.4328-1-iain@sandoe.co.uk/mbox/"},{"id":38072,"url":"https://patchwork.plctlab.org/api/1.2/patches/38072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com/","msgid":"<00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-02T10:50:38","name":"[x86] Improve ix86_expand_int_movcc to allow condition (mask) sharing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d91e98$0fc74480$2f55cd80$@nextmovesoftware.com/mbox/"},{"id":38095,"url":"https://patchwork.plctlab.org/api/1.2/patches/38095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102113922.5458-1-iain@sandoe.co.uk/","msgid":"<20230102113922.5458-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T11:39:22","name":"modula-2: Module registration constructors need to be visible [PR108259].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102113922.5458-1-iain@sandoe.co.uk/mbox/"},{"id":38114,"url":"https://patchwork.plctlab.org/api/1.2/patches/38114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102121913.62841-1-iain@sandoe.co.uk/","msgid":"<20230102121913.62841-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-02T12:19:13","name":"modula-2: Fix registration of modules via constructors [PR108183].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230102121913.62841-1-iain@sandoe.co.uk/mbox/"},{"id":38235,"url":"https://patchwork.plctlab.org/api/1.2/patches/38235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103013957.318395-1-juzhe.zhong@rivai.ai/","msgid":"<20230103013957.318395-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T01:39:57","name":"RISC-V: Fix vsetivli instruction asm for IMM AVL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103013957.318395-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38295,"url":"https://patchwork.plctlab.org/api/1.2/patches/38295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103065530.142443-1-juzhe.zhong@rivai.ai/","msgid":"<20230103065530.142443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T06:55:30","name":"RISC-V: Fix bugs for refine vsetvl a5, zero into vsetvl zero, zero incorrectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103065530.142443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38298,"url":"https://patchwork.plctlab.org/api/1.2/patches/38298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071159.147469-1-juzhe.zhong@rivai.ai/","msgid":"<20230103071159.147469-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:11:59","name":"RISC-V: Fix wrong in_group flag in validate_change call function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071159.147469-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38300,"url":"https://patchwork.plctlab.org/api/1.2/patches/38300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071641.149958-1-juzhe.zhong@rivai.ai/","msgid":"<20230103071641.149958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:16:41","name":"RISC-V: Fix backward_propagate_worthwhile_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103071641.149958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38308,"url":"https://patchwork.plctlab.org/api/1.2/patches/38308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103072436.157051-1-juzhe.zhong@rivai.ai/","msgid":"<20230103072436.157051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:24:36","name":"RISC-V: Simplify codes of changing vsetvl instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103072436.157051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38311,"url":"https://patchwork.plctlab.org/api/1.2/patches/38311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103073030.163679-1-juzhe.zhong@rivai.ai/","msgid":"<20230103073030.163679-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-03T07:30:30","name":"RISC-V: Fix bugs of available condition.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103073030.163679-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38321,"url":"https://patchwork.plctlab.org/api/1.2/patches/38321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-1-lin1.hu@intel.com/","msgid":"<20230103083723.3395300-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-01-03T08:37:22","name":"[1/4] i386: Remove Meteorlake'\''s family_model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-1-lin1.hu@intel.com/mbox/"},{"id":38322,"url":"https://patchwork.plctlab.org/api/1.2/patches/38322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-2-lin1.hu@intel.com/","msgid":"<20230103083723.3395300-2-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-01-03T08:37:23","name":"[2/4] Initial Emeraldrapids Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103083723.3395300-2-lin1.hu@intel.com/mbox/"},{"id":38329,"url":"https://patchwork.plctlab.org/api/1.2/patches/38329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093502.75997-1-poulhies@adacore.com/","msgid":"<20230103093502.75997-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:02","name":"[COMMITTED] ada: Fix support of Default_Component_Value aspect on derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093502.75997-1-poulhies@adacore.com/mbox/"},{"id":38330,"url":"https://patchwork.plctlab.org/api/1.2/patches/38330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093514.76112-1-poulhies@adacore.com/","msgid":"<20230103093514.76112-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:14","name":"[COMMITTED] ada: Cannot reference ghost entity in class-wide precondition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093514.76112-1-poulhies@adacore.com/mbox/"},{"id":38333,"url":"https://patchwork.plctlab.org/api/1.2/patches/38333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093518.76176-1-poulhies@adacore.com/","msgid":"<20230103093518.76176-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:18","name":"[COMMITTED] ada: Simplify [Small_]Integer_Type_For","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093518.76176-1-poulhies@adacore.com/mbox/"},{"id":38331,"url":"https://patchwork.plctlab.org/api/1.2/patches/38331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093523.76239-1-poulhies@adacore.com/","msgid":"<20230103093523.76239-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:23","name":"[COMMITTED] ada: Fix detection of function calls in object declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093523.76239-1-poulhies@adacore.com/mbox/"},{"id":38337,"url":"https://patchwork.plctlab.org/api/1.2/patches/38337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093530.76302-1-poulhies@adacore.com/","msgid":"<20230103093530.76302-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:30","name":"[COMMITTED] ada: GNAT UGN: Adjust wording in \"Platform-specific Information\" chapter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093530.76302-1-poulhies@adacore.com/mbox/"},{"id":38340,"url":"https://patchwork.plctlab.org/api/1.2/patches/38340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093534.76368-1-poulhies@adacore.com/","msgid":"<20230103093534.76368-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:34","name":"[COMMITTED] ada: Make Sem_Util.Is_Aliased_View predicate more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093534.76368-1-poulhies@adacore.com/mbox/"},{"id":38342,"url":"https://patchwork.plctlab.org/api/1.2/patches/38342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093540.76431-1-poulhies@adacore.com/","msgid":"<20230103093540.76431-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:40","name":"[COMMITTED] ada: Another small adjustment to special resolution of membership test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093540.76431-1-poulhies@adacore.com/mbox/"},{"id":38332,"url":"https://patchwork.plctlab.org/api/1.2/patches/38332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093545.76495-1-poulhies@adacore.com/","msgid":"<20230103093545.76495-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:45","name":"[COMMITTED] ada: Adapt frontend optimization for aggregate assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093545.76495-1-poulhies@adacore.com/mbox/"},{"id":38336,"url":"https://patchwork.plctlab.org/api/1.2/patches/38336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093549.76562-1-poulhies@adacore.com/","msgid":"<20230103093549.76562-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:49","name":"[COMMITTED] ada: Fix calling convention of foreign functions returning limited type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093549.76562-1-poulhies@adacore.com/mbox/"},{"id":38335,"url":"https://patchwork.plctlab.org/api/1.2/patches/38335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093557.76628-1-poulhies@adacore.com/","msgid":"<20230103093557.76628-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:35:57","name":"[COMMITTED] ada: Make Apply_Discriminant_Check.Denotes_Explicit_Dereference more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093557.76628-1-poulhies@adacore.com/mbox/"},{"id":38344,"url":"https://patchwork.plctlab.org/api/1.2/patches/38344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093602.76692-1-poulhies@adacore.com/","msgid":"<20230103093602.76692-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:02","name":"[COMMITTED] ada: Fix format string parsing in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093602.76692-1-poulhies@adacore.com/mbox/"},{"id":38339,"url":"https://patchwork.plctlab.org/api/1.2/patches/38339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093606.76755-1-poulhies@adacore.com/","msgid":"<20230103093606.76755-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:06","name":"[COMMITTED] ada: Fix premature finalization of return temporary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093606.76755-1-poulhies@adacore.com/mbox/"},{"id":38334,"url":"https://patchwork.plctlab.org/api/1.2/patches/38334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093612.76819-1-poulhies@adacore.com/","msgid":"<20230103093612.76819-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:12","name":"[COMMITTED] ada: Fix parsing bug in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093612.76819-1-poulhies@adacore.com/mbox/"},{"id":38341,"url":"https://patchwork.plctlab.org/api/1.2/patches/38341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093615.76884-1-poulhies@adacore.com/","msgid":"<20230103093615.76884-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:15","name":"[COMMITTED] ada: Fix GNAT.Formatted_String'\''s handling of real values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093615.76884-1-poulhies@adacore.com/mbox/"},{"id":38343,"url":"https://patchwork.plctlab.org/api/1.2/patches/38343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093621.76948-1-poulhies@adacore.com/","msgid":"<20230103093621.76948-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:21","name":"[COMMITTED] ada: output.adb: fix newline being inserted when buffer is full","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093621.76948-1-poulhies@adacore.com/mbox/"},{"id":38338,"url":"https://patchwork.plctlab.org/api/1.2/patches/38338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093626.77011-1-poulhies@adacore.com/","msgid":"<20230103093626.77011-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-03T09:36:26","name":"[COMMITTED] ada: Fix unescaped quotes when combining fdiagnostics-format=json and gnatdJ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230103093626.77011-1-poulhies@adacore.com/mbox/"},{"id":38358,"url":"https://patchwork.plctlab.org/api/1.2/patches/38358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QDVwqcWxcRpq5u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-03T10:28:39","name":"cfgrtl: Don'\''t try to redirect asm goto to EXIT [PR108263]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QDVwqcWxcRpq5u@tucnak/mbox/"},{"id":38365,"url":"https://patchwork.plctlab.org/api/1.2/patches/38365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QEn3gxmWvMRdr7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-03T10:34:07","name":"expr: Fix up store_expr into SUBREG_PROMOTED_* target [PR108264]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7QEn3gxmWvMRdr7@tucnak/mbox/"},{"id":38382,"url":"https://patchwork.plctlab.org/api/1.2/patches/38382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmbvx41g.fsf@oldenburg.str.redhat.com/","msgid":"<87pmbvx41g.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-01-03T11:15:23","name":"Various fixes for DWARF register size computation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmbvx41g.fsf@oldenburg.str.redhat.com/mbox/"},{"id":38427,"url":"https://patchwork.plctlab.org/api/1.2/patches/38427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009101d91f75$ac187920$04496b60$@nextmovesoftware.com/","msgid":"<009101d91f75$ac187920$04496b60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-03T13:17:02","name":"PR tree-optimization/92342: Optimize b & -(a==c) in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009101d91f75$ac187920$04496b60$@nextmovesoftware.com/mbox/"},{"id":38695,"url":"https://patchwork.plctlab.org/api/1.2/patches/38695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded1a76dd073768bef073314e86407439fea8f32.camel@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-03T22:47:20","name":"gcc-11: FTBFS on hurd-i386","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded1a76dd073768bef073314e86407439fea8f32.camel@gmail.com/mbox/"},{"id":38731,"url":"https://patchwork.plctlab.org/api/1.2/patches/38731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fNaJU0FQkpY1sbMSTBhtyL9Fe3rKjTMaPdqQoq0VZhJBQxB1UtH_QU19Rai4usWKkETmSjqNT7cW5JaJxPnLy6iDTYpq4LHcEZsk2twCHAE=@proton.me/","msgid":"","list_archive_url":null,"date":"2023-01-04T03:09:45","name":"libiberty: Handle Windows nul device in unlink-if-ordinary.c [PR108276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fNaJU0FQkpY1sbMSTBhtyL9Fe3rKjTMaPdqQoq0VZhJBQxB1UtH_QU19Rai4usWKkETmSjqNT7cW5JaJxPnLy6iDTYpq4LHcEZsk2twCHAE=@proton.me/mbox/"},{"id":38739,"url":"https://patchwork.plctlab.org/api/1.2/patches/38739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3a62e9d-1d13-e338-7392-22c207061d37@emailplus.org/","msgid":"","list_archive_url":null,"date":"2023-01-04T05:32:32","name":"Add link to gmplib.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3a62e9d-1d13-e338-7392-22c207061d37@emailplus.org/mbox/"},{"id":38749,"url":"https://patchwork.plctlab.org/api/1.2/patches/38749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com/","msgid":"<5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:16:34","name":"[PATCH-1,rs6000] Change mode and insn condition for scalar extract exp instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aff667d-0547-44b7-27cc-c0392c8c75e0@linux.ibm.com/mbox/"},{"id":38750,"url":"https://patchwork.plctlab.org/api/1.2/patches/38750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com/","msgid":"<5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:16:48","name":"[PATCH-2,rs6000] Change mode and insn condition for scalar extract sig instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b58e13a-e87b-df28-ffee-9e9b45990b14@linux.ibm.com/mbox/"},{"id":38751,"url":"https://patchwork.plctlab.org/api/1.2/patches/38751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f82d5de1-31fd-f700-f633-1aeb15b39e1c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T06:17:01","name":"[PATCH-3,rs6000] Change mode and insn condition for scalar insert exp instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f82d5de1-31fd-f700-f633-1aeb15b39e1c@linux.ibm.com/mbox/"},{"id":38752,"url":"https://patchwork.plctlab.org/api/1.2/patches/38752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2a6914d-f2e5-7383-fb7e-a88b50192b2c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T06:17:12","name":"[PATCH-4,rs6000] Change ilp32 target check for some scalar-extract-sig and scalar-insert-exp test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2a6914d-f2e5-7383-fb7e-a88b50192b2c@linux.ibm.com/mbox/"},{"id":38773,"url":"https://patchwork.plctlab.org/api/1.2/patches/38773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104065140.91578-1-guojiufu@linux.ibm.com/","msgid":"<20230104065140.91578-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T06:51:40","name":"[V3] rs6000: Load high and low part of 64bit constant independently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104065140.91578-1-guojiufu@linux.ibm.com/mbox/"},{"id":38782,"url":"https://patchwork.plctlab.org/api/1.2/patches/38782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6e8ab52-3c92-3fa0-c70a-085c5c53e18e@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-04T08:28:19","name":"swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6e8ab52-3c92-3fa0-c70a-085c5c53e18e@linux.vnet.ibm.com/mbox/"},{"id":38812,"url":"https://patchwork.plctlab.org/api/1.2/patches/38812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VCJRmHC/U+F53U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:08:53","name":"ubsan: Avoid narrowing of multiply for -fsanitize=signed-integer-overflow [PR108256]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VCJRmHC/U+F53U@tucnak/mbox/"},{"id":38814,"url":"https://patchwork.plctlab.org/api/1.2/patches/38814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VDRnSoaO6DtSDV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:13:42","name":"vrp: Handle pointers in maybe_set_nonzero_bits [PR108253]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VDRnSoaO6DtSDV@tucnak/mbox/"},{"id":38815,"url":"https://patchwork.plctlab.org/api/1.2/patches/38815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com/","msgid":"<197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T09:20:14","name":"rs6000: Don'\''t use optimize_function_for_speed_p too early [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/197abd1f-081c-3206-4dd5-45f0b098612a@linux.ibm.com/mbox/"},{"id":38817,"url":"https://patchwork.plctlab.org/api/1.2/patches/38817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com/","msgid":"<9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T09:20:23","name":"rs6000: Make P10_FUSION honour tuning setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9defdca0-1cf3-82a3-d04a-2eb4f3daf106@linux.ibm.com/mbox/"},{"id":38818,"url":"https://patchwork.plctlab.org/api/1.2/patches/38818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VE9wUKrxTJ0OJF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:20:55","name":"generic-match-head: Don'\''t assume GENERIC folding is done only early [PR108237]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VE9wUKrxTJ0OJF@tucnak/mbox/"},{"id":38825,"url":"https://patchwork.plctlab.org/api/1.2/patches/38825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VHqivJl6gu4GNA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-04T09:32:26","name":"c++: Error recovery in merge_default_template_args [PR108206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7VHqivJl6gu4GNA@tucnak/mbox/"},{"id":38879,"url":"https://patchwork.plctlab.org/api/1.2/patches/38879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104115437.48991-1-jwakely@redhat.com/","msgid":"<20230104115437.48991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-04T11:54:37","name":"[committed] libstdc++: Fix std::array::data() to be a constant expression [PR108258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104115437.48991-1-jwakely@redhat.com/mbox/"},{"id":38896,"url":"https://patchwork.plctlab.org/api/1.2/patches/38896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104124439.191858-1-guojiufu@linux.ibm.com/","msgid":"<20230104124439.191858-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T12:44:39","name":"[V4] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104124439.191858-1-guojiufu@linux.ibm.com/mbox/"},{"id":38935,"url":"https://patchwork.plctlab.org/api/1.2/patches/38935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134526.206115-1-juzhe.zhong@rivai.ai/","msgid":"<20230104134526.206115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-04T13:45:26","name":"RISC-V: Refine Phase 3 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134526.206115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38936,"url":"https://patchwork.plctlab.org/api/1.2/patches/38936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134557.196235-1-guojiufu@linux.ibm.com/","msgid":"<20230104134557.196235-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-04T13:45:57","name":"[V2] extract DF/SF/SI/HI/QI subreg from parameter word on stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134557.196235-1-guojiufu@linux.ibm.com/mbox/"},{"id":38938,"url":"https://patchwork.plctlab.org/api/1.2/patches/38938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134848.209374-1-juzhe.zhong@rivai.ai/","msgid":"<20230104134848.209374-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-04T13:48:48","name":"RISC-V: Add testcases for IMM (0 ~ 31) AVL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104134848.209374-1-juzhe.zhong@rivai.ai/mbox/"},{"id":38993,"url":"https://patchwork.plctlab.org/api/1.2/patches/38993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104163758.2933306-1-ppalka@redhat.com/","msgid":"<20230104163758.2933306-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-04T16:37:58","name":"c++: mark_single_function and SFINAE [PR108282]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104163758.2933306-1-ppalka@redhat.com/mbox/"},{"id":39041,"url":"https://patchwork.plctlab.org/api/1.2/patches/39041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7W0LY8i7rq756/m@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-04T17:15:25","name":"Avoid quadratic behaviour of symbol renaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7W0LY8i7rq756/m@kam.mff.cuni.cz/mbox/"},{"id":39045,"url":"https://patchwork.plctlab.org/api/1.2/patches/39045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104175408.4437-1-softwaresale01@gmail.com/","msgid":"<20230104175408.4437-1-softwaresale01@gmail.com>","list_archive_url":null,"date":"2023-01-04T17:54:09","name":"[ping] cp: warn uninitialized const/ref in base class [PR80681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230104175408.4437-1-softwaresale01@gmail.com/mbox/"},{"id":39157,"url":"https://patchwork.plctlab.org/api/1.2/patches/39157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1qhq3x9.fsf@debian/","msgid":"<87y1qhq3x9.fsf@debian>","list_archive_url":null,"date":"2023-01-04T23:24:18","name":"[modula2] Add missing declarations to gcc/m2/gm2-libs-min/M2RTS.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1qhq3x9.fsf@debian/mbox/"},{"id":39235,"url":"https://patchwork.plctlab.org/api/1.2/patches/39235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005225.140099-1-jwakely@redhat.com/","msgid":"<20230105005225.140099-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:52:25","name":"[committed] libstdc++: Fix std::chrono::hh_mm_ss with unsigned rep [PR108265]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005225.140099-1-jwakely@redhat.com/mbox/"},{"id":39236,"url":"https://patchwork.plctlab.org/api/1.2/patches/39236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005240.140165-1-jwakely@redhat.com/","msgid":"<20230105005240.140165-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:52:40","name":"[committed] libstdc++: Only use std::atomic if lock free [PR108228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005240.140165-1-jwakely@redhat.com/mbox/"},{"id":39237,"url":"https://patchwork.plctlab.org/api/1.2/patches/39237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005316.140306-1-jwakely@redhat.com/","msgid":"<20230105005316.140306-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T00:53:16","name":"[committed] libstdc++: Support single components in name of chrono::current_zone() [PR108211]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105005316.140306-1-jwakely@redhat.com/mbox/"},{"id":39294,"url":"https://patchwork.plctlab.org/api/1.2/patches/39294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105033853.7111-2-benson_muite@emailplus.org/","msgid":"<20230105033853.7111-2-benson_muite@emailplus.org>","list_archive_url":null,"date":"2023-01-05T03:38:53","name":"[1/1] Add link to gmplib.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105033853.7111-2-benson_muite@emailplus.org/mbox/"},{"id":39489,"url":"https://patchwork.plctlab.org/api/1.2/patches/39489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp/","msgid":"<04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-05T08:40:51","name":"xtensa: Optimize stack frame adjustment more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04a89dbf-c2a3-5dcb-8949-77569a1ad169@yahoo.co.jp/mbox/"},{"id":39481,"url":"https://patchwork.plctlab.org/api/1.2/patches/39481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7auiK3sZ0VWIh/j@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-05T11:03:36","name":"[committed] openmp: Fix up finish_omp_target_clauses [PR108286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7auiK3sZ0VWIh/j@tucnak/mbox/"},{"id":39524,"url":"https://patchwork.plctlab.org/api/1.2/patches/39524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105130553.3434596-1-ysato@users.sourceforge.jp/","msgid":"<20230105130553.3434596-1-ysato@users.sourceforge.jp>","list_archive_url":null,"date":"2023-01-05T13:05:53","name":"PR target/89828 Inernal compiler error on -fno-omit-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105130553.3434596-1-ysato@users.sourceforge.jp/mbox/"},{"id":39528,"url":"https://patchwork.plctlab.org/api/1.2/patches/39528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105131323.81730-1-iain@sandoe.co.uk/","msgid":"<20230105131323.81730-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-05T13:13:23","name":"modula-2: Remove uses of scalb*() and significand*() [PR107631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105131323.81730-1-iain@sandoe.co.uk/mbox/"},{"id":39603,"url":"https://patchwork.plctlab.org/api/1.2/patches/39603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001501d9210f$694bed70$3be3c850$@nextmovesoftware.com/","msgid":"<001501d9210f$694bed70$3be3c850$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-05T14:10:04","name":"[x86_64] Introduce insvti_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001501d9210f$694bed70$3be3c850$@nextmovesoftware.com/mbox/"},{"id":39612,"url":"https://patchwork.plctlab.org/api/1.2/patches/39612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143835.155238-1-poulhies@adacore.com/","msgid":"<20230105143835.155238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:35","name":"[COMMITTED] ada: Fix incorrect warning about unreferenced packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143835.155238-1-poulhies@adacore.com/mbox/"},{"id":39613,"url":"https://patchwork.plctlab.org/api/1.2/patches/39613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143844.155367-1-poulhies@adacore.com/","msgid":"<20230105143844.155367-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:44","name":"[COMMITTED] ada: Fix finalization issues in extended return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143844.155367-1-poulhies@adacore.com/mbox/"},{"id":39616,"url":"https://patchwork.plctlab.org/api/1.2/patches/39616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143853.155433-1-poulhies@adacore.com/","msgid":"<20230105143853.155433-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:38:53","name":"[COMMITTED] ada: Update doc for -gnatw_q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143853.155433-1-poulhies@adacore.com/mbox/"},{"id":39617,"url":"https://patchwork.plctlab.org/api/1.2/patches/39617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143901.155499-1-poulhies@adacore.com/","msgid":"<20230105143901.155499-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:01","name":"[COMMITTED] ada: Better error message for bad Discard_Names configuration pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143901.155499-1-poulhies@adacore.com/mbox/"},{"id":39619,"url":"https://patchwork.plctlab.org/api/1.2/patches/39619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143907.155566-1-poulhies@adacore.com/","msgid":"<20230105143907.155566-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:07","name":"[COMMITTED] ada: Revert to constrained allocation for string concatenation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143907.155566-1-poulhies@adacore.com/mbox/"},{"id":39614,"url":"https://patchwork.plctlab.org/api/1.2/patches/39614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143912.155630-1-poulhies@adacore.com/","msgid":"<20230105143912.155630-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:12","name":"[COMMITTED] ada: Spurious error on Lock_Free protected type with discriminants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143912.155630-1-poulhies@adacore.com/mbox/"},{"id":39618,"url":"https://patchwork.plctlab.org/api/1.2/patches/39618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143918.155693-1-poulhies@adacore.com/","msgid":"<20230105143918.155693-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:18","name":"[COMMITTED] ada: Fix generic instantiation of sibling package","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143918.155693-1-poulhies@adacore.com/mbox/"},{"id":39615,"url":"https://patchwork.plctlab.org/api/1.2/patches/39615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143924.155757-1-poulhies@adacore.com/","msgid":"<20230105143924.155757-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:24","name":"[COMMITTED] ada: Adjust handling of \"%g\" in GNAT.Formatted_String","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143924.155757-1-poulhies@adacore.com/mbox/"},{"id":39620,"url":"https://patchwork.plctlab.org/api/1.2/patches/39620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143933.155824-1-poulhies@adacore.com/","msgid":"<20230105143933.155824-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:33","name":"[COMMITTED] ada: Simplify new expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143933.155824-1-poulhies@adacore.com/mbox/"},{"id":39622,"url":"https://patchwork.plctlab.org/api/1.2/patches/39622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143937.155893-1-poulhies@adacore.com/","msgid":"<20230105143937.155893-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:37","name":"[COMMITTED] ada: Further adjust freezing for expansion of contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143937.155893-1-poulhies@adacore.com/mbox/"},{"id":39628,"url":"https://patchwork.plctlab.org/api/1.2/patches/39628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143946.155956-1-poulhies@adacore.com/","msgid":"<20230105143946.155956-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:46","name":"[COMMITTED] ada: Update gnatpp documentation with --layout switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143946.155956-1-poulhies@adacore.com/mbox/"},{"id":39630,"url":"https://patchwork.plctlab.org/api/1.2/patches/39630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143954.156047-1-poulhies@adacore.com/","msgid":"<20230105143954.156047-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:39:54","name":"[COMMITTED] ada: INOX: prototype RFC on String Interpolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105143954.156047-1-poulhies@adacore.com/mbox/"},{"id":39624,"url":"https://patchwork.plctlab.org/api/1.2/patches/39624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144009.156114-1-poulhies@adacore.com/","msgid":"<20230105144009.156114-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:09","name":"[COMMITTED] ada: Fix spurious emissions of -gnatwj warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144009.156114-1-poulhies@adacore.com/mbox/"},{"id":39621,"url":"https://patchwork.plctlab.org/api/1.2/patches/39621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144020.156181-1-poulhies@adacore.com/","msgid":"<20230105144020.156181-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:20","name":"[COMMITTED] ada: Fix pasto in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144020.156181-1-poulhies@adacore.com/mbox/"},{"id":39629,"url":"https://patchwork.plctlab.org/api/1.2/patches/39629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144040.156244-1-poulhies@adacore.com/","msgid":"<20230105144040.156244-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:40","name":"[COMMITTED] ada: Optimize class-wide objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144040.156244-1-poulhies@adacore.com/mbox/"},{"id":39623,"url":"https://patchwork.plctlab.org/api/1.2/patches/39623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144045.156314-1-poulhies@adacore.com/","msgid":"<20230105144045.156314-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:45","name":"[COMMITTED] ada: Do not use decimal approximation in -gnatRj output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144045.156314-1-poulhies@adacore.com/mbox/"},{"id":39631,"url":"https://patchwork.plctlab.org/api/1.2/patches/39631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144051.156381-1-poulhies@adacore.com/","msgid":"<20230105144051.156381-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:51","name":"[COMMITTED] ada: Fix nested generic instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144051.156381-1-poulhies@adacore.com/mbox/"},{"id":39633,"url":"https://patchwork.plctlab.org/api/1.2/patches/39633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144055.156446-1-poulhies@adacore.com/","msgid":"<20230105144055.156446-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:55","name":"[COMMITTED] ada: Remove unhelpful special case for renamed bodies in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144055.156446-1-poulhies@adacore.com/mbox/"},{"id":39627,"url":"https://patchwork.plctlab.org/api/1.2/patches/39627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144059.156509-1-poulhies@adacore.com/","msgid":"<20230105144059.156509-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:40:59","name":"[COMMITTED] ada: Flag renaming-as-spec as a body to inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144059.156509-1-poulhies@adacore.com/mbox/"},{"id":39632,"url":"https://patchwork.plctlab.org/api/1.2/patches/39632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144107.156577-1-poulhies@adacore.com/","msgid":"<20230105144107.156577-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:41:07","name":"[COMMITTED] ada: Clean up interface handling in Expand_N_Object_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144107.156577-1-poulhies@adacore.com/mbox/"},{"id":39635,"url":"https://patchwork.plctlab.org/api/1.2/patches/39635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144111.156640-1-poulhies@adacore.com/","msgid":"<20230105144111.156640-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-05T14:41:11","name":"[COMMITTED] ada: Minor tweak to test added in previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105144111.156640-1-poulhies@adacore.com/mbox/"},{"id":39661,"url":"https://patchwork.plctlab.org/api/1.2/patches/39661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105162911.82041-1-jwakely@redhat.com/","msgid":"<20230105162911.82041-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T16:29:11","name":"[committed] libstdc++: Reduce size of std::bind_front(empty_type) result [PR108290]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105162911.82041-1-jwakely@redhat.com/mbox/"},{"id":39662,"url":"https://patchwork.plctlab.org/api/1.2/patches/39662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105163007.82096-1-jwakely@redhat.com/","msgid":"<20230105163007.82096-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-05T16:30:07","name":"[committed] libstdc++: Fix printers for Python 2 [PR108212]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105163007.82096-1-jwakely@redhat.com/mbox/"},{"id":39663,"url":"https://patchwork.plctlab.org/api/1.2/patches/39663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fscpkjy7.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-05T16:46:56","name":"ipa: Sort ipa_param_body_adjustments::m_replacements (PR 108110)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6fscpkjy7.fsf@suse.cz/mbox/"},{"id":39709,"url":"https://patchwork.plctlab.org/api/1.2/patches/39709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105172010.3598077-1-ppalka@redhat.com/","msgid":"<20230105172010.3598077-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-05T17:20:10","name":"c++: class-head parsing and CPP_TEMPLATE_ID access [PR108275]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230105172010.3598077-1-ppalka@redhat.com/mbox/"},{"id":39731,"url":"https://patchwork.plctlab.org/api/1.2/patches/39731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7cV5aVDZBXxqCmU@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-05T18:24:37","name":"[committed] hppa: Fix atomic operations on PA-RISC 2.0 processors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7cV5aVDZBXxqCmU@mx3210.localdomain/mbox/"},{"id":39782,"url":"https://patchwork.plctlab.org/api/1.2/patches/39782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/febe8136ba2e1afbbf70beff8ce0a1cf66401dff.1672946731.git.segher@kernel.crashing.org/","msgid":"","list_archive_url":null,"date":"2023-01-05T19:27:40","name":"wwwdocs: Note that old reload is deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/febe8136ba2e1afbbf70beff8ce0a1cf66401dff.1672946731.git.segher@kernel.crashing.org/mbox/"},{"id":39826,"url":"https://patchwork.plctlab.org/api/1.2/patches/39826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com/","msgid":"<0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2023-01-05T22:36:05","name":"[v2,1/4] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a37f0b6b4ff13d99872f2c59a72284a693bc7ef.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39824,"url":"https://patchwork.plctlab.org/api/1.2/patches/39824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af19256469798ddf9b7906adacb8f8edfd574a25.1672867272.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-05T22:36:06","name":"[v2,2/4] diagnostics: Handle generated data locations in edit_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af19256469798ddf9b7906adacb8f8edfd574a25.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39827,"url":"https://patchwork.plctlab.org/api/1.2/patches/39827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com/","msgid":"<9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com>","list_archive_url":null,"date":"2023-01-05T22:36:07","name":"[v2,3/4] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a9ae598bfcde9676d41d592273b3b71a30b0ee4.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39825,"url":"https://patchwork.plctlab.org/api/1.2/patches/39825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e364f3a6881ed90c41090e890121332adf62c0ee.1672867272.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-05T22:36:08","name":"[v2,4/4] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e364f3a6881ed90c41090e890121332adf62c0ee.1672867272.git.lhyatt@gmail.com/mbox/"},{"id":39968,"url":"https://patchwork.plctlab.org/api/1.2/patches/39968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb666223-2b26-4914-903d-6fbafcafd5c0.jinma@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T06:56:03","name":"[RISCV] Change the generation mode of `adjust_sp_rtx` from gen_insn to gen_SET.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb666223-2b26-4914-903d-6fbafcafd5c0.jinma@linux.alibaba.com/mbox/"},{"id":39978,"url":"https://patchwork.plctlab.org/api/1.2/patches/39978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz/","msgid":"<6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz>","list_archive_url":null,"date":"2023-01-06T07:49:23","name":"[pushed] contrib: add '\''contrib'\'' to default dirs in update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6973c338-686e-618c-4e1a-1bbd75369ff8@suse.cz/mbox/"},{"id":39991,"url":"https://patchwork.plctlab.org/api/1.2/patches/39991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106082314.2091-1-anothername27-unity@yahoo.com/","msgid":"<20230106082314.2091-1-anothername27-unity@yahoo.com>","list_archive_url":null,"date":"2023-01-06T08:23:14","name":"Handle Windows nul device in unlink-if-ordinary.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106082314.2091-1-anothername27-unity@yahoo.com/mbox/"},{"id":39995,"url":"https://patchwork.plctlab.org/api/1.2/patches/39995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083118.2141-1-anothername27-unity@yahoo.com/","msgid":"<20230106083118.2141-1-anothername27-unity@yahoo.com>","list_archive_url":null,"date":"2023-01-06T08:31:18","name":"Handle Windows nul device in unlink-if-ordinary.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083118.2141-1-anothername27-unity@yahoo.com/mbox/"},{"id":40003,"url":"https://patchwork.plctlab.org/api/1.2/patches/40003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083908.332604-1-chigot@adacore.com/","msgid":"<20230106083908.332604-1-chigot@adacore.com>","list_archive_url":null,"date":"2023-01-06T08:39:08","name":"configure: remove dependencies on gmp and mpfr when gdb is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106083908.332604-1-chigot@adacore.com/mbox/"},{"id":40052,"url":"https://patchwork.plctlab.org/api/1.2/patches/40052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com/","msgid":"<11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com>","list_archive_url":null,"date":"2023-01-06T09:26:37","name":"rs6000: Teach rs6000_opaque_type_invalid_use_p about inline asm [PR108272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d0cb36-bbe2-7d48-cba2-9c8d4d3f08db@linux.ibm.com/mbox/"},{"id":40057,"url":"https://patchwork.plctlab.org/api/1.2/patches/40057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc4e1ec0-9f4c-0a9c-74c2-e3ba753b9414@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T09:28:26","name":"rs6000: Allow powerpc64 to be unset for implicit 64 bit [PR108240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc4e1ec0-9f4c-0a9c-74c2-e3ba753b9414@linux.ibm.com/mbox/"},{"id":40063,"url":"https://patchwork.plctlab.org/api/1.2/patches/40063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7fwNTmas50x4CUm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-06T09:56:05","name":"[committed] testsuite: Add testcases from PR108292 and PR108308","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7fwNTmas50x4CUm@tucnak/mbox/"},{"id":40073,"url":"https://patchwork.plctlab.org/api/1.2/patches/40073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106102520.3949796-1-yunqiang.su@cipunited.com/","msgid":"<20230106102520.3949796-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-01-06T10:25:20","name":"Set CROSS_SYSTEM_HEADER_DIR according includedir","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106102520.3949796-1-yunqiang.su@cipunited.com/mbox/"},{"id":40081,"url":"https://patchwork.plctlab.org/api/1.2/patches/40081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106103632.3951217-1-yunqiang.su@cipunited.com/","msgid":"<20230106103632.3951217-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-01-06T10:36:32","name":"libsanitizer/mips: always build with largefile support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106103632.3951217-1-yunqiang.su@cipunited.com/mbox/"},{"id":40084,"url":"https://patchwork.plctlab.org/api/1.2/patches/40084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104126.161754-1-jwakely@redhat.com/","msgid":"<20230106104126.161754-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T10:41:26","name":"[wwwdocs] Document libstdc++ additions for GCC 12 and 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104126.161754-1-jwakely@redhat.com/mbox/"},{"id":40088,"url":"https://patchwork.plctlab.org/api/1.2/patches/40088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104846.172544-1-jwakely@redhat.com/","msgid":"<20230106104846.172544-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T10:48:46","name":"[wwwdocs] Fix typo in libstdc++ release notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106104846.172544-1-jwakely@redhat.com/mbox/"},{"id":40093,"url":"https://patchwork.plctlab.org/api/1.2/patches/40093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz/","msgid":"<60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz>","list_archive_url":null,"date":"2023-01-06T11:33:54","name":"diagnostics: fix crash with -fdiagnostics-format=json-file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60f9fd2b-211e-c1d5-e17a-1fab1ee51338@suse.cz/mbox/"},{"id":40099,"url":"https://patchwork.plctlab.org/api/1.2/patches/40099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106115402.178926-1-jwakely@redhat.com/","msgid":"<20230106115402.178926-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T11:54:02","name":"[committed] libstdc++: Fix deadlock in debug iterator increment [PR108288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106115402.178926-1-jwakely@redhat.com/mbox/"},{"id":40108,"url":"https://patchwork.plctlab.org/api/1.2/patches/40108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz/","msgid":"<6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz>","list_archive_url":null,"date":"2023-01-06T12:21:26","name":"Remove legacy pre-C++ 11 definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6defa548-2da3-6cba-0372-f1e6c6b64c81@suse.cz/mbox/"},{"id":40109,"url":"https://patchwork.plctlab.org/api/1.2/patches/40109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106122552.145679-1-guojiufu@linux.ibm.com/","msgid":"<20230106122552.145679-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-06T12:25:52","name":"rs6000: mark tieable between INT and FLOAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106122552.145679-1-guojiufu@linux.ibm.com/mbox/"},{"id":40123,"url":"https://patchwork.plctlab.org/api/1.2/patches/40123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106132658.189522-1-jwakely@redhat.com/","msgid":"<20230106132658.189522-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T13:26:58","name":"[committed] libstdc++: Disable broken std::format for floating-point types [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106132658.189522-1-jwakely@redhat.com/mbox/"},{"id":40144,"url":"https://patchwork.plctlab.org/api/1.2/patches/40144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106141200.237958-1-jwakely@redhat.com/","msgid":"<20230106141200.237958-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T14:12:00","name":"[committed] libstdc++: Fix misuse of alloca in std::bitset [PR108214]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106141200.237958-1-jwakely@redhat.com/mbox/"},{"id":40155,"url":"https://patchwork.plctlab.org/api/1.2/patches/40155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106145950.3685552-1-ppalka@redhat.com/","msgid":"<20230106145950.3685552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-06T14:59:50","name":"libstdc++: Add feature-test macros for implemented C++23 views [PR108260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106145950.3685552-1-ppalka@redhat.com/mbox/"},{"id":40213,"url":"https://patchwork.plctlab.org/api/1.2/patches/40213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfEK_Y1fQVHCZ=RGy3e_O5uYCa4cOhPm9aZGb1Q_9t_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T17:42:19","name":"libbacktrace patch committed: Only test --build-id if supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfEK_Y1fQVHCZ=RGy3e_O5uYCa4cOhPm9aZGb1Q_9t_g@mail.gmail.com/mbox/"},{"id":40217,"url":"https://patchwork.plctlab.org/api/1.2/patches/40217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce46a74e-c892-3d54-1741-9758166eee4b@126.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T18:01:05","name":"Always define `WIN32_LEAN_AND_MEAN` before ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce46a74e-c892-3d54-1741-9758166eee4b@126.com/mbox/"},{"id":40232,"url":"https://patchwork.plctlab.org/api/1.2/patches/40232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c58052a2-2ac8-90de-d6c1-c38cb2f74cd0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-06T19:32:48","name":"[committed] c: C2x semantics for __builtin_tgmath","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c58052a2-2ac8-90de-d6c1-c38cb2f74cd0@codesourcery.com/mbox/"},{"id":40268,"url":"https://patchwork.plctlab.org/api/1.2/patches/40268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212129.397061-1-jwakely@redhat.com/","msgid":"<20230106212129.397061-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T21:21:29","name":"[committed] libstdc++: Refactor time_zone::_Impl::rules_counter [PR108235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212129.397061-1-jwakely@redhat.com/mbox/"},{"id":40269,"url":"https://patchwork.plctlab.org/api/1.2/patches/40269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212135.397113-1-jwakely@redhat.com/","msgid":"<20230106212135.397113-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-06T21:21:35","name":"[committed] libstdc++: Suppress -Waddress warning in tzdb.cc [PR108228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230106212135.397113-1-jwakely@redhat.com/mbox/"},{"id":40270,"url":"https://patchwork.plctlab.org/api/1.2/patches/40270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5zs5l4.fsf@debian/","msgid":"<87wn5zs5l4.fsf@debian>","list_archive_url":null,"date":"2023-01-06T21:42:15","name":"[modula2] PR-108182 gm2 driver mishandles target and multilib options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5zs5l4.fsf@debian/mbox/"},{"id":40301,"url":"https://patchwork.plctlab.org/api/1.2/patches/40301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp/","msgid":"<19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-07T02:55:11","name":"[v2] xtensa: Optimize stack frame adjustment more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19010306-4056-6f84-e555-e744f4f5061e@yahoo.co.jp/mbox/"},{"id":40302,"url":"https://patchwork.plctlab.org/api/1.2/patches/40302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp/","msgid":"<1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-07T02:55:26","name":"xtensa: Optimize bitwise splicing operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e8fab8f-c0bb-dfc6-5533-eba3bde49ea4@yahoo.co.jp/mbox/"},{"id":40362,"url":"https://patchwork.plctlab.org/api/1.2/patches/40362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107105349.92210-1-iain@sandoe.co.uk/","msgid":"<20230107105349.92210-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-07T10:53:49","name":"modula-2, driver: Do not add extra '\''-L'\'' options that shadow $libdir.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107105349.92210-1-iain@sandoe.co.uk/mbox/"},{"id":40381,"url":"https://patchwork.plctlab.org/api/1.2/patches/40381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGA7tdvVLbySE0i=YjV7GT-ArgFyaJAb0-k8XzwNqhowDDZrvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-07T12:01:05","name":"gcc: fix gcc --help -v opertion with linker flags and input files [PR108328]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGA7tdvVLbySE0i=YjV7GT-ArgFyaJAb0-k8XzwNqhowDDZrvw@mail.gmail.com/mbox/"},{"id":40413,"url":"https://patchwork.plctlab.org/api/1.2/patches/40413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107154545.93295-1-iain@sandoe.co.uk/","msgid":"<20230107154545.93295-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-07T15:45:45","name":"modula-2, libm2min: Declare abort and exit as expected.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230107154545.93295-1-iain@sandoe.co.uk/mbox/"},{"id":40414,"url":"https://patchwork.plctlab.org/api/1.2/patches/40414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de/","msgid":"<7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de>","list_archive_url":null,"date":"2023-01-07T15:46:20","name":"[fortran] Fix common subexpression elimination with IEEE rounding (PR108329)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7bd3545a-7b9d-a9b2-6923-0d02df809177@netcologne.de/mbox/"},{"id":40426,"url":"https://patchwork.plctlab.org/api/1.2/patches/40426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fscmckhx.fsf@debian/","msgid":"<87fscmckhx.fsf@debian>","list_archive_url":null,"date":"2023-01-07T17:39:06","name":"[modula2] v2 PR-108182 gm2 driver mishandles target and multilib options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fscmckhx.fsf@debian/mbox/"},{"id":40444,"url":"https://patchwork.plctlab.org/api/1.2/patches/40444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7m9lk+1t6ItwuXB@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-07T18:44:38","name":"[committed] Fix compilation of gcc.dg/atomic/c11-atomic-exec-[45].c on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7m9lk+1t6ItwuXB@mx3210.localdomain/mbox/"},{"id":40446,"url":"https://patchwork.plctlab.org/api/1.2/patches/40446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7nEKiHZJhHBwJMf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-07T19:12:42","name":"c++tools: Fix compilation of server.cc on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7nEKiHZJhHBwJMf@mx3210.localdomain/mbox/"},{"id":40481,"url":"https://patchwork.plctlab.org/api/1.2/patches/40481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1bfa676-c35d-cdea-af7d-95463f1f25a1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-08T05:03:49","name":"[v2] xtensa: Optimize bitwise splicing operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1bfa676-c35d-cdea-af7d-95463f1f25a1@yahoo.co.jp/mbox/"},{"id":40787,"url":"https://patchwork.plctlab.org/api/1.2/patches/40787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vqI9Y4uO500WY1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-09T10:19:15","name":"c++: Only do maybe_init_list_as_range optimization if !processing_template_decl [PR108047]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vqI9Y4uO500WY1@tucnak/mbox/"},{"id":40788,"url":"https://patchwork.plctlab.org/api/1.2/patches/40788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vtQYCoWik3D9Wc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-09T10:32:33","name":"calls: Fix up TYPE_NO_NAMED_ARGS_STDARG_P handling [PR107453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7vtQYCoWik3D9Wc@tucnak/mbox/"},{"id":40792,"url":"https://patchwork.plctlab.org/api/1.2/patches/40792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz/","msgid":"<7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz>","list_archive_url":null,"date":"2023-01-09T10:52:55","name":"hash: do not insert deleted value to a hash_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7cb85a5f-98c7-a398-d7ec-40a170039830@suse.cz/mbox/"},{"id":40798,"url":"https://patchwork.plctlab.org/api/1.2/patches/40798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110844.24C06134AD@imap2.suse-dmz.suse.de/","msgid":"<20230109110844.24C06134AD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T11:08:43","name":"tree-optimization/101912 - testcase for fixed uninit case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110844.24C06134AD@imap2.suse-dmz.suse.de/mbox/"},{"id":40799,"url":"https://patchwork.plctlab.org/api/1.2/patches/40799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110941.9FB86134AD@imap2.suse-dmz.suse.de/","msgid":"<20230109110941.9FB86134AD@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T11:09:41","name":"tree-optimization/107767 - not profitable switch conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109110941.9FB86134AD@imap2.suse-dmz.suse.de/mbox/"},{"id":40820,"url":"https://patchwork.plctlab.org/api/1.2/patches/40820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109123126.2C9BA13583@imap2.suse-dmz.suse.de/","msgid":"<20230109123126.2C9BA13583@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T12:31:25","name":"middle-end/69482 - not preserving volatile accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109123126.2C9BA13583@imap2.suse-dmz.suse.de/mbox/"},{"id":40867,"url":"https://patchwork.plctlab.org/api/1.2/patches/40867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com/","msgid":"<00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T13:29:14","name":"[nvptx] Correct pattern for popcountdi2 insn in nvptx.md.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00b601d9242e$5fe32ec0$1fa98c40$@nextmovesoftware.com/mbox/"},{"id":40888,"url":"https://patchwork.plctlab.org/api/1.2/patches/40888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109140727.78A9C13583@imap2.suse-dmz.suse.de/","msgid":"<20230109140727.78A9C13583@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-09T14:07:27","name":"middle-end/108209 - typo in genmatch.cc:commutative_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109140727.78A9C13583@imap2.suse-dmz.suse.de/mbox/"},{"id":40894,"url":"https://patchwork.plctlab.org/api/1.2/patches/40894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144508.2285330-1-poulhies@adacore.com/","msgid":"<20230109144508.2285330-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-09T14:45:08","name":"[COMMITTED] ada: Simplify finalization of temporaries created for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144508.2285330-1-poulhies@adacore.com/mbox/"},{"id":40895,"url":"https://patchwork.plctlab.org/api/1.2/patches/40895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144525.2286171-1-poulhies@adacore.com/","msgid":"<20230109144525.2286171-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-09T14:45:25","name":"[COMMITTED] ada: Remove a couple of unreachable statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109144525.2286171-1-poulhies@adacore.com/mbox/"},{"id":40911,"url":"https://patchwork.plctlab.org/api/1.2/patches/40911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com/","msgid":"<011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T15:01:10","name":"[x86] PR rtl-optimization/107991: peephole2 to tweak register allocation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/011401d9243b$3782ce10$a6886a30$@nextmovesoftware.com/mbox/"},{"id":41084,"url":"https://patchwork.plctlab.org/api/1.2/patches/41084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com/","msgid":"<004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-01-09T19:49:31","name":"PR rtl-optimization/106421: ICE in bypass_block from non-local goto.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004e01d92463$7eca2700$7c5e7500$@nextmovesoftware.com/mbox/"},{"id":41184,"url":"https://patchwork.plctlab.org/api/1.2/patches/41184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com/","msgid":"<572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com>","list_archive_url":null,"date":"2023-01-09T21:57:16","name":"[committed] c: Check for modifiable static compound literals in inline definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/572c6924-616-997f-c3c1-684f3bf37b59@codesourcery.com/mbox/"},{"id":41190,"url":"https://patchwork.plctlab.org/api/1.2/patches/41190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3209307.aeNJFYEL58@fomalhaut/","msgid":"<3209307.aeNJFYEL58@fomalhaut>","list_archive_url":null,"date":"2023-01-09T22:30:52","name":"Modula-2: fix documentation layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3209307.aeNJFYEL58@fomalhaut/mbox/"},{"id":41191,"url":"https://patchwork.plctlab.org/api/1.2/patches/41191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109223307.144358-1-juzhe.zhong@rivai.ai/","msgid":"<20230109223307.144358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:33:07","name":"RISC-V: Cleanup the codes of bitmap create and free [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109223307.144358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41195,"url":"https://patchwork.plctlab.org/api/1.2/patches/41195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224007.146325-1-juzhe.zhong@rivai.ai/","msgid":"<20230109224007.146325-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:40:07","name":"RISC-V: Avoid redundant flow in forward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224007.146325-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41203,"url":"https://patchwork.plctlab.org/api/1.2/patches/41203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224045.13453-1-david.faust@oracle.com/","msgid":"<20230109224045.13453-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-01-09T22:40:45","name":"bpf: correct bpf_print_operand for floats [PR108293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224045.13453-1-david.faust@oracle.com/mbox/"},{"id":41207,"url":"https://patchwork.plctlab.org/api/1.2/patches/41207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224726.148263-1-juzhe.zhong@rivai.ai/","msgid":"<20230109224726.148263-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:47:26","name":"RISC-V: Refine codes in backward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109224726.148263-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41208,"url":"https://patchwork.plctlab.org/api/1.2/patches/41208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225035.149190-1-juzhe.zhong@rivai.ai/","msgid":"<20230109225035.149190-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:50:35","name":"RISC-V: Avoid redundant flow in backward fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225035.149190-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41210,"url":"https://patchwork.plctlab.org/api/1.2/patches/41210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225643.150853-1-juzhe.zhong@rivai.ai/","msgid":"<20230109225643.150853-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T22:56:43","name":"RISC-V: Rename insn into rinsn for rtx_insn *","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109225643.150853-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41211,"url":"https://patchwork.plctlab.org/api/1.2/patches/41211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231059.154229-1-juzhe.zhong@rivai.ai/","msgid":"<20230109231059.154229-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:10:59","name":"RISC-V: Remove dirty_pat since it is redundant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231059.154229-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41214,"url":"https://patchwork.plctlab.org/api/1.2/patches/41214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231720.155773-1-juzhe.zhong@rivai.ai/","msgid":"<20230109231720.155773-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:17:20","name":"RISC-V: Add probability model of each block to prevent endless loop of Phase 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109231720.155773-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41217,"url":"https://patchwork.plctlab.org/api/1.2/patches/41217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232057.156867-1-juzhe.zhong@rivai.ai/","msgid":"<20230109232057.156867-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:20:57","name":"RISC-V: Call DCE to remove redundant instructions created by the PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232057.156867-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41218,"url":"https://patchwork.plctlab.org/api/1.2/patches/41218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232911.158606-1-juzhe.zhong@rivai.ai/","msgid":"<20230109232911.158606-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:29:11","name":"RISC-V: Fix bugs of supporting AVL=REG (single-real-def) in VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109232911.158606-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41219,"url":"https://patchwork.plctlab.org/api/1.2/patches/41219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233533.160230-1-juzhe.zhong@rivai.ai/","msgid":"<20230109233533.160230-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:35:33","name":"RISC-V: Adjust testcases for AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233533.160230-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41225,"url":"https://patchwork.plctlab.org/api/1.2/patches/41225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233838.161078-1-juzhe.zhong@rivai.ai/","msgid":"<20230109233838.161078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:38:38","name":"RISC-V: Add testcases for AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109233838.161078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41228,"url":"https://patchwork.plctlab.org/api/1.2/patches/41228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109234026.161632-1-juzhe.zhong@rivai.ai/","msgid":"<20230109234026.161632-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-09T23:40:26","name":"RISC-V: Add the rest testcases of AVL=REG support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230109234026.161632-1-juzhe.zhong@rivai.ai/mbox/"},{"id":41253,"url":"https://patchwork.plctlab.org/api/1.2/patches/41253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wzf9ci.fsf@debian/","msgid":"<87h6wzf9ci.fsf@debian>","list_archive_url":null,"date":"2023-01-10T01:48:29","name":"[Modula2] PR-108142 Many empty directories created in the build directory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wzf9ci.fsf@debian/mbox/"},{"id":41280,"url":"https://patchwork.plctlab.org/api/1.2/patches/41280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp/","msgid":"<2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-10T03:34:01","name":"xtensa: Make instruction cost estimation for size more accurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2203c450-66c4-f100-2fc1-ab7e45cc008f@yahoo.co.jp/mbox/"},{"id":41292,"url":"https://patchwork.plctlab.org/api/1.2/patches/41292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7zqJvSj6haMwSMF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-10T04:31:34","name":"More znver4 x86-tune flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7zqJvSj6haMwSMF@kam.mff.cuni.cz/mbox/"},{"id":41368,"url":"https://patchwork.plctlab.org/api/1.2/patches/41368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110090426.11475-1-krebbel@linux.ibm.com/","msgid":"<20230110090426.11475-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-01-10T09:04:26","name":"[Committed] IBM zSystems: Make -fcall-saved-... work.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110090426.11475-1-krebbel@linux.ibm.com/mbox/"},{"id":41382,"url":"https://patchwork.plctlab.org/api/1.2/patches/41382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110094614.0E81A1358A@imap2.suse-dmz.suse.de/","msgid":"<20230110094614.0E81A1358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-10T09:46:13","name":"tree-optimization/108314 - avoid BIT_NOT optimization for extract-last","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110094614.0E81A1358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41384,"url":"https://patchwork.plctlab.org/api/1.2/patches/41384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-1-arsen@aarsen.me/","msgid":"<20230110100305.1420589-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-10T10:03:04","name":"[1/2] libstdc++: Enable string_view in freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-1-arsen@aarsen.me/mbox/"},{"id":41383,"url":"https://patchwork.plctlab.org/api/1.2/patches/41383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-2-arsen@aarsen.me/","msgid":"<20230110100305.1420589-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-10T10:03:05","name":"[2/2] libstdc++: Fix a few !HOSTED test regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110100305.1420589-2-arsen@aarsen.me/mbox/"},{"id":41412,"url":"https://patchwork.plctlab.org/api/1.2/patches/41412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc27fa73-cb20-52f3-11bc-302a33157b34@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T11:35:38","name":"[1/2] OpenMP: Add lang hooks + run-time filled map arrays for Fortran deep mapping of DT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc27fa73-cb20-52f3-11bc-302a33157b34@codesourcery.com/mbox/"},{"id":41418,"url":"https://patchwork.plctlab.org/api/1.2/patches/41418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-1-jwakely@redhat.com/","msgid":"<20230110114657.636853-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:55","name":"[committed,1/3] libstdc++: Fix std::span constraint for sizeof(size_t) < sizeof(int) [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-1-jwakely@redhat.com/mbox/"},{"id":41417,"url":"https://patchwork.plctlab.org/api/1.2/patches/41417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-2-jwakely@redhat.com/","msgid":"<20230110114657.636853-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:56","name":"[committed,2/3] libstdc++: Fix some algos for 16-bit size_t [PR108221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-2-jwakely@redhat.com/mbox/"},{"id":41416,"url":"https://patchwork.plctlab.org/api/1.2/patches/41416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-3-jwakely@redhat.com/","msgid":"<20230110114657.636853-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-10T11:46:57","name":"[committed,3/3] libstdc++: Fix tzdb.cc to compile with -fno-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110114657.636853-3-jwakely@redhat.com/mbox/"},{"id":41451,"url":"https://patchwork.plctlab.org/api/1.2/patches/41451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB541256BD6B9838E4BE055B85ACFF9@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T12:58:59","name":"[v2] libstdc++: Fix Unicode codecvt and add tests [PR86419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB541256BD6B9838E4BE055B85ACFF9@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":41476,"url":"https://patchwork.plctlab.org/api/1.2/patches/41476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110134527.194389-1-guojiufu@linux.ibm.com/","msgid":"<20230110134527.194389-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-01-10T13:45:27","name":"rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110134527.194389-1-guojiufu@linux.ibm.com/mbox/"},{"id":41489,"url":"https://patchwork.plctlab.org/api/1.2/patches/41489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB6507C6E5774C27F424DCB1B7BBFF9@DB9PR08MB6507.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-10T14:07:42","name":"[PING] arm: Split up MVE _Generic associations to prevent type clashes [PR107515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB6507C6E5774C27F424DCB1B7BBFF9@DB9PR08MB6507.eurprd08.prod.outlook.com/mbox/"},{"id":41512,"url":"https://patchwork.plctlab.org/api/1.2/patches/41512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com/","msgid":"<9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com>","list_archive_url":null,"date":"2023-01-10T15:10:42","name":"gcc: emit DW_AT_name for DW_TAG_GNU_formal_parameter_pack [PR70536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9823f46c-0378-44be-8300-8e6752938525@app.fastmail.com/mbox/"},{"id":41532,"url":"https://patchwork.plctlab.org/api/1.2/patches/41532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110155328.5B4AC13338@imap2.suse-dmz.suse.de/","msgid":"<20230110155328.5B4AC13338@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-10T15:53:28","name":"tree-optimization/106293 - missed DSE with virtual LC PHI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110155328.5B4AC13338@imap2.suse-dmz.suse.de/mbox/"},{"id":41603,"url":"https://patchwork.plctlab.org/api/1.2/patches/41603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110191202.8641-1-david.faust@oracle.com/","msgid":"<20230110191202.8641-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-01-10T19:12:02","name":"[v2] bpf: correct bpf_print_operand for floats [PR108293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230110191202.8641-1-david.faust@oracle.com/mbox/"},{"id":41672,"url":"https://patchwork.plctlab.org/api/1.2/patches/41672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a62769c1-9991-4f41-8926-8ee0eb2240bd-1673387787545@3c-app-gmx-bap64/","msgid":"","list_archive_url":null,"date":"2023-01-10T21:56:27","name":"Fortran: frontend passes do_subscript leaks gmp memory [PR97345]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a62769c1-9991-4f41-8926-8ee0eb2240bd-1673387787545@3c-app-gmx-bap64/mbox/"},{"id":41736,"url":"https://patchwork.plctlab.org/api/1.2/patches/41736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp/","msgid":"<076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-11T04:20:42","name":"ifcvt.cc: Prevent excessive if-conversion for conditional moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/076a3744-f608-6f31-7244-2bf7ab06cdb1@yahoo.co.jp/mbox/"},{"id":41776,"url":"https://patchwork.plctlab.org/api/1.2/patches/41776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111070409.4CE071358A@imap2.suse-dmz.suse.de/","msgid":"<20230111070409.4CE071358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T07:04:08","name":"tree-optimization/106293 - fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111070409.4CE071358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41854,"url":"https://patchwork.plctlab.org/api/1.2/patches/41854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y75+1bW680qP7wiD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:18:13","name":"fortran: Fix up function types for realloc and sincos{,f,l} builtins [PR108349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y75+1bW680qP7wiD@tucnak/mbox/"},{"id":41870,"url":"https://patchwork.plctlab.org/api/1.2/patches/41870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y76G9F09l5YV0r4C@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:52:52","name":"c++: Avoid some false positive -Wfloat-conversion warnings with extended precision [PR108285]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y76G9F09l5YV0r4C@tucnak/mbox/"},{"id":41871,"url":"https://patchwork.plctlab.org/api/1.2/patches/41871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0e03173-569f-01f5-c5d4-d81a0a9f5ecd@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:56:28","name":"Resolve bugzilla #108150 and #108192 for mingw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0e03173-569f-01f5-c5d4-d81a0a9f5ecd@gmail.com/mbox/"},{"id":41872,"url":"https://patchwork.plctlab.org/api/1.2/patches/41872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrzgappf3c.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T09:58:47","name":"[10/15,V7] arm: Implement cortex-M return signing address codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/gkrzgappf3c.fsf_-_@arm.com/mbox/"},{"id":41873,"url":"https://patchwork.plctlab.org/api/1.2/patches/41873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2889898.e9J7NaK4W3@fomalhaut/","msgid":"<2889898.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2023-01-11T09:59:39","name":"Fix PR tree-optimization/108199","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2889898.e9J7NaK4W3@fomalhaut/mbox/"},{"id":41882,"url":"https://patchwork.plctlab.org/api/1.2/patches/41882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111102901.15229-1-krebbel@linux.ibm.com/","msgid":"<20230111102901.15229-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T10:29:01","name":"[Committed] IBM zSystems: Use NAND instruction to implement bit not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111102901.15229-1-krebbel@linux.ibm.com/mbox/"},{"id":41883,"url":"https://patchwork.plctlab.org/api/1.2/patches/41883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e291c8-e9e0-eb33-5fa7-8815217e238b@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-11T10:30:51","name":"switch expansion: limit JT growth param values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e291c8-e9e0-eb33-5fa7-8815217e238b@suse.cz/mbox/"},{"id":41890,"url":"https://patchwork.plctlab.org/api/1.2/patches/41890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111105257.05FEB13591@imap2.suse-dmz.suse.de/","msgid":"<20230111105257.05FEB13591@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T10:52:56","name":"tree-optimization/108353 - copyprop iteration order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111105257.05FEB13591@imap2.suse-dmz.suse.de/mbox/"},{"id":41900,"url":"https://patchwork.plctlab.org/api/1.2/patches/41900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcccac99-fd77-9c8e-b1e9-637e01cc4bdd@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-11T11:27:07","name":"[gcc-12,backport] strlen: do not use cond_expr for boundaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcccac99-fd77-9c8e-b1e9-637e01cc4bdd@suse.cz/mbox/"},{"id":41916,"url":"https://patchwork.plctlab.org/api/1.2/patches/41916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0xl2t7.fsf@euler.schwinge.homeip.net/","msgid":"<87tu0xl2t7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:37:40","name":"[PING] nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution (was: [committed][nvptx] Add uniform_warp_check insn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0xl2t7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41920,"url":"https://patchwork.plctlab.org/api/1.2/patches/41920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0w1l2nh.fsf@euler.schwinge.homeip.net/","msgid":"<87r0w1l2nh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:41:06","name":"[PING] Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0w1l2nh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41922,"url":"https://patchwork.plctlab.org/api/1.2/patches/41922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com/","msgid":"<8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-11T11:42:01","name":"[RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f1bbf9d-2dbd-48d8-bb7e-977e7701678e.jinma@linux.alibaba.com/mbox/"},{"id":41930,"url":"https://patchwork.plctlab.org/api/1.2/patches/41930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lem9l2fw.fsf@euler.schwinge.homeip.net/","msgid":"<87lem9l2fw.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:45:39","name":"[PING^3] nvptx: stack size limits are relevant for execution only (was: [PATCH, testsuite] Add effective target stack_size)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lem9l2fw.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41941,"url":"https://patchwork.plctlab.org/api/1.2/patches/41941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wxl2b4.fsf@euler.schwinge.homeip.net/","msgid":"<87h6wxl2b4.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:48:31","name":"[PING^2] nvptx: Support global constructors/destructors via '\''collect2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6wxl2b4.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41944,"url":"https://patchwork.plctlab.org/api/1.2/patches/41944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fschl29n.fsf@euler.schwinge.homeip.net/","msgid":"<87fschl29n.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T11:49:24","name":"[PING] nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fschl29n.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41948,"url":"https://patchwork.plctlab.org/api/1.2/patches/41948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111115854.781A01358A@imap2.suse-dmz.suse.de/","msgid":"<20230111115854.781A01358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-11T11:58:54","name":"tree-optimization/108352 - FSM threads creating irreducible loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111115854.781A01358A@imap2.suse-dmz.suse.de/mbox/"},{"id":41951,"url":"https://patchwork.plctlab.org/api/1.2/patches/41951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz7ll1hh.fsf@euler.schwinge.homeip.net/","msgid":"<87cz7ll1hh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-11T12:06:18","name":"[PING] nvptx: '\''-mframe-malloc-threshold'\'', '\''-Wframe-malloc-threshold'\'' (was: Handling of large stack objects in GPU code generation -- maybe transform into heap allocation?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz7ll1hh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":41973,"url":"https://patchwork.plctlab.org/api/1.2/patches/41973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com/","msgid":"<8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T13:09:37","name":"[committed] rs6000/test: Make ppc-fortran.exp only available for PowerPC target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cfd3eeb-9e68-9fcf-631b-18f2971fd85d@linux.ibm.com/mbox/"},{"id":41979,"url":"https://patchwork.plctlab.org/api/1.2/patches/41979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com/","msgid":"<1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com>","list_archive_url":null,"date":"2023-01-11T13:21:19","name":"rs6000: Imply VSX early to adopt some checkings on conflict [PR108240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com/mbox/"},{"id":42016,"url":"https://patchwork.plctlab.org/api/1.2/patches/42016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-1-christophe.lyon@arm.com/","msgid":"<20230111141806.258233-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-11T14:18:05","name":"[v3,1/2] aarch64: fix warning emission for ABI break since GCC 9.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-1-christophe.lyon@arm.com/mbox/"},{"id":42017,"url":"https://patchwork.plctlab.org/api/1.2/patches/42017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-2-christophe.lyon@arm.com/","msgid":"<20230111141806.258233-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-11T14:18:06","name":"[v3,2/2] aarch64: Fix bit-field alignment in param passing [PR105549]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111141806.258233-2-christophe.lyon@arm.com/mbox/"},{"id":42027,"url":"https://patchwork.plctlab.org/api/1.2/patches/42027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com/","msgid":"<93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com>","list_archive_url":null,"date":"2023-01-11T14:23:57","name":"[1/2,v2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/93eea5fd-25c8-dc11-c49f-4c36bd84eb14@arm.com/mbox/"},{"id":42035,"url":"https://patchwork.plctlab.org/api/1.2/patches/42035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d826d086-fd4b-18a5-3242-c60b086cbcdc@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T14:25:05","name":"[2/2,v2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d826d086-fd4b-18a5-3242-c60b086cbcdc@arm.com/mbox/"},{"id":42124,"url":"https://patchwork.plctlab.org/api/1.2/patches/42124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7742V4Ipt6WxHyb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T17:58:49","name":"c++: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y7742V4Ipt6WxHyb@tucnak/mbox/"},{"id":42127,"url":"https://patchwork.plctlab.org/api/1.2/patches/42127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y776K/eRDes5Z0MD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-11T18:04:27","name":"c: Don'\''t emit DEBUG_BEGIN_STMTs for K&R function argument declarations [PR105972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y776K/eRDes5Z0MD@tucnak/mbox/"},{"id":42126,"url":"https://patchwork.plctlab.org/api/1.2/patches/42126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d5017a-8b63-3103-bad1-528a5b3723c3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-11T18:05:05","name":"[OG12,committed] amdgcn, libgomp: custom USM allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d5017a-8b63-3103-bad1-528a5b3723c3@codesourcery.com/mbox/"},{"id":42204,"url":"https://patchwork.plctlab.org/api/1.2/patches/42204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111213259.258216-1-dmalcolm@redhat.com/","msgid":"<20230111213259.258216-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-11T21:32:59","name":"[committed] analyzer: fix leak false positives on \"*UNKNOWN = PTR; \" [PR108252]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111213259.258216-1-dmalcolm@redhat.com/mbox/"},{"id":42208,"url":"https://patchwork.plctlab.org/api/1.2/patches/42208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111232554.A299633E60@hamza.pair.com/","msgid":"<20230111232554.A299633E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-11T23:25:42","name":"[committed] wwwdocs: gcc-8: Properly spell \"command-line option\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230111232554.A299633E60@hamza.pair.com/mbox/"},{"id":42209,"url":"https://patchwork.plctlab.org/api/1.2/patches/42209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112001012.2D8C933EF6@hamza.pair.com/","msgid":"<20230112001012.2D8C933EF6@hamza.pair.com>","list_archive_url":null,"date":"2023-01-12T00:10:00","name":"[committed] config-list.mk: Remove obsolete FreeBSD targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112001012.2D8C933EF6@hamza.pair.com/mbox/"},{"id":42221,"url":"https://patchwork.plctlab.org/api/1.2/patches/42221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112014440.19153-1-palmer@rivosinc.com/","msgid":"<20230112014440.19153-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-01-12T01:44:40","name":"gimple-fold.h: Add missing gimple-iterator.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112014440.19153-1-palmer@rivosinc.com/mbox/"},{"id":42222,"url":"https://patchwork.plctlab.org/api/1.2/patches/42222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com/","msgid":"<77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T01:56:03","name":"[v2,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a18666-f71d-48e2-a502-a879b3eb6ccf.jinma@linux.alibaba.com/mbox/"},{"id":42251,"url":"https://patchwork.plctlab.org/api/1.2/patches/42251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp/","msgid":"<92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-12T04:25:58","name":"[1/2] xtensa: Tune \"*btrue\" insn pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92692f27-76e3-ce45-bc25-95b9a7d2b64f@yahoo.co.jp/mbox/"},{"id":42252,"url":"https://patchwork.plctlab.org/api/1.2/patches/42252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf7f5873-6959-9ca5-5a2f-83499ac78034@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-12T04:26:42","name":"[2/2] xtensa: Optimize ctzsi2 and ffssi2 a bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf7f5873-6959-9ca5-5a2f-83499ac78034@yahoo.co.jp/mbox/"},{"id":42258,"url":"https://patchwork.plctlab.org/api/1.2/patches/42258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com/","msgid":"<38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T05:34:18","name":"[v3,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38dd7d4f-d522-49af-a56d-cc685eb3c11b.jinma@linux.alibaba.com/mbox/"},{"id":42823,"url":"https://patchwork.plctlab.org/api/1.2/patches/42823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork01sjlmo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-12T06:46:23","name":"[18/18] hash table: enforce testing is_empty before is_deleted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork01sjlmo.fsf@lxoliva.fsfla.org/mbox/"},{"id":42273,"url":"https://patchwork.plctlab.org/api/1.2/patches/42273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112073441.282-1-jinma@linux.alibaba.com/","msgid":"<20230112073441.282-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-12T07:34:41","name":"[v4,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112073441.282-1-jinma@linux.alibaba.com/mbox/"},{"id":42354,"url":"https://patchwork.plctlab.org/api/1.2/patches/42354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com/","msgid":"<6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com>","list_archive_url":null,"date":"2023-01-12T10:22:40","name":"Fortran/OpenMP: Reject non-scalar '\''holds'\'' expr in '\''omp assume(s)'\'' [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6cd99975-646d-a122-d844-c194dce8dbd0@codesourcery.com/mbox/"},{"id":42421,"url":"https://patchwork.plctlab.org/api/1.2/patches/42421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112130359.5F57538543B3@sourceware.org/","msgid":"<20230112130359.5F57538543B3@sourceware.org>","list_archive_url":null,"date":"2023-01-12T13:03:14","name":"tree-optimization/99412 - reassoc and reduction chains","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112130359.5F57538543B3@sourceware.org/mbox/"},{"id":42442,"url":"https://patchwork.plctlab.org/api/1.2/patches/42442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgan6eug.fsf@euler.schwinge.homeip.net/","msgid":"<87zgan6eug.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-12T13:51:19","name":"nvptx: Avoid deadlock in '\''cuStreamAddCallback'\'' callback, error case (was: [PATCH 6/6, OpenACC, libgomp] Async re-work, nvptx changes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zgan6eug.fsf@euler.schwinge.homeip.net/mbox/"},{"id":42780,"url":"https://patchwork.plctlab.org/api/1.2/patches/42780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8BuGyewY8o2YFkR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-12T20:31:23","name":"c, c++, v2: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8BuGyewY8o2YFkR@tucnak/mbox/"},{"id":42806,"url":"https://patchwork.plctlab.org/api/1.2/patches/42806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205845.931635-1-jwakely@redhat.com/","msgid":"<20230112205845.931635-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T20:58:45","name":"[committed] libstdc++: Update shared library version history in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205845.931635-1-jwakely@redhat.com/mbox/"},{"id":42809,"url":"https://patchwork.plctlab.org/api/1.2/patches/42809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205949.932013-1-jwakely@redhat.com/","msgid":"<20230112205949.932013-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T20:59:49","name":"[committed] libstdc++: Extend max_align_t special case to 64-bit HP-UX [PR77691]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112205949.932013-1-jwakely@redhat.com/mbox/"},{"id":42812,"url":"https://patchwork.plctlab.org/api/1.2/patches/42812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112210401.932343-1-jwakely@redhat.com/","msgid":"<20230112210401.932343-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T21:04:01","name":"libstdc++: Make forward to C version if included by C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112210401.932343-1-jwakely@redhat.com/mbox/"},{"id":42822,"url":"https://patchwork.plctlab.org/api/1.2/patches/42822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112211010.932966-1-jwakely@redhat.com/","msgid":"<20230112211010.932966-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-12T21:10:10","name":"libstdc++: Fix unintended layout change to std::basic_filebuf [PR108331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112211010.932966-1-jwakely@redhat.com/mbox/"},{"id":42856,"url":"https://patchwork.plctlab.org/api/1.2/patches/42856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112230406.2023047-2-qing.zhao@oracle.com/","msgid":"<20230112230406.2023047-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-12T23:04:06","name":"[1/1] Replace flag_strict_flex_arrays with DECL_NOT_FLEXARRAY in middle-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230112230406.2023047-2-qing.zhao@oracle.com/mbox/"},{"id":42876,"url":"https://patchwork.plctlab.org/api/1.2/patches/42876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001546.944147-1-jwakely@redhat.com/","msgid":"<20230113001546.944147-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-13T00:15:46","name":"[committed] libstdc++: Do not include in concurrency headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001546.944147-1-jwakely@redhat.com/mbox/"},{"id":42878,"url":"https://patchwork.plctlab.org/api/1.2/patches/42878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001559.944194-1-jwakely@redhat.com/","msgid":"<20230113001559.944194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-13T00:15:59","name":"[committed] libstdc++: Fix exports for IEEE128 versions of __try_use_facet [PR108327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001559.944194-1-jwakely@redhat.com/mbox/"},{"id":42880,"url":"https://patchwork.plctlab.org/api/1.2/patches/42880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001919.87334-1-iain@sandoe.co.uk/","msgid":"<20230113001919.87334-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-13T00:19:19","name":"modula-2: Handle pass '\''-v'\'' option to the compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113001919.87334-1-iain@sandoe.co.uk/mbox/"},{"id":42883,"url":"https://patchwork.plctlab.org/api/1.2/patches/42883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CmpuU+Js7Tlsqz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T00:32:38","name":"c, c++: Allow ignoring -Winit-self through pragmas [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CmpuU+Js7Tlsqz@tucnak/mbox/"},{"id":42884,"url":"https://patchwork.plctlab.org/api/1.2/patches/42884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CndZxq5djLlAB/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T00:36:05","name":"x86: Avoid -Wuninitialized warnings on _mm*_undefined_* in C++ [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8CndZxq5djLlAB/@tucnak/mbox/"},{"id":42909,"url":"https://patchwork.plctlab.org/api/1.2/patches/42909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113032755.3318339-1-chenglulu@loongson.cn/","msgid":"<20230113032755.3318339-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-01-13T03:27:56","name":"[v5] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113032755.3318339-1-chenglulu@loongson.cn/mbox/"},{"id":43052,"url":"https://patchwork.plctlab.org/api/1.2/patches/43052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113075953.34CCB13913@imap2.suse-dmz.suse.de/","msgid":"<20230113075953.34CCB13913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T07:59:52","name":"[1/9] aarch64: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113075953.34CCB13913@imap2.suse-dmz.suse.de/mbox/"},{"id":43054,"url":"https://patchwork.plctlab.org/api/1.2/patches/43054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080003.D7E8713913@imap2.suse-dmz.suse.de/","msgid":"<20230113080003.D7E8713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:03","name":"[2/9] alpha: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080003.D7E8713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43053,"url":"https://patchwork.plctlab.org/api/1.2/patches/43053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080015.6E41613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080015.6E41613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:15","name":"[3/9] arm: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080015.6E41613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43055,"url":"https://patchwork.plctlab.org/api/1.2/patches/43055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080100.2837913913@imap2.suse-dmz.suse.de/","msgid":"<20230113080100.2837913913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:00:59","name":"[4/9] ia64: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080100.2837913913@imap2.suse-dmz.suse.de/mbox/"},{"id":43056,"url":"https://patchwork.plctlab.org/api/1.2/patches/43056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080112.88F1713913@imap2.suse-dmz.suse.de/","msgid":"<20230113080112.88F1713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:12","name":"[5/9] loongarch: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080112.88F1713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43057,"url":"https://patchwork.plctlab.org/api/1.2/patches/43057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080124.46AB613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080124.46AB613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:23","name":"[6/9] mips: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080124.46AB613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43058,"url":"https://patchwork.plctlab.org/api/1.2/patches/43058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080135.43B3813913@imap2.suse-dmz.suse.de/","msgid":"<20230113080135.43B3813913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:34","name":"[7/9] sparc: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080135.43B3813913@imap2.suse-dmz.suse.de/mbox/"},{"id":43059,"url":"https://patchwork.plctlab.org/api/1.2/patches/43059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080146.E61D613913@imap2.suse-dmz.suse.de/","msgid":"<20230113080146.E61D613913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:01:46","name":"[8/9] solaris2: Don'\''t add crtfastmath.o for -shared","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080146.E61D613913@imap2.suse-dmz.suse.de/mbox/"},{"id":43060,"url":"https://patchwork.plctlab.org/api/1.2/patches/43060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080203.73D8113913@imap2.suse-dmz.suse.de/","msgid":"<20230113080203.73D8113913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:02:03","name":"[9/9] Clarify -shared effect on crtfastmath.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113080203.73D8113913@imap2.suse-dmz.suse.de/mbox/"},{"id":43075,"url":"https://patchwork.plctlab.org/api/1.2/patches/43075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113083930.A7C8713913@imap2.suse-dmz.suse.de/","msgid":"<20230113083930.A7C8713913@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T08:39:30","name":"Sync LTO type_for_mode with c-family/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113083930.A7C8713913@imap2.suse-dmz.suse.de/mbox/"},{"id":43100,"url":"https://patchwork.plctlab.org/api/1.2/patches/43100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113091450.72599-1-lehua.ding@rivai.ai/","msgid":"<20230113091450.72599-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-13T09:14:50","name":"[1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113091450.72599-1-lehua.ding@rivai.ai/mbox/"},{"id":43118,"url":"https://patchwork.plctlab.org/api/1.2/patches/43118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094236.77805-1-lehua.ding@rivai.ai/","msgid":"<20230113094236.77805-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-13T09:42:36","name":"[1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094236.77805-1-lehua.ding@rivai.ai/mbox/"},{"id":43121,"url":"https://patchwork.plctlab.org/api/1.2/patches/43121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113094748.F0D891358A@imap2.suse-dmz.suse.de/","msgid":"<20230113094748.F0D891358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-13T09:47:48","name":"tree-optimization/108387 - ICE with VN handling of x << C as x * (1<","list_archive_url":null,"date":"2023-01-13T09:56:51","name":"Don'\''t add crtfastmath.o for -shared.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113095651.1367699-1-hongtao.liu@intel.com/mbox/"},{"id":43128,"url":"https://patchwork.plctlab.org/api/1.2/patches/43128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8ri6u4y1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:03:34","name":"[pushed] aarch64: Don'\''t update EH info when folding [PR107209]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8ri6u4y1.fsf@arm.com/mbox/"},{"id":43129,"url":"https://patchwork.plctlab.org/api/1.2/patches/43129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt358eu4u8.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:05:51","name":"[pushed] aarch64: Fix DWARF frame register sizes for predicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt358eu4u8.fsf_-_@arm.com/mbox/"},{"id":43130,"url":"https://patchwork.plctlab.org/api/1.2/patches/43130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8EvmUH3mP9/B5h4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T10:16:57","name":"[committed] testsuite: Add testcase for PR that went latent in GCC 13 [PR107131]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8EvmUH3mP9/B5h4@tucnak/mbox/"},{"id":43156,"url":"https://patchwork.plctlab.org/api/1.2/patches/43156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4771224.GXAFRqVoOG@fomalhaut/","msgid":"<4771224.GXAFRqVoOG@fomalhaut>","list_archive_url":null,"date":"2023-01-13T10:49:04","name":"Fix PR rtl-optimization/108274","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4771224.GXAFRqVoOG@fomalhaut/mbox/"},{"id":43268,"url":"https://patchwork.plctlab.org/api/1.2/patches/43268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113123805.75201-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113123805.75201-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:38:05","name":"[committed] C-SKY: Add conditions for ceil etc patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113123805.75201-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43272,"url":"https://patchwork.plctlab.org/api/1.2/patches/43272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124211.75278-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124211.75278-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:11","name":"[committed] C-SKY: Skip other CPUs if the testcases are only for ck801.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124211.75278-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43273,"url":"https://patchwork.plctlab.org/api/1.2/patches/43273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124223.75333-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124223.75333-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:23","name":"[committed] C-SKY: Fix patterns'\'' condition for ck802 smart mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124223.75333-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43276,"url":"https://patchwork.plctlab.org/api/1.2/patches/43276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124234.75388-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124234.75388-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:34","name":"[committed] C-SKY: Add missing builtin defines for soft float abi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124234.75388-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43280,"url":"https://patchwork.plctlab.org/api/1.2/patches/43280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124247.75440-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124247.75440-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:42:47","name":"[committed] C-SKY: Fix skip codition for testcase ldbs.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124247.75440-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43275,"url":"https://patchwork.plctlab.org/api/1.2/patches/43275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124302.75492-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124302.75492-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:43:02","name":"[committed] C-SKY: Fix float abi option in MULTILIB_DEFAULTS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124302.75492-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43274,"url":"https://patchwork.plctlab.org/api/1.2/patches/43274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124319.75544-1-cooper.qu@linux.alibaba.com/","msgid":"<20230113124319.75544-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-13T12:43:19","name":"[committed] C-SKY: Define SYSROOT_SUFFIX_SPEC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113124319.75544-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43387,"url":"https://patchwork.plctlab.org/api/1.2/patches/43387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com/","msgid":"<5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-13T15:40:15","name":"[Committed] arm: Add cde feature support for Cortex-M55 CPU.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c3123b6-11d4-4c9b-90ed-20ca1b81d96a@AZ-NEU-EX04.Arm.com/mbox/"},{"id":43428,"url":"https://patchwork.plctlab.org/api/1.2/patches/43428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GJazeTmfv+2xgb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T16:40:11","name":"[committed] testsuite: Add another testcase from PR107131","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GJazeTmfv+2xgb@tucnak/mbox/"},{"id":43500,"url":"https://patchwork.plctlab.org/api/1.2/patches/43500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GY0+AOA8qXDm8h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-13T17:45:55","name":"c, c++, v3: Avoid incorrect shortening of divisions [PR108365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8GY0+AOA8qXDm8h@tucnak/mbox/"},{"id":43511,"url":"https://patchwork.plctlab.org/api/1.2/patches/43511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113175428.1771219-1-stefansf@linux.ibm.com/","msgid":"<20230113175428.1771219-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-01-13T17:54:29","name":"IBM zSystems: Fix TARGET_D_CPU_VERSIONS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113175428.1771219-1-stefansf@linux.ibm.com/mbox/"},{"id":43540,"url":"https://patchwork.plctlab.org/api/1.2/patches/43540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru/","msgid":"<0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru>","list_archive_url":null,"date":"2023-01-13T18:20:12","name":"sched-deps: do not schedule pseudos across calls [PR108117]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cc6e188-c64c-e8ea-83e4-1d06f5bf4f55@ispras.ru/mbox/"},{"id":43560,"url":"https://patchwork.plctlab.org/api/1.2/patches/43560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Gzh4bMh3n/RVyo@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-01-13T19:39:51","name":"[committed] hppa: Fix support for atomic loads and stores on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Gzh4bMh3n/RVyo@mx3210.localdomain/mbox/"},{"id":43613,"url":"https://patchwork.plctlab.org/api/1.2/patches/43613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2211088.iZASKD2KPV@fomalhaut/","msgid":"<2211088.iZASKD2KPV@fomalhaut>","list_archive_url":null,"date":"2023-01-13T21:16:02","name":"[c-family] Small fix for -fdump-ada-spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2211088.iZASKD2KPV@fomalhaut/mbox/"},{"id":43616,"url":"https://patchwork.plctlab.org/api/1.2/patches/43616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com/","msgid":"<3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com>","list_archive_url":null,"date":"2023-01-13T21:23:20","name":"PR tree-optimization/108359 - Utilize op1 == op2 when invoking range-ops folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3815f4c2-7a8d-c662-54d8-eac1ab315fbb@redhat.com/mbox/"},{"id":43644,"url":"https://patchwork.plctlab.org/api/1.2/patches/43644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113225428.380307-1-dmalcolm@redhat.com/","msgid":"<20230113225428.380307-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-13T22:54:28","name":"[committed] analyzer: add heuristics for switch on enum type [PR105273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230113225428.380307-1-dmalcolm@redhat.com/mbox/"},{"id":43649,"url":"https://patchwork.plctlab.org/api/1.2/patches/43649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8HnvoRv09X8izTQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-13T23:22:38","name":"[v4] c++: Reject UDLs in certain contexts [PR105300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8HnvoRv09X8izTQ@redhat.com/mbox/"},{"id":43696,"url":"https://patchwork.plctlab.org/api/1.2/patches/43696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp/","msgid":"<0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-14T05:03:55","name":"xtensa: Remove old broken tweak for leaf function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0707a800-d409-2264-d2a5-21f43ebeaf6f@yahoo.co.jp/mbox/"},{"id":43745,"url":"https://patchwork.plctlab.org/api/1.2/patches/43745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114105046.35020-1-iain@sandoe.co.uk/","msgid":"<20230114105046.35020-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-14T10:50:46","name":"modula-2: Fix stack size request in initPreemptive [PR108405]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114105046.35020-1-iain@sandoe.co.uk/mbox/"},{"id":43747,"url":"https://patchwork.plctlab.org/api/1.2/patches/43747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz7hxsqf.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-14T11:26:00","name":"[PR106746] drop cselib addr lookup in debug insn mem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz7hxsqf.fsf@lxoliva.fsfla.org/mbox/"},{"id":43781,"url":"https://patchwork.plctlab.org/api/1.2/patches/43781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114170035.1238643-1-jwakely@redhat.com/","msgid":"<20230114170035.1238643-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T17:00:35","name":"[committed] libstdc++: Fix ostream insertion operators for calendar types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114170035.1238643-1-jwakely@redhat.com/mbox/"},{"id":43787,"url":"https://patchwork.plctlab.org/api/1.2/patches/43787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b18279769199fe5019effd045d7999e2992996ad.1673721922.git.lhyatt@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-14T18:46:24","name":"libcpp: Fix ICE on directive inside _Pragma() operator [PR67046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b18279769199fe5019effd045d7999e2992996ad.1673721922.git.lhyatt@gmail.com/mbox/"},{"id":43793,"url":"https://patchwork.plctlab.org/api/1.2/patches/43793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114203945.1282157-1-jwakely@redhat.com/","msgid":"<20230114203945.1282157-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T20:39:45","name":"libatomic: Use config/mingw/lock.c for --enable-threads=single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114203945.1282157-1-jwakely@redhat.com/mbox/"},{"id":43799,"url":"https://patchwork.plctlab.org/api/1.2/patches/43799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114215953.1299851-1-jwakely@redhat.com/","msgid":"<20230114215953.1299851-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-14T21:59:53","name":"[committed] libstdc++: Implement std::chrono::current_zone() for AIX [PR108409]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230114215953.1299851-1-jwakely@redhat.com/mbox/"},{"id":43806,"url":"https://patchwork.plctlab.org/api/1.2/patches/43806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115023207.88481-1-cooper.qu@linux.alibaba.com/","msgid":"<20230115023207.88481-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-15T02:32:07","name":"[COMMITTED] C-SKY: Support --with-float=softfp in configuration.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115023207.88481-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":43808,"url":"https://patchwork.plctlab.org/api/1.2/patches/43808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115055842.3965247-1-pefoley2@pefoley.com/","msgid":"<20230115055842.3965247-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-15T05:58:42","name":"configure: Only create serdep.tmp if needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115055842.3965247-1-pefoley2@pefoley.com/mbox/"},{"id":43824,"url":"https://patchwork.plctlab.org/api/1.2/patches/43824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115102738.19101-1-aldyh@redhat.com/","msgid":"<20230115102738.19101-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-01-15T10:27:38","name":"[PR107608,range-ops] Avoid folding into INF when flag_trapping_math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115102738.19101-1-aldyh@redhat.com/mbox/"},{"id":43825,"url":"https://patchwork.plctlab.org/api/1.2/patches/43825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115103227.19393-1-aldyh@redhat.com/","msgid":"<20230115103227.19393-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-01-15T10:32:27","name":"[PR107608,range-ops] Avoid folding into INF when flag_trapping_math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115103227.19393-1-aldyh@redhat.com/mbox/"},{"id":43847,"url":"https://patchwork.plctlab.org/api/1.2/patches/43847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115124544.1338953-1-jwakely@redhat.com/","msgid":"<20230115124544.1338953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T12:45:44","name":"[committed] libstdc++: Fix narrowing conversion in std/time/clock/utc/io.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115124544.1338953-1-jwakely@redhat.com/mbox/"},{"id":43852,"url":"https://patchwork.plctlab.org/api/1.2/patches/43852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115134735.62D2E33E70@hamza.pair.com/","msgid":"<20230115134735.62D2E33E70@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T13:47:20","name":"[committed] config-list.mk: Modernize FreeBSD targets towards version 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115134735.62D2E33E70@hamza.pair.com/mbox/"},{"id":43853,"url":"https://patchwork.plctlab.org/api/1.2/patches/43853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115135122.1345194-1-jwakely@redhat.com/","msgid":"<20230115135122.1345194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T13:51:22","name":"[committed] libstdc++: Remove unconditional -pthread from test options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115135122.1345194-1-jwakely@redhat.com/mbox/"},{"id":43875,"url":"https://patchwork.plctlab.org/api/1.2/patches/43875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115164703.1354873-1-jwakely@redhat.com/","msgid":"<20230115164703.1354873-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-15T16:47:03","name":"[committed] libstdc++: Remove dg-xfail-run-if in std/time/tzdb_list/1.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115164703.1354873-1-jwakely@redhat.com/mbox/"},{"id":43902,"url":"https://patchwork.plctlab.org/api/1.2/patches/43902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115212759.43AEF33E59@hamza.pair.com/","msgid":"<20230115212759.43AEF33E59@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T21:27:43","name":"[committed] wwwdocs: faq: Move c-faq.com to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115212759.43AEF33E59@hamza.pair.com/mbox/"},{"id":43903,"url":"https://patchwork.plctlab.org/api/1.2/patches/43903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115213754.0432533E56@hamza.pair.com/","msgid":"<20230115213754.0432533E56@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T21:37:38","name":"[committed] wwwdocs: gcc-4.5: Convert www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115213754.0432533E56@hamza.pair.com/mbox/"},{"id":43905,"url":"https://patchwork.plctlab.org/api/1.2/patches/43905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221511.5EF7A33E24@hamza.pair.com/","msgid":"<20230115221511.5EF7A33E24@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T22:14:55","name":"[committed] wwwdocs: codingconventions: Adjust Intel BID library link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221511.5EF7A33E24@hamza.pair.com/mbox/"},{"id":43907,"url":"https://patchwork.plctlab.org/api/1.2/patches/43907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221707.EFEEC33E24@hamza.pair.com/","msgid":"<20230115221707.EFEEC33E24@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T22:16:52","name":"[committed] wwwdocs: gcc-3.4: Switch www.eclipse.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115221707.EFEEC33E24@hamza.pair.com/mbox/"},{"id":43911,"url":"https://patchwork.plctlab.org/api/1.2/patches/43911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115231619.CA29E33E13@hamza.pair.com/","msgid":"<20230115231619.CA29E33E13@hamza.pair.com>","list_archive_url":null,"date":"2023-01-15T23:16:03","name":"[committed] libstdc++: Move www.open-std.org in status part of manual to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230115231619.CA29E33E13@hamza.pair.com/mbox/"},{"id":43930,"url":"https://patchwork.plctlab.org/api/1.2/patches/43930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3e65485-20e4-9513-3bc5-a6f964fc99b7@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-16T02:52:55","name":"xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3e65485-20e4-9513-3bc5-a6f964fc99b7@yahoo.co.jp/mbox/"},{"id":43995,"url":"https://patchwork.plctlab.org/api/1.2/patches/43995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116071148.427-1-tejas.belagod@arm.com/","msgid":"<20230116071148.427-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-01-16T07:11:48","name":"AArch64: Gate various crypto intrinsics availability based on features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116071148.427-1-tejas.belagod@arm.com/mbox/"},{"id":44008,"url":"https://patchwork.plctlab.org/api/1.2/patches/44008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116075129.A633D33E4B@hamza.pair.com/","msgid":"<20230116075129.A633D33E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T07:51:10","name":"[committed] wwwdocs: projects/cfg: Update reference to paper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116075129.A633D33E4B@hamza.pair.com/mbox/"},{"id":44024,"url":"https://patchwork.plctlab.org/api/1.2/patches/44024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com/","msgid":"<1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T08:33:36","name":"rs6000: Teach rs6000_opaque_type_invalid_use_p about gcall [PR108348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ea87e1b-7caf-59dd-ff1a-8f282a2dae14@linux.ibm.com/mbox/"},{"id":44031,"url":"https://patchwork.plctlab.org/api/1.2/patches/44031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9230de2-d3d3-c960-f39a-4f81b6a094bc@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-16T09:08:02","name":"[v2] rs6000: Don'\''t use optimize_function_for_speed_p too early [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9230de2-d3d3-c960-f39a-4f81b6a094bc@linux.ibm.com/mbox/"},{"id":44040,"url":"https://patchwork.plctlab.org/api/1.2/patches/44040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com/","msgid":"<6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T09:39:04","name":"[PATCH/RFC] rs6000: Remove optimize_for_speed check for implicit TARGET_SAVE_TOC_INDIRECT [PR108184]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6305f0e5-d235-8916-6d42-7110cfede236@linux.ibm.com/mbox/"},{"id":44048,"url":"https://patchwork.plctlab.org/api/1.2/patches/44048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UfdUzj63BuX6oj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T09:57:09","name":"contrib: Partial fix for failed update-copyright --this year [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UfdUzj63BuX6oj@tucnak/mbox/"},{"id":44065,"url":"https://patchwork.plctlab.org/api/1.2/patches/44065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UmRw0SIp0yEk26@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T10:26:15","name":"[committed] riscv: Fix up Copyright lines [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8UmRw0SIp0yEk26@tucnak/mbox/"},{"id":44066,"url":"https://patchwork.plctlab.org/api/1.2/patches/44066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116102949.10821-1-jwakely@redhat.com/","msgid":"<20230116102949.10821-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:29:49","name":"[committed] doc: Fix grammar typo in description of malloc attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116102949.10821-1-jwakely@redhat.com/mbox/"},{"id":44068,"url":"https://patchwork.plctlab.org/api/1.2/patches/44068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116103316.11780-1-jwakely@redhat.com/","msgid":"<20230116103316.11780-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:33:16","name":"[committed] libstdc++: Fix copyright notice to use usual form [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116103316.11780-1-jwakely@redhat.com/mbox/"},{"id":44071,"url":"https://patchwork.plctlab.org/api/1.2/patches/44071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Up3AJNfDcwsOzx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-16T10:41:32","name":"[committed] contrib: Yet another update-copyright.py tweak [PR108413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8Up3AJNfDcwsOzx@tucnak/mbox/"},{"id":44081,"url":"https://patchwork.plctlab.org/api/1.2/patches/44081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116105001.13048-1-jwakely@redhat.com/","msgid":"<20230116105001.13048-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T10:50:01","name":"[wwwdocs] Document new libstdc++ header dependency changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116105001.13048-1-jwakely@redhat.com/mbox/"},{"id":44121,"url":"https://patchwork.plctlab.org/api/1.2/patches/44121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com/","msgid":"<33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com>","list_archive_url":null,"date":"2023-01-16T13:07:43","name":"rs6000: Fix typo on vec_vsubcuq in rs6000-overload.def [PR108396]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33b5e2be-3849-4f0d-9dcc-ea836baf4ca7@linux.ibm.com/mbox/"},{"id":44175,"url":"https://patchwork.plctlab.org/api/1.2/patches/44175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aac9d189027b7e12c365f49e7148a3d7@autistici.org/","msgid":"","list_archive_url":null,"date":"2023-01-16T14:08:56","name":"lrealpath() patch to fix symlinks resolution for win32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aac9d189027b7e12c365f49e7148a3d7@autistici.org/mbox/"},{"id":44184,"url":"https://patchwork.plctlab.org/api/1.2/patches/44184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144832.3171227-1-poulhies@adacore.com/","msgid":"<20230116144832.3171227-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:32","name":"[COMMITTED] ada: Optimize interface objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144832.3171227-1-poulhies@adacore.com/mbox/"},{"id":44185,"url":"https://patchwork.plctlab.org/api/1.2/patches/44185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144841.3171334-1-poulhies@adacore.com/","msgid":"<20230116144841.3171334-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:41","name":"[COMMITTED] ada: Lift restriction on optimization of aliased objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144841.3171334-1-poulhies@adacore.com/mbox/"},{"id":44189,"url":"https://patchwork.plctlab.org/api/1.2/patches/44189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144848.3171399-1-poulhies@adacore.com/","msgid":"<20230116144848.3171399-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:48","name":"[COMMITTED] ada: Put back conversion to interface in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144848.3171399-1-poulhies@adacore.com/mbox/"},{"id":44188,"url":"https://patchwork.plctlab.org/api/1.2/patches/44188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144853.3171463-1-poulhies@adacore.com/","msgid":"<20230116144853.3171463-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:48:53","name":"[COMMITTED] ada: Further optimize interface objects initialized with function calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144853.3171463-1-poulhies@adacore.com/mbox/"},{"id":44186,"url":"https://patchwork.plctlab.org/api/1.2/patches/44186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144900.3171529-1-poulhies@adacore.com/","msgid":"<20230116144900.3171529-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:00","name":"[COMMITTED] ada: Fix premature finalization of temporaries for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144900.3171529-1-poulhies@adacore.com/mbox/"},{"id":44191,"url":"https://patchwork.plctlab.org/api/1.2/patches/44191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144906.3171599-1-poulhies@adacore.com/","msgid":"<20230116144906.3171599-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:06","name":"[COMMITTED] ada: Fix benign pasto in new predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144906.3171599-1-poulhies@adacore.com/mbox/"},{"id":44187,"url":"https://patchwork.plctlab.org/api/1.2/patches/44187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144911.3171666-1-poulhies@adacore.com/","msgid":"<20230116144911.3171666-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:11","name":"[COMMITTED] ada: Use static references to tag in more cases for interface objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144911.3171666-1-poulhies@adacore.com/mbox/"},{"id":44196,"url":"https://patchwork.plctlab.org/api/1.2/patches/44196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144916.3171732-1-poulhies@adacore.com/","msgid":"<20230116144916.3171732-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:16","name":"[COMMITTED] ada: Fix pessimization of some CW objects initialized with function call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144916.3171732-1-poulhies@adacore.com/mbox/"},{"id":44202,"url":"https://patchwork.plctlab.org/api/1.2/patches/44202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144923.3171796-1-poulhies@adacore.com/","msgid":"<20230116144923.3171796-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:23","name":"[COMMITTED] ada: Fix latent bug exposed by recent work on extended return statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144923.3171796-1-poulhies@adacore.com/mbox/"},{"id":44204,"url":"https://patchwork.plctlab.org/api/1.2/patches/44204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144928.3171863-1-poulhies@adacore.com/","msgid":"<20230116144928.3171863-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:28","name":"[COMMITTED] ada: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144928.3171863-1-poulhies@adacore.com/mbox/"},{"id":44197,"url":"https://patchwork.plctlab.org/api/1.2/patches/44197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144936.3171936-1-poulhies@adacore.com/","msgid":"<20230116144936.3171936-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-01-16T14:49:36","name":"[COMMITTED] ada: Update copyright years.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116144936.3171936-1-poulhies@adacore.com/mbox/"},{"id":44247,"url":"https://patchwork.plctlab.org/api/1.2/patches/44247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116161002.40093-1-jwakely@redhat.com/","msgid":"<20230116161002.40093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-16T16:10:02","name":"[committed] libstdc++: Fix --with-default-libstdcxx-abi=gcc4-compatible build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116161002.40093-1-jwakely@redhat.com/mbox/"},{"id":44274,"url":"https://patchwork.plctlab.org/api/1.2/patches/44274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8WG3g+bAIynpiHC@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-01-16T17:18:22","name":"Fix wrong code issues with ipa-sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8WG3g+bAIynpiHC@kam.mff.cuni.cz/mbox/"},{"id":44289,"url":"https://patchwork.plctlab.org/api/1.2/patches/44289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185633.159901-1-hjl.tools@gmail.com/","msgid":"<20230116185633.159901-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-16T18:56:33","name":"x86: Disable -mforce-indirect-call for PIC in 32-bit mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185633.159901-1-hjl.tools@gmail.com/mbox/"},{"id":44290,"url":"https://patchwork.plctlab.org/api/1.2/patches/44290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185944.4BF8233F26@hamza.pair.com/","msgid":"<20230116185944.4BF8233F26@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T18:59:25","name":"[committed] wwwdocs: git: Remove trailing slash from tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116185944.4BF8233F26@hamza.pair.com/mbox/"},{"id":44295,"url":"https://patchwork.plctlab.org/api/1.2/patches/44295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116192915.7C8DF33F27@hamza.pair.com/","msgid":"<20230116192915.7C8DF33F27@hamza.pair.com>","list_archive_url":null,"date":"2023-01-16T19:28:56","name":"[committed] wwwdocs: readings: Move www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116192915.7C8DF33F27@hamza.pair.com/mbox/"},{"id":44308,"url":"https://patchwork.plctlab.org/api/1.2/patches/44308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1a5ca55f-e1cb-417f-9f67-59b39c16bc64-1673901535696@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-01-16T20:38:55","name":"Fortran: fix ICE in get_expr_storage_size [PR108421]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1a5ca55f-e1cb-417f-9f67-59b39c16bc64-1673901535696@3c-app-gmx-bs50/mbox/"},{"id":44321,"url":"https://patchwork.plctlab.org/api/1.2/patches/44321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9ff539aa-079f-42e1-9456-a47833bc44a8-1673903509644@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-01-16T21:11:49","name":"Fortran: fix ICE in check_charlen_present [PR108420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9ff539aa-079f-42e1-9456-a47833bc44a8-1673903509644@3c-app-gmx-bs50/mbox/"},{"id":44399,"url":"https://patchwork.plctlab.org/api/1.2/patches/44399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116235816.658483-1-apinski@marvell.com/","msgid":"<20230116235816.658483-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-01-16T23:58:16","name":"[COMMITTED] Remove reference to Solaris 9 in comment of add_options_for_tls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230116235816.658483-1-apinski@marvell.com/mbox/"},{"id":44401,"url":"https://patchwork.plctlab.org/api/1.2/patches/44401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117011203.3342271-1-pefoley2@pefoley.com/","msgid":"<20230117011203.3342271-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-17T01:12:03","name":"[v2] configure: Only create serdep.tmp if needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117011203.3342271-1-pefoley2@pefoley.com/mbox/"},{"id":44402,"url":"https://patchwork.plctlab.org/api/1.2/patches/44402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117012518.3382059-1-pefoley2@pefoley.com/","msgid":"<20230117012518.3382059-1-pefoley2@pefoley.com>","list_archive_url":null,"date":"2023-01-17T01:25:18","name":"ada: Respect GNATMAKE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117012518.3382059-1-pefoley2@pefoley.com/mbox/"},{"id":44485,"url":"https://patchwork.plctlab.org/api/1.2/patches/44485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp/","msgid":"<70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-17T04:12:50","name":"[v2] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70bdc2f9-f0ae-cca7-0910-859cacbf5eae@yahoo.co.jp/mbox/"},{"id":44492,"url":"https://patchwork.plctlab.org/api/1.2/patches/44492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aba72208-c9b6-0d9e-918d-4b7e402b634b@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-17T04:54:44","name":"xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aba72208-c9b6-0d9e-918d-4b7e402b634b@yahoo.co.jp/mbox/"},{"id":44561,"url":"https://patchwork.plctlab.org/api/1.2/patches/44561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilh58rnd.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-17T08:57:42","name":"libsanitizer: Fix asan SEGVs with gld on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddilh58rnd.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":44613,"url":"https://patchwork.plctlab.org/api/1.2/patches/44613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8ZuxWBRYJgTleuS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-17T09:47:49","name":"forwprop: Fix up rotate pattern matching [PR106523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8ZuxWBRYJgTleuS@tucnak/mbox/"},{"id":44620,"url":"https://patchwork.plctlab.org/api/1.2/patches/44620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de/","msgid":"<20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-17T10:13:19","name":"middle-end/106075 - non-call EH and DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117101319.BD5DD139C6@imap2.suse-dmz.suse.de/mbox/"},{"id":44638,"url":"https://patchwork.plctlab.org/api/1.2/patches/44638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=J8Vye=RPBw1sWQnUzxfC1C2UPT_vc+_jmXOeYJG-YGQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T10:46:45","name":"[aarch64] Use wzr/xzr for assigning vector element to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=J8Vye=RPBw1sWQnUzxfC1C2UPT_vc+_jmXOeYJG-YGQ@mail.gmail.com/mbox/"},{"id":44643,"url":"https://patchwork.plctlab.org/api/1.2/patches/44643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dea53b40-6611-08a5-7bc3-2ce21b1bd6fb@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-17T11:20:14","name":"[(pushed)] Regenerate Makefile.in files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dea53b40-6611-08a5-7bc3-2ce21b1bd6fb@suse.cz/mbox/"},{"id":44647,"url":"https://patchwork.plctlab.org/api/1.2/patches/44647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz/","msgid":"<609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz>","list_archive_url":null,"date":"2023-01-17T11:56:32","name":"[(pushed)] contrib: revert removal of CR character","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/609b96b0-cee7-fd04-2795-ec16cd559a65@suse.cz/mbox/"},{"id":44648,"url":"https://patchwork.plctlab.org/api/1.2/patches/44648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d15fec2f-b7aa-2830-089a-62c0fd0b66d9@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-17T12:00:35","name":"contrib: ignore CR in update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d15fec2f-b7aa-2830-089a-62c0fd0b66d9@suse.cz/mbox/"},{"id":44659,"url":"https://patchwork.plctlab.org/api/1.2/patches/44659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz/","msgid":"<553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz>","list_archive_url":null,"date":"2023-01-17T13:02:42","name":"[(pushed)] Ignore test_patches.txt in update-copyright.py.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/553d135a-9ad1-d7c5-4d14-98f7e7e34a58@suse.cz/mbox/"},{"id":44683,"url":"https://patchwork.plctlab.org/api/1.2/patches/44683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117141840.172815-1-jwakely@redhat.com/","msgid":"<20230117141840.172815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-17T14:18:40","name":"[committed] libstdc++: Fix configuration of default zoneinfo dir on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117141840.172815-1-jwakely@redhat.com/mbox/"},{"id":44716,"url":"https://patchwork.plctlab.org/api/1.2/patches/44716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com/","msgid":"<18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com>","list_archive_url":null,"date":"2023-01-17T15:35:45","name":"[RFC] tree-optimization: fix optimize-out variables passed into func to alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18ac74c8afb663aa0dc2503a571d0d17ebb2e759.camel@espressif.com/mbox/"},{"id":44726,"url":"https://patchwork.plctlab.org/api/1.2/patches/44726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117162508.74789-1-jose.marchesi@oracle.com/","msgid":"<20230117162508.74789-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-01-17T16:25:08","name":"[COMMITTED] bpf: disable -fstack-protector in BPF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117162508.74789-1-jose.marchesi@oracle.com/mbox/"},{"id":44742,"url":"https://patchwork.plctlab.org/api/1.2/patches/44742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170431.52986-1-iain@sandoe.co.uk/","msgid":"<20230117170431.52986-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-17T17:04:31","name":"modula-2, driver, Front end: Revise handling of I and L paths [PR108182].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170431.52986-1-iain@sandoe.co.uk/mbox/"},{"id":44745,"url":"https://patchwork.plctlab.org/api/1.2/patches/44745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWc4b_LdY2hUaFdqSXXSfCm95ujA0qft8wcBb4fxRSM9g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T17:05:42","name":"Go patch committed: Define builtin functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWc4b_LdY2hUaFdqSXXSfCm95ujA0qft8wcBb4fxRSM9g@mail.gmail.com/mbox/"},{"id":44748,"url":"https://patchwork.plctlab.org/api/1.2/patches/44748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170655.53157-1-iain@sandoe.co.uk/","msgid":"<20230117170655.53157-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-17T17:06:55","name":"modula-2, testsuite: Make libs and interfaces consistent.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117170655.53157-1-iain@sandoe.co.uk/mbox/"},{"id":44800,"url":"https://patchwork.plctlab.org/api/1.2/patches/44800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB5412605A8D2993AFD96B036BACC69@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-01-17T21:12:12","name":"libstdc++: testsuite: Simplify codecvt_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB5412605A8D2993AFD96B036BACC69@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":44801,"url":"https://patchwork.plctlab.org/api/1.2/patches/44801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211313.D71DC33F99@hamza.pair.com/","msgid":"<20230117211313.D71DC33F99@hamza.pair.com>","list_archive_url":null,"date":"2023-01-17T21:12:54","name":"[committed] wwwdocs: rsync: Remove trailing slash from tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211313.D71DC33F99@hamza.pair.com/mbox/"},{"id":44802,"url":"https://patchwork.plctlab.org/api/1.2/patches/44802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211921.5A75C33FA8@hamza.pair.com/","msgid":"<20230117211921.5A75C33FA8@hamza.pair.com>","list_archive_url":null,"date":"2023-01-17T21:19:02","name":"[committed] wwwdocs: gcc-4.7: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117211921.5A75C33FA8@hamza.pair.com/mbox/"},{"id":44828,"url":"https://patchwork.plctlab.org/api/1.2/patches/44828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117225908.1604948-1-vineetg@rivosinc.com/","msgid":"<20230117225908.1604948-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-01-17T22:59:08","name":"riscv: generate builtin macro for compilation with strict alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230117225908.1604948-1-vineetg@rivosinc.com/mbox/"},{"id":44933,"url":"https://patchwork.plctlab.org/api/1.2/patches/44933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118024415.64340-1-juzhe.zhong@rivai.ai/","msgid":"<20230118024415.64340-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:44:15","name":"RISC-V: Fix incorrect attributes of vsetvl instructions pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118024415.64340-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44934,"url":"https://patchwork.plctlab.org/api/1.2/patches/44934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025014.65261-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025014.65261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:50:14","name":"RISC-V: Change VSETVL PASS always call split_all_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025014.65261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44935,"url":"https://patchwork.plctlab.org/api/1.2/patches/44935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025341.66033-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025341.66033-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:53:41","name":"RISC-V: Remove DCE in VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025341.66033-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44939,"url":"https://patchwork.plctlab.org/api/1.2/patches/44939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025832.66827-1-juzhe.zhong@rivai.ai/","msgid":"<20230118025832.66827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T02:58:32","name":"RISC-V: Clang-format some annotations[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118025832.66827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44940,"url":"https://patchwork.plctlab.org/api/1.2/patches/44940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030347.68061-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030347.68061-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:03:47","name":"RISC-V: Reorder VSETVL PASS location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030347.68061-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44943,"url":"https://patchwork.plctlab.org/api/1.2/patches/44943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030654.4083983-1-chenglulu@loongson.cn/","msgid":"<20230118030654.4083983-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-01-18T03:06:56","name":"[v6] LoongArch: Fixed a compilation failure with '\''%c'\'' in inline assembly [PR107731].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030654.4083983-1-chenglulu@loongson.cn/mbox/"},{"id":44941,"url":"https://patchwork.plctlab.org/api/1.2/patches/44941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030659.68604-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030659.68604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:06:59","name":"RISC-V: Change parse_insn into public for future use.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030659.68604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44942,"url":"https://patchwork.plctlab.org/api/1.2/patches/44942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030921.69098-1-juzhe.zhong@rivai.ai/","msgid":"<20230118030921.69098-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:09:21","name":"RISC-V: Fix bug of before_p function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118030921.69098-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44944,"url":"https://patchwork.plctlab.org/api/1.2/patches/44944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031305.69740-1-juzhe.zhong@rivai.ai/","msgid":"<20230118031305.69740-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:13:05","name":"RISC-V: Refine function args of some functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031305.69740-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44945,"url":"https://patchwork.plctlab.org/api/1.2/patches/44945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031650.70285-1-juzhe.zhong@rivai.ai/","msgid":"<20230118031650.70285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:16:50","name":"RISC-V: Add :: for static function calling to avoid confusing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118031650.70285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44949,"url":"https://patchwork.plctlab.org/api/1.2/patches/44949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032434.71273-1-juzhe.zhong@rivai.ai/","msgid":"<20230118032434.71273-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:24:34","name":"RISC-V: Finalize VSETVL PASS implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032434.71273-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44952,"url":"https://patchwork.plctlab.org/api/1.2/patches/44952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032915.71849-1-juzhe.zhong@rivai.ai/","msgid":"<20230118032915.71849-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-18T03:29:15","name":"RISC-V: Finalize testcases for final version VSETVL PASS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118032915.71849-1-juzhe.zhong@rivai.ai/mbox/"},{"id":44958,"url":"https://patchwork.plctlab.org/api/1.2/patches/44958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebf0364a-16ad-2c69-fd73-00a9fa949e50@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-18T04:23:52","name":"[v3] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ebf0364a-16ad-2c69-fd73-00a9fa949e50@yahoo.co.jp/mbox/"},{"id":44976,"url":"https://patchwork.plctlab.org/api/1.2/patches/44976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd3c649a-64f0-6922-e7de-7170fb4bb419@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-18T05:25:41","name":"[v2] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd3c649a-64f0-6922-e7de-7170fb4bb419@yahoo.co.jp/mbox/"},{"id":44977,"url":"https://patchwork.plctlab.org/api/1.2/patches/44977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp/","msgid":"<5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-18T05:43:13","name":"xtensa: Optimize inversion of the MSB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ced9419-7984-6592-fc99-3bb37ad81bab@yahoo.co.jp/mbox/"},{"id":45096,"url":"https://patchwork.plctlab.org/api/1.2/patches/45096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118083442.04BA933EEC@hamza.pair.com/","msgid":"<20230118083442.04BA933EEC@hamza.pair.com>","list_archive_url":null,"date":"2023-01-18T08:34:36","name":"[committed] wwwdocs: gcc-4.6: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118083442.04BA933EEC@hamza.pair.com/mbox/"},{"id":45098,"url":"https://patchwork.plctlab.org/api/1.2/patches/45098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f05d86a0-0bd2-6efb-31aa-6d163d91e184@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-01-18T08:36:29","name":"[rs6000] Convert TI AND with a special constant to DI AND [PR93123]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f05d86a0-0bd2-6efb-31aa-6d163d91e184@linux.ibm.com/mbox/"},{"id":45099,"url":"https://patchwork.plctlab.org/api/1.2/patches/45099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com/","msgid":"<55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com>","list_archive_url":null,"date":"2023-01-18T08:50:39","name":"[1/2] rs6000: Refactor script genfusion.pl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55027326-ffe1-87e8-9e4b-08535425afdd@linux.ibm.com/mbox/"},{"id":45104,"url":"https://patchwork.plctlab.org/api/1.2/patches/45104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com/","msgid":"<130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com>","list_archive_url":null,"date":"2023-01-18T09:02:47","name":"[2/2] rs6000: Refactor genfusion.pl a bit further","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/130a6f1b-9089-8cdc-8e0c-0870139df7c7@linux.ibm.com/mbox/"},{"id":45142,"url":"https://patchwork.plctlab.org/api/1.2/patches/45142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmlem0ywoy.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-01-18T10:16:29","name":"lto: pass through -funwind-tables and -fasynchronous-unwind-tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmlem0ywoy.fsf@suse.de/mbox/"},{"id":45152,"url":"https://patchwork.plctlab.org/api/1.2/patches/45152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c061f6c1c090362efbbcb9af9f6c758@autistici.org/","msgid":"<7c061f6c1c090362efbbcb9af9f6c758@autistici.org>","list_archive_url":null,"date":"2023-01-18T10:44:19","name":"realpath() patch to fix symlinks resolution for win32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c061f6c1c090362efbbcb9af9f6c758@autistici.org/mbox/"},{"id":45153,"url":"https://patchwork.plctlab.org/api/1.2/patches/45153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnmuV0Jf2=uBqnbmVTeTRVAZToNhR3X_kU9DCrTJM+Edw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-18T10:48:07","name":"[aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnmuV0Jf2=uBqnbmVTeTRVAZToNhR3X_kU9DCrTJM+Edw@mail.gmail.com/mbox/"},{"id":45293,"url":"https://patchwork.plctlab.org/api/1.2/patches/45293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118135707.2394F139D2@imap2.suse-dmz.suse.de/","msgid":"<20230118135707.2394F139D2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-18T13:57:06","name":"lto/108445 - avoid LTO decl wrapping being confused by tree sharing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118135707.2394F139D2@imap2.suse-dmz.suse.de/mbox/"},{"id":45296,"url":"https://patchwork.plctlab.org/api/1.2/patches/45296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzgag544p.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-18T14:06:14","name":"wwwdocs: Announce Solaris 11.3 obsoletion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzgag544p.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":45340,"url":"https://patchwork.plctlab.org/api/1.2/patches/45340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com/","msgid":"<0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com>","list_archive_url":null,"date":"2023-01-18T15:42:24","name":"libfortran: Fix execute_command_line for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b95e5f1-142e-e13a-7d77-272073e25c2a@codesourcery.com/mbox/"},{"id":45385,"url":"https://patchwork.plctlab.org/api/1.2/patches/45385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118164501.8130-1-dmalcolm@redhat.com/","msgid":"<20230118164501.8130-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-18T16:45:01","name":"[committed] analyzer: add SARD testsuite 81","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118164501.8130-1-dmalcolm@redhat.com/mbox/"},{"id":45404,"url":"https://patchwork.plctlab.org/api/1.2/patches/45404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118175200.365397-1-polacek@redhat.com/","msgid":"<20230118175200.365397-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-18T17:52:00","name":"c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118175200.365397-1-polacek@redhat.com/mbox/"},{"id":45429,"url":"https://patchwork.plctlab.org/api/1.2/patches/45429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118191231.29839-1-hjl.tools@gmail.com/","msgid":"<20230118191231.29839-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-18T19:12:31","name":"x86: Check invalid third argument to __builtin_ia32_prefetch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118191231.29839-1-hjl.tools@gmail.com/mbox/"},{"id":45469,"url":"https://patchwork.plctlab.org/api/1.2/patches/45469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-1-christophe.lyon@arm.com/","msgid":"<20230118201649.11612-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-18T20:16:48","name":"[1/2] aarch64: fix ICE in aarch64_layout_arg [PR108411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-1-christophe.lyon@arm.com/mbox/"},{"id":45468,"url":"https://patchwork.plctlab.org/api/1.2/patches/45468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-2-christophe.lyon@arm.com/","msgid":"<20230118201649.11612-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-01-18T20:16:49","name":"[2/2] aarch64: add -fno-stack-protector to some tests [PR108411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118201649.11612-2-christophe.lyon@arm.com/mbox/"},{"id":45501,"url":"https://patchwork.plctlab.org/api/1.2/patches/45501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118211242.488379-1-polacek@redhat.com/","msgid":"<20230118211242.488379-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:12:42","name":"c: ICE with nullptr as case expression [PR108424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118211242.488379-1-polacek@redhat.com/mbox/"},{"id":45507,"url":"https://patchwork.plctlab.org/api/1.2/patches/45507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-294bce16-8b7b-4df3-b8a5-6f21ee37d08f-1674076842437@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-18T21:20:42","name":"Fortran: error recovery for invalid CLASS component [PR108434]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-294bce16-8b7b-4df3-b8a5-6f21ee37d08f-1674076842437@3c-app-gmx-bs46/mbox/"},{"id":45520,"url":"https://patchwork.plctlab.org/api/1.2/patches/45520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214922.440230-1-jwakely@redhat.com/","msgid":"<20230118214922.440230-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:49:22","name":"[committed] libstdc++: Fix std::random_device::entropy() for non-posix targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214922.440230-1-jwakely@redhat.com/mbox/"},{"id":45519,"url":"https://patchwork.plctlab.org/api/1.2/patches/45519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214929.440253-1-jwakely@redhat.com/","msgid":"<20230118214929.440253-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-18T21:49:29","name":"[committed] libstdc++: Deprecate std::filesystem::u8path for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118214929.440253-1-jwakely@redhat.com/mbox/"},{"id":45526,"url":"https://patchwork.plctlab.org/api/1.2/patches/45526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118222004.A77E933F02@hamza.pair.com/","msgid":"<20230118222004.A77E933F02@hamza.pair.com>","list_archive_url":null,"date":"2023-01-18T22:20:02","name":"[committed] libstdc++: Minor updates to Policy Based Data Structures: Biblio","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230118222004.A77E933F02@hamza.pair.com/mbox/"},{"id":45553,"url":"https://patchwork.plctlab.org/api/1.2/patches/45553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8iZOKnDx+14BjOD@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-19T01:13:28","name":"[v2] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8iZOKnDx+14BjOD@redhat.com/mbox/"},{"id":45570,"url":"https://patchwork.plctlab.org/api/1.2/patches/45570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp/","msgid":"<465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-19T03:50:10","name":"[v4] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/465b0cbe-73ca-f5a0-661d-d34217e29b4d@yahoo.co.jp/mbox/"},{"id":45595,"url":"https://patchwork.plctlab.org/api/1.2/patches/45595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b19b8ffe-16ea-522f-ebd8-d9041972353e@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-01-19T05:06:26","name":"[v3] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b19b8ffe-16ea-522f-ebd8-d9041972353e@yahoo.co.jp/mbox/"},{"id":45602,"url":"https://patchwork.plctlab.org/api/1.2/patches/45602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119060749.6812-1-juzhe.zhong@rivai.ai/","msgid":"<20230119060749.6812-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T06:07:49","name":"RISC-V: Add vlm/vsm C/C++ API intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119060749.6812-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45615,"url":"https://patchwork.plctlab.org/api/1.2/patches/45615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119070258.38936-1-juzhe.zhong@rivai.ai/","msgid":"<20230119070258.38936-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T07:02:58","name":"RISC-V: Fix pred_mov constraint for vle.v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119070258.38936-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45646,"url":"https://patchwork.plctlab.org/api/1.2/patches/45646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kCLT9lHooHB2Ti@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T08:41:17","name":"forwprop: Further fixes for simplify_rotate [PR108440]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kCLT9lHooHB2Ti@tucnak/mbox/"},{"id":45647,"url":"https://patchwork.plctlab.org/api/1.2/patches/45647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kEy10R0C8zeVC5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T08:52:27","name":"c++: Fix up handling of non-dependent subscript with static operator[] [PR108437]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8kEy10R0C8zeVC5@tucnak/mbox/"},{"id":45657,"url":"https://patchwork.plctlab.org/api/1.2/patches/45657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093037.0C02C33E96@hamza.pair.com/","msgid":"<20230119093037.0C02C33E96@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T09:30:35","name":"[committed] wwwdocs: gcc-3.3: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093037.0C02C33E96@hamza.pair.com/mbox/"},{"id":45663,"url":"https://patchwork.plctlab.org/api/1.2/patches/45663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093342.36BEB33E96@hamza.pair.com/","msgid":"<20230119093342.36BEB33E96@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T09:33:40","name":"[committed] wwwdocs: gitwrite: Structure a section some more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119093342.36BEB33E96@hamza.pair.com/mbox/"},{"id":45664,"url":"https://patchwork.plctlab.org/api/1.2/patches/45664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119094609.35967134F5@imap2.suse-dmz.suse.de/","msgid":"<20230119094609.35967134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-19T09:46:08","name":"tree-optimization/108449 - keep maybe_special_function_p behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119094609.35967134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":45696,"url":"https://patchwork.plctlab.org/api/1.2/patches/45696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de/","msgid":"<20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-19T11:22:28","name":"modula2/108144 - fix --enable-version-specific-runtime-libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119112228.A1ADC134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":45785,"url":"https://patchwork.plctlab.org/api/1.2/patches/45785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119141249.293487-1-juzhe.zhong@rivai.ai/","msgid":"<20230119141249.293487-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T14:12:49","name":"RISC-V: Add vle.v C API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119141249.293487-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45797,"url":"https://patchwork.plctlab.org/api/1.2/patches/45797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119143108.314789-1-juzhe.zhong@rivai.ai/","msgid":"<20230119143108.314789-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-19T14:31:08","name":"RISC-V: Add vse.v C API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119143108.314789-1-juzhe.zhong@rivai.ai/mbox/"},{"id":45807,"url":"https://patchwork.plctlab.org/api/1.2/patches/45807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com/","msgid":"<18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com>","list_archive_url":null,"date":"2023-01-19T14:40:19","name":"OpenMP/Fortran: Partially fix non-rect loop nests [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18c3aed8-71dd-9b7f-6c7c-da529876d3f5@codesourcery.com/mbox/"},{"id":45821,"url":"https://patchwork.plctlab.org/api/1.2/patches/45821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144608.56FCD33E8C@hamza.pair.com/","msgid":"<20230119144608.56FCD33E8C@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T14:46:06","name":"[committed] style: Tweak a comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144608.56FCD33E8C@hamza.pair.com/mbox/"},{"id":45823,"url":"https://patchwork.plctlab.org/api/1.2/patches/45823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144841.1B7E233E8E@hamza.pair.com/","msgid":"<20230119144841.1B7E233E8E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-19T14:48:39","name":"[committed] wwwdocs: gcc-4.9: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119144841.1B7E233E8E@hamza.pair.com/mbox/"},{"id":45854,"url":"https://patchwork.plctlab.org/api/1.2/patches/45854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8lxx+Jxfl1IkheJ@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-01-19T16:37:27","name":"PR target/107299: Fix build issue when long double is IEEE 128-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8lxx+Jxfl1IkheJ@toto.the-meissners.org/mbox/"},{"id":45905,"url":"https://patchwork.plctlab.org/api/1.2/patches/45905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119185619.78452-1-dmalcolm@redhat.com/","msgid":"<20230119185619.78452-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-19T18:56:19","name":"[committed] analyzer: use dominator info in -Wanalyzer-deref-before-check [PR108455]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230119185619.78452-1-dmalcolm@redhat.com/mbox/"},{"id":45950,"url":"https://patchwork.plctlab.org/api/1.2/patches/45950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8miS6EhPhsHx9/c@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:04:27","name":"[committed] openmp: Fix up OpenMP expansion of non-rectangular loops [PR108459]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8miS6EhPhsHx9/c@tucnak/mbox/"},{"id":45951,"url":"https://patchwork.plctlab.org/api/1.2/patches/45951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mjKFwfY/7O4lQM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:08:08","name":"niter: Fix up unused var warning [PR108457]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mjKFwfY/7O4lQM@tucnak/mbox/"},{"id":45954,"url":"https://patchwork.plctlab.org/api/1.2/patches/45954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mkUOpknOZyIC1I@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:13:04","name":"c++: Fix up handling of references to anon union members in initializers [PR53932]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mkUOpknOZyIC1I@tucnak/mbox/"},{"id":45956,"url":"https://patchwork.plctlab.org/api/1.2/patches/45956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mlNDm8kwAfjB5F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-19T20:16:52","name":"value-relation: Fix up relation_union [PR108447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8mlNDm8kwAfjB5F@tucnak/mbox/"},{"id":46086,"url":"https://patchwork.plctlab.org/api/1.2/patches/46086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8n2ayXMZf+dYsqi@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-20T02:03:23","name":"[v3] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8n2ayXMZf+dYsqi@redhat.com/mbox/"},{"id":46087,"url":"https://patchwork.plctlab.org/api/1.2/patches/46087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120020339.1025075-1-polacek@redhat.com/","msgid":"<20230120020339.1025075-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-20T02:03:39","name":"c++: Quash bogus -Wunused-value with new [PR107797]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120020339.1025075-1-polacek@redhat.com/mbox/"},{"id":46092,"url":"https://patchwork.plctlab.org/api/1.2/patches/46092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022029.215012-1-juzhe.zhong@rivai.ai/","msgid":"<20230120022029.215012-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T02:20:29","name":"RISC-V: Fix vop_m overloaded C++ API name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022029.215012-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46093,"url":"https://patchwork.plctlab.org/api/1.2/patches/46093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022434.215774-1-juzhe.zhong@rivai.ai/","msgid":"<20230120022434.215774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T02:24:34","name":"RISC-V: Add vle/vse C++ overloaded API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120022434.215774-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46120,"url":"https://patchwork.plctlab.org/api/1.2/patches/46120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp/","msgid":"<28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-20T03:33:37","name":"xtensa: Revise 89afb2e86fcb29c559b2957fdcbea0d01740c49b","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28f483f8-3ace-2150-3352-886a11a9e514@yahoo.co.jp/mbox/"},{"id":46126,"url":"https://patchwork.plctlab.org/api/1.2/patches/46126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042541.109466-1-juzhe.zhong@rivai.ai/","msgid":"<20230120042541.109466-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T04:25:41","name":"RISC-V: Add vlse/vsse C/C++ API intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042541.109466-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46127,"url":"https://patchwork.plctlab.org/api/1.2/patches/46127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042723.109826-1-juzhe.zhong@rivai.ai/","msgid":"<20230120042723.109826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T04:27:23","name":"RISC-V: Add vlse/vsse C/C++ intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120042723.109826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46259,"url":"https://patchwork.plctlab.org/api/1.2/patches/46259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120093309.104394-1-juzhe.zhong@rivai.ai/","msgid":"<20230120093309.104394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-20T09:33:09","name":"RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120093309.104394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":46289,"url":"https://patchwork.plctlab.org/api/1.2/patches/46289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-1-gcc@hazardy.de/","msgid":"<20230120105409.54949-1-gcc@hazardy.de>","list_archive_url":null,"date":"2023-01-20T10:54:06","name":"[1/4] libbacktrace: change all pc related variables to uintptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-1-gcc@hazardy.de/mbox/"},{"id":46290,"url":"https://patchwork.plctlab.org/api/1.2/patches/46290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-3-gcc@hazardy.de/","msgid":"<20230120105409.54949-3-gcc@hazardy.de>","list_archive_url":null,"date":"2023-01-20T10:54:08","name":"[3/4] libbacktrace: work with aslr on windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120105409.54949-3-gcc@hazardy.de/mbox/"},{"id":46302,"url":"https://patchwork.plctlab.org/api/1.2/patches/46302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120120433.5A733385841E@sourceware.org/","msgid":"<20230120120433.5A733385841E@sourceware.org>","list_archive_url":null,"date":"2023-01-20T12:03:47","name":"modula2/108144 - Fix multilib install of libgm2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120120433.5A733385841E@sourceware.org/mbox/"},{"id":46350,"url":"https://patchwork.plctlab.org/api/1.2/patches/46350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5ef1d5ce3e47e8431450ae8383a342@autistici.org/","msgid":"<0e5ef1d5ce3e47e8431450ae8383a342@autistici.org>","list_archive_url":null,"date":"2023-01-20T14:06:01","name":"libquadmath fix for 94756 and 87204","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5ef1d5ce3e47e8431450ae8383a342@autistici.org/mbox/"},{"id":46365,"url":"https://patchwork.plctlab.org/api/1.2/patches/46365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5h5m11.fsf@euler.schwinge.homeip.net/","msgid":"<87wn5h5m11.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T14:16:26","name":"[og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration (was: [OG12] [committed] amdgcn: Enable SIMD vectorization of math library functions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn5h5m11.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46366,"url":"https://patchwork.plctlab.org/api/1.2/patches/46366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0l5lqg.fsf@euler.schwinge.homeip.net/","msgid":"<87tu0l5lqg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T14:22:47","name":"[og12] Force '\''--param openacc-kernels=parloops'\'' in '\''libgomp.oacc-c-c++-common/abort-3.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87tu0l5lqg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46403,"url":"https://patchwork.plctlab.org/api/1.2/patches/46403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8qt0/yOySGsLEnt@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-20T15:05:55","name":"file-prefix-map: Fix up -f*-prefix-map= [PR108464]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8qt0/yOySGsLEnt@tucnak/mbox/"},{"id":46469,"url":"https://patchwork.plctlab.org/api/1.2/patches/46469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxdv5t.fsf@euler.schwinge.homeip.net/","msgid":"<87lelxdv5t.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T16:31:58","name":"[og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration, again (was: [og12] Fix '\''libgomp.c/simd-math-1.c'\'' configuration (was: [OG12] [committed] amdgcn: Enable SIMD vectorization of math library functions))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxdv5t.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46491,"url":"https://patchwork.plctlab.org/api/1.2/patches/46491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-2-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:26","name":"[01/23] arm: improve tests and fix vclsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-2-andrea.corallo@arm.com/mbox/"},{"id":46504,"url":"https://patchwork.plctlab.org/api/1.2/patches/46504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-3-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-3-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:27","name":"[02/23] arm: improve tests and fix vclzq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-3-andrea.corallo@arm.com/mbox/"},{"id":46500,"url":"https://patchwork.plctlab.org/api/1.2/patches/46500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-4-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:28","name":"[03/23] arm: improve tests and fix vnegq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-4-andrea.corallo@arm.com/mbox/"},{"id":46497,"url":"https://patchwork.plctlab.org/api/1.2/patches/46497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-5-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:29","name":"[04/23] arm: improve tests for vmulhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-5-andrea.corallo@arm.com/mbox/"},{"id":46499,"url":"https://patchwork.plctlab.org/api/1.2/patches/46499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-6-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:30","name":"[05/23] arm: improve tests for vmullbq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-6-andrea.corallo@arm.com/mbox/"},{"id":46496,"url":"https://patchwork.plctlab.org/api/1.2/patches/46496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-7-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-7-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:31","name":"[06/23] arm: improve tests for vmulltq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-7-andrea.corallo@arm.com/mbox/"},{"id":46510,"url":"https://patchwork.plctlab.org/api/1.2/patches/46510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-8-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:32","name":"[07/23] arm: improve tests for vcaddq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-8-andrea.corallo@arm.com/mbox/"},{"id":46505,"url":"https://patchwork.plctlab.org/api/1.2/patches/46505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-9-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:33","name":"[08/23] arm: improve tests for vcmlaq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-9-andrea.corallo@arm.com/mbox/"},{"id":46513,"url":"https://patchwork.plctlab.org/api/1.2/patches/46513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-10-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:34","name":"[09/23] arm: improve tests for vcmulq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-10-andrea.corallo@arm.com/mbox/"},{"id":46509,"url":"https://patchwork.plctlab.org/api/1.2/patches/46509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-11-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-11-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:35","name":"[10/23] arm: improve tests and fix vqabsq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-11-andrea.corallo@arm.com/mbox/"},{"id":46506,"url":"https://patchwork.plctlab.org/api/1.2/patches/46506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-12-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-12-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:36","name":"[11/23] arm: improve tests for vqdmladhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-12-andrea.corallo@arm.com/mbox/"},{"id":46502,"url":"https://patchwork.plctlab.org/api/1.2/patches/46502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-13-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-13-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:37","name":"[12/23] arm: improve tests for vqdmladhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-13-andrea.corallo@arm.com/mbox/"},{"id":46503,"url":"https://patchwork.plctlab.org/api/1.2/patches/46503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-14-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-14-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:38","name":"[13/23] arm: improve tests for vqrdmladhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-14-andrea.corallo@arm.com/mbox/"},{"id":46512,"url":"https://patchwork.plctlab.org/api/1.2/patches/46512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-15-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-15-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:39","name":"[14/23] arm: improve tests for vqrdmladhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-15-andrea.corallo@arm.com/mbox/"},{"id":46489,"url":"https://patchwork.plctlab.org/api/1.2/patches/46489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-16-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-16-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:40","name":"[15/23] arm: improve tests for vqrdmlashq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-16-andrea.corallo@arm.com/mbox/"},{"id":46493,"url":"https://patchwork.plctlab.org/api/1.2/patches/46493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-17-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-17-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:41","name":"[16/23] arm: improve tests for vqdmlsdhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-17-andrea.corallo@arm.com/mbox/"},{"id":46490,"url":"https://patchwork.plctlab.org/api/1.2/patches/46490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-18-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-18-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:42","name":"[17/23] arm: improve tests for vqdmlsdhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-18-andrea.corallo@arm.com/mbox/"},{"id":46498,"url":"https://patchwork.plctlab.org/api/1.2/patches/46498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-19-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-19-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:43","name":"[18/23] arm: improve tests for vqrdmlsdhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-19-andrea.corallo@arm.com/mbox/"},{"id":46507,"url":"https://patchwork.plctlab.org/api/1.2/patches/46507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-20-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-20-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:44","name":"[19/23] arm: improve tests for vqrdmlsdhxq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-20-andrea.corallo@arm.com/mbox/"},{"id":46511,"url":"https://patchwork.plctlab.org/api/1.2/patches/46511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-21-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-21-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:45","name":"[20/23] arm: improve tests for vqrdmulhq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-21-andrea.corallo@arm.com/mbox/"},{"id":46501,"url":"https://patchwork.plctlab.org/api/1.2/patches/46501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-22-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-22-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:46","name":"[21/23] arm: improve tests and fix vqnegq*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-22-andrea.corallo@arm.com/mbox/"},{"id":46508,"url":"https://patchwork.plctlab.org/api/1.2/patches/46508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-23-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-23-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:47","name":"[22/23] arm: improve tests for vld2q*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-23-andrea.corallo@arm.com/mbox/"},{"id":46514,"url":"https://patchwork.plctlab.org/api/1.2/patches/46514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-24-andrea.corallo@arm.com/","msgid":"<20230120163948.752531-24-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-20T16:39:48","name":"[23/23] arm: fix missing extern \"C\" in MVE tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230120163948.752531-24-andrea.corallo@arm.com/mbox/"},{"id":46536,"url":"https://patchwork.plctlab.org/api/1.2/patches/46536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com/","msgid":"<1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-20T17:27:24","name":"[v2,GCC] arm: Add support for new frame unwinding instruction \"0xb5\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com/mbox/"},{"id":46617,"url":"https://patchwork.plctlab.org/api/1.2/patches/46617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxotii.fsf@euler.schwinge.homeip.net/","msgid":"<87lelxotii.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-01-20T20:12:05","name":"Clean up after newlib \"nvptx: In offloading execution, map '\''_exit'\'' to '\''abort'\'' [GCC PR85463]\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelxotii.fsf@euler.schwinge.homeip.net/mbox/"},{"id":46625,"url":"https://patchwork.plctlab.org/api/1.2/patches/46625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:23:06","name":"[og12] nvptx: Make '\''nvptx_uniform_warp_check'\'' fit for non-full-warp execution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a62d2bx1.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46626,"url":"https://patchwork.plctlab.org/api/1.2/patches/46626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:26:43","name":"[og12] Add '\''gcc.target/nvptx/softstack-decl-1.c'\'', '\''gcc.target/nvptx/uniform-simt-decl-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cxh2br0.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46627,"url":"https://patchwork.plctlab.org/api/1.2/patches/46627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:30:14","name":"[og12] nvptx: Prevent emitting duplicate declarations for '\''__nvptx_stacks'\'', '\''__nvptx_uni'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jsl2bl5.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46630,"url":"https://patchwork.plctlab.org/api/1.2/patches/46630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T20:46:50","name":"[og12] nvptx: Support global constructors/destructors via '\''collect2'\'' for offloading (was: nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfg50w91.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46641,"url":"https://patchwork.plctlab.org/api/1.2/patches/46641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T21:04:02","name":"nvptx, libgcc: Stub unwinding implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pmb82a0t.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46643,"url":"https://patchwork.plctlab.org/api/1.2/patches/46643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-20T21:16:00","name":"nvptx, libgfortran: Switch out of \"minimal\" mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt6c29gv.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":46748,"url":"https://patchwork.plctlab.org/api/1.2/patches/46748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbce44ba-6020-ee61-d657-5676a5432e79@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-21T01:46:39","name":"[patch.,fortran] PR102595 ICE in var_element, at fortran/decl.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbce44ba-6020-ee61-d657-5676a5432e79@gmail.com/mbox/"},{"id":46755,"url":"https://patchwork.plctlab.org/api/1.2/patches/46755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com/","msgid":"<1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com>","list_archive_url":null,"date":"2023-01-21T02:13:16","name":"[gfortran.dg] Adjust numerous tests so that they pass on line endings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f4144a4-5920-4286-5ad6-f4587498c8eb@protonmail.com/mbox/"},{"id":46758,"url":"https://patchwork.plctlab.org/api/1.2/patches/46758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca088d6a-91bf-c8f1-9db1-cc92065d7df9@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-21T03:21:27","name":"[gfortran.dg] Allow test to pass on mingw","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca088d6a-91bf-c8f1-9db1-cc92065d7df9@protonmail.com/mbox/"},{"id":46796,"url":"https://patchwork.plctlab.org/api/1.2/patches/46796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com/","msgid":"<11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com>","list_archive_url":null,"date":"2023-01-21T09:57:24","name":"install.texi: Bump newlib version for nvptx + gcn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11d635d0-9798-5344-934b-969cb01974ba@codesourcery.com/mbox/"},{"id":46797,"url":"https://patchwork.plctlab.org/api/1.2/patches/46797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8u3h8B7//8hKdHh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-21T09:59:35","name":"c++: Handle structured bindings like anon unions in initializers [PR108474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y8u3h8B7//8hKdHh@tucnak/mbox/"},{"id":46811,"url":"https://patchwork.plctlab.org/api/1.2/patches/46811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121111541.ADDED33EBE@hamza.pair.com/","msgid":"<20230121111541.ADDED33EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-01-21T11:15:40","name":"[pushed] wwwdocs: *: Consistent formatting around environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121111541.ADDED33EBE@hamza.pair.com/mbox/"},{"id":46844,"url":"https://patchwork.plctlab.org/api/1.2/patches/46844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121170507.2193-1-iain@sandoe.co.uk/","msgid":"<20230121170507.2193-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-21T17:05:07","name":"[pushed] Darwin, fixincludes: Handle MacOS13 SDK Apple-specific deprecations [PR107586].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121170507.2193-1-iain@sandoe.co.uk/mbox/"},{"id":46845,"url":"https://patchwork.plctlab.org/api/1.2/patches/46845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121171220.36495-1-iain@sandoe.co.uk/","msgid":"<20230121171220.36495-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-21T17:12:20","name":"Darwin, fixincludes: Handle Apple Blocks in objc/runtime.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121171220.36495-1-iain@sandoe.co.uk/mbox/"},{"id":46846,"url":"https://patchwork.plctlab.org/api/1.2/patches/46846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121173312.6E2FE33E62@hamza.pair.com/","msgid":"<20230121173312.6E2FE33E62@hamza.pair.com>","list_archive_url":null,"date":"2023-01-21T17:33:11","name":"[pushed] wwwdocs: gcc-5: Adjust www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230121173312.6E2FE33E62@hamza.pair.com/mbox/"},{"id":46922,"url":"https://patchwork.plctlab.org/api/1.2/patches/46922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122093556.33081-1-iain@sandoe.co.uk/","msgid":"<20230122093556.33081-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-22T09:35:56","name":"[pushed] Darwin, libffi, testsuite: Ensure we pick up the convenience lib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122093556.33081-1-iain@sandoe.co.uk/mbox/"},{"id":46928,"url":"https://patchwork.plctlab.org/api/1.2/patches/46928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfdc8846-6060-2e9c-ec28-e0f7c74d9795@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-01-22T12:02:01","name":"[pushed] wwwdocs: gcc-10: Grammar fixes in the amdgcn section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfdc8846-6060-2e9c-ec28-e0f7c74d9795@pfeifer.com/mbox/"},{"id":46963,"url":"https://patchwork.plctlab.org/api/1.2/patches/46963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122161059.96036-1-iain@sandoe.co.uk/","msgid":"<20230122161059.96036-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-22T16:10:59","name":"Modula-2, testsuite: Remove use of concatenated paths.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122161059.96036-1-iain@sandoe.co.uk/mbox/"},{"id":47005,"url":"https://patchwork.plctlab.org/api/1.2/patches/47005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122195040.746214-1-dimitar@dinux.eu/","msgid":"<20230122195040.746214-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-22T19:50:40","name":"[committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230122195040.746214-1-dimitar@dinux.eu/mbox/"},{"id":47023,"url":"https://patchwork.plctlab.org/api/1.2/patches/47023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123003447.3975772-1-jason@redhat.com/","msgid":"<20230123003447.3975772-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T00:34:47","name":"[pushed] c++: lifetime extension with .* expression [PR53288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123003447.3975772-1-jason@redhat.com/mbox/"},{"id":47025,"url":"https://patchwork.plctlab.org/api/1.2/patches/47025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123012100.4021860-1-arsen@aarsen.me/","msgid":"<20230123012100.4021860-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-23T01:21:00","name":"[wwwdocs] lists: Add documentation about the Sourceware public-inbox","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123012100.4021860-1-arsen@aarsen.me/mbox/"},{"id":47044,"url":"https://patchwork.plctlab.org/api/1.2/patches/47044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd643693-5e73-cd9f-ae2e-541d253985d0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-23T06:02:27","name":"[_GLIBCXX_DEBUG] Remove useless checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dd643693-5e73-cd9f-ae2e-541d253985d0@gmail.com/mbox/"},{"id":47071,"url":"https://patchwork.plctlab.org/api/1.2/patches/47071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com/","msgid":"<42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com>","list_archive_url":null,"date":"2023-01-23T08:48:33","name":"[committed] libgomp.texi: Impl. status - non-rect loop nest only partial","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a434b3-4574-23b4-d8a0-ded59d2f7fbe@codesourcery.com/mbox/"},{"id":47090,"url":"https://patchwork.plctlab.org/api/1.2/patches/47090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123100943.6C675134F5@imap2.suse-dmz.suse.de/","msgid":"<20230123100943.6C675134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:09:43","name":"tree-optimization/108482 - remove stray .LOOP_DIST_ALIAS calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123100943.6C675134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":47106,"url":"https://patchwork.plctlab.org/api/1.2/patches/47106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123101852.EABDC134F5@imap2.suse-dmz.suse.de/","msgid":"<20230123101852.EABDC134F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:18:52","name":"modula2/108144 - fix mistake in previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123101852.EABDC134F5@imap2.suse-dmz.suse.de/mbox/"},{"id":47107,"url":"https://patchwork.plctlab.org/api/1.2/patches/47107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0vltu0v.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-23T10:38:56","name":"testsuite: Fix gcc.dg/vect/vect-fmax-1.c etc. on SPARC [PR104756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0vltu0v.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":47109,"url":"https://patchwork.plctlab.org/api/1.2/patches/47109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt69ttsh.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-23T10:43:58","name":"testsuite: Fix gcc.dg/vect/vect-bitfield-write-[23].c on SPARC [PR107808]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt69ttsh.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":47114,"url":"https://patchwork.plctlab.org/api/1.2/patches/47114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123105023.983A51357F@imap2.suse-dmz.suse.de/","msgid":"<20230123105023.983A51357F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-23T10:50:23","name":"modula2/108462 - duplicate install of static modula2 target libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123105023.983A51357F@imap2.suse-dmz.suse.de/mbox/"},{"id":47119,"url":"https://patchwork.plctlab.org/api/1.2/patches/47119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y85shC6wzmxApdZM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-23T11:16:20","name":"c++, cgraphbuild: Handle DECL_VALUE_EXPRs in record_reference [PR108474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y85shC6wzmxApdZM@tucnak/mbox/"},{"id":47120,"url":"https://patchwork.plctlab.org/api/1.2/patches/47120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com/","msgid":"<0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com>","list_archive_url":null,"date":"2023-01-23T11:37:38","name":"[wwwdocs] gcc-6: Consistently lower-case newlib (was: [Patch] install.texi: Bump newlib version for nvptx + gcn)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0096564c-038b-1b4b-d1db-ee31b3c0b485@pfeifer.com/mbox/"},{"id":47130,"url":"https://patchwork.plctlab.org/api/1.2/patches/47130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123124145.965541-1-arsen@aarsen.me/","msgid":"<20230123124145.965541-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-23T12:41:45","name":"libstdc++: Document P1642 and extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123124145.965541-1-arsen@aarsen.me/mbox/"},{"id":47152,"url":"https://patchwork.plctlab.org/api/1.2/patches/47152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com/","msgid":"<3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-23T13:39:45","name":"[Committed,GCC] arm: Documentation fix for -mbranch-protection option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf85bee-425d-4c63-93dd-462850f343fd@AZ-NEU-EX04.Arm.com/mbox/"},{"id":47269,"url":"https://patchwork.plctlab.org/api/1.2/patches/47269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com/","msgid":"<2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com>","list_archive_url":null,"date":"2023-01-23T17:44:42","name":"[1/2] Use value_relation class instead of direct calls to intersect/union.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b7a5b75-aa71-b399-ff07-1f62dfac6cdc@redhat.com/mbox/"},{"id":47270,"url":"https://patchwork.plctlab.org/api/1.2/patches/47270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c60c2794-f726-29cc-45fd-54149ffce169@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-23T17:44:48","name":"[2/2] Add VREL_OTHER for FP unsupported relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c60c2794-f726-29cc-45fd-54149ffce169@redhat.com/mbox/"},{"id":47324,"url":"https://patchwork.plctlab.org/api/1.2/patches/47324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123183706.14801-1-Brian.Inglis@Shaw.ca/","msgid":"<20230123183706.14801-1-Brian.Inglis@Shaw.ca>","list_archive_url":null,"date":"2023-01-23T18:37:06","name":"doc/invoke.texi: remove Cygwin options from Windows options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123183706.14801-1-Brian.Inglis@Shaw.ca/mbox/"},{"id":47336,"url":"https://patchwork.plctlab.org/api/1.2/patches/47336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123190936.4161568-1-jason@redhat.com/","msgid":"<20230123190936.4161568-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T19:09:36","name":"[pushed] c++: result location and explicit inst [PR108496]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123190936.4161568-1-jason@redhat.com/mbox/"},{"id":47375,"url":"https://patchwork.plctlab.org/api/1.2/patches/47375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ecf6c22d-c54d-48b8-9e31-bec40bcc5bc7-1674506099182@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-01-23T20:34:59","name":"Fortran: avoid ICE on invalid array subscript triplets [PR108501]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ecf6c22d-c54d-48b8-9e31-bec40bcc5bc7-1674506099182@3c-app-gmx-bap50/mbox/"},{"id":47407,"url":"https://patchwork.plctlab.org/api/1.2/patches/47407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123211234.37680-1-jason@redhat.com/","msgid":"<20230123211234.37680-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T21:12:34","name":"[pushed] c++: vector of class with bool ctor [PR108195]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123211234.37680-1-jason@redhat.com/mbox/"},{"id":47409,"url":"https://patchwork.plctlab.org/api/1.2/patches/47409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a7fd4365-096c-4df3-b654-6912a5dca41d-1674509034609@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-01-23T21:23:54","name":"Fortran: fix NULL pointer dereference in gfc_check_dependency [PR108502]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a7fd4365-096c-4df3-b654-6912a5dca41d-1674509034609@3c-app-gmx-bap50/mbox/"},{"id":47464,"url":"https://patchwork.plctlab.org/api/1.2/patches/47464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7030d247-5453-2344-2ee6-33899e52ed08@redhat.com/","msgid":"<7030d247-5453-2344-2ee6-33899e52ed08@redhat.com>","list_archive_url":null,"date":"2023-01-23T23:21:37","name":"tree-optimization/108306 - Correctly detect shifts out of range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7030d247-5453-2344-2ee6-33899e52ed08@redhat.com/mbox/"},{"id":47467,"url":"https://patchwork.plctlab.org/api/1.2/patches/47467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123233453.85393-1-jason@redhat.com/","msgid":"<20230123233453.85393-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-23T23:34:53","name":"[pushed] c++: TARGET_EXPR_ELIDING_P and std::move [PR107267]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230123233453.85393-1-jason@redhat.com/mbox/"},{"id":47515,"url":"https://patchwork.plctlab.org/api/1.2/patches/47515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124032614.121085-1-jason@redhat.com/","msgid":"<20230124032614.121085-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T03:26:14","name":"[pushed] c++: TARGET_EXPR collapsing [PR107303]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124032614.121085-1-jason@redhat.com/mbox/"},{"id":47517,"url":"https://patchwork.plctlab.org/api/1.2/patches/47517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp/","msgid":"<1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-24T03:43:31","name":"[v5] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c6c943f-8348-c726-8282-de9ee2a10d09@yahoo.co.jp/mbox/"},{"id":47518,"url":"https://patchwork.plctlab.org/api/1.2/patches/47518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp/","msgid":"<384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-24T03:43:52","name":"[v4] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/384ca033-f6d9-395a-8000-443293c3a989@yahoo.co.jp/mbox/"},{"id":47593,"url":"https://patchwork.plctlab.org/api/1.2/patches/47593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124084701.258605-1-stefansf@linux.ibm.com/","msgid":"<20230124084701.258605-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-01-24T08:47:02","name":"[v2] IBM zSystems: Fix TARGET_D_CPU_VERSIONS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124084701.258605-1-stefansf@linux.ibm.com/mbox/"},{"id":47594,"url":"https://patchwork.plctlab.org/api/1.2/patches/47594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-24T09:01:16","name":"Make '\''libgcc/config/nvptx/crt0.c'\'' build '\''--without-headers'\'' (was: [PING] nvptx: Support global constructors/destructors via '\''collect2'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edrk1f37.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":47621,"url":"https://patchwork.plctlab.org/api/1.2/patches/47621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-24T09:37:00","name":"Update '\''libgomp/libgomp.texi'\'' for '\''nvptx, libgfortran: Switch out of \"minimal\" mode'\'' (was: nvptx, libgfortran: Switch out of \"minimal\" mode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkmo1dfn.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":47623,"url":"https://patchwork.plctlab.org/api/1.2/patches/47623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com/","msgid":"<0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com>","list_archive_url":null,"date":"2023-01-24T09:55:00","name":"[GCC] arm: Fix inclusion of arm-mlib.h header more than once (pr108505).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0848d46d-cf28-4b97-bdb8-fda36ee53fea@AZ-NEU-EX04.Arm.com/mbox/"},{"id":47676,"url":"https://patchwork.plctlab.org/api/1.2/patches/47676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124123707.D802C139FB@imap2.suse-dmz.suse.de/","msgid":"<20230124123707.D802C139FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-24T12:37:07","name":"tree-optimization/108500 - avoid useless fast-query compute in CFG cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124123707.D802C139FB@imap2.suse-dmz.suse.de/mbox/"},{"id":47707,"url":"https://patchwork.plctlab.org/api/1.2/patches/47707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae05c3e4-c4a5-69a6-b61b-1d22b63ec9cf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-24T13:40:46","name":"[1/3] arm: Fix sign of MVE predicate mve_pred16_t [PR 107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae05c3e4-c4a5-69a6-b61b-1d22b63ec9cf@arm.com/mbox/"},{"id":47710,"url":"https://patchwork.plctlab.org/api/1.2/patches/47710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com/","msgid":"<22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com>","list_archive_url":null,"date":"2023-01-24T13:54:20","name":"[2/3] arm: Remove unnecessary zero-extending of MVE predicates before use [PR 107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ba05fb-774e-62b8-64a2-90c5d73fcaba@arm.com/mbox/"},{"id":47711,"url":"https://patchwork.plctlab.org/api/1.2/patches/47711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com/","msgid":"<7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com>","list_archive_url":null,"date":"2023-01-24T13:56:28","name":"[3/3] arm: Fix MVE predicates synthesis [PR 108443]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fea7fd8-2869-47cd-69cf-ccc9bfa05733@arm.com/mbox/"},{"id":47740,"url":"https://patchwork.plctlab.org/api/1.2/patches/47740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz/","msgid":"<196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz>","list_archive_url":null,"date":"2023-01-24T15:15:05","name":"ipa: check if cache_token != NULL before hash_set::add call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/196e54c5-4ee3-2d0b-3803-8b574eb71b99@suse.cz/mbox/"},{"id":47743,"url":"https://patchwork.plctlab.org/api/1.2/patches/47743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e85a77-ce5e-31b5-5b5f-cd9ee1b2ac4a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-24T15:24:07","name":"OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e85a77-ce5e-31b5-5b5f-cd9ee1b2ac4a@codesourcery.com/mbox/"},{"id":47760,"url":"https://patchwork.plctlab.org/api/1.2/patches/47760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124163607.47793-1-cooper.qu@linux.alibaba.com/","msgid":"<20230124163607.47793-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-24T16:36:07","name":"[COMMITTED] C-SKY: Fix wrong sysroot suffix when disable multilib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124163607.47793-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":47775,"url":"https://patchwork.plctlab.org/api/1.2/patches/47775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12259c76-b704-86eb-c93e-b0a92b0db269@arm.com/","msgid":"<12259c76-b704-86eb-c93e-b0a92b0db269@arm.com>","list_archive_url":null,"date":"2023-01-24T16:52:51","name":"aarch64: Add aarch64*-*-* to the list of vect_long_long targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12259c76-b704-86eb-c93e-b0a92b0db269@arm.com/mbox/"},{"id":47890,"url":"https://patchwork.plctlab.org/api/1.2/patches/47890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a70062ed-5ff9-4209-82a6-93575ddbd32c-1674593251552@3c-app-gmx-bs66/","msgid":"","list_archive_url":null,"date":"2023-01-24T20:47:31","name":"[committed] Fortran: ICE in transformational_result [PR108529]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a70062ed-5ff9-4209-82a6-93575ddbd32c-1674593251552@3c-app-gmx-bs66/mbox/"},{"id":47907,"url":"https://patchwork.plctlab.org/api/1.2/patches/47907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com/","msgid":"<8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com>","list_archive_url":null,"date":"2023-01-24T21:18:38","name":"[committed,PR108388] LRA: Always do elimination and only for hard register to check insn constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f88686a-691f-4ec2-8249-3a181e256b8d@redhat.com/mbox/"},{"id":47908,"url":"https://patchwork.plctlab.org/api/1.2/patches/47908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17ca0330-53b9-466e-b5f4-dcc7526b27bb-1674596893254@3c-app-gmx-bs66/","msgid":"","list_archive_url":null,"date":"2023-01-24T21:48:13","name":"Fortran: fix ICE in compare_bound_int [PR108527]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-17ca0330-53b9-466e-b5f4-dcc7526b27bb-1674596893254@3c-app-gmx-bs66/mbox/"},{"id":47909,"url":"https://patchwork.plctlab.org/api/1.2/patches/47909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124215400.1345220-1-siddhesh@gotplt.org/","msgid":"<20230124215400.1345220-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-01-24T21:54:00","name":"tree-optimization/108522 Use COMPONENT_REF offset when available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124215400.1345220-1-siddhesh@gotplt.org/mbox/"},{"id":47923,"url":"https://patchwork.plctlab.org/api/1.2/patches/47923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221106.299101-1-jason@redhat.com/","msgid":"<20230124221106.299101-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T22:11:06","name":"[pushed] c++: static lambda in template [PR108526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221106.299101-1-jason@redhat.com/mbox/"},{"id":47925,"url":"https://patchwork.plctlab.org/api/1.2/patches/47925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221123.299474-1-jason@redhat.com/","msgid":"<20230124221123.299474-1-jason@redhat.com>","list_archive_url":null,"date":"2023-01-24T22:11:23","name":"[pushed] c++: \"\" #pragma at BOF [PR108504]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124221123.299474-1-jason@redhat.com/mbox/"},{"id":47946,"url":"https://patchwork.plctlab.org/api/1.2/patches/47946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BmzmRTiExVyZFR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-24T23:16:30","name":"[committed] testsuite: Fix up new51.C test on various targets [PR108533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BmzmRTiExVyZFR@tucnak/mbox/"},{"id":47947,"url":"https://patchwork.plctlab.org/api/1.2/patches/47947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BnmXCZtTgjby2V@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-24T23:19:53","name":"c++: Fix up mangling of static lambdas [PR108525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9BnmXCZtTgjby2V@tucnak/mbox/"},{"id":47966,"url":"https://patchwork.plctlab.org/api/1.2/patches/47966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235153.1186124-1-jwakely@redhat.com/","msgid":"<20230124235153.1186124-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-24T23:51:53","name":"[committed] libstdc++: Include std::ranges::subrange definition in [PR102301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235153.1186124-1-jwakely@redhat.com/mbox/"},{"id":47967,"url":"https://patchwork.plctlab.org/api/1.2/patches/47967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235157.1186160-1-jwakely@redhat.com/","msgid":"<20230124235157.1186160-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-24T23:51:57","name":"[committed] libstdc++: Use /etc/sysconfig/clock for std::chrono::current_zone() [PR108530]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230124235157.1186160-1-jwakely@redhat.com/mbox/"},{"id":48066,"url":"https://patchwork.plctlab.org/api/1.2/patches/48066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125084629.55372-1-iain@sandoe.co.uk/","msgid":"<20230125084629.55372-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-25T08:46:29","name":"modula-2: Fixes for preprocessing [PR102343, PR108182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125084629.55372-1-iain@sandoe.co.uk/mbox/"},{"id":48067,"url":"https://patchwork.plctlab.org/api/1.2/patches/48067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9DsnRNVWIjdTzQu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-25T08:47:25","name":"store-merging: Disable string_concatenate mode if start or end aren'\''t byte aligned [PR108498]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9DsnRNVWIjdTzQu@tucnak/mbox/"},{"id":48091,"url":"https://patchwork.plctlab.org/api/1.2/patches/48091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125104351.F0CB433EE4@hamza.pair.com/","msgid":"<20230125104351.F0CB433EE4@hamza.pair.com>","list_archive_url":null,"date":"2023-01-25T10:43:46","name":"[pushed] doc/contrib.texi: Add Jose E. Marchesi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125104351.F0CB433EE4@hamza.pair.com/mbox/"},{"id":48111,"url":"https://patchwork.plctlab.org/api/1.2/patches/48111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125111201.D211233EEC@hamza.pair.com/","msgid":"<20230125111201.D211233EEC@hamza.pair.com>","list_archive_url":null,"date":"2023-01-25T11:11:59","name":"[pushed] wwwdocs: gcc-6: Switch www.open-std.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125111201.D211233EEC@hamza.pair.com/mbox/"},{"id":48114,"url":"https://patchwork.plctlab.org/api/1.2/patches/48114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycuony7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T11:25:52","name":"[pushed] aarch64: Update sizeless tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycuony7.fsf@arm.com/mbox/"},{"id":48115,"url":"https://patchwork.plctlab.org/api/1.2/patches/48115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga6n9ce.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T11:26:41","name":"[pushed] aarch64: Restore generation of SVE UQDEC instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga6n9ce.fsf@arm.com/mbox/"},{"id":48141,"url":"https://patchwork.plctlab.org/api/1.2/patches/48141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123032.23F333858D39@sourceware.org/","msgid":"<20230125123032.23F333858D39@sourceware.org>","list_archive_url":null,"date":"2023-01-25T12:29:47","name":"Fixup LTO internal docs for option processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123032.23F333858D39@sourceware.org/mbox/"},{"id":48145,"url":"https://patchwork.plctlab.org/api/1.2/patches/48145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123749.A89F03858438@sourceware.org/","msgid":"<20230125123749.A89F03858438@sourceware.org>","list_archive_url":null,"date":"2023-01-25T12:37:04","name":"tree-optimization/108523 - fix endless iteration in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125123749.A89F03858438@sourceware.org/mbox/"},{"id":48177,"url":"https://patchwork.plctlab.org/api/1.2/patches/48177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a07aa9bd-b07c-8c6d-29a8-1b3475639124@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T14:47:18","name":"[v2] OpenMP/Fortran: Partially fix non-rect loop nests [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a07aa9bd-b07c-8c6d-29a8-1b3475639124@codesourcery.com/mbox/"},{"id":48241,"url":"https://patchwork.plctlab.org/api/1.2/patches/48241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0780922f-99b5-96fc-b921-9e00652f9741@redhat.com/","msgid":"<0780922f-99b5-96fc-b921-9e00652f9741@redhat.com>","list_archive_url":null,"date":"2023-01-25T18:05:09","name":"PR tree-optimization/108447 - Do not try to logical fold floating point relations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0780922f-99b5-96fc-b921-9e00652f9741@redhat.com/mbox/"},{"id":48255,"url":"https://patchwork.plctlab.org/api/1.2/patches/48255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdbcafee-35e2-7074-0207-d93cfa8b7db0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-25T18:38:47","name":"minor optimization bug in basic_string move assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdbcafee-35e2-7074-0207-d93cfa8b7db0@gmail.com/mbox/"},{"id":48289,"url":"https://patchwork.plctlab.org/api/1.2/patches/48289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-e58ca35d-9f14-4c23-a70e-c307739ee6ed-1674676416042@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-25T19:53:36","name":"[committed] Fortran: ICE in gfc_compare_array_spec [PR108528]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-e58ca35d-9f14-4c23-a70e-c307739ee6ed-1674676416042@3c-app-gmx-bs46/mbox/"},{"id":48306,"url":"https://patchwork.plctlab.org/api/1.2/patches/48306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125201643.506666-1-ppalka@redhat.com/","msgid":"<20230125201643.506666-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-25T20:16:43","name":"c++ modules: uninstantiated template friend class [PR104234]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125201643.506666-1-ppalka@redhat.com/mbox/"},{"id":48343,"url":"https://patchwork.plctlab.org/api/1.2/patches/48343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-2-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:32","name":"[v5,1/5] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-2-ben.boeckel@kitware.com/mbox/"},{"id":48344,"url":"https://patchwork.plctlab.org/api/1.2/patches/48344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-4-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:34","name":"[v5,3/5] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-4-ben.boeckel@kitware.com/mbox/"},{"id":48346,"url":"https://patchwork.plctlab.org/api/1.2/patches/48346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-5-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:35","name":"[v5,4/5] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-5-ben.boeckel@kitware.com/mbox/"},{"id":48358,"url":"https://patchwork.plctlab.org/api/1.2/patches/48358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-6-ben.boeckel@kitware.com/","msgid":"<20230125210636.2960049-6-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-01-25T21:06:36","name":"[v5,5/5] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125210636.2960049-6-ben.boeckel@kitware.com/mbox/"},{"id":48396,"url":"https://patchwork.plctlab.org/api/1.2/patches/48396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5e4b248f-79f4-46ea-aafa-9a6a12d90f2f-1674683962284@3c-app-gmx-bs46/","msgid":"","list_archive_url":null,"date":"2023-01-25T21:59:22","name":"Fortran: fix ICE in check_host_association [PR108544]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5e4b248f-79f4-46ea-aafa-9a6a12d90f2f-1674683962284@3c-app-gmx-bs46/mbox/"},{"id":48410,"url":"https://patchwork.plctlab.org/api/1.2/patches/48410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125232545.312399-1-polacek@redhat.com/","msgid":"<20230125232545.312399-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-25T23:25:45","name":"opts: SANITIZE_ADDRESS wrongly cleared [PR108543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230125232545.312399-1-polacek@redhat.com/mbox/"},{"id":48480,"url":"https://patchwork.plctlab.org/api/1.2/patches/48480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126033210.1926726-1-siddhesh@gotplt.org/","msgid":"<20230126033210.1926726-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-01-26T03:32:10","name":"tree-optimization/108522 Use component_ref_field_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126033210.1926726-1-siddhesh@gotplt.org/mbox/"},{"id":48507,"url":"https://patchwork.plctlab.org/api/1.2/patches/48507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126073917.DE68F1358A@imap2.suse-dmz.suse.de/","msgid":"<20230126073917.DE68F1358A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-26T07:39:17","name":"tree-optimization/108523 - testcase for the bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126073917.DE68F1358A@imap2.suse-dmz.suse.de/mbox/"},{"id":48538,"url":"https://patchwork.plctlab.org/api/1.2/patches/48538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JM8j9QbkSLMs68@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T09:50:42","name":"[committed] openmp, c++: Workaround fold_for_warn ICE on invalid OpenMP collapsed loops [PR108503]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JM8j9QbkSLMs68@tucnak/mbox/"},{"id":48560,"url":"https://patchwork.plctlab.org/api/1.2/patches/48560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JUvA7+lqVDt6WR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T10:23:56","name":"value-relation: Small tweaks to tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9JUvA7+lqVDt6WR@tucnak/mbox/"},{"id":48599,"url":"https://patchwork.plctlab.org/api/1.2/patches/48599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com/","msgid":"<2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com>","list_archive_url":null,"date":"2023-01-26T11:29:29","name":"[pushed] doc: Refer to projects as GCC and GDB (was: [PATCH] sourcebuild.texi: Document new toplevel directories [PR82383])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c1580f1-d5a0-f12d-6603-2f1b1e715284@pfeifer.com/mbox/"},{"id":48609,"url":"https://patchwork.plctlab.org/api/1.2/patches/48609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126124904.81D8013A09@imap2.suse-dmz.suse.de/","msgid":"<20230126124904.81D8013A09@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-26T12:49:04","name":"tree-optimization/108547 - robustify uninit predicate analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126124904.81D8013A09@imap2.suse-dmz.suse.de/mbox/"},{"id":48631,"url":"https://patchwork.plctlab.org/api/1.2/patches/48631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126131549.4785633EA6@hamza.pair.com/","msgid":"<20230126131549.4785633EA6@hamza.pair.com>","list_archive_url":null,"date":"2023-01-26T13:15:47","name":"[pushed] libstdc++: Move www.open-std.org to https in bugs manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126131549.4785633EA6@hamza.pair.com/mbox/"},{"id":48649,"url":"https://patchwork.plctlab.org/api/1.2/patches/48649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133901.1428898-1-jwakely@redhat.com/","msgid":"<20230126133901.1428898-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:39:01","name":"[committed] libstdc++: Fix strings read from /etc/sysconfig/clock [PR108530]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133901.1428898-1-jwakely@redhat.com/mbox/"},{"id":48651,"url":"https://patchwork.plctlab.org/api/1.2/patches/48651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133949.1428954-1-jwakely@redhat.com/","msgid":"<20230126133949.1428954-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:39:49","name":"[committed] libstdc++: Add returns_nonnull to non-inline std::map detail [PR108554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126133949.1428954-1-jwakely@redhat.com/mbox/"},{"id":48662,"url":"https://patchwork.plctlab.org/api/1.2/patches/48662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126135046.1441243-1-jwakely@redhat.com/","msgid":"<20230126135046.1441243-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-26T13:50:46","name":"[committed] libstdc++: Add workaround for old tzdata.zi files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126135046.1441243-1-jwakely@redhat.com/mbox/"},{"id":48702,"url":"https://patchwork.plctlab.org/api/1.2/patches/48702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142032.500073-1-dmalcolm@redhat.com/","msgid":"<20230126142032.500073-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-26T14:20:32","name":"[committed] analyzer: fix false positives from -Wanalyzer-infinite-recursion [PR108524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142032.500073-1-dmalcolm@redhat.com/mbox/"},{"id":48703,"url":"https://patchwork.plctlab.org/api/1.2/patches/48703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142045.500121-1-dmalcolm@redhat.com/","msgid":"<20230126142045.500121-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-01-26T14:20:45","name":"[committed] analyzer: fix SARD-tc841-basic-00182-min.c test case [PR108507]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126142045.500121-1-dmalcolm@redhat.com/mbox/"},{"id":48768,"url":"https://patchwork.plctlab.org/api/1.2/patches/48768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsffxmhbj.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:44:16","name":"vect/aarch64: Fix various sve/cond*.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsffxmhbj.fsf@arm.com/mbox/"},{"id":48771,"url":"https://patchwork.plctlab.org/api/1.2/patches/48771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk019mgyt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:51:54","name":"[1/4] aarch64: Remove slp_13.c XFAILs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk019mgyt.fsf@arm.com/mbox/"},{"id":48772,"url":"https://patchwork.plctlab.org/api/1.2/patches/48772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz71mgxz.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:52:24","name":"[pushed] aarch64: Suppress warnings in pr99766.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz71mgxz.fsf@arm.com/mbox/"},{"id":48774,"url":"https://patchwork.plctlab.org/api/1.2/patches/48774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rhpmgx7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:52:52","name":"[pushed] Update guality XFAILs for aarch64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rhpmgx7.fsf@arm.com/mbox/"},{"id":48773,"url":"https://patchwork.plctlab.org/api/1.2/patches/48773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt357xmgwi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:53:17","name":"[pushed] aarch64: Remove expected error for compound literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt357xmgwi.fsf@arm.com/mbox/"},{"id":48776,"url":"https://patchwork.plctlab.org/api/1.2/patches/48776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KjbJA8HZs3nLNX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T15:59:40","name":"tree: Fix up tree_code_{length,type}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KjbJA8HZs3nLNX@tucnak/mbox/"},{"id":48781,"url":"https://patchwork.plctlab.org/api/1.2/patches/48781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ktl1w3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:02:52","name":"testsuite: Fix hwasan/arguments-3.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ktl1w3.fsf@arm.com/mbox/"},{"id":48789,"url":"https://patchwork.plctlab.org/api/1.2/patches/48789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KqmIR9OWrM+pVh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:30:16","name":"[committed] frange: Fix up foperator_{,not_}equal::fold_range for signed zeros [PR108540]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9KqmIR9OWrM+pVh@tucnak/mbox/"},{"id":48792,"url":"https://patchwork.plctlab.org/api/1.2/patches/48792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126163257.13458-1-iain@sandoe.co.uk/","msgid":"<20230126163257.13458-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-26T16:32:57","name":"[pushed] Modula-2: Remove debug code [PR108553].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126163257.13458-1-iain@sandoe.co.uk/mbox/"},{"id":48800,"url":"https://patchwork.plctlab.org/api/1.2/patches/48800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmedrhtfl7.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:39:48","name":"riscv: Enable -fasynchronous_unwind_tables by default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmedrhtfl7.fsf@suse.de/mbox/"},{"id":48804,"url":"https://patchwork.plctlab.org/api/1.2/patches/48804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Ks/THdiuq70HW3@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-26T16:40:29","name":"[v2] opts: SANITIZE_ADDRESS wrongly cleared [PR108543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Ks/THdiuq70HW3@redhat.com/mbox/"},{"id":48845,"url":"https://patchwork.plctlab.org/api/1.2/patches/48845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183824.285183-1-dimitar@dinux.eu/","msgid":"<20230126183824.285183-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-26T18:38:24","name":"[GCC-12,committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183824.285183-1-dimitar@dinux.eu/mbox/"},{"id":48846,"url":"https://patchwork.plctlab.org/api/1.2/patches/48846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183902.285310-1-dimitar@dinux.eu/","msgid":"<20230126183902.285310-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-01-26T18:39:02","name":"[GCC-11,committed] pru: Fix CLZ expansion for QI and HI modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126183902.285310-1-dimitar@dinux.eu/mbox/"},{"id":48862,"url":"https://patchwork.plctlab.org/api/1.2/patches/48862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126191811.48240-1-kito.cheng@sifive.com/","msgid":"<20230126191811.48240-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-01-26T19:18:11","name":"[committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126191811.48240-1-kito.cheng@sifive.com/mbox/"},{"id":48879,"url":"https://patchwork.plctlab.org/api/1.2/patches/48879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126202745.49379-1-iain@sandoe.co.uk/","msgid":"<20230126202745.49379-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-26T20:27:45","name":"Modula-2: Add claimed command line options to lang.opt [PR108555].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126202745.49379-1-iain@sandoe.co.uk/mbox/"},{"id":48927,"url":"https://patchwork.plctlab.org/api/1.2/patches/48927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126221732.617749-1-polacek@redhat.com/","msgid":"<20230126221732.617749-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-26T22:17:32","name":"c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126221732.617749-1-polacek@redhat.com/mbox/"},{"id":48958,"url":"https://patchwork.plctlab.org/api/1.2/patches/48958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126232919.E8F6F33E50@hamza.pair.com/","msgid":"<20230126232919.E8F6F33E50@hamza.pair.com>","list_archive_url":null,"date":"2023-01-26T23:29:18","name":"[pushed] wwwdocs: git: Tweak link to TR29124 C++ reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230126232919.E8F6F33E50@hamza.pair.com/mbox/"},{"id":48992,"url":"https://patchwork.plctlab.org/api/1.2/patches/48992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127001617.CE64D33E9E@hamza.pair.com/","msgid":"<20230127001617.CE64D33E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:16:15","name":"[pushed] wwwdocs: codingconventions: Update upstream instructions for libstdc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127001617.CE64D33E9E@hamza.pair.com/mbox/"},{"id":48998,"url":"https://patchwork.plctlab.org/api/1.2/patches/48998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14d1bcfece7c54a22811291496b8b7cd9d438ae.1674777149.git.arsen@aarsen.me/","msgid":"","list_archive_url":null,"date":"2023-01-27T00:18:29","name":"[1/7] docs: Create Indices appendix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14d1bcfece7c54a22811291496b8b7cd9d438ae.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49003,"url":"https://patchwork.plctlab.org/api/1.2/patches/49003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me/","msgid":"<8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:31","name":"[3/7] **/*.texi: Reorder index entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8850cffaffae7e85824576b7761e446df8731115.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49002,"url":"https://patchwork.plctlab.org/api/1.2/patches/49002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me/","msgid":"<5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:32","name":"[4/7] docs: Mechanically reorder item/index combos in extend.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5083ca3ae3d5c7d9889b3fbba468ef67c7cff5f4.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49001,"url":"https://patchwork.plctlab.org/api/1.2/patches/49001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me/","msgid":"<2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:33","name":"[5/7] doc: Add @defbuiltin family of helpers, set documentlanguage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2644a7e02c65600c0b6fdd30f53bbd43756f20e5.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49000,"url":"https://patchwork.plctlab.org/api/1.2/patches/49000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me/","msgid":"<17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:35","name":"[7/7] update_web_docs_git: Update CSS reference to new manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c363159b5fd45dee0da75187869b4c3dd72927.1674777149.git.arsen@aarsen.me/mbox/"},{"id":49004,"url":"https://patchwork.plctlab.org/api/1.2/patches/49004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127003224.717347-1-arsen@aarsen.me/","msgid":"<20230127003224.717347-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-01-27T00:18:36","name":"[wwwdocs] Add revised Texinfo manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127003224.717347-1-arsen@aarsen.me/mbox/"},{"id":48993,"url":"https://patchwork.plctlab.org/api/1.2/patches/48993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002025.F269733E9E@hamza.pair.com/","msgid":"<20230127002025.F269733E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:20:24","name":"[pushed] wwwdocs: codingconventions: Update a link to Github docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002025.F269733E9E@hamza.pair.com/mbox/"},{"id":48994,"url":"https://patchwork.plctlab.org/api/1.2/patches/48994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002338.3871F33E4D@hamza.pair.com/","msgid":"<20230127002338.3871F33E4D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:23:36","name":"[pushed] wwwdocs: gcc-3.4: Update a link to use https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002338.3871F33E4D@hamza.pair.com/mbox/"},{"id":48995,"url":"https://patchwork.plctlab.org/api/1.2/patches/48995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002650.8AF7333E9E@hamza.pair.com/","msgid":"<20230127002650.8AF7333E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-27T00:26:48","name":"[pushed] wwwdocs: readings: Update Modula 3 link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127002650.8AF7333E9E@hamza.pair.com/mbox/"},{"id":49039,"url":"https://patchwork.plctlab.org/api/1.2/patches/49039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzga47ndl.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-01-27T01:54:46","name":"[FYI,docs] note that -g opts are implicitly negatable too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzga47ndl.fsf@lxoliva.fsfla.org/mbox/"},{"id":49057,"url":"https://patchwork.plctlab.org/api/1.2/patches/49057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp/","msgid":"<23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp>","list_archive_url":null,"date":"2023-01-27T03:17:33","name":"[v6] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/23119c5d-75a4-af2d-ad6e-8e125b0891f9@yahoo.co.jp/mbox/"},{"id":49116,"url":"https://patchwork.plctlab.org/api/1.2/patches/49116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9397df3-a72f-b9e6-b16c-8e3589c3cf09@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T08:24:18","name":"[committed] gomp/declare-variant-1*.f90: Update for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9397df3-a72f-b9e6-b16c-8e3589c3cf09@codesourcery.com/mbox/"},{"id":49117,"url":"https://patchwork.plctlab.org/api/1.2/patches/49117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OTCEBcvrMQeQqy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:02:00","name":"cgraph: Adjust verify_corresponds_to_fndecl [PR106061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OTCEBcvrMQeQqy@tucnak/mbox/"},{"id":49118,"url":"https://patchwork.plctlab.org/api/1.2/patches/49118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OUvmVFcSU5Eaix@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:09:18","name":"doc: Fix up return type of __builtin_va_arg_pack_len [PR108560]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OUvmVFcSU5Eaix@tucnak/mbox/"},{"id":49122,"url":"https://patchwork.plctlab.org/api/1.2/patches/49122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb57f55b-3b84-c853-3bab-731c5c6608c2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:19:42","name":"OpenMP/Fortran: Fix has_device_addr clause splitting [PR108558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb57f55b-3b84-c853-3bab-731c5c6608c2@codesourcery.com/mbox/"},{"id":49130,"url":"https://patchwork.plctlab.org/api/1.2/patches/49130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OZibQSy8DYxwbd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T09:29:45","name":"libstdc++: Fix up FAIL in 17_intro/names.cc on glibc < 2.19 [PR108568]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9OZibQSy8DYxwbd@tucnak/mbox/"},{"id":49169,"url":"https://patchwork.plctlab.org/api/1.2/patches/49169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16839-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T10:36:17","name":"AArch64: Fix native detection in the presence of mandatory features which don'\''t have midr values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16839-tamar@arm.com/mbox/"},{"id":49171,"url":"https://patchwork.plctlab.org/api/1.2/patches/49171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16829-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T10:39:25","name":"AArch64: Fix codegen regressions around tbz.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16829-tamar@arm.com/mbox/"},{"id":49187,"url":"https://patchwork.plctlab.org/api/1.2/patches/49187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmb0kzir.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T11:06:20","name":"[1/2] Add support for conditional xorsign [PR96373]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpmb0kzir.fsf@arm.com/mbox/"},{"id":49191,"url":"https://patchwork.plctlab.org/api/1.2/patches/49191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk018kzex.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T11:08:38","name":"[2/2] vect: Make partial trapping ops use predication [PR96373]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptk018kzex.fsf@arm.com/mbox/"},{"id":49308,"url":"https://patchwork.plctlab.org/api/1.2/patches/49308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127114627.243812-1-xry111@xry111.site/","msgid":"<20230127114627.243812-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-01-27T11:46:27","name":"testsuite: Use noipa and noinline attributes for pr95115 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127114627.243812-1-xry111@xry111.site/mbox/"},{"id":49348,"url":"https://patchwork.plctlab.org/api/1.2/patches/49348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127123020.260769-1-juzhe.zhong@rivai.ai/","msgid":"<20230127123020.260769-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T12:30:20","name":"RISC-V: Fix testcases check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127123020.260769-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49408,"url":"https://patchwork.plctlab.org/api/1.2/patches/49408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz/","msgid":"<44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz>","list_archive_url":null,"date":"2023-01-27T13:59:43","name":"driver: fix -gz=none error message with missing zstd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/44ab2b97-f77c-ae8b-c701-593839c99197@suse.cz/mbox/"},{"id":49451,"url":"https://patchwork.plctlab.org/api/1.2/patches/49451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127144311.2188730-1-andrea.corallo@arm.com/","msgid":"<20230127144311.2188730-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-01-27T14:43:11","name":"arm: Implement arm Function target attribute '\''branch-protection'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127144311.2188730-1-andrea.corallo@arm.com/mbox/"},{"id":49462,"url":"https://patchwork.plctlab.org/api/1.2/patches/49462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154429.1599859-1-jwakely@redhat.com/","msgid":"<20230127154429.1599859-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-27T15:44:29","name":"[committed] libstdc++: Use dg-bogus in new test [PR108554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154429.1599859-1-jwakely@redhat.com/mbox/"},{"id":49463,"url":"https://patchwork.plctlab.org/api/1.2/patches/49463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154529.1601707-1-jwakely@redhat.com/","msgid":"<20230127154529.1601707-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-01-27T15:45:29","name":"[committed] libstdc++: Use constant for name of tzdata file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127154529.1601707-1-jwakely@redhat.com/mbox/"},{"id":49534,"url":"https://patchwork.plctlab.org/api/1.2/patches/49534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycrkiv5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:06:06","name":"[pushed] aarch64: Prevent simd tests from being optimised away","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycrkiv5.fsf@arm.com/mbox/"},{"id":49539,"url":"https://patchwork.plctlab.org/api/1.2/patches/49539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga3j49h.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:06:50","name":"[pushed] testsuite: Two adjustments to gcc.dg/vect/complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzga3j49h.fsf@arm.com/mbox/"},{"id":49551,"url":"https://patchwork.plctlab.org/api/1.2/patches/49551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6ca16d1-28d9-463e-bbed-ce6dfad7a887@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T17:44:59","name":"[GCC] arm: Optimize arm-mlib.h header inclusion (pr108505).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6ca16d1-28d9-463e-bbed-ce6dfad7a887@AZ-NEU-EX04.Arm.com/mbox/"},{"id":49700,"url":"https://patchwork.plctlab.org/api/1.2/patches/49700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8df3e-bf4f-804b-2e47-6430848d1e81@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-01-27T21:39:59","name":"[committed] c: Disallow braces around C2x auto initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8df3e-bf4f-804b-2e47-6430848d1e81@codesourcery.com/mbox/"},{"id":49703,"url":"https://patchwork.plctlab.org/api/1.2/patches/49703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-1-ppalka@redhat.com/","msgid":"<20230127220250.1896137-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-27T22:02:49","name":"[1/2] c++: make manifestly_const_eval tri-state","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-1-ppalka@redhat.com/mbox/"},{"id":49702,"url":"https://patchwork.plctlab.org/api/1.2/patches/49702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-2-ppalka@redhat.com/","msgid":"<20230127220250.1896137-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-27T22:02:50","name":"[2/2] c++: speculative constexpr and is_constant_evaluated [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127220250.1896137-2-ppalka@redhat.com/mbox/"},{"id":49716,"url":"https://patchwork.plctlab.org/api/1.2/patches/49716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127225714.261700-1-juzhe.zhong@rivai.ai/","msgid":"<20230127225714.261700-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T22:57:14","name":"RISC-V: Remove redundant attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127225714.261700-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49719,"url":"https://patchwork.plctlab.org/api/1.2/patches/49719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Rb2eRAm/kUbWyZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-27T23:18:49","name":"sched-deps, cselib: Fix up some -fcompare-debug issues and regressions [PR108463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9Rb2eRAm/kUbWyZ@tucnak/mbox/"},{"id":49720,"url":"https://patchwork.plctlab.org/api/1.2/patches/49720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232608.276006-1-juzhe.zhong@rivai.ai/","msgid":"<20230127232608.276006-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T23:26:08","name":"RISC-V: Add vlse/vsse intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232608.276006-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49721,"url":"https://patchwork.plctlab.org/api/1.2/patches/49721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232757.276372-1-juzhe.zhong@rivai.ai/","msgid":"<20230127232757.276372-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-27T23:27:57","name":"RISC-V: Add vlse/vsse C/C++ intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230127232757.276372-1-juzhe.zhong@rivai.ai/mbox/"},{"id":49763,"url":"https://patchwork.plctlab.org/api/1.2/patches/49763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com/","msgid":"<79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com>","list_archive_url":null,"date":"2023-01-28T01:04:44","name":"[1/3] Properly set GORI relation trios.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79c78a5a-f2ec-7a1e-c3d6-d7091a2b4540@redhat.com/mbox/"},{"id":49764,"url":"https://patchwork.plctlab.org/api/1.2/patches/49764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe85adad-8778-8cac-0d75-5440bb15049d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-28T01:04:50","name":"[2/3] PR tree-optimization/108359","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe85adad-8778-8cac-0d75-5440bb15049d@redhat.com/mbox/"},{"id":49765,"url":"https://patchwork.plctlab.org/api/1.2/patches/49765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128012455.7414833E86@hamza.pair.com/","msgid":"<20230128012455.7414833E86@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T01:24:53","name":"[pushed] wwwdocs: codingconventions: Replace markup by ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128012455.7414833E86@hamza.pair.com/mbox/"},{"id":49767,"url":"https://patchwork.plctlab.org/api/1.2/patches/49767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128015215.399F033E86@hamza.pair.com/","msgid":"<20230128015215.399F033E86@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T01:52:13","name":"[pushed] wwwdocs: mirrors: Switch ftp.fu-berlin.de from ftp to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128015215.399F033E86@hamza.pair.com/mbox/"},{"id":49835,"url":"https://patchwork.plctlab.org/api/1.2/patches/49835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128101512.9238F33E84@hamza.pair.com/","msgid":"<20230128101512.9238F33E84@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:15:10","name":"[pushed] libstdc++: Switch www.open-std.org to https (ABI manual)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128101512.9238F33E84@hamza.pair.com/mbox/"},{"id":49836,"url":"https://patchwork.plctlab.org/api/1.2/patches/49836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128102441.CA8B533E74@hamza.pair.com/","msgid":"<20230128102441.CA8B533E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:24:39","name":"[pushed] doc: Update Go1 link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128102441.CA8B533E74@hamza.pair.com/mbox/"},{"id":49838,"url":"https://patchwork.plctlab.org/api/1.2/patches/49838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128103814.D29DF33E74@hamza.pair.com/","msgid":"<20230128103814.D29DF33E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:38:12","name":"[pushed] doc: Update reference to AddressSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128103814.D29DF33E74@hamza.pair.com/mbox/"},{"id":49843,"url":"https://patchwork.plctlab.org/api/1.2/patches/49843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128105141.6217333E74@hamza.pair.com/","msgid":"<20230128105141.6217333E74@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T10:51:39","name":"[pushed] libstdc++: Move sourceforge.net links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128105141.6217333E74@hamza.pair.com/mbox/"},{"id":49846,"url":"https://patchwork.plctlab.org/api/1.2/patches/49846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128111449.81D0833E77@hamza.pair.com/","msgid":"<20230128111449.81D0833E77@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T11:14:47","name":"[pushed,C++] wwwdocs: faq: Remove \"Copy constructor access check\" entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128111449.81D0833E77@hamza.pair.com/mbox/"},{"id":49855,"url":"https://patchwork.plctlab.org/api/1.2/patches/49855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132131.D9DCC33E8C@hamza.pair.com/","msgid":"<20230128132131.D9DCC33E8C@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T13:21:30","name":"[pushed] wwwdocs: bugs: Adjust link to ISO C++ standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132131.D9DCC33E8C@hamza.pair.com/mbox/"},{"id":49856,"url":"https://patchwork.plctlab.org/api/1.2/patches/49856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132353.77631-1-iain@sandoe.co.uk/","msgid":"<20230128132353.77631-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-28T13:23:53","name":"[pushed] Modula-2: Claim Wreturn-type in lang.opt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128132353.77631-1-iain@sandoe.co.uk/mbox/"},{"id":49873,"url":"https://patchwork.plctlab.org/api/1.2/patches/49873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-26885791-f651-4f0a-a2c7-0c03ca90b149-1674925670220@3c-app-gmx-bs11/","msgid":"","list_archive_url":null,"date":"2023-01-28T17:07:50","name":"Fortran: diagnose USE associated symbols in COMMON blocks [PR108453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-26885791-f651-4f0a-a2c7-0c03ca90b149-1674925670220@3c-app-gmx-bs11/mbox/"},{"id":49875,"url":"https://patchwork.plctlab.org/api/1.2/patches/49875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24646027-deae-ef6b-4b96-1de0776938a9@gmail.com/","msgid":"<24646027-deae-ef6b-4b96-1de0776938a9@gmail.com>","list_archive_url":null,"date":"2023-01-28T17:31:35","name":"Fix excess warnings for mingw-w64 (LLP64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24646027-deae-ef6b-4b96-1de0776938a9@gmail.com/mbox/"},{"id":49895,"url":"https://patchwork.plctlab.org/api/1.2/patches/49895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab676a99-e22c-08fa-787a-4b7586a2bd60@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-01-28T18:16:40","name":"pr65658.c: fix excess warnings on LLP64 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab676a99-e22c-08fa-787a-4b7586a2bd60@gmail.com/mbox/"},{"id":49897,"url":"https://patchwork.plctlab.org/api/1.2/patches/49897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128182729.A560D33E6B@hamza.pair.com/","msgid":"<20230128182729.A560D33E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T18:27:27","name":"[pushed] doc: Update link to Objective-C book","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128182729.A560D33E6B@hamza.pair.com/mbox/"},{"id":49907,"url":"https://patchwork.plctlab.org/api/1.2/patches/49907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128203621.28B6A33E60@hamza.pair.com/","msgid":"<20230128203621.28B6A33E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T20:36:19","name":"[pushed] wwwdocs: cxx-status: Fix link to GCC 10 release notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128203621.28B6A33E60@hamza.pair.com/mbox/"},{"id":49911,"url":"https://patchwork.plctlab.org/api/1.2/patches/49911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215623.9C2F433E60@hamza.pair.com/","msgid":"<20230128215623.9C2F433E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T21:56:21","name":"[v2,pushed] wwwdocs: projects/gomp: Editorial changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215623.9C2F433E60@hamza.pair.com/mbox/"},{"id":49912,"url":"https://patchwork.plctlab.org/api/1.2/patches/49912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215850.6D1B233E60@hamza.pair.com/","msgid":"<20230128215850.6D1B233E60@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T21:58:48","name":"[pushed] wwwdocs: gcc-11: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128215850.6D1B233E60@hamza.pair.com/mbox/"},{"id":49913,"url":"https://patchwork.plctlab.org/api/1.2/patches/49913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128221210.B246733E4B@hamza.pair.com/","msgid":"<20230128221210.B246733E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T22:12:08","name":"[pushed] libstdc++: Update links in the \"Contributing\" manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128221210.B246733E4B@hamza.pair.com/mbox/"},{"id":49914,"url":"https://patchwork.plctlab.org/api/1.2/patches/49914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222056.D868833E4D@hamza.pair.com/","msgid":"<20230128222056.D868833E4D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-28T22:20:55","name":"[pushed] doc: Update link to the AVR-Libc manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222056.D868833E4D@hamza.pair.com/mbox/"},{"id":49915,"url":"https://patchwork.plctlab.org/api/1.2/patches/49915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222425.1185711-1-apinski@marvell.com/","msgid":"<20230128222425.1185711-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-01-28T22:24:25","name":"Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128222425.1185711-1-apinski@marvell.com/mbox/"},{"id":49916,"url":"https://patchwork.plctlab.org/api/1.2/patches/49916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128231214.1257560-1-philipp.tomsich@vrull.eu/","msgid":"<20230128231214.1257560-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-01-28T23:12:14","name":"aarch64: Update Ampere-1A (-mcpu=ampere1a) to include SM4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230128231214.1257560-1-philipp.tomsich@vrull.eu/mbox/"},{"id":49918,"url":"https://patchwork.plctlab.org/api/1.2/patches/49918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012041.930809-1-hongtao.liu@intel.com/","msgid":"<20230129012041.930809-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-01-29T01:20:41","name":"Change AVX512FP16 to AVX512-FP16 in the document.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012041.930809-1-hongtao.liu@intel.com/mbox/"},{"id":49919,"url":"https://patchwork.plctlab.org/api/1.2/patches/49919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012352.930881-1-hongtao.liu@intel.com/","msgid":"<20230129012352.930881-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-01-29T01:23:52","name":"Change AVX512FP16 to AVX512-FP16 which is official name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129012352.930881-1-hongtao.liu@intel.com/mbox/"},{"id":49940,"url":"https://patchwork.plctlab.org/api/1.2/patches/49940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com/","msgid":"<56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com>","list_archive_url":null,"date":"2023-01-29T04:17:30","name":"[fortran] PR103506 [10/11/12/13 Regression] ICE in gfc_free_namespace, at fortran/symbol.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56d431f3-a8d5-a122-41e6-df472c41b326@protonmail.com/mbox/"},{"id":49959,"url":"https://patchwork.plctlab.org/api/1.2/patches/49959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129113451.24516-1-iain@sandoe.co.uk/","msgid":"<20230129113451.24516-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-01-29T11:34:51","name":"driver, toplevel: Avoid emitting the version information twice.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129113451.24516-1-iain@sandoe.co.uk/mbox/"},{"id":49979,"url":"https://patchwork.plctlab.org/api/1.2/patches/49979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129141909.37927-1-lehua.ding@rivai.ai/","msgid":"<20230129141909.37927-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-01-29T14:19:09","name":"[V2,1/1,fwprop] : Add the support of forwarding the vec_duplicate rtx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129141909.37927-1-lehua.ding@rivai.ai/mbox/"},{"id":50005,"url":"https://patchwork.plctlab.org/api/1.2/patches/50005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153233.219454-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153233.219454-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:32:33","name":"RISC-V: Add indexed loads/stores C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153233.219454-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50006,"url":"https://patchwork.plctlab.org/api/1.2/patches/50006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153457.220337-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153457.220337-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:34:57","name":"RISC-V: Add VSETVL testcases for indexed loads/stores.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153457.220337-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50007,"url":"https://patchwork.plctlab.org/api/1.2/patches/50007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153721.220810-1-juzhe.zhong@rivai.ai/","msgid":"<20230129153721.220810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:37:21","name":"RISC-V: Add indexed loads/stores constraints testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129153721.220810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50012,"url":"https://patchwork.plctlab.org/api/1.2/patches/50012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154424.222326-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154424.222326-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:44:24","name":"RISC-V: Add vloxei8 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154424.222326-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50013,"url":"https://patchwork.plctlab.org/api/1.2/patches/50013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154654.222798-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154654.222798-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:46:54","name":"RISC-V: Add vloxei16 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154654.222798-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50014,"url":"https://patchwork.plctlab.org/api/1.2/patches/50014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154846.223253-1-juzhe.zhong@rivai.ai/","msgid":"<20230129154846.223253-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:48:46","name":"RISC-V: Add vloxei32 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129154846.223253-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50015,"url":"https://patchwork.plctlab.org/api/1.2/patches/50015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155034.223826-1-juzhe.zhong@rivai.ai/","msgid":"<20230129155034.223826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:50:34","name":"RISC-V: Add vloxei64 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155034.223826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50016,"url":"https://patchwork.plctlab.org/api/1.2/patches/50016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155235.224444-1-juzhe.zhong@rivai.ai/","msgid":"<20230129155235.224444-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T15:52:35","name":"RISC-V: Add vluxei8 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129155235.224444-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50021,"url":"https://patchwork.plctlab.org/api/1.2/patches/50021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr/","msgid":"<673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr>","list_archive_url":null,"date":"2023-01-29T16:21:36","name":"fortran: Explicitly set name for *LOC default BACK argument [PR108450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/673726a8-fdce-6c8a-0814-3d0ad666fa2c@orange.fr/mbox/"},{"id":50046,"url":"https://patchwork.plctlab.org/api/1.2/patches/50046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129225639.88642-1-juzhe.zhong@rivai.ai/","msgid":"<20230129225639.88642-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T22:56:39","name":"RISC-V: Add vluxei16 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129225639.88642-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50047,"url":"https://patchwork.plctlab.org/api/1.2/patches/50047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230632.89482-1-juzhe.zhong@rivai.ai/","msgid":"<20230129230632.89482-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:06:32","name":"RISC-V: Add vluxei32 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230632.89482-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50048,"url":"https://patchwork.plctlab.org/api/1.2/patches/50048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230830.89758-1-juzhe.zhong@rivai.ai/","msgid":"<20230129230830.89758-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:08:30","name":"RISC-V: Add vluxei64 C API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129230830.89758-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50049,"url":"https://patchwork.plctlab.org/api/1.2/patches/50049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231140.90181-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231140.90181-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:11:40","name":"RISC-V: Add vsoxei8 && vsoxei16 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231140.90181-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50057,"url":"https://patchwork.plctlab.org/api/1.2/patches/50057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231444.90559-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231444.90559-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:14:44","name":"RISC-V: Add vsoxei32 && vsoxei64 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231444.90559-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50063,"url":"https://patchwork.plctlab.org/api/1.2/patches/50063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231658.90834-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231658.90834-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:16:58","name":"RISC-V: Add vsoxei C API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231658.90834-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50064,"url":"https://patchwork.plctlab.org/api/1.2/patches/50064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231834.91087-1-juzhe.zhong@rivai.ai/","msgid":"<20230129231834.91087-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:18:34","name":"RISC-V: Add vsuxei C API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129231834.91087-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50065,"url":"https://patchwork.plctlab.org/api/1.2/patches/50065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232401.91674-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232401.91674-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:24:01","name":"RISC-V: Add vsuxei* C++ API intrinsics testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232401.91674-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50066,"url":"https://patchwork.plctlab.org/api/1.2/patches/50066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232625.91957-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232625.91957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:26:25","name":"RISC-V: Add vluxei8 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232625.91957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50067,"url":"https://patchwork.plctlab.org/api/1.2/patches/50067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232833.92227-1-juzhe.zhong@rivai.ai/","msgid":"<20230129232833.92227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:28:33","name":"RISC-V: Add vluxei16 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129232833.92227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50068,"url":"https://patchwork.plctlab.org/api/1.2/patches/50068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233209.92641-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233209.92641-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:32:09","name":"RISC-V: Add vluxei32 C++ intrinsic API testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233209.92641-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50069,"url":"https://patchwork.plctlab.org/api/1.2/patches/50069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233349.92875-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233349.92875-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:33:49","name":"RISC-V: Add vluxei64 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233349.92875-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50070,"url":"https://patchwork.plctlab.org/api/1.2/patches/50070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233538.93138-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233538.93138-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:35:38","name":"RISC-V: Add vloxei8 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233538.93138-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50071,"url":"https://patchwork.plctlab.org/api/1.2/patches/50071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233739.93397-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233739.93397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:37:39","name":"RISC-V: Add vloxei16 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233739.93397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50072,"url":"https://patchwork.plctlab.org/api/1.2/patches/50072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233929.93656-1-juzhe.zhong@rivai.ai/","msgid":"<20230129233929.93656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:39:29","name":"RISC-V: Add vloxei32 C++ API intrinsic testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129233929.93656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50073,"url":"https://patchwork.plctlab.org/api/1.2/patches/50073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129234050.93897-1-juzhe.zhong@rivai.ai/","msgid":"<20230129234050.93897-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-29T23:40:50","name":"RISC-V: Add vloxei64 C++ API intrinsic testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230129234050.93897-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50184,"url":"https://patchwork.plctlab.org/api/1.2/patches/50184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130083439.74B0E13A06@imap2.suse-dmz.suse.de/","msgid":"<20230130083439.74B0E13A06@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-30T08:34:39","name":"ipa/108511 - relax assert for undefined local statics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130083439.74B0E13A06@imap2.suse-dmz.suse.de/mbox/"},{"id":50203,"url":"https://patchwork.plctlab.org/api/1.2/patches/50203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130095038.3665C13444@imap2.suse-dmz.suse.de/","msgid":"<20230130095038.3665C13444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-30T09:50:37","name":"tree-optimization/108574 - wrong-code with PRE PHI node processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130095038.3665C13444@imap2.suse-dmz.suse.de/mbox/"},{"id":50280,"url":"https://patchwork.plctlab.org/api/1.2/patches/50280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7qgqhno.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-01-30T13:24:43","name":"[COMMITTED] testsuite: Restore TORTURE_OPTIONS in gm2/warnings/returntype/fail/warnings-returntype-fail.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7qgqhno.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":50362,"url":"https://patchwork.plctlab.org/api/1.2/patches/50362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9fpprBtBWo7+Hk+@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-30T16:00:38","name":"[v2] c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9fpprBtBWo7+Hk+@redhat.com/mbox/"},{"id":50438,"url":"https://patchwork.plctlab.org/api/1.2/patches/50438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130191038.2450035-1-ppalka@redhat.com/","msgid":"<20230130191038.2450035-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-30T19:10:38","name":"c++: excessive satisfaction in check_methods [PR108579]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130191038.2450035-1-ppalka@redhat.com/mbox/"},{"id":50440,"url":"https://patchwork.plctlab.org/api/1.2/patches/50440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com/","msgid":"<64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com>","list_archive_url":null,"date":"2023-01-30T19:46:33","name":"[3/3] tree-optimization/108385 - Add op2_range to pointer_plus.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64ec68a2-7a9f-4c20-0abe-7d36d7707ee4@redhat.com/mbox/"},{"id":50499,"url":"https://patchwork.plctlab.org/api/1.2/patches/50499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130213639.2585560-1-ppalka@redhat.com/","msgid":"<20230130213639.2585560-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-30T21:36:39","name":"c++: ICE on unviable/ambiguous constrained dtors [PR96745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130213639.2585560-1-ppalka@redhat.com/mbox/"},{"id":50519,"url":"https://patchwork.plctlab.org/api/1.2/patches/50519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130214846.C969933E8D@hamza.pair.com/","msgid":"<20230130214846.C969933E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-01-30T21:48:40","name":"[pushed] wwwdocs: gcc-4.7: Adjust link to \"Collecting User-Mode Dumps\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130214846.C969933E8D@hamza.pair.com/mbox/"},{"id":50520,"url":"https://patchwork.plctlab.org/api/1.2/patches/50520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb913976-46f3-7df4-bf40-1d3315b908de@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-01-30T21:52:00","name":"[wwwdocs] readings: Update AIX linker links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb913976-46f3-7df4-bf40-1d3315b908de@pfeifer.com/mbox/"},{"id":50521,"url":"https://patchwork.plctlab.org/api/1.2/patches/50521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc595eeb-4f3a-42c2-a0d5-c8454e324e38-1675115730988@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2023-01-30T21:55:31","name":"Fortran: prevent redundant integer division truncation warnings [PR108592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc595eeb-4f3a-42c2-a0d5-c8454e324e38-1675115730988@3c-app-gmx-bap49/mbox/"},{"id":50529,"url":"https://patchwork.plctlab.org/api/1.2/patches/50529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130222013.9CC5933E8E@hamza.pair.com/","msgid":"<20230130222013.9CC5933E8E@hamza.pair.com>","list_archive_url":null,"date":"2023-01-30T22:20:11","name":"[pushed] libstdc++: Update links in the Memory section of the manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230130222013.9CC5933E8E@hamza.pair.com/mbox/"},{"id":50561,"url":"https://patchwork.plctlab.org/api/1.2/patches/50561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131001455.D4C6133E90@hamza.pair.com/","msgid":"<20230131001455.D4C6133E90@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T00:14:53","name":"[pushed] doc: Change fsf.org to www.fsf.org in URLs (GFDL)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131001455.D4C6133E90@hamza.pair.com/mbox/"},{"id":50562,"url":"https://patchwork.plctlab.org/api/1.2/patches/50562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131003904.E564133E84@hamza.pair.com/","msgid":"<20230131003904.E564133E84@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T00:39:02","name":"[pushed] wwwdocs: cxx-dr-status: Switch www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131003904.E564133E84@hamza.pair.com/mbox/"},{"id":50571,"url":"https://patchwork.plctlab.org/api/1.2/patches/50571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9h+TFZKRmLzfUWj@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T02:34:52","name":"[v3] c++: fix ICE with -Wduplicated-cond [PR107593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9h+TFZKRmLzfUWj@redhat.com/mbox/"},{"id":50576,"url":"https://patchwork.plctlab.org/api/1.2/patches/50576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131023549.454983-1-polacek@redhat.com/","msgid":"<20230131023549.454983-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T02:35:49","name":"c++: wrong error with constexpr array and value-init [PR108158]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131023549.454983-1-polacek@redhat.com/mbox/"},{"id":50579,"url":"https://patchwork.plctlab.org/api/1.2/patches/50579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131033707.2597685-1-ppalka@redhat.com/","msgid":"<20230131033707.2597685-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-01-31T03:37:07","name":"don'\''t declare header-defined functions both static and inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131033707.2597685-1-ppalka@redhat.com/mbox/"},{"id":50584,"url":"https://patchwork.plctlab.org/api/1.2/patches/50584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131042547.111233-1-kito.cheng@sifive.com/","msgid":"<20230131042547.111233-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-01-31T04:25:47","name":"[committed] RISC-V: Simplify testcase condition for RVV tests [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131042547.111233-1-kito.cheng@sifive.com/mbox/"},{"id":50619,"url":"https://patchwork.plctlab.org/api/1.2/patches/50619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131061038.97059-1-cooper.qu@linux.alibaba.com/","msgid":"<20230131061038.97059-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-01-31T06:10:38","name":"testsuite: Fix pr108574-3.c failed in arch where sign defaults to unsigned.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131061038.97059-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":50673,"url":"https://patchwork.plctlab.org/api/1.2/patches/50673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jK8Bk6l6sxbuvC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:01:52","name":"i386: Fix up ix86_convert_const_wide_int_to_broadcast [PR108599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jK8Bk6l6sxbuvC@tucnak/mbox/"},{"id":50674,"url":"https://patchwork.plctlab.org/api/1.2/patches/50674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jMtem3lCSndTCo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:09:25","name":"i386: Fix up -Wuninitialized warnings in avx512erintrin.h [PR105593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jMtem3lCSndTCo@tucnak/mbox/"},{"id":50675,"url":"https://patchwork.plctlab.org/api/1.2/patches/50675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jOynMLnKFL6jTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:18:18","name":"bbpart: Fix up ICE on asm goto [PR108596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9jOynMLnKFL6jTu@tucnak/mbox/"},{"id":50695,"url":"https://patchwork.plctlab.org/api/1.2/patches/50695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a78ada54-1a0a-8914-917a-57baa71eb877@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T08:41:26","name":"[2/2,v3] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a78ada54-1a0a-8914-917a-57baa71eb877@arm.com/mbox/"},{"id":50760,"url":"https://patchwork.plctlab.org/api/1.2/patches/50760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba811e9b-2586-379f-9dce-69d7661f95ea@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-01-31T09:36:06","name":"[(pushed)] libsanitizer: Regenerate configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba811e9b-2586-379f-9dce-69d7661f95ea@suse.cz/mbox/"},{"id":50777,"url":"https://patchwork.plctlab.org/api/1.2/patches/50777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-01-31T11:28:23","name":"For Modula-2 build-tree testing, also set up paths to compiler libraries (was: [PATCH] 17/19 modula2 front end: dejagnu expect library scripts)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9zaqp4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":50786,"url":"https://patchwork.plctlab.org/api/1.2/patches/50786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131120631.299018-1-juzhe.zhong@rivai.ai/","msgid":"<20230131120631.299018-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:06:31","name":"RISC-V: Add integer binary vv C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131120631.299018-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50789,"url":"https://patchwork.plctlab.org/api/1.2/patches/50789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121206.301304-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121206.301304-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:12:06","name":"RISC-V: Add vxor.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121206.301304-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50790,"url":"https://patchwork.plctlab.org/api/1.2/patches/50790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121340.301935-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121340.301935-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:13:40","name":"RISC-V: Add vsub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121340.301935-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50791,"url":"https://patchwork.plctlab.org/api/1.2/patches/50791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121647.303063-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121647.303063-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:16:47","name":"RISC-V: Add srl.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121647.303063-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50792,"url":"https://patchwork.plctlab.org/api/1.2/patches/50792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121820.303684-1-juzhe.zhong@rivai.ai/","msgid":"<20230131121820.303684-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:18:20","name":"RISC-V: Add vsra.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131121820.303684-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50794,"url":"https://patchwork.plctlab.org/api/1.2/patches/50794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122023.304615-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122023.304615-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:20:23","name":"RISC-V: Add vsll.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122023.304615-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50795,"url":"https://patchwork.plctlab.org/api/1.2/patches/50795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122235.305444-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122235.305444-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:22:35","name":"RISC-V: Add vrem*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122235.305444-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50796,"url":"https://patchwork.plctlab.org/api/1.2/patches/50796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122519.306474-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122519.306474-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:25:19","name":"RISC-V: Add vor.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122519.306474-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50797,"url":"https://patchwork.plctlab.org/api/1.2/patches/50797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122709.307183-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122709.307183-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:27:09","name":"RISC-V: Add vmin*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122709.307183-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50798,"url":"https://patchwork.plctlab.org/api/1.2/patches/50798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122836.307772-1-juzhe.zhong@rivai.ai/","msgid":"<20230131122836.307772-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:28:36","name":"RISC-V: Add vmax*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131122836.307772-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50799,"url":"https://patchwork.plctlab.org/api/1.2/patches/50799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123006.308617-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123006.308617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:30:06","name":"RISC-V: Add vdiv*.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123006.308617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50800,"url":"https://patchwork.plctlab.org/api/1.2/patches/50800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123411.310092-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123411.310092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:34:11","name":"RISC-V: Add vand.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123411.310092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50801,"url":"https://patchwork.plctlab.org/api/1.2/patches/50801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123743.311357-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123743.311357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:37:43","name":"RISC-V: Add vadd.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123743.311357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50802,"url":"https://patchwork.plctlab.org/api/1.2/patches/50802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123933.312078-1-juzhe.zhong@rivai.ai/","msgid":"<20230131123933.312078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:39:33","name":"RISC-V: Add binop constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131123933.312078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50804,"url":"https://patchwork.plctlab.org/api/1.2/patches/50804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124106.312795-1-juzhe.zhong@rivai.ai/","msgid":"<20230131124106.312795-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:41:06","name":"RISC-V: Add vadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124106.312795-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50809,"url":"https://patchwork.plctlab.org/api/1.2/patches/50809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124946.315892-1-juzhe.zhong@rivai.ai/","msgid":"<20230131124946.315892-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:49:46","name":"RISC-V: Add vxor.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131124946.315892-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50810,"url":"https://patchwork.plctlab.org/api/1.2/patches/50810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125538.318073-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125538.318073-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:55:37","name":"RISC-V: Add vand.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125538.318073-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50811,"url":"https://patchwork.plctlab.org/api/1.2/patches/50811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125820.319080-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125820.319080-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:58:20","name":"RISC-V: Add vsrl.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125820.319080-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50812,"url":"https://patchwork.plctlab.org/api/1.2/patches/50812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125958.319738-1-juzhe.zhong@rivai.ai/","msgid":"<20230131125958.319738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T12:59:58","name":"RISC-V: Add vsra.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131125958.319738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50813,"url":"https://patchwork.plctlab.org/api/1.2/patches/50813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130137.320560-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130137.320560-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:01:37","name":"RISC-V: Add vsll.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130137.320560-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50814,"url":"https://patchwork.plctlab.org/api/1.2/patches/50814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130319.321249-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130319.321249-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:03:19","name":"RISC-V: Add vrem*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130319.321249-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50818,"url":"https://patchwork.plctlab.org/api/1.2/patches/50818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130517.322011-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130517.322011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:05:17","name":"RISC-V: Add vor.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130517.322011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50826,"url":"https://patchwork.plctlab.org/api/1.2/patches/50826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130650.322631-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130650.322631-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:06:50","name":"RISC-V: Add vmin*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130650.322631-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50824,"url":"https://patchwork.plctlab.org/api/1.2/patches/50824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0vag8en.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-01-31T13:06:56","name":"vect: Fix single def-use cycle for ifn reductions [PR108608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0vag8en.fsf@arm.com/mbox/"},{"id":50830,"url":"https://patchwork.plctlab.org/api/1.2/patches/50830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130839.323333-1-juzhe.zhong@rivai.ai/","msgid":"<20230131130839.323333-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:08:39","name":"RISC-V: Add vmax*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131130839.323333-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50833,"url":"https://patchwork.plctlab.org/api/1.2/patches/50833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131131028.324141-1-juzhe.zhong@rivai.ai/","msgid":"<20230131131028.324141-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T13:10:28","name":"RISC-V: Add vdiv*.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131131028.324141-1-juzhe.zhong@rivai.ai/mbox/"},{"id":50837,"url":"https://patchwork.plctlab.org/api/1.2/patches/50837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132246.660779-1-arthur.cohen@embecosm.com/","msgid":"<20230131132246.660779-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:22:46","name":"[COMMITTED] gccrs: session-manager: Add ast-pretty-expanded dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132246.660779-1-arthur.cohen@embecosm.com/mbox/"},{"id":50838,"url":"https://patchwork.plctlab.org/api/1.2/patches/50838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132407.661219-1-arthur.cohen@embecosm.com/","msgid":"<20230131132407.661219-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:07","name":"[COMMITTED] gccrs: builtins: Add add_overflow builtin and refactor class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132407.661219-1-arthur.cohen@embecosm.com/mbox/"},{"id":50843,"url":"https://patchwork.plctlab.org/api/1.2/patches/50843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132417.661302-1-arthur.cohen@embecosm.com/","msgid":"<20230131132417.661302-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:17","name":"[COMMITTED] gccrs: backend: Add overflow checks to every arithmetic operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132417.661302-1-arthur.cohen@embecosm.com/mbox/"},{"id":50905,"url":"https://patchwork.plctlab.org/api/1.2/patches/50905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132424.661382-1-arthur.cohen@embecosm.com/","msgid":"<20230131132424.661382-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:24","name":"[COMMITTED] gccrs: rustc_attrs: Allow `rustc_inherit_overflow_checks` as a builtin..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132424.661382-1-arthur.cohen@embecosm.com/mbox/"},{"id":50850,"url":"https://patchwork.plctlab.org/api/1.2/patches/50850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132429.661457-1-arthur.cohen@embecosm.com/","msgid":"<20230131132429.661457-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:29","name":"[COMMITTED] gccrs: lint: Do not emit unused warnings for public items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132429.661457-1-arthur.cohen@embecosm.com/mbox/"},{"id":50839,"url":"https://patchwork.plctlab.org/api/1.2/patches/50839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132435.661532-1-arthur.cohen@embecosm.com/","msgid":"<20230131132435.661532-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:35","name":"[COMMITTED] gccrs: parser: Parse RangeFullExpr without erroring out","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132435.661532-1-arthur.cohen@embecosm.com/mbox/"},{"id":50844,"url":"https://patchwork.plctlab.org/api/1.2/patches/50844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132441.661608-1-arthur.cohen@embecosm.com/","msgid":"<20230131132441.661608-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:41","name":"[COMMITTED] gccrs: macros: Handle matchers properly in repetitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132441.661608-1-arthur.cohen@embecosm.com/mbox/"},{"id":50857,"url":"https://patchwork.plctlab.org/api/1.2/patches/50857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132448.661684-1-arthur.cohen@embecosm.com/","msgid":"<20230131132448.661684-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:48","name":"[COMMITTED] gccrs: transcriber: Do not infinite loop if the current parsed node is an error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132448.661684-1-arthur.cohen@embecosm.com/mbox/"},{"id":50851,"url":"https://patchwork.plctlab.org/api/1.2/patches/50851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132456.661762-1-arthur.cohen@embecosm.com/","msgid":"<20230131132456.661762-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:24:56","name":"[COMMITTED] gccrs: dump: Add AST debugging using the AST::Dump class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132456.661762-1-arthur.cohen@embecosm.com/mbox/"},{"id":50856,"url":"https://patchwork.plctlab.org/api/1.2/patches/50856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132504.661840-1-arthur.cohen@embecosm.com/","msgid":"<20230131132504.661840-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:04","name":"[COMMITTED] gccrs: ast: Only expand expressions and types if the kind is right","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132504.661840-1-arthur.cohen@embecosm.com/mbox/"},{"id":50858,"url":"https://patchwork.plctlab.org/api/1.2/patches/50858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132510.661917-1-arthur.cohen@embecosm.com/","msgid":"<20230131132510.661917-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:10","name":"[COMMITTED] gccrs: ast: Add better assertion on AST fragments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132510.661917-1-arthur.cohen@embecosm.com/mbox/"},{"id":50913,"url":"https://patchwork.plctlab.org/api/1.2/patches/50913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132515.661993-1-arthur.cohen@embecosm.com/","msgid":"<20230131132515.661993-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:15","name":"[COMMITTED] gccrs: Add guards against getting data from an empty vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132515.661993-1-arthur.cohen@embecosm.com/mbox/"},{"id":50853,"url":"https://patchwork.plctlab.org/api/1.2/patches/50853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132520.662068-1-arthur.cohen@embecosm.com/","msgid":"<20230131132520.662068-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:20","name":"[COMMITTED] gccrs: Add missing location info to coercions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132520.662068-1-arthur.cohen@embecosm.com/mbox/"},{"id":50860,"url":"https://patchwork.plctlab.org/api/1.2/patches/50860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132525.662143-1-arthur.cohen@embecosm.com/","msgid":"<20230131132525.662143-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:25","name":"[COMMITTED] gccrs: Refactor unify to hit a unify_site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132525.662143-1-arthur.cohen@embecosm.com/mbox/"},{"id":50861,"url":"https://patchwork.plctlab.org/api/1.2/patches/50861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132530.662219-1-arthur.cohen@embecosm.com/","msgid":"<20230131132530.662219-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:30","name":"[COMMITTED] gccrs: Remove param_use_canonical_types checks ported from c++ front-end","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132530.662219-1-arthur.cohen@embecosm.com/mbox/"},{"id":50855,"url":"https://patchwork.plctlab.org/api/1.2/patches/50855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132538.662296-1-arthur.cohen@embecosm.com/","msgid":"<20230131132538.662296-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:38","name":"[COMMITTED] gccrs: Create canonical process of compiling constant items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132538.662296-1-arthur.cohen@embecosm.com/mbox/"},{"id":50859,"url":"https://patchwork.plctlab.org/api/1.2/patches/50859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132542.662372-1-arthur.cohen@embecosm.com/","msgid":"<20230131132542.662372-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:42","name":"[COMMITTED] gccrs: Add extra debugging for method call expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132542.662372-1-arthur.cohen@embecosm.com/mbox/"},{"id":50863,"url":"https://patchwork.plctlab.org/api/1.2/patches/50863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132546.662447-1-arthur.cohen@embecosm.com/","msgid":"<20230131132546.662447-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:46","name":"[COMMITTED] gccrs: Add new check for contains_associated_types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132546.662447-1-arthur.cohen@embecosm.com/mbox/"},{"id":50864,"url":"https://patchwork.plctlab.org/api/1.2/patches/50864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132550.662527-1-arthur.cohen@embecosm.com/","msgid":"<20230131132550.662527-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:50","name":"[COMMITTED] gccrs: Unit structs are not concrete when they need substitutions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132550.662527-1-arthur.cohen@embecosm.com/mbox/"},{"id":50911,"url":"https://patchwork.plctlab.org/api/1.2/patches/50911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132553.662602-1-arthur.cohen@embecosm.com/","msgid":"<20230131132553.662602-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:53","name":"[COMMITTED] gccrs: bugfix: initialize slice from array in const context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132553.662602-1-arthur.cohen@embecosm.com/mbox/"},{"id":50866,"url":"https://patchwork.plctlab.org/api/1.2/patches/50866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132555.662678-1-arthur.cohen@embecosm.com/","msgid":"<20230131132555.662678-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:55","name":"[COMMITTED] gccrs: add testcase to test component_ref and constructor codes in eval_constant_expression()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132555.662678-1-arthur.cohen@embecosm.com/mbox/"},{"id":50865,"url":"https://patchwork.plctlab.org/api/1.2/patches/50865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132559.662754-1-arthur.cohen@embecosm.com/","msgid":"<20230131132559.662754-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:25:59","name":"[COMMITTED] gccrs: backend: correctly formulate the exit condition ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132559.662754-1-arthur.cohen@embecosm.com/mbox/"},{"id":50871,"url":"https://patchwork.plctlab.org/api/1.2/patches/50871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132604.662832-1-arthur.cohen@embecosm.com/","msgid":"<20230131132604.662832-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:04","name":"[COMMITTED] gccrs: add testcase with struct to test component_ref and constructor codes..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132604.662832-1-arthur.cohen@embecosm.com/mbox/"},{"id":50870,"url":"https://patchwork.plctlab.org/api/1.2/patches/50870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132610.662984-1-arthur.cohen@embecosm.com/","msgid":"<20230131132610.662984-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:10","name":"[COMMITTED] gccrs: const generics: Make sure const generic types are visited properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132610.662984-1-arthur.cohen@embecosm.com/mbox/"},{"id":50862,"url":"https://patchwork.plctlab.org/api/1.2/patches/50862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132641.663441-1-arthur.cohen@embecosm.com/","msgid":"<20230131132641.663441-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:41","name":"[COMMITTED] gccrs: remove bad assertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132641.663441-1-arthur.cohen@embecosm.com/mbox/"},{"id":50868,"url":"https://patchwork.plctlab.org/api/1.2/patches/50868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132723.663982-1-arthur.cohen@embecosm.com/","msgid":"<20230131132723.663982-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:23","name":"[COMMITTED] gccrs: Fix duplicated function generation on higher ranked trait bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132723.663982-1-arthur.cohen@embecosm.com/mbox/"},{"id":50914,"url":"https://patchwork.plctlab.org/api/1.2/patches/50914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132729.664059-1-arthur.cohen@embecosm.com/","msgid":"<20230131132729.664059-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:29","name":"[COMMITTED] gccrs: Refactor TypeResolution to be a simple query based system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132729.664059-1-arthur.cohen@embecosm.com/mbox/"},{"id":50912,"url":"https://patchwork.plctlab.org/api/1.2/patches/50912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132736.664214-1-arthur.cohen@embecosm.com/","msgid":"<20230131132736.664214-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:36","name":"[COMMITTED] gccrs: Add testcase to show forward declared items work via TypeAlias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132736.664214-1-arthur.cohen@embecosm.com/mbox/"},{"id":50900,"url":"https://patchwork.plctlab.org/api/1.2/patches/50900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-2-qing.zhao@oracle.com/","msgid":"<20230131141140.3610133-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-31T14:11:39","name":"[1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-2-qing.zhao@oracle.com/mbox/"},{"id":50902,"url":"https://patchwork.plctlab.org/api/1.2/patches/50902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-3-qing.zhao@oracle.com/","msgid":"<20230131141140.3610133-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-01-31T14:11:40","name":"[2/2] Documentation Update.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131141140.3610133-3-qing.zhao@oracle.com/mbox/"},{"id":50903,"url":"https://patchwork.plctlab.org/api/1.2/patches/50903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131144544.452FD13585@imap2.suse-dmz.suse.de/","msgid":"<20230131144544.452FD13585@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-01-31T14:45:43","name":"middle-end/108500 - replace recursive domtree DFS traversal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131144544.452FD13585@imap2.suse-dmz.suse.de/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-01/mbox/"},{"id":15,"url":"https://patchwork.plctlab.org/api/1.2/bundles/15/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-02/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-02","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":50916,"url":"https://patchwork.plctlab.org/api/1.2/patches/50916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132324.661030-1-arthur.cohen@embecosm.com/","msgid":"<20230131132324.661030-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:23:24","name":"[COMMITTED] gccrs: Desugar double borrows into two HIR:BorrowExpr'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132324.661030-1-arthur.cohen@embecosm.com/mbox/"},{"id":50919,"url":"https://patchwork.plctlab.org/api/1.2/patches/50919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132335.661108-1-arthur.cohen@embecosm.com/","msgid":"<20230131132335.661108-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:23:36","name":"[COMMITTED] gccrs: backend: Expose Bvariable class through rust-gcc header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132335.661108-1-arthur.cohen@embecosm.com/mbox/"},{"id":50933,"url":"https://patchwork.plctlab.org/api/1.2/patches/50933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132607.662907-1-arthur.cohen@embecosm.com/","msgid":"<20230131132607.662907-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:07","name":"[COMMITTED] gccrs: testsuite: add loop condition execution test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132607.662907-1-arthur.cohen@embecosm.com/mbox/"},{"id":50932,"url":"https://patchwork.plctlab.org/api/1.2/patches/50932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132613.663060-1-arthur.cohen@embecosm.com/","msgid":"<20230131132613.663060-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:13","name":"[COMMITTED] gccrs: const generics: Forbid default values in Functions, Traits and Impls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132613.663060-1-arthur.cohen@embecosm.com/mbox/"},{"id":50935,"url":"https://patchwork.plctlab.org/api/1.2/patches/50935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132616.663136-1-arthur.cohen@embecosm.com/","msgid":"<20230131132616.663136-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:16","name":"[COMMITTED] gccrs: attributes: Add #[macro_use] as builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132616.663136-1-arthur.cohen@embecosm.com/mbox/"},{"id":50928,"url":"https://patchwork.plctlab.org/api/1.2/patches/50928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132620.663213-1-arthur.cohen@embecosm.com/","msgid":"<20230131132620.663213-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:20","name":"[COMMITTED] gccrs: module lowering: Do not append null pointers as items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132620.663213-1-arthur.cohen@embecosm.com/mbox/"},{"id":50930,"url":"https://patchwork.plctlab.org/api/1.2/patches/50930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132624.663288-1-arthur.cohen@embecosm.com/","msgid":"<20230131132624.663288-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:24","name":"[COMMITTED] gccrs: Static Items must be const evaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132624.663288-1-arthur.cohen@embecosm.com/mbox/"},{"id":50934,"url":"https://patchwork.plctlab.org/api/1.2/patches/50934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132633.663363-1-arthur.cohen@embecosm.com/","msgid":"<20230131132633.663363-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:33","name":"[COMMITTED] gccrs: Statics are a coercion site","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132633.663363-1-arthur.cohen@embecosm.com/mbox/"},{"id":50923,"url":"https://patchwork.plctlab.org/api/1.2/patches/50923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132650.663517-1-arthur.cohen@embecosm.com/","msgid":"<20230131132650.663517-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:50","name":"[COMMITTED] gccrs: Add testcase for const-eval issue from rust-blog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132650.663517-1-arthur.cohen@embecosm.com/mbox/"},{"id":50931,"url":"https://patchwork.plctlab.org/api/1.2/patches/50931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132656.663600-1-arthur.cohen@embecosm.com/","msgid":"<20230131132656.663600-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:26:56","name":"[COMMITTED] gccrs: rust: Add -frust-compile-until option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132656.663600-1-arthur.cohen@embecosm.com/mbox/"},{"id":50929,"url":"https://patchwork.plctlab.org/api/1.2/patches/50929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132703.663677-1-arthur.cohen@embecosm.com/","msgid":"<20230131132703.663677-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:03","name":"[COMMITTED] gccrs: expand: eager evaluate macros inside builtin macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132703.663677-1-arthur.cohen@embecosm.com/mbox/"},{"id":50920,"url":"https://patchwork.plctlab.org/api/1.2/patches/50920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132709.663756-1-arthur.cohen@embecosm.com/","msgid":"<20230131132709.663756-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:09","name":"[COMMITTED] gccrs: testsuite/rust: add a testcase for testing ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132709.663756-1-arthur.cohen@embecosm.com/mbox/"},{"id":50927,"url":"https://patchwork.plctlab.org/api/1.2/patches/50927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132716.663831-1-arthur.cohen@embecosm.com/","msgid":"<20230131132716.663831-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:16","name":"[COMMITTED] gccrs: Cleanup formatting of backend expression visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132716.663831-1-arthur.cohen@embecosm.com/mbox/"},{"id":50917,"url":"https://patchwork.plctlab.org/api/1.2/patches/50917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132720.663907-1-arthur.cohen@embecosm.com/","msgid":"<20230131132720.663907-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:20","name":"[COMMITTED] gccrs: Make constexpr constructors type-checking more permissive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132720.663907-1-arthur.cohen@embecosm.com/mbox/"},{"id":50922,"url":"https://patchwork.plctlab.org/api/1.2/patches/50922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132732.664139-1-arthur.cohen@embecosm.com/","msgid":"<20230131132732.664139-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-01-31T13:27:32","name":"[COMMITTED] gccrs: Add testcase to show forward declared items work","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131132732.664139-1-arthur.cohen@embecosm.com/mbox/"},{"id":50936,"url":"https://patchwork.plctlab.org/api/1.2/patches/50936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131153702.2844226-1-philipp.tomsich@vrull.eu/","msgid":"<20230131153702.2844226-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-01-31T15:37:02","name":"[COMMITTED] PR target/108589 - Check REG_P for AARCH64_FUSE_ADDSUB_2REG_CONST1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131153702.2844226-1-philipp.tomsich@vrull.eu/mbox/"},{"id":51000,"url":"https://patchwork.plctlab.org/api/1.2/patches/51000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131183001.377458-1-polacek@redhat.com/","msgid":"<20230131183001.377458-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T18:30:01","name":"[pushed] c++: Add fixed test [PR102870]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131183001.377458-1-polacek@redhat.com/mbox/"},{"id":51029,"url":"https://patchwork.plctlab.org/api/1.2/patches/51029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com/","msgid":"<4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com>","list_archive_url":null,"date":"2023-01-31T20:10:39","name":"PR tree-optimization/108356 - Ranger cache - always use range_from_dom when updating.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4edb00e2-4691-bdd4-1b4d-12e6b9983ad7@redhat.com/mbox/"},{"id":51031,"url":"https://patchwork.plctlab.org/api/1.2/patches/51031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131204134.725217-1-polacek@redhat.com/","msgid":"<20230131204134.725217-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-01-31T20:41:34","name":"c++: ICE with -Wlogical-op [PR107755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131204134.725217-1-polacek@redhat.com/mbox/"},{"id":51044,"url":"https://patchwork.plctlab.org/api/1.2/patches/51044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220724.19131-1-juzhe.zhong@rivai.ai/","msgid":"<20230131220724.19131-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:07:24","name":"RISC-V: Add RVV shift.vx C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220724.19131-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51046,"url":"https://patchwork.plctlab.org/api/1.2/patches/51046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220958.20394-1-juzhe.zhong@rivai.ai/","msgid":"<20230131220958.20394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:09:58","name":"RISC-V: Add vsrl.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131220958.20394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51047,"url":"https://patchwork.plctlab.org/api/1.2/patches/51047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221110.20996-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221110.20996-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:11:10","name":"RISC-V: Add vsra.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221110.20996-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51048,"url":"https://patchwork.plctlab.org/api/1.2/patches/51048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221325.21956-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221325.21956-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:13:25","name":"RISC-V: Add vsll.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221325.21956-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51049,"url":"https://patchwork.plctlab.org/api/1.2/patches/51049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221513.22652-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221513.22652-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:15:13","name":"RISC-V: Add shift constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221513.22652-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51050,"url":"https://patchwork.plctlab.org/api/1.2/patches/51050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221752.23648-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221752.23648-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:17:52","name":"RISC-V: Add vsrl.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221752.23648-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51051,"url":"https://patchwork.plctlab.org/api/1.2/patches/51051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221943.24518-1-juzhe.zhong@rivai.ai/","msgid":"<20230131221943.24518-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:19:43","name":"RISC-V: Add vsra.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131221943.24518-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51054,"url":"https://patchwork.plctlab.org/api/1.2/patches/51054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131222056.25127-1-juzhe.zhong@rivai.ai/","msgid":"<20230131222056.25127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-01-31T22:20:56","name":"RISC-V: Add vsll.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131222056.25127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51068,"url":"https://patchwork.plctlab.org/api/1.2/patches/51068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131223954.219780-1-hjl.tools@gmail.com/","msgid":"<20230131223954.219780-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-01-31T22:39:54","name":"libsanitizer: cherry-pick commit 742bcbf685bc from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131223954.219780-1-hjl.tools@gmail.com/mbox/"},{"id":51073,"url":"https://patchwork.plctlab.org/api/1.2/patches/51073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131225342.7CE7433E92@hamza.pair.com/","msgid":"<20230131225342.7CE7433E92@hamza.pair.com>","list_archive_url":null,"date":"2023-01-31T22:53:39","name":"[pushed] wwwdocs: gcc-5: Fix deep link into GDB manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230131225342.7CE7433E92@hamza.pair.com/mbox/"},{"id":51109,"url":"https://patchwork.plctlab.org/api/1.2/patches/51109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201001111.1045847-1-jason@redhat.com/","msgid":"<20230201001111.1045847-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-01T00:11:11","name":"[pushed] c++: aggregate base and TARGET_EXPR_ELIDING_P [PR108559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201001111.1045847-1-jason@redhat.com/mbox/"},{"id":51121,"url":"https://patchwork.plctlab.org/api/1.2/patches/51121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012112.1300516-1-apinski@marvell.com/","msgid":"<20230201012112.1300516-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-01T01:21:12","name":"Simplify \"1 - bool_val\" to \"bool_val ^ 1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012112.1300516-1-apinski@marvell.com/mbox/"},{"id":51119,"url":"https://patchwork.plctlab.org/api/1.2/patches/51119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012919.1301588-1-apinski@marvell.com/","msgid":"<20230201012919.1301588-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-01T01:29:19","name":"Simplify \"1 - bool_val\" to \"bool_val ^ 1\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201012919.1301588-1-apinski@marvell.com/mbox/"},{"id":51122,"url":"https://patchwork.plctlab.org/api/1.2/patches/51122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201014733.172099-1-juzhe.zhong@rivai.ai/","msgid":"<20230201014733.172099-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-01T01:47:33","name":"RISC-V: Fix constraint bug for binary operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201014733.172099-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51134,"url":"https://patchwork.plctlab.org/api/1.2/patches/51134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022406.824321-1-dmalcolm@redhat.com/","msgid":"<20230201022406.824321-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:24:06","name":"[pushed] doc: add notes about limitations of -fanalyzer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022406.824321-1-dmalcolm@redhat.com/mbox/"},{"id":51135,"url":"https://patchwork.plctlab.org/api/1.2/patches/51135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022524.1100674-1-jason@redhat.com/","msgid":"<20230201022524.1100674-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:25:24","name":"[pushed] c++: Add -Wno-changes-meaning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022524.1100674-1-jason@redhat.com/mbox/"},{"id":51136,"url":"https://patchwork.plctlab.org/api/1.2/patches/51136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022615.824902-1-dmalcolm@redhat.com/","msgid":"<20230201022615.824902-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:26:15","name":"[pushed] analyzer: fix -Wanalyzer-allocation-size false -ve on alloca [PR108616]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022615.824902-1-dmalcolm@redhat.com/mbox/"},{"id":51137,"url":"https://patchwork.plctlab.org/api/1.2/patches/51137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022755.825041-1-dmalcolm@redhat.com/","msgid":"<20230201022755.825041-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-01T02:27:55","name":"[pushed] analyzer: fix uses of alloca in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201022755.825041-1-dmalcolm@redhat.com/mbox/"},{"id":51210,"url":"https://patchwork.plctlab.org/api/1.2/patches/51210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201073859.3920910-1-maskray@google.com/","msgid":"<20230201073859.3920910-1-maskray@google.com>","list_archive_url":null,"date":"2023-02-01T07:38:59","name":"x86: Use DW_EH_PE_indirect|DW_EH_PE_pcrel encodings for -fno-pic code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201073859.3920910-1-maskray@google.com/mbox/"},{"id":51211,"url":"https://patchwork.plctlab.org/api/1.2/patches/51211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-2-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-2-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:43","name":"[1/3] New reg note REG_CFA_NORESTORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-2-krebbel@linux.ibm.com/mbox/"},{"id":51213,"url":"https://patchwork.plctlab.org/api/1.2/patches/51213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-3-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-3-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:44","name":"[2/3] IBM zSystems: Make stack_tie to work with hard frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-3-krebbel@linux.ibm.com/mbox/"},{"id":51212,"url":"https://patchwork.plctlab.org/api/1.2/patches/51212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-4-krebbel@linux.ibm.com/","msgid":"<20230201080445.10135-4-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-02-01T08:04:45","name":"[3/3] IBM zSystems: Save argument registers to the stack -mpreserve-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201080445.10135-4-krebbel@linux.ibm.com/mbox/"},{"id":51250,"url":"https://patchwork.plctlab.org/api/1.2/patches/51250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9o0lpdPLeh4JF6U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:44:54","name":"[committed] c++, openmp: Handle some OMP_*/OACC_* constructs during constant expression evaluation [PR108607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9o0lpdPLeh4JF6U@tucnak/mbox/"},{"id":51253,"url":"https://patchwork.plctlab.org/api/1.2/patches/51253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-1-christophe.lyon@arm.com/","msgid":"<20230201094650.65755-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-02-01T09:46:49","name":"arm: Fix warning in libgcc/config/arm/pr-support.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-1-christophe.lyon@arm.com/mbox/"},{"id":51252,"url":"https://patchwork.plctlab.org/api/1.2/patches/51252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-2-christophe.lyon@arm.com/","msgid":"<20230201094650.65755-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-02-01T09:46:50","name":"arm: [MVE] Add missing length=8 attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201094650.65755-2-christophe.lyon@arm.com/mbox/"},{"id":51259,"url":"https://patchwork.plctlab.org/api/1.2/patches/51259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelhg17a.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:54:49","name":"[pushed] testsuite: Fix g++.dg/gomp warnings for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelhg17a.fsf@arm.com/mbox/"},{"id":51260,"url":"https://patchwork.plctlab.org/api/1.2/patches/51260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedr9g165.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T09:55:30","name":"[pushed] compare-elim: Fix an RTL checking failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedr9g165.fsf@arm.com/mbox/"},{"id":51261,"url":"https://patchwork.plctlab.org/api/1.2/patches/51261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201095624.AAF1633E9B@hamza.pair.com/","msgid":"<20230201095624.AAF1633E9B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T09:56:22","name":"[pushed] wwwdocs: readings: Remove Herman D. Knoble'\''s Fortran Resources","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201095624.AAF1633E9B@hamza.pair.com/mbox/"},{"id":51262,"url":"https://patchwork.plctlab.org/api/1.2/patches/51262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201100109.5F31A33EAD@hamza.pair.com/","msgid":"<20230201100109.5F31A33EAD@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T10:01:07","name":"[pushed] wwwdocs: testing: Update LAPACK links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201100109.5F31A33EAD@hamza.pair.com/mbox/"},{"id":51310,"url":"https://patchwork.plctlab.org/api/1.2/patches/51310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9pO9EuODLKr8Do3@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-01T11:37:24","name":"ree: Fix -fcompare-debug issues in combine_reaching_defs [PR108573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9pO9EuODLKr8Do3@tucnak/mbox/"},{"id":51312,"url":"https://patchwork.plctlab.org/api/1.2/patches/51312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yclppf8.fsf@euler.schwinge.homeip.net/","msgid":"<875yclppf8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-01T11:59:07","name":"[og12] Fix '\''omp_allocator_handle_kind'\'' example in '\''gfortran.dg/gomp/allocate-4.f90'\'' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0).)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yclppf8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":51315,"url":"https://patchwork.plctlab.org/api/1.2/patches/51315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201122444.253620-1-juzhe.zhong@rivai.ai/","msgid":"<20230201122444.253620-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-01T12:24:44","name":"CPROP: Allow cprop optimization when the function has a single block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201122444.253620-1-juzhe.zhong@rivai.ai/mbox/"},{"id":51359,"url":"https://patchwork.plctlab.org/api/1.2/patches/51359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201143831.BDA3A20423@pchp3.se.axis.com/","msgid":"<20230201143831.BDA3A20423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-01T14:38:31","name":"libstdc++ testsuite: Correct S0 in std/time/hh_mm_ss/1.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201143831.BDA3A20423@pchp3.se.axis.com/mbox/"},{"id":51423,"url":"https://patchwork.plctlab.org/api/1.2/patches/51423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1efd091-471f-ed79-ad14-64946f2e5565@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T15:35:03","name":"amdgcn: Add instruction pattern for conditional shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1efd091-471f-ed79-ad14-64946f2e5565@codesourcery.com/mbox/"},{"id":51476,"url":"https://patchwork.plctlab.org/api/1.2/patches/51476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201164626.699192-1-siddhesh@gotplt.org/","msgid":"<20230201164626.699192-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-02-01T16:46:26","name":"[committed,v2] testsuite: Run __bos tests to completion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201164626.699192-1-siddhesh@gotplt.org/mbox/"},{"id":51501,"url":"https://patchwork.plctlab.org/api/1.2/patches/51501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df275d3e-145b-c8ca-5947-db2661e84262@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-01T18:11:27","name":"PR tree-optimization/107570 - Reset SCEV after folding in VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df275d3e-145b-c8ca-5947-db2661e84262@redhat.com/mbox/"},{"id":51547,"url":"https://patchwork.plctlab.org/api/1.2/patches/51547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-41f58533-d711-454b-9271-84b8d31b8a41-1675283099194@3c-app-gmx-bs72/","msgid":"","list_archive_url":null,"date":"2023-02-01T20:24:59","name":"[committed] Fortran: error recovery on invalid array section [PR108609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-41f58533-d711-454b-9271-84b8d31b8a41-1675283099194@3c-app-gmx-bs72/mbox/"},{"id":51572,"url":"https://patchwork.plctlab.org/api/1.2/patches/51572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210755.2445205-1-jwakely@redhat.com/","msgid":"<20230201210755.2445205-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:07:55","name":"[committed] libstdc++: Do not embed tzdata.zi for 8-bit and 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210755.2445205-1-jwakely@redhat.com/mbox/"},{"id":51573,"url":"https://patchwork.plctlab.org/api/1.2/patches/51573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210853.2445267-1-jwakely@redhat.com/","msgid":"<20230201210853.2445267-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:08:53","name":"[committed] libstdc++: Fix build failures for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210853.2445267-1-jwakely@redhat.com/mbox/"},{"id":51574,"url":"https://patchwork.plctlab.org/api/1.2/patches/51574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210921.2445332-1-jwakely@redhat.com/","msgid":"<20230201210921.2445332-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-01T21:09:21","name":"[committed] libstdc++: Fix std::random_device for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201210921.2445332-1-jwakely@redhat.com/mbox/"},{"id":51612,"url":"https://patchwork.plctlab.org/api/1.2/patches/51612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201235444.14EE633EBF@hamza.pair.com/","msgid":"<20230201235444.14EE633EBF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-01T23:54:41","name":"[pushed] wwwdocs: readings: Update Nios II reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230201235444.14EE633EBF@hamza.pair.com/mbox/"},{"id":51613,"url":"https://patchwork.plctlab.org/api/1.2/patches/51613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202003345.B1E0B33EBE@hamza.pair.com/","msgid":"<20230202003345.B1E0B33EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:33:43","name":"[pushed] libstdc++: Fix link to online GDB manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202003345.B1E0B33EBE@hamza.pair.com/mbox/"},{"id":51614,"url":"https://patchwork.plctlab.org/api/1.2/patches/51614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202004547.9F3EB33E6E@hamza.pair.com/","msgid":"<20230202004547.9F3EB33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:45:45","name":"[pushed] wwwdocs: frontends: Switch www.modula3.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202004547.9F3EB33E6E@hamza.pair.com/mbox/"},{"id":51615,"url":"https://patchwork.plctlab.org/api/1.2/patches/51615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202005154.7652133EBE@hamza.pair.com/","msgid":"<20230202005154.7652133EBE@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T00:51:52","name":"[pushed] libstdc++: Switch a www.open-std.org link to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202005154.7652133EBE@hamza.pair.com/mbox/"},{"id":51626,"url":"https://patchwork.plctlab.org/api/1.2/patches/51626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202013052.2070569-1-hongtao.liu@intel.com/","msgid":"<20230202013052.2070569-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-02-02T01:30:52","name":"[vect] Don'\''t peel nonlinear iv(mult or shift) for epilog when vf is not constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202013052.2070569-1-hongtao.liu@intel.com/mbox/"},{"id":51726,"url":"https://patchwork.plctlab.org/api/1.2/patches/51726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202054550.2034-1-jinma@linux.alibaba.com/","msgid":"<20230202054550.2034-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-02T05:45:50","name":"[v5,RISCV] Add '\''Zfa'\'' extension according to riscv-isa-manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202054550.2034-1-jinma@linux.alibaba.com/mbox/"},{"id":51727,"url":"https://patchwork.plctlab.org/api/1.2/patches/51727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9tQNeCkdqlMkKdz@jupiter.tail36e24.ts.net/","msgid":"","list_archive_url":null,"date":"2023-02-02T05:55:01","name":"Add x86_64-gnu target to contrib/config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9tQNeCkdqlMkKdz@jupiter.tail36e24.ts.net/mbox/"},{"id":51799,"url":"https://patchwork.plctlab.org/api/1.2/patches/51799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com/","msgid":"<4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com>","list_archive_url":null,"date":"2023-02-02T08:43:42","name":"s390: Add LEN_LOAD/LEN_STORE support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4a42f530-cd67-6bd8-3f3d-1e7a68bffea1@linux.ibm.com/mbox/"},{"id":51806,"url":"https://patchwork.plctlab.org/api/1.2/patches/51806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t7xMBKDiGdX3/F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:00:52","name":"[committed] nested, openmp: Wrap OMP_CLAUSE_*_GIMPLE_SEQ into GIMPLE_BIND for declare_vars [PR108435]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t7xMBKDiGdX3/F@tucnak/mbox/"},{"id":51810,"url":"https://patchwork.plctlab.org/api/1.2/patches/51810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t+gOQrO/wBHlxY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:12:32","name":"Replace IFN_TRAP with BUILT_IN_UNREACHABLE_TRAP [PR107300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9t+gOQrO/wBHlxY@tucnak/mbox/"},{"id":51829,"url":"https://patchwork.plctlab.org/api/1.2/patches/51829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelge6uc.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T09:48:11","name":"rtl-ssa: Fix splitting of clobber groups [PR108508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelge6uc.fsf@arm.com/mbox/"},{"id":51869,"url":"https://patchwork.plctlab.org/api/1.2/patches/51869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com/","msgid":"<768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T11:19:56","name":"[committed] libgomp.texi (OpenMP TR11 impl. status): Fix '\''strict'\'' item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/768cda84-807f-581d-ea0f-5a5d0027e686@codesourcery.com/mbox/"},{"id":51872,"url":"https://patchwork.plctlab.org/api/1.2/patches/51872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202113406.91303385842C@sourceware.org/","msgid":"<20230202113406.91303385842C@sourceware.org>","list_archive_url":null,"date":"2023-02-02T11:33:22","name":"middle-end/108625 - wrong folding due to misinterpreted !","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202113406.91303385842C@sourceware.org/mbox/"},{"id":51877,"url":"https://patchwork.plctlab.org/api/1.2/patches/51877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202114604.2059-1-jinma@linux.alibaba.com/","msgid":"<20230202114604.2059-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-02T11:46:04","name":"RISC-V: Fix bug of TARGET_COMPUTE_MULTILIB implemented in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202114604.2059-1-jinma@linux.alibaba.com/mbox/"},{"id":51878,"url":"https://patchwork.plctlab.org/api/1.2/patches/51878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com/","msgid":"<46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T11:49:57","name":"[committed] amdgcn, libgomp: Manually allocated stacks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46d413b6-cf3f-3498-8f8d-45cb3ba819d1@codesourcery.com/mbox/"},{"id":51942,"url":"https://patchwork.plctlab.org/api/1.2/patches/51942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com/","msgid":"<4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T14:13:58","name":"libgomp: Fix reverse offload issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c058f14-c719-b66a-f556-9bda3a4c4556@codesourcery.com/mbox/"},{"id":51944,"url":"https://patchwork.plctlab.org/api/1.2/patches/51944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141503.913418-1-dmalcolm@redhat.com/","msgid":"<20230202141503.913418-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-02T14:15:03","name":"[pushed] analyzer: add deref-before-check-qemu-qtest_rsp_args.c test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141503.913418-1-dmalcolm@redhat.com/mbox/"},{"id":51948,"url":"https://patchwork.plctlab.org/api/1.2/patches/51948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141630.913508-1-dmalcolm@redhat.com/","msgid":"<20230202141630.913508-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-02T14:16:30","name":"[pushed] analyzer: fix -Wanalyzer-fd-type-mismatch false +ve on \"listen\" [PR108633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202141630.913508-1-dmalcolm@redhat.com/mbox/"},{"id":51953,"url":"https://patchwork.plctlab.org/api/1.2/patches/51953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9vJBTq6losUIR6J@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:30:29","name":"tree: Use comdat tree_code_{type,length} even for C++11/14 [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9vJBTq6losUIR6J@tucnak/mbox/"},{"id":51978,"url":"https://patchwork.plctlab.org/api/1.2/patches/51978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v8ce32.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:54:41","name":"[pushed] testsuite: Add case-values-threshold to pr107876.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v8ce32.fsf@arm.com/mbox/"},{"id":51979,"url":"https://patchwork.plctlab.org/api/1.2/patches/51979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelgce1g.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T14:55:39","name":"[pushed] rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlelgce1g.fsf@arm.com/mbox/"},{"id":52074,"url":"https://patchwork.plctlab.org/api/1.2/patches/52074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7qc9h08.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-02T16:19:51","name":"ipa: Avoid invalid gimple when IPA-CP and IPA-SRA disagree on types (108384)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7qc9h08.fsf@suse.cz/mbox/"},{"id":52099,"url":"https://patchwork.plctlab.org/api/1.2/patches/52099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164802.2634934-1-jwakely@redhat.com/","msgid":"<20230202164802.2634934-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T16:48:02","name":"[committed] libstdc++: Use emplace in std::variant::operator=(T&&) as per LWG 3585","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164802.2634934-1-jwakely@redhat.com/mbox/"},{"id":52100,"url":"https://patchwork.plctlab.org/api/1.2/patches/52100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164905.2634961-1-jwakely@redhat.com/","msgid":"<20230202164905.2634961-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T16:49:05","name":"[committed] libstdc++: Fix std::filesystem errors with -fkeep-inline-functions [PR108636]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202164905.2634961-1-jwakely@redhat.com/mbox/"},{"id":52102,"url":"https://patchwork.plctlab.org/api/1.2/patches/52102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9v1FvWk30MUvi4Z@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-02T17:38:30","name":"Bump up precision size to 16 bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9v1FvWk30MUvi4Z@toto.the-meissners.org/mbox/"},{"id":52103,"url":"https://patchwork.plctlab.org/api/1.2/patches/52103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202173903.2638731-1-jwakely@redhat.com/","msgid":"<20230202173903.2638731-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T17:39:03","name":"[committed] libstdc++: Define std::basic_stringbuf::view() for old std::string ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202173903.2638731-1-jwakely@redhat.com/mbox/"},{"id":52106,"url":"https://patchwork.plctlab.org/api/1.2/patches/52106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180529.2642046-1-jwakely@redhat.com/","msgid":"<20230202180529.2642046-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-02T18:05:29","name":"[committed] libstdc++: Use ENOSYS for unsupported filesystem ops on AVR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180529.2642046-1-jwakely@redhat.com/mbox/"},{"id":52107,"url":"https://patchwork.plctlab.org/api/1.2/patches/52107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180950.3469931-1-ppalka@redhat.com/","msgid":"<20230202180950.3469931-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-02T18:09:50","name":"c++: spurious ADDR_EXPR after overload set pruning [PR107461]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202180950.3469931-1-ppalka@redhat.com/mbox/"},{"id":52110,"url":"https://patchwork.plctlab.org/api/1.2/patches/52110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df42fe65-4c8a-8448-6463-17e498e0a6cd@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T18:20:26","name":"libstdc++: Limit allocations in _Rb_tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df42fe65-4c8a-8448-6463-17e498e0a6cd@gmail.com/mbox/"},{"id":52158,"url":"https://patchwork.plctlab.org/api/1.2/patches/52158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com/","msgid":"<5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com>","list_archive_url":null,"date":"2023-02-02T20:08:44","name":"[committed] c: Update checks on constexpr floating-point initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d3cd8d-8b2b-b01a-c7ce-8da7e1dd5938@codesourcery.com/mbox/"},{"id":52168,"url":"https://patchwork.plctlab.org/api/1.2/patches/52168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202210139.E1AF420426@pchp3.se.axis.com/","msgid":"<20230202210139.E1AF420426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-02T21:01:39","name":"testsuite: XFAIL g++.dg/pr71488.C and warn/Warray-bounds-16.C, PR107561","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202210139.E1AF420426@pchp3.se.axis.com/mbox/"},{"id":52176,"url":"https://patchwork.plctlab.org/api/1.2/patches/52176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202215018.0691B33E77@hamza.pair.com/","msgid":"<20230202215018.0691B33E77@hamza.pair.com>","list_archive_url":null,"date":"2023-02-02T21:50:16","name":"[pushed] wwwdocs: gcc-11: Update arm \"Straight-line Speculation vulnerability\" link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230202215018.0691B33E77@hamza.pair.com/mbox/"},{"id":52208,"url":"https://patchwork.plctlab.org/api/1.2/patches/52208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe66a753-e6cb-d047-8a53-666825bcafb2@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-02T23:30:44","name":"[committed] c: Update nullptr_t comparison checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe66a753-e6cb-d047-8a53-666825bcafb2@codesourcery.com/mbox/"},{"id":52225,"url":"https://patchwork.plctlab.org/api/1.2/patches/52225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203002825.398939-1-polacek@redhat.com/","msgid":"<20230203002825.398939-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-03T00:28:25","name":"c++: can'\''t eval PTRMEM_CST in incomplete class [PR107574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203002825.398939-1-polacek@redhat.com/mbox/"},{"id":52303,"url":"https://patchwork.plctlab.org/api/1.2/patches/52303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203045851.43100-1-monk.chiang@sifive.com/","msgid":"<20230203045851.43100-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-02-03T04:58:51","name":"RISC-V: Remove unnecessary register class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203045851.43100-1-monk.chiang@sifive.com/mbox/"},{"id":52315,"url":"https://patchwork.plctlab.org/api/1.2/patches/52315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9ygWHc7w3DeIr9O@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T05:49:12","name":"[1/2] PR target/107299: Fix build issue when long double is IEEE 128-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9ygWHc7w3DeIr9O@toto.the-meissners.org/mbox/"},{"id":52316,"url":"https://patchwork.plctlab.org/api/1.2/patches/52316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9yhQQdUaM+z6IYD@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T05:53:05","name":"[2/2] Rework 128-bit complex multiply and divide.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y9yhQQdUaM+z6IYD@toto.the-meissners.org/mbox/"},{"id":52325,"url":"https://patchwork.plctlab.org/api/1.2/patches/52325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203065605.153044-1-juzhe.zhong@rivai.ai/","msgid":"<20230203065605.153044-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T06:56:05","name":"RISC-V: Add binary vx C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203065605.153044-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52326,"url":"https://patchwork.plctlab.org/api/1.2/patches/52326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070048.153816-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070048.153816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:00:48","name":"RISC-V: Add vmul.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070048.153816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52327,"url":"https://patchwork.plctlab.org/api/1.2/patches/52327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070254.155371-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070254.155371-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:02:54","name":"RISC-V: Add vmul.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070254.155371-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52332,"url":"https://patchwork.plctlab.org/api/1.2/patches/52332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070449.158742-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070449.158742-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:04:49","name":"RISC-V: Add vxor.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070449.158742-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52333,"url":"https://patchwork.plctlab.org/api/1.2/patches/52333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070623.162411-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070623.162411-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:06:22","name":"RISC-V: Add vsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070623.162411-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52335,"url":"https://patchwork.plctlab.org/api/1.2/patches/52335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070818.166303-1-juzhe.zhong@rivai.ai/","msgid":"<20230203070818.166303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:08:18","name":"RISC-V: Add vrsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203070818.166303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52336,"url":"https://patchwork.plctlab.org/api/1.2/patches/52336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071025.168340-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071025.168340-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:10:25","name":"RISC-V: Add vremu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071025.168340-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52337,"url":"https://patchwork.plctlab.org/api/1.2/patches/52337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071152.170594-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071152.170594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:11:52","name":"RISC-V: Add vrem.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071152.170594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52343,"url":"https://patchwork.plctlab.org/api/1.2/patches/52343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071351.172167-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071351.172167-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:13:51","name":"RISC-V: Add vor.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071351.172167-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52344,"url":"https://patchwork.plctlab.org/api/1.2/patches/52344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071508.173207-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071508.173207-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:15:08","name":"RISC-V: Add vmul.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071508.173207-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52347,"url":"https://patchwork.plctlab.org/api/1.2/patches/52347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnwGk4fOc3PTM_agTXXFvt=767a3-AWOfSr23Xja6K81w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T07:16:33","name":"[aarch64] Code-gen for vector initialization involving constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnwGk4fOc3PTM_agTXXFvt=767a3-AWOfSr23Xja6K81w@mail.gmail.com/mbox/"},{"id":52345,"url":"https://patchwork.plctlab.org/api/1.2/patches/52345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071811.175585-1-juzhe.zhong@rivai.ai/","msgid":"<20230203071811.175585-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:18:11","name":"RISC-V: Add vminu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203071811.175585-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52346,"url":"https://patchwork.plctlab.org/api/1.2/patches/52346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072038.177916-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072038.177916-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:20:38","name":"RISC-V: Add vmin.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072038.177916-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52348,"url":"https://patchwork.plctlab.org/api/1.2/patches/52348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072224.179317-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072224.179317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:22:24","name":"RISC-V: Add vmaxu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072224.179317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52349,"url":"https://patchwork.plctlab.org/api/1.2/patches/52349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072338.180417-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072338.180417-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:23:38","name":"RISC-V: Add vmax.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072338.180417-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52350,"url":"https://patchwork.plctlab.org/api/1.2/patches/52350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072458.181496-1-juzhe.zhong@rivai.ai/","msgid":"<20230203072458.181496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:24:58","name":"RISC-V: Add vdivu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203072458.181496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52351,"url":"https://patchwork.plctlab.org/api/1.2/patches/52351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073024.186912-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073024.186912-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:30:24","name":"RISC-V: Add vdiv.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073024.186912-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52356,"url":"https://patchwork.plctlab.org/api/1.2/patches/52356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073431.190895-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073431.190895-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:34:31","name":"RISC-V: Add vand.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073431.190895-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52357,"url":"https://patchwork.plctlab.org/api/1.2/patches/52357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073552.192133-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073552.192133-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:35:52","name":"RISC-V: Add vadd.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073552.192133-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52359,"url":"https://patchwork.plctlab.org/api/1.2/patches/52359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073716.193547-1-juzhe.zhong@rivai.ai/","msgid":"<20230203073716.193547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:37:16","name":"RISC-V: Add binary op vx constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203073716.193547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52363,"url":"https://patchwork.plctlab.org/api/1.2/patches/52363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074024.196307-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074024.196307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:40:24","name":"RISC-V: Add vxor.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074024.196307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52364,"url":"https://patchwork.plctlab.org/api/1.2/patches/52364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074207.197673-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074207.197673-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:42:07","name":"RISC-V: Add vsub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074207.197673-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52366,"url":"https://patchwork.plctlab.org/api/1.2/patches/52366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074318.199552-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074318.199552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:43:18","name":"RISC-V: Add vrsub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074318.199552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52369,"url":"https://patchwork.plctlab.org/api/1.2/patches/52369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074523.201447-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074523.201447-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:45:23","name":"RISC-V: Add vadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074523.201447-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52371,"url":"https://patchwork.plctlab.org/api/1.2/patches/52371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074911.204999-1-juzhe.zhong@rivai.ai/","msgid":"<20230203074911.204999-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:49:11","name":"RISC-V: Add vremu.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203074911.204999-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52372,"url":"https://patchwork.plctlab.org/api/1.2/patches/52372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075042.206568-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075042.206568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:50:42","name":"RISC-V: Add vrem.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075042.206568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52373,"url":"https://patchwork.plctlab.org/api/1.2/patches/52373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075154.207608-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075154.207608-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:51:54","name":"RISC-V: Add vor.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075154.207608-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52375,"url":"https://patchwork.plctlab.org/api/1.2/patches/52375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075316.208999-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075316.208999-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:53:15","name":"RISC-V: Add vmul.vx C++ API testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075316.208999-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52377,"url":"https://patchwork.plctlab.org/api/1.2/patches/52377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075713.212656-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075713.212656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:57:12","name":"RISC-V: Add vminu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075713.212656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52382,"url":"https://patchwork.plctlab.org/api/1.2/patches/52382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075830.213927-1-juzhe.zhong@rivai.ai/","msgid":"<20230203075830.213927-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T07:58:30","name":"RISC-V: Add vmin.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203075830.213927-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52387,"url":"https://patchwork.plctlab.org/api/1.2/patches/52387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080035.216830-1-juzhe.zhong@rivai.ai/","msgid":"<20230203080035.216830-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:00:35","name":"RISC-V: Add vmaxu.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080035.216830-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52388,"url":"https://patchwork.plctlab.org/api/1.2/patches/52388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080932.227891-1-juzhe.zhong@rivai.ai/","msgid":"<20230203080932.227891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:09:32","name":"RISC-V: Add vmax.vx C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203080932.227891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52389,"url":"https://patchwork.plctlab.org/api/1.2/patches/52389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081138.229977-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081138.229977-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:11:38","name":"RISC-V: Add vdivu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081138.229977-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52391,"url":"https://patchwork.plctlab.org/api/1.2/patches/52391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081257.231058-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081257.231058-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:12:57","name":"RISC-V: Add vdiv.vx C++ API test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081257.231058-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52392,"url":"https://patchwork.plctlab.org/api/1.2/patches/52392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081405.232059-1-juzhe.zhong@rivai.ai/","msgid":"<20230203081405.232059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T08:14:05","name":"RISC-V: Add vand.vx C++ API test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203081405.232059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52410,"url":"https://patchwork.plctlab.org/api/1.2/patches/52410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203085043.157321-1-aldyh@redhat.com/","msgid":"<20230203085043.157321-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-02-03T08:50:43","name":"[PR,tree-optimization/18639] Compare nonzero bits in irange with widest_int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203085043.157321-1-aldyh@redhat.com/mbox/"},{"id":52417,"url":"https://patchwork.plctlab.org/api/1.2/patches/52417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203090544.2528175-1-yunqiang.su@cipunited.com/","msgid":"<20230203090544.2528175-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-02-03T09:05:44","name":"MIPS: use arch_32/64 instead of default_mips_arch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203090544.2528175-1-yunqiang.su@cipunited.com/mbox/"},{"id":52418,"url":"https://patchwork.plctlab.org/api/1.2/patches/52418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycjcdoo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T09:15:35","name":"ifcvt: Fix regression in aarch64/fcsel_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5ycjcdoo.fsf@arm.com/mbox/"},{"id":52434,"url":"https://patchwork.plctlab.org/api/1.2/patches/52434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203094259.673-1-jinma@linux.alibaba.com/","msgid":"<20230203094259.673-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-03T09:42:59","name":"[v1] RISC-V: Change the generation mode of ADJUST_SP_RTX from gen_insn to gen_SET.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203094259.673-1-jinma@linux.alibaba.com/mbox/"},{"id":52455,"url":"https://patchwork.plctlab.org/api/1.2/patches/52455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-2-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:05","name":"[1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-2-guojiufu@linux.ibm.com/mbox/"},{"id":52457,"url":"https://patchwork.plctlab.org/api/1.2/patches/52457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-3-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:06","name":"[2/4] rs6000: build constant via lis;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-3-guojiufu@linux.ibm.com/mbox/"},{"id":52456,"url":"https://patchwork.plctlab.org/api/1.2/patches/52456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-4-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-4-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:07","name":"[3/4] rs6000: build constant via li/lis;rldicl/rldicr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-4-guojiufu@linux.ibm.com/mbox/"},{"id":52458,"url":"https://patchwork.plctlab.org/api/1.2/patches/52458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-5-guojiufu@linux.ibm.com/","msgid":"<20230203102208.53215-5-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-03T10:22:08","name":"[4/4] rs6000: build constant via li/lis;rldic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203102208.53215-5-guojiufu@linux.ibm.com/mbox/"},{"id":52483,"url":"https://patchwork.plctlab.org/api/1.2/patches/52483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203130539.12F0A1346D@imap2.suse-dmz.suse.de/","msgid":"<20230203130539.12F0A1346D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-03T13:05:38","name":"Speedup cse_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203130539.12F0A1346D@imap2.suse-dmz.suse.de/mbox/"},{"id":52490,"url":"https://patchwork.plctlab.org/api/1.2/patches/52490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com/","msgid":"<6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com>","list_archive_url":null,"date":"2023-02-03T13:44:33","name":"openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6eb5d0dd-da2a-6d8e-eaa2-d14bf708cf36@codesourcery.com/mbox/"},{"id":52522,"url":"https://patchwork.plctlab.org/api/1.2/patches/52522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203140650.E72031346D@imap2.suse-dmz.suse.de/","msgid":"<20230203140650.E72031346D@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-03T14:06:50","name":"Improve RTL CSE hash table hash usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203140650.E72031346D@imap2.suse-dmz.suse.de/mbox/"},{"id":52544,"url":"https://patchwork.plctlab.org/api/1.2/patches/52544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelels1w.fsf@debian/","msgid":"<87lelels1w.fsf@debian>","list_archive_url":null,"date":"2023-02-03T14:52:43","name":"[wwwdocs] document modula-2 in gcc-13/changes.html (and index.html)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lelels1w.fsf@debian/mbox/"},{"id":52600,"url":"https://patchwork.plctlab.org/api/1.2/patches/52600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203175022.690671-1-xry111@xry111.site/","msgid":"<20230203175022.690671-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-02-03T17:50:22","name":"LoongArch: Generate bytepick.[wd] for suitable bit operation pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203175022.690671-1-xry111@xry111.site/mbox/"},{"id":52602,"url":"https://patchwork.plctlab.org/api/1.2/patches/52602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Nl/1HqWGOHLGK@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-03T18:08:23","name":"[v2] c++: wrong error with constexpr array and value-init [PR108158]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Nl/1HqWGOHLGK@redhat.com/mbox/"},{"id":52603,"url":"https://patchwork.plctlab.org/api/1.2/patches/52603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203180918.6417-1-aldyh@redhat.com/","msgid":"<20230203180918.6417-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-02-03T18:09:18","name":"range-ops: Handle undefined ranges in frange op[12]_range [PR108647]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203180918.6417-1-aldyh@redhat.com/mbox/"},{"id":52612,"url":"https://patchwork.plctlab.org/api/1.2/patches/52612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203185103.802749-1-polacek@redhat.com/","msgid":"<20230203185103.802749-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-03T18:51:03","name":"[pushed] c++: Add fixed test [PR101071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203185103.802749-1-polacek@redhat.com/mbox/"},{"id":52635,"url":"https://patchwork.plctlab.org/api/1.2/patches/52635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Zmsx+2oWM4Wvs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T18:59:39","name":"range-op: Handle op?.undefined_p () in op[12]_range of comparisons [PR108647]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91Zmsx+2oWM4Wvs@tucnak/mbox/"},{"id":52634,"url":"https://patchwork.plctlab.org/api/1.2/patches/52634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91ah+TPG01V1g/A@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T19:03:36","name":"fortran: Fix up hash table usage in gfc_trans_use_stmts [PR108451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91ah+TPG01V1g/A@tucnak/mbox/"},{"id":52633,"url":"https://patchwork.plctlab.org/api/1.2/patches/52633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91bM7eeiHWZMwWI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-03T19:06:29","name":"ubsan: Fix up another spot that should have been BUILT_IN_UNREACHABLE_TRAPS [PR108655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91bM7eeiHWZMwWI@tucnak/mbox/"},{"id":52617,"url":"https://patchwork.plctlab.org/api/1.2/patches/52617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192011.C853A33EBF@hamza.pair.com/","msgid":"<20230203192011.C853A33EBF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T19:20:09","name":"[pushed] libstdc++: Tweak link to ABIcheck project","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192011.C853A33EBF@hamza.pair.com/mbox/"},{"id":52618,"url":"https://patchwork.plctlab.org/api/1.2/patches/52618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192645.9F17B33EE5@hamza.pair.com/","msgid":"<20230203192645.9F17B33EE5@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T19:26:44","name":"[pushed] wwwdocs: news/profiledriven: Move citeseerx.ist.psu.edu to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203192645.9F17B33EE5@hamza.pair.com/mbox/"},{"id":52652,"url":"https://patchwork.plctlab.org/api/1.2/patches/52652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y916x1jPlcL5QOSE@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:21:11","name":"[1/8] PowerPC: Add -mcpu=future.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y916x1jPlcL5QOSE@toto.the-meissners.org/mbox/"},{"id":52653,"url":"https://patchwork.plctlab.org/api/1.2/patches/52653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y917UQxGb0iODU2Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:23:29","name":"[1/8] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y917UQxGb0iODU2Y@toto.the-meissners.org/mbox/"},{"id":52654,"url":"https://patchwork.plctlab.org/api/1.2/patches/52654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91702u4TmGb5Rxb@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:25:39","name":"[2/8] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91702u4TmGb5Rxb@toto.the-meissners.org/mbox/"},{"id":52656,"url":"https://patchwork.plctlab.org/api/1.2/patches/52656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918V8nqMRpVrb5Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:27:51","name":"[3/8] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918V8nqMRpVrb5Y@toto.the-meissners.org/mbox/"},{"id":52657,"url":"https://patchwork.plctlab.org/api/1.2/patches/52657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918tc2F14HMOlFh@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:29:25","name":"[4/8] PowerPC: Switch to dense math names for all MMA operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y918tc2F14HMOlFh@toto.the-meissners.org/mbox/"},{"id":52658,"url":"https://patchwork.plctlab.org/api/1.2/patches/52658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y919ndtcPsz+9doP@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:33:17","name":"[6/8] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y919ndtcPsz+9doP@toto.the-meissners.org/mbox/"},{"id":52659,"url":"https://patchwork.plctlab.org/api/1.2/patches/52659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+UgGTq1udBRS6@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:36:18","name":"[7/8] Support load/store vector with right length.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+UgGTq1udBRS6@toto.the-meissners.org/mbox/"},{"id":52660,"url":"https://patchwork.plctlab.org/api/1.2/patches/52660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+hDeMysjK0B4Y@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-02-03T21:37:08","name":"[8/8] Add saturating subtract built-ins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y91+hDeMysjK0B4Y@toto.the-meissners.org/mbox/"},{"id":52700,"url":"https://patchwork.plctlab.org/api/1.2/patches/52700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203225724.4FEBE33EB9@hamza.pair.com/","msgid":"<20230203225724.4FEBE33EB9@hamza.pair.com>","list_archive_url":null,"date":"2023-02-03T22:57:07","name":"[pushed] libstdc++: Adjust link to pdftex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203225724.4FEBE33EB9@hamza.pair.com/mbox/"},{"id":52703,"url":"https://patchwork.plctlab.org/api/1.2/patches/52703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232115.223866-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232115.223866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:21:15","name":"RISC-V: Add unary C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232115.223866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52704,"url":"https://patchwork.plctlab.org/api/1.2/patches/52704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232240.224110-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232240.224110-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:22:40","name":"RISC-V: Add vnot.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232240.224110-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52705,"url":"https://patchwork.plctlab.org/api/1.2/patches/52705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232408.224338-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232408.224338-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:24:08","name":"RISC-V: Add vneg.v C/C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232408.224338-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52706,"url":"https://patchwork.plctlab.org/api/1.2/patches/52706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232522.224551-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232522.224551-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:25:22","name":"RISC-V: Add unary constraint tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232522.224551-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52708,"url":"https://patchwork.plctlab.org/api/1.2/patches/52708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232641.224761-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232641.224761-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:26:41","name":"RISC-V: Add vnot.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232641.224761-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52709,"url":"https://patchwork.plctlab.org/api/1.2/patches/52709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232759.224994-1-juzhe.zhong@rivai.ai/","msgid":"<20230203232759.224994-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-03T23:27:59","name":"RISC-V: Add vneg.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230203232759.224994-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52715,"url":"https://patchwork.plctlab.org/api/1.2/patches/52715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204010930.263271-1-juzhe.zhong@rivai.ai/","msgid":"<20230204010930.263271-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-04T01:09:30","name":"RISC-V: Fix VSETVL PASS bug in exception handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204010930.263271-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52723,"url":"https://patchwork.plctlab.org/api/1.2/patches/52723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204031940.A747420426@pchp3.se.axis.com/","msgid":"<20230204031940.A747420426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-04T03:19:40","name":"libstdc++: Avoid use of naked int32_t in unseq_backend_simd.h, PR108672","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204031940.A747420426@pchp3.se.axis.com/mbox/"},{"id":52793,"url":"https://patchwork.plctlab.org/api/1.2/patches/52793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204165033.4026-1-ed@catmur.uk/","msgid":"<20230204165033.4026-1-ed@catmur.uk>","list_archive_url":null,"date":"2023-02-04T16:50:33","name":"[v3] emit DW_AT_name for DW_TAG_GNU_formal_parameter_pack [PR70536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204165033.4026-1-ed@catmur.uk/mbox/"},{"id":52819,"url":"https://patchwork.plctlab.org/api/1.2/patches/52819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203126.782976-1-ppalka@redhat.com/","msgid":"<20230204203126.782976-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-04T20:31:26","name":"c++: equivalence of non-dependent calls [PR107461]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203126.782976-1-ppalka@redhat.com/mbox/"},{"id":52817,"url":"https://patchwork.plctlab.org/api/1.2/patches/52817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203329.F1A8933E56@hamza.pair.com/","msgid":"<20230204203329.F1A8933E56@hamza.pair.com>","list_archive_url":null,"date":"2023-02-04T20:33:25","name":"[pushed] wwwdocs: projects/beginner: Remove traces of Interix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230204203329.F1A8933E56@hamza.pair.com/mbox/"},{"id":52818,"url":"https://patchwork.plctlab.org/api/1.2/patches/52818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com/","msgid":"<000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-02-04T20:33:54","name":"[DOC] Document the VEC_PERM_EXPR tree code (and minor clean-ups).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d938d8$00cdf7d0$0269e770$@nextmovesoftware.com/mbox/"},{"id":52834,"url":"https://patchwork.plctlab.org/api/1.2/patches/52834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y977ZULaCk6iP74+@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-02-05T00:42:13","name":"Enable AVX512 512bit vectors by default on Zen4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y977ZULaCk6iP74+@kam.mff.cuni.cz/mbox/"},{"id":52851,"url":"https://patchwork.plctlab.org/api/1.2/patches/52851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205014738.8722-1-juzhe.zhong@rivai.ai/","msgid":"<20230205014738.8722-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:47:38","name":"RISC-V: Add saturating Addition && Subtraction C/C++ Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205014738.8722-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52852,"url":"https://patchwork.plctlab.org/api/1.2/patches/52852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015031.9176-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015031.9176-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:50:31","name":"RISC-V: Add saturating Add && Sub vx constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015031.9176-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52853,"url":"https://patchwork.plctlab.org/api/1.2/patches/52853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015155.9413-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015155.9413-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:51:55","name":"RISC-V: Add vsadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015155.9413-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52854,"url":"https://patchwork.plctlab.org/api/1.2/patches/52854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015350.9716-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015350.9716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:53:50","name":"RISC-V: Add vsaddu.vv C++ API tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015350.9716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52855,"url":"https://patchwork.plctlab.org/api/1.2/patches/52855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015510.9957-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015510.9957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:55:10","name":"RISC-V: Add vsub.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015510.9957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52856,"url":"https://patchwork.plctlab.org/api/1.2/patches/52856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015622.10172-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015622.10172-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:56:22","name":"RISC-V: Add vssubu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015622.10172-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52857,"url":"https://patchwork.plctlab.org/api/1.2/patches/52857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015742.10412-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015742.10412-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:57:42","name":"RISC-V: Add vssubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015742.10412-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52858,"url":"https://patchwork.plctlab.org/api/1.2/patches/52858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015851.10635-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015851.10635-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:58:51","name":"RISC-V: Add vssub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015851.10635-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52859,"url":"https://patchwork.plctlab.org/api/1.2/patches/52859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015955.10847-1-juzhe.zhong@rivai.ai/","msgid":"<20230205015955.10847-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T01:59:55","name":"RISC-V: Add vsaddu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205015955.10847-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52860,"url":"https://patchwork.plctlab.org/api/1.2/patches/52860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205020106.11182-1-juzhe.zhong@rivai.ai/","msgid":"<20230205020106.11182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T02:01:06","name":"RISC-V: Add vsadd.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205020106.11182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52872,"url":"https://patchwork.plctlab.org/api/1.2/patches/52872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com/","msgid":"<0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:34","name":"[1/3] Allow default libc to be specified to configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fc05b2872263eec6df97393edb4912dcf6d3cc6.1675579641.git.keithp@keithp.com/mbox/"},{"id":52870,"url":"https://patchwork.plctlab.org/api/1.2/patches/52870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com/","msgid":"<7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:35","name":"[2/3] Add newlib and picolibc as default C library choices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7fa04bf66973de28961edeef470266caeaa348fc.1675579641.git.keithp@keithp.com/mbox/"},{"id":52871,"url":"https://patchwork.plctlab.org/api/1.2/patches/52871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com/","msgid":"<266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com>","list_archive_url":null,"date":"2023-02-05T07:10:36","name":"[3/3] Add '\''--oslib='\'' option when default C library is picolibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/266bf8d1221b5472760ee51eb292ac67a94f91b2.1675579641.git.keithp@keithp.com/mbox/"},{"id":52874,"url":"https://patchwork.plctlab.org/api/1.2/patches/52874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205081827.176653-1-juzhe.zhong@rivai.ai/","msgid":"<20230205081827.176653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:18:27","name":"RISC-V: Add vssubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205081827.176653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52875,"url":"https://patchwork.plctlab.org/api/1.2/patches/52875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082119.178471-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082119.178471-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:21:19","name":"RISC-V: Add vssub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082119.178471-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52876,"url":"https://patchwork.plctlab.org/api/1.2/patches/52876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082239.179197-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082239.179197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:22:39","name":"RISC-V: Add vsaddu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082239.179197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52877,"url":"https://patchwork.plctlab.org/api/1.2/patches/52877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082344.179805-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082344.179805-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:23:43","name":"RISC-V: Add vsadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082344.179805-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52878,"url":"https://patchwork.plctlab.org/api/1.2/patches/52878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082455.180453-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082455.180453-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:24:55","name":"RISC-V: Add vssubu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082455.180453-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52879,"url":"https://patchwork.plctlab.org/api/1.2/patches/52879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082606.181085-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082606.181085-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:26:06","name":"RISC-V: Add vssub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082606.181085-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52880,"url":"https://patchwork.plctlab.org/api/1.2/patches/52880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082757.182031-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082757.182031-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:27:57","name":"RISC-V: Add vsaddu.vx overloaded API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082757.182031-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52881,"url":"https://patchwork.plctlab.org/api/1.2/patches/52881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082927.182829-1-juzhe.zhong@rivai.ai/","msgid":"<20230205082927.182829-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-05T08:29:27","name":"RISC-V: Add vsadd.vx C++ overloaded API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205082927.182829-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52919,"url":"https://patchwork.plctlab.org/api/1.2/patches/52919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180237.F173233E8A@hamza.pair.com/","msgid":"<20230205180237.F173233E8A@hamza.pair.com>","list_archive_url":null,"date":"2023-02-05T18:02:35","name":"[pushed] wwwdocs: mirrors: Remove ftp.uvsq.fr mirror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180237.F173233E8A@hamza.pair.com/mbox/"},{"id":52920,"url":"https://patchwork.plctlab.org/api/1.2/patches/52920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180947.BA75A33E82@hamza.pair.com/","msgid":"<20230205180947.BA75A33E82@hamza.pair.com>","list_archive_url":null,"date":"2023-02-05T18:09:45","name":"[pushed] doc: Remove note on PW32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230205180947.BA75A33E82@hamza.pair.com/mbox/"},{"id":52990,"url":"https://patchwork.plctlab.org/api/1.2/patches/52990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050656.211738-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050656.211738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:06:56","name":"RISC-V: Add vsext/vzext C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050656.211738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52991,"url":"https://patchwork.plctlab.org/api/1.2/patches/52991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050839.214506-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050839.214506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:08:39","name":"RISC-V: Add vzext.vf8 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050839.214506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52992,"url":"https://patchwork.plctlab.org/api/1.2/patches/52992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050949.215140-1-juzhe.zhong@rivai.ai/","msgid":"<20230206050949.215140-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:09:49","name":"RISC-V: Add vzext.vf4 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206050949.215140-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52993,"url":"https://patchwork.plctlab.org/api/1.2/patches/52993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051106.215903-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051106.215903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:11:06","name":"RISC-V: Add vzext.vf2 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051106.215903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52994,"url":"https://patchwork.plctlab.org/api/1.2/patches/52994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051238.216703-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051238.216703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:12:38","name":"RISC-V: Add vsext.vf8 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051238.216703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52995,"url":"https://patchwork.plctlab.org/api/1.2/patches/52995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051504.220629-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051504.220629-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:15:04","name":"RISC-V: Add vsext.vf4 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051504.220629-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52996,"url":"https://patchwork.plctlab.org/api/1.2/patches/52996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051704.224015-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051704.224015-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:17:04","name":"RISC-V: Add vsext.vf2 C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051704.224015-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52997,"url":"https://patchwork.plctlab.org/api/1.2/patches/52997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051836.225790-1-juzhe.zhong@rivai.ai/","msgid":"<20230206051836.225790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:18:36","name":"RISC-V: Add vsext constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206051836.225790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52998,"url":"https://patchwork.plctlab.org/api/1.2/patches/52998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052030.229222-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052030.229222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:20:30","name":"RISC-V: Add vzext.vf8 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052030.229222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":52999,"url":"https://patchwork.plctlab.org/api/1.2/patches/52999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052327.233617-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052327.233617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:23:27","name":"RISC-V: Add vzext.vf4 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052327.233617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53000,"url":"https://patchwork.plctlab.org/api/1.2/patches/53000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052429.234436-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052429.234436-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:24:29","name":"RISC-V: Add vzext.vf2 C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052429.234436-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53001,"url":"https://patchwork.plctlab.org/api/1.2/patches/53001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052547.235133-1-juzhe.zhong@rivai.ai/","msgid":"<20230206052547.235133-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T05:25:47","name":"RISC-V: Add vsext C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206052547.235133-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53193,"url":"https://patchwork.plctlab.org/api/1.2/patches/53193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16895-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-06T11:39:23","name":"AArch64[committed] testsuite: remove broken test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16895-tamar@arm.com/mbox/"},{"id":53194,"url":"https://patchwork.plctlab.org/api/1.2/patches/53194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206115113.47100-1-juzhe.zhong@rivai.ai/","msgid":"<20230206115113.47100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T11:51:13","name":"RISC-V: Add vmulh C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206115113.47100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53195,"url":"https://patchwork.plctlab.org/api/1.2/patches/53195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com/","msgid":"<85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com>","list_archive_url":null,"date":"2023-02-06T11:52:11","name":"libgomp: Fix reverse-offload for GOMP_MAP_TO_PSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85ecf108-8249-21a3-b9ee-23b89b6816bd@codesourcery.com/mbox/"},{"id":53201,"url":"https://patchwork.plctlab.org/api/1.2/patches/53201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120519.48787-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120519.48787-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:05:19","name":"RISC-V: Add vmulhu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120519.48787-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53203,"url":"https://patchwork.plctlab.org/api/1.2/patches/53203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120652.49229-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120652.49229-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:06:52","name":"RISC-V: Add vmulhu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120652.49229-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53204,"url":"https://patchwork.plctlab.org/api/1.2/patches/53204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120842.49589-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120842.49589-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:08:42","name":"RISC-V: Add vmulhsu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120842.49589-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53210,"url":"https://patchwork.plctlab.org/api/1.2/patches/53210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120945.49797-1-juzhe.zhong@rivai.ai/","msgid":"<20230206120945.49797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:09:45","name":"RISC-V: Add vmulhsu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206120945.49797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53217,"url":"https://patchwork.plctlab.org/api/1.2/patches/53217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206124533.88066-1-juzhe.zhong@rivai.ai/","msgid":"<20230206124533.88066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:45:33","name":"RISC-V: Add vmulh.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206124533.88066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53218,"url":"https://patchwork.plctlab.org/api/1.2/patches/53218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125034.88928-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125034.88928-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:50:34","name":"RISC-V: Add vmulh.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125034.88928-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53219,"url":"https://patchwork.plctlab.org/api/1.2/patches/53219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125207.89256-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125207.89256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:52:07","name":"RISC-V: Add vmulhu.vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125207.89256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53220,"url":"https://patchwork.plctlab.org/api/1.2/patches/53220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125551.89879-1-juzhe.zhong@rivai.ai/","msgid":"<20230206125551.89879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T12:55:51","name":"RISC-V: Add vmulhsu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206125551.89879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53221,"url":"https://patchwork.plctlab.org/api/1.2/patches/53221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130045.92105-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130045.92105-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:00:45","name":"RISC-V: Add vmulhsu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130045.92105-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53222,"url":"https://patchwork.plctlab.org/api/1.2/patches/53222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130248.92565-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130248.92565-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:02:48","name":"RISC-V: Add vmulh.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130248.92565-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53223,"url":"https://patchwork.plctlab.org/api/1.2/patches/53223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130405.92876-1-juzhe.zhong@rivai.ai/","msgid":"<20230206130405.92876-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-06T13:04:05","name":"RISC-V: Add vmulh.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206130405.92876-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53227,"url":"https://patchwork.plctlab.org/api/1.2/patches/53227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+D7p8r66hgkCR1y@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-06T13:07:51","name":"aarch64: Fix up bfmlal lane pattern [PR104921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+D7p8r66hgkCR1y@arm.com/mbox/"},{"id":53253,"url":"https://patchwork.plctlab.org/api/1.2/patches/53253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206134723.3391910-1-qing.zhao@oracle.com/","msgid":"<20230206134723.3391910-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-06T13:47:23","name":"[V2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206134723.3391910-1-qing.zhao@oracle.com/mbox/"},{"id":53311,"url":"https://patchwork.plctlab.org/api/1.2/patches/53311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142417.2969781-1-jwakely@redhat.com/","msgid":"<20230206142417.2969781-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:24:17","name":"[committed] libstdc++: Disable building additional archives for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142417.2969781-1-jwakely@redhat.com/mbox/"},{"id":53313,"url":"https://patchwork.plctlab.org/api/1.2/patches/53313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142601.2970070-1-jwakely@redhat.com/","msgid":"<20230206142601.2970070-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:26:01","name":"[committed] libstdc++: Fix testsuite warnings about new C++23 deprecations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142601.2970070-1-jwakely@redhat.com/mbox/"},{"id":53312,"url":"https://patchwork.plctlab.org/api/1.2/patches/53312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142606.2970099-1-jwakely@redhat.com/","msgid":"<20230206142606.2970099-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-06T14:26:06","name":"[committed] libstdc++: Fix non-reserved name for template parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206142606.2970099-1-jwakely@redhat.com/mbox/"},{"id":53326,"url":"https://patchwork.plctlab.org/api/1.2/patches/53326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206144752.3829182-1-andrea.corallo@arm.com/","msgid":"<20230206144752.3829182-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-02-06T14:47:52","name":"aarch64: Fix return_address_sign_ab_exception.C regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206144752.3829182-1-andrea.corallo@arm.com/mbox/"},{"id":53344,"url":"https://patchwork.plctlab.org/api/1.2/patches/53344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmttzyx1b3.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-06T15:26:24","name":"lto-wrapper: Pass through -funwind-tables and -fasynchronous-unwind-tables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmttzyx1b3.fsf@suse.de/mbox/"},{"id":53442,"url":"https://patchwork.plctlab.org/api/1.2/patches/53442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com/","msgid":"<03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com>","list_archive_url":null,"date":"2023-02-06T17:22:31","name":"[committed] amdgcn: Pass -mstack-size through to runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03830517-e578-4ee7-b652-e82e6b5a6614@codesourcery.com/mbox/"},{"id":53482,"url":"https://patchwork.plctlab.org/api/1.2/patches/53482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9557dbd4-3896-48bc-8096-d72310da093c-1675714238918@3c-app-gmx-bap04/","msgid":"","list_archive_url":null,"date":"2023-02-06T20:10:38","name":"Fortran: ASSOCIATE variables should not be TREE_STATIC [PR95107]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-9557dbd4-3896-48bc-8096-d72310da093c-1675714238918@3c-app-gmx-bap04/mbox/"},{"id":53486,"url":"https://patchwork.plctlab.org/api/1.2/patches/53486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206201852.71EDF33EC1@hamza.pair.com/","msgid":"<20230206201852.71EDF33EC1@hamza.pair.com>","list_archive_url":null,"date":"2023-02-06T20:18:40","name":"[pushed] wwwdocs: projects/tree-ssa: Use our own copy of GCC Summit 2007 proceedings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206201852.71EDF33EC1@hamza.pair.com/mbox/"},{"id":53491,"url":"https://patchwork.plctlab.org/api/1.2/patches/53491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206203017.CA4B133ECF@hamza.pair.com/","msgid":"<20230206203017.CA4B133ECF@hamza.pair.com>","list_archive_url":null,"date":"2023-02-06T20:30:15","name":"[pushed] wwwdocs: readings: Update reference for Blackfin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230206203017.CA4B133ECF@hamza.pair.com/mbox/"},{"id":53701,"url":"https://patchwork.plctlab.org/api/1.2/patches/53701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061424.32134-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061424.32134-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:14:24","name":"RISC-V: Add integer widening instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061424.32134-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53702,"url":"https://patchwork.plctlab.org/api/1.2/patches/53702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061601.33379-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061601.33379-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:16:01","name":"RISC-V: Add vwsubu.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061601.33379-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53703,"url":"https://patchwork.plctlab.org/api/1.2/patches/53703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061712.33613-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061712.33613-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:17:12","name":"RISC-V: Add vwsubu.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061712.33613-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53704,"url":"https://patchwork.plctlab.org/api/1.2/patches/53704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061823.33859-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061823.33859-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:18:23","name":"RISC-V: Add vwsubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061823.33859-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53705,"url":"https://patchwork.plctlab.org/api/1.2/patches/53705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061932.34795-1-juzhe.zhong@rivai.ai/","msgid":"<20230207061932.34795-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:19:32","name":"RISC-V: Add vwsubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207061932.34795-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53706,"url":"https://patchwork.plctlab.org/api/1.2/patches/53706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062444.36747-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062444.36747-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:24:44","name":"RISC-V: Add vwsub.wx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062444.36747-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53707,"url":"https://patchwork.plctlab.org/api/1.2/patches/53707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062554.36985-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062554.36985-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:25:54","name":"RISC-V: Add vwsub.wv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062554.36985-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53709,"url":"https://patchwork.plctlab.org/api/1.2/patches/53709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062702.37203-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062702.37203-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:27:02","name":"RISC-V: Add vwsub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062702.37203-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53711,"url":"https://patchwork.plctlab.org/api/1.2/patches/53711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062800.37431-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062800.37431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:28:00","name":"RISC-V: Add vwsub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062800.37431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53712,"url":"https://patchwork.plctlab.org/api/1.2/patches/53712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062916.38206-1-juzhe.zhong@rivai.ai/","msgid":"<20230207062916.38206-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:29:16","name":"RISC-V: Add vwmulu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207062916.38206-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53713,"url":"https://patchwork.plctlab.org/api/1.2/patches/53713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063051.38606-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063051.38606-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:30:51","name":"RISC-V: Add vwmulsu C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063051.38606-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53715,"url":"https://patchwork.plctlab.org/api/1.2/patches/53715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063224.39064-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063224.39064-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:32:24","name":"RISC-V: Add vwmul C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063224.39064-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53716,"url":"https://patchwork.plctlab.org/api/1.2/patches/53716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063328.39329-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063328.39329-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:33:28","name":"RISC-V: Add vwcvt C API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063328.39329-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53717,"url":"https://patchwork.plctlab.org/api/1.2/patches/53717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063447.39828-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063447.39828-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:34:47","name":"RISC-V: Add vwaddu.w C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063447.39828-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53718,"url":"https://patchwork.plctlab.org/api/1.2/patches/53718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063549.40062-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063549.40062-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:35:49","name":"RISC-V: Add vwaddu.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063549.40062-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53719,"url":"https://patchwork.plctlab.org/api/1.2/patches/53719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063655.40286-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063655.40286-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:36:55","name":"RISC-V: Add vwadd.w C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063655.40286-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53721,"url":"https://patchwork.plctlab.org/api/1.2/patches/53721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063807.40519-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063807.40519-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:38:07","name":"RISC-V: Add vwadd.v C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063807.40519-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53722,"url":"https://patchwork.plctlab.org/api/1.2/patches/53722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063927.40790-1-juzhe.zhong@rivai.ai/","msgid":"<20230207063927.40790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:39:27","name":"RISC-V: Add constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207063927.40790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53723,"url":"https://patchwork.plctlab.org/api/1.2/patches/53723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064038.41137-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064038.41137-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:40:38","name":"RISC-V: Add vwsubu.w C++ api TETS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064038.41137-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53724,"url":"https://patchwork.plctlab.org/api/1.2/patches/53724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064145.41499-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064145.41499-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:41:45","name":"RISC-V: Add vwsubu.v C++ API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064145.41499-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53725,"url":"https://patchwork.plctlab.org/api/1.2/patches/53725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064305.41749-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064305.41749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:43:05","name":"RISC-V: Add vwsub.w C++ api TESTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064305.41749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53726,"url":"https://patchwork.plctlab.org/api/1.2/patches/53726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064426.43100-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064426.43100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:44:26","name":"RISC-V: Add vwsub.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064426.43100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53727,"url":"https://patchwork.plctlab.org/api/1.2/patches/53727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064535.43364-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064535.43364-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:45:35","name":"RISC-V: Add vwmulu C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064535.43364-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53729,"url":"https://patchwork.plctlab.org/api/1.2/patches/53729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064648.45113-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064648.45113-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:46:48","name":"RISC-V: Add vwmulsu.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064648.45113-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53730,"url":"https://patchwork.plctlab.org/api/1.2/patches/53730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064805.45508-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064805.45508-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:48:05","name":"RISC-V: Add vwmul.v C++ api TETS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064805.45508-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53731,"url":"https://patchwork.plctlab.org/api/1.2/patches/53731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064913.45829-1-juzhe.zhong@rivai.ai/","msgid":"<20230207064913.45829-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:49:13","name":"RISC-V: Add vwcvt C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207064913.45829-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53732,"url":"https://patchwork.plctlab.org/api/1.2/patches/53732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065045.49209-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065045.49209-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:50:45","name":"RISC-V: Add vwaddu.w c++ API TESTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065045.49209-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53733,"url":"https://patchwork.plctlab.org/api/1.2/patches/53733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065155.49564-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065155.49564-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:51:55","name":"RISC-V: Add vwaddu.v C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065155.49564-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53734,"url":"https://patchwork.plctlab.org/api/1.2/patches/53734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065330.50802-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065330.50802-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:53:30","name":"RISC-V: Add vwadd.w C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065330.50802-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53735,"url":"https://patchwork.plctlab.org/api/1.2/patches/53735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065426.51963-1-juzhe.zhong@rivai.ai/","msgid":"<20230207065426.51963-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T06:54:25","name":"RISC-V: Add vwadd v C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207065426.51963-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53764,"url":"https://patchwork.plctlab.org/api/1.2/patches/53764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207074916.116648-1-juzhe.zhong@rivai.ai/","msgid":"<20230207074916.116648-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-07T07:49:16","name":"RISC-V: allow vx instruction use \"zero\" as scalar register.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207074916.116648-1-juzhe.zhong@rivai.ai/mbox/"},{"id":53775,"url":"https://patchwork.plctlab.org/api/1.2/patches/53775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+INds/30aydJlJj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T08:36:06","name":"cgraph: Handle simd clones in cgraph_node::set_{const,pure}_flag [PR106433]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+INds/30aydJlJj@tucnak/mbox/"},{"id":53778,"url":"https://patchwork.plctlab.org/api/1.2/patches/53778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IO2AZAm6WPtrQh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T08:42:00","name":"ipa-split: Don'\''t split returns_twice functions [PR106923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IO2AZAm6WPtrQh@tucnak/mbox/"},{"id":53792,"url":"https://patchwork.plctlab.org/api/1.2/patches/53792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IY7Er3m7bAxKCS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-07T09:25:00","name":"[committed] testsuite: Expect -Wdeprecated warning in warn/Wstrict-aliasing-bogus-union-2.C for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+IY7Er3m7bAxKCS@tucnak/mbox/"},{"id":53817,"url":"https://patchwork.plctlab.org/api/1.2/patches/53817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v17oqh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-07T10:29:26","name":"lra: Replace subregs in bare uses & clobbers [PR108681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0v17oqh.fsf@arm.com/mbox/"},{"id":53866,"url":"https://patchwork.plctlab.org/api/1.2/patches/53866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207124156.853506-1-vit.kabele@sysgo.com/","msgid":"<20230207124156.853506-1-vit.kabele@sysgo.com>","list_archive_url":null,"date":"2023-02-07T12:41:57","name":"Print padding size when aligning struct member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207124156.853506-1-vit.kabele@sysgo.com/mbox/"},{"id":53885,"url":"https://patchwork.plctlab.org/api/1.2/patches/53885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207132511.94760-1-guojiufu@linux.ibm.com/","msgid":"<20230207132511.94760-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-07T13:25:11","name":"rs6000: Add new patterns rlwinm with mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207132511.94760-1-guojiufu@linux.ibm.com/mbox/"},{"id":53887,"url":"https://patchwork.plctlab.org/api/1.2/patches/53887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207133828.B735D139ED@imap2.suse-dmz.suse.de/","msgid":"<20230207133828.B735D139ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-07T13:38:28","name":"tree-optimization/26854 - compile-time hog in SSA forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207133828.B735D139ED@imap2.suse-dmz.suse.de/mbox/"},{"id":53889,"url":"https://patchwork.plctlab.org/api/1.2/patches/53889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de/","msgid":"<20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-07T13:49:20","name":"tree-optimization/26854 - slow bitmap operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207134920.8BDD3139ED@imap2.suse-dmz.suse.de/mbox/"},{"id":53918,"url":"https://patchwork.plctlab.org/api/1.2/patches/53918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com/","msgid":"<7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com>","list_archive_url":null,"date":"2023-02-07T14:07:56","name":"[pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ee31afa-d5c5-3d34-85e6-6034165876de@redhat.com/mbox/"},{"id":53991,"url":"https://patchwork.plctlab.org/api/1.2/patches/53991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+KAUnyceKGxghOR@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-07T16:46:10","name":"[v4] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+KAUnyceKGxghOR@redhat.com/mbox/"},{"id":53992,"url":"https://patchwork.plctlab.org/api/1.2/patches/53992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207164847.30568-1-polacek@redhat.com/","msgid":"<20230207164847.30568-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-07T16:48:47","name":"[pushed] doc: Update -fchar8_t documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207164847.30568-1-polacek@redhat.com/mbox/"},{"id":53993,"url":"https://patchwork.plctlab.org/api/1.2/patches/53993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207165000.AC93020426@pchp3.se.axis.com/","msgid":"<20230207165000.AC93020426@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-07T16:50:00","name":"testsuite: XFAIL bogus g++.dg/warn/Wstringop-overflow-4.C:144, PR106120","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207165000.AC93020426@pchp3.se.axis.com/mbox/"},{"id":54040,"url":"https://patchwork.plctlab.org/api/1.2/patches/54040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207183813.978782042C@pchp3.se.axis.com/","msgid":"<20230207183813.978782042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-07T18:38:13","name":"testsuite: Generalize check_effective_target_lra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207183813.978782042C@pchp3.se.axis.com/mbox/"},{"id":54059,"url":"https://patchwork.plctlab.org/api/1.2/patches/54059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-157fad65-8e00-4b72-b203-2166df85c671-1675798593924@3c-app-gmx-bs54/","msgid":"","list_archive_url":null,"date":"2023-02-07T19:36:33","name":"Fortran: error handling of global entity appearing in COMMON block [PR103259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-157fad65-8e00-4b72-b203-2166df85c671-1675798593924@3c-app-gmx-bs54/mbox/"},{"id":54069,"url":"https://patchwork.plctlab.org/api/1.2/patches/54069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207201959.1545413-1-apinski@marvell.com/","msgid":"<20230207201959.1545413-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-07T20:19:59","name":"[COMMITTED,GCC,12] Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207201959.1545413-1-apinski@marvell.com/mbox/"},{"id":54083,"url":"https://patchwork.plctlab.org/api/1.2/patches/54083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207211357.1226071-1-dmalcolm@redhat.com/","msgid":"<20230207211357.1226071-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-07T21:13:57","name":"[pushed] analyzer: fix -Wanalyzer-use-of-uninitialized-value false +ve on \"read\" [PR108661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230207211357.1226071-1-dmalcolm@redhat.com/mbox/"},{"id":54100,"url":"https://patchwork.plctlab.org/api/1.2/patches/54100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrxum82.fsf@euler.schwinge.homeip.net/","msgid":"<874jrxum82.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-07T22:47:25","name":"Fix '\''libgomp.fortran/reverse-offload-6.f90'\'' nvptx offloading compilation (was: [Patch] libgomp: Fix reverse offload issues)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrxum82.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54142,"url":"https://patchwork.plctlab.org/api/1.2/patches/54142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023024.225500-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023024.225500-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:30:24","name":"RISC-V: Add vadc/vsbc C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023024.225500-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54143,"url":"https://patchwork.plctlab.org/api/1.2/patches/54143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023229.225998-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023229.225998-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:32:29","name":"RISC-V: Add vadc.vvm/vadc.vxm C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023229.225998-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54144,"url":"https://patchwork.plctlab.org/api/1.2/patches/54144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023430.226464-1-juzhe.zhong@rivai.ai/","msgid":"<20230208023430.226464-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:34:30","name":"RISC-V: Add vsbc.vvm/vsbc.vxm C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208023430.226464-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54155,"url":"https://patchwork.plctlab.org/api/1.2/patches/54155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024725.229946-1-juzhe.zhong@rivai.ai/","msgid":"<20230208024725.229946-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:47:25","name":"RISC-V: Add vadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024725.229946-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54149,"url":"https://patchwork.plctlab.org/api/1.2/patches/54149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024910.230380-1-juzhe.zhong@rivai.ai/","msgid":"<20230208024910.230380-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:49:10","name":"RISC-V: Add vsbc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208024910.230380-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54156,"url":"https://patchwork.plctlab.org/api/1.2/patches/54156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208025527.231767-1-juzhe.zhong@rivai.ai/","msgid":"<20230208025527.231767-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T02:55:27","name":"[2/3] RISC-V: Add vadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208025527.231767-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54158,"url":"https://patchwork.plctlab.org/api/1.2/patches/54158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208031059.248235-1-juzhe.zhong@rivai.ai/","msgid":"<20230208031059.248235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T03:10:59","name":"RISC-V: Fix indent [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208031059.248235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54179,"url":"https://patchwork.plctlab.org/api/1.2/patches/54179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com/","msgid":"<740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com>","list_archive_url":null,"date":"2023-02-08T05:08:28","name":"[rs6000] Split TImode for logical operations in expand pass [PR100694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/740e9ed6-8730-1dec-ca78-a002df8d431a@linux.ibm.com/mbox/"},{"id":54261,"url":"https://patchwork.plctlab.org/api/1.2/patches/54261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Niv1eQMRe80IJM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:52:15","name":"vect-patterns: Fix up vect_widened_op_tree [PR108692]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Niv1eQMRe80IJM@tucnak/mbox/"},{"id":54263,"url":"https://patchwork.plctlab.org/api/1.2/patches/54263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlel87cug.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:58:31","name":"vect: Check gather/scatter offset types [PR108316]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlel87cug.fsf@arm.com/mbox/"},{"id":54262,"url":"https://patchwork.plctlab.org/api/1.2/patches/54262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NkZcal2ZRHLBZw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T08:59:17","name":"c++: Mangle EXCESS_PRECISION_EXPR as fold_convert REAL_CST [PR108698]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NkZcal2ZRHLBZw@tucnak/mbox/"},{"id":54288,"url":"https://patchwork.plctlab.org/api/1.2/patches/54288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NoWtjlMx8itfDf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T09:16:10","name":"tree.def: Remove outdated comment on SAD_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+NoWtjlMx8itfDf@tucnak/mbox/"},{"id":54325,"url":"https://patchwork.plctlab.org/api/1.2/patches/54325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Nu6les4SuFnrsB@guest.guest/","msgid":"","list_archive_url":null,"date":"2023-02-08T09:44:10","name":"ada: Fix musl build on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Nu6les4SuFnrsB@guest.guest/mbox/"},{"id":54381,"url":"https://patchwork.plctlab.org/api/1.2/patches/54381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208105147.214712-1-juzhe.zhong@rivai.ai/","msgid":"<20230208105147.214712-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T10:51:47","name":"RISC-V: Fix indent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208105147.214712-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54420,"url":"https://patchwork.plctlab.org/api/1.2/patches/54420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at/","msgid":"<932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-08T12:02:36","name":"gimplify size expressions in parameters for all types [PR107557] [PR108423]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/932c3fcb674894cbf933fdb679d966487150d81c.camel@tugraz.at/mbox/"},{"id":54424,"url":"https://patchwork.plctlab.org/api/1.2/patches/54424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Oc9UZp29kXsJPW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-08T13:00:37","name":"[committed] testsuite: Fix up PR108525 test [PR108525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Oc9UZp29kXsJPW@tucnak/mbox/"},{"id":54431,"url":"https://patchwork.plctlab.org/api/1.2/patches/54431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsbg6zr3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T13:41:20","name":"[pushed] testsuite: Import objc-dg-prune in execute.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsbg6zr3.fsf@arm.com/mbox/"},{"id":54544,"url":"https://patchwork.plctlab.org/api/1.2/patches/54544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-1-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:08","name":"[pushed,wwwdocs] gcc-13: linkify some options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-1-dmalcolm@redhat.com/mbox/"},{"id":54548,"url":"https://patchwork.plctlab.org/api/1.2/patches/54548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-2-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:09","name":"[pushed,wwwdocs] gcc-13: add SARIF and other diagnostics improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-2-dmalcolm@redhat.com/mbox/"},{"id":54549,"url":"https://patchwork.plctlab.org/api/1.2/patches/54549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-3-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:10","name":"[pushed,wwwdocs] gcc-13: add -Wxor-used-as-pow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-3-dmalcolm@redhat.com/mbox/"},{"id":54545,"url":"https://patchwork.plctlab.org/api/1.2/patches/54545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-4-dmalcolm@redhat.com/","msgid":"<20230208173711.1278104-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T17:37:11","name":"[pushed,wwwdocs] gcc-13: add analyzer improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208173711.1278104-4-dmalcolm@redhat.com/mbox/"},{"id":54577,"url":"https://patchwork.plctlab.org/api/1.2/patches/54577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208185021.1281451-1-dmalcolm@redhat.com/","msgid":"<20230208185021.1281451-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-08T18:50:21","name":"[pushed] analyzer: fix overzealous state purging with on-stack structs [PR108704]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208185021.1281451-1-dmalcolm@redhat.com/mbox/"},{"id":54588,"url":"https://patchwork.plctlab.org/api/1.2/patches/54588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208191348.1580462-1-apinski@marvell.com/","msgid":"<20230208191348.1580462-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-08T19:13:48","name":"tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208191348.1580462-1-apinski@marvell.com/mbox/"},{"id":54600,"url":"https://patchwork.plctlab.org/api/1.2/patches/54600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208204551.0D78A2040B@pchp3.se.axis.com/","msgid":"<20230208204551.0D78A2040B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-08T20:45:51","name":"testsuite: Fix asm-goto-with-outputs tests; limit to lra targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208204551.0D78A2040B@pchp3.se.axis.com/mbox/"},{"id":54601,"url":"https://patchwork.plctlab.org/api/1.2/patches/54601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205236.267934-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205236.267934-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:52:36","name":"RISC-V: Add vmadc/vsbc C/C++ API support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205236.267934-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54602,"url":"https://patchwork.plctlab.org/api/1.2/patches/54602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205448.269030-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205448.269030-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:54:48","name":"RISC-V: Add vmadc C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205448.269030-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54603,"url":"https://patchwork.plctlab.org/api/1.2/patches/54603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205615.269803-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205615.269803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:56:15","name":"RISC-V: Add vmsbc C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205615.269803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54604,"url":"https://patchwork.plctlab.org/api/1.2/patches/54604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205727.270442-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205727.270442-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:57:26","name":"RISC-V: Add vmadc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205727.270442-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54608,"url":"https://patchwork.plctlab.org/api/1.2/patches/54608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205837.271078-1-juzhe.zhong@rivai.ai/","msgid":"<20230208205837.271078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-08T20:58:37","name":"RISC-V: Add vmsbc C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208205837.271078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":54618,"url":"https://patchwork.plctlab.org/api/1.2/patches/54618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208210140.391014-1-polacek@redhat.com/","msgid":"<20230208210140.391014-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-08T21:01:40","name":"c++: ICE initing lifetime-extended constexpr var [PR107079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208210140.391014-1-polacek@redhat.com/mbox/"},{"id":54619,"url":"https://patchwork.plctlab.org/api/1.2/patches/54619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208211419.1583473-1-apinski@marvell.com/","msgid":"<20230208211419.1583473-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-08T21:14:19","name":"When simplifing BFR of an insert, require a mode precision integral type (PR108688)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208211419.1583473-1-apinski@marvell.com/mbox/"},{"id":54628,"url":"https://patchwork.plctlab.org/api/1.2/patches/54628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208214533.031B633E84@hamza.pair.com/","msgid":"<20230208214533.031B633E84@hamza.pair.com>","list_archive_url":null,"date":"2023-02-08T21:45:30","name":"[pushed] doc: Change fsf.org to www.fsf.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230208214533.031B633E84@hamza.pair.com/mbox/"},{"id":54637,"url":"https://patchwork.plctlab.org/api/1.2/patches/54637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB54127FF670644B5182B84459ACD89@AM0PR04MB5412.eurprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T23:38:21","name":"libstdc++: testsuite: Add char8_t to codecvt_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AM0PR04MB54127FF670644B5182B84459ACD89@AM0PR04MB5412.eurprd04.prod.outlook.com/mbox/"},{"id":54638,"url":"https://patchwork.plctlab.org/api/1.2/patches/54638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2c1ae82-25b0-6a50-ab6a-27a19c4117df@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-08T23:42:40","name":"[committed] c: Update checks on constexpr pointer initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2c1ae82-25b0-6a50-ab6a-27a19c4117df@codesourcery.com/mbox/"},{"id":54669,"url":"https://patchwork.plctlab.org/api/1.2/patches/54669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+RXRJj4upKUtccH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T02:15:32","name":"[v2] c++: ICE initing lifetime-extended constexpr var [PR107079]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+RXRJj4upKUtccH@redhat.com/mbox/"},{"id":54797,"url":"https://patchwork.plctlab.org/api/1.2/patches/54797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209075101.2699033E6A@hamza.pair.com/","msgid":"<20230209075101.2699033E6A@hamza.pair.com>","list_archive_url":null,"date":"2023-02-09T07:50:58","name":"[pushed] wwwdocs: readings: Update MicroBlaze Processor Reference reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209075101.2699033E6A@hamza.pair.com/mbox/"},{"id":54800,"url":"https://patchwork.plctlab.org/api/1.2/patches/54800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+SxumGulM+AgYvM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T08:41:30","name":"c++, debug: Fix up locus of DW_TAG_imported_module [PR108716]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+SxumGulM+AgYvM@tucnak/mbox/"},{"id":54804,"url":"https://patchwork.plctlab.org/api/1.2/patches/54804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com/","msgid":"<026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com>","list_archive_url":null,"date":"2023-02-09T08:56:09","name":"Fortran/OpenMP: Fix -fopenmp-simd for '\''omp assume(s)'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026d0b0c-bd42-1939-e500-f1f9b2676825@codesourcery.com/mbox/"},{"id":54827,"url":"https://patchwork.plctlab.org/api/1.2/patches/54827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmfsbfuq3a.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-09T09:48:25","name":"testsuite: adjust patterns in RISC-V tests to skip unwind table directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmfsbfuq3a.fsf@suse.de/mbox/"},{"id":54855,"url":"https://patchwork.plctlab.org/api/1.2/patches/54855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0030ad6-b152-c307-7c0c-b2d447cb51fb@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-09T10:35:37","name":"docs: add cavear for __builtin_cpu_supports","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0030ad6-b152-c307-7c0c-b2d447cb51fb@suse.cz/mbox/"},{"id":54874,"url":"https://patchwork.plctlab.org/api/1.2/patches/54874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209110617.3370-2-shiyulong@iscas.ac.cn/","msgid":"<20230209110617.3370-2-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-09T11:06:17","name":"[V1,1/1] UNRATIFIED RISC-V: Add '\''ZiCond'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209110617.3370-2-shiyulong@iscas.ac.cn/mbox/"},{"id":54878,"url":"https://patchwork.plctlab.org/api/1.2/patches/54878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edqz1437.fsf@euler.schwinge.homeip.net/","msgid":"<87edqz1437.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:16:28","name":"[og12] '\''c-c++-common/gomp/alloc-pinned-1.c'\'' -> '\''libgomp.c-c++-common/alloc-pinned-1.c'\'' (was: [PATCH 5/5] openmp: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edqz1437.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54879,"url":"https://patchwork.plctlab.org/api/1.2/patches/54879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkm313m6.fsf@euler.schwinge.homeip.net/","msgid":"<87bkm313m6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:26:41","name":"[og12] '\''{c-c++-common,gfortran.dg}/gomp/uses_allocators-*'\'' -> '\''libgomp.{c-c++-common,fortran}/uses_allocators-*'\'' (was: [PATCH, OpenMP] Implement uses_allocators clause for target regions)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkm313m6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54880,"url":"https://patchwork.plctlab.org/api/1.2/patches/54880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwr136o.fsf@euler.schwinge.homeip.net/","msgid":"<877cwr136o.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-09T11:35:59","name":"[og12] '\''gfortran.dg/gomp/allocate-4.f90'\'' -> '\''libgomp.fortran/allocate-5.f90'\'' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwr136o.fsf@euler.schwinge.homeip.net/mbox/"},{"id":54902,"url":"https://patchwork.plctlab.org/api/1.2/patches/54902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+TjBOP6PzjLP4Ua@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T12:11:48","name":"i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+TjBOP6PzjLP4Ua@tucnak/mbox/"},{"id":54948,"url":"https://patchwork.plctlab.org/api/1.2/patches/54948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com/","msgid":"<181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com>","list_archive_url":null,"date":"2023-02-09T13:26:00","name":"[1/2,v3,ping] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/181c2ebf-738e-4105-2b7e-f931ed97f16b@arm.com/mbox/"},{"id":54949,"url":"https://patchwork.plctlab.org/api/1.2/patches/54949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com/","msgid":"<92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com>","list_archive_url":null,"date":"2023-02-09T13:26:22","name":"[2/2,v3,ping] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92133f1e-ff7e-2dfd-7311-41d8d8357b15@arm.com/mbox/"},{"id":54984,"url":"https://patchwork.plctlab.org/api/1.2/patches/54984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142524.D3B4B38582B0@sourceware.org/","msgid":"<20230209142524.D3B4B38582B0@sourceware.org>","list_archive_url":null,"date":"2023-02-09T14:24:40","name":"target/108738 - optimize bit operations in STV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142524.D3B4B38582B0@sourceware.org/mbox/"},{"id":54985,"url":"https://patchwork.plctlab.org/api/1.2/patches/54985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142544.6C9C4385B52D@sourceware.org/","msgid":"<20230209142544.6C9C4385B52D@sourceware.org>","list_archive_url":null,"date":"2023-02-09T14:25:01","name":"target/108738 - STV bitmap operations compile-time hog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209142544.6C9C4385B52D@sourceware.org/mbox/"},{"id":55042,"url":"https://patchwork.plctlab.org/api/1.2/patches/55042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Ub70j63NkbaekZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T16:14:39","name":"c++: Don'\''t defer local statics initialized with constant expressions [PR108702]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+Ub70j63NkbaekZ@tucnak/mbox/"},{"id":55043,"url":"https://patchwork.plctlab.org/api/1.2/patches/55043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UdYvqGpAggRqVD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-09T16:20:50","name":"[wwwdocs] gcc-13/changes.html: Document C++ -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UdYvqGpAggRqVD@tucnak/mbox/"},{"id":55051,"url":"https://patchwork.plctlab.org/api/1.2/patches/55051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16909-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T17:16:40","name":"[1/2] middle-end: Fix wrong overmatching of div-bitmask by using new optabs [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16909-tamar@arm.com/mbox/"},{"id":55052,"url":"https://patchwork.plctlab.org/api/1.2/patches/55052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UrwQSz3hWz+Puo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T17:22:09","name":"[2/2] AArch64 Update div-bitmask to implement new optab instead of target hook [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+UrwQSz3hWz+Puo@arm.com/mbox/"},{"id":55053,"url":"https://patchwork.plctlab.org/api/1.2/patches/55053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209173922.30789-1-polacek@redhat.com/","msgid":"<20230209173922.30789-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-09T17:39:22","name":"c++: ICE with -fno-elide-constructors and trivial fn [PR101073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209173922.30789-1-polacek@redhat.com/mbox/"},{"id":55061,"url":"https://patchwork.plctlab.org/api/1.2/patches/55061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209181722.3178411-1-ppalka@redhat.com/","msgid":"<20230209181722.3178411-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-09T18:17:22","name":"c++: sizeof(expr) in non-templated requires-expr [PR108563]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209181722.3178411-1-ppalka@redhat.com/mbox/"},{"id":55091,"url":"https://patchwork.plctlab.org/api/1.2/patches/55091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3ec97bf-eaa2-d472-3db8-74989015407e@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T20:13:43","name":"amdgcn: Add instruction patterns for vector operations on complex numbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3ec97bf-eaa2-d472-3db8-74989015407e@codesourcery.com/mbox/"},{"id":55092,"url":"https://patchwork.plctlab.org/api/1.2/patches/55092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-be314e88-a322-42a7-ad50-5058cc1eb34b-1675974508480@3c-app-gmx-bap49/","msgid":"","list_archive_url":null,"date":"2023-02-09T20:28:28","name":"[committed] Fortran: catch invalid kind in character conversion [PR69636,PR103779]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-be314e88-a322-42a7-ad50-5058cc1eb34b-1675974508480@3c-app-gmx-bap49/mbox/"},{"id":55097,"url":"https://patchwork.plctlab.org/api/1.2/patches/55097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209214544.20460-1-juzhe.zhong@rivai.ai/","msgid":"<20230209214544.20460-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:45:44","name":"RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209214544.20460-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55098,"url":"https://patchwork.plctlab.org/api/1.2/patches/55098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e445b420-0e25-3f41-7b79-dd22a2775c4d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-09T21:49:34","name":"[pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization (version 2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e445b420-0e25-3f41-7b79-dd22a2775c4d@redhat.com/mbox/"},{"id":55099,"url":"https://patchwork.plctlab.org/api/1.2/patches/55099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215019.22674-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215019.22674-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:50:19","name":"RISC-V: Add vnsrl C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215019.22674-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55100,"url":"https://patchwork.plctlab.org/api/1.2/patches/55100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215241.23872-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215241.23872-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:52:41","name":"RISC-V: Add vnsra C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215241.23872-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55101,"url":"https://patchwork.plctlab.org/api/1.2/patches/55101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215354.24527-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215354.24527-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:53:54","name":"RISC-V: Add vncvt C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215354.24527-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55102,"url":"https://patchwork.plctlab.org/api/1.2/patches/55102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215502.25158-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215502.25158-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:55:02","name":"RISC-V: Add vmv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215502.25158-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55104,"url":"https://patchwork.plctlab.org/api/1.2/patches/55104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215612.25818-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215612.25818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:56:12","name":"RISC-V: Add vmv.v.x C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215612.25818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55105,"url":"https://patchwork.plctlab.org/api/1.2/patches/55105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215713.26388-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215713.26388-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:57:13","name":"RISC-V: Add vmerge C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215713.26388-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55106,"url":"https://patchwork.plctlab.org/api/1.2/patches/55106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215835.27124-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215835.27124-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:58:35","name":"RISC-V: Add vnsrl C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215835.27124-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55107,"url":"https://patchwork.plctlab.org/api/1.2/patches/55107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215943.27763-1-juzhe.zhong@rivai.ai/","msgid":"<20230209215943.27763-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T21:59:43","name":"RISC-V: Add vnsra C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209215943.27763-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55108,"url":"https://patchwork.plctlab.org/api/1.2/patches/55108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220103.28557-1-juzhe.zhong@rivai.ai/","msgid":"<20230209220103.28557-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T22:01:03","name":"RISC-V: Add vncvt/vmv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220103.28557-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55109,"url":"https://patchwork.plctlab.org/api/1.2/patches/55109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220214.29208-1-juzhe.zhong@rivai.ai/","msgid":"<20230209220214.29208-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-09T22:02:14","name":"RISC-V: Add vmerge C++ API test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209220214.29208-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55110,"url":"https://patchwork.plctlab.org/api/1.2/patches/55110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209221530.1349166-1-dmalcolm@redhat.com/","msgid":"<20230209221530.1349166-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-09T22:15:30","name":"[pushed] analyzer: fix further overzealous state purging [PR108733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230209221530.1349166-1-dmalcolm@redhat.com/mbox/"},{"id":55144,"url":"https://patchwork.plctlab.org/api/1.2/patches/55144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com/","msgid":"<5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com>","list_archive_url":null,"date":"2023-02-10T00:01:28","name":"PR tree-optimization/108520 - Add function context for querying global ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f8a85e0-71a3-0394-6f1a-18633cd6c71a@redhat.com/mbox/"},{"id":55171,"url":"https://patchwork.plctlab.org/api/1.2/patches/55171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcdf4d9-70fb-80fb-557-a0b8a4121ab0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-10T00:43:27","name":"[committed] c: Allow conversions of null pointer constants to nullptr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcdf4d9-70fb-80fb-557-a0b8a4121ab0@codesourcery.com/mbox/"},{"id":55183,"url":"https://patchwork.plctlab.org/api/1.2/patches/55183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210014311.1626049-1-apinski@marvell.com/","msgid":"<20230210014311.1626049-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-10T01:43:11","name":"[COMMITTED] tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210014311.1626049-1-apinski@marvell.com/mbox/"},{"id":55190,"url":"https://patchwork.plctlab.org/api/1.2/patches/55190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com/","msgid":"<11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com>","list_archive_url":null,"date":"2023-02-10T02:38:06","name":"PR tree-optimization/108687 - Query rangers cache in readonly mode only internally","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/11e4d748-a5e7-8931-ccad-911f3591da3b@redhat.com/mbox/"},{"id":55203,"url":"https://patchwork.plctlab.org/api/1.2/patches/55203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210025952.1887696-1-xionghuluo@tencent.com/","msgid":"<20230210025952.1887696-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-02-10T02:59:52","name":"[v4] rs6000: Fix incorrect RTL for Power LE when removing the UNSPECS [PR106069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210025952.1887696-1-xionghuluo@tencent.com/mbox/"},{"id":55209,"url":"https://patchwork.plctlab.org/api/1.2/patches/55209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210035312.1630020-1-apinski@marvell.com/","msgid":"<20230210035312.1630020-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-10T03:53:12","name":"[PATCHv4,AARCH64] Fix PR target/103100 -mstrict-align and memset on not aligned buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210035312.1630020-1-apinski@marvell.com/mbox/"},{"id":55237,"url":"https://patchwork.plctlab.org/api/1.2/patches/55237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062131.199690-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062131.199690-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:21:31","name":"RISC-V: Add fixed-point support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062131.199690-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55239,"url":"https://patchwork.plctlab.org/api/1.2/patches/55239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062446.201653-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062446.201653-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:24:46","name":"RISC-V: Add vssrl.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062446.201653-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55240,"url":"https://patchwork.plctlab.org/api/1.2/patches/55240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062607.202577-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062607.202577-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:26:07","name":"RISC-V: Add vssrl.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062607.202577-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55241,"url":"https://patchwork.plctlab.org/api/1.2/patches/55241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062738.203552-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062738.203552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:27:38","name":"RISC-V: Add vssra.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062738.203552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55242,"url":"https://patchwork.plctlab.org/api/1.2/patches/55242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062921.204645-1-juzhe.zhong@rivai.ai/","msgid":"<20230210062921.204645-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:29:21","name":"RISC-V: Add vssra.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210062921.204645-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55243,"url":"https://patchwork.plctlab.org/api/1.2/patches/55243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063032.205484-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063032.205484-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:30:32","name":"RISC-V: Add vsmul.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063032.205484-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55244,"url":"https://patchwork.plctlab.org/api/1.2/patches/55244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063147.206320-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063147.206320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:31:47","name":"RISC-V: Add vsmul.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063147.206320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55245,"url":"https://patchwork.plctlab.org/api/1.2/patches/55245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063258.207272-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063258.207272-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:32:58","name":"RISC-V: Add vnclip C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063258.207272-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55246,"url":"https://patchwork.plctlab.org/api/1.2/patches/55246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063426.208355-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063426.208355-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:34:26","name":"RISC-V: Add vasubu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063426.208355-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55247,"url":"https://patchwork.plctlab.org/api/1.2/patches/55247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063547.209320-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063547.209320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:35:47","name":"RISC-V: Add vasubu.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063547.209320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55248,"url":"https://patchwork.plctlab.org/api/1.2/patches/55248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063701.210261-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063701.210261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:37:01","name":"RISC-V: Add vasub.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063701.210261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55249,"url":"https://patchwork.plctlab.org/api/1.2/patches/55249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063822.211462-1-juzhe.zhong@rivai.ai/","msgid":"<20230210063822.211462-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:38:22","name":"RISC-V: Add vasub.vv C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210063822.211462-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55250,"url":"https://patchwork.plctlab.org/api/1.2/patches/55250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064141.213840-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064141.213840-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:41:41","name":"RISC-V: Add vaaddu.vx C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064141.213840-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55251,"url":"https://patchwork.plctlab.org/api/1.2/patches/55251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064248.214584-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064248.214584-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:42:48","name":"RISC-V: Add vaaddu.vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064248.214584-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55252,"url":"https://patchwork.plctlab.org/api/1.2/patches/55252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064356.215393-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064356.215393-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:43:56","name":"RISC-V: Add vaadd.vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064356.215393-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55253,"url":"https://patchwork.plctlab.org/api/1.2/patches/55253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064516.216360-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064516.216360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:45:16","name":"RISC-V: Finish fixed-point C API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064516.216360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55254,"url":"https://patchwork.plctlab.org/api/1.2/patches/55254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064634.217281-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064634.217281-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:46:34","name":"RISC-V: Add vssrl.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064634.217281-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55255,"url":"https://patchwork.plctlab.org/api/1.2/patches/55255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064758.218198-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064758.218198-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:47:58","name":"RISC-V: Add vssrl.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064758.218198-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55257,"url":"https://patchwork.plctlab.org/api/1.2/patches/55257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064907.218979-1-juzhe.zhong@rivai.ai/","msgid":"<20230210064907.218979-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:49:07","name":"RISC-V: Add vssra.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210064907.218979-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55258,"url":"https://patchwork.plctlab.org/api/1.2/patches/55258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065017.219817-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065017.219817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:50:17","name":"RISC-V: Add vssra.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065017.219817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55261,"url":"https://patchwork.plctlab.org/api/1.2/patches/55261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065118.220507-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065118.220507-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:51:18","name":"RISC-V: Add vsmul.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065118.220507-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55262,"url":"https://patchwork.plctlab.org/api/1.2/patches/55262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065232.221558-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065232.221558-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:52:32","name":"RISC-V: Add vsmul.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065232.221558-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55263,"url":"https://patchwork.plctlab.org/api/1.2/patches/55263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065344.222680-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065344.222680-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:53:44","name":"RISC-V: Add vnclip C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065344.222680-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55264,"url":"https://patchwork.plctlab.org/api/1.2/patches/55264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065502.223635-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065502.223635-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:55:02","name":"RISC-V: Add vasubu.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065502.223635-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55266,"url":"https://patchwork.plctlab.org/api/1.2/patches/55266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065615.224458-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065615.224458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:56:15","name":"RISC-V: Add vasubu.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065615.224458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55267,"url":"https://patchwork.plctlab.org/api/1.2/patches/55267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065730.225300-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065730.225300-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:57:30","name":"RISC-V: Add vasub.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065730.225300-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55270,"url":"https://patchwork.plctlab.org/api/1.2/patches/55270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065840.226106-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065840.226106-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:58:40","name":"RISC-V: Add vasub.vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065840.226106-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55271,"url":"https://patchwork.plctlab.org/api/1.2/patches/55271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065945.227003-1-juzhe.zhong@rivai.ai/","msgid":"<20230210065945.227003-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T06:59:45","name":"RISC-V: Add vaaddu.vx C++ Api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210065945.227003-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55272,"url":"https://patchwork.plctlab.org/api/1.2/patches/55272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070055.228117-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070055.228117-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:00:55","name":"RISC-V: Add vaaddu.vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070055.228117-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55273,"url":"https://patchwork.plctlab.org/api/1.2/patches/55273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070213.229246-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070213.229246-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:02:13","name":"RISC-V: Add vaadd.vx C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070213.229246-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55274,"url":"https://patchwork.plctlab.org/api/1.2/patches/55274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070314.229955-1-juzhe.zhong@rivai.ai/","msgid":"<20230210070314.229955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T07:03:14","name":"RISC-V: Add vaadd.vv C++ API tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210070314.229955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55363,"url":"https://patchwork.plctlab.org/api/1.2/patches/55363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101314.7636D3858C2D@sourceware.org/","msgid":"<20230210101314.7636D3858C2D@sourceware.org>","list_archive_url":null,"date":"2023-02-10T10:12:29","name":"tree-optimization/106722 - fix CD-DCE edge marking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101314.7636D3858C2D@sourceware.org/mbox/"},{"id":55366,"url":"https://patchwork.plctlab.org/api/1.2/patches/55366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrt25bb.fsf@euler.schwinge.homeip.net/","msgid":"<874jrt25bb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-10T10:16:56","name":"[GCC] In '\''contrib/config-list.mk'\'', clarify i686-symbolics-gnu to i686-gnu (was: RFA: Add makefile for cross-configuration torture test)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jrt25bb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":55367,"url":"https://patchwork.plctlab.org/api/1.2/patches/55367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101937.137591-1-juzhe.zhong@rivai.ai/","msgid":"<20230210101937.137591-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-10T10:19:37","name":"RISC-V: Add Full '\''v'\'' extension predicate to vsmul intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210101937.137591-1-juzhe.zhong@rivai.ai/mbox/"},{"id":55387,"url":"https://patchwork.plctlab.org/api/1.2/patches/55387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210110317.01B95385B513@sourceware.org/","msgid":"<20230210110317.01B95385B513@sourceware.org>","list_archive_url":null,"date":"2023-02-10T11:02:32","name":"tree-optimization/108724 - vectorized code getting piecewise expanded","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210110317.01B95385B513@sourceware.org/mbox/"},{"id":55399,"url":"https://patchwork.plctlab.org/api/1.2/patches/55399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2adb2ed-065a-cc9b-ed6b-29b2783c6651@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-10T11:52:47","name":"[v2] OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2adb2ed-065a-cc9b-ed6b-29b2783c6651@codesourcery.com/mbox/"},{"id":55466,"url":"https://patchwork.plctlab.org/api/1.2/patches/55466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com/","msgid":"<08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com>","list_archive_url":null,"date":"2023-02-10T16:47:08","name":"[pushed,PR108500] RA: Use simple LRA for huge functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08b7c01c-00f1-8428-e8eb-61508843b714@redhat.com/mbox/"},{"id":55500,"url":"https://patchwork.plctlab.org/api/1.2/patches/55500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com/","msgid":"<8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com>","list_archive_url":null,"date":"2023-02-10T17:42:06","name":"[pushed,PR108754] RA: Use caller save equivalent memory only for LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec50aaf-2b64-8bdf-94ed-726aff75dfda@redhat.com/mbox/"},{"id":55571,"url":"https://patchwork.plctlab.org/api/1.2/patches/55571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210203550.7A24033E6E@hamza.pair.com/","msgid":"<20230210203550.7A24033E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-10T20:35:47","name":"[pushed] wwwdocs: news/profiledriven: Update a Citeseer link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210203550.7A24033E6E@hamza.pair.com/mbox/"},{"id":55611,"url":"https://patchwork.plctlab.org/api/1.2/patches/55611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-2-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-2-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:41","name":"[RFC,v1,01/10] docs: Document a canonical RTL for a conditional-zero insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-2-philipp.tomsich@vrull.eu/mbox/"},{"id":55612,"url":"https://patchwork.plctlab.org/api/1.2/patches/55612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-3-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-3-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:42","name":"[RFC,v1,02/10] RISC-V: Recognize Zicond (conditional operations) extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-3-philipp.tomsich@vrull.eu/mbox/"},{"id":55613,"url":"https://patchwork.plctlab.org/api/1.2/patches/55613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-4-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-4-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:43","name":"[RFC,v1,03/10] RISC-V: Generate czero.eqz/nez on noce_try_store_flag_mask if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-4-philipp.tomsich@vrull.eu/mbox/"},{"id":55617,"url":"https://patchwork.plctlab.org/api/1.2/patches/55617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-5-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-5-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:44","name":"[RFC,v1,04/10] RISC-V: Support immediates in Zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-5-philipp.tomsich@vrull.eu/mbox/"},{"id":55616,"url":"https://patchwork.plctlab.org/api/1.2/patches/55616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-6-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-6-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:45","name":"[RFC,v1,05/10] RISC-V: Support noce_try_store_flag_mask as czero.eqz/czero.nez","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-6-philipp.tomsich@vrull.eu/mbox/"},{"id":55619,"url":"https://patchwork.plctlab.org/api/1.2/patches/55619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-7-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-7-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:46","name":"[RFC,v1,06/10] RISC-V: Recognize sign-extract + and cases for czero.eqz/nez","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-7-philipp.tomsich@vrull.eu/mbox/"},{"id":55622,"url":"https://patchwork.plctlab.org/api/1.2/patches/55622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-8-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-8-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:47","name":"[RFC,v1,07/10] RISC-V: Recognize bexti in negated if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-8-philipp.tomsich@vrull.eu/mbox/"},{"id":55621,"url":"https://patchwork.plctlab.org/api/1.2/patches/55621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-9-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-9-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:48","name":"[RFC,v1,08/10] ifcvt: add if-conversion to conditional-zero instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-9-philipp.tomsich@vrull.eu/mbox/"},{"id":55614,"url":"https://patchwork.plctlab.org/api/1.2/patches/55614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-10-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-10-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:49","name":"[RFC,v1,09/10] RISC-V: Recognize xventanacondops extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-10-philipp.tomsich@vrull.eu/mbox/"},{"id":55623,"url":"https://patchwork.plctlab.org/api/1.2/patches/55623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-11-philipp.tomsich@vrull.eu/","msgid":"<20230210224150.2801962-11-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-02-10T22:41:50","name":"[RFC,v1,10/10] RISC-V: Support XVentanaCondOps extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210224150.2801962-11-philipp.tomsich@vrull.eu/mbox/"},{"id":55626,"url":"https://patchwork.plctlab.org/api/1.2/patches/55626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210231605.1406181-1-dmalcolm@redhat.com/","msgid":"<20230210231605.1406181-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-10T23:16:05","name":"[pushed] analyzer: don'\''t warn for deref-before-check for checks in macros [PR108745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230210231605.1406181-1-dmalcolm@redhat.com/mbox/"},{"id":55663,"url":"https://patchwork.plctlab.org/api/1.2/patches/55663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-2-qing.zhao@oracle.com/","msgid":"<20230211005013.789161-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-11T00:50:12","name":"[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-2-qing.zhao@oracle.com/mbox/"},{"id":55664,"url":"https://patchwork.plctlab.org/api/1.2/patches/55664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-3-qing.zhao@oracle.com/","msgid":"<20230211005013.789161-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-11T00:50:13","name":"[v3,2/2] Update documentation to clarify a GCC extension (PR77650)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211005013.789161-3-qing.zhao@oracle.com/mbox/"},{"id":55677,"url":"https://patchwork.plctlab.org/api/1.2/patches/55677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824276DFE4615A5C14150FAA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-11T02:51:18","name":"RISC-V: Optimize the code gen of VLM/VSM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824276DFE4615A5C14150FAA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":55742,"url":"https://patchwork.plctlab.org/api/1.2/patches/55742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080135.01ED033E4B@hamza.pair.com/","msgid":"<20230211080135.01ED033E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T08:01:33","name":"[pushed] libstdc++: Update link to \"Worst-case efficient priority queues\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080135.01ED033E4B@hamza.pair.com/mbox/"},{"id":55743,"url":"https://patchwork.plctlab.org/api/1.2/patches/55743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080856.00DD733E83@hamza.pair.com/","msgid":"<20230211080856.00DD733E83@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T08:08:55","name":"[pushed] wwwdocs: readings: Update link to RX610 landing page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211080856.00DD733E83@hamza.pair.com/mbox/"},{"id":55744,"url":"https://patchwork.plctlab.org/api/1.2/patches/55744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com/","msgid":"<2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com>","list_archive_url":null,"date":"2023-02-11T08:33:46","name":"builtin-declaration-mismatch-7: fix LLP64 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b19c06a-57c5-6a55-d058-13eaa0a2e286@gmail.com/mbox/"},{"id":55754,"url":"https://patchwork.plctlab.org/api/1.2/patches/55754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB48245075FF3DB049086E5E1BA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-11T08:46:49","name":"RISC-V: Bugfix for mode tieable of the rvv bool types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB48245075FF3DB049086E5E1BA4DF9@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":55764,"url":"https://patchwork.plctlab.org/api/1.2/patches/55764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+dlcOSzUo6Jwwyg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-11T09:52:48","name":"ipa-cp: Punt for too large offsets [PR108605]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+dlcOSzUo6Jwwyg@tucnak/mbox/"},{"id":55801,"url":"https://patchwork.plctlab.org/api/1.2/patches/55801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211120050.AC42933E82@hamza.pair.com/","msgid":"<20230211120050.AC42933E82@hamza.pair.com>","list_archive_url":null,"date":"2023-02-11T12:00:48","name":"[pushed] doc: Adjust link to WG14 N965","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211120050.AC42933E82@hamza.pair.com/mbox/"},{"id":55836,"url":"https://patchwork.plctlab.org/api/1.2/patches/55836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211155934.3539787-1-stefansf@linux.ibm.com/","msgid":"<20230211155934.3539787-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-02-11T15:59:35","name":"IBM zSystems: Do not propagate scheduler state across basic blocks [PR108102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211155934.3539787-1-stefansf@linux.ibm.com/mbox/"},{"id":55842,"url":"https://patchwork.plctlab.org/api/1.2/patches/55842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211161044.3540594-1-stefansf@linux.ibm.com/","msgid":"<20230211161044.3540594-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-02-11T16:10:45","name":"IBM zSystems: Fix predicate execute_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230211161044.3540594-1-stefansf@linux.ibm.com/mbox/"},{"id":55884,"url":"https://patchwork.plctlab.org/api/1.2/patches/55884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212085845.92B8833E63@hamza.pair.com/","msgid":"<20230212085845.92B8833E63@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T08:58:43","name":"[pushed] libstdc++: Change www.unix.org to unix.org","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212085845.92B8833E63@hamza.pair.com/mbox/"},{"id":55896,"url":"https://patchwork.plctlab.org/api/1.2/patches/55896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212113359.18239-1-kito.cheng@sifive.com/","msgid":"<20230212113359.18239-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-12T11:33:59","name":"RISC-V: Handle vlenb correctly in unwinding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212113359.18239-1-kito.cheng@sifive.com/mbox/"},{"id":55900,"url":"https://patchwork.plctlab.org/api/1.2/patches/55900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212114716.B098C33E6E@hamza.pair.com/","msgid":"<20230212114716.B098C33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T11:47:14","name":"[pushed] doc: Remove direct reference to configure/build docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212114716.B098C33E6E@hamza.pair.com/mbox/"},{"id":55965,"url":"https://patchwork.plctlab.org/api/1.2/patches/55965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at/","msgid":"<6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-12T19:10:40","name":"[C] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a1e01a49bbbefe841f59b7b2fcf0dc7fdf4ee29.camel@tugraz.at/mbox/"},{"id":55980,"url":"https://patchwork.plctlab.org/api/1.2/patches/55980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212224332.B0B1233E50@hamza.pair.com/","msgid":"<20230212224332.B0B1233E50@hamza.pair.com>","list_archive_url":null,"date":"2023-02-12T22:43:30","name":"[pushed] libstdc++: Tweak link to N1780 (C++ standard)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230212224332.B0B1233E50@hamza.pair.com/mbox/"},{"id":56000,"url":"https://patchwork.plctlab.org/api/1.2/patches/56000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213024332.2614540-1-guojiufu@linux.ibm.com/","msgid":"<20230213024332.2614540-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-13T02:43:32","name":"[V2] rs6000: Add new patterns rlwinm with mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213024332.2614540-1-guojiufu@linux.ibm.com/mbox/"},{"id":56045,"url":"https://patchwork.plctlab.org/api/1.2/patches/56045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213051843.2615021-1-guojiufu@linux.ibm.com/","msgid":"<20230213051843.2615021-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-13T05:18:43","name":"[V2] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213051843.2615021-1-guojiufu@linux.ibm.com/mbox/"},{"id":56059,"url":"https://patchwork.plctlab.org/api/1.2/patches/56059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074113.266716-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074113.266716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:41:13","name":"RISC-V: Add integer compare C/C++ intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074113.266716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56061,"url":"https://patchwork.plctlab.org/api/1.2/patches/56061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074350.267734-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074350.267734-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:43:50","name":"RISC-V: Add vmsne.vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074350.267734-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56062,"url":"https://patchwork.plctlab.org/api/1.2/patches/56062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074525.268358-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074525.268358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:45:25","name":"RISC-V: Add vmsne vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074525.268358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56063,"url":"https://patchwork.plctlab.org/api/1.2/patches/56063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074647.268832-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074647.268832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:46:47","name":"RISC-V: Add vmslt vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074647.268832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56064,"url":"https://patchwork.plctlab.org/api/1.2/patches/56064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074810.269480-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074810.269480-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:48:10","name":"RISC-V: Add vmslt vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074810.269480-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56065,"url":"https://patchwork.plctlab.org/api/1.2/patches/56065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074914.269850-1-juzhe.zhong@rivai.ai/","msgid":"<20230213074914.269850-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:49:14","name":"RISC-V: Add vmsle vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213074914.269850-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56066,"url":"https://patchwork.plctlab.org/api/1.2/patches/56066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075037.270173-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075037.270173-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:50:37","name":"RISC-V: Add vmsle vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075037.270173-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56067,"url":"https://patchwork.plctlab.org/api/1.2/patches/56067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075149.270563-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075149.270563-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:51:49","name":"RISC-V: Add vmsgt vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075149.270563-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56068,"url":"https://patchwork.plctlab.org/api/1.2/patches/56068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075304.271252-1-juzhe.zhong@rivai.ai/","msgid":"<20230213075304.271252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T07:53:04","name":"RISC-V: Add vmsgt vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213075304.271252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56075,"url":"https://patchwork.plctlab.org/api/1.2/patches/56075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080303.285363-1-juzhe.zhong@rivai.ai/","msgid":"<20230213080303.285363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:03:03","name":"RISC-V: Add vmsge vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080303.285363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56076,"url":"https://patchwork.plctlab.org/api/1.2/patches/56076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080441.285645-1-juzhe.zhong@rivai.ai/","msgid":"<20230213080441.285645-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:04:41","name":"RISC-V: Add vmsge vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213080441.285645-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56083,"url":"https://patchwork.plctlab.org/api/1.2/patches/56083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082112.288170-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082112.288170-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:21:12","name":"RISC-V: Add vmseq vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082112.288170-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56084,"url":"https://patchwork.plctlab.org/api/1.2/patches/56084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082229.288515-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082229.288515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:22:29","name":"RISC-V: Add vmseq vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082229.288515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56085,"url":"https://patchwork.plctlab.org/api/1.2/patches/56085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082522.289082-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082522.289082-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:25:22","name":"RISC-V: Add binop constraints tests for integer compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082522.289082-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56086,"url":"https://patchwork.plctlab.org/api/1.2/patches/56086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082629.289383-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082629.289383-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:26:29","name":"RISC-V: Add vmsne vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082629.289383-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56087,"url":"https://patchwork.plctlab.org/api/1.2/patches/56087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082734.289679-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082734.289679-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:27:34","name":"RISC-V: Add vmsne vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082734.289679-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56088,"url":"https://patchwork.plctlab.org/api/1.2/patches/56088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082838.289977-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082838.289977-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:28:38","name":"RISC-V: Add vmslt vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082838.289977-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56089,"url":"https://patchwork.plctlab.org/api/1.2/patches/56089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082954.290285-1-juzhe.zhong@rivai.ai/","msgid":"<20230213082954.290285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:29:54","name":"RISC-V: Add vmslt vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213082954.290285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56090,"url":"https://patchwork.plctlab.org/api/1.2/patches/56090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083109.290640-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083109.290640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:31:09","name":"RISC-V: Add vmsle vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083109.290640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56091,"url":"https://patchwork.plctlab.org/api/1.2/patches/56091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083223.290961-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083223.290961-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:32:23","name":"RISC-V: Add vmsle vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083223.290961-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56092,"url":"https://patchwork.plctlab.org/api/1.2/patches/56092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083334.291298-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083334.291298-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:33:33","name":"RISC-V: Add vmsgt vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083334.291298-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56093,"url":"https://patchwork.plctlab.org/api/1.2/patches/56093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083431.291581-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083431.291581-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:34:31","name":"RISC-V: Add vmsgt vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083431.291581-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56094,"url":"https://patchwork.plctlab.org/api/1.2/patches/56094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083539.291955-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083539.291955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:35:39","name":"RISC-V: Add vmsge vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083539.291955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56095,"url":"https://patchwork.plctlab.org/api/1.2/patches/56095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083657.292491-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083657.292491-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:36:57","name":"RISC-V: Add vmsge vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083657.292491-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56096,"url":"https://patchwork.plctlab.org/api/1.2/patches/56096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083755.292800-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083755.292800-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:37:55","name":"RISC-V: Add vmseq vx C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083755.292800-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56097,"url":"https://patchwork.plctlab.org/api/1.2/patches/56097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083903.293123-1-juzhe.zhong@rivai.ai/","msgid":"<20230213083903.293123-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-13T08:39:03","name":"RISC-V: Add vmseq vv C++ tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213083903.293123-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56109,"url":"https://patchwork.plctlab.org/api/1.2/patches/56109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz/","msgid":"<43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz>","list_archive_url":null,"date":"2023-02-13T09:16:32","name":"[(pushed)] docs: document new param","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43d922a9-40a3-c6e0-74f7-a5b2d5197a47@suse.cz/mbox/"},{"id":56129,"url":"https://patchwork.plctlab.org/api/1.2/patches/56129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213093624.946572-1-claziss@gmail.com/","msgid":"<20230213093624.946572-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-02-13T09:36:24","name":"[committed] arc: Don'\''t use millicode thunks unless asked for.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213093624.946572-1-claziss@gmail.com/mbox/"},{"id":56165,"url":"https://patchwork.plctlab.org/api/1.2/patches/56165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213103853.502212-1-xry111@xry111.site/","msgid":"<20230213103853.502212-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-02-13T10:38:53","name":"LoongArch: Fix multiarch tuple canonization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213103853.502212-1-xry111@xry111.site/mbox/"},{"id":56168,"url":"https://patchwork.plctlab.org/api/1.2/patches/56168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta61hzw2t.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T10:41:30","name":"[Ping] ifcvt: Fix regression in aarch64/fcsel_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta61hzw2t.fsf@arm.com/mbox/"},{"id":56186,"url":"https://patchwork.plctlab.org/api/1.2/patches/56186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzg9hyhce.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T10:45:05","name":"[Ping^3] gomp: Various fixes for SVE types [PR101018]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzg9hyhce.fsf_-_@arm.com/mbox/"},{"id":56194,"url":"https://patchwork.plctlab.org/api/1.2/patches/56194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-2-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:34","name":"[1/5] RISC-V: Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-2-shihua@iscas.ac.cn/mbox/"},{"id":56200,"url":"https://patchwork.plctlab.org/api/1.2/patches/56200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-3-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:35","name":"[2/5] RISC-V: Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-3-shihua@iscas.ac.cn/mbox/"},{"id":56199,"url":"https://patchwork.plctlab.org/api/1.2/patches/56199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-4-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:36","name":"[3/5] RISC-V: Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-4-shihua@iscas.ac.cn/mbox/"},{"id":56192,"url":"https://patchwork.plctlab.org/api/1.2/patches/56192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-5-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:37","name":"[4/5] RISC-V: Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-5-shihua@iscas.ac.cn/mbox/"},{"id":56196,"url":"https://patchwork.plctlab.org/api/1.2/patches/56196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-6-shihua@iscas.ac.cn/","msgid":"<20230213104538.1287-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-13T10:45:38","name":"[5/5] RISC-V: Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213104538.1287-6-shihua@iscas.ac.cn/mbox/"},{"id":56201,"url":"https://patchwork.plctlab.org/api/1.2/patches/56201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213110058.0C9B61391B@imap2.suse-dmz.suse.de/","msgid":"<20230213110058.0C9B61391B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-13T11:00:56","name":"tree-optimization/108691 - indirect calls to setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213110058.0C9B61391B@imap2.suse-dmz.suse.de/mbox/"},{"id":56329,"url":"https://patchwork.plctlab.org/api/1.2/patches/56329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213145637.C023C138E6@imap2.suse-dmz.suse.de/","msgid":"<20230213145637.C023C138E6@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-13T14:56:37","name":"tree-optimization/28614 - high FRE time for gcc.c-torture/compile/20001226-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213145637.C023C138E6@imap2.suse-dmz.suse.de/mbox/"},{"id":56397,"url":"https://patchwork.plctlab.org/api/1.2/patches/56397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213170619.28996-1-polacek@redhat.com/","msgid":"<20230213170619.28996-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:06:19","name":"c++: fix ICE in joust_maybe_elide_copy [PR106675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213170619.28996-1-polacek@redhat.com/mbox/"},{"id":56398,"url":"https://patchwork.plctlab.org/api/1.2/patches/56398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-1-ppalka@redhat.com/","msgid":"<20230213172340.849204-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:23:39","name":"[1/2] c++: factor out TYPENAME_TYPE substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-1-ppalka@redhat.com/mbox/"},{"id":56399,"url":"https://patchwork.plctlab.org/api/1.2/patches/56399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-2-ppalka@redhat.com/","msgid":"<20230213172340.849204-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-13T17:23:40","name":"[2/2] c++: TYPENAME_TYPE lookup ignoring non-types [PR107773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213172340.849204-2-ppalka@redhat.com/mbox/"},{"id":56563,"url":"https://patchwork.plctlab.org/api/1.2/patches/56563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cz6db60m.fsf@aarsen.me/","msgid":"<86cz6db60m.fsf@aarsen.me>","list_archive_url":null,"date":"2023-02-13T18:51:28","name":"Ping: [PATCH+wwwdocs 0/8] A small Texinfo refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cz6db60m.fsf@aarsen.me/mbox/"},{"id":56489,"url":"https://patchwork.plctlab.org/api/1.2/patches/56489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213192700.2013187-1-rasmus.villemoes@prevas.dk/","msgid":"<20230213192700.2013187-1-rasmus.villemoes@prevas.dk>","list_archive_url":null,"date":"2023-02-13T19:27:00","name":"apply debug-remap to file names in .su files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213192700.2013187-1-rasmus.villemoes@prevas.dk/mbox/"},{"id":56490,"url":"https://patchwork.plctlab.org/api/1.2/patches/56490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aQe7tPDge5-3kXgBYSEcJz3XDqR2ZGkTwWRHMFXzyv0A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T19:27:43","name":"i386: Relax extract location operand mode requirements [PR108516]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aQe7tPDge5-3kXgBYSEcJz3XDqR2ZGkTwWRHMFXzyv0A@mail.gmail.com/mbox/"},{"id":56536,"url":"https://patchwork.plctlab.org/api/1.2/patches/56536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b21a2d3f-8d44-7311-ed3d-b06f70d9b7d4@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-13T20:28:15","name":"libgomp: Fix '\''target enter data'\'' with always pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b21a2d3f-8d44-7311-ed3d-b06f70d9b7d4@codesourcery.com/mbox/"},{"id":56548,"url":"https://patchwork.plctlab.org/api/1.2/patches/56548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com/","msgid":"<3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com>","list_archive_url":null,"date":"2023-02-13T21:12:51","name":"[pushed,PR108774] RA: Clear reg equiv caller_save_p flag when clearing defined_p flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b168a41-fbc5-b178-e810-c0d6c1646d1e@redhat.com/mbox/"},{"id":56552,"url":"https://patchwork.plctlab.org/api/1.2/patches/56552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-4f91f3ff-1a0f-441e-ae8b-8beffd701aa9-1676322798018@3c-app-gmx-bap61/","msgid":"","list_archive_url":null,"date":"2023-02-13T21:13:18","name":"[committed] Fortran: error recovery after invalid use of CLASS variable [PR103475]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-4f91f3ff-1a0f-441e-ae8b-8beffd701aa9-1676322798018@3c-app-gmx-bap61/mbox/"},{"id":56589,"url":"https://patchwork.plctlab.org/api/1.2/patches/56589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213223122.9F67D33EAC@hamza.pair.com/","msgid":"<20230213223122.9F67D33EAC@hamza.pair.com>","list_archive_url":null,"date":"2023-02-13T22:31:14","name":"[pushed] libstdc++: Adjust \"The Component Object Model\" reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230213223122.9F67D33EAC@hamza.pair.com/mbox/"},{"id":56609,"url":"https://patchwork.plctlab.org/api/1.2/patches/56609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214023346.2A85B20423@pchp3.se.axis.com/","msgid":"<20230214023346.2A85B20423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-14T02:33:46","name":"debug: Support \"phrs\" for dumping a HARD_REG_SET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214023346.2A85B20423@pchp3.se.axis.com/mbox/"},{"id":56775,"url":"https://patchwork.plctlab.org/api/1.2/patches/56775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tMqCFYVNL6xxYq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-14T08:56:08","name":"asan: Add --param=asan-kernel-mem-intrinsic-prefix= [PR108777]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tMqCFYVNL6xxYq@tucnak/mbox/"},{"id":56789,"url":"https://patchwork.plctlab.org/api/1.2/patches/56789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214092404.78801-1-juzhe.zhong@rivai.ai/","msgid":"<20230214092404.78801-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T09:24:04","name":"RISC-V: Finish all integer C/C++ intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214092404.78801-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56806,"url":"https://patchwork.plctlab.org/api/1.2/patches/56806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6vo8u8u.fsf@euler.schwinge.homeip.net/","msgid":"<87h6vo8u8u.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T09:35:29","name":"nvptx: Adjust '\''scan-assembler'\'' in '\''gfortran.dg/weak-1.f90'\'' (was: Support for NOINLINE attribute)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6vo8u8u.fsf@euler.schwinge.homeip.net/mbox/"},{"id":56837,"url":"https://patchwork.plctlab.org/api/1.2/patches/56837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7b5aee2-0203-dc57-0328-e3989e7ecc8e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-14T10:42:21","name":"More LLP64 fixes and __PIC__ values fixes for PE targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7b5aee2-0203-dc57-0328-e3989e7ecc8e@gmail.com/mbox/"},{"id":56885,"url":"https://patchwork.plctlab.org/api/1.2/patches/56885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tu4LN1R2FYe02y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-14T11:22:33","name":"c++: Add testcases from some Issaquah DRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+tu4LN1R2FYe02y@tucnak/mbox/"},{"id":56886,"url":"https://patchwork.plctlab.org/api/1.2/patches/56886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214114918.3E86413A21@imap2.suse-dmz.suse.de/","msgid":"<20230214114918.3E86413A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T11:49:17","name":"tree-optimization/108782 - nested first order recurrence vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214114918.3E86413A21@imap2.suse-dmz.suse.de/mbox/"},{"id":56904,"url":"https://patchwork.plctlab.org/api/1.2/patches/56904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3481520.iIbC2pHGDl@fomalhaut/","msgid":"<3481520.iIbC2pHGDl@fomalhaut>","list_archive_url":null,"date":"2023-02-14T12:42:14","name":"Fix small regression in Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3481520.iIbC2pHGDl@fomalhaut/mbox/"},{"id":56905,"url":"https://patchwork.plctlab.org/api/1.2/patches/56905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6voz9tl.fsf@euler.schwinge.homeip.net/","msgid":"<87h6voz9tl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T12:54:30","name":"[og12] In '\''libgomp/allocator.c:omp_realloc'\'', route '\''free'\'' through '\''MEMSPACE_FREE'\'' (was: [PATCH] libgomp, OpenMP, nvptx: Low-latency memory allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6voz9tl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":56957,"url":"https://patchwork.plctlab.org/api/1.2/patches/56957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134405.129401-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134405.129401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:44:05","name":"RISC-V: Add vwmacc vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134405.129401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56965,"url":"https://patchwork.plctlab.org/api/1.2/patches/56965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134612.140930-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134612.140930-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:46:12","name":"RISC-V: Add vwmacc vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134612.140930-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56967,"url":"https://patchwork.plctlab.org/api/1.2/patches/56967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134826.144016-1-juzhe.zhong@rivai.ai/","msgid":"<20230214134826.144016-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:48:26","name":"RISC-V: Add vnmsub vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214134826.144016-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56968,"url":"https://patchwork.plctlab.org/api/1.2/patches/56968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135300.145205-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135300.145205-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:53:00","name":"RISC-V: Add vnmsub vx rv64 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135300.145205-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56969,"url":"https://patchwork.plctlab.org/api/1.2/patches/56969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135417.145612-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135417.145612-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:54:17","name":"RISC-V: Add vnmsub vx rv32 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135417.145612-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56970,"url":"https://patchwork.plctlab.org/api/1.2/patches/56970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135612.146539-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135612.146539-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:56:12","name":"RISC-V: Add vnmsac rv64 C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135612.146539-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56971,"url":"https://patchwork.plctlab.org/api/1.2/patches/56971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135712.146813-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135712.146813-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:57:12","name":"RISC-V: Add vnmsac vx C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135712.146813-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56972,"url":"https://patchwork.plctlab.org/api/1.2/patches/56972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135829.147123-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135829.147123-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:58:29","name":"RISC-V: Add vnmsac vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135829.147123-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56973,"url":"https://patchwork.plctlab.org/api/1.2/patches/56973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135957.147487-1-juzhe.zhong@rivai.ai/","msgid":"<20230214135957.147487-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T13:59:57","name":"RISC-V: Add vmadd vx rv64 c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214135957.147487-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56974,"url":"https://patchwork.plctlab.org/api/1.2/patches/56974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140114.147866-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140114.147866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:01:14","name":"RISC-V: Add vmadd vx c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140114.147866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56976,"url":"https://patchwork.plctlab.org/api/1.2/patches/56976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140234.148185-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140234.148185-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:02:34","name":"RISC-V: Add vmadd vv C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140234.148185-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56977,"url":"https://patchwork.plctlab.org/api/1.2/patches/56977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140342.148470-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140342.148470-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:03:42","name":"RISC-V: Add vmacc vx c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140342.148470-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56979,"url":"https://patchwork.plctlab.org/api/1.2/patches/56979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140456.148783-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140456.148783-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:04:56","name":"RISC-V: Add vmacc vx rv32 c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140456.148783-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56989,"url":"https://patchwork.plctlab.org/api/1.2/patches/56989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140604.149066-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140604.149066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:06:04","name":"RISC-V: Add vmacc vv c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140604.149066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56991,"url":"https://patchwork.plctlab.org/api/1.2/patches/56991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140609.149094-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140609.149094-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:06:09","name":"RISC-V: Add vmacc vv c api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140609.149094-1-juzhe.zhong@rivai.ai/mbox/"},{"id":56996,"url":"https://patchwork.plctlab.org/api/1.2/patches/56996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140813.149624-1-juzhe.zhong@rivai.ai/","msgid":"<20230214140813.149624-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:08:13","name":"RISC-V: Add ternary constraint tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214140813.149624-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57014,"url":"https://patchwork.plctlab.org/api/1.2/patches/57014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141236.150709-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141236.150709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:12:36","name":"RISC-V: Add vwmacc vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141236.150709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57015,"url":"https://patchwork.plctlab.org/api/1.2/patches/57015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141423.151090-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141423.151090-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:14:23","name":"RISC-V: Add vwmacc vv C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141423.151090-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57017,"url":"https://patchwork.plctlab.org/api/1.2/patches/57017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141559.151450-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141559.151450-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:15:59","name":"RISC-V: Add vnmsub vx rv64 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141559.151450-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57018,"url":"https://patchwork.plctlab.org/api/1.2/patches/57018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141718.151801-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141718.151801-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:17:18","name":"RISC-V: Add vnmsub vx rv32 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141718.151801-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57019,"url":"https://patchwork.plctlab.org/api/1.2/patches/57019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141823.152082-1-juzhe.zhong@rivai.ai/","msgid":"<20230214141823.152082-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:18:23","name":"RISC-V: Add vnmsub vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214141823.152082-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57020,"url":"https://patchwork.plctlab.org/api/1.2/patches/57020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142137.152713-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142137.152713-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:21:37","name":"RISC-V: Add vnmsac vx rv64 C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142137.152713-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57021,"url":"https://patchwork.plctlab.org/api/1.2/patches/57021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142154.09F8D13A21@imap2.suse-dmz.suse.de/","msgid":"<20230214142154.09F8D13A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T14:21:53","name":"Speedup DF dataflow solver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142154.09F8D13A21@imap2.suse-dmz.suse.de/mbox/"},{"id":57022,"url":"https://patchwork.plctlab.org/api/1.2/patches/57022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142239.152985-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142239.152985-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:22:39","name":"RISC-V: Add vnmsac vx C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142239.152985-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57023,"url":"https://patchwork.plctlab.org/api/1.2/patches/57023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142355.153302-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142355.153302-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:23:55","name":"RISC-V: Add vnmsac vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142355.153302-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57024,"url":"https://patchwork.plctlab.org/api/1.2/patches/57024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142535.153676-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142535.153676-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:25:35","name":"RISC-V: Add vmadd vx C++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142535.153676-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57027,"url":"https://patchwork.plctlab.org/api/1.2/patches/57027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142652.153982-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142652.153982-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:26:52","name":"RISC-V: Add vmadd vx c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142652.153982-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57028,"url":"https://patchwork.plctlab.org/api/1.2/patches/57028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142825.154358-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142825.154358-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:28:24","name":"RISC-V: Add vmadd vv c++ api test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142825.154358-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57035,"url":"https://patchwork.plctlab.org/api/1.2/patches/57035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142936.154660-1-juzhe.zhong@rivai.ai/","msgid":"<20230214142936.154660-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:29:36","name":"RISC-V: Add vmacc vx rv32 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214142936.154660-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57040,"url":"https://patchwork.plctlab.org/api/1.2/patches/57040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143039.154969-1-juzhe.zhong@rivai.ai/","msgid":"<20230214143039.154969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:30:39","name":"RISC-V: Add vmacc vx rv64 c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143039.154969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57044,"url":"https://patchwork.plctlab.org/api/1.2/patches/57044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143259.155429-1-juzhe.zhong@rivai.ai/","msgid":"<20230214143259.155429-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T14:32:59","name":"RISC-V: Add vmacc vv c++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214143259.155429-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57059,"url":"https://patchwork.plctlab.org/api/1.2/patches/57059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1p0gv37.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-14T14:50:04","name":"ipa: Avoid IPA confusing scalar values and single-field aggregates (PR 108679)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1p0gv37.fsf@suse.cz/mbox/"},{"id":57060,"url":"https://patchwork.plctlab.org/api/1.2/patches/57060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214145053.AB8B113A21@imap2.suse-dmz.suse.de/","msgid":"<20230214145053.AB8B113A21@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T14:50:53","name":"More DF worklist solver improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214145053.AB8B113A21@imap2.suse-dmz.suse.de/mbox/"},{"id":57063,"url":"https://patchwork.plctlab.org/api/1.2/patches/57063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214150449.249991-1-juzhe.zhong@rivai.ai/","msgid":"<20230214150449.249991-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T15:04:49","name":"RISC-V: Replace simm32_p with immediate_operand (Pmode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214150449.249991-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57065,"url":"https://patchwork.plctlab.org/api/1.2/patches/57065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de/","msgid":"<20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T15:18:30","name":"Improve VN PHI hash table handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214151830.8EEAF138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":57066,"url":"https://patchwork.plctlab.org/api/1.2/patches/57066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214152025.2226E138E3@imap2.suse-dmz.suse.de/","msgid":"<20230214152025.2226E138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-14T15:20:24","name":"Fix possible sanopt compile-time hog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214152025.2226E138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":57078,"url":"https://patchwork.plctlab.org/api/1.2/patches/57078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214153903.27974-1-juzhe.zhong@rivai.ai/","msgid":"<20230214153903.27974-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T15:39:03","name":"RISC-V: Remove \"extern??? for namespace [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214153903.27974-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57186,"url":"https://patchwork.plctlab.org/api/1.2/patches/57186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214195153.8445-1-david.faust@oracle.com/","msgid":"<20230214195153.8445-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-02-14T19:51:53","name":"bpf: fix memory constraint of ldx/stx instructions [PR108790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214195153.8445-1-david.faust@oracle.com/mbox/"},{"id":57210,"url":"https://patchwork.plctlab.org/api/1.2/patches/57210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214212510.5EB7133E9C@hamza.pair.com/","msgid":"<20230214212510.5EB7133E9C@hamza.pair.com>","list_archive_url":null,"date":"2023-02-14T21:25:07","name":"[pushed] libstdc++: Update an open-std.org link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214212510.5EB7133E9C@hamza.pair.com/mbox/"},{"id":57243,"url":"https://patchwork.plctlab.org/api/1.2/patches/57243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214222733.183219-1-juzhe.zhong@rivai.ai/","msgid":"<20230214222733.183219-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T22:27:33","name":"RISC-V: Rearrange the organization of declarations of RVV intrinsics [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214222733.183219-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57246,"url":"https://patchwork.plctlab.org/api/1.2/patches/57246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sff73m0n.fsf@euler.schwinge.homeip.net/","msgid":"<87sff73m0n.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-14T22:44:24","name":"[og12] Address cast to pointer from integer of different size in '\''libgomp/target.c:gomp_target_rev'\'' (was: [OG12][committed] openmp: Add support for the '\''present'\'' modifier)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sff73m0n.fsf@euler.schwinge.homeip.net/mbox/"},{"id":57272,"url":"https://patchwork.plctlab.org/api/1.2/patches/57272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214231820.283957-1-juzhe.zhong@rivai.ai/","msgid":"<20230214231820.283957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-14T23:18:20","name":"RISC-V: Move saturating add/subtract md pattern location [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230214231820.283957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57291,"url":"https://patchwork.plctlab.org/api/1.2/patches/57291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215001814.F3BAB2042C@pchp3.se.axis.com/","msgid":"<20230215001814.F3BAB2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T00:18:14","name":"gen_reload: Correct parameter for fatal_insn call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215001814.F3BAB2042C@pchp3.se.axis.com/mbox/"},{"id":57335,"url":"https://patchwork.plctlab.org/api/1.2/patches/57335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215013828.7043633EA3@hamza.pair.com/","msgid":"<20230215013828.7043633EA3@hamza.pair.com>","list_archive_url":null,"date":"2023-02-15T01:38:25","name":"[pushed] wwwdocs: news/profiledriven: Update a link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215013828.7043633EA3@hamza.pair.com/mbox/"},{"id":57351,"url":"https://patchwork.plctlab.org/api/1.2/patches/57351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215034815.1276847-1-polacek@redhat.com/","msgid":"<20230215034815.1276847-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-15T03:48:15","name":"warn-access: wrong -Wdangling-pointer with labels [PR106080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215034815.1276847-1-polacek@redhat.com/mbox/"},{"id":57423,"url":"https://patchwork.plctlab.org/api/1.2/patches/57423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz/","msgid":"<7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz>","list_archive_url":null,"date":"2023-02-15T08:39:11","name":"[(pushed)] docs: document new --param=asan-kernel-mem-intrinsic-prefix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2b6f00-c5f0-474d-280f-27f241e8fdf4@suse.cz/mbox/"},{"id":57424,"url":"https://patchwork.plctlab.org/api/1.2/patches/57424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215083954.274514-1-juzhe.zhong@rivai.ai/","msgid":"<20230215083954.274514-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-15T08:39:54","name":"RISC-V: Normalize SEW = 64 handling into a simplified function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215083954.274514-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57436,"url":"https://patchwork.plctlab.org/api/1.2/patches/57436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+yjZX54gxCaUTfY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-15T09:18:29","name":"[committed] powerpc: Fix up expansion for WIDEN_MULT_PLUS_EXPR [PR108787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+yjZX54gxCaUTfY@tucnak/mbox/"},{"id":57460,"url":"https://patchwork.plctlab.org/api/1.2/patches/57460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215100202.lrjn2dpk2xuwht6a@lug-owl.de/","msgid":"<20230215100202.lrjn2dpk2xuwht6a@lug-owl.de>","list_archive_url":null,"date":"2023-02-15T10:02:02","name":"bpf: Fix double whitespace warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215100202.lrjn2dpk2xuwht6a@lug-owl.de/mbox/"},{"id":57469,"url":"https://patchwork.plctlab.org/api/1.2/patches/57469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7cwjted9.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-15T10:25:06","name":"Update baseline symbols for aarch64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7cwjted9.fsf@suse.de/mbox/"},{"id":57478,"url":"https://patchwork.plctlab.org/api/1.2/patches/57478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215105411.30966-1-iain@sandoe.co.uk/","msgid":"<20230215105411.30966-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-02-15T10:54:11","name":"[pushed] testsuite, objective-c: Fix a testcase on Windows.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215105411.30966-1-iain@sandoe.co.uk/mbox/"},{"id":57484,"url":"https://patchwork.plctlab.org/api/1.2/patches/57484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215112231.45341-1-juzhe.zhong@rivai.ai/","msgid":"<20230215112231.45341-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-15T11:22:31","name":"RISC-V: Rename tu_preds to none_tu_preds [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215112231.45341-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57546,"url":"https://patchwork.plctlab.org/api/1.2/patches/57546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215133750.15537-1-jwakely@redhat.com/","msgid":"<20230215133750.15537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-15T13:37:50","name":"doc: Suggest fix for -Woverloaded-virtual warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215133750.15537-1-jwakely@redhat.com/mbox/"},{"id":57552,"url":"https://patchwork.plctlab.org/api/1.2/patches/57552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com/","msgid":"<1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com>","list_archive_url":null,"date":"2023-02-15T13:44:08","name":"harden-sls-6.c: fix warning on LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c665816-5815-7bc4-f7ac-859e8c873007@gmail.com/mbox/"},{"id":57554,"url":"https://patchwork.plctlab.org/api/1.2/patches/57554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+ziHx6/8SB4k+4J@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T13:46:07","name":"[v2] warn-access: wrong -Wdangling-pointer with labels [PR106080]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+ziHx6/8SB4k+4J@redhat.com/mbox/"},{"id":57596,"url":"https://patchwork.plctlab.org/api/1.2/patches/57596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8221231.NyiUUSuA9g@fomalhaut/","msgid":"<8221231.NyiUUSuA9g@fomalhaut>","list_archive_url":null,"date":"2023-02-15T15:24:09","name":"Fix PR target/90458","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8221231.NyiUUSuA9g@fomalhaut/mbox/"},{"id":57599,"url":"https://patchwork.plctlab.org/api/1.2/patches/57599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZJEcH-mwcyxupcaoCmnUyhF9-5b7F5mFa-4g6LxXH_Rg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T15:28:09","name":"i386: Rename extr_register_operand to int248_register_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZJEcH-mwcyxupcaoCmnUyhF9-5b7F5mFa-4g6LxXH_Rg@mail.gmail.com/mbox/"},{"id":57600,"url":"https://patchwork.plctlab.org/api/1.2/patches/57600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YsV0ROTJxutL+pn4CAwf5xFO02V7t76otKYUqhjWs8Aw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T15:32:47","name":"testsuite/i386: Cleanup target selectors in i386 target directory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YsV0ROTJxutL+pn4CAwf5xFO02V7t76otKYUqhjWs8Aw@mail.gmail.com/mbox/"},{"id":57601,"url":"https://patchwork.plctlab.org/api/1.2/patches/57601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215153432.0663D2042E@pchp3.se.axis.com/","msgid":"<20230215153432.0663D2042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T15:34:32","name":"reload: Handle generating reloads that also clobbers flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215153432.0663D2042E@pchp3.se.axis.com/mbox/"},{"id":57637,"url":"https://patchwork.plctlab.org/api/1.2/patches/57637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com/","msgid":"<86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com>","list_archive_url":null,"date":"2023-02-15T17:05:52","name":"PR tree-optimization/108697 - Create a lazy ssa_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86ad2755-1e70-6c19-89ed-7817d61a5053@redhat.com/mbox/"},{"id":57680,"url":"https://patchwork.plctlab.org/api/1.2/patches/57680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkluzr8q.fsf@euler.schwinge.homeip.net/","msgid":"<87bkluzr8q.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-15T19:02:45","name":"[og12] Fix '\''libgomp.{c-c++-common,fortran}/target-present-*'\'' test cases (was: [OG12][committed] openmp: Add support for the '\''present'\'' modifier)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkluzr8q.fsf@euler.schwinge.homeip.net/mbox/"},{"id":57683,"url":"https://patchwork.plctlab.org/api/1.2/patches/57683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215191957.F12532042E@pchp3.se.axis.com/","msgid":"<20230215191957.F12532042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-15T19:19:57","name":"testsuite: Handle \"packed\" targets in c-c++-common/auto-init-7.c and -8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215191957.F12532042E@pchp3.se.axis.com/mbox/"},{"id":57704,"url":"https://patchwork.plctlab.org/api/1.2/patches/57704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215195549.1677156-1-dmalcolm@redhat.com/","msgid":"<20230215195549.1677156-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-15T19:55:49","name":"[pushed] analyzer: fix uninit false +ves [PR108664, PR108666, PR108725]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230215195549.1677156-1-dmalcolm@redhat.com/mbox/"},{"id":57713,"url":"https://patchwork.plctlab.org/api/1.2/patches/57713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bBUsXh5atfAo=pYB7vafnqZ00tN81KG+32B0KBVy_qTQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-15T20:37:06","name":"i386: Relax extract location operand mode requirements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bBUsXh5atfAo=pYB7vafnqZ00tN81KG+32B0KBVy_qTQ@mail.gmail.com/mbox/"},{"id":57719,"url":"https://patchwork.plctlab.org/api/1.2/patches/57719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21793652.EfDdHjke4D@minbar/","msgid":"<21793652.EfDdHjke4D@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:36","name":"[1/7] libstdc++: Ensure __builtin_constant_p isn'\''t lost on the way","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21793652.EfDdHjke4D@minbar/mbox/"},{"id":57723,"url":"https://patchwork.plctlab.org/api/1.2/patches/57723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9083131.CDJkKcVGEf@minbar/","msgid":"<9083131.CDJkKcVGEf@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:46","name":"[2/7] libstdc++: Annotate most lambdas with always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9083131.CDJkKcVGEf@minbar/mbox/"},{"id":57720,"url":"https://patchwork.plctlab.org/api/1.2/patches/57720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8239109.NyiUUSuA9g@minbar/","msgid":"<8239109.NyiUUSuA9g@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:51","name":"[3/7] libstdc++: Document timeout and timeout-factor of simd tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8239109.NyiUUSuA9g@minbar/mbox/"},{"id":57724,"url":"https://patchwork.plctlab.org/api/1.2/patches/57724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22986674.6Emhk5qWAg@minbar/","msgid":"<22986674.6Emhk5qWAg@minbar>","list_archive_url":null,"date":"2023-02-15T20:49:58","name":"[4/7] libstdc++: Use a PCH to speed up check-simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22986674.6Emhk5qWAg@minbar/mbox/"},{"id":57722,"url":"https://patchwork.plctlab.org/api/1.2/patches/57722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3557908.R56niFO833@minbar/","msgid":"<3557908.R56niFO833@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:03","name":"[5/7] libstdc++: printf format string fix in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3557908.R56niFO833@minbar/mbox/"},{"id":57725,"url":"https://patchwork.plctlab.org/api/1.2/patches/57725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45331655.fMDQidcC6G@minbar/","msgid":"<45331655.fMDQidcC6G@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:07","name":"[6/7] libstdc++: Fix incorrect __builtin_is_constant_evaluated calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45331655.fMDQidcC6G@minbar/mbox/"},{"id":57721,"url":"https://patchwork.plctlab.org/api/1.2/patches/57721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/111787281.nniJfEyVGO@minbar/","msgid":"<111787281.nniJfEyVGO@minbar>","list_archive_url":null,"date":"2023-02-15T20:50:11","name":"[7/7] libstdc++: Fix incorrect function call in -ffast-math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/111787281.nniJfEyVGO@minbar/mbox/"},{"id":57741,"url":"https://patchwork.plctlab.org/api/1.2/patches/57741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1dfbfce5-bd6d-482b-acde-183a890e8286-1676496480787@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-02-15T21:28:00","name":"[committed] Fortran: error recovery on invalid assumed size reference [PR104554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1dfbfce5-bd6d-482b-acde-183a890e8286-1676496480787@3c-app-gmx-bs56/mbox/"},{"id":57743,"url":"https://patchwork.plctlab.org/api/1.2/patches/57743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-de5f13fe-faca-4b54-a26b-10d7613d9096-1676497805862@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-02-15T21:50:05","name":"[committed] Fortran: error recovery on checking procedure argument intent [PR103608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-de5f13fe-faca-4b54-a26b-10d7613d9096-1676497805862@3c-app-gmx-bs56/mbox/"},{"id":57770,"url":"https://patchwork.plctlab.org/api/1.2/patches/57770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002334.38B1E2043D@pchp3.se.axis.com/","msgid":"<20230216002334.38B1E2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T00:23:34","name":"testsuite: Add CRIS to check_effective_target_lra non-LRA list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002334.38B1E2043D@pchp3.se.axis.com/mbox/"},{"id":57771,"url":"https://patchwork.plctlab.org/api/1.2/patches/57771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002846.E1B6A20441@pchp3.se.axis.com/","msgid":"<20230216002846.E1B6A20441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T00:28:46","name":"objs-gcc.sh: Only bootstrap if source-directory contains gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216002846.E1B6A20441@pchp3.se.axis.com/mbox/"},{"id":57827,"url":"https://patchwork.plctlab.org/api/1.2/patches/57827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033001.15256-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033001.15256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:30:01","name":"RISC-V: Add RVV all mask C/C++ intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033001.15256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57828,"url":"https://patchwork.plctlab.org/api/1.2/patches/57828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033428.16157-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033428.16157-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:34:28","name":"RISC-V: Fix vmnot asm check (Should check vmnot.m instead of vmnot.mm)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033428.16157-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57829,"url":"https://patchwork.plctlab.org/api/1.2/patches/57829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033619.16472-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033619.16472-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:36:19","name":"RISC-V: Add vm* mask C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033619.16472-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57830,"url":"https://patchwork.plctlab.org/api/1.2/patches/57830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033819.16850-1-juzhe.zhong@rivai.ai/","msgid":"<20230216033819.16850-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:38:19","name":"RISC-V: Add vid.v/viota.m C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216033819.16850-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57831,"url":"https://patchwork.plctlab.org/api/1.2/patches/57831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034001.17197-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034001.17197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:40:01","name":"RISC-V: Add the res of all mask C api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034001.17197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57832,"url":"https://patchwork.plctlab.org/api/1.2/patches/57832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034158.17684-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034158.17684-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:41:58","name":"RISC-V: Add vm* C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034158.17684-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57833,"url":"https://patchwork.plctlab.org/api/1.2/patches/57833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034445.18092-1-juzhe.zhong@rivai.ai/","msgid":"<20230216034445.18092-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-16T03:44:45","name":"RISC-V: Add all mask C++ api tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216034445.18092-1-juzhe.zhong@rivai.ai/mbox/"},{"id":57880,"url":"https://patchwork.plctlab.org/api/1.2/patches/57880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-1-tejas.belagod@arm.com/","msgid":"<20230216061351.25090-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-02-16T06:13:50","name":"[1/2,GCC12] AArch64: Update transitive closures of aes, sha2 and sha3 extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-1-tejas.belagod@arm.com/mbox/"},{"id":57881,"url":"https://patchwork.plctlab.org/api/1.2/patches/57881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-2-tejas.belagod@arm.com/","msgid":"<20230216061351.25090-2-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-02-16T06:13:51","name":"[2/2,GCC12] AArch64: Gate various crypto intrinsics availability based on features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216061351.25090-2-tejas.belagod@arm.com/mbox/"},{"id":57891,"url":"https://patchwork.plctlab.org/api/1.2/patches/57891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216073133.4D6E73858022@sourceware.org/","msgid":"<20230216073133.4D6E73858022@sourceware.org>","list_archive_url":null,"date":"2023-02-16T07:29:26","name":"tree-optimization/108791 - checking ICE with sloppy ADDR_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216073133.4D6E73858022@sourceware.org/mbox/"},{"id":57894,"url":"https://patchwork.plctlab.org/api/1.2/patches/57894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-2-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:40","name":"[1/5] Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-2-shihua@iscas.ac.cn/mbox/"},{"id":57898,"url":"https://patchwork.plctlab.org/api/1.2/patches/57898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-3-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:41","name":"[V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-3-shihua@iscas.ac.cn/mbox/"},{"id":57896,"url":"https://patchwork.plctlab.org/api/1.2/patches/57896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-4-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:42","name":"[V2,3/5] Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-4-shihua@iscas.ac.cn/mbox/"},{"id":57897,"url":"https://patchwork.plctlab.org/api/1.2/patches/57897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-5-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:43","name":"[V2,4/5] Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-5-shihua@iscas.ac.cn/mbox/"},{"id":57895,"url":"https://patchwork.plctlab.org/api/1.2/patches/57895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-6-shihua@iscas.ac.cn/","msgid":"<20230216074544.2567-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:45:44","name":"[V2,5/5] Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216074544.2567-6-shihua@iscas.ac.cn/mbox/"},{"id":57900,"url":"https://patchwork.plctlab.org/api/1.2/patches/57900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-2-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:01","name":"[V2,1/5] Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-2-shihua@iscas.ac.cn/mbox/"},{"id":57904,"url":"https://patchwork.plctlab.org/api/1.2/patches/57904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-3-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:02","name":"[V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-3-shihua@iscas.ac.cn/mbox/"},{"id":57902,"url":"https://patchwork.plctlab.org/api/1.2/patches/57902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-4-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:03","name":"[V2,3/5] Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-4-shihua@iscas.ac.cn/mbox/"},{"id":57903,"url":"https://patchwork.plctlab.org/api/1.2/patches/57903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-5-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:04","name":"[V2,4/5] Implement ZKNH extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-5-shihua@iscas.ac.cn/mbox/"},{"id":57901,"url":"https://patchwork.plctlab.org/api/1.2/patches/57901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-6-shihua@iscas.ac.cn/","msgid":"<20230216075005.2600-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-16T07:50:05","name":"[V2,5/5] Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216075005.2600-6-shihua@iscas.ac.cn/mbox/"},{"id":57922,"url":"https://patchwork.plctlab.org/api/1.2/patches/57922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3rUiUVywYfwfDE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T08:37:38","name":"reassoc: Fix up (ab) handling in eliminate_redundant_comparison [PR108783]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3rUiUVywYfwfDE@tucnak/mbox/"},{"id":57926,"url":"https://patchwork.plctlab.org/api/1.2/patches/57926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3vzqcqv9AZsKy+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T08:56:46","name":"tree-ssa-dse: Fix up handling of lhs of internal calls [PR108657]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+3vzqcqv9AZsKy+@tucnak/mbox/"},{"id":57934,"url":"https://patchwork.plctlab.org/api/1.2/patches/57934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e561b827-6f23-07f9-f968-83f485f18cca@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T09:23:40","name":"rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e561b827-6f23-07f9-f968-83f485f18cca@linux.ibm.com/mbox/"},{"id":57959,"url":"https://patchwork.plctlab.org/api/1.2/patches/57959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216103030.94868-1-jwakely@redhat.com/","msgid":"<20230216103030.94868-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T10:30:30","name":"[committed] libstdc++: Fix uses of non-reserved names in headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216103030.94868-1-jwakely@redhat.com/mbox/"},{"id":57979,"url":"https://patchwork.plctlab.org/api/1.2/patches/57979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4RZHrFT1+jua/0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T11:20:17","name":"[committed] libgomp: Fix comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4RZHrFT1+jua/0@tucnak/mbox/"},{"id":57981,"url":"https://patchwork.plctlab.org/api/1.2/patches/57981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4Rk2d7OiB9JW70@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-16T11:21:02","name":"[committed] libgomp: Fix up some typos in libgomp.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+4Rk2d7OiB9JW70@tucnak/mbox/"},{"id":57990,"url":"https://patchwork.plctlab.org/api/1.2/patches/57990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114016.105674-1-jwakely@redhat.com/","msgid":"<20230216114016.105674-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:40:16","name":"[committed] libstdc++: Fix non-reserved names in PSTL headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114016.105674-1-jwakely@redhat.com/mbox/"},{"id":57997,"url":"https://patchwork.plctlab.org/api/1.2/patches/57997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114924.108222-1-jwakely@redhat.com/","msgid":"<20230216114924.108222-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:49:24","name":"[committed] libstdc++: Add missing space after effective-target name in test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216114924.108222-1-jwakely@redhat.com/mbox/"},{"id":57998,"url":"https://patchwork.plctlab.org/api/1.2/patches/57998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216115010.108388-1-jwakely@redhat.com/","msgid":"<20230216115010.108388-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T11:50:10","name":"[committed] libstdc++: Fix non-reserved names in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216115010.108388-1-jwakely@redhat.com/mbox/"},{"id":58014,"url":"https://patchwork.plctlab.org/api/1.2/patches/58014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216124034.124744-1-jwakely@redhat.com/","msgid":"<20230216124034.124744-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T12:40:34","name":"[committed] libstdc++: Make names_pstl.cc require et tbb_backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216124034.124744-1-jwakely@redhat.com/mbox/"},{"id":58075,"url":"https://patchwork.plctlab.org/api/1.2/patches/58075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216134431.1600922-1-ppalka@redhat.com/","msgid":"<20230216134431.1600922-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-16T13:44:31","name":"don'\''t declare header-defined functions both static and inline, pt 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216134431.1600922-1-ppalka@redhat.com/mbox/"},{"id":58107,"url":"https://patchwork.plctlab.org/api/1.2/patches/58107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jfsb5fzx9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T14:27:46","name":"constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jfsb5fzx9.fsf@arm.com/mbox/"},{"id":58113,"url":"https://patchwork.plctlab.org/api/1.2/patches/58113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143908.138045-1-jwakely@redhat.com/","msgid":"<20230216143908.138045-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:08","name":"[committed] libstdc++: Implement P2255R2 dangling checks for std::pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143908.138045-1-jwakely@redhat.com/mbox/"},{"id":58111,"url":"https://patchwork.plctlab.org/api/1.2/patches/58111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143926.138064-1-jwakely@redhat.com/","msgid":"<20230216143926.138064-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:26","name":"[committed] libstdc++: Enable CTAD for std::basic_format_args (LWG 3810)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143926.138064-1-jwakely@redhat.com/mbox/"},{"id":58112,"url":"https://patchwork.plctlab.org/api/1.2/patches/58112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143933.138086-1-jwakely@redhat.com/","msgid":"<20230216143933.138086-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:39:33","name":"[committed] libstdc++: Fix name of in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216143933.138086-1-jwakely@redhat.com/mbox/"},{"id":58114,"url":"https://patchwork.plctlab.org/api/1.2/patches/58114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216144016.138203-1-jwakely@redhat.com/","msgid":"<20230216144016.138203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:40:16","name":"[committed] libstdc++: Implement (P0290)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216144016.138203-1-jwakely@redhat.com/mbox/"},{"id":58115,"url":"https://patchwork.plctlab.org/api/1.2/patches/58115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216145448.141622-1-jwakely@redhat.com/","msgid":"<20230216145448.141622-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-16T14:54:48","name":"[committed] libstdc++: Replace non-ascii character in test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216145448.141622-1-jwakely@redhat.com/mbox/"},{"id":58126,"url":"https://patchwork.plctlab.org/api/1.2/patches/58126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824A720063FEE6C4F10776DA4A09@BYAPR04MB4824.namprd04.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T15:11:50","name":"RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BYAPR04MB4824A720063FEE6C4F10776DA4A09@BYAPR04MB4824.namprd04.prod.outlook.com/mbox/"},{"id":58135,"url":"https://patchwork.plctlab.org/api/1.2/patches/58135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-02-16T15:32:49","name":"Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'' (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz69tyla.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":58146,"url":"https://patchwork.plctlab.org/api/1.2/patches/58146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jedqpfw6c.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T15:48:43","name":"[ARM] MVE: Implementing auto-vectorized array * scalar instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jedqpfw6c.fsf@arm.com/mbox/"},{"id":58162,"url":"https://patchwork.plctlab.org/api/1.2/patches/58162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2815464-472d-a44f-a68a-2233309b3a22@126.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T16:09:10","name":"gcc: Remove size limit of PCH for *-*-mingw32 hosts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2815464-472d-a44f-a68a-2233309b3a22@126.com/mbox/"},{"id":58166,"url":"https://patchwork.plctlab.org/api/1.2/patches/58166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216162316.88085-1-iain@sandoe.co.uk/","msgid":"<20230216162316.88085-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-02-16T16:23:16","name":"[pushed] testsuite, objective-c: Cater for Windows intptr type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216162316.88085-1-iain@sandoe.co.uk/mbox/"},{"id":58175,"url":"https://patchwork.plctlab.org/api/1.2/patches/58175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b_k7Az5ycESE-_7nqJF4y8s4KLbdYx3Y=LbCVP+q_xfA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-16T17:39:16","name":"simplify-rtx: Fix VOIDmode operand handling in simplify_subreg [PR108805]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b_k7Az5ycESE-_7nqJF4y8s4KLbdYx3Y=LbCVP+q_xfA@mail.gmail.com/mbox/"},{"id":58181,"url":"https://patchwork.plctlab.org/api/1.2/patches/58181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com/","msgid":"<5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com>","list_archive_url":null,"date":"2023-02-16T18:06:41","name":"[OG12,committed] amdgcn: OpenMP low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5eaeddf5-317a-4574-868b-87999bb6af33@codesourcery.com/mbox/"},{"id":58219,"url":"https://patchwork.plctlab.org/api/1.2/patches/58219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216200529.AC55F2042C@pchp3.se.axis.com/","msgid":"<20230216200529.AC55F2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-16T20:05:29","name":"testsuite: Tweak gcc.dg/attr-aligned.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216200529.AC55F2042C@pchp3.se.axis.com/mbox/"},{"id":58233,"url":"https://patchwork.plctlab.org/api/1.2/patches/58233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873575z65l.fsf@euler.schwinge.homeip.net/","msgid":"<873575z65l.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T20:50:30","name":"[og12] '\''libgomp.c/usm-{1,2,3,4}.c'\'': Re-enable non-GCN offloading compilation (was: [OG12 commit] amdgcn, libgomp: USM allocation update)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873575z65l.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58237,"url":"https://patchwork.plctlab.org/api/1.2/patches/58237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9dxqlp.fsf@euler.schwinge.homeip.net/","msgid":"<87zg9dxqlp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:11:46","name":"[og12] Un-break nvptx libgomp build (was: [OG12][committed] amdgcn: OpenMP low-latency allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg9dxqlp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58238,"url":"https://patchwork.plctlab.org/api/1.2/patches/58238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn4hxq0r.fsf@euler.schwinge.homeip.net/","msgid":"<87wn4hxq0r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:24:20","name":"[og12] Miscellaneous clean-up re OpenMP '\''ompx_unified_shared_mem_space'\'', '\''ompx_host_mem_space'\'' (was: [PATCH 3/5] openmp, nvptx: ompx_unified_shared_mem_alloc)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn4hxq0r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58240,"url":"https://patchwork.plctlab.org/api/1.2/patches/58240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttzlxpb3.fsf@euler.schwinge.homeip.net/","msgid":"<87ttzlxpb3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T21:39:44","name":"[og12] Clarify/verify OpenMP '\''omp_calloc'\'' zero-initialization for pinned memory (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttzlxpb3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58260,"url":"https://patchwork.plctlab.org/api/1.2/patches/58260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekxxo23.fsf@euler.schwinge.homeip.net/","msgid":"<87lekxxo23.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-16T22:06:44","name":"[og12] Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'' (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekxxo23.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58274,"url":"https://patchwork.plctlab.org/api/1.2/patches/58274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216231627.1748333-1-dmalcolm@redhat.com/","msgid":"<20230216231627.1748333-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-16T23:16:27","name":"[pushed] analyzer: respect some conditions from bit masks [PR108806]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230216231627.1748333-1-dmalcolm@redhat.com/mbox/"},{"id":58300,"url":"https://patchwork.plctlab.org/api/1.2/patches/58300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217004236.070D233E6B@hamza.pair.com/","msgid":"<20230217004236.070D233E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-02-17T00:42:34","name":"[pushed] doc: Reword how to get possible values of a parameter (was: Document all param values and remove defaults (PR middle-end/86078))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217004236.070D233E6B@hamza.pair.com/mbox/"},{"id":58312,"url":"https://patchwork.plctlab.org/api/1.2/patches/58312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com/","msgid":"<8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com>","list_archive_url":null,"date":"2023-02-17T01:22:19","name":"[wwwdocs] testing: Tweak the link to upstream FTensor (was: Anyone using FTensor to test GCC (or otherwise)?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e6061c5-8fe4-680e-1089-391c7535ebbc@pfeifer.com/mbox/"},{"id":58315,"url":"https://patchwork.plctlab.org/api/1.2/patches/58315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217013405.584620-1-guojiufu@linux.ibm.com/","msgid":"<20230217013405.584620-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T01:34:05","name":"rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217013405.584620-1-guojiufu@linux.ibm.com/mbox/"},{"id":58352,"url":"https://patchwork.plctlab.org/api/1.2/patches/58352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0uou8ai.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:15:33","name":"[arm,testsuite] asm-flag-4.c: match quotes in expected message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0uou8ai.fsf@lxoliva.fsfla.org/mbox/"},{"id":58353,"url":"https://patchwork.plctlab.org/api/1.2/patches/58353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt5cu86w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:17:43","name":"[libstdc++,testsuite] intro/names.cc: undef func on vxw7krn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt5cu86w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58354,"url":"https://patchwork.plctlab.org/api/1.2/patches/58354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilg0u82g.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:20:23","name":"[arm] xfail fp-uint64-convert-double-* on all arm targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilg0u82g.fsf@lxoliva.fsfla.org/mbox/"},{"id":58356,"url":"https://patchwork.plctlab.org/api/1.2/patches/58356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredqou760.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:39:51","name":"[libstdc++] Use __gthread_join in jthread/95989","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredqou760.fsf@lxoliva.fsfla.org/mbox/"},{"id":58357,"url":"https://patchwork.plctlab.org/api/1.2/patches/58357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora61cu71u.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:42:21","name":"[PR100127] Test for coroutine header in clang-compatible tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora61cu71u.fsf@lxoliva.fsfla.org/mbox/"},{"id":58360,"url":"https://patchwork.plctlab.org/api/1.2/patches/58360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yc0u6f9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:55:54","name":"Skip module_cmi_p and related unsupported module test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yc0u6f9.fsf@lxoliva.fsfla.org/mbox/"},{"id":58366,"url":"https://patchwork.plctlab.org/api/1.2/patches/58366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qmou68k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T06:59:55","name":"Drop need for constant I in ctf test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qmou68k.fsf@lxoliva.fsfla.org/mbox/"},{"id":58369,"url":"https://patchwork.plctlab.org/api/1.2/patches/58369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn4gsrkk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:02:03","name":"Accept pmf-vbit-in-delta extra warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwn4gsrkk.fsf@lxoliva.fsfla.org/mbox/"},{"id":58370,"url":"https://patchwork.plctlab.org/api/1.2/patches/58370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsff4srfy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:04:49","name":"[vxworks] make wint_t and wchar_t the same distinct type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsff4srfy.fsf@lxoliva.fsfla.org/mbox/"},{"id":58371,"url":"https://patchwork.plctlab.org/api/1.2/patches/58371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7pssrdz.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:06:00","name":"[arm] disable aes-1742098 mitigation for a72 combine tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7pssrdz.fsf@lxoliva.fsfla.org/mbox/"},{"id":58372,"url":"https://patchwork.plctlab.org/api/1.2/patches/58372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork00gsr8w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:09:03","name":"-Wdangling-pointer: don'\''t mark SSA lhs sets as stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ork00gsr8w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58380,"url":"https://patchwork.plctlab.org/api/1.2/patches/58380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsb4sr3w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:12:03","name":"[arm] adjust expectations for armv8_2-fp16-move-[12].c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfsb4sr3w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58379,"url":"https://patchwork.plctlab.org/api/1.2/patches/58379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbklssr0v.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:13:52","name":"[PR51534,arm] split out pr51534 test for softfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbklssr0v.fsf@lxoliva.fsfla.org/mbox/"},{"id":58378,"url":"https://patchwork.plctlab.org/api/1.2/patches/58378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cwgsqv5.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:17:18","name":"[arm] adjust tests for quotes around +cdecp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cwgsqv5.fsf@lxoliva.fsfla.org/mbox/"},{"id":58382,"url":"https://patchwork.plctlab.org/api/1.2/patches/58382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or3574spzu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:36:05","name":"[arm] complete vmsr/vmrs blank and case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or3574spzu.fsf@lxoliva.fsfla.org/mbox/"},{"id":58384,"url":"https://patchwork.plctlab.org/api/1.2/patches/58384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1owrbaj.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:39:00","name":"[PR104882,arm] require mve hw for mve run test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1owrbaj.fsf@lxoliva.fsfla.org/mbox/"},{"id":58385,"url":"https://patchwork.plctlab.org/api/1.2/patches/58385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttzkrb8u.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:40:01","name":"[libstdc++] xfail noreplace tests on vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttzkrb8u.fsf@lxoliva.fsfla.org/mbox/"},{"id":58387,"url":"https://patchwork.plctlab.org/api/1.2/patches/58387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orpma8rb4x.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:42:22","name":"[arm,vxworks] xfail fp-double-convert-float-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orpma8rb4x.fsf@lxoliva.fsfla.org/mbox/"},{"id":58388,"url":"https://patchwork.plctlab.org/api/1.2/patches/58388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlekwrb1w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:44:11","name":"[libstdc++] ensure mutex_pool survives _Safe_sequence_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlekwrb1w.fsf@lxoliva.fsfla.org/mbox/"},{"id":58389,"url":"https://patchwork.plctlab.org/api/1.2/patches/58389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6vkravy.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-02-17T07:47:45","name":"[PR77760,libstdc++] encode __time_get_state in tm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6vkravy.fsf@lxoliva.fsfla.org/mbox/"},{"id":58392,"url":"https://patchwork.plctlab.org/api/1.2/patches/58392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp/","msgid":"<20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp>","list_archive_url":null,"date":"2023-02-17T07:54:49","name":"[v7] xtensa: Eliminate the use of callee-saved register that saves and restores only once","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20fe3e31-0660-386c-7e6d-bc0b6c0f64ad@yahoo.co.jp/mbox/"},{"id":58409,"url":"https://patchwork.plctlab.org/api/1.2/patches/58409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217082258.3399094-1-zhujunxian@oss.cipunited.com/","msgid":"<20230217082258.3399094-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-17T08:24:55","name":"Hazard barrier return support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217082258.3399094-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":58413,"url":"https://patchwork.plctlab.org/api/1.2/patches/58413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217083531.3409405-1-zhujunxian@oss.cipunited.com/","msgid":"<20230217083531.3409405-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-17T08:35:56","name":"Add pattern for clo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217083531.3409405-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":58457,"url":"https://patchwork.plctlab.org/api/1.2/patches/58457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com/","msgid":"<4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T09:54:30","name":"[v2] rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ef72e7a-90ed-fcf4-7d40-cab799b70703@linux.ibm.com/mbox/"},{"id":58458,"url":"https://patchwork.plctlab.org/api/1.2/patches/58458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com/","msgid":"<737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T09:55:04","name":"rs6000: Fix vector_set_var_p9 by considering BE [PR108807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/737a5392-29f8-763c-8dc7-b48c36edb1a7@linux.ibm.com/mbox/"},{"id":58470,"url":"https://patchwork.plctlab.org/api/1.2/patches/58470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+9TodOHE09e9Vwq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-17T10:14:57","name":"optabs: Fix up expand_doubleword_shift_condmove for shift_mask == 0 [PR108803]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+9TodOHE09e9Vwq@tucnak/mbox/"},{"id":58497,"url":"https://patchwork.plctlab.org/api/1.2/patches/58497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com/","msgid":"<27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com>","list_archive_url":null,"date":"2023-02-17T11:13:52","name":"Fortran: Avoid SAVE_EXPR for deferred-len char types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27cd606a-f019-60b2-a9c8-0a570433b5eb@codesourcery.com/mbox/"},{"id":58520,"url":"https://patchwork.plctlab.org/api/1.2/patches/58520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113153.6E2753860740@sourceware.org/","msgid":"<20230217113153.6E2753860740@sourceware.org>","list_archive_url":null,"date":"2023-02-17T11:30:59","name":"Fix wrong-code issue in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113153.6E2753860740@sourceware.org/mbox/"},{"id":58524,"url":"https://patchwork.plctlab.org/api/1.2/patches/58524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113926.619E43843854@sourceware.org/","msgid":"<20230217113926.619E43843854@sourceware.org>","list_archive_url":null,"date":"2023-02-17T11:38:42","name":"tree-optimization/108821 - store motion and volatiles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217113926.619E43843854@sourceware.org/mbox/"},{"id":58525,"url":"https://patchwork.plctlab.org/api/1.2/patches/58525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb5c90ba-0524-1695-f51e-012baf33930d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T11:45:33","name":"[PATCHv2] openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb5c90ba-0524-1695-f51e-012baf33930d@codesourcery.com/mbox/"},{"id":58542,"url":"https://patchwork.plctlab.org/api/1.2/patches/58542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzg9cxygc.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-17T12:34:27","name":"[COMMITTED] contrib: Fix make_sunver.pl warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzg9cxygc.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":58545,"url":"https://patchwork.plctlab.org/api/1.2/patches/58545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8k0xxqx.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-17T12:49:42","name":"[COMMITTED] fixincludes: Bypass solaris_math_12 on newer Solaris 11.4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddv8k0xxqx.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":58546,"url":"https://patchwork.plctlab.org/api/1.2/patches/58546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217125114.288597-1-juzhe.zhong@rivai.ai/","msgid":"<20230217125114.288597-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-17T12:51:14","name":"RISC-V: Add floating-point RVV C/C++ api","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217125114.288597-1-juzhe.zhong@rivai.ai/mbox/"},{"id":58567,"url":"https://patchwork.plctlab.org/api/1.2/patches/58567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217134130.2565745-1-siddhesh@gotplt.org/","msgid":"<20230217134130.2565745-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-02-17T13:41:30","name":"doc: Fix typo in -Wall description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217134130.2565745-1-siddhesh@gotplt.org/mbox/"},{"id":58594,"url":"https://patchwork.plctlab.org/api/1.2/patches/58594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T14:02:40","name":"RISC-V: Add divmod instruction support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"},{"id":58716,"url":"https://patchwork.plctlab.org/api/1.2/patches/58716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKK21deuX7U3Be7RHTdBzCnK77wqbBW6QwHdO4Gjircw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T16:51:14","name":"i386: Generate QImode binary ops with high-part input register [PR108831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKK21deuX7U3Be7RHTdBzCnK77wqbBW6QwHdO4Gjircw@mail.gmail.com/mbox/"},{"id":58723,"url":"https://patchwork.plctlab.org/api/1.2/patches/58723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com/","msgid":"<16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com>","list_archive_url":null,"date":"2023-02-17T16:58:41","name":"rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16fa34b8-ad8a-20f2-b285-3b3f5bf5d5b2@linux.ibm.com/mbox/"},{"id":58740,"url":"https://patchwork.plctlab.org/api/1.2/patches/58740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at/","msgid":"<90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at>","list_archive_url":null,"date":"2023-02-17T18:17:26","name":"[C] Detect all variably modified types [PR108375]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90d59cd87874bf1c281f1c1ff8d7ab3074434ce2.camel@tugraz.at/mbox/"},{"id":58753,"url":"https://patchwork.plctlab.org/api/1.2/patches/58753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217185847.33102-1-polacek@redhat.com/","msgid":"<20230217185847.33102-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-17T18:58:47","name":"c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217185847.33102-1-polacek@redhat.com/mbox/"},{"id":58771,"url":"https://patchwork.plctlab.org/api/1.2/patches/58771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217203209.2141339-1-jason@redhat.com/","msgid":"<20230217203209.2141339-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-17T20:32:09","name":"[RFC] c++: static_assert (false) in template [DR2518]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217203209.2141339-1-jason@redhat.com/mbox/"},{"id":58777,"url":"https://patchwork.plctlab.org/api/1.2/patches/58777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+/sP+kFAwElRqWA@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T21:06:07","name":"[v2] c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y+/sP+kFAwElRqWA@redhat.com/mbox/"},{"id":58781,"url":"https://patchwork.plctlab.org/api/1.2/patches/58781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-1-apinski@marvell.com/","msgid":"<20230217214538.2177094-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-17T21:45:37","name":"[1/2] Support get_range_query with a nullptr argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-1-apinski@marvell.com/mbox/"},{"id":58782,"url":"https://patchwork.plctlab.org/api/1.2/patches/58782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-2-apinski@marvell.com/","msgid":"<20230217214538.2177094-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-02-17T21:45:38","name":"[2/2] Remove #if GIMPLE around 1 - a pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217214538.2177094-2-apinski@marvell.com/mbox/"},{"id":58783,"url":"https://patchwork.plctlab.org/api/1.2/patches/58783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217222603.2485714-1-qing.zhao@oracle.com/","msgid":"<20230217222603.2485714-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-17T22:26:03","name":"Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217222603.2485714-1-qing.zhao@oracle.com/mbox/"},{"id":58788,"url":"https://patchwork.plctlab.org/api/1.2/patches/58788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/AC6UX/X8MsficN@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T22:42:49","name":"[v3] c++: ICE with redundant capture [PR108829]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/AC6UX/X8MsficN@redhat.com/mbox/"},{"id":58794,"url":"https://patchwork.plctlab.org/api/1.2/patches/58794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217230525.10750-1-alx@kernel.org/","msgid":"<20230217230525.10750-1-alx@kernel.org>","list_archive_url":null,"date":"2023-02-17T23:05:26","name":"[resend] Make -Wuse-after-free=3 the default one in -Wall","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230217230525.10750-1-alx@kernel.org/mbox/"},{"id":58800,"url":"https://patchwork.plctlab.org/api/1.2/patches/58800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekv3n19.fsf@euler.schwinge.homeip.net/","msgid":"<87lekv3n19.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-17T23:11:30","name":"'\''#include \"tm_p.h\"'\'' in '\''gcc/rust/backend/rust-tree.cc'\'' (was: [gcc r13-5533] gccrs: const folding port)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lekv3n19.fsf@euler.schwinge.homeip.net/mbox/"},{"id":58881,"url":"https://patchwork.plctlab.org/api/1.2/patches/58881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f54bc212-d66e-51ae-7728-17a410eab85e@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-18T04:43:34","name":"[v5] xtensa: Eliminate unnecessary general-purpose reg-reg moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f54bc212-d66e-51ae-7728-17a410eab85e@yahoo.co.jp/mbox/"},{"id":58882,"url":"https://patchwork.plctlab.org/api/1.2/patches/58882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffa22cd6-978c-0f23-d2ff-c52000db3398@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-18T04:54:10","name":"xtensa: Enforce return address saving when -Og is specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffa22cd6-978c-0f23-d2ff-c52000db3398@yahoo.co.jp/mbox/"},{"id":58904,"url":"https://patchwork.plctlab.org/api/1.2/patches/58904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218094838.BC5FC33E95@hamza.pair.com/","msgid":"<20230218094838.BC5FC33E95@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T09:48:36","name":"[pushed] doc: Update link to AVR-LibC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218094838.BC5FC33E95@hamza.pair.com/mbox/"},{"id":58905,"url":"https://patchwork.plctlab.org/api/1.2/patches/58905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218095441.5043233E90@hamza.pair.com/","msgid":"<20230218095441.5043233E90@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T09:54:39","name":"[pushed] wwwdocs: readings: Update link to ETRAX manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218095441.5043233E90@hamza.pair.com/mbox/"},{"id":58906,"url":"https://patchwork.plctlab.org/api/1.2/patches/58906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218100134.9C10B33EAC@hamza.pair.com/","msgid":"<20230218100134.9C10B33EAC@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T10:01:32","name":"[pushed] libstdc++: Switch two links to www.open-std.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218100134.9C10B33EAC@hamza.pair.com/mbox/"},{"id":58908,"url":"https://patchwork.plctlab.org/api/1.2/patches/58908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CqBQDCQZal1+1G@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-18T10:35:49","name":"i386: Fix up replacement of registers in certain peephole2s [PR108832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CqBQDCQZal1+1G@tucnak/mbox/"},{"id":58909,"url":"https://patchwork.plctlab.org/api/1.2/patches/58909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CrHDbQpnIxKUFj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-18T10:40:28","name":"reassoc: Fold some statements [PR108819]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/CrHDbQpnIxKUFj@tucnak/mbox/"},{"id":58955,"url":"https://patchwork.plctlab.org/api/1.2/patches/58955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873572rd5p.fsf@igel.home/","msgid":"<873572rd5p.fsf@igel.home>","list_archive_url":null,"date":"2023-02-18T19:23:14","name":"Update baseline symbols for m68k-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873572rd5p.fsf@igel.home/mbox/"},{"id":59026,"url":"https://patchwork.plctlab.org/api/1.2/patches/59026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-1-jason@redhat.com/","msgid":"<20230218214239.2297623-1-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:37","name":"[RFC,1/3] c++: add __is_deducible trait [PR105841]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-1-jason@redhat.com/mbox/"},{"id":59028,"url":"https://patchwork.plctlab.org/api/1.2/patches/59028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-2-jason@redhat.com/","msgid":"<20230218214239.2297623-2-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:38","name":"[2/3] c++: fix alias CTAD [PR105841]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-2-jason@redhat.com/mbox/"},{"id":59027,"url":"https://patchwork.plctlab.org/api/1.2/patches/59027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-3-jason@redhat.com/","msgid":"<20230218214239.2297623-3-jason@redhat.com>","list_archive_url":null,"date":"2023-02-18T21:42:39","name":"[3/3] c++: CTAD for less-specialized alias template [PR102529]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218214239.2297623-3-jason@redhat.com/mbox/"},{"id":59050,"url":"https://patchwork.plctlab.org/api/1.2/patches/59050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218223206.5458033E77@hamza.pair.com/","msgid":"<20230218223206.5458033E77@hamza.pair.com>","list_archive_url":null,"date":"2023-02-18T22:32:03","name":"[pushed] wwwdocs: gcc-12: Simplify a sentence in the OpenMP section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230218223206.5458033E77@hamza.pair.com/mbox/"},{"id":59076,"url":"https://patchwork.plctlab.org/api/1.2/patches/59076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com/","msgid":"<02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com>","list_archive_url":null,"date":"2023-02-19T05:21:09","name":"[RFC] internal documentation for OMP_FOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02537de1-8b02-add7-0817-436fcffe330c@codesourcery.com/mbox/"},{"id":59362,"url":"https://patchwork.plctlab.org/api/1.2/patches/59362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg99pm2o.fsf@debian/","msgid":"<87zg99pm2o.fsf@debian>","list_archive_url":null,"date":"2023-02-19T18:05:51","name":"Allow front ends to register spec functions gcc/{gcc.cc,gcc.h} [PR108261]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg99pm2o.fsf@debian/mbox/"},{"id":59357,"url":"https://patchwork.plctlab.org/api/1.2/patches/59357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230219191528.4921D33E50@hamza.pair.com/","msgid":"<20230219191528.4921D33E50@hamza.pair.com>","list_archive_url":null,"date":"2023-02-19T19:15:26","name":"[pushed] wwwdocs: *: Add a comma after \"In addition\" when used as transition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230219191528.4921D33E50@hamza.pair.com/mbox/"},{"id":59339,"url":"https://patchwork.plctlab.org/api/1.2/patches/59339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsb1no1k.fsf@debian/","msgid":"<87fsb1no1k.fsf@debian>","list_archive_url":null,"date":"2023-02-20T01:06:15","name":"Allow front ends to register spec functions gcc/{gcc.cc,gcc.h} [PR108261]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fsb1no1k.fsf@debian/mbox/"},{"id":59323,"url":"https://patchwork.plctlab.org/api/1.2/patches/59323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com/","msgid":"<4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com>","list_archive_url":null,"date":"2023-02-20T02:04:27","name":"[rs6000] Merge two vector shift when their sources are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4005d148-ca54-880b-6c97-7f2fae15d8d1@linux.ibm.com/mbox/"},{"id":59330,"url":"https://patchwork.plctlab.org/api/1.2/patches/59330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220065445.207902-1-juzhe.zhong@rivai.ai/","msgid":"<20230220065445.207902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-20T06:54:45","name":"RISC-V: Add RVV reduction C/C++ intrinsics support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220065445.207902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":59353,"url":"https://patchwork.plctlab.org/api/1.2/patches/59353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-2-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:21","name":"[V3,1/5] RISC-V: Add prototypes for RISC-V Crypto built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-2-shihua@iscas.ac.cn/mbox/"},{"id":59355,"url":"https://patchwork.plctlab.org/api/1.2/patches/59355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-3-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:22","name":"[V3,2/5] RISC-V: Implement ZBKB, ZBKC and ZBKX extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-3-shihua@iscas.ac.cn/mbox/"},{"id":59354,"url":"https://patchwork.plctlab.org/api/1.2/patches/59354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-4-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:23","name":"[V3,3/5] RISC-V: Implement ZKND and ZKNE extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-4-shihua@iscas.ac.cn/mbox/"},{"id":59356,"url":"https://patchwork.plctlab.org/api/1.2/patches/59356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-5-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-5-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:24","name":"[V3,4/5] RISC-V: Implement ZKNH extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-5-shihua@iscas.ac.cn/mbox/"},{"id":59352,"url":"https://patchwork.plctlab.org/api/1.2/patches/59352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-6-shihua@iscas.ac.cn/","msgid":"<20230220070125.2291-6-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-02-20T07:01:25","name":"[V3,5/5] RISC-V: Implement ZKSH and ZKSED extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220070125.2291-6-shihua@iscas.ac.cn/mbox/"},{"id":59351,"url":"https://patchwork.plctlab.org/api/1.2/patches/59351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220101112.E5776396E47E@sourceware.org/","msgid":"<20230220101112.E5776396E47E@sourceware.org>","list_archive_url":null,"date":"2023-02-20T07:43:13","name":"tree-optimization/108819 - niter analysis ICE with unexpected constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220101112.E5776396E47E@sourceware.org/mbox/"},{"id":59341,"url":"https://patchwork.plctlab.org/api/1.2/patches/59341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220092515.A927A33E5C@hamza.pair.com/","msgid":"<20230220092515.A927A33E5C@hamza.pair.com>","list_archive_url":null,"date":"2023-02-20T09:25:13","name":"[pushed] wwwdocs: index: Remove link to Nick'\''s blog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220092515.A927A33E5C@hamza.pair.com/mbox/"},{"id":59337,"url":"https://patchwork.plctlab.org/api/1.2/patches/59337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220100306.CFFE43AA8C16@sourceware.org/","msgid":"<20230220100306.CFFE43AA8C16@sourceware.org>","list_archive_url":null,"date":"2023-02-20T10:02:19","name":"tree-optimization/108825 - checking ICE with unroll-and-jam","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220100306.CFFE43AA8C16@sourceware.org/mbox/"},{"id":59363,"url":"https://patchwork.plctlab.org/api/1.2/patches/59363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddcz64wrmy.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-20T10:36:05","name":"rust: Fix rust-tree.cc compilation on SPARC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddcz64wrmy.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":59372,"url":"https://patchwork.plctlab.org/api/1.2/patches/59372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220105631.4627639502F3@sourceware.org/","msgid":"<20230220105631.4627639502F3@sourceware.org>","list_archive_url":null,"date":"2023-02-20T10:55:43","name":"tree-optimization/108816 - vect versioning check split confusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220105631.4627639502F3@sourceware.org/mbox/"},{"id":59388,"url":"https://patchwork.plctlab.org/api/1.2/patches/59388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NYLexxdOdbgbjf@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-02-20T11:23:25","name":"libstdc++: Add missing functions to [PR79700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NYLexxdOdbgbjf@Thaum.localdomain/mbox/"},{"id":59396,"url":"https://patchwork.plctlab.org/api/1.2/patches/59396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NfXD/wr0I7rmH9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-20T11:54:04","name":"libstdc++: Some baseline_symbols.txt updates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/NfXD/wr0I7rmH9@tucnak/mbox/"},{"id":59397,"url":"https://patchwork.plctlab.org/api/1.2/patches/59397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmilfwsfl2.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-02-20T12:10:01","name":"libstdc++: Update baseline symbols for riscv64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmilfwsfl2.fsf@suse.de/mbox/"},{"id":59441,"url":"https://patchwork.plctlab.org/api/1.2/patches/59441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220130855.7012D3846918@sourceware.org/","msgid":"<20230220130855.7012D3846918@sourceware.org>","list_archive_url":null,"date":"2023-02-20T13:08:09","name":"tree-optimization/108793 - niter compute type mismatch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220130855.7012D3846918@sourceware.org/mbox/"},{"id":59447,"url":"https://patchwork.plctlab.org/api/1.2/patches/59447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7po797z.fsf@euler.schwinge.homeip.net/","msgid":"<87o7po797z.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T13:33:04","name":"Rust: Don'\''t depend on unused '\''target-libffi'\'', '\''target-libbacktrace'\'' (was: [PATCH Rust front-end v2 32/37] gccrs: Add config-lang.in)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7po797z.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59451,"url":"https://patchwork.plctlab.org/api/1.2/patches/59451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0uktpds.fsf@euler.schwinge.homeip.net/","msgid":"<87r0uktpds.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T13:53:03","name":"[og12] Attempt to not just register but allocate OpenMP pinned memory using a device (was: [og12] Attempt to register OpenMP pinned memory using a device instead of '\''mlock'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0uktpds.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59474,"url":"https://patchwork.plctlab.org/api/1.2/patches/59474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilfwxu0m.fsf@euler.schwinge.homeip.net/","msgid":"<87ilfwxu0m.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-20T14:59:21","name":"Prototype '\''GOMP_enable_pinned_mode'\'' (was: [PATCH 08/17] openmp: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilfwxu0m.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59541,"url":"https://patchwork.plctlab.org/api/1.2/patches/59541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220153645.115207-1-kito.cheng@sifive.com/","msgid":"<20230220153645.115207-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-20T15:36:45","name":"[committed] RISC-V: prefetch.* only take base register with zero-offset for the address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220153645.115207-1-kito.cheng@sifive.com/mbox/"},{"id":59555,"url":"https://patchwork.plctlab.org/api/1.2/patches/59555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12342604.nUPlyArG6x@minbar/","msgid":"<12342604.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-02-20T16:31:55","name":"[committed] libstdc++: Fix uses of non-reserved names in simd header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12342604.nUPlyArG6x@minbar/mbox/"},{"id":59647,"url":"https://patchwork.plctlab.org/api/1.2/patches/59647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220194641.4172416-1-ppalka@redhat.com/","msgid":"<20230220194641.4172416-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-20T19:46:41","name":"c++: constant non-copy-init is manifestly constant [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230220194641.4172416-1-ppalka@redhat.com/mbox/"},{"id":59665,"url":"https://patchwork.plctlab.org/api/1.2/patches/59665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-70379611-3104-41fb-b298-b55372325a13-1676925762184@3c-app-gmx-bap60/","msgid":"","list_archive_url":null,"date":"2023-02-20T20:42:42","name":"Fortran: improve checking of character length specification [PR96025]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-70379611-3104-41fb-b298-b55372325a13-1676925762184@3c-app-gmx-bap60/mbox/"},{"id":59674,"url":"https://patchwork.plctlab.org/api/1.2/patches/59674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/PhbMGTVXDT4rre@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-20T21:09:00","name":"[committed] powerpc: Another umaddditi4 fix [PR108862]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/PhbMGTVXDT4rre@tucnak/mbox/"},{"id":59684,"url":"https://patchwork.plctlab.org/api/1.2/patches/59684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZFS5DXHt1Cdd6pMu+OF6RafRJ-m39S5f-0jkqg8kuo8A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-20T22:21:29","name":"i386: Introduce general_x64constmem_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZFS5DXHt1Cdd6pMu+OF6RafRJ-m39S5f-0jkqg8kuo8A@mail.gmail.com/mbox/"},{"id":59704,"url":"https://patchwork.plctlab.org/api/1.2/patches/59704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221023857.211542-1-xin.liu@oss.cipunited.com/","msgid":"<20230221023857.211542-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-21T02:39:12","name":"Testsuite: Disable micromips for MSA tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221023857.211542-1-xin.liu@oss.cipunited.com/mbox/"},{"id":59737,"url":"https://patchwork.plctlab.org/api/1.2/patches/59737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221031524.220339-1-xin.liu@oss.cipunited.com/","msgid":"<20230221031524.220339-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-21T03:16:04","name":"MIPS: Account for LWL/LWR in store_by_pieces_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221031524.220339-1-xin.liu@oss.cipunited.com/mbox/"},{"id":59778,"url":"https://patchwork.plctlab.org/api/1.2/patches/59778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221072001.480858-1-chenglulu@loongson.cn/","msgid":"<20230221072001.480858-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-02-21T07:20:02","name":"LoongArch: Change the value of macro TRY_EMPTY_VM_SPACE from 0x8000000000 to 0x1000000000.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221072001.480858-1-chenglulu@loongson.cn/mbox/"},{"id":59804,"url":"https://patchwork.plctlab.org/api/1.2/patches/59804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd8rgrwh75.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-02-21T08:33:50","name":"libstdc++: Update Solaris baselines for GCC 13.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd8rgrwh75.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":59814,"url":"https://patchwork.plctlab.org/api/1.2/patches/59814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093300.03F1913481@imap2.suse-dmz.suse.de/","msgid":"<20230221093300.03F1913481@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T09:32:59","name":"tree-optimization/108855 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093300.03F1913481@imap2.suse-dmz.suse.de/mbox/"},{"id":59815,"url":"https://patchwork.plctlab.org/api/1.2/patches/59815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093305.8E2BA13481@imap2.suse-dmz.suse.de/","msgid":"<20230221093305.8E2BA13481@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T09:33:05","name":"tree-optimization/108868 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221093305.8E2BA13481@imap2.suse-dmz.suse.de/mbox/"},{"id":59843,"url":"https://patchwork.plctlab.org/api/1.2/patches/59843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz63xqrk.fsf@euler.schwinge.homeip.net/","msgid":"<87cz63xqrk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-21T10:21:51","name":"[PING,v2] Add '\''-Wno-complain-wrong-lang'\'', and use it in '\''gcc/testsuite/lib/target-supports.exp:check_compile'\'' and elsewhere","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz63xqrk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":59901,"url":"https://patchwork.plctlab.org/api/1.2/patches/59901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdc01b81-7097-11bc-ab65-315388e3c916@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-21T11:57:22","name":"Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdc01b81-7097-11bc-ab65-315388e3c916@codesourcery.com/mbox/"},{"id":59952,"url":"https://patchwork.plctlab.org/api/1.2/patches/59952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-2-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:50","name":"[committed,001/103] gccrs: Fix missing dead code analysis ICE on local enum definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-2-arthur.cohen@embecosm.com/mbox/"},{"id":59957,"url":"https://patchwork.plctlab.org/api/1.2/patches/59957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-3-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:52","name":"[committed,002/103] gccrs: visibility: Rename get_public_vis_type -> get_vis_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-3-arthur.cohen@embecosm.com/mbox/"},{"id":59950,"url":"https://patchwork.plctlab.org/api/1.2/patches/59950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-4-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:53","name":"[committed,003/103] gccrs: dump: Emit visibility when dumping items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-4-arthur.cohen@embecosm.com/mbox/"},{"id":59951,"url":"https://patchwork.plctlab.org/api/1.2/patches/59951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-5-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:54","name":"[committed,004/103] gccrs: Add catch for recusive type queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-5-arthur.cohen@embecosm.com/mbox/"},{"id":59971,"url":"https://patchwork.plctlab.org/api/1.2/patches/59971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-6-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:55","name":"[committed,005/103] gccrs: testing: try loop in const function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-6-arthur.cohen@embecosm.com/mbox/"},{"id":59964,"url":"https://patchwork.plctlab.org/api/1.2/patches/59964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-7-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:56","name":"[committed,006/103] gccrs: ast: dump assignment and compound assignment expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-7-arthur.cohen@embecosm.com/mbox/"},{"id":59967,"url":"https://patchwork.plctlab.org/api/1.2/patches/59967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-8-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:57","name":"[committed,007/103] gccrs: ast: dump If expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-8-arthur.cohen@embecosm.com/mbox/"},{"id":59955,"url":"https://patchwork.plctlab.org/api/1.2/patches/59955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-9-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:58","name":"[committed,008/103] gccrs: builtins: Move implementation into source file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-9-arthur.cohen@embecosm.com/mbox/"},{"id":59960,"url":"https://patchwork.plctlab.org/api/1.2/patches/59960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-10-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:00:59","name":"[committed,009/103] gccrs: Track DefId on ADT variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-10-arthur.cohen@embecosm.com/mbox/"},{"id":59976,"url":"https://patchwork.plctlab.org/api/1.2/patches/59976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-11-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:00","name":"[committed,010/103] gccrs: Ensure uniqueness on Path probe'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-11-arthur.cohen@embecosm.com/mbox/"},{"id":59958,"url":"https://patchwork.plctlab.org/api/1.2/patches/59958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-12-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:01","name":"[committed,011/103] gccrs: Support looking up super traits for trait items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-12-arthur.cohen@embecosm.com/mbox/"},{"id":59966,"url":"https://patchwork.plctlab.org/api/1.2/patches/59966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-13-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:02","name":"[committed,012/103] gccrs: ast: dump: add emit_generic_params helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-13-arthur.cohen@embecosm.com/mbox/"},{"id":59970,"url":"https://patchwork.plctlab.org/api/1.2/patches/59970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-14-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:03","name":"[committed,013/103] gccrs: ast: dump: add format_{tuple, struct}_field helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-14-arthur.cohen@embecosm.com/mbox/"},{"id":59972,"url":"https://patchwork.plctlab.org/api/1.2/patches/59972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-15-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:04","name":"[committed,014/103] gccrs: ast: dump structs, enums and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-15-arthur.cohen@embecosm.com/mbox/"},{"id":59968,"url":"https://patchwork.plctlab.org/api/1.2/patches/59968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-16-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:05","name":"[committed,015/103] gccrs: intrinsics: Add data prefetching intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-16-arthur.cohen@embecosm.com/mbox/"},{"id":59969,"url":"https://patchwork.plctlab.org/api/1.2/patches/59969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-17-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:06","name":"[committed,016/103] gccrs: fix ICE on missing closing paren","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-17-arthur.cohen@embecosm.com/mbox/"},{"id":59982,"url":"https://patchwork.plctlab.org/api/1.2/patches/59982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-18-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:07","name":"[committed,017/103] gccrs: mappings: Add MacroInvocation -> MacroRulesDef mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-18-arthur.cohen@embecosm.com/mbox/"},{"id":59975,"url":"https://patchwork.plctlab.org/api/1.2/patches/59975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-19-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:08","name":"[committed,018/103] gccrs: rust-ast-resolve-item: Add note about resolving glob uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-19-arthur.cohen@embecosm.com/mbox/"},{"id":59986,"url":"https://patchwork.plctlab.org/api/1.2/patches/59986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-20-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:09","name":"[committed,019/103] gccrs: ast: Add accept_vis() method to `GenericArg`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-20-arthur.cohen@embecosm.com/mbox/"},{"id":59985,"url":"https://patchwork.plctlab.org/api/1.2/patches/59985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-21-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:10","name":"[committed,020/103] gccrs: early-name-resolver: Add simple macro name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-21-arthur.cohen@embecosm.com/mbox/"},{"id":59973,"url":"https://patchwork.plctlab.org/api/1.2/patches/59973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-22-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:11","name":"[committed,021/103] gccrs: Support type resolution on super traits on dyn objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-22-arthur.cohen@embecosm.com/mbox/"},{"id":59989,"url":"https://patchwork.plctlab.org/api/1.2/patches/59989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-23-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:12","name":"[committed,022/103] gccrs: Add mappings for fn_once lang item","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-23-arthur.cohen@embecosm.com/mbox/"},{"id":59981,"url":"https://patchwork.plctlab.org/api/1.2/patches/59981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-24-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:13","name":"[committed,023/103] gccrs: Add ABI mappings for rust-call to map to ABI::RUST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-24-arthur.cohen@embecosm.com/mbox/"},{"id":59978,"url":"https://patchwork.plctlab.org/api/1.2/patches/59978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-25-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:14","name":"[committed,024/103] gccrs: Method resolution must support multiple candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-25-arthur.cohen@embecosm.com/mbox/"},{"id":59977,"url":"https://patchwork.plctlab.org/api/1.2/patches/59977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-26-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:15","name":"[committed,025/103] gccrs: ast: dump: fix extra newline in block without tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-26-arthur.cohen@embecosm.com/mbox/"},{"id":59994,"url":"https://patchwork.plctlab.org/api/1.2/patches/59994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-27-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:16","name":"[committed,026/103] gccrs: ast: dump: minor fixups to IfExpr formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-27-arthur.cohen@embecosm.com/mbox/"},{"id":59974,"url":"https://patchwork.plctlab.org/api/1.2/patches/59974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-28-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:17","name":"[committed,027/103] gccrs: ast: dump: ComparisonExpr and LazyBooleanExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-28-arthur.cohen@embecosm.com/mbox/"},{"id":59998,"url":"https://patchwork.plctlab.org/api/1.2/patches/59998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-29-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:18","name":"[committed,028/103] gccrs: ast: dump: ArrayExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-29-arthur.cohen@embecosm.com/mbox/"},{"id":59980,"url":"https://patchwork.plctlab.org/api/1.2/patches/59980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-30-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:19","name":"[committed,029/103] gccrs: ast: dump: various simple Exprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-30-arthur.cohen@embecosm.com/mbox/"},{"id":60003,"url":"https://patchwork.plctlab.org/api/1.2/patches/60003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-31-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:20","name":"[committed,030/103] gccrs: ast: dump: RangeExprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-31-arthur.cohen@embecosm.com/mbox/"},{"id":59993,"url":"https://patchwork.plctlab.org/api/1.2/patches/59993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-32-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:21","name":"[committed,031/103] gccrs: Refactor TraitResolver to not require a visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-32-arthur.cohen@embecosm.com/mbox/"},{"id":59979,"url":"https://patchwork.plctlab.org/api/1.2/patches/59979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-33-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:22","name":"[committed,032/103] gccrs: ast: dump TypeAlias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-33-arthur.cohen@embecosm.com/mbox/"},{"id":59996,"url":"https://patchwork.plctlab.org/api/1.2/patches/59996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-34-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:23","name":"[committed,033/103] gccrs: Support outer attribute handling on trait items just like normal items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-34-arthur.cohen@embecosm.com/mbox/"},{"id":60011,"url":"https://patchwork.plctlab.org/api/1.2/patches/60011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-35-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:24","name":"[committed,034/103] gccrs: dump: Emit visibility when dumping items","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-35-arthur.cohen@embecosm.com/mbox/"},{"id":60002,"url":"https://patchwork.plctlab.org/api/1.2/patches/60002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-36-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:25","name":"[committed,035/103] gccrs: dump: Dump items within modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-36-arthur.cohen@embecosm.com/mbox/"},{"id":60015,"url":"https://patchwork.plctlab.org/api/1.2/patches/60015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-37-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:26","name":"[committed,036/103] gccrs: dump: Fix module dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-37-arthur.cohen@embecosm.com/mbox/"},{"id":59983,"url":"https://patchwork.plctlab.org/api/1.2/patches/59983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-38-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:27","name":"[committed,037/103] gccrs: ast: Module: unloaded module and inner attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-38-arthur.cohen@embecosm.com/mbox/"},{"id":59984,"url":"https://patchwork.plctlab.org/api/1.2/patches/59984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-39-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:28","name":"[committed,038/103] gccrs: dump: Dump macro rules definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-39-arthur.cohen@embecosm.com/mbox/"},{"id":60021,"url":"https://patchwork.plctlab.org/api/1.2/patches/60021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-40-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:29","name":"[committed,039/103] gccrs: Add check for recursive trait cycles","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-40-arthur.cohen@embecosm.com/mbox/"},{"id":59987,"url":"https://patchwork.plctlab.org/api/1.2/patches/59987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-41-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:30","name":"[committed,040/103] gccrs: ast: Refactor ASTFragment -> Fragment class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-41-arthur.cohen@embecosm.com/mbox/"},{"id":60025,"url":"https://patchwork.plctlab.org/api/1.2/patches/60025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-42-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:31","name":"[committed,041/103] gccrs: rust: Replace uses of ASTFragment -> Fragment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-42-arthur.cohen@embecosm.com/mbox/"},{"id":59992,"url":"https://patchwork.plctlab.org/api/1.2/patches/59992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-43-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:32","name":"[committed,042/103] gccrs: ast: Improve Fragment API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-43-arthur.cohen@embecosm.com/mbox/"},{"id":59988,"url":"https://patchwork.plctlab.org/api/1.2/patches/59988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-44-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:33","name":"[committed,043/103] gccrs: Add missing fn_once_output langitem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-44-arthur.cohen@embecosm.com/mbox/"},{"id":60008,"url":"https://patchwork.plctlab.org/api/1.2/patches/60008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-45-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:34","name":"[committed,044/103] gccrs: Refactor expression hir lowering into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-45-arthur.cohen@embecosm.com/mbox/"},{"id":59995,"url":"https://patchwork.plctlab.org/api/1.2/patches/59995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-46-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:35","name":"[committed,045/103] gccrs: Formatting cleanup in HIR lowering pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-46-arthur.cohen@embecosm.com/mbox/"},{"id":60010,"url":"https://patchwork.plctlab.org/api/1.2/patches/60010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-47-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:36","name":"[committed,046/103] gccrs: Add name resolution for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-47-arthur.cohen@embecosm.com/mbox/"},{"id":60001,"url":"https://patchwork.plctlab.org/api/1.2/patches/60001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-48-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-48-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:37","name":"[committed,047/103] gccrs: Refactor method call type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-48-arthur.cohen@embecosm.com/mbox/"},{"id":59991,"url":"https://patchwork.plctlab.org/api/1.2/patches/59991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-49-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-49-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:38","name":"[committed,048/103] gccrs: Add closures to lints and error checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-49-arthur.cohen@embecosm.com/mbox/"},{"id":60033,"url":"https://patchwork.plctlab.org/api/1.2/patches/60033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-50-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-50-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:39","name":"[committed,049/103] gccrs: Initial Type resolution for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-50-arthur.cohen@embecosm.com/mbox/"},{"id":60036,"url":"https://patchwork.plctlab.org/api/1.2/patches/60036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-51-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-51-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:40","name":"[committed,050/103] gccrs: Closure support at CallExpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-51-arthur.cohen@embecosm.com/mbox/"},{"id":60013,"url":"https://patchwork.plctlab.org/api/1.2/patches/60013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-52-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-52-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:41","name":"[committed,051/103] gccrs: Add missing name resolution to Function type-path segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-52-arthur.cohen@embecosm.com/mbox/"},{"id":60020,"url":"https://patchwork.plctlab.org/api/1.2/patches/60020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-53-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-53-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:42","name":"[committed,052/103] gccrs: Add missing hir lowering to function type-path segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-53-arthur.cohen@embecosm.com/mbox/"},{"id":59999,"url":"https://patchwork.plctlab.org/api/1.2/patches/59999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-54-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-54-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:43","name":"[committed,053/103] gccrs: Add missing type resolution for function type segments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-54-arthur.cohen@embecosm.com/mbox/"},{"id":60004,"url":"https://patchwork.plctlab.org/api/1.2/patches/60004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-55-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-55-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:44","name":"[committed,054/103] gccrs: Support Closure calls as generic trait bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-55-arthur.cohen@embecosm.com/mbox/"},{"id":60045,"url":"https://patchwork.plctlab.org/api/1.2/patches/60045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-56-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-56-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:45","name":"[committed,055/103] gccrs: Implement the inline visitor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-56-arthur.cohen@embecosm.com/mbox/"},{"id":60040,"url":"https://patchwork.plctlab.org/api/1.2/patches/60040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-57-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-57-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:46","name":"[committed,056/103] gccrs: rust: Allow gccrs to build on x86_64-apple-darwin with clang/libc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-57-arthur.cohen@embecosm.com/mbox/"},{"id":60024,"url":"https://patchwork.plctlab.org/api/1.2/patches/60024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-58-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-58-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:47","name":"[committed,057/103] gccrs: builtins: Rename all bang macro handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-58-arthur.cohen@embecosm.com/mbox/"},{"id":60012,"url":"https://patchwork.plctlab.org/api/1.2/patches/60012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-59-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-59-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:48","name":"[committed,058/103] gccrs: intrinsics: Add `sorry_handler` intrinsic handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-59-arthur.cohen@embecosm.com/mbox/"},{"id":60019,"url":"https://patchwork.plctlab.org/api/1.2/patches/60019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-60-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-60-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:49","name":"[committed,059/103] gccrs: constexpr: Add `rust_sorry_at` in places relying on init values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-60-arthur.cohen@embecosm.com/mbox/"},{"id":60018,"url":"https://patchwork.plctlab.org/api/1.2/patches/60018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-61-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-61-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:50","name":"[committed,060/103] gccrs: intrinsics: Add early implementation for atomic_store_{seqcst, relaxed, release}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-61-arthur.cohen@embecosm.com/mbox/"},{"id":60009,"url":"https://patchwork.plctlab.org/api/1.2/patches/60009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-62-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-62-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:51","name":"[committed,061/103] gccrs: intrinsics: Add unchecked operation intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-62-arthur.cohen@embecosm.com/mbox/"},{"id":60050,"url":"https://patchwork.plctlab.org/api/1.2/patches/60050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-63-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-63-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:52","name":"[committed,062/103] gccrs: intrinsics: Use lambdas for wrapping_ intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-63-arthur.cohen@embecosm.com/mbox/"},{"id":60022,"url":"https://patchwork.plctlab.org/api/1.2/patches/60022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-64-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-64-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:53","name":"[committed,063/103] gccrs: intrinsics: Cleanup error handling around atomic_store_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-64-arthur.cohen@embecosm.com/mbox/"},{"id":60035,"url":"https://patchwork.plctlab.org/api/1.2/patches/60035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-65-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-65-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:54","name":"[committed,064/103] gccrs: intrinsics: Implement atomic_load intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-65-arthur.cohen@embecosm.com/mbox/"},{"id":60032,"url":"https://patchwork.plctlab.org/api/1.2/patches/60032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-66-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-66-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:55","name":"[committed,065/103] gccrs: ast: visitor pattern -> overload syntax compatibility layer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-66-arthur.cohen@embecosm.com/mbox/"},{"id":60027,"url":"https://patchwork.plctlab.org/api/1.2/patches/60027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-67-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-67-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:56","name":"[committed,066/103] gccrs: ast: transform helper methods to visits and add methods to simplify repeated patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-67-arthur.cohen@embecosm.com/mbox/"},{"id":60054,"url":"https://patchwork.plctlab.org/api/1.2/patches/60054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-68-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-68-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:57","name":"[committed,067/103] gccrs: ast: refer correctly to arguments in docs-strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-68-arthur.cohen@embecosm.com/mbox/"},{"id":60039,"url":"https://patchwork.plctlab.org/api/1.2/patches/60039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-69-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-69-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:58","name":"[committed,068/103] gccrs: ast: Dump unit struct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-69-arthur.cohen@embecosm.com/mbox/"},{"id":60056,"url":"https://patchwork.plctlab.org/api/1.2/patches/60056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-70-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-70-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:01:59","name":"[committed,069/103] gccrs: add lang item \"phantom_data\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-70-arthur.cohen@embecosm.com/mbox/"},{"id":60034,"url":"https://patchwork.plctlab.org/api/1.2/patches/60034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-71-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-71-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:00","name":"[committed,070/103] gccrs: add Location to AST::Visibility","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-71-arthur.cohen@embecosm.com/mbox/"},{"id":60060,"url":"https://patchwork.plctlab.org/api/1.2/patches/60060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-72-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-72-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:01","name":"[committed,071/103] gccrs: typecheck: Fix overzealous `delete` call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-72-arthur.cohen@embecosm.com/mbox/"},{"id":60038,"url":"https://patchwork.plctlab.org/api/1.2/patches/60038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-73-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-73-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:02","name":"[committed,072/103] gccrs: ast: add visit overload for references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-73-arthur.cohen@embecosm.com/mbox/"},{"id":60023,"url":"https://patchwork.plctlab.org/api/1.2/patches/60023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-74-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-74-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:03","name":"[committed,073/103] gccrs: ast: Dump where clause and recursively needed nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-74-arthur.cohen@embecosm.com/mbox/"},{"id":60064,"url":"https://patchwork.plctlab.org/api/1.2/patches/60064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-75-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-75-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:04","name":"[committed,074/103] gccrs: ast: Dump slice type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-75-arthur.cohen@embecosm.com/mbox/"},{"id":60042,"url":"https://patchwork.plctlab.org/api/1.2/patches/60042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-76-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-76-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:05","name":"[committed,075/103] gccrs: ast: Dump array type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-76-arthur.cohen@embecosm.com/mbox/"},{"id":60031,"url":"https://patchwork.plctlab.org/api/1.2/patches/60031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-77-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-77-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:06","name":"[committed,076/103] gccrs: ast: Dump raw pointer type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-77-arthur.cohen@embecosm.com/mbox/"},{"id":60046,"url":"https://patchwork.plctlab.org/api/1.2/patches/60046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-78-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-78-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:07","name":"[committed,077/103] gccrs: ast: Dump never type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-78-arthur.cohen@embecosm.com/mbox/"},{"id":60066,"url":"https://patchwork.plctlab.org/api/1.2/patches/60066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-79-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-79-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:08","name":"[committed,078/103] gccrs: ast: Dump tuple type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-79-arthur.cohen@embecosm.com/mbox/"},{"id":60049,"url":"https://patchwork.plctlab.org/api/1.2/patches/60049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-80-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-80-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:09","name":"[committed,079/103] gccrs: ast: Dump inferred type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-80-arthur.cohen@embecosm.com/mbox/"},{"id":60043,"url":"https://patchwork.plctlab.org/api/1.2/patches/60043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-81-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-81-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:10","name":"[committed,080/103] gccrs: ast: Dump bare function type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-81-arthur.cohen@embecosm.com/mbox/"},{"id":60068,"url":"https://patchwork.plctlab.org/api/1.2/patches/60068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-82-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-82-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:11","name":"[committed,081/103] gccrs: ast: Dump impl trait type one bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-82-arthur.cohen@embecosm.com/mbox/"},{"id":60037,"url":"https://patchwork.plctlab.org/api/1.2/patches/60037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-83-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-83-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:12","name":"[committed,082/103] gccrs: ast: Dump impl trait type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-83-arthur.cohen@embecosm.com/mbox/"},{"id":60041,"url":"https://patchwork.plctlab.org/api/1.2/patches/60041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-84-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-84-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:13","name":"[committed,083/103] gccrs: ast: Dump trait object type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-84-arthur.cohen@embecosm.com/mbox/"},{"id":60053,"url":"https://patchwork.plctlab.org/api/1.2/patches/60053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-85-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-85-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:14","name":"[committed,084/103] gccrs: ast: Dump parenthesised type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-85-arthur.cohen@embecosm.com/mbox/"},{"id":60044,"url":"https://patchwork.plctlab.org/api/1.2/patches/60044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-86-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-86-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:15","name":"[committed,085/103] gccrs: ast: Dump trait object type one bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-86-arthur.cohen@embecosm.com/mbox/"},{"id":60057,"url":"https://patchwork.plctlab.org/api/1.2/patches/60057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-87-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-87-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:16","name":"[committed,086/103] gccrs: ast: Dump type param type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-87-arthur.cohen@embecosm.com/mbox/"},{"id":60071,"url":"https://patchwork.plctlab.org/api/1.2/patches/60071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-88-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-88-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:17","name":"[committed,087/103] gccrs: ast: Dump generic parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-88-arthur.cohen@embecosm.com/mbox/"},{"id":60074,"url":"https://patchwork.plctlab.org/api/1.2/patches/60074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-89-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-89-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:18","name":"[committed,088/103] gccrs: ast: Remove unused include in rust-ast-dump.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-89-arthur.cohen@embecosm.com/mbox/"},{"id":60059,"url":"https://patchwork.plctlab.org/api/1.2/patches/60059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-90-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-90-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:19","name":"[committed,089/103] gccrs: ast: Dump remove /* stmp */ comment to not clutter the dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-90-arthur.cohen@embecosm.com/mbox/"},{"id":60047,"url":"https://patchwork.plctlab.org/api/1.2/patches/60047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-91-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-91-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:20","name":"[committed,090/103] gccrs: ast: Dump no comma after self in fn params if it is the last one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-91-arthur.cohen@embecosm.com/mbox/"},{"id":60062,"url":"https://patchwork.plctlab.org/api/1.2/patches/60062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-92-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-92-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:21","name":"[committed,091/103] gccrs: Remove default location. Add visibility location to create_* functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-92-arthur.cohen@embecosm.com/mbox/"},{"id":60077,"url":"https://patchwork.plctlab.org/api/1.2/patches/60077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-93-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-93-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:22","name":"[committed,092/103] gccrs: Improve lexer dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-93-arthur.cohen@embecosm.com/mbox/"},{"id":60048,"url":"https://patchwork.plctlab.org/api/1.2/patches/60048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-94-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-94-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:23","name":"[committed,093/103] gccrs: Get rid of make builtin macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-94-arthur.cohen@embecosm.com/mbox/"},{"id":60055,"url":"https://patchwork.plctlab.org/api/1.2/patches/60055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-95-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-95-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:24","name":"[committed,094/103] gccrs: Refactor name resolver to take a Rib::ItemType","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-95-arthur.cohen@embecosm.com/mbox/"},{"id":60051,"url":"https://patchwork.plctlab.org/api/1.2/patches/60051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-96-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-96-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:25","name":"[committed,095/103] gccrs: Add closure binding'\''s tracking to name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-96-arthur.cohen@embecosm.com/mbox/"},{"id":60079,"url":"https://patchwork.plctlab.org/api/1.2/patches/60079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-97-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-97-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:26","name":"[committed,096/103] gccrs: Add capture tracking to the type info for closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-97-arthur.cohen@embecosm.com/mbox/"},{"id":60052,"url":"https://patchwork.plctlab.org/api/1.2/patches/60052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-98-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-98-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:27","name":"[committed,097/103] gccrs: Add initial support for argument capture of closures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-98-arthur.cohen@embecosm.com/mbox/"},{"id":60080,"url":"https://patchwork.plctlab.org/api/1.2/patches/60080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-99-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-99-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:28","name":"[committed,098/103] gccrs: Fix undefined behaviour issues on macos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-99-arthur.cohen@embecosm.com/mbox/"},{"id":60065,"url":"https://patchwork.plctlab.org/api/1.2/patches/60065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-100-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-100-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:29","name":"[committed,099/103] gccrs: Skip this debug test case which is failing on the latest mac-os devtools and its only for debug info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-100-arthur.cohen@embecosm.com/mbox/"},{"id":60061,"url":"https://patchwork.plctlab.org/api/1.2/patches/60061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-101-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-101-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:30","name":"[committed,100/103] gccrs: Cleanup unused parameters to fix the bootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-101-arthur.cohen@embecosm.com/mbox/"},{"id":60067,"url":"https://patchwork.plctlab.org/api/1.2/patches/60067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-102-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-102-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:31","name":"[committed,101/103] gccrs: Repair '\''gcc/rust/lang.opt'\'' comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-102-arthur.cohen@embecosm.com/mbox/"},{"id":60070,"url":"https://patchwork.plctlab.org/api/1.2/patches/60070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-103-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-103-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:32","name":"[committed,102/103] gccrs: const evaluator: Remove get_nth_callarg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-103-arthur.cohen@embecosm.com/mbox/"},{"id":60058,"url":"https://patchwork.plctlab.org/api/1.2/patches/60058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-104-arthur.cohen@embecosm.com/","msgid":"<20230221120230.596966-104-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-02-21T12:02:33","name":"[committed,103/103] gccrs: add math intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221120230.596966-104-arthur.cohen@embecosm.com/mbox/"},{"id":60082,"url":"https://patchwork.plctlab.org/api/1.2/patches/60082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221124800.25BFD13223@imap2.suse-dmz.suse.de/","msgid":"<20230221124800.25BFD13223@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-21T12:47:59","name":"tree-optimization/108691 - remove trigger-happy assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221124800.25BFD13223@imap2.suse-dmz.suse.de/mbox/"},{"id":60084,"url":"https://patchwork.plctlab.org/api/1.2/patches/60084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkln6uxx.fsf@euler.schwinge.homeip.net/","msgid":"<87bkln6uxx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-21T12:53:46","name":"Update copyright years. (was: [committed 003/103] gccrs: dump: Emit visibility when dumping items)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkln6uxx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60102,"url":"https://patchwork.plctlab.org/api/1.2/patches/60102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141405.1798120-1-ibuclaw@gdcproject.org/","msgid":"<20230221141405.1798120-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:14:05","name":"[committed] libphobos: Add @nogc to gcc.backtrace and gcc.libbacktrace modules.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141405.1798120-1-ibuclaw@gdcproject.org/mbox/"},{"id":60104,"url":"https://patchwork.plctlab.org/api/1.2/patches/60104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141900.1802009-1-ibuclaw@gdcproject.org/","msgid":"<20230221141900.1802009-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:19:00","name":"[committed] d: Set doing_semantic_analysis_p before calling functionSemantic3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221141900.1802009-1-ibuclaw@gdcproject.org/mbox/"},{"id":60107,"url":"https://patchwork.plctlab.org/api/1.2/patches/60107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221142350.1806182-1-ibuclaw@gdcproject.org/","msgid":"<20230221142350.1806182-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:23:50","name":"[committed] d: Only handle the left-to-right evaluation of a call expression during gimplify","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221142350.1806182-1-ibuclaw@gdcproject.org/mbox/"},{"id":60114,"url":"https://patchwork.plctlab.org/api/1.2/patches/60114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221143536.1818454-1-ibuclaw@gdcproject.org/","msgid":"<20230221143536.1818454-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-02-21T14:35:36","name":"[committed] d: Merge upstream dmd, druntime 09faa4eacd, phobos 13ef27a56.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221143536.1818454-1-ibuclaw@gdcproject.org/mbox/"},{"id":60115,"url":"https://patchwork.plctlab.org/api/1.2/patches/60115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7pncc66.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-21T14:42:41","name":"[1/2] ipa-cp: Fix various issues in update_specialized_profile (PR 107925)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6o7pncc66.fsf@suse.cz/mbox/"},{"id":60116,"url":"https://patchwork.plctlab.org/api/1.2/patches/60116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt57cc64.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-21T14:42:43","name":"[2/2] ipa-cp: Improve updating behavior when profile counts have gone bad","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mt57cc64.fsf@suse.cz/mbox/"},{"id":60117,"url":"https://patchwork.plctlab.org/api/1.2/patches/60117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221144604.2128750-1-qing.zhao@oracle.com/","msgid":"<20230221144604.2128750-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-21T14:46:04","name":"[V2] Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221144604.2128750-1-qing.zhao@oracle.com/mbox/"},{"id":60129,"url":"https://patchwork.plctlab.org/api/1.2/patches/60129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86pma3nipf.fsf@aarsen.me/","msgid":"<86pma3nipf.fsf@aarsen.me>","list_archive_url":null,"date":"2023-02-21T14:59:37","name":"Ping^2: [PATCH+wwwdocs 0/8] A small Texinfo refinement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86pma3nipf.fsf@aarsen.me/mbox/"},{"id":60227,"url":"https://patchwork.plctlab.org/api/1.2/patches/60227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221191036.1140927-1-ppalka@redhat.com/","msgid":"<20230221191036.1140927-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-21T19:10:36","name":"c++: more mce_false folding from cp_fully_fold_init [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221191036.1140927-1-ppalka@redhat.com/mbox/"},{"id":60263,"url":"https://patchwork.plctlab.org/api/1.2/patches/60263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a066b400-95d8-49cf-9f44-9cacacb8ff0f-1677014338288@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-02-21T21:18:58","name":"Fortran: reject invalid CHARACTER length of derived type components [PR96024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a066b400-95d8-49cf-9f44-9cacacb8ff0f-1677014338288@3c-app-gmx-bs33/mbox/"},{"id":60271,"url":"https://patchwork.plctlab.org/api/1.2/patches/60271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221215622.3077474-1-jcmvbkbc@gmail.com/","msgid":"<20230221215622.3077474-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-21T21:56:22","name":"[COMMITTED] gcc: xtensa: fix PR target/108876","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221215622.3077474-1-jcmvbkbc@gmail.com/mbox/"},{"id":60272,"url":"https://patchwork.plctlab.org/api/1.2/patches/60272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221220733.2068735-1-dmalcolm@redhat.com/","msgid":"<20230221220733.2068735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-02-21T22:07:33","name":"[pushed] analyzer: stop exploring the path after certain diagnostics [PR108830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230221220733.2068735-1-dmalcolm@redhat.com/mbox/"},{"id":60285,"url":"https://patchwork.plctlab.org/api/1.2/patches/60285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com/","msgid":"<3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com>","list_archive_url":null,"date":"2023-02-21T23:02:32","name":"vect: Check that vector factor is a compile-time constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3356a2e0-b402-de07-9374-6e5b5c59a2f2@rivosinc.com/mbox/"},{"id":60348,"url":"https://patchwork.plctlab.org/api/1.2/patches/60348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com/","msgid":"<7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com>","list_archive_url":null,"date":"2023-02-22T06:06:23","name":"libstdc++: Limit allocations in _Rb_tree 1/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7313d189-ae56-4582-6f23-9263dbf57dd3@gmail.com/mbox/"},{"id":60350,"url":"https://patchwork.plctlab.org/api/1.2/patches/60350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com/","msgid":"<98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com>","list_archive_url":null,"date":"2023-02-22T06:08:24","name":"libstdc++: Limit allocations in _Rb_tree 2/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98823f83-ae62-f3e4-4091-01841b08fbb7@gmail.com/mbox/"},{"id":60376,"url":"https://patchwork.plctlab.org/api/1.2/patches/60376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XbFF0VQV9htP5E@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:06:28","name":"c++: Don'\''t recurse on DECL_INITIAL for DECL_EXPR on non-VAR_DECLs [PR108606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XbFF0VQV9htP5E@tucnak/mbox/"},{"id":60378,"url":"https://patchwork.plctlab.org/api/1.2/patches/60378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XclksRe7Btwfim@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:12:54","name":"cgraph: Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE in more spots [PR106258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XclksRe7Btwfim@tucnak/mbox/"},{"id":60379,"url":"https://patchwork.plctlab.org/api/1.2/patches/60379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XfcHZqlRUGJ+GQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T09:25:04","name":"cygwin: Don'\''t try to support multilibs [PR107998]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/XfcHZqlRUGJ+GQ@tucnak/mbox/"},{"id":60455,"url":"https://patchwork.plctlab.org/api/1.2/patches/60455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwa6o46.fsf@euler.schwinge.homeip.net/","msgid":"<877cwa6o46.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-22T09:33:29","name":"Rust: Move void_list_node init to common code (was: [PATCH] Move void_list_node init to common code)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cwa6o46.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60434,"url":"https://patchwork.plctlab.org/api/1.2/patches/60434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222094351.1075-1-jinma@linux.alibaba.com/","msgid":"<20230222094351.1075-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-22T09:43:51","name":"RISC-V: When the TARGET_COMPUTE_MULTILIB hook is implemented, check the version of each extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222094351.1075-1-jinma@linux.alibaba.com/mbox/"},{"id":60458,"url":"https://patchwork.plctlab.org/api/1.2/patches/60458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222102609.1099-1-jinma@linux.alibaba.com/","msgid":"<20230222102609.1099-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-02-22T10:26:09","name":"RISC-V: Don'\''t report an error until the link phase if suitable multilib isn'\''t found.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222102609.1099-1-jinma@linux.alibaba.com/mbox/"},{"id":60459,"url":"https://patchwork.plctlab.org/api/1.2/patches/60459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3af129a-55d1-663d-0177-08bfd51c4895@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-22T10:59:06","name":"[wwwdocs] OpenMP update for gcc-13/changes.html + projects/gomp/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3af129a-55d1-663d-0177-08bfd51c4895@codesourcery.com/mbox/"},{"id":60460,"url":"https://patchwork.plctlab.org/api/1.2/patches/60460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/X2sryMfD4FufBF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T11:04:18","name":"tree: Add 3 argument fndecl_built_in_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/X2sryMfD4FufBF@tucnak/mbox/"},{"id":60471,"url":"https://patchwork.plctlab.org/api/1.2/patches/60471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qmi6iya.fsf@euler.schwinge.homeip.net/","msgid":"<871qmi6iya.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-02-22T11:25:01","name":"Rust: In '\''type_for_mode'\'' langhook also consider all '\''int_n'\'' modes/types (was: Modula-2 / Rust: Many targets failing)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qmi6iya.fsf@euler.schwinge.homeip.net/mbox/"},{"id":60514,"url":"https://patchwork.plctlab.org/api/1.2/patches/60514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222121904.4087522-1-Yash.Shinde@windriver.com/","msgid":"<20230222121904.4087522-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:19:04","name":"Share work directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222121904.4087522-1-Yash.Shinde@windriver.com/mbox/"},{"id":60515,"url":"https://patchwork.plctlab.org/api/1.2/patches/60515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122114.47958-1-kito.cheng@sifive.com/","msgid":"<20230222122114.47958-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-02-22T12:21:14","name":"[committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122114.47958-1-kito.cheng@sifive.com/mbox/"},{"id":60516,"url":"https://patchwork.plctlab.org/api/1.2/patches/60516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122333.28218-1-Yash.Shinde@windriver.com/","msgid":"<20230222122333.28218-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:23:33","name":"libgcc_s: Use alias for __cpu_indicator_init instead of symver","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222122333.28218-1-Yash.Shinde@windriver.com/mbox/"},{"id":60517,"url":"https://patchwork.plctlab.org/api/1.2/patches/60517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222123411.419584-1-Yash.Shinde@windriver.com/","msgid":"<20230222123411.419584-1-Yash.Shinde@windriver.com>","list_archive_url":null,"date":"2023-02-22T12:34:11","name":"Pass CXXFLAGS_FOR_BUILD to avoid build failure errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222123411.419584-1-Yash.Shinde@windriver.com/mbox/"},{"id":60640,"url":"https://patchwork.plctlab.org/api/1.2/patches/60640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/Zf9GkrxxWxG8Eo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-22T18:33:24","name":"tree, v2: Add 3 argument fndecl_built_in_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/Zf9GkrxxWxG8Eo@tucnak/mbox/"},{"id":60671,"url":"https://patchwork.plctlab.org/api/1.2/patches/60671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222194509.3606756-1-ppalka@redhat.com/","msgid":"<20230222194509.3606756-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-22T19:45:09","name":"c++: unevaluated array new-expr size constantness [PR108219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222194509.3606756-1-ppalka@redhat.com/mbox/"},{"id":60713,"url":"https://patchwork.plctlab.org/api/1.2/patches/60713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222223745.166070-1-polacek@redhat.com/","msgid":"<20230222223745.166070-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-22T22:37:45","name":"c-family: avoid compile-time-hog in c_genericize [PR108880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222223745.166070-1-polacek@redhat.com/mbox/"},{"id":60715,"url":"https://patchwork.plctlab.org/api/1.2/patches/60715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222225913.7BAC233E54@hamza.pair.com/","msgid":"<20230222225913.7BAC233E54@hamza.pair.com>","list_archive_url":null,"date":"2023-02-22T22:59:06","name":"[pushed] wwwdocs: gcc-9: Various changes around -flive-patching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222225913.7BAC233E54@hamza.pair.com/mbox/"},{"id":60726,"url":"https://patchwork.plctlab.org/api/1.2/patches/60726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222235812.185722-1-polacek@redhat.com/","msgid":"<20230222235812.185722-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-22T23:58:12","name":"c++: variable template and targ deduction [PR108550]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230222235812.185722-1-polacek@redhat.com/mbox/"},{"id":60771,"url":"https://patchwork.plctlab.org/api/1.2/patches/60771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfe3ee6-f897-1939-05ea-3e427ad53ae6@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-23T03:41:40","name":"[1/2] xtensa: Fix non-fatal regression introduced by b2ef02e8cbbaf95fee98be255f697f47193960ec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfe3ee6-f897-1939-05ea-3e427ad53ae6@yahoo.co.jp/mbox/"},{"id":60772,"url":"https://patchwork.plctlab.org/api/1.2/patches/60772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3fdecfb-5560-97a5-327d-7db751fe6ec1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-02-23T03:42:32","name":"[2/2] xtensa: Fix missing mode warnings in machine description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3fdecfb-5560-97a5-327d-7db751fe6ec1@yahoo.co.jp/mbox/"},{"id":60803,"url":"https://patchwork.plctlab.org/api/1.2/patches/60803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/cOFKwwDsz+DgAO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T06:56:20","name":"ipa-prop: Fix another case of missing BUILT_IN_UNREACHABLE_TRAP handling [PR106258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/cOFKwwDsz+DgAO@tucnak/mbox/"},{"id":60854,"url":"https://patchwork.plctlab.org/api/1.2/patches/60854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7492903.EvYhyI6sBW@minbar/","msgid":"<7492903.EvYhyI6sBW@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:19","name":"[1/8] libstdc++: Simplify three helper functions into one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7492903.EvYhyI6sBW@minbar/mbox/"},{"id":60851,"url":"https://patchwork.plctlab.org/api/1.2/patches/60851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3152270.5fSG56mABF@minbar/","msgid":"<3152270.5fSG56mABF@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:29","name":"[2/8] libstdc++: Fix simd build failure on clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3152270.5fSG56mABF@minbar/mbox/"},{"id":60853,"url":"https://patchwork.plctlab.org/api/1.2/patches/60853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1944554.usQuhbGJ8B@minbar/","msgid":"<1944554.usQuhbGJ8B@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:43","name":"[3/8] libstdc++: More efficient masked inc-/decrement implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1944554.usQuhbGJ8B@minbar/mbox/"},{"id":60848,"url":"https://patchwork.plctlab.org/api/1.2/patches/60848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2550642.Lt9SDvczpP@minbar/","msgid":"<2550642.Lt9SDvczpP@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:51","name":"[4/8] libstdc++: Add missing constexpr on simd shift implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2550642.Lt9SDvczpP@minbar/mbox/"},{"id":60852,"url":"https://patchwork.plctlab.org/api/1.2/patches/60852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3667544.MHq7AAxBmi@minbar/","msgid":"<3667544.MHq7AAxBmi@minbar>","list_archive_url":null,"date":"2023-02-23T08:49:57","name":"[5/8] libstdc++: Always-inline most of non-cmath fixed_size implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3667544.MHq7AAxBmi@minbar/mbox/"},{"id":60850,"url":"https://patchwork.plctlab.org/api/1.2/patches/60850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2147606.Icojqenx9y@minbar/","msgid":"<2147606.Icojqenx9y@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:02","name":"[6/8] libstdc++: Fix formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2147606.Icojqenx9y@minbar/mbox/"},{"id":60849,"url":"https://patchwork.plctlab.org/api/1.2/patches/60849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/838576767.0ifERbkFSE@minbar/","msgid":"<838576767.0ifERbkFSE@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:10","name":"[7/8] libstdc++: Fix -Wsign-compare issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/838576767.0ifERbkFSE@minbar/mbox/"},{"id":60847,"url":"https://patchwork.plctlab.org/api/1.2/patches/60847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2166927.NgBsaNRSFp@minbar/","msgid":"<2166927.NgBsaNRSFp@minbar>","list_archive_url":null,"date":"2023-02-23T08:50:16","name":"[8/8] libstdc++: Test that integral simd reductions are precise","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2166927.NgBsaNRSFp@minbar/mbox/"},{"id":60866,"url":"https://patchwork.plctlab.org/api/1.2/patches/60866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223092935.579700-1-chenglulu@loongson.cn/","msgid":"<20230223092935.579700-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-02-23T09:29:36","name":"[v2] LoongArch: Change the value of macro TRY_EMPTY_VM_SPACE from 0x8000000000 to 0x1000000000.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223092935.579700-1-chenglulu@loongson.cn/mbox/"},{"id":60868,"url":"https://patchwork.plctlab.org/api/1.2/patches/60868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-1-jcmvbkbc@gmail.com/","msgid":"<20230223093726.3258958-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-23T09:37:25","name":"[COMMITTED,1/2] Revert \"gcc: xtensa: fix PR target/108876\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-1-jcmvbkbc@gmail.com/mbox/"},{"id":60867,"url":"https://patchwork.plctlab.org/api/1.2/patches/60867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-2-jcmvbkbc@gmail.com/","msgid":"<20230223093726.3258958-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-23T09:37:26","name":"[COMMITTED,2/2] xtensa: fix PR target/108876","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223093726.3258958-2-jcmvbkbc@gmail.com/mbox/"},{"id":60883,"url":"https://patchwork.plctlab.org/api/1.2/patches/60883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223101014.B2D2E13928@imap2.suse-dmz.suse.de/","msgid":"<20230223101014.B2D2E13928@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T10:10:14","name":"tree-optimization/108888 - call if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223101014.B2D2E13928@imap2.suse-dmz.suse.de/mbox/"},{"id":60886,"url":"https://patchwork.plctlab.org/api/1.2/patches/60886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c+mpY9VdAiIVFO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:23:22","name":"c++: Add target hook for emit_support_tinfos [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c+mpY9VdAiIVFO@tucnak/mbox/"},{"id":60887,"url":"https://patchwork.plctlab.org/api/1.2/patches/60887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c/U4Y3wDN/K+uc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:26:27","name":"c++: Fix up -fcontracts option description [PR108890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/c/U4Y3wDN/K+uc@tucnak/mbox/"},{"id":60888,"url":"https://patchwork.plctlab.org/api/1.2/patches/60888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-2-arsen@aarsen.me/","msgid":"<20230223102714.3606058-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:10","name":"[v2,1/5] docs: Create Indices appendix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-2-arsen@aarsen.me/mbox/"},{"id":60892,"url":"https://patchwork.plctlab.org/api/1.2/patches/60892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-3-arsen@aarsen.me/","msgid":"<20230223102714.3606058-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:11","name":"[v2,2/5] **/*.texi: Reorder index entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-3-arsen@aarsen.me/mbox/"},{"id":60890,"url":"https://patchwork.plctlab.org/api/1.2/patches/60890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-4-arsen@aarsen.me/","msgid":"<20230223102714.3606058-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:12","name":"[v2,3/5] doc: Add @defbuiltin family of helpers, set documentlanguage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-4-arsen@aarsen.me/mbox/"},{"id":60891,"url":"https://patchwork.plctlab.org/api/1.2/patches/60891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-5-arsen@aarsen.me/","msgid":"<20230223102714.3606058-5-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:13","name":"[v2,4/5] Update texinfo.tex, remove the @gol macro/alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-5-arsen@aarsen.me/mbox/"},{"id":60889,"url":"https://patchwork.plctlab.org/api/1.2/patches/60889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-6-arsen@aarsen.me/","msgid":"<20230223102714.3606058-6-arsen@aarsen.me>","list_archive_url":null,"date":"2023-02-23T10:27:14","name":"[v2,5/5] update_web_docs_git: Update CSS reference to new manual CSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223102714.3606058-6-arsen@aarsen.me/mbox/"},{"id":60893,"url":"https://patchwork.plctlab.org/api/1.2/patches/60893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/dBSvWvHlyViuhb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T10:34:50","name":"xtensa: Fix up fatal_error message strings in xtensa-dynconfig.c [PR108890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/dBSvWvHlyViuhb@tucnak/mbox/"},{"id":60906,"url":"https://patchwork.plctlab.org/api/1.2/patches/60906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223110326.2D39C139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223110326.2D39C139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T11:03:25","name":"Fix memory leak in if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223110326.2D39C139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60920,"url":"https://patchwork.plctlab.org/api/1.2/patches/60920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223114826.79148-1-sebastian.huber@embedded-brains.de/","msgid":"<20230223114826.79148-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-02-23T11:48:26","name":"[gcc] RTEMS: Tune multilib selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223114826.79148-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":60945,"url":"https://patchwork.plctlab.org/api/1.2/patches/60945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com/","msgid":"<80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com>","list_archive_url":null,"date":"2023-02-23T12:16:52","name":"[committed,OG12] libgomp: no need to attach USM pointers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80c2e90d-b619-2c25-f09e-88ea57b02eb9@codesourcery.com/mbox/"},{"id":60958,"url":"https://patchwork.plctlab.org/api/1.2/patches/60958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223125427.DA402139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223125427.DA402139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T12:54:27","name":"Avoid default-initializing auto_vec storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223125427.DA402139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60959,"url":"https://patchwork.plctlab.org/api/1.2/patches/60959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223132126.96E7E139B5@imap2.suse-dmz.suse.de/","msgid":"<20230223132126.96E7E139B5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-23T13:21:26","name":"Fix memory leak in PTA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223132126.96E7E139B5@imap2.suse-dmz.suse.de/mbox/"},{"id":60998,"url":"https://patchwork.plctlab.org/api/1.2/patches/60998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C9BEE9EF-2C2F-43F9-B848-99D08D4C6ED9@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-02-23T14:12:46","name":"[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C9BEE9EF-2C2F-43F9-B848-99D08D4C6ED9@oracle.com/mbox/"},{"id":61001,"url":"https://patchwork.plctlab.org/api/1.2/patches/61001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com/","msgid":"<89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com>","list_archive_url":null,"date":"2023-02-23T14:14:24","name":"[v3,2/2] Update documentation to clarify a GCC extension (PR77650)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89D4C326-54FD-4403-8E54-6CE5B21AA411@oracle.com/mbox/"},{"id":61004,"url":"https://patchwork.plctlab.org/api/1.2/patches/61004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/d1nMrKs775Bfs+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-23T14:18:04","name":"testsuite: Fix up modules.exp [PR108899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/d1nMrKs775Bfs+@tucnak/mbox/"},{"id":61013,"url":"https://patchwork.plctlab.org/api/1.2/patches/61013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982579B72C4CEE0A3C1BC9983AB9@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-02-23T15:11:39","name":"libatomic: Fix SEQ_CST 128-bit atomic load [PR108891]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982579B72C4CEE0A3C1BC9983AB9@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":61039,"url":"https://patchwork.plctlab.org/api/1.2/patches/61039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223173741.532305-1-jwakely@redhat.com/","msgid":"<20230223173741.532305-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-23T17:37:41","name":"libstdc++: Add Doxygen comment for string::resize_and_overwite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223173741.532305-1-jwakely@redhat.com/mbox/"},{"id":61084,"url":"https://patchwork.plctlab.org/api/1.2/patches/61084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com/","msgid":"<860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com>","list_archive_url":null,"date":"2023-02-23T21:14:48","name":"Fix std::unordered_map key range insertion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/860b46c8-fc2a-3024-5fd2-5130ca8c27c8@gmail.com/mbox/"},{"id":61086,"url":"https://patchwork.plctlab.org/api/1.2/patches/61086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223215245.1513700-1-ppalka@redhat.com/","msgid":"<20230223215245.1513700-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-02-23T21:52:45","name":"c++: non-dependent variable template-id [PR108848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223215245.1513700-1-ppalka@redhat.com/mbox/"},{"id":61091,"url":"https://patchwork.plctlab.org/api/1.2/patches/61091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223235133.140864-1-polacek@redhat.com/","msgid":"<20230223235133.140864-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-02-23T23:51:33","name":"c++: ICE with constexpr variable template [PR107938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230223235133.140864-1-polacek@redhat.com/mbox/"},{"id":61093,"url":"https://patchwork.plctlab.org/api/1.2/patches/61093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-1-jcmvbkbc@gmail.com/","msgid":"<20230224000005.3355736-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-24T00:00:04","name":"[COMMITTED,1/2] gcc: xtensa: rename xtensa-dynconfig.c and update its build rule","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-1-jcmvbkbc@gmail.com/mbox/"},{"id":61092,"url":"https://patchwork.plctlab.org/api/1.2/patches/61092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-2-jcmvbkbc@gmail.com/","msgid":"<20230224000005.3355736-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-24T00:00:05","name":"[COMMITTED,2/2] gcc: xtensa: update include style in xtensa-dynconfig.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224000005.3355736-2-jcmvbkbc@gmail.com/mbox/"},{"id":61104,"url":"https://patchwork.plctlab.org/api/1.2/patches/61104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224022439.18998-1-palmer@rivosinc.com/","msgid":"<20230224022439.18998-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-02-24T02:24:39","name":"RISC-V: Disable attribute generation by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224022439.18998-1-palmer@rivosinc.com/mbox/"},{"id":61125,"url":"https://patchwork.plctlab.org/api/1.2/patches/61125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-2-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:17","name":"[v3,01/11] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-2-christoph.muellner@vrull.eu/mbox/"},{"id":61124,"url":"https://patchwork.plctlab.org/api/1.2/patches/61124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-3-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:18","name":"[v3,02/11] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-3-christoph.muellner@vrull.eu/mbox/"},{"id":61129,"url":"https://patchwork.plctlab.org/api/1.2/patches/61129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-4-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:19","name":"[v3,03/11] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-4-christoph.muellner@vrull.eu/mbox/"},{"id":61123,"url":"https://patchwork.plctlab.org/api/1.2/patches/61123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-5-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:20","name":"[v3,04/11] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-5-christoph.muellner@vrull.eu/mbox/"},{"id":61127,"url":"https://patchwork.plctlab.org/api/1.2/patches/61127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-6-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:21","name":"[v3,05/11] riscv: thead: Add support for the XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-6-christoph.muellner@vrull.eu/mbox/"},{"id":61128,"url":"https://patchwork.plctlab.org/api/1.2/patches/61128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-7-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:22","name":"[v3,06/11] riscv: thead: Add support for the XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-7-christoph.muellner@vrull.eu/mbox/"},{"id":61126,"url":"https://patchwork.plctlab.org/api/1.2/patches/61126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-8-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:23","name":"[v3,07/11] riscv: thead: Add support for the XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-8-christoph.muellner@vrull.eu/mbox/"},{"id":61131,"url":"https://patchwork.plctlab.org/api/1.2/patches/61131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-9-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:24","name":"[v3,08/11] riscv: thead: Add support for the XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-9-christoph.muellner@vrull.eu/mbox/"},{"id":61132,"url":"https://patchwork.plctlab.org/api/1.2/patches/61132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-10-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:25","name":"[v3,09/11] riscv: thead: Add support for the XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-10-christoph.muellner@vrull.eu/mbox/"},{"id":61133,"url":"https://patchwork.plctlab.org/api/1.2/patches/61133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-11-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-11-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:26","name":"[v3,10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-11-christoph.muellner@vrull.eu/mbox/"},{"id":61130,"url":"https://patchwork.plctlab.org/api/1.2/patches/61130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-12-christoph.muellner@vrull.eu/","msgid":"<20230224055127.2500953-12-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T05:51:27","name":"[v3,11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224055127.2500953-12-christoph.muellner@vrull.eu/mbox/"},{"id":61165,"url":"https://patchwork.plctlab.org/api/1.2/patches/61165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224072835.12177-1-vit.kabele@sysgo.com/","msgid":"<20230224072835.12177-1-vit.kabele@sysgo.com>","list_archive_url":null,"date":"2023-02-24T07:28:36","name":"[v2] Print padding size when aligning struct member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224072835.12177-1-vit.kabele@sysgo.com/mbox/"},{"id":61181,"url":"https://patchwork.plctlab.org/api/1.2/patches/61181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8632fa5-8f26-970d-0f57-dc7bed6d42e4@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-02-24T08:20:26","name":"[(pushed)] libsanitizer: cherry-pick commit 8f5962b1ccb5fcd4d4544121d43efb860ac3cc6d from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8632fa5-8f26-970d-0f57-dc7bed6d42e4@suse.cz/mbox/"},{"id":61186,"url":"https://patchwork.plctlab.org/api/1.2/patches/61186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224083008.1082527-1-guojiufu@linux.ibm.com/","msgid":"<20230224083008.1082527-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-02-24T08:30:08","name":"use subreg for movsf_from_si and remove UNSPEC_SF_FROM_SI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224083008.1082527-1-guojiufu@linux.ibm.com/mbox/"},{"id":61189,"url":"https://patchwork.plctlab.org/api/1.2/patches/61189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz/","msgid":"<7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz>","list_archive_url":null,"date":"2023-02-24T09:00:01","name":"asan: adjust module name for global variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a627522-bba6-0b50-1d5f-82409a3800df@suse.cz/mbox/"},{"id":61203,"url":"https://patchwork.plctlab.org/api/1.2/patches/61203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iDFmMergDAsy+2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T09:27:50","name":"[committed] i386: Fix up builtins used in avx512bf16vlintrin.h [PR108881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iDFmMergDAsy+2@tucnak/mbox/"},{"id":61204,"url":"https://patchwork.plctlab.org/api/1.2/patches/61204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iFEoRtKXyRe46M@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T09:36:18","name":"cgraphclones: Don'\''t share DECL_ARGUMENTS between thunk and its artificial thunk [PR108854]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iFEoRtKXyRe46M@tucnak/mbox/"},{"id":61275,"url":"https://patchwork.plctlab.org/api/1.2/patches/61275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224111908.92419-1-christoph.muellner@vrull.eu/","msgid":"<20230224111908.92419-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-02-24T11:19:08","name":"[wwwdocs] gcc-13: riscv: Document the T-Head CPU support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224111908.92419-1-christoph.muellner@vrull.eu/mbox/"},{"id":61276,"url":"https://patchwork.plctlab.org/api/1.2/patches/61276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com/","msgid":"<07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com>","list_archive_url":null,"date":"2023-02-24T11:31:59","name":"Fortran: Skip bound conv in gfc_conv_gfc_desc_to_cfi_desc with intent(out) ptr [PR108621]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07be8524-0755-6b77-49bd-af5c688404d5@codesourcery.com/mbox/"},{"id":61277,"url":"https://patchwork.plctlab.org/api/1.2/patches/61277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224113245.9645013246@imap2.suse-dmz.suse.de/","msgid":"<20230224113245.9645013246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T11:32:45","name":"[1/2] Change vec<, , vl_embed>::m_vecdata refrences into address ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224113245.9645013246@imap2.suse-dmz.suse.de/mbox/"},{"id":61279,"url":"https://patchwork.plctlab.org/api/1.2/patches/61279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224114444.7E2CE13246@imap2.suse-dmz.suse.de/","msgid":"<20230224114444.7E2CE13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T11:44:44","name":"[2/2] Avoid default-initializing auto_vec storage, fix vec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224114444.7E2CE13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61296,"url":"https://patchwork.plctlab.org/api/1.2/patches/61296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iqLkrnUsZr8eCy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-24T12:14:38","name":"[committed] i386: Update i386-builtin.def file comment description of BDESC{,_FIRST}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/iqLkrnUsZr8eCy@tucnak/mbox/"},{"id":61320,"url":"https://patchwork.plctlab.org/api/1.2/patches/61320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134622.09FCF13246@imap2.suse-dmz.suse.de/","msgid":"<20230224134622.09FCF13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T13:46:21","name":"[1/2] Change vec<, , vl_embed>::m_vecdata refrences into address ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134622.09FCF13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61321,"url":"https://patchwork.plctlab.org/api/1.2/patches/61321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134739.D386F13246@imap2.suse-dmz.suse.de/","msgid":"<20230224134739.D386F13246@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-24T13:47:39","name":"[2/2] Avoid default-initializing auto_vec storage, fix vec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224134739.D386F13246@imap2.suse-dmz.suse.de/mbox/"},{"id":61336,"url":"https://patchwork.plctlab.org/api/1.2/patches/61336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224141905.711154-1-jwakely@redhat.com/","msgid":"<20230224141905.711154-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:19:05","name":"[committed] libstdc++: Reorder dg-options before dg-do","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224141905.711154-1-jwakely@redhat.com/mbox/"},{"id":61337,"url":"https://patchwork.plctlab.org/api/1.2/patches/61337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142522.713327-1-jwakely@redhat.com/","msgid":"<20230224142522.713327-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:25:22","name":"[committed] libstdc++: Suppress warnings about use of deprecated std::aligned_storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142522.713327-1-jwakely@redhat.com/mbox/"},{"id":61338,"url":"https://patchwork.plctlab.org/api/1.2/patches/61338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-1-jwakely@redhat.com/","msgid":"<20230224142808.714075-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:04","name":"[committed,1/5] libstdc++: Optimize net::ip::address_v4::to_string()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-1-jwakely@redhat.com/mbox/"},{"id":61342,"url":"https://patchwork.plctlab.org/api/1.2/patches/61342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-2-jwakely@redhat.com/","msgid":"<20230224142808.714075-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:05","name":"[committed,2/5] libstdc++: Fix conversion to/from net::ip::address_v4::bytes_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-2-jwakely@redhat.com/mbox/"},{"id":61341,"url":"https://patchwork.plctlab.org/api/1.2/patches/61341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-3-jwakely@redhat.com/","msgid":"<20230224142808.714075-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:06","name":"[committed,3/5] libstdc++: Fix members of net::ip::network_v4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-3-jwakely@redhat.com/mbox/"},{"id":61340,"url":"https://patchwork.plctlab.org/api/1.2/patches/61340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-4-jwakely@redhat.com/","msgid":"<20230224142808.714075-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:07","name":"[committed,4/5] libstdc++: Make net::ip::basic_endpoint comparisons constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-4-jwakely@redhat.com/mbox/"},{"id":61339,"url":"https://patchwork.plctlab.org/api/1.2/patches/61339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-5-jwakely@redhat.com/","msgid":"<20230224142808.714075-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-24T14:28:08","name":"[committed,5/5] libstdc++: Constrain net::executor constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224142808.714075-5-jwakely@redhat.com/mbox/"},{"id":61369,"url":"https://patchwork.plctlab.org/api/1.2/patches/61369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151802.215659-1-juzhe.zhong@rivai.ai/","msgid":"<20230224151802.215659-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-24T15:18:02","name":"RISC-V: Add scalar move support and fix VSETVL bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151802.215659-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61370,"url":"https://patchwork.plctlab.org/api/1.2/patches/61370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151914.215909-1-juzhe.zhong@rivai.ai/","msgid":"<20230224151914.215909-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-24T15:19:14","name":"RISC-V: Add testcase for VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224151914.215909-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61394,"url":"https://patchwork.plctlab.org/api/1.2/patches/61394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224163753.8649920423@pchp3.se.axis.com/","msgid":"<20230224163753.8649920423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T16:37:53","name":"testsuite: Add -fno-ivopts to gcc.dg/Wuse-after-free-2.c, PR108828","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224163753.8649920423@pchp3.se.axis.com/mbox/"},{"id":61408,"url":"https://patchwork.plctlab.org/api/1.2/patches/61408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224175433.CF5002043D@pchp3.se.axis.com/","msgid":"<20230224175433.CF5002043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T17:54:33","name":"testsuite: Don'\''t include multiline regexps in the the pass/fail log","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224175433.CF5002043D@pchp3.se.axis.com/mbox/"},{"id":61413,"url":"https://patchwork.plctlab.org/api/1.2/patches/61413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-2-qing.zhao@oracle.com/","msgid":"<20230224183505.4112295-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-24T18:35:04","name":"[v4,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-2-qing.zhao@oracle.com/mbox/"},{"id":61414,"url":"https://patchwork.plctlab.org/api/1.2/patches/61414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-3-qing.zhao@oracle.com/","msgid":"<20230224183505.4112295-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-02-24T18:35:05","name":"[V4,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224183505.4112295-3-qing.zhao@oracle.com/mbox/"},{"id":61420,"url":"https://patchwork.plctlab.org/api/1.2/patches/61420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191603.3935F20447@pchp3.se.axis.com/","msgid":"<20230224191603.3935F20447@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T19:16:03","name":"[1/2] testsuite: Provide means to regexp in multiline patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191603.3935F20447@pchp3.se.axis.com/mbox/"},{"id":61421,"url":"https://patchwork.plctlab.org/api/1.2/patches/61421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191843.729A520444@pchp3.se.axis.com/","msgid":"<20230224191843.729A520444@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-24T19:18:43","name":"[2/2] testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-3.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230224191843.729A520444@pchp3.se.axis.com/mbox/"},{"id":61447,"url":"https://patchwork.plctlab.org/api/1.2/patches/61447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-726fb111-e89a-40c0-8abb-5ed9970c20fb-1677271105148@3c-app-gmx-bs39/","msgid":"","list_archive_url":null,"date":"2023-02-24T20:38:25","name":"[committed] Fortran: frontend passes do_subscript leaks gmp memory [PR108924]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-726fb111-e89a-40c0-8abb-5ed9970c20fb-1677271105148@3c-app-gmx-bs39/mbox/"},{"id":61456,"url":"https://patchwork.plctlab.org/api/1.2/patches/61456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr/","msgid":"<246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr>","list_archive_url":null,"date":"2023-02-24T21:21:13","name":"[pushed] fortran: Plug leak of associated_dummy memory. [PR108923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/246d8ca0-b2a0-9c32-f79d-a9b86b26a0fd@orange.fr/mbox/"},{"id":61500,"url":"https://patchwork.plctlab.org/api/1.2/patches/61500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com/","msgid":"<174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com>","list_archive_url":null,"date":"2023-02-25T09:50:33","name":"[v2] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/174972e2-3792-935b-ed4e-4e9d3d4ec26a@linux.ibm.com/mbox/"},{"id":61501,"url":"https://patchwork.plctlab.org/api/1.2/patches/61501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225100105.3477550-1-jcmvbkbc@gmail.com/","msgid":"<20230225100105.3477550-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-25T10:01:05","name":"gcc: xtensa: fix PR target/108919","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225100105.3477550-1-jcmvbkbc@gmail.com/mbox/"},{"id":61519,"url":"https://patchwork.plctlab.org/api/1.2/patches/61519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225140523.3493078-1-jcmvbkbc@gmail.com/","msgid":"<20230225140523.3493078-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-25T14:05:23","name":"[COMMITTED] gcc: xtensa: fix PR target/108919","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230225140523.3493078-1-jcmvbkbc@gmail.com/mbox/"},{"id":61528,"url":"https://patchwork.plctlab.org/api/1.2/patches/61528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr/","msgid":"<48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr>","list_archive_url":null,"date":"2023-02-25T16:35:04","name":"fortran: Reuse associated_dummy memory if previously allocated [PR108923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48878e99-0ecb-3688-0c2e-db7ec69856df@orange.fr/mbox/"},{"id":61535,"url":"https://patchwork.plctlab.org/api/1.2/patches/61535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0a55c0d-964c-4a07-bc72-e3fe5e733cb0-1677349043450@3c-app-gmx-bap72/","msgid":"","list_archive_url":null,"date":"2023-02-25T18:17:23","name":"[committed] Fortran: fix memory leak with real to integer conversion warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0a55c0d-964c-4a07-bc72-e3fe5e733cb0-1677349043450@3c-app-gmx-bap72/mbox/"},{"id":61577,"url":"https://patchwork.plctlab.org/api/1.2/patches/61577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ec9808-7f52-659f-7859-72573bb76263@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-26T06:38:58","name":"gcc.c-torture/compile/103818.c: enable for llp64 too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4ec9808-7f52-659f-7859-72573bb76263@gmail.com/mbox/"},{"id":61647,"url":"https://patchwork.plctlab.org/api/1.2/patches/61647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp/","msgid":"<76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp>","list_archive_url":null,"date":"2023-02-26T17:27:42","name":"xtensa: Make use of CLAMPS instruction if configured","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76202f6e-a28a-9132-8838-aaff0b252847@yahoo.co.jp/mbox/"},{"id":61654,"url":"https://patchwork.plctlab.org/api/1.2/patches/61654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com/","msgid":"<17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com>","list_archive_url":null,"date":"2023-02-26T19:52:43","name":"[libgfortran] Initailize some variable to get rid of nuisance warnings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17e31d5c-1579-8899-70b3-57e3115b2153@gmail.com/mbox/"},{"id":61702,"url":"https://patchwork.plctlab.org/api/1.2/patches/61702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227032223.176203-1-zhujunxian@oss.cipunited.com/","msgid":"<20230227032223.176203-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-27T03:22:45","name":"MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227032223.176203-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":61755,"url":"https://patchwork.plctlab.org/api/1.2/patches/61755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227080132.53115-1-juzhe.zhong@rivai.ai/","msgid":"<20230227080132.53115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-27T08:01:32","name":"RISC-V: Remove void_type_node of void_args for vsetvlmax intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227080132.53115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61893,"url":"https://patchwork.plctlab.org/api/1.2/patches/61893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com/","msgid":"<4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com>","list_archive_url":null,"date":"2023-02-27T09:52:38","name":"gcc.dg/overflow-warn-9.c: exclude from LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4440cdad-cf9d-1ffc-029e-3bba162eb071@gmail.com/mbox/"},{"id":61896,"url":"https://patchwork.plctlab.org/api/1.2/patches/61896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0cc9e3-5c41-2bc4-64fb-37e6902d9ef5@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T10:09:34","name":"gcc.dg/memchr-3.c: fix for LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0cc9e3-5c41-2bc4-64fb-37e6902d9ef5@gmail.com/mbox/"},{"id":61899,"url":"https://patchwork.plctlab.org/api/1.2/patches/61899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com/","msgid":"<57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com>","list_archive_url":null,"date":"2023-02-27T10:29:23","name":"c-c++-common/Warray-bounds.c: fix excess warnings on LLP64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57afdbe7-4660-ecd0-7d1c-84b59684731f@gmail.com/mbox/"},{"id":61900,"url":"https://patchwork.plctlab.org/api/1.2/patches/61900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227103225.335443-1-juzhe.zhong@rivai.ai/","msgid":"<20230227103225.335443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-02-27T10:32:25","name":"RISC-V: Add permutation C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227103225.335443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":61921,"url":"https://patchwork.plctlab.org/api/1.2/patches/61921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com/","msgid":"<9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com>","list_archive_url":null,"date":"2023-02-27T11:20:30","name":"rs6000: Inline lrint and lrintf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd11c5f-373e-bb76-233e-6574f5d53173@linux.ibm.com/mbox/"},{"id":61926,"url":"https://patchwork.plctlab.org/api/1.2/patches/61926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea889655-6dd1-d676-46b3-4227e3eece1d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T11:57:19","name":"[OG12,committed] Update dg-dump-scan for ... (was: [Patch] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea889655-6dd1-d676-46b3-4227e3eece1d@codesourcery.com/mbox/"},{"id":61929,"url":"https://patchwork.plctlab.org/api/1.2/patches/61929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227120816.3642952-1-jcmvbkbc@gmail.com/","msgid":"<20230227120816.3642952-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-27T12:08:16","name":"gcc: xtensa: add XCHAL_HAVE_{CLAMPS, DEPBITS, EXCLUSIVE, XEA3} to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227120816.3642952-1-jcmvbkbc@gmail.com/mbox/"},{"id":61931,"url":"https://patchwork.plctlab.org/api/1.2/patches/61931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7a29b9b-ccf2-e2e2-af59-9ec7c1d56876@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:15:04","name":"[v3] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7a29b9b-ccf2-e2e2-af59-9ec7c1d56876@codesourcery.com/mbox/"},{"id":61935,"url":"https://patchwork.plctlab.org/api/1.2/patches/61935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16928-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:32:39","name":"[1/4] middle-end: Revert can_special_div_by_const changes [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-16928-tamar@arm.com/mbox/"},{"id":61936,"url":"https://patchwork.plctlab.org/api/1.2/patches/61936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjDtzup8FaUIZF@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:33:18","name":"[2/4,ranger] : Add range-ops for widen addition and widen multiplication [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjDtzup8FaUIZF@arm.com/mbox/"},{"id":61937,"url":"https://patchwork.plctlab.org/api/1.2/patches/61937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjM04lLCimbeu4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:33:55","name":"[3/4] middle-end: Implement preferred_div_as_shifts_over_mult [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjM04lLCimbeu4@arm.com/mbox/"},{"id":61938,"url":"https://patchwork.plctlab.org/api/1.2/patches/61938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjTE9I4WrC4tEg@arm.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T12:34:20","name":"[4/4] AArch64 Update div-bitmask to implement new optab instead of target hook [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/yjTE9I4WrC4tEg@arm.com/mbox/"},{"id":61963,"url":"https://patchwork.plctlab.org/api/1.2/patches/61963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227135857.90EDF385842C@sourceware.org/","msgid":"<20230227135857.90EDF385842C@sourceware.org>","list_archive_url":null,"date":"2023-02-27T13:58:10","name":"Fixup possible VR_ANTI_RANGE value_range issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227135857.90EDF385842C@sourceware.org/mbox/"},{"id":61968,"url":"https://patchwork.plctlab.org/api/1.2/patches/61968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com/","msgid":"<4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com>","list_archive_url":null,"date":"2023-02-27T14:30:48","name":"[V2] Fixing PR107411","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4794643D-1A2B-428C-BA10-F5B426D262B1@oracle.com/mbox/"},{"id":61970,"url":"https://patchwork.plctlab.org/api/1.2/patches/61970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227144957.1076432-1-jwakely@redhat.com/","msgid":"<20230227144957.1076432-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-27T14:49:57","name":"[committed] libstdc++: Add Doxygen comment for string::resize_and_overwite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230227144957.1076432-1-jwakely@redhat.com/mbox/"},{"id":61972,"url":"https://patchwork.plctlab.org/api/1.2/patches/61972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com/","msgid":"<3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com>","list_archive_url":null,"date":"2023-02-27T15:11:37","name":"[rs6000] Tweak modulo define_insns to eliminate register copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cad2a5e-dd68-2fbe-d52b-e077a7405623@linux.ibm.com/mbox/"},{"id":61974,"url":"https://patchwork.plctlab.org/api/1.2/patches/61974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/zI+Vt0kL68AFHm@guest.guest/","msgid":"","list_archive_url":null,"date":"2023-02-27T15:15:05","name":"[ada] fix unknown type name '\''cpu_set_t'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/zI+Vt0kL68AFHm@guest.guest/mbox/"},{"id":62136,"url":"https://patchwork.plctlab.org/api/1.2/patches/62136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-372da1da-70c8-453d-881b-e0f4a0ec0704-1677531278062@3c-app-gmx-bap31/","msgid":"","list_archive_url":null,"date":"2023-02-27T20:54:38","name":"Fortran: fix corner case of IBITS intrinsic [PR108937]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-372da1da-70c8-453d-881b-e0f4a0ec0704-1677531278062@3c-app-gmx-bap31/mbox/"},{"id":62140,"url":"https://patchwork.plctlab.org/api/1.2/patches/62140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yv=nDsbvSbsUxOnu3eBjF4hrQfcQ72YuM7Vn8Em+QLaA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-27T21:12:30","name":"i386: Do not constrain fmod and remainder patterns with flag_finite_math_only [PR108922]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yv=nDsbvSbsUxOnu3eBjF4hrQfcQ72YuM7Vn8Em+QLaA@mail.gmail.com/mbox/"},{"id":62223,"url":"https://patchwork.plctlab.org/api/1.2/patches/62223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228011421.CC1E220441@pchp3.se.axis.com/","msgid":"<20230228011421.CC1E220441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:14:21","name":"[COMMITTED] testsuite: Add CRIS to targets not xfailing gcc.dg/attr-alloc_size-11.c:50, 51","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228011421.CC1E220441@pchp3.se.axis.com/mbox/"},{"id":62224,"url":"https://patchwork.plctlab.org/api/1.2/patches/62224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012423.D1B7420433@pchp3.se.axis.com/","msgid":"<20230228012423.D1B7420433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:24:23","name":"[COMMITTED] testsuite: Remove xfail gcc.dg/tree-ssa/pr91091-2.c RHS ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012423.D1B7420433@pchp3.se.axis.com/mbox/"},{"id":62226,"url":"https://patchwork.plctlab.org/api/1.2/patches/62226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012714.1C78E2043D@pchp3.se.axis.com/","msgid":"<20230228012714.1C78E2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:27:14","name":"[COMMITTED] testsuite: Shorten multiline pattern message to the same for fail and pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228012714.1C78E2043D@pchp3.se.axis.com/mbox/"},{"id":62227,"url":"https://patchwork.plctlab.org/api/1.2/patches/62227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228013137.4A8D02042E@pchp3.se.axis.com/","msgid":"<20230228013137.4A8D02042E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T01:31:37","name":"[COMMITTED] testsuite: No xfail infoleak-vfio_iommu_type1.c bogus for default_packed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228013137.4A8D02042E@pchp3.se.axis.com/mbox/"},{"id":62231,"url":"https://patchwork.plctlab.org/api/1.2/patches/62231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com/","msgid":"<1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com>","list_archive_url":null,"date":"2023-02-28T02:31:31","name":"[PATCHv2,rs6000] Merge two vector shift when their sources are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d7afca5-9434-6698-e695-d3e7b44fe562@linux.ibm.com/mbox/"},{"id":62259,"url":"https://patchwork.plctlab.org/api/1.2/patches/62259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228043250.212566-1-zhujunxian@oss.cipunited.com/","msgid":"<20230228043250.212566-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T04:33:13","name":"MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228043250.212566-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":62260,"url":"https://patchwork.plctlab.org/api/1.2/patches/62260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e02e0971-79db-45f2-af77-8a53fb4c4efa.sinan.lin@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-02-28T04:36:15","name":"RISC-V: Allow const0_rtx operand in max/min","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e02e0971-79db-45f2-af77-8a53fb4c4efa.sinan.lin@linux.alibaba.com/mbox/"},{"id":62266,"url":"https://patchwork.plctlab.org/api/1.2/patches/62266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228050036.30601-1-mynameisxiaou@gmail.com/","msgid":"<20230228050036.30601-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-02-28T05:00:36","name":"RISC-V: Fix wrong partial subreg check for bsetidisi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228050036.30601-1-mynameisxiaou@gmail.com/mbox/"},{"id":62321,"url":"https://patchwork.plctlab.org/api/1.2/patches/62321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/21AVDEBex5vqmc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T08:02:09","name":"lto: Fix up lto_fixup_prevailing_type [PR108910]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/21AVDEBex5vqmc@tucnak/mbox/"},{"id":62332,"url":"https://patchwork.plctlab.org/api/1.2/patches/62332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/26yg4fJ89wguAN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T08:26:50","name":"ubsan: Honor -fstrict-flex-arrays= in -fsanitize=bounds [PR108894]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/26yg4fJ89wguAN@tucnak/mbox/"},{"id":62355,"url":"https://patchwork.plctlab.org/api/1.2/patches/62355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228092332.222487-1-zhujunxian@oss.cipunited.com/","msgid":"<20230228092332.222487-1-zhujunxian@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T09:24:34","name":"[v2] MIPS: Add buildtime option to set msa default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228092332.222487-1-zhujunxian@oss.cipunited.com/mbox/"},{"id":62387,"url":"https://patchwork.plctlab.org/api/1.2/patches/62387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095042.1192997-1-jwakely@redhat.com/","msgid":"<20230228095042.1192997-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:42","name":"[committed] libstdc++: Add likely/unlikely attributes to implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095042.1192997-1-jwakely@redhat.com/mbox/"},{"id":62388,"url":"https://patchwork.plctlab.org/api/1.2/patches/62388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095048.1193075-1-jwakely@redhat.com/","msgid":"<20230228095048.1193075-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:48","name":"[committed] libstdc++: Do not use memmove for 1-element ranges [PR108846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095048.1193075-1-jwakely@redhat.com/mbox/"},{"id":62386,"url":"https://patchwork.plctlab.org/api/1.2/patches/62386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095053.1193118-1-jwakely@redhat.com/","msgid":"<20230228095053.1193118-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T09:50:53","name":"[committed] libstdc++: Fix uses_allocator_construction_args for pair [PR108952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228095053.1193118-1-jwakely@redhat.com/mbox/"},{"id":62390,"url":"https://patchwork.plctlab.org/api/1.2/patches/62390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/3RuhY7f0bkoZA+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-02-28T10:04:42","name":"c++: Emit fundamental tinfos for all _Float*/decltype(0.0bf16) types unconditionally [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/3RuhY7f0bkoZA+@tucnak/mbox/"},{"id":62393,"url":"https://patchwork.plctlab.org/api/1.2/patches/62393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228101941.170726-1-xin.liu@oss.cipunited.com/","msgid":"<20230228101941.170726-1-xin.liu@oss.cipunited.com>","list_archive_url":null,"date":"2023-02-28T10:24:21","name":"MIPS: Bugfix for fix Dejagnu issues with RTL checking enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228101941.170726-1-xin.liu@oss.cipunited.com/mbox/"},{"id":62478,"url":"https://patchwork.plctlab.org/api/1.2/patches/62478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com/","msgid":"<437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com>","list_archive_url":null,"date":"2023-02-28T13:06:43","name":"OpenMP: Ignore side-effects when finding struct comps [PR108545]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/437597e7-a9ee-f6f1-3490-dd4e75ee13de@codesourcery.com/mbox/"},{"id":62492,"url":"https://patchwork.plctlab.org/api/1.2/patches/62492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134718.2C43413440@imap2.suse-dmz.suse.de/","msgid":"<20230228134718.2C43413440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:17","name":"[1/5] fix anti-range dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134718.2C43413440@imap2.suse-dmz.suse.de/mbox/"},{"id":62493,"url":"https://patchwork.plctlab.org/api/1.2/patches/62493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134725.02E8813440@imap2.suse-dmz.suse.de/","msgid":"<20230228134725.02E8813440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:24","name":"[2/5] fend off anti-ranges from value-range-storage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134725.02E8813440@imap2.suse-dmz.suse.de/mbox/"},{"id":62496,"url":"https://patchwork.plctlab.org/api/1.2/patches/62496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134733.417D113440@imap2.suse-dmz.suse.de/","msgid":"<20230228134733.417D113440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:32","name":"[3/5] Avoid upper/lower_bound (1) on VR_ANTI_RANGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134733.417D113440@imap2.suse-dmz.suse.de/mbox/"},{"id":62497,"url":"https://patchwork.plctlab.org/api/1.2/patches/62497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134739.E030413440@imap2.suse-dmz.suse.de/","msgid":"<20230228134739.E030413440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:39","name":"[4/5] Sanitize irange::num_pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134739.E030413440@imap2.suse-dmz.suse.de/mbox/"},{"id":62495,"url":"https://patchwork.plctlab.org/api/1.2/patches/62495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134748.07F8D13440@imap2.suse-dmz.suse.de/","msgid":"<20230228134748.07F8D13440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-02-28T13:47:47","name":"[5/5] Sanitize legacy_{lower,upper}_bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228134748.07F8D13440@imap2.suse-dmz.suse.de/mbox/"},{"id":62500,"url":"https://patchwork.plctlab.org/api/1.2/patches/62500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-1-jcmvbkbc@gmail.com/","msgid":"<20230228135136.3727643-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-28T13:51:35","name":"[1/2] gcc: xtensa: add data alignment properties to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-1-jcmvbkbc@gmail.com/mbox/"},{"id":62499,"url":"https://patchwork.plctlab.org/api/1.2/patches/62499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-2-jcmvbkbc@gmail.com/","msgid":"<20230228135136.3727643-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-02-28T13:51:36","name":"[2/2] gcc: xtensa: adjust STRICT_ALIGNMENT per hardware capabilities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228135136.3727643-2-jcmvbkbc@gmail.com/mbox/"},{"id":62545,"url":"https://patchwork.plctlab.org/api/1.2/patches/62545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com/","msgid":"<452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com>","list_archive_url":null,"date":"2023-02-28T16:18:25","name":"OpenMP/Fortran: Fix handling of optional is_device_ptr + bind(C) [PR108546]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/452ab67b-34f5-d816-436d-33f8f9ac44d4@codesourcery.com/mbox/"},{"id":62578,"url":"https://patchwork.plctlab.org/api/1.2/patches/62578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184735.24E6E20438@pchp3.se.axis.com/","msgid":"<20230228184735.24E6E20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T18:47:35","name":"[1/2] testsuite: Fix analyzer errors for newlib-errno","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184735.24E6E20438@pchp3.se.axis.com/mbox/"},{"id":62579,"url":"https://patchwork.plctlab.org/api/1.2/patches/62579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184958.4992D20438@pchp3.se.axis.com/","msgid":"<20230228184958.4992D20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-02-28T18:49:58","name":"[2/2] testsuite: Fix analyzer errors for newlib-fd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228184958.4992D20438@pchp3.se.axis.com/mbox/"},{"id":62609,"url":"https://patchwork.plctlab.org/api/1.2/patches/62609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228211414.1374620-1-jwakely@redhat.com/","msgid":"<20230228211414.1374620-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-02-28T21:14:14","name":"[wwwdocs] Document synchronized_value addition to libstdc++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230228211414.1374620-1-jwakely@redhat.com/mbox/"},{"id":62675,"url":"https://patchwork.plctlab.org/api/1.2/patches/62675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f85990b0-1a7a-bc17-50c1-ef176cbd0dae@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-02-28T23:01:20","name":"amdgcn: Enable SIMD vectorization of math functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f85990b0-1a7a-bc17-50c1-ef176cbd0dae@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-02/mbox/"},{"id":18,"url":"https://patchwork.plctlab.org/api/1.2/bundles/18/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-03/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-03","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":62702,"url":"https://patchwork.plctlab.org/api/1.2/patches/62702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301014611.26707-1-wangfeng@eswincomputing.com/","msgid":"<20230301014611.26707-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-01T01:46:11","name":"RISC-V: Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301014611.26707-1-wangfeng@eswincomputing.com/mbox/"},{"id":62762,"url":"https://patchwork.plctlab.org/api/1.2/patches/62762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d17b718e-24a7-cffb-cbec-e76857db2753@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T05:54:22","name":"rs6000/test: Adjust two bfp test cases with has_arch_ppc64 [PR108729]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d17b718e-24a7-cffb-cbec-e76857db2753@linux.ibm.com/mbox/"},{"id":62763,"url":"https://patchwork.plctlab.org/api/1.2/patches/62763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com/","msgid":"<3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:55:08","name":"rs6000/test: Adjust scalar-test-neg-8.c with lp64 [PR108730]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d617c32-0601-36d8-259a-d63ab15cf986@linux.ibm.com/mbox/"},{"id":62764,"url":"https://patchwork.plctlab.org/api/1.2/patches/62764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6303ed9-5ba8-ac10-719c-9eb2a414d5f4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T05:55:53","name":"rs6000/test: Adjust fold-vec-extract-double.p9.c for BE [PR108810]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6303ed9-5ba8-ac10-719c-9eb2a414d5f4@linux.ibm.com/mbox/"},{"id":62765,"url":"https://patchwork.plctlab.org/api/1.2/patches/62765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com/","msgid":"<9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:56:20","name":"rs6000/test: Adjust pr101384-2.c for P9 [PR108813]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c5c7fe6-e6bb-4724-79d7-224cf1bb385e@linux.ibm.com/mbox/"},{"id":62766,"url":"https://patchwork.plctlab.org/api/1.2/patches/62766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com/","msgid":"<4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com>","list_archive_url":null,"date":"2023-03-01T05:56:48","name":"rs6000/test: Adjust scalar-test-data-class-1[45].c with int128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4218a26e-d277-01b7-a7cd-a9d2f7cc6ba8@linux.ibm.com/mbox/"},{"id":62773,"url":"https://patchwork.plctlab.org/api/1.2/patches/62773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4d05663-57a2-40be-3fba-270239b52ee0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T07:09:56","name":"[gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4d05663-57a2-40be-3fba-270239b52ee0@linux.ibm.com/mbox/"},{"id":62777,"url":"https://patchwork.plctlab.org/api/1.2/patches/62777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301073810.627043858C30@sourceware.org/","msgid":"<20230301073810.627043858C30@sourceware.org>","list_archive_url":null,"date":"2023-03-01T07:37:18","name":"tree-optimization/108950 - widen-sum reduction ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301073810.627043858C30@sourceware.org/mbox/"},{"id":62794,"url":"https://patchwork.plctlab.org/api/1.2/patches/62794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301091029.A10C13858430@sourceware.org/","msgid":"<20230301091029.A10C13858430@sourceware.org>","list_archive_url":null,"date":"2023-03-01T09:09:34","name":"tree-optimization/108970 - ICE with vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301091029.A10C13858430@sourceware.org/mbox/"},{"id":62797,"url":"https://patchwork.plctlab.org/api/1.2/patches/62797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8Wyr196+cnqxrX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:11:38","name":"cfgexpand: Handle WIDEN_{PLUS,MINUS}_EXPR and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR in expand_debug_expr [PR108967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8Wyr196+cnqxrX@tucnak/mbox/"},{"id":62808,"url":"https://patchwork.plctlab.org/api/1.2/patches/62808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8YtP5QiQzQ9spF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:19:48","name":"c++, v2: Emit fundamental tinfos for all _Float*/decltype(0.0bf16) types unconditionally [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8YtP5QiQzQ9spF@tucnak/mbox/"},{"id":62834,"url":"https://patchwork.plctlab.org/api/1.2/patches/62834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8htiwLe6udGBN5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-01T09:58:14","name":"[committed] ubsan: Add another testcase for [0] array in the middle of struct [PR108894]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Y/8htiwLe6udGBN5@tucnak/mbox/"},{"id":62854,"url":"https://patchwork.plctlab.org/api/1.2/patches/62854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301113512.1544598-1-raj.khem@gmail.com/","msgid":"<20230301113512.1544598-1-raj.khem@gmail.com>","list_archive_url":null,"date":"2023-03-01T11:35:12","name":"Cpp: honor sysroot location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301113512.1544598-1-raj.khem@gmail.com/mbox/"},{"id":62882,"url":"https://patchwork.plctlab.org/api/1.2/patches/62882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9664e8-65e9-00ef-25c4-4766fd70e12e@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-03-01T12:51:02","name":"update copyright year in libstdcc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9664e8-65e9-00ef-25c4-4766fd70e12e@jguk.org/mbox/"},{"id":62883,"url":"https://patchwork.plctlab.org/api/1.2/patches/62883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org/","msgid":"<73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org>","list_archive_url":null,"date":"2023-03-01T12:53:18","name":"Bugzilla Bug 81649 [PATCH]: Clarify LeakSanitizer in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73790291-35fa-df87-38a5-7fcb6cd7d1cf@jguk.org/mbox/"},{"id":62884,"url":"https://patchwork.plctlab.org/api/1.2/patches/62884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org/","msgid":"<85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org>","list_archive_url":null,"date":"2023-03-01T12:54:10","name":"[PATCHJ] : Bugzilla 88860 - Clarify online manual infelicities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85f1c762-b348-4bdd-2265-24b04643c8e0@jguk.org/mbox/"},{"id":62896,"url":"https://patchwork.plctlab.org/api/1.2/patches/62896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301130749.9A7B03858401@sourceware.org/","msgid":"<20230301130749.9A7B03858401@sourceware.org>","list_archive_url":null,"date":"2023-03-01T13:07:02","name":"debug/108772 - ICE with late debug generated with -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301130749.9A7B03858401@sourceware.org/mbox/"},{"id":62908,"url":"https://patchwork.plctlab.org/api/1.2/patches/62908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301141033.2578200-1-dmalcolm@redhat.com/","msgid":"<20230301141033.2578200-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-01T14:10:33","name":"[pushed] analyzer: fix infinite recursion false +ves [PR108935]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301141033.2578200-1-dmalcolm@redhat.com/mbox/"},{"id":62980,"url":"https://patchwork.plctlab.org/api/1.2/patches/62980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com/","msgid":"<1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com>","list_archive_url":null,"date":"2023-03-01T16:56:51","name":"amdgcn: Add instruction patterns for conditional min/max operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f1f9f15-e12e-ec4e-7b74-ba7bf3b64449@codesourcery.com/mbox/"},{"id":63017,"url":"https://patchwork.plctlab.org/api/1.2/patches/63017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-2-xry111@xry111.site/","msgid":"<20230301180720.26514-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:13","name":"[1/8] aarch64: testsuite: disable PIE for aapcs64 tests [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-2-xry111@xry111.site/mbox/"},{"id":63022,"url":"https://patchwork.plctlab.org/api/1.2/patches/63022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-3-xry111@xry111.site/","msgid":"<20230301180720.26514-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:14","name":"[2/8] aarch64: testsuite: disable PIE for tests with large code model [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-3-xry111@xry111.site/mbox/"},{"id":63020,"url":"https://patchwork.plctlab.org/api/1.2/patches/63020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-4-xry111@xry111.site/","msgid":"<20230301180720.26514-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:15","name":"[3/8] aarch64: testsuite: disable PIE for fuse_adrp_add_1.c [PR70150]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-4-xry111@xry111.site/mbox/"},{"id":63018,"url":"https://patchwork.plctlab.org/api/1.2/patches/63018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-5-xry111@xry111.site/","msgid":"<20230301180720.26514-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:16","name":"[4/8] aarch64: testsuite: disable stack protector for sve-pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-5-xry111@xry111.site/mbox/"},{"id":63023,"url":"https://patchwork.plctlab.org/api/1.2/patches/63023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-6-xry111@xry111.site/","msgid":"<20230301180720.26514-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:17","name":"[5/8] aarch64: testsuite: disable stack protector for pr103147-10 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-6-xry111@xry111.site/mbox/"},{"id":63019,"url":"https://patchwork.plctlab.org/api/1.2/patches/63019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-7-xry111@xry111.site/","msgid":"<20230301180720.26514-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:18","name":"[6/8] aarch64: testsuite: disable stack protector for auto-init-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-7-xry111@xry111.site/mbox/"},{"id":63021,"url":"https://patchwork.plctlab.org/api/1.2/patches/63021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-8-xry111@xry111.site/","msgid":"<20230301180720.26514-8-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:19","name":"[7/8] aarch64: testsuite: disable stack protector for pr104005.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-8-xry111@xry111.site/mbox/"},{"id":63025,"url":"https://patchwork.plctlab.org/api/1.2/patches/63025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-9-xry111@xry111.site/","msgid":"<20230301180720.26514-9-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-01T18:07:20","name":"[8/8] aarch64: testsuite: disable stack protector for tests relying on stack offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301180720.26514-9-xry111@xry111.site/mbox/"},{"id":63024,"url":"https://patchwork.plctlab.org/api/1.2/patches/63024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn4Gk3_pB8K1SsXNzCyWMVGGs4jOtO1_L=L+qBpkDtqHg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-01T18:07:43","name":"libiberty: fix memory leak in pex-win32.c and refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn4Gk3_pB8K1SsXNzCyWMVGGs4jOtO1_L=L+qBpkDtqHg@mail.gmail.com/mbox/"},{"id":63049,"url":"https://patchwork.plctlab.org/api/1.2/patches/63049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301195315.1793087-1-vineetg@rivosinc.com/","msgid":"<20230301195315.1793087-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-03-01T19:53:15","name":"RISC-V: costs: miscomputed shiftadd_cost triggering synth_mult [PR/108987]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301195315.1793087-1-vineetg@rivosinc.com/mbox/"},{"id":63085,"url":"https://patchwork.plctlab.org/api/1.2/patches/63085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301203308.405645-1-polacek@redhat.com/","msgid":"<20230301203308.405645-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-01T20:33:08","name":"c++: ICE with -Wmismatched-tags and member template [PR106259]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301203308.405645-1-polacek@redhat.com/mbox/"},{"id":63097,"url":"https://patchwork.plctlab.org/api/1.2/patches/63097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212637.1481240-1-jwakely@redhat.com/","msgid":"<20230301212637.1481240-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-01T21:26:37","name":"[committed] libstdc++: Make std::chrono::current_zone() default to UTC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212637.1481240-1-jwakely@redhat.com/mbox/"},{"id":63098,"url":"https://patchwork.plctlab.org/api/1.2/patches/63098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212645.1481272-1-jwakely@redhat.com/","msgid":"<20230301212645.1481272-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-01T21:26:45","name":"[committed] libstdc++: Fix typo in comment in bits/cow_string.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301212645.1481272-1-jwakely@redhat.com/mbox/"},{"id":63099,"url":"https://patchwork.plctlab.org/api/1.2/patches/63099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222856.12300c64@nbbrfq/","msgid":"<20230301222856.12300c64@nbbrfq>","list_archive_url":null,"date":"2023-03-01T21:28:56","name":"[stage1] Remove conditionals around free()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222856.12300c64@nbbrfq/mbox/"},{"id":63107,"url":"https://patchwork.plctlab.org/api/1.2/patches/63107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222847.2606616-1-dmalcolm@redhat.com/","msgid":"<20230301222847.2606616-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-01T22:28:47","name":"[pushed] analyzer: fixes to side-effects for built-in functions [PR107565]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301222847.2606616-1-dmalcolm@redhat.com/mbox/"},{"id":63113,"url":"https://patchwork.plctlab.org/api/1.2/patches/63113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301232500.2622240-1-apinski@marvell.com/","msgid":"<20230301232500.2622240-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-01T23:25:00","name":"Fix PR 108980: note without warning due to array bounds check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230301232500.2622240-1-apinski@marvell.com/mbox/"},{"id":63153,"url":"https://patchwork.plctlab.org/api/1.2/patches/63153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012003.6A0D52040C@pchp3.se.axis.com/","msgid":"<20230302012003.6A0D52040C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-02T01:20:03","name":"[COMMITTED] testsuite: Fix gcc.dg/attr-copy-6.c for user-label-prefixed targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012003.6A0D52040C@pchp3.se.axis.com/mbox/"},{"id":63154,"url":"https://patchwork.plctlab.org/api/1.2/patches/63154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012552.279FF20433@pchp3.se.axis.com/","msgid":"<20230302012552.279FF20433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-02T01:25:52","name":"[COMMITTED] testsuite: Fix g++.dg/ext/attr-copy-2.C for default_packed targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302012552.279FF20433@pchp3.se.axis.com/mbox/"},{"id":63175,"url":"https://patchwork.plctlab.org/api/1.2/patches/63175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-1-xionghuluo@tencent.com/","msgid":"<20230302022921.4055291-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-02T02:29:20","name":"[1/2] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-1-xionghuluo@tencent.com/mbox/"},{"id":63174,"url":"https://patchwork.plctlab.org/api/1.2/patches/63174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-2-xionghuluo@tencent.com/","msgid":"<20230302022921.4055291-2-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-02T02:29:21","name":"[2/2] gcov: Fix incorrect gimple line LOCATION [PR97923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302022921.4055291-2-xionghuluo@tencent.com/mbox/"},{"id":63235,"url":"https://patchwork.plctlab.org/api/1.2/patches/63235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302055538.730932-1-pan2.li@intel.com/","msgid":"<20230302055538.730932-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-02T05:55:38","name":"[v2] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302055538.730932-1-pan2.li@intel.com/mbox/"},{"id":63261,"url":"https://patchwork.plctlab.org/api/1.2/patches/63261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302074134.721DE33E59@hamza.pair.com/","msgid":"<20230302074134.721DE33E59@hamza.pair.com>","list_archive_url":null,"date":"2023-03-02T07:41:31","name":"[pushed] wwwdocs: testing: Avoid a duplicate link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302074134.721DE33E59@hamza.pair.com/mbox/"},{"id":63264,"url":"https://patchwork.plctlab.org/api/1.2/patches/63264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080152.96006-1-juzhe.zhong@rivai.ai/","msgid":"<20230302080152.96006-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-02T08:01:52","name":"RISC-V: Add RVV misc intrinsic support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080152.96006-1-juzhe.zhong@rivai.ai/mbox/"},{"id":63265,"url":"https://patchwork.plctlab.org/api/1.2/patches/63265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080535.4F7203858000@sourceware.org/","msgid":"<20230302080535.4F7203858000@sourceware.org>","list_archive_url":null,"date":"2023-03-02T08:04:49","name":"testsuite/108985 - missing vect_simd_clones target requirement on test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302080535.4F7203858000@sourceware.org/mbox/"},{"id":63266,"url":"https://patchwork.plctlab.org/api/1.2/patches/63266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABZgZ7jX0HX/up2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T08:08:33","name":"[committed] openmp: Fix up error recovery for invalid structured bindings in OpenMP range for loops [PR105839]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABZgZ7jX0HX/up2@tucnak/mbox/"},{"id":63270,"url":"https://patchwork.plctlab.org/api/1.2/patches/63270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABdUSaG8Dw/avH7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T08:24:49","name":"fold-const: Ignore padding bits in native_interpret_expr REAL_CST reverse verification [PR108934]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZABdUSaG8Dw/avH7@tucnak/mbox/"},{"id":63271,"url":"https://patchwork.plctlab.org/api/1.2/patches/63271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-2-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:26","name":"[v4,1/9] riscv: Add basic XThead* vendor extension support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-2-christoph.muellner@vrull.eu/mbox/"},{"id":63272,"url":"https://patchwork.plctlab.org/api/1.2/patches/63272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-3-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:27","name":"[v4,2/9] riscv: riscv-cores.def: Add T-Head XuanTie C906","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-3-christoph.muellner@vrull.eu/mbox/"},{"id":63274,"url":"https://patchwork.plctlab.org/api/1.2/patches/63274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-4-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:28","name":"[v4,3/9] riscv: thead: Add support for the XTheadBa ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-4-christoph.muellner@vrull.eu/mbox/"},{"id":63273,"url":"https://patchwork.plctlab.org/api/1.2/patches/63273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-5-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:29","name":"[v4,4/9] riscv: thead: Add support for the XTheadBs ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-5-christoph.muellner@vrull.eu/mbox/"},{"id":63275,"url":"https://patchwork.plctlab.org/api/1.2/patches/63275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-6-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:30","name":"[v4,5/9] riscv: thead: Add support for the XTheadBb ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-6-christoph.muellner@vrull.eu/mbox/"},{"id":63276,"url":"https://patchwork.plctlab.org/api/1.2/patches/63276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-7-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:31","name":"[v4,6/9] riscv: thead: Add support for the XTheadCondMov ISA extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-7-christoph.muellner@vrull.eu/mbox/"},{"id":63278,"url":"https://patchwork.plctlab.org/api/1.2/patches/63278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-8-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:32","name":"[v4,7/9] riscv: thead: Add support for the XTheadMac ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-8-christoph.muellner@vrull.eu/mbox/"},{"id":63277,"url":"https://patchwork.plctlab.org/api/1.2/patches/63277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-9-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:33","name":"[v4,8/9] riscv: thead: Add support for the XTheadFmv ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-9-christoph.muellner@vrull.eu/mbox/"},{"id":63279,"url":"https://patchwork.plctlab.org/api/1.2/patches/63279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-10-christoph.muellner@vrull.eu/","msgid":"<20230302083534.4076244-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-02T08:35:34","name":"[v4,9/9] riscv: thead: Add support for the XTheadMemPair ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302083534.4076244-10-christoph.muellner@vrull.eu/mbox/"},{"id":63329,"url":"https://patchwork.plctlab.org/api/1.2/patches/63329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzzzlalx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:18:50","name":"vect: Fix voluntarily-masked negative conditionals [PR108430]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzzzlalx.fsf@arm.com/mbox/"},{"id":63330,"url":"https://patchwork.plctlab.org/api/1.2/patches/63330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedq7lai9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:21:02","name":"Avoid creating (const (reg ...)) [PR108603]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedq7lai9.fsf@arm.com/mbox/"},{"id":63331,"url":"https://patchwork.plctlab.org/api/1.2/patches/63331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAB7TAwFGPoJJqHT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T10:32:44","name":"[wwwdocs] gcc-13/porting_to.html: Document C++ -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAB7TAwFGPoJJqHT@tucnak/mbox/"},{"id":63359,"url":"https://patchwork.plctlab.org/api/1.2/patches/63359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACGi5t6N65DipZA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T11:20:43","name":"c++, v3: Emit fundamental tinfos for _Float16/decltype(0.0bf16) types on ia32 with -mno-sse2 [PR108883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACGi5t6N65DipZA@tucnak/mbox/"},{"id":63374,"url":"https://patchwork.plctlab.org/api/1.2/patches/63374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACMogsrU0vpmQ1S@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T11:46:42","name":"wwwdocs: Document several further C++23 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZACMogsrU0vpmQ1S@tucnak/mbox/"},{"id":63421,"url":"https://patchwork.plctlab.org/api/1.2/patches/63421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302132917.2668B3858425@sourceware.org/","msgid":"<20230302132917.2668B3858425@sourceware.org>","list_archive_url":null,"date":"2023-03-02T13:28:27","name":"target/108738 - limit STV chain discovery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302132917.2668B3858425@sourceware.org/mbox/"},{"id":63427,"url":"https://patchwork.plctlab.org/api/1.2/patches/63427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt4vi5xm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T14:28:05","name":"vect: Don'\''t apply masks to operations on invariants [PR108979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt4vi5xm.fsf@arm.com/mbox/"},{"id":63464,"url":"https://patchwork.plctlab.org/api/1.2/patches/63464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302152450.1486452-1-stefansf@linux.ibm.com/","msgid":"<20230302152450.1486452-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T15:24:51","name":"s390: libatomic: Fix 16 byte atomic {cas,load,store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302152450.1486452-1-stefansf@linux.ibm.com/mbox/"},{"id":63471,"url":"https://patchwork.plctlab.org/api/1.2/patches/63471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302160122.47573-1-xry111@xry111.site/","msgid":"<20230302160122.47573-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-02T16:01:22","name":"LoongArch: Stop -mfpu from silently breaking ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302160122.47573-1-xry111@xry111.site/mbox/"},{"id":63509,"url":"https://patchwork.plctlab.org/api/1.2/patches/63509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com/","msgid":"<3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T18:13:52","name":"s390: Fix ifcvt test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d239f06-9289-b54b-515f-f77ba69c07fe@linux.ibm.com/mbox/"},{"id":63511,"url":"https://patchwork.plctlab.org/api/1.2/patches/63511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com/","msgid":"<48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com>","list_archive_url":null,"date":"2023-03-02T18:17:07","name":"s390: Use arch14 instead of z16 for -march=native.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48c22834-67a6-8dae-6f57-7a5882a69c65@linux.ibm.com/mbox/"},{"id":63513,"url":"https://patchwork.plctlab.org/api/1.2/patches/63513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8a19eff-30e9-434d-8780-d21ff877864e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T18:23:32","name":"testsuite: Do not expect partial vectorization for s390.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8a19eff-30e9-434d-8780-d21ff877864e@linux.ibm.com/mbox/"},{"id":63522,"url":"https://patchwork.plctlab.org/api/1.2/patches/63522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302191048.2657370-1-dmalcolm@redhat.com/","msgid":"<20230302191048.2657370-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-02T19:10:48","name":"[pushed] analyzer: fix uninit false +ves reading from DECL_HARD_REGISTER [PR108968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302191048.2657370-1-dmalcolm@redhat.com/mbox/"},{"id":63524,"url":"https://patchwork.plctlab.org/api/1.2/patches/63524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnvvm=9dvGFYebmKw_jo+S7NfmWERb0ZWNOsYiCaX+ynA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T19:25:08","name":"driver: Treat include path args the same way between cpp_unique_options and asm_options. [PR71850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnvvm=9dvGFYebmKw_jo+S7NfmWERb0ZWNOsYiCaX+ynA@mail.gmail.com/mbox/"},{"id":63583,"url":"https://patchwork.plctlab.org/api/1.2/patches/63583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302205614.1564709-1-jwakely@redhat.com/","msgid":"<20230302205614.1564709-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-02T20:56:14","name":"[wwwdocs] Document allocator_traits::rebind_alloc assertion with GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302205614.1564709-1-jwakely@redhat.com/mbox/"},{"id":63600,"url":"https://patchwork.plctlab.org/api/1.2/patches/63600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b92172eb-3e6e-401c-82e2-f5e1b3cee6b2-1677794628453@3c-app-gmx-bs40/","msgid":"","list_archive_url":null,"date":"2023-03-02T22:03:48","name":"Fortran: fix CLASS attribute handling [PR106856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b92172eb-3e6e-401c-82e2-f5e1b3cee6b2-1677794628453@3c-app-gmx-bs40/mbox/"},{"id":63613,"url":"https://patchwork.plctlab.org/api/1.2/patches/63613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eabba3ca-4199-a893-0b16-99e2680bf553@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-02T22:22:57","name":"[pushed,PR90706] IRA: Use minimal cost for hard register movement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eabba3ca-4199-a893-0b16-99e2680bf553@redhat.com/mbox/"},{"id":63650,"url":"https://patchwork.plctlab.org/api/1.2/patches/63650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302230703.2234902-1-lhyatt@gmail.com/","msgid":"<20230302230703.2234902-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-03-02T23:07:03","name":"[v2] libcpp: Handle extended characters in user-defined literal suffix [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230302230703.2234902-1-lhyatt@gmail.com/mbox/"},{"id":63669,"url":"https://patchwork.plctlab.org/api/1.2/patches/63669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAE2uhyk3ens4RXy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-02T23:52:26","name":"[committed] testsuite: Fix up memchr-3.c test [PR108991]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAE2uhyk3ens4RXy@tucnak/mbox/"},{"id":63683,"url":"https://patchwork.plctlab.org/api/1.2/patches/63683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001351.4145614-1-ibuclaw@gdcproject.org/","msgid":"<20230303001351.4145614-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:13:51","name":"[committed] d: Add test for PR d/108167 to the testsuite [PR108167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001351.4145614-1-ibuclaw@gdcproject.org/mbox/"},{"id":63685,"url":"https://patchwork.plctlab.org/api/1.2/patches/63685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001742.4148863-1-ibuclaw@gdcproject.org/","msgid":"<20230303001742.4148863-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:17:42","name":"[committed] d: Allow vectors to be compared for identity (PR108946)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303001742.4148863-1-ibuclaw@gdcproject.org/mbox/"},{"id":63687,"url":"https://patchwork.plctlab.org/api/1.2/patches/63687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002202.4152119-1-ibuclaw@gdcproject.org/","msgid":"<20230303002202.4152119-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:22:02","name":"[committed] d: Fix ICE on explicit immutable struct import [PR10887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002202.4152119-1-ibuclaw@gdcproject.org/mbox/"},{"id":63688,"url":"https://patchwork.plctlab.org/api/1.2/patches/63688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002411.4153820-1-ibuclaw@gdcproject.org/","msgid":"<20230303002411.4153820-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T00:24:11","name":"[committed] d: vector float comparison doesn'\''t result in 0 or -1 [PR108945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303002411.4153820-1-ibuclaw@gdcproject.org/mbox/"},{"id":63725,"url":"https://patchwork.plctlab.org/api/1.2/patches/63725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303023141.125126-1-pan2.li@intel.com/","msgid":"<20230303023141.125126-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-03T02:31:41","name":"[v3] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303023141.125126-1-pan2.li@intel.com/mbox/"},{"id":63752,"url":"https://patchwork.plctlab.org/api/1.2/patches/63752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0790eac-0656-ed9c-5426-9e83d786ff30@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:52:42","name":"[01/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0790eac-0656-ed9c-5426-9e83d786ff30@rivosinc.com/mbox/"},{"id":63753,"url":"https://patchwork.plctlab.org/api/1.2/patches/63753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6305e96-ff71-cde6-9b91-4333489a47ed@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:52:55","name":"[02/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6305e96-ff71-cde6-9b91-4333489a47ed@rivosinc.com/mbox/"},{"id":63754,"url":"https://patchwork.plctlab.org/api/1.2/patches/63754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e79c40af-4269-f950-131e-926f813b9f76@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:03","name":"[03/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e79c40af-4269-f950-131e-926f813b9f76@rivosinc.com/mbox/"},{"id":63755,"url":"https://patchwork.plctlab.org/api/1.2/patches/63755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/abc3ee25-4d56-47ec-63de-3fcc7ce0591a@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:14","name":"[04/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/abc3ee25-4d56-47ec-63de-3fcc7ce0591a@rivosinc.com/mbox/"},{"id":63756,"url":"https://patchwork.plctlab.org/api/1.2/patches/63756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2107aec-938f-0581-244c-4c08ee08190e@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:25","name":"[05/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2107aec-938f-0581-244c-4c08ee08190e@rivosinc.com/mbox/"},{"id":63757,"url":"https://patchwork.plctlab.org/api/1.2/patches/63757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com/","msgid":"<927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com>","list_archive_url":null,"date":"2023-03-03T04:53:35","name":"[06/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/927ed290-1340-5793-2c7f-8e0359cd0cea@rivosinc.com/mbox/"},{"id":63759,"url":"https://patchwork.plctlab.org/api/1.2/patches/63759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eefb0311-e12b-307f-fe70-c3e4641bb402@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T04:53:42","name":"[07/07] RISC-V: Add auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eefb0311-e12b-307f-fe70-c3e4641bb402@rivosinc.com/mbox/"},{"id":63782,"url":"https://patchwork.plctlab.org/api/1.2/patches/63782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303081658.6383-1-xry111@xry111.site/","msgid":"<20230303081658.6383-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:16:58","name":"[v2] LoongArch: Stop -mfpu from silently breaking ABI [PR109000]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303081658.6383-1-xry111@xry111.site/mbox/"},{"id":63798,"url":"https://patchwork.plctlab.org/api/1.2/patches/63798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-2-xry111@xry111.site/","msgid":"<20230303084011.8989-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:40:10","name":"[1/2] LoongArch: testsuite: Disable stack protector for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-2-xry111@xry111.site/mbox/"},{"id":63799,"url":"https://patchwork.plctlab.org/api/1.2/patches/63799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-3-xry111@xry111.site/","msgid":"<20230303084011.8989-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:40:11","name":"[2/2] LoongArch: testsuite: Adjust stack offsets in stack-check-cfa tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303084011.8989-3-xry111@xry111.site/mbox/"},{"id":63800,"url":"https://patchwork.plctlab.org/api/1.2/patches/63800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303085456.13037-1-xry111@xry111.site/","msgid":"<20230303085456.13037-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-03T08:54:56","name":"driver: toplev: Fix a typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303085456.13037-1-xry111@xry111.site/mbox/"},{"id":63813,"url":"https://patchwork.plctlab.org/api/1.2/patches/63813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a59a7554-9f0a-e0ff-5666-629c66174e9a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:12:30","name":"[PATCHv2,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a59a7554-9f0a-e0ff-5666-629c66174e9a@linux.ibm.com/mbox/"},{"id":63839,"url":"https://patchwork.plctlab.org/api/1.2/patches/63839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAG/euZxYFFWr5N9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:35:54","name":"diagnostics: Fix up selftests with $COLUMNS < 42 [PR108973]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAG/euZxYFFWr5N9@tucnak/mbox/"},{"id":63850,"url":"https://patchwork.plctlab.org/api/1.2/patches/63850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHB4wr3Nnj/4np8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T09:46:11","name":"gimple-fold: Fix up fputs -> fwrite folding [PR108988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHB4wr3Nnj/4np8@tucnak/mbox/"},{"id":63855,"url":"https://patchwork.plctlab.org/api/1.2/patches/63855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHHTu2bupT3tcQr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T10:09:18","name":"waccess: Fix two -Wnonnull warning issues [PR108986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAHHTu2bupT3tcQr@tucnak/mbox/"},{"id":63865,"url":"https://patchwork.plctlab.org/api/1.2/patches/63865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303110643.1128D139D3@imap2.suse-dmz.suse.de/","msgid":"<20230303110643.1128D139D3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-03T11:06:42","name":"tree-optimization/109002 - partial PRE miscompilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303110643.1128D139D3@imap2.suse-dmz.suse.de/mbox/"},{"id":63933,"url":"https://patchwork.plctlab.org/api/1.2/patches/63933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0u6szx7.fsf@moxielogic.com/","msgid":"<87r0u6szx7.fsf@moxielogic.com>","list_archive_url":null,"date":"2023-03-03T13:54:44","name":"moxie: use define_memory_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0u6szx7.fsf@moxielogic.com/mbox/"},{"id":63934,"url":"https://patchwork.plctlab.org/api/1.2/patches/63934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt4uszlk.fsf@laptop.mail-host-address-is-not-set/","msgid":"<87mt4uszlk.fsf@laptop.mail-host-address-is-not-set>","list_archive_url":null,"date":"2023-03-03T14:01:43","name":"moxie: enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt4uszlk.fsf@laptop.mail-host-address-is-not-set/mbox/"},{"id":63968,"url":"https://patchwork.plctlab.org/api/1.2/patches/63968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303145821.1081489-1-ppalka@redhat.com/","msgid":"<20230303145821.1081489-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-03T14:58:21","name":"c++: thinko in extract_local_specs [PR108998]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303145821.1081489-1-ppalka@redhat.com/mbox/"},{"id":63970,"url":"https://patchwork.plctlab.org/api/1.2/patches/63970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIPvaT1ipBv5JI4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-03T15:18:21","name":"c++, v2: Don'\''t defer local statics initialized with constant expressions [PR108702]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIPvaT1ipBv5JI4@tucnak/mbox/"},{"id":63987,"url":"https://patchwork.plctlab.org/api/1.2/patches/63987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303164439.1625702-1-jwakely@redhat.com/","msgid":"<20230303164439.1625702-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-03T16:44:39","name":"gcc: Adjust gdbhooks.py VecPrinter for vec layout changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303164439.1625702-1-jwakely@redhat.com/mbox/"},{"id":64016,"url":"https://patchwork.plctlab.org/api/1.2/patches/64016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7p9iv1s.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-03T17:50:07","name":"[libstdc++,prettyprint] add local std::string use to more tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7p9iv1s.fsf@lxoliva.fsfla.org/mbox/"},{"id":64017,"url":"https://patchwork.plctlab.org/api/1.2/patches/64017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIzU47FLQleT9HO@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-03T17:50:11","name":"[v5] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAIzU47FLQleT9HO@redhat.com/mbox/"},{"id":64018,"url":"https://patchwork.plctlab.org/api/1.2/patches/64018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303175121.705791-1-polacek@redhat.com/","msgid":"<20230303175121.705791-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-03T17:51:21","name":"c++: error with constexpr operator() [PR107939]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303175121.705791-1-polacek@redhat.com/mbox/"},{"id":64023,"url":"https://patchwork.plctlab.org/api/1.2/patches/64023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzzxiul9.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-03T18:00:02","name":"[rs6000] adjust return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzzxiul9.fsf@lxoliva.fsfla.org/mbox/"},{"id":64024,"url":"https://patchwork.plctlab.org/api/1.2/patches/64024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303180748.1645712-1-jwakely@redhat.com/","msgid":"<20230303180748.1645712-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-03T18:07:48","name":"gcc: Fix gdbhooks.py VecPrinter for vec<> as well as vec<>* [PR109006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303180748.1645712-1-jwakely@redhat.com/mbox/"},{"id":64064,"url":"https://patchwork.plctlab.org/api/1.2/patches/64064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303194333.559903-1-ibuclaw@gdcproject.org/","msgid":"<20230303194333.559903-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-03T19:43:33","name":"[committed] d: Document that TypeInfo-based va_arg is not implemented [PR108763]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303194333.559903-1-ibuclaw@gdcproject.org/mbox/"},{"id":64098,"url":"https://patchwork.plctlab.org/api/1.2/patches/64098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230327.2730749-1-dmalcolm@redhat.com/","msgid":"<20230303230327.2730749-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:03:27","name":"[pushed] testsuite: remove XFAIL in gcc.dg/analyzer/pr99716-1.c [PR108988]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230327.2730749-1-dmalcolm@redhat.com/mbox/"},{"id":64099,"url":"https://patchwork.plctlab.org/api/1.2/patches/64099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230459.2730864-1-dmalcolm@redhat.com/","msgid":"<20230303230459.2730864-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:04:59","name":"[committed] analyzer: provide placeholder implementation of sprintf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303230459.2730864-1-dmalcolm@redhat.com/mbox/"},{"id":64101,"url":"https://patchwork.plctlab.org/api/1.2/patches/64101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303232110.2731449-1-dmalcolm@redhat.com/","msgid":"<20230303232110.2731449-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-03T23:21:10","name":"[pushed] analyzer: start adding test coverage for OpenMP [PR109016]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230303232110.2731449-1-dmalcolm@redhat.com/mbox/"},{"id":64117,"url":"https://patchwork.plctlab.org/api/1.2/patches/64117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005801.3F69C20425@pchp3.se.axis.com/","msgid":"<20230304005801.3F69C20425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T00:58:01","name":"[COMMITTED] testsuite: Fix various scan-assembler identifiers not handling _-prefix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005801.3F69C20425@pchp3.se.axis.com/mbox/"},{"id":64118,"url":"https://patchwork.plctlab.org/api/1.2/patches/64118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005932.4DD8A20425@pchp3.se.axis.com/","msgid":"<20230304005932.4DD8A20425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T00:59:32","name":"[COMMITTED] testsuite: Skip gcc.dg/ifcvt-4.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304005932.4DD8A20425@pchp3.se.axis.com/mbox/"},{"id":64119,"url":"https://patchwork.plctlab.org/api/1.2/patches/64119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304010102.7585E20436@pchp3.se.axis.com/","msgid":"<20230304010102.7585E20436@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-04T01:01:02","name":"[COMMITTED] testsuite: Skip gcc.dg/ipa/pr77653.c for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230304010102.7585E20436@pchp3.se.axis.com/mbox/"},{"id":64183,"url":"https://patchwork.plctlab.org/api/1.2/patches/64183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMGZG59v6MuoI43@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T08:50:44","name":"[committed] diagnostics, v2: Fix up selftests with $COLUMNS < 42 [PR108973]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMGZG59v6MuoI43@tucnak/mbox/"},{"id":64186,"url":"https://patchwork.plctlab.org/api/1.2/patches/64186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMI/REWaNXGJPL2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T09:01:49","name":"Remove remaining traces of m_vecdata from comments [PR109006]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMI/REWaNXGJPL2@tucnak/mbox/"},{"id":64188,"url":"https://patchwork.plctlab.org/api/1.2/patches/64188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMTc/ZXC8klOXeY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-04T09:46:27","name":"[committed] testsuite: Fix up syntax errors in scan-tree-dump-times target selectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAMTc/ZXC8klOXeY@tucnak/mbox/"},{"id":64262,"url":"https://patchwork.plctlab.org/api/1.2/patches/64262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com/","msgid":"<000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-03-04T18:32:15","name":"PR rtl-optimization/106594: Preserve zero_extend in combine when cheap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000c01d94ec7$a6921430$f3b63c90$@nextmovesoftware.com/mbox/"},{"id":64284,"url":"https://patchwork.plctlab.org/api/1.2/patches/64284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230305102430.266375-1-juzhe.zhong@rivai.ai/","msgid":"<20230305102430.266375-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-05T10:24:30","name":"RISC-V: Fix ICE for avl_single-86/avl_single-88/avl_single-90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230305102430.266375-1-juzhe.zhong@rivai.ai/mbox/"},{"id":64336,"url":"https://patchwork.plctlab.org/api/1.2/patches/64336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZATbvdEAtN1tK8Uw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-05T18:13:29","name":"[committed] testsuite: Fix up syntax error in scan-tree-dump-times target selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZATbvdEAtN1tK8Uw@tucnak/mbox/"},{"id":64339,"url":"https://patchwork.plctlab.org/api/1.2/patches/64339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec7afc14-1865-2f69-4d26-fa62dc22ff2c@gmx.de/","msgid":"","list_archive_url":null,"date":"2023-03-05T20:21:41","name":"[v3] Fortran: fix CLASS attribute handling [PR106856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec7afc14-1865-2f69-4d26-fa62dc22ff2c@gmx.de/mbox/"},{"id":64399,"url":"https://patchwork.plctlab.org/api/1.2/patches/64399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com/","msgid":"<5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:13:50","name":"[v2,01/07] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5dcf3e4a-5c4f-161e-7ae6-b4cd0708cf8f@rivosinc.com/mbox/"},{"id":64400,"url":"https://patchwork.plctlab.org/api/1.2/patches/64400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6f5a659-6487-83bb-acef-ba19122d4c1e@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T03:14:23","name":"[v2,02/07] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6f5a659-6487-83bb-acef-ba19122d4c1e@rivosinc.com/mbox/"},{"id":64402,"url":"https://patchwork.plctlab.org/api/1.2/patches/64402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com/","msgid":"<1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:14:53","name":"[v2,03/07] RISC-V: autovec: Add vector cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c29f016-be25-b29b-d0a5-8269527678db@rivosinc.com/mbox/"},{"id":64403,"url":"https://patchwork.plctlab.org/api/1.2/patches/64403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com/","msgid":"<0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:15:30","name":"[v2,04/07] RISC-V: autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0a3eeda3-0648-cc6d-8dd1-a542101e008f@rivosinc.com/mbox/"},{"id":64405,"url":"https://patchwork.plctlab.org/api/1.2/patches/64405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com/","msgid":"<07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:16:01","name":"[v2,05/07] RISC-V: autovec: Add tuning and target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07b22c71-16bc-f85a-5ff8-1f6009f0056d@rivosinc.com/mbox/"},{"id":64406,"url":"https://patchwork.plctlab.org/api/1.2/patches/64406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com/","msgid":"<6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:16:31","name":"[V2,06/07] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6db6ea3d-722e-a474-316f-af0b26a2df00@rivosinc.com/mbox/"},{"id":64408,"url":"https://patchwork.plctlab.org/api/1.2/patches/64408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00013323-7689-85c3-f10a-45f90e746868@rivosinc.com/","msgid":"<00013323-7689-85c3-f10a-45f90e746868@rivosinc.com>","list_archive_url":null,"date":"2023-03-06T03:17:03","name":"[v2,07/07] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00013323-7689-85c3-f10a-45f90e746868@rivosinc.com/mbox/"},{"id":64528,"url":"https://patchwork.plctlab.org/api/1.2/patches/64528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be761ccd-2db7-1b80-a0bb-1d3499847bc7@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T09:27:09","name":"rs6000, libgcc: Fix bump size for powerpc64 elfv1 ABI [PR108727]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be761ccd-2db7-1b80-a0bb-1d3499847bc7@linux.ibm.com/mbox/"},{"id":64530,"url":"https://patchwork.plctlab.org/api/1.2/patches/64530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com/","msgid":"<60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com>","list_archive_url":null,"date":"2023-03-06T09:27:49","name":"testsuite, rs6000: Adjust ppc-fortran.exp to support dg-{warning,error}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60621672-5c9e-ddb3-51fa-5565d678899c@linux.ibm.com/mbox/"},{"id":64543,"url":"https://patchwork.plctlab.org/api/1.2/patches/64543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAW7SuefyFqOlPDc@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-03-06T10:07:06","name":"Enable scatter for generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAW7SuefyFqOlPDc@kam.mff.cuni.cz/mbox/"},{"id":64548,"url":"https://patchwork.plctlab.org/api/1.2/patches/64548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de/","msgid":"<20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-06T10:11:20","name":"[RFC] RAII auto_mpfr and autp_mpz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306101121.3CFDA13A66@imap2.suse-dmz.suse.de/mbox/"},{"id":64582,"url":"https://patchwork.plctlab.org/api/1.2/patches/64582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306102609.1310C13A66@imap2.suse-dmz.suse.de/","msgid":"<20230306102609.1310C13A66@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-06T10:26:08","name":"tree-optimization/109025 - fixup double reduction detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306102609.1310C13A66@imap2.suse-dmz.suse.de/mbox/"},{"id":64630,"url":"https://patchwork.plctlab.org/api/1.2/patches/64630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilfe9hdh.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T12:47:06","name":"combine: Try harder to form zero_extends [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptilfe9hdh.fsf_-_@arm.com/mbox/"},{"id":64746,"url":"https://patchwork.plctlab.org/api/1.2/patches/64746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306145715.1617591-1-pan2.li@intel.com/","msgid":"<20230306145715.1617591-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-06T14:57:15","name":"[v4] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306145715.1617591-1-pan2.li@intel.com/mbox/"},{"id":65046,"url":"https://patchwork.plctlab.org/api/1.2/patches/65046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184542.0517B20405@pchp3.se.axis.com/","msgid":"<20230306184542.0517B20405@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:45:42","name":"[1/3] testsuite: Add tail_call effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184542.0517B20405@pchp3.se.axis.com/mbox/"},{"id":65047,"url":"https://patchwork.plctlab.org/api/1.2/patches/65047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184735.03643203D7@pchp3.se.axis.com/","msgid":"<20230306184735.03643203D7@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:47:35","name":"[2/3] doc: Document testsuite check_effective_target_tail_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306184735.03643203D7@pchp3.se.axis.com/mbox/"},{"id":65048,"url":"https://patchwork.plctlab.org/api/1.2/patches/65048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185008.538C7203D7@pchp3.se.axis.com/","msgid":"<20230306185008.538C7203D7@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:50:08","name":"[3/3] testsuite: Gate gcc.dg/plugin/must-tail-call-1.c and -2.c on tail_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185008.538C7203D7@pchp3.se.axis.com/mbox/"},{"id":65050,"url":"https://patchwork.plctlab.org/api/1.2/patches/65050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185255.721FC20405@pchp3.se.axis.com/","msgid":"<20230306185255.721FC20405@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-06T18:52:55","name":"testsuite: Support scanning tree-dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306185255.721FC20405@pchp3.se.axis.com/mbox/"},{"id":65129,"url":"https://patchwork.plctlab.org/api/1.2/patches/65129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZhCDWSrLacjPCs@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T21:54:16","name":"[v6] c++: -Wdangling-reference with reference wrapper [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZhCDWSrLacjPCs@redhat.com/mbox/"},{"id":65130,"url":"https://patchwork.plctlab.org/api/1.2/patches/65130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZinAZKAELCJ2Sy@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T22:01:00","name":"[v2] c++: error with constexpr operator() [PR107939]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAZinAZKAELCJ2Sy@redhat.com/mbox/"},{"id":65181,"url":"https://patchwork.plctlab.org/api/1.2/patches/65181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJtMq0f00sm_Hasn9pVZPGWD12hN99FHnGM0BKCgi+DYA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-06T23:45:16","name":"libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJtMq0f00sm_Hasn9pVZPGWD12hN99FHnGM0BKCgi+DYA@mail.gmail.com/mbox/"},{"id":65182,"url":"https://patchwork.plctlab.org/api/1.2/patches/65182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306235957.390533-1-polacek@redhat.com/","msgid":"<20230306235957.390533-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-06T23:59:57","name":"c++: noexcept and copy elision [PR109030]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230306235957.390533-1-polacek@redhat.com/mbox/"},{"id":65280,"url":"https://patchwork.plctlab.org/api/1.2/patches/65280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307062123.142975-1-juzhe.zhong@rivai.ai/","msgid":"<20230307062123.142975-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-07T06:21:23","name":"RISC-V: Add fault first load C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307062123.142975-1-juzhe.zhong@rivai.ai/mbox/"},{"id":65330,"url":"https://patchwork.plctlab.org/api/1.2/patches/65330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e76cdb-49e7-aa77-d861-ccebe64748cf@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T08:55:38","name":"[PATCHv3,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e76cdb-49e7-aa77-d861-ccebe64748cf@linux.ibm.com/mbox/"},{"id":65332,"url":"https://patchwork.plctlab.org/api/1.2/patches/65332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAb+vw8RAyZtrlll@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-07T09:07:11","name":"c++: Fix up ICE in emit_support_tinfo_1 [PR109042]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAb+vw8RAyZtrlll@tucnak/mbox/"},{"id":65333,"url":"https://patchwork.plctlab.org/api/1.2/patches/65333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307091204.1498-1-shihua@iscas.ac.cn/","msgid":"<20230307091204.1498-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-07T09:12:04","name":"[RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307091204.1498-1-shihua@iscas.ac.cn/mbox/"},{"id":65370,"url":"https://patchwork.plctlab.org/api/1.2/patches/65370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307110906.81A03385B523@sourceware.org/","msgid":"<20230307110906.81A03385B523@sourceware.org>","list_archive_url":null,"date":"2023-03-07T11:08:15","name":"tree-optimization/109046 - re-combine complex loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307110906.81A03385B523@sourceware.org/mbox/"},{"id":65395,"url":"https://patchwork.plctlab.org/api/1.2/patches/65395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307120515.258058-1-pan2.li@intel.com/","msgid":"<20230307120515.258058-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-07T12:05:15","name":"[v5] RISC-V: Bugfix for rvv bool mode precision adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307120515.258058-1-pan2.li@intel.com/mbox/"},{"id":65508,"url":"https://patchwork.plctlab.org/api/1.2/patches/65508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLxqFxtwm8zK_uftgfoKjVeh-EXv85cVtX50T_=fsC9yw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T13:45:55","name":"[fortran] PR37336 finalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLxqFxtwm8zK_uftgfoKjVeh-EXv85cVtX50T_=fsC9yw@mail.gmail.com/mbox/"},{"id":65745,"url":"https://patchwork.plctlab.org/api/1.2/patches/65745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173534.1976902-1-jwakely@redhat.com/","msgid":"<20230307173534.1976902-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-07T17:35:34","name":"[committed] libstdc++: Fix comment typo in eh_personality.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173534.1976902-1-jwakely@redhat.com/mbox/"},{"id":65747,"url":"https://patchwork.plctlab.org/api/1.2/patches/65747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173549.1976948-1-jwakely@redhat.com/","msgid":"<20230307173549.1976948-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-07T17:35:49","name":"[committed] libstdc++: Fix symver for __gnu_cxx11_ieee128::__try_use_facet [PR108882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307173549.1976948-1-jwakely@redhat.com/mbox/"},{"id":65749,"url":"https://patchwork.plctlab.org/api/1.2/patches/65749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17094-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-07T17:38:29","name":"middle-end: On emergency dumps finish the graph generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17094-tamar@arm.com/mbox/"},{"id":65768,"url":"https://patchwork.plctlab.org/api/1.2/patches/65768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307193349.578669-1-jason@redhat.com/","msgid":"<20230307193349.578669-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-07T19:33:49","name":"c++: static lambda tsubst [PR108526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307193349.578669-1-jason@redhat.com/mbox/"},{"id":65833,"url":"https://patchwork.plctlab.org/api/1.2/patches/65833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307201335.14969-1-ppalka@redhat.com/","msgid":"<20230307201335.14969-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-07T20:13:35","name":"libstdc++: extraneous begin in cartesian_product_view::end [PR107572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230307201335.14969-1-ppalka@redhat.com/mbox/"},{"id":65983,"url":"https://patchwork.plctlab.org/api/1.2/patches/65983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308025945.648936-1-jason@redhat.com/","msgid":"<20230308025945.648936-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-08T02:59:44","name":"[RFC] c++: lambda mangling alias issues [PR107897]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308025945.648936-1-jason@redhat.com/mbox/"},{"id":65988,"url":"https://patchwork.plctlab.org/api/1.2/patches/65988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308031856.174124-1-juzhe.zhong@rivai.ai/","msgid":"<20230308031856.174124-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T03:18:56","name":"RISC-V: Fine tune merge operand constraint for integer/load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308031856.174124-1-juzhe.zhong@rivai.ai/mbox/"},{"id":65993,"url":"https://patchwork.plctlab.org/api/1.2/patches/65993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-2-collison@rivosinc.com/","msgid":"<20230308032740.989275-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:35","name":"[v3,1/6] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-2-collison@rivosinc.com/mbox/"},{"id":65992,"url":"https://patchwork.plctlab.org/api/1.2/patches/65992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-3-collison@rivosinc.com/","msgid":"<20230308032740.989275-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:36","name":"[v3,2/6] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-3-collison@rivosinc.com/mbox/"},{"id":65994,"url":"https://patchwork.plctlab.org/api/1.2/patches/65994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-4-collison@rivosinc.com/","msgid":"<20230308032740.989275-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:37","name":"[v3,3/6] RISC-V: autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-4-collison@rivosinc.com/mbox/"},{"id":65995,"url":"https://patchwork.plctlab.org/api/1.2/patches/65995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-5-collison@rivosinc.com/","msgid":"<20230308032740.989275-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:38","name":"[v3,4/6] RISC-V: autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-5-collison@rivosinc.com/mbox/"},{"id":65996,"url":"https://patchwork.plctlab.org/api/1.2/patches/65996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-6-collison@rivosinc.com/","msgid":"<20230308032740.989275-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:39","name":"[v3,5/6] RISC-V: autovec: Add autovectorization patterns for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-6-collison@rivosinc.com/mbox/"},{"id":65999,"url":"https://patchwork.plctlab.org/api/1.2/patches/65999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-7-collison@rivosinc.com/","msgid":"<20230308032740.989275-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-08T03:27:40","name":"[v3,6/6] RISC-V: autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308032740.989275-7-collison@rivosinc.com/mbox/"},{"id":66014,"url":"https://patchwork.plctlab.org/api/1.2/patches/66014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308045839.D4D7D203F2@pchp3.se.axis.com/","msgid":"<20230308045839.D4D7D203F2@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-08T04:58:39","name":"testsuite: Fix omp-parallel-for-get-min.c and -for-1.c for non-openmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308045839.D4D7D203F2@pchp3.se.axis.com/mbox/"},{"id":66015,"url":"https://patchwork.plctlab.org/api/1.2/patches/66015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com/","msgid":"<413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com>","list_archive_url":null,"date":"2023-03-08T05:03:41","name":"[committed] Fix MIPS testsuite over-eager matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/413a4370-a98a-62d1-e652-cc74e56610f4@gmail.com/mbox/"},{"id":66023,"url":"https://patchwork.plctlab.org/api/1.2/patches/66023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp/","msgid":"<8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp>","list_archive_url":null,"date":"2023-03-08T06:04:41","name":"xtensa: Fix for enabling LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a826036-e109-9ffb-7048-b5bbaab22590@yahoo.co.jp/mbox/"},{"id":66024,"url":"https://patchwork.plctlab.org/api/1.2/patches/66024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308061621.317733-1-juzhe.zhong@rivai.ai/","msgid":"<20230308061621.317733-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T06:16:21","name":"RISC-V: Fine tunning merge operand constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308061621.317733-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66028,"url":"https://patchwork.plctlab.org/api/1.2/patches/66028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308063138.1490431-1-hongyu.wang@intel.com/","msgid":"<20230308063138.1490431-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-03-08T06:31:38","name":"libgomp: Fix default value of GOMP_SPINCOUNT [PR 109062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308063138.1490431-1-hongyu.wang@intel.com/mbox/"},{"id":66049,"url":"https://patchwork.plctlab.org/api/1.2/patches/66049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308073333.814033-1-pan2.li@intel.com/","msgid":"<20230308073333.814033-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-08T07:33:33","name":"RISC-V: Bugfix for rvv bool mode size adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308073333.814033-1-pan2.li@intel.com/mbox/"},{"id":66057,"url":"https://patchwork.plctlab.org/api/1.2/patches/66057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308074213.97404-1-juzhe.zhong@rivai.ai/","msgid":"<20230308074213.97404-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T07:42:13","name":"Extend nops num in \"maybe_gen_insn\" for RISC-V Vector intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308074213.97404-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66126,"url":"https://patchwork.plctlab.org/api/1.2/patches/66126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308093929.98D8C3858C62@sourceware.org/","msgid":"<20230308093929.98D8C3858C62@sourceware.org>","list_archive_url":null,"date":"2023-03-08T09:38:43","name":"middle-end/108995 - avoid folding when sanitizing overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308093929.98D8C3858C62@sourceware.org/mbox/"},{"id":66147,"url":"https://patchwork.plctlab.org/api/1.2/patches/66147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com/","msgid":"<17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com>","list_archive_url":null,"date":"2023-03-08T11:05:37","name":"GCN update for wwwdocs / libgomp.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17ba4f3f-09b2-09f6-0f95-434798847666@codesourcery.com/mbox/"},{"id":66191,"url":"https://patchwork.plctlab.org/api/1.2/patches/66191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79726845-749b-8e49-6c10-1f7930074ddf@gmail.com/","msgid":"<79726845-749b-8e49-6c10-1f7930074ddf@gmail.com>","list_archive_url":null,"date":"2023-03-08T13:07:19","name":"[v3] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79726845-749b-8e49-6c10-1f7930074ddf@gmail.com/mbox/"},{"id":66251,"url":"https://patchwork.plctlab.org/api/1.2/patches/66251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB16201866FEA701E17850E8D3ACB49@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-03-08T14:08:49","name":"libstdc++: Fix handling of surrogate CP in codecvt [PR108976]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB16201866FEA701E17850E8D3ACB49@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":66261,"url":"https://patchwork.plctlab.org/api/1.2/patches/66261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308143527.113337-1-ppalka@redhat.com/","msgid":"<20230308143527.113337-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T14:35:27","name":"libstdc++: Make views::single/iota/istream SFINAE-friendly [PR108362]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308143527.113337-1-ppalka@redhat.com/mbox/"},{"id":66287,"url":"https://patchwork.plctlab.org/api/1.2/patches/66287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308151133.152110-1-ppalka@redhat.com/","msgid":"<20230308151133.152110-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T15:11:33","name":"libstdc++: Implement LWG 3820/3849 changes to cartesian_product_view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308151133.152110-1-ppalka@redhat.com/mbox/"},{"id":66320,"url":"https://patchwork.plctlab.org/api/1.2/patches/66320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308155306.257241-1-ppalka@redhat.com/","msgid":"<20230308155306.257241-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T15:53:06","name":"libstdc++: Implement LWG 3715 changes to view_interface::empty","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308155306.257241-1-ppalka@redhat.com/mbox/"},{"id":66347,"url":"https://patchwork.plctlab.org/api/1.2/patches/66347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com/","msgid":"<98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com>","list_archive_url":null,"date":"2023-03-08T16:20:02","name":"[1/X] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98e8127c-ecb0-2977-3c6c-29151edfcb15@arm.com/mbox/"},{"id":66348,"url":"https://patchwork.plctlab.org/api/1.2/patches/66348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com/","msgid":"<08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com>","list_archive_url":null,"date":"2023-03-08T16:21:47","name":"[2/X] parloops: Copy target and optimizations when creating a function clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08d8c50f-6338-38dc-6248-ecd9ecd54f51@arm.com/mbox/"},{"id":66349,"url":"https://patchwork.plctlab.org/api/1.2/patches/66349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com/","msgid":"<8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com>","list_archive_url":null,"date":"2023-03-08T16:23:45","name":"[3/X] parloops: Allow poly number of iterations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8172aa80-cb23-ade6-23f0-67f420ac84e3@arm.com/mbox/"},{"id":66350,"url":"https://patchwork.plctlab.org/api/1.2/patches/66350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4e8c0df-3c3b-852c-3e87-e54ead721fc8@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-08T16:25:27","name":"[RFC,4/X] omp, aarch64: Add SVE support for '\''omp declare simd'\'' [PR 96342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4e8c0df-3c3b-852c-3e87-e54ead721fc8@arm.com/mbox/"},{"id":66351,"url":"https://patchwork.plctlab.org/api/1.2/patches/66351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce294c68-cfb4-9716-f939-7bbf0e9a6205@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-08T16:26:59","name":"[RFC,5/X] omp: Create simd clones from '\''omp declare variant'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce294c68-cfb4-9716-f939-7bbf0e9a6205@arm.com/mbox/"},{"id":66352,"url":"https://patchwork.plctlab.org/api/1.2/patches/66352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com/","msgid":"<2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com>","list_archive_url":null,"date":"2023-03-08T16:28:24","name":"[RFC,6/X] omp: Allow creation of simd clones from omp declare variant with -fopenmp-simd flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2f1139f6-5ac6-6baa-3190-99b09d35b9b9@arm.com/mbox/"},{"id":66356,"url":"https://patchwork.plctlab.org/api/1.2/patches/66356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308164651.325398-1-ppalka@redhat.com/","msgid":"<20230308164651.325398-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-08T16:46:51","name":"libstdc++: Implement P2520R0 changes to move_iterator'\''s iterator_concept","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308164651.325398-1-ppalka@redhat.com/mbox/"},{"id":66451,"url":"https://patchwork.plctlab.org/api/1.2/patches/66451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308210930.128620-1-polacek@redhat.com/","msgid":"<20230308210930.128620-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-08T21:09:30","name":"ubsan: missed -fsanitize=bounds for compound ops [PR108060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308210930.128620-1-polacek@redhat.com/mbox/"},{"id":66481,"url":"https://patchwork.plctlab.org/api/1.2/patches/66481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308222146.102045-1-juzhe.zhong@rivai.ai/","msgid":"<20230308222146.102045-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-08T22:21:46","name":"[V2] RISC-V: Add fault first load C/C++ support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230308222146.102045-1-juzhe.zhong@rivai.ai/mbox/"},{"id":66493,"url":"https://patchwork.plctlab.org/api/1.2/patches/66493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com/","msgid":"<40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com>","list_archive_url":null,"date":"2023-03-08T23:01:38","name":"rs6000: Accept const pointer operands for MMA builtins [PR109073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/40ecb0c8-2821-a72b-549d-6de6876b5d45@linux.ibm.com/mbox/"},{"id":66556,"url":"https://patchwork.plctlab.org/api/1.2/patches/66556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021620.19719-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021620.19719-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:20","name":"[gcc12,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021620.19719-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66557,"url":"https://patchwork.plctlab.org/api/1.2/patches/66557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021627.19767-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021627.19767-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:27","name":"[gcc11,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021627.19767-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66558,"url":"https://patchwork.plctlab.org/api/1.2/patches/66558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021636.19815-1-mayshao-oc@zhaoxin.com/","msgid":"<20230309021636.19815-1-mayshao-oc@zhaoxin.com>","list_archive_url":null,"date":"2023-03-09T02:16:36","name":"[gcc10,backport] i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309021636.19815-1-mayshao-oc@zhaoxin.com/mbox/"},{"id":66612,"url":"https://patchwork.plctlab.org/api/1.2/patches/66612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309065846.2D7A933E60@hamza.pair.com/","msgid":"<20230309065846.2D7A933E60@hamza.pair.com>","list_archive_url":null,"date":"2023-03-09T06:58:44","name":"[pushed] wwwdocs: gcc-13: Spell front end (noun) without dash","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309065846.2D7A933E60@hamza.pair.com/mbox/"},{"id":66642,"url":"https://patchwork.plctlab.org/api/1.2/patches/66642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309075710.2236986-1-collison@rivosinc.com/","msgid":"<20230309075710.2236986-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-09T07:57:10","name":"[v2] vect: Check that vector factor is a compile-time constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309075710.2236986-1-collison@rivosinc.com/mbox/"},{"id":66682,"url":"https://patchwork.plctlab.org/api/1.2/patches/66682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAmYznEFViafs4Gv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-09T08:29:02","name":"range-op-float: Fix up reverse binary operations [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAmYznEFViafs4Gv@tucnak/mbox/"},{"id":66755,"url":"https://patchwork.plctlab.org/api/1.2/patches/66755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309103821.D67683850868@sourceware.org/","msgid":"<20230309103821.D67683850868@sourceware.org>","list_archive_url":null,"date":"2023-03-09T10:37:13","name":"Avoid unnecessary epilogues from tree_unroll_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309103821.D67683850868@sourceware.org/mbox/"},{"id":66789,"url":"https://patchwork.plctlab.org/api/1.2/patches/66789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309111602.D79AC3858C3A@sourceware.org/","msgid":"<20230309111602.D79AC3858C3A@sourceware.org>","list_archive_url":null,"date":"2023-03-09T11:15:17","name":"tree-optimization/44794 - avoid excessive RTL unrolling on epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309111602.D79AC3858C3A@sourceware.org/mbox/"},{"id":66823,"url":"https://patchwork.plctlab.org/api/1.2/patches/66823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsae15yg.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T12:09:59","name":"[v2,1/2] combine: Split code out of make_compound_operation_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfsae15yg.fsf@arm.com/mbox/"},{"id":66824,"url":"https://patchwork.plctlab.org/api/1.2/patches/66824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkl215x0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T12:10:51","name":"[v2,2/2] combine: Try harder to form zero_extends [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkl215x0.fsf@arm.com/mbox/"},{"id":66865,"url":"https://patchwork.plctlab.org/api/1.2/patches/66865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com/","msgid":"<8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com>","list_archive_url":null,"date":"2023-03-09T13:45:32","name":"[pushed,PR108999] LRA: For clobbered regs use operand mode instead of the biggest mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8898c260-0185-8f34-8fb7-6b9dae671652@redhat.com/mbox/"},{"id":66955,"url":"https://patchwork.plctlab.org/api/1.2/patches/66955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309161236.2192731-1-jwakely@redhat.com/","msgid":"<20230309161236.2192731-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-09T16:12:36","name":"[committed] libstdc++: Really fix symver for __gnu_cxx11_ieee128::__try_use_facet [PR108882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309161236.2192731-1-jwakely@redhat.com/mbox/"},{"id":67063,"url":"https://patchwork.plctlab.org/api/1.2/patches/67063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309180320.2899452-1-apinski@marvell.com/","msgid":"<20230309180320.2899452-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-09T18:03:20","name":"[PATCHv2] Fix PR 108980: note without warning due to array bounds check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309180320.2899452-1-apinski@marvell.com/mbox/"},{"id":67065,"url":"https://patchwork.plctlab.org/api/1.2/patches/67065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c56ca7fa-4444-483d-9c3e-93f641dd7f22-1678385289835@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-03-09T18:08:09","name":"Fortran: fix ICE with bind(c) in block data [PR104332]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-c56ca7fa-4444-483d-9c3e-93f641dd7f22-1678385289835@3c-app-gmx-bap32/mbox/"},{"id":67070,"url":"https://patchwork.plctlab.org/api/1.2/patches/67070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309185616.E420F20438@pchp3.se.axis.com/","msgid":"<20230309185616.E420F20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-09T18:56:16","name":"testsuite: Handle default_packed targets in gcc.dg/plugin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309185616.E420F20438@pchp3.se.axis.com/mbox/"},{"id":67080,"url":"https://patchwork.plctlab.org/api/1.2/patches/67080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17101-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-09T19:36:21","name":"middle-end: don'\''t form FMAs when multiplication is not single use. [PR108583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17101-tamar@arm.com/mbox/"},{"id":67082,"url":"https://patchwork.plctlab.org/api/1.2/patches/67082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAo2E3aXm85gr4dw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-09T19:40:03","name":"c++, abi: Fix up class layout with bitfields [PR109039]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAo2E3aXm85gr4dw@tucnak/mbox/"},{"id":67116,"url":"https://patchwork.plctlab.org/api/1.2/patches/67116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212318.3126266-1-dmalcolm@redhat.com/","msgid":"<20230309212318.3126266-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-09T21:23:18","name":"[pushed] testsuite: add various -Wanalyzer-null-dereference false +ve test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212318.3126266-1-dmalcolm@redhat.com/mbox/"},{"id":67117,"url":"https://patchwork.plctlab.org/api/1.2/patches/67117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212619.2329010-1-jason@redhat.com/","msgid":"<20230309212619.2329010-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-09T21:26:19","name":"[pushed] c++: allocator temps in list of arrays [PR108773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309212619.2329010-1-jason@redhat.com/mbox/"},{"id":67130,"url":"https://patchwork.plctlab.org/api/1.2/patches/67130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-1-arsen@aarsen.me/","msgid":"<20230309222626.4008373-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-09T22:26:25","name":"[1/2] libstdc++: Harmonize and other headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-1-arsen@aarsen.me/mbox/"},{"id":67131,"url":"https://patchwork.plctlab.org/api/1.2/patches/67131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-2-arsen@aarsen.me/","msgid":"<20230309222626.4008373-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-09T22:26:26","name":"[2/2] libstdc++: Add a test for FTM redefinitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230309222626.4008373-2-arsen@aarsen.me/mbox/"},{"id":67181,"url":"https://patchwork.plctlab.org/api/1.2/patches/67181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAp9hXdOGo/Ks+xz@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-10T00:44:53","name":"[v2] ubsan: missed -fsanitize=bounds for compound ops [PR108060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAp9hXdOGo/Ks+xz@redhat.com/mbox/"},{"id":67183,"url":"https://patchwork.plctlab.org/api/1.2/patches/67183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAqKlNLJl4jMFGVa@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-10T01:40:36","name":"[V4] Rework 128-bit complex multiply and divide.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAqKlNLJl4jMFGVa@toto.the-meissners.org/mbox/"},{"id":67186,"url":"https://patchwork.plctlab.org/api/1.2/patches/67186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310030205.90760-1-juzhe.zhong@rivai.ai/","msgid":"<20230310030205.90760-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-10T03:02:05","name":"RISC-V: Fine tune RA constraint for narrow instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310030205.90760-1-juzhe.zhong@rivai.ai/mbox/"},{"id":67188,"url":"https://patchwork.plctlab.org/api/1.2/patches/67188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310031351.2404945-1-jason@redhat.com/","msgid":"<20230310031351.2404945-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T03:13:51","name":"[pushed] c++: overloaded fn in contract [PR108542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310031351.2404945-1-jason@redhat.com/mbox/"},{"id":67199,"url":"https://patchwork.plctlab.org/api/1.2/patches/67199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310035736.2418695-1-jason@redhat.com/","msgid":"<20230310035736.2418695-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T03:57:36","name":"[pushed] c++: signed __int128_t [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310035736.2418695-1-jason@redhat.com/mbox/"},{"id":67228,"url":"https://patchwork.plctlab.org/api/1.2/patches/67228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310055947.2918320-1-apinski@marvell.com/","msgid":"<20230310055947.2918320-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T05:59:47","name":"Fix PR 108874: aarch64 code regression with shift and ands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310055947.2918320-1-apinski@marvell.com/mbox/"},{"id":67264,"url":"https://patchwork.plctlab.org/api/1.2/patches/67264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArlUJOn1HBZ44yJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T08:07:44","name":"range-op-float: Fix up -ffinite-math-only range extension and don'\''t extend into infinities [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArlUJOn1HBZ44yJ@tucnak/mbox/"},{"id":67268,"url":"https://patchwork.plctlab.org/api/1.2/patches/67268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310080857.186586-1-juzhe.zhong@rivai.ai/","msgid":"<20230310080857.186586-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-10T08:08:57","name":"RISC-V: Fix ICE of RVV compare intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310080857.186586-1-juzhe.zhong@rivai.ai/mbox/"},{"id":67271,"url":"https://patchwork.plctlab.org/api/1.2/patches/67271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArmdQvGOS9m7jXA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T08:12:37","name":"range-op-float: Extend lhs by 0.5ulp rather than 1ulp if not -frounding-math [PR109008]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZArmdQvGOS9m7jXA@tucnak/mbox/"},{"id":67364,"url":"https://patchwork.plctlab.org/api/1.2/patches/67364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de/","msgid":"<20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-10T11:26:47","name":"Shrink points-to analysis dumps when not dumping with -details","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310112647.CC9E4134F7@imap2.suse-dmz.suse.de/mbox/"},{"id":67370,"url":"https://patchwork.plctlab.org/api/1.2/patches/67370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310113718.2304961-1-jwakely@redhat.com/","msgid":"<20230310113718.2304961-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-10T11:37:18","name":"[committed] libstdc++: Fix GDB Xmethod for std::shared_ptr::use_count() [PR109064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310113718.2304961-1-jwakely@redhat.com/mbox/"},{"id":67384,"url":"https://patchwork.plctlab.org/api/1.2/patches/67384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310124053.164-1-jinma@linux.alibaba.com/","msgid":"<20230310124053.164-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-03-10T12:40:53","name":"[v6] RISC-V: Add support for experimental zfa extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310124053.164-1-jinma@linux.alibaba.com/mbox/"},{"id":67404,"url":"https://patchwork.plctlab.org/api/1.2/patches/67404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133232.3165688-1-dmalcolm@redhat.com/","msgid":"<20230310133232.3165688-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-10T13:32:32","name":"[pushed] analyzer: fix deref-before-check false +ves seen in haproxy [PR108475, PR109060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133232.3165688-1-dmalcolm@redhat.com/mbox/"},{"id":67406,"url":"https://patchwork.plctlab.org/api/1.2/patches/67406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133858.76465134F7@imap2.suse-dmz.suse.de/","msgid":"<20230310133858.76465134F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-10T13:38:57","name":"Speedup PTA solving for call constraint sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310133858.76465134F7@imap2.suse-dmz.suse.de/mbox/"},{"id":67408,"url":"https://patchwork.plctlab.org/api/1.2/patches/67408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310135420.2492295-1-jason@redhat.com/","msgid":"<20230310135420.2492295-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T13:54:20","name":"[pushed] c++: class NTTP and nested anon union [PR108566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310135420.2492295-1-jason@redhat.com/mbox/"},{"id":67409,"url":"https://patchwork.plctlab.org/api/1.2/patches/67409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6usbsxt.fsf@euler.schwinge.homeip.net/","msgid":"<87h6usbsxt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:07:58","name":"Fix OpenACC/GCN '\''acc_ev_enqueue_launch_end'\'' position (was: [PATCH] [og9] OpenACC profiling support for AMD GCN)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6usbsxt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67412,"url":"https://patchwork.plctlab.org/api/1.2/patches/67412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz5gbsbm.fsf@euler.schwinge.homeip.net/","msgid":"<87cz5gbsbm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:21:17","name":"Document/verify another aspect of OpenACC '\''async'\'' semantics in '\''libgomp.oacc-c-c++-common/data-3.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz5gbsbm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67413,"url":"https://patchwork.plctlab.org/api/1.2/patches/67413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a60kbrbo.fsf@euler.schwinge.homeip.net/","msgid":"<87a60kbrbo.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:42:51","name":"OpenACC: Remove '\''acc_async_test'\'' -> skip shortcut in '\''libgomp/oacc-async.c:goacc_wait'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a60kbrbo.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67420,"url":"https://patchwork.plctlab.org/api/1.2/patches/67420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yb8bqlt.fsf@euler.schwinge.homeip.net/","msgid":"<875yb8bqlt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T14:58:22","name":"Simplify OpenACC '\''no_create'\'' clause implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875yb8bqlt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67424,"url":"https://patchwork.plctlab.org/api/1.2/patches/67424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87356cbpgy.fsf@euler.schwinge.homeip.net/","msgid":"<87356cbpgy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T15:22:53","name":"Allow libgomp '\''cbuf'\'' buffering with OpenACC '\''async'\'' for '\''ephemeral'\'' data (was: [PATCH 3/4] openacc: Fix asynchronous host-to-device copies in libgomp runtime)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87356cbpgy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67425,"url":"https://patchwork.plctlab.org/api/1.2/patches/67425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310153513.2330396-1-jwakely@redhat.com/","msgid":"<20230310153513.2330396-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-10T15:35:13","name":"gcc: Add deleted assignment operators to non-copyable types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310153513.2330396-1-jwakely@redhat.com/mbox/"},{"id":67439,"url":"https://patchwork.plctlab.org/api/1.2/patches/67439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAtQIleilVL5xkAl@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-10T15:43:30","name":"c++ testsuite: Add test for PR107703","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZAtQIleilVL5xkAl@tucnak/mbox/"},{"id":67525,"url":"https://patchwork.plctlab.org/api/1.2/patches/67525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310161713.124368-1-polacek@redhat.com/","msgid":"<20230310161713.124368-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-10T16:17:13","name":"c++: ICE with constexpr lambda [PR107280]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310161713.124368-1-polacek@redhat.com/mbox/"},{"id":67578,"url":"https://patchwork.plctlab.org/api/1.2/patches/67578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310165841.3179375-1-dmalcolm@redhat.com/","msgid":"<20230310165841.3179375-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-10T16:58:41","name":"[pushed] analyzer: fix leak false +ve seen in haproxy'\''s cfgparse.c [PR109059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310165841.3179375-1-dmalcolm@redhat.com/mbox/"},{"id":67589,"url":"https://patchwork.plctlab.org/api/1.2/patches/67589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8ka5s2.fsf@euler.schwinge.homeip.net/","msgid":"<87zg8ka5s2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-10T17:13:33","name":"Use '\''GOMP_MAP_VARS_TARGET'\'' for OpenACC compute constructs [PR90596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8ka5s2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":67605,"url":"https://patchwork.plctlab.org/api/1.2/patches/67605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310173954.DB93433E1B@hamza.pair.com/","msgid":"<20230310173954.DB93433E1B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-10T17:39:52","name":"[pushed] wwwdocs: gcc-13: Escape < and > as < and >","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310173954.DB93433E1B@hamza.pair.com/mbox/"},{"id":67618,"url":"https://patchwork.plctlab.org/api/1.2/patches/67618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310175102.2937497-1-apinski@marvell.com/","msgid":"<20230310175102.2937497-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T17:51:02","name":"[COMMITTED] Fix PR 108874: aarch64 code regression with shift and ands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310175102.2937497-1-apinski@marvell.com/mbox/"},{"id":67620,"url":"https://patchwork.plctlab.org/api/1.2/patches/67620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eef3f64d-521e-e24d-80fb-24f18ee3e4e7@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-10T17:54:10","name":"[Fortran] Enable -fwrapv for -std=legacy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eef3f64d-521e-e24d-80fb-24f18ee3e4e7@netcologne.de/mbox/"},{"id":67641,"url":"https://patchwork.plctlab.org/api/1.2/patches/67641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310184938.2531120-1-jason@redhat.com/","msgid":"<20230310184938.2531120-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-10T18:49:38","name":"[pushed] c++: constrained lambda error-recovery [PR108972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310184938.2531120-1-jason@redhat.com/mbox/"},{"id":67642,"url":"https://patchwork.plctlab.org/api/1.2/patches/67642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310185048.1183264-1-arsen@aarsen.me/","msgid":"<20230310185048.1183264-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-10T18:50:48","name":"[pushed] MAINTAINERS: add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310185048.1183264-1-arsen@aarsen.me/mbox/"},{"id":67648,"url":"https://patchwork.plctlab.org/api/1.2/patches/67648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310190741.168444-1-polacek@redhat.com/","msgid":"<20230310190741.168444-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-10T19:07:41","name":"c++: suppress -Wdangling-reference for std::span [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310190741.168444-1-polacek@redhat.com/mbox/"},{"id":67660,"url":"https://patchwork.plctlab.org/api/1.2/patches/67660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310201620.2097011-1-collison@rivosinc.com/","msgid":"<20230310201620.2097011-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-10T20:16:20","name":"vect: Verify that GET_MODE_NUNITS is power-of-2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310201620.2097011-1-collison@rivosinc.com/mbox/"},{"id":67741,"url":"https://patchwork.plctlab.org/api/1.2/patches/67741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310215351.2943914-1-apinski@marvell.com/","msgid":"<20230310215351.2943914-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-10T21:53:51","name":"[COMMITTED/12] tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310215351.2943914-1-apinski@marvell.com/mbox/"},{"id":67826,"url":"https://patchwork.plctlab.org/api/1.2/patches/67826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225124.CF2BD20417@pchp3.se.axis.com/","msgid":"<20230310225124.CF2BD20417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:51:24","name":"[committed] testsuite: gcc.dg/pr106397.c: Add -w to options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225124.CF2BD20417@pchp3.se.axis.com/mbox/"},{"id":67827,"url":"https://patchwork.plctlab.org/api/1.2/patches/67827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225234.F162720417@pchp3.se.axis.com/","msgid":"<20230310225234.F162720417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:52:34","name":"[committed] testsuite: gcc.dg/pr108117.c: Require effective-target scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225234.F162720417@pchp3.se.axis.com/mbox/"},{"id":67829,"url":"https://patchwork.plctlab.org/api/1.2/patches/67829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225403.3827420420@pchp3.se.axis.com/","msgid":"<20230310225403.3827420420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-10T22:54:03","name":"[committed] testsuite: Tweak check_fork_available for CRIS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230310225403.3827420420@pchp3.se.axis.com/mbox/"},{"id":67839,"url":"https://patchwork.plctlab.org/api/1.2/patches/67839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfca67e4-e14f-63cd-fefb-db0025353d90@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-03-10T23:08:57","name":"update copyright year in libstdc++ manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfca67e4-e14f-63cd-fefb-db0025353d90@jguk.org/mbox/"},{"id":67865,"url":"https://patchwork.plctlab.org/api/1.2/patches/67865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39626f1c48c842b523aa46e3c23b2aabe356e27.1678491986.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-10T23:53:05","name":"[1/3] OpenMP: Fix \"exit data\" for array sections for ref-to-ptr components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39626f1c48c842b523aa46e3c23b2aabe356e27.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67867,"url":"https://patchwork.plctlab.org/api/1.2/patches/67867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com/","msgid":"<6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-10T23:53:06","name":"[2/3] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b034ae643ca4d5a2fab3474e11ce7721b612e25.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67866,"url":"https://patchwork.plctlab.org/api/1.2/patches/67866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com/","msgid":"<4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-10T23:53:07","name":"[3/3] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bc35274f24d71d65c1a7c623380f832ca71fa6d.1678491986.git.julian@codesourcery.com/mbox/"},{"id":67951,"url":"https://patchwork.plctlab.org/api/1.2/patches/67951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311012749.2949900-1-apinski@marvell.com/","msgid":"<20230311012749.2949900-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-11T01:27:49","name":"[COMMITTED/12] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311012749.2949900-1-apinski@marvell.com/mbox/"},{"id":67956,"url":"https://patchwork.plctlab.org/api/1.2/patches/67956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4afcdfe-1f44-0414-85b4-b6b16633de58@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-11T01:33:33","name":"[Committed] Docs: Update documentation of Texinfo versions for building manuals.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4afcdfe-1f44-0414-85b4-b6b16633de58@codesourcery.com/mbox/"},{"id":68125,"url":"https://patchwork.plctlab.org/api/1.2/patches/68125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-618a0ce8-7457-4d87-828a-ea87d1342711-1678546768519@3c-app-gmx-bs11/","msgid":"","list_archive_url":null,"date":"2023-03-11T14:59:28","name":"[pushed] Fortran: fix bounds check for copying of class expressions [PR106945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-618a0ce8-7457-4d87-828a-ea87d1342711-1678546768519@3c-app-gmx-bs11/mbox/"},{"id":68137,"url":"https://patchwork.plctlab.org/api/1.2/patches/68137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2d2ce62-49e9-296d-096f-e82c203d9f14@seanbright.com/","msgid":"","list_archive_url":null,"date":"2023-03-11T17:33:46","name":"docs: Fix double '\''See'\'' in zero-length-bounds docs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2d2ce62-49e9-296d-096f-e82c203d9f14@seanbright.com/mbox/"},{"id":68187,"url":"https://patchwork.plctlab.org/api/1.2/patches/68187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202445.3133190-1-sam@gentoo.org/","msgid":"<20230311202445.3133190-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-11T20:24:45","name":"RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202445.3133190-1-sam@gentoo.org/mbox/"},{"id":68188,"url":"https://patchwork.plctlab.org/api/1.2/patches/68188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202522.0D82833EA9@hamza.pair.com/","msgid":"<20230311202522.0D82833EA9@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T20:25:20","name":"[pushed] wwwdocs: gcc-10: Minor tweaks to the OpenACC/OpenMP section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202522.0D82833EA9@hamza.pair.com/mbox/"},{"id":68189,"url":"https://patchwork.plctlab.org/api/1.2/patches/68189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202705.3135051-1-sam@gentoo.org/","msgid":"<20230311202705.3135051-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-11T20:27:05","name":"[v2] RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311202705.3135051-1-sam@gentoo.org/mbox/"},{"id":68190,"url":"https://patchwork.plctlab.org/api/1.2/patches/68190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311203234.2257423-1-arsen@aarsen.me/","msgid":"<20230311203234.2257423-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-11T20:32:34","name":"[v2] html: Set CONTENTS_OUTPUT_LOCATION=inline if makeinfo supports it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311203234.2257423-1-arsen@aarsen.me/mbox/"},{"id":68214,"url":"https://patchwork.plctlab.org/api/1.2/patches/68214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230238.CBACF33E9F@hamza.pair.com/","msgid":"<20230311230238.CBACF33E9F@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T23:02:37","name":"[pushed] doc: Drop a redundant link to AVR-LibC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230238.CBACF33E9F@hamza.pair.com/mbox/"},{"id":68215,"url":"https://patchwork.plctlab.org/api/1.2/patches/68215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230859.4EB3E33EB3@hamza.pair.com/","msgid":"<20230311230859.4EB3E33EB3@hamza.pair.com>","list_archive_url":null,"date":"2023-03-11T23:08:57","name":"[pushed] wwwdocs: testing: Further adjust link to upstream FTensor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230311230859.4EB3E33EB3@hamza.pair.com/mbox/"},{"id":68267,"url":"https://patchwork.plctlab.org/api/1.2/patches/68267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312101613.C0F0233E6B@hamza.pair.com/","msgid":"<20230312101613.C0F0233E6B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-12T10:16:11","name":"[pushed] libstdc++: Move www.graphviz.org to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312101613.C0F0233E6B@hamza.pair.com/mbox/"},{"id":68361,"url":"https://patchwork.plctlab.org/api/1.2/patches/68361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com/","msgid":"<000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-03-12T15:04:20","name":"PR middle-end/109031: Fix final value replacement from narrower IVs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000601d954f3$ee202350$ca6069f0$@nextmovesoftware.com/mbox/"},{"id":68417,"url":"https://patchwork.plctlab.org/api/1.2/patches/68417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312175401.2736265-1-sam@gentoo.org/","msgid":"<20230312175401.2736265-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-12T17:54:01","name":"[v3] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230312175401.2736265-1-sam@gentoo.org/mbox/"},{"id":68607,"url":"https://patchwork.plctlab.org/api/1.2/patches/68607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp/","msgid":"<85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp>","list_archive_url":null,"date":"2023-03-13T00:37:10","name":"xtensa: Remove REG_OK_STRICT and its derivatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85e1e1ac-00b1-8fea-34f8-daf1f85299e3@yahoo.co.jp/mbox/"},{"id":68626,"url":"https://patchwork.plctlab.org/api/1.2/patches/68626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313035249.3997637-1-chenglulu@loongson.cn/","msgid":"<20230313035249.3997637-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-03-13T03:52:50","name":"LoongArch: Control all __crc* __crcc* builtin functions with macro __loongarch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313035249.3997637-1-chenglulu@loongson.cn/mbox/"},{"id":68640,"url":"https://patchwork.plctlab.org/api/1.2/patches/68640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313065742.1335925-1-arsen@aarsen.me/","msgid":"<20230313065742.1335925-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-03-13T06:57:43","name":"[gcc-{11,12}] c++: top level bind when rewriting coroutines [PR106188]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313065742.1335925-1-arsen@aarsen.me/mbox/"},{"id":68654,"url":"https://patchwork.plctlab.org/api/1.2/patches/68654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313075201.241158-1-juzhe.zhong@rivai.ai/","msgid":"<20230313075201.241158-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T07:52:01","name":"RISC-V: Fix bugs of internal tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313075201.241158-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68679,"url":"https://patchwork.plctlab.org/api/1.2/patches/68679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313081927.247155-1-juzhe.zhong@rivai.ai/","msgid":"<20230313081927.247155-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T08:19:27","name":"RISC-V: Fix reg order of RVV registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313081927.247155-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68684,"url":"https://patchwork.plctlab.org/api/1.2/patches/68684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313082855.248118-1-juzhe.zhong@rivai.ai/","msgid":"<20230313082855.248118-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T08:28:55","name":"RISC-V: Fine tune gather load RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313082855.248118-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68697,"url":"https://patchwork.plctlab.org/api/1.2/patches/68697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313090540.335536-1-juzhe.zhong@rivai.ai/","msgid":"<20230313090540.335536-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T09:05:40","name":"RISC-V: Refine reduction RA constraint according to RVV ISA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313090540.335536-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68702,"url":"https://patchwork.plctlab.org/api/1.2/patches/68702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZA7ommeXWVjWe3vH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-13T09:10:50","name":"libstdc++: Another baseline_symbols.txt update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZA7ommeXWVjWe3vH@tucnak/mbox/"},{"id":68731,"url":"https://patchwork.plctlab.org/api/1.2/patches/68731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313103508.2543385-1-jwakely@redhat.com/","msgid":"<20230313103508.2543385-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-13T10:35:08","name":"[committed] libstdc++: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313103508.2543385-1-jwakely@redhat.com/mbox/"},{"id":68733,"url":"https://patchwork.plctlab.org/api/1.2/patches/68733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313104607.2545130-1-jwakely@redhat.com/","msgid":"<20230313104607.2545130-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-13T10:46:07","name":"[committed] libstdc++: Refer to documentation hacking docs from Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313104607.2545130-1-jwakely@redhat.com/mbox/"},{"id":68806,"url":"https://patchwork.plctlab.org/api/1.2/patches/68806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com/","msgid":"<41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com>","list_archive_url":null,"date":"2023-03-13T12:25:04","name":"gcn/mkoffload.cc: Pass -save-temps on for the hsaco step","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/41a0d8cc-f505-7ffd-ccbb-da39e2cb38e0@codesourcery.com/mbox/"},{"id":68861,"url":"https://patchwork.plctlab.org/api/1.2/patches/68861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313141757.277008-1-juzhe.zhong@rivai.ai/","msgid":"<20230313141757.277008-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-13T14:17:57","name":"RISC-V: Fix Bug 109092","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313141757.277008-1-juzhe.zhong@rivai.ai/mbox/"},{"id":68901,"url":"https://patchwork.plctlab.org/api/1.2/patches/68901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/716e6395-4108-0864-4272-f96b232989d2@arm.com/","msgid":"<716e6395-4108-0864-4272-f96b232989d2@arm.com>","list_archive_url":null,"date":"2023-03-13T15:53:30","name":"ifcvt: Lower bitfields only if suitable for scalar register [PR tree/109005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/716e6395-4108-0864-4272-f96b232989d2@arm.com/mbox/"},{"id":69036,"url":"https://patchwork.plctlab.org/api/1.2/patches/69036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae7e081e-d301-16a3-8e4e-e69655286cdd@pfeifer.com/","msgid":"","list_archive_url":null,"date":"2023-03-13T18:48:08","name":"[pushed] wwwdocs: style: Add a link to our testing page","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae7e081e-d301-16a3-8e4e-e69655286cdd@pfeifer.com/mbox/"},{"id":69048,"url":"https://patchwork.plctlab.org/api/1.2/patches/69048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190027.3358516-1-dmalcolm@redhat.com/","msgid":"<20230313190027.3358516-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:27","name":"[pushed] analyzer, testsuite: add test coverage for various builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190027.3358516-1-dmalcolm@redhat.com/mbox/"},{"id":69049,"url":"https://patchwork.plctlab.org/api/1.2/patches/69049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190031.3358543-1-dmalcolm@redhat.com/","msgid":"<20230313190031.3358543-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:31","name":"[pushed] testsuite: add test coverage for PR analyzer/108045","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190031.3358543-1-dmalcolm@redhat.com/mbox/"},{"id":69050,"url":"https://patchwork.plctlab.org/api/1.2/patches/69050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190035.3358567-1-dmalcolm@redhat.com/","msgid":"<20230313190035.3358567-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-13T19:00:35","name":"[pushed] testsuite: add test coverage for analyzer leak false +ve [PR105906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313190035.3358567-1-dmalcolm@redhat.com/mbox/"},{"id":69091,"url":"https://patchwork.plctlab.org/api/1.2/patches/69091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201512.151814-1-jason@redhat.com/","msgid":"<20230313201512.151814-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-13T20:15:12","name":"[RFA] tree: define tree_code_type in C++11/14 [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201512.151814-1-jason@redhat.com/mbox/"},{"id":69092,"url":"https://patchwork.plctlab.org/api/1.2/patches/69092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201636.152901-1-jason@redhat.com/","msgid":"<20230313201636.152901-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-13T20:16:36","name":"[pushed] c++: handle _FloatNN redeclaration like bool [PR107128]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313201636.152901-1-jason@redhat.com/mbox/"},{"id":69119,"url":"https://patchwork.plctlab.org/api/1.2/patches/69119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313204510.1908188-1-jcmvbkbc@gmail.com/","msgid":"<20230313204510.1908188-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-03-13T20:45:10","name":"[COMMITTED] xtensa: add .note.GNU-stack section on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313204510.1908188-1-jcmvbkbc@gmail.com/mbox/"},{"id":69150,"url":"https://patchwork.plctlab.org/api/1.2/patches/69150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212719.1269-1-ibuclaw@gdcproject.org/","msgid":"<20230313212719.1269-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-13T21:27:19","name":"[committed] d: Refactor DECL_ARGUMENT and DECL_RESULT generation to own function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212719.1269-1-ibuclaw@gdcproject.org/mbox/"},{"id":69152,"url":"https://patchwork.plctlab.org/api/1.2/patches/69152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212749.1772-1-ibuclaw@gdcproject.org/","msgid":"<20230313212749.1772-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-13T21:27:49","name":"[committed] d: Delay removing DECL_EXTERNAL from thunks until funcion has finished","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230313212749.1772-1-ibuclaw@gdcproject.org/mbox/"},{"id":69202,"url":"https://patchwork.plctlab.org/api/1.2/patches/69202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-1-sam@gentoo.org/","msgid":"<20230314002354.367655-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-14T00:23:53","name":"[v4,1/2] RISC-V: Avoid calloc() poisoning on musl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-1-sam@gentoo.org/mbox/"},{"id":69203,"url":"https://patchwork.plctlab.org/api/1.2/patches/69203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-2-sam@gentoo.org/","msgid":"<20230314002354.367655-2-sam@gentoo.org>","list_archive_url":null,"date":"2023-03-14T00:23:54","name":"[v4,2/2] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314002354.367655-2-sam@gentoo.org/mbox/"},{"id":69212,"url":"https://patchwork.plctlab.org/api/1.2/patches/69212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314003806.328920-1-juzhe.zhong@rivai.ai/","msgid":"<20230314003806.328920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-14T00:38:06","name":"RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314003806.328920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":69222,"url":"https://patchwork.plctlab.org/api/1.2/patches/69222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314012536.2789120417@pchp3.se.axis.com/","msgid":"<20230314012536.2789120417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-14T01:25:36","name":"doc: md.texi (Insn Splitting): Tweak wording for readability.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314012536.2789120417@pchp3.se.axis.com/mbox/"},{"id":69256,"url":"https://patchwork.plctlab.org/api/1.2/patches/69256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314022331.105558-1-juzhe.zhong@rivai.ai/","msgid":"<20230314022331.105558-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-14T02:23:31","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314022331.105558-1-juzhe.zhong@rivai.ai/mbox/"},{"id":69322,"url":"https://patchwork.plctlab.org/api/1.2/patches/69322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314062514.1711201-1-lin1.hu@intel.com/","msgid":"<20230314062514.1711201-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-03-14T06:25:14","name":"i386:Add missing OPTION_MASK_ISA_AVX512VL in i386-builtin.def for VAES builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314062514.1711201-1-lin1.hu@intel.com/mbox/"},{"id":69338,"url":"https://patchwork.plctlab.org/api/1.2/patches/69338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314073003.C48B53858C2F@sourceware.org/","msgid":"<20230314073003.C48B53858C2F@sourceware.org>","list_archive_url":null,"date":"2023-03-14T07:29:19","name":"New testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314073003.C48B53858C2F@sourceware.org/mbox/"},{"id":69347,"url":"https://patchwork.plctlab.org/api/1.2/patches/69347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAoNGDJPNd069B5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T07:54:28","name":"testsuite: Fix up g++.dg/cpp2a/concepts-lambda3.C [PR108972]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAoNGDJPNd069B5@tucnak/mbox/"},{"id":69350,"url":"https://patchwork.plctlab.org/api/1.2/patches/69350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApCMbOq6n+IGxA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T07:58:00","name":"c++: Treat unnamed bitfields as padding for __has_unique_object_representations [PR109096]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApCMbOq6n+IGxA@tucnak/mbox/"},{"id":69351,"url":"https://patchwork.plctlab.org/api/1.2/patches/69351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApxBo9DUPYM8fe@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T08:01:08","name":"tree-vect-patterns: Fix up ICE in upper_bound [PR109115]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBApxBo9DUPYM8fe@tucnak/mbox/"},{"id":69364,"url":"https://patchwork.plctlab.org/api/1.2/patches/69364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAsLIG/MsOVEid4@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-03-14T08:11:24","name":"Fix ICE in profile_count::to_sreal_frequency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBAsLIG/MsOVEid4@kam.mff.cuni.cz/mbox/"},{"id":69422,"url":"https://patchwork.plctlab.org/api/1.2/patches/69422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314101342.1F4003858414@sourceware.org/","msgid":"<20230314101342.1F4003858414@sourceware.org>","list_archive_url":null,"date":"2023-03-14T10:12:58","name":"Remove variables only used with .DEFERRED_INIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314101342.1F4003858414@sourceware.org/mbox/"},{"id":69428,"url":"https://patchwork.plctlab.org/api/1.2/patches/69428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17109-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-14T10:18:38","name":"[committed,testsuite] : move mla_1 test to aarch64 only [PR109118]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17109-tamar@arm.com/mbox/"},{"id":69443,"url":"https://patchwork.plctlab.org/api/1.2/patches/69443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103027.2697727-1-jwakely@redhat.com/","msgid":"<20230314103027.2697727-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:27","name":"[committed] libstdc++: Add assertions to std::mask_array operations [PR62196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103027.2697727-1-jwakely@redhat.com/mbox/"},{"id":69446,"url":"https://patchwork.plctlab.org/api/1.2/patches/69446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103033.2697851-1-jwakely@redhat.com/","msgid":"<20230314103033.2697851-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:33","name":"[committed] libstdc++: Add comment about symver linker scripts to makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103033.2697851-1-jwakely@redhat.com/mbox/"},{"id":69445,"url":"https://patchwork.plctlab.org/api/1.2/patches/69445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103040.2697873-1-jwakely@redhat.com/","msgid":"<20230314103040.2697873-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-14T10:30:40","name":"[committed] libstdc++: Fix preprocessor condition for inline variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314103040.2697873-1-jwakely@redhat.com/mbox/"},{"id":69706,"url":"https://patchwork.plctlab.org/api/1.2/patches/69706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCV7EF97QkCHs+U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T15:42:36","name":"gdbhooks: Update gdbhooks.py for recent tree_code_type changes [PR108634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCV7EF97QkCHs+U@tucnak/mbox/"},{"id":69709,"url":"https://patchwork.plctlab.org/api/1.2/patches/69709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314160443.AC7E420417@pchp3.se.axis.com/","msgid":"<20230314160443.AC7E420417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-14T16:04:43","name":"[v2] doc: md.texi (Insn Splitting): Tweak wording for readability.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314160443.AC7E420417@pchp3.se.axis.com/mbox/"},{"id":69711,"url":"https://patchwork.plctlab.org/api/1.2/patches/69711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCcL2Uy41B+9NKU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-14T16:09:19","name":"i386: Fix up split_double_concat [PR109109]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBCcL2Uy41B+9NKU@tucnak/mbox/"},{"id":69729,"url":"https://patchwork.plctlab.org/api/1.2/patches/69729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-1-ppalka@redhat.com/","msgid":"<20230314164146.1470993-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T16:41:45","name":"[1/2] c++: constrained template friend class matching [PR96830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-1-ppalka@redhat.com/mbox/"},{"id":69730,"url":"https://patchwork.plctlab.org/api/1.2/patches/69730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-2-ppalka@redhat.com/","msgid":"<20230314164146.1470993-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T16:41:46","name":"[2/2] c++: redeclaring member of constrained class template [PR96830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314164146.1470993-2-ppalka@redhat.com/mbox/"},{"id":69745,"url":"https://patchwork.plctlab.org/api/1.2/patches/69745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bCobKsiWtNxzdZVcd_PwgtnTS_mONisdYdg4JN0442oA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-14T17:43:16","name":"i386: Use movss to implement V2SImode VEC_PERM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bCobKsiWtNxzdZVcd_PwgtnTS_mONisdYdg4JN0442oA@mail.gmail.com/mbox/"},{"id":69787,"url":"https://patchwork.plctlab.org/api/1.2/patches/69787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314184620.373190-1-jason@redhat.com/","msgid":"<20230314184620.373190-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-14T18:46:20","name":"[pushed] c++: -Wreturn-type with if (true) throw [PR107310]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314184620.373190-1-jason@redhat.com/mbox/"},{"id":69823,"url":"https://patchwork.plctlab.org/api/1.2/patches/69823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a97ee57-2800-4785-b4b4-418bbb32675c-1678822727185@3c-app-gmx-bap12/","msgid":"","list_archive_url":null,"date":"2023-03-14T19:38:47","name":"Fortran: rank checking with explicit-/assumed-size arrays and CLASS [PR58331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0a97ee57-2800-4785-b4b4-418bbb32675c-1678822727185@3c-app-gmx-bap12/mbox/"},{"id":69826,"url":"https://patchwork.plctlab.org/api/1.2/patches/69826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314195659.1682947-1-ibuclaw@gdcproject.org/","msgid":"<20230314195659.1682947-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-14T19:56:59","name":"[committed] d: Fix undefined reference to lambda defined in private enum [PR109108]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314195659.1682947-1-ibuclaw@gdcproject.org/mbox/"},{"id":69840,"url":"https://patchwork.plctlab.org/api/1.2/patches/69840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314215256.4153026-1-collison@rivosinc.com/","msgid":"<20230314215256.4153026-1-collison@rivosinc.com>","list_archive_url":null,"date":"2023-03-14T21:52:56","name":"vect: Verify that GET_MODE_NUNITS is greater than one.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314215256.4153026-1-collison@rivosinc.com/mbox/"},{"id":69852,"url":"https://patchwork.plctlab.org/api/1.2/patches/69852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314221019.463098-1-jason@redhat.com/","msgid":"<20230314221019.463098-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-14T22:10:19","name":"[pushed] c++: variable tmpl partial specialization [PR108468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314221019.463098-1-jason@redhat.com/mbox/"},{"id":69875,"url":"https://patchwork.plctlab.org/api/1.2/patches/69875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314225026.163717-1-polacek@redhat.com/","msgid":"<20230314225026.163717-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-14T22:50:26","name":"sanitizer: missing signed integer overflow errors [PR109107]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314225026.163717-1-polacek@redhat.com/mbox/"},{"id":69891,"url":"https://patchwork.plctlab.org/api/1.2/patches/69891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314232005.1575584-1-ppalka@redhat.com/","msgid":"<20230314232005.1575584-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-14T23:20:05","name":"[pushed] libstdc++: Fix template-head of repeat_view::_Iterator [PR109111]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230314232005.1575584-1-ppalka@redhat.com/mbox/"},{"id":69961,"url":"https://patchwork.plctlab.org/api/1.2/patches/69961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315052338.88042-1-juzhe.zhong@rivai.ai/","msgid":"<20230315052338.88042-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-15T05:23:38","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315052338.88042-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70019,"url":"https://patchwork.plctlab.org/api/1.2/patches/70019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315063746.166390-1-juzhe.zhong@rivai.ai/","msgid":"<20230315063746.166390-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-15T06:37:46","name":"RISC-V: Fix bugs of ternary integer and floating-point ternary intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315063746.166390-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70062,"url":"https://patchwork.plctlab.org/api/1.2/patches/70062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315075103.1039307-1-ysato@users.sourceforge.jp/","msgid":"<20230315075103.1039307-1-ysato@users.sourceforge.jp>","list_archive_url":null,"date":"2023-03-15T07:51:03","name":"[v2] PR target/89828 Inernal compiler error on -fno-omit-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315075103.1039307-1-ysato@users.sourceforge.jp/mbox/"},{"id":70089,"url":"https://patchwork.plctlab.org/api/1.2/patches/70089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093001.3BD723857803@sourceware.org/","msgid":"<20230315093001.3BD723857803@sourceware.org>","list_archive_url":null,"date":"2023-03-15T09:29:15","name":"tree-optimization/109139 - fix .DEFERRED_INIT removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093001.3BD723857803@sourceware.org/mbox/"},{"id":70090,"url":"https://patchwork.plctlab.org/api/1.2/patches/70090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093321.555944-1-xry111@xry111.site/","msgid":"<20230315093321.555944-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-15T09:33:21","name":"Pushed: [PATCH] builtins: Move the character difference into result instead of reassigning result [PR109086]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315093321.555944-1-xry111@xry111.site/mbox/"},{"id":70100,"url":"https://patchwork.plctlab.org/api/1.2/patches/70100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com/","msgid":"<977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com>","list_archive_url":null,"date":"2023-03-15T10:07:24","name":"[v4] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/977b3846-f1fc-77a5-c1ee-367dd947ed44@gmail.com/mbox/"},{"id":70114,"url":"https://patchwork.plctlab.org/api/1.2/patches/70114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315104919.38328385840E@sourceware.org/","msgid":"<20230315104919.38328385840E@sourceware.org>","list_archive_url":null,"date":"2023-03-15T10:48:32","name":"[1/2] Avoid random stmt order result in pass_waccess::use_after_inval_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315104919.38328385840E@sourceware.org/mbox/"},{"id":70116,"url":"https://patchwork.plctlab.org/api/1.2/patches/70116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315105003.D4D1F3857437@sourceware.org/","msgid":"<20230315105003.D4D1F3857437@sourceware.org>","list_archive_url":null,"date":"2023-03-15T10:49:19","name":"[2/2] tree-optimization/109123 - run -Wuse-afer-free only early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315105003.D4D1F3857437@sourceware.org/mbox/"},{"id":70187,"url":"https://patchwork.plctlab.org/api/1.2/patches/70187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315122448.3394353-1-christoph.muellner@vrull.eu/","msgid":"<20230315122448.3394353-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-15T12:24:48","name":"riscv: thead: Add sign/zero extension support for th.ext and th.extu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315122448.3394353-1-christoph.muellner@vrull.eu/mbox/"},{"id":70188,"url":"https://patchwork.plctlab.org/api/1.2/patches/70188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124346.686647-1-jason@redhat.com/","msgid":"<20230315124346.686647-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:43:46","name":"[pushed] c++: injected class name as default ttp arg [PR58538]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124346.686647-1-jason@redhat.com/mbox/"},{"id":70189,"url":"https://patchwork.plctlab.org/api/1.2/patches/70189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-1-jason@redhat.com/","msgid":"<20230315124427.687003-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:44:26","name":"[pushed,1/2] c++: coerce_template_template_parms interface tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-1-jason@redhat.com/mbox/"},{"id":70190,"url":"https://patchwork.plctlab.org/api/1.2/patches/70190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-2-jason@redhat.com/","msgid":"<20230315124427.687003-2-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T12:44:27","name":"[2/2] c++: passing one ttp to another [PR108179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315124427.687003-2-jason@redhat.com/mbox/"},{"id":70233,"url":"https://patchwork.plctlab.org/api/1.2/patches/70233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315135358.3DE153858017@sourceware.org/","msgid":"<20230315135358.3DE153858017@sourceware.org>","list_archive_url":null,"date":"2023-03-15T13:53:14","name":"Avoid duplicate diagnostic in g++.dg/warn/Wuse-after-free3.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315135358.3DE153858017@sourceware.org/mbox/"},{"id":70249,"url":"https://patchwork.plctlab.org/api/1.2/patches/70249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com/","msgid":"<6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com>","list_archive_url":null,"date":"2023-03-15T14:24:04","name":"OpenMP: Add omp_in_explicit_task to omp_runtime_api_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6749cf41-bd73-4f6c-d565-67d2307164e4@codesourcery.com/mbox/"},{"id":70260,"url":"https://patchwork.plctlab.org/api/1.2/patches/70260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBHYLmBGhgu3QDRa@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T14:37:34","name":"[v2] c++: ICE with constexpr lambda [PR107280]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBHYLmBGhgu3QDRa@redhat.com/mbox/"},{"id":70297,"url":"https://patchwork.plctlab.org/api/1.2/patches/70297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com/","msgid":"<952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com>","list_archive_url":null,"date":"2023-03-15T16:14:01","name":"Now gcc-13: [Fwd: [PATCH] gcc-12: Re-enable split-stack support for GNU/Hurd.]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/952ba6f7c288d4198f99437672278473d5bb88f7.camel@gmail.com/mbox/"},{"id":70398,"url":"https://patchwork.plctlab.org/api/1.2/patches/70398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zKDb8AV9dubh6Jqokg_qynXWfVsENxhDd45Nm8bi7oyZQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:29:58","name":"[v2,1/2] libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zKDb8AV9dubh6Jqokg_qynXWfVsENxhDd45Nm8bi7oyZQ@mail.gmail.com/mbox/"},{"id":70399,"url":"https://patchwork.plctlab.org/api/1.2/patches/70399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJQhKdZizesKV8qOR4omMDAJPWQ=exuOFar0iQUuAWWKg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:32:01","name":"[v2,2/2] libstdc++: use copy_file_range, improve sendfile in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFqe=zJQhKdZizesKV8qOR4omMDAJPWQ=exuOFar0iQUuAWWKg@mail.gmail.com/mbox/"},{"id":70403,"url":"https://patchwork.plctlab.org/api/1.2/patches/70403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y97FGBKyLbSijcsmP_-AWU5sHtvdfk8nv8ZPfhQhx-zg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-15T19:37:40","name":"i386: Fix blend vector permutation for 8-byte modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y97FGBKyLbSijcsmP_-AWU5sHtvdfk8nv8ZPfhQhx-zg@mail.gmail.com/mbox/"},{"id":70408,"url":"https://patchwork.plctlab.org/api/1.2/patches/70408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315194324.1930746-1-iamberkeyavas@gmail.com/","msgid":"<20230315194324.1930746-1-iamberkeyavas@gmail.com>","list_archive_url":null,"date":"2023-03-15T19:43:24","name":"compiler built in is_scalar, use built-in is_scalar in libstdc++ std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315194324.1930746-1-iamberkeyavas@gmail.com/mbox/"},{"id":70446,"url":"https://patchwork.plctlab.org/api/1.2/patches/70446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315211011.2023906-1-iamberkeyavas@gmail.com/","msgid":"<20230315211011.2023906-1-iamberkeyavas@gmail.com>","list_archive_url":null,"date":"2023-03-15T21:10:12","name":"c++, libstdc++: new compiler built in is_scalar, use built-in is_scalar in libstdc++ std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315211011.2023906-1-iamberkeyavas@gmail.com/mbox/"},{"id":70482,"url":"https://patchwork.plctlab.org/api/1.2/patches/70482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222022.3505853-1-dmalcolm@redhat.com/","msgid":"<20230315222022.3505853-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-15T22:20:22","name":"[pushed] diagnostics: attempt to capture crash info in SARIF output [PR109097]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222022.3505853-1-dmalcolm@redhat.com/mbox/"},{"id":70483,"url":"https://patchwork.plctlab.org/api/1.2/patches/70483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222923.846553-1-jason@redhat.com/","msgid":"<20230315222923.846553-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-15T22:29:23","name":"[pushed] c++: co_await and initializer_list [PR103871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230315222923.846553-1-jason@redhat.com/mbox/"},{"id":70521,"url":"https://patchwork.plctlab.org/api/1.2/patches/70521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316003211.F054433E4F@hamza.pair.com/","msgid":"<20230316003211.F054433E4F@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T00:32:09","name":"[pushed] maintainer-scripts: Abstract BUGURL in update_web_docs_git","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316003211.F054433E4F@hamza.pair.com/mbox/"},{"id":70534,"url":"https://patchwork.plctlab.org/api/1.2/patches/70534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora60dbig2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-16T01:20:29","name":"[testsuite] test for weak_undefined support and add options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora60dbig2.fsf@lxoliva.fsfla.org/mbox/"},{"id":70535,"url":"https://patchwork.plctlab.org/api/1.2/patches/70535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yb1bi6a.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-16T01:26:21","name":"[testsuite] fix array element count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5yb1bi6a.fsf@lxoliva.fsfla.org/mbox/"},{"id":70547,"url":"https://patchwork.plctlab.org/api/1.2/patches/70547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316030157.882778-1-jason@redhat.com/","msgid":"<20230316030157.882778-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T03:01:57","name":"[RFC] c++: co_await and move-only type [PR105406]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316030157.882778-1-jason@redhat.com/mbox/"},{"id":70570,"url":"https://patchwork.plctlab.org/api/1.2/patches/70570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com/","msgid":"<86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-16T05:20:21","name":"rs6000: suboptimal code for returning bool value on target ppc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86cf8475-4353-52ca-869c-75f40bd7d06f@linux.ibm.com/mbox/"},{"id":70573,"url":"https://patchwork.plctlab.org/api/1.2/patches/70573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com/","msgid":"<22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-16T05:34:32","name":"[PATCH-1,rs6000] Put constant into pseudo at expand when it needs two insns [PR86106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22e83da3-a81f-dd61-c04b-a39b459a965f@linux.ibm.com/mbox/"},{"id":70575,"url":"https://patchwork.plctlab.org/api/1.2/patches/70575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1dec3a1-1e7b-28ba-ec9b-ca56e6c15c72@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-16T05:34:40","name":"[PATCH-2,rs6000] Put constant into pseudo at expand when it needs two insns [PR86106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1dec3a1-1e7b-28ba-ec9b-ca56e6c15c72@linux.ibm.com/mbox/"},{"id":70671,"url":"https://patchwork.plctlab.org/api/1.2/patches/70671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316085542.171023-1-juzhe.zhong@rivai.ai/","msgid":"<20230316085542.171023-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T08:55:42","name":"RISC-V: Fix bugs reported by @kito","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316085542.171023-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70683,"url":"https://patchwork.plctlab.org/api/1.2/patches/70683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLfsr13dpPoE/ki@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-16T09:21:54","name":"[committed] libcpp: Update Unicode copyright years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLfsr13dpPoE/ki@tucnak/mbox/"},{"id":70684,"url":"https://patchwork.plctlab.org/api/1.2/patches/70684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLgYT5EtdeyWrAM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-16T09:24:49","name":"contrib: Update instructions regarding Unicode updates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBLgYT5EtdeyWrAM@tucnak/mbox/"},{"id":70686,"url":"https://patchwork.plctlab.org/api/1.2/patches/70686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093807.176072-1-juzhe.zhong@rivai.ai/","msgid":"<20230316093807.176072-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T09:38:07","name":"ISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093807.176072-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70688,"url":"https://patchwork.plctlab.org/api/1.2/patches/70688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093914.176248-1-juzhe.zhong@rivai.ai/","msgid":"<20230316093914.176248-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-16T09:39:14","name":"RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316093914.176248-1-juzhe.zhong@rivai.ai/mbox/"},{"id":70746,"url":"https://patchwork.plctlab.org/api/1.2/patches/70746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113927.4967-1-tejas.belagod@arm.com/","msgid":"<20230316113927.4967-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-03-16T11:39:27","name":"[PR96339] AArch64: Optimise svlast[ab]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113927.4967-1-tejas.belagod@arm.com/mbox/"},{"id":70745,"url":"https://patchwork.plctlab.org/api/1.2/patches/70745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113935.325393-1-ibuclaw@gdcproject.org/","msgid":"<20230316113935.325393-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-16T11:39:35","name":"[committed] d: Fix closure fields don'\''t get same alignment as local variable [PR109144]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316113935.325393-1-ibuclaw@gdcproject.org/mbox/"},{"id":70834,"url":"https://patchwork.plctlab.org/api/1.2/patches/70834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316152706.2214124-1-manolis.tsamis@vrull.eu/","msgid":"<20230316152706.2214124-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-03-16T15:27:06","name":"[v1,RFC] Improve folding for comparisons with zero in tree-ssa-forwprop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316152706.2214124-1-manolis.tsamis@vrull.eu/mbox/"},{"id":70902,"url":"https://patchwork.plctlab.org/api/1.2/patches/70902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316164816.2493686-1-ppalka@redhat.com/","msgid":"<20230316164816.2493686-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-16T16:48:16","name":"c++: ICE with diagnosed constraint recursion [PR100288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316164816.2493686-1-ppalka@redhat.com/mbox/"},{"id":70953,"url":"https://patchwork.plctlab.org/api/1.2/patches/70953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahd+tv3FHJaDWmMvVrqhaSCQnctiQUZdt0vdat+owMtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-16T19:44:23","name":"i386: Robustify vec perm blend functions for TARGET_MMX_WITH_SSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahd+tv3FHJaDWmMvVrqhaSCQnctiQUZdt0vdat+owMtw@mail.gmail.com/mbox/"},{"id":70979,"url":"https://patchwork.plctlab.org/api/1.2/patches/70979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-2-qing.zhao@oracle.com/","msgid":"<20230316214715.604671-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-16T21:47:14","name":"[V5,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-2-qing.zhao@oracle.com/mbox/"},{"id":70980,"url":"https://patchwork.plctlab.org/api/1.2/patches/70980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-3-qing.zhao@oracle.com/","msgid":"<20230316214715.604671-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-16T21:47:15","name":"[V5,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316214715.604671-3-qing.zhao@oracle.com/mbox/"},{"id":70983,"url":"https://patchwork.plctlab.org/api/1.2/patches/70983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316220948.1138021-1-jason@redhat.com/","msgid":"<20230316220948.1138021-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:09:48","name":"[pushed] c++: &enum::enumerator [PR101869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316220948.1138021-1-jason@redhat.com/mbox/"},{"id":70984,"url":"https://patchwork.plctlab.org/api/1.2/patches/70984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221108.1138412-1-jason@redhat.com/","msgid":"<20230316221108.1138412-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:11:08","name":"[pushed] c++: generic lambda, local class, __func__ [PR108242]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221108.1138412-1-jason@redhat.com/mbox/"},{"id":70985,"url":"https://patchwork.plctlab.org/api/1.2/patches/70985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221223.1138825-1-jason@redhat.com/","msgid":"<20230316221223.1138825-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-16T22:12:23","name":"[pushed] c++: __func__ and local class DMI [PR105809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316221223.1138825-1-jason@redhat.com/mbox/"},{"id":71001,"url":"https://patchwork.plctlab.org/api/1.2/patches/71001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org/","msgid":"<640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org>","list_archive_url":null,"date":"2023-03-16T22:37:41","name":"correct function attribute typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/640effa5-e1d6-94fe-cb8f-978d8a94f931@jguk.org/mbox/"},{"id":71012,"url":"https://patchwork.plctlab.org/api/1.2/patches/71012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316232658.CA7C133E73@hamza.pair.com/","msgid":"<20230316232658.CA7C133E73@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T23:26:56","name":"[pushed] wwwdocs: onlinedocs: Use the proper name of the Modula-2 manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316232658.CA7C133E73@hamza.pair.com/mbox/"},{"id":71015,"url":"https://patchwork.plctlab.org/api/1.2/patches/71015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316234840.A3B8D33E53@hamza.pair.com/","msgid":"<20230316234840.A3B8D33E53@hamza.pair.com>","list_archive_url":null,"date":"2023-03-16T23:48:39","name":"[pushed] wwwdocs: readings: Switch publibfp.dhe.ibm.com to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230316234840.A3B8D33E53@hamza.pair.com/mbox/"},{"id":71065,"url":"https://patchwork.plctlab.org/api/1.2/patches/71065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317032722.1548833-1-guojiufu@linux.ibm.com/","msgid":"<20230317032722.1548833-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-03-17T03:27:22","name":"[V3] extract DF/SF/SI/HI/QI subreg from parameter word on stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317032722.1548833-1-guojiufu@linux.ibm.com/mbox/"},{"id":71068,"url":"https://patchwork.plctlab.org/api/1.2/patches/71068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317033952.1549050-1-guojiufu@linux.ibm.com/","msgid":"<20230317033952.1549050-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-03-17T03:39:52","name":"[V5] Use reg mode to move sub blocks for parameters and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317033952.1549050-1-guojiufu@linux.ibm.com/mbox/"},{"id":71069,"url":"https://patchwork.plctlab.org/api/1.2/patches/71069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com/","msgid":"<527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com>","list_archive_url":null,"date":"2023-03-17T04:01:57","name":"[committed] Docs: Fix some too-long lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/527dd94b-9193-0887-4830-0ba0b3a83792@codesourcery.com/mbox/"},{"id":71070,"url":"https://patchwork.plctlab.org/api/1.2/patches/71070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee967b88-0343-aee6-c8b2-fa5478044aa8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T04:02:04","name":"[committed] Docs: Fix formatting issues in BPF built-ins documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee967b88-0343-aee6-c8b2-fa5478044aa8@codesourcery.com/mbox/"},{"id":71073,"url":"https://patchwork.plctlab.org/api/1.2/patches/71073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317045256.34563-1-ibuclaw@gdcproject.org/","msgid":"<20230317045256.34563-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-03-17T04:52:56","name":"[committed] d: Merge upstream dmd, druntime 5f7552bb28, phobos 67a47cf39.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317045256.34563-1-ibuclaw@gdcproject.org/mbox/"},{"id":71124,"url":"https://patchwork.plctlab.org/api/1.2/patches/71124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQe+haaKNvzZMw5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:04:10","name":"[committed] openmp: Fix up handling of doacross loops with noreturn body in loops [PR108685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQe+haaKNvzZMw5@tucnak/mbox/"},{"id":71129,"url":"https://patchwork.plctlab.org/api/1.2/patches/71129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQhTHb0CzN5mx/N@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:14:04","name":"c, ubsan: Instrument even shortened divisions [PR109151]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQhTHb0CzN5mx/N@tucnak/mbox/"},{"id":71131,"url":"https://patchwork.plctlab.org/api/1.2/patches/71131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQiMc3ZWcPFAAkV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:17:53","name":"testsuite: Fix up forwprop-39.c testcase [PR109145]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQiMc3ZWcPFAAkV@tucnak/mbox/"},{"id":71150,"url":"https://patchwork.plctlab.org/api/1.2/patches/71150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQkoxouS5jRLwv5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T08:28:19","name":"cgraphclones: Fix up target_clones cloning of functions with vector arguments [PR105554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBQkoxouS5jRLwv5@tucnak/mbox/"},{"id":71267,"url":"https://patchwork.plctlab.org/api/1.2/patches/71267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317121833.16A961346F@imap2.suse-dmz.suse.de/","msgid":"<20230317121833.16A961346F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-17T12:18:32","name":"tree-optimization/109170 - bogus use-after-free with __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317121833.16A961346F@imap2.suse-dmz.suse.de/mbox/"},{"id":71282,"url":"https://patchwork.plctlab.org/api/1.2/patches/71282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8324fe0-a8fc-9576-4985-a5b82af3fac0@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T13:10:11","name":"[pushed,PR109052] LRA: Implement combining secondary memory reload and original insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8324fe0-a8fc-9576-4985-a5b82af3fac0@redhat.com/mbox/"},{"id":71331,"url":"https://patchwork.plctlab.org/api/1.2/patches/71331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317152629.3944138-1-ppalka@redhat.com/","msgid":"<20230317152629.3944138-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-17T15:26:29","name":"c++: NTTP constraint depending on outer args [PR109160]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317152629.3944138-1-ppalka@redhat.com/mbox/"},{"id":71378,"url":"https://patchwork.plctlab.org/api/1.2/patches/71378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSnqPiQgZmSLO29@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T17:47:20","name":"tree-inline: Fix up multiversioning with vector arguments [PR105554]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSnqPiQgZmSLO29@tucnak/mbox/"},{"id":71379,"url":"https://patchwork.plctlab.org/api/1.2/patches/71379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSoqOLhNMhm4YTo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-17T17:51:36","name":"c++: Drop TREE_READONLY on vars (possibly) initialized by tls wrapper [PR109164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBSoqOLhNMhm4YTo@tucnak/mbox/"},{"id":71390,"url":"https://patchwork.plctlab.org/api/1.2/patches/71390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317184414.1335691-1-jason@redhat.com/","msgid":"<20230317184414.1335691-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T18:44:14","name":"[pushed] c++: namespace-scoped friend in local class [PR69410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317184414.1335691-1-jason@redhat.com/mbox/"},{"id":71426,"url":"https://patchwork.plctlab.org/api/1.2/patches/71426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317202908.42800-1-polacek@redhat.com/","msgid":"<20230317202908.42800-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:29:08","name":"c++: further -Wdangling-reference refinement [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317202908.42800-1-polacek@redhat.com/mbox/"},{"id":71428,"url":"https://patchwork.plctlab.org/api/1.2/patches/71428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317203601.55027-1-jwakely@redhat.com/","msgid":"<20230317203601.55027-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:36:01","name":"[committed] libstdc++: Add const to hash>::operator() [PR109165]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317203601.55027-1-jwakely@redhat.com/mbox/"},{"id":71430,"url":"https://patchwork.plctlab.org/api/1.2/patches/71430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317205349.3635562-1-dmalcolm@redhat.com/","msgid":"<20230317205349.3635562-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-17T20:53:49","name":"json: preserve key-insertion order [PR109163]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317205349.3635562-1-dmalcolm@redhat.com/mbox/"},{"id":71440,"url":"https://patchwork.plctlab.org/api/1.2/patches/71440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317213205.1383604-1-jason@redhat.com/","msgid":"<20230317213205.1383604-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T21:32:05","name":"[pushed] c++: throw and private destructor [PR109172]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317213205.1383604-1-jason@redhat.com/mbox/"},{"id":71458,"url":"https://patchwork.plctlab.org/api/1.2/patches/71458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7cc4f143-7033-4551-af8d-b4fbe021637d-1679089003636@3c-app-gmx-bs05/","msgid":"","list_archive_url":null,"date":"2023-03-17T21:36:43","name":"Fortran: procedures with BIND(C) attribute require explicit interface [PR85877]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7cc4f143-7033-4551-af8d-b4fbe021637d-1679089003636@3c-app-gmx-bs05/mbox/"},{"id":71499,"url":"https://patchwork.plctlab.org/api/1.2/patches/71499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d09518ad-277a-b1b7-dda4-1b9782ac022c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-17T22:35:12","name":"rs6000: Don'\''t ICE when compiling the __builtin_vec_xst_trunc built-in [PR109178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d09518ad-277a-b1b7-dda4-1b9782ac022c@linux.ibm.com/mbox/"},{"id":71520,"url":"https://patchwork.plctlab.org/api/1.2/patches/71520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317233249.1406928-1-jason@redhat.com/","msgid":"<20230317233249.1406928-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-17T23:32:49","name":"[pushed] c++: constant, array, lambda, template [PR108975]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230317233249.1406928-1-jason@redhat.com/mbox/"},{"id":71539,"url":"https://patchwork.plctlab.org/api/1.2/patches/71539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7ea52e2-ba72-aa92-3969-ab52f7d112d6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-18T00:12:24","name":"[committed] lra: Ignore debug insns and notes in combine_reload_insn [PR109179]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7ea52e2-ba72-aa92-3969-ab52f7d112d6@linux.ibm.com/mbox/"},{"id":71563,"url":"https://patchwork.plctlab.org/api/1.2/patches/71563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318080405.2799610-1-shorne@gmail.com/","msgid":"<20230318080405.2799610-1-shorne@gmail.com>","list_archive_url":null,"date":"2023-03-18T08:04:05","name":"or1k: Do not clear existing FPU exceptions before updating","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318080405.2799610-1-shorne@gmail.com/mbox/"},{"id":71626,"url":"https://patchwork.plctlab.org/api/1.2/patches/71626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBXUQ06ObKinZSSc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-18T15:09:55","name":"c++, v2: Drop TREE_READONLY on vars (possibly) initialized by tls wrapper [PR109164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBXUQ06ObKinZSSc@tucnak/mbox/"},{"id":71636,"url":"https://patchwork.plctlab.org/api/1.2/patches/71636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318165101.3685516-1-dmalcolm@redhat.com/","msgid":"<20230318165101.3685516-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-18T16:51:01","name":"[pushed] analyzer: fix ICE on certain longjmp calls [PR109094]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230318165101.3685516-1-dmalcolm@redhat.com/mbox/"},{"id":71645,"url":"https://patchwork.plctlab.org/api/1.2/patches/71645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0c911ee-4587-10d6-3c75-74538e7623be@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-18T18:23:59","name":"[wwwdocs] Mention random number generators in porting_to.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0c911ee-4587-10d6-3c75-74538e7623be@netcologne.de/mbox/"},{"id":71699,"url":"https://patchwork.plctlab.org/api/1.2/patches/71699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pXL_L9eySWVRCSX68GSqD56A=6DP3vBC1h__FgyuBOJ2g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T04:07:53","name":"c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pXL_L9eySWVRCSX68GSqD56A=6DP3vBC1h__FgyuBOJ2g@mail.gmail.com/mbox/"},{"id":71702,"url":"https://patchwork.plctlab.org/api/1.2/patches/71702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pVYKw0zzseC1H+yKwO5L77S001qcvwgwh80AizD80djOw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T04:21:46","name":"libstdc++: use new built-in trait __is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pVYKw0zzseC1H+yKwO5L77S001qcvwgwh80AizD80djOw@mail.gmail.com/mbox/"},{"id":71721,"url":"https://patchwork.plctlab.org/api/1.2/patches/71721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de/","msgid":"<24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de>","list_archive_url":null,"date":"2023-03-19T08:15:08","name":"[wwwdocs] Mention finalization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a27aff-54ee-442b-c150-9617a1ab4f19@netcologne.de/mbox/"},{"id":71722,"url":"https://patchwork.plctlab.org/api/1.2/patches/71722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eee8f01b-7e2c-c465-eaed-226714dc9655@netcologne.de/","msgid":"","list_archive_url":null,"date":"2023-03-19T08:32:45","name":"[fortran,doc] Explicitly mention undefined overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eee8f01b-7e2c-c465-eaed-226714dc9655@netcologne.de/mbox/"},{"id":71748,"url":"https://patchwork.plctlab.org/api/1.2/patches/71748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77f9c93-af16-a548-8d6b-d1954a11f02f@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T11:45:47","name":"[v2] rs6000: suboptimal code for returning bool value on target ppc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77f9c93-af16-a548-8d6b-d1954a11f02f@linux.ibm.com/mbox/"},{"id":71763,"url":"https://patchwork.plctlab.org/api/1.2/patches/71763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+m3Wd5z58BNng9_ftjiet5E=4TC3VsCZ_FopBbBZM=og@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T12:04:25","name":"[fortran] PR87127 - External function not recognised from within an associate block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+m3Wd5z58BNng9_ftjiet5E=4TC3VsCZ_FopBbBZM=og@mail.gmail.com/mbox/"},{"id":71836,"url":"https://patchwork.plctlab.org/api/1.2/patches/71836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ece2c4f5-6f01-3689-1c58-d6367dbabae0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T17:20:49","name":"[testsuite] rs6000: suboptimal code for returning bool value on target ppc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ece2c4f5-6f01-3689-1c58-d6367dbabae0@linux.ibm.com/mbox/"},{"id":71865,"url":"https://patchwork.plctlab.org/api/1.2/patches/71865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pWf_bYyeZcecrV=kmG_e6McD+JJPZuHJ2R2XeqJue6Wfw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-19T20:21:01","name":"c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pWf_bYyeZcecrV=kmG_e6McD+JJPZuHJ2R2XeqJue6Wfw@mail.gmail.com/mbox/"},{"id":71868,"url":"https://patchwork.plctlab.org/api/1.2/patches/71868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ff90764-385c-47bf-bc00-27d0f13bbbad-1679258653969@3c-app-gmx-bs65/","msgid":"","list_archive_url":null,"date":"2023-03-19T20:44:14","name":"Fortran: simplification of NEAREST for large argument [PR109186]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ff90764-385c-47bf-bc00-27d0f13bbbad-1679258653969@3c-app-gmx-bs65/mbox/"},{"id":71938,"url":"https://patchwork.plctlab.org/api/1.2/patches/71938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pW_2+9XTYMWEVHDyU8BKBpQEuGTkwmYVr+dcwUtzHVgsw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T02:53:19","name":"libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pW_2+9XTYMWEVHDyU8BKBpQEuGTkwmYVr+dcwUtzHVgsw@mail.gmail.com/mbox/"},{"id":71969,"url":"https://patchwork.plctlab.org/api/1.2/patches/71969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320042915.140622-1-juzhe.zhong@rivai.ai/","msgid":"<20230320042915.140622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-20T04:29:15","name":"RISC-V: Fix RVV ICE && runtine fail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320042915.140622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":71997,"url":"https://patchwork.plctlab.org/api/1.2/patches/71997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DHPmR-Rs2vT4hbq0pvPsbMthqpFPtfJ6GAUHhWxf31mLg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T06:07:52","name":"fix for __sanitizer_struct_mallinfo with mallinfo2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DHPmR-Rs2vT4hbq0pvPsbMthqpFPtfJ6GAUHhWxf31mLg@mail.gmail.com/mbox/"},{"id":72001,"url":"https://patchwork.plctlab.org/api/1.2/patches/72001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com/","msgid":"<928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:02","name":"[RFC/PATCH] sched: Consider debug insn in no_real_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b5bd5-387c-5400-6863-0c045fd22aef@linux.ibm.com/mbox/"},{"id":72003,"url":"https://patchwork.plctlab.org/api/1.2/patches/72003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com/","msgid":"<65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:31","name":"[v3] rs6000: Fix vector parity support [PR108699]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65e0c779-7764-bd67-649f-5c225c42949c@linux.ibm.com/mbox/"},{"id":72005,"url":"https://patchwork.plctlab.org/api/1.2/patches/72005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com/","msgid":"<1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:31:49","name":"rs6000: Ensure vec_sld shift count in allowable range [PR109082]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1efed6ac-e280-2f1c-15a5-9f13fcb8d6fa@linux.ibm.com/mbox/"},{"id":72006,"url":"https://patchwork.plctlab.org/api/1.2/patches/72006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com/","msgid":"<9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:32:15","name":"rs6000: Make _mm_slli_si128 and _mm_bslli_si128 consistent [PR109167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cac9802-cb71-ad06-fc2d-a79b486091fa@linux.ibm.com/mbox/"},{"id":72007,"url":"https://patchwork.plctlab.org/api/1.2/patches/72007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com/","msgid":"<050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com>","list_archive_url":null,"date":"2023-03-20T06:33:13","name":"libgcc: Use initarray section type for .init_stack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/050edd6f-0ad9-fbad-a9e5-03ec7b937971@linux.ibm.com/mbox/"},{"id":72020,"url":"https://patchwork.plctlab.org/api/1.2/patches/72020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pUMO-RG5TjMDKVVxWQn194gPDs4ub7FoTYn6LO_rsFymQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T07:44:59","name":"c++: implement __add_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAML+3pUMO-RG5TjMDKVVxWQn194gPDs4ub7FoTYn6LO_rsFymQ@mail.gmail.com/mbox/"},{"id":72048,"url":"https://patchwork.plctlab.org/api/1.2/patches/72048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320093629.15801-1-jwakely@redhat.com/","msgid":"<20230320093629.15801-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-20T09:36:29","name":"[committed] libstdc++: Remove template-head from std::expected ctor [PR109182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320093629.15801-1-jwakely@redhat.com/mbox/"},{"id":72145,"url":"https://patchwork.plctlab.org/api/1.2/patches/72145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-1-kmatsui@cs.washington.edu/","msgid":"<20230320131444.7505-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T13:14:43","name":"[1/2] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-1-kmatsui@cs.washington.edu/mbox/"},{"id":72146,"url":"https://patchwork.plctlab.org/api/1.2/patches/72146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-2-kmatsui@cs.washington.edu/","msgid":"<20230320131444.7505-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T13:14:44","name":"[2/2] libstdc++: use new built-in trait __is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320131444.7505-2-kmatsui@cs.washington.edu/mbox/"},{"id":72231,"url":"https://patchwork.plctlab.org/api/1.2/patches/72231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320155508.28497-1-polacek@redhat.com/","msgid":"<20230320155508.28497-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-03-20T15:55:08","name":"c++: explicit ctor and list-initialization [PR109159]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320155508.28497-1-polacek@redhat.com/mbox/"},{"id":72424,"url":"https://patchwork.plctlab.org/api/1.2/patches/72424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXY24C2b_eOZ0qZ56zWZKM5fTd9Au1cdde-A+z+Fv47Mw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T19:37:19","name":"Add notes for Go to gcc 12 and 13 changes file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXY24C2b_eOZ0qZ56zWZKM5fTd9Au1cdde-A+z+Fv47Mw@mail.gmail.com/mbox/"},{"id":72427,"url":"https://patchwork.plctlab.org/api/1.2/patches/72427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com/","msgid":"<9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com>","list_archive_url":null,"date":"2023-03-20T19:46:32","name":"stor-layout: Set TYPE_TYPELESS_STORAGE consistently for type variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cbb57b3-3e66-3618-217f-bf2689cc8825@codesourcery.com/mbox/"},{"id":72434,"url":"https://patchwork.plctlab.org/api/1.2/patches/72434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5a332952-25e6-4b5c-a5bc-51eeaee1b8af-1679342707586@3c-app-gmx-bs21/","msgid":"","list_archive_url":null,"date":"2023-03-20T20:05:07","name":"Fortran: fix documentation of -fno-underscoring [PR109216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5a332952-25e6-4b5c-a5bc-51eeaee1b8af-1679342707586@3c-app-gmx-bs21/mbox/"},{"id":72447,"url":"https://patchwork.plctlab.org/api/1.2/patches/72447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe491b4b-66a9-4d21-b8b1-9af4b907aa10-1679345864578@3c-app-gmx-bap50/","msgid":"","list_archive_url":null,"date":"2023-03-20T20:57:44","name":"Fortran: reject MODULE PROCEDURE outside generic module interface [PR99036]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe491b4b-66a9-4d21-b8b1-9af4b907aa10-1679345864578@3c-app-gmx-bap50/mbox/"},{"id":72491,"url":"https://patchwork.plctlab.org/api/1.2/patches/72491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320220625.3877024-1-dmalcolm@redhat.com/","msgid":"<20230320220625.3877024-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-20T22:06:25","name":"testsuite: always use UTF-8 in scan-sarif-file[-not] [PR105959]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320220625.3877024-1-dmalcolm@redhat.com/mbox/"},{"id":72492,"url":"https://patchwork.plctlab.org/api/1.2/patches/72492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBjY/ONm2xjNEped@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-20T22:06:52","name":"[v2] c++: further -Wdangling-reference refinement [PR107532]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBjY/ONm2xjNEped@redhat.com/mbox/"},{"id":72505,"url":"https://patchwork.plctlab.org/api/1.2/patches/72505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-1-kmatsui@cs.washington.edu/","msgid":"<20230320222249.20069-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T22:22:48","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-1-kmatsui@cs.washington.edu/mbox/"},{"id":72506,"url":"https://patchwork.plctlab.org/api/1.2/patches/72506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-2-kmatsui@cs.washington.edu/","msgid":"<20230320222249.20069-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-20T22:22:49","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320222249.20069-2-kmatsui@cs.washington.edu/mbox/"},{"id":72517,"url":"https://patchwork.plctlab.org/api/1.2/patches/72517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320230416.144993-1-jwakely@redhat.com/","msgid":"<20230320230416.144993-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-20T23:04:16","name":"[committed] libstdc++: Fix formatting in std::filesystem helper function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230320230416.144993-1-jwakely@redhat.com/mbox/"},{"id":72709,"url":"https://patchwork.plctlab.org/api/1.2/patches/72709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6ba084-3b72-7ae9-1cb3-9a3ad889eaf8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T06:29:50","name":"[PATCHv4,gfortran] Escalate failure when Hollerith constant to real conversion fails [PR103628]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6ba084-3b72-7ae9-1cb3-9a3ad889eaf8@linux.ibm.com/mbox/"},{"id":72734,"url":"https://patchwork.plctlab.org/api/1.2/patches/72734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321073849.21470-1-zhusonghe@eswincomputing.com/","msgid":"<20230321073849.21470-1-zhusonghe@eswincomputing.com>","list_archive_url":null,"date":"2023-03-21T07:38:49","name":"RISC-V: Fix loss of function to script '\''multilib-generator'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321073849.21470-1-zhusonghe@eswincomputing.com/mbox/"},{"id":72749,"url":"https://patchwork.plctlab.org/api/1.2/patches/72749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBlpWhnv6NXCrESh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T08:22:50","name":"tree: Fix up component_ref_sam_type handling of arrays of 0 sized elements [PR109215]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBlpWhnv6NXCrESh@tucnak/mbox/"},{"id":72782,"url":"https://patchwork.plctlab.org/api/1.2/patches/72782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12217370.T7Z3S40VBb@minbar/","msgid":"<12217370.T7Z3S40VBb@minbar>","list_archive_url":null,"date":"2023-03-21T09:23:01","name":"[1/2] libstdc++: Fix simd test compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12217370.T7Z3S40VBb@minbar/mbox/"},{"id":72783,"url":"https://patchwork.plctlab.org/api/1.2/patches/72783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25835488.EfDdHjke4D@minbar/","msgid":"<25835488.EfDdHjke4D@minbar>","list_archive_url":null,"date":"2023-03-21T09:23:10","name":"[2/2] libstdc++: Fix simd compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25835488.EfDdHjke4D@minbar/mbox/"},{"id":72811,"url":"https://patchwork.plctlab.org/api/1.2/patches/72811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-1-kmatsui@cs.washington.edu/","msgid":"<20230321111056.78121-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T11:10:55","name":"[1/2] c++: implement __add_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-1-kmatsui@cs.washington.edu/mbox/"},{"id":72810,"url":"https://patchwork.plctlab.org/api/1.2/patches/72810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-2-kmatsui@cs.washington.edu/","msgid":"<20230321111056.78121-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T11:10:56","name":"[2/2] libstdc++: use new built-in trait __add_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321111056.78121-2-kmatsui@cs.washington.edu/mbox/"},{"id":72835,"url":"https://patchwork.plctlab.org/api/1.2/patches/72835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com/","msgid":"<0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com>","list_archive_url":null,"date":"2023-03-21T12:10:04","name":"[V2,rs6000] Tweak modulo define_insns to eliminate register copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com/mbox/"},{"id":72837,"url":"https://patchwork.plctlab.org/api/1.2/patches/72837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmfsIQsseeBxUj/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T12:14:40","name":"testsuite: Fix up vect-simd-clone1[678]*.c tests [PR108898]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmfsIQsseeBxUj/@tucnak/mbox/"},{"id":72852,"url":"https://patchwork.plctlab.org/api/1.2/patches/72852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmnD+dfYKuh489q@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-21T12:46:07","name":"[jakub@redhat.com:,Re:,[PATCH] testsuite: Fix up vect-simd-clone1[678]*.c tests [PR108898]]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBmnD+dfYKuh489q@tucnak/mbox/"},{"id":72856,"url":"https://patchwork.plctlab.org/api/1.2/patches/72856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321130409.E34FE13440@imap2.suse-dmz.suse.de/","msgid":"<20230321130409.E34FE13440@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-21T13:04:09","name":"tree-optimization/109219 - avoid looking at STMT_SLP_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321130409.E34FE13440@imap2.suse-dmz.suse.de/mbox/"},{"id":72871,"url":"https://patchwork.plctlab.org/api/1.2/patches/72871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af3ada93-10cd-87e3-5836-045819d88090@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T13:42:56","name":"amdgcn: Add accumulator VGPR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af3ada93-10cd-87e3-5836-045819d88090@codesourcery.com/mbox/"},{"id":72872,"url":"https://patchwork.plctlab.org/api/1.2/patches/72872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df4f1039-c686-2155-cfee-6abefa8c8064@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-21T13:43:17","name":"PR tree-optimization/109192 - Terminate GORI calculations if a relation is not relevant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df4f1039-c686-2155-cfee-6abefa8c8064@redhat.com/mbox/"},{"id":72897,"url":"https://patchwork.plctlab.org/api/1.2/patches/72897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-1-kmatsui@cs.washington.edu/","msgid":"<20230321142159.86694-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T14:21:58","name":"[1/2] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-1-kmatsui@cs.washington.edu/mbox/"},{"id":72901,"url":"https://patchwork.plctlab.org/api/1.2/patches/72901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-2-kmatsui@cs.washington.edu/","msgid":"<20230321142159.86694-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T14:21:59","name":"[2/2] libstdc++: use new built-in trait __is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321142159.86694-2-kmatsui@cs.washington.edu/mbox/"},{"id":72909,"url":"https://patchwork.plctlab.org/api/1.2/patches/72909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321150844.1983244-1-jason@redhat.com/","msgid":"<20230321150844.1983244-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-21T15:08:44","name":"[pushed] c++: DMI in template with virtual base [PR106890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321150844.1983244-1-jason@redhat.com/mbox/"},{"id":72916,"url":"https://patchwork.plctlab.org/api/1.2/patches/72916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321153805.9120E2040E@pchp3.se.axis.com/","msgid":"<20230321153805.9120E2040E@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-21T15:38:05","name":"testsuite: Compile-only gcc.dg/tree-ssa/pr100359.c if ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321153805.9120E2040E@pchp3.se.axis.com/mbox/"},{"id":72926,"url":"https://patchwork.plctlab.org/api/1.2/patches/72926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0ti9k3o.fsf@euler.schwinge.homeip.net/","msgid":"<87r0ti9k3o.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-21T15:53:31","name":"libgomp: Simplify OpenMP reverse offload host <-> device memory copy implementation (was: [Patch] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0ti9k3o.fsf@euler.schwinge.homeip.net/mbox/"},{"id":72938,"url":"https://patchwork.plctlab.org/api/1.2/patches/72938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-1-kmatsui@cs.washington.edu/","msgid":"<20230321163949.1950-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T16:39:48","name":"[1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-1-kmatsui@cs.washington.edu/mbox/"},{"id":72939,"url":"https://patchwork.plctlab.org/api/1.2/patches/72939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-2-kmatsui@cs.washington.edu/","msgid":"<20230321163949.1950-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T16:39:49","name":"[2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321163949.1950-2-kmatsui@cs.washington.edu/mbox/"},{"id":72941,"url":"https://patchwork.plctlab.org/api/1.2/patches/72941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620BB0C1D1D2ED13BCE6CA9AC819@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-03-21T16:50:42","name":"[v2] libstdc++: Fix handling of surrogate CP in codecvt [PR108976]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620BB0C1D1D2ED13BCE6CA9AC819@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":72942,"url":"https://patchwork.plctlab.org/api/1.2/patches/72942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27030948.6Emhk5qWAg@minbar/","msgid":"<27030948.6Emhk5qWAg@minbar>","list_archive_url":null,"date":"2023-03-21T17:01:22","name":"[committed] libstdc++: Fix simd compilation with Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27030948.6Emhk5qWAg@minbar/mbox/"},{"id":72943,"url":"https://patchwork.plctlab.org/api/1.2/patches/72943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7568297.R56niFO833@minbar/","msgid":"<7568297.R56niFO833@minbar>","list_archive_url":null,"date":"2023-03-21T17:05:18","name":"libstdc++: Skip integer division optimization for Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7568297.R56niFO833@minbar/mbox/"},{"id":72944,"url":"https://patchwork.plctlab.org/api/1.2/patches/72944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5914330.taCxCBeP46@minbar/","msgid":"<5914330.taCxCBeP46@minbar>","list_archive_url":null,"date":"2023-03-21T17:05:23","name":"libstdc++: Use more precise __RECIPROCAL_MATH__ macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5914330.taCxCBeP46@minbar/mbox/"},{"id":72946,"url":"https://patchwork.plctlab.org/api/1.2/patches/72946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170700.4153-1-kmatsui@cs.washington.edu/","msgid":"<20230321170700.4153-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T17:06:59","name":"[v2,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170700.4153-1-kmatsui@cs.washington.edu/mbox/"},{"id":72948,"url":"https://patchwork.plctlab.org/api/1.2/patches/72948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170851.4277-2-kmatsui@cs.washington.edu/","msgid":"<20230321170851.4277-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T17:08:51","name":"[v2,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321170851.4277-2-kmatsui@cs.washington.edu/mbox/"},{"id":73010,"url":"https://patchwork.plctlab.org/api/1.2/patches/73010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rfpx5z3.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-21T19:24:48","name":"[wwwdocs] Document support for znver4 in gcc-13/changes.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rfpx5z3.fsf@suse.cz/mbox/"},{"id":73097,"url":"https://patchwork.plctlab.org/api/1.2/patches/73097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-1-kmatsui@cs.washington.edu/","msgid":"<20230321223957.7176-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T22:39:56","name":"[1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-1-kmatsui@cs.washington.edu/mbox/"},{"id":73099,"url":"https://patchwork.plctlab.org/api/1.2/patches/73099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-2-kmatsui@cs.washington.edu/","msgid":"<20230321223957.7176-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-21T22:39:57","name":"[2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230321223957.7176-2-kmatsui@cs.washington.edu/mbox/"},{"id":73112,"url":"https://patchwork.plctlab.org/api/1.2/patches/73112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBpDaXeXCMBNxNWk@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-21T23:53:13","name":"PR target/105325, Make load/cmp fusion know about prefixed loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBpDaXeXCMBNxNWk@toto.the-meissners.org/mbox/"},{"id":73113,"url":"https://patchwork.plctlab.org/api/1.2/patches/73113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-1-kmatsui@cs.washington.edu/","msgid":"<20230322001142.13422-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T00:11:41","name":"[1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-1-kmatsui@cs.washington.edu/mbox/"},{"id":73114,"url":"https://patchwork.plctlab.org/api/1.2/patches/73114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-2-kmatsui@cs.washington.edu/","msgid":"<20230322001142.13422-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T00:11:42","name":"[2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322001142.13422-2-kmatsui@cs.washington.edu/mbox/"},{"id":73144,"url":"https://patchwork.plctlab.org/api/1.2/patches/73144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com/","msgid":"<527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com>","list_archive_url":null,"date":"2023-03-22T01:40:59","name":"[V2] Docs, OpenMP: Correct internal documentation of OMP_FOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/527938c3-d06e-641a-84c8-081e5d891ec0@codesourcery.com/mbox/"},{"id":73162,"url":"https://patchwork.plctlab.org/api/1.2/patches/73162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322024956.74271-1-juzhe.zhong@rivai.ai/","msgid":"<20230322024956.74271-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T02:49:56","name":"RISC-V: Fix ICE in LRA for LMUL < 1 vector spillings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322024956.74271-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73163,"url":"https://patchwork.plctlab.org/api/1.2/patches/73163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322025701.3369256-1-hongtao.liu@intel.com/","msgid":"<20230322025701.3369256-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-22T02:57:01","name":"Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it'\''s not used anymore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322025701.3369256-1-hongtao.liu@intel.com/mbox/"},{"id":73192,"url":"https://patchwork.plctlab.org/api/1.2/patches/73192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050330.31903-1-shiyulong@iscas.ac.cn/","msgid":"<20230322050330.31903-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-22T05:03:30","name":"[V3] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050330.31903-1-shiyulong@iscas.ac.cn/mbox/"},{"id":73193,"url":"https://patchwork.plctlab.org/api/1.2/patches/73193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050623.229416-1-juzhe.zhong@rivai.ai/","msgid":"<20230322050623.229416-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T05:06:23","name":"RISC-V: Fix PR109228","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322050623.229416-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73337,"url":"https://patchwork.plctlab.org/api/1.2/patches/73337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6422fead-a964-5497-2422-510acf753a4d@codesourcery.com/","msgid":"<6422fead-a964-5497-2422-510acf753a4d@codesourcery.com>","list_archive_url":null,"date":"2023-03-22T09:59:28","name":"[committed] MAINTAINERS: Add myself as OpenMP and libgomp maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6422fead-a964-5497-2422-510acf753a4d@codesourcery.com/mbox/"},{"id":73338,"url":"https://patchwork.plctlab.org/api/1.2/patches/73338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100240.DDC59385735E@sourceware.org/","msgid":"<20230322100240.DDC59385735E@sourceware.org>","list_archive_url":null,"date":"2023-03-22T10:01:54","name":"rtl-optimization/109237 - quadraticness in delete_trivially_dead_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100240.DDC59385735E@sourceware.org/mbox/"},{"id":73339,"url":"https://patchwork.plctlab.org/api/1.2/patches/73339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100435.ECD873858416@sourceware.org/","msgid":"<20230322100435.ECD873858416@sourceware.org>","list_archive_url":null,"date":"2023-03-22T10:03:42","name":"rtl-optimization/109237 - speedup bb_is_just_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322100435.ECD873858416@sourceware.org/mbox/"},{"id":73341,"url":"https://patchwork.plctlab.org/api/1.2/patches/73341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrVY9tS995rgIVj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-22T10:16:03","name":"match.pd: Fix up fneg/fadd simplification [PR109230]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrVY9tS995rgIVj@tucnak/mbox/"},{"id":73342,"url":"https://patchwork.plctlab.org/api/1.2/patches/73342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322104230.343644-1-jwakely@redhat.com/","msgid":"<20230322104230.343644-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T10:42:30","name":"wwwdocs: Clarify experimental status of C++17 prior to GCC 9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322104230.343644-1-jwakely@redhat.com/mbox/"},{"id":73370,"url":"https://patchwork.plctlab.org/api/1.2/patches/73370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrnTg7r6/KAceFW@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T11:32:30","name":"c++: Avoid duplicate diagnostic calling unavailable function [PR109177]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBrnTg7r6/KAceFW@arm.com/mbox/"},{"id":73397,"url":"https://patchwork.plctlab.org/api/1.2/patches/73397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322121556.94496-1-juzhe.zhong@rivai.ai/","msgid":"<20230322121556.94496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-22T12:15:56","name":"RISC-V: Fix redundant vmv1r.v instruction in vmsge.vx codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322121556.94496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":73400,"url":"https://patchwork.plctlab.org/api/1.2/patches/73400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322123036.8709B385B519@sourceware.org/","msgid":"<20230322123036.8709B385B519@sourceware.org>","list_archive_url":null,"date":"2023-03-22T12:29:52","name":"tree-optimization/109237 - last_stmt is possibly slow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322123036.8709B385B519@sourceware.org/mbox/"},{"id":73402,"url":"https://patchwork.plctlab.org/api/1.2/patches/73402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322124341.3976040-1-dmalcolm@redhat.com/","msgid":"<20230322124341.3976040-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-22T12:43:41","name":"[pushed] analyzer: fix false +ves from -Wanalyzer-deref-before-check due to inlining [PR109239]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322124341.3976040-1-dmalcolm@redhat.com/mbox/"},{"id":73511,"url":"https://patchwork.plctlab.org/api/1.2/patches/73511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322160448.2494466-1-jason@redhat.com/","msgid":"<20230322160448.2494466-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-22T16:04:48","name":"[pushed] c++: attribute on dtor in template [PR108795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322160448.2494466-1-jason@redhat.com/mbox/"},{"id":73582,"url":"https://patchwork.plctlab.org/api/1.2/patches/73582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb0f104a-ee16-0692-c0a1-f0c1c8b4ba8d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T17:37:39","name":"[pushed,PR109137] LRA: Do not repeat inheritance and live range splitting in case of asm error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb0f104a-ee16-0692-c0a1-f0c1c8b4ba8d@redhat.com/mbox/"},{"id":73591,"url":"https://patchwork.plctlab.org/api/1.2/patches/73591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174942.407933-1-jwakely@redhat.com/","msgid":"<20230322174942.407933-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:42","name":"[committed] libstdc++: Make std::istream_iterator copy ctor constexpr (LWG 3600)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174942.407933-1-jwakely@redhat.com/mbox/"},{"id":73589,"url":"https://patchwork.plctlab.org/api/1.2/patches/73589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174947.407957-1-jwakely@redhat.com/","msgid":"<20230322174947.407957-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:47","name":"[committed] libstdc++: Add allocator-extended constructors to std::match_results (LWG 2195)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174947.407957-1-jwakely@redhat.com/mbox/"},{"id":73588,"url":"https://patchwork.plctlab.org/api/1.2/patches/73588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174952.407973-1-jwakely@redhat.com/","msgid":"<20230322174952.407973-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:52","name":"[committed] libstdc++: Add comment to (LWG 3720)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174952.407973-1-jwakely@redhat.com/mbox/"},{"id":73590,"url":"https://patchwork.plctlab.org/api/1.2/patches/73590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174958.407987-1-jwakely@redhat.com/","msgid":"<20230322174958.407987-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:49:58","name":"[committed] libstdc++: Use rvalues in std::string::resize_and_overwrite (LWG 3645)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322174958.407987-1-jwakely@redhat.com/mbox/"},{"id":73592,"url":"https://patchwork.plctlab.org/api/1.2/patches/73592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175003.408005-1-jwakely@redhat.com/","msgid":"<20230322175003.408005-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:03","name":"[committed] libstdc++: Add missing __cpp_lib_format macro to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175003.408005-1-jwakely@redhat.com/mbox/"},{"id":73595,"url":"https://patchwork.plctlab.org/api/1.2/patches/73595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175016.408028-1-jwakely@redhat.com/","msgid":"<20230322175016.408028-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:16","name":"[committed] libstdc++: Define __cpp_lib_constexpr_algorithms in (LWG 3792)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175016.408028-1-jwakely@redhat.com/mbox/"},{"id":73596,"url":"https://patchwork.plctlab.org/api/1.2/patches/73596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175026.408061-1-jwakely@redhat.com/","msgid":"<20230322175026.408061-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T17:50:26","name":"[committed] libstdc++: Remove std::formatter specialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322175026.408061-1-jwakely@redhat.com/mbox/"},{"id":73611,"url":"https://patchwork.plctlab.org/api/1.2/patches/73611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7df2d884-20c1-4801-a213-d2e676f4dafd-1679509823088@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2023-03-22T18:30:23","name":"[committed] Fortran: improve checking of FINAL subroutine arguments [PR104572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7df2d884-20c1-4801-a213-d2e676f4dafd-1679509823088@3c-app-gmx-bap55/mbox/"},{"id":73638,"url":"https://patchwork.plctlab.org/api/1.2/patches/73638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322193016.2560128-1-jason@redhat.com/","msgid":"<20230322193016.2560128-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-22T19:30:16","name":"[pushed] c++: array bound partial ordering [PR108390]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322193016.2560128-1-jason@redhat.com/mbox/"},{"id":73652,"url":"https://patchwork.plctlab.org/api/1.2/patches/73652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWM7GsJ_tvAFbjdCaqBWcHUdck_zGgXKG+k-hV_TqsZcQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-22T19:58:41","name":"Go patch committed: Add missing Slice_info_expression::do_traverse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcWM7GsJ_tvAFbjdCaqBWcHUdck_zGgXKG+k-hV_TqsZcQ@mail.gmail.com/mbox/"},{"id":73693,"url":"https://patchwork.plctlab.org/api/1.2/patches/73693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322232709.457972-1-jwakely@redhat.com/","msgid":"<20230322232709.457972-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-22T23:27:09","name":"[committed] libstdc++: Fix assigning nullptr to std::atomic> (LWG 3893)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322232709.457972-1-jwakely@redhat.com/mbox/"},{"id":73697,"url":"https://patchwork.plctlab.org/api/1.2/patches/73697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-1-kmatsui@cs.washington.edu/","msgid":"<20230322234134.14578-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T23:41:33","name":"[1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-1-kmatsui@cs.washington.edu/mbox/"},{"id":73698,"url":"https://patchwork.plctlab.org/api/1.2/patches/73698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-2-kmatsui@cs.washington.edu/","msgid":"<20230322234134.14578-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-22T23:41:34","name":"[2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230322234134.14578-2-kmatsui@cs.washington.edu/mbox/"},{"id":73729,"url":"https://patchwork.plctlab.org/api/1.2/patches/73729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004122.34600-1-kmatsui@cs.washington.edu/","msgid":"<20230323004122.34600-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T00:41:21","name":"[v2,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004122.34600-1-kmatsui@cs.washington.edu/mbox/"},{"id":73730,"url":"https://patchwork.plctlab.org/api/1.2/patches/73730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004207.34784-2-kmatsui@cs.washington.edu/","msgid":"<20230323004207.34784-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T00:42:07","name":"[v2,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323004207.34784-2-kmatsui@cs.washington.edu/mbox/"},{"id":73747,"url":"https://patchwork.plctlab.org/api/1.2/patches/73747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323020458.54515-1-kmatsui@cs.washington.edu/","msgid":"<20230323020458.54515-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T02:04:58","name":"libstdc++: use __bool_constant instead of integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323020458.54515-1-kmatsui@cs.washington.edu/mbox/"},{"id":73758,"url":"https://patchwork.plctlab.org/api/1.2/patches/73758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfdwma90.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-23T03:12:27","name":"[v2,#1/2] enable adjustment of return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsfdwma90.fsf@lxoliva.fsfla.org/mbox/"},{"id":73759,"url":"https://patchwork.plctlab.org/api/1.2/patches/73759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7okma45.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-03-23T03:15:22","name":"[v2,#2/2,rs6000] adjust return_pc debug attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7okma45.fsf@lxoliva.fsfla.org/mbox/"},{"id":73760,"url":"https://patchwork.plctlab.org/api/1.2/patches/73760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323032355.2678239-1-jason@redhat.com/","msgid":"<20230323032355.2678239-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T03:23:55","name":"[pushed] c++: local class in nested generic lambda [PR109241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323032355.2678239-1-jason@redhat.com/mbox/"},{"id":73804,"url":"https://patchwork.plctlab.org/api/1.2/patches/73804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323051151.2982138-1-kevinl@rivosinc.com/","msgid":"<20230323051151.2982138-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-03-23T05:11:51","name":"[RFC] vect: verify that nelt is greater than one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323051151.2982138-1-kevinl@rivosinc.com/mbox/"},{"id":73883,"url":"https://patchwork.plctlab.org/api/1.2/patches/73883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323080734.423-1-jinma@linux.alibaba.com/","msgid":"<20230323080734.423-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-03-23T08:07:34","name":"In the ready lists of pipeline, put unrecog insns (such as CLOBBER, USE) at the latest to issue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323080734.423-1-jinma@linux.alibaba.com/mbox/"},{"id":73893,"url":"https://patchwork.plctlab.org/api/1.2/patches/73893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBwOTvM4REORW9kQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-23T08:31:10","name":"tree-vect-generic: Fix up expand_vector_condition [PR109176]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBwOTvM4REORW9kQ@tucnak/mbox/"},{"id":73933,"url":"https://patchwork.plctlab.org/api/1.2/patches/73933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com/","msgid":"<0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T09:28:26","name":"[v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b7ce95f-d86d-b960-3c20-4a62bdc2be9c@codesourcery.com/mbox/"},{"id":73964,"url":"https://patchwork.plctlab.org/api/1.2/patches/73964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cv7vkxc.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-23T10:09:19","name":"ipa: Avoid another ICE when dealing with type-incompatibilities (PR 108959)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri67cv7vkxc.fsf@suse.cz/mbox/"},{"id":73980,"url":"https://patchwork.plctlab.org/api/1.2/patches/73980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com/","msgid":"<4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com>","list_archive_url":null,"date":"2023-03-23T10:38:32","name":"rtl-optimization: ppc backend generates unnecessary signed extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c0b6b4f-bbc1-8dd0-a91c-ffed028b4873@linux.ibm.com/mbox/"},{"id":73999,"url":"https://patchwork.plctlab.org/api/1.2/patches/73999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323110608.42262-1-kmatsui@cs.washington.edu/","msgid":"<20230323110608.42262-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-23T11:06:08","name":"libstdc++: use __bool_constant instead of integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323110608.42262-1-kmatsui@cs.washington.edu/mbox/"},{"id":74009,"url":"https://patchwork.plctlab.org/api/1.2/patches/74009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db0a824f-d244-a3bc-6ffd-2dc87b6635db@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-03-23T11:32:20","name":"[committed] amdgcn: vec_extract no-op insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db0a824f-d244-a3bc-6ffd-2dc87b6635db@codesourcery.com/mbox/"},{"id":74015,"url":"https://patchwork.plctlab.org/api/1.2/patches/74015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com/","msgid":"<3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T11:47:41","name":"[committed] amdgcn: Fix register size bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3da64e3a-9067-77dd-374e-664445af3344@codesourcery.com/mbox/"},{"id":74063,"url":"https://patchwork.plctlab.org/api/1.2/patches/74063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95180085-897F-4B87-BE0E-78ACF1808326@oracle.com/","msgid":"<95180085-897F-4B87-BE0E-78ACF1808326@oracle.com>","list_archive_url":null,"date":"2023-03-23T13:03:45","name":"[V5,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95180085-897F-4B87-BE0E-78ACF1808326@oracle.com/mbox/"},{"id":74065,"url":"https://patchwork.plctlab.org/api/1.2/patches/74065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C8A44F64-E794-4BC2-9CDF-16549EF0BD8B@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-03-23T13:05:16","name":"[V5,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C8A44F64-E794-4BC2-9CDF-16549EF0BD8B@oracle.com/mbox/"},{"id":74071,"url":"https://patchwork.plctlab.org/api/1.2/patches/74071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBxU3ojbATAS1RNX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-23T13:32:14","name":"ranger: Ranger meets aspell","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZBxU3ojbATAS1RNX@tucnak/mbox/"},{"id":74080,"url":"https://patchwork.plctlab.org/api/1.2/patches/74080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com/","msgid":"<8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T13:41:15","name":"[OG12,committed] Fortran: Add attr.class_ok check for generate_callback_wrapper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8611cf64-f6c0-9821-eb83-246476288bb8@codesourcery.com/mbox/"},{"id":74091,"url":"https://patchwork.plctlab.org/api/1.2/patches/74091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2623454.BddDVKsqQX@fomalhaut/","msgid":"<2623454.BddDVKsqQX@fomalhaut>","list_archive_url":null,"date":"2023-03-23T14:14:11","name":"(testsuite] Skip gnat.dg/div_zero.adb on Aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2623454.BddDVKsqQX@fomalhaut/mbox/"},{"id":74097,"url":"https://patchwork.plctlab.org/api/1.2/patches/74097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323150055.2694558-1-ppalka@redhat.com/","msgid":"<20230323150055.2694558-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T15:00:55","name":"c++: outer '\''this'\'' leaking into local class [PR106969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323150055.2694558-1-ppalka@redhat.com/mbox/"},{"id":74102,"url":"https://patchwork.plctlab.org/api/1.2/patches/74102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323153505.0E8A313596@imap2.suse-dmz.suse.de/","msgid":"<20230323153505.0E8A313596@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T15:35:04","name":"tree-optimization/109262 - ICE with non-call EH and forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323153505.0E8A313596@imap2.suse-dmz.suse.de/mbox/"},{"id":74105,"url":"https://patchwork.plctlab.org/api/1.2/patches/74105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323160030.02D4813596@imap2.suse-dmz.suse.de/","msgid":"<20230323160030.02D4813596@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T16:00:29","name":"lto/109263 - lto-wrapper and -g0 -ggdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323160030.02D4813596@imap2.suse-dmz.suse.de/mbox/"},{"id":74108,"url":"https://patchwork.plctlab.org/api/1.2/patches/74108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323162146.791FA132C2@imap2.suse-dmz.suse.de/","msgid":"<20230323162146.791FA132C2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-23T16:21:46","name":"tree-optimization/107569 - avoid wrecking earlier folding in FRE/PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323162146.791FA132C2@imap2.suse-dmz.suse.de/mbox/"},{"id":74129,"url":"https://patchwork.plctlab.org/api/1.2/patches/74129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323172557.3415682-1-apinski@marvell.com/","msgid":"<20230323172557.3415682-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-23T17:25:57","name":"c: [PR84900] cast of compound literal does not cause the code to become a non-lvalue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323172557.3415682-1-apinski@marvell.com/mbox/"},{"id":74166,"url":"https://patchwork.plctlab.org/api/1.2/patches/74166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com/","msgid":"<96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com>","list_archive_url":null,"date":"2023-03-23T18:37:01","name":"PR tree-optimization/109238 - Ranger cache dominator queries should ignore backedges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96146be5-a7aa-23fb-0052-d2d81ff60c08@redhat.com/mbox/"},{"id":74202,"url":"https://patchwork.plctlab.org/api/1.2/patches/74202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com/","msgid":"<830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com>","list_archive_url":null,"date":"2023-03-23T19:57:39","name":"[OG12,committed] Fortran/OpenMP: Fix '\''alloc'\'' and '\''from'\'' mapping for allocatable components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/830e6e9d-af1c-31f7-8ec6-9eabe5ebcf9b@codesourcery.com/mbox/"},{"id":74208,"url":"https://patchwork.plctlab.org/api/1.2/patches/74208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323203507.2960052-1-jason@redhat.com/","msgid":"<20230323203507.2960052-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T20:35:07","name":"[RFC] c-family: -Wsequence-point and COMPONENT_REF [PR107163]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323203507.2960052-1-jason@redhat.com/mbox/"},{"id":74217,"url":"https://patchwork.plctlab.org/api/1.2/patches/74217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323205838.3AA8B20430@pchp3.se.axis.com/","msgid":"<20230323205838.3AA8B20430@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-23T20:58:38","name":"[COMMITTED] testsuite: Xfail gcc.dg/tree-ssa/ssa-fre-100.c for ! natural_alignment_32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323205838.3AA8B20430@pchp3.se.axis.com/mbox/"},{"id":74223,"url":"https://patchwork.plctlab.org/api/1.2/patches/74223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-1-ppalka@redhat.com/","msgid":"<20230323211803.396326-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:18:02","name":"[1/2] c++: improve \"NTTP argument considered unused\" fix [PR53164, PR105848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-1-ppalka@redhat.com/mbox/"},{"id":74224,"url":"https://patchwork.plctlab.org/api/1.2/patches/74224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-2-ppalka@redhat.com/","msgid":"<20230323211803.396326-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:18:03","name":"[2/2] c++: duplicate \"use of deleted fn\" diagnostic [PR106880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323211803.396326-2-ppalka@redhat.com/mbox/"},{"id":74233,"url":"https://patchwork.plctlab.org/api/1.2/patches/74233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323213908.2988082-1-jason@redhat.com/","msgid":"<20230323213908.2988082-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-23T21:39:08","name":"[pushed] c++: constexpr PMF conversion [PR105996]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230323213908.2988082-1-jason@redhat.com/mbox/"},{"id":74298,"url":"https://patchwork.plctlab.org/api/1.2/patches/74298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015239.13455-1-wangfeng@eswincomputing.com/","msgid":"<20230324015239.13455-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-24T01:52:39","name":"RISC-V: Optimize load memory data in rv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015239.13455-1-wangfeng@eswincomputing.com/mbox/"},{"id":74299,"url":"https://patchwork.plctlab.org/api/1.2/patches/74299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015324.13616-1-wangfeng@eswincomputing.com/","msgid":"<20230324015324.13616-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-03-24T01:53:24","name":"RISC-V: Optimize zbb ins sext.b and sext.h in rv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324015324.13616-1-wangfeng@eswincomputing.com/mbox/"},{"id":74369,"url":"https://patchwork.plctlab.org/api/1.2/patches/74369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324064222.205360-1-juzhe.zhong@rivai.ai/","msgid":"<20230324064222.205360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T06:42:22","name":"[GCC14,QUEUE] RISC-V: Fix RVV register order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324064222.205360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74374,"url":"https://patchwork.plctlab.org/api/1.2/patches/74374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324065725.70549-1-juzhe.zhong@rivai.ai/","msgid":"<20230324065725.70549-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T06:57:25","name":"[GCC14,QUEUE] RISC-V: Fix RVV register order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324065725.70549-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74482,"url":"https://patchwork.plctlab.org/api/1.2/patches/74482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1kx/ykFT0v62j+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T08:52:23","name":"[committed] testsuite: Add testcase for already fixed PR [PR99739]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1kx/ykFT0v62j+@tucnak/mbox/"},{"id":74436,"url":"https://patchwork.plctlab.org/api/1.2/patches/74436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1lLvJxLGCAk2GT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T08:54:06","name":"[committed] testsuite: Fix up gcc.target/i386/pr109137.c testcase [PR109137]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1lLvJxLGCAk2GT@tucnak/mbox/"},{"id":74444,"url":"https://patchwork.plctlab.org/api/1.2/patches/74444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1oZcqg/ujxE+D+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T09:07:49","name":"builtins: Fix up ICE in inline_string_cmp [PR109258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1oZcqg/ujxE+D+@tucnak/mbox/"},{"id":74445,"url":"https://patchwork.plctlab.org/api/1.2/patches/74445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1r8ncB77h3D2Si@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T09:22:58","name":"go: Fix up go.test/test/fixedbugs/bug207.go failure [PR109258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB1r8ncB77h3D2Si@tucnak/mbox/"},{"id":74474,"url":"https://patchwork.plctlab.org/api/1.2/patches/74474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324101942.7978E138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324101942.7978E138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T10:19:42","name":"[1/2] Disallow -gno-dwarf, gno-dwarf-N, -gno-gdb and -gno-vms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324101942.7978E138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74476,"url":"https://patchwork.plctlab.org/api/1.2/patches/74476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324102009.C79A5138F1@imap2.suse-dmz.suse.de/","msgid":"<20230324102009.C79A5138F1@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T10:20:09","name":"[2/2] Remove Negative(gwarf-) from gdwarf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324102009.C79A5138F1@imap2.suse-dmz.suse.de/mbox/"},{"id":74487,"url":"https://patchwork.plctlab.org/api/1.2/patches/74487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112846.283687-1-juzhe.zhong@rivai.ai/","msgid":"<20230324112846.283687-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T11:28:46","name":"RISC-V: Fine tune RVV narrow instruction (source EEW > dest DEST) RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112846.283687-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74488,"url":"https://patchwork.plctlab.org/api/1.2/patches/74488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112927.285817-1-juzhe.zhong@rivai.ai/","msgid":"<20230324112927.285817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-24T11:29:27","name":"[GCC14,QUEUE] RISC-V: Fine tune RVV narrow instruction (source EEW > dest DEST) RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324112927.285817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":74514,"url":"https://patchwork.plctlab.org/api/1.2/patches/74514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB2LgwL5rK/JI+KH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T11:37:39","name":"[wwwdocs] Mention the GNU C enum changes in gcc-13/changes.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB2LgwL5rK/JI+KH@tucnak/mbox/"},{"id":74530,"url":"https://patchwork.plctlab.org/api/1.2/patches/74530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130319.5E23D138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324130319.5E23D138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T13:03:18","name":"[1/2] Add emulated scatter capability to the vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130319.5E23D138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74531,"url":"https://patchwork.plctlab.org/api/1.2/patches/74531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de/","msgid":"<20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-24T13:04:03","name":"[2/2,i386] Adjust costing of emulated vectorized gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324130404.2C4ED138ED@imap2.suse-dmz.suse.de/mbox/"},{"id":74557,"url":"https://patchwork.plctlab.org/api/1.2/patches/74557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324133928.14753-1-alx@kernel.org/","msgid":"<20230324133928.14753-1-alx@kernel.org>","list_archive_url":null,"date":"2023-03-24T13:39:28","name":"[v2] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324133928.14753-1-alx@kernel.org/mbox/"},{"id":74566,"url":"https://patchwork.plctlab.org/api/1.2/patches/74566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324141157.1646192-1-pan2.li@intel.com/","msgid":"<20230324141157.1646192-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-24T14:11:57","name":"RTL: Bugfix for wrong code with v16hi compare & mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324141157.1646192-1-pan2.li@intel.com/mbox/"},{"id":74599,"url":"https://patchwork.plctlab.org/api/1.2/patches/74599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-2-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-2-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:39","name":"[1/7] openmp: Add Fortran support for \"omp unroll\" directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-2-frederik@codesourcery.com/mbox/"},{"id":74598,"url":"https://patchwork.plctlab.org/api/1.2/patches/74598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-3-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-3-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:40","name":"[2/7] openmp: Add C/C++ support for \"omp unroll\" directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-3-frederik@codesourcery.com/mbox/"},{"id":74601,"url":"https://patchwork.plctlab.org/api/1.2/patches/74601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-4-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-4-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:41","name":"[3/7] openacc: Rename OMP_CLAUSE_TILE to OMP_CLAUSE_OACC_TILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-4-frederik@codesourcery.com/mbox/"},{"id":74611,"url":"https://patchwork.plctlab.org/api/1.2/patches/74611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-5-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-5-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:42","name":"[4/7] openmp: Add Fortran support for \"omp tile\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-5-frederik@codesourcery.com/mbox/"},{"id":74612,"url":"https://patchwork.plctlab.org/api/1.2/patches/74612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-6-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-6-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:43","name":"[5/7] openmp: Add C/C++ support for \"omp tile\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-6-frederik@codesourcery.com/mbox/"},{"id":74616,"url":"https://patchwork.plctlab.org/api/1.2/patches/74616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-7-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-7-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:44","name":"[6/7] openmp: Add Fortran support for loop transformations on inner loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-7-frederik@codesourcery.com/mbox/"},{"id":74618,"url":"https://patchwork.plctlab.org/api/1.2/patches/74618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-8-frederik@codesourcery.com/","msgid":"<20230324153046.3996092-8-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T15:30:45","name":"[7/7] openmp: Add C/C++ support for loop transformations on inner loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324153046.3996092-8-frederik@codesourcery.com/mbox/"},{"id":74604,"url":"https://patchwork.plctlab.org/api/1.2/patches/74604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ileq9n5v.fsf@euler.schwinge.homeip.net/","msgid":"<87ileq9n5v.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:36:28","name":"[og12] In '\''libgomp/target.c:gomp_unmap_vars_internal'\'', defer '\''gomp_remove_var'\'' (was: [PATCH, v2, OpenMP 5.0, libgomp] Structure element mapping for OpenMP 5.0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ileq9n5v.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74610,"url":"https://patchwork.plctlab.org/api/1.2/patches/74610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edpe9muz.fsf@euler.schwinge.homeip.net/","msgid":"<87edpe9muz.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:43:00","name":"[og12] libgomp: Simplify OpenMP reverse offload host <-> device memory copy implementation (was: [Patch] libgomp/nvptx: Prepare for reverse-offload callback handling)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edpe9muz.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74615,"url":"https://patchwork.plctlab.org/api/1.2/patches/74615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkki9mji.fsf@euler.schwinge.homeip.net/","msgid":"<87bkki9mji.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T15:49:53","name":"[og12] libgomp: Document OpenMP '\''pinned'\'' memory (was: [PATCH] libgomp, openmp: pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkki9mji.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74624,"url":"https://patchwork.plctlab.org/api/1.2/patches/74624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfm9l8f.fsf@euler.schwinge.homeip.net/","msgid":"<878rfm9l8f.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T16:18:08","name":"Add caveat/safeguard to OpenMP: Handle descriptors in target'\''s firstprivate [PR104949] (was: [Patch] OpenMP: Handle descriptors in target'\''s firstprivate [PR104949])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfm9l8f.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74633,"url":"https://patchwork.plctlab.org/api/1.2/patches/74633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324163153.3200112-1-jason@redhat.com/","msgid":"<20230324163153.3200112-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-24T16:31:53","name":"[pushed] c++: default template arg, partial ordering [PR105481]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324163153.3200112-1-jason@redhat.com/mbox/"},{"id":74634,"url":"https://patchwork.plctlab.org/api/1.2/patches/74634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8285vg.fsf@euler.schwinge.homeip.net/","msgid":"<87zg8285vg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-24T16:35:15","name":"[og12] Add '\''libgomp.c/alloc-ompx_host_mem_alloc-1.c'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg8285vg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":74635,"url":"https://patchwork.plctlab.org/api/1.2/patches/74635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com/","msgid":"<3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com>","list_archive_url":null,"date":"2023-03-24T16:37:39","name":"[committed] libgomp.texi: Fix wording in GCN offload specifics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf032e0-9ca6-0a2a-ef31-61408c6138cb@codesourcery.com/mbox/"},{"id":74743,"url":"https://patchwork.plctlab.org/api/1.2/patches/74743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7f6b0c0f-cba2-46f2-a5ef-9085b5268c50-1679692495210@3c-app-gmx-bap63/","msgid":"","list_archive_url":null,"date":"2023-03-24T21:14:55","name":"[committed] Fortran: fix FE memleak with BOZ expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-7f6b0c0f-cba2-46f2-a5ef-9085b5268c50-1679692495210@3c-app-gmx-bap63/mbox/"},{"id":74750,"url":"https://patchwork.plctlab.org/api/1.2/patches/74750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4dSDShmhmy6Y6k@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-24T21:59:36","name":"aarch64, builtins: Include PR registers in FUNCTION_ARG_REGNO_P etc. [PR109254]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4dSDShmhmy6Y6k@tucnak/mbox/"},{"id":74786,"url":"https://patchwork.plctlab.org/api/1.2/patches/74786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4s+1RqBNR49tj/@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-24T23:06:35","name":"[V2] PR target/105325, Make load/cmp fusion know about prefixed load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB4s+1RqBNR49tj/@toto.the-meissners.org/mbox/"},{"id":74788,"url":"https://patchwork.plctlab.org/api/1.2/patches/74788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324235635.4137828-1-dmalcolm@redhat.com/","msgid":"<20230324235635.4137828-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-24T23:56:35","name":"[pushed] docs, analyzer: improvements to \"Debugging the Analyzer\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230324235635.4137828-1-dmalcolm@redhat.com/mbox/"},{"id":74801,"url":"https://patchwork.plctlab.org/api/1.2/patches/74801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325010301.4140585-1-dmalcolm@redhat.com/","msgid":"<20230325010301.4140585-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-25T01:03:01","name":"[pushed] diagnostics: ensure that .sarif files are UTF-8 encoded [PR109098]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325010301.4140585-1-dmalcolm@redhat.com/mbox/"},{"id":74885,"url":"https://patchwork.plctlab.org/api/1.2/patches/74885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7EJsY28ImtWfLF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-25T09:53:09","name":"predict: Don'\''t emit -Wsuggest-attribute=cold warning for functions which already have that attribute [PR105685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7EJsY28ImtWfLF@tucnak/mbox/"},{"id":74886,"url":"https://patchwork.plctlab.org/api/1.2/patches/74886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7IBe1ytkKihzTP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-25T10:10:54","name":"c++: Avoid informs without a warning [PR109278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZB7IBe1ytkKihzTP@tucnak/mbox/"},{"id":74887,"url":"https://patchwork.plctlab.org/api/1.2/patches/74887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325121432.3203674-1-pan2.li@intel.com/","msgid":"<20230325121432.3203674-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-25T12:14:32","name":"[v2] RISCV: Bugfix for wrong code with v16hi compare & mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230325121432.3203674-1-pan2.li@intel.com/mbox/"},{"id":74976,"url":"https://patchwork.plctlab.org/api/1.2/patches/74976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-51153ee0-1aaf-4766-b665-cb8ecfeca996-1679771616856@3c-app-gmx-bs65/","msgid":"","list_archive_url":null,"date":"2023-03-25T19:13:36","name":"[commited] Fortran: remove dead code [PR104321]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-51153ee0-1aaf-4766-b665-cb8ecfeca996-1679771616856@3c-app-gmx-bs65/mbox/"},{"id":75000,"url":"https://patchwork.plctlab.org/api/1.2/patches/75000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-2-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:23","name":"[01/10] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-2-kmatsui@cs.washington.edu/mbox/"},{"id":74999,"url":"https://patchwork.plctlab.org/api/1.2/patches/74999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-3-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:24","name":"[02/10] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-3-kmatsui@cs.washington.edu/mbox/"},{"id":75006,"url":"https://patchwork.plctlab.org/api/1.2/patches/75006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-4-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:25","name":"[03/10] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-4-kmatsui@cs.washington.edu/mbox/"},{"id":75004,"url":"https://patchwork.plctlab.org/api/1.2/patches/75004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-5-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:26","name":"[04/10] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-5-kmatsui@cs.washington.edu/mbox/"},{"id":75003,"url":"https://patchwork.plctlab.org/api/1.2/patches/75003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-6-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:27","name":"[05/10] libstdc++: use std::is_void instead of __is_void in helper_functions.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-6-kmatsui@cs.washington.edu/mbox/"},{"id":75001,"url":"https://patchwork.plctlab.org/api/1.2/patches/75001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-7-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:28","name":"[06/10] libstdc++: remove unused __is_void in cpp_type_traits.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-7-kmatsui@cs.washington.edu/mbox/"},{"id":75002,"url":"https://patchwork.plctlab.org/api/1.2/patches/75002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-8-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-8-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:29","name":"[07/10] c++: rename __is_void defined in pr46567.C to ____is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-8-kmatsui@cs.washington.edu/mbox/"},{"id":75007,"url":"https://patchwork.plctlab.org/api/1.2/patches/75007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-9-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-9-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:30","name":"[08/10] c++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-9-kmatsui@cs.washington.edu/mbox/"},{"id":75008,"url":"https://patchwork.plctlab.org/api/1.2/patches/75008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-10-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-10-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:31","name":"[09/10] libstdc++: use new built-in trait __is_void for std::is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-10-kmatsui@cs.washington.edu/mbox/"},{"id":75005,"url":"https://patchwork.plctlab.org/api/1.2/patches/75005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-11-kmatsui@cs.washington.edu/","msgid":"<20230326043032.11096-11-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-26T04:30:32","name":"[10/10] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326043032.11096-11-kmatsui@cs.washington.edu/mbox/"},{"id":75024,"url":"https://patchwork.plctlab.org/api/1.2/patches/75024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326083458.1240538-1-jiawei@iscas.ac.cn/","msgid":"<20230326083458.1240538-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-26T08:34:58","name":"RISC-V: Add Z*inx incompatible check in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326083458.1240538-1-jiawei@iscas.ac.cn/mbox/"},{"id":75038,"url":"https://patchwork.plctlab.org/api/1.2/patches/75038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326102402.9D82C33E4B@hamza.pair.com/","msgid":"<20230326102402.9D82C33E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-03-26T10:24:00","name":"[pushed] doc: Remove anachronistic note related to languages built","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326102402.9D82C33E4B@hamza.pair.com/mbox/"},{"id":75049,"url":"https://patchwork.plctlab.org/api/1.2/patches/75049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b597b853-7ea6-504b-7609-49c8aa98932f@irvise.xyz/","msgid":"","list_archive_url":null,"date":"2023-03-26T12:58:26","name":"[wwwdocs] Add Ada'\''s GCC13 changelog entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b597b853-7ea6-504b-7609-49c8aa98932f@irvise.xyz/mbox/"},{"id":75134,"url":"https://patchwork.plctlab.org/api/1.2/patches/75134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326165447.43628-1-iain@sandoe.co.uk/","msgid":"<20230326165447.43628-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-03-26T16:54:47","name":"c++, coroutines: Stabilize names of promoted slot vars [PR101118].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230326165447.43628-1-iain@sandoe.co.uk/mbox/"},{"id":75151,"url":"https://patchwork.plctlab.org/api/1.2/patches/75151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs9rs0zo.fsf@igel.home/","msgid":"<87fs9rs0zo.fsf@igel.home>","list_archive_url":null,"date":"2023-03-26T20:37:15","name":"m68k: handle TLS access with offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs9rs0zo.fsf@igel.home/mbox/"},{"id":75223,"url":"https://patchwork.plctlab.org/api/1.2/patches/75223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e57a8f3f-e356-7153-cfdf-80d179a0b651@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-27T06:16:16","name":"[rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e57a8f3f-e356-7153-cfdf-80d179a0b651@linux.ibm.com/mbox/"},{"id":75233,"url":"https://patchwork.plctlab.org/api/1.2/patches/75233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327065907.155807-1-juzhe.zhong@rivai.ai/","msgid":"<20230327065907.155807-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-27T06:59:07","name":"RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327065907.155807-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75235,"url":"https://patchwork.plctlab.org/api/1.2/patches/75235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327074654.1126912-1-philipp.tomsich@vrull.eu/","msgid":"<20230327074654.1126912-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-03-27T07:46:54","name":"aarch64: update ampere1 vectorization cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327074654.1126912-1-philipp.tomsich@vrull.eu/mbox/"},{"id":75249,"url":"https://patchwork.plctlab.org/api/1.2/patches/75249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2c55ed6-ac51-013f-69ef-1917eed7d430@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-27T08:04:15","name":"[(pushed)] fix: pytest error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2c55ed6-ac51-013f-69ef-1917eed7d430@suse.cz/mbox/"},{"id":75250,"url":"https://patchwork.plctlab.org/api/1.2/patches/75250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com/","msgid":"<61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-27T08:09:39","name":"rs6000: Fix predicate for const vector in sldoi_to_mov [PR109069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61d8cd78-e20f-e545-5a22-188794168e7f@linux.ibm.com/mbox/"},{"id":75264,"url":"https://patchwork.plctlab.org/api/1.2/patches/75264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCFVYctz4vCATyxc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-27T08:35:45","name":"libstdc++: Fix up experimental/net/timer/waitable/dest.cc testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCFVYctz4vCATyxc@tucnak/mbox/"},{"id":75310,"url":"https://patchwork.plctlab.org/api/1.2/patches/75310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327085252.3390790-1-xionghuluo@tencent.com/","msgid":"<20230327085252.3390790-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-03-27T08:52:52","name":"[RFC] ipa-visibility: Fix ICE in lto-partition caused by incorrect comdat group solving in ipa-visibility","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327085252.3390790-1-xionghuluo@tencent.com/mbox/"},{"id":75339,"url":"https://patchwork.plctlab.org/api/1.2/patches/75339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327103707.1253143-1-chenyixuan@iscas.ac.cn/","msgid":"<20230327103707.1253143-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-27T10:37:07","name":"Changed vector size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327103707.1253143-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":75342,"url":"https://patchwork.plctlab.org/api/1.2/patches/75342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327110422.3353876-1-christoph.muellner@vrull.eu/","msgid":"<20230327110422.3353876-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-03-27T11:04:22","name":"target/109296 - riscv: Add missing mode specifiers for XTheadMemPair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327110422.3353876-1-christoph.muellner@vrull.eu/mbox/"},{"id":75349,"url":"https://patchwork.plctlab.org/api/1.2/patches/75349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfiqvtn.fsf@euler.schwinge.homeip.net/","msgid":"<878rfiqvtn.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-27T11:26:28","name":"[og12] libgomp: Document OpenMP '\''pinned'\'' memory (was: [PATCH] libgomp, openmp: pinned memory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rfiqvtn.fsf@euler.schwinge.homeip.net/mbox/"},{"id":75386,"url":"https://patchwork.plctlab.org/api/1.2/patches/75386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327122349.4136E13482@imap2.suse-dmz.suse.de/","msgid":"<20230327122349.4136E13482@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-27T12:23:48","name":"tree-optimization/108357 - add testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327122349.4136E13482@imap2.suse-dmz.suse.de/mbox/"},{"id":75389,"url":"https://patchwork.plctlab.org/api/1.2/patches/75389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327123159.5B75713482@imap2.suse-dmz.suse.de/","msgid":"<20230327123159.5B75713482@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-27T12:31:58","name":"tree-optimization/54498 - testcase for the bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327123159.5B75713482@imap2.suse-dmz.suse.de/mbox/"},{"id":75405,"url":"https://patchwork.plctlab.org/api/1.2/patches/75405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327125049.967747-1-jwakely@redhat.com/","msgid":"<20230327125049.967747-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-27T12:50:49","name":"[committed] gcov: Fix \"subcomand\" typos [PR109297]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327125049.967747-1-jwakely@redhat.com/mbox/"},{"id":75540,"url":"https://patchwork.plctlab.org/api/1.2/patches/75540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327160157.4111747-1-kevinl@rivosinc.com/","msgid":"<20230327160157.4111747-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-03-27T16:01:57","name":"[v2,RFC] vect: Verify that GET_MODE_NUNITS is greater than one for vect_grouped_store_supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327160157.4111747-1-kevinl@rivosinc.com/mbox/"},{"id":75597,"url":"https://patchwork.plctlab.org/api/1.2/patches/75597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327175908.424052-1-xry111@xry111.site/","msgid":"<20230327175908.424052-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-27T17:59:08","name":"fixincludes: Declare memmem if it'\''s not declared in system headers [PR109293]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327175908.424052-1-xry111@xry111.site/mbox/"},{"id":75622,"url":"https://patchwork.plctlab.org/api/1.2/patches/75622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327185430.3217374-1-julian@codesourcery.com/","msgid":"<20230327185430.3217374-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-03-27T18:54:30","name":"[og12] OpenMP: Constructors and destructors for \"declare target\" static aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230327185430.3217374-1-julian@codesourcery.com/mbox/"},{"id":75697,"url":"https://patchwork.plctlab.org/api/1.2/patches/75697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAG0zEH+0J741JS9PGKTJbucuijprZGhCFt9yJnuZd5aHk7SeBw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-27T21:23:51","name":"libstdc++/complex: Remove implicit type casts in complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAG0zEH+0J741JS9PGKTJbucuijprZGhCFt9yJnuZd5aHk7SeBw@mail.gmail.com/mbox/"},{"id":75748,"url":"https://patchwork.plctlab.org/api/1.2/patches/75748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010010.235224-1-juzhe.zhong@rivai.ai/","msgid":"<20230328010010.235224-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T01:00:10","name":"RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010010.235224-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75749,"url":"https://patchwork.plctlab.org/api/1.2/patches/75749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010124.235703-1-juzhe.zhong@rivai.ai/","msgid":"<20230328010124.235703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T01:01:24","name":"[GCC14,QUEUE] RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328010124.235703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":75752,"url":"https://patchwork.plctlab.org/api/1.2/patches/75752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012606.64C8020427@pchp3.se.axis.com/","msgid":"<20230328012606.64C8020427@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:26:06","name":"[committed] CRIS: Remove unused constraint \"R\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012606.64C8020427@pchp3.se.axis.com/mbox/"},{"id":75756,"url":"https://patchwork.plctlab.org/api/1.2/patches/75756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012939.49ECF20417@pchp3.se.axis.com/","msgid":"<20230328012939.49ECF20417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:29:39","name":"[committed] CRIS: Improve bailing for eliminable compares for \"addi\" vs. \"add\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328012939.49ECF20417@pchp3.se.axis.com/mbox/"},{"id":75757,"url":"https://patchwork.plctlab.org/api/1.2/patches/75757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013037.3EFE020417@pchp3.se.axis.com/","msgid":"<20230328013037.3EFE020417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:30:37","name":"[committed] CRIS: Add peephole2 to handle gcc.target/cris/rld-legit1.c for LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013037.3EFE020417@pchp3.se.axis.com/mbox/"},{"id":75758,"url":"https://patchwork.plctlab.org/api/1.2/patches/75758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013200.52DA220417@pchp3.se.axis.com/","msgid":"<20230328013200.52DA220417@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-28T01:32:00","name":"[committed] CRIS: Correct \"T\" to define_memory_constraint, not define_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328013200.52DA220417@pchp3.se.axis.com/mbox/"},{"id":75799,"url":"https://patchwork.plctlab.org/api/1.2/patches/75799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCJc253L29AUFGaN@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-03-28T03:19:55","name":"[V3] PR target/105325, Make load/cmp fusion know about prefixed loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCJc253L29AUFGaN@toto.the-meissners.org/mbox/"},{"id":75842,"url":"https://patchwork.plctlab.org/api/1.2/patches/75842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328062120.A450C3858C53@sourceware.org/","msgid":"<20230328062120.A450C3858C53@sourceware.org>","list_archive_url":null,"date":"2023-03-28T06:20:36","name":"ipa/106124 - ICE with -fkeep-inline-functions and OpenMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328062120.A450C3858C53@sourceware.org/mbox/"},{"id":75871,"url":"https://patchwork.plctlab.org/api/1.2/patches/75871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7081af4-d062-7da4-a342-0bd71da523e6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T07:45:47","name":"[PATCHv2,rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7081af4-d062-7da4-a342-0bd71da523e6@linux.ibm.com/mbox/"},{"id":75877,"url":"https://patchwork.plctlab.org/api/1.2/patches/75877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKdJtsc0vDzPq12@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T07:54:14","name":"range-op-float: Use get_nan_state in float_widen_lhs_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKdJtsc0vDzPq12@tucnak/mbox/"},{"id":75887,"url":"https://patchwork.plctlab.org/api/1.2/patches/75887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKfkrUlk++IRAvn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:04:34","name":"sanopt: Return TODO_cleanup_cfg if any .{UB,HWA,A}SAN_* calls were lowered [PR106190]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKfkrUlk++IRAvn@tucnak/mbox/"},{"id":75888,"url":"https://patchwork.plctlab.org/api/1.2/patches/75888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328080657.773873858296@sourceware.org/","msgid":"<20230328080657.773873858296@sourceware.org>","list_archive_url":null,"date":"2023-03-28T08:06:12","name":"tree-optimization/109304 - properly handle instrumented aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328080657.773873858296@sourceware.org/mbox/"},{"id":75889,"url":"https://patchwork.plctlab.org/api/1.2/patches/75889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKhCVg2wXr2k/fu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:10:49","name":"i386: Require just 32-bit alignment for SLOT_FLOATxFDI_387 -m32 -mpreferred-stack-boundary=2 DImode temporaries [PR109276]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKhCVg2wXr2k/fu@tucnak/mbox/"},{"id":75891,"url":"https://patchwork.plctlab.org/api/1.2/patches/75891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKiZDm40JqnmjZi@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:16:36","name":"[RFC] range-op-float: Only flush_denormals_to_zero for +-*/ [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKiZDm40JqnmjZi@tucnak/mbox/"},{"id":75892,"url":"https://patchwork.plctlab.org/api/1.2/patches/75892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKkbo4zAg36w3wI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:25:18","name":"match.pd: Fix up sqrt (sqrt (x)) simplification [PR109301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCKkbo4zAg36w3wI@tucnak/mbox/"},{"id":75904,"url":"https://patchwork.plctlab.org/api/1.2/patches/75904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0t9uv59.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-03-28T08:39:46","name":"[COMMITTED] testsuite: Fix weak_undefined handling on Darwin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddr0t9uv59.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":75909,"url":"https://patchwork.plctlab.org/api/1.2/patches/75909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8198261.T7Z3S40VBb@fomalhaut/","msgid":"<8198261.T7Z3S40VBb@fomalhaut>","list_archive_url":null,"date":"2023-03-28T08:48:43","name":"[SPARC] Fix PR target/109140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8198261.T7Z3S40VBb@fomalhaut/mbox/"},{"id":75937,"url":"https://patchwork.plctlab.org/api/1.2/patches/75937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK2yWURbV7ufT+p@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T09:43:37","name":"[committed] openmp: Fix typo in diagnostics [PR109314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK2yWURbV7ufT+p@tucnak/mbox/"},{"id":75942,"url":"https://patchwork.plctlab.org/api/1.2/patches/75942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK5vnMKxCV6UIXw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T09:56:14","name":"[committed] gcov-tool: Use subcommand rather than sub-command in function comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK5vnMKxCV6UIXw@tucnak/mbox/"},{"id":75955,"url":"https://patchwork.plctlab.org/api/1.2/patches/75955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK8eTKhp3GZY0UC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T10:07:53","name":"tree-ssa-math-opts: Move PROP_gimple_opt_math from sincos pass to powcabs [PR109301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCK8eTKhp3GZY0UC@tucnak/mbox/"},{"id":75977,"url":"https://patchwork.plctlab.org/api/1.2/patches/75977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5441527.e9J7NaK4W3@minbar/","msgid":"<5441527.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-03-28T10:40:51","name":"libstdc++: Add missing trait is_simd_flag_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5441527.e9J7NaK4W3@minbar/mbox/"},{"id":75979,"url":"https://patchwork.plctlab.org/api/1.2/patches/75979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12813636.nUPlyArG6x@minbar/","msgid":"<12813636.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-03-28T10:42:40","name":"[committed] libstdc++: Fix operator% implementation for Clang","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12813636.nUPlyArG6x@minbar/mbox/"},{"id":76007,"url":"https://patchwork.plctlab.org/api/1.2/patches/76007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113123.C77EE3857C5A@sourceware.org/","msgid":"<20230328113123.C77EE3857C5A@sourceware.org>","list_archive_url":null,"date":"2023-03-28T11:30:38","name":"bootstrap/84402 - improve (match ...) code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113123.C77EE3857C5A@sourceware.org/mbox/"},{"id":76009,"url":"https://patchwork.plctlab.org/api/1.2/patches/76009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-2-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-2-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:28","name":"[1/3] c++: Track lifetimes in constant evaluation [PR70331, PR96630, PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-2-nathanieloshead@gmail.com/mbox/"},{"id":76010,"url":"https://patchwork.plctlab.org/api/1.2/patches/76010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-3-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-3-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:29","name":"[2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-3-nathanieloshead@gmail.com/mbox/"},{"id":76008,"url":"https://patchwork.plctlab.org/api/1.2/patches/76008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-4-nathanieloshead@gmail.com/","msgid":"<20230328113230.19975-4-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-28T11:32:30","name":"[3/3] c++: Improve location information in constexpr evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328113230.19975-4-nathanieloshead@gmail.com/mbox/"},{"id":76011,"url":"https://patchwork.plctlab.org/api/1.2/patches/76011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jq5w1io.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T11:36:47","name":"[committed] aarch64: Restore vectorisation of vld1 inputs [PR109072]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jq5w1io.fsf@arm.com/mbox/"},{"id":76028,"url":"https://patchwork.plctlab.org/api/1.2/patches/76028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328122128.333431-1-juzhe.zhong@rivai.ai/","msgid":"<20230328122128.333431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-28T12:21:28","name":"RISC-V: Fix ICE of ternary intrinsics and scalar move in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328122128.333431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76055,"url":"https://patchwork.plctlab.org/api/1.2/patches/76055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328124419.6EDD5385840E@sourceware.org/","msgid":"<20230328124419.6EDD5385840E@sourceware.org>","list_archive_url":null,"date":"2023-03-28T12:43:34","name":"tree-optimization/107087 - missed CCP after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328124419.6EDD5385840E@sourceware.org/mbox/"},{"id":76069,"url":"https://patchwork.plctlab.org/api/1.2/patches/76069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328131110.7780-1-amonakov@ispras.ru/","msgid":"<20230328131110.7780-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-03-28T13:11:10","name":"haifa-sched: fix autopref_rank_for_schedule comparator [PR109187]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328131110.7780-1-amonakov@ispras.ru/mbox/"},{"id":76074,"url":"https://patchwork.plctlab.org/api/1.2/patches/76074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c301a8d5-1331-1731-594c-d89eca395ceb@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T13:19:33","name":"PR tree-optimization/109274 -Fix compute_operand when op1 == op2 symbolically.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c301a8d5-1331-1731-594c-d89eca395ceb@redhat.com/mbox/"},{"id":76076,"url":"https://patchwork.plctlab.org/api/1.2/patches/76076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt3xui33.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-03-28T13:21:52","name":"build: Check that -lzstd can be linked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddmt3xui33.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":76105,"url":"https://patchwork.plctlab.org/api/1.2/patches/76105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142302.3824535-1-jiawei@iscas.ac.cn/","msgid":"<20230328142302.3824535-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-28T14:23:02","name":"[v2] RISC-V: Add Z*inx imcompatible check in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142302.3824535-1-jiawei@iscas.ac.cn/mbox/"},{"id":76107,"url":"https://patchwork.plctlab.org/api/1.2/patches/76107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142657.53724-1-kito.cheng@sifive.com/","msgid":"<20230328142657.53724-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-03-28T14:26:57","name":"RISC-V: Define __riscv_v_intrinsic [PR109312]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328142657.53724-1-kito.cheng@sifive.com/mbox/"},{"id":76157,"url":"https://patchwork.plctlab.org/api/1.2/patches/76157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCMLY6Br6tqr8L9P@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-28T15:44:35","name":"c++: Allow translations of check_postcondition_result messages [PR109309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCMLY6Br6tqr8L9P@tucnak/mbox/"},{"id":76169,"url":"https://patchwork.plctlab.org/api/1.2/patches/76169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-2-qing.zhao@oracle.com/","msgid":"<20230328154944.3946619-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-28T15:49:43","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-2-qing.zhao@oracle.com/mbox/"},{"id":76162,"url":"https://patchwork.plctlab.org/api/1.2/patches/76162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-3-qing.zhao@oracle.com/","msgid":"<20230328154944.3946619-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-03-28T15:49:44","name":"[2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328154944.3946619-3-qing.zhao@oracle.com/mbox/"},{"id":76164,"url":"https://patchwork.plctlab.org/api/1.2/patches/76164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328155057.1187204-1-jwakely@redhat.com/","msgid":"<20230328155057.1187204-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T15:50:57","name":"c++: Make diagnostic translatable [PR109309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328155057.1187204-1-jwakely@redhat.com/mbox/"},{"id":76205,"url":"https://patchwork.plctlab.org/api/1.2/patches/76205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a22c34d6-07c5-80a5-f6d5-8aa49869a03d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T16:49:27","name":"[v2] rtl-optimization: ppc backend generates unnecessary extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a22c34d6-07c5-80a5-f6d5-8aa49869a03d@linux.ibm.com/mbox/"},{"id":76213,"url":"https://patchwork.plctlab.org/api/1.2/patches/76213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328165515.2300685-1-jiawei@iscas.ac.cn/","msgid":"<20230328165515.2300685-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-28T16:55:15","name":"[v3] RISC-V: Add Z*inx imcompatible check in gcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328165515.2300685-1-jiawei@iscas.ac.cn/mbox/"},{"id":76221,"url":"https://patchwork.plctlab.org/api/1.2/patches/76221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328173732.1722425-1-ppalka@redhat.com/","msgid":"<20230328173732.1722425-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-03-28T17:37:32","name":"c++: ICE on loopy var tmpl auto deduction [PR109300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328173732.1722425-1-ppalka@redhat.com/mbox/"},{"id":76225,"url":"https://patchwork.plctlab.org/api/1.2/patches/76225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328180139.74395-1-xry111@xry111.site/","msgid":"<20230328180139.74395-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-03-28T18:01:39","name":"LoongArch: Improve GAR store for va_list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328180139.74395-1-xry111@xry111.site/mbox/"},{"id":76226,"url":"https://patchwork.plctlab.org/api/1.2/patches/76226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328183728.168042-1-dmalcolm@redhat.com/","msgid":"<20230328183728.168042-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-03-28T18:37:28","name":"[pushed] Don'\''t emit -Wxor-used-as-pow on macro expansions [PR107002]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328183728.168042-1-dmalcolm@redhat.com/mbox/"},{"id":76242,"url":"https://patchwork.plctlab.org/api/1.2/patches/76242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU1TRyicyScHU2b-0r2Us4hce9xO0oP6wK0-xnOE7OUDg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-28T20:09:42","name":"libbacktrace patch committed: Tweaks to zstd decompression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU1TRyicyScHU2b-0r2Us4hce9xO0oP6wK0-xnOE7OUDg@mail.gmail.com/mbox/"},{"id":76243,"url":"https://patchwork.plctlab.org/api/1.2/patches/76243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201450.1201780-1-jwakely@redhat.com/","msgid":"<20230328201450.1201780-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:14:50","name":"[committed] libstdc++: Update tzdata to 2023a [PR109288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201450.1201780-1-jwakely@redhat.com/mbox/"},{"id":76253,"url":"https://patchwork.plctlab.org/api/1.2/patches/76253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201455.1202542-1-jwakely@redhat.com/","msgid":"<20230328201455.1202542-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:14:55","name":"[committed] libstdc++: Tell GCC what basic_string::_M_is_local() means [PR109299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201455.1202542-1-jwakely@redhat.com/mbox/"},{"id":76248,"url":"https://patchwork.plctlab.org/api/1.2/patches/76248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201501.1202700-1-jwakely@redhat.com/","msgid":"<20230328201501.1202700-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T20:15:01","name":"[committed] libstdc++: More fixes for null pointers used with std::char_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328201501.1202700-1-jwakely@redhat.com/mbox/"},{"id":76263,"url":"https://patchwork.plctlab.org/api/1.2/patches/76263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm8s8u1x.fsf@euler.schwinge.homeip.net/","msgid":"<87pm8s8u1x.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-28T21:06:34","name":"Enable '\''gfortran.dg/weak-2.f90'\'' for nvptx target (was: Support for WEAK attribute, part 2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm8s8u1x.fsf@euler.schwinge.homeip.net/mbox/"},{"id":76301,"url":"https://patchwork.plctlab.org/api/1.2/patches/76301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328231903.1214366-1-jwakely@redhat.com/","msgid":"<20230328231903.1214366-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-28T23:19:03","name":"[committed] libstdc++: Do not use facets cached in ios for ATL128 build [PR103387]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230328231903.1214366-1-jwakely@redhat.com/mbox/"},{"id":76324,"url":"https://patchwork.plctlab.org/api/1.2/patches/76324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcX1MNR1Y9KdOvBd5AJLbNO8uE-ksW6jbPKVMq5wze6L_Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T00:31:38","name":"Go patch committed: Mark Call_expression multi-results as result struct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcX1MNR1Y9KdOvBd5AJLbNO8uE-ksW6jbPKVMq5wze6L_Q@mail.gmail.com/mbox/"},{"id":76340,"url":"https://patchwork.plctlab.org/api/1.2/patches/76340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329022327.99330-1-jason@redhat.com/","msgid":"<20230329022327.99330-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-29T02:23:27","name":"[pushed] c++: alias ctad refinements [PR109321]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329022327.99330-1-jason@redhat.com/mbox/"},{"id":76343,"url":"https://patchwork.plctlab.org/api/1.2/patches/76343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-2-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-2-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:56","name":"[v2,1/3] c++: Track lifetimes in constant evaluation [PR70331, PR96630, PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-2-nathanieloshead@gmail.com/mbox/"},{"id":76342,"url":"https://patchwork.plctlab.org/api/1.2/patches/76342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-3-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-3-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:57","name":"[v2,2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-3-nathanieloshead@gmail.com/mbox/"},{"id":76344,"url":"https://patchwork.plctlab.org/api/1.2/patches/76344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-4-nathanieloshead@gmail.com/","msgid":"<20230329023258.13487-4-nathanieloshead@gmail.com>","list_archive_url":null,"date":"2023-03-29T02:32:58","name":"[v2,3/3] c++: Improve location information in constexpr evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329023258.13487-4-nathanieloshead@gmail.com/mbox/"},{"id":76345,"url":"https://patchwork.plctlab.org/api/1.2/patches/76345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024259.174803-1-juzhe.zhong@rivai.ai/","msgid":"<20230329024259.174803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-29T02:42:59","name":"RISC-V: Fix ICE && codegen error of scalar move in RV32 system.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024259.174803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76346,"url":"https://patchwork.plctlab.org/api/1.2/patches/76346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024727.201957-1-juzhe.zhong@rivai.ai/","msgid":"<20230329024727.201957-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-29T02:47:26","name":"RISC-V: Fix reload fail issue on vector mac instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329024727.201957-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76383,"url":"https://patchwork.plctlab.org/api/1.2/patches/76383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329063352.5BE433857026@sourceware.org/","msgid":"<20230329063352.5BE433857026@sourceware.org>","list_archive_url":null,"date":"2023-03-29T06:33:07","name":"tree-optimization/109154 - improve if-conversion for vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329063352.5BE433857026@sourceware.org/mbox/"},{"id":76393,"url":"https://patchwork.plctlab.org/api/1.2/patches/76393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com/","msgid":"<2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com>","list_archive_url":null,"date":"2023-03-29T07:18:38","name":"[v2] sched: Change no_real_insns_p to no_real_nondebug_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c899a33-15b0-7e37-bd81-1721586a758f@linux.ibm.com/mbox/"},{"id":76394,"url":"https://patchwork.plctlab.org/api/1.2/patches/76394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329072126.2297953-1-hongtao.liu@intel.com/","msgid":"<20230329072126.2297953-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-29T07:21:26","name":"Generate vpblendd instead of vpblendw for V4SI under AVX2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329072126.2297953-1-hongtao.liu@intel.com/mbox/"},{"id":76424,"url":"https://patchwork.plctlab.org/api/1.2/patches/76424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329075222.2888608-1-pan2.li@intel.com/","msgid":"<20230329075222.2888608-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-29T07:52:22","name":"[RISC-V] : Bugfix for RVV vbool*_t vn_reference_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329075222.2888608-1-pan2.li@intel.com/mbox/"},{"id":76443,"url":"https://patchwork.plctlab.org/api/1.2/patches/76443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329083527.02DF1385703F@sourceware.org/","msgid":"<20230329083527.02DF1385703F@sourceware.org>","list_archive_url":null,"date":"2023-03-29T08:34:38","name":"tree-optimization/109327 - forwprop stmt removal issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329083527.02DF1385703F@sourceware.org/mbox/"},{"id":76454,"url":"https://patchwork.plctlab.org/api/1.2/patches/76454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329084832.6FEFA3857C43@sourceware.org/","msgid":"<20230329084832.6FEFA3857C43@sourceware.org>","list_archive_url":null,"date":"2023-03-29T08:47:43","name":"scan generic vector tests before lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329084832.6FEFA3857C43@sourceware.org/mbox/"},{"id":76456,"url":"https://patchwork.plctlab.org/api/1.2/patches/76456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329085328.3066061-1-pan2.li@intel.com/","msgid":"<20230329085328.3066061-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-03-29T08:53:28","name":"[v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329085328.3066061-1-pan2.li@intel.com/mbox/"},{"id":76515,"url":"https://patchwork.plctlab.org/api/1.2/patches/76515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8021191-7ec1-8683-5a33-7cf91172cb42@arm.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T10:50:26","name":"arm: Fix MVE vcreate definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8021191-7ec1-8683-5a33-7cf91172cb42@arm.com/mbox/"},{"id":76531,"url":"https://patchwork.plctlab.org/api/1.2/patches/76531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GF8Lw3PhgEDoCpE8Pu64yKun736N=uazhUVg=aP2EEb9Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T11:36:16","name":"[RFC] Fix for c++/PR12341","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GF8Lw3PhgEDoCpE8Pu64yKun736N=uazhUVg=aP2EEb9Q@mail.gmail.com/mbox/"},{"id":76537,"url":"https://patchwork.plctlab.org/api/1.2/patches/76537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329115635.6D3113858434@sourceware.org/","msgid":"<20230329115635.6D3113858434@sourceware.org>","list_archive_url":null,"date":"2023-03-29T11:55:50","name":"tree-optimization/109331 - make sure to clean up the CFG after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329115635.6D3113858434@sourceware.org/mbox/"},{"id":76555,"url":"https://patchwork.plctlab.org/api/1.2/patches/76555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329121233.B0266385B538@sourceware.org/","msgid":"<20230329121233.B0266385B538@sourceware.org>","list_archive_url":null,"date":"2023-03-29T12:11:47","name":"tree-optimization/107561 - reduce -Wstringop-overflow false positives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329121233.B0266385B538@sourceware.org/mbox/"},{"id":76564,"url":"https://patchwork.plctlab.org/api/1.2/patches/76564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e114ac92-17fe-a0c0-b68a-3585910b70e4@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-29T12:55:01","name":"configure: deprecate --enable-link-mutex option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e114ac92-17fe-a0c0-b68a-3585910b70e4@suse.cz/mbox/"},{"id":76579,"url":"https://patchwork.plctlab.org/api/1.2/patches/76579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329134210.19370-1-shiyulong@iscas.ac.cn/","msgid":"<20230329134210.19370-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-03-29T13:42:10","name":"[V1] RISCV: Modified validation information for contracts-tmpl-spec2.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329134210.19370-1-shiyulong@iscas.ac.cn/mbox/"},{"id":76581,"url":"https://patchwork.plctlab.org/api/1.2/patches/76581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d34537-c54b-ebac-7c7d-89380cf9fe46@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-03-29T13:48:00","name":"[RFA,Bug,target/108892,13,regression] Force re-recognition after changing RTL structure of an insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5d34537-c54b-ebac-7c7d-89380cf9fe46@ventanamicro.com/mbox/"},{"id":76724,"url":"https://patchwork.plctlab.org/api/1.2/patches/76724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com/","msgid":"<54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com>","list_archive_url":null,"date":"2023-03-29T17:22:27","name":"recomputation and PR 109154","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/54bb3bc9-e0c1-b5ab-4447-5908b09fd19f@redhat.com/mbox/"},{"id":76792,"url":"https://patchwork.plctlab.org/api/1.2/patches/76792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7ob2usn.fsf@euler.schwinge.homeip.net/","msgid":"<87o7ob2usn.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-03-29T19:59:20","name":"'\''g++.dg/modules/modules.exp'\'': don'\''t leak local '\''unsupported'\'' proc [PR108899] (was: [PATCH] testsuite: Fix up modules.exp [PR108899])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7ob2usn.fsf@euler.schwinge.homeip.net/mbox/"},{"id":76828,"url":"https://patchwork.plctlab.org/api/1.2/patches/76828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329220802.1F70133E56@hamza.pair.com/","msgid":"<20230329220802.1F70133E56@hamza.pair.com>","list_archive_url":null,"date":"2023-03-29T22:07:59","name":"[pushed] wwwdocs: gcc-4.7: Adjust dwarfstd.org links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329220802.1F70133E56@hamza.pair.com/mbox/"},{"id":76846,"url":"https://patchwork.plctlab.org/api/1.2/patches/76846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329225727.2D86420433@pchp3.se.axis.com/","msgid":"<20230329225727.2D86420433@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-03-29T22:57:27","name":"[committed] CRIS: Make rtx-cost 0 for many CONST_INT \"quick\" operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329225727.2D86420433@pchp3.se.axis.com/mbox/"},{"id":76854,"url":"https://patchwork.plctlab.org/api/1.2/patches/76854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233858.1405145-1-jwakely@redhat.com/","msgid":"<20230329233858.1405145-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:38:58","name":"[committed] libstdc++: Enforce requirements on template argument of std::optional","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233858.1405145-1-jwakely@redhat.com/mbox/"},{"id":76855,"url":"https://patchwork.plctlab.org/api/1.2/patches/76855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233904.1405179-1-jwakely@redhat.com/","msgid":"<20230329233904.1405179-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:39:04","name":"[committed] libstdc++: Use std::remove_cv_t in std::optional::transform [PR109340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233904.1405179-1-jwakely@redhat.com/mbox/"},{"id":76856,"url":"https://patchwork.plctlab.org/api/1.2/patches/76856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233914.1405196-1-jwakely@redhat.com/","msgid":"<20230329233914.1405196-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:39:14","name":"[committed] libstdc++: Apply small fix from LWG 3843 to std::expected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329233914.1405196-1-jwakely@redhat.com/mbox/"},{"id":76857,"url":"https://patchwork.plctlab.org/api/1.2/patches/76857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329234000.1405216-1-jwakely@redhat.com/","msgid":"<20230329234000.1405216-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-29T23:40:00","name":"[committed] libstdc++: Fix constexpr functions in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230329234000.1405216-1-jwakely@redhat.com/mbox/"},{"id":76864,"url":"https://patchwork.plctlab.org/api/1.2/patches/76864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330012804.110539-1-juzhe.zhong@rivai.ai/","msgid":"<20230330012804.110539-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-30T01:28:04","name":"[GCC14,QUEUE] RISC-V: Optimize fault only first load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330012804.110539-1-juzhe.zhong@rivai.ai/mbox/"},{"id":76867,"url":"https://patchwork.plctlab.org/api/1.2/patches/76867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330014456.1425596-1-hongtao.liu@intel.com/","msgid":"<20230330014456.1425596-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-30T01:44:56","name":"Support vector conversion for AVX512 vcvtudq2pd/vcvttps2udq/vcvttpd2udq.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330014456.1425596-1-hongtao.liu@intel.com/mbox/"},{"id":76878,"url":"https://patchwork.plctlab.org/api/1.2/patches/76878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330034753.3661606-1-apinski@marvell.com/","msgid":"<20230330034753.3661606-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-03-30T03:47:53","name":"Fix fc-prototypes usage with C_INT64_T and non LP64 Targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330034753.3661606-1-apinski@marvell.com/mbox/"},{"id":76934,"url":"https://patchwork.plctlab.org/api/1.2/patches/76934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCU+huPw218pdDqo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-30T07:47:18","name":"c++: Fix up ICE in build_min_non_dep_op_overload [PR109319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCU+huPw218pdDqo@tucnak/mbox/"},{"id":76936,"url":"https://patchwork.plctlab.org/api/1.2/patches/76936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCVCzOdvlQG2Lke7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-30T08:05:32","name":"testsuite, analyzer: Fix up pipe-glibc.c testcase [PR107396]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCVCzOdvlQG2Lke7@tucnak/mbox/"},{"id":77099,"url":"https://patchwork.plctlab.org/api/1.2/patches/77099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330110206.11FDD1348E@imap2.suse-dmz.suse.de/","msgid":"<20230330110206.11FDD1348E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-03-30T11:02:05","name":"tree-optimization/109342 - wrong code with edge equivalences in VN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330110206.11FDD1348E@imap2.suse-dmz.suse.de/mbox/"},{"id":77133,"url":"https://patchwork.plctlab.org/api/1.2/patches/77133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330114146.442606-1-hongtao.liu@intel.com/","msgid":"<20230330114146.442606-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-30T11:41:46","name":"[V2] Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns* to align with standard pattern name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330114146.442606-1-hongtao.liu@intel.com/mbox/"},{"id":77160,"url":"https://patchwork.plctlab.org/api/1.2/patches/77160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330121546.1454231-1-jwakely@redhat.com/","msgid":"<20230330121546.1454231-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-30T12:15:46","name":"c++tools: Fix Makefile to properly clean and rebuild [PR101834]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330121546.1454231-1-jwakely@redhat.com/mbox/"},{"id":77359,"url":"https://patchwork.plctlab.org/api/1.2/patches/77359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-2-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:05","name":"[v2,1/7] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-2-kmatsui@cs.washington.edu/mbox/"},{"id":77357,"url":"https://patchwork.plctlab.org/api/1.2/patches/77357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-3-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:06","name":"[v2,2/7] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-3-kmatsui@cs.washington.edu/mbox/"},{"id":77358,"url":"https://patchwork.plctlab.org/api/1.2/patches/77358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-4-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:07","name":"[v2,3/7] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-4-kmatsui@cs.washington.edu/mbox/"},{"id":77361,"url":"https://patchwork.plctlab.org/api/1.2/patches/77361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-5-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:08","name":"[v2,4/7] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-5-kmatsui@cs.washington.edu/mbox/"},{"id":77363,"url":"https://patchwork.plctlab.org/api/1.2/patches/77363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-6-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:09","name":"[v2,5/7] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-6-kmatsui@cs.washington.edu/mbox/"},{"id":77362,"url":"https://patchwork.plctlab.org/api/1.2/patches/77362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-7-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:10","name":"[v2,6/7] libstdc++: use new built-in trait __is_void for std::is_void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-7-kmatsui@cs.washington.edu/mbox/"},{"id":77364,"url":"https://patchwork.plctlab.org/api/1.2/patches/77364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-8-kmatsui@cs.washington.edu/","msgid":"<20230330183911.12640-8-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-03-30T18:39:11","name":"[v2,7/7] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330183911.12640-8-kmatsui@cs.washington.edu/mbox/"},{"id":77427,"url":"https://patchwork.plctlab.org/api/1.2/patches/77427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222454.793588-1-jason@redhat.com/","msgid":"<20230330222454.793588-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-30T22:24:54","name":"[pushed] c++: anonymous union member reference [PR105452]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222454.793588-1-jason@redhat.com/mbox/"},{"id":77428,"url":"https://patchwork.plctlab.org/api/1.2/patches/77428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222552.793991-1-jason@redhat.com/","msgid":"<20230330222552.793991-1-jason@redhat.com>","list_archive_url":null,"date":"2023-03-30T22:25:52","name":"[pushed] c++: generic lambda and function ptr conv [PR105221]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230330222552.793991-1-jason@redhat.com/mbox/"},{"id":77529,"url":"https://patchwork.plctlab.org/api/1.2/patches/77529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331051129.2691249-1-hongtao.liu@intel.com/","msgid":"<20230331051129.2691249-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-31T05:11:29","name":"Adjust memory_move_cost for MASK_REGS when MODE_SIZE > 8.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331051129.2691249-1-hongtao.liu@intel.com/mbox/"},{"id":77531,"url":"https://patchwork.plctlab.org/api/1.2/patches/77531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331054113.245429-1-juzhe.zhong@rivai.ai/","msgid":"<20230331054113.245429-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-03-31T05:41:13","name":"[GCC14,QUEUE] RISC-V: Support chunk = 128bit for '\''V'\'' Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331054113.245429-1-juzhe.zhong@rivai.ai/mbox/"},{"id":77558,"url":"https://patchwork.plctlab.org/api/1.2/patches/77558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331065810.4012545-1-hongtao.liu@intel.com/","msgid":"<20230331065810.4012545-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-03-31T06:58:10","name":"Document signbitm2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331065810.4012545-1-hongtao.liu@intel.com/mbox/"},{"id":77574,"url":"https://patchwork.plctlab.org/api/1.2/patches/77574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331072057.84974-1-kito.cheng@sifive.com/","msgid":"<20230331072057.84974-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-03-31T07:20:57","name":"[committed] RISC-V: Fix missing file dependency in RISC-V back-end [PR109328]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331072057.84974-1-kito.cheng@sifive.com/mbox/"},{"id":77706,"url":"https://patchwork.plctlab.org/api/1.2/patches/77706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaSgegwS47Tq+MJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T07:57:54","name":"range-op-float, value-range: Fix up handling of UN{LT,LE,GT,GE,EQ}_EXPR and handle comparisons in get_tree_range [PR91645]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaSgegwS47Tq+MJ@tucnak/mbox/"},{"id":77707,"url":"https://patchwork.plctlab.org/api/1.2/patches/77707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaW+lxMXIASrQJz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T08:16:59","name":"[RFC] Use ranger in the cdce pass [PR91645]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCaW+lxMXIASrQJz@tucnak/mbox/"},{"id":77631,"url":"https://patchwork.plctlab.org/api/1.2/patches/77631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pm8p48cj.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-03-31T08:45:48","name":"ipa: Avoid constructing aggregate jump functions with huge offsets (PR 109303)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6pm8p48cj.fsf@suse.cz/mbox/"},{"id":77719,"url":"https://patchwork.plctlab.org/api/1.2/patches/77719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa5thrjuM3EhXO8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T10:45:10","name":"range-op-float: Further comparison fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa5thrjuM3EhXO8@tucnak/mbox/"},{"id":77721,"url":"https://patchwork.plctlab.org/api/1.2/patches/77721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa8nVSkandaSH2N@tucnak/","msgid":"","list_archive_url":null,"date":"2023-03-31T10:57:33","name":"range-op-float: Further foperator_{,not_}equal::fold_range fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCa8nVSkandaSH2N@tucnak/mbox/"},{"id":77801,"url":"https://patchwork.plctlab.org/api/1.2/patches/77801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331144909.29872-1-jwakely@redhat.com/","msgid":"<20230331144909.29872-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T14:49:09","name":"[committed] libstdc++: Revert addition of boolean flag to net::ip::basic_endpoint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331144909.29872-1-jwakely@redhat.com/mbox/"},{"id":77802,"url":"https://patchwork.plctlab.org/api/1.2/patches/77802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331145017.30025-1-jwakely@redhat.com/","msgid":"<20230331145017.30025-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T14:50:17","name":"[committed] libstdc++: Avoid -Wmaybe-uninitialized warning in std::stop_source [PR109339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331145017.30025-1-jwakely@redhat.com/mbox/"},{"id":77812,"url":"https://patchwork.plctlab.org/api/1.2/patches/77812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com/","msgid":"<006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com>","list_archive_url":null,"date":"2023-03-31T15:06:41","name":"[pushed,PR109052] LRA: Implement commutative operands exchange for combining secondary memory reload and original insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006d8e44-ade0-afc3-453f-05ff9d8e7f7a@redhat.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-03/mbox/"},{"id":19,"url":"https://patchwork.plctlab.org/api/1.2/bundles/19/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-04/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-04","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":77949,"url":"https://patchwork.plctlab.org/api/1.2/patches/77949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331185041.8F5FC33E63@hamza.pair.com/","msgid":"<20230331185041.8F5FC33E63@hamza.pair.com>","list_archive_url":null,"date":"2023-03-31T18:50:33","name":"[pushed] libiberty: Remove a reference to the Glibc manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331185041.8F5FC33E63@hamza.pair.com/mbox/"},{"id":78025,"url":"https://patchwork.plctlab.org/api/1.2/patches/78025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331224541.102599-1-jwakely@redhat.com/","msgid":"<20230331224541.102599-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-03-31T22:45:41","name":"[committed] libstdc++: Teach optimizer that empty COW strings are empty [PR107087]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230331224541.102599-1-jwakely@redhat.com/mbox/"},{"id":78062,"url":"https://patchwork.plctlab.org/api/1.2/patches/78062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCfXdZvpU0rv6Ezk@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-01T07:04:21","name":"[committed] testsuite: Add testcase for already fixed PR [PR109362]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCfXdZvpU0rv6Ezk@tucnak/mbox/"},{"id":78188,"url":"https://patchwork.plctlab.org/api/1.2/patches/78188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-2-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:09","name":"[v3,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-2-kmatsui@cs.washington.edu/mbox/"},{"id":78187,"url":"https://patchwork.plctlab.org/api/1.2/patches/78187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-3-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:10","name":"[v3,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-3-kmatsui@cs.washington.edu/mbox/"},{"id":78186,"url":"https://patchwork.plctlab.org/api/1.2/patches/78186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-4-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:11","name":"[v3,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-4-kmatsui@cs.washington.edu/mbox/"},{"id":78190,"url":"https://patchwork.plctlab.org/api/1.2/patches/78190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-5-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:12","name":"[v3,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-5-kmatsui@cs.washington.edu/mbox/"},{"id":78189,"url":"https://patchwork.plctlab.org/api/1.2/patches/78189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-6-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:13","name":"[v3,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-6-kmatsui@cs.washington.edu/mbox/"},{"id":78191,"url":"https://patchwork.plctlab.org/api/1.2/patches/78191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-7-kmatsui@cs.washington.edu/","msgid":"<20230402075314.39853-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-04-02T07:53:14","name":"[v3,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402075314.39853-7-kmatsui@cs.washington.edu/mbox/"},{"id":78244,"url":"https://patchwork.plctlab.org/api/1.2/patches/78244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402140044.23073-1-xry111@xry111.site/","msgid":"<20230402140044.23073-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-02T14:00:44","name":"[GCC14] LoongArch: Optimize additions with immediates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402140044.23073-1-xry111@xry111.site/mbox/"},{"id":78256,"url":"https://patchwork.plctlab.org/api/1.2/patches/78256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-2-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:13","name":"[1/3] go: Fix memory leak in Integer_expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-2-rep.dot.nop@gmail.com/mbox/"},{"id":78257,"url":"https://patchwork.plctlab.org/api/1.2/patches/78257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-3-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-3-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:14","name":"[2/3] rust: Fix memory leak in compile_{integer,float}_literal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-3-rep.dot.nop@gmail.com/mbox/"},{"id":78255,"url":"https://patchwork.plctlab.org/api/1.2/patches/78255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-4-rep.dot.nop@gmail.com/","msgid":"<20230402150515.40826-4-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-04-02T15:05:15","name":"[3/3] Fortran: Fix mpz and mpfr memory leaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402150515.40826-4-rep.dot.nop@gmail.com/mbox/"},{"id":78306,"url":"https://patchwork.plctlab.org/api/1.2/patches/78306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402213345.632989-1-sam@gentoo.org/","msgid":"<20230402213345.632989-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-02T21:33:45","name":"[v5] gcc: Drop obsolete INCLUDE_PTHREAD_H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230402213345.632989-1-sam@gentoo.org/mbox/"},{"id":78313,"url":"https://patchwork.plctlab.org/api/1.2/patches/78313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403003855.113601-1-juzhe.zhong@rivai.ai/","msgid":"<20230403003855.113601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-03T00:38:55","name":"RISC-V: Fix SEW64 of vrsub.vx runtime fail in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403003855.113601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":78319,"url":"https://patchwork.plctlab.org/api/1.2/patches/78319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403011939.10677-1-xuli1@eswincomputing.com/","msgid":"<20230403011939.10677-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-04-03T01:19:39","name":"RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403011939.10677-1-xuli1@eswincomputing.com/mbox/"},{"id":78400,"url":"https://patchwork.plctlab.org/api/1.2/patches/78400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz/","msgid":"<7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:04:51","name":"[(pushed)] param: document ranger-recompute-depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a2e8985-4e90-e384-9817-06547e4fed2e@suse.cz/mbox/"},{"id":78413,"url":"https://patchwork.plctlab.org/api/1.2/patches/78413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz/","msgid":"<94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:46:58","name":"driver: drop flag_var_tracking_assignments flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94fb1c9b-60bd-25f3-9eb7-cbac8213dfd0@suse.cz/mbox/"},{"id":78415,"url":"https://patchwork.plctlab.org/api/1.2/patches/78415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-2-haochen.jiang@intel.com/","msgid":"<20230403084923.2904086-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-03T08:49:22","name":"[1/2] Support Intel AMX-COMPLEX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-2-haochen.jiang@intel.com/mbox/"},{"id":78414,"url":"https://patchwork.plctlab.org/api/1.2/patches/78414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-3-haochen.jiang@intel.com/","msgid":"<20230403084923.2904086-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-03T08:49:23","name":"[2/2] i386: Add AMX-COMPLEX to Granite Rapids","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403084923.2904086-3-haochen.jiang@intel.com/mbox/"},{"id":78416,"url":"https://patchwork.plctlab.org/api/1.2/patches/78416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz/","msgid":"<7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz>","list_archive_url":null,"date":"2023-04-03T08:54:23","name":"[stage1] gcov: respect -fprofile-prefix-map when it comes to output of .gcda file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e35e83c-996e-047d-5dce-6c5f6b6ce452@suse.cz/mbox/"},{"id":78418,"url":"https://patchwork.plctlab.org/api/1.2/patches/78418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz/","msgid":"<200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz>","list_archive_url":null,"date":"2023-04-03T09:02:28","name":"ipa: propagate attributes for target attribute clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/200bdb15-2621-2ba3-fc04-5fd20821f871@suse.cz/mbox/"},{"id":78562,"url":"https://patchwork.plctlab.org/api/1.2/patches/78562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4lxc5z.fsf@euler.schwinge.homeip.net/","msgid":"<87cz4lxc5z.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-03T14:39:36","name":"[og12] OpenACC: Pass pre-allocated '\''ptrblock'\'' to '\''goacc_noncontig_array_create_ptrblock'\'' [PR76739] (was: [PATCH, OpenACC, v3] Non-contiguous array support for OpenACC data clauses)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4lxc5z.fsf@euler.schwinge.homeip.net/mbox/"},{"id":78565,"url":"https://patchwork.plctlab.org/api/1.2/patches/78565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403144932.747134-1-ppalka@redhat.com/","msgid":"<20230403144932.747134-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-03T14:49:32","name":"c++: satisfaction and ARGUMENT_PACK_SELECT [PR105644]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230403144932.747134-1-ppalka@redhat.com/mbox/"},{"id":78568,"url":"https://patchwork.plctlab.org/api/1.2/patches/78568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rf9xbd0.fsf@euler.schwinge.homeip.net/","msgid":"<878rf9xbd0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-03T14:56:59","name":"[og12] '\''-foffload-memory=pinned'\'' using offloading device interfaces (was: -foffload-memory=pinned)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rf9xbd0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":78699,"url":"https://patchwork.plctlab.org/api/1.2/patches/78699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d65cacfb9cbc7bf1a94791bf7213169b77ec213e.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:34:11","name":"Less warnings for parameters declared as arrays [PR98541, PR98536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d65cacfb9cbc7bf1a94791bf7213169b77ec213e.camel@tugraz.at/mbox/"},{"id":78702,"url":"https://patchwork.plctlab.org/api/1.2/patches/78702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ae251df8-8c79-4a58-bf78-ffb1daa7cdfe-1680551148829@3c-app-gmx-bs28/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:45:48","name":"Fortran: reject module variable as character length in PARAMETER [PR104349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ae251df8-8c79-4a58-bf78-ffb1daa7cdfe-1680551148829@3c-app-gmx-bs28/mbox/"},{"id":78704,"url":"https://patchwork.plctlab.org/api/1.2/patches/78704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCsu1qEUuowRqlWf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-03T19:53:58","name":"range-op-float: Fix reverse ops of comparisons [PR109386]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCsu1qEUuowRqlWf@tucnak/mbox/"},{"id":78836,"url":"https://patchwork.plctlab.org/api/1.2/patches/78836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404032248.2722677-1-jason@redhat.com/","msgid":"<20230404032248.2722677-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-04T03:22:48","name":"[pushed] c++: friend template matching [PR107484]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404032248.2722677-1-jason@redhat.com/mbox/"},{"id":78850,"url":"https://patchwork.plctlab.org/api/1.2/patches/78850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404051346.1223071-1-hongtao.liu@intel.com/","msgid":"<20230404051346.1223071-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-04T05:13:46","name":"Check hard_regno_mode_ok before setting lowest memory move cost for the mode with different reg classes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404051346.1223071-1-hongtao.liu@intel.com/mbox/"},{"id":78851,"url":"https://patchwork.plctlab.org/api/1.2/patches/78851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/caeae307-9630-68c3-6639-93f14394d9d8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T05:22:22","name":"testsuite: Adjust powerpc test case pr83677.c for BE [PR108815]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/caeae307-9630-68c3-6639-93f14394d9d8@linux.ibm.com/mbox/"},{"id":78894,"url":"https://patchwork.plctlab.org/api/1.2/patches/78894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404074903.4275-1-xuli1@eswincomputing.com/","msgid":"<20230404074903.4275-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-04-04T07:49:03","name":"RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404074903.4275-1-xuli1@eswincomputing.com/mbox/"},{"id":78914,"url":"https://patchwork.plctlab.org/api/1.2/patches/78914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd7cus12b4.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-04-04T08:25:51","name":"[COMMITTED] config: -pthread shouldn'\''t link with -lpthread on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd7cus12b4.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":78926,"url":"https://patchwork.plctlab.org/api/1.2/patches/78926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404083836.9153-1-xry111@xry111.site/","msgid":"<20230404083836.9153-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-04T08:38:36","name":"[GCC14,v2] LoongArch: Optimize additions with immediates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404083836.9153-1-xry111@xry111.site/mbox/"},{"id":78928,"url":"https://patchwork.plctlab.org/api/1.2/patches/78928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404084630.48657-1-juzhe.zhong@rivai.ai/","msgid":"<20230404084630.48657-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-04T08:46:30","name":"RISC-V: Fix PR109399 VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404084630.48657-1-juzhe.zhong@rivai.ai/mbox/"},{"id":78938,"url":"https://patchwork.plctlab.org/api/1.2/patches/78938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCvnXt00qMrZyJSM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-04T09:01:18","name":"riscv: Fix bootstrap [PR109384]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZCvnXt00qMrZyJSM@tucnak/mbox/"},{"id":78961,"url":"https://patchwork.plctlab.org/api/1.2/patches/78961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7baea35-ea9d-5f11-520e-009c8da3735d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T09:57:57","name":"[committed] amdgcn: Add 64-bit vector not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7baea35-ea9d-5f11-520e-009c8da3735d@codesourcery.com/mbox/"},{"id":79010,"url":"https://patchwork.plctlab.org/api/1.2/patches/79010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404111724.243040-1-jwakely@redhat.com/","msgid":"<20230404111724.243040-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-04T11:17:24","name":"[committed] libstdc++: Fix outdated docs about demangling exception messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404111724.243040-1-jwakely@redhat.com/mbox/"},{"id":79021,"url":"https://patchwork.plctlab.org/api/1.2/patches/79021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com/","msgid":"<20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com>","list_archive_url":null,"date":"2023-04-04T11:32:35","name":"ree: Improvement of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20d786e3-2d9d-89bd-8112-8549c24678c3@linux.ibm.com/mbox/"},{"id":79094,"url":"https://patchwork.plctlab.org/api/1.2/patches/79094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com/","msgid":"<4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com>","list_archive_url":null,"date":"2023-04-04T13:06:37","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4C199CEE-3796-41A3-AB1E-E4CC847888D7@oracle.com/mbox/"},{"id":79095,"url":"https://patchwork.plctlab.org/api/1.2/patches/79095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/BF89C563-9663-4671-BCCB-24C7B6C26474@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-04T13:07:55","name":"[V6,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/BF89C563-9663-4671-BCCB-24C7B6C26474@oracle.com/mbox/"},{"id":79256,"url":"https://patchwork.plctlab.org/api/1.2/patches/79256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404170857.608270-1-dmalcolm@redhat.com/","msgid":"<20230404170857.608270-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-04-04T17:08:57","name":"Add -fsarif-time-report [PR109361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404170857.608270-1-dmalcolm@redhat.com/mbox/"},{"id":79412,"url":"https://patchwork.plctlab.org/api/1.2/patches/79412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-1-arsen@aarsen.me/","msgid":"<20230404230950.158556-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:47","name":"[1/4] libstdc++: Harmonize and other headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-1-arsen@aarsen.me/mbox/"},{"id":79409,"url":"https://patchwork.plctlab.org/api/1.2/patches/79409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-2-arsen@aarsen.me/","msgid":"<20230404230950.158556-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:48","name":"[2/4] libstdc++: Add a test for FTM redefinitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-2-arsen@aarsen.me/mbox/"},{"id":79411,"url":"https://patchwork.plctlab.org/api/1.2/patches/79411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-3-arsen@aarsen.me/","msgid":"<20230404230950.158556-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:49","name":"[3/4] libstdc++: Downgrade DEBUG to ASSERTIONS when !HOSTED","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-3-arsen@aarsen.me/mbox/"},{"id":79410,"url":"https://patchwork.plctlab.org/api/1.2/patches/79410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-4-arsen@aarsen.me/","msgid":"<20230404230950.158556-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-04T23:09:50","name":"[4/4] libstdc++: Fix some freestanding test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404230950.158556-4-arsen@aarsen.me/mbox/"},{"id":79414,"url":"https://patchwork.plctlab.org/api/1.2/patches/79414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404233927.3B8BE2043D@pchp3.se.axis.com/","msgid":"<20230404233927.3B8BE2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-04T23:39:27","name":"[committed] doc: md.texi (Including Patterns): Fix page break","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230404233927.3B8BE2043D@pchp3.se.axis.com/mbox/"},{"id":79504,"url":"https://patchwork.plctlab.org/api/1.2/patches/79504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmE5ohrwZMAjU+ju_pMcTbPMnYHGWixgdYUfx=abPn3nw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-05T08:38:26","name":"[match.pd,SVE] Add pattern to transform svrev(svrev(v)) --> v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmE5ohrwZMAjU+ju_pMcTbPMnYHGWixgdYUfx=abPn3nw@mail.gmail.com/mbox/"},{"id":79512,"url":"https://patchwork.plctlab.org/api/1.2/patches/79512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC04IGSaDzQarXvq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-05T08:58:08","name":"tree-vect-generic: Fix up ICE with SSA_NAME_OCCURS_IN_ABNORMAL_PHI [PR109392]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC04IGSaDzQarXvq@tucnak/mbox/"},{"id":79520,"url":"https://patchwork.plctlab.org/api/1.2/patches/79520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC08hc8fUczEywig@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-05T09:16:53","name":"dse: Handle SUBREGs of word REGs differently for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC08hc8fUczEywig@tucnak/mbox/"},{"id":79565,"url":"https://patchwork.plctlab.org/api/1.2/patches/79565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405112418.334349-1-jwakely@redhat.com/","msgid":"<20230405112418.334349-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-05T11:24:18","name":"[committed] libstdc++: Define std::sub_match::swap member function (LWG 3204)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405112418.334349-1-jwakely@redhat.com/mbox/"},{"id":79582,"url":"https://patchwork.plctlab.org/api/1.2/patches/79582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405120833.3598320-1-julian@codesourcery.com/","msgid":"<20230405120833.3598320-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-05T12:08:33","name":"[og12] OpenMP: Fix checking ICE in \"declare target\" ctor/dtor support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405120833.3598320-1-julian@codesourcery.com/mbox/"},{"id":79621,"url":"https://patchwork.plctlab.org/api/1.2/patches/79621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-2-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:44","name":"[committed,01/88] gccrs: fatal_error_flag: Fix typo in error message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-2-arthur.cohen@embecosm.com/mbox/"},{"id":79617,"url":"https://patchwork.plctlab.org/api/1.2/patches/79617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-3-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:45","name":"[committed,02/88] gccrs: unsafe: check use of `target_feature` attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-3-arthur.cohen@embecosm.com/mbox/"},{"id":79620,"url":"https://patchwork.plctlab.org/api/1.2/patches/79620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-4-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:47","name":"[committed,03/88] gccrs: Check for mutable references in const functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-4-arthur.cohen@embecosm.com/mbox/"},{"id":79623,"url":"https://patchwork.plctlab.org/api/1.2/patches/79623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-5-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:48","name":"[committed,04/88] gccrs: rust: add bound parsing in parse_generic_arg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-5-arthur.cohen@embecosm.com/mbox/"},{"id":79619,"url":"https://patchwork.plctlab.org/api/1.2/patches/79619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-6-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:49","name":"[committed,05/88] gccrs: Implement declarative macro 2.0 parser","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-6-arthur.cohen@embecosm.com/mbox/"},{"id":79622,"url":"https://patchwork.plctlab.org/api/1.2/patches/79622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-7-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:50","name":"[committed,06/88] gccrs: Add name resolution to generic argument associated item bindings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-7-arthur.cohen@embecosm.com/mbox/"},{"id":79630,"url":"https://patchwork.plctlab.org/api/1.2/patches/79630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-8-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:51","name":"[committed,07/88] gccrs: Support associated type bound arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-8-arthur.cohen@embecosm.com/mbox/"},{"id":79626,"url":"https://patchwork.plctlab.org/api/1.2/patches/79626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-9-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:52","name":"[committed,08/88] gccrs: Reuse TypeCheckPattern on LetStmt'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-9-arthur.cohen@embecosm.com/mbox/"},{"id":79625,"url":"https://patchwork.plctlab.org/api/1.2/patches/79625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-10-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:53","name":"[committed,09/88] gccrs: Add get_locus function for abstract class MetaItemInner.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-10-arthur.cohen@embecosm.com/mbox/"},{"id":79627,"url":"https://patchwork.plctlab.org/api/1.2/patches/79627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-11-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:54","name":"[committed,10/88] gccrs: diagnostics: Add underline for tokens in diagnostics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-11-arthur.cohen@embecosm.com/mbox/"},{"id":79624,"url":"https://patchwork.plctlab.org/api/1.2/patches/79624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-12-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:55","name":"[committed,11/88] gccrs: Change how CompileVarDecl outputs Bvariable'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-12-arthur.cohen@embecosm.com/mbox/"},{"id":79640,"url":"https://patchwork.plctlab.org/api/1.2/patches/79640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-13-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:56","name":"[committed,12/88] gccrs: testsuite: Handle Windows carriage returns properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-13-arthur.cohen@embecosm.com/mbox/"},{"id":79629,"url":"https://patchwork.plctlab.org/api/1.2/patches/79629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-14-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:57","name":"[committed,13/88] gccrs: Support GroupedPattern during name resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-14-arthur.cohen@embecosm.com/mbox/"},{"id":79628,"url":"https://patchwork.plctlab.org/api/1.2/patches/79628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-15-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:58","name":"[committed,14/88] gccrs: Do not crash on empty macros expand. Fixes #1712","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-15-arthur.cohen@embecosm.com/mbox/"},{"id":79631,"url":"https://patchwork.plctlab.org/api/1.2/patches/79631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-16-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-16-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:02:59","name":"[committed,15/88] gccrs: Add HIR lowering for GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-16-arthur.cohen@embecosm.com/mbox/"},{"id":79641,"url":"https://patchwork.plctlab.org/api/1.2/patches/79641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-17-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-17-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:00","name":"[committed,16/88] gccrs: Add get_item method for HIR::GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-17-arthur.cohen@embecosm.com/mbox/"},{"id":79632,"url":"https://patchwork.plctlab.org/api/1.2/patches/79632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-18-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-18-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:01","name":"[committed,17/88] gccrs: Add type resolution for grouped patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-18-arthur.cohen@embecosm.com/mbox/"},{"id":79635,"url":"https://patchwork.plctlab.org/api/1.2/patches/79635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-19-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-19-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:02","name":"[committed,18/88] gccrs: Added missing GroupedPattern visitors for code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-19-arthur.cohen@embecosm.com/mbox/"},{"id":79658,"url":"https://patchwork.plctlab.org/api/1.2/patches/79658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-20-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-20-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:03","name":"[committed,19/88] gccrs: Rename file rust-ast-full-test.cc to rust-ast.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-20-arthur.cohen@embecosm.com/mbox/"},{"id":79660,"url":"https://patchwork.plctlab.org/api/1.2/patches/79660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-21-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-21-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:04","name":"[committed,20/88] gccrs: moved operator.h to util/rust-operators.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-21-arthur.cohen@embecosm.com/mbox/"},{"id":79671,"url":"https://patchwork.plctlab.org/api/1.2/patches/79671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-22-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-22-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:05","name":"[committed,21/88] gccrs: fixed compiler error message on wildcard pattern within expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-22-arthur.cohen@embecosm.com/mbox/"},{"id":79668,"url":"https://patchwork.plctlab.org/api/1.2/patches/79668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-23-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-23-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:06","name":"[committed,22/88] gccrs: fixed indentations in AST pretty expanded dump of trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-23-arthur.cohen@embecosm.com/mbox/"},{"id":79647,"url":"https://patchwork.plctlab.org/api/1.2/patches/79647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-24-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-24-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:07","name":"[committed,23/88] gccrs: macro: Allow builtin `MacroInvocation`s within the AST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-24-arthur.cohen@embecosm.com/mbox/"},{"id":79654,"url":"https://patchwork.plctlab.org/api/1.2/patches/79654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-25-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-25-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:08","name":"[committed,24/88] gccrs: Create and use CompilePatternLet visitor for compiling let statments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-25-arthur.cohen@embecosm.com/mbox/"},{"id":79662,"url":"https://patchwork.plctlab.org/api/1.2/patches/79662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-26-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-26-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:09","name":"[committed,25/88] gccrs: parser: Allow parsing multiple reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-26-arthur.cohen@embecosm.com/mbox/"},{"id":79667,"url":"https://patchwork.plctlab.org/api/1.2/patches/79667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-27-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-27-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:10","name":"[committed,26/88] gccrs: Move rust-buffered-queue.h to util folder #1766","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-27-arthur.cohen@embecosm.com/mbox/"},{"id":79670,"url":"https://patchwork.plctlab.org/api/1.2/patches/79670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-28-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-28-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:11","name":"[committed,27/88] gccrs: Improve GroupedPattern lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-28-arthur.cohen@embecosm.com/mbox/"},{"id":79672,"url":"https://patchwork.plctlab.org/api/1.2/patches/79672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-29-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-29-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:12","name":"[committed,28/88] gccrs: Remove HIR::GroupedPattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-29-arthur.cohen@embecosm.com/mbox/"},{"id":79673,"url":"https://patchwork.plctlab.org/api/1.2/patches/79673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-30-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-30-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:13","name":"[committed,29/88] gccrs: Optimize HIR::ReferencePattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-30-arthur.cohen@embecosm.com/mbox/"},{"id":79674,"url":"https://patchwork.plctlab.org/api/1.2/patches/79674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-31-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-31-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:14","name":"[committed,30/88] gccrs: Implement lowering ReferencePattern from AST to HIR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-31-arthur.cohen@embecosm.com/mbox/"},{"id":79682,"url":"https://patchwork.plctlab.org/api/1.2/patches/79682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-32-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-32-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:15","name":"[committed,31/88] gccrs: parser: Improve parsing of complex generic arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-32-arthur.cohen@embecosm.com/mbox/"},{"id":79678,"url":"https://patchwork.plctlab.org/api/1.2/patches/79678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-33-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-33-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:16","name":"[committed,32/88] gccrs: parser: Fix parsing of closure param list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-33-arthur.cohen@embecosm.com/mbox/"},{"id":79680,"url":"https://patchwork.plctlab.org/api/1.2/patches/79680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-34-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-34-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:17","name":"[committed,33/88] gccrs: Add support for feature check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-34-arthur.cohen@embecosm.com/mbox/"},{"id":79675,"url":"https://patchwork.plctlab.org/api/1.2/patches/79675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-35-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-35-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:18","name":"[committed,34/88] gccrs: Removed comment copy-pasted from gcc/tree.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-35-arthur.cohen@embecosm.com/mbox/"},{"id":79687,"url":"https://patchwork.plctlab.org/api/1.2/patches/79687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-36-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-36-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:19","name":"[committed,35/88] gccrs: Add another test case for passing associated type-bounds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-36-arthur.cohen@embecosm.com/mbox/"},{"id":79676,"url":"https://patchwork.plctlab.org/api/1.2/patches/79676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-37-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-37-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:20","name":"[committed,36/88] gccrs: Move TypePredicateItem impl out of the header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-37-arthur.cohen@embecosm.com/mbox/"},{"id":79679,"url":"https://patchwork.plctlab.org/api/1.2/patches/79679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-38-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-38-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:21","name":"[committed,37/88] gccrs: Refactor TyVar and TypeBoundPredicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-38-arthur.cohen@embecosm.com/mbox/"},{"id":79677,"url":"https://patchwork.plctlab.org/api/1.2/patches/79677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-39-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-39-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:22","name":"[committed,38/88] gccrs: Refactor SubstitutionRef base class into its own CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-39-arthur.cohen@embecosm.com/mbox/"},{"id":79699,"url":"https://patchwork.plctlab.org/api/1.2/patches/79699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-40-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-40-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:23","name":"[committed,39/88] gccrs: Refactor all substitution mapper code implementation into its own CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-40-arthur.cohen@embecosm.com/mbox/"},{"id":79684,"url":"https://patchwork.plctlab.org/api/1.2/patches/79684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-41-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-41-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:24","name":"[committed,40/88] gccrs: Refactor BaseType, InferType and ErrorType impl into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-41-arthur.cohen@embecosm.com/mbox/"},{"id":79690,"url":"https://patchwork.plctlab.org/api/1.2/patches/79690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-42-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-42-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:25","name":"[committed,41/88] gccrs: Refactor PathProbe into cc file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-42-arthur.cohen@embecosm.com/mbox/"},{"id":79685,"url":"https://patchwork.plctlab.org/api/1.2/patches/79685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-43-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-43-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:26","name":"[committed,42/88] gccrs: Refactor PathProbeType code into CC file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-43-arthur.cohen@embecosm.com/mbox/"},{"id":79701,"url":"https://patchwork.plctlab.org/api/1.2/patches/79701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-44-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-44-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:27","name":"[committed,43/88] gccrs: Refactor all code out of the rust-tyty.h header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-44-arthur.cohen@embecosm.com/mbox/"},{"id":79689,"url":"https://patchwork.plctlab.org/api/1.2/patches/79689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-45-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-45-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:28","name":"[committed,44/88] gccrs: Rename rust-tyctx.cc to rust-typecheck-context.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-45-arthur.cohen@embecosm.com/mbox/"},{"id":79706,"url":"https://patchwork.plctlab.org/api/1.2/patches/79706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-46-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-46-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:29","name":"[committed,45/88] gccrs: Rename header rust-hir-trait-ref.h to rust-hir-trait-reference.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-46-arthur.cohen@embecosm.com/mbox/"},{"id":79694,"url":"https://patchwork.plctlab.org/api/1.2/patches/79694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-47-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-47-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:30","name":"[committed,46/88] gccrs: Refactor handle_substitutions to take a reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-47-arthur.cohen@embecosm.com/mbox/"},{"id":79695,"url":"https://patchwork.plctlab.org/api/1.2/patches/79695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-48-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-48-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:31","name":"[committed,47/88] gccrs: Clear the substitution callbacks when copying ArgumentMappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-48-arthur.cohen@embecosm.com/mbox/"},{"id":79711,"url":"https://patchwork.plctlab.org/api/1.2/patches/79711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-49-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-49-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:32","name":"[committed,48/88] gccrs: Add missing param subst callback","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-49-arthur.cohen@embecosm.com/mbox/"},{"id":79698,"url":"https://patchwork.plctlab.org/api/1.2/patches/79698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-50-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-50-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:33","name":"[committed,49/88] gccrs: Remove monomorphization hack to setup possible associated types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-50-arthur.cohen@embecosm.com/mbox/"},{"id":79715,"url":"https://patchwork.plctlab.org/api/1.2/patches/79715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-51-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-51-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:34","name":"[committed,50/88] gccrs: Refactor the type unification code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-51-arthur.cohen@embecosm.com/mbox/"},{"id":79681,"url":"https://patchwork.plctlab.org/api/1.2/patches/79681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-52-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-52-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:35","name":"[committed,51/88] gccrs: Fix nullptr dereference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-52-arthur.cohen@embecosm.com/mbox/"},{"id":79686,"url":"https://patchwork.plctlab.org/api/1.2/patches/79686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-53-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-53-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:36","name":"[committed,52/88] gccrs: Add missing Sized, Copy and Clone lang item mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-53-arthur.cohen@embecosm.com/mbox/"},{"id":79708,"url":"https://patchwork.plctlab.org/api/1.2/patches/79708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-54-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-54-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:37","name":"[committed,53/88] gccrs: Fix higher ranked trait bounds computation of self","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-54-arthur.cohen@embecosm.com/mbox/"},{"id":79710,"url":"https://patchwork.plctlab.org/api/1.2/patches/79710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-55-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-55-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:38","name":"[committed,54/88] gccrs: Remove bad error message on checking function arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-55-arthur.cohen@embecosm.com/mbox/"},{"id":79716,"url":"https://patchwork.plctlab.org/api/1.2/patches/79716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-56-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-56-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:39","name":"[committed,55/88] gccrs: Add general TypeBounds checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-56-arthur.cohen@embecosm.com/mbox/"},{"id":79712,"url":"https://patchwork.plctlab.org/api/1.2/patches/79712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-57-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-57-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:40","name":"[committed,56/88] gccrs: Add support for TuplePattern in let statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-57-arthur.cohen@embecosm.com/mbox/"},{"id":79721,"url":"https://patchwork.plctlab.org/api/1.2/patches/79721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-58-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-58-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:41","name":"[committed,57/88] gccrs: rust-item: include rust-expr.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-58-arthur.cohen@embecosm.com/mbox/"},{"id":79717,"url":"https://patchwork.plctlab.org/api/1.2/patches/79717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-59-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-59-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:42","name":"[committed,58/88] gccrs: parser: Expose parse_macro_invocation as public API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-59-arthur.cohen@embecosm.com/mbox/"},{"id":79720,"url":"https://patchwork.plctlab.org/api/1.2/patches/79720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-60-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-60-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:43","name":"[committed,59/88] gccrs: expansion: Add `get_token_slice` to `MacroInvocLexer` class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-60-arthur.cohen@embecosm.com/mbox/"},{"id":79722,"url":"https://patchwork.plctlab.org/api/1.2/patches/79722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-61-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-61-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:44","name":"[committed,60/88] gccrs: macros: Perform macro expansion in a fixed-point fashion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-61-arthur.cohen@embecosm.com/mbox/"},{"id":79691,"url":"https://patchwork.plctlab.org/api/1.2/patches/79691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-62-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-62-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:45","name":"[committed,61/88] gccrs: expander: Add documentation for `expand_eager_invocations`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-62-arthur.cohen@embecosm.com/mbox/"},{"id":79719,"url":"https://patchwork.plctlab.org/api/1.2/patches/79719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-63-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-63-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:46","name":"[committed,62/88] gccrs: typecheck: Refactor rust-hir-trait-reference.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-63-arthur.cohen@embecosm.com/mbox/"},{"id":79723,"url":"https://patchwork.plctlab.org/api/1.2/patches/79723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-64-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-64-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:47","name":"[committed,63/88] gccrs: cli: Update safety warning message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-64-arthur.cohen@embecosm.com/mbox/"},{"id":79724,"url":"https://patchwork.plctlab.org/api/1.2/patches/79724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-65-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-65-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:48","name":"[committed,64/88] gccrs: Update copyright years.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-65-arthur.cohen@embecosm.com/mbox/"},{"id":79725,"url":"https://patchwork.plctlab.org/api/1.2/patches/79725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-66-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-66-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:49","name":"[committed,65/88] gccrs: Add feature gate for \"rust-intrinsic\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-66-arthur.cohen@embecosm.com/mbox/"},{"id":79697,"url":"https://patchwork.plctlab.org/api/1.2/patches/79697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-67-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-67-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:50","name":"[committed,66/88] gccrs: Add variadic argument type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-67-arthur.cohen@embecosm.com/mbox/"},{"id":79726,"url":"https://patchwork.plctlab.org/api/1.2/patches/79726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-68-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-68-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:51","name":"[committed,67/88] gccrs: Add test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-68-arthur.cohen@embecosm.com/mbox/"},{"id":79728,"url":"https://patchwork.plctlab.org/api/1.2/patches/79728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-69-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-69-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:52","name":"[committed,68/88] gccrs: Simplify WildcardPattern let statement handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-69-arthur.cohen@embecosm.com/mbox/"},{"id":79702,"url":"https://patchwork.plctlab.org/api/1.2/patches/79702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-70-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-70-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:53","name":"[committed,69/88] gccrs: lex: Prevent directories in RAIIFile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-70-arthur.cohen@embecosm.com/mbox/"},{"id":79709,"url":"https://patchwork.plctlab.org/api/1.2/patches/79709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-71-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-71-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:54","name":"[committed,70/88] gccrs: testsuite: Add empty string macro test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-71-arthur.cohen@embecosm.com/mbox/"},{"id":79727,"url":"https://patchwork.plctlab.org/api/1.2/patches/79727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-72-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-72-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:55","name":"[committed,71/88] gccrs: Add support for parsing empty tuple patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-72-arthur.cohen@embecosm.com/mbox/"},{"id":79729,"url":"https://patchwork.plctlab.org/api/1.2/patches/79729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-74-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-74-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:57","name":"[committed,73/88] gccrs: Extract query_type from TypeCheckBase to be a simple extern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-74-arthur.cohen@embecosm.com/mbox/"},{"id":79714,"url":"https://patchwork.plctlab.org/api/1.2/patches/79714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-75-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-75-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:58","name":"[committed,74/88] gccrs: Add new virtual function HIR::ImplItem::get_impl_item_name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-75-arthur.cohen@embecosm.com/mbox/"},{"id":79738,"url":"https://patchwork.plctlab.org/api/1.2/patches/79738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-76-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-76-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:03:59","name":"[committed,75/88] gccrs: Support for Sized builtin marker trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-76-arthur.cohen@embecosm.com/mbox/"},{"id":79732,"url":"https://patchwork.plctlab.org/api/1.2/patches/79732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-77-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-77-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:00","name":"[committed,76/88] gccrs: Fix regression in testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-77-arthur.cohen@embecosm.com/mbox/"},{"id":79731,"url":"https://patchwork.plctlab.org/api/1.2/patches/79731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-78-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-78-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:01","name":"[committed,77/88] gccrs: Add trailing newline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-78-arthur.cohen@embecosm.com/mbox/"},{"id":79730,"url":"https://patchwork.plctlab.org/api/1.2/patches/79730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-79-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-79-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:02","name":"[committed,78/88] gccrs: builtins: Return empty list of tokens instead of nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-79-arthur.cohen@embecosm.com/mbox/"},{"id":79735,"url":"https://patchwork.plctlab.org/api/1.2/patches/79735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-80-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-80-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:03","name":"[committed,79/88] gccrs: Fix formatting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-80-arthur.cohen@embecosm.com/mbox/"},{"id":79734,"url":"https://patchwork.plctlab.org/api/1.2/patches/79734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-81-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-81-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:04","name":"[committed,80/88] gccrs: Add AST::AltPattern class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-81-arthur.cohen@embecosm.com/mbox/"},{"id":79718,"url":"https://patchwork.plctlab.org/api/1.2/patches/79718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-82-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-82-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:05","name":"[committed,81/88] gccrs: Fix up DejaGnu directives in '\''rust/compile/issue-1830_{bytes, str}.rs'\'' test cases [#1838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-82-arthur.cohen@embecosm.com/mbox/"},{"id":79737,"url":"https://patchwork.plctlab.org/api/1.2/patches/79737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-83-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-83-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:06","name":"[committed,82/88] gccrs: rename rust-hir-full-tests.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-83-arthur.cohen@embecosm.com/mbox/"},{"id":79740,"url":"https://patchwork.plctlab.org/api/1.2/patches/79740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-84-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-84-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:07","name":"[committed,83/88] gccrs: add test case to show our query-type system is working","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-84-arthur.cohen@embecosm.com/mbox/"},{"id":79733,"url":"https://patchwork.plctlab.org/api/1.2/patches/79733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-85-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-85-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:08","name":"[committed,84/88] gccrs: ast: Refactor TraitItem to keep Location info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-85-arthur.cohen@embecosm.com/mbox/"},{"id":79736,"url":"https://patchwork.plctlab.org/api/1.2/patches/79736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-86-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-86-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:09","name":"[committed,85/88] gccrs: diagnostic: Refactor Error class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-86-arthur.cohen@embecosm.com/mbox/"},{"id":79744,"url":"https://patchwork.plctlab.org/api/1.2/patches/79744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-87-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-87-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:10","name":"[committed,86/88] gccrs: Added AST Node AST::InlineAsm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-87-arthur.cohen@embecosm.com/mbox/"},{"id":79739,"url":"https://patchwork.plctlab.org/api/1.2/patches/79739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-88-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-88-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:11","name":"[committed,87/88] gccrs: Address unsafe with/without block handling ambiguity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-88-arthur.cohen@embecosm.com/mbox/"},{"id":79742,"url":"https://patchwork.plctlab.org/api/1.2/patches/79742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-89-arthur.cohen@embecosm.com/","msgid":"<20230405140411.3016563-89-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-04-05T14:04:12","name":"[committed,88/88] gccrs: Fix issue with parsing unsafe block expression statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405140411.3016563-89-arthur.cohen@embecosm.com/mbox/"},{"id":79758,"url":"https://patchwork.plctlab.org/api/1.2/patches/79758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2LJcmv8Gd2X0Q0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-05T14:52:21","name":"[committed] hppa: Add assember CFI directives to millicode division and remainder routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2LJcmv8Gd2X0Q0@mx3210.localdomain/mbox/"},{"id":79772,"url":"https://patchwork.plctlab.org/api/1.2/patches/79772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2YKR0I073iqang@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-05T15:47:53","name":"[committed] hppa: Fix 22_locale/locale/cons/12658_thread-2.cc on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC2YKR0I073iqang@mx3210.localdomain/mbox/"},{"id":79820,"url":"https://patchwork.plctlab.org/api/1.2/patches/79820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405165927.1987914-1-ppalka@redhat.com/","msgid":"<20230405165927.1987914-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-05T16:59:27","name":"c++: '\''typename T::X'\'' vs '\''struct T::X'\'' lookup [PR109420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405165927.1987914-1-ppalka@redhat.com/mbox/"},{"id":79905,"url":"https://patchwork.plctlab.org/api/1.2/patches/79905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a81da3-99ab-482e-14aa-59a8f1025ffe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-05T20:10:25","name":"PR tree-optimization/109417 - Check if dependency is valid before using in may_recompute_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a81da3-99ab-482e-14aa-59a8f1025ffe@redhat.com/mbox/"},{"id":79941,"url":"https://patchwork.plctlab.org/api/1.2/patches/79941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-2-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:11","name":"[v2,1/8] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-2-patrick@rivosinc.com/mbox/"},{"id":79949,"url":"https://patchwork.plctlab.org/api/1.2/patches/79949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-3-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:12","name":"[v2,2/8] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-3-patrick@rivosinc.com/mbox/"},{"id":79951,"url":"https://patchwork.plctlab.org/api/1.2/patches/79951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-4-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:13","name":"[v2,3/8] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-4-patrick@rivosinc.com/mbox/"},{"id":79942,"url":"https://patchwork.plctlab.org/api/1.2/patches/79942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-5-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:14","name":"[v2,4/8] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-5-patrick@rivosinc.com/mbox/"},{"id":79944,"url":"https://patchwork.plctlab.org/api/1.2/patches/79944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-6-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:15","name":"[v2,5/8] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-6-patrick@rivosinc.com/mbox/"},{"id":79945,"url":"https://patchwork.plctlab.org/api/1.2/patches/79945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-7-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:16","name":"[v2,6/8] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-7-patrick@rivosinc.com/mbox/"},{"id":79952,"url":"https://patchwork.plctlab.org/api/1.2/patches/79952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-8-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:17","name":"[v2,7/8] RISCV: Weaken atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-8-patrick@rivosinc.com/mbox/"},{"id":79953,"url":"https://patchwork.plctlab.org/api/1.2/patches/79953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-9-patrick@rivosinc.com/","msgid":"<20230405210118.1969283-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-05T21:01:18","name":"[v2,8/8] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230405210118.1969283-9-patrick@rivosinc.com/mbox/"},{"id":80045,"url":"https://patchwork.plctlab.org/api/1.2/patches/80045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406041530.256933-1-apinski@marvell.com/","msgid":"<20230406041530.256933-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-06T04:15:30","name":"Fix typo in -param=vect-induction-float= attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406041530.256933-1-apinski@marvell.com/mbox/"},{"id":80049,"url":"https://patchwork.plctlab.org/api/1.2/patches/80049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406042526.257487-1-apinski@marvell.com/","msgid":"<20230406042526.257487-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-06T04:25:26","name":"Fix typo in -param=vect-induction-float= attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406042526.257487-1-apinski@marvell.com/mbox/"},{"id":80052,"url":"https://patchwork.plctlab.org/api/1.2/patches/80052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com/","msgid":"<59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com>","list_archive_url":null,"date":"2023-04-06T05:35:20","name":"[PATCHv3,rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59bcf1e2-a983-8485-5062-920457fe0503@linux.ibm.com/mbox/"},{"id":80060,"url":"https://patchwork.plctlab.org/api/1.2/patches/80060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8i98rdn.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-06T06:19:16","name":"[testsuite,ppc] skip ppc-fortran if fortran is disabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8i98rdn.fsf@lxoliva.fsfla.org/mbox/"},{"id":80067,"url":"https://patchwork.plctlab.org/api/1.2/patches/80067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-2-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:14","name":"[1/5] RISC-V: Minimal support for ZC extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-2-jiawei@iscas.ac.cn/mbox/"},{"id":80065,"url":"https://patchwork.plctlab.org/api/1.2/patches/80065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-3-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:15","name":"[2/5] RISC-V: Enable compressible features when use ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-3-jiawei@iscas.ac.cn/mbox/"},{"id":80064,"url":"https://patchwork.plctlab.org/api/1.2/patches/80064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-4-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:16","name":"[3/5] RISC-V: Add ZC* test for march args being passed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-4-jiawei@iscas.ac.cn/mbox/"},{"id":80066,"url":"https://patchwork.plctlab.org/api/1.2/patches/80066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-5-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-5-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:17","name":"[4/5] RISC-V: Add Zcmp extension supports.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-5-jiawei@iscas.ac.cn/mbox/"},{"id":80068,"url":"https://patchwork.plctlab.org/api/1.2/patches/80068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-6-jiawei@iscas.ac.cn/","msgid":"<20230406062118.47431-6-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-06T06:21:18","name":"[5/5] RISC-V: Add ZCMP push/pop testcases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062118.47431-6-jiawei@iscas.ac.cn/mbox/"},{"id":80069,"url":"https://patchwork.plctlab.org/api/1.2/patches/80069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062737.79723-1-iain@sandoe.co.uk/","msgid":"<20230406062737.79723-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-04-06T06:27:37","name":"c++, coroutines: Fix block nests when the function has no top-level bind.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406062737.79723-1-iain@sandoe.co.uk/mbox/"},{"id":80114,"url":"https://patchwork.plctlab.org/api/1.2/patches/80114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406072807.3434931-1-indu.bhagat@oracle.com/","msgid":"<20230406072807.3434931-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-04-06T07:28:07","name":"[Committed] MAINTAINERS: Add myself as CTF and BTF reviewer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406072807.3434931-1-indu.bhagat@oracle.com/mbox/"},{"id":80137,"url":"https://patchwork.plctlab.org/api/1.2/patches/80137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406081900.3588715-1-chenglulu@loongson.cn/","msgid":"<20230406081900.3588715-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-06T08:19:01","name":"LoongArch: Add built-in functions description of LoongArch BASE instruction set instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406081900.3588715-1-chenglulu@loongson.cn/mbox/"},{"id":80161,"url":"https://patchwork.plctlab.org/api/1.2/patches/80161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6Uzf9gu8sWW7+K@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-06T09:45:49","name":"riscv: Fix genrvv-type-indexer dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6Uzf9gu8sWW7+K@tucnak/mbox/"},{"id":80184,"url":"https://patchwork.plctlab.org/api/1.2/patches/80184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6fiaL9vIiqZJ7z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:31:37","name":"combine: Fix simplify_comparison AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6fiaL9vIiqZJ7z@tucnak/mbox/"},{"id":80189,"url":"https://patchwork.plctlab.org/api/1.2/patches/80189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406103533.1087349-1-arsen@aarsen.me/","msgid":"<20230406103533.1087349-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-06T10:35:34","name":"update_web_docs_git: Add updated Texinfo to PATH","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406103533.1087349-1-arsen@aarsen.me/mbox/"},{"id":80191,"url":"https://patchwork.plctlab.org/api/1.2/patches/80191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17159-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:43:34","name":"[3/3] RFC - match.pd: automatically partition *-match.cc files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17159-tamar@arm.com/mbox/"},{"id":80192,"url":"https://patchwork.plctlab.org/api/1.2/patches/80192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com/","msgid":"<466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com>","list_archive_url":null,"date":"2023-04-06T10:49:53","name":"[v2] ree: Improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/466cc7e1-9f40-be24-33ef-d965e1e61cba@linux.ibm.com/mbox/"},{"id":80193,"url":"https://patchwork.plctlab.org/api/1.2/patches/80193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17157-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:56:01","name":"[1/3] RFC match.pd: don'\''t emit label if not needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17157-tamar@arm.com/mbox/"},{"id":80194,"url":"https://patchwork.plctlab.org/api/1.2/patches/80194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6lb7jIu2t7kssM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-06T10:56:47","name":"[2/3] RFC - match.pd: simplify debug dump checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC6lb7jIu2t7kssM@arm.com/mbox/"},{"id":80212,"url":"https://patchwork.plctlab.org/api/1.2/patches/80212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406113322.3182296-1-yashinde145@gmail.com/","msgid":"<20230406113322.3182296-1-yashinde145@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:33:22","name":"Add ssp_nonshared to link commandline for musl targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406113322.3182296-1-yashinde145@gmail.com/mbox/"},{"id":80213,"url":"https://patchwork.plctlab.org/api/1.2/patches/80213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114158.3182468-1-raj.khem@gmail.com/","msgid":"<20230406114158.3182468-1-raj.khem@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:41:58","name":"gcc: armv4: pass fix-v4bx to linker to support EABI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114158.3182468-1-raj.khem@gmail.com/mbox/"},{"id":80214,"url":"https://patchwork.plctlab.org/api/1.2/patches/80214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114906.3182600-1-yashinde145@gmail.com/","msgid":"<20230406114906.3182600-1-yashinde145@gmail.com>","list_archive_url":null,"date":"2023-04-06T11:49:06","name":"Search target sysroot gcc version specific dirs with multilib.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406114906.3182600-1-yashinde145@gmail.com/mbox/"},{"id":80248,"url":"https://patchwork.plctlab.org/api/1.2/patches/80248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406133441.1944365-1-yanzhang.wang@intel.com/","msgid":"<20230406133441.1944365-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-06T13:34:41","name":"RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406133441.1944365-1-yanzhang.wang@intel.com/mbox/"},{"id":80251,"url":"https://patchwork.plctlab.org/api/1.2/patches/80251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3041a27a-8599-23da-237b-d802f83c40ae@suse.cz/","msgid":"<3041a27a-8599-23da-237b-d802f83c40ae@suse.cz>","list_archive_url":null,"date":"2023-04-06T13:58:35","name":"gcov: add info about \"calls\" to JSON output format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3041a27a-8599-23da-237b-d802f83c40ae@suse.cz/mbox/"},{"id":80285,"url":"https://patchwork.plctlab.org/api/1.2/patches/80285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-2-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:20","name":"[1/3] VECT: Add WHILE_LEN pattern to support decrement IV manipulation for loop vectorizer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-2-juzhe.zhong@rivai.ai/mbox/"},{"id":80288,"url":"https://patchwork.plctlab.org/api/1.2/patches/80288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-3-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:21","name":"[2/3] RISC-V: Enable basic RVV auto-vectorization and support WHILE_LEN/LEN_LOAD/LEN_STORE pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-3-juzhe.zhong@rivai.ai/mbox/"},{"id":80289,"url":"https://patchwork.plctlab.org/api/1.2/patches/80289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-4-juzhe.zhong@rivai.ai/","msgid":"<20230406144222.316395-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-06T14:42:22","name":"RISC-V: Add RVV auto-vectorization testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406144222.316395-4-juzhe.zhong@rivai.ai/mbox/"},{"id":80308,"url":"https://patchwork.plctlab.org/api/1.2/patches/80308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC7hS75ohXMo7Qcw@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-06T15:12:11","name":"PR target/70243: Do not generate fmaddfp and fnmsubfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC7hS75ohXMo7Qcw@toto.the-meissners.org/mbox/"},{"id":80324,"url":"https://patchwork.plctlab.org/api/1.2/patches/80324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406153620.931820-1-rearnsha@arm.com/","msgid":"<20230406153620.931820-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-04-06T15:36:20","name":"[committed] arm: mve: fix auto-inc generation [PR107674]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230406153620.931820-1-rearnsha@arm.com/mbox/"},{"id":80383,"url":"https://patchwork.plctlab.org/api/1.2/patches/80383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com/","msgid":"<26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com>","list_archive_url":null,"date":"2023-04-06T18:02:05","name":"[committed,testsuite] arm: remove unused variables from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26ce825d-8a84-4fc8-fde9-5485ffdd63a3@arm.com/mbox/"},{"id":80392,"url":"https://patchwork.plctlab.org/api/1.2/patches/80392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com/","msgid":"<14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com>","list_archive_url":null,"date":"2023-04-06T18:56:39","name":"'\''omp scan'\'' struct block seq update for OpenMP 5.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/14c1739e-4344-1252-cc67-4a4289b1b2e4@codesourcery.com/mbox/"},{"id":80593,"url":"https://patchwork.plctlab.org/api/1.2/patches/80593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407011143.46004-1-juzhe.zhong@rivai.ai/","msgid":"<20230407011143.46004-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:11:43","name":"RISC-V: Fix incorrect condition of EEW = 64 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407011143.46004-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80595,"url":"https://patchwork.plctlab.org/api/1.2/patches/80595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012129.63142-1-juzhe.zhong@rivai.ai/","msgid":"<20230407012129.63142-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:21:29","name":"RISC-V: Add RVV auto-vectorization compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012129.63142-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80597,"url":"https://patchwork.plctlab.org/api/1.2/patches/80597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012503.65215-1-juzhe.zhong@rivai.ai/","msgid":"<20230407012503.65215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:25:03","name":"RISC-V: Enable basic RVV auto-vectorization support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407012503.65215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80599,"url":"https://patchwork.plctlab.org/api/1.2/patches/80599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013413.127686-1-juzhe.zhong@rivai.ai/","msgid":"<20230407013413.127686-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:34:13","name":"RISC-V: Add local user vsetvl instruction elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013413.127686-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80600,"url":"https://patchwork.plctlab.org/api/1.2/patches/80600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013701.129875-1-juzhe.zhong@rivai.ai/","msgid":"<20230407013701.129875-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:37:01","name":"RISC-V: Add testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407013701.129875-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80602,"url":"https://patchwork.plctlab.org/api/1.2/patches/80602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407014741.139387-1-juzhe.zhong@rivai.ai/","msgid":"<20230407014741.139387-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-07T01:47:41","name":"VECT: Add WHILE_LEN pattern for decrement IV support for auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407014741.139387-1-juzhe.zhong@rivai.ai/mbox/"},{"id":80644,"url":"https://patchwork.plctlab.org/api/1.2/patches/80644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-1-shiyulong@iscas.ac.cn/","msgid":"<20230407033702.6770-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-07T03:37:01","name":"[V4] RISC-V: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-1-shiyulong@iscas.ac.cn/mbox/"},{"id":80645,"url":"https://patchwork.plctlab.org/api/1.2/patches/80645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-2-shiyulong@iscas.ac.cn/","msgid":"<20230407033702.6770-2-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-07T03:37:02","name":"[V2] RISC-V: Modified validation information for contracts-tmpl-spec2.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407033702.6770-2-shiyulong@iscas.ac.cn/mbox/"},{"id":80660,"url":"https://patchwork.plctlab.org/api/1.2/patches/80660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000201d96911$5824d670$086e8350$@pony-e.jp/","msgid":"<000201d96911$5824d670$086e8350$@pony-e.jp>","list_archive_url":null,"date":"2023-04-07T05:25:19","name":"PR target/109402: v850 (not v850e) variant of __muldi3() moves sp in reversed direction [PR109402]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000201d96911$5824d670$086e8350$@pony-e.jp/mbox/"},{"id":80668,"url":"https://patchwork.plctlab.org/api/1.2/patches/80668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC+5WQxocwgkig/1@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-07T06:34:01","name":"[V2] PR target/70243: Do not generate vmaddfp and vnmsubfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZC+5WQxocwgkig/1@toto.the-meissners.org/mbox/"},{"id":80672,"url":"https://patchwork.plctlab.org/api/1.2/patches/80672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407065940.2331101-1-yanzhang.wang@intel.com/","msgid":"<20230407065940.2331101-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-07T06:59:40","name":"[v2] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407065940.2331101-1-yanzhang.wang@intel.com/mbox/"},{"id":80699,"url":"https://patchwork.plctlab.org/api/1.2/patches/80699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407083820.752753-1-chenglulu@loongson.cn/","msgid":"<20230407083820.752753-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-07T08:38:20","name":"[v2] LoongArch: Add built-in functions description of LoongArch Base instruction set instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407083820.752753-1-chenglulu@loongson.cn/mbox/"},{"id":80774,"url":"https://patchwork.plctlab.org/api/1.2/patches/80774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407123249.2600968-1-yanzhang.wang@intel.com/","msgid":"<20230407123249.2600968-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-07T12:32:49","name":"[v3] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230407123249.2600968-1-yanzhang.wang@intel.com/mbox/"},{"id":80901,"url":"https://patchwork.plctlab.org/api/1.2/patches/80901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com/","msgid":"<49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com>","list_archive_url":null,"date":"2023-04-07T16:07:27","name":"[rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49f9e9ee-3137-e483-e337-ae030579bd6a@linux.ibm.com/mbox/"},{"id":81051,"url":"https://patchwork.plctlab.org/api/1.2/patches/81051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUpcDZda0axzk=_d-CEoO_s_ZVHMmxyzSYWoz0LfK8fQg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-07T21:07:42","name":"libgo patch committed: Remove test ordering dependency in mime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUpcDZda0axzk=_d-CEoO_s_ZVHMmxyzSYWoz0LfK8fQg@mail.gmail.com/mbox/"},{"id":81066,"url":"https://patchwork.plctlab.org/api/1.2/patches/81066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com/","msgid":"<8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com>","list_archive_url":null,"date":"2023-04-07T22:33:37","name":"aarch64: Add the cost and scheduling models for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8E0E3524-094D-43CD-93B1-B99D26ABD724@icloud.com/mbox/"},{"id":81214,"url":"https://patchwork.plctlab.org/api/1.2/patches/81214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDFte7XxGH3P2fpq@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-08T13:34:51","name":"[V3] PR target/70243 - Do not generate vmaddfp or vnmsubdp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDFte7XxGH3P2fpq@toto.the-meissners.org/mbox/"},{"id":81244,"url":"https://patchwork.plctlab.org/api/1.2/patches/81244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDGQrieOfEIVNkfg@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-08T16:05:02","name":"[committed] hppa: Fix gcc.dg/long_branch.c on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDGQrieOfEIVNkfg@mx3210.localdomain/mbox/"},{"id":81259,"url":"https://patchwork.plctlab.org/api/1.2/patches/81259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com/","msgid":"<15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com>","list_archive_url":null,"date":"2023-04-08T18:27:38","name":"[committed,PR,tree-optimization/109392] Handle failure from maybe_push_res_to_seq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15b03560-d4cf-d045-6a27-f0a6e2651fbe@gmail.com/mbox/"},{"id":81338,"url":"https://patchwork.plctlab.org/api/1.2/patches/81338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020807.1757872-1-haochen.jiang@intel.com/","msgid":"<20230410020807.1757872-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-10T02:08:07","name":"gcc-13: Mention Intel AMX-COMPLEX ISA support and revise march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020807.1757872-1-haochen.jiang@intel.com/mbox/"},{"id":81340,"url":"https://patchwork.plctlab.org/api/1.2/patches/81340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020941.2440885-1-guojiufu@linux.ibm.com/","msgid":"<20230410020941.2440885-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-10T02:09:41","name":"testsuite: update requires for powerpc/float128-cmp2-runnable.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410020941.2440885-1-guojiufu@linux.ibm.com/mbox/"},{"id":81350,"url":"https://patchwork.plctlab.org/api/1.2/patches/81350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410030037.1202490-1-yanzhang.wang@intel.com/","msgid":"<20230410030037.1202490-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-10T03:00:37","name":"[v4] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410030037.1202490-1-yanzhang.wang@intel.com/mbox/"},{"id":81357,"url":"https://patchwork.plctlab.org/api/1.2/patches/81357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033134.78378-1-juzhe.zhong@rivai.ai/","msgid":"<20230410033134.78378-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T03:31:34","name":"RISC-V: Fix EEW = 64 predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033134.78378-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81358,"url":"https://patchwork.plctlab.org/api/1.2/patches/81358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033938.130469-1-juzhe.zhong@rivai.ai/","msgid":"<20230410033938.130469-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T03:39:38","name":"RISC-V: Allow LMUL = 2 auto-vectorization for zve32*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410033938.130469-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81363,"url":"https://patchwork.plctlab.org/api/1.2/patches/81363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410050701.10254-1-mynameisxiaou@gmail.com/","msgid":"<20230410050701.10254-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-04-10T05:07:01","name":"RISC-V: avoid splitting small constant in i_extrabit pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410050701.10254-1-mynameisxiaou@gmail.com/mbox/"},{"id":81460,"url":"https://patchwork.plctlab.org/api/1.2/patches/81460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410105640.6510-1-mynameisxiaou@gmail.com/","msgid":"<20230410105640.6510-1-mynameisxiaou@gmail.com>","list_archive_url":null,"date":"2023-04-10T10:56:40","name":"RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr3 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410105640.6510-1-mynameisxiaou@gmail.com/mbox/"},{"id":81529,"url":"https://patchwork.plctlab.org/api/1.2/patches/81529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410144808.324346-1-juzhe.zhong@rivai.ai/","msgid":"<20230410144808.324346-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-10T14:48:08","name":"machine_mode type size: Extend enum size from 8-bit to 16-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410144808.324346-1-juzhe.zhong@rivai.ai/mbox/"},{"id":81592,"url":"https://patchwork.plctlab.org/api/1.2/patches/81592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-2-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:39","name":"[v3,01/10] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-2-patrick@rivosinc.com/mbox/"},{"id":81596,"url":"https://patchwork.plctlab.org/api/1.2/patches/81596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-3-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:40","name":"[v3,02/10] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-3-patrick@rivosinc.com/mbox/"},{"id":81598,"url":"https://patchwork.plctlab.org/api/1.2/patches/81598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-4-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:41","name":"[v3,03/10] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-4-patrick@rivosinc.com/mbox/"},{"id":81594,"url":"https://patchwork.plctlab.org/api/1.2/patches/81594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-5-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:42","name":"[v3,04/10] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-5-patrick@rivosinc.com/mbox/"},{"id":81601,"url":"https://patchwork.plctlab.org/api/1.2/patches/81601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-6-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:43","name":"[v3,05/10] RISCV: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-6-patrick@rivosinc.com/mbox/"},{"id":81593,"url":"https://patchwork.plctlab.org/api/1.2/patches/81593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-7-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:44","name":"[v3,06/10] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-7-patrick@rivosinc.com/mbox/"},{"id":81597,"url":"https://patchwork.plctlab.org/api/1.2/patches/81597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-8-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:45","name":"[v3,07/10] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-8-patrick@rivosinc.com/mbox/"},{"id":81603,"url":"https://patchwork.plctlab.org/api/1.2/patches/81603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-9-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:46","name":"[v3,08/10] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-9-patrick@rivosinc.com/mbox/"},{"id":81599,"url":"https://patchwork.plctlab.org/api/1.2/patches/81599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-10-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:47","name":"[v3,09/10] RISCV: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-10-patrick@rivosinc.com/mbox/"},{"id":81602,"url":"https://patchwork.plctlab.org/api/1.2/patches/81602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-11-patrick@rivosinc.com/","msgid":"<20230410182348.2168356-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-10T18:23:48","name":"[v3,10/10] RISCV: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230410182348.2168356-11-patrick@rivosinc.com/mbox/"},{"id":81634,"url":"https://patchwork.plctlab.org/api/1.2/patches/81634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca740fe-9b24-4f46-9744-67b7dff20908-1681159786501@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-04-10T20:49:46","name":"Fortran: resolve correct generic with TYPE(C_PTR) arguments [PR61615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca740fe-9b24-4f46-9744-67b7dff20908-1681159786501@3c-app-gmx-bs33/mbox/"},{"id":81794,"url":"https://patchwork.plctlab.org/api/1.2/patches/81794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUWZffY5P/8o2OQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-11T08:12:21","name":"c++: Fix Solaris bootstraps across midnight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUWZffY5P/8o2OQ@tucnak/mbox/"},{"id":81798,"url":"https://patchwork.plctlab.org/api/1.2/patches/81798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUYpbs+dY6ly8a1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-11T08:21:57","name":"[RFC] range-op-float: Fix up op1_op2_relation of comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDUYpbs+dY6ly8a1@tucnak/mbox/"},{"id":81866,"url":"https://patchwork.plctlab.org/api/1.2/patches/81866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DE18yJuM_Vn9jmaW05t8R6m5rNQ5niLUJVW93O09rR30Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-11T10:31:12","name":"fix compatability typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHiT=DE18yJuM_Vn9jmaW05t8R6m5rNQ5niLUJVW93O09rR30Q@mail.gmail.com/mbox/"},{"id":81898,"url":"https://patchwork.plctlab.org/api/1.2/patches/81898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com/","msgid":"<95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com>","list_archive_url":null,"date":"2023-04-11T11:22:15","name":"[committed] gfortran.dg/gomp/affinity-clause-1.f90: Fix scan-tree-dump (was: [r13-7120 Regression] FAIL: gfortran.dg/gomp/affinity-clause-1.f90 -O scan-tree-dump-times original \"#pragma omp task affinity\\\\(iterator\\\\(integer\\\\(kind=4\\\\) i=D\\\\.[0-9]+:5:1\\\\","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/95ba7882-b47b-0584-68cb-21cc0a7bfc77@codesourcery.com/mbox/"},{"id":81905,"url":"https://patchwork.plctlab.org/api/1.2/patches/81905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411113748.1283643-1-yanzhang.wang@intel.com/","msgid":"<20230411113748.1283643-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-11T11:37:48","name":"[v5] RISC-V: Fix regression of -fzero-call-used-regs=all","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411113748.1283643-1-yanzhang.wang@intel.com/mbox/"},{"id":81964,"url":"https://patchwork.plctlab.org/api/1.2/patches/81964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com/","msgid":"<9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com>","list_archive_url":null,"date":"2023-04-11T13:37:18","name":"[V6,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9FB1E5C7-4229-49A8-851E-8AC3B38ABC82@oracle.com/mbox/"},{"id":81965,"url":"https://patchwork.plctlab.org/api/1.2/patches/81965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/C59672BF-7ECB-458D-9DF1-ED5FB430A60D@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-11T13:38:29","name":"[V6,2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/C59672BF-7ECB-458D-9DF1-ED5FB430A60D@oracle.com/mbox/"},{"id":82013,"url":"https://patchwork.plctlab.org/api/1.2/patches/82013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de/","msgid":"<846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de>","list_archive_url":null,"date":"2023-04-11T14:54:42","name":"[v2] Fortran: resolve correct generic with TYPE(C_PTR) arguments [PR61615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/846db39b-74ea-c10c-a686-a4aa062936d7@gmx.de/mbox/"},{"id":82016,"url":"https://patchwork.plctlab.org/api/1.2/patches/82016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145831.2862333-1-ppalka@redhat.com/","msgid":"<20230411145831.2862333-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-11T14:58:31","name":"libstdc++: Implement LWG 3904 change to lazy_split_view'\''s iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145831.2862333-1-ppalka@redhat.com/mbox/"},{"id":82019,"url":"https://patchwork.plctlab.org/api/1.2/patches/82019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145838.2862361-1-ppalka@redhat.com/","msgid":"<20230411145838.2862361-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-11T14:58:38","name":"libstdc++: Implement ranges::enumerate_view from P2164R9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411145838.2862361-1-ppalka@redhat.com/mbox/"},{"id":82144,"url":"https://patchwork.plctlab.org/api/1.2/patches/82144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com/","msgid":"<82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com>","list_archive_url":null,"date":"2023-04-11T18:47:01","name":"Fix ICEs related to VM types in C [PR106465, PR107557, PR108424, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/82efe5297d61e4937eae0b1aca8eae5a97da04e3.camel@gmail.com/mbox/"},{"id":82150,"url":"https://patchwork.plctlab.org/api/1.2/patches/82150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411190320.13717-1-palmer@rivosinc.com/","msgid":"<20230411190320.13717-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-11T19:03:21","name":"RISC-V: Clean up the pr106602.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411190320.13717-1-palmer@rivosinc.com/mbox/"},{"id":82166,"url":"https://patchwork.plctlab.org/api/1.2/patches/82166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net/","msgid":"<87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net>","list_archive_url":null,"date":"2023-04-11T20:07:15","name":"libgm2: Adjust '\''autogen.sh'\'' to '\''ACLOCAL_AMFLAGS'\'', and simplify (was: [PATCH v3 8/19] modula2 front end: libgm2 contents)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz4aqj2k.fsf@dirichlet.schwinge.homeip.net/mbox/"},{"id":82187,"url":"https://patchwork.plctlab.org/api/1.2/patches/82187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411201031.22067-1-palmer@rivosinc.com/","msgid":"<20230411201031.22067-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-11T20:10:32","name":"RISC-V: Force ilp32d for the T-Head FMV test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230411201031.22067-1-palmer@rivosinc.com/mbox/"},{"id":82168,"url":"https://patchwork.plctlab.org/api/1.2/patches/82168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-101ecbef-9191-4532-b100-478605966705-1681243959761@3c-app-gmx-bs42/","msgid":"","list_archive_url":null,"date":"2023-04-11T20:12:39","name":"Fortran: fix functions with entry and pointer/allocatable result [PR104312]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-101ecbef-9191-4532-b100-478605966705-1681243959761@3c-app-gmx-bs42/mbox/"},{"id":82213,"url":"https://patchwork.plctlab.org/api/1.2/patches/82213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com/","msgid":"<951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com>","list_archive_url":null,"date":"2023-04-11T23:52:29","name":"PR tree-optimization/109462 - Don'\''t use ANY PHI equivalences in range-on-entry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/951d67a7-5eb7-35e5-5e68-ddd6e3d05e3f@redhat.com/mbox/"},{"id":82228,"url":"https://patchwork.plctlab.org/api/1.2/patches/82228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/edf564ae-4312-cdd2-39a9-1e9c1ef68454@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T02:27:22","name":"[rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/edf564ae-4312-cdd2-39a9-1e9c1ef68454@linux.ibm.com/mbox/"},{"id":82268,"url":"https://patchwork.plctlab.org/api/1.2/patches/82268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412060845.981953-1-guojiufu@linux.ibm.com/","msgid":"<20230412060845.981953-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-12T06:08:45","name":"testsuite: filter out warning noise for CWE-1341 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412060845.981953-1-guojiufu@linux.ibm.com/mbox/"},{"id":82278,"url":"https://patchwork.plctlab.org/api/1.2/patches/82278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064931.EF1553858C5F@sourceware.org/","msgid":"<20230412064931.EF1553858C5F@sourceware.org>","list_archive_url":null,"date":"2023-04-12T06:48:47","name":"tree-optimization/109469 - SLP with returns-twice region start","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064931.EF1553858C5F@sourceware.org/mbox/"},{"id":82279,"url":"https://patchwork.plctlab.org/api/1.2/patches/82279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064946.231153856940@sourceware.org/","msgid":"<20230412064946.231153856940@sourceware.org>","list_archive_url":null,"date":"2023-04-12T06:49:01","name":"tree-optimization/109434 - bogus DSE of throwing call LHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412064946.231153856940@sourceware.org/mbox/"},{"id":82361,"url":"https://patchwork.plctlab.org/api/1.2/patches/82361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDaBpPyA/XiPOvjw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T10:02:12","name":"combine, v3: Fix AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDaBpPyA/XiPOvjw@tucnak/mbox/"},{"id":82366,"url":"https://patchwork.plctlab.org/api/1.2/patches/82366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412102406.9F5BC3858C83@sourceware.org/","msgid":"<20230412102406.9F5BC3858C83@sourceware.org>","list_archive_url":null,"date":"2023-04-12T10:23:20","name":"tree-optimization/109473 - ICE with reduction epilog adjustment op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412102406.9F5BC3858C83@sourceware.org/mbox/"},{"id":82384,"url":"https://patchwork.plctlab.org/api/1.2/patches/82384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412110846.308184-1-juzhe.zhong@rivai.ai/","msgid":"<20230412110846.308184-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-12T11:08:46","name":"RISC-V: Fix PR109479","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412110846.308184-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82432,"url":"https://patchwork.plctlab.org/api/1.2/patches/82432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412121648.1394569-1-xry111@xry111.site/","msgid":"<20230412121648.1394569-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-12T12:16:48","name":"[GCC14] LoongArch: Improve cpymemsi expansion [PR109465]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412121648.1394569-1-xry111@xry111.site/mbox/"},{"id":82442,"url":"https://patchwork.plctlab.org/api/1.2/patches/82442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122848.114135-1-jwakely@redhat.com/","msgid":"<20230412122848.114135-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T12:28:48","name":"[committed] libstdc++: Update tzdata to 2023c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122848.114135-1-jwakely@redhat.com/mbox/"},{"id":82444,"url":"https://patchwork.plctlab.org/api/1.2/patches/82444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122856.114242-1-jwakely@redhat.com/","msgid":"<20230412122856.114242-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T12:28:56","name":"[committed] libstdc++: Initialize all members of basic_endpoint union [PR109482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412122856.114242-1-jwakely@redhat.com/mbox/"},{"id":82475,"url":"https://patchwork.plctlab.org/api/1.2/patches/82475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412131840.29214-1-shiyulong@iscas.ac.cn/","msgid":"<20230412131840.29214-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-04-12T13:18:40","name":"[V5] Testsuite: Fix a redefinition bug for the fd-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412131840.29214-1-shiyulong@iscas.ac.cn/mbox/"},{"id":82505,"url":"https://patchwork.plctlab.org/api/1.2/patches/82505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCm5V4E2fea4WvTB55Vv2NbZ-x8h3LZX1mUCk-bQbi+XDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T13:39:26","name":"mingw: Support building with older gcc versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCm5V4E2fea4WvTB55Vv2NbZ-x8h3LZX1mUCk-bQbi+XDQ@mail.gmail.com/mbox/"},{"id":82506,"url":"https://patchwork.plctlab.org/api/1.2/patches/82506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412134502.3147419-1-ppalka@redhat.com/","msgid":"<20230412134502.3147419-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-12T13:45:02","name":"libstdc++: Ensure headers used by fast_float are included","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412134502.3147419-1-ppalka@redhat.com/mbox/"},{"id":82507,"url":"https://patchwork.plctlab.org/api/1.2/patches/82507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412135605.205032-1-juzhe.zhong@rivai.ai/","msgid":"<20230412135605.205032-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-12T13:56:05","name":"RISC-V: Fix pr109479 RVV ISA inconsistency bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412135605.205032-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82512,"url":"https://patchwork.plctlab.org/api/1.2/patches/82512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDa//e6L7ZDXn13x@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T14:28:13","name":"i386: Fix up z operand modifier diagnostics on inline-asm [PR109458]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDa//e6L7ZDXn13x@tucnak/mbox/"},{"id":82513,"url":"https://patchwork.plctlab.org/api/1.2/patches/82513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbB+n2lzHZoH6q5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T14:36:42","name":"reassoc: Fix up another ICE with returns_twice call [PR109410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbB+n2lzHZoH6q5@tucnak/mbox/"},{"id":82515,"url":"https://patchwork.plctlab.org/api/1.2/patches/82515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412144124.3356890-1-ppalka@redhat.com/","msgid":"<20230412144124.3356890-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-12T14:41:24","name":"libstdc++: Fix chunk_by_view when value_type& and reference differ [PR108291]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412144124.3356890-1-ppalka@redhat.com/mbox/"},{"id":82527,"url":"https://patchwork.plctlab.org/api/1.2/patches/82527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJJYwM1w_ECV-GgpoauKa8LT+08u3c4XAEpBGosZSxnkA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-12T15:25:06","name":"[fortran] PR109451 - ICE in gfc_conv_expr_descriptor with ASSOCIATE and substrings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJJYwM1w_ECV-GgpoauKa8LT+08u3c4XAEpBGosZSxnkA@mail.gmail.com/mbox/"},{"id":82577,"url":"https://patchwork.plctlab.org/api/1.2/patches/82577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbjI34T20ewQ2qs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-12T16:58:11","name":"combine, v4: Fix AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDbjI34T20ewQ2qs@tucnak/mbox/"},{"id":82689,"url":"https://patchwork.plctlab.org/api/1.2/patches/82689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223011.207158-1-jwakely@redhat.com/","msgid":"<20230412223011.207158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T22:30:11","name":"[committed] libstdc++: Document libstdc++exp.a library for -fcontracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223011.207158-1-jwakely@redhat.com/mbox/"},{"id":82690,"url":"https://patchwork.plctlab.org/api/1.2/patches/82690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223036.207238-1-jwakely@redhat.com/","msgid":"<20230412223036.207238-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-12T22:30:36","name":"[committed] libstdc++: Fix some AIX test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230412223036.207238-1-jwakely@redhat.com/mbox/"},{"id":82939,"url":"https://patchwork.plctlab.org/api/1.2/patches/82939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413115126.1568212-1-chenglulu@loongson.cn/","msgid":"<20230413115126.1568212-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-13T11:51:26","name":"LoongArch: Remove the definition of the macro LOGICAL_OP_NON_SHORT_CIRCUIT under the architecture and use the default definition instead.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413115126.1568212-1-chenglulu@loongson.cn/mbox/"},{"id":82944,"url":"https://patchwork.plctlab.org/api/1.2/patches/82944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413122722.335227-1-juzhe.zhong@rivai.ai/","msgid":"<20230413122722.335227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-13T12:27:22","name":"RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413122722.335227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":82950,"url":"https://patchwork.plctlab.org/api/1.2/patches/82950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413130105.2925A3856DD2@sourceware.org/","msgid":"<20230413130105.2925A3856DD2@sourceware.org>","list_archive_url":null,"date":"2023-04-13T13:00:20","name":"tree-optimization/109491 - ICE in expressions_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413130105.2925A3856DD2@sourceware.org/mbox/"},{"id":82987,"url":"https://patchwork.plctlab.org/api/1.2/patches/82987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GEHnWpNMrY9=rPPtRkcq=m1zJQZ5dd3QOijNPCJN+i+og@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T13:38:49","name":"[RFC] c++/new-warning: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GEHnWpNMrY9=rPPtRkcq=m1zJQZ5dd3QOijNPCJN+i+og@mail.gmail.com/mbox/"},{"id":82991,"url":"https://patchwork.plctlab.org/api/1.2/patches/82991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDgHd4qtTuRk3r7H@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-13T13:45:27","name":"loop-iv: Fix up bounds computation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDgHd4qtTuRk3r7H@tucnak/mbox/"},{"id":83020,"url":"https://patchwork.plctlab.org/api/1.2/patches/83020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413151018.31791-1-palmer@rivosinc.com/","msgid":"<20230413151018.31791-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-13T15:10:19","name":"RISC-V: Set the ABI for the RVV tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413151018.31791-1-palmer@rivosinc.com/mbox/"},{"id":83027,"url":"https://patchwork.plctlab.org/api/1.2/patches/83027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5zbhiwq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T16:00:05","name":"aarch64: Don'\''t trust TYPE_ALIGN for pointers [PR108910]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5zbhiwq.fsf@arm.com/mbox/"},{"id":83051,"url":"https://patchwork.plctlab.org/api/1.2/patches/83051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8cece7402f7d9d125542747a58f308e3eda625f.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T17:58:38","name":"rs6000: Fix test int_128bit-runnable.c instruction counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8cece7402f7d9d125542747a58f308e3eda625f.camel@us.ibm.com/mbox/"},{"id":83064,"url":"https://patchwork.plctlab.org/api/1.2/patches/83064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-1-jason@redhat.com/","msgid":"<20230413185921.2201433-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-13T18:59:20","name":"[1/2] c++: make cxx_incomplete_type_diagnostic return bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-1-jason@redhat.com/mbox/"},{"id":83065,"url":"https://patchwork.plctlab.org/api/1.2/patches/83065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-2-jason@redhat.com/","msgid":"<20230413185921.2201433-2-jason@redhat.com>","list_archive_url":null,"date":"2023-04-13T18:59:21","name":"[2/2] c++: make trait of incomplete type a permerror [PR109277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413185921.2201433-2-jason@redhat.com/mbox/"},{"id":83073,"url":"https://patchwork.plctlab.org/api/1.2/patches/83073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7e61083e9a2a8154a18a6c4ffe22ae8751ad3f0.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T19:42:34","name":"rs6000: Fix test gc.target/powerpc/rs600-fpint.c test options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7e61083e9a2a8154a18a6c4ffe22ae8751ad3f0.camel@us.ibm.com/mbox/"},{"id":83087,"url":"https://patchwork.plctlab.org/api/1.2/patches/83087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1756a8e41b03138f8db58899799a4539812ecf1.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-13T20:47:11","name":"rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1756a8e41b03138f8db58899799a4539812ecf1.camel@us.ibm.com/mbox/"},{"id":83088,"url":"https://patchwork.plctlab.org/api/1.2/patches/83088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413205208.465-1-palmer@rivosinc.com/","msgid":"<20230413205208.465-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-13T20:52:09","name":"RISC-V: Update multilib-generator to handle V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413205208.465-1-palmer@rivosinc.com/mbox/"},{"id":83089,"url":"https://patchwork.plctlab.org/api/1.2/patches/83089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1425ad38-6282-46fc-a74b-066ba172025d-1681419417716@3c-app-gmx-bs50/","msgid":"","list_archive_url":null,"date":"2023-04-13T20:56:57","name":"[committed] Fortran: call of overloaded ???abs(long long int&)??? is ambiguous [PR109492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1425ad38-6282-46fc-a74b-066ba172025d-1681419417716@3c-app-gmx-bs50/mbox/"},{"id":83132,"url":"https://patchwork.plctlab.org/api/1.2/patches/83132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413232157.1487389-1-philipp.tomsich@vrull.eu/","msgid":"<20230413232157.1487389-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-04-13T23:21:57","name":"aarch64: disable LDP via tuning structure for -mcpu=ampere1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230413232157.1487389-1-philipp.tomsich@vrull.eu/mbox/"},{"id":83171,"url":"https://patchwork.plctlab.org/api/1.2/patches/83171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414014518.15458-1-juzhe.zhong@rivai.ai/","msgid":"<20230414014518.15458-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-14T01:45:18","name":"RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414014518.15458-1-juzhe.zhong@rivai.ai/mbox/"},{"id":83191,"url":"https://patchwork.plctlab.org/api/1.2/patches/83191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414023238.2921142-1-pan2.li@intel.com/","msgid":"<20230414023238.2921142-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T02:32:38","name":"RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414023238.2921142-1-pan2.li@intel.com/mbox/"},{"id":83196,"url":"https://patchwork.plctlab.org/api/1.2/patches/83196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414024529.2930664-1-pan2.li@intel.com/","msgid":"<20230414024529.2930664-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T02:45:29","name":"[v2] RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414024529.2930664-1-pan2.li@intel.com/mbox/"},{"id":83204,"url":"https://patchwork.plctlab.org/api/1.2/patches/83204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414032511.2958280-1-pan2.li@intel.com/","msgid":"<20230414032511.2958280-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-14T03:25:11","name":"[v3] RISC-V: Add test cases for the RVV mask insn shortcut.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414032511.2958280-1-pan2.li@intel.com/mbox/"},{"id":83212,"url":"https://patchwork.plctlab.org/api/1.2/patches/83212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040038.1498807-1-ppalka@redhat.com/","msgid":"<20230414040038.1498807-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:38","name":"libstdc++: Implement ranges::fold_* from P2322R6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040038.1498807-1-ppalka@redhat.com/mbox/"},{"id":83211,"url":"https://patchwork.plctlab.org/api/1.2/patches/83211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-1-ppalka@redhat.com/","msgid":"<20230414040042.1498825-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:41","name":"[1/2] libstdc++: Move down definitions of ranges::cbegin/cend/cetc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-1-ppalka@redhat.com/mbox/"},{"id":83213,"url":"https://patchwork.plctlab.org/api/1.2/patches/83213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-2-ppalka@redhat.com/","msgid":"<20230414040042.1498825-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T04:00:42","name":"[2/2] libstdc++: Implement P2278R4 \"cbegin should always return a constant iterator\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414040042.1498825-2-ppalka@redhat.com/mbox/"},{"id":83257,"url":"https://patchwork.plctlab.org/api/1.2/patches/83257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff0c733d75a54aa59a3c29aa9085b09e@ex13mbxc01n01.ikhex.ikoula.com/","msgid":"","list_archive_url":null,"date":"2023-04-14T07:02:35","name":"aarch64: Add -mveclibabi=sleefgnu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff0c733d75a54aa59a3c29aa9085b09e@ex13mbxc01n01.ikhex.ikoula.com/mbox/"},{"id":83261,"url":"https://patchwork.plctlab.org/api/1.2/patches/83261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414073026.2766449-1-guojiufu@linux.ibm.com/","msgid":"<20230414073026.2766449-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-14T07:30:26","name":"testsuite: update builtins-5-p9-runnable.c for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414073026.2766449-1-guojiufu@linux.ibm.com/mbox/"},{"id":83296,"url":"https://patchwork.plctlab.org/api/1.2/patches/83296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com/","msgid":"<1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com>","list_archive_url":null,"date":"2023-04-14T08:41:37","name":"PATCH] tree-ssa-sink: Add heuristics for code sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d4c9e6c-85e4-7eff-0833-aca7f874fbda@linux.ibm.com/mbox/"},{"id":83314,"url":"https://patchwork.plctlab.org/api/1.2/patches/83314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094255.F02F313498@imap2.suse-dmz.suse.de/","msgid":"<20230414094255.F02F313498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T09:42:55","name":"Fix vect-simd-clone testcase dump scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094255.F02F313498@imap2.suse-dmz.suse.de/mbox/"},{"id":83315,"url":"https://patchwork.plctlab.org/api/1.2/patches/83315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094525.1645E13498@imap2.suse-dmz.suse.de/","msgid":"<20230414094525.1645E13498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T09:45:24","name":"tree-optimization/109502 - vector conversion between mask and non-mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414094525.1645E13498@imap2.suse-dmz.suse.de/mbox/"},{"id":83349,"url":"https://patchwork.plctlab.org/api/1.2/patches/83349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414110022.359953-1-jwakely@redhat.com/","msgid":"<20230414110022.359953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-14T11:00:22","name":"[committed] libstdc++: Improve diagnostics for invalid std::format calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414110022.359953-1-jwakely@redhat.com/mbox/"},{"id":83371,"url":"https://patchwork.plctlab.org/api/1.2/patches/83371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414113222.A977613498@imap2.suse-dmz.suse.de/","msgid":"<20230414113222.A977613498@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-14T11:32:22","name":"vect-simd-clone testcase adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414113222.A977613498@imap2.suse-dmz.suse.de/mbox/"},{"id":83523,"url":"https://patchwork.plctlab.org/api/1.2/patches/83523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-2-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:33","name":"[v4,01/10] RISCV: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-2-patrick@rivosinc.com/mbox/"},{"id":83524,"url":"https://patchwork.plctlab.org/api/1.2/patches/83524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-3-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:34","name":"[v4,02/10] RISCV: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-3-patrick@rivosinc.com/mbox/"},{"id":83525,"url":"https://patchwork.plctlab.org/api/1.2/patches/83525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-4-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:35","name":"[v4,03/10] RISCV: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-4-patrick@rivosinc.com/mbox/"},{"id":83526,"url":"https://patchwork.plctlab.org/api/1.2/patches/83526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-5-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:36","name":"[v4,04/10] RISCV: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-5-patrick@rivosinc.com/mbox/"},{"id":83529,"url":"https://patchwork.plctlab.org/api/1.2/patches/83529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-6-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:37","name":"[v4,05/10] RISCV: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-6-patrick@rivosinc.com/mbox/"},{"id":83530,"url":"https://patchwork.plctlab.org/api/1.2/patches/83530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-7-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:38","name":"[v4,06/10] RISCV: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-7-patrick@rivosinc.com/mbox/"},{"id":83531,"url":"https://patchwork.plctlab.org/api/1.2/patches/83531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-8-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:39","name":"[v4,07/10] RISCV: Weaken compare_exchange LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-8-patrick@rivosinc.com/mbox/"},{"id":83532,"url":"https://patchwork.plctlab.org/api/1.2/patches/83532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-9-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:40","name":"[v4,08/10] RISCV: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-9-patrick@rivosinc.com/mbox/"},{"id":83527,"url":"https://patchwork.plctlab.org/api/1.2/patches/83527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-10-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:41","name":"[v4,09/10] RISCV: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-10-patrick@rivosinc.com/mbox/"},{"id":83528,"url":"https://patchwork.plctlab.org/api/1.2/patches/83528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-11-patrick@rivosinc.com/","msgid":"<20230414170942.1695672-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-14T17:09:42","name":"[v4,10/10] RISCV: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414170942.1695672-11-patrick@rivosinc.com/mbox/"},{"id":83533,"url":"https://patchwork.plctlab.org/api/1.2/patches/83533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmK22caxA60IKzF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-14T17:18:19","name":"Disable X86_TUNE_AVX256_MOVE_BY_PIECES and STORE_BY_PIECES for znver1-3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmK22caxA60IKzF@kam.mff.cuni.cz/mbox/"},{"id":83550,"url":"https://patchwork.plctlab.org/api/1.2/patches/83550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414180543.1497603-1-philipp.tomsich@vrull.eu/","msgid":"<20230414180543.1497603-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-04-14T18:05:43","name":"[v2] aarch64: disable LDP via tuning structure for -mcpu=ampere1/1a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414180543.1497603-1-philipp.tomsich@vrull.eu/mbox/"},{"id":83553,"url":"https://patchwork.plctlab.org/api/1.2/patches/83553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1927733.PYKUYFuaPT@fomalhaut/","msgid":"<1927733.PYKUYFuaPT@fomalhaut>","list_archive_url":null,"date":"2023-04-14T18:18:30","name":"[Ada] Fix PR bootstrap/109510","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1927733.PYKUYFuaPT@fomalhaut/mbox/"},{"id":83560,"url":"https://patchwork.plctlab.org/api/1.2/patches/83560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d5a880c2-3bb0-4464-9940-ac3568977112-1681498764042@3c-app-gmx-bs43/","msgid":"","list_archive_url":null,"date":"2023-04-14T18:59:24","name":"Fortran: fix compile-time simplification of SET_EXPONENT [PR109511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d5a880c2-3bb0-4464-9940-ac3568977112-1681498764042@3c-app-gmx-bs43/mbox/"},{"id":83562,"url":"https://patchwork.plctlab.org/api/1.2/patches/83562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmmXMae9glt4ABn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-14T19:15:40","name":"c: Fix up error-recovery on functions initialized as variables [PR109412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmmXMae9glt4ABn@tucnak/mbox/"},{"id":83563,"url":"https://patchwork.plctlab.org/api/1.2/patches/83563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmnkLaA8EX5RyFz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-14T19:20:48","name":"c: Fix up error-recovery on non-empty VLA initializers [PR109409]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDmnkLaA8EX5RyFz@tucnak/mbox/"},{"id":83564,"url":"https://patchwork.plctlab.org/api/1.2/patches/83564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-1-ppalka@redhat.com/","msgid":"<20230414194512.2569383-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T19:45:11","name":"[1/2] libstdc++: Convert _RangeAdaptorClosure into a CRTP class [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-1-ppalka@redhat.com/mbox/"},{"id":83566,"url":"https://patchwork.plctlab.org/api/1.2/patches/83566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-2-ppalka@redhat.com/","msgid":"<20230414194512.2569383-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-14T19:45:12","name":"[2/2] libstdc++: Implement range_adaptor_closure from P2387R3 [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414194512.2569383-2-ppalka@redhat.com/mbox/"},{"id":83575,"url":"https://patchwork.plctlab.org/api/1.2/patches/83575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414215115.2011733E1A@hamza.pair.com/","msgid":"<20230414215115.2011733E1A@hamza.pair.com>","list_archive_url":null,"date":"2023-04-14T21:51:12","name":"[pushed] wwwdocs: codingconventions: Recommend \"file name\" over \"filename\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414215115.2011733E1A@hamza.pair.com/mbox/"},{"id":83584,"url":"https://patchwork.plctlab.org/api/1.2/patches/83584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414234224.2870389-1-jason@redhat.com/","msgid":"<20230414234224.2870389-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-14T23:42:24","name":"[RFA] -Wdangling-pointer: fix MEM_REF handling [PR109514]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230414234224.2870389-1-jason@redhat.com/mbox/"},{"id":83650,"url":"https://patchwork.plctlab.org/api/1.2/patches/83650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDpVL1KlzxWJKDzy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-15T07:41:37","name":"if-conv: Small improvement for expansion of complex PHIs [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDpVL1KlzxWJKDzy@tucnak/mbox/"},{"id":83715,"url":"https://patchwork.plctlab.org/api/1.2/patches/83715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415120105.131576-1-xry111@xry111.site/","msgid":"<20230415120105.131576-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-15T12:01:05","name":"build: Use -nostdinc generating macro_list [PR109522]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415120105.131576-1-xry111@xry111.site/mbox/"},{"id":83738,"url":"https://patchwork.plctlab.org/api/1.2/patches/83738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415163449.3236640-1-jason@redhat.com/","msgid":"<20230415163449.3236640-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-15T16:34:49","name":"[pushed] c++: constexpr aggregate destruction [PR109357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230415163449.3236640-1-jason@redhat.com/mbox/"},{"id":83764,"url":"https://patchwork.plctlab.org/api/1.2/patches/83764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDrlXTk8H87+cvkM@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-15T17:56:45","name":"[committed] hppa: Fix handling of large arguments passed by value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZDrlXTk8H87+cvkM@mx3210.localdomain/mbox/"},{"id":83843,"url":"https://patchwork.plctlab.org/api/1.2/patches/83843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com/","msgid":"<00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-16T12:07:34","name":"[Committed] New test case gcc.target/avr/pr54816.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9705c$083f5250$18bdf6f0$@nextmovesoftware.com/mbox/"},{"id":83872,"url":"https://patchwork.plctlab.org/api/1.2/patches/83872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3753c6-05e5-c321-c821-22381f4ff6ac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-16T13:20:51","name":"tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf3753c6-05e5-c321-c821-22381f4ff6ac@linux.ibm.com/mbox/"},{"id":83899,"url":"https://patchwork.plctlab.org/api/1.2/patches/83899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com/","msgid":"<9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com>","list_archive_url":null,"date":"2023-04-16T15:57:06","name":"[committed,PR,target/109508] Adjust conditional move expansion for SFB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a3d9170-40de-597a-250b-6bec3445c4db@ventanamicro.com/mbox/"},{"id":83936,"url":"https://patchwork.plctlab.org/api/1.2/patches/83936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GGZ6UmK=i_ozcv6Gz0mqVKg2W3oeYsCYeQ5U_CK5VtNqA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-16T21:33:22","name":"c++: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GGZ6UmK=i_ozcv6Gz0mqVKg2W3oeYsCYeQ5U_CK5VtNqA@mail.gmail.com/mbox/"},{"id":83948,"url":"https://patchwork.plctlab.org/api/1.2/patches/83948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417015358.100811-1-kito.cheng@sifive.com/","msgid":"<20230417015358.100811-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-17T01:53:58","name":"[committed] RISC-V: Fix testsuite fail on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417015358.100811-1-kito.cheng@sifive.com/mbox/"},{"id":83950,"url":"https://patchwork.plctlab.org/api/1.2/patches/83950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417023919.7015-1-fanpeng@loongson.cn/","msgid":"<20230417023919.7015-1-fanpeng@loongson.cn>","list_archive_url":null,"date":"2023-04-17T02:39:19","name":"LoongArch: fix MUSL_DYNAMIC_LINKER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417023919.7015-1-fanpeng@loongson.cn/mbox/"},{"id":83984,"url":"https://patchwork.plctlab.org/api/1.2/patches/83984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034540.2645965-1-ppalka@redhat.com/","msgid":"<20230417034540.2645965-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T03:45:40","name":"libstdc++: Adding missing feature-test macros for C++23 ranges algos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034540.2645965-1-ppalka@redhat.com/mbox/"},{"id":83983,"url":"https://patchwork.plctlab.org/api/1.2/patches/83983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034553.2646005-1-ppalka@redhat.com/","msgid":"<20230417034553.2646005-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T03:45:53","name":"libstdc++: Fix typo in views::as_const'\''s operator() [PR109525]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417034553.2646005-1-ppalka@redhat.com/mbox/"},{"id":84011,"url":"https://patchwork.plctlab.org/api/1.2/patches/84011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417061754.1879-1-juzhe.zhong@rivai.ai/","msgid":"<20230417061754.1879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-17T06:17:54","name":"RISC-V: Add tuple type builtins for segment intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417061754.1879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84060,"url":"https://patchwork.plctlab.org/api/1.2/patches/84060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417084222.B13A23858288@sourceware.org/","msgid":"<20230417084222.B13A23858288@sourceware.org>","list_archive_url":null,"date":"2023-04-17T08:41:38","name":"tree-optimization/109524 - ICE with VRP edge removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417084222.B13A23858288@sourceware.org/mbox/"},{"id":84069,"url":"https://patchwork.plctlab.org/api/1.2/patches/84069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD0Ptanfl7QKBohQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-17T09:21:57","name":"testsuite: Fix up vect-simd-clone-1[678]f.c tests some more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD0Ptanfl7QKBohQ@tucnak/mbox/"},{"id":84161,"url":"https://patchwork.plctlab.org/api/1.2/patches/84161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edoizsln.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-04-17T10:54:44","name":"ipa: Fix double reference-count decrements for the same edge (PR 107769, PR 109318)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edoizsln.fsf@suse.cz/mbox/"},{"id":84187,"url":"https://patchwork.plctlab.org/api/1.2/patches/84187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2304171139240.4466@jbgna.fhfr.qr/","msgid":"","list_archive_url":null,"date":"2023-04-17T11:39:40","name":"[www] Move -fstrict-flex-arrays entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/nycvar.YFH.7.77.849.2304171139240.4466@jbgna.fhfr.qr/mbox/"},{"id":84208,"url":"https://patchwork.plctlab.org/api/1.2/patches/84208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz/","msgid":"<41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz>","list_archive_url":null,"date":"2023-04-17T12:50:55","name":"[(pushed)] ada: bump Library_Version to 14.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/41b971f8-861f-f8c5-8b0d-ea976c41a83c@suse.cz/mbox/"},{"id":84254,"url":"https://patchwork.plctlab.org/api/1.2/patches/84254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417133916.3110637-1-ppalka@redhat.com/","msgid":"<20230417133916.3110637-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T13:39:16","name":"libstdc++: Implement P2770R0 changes to join_view / join_with_view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417133916.3110637-1-ppalka@redhat.com/mbox/"},{"id":84276,"url":"https://patchwork.plctlab.org/api/1.2/patches/84276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417145025.2291874-1-pan2.li@intel.com/","msgid":"<20230417145025.2291874-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-17T14:50:25","name":"RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417145025.2291874-1-pan2.li@intel.com/mbox/"},{"id":84353,"url":"https://patchwork.plctlab.org/api/1.2/patches/84353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417163856.2253309-1-kevinl@rivosinc.com/","msgid":"<20230417163856.2253309-1-kevinl@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T16:38:56","name":"[v3] vect: Verify that GET_MODE_UNITS is greater than one for vect_grouped_store_supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417163856.2253309-1-kevinl@rivosinc.com/mbox/"},{"id":84390,"url":"https://patchwork.plctlab.org/api/1.2/patches/84390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-2-palmer@rivosinc.com/","msgid":"<20230417182044.22425-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:42","name":"[13-backport,1/3] RISC-V: Clean up the pr106602.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-2-palmer@rivosinc.com/mbox/"},{"id":84391,"url":"https://patchwork.plctlab.org/api/1.2/patches/84391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-3-palmer@rivosinc.com/","msgid":"<20230417182044.22425-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:43","name":"[13-backport,2/3] RISC-V: Set the ABI for the RVV tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-3-palmer@rivosinc.com/mbox/"},{"id":84392,"url":"https://patchwork.plctlab.org/api/1.2/patches/84392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-4-palmer@rivosinc.com/","msgid":"<20230417182044.22425-4-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:20:44","name":"[13-backport,3/3] RISC-V: Force ilp32d for the T-Head FMV test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417182044.22425-4-palmer@rivosinc.com/mbox/"},{"id":84398,"url":"https://patchwork.plctlab.org/api/1.2/patches/84398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-2-collison@rivosinc.com/","msgid":"<20230417183701.2249183-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:52","name":"[v4,01/10] RISC-V: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-2-collison@rivosinc.com/mbox/"},{"id":84397,"url":"https://patchwork.plctlab.org/api/1.2/patches/84397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-3-collison@rivosinc.com/","msgid":"<20230417183701.2249183-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:53","name":"[v4,02/10] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-3-collison@rivosinc.com/mbox/"},{"id":84400,"url":"https://patchwork.plctlab.org/api/1.2/patches/84400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-4-collison@rivosinc.com/","msgid":"<20230417183701.2249183-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:54","name":"[v4,03/10] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-4-collison@rivosinc.com/mbox/"},{"id":84399,"url":"https://patchwork.plctlab.org/api/1.2/patches/84399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-5-collison@rivosinc.com/","msgid":"<20230417183701.2249183-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:55","name":"[v4,04/10] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-5-collison@rivosinc.com/mbox/"},{"id":84401,"url":"https://patchwork.plctlab.org/api/1.2/patches/84401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-6-collison@rivosinc.com/","msgid":"<20230417183701.2249183-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:56","name":"[v4,05/10] RISC-V:autovec: Add autovectorization patterns for binary integer operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-6-collison@rivosinc.com/mbox/"},{"id":84402,"url":"https://patchwork.plctlab.org/api/1.2/patches/84402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-7-collison@rivosinc.com/","msgid":"<20230417183701.2249183-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:57","name":"[v4,06/10] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-7-collison@rivosinc.com/mbox/"},{"id":84404,"url":"https://patchwork.plctlab.org/api/1.2/patches/84404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-8-collison@rivosinc.com/","msgid":"<20230417183701.2249183-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:58","name":"[v4,07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-8-collison@rivosinc.com/mbox/"},{"id":84405,"url":"https://patchwork.plctlab.org/api/1.2/patches/84405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-9-collison@rivosinc.com/","msgid":"<20230417183701.2249183-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:36:59","name":"[v4,08/10] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-9-collison@rivosinc.com/mbox/"},{"id":84403,"url":"https://patchwork.plctlab.org/api/1.2/patches/84403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-10-collison@rivosinc.com/","msgid":"<20230417183701.2249183-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:37:00","name":"[v4,09/10] This patch adds a guard for VNx1 vectors that are present in ports like riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-10-collison@rivosinc.com/mbox/"},{"id":84406,"url":"https://patchwork.plctlab.org/api/1.2/patches/84406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-11-collison@rivosinc.com/","msgid":"<20230417183701.2249183-11-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-17T18:37:01","name":"[v4,10/10] This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183701.2249183-11-collison@rivosinc.com/mbox/"},{"id":84407,"url":"https://patchwork.plctlab.org/api/1.2/patches/84407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183917.216257-1-aldyh@redhat.com/","msgid":"<20230417183917.216257-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:39:18","name":"Abstract out calculation of max HWIs per wide int.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417183917.216257-1-aldyh@redhat.com/mbox/"},{"id":84408,"url":"https://patchwork.plctlab.org/api/1.2/patches/84408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184419.4043285-1-ppalka@redhat.com/","msgid":"<20230417184419.4043285-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:44:19","name":"c++: bound ttp level lowering [PR109531]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184419.4043285-1-ppalka@redhat.com/mbox/"},{"id":84409,"url":"https://patchwork.plctlab.org/api/1.2/patches/84409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184701.217397-1-aldyh@redhat.com/","msgid":"<20230417184701.217397-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-17T18:47:01","name":"[COMMITTED] Do not export global ranges from -Walloca pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417184701.217397-1-aldyh@redhat.com/mbox/"},{"id":84413,"url":"https://patchwork.plctlab.org/api/1.2/patches/84413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417185223.245929-1-apinski@marvell.com/","msgid":"<20230417185223.245929-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T18:52:23","name":"[COMMITTED] PHIOPT: Remove gate_hoist_loads prototype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417185223.245929-1-apinski@marvell.com/mbox/"},{"id":84473,"url":"https://patchwork.plctlab.org/api/1.2/patches/84473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ana5uk0Xkmn=6rok+-uMpCsGwC8=i2mxHXGd+vNr0V5g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-17T21:27:28","name":"Introduce VIRTUAL_REGISTER_P and VIRTUAL_REGISTER_NUM_P predicates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ana5uk0Xkmn=6rok+-uMpCsGwC8=i2mxHXGd+vNr0V5g@mail.gmail.com/mbox/"},{"id":84490,"url":"https://patchwork.plctlab.org/api/1.2/patches/84490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-1-apinski@marvell.com/","msgid":"<20230417221740.251864-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T22:17:39","name":"[1/2] PHIOPT: small cleanup in match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-1-apinski@marvell.com/mbox/"},{"id":84491,"url":"https://patchwork.plctlab.org/api/1.2/patches/84491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-2-apinski@marvell.com/","msgid":"<20230417221740.251864-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-17T22:17:40","name":"[2/2] PHIOPT: add folding/simplification detail to the dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230417221740.251864-2-apinski@marvell.com/mbox/"},{"id":84542,"url":"https://patchwork.plctlab.org/api/1.2/patches/84542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418020311.36368-1-juzhe.zhong@rivai.ai/","msgid":"<20230418020311.36368-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T02:03:11","name":"RISC-V: Fix PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418020311.36368-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84562,"url":"https://patchwork.plctlab.org/api/1.2/patches/84562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7d4dad9-e410-c4f0-62f7-c3b6acdd7d70@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T03:13:52","name":"[PATCH-1,rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7d4dad9-e410-c4f0-62f7-c3b6acdd7d70@linux.ibm.com/mbox/"},{"id":84561,"url":"https://patchwork.plctlab.org/api/1.2/patches/84561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92ff30f-759a-2a1a-8086-511b3c0738b0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T03:13:57","name":"[PATCH-2,rs6000] Add ppc_cpu_supports_hw into proc is-effective-target-keyword [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92ff30f-759a-2a1a-8086-511b3c0738b0@linux.ibm.com/mbox/"},{"id":84579,"url":"https://patchwork.plctlab.org/api/1.2/patches/84579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418053314.222548-1-aldyh@redhat.com/","msgid":"<20230418053314.222548-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:33:14","name":"[COMMITTED] Constify invariant fields of vrange and irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418053314.222548-1-aldyh@redhat.com/mbox/"},{"id":84581,"url":"https://patchwork.plctlab.org/api/1.2/patches/84581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418054301.226604-1-aldyh@redhat.com/","msgid":"<20230418054301.226604-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:43:01","name":"[COMMITTED] Add two new methods to Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418054301.226604-1-aldyh@redhat.com/mbox/"},{"id":84584,"url":"https://patchwork.plctlab.org/api/1.2/patches/84584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418055934.245432-1-aldyh@redhat.com/","msgid":"<20230418055934.245432-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T05:59:34","name":"Abstract out REAL_VALUE_TYPE streaming.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418055934.245432-1-aldyh@redhat.com/mbox/"},{"id":84585,"url":"https://patchwork.plctlab.org/api/1.2/patches/84585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418061556.3455329-1-chenglulu@loongson.cn/","msgid":"<20230418061556.3455329-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T06:15:56","name":"gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418061556.3455329-1-chenglulu@loongson.cn/mbox/"},{"id":84592,"url":"https://patchwork.plctlab.org/api/1.2/patches/84592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418063041.2615-1-iain@sandoe.co.uk/","msgid":"<20230418063041.2615-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-04-18T06:30:41","name":"[pushed] libsanitizer, darwin: Unsupport Darwin >= 22 for now.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418063041.2615-1-iain@sandoe.co.uk/mbox/"},{"id":84603,"url":"https://patchwork.plctlab.org/api/1.2/patches/84603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065223.3862113-1-lin1.hu@intel.com/","msgid":"<20230418065223.3862113-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-04-18T06:52:23","name":"i386: Optimize vshuf{i, f}{32x4, 64x2} ymm and vperm{i, f}128 ymm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065223.3862113-1-lin1.hu@intel.com/mbox/"},{"id":84605,"url":"https://patchwork.plctlab.org/api/1.2/patches/84605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065514.4003416-1-haochen.jiang@intel.com/","msgid":"<20230418065514.4003416-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T06:55:14","name":"i386: Use macro to wrap up share builtin exceptions in builtin isa check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418065514.4003416-1-haochen.jiang@intel.com/mbox/"},{"id":84607,"url":"https://patchwork.plctlab.org/api/1.2/patches/84607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070256.3964933-1-lin1.hu@intel.com/","msgid":"<20230418070256.3964933-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-04-18T07:02:56","name":"i386: Add reduce_*_ep[i|u][8|16] series intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070256.3964933-1-lin1.hu@intel.com/mbox/"},{"id":84611,"url":"https://patchwork.plctlab.org/api/1.2/patches/84611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-2-haochen.jiang@intel.com/","msgid":"<20230418070450.4114708-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:04:49","name":"[1/2] i386: Add AVX512BW dependency to AVX512BITALG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-2-haochen.jiang@intel.com/mbox/"},{"id":84612,"url":"https://patchwork.plctlab.org/api/1.2/patches/84612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-3-haochen.jiang@intel.com/","msgid":"<20230418070450.4114708-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:04:50","name":"[2/2] i386: Add AVX512BW dependency to AVX512VBMI2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418070450.4114708-3-haochen.jiang@intel.com/mbox/"},{"id":84615,"url":"https://patchwork.plctlab.org/api/1.2/patches/84615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071105.4061135-1-chenglulu@loongson.cn/","msgid":"<20230418071105.4061135-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T07:11:07","name":"[v2] gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071105.4061135-1-chenglulu@loongson.cn/mbox/"},{"id":84616,"url":"https://patchwork.plctlab.org/api/1.2/patches/84616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071514.4115672-1-haochen.jiang@intel.com/","msgid":"<20230418071514.4115672-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:15:14","name":"i386: Fix vpblendm{b,w} intrins and insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071514.4115672-1-haochen.jiang@intel.com/mbox/"},{"id":84617,"url":"https://patchwork.plctlab.org/api/1.2/patches/84617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071804.4192513-1-haochen.jiang@intel.com/","msgid":"<20230418071804.4192513-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:18:04","name":"i386: Add PCLMUL dependency for VPCLMULQDQ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071804.4192513-1-haochen.jiang@intel.com/mbox/"},{"id":84618,"url":"https://patchwork.plctlab.org/api/1.2/patches/84618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071851.4192579-1-haochen.jiang@intel.com/","msgid":"<20230418071851.4192579-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:18:51","name":"i386: Share AES xmm intrin with VAES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418071851.4192579-1-haochen.jiang@intel.com/mbox/"},{"id":84623,"url":"https://patchwork.plctlab.org/api/1.2/patches/84623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418072823.4192952-1-haochen.jiang@intel.com/","msgid":"<20230418072823.4192952-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-04-18T07:28:23","name":"i386: Share AES xmm intrin with VAES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418072823.4192952-1-haochen.jiang@intel.com/mbox/"},{"id":84631,"url":"https://patchwork.plctlab.org/api/1.2/patches/84631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418075441.24431-1-christophe.lyon@arm.com/","msgid":"<20230418075441.24431-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T07:54:41","name":"install.texi: Document --enable-decimal-float for AArch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418075441.24431-1-christophe.lyon@arm.com/mbox/"},{"id":84680,"url":"https://patchwork.plctlab.org/api/1.2/patches/84680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418084922.882434-1-chenglulu@loongson.cn/","msgid":"<20230418084922.882434-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-04-18T08:49:23","name":"[v3] gcc-13: Add changelog for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418084922.882434-1-chenglulu@loongson.cn/mbox/"},{"id":84683,"url":"https://patchwork.plctlab.org/api/1.2/patches/84683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5Z3iovGmuMQ3C9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T08:50:38","name":"match.pd: Improve fneg/fadd optimization [PR109240]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5Z3iovGmuMQ3C9@tucnak/mbox/"},{"id":84688,"url":"https://patchwork.plctlab.org/api/1.2/patches/84688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418085255.252125-1-aldyh@redhat.com/","msgid":"<20230418085255.252125-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T08:52:56","name":"Return true from operator== for two identical ranges containing NAN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418085255.252125-1-aldyh@redhat.com/mbox/"},{"id":84702,"url":"https://patchwork.plctlab.org/api/1.2/patches/84702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5dlaIu4zph3Opc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T09:06:29","name":"dse: Use SUBREG_REG for copy_to_mode_reg in DSE replace_read for WORD_REGISTER_OPERATIONS targets [PR109040]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5dlaIu4zph3Opc@tucnak/mbox/"},{"id":84703,"url":"https://patchwork.plctlab.org/api/1.2/patches/84703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-1-aldyh@redhat.com/","msgid":"<20230418090637.253140-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T09:06:36","name":"Add support for vrange streaming.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-1-aldyh@redhat.com/mbox/"},{"id":84704,"url":"https://patchwork.plctlab.org/api/1.2/patches/84704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-2-aldyh@redhat.com/","msgid":"<20230418090637.253140-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T09:06:38","name":"Add inchash support for vrange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090637.253140-2-aldyh@redhat.com/mbox/"},{"id":84706,"url":"https://patchwork.plctlab.org/api/1.2/patches/84706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090855.3012513-1-pan2.li@intel.com/","msgid":"<20230418090855.3012513-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-18T09:08:55","name":"[v2] RISC-V: Allow Vector IOR(V1, NOT V1) optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418090855.3012513-1-pan2.li@intel.com/mbox/"},{"id":84710,"url":"https://patchwork.plctlab.org/api/1.2/patches/84710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418092649.156-1-jinma@linux.alibaba.com/","msgid":"<20230418092649.156-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-18T09:26:49","name":"RISC-V: Adjust the parsing order of extensions to be consistent with riscv-spec and binutils.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418092649.156-1-jinma@linux.alibaba.com/mbox/"},{"id":84714,"url":"https://patchwork.plctlab.org/api/1.2/patches/84714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5lUUaEJFNLt2eY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-18T09:39:29","name":"rust: Disable --enable-languages=rust and silently exclude it from --enable-languages=all for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5lUUaEJFNLt2eY@tucnak/mbox/"},{"id":84716,"url":"https://patchwork.plctlab.org/api/1.2/patches/84716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418094048.177-1-jinma@linux.alibaba.com/","msgid":"<20230418094048.177-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-18T09:40:48","name":"Fixed typo.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418094048.177-1-jinma@linux.alibaba.com/mbox/"},{"id":84734,"url":"https://patchwork.plctlab.org/api/1.2/patches/84734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jbkjljy58.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:13:55","name":"constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8jbkjljy58.fsf@arm.com/mbox/"},{"id":84735,"url":"https://patchwork.plctlab.org/api/1.2/patches/84735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418101615.116219-1-kito.cheng@sifive.com/","msgid":"<20230418101615.116219-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-18T10:16:15","name":"Docs: Add doc for RISC-V vector intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418101615.116219-1-kito.cheng@sifive.com/mbox/"},{"id":84739,"url":"https://patchwork.plctlab.org/api/1.2/patches/84739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u0Z9FB39C6nmv@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:20:01","name":"[2/3] middle-end match.pd: simplify debug dump checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u0Z9FB39C6nmv@arm.com/mbox/"},{"id":84740,"url":"https://patchwork.plctlab.org/api/1.2/patches/84740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u7XMmQVeVJd82@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T10:20:29","name":"[3/3] middle-end RFC - match.pd: automatically partition *-match.cc files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD5u7XMmQVeVJd82@arm.com/mbox/"},{"id":84742,"url":"https://patchwork.plctlab.org/api/1.2/patches/84742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418103326.54716139CC@imap2.suse-dmz.suse.de/","msgid":"<20230418103326.54716139CC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T10:33:25","name":"tree-optimization/109539 - restrict PHI handling in access diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418103326.54716139CC@imap2.suse-dmz.suse.de/mbox/"},{"id":84761,"url":"https://patchwork.plctlab.org/api/1.2/patches/84761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d33bf196-1a6a-b95a-ec62-6521e69de2d5@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T11:24:29","name":"[committed] amdgcn: HardFP divide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d33bf196-1a6a-b95a-ec62-6521e69de2d5@codesourcery.com/mbox/"},{"id":84779,"url":"https://patchwork.plctlab.org/api/1.2/patches/84779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8ja5z5jtzm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T11:43:41","name":"[v3] constraint: fix relaxed memory and repeated constraint handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8ja5z5jtzm.fsf@arm.com/mbox/"},{"id":84805,"url":"https://patchwork.plctlab.org/api/1.2/patches/84805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120451.10146-1-juzhe.zhong@rivai.ai/","msgid":"<20230418120451.10146-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T12:04:51","name":"RISC-V: Add tuple types support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120451.10146-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84817,"url":"https://patchwork.plctlab.org/api/1.2/patches/84817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120957.11046-1-juzhe.zhong@rivai.ai/","msgid":"<20230418120957.11046-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T12:09:57","name":"RISC-V: Add tuple types support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418120957.11046-1-juzhe.zhong@rivai.ai/mbox/"},{"id":84825,"url":"https://patchwork.plctlab.org/api/1.2/patches/84825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418121753.50830-1-xry111@xry111.site/","msgid":"<20230418121753.50830-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-18T12:17:53","name":"LoongArch: Set 4 * (issue rate) as the default for -falign-functions and -falign-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418121753.50830-1-xry111@xry111.site/mbox/"},{"id":84828,"url":"https://patchwork.plctlab.org/api/1.2/patches/84828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com/","msgid":"<36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com>","list_archive_url":null,"date":"2023-04-18T12:22:18","name":"[V2,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com/mbox/"},{"id":84836,"url":"https://patchwork.plctlab.org/api/1.2/patches/84836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418125928.307445-1-aldyh@redhat.com/","msgid":"<20230418125928.307445-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T12:59:28","name":"Declare dconstm0 to go along with dconst0 and friends.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418125928.307445-1-aldyh@redhat.com/mbox/"},{"id":84844,"url":"https://patchwork.plctlab.org/api/1.2/patches/84844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418131250.310916-1-aldyh@redhat.com/","msgid":"<20230418131250.310916-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T13:12:50","name":"Implement range-op entry for sin/cos.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418131250.310916-1-aldyh@redhat.com/mbox/"},{"id":84848,"url":"https://patchwork.plctlab.org/api/1.2/patches/84848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418133942.1FAC113581@imap2.suse-dmz.suse.de/","msgid":"<20230418133942.1FAC113581@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T13:39:41","name":"RAII auto_mpfr and autp_mpz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418133942.1FAC113581@imap2.suse-dmz.suse.de/mbox/"},{"id":84850,"url":"https://patchwork.plctlab.org/api/1.2/patches/84850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-2-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:47","name":"[01/22] arm: move builtin function codes into general numberspace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-2-christophe.lyon@arm.com/mbox/"},{"id":84853,"url":"https://patchwork.plctlab.org/api/1.2/patches/84853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-3-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:48","name":"[02/22] arm: [MVE intrinsics] Add new framework","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-3-christophe.lyon@arm.com/mbox/"},{"id":84855,"url":"https://patchwork.plctlab.org/api/1.2/patches/84855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-4-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:49","name":"[03/22] arm: [MVE intrinsics] Rework vreinterpretq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-4-christophe.lyon@arm.com/mbox/"},{"id":84856,"url":"https://patchwork.plctlab.org/api/1.2/patches/84856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-5-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:50","name":"[04/22] arm: [MVE intrinsics] Rework vuninitialized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-5-christophe.lyon@arm.com/mbox/"},{"id":84857,"url":"https://patchwork.plctlab.org/api/1.2/patches/84857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-6-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:51","name":"[05/22] arm: [MVE intrinsics] add binary_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-6-christophe.lyon@arm.com/mbox/"},{"id":84866,"url":"https://patchwork.plctlab.org/api/1.2/patches/84866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-7-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:52","name":"[06/22] arm: [MVE intrinsics] add unspec_based_mve_function_exact_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-7-christophe.lyon@arm.com/mbox/"},{"id":84858,"url":"https://patchwork.plctlab.org/api/1.2/patches/84858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-8-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:53","name":"[07/22] arm: [MVE intrinsics] factorize vadd vsubq vmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-8-christophe.lyon@arm.com/mbox/"},{"id":84861,"url":"https://patchwork.plctlab.org/api/1.2/patches/84861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-9-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:54","name":"[08/22] arm: [MVE intrinsics] rework vaddq vmulq vsubq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-9-christophe.lyon@arm.com/mbox/"},{"id":84862,"url":"https://patchwork.plctlab.org/api/1.2/patches/84862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-10-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:55","name":"[09/22] arm: [MVE intrinsics] add binary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-10-christophe.lyon@arm.com/mbox/"},{"id":84860,"url":"https://patchwork.plctlab.org/api/1.2/patches/84860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-11-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:56","name":"[10/22] arm: [MVE intrinsics] factorize vandq veorq vorrq vbicq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-11-christophe.lyon@arm.com/mbox/"},{"id":84870,"url":"https://patchwork.plctlab.org/api/1.2/patches/84870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-12-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:57","name":"[11/22] arm: [MVE intrinsics] rework vandq veorq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-12-christophe.lyon@arm.com/mbox/"},{"id":84872,"url":"https://patchwork.plctlab.org/api/1.2/patches/84872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-13-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:58","name":"[12/22] arm: [MVE intrinsics] add binary_orrq shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-13-christophe.lyon@arm.com/mbox/"},{"id":84869,"url":"https://patchwork.plctlab.org/api/1.2/patches/84869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-14-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:45:59","name":"[13/22] arm: [MVE intrinsics] rework vorrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-14-christophe.lyon@arm.com/mbox/"},{"id":84852,"url":"https://patchwork.plctlab.org/api/1.2/patches/84852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-15-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:00","name":"[14/22] arm: [MVE intrinsics] add unspec_mve_function_exact_insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-15-christophe.lyon@arm.com/mbox/"},{"id":84859,"url":"https://patchwork.plctlab.org/api/1.2/patches/84859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-16-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:01","name":"[15/22] arm: [MVE intrinsics] add create shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-16-christophe.lyon@arm.com/mbox/"},{"id":84863,"url":"https://patchwork.plctlab.org/api/1.2/patches/84863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-17-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:02","name":"[16/22] arm: [MVE intrinsics] factorize vcreateq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-17-christophe.lyon@arm.com/mbox/"},{"id":84867,"url":"https://patchwork.plctlab.org/api/1.2/patches/84867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-18-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:03","name":"[17/22] arm: [MVE intrinsics] rework vcreateq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-18-christophe.lyon@arm.com/mbox/"},{"id":84877,"url":"https://patchwork.plctlab.org/api/1.2/patches/84877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-19-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:04","name":"[18/22] arm: [MVE intrinsics] factorize several binary_m operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-19-christophe.lyon@arm.com/mbox/"},{"id":84864,"url":"https://patchwork.plctlab.org/api/1.2/patches/84864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-20-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:05","name":"[19/22] arm: [MVE intrinsics] factorize several binary _n operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-20-christophe.lyon@arm.com/mbox/"},{"id":84865,"url":"https://patchwork.plctlab.org/api/1.2/patches/84865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-21-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:06","name":"[20/22] arm: [MVE intrinsics] factorize several binary _m_n operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-21-christophe.lyon@arm.com/mbox/"},{"id":84868,"url":"https://patchwork.plctlab.org/api/1.2/patches/84868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-22-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:07","name":"[21/22] arm: [MVE intrinsics] factorize several binary operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-22-christophe.lyon@arm.com/mbox/"},{"id":84875,"url":"https://patchwork.plctlab.org/api/1.2/patches/84875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-23-christophe.lyon@arm.com/","msgid":"<20230418134608.244751-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-04-18T13:46:08","name":"[22/22] arm: [MVE intrinsics] rework vhaddq vhsubq vmulhq vqaddq vqsubq vqdmulhq vrhaddq vrmulhq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418134608.244751-23-christophe.lyon@arm.com/mbox/"},{"id":84876,"url":"https://patchwork.plctlab.org/api/1.2/patches/84876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418135334.217FE13581@imap2.suse-dmz.suse.de/","msgid":"<20230418135334.217FE13581@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T13:53:33","name":"middle-end/108786 - add bitmap_clear_first_set_bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418135334.217FE13581@imap2.suse-dmz.suse.de/mbox/"},{"id":84890,"url":"https://patchwork.plctlab.org/api/1.2/patches/84890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418142858.2424851-1-patrick@rivosinc.com/","msgid":"<20230418142858.2424851-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T14:28:58","name":"[v5] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418142858.2424851-1-patrick@rivosinc.com/mbox/"},{"id":84892,"url":"https://patchwork.plctlab.org/api/1.2/patches/84892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418143635.980594-1-vineetg@rivosinc.com/","msgid":"<20230418143635.980594-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T14:36:35","name":"riscv: relax splitter restrictions for creating pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418143635.980594-1-vineetg@rivosinc.com/mbox/"},{"id":84894,"url":"https://patchwork.plctlab.org/api/1.2/patches/84894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418144401.70F8D139CC@imap2.suse-dmz.suse.de/","msgid":"<20230418144401.70F8D139CC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-18T14:44:01","name":"Shrink points-to analysis dumps when not dumping with -details","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418144401.70F8D139CC@imap2.suse-dmz.suse.de/mbox/"},{"id":84912,"url":"https://patchwork.plctlab.org/api/1.2/patches/84912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418150701.982572-1-vineetg@rivosinc.com/","msgid":"<20230418150701.982572-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T15:07:01","name":"[v2] riscv: relax splitter restrictions for creating pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418150701.982572-1-vineetg@rivosinc.com/mbox/"},{"id":84946,"url":"https://patchwork.plctlab.org/api/1.2/patches/84946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418155914.545421-1-jwakely@redhat.com/","msgid":"<20230418155914.545421-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-18T15:59:14","name":"[committed] libstdc++: Export global iostreams with GLIBCXX_3.4.31 symver [PR108969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418155914.545421-1-jwakely@redhat.com/mbox/"},{"id":84953,"url":"https://patchwork.plctlab.org/api/1.2/patches/84953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418162457.338626-1-aldyh@redhat.com/","msgid":"<20230418162457.338626-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T16:24:57","name":"[COMMITTED] Add GTY support for vrange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418162457.338626-1-aldyh@redhat.com/mbox/"},{"id":84954,"url":"https://patchwork.plctlab.org/api/1.2/patches/84954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17151-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T16:30:33","name":"RFC: New compact syntax for insn and insn_split in Machine Descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17151-tamar@arm.com/mbox/"},{"id":84955,"url":"https://patchwork.plctlab.org/api/1.2/patches/84955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418163913.2429812-1-patrick@rivosinc.com/","msgid":"<20230418163913.2429812-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T16:39:13","name":"[v6] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418163913.2429812-1-patrick@rivosinc.com/mbox/"},{"id":84956,"url":"https://patchwork.plctlab.org/api/1.2/patches/84956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418164007.341221-1-aldyh@redhat.com/","msgid":"<20230418164007.341221-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-18T16:40:07","name":"Fix pointer sharing in Value_Range constructor.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418164007.341221-1-aldyh@redhat.com/mbox/"},{"id":84976,"url":"https://patchwork.plctlab.org/api/1.2/patches/84976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahvuDwL58Vqj2zVwzyio_yZMA8hKqMZoomfTDNuT0q8Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-18T17:01:16","name":"i386: Improve permutations with INSERTPS instruction [PR94908]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ahvuDwL58Vqj2zVwzyio_yZMA8hKqMZoomfTDNuT0q8Q@mail.gmail.com/mbox/"},{"id":85012,"url":"https://patchwork.plctlab.org/api/1.2/patches/85012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418175507.2C40B2040B@pchp3.se.axis.com/","msgid":"<20230418175507.2C40B2040B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-18T17:55:07","name":"doc: Document order of define_peephole2 scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418175507.2C40B2040B@pchp3.se.axis.com/mbox/"},{"id":85015,"url":"https://patchwork.plctlab.org/api/1.2/patches/85015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418181745.987867-1-vineetg@rivosinc.com/","msgid":"<20230418181745.987867-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T18:17:45","name":"expansion: make layout of x_shift*cost[][][] more efficient","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418181745.987867-1-vineetg@rivosinc.com/mbox/"},{"id":85054,"url":"https://patchwork.plctlab.org/api/1.2/patches/85054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418192136.286589-1-apinski@marvell.com/","msgid":"<20230418192136.286589-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-18T19:21:36","name":"PHIOPT: Move tree_ssa_cs_elim into pass_cselim::execute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418192136.286589-1-apinski@marvell.com/mbox/"},{"id":85061,"url":"https://patchwork.plctlab.org/api/1.2/patches/85061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc2a82bc-fc4e-44f2-bb38-38597e878fd9-1681846782121@3c-app-gmx-bs56/","msgid":"","list_archive_url":null,"date":"2023-04-18T19:39:42","name":"testsuite: fix scan-tree-dump patterns [PR83904,PR100297]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-dc2a82bc-fc4e-44f2-bb38-38597e878fd9-1681846782121@3c-app-gmx-bs56/mbox/"},{"id":85067,"url":"https://patchwork.plctlab.org/api/1.2/patches/85067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418204809.993242-1-vineetg@rivosinc.com/","msgid":"<20230418204809.993242-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T20:48:09","name":"[v2] expansion: make layout of x_shift*cost[][][] more efficient","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418204809.993242-1-vineetg@rivosinc.com/mbox/"},{"id":85082,"url":"https://patchwork.plctlab.org/api/1.2/patches/85082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com/","msgid":"<4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com>","list_archive_url":null,"date":"2023-04-18T21:41:12","name":"aarch64: Add the scheduling model for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4F18DDA2-F71C-45FB-A927-7B5D2CA586B4@icloud.com/mbox/"},{"id":85081,"url":"https://patchwork.plctlab.org/api/1.2/patches/85081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418214124.2446642-1-patrick@rivosinc.com/","msgid":"<20230418214124.2446642-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-18T21:41:24","name":"[v7] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418214124.2446642-1-patrick@rivosinc.com/mbox/"},{"id":85083,"url":"https://patchwork.plctlab.org/api/1.2/patches/85083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com/","msgid":"<6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com>","list_archive_url":null,"date":"2023-04-18T21:41:47","name":"aarch64: Add the cost model for Neoverse N1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6A93A02F-3719-4751-9055-C774F8FC1D78@icloud.com/mbox/"},{"id":85110,"url":"https://patchwork.plctlab.org/api/1.2/patches/85110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418231500.585632-1-jwakely@redhat.com/","msgid":"<20230418231500.585632-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-18T23:15:00","name":"[committed] libstdc++: Adjust uses of null pointer constants in docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418231500.585632-1-jwakely@redhat.com/mbox/"},{"id":85111,"url":"https://patchwork.plctlab.org/api/1.2/patches/85111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418232515.95891-1-juzhe.zhong@rivai.ai/","msgid":"<20230418232515.95891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-18T23:25:15","name":"RISC-V: Fix bug reported by PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418232515.95891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85112,"url":"https://patchwork.plctlab.org/api/1.2/patches/85112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418233253.293204-1-apinski@marvell.com/","msgid":"<20230418233253.293204-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-18T23:32:53","name":"i386: Add new pattern for zero-extend cmov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230418233253.293204-1-apinski@marvell.com/mbox/"},{"id":85132,"url":"https://patchwork.plctlab.org/api/1.2/patches/85132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020301.1864306-1-zewei.mo@intel.com/","msgid":"<20230419020301.1864306-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-04-19T02:03:01","name":"Re-arrange sections of i386 cpuid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020301.1864306-1-zewei.mo@intel.com/mbox/"},{"id":85131,"url":"https://patchwork.plctlab.org/api/1.2/patches/85131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020336.722450-1-guojiufu@linux.ibm.com/","msgid":"<20230419020336.722450-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T02:03:36","name":"PR testsuite/106879 FAIL: gcc.dg/vect/bb-slp-layout-19.c on powerpc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419020336.722450-1-guojiufu@linux.ibm.com/mbox/"},{"id":85141,"url":"https://patchwork.plctlab.org/api/1.2/patches/85141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419025214.149675-1-xionghuluo@tencent.com/","msgid":"<20230419025214.149675-1-xionghuluo@tencent.com>","list_archive_url":null,"date":"2023-04-19T02:52:14","name":"[v5] gcov: Fix \"do-while\" structure in case statement leads to incorrect code coverage [PR93680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419025214.149675-1-xionghuluo@tencent.com/mbox/"},{"id":85153,"url":"https://patchwork.plctlab.org/api/1.2/patches/85153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419031527.6D39120420@pchp3.se.axis.com/","msgid":"<20230419031527.6D39120420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-19T03:15:27","name":"[v2] doc: Document order of define_peephole2 scanning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419031527.6D39120420@pchp3.se.axis.com/mbox/"},{"id":85155,"url":"https://patchwork.plctlab.org/api/1.2/patches/85155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419032117.930737-1-pan2.li@intel.com/","msgid":"<20230419032117.930737-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T03:21:17","name":"RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419032117.930737-1-pan2.li@intel.com/mbox/"},{"id":85225,"url":"https://patchwork.plctlab.org/api/1.2/patches/85225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419070628.1011624-1-lipeng.zhu@intel.com/","msgid":"<20230419070628.1011624-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-04-19T07:06:28","name":"[v3] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419070628.1011624-1-lipeng.zhu@intel.com/mbox/"},{"id":85227,"url":"https://patchwork.plctlab.org/api/1.2/patches/85227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071551.3478647-1-hongtao.liu@intel.com/","msgid":"<20230419071551.3478647-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-19T07:15:51","name":"[i386] Support type _Float16/__bf16 independent of SSE2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071551.3478647-1-hongtao.liu@intel.com/mbox/"},{"id":85228,"url":"https://patchwork.plctlab.org/api/1.2/patches/85228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071900.61BB83856949@sourceware.org/","msgid":"<20230419071900.61BB83856949@sourceware.org>","list_archive_url":null,"date":"2023-04-19T07:18:14","name":"rtl-optimization/109237 - speedup bb_is_just_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419071900.61BB83856949@sourceware.org/mbox/"},{"id":85247,"url":"https://patchwork.plctlab.org/api/1.2/patches/85247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+iyFBUsQQOaSxT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T08:14:00","name":"[committed] testsuite: Fix up pr109524.C for -std=c++23 [PR109524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+iyFBUsQQOaSxT@tucnak/mbox/"},{"id":85249,"url":"https://patchwork.plctlab.org/api/1.2/patches/85249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419082342.21705-1-fanpeng@loongson.cn/","msgid":"<20230419082342.21705-1-fanpeng@loongson.cn>","list_archive_url":null,"date":"2023-04-19T08:23:42","name":"LoongArch: fix MUSL_DYNAMIC_LINKER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419082342.21705-1-fanpeng@loongson.cn/mbox/"},{"id":85261,"url":"https://patchwork.plctlab.org/api/1.2/patches/85261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+rh/xdkZfD7Zwe@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T08:51:19","name":"tree-vect-patterns: Improve __builtin_{clz,ctz,ffs}ll vectorization [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+rh/xdkZfD7Zwe@tucnak/mbox/"},{"id":85266,"url":"https://patchwork.plctlab.org/api/1.2/patches/85266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+uPQ0SZiYDfScT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-19T09:02:53","name":"c: Avoid -Wenum-int-mismatch warning for redeclaration of builtin acc_on_device [PR107041]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZD+uPQ0SZiYDfScT@tucnak/mbox/"},{"id":85270,"url":"https://patchwork.plctlab.org/api/1.2/patches/85270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419091820.3729443-1-pan2.li@intel.com/","msgid":"<20230419091820.3729443-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T09:18:20","name":"[v3] RISC-V: Align IOR optimization MODE_CLASS condition to AND.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419091820.3729443-1-pan2.li@intel.com/mbox/"},{"id":85277,"url":"https://patchwork.plctlab.org/api/1.2/patches/85277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419093722.F218A385771D@sourceware.org/","msgid":"<20230419093722.F218A385771D@sourceware.org>","list_archive_url":null,"date":"2023-04-19T09:36:35","name":"Transform more gmp/mpfr uses to use RAII","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419093722.F218A385771D@sourceware.org/mbox/"},{"id":85284,"url":"https://patchwork.plctlab.org/api/1.2/patches/85284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419094812.98F5A3858CDA@sourceware.org/","msgid":"<20230419094812.98F5A3858CDA@sourceware.org>","list_archive_url":null,"date":"2023-04-19T09:47:24","name":"Simplify gimple_assign_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419094812.98F5A3858CDA@sourceware.org/mbox/"},{"id":85291,"url":"https://patchwork.plctlab.org/api/1.2/patches/85291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419095751.815-1-jinma@linux.alibaba.com/","msgid":"<20230419095751.815-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-04-19T09:57:51","name":"[v8] RISC-V: Add the '\''zfa'\'' extension, version 0.2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419095751.815-1-jinma@linux.alibaba.com/mbox/"},{"id":85309,"url":"https://patchwork.plctlab.org/api/1.2/patches/85309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419103332.DBBC73858C50@sourceware.org/","msgid":"<20230419103332.DBBC73858C50@sourceware.org>","list_archive_url":null,"date":"2023-04-19T10:32:48","name":"Avoid repeated forwarder_block_p calls in CFG cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419103332.DBBC73858C50@sourceware.org/mbox/"},{"id":85312,"url":"https://patchwork.plctlab.org/api/1.2/patches/85312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104054.935874-1-juzhe.zhong@rivai.ai/","msgid":"<20230419104054.935874-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T10:40:54","name":"RISC-V: Fix bug of PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104054.935874-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85313,"url":"https://patchwork.plctlab.org/api/1.2/patches/85313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104151.936002-1-juzhe.zhong@rivai.ai/","msgid":"<20230419104151.936002-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T10:41:51","name":"RISC-V: Fix bug of PR109535","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419104151.936002-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85343,"url":"https://patchwork.plctlab.org/api/1.2/patches/85343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419112307.3805682-1-pan2.li@intel.com/","msgid":"<20230419112307.3805682-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-19T11:23:07","name":"[v2] RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419112307.3805682-1-pan2.li@intel.com/mbox/"},{"id":85360,"url":"https://patchwork.plctlab.org/api/1.2/patches/85360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121424.87B213856DF6@sourceware.org/","msgid":"<20230419121424.87B213856DF6@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:13:38","name":"Remove odd code from gimple_can_merge_blocks_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121424.87B213856DF6@sourceware.org/mbox/"},{"id":85361,"url":"https://patchwork.plctlab.org/api/1.2/patches/85361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121438.656C83857019@sourceware.org/","msgid":"<20230419121438.656C83857019@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:13:52","name":"[1/4] Avoid non-unified nodes on the topological sorting for PTA solving","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121438.656C83857019@sourceware.org/mbox/"},{"id":85362,"url":"https://patchwork.plctlab.org/api/1.2/patches/85362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121453.C3DBE3853800@sourceware.org/","msgid":"<20230419121453.C3DBE3853800@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:08","name":"[2/4] Remove senseless store in do_sd_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121453.C3DBE3853800@sourceware.org/mbox/"},{"id":85363,"url":"https://patchwork.plctlab.org/api/1.2/patches/85363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121522.78B90385696B@sourceware.org/","msgid":"<20230419121522.78B90385696B@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:24","name":"[3/4] Fix do_sd_constraint escape special casing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121522.78B90385696B@sourceware.org/mbox/"},{"id":85364,"url":"https://patchwork.plctlab.org/api/1.2/patches/85364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121619.C45363857038@sourceware.org/","msgid":"<20230419121619.C45363857038@sourceware.org>","list_archive_url":null,"date":"2023-04-19T12:14:37","name":"[4/4] Remove special-cased edges when solving copies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419121619.C45363857038@sourceware.org/mbox/"},{"id":85381,"url":"https://patchwork.plctlab.org/api/1.2/patches/85381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123111.211055-1-juzhe.zhong@rivai.ai/","msgid":"<20230419123111.211055-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T12:31:11","name":"[04/10] RISC-V: Support chunk 128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123111.211055-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85382,"url":"https://patchwork.plctlab.org/api/1.2/patches/85382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123346.211804-1-juzhe.zhong@rivai.ai/","msgid":"<20230419123346.211804-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T12:33:46","name":"RISC-V: Support 128 bit vector chunk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419123346.211804-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85397,"url":"https://patchwork.plctlab.org/api/1.2/patches/85397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419130028.267252-1-juzhe.zhong@rivai.ai/","msgid":"<20230419130028.267252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T13:00:28","name":"RISC-V: Add tuple type vget/vset intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419130028.267252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":85412,"url":"https://patchwork.plctlab.org/api/1.2/patches/85412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134332.E80E5385772D@sourceware.org/","msgid":"<20230419134332.E80E5385772D@sourceware.org>","list_archive_url":null,"date":"2023-04-19T13:42:49","name":"[1/2] Split out solve_add_graph_edge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134332.E80E5385772D@sourceware.org/mbox/"},{"id":85413,"url":"https://patchwork.plctlab.org/api/1.2/patches/85413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134352.315BD3857022@sourceware.org/","msgid":"<20230419134352.315BD3857022@sourceware.org>","list_archive_url":null,"date":"2023-04-19T13:43:08","name":"[2/2] Use solve_add_graph_edge in more places","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419134352.315BD3857022@sourceware.org/mbox/"},{"id":85415,"url":"https://patchwork.plctlab.org/api/1.2/patches/85415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com/","msgid":"<4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com>","list_archive_url":null,"date":"2023-04-19T13:51:52","name":"Docs, OpenMP: Small fixes to internal OMP_FOR doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b1f91dc-dd02-4c05-b457-1a9005e85d16@siemens.com/mbox/"},{"id":85417,"url":"https://patchwork.plctlab.org/api/1.2/patches/85417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419135351.98376-1-kito.cheng@sifive.com/","msgid":"<20230419135351.98376-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-19T13:53:51","name":"[wwwdocs] gcc-13: Add release note for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419135351.98376-1-kito.cheng@sifive.com/mbox/"},{"id":85446,"url":"https://patchwork.plctlab.org/api/1.2/patches/85446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZwreLpQ877V2em5RbM4tQ2sJLdXt5gP0NE3-Dvio7qCg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T15:06:34","name":"i386: Emit compares between high registers and memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZwreLpQ877V2em5RbM4tQ2sJLdXt5gP0NE3-Dvio7qCg@mail.gmail.com/mbox/"},{"id":85459,"url":"https://patchwork.plctlab.org/api/1.2/patches/85459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419152009.494469-1-jason@redhat.com/","msgid":"<20230419152009.494469-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-19T15:20:09","name":"[13,RFA] c++: fix '\''unsigned __int128_t'\'' semantics [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419152009.494469-1-jason@redhat.com/mbox/"},{"id":85483,"url":"https://patchwork.plctlab.org/api/1.2/patches/85483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419154515.1300814-1-ppalka@redhat.com/","msgid":"<20230419154515.1300814-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-19T15:45:15","name":"c++: bad ggc_free in try_class_unification [PR109556]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419154515.1300814-1-ppalka@redhat.com/mbox/"},{"id":85487,"url":"https://patchwork.plctlab.org/api/1.2/patches/85487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419155448.EAC3420438@pchp3.se.axis.com/","msgid":"<20230419155448.EAC3420438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-19T15:54:48","name":"recog.cc: Correct comments referring to parameter match_len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419155448.EAC3420438@pchp3.se.axis.com/mbox/"},{"id":85490,"url":"https://patchwork.plctlab.org/api/1.2/patches/85490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j8renkg3z.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T16:10:24","name":"[v2] Leveraging the use of STP instruction for vec_duplicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j8renkg3z.fsf@arm.com/mbox/"},{"id":85496,"url":"https://patchwork.plctlab.org/api/1.2/patches/85496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-2-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:14","name":"[1/3] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85494,"url":"https://patchwork.plctlab.org/api/1.2/patches/85494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-3-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:15","name":"[2/3] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85498,"url":"https://patchwork.plctlab.org/api/1.2/patches/85498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-4-juzhe.zhong@rivai.ai/","msgid":"<20230419163616.1030090-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:16","name":"[3/3] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163616.1030090-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85495,"url":"https://patchwork.plctlab.org/api/1.2/patches/85495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-2-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:32","name":"[1/3] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85497,"url":"https://patchwork.plctlab.org/api/1.2/patches/85497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-3-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:33","name":"[2/3] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85499,"url":"https://patchwork.plctlab.org/api/1.2/patches/85499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-4-juzhe.zhong@rivai.ai/","msgid":"<20230419163634.1030144-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:36:34","name":"[3/3] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419163634.1030144-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85500,"url":"https://patchwork.plctlab.org/api/1.2/patches/85500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at/","msgid":"<0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at>","list_archive_url":null,"date":"2023-04-19T16:39:46","name":"[C,-,backport,12] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e53db562bf15313f7eb8fe31d2c1ed2156b76b0.camel@tugraz.at/mbox/"},{"id":85503,"url":"https://patchwork.plctlab.org/api/1.2/patches/85503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-2-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:12","name":"[1/3,V2] RISC-V: Add auto-vectorization compile option for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-2-juzhe.zhong@rivai.ai/mbox/"},{"id":85502,"url":"https://patchwork.plctlab.org/api/1.2/patches/85502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-3-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:13","name":"[2/3,V2] RISC-V: Enable basic auto-vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-3-juzhe.zhong@rivai.ai/mbox/"},{"id":85505,"url":"https://patchwork.plctlab.org/api/1.2/patches/85505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-4-juzhe.zhong@rivai.ai/","msgid":"<20230419164214.1032017-4-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-19T16:42:14","name":"[3/3,V2] RISC-V: Add sanity testcases for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419164214.1032017-4-juzhe.zhong@rivai.ai/mbox/"},{"id":85518,"url":"https://patchwork.plctlab.org/api/1.2/patches/85518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com/","msgid":"<236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T17:53:07","name":"[v3,1/4] ree: Default ree pass for O2 and above for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/236aab6b-537f-7fb6-125c-220fb63f7521@linux.ibm.com/mbox/"},{"id":85519,"url":"https://patchwork.plctlab.org/api/1.2/patches/85519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3ec893d-683d-7a39-34b6-7d059df2da7c@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T17:56:34","name":"[v3,2/4] ree : Code movement to avoid adding prototype to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3ec893d-683d-7a39-34b6-7d059df2da7c@linux.ibm.com/mbox/"},{"id":85520,"url":"https://patchwork.plctlab.org/api/1.2/patches/85520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com/","msgid":"<12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com>","list_archive_url":null,"date":"2023-04-19T18:00:30","name":"[v3,3/4] ree: Main functionality to Improve ree pass for rs6000 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12889922-0160-a036-7dbf-1d208e353f82@linux.ibm.com/mbox/"},{"id":85521,"url":"https://patchwork.plctlab.org/api/1.2/patches/85521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d80335eb-9436-fe77-dca4-fbb02d3d688d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-19T18:03:32","name":"[v3,4/4] ree: Using ABI interfaces to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d80335eb-9436-fe77-dca4-fbb02d3d688d@linux.ibm.com/mbox/"},{"id":85539,"url":"https://patchwork.plctlab.org/api/1.2/patches/85539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-1-jcmvbkbc@gmail.com/","msgid":"<20230419194636.4006880-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-04-19T19:46:35","name":"[COMMITTED,1/2] gcc: xtensa: add data alignment properties to dynconfig","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-1-jcmvbkbc@gmail.com/mbox/"},{"id":85540,"url":"https://patchwork.plctlab.org/api/1.2/patches/85540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-2-jcmvbkbc@gmail.com/","msgid":"<20230419194636.4006880-2-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-04-19T19:46:36","name":"[COMMITTED,2/2] gcc: xtensa: add -m[no-]strict-align option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419194636.4006880-2-jcmvbkbc@gmail.com/mbox/"},{"id":85570,"url":"https://patchwork.plctlab.org/api/1.2/patches/85570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419213635.329198-1-apinski@marvell.com/","msgid":"<20230419213635.329198-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-19T21:36:35","name":"PHIOPT: Improve minmax diamond detection for phiopt1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230419213635.329198-1-apinski@marvell.com/mbox/"},{"id":85668,"url":"https://patchwork.plctlab.org/api/1.2/patches/85668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-1-hongtao.liu@intel.com/","msgid":"<20230420004615.2434390-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T00:46:14","name":"[1/2] Use NO_REGS in cost calculation when the preferred register class are not known yet.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-1-hongtao.liu@intel.com/mbox/"},{"id":85669,"url":"https://patchwork.plctlab.org/api/1.2/patches/85669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-2-hongtao.liu@intel.com/","msgid":"<20230420004615.2434390-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T00:46:15","name":"[2/2] Adjust testcases after better RA decision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420004615.2434390-2-hongtao.liu@intel.com/mbox/"},{"id":85673,"url":"https://patchwork.plctlab.org/api/1.2/patches/85673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420010535.336618-1-apinski@marvell.com/","msgid":"<20230420010535.336618-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-20T01:05:35","name":"PHIOPT: Improve readability of tree_ssa_phiopt_worker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420010535.336618-1-apinski@marvell.com/mbox/"},{"id":85704,"url":"https://patchwork.plctlab.org/api/1.2/patches/85704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420035821.4113007-1-hongtao.liu@intel.com/","msgid":"<20230420035821.4113007-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-20T03:58:21","name":"Canonicalize vec_merge when mask is constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420035821.4113007-1-hongtao.liu@intel.com/mbox/"},{"id":85707,"url":"https://patchwork.plctlab.org/api/1.2/patches/85707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com/","msgid":"<3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com>","list_archive_url":null,"date":"2023-04-20T04:34:34","name":"[RFA,PR,target/108248,RISC-V] Break down some bitmanip insn types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ee750e7-d3f5-12cc-4885-bbe2f6290861@ventanamicro.com/mbox/"},{"id":85731,"url":"https://patchwork.plctlab.org/api/1.2/patches/85731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com/","msgid":"<7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com>","list_archive_url":null,"date":"2023-04-20T06:04:39","name":"[2/1,rs6000] make ppc_cpu_supports_hw as effective target keyword [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7eaa2f21-b126-a2a5-97fe-a30eafb72bde@linux.ibm.com/mbox/"},{"id":85732,"url":"https://patchwork.plctlab.org/api/1.2/patches/85732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcbe0ab5-9649-9005-8739-f1bfec216a18@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T06:04:44","name":"[2/2,rs6000] xfail float128 comparison test case that fails on powerpc64 [PR108728]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcbe0ab5-9649-9005-8739-f1bfec216a18@linux.ibm.com/mbox/"},{"id":85752,"url":"https://patchwork.plctlab.org/api/1.2/patches/85752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEDqbPYI10NaVp6R@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-20T07:31:56","name":"tree-vect-patterns: Pattern recognize ctz or ffs using clz, popcount or ctz [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEDqbPYI10NaVp6R@tucnak/mbox/"},{"id":85806,"url":"https://patchwork.plctlab.org/api/1.2/patches/85806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420092356.CB21A3856965@sourceware.org/","msgid":"<20230420092356.CB21A3856965@sourceware.org>","list_archive_url":null,"date":"2023-04-20T09:23:12","name":"Remove duplicate DFS walks from DF init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420092356.CB21A3856965@sourceware.org/mbox/"},{"id":85828,"url":"https://patchwork.plctlab.org/api/1.2/patches/85828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420102056.43142-1-kito.cheng@sifive.com/","msgid":"<20230420102056.43142-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T10:20:56","name":"[committed,v2] gcc-13: Add release note for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420102056.43142-1-kito.cheng@sifive.com/mbox/"},{"id":85882,"url":"https://patchwork.plctlab.org/api/1.2/patches/85882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420120351.918CE3857716@sourceware.org/","msgid":"<20230420120351.918CE3857716@sourceware.org>","list_archive_url":null,"date":"2023-04-20T12:03:05","name":"tree-optimization/109564 - avoid equivalences from PHIs in most cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420120351.918CE3857716@sourceware.org/mbox/"},{"id":85883,"url":"https://patchwork.plctlab.org/api/1.2/patches/85883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46815819-9b18-1052-c022-0a924901f906@codesourcery.com/","msgid":"<46815819-9b18-1052-c022-0a924901f906@codesourcery.com>","list_archive_url":null,"date":"2023-04-20T12:07:29","name":"[committed] amdgcn: update target-supports.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46815819-9b18-1052-c022-0a924901f906@codesourcery.com/mbox/"},{"id":85884,"url":"https://patchwork.plctlab.org/api/1.2/patches/85884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e76f66b1-a161-4bd8-c9e3-be1576dd1b9a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T12:11:36","name":"[committed] amdgcn: bug fix ldexp insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e76f66b1-a161-4bd8-c9e3-be1576dd1b9a@codesourcery.com/mbox/"},{"id":85909,"url":"https://patchwork.plctlab.org/api/1.2/patches/85909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132416.12502-1-kito.cheng@sifive.com/","msgid":"<20230420132416.12502-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T13:24:16","name":"[committed] RISC-V: Fix simplify_ior_optimization.c on rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132416.12502-1-kito.cheng@sifive.com/mbox/"},{"id":85910,"url":"https://patchwork.plctlab.org/api/1.2/patches/85910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132439.12555-1-kito.cheng@sifive.com/","msgid":"<20230420132439.12555-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-20T13:24:39","name":"[committed] RISC-V: Fix riscv/arch-19.c with different ISA spec version","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420132439.12555-1-kito.cheng@sifive.com/mbox/"},{"id":85911,"url":"https://patchwork.plctlab.org/api/1.2/patches/85911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5a95ca2-d7e8-280d-1351-c9dfb5b26de3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T13:29:49","name":"[committed,OG10] amdgcn, openmp: Fix concurrency in low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5a95ca2-d7e8-280d-1351-c9dfb5b26de3@codesourcery.com/mbox/"},{"id":85916,"url":"https://patchwork.plctlab.org/api/1.2/patches/85916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-1-ppalka@redhat.com/","msgid":"<20230420135633.2447631-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T13:56:32","name":"[1/2] c++: make strip_typedefs generalize strip_typedefs_expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-1-ppalka@redhat.com/mbox/"},{"id":85917,"url":"https://patchwork.plctlab.org/api/1.2/patches/85917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-2-ppalka@redhat.com/","msgid":"<20230420135633.2447631-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T13:56:33","name":"[2/2] c++: use TREE_VEC for trailing args of variadic built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420135633.2447631-2-ppalka@redhat.com/mbox/"},{"id":85919,"url":"https://patchwork.plctlab.org/api/1.2/patches/85919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/D0E9924D-C7C4-4C43-B586-324B3378028B@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T14:10:24","name":"Ping * 3: [V6][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/D0E9924D-C7C4-4C43-B586-324B3378028B@oracle.com/mbox/"},{"id":85920,"url":"https://patchwork.plctlab.org/api/1.2/patches/85920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com/","msgid":"<3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com>","list_archive_url":null,"date":"2023-04-20T14:11:55","name":"Ping * 3: [V6][PATCH 2/2] Update documentation to clarify a GCC extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3BBCBC35-57DF-4F12-8821-AAE659A444A4@oracle.com/mbox/"},{"id":85932,"url":"https://patchwork.plctlab.org/api/1.2/patches/85932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZQOn9KYrtz3JON-veJ+C+7oKttKMfzm_FEU7U5StSyUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T14:54:10","name":"i386: Handle sign-extract for QImode operations with high registers [PR78952]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZQOn9KYrtz3JON-veJ+C+7oKttKMfzm_FEU7U5StSyUA@mail.gmail.com/mbox/"},{"id":85933,"url":"https://patchwork.plctlab.org/api/1.2/patches/85933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bDD-apcZ6JgAjAk5+h+twRFFMpmiYnRK9G9AKzdseNQw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T15:03:48","name":"arch: Use VIRTUAL_REGISTER_P predicate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bDD-apcZ6JgAjAk5+h+twRFFMpmiYnRK9G9AKzdseNQw@mail.gmail.com/mbox/"},{"id":85934,"url":"https://patchwork.plctlab.org/api/1.2/patches/85934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db985c56-371f-4d26-a1a5-26b25c5e68cf@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T15:07:10","name":"[pushed,LRA] : Exclude some hard regs for multi-reg inout reload pseudos used in asm in different mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db985c56-371f-4d26-a1a5-26b25c5e68cf@redhat.com/mbox/"},{"id":85939,"url":"https://patchwork.plctlab.org/api/1.2/patches/85939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420153437.2910374-1-ppalka@redhat.com/","msgid":"<20230420153437.2910374-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-20T15:34:37","name":"c++: improve template parameter level lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420153437.2910374-1-ppalka@redhat.com/mbox/"},{"id":85965,"url":"https://patchwork.plctlab.org/api/1.2/patches/85965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420165523.281157-1-vineetg@rivosinc.com/","msgid":"<20230420165523.281157-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-04-20T16:55:23","name":"MAINTAINERS: add Vineet Gupta to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420165523.281157-1-vineetg@rivosinc.com/mbox/"},{"id":85977,"url":"https://patchwork.plctlab.org/api/1.2/patches/85977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420171855.31294-1-alx@kernel.org/","msgid":"<20230420171855.31294-1-alx@kernel.org>","list_archive_url":null,"date":"2023-04-20T17:18:55","name":"doc: tfix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230420171855.31294-1-alx@kernel.org/mbox/"},{"id":85979,"url":"https://patchwork.plctlab.org/api/1.2/patches/85979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com/","msgid":"<1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com>","list_archive_url":null,"date":"2023-04-20T17:22:11","name":"PR tee-optimization/109564 - Do not ignore UNDEFINED ranges when determining PHI equivalences.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c7831e6-2591-5bdf-cb02-4f851a7fe02f@redhat.com/mbox/"},{"id":85984,"url":"https://patchwork.plctlab.org/api/1.2/patches/85984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEF4qvhBzBOEQxX1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-20T17:38:50","name":"tree-vect-patterns: One small vect_recog_ctz_ffs_pattern tweak [PR109011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEF4qvhBzBOEQxX1@tucnak/mbox/"},{"id":86020,"url":"https://patchwork.plctlab.org/api/1.2/patches/86020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-28f2e76d-4032-4ca5-8666-7faf6caf6c05-1682020919629@3c-app-gmx-bs34/","msgid":"","list_archive_url":null,"date":"2023-04-20T20:01:59","name":"Fortran: function results never have the ALLOCATABLE attribute [PR109500]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-28f2e76d-4032-4ca5-8666-7faf6caf6c05-1682020919629@3c-app-gmx-bs34/mbox/"},{"id":86021,"url":"https://patchwork.plctlab.org/api/1.2/patches/86021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfD3TVgU3utyPeMvG=7KVy8tNJsUf1h_wLAcy4R919_A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-20T20:11:42","name":"RISC-V: avoid splitting small constants in bcrli_nottwobits patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfD3TVgU3utyPeMvG=7KVy8tNJsUf1h_wLAcy4R919_A@mail.gmail.com/mbox/"},{"id":86151,"url":"https://patchwork.plctlab.org/api/1.2/patches/86151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064712.60139-1-kito.cheng@sifive.com/","msgid":"<20230421064712.60139-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-21T06:47:12","name":"[committed,v2] RISC-V: Handle multi-lib path correclty for linux [DRAFT]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064712.60139-1-kito.cheng@sifive.com/mbox/"},{"id":86153,"url":"https://patchwork.plctlab.org/api/1.2/patches/86153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064937.106679-1-kito.cheng@sifive.com/","msgid":"<20230421064937.106679-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-21T06:49:37","name":"[committed,v2] RISC-V: Add local user vsetvl instruction elimination [PR109547]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421064937.106679-1-kito.cheng@sifive.com/mbox/"},{"id":86155,"url":"https://patchwork.plctlab.org/api/1.2/patches/86155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421070011.166258-1-juzhe.zhong@rivai.ai/","msgid":"<20230421070011.166258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T07:00:11","name":"RISC-V: Support segment intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421070011.166258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86162,"url":"https://patchwork.plctlab.org/api/1.2/patches/86162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421074828.C8C631390E@imap2.suse-dmz.suse.de/","msgid":"<20230421074828.C8C631390E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T07:48:28","name":"Fix LCM dataflow CFG order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421074828.C8C631390E@imap2.suse-dmz.suse.de/mbox/"},{"id":86164,"url":"https://patchwork.plctlab.org/api/1.2/patches/86164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421075851.38441-1-juzhe.zhong@rivai.ai/","msgid":"<20230421075851.38441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T07:58:51","name":"RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421075851.38441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86165,"url":"https://patchwork.plctlab.org/api/1.2/patches/86165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421080205.47633-1-juzhe.zhong@rivai.ai/","msgid":"<20230421080205.47633-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T08:02:05","name":"[V2] RISC-V: Fix PR108279","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421080205.47633-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86189,"url":"https://patchwork.plctlab.org/api/1.2/patches/86189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091007.158276-1-juzhe.zhong@rivai.ai/","msgid":"<20230421091007.158276-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T09:10:07","name":"[V3] RISC-V: Defer vsetvli insertion to later if possible [PR108270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091007.158276-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86193,"url":"https://patchwork.plctlab.org/api/1.2/patches/86193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091912.169622-1-juzhe.zhong@rivai.ai/","msgid":"<20230421091912.169622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-21T09:19:12","name":"[V4] RISC-V: Defer vsetvli insertion to later if possible [PR108270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421091912.169622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86216,"url":"https://patchwork.plctlab.org/api/1.2/patches/86216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421100722.17288-1-gaofei@eswincomputing.com/","msgid":"<20230421100722.17288-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-04-21T10:07:22","name":"RISC-V: decouple stack allocation for rv32e w/o save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421100722.17288-1-gaofei@eswincomputing.com/mbox/"},{"id":86249,"url":"https://patchwork.plctlab.org/api/1.2/patches/86249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112446.2DD2B13456@imap2.suse-dmz.suse.de/","msgid":"<20230421112446.2DD2B13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:24:45","name":"[1/3] change DF to use the proper CFG order for DF_FORWARD problems","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112446.2DD2B13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86250,"url":"https://patchwork.plctlab.org/api/1.2/patches/86250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112505.9E91D13456@imap2.suse-dmz.suse.de/","msgid":"<20230421112505.9E91D13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:25:05","name":"[2/3] change inverted_post_order_compute to inverted_rev_post_order_compute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112505.9E91D13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86251,"url":"https://patchwork.plctlab.org/api/1.2/patches/86251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112527.BB76813456@imap2.suse-dmz.suse.de/","msgid":"<20230421112527.BB76813456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:25:27","name":"[3/3] Use correct CFG orders for DF worklist processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421112527.BB76813456@imap2.suse-dmz.suse.de/mbox/"},{"id":86252,"url":"https://patchwork.plctlab.org/api/1.2/patches/86252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ07c4CCxL0skMb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:35:09","name":"Remove dead handling of label_decl in tree merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ07c4CCxL0skMb@kam.mff.cuni.cz/mbox/"},{"id":86257,"url":"https://patchwork.plctlab.org/api/1.2/patches/86257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421114722.6D89F13456@imap2.suse-dmz.suse.de/","msgid":"<20230421114722.6D89F13456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T11:47:22","name":"tree-optimization/109573 - avoid ICEing on unexpected live def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421114722.6D89F13456@imap2.suse-dmz.suse.de/mbox/"},{"id":86264,"url":"https://patchwork.plctlab.org/api/1.2/patches/86264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ42eT5TXmuBzia@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:51:53","name":"Stabilize temporary variable names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ42eT5TXmuBzia@kam.mff.cuni.cz/mbox/"},{"id":86266,"url":"https://patchwork.plctlab.org/api/1.2/patches/86266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ6p/HJxNt479h/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-21T11:59:35","name":"match.pd: Fix fneg/fadd optimization [PR109583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ6p/HJxNt479h/@tucnak/mbox/"},{"id":86267,"url":"https://patchwork.plctlab.org/api/1.2/patches/86267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ7qPghoFZ59bIS@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T12:03:52","name":"Stabilize inliner Fibonacci heap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEJ7qPghoFZ59bIS@kam.mff.cuni.cz/mbox/"},{"id":86298,"url":"https://patchwork.plctlab.org/api/1.2/patches/86298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f53887a9-59b1-f348-c683-205f6e5255f0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T12:54:32","name":"[v4,1/4] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f53887a9-59b1-f348-c683-205f6e5255f0@linux.ibm.com/mbox/"},{"id":86311,"url":"https://patchwork.plctlab.org/api/1.2/patches/86311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEKRXFttQMehkW19@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-21T13:36:28","name":"Fix loop-ch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEKRXFttQMehkW19@kam.mff.cuni.cz/mbox/"},{"id":86322,"url":"https://patchwork.plctlab.org/api/1.2/patches/86322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135123.0BA1613456@imap2.suse-dmz.suse.de/","msgid":"<20230421135123.0BA1613456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:51:22","name":"Add operator* to gimple_stmt_iterator and gphi_iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135123.0BA1613456@imap2.suse-dmz.suse.de/mbox/"},{"id":86323,"url":"https://patchwork.plctlab.org/api/1.2/patches/86323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135135.B805413456@imap2.suse-dmz.suse.de/","msgid":"<20230421135135.B805413456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:51:35","name":"Add safe_is_a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135135.B805413456@imap2.suse-dmz.suse.de/mbox/"},{"id":86324,"url":"https://patchwork.plctlab.org/api/1.2/patches/86324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135306.0536913456@imap2.suse-dmz.suse.de/","msgid":"<20230421135306.0536913456@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-21T13:53:05","name":"This replaces uses of last_stmt where we do not require debug skipping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135306.0536913456@imap2.suse-dmz.suse.de/mbox/"},{"id":86325,"url":"https://patchwork.plctlab.org/api/1.2/patches/86325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-1-hongtao.liu@intel.com/","msgid":"<20230421135347.2519452-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-21T13:53:46","name":"[1/2,i386] Support type _Float16/__bf16 independent of SSE2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-1-hongtao.liu@intel.com/mbox/"},{"id":86328,"url":"https://patchwork.plctlab.org/api/1.2/patches/86328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-2-hongtao.liu@intel.com/","msgid":"<20230421135347.2519452-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-21T13:53:47","name":"[2/2,i386] def_or_undef __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__ for target attribute/pragmas.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421135347.2519452-2-hongtao.liu@intel.com/mbox/"},{"id":86353,"url":"https://patchwork.plctlab.org/api/1.2/patches/86353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-Tn3BewxELWbvLWj=qp14f-o+dQBe30rKXkb_yuh2Eg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T14:41:05","name":"i386: Remove REG_OK_FOR_INDEX/REG_OK_FOR_BASE and their derivatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-Tn3BewxELWbvLWj=qp14f-o+dQBe30rKXkb_yuh2Eg@mail.gmail.com/mbox/"},{"id":86376,"url":"https://patchwork.plctlab.org/api/1.2/patches/86376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421150248.968828-1-jwakely@redhat.com/","msgid":"<20230421150248.968828-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-21T15:02:48","name":"[committed,gcc-12] libstdc++: Optimize std::try_facet and std::use_facet [PR103755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421150248.968828-1-jwakely@redhat.com/mbox/"},{"id":86379,"url":"https://patchwork.plctlab.org/api/1.2/patches/86379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMk61mruUqyGGyp6mHZfOb0AYkUo-AFdKPxYVwZpnBx1Dw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:17:39","name":"[aarch64] Use force_reg instead of copy_to_mode_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMk61mruUqyGGyp6mHZfOb0AYkUo-AFdKPxYVwZpnBx1Dw@mail.gmail.com/mbox/"},{"id":86381,"url":"https://patchwork.plctlab.org/api/1.2/patches/86381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6274bcc-8711-610e-98ba-c0ce55dff8eb@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:21:08","name":"[v4,3/4] ree: Main functionality to improve ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6274bcc-8711-610e-98ba-c0ce55dff8eb@linux.ibm.com/mbox/"},{"id":86382,"url":"https://patchwork.plctlab.org/api/1.2/patches/86382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddpm7xuunr.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-04-21T15:22:48","name":"doc: Update install.texi for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddpm7xuunr.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":86448,"url":"https://patchwork.plctlab.org/api/1.2/patches/86448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421173804.3513130-1-arsen@aarsen.me/","msgid":"<20230421173804.3513130-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-21T17:38:04","name":"gcc/m2: Drop references to $(P)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421173804.3513130-1-arsen@aarsen.me/mbox/"},{"id":86466,"url":"https://patchwork.plctlab.org/api/1.2/patches/86466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fba5f376-75b6-e8ca-cd56-fa49fc51b668@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-04-21T18:27:35","name":"[committed,PR,testsuite/109549] Adjust x86 testsuite for recent if-conversion cost checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fba5f376-75b6-e8ca-cd56-fa49fc51b668@ventanamicro.com/mbox/"},{"id":86474,"url":"https://patchwork.plctlab.org/api/1.2/patches/86474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193227.1044332-1-jason@redhat.com/","msgid":"<20230421193227.1044332-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-21T19:32:27","name":"[pushed] c++: fix '\''unsigned typedef-name'\'' extension [PR108099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193227.1044332-1-jason@redhat.com/mbox/"},{"id":86475,"url":"https://patchwork.plctlab.org/api/1.2/patches/86475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193338.3874230-1-sam@gentoo.org/","msgid":"<20230421193338.3874230-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-21T19:33:38","name":"testsuite: Add testcase for sparc ICE [PR105573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230421193338.3874230-1-sam@gentoo.org/mbox/"},{"id":86482,"url":"https://patchwork.plctlab.org/api/1.2/patches/86482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5da330c4-2918-10df-b315-17307067d2bf@redhat.com/","msgid":"<5da330c4-2918-10df-b315-17307067d2bf@redhat.com>","list_archive_url":null,"date":"2023-04-21T20:34:43","name":"[COMMITTED] PR tree-optimization/109546 - Do not fold ADDR_EXPR conditions leading to builtin_unreachable early.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5da330c4-2918-10df-b315-17307067d2bf@redhat.com/mbox/"},{"id":86553,"url":"https://patchwork.plctlab.org/api/1.2/patches/86553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEN9yWhVwRqM2kVn@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-22T06:25:13","name":"c++: Fix ICE with parameter pack of decltype(auto) [PR103497]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEN9yWhVwRqM2kVn@Thaum.localdomain/mbox/"},{"id":86560,"url":"https://patchwork.plctlab.org/api/1.2/patches/86560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOUjFpUiri7kUOp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:02:20","name":"Fix up bootstrap with GCC 4.[89] after RAII auto_mpfr and autp_mpz [PR109589]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOUjFpUiri7kUOp@tucnak/mbox/"},{"id":86562,"url":"https://patchwork.plctlab.org/api/1.2/patches/86562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOZPwDFcqYdSnaN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:22:23","name":"testsuite: Fix up pr109011-*.c tests for powerpc [PR109572]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEOZPwDFcqYdSnaN@tucnak/mbox/"},{"id":86563,"url":"https://patchwork.plctlab.org/api/1.2/patches/86563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLQB=optugqew-T1a5bn=DA=XsN7fYT=hT4fY4UtpU7+Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-22T08:32:30","name":"[fortran] PRs 105152, 100193, 87946, 103389, 104429 and 82774","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLQB=optugqew-T1a5bn=DA=XsN7fYT=hT4fY4UtpU7+Q@mail.gmail.com/mbox/"},{"id":86568,"url":"https://patchwork.plctlab.org/api/1.2/patches/86568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com/","msgid":"<8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com>","list_archive_url":null,"date":"2023-04-22T09:06:20","name":"[v4,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com/mbox/"},{"id":86608,"url":"https://patchwork.plctlab.org/api/1.2/patches/86608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007101d97538$e0734790$a159d6b0$@nextmovesoftware.com/","msgid":"<007101d97538$e0734790$a159d6b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T16:38:30","name":"[xstormy16] Update xstormy16_rtx_costs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007101d97538$e0734790$a159d6b0$@nextmovesoftware.com/mbox/"},{"id":86609,"url":"https://patchwork.plctlab.org/api/1.2/patches/86609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com/","msgid":"<008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T16:43:12","name":"[xstormy16] Improved SImode shifts by two bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d97539$87cdd6e0$976984a0$@nextmovesoftware.com/mbox/"},{"id":86611,"url":"https://patchwork.plctlab.org/api/1.2/patches/86611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9fe99b-65ff-4d26-ae3e-5a9668831344@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-22T16:47:00","name":"[committed] Adjust rx movsicc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bd9fe99b-65ff-4d26-ae3e-5a9668831344@gmail.com/mbox/"},{"id":86633,"url":"https://patchwork.plctlab.org/api/1.2/patches/86633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026001d9755d$19b30030$4d190090$@nextmovesoftware.com/","msgid":"<026001d9755d$19b30030$4d190090$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-22T20:57:48","name":"[xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026001d9755d$19b30030$4d190090$@nextmovesoftware.com/mbox/"},{"id":86639,"url":"https://patchwork.plctlab.org/api/1.2/patches/86639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-2-apinski@marvell.com/","msgid":"<20230422220921.452264-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:16","name":"[1/6] PHIOPT: Move check on diamond bb to tree_ssa_phiopt_worker from minmax_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-2-apinski@marvell.com/mbox/"},{"id":86642,"url":"https://patchwork.plctlab.org/api/1.2/patches/86642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-3-apinski@marvell.com/","msgid":"<20230422220921.452264-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:17","name":"[2/6] PHIOPT: Cleanup tree_ssa_phiopt_worker code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-3-apinski@marvell.com/mbox/"},{"id":86643,"url":"https://patchwork.plctlab.org/api/1.2/patches/86643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-4-apinski@marvell.com/","msgid":"<20230422220921.452264-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:18","name":"[3/6] PHIOPT: Allow other diamond uses when do_hoist_loads is true","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-4-apinski@marvell.com/mbox/"},{"id":86640,"url":"https://patchwork.plctlab.org/api/1.2/patches/86640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-5-apinski@marvell.com/","msgid":"<20230422220921.452264-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:19","name":"[4/6] PHIOPT: Factor out some code from match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-5-apinski@marvell.com/mbox/"},{"id":86641,"url":"https://patchwork.plctlab.org/api/1.2/patches/86641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-6-apinski@marvell.com/","msgid":"<20230422220921.452264-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:20","name":"[5/6] PHIOPT: Ignore predicates for match-and-simplify phi-opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-6-apinski@marvell.com/mbox/"},{"id":86644,"url":"https://patchwork.plctlab.org/api/1.2/patches/86644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-7-apinski@marvell.com/","msgid":"<20230422220921.452264-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-22T22:09:21","name":"[6/6] PHIOPT: Add support for diamond shaped bb to match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230422220921.452264-7-apinski@marvell.com/mbox/"},{"id":86656,"url":"https://patchwork.plctlab.org/api/1.2/patches/86656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423030258.194509-1-hongtao.liu@intel.com/","msgid":"<20230423030258.194509-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-23T03:02:58","name":"Add testcases for ffs/ctz vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423030258.194509-1-hongtao.liu@intel.com/mbox/"},{"id":86668,"url":"https://patchwork.plctlab.org/api/1.2/patches/86668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6444e3c7.16516@msgid.achurch.org/","msgid":"<6444e3c7.16516@msgid.achurch.org>","list_archive_url":null,"date":"2023-04-23T07:52:38","name":"PoC: add -Wunused-result=strict","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6444e3c7.16516@msgid.achurch.org/mbox/"},{"id":86674,"url":"https://patchwork.plctlab.org/api/1.2/patches/86674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423090453.87556-1-aldyh@redhat.com/","msgid":"<20230423090453.87556-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-23T09:04:53","name":"[COMMITTED] Handle NANs in frange::operator== [PR109593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423090453.87556-1-aldyh@redhat.com/mbox/"},{"id":86692,"url":"https://patchwork.plctlab.org/api/1.2/patches/86692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423111752.101308-1-juzhe.zhong@rivai.ai/","msgid":"<20230423111752.101308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T11:17:52","name":"[V2] RISC-V: Optimize fault only first load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423111752.101308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86693,"url":"https://patchwork.plctlab.org/api/1.2/patches/86693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423113354.141950-1-juzhe.zhong@rivai.ai/","msgid":"<20230423113354.141950-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T11:33:54","name":"RISC-V: Add function comment for cleanup_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423113354.141950-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86698,"url":"https://patchwork.plctlab.org/api/1.2/patches/86698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121812.95392-1-juzhe.zhong@rivai.ai/","msgid":"<20230423121812.95392-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T12:18:12","name":"RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121812.95392-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86701,"url":"https://patchwork.plctlab.org/api/1.2/patches/86701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121859.95799-1-juzhe.zhong@rivai.ai/","msgid":"<20230423121859.95799-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-23T12:18:59","name":"[V2] RISC-V: Eliminate redundant vsetvli for duplicate AVL def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423121859.95799-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86722,"url":"https://patchwork.plctlab.org/api/1.2/patches/86722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423131903.155998-1-xry111@xry111.site/","msgid":"<20230423131903.155998-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-04-23T13:19:03","name":"LoongArch: Enable shrink wrapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230423131903.155998-1-xry111@xry111.site/mbox/"},{"id":86780,"url":"https://patchwork.plctlab.org/api/1.2/patches/86780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org/","msgid":"<283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-04-23T16:47:52","name":"Turn on LRA on all targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/283c45ca085ced958cbce6e64331252c83a5899f.1682268126.git.segher@kernel.crashing.org/mbox/"},{"id":86807,"url":"https://patchwork.plctlab.org/api/1.2/patches/86807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com/","msgid":"<00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-23T20:14:28","name":"PR rtl-optimization/109476: Use ZERO_EXTEND instead of zeroing a SUBREG.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00fd01d97620$36a11e20$a3e35a60$@nextmovesoftware.com/mbox/"},{"id":86832,"url":"https://patchwork.plctlab.org/api/1.2/patches/86832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424035341.96537-1-juzhe.zhong@rivai.ai/","msgid":"<20230424035341.96537-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-24T03:53:41","name":"[V2] RISC-V: Optimize comparison patterns for register allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424035341.96537-1-juzhe.zhong@rivai.ai/mbox/"},{"id":86888,"url":"https://patchwork.plctlab.org/api/1.2/patches/86888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424074332.141890-1-aldyh@redhat.com/","msgid":"<20230424074332.141890-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-24T07:43:32","name":"Pass correct type to irange::contains_p() in ipa-cp.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424074332.141890-1-aldyh@redhat.com/mbox/"},{"id":86939,"url":"https://patchwork.plctlab.org/api/1.2/patches/86939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz/","msgid":"<7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz>","list_archive_url":null,"date":"2023-04-24T10:00:17","name":"[(pushed)] MAINTAINERS: fix sorting of names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ca8ae76-5926-3263-c8fe-d9a7017f8b56@suse.cz/mbox/"},{"id":87099,"url":"https://patchwork.plctlab.org/api/1.2/patches/87099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEamGo7BN+3iscYO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-24T15:54:02","name":"powerpc: Fix up *branch_anddi3_dot for -m32 -mpowerpc64 [PR109566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEamGo7BN+3iscYO@tucnak/mbox/"},{"id":87108,"url":"https://patchwork.plctlab.org/api/1.2/patches/87108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162337.104065-1-ppalka@redhat.com/","msgid":"<20230424162337.104065-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-24T16:23:37","name":"libstdc++: Fix __max_diff_type::operator>>= for negative values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162337.104065-1-ppalka@redhat.com/mbox/"},{"id":87109,"url":"https://patchwork.plctlab.org/api/1.2/patches/87109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162347.104093-1-ppalka@redhat.com/","msgid":"<20230424162347.104093-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-24T16:23:47","name":"libstdc++: Make __max_size_type and __max_diff_type structural","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424162347.104093-1-ppalka@redhat.com/mbox/"},{"id":87168,"url":"https://patchwork.plctlab.org/api/1.2/patches/87168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-2-apinski@marvell.com/","msgid":"<20230424213011.528181-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:05","name":"[1/7] PHIOPT: Split out store elimination from phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-2-apinski@marvell.com/mbox/"},{"id":87172,"url":"https://patchwork.plctlab.org/api/1.2/patches/87172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-3-apinski@marvell.com/","msgid":"<20230424213011.528181-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:06","name":"[2/7] PHIOPT: Rename tree_ssa_phiopt_worker to pass_phiopt::execute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-3-apinski@marvell.com/mbox/"},{"id":87167,"url":"https://patchwork.plctlab.org/api/1.2/patches/87167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-4-apinski@marvell.com/","msgid":"<20230424213011.528181-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:07","name":"[3/7] PHIOPT: Move store_elim_worker into pass_cselim::execute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-4-apinski@marvell.com/mbox/"},{"id":87166,"url":"https://patchwork.plctlab.org/api/1.2/patches/87166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-5-apinski@marvell.com/","msgid":"<20230424213011.528181-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:08","name":"[4/7] MIN/MAX should be treated similar as comparisons for trapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-5-apinski@marvell.com/mbox/"},{"id":87169,"url":"https://patchwork.plctlab.org/api/1.2/patches/87169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-6-apinski@marvell.com/","msgid":"<20230424213011.528181-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:09","name":"[5/7] PHIOPT: Allow MIN/MAX to have up to 2 MIN/MAX expressions for early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-6-apinski@marvell.com/mbox/"},{"id":87171,"url":"https://patchwork.plctlab.org/api/1.2/patches/87171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-7-apinski@marvell.com/","msgid":"<20230424213011.528181-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:10","name":"[6/7] MATCH: Factor out code that for min max detection with constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-7-apinski@marvell.com/mbox/"},{"id":87170,"url":"https://patchwork.plctlab.org/api/1.2/patches/87170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-8-apinski@marvell.com/","msgid":"<20230424213011.528181-8-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-24T21:30:11","name":"[7/7] MATCH: Add patterns from phiopt'\''s minmax_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424213011.528181-8-apinski@marvell.com/mbox/"},{"id":87193,"url":"https://patchwork.plctlab.org/api/1.2/patches/87193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424223055.3450183-1-sam@gentoo.org/","msgid":"<20230424223055.3450183-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-04-24T22:30:55","name":"[v2] testsuite: Add testcase for sparc ICE [PR105573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230424223055.3450183-1-sam@gentoo.org/mbox/"},{"id":87223,"url":"https://patchwork.plctlab.org/api/1.2/patches/87223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425002404.533283-1-apinski@marvell.com/","msgid":"<20230425002404.533283-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-25T00:24:04","name":"[1] Add alternative testcase of phi-opt-25.c that tests phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425002404.533283-1-apinski@marvell.com/mbox/"},{"id":87253,"url":"https://patchwork.plctlab.org/api/1.2/patches/87253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425062543.851AF13466@imap2.suse-dmz.suse.de/","msgid":"<20230425062543.851AF13466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T06:25:43","name":"rtl-optimization/109585 - alias analysis typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425062543.851AF13466@imap2.suse-dmz.suse.de/mbox/"},{"id":87309,"url":"https://patchwork.plctlab.org/api/1.2/patches/87309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2140474.irdbgypaU6@fomalhaut/","msgid":"<2140474.irdbgypaU6@fomalhaut>","list_archive_url":null,"date":"2023-04-25T08:47:59","name":"[Ada] Remove obsolete configure code in gnattools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2140474.irdbgypaU6@fomalhaut/mbox/"},{"id":87317,"url":"https://patchwork.plctlab.org/api/1.2/patches/87317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425090517.247556-1-aldyh@redhat.com/","msgid":"<20230425090517.247556-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-25T09:05:17","name":"Remove default constructor to nan_state.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425090517.247556-1-aldyh@redhat.com/mbox/"},{"id":87326,"url":"https://patchwork.plctlab.org/api/1.2/patches/87326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3493207.iIbC2pHGDl@fomalhaut/","msgid":"<3493207.iIbC2pHGDl@fomalhaut>","list_archive_url":null,"date":"2023-04-25T09:33:23","name":"Avoid creating useless debug temporaries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3493207.iIbC2pHGDl@fomalhaut/mbox/"},{"id":87331,"url":"https://patchwork.plctlab.org/api/1.2/patches/87331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j7cu0jnuk.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-25T09:46:43","name":"MAINTAINERS: add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yw8j7cu0jnuk.fsf@arm.com/mbox/"},{"id":87361,"url":"https://patchwork.plctlab.org/api/1.2/patches/87361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com/","msgid":"<00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-25T11:10:44","name":"[Committed] Correct zeroextendqihi2 insn length regression on xstormy16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c101d97766$95a30a40$c0e91ec0$@nextmovesoftware.com/mbox/"},{"id":87384,"url":"https://patchwork.plctlab.org/api/1.2/patches/87384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEfLSlzL3Ajemmmk@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-25T12:44:58","name":"[committed] testsuite: Fix up ext-floating15.C tests on powerpc64-linux [PR109278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEfLSlzL3Ajemmmk@tucnak/mbox/"},{"id":87390,"url":"https://patchwork.plctlab.org/api/1.2/patches/87390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425130836.5E2B513466@imap2.suse-dmz.suse.de/","msgid":"<20230425130836.5E2B513466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T13:08:35","name":"tree-optimization/109609 - correctly interpret arg size in fnspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425130836.5E2B513466@imap2.suse-dmz.suse.de/mbox/"},{"id":87413,"url":"https://patchwork.plctlab.org/api/1.2/patches/87413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425134229.181115-1-juzhe.zhong@rivai.ai/","msgid":"<20230425134229.181115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-25T13:42:29","name":"VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425134229.181115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87419,"url":"https://patchwork.plctlab.org/api/1.2/patches/87419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEffjoGtOosBVKcZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-25T14:11:26","name":"[committed] testsuite: Fix up ext-floating2.C on powerpc64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEffjoGtOosBVKcZ@tucnak/mbox/"},{"id":87450,"url":"https://patchwork.plctlab.org/api/1.2/patches/87450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425142904.133137-1-pan2.li@intel.com/","msgid":"<20230425142904.133137-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-25T14:29:04","name":"[v3] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425142904.133137-1-pan2.li@intel.com/mbox/"},{"id":87452,"url":"https://patchwork.plctlab.org/api/1.2/patches/87452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com/","msgid":"<37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com>","list_archive_url":null,"date":"2023-04-25T14:35:46","name":"[committed] Re: [patch] '\''omp scan'\'' struct block seq update for OpenMP 5.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37efa25c-d59d-0fef-169e-31551712c32b@codesourcery.com/mbox/"},{"id":87467,"url":"https://patchwork.plctlab.org/api/1.2/patches/87467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4100446e-18fa-6f72-13a2-05905666a787@suse.com/","msgid":"<4100446e-18fa-6f72-13a2-05905666a787@suse.com>","list_archive_url":null,"date":"2023-04-25T14:50:29","name":"testsuite: adjust NOP expectations for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4100446e-18fa-6f72-13a2-05905666a787@suse.com/mbox/"},{"id":87471,"url":"https://patchwork.plctlab.org/api/1.2/patches/87471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com/","msgid":"<27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com>","list_archive_url":null,"date":"2023-04-25T15:00:05","name":"[v2] testsuite/C++: cope with IPv6 being unavailable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a0e26d-dd2d-5072-613c-8fcce513eaec@suse.com/mbox/"},{"id":87472,"url":"https://patchwork.plctlab.org/api/1.2/patches/87472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425151135.AEB62138E3@imap2.suse-dmz.suse.de/","msgid":"<20230425151135.AEB62138E3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-04-25T15:11:35","name":"More last_stmt removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230425151135.AEB62138E3@imap2.suse-dmz.suse.de/mbox/"},{"id":87473,"url":"https://patchwork.plctlab.org/api/1.2/patches/87473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEft8nJK6sP93fM+@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-04-25T15:12:50","name":"Unloop no longer looping loops in loop-ch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEft8nJK6sP93fM+@kam.mff.cuni.cz/mbox/"},{"id":87539,"url":"https://patchwork.plctlab.org/api/1.2/patches/87539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com/","msgid":"<019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-25T20:20:50","name":"[xstormy16] Add support for byte and word swapping instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/019e01d977b3$6ea3cc20$4beb6460$@nextmovesoftware.com/mbox/"},{"id":87589,"url":"https://patchwork.plctlab.org/api/1.2/patches/87589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426020159.2497257-1-juzhe.zhong@rivai.ai/","msgid":"<20230426020159.2497257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T02:01:59","name":"Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426020159.2497257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87594,"url":"https://patchwork.plctlab.org/api/1.2/patches/87594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426035929.330213-1-juzhe.zhong@rivai.ai/","msgid":"<20230426035929.330213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T03:59:29","name":"[V3] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426035929.330213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87600,"url":"https://patchwork.plctlab.org/api/1.2/patches/87600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426044739.2672860-1-juzhe.zhong@rivai.ai/","msgid":"<20230426044739.2672860-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-04-26T04:47:39","name":"[V2] RISC-V: Fine tune vmadc/vmsbc RA constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426044739.2672860-1-juzhe.zhong@rivai.ai/mbox/"},{"id":87619,"url":"https://patchwork.plctlab.org/api/1.2/patches/87619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426061026.116232-1-sebastian.huber@embedded-brains.de/","msgid":"<20230426061026.116232-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-04-26T06:10:26","name":"[wwwdocs] gcc-13: Mention new gcov feature","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426061026.116232-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":87687,"url":"https://patchwork.plctlab.org/api/1.2/patches/87687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426073555.4073530-1-hongtao.liu@intel.com/","msgid":"<20230426073555.4073530-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-04-26T07:35:55","name":"[vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426073555.4073530-1-hongtao.liu@intel.com/mbox/"},{"id":87725,"url":"https://patchwork.plctlab.org/api/1.2/patches/87725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-1-aldyh@redhat.com/","msgid":"<20230426083328.313566-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:20","name":"[COMMITTED] Remove compare_names* from legacy cond folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-1-aldyh@redhat.com/mbox/"},{"id":87731,"url":"https://patchwork.plctlab.org/api/1.2/patches/87731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-2-aldyh@redhat.com/","msgid":"<20230426083328.313566-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:21","name":"[COMMITTED] Refactor vrp_evaluate_conditional* and rename it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-2-aldyh@redhat.com/mbox/"},{"id":87728,"url":"https://patchwork.plctlab.org/api/1.2/patches/87728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-3-aldyh@redhat.com/","msgid":"<20230426083328.313566-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:22","name":"[COMMITTED] Remove range_query::get_value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-3-aldyh@redhat.com/mbox/"},{"id":87726,"url":"https://patchwork.plctlab.org/api/1.2/patches/87726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-4-aldyh@redhat.com/","msgid":"<20230426083328.313566-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:23","name":"[COMMITTED] Remove deprecated range_fold_{unary, binary}_expr uses from ipa-*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-4-aldyh@redhat.com/mbox/"},{"id":87729,"url":"https://patchwork.plctlab.org/api/1.2/patches/87729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-5-aldyh@redhat.com/","msgid":"<20230426083328.313566-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:24","name":"[COMMITTED] Remove range_fold_{unary,binary}_expr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-5-aldyh@redhat.com/mbox/"},{"id":87734,"url":"https://patchwork.plctlab.org/api/1.2/patches/87734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-6-aldyh@redhat.com/","msgid":"<20230426083328.313566-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:25","name":"[COMMITTED] Remove irange::may_contain_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-6-aldyh@redhat.com/mbox/"},{"id":87733,"url":"https://patchwork.plctlab.org/api/1.2/patches/87733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-7-aldyh@redhat.com/","msgid":"<20230426083328.313566-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:26","name":"[COMMITTED] Remove symbolics from irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-7-aldyh@redhat.com/mbox/"},{"id":87736,"url":"https://patchwork.plctlab.org/api/1.2/patches/87736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-8-aldyh@redhat.com/","msgid":"<20230426083328.313566-8-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:27","name":"[COMMITTED] Remove irange::constant_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-8-aldyh@redhat.com/mbox/"},{"id":87737,"url":"https://patchwork.plctlab.org/api/1.2/patches/87737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-9-aldyh@redhat.com/","msgid":"<20230426083328.313566-9-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T08:33:28","name":"[COMMITTED] Convert users of legacy API to get_legacy_range() function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426083328.313566-9-aldyh@redhat.com/mbox/"},{"id":87743,"url":"https://patchwork.plctlab.org/api/1.2/patches/87743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AEA71396-534B-4730-901C-9B561568A780@microchip.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T09:00:08","name":"avr: Set param_min_pagesize to 0 [PR105523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AEA71396-534B-4730-901C-9B561568A780@microchip.com/mbox/"},{"id":87826,"url":"https://patchwork.plctlab.org/api/1.2/patches/87826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-1-aldyh@redhat.com/","msgid":"<20230426114752.336928-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:46","name":"[COMMITTED] Fix swapping of ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-1-aldyh@redhat.com/mbox/"},{"id":87827,"url":"https://patchwork.plctlab.org/api/1.2/patches/87827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-2-aldyh@redhat.com/","msgid":"<20230426114752.336928-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:47","name":"[COMMITTED] Replace ad-hoc value_range dumpers with irange::dump.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-2-aldyh@redhat.com/mbox/"},{"id":87828,"url":"https://patchwork.plctlab.org/api/1.2/patches/87828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-3-aldyh@redhat.com/","msgid":"<20230426114752.336928-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:48","name":"[COMMITTED] Remove some uses of deprecated irange API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-3-aldyh@redhat.com/mbox/"},{"id":87834,"url":"https://patchwork.plctlab.org/api/1.2/patches/87834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-4-aldyh@redhat.com/","msgid":"<20230426114752.336928-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:49","name":"[COMMITTED] Convert compare_nonzero_chars to wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-4-aldyh@redhat.com/mbox/"},{"id":87830,"url":"https://patchwork.plctlab.org/api/1.2/patches/87830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-5-aldyh@redhat.com/","msgid":"<20230426114752.336928-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:50","name":"[COMMITTED] Remove range_int_cst_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-5-aldyh@redhat.com/mbox/"},{"id":87831,"url":"https://patchwork.plctlab.org/api/1.2/patches/87831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-6-aldyh@redhat.com/","msgid":"<20230426114752.336928-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:51","name":"[COMMITTED] Remove range_has_numeric_bounds_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-6-aldyh@redhat.com/mbox/"},{"id":87829,"url":"https://patchwork.plctlab.org/api/1.2/patches/87829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-7-aldyh@redhat.com/","msgid":"<20230426114752.336928-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-26T11:47:52","name":"[COMMITTED] Remove legacy range support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426114752.336928-7-aldyh@redhat.com/mbox/"},{"id":87839,"url":"https://patchwork.plctlab.org/api/1.2/patches/87839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120006.2362465-1-pan2.li@intel.com/","msgid":"<20230426120006.2362465-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-26T12:00:06","name":"RISC-V: Legitimise the const0_rtx for RVV load/store address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120006.2362465-1-pan2.li@intel.com/mbox/"},{"id":87843,"url":"https://patchwork.plctlab.org/api/1.2/patches/87843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120503.3207041-1-yanzhang.wang@intel.com/","msgid":"<20230426120503.3207041-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T12:05:03","name":"RISC-V: ICE for vlmul_ext_v intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426120503.3207041-1-yanzhang.wang@intel.com/mbox/"},{"id":87849,"url":"https://patchwork.plctlab.org/api/1.2/patches/87849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426123743.3210243-1-yanzhang.wang@intel.com/","msgid":"<20230426123743.3210243-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T12:37:43","name":"RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426123743.3210243-1-yanzhang.wang@intel.com/mbox/"},{"id":87856,"url":"https://patchwork.plctlab.org/api/1.2/patches/87856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426125140.1064474-1-ppalka@redhat.com/","msgid":"<20230426125140.1064474-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-26T12:51:40","name":"wwwdocs: Document more libstdc++ additions for GCC 13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426125140.1064474-1-ppalka@redhat.com/mbox/"},{"id":87861,"url":"https://patchwork.plctlab.org/api/1.2/patches/87861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426130602.3335312-1-yanzhang.wang@intel.com/","msgid":"<20230426130602.3335312-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-26T13:06:02","name":"[v2] RISC-V: ICE for vlmul_ext_v intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426130602.3335312-1-yanzhang.wang@intel.com/mbox/"},{"id":87877,"url":"https://patchwork.plctlab.org/api/1.2/patches/87877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEkzW8oH5Rxp7yKM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-26T14:21:15","name":"Add targetm.libm_function_max_error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEkzW8oH5Rxp7yKM@tucnak/mbox/"},{"id":87893,"url":"https://patchwork.plctlab.org/api/1.2/patches/87893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426160705.1072259-1-patrick@rivosinc.com/","msgid":"<20230426160705.1072259-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T16:07:05","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426160705.1072259-1-patrick@rivosinc.com/mbox/"},{"id":87894,"url":"https://patchwork.plctlab.org/api/1.2/patches/87894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426161539.1571701-1-jwakely@redhat.com/","msgid":"<20230426161539.1571701-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-26T16:15:39","name":"doc: Add explanation of zero-length array example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426161539.1571701-1-jwakely@redhat.com/mbox/"},{"id":87895,"url":"https://patchwork.plctlab.org/api/1.2/patches/87895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZElO3DhiloDY6dO7@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-04-26T16:18:36","name":"[V4] PR target/105325, Make load/cmp fusion know about prefixed loads.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZElO3DhiloDY6dO7@toto.the-meissners.org/mbox/"},{"id":87898,"url":"https://patchwork.plctlab.org/api/1.2/patches/87898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426165347.599616-1-apinski@marvell.com/","msgid":"<20230426165347.599616-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-26T16:53:47","name":"GCC-13/changes: Add note about iostream usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426165347.599616-1-apinski@marvell.com/mbox/"},{"id":87900,"url":"https://patchwork.plctlab.org/api/1.2/patches/87900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426170129.1076929-1-patrick@rivosinc.com/","msgid":"<20230426170129.1076929-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T17:01:29","name":"[committed] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426170129.1076929-1-patrick@rivosinc.com/mbox/"},{"id":87956,"url":"https://patchwork.plctlab.org/api/1.2/patches/87956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6840d76-3c02-6034-38c5-f3ead4a6bbb4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T19:26:00","name":"[COMMITTED,1/5] PR tree-optimization/109417 - Don'\''t save ssa-name pointer in dependency cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6840d76-3c02-6034-38c5-f3ead4a6bbb4@redhat.com/mbox/"},{"id":87957,"url":"https://patchwork.plctlab.org/api/1.2/patches/87957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28bd16f7-f334-3245-c444-65a23e98d020@redhat.com/","msgid":"<28bd16f7-f334-3245-c444-65a23e98d020@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:26:21","name":"[COMMITTED,2/5] Quicker relation check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28bd16f7-f334-3245-c444-65a23e98d020@redhat.com/mbox/"},{"id":87958,"url":"https://patchwork.plctlab.org/api/1.2/patches/87958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b652b65f-63fb-f3d6-e031-ade8a9095730@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-26T19:26:40","name":"[COMMITTED,3/5] Add sbr_lazy_vector and adjust (e)vrp sparse cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b652b65f-63fb-f3d6-e031-ade8a9095730@redhat.com/mbox/"},{"id":87960,"url":"https://patchwork.plctlab.org/api/1.2/patches/87960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com/","msgid":"<5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:26:53","name":"[COMMITTED,4/5] Rename ssa_global_cache to ssa_cache and add has_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e014139-e9d6-52fa-bbdb-42c74981b9d7@redhat.com/mbox/"},{"id":87959,"url":"https://patchwork.plctlab.org/api/1.2/patches/87959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com/","msgid":"<8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com>","list_archive_url":null,"date":"2023-04-26T19:27:06","name":"[COMMITTED,5/5] PR tree-optimization/108697 - Create a lazy ssa_cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8aab3ad2-f9cc-1211-a22f-491304685d8a@redhat.com/mbox/"},{"id":87984,"url":"https://patchwork.plctlab.org/api/1.2/patches/87984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426205349.1131469-1-patrick@rivosinc.com/","msgid":"<20230426205349.1131469-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T20:53:49","name":"RISC-V: Fix sync.md and riscv.cc whitespace errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426205349.1131469-1-patrick@rivosinc.com/mbox/"},{"id":87986,"url":"https://patchwork.plctlab.org/api/1.2/patches/87986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211547.463435-1-jason@redhat.com/","msgid":"<20230426211547.463435-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:15:47","name":"[pushed] c++: unique friend shenanigans [PR69836]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211547.463435-1-jason@redhat.com/mbox/"},{"id":87987,"url":"https://patchwork.plctlab.org/api/1.2/patches/87987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211602.463658-1-jason@redhat.com/","msgid":"<20230426211602.463658-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:16:02","name":"[pushed] c++: local class in nested generic lambda [PR109241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211602.463658-1-jason@redhat.com/mbox/"},{"id":87988,"url":"https://patchwork.plctlab.org/api/1.2/patches/87988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211613.463855-1-jason@redhat.com/","msgid":"<20230426211613.463855-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-26T21:16:13","name":"[pushed] c++: remove nsdmi_inst hashtable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426211613.463855-1-jason@redhat.com/mbox/"},{"id":87989,"url":"https://patchwork.plctlab.org/api/1.2/patches/87989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426212106.1134636-1-patrick@rivosinc.com/","msgid":"<20230426212106.1134636-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:21:06","name":"[v2] RISC-V: Fix sync.md and riscv.cc whitespace errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426212106.1134636-1-patrick@rivosinc.com/mbox/"},{"id":87992,"url":"https://patchwork.plctlab.org/api/1.2/patches/87992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-2-collison@rivosinc.com/","msgid":"<20230426214514.3355280-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:05","name":"[v5,01/10] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-2-collison@rivosinc.com/mbox/"},{"id":88001,"url":"https://patchwork.plctlab.org/api/1.2/patches/88001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-3-collison@rivosinc.com/","msgid":"<20230426214514.3355280-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:06","name":"[v5,02/10] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-3-collison@rivosinc.com/mbox/"},{"id":87999,"url":"https://patchwork.plctlab.org/api/1.2/patches/87999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-4-collison@rivosinc.com/","msgid":"<20230426214514.3355280-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:07","name":"[v5,03/10] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-4-collison@rivosinc.com/mbox/"},{"id":88003,"url":"https://patchwork.plctlab.org/api/1.2/patches/88003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-5-collison@rivosinc.com/","msgid":"<20230426214514.3355280-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:08","name":"[v5,04/10] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-5-collison@rivosinc.com/mbox/"},{"id":87993,"url":"https://patchwork.plctlab.org/api/1.2/patches/87993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-6-collison@rivosinc.com/","msgid":"<20230426214514.3355280-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:09","name":"[v5,05/10] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-6-collison@rivosinc.com/mbox/"},{"id":87994,"url":"https://patchwork.plctlab.org/api/1.2/patches/87994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-7-collison@rivosinc.com/","msgid":"<20230426214514.3355280-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:10","name":"[v5,06/10] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-7-collison@rivosinc.com/mbox/"},{"id":88002,"url":"https://patchwork.plctlab.org/api/1.2/patches/88002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-8-collison@rivosinc.com/","msgid":"<20230426214514.3355280-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:11","name":"[v5,07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-8-collison@rivosinc.com/mbox/"},{"id":87998,"url":"https://patchwork.plctlab.org/api/1.2/patches/87998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-9-collison@rivosinc.com/","msgid":"<20230426214514.3355280-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:12","name":"[v5,08/10] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-9-collison@rivosinc.com/mbox/"},{"id":87997,"url":"https://patchwork.plctlab.org/api/1.2/patches/87997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-10-collison@rivosinc.com/","msgid":"<20230426214514.3355280-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:13","name":"[v5,09/10] RISC-V: autovec: This patch adds a guard for VNx1 vectors that are present in ports like riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-10-collison@rivosinc.com/mbox/"},{"id":88000,"url":"https://patchwork.plctlab.org/api/1.2/patches/88000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-11-collison@rivosinc.com/","msgid":"<20230426214514.3355280-11-collison@rivosinc.com>","list_archive_url":null,"date":"2023-04-26T21:45:14","name":"[v5,10/10] RISC-V: autovec: This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230426214514.3355280-11-collison@rivosinc.com/mbox/"},{"id":88035,"url":"https://patchwork.plctlab.org/api/1.2/patches/88035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427000528.C64CA20420@pchp3.se.axis.com/","msgid":"<20230427000528.C64CA20420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-27T00:05:28","name":"[committed] libgcc CRIS: Define TARGET_HAS_NO_HW_DIVIDE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427000528.C64CA20420@pchp3.se.axis.com/mbox/"},{"id":88075,"url":"https://patchwork.plctlab.org/api/1.2/patches/88075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427014542.539011-1-jason@redhat.com/","msgid":"<20230427014542.539011-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-27T01:45:42","name":"[pushed] c++: restore instantiate_decl assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427014542.539011-1-jason@redhat.com/mbox/"},{"id":88085,"url":"https://patchwork.plctlab.org/api/1.2/patches/88085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427023243.1481560-1-hjl.tools@gmail.com/","msgid":"<20230427023243.1481560-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-04-27T02:32:43","name":"libsanitizer: cherry-pick commit 05551c658269 from upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427023243.1481560-1-hjl.tools@gmail.com/mbox/"},{"id":88088,"url":"https://patchwork.plctlab.org/api/1.2/patches/88088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427024002.533187-1-yanzhang.wang@intel.com/","msgid":"<20230427024002.533187-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-27T02:40:02","name":"[v2] RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427024002.533187-1-yanzhang.wang@intel.com/mbox/"},{"id":88095,"url":"https://patchwork.plctlab.org/api/1.2/patches/88095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427031242.662721-1-yanzhang.wang@intel.com/","msgid":"<20230427031242.662721-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-04-27T03:12:42","name":"[v3] RISCV: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427031242.662721-1-yanzhang.wang@intel.com/mbox/"},{"id":88098,"url":"https://patchwork.plctlab.org/api/1.2/patches/88098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427033142.949564-1-pan2.li@intel.com/","msgid":"<20230427033142.949564-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-27T03:31:42","name":"RISC-V: Add required tls to read thread pointer test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427033142.949564-1-pan2.li@intel.com/mbox/"},{"id":88142,"url":"https://patchwork.plctlab.org/api/1.2/patches/88142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427072532.B70AD3858C74@sourceware.org/","msgid":"<20230427072532.B70AD3858C74@sourceware.org>","list_archive_url":null,"date":"2023-04-27T07:24:46","name":"ipa/109607 - properly gimplify conversions introduced by IPA param manipulation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427072532.B70AD3858C74@sourceware.org/mbox/"},{"id":88149,"url":"https://patchwork.plctlab.org/api/1.2/patches/88149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427083843.D6A4C3858C31@sourceware.org/","msgid":"<20230427083843.D6A4C3858C31@sourceware.org>","list_archive_url":null,"date":"2023-04-27T08:37:23","name":"tree-optimization/109594 - wrong register promotion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427083843.D6A4C3858C31@sourceware.org/mbox/"},{"id":88151,"url":"https://patchwork.plctlab.org/api/1.2/patches/88151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427085241.69218-1-kito.cheng@sifive.com/","msgid":"<20230427085241.69218-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-27T08:52:41","name":"Docs: Add vector register constarint for asm operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427085241.69218-1-kito.cheng@sifive.com/mbox/"},{"id":88179,"url":"https://patchwork.plctlab.org/api/1.2/patches/88179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103026.1725758-1-jwakely@redhat.com/","msgid":"<20230427103026.1725758-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:30:26","name":"[committed] libstdc++: Make std::random_device throw std::system_error [PR105081]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103026.1725758-1-jwakely@redhat.com/mbox/"},{"id":88180,"url":"https://patchwork.plctlab.org/api/1.2/patches/88180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103136.1725804-1-jwakely@redhat.com/","msgid":"<20230427103136.1725804-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:31:36","name":"[committed] libstdc++: Add @headerfile and @since to doxygen comments [PR40380]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103136.1725804-1-jwakely@redhat.com/mbox/"},{"id":88182,"url":"https://patchwork.plctlab.org/api/1.2/patches/88182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103210.1725860-1-jwakely@redhat.com/","msgid":"<20230427103210.1725860-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:32:10","name":"[committed] libstdc++: Improve doxygen docs for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103210.1725860-1-jwakely@redhat.com/mbox/"},{"id":88184,"url":"https://patchwork.plctlab.org/api/1.2/patches/88184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103237.1725914-1-jwakely@redhat.com/","msgid":"<20230427103237.1725914-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:32:37","name":"[committed] libstdc++: Reduce Doxygen output for PDF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103237.1725914-1-jwakely@redhat.com/mbox/"},{"id":88185,"url":"https://patchwork.plctlab.org/api/1.2/patches/88185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103301.1725942-1-jwakely@redhat.com/","msgid":"<20230427103301.1725942-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:33:01","name":"[committed] libstdc++: Remove obsolete options from Doxygen config","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103301.1725942-1-jwakely@redhat.com/mbox/"},{"id":88183,"url":"https://patchwork.plctlab.org/api/1.2/patches/88183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103314.1725986-1-jwakely@redhat.com/","msgid":"<20230427103314.1725986-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T10:33:14","name":"[committed] libstdc++: Fix typos in doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427103314.1725986-1-jwakely@redhat.com/mbox/"},{"id":88198,"url":"https://patchwork.plctlab.org/api/1.2/patches/88198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpXmaFjRBeJA2yp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:08:09","name":"v2: Add targetm.libm_function_max_error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpXmaFjRBeJA2yp@tucnak/mbox/"},{"id":88200,"url":"https://patchwork.plctlab.org/api/1.2/patches/88200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpYvaNqvI7Mfi6u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:13:01","name":"v2: Implement range-op entry for sin/cos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEpYvaNqvI7Mfi6u@tucnak/mbox/"},{"id":88201,"url":"https://patchwork.plctlab.org/api/1.2/patches/88201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111634.1728893-1-jwakely@redhat.com/","msgid":"<20230427111634.1728893-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T11:16:34","name":"doc: Describe behaviour of enums with fixed underlying type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111634.1728893-1-jwakely@redhat.com/mbox/"},{"id":88202,"url":"https://patchwork.plctlab.org/api/1.2/patches/88202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111827.C411F3858425@sourceware.org/","msgid":"<20230427111827.C411F3858425@sourceware.org>","list_archive_url":null,"date":"2023-04-27T11:17:42","name":"Properly gimplify handled component chains on registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427111827.C411F3858425@sourceware.org/mbox/"},{"id":88206,"url":"https://patchwork.plctlab.org/api/1.2/patches/88206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427112219.AC33F3858418@sourceware.org/","msgid":"<20230427112219.AC33F3858418@sourceware.org>","list_archive_url":null,"date":"2023-04-27T11:21:35","name":"wrong GIMPLE from (bit_field_ref CTOR ..) simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427112219.AC33F3858418@sourceware.org/mbox/"},{"id":88213,"url":"https://patchwork.plctlab.org/api/1.2/patches/88213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkj9wnpq.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:48:01","name":"harden-conditionals: detach values before compares","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkj9wnpq.fsf@lxoliva.fsfla.org/mbox/"},{"id":88216,"url":"https://patchwork.plctlab.org/api/1.2/patches/88216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7ctxwnbo.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-04-27T11:56:27","name":"[FYI] Use CONFIG_SHELL-/bin/sh in genmultilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7ctxwnbo.fsf@lxoliva.fsfla.org/mbox/"},{"id":88219,"url":"https://patchwork.plctlab.org/api/1.2/patches/88219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427115948.480747-1-aldyh@redhat.com/","msgid":"<20230427115948.480747-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-04-27T11:59:48","name":"[COMMITTED] Normalize addresses in IPA before calling range_op_handler [PR109639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427115948.480747-1-aldyh@redhat.com/mbox/"},{"id":88226,"url":"https://patchwork.plctlab.org/api/1.2/patches/88226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427121125.CEB753858C66@sourceware.org/","msgid":"<20230427121125.CEB753858C66@sourceware.org>","list_archive_url":null,"date":"2023-04-27T12:10:40","name":"tree-optimization/109170 - bogus use-after-free with __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427121125.CEB753858C66@sourceware.org/mbox/"},{"id":88260,"url":"https://patchwork.plctlab.org/api/1.2/patches/88260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEp46RiMoi1K3wSG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-27T13:30:17","name":"gimple-range-op: Handle sqrt (basic bounds only)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEp46RiMoi1K3wSG@tucnak/mbox/"},{"id":88271,"url":"https://patchwork.plctlab.org/api/1.2/patches/88271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427140106.40452-1-kito.cheng@sifive.com/","msgid":"<20230427140106.40452-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-04-27T14:01:07","name":"[v2] Docs: Add vector register constarint for asm operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427140106.40452-1-kito.cheng@sifive.com/mbox/"},{"id":88278,"url":"https://patchwork.plctlab.org/api/1.2/patches/88278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACofN_76PcS3FbFQL2K2rXKPuov5JaT-jwAMTut0QuwAjN6hGg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-27T14:29:24","name":"RISC-V: Added support clmul[r,h] instructions for Zbc extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACofN_76PcS3FbFQL2K2rXKPuov5JaT-jwAMTut0QuwAjN6hGg@mail.gmail.com/mbox/"},{"id":88281,"url":"https://patchwork.plctlab.org/api/1.2/patches/88281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427143005.1781966-1-pan2.li@intel.com/","msgid":"<20230427143005.1781966-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-27T14:30:05","name":"RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427143005.1781966-1-pan2.li@intel.com/mbox/"},{"id":88292,"url":"https://patchwork.plctlab.org/api/1.2/patches/88292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CS7M946E8DPP.9L3ZEUF7UK3X@x1c10/","msgid":"","list_archive_url":null,"date":"2023-04-27T14:50:01","name":"MAINTAINERS: Change my email address.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CS7M946E8DPP.9L3ZEUF7UK3X@x1c10/mbox/"},{"id":88300,"url":"https://patchwork.plctlab.org/api/1.2/patches/88300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9791b$0d55b960$28012c20$@nextmovesoftware.com/","msgid":"<002001d9791b$0d55b960$28012c20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-27T15:15:05","name":"Synchronize include/ctf.h with upstream binutils/libctf.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9791b$0d55b960$28012c20$@nextmovesoftware.com/mbox/"},{"id":88304,"url":"https://patchwork.plctlab.org/api/1.2/patches/88304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427155842.699173-1-jason@redhat.com/","msgid":"<20230427155842.699173-1-jason@redhat.com>","list_archive_url":null,"date":"2023-04-27T15:58:42","name":"[pushed] c++: print conversion error at candidate location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427155842.699173-1-jason@redhat.com/mbox/"},{"id":88308,"url":"https://patchwork.plctlab.org/api/1.2/patches/88308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-2-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:51","name":"[v5,01/11] RISC-V: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-2-patrick@rivosinc.com/mbox/"},{"id":88314,"url":"https://patchwork.plctlab.org/api/1.2/patches/88314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-3-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:52","name":"[v5,02/11] RISC-V: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-3-patrick@rivosinc.com/mbox/"},{"id":88317,"url":"https://patchwork.plctlab.org/api/1.2/patches/88317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-4-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:53","name":"[v5,03/11] RISC-V: Enforce subword atomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-4-patrick@rivosinc.com/mbox/"},{"id":88310,"url":"https://patchwork.plctlab.org/api/1.2/patches/88310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-5-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:54","name":"[v5,04/11] RISC-V: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-5-patrick@rivosinc.com/mbox/"},{"id":88319,"url":"https://patchwork.plctlab.org/api/1.2/patches/88319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-6-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:55","name":"[v5,05/11] RISC-V: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-6-patrick@rivosinc.com/mbox/"},{"id":88309,"url":"https://patchwork.plctlab.org/api/1.2/patches/88309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-7-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:56","name":"[v5,06/11] RISC-V: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-7-patrick@rivosinc.com/mbox/"},{"id":88312,"url":"https://patchwork.plctlab.org/api/1.2/patches/88312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-8-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:57","name":"[v5,07/11] RISC-V: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-8-patrick@rivosinc.com/mbox/"},{"id":88315,"url":"https://patchwork.plctlab.org/api/1.2/patches/88315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-9-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:58","name":"[v5,08/11] RISC-V: Weaken LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-9-patrick@rivosinc.com/mbox/"},{"id":88318,"url":"https://patchwork.plctlab.org/api/1.2/patches/88318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-10-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:22:59","name":"[v5,09/11] RISC-V: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-10-patrick@rivosinc.com/mbox/"},{"id":88311,"url":"https://patchwork.plctlab.org/api/1.2/patches/88311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-11-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:23:00","name":"[v5,10/11] RISC-V: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-11-patrick@rivosinc.com/mbox/"},{"id":88316,"url":"https://patchwork.plctlab.org/api/1.2/patches/88316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-12-patrick@rivosinc.com/","msgid":"<20230427162301.1151333-12-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-04-27T16:23:01","name":"[v5,11/11] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162301.1151333-12-patrick@rivosinc.com/mbox/"},{"id":88307,"url":"https://patchwork.plctlab.org/api/1.2/patches/88307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162318.118104-1-julian@codesourcery.com/","msgid":"<20230427162318.118104-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T16:23:18","name":"OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427162318.118104-1-julian@codesourcery.com/mbox/"},{"id":88320,"url":"https://patchwork.plctlab.org/api/1.2/patches/88320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com/","msgid":"<32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T16:38:30","name":"[committed] amdgcn: Fix addsub bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c7f0c6-1a92-5c8a-0607-5aaa1929216a@codesourcery.com/mbox/"},{"id":88321,"url":"https://patchwork.plctlab.org/api/1.2/patches/88321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427163956.3051552-1-ppalka@redhat.com/","msgid":"<20230427163956.3051552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-27T16:39:56","name":"c++: NSDMI instantiation from template context [PR109506]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427163956.3051552-1-ppalka@redhat.com/mbox/"},{"id":88362,"url":"https://patchwork.plctlab.org/api/1.2/patches/88362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427183647.99112-1-julian@codesourcery.com/","msgid":"<20230427183647.99112-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-27T18:36:47","name":"OpenACC: Stand-alone attach/detach clause fixes for Fortran [PR109622]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427183647.99112-1-julian@codesourcery.com/mbox/"},{"id":88384,"url":"https://patchwork.plctlab.org/api/1.2/patches/88384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427204610.3403840-1-ppalka@redhat.com/","msgid":"<20230427204610.3403840-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-27T20:46:10","name":"c++: outer args for level-lowered ttp [PR109651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427204610.3403840-1-ppalka@redhat.com/mbox/"},{"id":88396,"url":"https://patchwork.plctlab.org/api/1.2/patches/88396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427222457.1773293-1-jwakely@redhat.com/","msgid":"<20230427222457.1773293-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-27T22:24:57","name":"[committed] libstdc++: Fix error in doxygen comments in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230427222457.1773293-1-jwakely@redhat.com/mbox/"},{"id":88423,"url":"https://patchwork.plctlab.org/api/1.2/patches/88423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428004726.3217666-1-maskray@google.com/","msgid":"<20230428004726.3217666-1-maskray@google.com>","list_archive_url":null,"date":"2023-04-28T00:47:26","name":"i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428004726.3217666-1-maskray@google.com/mbox/"},{"id":88434,"url":"https://patchwork.plctlab.org/api/1.2/patches/88434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428022141.2080-1-lidie@eswincomputing.com/","msgid":"<20230428022141.2080-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-04-28T02:21:41","name":"[RISC-V] Fix riscv_expand_conditional_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428022141.2080-1-lidie@eswincomputing.com/mbox/"},{"id":88436,"url":"https://patchwork.plctlab.org/api/1.2/patches/88436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428024641.3757002-1-pan2.li@intel.com/","msgid":"<20230428024641.3757002-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-28T02:46:41","name":"[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428024641.3757002-1-pan2.li@intel.com/mbox/"},{"id":88442,"url":"https://patchwork.plctlab.org/api/1.2/patches/88442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428032506.655667-1-apinski@marvell.com/","msgid":"<20230428032506.655667-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T03:25:06","name":"[PATCHv2] MATCH: Factor out code that for min max detection with constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428032506.655667-1-apinski@marvell.com/mbox/"},{"id":88443,"url":"https://patchwork.plctlab.org/api/1.2/patches/88443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428033045.655785-1-apinski@marvell.com/","msgid":"<20230428033045.655785-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T03:30:45","name":"PHIOPT: Move two_value_replacement to match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428033045.655785-1-apinski@marvell.com/mbox/"},{"id":88449,"url":"https://patchwork.plctlab.org/api/1.2/patches/88449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-2-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:02","name":"[01/11] riscv: xtheadbb: Add sign/zero extension support for th.ext and th.extu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-2-christoph.muellner@vrull.eu/mbox/"},{"id":88453,"url":"https://patchwork.plctlab.org/api/1.2/patches/88453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-3-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:03","name":"[02/11] riscv: xtheadmempair: Fix CFA reg notes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-3-christoph.muellner@vrull.eu/mbox/"},{"id":88457,"url":"https://patchwork.plctlab.org/api/1.2/patches/88457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-4-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-4-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:04","name":"[03/11] riscv: xtheadmempair: Fix doc for th_mempair_order_operands()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-4-christoph.muellner@vrull.eu/mbox/"},{"id":88450,"url":"https://patchwork.plctlab.org/api/1.2/patches/88450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-5-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-5-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:05","name":"[04/11] riscv: thead: Adjust constraints of th_addsl INSN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-5-christoph.muellner@vrull.eu/mbox/"},{"id":88452,"url":"https://patchwork.plctlab.org/api/1.2/patches/88452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-6-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-6-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:06","name":"[05/11] riscv: Simplify output of MEM addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-6-christoph.muellner@vrull.eu/mbox/"},{"id":88455,"url":"https://patchwork.plctlab.org/api/1.2/patches/88455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-7-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-7-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:07","name":"[06/11] riscv: Define Xmode macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-7-christoph.muellner@vrull.eu/mbox/"},{"id":88454,"url":"https://patchwork.plctlab.org/api/1.2/patches/88454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-8-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-8-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:08","name":"[07/11] riscv: Move address classification info types to riscv-protos.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-8-christoph.muellner@vrull.eu/mbox/"},{"id":88458,"url":"https://patchwork.plctlab.org/api/1.2/patches/88458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-9-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-9-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:09","name":"[08/11] riscv: Prepare backend for index registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-9-christoph.muellner@vrull.eu/mbox/"},{"id":88456,"url":"https://patchwork.plctlab.org/api/1.2/patches/88456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-10-christoph.muellner@vrull.eu/","msgid":"<20230428061210.2988035-10-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:12:10","name":"[09/11] riscv: thead: Factor out XThead*-specific peepholes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428061210.2988035-10-christoph.muellner@vrull.eu/mbox/"},{"id":88462,"url":"https://patchwork.plctlab.org/api/1.2/patches/88462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-1-christoph.muellner@vrull.eu/","msgid":"<20230428062314.2995571-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:23:13","name":"[10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-1-christoph.muellner@vrull.eu/mbox/"},{"id":88461,"url":"https://patchwork.plctlab.org/api/1.2/patches/88461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-2-christoph.muellner@vrull.eu/","msgid":"<20230428062314.2995571-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-04-28T06:23:14","name":"[11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428062314.2995571-2-christoph.muellner@vrull.eu/mbox/"},{"id":88472,"url":"https://patchwork.plctlab.org/api/1.2/patches/88472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com/","msgid":"<0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T07:26:06","name":"[committed] Fortran: Fix (mostly) comment typos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0823ec47-8720-6fae-e359-c11145a21e08@codesourcery.com/mbox/"},{"id":88476,"url":"https://patchwork.plctlab.org/api/1.2/patches/88476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEt3EFFjFUijaFFx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-04-28T07:34:40","name":"libstdc++: Another attempt to ensure g++ 13+ compiled programs enforce gcc 13.2+ libstdc++.so.6 [PR108969]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEt3EFFjFUijaFFx@tucnak/mbox/"},{"id":88534,"url":"https://patchwork.plctlab.org/api/1.2/patches/88534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428090745.435BE3857711@sourceware.org/","msgid":"<20230428090745.435BE3857711@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:06:45","name":"tree-optimization/108752 - vectorize emulated vectors in lowered form","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428090745.435BE3857711@sourceware.org/mbox/"},{"id":88548,"url":"https://patchwork.plctlab.org/api/1.2/patches/88548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094851.5FEE9385771D@sourceware.org/","msgid":"<20230428094851.5FEE9385771D@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:48:01","name":"Avoid more invalid GIMPLE with register bases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094851.5FEE9385771D@sourceware.org/mbox/"},{"id":88549,"url":"https://patchwork.plctlab.org/api/1.2/patches/88549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094928.63E96385771A@sourceware.org/","msgid":"<20230428094928.63E96385771A@sourceware.org>","list_archive_url":null,"date":"2023-04-28T09:48:35","name":"tree-optimization/109644 - missing IL checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428094928.63E96385771A@sourceware.org/mbox/"},{"id":88589,"url":"https://patchwork.plctlab.org/api/1.2/patches/88589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17227-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:38:30","name":"[2/5] match.pd: Remove commented out line pragmas unless -vv is used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17227-tamar@arm.com/mbox/"},{"id":88590,"url":"https://patchwork.plctlab.org/api/1.2/patches/88590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17228-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:39:23","name":"[3/5] match.pd: CSE the dump output check.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17228-tamar@arm.com/mbox/"},{"id":88592,"url":"https://patchwork.plctlab.org/api/1.2/patches/88592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17229-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:40:13","name":"[3/5] genmatch: split shared code to gimple-match-exports.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17229-tamar@arm.com/mbox/"},{"id":88596,"url":"https://patchwork.plctlab.org/api/1.2/patches/88596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17230-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T10:44:15","name":"[5/5] match.pd: Use splits in makefile and make configurable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17230-tamar@arm.com/mbox/"},{"id":88606,"url":"https://patchwork.plctlab.org/api/1.2/patches/88606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-1-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:53","name":"[01/10] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-1-andrea.corallo@arm.com/mbox/"},{"id":88609,"url":"https://patchwork.plctlab.org/api/1.2/patches/88609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-2-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:54","name":"[02/10] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-2-andrea.corallo@arm.com/mbox/"},{"id":88607,"url":"https://patchwork.plctlab.org/api/1.2/patches/88607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-4-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-4-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:56","name":"[04/10] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-4-andrea.corallo@arm.com/mbox/"},{"id":88603,"url":"https://patchwork.plctlab.org/api/1.2/patches/88603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-5-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-5-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:57","name":"[05/10] arm: Add vorrq_n overloading into vorrq _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-5-andrea.corallo@arm.com/mbox/"},{"id":88602,"url":"https://patchwork.plctlab.org/api/1.2/patches/88602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-6-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-6-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:29:58","name":"[06/10] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-6-andrea.corallo@arm.com/mbox/"},{"id":88608,"url":"https://patchwork.plctlab.org/api/1.2/patches/88608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-8-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-8-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:00","name":"[08/10] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-8-andrea.corallo@arm.com/mbox/"},{"id":88604,"url":"https://patchwork.plctlab.org/api/1.2/patches/88604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-9-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-9-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:01","name":"[09/10] arm testsuite: XFAIL or relax registers in some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-9-andrea.corallo@arm.com/mbox/"},{"id":88610,"url":"https://patchwork.plctlab.org/api/1.2/patches/88610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-10-andrea.corallo@arm.com/","msgid":"<20230428113002.482343-10-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-04-28T11:30:02","name":"[10/10] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113002.482343-10-andrea.corallo@arm.com/mbox/"},{"id":88611,"url":"https://patchwork.plctlab.org/api/1.2/patches/88611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113621.942273853823@sourceware.org/","msgid":"<20230428113621.942273853823@sourceware.org>","list_archive_url":null,"date":"2023-04-28T11:35:35","name":"ipa/109652 - ICE in modification phase of IPA SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428113621.942273853823@sourceware.org/mbox/"},{"id":88615,"url":"https://patchwork.plctlab.org/api/1.2/patches/88615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120748.1906656-1-jwakely@redhat.com/","msgid":"<20230428120748.1906656-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:07:48","name":"[committed] libstdc++: Simplify preprocessor/namespace nesting in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120748.1906656-1-jwakely@redhat.com/mbox/"},{"id":88618,"url":"https://patchwork.plctlab.org/api/1.2/patches/88618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120755.1906678-1-jwakely@redhat.com/","msgid":"<20230428120755.1906678-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:07:55","name":"[committed] libstdc++: Strip absolute paths from files shown in Doxygen docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120755.1906678-1-jwakely@redhat.com/mbox/"},{"id":88616,"url":"https://patchwork.plctlab.org/api/1.2/patches/88616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120800.1906699-1-jwakely@redhat.com/","msgid":"<20230428120800.1906699-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:08:00","name":"[committed] libstdc++: Minor fixes to doxygen comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120800.1906699-1-jwakely@redhat.com/mbox/"},{"id":88617,"url":"https://patchwork.plctlab.org/api/1.2/patches/88617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120805.1906718-1-jwakely@redhat.com/","msgid":"<20230428120805.1906718-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-04-28T12:08:05","name":"[committed] libstdc++: Improve doxygen docs for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428120805.1906718-1-jwakely@redhat.com/mbox/"},{"id":88631,"url":"https://patchwork.plctlab.org/api/1.2/patches/88631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOFDQ6mAF9hM=ZdMFqNDvSJ5J9-HaQ861jzLMnMH3m3Qw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:29:38","name":"RISC-V: Eliminate redundant zero extension of minu/maxu operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOFDQ6mAF9hM=ZdMFqNDvSJ5J9-HaQ861jzLMnMH3m3Qw@mail.gmail.com/mbox/"},{"id":88632,"url":"https://patchwork.plctlab.org/api/1.2/patches/88632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428123327.686353-1-yunqiang.su@cipunited.com/","msgid":"<20230428123327.686353-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-04-28T12:33:27","name":"MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428123327.686353-1-yunqiang.su@cipunited.com/mbox/"},{"id":88635,"url":"https://patchwork.plctlab.org/api/1.2/patches/88635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dec3ac9c-d107-441e-ee0c-a4d43cd70150@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:36:59","name":"[1/3] Refactor to allow internal_fn'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dec3ac9c-d107-441e-ee0c-a4d43cd70150@arm.com/mbox/"},{"id":88637,"url":"https://patchwork.plctlab.org/api/1.2/patches/88637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c739df-eba4-e0e6-b59e-4d6ecc7511e9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:37:14","name":"[2/3] Refactor widen_plus as internal_fn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c739df-eba4-e0e6-b59e-4d6ecc7511e9@arm.com/mbox/"},{"id":88634,"url":"https://patchwork.plctlab.org/api/1.2/patches/88634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17b337e-369a-e78e-e065-94845dc8b0d4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:37:27","name":"[3/3] Remove widen_plus/minus_expr tree codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b17b337e-369a-e78e-e065-94845dc8b0d4@arm.com/mbox/"},{"id":88636,"url":"https://patchwork.plctlab.org/api/1.2/patches/88636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428124232.CFF443889E20@sourceware.org/","msgid":"<20230428124232.CFF443889E20@sourceware.org>","list_archive_url":null,"date":"2023-04-28T12:41:43","name":"Add emulated scatter capability to the vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428124232.CFF443889E20@sourceware.org/mbox/"},{"id":88638,"url":"https://patchwork.plctlab.org/api/1.2/patches/88638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEvChfzMa0IotL/h@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-04-28T12:56:37","name":"[v2] GCC-13/changes: Add note about iostream usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZEvChfzMa0IotL/h@redhat.com/mbox/"},{"id":88644,"url":"https://patchwork.plctlab.org/api/1.2/patches/88644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428131249.713463-1-yunqiang.su@cipunited.com/","msgid":"<20230428131249.713463-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-04-28T13:12:49","name":"[v2] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428131249.713463-1-yunqiang.su@cipunited.com/mbox/"},{"id":88657,"url":"https://patchwork.plctlab.org/api/1.2/patches/88657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz/","msgid":"<9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz>","list_archive_url":null,"date":"2023-04-28T14:42:10","name":"[(pushed)] contrib: port doxygen script to Python3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9eccd16e-e69e-75aa-b1d7-09ae311bcb66@suse.cz/mbox/"},{"id":88664,"url":"https://patchwork.plctlab.org/api/1.2/patches/88664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428152102.1653600-1-pan2.li@intel.com/","msgid":"<20230428152102.1653600-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-28T15:21:02","name":"RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428152102.1653600-1-pan2.li@intel.com/mbox/"},{"id":88678,"url":"https://patchwork.plctlab.org/api/1.2/patches/88678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428155829.F20D120438@pchp3.se.axis.com/","msgid":"<20230428155829.F20D120438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-04-28T15:58:29","name":"testsuite: Handle empty assembly lines in check-function-bodies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428155829.F20D120438@pchp3.se.axis.com/mbox/"},{"id":88680,"url":"https://patchwork.plctlab.org/api/1.2/patches/88680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com/","msgid":"<46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com>","list_archive_url":null,"date":"2023-04-28T16:10:07","name":"riscv: Allow vector constants in riscv_const_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46ca12b2-8ac6-030e-92dc-6b71ab2d4ee8@gmail.com/mbox/"},{"id":88684,"url":"https://patchwork.plctlab.org/api/1.2/patches/88684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-2-apinski@marvell.com/","msgid":"<20230428170213.677572-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T17:02:12","name":"[1/2] PHIOPT: Allow moving of some builtin calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-2-apinski@marvell.com/mbox/"},{"id":88685,"url":"https://patchwork.plctlab.org/api/1.2/patches/88685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-3-apinski@marvell.com/","msgid":"<20230428170213.677572-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T17:02:13","name":"[2/2] MATCH: add some of what phiopt'\''s builtin_zero_pattern did","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428170213.677572-3-apinski@marvell.com/mbox/"},{"id":88690,"url":"https://patchwork.plctlab.org/api/1.2/patches/88690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428174524.1006324-1-mikpelinux@gmail.com/","msgid":"<20230428174524.1006324-1-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-04-28T17:45:24","name":"add glibc-stdint.h to vax and lm32 linux target (PR target/105525)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428174524.1006324-1-mikpelinux@gmail.com/mbox/"},{"id":88700,"url":"https://patchwork.plctlab.org/api/1.2/patches/88700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428190508.4091082-1-ppalka@redhat.com/","msgid":"<20230428190508.4091082-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-04-28T19:05:08","name":"c++: RESULT_DECL replacement in constexpr call result [PR105440]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428190508.4091082-1-ppalka@redhat.com/mbox/"},{"id":88709,"url":"https://patchwork.plctlab.org/api/1.2/patches/88709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428194910.18611-1-palmer@rivosinc.com/","msgid":"<20230428194910.18611-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-04-28T19:49:10","name":"WIP: All the -march documentation I got around to writing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428194910.18611-1-palmer@rivosinc.com/mbox/"},{"id":88756,"url":"https://patchwork.plctlab.org/api/1.2/patches/88756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6sz66xx.fsf@oldenburg.str.redhat.com/","msgid":"<87h6sz66xx.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-04-28T21:19:22","name":"libstdc++: Mention recent libgcc_s symbol versions in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6sz66xx.fsf@oldenburg.str.redhat.com/mbox/"},{"id":88770,"url":"https://patchwork.plctlab.org/api/1.2/patches/88770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-2-sandra@codesourcery.com/","msgid":"<20230428232254.628185-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:52","name":"[1/3] OpenMP: C support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-2-sandra@codesourcery.com/mbox/"},{"id":88771,"url":"https://patchwork.plctlab.org/api/1.2/patches/88771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-3-sandra@codesourcery.com/","msgid":"<20230428232254.628185-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:53","name":"[2/3] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-3-sandra@codesourcery.com/mbox/"},{"id":88772,"url":"https://patchwork.plctlab.org/api/1.2/patches/88772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-4-sandra@codesourcery.com/","msgid":"<20230428232254.628185-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-04-28T23:22:54","name":"[3/3] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428232254.628185-4-sandra@codesourcery.com/mbox/"},{"id":88774,"url":"https://patchwork.plctlab.org/api/1.2/patches/88774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428233446.688570-1-apinski@marvell.com/","msgid":"<20230428233446.688570-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-28T23:34:46","name":"target: [PR109657] (a ? -1 : 0) | b could be optimized better for aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230428233446.688570-1-apinski@marvell.com/mbox/"},{"id":88860,"url":"https://patchwork.plctlab.org/api/1.2/patches/88860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-2-arsen@aarsen.me/","msgid":"<20230429101640.1697750-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-29T10:16:39","name":"[1/2] libstdc++: Implement more maintainable header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-2-arsen@aarsen.me/mbox/"},{"id":88861,"url":"https://patchwork.plctlab.org/api/1.2/patches/88861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-3-arsen@aarsen.me/","msgid":"<20230429101640.1697750-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-04-29T10:16:40","name":"[2/2] libstdc++: Replace all manual FTM definitions and use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429101640.1697750-3-arsen@aarsen.me/mbox/"},{"id":88869,"url":"https://patchwork.plctlab.org/api/1.2/patches/88869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105741.108576-1-julian@codesourcery.com/","msgid":"<20230429105741.108576-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-04-29T10:57:41","name":"OpenACC: Further attach/detach clause fixes for Fortran [PR109622]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105741.108576-1-julian@codesourcery.com/mbox/"},{"id":88870,"url":"https://patchwork.plctlab.org/api/1.2/patches/88870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105959.23211-1-gaofei@eswincomputing.com/","msgid":"<20230429105959.23211-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-04-29T10:59:59","name":"[V2] RISC-V: decouple stack allocation for rv32e w/o save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429105959.23211-1-gaofei@eswincomputing.com/mbox/"},{"id":88874,"url":"https://patchwork.plctlab.org/api/1.2/patches/88874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429133250.3789188-1-pan2.li@intel.com/","msgid":"<20230429133250.3789188-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-04-29T13:32:50","name":"[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230429133250.3789188-1-pan2.li@intel.com/mbox/"},{"id":88882,"url":"https://patchwork.plctlab.org/api/1.2/patches/88882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com/","msgid":"<3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com>","list_archive_url":null,"date":"2023-04-29T16:21:20","name":"[committed,PR,target/109549] Adjust mips test for recent ifcvt costing changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3370f73f-51d8-bd79-302f-d0593cebe832@ventanamicro.com/mbox/"},{"id":88884,"url":"https://patchwork.plctlab.org/api/1.2/patches/88884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com/","msgid":"<004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-29T16:24:13","name":"[xstormy16] Recognize/support swpn (swap nibbles) instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d97ab7$0a1989f0$1e4c9dd0$@nextmovesoftware.com/mbox/"},{"id":88885,"url":"https://patchwork.plctlab.org/api/1.2/patches/88885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com/","msgid":"<004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-29T16:25:48","name":"[xstormy16] Efficient HImode rotate left by a single bit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004a01d97ab7$42722140$c75663c0$@nextmovesoftware.com/mbox/"},{"id":88899,"url":"https://patchwork.plctlab.org/api/1.2/patches/88899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZE3LpThCgIob9yHG@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-04-30T02:00:05","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZE3LpThCgIob9yHG@Thaum.localdomain/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-04/mbox/"},{"id":21,"url":"https://patchwork.plctlab.org/api/1.2/bundles/21/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-05/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-05","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":88946,"url":"https://patchwork.plctlab.org/api/1.2/patches/88946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a824a5-a7eb-91db-a2fe-01e24bd47cd1@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-04-30T19:31:41","name":"[(pushed)] libsanitizer: link hwasan against lsan library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a824a5-a7eb-91db-a2fe-01e24bd47cd1@suse.cz/mbox/"},{"id":88948,"url":"https://patchwork.plctlab.org/api/1.2/patches/88948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04283010-e7bc-5d28-9eec-4a316799c440@suse.cz/","msgid":"<04283010-e7bc-5d28-9eec-4a316799c440@suse.cz>","list_archive_url":null,"date":"2023-04-30T19:40:24","name":"[(pushed)] hwasan: adjust wording in expected output in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04283010-e7bc-5d28-9eec-4a316799c440@suse.cz/mbox/"},{"id":88955,"url":"https://patchwork.plctlab.org/api/1.2/patches/88955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211248.761908-1-apinski@marvell.com/","msgid":"<20230430211248.761908-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:12:48","name":"MATCH: Port CLRSB part of builtin_zero_pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211248.761908-1-apinski@marvell.com/mbox/"},{"id":88956,"url":"https://patchwork.plctlab.org/api/1.2/patches/88956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211330.761973-1-apinski@marvell.com/","msgid":"<20230430211330.761973-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:13:30","name":"PHIOPT: small refactoring of match_simplify_replacement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211330.761973-1-apinski@marvell.com/mbox/"},{"id":88957,"url":"https://patchwork.plctlab.org/api/1.2/patches/88957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211356.762030-1-apinski@marvell.com/","msgid":"<20230430211356.762030-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-04-30T21:13:56","name":"PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230430211356.762030-1-apinski@marvell.com/mbox/"},{"id":88960,"url":"https://patchwork.plctlab.org/api/1.2/patches/88960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com/","msgid":"<001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-04-30T22:53:46","name":"[Committed] Update xstormy16'\''s neghi2 pattern to not clobber the carry flag.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001901d97bb6$a001ff10$e005fd30$@nextmovesoftware.com/mbox/"},{"id":88972,"url":"https://patchwork.plctlab.org/api/1.2/patches/88972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-1-aldyh@redhat.com/","msgid":"<20230501062906.564803-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:55","name":"[COMMITTED] vrange_storage overhaul","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-1-aldyh@redhat.com/mbox/"},{"id":88970,"url":"https://patchwork.plctlab.org/api/1.2/patches/88970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-2-aldyh@redhat.com/","msgid":"<20230501062906.564803-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:56","name":"[COMMITTED] Remove irange::{min,max,kind}.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-2-aldyh@redhat.com/mbox/"},{"id":88969,"url":"https://patchwork.plctlab.org/api/1.2/patches/88969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-3-aldyh@redhat.com/","msgid":"<20230501062906.564803-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:57","name":"[COMMITTED] Remove irange::tree_{lower,upper}_bound.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-3-aldyh@redhat.com/mbox/"},{"id":88971,"url":"https://patchwork.plctlab.org/api/1.2/patches/88971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-4-aldyh@redhat.com/","msgid":"<20230501062906.564803-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:58","name":"[COMMITTED] Various cleanups in vr-values.cc towards ranger API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-4-aldyh@redhat.com/mbox/"},{"id":88977,"url":"https://patchwork.plctlab.org/api/1.2/patches/88977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-5-aldyh@redhat.com/","msgid":"<20230501062906.564803-5-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:28:59","name":"[COMMITTED] Convert get_legacy_range in bounds_of_var_in_loop to irange API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-5-aldyh@redhat.com/mbox/"},{"id":88974,"url":"https://patchwork.plctlab.org/api/1.2/patches/88974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-6-aldyh@redhat.com/","msgid":"<20230501062906.564803-6-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:00","name":"[COMMITTED] Merge irange::union/intersect into irange_union/intersect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-6-aldyh@redhat.com/mbox/"},{"id":88980,"url":"https://patchwork.plctlab.org/api/1.2/patches/88980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-7-aldyh@redhat.com/","msgid":"<20230501062906.564803-7-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:01","name":"[COMMITTED] Conversion to irange wide_int API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-7-aldyh@redhat.com/mbox/"},{"id":88975,"url":"https://patchwork.plctlab.org/api/1.2/patches/88975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-8-aldyh@redhat.com/","msgid":"<20230501062906.564803-8-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:02","name":"[COMMITTED] Replace vrp_val* with wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-8-aldyh@redhat.com/mbox/"},{"id":88978,"url":"https://patchwork.plctlab.org/api/1.2/patches/88978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-9-aldyh@redhat.com/","msgid":"<20230501062906.564803-9-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:03","name":"[COMMITTED] Rewrite bounds_of_var_in_loop() to use ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-9-aldyh@redhat.com/mbox/"},{"id":88976,"url":"https://patchwork.plctlab.org/api/1.2/patches/88976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-10-aldyh@redhat.com/","msgid":"<20230501062906.564803-10-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:04","name":"[COMMITTED] Convert internal representation of irange to wide_ints.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-10-aldyh@redhat.com/mbox/"},{"id":88973,"url":"https://patchwork.plctlab.org/api/1.2/patches/88973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-11-aldyh@redhat.com/","msgid":"<20230501062906.564803-11-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:05","name":"[COMMITTED] Cleanup irange::set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-11-aldyh@redhat.com/mbox/"},{"id":88979,"url":"https://patchwork.plctlab.org/api/1.2/patches/88979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-12-aldyh@redhat.com/","msgid":"<20230501062906.564803-12-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:29:06","name":"[COMMITTED] Inline irange::set_nonzero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501062906.564803-12-aldyh@redhat.com/mbox/"},{"id":88981,"url":"https://patchwork.plctlab.org/api/1.2/patches/88981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501064655.588111-1-aldyh@redhat.com/","msgid":"<20230501064655.588111-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-01T06:46:55","name":"[COMMITTED] Remove unused friends in int_range<>.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501064655.588111-1-aldyh@redhat.com/mbox/"},{"id":88984,"url":"https://patchwork.plctlab.org/api/1.2/patches/88984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501081901.386194-1-dimitar@dinux.eu/","msgid":"<20230501081901.386194-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-05-01T08:19:01","name":"[committed] libgcc pru: Define TARGET_HAS_NO_HW_DIVIDE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501081901.386194-1-dimitar@dinux.eu/mbox/"},{"id":89047,"url":"https://patchwork.plctlab.org/api/1.2/patches/89047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com/","msgid":"<91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com>","list_archive_url":null,"date":"2023-05-01T13:21:59","name":"[committed] Enable LRA on several ports","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91be1ec3-de85-04cc-0d9f-d3aa69f075dc@ventanamicro.com/mbox/"},{"id":89048,"url":"https://patchwork.plctlab.org/api/1.2/patches/89048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com/","msgid":"<0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com>","list_archive_url":null,"date":"2023-05-01T13:42:25","name":"[committed] Convert xstormy16 to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0beb8b43-2acf-6dcc-7a10-4f2a415c6f6d@gmail.com/mbox/"},{"id":89080,"url":"https://patchwork.plctlab.org/api/1.2/patches/89080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501161037.614414-1-patrick@rivosinc.com/","msgid":"<20230501161037.614414-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-01T16:10:37","name":"RISC-V: Name newly added flags in changelog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501161037.614414-1-patrick@rivosinc.com/mbox/"},{"id":89081,"url":"https://patchwork.plctlab.org/api/1.2/patches/89081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ce8b7413-8aa1-46d7-b361-5fc943e01d23-1682958599603@3c-app-gmx-bap68/","msgid":"","list_archive_url":null,"date":"2023-05-01T16:29:59","name":"Fortran: overloading of intrinsic binary operators [PR109641]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ce8b7413-8aa1-46d7-b361-5fc943e01d23-1682958599603@3c-app-gmx-bap68/mbox/"},{"id":89082,"url":"https://patchwork.plctlab.org/api/1.2/patches/89082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501163700.797083-1-apinski@marvell.com/","msgid":"<20230501163700.797083-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-01T16:37:00","name":"PHIOPT: Update comment about what the pass now does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501163700.797083-1-apinski@marvell.com/mbox/"},{"id":89168,"url":"https://patchwork.plctlab.org/api/1.2/patches/89168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-1-ppalka@redhat.com/","msgid":"<20230501195902.1915703-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-01T19:59:01","name":"[1/2] c++: potentiality of templated memfn call [PR109480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-1-ppalka@redhat.com/mbox/"},{"id":89167,"url":"https://patchwork.plctlab.org/api/1.2/patches/89167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-2-ppalka@redhat.com/","msgid":"<20230501195902.1915703-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-01T19:59:02","name":"[2/2] c++: non-dep init folding and access checking [PR109480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501195902.1915703-2-ppalka@redhat.com/mbox/"},{"id":89176,"url":"https://patchwork.plctlab.org/api/1.2/patches/89176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501205454.1627105-1-jason@redhat.com/","msgid":"<20230501205454.1627105-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-01T20:54:54","name":"[pushed] c++: array DMI and member fn [PR109666]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501205454.1627105-1-jason@redhat.com/mbox/"},{"id":89185,"url":"https://patchwork.plctlab.org/api/1.2/patches/89185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501215112.432409-1-polacek@redhat.com/","msgid":"<20230501215112.432409-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-01T21:51:12","name":"[pushed] ubsan: ubsan_maybe_instrument_array_ref tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501215112.432409-1-polacek@redhat.com/mbox/"},{"id":89207,"url":"https://patchwork.plctlab.org/api/1.2/patches/89207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501235412.451394-1-polacek@redhat.com/","msgid":"<20230501235412.451394-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-01T23:54:12","name":"c++: Move -Wdangling-reference to -Wextra [PR109642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230501235412.451394-1-polacek@redhat.com/mbox/"},{"id":89266,"url":"https://patchwork.plctlab.org/api/1.2/patches/89266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDE8+OaQ1x9YiyU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:08:19","name":"i386: Fix up handling of debug insns in STV [PR109676]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDE8+OaQ1x9YiyU@tucnak/mbox/"},{"id":89284,"url":"https://patchwork.plctlab.org/api/1.2/patches/89284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNAlHXg0CHx6Os@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:42:42","name":"libstdc++: Shut up -Wattribute-alias warning [PR109694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNAlHXg0CHx6Os@tucnak/mbox/"},{"id":89286,"url":"https://patchwork.plctlab.org/api/1.2/patches/89286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNkV3au6VQsVGK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T08:45:05","name":"libstdc++: Regenerate baseline_symbols.txt files for Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFDNkV3au6VQsVGK@tucnak/mbox/"},{"id":89300,"url":"https://patchwork.plctlab.org/api/1.2/patches/89300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095602.D2A9B3858C74@sourceware.org/","msgid":"<20230502095602.D2A9B3858C74@sourceware.org>","list_archive_url":null,"date":"2023-05-02T09:55:17","name":"[i386] Fix testcases for emulated scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095602.D2A9B3858C74@sourceware.org/mbox/"},{"id":89301,"url":"https://patchwork.plctlab.org/api/1.2/patches/89301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095712.955103857341@sourceware.org/","msgid":"<20230502095712.955103857341@sourceware.org>","list_archive_url":null,"date":"2023-05-02T09:56:28","name":"tree-optimization/109672 - properly check emulated plus during vect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502095712.955103857341@sourceware.org/mbox/"},{"id":89330,"url":"https://patchwork.plctlab.org/api/1.2/patches/89330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502122155.2576725-1-romain.naour@gmail.com/","msgid":"<20230502122155.2576725-1-romain.naour@gmail.com>","list_archive_url":null,"date":"2023-05-02T12:21:55","name":"RISC-V: fix build issue with gcc 4.9.x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502122155.2576725-1-romain.naour@gmail.com/mbox/"},{"id":89343,"url":"https://patchwork.plctlab.org/api/1.2/patches/89343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz/","msgid":"<9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz>","list_archive_url":null,"date":"2023-05-02T12:36:07","name":"[(pushed)] docs: port documentation of VRP params","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fa34cf8-4d1b-bd02-6757-cae0d07be888@suse.cz/mbox/"},{"id":89344,"url":"https://patchwork.plctlab.org/api/1.2/patches/89344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502125003.1967323-1-ppalka@redhat.com/","msgid":"<20230502125003.1967323-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-02T12:50:03","name":"[pushed] c++: Add testcase for already fixed PR [PR109506]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502125003.1967323-1-ppalka@redhat.com/mbox/"},{"id":89396,"url":"https://patchwork.plctlab.org/api/1.2/patches/89396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de/","msgid":"<1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de>","list_archive_url":null,"date":"2023-05-02T14:32:05","name":"release the sorted FDE array when deregistering a frame [PR109685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f18e946-c88f-f5dc-92d3-6b7171fcc626@in.tum.de/mbox/"},{"id":89397,"url":"https://patchwork.plctlab.org/api/1.2/patches/89397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502144504.14654-1-amonakov@ispras.ru/","msgid":"<20230502144504.14654-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-02T14:45:04","name":"do not tailcall __sanitizer_cov_trace_pc [PR90746]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502144504.14654-1-amonakov@ispras.ru/mbox/"},{"id":89403,"url":"https://patchwork.plctlab.org/api/1.2/patches/89403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFEp73Ks9fKJ0tiW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-02T15:19:11","name":"c++: Fix up VEC_INIT_EXPR gimplification after r12-7069","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFEp73Ks9fKJ0tiW@tucnak/mbox/"},{"id":89407,"url":"https://patchwork.plctlab.org/api/1.2/patches/89407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d481896de5fbe840039ad944da9bdd1ae69a78cc.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-02T15:52:19","name":"rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d481896de5fbe840039ad944da9bdd1ae69a78cc.camel@us.ibm.com/mbox/"},{"id":89443,"url":"https://patchwork.plctlab.org/api/1.2/patches/89443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-1-jason@redhat.com/","msgid":"<20230502202525.1964821-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:25:24","name":"[1/2] c++: std::variant slow to compile [PR109678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-1-jason@redhat.com/mbox/"},{"id":89444,"url":"https://patchwork.plctlab.org/api/1.2/patches/89444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-2-jason@redhat.com/","msgid":"<20230502202525.1964821-2-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:25:25","name":"[2/2] c++: look for empty base at specific offset [PR109678]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202525.1964821-2-jason@redhat.com/mbox/"},{"id":89445,"url":"https://patchwork.plctlab.org/api/1.2/patches/89445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202623.1965601-1-jason@redhat.com/","msgid":"<20230502202623.1965601-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T20:26:23","name":"[pushed] c++: less invalidate_class_lookup_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202623.1965601-1-jason@redhat.com/mbox/"},{"id":89446,"url":"https://patchwork.plctlab.org/api/1.2/patches/89446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202838.1098272-1-patrick@rivosinc.com/","msgid":"<20230502202838.1098272-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-02T20:28:38","name":"[Committed,11/11] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502202838.1098272-1-patrick@rivosinc.com/mbox/"},{"id":89460,"url":"https://patchwork.plctlab.org/api/1.2/patches/89460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502211310.220156-1-ppalka@redhat.com/","msgid":"<20230502211310.220156-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-02T21:13:10","name":"c++: satisfaction of non-dep member alias template-id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502211310.220156-1-ppalka@redhat.com/mbox/"},{"id":89463,"url":"https://patchwork.plctlab.org/api/1.2/patches/89463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502214559.868243-1-apinski@marvell.com/","msgid":"<20230502214559.868243-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-02T21:45:59","name":"[COMMITTED] tree-optimization: [PR109702] MATCH: Fix a ? func(a) : N patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502214559.868243-1-apinski@marvell.com/mbox/"},{"id":89488,"url":"https://patchwork.plctlab.org/api/1.2/patches/89488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502225251.1990129-1-jason@redhat.com/","msgid":"<20230502225251.1990129-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-02T22:52:51","name":"[pushed] c++: simplify member template substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502225251.1990129-1-jason@redhat.com/mbox/"},{"id":89514,"url":"https://patchwork.plctlab.org/api/1.2/patches/89514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231015.56181-1-polacek@redhat.com/","msgid":"<20230502231015.56181-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-02T23:10:15","name":"c++: wrong std::is_convertible with cv-qual fn [PR109680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231015.56181-1-polacek@redhat.com/mbox/"},{"id":89515,"url":"https://patchwork.plctlab.org/api/1.2/patches/89515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231417.872953-1-apinski@marvell.com/","msgid":"<20230502231417.872953-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-02T23:14:17","name":"Add stats to simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230502231417.872953-1-apinski@marvell.com/mbox/"},{"id":89539,"url":"https://patchwork.plctlab.org/api/1.2/patches/89539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503021713.1146069-2-tchaikov@gmail.com/","msgid":"<20230503021713.1146069-2-tchaikov@gmail.com>","list_archive_url":null,"date":"2023-05-03T02:17:13","name":"[v2,1/1] libstdc++: Set _M_string_length before calling _M_dispose() [PR109703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503021713.1146069-2-tchaikov@gmail.com/mbox/"},{"id":89541,"url":"https://patchwork.plctlab.org/api/1.2/patches/89541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-1-apinski@marvell.com/","msgid":"<20230503023050.880728-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T02:30:49","name":"[1/2] Factor out copy_phi_args from gimple_duplicate_sese_tail and remove_forwarder_block.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-1-apinski@marvell.com/mbox/"},{"id":89542,"url":"https://patchwork.plctlab.org/api/1.2/patches/89542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-2-apinski@marvell.com/","msgid":"<20230503023050.880728-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T02:30:50","name":"[2/2] PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503023050.880728-2-apinski@marvell.com/mbox/"},{"id":89557,"url":"https://patchwork.plctlab.org/api/1.2/patches/89557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503043023.2076907-1-jason@redhat.com/","msgid":"<20230503043023.2076907-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-03T04:30:23","name":"[pushed] c++: fix TTP level reduction cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503043023.2076907-1-jason@redhat.com/mbox/"},{"id":89662,"url":"https://patchwork.plctlab.org/api/1.2/patches/89662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14c76dc-af6a-78f7-4ae8-99f9b2c1a4c5@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-05-03T09:17:52","name":"[(pushed)] clang warning: warning: private field '\''m_gc'\'' is not used [-Wunused-private-field]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e14c76dc-af6a-78f7-4ae8-99f9b2c1a4c5@suse.cz/mbox/"},{"id":89680,"url":"https://patchwork.plctlab.org/api/1.2/patches/89680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503101310.143791331F@imap2.suse-dmz.suse.de/","msgid":"<20230503101310.143791331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T10:13:09","name":"[GCC,11] tree-optimization/109473 - fix type mismatch in reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503101310.143791331F@imap2.suse-dmz.suse.de/mbox/"},{"id":89701,"url":"https://patchwork.plctlab.org/api/1.2/patches/89701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7ctp4rbz.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-05-03T10:55:28","name":"riscv: Don'\''t add -latomic with -pthread","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvm7ctp4rbz.fsf@suse.de/mbox/"},{"id":89712,"url":"https://patchwork.plctlab.org/api/1.2/patches/89712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y99d5rt.fsf@euler.schwinge.homeip.net/","msgid":"<875y99d5rt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-03T11:16:22","name":"Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''torture-init'\'' the '\''LTO_TORTURE_OPTIONS'\'' (was: Update testsuite to run with slim LTO)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y99d5rt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":89720,"url":"https://patchwork.plctlab.org/api/1.2/patches/89720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503114145.662934-1-aldyh@redhat.com/","msgid":"<20230503114145.662934-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-03T11:41:45","name":"Remove type from vrange_storage::equal_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503114145.662934-1-aldyh@redhat.com/mbox/"},{"id":89738,"url":"https://patchwork.plctlab.org/api/1.2/patches/89738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com/","msgid":"<25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com>","list_archive_url":null,"date":"2023-05-03T12:34:38","name":"[10/10] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25eeca56-2d5e-07f6-704f-7163faebb5b1@arm.com/mbox/"},{"id":89740,"url":"https://patchwork.plctlab.org/api/1.2/patches/89740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125824.813C913584@imap2.suse-dmz.suse.de/","msgid":"<20230503125824.813C913584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T12:58:24","name":"More last_stmt removal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125824.813C913584@imap2.suse-dmz.suse.de/mbox/"},{"id":89741,"url":"https://patchwork.plctlab.org/api/1.2/patches/89741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125847.D146213584@imap2.suse-dmz.suse.de/","msgid":"<20230503125847.D146213584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-03T12:58:47","name":"Rename last_stmt to last_nondebug_stmt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503125847.D146213584@imap2.suse-dmz.suse.de/mbox/"},{"id":89753,"url":"https://patchwork.plctlab.org/api/1.2/patches/89753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503135043.273442-1-ppalka@redhat.com/","msgid":"<20230503135043.273442-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-03T13:50:43","name":"c++: ahead of time variable template-id coercion [PR89442]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503135043.273442-1-ppalka@redhat.com/mbox/"},{"id":89768,"url":"https://patchwork.plctlab.org/api/1.2/patches/89768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz/","msgid":"<0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz>","list_archive_url":null,"date":"2023-05-03T14:37:07","name":"[(pushed)] riscv: fix error: control reaches end of non-void function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b97cf28-e833-bc0c-28f1-4c6e08a38df7@suse.cz/mbox/"},{"id":89769,"url":"https://patchwork.plctlab.org/api/1.2/patches/89769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503143709.50270-1-christophe.lyon@arm.com/","msgid":"<20230503143709.50270-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-03T14:37:09","name":"[v2,03/22] arm: [MVE intrinsics] Rework vreinterpretq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503143709.50270-1-christophe.lyon@arm.com/mbox/"},{"id":89775,"url":"https://patchwork.plctlab.org/api/1.2/patches/89775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com/","msgid":"<77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-03T15:30:14","name":"rs6000: vec_cmpne confusing implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77735edd316c9aacaf33698825bf22b005ae6d4d.camel@us.ibm.com/mbox/"},{"id":89783,"url":"https://patchwork.plctlab.org/api/1.2/patches/89783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qjxuzs6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-03T16:48:25","name":"[1/2] aarch64: Rename abi_break parameters [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qjxuzs6.fsf@arm.com/mbox/"},{"id":89784,"url":"https://patchwork.plctlab.org/api/1.2/patches/89784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8h9tl72.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-03T16:48:49","name":"[2/2] aarch64: Fix ABI handling of aligned enums [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8h9tl72.fsf@arm.com/mbox/"},{"id":89798,"url":"https://patchwork.plctlab.org/api/1.2/patches/89798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171612.687750-1-aldyh@redhat.com/","msgid":"<20230503171612.687750-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-03T17:16:12","name":"[COMMITTED] Allow varying ranges of unknown types in irange::verify_range [PR109711]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171612.687750-1-aldyh@redhat.com/mbox/"},{"id":89802,"url":"https://patchwork.plctlab.org/api/1.2/patches/89802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171922.1120098-1-patrick@rivosinc.com/","msgid":"<20230503171922.1120098-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-03T17:19:22","name":"[gcc13,backport] RISCV: Inline subword atomic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503171922.1120098-1-patrick@rivosinc.com/mbox/"},{"id":89823,"url":"https://patchwork.plctlab.org/api/1.2/patches/89823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKrSMd4ERX2hWsy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-03T18:43:20","name":"libstdc++: Fix up abi.exp FAILs on powerpc64-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKrSMd4ERX2hWsy@tucnak/mbox/"},{"id":89830,"url":"https://patchwork.plctlab.org/api/1.2/patches/89830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKtuNYTXlDlSBYC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-03T18:53:44","name":"libstdc++: Fix up abi.exp FAILs on powerpc64le-linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFKtuNYTXlDlSBYC@tucnak/mbox/"},{"id":89833,"url":"https://patchwork.plctlab.org/api/1.2/patches/89833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503192504.2299704-1-jason@redhat.com/","msgid":"<20230503192504.2299704-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-03T19:25:04","name":"[pushed] c++: over-eager friend matching [PR109649]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503192504.2299704-1-jason@redhat.com/mbox/"},{"id":89859,"url":"https://patchwork.plctlab.org/api/1.2/patches/89859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503211731.182963-1-arsen@aarsen.me/","msgid":"<20230503211731.182963-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-05-03T21:17:31","name":"[PUSHED,gcc-11] extend.texi: replace @itemx not preceded by @item.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503211731.182963-1-arsen@aarsen.me/mbox/"},{"id":89869,"url":"https://patchwork.plctlab.org/api/1.2/patches/89869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231103.931391-1-apinski@marvell.com/","msgid":"<20230503231103.931391-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:11:03","name":"PHIOPT: Improve replace_phi_edge_with_variable'\''s dce_ssa_names slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231103.931391-1-apinski@marvell.com/mbox/"},{"id":89870,"url":"https://patchwork.plctlab.org/api/1.2/patches/89870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-1-apinski@marvell.com/","msgid":"<20230503231224.931656-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:12:23","name":"[1/2] Move copy_phi_arg_into_existing_phi to common location and use it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-1-apinski@marvell.com/mbox/"},{"id":89871,"url":"https://patchwork.plctlab.org/api/1.2/patches/89871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-2-apinski@marvell.com/","msgid":"<20230503231224.931656-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-03T23:12:24","name":"[PATCHv2,2/2] PHIOPT: Improve replace_phi_edge_with_variable for diamond shapped bb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230503231224.931656-2-apinski@marvell.com/mbox/"},{"id":89881,"url":"https://patchwork.plctlab.org/api/1.2/patches/89881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504000721.AA69920425@pchp3.se.axis.com/","msgid":"<20230504000721.AA69920425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:07:21","name":"[committed] CRIS-LRA: Fix uses of reload_in_progress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504000721.AA69920425@pchp3.se.axis.com/mbox/"},{"id":89883,"url":"https://patchwork.plctlab.org/api/1.2/patches/89883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004415.3F59E20438@pchp3.se.axis.com/","msgid":"<20230504004415.3F59E20438@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:44:15","name":"[committed] CRIS-LRA: Define TARGET_SPILL_CLASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004415.3F59E20438@pchp3.se.axis.com/mbox/"},{"id":89884,"url":"https://patchwork.plctlab.org/api/1.2/patches/89884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004748.E0F7D20416@pchp3.se.axis.com/","msgid":"<20230504004748.E0F7D20416@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-04T00:47:48","name":"[committed] CRIS: peephole2 an \"and\" with a contiguous \"one-sided\" sequences of 1s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504004748.E0F7D20416@pchp3.se.axis.com/mbox/"},{"id":89902,"url":"https://patchwork.plctlab.org/api/1.2/patches/89902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504032535.1368877-1-hongtao.liu@intel.com/","msgid":"<20230504032535.1368877-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-04T03:25:35","name":"[v2] Canonicalize vec_merge when mask is constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504032535.1368877-1-hongtao.liu@intel.com/mbox/"},{"id":89921,"url":"https://patchwork.plctlab.org/api/1.2/patches/89921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504054544.203366-1-juzhe.zhong@rivai.ai/","msgid":"<20230504054544.203366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-04T05:45:44","name":"[V3] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504054544.203366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":89922,"url":"https://patchwork.plctlab.org/api/1.2/patches/89922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504055446.1675940-1-hongtao.liu@intel.com/","msgid":"<20230504055446.1675940-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-04T05:54:46","name":"[powerpc] Add a peephole2 to eliminate redundant move from VSX_REGS to GENERAL_REGS when it'\''s from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504055446.1675940-1-hongtao.liu@intel.com/mbox/"},{"id":89936,"url":"https://patchwork.plctlab.org/api/1.2/patches/89936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504072936.116825-1-kito.cheng@sifive.com/","msgid":"<20230504072936.116825-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-04T07:29:37","name":"RISC-V: Handle multi-lib path correclty for linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504072936.116825-1-kito.cheng@sifive.com/mbox/"},{"id":89939,"url":"https://patchwork.plctlab.org/api/1.2/patches/89939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de/","msgid":"<20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T07:43:13","name":"tree-optimization/109724 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504074313.DB9E0133F7@imap2.suse-dmz.suse.de/mbox/"},{"id":89951,"url":"https://patchwork.plctlab.org/api/1.2/patches/89951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rwbkh0.fsf@euler.schwinge.homeip.net/","msgid":"<87r0rwbkh0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-04T07:54:03","name":"libgomp C++ testsuite: Use '\''lang_include_flags'\'' instead of '\''libstdcxx_includes'\'' (was: [PATCH] libgomp: Add openacc_{cuda,cublas,cudart} effective targets and use them in openacc testsuite)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rwbkh0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":89954,"url":"https://patchwork.plctlab.org/api/1.2/patches/89954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504080130.24217-1-kito.cheng@sifive.com/","msgid":"<20230504080130.24217-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-04T08:01:31","name":"[v2] RISC-V: Handle multi-lib path correclty for linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504080130.24217-1-kito.cheng@sifive.com/mbox/"},{"id":89995,"url":"https://patchwork.plctlab.org/api/1.2/patches/89995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504083537.2719788-1-pan2.li@intel.com/","msgid":"<20230504083537.2719788-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-04T08:35:37","name":"RISC-V: Legitimise the const0_rtx for RVV indexed load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504083537.2719788-1-pan2.li@intel.com/mbox/"},{"id":90000,"url":"https://patchwork.plctlab.org/api/1.2/patches/90000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com/","msgid":"<47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com>","list_archive_url":null,"date":"2023-05-04T08:56:22","name":"[PATCHv2,rs6000] Splat vector small V2DI constants with ISA 2.07 instructions [PR104124]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/47adfd48-c6b6-c1d9-02c4-398d300ec5ba@linux.ibm.com/mbox/"},{"id":90007,"url":"https://patchwork.plctlab.org/api/1.2/patches/90007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504091118.2805091-1-pan2.li@intel.com/","msgid":"<20230504091118.2805091-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-04T09:11:18","name":"[v2] RISC-V: Legitimise the const0_rtx for RVV indexed load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504091118.2805091-1-pan2.li@intel.com/mbox/"},{"id":90040,"url":"https://patchwork.plctlab.org/api/1.2/patches/90040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504105126.0AC9013444@imap2.suse-dmz.suse.de/","msgid":"<20230504105126.0AC9013444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T10:51:25","name":"tree-optimization/109721 - emulated vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504105126.0AC9013444@imap2.suse-dmz.suse.de/mbox/"},{"id":90050,"url":"https://patchwork.plctlab.org/api/1.2/patches/90050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4amfmATdWfLpUjxy+0Hoisjg+7TKOg9wVDOq820RQu_HQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T11:04:28","name":"i386: Improve index_register_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4amfmATdWfLpUjxy+0Hoisjg+7TKOg9wVDOq820RQu_HQ@mail.gmail.com/mbox/"},{"id":90056,"url":"https://patchwork.plctlab.org/api/1.2/patches/90056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504115031.51842-1-jwakely@redhat.com/","msgid":"<20230504115031.51842-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-04T11:50:31","name":"[committed] libstdc++: Document new library version in manual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504115031.51842-1-jwakely@redhat.com/mbox/"},{"id":90059,"url":"https://patchwork.plctlab.org/api/1.2/patches/90059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5ykpaj2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-04T12:05:05","name":"[libstdc++] use strtold for from_chars even without locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5ykpaj2.fsf@lxoliva.fsfla.org/mbox/"},{"id":90060,"url":"https://patchwork.plctlab.org/api/1.2/patches/90060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y98padr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-04T12:08:16","name":"[vxworks,testsuite,aarch64] use builtin in pred-not-gen-4.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y98padr.fsf@lxoliva.fsfla.org/mbox/"},{"id":90082,"url":"https://patchwork.plctlab.org/api/1.2/patches/90082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504132540.286148-1-juzhe.zhong@rivai.ai/","msgid":"<20230504132540.286148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-04T13:25:40","name":"[V4] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504132540.286148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90090,"url":"https://patchwork.plctlab.org/api/1.2/patches/90090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504135932.1618B13444@imap2.suse-dmz.suse.de/","msgid":"<20230504135932.1618B13444@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-04T13:59:31","name":"[RFC] tree-optimization/104475 - bogus -Wstringop-overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504135932.1618B13444@imap2.suse-dmz.suse.de/mbox/"},{"id":90139,"url":"https://patchwork.plctlab.org/api/1.2/patches/90139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163340.1327067-1-ppalka@redhat.com/","msgid":"<20230504163340.1327067-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-04T16:33:40","name":"c++: some assorted code improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163340.1327067-1-ppalka@redhat.com/mbox/"},{"id":90140,"url":"https://patchwork.plctlab.org/api/1.2/patches/90140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163353.1327143-1-ppalka@redhat.com/","msgid":"<20230504163353.1327143-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-04T16:33:53","name":"c++: fix pretty printing of '\''alignof'\'' vs '\''__alignof__'\'' [PR85979]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504163353.1327143-1-ppalka@redhat.com/mbox/"},{"id":90153,"url":"https://patchwork.plctlab.org/api/1.2/patches/90153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504170808.1829411-1-rzinsly@ventanamicro.com/","msgid":"<20230504170808.1829411-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-04T17:08:08","name":"RISC-V: Add bext pattern for ZBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504170808.1829411-1-rzinsly@ventanamicro.com/mbox/"},{"id":90154,"url":"https://patchwork.plctlab.org/api/1.2/patches/90154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504171421.1829763-1-rzinsly@ventanamicro.com/","msgid":"<20230504171421.1829763-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-04T17:14:21","name":"RISC-V: Fix CTZ unnecessary sign extension [PR #106888]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504171421.1829763-1-rzinsly@ventanamicro.com/mbox/"},{"id":90174,"url":"https://patchwork.plctlab.org/api/1.2/patches/90174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z0XjZOUsiYW4XuyRiYAssu3gTZ3MABResbC=bjjfAbjQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T18:29:17","name":"i386: Tighten ashift to lea splitter operand predicates [PR109733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z0XjZOUsiYW4XuyRiYAssu3gTZ3MABResbC=bjjfAbjQ@mail.gmail.com/mbox/"},{"id":90218,"url":"https://patchwork.plctlab.org/api/1.2/patches/90218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3381264-616a-6c76-3357-7dec1f60696d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-04T19:29:34","name":"libffi: fix handling of homogeneous float128 structs [PR109447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3381264-616a-6c76-3357-7dec1f60696d@linux.ibm.com/mbox/"},{"id":90255,"url":"https://patchwork.plctlab.org/api/1.2/patches/90255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504215638.988177-1-apinski@marvell.com/","msgid":"<20230504215638.988177-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-04T21:56:38","name":"PHIOPT: Fix diamond case of match_simplify_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504215638.988177-1-apinski@marvell.com/mbox/"},{"id":90263,"url":"https://patchwork.plctlab.org/api/1.2/patches/90263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504234042.992763-1-apinski@marvell.com/","msgid":"<20230504234042.992763-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-04T23:40:42","name":"MATCH: Add ABSU == 0 to a == 0 simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230504234042.992763-1-apinski@marvell.com/mbox/"},{"id":90269,"url":"https://patchwork.plctlab.org/api/1.2/patches/90269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505010707.2687333-1-jason@redhat.com/","msgid":"<20230505010707.2687333-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-05T01:07:07","name":"[pushed] Revert \"c++: restore instantiate_decl assert\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505010707.2687333-1-jason@redhat.com/mbox/"},{"id":90292,"url":"https://patchwork.plctlab.org/api/1.2/patches/90292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505052120.1074528-1-juzhe.zhong@rivai.ai/","msgid":"<20230505052120.1074528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T05:21:20","name":"RISC-V: Fix PR109615","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505052120.1074528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90307,"url":"https://patchwork.plctlab.org/api/1.2/patches/90307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505063344.1085156-1-juzhe.zhong@rivai.ai/","msgid":"<20230505063344.1085156-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T06:33:44","name":"[V2] RISC-V: Fix PR109615","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505063344.1085156-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90323,"url":"https://patchwork.plctlab.org/api/1.2/patches/90323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS2L6002wKiQuaB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T07:54:23","name":"[committed] builtins: Fix comment typo mpft_t -> mpfr_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS2L6002wKiQuaB@tucnak/mbox/"},{"id":90327,"url":"https://patchwork.plctlab.org/api/1.2/patches/90327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS3q06pEH5J3ZRI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T08:00:43","name":"gimple-range-op: Improve handling of sqrt ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFS3q06pEH5J3ZRI@tucnak/mbox/"},{"id":90349,"url":"https://patchwork.plctlab.org/api/1.2/patches/90349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-1-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:08","name":"[01/23] arm: [MVE intrinsics] add binary_round_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-1-christophe.lyon@arm.com/mbox/"},{"id":90348,"url":"https://patchwork.plctlab.org/api/1.2/patches/90348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-2-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:09","name":"[02/23] arm: [MVE intrinsics] factorize vqrshlq vrshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-2-christophe.lyon@arm.com/mbox/"},{"id":90360,"url":"https://patchwork.plctlab.org/api/1.2/patches/90360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-3-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:10","name":"[03/23] arm: [MVE intrinsics] rework vrshlq vqrshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-3-christophe.lyon@arm.com/mbox/"},{"id":90351,"url":"https://patchwork.plctlab.org/api/1.2/patches/90351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-4-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:11","name":"[04/23] arm: [MVE intrinsics] factorize vqshlq vshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-4-christophe.lyon@arm.com/mbox/"},{"id":90356,"url":"https://patchwork.plctlab.org/api/1.2/patches/90356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-5-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:12","name":"[05/23] arm: [MVE intrinsics] rework vqrdmulhq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-5-christophe.lyon@arm.com/mbox/"},{"id":90347,"url":"https://patchwork.plctlab.org/api/1.2/patches/90347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-6-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:13","name":"[06/23] arm: [MVE intrinsics] factorize vabdq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-6-christophe.lyon@arm.com/mbox/"},{"id":90355,"url":"https://patchwork.plctlab.org/api/1.2/patches/90355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-7-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:14","name":"[07/23] arm: [MVE intrinsics] rework vabdq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-7-christophe.lyon@arm.com/mbox/"},{"id":90354,"url":"https://patchwork.plctlab.org/api/1.2/patches/90354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-8-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:15","name":"[08/23] arm: [MVE intrinsics] add binary_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-8-christophe.lyon@arm.com/mbox/"},{"id":90353,"url":"https://patchwork.plctlab.org/api/1.2/patches/90353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-9-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:16","name":"[09/23] arm: [MVE intrinsics] add support for MODE_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-9-christophe.lyon@arm.com/mbox/"},{"id":90350,"url":"https://patchwork.plctlab.org/api/1.2/patches/90350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-10-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:17","name":"[10/23] arm: [MVE intrinsics] add binary_lshift_r shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-10-christophe.lyon@arm.com/mbox/"},{"id":90352,"url":"https://patchwork.plctlab.org/api/1.2/patches/90352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-11-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:18","name":"[11/23] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-11-christophe.lyon@arm.com/mbox/"},{"id":90368,"url":"https://patchwork.plctlab.org/api/1.2/patches/90368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-12-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:19","name":"[12/23] arm: [MVE intrinsics] rework vqshlq vshlq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-12-christophe.lyon@arm.com/mbox/"},{"id":90361,"url":"https://patchwork.plctlab.org/api/1.2/patches/90361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-13-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:20","name":"[13/23] arm: [MVE intrinsics] factorize vmaxq vminq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-13-christophe.lyon@arm.com/mbox/"},{"id":90365,"url":"https://patchwork.plctlab.org/api/1.2/patches/90365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-14-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:21","name":"[14/23] arm: [MVE intrinsics] rework vmaxq vminq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-14-christophe.lyon@arm.com/mbox/"},{"id":90364,"url":"https://patchwork.plctlab.org/api/1.2/patches/90364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-15-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:22","name":"[15/23] arm: [MVE intrinsics] add binary_rshift_narrow shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-15-christophe.lyon@arm.com/mbox/"},{"id":90366,"url":"https://patchwork.plctlab.org/api/1.2/patches/90366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-16-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:23","name":"[16/23] arm: [MVE intrinsics] factorize vshrntq vshrnbq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-16-christophe.lyon@arm.com/mbox/"},{"id":90367,"url":"https://patchwork.plctlab.org/api/1.2/patches/90367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-17-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:24","name":"[17/23] arm: [MVE intrinsics] rework vshrnbq vshrntq vrshrnbq vrshrntq vqshrnbq vqshrntq vqrshrnbq vqrshrntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-17-christophe.lyon@arm.com/mbox/"},{"id":90358,"url":"https://patchwork.plctlab.org/api/1.2/patches/90358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-18-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:25","name":"[18/23] arm: [MVE intrinsics] add binary_rshift_narrow_unsigned shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-18-christophe.lyon@arm.com/mbox/"},{"id":90362,"url":"https://patchwork.plctlab.org/api/1.2/patches/90362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-19-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:26","name":"[19/23] arm: [MVE intrinsics] factorize vqrshrunb vqrshrunt vqshrunb vqshrunt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-19-christophe.lyon@arm.com/mbox/"},{"id":90363,"url":"https://patchwork.plctlab.org/api/1.2/patches/90363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-20-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:27","name":"[20/23] arm: [MVE intrinsics] rework vqrshrunbq vqrshruntq vqshrunbq vqshruntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-20-christophe.lyon@arm.com/mbox/"},{"id":90357,"url":"https://patchwork.plctlab.org/api/1.2/patches/90357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-21-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:28","name":"[21/23] arm: [MVE intrinsics] add binary_rshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-21-christophe.lyon@arm.com/mbox/"},{"id":90359,"url":"https://patchwork.plctlab.org/api/1.2/patches/90359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-22-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:29","name":"[22/23] arm: [MVE intrinsics] factorize vsrhrq vrshrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-22-christophe.lyon@arm.com/mbox/"},{"id":90369,"url":"https://patchwork.plctlab.org/api/1.2/patches/90369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-23-christophe.lyon@arm.com/","msgid":"<20230505083930.101210-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T08:39:30","name":"[23/23] arm: [MVE intrinsics] rework vshrq vrshrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505083930.101210-23-christophe.lyon@arm.com/mbox/"},{"id":90370,"url":"https://patchwork.plctlab.org/api/1.2/patches/90370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6srb1iq.fsf@euler.schwinge.homeip.net/","msgid":"<87h6srb1iq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-05T08:55:41","name":"Support parallel testing in libgomp, part I [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6srb1iq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":90372,"url":"https://patchwork.plctlab.org/api/1.2/patches/90372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ednvb1cc.fsf@euler.schwinge.homeip.net/","msgid":"<87ednvb1cc.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-05T08:59:31","name":"Support parallel testing in libgomp, part II [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ednvb1cc.fsf@euler.schwinge.homeip.net/mbox/"},{"id":90373,"url":"https://patchwork.plctlab.org/api/1.2/patches/90373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFTGiRSmYjV5IqFy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:04:09","name":"tree: Fix up save_expr [PR52339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFTGiRSmYjV5IqFy@tucnak/mbox/"},{"id":90393,"url":"https://patchwork.plctlab.org/api/1.2/patches/90393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com/","msgid":"<70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:32","name":"[1/8] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70645cf91330da13aebc7e62f58757fde5892e13.1683273171.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90391,"url":"https://patchwork.plctlab.org/api/1.2/patches/90391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:33","name":"[2/8] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9508ae1f8913b1acd21193cb2b92a65e50730081.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90392,"url":"https://patchwork.plctlab.org/api/1.2/patches/90392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/baeeaa5f076e395b14693f83349c64079e33fab3.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:34","name":"[3/8] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/baeeaa5f076e395b14693f83349c64079e33fab3.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90394,"url":"https://patchwork.plctlab.org/api/1.2/patches/90394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:36","name":"[4/8] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a19881c6313ec07482835d72dd74bdd128601a7.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90388,"url":"https://patchwork.plctlab.org/api/1.2/patches/90388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d70e3d68b11dbd58298e0d4a341de3039743f954.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:37","name":"[5/8] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d70e3d68b11dbd58298e0d4a341de3039743f954.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90389,"url":"https://patchwork.plctlab.org/api/1.2/patches/90389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cae316f7b894aca94dab3a560045bb0cf1c4da40.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T09:41:38","name":"[6/8] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cae316f7b894aca94dab3a560045bb0cf1c4da40.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90395,"url":"https://patchwork.plctlab.org/api/1.2/patches/90395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:39","name":"[7/8] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2672fed4a8b512b5c73661ac76bd08ef4cda24a6.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90396,"url":"https://patchwork.plctlab.org/api/1.2/patches/90396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com/","msgid":"<9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-05T09:41:40","name":"[8/8] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c80bb4c48610f82a6ffd2966c2c800909fb6f81.1683273172.git.jie.mei@oss.cipunited.com/mbox/"},{"id":90409,"url":"https://patchwork.plctlab.org/api/1.2/patches/90409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com/","msgid":"<22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com>","list_archive_url":null,"date":"2023-05-05T11:10:28","name":"GCN: Silence unused-variable warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22f08c09-4076-969f-a9a0-88761b350086@codesourcery.com/mbox/"},{"id":90426,"url":"https://patchwork.plctlab.org/api/1.2/patches/90426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aXWfcmDeDtSG59wiXbkGqz+=-XZhdqBkPYegKue3tYSg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T12:13:57","name":"i386: Introduce mulv2si3 instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aXWfcmDeDtSG59wiXbkGqz+=-XZhdqBkPYegKue3tYSg@mail.gmail.com/mbox/"},{"id":90428,"url":"https://patchwork.plctlab.org/api/1.2/patches/90428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505121843.AAF6813513@imap2.suse-dmz.suse.de/","msgid":"<20230505121843.AAF6813513@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-05T12:18:43","name":"tree-optimization/109735 - conversion for vectorized pointer-diff","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505121843.AAF6813513@imap2.suse-dmz.suse.de/mbox/"},{"id":90438,"url":"https://patchwork.plctlab.org/api/1.2/patches/90438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a_eva9FnxD1y4Qp6HnQ3DMr+MKkCnQaKBrXJw4D+=_Hw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T13:16:03","name":"i386: Rename index_register_operand predicate to register_no_SP_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a_eva9FnxD1y4Qp6HnQ3DMr+MKkCnQaKBrXJw4D+=_Hw@mail.gmail.com/mbox/"},{"id":90446,"url":"https://patchwork.plctlab.org/api/1.2/patches/90446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505135153.1308864-1-juzhe.zhong@rivai.ai/","msgid":"<20230505135153.1308864-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T13:51:53","name":"RISC-V: Fix PR109748","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505135153.1308864-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90453,"url":"https://patchwork.plctlab.org/api/1.2/patches/90453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505140643.1322399-1-juzhe.zhong@rivai.ai/","msgid":"<20230505140643.1322399-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:06:43","name":"[V4] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505140643.1322399-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90455,"url":"https://patchwork.plctlab.org/api/1.2/patches/90455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505141239.1323841-1-juzhe.zhong@rivai.ai/","msgid":"<20230505141239.1323841-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:12:39","name":"[V2] RISC-V: Fix incorrect demand info merge in local vsetvli optimization [PR109748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505141239.1323841-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90469,"url":"https://patchwork.plctlab.org/api/1.2/patches/90469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505145956.1336111-1-juzhe.zhong@rivai.ai/","msgid":"<20230505145956.1336111-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-05T14:59:56","name":"[V5] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505145956.1336111-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90474,"url":"https://patchwork.plctlab.org/api/1.2/patches/90474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505151719.1031737-1-apinski@marvell.com/","msgid":"<20230505151719.1031737-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-05T15:17:19","name":"Move substitute_and_fold over to use simple_dce_from_worklist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505151719.1031737-1-apinski@marvell.com/mbox/"},{"id":90482,"url":"https://patchwork.plctlab.org/api/1.2/patches/90482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-2-collison@rivosinc.com/","msgid":"<20230505154607.1155567-2-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:45:59","name":"[v6,1/9] RISC-V: autovec: Add new predicates and function prototypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-2-collison@rivosinc.com/mbox/"},{"id":90483,"url":"https://patchwork.plctlab.org/api/1.2/patches/90483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-3-collison@rivosinc.com/","msgid":"<20230505154607.1155567-3-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:00","name":"[v6,2/9] RISC-V: autovec: Export policy functions to global scope","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-3-collison@rivosinc.com/mbox/"},{"id":90490,"url":"https://patchwork.plctlab.org/api/1.2/patches/90490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-4-collison@rivosinc.com/","msgid":"<20230505154607.1155567-4-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:01","name":"[v6,3/9] RISC-V:autovec: Add auto-vectorization support functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-4-collison@rivosinc.com/mbox/"},{"id":90489,"url":"https://patchwork.plctlab.org/api/1.2/patches/90489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-5-collison@rivosinc.com/","msgid":"<20230505154607.1155567-5-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:02","name":"[v6,4/9] RISC-V:autovec: Add target vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-5-collison@rivosinc.com/mbox/"},{"id":90484,"url":"https://patchwork.plctlab.org/api/1.2/patches/90484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-6-collison@rivosinc.com/","msgid":"<20230505154607.1155567-6-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:03","name":"[v6,5/9] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-6-collison@rivosinc.com/mbox/"},{"id":90495,"url":"https://patchwork.plctlab.org/api/1.2/patches/90495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-7-collison@rivosinc.com/","msgid":"<20230505154607.1155567-7-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:04","name":"[v6,6/9] RISC-V:autovec: Add autovectorization tests for add & sub","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-7-collison@rivosinc.com/mbox/"},{"id":90493,"url":"https://patchwork.plctlab.org/api/1.2/patches/90493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-8-collison@rivosinc.com/","msgid":"<20230505154607.1155567-8-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:05","name":"[v6,7/9] RISC-V: autovec: Verify that GET_MODE_NUNITS is a multiple of 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-8-collison@rivosinc.com/mbox/"},{"id":90491,"url":"https://patchwork.plctlab.org/api/1.2/patches/90491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-9-collison@rivosinc.com/","msgid":"<20230505154607.1155567-9-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:06","name":"[v6,8/9] RISC-V:autovec: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-9-collison@rivosinc.com/mbox/"},{"id":90494,"url":"https://patchwork.plctlab.org/api/1.2/patches/90494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-10-collison@rivosinc.com/","msgid":"<20230505154607.1155567-10-collison@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T15:46:07","name":"[v6,9/9] RISC-V:autovec: This patch supports 8 bit auto-vectorization in riscv.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505154607.1155567-10-collison@rivosinc.com/mbox/"},{"id":90498,"url":"https://patchwork.plctlab.org/api/1.2/patches/90498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-1-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:57","name":"[01/10] arm: [MVE intrinsics] add unary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-1-christophe.lyon@arm.com/mbox/"},{"id":90499,"url":"https://patchwork.plctlab.org/api/1.2/patches/90499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-2-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:58","name":"[02/10] arm: [MVE intrinsics] factorize several unary operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-2-christophe.lyon@arm.com/mbox/"},{"id":90502,"url":"https://patchwork.plctlab.org/api/1.2/patches/90502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-3-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:48:59","name":"[03/10] arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabsq, vqnegq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-3-christophe.lyon@arm.com/mbox/"},{"id":90506,"url":"https://patchwork.plctlab.org/api/1.2/patches/90506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-4-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:00","name":"[04/10] arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrndpq vrndxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-4-christophe.lyon@arm.com/mbox/"},{"id":90500,"url":"https://patchwork.plctlab.org/api/1.2/patches/90500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-5-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:01","name":"[05/10] arm: [MVE intrinsics] add binary_move_narrow and binary_move_narrow_unsigned shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-5-christophe.lyon@arm.com/mbox/"},{"id":90505,"url":"https://patchwork.plctlab.org/api/1.2/patches/90505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-6-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:02","name":"[06/10] arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-6-christophe.lyon@arm.com/mbox/"},{"id":90507,"url":"https://patchwork.plctlab.org/api/1.2/patches/90507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-7-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:03","name":"[07/10] arm: [MVE intrinsics] rework vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-7-christophe.lyon@arm.com/mbox/"},{"id":90504,"url":"https://patchwork.plctlab.org/api/1.2/patches/90504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-8-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:04","name":"[08/10] arm: [MVE intrinsics] add binary_widen_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-8-christophe.lyon@arm.com/mbox/"},{"id":90501,"url":"https://patchwork.plctlab.org/api/1.2/patches/90501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-9-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:05","name":"[09/10] arm: [MVE intrinsics] factorize vshllbq vshlltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-9-christophe.lyon@arm.com/mbox/"},{"id":90503,"url":"https://patchwork.plctlab.org/api/1.2/patches/90503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-10-christophe.lyon@arm.com/","msgid":"<20230505164906.596219-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-05T16:49:06","name":"[10/10] arm: [MVE intrinsics] rework vshllbq vshlltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505164906.596219-10-christophe.lyon@arm.com/mbox/"},{"id":90508,"url":"https://patchwork.plctlab.org/api/1.2/patches/90508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8re2soib.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-05T16:59:24","name":"ira: Don'\''t create copies for earlyclobbered pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8re2soib.fsf@arm.com/mbox/"},{"id":90511,"url":"https://patchwork.plctlab.org/api/1.2/patches/90511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505170241.19836-1-amonakov@ispras.ru/","msgid":"<20230505170241.19836-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-05T17:02:41","name":"Makefile.in: clean up match.pd-related dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505170241.19836-1-amonakov@ispras.ru/mbox/"},{"id":90514,"url":"https://patchwork.plctlab.org/api/1.2/patches/90514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505171256.1380528-1-patrick@rivosinc.com/","msgid":"<20230505171256.1380528-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-05-05T17:12:56","name":"[RFC] RISC-V: Add proposed Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505171256.1380528-1-patrick@rivosinc.com/mbox/"},{"id":90523,"url":"https://patchwork.plctlab.org/api/1.2/patches/90523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173637.1587407-1-ppalka@redhat.com/","msgid":"<20230505173637.1587407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T17:36:37","name":"c++: list CTAD and resolve_nondeduced_context [PR106214]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173637.1587407-1-ppalka@redhat.com/mbox/"},{"id":90524,"url":"https://patchwork.plctlab.org/api/1.2/patches/90524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173648.1593931-1-ppalka@redhat.com/","msgid":"<20230505173648.1593931-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T17:36:48","name":"c++: goto entering scope of obj w/ non-trivial dtor [PR103091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505173648.1593931-1-ppalka@redhat.com/mbox/"},{"id":90552,"url":"https://patchwork.plctlab.org/api/1.2/patches/90552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505182630.2133570-1-ppalka@redhat.com/","msgid":"<20230505182630.2133570-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-05T18:26:30","name":"c++: parenthesized -> resolving to static member [PR98283]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505182630.2133570-1-ppalka@redhat.com/mbox/"},{"id":90581,"url":"https://patchwork.plctlab.org/api/1.2/patches/90581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFVssfzGJSf16Mox@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-05T20:53:05","name":"gimple-range-op: Improve handling of sin/cos ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFVssfzGJSf16Mox@tucnak/mbox/"},{"id":90624,"url":"https://patchwork.plctlab.org/api/1.2/patches/90624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505231617.1D56B2043B@pchp3.se.axis.com/","msgid":"<20230505231617.1D56B2043B@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-05T23:16:17","name":"[committed] CRIS: peephole2 a lsrq into a lslq+lsrq pair","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505231617.1D56B2043B@pchp3.se.axis.com/mbox/"},{"id":90631,"url":"https://patchwork.plctlab.org/api/1.2/patches/90631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505235950.3675720420@pchp3.se.axis.com/","msgid":"<20230505235950.3675720420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-05T23:59:50","name":"[committed] CRIS: peephole2 a move of constant followed by and of same register","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230505235950.3675720420@pchp3.se.axis.com/mbox/"},{"id":90633,"url":"https://patchwork.plctlab.org/api/1.2/patches/90633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506000251.0DDBD20448@pchp3.se.axis.com/","msgid":"<20230506000251.0DDBD20448@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-06T00:02:51","name":"[committed] CRIS: peephole2 an add into two addq or subq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506000251.0DDBD20448@pchp3.se.axis.com/mbox/"},{"id":90657,"url":"https://patchwork.plctlab.org/api/1.2/patches/90657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506014942.1462251-1-juzhe.zhong@rivai.ai/","msgid":"<20230506014942.1462251-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T01:49:42","name":"ISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506014942.1462251-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90658,"url":"https://patchwork.plctlab.org/api/1.2/patches/90658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506015041.1462935-1-juzhe.zhong@rivai.ai/","msgid":"<20230506015041.1462935-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T01:50:41","name":"[V6] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506015041.1462935-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90670,"url":"https://patchwork.plctlab.org/api/1.2/patches/90670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dbf978-ac53-8f2d-4db5-b153300abad3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-06T03:41:48","name":"[fortran] PR109662 Namelist input with comma after name accepted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dbf978-ac53-8f2d-4db5-b153300abad3@gmail.com/mbox/"},{"id":90671,"url":"https://patchwork.plctlab.org/api/1.2/patches/90671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506034340.1717760-1-juzhe.zhong@rivai.ai/","msgid":"<20230506034340.1717760-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T03:43:40","name":"[V7] RISC-V: Enable basic RVV auto-vectorization support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506034340.1717760-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90710,"url":"https://patchwork.plctlab.org/api/1.2/patches/90710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-2-gaofei@eswincomputing.com/","msgid":"<20230506083939.22097-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-06T08:39:38","name":"[1/2,RISC-V] disable shrink-wrap-separate if zcmp enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-2-gaofei@eswincomputing.com/mbox/"},{"id":90711,"url":"https://patchwork.plctlab.org/api/1.2/patches/90711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-3-gaofei@eswincomputing.com/","msgid":"<20230506083939.22097-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-06T08:39:39","name":"[2/2,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506083939.22097-3-gaofei@eswincomputing.com/mbox/"},{"id":90729,"url":"https://patchwork.plctlab.org/api/1.2/patches/90729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506111449.2128575-1-juzhe.zhong@rivai.ai/","msgid":"<20230506111449.2128575-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-06T11:14:49","name":"RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506111449.2128575-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90734,"url":"https://patchwork.plctlab.org/api/1.2/patches/90734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115036.pvng4w6wztcimzrh@begin/","msgid":"<20230506115036.pvng4w6wztcimzrh@begin>","list_archive_url":null,"date":"2023-05-06T11:50:36","name":"hurd: Add multilib paths for gnu-x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115036.pvng4w6wztcimzrh@begin/mbox/"},{"id":90736,"url":"https://patchwork.plctlab.org/api/1.2/patches/90736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115544.y5hzmvwlgoup22ct@begin/","msgid":"<20230506115544.y5hzmvwlgoup22ct@begin>","list_archive_url":null,"date":"2023-05-06T11:55:44","name":"hurd: Ad default-pie and static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230506115544.y5hzmvwlgoup22ct@begin/mbox/"},{"id":90755,"url":"https://patchwork.plctlab.org/api/1.2/patches/90755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com/","msgid":"<009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T12:57:38","name":"Don'\''t call emit_clobber in lower-subreg.cc'\''s resolve_simple_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009901d9801a$57573ba0$0605b2e0$@nextmovesoftware.com/mbox/"},{"id":90758,"url":"https://patchwork.plctlab.org/api/1.2/patches/90758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com/","msgid":"<003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T14:00:24","name":"[x86_64] Introduce insvti_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003101d98023$1be6c6e0$53b454a0$@nextmovesoftware.com/mbox/"},{"id":90778,"url":"https://patchwork.plctlab.org/api/1.2/patches/90778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007301d98034$82486ea0$86d94be0$@nextmovesoftware.com/","msgid":"<007301d98034$82486ea0$86d94be0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T16:04:57","name":"nvptx: Add suppport for __builtin_nvptx_brev instrinsic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007301d98034$82486ea0$86d94be0$@nextmovesoftware.com/mbox/"},{"id":90781,"url":"https://patchwork.plctlab.org/api/1.2/patches/90781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com/","msgid":"<00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T16:39:15","name":"Add RTX codes for BITREVERSE and COPYSIGN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00aa01d98039$4c7668e0$e5633aa0$@nextmovesoftware.com/mbox/"},{"id":90783,"url":"https://patchwork.plctlab.org/api/1.2/patches/90783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab6c814593757f0c18116d11a0365a25b6487d47.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-05-06T17:05:34","name":"Pushed: [PATCH v2] LoongArch: Enable shrink wrapping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab6c814593757f0c18116d11a0365a25b6487d47.camel@xry111.site/mbox/"},{"id":90785,"url":"https://patchwork.plctlab.org/api/1.2/patches/90785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com/","msgid":"<00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-06T17:26:11","name":"[libgcc] Add bit reversal functions __bitrev[qhsd]i2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c401d9803f$dafe3c90$90fab5b0$@nextmovesoftware.com/mbox/"},{"id":90799,"url":"https://patchwork.plctlab.org/api/1.2/patches/90799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55ba35f-8779-68f4-5e80-ddeb52e0b0e4@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-06T19:52:56","name":"[committed] Partial revert of recent changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55ba35f-8779-68f4-5e80-ddeb52e0b0e4@gmail.com/mbox/"},{"id":90817,"url":"https://patchwork.plctlab.org/api/1.2/patches/90817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-1-apinski@marvell.com/","msgid":"<20230507044332.1122612-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:30","name":"[1/3] PHIOPT: Add diamond bb form to factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-1-apinski@marvell.com/mbox/"},{"id":90816,"url":"https://patchwork.plctlab.org/api/1.2/patches/90816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-2-apinski@marvell.com/","msgid":"<20230507044332.1122612-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:31","name":"[2/3] PHIOPT: Loop over calling factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-2-apinski@marvell.com/mbox/"},{"id":90815,"url":"https://patchwork.plctlab.org/api/1.2/patches/90815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-3-apinski@marvell.com/","msgid":"<20230507044332.1122612-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:43:32","name":"[3/3] PHIOPT: factor out unary operations instead of just conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507044332.1122612-3-apinski@marvell.com/mbox/"},{"id":90819,"url":"https://patchwork.plctlab.org/api/1.2/patches/90819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507045021.1122928-1-apinski@marvell.com/","msgid":"<20230507045021.1122928-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T04:50:21","name":"[1/3] PHIOPT: Add diamond bb form to factor_out_conditional_conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507045021.1122928-1-apinski@marvell.com/mbox/"},{"id":90824,"url":"https://patchwork.plctlab.org/api/1.2/patches/90824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507084244.61D6433E6C@hamza.pair.com/","msgid":"<20230507084244.61D6433E6C@hamza.pair.com>","list_archive_url":null,"date":"2023-05-07T08:42:42","name":"[pushed] wwwdocs: onlinedocs: Fix markup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507084244.61D6433E6C@hamza.pair.com/mbox/"},{"id":90851,"url":"https://patchwork.plctlab.org/api/1.2/patches/90851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507152600.1150387-1-apinski@marvell.com/","msgid":"<20230507152600.1150387-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T15:26:00","name":"Fix aarch64/109762: push_options/push_options does not work sometimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507152600.1150387-1-apinski@marvell.com/mbox/"},{"id":90876,"url":"https://patchwork.plctlab.org/api/1.2/patches/90876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507201300.1161530-1-apinski@marvell.com/","msgid":"<20230507201300.1161530-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T20:13:00","name":"[GCC,13] Fix aarch64/109762: push_options/push_options does not work sometimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507201300.1161530-1-apinski@marvell.com/mbox/"},{"id":90887,"url":"https://patchwork.plctlab.org/api/1.2/patches/90887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507221959.1166993-1-apinski@marvell.com/","msgid":"<20230507221959.1166993-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-07T22:19:59","name":"MATCH: Move `a <= CST1 ? MAX : a` optimization to match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230507221959.1166993-1-apinski@marvell.com/mbox/"},{"id":90914,"url":"https://patchwork.plctlab.org/api/1.2/patches/90914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508015900.3988239-1-hongtao.liu@intel.com/","msgid":"<20230508015900.3988239-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-08T01:59:00","name":"[V2,vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508015900.3988239-1-hongtao.liu@intel.com/mbox/"},{"id":90929,"url":"https://patchwork.plctlab.org/api/1.2/patches/90929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508034143.2606769-1-juzhe.zhong@rivai.ai/","msgid":"<20230508034143.2606769-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T03:41:43","name":"RISC-V: Fix ugly && incorrect codes of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508034143.2606769-1-juzhe.zhong@rivai.ai/mbox/"},{"id":90936,"url":"https://patchwork.plctlab.org/api/1.2/patches/90936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508052625.1185434-1-apinski@marvell.com/","msgid":"<20230508052625.1185434-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-08T05:26:25","name":"Add a != MIN/MAX_VALUE_CST ? CST-+1 : a to minmax_from_comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508052625.1185434-1-apinski@marvell.com/mbox/"},{"id":91031,"url":"https://patchwork.plctlab.org/api/1.2/patches/91031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508085428.4074457-1-pan2.li@intel.com/","msgid":"<20230508085428.4074457-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-08T08:54:28","name":"RISC-V: Update RVV integer compare simplification comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508085428.4074457-1-pan2.li@intel.com/mbox/"},{"id":91038,"url":"https://patchwork.plctlab.org/api/1.2/patches/91038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508094442.1413139-1-lipeng.zhu@intel.com/","msgid":"<20230508094442.1413139-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-05-08T09:44:43","name":"[v4] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508094442.1413139-1-lipeng.zhu@intel.com/mbox/"},{"id":91153,"url":"https://patchwork.plctlab.org/api/1.2/patches/91153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp/","msgid":"<91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-08T13:38:51","name":"xtensa: Make full transition to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp/mbox/"},{"id":91165,"url":"https://patchwork.plctlab.org/api/1.2/patches/91165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5yeapdt.fsf@euler.schwinge.homeip.net/","msgid":"<87a5yeapdt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-08T14:06:54","name":"libgm2: Remove '\''autogen.sh'\'' (was: libgm2: Adjust '\''autogen.sh'\'' to '\''ACLOCAL_AMFLAGS'\'', and simplify)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5yeapdt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91167,"url":"https://patchwork.plctlab.org/api/1.2/patches/91167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141122.127023-1-rzinsly@ventanamicro.com/","msgid":"<20230508141122.127023-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-08T14:11:22","name":"[v2] RISC-V: Add bext pattern for ZBS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141122.127023-1-rzinsly@ventanamicro.com/mbox/"},{"id":91168,"url":"https://patchwork.plctlab.org/api/1.2/patches/91168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141256.127110-1-rzinsly@ventanamicro.com/","msgid":"<20230508141256.127110-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-05-08T14:12:56","name":"[v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508141256.127110-1-rzinsly@ventanamicro.com/mbox/"},{"id":91176,"url":"https://patchwork.plctlab.org/api/1.2/patches/91176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6ba6cf3-00a5-6ba4-9796-5154cdbfcf15@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-08T14:30:52","name":"[committed] Fix minor length computation on stormy16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6ba6cf3-00a5-6ba4-9796-5154cdbfcf15@gmail.com/mbox/"},{"id":91185,"url":"https://patchwork.plctlab.org/api/1.2/patches/91185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143816.45084-1-kito.cheng@sifive.com/","msgid":"<20230508143816.45084-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-08T14:38:16","name":"[committed] RISC-V: Factor out vector manager code in vsetvli insertion pass. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143816.45084-1-kito.cheng@sifive.com/mbox/"},{"id":91186,"url":"https://patchwork.plctlab.org/api/1.2/patches/91186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143829.45127-1-kito.cheng@sifive.com/","msgid":"<20230508143829.45127-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-08T14:38:29","name":"[committed] RISC-V: Improve portability of testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508143829.45127-1-kito.cheng@sifive.com/mbox/"},{"id":91187,"url":"https://patchwork.plctlab.org/api/1.2/patches/91187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508144016.649694-1-juzhe.zhong@rivai.ai/","msgid":"<20230508144016.649694-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T14:40:16","name":"[V2] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508144016.649694-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91189,"url":"https://patchwork.plctlab.org/api/1.2/patches/91189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp/","msgid":"<42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-08T14:44:00","name":"[v2] xtensa: Make full transition to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42c4f026-3045-c469-e62f-24d7c26cd431@yahoo.co.jp/mbox/"},{"id":91219,"url":"https://patchwork.plctlab.org/api/1.2/patches/91219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508180408.1218395-1-apinski@marvell.com/","msgid":"<20230508180408.1218395-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-08T18:04:08","name":"[COMMITTED] Fix pr81192.c for int16 targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508180408.1218395-1-apinski@marvell.com/mbox/"},{"id":91222,"url":"https://patchwork.plctlab.org/api/1.2/patches/91222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-2-amonakov@ispras.ru/","msgid":"<20230508181311.25961-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:09","name":"[1/3] genmatch: clean up emit_func","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-2-amonakov@ispras.ru/mbox/"},{"id":91221,"url":"https://patchwork.plctlab.org/api/1.2/patches/91221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-3-amonakov@ispras.ru/","msgid":"<20230508181311.25961-3-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:10","name":"[2/3] genmatch: clean up showUsage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-3-amonakov@ispras.ru/mbox/"},{"id":91220,"url":"https://patchwork.plctlab.org/api/1.2/patches/91220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-4-amonakov@ispras.ru/","msgid":"<20230508181311.25961-4-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-08T18:13:11","name":"[3/3] genmatch: fixup get_out_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508181311.25961-4-amonakov@ispras.ru/mbox/"},{"id":91311,"url":"https://patchwork.plctlab.org/api/1.2/patches/91311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB34793E5E1EA2C050CB45B2A691719@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-08T22:26:58","name":"[PUSHED] Fix cfg maintenance after inlining in AutoFDO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB34793E5E1EA2C050CB45B2A691719@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":91314,"url":"https://patchwork.plctlab.org/api/1.2/patches/91314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508231726.801047-1-juzhe.zhong@rivai.ai/","msgid":"<20230508231726.801047-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-08T23:17:26","name":"[V3] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230508231726.801047-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91346,"url":"https://patchwork.plctlab.org/api/1.2/patches/91346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509021934.958640-1-juzhe.zhong@rivai.ai/","msgid":"<20230509021934.958640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T02:19:34","name":"RISC-V: Fix dead loop for user vsetvli intrinsic avl checking [PR109773]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509021934.958640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91352,"url":"https://patchwork.plctlab.org/api/1.2/patches/91352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509023844.1433589-1-lipeng.zhu@intel.com/","msgid":"<20230509023844.1433589-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-05-09T02:38:45","name":"[v5] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509023844.1433589-1-lipeng.zhu@intel.com/mbox/"},{"id":91387,"url":"https://patchwork.plctlab.org/api/1.2/patches/91387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at/","msgid":"<6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-09T06:46:24","name":"[committed,gcc,12] Fix ICE related to implicit access attributes for VLA arguments [PR105660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6356b3a81f9fb47c0d158683623fb94ef0b4a51e.camel@tugraz.at/mbox/"},{"id":91388,"url":"https://patchwork.plctlab.org/api/1.2/patches/91388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-2-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:26","name":"[1/6] aarch64: Fix move-after-intrinsic function-body tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-2-richard.sandiford@arm.com/mbox/"},{"id":91390,"url":"https://patchwork.plctlab.org/api/1.2/patches/91390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-3-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:27","name":"[2/6] aarch64: Allow moves after tied-register intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-3-richard.sandiford@arm.com/mbox/"},{"id":91389,"url":"https://patchwork.plctlab.org/api/1.2/patches/91389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-4-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:28","name":"[3/6] aarch64: Relax ordering requirements in SVE dup tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-4-richard.sandiford@arm.com/mbox/"},{"id":91391,"url":"https://patchwork.plctlab.org/api/1.2/patches/91391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-5-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:29","name":"[4/6] aarch64: Relax predicate register matches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-5-richard.sandiford@arm.com/mbox/"},{"id":91392,"url":"https://patchwork.plctlab.org/api/1.2/patches/91392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-6-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:30","name":"[5/6] aarch64: Relax FP/vector register matches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-6-richard.sandiford@arm.com/mbox/"},{"id":91393,"url":"https://patchwork.plctlab.org/api/1.2/patches/91393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-7-richard.sandiford@arm.com/","msgid":"<20230509064831.1651327-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-05-09T06:48:31","name":"[6/6] aarch64: Avoid hard-coding specific register allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509064831.1651327-7-richard.sandiford@arm.com/mbox/"},{"id":91396,"url":"https://patchwork.plctlab.org/api/1.2/patches/91396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509070604.3466556-1-hongtao.liu@intel.com/","msgid":"<20230509070604.3466556-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-09T07:06:04","name":"Detect bswap + rotate for byte permutation in pass_bswap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509070604.3466556-1-hongtao.liu@intel.com/mbox/"},{"id":91448,"url":"https://patchwork.plctlab.org/api/1.2/patches/91448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoAggM58+P5CFlE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:12:51","name":"c++: Reject attributes without arguments used as pack expansion [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoAggM58+P5CFlE@tucnak/mbox/"},{"id":91449,"url":"https://patchwork.plctlab.org/api/1.2/patches/91449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoCsXiB7fN8rsW5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:22:09","name":"c++: Reject pack expansion of assume attribute [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoCsXiB7fN8rsW5@tucnak/mbox/"},{"id":91455,"url":"https://patchwork.plctlab.org/api/1.2/patches/91455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoJP41qHvSIaWhw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T08:50:07","name":"tree-ssa-ccp, wide-int: Fix up handling of [LR]ROTATE_EXPR in bitwise ccp [PR109778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoJP41qHvSIaWhw@tucnak/mbox/"},{"id":91460,"url":"https://patchwork.plctlab.org/api/1.2/patches/91460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509085835.1143661-1-ardb@kernel.org/","msgid":"<20230509085835.1143661-1-ardb@kernel.org>","list_archive_url":null,"date":"2023-05-09T08:58:35","name":"i386: Honour -mdirect-extern-access when calling __fentry__","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509085835.1143661-1-ardb@kernel.org/mbox/"},{"id":91461,"url":"https://patchwork.plctlab.org/api/1.2/patches/91461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lehxswug.fsf@euler.schwinge.homeip.net/","msgid":"<87lehxswug.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T09:00:39","name":"Testsuite: Add missing '\''torture-init'\''/'\''torture-finish'\'' around '\''LTO_TORTURE_OPTIONS'\'' usage (was: Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''torture-init'\'' the '\''LTO_TORTURE_OPTIONS'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87lehxswug.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91469,"url":"https://patchwork.plctlab.org/api/1.2/patches/91469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509092820.658568-1-juzhe.zhong@rivai.ai/","msgid":"<20230509092820.658568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T09:28:20","name":"RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509092820.658568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91495,"url":"https://patchwork.plctlab.org/api/1.2/patches/91495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoesHMLC1fRG9qd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T10:21:36","name":"[committed] testsuite: Add further testcase for already fixed PR [PR109778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFoesHMLC1fRG9qd@tucnak/mbox/"},{"id":91498,"url":"https://patchwork.plctlab.org/api/1.2/patches/91498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFok4JIOAFvJjh4v@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T10:48:00","name":"[committed] mux-utils.h: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFok4JIOAFvJjh4v@tucnak/mbox/"},{"id":91552,"url":"https://patchwork.plctlab.org/api/1.2/patches/91552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509120550.4093888-1-juzhe.zhong@rivai.ai/","msgid":"<20230509120550.4093888-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-09T12:05:50","name":"[V2] RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509120550.4093888-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91555,"url":"https://patchwork.plctlab.org/api/1.2/patches/91555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFo3b8RDN8nseojl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T12:07:11","name":"[RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFo3b8RDN8nseojl@arm.com/mbox/"},{"id":91558,"url":"https://patchwork.plctlab.org/api/1.2/patches/91558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-1-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:22","name":"[01/16] arm: [MVE intrinsics] add binary_maxvminv shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-1-christophe.lyon@arm.com/mbox/"},{"id":91572,"url":"https://patchwork.plctlab.org/api/1.2/patches/91572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-2-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:23","name":"[02/16] arm: [MVE intrinsics] add binary_maxavminav shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-2-christophe.lyon@arm.com/mbox/"},{"id":91557,"url":"https://patchwork.plctlab.org/api/1.2/patches/91557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-3-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:24","name":"[03/16] arm: [MVE intrinsics add unspec_mve_function_exact_insn_pred_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-3-christophe.lyon@arm.com/mbox/"},{"id":91565,"url":"https://patchwork.plctlab.org/api/1.2/patches/91565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-4-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:25","name":"[04/16] arm: [MVE intrinsics] factorize vmaxvq vminvq vmaxavq vminavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-4-christophe.lyon@arm.com/mbox/"},{"id":91579,"url":"https://patchwork.plctlab.org/api/1.2/patches/91579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-5-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:26","name":"[05/16] arm: [MVE intrinsics] rework vmaxvq vminvq vmaxavq vminavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-5-christophe.lyon@arm.com/mbox/"},{"id":91559,"url":"https://patchwork.plctlab.org/api/1.2/patches/91559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-6-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:27","name":"[06/16] arm: add smax/smin expanders for v*hf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-6-christophe.lyon@arm.com/mbox/"},{"id":91576,"url":"https://patchwork.plctlab.org/api/1.2/patches/91576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-7-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:28","name":"[07/16] arm: [MVE intrinsics] factorize vmaxnmq vminnmq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-7-christophe.lyon@arm.com/mbox/"},{"id":91568,"url":"https://patchwork.plctlab.org/api/1.2/patches/91568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-8-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:29","name":"[08/16] arm: [MVE intrinsics] rework vmaxnmq vminnmq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-8-christophe.lyon@arm.com/mbox/"},{"id":91577,"url":"https://patchwork.plctlab.org/api/1.2/patches/91577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-9-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:30","name":"[09/16] arm: [MVE intrinsics] factorize vmaxnmavq vmaxnmvq vminnmavq vminnmvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-9-christophe.lyon@arm.com/mbox/"},{"id":91564,"url":"https://patchwork.plctlab.org/api/1.2/patches/91564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-10-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:31","name":"[10/16] arm: [MVE intrinsics] add support for mve_q_p_f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-10-christophe.lyon@arm.com/mbox/"},{"id":91571,"url":"https://patchwork.plctlab.org/api/1.2/patches/91571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-11-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:32","name":"[11/16] arm: [MVE intrinsics] rework vmaxnmavq vmaxnmvq vminnmavq vminnmvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-11-christophe.lyon@arm.com/mbox/"},{"id":91560,"url":"https://patchwork.plctlab.org/api/1.2/patches/91560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-12-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:33","name":"[12/16] arm: [MVE intrinsics] factorize vmaxnmaq vminnmaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-12-christophe.lyon@arm.com/mbox/"},{"id":91573,"url":"https://patchwork.plctlab.org/api/1.2/patches/91573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-13-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:34","name":"[13/16] arm: [MVE intrinsics] rework vmaxnmaq vminnmaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-13-christophe.lyon@arm.com/mbox/"},{"id":91574,"url":"https://patchwork.plctlab.org/api/1.2/patches/91574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-14-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:35","name":"[14/16] arm: [MVE intrinsics] add binary_maxamina shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-14-christophe.lyon@arm.com/mbox/"},{"id":91578,"url":"https://patchwork.plctlab.org/api/1.2/patches/91578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-15-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:36","name":"[15/16] arm: [MVE intrinsics] factorize vmaxaq vminaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-15-christophe.lyon@arm.com/mbox/"},{"id":91567,"url":"https://patchwork.plctlab.org/api/1.2/patches/91567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-16-christophe.lyon@arm.com/","msgid":"<20230509121937.206183-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T12:19:37","name":"[16/16] arm: [MVE intrinsics] rework vmaxaq vminaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509121937.206183-16-christophe.lyon@arm.com/mbox/"},{"id":91580,"url":"https://patchwork.plctlab.org/api/1.2/patches/91580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873545bs0q.fsf@euler.schwinge.homeip.net/","msgid":"<873545bs0q.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:36:53","name":"libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873545bs0q.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91582,"url":"https://patchwork.plctlab.org/api/1.2/patches/91582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg6dadba.fsf@euler.schwinge.homeip.net/","msgid":"<87zg6dadba.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:39:53","name":"libgomp testsuite: Only use '\''blddir'\'' if set (was: libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg6dadba.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91583,"url":"https://patchwork.plctlab.org/api/1.2/patches/91583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn1had8b.fsf@euler.schwinge.homeip.net/","msgid":"<87wn1had8b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:41:40","name":"libgomp testsuite: Use '\''lang_test_file_found'\'' instead of '\''lang_test_file'\'' (was: libgomp testsuite: Only use '\''blddir'\'' if set (was: libgomp C++ testsuite: Don'\''t compute '\''blddir'\'' twice (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn1had8b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91589,"url":"https://patchwork.plctlab.org/api/1.2/patches/91589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttwlacn6.fsf@euler.schwinge.homeip.net/","msgid":"<87ttwlacn6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:54:21","name":"libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttwlacn6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91592,"url":"https://patchwork.plctlab.org/api/1.2/patches/91592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rpacdy.fsf@euler.schwinge.homeip.net/","msgid":"<87r0rpacdy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T12:59:53","name":"libgomp C++, Fortran testsuites: Resolve '\''lang_test_file_found'\'' first (was: libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0rpacdy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91595,"url":"https://patchwork.plctlab.org/api/1.2/patches/91595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt2dac51.fsf@euler.schwinge.homeip.net/","msgid":"<87mt2dac51.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-09T13:05:14","name":"libgomp testsuite: Get rid of '\''lang_test_file_found'\'' (was: libgomp C++, Fortran testsuites: Resolve '\''lang_test_file_found'\'' first (was: libgomp testsuite: Localize '\''lang_[...]'\'' etc. (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt2dac51.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91598,"url":"https://patchwork.plctlab.org/api/1.2/patches/91598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9a3a573-f39a-6042-3c33-54978a96972f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T13:23:07","name":"[committed] Eliminate more comparisons on the H8 port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9a3a573-f39a-6042-3c33-54978a96972f@gmail.com/mbox/"},{"id":91636,"url":"https://patchwork.plctlab.org/api/1.2/patches/91636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+jrPoiz2m0PYSSRKDy0Rxyv9sw=3hMeK1OrpS8HdRRgg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T15:51:56","name":"[fortran] PR97122 - Spurious FINAL ... must be in the specification part of a MODULE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+jrPoiz2m0PYSSRKDy0Rxyv9sw=3hMeK1OrpS8HdRRgg@mail.gmail.com/mbox/"},{"id":91638,"url":"https://patchwork.plctlab.org/api/1.2/patches/91638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB345227948079D4E16CD24CBDF5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:00:05","name":"vect: Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB345227948079D4E16CD24CBDF5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91640,"url":"https://patchwork.plctlab.org/api/1.2/patches/91640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+_uXXzYQfHsfTjvo7USx98JB_ufDFEwN8eLm=X1xEcDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:00:46","name":"[fortran] PR103716 - [10/11/12/13/14 Regression] ICE in gimplify_expr, at gimplify.c:15964","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+_uXXzYQfHsfTjvo7USx98JB_ufDFEwN8eLm=X1xEcDQ@mail.gmail.com/mbox/"},{"id":91642,"url":"https://patchwork.plctlab.org/api/1.2/patches/91642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34527EC55B9EA0A097EC96C3F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:07:09","name":"vect: Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34527EC55B9EA0A097EC96C3F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91649,"url":"https://patchwork.plctlab.org/api/1.2/patches/91649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34526BFA97C71399317166B0F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T16:14:33","name":"rtl: AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB7PR08MB34526BFA97C71399317166B0F5769@DB7PR08MB3452.eurprd08.prod.outlook.com/mbox/"},{"id":91656,"url":"https://patchwork.plctlab.org/api/1.2/patches/91656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163502.3746600-1-ppalka@redhat.com/","msgid":"<20230509163502.3746600-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-09T16:35:02","name":"c++: noexcept-spec from nested class confusion [PR109761]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163502.3746600-1-ppalka@redhat.com/mbox/"},{"id":91655,"url":"https://patchwork.plctlab.org/api/1.2/patches/91655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163509.3746628-1-ppalka@redhat.com/","msgid":"<20230509163509.3746628-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-09T16:35:09","name":"c++: error-recovery ICE with unstable satisfaction [PR109752]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509163509.3746628-1-ppalka@redhat.com/mbox/"},{"id":91705,"url":"https://patchwork.plctlab.org/api/1.2/patches/91705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm79petb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T17:58:24","name":"[1/2] aarch64: Fix cut-&-pasto in aarch64-sve2-acle-asm.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm79petb.fsf@arm.com/mbox/"},{"id":91706,"url":"https://patchwork.plctlab.org/api/1.2/patches/91706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzxhperg.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-09T17:59:31","name":"[2/2] aarch64: Improve register allocation for lane instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzxhperg.fsf@arm.com/mbox/"},{"id":91711,"url":"https://patchwork.plctlab.org/api/1.2/patches/91711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509182823.726391-1-christophe.lyon@arm.com/","msgid":"<20230509182823.726391-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-09T18:28:23","name":"[v2,06/16] arm: add smax/smin expanders for v*hf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509182823.726391-1-christophe.lyon@arm.com/mbox/"},{"id":91724,"url":"https://patchwork.plctlab.org/api/1.2/patches/91724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFqdnW1JY7nR1bii@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-09T19:23:09","name":"c++, v2: Reject attributes without arguments used as pack expansion [PR109756]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFqdnW1JY7nR1bii@tucnak/mbox/"},{"id":91730,"url":"https://patchwork.plctlab.org/api/1.2/patches/91730/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509194158.329137-1-polacek@redhat.com/","msgid":"<20230509194158.329137-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-09T19:41:58","name":"configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509194158.329137-1-polacek@redhat.com/mbox/"},{"id":91731,"url":"https://patchwork.plctlab.org/api/1.2/patches/91731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509195345.561522-1-jwakely@redhat.com/","msgid":"<20230509195345.561522-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-09T19:53:45","name":"[committed] libstdc++: Fix pretty printers and add tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230509195345.561522-1-jwakely@redhat.com/mbox/"},{"id":91784,"url":"https://patchwork.plctlab.org/api/1.2/patches/91784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510003326.8B65620423@pchp3.se.axis.com/","msgid":"<20230510003326.8B65620423@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-05-10T00:33:26","name":"[committed] CRIS: Fix ccmode typo in cris_postdbr_cmpelim","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510003326.8B65620423@pchp3.se.axis.com/mbox/"},{"id":91787,"url":"https://patchwork.plctlab.org/api/1.2/patches/91787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB348450698DEB069F231AF92E91779@MN0PR21MB3484.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T01:38:08","name":"Fixes and workarounds for warnings during autoprofiledbootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB348450698DEB069F231AF92E91779@MN0PR21MB3484.namprd21.prod.outlook.com/mbox/"},{"id":91795,"url":"https://patchwork.plctlab.org/api/1.2/patches/91795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510021826.31920-1-xuli1@eswincomputing.com/","msgid":"<20230510021826.31920-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-05-10T02:18:26","name":"RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instructions satisfying REG_P(operand[1]) in -O0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510021826.31920-1-xuli1@eswincomputing.com/mbox/"},{"id":91834,"url":"https://patchwork.plctlab.org/api/1.2/patches/91834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040035.2972636-1-juzhe.zhong@rivai.ai/","msgid":"<20230510040035.2972636-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-10T04:00:35","name":"RISC-V: Support const series vector for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040035.2972636-1-juzhe.zhong@rivai.ai/mbox/"},{"id":91835,"url":"https://patchwork.plctlab.org/api/1.2/patches/91835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040213.7313-1-xuli1@eswincomputing.com/","msgid":"<20230510040213.7313-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-05-10T04:02:13","name":"[V2] RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instructions satisfying REG_P(operand[1]) in -O0.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510040213.7313-1-xuli1@eswincomputing.com/mbox/"},{"id":91857,"url":"https://patchwork.plctlab.org/api/1.2/patches/91857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3eb53fe-b930-5162-656e-8adfdb31e797@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T04:59:19","name":"_Hashtable implementation cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f3eb53fe-b930-5162-656e-8adfdb31e797@gmail.com/mbox/"},{"id":91865,"url":"https://patchwork.plctlab.org/api/1.2/patches/91865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510050748.1308816-1-apinski@marvell.com/","msgid":"<20230510050748.1308816-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-10T05:07:48","name":"[Committed] New testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510050748.1308816-1-apinski@marvell.com/mbox/"},{"id":91913,"url":"https://patchwork.plctlab.org/api/1.2/patches/91913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510071758.2098860-1-pan2.li@intel.com/","msgid":"<20230510071758.2098860-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T07:17:58","name":"Var-Tracking: Leverage pointer_mux for decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510071758.2098860-1-pan2.li@intel.com/mbox/"},{"id":91936,"url":"https://patchwork.plctlab.org/api/1.2/patches/91936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs84sjxl.fsf@euler.schwinge.homeip.net/","msgid":"<87fs84sjxl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-10T07:51:50","name":"Testsuite: Add '\''torture-init-done'\'', and use it to conditionalize implicit '\''torture-init'\'' (was: Testsuite: Add missing '\''torture-init'\''/'\''torture-finish'\'' around '\''LTO_TORTURE_OPTIONS'\'' usage (was: Let each '\''lto_init'\'' determine the default '\''LTO_OPTIONS'\'', and '\''to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs84sjxl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":91977,"url":"https://patchwork.plctlab.org/api/1.2/patches/91977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510090758.3737162-1-hongtao.liu@intel.com/","msgid":"<20230510090758.3737162-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-10T09:07:58","name":"x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510090758.3737162-1-hongtao.liu@intel.com/mbox/"},{"id":92006,"url":"https://patchwork.plctlab.org/api/1.2/patches/92006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFtow4ihR8drfg7g@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-10T09:49:55","name":"ipa-prop: Fix ipa_get_callee_param_type for calls with argument type mismatches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFtow4ihR8drfg7g@tucnak/mbox/"},{"id":92013,"url":"https://patchwork.plctlab.org/api/1.2/patches/92013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/830f90ea-6278-f757-4642-cca654edd736@in.tum.de/","msgid":"<830f90ea-6278-f757-4642-cca654edd736@in.tum.de>","list_archive_url":null,"date":"2023-05-10T10:49:46","name":"fix radix sort on 32bit platforms [PR109670]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/830f90ea-6278-f757-4642-cca654edd736@in.tum.de/mbox/"},{"id":92032,"url":"https://patchwork.plctlab.org/api/1.2/patches/92032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510112009.633444-1-jwakely@redhat.com/","msgid":"<20230510112009.633444-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-10T11:20:09","name":"[RFC] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510112009.633444-1-jwakely@redhat.com/mbox/"},{"id":92051,"url":"https://patchwork.plctlab.org/api/1.2/patches/92051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com/","msgid":"<6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com>","list_archive_url":null,"date":"2023-05-10T11:46:41","name":"[committed] Fix a couple constraints on the H8 in preparation for LRA conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6825e5d6-632e-1cf2-77cc-51e5ef4179ac@gmail.com/mbox/"},{"id":92065,"url":"https://patchwork.plctlab.org/api/1.2/patches/92065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510115705.2420805-1-pan2.li@intel.com/","msgid":"<20230510115705.2420805-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T11:57:05","name":"[v2] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510115705.2420805-1-pan2.li@intel.com/mbox/"},{"id":92080,"url":"https://patchwork.plctlab.org/api/1.2/patches/92080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510130543.4026214-1-juzhe.zhong@rivai.ai/","msgid":"<20230510130543.4026214-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-10T13:05:43","name":"RISC-V: Add basic vec_init support for RVV auto-vectorizaiton","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510130543.4026214-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92085,"url":"https://patchwork.plctlab.org/api/1.2/patches/92085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-1-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:17","name":"[01/20] arm: [MVE intrinsics] factorize vcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-1-christophe.lyon@arm.com/mbox/"},{"id":92105,"url":"https://patchwork.plctlab.org/api/1.2/patches/92105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-2-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:18","name":"[02/20] arm: [MVE intrinsics] add cmp shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-2-christophe.lyon@arm.com/mbox/"},{"id":92119,"url":"https://patchwork.plctlab.org/api/1.2/patches/92119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-3-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:19","name":"[03/20] arm: [MVE intrinsics] rework vcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-3-christophe.lyon@arm.com/mbox/"},{"id":92096,"url":"https://patchwork.plctlab.org/api/1.2/patches/92096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-4-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:20","name":"[04/20] arm: [MVE intrinsics] factorize vrev16q vrev32q vrev64q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-4-christophe.lyon@arm.com/mbox/"},{"id":92118,"url":"https://patchwork.plctlab.org/api/1.2/patches/92118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-5-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:21","name":"[05/20] arm: [MVE intrinsics] rework vrev16q vrev32q vrev64q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-5-christophe.lyon@arm.com/mbox/"},{"id":92094,"url":"https://patchwork.plctlab.org/api/1.2/patches/92094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-6-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:22","name":"[06/20] arm: [MVE intrinsics] factorize vdupq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-6-christophe.lyon@arm.com/mbox/"},{"id":92101,"url":"https://patchwork.plctlab.org/api/1.2/patches/92101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-7-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:23","name":"[07/20] arm: [MVE intrinsics] add unary_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-7-christophe.lyon@arm.com/mbox/"},{"id":92110,"url":"https://patchwork.plctlab.org/api/1.2/patches/92110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-8-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:24","name":"[08/20] arm: [MVE intrinsics] rework vdupq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-8-christophe.lyon@arm.com/mbox/"},{"id":92091,"url":"https://patchwork.plctlab.org/api/1.2/patches/92091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-9-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:25","name":"[09/20] arm: [MVE intrinsics] factorize vaddvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-9-christophe.lyon@arm.com/mbox/"},{"id":92102,"url":"https://patchwork.plctlab.org/api/1.2/patches/92102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-10-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:26","name":"[10/20] arm: [MVE intrinsics] add unary_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-10-christophe.lyon@arm.com/mbox/"},{"id":92087,"url":"https://patchwork.plctlab.org/api/1.2/patches/92087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-11-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:27","name":"[11/20] arm: [MVE intrinsics] rework vaddvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-11-christophe.lyon@arm.com/mbox/"},{"id":92116,"url":"https://patchwork.plctlab.org/api/1.2/patches/92116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-12-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:28","name":"[12/20] arm: [MVE intrinsics] factorize vaddvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-12-christophe.lyon@arm.com/mbox/"},{"id":92113,"url":"https://patchwork.plctlab.org/api/1.2/patches/92113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-13-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:29","name":"[13/20] arm: [MVE intrinsics] add unary_int32_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-13-christophe.lyon@arm.com/mbox/"},{"id":92103,"url":"https://patchwork.plctlab.org/api/1.2/patches/92103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-14-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:30","name":"[14/20] arm: [MVE intrinsics] rework vaddvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-14-christophe.lyon@arm.com/mbox/"},{"id":92099,"url":"https://patchwork.plctlab.org/api/1.2/patches/92099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-15-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:31","name":"[15/20] arm: [MVE intrinsics] add unary_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-15-christophe.lyon@arm.com/mbox/"},{"id":92104,"url":"https://patchwork.plctlab.org/api/1.2/patches/92104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-16-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:32","name":"[16/20] arm: [MVE intrinsics] factorize vaddlvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-16-christophe.lyon@arm.com/mbox/"},{"id":92108,"url":"https://patchwork.plctlab.org/api/1.2/patches/92108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-17-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:33","name":"[17/20] arm: [MVE intrinsics] rework vaddlvq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-17-christophe.lyon@arm.com/mbox/"},{"id":92107,"url":"https://patchwork.plctlab.org/api/1.2/patches/92107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-18-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:34","name":"[18/20] arm: [MVE intrinsics] factorize vmovlbq vmovltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-18-christophe.lyon@arm.com/mbox/"},{"id":92106,"url":"https://patchwork.plctlab.org/api/1.2/patches/92106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-19-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:35","name":"[19/20] arm: [MVE intrinsics] add unary_widen shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-19-christophe.lyon@arm.com/mbox/"},{"id":92098,"url":"https://patchwork.plctlab.org/api/1.2/patches/92098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-20-christophe.lyon@arm.com/","msgid":"<20230510133036.596530-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-10T13:30:36","name":"[20/20] arm: [MVE intrinsics] rework vmovlbq vmovltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510133036.596530-20-christophe.lyon@arm.com/mbox/"},{"id":92120,"url":"https://patchwork.plctlab.org/api/1.2/patches/92120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510134600.D4AE13851C12@sourceware.org/","msgid":"<20230510134600.D4AE13851C12@sourceware.org>","list_archive_url":null,"date":"2023-05-10T13:43:34","name":"Avoid g++.dg/torture/pr106922.C FAIL with the pre-C++11 ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510134600.D4AE13851C12@sourceware.org/mbox/"},{"id":92163,"url":"https://patchwork.plctlab.org/api/1.2/patches/92163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com/","msgid":"<000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T14:46:10","name":"[take,#3] match.pd: Simplify popcount/parity of bswap/rotate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000a01d9834e$2a7811e0$7f6835a0$@nextmovesoftware.com/mbox/"},{"id":92170,"url":"https://patchwork.plctlab.org/api/1.2/patches/92170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-1-jason@redhat.com/","msgid":"<20230510150441.850396-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:04:40","name":"[pushed,1/2] c++: always check consteval address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-1-jason@redhat.com/mbox/"},{"id":92171,"url":"https://patchwork.plctlab.org/api/1.2/patches/92171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-2-jason@redhat.com/","msgid":"<20230510150441.850396-2-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:04:41","name":"[pushed,2/2] c++: be stricter about constinit [CWG2543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510150441.850396-2-jason@redhat.com/mbox/"},{"id":92175,"url":"https://patchwork.plctlab.org/api/1.2/patches/92175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510152356.2623391-1-pan2.li@intel.com/","msgid":"<20230510152356.2623391-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T15:23:56","name":"[v3] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510152356.2623391-1-pan2.li@intel.com/mbox/"},{"id":92176,"url":"https://patchwork.plctlab.org/api/1.2/patches/92176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com/","msgid":"<0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com>","list_archive_url":null,"date":"2023-05-10T15:24:30","name":"riscv: Add vectorized binops and insn_expander helpers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0886290d-0b1f-7aee-23b0-43c3dac852b5@gmail.com/mbox/"},{"id":92179,"url":"https://patchwork.plctlab.org/api/1.2/patches/92179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfb0414-4cc5-e613-5115-99f02970c058@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:24:40","name":"riscv: Clarify vlmax and length handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecfb0414-4cc5-e613-5115-99f02970c058@gmail.com/mbox/"},{"id":92177,"url":"https://patchwork.plctlab.org/api/1.2/patches/92177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com/","msgid":"<75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com>","list_archive_url":null,"date":"2023-05-10T15:24:50","name":"riscv: Split off shift patterns for autovectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/75805840-7b6b-7194-cae1-02eea3ea181c@gmail.com/mbox/"},{"id":92178,"url":"https://patchwork.plctlab.org/api/1.2/patches/92178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbec9930-ad79-6d20-1d1d-c9457331fafb@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:24:57","name":"riscv: Add autovectorization tests for binary integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbec9930-ad79-6d20-1d1d-c9457331fafb@gmail.com/mbox/"},{"id":92181,"url":"https://patchwork.plctlab.org/api/1.2/patches/92181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510153604.311723-1-ppalka@redhat.com/","msgid":"<20230510153604.311723-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-10T15:36:04","name":"c++: converted lambda as template argument [PR83258, ...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510153604.311723-1-ppalka@redhat.com/mbox/"},{"id":92183,"url":"https://patchwork.plctlab.org/api/1.2/patches/92183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFu60EPEOJTV/GA1@toto.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:40:00","name":"[V5,2/2] PR target/105325: Fix memory constraints for power10 fusion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFu60EPEOJTV/GA1@toto.the-meissners.org/mbox/"},{"id":92190,"url":"https://patchwork.plctlab.org/api/1.2/patches/92190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMnH0NAvR-5Zqo9W76C1LPnfDroEk_O+D8HPqwuW1xPBA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T15:50:37","name":"RISC-V: Remove masking third operand of rotate instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMnH0NAvR-5Zqo9W76C1LPnfDroEk_O+D8HPqwuW1xPBA@mail.gmail.com/mbox/"},{"id":92200,"url":"https://patchwork.plctlab.org/api/1.2/patches/92200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510161009.2653550-1-pan2.li@intel.com/","msgid":"<20230510161009.2653550-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-10T16:10:09","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510161009.2653550-1-pan2.li@intel.com/mbox/"},{"id":92212,"url":"https://patchwork.plctlab.org/api/1.2/patches/92212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164719.155783-1-rep.dot.nop@gmail.com/","msgid":"<20230510164719.155783-1-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:47:19","name":"[v2] Fortran: Narrow return types [PR78798]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164719.155783-1-rep.dot.nop@gmail.com/mbox/"},{"id":92213,"url":"https://patchwork.plctlab.org/api/1.2/patches/92213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-1-rep.dot.nop@gmail.com/","msgid":"<20230510164841.155816-1-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:48:40","name":"[1/2] Fortran: dump-parse-tree attribs: fix unbalanced braces [PR109624]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-1-rep.dot.nop@gmail.com/mbox/"},{"id":92214,"url":"https://patchwork.plctlab.org/api/1.2/patches/92214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-2-rep.dot.nop@gmail.com/","msgid":"<20230510164841.155816-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-10T16:48:41","name":"[2/2] Fortran: dump-parse-tree: Mark debug functions with DEBUG_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510164841.155816-2-rep.dot.nop@gmail.com/mbox/"},{"id":92252,"url":"https://patchwork.plctlab.org/api/1.2/patches/92252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510180006.1340377-1-apinski@marvell.com/","msgid":"<20230510180006.1340377-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-10T18:00:06","name":"Add another new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510180006.1340377-1-apinski@marvell.com/mbox/"},{"id":92253,"url":"https://patchwork.plctlab.org/api/1.2/patches/92253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db7ba137fbb7b94404c2131ea8e93565803081d7.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T18:06:22","name":"rs6000: Fix __builtin_vec_xst_trunc definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db7ba137fbb7b94404c2131ea8e93565803081d7.camel@us.ibm.com/mbox/"},{"id":92278,"url":"https://patchwork.plctlab.org/api/1.2/patches/92278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000001d98374$7971dad0$6c559070$@nextmovesoftware.com/","msgid":"<000001d98374$7971dad0$6c559070$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T19:20:23","name":"[x86_64] Use [(const_int 0)] idiom consistently in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000001d98374$7971dad0$6c559070$@nextmovesoftware.com/mbox/"},{"id":92291,"url":"https://patchwork.plctlab.org/api/1.2/patches/92291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aV=ooqGYrVayfHtRT-0nPgqSP09CD0qLMz74hxuS2y2w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T20:45:01","name":"i386: Add missing vector extend patterns [PR92658]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aV=ooqGYrVayfHtRT-0nPgqSP09CD0qLMz74hxuS2y2w@mail.gmail.com/mbox/"},{"id":92294,"url":"https://patchwork.plctlab.org/api/1.2/patches/92294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510210731.975161-1-jason@redhat.com/","msgid":"<20230510210731.975161-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-10T21:07:31","name":"[pushed] c++: adjust conversion diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230510210731.975161-1-jason@redhat.com/mbox/"},{"id":92305,"url":"https://patchwork.plctlab.org/api/1.2/patches/92305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFwMeKCu4OnsPPaE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-10T21:28:24","name":"[v2] c++: wrong std::is_convertible with cv-qual fn [PR109680]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFwMeKCu4OnsPPaE@redhat.com/mbox/"},{"id":92307,"url":"https://patchwork.plctlab.org/api/1.2/patches/92307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com/","msgid":"<02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-10T21:53:49","name":"match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount(X)+popcount(Y)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02ac01d98389$e92e1590$bb8a40b0$@nextmovesoftware.com/mbox/"},{"id":92346,"url":"https://patchwork.plctlab.org/api/1.2/patches/92346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511022818.3211659-1-pan2.li@intel.com/","msgid":"<20230511022818.3211659-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T02:28:18","name":"[v4] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511022818.3211659-1-pan2.li@intel.com/mbox/"},{"id":92348,"url":"https://patchwork.plctlab.org/api/1.2/patches/92348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031354.282014-1-juzhe.zhong@rivai.ai/","msgid":"<20230511031354.282014-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T03:13:54","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031354.282014-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92349,"url":"https://patchwork.plctlab.org/api/1.2/patches/92349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031447.286664-1-juzhe.zhong@rivai.ai/","msgid":"<20230511031447.286664-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T03:14:47","name":"[commited] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511031447.286664-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92351,"url":"https://patchwork.plctlab.org/api/1.2/patches/92351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511033829.39575-1-kito.cheng@sifive.com/","msgid":"<20230511033829.39575-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-11T03:38:30","name":"[committed,v2] RISC-V: Support const series vector for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511033829.39575-1-kito.cheng@sifive.com/mbox/"},{"id":92355,"url":"https://patchwork.plctlab.org/api/1.2/patches/92355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511051244.1068441-1-juzhe.zhong@rivai.ai/","msgid":"<20230511051244.1068441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T05:12:44","name":"[V5] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511051244.1068441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92366,"url":"https://patchwork.plctlab.org/api/1.2/patches/92366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511062137.3451855-1-pan2.li@intel.com/","msgid":"<20230511062137.3451855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T06:21:37","name":"[v5] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511062137.3451855-1-pan2.li@intel.com/mbox/"},{"id":92433,"url":"https://patchwork.plctlab.org/api/1.2/patches/92433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada6da15-ba5e-1959-91ae-3ed9c44faf1f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T08:29:16","name":"mklog.py: Add --commit option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ada6da15-ba5e-1959-91ae-3ed9c44faf1f@gmail.com/mbox/"},{"id":92445,"url":"https://patchwork.plctlab.org/api/1.2/patches/92445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511092420.1779593-1-juzhe.zhong@rivai.ai/","msgid":"<20230511092420.1779593-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T09:24:20","name":"[V2] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511092420.1779593-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92452,"url":"https://patchwork.plctlab.org/api/1.2/patches/92452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511093852.291864-1-juzhe.zhong@rivai.ai/","msgid":"<20230511093852.291864-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T09:38:52","name":"[V6] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511093852.291864-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92472,"url":"https://patchwork.plctlab.org/api/1.2/patches/92472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-1-lili.cui@intel.com/","msgid":"<20230511101201.2052667-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T10:12:00","name":"[1/2] PR gcc/98350:Add a param to control the length of the chain with FMA in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-1-lili.cui@intel.com/mbox/"},{"id":92471,"url":"https://patchwork.plctlab.org/api/1.2/patches/92471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-2-lili.cui@intel.com/","msgid":"<20230511101201.2052667-2-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T10:12:01","name":"[2/2] Add a tune option to control the length of the chain with FMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511101201.2052667-2-lili.cui@intel.com/mbox/"},{"id":92473,"url":"https://patchwork.plctlab.org/api/1.2/patches/92473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c510c333-a863-6aa0-5a40-5177d5b45094@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T10:26:55","name":"[v2] RISC-V: Add vectorized binops and insn_expander helpers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c510c333-a863-6aa0-5a40-5177d5b45094@gmail.com/mbox/"},{"id":92474,"url":"https://patchwork.plctlab.org/api/1.2/patches/92474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com/","msgid":"<2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com>","list_archive_url":null,"date":"2023-05-11T10:27:50","name":"[v2] RISC-V: Add autovectorization tests for binary integer, operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d3b5b57-cc1c-aee1-ea70-99a3fae02dff@gmail.com/mbox/"},{"id":92475,"url":"https://patchwork.plctlab.org/api/1.2/patches/92475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e21778f9-94f2-9452-f2fd-270322ab88e8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T10:29:54","name":"[v2] RISC-V: Clarify vlmax and length handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e21778f9-94f2-9452-f2fd-270322ab88e8@gmail.com/mbox/"},{"id":92476,"url":"https://patchwork.plctlab.org/api/1.2/patches/92476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com/","msgid":"<22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com>","list_archive_url":null,"date":"2023-05-11T10:33:50","name":"[v2] RISC-V: Split off shift patterns for autovectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22063fee-8e38-6da4-8658-4e7c80a3199e@gmail.com/mbox/"},{"id":92482,"url":"https://patchwork.plctlab.org/api/1.2/patches/92482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511110939.1994129-1-pan2.li@intel.com/","msgid":"<20230511110939.1994129-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T11:09:39","name":"[committed] VECT: Add tree_code into \"creat_iv\" and allow it can handle MINUS_EXPR IV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511110939.1994129-1-pan2.li@intel.com/mbox/"},{"id":92483,"url":"https://patchwork.plctlab.org/api/1.2/patches/92483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFzOQqRuXWoRXHsG@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T11:15:14","name":"arm: Fix ICE due to infinite splitting [PR109800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZFzOQqRuXWoRXHsG@arm.com/mbox/"},{"id":92485,"url":"https://patchwork.plctlab.org/api/1.2/patches/92485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt2bf69o.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T11:37:39","name":"aarch64: Remove alignment assertions [PR109661]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmt2bf69o.fsf@arm.com/mbox/"},{"id":92488,"url":"https://patchwork.plctlab.org/api/1.2/patches/92488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511115636.964614-1-jwakely@redhat.com/","msgid":"<20230511115636.964614-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T11:56:36","name":"[committed] libstdc++: Fix std::abs(__float128) for -NaN and -0.0 [PR109758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511115636.964614-1-jwakely@redhat.com/mbox/"},{"id":92508,"url":"https://patchwork.plctlab.org/api/1.2/patches/92508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-1-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:56","name":"[01/24] arm: [MVE intrinsics] factorize vaddlvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-1-christophe.lyon@arm.com/mbox/"},{"id":92509,"url":"https://patchwork.plctlab.org/api/1.2/patches/92509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-2-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:57","name":"[02/24] arm: [MVE intrinsics] add unary_widen_acc shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-2-christophe.lyon@arm.com/mbox/"},{"id":92515,"url":"https://patchwork.plctlab.org/api/1.2/patches/92515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-3-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:58","name":"[03/24] arm: [MVE intrinsics] rework vaddlvaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-3-christophe.lyon@arm.com/mbox/"},{"id":92514,"url":"https://patchwork.plctlab.org/api/1.2/patches/92514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-4-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:18:59","name":"[04/24] arm: [MVE intrinsics] add binary_acc_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-4-christophe.lyon@arm.com/mbox/"},{"id":92513,"url":"https://patchwork.plctlab.org/api/1.2/patches/92513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-5-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:00","name":"[05/24] arm: [MVE intrinsics] factorize vmladav vmladavx vmlsdav vmlsdavx vmladava vmladavax vmlsdava vmlsdavax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-5-christophe.lyon@arm.com/mbox/"},{"id":92521,"url":"https://patchwork.plctlab.org/api/1.2/patches/92521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-6-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:01","name":"[06/24] arm: [MVE intrinsics] rework vmladavq vmladavxq vmlsdavq vmlsdavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-6-christophe.lyon@arm.com/mbox/"},{"id":92511,"url":"https://patchwork.plctlab.org/api/1.2/patches/92511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-7-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:02","name":"[07/24] arm: [MVE intrinsics] add binary_acca_int32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-7-christophe.lyon@arm.com/mbox/"},{"id":92547,"url":"https://patchwork.plctlab.org/api/1.2/patches/92547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-8-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:03","name":"[08/24] arm: [MVE intrinsics] rework vmladavaq vmladavaxq vmlsdavaq vmlsdavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-8-christophe.lyon@arm.com/mbox/"},{"id":92516,"url":"https://patchwork.plctlab.org/api/1.2/patches/92516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-9-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:04","name":"[09/24] arm: [MVE intrinsics] factorize vabavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-9-christophe.lyon@arm.com/mbox/"},{"id":92524,"url":"https://patchwork.plctlab.org/api/1.2/patches/92524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-10-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:05","name":"[10/24] arm: [MVE intrinsics] rework vabavq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-10-christophe.lyon@arm.com/mbox/"},{"id":92523,"url":"https://patchwork.plctlab.org/api/1.2/patches/92523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-11-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:06","name":"[11/24] arm: [MVE intrinsics] add binary_acc_int64 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-11-christophe.lyon@arm.com/mbox/"},{"id":92512,"url":"https://patchwork.plctlab.org/api/1.2/patches/92512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-12-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:07","name":"[12/24] arm: [MVE intrinsics] factorize vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-12-christophe.lyon@arm.com/mbox/"},{"id":92518,"url":"https://patchwork.plctlab.org/api/1.2/patches/92518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-13-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:08","name":"[13/24] arm: [MVE intrinsics] rework vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-13-christophe.lyon@arm.com/mbox/"},{"id":92522,"url":"https://patchwork.plctlab.org/api/1.2/patches/92522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-14-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:09","name":"[14/24] arm: [MVE intrinsics] factorize vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-14-christophe.lyon@arm.com/mbox/"},{"id":92544,"url":"https://patchwork.plctlab.org/api/1.2/patches/92544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-15-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:10","name":"[15/24] arm: [MVE intrinsics] rework vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-15-christophe.lyon@arm.com/mbox/"},{"id":92517,"url":"https://patchwork.plctlab.org/api/1.2/patches/92517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-16-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:11","name":"[16/24] arm: [MVE intrinsics] add binary_acca_int64 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-16-christophe.lyon@arm.com/mbox/"},{"id":92542,"url":"https://patchwork.plctlab.org/api/1.2/patches/92542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-17-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:12","name":"[17/24] arm: [MVE intrinsics] factorize vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-17-christophe.lyon@arm.com/mbox/"},{"id":92538,"url":"https://patchwork.plctlab.org/api/1.2/patches/92538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-18-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:13","name":"[18/24] arm: [MVE intrinsics] rework vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-18-christophe.lyon@arm.com/mbox/"},{"id":92532,"url":"https://patchwork.plctlab.org/api/1.2/patches/92532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-19-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:14","name":"[19/24] arm: [MVE intrinsics] add ternary shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-19-christophe.lyon@arm.com/mbox/"},{"id":92519,"url":"https://patchwork.plctlab.org/api/1.2/patches/92519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-20-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:15","name":"[20/24] arm: [MVE intrinsics] factorize vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-20-christophe.lyon@arm.com/mbox/"},{"id":92530,"url":"https://patchwork.plctlab.org/api/1.2/patches/92530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-21-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:16","name":"[21/24] arm: [MVE intrinsics] rework vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-21-christophe.lyon@arm.com/mbox/"},{"id":92520,"url":"https://patchwork.plctlab.org/api/1.2/patches/92520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-22-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:17","name":"[22/24] arm: [MVE intrinsics] add ternary_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-22-christophe.lyon@arm.com/mbox/"},{"id":92531,"url":"https://patchwork.plctlab.org/api/1.2/patches/92531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-23-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:18","name":"[23/24] arm: [MVE intrinsics] factorize vmlaq_n vmlasq_n vqdmlahq_n vqdmlashq_n vqrdmlahq_n vqrdmlashq_n","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-23-christophe.lyon@arm.com/mbox/"},{"id":92548,"url":"https://patchwork.plctlab.org/api/1.2/patches/92548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-24-christophe.lyon@arm.com/","msgid":"<20230511121919.16923-24-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-11T12:19:19","name":"[24/24] arm: [MVE intrinsics] rework vmlaq vmlasq vqdmlahq vqdmlashq vqrdmlahq vqrdmlashq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511121919.16923-24-christophe.lyon@arm.com/mbox/"},{"id":92549,"url":"https://patchwork.plctlab.org/api/1.2/patches/92549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511122641.2323840-1-pan2.li@intel.com/","msgid":"<20230511122641.2323840-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T12:26:41","name":"[committed] RISC-V: Update RVV integer compare simplification comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511122641.2323840-1-pan2.li@intel.com/mbox/"},{"id":92550,"url":"https://patchwork.plctlab.org/api/1.2/patches/92550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com/","msgid":"<2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com>","list_archive_url":null,"date":"2023-05-11T12:33:09","name":"[Commited] MAINTAINERS: Fix alphabetic sorting.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a494c82-09c6-dca5-3c32-a0f4eae2c69f@gmail.com/mbox/"},{"id":92555,"url":"https://patchwork.plctlab.org/api/1.2/patches/92555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com/","msgid":"<3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com>","list_archive_url":null,"date":"2023-05-11T12:47:24","name":"[v2] RISC-V: Allow vector constants in riscv_const_insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd0d367-8ea4-3446-abe6-a7c7a5065248@gmail.com/mbox/"},{"id":92556,"url":"https://patchwork.plctlab.org/api/1.2/patches/92556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511125404.2504388-1-pan2.li@intel.com/","msgid":"<20230511125404.2504388-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-11T12:54:04","name":"[v6] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511125404.2504388-1-pan2.li@intel.com/mbox/"},{"id":92642,"url":"https://patchwork.plctlab.org/api/1.2/patches/92642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com/","msgid":"<02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-11T14:21:41","name":"[x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c401d98413$e8c91e80$ba5b5b80$@nextmovesoftware.com/mbox/"},{"id":92658,"url":"https://patchwork.plctlab.org/api/1.2/patches/92658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511144027.593130-1-ppalka@redhat.com/","msgid":"<20230511144027.593130-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-11T14:40:27","name":"[pushed] c++: Add testcase for already fixed PR [PR103807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511144027.593130-1-ppalka@redhat.com/mbox/"},{"id":92694,"url":"https://patchwork.plctlab.org/api/1.2/patches/92694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511151719.1394582-1-apinski@marvell.com/","msgid":"<20230511151719.1394582-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-11T15:17:19","name":"Improve simple_dce for phis that only used in itself","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511151719.1394582-1-apinski@marvell.com/mbox/"},{"id":92697,"url":"https://patchwork.plctlab.org/api/1.2/patches/92697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511152356.2116735-1-lili.cui@intel.com/","msgid":"<20230511152356.2116735-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-11T15:23:56","name":"[PATCH1/2] PR gcc/98350:Add a param to control the length of the chain with FMA in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511152356.2116735-1-lili.cui@intel.com/mbox/"},{"id":92720,"url":"https://patchwork.plctlab.org/api/1.2/patches/92720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511155317.1002581-1-jwakely@redhat.com/","msgid":"<20230511155317.1002581-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T15:53:17","name":"[wwwdocs] Document libstdc++ freestanding changes in gcc-13","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511155317.1002581-1-jwakely@redhat.com/mbox/"},{"id":92722,"url":"https://patchwork.plctlab.org/api/1.2/patches/92722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511162738.1482389-1-juzhe.zhong@rivai.ai/","msgid":"<20230511162738.1482389-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T16:27:38","name":"[V5] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511162738.1482389-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92741,"url":"https://patchwork.plctlab.org/api/1.2/patches/92741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXUP=a+EtCxoPUJV_wuTsrPdhyE6QWxw0vyDmmEUsGGvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T16:54:07","name":"libgo patch committed: Add syscall.prlimit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXUP=a+EtCxoPUJV_wuTsrPdhyE6QWxw0vyDmmEUsGGvw@mail.gmail.com/mbox/"},{"id":92806,"url":"https://patchwork.plctlab.org/api/1.2/patches/92806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511182555.26183-1-palmer@rivosinc.com/","msgid":"<20230511182555.26183-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-05-11T18:25:56","name":"RISC-V: Add v_uimm_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511182555.26183-1-palmer@rivosinc.com/mbox/"},{"id":92812,"url":"https://patchwork.plctlab.org/api/1.2/patches/92812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511183006.1565721-1-ppalka@redhat.com/","msgid":"<20230511183006.1565721-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-11T18:30:06","name":"c++: '\''mutable'\'' subobject of constexpr variable [PR109745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511183006.1565721-1-ppalka@redhat.com/mbox/"},{"id":92821,"url":"https://patchwork.plctlab.org/api/1.2/patches/92821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bY-ChBDrQ0SG+KkCGpZZ_74+PFr8sTVGNWzzWKvmbMkg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T18:56:30","name":"i386: Handle V4HI and V2SImode in ix86_widen_mult_cost [PR109807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bY-ChBDrQ0SG+KkCGpZZ_74+PFr8sTVGNWzzWKvmbMkg@mail.gmail.com/mbox/"},{"id":92844,"url":"https://patchwork.plctlab.org/api/1.2/patches/92844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511201847.1056247-1-jwakely@redhat.com/","msgid":"<20230511201847.1056247-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:18:47","name":"[committed] libstdc++: Enforce value_type consistency in strings and streams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511201847.1056247-1-jwakely@redhat.com/mbox/"},{"id":92845,"url":"https://patchwork.plctlab.org/api/1.2/patches/92845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202029.1058974-1-jwakely@redhat.com/","msgid":"<20230511202029.1058974-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:20:29","name":"[committed] libstdc++: Fix chrono::hh_mm_ss::subseconds() [PR109772]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202029.1058974-1-jwakely@redhat.com/mbox/"},{"id":92846,"url":"https://patchwork.plctlab.org/api/1.2/patches/92846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202125.1059353-1-jwakely@redhat.com/","msgid":"<20230511202125.1059353-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-11T20:21:25","name":"[committed] libstdc++: Use RAII types in strtod-based std::from_chars implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511202125.1059353-1-jwakely@redhat.com/mbox/"},{"id":92847,"url":"https://patchwork.plctlab.org/api/1.2/patches/92847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4n6MiTz2iV5Ef9HoupLdub65_A8MbY_1dmg+7sLKOOKCQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-11T20:52:22","name":"[v2] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4n6MiTz2iV5Ef9HoupLdub65_A8MbY_1dmg+7sLKOOKCQ@mail.gmail.com/mbox/"},{"id":92868,"url":"https://patchwork.plctlab.org/api/1.2/patches/92868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511222848.15044-1-palmer@rivosinc.com/","msgid":"<20230511222848.15044-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-05-11T22:28:49","name":"[v2] RISC-V: Add vector_scalar_shift_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511222848.15044-1-palmer@rivosinc.com/mbox/"},{"id":92870,"url":"https://patchwork.plctlab.org/api/1.2/patches/92870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511231126.1594132-1-juzhe.zhong@rivai.ai/","msgid":"<20230511231126.1594132-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:11:26","name":"[V6] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511231126.1594132-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92875,"url":"https://patchwork.plctlab.org/api/1.2/patches/92875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232916.1596624-1-juzhe.zhong@rivai.ai/","msgid":"<20230511232916.1596624-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:29:16","name":"RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232916.1596624-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92876,"url":"https://patchwork.plctlab.org/api/1.2/patches/92876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232933.1596663-1-juzhe.zhong@rivai.ai/","msgid":"<20230511232933.1596663-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-11T23:29:33","name":"RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230511232933.1596663-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92904,"url":"https://patchwork.plctlab.org/api/1.2/patches/92904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512010247.116026-1-juzhe.zhong@rivai.ai/","msgid":"<20230512010247.116026-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T01:02:47","name":"RISC-V: Reorganize binary autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512010247.116026-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92906,"url":"https://patchwork.plctlab.org/api/1.2/patches/92906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512013112.276462-1-juzhe.zhong@rivai.ai/","msgid":"<20230512013112.276462-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T01:31:12","name":"[V2] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512013112.276462-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92907,"url":"https://patchwork.plctlab.org/api/1.2/patches/92907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512014257.4187492-1-pan2.li@intel.com/","msgid":"<20230512014257.4187492-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T01:42:57","name":"[committed] Var-Tracking: Typedef pointer_mux as decl_or_value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512014257.4187492-1-pan2.li@intel.com/mbox/"},{"id":92923,"url":"https://patchwork.plctlab.org/api/1.2/patches/92923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512022432.207773-1-pan2.li@intel.com/","msgid":"<20230512022432.207773-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T02:24:32","name":"[committed] RISC-V: Fix RVV binary auto-vectorizaiton test fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512022432.207773-1-pan2.li@intel.com/mbox/"},{"id":92925,"url":"https://patchwork.plctlab.org/api/1.2/patches/92925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512023253.219569-1-pan2.li@intel.com/","msgid":"<20230512023253.219569-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T02:32:53","name":"[committed] RISC-V: Reorganize binary autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512023253.219569-1-pan2.li@intel.com/mbox/"},{"id":92929,"url":"https://patchwork.plctlab.org/api/1.2/patches/92929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512025645.141049-1-juzhe.zhong@rivai.ai/","msgid":"<20230512025645.141049-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T02:56:45","name":"[V3] RISC-V: Add basic vec_init for VLS RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512025645.141049-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92933,"url":"https://patchwork.plctlab.org/api/1.2/patches/92933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512031045.199419-1-juzhe.zhong@rivai.ai/","msgid":"<20230512031045.199419-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T03:10:45","name":"RISC-V: Fix fail of vmv-imm-rv64.c in rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512031045.199419-1-juzhe.zhong@rivai.ai/mbox/"},{"id":92939,"url":"https://patchwork.plctlab.org/api/1.2/patches/92939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512050016.476110-1-pan2.li@intel.com/","msgid":"<20230512050016.476110-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T05:00:16","name":"Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512050016.476110-1-pan2.li@intel.com/mbox/"},{"id":92940,"url":"https://patchwork.plctlab.org/api/1.2/patches/92940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512054213.2211594-1-hongtao.liu@intel.com/","msgid":"<20230512054213.2211594-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-12T05:42:13","name":"Provide -fcf-protection=branch,return.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512054213.2211594-1-hongtao.liu@intel.com/mbox/"},{"id":92948,"url":"https://patchwork.plctlab.org/api/1.2/patches/92948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:47","name":"[v2,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/979b3959bffd2ee01196b7f23f15bc67c204baef.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92951,"url":"https://patchwork.plctlab.org/api/1.2/patches/92951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:49","name":"[v2,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/29fac431d96e573ab1932a60ce9b9be6a6a600fe.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92952,"url":"https://patchwork.plctlab.org/api/1.2/patches/92952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:50","name":"[v2,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4936fd3f3ee3102bb06ed6ebbe8e9510c79f714f.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92955,"url":"https://patchwork.plctlab.org/api/1.2/patches/92955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:51","name":"[v2,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d147a3b211b1c0de1ff2a8ec25748bd90daf6b2.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92953,"url":"https://patchwork.plctlab.org/api/1.2/patches/92953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:53","name":"[v2,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/254de08464735f76c8ddb28d260c6cc83f0e2eba.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92954,"url":"https://patchwork.plctlab.org/api/1.2/patches/92954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:55","name":"[v2,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/833f5300d5a7dfce1da043d9bf28917fd15648fe.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92947,"url":"https://patchwork.plctlab.org/api/1.2/patches/92947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:56","name":"[v2,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4002df66326dc8be0fcd50c4daca77e599bd422a.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92949,"url":"https://patchwork.plctlab.org/api/1.2/patches/92949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:58","name":"[v2,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873b50976b7503863a13b747f3685c8481c7ef5c.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92956,"url":"https://patchwork.plctlab.org/api/1.2/patches/92956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com/","msgid":"<8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-12T06:18:59","name":"[v2,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cb29d402715bae0ae05e8e6ce8ee75fbe43ac57.1683871682.git.jie.mei@oss.cipunited.com/mbox/"},{"id":92979,"url":"https://patchwork.plctlab.org/api/1.2/patches/92979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6si9fiv.fsf@euler.schwinge.homeip.net/","msgid":"<87h6si9fiv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T07:26:32","name":"libgomp testsuite: Generalize '\''lang_library_path'\'' into a list of '\''lang_library_paths'\'' (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6si9fiv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":92997,"url":"https://patchwork.plctlab.org/api/1.2/patches/92997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkiq9cpa.fsf@euler.schwinge.homeip.net/","msgid":"<87bkiq9cpa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T08:27:29","name":"libgomp testsuite: Have each '\''*.exp'\'' file specify the compiler to use [PR91884] (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkiq9cpa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":93001,"url":"https://patchwork.plctlab.org/api/1.2/patches/93001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cte9cfa.fsf@euler.schwinge.homeip.net/","msgid":"<877cte9cfa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-12T08:33:29","name":"libgomp testsuite: As appropriate, use the '\''gcc'\'', '\''g++'\'', '\''gfortran'\'' driver [PR91884] (was: libgomp testsuite: Have each '\''*.exp'\'' file specify the compiler to use [PR91884] (was: libgomp testsuite: (not) using a specific driver for C++, Fortran?))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cte9cfa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":93005,"url":"https://patchwork.plctlab.org/api/1.2/patches/93005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512085802.84994-1-kito.cheng@sifive.com/","msgid":"<20230512085802.84994-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T08:58:02","name":"[committed] RISC-V: Suppress unused parameter warning in riscv-common.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512085802.84994-1-kito.cheng@sifive.com/mbox/"},{"id":93012,"url":"https://patchwork.plctlab.org/api/1.2/patches/93012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512090443.34123-2-gaofei@eswincomputing.com/","msgid":"<20230512090443.34123-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-05-12T09:04:43","name":"[1/1,V2,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512090443.34123-2-gaofei@eswincomputing.com/mbox/"},{"id":93026,"url":"https://patchwork.plctlab.org/api/1.2/patches/93026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-1-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-1-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:30","name":"[01/26] arm: [MVE intrinsics] add binary_widen_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-1-christophe.lyon@arm.com/mbox/"},{"id":93043,"url":"https://patchwork.plctlab.org/api/1.2/patches/93043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-2-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-2-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:31","name":"[02/26] arm: [MVE intrinsics] factorize vqdmullbq vqdmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-2-christophe.lyon@arm.com/mbox/"},{"id":93036,"url":"https://patchwork.plctlab.org/api/1.2/patches/93036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-3-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-3-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:32","name":"[03/26] arm: [MVE intrinsics] rework vqdmullbq vqdmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-3-christophe.lyon@arm.com/mbox/"},{"id":93037,"url":"https://patchwork.plctlab.org/api/1.2/patches/93037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-4-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-4-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:33","name":"[04/26] arm: [MVE intrinsics] factorize vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-4-christophe.lyon@arm.com/mbox/"},{"id":93035,"url":"https://patchwork.plctlab.org/api/1.2/patches/93035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-5-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-5-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:34","name":"[05/26] arm: [MVE intrinsics] rework vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-5-christophe.lyon@arm.com/mbox/"},{"id":93028,"url":"https://patchwork.plctlab.org/api/1.2/patches/93028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-6-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-6-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:35","name":"[06/26] arm: [MVE intrinsics] add binary_lshift_unsigned shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-6-christophe.lyon@arm.com/mbox/"},{"id":93027,"url":"https://patchwork.plctlab.org/api/1.2/patches/93027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-7-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-7-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:36","name":"[07/26] arm: [MVE intrinsics] factorize vqshluq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-7-christophe.lyon@arm.com/mbox/"},{"id":93048,"url":"https://patchwork.plctlab.org/api/1.2/patches/93048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-8-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-8-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:37","name":"[08/26] arm: [MVE intrinsics] rework vqshluq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-8-christophe.lyon@arm.com/mbox/"},{"id":93025,"url":"https://patchwork.plctlab.org/api/1.2/patches/93025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-9-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-9-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:38","name":"[09/26] arm: [MVE intrinsics] add binary_imm32 shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-9-christophe.lyon@arm.com/mbox/"},{"id":93044,"url":"https://patchwork.plctlab.org/api/1.2/patches/93044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-10-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-10-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:39","name":"[10/26] arm: [MVE intrinsics] factorize vrbsrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-10-christophe.lyon@arm.com/mbox/"},{"id":93039,"url":"https://patchwork.plctlab.org/api/1.2/patches/93039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-11-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-11-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:40","name":"[11/26] arm: [MVE intrinsics] rework vbrsrq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-11-christophe.lyon@arm.com/mbox/"},{"id":93052,"url":"https://patchwork.plctlab.org/api/1.2/patches/93052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-12-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-12-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:41","name":"[12/26] arm: [MVE intrinsics] add mvn shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-12-christophe.lyon@arm.com/mbox/"},{"id":93047,"url":"https://patchwork.plctlab.org/api/1.2/patches/93047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-13-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-13-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:42","name":"[13/26] arm: [MVE intrinsics] factorize vmvnq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-13-christophe.lyon@arm.com/mbox/"},{"id":93053,"url":"https://patchwork.plctlab.org/api/1.2/patches/93053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-14-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-14-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:43","name":"[14/26] arm: [MVE intrinsics] rework vmvnq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-14-christophe.lyon@arm.com/mbox/"},{"id":93049,"url":"https://patchwork.plctlab.org/api/1.2/patches/93049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-15-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-15-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:44","name":"[15/26] arm: [MVE intrinsics] add ternary_opt_n shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-15-christophe.lyon@arm.com/mbox/"},{"id":93059,"url":"https://patchwork.plctlab.org/api/1.2/patches/93059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-16-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-16-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:45","name":"[16/26] arm: [MVE intrinsics] factorize vfmaq vfmsq vfmasq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-16-christophe.lyon@arm.com/mbox/"},{"id":93055,"url":"https://patchwork.plctlab.org/api/1.2/patches/93055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-17-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-17-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:46","name":"[17/26] arm: [MVE intrinsics] rework vfmaq vfmasq vfmsq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-17-christophe.lyon@arm.com/mbox/"},{"id":93051,"url":"https://patchwork.plctlab.org/api/1.2/patches/93051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-18-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-18-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:47","name":"[18/26] arm: [MVE intrinsics] factorize vpselq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-18-christophe.lyon@arm.com/mbox/"},{"id":93042,"url":"https://patchwork.plctlab.org/api/1.2/patches/93042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-19-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-19-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:48","name":"[19/26] arm: [MVE intrinsics] add vpsel shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-19-christophe.lyon@arm.com/mbox/"},{"id":93056,"url":"https://patchwork.plctlab.org/api/1.2/patches/93056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-20-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-20-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:49","name":"[20/26] arm: [MVE intrinsics] rework vpselq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-20-christophe.lyon@arm.com/mbox/"},{"id":93054,"url":"https://patchwork.plctlab.org/api/1.2/patches/93054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-21-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-21-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:50","name":"[21/26] arm: [MVE intrinsics] add ternary_lshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-21-christophe.lyon@arm.com/mbox/"},{"id":93045,"url":"https://patchwork.plctlab.org/api/1.2/patches/93045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-22-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-22-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:51","name":"[22/26] arm: [MVE intrinsics] factorize vsliq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-22-christophe.lyon@arm.com/mbox/"},{"id":93046,"url":"https://patchwork.plctlab.org/api/1.2/patches/93046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-23-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-23-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:52","name":"[23/26] arm: [MVE intrinsics] rework vsliq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-23-christophe.lyon@arm.com/mbox/"},{"id":93050,"url":"https://patchwork.plctlab.org/api/1.2/patches/93050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-24-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-24-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:53","name":"[24/26] arm: [MVE intrinsics] add ternary_rshift shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-24-christophe.lyon@arm.com/mbox/"},{"id":93058,"url":"https://patchwork.plctlab.org/api/1.2/patches/93058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-25-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-25-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:54","name":"[25/26] arm: [MVE intrinsics] factorize vsriq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-25-christophe.lyon@arm.com/mbox/"},{"id":93061,"url":"https://patchwork.plctlab.org/api/1.2/patches/93061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-26-christophe.lyon@arm.com/","msgid":"<20230512093855.79529-26-christophe.lyon@arm.com>","list_archive_url":null,"date":"2023-05-12T09:38:55","name":"[26/26] arm: [MVE intrinsics] rework vsriq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512093855.79529-26-christophe.lyon@arm.com/mbox/"},{"id":93073,"url":"https://patchwork.plctlab.org/api/1.2/patches/93073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512100327.1941926-1-yunqiang.su@cipunited.com/","msgid":"<20230512100327.1941926-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-12T10:03:27","name":"[v3] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512100327.1941926-1-yunqiang.su@cipunited.com/mbox/"},{"id":93111,"url":"https://patchwork.plctlab.org/api/1.2/patches/93111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512103006.1944244-1-yunqiang.su@cipunited.com/","msgid":"<20230512103006.1944244-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-12T10:30:06","name":"[v4] MIPS: add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512103006.1944244-1-yunqiang.su@cipunited.com/mbox/"},{"id":93125,"url":"https://patchwork.plctlab.org/api/1.2/patches/93125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512104412.170581-1-juzhe.zhong@rivai.ai/","msgid":"<20230512104412.170581-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T10:44:12","name":"RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512104412.170581-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93142,"url":"https://patchwork.plctlab.org/api/1.2/patches/93142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512114759.DA50A13499@imap2.suse-dmz.suse.de/","msgid":"<20230512114759.DA50A13499@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-12T11:47:59","name":"tree-optimization/109791 - simplify (unsigned)&foo - (unsigned)(&foo + o)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512114759.DA50A13499@imap2.suse-dmz.suse.de/mbox/"},{"id":93144,"url":"https://patchwork.plctlab.org/api/1.2/patches/93144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512120247.3213280-1-julian@codesourcery.com/","msgid":"<20230512120247.3213280-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-05-12T12:02:47","name":"OpenMP: Constructors and destructors for \"declare target\" static aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512120247.3213280-1-julian@codesourcery.com/mbox/"},{"id":93177,"url":"https://patchwork.plctlab.org/api/1.2/patches/93177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-1-ppalka@redhat.com/","msgid":"<20230512123908.1652082-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-12T12:39:07","name":"[pushed] c++: remove redundant testcase [PR83258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-1-ppalka@redhat.com/mbox/"},{"id":93179,"url":"https://patchwork.plctlab.org/api/1.2/patches/93179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-2-ppalka@redhat.com/","msgid":"<20230512123908.1652082-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-12T12:39:08","name":"[pushed] c++: robustify testcase [PR109752]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512123908.1652082-2-ppalka@redhat.com/mbox/"},{"id":93182,"url":"https://patchwork.plctlab.org/api/1.2/patches/93182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfc1g1lx.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-05-12T12:45:14","name":"ipa: Self-DCE of uses of removed call LHSs (PR 108007)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6sfc1g1lx.fsf@suse.cz/mbox/"},{"id":93183,"url":"https://patchwork.plctlab.org/api/1.2/patches/93183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com/","msgid":"<74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com>","list_archive_url":null,"date":"2023-05-12T12:46:21","name":"LTO: Fix writing of toplevel asm with offloading [PR109816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74555a9a-8eb8-14ac-a5bd-d0ab15c9acc1@codesourcery.com/mbox/"},{"id":93185,"url":"https://patchwork.plctlab.org/api/1.2/patches/93185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512130414.6D78B13466@imap2.suse-dmz.suse.de/","msgid":"<20230512130414.6D78B13466@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-12T13:04:14","name":"tree-optimization/64731 - extend store-from CTOR lowering to TARGET_MEM_REF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512130414.6D78B13466@imap2.suse-dmz.suse.de/mbox/"},{"id":93205,"url":"https://patchwork.plctlab.org/api/1.2/patches/93205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512132813.58106-1-kito.cheng@sifive.com/","msgid":"<20230512132813.58106-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T13:28:14","name":"[committed,v4] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512132813.58106-1-kito.cheng@sifive.com/mbox/"},{"id":93206,"url":"https://patchwork.plctlab.org/api/1.2/patches/93206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512133254.59478-1-kito.cheng@sifive.com/","msgid":"<20230512133254.59478-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-12T13:32:54","name":"RISC-V: Improve vector_insn_info::dump for LMUL and policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512133254.59478-1-kito.cheng@sifive.com/mbox/"},{"id":93208,"url":"https://patchwork.plctlab.org/api/1.2/patches/93208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134431.1289116-1-jwakely@redhat.com/","msgid":"<20230512134431.1289116-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:31","name":"[committed] libstdc++: Remove test dependencies on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134431.1289116-1-jwakely@redhat.com/mbox/"},{"id":93210,"url":"https://patchwork.plctlab.org/api/1.2/patches/93210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134435.1291779-1-jwakely@redhat.com/","msgid":"<20230512134435.1291779-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:35","name":"[committed] libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134435.1291779-1-jwakely@redhat.com/mbox/"},{"id":93209,"url":"https://patchwork.plctlab.org/api/1.2/patches/93209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134439.1291794-1-jwakely@redhat.com/","msgid":"<20230512134439.1291794-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T13:44:39","name":"[committed] libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512134439.1291794-1-jwakely@redhat.com/mbox/"},{"id":93227,"url":"https://patchwork.plctlab.org/api/1.2/patches/93227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512145940.587528-1-juzhe.zhong@rivai.ai/","msgid":"<20230512145940.587528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T14:59:40","name":"[V2] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512145940.587528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93256,"url":"https://patchwork.plctlab.org/api/1.2/patches/93256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153828.604848-1-juzhe.zhong@rivai.ai/","msgid":"<20230512153828.604848-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T15:38:28","name":"[V3] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153828.604848-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93257,"url":"https://patchwork.plctlab.org/api/1.2/patches/93257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153839.1106908-1-pan2.li@intel.com/","msgid":"<20230512153839.1106908-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-12T15:38:39","name":"[v2] Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512153839.1106908-1-pan2.li@intel.com/mbox/"},{"id":93261,"url":"https://patchwork.plctlab.org/api/1.2/patches/93261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512154655.613780-1-juzhe.zhong@rivai.ai/","msgid":"<20230512154655.613780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-12T15:46:55","name":"[V4] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512154655.613780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93280,"url":"https://patchwork.plctlab.org/api/1.2/patches/93280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z7q=6W_0Y2Xe0ZpWdHr+5-v4h+ZpDR7ekj_L3zDDXWOA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-12T16:43:50","name":"i386: Remove mulv2si emulated sequence for TARGET_SSE2 [PR109797]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z7q=6W_0Y2Xe0ZpWdHr+5-v4h+ZpDR7ekj_L3zDDXWOA@mail.gmail.com/mbox/"},{"id":93282,"url":"https://patchwork.plctlab.org/api/1.2/patches/93282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164838.1303266-1-jwakely@redhat.com/","msgid":"<20230512164838.1303266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:38","name":"[committed] libstdc++: Remove dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164838.1303266-1-jwakely@redhat.com/mbox/"},{"id":93283,"url":"https://patchwork.plctlab.org/api/1.2/patches/93283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164843.1303299-1-jwakely@redhat.com/","msgid":"<20230512164843.1303299-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:43","name":"[committed] libstdc++: Reduce dependency on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164843.1303299-1-jwakely@redhat.com/mbox/"},{"id":93281,"url":"https://patchwork.plctlab.org/api/1.2/patches/93281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164849.1303313-1-jwakely@redhat.com/","msgid":"<20230512164849.1303313-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:48:49","name":"[committed] libstdc++: Remove redundant dependencies on _GLIBCXX_USE_C99_STDINT_TR1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164849.1303313-1-jwakely@redhat.com/mbox/"},{"id":93284,"url":"https://patchwork.plctlab.org/api/1.2/patches/93284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164914.1303446-1-jwakely@redhat.com/","msgid":"<20230512164914.1303446-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-12T16:49:14","name":"[committed] libstdc++: Fix -Wnonnull warnings during configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512164914.1303446-1-jwakely@redhat.com/mbox/"},{"id":93296,"url":"https://patchwork.plctlab.org/api/1.2/patches/93296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YvvcZRNkF8D8xPd-HgmcRE_2GWdv1ntM8yzqpSgLw0kA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-12T17:52:17","name":"i386: Cleanup ix86_expand_vecop_qihi{,2}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YvvcZRNkF8D8xPd-HgmcRE_2GWdv1ntM8yzqpSgLw0kA@mail.gmail.com/mbox/"},{"id":93341,"url":"https://patchwork.plctlab.org/api/1.2/patches/93341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512200527.B9B1133E96@hamza.pair.com/","msgid":"<20230512200527.B9B1133E96@hamza.pair.com>","list_archive_url":null,"date":"2023-05-12T20:05:24","name":"[pushed] wwwdocs: gcc-13/buildstat: Remove trace of XHTML","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512200527.B9B1133E96@hamza.pair.com/mbox/"},{"id":93369,"url":"https://patchwork.plctlab.org/api/1.2/patches/93369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512205332.1781029-1-jason@redhat.com/","msgid":"<20230512205332.1781029-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-12T20:53:32","name":"[RFC] c-family: make -fno-permissive upgrade pedwarns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230512205332.1781029-1-jason@redhat.com/mbox/"},{"id":93443,"url":"https://patchwork.plctlab.org/api/1.2/patches/93443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513002026.321317-1-juzhe.zhong@rivai.ai/","msgid":"<20230513002026.321317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T00:20:26","name":"[V5] RISC-V: Using merge approach to optimize repeating sequence in vec_init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513002026.321317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93473,"url":"https://patchwork.plctlab.org/api/1.2/patches/93473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513020859.13485-1-juzhe.zhong@rivai.ai/","msgid":"<20230513020859.13485-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T02:08:59","name":"RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513020859.13485-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93475,"url":"https://patchwork.plctlab.org/api/1.2/patches/93475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513030822.1481372-1-apinski@marvell.com/","msgid":"<20230513030822.1481372-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-13T03:08:22","name":"MATCH: Fix PR 109834, ICE with popcount combined with bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513030822.1481372-1-apinski@marvell.com/mbox/"},{"id":93478,"url":"https://patchwork.plctlab.org/api/1.2/patches/93478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513061719.63705-1-kito.cheng@sifive.com/","msgid":"<20230513061719.63705-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-13T06:17:19","name":"[committed] RISC-V: Pull out function call with side effect from gcc_assert.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513061719.63705-1-kito.cheng@sifive.com/mbox/"},{"id":93493,"url":"https://patchwork.plctlab.org/api/1.2/patches/93493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513092042.3927038-1-hongtao.liu@intel.com/","msgid":"<20230513092042.3927038-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-13T09:20:42","name":"[V2] Provide -fcf-protection=branch,return.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513092042.3927038-1-hongtao.liu@intel.com/mbox/"},{"id":93511,"url":"https://patchwork.plctlab.org/api/1.2/patches/93511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513114421.196081-1-juzhe.zhong@rivai.ai/","msgid":"<20230513114421.196081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-13T11:44:21","name":"RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513114421.196081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93526,"url":"https://patchwork.plctlab.org/api/1.2/patches/93526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513131325.1667305-1-pan2.li@intel.com/","msgid":"<20230513131325.1667305-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-13T13:13:25","name":"[v3] Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513131325.1667305-1-pan2.li@intel.com/mbox/"},{"id":93630,"url":"https://patchwork.plctlab.org/api/1.2/patches/93630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-2-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-2-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:08","name":"[01/14] ada: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-2-rep.dot.nop@gmail.com/mbox/"},{"id":93621,"url":"https://patchwork.plctlab.org/api/1.2/patches/93621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-3-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-3-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:09","name":"[02/14] analyzer: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-3-rep.dot.nop@gmail.com/mbox/"},{"id":93628,"url":"https://patchwork.plctlab.org/api/1.2/patches/93628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-4-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-4-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:10","name":"[03/14] gcc/config/*: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-4-rep.dot.nop@gmail.com/mbox/"},{"id":93629,"url":"https://patchwork.plctlab.org/api/1.2/patches/93629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-5-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-5-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:11","name":"[04/14] c++: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-5-rep.dot.nop@gmail.com/mbox/"},{"id":93626,"url":"https://patchwork.plctlab.org/api/1.2/patches/93626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-6-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-6-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:12","name":"[05/14] m2: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-6-rep.dot.nop@gmail.com/mbox/"},{"id":93634,"url":"https://patchwork.plctlab.org/api/1.2/patches/93634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-7-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-7-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:13","name":"[06/14] lto: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-7-rep.dot.nop@gmail.com/mbox/"},{"id":93620,"url":"https://patchwork.plctlab.org/api/1.2/patches/93620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-8-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-8-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:14","name":"[07/14] d: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-8-rep.dot.nop@gmail.com/mbox/"},{"id":93627,"url":"https://patchwork.plctlab.org/api/1.2/patches/93627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-9-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-9-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:15","name":"[08/14] fortran: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-9-rep.dot.nop@gmail.com/mbox/"},{"id":93631,"url":"https://patchwork.plctlab.org/api/1.2/patches/93631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-10-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-10-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:16","name":"[09/14] rust: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-10-rep.dot.nop@gmail.com/mbox/"},{"id":93622,"url":"https://patchwork.plctlab.org/api/1.2/patches/93622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-11-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-11-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:17","name":"[10/14] c: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-11-rep.dot.nop@gmail.com/mbox/"},{"id":93625,"url":"https://patchwork.plctlab.org/api/1.2/patches/93625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-12-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-12-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:18","name":"[11/14] objc: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-12-rep.dot.nop@gmail.com/mbox/"},{"id":93624,"url":"https://patchwork.plctlab.org/api/1.2/patches/93624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-13-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-13-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:19","name":"[12/14] go: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-13-rep.dot.nop@gmail.com/mbox/"},{"id":93623,"url":"https://patchwork.plctlab.org/api/1.2/patches/93623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-14-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-14-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:20","name":"[13/14] omp: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-14-rep.dot.nop@gmail.com/mbox/"},{"id":93633,"url":"https://patchwork.plctlab.org/api/1.2/patches/93633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-15-rep.dot.nop@gmail.com/","msgid":"<20230513232321.279733-15-rep.dot.nop@gmail.com>","list_archive_url":null,"date":"2023-05-13T23:23:21","name":"[14/14] gcc: use _P() defines from tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230513232321.279733-15-rep.dot.nop@gmail.com/mbox/"},{"id":93638,"url":"https://patchwork.plctlab.org/api/1.2/patches/93638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514031258.1542461-1-apinski@marvell.com/","msgid":"<20230514031258.1542461-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-14T03:12:58","name":"MATCH: Add pattern for `signbit(x) ? x : -x` into abs (and swapped)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514031258.1542461-1-apinski@marvell.com/mbox/"},{"id":93655,"url":"https://patchwork.plctlab.org/api/1.2/patches/93655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514082113.3487198-1-pan2.li@intel.com/","msgid":"<20230514082113.3487198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-14T08:21:13","name":"RISC-V: Refactor the or pattern to switch cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230514082113.3487198-1-pan2.li@intel.com/mbox/"},{"id":93733,"url":"https://patchwork.plctlab.org/api/1.2/patches/93733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net/","msgid":"<2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net>","list_archive_url":null,"date":"2023-05-14T16:09:35","name":"Fix assertion for unwind-dw2-fde.c btree changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2TMB4YQOP1E1R.2QLW7HCD1NVF3@8pit.net/mbox/"},{"id":93753,"url":"https://patchwork.plctlab.org/api/1.2/patches/93753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z5J39bZ+prm87jyzfBHReNbFymYecFv7hwvO4+wH---w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-14T19:55:16","name":"i386: Handle unsupported modes from ix86_widen_mult_cost [PR109807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z5J39bZ+prm87jyzfBHReNbFymYecFv7hwvO4+wH---w@mail.gmail.com/mbox/"},{"id":93755,"url":"https://patchwork.plctlab.org/api/1.2/patches/93755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2b29de67-6497-40b6-bc2d-2ff749ab4d90-1684094665147@3c-app-gmx-bs49/","msgid":"","list_archive_url":null,"date":"2023-05-14T20:04:25","name":"Fortran: CLASS pointer function result in variable definition context [PR109846]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2b29de67-6497-40b6-bc2d-2ff749ab4d90-1684094665147@3c-app-gmx-bs49/mbox/"},{"id":93777,"url":"https://patchwork.plctlab.org/api/1.2/patches/93777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515012844.183599-1-juzhe.zhong@rivai.ai/","msgid":"<20230515012844.183599-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T01:28:44","name":"[V7] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515012844.183599-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93796,"url":"https://patchwork.plctlab.org/api/1.2/patches/93796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515022647.182902-1-juzhe.zhong@rivai.ai/","msgid":"<20230515022647.182902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T02:26:47","name":"RISC-V: Add VECTOR_ALIGNMENT_REACHABLE && BUILTIN_VECTORIZATION_COST target hook to optimize RVV VLS auto-vectorization codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515022647.182902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93828,"url":"https://patchwork.plctlab.org/api/1.2/patches/93828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031452.2154535-1-pan2.li@intel.com/","msgid":"<20230515031452.2154535-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-15T03:14:52","name":"RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031452.2154535-1-pan2.li@intel.com/mbox/"},{"id":93829,"url":"https://patchwork.plctlab.org/api/1.2/patches/93829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031514.241945-1-juzhe.zhong@rivai.ai/","msgid":"<20230515031514.241945-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T03:15:14","name":"RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA && VLS auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031514.241945-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93830,"url":"https://patchwork.plctlab.org/api/1.2/patches/93830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031549.242051-1-juzhe.zhong@rivai.ai/","msgid":"<20230515031549.242051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T03:15:49","name":"[V2] RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA && VLS auto-vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515031549.242051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93852,"url":"https://patchwork.plctlab.org/api/1.2/patches/93852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com/","msgid":"<595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com>","list_archive_url":null,"date":"2023-05-15T05:06:03","name":"[Testsuite] Skip -fdelete-null-pointer-check tests if target keeps_null_pointer_checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/595B4378-CEDC-4D6D-A6B1-7FF80AFEF7B0@microchip.com/mbox/"},{"id":93928,"url":"https://patchwork.plctlab.org/api/1.2/patches/93928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-2-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:36","name":"[1/3] s390: Refactor block operation cpymem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-2-stefansf@linux.ibm.com/mbox/"},{"id":93927,"url":"https://patchwork.plctlab.org/api/1.2/patches/93927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-3-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-3-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:37","name":"[2/3] s390: Add block operation movmem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-3-stefansf@linux.ibm.com/mbox/"},{"id":93932,"url":"https://patchwork.plctlab.org/api/1.2/patches/93932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-4-stefansf@linux.ibm.com/","msgid":"<20230515071738.563660-4-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-15T07:17:38","name":"[3/3] s390: Refactor block operation setmem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515071738.563660-4-stefansf@linux.ibm.com/mbox/"},{"id":93955,"url":"https://patchwork.plctlab.org/api/1.2/patches/93955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515081725.106136-1-juzhe.zhong@rivai.ai/","msgid":"<20230515081725.106136-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T08:17:25","name":"RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515081725.106136-1-juzhe.zhong@rivai.ai/mbox/"},{"id":93956,"url":"https://patchwork.plctlab.org/api/1.2/patches/93956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082137.4BC95138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515082137.4BC95138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:21:36","name":"Fix gcc.dg/vect/pr108950.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082137.4BC95138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93960,"url":"https://patchwork.plctlab.org/api/1.2/patches/93960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082406.A92BA138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515082406.A92BA138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:24:06","name":"[GCC,12] testsuite/108776 - avoid c-c++-common/rotate-11.c FAIL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515082406.A92BA138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93968,"url":"https://patchwork.plctlab.org/api/1.2/patches/93968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515083305.2656202-1-pan2.li@intel.com/","msgid":"<20230515083305.2656202-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-15T08:33:05","name":"[v2] RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515083305.2656202-1-pan2.li@intel.com/mbox/"},{"id":93969,"url":"https://patchwork.plctlab.org/api/1.2/patches/93969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515084047.475AF138E5@imap2.suse-dmz.suse.de/","msgid":"<20230515084047.475AF138E5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-15T08:40:46","name":"tree-optimization/109848 - fix TARGET_MEM_REF store from CTOR simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515084047.475AF138E5@imap2.suse-dmz.suse.de/mbox/"},{"id":93973,"url":"https://patchwork.plctlab.org/api/1.2/patches/93973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515085146.281004-1-juzhe.zhong@rivai.ai/","msgid":"<20230515085146.281004-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T08:51:46","name":"[V2] RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515085146.281004-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94016,"url":"https://patchwork.plctlab.org/api/1.2/patches/94016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094135.1407003-1-poulhies@adacore.com/","msgid":"<20230515094135.1407003-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:35","name":"[COMMITTED] ada: Fix link to parent when copying with Copy_Separate_Tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094135.1407003-1-poulhies@adacore.com/mbox/"},{"id":94017,"url":"https://patchwork.plctlab.org/api/1.2/patches/94017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094145.1407307-1-poulhies@adacore.com/","msgid":"<20230515094145.1407307-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:45","name":"[COMMITTED] ada: Fix Unchecked_Conversion in edge case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094145.1407307-1-poulhies@adacore.com/mbox/"},{"id":94020,"url":"https://patchwork.plctlab.org/api/1.2/patches/94020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094154.1407371-1-poulhies@adacore.com/","msgid":"<20230515094154.1407371-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:41:54","name":"[COMMITTED] ada: Reject attribute Initialize on unchecked unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094154.1407371-1-poulhies@adacore.com/mbox/"},{"id":94033,"url":"https://patchwork.plctlab.org/api/1.2/patches/94033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094203.1407440-1-poulhies@adacore.com/","msgid":"<20230515094203.1407440-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:03","name":"[COMMITTED] ada: Skip dynamic interface conversion under native runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094203.1407440-1-poulhies@adacore.com/mbox/"},{"id":94024,"url":"https://patchwork.plctlab.org/api/1.2/patches/94024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094215.1407504-1-poulhies@adacore.com/","msgid":"<20230515094215.1407504-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:15","name":"[COMMITTED] ada: GNAT UGN: Add section documenting PIE being enabled by default on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094215.1407504-1-poulhies@adacore.com/mbox/"},{"id":94018,"url":"https://patchwork.plctlab.org/api/1.2/patches/94018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094223.1407571-1-poulhies@adacore.com/","msgid":"<20230515094223.1407571-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:23","name":"[COMMITTED] ada: INOX: prototype RFC on String Interpolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094223.1407571-1-poulhies@adacore.com/mbox/"},{"id":94038,"url":"https://patchwork.plctlab.org/api/1.2/patches/94038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094229.1407641-1-poulhies@adacore.com/","msgid":"<20230515094229.1407641-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:29","name":"[COMMITTED] ada: Allow pragmas Annotate between loop pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094229.1407641-1-poulhies@adacore.com/mbox/"},{"id":94042,"url":"https://patchwork.plctlab.org/api/1.2/patches/94042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094236.1407706-1-poulhies@adacore.com/","msgid":"<20230515094236.1407706-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:36","name":"[COMMITTED] ada: Fix proof of runtime unit System.Value*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094236.1407706-1-poulhies@adacore.com/mbox/"},{"id":94030,"url":"https://patchwork.plctlab.org/api/1.2/patches/94030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094244.1407771-1-poulhies@adacore.com/","msgid":"<20230515094244.1407771-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:44","name":"[COMMITTED] ada: Fix invalid JSON for extended variant record with -gnatRj","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094244.1407771-1-poulhies@adacore.com/mbox/"},{"id":94044,"url":"https://patchwork.plctlab.org/api/1.2/patches/94044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094249.1407836-1-poulhies@adacore.com/","msgid":"<20230515094249.1407836-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:49","name":"[COMMITTED] ada: Fix handling of pragma Warnings (Toolname, Off/On)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094249.1407836-1-poulhies@adacore.com/mbox/"},{"id":94043,"url":"https://patchwork.plctlab.org/api/1.2/patches/94043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094254.1407902-1-poulhies@adacore.com/","msgid":"<20230515094254.1407902-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:42:54","name":"[COMMITTED] ada: Add Check_Error_Detected before \"raise Bad_Attribute\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094254.1407902-1-poulhies@adacore.com/mbox/"},{"id":94032,"url":"https://patchwork.plctlab.org/api/1.2/patches/94032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094301.1407966-1-poulhies@adacore.com/","msgid":"<20230515094301.1407966-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:01","name":"[COMMITTED] ada: Optimize 2**N to avoid explicit '\''if'\'' in modular case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094301.1407966-1-poulhies@adacore.com/mbox/"},{"id":94040,"url":"https://patchwork.plctlab.org/api/1.2/patches/94040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094310.1408030-1-poulhies@adacore.com/","msgid":"<20230515094310.1408030-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:10","name":"[COMMITTED] ada: Fix minor documentation formatting issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094310.1408030-1-poulhies@adacore.com/mbox/"},{"id":94049,"url":"https://patchwork.plctlab.org/api/1.2/patches/94049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094316.1408094-1-poulhies@adacore.com/","msgid":"<20230515094316.1408094-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:16","name":"[COMMITTED] ada: Improve check of attribute reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094316.1408094-1-poulhies@adacore.com/mbox/"},{"id":94047,"url":"https://patchwork.plctlab.org/api/1.2/patches/94047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094322.1408160-1-poulhies@adacore.com/","msgid":"<20230515094322.1408160-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:22","name":"[COMMITTED] ada: Update comment after SPARK RM change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094322.1408160-1-poulhies@adacore.com/mbox/"},{"id":94048,"url":"https://patchwork.plctlab.org/api/1.2/patches/94048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094329.1408226-1-poulhies@adacore.com/","msgid":"<20230515094329.1408226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:29","name":"[COMMITTED] ada: Emit warnings for (some) ineffective static predicate tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094329.1408226-1-poulhies@adacore.com/mbox/"},{"id":94051,"url":"https://patchwork.plctlab.org/api/1.2/patches/94051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094335.1408296-1-poulhies@adacore.com/","msgid":"<20230515094335.1408296-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:35","name":"[COMMITTED] ada: Accept aggregates with OTHERS clause in unchecked type conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094335.1408296-1-poulhies@adacore.com/mbox/"},{"id":94055,"url":"https://patchwork.plctlab.org/api/1.2/patches/94055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094341.1408360-1-poulhies@adacore.com/","msgid":"<20230515094341.1408360-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:41","name":"[COMMITTED] ada: Simplify lookup of predecessor in homonym chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094341.1408360-1-poulhies@adacore.com/mbox/"},{"id":94052,"url":"https://patchwork.plctlab.org/api/1.2/patches/94052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094346.1408423-1-poulhies@adacore.com/","msgid":"<20230515094346.1408423-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:46","name":"[COMMITTED] ada: Remove redundant protection against empty lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094346.1408423-1-poulhies@adacore.com/mbox/"},{"id":94046,"url":"https://patchwork.plctlab.org/api/1.2/patches/94046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094353.1408487-1-poulhies@adacore.com/","msgid":"<20230515094353.1408487-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:53","name":"[COMMITTED] ada: Fix internal error on instance in package body with -gnatn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094353.1408487-1-poulhies@adacore.com/mbox/"},{"id":94057,"url":"https://patchwork.plctlab.org/api/1.2/patches/94057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094358.1408551-1-poulhies@adacore.com/","msgid":"<20230515094358.1408551-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:43:58","name":"[COMMITTED] ada: Clean up vanishing entity fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094358.1408551-1-poulhies@adacore.com/mbox/"},{"id":94059,"url":"https://patchwork.plctlab.org/api/1.2/patches/94059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094404.1408615-1-poulhies@adacore.com/","msgid":"<20230515094404.1408615-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:04","name":"[COMMITTED] ada: Improve comment on First_Entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094404.1408615-1-poulhies@adacore.com/mbox/"},{"id":94061,"url":"https://patchwork.plctlab.org/api/1.2/patches/94061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094408.1408681-1-poulhies@adacore.com/","msgid":"<20230515094408.1408681-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:08","name":"[COMMITTED] ada: Remove duplicated code in Proc_Next_Component_Or_Discriminant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094408.1408681-1-poulhies@adacore.com/mbox/"},{"id":94064,"url":"https://patchwork.plctlab.org/api/1.2/patches/94064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094413.1408748-1-poulhies@adacore.com/","msgid":"<20230515094413.1408748-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:13","name":"[COMMITTED] ada: Fix formatting inconsistency in User'\''s Guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094413.1408748-1-poulhies@adacore.com/mbox/"},{"id":94062,"url":"https://patchwork.plctlab.org/api/1.2/patches/94062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094417.1408811-1-poulhies@adacore.com/","msgid":"<20230515094417.1408811-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:17","name":"[COMMITTED] ada: Use Inline aspect instead of pragma in Einfo.Utils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094417.1408811-1-poulhies@adacore.com/mbox/"},{"id":94050,"url":"https://patchwork.plctlab.org/api/1.2/patches/94050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094422.1408878-1-poulhies@adacore.com/","msgid":"<20230515094422.1408878-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:22","name":"[COMMITTED] ada: Fix comment related to inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094422.1408878-1-poulhies@adacore.com/mbox/"},{"id":94067,"url":"https://patchwork.plctlab.org/api/1.2/patches/94067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094425.1408943-1-poulhies@adacore.com/","msgid":"<20230515094425.1408943-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:25","name":"[COMMITTED] ada: Recover proof of Interfaces.C for termination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094425.1408943-1-poulhies@adacore.com/mbox/"},{"id":94068,"url":"https://patchwork.plctlab.org/api/1.2/patches/94068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094429.1409007-1-poulhies@adacore.com/","msgid":"<20230515094429.1409007-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:29","name":"[COMMITTED] ada: Recover proof of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094429.1409007-1-poulhies@adacore.com/mbox/"},{"id":94065,"url":"https://patchwork.plctlab.org/api/1.2/patches/94065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094434.1409071-1-poulhies@adacore.com/","msgid":"<20230515094434.1409071-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:34","name":"[COMMITTED] ada: Add annotations for proof of termination of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094434.1409071-1-poulhies@adacore.com/mbox/"},{"id":94069,"url":"https://patchwork.plctlab.org/api/1.2/patches/94069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094440.1409136-1-poulhies@adacore.com/","msgid":"<20230515094440.1409136-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-15T09:44:40","name":"[COMMITTED] ada: Fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515094440.1409136-1-poulhies@adacore.com/mbox/"},{"id":94084,"url":"https://patchwork.plctlab.org/api/1.2/patches/94084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515102550.228989-1-juzhe.zhong@rivai.ai/","msgid":"<20230515102550.228989-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T10:25:50","name":"[V3] RISC-V: Add rounding mode operand for fixed-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515102550.228989-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94090,"url":"https://patchwork.plctlab.org/api/1.2/patches/94090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515103523.100412-1-aldyh@redhat.com/","msgid":"<20230515103523.100412-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-15T10:35:23","name":"Add auto-resizing capability to irange'\''s [PR109695]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515103523.100412-1-aldyh@redhat.com/mbox/"},{"id":94095,"url":"https://patchwork.plctlab.org/api/1.2/patches/94095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515114932.244397-1-juzhe.zhong@rivai.ai/","msgid":"<20230515114932.244397-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T11:49:32","name":"RISC-V: Add rounding mode operand for floating point instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515114932.244397-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94107,"url":"https://patchwork.plctlab.org/api/1.2/patches/94107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515121617.280113-1-juzhe.zhong@rivai.ai/","msgid":"<20230515121617.280113-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:16:17","name":"RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515121617.280113-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94109,"url":"https://patchwork.plctlab.org/api/1.2/patches/94109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-1-juzhe.zhong@rivai.ai/","msgid":"<20230515122235.293830-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:22:34","name":"OPTABS: Extend the number of expanding instructions pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94108,"url":"https://patchwork.plctlab.org/api/1.2/patches/94108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-2-juzhe.zhong@rivai.ai/","msgid":"<20230515122235.293830-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T12:22:35","name":"RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515122235.293830-2-juzhe.zhong@rivai.ai/mbox/"},{"id":94136,"url":"https://patchwork.plctlab.org/api/1.2/patches/94136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515131628.953-1-jinma@linux.alibaba.com/","msgid":"<20230515131628.953-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-15T13:16:28","name":"[v9] RISC-V: Add the '\''zfa'\'' extension, version 0.2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515131628.953-1-jinma@linux.alibaba.com/mbox/"},{"id":94181,"url":"https://patchwork.plctlab.org/api/1.2/patches/94181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515145346.153478-1-juzhe.zhong@rivai.ai/","msgid":"<20230515145346.153478-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T14:53:46","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515145346.153478-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94193,"url":"https://patchwork.plctlab.org/api/1.2/patches/94193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515152455.2549476-1-ppalka@redhat.com/","msgid":"<20230515152455.2549476-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-15T15:24:55","name":"c++: add feature-test macro for auto(x)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515152455.2549476-1-ppalka@redhat.com/mbox/"},{"id":94265,"url":"https://patchwork.plctlab.org/api/1.2/patches/94265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de/","msgid":"<48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de>","list_archive_url":null,"date":"2023-05-15T18:05:18","name":"[avr] Fix PR109650 wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48369cc7-884d-9eef-2e16-9bc2bfe825f1@gjlay.de/mbox/"},{"id":94301,"url":"https://patchwork.plctlab.org/api/1.2/patches/94301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1lp8lcr.fsf@euler.schwinge.homeip.net/","msgid":"<87y1lp8lcr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-15T19:07:16","name":"Back to requiring \"Perl version 5.6.1 (or later)\" [PR82856] (was: Update GCC to autoconf 2.69, automake 1.15.1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1lp8lcr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94348,"url":"https://patchwork.plctlab.org/api/1.2/patches/94348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515211852.228907-1-juzhe.zhong@rivai.ai/","msgid":"<20230515211852.228907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-15T21:18:52","name":"[V9] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230515211852.228907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94353,"url":"https://patchwork.plctlab.org/api/1.2/patches/94353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca8b8c9a-1866-b95d-8b93-9d57885de5f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-15T21:28:45","name":"[committed] c: Update __has_c_attribute values for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca8b8c9a-1866-b95d-8b93-9d57885de5f@codesourcery.com/mbox/"},{"id":94394,"url":"https://patchwork.plctlab.org/api/1.2/patches/94394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dba8287c-e1e4-21fa-f842-80b459e7b65f@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-15T23:18:33","name":"[committed] c: Ignore _Atomic on function return type for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dba8287c-e1e4-21fa-f842-80b459e7b65f@codesourcery.com/mbox/"},{"id":94412,"url":"https://patchwork.plctlab.org/api/1.2/patches/94412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516013655.1660657-1-apinski@marvell.com/","msgid":"<20230516013655.1660657-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-16T01:36:55","name":"MATCH: [PR109424] Simplify min/max of boolean arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516013655.1660657-1-apinski@marvell.com/mbox/"},{"id":94442,"url":"https://patchwork.plctlab.org/api/1.2/patches/94442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef5944f4-28b5-1fe0-26b8-a348ea56d045@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T06:15:28","name":"[v5,1/4] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef5944f4-28b5-1fe0-26b8-a348ea56d045@linux.ibm.com/mbox/"},{"id":94459,"url":"https://patchwork.plctlab.org/api/1.2/patches/94459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516064322.2584953-1-stefansf@linux.ibm.com/","msgid":"<20230516064322.2584953-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-05-16T06:43:23","name":"s390: Implement TARGET_ATOMIC_ALIGN_FOR_MODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516064322.2584953-1-stefansf@linux.ibm.com/mbox/"},{"id":94463,"url":"https://patchwork.plctlab.org/api/1.2/patches/94463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516065201.751821-1-pan2.li@intel.com/","msgid":"<20230516065201.751821-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-16T06:52:01","name":"RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516065201.751821-1-pan2.li@intel.com/mbox/"},{"id":94514,"url":"https://patchwork.plctlab.org/api/1.2/patches/94514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083903.1500563-1-poulhies@adacore.com/","msgid":"<20230516083903.1500563-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:03","name":"[COMMITTED] ada: Restore proof of System.Arith_Double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083903.1500563-1-poulhies@adacore.com/mbox/"},{"id":94515,"url":"https://patchwork.plctlab.org/api/1.2/patches/94515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083925.1500745-1-poulhies@adacore.com/","msgid":"<20230516083925.1500745-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:25","name":"[COMMITTED] ada: Trivial refactoring in Instantiate_*_Body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083925.1500745-1-poulhies@adacore.com/mbox/"},{"id":94516,"url":"https://patchwork.plctlab.org/api/1.2/patches/94516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083931.1500816-1-poulhies@adacore.com/","msgid":"<20230516083931.1500816-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:31","name":"[COMMITTED] ada: Set Loop_Variant assertion policy to Ignore in both","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083931.1500816-1-poulhies@adacore.com/mbox/"},{"id":94517,"url":"https://patchwork.plctlab.org/api/1.2/patches/94517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083935.1500895-1-poulhies@adacore.com/","msgid":"<20230516083935.1500895-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:35","name":"[COMMITTED] ada: Missing dependency with -gnatc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083935.1500895-1-poulhies@adacore.com/mbox/"},{"id":94519,"url":"https://patchwork.plctlab.org/api/1.2/patches/94519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083940.1500958-1-poulhies@adacore.com/","msgid":"<20230516083940.1500958-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:40","name":"[COMMITTED] ada: Add intermediate assertions for proof of Super_Tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083940.1500958-1-poulhies@adacore.com/mbox/"},{"id":94520,"url":"https://patchwork.plctlab.org/api/1.2/patches/94520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083944.1501021-1-poulhies@adacore.com/","msgid":"<20230516083944.1501021-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:44","name":"[COMMITTED] ada: Simplify dramatically ghost code for proof of System.Arith_Double","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083944.1501021-1-poulhies@adacore.com/mbox/"},{"id":94523,"url":"https://patchwork.plctlab.org/api/1.2/patches/94523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083949.1501084-1-poulhies@adacore.com/","msgid":"<20230516083949.1501084-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:49","name":"[COMMITTED] ada: Change Present_Expr field type to Uint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083949.1501084-1-poulhies@adacore.com/mbox/"},{"id":94518,"url":"https://patchwork.plctlab.org/api/1.2/patches/94518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083956.1501148-1-poulhies@adacore.com/","msgid":"<20230516083956.1501148-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:39:56","name":"[COMMITTED] ada: Introduce Cannot_Be_Superflat flag on N_Range nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516083956.1501148-1-poulhies@adacore.com/mbox/"},{"id":94528,"url":"https://patchwork.plctlab.org/api/1.2/patches/94528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084001.1501211-1-poulhies@adacore.com/","msgid":"<20230516084001.1501211-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:01","name":"[COMMITTED] ada: Bad handling of ASCII with -gnatyn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084001.1501211-1-poulhies@adacore.com/mbox/"},{"id":94532,"url":"https://patchwork.plctlab.org/api/1.2/patches/94532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084006.1501276-1-poulhies@adacore.com/","msgid":"<20230516084006.1501276-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:06","name":"[COMMITTED] ada: Document examples of No_Dependence restriction for code generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084006.1501276-1-poulhies@adacore.com/mbox/"},{"id":94522,"url":"https://patchwork.plctlab.org/api/1.2/patches/94522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084011.1501341-1-poulhies@adacore.com/","msgid":"<20230516084011.1501341-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:11","name":"[COMMITTED] ada: Get name from entity if that'\''s what'\''s passed to Subprogram_Name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084011.1501341-1-poulhies@adacore.com/mbox/"},{"id":94535,"url":"https://patchwork.plctlab.org/api/1.2/patches/94535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084015.1501411-1-poulhies@adacore.com/","msgid":"<20230516084015.1501411-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:15","name":"[COMMITTED] ada: Build invariant procedure while freezing in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084015.1501411-1-poulhies@adacore.com/mbox/"},{"id":94539,"url":"https://patchwork.plctlab.org/api/1.2/patches/94539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084022.1501474-1-poulhies@adacore.com/","msgid":"<20230516084022.1501474-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:22","name":"[COMMITTED] ada: Adjust semantics and implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084022.1501474-1-poulhies@adacore.com/mbox/"},{"id":94526,"url":"https://patchwork.plctlab.org/api/1.2/patches/94526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084026.1501538-1-poulhies@adacore.com/","msgid":"<20230516084026.1501538-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:26","name":"[COMMITTED] ada: Fix typo in \"pattern\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084026.1501538-1-poulhies@adacore.com/mbox/"},{"id":94527,"url":"https://patchwork.plctlab.org/api/1.2/patches/94527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084032.1501610-1-poulhies@adacore.com/","msgid":"<20230516084032.1501610-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:32","name":"[COMMITTED] ada: Add tags on style messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084032.1501610-1-poulhies@adacore.com/mbox/"},{"id":94541,"url":"https://patchwork.plctlab.org/api/1.2/patches/94541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084037.1501674-1-poulhies@adacore.com/","msgid":"<20230516084037.1501674-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:37","name":"[COMMITTED] ada: Follow-up improvement to implementation of storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084037.1501674-1-poulhies@adacore.com/mbox/"},{"id":94530,"url":"https://patchwork.plctlab.org/api/1.2/patches/94530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084042.1501739-1-poulhies@adacore.com/","msgid":"<20230516084042.1501739-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:42","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on PPC Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084042.1501739-1-poulhies@adacore.com/mbox/"},{"id":94521,"url":"https://patchwork.plctlab.org/api/1.2/patches/94521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084048.1501804-1-poulhies@adacore.com/","msgid":"<20230516084048.1501804-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:48","name":"[COMMITTED] ada: Fix Ada representation of r_debug and link_map types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084048.1501804-1-poulhies@adacore.com/mbox/"},{"id":94531,"url":"https://patchwork.plctlab.org/api/1.2/patches/94531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084052.1501867-1-poulhies@adacore.com/","msgid":"<20230516084052.1501867-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:52","name":"[COMMITTED] ada: usage.adb: document -gnatyD switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084052.1501867-1-poulhies@adacore.com/mbox/"},{"id":94533,"url":"https://patchwork.plctlab.org/api/1.2/patches/94533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084058.1501934-1-poulhies@adacore.com/","msgid":"<20230516084058.1501934-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:40:58","name":"[COMMITTED] ada: Apply range checks to preanalyzed aggregate expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084058.1501934-1-poulhies@adacore.com/mbox/"},{"id":94536,"url":"https://patchwork.plctlab.org/api/1.2/patches/94536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084103.1502006-1-poulhies@adacore.com/","msgid":"<20230516084103.1502006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:03","name":"[COMMITTED] ada: Spurious error on function returning CPP type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084103.1502006-1-poulhies@adacore.com/mbox/"},{"id":94534,"url":"https://patchwork.plctlab.org/api/1.2/patches/94534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084110.1502069-1-poulhies@adacore.com/","msgid":"<20230516084110.1502069-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:10","name":"[COMMITTED] ada: Spurious error analyzing '\''old or '\''result in class-wide conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084110.1502069-1-poulhies@adacore.com/mbox/"},{"id":94525,"url":"https://patchwork.plctlab.org/api/1.2/patches/94525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084115.1502135-1-poulhies@adacore.com/","msgid":"<20230516084115.1502135-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:15","name":"[COMMITTED] ada: Implement inheritance of user-defined literal aspects for untagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084115.1502135-1-poulhies@adacore.com/mbox/"},{"id":94543,"url":"https://patchwork.plctlab.org/api/1.2/patches/94543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084120.1502199-1-poulhies@adacore.com/","msgid":"<20230516084120.1502199-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:20","name":"[COMMITTED] ada: Update proof of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084120.1502199-1-poulhies@adacore.com/mbox/"},{"id":94540,"url":"https://patchwork.plctlab.org/api/1.2/patches/94540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084125.1502265-1-poulhies@adacore.com/","msgid":"<20230516084125.1502265-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:25","name":"[COMMITTED] ada: Fix internal error on chain of predicated record types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084125.1502265-1-poulhies@adacore.com/mbox/"},{"id":94544,"url":"https://patchwork.plctlab.org/api/1.2/patches/94544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084129.1502331-1-poulhies@adacore.com/","msgid":"<20230516084129.1502331-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:29","name":"[COMMITTED] ada: Fix internal error on '\''Image applied to array component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084129.1502331-1-poulhies@adacore.com/mbox/"},{"id":94545,"url":"https://patchwork.plctlab.org/api/1.2/patches/94545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084133.1502396-1-poulhies@adacore.com/","msgid":"<20230516084133.1502396-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:33","name":"[COMMITTED] ada: Fix crash on iterated component in expression function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084133.1502396-1-poulhies@adacore.com/mbox/"},{"id":94529,"url":"https://patchwork.plctlab.org/api/1.2/patches/94529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084138.1502460-1-poulhies@adacore.com/","msgid":"<20230516084138.1502460-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:38","name":"[COMMITTED] ada: Fix missing warning on aggregate with iterated component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084138.1502460-1-poulhies@adacore.com/mbox/"},{"id":94537,"url":"https://patchwork.plctlab.org/api/1.2/patches/94537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084141.1502523-1-poulhies@adacore.com/","msgid":"<20230516084141.1502523-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:41","name":"[COMMITTED] ada: Use accumulator type in expansion of '\''Reduce attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084141.1502523-1-poulhies@adacore.com/mbox/"},{"id":94542,"url":"https://patchwork.plctlab.org/api/1.2/patches/94542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084146.1502587-1-poulhies@adacore.com/","msgid":"<20230516084146.1502587-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-16T08:41:46","name":"[COMMITTED] ada: Add \"gnat --help-ada\" text for new switches.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516084146.1502587-1-poulhies@adacore.com/mbox/"},{"id":94546,"url":"https://patchwork.plctlab.org/api/1.2/patches/94546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de/","msgid":"<94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de>","list_archive_url":null,"date":"2023-05-16T08:56:19","name":"[avr] PR105753: Fix ICE in add_clobbers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94de26a3-c29c-6deb-59e2-da23411bef61@gjlay.de/mbox/"},{"id":94548,"url":"https://patchwork.plctlab.org/api/1.2/patches/94548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090555.1698108-1-jwakely@redhat.com/","msgid":"<20230516090555.1698108-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:05:55","name":"[committed] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090555.1698108-1-jwakely@redhat.com/mbox/"},{"id":94549,"url":"https://patchwork.plctlab.org/api/1.2/patches/94549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090708.1698284-1-jwakely@redhat.com/","msgid":"<20230516090708.1698284-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:07:08","name":"[committed] libstdc++: Require tzdb support for chrono::zoned_time printer test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090708.1698284-1-jwakely@redhat.com/mbox/"},{"id":94550,"url":"https://patchwork.plctlab.org/api/1.2/patches/94550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090719.1698299-1-jwakely@redhat.com/","msgid":"<20230516090719.1698299-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:07:19","name":"[committed] libstdc++: Add assertion to debug_allocator test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516090719.1698299-1-jwakely@redhat.com/mbox/"},{"id":94565,"url":"https://patchwork.plctlab.org/api/1.2/patches/94565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-1-jwakely@redhat.com/","msgid":"<20230516091132.1698684-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:30","name":"[committed,1/3] libstdc++: Stop using _GLIBCXX_USE_C99_COMPLEX_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-1-jwakely@redhat.com/mbox/"},{"id":94573,"url":"https://patchwork.plctlab.org/api/1.2/patches/94573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-2-jwakely@redhat.com/","msgid":"<20230516091132.1698684-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:31","name":"[committed,2/3] libstdc++: Stop using _GLIBCXX_USE_C99_STDINT_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-2-jwakely@redhat.com/mbox/"},{"id":94568,"url":"https://patchwork.plctlab.org/api/1.2/patches/94568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-3-jwakely@redhat.com/","msgid":"<20230516091132.1698684-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T09:11:32","name":"[committed,3/3] libstdc++: Stop using TR1 macros in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091132.1698684-3-jwakely@redhat.com/mbox/"},{"id":94579,"url":"https://patchwork.plctlab.org/api/1.2/patches/94579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091941.84280-1-juzhe.zhong@rivai.ai/","msgid":"<20230516091941.84280-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T09:19:41","name":"[V10] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516091941.84280-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94600,"url":"https://patchwork.plctlab.org/api/1.2/patches/94600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516101916.2895797-1-juzhe.zhong@rivai.ai/","msgid":"<20230516101916.2895797-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:19:16","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516101916.2895797-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94601,"url":"https://patchwork.plctlab.org/api/1.2/patches/94601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102124.2896235-1-juzhe.zhong@rivai.ai/","msgid":"<20230516102124.2896235-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:21:24","name":"[V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102124.2896235-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94602,"url":"https://patchwork.plctlab.org/api/1.2/patches/94602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102319.163752-1-juzhe.zhong@rivai.ai/","msgid":"<20230516102319.163752-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-16T10:23:19","name":"[V11] VECT: Add decrement IV support in Loop Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516102319.163752-1-juzhe.zhong@rivai.ai/mbox/"},{"id":94617,"url":"https://patchwork.plctlab.org/api/1.2/patches/94617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleho1r9v.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T10:53:32","name":"aarch64: Allow moves after tied-register intrinsics (2nd edition)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleho1r9v.fsf@arm.com/mbox/"},{"id":94734,"url":"https://patchwork.plctlab.org/api/1.2/patches/94734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfbw8imk.fsf@euler.schwinge.homeip.net/","msgid":"<87sfbw8imk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-16T14:18:27","name":"Remove stale Autoconf checks for Perl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sfbw8imk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94740,"url":"https://patchwork.plctlab.org/api/1.2/patches/94740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7mk8hzw.fsf@euler.schwinge.homeip.net/","msgid":"<87o7mk8hzw.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-05-16T14:32:03","name":"Support parallel testing in libgomp: fallback Perl '\''flock'\'' [PR66005]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7mk8hzw.fsf@euler.schwinge.homeip.net/mbox/"},{"id":94752,"url":"https://patchwork.plctlab.org/api/1.2/patches/94752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516151609.36619-1-julian@codesourcery.com/","msgid":"<20230516151609.36619-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-05-16T15:16:09","name":"OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516151609.36619-1-julian@codesourcery.com/mbox/"},{"id":94757,"url":"https://patchwork.plctlab.org/api/1.2/patches/94757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153343.56157-1-kito.cheng@sifive.com/","msgid":"<20230516153343.56157-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-16T15:33:43","name":"[committed] RISC-V: Fix wrong select_kind in riscv_compute_multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153343.56157-1-kito.cheng@sifive.com/mbox/"},{"id":94758,"url":"https://patchwork.plctlab.org/api/1.2/patches/94758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153524.3302940-1-pan2.li@intel.com/","msgid":"<20230516153524.3302940-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-16T15:35:24","name":"Machine_Mode: Extend machine_mode from 8 to 16 bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153524.3302940-1-pan2.li@intel.com/mbox/"},{"id":94760,"url":"https://patchwork.plctlab.org/api/1.2/patches/94760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGOjIunxHFQLfzQQ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T15:37:06","name":"configure: Implement --enable-host-bind-now","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGOjIunxHFQLfzQQ@redhat.com/mbox/"},{"id":94761,"url":"https://patchwork.plctlab.org/api/1.2/patches/94761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153811.3515353-1-ppalka@redhat.com/","msgid":"<20230516153811.3515353-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-16T15:38:11","name":"c++: desig init in presence of list ctor [PR109871]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516153811.3515353-1-ppalka@redhat.com/mbox/"},{"id":94846,"url":"https://patchwork.plctlab.org/api/1.2/patches/94846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdb83fad-a824-bbfd-c049-29c0a418dbc8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T17:22:00","name":"[committed] rs6000: Enable REE pass by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdb83fad-a824-bbfd-c049-29c0a418dbc8@linux.ibm.com/mbox/"},{"id":94847,"url":"https://patchwork.plctlab.org/api/1.2/patches/94847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173037.1807702-1-jwakely@redhat.com/","msgid":"<20230516173037.1807702-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T17:30:37","name":"libstdc++: Disable embedded tzdata for all 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173037.1807702-1-jwakely@redhat.com/mbox/"},{"id":94849,"url":"https://patchwork.plctlab.org/api/1.2/patches/94849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173156.1826089-1-jwakely@redhat.com/","msgid":"<20230516173156.1826089-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-16T17:31:56","name":"[committed] libstdc++: Disable cacheline alignment for DJGPP [PR109741]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516173156.1826089-1-jwakely@redhat.com/mbox/"},{"id":94869,"url":"https://patchwork.plctlab.org/api/1.2/patches/94869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516191354.155428-1-polacek@redhat.com/","msgid":"<20230516191354.155428-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-05-16T19:13:54","name":"c++: -Wdangling-reference not suppressed in template [PR109774]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230516191354.155428-1-polacek@redhat.com/mbox/"},{"id":94871,"url":"https://patchwork.plctlab.org/api/1.2/patches/94871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGPa0mUUzxt2bO6d@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-16T19:34:42","name":"c++: Don'\''t try to initialize zero width bitfields in zero initialization [PR109868]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGPa0mUUzxt2bO6d@tucnak/mbox/"},{"id":94984,"url":"https://patchwork.plctlab.org/api/1.2/patches/94984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a64ef3fd-79cc-5a27-309f-6117c16f61fa@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-16T23:46:47","name":"[committed] c: Remove restrictions on declarations in '\''for'\'' loops for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a64ef3fd-79cc-5a27-309f-6117c16f61fa@codesourcery.com/mbox/"},{"id":94993,"url":"https://patchwork.plctlab.org/api/1.2/patches/94993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517005256.1718424-1-apinski@marvell.com/","msgid":"<20230517005256.1718424-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-17T00:52:56","name":"Fix PR 106900: array-bounds warning inside simplify_builtin_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517005256.1718424-1-apinski@marvell.com/mbox/"},{"id":94998,"url":"https://patchwork.plctlab.org/api/1.2/patches/94998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517015143.4023434-1-juzhe.zhong@rivai.ai/","msgid":"<20230517015143.4023434-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T01:51:43","name":"RISC-V: Add rounding mode enum for fixed-point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517015143.4023434-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95057,"url":"https://patchwork.plctlab.org/api/1.2/patches/95057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517052521.405836-1-juzhe.zhong@rivai.ai/","msgid":"<20230517052521.405836-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T05:25:21","name":"RISC-V: Introduce rounding mode operand into fixed-point intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517052521.405836-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95060,"url":"https://patchwork.plctlab.org/api/1.2/patches/95060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f026396c-59b8-36ae-2332-e2ece6db2e3b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T06:05:53","name":"vect: Don'\''t retry if the previous analysis fails","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f026396c-59b8-36ae-2332-e2ece6db2e3b@linux.ibm.com/mbox/"},{"id":95061,"url":"https://patchwork.plctlab.org/api/1.2/patches/95061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com/","msgid":"<72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:09:28","name":"[1/2] vect: Refactor code for index == count in vect_transform_slp_perm_load_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72a5c5db-bc06-eded-d229-82af34342515@linux.ibm.com/mbox/"},{"id":95063,"url":"https://patchwork.plctlab.org/api/1.2/patches/95063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517061050.3778864-1-guojiufu@linux.ibm.com/","msgid":"<20230517061050.3778864-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:10:50","name":"Optimized \"(X - N * M) / N + M\" to \"X / N\" if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517061050.3778864-1-guojiufu@linux.ibm.com/mbox/"},{"id":95064,"url":"https://patchwork.plctlab.org/api/1.2/patches/95064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com/","msgid":"<71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com>","list_archive_url":null,"date":"2023-05-17T06:15:00","name":"[2/2] vect: Enhance cost evaluation in vect_transform_slp_perm_load_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/71fda837-6a92-7f74-43e1-90b046919f6a@linux.ibm.com/mbox/"},{"id":95073,"url":"https://patchwork.plctlab.org/api/1.2/patches/95073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517065702.2935000-1-hongtao.liu@intel.com/","msgid":"<20230517065702.2935000-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-17T06:57:02","name":"Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517065702.2935000-1-hongtao.liu@intel.com/mbox/"},{"id":95097,"url":"https://patchwork.plctlab.org/api/1.2/patches/95097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517081420.1074223-1-pan2.li@intel.com/","msgid":"<20230517081420.1074223-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-17T08:14:20","name":"RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool[2-64]_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517081420.1074223-1-pan2.li@intel.com/mbox/"},{"id":95098,"url":"https://patchwork.plctlab.org/api/1.2/patches/95098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGSOCJBujabM5gNh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T08:19:20","name":"[committed] wide-int: Fix up function comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGSOCJBujabM5gNh@tucnak/mbox/"},{"id":95105,"url":"https://patchwork.plctlab.org/api/1.2/patches/95105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090315.795-1-jinma@linux.alibaba.com/","msgid":"<20230517090315.795-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-17T09:03:15","name":"Fix type error of '\''switch (SUBREG_BYTE (op)).'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090315.795-1-jinma@linux.alibaba.com/mbox/"},{"id":95108,"url":"https://patchwork.plctlab.org/api/1.2/patches/95108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090803.813-1-jinma@linux.alibaba.com/","msgid":"<20230517090803.813-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-17T09:08:03","name":"RISC-V: Remove trailing spaces on lines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517090803.813-1-jinma@linux.alibaba.com/mbox/"},{"id":95122,"url":"https://patchwork.plctlab.org/api/1.2/patches/95122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517092238.imdawv4fkhu466bf@debian/","msgid":"<20230517092238.imdawv4fkhu466bf@debian>","list_archive_url":null,"date":"2023-05-17T09:22:38","name":"[13-backport] riscv/linux: Don'\''t add -latomic with -pthread","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517092238.imdawv4fkhu466bf@debian/mbox/"},{"id":95135,"url":"https://patchwork.plctlab.org/api/1.2/patches/95135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517095818.1285188-1-juzhe.zhong@rivai.ai/","msgid":"<20230517095818.1285188-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-17T09:58:18","name":"RISC-V: Add mode switching target hook to insert rounding mode config for fixed-point instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517095818.1285188-1-juzhe.zhong@rivai.ai/mbox/"},{"id":95192,"url":"https://patchwork.plctlab.org/api/1.2/patches/95192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com/","msgid":"<80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com>","list_archive_url":null,"date":"2023-05-17T11:31:08","name":"[committed] Re: [Patch,v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80a431e8-9598-91d4-7616-de9f2a8bc56f@codesourcery.com/mbox/"},{"id":95226,"url":"https://patchwork.plctlab.org/api/1.2/patches/95226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517130222.2534562-1-lili.cui@intel.com/","msgid":"<20230517130222.2534562-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-17T13:02:22","name":"PR gcc/98350:Handle FMA friendly in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517130222.2534562-1-lili.cui@intel.com/mbox/"},{"id":95276,"url":"https://patchwork.plctlab.org/api/1.2/patches/95276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-1-aldyh@redhat.com/","msgid":"<20230517141020.464106-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:10:19","name":"[COMMITTED] Provide support for copying unsupported ranges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-1-aldyh@redhat.com/mbox/"},{"id":95277,"url":"https://patchwork.plctlab.org/api/1.2/patches/95277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-2-aldyh@redhat.com/","msgid":"<20230517141020.464106-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:10:20","name":"[COMMITTED] Add Value_Range::operator=.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141020.464106-2-aldyh@redhat.com/mbox/"},{"id":95279,"url":"https://patchwork.plctlab.org/api/1.2/patches/95279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141622.464538-1-aldyh@redhat.com/","msgid":"<20230517141622.464538-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:16:22","name":"Provide an API for ipa_vr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517141622.464538-1-aldyh@redhat.com/mbox/"},{"id":95282,"url":"https://patchwork.plctlab.org/api/1.2/patches/95282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517143030.465081-1-aldyh@redhat.com/","msgid":"<20230517143030.465081-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-17T14:30:31","name":"Convert ipcp_vr_lattice to type agnostic framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517143030.465081-1-aldyh@redhat.com/mbox/"},{"id":95396,"url":"https://patchwork.plctlab.org/api/1.2/patches/95396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNJHHe4Q52N93X9Y5OkGb-1pMpqvX2ZpgFanW9hnueiYQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T16:02:31","name":"[v2] RISC-V: Remove masking third operand of rotate instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNJHHe4Q52N93X9Y5OkGb-1pMpqvX2ZpgFanW9hnueiYQ@mail.gmail.com/mbox/"},{"id":95468,"url":"https://patchwork.plctlab.org/api/1.2/patches/95468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUYH+SgUWanqPVA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:08:31","name":"i386: Fix up types in __builtin_{inf,huge_val,nan{,s},fabs,copysign}q builtins [PR109884]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUYH+SgUWanqPVA@tucnak/mbox/"},{"id":95469,"url":"https://patchwork.plctlab.org/api/1.2/patches/95469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUaWQkrIkrtlbPa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:18:01","name":"libstdc++: Fix up some templates [PR109883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGUaWQkrIkrtlbPa@tucnak/mbox/"},{"id":95478,"url":"https://patchwork.plctlab.org/api/1.2/patches/95478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y37a95TGsZtHtCZtNXiecqGJ-22AvB+=AxK_Tfh+AaAg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:29:19","name":"[COMMITTED] i386: Adjust emulated integer vector mode multiplication costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y37a95TGsZtHtCZtNXiecqGJ-22AvB+=AxK_Tfh+AaAg@mail.gmail.com/mbox/"},{"id":95486,"url":"https://patchwork.plctlab.org/api/1.2/patches/95486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517184352.32144-1-amonakov@ispras.ru/","msgid":"<20230517184352.32144-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-17T18:43:52","name":"[committed] tree-ssa-math-opts: correct -ffp-contract= check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517184352.32144-1-amonakov@ispras.ru/mbox/"},{"id":95490,"url":"https://patchwork.plctlab.org/api/1.2/patches/95490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f62baae8-2c7b-45b2-9cd9-da495125cc90-1684349530775@3c-app-gmx-bap55/","msgid":"","list_archive_url":null,"date":"2023-05-17T18:52:10","name":"Fortran: set shape of initializers of zero-sized arrays [PR95374,PR104352]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f62baae8-2c7b-45b2-9cd9-da495125cc90-1684349530775@3c-app-gmx-bap55/mbox/"},{"id":95495,"url":"https://patchwork.plctlab.org/api/1.2/patches/95495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190552.2023422-1-jwakely@redhat.com/","msgid":"<20230517190552.2023422-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:05:52","name":"[committed] libstdc++: Implement LWG 3877 for std::expected monadic ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190552.2023422-1-jwakely@redhat.com/mbox/"},{"id":95497,"url":"https://patchwork.plctlab.org/api/1.2/patches/95497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190607.2023676-1-jwakely@redhat.com/","msgid":"<20230517190607.2023676-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:06:07","name":"[committed] libstdc++: Add system_header pragma to ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190607.2023676-1-jwakely@redhat.com/mbox/"},{"id":95498,"url":"https://patchwork.plctlab.org/api/1.2/patches/95498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190715.2024283-1-jwakely@redhat.com/","msgid":"<20230517190715.2024283-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-17T19:07:15","name":"[committed] libstdc++: Uncomment checks for enumeration types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517190715.2024283-1-jwakely@redhat.com/mbox/"},{"id":95534,"url":"https://patchwork.plctlab.org/api/1.2/patches/95534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517202646.3793039-1-arsen@aarsen.me/","msgid":"<20230517202646.3793039-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-05-17T20:26:46","name":"[pushed] doc: Fix a pinch of typos in extend.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230517202646.3793039-1-arsen@aarsen.me/mbox/"},{"id":95546,"url":"https://patchwork.plctlab.org/api/1.2/patches/95546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGU7kyENloNHj6vd@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-05-17T20:39:47","name":"[committed] hppa: Add clear_cache expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGU7kyENloNHj6vd@mx3210.localdomain/mbox/"},{"id":95594,"url":"https://patchwork.plctlab.org/api/1.2/patches/95594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c8e37e-0748-5333-002a-026348b19627@acm.org/","msgid":"<17c8e37e-0748-5333-002a-026348b19627@acm.org>","list_archive_url":null,"date":"2023-05-17T23:38:33","name":"Allow plugin-specific dumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c8e37e-0748-5333-002a-026348b19627@acm.org/mbox/"},{"id":95596,"url":"https://patchwork.plctlab.org/api/1.2/patches/95596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca6c3b-79e-2ee2-d815-f58cc7e7b197@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T00:08:44","name":"[committed] c: Handle printf %B like %b for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca6c3b-79e-2ee2-d815-f58cc7e7b197@codesourcery.com/mbox/"},{"id":95633,"url":"https://patchwork.plctlab.org/api/1.2/patches/95633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518031725.3164716-1-pan2.li@intel.com/","msgid":"<20230518031725.3164716-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T03:17:25","name":"RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518031725.3164716-1-pan2.li@intel.com/mbox/"},{"id":95670,"url":"https://patchwork.plctlab.org/api/1.2/patches/95670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063209.3270504-1-pan2.li@intel.com/","msgid":"<20230518063209.3270504-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T06:32:09","name":"RISC-V: Support RVV VREINTERPRET from vbool*_t to vuint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063209.3270504-1-pan2.li@intel.com/mbox/"},{"id":95671,"url":"https://patchwork.plctlab.org/api/1.2/patches/95671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063652.3273735-1-pan2.li@intel.com/","msgid":"<20230518063652.3273735-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-18T06:36:52","name":"[v2] RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518063652.3273735-1-pan2.li@intel.com/mbox/"},{"id":95677,"url":"https://patchwork.plctlab.org/api/1.2/patches/95677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acdb8e2b-7c95-0fd2-2189-51f661f15bc5@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T07:14:28","name":"[v1] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acdb8e2b-7c95-0fd2-2189-51f661f15bc5@linux.ibm.com/mbox/"},{"id":95707,"url":"https://patchwork.plctlab.org/api/1.2/patches/95707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com/","msgid":"<20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com>","list_archive_url":null,"date":"2023-05-18T08:39:09","name":"[1/4] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518083909.15739-1-Oluwatamilore.Adebayo@arm.com/mbox/"},{"id":95732,"url":"https://patchwork.plctlab.org/api/1.2/patches/95732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4801877.GXAFRqVoOG@fomalhaut/","msgid":"<4801877.GXAFRqVoOG@fomalhaut>","list_archive_url":null,"date":"2023-05-18T09:28:51","name":"Fix internal error on small array with negative lower bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4801877.GXAFRqVoOG@fomalhaut/mbox/"},{"id":95772,"url":"https://patchwork.plctlab.org/api/1.2/patches/95772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-1-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-1-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:21","name":"[committed,gcc12,backport] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-1-stam.markianos-wright@arm.com/mbox/"},{"id":95760,"url":"https://patchwork.plctlab.org/api/1.2/patches/95760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-2-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-2-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:22","name":"[committed,gcc12,backport] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-2-stam.markianos-wright@arm.com/mbox/"},{"id":95763,"url":"https://patchwork.plctlab.org/api/1.2/patches/95763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-4-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-4-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:24","name":"[committed,gcc12,backport] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-4-stam.markianos-wright@arm.com/mbox/"},{"id":95761,"url":"https://patchwork.plctlab.org/api/1.2/patches/95761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-5-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-5-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:25","name":"[committed,gcc12,backport] arm: Add vorrq_n overloading into vorrq _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-5-stam.markianos-wright@arm.com/mbox/"},{"id":95773,"url":"https://patchwork.plctlab.org/api/1.2/patches/95773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-6-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-6-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:26","name":"[committed,gcc12,backport] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-6-stam.markianos-wright@arm.com/mbox/"},{"id":95768,"url":"https://patchwork.plctlab.org/api/1.2/patches/95768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-8-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-8-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:28","name":"[committed,gcc12,backport] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-8-stam.markianos-wright@arm.com/mbox/"},{"id":95766,"url":"https://patchwork.plctlab.org/api/1.2/patches/95766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-9-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-9-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:29","name":"[committed,gcc12,backport] arm testsuite: XFAIL or relax registers in some tests [PR109697]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-9-stam.markianos-wright@arm.com/mbox/"},{"id":95767,"url":"https://patchwork.plctlab.org/api/1.2/patches/95767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-10-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-10-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:30","name":"[committed,gcc12,backport] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-10-stam.markianos-wright@arm.com/mbox/"},{"id":95762,"url":"https://patchwork.plctlab.org/api/1.2/patches/95762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-11-stam.markianos-wright@arm.com/","msgid":"<20230518105331.1301864-11-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:53:31","name":"[committed,gcc12,backport,arm] complete vmsr/vmrs blank and case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105331.1301864-11-stam.markianos-wright@arm.com/mbox/"},{"id":95781,"url":"https://patchwork.plctlab.org/api/1.2/patches/95781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-1-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-1-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:07","name":"[commited,trunk,1/9] arm: Mve testsuite improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-1-stam.markianos-wright@arm.com/mbox/"},{"id":95778,"url":"https://patchwork.plctlab.org/api/1.2/patches/95778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-2-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-2-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:08","name":"[commited,trunk,2/9] arm: Fix vstrwq* backend + testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-2-stam.markianos-wright@arm.com/mbox/"},{"id":95776,"url":"https://patchwork.plctlab.org/api/1.2/patches/95776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-4-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-4-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:10","name":"[commited,trunk,4/9] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-4-stam.markianos-wright@arm.com/mbox/"},{"id":95775,"url":"https://patchwork.plctlab.org/api/1.2/patches/95775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-5-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-5-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:11","name":"[commited,trunk,5/9] arm: Fix overloading of MVE scalar constant parameters on vbicq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-5-stam.markianos-wright@arm.com/mbox/"},{"id":95779,"url":"https://patchwork.plctlab.org/api/1.2/patches/95779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-6-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-6-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:12","name":"[commited,trunk,6/9] arm: Fix MVE header pointer overloads this time (and a bit more tidying)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-6-stam.markianos-wright@arm.com/mbox/"},{"id":95782,"url":"https://patchwork.plctlab.org/api/1.2/patches/95782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-7-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-7-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:13","name":"[commited,trunk,7/9] arm testsuite: Remove reduntant tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-7-stam.markianos-wright@arm.com/mbox/"},{"id":95777,"url":"https://patchwork.plctlab.org/api/1.2/patches/95777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-8-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-8-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:14","name":"[commited,trunk,8/9] arm testsuite: XFAIL or relax registers in some tests [PR109697]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-8-stam.markianos-wright@arm.com/mbox/"},{"id":95780,"url":"https://patchwork.plctlab.org/api/1.2/patches/95780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-9-stam.markianos-wright@arm.com/","msgid":"<20230518105915.1304768-9-stam.markianos-wright@arm.com>","list_archive_url":null,"date":"2023-05-18T10:59:15","name":"[commited,trunk,9/9] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518105915.1304768-9-stam.markianos-wright@arm.com/mbox/"},{"id":95792,"url":"https://patchwork.plctlab.org/api/1.2/patches/95792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com/","msgid":"<58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com>","list_archive_url":null,"date":"2023-05-18T11:16:04","name":"rs6000: Update powerpc test fold-vec-extract-int.p8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/58c67a6d-ac48-c0dd-7f0c-c508e377db52@linux.ibm.com/mbox/"},{"id":95852,"url":"https://patchwork.plctlab.org/api/1.2/patches/95852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at/","msgid":"<4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-18T12:46:34","name":"[PING,C] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4769c136aec5728c2954e39bfbca2af27c390593.camel@tugraz.at/mbox/"},{"id":95855,"url":"https://patchwork.plctlab.org/api/1.2/patches/95855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-2-jwakely@redhat.com/","msgid":"<20230518125647.2105203-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:45","name":"[1/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-2-jwakely@redhat.com/mbox/"},{"id":95854,"url":"https://patchwork.plctlab.org/api/1.2/patches/95854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-3-jwakely@redhat.com/","msgid":"<20230518125647.2105203-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:46","name":"[2/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-3-jwakely@redhat.com/mbox/"},{"id":95856,"url":"https://patchwork.plctlab.org/api/1.2/patches/95856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-4-jwakely@redhat.com/","msgid":"<20230518125647.2105203-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T12:56:47","name":"[3/3] contrib: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518125647.2105203-4-jwakely@redhat.com/mbox/"},{"id":95858,"url":"https://patchwork.plctlab.org/api/1.2/patches/95858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518130358.2106172-1-jwakely@redhat.com/","msgid":"<20230518130358.2106172-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-18T13:03:58","name":"[v2,2/3] gcc: Fix nonportable shell syntax in \"test\" and \"[\" commands [PR105831]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518130358.2106172-1-jwakely@redhat.com/mbox/"},{"id":95994,"url":"https://patchwork.plctlab.org/api/1.2/patches/95994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5739d25-396c-d0d8-d10d-f23defe81fed@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-18T16:41:10","name":"[avr,committed] Fix a trivial typo in gen-avr-mmcu-specs.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5739d25-396c-d0d8-d10d-f23defe81fed@gjlay.de/mbox/"},{"id":96016,"url":"https://patchwork.plctlab.org/api/1.2/patches/96016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518175927.4158045-1-ppalka@redhat.com/","msgid":"<20230518175927.4158045-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-18T17:59:27","name":"c++: scoped variable template-id of reference type [PR97340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518175927.4158045-1-ppalka@redhat.com/mbox/"},{"id":96017,"url":"https://patchwork.plctlab.org/api/1.2/patches/96017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518180114.4158415-1-ppalka@redhat.com/","msgid":"<20230518180114.4158415-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-18T18:01:14","name":"c++: simplify norm_cache manipulation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518180114.4158415-1-ppalka@redhat.com/mbox/"},{"id":96022,"url":"https://patchwork.plctlab.org/api/1.2/patches/96022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yq+s2JkNrazY-H1bANSTFW10+kJ81z8wefUrAPeN+Szg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T18:50:25","name":"[COMMITTED] i386: Add infrastructure for QImode partial vector mult and shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yq+s2JkNrazY-H1bANSTFW10+kJ81z8wefUrAPeN+Szg@mail.gmail.com/mbox/"},{"id":96046,"url":"https://patchwork.plctlab.org/api/1.2/patches/96046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518205716.3258223-1-vineetg@rivosinc.com/","msgid":"<20230518205716.3258223-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-18T20:57:16","name":"RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518205716.3258223-1-vineetg@rivosinc.com/mbox/"},{"id":96048,"url":"https://patchwork.plctlab.org/api/1.2/patches/96048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518210331.11564-1-amonakov@ispras.ru/","msgid":"<20230518210331.11564-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-18T21:03:31","name":"c-family: implement -ffp-contract=on","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230518210331.11564-1-amonakov@ispras.ru/mbox/"},{"id":96049,"url":"https://patchwork.plctlab.org/api/1.2/patches/96049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b897a2be3bfc7ef730091f66f1102104aab1924b.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T21:12:51","name":"[v2] rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b897a2be3bfc7ef730091f66f1102104aab1924b.camel@us.ibm.com/mbox/"},{"id":96101,"url":"https://patchwork.plctlab.org/api/1.2/patches/96101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGa1mbB+/HinAW2o@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-18T23:32:41","name":"[v2] configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGa1mbB+/HinAW2o@redhat.com/mbox/"},{"id":96140,"url":"https://patchwork.plctlab.org/api/1.2/patches/96140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com/","msgid":"<37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com>","list_archive_url":null,"date":"2023-05-19T00:42:54","name":"[committed] c: Do not allow thread-local tentative definitions for C2x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37764f8a-a164-bd7c-79d-ef4913becf74@codesourcery.com/mbox/"},{"id":96165,"url":"https://patchwork.plctlab.org/api/1.2/patches/96165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-1-apinski@marvell.com/","msgid":"<20230519021410.1841811-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T02:14:09","name":"[1/2] Improve do_store_flag for single bit comparison against 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-1-apinski@marvell.com/mbox/"},{"id":96166,"url":"https://patchwork.plctlab.org/api/1.2/patches/96166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-2-apinski@marvell.com/","msgid":"<20230519021410.1841811-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T02:14:10","name":"[2/2] Improve do_store_flag for comparing single bit against that bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519021410.1841811-2-apinski@marvell.com/mbox/"},{"id":96175,"url":"https://patchwork.plctlab.org/api/1.2/patches/96175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519034823.653-1-shihua@iscas.ac.cn/","msgid":"<20230519034823.653-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-05-19T03:48:23","name":"[RFC,V2] RISC-V : Support rv64 ilp32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519034823.653-1-shihua@iscas.ac.cn/mbox/"},{"id":96203,"url":"https://patchwork.plctlab.org/api/1.2/patches/96203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519061152.3154332-1-yunqiang.su@cipunited.com/","msgid":"<20230519061152.3154332-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-05-19T06:11:52","name":"MIPS: don'\''t expand large block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519061152.3154332-1-yunqiang.su@cipunited.com/mbox/"},{"id":96212,"url":"https://patchwork.plctlab.org/api/1.2/patches/96212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com/","msgid":"<4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com>","list_archive_url":null,"date":"2023-05-19T07:40:24","name":"[v1] rs6000: Update powerpc test fold-vec-extract-int.p8.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b2a20b9-9f52-05b5-371c-e0734e0df6b7@linux.ibm.com/mbox/"},{"id":96220,"url":"https://patchwork.plctlab.org/api/1.2/patches/96220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519074209.307764-1-jie.mei@oss.cipunited.com/","msgid":"<20230519074209.307764-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-19T07:44:06","name":"MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519074209.307764-1-jie.mei@oss.cipunited.com/mbox/"},{"id":96232,"url":"https://patchwork.plctlab.org/api/1.2/patches/96232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcsc76Md1sN0D9i@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T07:59:47","name":"tree-ssa-math-opts: Pattern recognize hand written __builtin_mul_overflow_p with same unsigned types even when target just has highpart umul [PR101856]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcsc76Md1sN0D9i@tucnak/mbox/"},{"id":96251,"url":"https://patchwork.plctlab.org/api/1.2/patches/96251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGct7KUwpvHp78FB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T08:06:04","name":"tree-ssa-math-opts: Pattern recognize some further hand written forms of signed __builtin_mul_overflow{,_p} [PR105776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGct7KUwpvHp78FB@tucnak/mbox/"},{"id":96252,"url":"https://patchwork.plctlab.org/api/1.2/patches/96252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080631.309062-1-jie.mei@oss.cipunited.com/","msgid":"<20230519080631.309062-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-19T08:07:03","name":"[v2] MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080631.309062-1-jie.mei@oss.cipunited.com/mbox/"},{"id":96253,"url":"https://patchwork.plctlab.org/api/1.2/patches/96253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080829.4ADE033E93@hamza.pair.com/","msgid":"<20230519080829.4ADE033E93@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T08:08:28","name":"[pushed] wwwdocs: onlinedocs/13.1.0: Remove last trace of XHTML","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519080829.4ADE033E93@hamza.pair.com/mbox/"},{"id":96254,"url":"https://patchwork.plctlab.org/api/1.2/patches/96254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081130.34977-1-iain@sandoe.co.uk/","msgid":"<20230519081130.34977-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-05-19T08:11:30","name":"[pushed] Darwin, libgcc : Adjust min version supported for the OS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081130.34977-1-iain@sandoe.co.uk/mbox/"},{"id":96256,"url":"https://patchwork.plctlab.org/api/1.2/patches/96256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081505.DA15D33E93@hamza.pair.com/","msgid":"<20230519081505.DA15D33E93@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T08:15:05","name":"[pushed] libstdc++: Move lafstern.org reference to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519081505.DA15D33E93@hamza.pair.com/mbox/"},{"id":96260,"url":"https://patchwork.plctlab.org/api/1.2/patches/96260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcwyQG4dEaGPArd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-19T08:18:17","name":"[committed] libgomp: Fix up -static -fopenmp linking [PR109904]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGcwyQG4dEaGPArd@tucnak/mbox/"},{"id":96332,"url":"https://patchwork.plctlab.org/api/1.2/patches/96332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com/","msgid":"<97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com>","list_archive_url":null,"date":"2023-05-19T09:43:41","name":"[v2] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97ba4caa-8072-98ab-83cb-6570db6a04b7@linux.ibm.com/mbox/"},{"id":96377,"url":"https://patchwork.plctlab.org/api/1.2/patches/96377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com/","msgid":"<77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:07:03","name":"RISC-V: Allow more loading of const vectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77a010cf-b9c3-7f7f-06cc-393fbe8aff53@gmail.com/mbox/"},{"id":96379,"url":"https://patchwork.plctlab.org/api/1.2/patches/96379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com/","msgid":"<6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:10:25","name":"RISC-V: testsuite: Remove empty *-run-template.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f3ff52c-0e6d-ee5b-9e50-3586f128a518@gmail.com/mbox/"},{"id":96392,"url":"https://patchwork.plctlab.org/api/1.2/patches/96392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com/","msgid":"<0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com>","list_archive_url":null,"date":"2023-05-19T11:32:24","name":"RISC-V: Implement autovec abs, vneg, vnot.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe6c64c-46e2-3e5f-38d6-a20e26234592@gmail.com/mbox/"},{"id":96394,"url":"https://patchwork.plctlab.org/api/1.2/patches/96394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab760102a39e56340c68cba76a79fea70f7cc0f4.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-19T11:50:10","name":"[C,v2] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab760102a39e56340c68cba76a79fea70f7cc0f4.camel@tugraz.at/mbox/"},{"id":96440,"url":"https://patchwork.plctlab.org/api/1.2/patches/96440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519140206.1369B33E6E@hamza.pair.com/","msgid":"<20230519140206.1369B33E6E@hamza.pair.com>","list_archive_url":null,"date":"2023-05-19T14:01:59","name":"[pushed] wwwdocs: preprocess: Check whether input files exist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519140206.1369B33E6E@hamza.pair.com/mbox/"},{"id":96472,"url":"https://patchwork.plctlab.org/api/1.2/patches/96472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519144848.1873152-1-apinski@marvell.com/","msgid":"<20230519144848.1873152-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-19T14:48:48","name":"Fix driver/33980: Precompiled header file not removed on error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519144848.1873152-1-apinski@marvell.com/mbox/"},{"id":96532,"url":"https://patchwork.plctlab.org/api/1.2/patches/96532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com/","msgid":"<212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com>","list_archive_url":null,"date":"2023-05-19T17:18:22","name":"libgomp: Honor OpenMP'\''s nteams-var ICV as upper limit on num teams [PR109875]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212f3744-5ad2-e2c4-5b07-62f1cf0804a6@codesourcery.com/mbox/"},{"id":96575,"url":"https://patchwork.plctlab.org/api/1.2/patches/96575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519183851.760404-1-ppalka@redhat.com/","msgid":"<20230519183851.760404-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-05-19T18:38:50","name":"c++: mangle noexcept-expr [PR70790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519183851.760404-1-ppalka@redhat.com/mbox/"},{"id":96577,"url":"https://patchwork.plctlab.org/api/1.2/patches/96577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed49c4e3-5598-9fee-66cb-a978af77da3f@in.tum.de/","msgid":"","list_archive_url":null,"date":"2023-05-19T18:50:33","name":"[v2] release the sorted FDE array when deregistering a frame [PR109685]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed49c4e3-5598-9fee-66cb-a978af77da3f@in.tum.de/mbox/"},{"id":96580,"url":"https://patchwork.plctlab.org/api/1.2/patches/96580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGfGVAPg5HwFLSYE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-19T18:56:20","name":"[v3] configure: Implement --enable-host-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGfGVAPg5HwFLSYE@redhat.com/mbox/"},{"id":96622,"url":"https://patchwork.plctlab.org/api/1.2/patches/96622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f44ec2bb791d05c69636b8d881d74edb4b57234f.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-19T20:38:09","name":"[C] Remove dead code related to type compatibility across TUs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f44ec2bb791d05c69636b8d881d74edb4b57234f.camel@tugraz.at/mbox/"},{"id":96623,"url":"https://patchwork.plctlab.org/api/1.2/patches/96623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-2-qing.zhao@oracle.com/","msgid":"<20230519204948.237791-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-19T20:49:47","name":"[V7,1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-2-qing.zhao@oracle.com/mbox/"},{"id":96629,"url":"https://patchwork.plctlab.org/api/1.2/patches/96629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-3-qing.zhao@oracle.com/","msgid":"<20230519204948.237791-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-19T20:49:48","name":"[V7,2/2] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519204948.237791-3-qing.zhao@oracle.com/mbox/"},{"id":96674,"url":"https://patchwork.plctlab.org/api/1.2/patches/96674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519235618.4078456-1-pan2.li@intel.com/","msgid":"<20230519235618.4078456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-19T23:56:18","name":"Mode-Switching: Fix local array maybe uninitialized warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230519235618.4078456-1-pan2.li@intel.com/mbox/"},{"id":96711,"url":"https://patchwork.plctlab.org/api/1.2/patches/96711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-2-apinski@marvell.com/","msgid":"<20230520021451.1901275-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:45","name":"[1/7] Move fold_single_bit_test to expr.cc from fold-const.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-2-apinski@marvell.com/mbox/"},{"id":96710,"url":"https://patchwork.plctlab.org/api/1.2/patches/96710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-3-apinski@marvell.com/","msgid":"<20230520021451.1901275-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:46","name":"[2/7] Inline and simplify fold_single_bit_test_into_sign_test into fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-3-apinski@marvell.com/mbox/"},{"id":96712,"url":"https://patchwork.plctlab.org/api/1.2/patches/96712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-4-apinski@marvell.com/","msgid":"<20230520021451.1901275-4-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:47","name":"[3/7] Use get_def_for_expr in fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-4-apinski@marvell.com/mbox/"},{"id":96715,"url":"https://patchwork.plctlab.org/api/1.2/patches/96715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-5-apinski@marvell.com/","msgid":"<20230520021451.1901275-5-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:48","name":"[4/7] Simplify fold_single_bit_test slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-5-apinski@marvell.com/mbox/"},{"id":96716,"url":"https://patchwork.plctlab.org/api/1.2/patches/96716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-6-apinski@marvell.com/","msgid":"<20230520021451.1901275-6-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:49","name":"[5/7] Simplify fold_single_bit_test with respect to code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-6-apinski@marvell.com/mbox/"},{"id":96713,"url":"https://patchwork.plctlab.org/api/1.2/patches/96713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-7-apinski@marvell.com/","msgid":"<20230520021451.1901275-7-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:50","name":"[6/7] Use BIT_FIELD_REF inside fold_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-7-apinski@marvell.com/mbox/"},{"id":96714,"url":"https://patchwork.plctlab.org/api/1.2/patches/96714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-8-apinski@marvell.com/","msgid":"<20230520021451.1901275-8-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T02:14:51","name":"[7/7] Expand directly for single bit test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520021451.1901275-8-apinski@marvell.com/mbox/"},{"id":96723,"url":"https://patchwork.plctlab.org/api/1.2/patches/96723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520045447.3276232-1-juzhe.zhong@rivai.ai/","msgid":"<20230520045447.3276232-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-20T04:54:47","name":"RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520045447.3276232-1-juzhe.zhong@rivai.ai/mbox/"},{"id":96799,"url":"https://patchwork.plctlab.org/api/1.2/patches/96799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-1-apinski@marvell.com/","msgid":"<20230520150406.1932767-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T15:04:05","name":"[PATCHv2,1/2] Improve do_store_flag for single bit comparison against 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-1-apinski@marvell.com/mbox/"},{"id":96800,"url":"https://patchwork.plctlab.org/api/1.2/patches/96800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-2-apinski@marvell.com/","msgid":"<20230520150406.1932767-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-20T15:04:06","name":"[PATCHv2,2/2] Improve do_store_flag for comparing single bit against that bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520150406.1932767-2-apinski@marvell.com/mbox/"},{"id":96818,"url":"https://patchwork.plctlab.org/api/1.2/patches/96818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGkued2UMF5mMQGD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-05-20T20:32:57","name":"match.pd: Ensure (op CONSTANT_CLASS_P CONSTANT_CLASS_P) is simplified [PR109505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZGkued2UMF5mMQGD@tucnak/mbox/"},{"id":96822,"url":"https://patchwork.plctlab.org/api/1.2/patches/96822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520223748.0AF9C33E83@hamza.pair.com/","msgid":"<20230520223748.0AF9C33E83@hamza.pair.com>","list_archive_url":null,"date":"2023-05-20T22:37:44","name":"[pushed,1/N] install.texi: Remove alpha*-*-* section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230520223748.0AF9C33E83@hamza.pair.com/mbox/"},{"id":96825,"url":"https://patchwork.plctlab.org/api/1.2/patches/96825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521010949.1957550-1-apinski@marvell.com/","msgid":"<20230521010949.1957550-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T01:09:49","name":"Fix PR 109919: ICE in emit_move_insn with some bit tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521010949.1957550-1-apinski@marvell.com/mbox/"},{"id":96829,"url":"https://patchwork.plctlab.org/api/1.2/patches/96829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521040459.1964837-1-apinski@marvell.com/","msgid":"<20230521040459.1964837-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T04:04:59","name":"Fix expand_single_bit_test for big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521040459.1964837-1-apinski@marvell.com/mbox/"},{"id":96828,"url":"https://patchwork.plctlab.org/api/1.2/patches/96828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521045007.1966279-1-apinski@marvell.com/","msgid":"<20230521045007.1966279-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-21T04:50:07","name":"Fix expand_single_bit_test for big-endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521045007.1966279-1-apinski@marvell.com/mbox/"},{"id":96891,"url":"https://patchwork.plctlab.org/api/1.2/patches/96891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a97f093f-f7d0-49f9-82dc-f65b90bdfc87@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-21T17:12:16","name":"[avr,committed] Fix PR90622","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a97f093f-f7d0-49f9-82dc-f65b90bdfc87@gjlay.de/mbox/"},{"id":96897,"url":"https://patchwork.plctlab.org/api/1.2/patches/96897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521184228.C70D533E87@hamza.pair.com/","msgid":"<20230521184228.C70D533E87@hamza.pair.com>","list_archive_url":null,"date":"2023-05-21T18:42:25","name":"[pushed] wwwdocs: readings: Adjust link to Arm architectures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230521184228.C70D533E87@hamza.pair.com/mbox/"},{"id":96903,"url":"https://patchwork.plctlab.org/api/1.2/patches/96903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f90ea4af-3d2d-4a0c-8444-480ac3e3639f-1684702102536@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-05-21T20:48:22","name":"Fortran: checking and simplification of RESHAPE intrinsic [PR103794]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-f90ea4af-3d2d-4a0c-8444-480ac3e3639f-1684702102536@3c-app-gmx-bap32/mbox/"},{"id":96960,"url":"https://patchwork.plctlab.org/api/1.2/patches/96960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522020804.192222-1-juzhe.zhong@rivai.ai/","msgid":"<20230522020804.192222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T02:08:04","name":"[V12] VECT: Fix issue of multiple-rgroup for length is counting elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522020804.192222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97060,"url":"https://patchwork.plctlab.org/api/1.2/patches/97060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522064138.74056-1-kito.cheng@sifive.com/","msgid":"<20230522064138.74056-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-05-22T06:41:39","name":"RISC-V: Add missing torture-init and torture-finish for rvv.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522064138.74056-1-kito.cheng@sifive.com/mbox/"},{"id":97096,"url":"https://patchwork.plctlab.org/api/1.2/patches/97096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea701092-71a1-7c4b-3070-376f9421252c@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-05-22T07:03:51","name":"[1/2] xtensa: Optimize '\''(x & CST1_POW2) != 0 ? CST2_POW2 : 0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea701092-71a1-7c4b-3070-376f9421252c@yahoo.co.jp/mbox/"},{"id":97095,"url":"https://patchwork.plctlab.org/api/1.2/patches/97095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp/","msgid":"<8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-22T07:04:37","name":"[2/2] xtensa: Merge '\''*addx'\'' and '\''*subx'\'' insn patterns into one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f4e2726-0844-3dd0-8a27-7fb669db8f76@yahoo.co.jp/mbox/"},{"id":97112,"url":"https://patchwork.plctlab.org/api/1.2/patches/97112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522072002.1248114-1-juzhe.zhong@rivai.ai/","msgid":"<20230522072002.1248114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T07:20:02","name":"RISC-V: Reorganize the code of CONST_VECTOR handling in riscv.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522072002.1248114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97123,"url":"https://patchwork.plctlab.org/api/1.2/patches/97123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522073547.591554-1-hongtao.liu@intel.com/","msgid":"<20230522073547.591554-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-05-22T07:35:47","name":"Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522073547.591554-1-hongtao.liu@intel.com/mbox/"},{"id":97169,"url":"https://patchwork.plctlab.org/api/1.2/patches/97169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13270277.uLZWGnKmhe@fomalhaut/","msgid":"<13270277.uLZWGnKmhe@fomalhaut>","list_archive_url":null,"date":"2023-05-22T08:08:10","name":"Fix handling of non-integral bit-fields in native_encode_initializer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13270277.uLZWGnKmhe@fomalhaut/mbox/"},{"id":97171,"url":"https://patchwork.plctlab.org/api/1.2/patches/97171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522081101.1570598-1-juzhe.zhong@rivai.ai/","msgid":"<20230522081101.1570598-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T08:11:01","name":"[V13] VECT: Fix bug of multiple-rgroup for length is counting elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522081101.1570598-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97170,"url":"https://patchwork.plctlab.org/api/1.2/patches/97170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e51c4217-d35c-41bc-2912-42627f83b280@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T08:11:02","name":"[wwwdocs,committed] git.html: Move OG12 to OG13, briefly mention old branches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e51c4217-d35c-41bc-2912-42627f83b280@codesourcery.com/mbox/"},{"id":97174,"url":"https://patchwork.plctlab.org/api/1.2/patches/97174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522083814.1647787-1-juzhe.zhong@rivai.ai/","msgid":"<20230522083814.1647787-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T08:38:14","name":"[V12] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522083814.1647787-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97177,"url":"https://patchwork.plctlab.org/api/1.2/patches/97177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084906.1725082-1-poulhies@adacore.com/","msgid":"<20230522084906.1725082-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:06","name":"[COMMITTED] ada: prevent infinite recursion in Collect_Types_In_Hierarchy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084906.1725082-1-poulhies@adacore.com/mbox/"},{"id":97178,"url":"https://patchwork.plctlab.org/api/1.2/patches/97178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084914.1725248-1-poulhies@adacore.com/","msgid":"<20230522084914.1725248-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:14","name":"[COMMITTED] ada: update Ada_Version_Type in fe.h to match opt.ads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084914.1725248-1-poulhies@adacore.com/mbox/"},{"id":97179,"url":"https://patchwork.plctlab.org/api/1.2/patches/97179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084920.1725312-1-poulhies@adacore.com/","msgid":"<20230522084920.1725312-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:20","name":"[COMMITTED] ada: Update Controlling_Argument when copying trees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084920.1725312-1-poulhies@adacore.com/mbox/"},{"id":97181,"url":"https://patchwork.plctlab.org/api/1.2/patches/97181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084924.1725379-1-poulhies@adacore.com/","msgid":"<20230522084924.1725379-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:24","name":"[COMMITTED] ada: Don'\''t pretty-print DEL within expression images","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084924.1725379-1-poulhies@adacore.com/mbox/"},{"id":97180,"url":"https://patchwork.plctlab.org/api/1.2/patches/97180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084929.1725443-1-poulhies@adacore.com/","msgid":"<20230522084929.1725443-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:29","name":"[COMMITTED] ada: Restrict expression pretty-printer to subexpressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084929.1725443-1-poulhies@adacore.com/mbox/"},{"id":97185,"url":"https://patchwork.plctlab.org/api/1.2/patches/97185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084933.1725506-1-poulhies@adacore.com/","msgid":"<20230522084933.1725506-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:33","name":"[COMMITTED] ada: Fix traversal for the rightmost node of a pretty-printed expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084933.1725506-1-poulhies@adacore.com/mbox/"},{"id":97182,"url":"https://patchwork.plctlab.org/api/1.2/patches/97182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084938.1725583-1-poulhies@adacore.com/","msgid":"<20230522084938.1725583-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:38","name":"[COMMITTED] ada: Fix handling of constrained array declarations in declare-expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084938.1725583-1-poulhies@adacore.com/mbox/"},{"id":97188,"url":"https://patchwork.plctlab.org/api/1.2/patches/97188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084942.1725646-1-poulhies@adacore.com/","msgid":"<20230522084942.1725646-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:42","name":"[COMMITTED] ada: Fix double finalization in conditional exit statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084942.1725646-1-poulhies@adacore.com/mbox/"},{"id":97183,"url":"https://patchwork.plctlab.org/api/1.2/patches/97183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084945.1725711-1-poulhies@adacore.com/","msgid":"<20230522084945.1725711-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:45","name":"[COMMITTED] ada: Better error message if non-Ada2022 code declares No_Return function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084945.1725711-1-poulhies@adacore.com/mbox/"},{"id":97186,"url":"https://patchwork.plctlab.org/api/1.2/patches/97186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084950.1725774-1-poulhies@adacore.com/","msgid":"<20230522084950.1725774-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:50","name":"[COMMITTED] ada: Reject illegal declarations in expression functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084950.1725774-1-poulhies@adacore.com/mbox/"},{"id":97189,"url":"https://patchwork.plctlab.org/api/1.2/patches/97189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084953.1725838-1-poulhies@adacore.com/","msgid":"<20230522084953.1725838-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:53","name":"[COMMITTED] ada: Fix error and crash on imported function with precondition and '\''Base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084953.1725838-1-poulhies@adacore.com/mbox/"},{"id":97187,"url":"https://patchwork.plctlab.org/api/1.2/patches/97187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084956.1725901-1-poulhies@adacore.com/","msgid":"<20230522084956.1725901-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:49:56","name":"[COMMITTED] ada: Implement conversions from Big_Integer to large types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522084956.1725901-1-poulhies@adacore.com/mbox/"},{"id":97193,"url":"https://patchwork.plctlab.org/api/1.2/patches/97193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085001.1725965-1-poulhies@adacore.com/","msgid":"<20230522085001.1725965-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:01","name":"[COMMITTED] ada: Fix crash on Ada.Containers with No_Dispatching_Calls restriction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085001.1725965-1-poulhies@adacore.com/mbox/"},{"id":97184,"url":"https://patchwork.plctlab.org/api/1.2/patches/97184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085004.1726030-1-poulhies@adacore.com/","msgid":"<20230522085004.1726030-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:04","name":"[COMMITTED] ada: Add contracts to Ada.Strings.Unbounded library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085004.1726030-1-poulhies@adacore.com/mbox/"},{"id":97194,"url":"https://patchwork.plctlab.org/api/1.2/patches/97194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085010.1726096-1-poulhies@adacore.com/","msgid":"<20230522085010.1726096-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:10","name":"[COMMITTED] ada: Remove unreferenced utility routine Is_Actual_Tagged_Parameter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085010.1726096-1-poulhies@adacore.com/mbox/"},{"id":97198,"url":"https://patchwork.plctlab.org/api/1.2/patches/97198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085013.1726162-1-poulhies@adacore.com/","msgid":"<20230522085013.1726162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:13","name":"[COMMITTED] ada: Support calls through dereferences in Find_Actual","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085013.1726162-1-poulhies@adacore.com/mbox/"},{"id":97201,"url":"https://patchwork.plctlab.org/api/1.2/patches/97201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085018.1726226-1-poulhies@adacore.com/","msgid":"<20230522085018.1726226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:18","name":"[COMMITTED] ada: Remove redundant protection against empty lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085018.1726226-1-poulhies@adacore.com/mbox/"},{"id":97191,"url":"https://patchwork.plctlab.org/api/1.2/patches/97191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085022.1726290-1-poulhies@adacore.com/","msgid":"<20230522085022.1726290-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:22","name":"[COMMITTED] ada: Remove a remaining reference to ?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085022.1726290-1-poulhies@adacore.com/mbox/"},{"id":97197,"url":"https://patchwork.plctlab.org/api/1.2/patches/97197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085029.1726354-1-poulhies@adacore.com/","msgid":"<20230522085029.1726354-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:29","name":"[COMMITTED] ada: Remove extra parentheses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085029.1726354-1-poulhies@adacore.com/mbox/"},{"id":97200,"url":"https://patchwork.plctlab.org/api/1.2/patches/97200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085034.1726417-1-poulhies@adacore.com/","msgid":"<20230522085034.1726417-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:34","name":"[COMMITTED] ada: Improve -gnatyx style check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085034.1726417-1-poulhies@adacore.com/mbox/"},{"id":97203,"url":"https://patchwork.plctlab.org/api/1.2/patches/97203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085039.1726481-1-poulhies@adacore.com/","msgid":"<20230522085039.1726481-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:39","name":"[COMMITTED] ada: Fix spurious warning on Inline_Always and contracts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085039.1726481-1-poulhies@adacore.com/mbox/"},{"id":97205,"url":"https://patchwork.plctlab.org/api/1.2/patches/97205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085043.1726552-1-poulhies@adacore.com/","msgid":"<20230522085043.1726552-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:43","name":"[COMMITTED] ada: Add warning on frontend inlining of Subprogram_Variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085043.1726552-1-poulhies@adacore.com/mbox/"},{"id":97199,"url":"https://patchwork.plctlab.org/api/1.2/patches/97199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085047.1726616-1-poulhies@adacore.com/","msgid":"<20230522085047.1726616-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:47","name":"[COMMITTED] ada: Accept Assert pragmas in expression functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085047.1726616-1-poulhies@adacore.com/mbox/"},{"id":97206,"url":"https://patchwork.plctlab.org/api/1.2/patches/97206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085051.1726679-1-poulhies@adacore.com/","msgid":"<20230522085051.1726679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:51","name":"[COMMITTED] ada: Add Is_Past_Self_Hiding_Point flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085051.1726679-1-poulhies@adacore.com/mbox/"},{"id":97208,"url":"https://patchwork.plctlab.org/api/1.2/patches/97208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085055.1726743-1-poulhies@adacore.com/","msgid":"<20230522085055.1726743-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:55","name":"[COMMITTED] ada: Cleanup redundant condition in resolution of entity names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085055.1726743-1-poulhies@adacore.com/mbox/"},{"id":97212,"url":"https://patchwork.plctlab.org/api/1.2/patches/97212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085059.1726810-1-poulhies@adacore.com/","msgid":"<20230522085059.1726810-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:50:59","name":"[COMMITTED] ada: Further fixes to GNATprove and CodePeer expression pretty-printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085059.1726810-1-poulhies@adacore.com/mbox/"},{"id":97202,"url":"https://patchwork.plctlab.org/api/1.2/patches/97202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085103.1726874-1-poulhies@adacore.com/","msgid":"<20230522085103.1726874-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:03","name":"[COMMITTED] ada: Fix spurious freezing error on nonabstract null extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085103.1726874-1-poulhies@adacore.com/mbox/"},{"id":97215,"url":"https://patchwork.plctlab.org/api/1.2/patches/97215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085109.1726939-1-poulhies@adacore.com/","msgid":"<20230522085109.1726939-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:09","name":"[COMMITTED] ada: Rename Is_Past_Self_Hiding_Point flag to be Is_Not_Self_Hidden","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085109.1726939-1-poulhies@adacore.com/mbox/"},{"id":97204,"url":"https://patchwork.plctlab.org/api/1.2/patches/97204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085113.1727006-1-poulhies@adacore.com/","msgid":"<20230522085113.1727006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:13","name":"[COMMITTED] ada: Fix missing finalization in library-unit instance spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085113.1727006-1-poulhies@adacore.com/mbox/"},{"id":97190,"url":"https://patchwork.plctlab.org/api/1.2/patches/97190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085117.1727069-1-poulhies@adacore.com/","msgid":"<20230522085117.1727069-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:17","name":"[COMMITTED] ada: Remove outdated part of comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085117.1727069-1-poulhies@adacore.com/mbox/"},{"id":97209,"url":"https://patchwork.plctlab.org/api/1.2/patches/97209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085122.1727132-1-poulhies@adacore.com/","msgid":"<20230522085122.1727132-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:22","name":"[COMMITTED] ada: Fix missing finalization in separate package body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085122.1727132-1-poulhies@adacore.com/mbox/"},{"id":97216,"url":"https://patchwork.plctlab.org/api/1.2/patches/97216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085128.1727196-1-poulhies@adacore.com/","msgid":"<20230522085128.1727196-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:28","name":"[COMMITTED] ada: Fix crash caused by incorrect expansion of iterated component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085128.1727196-1-poulhies@adacore.com/mbox/"},{"id":97217,"url":"https://patchwork.plctlab.org/api/1.2/patches/97217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085131.1727260-1-poulhies@adacore.com/","msgid":"<20230522085131.1727260-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:31","name":"[COMMITTED] ada: Incorrect constant folding in postcondition involving '\''Old","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085131.1727260-1-poulhies@adacore.com/mbox/"},{"id":97207,"url":"https://patchwork.plctlab.org/api/1.2/patches/97207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085135.1727328-1-poulhies@adacore.com/","msgid":"<20230522085135.1727328-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:35","name":"[COMMITTED] ada: Add missing word in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085135.1727328-1-poulhies@adacore.com/mbox/"},{"id":97195,"url":"https://patchwork.plctlab.org/api/1.2/patches/97195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085139.1727399-1-poulhies@adacore.com/","msgid":"<20230522085139.1727399-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:39","name":"[COMMITTED] ada: Fix source location for crashes in expanded Loop_Entry attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085139.1727399-1-poulhies@adacore.com/mbox/"},{"id":97213,"url":"https://patchwork.plctlab.org/api/1.2/patches/97213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085143.1727487-1-poulhies@adacore.com/","msgid":"<20230522085143.1727487-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:43","name":"[COMMITTED] ada: Use idiomatic construct in Expand_N_Package_Body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085143.1727487-1-poulhies@adacore.com/mbox/"},{"id":97214,"url":"https://patchwork.plctlab.org/api/1.2/patches/97214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085147.1727570-1-poulhies@adacore.com/","msgid":"<20230522085147.1727570-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:47","name":"[COMMITTED] ada: Small cleanup in support for protected subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085147.1727570-1-poulhies@adacore.com/mbox/"},{"id":97210,"url":"https://patchwork.plctlab.org/api/1.2/patches/97210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085152.1727635-1-poulhies@adacore.com/","msgid":"<20230522085152.1727635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:52","name":"[COMMITTED] ada: Avoid repeated calls when looking for first/last slocs of a node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085152.1727635-1-poulhies@adacore.com/mbox/"},{"id":97218,"url":"https://patchwork.plctlab.org/api/1.2/patches/97218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085158.1727700-1-poulhies@adacore.com/","msgid":"<20230522085158.1727700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-22T08:51:58","name":"[COMMITTED] ada: Reuse idiomatic procedure in CStand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522085158.1727700-1-poulhies@adacore.com/mbox/"},{"id":97234,"url":"https://patchwork.plctlab.org/api/1.2/patches/97234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522100156.2294068-1-juzhe.zhong@rivai.ai/","msgid":"<20230522100156.2294068-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T10:01:56","name":"RISC-V: Fix typo of multiple_rgroup-2.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522100156.2294068-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97349,"url":"https://patchwork.plctlab.org/api/1.2/patches/97349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522120956.2833527-1-juzhe.zhong@rivai.ai/","msgid":"<20230522120956.2833527-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-22T12:09:56","name":"RISC-V: Add \"m_\" prefix for private member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522120956.2833527-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97411,"url":"https://patchwork.plctlab.org/api/1.2/patches/97411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522125149.30467-1-sebastian.huber@embedded-brains.de/","msgid":"<20230522125149.30467-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-05-22T12:51:49","name":"libgomp: Fix build for -fshort-enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522125149.30467-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":97433,"url":"https://patchwork.plctlab.org/api/1.2/patches/97433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn5h=262tGq2_SdhMKQON_hrCaTbPPRk7PQ=mcwoFGkpQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T13:25:21","name":"libiberty: On Windows pass a >32k cmdline through a response file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCn5h=262tGq2_SdhMKQON_hrCaTbPPRk7PQ=mcwoFGkpQ@mail.gmail.com/mbox/"},{"id":97486,"url":"https://patchwork.plctlab.org/api/1.2/patches/97486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZKo5_-H4OBXGB=7353=tg0Mr8rYaWFbJ5HAKSFZdP30g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T14:36:26","name":"[COMMITTED] i386: Account for the memory read in V*QImode multiplication sequences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZKo5_-H4OBXGB=7353=tg0Mr8rYaWFbJ5HAKSFZdP30g@mail.gmail.com/mbox/"},{"id":97485,"url":"https://patchwork.plctlab.org/api/1.2/patches/97485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de/","msgid":"<8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de>","list_archive_url":null,"date":"2023-05-22T14:36:49","name":"[avr,testsuite,committed] Skip test that fail for avr for this or that reason.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db24715-a207-bcef-391e-4107335d1b9f@gjlay.de/mbox/"},{"id":97496,"url":"https://patchwork.plctlab.org/api/1.2/patches/97496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de/","msgid":"<3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de>","list_archive_url":null,"date":"2023-05-22T14:58:06","name":"[testsuite,committed] PR testsuite/52641","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e6c428e-535b-ac87-e71c-ce530abcc299@gjlay.de/mbox/"},{"id":97512,"url":"https://patchwork.plctlab.org/api/1.2/patches/97512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5868460.taCxCBeP46@minbar/","msgid":"<5868460.taCxCBeP46@minbar>","list_archive_url":null,"date":"2023-05-22T15:32:45","name":"[committed] libstdc++: Resolve -Wunused-variable warnings in stdx::simd and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5868460.taCxCBeP46@minbar/mbox/"},{"id":97514,"url":"https://patchwork.plctlab.org/api/1.2/patches/97514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/116291317.nniJfEyVGO@minbar/","msgid":"<116291317.nniJfEyVGO@minbar>","list_archive_url":null,"date":"2023-05-22T15:36:19","name":"libstdc++: Add missing constexpr to simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/116291317.nniJfEyVGO@minbar/mbox/"},{"id":97550,"url":"https://patchwork.plctlab.org/api/1.2/patches/97550/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at/","msgid":"<2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at>","list_archive_url":null,"date":"2023-05-22T17:17:01","name":"[C,v3] Fix ICEs related to VM types in C 1/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2921014c1a07788e7fd374d10a816ffa92469167.camel@tugraz.at/mbox/"},{"id":97552,"url":"https://patchwork.plctlab.org/api/1.2/patches/97552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4357b98b6e61dc227db9b21e21e5878af6a7ceb.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-05-22T17:23:58","name":"[C,v3] Fix ICEs related to VM types in C 2/2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4357b98b6e61dc227db9b21e21e5878af6a7ceb.camel@tugraz.at/mbox/"},{"id":97561,"url":"https://patchwork.plctlab.org/api/1.2/patches/97561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com/","msgid":"<79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-22T17:36:50","name":"[v3] rs6000: Add buildin for mffscrn instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79d6f621a9f0420fb3f2571eaa65f9d332dd7545.camel@us.ibm.com/mbox/"},{"id":97562,"url":"https://patchwork.plctlab.org/api/1.2/patches/97562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecc0245f-1b9d-bae5-75b6-aa4c444dc194@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-22T18:26:18","name":"[testsuite,committed] : PR52614: Fix more of the int=32 assumption fallout.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ecc0245f-1b9d-bae5-75b6-aa4c444dc194@gjlay.de/mbox/"},{"id":97563,"url":"https://patchwork.plctlab.org/api/1.2/patches/97563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522183834.535767-1-aldyh@redhat.com/","msgid":"<20230522183834.535767-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:38:34","name":"[COMMITTED] Implement some miscellaneous zero accessors for Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522183834.535767-1-aldyh@redhat.com/mbox/"},{"id":97564,"url":"https://patchwork.plctlab.org/api/1.2/patches/97564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-1-aldyh@redhat.com/","msgid":"<20230522185622.537454-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:20","name":"Convert ipa_jump_func to use ipa_vr instead of a value_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-1-aldyh@redhat.com/mbox/"},{"id":97566,"url":"https://patchwork.plctlab.org/api/1.2/patches/97566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-2-aldyh@redhat.com/","msgid":"<20230522185622.537454-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:21","name":"Implement ipa_vr hashing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-2-aldyh@redhat.com/mbox/"},{"id":97567,"url":"https://patchwork.plctlab.org/api/1.2/patches/97567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-3-aldyh@redhat.com/","msgid":"<20230522185622.537454-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-22T18:56:22","name":"Convert remaining uses of value_range in ipa-*.cc to Value_Range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522185622.537454-3-aldyh@redhat.com/mbox/"},{"id":97572,"url":"https://patchwork.plctlab.org/api/1.2/patches/97572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com/","msgid":"<366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com>","list_archive_url":null,"date":"2023-05-22T19:50:17","name":"[ver,2] rs6000: Fix __builtin_vec_xst_trunc definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com/mbox/"},{"id":97603,"url":"https://patchwork.plctlab.org/api/1.2/patches/97603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yea5_347p5s5ZZnGnPT54sXh5P82dSJ1Bpu0PegwixHQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-22T20:39:01","name":"[COMMITTED] i386: Adjust emulated integer vector mode shift costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Yea5_347p5s5ZZnGnPT54sXh5P82dSJ1Bpu0PegwixHQ@mail.gmail.com/mbox/"},{"id":97612,"url":"https://patchwork.plctlab.org/api/1.2/patches/97612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com/","msgid":"<9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com>","list_archive_url":null,"date":"2023-05-22T20:50:54","name":"Replace __gnu_cxx::__ops::__negate with std::not_fn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fbe09f1-ea49-b520-251b-faba47d74179@gmail.com/mbox/"},{"id":97635,"url":"https://patchwork.plctlab.org/api/1.2/patches/97635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522214744.15211-1-iain@sandoe.co.uk/","msgid":"<20230522214744.15211-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-05-22T21:47:44","name":"[pushed] libobjc: Add local macros to support encode generation [P109913].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522214744.15211-1-iain@sandoe.co.uk/mbox/"},{"id":97644,"url":"https://patchwork.plctlab.org/api/1.2/patches/97644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522235841.inxggcczfaatu6ct@lug-owl.de/","msgid":"<20230522235841.inxggcczfaatu6ct@lug-owl.de>","list_archive_url":null,"date":"2023-05-22T23:58:41","name":"mcore: Fix sprintf length warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230522235841.inxggcczfaatu6ct@lug-owl.de/mbox/"},{"id":97723,"url":"https://patchwork.plctlab.org/api/1.2/patches/97723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523044202.1201-1-jinma@linux.alibaba.com/","msgid":"<20230523044202.1201-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-23T04:42:02","name":"RISC-V: Add the option \"-mdisable-multilib-check\" to avoid multilib checks breaking the compilation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523044202.1201-1-jinma@linux.alibaba.com/mbox/"},{"id":97733,"url":"https://patchwork.plctlab.org/api/1.2/patches/97733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp/","msgid":"<5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp>","list_archive_url":null,"date":"2023-05-23T05:48:09","name":"[v2] xtensa: Optimize '\''(x & CST1_POW2) != 0 ? CST2_POW2 : 0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b04c828-7906-2efb-a834-d3ed0ba1f6bd@yahoo.co.jp/mbox/"},{"id":97734,"url":"https://patchwork.plctlab.org/api/1.2/patches/97734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523060804.61556-1-juzhe.zhong@rivai.ai/","msgid":"<20230523060804.61556-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T06:08:04","name":"RISC-V: Refactor the framework of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523060804.61556-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97750,"url":"https://patchwork.plctlab.org/api/1.2/patches/97750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com/","msgid":"<7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com>","list_archive_url":null,"date":"2023-05-23T06:52:38","name":"[wwwdocs,committed] projects/gomp: Link to GCC 13 impl. status as well","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dd9c9a8-1fa1-010f-695e-087b952e30db@codesourcery.com/mbox/"},{"id":97751,"url":"https://patchwork.plctlab.org/api/1.2/patches/97751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523065727.575169-1-aldyh@redhat.com/","msgid":"<20230523065727.575169-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-23T06:57:27","name":"[COMMITTED] Use delete[] in int_range destructor [PR109920]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523065727.575169-1-aldyh@redhat.com/mbox/"},{"id":97770,"url":"https://patchwork.plctlab.org/api/1.2/patches/97770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15963891.uLZWGnKmhe@minbar/","msgid":"<15963891.uLZWGnKmhe@minbar>","list_archive_url":null,"date":"2023-05-23T07:30:04","name":"[committed] Re: [PATCH] libstdc++: Add missing constexpr to simd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15963891.uLZWGnKmhe@minbar/mbox/"},{"id":97828,"url":"https://patchwork.plctlab.org/api/1.2/patches/97828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080733.1872635-1-poulhies@adacore.com/","msgid":"<20230523080733.1872635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:33","name":"[COMMITTED] ada: Crash on dispatching primitive referencing limited-with type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080733.1872635-1-poulhies@adacore.com/mbox/"},{"id":97839,"url":"https://patchwork.plctlab.org/api/1.2/patches/97839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080737.1872700-1-poulhies@adacore.com/","msgid":"<20230523080737.1872700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:37","name":"[COMMITTED] ada: Remove duplicate comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080737.1872700-1-poulhies@adacore.com/mbox/"},{"id":97830,"url":"https://patchwork.plctlab.org/api/1.2/patches/97830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080742.1872762-1-poulhies@adacore.com/","msgid":"<20230523080742.1872762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:42","name":"[COMMITTED] ada: Minor fix typo in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080742.1872762-1-poulhies@adacore.com/mbox/"},{"id":97833,"url":"https://patchwork.plctlab.org/api/1.2/patches/97833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080744.1872824-1-poulhies@adacore.com/","msgid":"<20230523080744.1872824-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:44","name":"[COMMITTED] ada: Small code cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080744.1872824-1-poulhies@adacore.com/mbox/"},{"id":97863,"url":"https://patchwork.plctlab.org/api/1.2/patches/97863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080747.1872885-1-poulhies@adacore.com/","msgid":"<20230523080747.1872885-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:47","name":"[COMMITTED] ada: Suppress warning about Subprogram_Variant failing at run time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080747.1872885-1-poulhies@adacore.com/mbox/"},{"id":97854,"url":"https://patchwork.plctlab.org/api/1.2/patches/97854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080749.1872946-1-poulhies@adacore.com/","msgid":"<20230523080749.1872946-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:49","name":"[COMMITTED] ada: Fix expression pretty-printer for SPARK counterexamples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080749.1872946-1-poulhies@adacore.com/mbox/"},{"id":97843,"url":"https://patchwork.plctlab.org/api/1.2/patches/97843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080752.1873021-1-poulhies@adacore.com/","msgid":"<20230523080752.1873021-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:52","name":"[COMMITTED] ada: Transfer fix for pretty-printed parentheses from GNATprove to GNAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080752.1873021-1-poulhies@adacore.com/mbox/"},{"id":97868,"url":"https://patchwork.plctlab.org/api/1.2/patches/97868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080754.1873095-1-poulhies@adacore.com/","msgid":"<20230523080754.1873095-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:54","name":"[COMMITTED] ada: Remove special-case for parentheses in expansion for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080754.1873095-1-poulhies@adacore.com/mbox/"},{"id":97872,"url":"https://patchwork.plctlab.org/api/1.2/patches/97872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080756.1873165-1-poulhies@adacore.com/","msgid":"<20230523080756.1873165-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:56","name":"[COMMITTED] ada: Ignore accessibility actuals in expression pretty-printer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080756.1873165-1-poulhies@adacore.com/mbox/"},{"id":97853,"url":"https://patchwork.plctlab.org/api/1.2/patches/97853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080759.1873226-1-poulhies@adacore.com/","msgid":"<20230523080759.1873226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:07:59","name":"[COMMITTED] ada: Revert to old pretty-printing of internal entities for CodePeer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080759.1873226-1-poulhies@adacore.com/mbox/"},{"id":97845,"url":"https://patchwork.plctlab.org/api/1.2/patches/97845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080802.1873289-1-poulhies@adacore.com/","msgid":"<20230523080802.1873289-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:02","name":"[COMMITTED] ada: Sync different variants of interrupt handler registration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080802.1873289-1-poulhies@adacore.com/mbox/"},{"id":97878,"url":"https://patchwork.plctlab.org/api/1.2/patches/97878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080806.1873350-1-poulhies@adacore.com/","msgid":"<20230523080806.1873350-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:06","name":"[COMMITTED] ada: Fix bogus error on predicated limited record declared in protected type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080806.1873350-1-poulhies@adacore.com/mbox/"},{"id":97867,"url":"https://patchwork.plctlab.org/api/1.2/patches/97867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080810.1873414-1-poulhies@adacore.com/","msgid":"<20230523080810.1873414-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:10","name":"[COMMITTED] ada: Fix internal error on quantified expression with predicated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080810.1873414-1-poulhies@adacore.com/mbox/"},{"id":97857,"url":"https://patchwork.plctlab.org/api/1.2/patches/97857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080814.1873488-1-poulhies@adacore.com/","msgid":"<20230523080814.1873488-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:14","name":"[COMMITTED] ada: Fix endings of pretty-printed numeric literals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080814.1873488-1-poulhies@adacore.com/mbox/"},{"id":97862,"url":"https://patchwork.plctlab.org/api/1.2/patches/97862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080818.1873549-1-poulhies@adacore.com/","msgid":"<20230523080818.1873549-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:18","name":"[COMMITTED] ada: Add mention of what LSP stands for","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080818.1873549-1-poulhies@adacore.com/mbox/"},{"id":97884,"url":"https://patchwork.plctlab.org/api/1.2/patches/97884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080821.1873611-1-poulhies@adacore.com/","msgid":"<20230523080821.1873611-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:21","name":"[COMMITTED] ada: Turn assertions into defensive code in error locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080821.1873611-1-poulhies@adacore.com/mbox/"},{"id":97864,"url":"https://patchwork.plctlab.org/api/1.2/patches/97864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080824.1873672-1-poulhies@adacore.com/","msgid":"<20230523080824.1873672-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:24","name":"[COMMITTED] ada: Spurious errors on class-wide preconditions of private types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080824.1873672-1-poulhies@adacore.com/mbox/"},{"id":97890,"url":"https://patchwork.plctlab.org/api/1.2/patches/97890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080826.1873735-1-poulhies@adacore.com/","msgid":"<20230523080826.1873735-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:26","name":"[COMMITTED] ada: Remove the body of System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080826.1873735-1-poulhies@adacore.com/mbox/"},{"id":97873,"url":"https://patchwork.plctlab.org/api/1.2/patches/97873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080828.1873797-1-poulhies@adacore.com/","msgid":"<20230523080828.1873797-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:28","name":"[COMMITTED] ada: Facilitate proof of Interfaces.C.To_Ada","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080828.1873797-1-poulhies@adacore.com/mbox/"},{"id":97869,"url":"https://patchwork.plctlab.org/api/1.2/patches/97869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080832.1873858-1-poulhies@adacore.com/","msgid":"<20230523080832.1873858-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:32","name":"[COMMITTED] ada: Add default value at initialization for CodePeer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080832.1873858-1-poulhies@adacore.com/mbox/"},{"id":97894,"url":"https://patchwork.plctlab.org/api/1.2/patches/97894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080834.1873919-1-poulhies@adacore.com/","msgid":"<20230523080834.1873919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:34","name":"[COMMITTED] ada: A discriminant of a variable is not a variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080834.1873919-1-poulhies@adacore.com/mbox/"},{"id":97838,"url":"https://patchwork.plctlab.org/api/1.2/patches/97838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080836.1873982-1-poulhies@adacore.com/","msgid":"<20230523080836.1873982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:36","name":"[COMMITTED] ada: Fix address arithmetic issues in the runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080836.1873982-1-poulhies@adacore.com/mbox/"},{"id":97896,"url":"https://patchwork.plctlab.org/api/1.2/patches/97896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080838.1874043-1-poulhies@adacore.com/","msgid":"<20230523080838.1874043-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:38","name":"[COMMITTED] ada: Fix address arithmetic issues in the expanded code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080838.1874043-1-poulhies@adacore.com/mbox/"},{"id":97892,"url":"https://patchwork.plctlab.org/api/1.2/patches/97892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080840.1874104-1-poulhies@adacore.com/","msgid":"<20230523080840.1874104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:40","name":"[COMMITTED] ada: Fix reference to Ada issue in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080840.1874104-1-poulhies@adacore.com/mbox/"},{"id":97877,"url":"https://patchwork.plctlab.org/api/1.2/patches/97877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080842.1874165-1-poulhies@adacore.com/","msgid":"<20230523080842.1874165-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:42","name":"[COMMITTED] ada: Remove unnecessary call to Detach.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080842.1874165-1-poulhies@adacore.com/mbox/"},{"id":97897,"url":"https://patchwork.plctlab.org/api/1.2/patches/97897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080845.1874226-1-poulhies@adacore.com/","msgid":"<20230523080845.1874226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:45","name":"[COMMITTED] ada: Fix resolution of mod operator of System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080845.1874226-1-poulhies@adacore.com/mbox/"},{"id":97882,"url":"https://patchwork.plctlab.org/api/1.2/patches/97882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080856.1874354-1-poulhies@adacore.com/","msgid":"<20230523080856.1874354-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:56","name":"[COMMITTED] ada: Fix oversight in latest change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080856.1874354-1-poulhies@adacore.com/mbox/"},{"id":97888,"url":"https://patchwork.plctlab.org/api/1.2/patches/97888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080858.1874416-1-poulhies@adacore.com/","msgid":"<20230523080858.1874416-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:08:58","name":"[COMMITTED] ada: Fix minor address arithmetic issues in System.Dwarf_Lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080858.1874416-1-poulhies@adacore.com/mbox/"},{"id":97852,"url":"https://patchwork.plctlab.org/api/1.2/patches/97852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080901.1874480-1-poulhies@adacore.com/","msgid":"<20230523080901.1874480-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:01","name":"[COMMITTED] ada: Add new switch -gnatyz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080901.1874480-1-poulhies@adacore.com/mbox/"},{"id":97891,"url":"https://patchwork.plctlab.org/api/1.2/patches/97891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080904.1874544-1-poulhies@adacore.com/","msgid":"<20230523080904.1874544-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:04","name":"[COMMITTED] ada: Update ghost code for proof of integer input functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080904.1874544-1-poulhies@adacore.com/mbox/"},{"id":97866,"url":"https://patchwork.plctlab.org/api/1.2/patches/97866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080906.1874606-1-poulhies@adacore.com/","msgid":"<20230523080906.1874606-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:06","name":"[COMMITTED] ada: Make string interpolation part of the core extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080906.1874606-1-poulhies@adacore.com/mbox/"},{"id":97861,"url":"https://patchwork.plctlab.org/api/1.2/patches/97861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080908.1874670-1-poulhies@adacore.com/","msgid":"<20230523080908.1874670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:08","name":"[COMMITTED] ada: Fix address manipulation issue in the tasking runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080908.1874670-1-poulhies@adacore.com/mbox/"},{"id":97893,"url":"https://patchwork.plctlab.org/api/1.2/patches/97893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080912.1874731-1-poulhies@adacore.com/","msgid":"<20230523080912.1874731-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:12","name":"[COMMITTED] ada: Fix latent issue in support for protected entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080912.1874731-1-poulhies@adacore.com/mbox/"},{"id":97871,"url":"https://patchwork.plctlab.org/api/1.2/patches/97871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080915.1874792-1-poulhies@adacore.com/","msgid":"<20230523080915.1874792-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:15","name":"[COMMITTED] ada: Cleanup inconsistent iteration over exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080915.1874792-1-poulhies@adacore.com/mbox/"},{"id":97870,"url":"https://patchwork.plctlab.org/api/1.2/patches/97870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080917.1874858-1-poulhies@adacore.com/","msgid":"<20230523080917.1874858-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:17","name":"[COMMITTED] ada: Add tags to warnings controlled by Warn_On_Redundant_Constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080917.1874858-1-poulhies@adacore.com/mbox/"},{"id":97895,"url":"https://patchwork.plctlab.org/api/1.2/patches/97895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080920.1874919-1-poulhies@adacore.com/","msgid":"<20230523080920.1874919-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:20","name":"[COMMITTED] ada: Remove redundant parentheses from System.Stack_Checking.Operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080920.1874919-1-poulhies@adacore.com/mbox/"},{"id":97874,"url":"https://patchwork.plctlab.org/api/1.2/patches/97874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080922.1874982-1-poulhies@adacore.com/","msgid":"<20230523080922.1874982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:22","name":"[COMMITTED] ada: ICE on BIP call in class-wide function return within instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080922.1874982-1-poulhies@adacore.com/mbox/"},{"id":97876,"url":"https://patchwork.plctlab.org/api/1.2/patches/97876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080925.1875043-1-poulhies@adacore.com/","msgid":"<20230523080925.1875043-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:25","name":"[COMMITTED] ada: Rework fix for internal error on quantified expression with predicated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080925.1875043-1-poulhies@adacore.com/mbox/"},{"id":97883,"url":"https://patchwork.plctlab.org/api/1.2/patches/97883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080928.1875104-1-poulhies@adacore.com/","msgid":"<20230523080928.1875104-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-23T08:09:28","name":"[COMMITTED] ada: Accept and analyze new aspect Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523080928.1875104-1-poulhies@adacore.com/mbox/"},{"id":97909,"url":"https://patchwork.plctlab.org/api/1.2/patches/97909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523085618.241312-1-juzhe.zhong@rivai.ai/","msgid":"<20230523085618.241312-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T08:56:18","name":"[V2] RISC-V: Refactor the framework of RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523085618.241312-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97934,"url":"https://patchwork.plctlab.org/api/1.2/patches/97934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523093407.3501163-1-christophe.lyon@linaro.org/","msgid":"<20230523093407.3501163-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-05-23T09:34:07","name":"testsuite, analyzer: Fix testcases with fclose","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523093407.3501163-1-christophe.lyon@linaro.org/mbox/"},{"id":97942,"url":"https://patchwork.plctlab.org/api/1.2/patches/97942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523095533.B1C0713588@imap2.suse-dmz.suse.de/","msgid":"<20230523095533.B1C0713588@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T09:55:33","name":"tree-optimization/109849 - missed code hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523095533.B1C0713588@imap2.suse-dmz.suse.de/mbox/"},{"id":97950,"url":"https://patchwork.plctlab.org/api/1.2/patches/97950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523100958.340512-1-juzhe.zhong@rivai.ai/","msgid":"<20230523100958.340512-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T10:09:58","name":"RISC-V: Fix warning of vxrm pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523100958.340512-1-juzhe.zhong@rivai.ai/mbox/"},{"id":97957,"url":"https://patchwork.plctlab.org/api/1.2/patches/97957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz2rpc67.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T10:36:16","name":"[1/2] md: Allow to refer to the value of int iterator FOO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz2rpc67.fsf@arm.com/mbox/"},{"id":97956,"url":"https://patchwork.plctlab.org/api/1.2/patches/97956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cszpc4d.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T10:37:22","name":"[2/2] aarch64: Provide FPR alternatives for some bit insertions [PR109632]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cszpc4d.fsf@arm.com/mbox/"},{"id":97959,"url":"https://patchwork.plctlab.org/api/1.2/patches/97959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523105643.18F4F13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523105643.18F4F13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T10:56:42","name":"Dump ANTIC_OUT before pruning it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523105643.18F4F13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":97983,"url":"https://patchwork.plctlab.org/api/1.2/patches/97983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de/","msgid":"<6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de>","list_archive_url":null,"date":"2023-05-23T12:55:45","name":": Implement PR104327 for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ecf31c6-1fa2-330d-6744-2a1d013fd530@gjlay.de/mbox/"},{"id":97985,"url":"https://patchwork.plctlab.org/api/1.2/patches/97985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523125836.642394-1-aldyh@redhat.com/","msgid":"<20230523125836.642394-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-23T12:58:36","name":"[COMMITTED] Remove buggy special case in irange::invert [PR109934].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523125836.642394-1-aldyh@redhat.com/mbox/"},{"id":97996,"url":"https://patchwork.plctlab.org/api/1.2/patches/97996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523135007.682279-1-juzhe.zhong@rivai.ai/","msgid":"<20230523135007.682279-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T13:50:07","name":"[V2] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523135007.682279-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98027,"url":"https://patchwork.plctlab.org/api/1.2/patches/98027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523143412.184530-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230523143412.184530-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-05-23T14:34:12","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523143412.184530-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":98023,"url":"https://patchwork.plctlab.org/api/1.2/patches/98023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523144145.315887-1-christophe.lyon@linaro.org/","msgid":"<20230523144145.315887-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-05-23T14:41:45","name":"[arm] testsuite: make mve_intrinsic_type_overloads-int.c libc-agnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523144145.315887-1-christophe.lyon@linaro.org/mbox/"},{"id":98029,"url":"https://patchwork.plctlab.org/api/1.2/patches/98029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523150446.699745-1-juzhe.zhong@rivai.ai/","msgid":"<20230523150446.699745-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-23T15:04:46","name":"[V3] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523150446.699745-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98043,"url":"https://patchwork.plctlab.org/api/1.2/patches/98043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151548.622FF13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151548.622FF13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:15:48","name":"Generic vector op costing adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151548.622FF13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98045,"url":"https://patchwork.plctlab.org/api/1.2/patches/98045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151803.3428B13A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151803.3428B13A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:18:02","name":"tree-optimization/109747 - SLP cost of CTORs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151803.3428B13A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98046,"url":"https://patchwork.plctlab.org/api/1.2/patches/98046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151845.D26C213A10@imap2.suse-dmz.suse.de/","msgid":"<20230523151845.D26C213A10@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-05-23T15:18:45","name":"Account for vector splat GPR->XMM move cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523151845.D26C213A10@imap2.suse-dmz.suse.de/mbox/"},{"id":98072,"url":"https://patchwork.plctlab.org/api/1.2/patches/98072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YGYGTgt7WqfNLK4dOX16=c+axq2n5_EyGxB9D8+AyWbA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T16:02:09","name":"[COMMITTED] i386: Add V8QI and V4QImode partial vector shift operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YGYGTgt7WqfNLK4dOX16=c+axq2n5_EyGxB9D8+AyWbA@mail.gmail.com/mbox/"},{"id":98086,"url":"https://patchwork.plctlab.org/api/1.2/patches/98086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da686a99-84a5-e733-0029-94c11c96a377@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-05-23T16:57:49","name":"[avr,committed] Fix cost computation for bit insertions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da686a99-84a5-e733-0029-94c11c96a377@gjlay.de/mbox/"},{"id":98127,"url":"https://patchwork.plctlab.org/api/1.2/patches/98127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com/","msgid":"<075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-23T18:30:19","name":"PR middle-end/109840: Preserve popcount/parity type in match.pd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/075901d98da4$a1fc4dc0$e5f4e940$@nextmovesoftware.com/mbox/"},{"id":98153,"url":"https://patchwork.plctlab.org/api/1.2/patches/98153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523194114.56310-1-kmatsui@cs.washington.edu/","msgid":"<20230523194114.56310-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-05-23T19:41:14","name":"libstdc++: use using instead of typedef for type_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523194114.56310-1-kmatsui@cs.washington.edu/mbox/"},{"id":98154,"url":"https://patchwork.plctlab.org/api/1.2/patches/98154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMORuCuONZGQEzATJh3T0aqidjoki=gZZLsT7EJMA_KKA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-23T19:46:59","name":"RISC-V: Use extension instructions instead of bitwise \"and\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMORuCuONZGQEzATJh3T0aqidjoki=gZZLsT7EJMA_KKA@mail.gmail.com/mbox/"},{"id":98186,"url":"https://patchwork.plctlab.org/api/1.2/patches/98186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6920882.e9J7NaK4W3@minbar/","msgid":"<6920882.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-05-23T21:57:22","name":"libstdc++: Add missing constexpr to simd_neon","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6920882.e9J7NaK4W3@minbar/mbox/"},{"id":98199,"url":"https://patchwork.plctlab.org/api/1.2/patches/98199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523231601.2130715-1-apinski@marvell.com/","msgid":"<20230523231601.2130715-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-05-23T23:16:01","name":"Dump if a pattern fails after having printed applying it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230523231601.2130715-1-apinski@marvell.com/mbox/"},{"id":98231,"url":"https://patchwork.plctlab.org/api/1.2/patches/98231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524011323.1046670-1-juzhe.zhong@rivai.ai/","msgid":"<20230524011323.1046670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:13:23","name":"RISC-V: Fix magic number of RVV auto-vectorization expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524011323.1046670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98235,"url":"https://patchwork.plctlab.org/api/1.2/patches/98235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524012848.1097889-1-juzhe.zhong@rivai.ai/","msgid":"<20230524012848.1097889-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:28:48","name":"[V2] RISC-V: Fix magic number of RVV auto-vectorization expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524012848.1097889-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98241,"url":"https://patchwork.plctlab.org/api/1.2/patches/98241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524015727.1157568-1-juzhe.zhong@rivai.ai/","msgid":"<20230524015727.1157568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T01:57:27","name":"RISC-V: Fix incorrect code of touching inaccessible memory address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524015727.1157568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98252,"url":"https://patchwork.plctlab.org/api/1.2/patches/98252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524023851.1440077-1-juzhe.zhong@rivai.ai/","msgid":"<20230524023851.1440077-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T02:38:51","name":"[V2] RISC-V: Fix incorrect code of reaching inaccessible memory address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524023851.1440077-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98256,"url":"https://patchwork.plctlab.org/api/1.2/patches/98256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524031154.1533363-1-juzhe.zhong@rivai.ai/","msgid":"<20230524031154.1533363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T03:11:54","name":"[V4] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524031154.1533363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98263,"url":"https://patchwork.plctlab.org/api/1.2/patches/98263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524032917.1598882-1-juzhe.zhong@rivai.ai/","msgid":"<20230524032917.1598882-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T03:29:17","name":"[V5] RISC-V: Add RVV comparison autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524032917.1598882-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98289,"url":"https://patchwork.plctlab.org/api/1.2/patches/98289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz2qqptg.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:08:27","name":"Check for sysconf decl on vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz2qqptg.fsf@lxoliva.fsfla.org/mbox/"},{"id":98290,"url":"https://patchwork.plctlab.org/api/1.2/patches/98290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8rdeqpgh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:16:14","name":"[testsuite] tsvc: skip include malloc.h when unavailable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8rdeqpgh.fsf@lxoliva.fsfla.org/mbox/"},{"id":98291,"url":"https://patchwork.plctlab.org/api/1.2/patches/98291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jo2qpcu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:18:25","name":"[testsuite] require pic for pr103074.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jo2qpcu.fsf@lxoliva.fsfla.org/mbox/"},{"id":98292,"url":"https://patchwork.plctlab.org/api/1.2/patches/98292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg5upaqt.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:19:22","name":"[testsuite] require pthread for openmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg5upaqt.fsf@lxoliva.fsfla.org/mbox/"},{"id":98293,"url":"https://patchwork.plctlab.org/api/1.2/patches/98293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8gipaox.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:20:30","name":"[testsuite] require profiling for -pg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8gipaox.fsf@lxoliva.fsfla.org/mbox/"},{"id":98294,"url":"https://patchwork.plctlab.org/api/1.2/patches/98294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0r6paik.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:24:19","name":"[testsuite,i386] enable sse2 for signbit-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0r6paik.fsf@lxoliva.fsfla.org/mbox/"},{"id":98297,"url":"https://patchwork.plctlab.org/api/1.2/patches/98297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilcip9nk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:42:55","name":"[testsuite,ppc] xfail uninit-pred-9_b bogus warn on ppc32 too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilcip9nk.fsf@lxoliva.fsfla.org/mbox/"},{"id":98299,"url":"https://patchwork.plctlab.org/api/1.2/patches/98299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredn6p9gk.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:47:07","name":"[x86] reenable dword MOVE_MAX for better memmove inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredn6p9gk.fsf@lxoliva.fsfla.org/mbox/"},{"id":98300,"url":"https://patchwork.plctlab.org/api/1.2/patches/98300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5xup9e3.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:48:36","name":"[testsuite,x86] cope with --enable-frame-pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5xup9e3.fsf@lxoliva.fsfla.org/mbox/"},{"id":98301,"url":"https://patchwork.plctlab.org/api/1.2/patches/98301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y8ip9ba.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:50:17","name":"[libstdc++,testsuite] xfail to_chars/long_double on x86-vxworks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y8ip9ba.fsf@lxoliva.fsfla.org/mbox/"},{"id":98302,"url":"https://patchwork.plctlab.org/api/1.2/patches/98302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qj6p98w.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-05-24T05:51:43","name":"[testsuite,powerpc] adjust -m32 counts for fold-vec-extract*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qj6p98w.fsf@lxoliva.fsfla.org/mbox/"},{"id":98303,"url":"https://patchwork.plctlab.org/api/1.2/patches/98303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524060407.19181-1-chenglulu@loongson.cn/","msgid":"<20230524060407.19181-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-05-24T06:04:08","name":"LoongArch: Fix the problem of structure parameter passing in C++. This structure has empty structure members and less than three floating point members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524060407.19181-1-chenglulu@loongson.cn/mbox/"},{"id":98321,"url":"https://patchwork.plctlab.org/api/1.2/patches/98321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt353mmdjy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T06:46:57","name":"early-remat: Resync with new DF postorders [PR109940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt353mmdjy.fsf@arm.com/mbox/"},{"id":98326,"url":"https://patchwork.plctlab.org/api/1.2/patches/98326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524070329.1163656-1-juzhe.zhong@rivai.ai/","msgid":"<20230524070329.1163656-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T07:03:29","name":"RISC-V: Add RVV mask logic auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524070329.1163656-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98350,"url":"https://patchwork.plctlab.org/api/1.2/patches/98350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524072723.1387346-1-juzhe.zhong@rivai.ai/","msgid":"<20230524072723.1387346-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T07:27:23","name":"[V2,COMMITTED] RISC-V: Add RVV mask logic auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524072723.1387346-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98416,"url":"https://patchwork.plctlab.org/api/1.2/patches/98416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"<200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:11","name":"[v3,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/200d163cccf88fadc85927562ae54ae1275fe7e5.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98415,"url":"https://patchwork.plctlab.org/api/1.2/patches/98415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"<8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:13","name":"[v3,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e0c8971407e0ad350476051e8061172ed706f33.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98418,"url":"https://patchwork.plctlab.org/api/1.2/patches/98418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7124194404595352049d5779c4e4b9379fb3167.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:15","name":"[v3,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7124194404595352049d5779c4e4b9379fb3167.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98414,"url":"https://patchwork.plctlab.org/api/1.2/patches/98414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0d7d2d1cbea94f44064714a84115a4797c1342b.1684918168.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:16","name":"[v3,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0d7d2d1cbea94f44064714a84115a4797c1342b.1684918168.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98413,"url":"https://patchwork.plctlab.org/api/1.2/patches/98413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa4c1d8e2fdaa7929bfd2f728396a1eee1ff1be8.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T09:41:18","name":"[v3,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa4c1d8e2fdaa7929bfd2f728396a1eee1ff1be8.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98417,"url":"https://patchwork.plctlab.org/api/1.2/patches/98417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:19","name":"[v3,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dcc4535d30655302abfdc354fc786c28bed4b91.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98419,"url":"https://patchwork.plctlab.org/api/1.2/patches/98419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:21","name":"[v3,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ac6b0c13cfd5465a6ce38a5f04fc172e4ffb7da.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98420,"url":"https://patchwork.plctlab.org/api/1.2/patches/98420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:22","name":"[v3,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b1e378dd44da420d2a7e6c2691f1d809066c422.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98421,"url":"https://patchwork.plctlab.org/api/1.2/patches/98421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com/","msgid":"<7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-05-24T09:41:24","name":"[v3,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com/mbox/"},{"id":98423,"url":"https://patchwork.plctlab.org/api/1.2/patches/98423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2883909.e9J7NaK4W3@fomalhaut/","msgid":"<2883909.e9J7NaK4W3@fomalhaut>","list_archive_url":null,"date":"2023-05-24T09:54:41","name":"Fix artificial overflow during GENERIC folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2883909.e9J7NaK4W3@fomalhaut/mbox/"},{"id":98430,"url":"https://patchwork.plctlab.org/api/1.2/patches/98430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524101445.E7EC63857708@sourceware.org/","msgid":"<20230524101445.E7EC63857708@sourceware.org>","list_archive_url":null,"date":"2023-05-24T10:13:57","name":"target/109944 - avoid STLF fail for V16QImode CTOR expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524101445.E7EC63857708@sourceware.org/mbox/"},{"id":98440,"url":"https://patchwork.plctlab.org/api/1.2/patches/98440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13148454.CDJkKcVGEf@minbar/","msgid":"<13148454.CDJkKcVGEf@minbar>","list_archive_url":null,"date":"2023-05-24T10:58:19","name":"libstdc++: Fix SFINAE for __is_intrinsic_type on ARM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13148454.CDJkKcVGEf@minbar/mbox/"},{"id":98446,"url":"https://patchwork.plctlab.org/api/1.2/patches/98446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111933.3A9FC3857720@sourceware.org/","msgid":"<20230524111933.3A9FC3857720@sourceware.org>","list_archive_url":null,"date":"2023-05-24T11:18:47","name":"tree-optimization/109849 - fix fallout of PRE hoisting change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111933.3A9FC3857720@sourceware.org/mbox/"},{"id":98447,"url":"https://patchwork.plctlab.org/api/1.2/patches/98447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111902.248450-1-juzhe.zhong@rivai.ai/","msgid":"<20230524111902.248450-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T11:19:02","name":"RISC-V: Add FRM_ prefix to dynamic rounding mode enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524111902.248450-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98450,"url":"https://patchwork.plctlab.org/api/1.2/patches/98450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524112614.258594-1-juzhe.zhong@rivai.ai/","msgid":"<20230524112614.258594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T11:26:14","name":"RISC-V: Remove FRM_REGNUM dependency for rtx conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524112614.258594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98462,"url":"https://patchwork.plctlab.org/api/1.2/patches/98462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi/","msgid":"<76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-05-24T12:21:22","name":"Use expandargv on gcc-ar [PR77576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76a71ea623f25a11b3e9bdeefcebe047@gcc.mail.kapsi.fi/mbox/"},{"id":98470,"url":"https://patchwork.plctlab.org/api/1.2/patches/98470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec30da59-e022-905d-c710-3b1223ff7712@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T12:42:07","name":"[COMMITTED,1/3] PR tree-optimization/109695 - Choose better initial values for ranger.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec30da59-e022-905d-c710-3b1223ff7712@redhat.com/mbox/"},{"id":98473,"url":"https://patchwork.plctlab.org/api/1.2/patches/98473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com/","msgid":"<74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com>","list_archive_url":null,"date":"2023-05-24T12:42:21","name":"[COMMITTED,2/3] PR tree-optimization/109695 - Use negative values to reflect always_current in the, temporal cache.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74f5eb7b-fd29-640c-9704-4756d36e207a@redhat.com/mbox/"},{"id":98472,"url":"https://patchwork.plctlab.org/api/1.2/patches/98472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com/","msgid":"<419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com>","list_archive_url":null,"date":"2023-05-24T12:42:27","name":"[COMMITTED,3/3] PR tree-optimization/109695 - Only update global value if it changes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/419533f4-b632-ad55-f225-8f8dd6fd709b@redhat.com/mbox/"},{"id":98482,"url":"https://patchwork.plctlab.org/api/1.2/patches/98482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524125332.30839-1-amonakov@ispras.ru/","msgid":"<20230524125332.30839-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-05-24T12:53:32","name":"doc: clarify semantics of vector bitwise shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524125332.30839-1-amonakov@ispras.ru/mbox/"},{"id":98520,"url":"https://patchwork.plctlab.org/api/1.2/patches/98520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YpKfOOwCwLH=qscZECsXcuyoN7qd7sFB0aQq-iAcBuHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T14:20:14","name":"[COMMITTED] i386: Add vv4qi3 expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YpKfOOwCwLH=qscZECsXcuyoN7qd7sFB0aQq-iAcBuHA@mail.gmail.com/mbox/"},{"id":98521,"url":"https://patchwork.plctlab.org/api/1.2/patches/98521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524142941.6838-1-juzhe.zhong@rivai.ai/","msgid":"<20230524142941.6838-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T14:29:41","name":"[V13] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524142941.6838-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98528,"url":"https://patchwork.plctlab.org/api/1.2/patches/98528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524144801.73537-1-juzhe.zhong@rivai.ai/","msgid":"<20230524144801.73537-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-24T14:48:01","name":"[V14] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524144801.73537-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98544,"url":"https://patchwork.plctlab.org/api/1.2/patches/98544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7719656.MHq7AAxBmi@minbar/","msgid":"<7719656.MHq7AAxBmi@minbar>","list_archive_url":null,"date":"2023-05-24T15:04:32","name":"libstdc++: Fix type of first argument to vec_cntm call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7719656.MHq7AAxBmi@minbar/mbox/"},{"id":98637,"url":"https://patchwork.plctlab.org/api/1.2/patches/98637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com/","msgid":"<7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com>","list_archive_url":null,"date":"2023-05-24T17:32:06","name":"[v3] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a350840-a339-8292-dfe5-0fe704e85403@linux.ibm.com/mbox/"},{"id":98639,"url":"https://patchwork.plctlab.org/api/1.2/patches/98639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com/","msgid":"<07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-05-24T17:54:06","name":"[i386] A minor code clean-up: Use NULL_RTX instead of nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07ac01d98e68$bced1fa0$36c75ee0$@nextmovesoftware.com/mbox/"},{"id":98648,"url":"https://patchwork.plctlab.org/api/1.2/patches/98648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524184147.168078-1-aldyh@redhat.com/","msgid":"<20230524184147.168078-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-24T18:41:47","name":"[COMMITTED] Remove deprecated vrange::kind().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524184147.168078-1-aldyh@redhat.com/mbox/"},{"id":98660,"url":"https://patchwork.plctlab.org/api/1.2/patches/98660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524185559.1285583-1-jason@redhat.com/","msgid":"<20230524185559.1285583-1-jason@redhat.com>","list_archive_url":null,"date":"2023-05-24T18:55:59","name":"[RFC] c++: use __cxa_call_terminate for MUST_NOT_THROW [PR97720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524185559.1285583-1-jason@redhat.com/mbox/"},{"id":98662,"url":"https://patchwork.plctlab.org/api/1.2/patches/98662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d99cc8a9-1e19-4b84-89aa-f8a2c36b6ae1-1684955762561@3c-app-gmx-bap32/","msgid":"","list_archive_url":null,"date":"2023-05-24T19:16:02","name":"Fortran: reject bad DIM argument of SIZE intrinsic in simplification [PR104350]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d99cc8a9-1e19-4b84-89aa-f8a2c36b6ae1-1684955762561@3c-app-gmx-bap32/mbox/"},{"id":98672,"url":"https://patchwork.plctlab.org/api/1.2/patches/98672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce8b586f-119d-4589-be0e-cde57b7a609d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T21:19:07","name":"[COMMITTED,1/4] - Make ssa_cache and ssa_lazy_cache virtual.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce8b586f-119d-4589-be0e-cde57b7a609d@redhat.com/mbox/"},{"id":98675,"url":"https://patchwork.plctlab.org/api/1.2/patches/98675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com/","msgid":"<5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:21","name":"[COMMITTED,2/4] - Make ssa_cache a range_query.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5490c9c6-d4ea-a4f4-1718-238ef3caf9f5@redhat.com/mbox/"},{"id":98673,"url":"https://patchwork.plctlab.org/api/1.2/patches/98673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com/","msgid":"<92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:39","name":"[COMMITTED,3/4] Provide relation queries for a stmt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f97ed8-6149-21c7-731e-0b618667f33c@redhat.com/mbox/"},{"id":98674,"url":"https://patchwork.plctlab.org/api/1.2/patches/98674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com/","msgid":"<6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com>","list_archive_url":null,"date":"2023-05-24T21:19:52","name":"[COMMITTED,4/4] - Gimple range PHI analyzer and testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a24c0bf-aa0d-5e13-6852-705605db15ec@redhat.com/mbox/"},{"id":98720,"url":"https://patchwork.plctlab.org/api/1.2/patches/98720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOjw7vr0+OjTN4BB0DZ6=egk4r81affnLAXD0-xKwDpVQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-05-24T23:14:48","name":"[RFC] RISC-V: Eliminate extension after for *w instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOjw7vr0+OjTN4BB0DZ6=egk4r81affnLAXD0-xKwDpVQ@mail.gmail.com/mbox/"},{"id":98722,"url":"https://patchwork.plctlab.org/api/1.2/patches/98722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524233005.3284950-1-lili.cui@intel.com/","msgid":"<20230524233005.3284950-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-05-24T23:30:05","name":"Handle FMA friendly in reassoc pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230524233005.3284950-1-lili.cui@intel.com/mbox/"},{"id":98733,"url":"https://patchwork.plctlab.org/api/1.2/patches/98733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-2-qing.zhao@oracle.com/","msgid":"<20230525012255.2807393-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-25T01:22:54","name":"[1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-2-qing.zhao@oracle.com/mbox/"},{"id":98734,"url":"https://patchwork.plctlab.org/api/1.2/patches/98734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-3-qing.zhao@oracle.com/","msgid":"<20230525012255.2807393-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-05-25T01:22:55","name":"[2/2] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525012255.2807393-3-qing.zhao@oracle.com/mbox/"},{"id":98755,"url":"https://patchwork.plctlab.org/api/1.2/patches/98755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025439.3362655-1-lin1.hu@intel.com/","msgid":"<20230525025439.3362655-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-05-25T02:54:39","name":"i386: Fix incorrect intrinsic signature for AVX512 s{lli|rai|rli}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025439.3362655-1-lin1.hu@intel.com/mbox/"},{"id":98757,"url":"https://patchwork.plctlab.org/api/1.2/patches/98757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025813.1232463-1-juzhe.zhong@rivai.ai/","msgid":"<20230525025813.1232463-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T02:58:13","name":"[V15] VECT: Add decrement IV iteration loop control by variable amount support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525025813.1232463-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98760,"url":"https://patchwork.plctlab.org/api/1.2/patches/98760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525030920.2569553-1-pan2.li@intel.com/","msgid":"<20230525030920.2569553-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-05-25T03:09:20","name":"[v6] RISC-V: Using merge approach to optimize repeating sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525030920.2569553-1-pan2.li@intel.com/mbox/"},{"id":98919,"url":"https://patchwork.plctlab.org/api/1.2/patches/98919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525044342.3815571-1-naveenh@marvell.com/","msgid":"<20230525044342.3815571-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T04:43:42","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525044342.3815571-1-naveenh@marvell.com/mbox/"},{"id":98918,"url":"https://patchwork.plctlab.org/api/1.2/patches/98918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525045147.3815773-1-naveenh@marvell.com/","msgid":"<20230525045147.3815773-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T04:51:47","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525045147.3815773-1-naveenh@marvell.com/mbox/"},{"id":98920,"url":"https://patchwork.plctlab.org/api/1.2/patches/98920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525050750.3816032-1-naveenh@marvell.com/","msgid":"<20230525050750.3816032-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T05:07:50","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525050750.3816032-1-naveenh@marvell.com/mbox/"},{"id":98921,"url":"https://patchwork.plctlab.org/api/1.2/patches/98921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525052029.3816261-1-naveenh@marvell.com/","msgid":"<20230525052029.3816261-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T05:20:29","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525052029.3816261-1-naveenh@marvell.com/mbox/"},{"id":98783,"url":"https://patchwork.plctlab.org/api/1.2/patches/98783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-1-aldyh@redhat.com/","msgid":"<20230525053520.244673-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:17","name":"[COMMITTED] Add an frange::set_nan() variant that takes a nan_state.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-1-aldyh@redhat.com/mbox/"},{"id":98784,"url":"https://patchwork.plctlab.org/api/1.2/patches/98784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-2-aldyh@redhat.com/","msgid":"<20230525053520.244673-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:18","name":"[COMMITTED] Hash known NANs correctly for franges.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-2-aldyh@redhat.com/mbox/"},{"id":98785,"url":"https://patchwork.plctlab.org/api/1.2/patches/98785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-3-aldyh@redhat.com/","msgid":"<20230525053520.244673-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:19","name":"[COMMITTED] Disallow setting of NANs in frange setter unless setting trees.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-3-aldyh@redhat.com/mbox/"},{"id":98787,"url":"https://patchwork.plctlab.org/api/1.2/patches/98787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-4-aldyh@redhat.com/","msgid":"<20230525053520.244673-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-05-25T05:35:20","name":"[COMMITTED] Stream out NANs correctly.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525053520.244673-4-aldyh@redhat.com/mbox/"},{"id":98798,"url":"https://patchwork.plctlab.org/api/1.2/patches/98798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525064806.1676311-1-juzhe.zhong@rivai.ai/","msgid":"<20230525064806.1676311-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T06:48:06","name":"RISC-V: Fix incorrect VXRM configuration in mode switching for CALL and ASM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525064806.1676311-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98922,"url":"https://patchwork.plctlab.org/api/1.2/patches/98922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065320.3816623-1-naveenh@marvell.com/","msgid":"<20230525065320.3816623-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T06:53:20","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065320.3816623-1-naveenh@marvell.com/mbox/"},{"id":98800,"url":"https://patchwork.plctlab.org/api/1.2/patches/98800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065824.3816727-1-naveenh@marvell.com/","msgid":"<20230525065824.3816727-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-05-25T06:58:24","name":"Add scalar_storage_order support to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065824.3816727-1-naveenh@marvell.com/mbox/"},{"id":98802,"url":"https://patchwork.plctlab.org/api/1.2/patches/98802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065957.1872100-1-juzhe.zhong@rivai.ai/","msgid":"<20230525065957.1872100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T06:59:57","name":"[V2] RISC-V: Fix incorrect VXRM configuration in mode switching for CALL and ASM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525065957.1872100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98835,"url":"https://patchwork.plctlab.org/api/1.2/patches/98835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525075406.270194-1-juzhe.zhong@rivai.ai/","msgid":"<20230525075406.270194-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-05-25T07:54:06","name":"RISC-V: Add RVV FRM enum for floating-point rounding mode intriniscs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525075406.270194-1-juzhe.zhong@rivai.ai/mbox/"},{"id":98837,"url":"https://patchwork.plctlab.org/api/1.2/patches/98837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080507.1955270-1-poulhies@adacore.com/","msgid":"<20230525080507.1955270-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:07","name":"[COMMITTED] ada: Restrict use of formal parameters within exceptional cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080507.1955270-1-poulhies@adacore.com/mbox/"},{"id":98839,"url":"https://patchwork.plctlab.org/api/1.2/patches/98839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080519.1955422-1-poulhies@adacore.com/","msgid":"<20230525080519.1955422-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:19","name":"[COMMITTED] ada: Fix SPARK context not restored when Load_Unit is failing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080519.1955422-1-poulhies@adacore.com/mbox/"},{"id":98841,"url":"https://patchwork.plctlab.org/api/1.2/patches/98841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080520.1955484-1-poulhies@adacore.com/","msgid":"<20230525080520.1955484-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:20","name":"[COMMITTED] ada: Fix obsolete comment in Sinfo.Utils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080520.1955484-1-poulhies@adacore.com/mbox/"},{"id":98845,"url":"https://patchwork.plctlab.org/api/1.2/patches/98845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080522.1955545-1-poulhies@adacore.com/","msgid":"<20230525080522.1955545-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:22","name":"[COMMITTED] ada: Fix incorrect handling of Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080522.1955545-1-poulhies@adacore.com/mbox/"},{"id":98836,"url":"https://patchwork.plctlab.org/api/1.2/patches/98836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080524.1955610-1-poulhies@adacore.com/","msgid":"<20230525080524.1955610-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:24","name":"[COMMITTED] ada: Accept aliased parameters in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080524.1955610-1-poulhies@adacore.com/mbox/"},{"id":98840,"url":"https://patchwork.plctlab.org/api/1.2/patches/98840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080526.1955679-1-poulhies@adacore.com/","msgid":"<20230525080526.1955679-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:26","name":"[COMMITTED] ada: Tune warning about assignment just before a raise statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080526.1955679-1-poulhies@adacore.com/mbox/"},{"id":98838,"url":"https://patchwork.plctlab.org/api/1.2/patches/98838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080528.1955789-1-poulhies@adacore.com/","msgid":"<20230525080528.1955789-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:28","name":"[COMMITTED] ada: Minor fixes in description of scope depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080528.1955789-1-poulhies@adacore.com/mbox/"},{"id":98850,"url":"https://patchwork.plctlab.org/api/1.2/patches/98850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080530.1955851-1-poulhies@adacore.com/","msgid":"<20230525080530.1955851-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:30","name":"[COMMITTED] ada: Add Entry_Cancel_Parameter to E_Label","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080530.1955851-1-poulhies@adacore.com/mbox/"},{"id":98844,"url":"https://patchwork.plctlab.org/api/1.2/patches/98844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080531.1955918-1-poulhies@adacore.com/","msgid":"<20230525080531.1955918-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:31","name":"[COMMITTED] ada: Handle controlling access parameters in DTWs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080531.1955918-1-poulhies@adacore.com/mbox/"},{"id":98853,"url":"https://patchwork.plctlab.org/api/1.2/patches/98853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080533.1955979-1-poulhies@adacore.com/","msgid":"<20230525080533.1955979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:33","name":"[COMMITTED] ada: Set Is_Not_Self_Hidden flag in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080533.1955979-1-poulhies@adacore.com/mbox/"},{"id":98842,"url":"https://patchwork.plctlab.org/api/1.2/patches/98842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080535.1956040-1-poulhies@adacore.com/","msgid":"<20230525080535.1956040-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:35","name":"[COMMITTED] ada: Reduce span of variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080535.1956040-1-poulhies@adacore.com/mbox/"},{"id":98859,"url":"https://patchwork.plctlab.org/api/1.2/patches/98859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080537.1956101-1-poulhies@adacore.com/","msgid":"<20230525080537.1956101-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:37","name":"[COMMITTED] ada: Maximize use of existing constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080537.1956101-1-poulhies@adacore.com/mbox/"},{"id":98849,"url":"https://patchwork.plctlab.org/api/1.2/patches/98849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080539.1956162-1-poulhies@adacore.com/","msgid":"<20230525080539.1956162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:38","name":"[COMMITTED] ada: Enrich documentation of subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080539.1956162-1-poulhies@adacore.com/mbox/"},{"id":98865,"url":"https://patchwork.plctlab.org/api/1.2/patches/98865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080542.1956225-1-poulhies@adacore.com/","msgid":"<20230525080542.1956225-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:42","name":"[COMMITTED] ada: Fix copy-paste mistake in analysis of Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080542.1956225-1-poulhies@adacore.com/mbox/"},{"id":98856,"url":"https://patchwork.plctlab.org/api/1.2/patches/98856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080543.1956286-1-poulhies@adacore.com/","msgid":"<20230525080543.1956286-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:43","name":"[COMMITTED] ada: Small tweak to implementation of by-copy semantics for storage models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080543.1956286-1-poulhies@adacore.com/mbox/"},{"id":98862,"url":"https://patchwork.plctlab.org/api/1.2/patches/98862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080545.1956348-1-poulhies@adacore.com/","msgid":"<20230525080545.1956348-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:45","name":"[COMMITTED] ada: Remove redundant guards from calls to Move_Aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080545.1956348-1-poulhies@adacore.com/mbox/"},{"id":98857,"url":"https://patchwork.plctlab.org/api/1.2/patches/98857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080547.1956409-1-poulhies@adacore.com/","msgid":"<20230525080547.1956409-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:47","name":"[COMMITTED] ada: Tune handling of attributes Old in contract Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080547.1956409-1-poulhies@adacore.com/mbox/"},{"id":98847,"url":"https://patchwork.plctlab.org/api/1.2/patches/98847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080549.1956470-1-poulhies@adacore.com/","msgid":"<20230525080549.1956470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:49","name":"[COMMITTED] ada: Add missing supportive code for recently added SPARK aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080549.1956470-1-poulhies@adacore.com/mbox/"},{"id":98854,"url":"https://patchwork.plctlab.org/api/1.2/patches/98854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080551.1956531-1-poulhies@adacore.com/","msgid":"<20230525080551.1956531-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:51","name":"[COMMITTED] ada: Fix comments for recently added SPARK aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080551.1956531-1-poulhies@adacore.com/mbox/"},{"id":98855,"url":"https://patchwork.plctlab.org/api/1.2/patches/98855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080552.1956593-1-poulhies@adacore.com/","msgid":"<20230525080552.1956593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:52","name":"[COMMITTED] ada: Prevent search of calls in preconditions from going too far","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080552.1956593-1-poulhies@adacore.com/mbox/"},{"id":98868,"url":"https://patchwork.plctlab.org/api/1.2/patches/98868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080554.1956654-1-poulhies@adacore.com/","msgid":"<20230525080554.1956654-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:54","name":"[COMMITTED] ada: Fix (again) incorrect handling of Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080554.1956654-1-poulhies@adacore.com/mbox/"},{"id":98858,"url":"https://patchwork.plctlab.org/api/1.2/patches/98858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080556.1956715-1-poulhies@adacore.com/","msgid":"<20230525080556.1956715-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:56","name":"[COMMITTED] ada: Remove unused initial value of a local variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080556.1956715-1-poulhies@adacore.com/mbox/"},{"id":98852,"url":"https://patchwork.plctlab.org/api/1.2/patches/98852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080557.1956782-1-poulhies@adacore.com/","msgid":"<20230525080557.1956782-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:57","name":"[COMMITTED] ada: Fix crash during function return analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080557.1956782-1-poulhies@adacore.com/mbox/"},{"id":98870,"url":"https://patchwork.plctlab.org/api/1.2/patches/98870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080559.1956848-1-poulhies@adacore.com/","msgid":"<20230525080559.1956848-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:05:59","name":"[COMMITTED] ada: Avoid duplicated streaming subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080559.1956848-1-poulhies@adacore.com/mbox/"},{"id":98872,"url":"https://patchwork.plctlab.org/api/1.2/patches/98872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080601.1956918-1-poulhies@adacore.com/","msgid":"<20230525080601.1956918-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:01","name":"[COMMITTED] ada: Simplify copying of node lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080601.1956918-1-poulhies@adacore.com/mbox/"},{"id":98860,"url":"https://patchwork.plctlab.org/api/1.2/patches/98860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080603.1956979-1-poulhies@adacore.com/","msgid":"<20230525080603.1956979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:03","name":"[COMMITTED] ada: Clean up copying of node trees","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080603.1956979-1-poulhies@adacore.com/mbox/"},{"id":98861,"url":"https://patchwork.plctlab.org/api/1.2/patches/98861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080604.1957044-1-poulhies@adacore.com/","msgid":"<20230525080604.1957044-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:04","name":"[COMMITTED] ada: Deconstruct a no longer used parameter of New_Copy_Tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080604.1957044-1-poulhies@adacore.com/mbox/"},{"id":98875,"url":"https://patchwork.plctlab.org/api/1.2/patches/98875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080606.1957110-1-poulhies@adacore.com/","msgid":"<20230525080606.1957110-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:06","name":"[COMMITTED] ada: Fix copying of quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080606.1957110-1-poulhies@adacore.com/mbox/"},{"id":98863,"url":"https://patchwork.plctlab.org/api/1.2/patches/98863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080608.1957177-1-poulhies@adacore.com/","msgid":"<20230525080608.1957177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:08","name":"[COMMITTED] ada: Decouple size of addresses and pointers from size of memory space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080608.1957177-1-poulhies@adacore.com/mbox/"},{"id":98866,"url":"https://patchwork.plctlab.org/api/1.2/patches/98866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080610.1957238-1-poulhies@adacore.com/","msgid":"<20230525080610.1957238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:10","name":"[COMMITTED] ada: Switch from E_Void to Is_Not_Self_Hidden","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080610.1957238-1-poulhies@adacore.com/mbox/"},{"id":98843,"url":"https://patchwork.plctlab.org/api/1.2/patches/98843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080611.1957303-1-poulhies@adacore.com/","msgid":"<20230525080611.1957303-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:11","name":"[COMMITTED] ada: Fix error message for Aggregate aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080611.1957303-1-poulhies@adacore.com/mbox/"},{"id":98864,"url":"https://patchwork.plctlab.org/api/1.2/patches/98864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080613.1957364-1-poulhies@adacore.com/","msgid":"<20230525080613.1957364-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:13","name":"[COMMITTED] ada: Add size clause to System.Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080613.1957364-1-poulhies@adacore.com/mbox/"},{"id":98878,"url":"https://patchwork.plctlab.org/api/1.2/patches/98878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080615.1957429-1-poulhies@adacore.com/","msgid":"<20230525080615.1957429-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:15","name":"[COMMITTED] ada: Minor adjustments to Standard_Address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080615.1957429-1-poulhies@adacore.com/mbox/"},{"id":98879,"url":"https://patchwork.plctlab.org/api/1.2/patches/98879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080616.1957490-1-poulhies@adacore.com/","msgid":"<20230525080616.1957490-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:16","name":"[COMMITTED] ada: Require successful build of xsnamest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080616.1957490-1-poulhies@adacore.com/mbox/"},{"id":98848,"url":"https://patchwork.plctlab.org/api/1.2/patches/98848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080618.1957604-1-poulhies@adacore.com/","msgid":"<20230525080618.1957604-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:18","name":"[COMMITTED] ada: Fix internal error on declare-expression in post-condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080618.1957604-1-poulhies@adacore.com/mbox/"},{"id":98877,"url":"https://patchwork.plctlab.org/api/1.2/patches/98877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080620.1957675-1-poulhies@adacore.com/","msgid":"<20230525080620.1957675-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:20","name":"[COMMITTED] ada: Enable Support_Atomic_Primitives on VxWorks 7 PPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080620.1957675-1-poulhies@adacore.com/mbox/"},{"id":98867,"url":"https://patchwork.plctlab.org/api/1.2/patches/98867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080622.1957738-1-poulhies@adacore.com/","msgid":"<20230525080622.1957738-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:22","name":"[COMMITTED] ada: Crash on empty aggregate using the Ada 2022 notation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080622.1957738-1-poulhies@adacore.com/mbox/"},{"id":98869,"url":"https://patchwork.plctlab.org/api/1.2/patches/98869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080624.1957802-1-poulhies@adacore.com/","msgid":"<20230525080624.1957802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:24","name":"[COMMITTED] ada: Use procedural variant of Next_Index where possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080624.1957802-1-poulhies@adacore.com/mbox/"},{"id":98873,"url":"https://patchwork.plctlab.org/api/1.2/patches/98873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080625.1957864-1-poulhies@adacore.com/","msgid":"<20230525080625.1957864-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:25","name":"[COMMITTED] ada: Expect Exceptional_Cases as a context for attribute Old","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080625.1957864-1-poulhies@adacore.com/mbox/"},{"id":98876,"url":"https://patchwork.plctlab.org/api/1.2/patches/98876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080628.1957926-1-poulhies@adacore.com/","msgid":"<20230525080628.1957926-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-05-25T08:06:28","name":"[COMMITTED] ada: Missing warning on null-excluding array aggregate component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525080628.1957926-1-poulhies@adacore.com/mbox/"},{"id":98881,"url":"https://patchwork.plctlab.org/api/1.2/patches/98881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525083231.234-1-jinma@linux.alibaba.com/","msgid":"<20230525083231.234-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-05-25T08:32:31","name":"RISC-V: In pipeline scheduling, insns should not be fusion in different BB blocks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525083231.234-1-jinma@linux.alibaba.com/mbox/"},{"id":98902,"url":"https://patchwork.plctlab.org/api/1.2/patches/98902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525090006.E0AA93857702@sourceware.org/","msgid":"<20230525090006.E0AA93857702@sourceware.org>","list_archive_url":null,"date":"2023-05-25T08:59:21","name":"tree-optimization/109791 - expand &x + off for niter compute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230525090006.E0AA93857702@sourceware.org/mbox/"},{"id":98906,"url":"https://patchwork.plctlab.org/api/1.2/patches/98906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com/","msgid":"<1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com>","list_archive_url":null,"date":"2023-05-25T09:03:27","name":"RISC-V: Add autovec sign/zero extension and truncation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a1cc437-12bd-b3e8-5fe4-7edb41625753@gmail.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-05/mbox/"},{"id":24,"url":"https://patchwork.plctlab.org/api/1.2/bundles/24/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-06/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-06","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":101534,"url":"https://patchwork.plctlab.org/api/1.2/patches/101534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-2-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-2-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:32","name":"[1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-2-vineetg@rivosinc.com/mbox/"},{"id":101535,"url":"https://patchwork.plctlab.org/api/1.2/patches/101535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-3-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-3-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:33","name":"[2/3] RISC-V: Add missing torture-init and torture-finish for rvv.exp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-3-vineetg@rivosinc.com/mbox/"},{"id":101536,"url":"https://patchwork.plctlab.org/api/1.2/patches/101536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-4-vineetg@rivosinc.com/","msgid":"<20230531162534.119952-4-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-05-31T16:25:34","name":"[3/3] testsuite: print any leaking torture options for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531162534.119952-4-vineetg@rivosinc.com/mbox/"},{"id":101552,"url":"https://patchwork.plctlab.org/api/1.2/patches/101552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com/","msgid":"<01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com>","list_archive_url":null,"date":"2023-05-31T17:39:28","name":"Move std::search into algobase.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f2b9e7-14e8-12a7-c275-7e48e3bd94df@gmail.com/mbox/"},{"id":101560,"url":"https://patchwork.plctlab.org/api/1.2/patches/101560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-2-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:28","name":"[1/3] testsuite: move handle-multiline-outputs to before check for blank lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-2-dmalcolm@redhat.com/mbox/"},{"id":101562,"url":"https://patchwork.plctlab.org/api/1.2/patches/101562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-3-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:29","name":"[2/3] diagnostics: add support for \"text art\" diagrams","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-3-dmalcolm@redhat.com/mbox/"},{"id":101561,"url":"https://patchwork.plctlab.org/api/1.2/patches/101561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-4-dmalcolm@redhat.com/","msgid":"<20230531180630.3127108-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-05-31T18:06:30","name":"[3/3] analyzer: add text-art visualizations of out-of-bounds accesses [PR106626]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531180630.3127108-4-dmalcolm@redhat.com/mbox/"},{"id":101569,"url":"https://patchwork.plctlab.org/api/1.2/patches/101569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9de24e4-2cf9-1434-4148-7a7634ad4253@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-05-31T19:22:15","name":"OpenMP/Fortran: Permit pure directives inside PURE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9de24e4-2cf9-1434-4148-7a7634ad4253@codesourcery.com/mbox/"},{"id":101571,"url":"https://patchwork.plctlab.org/api/1.2/patches/101571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200257.6784-1-jwakely@redhat.com/","msgid":"<20230531200257.6784-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:02:57","name":"[committed] libstdc++: Fix configure test for 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200257.6784-1-jwakely@redhat.com/mbox/"},{"id":101575,"url":"https://patchwork.plctlab.org/api/1.2/patches/101575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200532.6935-1-jwakely@redhat.com/","msgid":"<20230531200532.6935-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:05:32","name":"[committed] libstdc++: Fix build for targets without _Float128 [PR109921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531200532.6935-1-jwakely@redhat.com/mbox/"},{"id":101582,"url":"https://patchwork.plctlab.org/api/1.2/patches/101582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202019.20749-1-jwakely@redhat.com/","msgid":"<20230531202019.20749-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:19","name":"[committed] libstdc++: Express std::vector'\''s size() <= capacity() invariant in code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202019.20749-1-jwakely@redhat.com/mbox/"},{"id":101583,"url":"https://patchwork.plctlab.org/api/1.2/patches/101583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202049.20903-1-jwakely@redhat.com/","msgid":"<20230531202049.20903-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:49","name":"[committed] libstdc++: Stop using _GLIBCXX_USE_C99_MATH_TR1 in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202049.20903-1-jwakely@redhat.com/mbox/"},{"id":101584,"url":"https://patchwork.plctlab.org/api/1.2/patches/101584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202054.20950-1-jwakely@redhat.com/","msgid":"<20230531202054.20950-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-05-31T20:20:54","name":"[committed] libstdc++: Add separate autoconf macro for std::float_t and std::double_t [PR109818]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230531202054.20950-1-jwakely@redhat.com/mbox/"},{"id":101653,"url":"https://patchwork.plctlab.org/api/1.2/patches/101653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601023615.89715-1-juzhe.zhong@rivai.ai/","msgid":"<20230601023615.89715-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T02:36:15","name":"[V2] RISC-V: Support RVV permutation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601023615.89715-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101677,"url":"https://patchwork.plctlab.org/api/1.2/patches/101677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031255.1268906-1-jason@redhat.com/","msgid":"<20230601031255.1268906-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:12:55","name":"libstdc++: optimize EH phase 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031255.1268906-1-jason@redhat.com/mbox/"},{"id":101686,"url":"https://patchwork.plctlab.org/api/1.2/patches/101686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031819.1271768-1-jason@redhat.com/","msgid":"<20230601031819.1271768-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:18:19","name":"[pushed] c++: make -fpermissive avoid -Werror=narrowing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601031819.1271768-1-jason@redhat.com/mbox/"},{"id":101690,"url":"https://patchwork.plctlab.org/api/1.2/patches/101690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601033136.1275711-1-jason@redhat.com/","msgid":"<20230601033136.1275711-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-01T03:31:36","name":"doc: improve docs for -pedantic{,-errors}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601033136.1275711-1-jason@redhat.com/mbox/"},{"id":101693,"url":"https://patchwork.plctlab.org/api/1.2/patches/101693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601034823.235258-1-juzhe.zhong@rivai.ai/","msgid":"<20230601034823.235258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T03:48:23","name":"RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601034823.235258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101701,"url":"https://patchwork.plctlab.org/api/1.2/patches/101701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601042658.2128162-1-yunqiang.su@cipunited.com/","msgid":"<20230601042658.2128162-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-01T04:26:58","name":"[v5] MIPS: Add speculation_barrier support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601042658.2128162-1-yunqiang.su@cipunited.com/mbox/"},{"id":101702,"url":"https://patchwork.plctlab.org/api/1.2/patches/101702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601043617.173986-1-juzhe.zhong@rivai.ai/","msgid":"<20230601043617.173986-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T04:36:17","name":"[V3] VECT: Change flow of decrement IV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601043617.173986-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101704,"url":"https://patchwork.plctlab.org/api/1.2/patches/101704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com/","msgid":"<94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com>","list_archive_url":null,"date":"2023-06-01T05:23:02","name":"PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/94db15dc-2ce3-bfc1-6483-fce5687bd991@linux.ibm.com/mbox/"},{"id":101743,"url":"https://patchwork.plctlab.org/api/1.2/patches/101743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp/","msgid":"<931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp>","list_archive_url":null,"date":"2023-06-01T06:01:07","name":"[2/3,v3] xtensa: Add '\''adddi3'\'' and '\''subdi3'\'' insn patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/931ab50b-8b5a-4979-b442-f193896a1a4f@yahoo.co.jp/mbox/"},{"id":101786,"url":"https://patchwork.plctlab.org/api/1.2/patches/101786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601071746.2403557-1-pan2.li@intel.com/","msgid":"<20230601071746.2403557-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-01T07:17:46","name":"RISC-V: Introduce vfloat16m{f}*_t and their machine mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601071746.2403557-1-pan2.li@intel.com/mbox/"},{"id":101787,"url":"https://patchwork.plctlab.org/api/1.2/patches/101787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbe83266-cae1-e46c-2288-1a944e0c607b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T07:20:08","name":"[v5] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbe83266-cae1-e46c-2288-1a944e0c607b@linux.ibm.com/mbox/"},{"id":101791,"url":"https://patchwork.plctlab.org/api/1.2/patches/101791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601073136.193330-1-juzhe.zhong@rivai.ai/","msgid":"<20230601073136.193330-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T07:31:36","name":"RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv instruction optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601073136.193330-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101796,"url":"https://patchwork.plctlab.org/api/1.2/patches/101796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601074855.319313-1-hongtao.liu@intel.com/","msgid":"<20230601074855.319313-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-01T07:48:55","name":"Don'\''t try bswap + rotate when TYPE_PRECISION(n->type) > n->range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601074855.319313-1-hongtao.liu@intel.com/mbox/"},{"id":101801,"url":"https://patchwork.plctlab.org/api/1.2/patches/101801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601083212.245585-1-juzhe.zhong@rivai.ai/","msgid":"<20230601083212.245585-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T08:32:12","name":"[V2] RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv instruction optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601083212.245585-1-juzhe.zhong@rivai.ai/mbox/"},{"id":101805,"url":"https://patchwork.plctlab.org/api/1.2/patches/101805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5270701.LvFx2qVVIh@minbar/","msgid":"<5270701.LvFx2qVVIh@minbar>","list_archive_url":null,"date":"2023-06-01T08:49:58","name":"[committed] libstdc++: Fix condition for supported SIMD types on ARMv8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5270701.LvFx2qVVIh@minbar/mbox/"},{"id":101874,"url":"https://patchwork.plctlab.org/api/1.2/patches/101874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601103737.99717-1-jwakely@redhat.com/","msgid":"<20230601103737.99717-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T10:37:37","name":"doc: Fix description of x86 -m32 option [PR109954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601103737.99717-1-jwakely@redhat.com/mbox/"},{"id":101902,"url":"https://patchwork.plctlab.org/api/1.2/patches/101902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601120853.2769642-1-pan2.li@intel.com/","msgid":"<20230601120853.2769642-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-01T12:08:53","name":"RISC-V: Add test for vfloat16*_t (non tuple) types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601120853.2769642-1-pan2.li@intel.com/mbox/"},{"id":101964,"url":"https://patchwork.plctlab.org/api/1.2/patches/101964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZkM1UjbyrupBsmmPf8cmpExTRHrO2HB22f6M1-vigCnA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T14:24:57","name":"[COMMITTED] cse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZkM1UjbyrupBsmmPf8cmpExTRHrO2HB22f6M1-vigCnA@mail.gmail.com/mbox/"},{"id":101974,"url":"https://patchwork.plctlab.org/api/1.2/patches/101974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-1-ppalka@redhat.com/","msgid":"<20230601144938.765175-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T14:49:36","name":"[1/2] c++: refine dependent_alias_template_spec_p [PR90679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-1-ppalka@redhat.com/mbox/"},{"id":101975,"url":"https://patchwork.plctlab.org/api/1.2/patches/101975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-2-ppalka@redhat.com/","msgid":"<20230601144938.765175-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T14:49:37","name":"[2/2] c++: partial ordering and dep alias tmpl specs [PR90679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601144938.765175-2-ppalka@redhat.com/mbox/"},{"id":102002,"url":"https://patchwork.plctlab.org/api/1.2/patches/102002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150711.257954-1-jwakely@redhat.com/","msgid":"<20230601150711.257954-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:07:11","name":"[committed] libstdc++: Document removal of implicit allocator rebinding extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150711.257954-1-jwakely@redhat.com/mbox/"},{"id":102005,"url":"https://patchwork.plctlab.org/api/1.2/patches/102005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150958.268109-1-jwakely@redhat.com/","msgid":"<20230601150958.268109-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:09:58","name":"[committed] libstdc++: Fix code size regressions in std::vector [PR110060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601150958.268109-1-jwakely@redhat.com/mbox/"},{"id":102006,"url":"https://patchwork.plctlab.org/api/1.2/patches/102006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601151004.268138-1-jwakely@redhat.com/","msgid":"<20230601151004.268138-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:10:04","name":"[committed] libstdc++: Do not use std::expected::value() in monadic ops (LWG 3938)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601151004.268138-1-jwakely@redhat.com/mbox/"},{"id":102020,"url":"https://patchwork.plctlab.org/api/1.2/patches/102020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKQcWUnq72PBYJb5YGT6x=tWnO_MhEFA_R7FmPpHE3jSA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T15:20:46","name":"[fortran] PR87477 - [meta-bug] [F03] issues concerning the ASSOCIATE statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKQcWUnq72PBYJb5YGT6x=tWnO_MhEFA_R7FmPpHE3jSA@mail.gmail.com/mbox/"},{"id":102062,"url":"https://patchwork.plctlab.org/api/1.2/patches/102062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155651.305379-1-jwakely@redhat.com/","msgid":"<20230601155651.305379-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:56:51","name":"[committed] libstdc++: Fix PSTL test that fails in C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155651.305379-1-jwakely@redhat.com/mbox/"},{"id":102065,"url":"https://patchwork.plctlab.org/api/1.2/patches/102065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155856.305565-1-jwakely@redhat.com/","msgid":"<20230601155856.305565-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-01T15:58:56","name":"libstdc++: Use AS_IF in configure.ac","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601155856.305565-1-jwakely@redhat.com/mbox/"},{"id":102070,"url":"https://patchwork.plctlab.org/api/1.2/patches/102070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92f28d5-a7ef-34e5-044d-0ee04771a280@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T16:30:02","name":"inline: improve internal function costs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d92f28d5-a7ef-34e5-044d-0ee04771a280@arm.com/mbox/"},{"id":102073,"url":"https://patchwork.plctlab.org/api/1.2/patches/102073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21150fd3-ff31-1188-5876-768e7a5edc84@arm.com/","msgid":"<21150fd3-ff31-1188-5876-768e7a5edc84@arm.com>","list_archive_url":null,"date":"2023-06-01T16:31:42","name":"gimple-range: implement widen plus range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21150fd3-ff31-1188-5876-768e7a5edc84@arm.com/mbox/"},{"id":102141,"url":"https://patchwork.plctlab.org/api/1.2/patches/102141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1c63e58d-07b4-4137-a7be-3648399ce8db-1685646310303@3c-app-gmx-bap24/","msgid":"","list_archive_url":null,"date":"2023-06-01T19:05:10","name":"Fortran: force error on bad KIND specifier [PR88552]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1c63e58d-07b4-4137-a7be-3648399ce8db-1685646310303@3c-app-gmx-bap24/mbox/"},{"id":102161,"url":"https://patchwork.plctlab.org/api/1.2/patches/102161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193853.160037-1-vineetg@rivosinc.com/","msgid":"<20230601193853.160037-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-01T19:38:53","name":"[Committed] testsuite: Unbork multilib setups using -march flags (RISC-V)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193853.160037-1-vineetg@rivosinc.com/mbox/"},{"id":102162,"url":"https://patchwork.plctlab.org/api/1.2/patches/102162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193945.160085-1-vineetg@rivosinc.com/","msgid":"<20230601193945.160085-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-01T19:39:45","name":"[Committed] testsuite: print any leaking torture options for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601193945.160085-1-vineetg@rivosinc.com/mbox/"},{"id":102163,"url":"https://patchwork.plctlab.org/api/1.2/patches/102163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com/","msgid":"<602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-01T20:01:44","name":"rs6000: Fix arguments for __builtin_altivec_tr_stxvrwx, __builtin_altivec_tr_stxvrhx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/602fbdd3b3407e834713953d0d23c1ce47173dc7.camel@us.ibm.com/mbox/"},{"id":102171,"url":"https://patchwork.plctlab.org/api/1.2/patches/102171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6281b22-bf93-fe03-d461-6f597849bf98@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-01T20:12:21","name":"[RFC] range-op restructuring","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6281b22-bf93-fe03-d461-6f597849bf98@redhat.com/mbox/"},{"id":102205,"url":"https://patchwork.plctlab.org/api/1.2/patches/102205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601214224.1468391-1-ppalka@redhat.com/","msgid":"<20230601214224.1468391-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-01T21:42:24","name":"c++: fix up caching of level lowered ttps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601214224.1468391-1-ppalka@redhat.com/mbox/"},{"id":102232,"url":"https://patchwork.plctlab.org/api/1.2/patches/102232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601230441.294259-1-juzhe.zhong@rivai.ai/","msgid":"<20230601230441.294259-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T23:04:41","name":"RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601230441.294259-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102233,"url":"https://patchwork.plctlab.org/api/1.2/patches/102233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com/","msgid":"<0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-01T23:11:25","name":"rs6000: Fix expected counts powerpc/p9-vec-length-full","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e14ae076c1bc2e9b1d749f1111a44646ef50cca.camel@us.ibm.com/mbox/"},{"id":102236,"url":"https://patchwork.plctlab.org/api/1.2/patches/102236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601231907.3879-1-juzhe.zhong@rivai.ai/","msgid":"<20230601231907.3879-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-01T23:19:07","name":"RISC-V: Add __RISCV_ prefix to VXRM and FRM enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230601231907.3879-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102248,"url":"https://patchwork.plctlab.org/api/1.2/patches/102248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602004908.2571237-1-hongtao.liu@intel.com/","msgid":"<20230602004908.2571237-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-02T00:49:08","name":"i386: Add missing vector truncate patterns [PR92658].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602004908.2571237-1-hongtao.liu@intel.com/mbox/"},{"id":102249,"url":"https://patchwork.plctlab.org/api/1.2/patches/102249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602010015.2571612-1-hongtao.liu@intel.com/","msgid":"<20230602010015.2571612-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-02T01:00:15","name":"[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602010015.2571612-1-hongtao.liu@intel.com/mbox/"},{"id":102262,"url":"https://patchwork.plctlab.org/api/1.2/patches/102262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602013115.1613501-1-jason@redhat.com/","msgid":"<20230602013115.1613501-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T01:31:15","name":"[RFA] c++: make initializer_list array static again [PR110070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602013115.1613501-1-jason@redhat.com/mbox/"},{"id":102277,"url":"https://patchwork.plctlab.org/api/1.2/patches/102277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020426.63191-1-juzhe.zhong@rivai.ai/","msgid":"<20230602020426.63191-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T02:04:26","name":"RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020426.63191-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102278,"url":"https://patchwork.plctlab.org/api/1.2/patches/102278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020447.63264-1-juzhe.zhong@rivai.ai/","msgid":"<20230602020447.63264-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T02:04:47","name":"[V2] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602020447.63264-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102280,"url":"https://patchwork.plctlab.org/api/1.2/patches/102280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602021059.2229464-1-yunqiang.su@cipunited.com/","msgid":"<20230602021059.2229464-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-02T02:10:59","name":"[COMMITTED] MAINTAINERS: Add myself as MIPS port maintainer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602021059.2229464-1-yunqiang.su@cipunited.com/mbox/"},{"id":102283,"url":"https://patchwork.plctlab.org/api/1.2/patches/102283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602024341.1629656-1-jason@redhat.com/","msgid":"<20230602024341.1629656-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T02:43:41","name":"[RFA] varasm: check float size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602024341.1629656-1-jason@redhat.com/mbox/"},{"id":102287,"url":"https://patchwork.plctlab.org/api/1.2/patches/102287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602030443.124743-1-juzhe.zhong@rivai.ai/","msgid":"<20230602030443.124743-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T03:04:43","name":"RISC-V: Fix warning in predicated.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602030443.124743-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102300,"url":"https://patchwork.plctlab.org/api/1.2/patches/102300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602055617.63608-1-lidie@eswincomputing.com/","msgid":"<20230602055617.63608-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T05:56:17","name":"RISC-V: Remove unnecessary md pattern for TARGET_XTHEADCONDMOV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602055617.63608-1-lidie@eswincomputing.com/mbox/"},{"id":102317,"url":"https://patchwork.plctlab.org/api/1.2/patches/102317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602063140.29401-1-juzhe.zhong@rivai.ai/","msgid":"<20230602063140.29401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T06:31:40","name":"RISC-V: Optimize reverse series index vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602063140.29401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102334,"url":"https://patchwork.plctlab.org/api/1.2/patches/102334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602070726.3807539-1-yanzhang.wang@intel.com/","msgid":"<20230602070726.3807539-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-02T07:07:26","name":"RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602070726.3807539-1-yanzhang.wang@intel.com/mbox/"},{"id":102342,"url":"https://patchwork.plctlab.org/api/1.2/patches/102342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602073559.2690527-1-apinski@marvell.com/","msgid":"<20230602073559.2690527-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-02T07:35:59","name":"rtl-optimization: [PR102733] DSE removing address which only differ by address space.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602073559.2690527-1-apinski@marvell.com/mbox/"},{"id":102376,"url":"https://patchwork.plctlab.org/api/1.2/patches/102376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55462f69-84b8-6efb-b98e-399390928420@gjlay.de/","msgid":"<55462f69-84b8-6efb-b98e-399390928420@gjlay.de>","list_archive_url":null,"date":"2023-06-02T08:46:41","name":"Fix PR101188 wrong code from postreload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55462f69-84b8-6efb-b98e-399390928420@gjlay.de/mbox/"},{"id":102412,"url":"https://patchwork.plctlab.org/api/1.2/patches/102412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602093333.19552-1-juzhe.zhong@rivai.ai/","msgid":"<20230602093333.19552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-02T09:33:33","name":"[V2] RISC-V: Fix warning in predicated.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602093333.19552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102426,"url":"https://patchwork.plctlab.org/api/1.2/patches/102426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y868a4b.fsf@euler.schwinge.homeip.net/","msgid":"<875y868a4b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-02T09:52:04","name":"Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y868a4b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":102427,"url":"https://patchwork.plctlab.org/api/1.2/patches/102427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com/","msgid":"<9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com>","list_archive_url":null,"date":"2023-06-02T09:53:59","name":"[PR110086] avr: Fix ICE on optimize attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com/mbox/"},{"id":102473,"url":"https://patchwork.plctlab.org/api/1.2/patches/102473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-1-gaofei@eswincomputing.com/","msgid":"<20230602104247.26454-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T10:42:46","name":"[1/2,RISC-V] fix cfi issue in save-restore.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-1-gaofei@eswincomputing.com/mbox/"},{"id":102474,"url":"https://patchwork.plctlab.org/api/1.2/patches/102474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-2-gaofei@eswincomputing.com/","msgid":"<20230602104247.26454-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-02T10:42:47","name":"[2/2,V3,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602104247.26454-2-gaofei@eswincomputing.com/mbox/"},{"id":102502,"url":"https://patchwork.plctlab.org/api/1.2/patches/102502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfa51b3b-c7b9-197b-923c-aeb8eed903fe@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-06-02T11:38:04","name":"[avr,committed] Improve operations on non-LD_REGS when the operation follows a move from LD_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfa51b3b-c7b9-197b-923c-aeb8eed903fe@gjlay.de/mbox/"},{"id":102549,"url":"https://patchwork.plctlab.org/api/1.2/patches/102549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602132057.293160-1-lehua.ding@rivai.ai/","msgid":"<20230602132057.293160-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-02T13:20:57","name":"Add more ForEachMacros to clang-format file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602132057.293160-1-lehua.ding@rivai.ai/mbox/"},{"id":102559,"url":"https://patchwork.plctlab.org/api/1.2/patches/102559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133239.66945-1-dmalcolm@redhat.com/","msgid":"<20230602133239.66945-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-02T13:32:39","name":"[pushed] analyzer: regions in different memory spaces can'\''t alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133239.66945-1-dmalcolm@redhat.com/mbox/"},{"id":102561,"url":"https://patchwork.plctlab.org/api/1.2/patches/102561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133245.66990-1-dmalcolm@redhat.com/","msgid":"<20230602133245.66990-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-02T13:32:45","name":"[pushed] analyzer: implement various atomic builtins [PR109015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602133245.66990-1-dmalcolm@redhat.com/mbox/"},{"id":102575,"url":"https://patchwork.plctlab.org/api/1.2/patches/102575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com/","msgid":"<005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-02T14:17:19","name":"New wi::bitreverse function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005301d9955c$f1d6b410$d5841c30$@nextmovesoftware.com/mbox/"},{"id":102578,"url":"https://patchwork.plctlab.org/api/1.2/patches/102578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142920.1793173-1-ppalka@redhat.com/","msgid":"<20230602142920.1793173-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T14:29:20","name":"c++: is_specialization_of_friend confusion [PR109923]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142920.1793173-1-ppalka@redhat.com/mbox/"},{"id":102579,"url":"https://patchwork.plctlab.org/api/1.2/patches/102579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142928.1793231-1-ppalka@redhat.com/","msgid":"<20230602142928.1793231-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T14:29:27","name":"c++: simplify TEMPLATE_TEMPLATE_PARM hashing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602142928.1793231-1-ppalka@redhat.com/mbox/"},{"id":102582,"url":"https://patchwork.plctlab.org/api/1.2/patches/102582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUNB1N9TtJrtJmagXi+y7QbVbc1HRV0B=eC200jiFR+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T14:50:51","name":"[COMMITTED] reg-stack: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUNB1N9TtJrtJmagXi+y7QbVbc1HRV0B=eC200jiFR+A@mail.gmail.com/mbox/"},{"id":102592,"url":"https://patchwork.plctlab.org/api/1.2/patches/102592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602151534.2132668-1-ppalka@redhat.com/","msgid":"<20230602151534.2132668-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:15:34","name":"c++: replace in_template_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602151534.2132668-1-ppalka@redhat.com/mbox/"},{"id":102596,"url":"https://patchwork.plctlab.org/api/1.2/patches/102596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-2-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:41","name":"[01/12,contrib] validate_failures.py: Avoid testsuite aliasing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102601,"url":"https://patchwork.plctlab.org/api/1.2/patches/102601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-3-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-3-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:42","name":"[02/12,contrib] validate_failures.py: Support expiry attributes in manifests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-3-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102600,"url":"https://patchwork.plctlab.org/api/1.2/patches/102600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-4-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-4-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:43","name":"[03/12,contrib] validate_failures.py: Read in manifest when comparing build dirs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-4-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102598,"url":"https://patchwork.plctlab.org/api/1.2/patches/102598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-5-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-5-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:44","name":"[04/12,contrib] validate_failures.py: Simplify GetManifestPath()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-5-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102603,"url":"https://patchwork.plctlab.org/api/1.2/patches/102603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-6-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-6-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:45","name":"[05/12,contrib] validate_failures.py: Add more verbosity levels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-6-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102602,"url":"https://patchwork.plctlab.org/api/1.2/patches/102602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-7-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-7-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:46","name":"[06/12,contrib] validate_failures.py: Be more stringent in parsing result lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-7-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102604,"url":"https://patchwork.plctlab.org/api/1.2/patches/102604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-8-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-8-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:47","name":"[07/12,contrib] validate_failures.py: Use exit code \"2\" to indicate regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-8-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102607,"url":"https://patchwork.plctlab.org/api/1.2/patches/102607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-9-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-9-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:48","name":"[08/12,contrib] validate_failures.py: Support \"$tool:\" prefix in exp names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-9-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102605,"url":"https://patchwork.plctlab.org/api/1.2/patches/102605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-10-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-10-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:49","name":"[09/12,contrib] validate_failures.py: Improve error output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-10-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102599,"url":"https://patchwork.plctlab.org/api/1.2/patches/102599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-11-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-11-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:50","name":"[10/12,contrib] validate_failures.py: Add new option --invert_match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-11-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102606,"url":"https://patchwork.plctlab.org/api/1.2/patches/102606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-12-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-12-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:51","name":"[11/12,contrib] validate_failures.py: Add \"--expiry_date YYYYMMDD\" option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-12-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102608,"url":"https://patchwork.plctlab.org/api/1.2/patches/102608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-13-maxim.kuvyrkov@linaro.org/","msgid":"<20230602152052.1874860-13-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-06-02T15:20:52","name":"[12/12,contrib] validate_failures.py: Ignore stray filesystem paths in results","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602152052.1874860-13-maxim.kuvyrkov@linaro.org/mbox/"},{"id":102628,"url":"https://patchwork.plctlab.org/api/1.2/patches/102628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LO4P265MB5914451ED93CD4B7617714A0804EA@LO4P265MB5914.GBRP265.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-06-02T15:44:48","name":"libstdc++: Do not assume existence of char8_t codecvt facet","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LO4P265MB5914451ED93CD4B7617714A0804EA@LO4P265MB5914.GBRP265.PROD.OUTLOOK.COM/mbox/"},{"id":102629,"url":"https://patchwork.plctlab.org/api/1.2/patches/102629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155349.1775177-1-jason@redhat.com/","msgid":"<20230602155349.1775177-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:53:49","name":"[pushed] c++: fix explicit/copy problem [PR109247]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155349.1775177-1-jason@redhat.com/mbox/"},{"id":102630,"url":"https://patchwork.plctlab.org/api/1.2/patches/102630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155519.2300026-1-ppalka@redhat.com/","msgid":"<20230602155519.2300026-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-02T15:55:19","name":"c++: bad '\''this'\'' conversion for nullary memfn [PR106760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602155519.2300026-1-ppalka@redhat.com/mbox/"},{"id":102633,"url":"https://patchwork.plctlab.org/api/1.2/patches/102633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZHoSxwZsh98WrBSU@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T16:03:19","name":"[committed] btf: Fix -Wformat errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZHoSxwZsh98WrBSU@arm.com/mbox/"},{"id":102654,"url":"https://patchwork.plctlab.org/api/1.2/patches/102654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602163513.6196-1-david.faust@oracle.com/","msgid":"<20230602163513.6196-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-06-02T16:35:13","name":"[committed] btf: fix bootstrap -Wformat errors [PR110073]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602163513.6196-1-david.faust@oracle.com/mbox/"},{"id":102659,"url":"https://patchwork.plctlab.org/api/1.2/patches/102659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898223DE66773176183922A9834EA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-02T17:28:10","name":"libatomic: Enable lock-free 128-bit atomics on AArch64 [PR110061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898223DE66773176183922A9834EA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":102660,"url":"https://patchwork.plctlab.org/api/1.2/patches/102660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-53104170-fe2e-4a0d-b0a0-4e2819ba1e90-1685729154070@3c-app-gmx-bs08/","msgid":"","list_archive_url":null,"date":"2023-06-02T18:05:54","name":"[committed] Fortran: fix diagnostics for SELECT RANK [PR100607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-53104170-fe2e-4a0d-b0a0-4e2819ba1e90-1685729154070@3c-app-gmx-bs08/mbox/"},{"id":102677,"url":"https://patchwork.plctlab.org/api/1.2/patches/102677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602191153.78156-1-iain@sandoe.co.uk/","msgid":"<20230602191153.78156-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-02T19:11:53","name":"[pushed] Darwin, PPC: Fix struct layout with pragma pack [PR110044].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230602191153.78156-1-iain@sandoe.co.uk/mbox/"},{"id":102807,"url":"https://patchwork.plctlab.org/api/1.2/patches/102807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6428a06-f728-06a9-a530-36aa115291dc@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-03T09:55:17","name":"xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6428a06-f728-06a9-a530-36aa115291dc@yahoo.co.jp/mbox/"},{"id":102837,"url":"https://patchwork.plctlab.org/api/1.2/patches/102837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603112532.3264658-1-xry111@xry111.site/","msgid":"<20230603112532.3264658-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-06-03T11:25:32","name":"libatomic: x86_64: Always try ifunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603112532.3264658-1-xry111@xry111.site/mbox/"},{"id":102840,"url":"https://patchwork.plctlab.org/api/1.2/patches/102840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603143713.3029159-1-pan2.li@intel.com/","msgid":"<20230603143713.3029159-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-03T14:37:13","name":"RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230603143713.3029159-1-pan2.li@intel.com/mbox/"},{"id":102863,"url":"https://patchwork.plctlab.org/api/1.2/patches/102863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/035801d99641$43215980$c9640c80$@nextmovesoftware.com/","msgid":"<035801d99641$43215980$c9640c80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-03T17:31:40","name":"[x86_64] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/035801d99641$43215980$c9640c80$@nextmovesoftware.com/mbox/"},{"id":102924,"url":"https://patchwork.plctlab.org/api/1.2/patches/102924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d701d9966d$16552220$42ff6660$@nextmovesoftware.com/","msgid":"<00d701d9966d$16552220$42ff6660$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-03T22:45:23","name":"[x86] Add support for stc, clc and cmc instructions in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d701d9966d$16552220$42ff6660$@nextmovesoftware.com/mbox/"},{"id":102925,"url":"https://patchwork.plctlab.org/api/1.2/patches/102925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb2b819e-5cf4-e71f-2cb3-b05046f18de8@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-03T22:52:16","name":"xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb2b819e-5cf4-e71f-2cb3-b05046f18de8@yahoo.co.jp/mbox/"},{"id":102964,"url":"https://patchwork.plctlab.org/api/1.2/patches/102964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604071928.1681889-1-pan2.li@intel.com/","msgid":"<20230604071928.1681889-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-04T07:19:28","name":"RISC-V: Support RVV FP16 ZVFHMIN intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604071928.1681889-1-pan2.li@intel.com/mbox/"},{"id":102969,"url":"https://patchwork.plctlab.org/api/1.2/patches/102969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604085147.3989859-1-juzhe.zhong@rivai.ai/","msgid":"<20230604085147.3989859-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T08:51:47","name":"RISC-V: Remove redundant vlmul_ext_* patterns to fix PR110109","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604085147.3989859-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102970,"url":"https://patchwork.plctlab.org/api/1.2/patches/102970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604091112.3999325-1-juzhe.zhong@rivai.ai/","msgid":"<20230604091112.3999325-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:11:12","name":"[NFC] RISC-V: Reorganize riscv-v.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604091112.3999325-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102975,"url":"https://patchwork.plctlab.org/api/1.2/patches/102975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604092503.4009600-1-juzhe.zhong@rivai.ai/","msgid":"<20230604092503.4009600-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:25:03","name":"RISC-V: Split arguments of expand_vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604092503.4009600-1-juzhe.zhong@rivai.ai/mbox/"},{"id":102976,"url":"https://patchwork.plctlab.org/api/1.2/patches/102976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604093647.4018890-1-juzhe.zhong@rivai.ai/","msgid":"<20230604093647.4018890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-04T09:36:47","name":"[NFC] RISC-V: Move optimization patterns into autovec-opt.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230604093647.4018890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103038,"url":"https://patchwork.plctlab.org/api/1.2/patches/103038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16a85e3-45a8-4c82-61ab-9adad2daf537@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-04T17:42:58","name":"[committed] Convert H8 port to LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16a85e3-45a8-4c82-61ab-9adad2daf537@gmail.com/mbox/"},{"id":103046,"url":"https://patchwork.plctlab.org/api/1.2/patches/103046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4d5b600-2e21-3fea-17f8-4c2764880409@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-04T21:41:06","name":"[RFA] Improve strcmp expansion when one input is a constant string.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4d5b600-2e21-3fea-17f8-4c2764880409@gmail.com/mbox/"},{"id":103053,"url":"https://patchwork.plctlab.org/api/1.2/patches/103053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605012635.2292889-1-hongtao.liu@intel.com/","msgid":"<20230605012635.2292889-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-05T01:26:35","name":"[x86] Add missing vec_pack/unpacks patterns for _Float16 <-> int/float conversion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605012635.2292889-1-hongtao.liu@intel.com/mbox/"},{"id":103057,"url":"https://patchwork.plctlab.org/api/1.2/patches/103057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605015017.2559720-1-yunqiang.su@cipunited.com/","msgid":"<20230605015017.2559720-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-06-05T01:50:17","name":"MAINTAINERS: move Matthew Fortune to Write After Approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605015017.2559720-1-yunqiang.su@cipunited.com/mbox/"},{"id":103061,"url":"https://patchwork.plctlab.org/api/1.2/patches/103061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605035741.613909-1-juzhe.zhong@rivai.ai/","msgid":"<20230605035741.613909-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-05T03:57:41","name":"[V2] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605035741.613909-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103081,"url":"https://patchwork.plctlab.org/api/1.2/patches/103081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605044112.2861212-1-apinski@marvell.com/","msgid":"<20230605044112.2861212-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T04:41:12","name":"Fix PR 110085: `make clean` in GCC directory on sh target causes a failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605044112.2861212-1-apinski@marvell.com/mbox/"},{"id":103086,"url":"https://patchwork.plctlab.org/api/1.2/patches/103086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-1-apinski@marvell.com/","msgid":"<20230605055331.2864335-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T05:53:30","name":"[1/2] Improve do_store_flag for single bit when there is no non-zero bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-1-apinski@marvell.com/mbox/"},{"id":103087,"url":"https://patchwork.plctlab.org/api/1.2/patches/103087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-2-apinski@marvell.com/","msgid":"<20230605055331.2864335-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-05T05:53:31","name":"[2/2] Handle const_int in expand_single_bit_test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605055331.2864335-2-apinski@marvell.com/mbox/"},{"id":103092,"url":"https://patchwork.plctlab.org/api/1.2/patches/103092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605060757.22344-1-gaofei@eswincomputing.com/","msgid":"<20230605060757.22344-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-05T06:07:57","name":"[RISC-V] add TC for save-restore cfi directives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605060757.22344-1-gaofei@eswincomputing.com/mbox/"},{"id":103097,"url":"https://patchwork.plctlab.org/api/1.2/patches/103097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com/","msgid":"<5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-06-05T06:41:42","name":"rs6000: Remove duplicate expression [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a8be692-5779-1b9a-e387-073da84fbebe@linux.vnet.ibm.com/mbox/"},{"id":103098,"url":"https://patchwork.plctlab.org/api/1.2/patches/103098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605065058.1037581-1-pan2.li@intel.com/","msgid":"<20230605065058.1037581-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T06:50:58","name":"[v1] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605065058.1037581-1-pan2.li@intel.com/mbox/"},{"id":103194,"url":"https://patchwork.plctlab.org/api/1.2/patches/103194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbc8c369-79af-ca70-646d-4b156b4c2df1@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-05T07:30:55","name":"[v2] xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dbc8c369-79af-ca70-646d-4b156b4c2df1@yahoo.co.jp/mbox/"},{"id":103180,"url":"https://patchwork.plctlab.org/api/1.2/patches/103180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605081822.24328-1-xuli1@eswincomputing.com/","msgid":"<20230605081822.24328-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-05T08:18:22","name":"RISC-V: Fix '\''REQUIREMENT'\'' for machine_mode '\''MODE'\'' in vector-iterators.md.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605081822.24328-1-xuli1@eswincomputing.com/mbox/"},{"id":103182,"url":"https://patchwork.plctlab.org/api/1.2/patches/103182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605082043.1707158-1-pan2.li@intel.com/","msgid":"<20230605082043.1707158-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T08:20:43","name":"[v2] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605082043.1707158-1-pan2.li@intel.com/mbox/"},{"id":103199,"url":"https://patchwork.plctlab.org/api/1.2/patches/103199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605103018.729941-1-juzhe.zhong@rivai.ai/","msgid":"<20230605103018.729941-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-05T10:30:18","name":"[V3] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605103018.729941-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103202,"url":"https://patchwork.plctlab.org/api/1.2/patches/103202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2798293836398E27+2023060518584925668867@rivai.ai/","msgid":"<2798293836398E27+2023060518584925668867@rivai.ai>","list_archive_url":null,"date":"2023-06-05T10:58:50","name":"??????: Re: [PATCH V3] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2798293836398E27+2023060518584925668867@rivai.ai/mbox/"},{"id":103219,"url":"https://patchwork.plctlab.org/api/1.2/patches/103219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz2aqezb.fsf@euler.schwinge.homeip.net/","msgid":"<87cz2aqezb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-05T12:18:48","name":"Add '\''libgomp.{,oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz2aqezb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":103222,"url":"https://patchwork.plctlab.org/api/1.2/patches/103222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rcyqeoh.fsf@euler.schwinge.homeip.net/","msgid":"<878rcyqeoh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-05T12:25:18","name":"driver: Forward '\''-lgfortran'\'', '\''-lm'\'' to offloading compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rcyqeoh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":103303,"url":"https://patchwork.plctlab.org/api/1.2/patches/103303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnV8p_Qs0AZhBYKzUy+inMGCH6hE3ZfVnp1Q3o+ZoC_ng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T14:37:37","name":"libiberty: writeargv: Simplify function error mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnV8p_Qs0AZhBYKzUy+inMGCH6hE3ZfVnp1Q3o+ZoC_ng@mail.gmail.com/mbox/"},{"id":103312,"url":"https://patchwork.plctlab.org/api/1.2/patches/103312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605144952.2546564-1-pan2.li@intel.com/","msgid":"<20230605144952.2546564-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T14:49:52","name":"[v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605144952.2546564-1-pan2.li@intel.com/mbox/"},{"id":103318,"url":"https://patchwork.plctlab.org/api/1.2/patches/103318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605150753.2583349-1-pan2.li@intel.com/","msgid":"<20230605150753.2583349-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-05T15:07:53","name":"[v1] RISC-V: Fix some typo in vector-iterators.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605150753.2583349-1-pan2.li@intel.com/mbox/"},{"id":103334,"url":"https://patchwork.plctlab.org/api/1.2/patches/103334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/B81FAA88-C26E-49BC-8938-B9A226B33C30@oracle.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:12:53","name":"Ping: Fwd: [V9][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/B81FAA88-C26E-49BC-8938-B9A226B33C30@oracle.com/mbox/"},{"id":103364,"url":"https://patchwork.plctlab.org/api/1.2/patches/103364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-cRfW8N=MUkt1Gmy17_+gmc0X0VyOSVQ5P-p9emWLYQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:36:25","name":"[COMMITTED] reginfo: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a-cRfW8N=MUkt1Gmy17_+gmc0X0VyOSVQ5P-p9emWLYQ@mail.gmail.com/mbox/"},{"id":103365,"url":"https://patchwork.plctlab.org/api/1.2/patches/103365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUSFhUj49VTu5ghyf8jVZeWtgt3-gQJhGXLx5xb8sKeA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-05T15:38:43","name":"[COMMITTED] print-rtl: Change return type of two print functions from int to void","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bUSFhUj49VTu5ghyf8jVZeWtgt3-gQJhGXLx5xb8sKeA@mail.gmail.com/mbox/"},{"id":103397,"url":"https://patchwork.plctlab.org/api/1.2/patches/103397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605165531.1009946-1-ibuclaw@gdcproject.org/","msgid":"<20230605165531.1009946-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-05T16:55:31","name":"[committed] d: Warn when declared size of a special enum does not match its intrinsic type.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605165531.1009946-1-ibuclaw@gdcproject.org/mbox/"},{"id":103502,"url":"https://patchwork.plctlab.org/api/1.2/patches/103502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605212639.204780-1-ppalka@redhat.com/","msgid":"<20230605212639.204780-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-05T21:26:39","name":"c++: extend lookup_template_class shortcut [PR110122]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230605212639.204780-1-ppalka@redhat.com/mbox/"},{"id":103528,"url":"https://patchwork.plctlab.org/api/1.2/patches/103528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606015723.12297-1-gaofei@eswincomputing.com/","msgid":"<20230606015723.12297-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-06T01:57:23","name":"[RISC-V] correct machine mode in save-restore cfi RTL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606015723.12297-1-gaofei@eswincomputing.com/mbox/"},{"id":103536,"url":"https://patchwork.plctlab.org/api/1.2/patches/103536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606024851.D7E7920441@pchp3.se.axis.com/","msgid":"<20230606024851.D7E7920441@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-06T02:48:51","name":"[committed] bootstrap rtl-checking: Fix XVEC vs XVECEXP in postreload.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606024851.D7E7920441@pchp3.se.axis.com/mbox/"},{"id":103548,"url":"https://patchwork.plctlab.org/api/1.2/patches/103548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606041635.226494-1-juzhe.zhong@rivai.ai/","msgid":"<20230606041635.226494-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T04:16:35","name":"RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606041635.226494-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103555,"url":"https://patchwork.plctlab.org/api/1.2/patches/103555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-1-hongtao.liu@intel.com/","msgid":"<20230606043121.24843-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T04:31:20","name":"Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-1-hongtao.liu@intel.com/mbox/"},{"id":103554,"url":"https://patchwork.plctlab.org/api/1.2/patches/103554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-2-hongtao.liu@intel.com/","msgid":"<20230606043121.24843-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T04:31:21","name":"Don'\''t fold _mm{, 256}_blendv_epi8 into (mask < 0 ? src1 : src2) when -funsigned-char.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606043121.24843-2-hongtao.liu@intel.com/mbox/"},{"id":103556,"url":"https://patchwork.plctlab.org/api/1.2/patches/103556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-1-dimitar@dinux.eu/","msgid":"<20230606045130.1687824-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-06-06T04:51:29","name":"riscv: Fix insn cost calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-1-dimitar@dinux.eu/mbox/"},{"id":103557,"url":"https://patchwork.plctlab.org/api/1.2/patches/103557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-2-dimitar@dinux.eu/","msgid":"<20230606045130.1687824-2-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-06-06T04:51:30","name":"riscv: Fix scope for memory model calculation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606045130.1687824-2-dimitar@dinux.eu/mbox/"},{"id":103586,"url":"https://patchwork.plctlab.org/api/1.2/patches/103586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606065225.845953-1-jie.mei@oss.cipunited.com/","msgid":"<20230606065225.845953-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-06T06:53:36","name":"[v3] MIPS16: Implement `code_readable` function attribute.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606065225.845953-1-jie.mei@oss.cipunited.com/mbox/"},{"id":103595,"url":"https://patchwork.plctlab.org/api/1.2/patches/103595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072151.63CA83857019@sourceware.org/","msgid":"<20230606072151.63CA83857019@sourceware.org>","list_archive_url":null,"date":"2023-06-06T07:21:06","name":"middle-end/110055 - avoid CLOBBERing static variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072151.63CA83857019@sourceware.org/mbox/"},{"id":103598,"url":"https://patchwork.plctlab.org/api/1.2/patches/103598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072215.B9A05385700C@sourceware.org/","msgid":"<20230606072215.B9A05385700C@sourceware.org>","list_archive_url":null,"date":"2023-06-06T07:21:31","name":"tree-optimization/109143 - improve PTA compile time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606072215.B9A05385700C@sourceware.org/mbox/"},{"id":103627,"url":"https://patchwork.plctlab.org/api/1.2/patches/103627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606082150.657119-1-hongtao.liu@intel.com/","msgid":"<20230606082150.657119-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T08:21:50","name":"[v2] Explicitly view_convert_expr mask to signed type when folding pblendvb builtins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606082150.657119-1-hongtao.liu@intel.com/mbox/"},{"id":103637,"url":"https://patchwork.plctlab.org/api/1.2/patches/103637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606083549.658280-1-hongtao.liu@intel.com/","msgid":"<20230606083549.658280-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-06T08:35:49","name":"[1/2] Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606083549.658280-1-hongtao.liu@intel.com/mbox/"},{"id":103680,"url":"https://patchwork.plctlab.org/api/1.2/patches/103680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com/","msgid":"<124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com>","list_archive_url":null,"date":"2023-06-06T09:19:24","name":"rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com/mbox/"},{"id":103681,"url":"https://patchwork.plctlab.org/api/1.2/patches/103681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2a1af32-3384-dc65-825f-7374b1ec29ef@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T09:20:08","name":"rs6000: Don'\''t use TFmode for 128 bits fp constant in toc [PR110011]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2a1af32-3384-dc65-825f-7374b1ec29ef@linux.ibm.com/mbox/"},{"id":103695,"url":"https://patchwork.plctlab.org/api/1.2/patches/103695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qioapgh.fsf@oldenburg3.str.redhat.com/","msgid":"<871qioapgh.fsf@oldenburg3.str.redhat.com>","list_archive_url":null,"date":"2023-06-06T09:51:26","name":"libgcc: Fix eh_frame fast path in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qioapgh.fsf@oldenburg3.str.redhat.com/mbox/"},{"id":103696,"url":"https://patchwork.plctlab.org/api/1.2/patches/103696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095321.24585-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606095321.24585-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T09:53:21","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095321.24585-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103698,"url":"https://patchwork.plctlab.org/api/1.2/patches/103698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095847.171835-1-juzhe.zhong@rivai.ai/","msgid":"<20230606095847.171835-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T09:58:47","name":"RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606095847.171835-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103736,"url":"https://patchwork.plctlab.org/api/1.2/patches/103736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606113833.857327-1-jwakely@redhat.com/","msgid":"<20230606113833.857327-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T11:38:33","name":"[committed] libstdc++: Use close-on-exec for file descriptors in filesystem::copy_file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606113833.857327-1-jwakely@redhat.com/mbox/"},{"id":103741,"url":"https://patchwork.plctlab.org/api/1.2/patches/103741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114608.868760-1-jwakely@redhat.com/","msgid":"<20230606114608.868760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T11:46:08","name":"[committed] libstdc++: Fix ambiguous expression in std::array::front() [PR110139]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114608.868760-1-jwakely@redhat.com/mbox/"},{"id":103738,"url":"https://patchwork.plctlab.org/api/1.2/patches/103738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-1-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:30","name":"[V2] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103740,"url":"https://patchwork.plctlab.org/api/1.2/patches/103740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-2-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-2-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:31","name":"RISC-V: Enable SELECT_VL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-2-juzhe.zhong@rivai.ai/mbox/"},{"id":103739,"url":"https://patchwork.plctlab.org/api/1.2/patches/103739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-3-juzhe.zhong@rivai.ai/","msgid":"<20230606114632.1629751-3-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:46:32","name":"RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114632.1629751-3-juzhe.zhong@rivai.ai/mbox/"},{"id":103742,"url":"https://patchwork.plctlab.org/api/1.2/patches/103742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114803.1630479-1-juzhe.zhong@rivai.ai/","msgid":"<20230606114803.1630479-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T11:48:03","name":"[V3] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114803.1630479-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103744,"url":"https://patchwork.plctlab.org/api/1.2/patches/103744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114858.447221-1-vultkayn@gcc.gnu.org/","msgid":"<20230606114858.447221-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-06T11:48:58","name":"analyzer: Standalone OOB-warning [PR109437, PR109439]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606114858.447221-1-vultkayn@gcc.gnu.org/mbox/"},{"id":103749,"url":"https://patchwork.plctlab.org/api/1.2/patches/103749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606120433.1633720-1-juzhe.zhong@rivai.ai/","msgid":"<20230606120433.1633720-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-06T12:04:33","name":"[V4] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606120433.1633720-1-juzhe.zhong@rivai.ai/mbox/"},{"id":103773,"url":"https://patchwork.plctlab.org/api/1.2/patches/103773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5732205.e9J7NaK4W3@minbar/","msgid":"<5732205.e9J7NaK4W3@minbar>","list_archive_url":null,"date":"2023-06-06T12:23:37","name":"[committed] libstdc++: Protect against macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5732205.e9J7NaK4W3@minbar/mbox/"},{"id":103775,"url":"https://patchwork.plctlab.org/api/1.2/patches/103775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13130881.nUPlyArG6x@minbar/","msgid":"<13130881.nUPlyArG6x@minbar>","list_archive_url":null,"date":"2023-06-06T12:25:51","name":"libstdc++: Replace use of incorrect non-temporal store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13130881.nUPlyArG6x@minbar/mbox/"},{"id":103778,"url":"https://patchwork.plctlab.org/api/1.2/patches/103778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6348100.iIbC2pHGDl@minbar/","msgid":"<6348100.iIbC2pHGDl@minbar>","list_archive_url":null,"date":"2023-06-06T12:29:16","name":"libstdc++: Avoid vector casts while still avoiding PR90424","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6348100.iIbC2pHGDl@minbar/mbox/"},{"id":103781,"url":"https://patchwork.plctlab.org/api/1.2/patches/103781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606123646.1553843-1-pan2.li@intel.com/","msgid":"<20230606123646.1553843-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-06T12:36:46","name":"[v1] RISC-V: Refactor ZVFHMIN to separated iterator and pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606123646.1553843-1-pan2.li@intel.com/mbox/"},{"id":103830,"url":"https://patchwork.plctlab.org/api/1.2/patches/103830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606134153.1592417-1-ibuclaw@gdcproject.org/","msgid":"<20230606134153.1592417-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-06T13:41:53","name":"[GCC,12,committed] d: Merge upstream dmd 316b89f1e3, phobos 8e8aaae50.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606134153.1592417-1-ibuclaw@gdcproject.org/mbox/"},{"id":103832,"url":"https://patchwork.plctlab.org/api/1.2/patches/103832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org/","msgid":"<8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-06-06T13:48:31","name":"[1/2] rs6000: genfusion: Rewrite load/compare code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8092d8e9d8880dc4cd7e3a7e420a7c998597ca69.1686058670.git.segher@kernel.crashing.org/mbox/"},{"id":103833,"url":"https://patchwork.plctlab.org/api/1.2/patches/103833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org/","msgid":"<0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org>","list_archive_url":null,"date":"2023-06-06T13:48:32","name":"[2/2] rs6000: genfusion: Delete dead code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ab8b1088f469460879a558d0c6dec81aaa0dc1f.1686058670.git.segher@kernel.crashing.org/mbox/"},{"id":103848,"url":"https://patchwork.plctlab.org/api/1.2/patches/103848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4608206.VLH7GnMWUR@minbar/","msgid":"<4608206.VLH7GnMWUR@minbar>","list_archive_url":null,"date":"2023-06-06T14:13:52","name":"libstdc++: Rewrite or avoid casts to 64-bit element types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4608206.VLH7GnMWUR@minbar/mbox/"},{"id":103862,"url":"https://patchwork.plctlab.org/api/1.2/patches/103862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606143446.50118-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606143446.50118-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T14:34:46","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606143446.50118-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103896,"url":"https://patchwork.plctlab.org/api/1.2/patches/103896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com/","msgid":"<3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com>","list_archive_url":null,"date":"2023-06-06T14:55:50","name":"[committed] Re: [PATCHv2] openmp: Add support for '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f692209-a6c2-331a-4219-688791b2ba6e@codesourcery.com/mbox/"},{"id":103915,"url":"https://patchwork.plctlab.org/api/1.2/patches/103915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com/","msgid":"<3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com>","list_archive_url":null,"date":"2023-06-06T15:10:37","name":"[OpenACC,2.7] Implement host_data must have use_device clause requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3be2222f-48ae-12a1-a83b-415360e0a506@siemens.com/mbox/"},{"id":103917,"url":"https://patchwork.plctlab.org/api/1.2/patches/103917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b7a229-0ec8-5404-fea2-4612ffb73bf2@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T15:11:55","name":"[OpenACC,2.7] Implement default clause support for data constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b7a229-0ec8-5404-fea2-4612ffb73bf2@siemens.com/mbox/"},{"id":103929,"url":"https://patchwork.plctlab.org/api/1.2/patches/103929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606151706.53910-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230606151706.53910-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-06T15:17:06","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606151706.53910-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":103934,"url":"https://patchwork.plctlab.org/api/1.2/patches/103934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606153258.1988789-1-pan2.li@intel.com/","msgid":"<20230606153258.1988789-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-06T15:32:58","name":"[v2] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606153258.1988789-1-pan2.li@intel.com/mbox/"},{"id":103936,"url":"https://patchwork.plctlab.org/api/1.2/patches/103936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0429eff-7eb9-8380-3ae6-e0695b0ab6d8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T15:33:32","name":"libgomp: plugin-gcn - support '\''unified_address'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0429eff-7eb9-8380-3ae6-e0695b0ab6d8@codesourcery.com/mbox/"},{"id":103960,"url":"https://patchwork.plctlab.org/api/1.2/patches/103960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155931.1241991-1-jwakely@redhat.com/","msgid":"<20230606155931.1241991-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T15:59:31","name":"[committed] libstdc++: Make std::numeric_limits<__float128> more portable [PR104772]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155931.1241991-1-jwakely@redhat.com/mbox/"},{"id":103961,"url":"https://patchwork.plctlab.org/api/1.2/patches/103961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155947.1242056-1-jwakely@redhat.com/","msgid":"<20230606155947.1242056-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-06T15:59:47","name":"[committed] libstdc++: Update list of known symbol versions for abi-check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606155947.1242056-1-jwakely@redhat.com/mbox/"},{"id":103997,"url":"https://patchwork.plctlab.org/api/1.2/patches/103997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRwe_anb9ozkoKh0nWXKC86w-O76u9G+ruSuvjEPUU+g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T17:22:57","name":"[COMMITTED] reload1: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRwe_anb9ozkoKh0nWXKC86w-O76u9G+ruSuvjEPUU+g@mail.gmail.com/mbox/"},{"id":104030,"url":"https://patchwork.plctlab.org/api/1.2/patches/104030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606182953.815966-1-ppalka@redhat.com/","msgid":"<20230606182953.815966-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-06T18:29:53","name":"c++: unsynthesized defaulted constexpr fn [PR110122]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606182953.815966-1-ppalka@redhat.com/mbox/"},{"id":104095,"url":"https://patchwork.plctlab.org/api/1.2/patches/104095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0f752a624ec9d69b9549d0192105318b5d3c641.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-06T19:54:04","name":"[ver,2] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0f752a624ec9d69b9549d0192105318b5d3c641.camel@us.ibm.com/mbox/"},{"id":104108,"url":"https://patchwork.plctlab.org/api/1.2/patches/104108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-2-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:22","name":"[v6,1/4] libcpp: reject codepoints above 0x10FFFF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-2-ben.boeckel@kitware.com/mbox/"},{"id":104110,"url":"https://patchwork.plctlab.org/api/1.2/patches/104110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-3-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:23","name":"[v6,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-3-ben.boeckel@kitware.com/mbox/"},{"id":104109,"url":"https://patchwork.plctlab.org/api/1.2/patches/104109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-5-ben.boeckel@kitware.com/","msgid":"<20230606205025.3164738-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-06T20:50:25","name":"[v6,4/4] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606205025.3164738-5-ben.boeckel@kitware.com/mbox/"},{"id":104112,"url":"https://patchwork.plctlab.org/api/1.2/patches/104112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606210710.2992237-1-apinski@marvell.com/","msgid":"<20230606210710.2992237-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-06T21:07:10","name":"For the `-A CMP -B -> B CMP A` pattern allow EQ/NE for all integer types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606210710.2992237-1-apinski@marvell.com/mbox/"},{"id":104116,"url":"https://patchwork.plctlab.org/api/1.2/patches/104116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+k9Qum+98u1vML@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-06T21:28:21","name":"modula2: Fix bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+k9Qum+98u1vML@tucnak/mbox/"},{"id":104117,"url":"https://patchwork.plctlab.org/api/1.2/patches/104117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606213315.2993028-1-apinski@marvell.com/","msgid":"<20230606213315.2993028-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-06T21:33:15","name":"[COMMITTED/13] Fix PR 110085: `make clean` in GCC directory on sh target causes a failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230606213315.2993028-1-apinski@marvell.com/mbox/"},{"id":104118,"url":"https://patchwork.plctlab.org/api/1.2/patches/104118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+oL657y6sfy08/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-06T21:42:07","name":"middle-end, i386: Pattern recognize add/subtract with carry [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZH+oL657y6sfy08/@tucnak/mbox/"},{"id":104122,"url":"https://patchwork.plctlab.org/api/1.2/patches/104122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/030901d998c6$ac062250$041266f0$@nextmovesoftware.com/","msgid":"<030901d998c6$ac062250$041266f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-06T22:31:42","name":"[x86_64] PR target/110104: Missing peephole2 for addcarry.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/030901d998c6$ac062250$041266f0$@nextmovesoftware.com/mbox/"},{"id":104135,"url":"https://patchwork.plctlab.org/api/1.2/patches/104135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com/","msgid":"<037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-06T23:05:40","name":"[x86] PR target/31985: Improve memory operand use with doubleword add.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/037101d998cb$6aa8f120$3ffad360$@nextmovesoftware.com/mbox/"},{"id":104159,"url":"https://patchwork.plctlab.org/api/1.2/patches/104159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-1-apinski@marvell.com/","msgid":"<20230607001706.3000011-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T00:17:05","name":"[1/2] Match: zero_one_valued_p should match 0 constants too","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-1-apinski@marvell.com/mbox/"},{"id":104160,"url":"https://patchwork.plctlab.org/api/1.2/patches/104160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-2-apinski@marvell.com/","msgid":"<20230607001706.3000011-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T00:17:06","name":"[2/2] Add match patterns for `a ? onezero : onezero` where one of the two operands are constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607001706.3000011-2-apinski@marvell.com/mbox/"},{"id":104171,"url":"https://patchwork.plctlab.org/api/1.2/patches/104171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607012956.2770169-1-jason@redhat.com/","msgid":"<20230607012956.2770169-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:29:56","name":"[pushed] c++: add NRV testcase [PR58050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607012956.2770169-1-jason@redhat.com/mbox/"},{"id":104172,"url":"https://patchwork.plctlab.org/api/1.2/patches/104172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013028.2770448-1-jason@redhat.com/","msgid":"<20230607013028.2770448-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:30:28","name":"[pushed] c++: fix contracts with NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013028.2770448-1-jason@redhat.com/mbox/"},{"id":104173,"url":"https://patchwork.plctlab.org/api/1.2/patches/104173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013053.2770663-1-jason@redhat.com/","msgid":"<20230607013053.2770663-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:30:53","name":"[pushed] c++: fix throwing cleanup with label","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013053.2770663-1-jason@redhat.com/mbox/"},{"id":104176,"url":"https://patchwork.plctlab.org/api/1.2/patches/104176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013116.2770869-1-jason@redhat.com/","msgid":"<20230607013116.2770869-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:31:16","name":"[pushed] c++: NRV and goto [PR92407]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013116.2770869-1-jason@redhat.com/mbox/"},{"id":104174,"url":"https://patchwork.plctlab.org/api/1.2/patches/104174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013214.2771266-1-jason@redhat.com/","msgid":"<20230607013214.2771266-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:32:14","name":"[pushed] c++: enable NRVO from inner block [PR51571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013214.2771266-1-jason@redhat.com/mbox/"},{"id":104175,"url":"https://patchwork.plctlab.org/api/1.2/patches/104175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013303.2771541-1-jason@redhat.com/","msgid":"<20230607013303.2771541-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T01:33:03","name":"[pushed] c++: Add -Wnrvo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607013303.2771541-1-jason@redhat.com/mbox/"},{"id":104192,"url":"https://patchwork.plctlab.org/api/1.2/patches/104192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607021908.615905-1-pan2.li@intel.com/","msgid":"<20230607021908.615905-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T02:19:08","name":"RISC-V: Fix ICE when include riscv_vector.h with rv64gcv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607021908.615905-1-pan2.li@intel.com/mbox/"},{"id":104198,"url":"https://patchwork.plctlab.org/api/1.2/patches/104198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607023147.1602812-1-chenglulu@loongson.cn/","msgid":"<20230607023147.1602812-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-07T02:31:47","name":"LoongArch: Change jumptable'\''s register constraint to '\''q'\'' [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607023147.1602812-1-chenglulu@loongson.cn/mbox/"},{"id":104208,"url":"https://patchwork.plctlab.org/api/1.2/patches/104208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607030038.896932-1-pan2.li@intel.com/","msgid":"<20230607030038.896932-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T03:00:38","name":"[v3] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607030038.896932-1-pan2.li@intel.com/mbox/"},{"id":104213,"url":"https://patchwork.plctlab.org/api/1.2/patches/104213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607031915.115114-1-juzhe.zhong@rivai.ai/","msgid":"<20230607031915.115114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-07T03:19:15","name":"[V2] RISC-V: Support RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607031915.115114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104223,"url":"https://patchwork.plctlab.org/api/1.2/patches/104223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607040409.2409-1-chenxl04200420@163.com/","msgid":"<20230607040409.2409-1-chenxl04200420@163.com>","list_archive_url":null,"date":"2023-06-07T04:04:09","name":"[v1] LoongArch:Change the default value of LARCH_CALL_RATIO to 6 on the LoongArch architecture.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607040409.2409-1-chenxl04200420@163.com/mbox/"},{"id":104243,"url":"https://patchwork.plctlab.org/api/1.2/patches/104243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com/","msgid":"<68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-06-07T05:44:02","name":"rs6000: Remove redundant initialization [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68bebda0-481b-e609-620e-985e8ac89e59@linux.vnet.ibm.com/mbox/"},{"id":104248,"url":"https://patchwork.plctlab.org/api/1.2/patches/104248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-2-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:12","name":"[1/4,V4,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-2-gaofei@eswincomputing.com/mbox/"},{"id":104247,"url":"https://patchwork.plctlab.org/api/1.2/patches/104247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-3-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:13","name":"[2/4,RISC-V] support cm.popretz in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-3-gaofei@eswincomputing.com/mbox/"},{"id":104250,"url":"https://patchwork.plctlab.org/api/1.2/patches/104250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-4-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:14","name":"[3/4,RISC-V] resolve confilct between zcmp multi push/pop and shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-4-gaofei@eswincomputing.com/mbox/"},{"id":104249,"url":"https://patchwork.plctlab.org/api/1.2/patches/104249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-5-gaofei@eswincomputing.com/","msgid":"<20230607055215.29332-5-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-07T05:52:15","name":"[4/4,RISC-V] support cm.mva01s cm.mvsa01 in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607055215.29332-5-gaofei@eswincomputing.com/mbox/"},{"id":104258,"url":"https://patchwork.plctlab.org/api/1.2/patches/104258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce4f071b-48a4-424b-3be8-9fb645cf2615@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T06:17:27","name":"Add parentheses to clarify precedence between operators [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce4f071b-48a4-424b-3be8-9fb645cf2615@linux.vnet.ibm.com/mbox/"},{"id":104277,"url":"https://patchwork.plctlab.org/api/1.2/patches/104277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607065256.1539150-1-pan2.li@intel.com/","msgid":"<20230607065256.1539150-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T06:52:56","name":"RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607065256.1539150-1-pan2.li@intel.com/mbox/"},{"id":104279,"url":"https://patchwork.plctlab.org/api/1.2/patches/104279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kvpwxo.fsf@euler.schwinge.homeip.net/","msgid":"<87y1kvpwxo.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T07:13:07","name":"Support '\''UNSUPPORTED: [...]: exception handling disabled'\'' for libstdc++ testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kvpwxo.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104317,"url":"https://patchwork.plctlab.org/api/1.2/patches/104317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607074909.3541-1-chenxl04200420@163.com/","msgid":"<20230607074909.3541-1-chenxl04200420@163.com>","list_archive_url":null,"date":"2023-06-07T07:49:09","name":"[v2] LoongArch:Change the default value of LARCH_CALL_RATIO to 6 on the LoongArch architecture.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607074909.3541-1-chenxl04200420@163.com/mbox/"},{"id":104323,"url":"https://patchwork.plctlab.org/api/1.2/patches/104323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607080606.2104805-1-pan2.li@intel.com/","msgid":"<20230607080606.2104805-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-07T08:06:06","name":"[v5] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607080606.2104805-1-pan2.li@intel.com/mbox/"},{"id":104326,"url":"https://patchwork.plctlab.org/api/1.2/patches/104326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlegv3d35.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-07T08:12:46","name":"[testsuite] bump some tsvc timeouts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlegv3d35.fsf@lxoliva.fsfla.org/mbox/"},{"id":104338,"url":"https://patchwork.plctlab.org/api/1.2/patches/104338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607082111.2773414-1-guojiufu@linux.ibm.com/","msgid":"<20230607082111.2773414-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-07T08:21:11","name":"[V2] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607082111.2773414-1-guojiufu@linux.ibm.com/mbox/"},{"id":104344,"url":"https://patchwork.plctlab.org/api/1.2/patches/104344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de/","msgid":"<5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de>","list_archive_url":null,"date":"2023-06-07T08:41:00","name":"[avr] : Improve bit-extractions as of PR109907.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5829e492-0f43-138a-6e50-e3115a4abbf1@gjlay.de/mbox/"},{"id":104385,"url":"https://patchwork.plctlab.org/api/1.2/patches/104385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCmgsL7dv7-NyLKc=vTNVsVSajuaccHZugnEn9Y1VbMHDA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T10:21:42","name":"libiberty: pex-unix.c: Make pex_unix_cleanup signature always match body.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCmgsL7dv7-NyLKc=vTNVsVSajuaccHZugnEn9Y1VbMHDA@mail.gmail.com/mbox/"},{"id":104387,"url":"https://patchwork.plctlab.org/api/1.2/patches/104387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da977e26-f462-c0ec-e054-2cb415ad2493@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T10:25:26","name":"[3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da977e26-f462-c0ec-e054-2cb415ad2493@linux.ibm.com/mbox/"},{"id":104444,"url":"https://patchwork.plctlab.org/api/1.2/patches/104444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a30067cf-e261-211c-d6c9-7a10c99c3ee8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T11:26:48","name":"[committed] testsuite/libgomp.*/target-present-*.{c, f90}: Improve and fix (was: Re: [og12] Fix '\''libgomp.{c-c++-common, fortran}/target-present-*'\'' test cases)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a30067cf-e261-211c-d6c9-7a10c99c3ee8@codesourcery.com/mbox/"},{"id":104485,"url":"https://patchwork.plctlab.org/api/1.2/patches/104485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607124701.2367809-1-juzhe.zhong@rivai.ai/","msgid":"<20230607124701.2367809-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-07T12:47:01","name":"[V4] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607124701.2367809-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104506,"url":"https://patchwork.plctlab.org/api/1.2/patches/104506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-2-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-2-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:39","name":"[v2,1/3] RISC-V: Minimal support for ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-2-jiawei@iscas.ac.cn/mbox/"},{"id":104507,"url":"https://patchwork.plctlab.org/api/1.2/patches/104507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-3-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-3-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:40","name":"[v2,2/3] RISC-V: Enable compressible features when use ZC* extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-3-jiawei@iscas.ac.cn/mbox/"},{"id":104508,"url":"https://patchwork.plctlab.org/api/1.2/patches/104508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-4-jiawei@iscas.ac.cn/","msgid":"<20230607125641.727633-4-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-07T12:56:41","name":"[v2,3/3] RISC-V: Add ZC* test for failed march args being passed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607125641.727633-4-jiawei@iscas.ac.cn/mbox/"},{"id":104515,"url":"https://patchwork.plctlab.org/api/1.2/patches/104515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607131749.82794-1-rzinsly@ventanamicro.com/","msgid":"<20230607131749.82794-1-rzinsly@ventanamicro.com>","list_archive_url":null,"date":"2023-06-07T13:17:49","name":"RISC-V: Add Veyron V1 pipeline description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607131749.82794-1-rzinsly@ventanamicro.com/mbox/"},{"id":104524,"url":"https://patchwork.plctlab.org/api/1.2/patches/104524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNeDsPTd0lCn0m@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:00:24","name":"[1/3] aarch64: Fix whitespace in ls64 builtin implementation [PR110100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNeDsPTd0lCn0m@arm.com/mbox/"},{"id":104523,"url":"https://patchwork.plctlab.org/api/1.2/patches/104523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNkadMGxK9Aq1X@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:00:49","name":"[2/3] aarch64: Fix wrong code with st64b builtin [PR110100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNkadMGxK9Aq1X@arm.com/mbox/"},{"id":104525,"url":"https://patchwork.plctlab.org/api/1.2/patches/104525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNq/vZLi2HYeKM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:01:15","name":"[3/3] aarch64: Allow compiler to define ls64 builtins [PR110132]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZICNq/vZLi2HYeKM@arm.com/mbox/"},{"id":104534,"url":"https://patchwork.plctlab.org/api/1.2/patches/104534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a95a55-9f4d-1333-bc74-ddfd348ea0c3@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T14:20:41","name":"vect: Don'\''t pass subtype to vect_widened_op_tree where not needed [PR 110142]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1a95a55-9f4d-1333-bc74-ddfd348ea0c3@arm.com/mbox/"},{"id":104548,"url":"https://patchwork.plctlab.org/api/1.2/patches/104548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com/","msgid":"<7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com>","list_archive_url":null,"date":"2023-06-07T14:48:57","name":"[committed] Fix expected test output on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7415ccdc-7e47-d295-b33b-26dff4091ef3@gmail.com/mbox/"},{"id":104552,"url":"https://patchwork.plctlab.org/api/1.2/patches/104552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg5b727b.fsf@euler.schwinge.homeip.net/","msgid":"<87zg5b727b.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T14:54:16","name":"Remove '\''gcc/testsuite/g++.dg/warn/Wfree-nonheap-object.s'\'' (was: [PATCH] add -Wmismatched-new-delete to middle end (PR 90629))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg5b727b.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104560,"url":"https://patchwork.plctlab.org/api/1.2/patches/104560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn0f71uq.fsf@euler.schwinge.homeip.net/","msgid":"<87wn0f71uq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-07T15:01:49","name":"Tighten '\''dg-warning'\'' alternatives in '\''c-c++-common/Wfree-nonheap-object{,-2,-3}.c'\'' (was: [PATCH] correct -Wmismatched-new-delete (PR 98160, 98166))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn0f71uq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":104593,"url":"https://patchwork.plctlab.org/api/1.2/patches/104593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155314.1369707-1-jwakely@redhat.com/","msgid":"<20230607155314.1369707-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:14","name":"[committed] libstdc++: Fix some tests that fail with -fexcess-precision=standard","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155314.1369707-1-jwakely@redhat.com/mbox/"},{"id":104597,"url":"https://patchwork.plctlab.org/api/1.2/patches/104597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155320.1369738-1-jwakely@redhat.com/","msgid":"<20230607155320.1369738-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:20","name":"[committed] libstdc++: Fix some tests that fail with -fno-exceptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155320.1369738-1-jwakely@redhat.com/mbox/"},{"id":104598,"url":"https://patchwork.plctlab.org/api/1.2/patches/104598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155333.1369759-1-jwakely@redhat.com/","msgid":"<20230607155333.1369759-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-07T15:53:33","name":"[committed] libstdc++: Restore accidentally removed version in abi-check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607155333.1369759-1-jwakely@redhat.com/mbox/"},{"id":104608,"url":"https://patchwork.plctlab.org/api/1.2/patches/104608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKOzc=DcdTNpTFO2MZeRiMSOhZZTJ2zKvq0+SDjZvwCyg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:10:48","name":"[fortran] PR87477 - (associate) - [meta-bug] [F03] issues concerning the ASSOCIATE statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKOzc=DcdTNpTFO2MZeRiMSOhZZTJ2zKvq0+SDjZvwCyg@mail.gmail.com/mbox/"},{"id":104628,"url":"https://patchwork.plctlab.org/api/1.2/patches/104628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC1glXyzhmt7ZQz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:51:14","name":"i386: Fix endless recursion in ix86_expand_vector_init_general with MMX [PR110152]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC1glXyzhmt7ZQz@tucnak/mbox/"},{"id":104630,"url":"https://patchwork.plctlab.org/api/1.2/patches/104630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC3TReXs9CBKEbz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T16:58:53","name":"optabs: Implement double-word ctz and ffs expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC3TReXs9CBKEbz@tucnak/mbox/"},{"id":104634,"url":"https://patchwork.plctlab.org/api/1.2/patches/104634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC7kEwyILqqnOht@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-07T17:17:04","name":"libstdc++: Fix up 20_util/to_chars/double.cc test for excess precision [PR110145]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIC7kEwyILqqnOht@tucnak/mbox/"},{"id":104708,"url":"https://patchwork.plctlab.org/api/1.2/patches/104708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607212806.3052446-1-apinski@marvell.com/","msgid":"<20230607212806.3052446-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:28:06","name":"MATCH: Fix comment for `(zero_one ==/!= 0) ? y : z y` patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607212806.3052446-1-apinski@marvell.com/mbox/"},{"id":104712,"url":"https://patchwork.plctlab.org/api/1.2/patches/104712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-1-apinski@marvell.com/","msgid":"<20230607213217.3052696-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:15","name":"[1/3] MATCH: Allow unsigned types for `X & -Y -> X * Y` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-1-apinski@marvell.com/mbox/"},{"id":104713,"url":"https://patchwork.plctlab.org/api/1.2/patches/104713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-2-apinski@marvell.com/","msgid":"<20230607213217.3052696-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:16","name":"[2/3] Change the `zero_one ==/!= 0) ? y : z y` patterns to use multiply rather than `(-zero_one) & z`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-2-apinski@marvell.com/mbox/"},{"id":104714,"url":"https://patchwork.plctlab.org/api/1.2/patches/104714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-3-apinski@marvell.com/","msgid":"<20230607213217.3052696-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-07T21:32:17","name":"[3/3] Add Plus to the op list of `(zero_one == 0) ? y : z y` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607213217.3052696-3-apinski@marvell.com/mbox/"},{"id":104741,"url":"https://patchwork.plctlab.org/api/1.2/patches/104741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607220615.2981121-1-jason@redhat.com/","msgid":"<20230607220615.2981121-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-07T22:06:15","name":"[pushed] c++: allow NRV and non-NRV returns [PR58487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230607220615.2981121-1-jason@redhat.com/mbox/"},{"id":104772,"url":"https://patchwork.plctlab.org/api/1.2/patches/104772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com/","msgid":"<009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-07T22:54:37","name":"[Committed] Bug fix to new wi::bitreverse_large function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009d01d99993$0a433840$1ec9a8c0$@nextmovesoftware.com/mbox/"},{"id":104774,"url":"https://patchwork.plctlab.org/api/1.2/patches/104774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com/","msgid":"<00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-07T23:09:00","name":"[nvptx] Update nvptx'\''s bitrev2 pattern to use BITREVERSE rtx.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com/mbox/"},{"id":104789,"url":"https://patchwork.plctlab.org/api/1.2/patches/104789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-2-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:44","name":"[1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-2-guojiufu@linux.ibm.com/mbox/"},{"id":104792,"url":"https://patchwork.plctlab.org/api/1.2/patches/104792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-3-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:45","name":"[2/4] rs6000: build constant via lis;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-3-guojiufu@linux.ibm.com/mbox/"},{"id":104791,"url":"https://patchwork.plctlab.org/api/1.2/patches/104791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-4-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-4-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:46","name":"[3/4] rs6000: build constant via li/lis;rldicl/rldicr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-4-guojiufu@linux.ibm.com/mbox/"},{"id":104790,"url":"https://patchwork.plctlab.org/api/1.2/patches/104790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-5-guojiufu@linux.ibm.com/","msgid":"<20230608015547.3432691-5-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-08T01:55:47","name":"[4/4] rs6000: build constant via li/lis;rldic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608015547.3432691-5-guojiufu@linux.ibm.com/mbox/"},{"id":104794,"url":"https://patchwork.plctlab.org/api/1.2/patches/104794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608020541.2548506-1-juzhe.zhong@rivai.ai/","msgid":"<20230608020541.2548506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-08T02:05:41","name":"[V5] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608020541.2548506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":104800,"url":"https://patchwork.plctlab.org/api/1.2/patches/104800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608022721.1226263-1-chenglulu@loongson.cn/","msgid":"<20230608022721.1226263-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-08T02:27:22","name":"[v2] LoongArch: Modify the register constraints for template \"jumptable\" and \"indirect_jump\" from \"r\" to \"e\" [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608022721.1226263-1-chenglulu@loongson.cn/mbox/"},{"id":104823,"url":"https://patchwork.plctlab.org/api/1.2/patches/104823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608052034.1731084-1-pan2.li@intel.com/","msgid":"<20230608052034.1731084-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T05:20:34","name":"[v6] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608052034.1731084-1-pan2.li@intel.com/mbox/"},{"id":104827,"url":"https://patchwork.plctlab.org/api/1.2/patches/104827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608060635.2226754-1-pan2.li@intel.com/","msgid":"<20230608060635.2226754-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T06:06:35","name":"[v7] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608060635.2226754-1-pan2.li@intel.com/mbox/"},{"id":104830,"url":"https://patchwork.plctlab.org/api/1.2/patches/104830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608062954.2513718-1-pan2.li@intel.com/","msgid":"<20230608062954.2513718-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T06:29:54","name":"[v8] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608062954.2513718-1-pan2.li@intel.com/mbox/"},{"id":104861,"url":"https://patchwork.plctlab.org/api/1.2/patches/104861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608075211.2940017-1-pan2.li@intel.com/","msgid":"<20230608075211.2940017-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-08T07:52:11","name":"[v2] RISC-V: Add more test cases for RVV FP16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608075211.2940017-1-pan2.li@intel.com/mbox/"},{"id":104891,"url":"https://patchwork.plctlab.org/api/1.2/patches/104891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608093048.1677718-1-vultkayn@gcc.gnu.org/","msgid":"<20230608093048.1677718-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-08T09:30:50","name":"[COMMITTED] analyzer: Standalone OOB-warning, formatting fixed [PR109437, PR109439]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608093048.1677718-1-vultkayn@gcc.gnu.org/mbox/"},{"id":104902,"url":"https://patchwork.plctlab.org/api/1.2/patches/104902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/VI1PR08MB53254381C1ACCE759C338488FF50A@VI1PR08MB5325.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T10:00:57","name":"[GCC,AArch64] convert some patterns to new MD syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/VI1PR08MB53254381C1ACCE759C338488FF50A@VI1PR08MB5325.eurprd08.prod.outlook.com/mbox/"},{"id":104916,"url":"https://patchwork.plctlab.org/api/1.2/patches/104916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103103.23794-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230608103103.23794-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-08T10:31:03","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103103.23794-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":104920,"url":"https://patchwork.plctlab.org/api/1.2/patches/104920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103833.25420-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230608103833.25420-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-08T10:38:33","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608103833.25420-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":104932,"url":"https://patchwork.plctlab.org/api/1.2/patches/104932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIG2PaKQvzGAfbd2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T11:06:37","name":"[RFC] c++: Accept elaborated-enum-base in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIG2PaKQvzGAfbd2@arm.com/mbox/"},{"id":104935,"url":"https://patchwork.plctlab.org/api/1.2/patches/104935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608112351.207461-1-lehua.ding@rivai.ai/","msgid":"<20230608112351.207461-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-08T11:23:51","name":"testsuite: fix the condition bug in tsvc s176","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608112351.207461-1-lehua.ding@rivai.ai/mbox/"},{"id":104998,"url":"https://patchwork.plctlab.org/api/1.2/patches/104998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or35322f6d.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-08T14:37:30","name":"fix frange_nextafter odr violation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or35322f6d.fsf@lxoliva.fsfla.org/mbox/"},{"id":105006,"url":"https://patchwork.plctlab.org/api/1.2/patches/105006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com/","msgid":"<17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-08T15:21:42","name":"[ver,3] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17c1050e60ae7946dc041dd8c3d56c585259dcb9.camel@us.ibm.com/mbox/"},{"id":105077,"url":"https://patchwork.plctlab.org/api/1.2/patches/105077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608175709.462490-1-polacek@redhat.com/","msgid":"<20230608175709.462490-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-08T17:57:09","name":"doc: Clarification for -Wmissing-field-initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230608175709.462490-1-polacek@redhat.com/mbox/"},{"id":105084,"url":"https://patchwork.plctlab.org/api/1.2/patches/105084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbd39e11-cf04-87f5-627b-9b526bde87ec@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:26","name":"[COMMITTED,1/4] Fix floating point bug in fold_range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbd39e11-cf04-87f5-627b-9b526bde87ec@redhat.com/mbox/"},{"id":105085,"url":"https://patchwork.plctlab.org/api/1.2/patches/105085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4fbb34c-a042-6704-a615-a75f5a32df6c@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:41","name":"[COMMITTED,2/4] - Remove tree_code from range-operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4fbb34c-a042-6704-a615-a75f5a32df6c@redhat.com/mbox/"},{"id":105087,"url":"https://patchwork.plctlab.org/api/1.2/patches/105087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ecb5c5-7daf-fa25-6ec5-beb79bb4e67b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:57:50","name":"[COMMITTED,3/4] Unify range_operators to one class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ecb5c5-7daf-fa25-6ec5-beb79bb4e67b@redhat.com/mbox/"},{"id":105086,"url":"https://patchwork.plctlab.org/api/1.2/patches/105086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b191c018-04be-dbd8-0e68-b96d9fcc3889@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-08T18:58:01","name":"[COMMITTED,4/4] Provide a new dispatch mechanism for range-ops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b191c018-04be-dbd8-0e68-b96d9fcc3889@redhat.com/mbox/"},{"id":105212,"url":"https://patchwork.plctlab.org/api/1.2/patches/105212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609014701.3123763-1-apinski@marvell.com/","msgid":"<20230609014701.3123763-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-09T01:47:01","name":"MATCH: Fix zero_one_valued_p not to match signed 1 bit integers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609014701.3123763-1-apinski@marvell.com/mbox/"},{"id":105280,"url":"https://patchwork.plctlab.org/api/1.2/patches/105280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609055948.1744603-1-pan2.li@intel.com/","msgid":"<20230609055948.1744603-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T05:59:48","name":"[v9] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609055948.1744603-1-pan2.li@intel.com/mbox/"},{"id":105284,"url":"https://patchwork.plctlab.org/api/1.2/patches/105284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609060117.4083144-1-yanzhang.wang@intel.com/","msgid":"<20230609060117.4083144-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-09T06:01:17","name":"[v4] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609060117.4083144-1-yanzhang.wang@intel.com/mbox/"},{"id":105297,"url":"https://patchwork.plctlab.org/api/1.2/patches/105297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609070709.2087327-1-pan2.li@intel.com/","msgid":"<20230609070709.2087327-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T07:07:09","name":"[v10] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609070709.2087327-1-pan2.li@intel.com/mbox/"},{"id":105316,"url":"https://patchwork.plctlab.org/api/1.2/patches/105316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609073932.C782913A47@imap2.suse-dmz.suse.de/","msgid":"<20230609073932.C782913A47@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-09T07:39:32","name":"middle-end/110182 - TYPE_PRECISION on VECTOR_TYPE causes wrong-code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609073932.C782913A47@imap2.suse-dmz.suse.de/mbox/"},{"id":105317,"url":"https://patchwork.plctlab.org/api/1.2/patches/105317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609074005.2815F13A47@imap2.suse-dmz.suse.de/","msgid":"<20230609074005.2815F13A47@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-09T07:40:04","name":"Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609074005.2815F13A47@imap2.suse-dmz.suse.de/mbox/"},{"id":105328,"url":"https://patchwork.plctlab.org/api/1.2/patches/105328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609075301.2214833-1-pan2.li@intel.com/","msgid":"<20230609075301.2214833-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T07:53:01","name":"[v1] RISC-V: Fix one warning of frm enum.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609075301.2214833-1-pan2.li@intel.com/mbox/"},{"id":105355,"url":"https://patchwork.plctlab.org/api/1.2/patches/105355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZILdBQz6TcMnxNqC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-09T08:04:21","name":"[committed] fortran: Fix ICE on pr96024.f90 on big-endian hosts [PR96024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZILdBQz6TcMnxNqC@tucnak/mbox/"},{"id":105424,"url":"https://patchwork.plctlab.org/api/1.2/patches/105424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609083934.556871-1-juzhe.zhong@rivai.ai/","msgid":"<20230609083934.556871-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T08:39:34","name":"[V6] VECT: Add SELECT_VL support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609083934.556871-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105441,"url":"https://patchwork.plctlab.org/api/1.2/patches/105441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609085647.208295-1-jwakely@redhat.com/","msgid":"<20230609085647.208295-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T08:56:47","name":"[committed] libstdc++: Improve tests for emplace member of sequence containers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609085647.208295-1-jwakely@redhat.com/mbox/"},{"id":105520,"url":"https://patchwork.plctlab.org/api/1.2/patches/105520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609103251.335449-1-juzhe.zhong@rivai.ai/","msgid":"<20230609103251.335449-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T10:32:51","name":"RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609103251.335449-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105537,"url":"https://patchwork.plctlab.org/api/1.2/patches/105537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609104105.9100-1-juzhe.zhong@rivai.ai/","msgid":"<20230609104105.9100-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T10:41:05","name":"[V2] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609104105.9100-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105582,"url":"https://patchwork.plctlab.org/api/1.2/patches/105582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609120917.294304-1-jwakely@redhat.com/","msgid":"<20230609120917.294304-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:09:17","name":"[committed] libstdc++: Optimize std::to_array for trivial types [PR110167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609120917.294304-1-jwakely@redhat.com/mbox/"},{"id":105583,"url":"https://patchwork.plctlab.org/api/1.2/patches/105583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121025.294493-1-jwakely@redhat.com/","msgid":"<20230609121025.294493-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:10:25","name":"[committed] libstdc++: Fix P2510R3 \"Formatting pointers\" [PR110149]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121025.294493-1-jwakely@redhat.com/mbox/"},{"id":105585,"url":"https://patchwork.plctlab.org/api/1.2/patches/105585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121409.294772-1-jwakely@redhat.com/","msgid":"<20230609121409.294772-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:14:09","name":"[committed] libstdc++: Bump library version to libstdc++.so.6.0.33","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121409.294772-1-jwakely@redhat.com/mbox/"},{"id":105590,"url":"https://patchwork.plctlab.org/api/1.2/patches/105590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121900.307482-1-jwakely@redhat.com/","msgid":"<20230609121900.307482-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:19:00","name":"[committed] libstdc++: Add preprocessor checks to [PR100285]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609121900.307482-1-jwakely@redhat.com/mbox/"},{"id":105594,"url":"https://patchwork.plctlab.org/api/1.2/patches/105594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609122614.308487-1-jwakely@redhat.com/","msgid":"<20230609122614.308487-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-09T12:26:14","name":"[committed] libstdc++: Remove duplicate definition of _Float128 std::from_chars [PR110077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609122614.308487-1-jwakely@redhat.com/mbox/"},{"id":105676,"url":"https://patchwork.plctlab.org/api/1.2/patches/105676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609143241.115366-1-juzhe.zhong@rivai.ai/","msgid":"<20230609143241.115366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T14:32:41","name":"RISC-V: Fix V_WHOLE && V_FRACT iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609143241.115366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105700,"url":"https://patchwork.plctlab.org/api/1.2/patches/105700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609151909.3628123-1-ppalka@redhat.com/","msgid":"<20230609151909.3628123-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:19:09","name":"c++: diagnostic ICE b/c of empty TPARMS_PRIMARY_TEMPLATE [PR109655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609151909.3628123-1-ppalka@redhat.com/mbox/"},{"id":105708,"url":"https://patchwork.plctlab.org/api/1.2/patches/105708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609153943.3386685-1-jason@redhat.com/","msgid":"<20230609153943.3386685-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:39:43","name":"[pushed] c++: init-list of uncopyable type [PR110102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609153943.3386685-1-jason@redhat.com/mbox/"},{"id":105709,"url":"https://patchwork.plctlab.org/api/1.2/patches/105709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154103.3386960-1-jason@redhat.com/","msgid":"<20230609154103.3386960-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:41:03","name":"[pushed] c++: diagnose auto in template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154103.3386960-1-jason@redhat.com/mbox/"},{"id":105711,"url":"https://patchwork.plctlab.org/api/1.2/patches/105711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154126.3387346-1-jason@redhat.com/","msgid":"<20230609154126.3387346-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-09T15:41:26","name":"[pushed] c++: fix 32-bit spaceship failures [PR110185]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609154126.3387346-1-jason@redhat.com/mbox/"},{"id":105723,"url":"https://patchwork.plctlab.org/api/1.2/patches/105723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b79a4d10-ac52-0c5a-4ac2-9f86c7f6aed1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-09T16:37:40","name":"[COMMITTED] Relocate range_cast to header, and add a generic version.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b79a4d10-ac52-0c5a-4ac2-9f86c7f6aed1@redhat.com/mbox/"},{"id":105725,"url":"https://patchwork.plctlab.org/api/1.2/patches/105725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec52048f-b11b-3ac2-38ad-8a817de2f7f0@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-09T16:37:50","name":"[COMMITTED] PR ipa/109886 - Also check type being cast to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec52048f-b11b-3ac2-38ad-8a817de2f7f0@redhat.com/mbox/"},{"id":105742,"url":"https://patchwork.plctlab.org/api/1.2/patches/105742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609172753.3164342-1-apinski@marvell.com/","msgid":"<20230609172753.3164342-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-09T17:27:53","name":"MATCH: Fix zero_one_valued_p not to match signed 1 bit integers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609172753.3164342-1-apinski@marvell.com/mbox/"},{"id":105752,"url":"https://patchwork.plctlab.org/api/1.2/patches/105752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-1-mail@tim-lange.me/","msgid":"<20230609182813.72319-1-mail@tim-lange.me>","list_archive_url":null,"date":"2023-06-09T18:28:12","name":"[1/2] analyzer: Fix allocation size false positive on conjured svalue [PR109577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-1-mail@tim-lange.me/mbox/"},{"id":105753,"url":"https://patchwork.plctlab.org/api/1.2/patches/105753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-2-mail@tim-lange.me/","msgid":"<20230609182813.72319-2-mail@tim-lange.me>","list_archive_url":null,"date":"2023-06-09T18:28:13","name":"[2/2] testsuite: Add more allocation size tests for conjured svalues [PR110014]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609182813.72319-2-mail@tim-lange.me/mbox/"},{"id":105821,"url":"https://patchwork.plctlab.org/api/1.2/patches/105821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609220801.587289-1-dmalcolm@redhat.com/","msgid":"<20230609220801.587289-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-09T22:08:01","name":"[pushed] analyzer: add caching to globals with initializers [PR110112]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609220801.587289-1-dmalcolm@redhat.com/mbox/"},{"id":105834,"url":"https://patchwork.plctlab.org/api/1.2/patches/105834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609231143.1359411-1-juzhe.zhong@rivai.ai/","msgid":"<20230609231143.1359411-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-09T23:11:43","name":"[V3] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609231143.1359411-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105841,"url":"https://patchwork.plctlab.org/api/1.2/patches/105841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609235902.1270855-1-pan2.li@intel.com/","msgid":"<20230609235902.1270855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-09T23:59:02","name":"[v1] RISC-V: Add test cases for RVV FP16 vreinterpret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230609235902.1270855-1-pan2.li@intel.com/mbox/"},{"id":105844,"url":"https://patchwork.plctlab.org/api/1.2/patches/105844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4d04b74-c27a-0129-7466-e19b4afdbcce@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-10T00:33:44","name":"[COMMITTED,1/15] - Provide a unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4d04b74-c27a-0129-7466-e19b4afdbcce@redhat.com/mbox/"},{"id":105847,"url":"https://patchwork.plctlab.org/api/1.2/patches/105847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com/","msgid":"<567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:02","name":"[2/15] Unify EQ_EXPR range operator.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/567ecdbc-5607-82a4-e547-3d46367785f2@redhat.com/mbox/"},{"id":105845,"url":"https://patchwork.plctlab.org/api/1.2/patches/105845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e54d4610-9361-49c5-85a4-786b779a05b8@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-10T00:34:10","name":"[COMMITTED,3/15] Unify NE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e54d4610-9361-49c5-85a4-786b779a05b8@redhat.com/mbox/"},{"id":105846,"url":"https://patchwork.plctlab.org/api/1.2/patches/105846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com/","msgid":"<84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:21","name":"[COMMITTED,4/15] Unify LT_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84ed3426-9b27-e0e1-d20a-ad9ce8224e03@redhat.com/mbox/"},{"id":105851,"url":"https://patchwork.plctlab.org/api/1.2/patches/105851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2078a799-12da-356b-3802-4e8fdd09614e@redhat.com/","msgid":"<2078a799-12da-356b-3802-4e8fdd09614e@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:33","name":"[COMMITTED,5/15] Unify LE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2078a799-12da-356b-3802-4e8fdd09614e@redhat.com/mbox/"},{"id":105853,"url":"https://patchwork.plctlab.org/api/1.2/patches/105853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com/","msgid":"<2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:34:47","name":"[COMMITTED,6/15] Unify GT_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2d656c9e-010c-53c3-874e-5a409f7681a8@redhat.com/mbox/"},{"id":105850,"url":"https://patchwork.plctlab.org/api/1.2/patches/105850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com/","msgid":"<08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:01","name":"[COMMITTED,7/15] Unify GE_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fec1b6-91e9-e7bc-3122-9529ebf1f862@redhat.com/mbox/"},{"id":105848,"url":"https://patchwork.plctlab.org/api/1.2/patches/105848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com/","msgid":"<15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:26","name":"[COMMITTED,8/15] Unify Identity range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15aa449a-aa1f-10cd-783f-23295f77d4e2@redhat.com/mbox/"},{"id":105849,"url":"https://patchwork.plctlab.org/api/1.2/patches/105849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com/","msgid":"<4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:37","name":"[COMMITTED,9/15] Unify operator_cst range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4bd184ed-98b9-9c61-6a31-e7ae721b18ce@redhat.com/mbox/"},{"id":105852,"url":"https://patchwork.plctlab.org/api/1.2/patches/105852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com/","msgid":"<2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:35:51","name":"[COMMITTED,10/15] Unify operator_cast range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2afdd19f-b5a3-a7c5-b753-4a340c59ce32@redhat.com/mbox/"},{"id":105855,"url":"https://patchwork.plctlab.org/api/1.2/patches/105855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com/","msgid":"<37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com>","list_archive_url":null,"date":"2023-06-10T00:36:02","name":"[COMMITTED,11/15] Unify PLUS_EXPR range operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37091c54-e7b5-9f84-8b21-b4507f2723bb@redhat.com/mbox/"},{"id":105854,"url":"https://patchwork.plctlab.org/api/1.2/patches/105854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610003737.1679827-1-juzhe.zhong@rivai.ai/","msgid":"<20230610003737.1679827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-10T00:37:37","name":"RISC-V: Enable select_vl for RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610003737.1679827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":105890,"url":"https://patchwork.plctlab.org/api/1.2/patches/105890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610040528.1058420420@pchp3.se.axis.com/","msgid":"<20230610040528.1058420420@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-10T04:05:28","name":"(Re: Splitting up 27_io/basic_istream/ignore/wchar_t/94749.cc (takes too long))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230610040528.1058420420@pchp3.se.axis.com/mbox/"},{"id":105926,"url":"https://patchwork.plctlab.org/api/1.2/patches/105926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIRSdNvz+pbiUQLG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-10T10:37:40","name":"[RFC] Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIRSdNvz+pbiUQLG@tucnak/mbox/"},{"id":106019,"url":"https://patchwork.plctlab.org/api/1.2/patches/106019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org/","msgid":"<4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org>","list_archive_url":null,"date":"2023-06-10T21:28:42","name":"[c++] Implement DR 976","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af0dc0a-b06b-372c-f2c3-e58b2141e027@acm.org/mbox/"},{"id":106020,"url":"https://patchwork.plctlab.org/api/1.2/patches/106020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbdce7ef-037a-e677-f309-5125cf16e503@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-06-10T22:03:40","name":"libstdc++: Clarify manual demangle doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fbdce7ef-037a-e677-f309-5125cf16e503@jguk.org/mbox/"},{"id":106023,"url":"https://patchwork.plctlab.org/api/1.2/patches/106023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com/","msgid":"<03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-10T22:54:36","name":"[GCC,13] PR target/109973: CCZmode and CCCmode variants of [v]ptest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03bd01d99bee$888f3a70$99adaf50$@nextmovesoftware.com/mbox/"},{"id":106025,"url":"https://patchwork.plctlab.org/api/1.2/patches/106025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611003331.3518071-1-pan2.li@intel.com/","msgid":"<20230611003331.3518071-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-11T00:33:31","name":"[v1] RISC-V: Support RVV FP16 MISC vlmul ext intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611003331.3518071-1-pan2.li@intel.com/mbox/"},{"id":106037,"url":"https://patchwork.plctlab.org/api/1.2/patches/106037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-2-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:08","name":"[v4,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-2-kmatsui@cs.washington.edu/mbox/"},{"id":106038,"url":"https://patchwork.plctlab.org/api/1.2/patches/106038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-3-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:09","name":"[v4,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-3-kmatsui@cs.washington.edu/mbox/"},{"id":106039,"url":"https://patchwork.plctlab.org/api/1.2/patches/106039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-4-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:10","name":"[v4,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-4-kmatsui@cs.washington.edu/mbox/"},{"id":106041,"url":"https://patchwork.plctlab.org/api/1.2/patches/106041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-5-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:11","name":"[v4,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-5-kmatsui@cs.washington.edu/mbox/"},{"id":106040,"url":"https://patchwork.plctlab.org/api/1.2/patches/106040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-6-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:12","name":"[v4,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-6-kmatsui@cs.washington.edu/mbox/"},{"id":106042,"url":"https://patchwork.plctlab.org/api/1.2/patches/106042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-7-kmatsui@cs.washington.edu/","msgid":"<20230611024657.42846-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-11T02:43:13","name":"[v4,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611024657.42846-7-kmatsui@cs.washington.edu/mbox/"},{"id":106079,"url":"https://patchwork.plctlab.org/api/1.2/patches/106079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de/","msgid":"<8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de>","list_archive_url":null,"date":"2023-06-11T12:01:30","name":"[avr,committed] Tidy code for inverted bit insertions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7a741d-b1c1-54b6-f20e-a4e84ffb075b@gjlay.de/mbox/"},{"id":106126,"url":"https://patchwork.plctlab.org/api/1.2/patches/106126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com/","msgid":"<00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-11T16:15:14","name":"Avoid duplicate vector initializations during RTL expansion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00af01d99c7f$e8a7a1e0$b9f6e5a0$@nextmovesoftware.com/mbox/"},{"id":106162,"url":"https://patchwork.plctlab.org/api/1.2/patches/106162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611230755.70848-1-juzhe.zhong@rivai.ai/","msgid":"<20230611230755.70848-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-11T23:07:55","name":"VECT: Add LEN_MASK_ LOAD/STORE to support flow control for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230611230755.70848-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106172,"url":"https://patchwork.plctlab.org/api/1.2/patches/106172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGWvnynHB+8BEh1t_rtTMomEFdaZkaDCS3LU6fetkpF_HWuwbg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T01:18:28","name":"[AIX] Debugging does not require a stack frame.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGWvnynHB+8BEh1t_rtTMomEFdaZkaDCS3LU6fetkpF_HWuwbg@mail.gmail.com/mbox/"},{"id":106176,"url":"https://patchwork.plctlab.org/api/1.2/patches/106176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com/","msgid":"<083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T02:34:45","name":"[PATCHv2,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/083f9585-7c6b-8065-8d19-d4ab1bdb81ca@linux.ibm.com/mbox/"},{"id":106177,"url":"https://patchwork.plctlab.org/api/1.2/patches/106177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612024102.580504-1-juzhe.zhong@rivai.ai/","msgid":"<20230612024102.580504-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T02:41:02","name":"RISC-V: Add RVV narrow shift right lowering auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612024102.580504-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106179,"url":"https://patchwork.plctlab.org/api/1.2/patches/106179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612025721.3288649-1-pan2.li@intel.com/","msgid":"<20230612025721.3288649-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T02:57:21","name":"[v1] RISC-V: Add test cases for RVV FP16 undefined and vlmul trunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612025721.3288649-1-pan2.li@intel.com/mbox/"},{"id":106211,"url":"https://patchwork.plctlab.org/api/1.2/patches/106211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612041438.272885-1-juzhe.zhong@rivai.ai/","msgid":"<20230612041438.272885-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T04:14:38","name":"[V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow control for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612041438.272885-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106285,"url":"https://patchwork.plctlab.org/api/1.2/patches/106285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612074024.454116-1-pan2.li@intel.com/","msgid":"<20230612074024.454116-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T07:40:24","name":"[v1] RISC-V: Support RVV FP16 MISC vget/vset intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612074024.454116-1-pan2.li@intel.com/mbox/"},{"id":106293,"url":"https://patchwork.plctlab.org/api/1.2/patches/106293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612075737.1801-1-stefansf@linux.ibm.com/","msgid":"<20230612075737.1801-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T07:57:38","name":"combine: Narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612075737.1801-1-stefansf@linux.ibm.com/mbox/"},{"id":106296,"url":"https://patchwork.plctlab.org/api/1.2/patches/106296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612080828.1292728-1-yanzhang.wang@intel.com/","msgid":"<20230612080828.1292728-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-12T08:08:28","name":"[v5] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612080828.1292728-1-yanzhang.wang@intel.com/mbox/"},{"id":106317,"url":"https://patchwork.plctlab.org/api/1.2/patches/106317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612082756.27638-1-tejas.belagod@arm.com/","msgid":"<20230612082756.27638-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2023-06-12T08:27:56","name":"[v2,PR96339] Optimise svlast[ab]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612082756.27638-1-tejas.belagod@arm.com/mbox/"},{"id":106335,"url":"https://patchwork.plctlab.org/api/1.2/patches/106335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612085617.3908962-1-jason@redhat.com/","msgid":"<20230612085617.3908962-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-12T08:56:17","name":"[pushed] c++: build initializer_list in a loop [PR105838]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612085617.3908962-1-jason@redhat.com/mbox/"},{"id":106337,"url":"https://patchwork.plctlab.org/api/1.2/patches/106337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612090110.785CE138EC@imap2.suse-dmz.suse.de/","msgid":"<20230612090110.785CE138EC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-12T09:01:10","name":"middle-end/110200 - genmatch force-leaf and convert interaction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612090110.785CE138EC@imap2.suse-dmz.suse.de/mbox/"},{"id":106376,"url":"https://patchwork.plctlab.org/api/1.2/patches/106376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612093621.1223856-1-juzhe.zhong@rivai.ai/","msgid":"<20230612093621.1223856-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T09:36:21","name":"RISC-V: Add ZVFHMIN autovec block testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612093621.1223856-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106383,"url":"https://patchwork.plctlab.org/api/1.2/patches/106383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612094458.1230512-1-juzhe.zhong@rivai.ai/","msgid":"<20230612094458.1230512-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T09:44:58","name":"[V2] RISC-V: Add ZVFHMIN block autovec testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612094458.1230512-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106472,"url":"https://patchwork.plctlab.org/api/1.2/patches/106472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17379-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T10:20:00","name":"[committed] Regenerate config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17379-tamar@arm.com/mbox/"},{"id":106506,"url":"https://patchwork.plctlab.org/api/1.2/patches/106506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a09039c6-3535-c7c9-8755-acaaabc1278a@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T11:18:21","name":"rs6000: Change bitwise xor to inequality operator [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a09039c6-3535-c7c9-8755-acaaabc1278a@linux.vnet.ibm.com/mbox/"},{"id":106552,"url":"https://patchwork.plctlab.org/api/1.2/patches/106552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612121844.1412921-1-pan2.li@intel.com/","msgid":"<20230612121844.1412921-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-12T12:18:44","name":"[v1] RISC-V: Fix one potential test failure for RVV vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612121844.1412921-1-pan2.li@intel.com/mbox/"},{"id":106571,"url":"https://patchwork.plctlab.org/api/1.2/patches/106571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17381-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T12:53:26","name":"Remove DEFAULT_MATCHPD_PARTITIONS macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17381-tamar@arm.com/mbox/"},{"id":106586,"url":"https://patchwork.plctlab.org/api/1.2/patches/106586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131903.2C776138EC@imap2.suse-dmz.suse.de/","msgid":"<20230612131903.2C776138EC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-12T13:19:02","name":"Fix disambiguation against .MASK_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131903.2C776138EC@imap2.suse-dmz.suse.de/mbox/"},{"id":106587,"url":"https://patchwork.plctlab.org/api/1.2/patches/106587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131919.269681-1-guojiufu@linux.ibm.com/","msgid":"<20230612131919.269681-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-12T13:19:19","name":"rs6000: replace '\''(const_int 0)'\'' to '\''unspec:BLK [(const_int 0)]'\'' for stack_tie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612131919.269681-1-guojiufu@linux.ibm.com/mbox/"},{"id":106589,"url":"https://patchwork.plctlab.org/api/1.2/patches/106589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612132901.1727002-1-juzhe.zhong@rivai.ai/","msgid":"<20230612132901.1727002-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T13:29:01","name":"RISC-V: Enhance RVV VLA SLP auto-vectorization with decompress operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612132901.1727002-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106602,"url":"https://patchwork.plctlab.org/api/1.2/patches/106602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d99d36$a38111c0$ea833540$@nextmovesoftware.com/","msgid":"<001001d99d36$a38111c0$ea833540$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-12T14:03:16","name":"New finish_compare_by_pieces target hook (for x86).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001001d99d36$a38111c0$ea833540$@nextmovesoftware.com/mbox/"},{"id":106662,"url":"https://patchwork.plctlab.org/api/1.2/patches/106662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd153fb-4e70-a772-14b1-730490e35611@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T14:55:43","name":"RISC-V: Implement vec_set and vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fcd153fb-4e70-a772-14b1-730490e35611@gmail.com/mbox/"},{"id":106663,"url":"https://patchwork.plctlab.org/api/1.2/patches/106663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com/","msgid":"<2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com>","list_archive_url":null,"date":"2023-06-12T15:04:16","name":"RISC-V: Add sign-extending variants for vmv.x.s.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2698bc05-7a93-6617-2a5c-b209f343ce83@gmail.com/mbox/"},{"id":106664,"url":"https://patchwork.plctlab.org/api/1.2/patches/106664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612151107.13373-1-juzhe.zhong@rivai.ai/","msgid":"<20230612151107.13373-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-12T15:11:07","name":"[V2] RISC-V: Enhance RVV VLA SLP auto-vectorization with decompress operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612151107.13373-1-juzhe.zhong@rivai.ai/mbox/"},{"id":106679,"url":"https://patchwork.plctlab.org/api/1.2/patches/106679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com/","msgid":"<0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:07","name":"[COMMITTED,1/17] Move operator_addr_expr to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0994e73e-bd28-2542-df1e-dd285931bbf7@redhat.com/mbox/"},{"id":106681,"url":"https://patchwork.plctlab.org/api/1.2/patches/106681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com/","msgid":"<8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:12","name":"[COMMITTED,2/17] - Move operator_bitwise_not to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e5fb19b-9df3-6acb-4f18-08514ee9ef96@redhat.com/mbox/"},{"id":106682,"url":"https://patchwork.plctlab.org/api/1.2/patches/106682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com/","msgid":"<0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:17","name":"[COMMITTED,3/17] - Move operator_bitwise_xor to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b9acc83-57b2-ad2a-efa4-c4744f593348@redhat.com/mbox/"},{"id":106683,"url":"https://patchwork.plctlab.org/api/1.2/patches/106683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com/","msgid":"<15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:22","name":"[COMMITTED,4/17] - Move operator_bitwise_and to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15991394-cf27-d4b9-e305-8a79fd2dac85@redhat.com/mbox/"},{"id":106686,"url":"https://patchwork.plctlab.org/api/1.2/patches/106686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com/","msgid":"<158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:27","name":"[COMMITTED,5/17] - Move operator_bitwise_or to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/158c083d-028a-56b4-8fa8-5c2df0e9af5f@redhat.com/mbox/"},{"id":106689,"url":"https://patchwork.plctlab.org/api/1.2/patches/106689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e83ca99a-6042-1629-66e4-05de9c93afb4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:31","name":"[COMMITTED,6/17] - Move operator_min to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e83ca99a-6042-1629-66e4-05de9c93afb4@redhat.com/mbox/"},{"id":106684,"url":"https://patchwork.plctlab.org/api/1.2/patches/106684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef9c4663-9cad-9ae7-defd-e1abb0a0568b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:36","name":"[COMMITTED,7/17] - Move operator_max to the unified range-op table.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef9c4663-9cad-9ae7-defd-e1abb0a0568b@redhat.com/mbox/"},{"id":106687,"url":"https://patchwork.plctlab.org/api/1.2/patches/106687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com/","msgid":"<419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:40","name":"[COMMITTED,8/17] - Split pointer based range operators to range-op-ptr.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/419f4280-d0c5-7fbe-2dae-4c198b69186e@redhat.com/mbox/"},{"id":106693,"url":"https://patchwork.plctlab.org/api/1.2/patches/106693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/690d98ed-2389-d664-dff6-00617dd596c0@redhat.com/","msgid":"<690d98ed-2389-d664-dff6-00617dd596c0@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:46","name":"[COMMITTED,9/17] - Add a hybrid BIT_AND_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/690d98ed-2389-d664-dff6-00617dd596c0@redhat.com/mbox/"},{"id":106696,"url":"https://patchwork.plctlab.org/api/1.2/patches/106696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com/","msgid":"<1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:32:51","name":"[COMMITTED,10/17] - Add a hybrid BIT_IOR_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d685c80-95a7-e640-c3d7-5fa909dd9de8@redhat.com/mbox/"},{"id":106685,"url":"https://patchwork.plctlab.org/api/1.2/patches/106685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5eccc69-b7df-f3cc-74b7-421e0ea4247e@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:32:58","name":"[COMMITTED,11/17] - Add a hybrid MIN_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5eccc69-b7df-f3cc-74b7-421e0ea4247e@redhat.com/mbox/"},{"id":106697,"url":"https://patchwork.plctlab.org/api/1.2/patches/106697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6243523-bb57-6b36-5f9b-b9b97dca0dd8@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:02","name":"[COMMITTED,12/17] - Add a hybrid MAX_EXPR operator for integer and pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6243523-bb57-6b36-5f9b-b9b97dca0dd8@redhat.com/mbox/"},{"id":106688,"url":"https://patchwork.plctlab.org/api/1.2/patches/106688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com/","msgid":"<8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:33:07","name":"[COMMITTED,13/17] - Remove type from range_op_handler table selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8989b7ec-874e-dc64-7f2c-0aaf9924ba78@redhat.com/mbox/"},{"id":106690,"url":"https://patchwork.plctlab.org/api/1.2/patches/106690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccc6f9e8-75e7-60c9-fc76-e038fe0bca6a@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:12","name":"[COMMITTED,14/17] - Switch from unified table to range_op_table. There can be only one.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccc6f9e8-75e7-60c9-fc76-e038fe0bca6a@redhat.com/mbox/"},{"id":106694,"url":"https://patchwork.plctlab.org/api/1.2/patches/106694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3de06f0-3cdf-eaea-35b2-b61512bf3f77@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:18","name":"[COMMITTED,15/17] - Provide a default range_operator via range_op_handler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d3de06f0-3cdf-eaea-35b2-b61512bf3f77@redhat.com/mbox/"},{"id":106692,"url":"https://patchwork.plctlab.org/api/1.2/patches/106692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c74647fd-ba87-65f5-0ef5-5473f148c60b@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-12T15:33:23","name":"[COMMITTED,16/17] - Provide interface for non-standard operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c74647fd-ba87-65f5-0ef5-5473f148c60b@redhat.com/mbox/"},{"id":106695,"url":"https://patchwork.plctlab.org/api/1.2/patches/106695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65b29c92-eae6-b709-7928-84a881527724@redhat.com/","msgid":"<65b29c92-eae6-b709-7928-84a881527724@redhat.com>","list_archive_url":null,"date":"2023-06-12T15:33:28","name":"[COMMITTED,17/17] PR tree-optimization/110205 - Add some overrides.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65b29c92-eae6-b709-7928-84a881527724@redhat.com/mbox/"},{"id":106712,"url":"https://patchwork.plctlab.org/api/1.2/patches/106712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64017201-8206-fd22-70e4-897c858ae049@codesourcery.com/","msgid":"<64017201-8206-fd22-70e4-897c858ae049@codesourcery.com>","list_archive_url":null,"date":"2023-06-12T16:44:23","name":"[committed] OpenMP: Cleanups related to the '\''present'\'' modifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64017201-8206-fd22-70e4-897c858ae049@codesourcery.com/mbox/"},{"id":106764,"url":"https://patchwork.plctlab.org/api/1.2/patches/106764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com/","msgid":"<52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com>","list_archive_url":null,"date":"2023-06-12T18:55:49","name":"[committed,PR,rtl-optimization/101188] Fix reload_cse_move2add ignoring clobbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52aefdbf-130d-dcb9-63f1-1b451153ccba@gmail.com/mbox/"},{"id":106779,"url":"https://patchwork.plctlab.org/api/1.2/patches/106779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId3OsN8187JLiKV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:51:22","name":"c: Add __typeof_unqual__ and __typeof_unqual support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId3OsN8187JLiKV@tucnak/mbox/"},{"id":106784,"url":"https://patchwork.plctlab.org/api/1.2/patches/106784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId4nTL6nFuc02rH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:57:17","name":"c, c++: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId4nTL6nFuc02rH@tucnak/mbox/"},{"id":106787,"url":"https://patchwork.plctlab.org/api/1.2/patches/106787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId5JjzFMuybL4v5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-12T19:59:34","name":"c: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZId5JjzFMuybL4v5@tucnak/mbox/"},{"id":106891,"url":"https://patchwork.plctlab.org/api/1.2/patches/106891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ee69c69e-7b4c-48d6-8f89-a5c4467fd9e6-1686604365454@3c-app-gmx-bs01/","msgid":"","list_archive_url":null,"date":"2023-06-12T21:12:45","name":"Fortran: fix passing of zero-sized array arguments to procedures [PR86277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-ee69c69e-7b4c-48d6-8f89-a5c4467fd9e6-1686604365454@3c-app-gmx-bs01/mbox/"},{"id":106920,"url":"https://patchwork.plctlab.org/api/1.2/patches/106920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-2-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:26","name":"[v5,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-2-kmatsui@cs.washington.edu/mbox/"},{"id":106921,"url":"https://patchwork.plctlab.org/api/1.2/patches/106921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-3-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:27","name":"[v5,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-3-kmatsui@cs.washington.edu/mbox/"},{"id":106922,"url":"https://patchwork.plctlab.org/api/1.2/patches/106922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-4-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:28","name":"[v5,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-4-kmatsui@cs.washington.edu/mbox/"},{"id":106923,"url":"https://patchwork.plctlab.org/api/1.2/patches/106923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-5-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:29","name":"[v5,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-5-kmatsui@cs.washington.edu/mbox/"},{"id":106925,"url":"https://patchwork.plctlab.org/api/1.2/patches/106925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-6-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:30","name":"[v5,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-6-kmatsui@cs.washington.edu/mbox/"},{"id":106926,"url":"https://patchwork.plctlab.org/api/1.2/patches/106926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-7-kmatsui@cs.washington.edu/","msgid":"<20230612222515.20102-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:22:31","name":"[v5,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612222515.20102-7-kmatsui@cs.washington.edu/mbox/"},{"id":106929,"url":"https://patchwork.plctlab.org/api/1.2/patches/106929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-2-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:47","name":"[v6,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-2-kmatsui@cs.washington.edu/mbox/"},{"id":106930,"url":"https://patchwork.plctlab.org/api/1.2/patches/106930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-3-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:48","name":"[v6,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-3-kmatsui@cs.washington.edu/mbox/"},{"id":106932,"url":"https://patchwork.plctlab.org/api/1.2/patches/106932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-4-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:49","name":"[v6,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-4-kmatsui@cs.washington.edu/mbox/"},{"id":106931,"url":"https://patchwork.plctlab.org/api/1.2/patches/106931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-5-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:50","name":"[v6,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-5-kmatsui@cs.washington.edu/mbox/"},{"id":106935,"url":"https://patchwork.plctlab.org/api/1.2/patches/106935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-6-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:51","name":"[v6,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-6-kmatsui@cs.washington.edu/mbox/"},{"id":106933,"url":"https://patchwork.plctlab.org/api/1.2/patches/106933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-7-kmatsui@cs.washington.edu/","msgid":"<20230612224109.20749-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:39:52","name":"[v6,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224109.20749-7-kmatsui@cs.washington.edu/mbox/"},{"id":106936,"url":"https://patchwork.plctlab.org/api/1.2/patches/106936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-2-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:24","name":"[v7,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-2-kmatsui@cs.washington.edu/mbox/"},{"id":106937,"url":"https://patchwork.plctlab.org/api/1.2/patches/106937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-3-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-3-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:25","name":"[v7,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-3-kmatsui@cs.washington.edu/mbox/"},{"id":106938,"url":"https://patchwork.plctlab.org/api/1.2/patches/106938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-4-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-4-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:26","name":"[v7,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-4-kmatsui@cs.washington.edu/mbox/"},{"id":106939,"url":"https://patchwork.plctlab.org/api/1.2/patches/106939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-5-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-5-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:27","name":"[v7,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-5-kmatsui@cs.washington.edu/mbox/"},{"id":106940,"url":"https://patchwork.plctlab.org/api/1.2/patches/106940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-6-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-6-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:28","name":"[v7,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-6-kmatsui@cs.washington.edu/mbox/"},{"id":106941,"url":"https://patchwork.plctlab.org/api/1.2/patches/106941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-7-kmatsui@cs.washington.edu/","msgid":"<20230612224909.21188-7-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-12T22:47:29","name":"[v7,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230612224909.21188-7-kmatsui@cs.washington.edu/mbox/"},{"id":106962,"url":"https://patchwork.plctlab.org/api/1.2/patches/106962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIe0tCZyKfle3+BU@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T00:13:40","name":"[wwwdocs] cxx-dr-status: Update from C++ Core Language Issue TOC, Revision 111","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIe0tCZyKfle3+BU@redhat.com/mbox/"},{"id":107005,"url":"https://patchwork.plctlab.org/api/1.2/patches/107005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613005921.93315-1-jorgen.kvalsvik@woven.toyota/","msgid":"<20230613005921.93315-1-jorgen.kvalsvik@woven.toyota>","list_archive_url":null,"date":"2023-06-13T00:59:21","name":"[v4] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613005921.93315-1-jorgen.kvalsvik@woven.toyota/mbox/"},{"id":107016,"url":"https://patchwork.plctlab.org/api/1.2/patches/107016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8597dce488a3301f4b9917249a5a286b925f87c.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:22","name":"[1/9] vect: Move vect_model_load_cost next to the transform in vectorizable_load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8597dce488a3301f4b9917249a5a286b925f87c.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107019,"url":"https://patchwork.plctlab.org/api/1.2/patches/107019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com/","msgid":"<9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:23","name":"[2/9] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER && gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bad792a4bcef35fbd9906245bf3493672b340fe.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107017,"url":"https://patchwork.plctlab.org/api/1.2/patches/107017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db8fecc7f079cd781695e26b6a7bf6a47e14e8ab.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:24","name":"[3/9] vect: Adjust vectorizable_load costing on VMAT_INVARIANT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db8fecc7f079cd781695e26b6a7bf6a47e14e8ab.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107022,"url":"https://patchwork.plctlab.org/api/1.2/patches/107022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com/","msgid":"<0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:25","name":"[4/9] vect: Adjust vectorizable_load costing on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107023,"url":"https://patchwork.plctlab.org/api/1.2/patches/107023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea7b896e3cbc7ffc13e802a12f3ece1c625b0c4d.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:26","name":"[5/9] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea7b896e3cbc7ffc13e802a12f3ece1c625b0c4d.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107018,"url":"https://patchwork.plctlab.org/api/1.2/patches/107018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com/","msgid":"<1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:27","name":"[6/9] vect: Adjust vectorizable_load costing on VMAT_LOAD_STORE_LANES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a263aa46335ad08c0cd198b4c2075560a3ed44d.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107024,"url":"https://patchwork.plctlab.org/api/1.2/patches/107024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0d83a313ba6b9d6dd33bcbd7981f04ce733cc4e.1686573640.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T02:03:28","name":"[7/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS_REVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0d83a313ba6b9d6dd33bcbd7981f04ce733cc4e.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107021,"url":"https://patchwork.plctlab.org/api/1.2/patches/107021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com/","msgid":"<216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:29","name":"[8/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS_PERMUTE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/216bf6e61d4fe2caa6b87ae1e5c8e15b6d31c409.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107020,"url":"https://patchwork.plctlab.org/api/1.2/patches/107020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com/","msgid":"<625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T02:03:30","name":"[9/9] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/625eccff9102ffe35497ad03ebd8242d6d6b06a4.1686573640.git.linkw@linux.ibm.com/mbox/"},{"id":107026,"url":"https://patchwork.plctlab.org/api/1.2/patches/107026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613022611.2189297-1-juzhe.zhong@rivai.ai/","msgid":"<20230613022611.2189297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T02:26:11","name":"RISC-V: Add comments of some functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613022611.2189297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107028,"url":"https://patchwork.plctlab.org/api/1.2/patches/107028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613024640.2726370-1-yanzhang.wang@intel.com/","msgid":"<20230613024640.2726370-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-13T02:46:40","name":"[v6] RISC-V: Add vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613024640.2726370-1-yanzhang.wang@intel.com/mbox/"},{"id":107054,"url":"https://patchwork.plctlab.org/api/1.2/patches/107054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPzzfctOqwsbG4ig4gT2eUWc5C+YdLZPJfKtHDgN8OKSQU+PzA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T03:18:54","name":"Fix note_defect3 function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPzzfctOqwsbG4ig4gT2eUWc5C+YdLZPJfKtHDgN8OKSQU+PzA@mail.gmail.com/mbox/"},{"id":107056,"url":"https://patchwork.plctlab.org/api/1.2/patches/107056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613032823.264347-1-maskray@google.com/","msgid":"<20230613032823.264347-1-maskray@google.com>","list_archive_url":null,"date":"2023-06-13T03:28:23","name":"[v3] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613032823.264347-1-maskray@google.com/mbox/"},{"id":107105,"url":"https://patchwork.plctlab.org/api/1.2/patches/107105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613064126.1323-1-jinma@linux.alibaba.com/","msgid":"<20230613064126.1323-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-06-13T06:41:26","name":"RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613064126.1323-1-jinma@linux.alibaba.com/mbox/"},{"id":107116,"url":"https://patchwork.plctlab.org/api/1.2/patches/107116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613071703.704283-1-pan2.li@intel.com/","msgid":"<20230613071703.704283-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-13T07:17:03","name":"[v1] RISC-V: Fix one typo in full-vec-movel test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613071703.704283-1-pan2.li@intel.com/mbox/"},{"id":107131,"url":"https://patchwork.plctlab.org/api/1.2/patches/107131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073723.238680-1-poulhies@adacore.com/","msgid":"<20230613073723.238680-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:23","name":"[COMMITTED] ada: Remove explicit decoration of wrapper created in freezing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073723.238680-1-poulhies@adacore.com/mbox/"},{"id":107135,"url":"https://patchwork.plctlab.org/api/1.2/patches/107135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073736.238835-1-poulhies@adacore.com/","msgid":"<20230613073736.238835-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:36","name":"[COMMITTED] ada: Support new GNAT-specific aspect Ghost_Predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073736.238835-1-poulhies@adacore.com/mbox/"},{"id":107132,"url":"https://patchwork.plctlab.org/api/1.2/patches/107132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073740.238900-1-poulhies@adacore.com/","msgid":"<20230613073740.238900-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:40","name":"[COMMITTED] ada: Simplify appending to a newly created list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073740.238900-1-poulhies@adacore.com/mbox/"},{"id":107136,"url":"https://patchwork.plctlab.org/api/1.2/patches/107136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073742.238961-1-poulhies@adacore.com/","msgid":"<20230613073742.238961-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:42","name":"[COMMITTED] ada: Tune style in detection of writable function actuals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073742.238961-1-poulhies@adacore.com/mbox/"},{"id":107140,"url":"https://patchwork.plctlab.org/api/1.2/patches/107140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073744.239061-1-poulhies@adacore.com/","msgid":"<20230613073744.239061-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:44","name":"[COMMITTED] ada: Cleanup expansion of locally handled exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073744.239061-1-poulhies@adacore.com/mbox/"},{"id":107144,"url":"https://patchwork.plctlab.org/api/1.2/patches/107144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073746.239122-1-poulhies@adacore.com/","msgid":"<20230613073746.239122-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:46","name":"[COMMITTED] ada: Cleanup finding of locally handled exception handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073746.239122-1-poulhies@adacore.com/mbox/"},{"id":107147,"url":"https://patchwork.plctlab.org/api/1.2/patches/107147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073749.239184-1-poulhies@adacore.com/","msgid":"<20230613073749.239184-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:49","name":"[COMMITTED] ada: Remove wrong comment about expansion of exceptions for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073749.239184-1-poulhies@adacore.com/mbox/"},{"id":107137,"url":"https://patchwork.plctlab.org/api/1.2/patches/107137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073751.239246-1-poulhies@adacore.com/","msgid":"<20230613073751.239246-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:51","name":"[COMMITTED] ada: Factor common processing in expansion of aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073751.239246-1-poulhies@adacore.com/mbox/"},{"id":107133,"url":"https://patchwork.plctlab.org/api/1.2/patches/107133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073753.239309-1-poulhies@adacore.com/","msgid":"<20230613073753.239309-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:53","name":"[COMMITTED] ada: Fix expansion of aggregates with controlled components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073753.239309-1-poulhies@adacore.com/mbox/"},{"id":107153,"url":"https://patchwork.plctlab.org/api/1.2/patches/107153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073756.239408-1-poulhies@adacore.com/","msgid":"<20230613073756.239408-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:56","name":"[COMMITTED] ada: Use ghost predicate in standard library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073756.239408-1-poulhies@adacore.com/mbox/"},{"id":107134,"url":"https://patchwork.plctlab.org/api/1.2/patches/107134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073758.239469-1-poulhies@adacore.com/","msgid":"<20230613073758.239469-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:37:58","name":"[COMMITTED] ada: Factor out tag assignments from type in expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073758.239469-1-poulhies@adacore.com/mbox/"},{"id":107138,"url":"https://patchwork.plctlab.org/api/1.2/patches/107138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073800.239531-1-poulhies@adacore.com/","msgid":"<20230613073800.239531-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:00","name":"[COMMITTED] ada: Add No_Elaboration_Code_All pragma to System.Storage_Elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073800.239531-1-poulhies@adacore.com/mbox/"},{"id":107157,"url":"https://patchwork.plctlab.org/api/1.2/patches/107157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073802.239593-1-poulhies@adacore.com/","msgid":"<20230613073802.239593-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:02","name":"[COMMITTED] ada: Mark attribute Initialized as ghost code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073802.239593-1-poulhies@adacore.com/mbox/"},{"id":107142,"url":"https://patchwork.plctlab.org/api/1.2/patches/107142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073804.239660-1-poulhies@adacore.com/","msgid":"<20230613073804.239660-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:04","name":"[COMMITTED] ada: Fix wrong expansion of limited extension aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073804.239660-1-poulhies@adacore.com/mbox/"},{"id":107141,"url":"https://patchwork.plctlab.org/api/1.2/patches/107141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073809.239731-1-poulhies@adacore.com/","msgid":"<20230613073809.239731-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:09","name":"[COMMITTED] ada: Small housekeeping work in expansion of extension aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073809.239731-1-poulhies@adacore.com/mbox/"},{"id":107149,"url":"https://patchwork.plctlab.org/api/1.2/patches/107149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073811.239803-1-poulhies@adacore.com/","msgid":"<20230613073811.239803-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:11","name":"[COMMITTED] ada: Remove unreferenced routine Is_Inherited_Operation_For_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073811.239803-1-poulhies@adacore.com/mbox/"},{"id":107145,"url":"https://patchwork.plctlab.org/api/1.2/patches/107145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073814.239864-1-poulhies@adacore.com/","msgid":"<20230613073814.239864-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:14","name":"[COMMITTED] ada: Remove obsolete code in Analyze_Assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073814.239864-1-poulhies@adacore.com/mbox/"},{"id":107154,"url":"https://patchwork.plctlab.org/api/1.2/patches/107154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073816.239933-1-poulhies@adacore.com/","msgid":"<20230613073816.239933-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:16","name":"[COMMITTED] ada: Streamline expansion of controlled actions for aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073816.239933-1-poulhies@adacore.com/mbox/"},{"id":107146,"url":"https://patchwork.plctlab.org/api/1.2/patches/107146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073818.239995-1-poulhies@adacore.com/","msgid":"<20230613073818.239995-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:18","name":"[COMMITTED] ada: Fix internal error on imported function with post-condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073818.239995-1-poulhies@adacore.com/mbox/"},{"id":107159,"url":"https://patchwork.plctlab.org/api/1.2/patches/107159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073821.240073-1-poulhies@adacore.com/","msgid":"<20230613073821.240073-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:21","name":"[COMMITTED] ada: Fix spurious error on call to function returning private in generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073821.240073-1-poulhies@adacore.com/mbox/"},{"id":107150,"url":"https://patchwork.plctlab.org/api/1.2/patches/107150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073823.240135-1-poulhies@adacore.com/","msgid":"<20230613073823.240135-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:23","name":"[COMMITTED] ada: Fix exception raised on invalid contract in generic package","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073823.240135-1-poulhies@adacore.com/mbox/"},{"id":107162,"url":"https://patchwork.plctlab.org/api/1.2/patches/107162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073825.240197-1-poulhies@adacore.com/","msgid":"<20230613073825.240197-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:25","name":"[COMMITTED] ada: Fix iterated component initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073825.240197-1-poulhies@adacore.com/mbox/"},{"id":107167,"url":"https://patchwork.plctlab.org/api/1.2/patches/107167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073827.240259-1-poulhies@adacore.com/","msgid":"<20230613073827.240259-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:27","name":"[COMMITTED] ada: Fix another case of missing Has_Private_View flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073827.240259-1-poulhies@adacore.com/mbox/"},{"id":107155,"url":"https://patchwork.plctlab.org/api/1.2/patches/107155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073829.240320-1-poulhies@adacore.com/","msgid":"<20230613073829.240320-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:29","name":"[COMMITTED] ada: Skip elaboration checks for abstract subprograms on derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073829.240320-1-poulhies@adacore.com/mbox/"},{"id":107158,"url":"https://patchwork.plctlab.org/api/1.2/patches/107158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073831.240386-1-poulhies@adacore.com/","msgid":"<20230613073831.240386-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:31","name":"[COMMITTED] ada: Implement new aspect Always_Terminates for SPARK","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073831.240386-1-poulhies@adacore.com/mbox/"},{"id":107160,"url":"https://patchwork.plctlab.org/api/1.2/patches/107160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073835.240455-1-poulhies@adacore.com/","msgid":"<20230613073835.240455-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:35","name":"[COMMITTED] ada: Disable inlining in potentially unevaluated contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073835.240455-1-poulhies@adacore.com/mbox/"},{"id":107163,"url":"https://patchwork.plctlab.org/api/1.2/patches/107163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073837.240516-1-poulhies@adacore.com/","msgid":"<20230613073837.240516-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:37","name":"[COMMITTED] ada: Recognize iterated_component_association as potentially unevaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073837.240516-1-poulhies@adacore.com/mbox/"},{"id":107164,"url":"https://patchwork.plctlab.org/api/1.2/patches/107164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073839.240577-1-poulhies@adacore.com/","msgid":"<20230613073839.240577-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:39","name":"[COMMITTED] ada: Recognize iterated_component_association as repeatedly evaluated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073839.240577-1-poulhies@adacore.com/mbox/"},{"id":107151,"url":"https://patchwork.plctlab.org/api/1.2/patches/107151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073841.240638-1-poulhies@adacore.com/","msgid":"<20230613073841.240638-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:41","name":"[COMMITTED] ada: Add missing ss_mark/ss_release in quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073841.240638-1-poulhies@adacore.com/mbox/"},{"id":107168,"url":"https://patchwork.plctlab.org/api/1.2/patches/107168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073844.240700-1-poulhies@adacore.com/","msgid":"<20230613073844.240700-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-13T07:38:44","name":"[COMMITTED] ada: Fix decoration of iterated component association for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613073844.240700-1-poulhies@adacore.com/mbox/"},{"id":107174,"url":"https://patchwork.plctlab.org/api/1.2/patches/107174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e52b7d-30cb-a571-c1f3-fb9275dc2498@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T08:11:07","name":"[committed] testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8e52b7d-30cb-a571-c1f3-fb9275dc2498@linux.ibm.com/mbox/"},{"id":107184,"url":"https://patchwork.plctlab.org/api/1.2/patches/107184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082643.149991-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230613082643.149991-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-13T08:26:43","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082643.149991-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":107185,"url":"https://patchwork.plctlab.org/api/1.2/patches/107185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082715.150054-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230613082715.150054-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-13T08:27:15","name":"[2/2] AArch64: New RTL for ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613082715.150054-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":107190,"url":"https://patchwork.plctlab.org/api/1.2/patches/107190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084223.D3B863857006@sourceware.org/","msgid":"<20230613084223.D3B863857006@sourceware.org>","list_archive_url":null,"date":"2023-06-13T08:41:32","name":"Fix disambiguation against .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084223.D3B863857006@sourceware.org/mbox/"},{"id":107191,"url":"https://patchwork.plctlab.org/api/1.2/patches/107191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084337.9F2843858414@sourceware.org/","msgid":"<20230613084337.9F2843858414@sourceware.org>","list_archive_url":null,"date":"2023-06-13T08:42:15","name":"middle-end/110232 - fix native interpret of vector ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613084337.9F2843858414@sourceware.org/mbox/"},{"id":107194,"url":"https://patchwork.plctlab.org/api/1.2/patches/107194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com/","msgid":"<3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T08:49:45","name":"[PATCHv3,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3378371f-a40b-d582-9be5-27de60ece7bf@linux.ibm.com/mbox/"},{"id":107210,"url":"https://patchwork.plctlab.org/api/1.2/patches/107210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613091449.324764-1-juzhe.zhong@rivai.ai/","msgid":"<20230613091449.324764-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T09:14:49","name":"RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613091449.324764-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107212,"url":"https://patchwork.plctlab.org/api/1.2/patches/107212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613093055.329955-1-juzhe.zhong@rivai.ai/","msgid":"<20230613093055.329955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T09:30:55","name":"RISC-V: Fix bug of VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613093055.329955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107215,"url":"https://patchwork.plctlab.org/api/1.2/patches/107215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com/","msgid":"<13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T09:35:11","name":"[committed] libgomp/testsuite: Add requires-unified-addr-1.{c,f90} [PR109837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13868b67-0a2c-771b-2a30-36e097e89519@codesourcery.com/mbox/"},{"id":107261,"url":"https://patchwork.plctlab.org/api/1.2/patches/107261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613103541.96476-1-juzhe.zhong@rivai.ai/","msgid":"<20230613103541.96476-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:35:41","name":"[V2] RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613103541.96476-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107263,"url":"https://patchwork.plctlab.org/api/1.2/patches/107263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttvb7ied.fsf@euler.schwinge.homeip.net/","msgid":"<87ttvb7ied.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-13T10:42:34","name":"[ping] Add '\''libgomp.{, oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttvb7ied.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107264,"url":"https://patchwork.plctlab.org/api/1.2/patches/107264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qf7ibj.fsf@euler.schwinge.homeip.net/","msgid":"<87r0qf7ibj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-13T10:44:16","name":"[ping] driver: Forward '\''-lgfortran'\'', '\''-lm'\'' to offloading compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qf7ibj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107270,"url":"https://patchwork.plctlab.org/api/1.2/patches/107270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105304.708770-1-lehua.ding@rivai.ai/","msgid":"<20230613105304.708770-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:53:04","name":"RISC-V: Remove duplicate `#include \"riscv-vector-switch.def\"`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105304.708770-1-lehua.ding@rivai.ai/mbox/"},{"id":107273,"url":"https://patchwork.plctlab.org/api/1.2/patches/107273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105909.820090-1-lehua.ding@rivai.ai/","msgid":"<20230613105909.820090-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-13T10:59:09","name":"[V2] RISC-V: Remove duplicate `#include \"riscv-vector-switch.def\"`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613105909.820090-1-lehua.ding@rivai.ai/mbox/"},{"id":107318,"url":"https://patchwork.plctlab.org/api/1.2/patches/107318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613113838.183314-1-juzhe.zhong@rivai.ai/","msgid":"<20230613113838.183314-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-13T11:38:38","name":"[V3] RISC-V: Add more SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613113838.183314-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107336,"url":"https://patchwork.plctlab.org/api/1.2/patches/107336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613120934.4183450-1-jason@redhat.com/","msgid":"<20230613120934.4183450-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-13T12:09:34","name":"[pushed] c++: mutable temps in rodata","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613120934.4183450-1-jason@redhat.com/mbox/"},{"id":107344,"url":"https://patchwork.plctlab.org/api/1.2/patches/107344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122209.B5D7B3858C30@sourceware.org/","msgid":"<20230613122209.B5D7B3858C30@sourceware.org>","list_archive_url":null,"date":"2023-06-13T12:21:26","name":"Fix memory leak in loop header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122209.B5D7B3858C30@sourceware.org/mbox/"},{"id":107345,"url":"https://patchwork.plctlab.org/api/1.2/patches/107345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122335.2108620-1-guojiufu@linux.ibm.com/","msgid":"<20230613122335.2108620-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-13T12:23:35","name":"rs6000: replace '\''(const_int 0)'\'' to '\''unspec:BLK [(const_int 0)]'\'' for stack_tie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613122335.2108620-1-guojiufu@linux.ibm.com/mbox/"},{"id":107369,"url":"https://patchwork.plctlab.org/api/1.2/patches/107369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613130529.7762-1-someguy@effective-light.com/","msgid":"<20230613130529.7762-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-06-13T13:05:29","name":"Add -Wmissing-variable-declarations [PR65213].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613130529.7762-1-someguy@effective-light.com/mbox/"},{"id":107441,"url":"https://patchwork.plctlab.org/api/1.2/patches/107441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1a5d579-f28c-9417-44ed-ba6248850398@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T15:52:25","name":"[OpenACC,2.7] Implement self clause for compute constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1a5d579-f28c-9417-44ed-ba6248850398@siemens.com/mbox/"},{"id":107444,"url":"https://patchwork.plctlab.org/api/1.2/patches/107444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com/","msgid":"<0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T15:55:57","name":"vect: Vectorize via libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e5fddf8-8605-a0d6-eede-1a8fcf12535c@codesourcery.com/mbox/"},{"id":107448,"url":"https://patchwork.plctlab.org/api/1.2/patches/107448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com/","msgid":"<00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-13T16:03:52","name":"[x86] Convert ptestz of pandn into ptestc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ce01d99e10$a7e04b20$f7a0e160$@nextmovesoftware.com/mbox/"},{"id":107458,"url":"https://patchwork.plctlab.org/api/1.2/patches/107458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIiZbniaGFLYHGwi@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-13T16:29:34","name":"libcpp: Diagnose #include after failed __has_include [PR80753]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIiZbniaGFLYHGwi@tucnak/mbox/"},{"id":107462,"url":"https://patchwork.plctlab.org/api/1.2/patches/107462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIicZLX240GoXGAs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-13T16:42:12","name":"[committed] i386: Fix up whitespace in assembly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIicZLX240GoXGAs@tucnak/mbox/"},{"id":107470,"url":"https://patchwork.plctlab.org/api/1.2/patches/107470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com/","msgid":"<57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com>","list_archive_url":null,"date":"2023-06-13T17:15:07","name":"[committed] Remove sh5media divtab code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57de50b2-28bc-678d-9bcc-43ba0b073c48@gmail.com/mbox/"},{"id":107496,"url":"https://patchwork.plctlab.org/api/1.2/patches/107496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f028ee5a-489a-200b-028c-92cf7ee32115@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T17:49:03","name":"[commited] Remove a couple mudflap remnants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f028ee5a-489a-200b-028c-92cf7ee32115@gmail.com/mbox/"},{"id":107509,"url":"https://patchwork.plctlab.org/api/1.2/patches/107509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com/","msgid":"<1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com>","list_archive_url":null,"date":"2023-06-13T18:44:39","name":"OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1487d7d4-8611-0d78-6bf2-9bffdd4daa64@codesourcery.com/mbox/"},{"id":107510,"url":"https://patchwork.plctlab.org/api/1.2/patches/107510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc0e7c7-27e0-c6e1-7fa0-c2283ee2903b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-13T18:45:33","name":"[wwwdocs] gcc-14/changes.html + projects/gomp/: GCC 14 OpenMP update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc0e7c7-27e0-c6e1-7fa0-c2283ee2903b@codesourcery.com/mbox/"},{"id":107547,"url":"https://patchwork.plctlab.org/api/1.2/patches/107547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb2c916c-cd80-03ae-a0c5-9c70adad7a6f@acm.org/","msgid":"","list_archive_url":null,"date":"2023-06-13T21:11:02","name":"Fix templated conversion operator demangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb2c916c-cd80-03ae-a0c5-9c70adad7a6f@acm.org/mbox/"},{"id":107558,"url":"https://patchwork.plctlab.org/api/1.2/patches/107558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613214618.879071-1-dmalcolm@redhat.com/","msgid":"<20230613214618.879071-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-13T21:46:18","name":"[pushed] c/c++: use positive tone in missing header notes [PR84890]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230613214618.879071-1-dmalcolm@redhat.com/mbox/"},{"id":107635,"url":"https://patchwork.plctlab.org/api/1.2/patches/107635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614004316.546426-1-xry111@xry111.site/","msgid":"<20230614004316.546426-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-06-14T00:43:16","name":"LoongArch: Set default alignment for functions and labels with -mtune","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614004316.546426-1-xry111@xry111.site/mbox/"},{"id":107637,"url":"https://patchwork.plctlab.org/api/1.2/patches/107637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614005859.960040-1-pan2.li@intel.com/","msgid":"<20230614005859.960040-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T00:58:59","name":"[v1] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614005859.960040-1-pan2.li@intel.com/mbox/"},{"id":107653,"url":"https://patchwork.plctlab.org/api/1.2/patches/107653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614014755.634006-1-hongtao.liu@intel.com/","msgid":"<20230614014755.634006-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-14T01:47:55","name":"[x86] Use x instead of v for alternative 2 (v, BH) in mov_internal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614014755.634006-1-hongtao.liu@intel.com/mbox/"},{"id":107657,"url":"https://patchwork.plctlab.org/api/1.2/patches/107657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIkiap8FXrBHAShh@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T02:14:02","name":"[V6] Fix power10 fusion and -fstack-protector, PR target/105325","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIkiap8FXrBHAShh@cowardly-lion.the-meissners.org/mbox/"},{"id":107659,"url":"https://patchwork.plctlab.org/api/1.2/patches/107659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614021557.1691461-1-pan2.li@intel.com/","msgid":"<20230614021557.1691461-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T02:15:57","name":"[v1] RISC-V: Align the predictor style for define_insn_and_split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614021557.1691461-1-pan2.li@intel.com/mbox/"},{"id":107695,"url":"https://patchwork.plctlab.org/api/1.2/patches/107695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614042409.266841-1-juzhe.zhong@rivai.ai/","msgid":"<20230614042409.266841-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-14T04:24:09","name":"RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614042409.266841-1-juzhe.zhong@rivai.ai/mbox/"},{"id":107704,"url":"https://patchwork.plctlab.org/api/1.2/patches/107704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1901e956-dc34-cc03-0419-8d4338174384@suse.com/","msgid":"<1901e956-dc34-cc03-0419-8d4338174384@suse.com>","list_archive_url":null,"date":"2023-06-14T05:54:35","name":"x86/AVX512: use VMOVDDUP for broadcast to V2DF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1901e956-dc34-cc03-0419-8d4338174384@suse.com/mbox/"},{"id":107705,"url":"https://patchwork.plctlab.org/api/1.2/patches/107705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com/","msgid":"<5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com>","list_archive_url":null,"date":"2023-06-14T05:55:43","name":"x86: add Bk and Br to comment list B'\''s sub-chars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ea67c00-651f-ea2a-b3c0-9e78b3afd5d5@suse.com/mbox/"},{"id":107706,"url":"https://patchwork.plctlab.org/api/1.2/patches/107706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com/","msgid":"<48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com>","list_archive_url":null,"date":"2023-06-14T05:57:38","name":"x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/48be2ae1-66d7-f87f-5997-b5307bd25fbc@suse.com/mbox/"},{"id":107708,"url":"https://patchwork.plctlab.org/api/1.2/patches/107708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com/","msgid":"<68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com>","list_archive_url":null,"date":"2023-06-14T05:59:05","name":"x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68c1aa7d-0a7b-1427-55f8-edc6302f00dc@suse.com/mbox/"},{"id":107751,"url":"https://patchwork.plctlab.org/api/1.2/patches/107751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com/","msgid":"<1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com>","list_archive_url":null,"date":"2023-06-14T07:16:13","name":"RISC-V: Add (u)int8_t to binop tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b161ee0-1b7c-3c39-1015-ba5859f57a7a@gmail.com/mbox/"},{"id":107760,"url":"https://patchwork.plctlab.org/api/1.2/patches/107760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614072900.3698145-1-pan2.li@intel.com/","msgid":"<20230614072900.3698145-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T07:29:00","name":"[v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614072900.3698145-1-pan2.li@intel.com/mbox/"},{"id":107783,"url":"https://patchwork.plctlab.org/api/1.2/patches/107783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614075746.3918-1-jinma@linux.alibaba.com/","msgid":"<20230614075746.3918-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-06-14T07:57:45","name":"[v2] RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614075746.3918-1-jinma@linux.alibaba.com/mbox/"},{"id":107796,"url":"https://patchwork.plctlab.org/api/1.2/patches/107796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm5y31p6.fsf@euler.schwinge.homeip.net/","msgid":"<87pm5y31p6.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T08:09:09","name":"Fix typo in '\''libgomp.c/target-51.c'\'' (was: [patch] OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm5y31p6.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107819,"url":"https://patchwork.plctlab.org/api/1.2/patches/107819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614090035.5470-1-pan2.li@intel.com/","msgid":"<20230614090035.5470-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-14T09:00:35","name":"[v3] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614090035.5470-1-pan2.li@intel.com/mbox/"},{"id":107824,"url":"https://patchwork.plctlab.org/api/1.2/patches/107824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfme1dRTqaLR0UWLVnKj_eYw-c3DBqLFCwH_Y3JnowWg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T09:14:38","name":"Remove MFWRAP_SPEC remnant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sOfme1dRTqaLR0UWLVnKj_eYw-c3DBqLFCwH_Y3JnowWg@mail.gmail.com/mbox/"},{"id":107832,"url":"https://patchwork.plctlab.org/api/1.2/patches/107832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614094705.EC699385842C@sourceware.org/","msgid":"<20230614094705.EC699385842C@sourceware.org>","list_archive_url":null,"date":"2023-06-14T09:46:18","name":"[RFC] main loop masked vectorization with --param vect-partial-vector-usage=1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614094705.EC699385842C@sourceware.org/mbox/"},{"id":107845,"url":"https://patchwork.plctlab.org/api/1.2/patches/107845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kmv02k.fsf@euler.schwinge.homeip.net/","msgid":"<87y1kmv02k.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T09:56:51","name":"Add '\''libgomp.{,oacc-}fortran/fortran-torture_execute_math.f90'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1kmv02k.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107848,"url":"https://patchwork.plctlab.org/api/1.2/patches/107848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZZpOzdCPBz84zEYCiakXn6b5Hr=ae=-_un5z26erWO4Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T10:15:38","name":"RTL: Merge rtx_equal_p and hash_rtx functions with their callback variants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZZpOzdCPBz84zEYCiakXn6b5Hr=ae=-_un5z26erWO4Q@mail.gmail.com/mbox/"},{"id":107879,"url":"https://patchwork.plctlab.org/api/1.2/patches/107879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com/","msgid":"<641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T10:34:20","name":"libgomp.texi: Document allocator + affininity env vars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/641f281f-4ba2-0ab2-f52b-9e30fd200a14@codesourcery.com/mbox/"},{"id":107880,"url":"https://patchwork.plctlab.org/api/1.2/patches/107880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614103444.2179711-1-lehua.ding@rivai.ai/","msgid":"<20230614103444.2179711-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T10:34:44","name":"RISC-V: Fix PR 110119","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614103444.2179711-1-lehua.ding@rivai.ai/mbox/"},{"id":107882,"url":"https://patchwork.plctlab.org/api/1.2/patches/107882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz1ywcp0.fsf@euler.schwinge.homeip.net/","msgid":"<87cz1ywcp0.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T10:38:51","name":"libgomp testsuite: Don'\''t handle '\''lang_link_flags'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cz1ywcp0.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107888,"url":"https://patchwork.plctlab.org/api/1.2/patches/107888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5x2wbsj.fsf@euler.schwinge.homeip.net/","msgid":"<87a5x2wbsj.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-14T10:58:20","name":"Align a '\''OMP_TARGET_OFFLOAD=mandatory'\'' diagnostic with others (was: Fix typo in '\''libgomp.c/target-51.c'\'' (was: [patch] OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5x2wbsj.fsf@euler.schwinge.homeip.net/mbox/"},{"id":107892,"url":"https://patchwork.plctlab.org/api/1.2/patches/107892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614110319.2191614-1-lehua.ding@rivai.ai/","msgid":"<20230614110319.2191614-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T11:03:19","name":"RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614110319.2191614-1-lehua.ding@rivai.ai/mbox/"},{"id":107900,"url":"https://patchwork.plctlab.org/api/1.2/patches/107900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/E46DF34D4D45854A+2023061419204905814546@rivai.ai/","msgid":"","list_archive_url":null,"date":"2023-06-14T11:20:49","name":"??????: Re: [PATCH] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/E46DF34D4D45854A+2023061419204905814546@rivai.ai/mbox/"},{"id":107911,"url":"https://patchwork.plctlab.org/api/1.2/patches/107911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114827.9103B3856DF1@sourceware.org/","msgid":"<20230614114827.9103B3856DF1@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:47:10","name":"[1/3] Inline vect_get_max_nscalars_per_iter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114827.9103B3856DF1@sourceware.org/mbox/"},{"id":107912,"url":"https://patchwork.plctlab.org/api/1.2/patches/107912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114843.66BFB3858288@sourceware.org/","msgid":"<20230614114843.66BFB3858288@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:47:21","name":"[2/3] Add loop_vinfo argument to vect_get_loop_mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614114843.66BFB3858288@sourceware.org/mbox/"},{"id":107916,"url":"https://patchwork.plctlab.org/api/1.2/patches/107916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115455.ACA883858422@sourceware.org/","msgid":"<20230614115455.ACA883858422@sourceware.org>","list_archive_url":null,"date":"2023-06-14T11:54:06","name":"[3/3] AVX512 fully masked vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115455.ACA883858422@sourceware.org/mbox/"},{"id":107918,"url":"https://patchwork.plctlab.org/api/1.2/patches/107918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115611.2227435-1-lehua.ding@rivai.ai/","msgid":"<20230614115611.2227435-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-14T11:56:11","name":"[V2] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614115611.2227435-1-lehua.ding@rivai.ai/mbox/"},{"id":107955,"url":"https://patchwork.plctlab.org/api/1.2/patches/107955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInBSpWMc7qz9m53@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:31:54","name":"[v2] c++: Accept elaborated-enum-base in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInBSpWMc7qz9m53@arm.com/mbox/"},{"id":107957,"url":"https://patchwork.plctlab.org/api/1.2/patches/107957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInGN+99kNXeSQ+h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:52:55","name":"middle-end: Move constant args folding of .UBSAN_CHECK_* and .*_OVERFLOW into fold-const-call.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInGN+99kNXeSQ+h@tucnak/mbox/"},{"id":107958,"url":"https://patchwork.plctlab.org/api/1.2/patches/107958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInH2L1MHxI13xgK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-14T13:59:52","name":"middle-end, i386, v3: Pattern recognize add/subtract with carry [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZInH2L1MHxI13xgK@tucnak/mbox/"},{"id":107959,"url":"https://patchwork.plctlab.org/api/1.2/patches/107959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614140210.291212-1-jason@redhat.com/","msgid":"<20230614140210.291212-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-14T14:02:10","name":"c++: tweak c++17 ctor/conversion tiebreaker [DR2327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614140210.291212-1-jason@redhat.com/mbox/"},{"id":107960,"url":"https://patchwork.plctlab.org/api/1.2/patches/107960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0f91d40-dea8-e398-9678-6ede777de4f0@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T14:06:15","name":"RISC-V: testsuite: Add vector_hw and zvfh_hw checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0f91d40-dea8-e398-9678-6ede777de4f0@gmail.com/mbox/"},{"id":108003,"url":"https://patchwork.plctlab.org/api/1.2/patches/108003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614152656.51278-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230614152656.51278-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-14T15:26:56","name":"[1/2] Missed opportunity to use [SU]ABD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614152656.51278-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":108005,"url":"https://patchwork.plctlab.org/api/1.2/patches/108005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com/","msgid":"<46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com>","list_archive_url":null,"date":"2023-06-14T15:28:33","name":"RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/46830e7e-c0b5-5f04-56ec-b2347a101001@gmail.com/mbox/"},{"id":108010,"url":"https://patchwork.plctlab.org/api/1.2/patches/108010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com/","msgid":"<490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com>","list_archive_url":null,"date":"2023-06-14T15:31:34","name":"RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/490fd4af-75d2-de76-fa74-f9ebb478b8b8@gmail.com/mbox/"},{"id":108018,"url":"https://patchwork.plctlab.org/api/1.2/patches/108018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com/","msgid":"<20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T15:44:28","name":"libgomp: Extend OMP_ALLOCATOR, add affinity env var doc (was: [Patch] libgomp.texi: Document allocator + affininity env vars)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20040247-ac0c-6660-eb6d-17bd307ca643@codesourcery.com/mbox/"},{"id":108022,"url":"https://patchwork.plctlab.org/api/1.2/patches/108022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614160917.13046-1-pali@kernel.org/","msgid":"<20230614160917.13046-1-pali@kernel.org>","list_archive_url":null,"date":"2023-06-14T16:09:17","name":"[v2] Add MinGW option -mcrtdll= for choosing C RunTime DLL library","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614160917.13046-1-pali@kernel.org/mbox/"},{"id":108078,"url":"https://patchwork.plctlab.org/api/1.2/patches/108078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOhyivGBzp0=GCviOBH=5mUsNba32i+nCQtSHJR5LzAuDoTrHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T18:05:01","name":"[COMMITED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOhyivGBzp0=GCviOBH=5mUsNba32i+nCQtSHJR5LzAuDoTrHA@mail.gmail.com/mbox/"},{"id":108143,"url":"https://patchwork.plctlab.org/api/1.2/patches/108143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com/","msgid":"<55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-14T20:37:26","name":"[ver,4] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55e5df9a67f6080c3c00fb2e3a15fc404a12d53c.camel@us.ibm.com/mbox/"},{"id":108146,"url":"https://patchwork.plctlab.org/api/1.2/patches/108146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMOUUaacFk0bBSudP51=s3scoYs87AWu4WZMk52LOym2Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-14T20:54:16","name":"[wwwdocs] Broken URL to README in st/cli-be project","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMOUUaacFk0bBSudP51=s3scoYs87AWu4WZMk52LOym2Q@mail.gmail.com/mbox/"},{"id":108155,"url":"https://patchwork.plctlab.org/api/1.2/patches/108155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-2-sandra@codesourcery.com/","msgid":"<20230614220804.917436-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:07:59","name":"[OG13,1/6] OpenMP: Handle loop transformation clauses in nested functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-2-sandra@codesourcery.com/mbox/"},{"id":108156,"url":"https://patchwork.plctlab.org/api/1.2/patches/108156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-3-sandra@codesourcery.com/","msgid":"<20230614220804.917436-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:00","name":"[OG13,2/6] OpenMP: C support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-3-sandra@codesourcery.com/mbox/"},{"id":108159,"url":"https://patchwork.plctlab.org/api/1.2/patches/108159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-4-sandra@codesourcery.com/","msgid":"<20230614220804.917436-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:01","name":"[OG13,3/6] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-4-sandra@codesourcery.com/mbox/"},{"id":108157,"url":"https://patchwork.plctlab.org/api/1.2/patches/108157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-5-sandra@codesourcery.com/","msgid":"<20230614220804.917436-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:02","name":"[OG13,4/6] OpenMP: New c/c++ testcases for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-5-sandra@codesourcery.com/mbox/"},{"id":108158,"url":"https://patchwork.plctlab.org/api/1.2/patches/108158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-6-sandra@codesourcery.com/","msgid":"<20230614220804.917436-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:03","name":"[OG13,5/6] OpenMP: Refactor and tidy Fortran front-end code for loop transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-6-sandra@codesourcery.com/mbox/"},{"id":108160,"url":"https://patchwork.plctlab.org/api/1.2/patches/108160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-7-sandra@codesourcery.com/","msgid":"<20230614220804.917436-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-06-14T22:08:04","name":"[OG13,6/6] OpenMP: Fortran support for imperfectly nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230614220804.917436-7-sandra@codesourcery.com/mbox/"},{"id":108169,"url":"https://patchwork.plctlab.org/api/1.2/patches/108169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0qdy860.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:45:59","name":"libstdc++-v3: do not duplicate some math functions when using newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0qdy860.fsf@lxoliva.fsfla.org/mbox/"},{"id":108171,"url":"https://patchwork.plctlab.org/api/1.2/patches/108171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt11y80p.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:49:10","name":"[libstdc++,testsuite] xfail dbl from_chars for aarch64 rtems ldbl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormt11y80p.fsf@lxoliva.fsfla.org/mbox/"},{"id":108172,"url":"https://patchwork.plctlab.org/api/1.2/patches/108172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilbpy7yh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-14T22:50:30","name":"[libstdc++,testsuite] expect zero entropy matching implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orilbpy7yh.fsf@lxoliva.fsfla.org/mbox/"},{"id":108217,"url":"https://patchwork.plctlab.org/api/1.2/patches/108217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615002814.967814-1-dmalcolm@redhat.com/","msgid":"<20230615002814.967814-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-15T00:28:14","name":"c++: provide #include hint for missing includes [PR110164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615002814.967814-1-dmalcolm@redhat.com/mbox/"},{"id":108221,"url":"https://patchwork.plctlab.org/api/1.2/patches/108221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615011934.2262108-1-pan2.li@intel.com/","msgid":"<20230615011934.2262108-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T01:19:34","name":"[committed] RISC-V: Ensure vector args and return use function stack to pass [PR110119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615011934.2262108-1-pan2.li@intel.com/mbox/"},{"id":108223,"url":"https://patchwork.plctlab.org/api/1.2/patches/108223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615013033.505823-1-chenglulu@loongson.cn/","msgid":"<20230615013033.505823-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-15T01:30:34","name":"[v3] LoongArch: Avoid non-returning indirect jumps through $ra [PR110136]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615013033.505823-1-chenglulu@loongson.cn/mbox/"},{"id":108231,"url":"https://patchwork.plctlab.org/api/1.2/patches/108231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615015236.2283429-1-pan2.li@intel.com/","msgid":"<20230615015236.2283429-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T01:52:36","name":"[v2] RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615015236.2283429-1-pan2.li@intel.com/mbox/"},{"id":108235,"url":"https://patchwork.plctlab.org/api/1.2/patches/108235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615021856.2527165-1-pan2.li@intel.com/","msgid":"<20230615021856.2527165-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-15T02:18:56","name":"[v3] RISC-V: Use merge approach to optimize vector permutation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615021856.2527165-1-pan2.li@intel.com/mbox/"},{"id":108260,"url":"https://patchwork.plctlab.org/api/1.2/patches/108260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com/","msgid":"<6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com>","list_archive_url":null,"date":"2023-06-15T05:07:35","name":"Reimplement __gnu_cxx::__ops operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b960f74-7ef7-8c3f-20bd-3f5a19d1f449@gmail.com/mbox/"},{"id":108263,"url":"https://patchwork.plctlab.org/api/1.2/patches/108263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615054052.23633-1-shiyulong@iscas.ac.cn/","msgid":"<20230615054052.23633-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-15T05:40:52","name":"[V1] RISC-V:Add float16 tuple type support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615054052.23633-1-shiyulong@iscas.ac.cn/mbox/"},{"id":108268,"url":"https://patchwork.plctlab.org/api/1.2/patches/108268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa84243c-860b-ddf8-bfde-7e080a197cd1@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T06:03:11","name":"x86: correct and improve \"*vec_dupv2di\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa84243c-860b-ddf8-bfde-7e080a197cd1@suse.com/mbox/"},{"id":108269,"url":"https://patchwork.plctlab.org/api/1.2/patches/108269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061636.3015833-1-chenglulu@loongson.cn/","msgid":"<20230615061636.3015833-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-15T06:16:36","name":"[pushed,v3] LoongArch: Change the default value of LARCH_CALL_RATIO to 6.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061636.3015833-1-chenglulu@loongson.cn/mbox/"},{"id":108270,"url":"https://patchwork.plctlab.org/api/1.2/patches/108270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061704.3514834-1-apinski@marvell.com/","msgid":"<20230615061704.3514834-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-15T06:17:04","name":"Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info during match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615061704.3514834-1-apinski@marvell.com/mbox/"},{"id":108312,"url":"https://patchwork.plctlab.org/api/1.2/patches/108312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080348.938724-1-poulhies@adacore.com/","msgid":"<20230615080348.938724-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:48","name":"[COMMITTED] ada: Cleanup analysis of iterated component association","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080348.938724-1-poulhies@adacore.com/mbox/"},{"id":108316,"url":"https://patchwork.plctlab.org/api/1.2/patches/108316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080351.938791-1-poulhies@adacore.com/","msgid":"<20230615080351.938791-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:51","name":"[COMMITTED] ada: Fix aspect Linker_Section ignored on subprogram body","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080351.938791-1-poulhies@adacore.com/mbox/"},{"id":108313,"url":"https://patchwork.plctlab.org/api/1.2/patches/108313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080353.938852-1-poulhies@adacore.com/","msgid":"<20230615080353.938852-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:53","name":"[COMMITTED] ada: Remove obsolete references for Build_Transient_Object_Statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080353.938852-1-poulhies@adacore.com/mbox/"},{"id":108314,"url":"https://patchwork.plctlab.org/api/1.2/patches/108314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080355.938913-1-poulhies@adacore.com/","msgid":"<20230615080355.938913-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:55","name":"[COMMITTED] ada: Crash on C++ constructor of private type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080355.938913-1-poulhies@adacore.com/mbox/"},{"id":108317,"url":"https://patchwork.plctlab.org/api/1.2/patches/108317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080356.938975-1-poulhies@adacore.com/","msgid":"<20230615080356.938975-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:56","name":"[COMMITTED] ada: Accept aspect Always_Terminates without expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080356.938975-1-poulhies@adacore.com/mbox/"},{"id":108315,"url":"https://patchwork.plctlab.org/api/1.2/patches/108315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080358.939037-1-poulhies@adacore.com/","msgid":"<20230615080358.939037-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:03:58","name":"[COMMITTED] ada: Fix inverted implementation of RM 8.4(10) clause for operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080358.939037-1-poulhies@adacore.com/mbox/"},{"id":108320,"url":"https://patchwork.plctlab.org/api/1.2/patches/108320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080400.939098-1-poulhies@adacore.com/","msgid":"<20230615080400.939098-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:00","name":"[COMMITTED] ada: Remove Ttypes.Max_Unaligned_Field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080400.939098-1-poulhies@adacore.com/mbox/"},{"id":108318,"url":"https://patchwork.plctlab.org/api/1.2/patches/108318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080402.939162-1-poulhies@adacore.com/","msgid":"<20230615080402.939162-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:02","name":"[COMMITTED] ada: Fix minor issues in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080402.939162-1-poulhies@adacore.com/mbox/"},{"id":108322,"url":"https://patchwork.plctlab.org/api/1.2/patches/108322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080404.939261-1-poulhies@adacore.com/","msgid":"<20230615080404.939261-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:04","name":"[COMMITTED] ada: Fix missing error on function call returning incomplete view","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080404.939261-1-poulhies@adacore.com/mbox/"},{"id":108321,"url":"https://patchwork.plctlab.org/api/1.2/patches/108321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080406.939322-1-poulhies@adacore.com/","msgid":"<20230615080406.939322-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:06","name":"[COMMITTED] ada: Reject aspect Always_Terminates on functions and generic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080406.939322-1-poulhies@adacore.com/mbox/"},{"id":108329,"url":"https://patchwork.plctlab.org/api/1.2/patches/108329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080408.939384-1-poulhies@adacore.com/","msgid":"<20230615080408.939384-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:08","name":"[COMMITTED] ada: Accept aspect Always_Terminates on entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080408.939384-1-poulhies@adacore.com/mbox/"},{"id":108319,"url":"https://patchwork.plctlab.org/api/1.2/patches/108319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080410.939483-1-poulhies@adacore.com/","msgid":"<20230615080410.939483-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:10","name":"[COMMITTED] ada: Accept aspect Always_Terminates on packages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080410.939483-1-poulhies@adacore.com/mbox/"},{"id":108333,"url":"https://patchwork.plctlab.org/api/1.2/patches/108333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080412.939566-1-poulhies@adacore.com/","msgid":"<20230615080412.939566-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:12","name":"[COMMITTED] ada: Adjust comments in targparm.ads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080412.939566-1-poulhies@adacore.com/mbox/"},{"id":108331,"url":"https://patchwork.plctlab.org/api/1.2/patches/108331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080413.939627-1-poulhies@adacore.com/","msgid":"<20230615080413.939627-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:13","name":"[COMMITTED] ada: Adjust QNX Ada priorities to match QNX system priorities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080413.939627-1-poulhies@adacore.com/mbox/"},{"id":108326,"url":"https://patchwork.plctlab.org/api/1.2/patches/108326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080415.939740-1-poulhies@adacore.com/","msgid":"<20230615080415.939740-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:15","name":"[COMMITTED] ada: Fix missing finalization for aggregates nested in conditional expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080415.939740-1-poulhies@adacore.com/mbox/"},{"id":108323,"url":"https://patchwork.plctlab.org/api/1.2/patches/108323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080417.939801-1-poulhies@adacore.com/","msgid":"<20230615080417.939801-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:17","name":"[COMMITTED] ada: Add escape hatch to configurable run-time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080417.939801-1-poulhies@adacore.com/mbox/"},{"id":108335,"url":"https://patchwork.plctlab.org/api/1.2/patches/108335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080419.939862-1-poulhies@adacore.com/","msgid":"<20230615080419.939862-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:19","name":"[COMMITTED] ada: Remove dead code in Expand_Iterator_Loop_Over_Container","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080419.939862-1-poulhies@adacore.com/mbox/"},{"id":108330,"url":"https://patchwork.plctlab.org/api/1.2/patches/108330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080421.939923-1-poulhies@adacore.com/","msgid":"<20230615080421.939923-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:21","name":"[COMMITTED] ada: Fix too small secondary stack allocation for returned aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080421.939923-1-poulhies@adacore.com/mbox/"},{"id":108332,"url":"https://patchwork.plctlab.org/api/1.2/patches/108332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080424.939984-1-poulhies@adacore.com/","msgid":"<20230615080424.939984-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:24","name":"[COMMITTED] ada: Revert latest change to Find_Hook_Context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080424.939984-1-poulhies@adacore.com/mbox/"},{"id":108338,"url":"https://patchwork.plctlab.org/api/1.2/patches/108338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080426.940045-1-poulhies@adacore.com/","msgid":"<20230615080426.940045-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:26","name":"[COMMITTED] ada: Fix internal error on loop iterator filter with -gnatVa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080426.940045-1-poulhies@adacore.com/mbox/"},{"id":108334,"url":"https://patchwork.plctlab.org/api/1.2/patches/108334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080428.940106-1-poulhies@adacore.com/","msgid":"<20230615080428.940106-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:28","name":"[COMMITTED] ada: Fix too small secondary stack allocation for returned conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080428.940106-1-poulhies@adacore.com/mbox/"},{"id":108340,"url":"https://patchwork.plctlab.org/api/1.2/patches/108340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080430.940168-1-poulhies@adacore.com/","msgid":"<20230615080430.940168-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:30","name":"[COMMITTED] ada: Reject Loop_Entry inside prefix of Loop_Entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080430.940168-1-poulhies@adacore.com/mbox/"},{"id":108342,"url":"https://patchwork.plctlab.org/api/1.2/patches/108342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080432.940230-1-poulhies@adacore.com/","msgid":"<20230615080432.940230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:32","name":"[COMMITTED] ada: Make minor improvements to user'\''s guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080432.940230-1-poulhies@adacore.com/mbox/"},{"id":108343,"url":"https://patchwork.plctlab.org/api/1.2/patches/108343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080434.940329-1-poulhies@adacore.com/","msgid":"<20230615080434.940329-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:34","name":"[COMMITTED] ada: Fix wrong finalization for double subtype of bounded vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080434.940329-1-poulhies@adacore.com/mbox/"},{"id":108341,"url":"https://patchwork.plctlab.org/api/1.2/patches/108341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080436.940392-1-poulhies@adacore.com/","msgid":"<20230615080436.940392-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:36","name":"[COMMITTED] ada: Fix wrong code for ACATS cd1c03i on Morello target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080436.940392-1-poulhies@adacore.com/mbox/"},{"id":108339,"url":"https://patchwork.plctlab.org/api/1.2/patches/108339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080438.940453-1-poulhies@adacore.com/","msgid":"<20230615080438.940453-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-15T08:04:38","name":"[COMMITTED] ada: Remove unused files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615080438.940453-1-poulhies@adacore.com/mbox/"},{"id":108387,"url":"https://patchwork.plctlab.org/api/1.2/patches/108387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615095052.13119-1-filip.kastl@gmail.com/","msgid":"<20230615095052.13119-1-filip.kastl@gmail.com>","list_archive_url":null,"date":"2023-06-15T09:50:52","name":"value-prof.cc: Correct edge prob calculation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615095052.13119-1-filip.kastl@gmail.com/mbox/"},{"id":108402,"url":"https://patchwork.plctlab.org/api/1.2/patches/108402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615100534.77819-1-juzhe.zhong@rivai.ai/","msgid":"<20230615100534.77819-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-15T10:05:34","name":"[V3] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615100534.77819-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108451,"url":"https://patchwork.plctlab.org/api/1.2/patches/108451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com/","msgid":"<4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com>","list_archive_url":null,"date":"2023-06-15T11:47:18","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4ac69ba2-d3dd-bc5b-5087-c44e3cfec9a7@arm.com/mbox/"},{"id":108452,"url":"https://patchwork.plctlab.org/api/1.2/patches/108452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cada1fc1-dd8f-60b1-ecc2-f89262d458d4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T11:47:44","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cada1fc1-dd8f-60b1-ecc2-f89262d458d4@arm.com/mbox/"},{"id":108458,"url":"https://patchwork.plctlab.org/api/1.2/patches/108458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnYjq-C1-hm022qLkqSXfDJ5dUPBgyyJb-12WQ105Zxpg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T12:10:47","name":"gcc-ar: Remove code duplication.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHyHGCnYjq-C1-hm022qLkqSXfDJ5dUPBgyyJb-12WQ105Zxpg@mail.gmail.com/mbox/"},{"id":108482,"url":"https://patchwork.plctlab.org/api/1.2/patches/108482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-1-kmatsui@cs.washington.edu/","msgid":"<20230615122129.20213-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-15T12:21:28","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-1-kmatsui@cs.washington.edu/mbox/"},{"id":108483,"url":"https://patchwork.plctlab.org/api/1.2/patches/108483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-2-kmatsui@cs.washington.edu/","msgid":"<20230615122129.20213-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-15T12:21:29","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615122129.20213-2-kmatsui@cs.washington.edu/mbox/"},{"id":108512,"url":"https://patchwork.plctlab.org/api/1.2/patches/108512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615131435.10323-1-juzhe.zhong@rivai.ai/","msgid":"<20230615131435.10323-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-15T13:14:35","name":"[V4] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615131435.10323-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108580,"url":"https://patchwork.plctlab.org/api/1.2/patches/108580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b834b2f5-e505-71be-c694-bbf529ec6bd4@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-15T15:06:39","name":"[v2] RISC-V: testsuite: Add vector_hw and zvfh_hw checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b834b2f5-e505-71be-c694-bbf529ec6bd4@gmail.com/mbox/"},{"id":108581,"url":"https://patchwork.plctlab.org/api/1.2/patches/108581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com/","msgid":"<56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com>","list_archive_url":null,"date":"2023-06-15T15:10:24","name":"[v2] RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56ca29ea-febe-c410-c042-2067b0e68dfa@gmail.com/mbox/"},{"id":108582,"url":"https://patchwork.plctlab.org/api/1.2/patches/108582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com/","msgid":"<64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com>","list_archive_url":null,"date":"2023-06-15T15:12:36","name":"[v2] RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64cd759b-d2c2-121d-b960-4a806b8da27a@gmail.com/mbox/"},{"id":108583,"url":"https://patchwork.plctlab.org/api/1.2/patches/108583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn04eoyd.fsf@euler.schwinge.homeip.net/","msgid":"<87wn04eoyd.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T15:15:54","name":"Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wn04eoyd.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108604,"url":"https://patchwork.plctlab.org/api/1.2/patches/108604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttv8engy.fsf@euler.schwinge.homeip.net/","msgid":"<87ttv8engy.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T15:47:57","name":"Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttv8engy.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108607,"url":"https://patchwork.plctlab.org/api/1.2/patches/108607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com/","msgid":"<004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-15T16:00:35","name":"[ver,2] rs6000, fix vec_replace_unaligned builtin arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004d44c3139e2af8c70ed57a4cb813a6b1cf3d67.camel@us.ibm.com/mbox/"},{"id":108611,"url":"https://patchwork.plctlab.org/api/1.2/patches/108611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qcemq3.fsf@euler.schwinge.homeip.net/","msgid":"<87r0qcemq3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-15T16:04:04","name":"Skip a number of C++ '\''g++.dg/tree-prof/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0qcemq3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":108624,"url":"https://patchwork.plctlab.org/api/1.2/patches/108624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73715f12-dedd-ba1f-3048-7af791860768@redhat.com/","msgid":"<73715f12-dedd-ba1f-3048-7af791860768@redhat.com>","list_archive_url":null,"date":"2023-06-15T16:22:38","name":"PR tree-optimization/110266 - Check for integer only complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73715f12-dedd-ba1f-3048-7af791860768@redhat.com/mbox/"},{"id":108664,"url":"https://patchwork.plctlab.org/api/1.2/patches/108664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615172817.3587006-1-manolis.tsamis@vrull.eu/","msgid":"<20230615172817.3587006-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-06-15T17:28:16","name":"[v2] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615172817.3587006-1-manolis.tsamis@vrull.eu/mbox/"},{"id":108669,"url":"https://patchwork.plctlab.org/api/1.2/patches/108669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615175625.3544115-1-apinski@marvell.com/","msgid":"<20230615175625.3544115-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-15T17:56:25","name":"Add another testcase for PR 110266","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230615175625.3544115-1-apinski@marvell.com/mbox/"},{"id":108774,"url":"https://patchwork.plctlab.org/api/1.2/patches/108774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616010138.1047991-1-dmalcolm@redhat.com/","msgid":"<20230616010138.1047991-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-16T01:01:38","name":"[pushed] c: add name hints to c_parser_declspecs [PR107583]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616010138.1047991-1-dmalcolm@redhat.com/mbox/"},{"id":108781,"url":"https://patchwork.plctlab.org/api/1.2/patches/108781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-1-hongtao.liu@intel.com/","msgid":"<20230616020958.1413585-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-16T02:09:57","name":"[1/2] Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_truncate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-1-hongtao.liu@intel.com/mbox/"},{"id":108782,"url":"https://patchwork.plctlab.org/api/1.2/patches/108782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-2-hongtao.liu@intel.com/","msgid":"<20230616020958.1413585-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-16T02:09:58","name":"[2/2] Refined 256/512-bit vpacksswb/vpackssdw patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616020958.1413585-2-hongtao.liu@intel.com/mbox/"},{"id":108819,"url":"https://patchwork.plctlab.org/api/1.2/patches/108819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616043157.1713-1-shihua@iscas.ac.cn/","msgid":"<20230616043157.1713-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-16T04:31:57","name":"Add bfloat16_t support for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616043157.1713-1-shihua@iscas.ac.cn/mbox/"},{"id":108830,"url":"https://patchwork.plctlab.org/api/1.2/patches/108830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b59a0cfa-20bb-1a5b-75ec-3b237b977b29@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T06:19:59","name":"[v2] x86: correct and improve \"*vec_dupv2di\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b59a0cfa-20bb-1a5b-75ec-3b237b977b29@suse.com/mbox/"},{"id":108831,"url":"https://patchwork.plctlab.org/api/1.2/patches/108831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a342d677-867e-e5a2-dd56-b6ba784c1d50@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T06:22:16","name":"[v2] x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a342d677-867e-e5a2-dd56-b6ba784c1d50@suse.com/mbox/"},{"id":108893,"url":"https://patchwork.plctlab.org/api/1.2/patches/108893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616072834.3754201-1-pan2.li@intel.com/","msgid":"<20230616072834.3754201-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T07:28:34","name":"[v1] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616072834.3754201-1-pan2.li@intel.com/mbox/"},{"id":108918,"url":"https://patchwork.plctlab.org/api/1.2/patches/108918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616075916.141968-1-juzhe.zhong@rivai.ai/","msgid":"<20230616075916.141968-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T07:59:16","name":"RISC-V: Fix PR 110264","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616075916.141968-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108919,"url":"https://patchwork.plctlab.org/api/1.2/patches/108919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080231.142845-1-juzhe.zhong@rivai.ai/","msgid":"<20230616080231.142845-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T08:02:31","name":"RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080231.142845-1-juzhe.zhong@rivai.ai/mbox/"},{"id":108922,"url":"https://patchwork.plctlab.org/api/1.2/patches/108922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080932.4190921-1-pan2.li@intel.com/","msgid":"<20230616080932.4190921-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T08:09:32","name":"[v2] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616080932.4190921-1-pan2.li@intel.com/mbox/"},{"id":108923,"url":"https://patchwork.plctlab.org/api/1.2/patches/108923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616081455.1697928-1-guojiufu@linux.ibm.com/","msgid":"<20230616081455.1697928-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T08:14:55","name":"Check SCALAR_INT_MODE_P in try_const_anchors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616081455.1697928-1-guojiufu@linux.ibm.com/mbox/"},{"id":108926,"url":"https://patchwork.plctlab.org/api/1.2/patches/108926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616082558.855921330B@imap2.suse-dmz.suse.de/","msgid":"<20230616082558.855921330B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T08:25:58","name":"tree-optimization/110269 - restore missed condition folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616082558.855921330B@imap2.suse-dmz.suse.de/mbox/"},{"id":108928,"url":"https://patchwork.plctlab.org/api/1.2/patches/108928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616083412.1877704-1-guojiufu@linux.ibm.com/","msgid":"<20230616083412.1877704-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T08:34:12","name":"[V3,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616083412.1877704-1-guojiufu@linux.ibm.com/mbox/"},{"id":108934,"url":"https://patchwork.plctlab.org/api/1.2/patches/108934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616085443.1AF5A3854E5B@sourceware.org/","msgid":"<20230616085443.1AF5A3854E5B@sourceware.org>","list_archive_url":null,"date":"2023-06-16T08:53:45","name":"[2/2,v2] AVX512 fully masked vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616085443.1AF5A3854E5B@sourceware.org/mbox/"},{"id":108985,"url":"https://patchwork.plctlab.org/api/1.2/patches/108985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616093125.196342-1-juzhe.zhong@rivai.ai/","msgid":"<20230616093125.196342-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T09:31:25","name":"[V5] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616093125.196342-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109031,"url":"https://patchwork.plctlab.org/api/1.2/patches/109031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616102912.262207-1-juzhe.zhong@rivai.ai/","msgid":"<20230616102912.262207-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-16T10:29:12","name":"[V6] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616102912.262207-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109050,"url":"https://patchwork.plctlab.org/api/1.2/patches/109050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616113514.327122-1-pan2.li@intel.com/","msgid":"<20230616113514.327122-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-16T11:35:14","name":"[v1] RISC-V: Fix one warning of maybe-uninitialized in riscv-vsetvl.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616113514.327122-1-pan2.li@intel.com/mbox/"},{"id":109064,"url":"https://patchwork.plctlab.org/api/1.2/patches/109064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616114549.47732138E8@imap2.suse-dmz.suse.de/","msgid":"<20230616114549.47732138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T11:45:48","name":"tree-optimization/110278 - uns < (typeof uns)(uns != 0) is always false","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616114549.47732138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":109075,"url":"https://patchwork.plctlab.org/api/1.2/patches/109075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxOaoCXVo++78RO@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T11:58:34","name":"[v3] c++: Accept elaborated-enum-base with pedwarn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxOaoCXVo++78RO@arm.com/mbox/"},{"id":109081,"url":"https://patchwork.plctlab.org/api/1.2/patches/109081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616120214.114098-1-thiago.bauermann@linaro.org/","msgid":"<20230616120214.114098-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-06-16T12:02:14","name":"[contrib] validate_failures.py: Don'\''t consider summary line in wrong place","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616120214.114098-1-thiago.bauermann@linaro.org/mbox/"},{"id":109089,"url":"https://patchwork.plctlab.org/api/1.2/patches/109089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616123424.B38AC1330B@imap2.suse-dmz.suse.de/","msgid":"<20230616123424.B38AC1330B@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-16T12:34:24","name":"tree-optimization/110243 - kill off IVOPTs split_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616123424.B38AC1330B@imap2.suse-dmz.suse.de/mbox/"},{"id":109125,"url":"https://patchwork.plctlab.org/api/1.2/patches/109125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4438c7c-4aca-23a6-5482-464bc5eb0f14@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T13:29:36","name":"[v3] RISC-V: Add autovec FP binary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4438c7c-4aca-23a6-5482-464bc5eb0f14@gmail.com/mbox/"},{"id":109126,"url":"https://patchwork.plctlab.org/api/1.2/patches/109126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com/","msgid":"<4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com>","list_archive_url":null,"date":"2023-06-16T13:32:09","name":"[v3] RISC-V: Add autovec FP unary operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4288ccbd-68dd-a58d-c068-e352111f21bc@gmail.com/mbox/"},{"id":109134,"url":"https://patchwork.plctlab.org/api/1.2/patches/109134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com/","msgid":"<0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com>","list_archive_url":null,"date":"2023-06-16T13:41:45","name":"[v2] RISC-V: Implement vec_set and vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f6bc554-5685-c8ad-9ac8-1a9af8612e49@gmail.com/mbox/"},{"id":109135,"url":"https://patchwork.plctlab.org/api/1.2/patches/109135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com/","msgid":"<675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com>","list_archive_url":null,"date":"2023-06-16T13:43:16","name":"[wwwdocs] gcc-14/changes.htm - Offloading: -lm/-lgfortran is autolinked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/675b9052-5688-6079-2300-86e51f7939b1@codesourcery.com/mbox/"},{"id":109171,"url":"https://patchwork.plctlab.org/api/1.2/patches/109171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxwDtDoomPI9d5n@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-16T14:22:06","name":"tree-ssa-math-opts: Fix up uaddc/usubc pattern matching [PR110271]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxwDtDoomPI9d5n@tucnak/mbox/"},{"id":109172,"url":"https://patchwork.plctlab.org/api/1.2/patches/109172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxyz4SrwyW7130U@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-16T14:33:51","name":"builtins: Add support for clang compatible __builtin_{add,sub}c{,l,ll} [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZIxyz4SrwyW7130U@tucnak/mbox/"},{"id":109192,"url":"https://patchwork.plctlab.org/api/1.2/patches/109192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com/","msgid":"<7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com>","list_archive_url":null,"date":"2023-06-16T15:18:46","name":"[pushed,RA,PR110215] Ignore conflicts for some pseudos from insns throwing a final exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f146c00-3d24-32d9-6de7-e8bdb8128e53@redhat.com/mbox/"},{"id":109218,"url":"https://patchwork.plctlab.org/api/1.2/patches/109218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com/","msgid":"<91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com>","list_archive_url":null,"date":"2023-06-16T15:57:10","name":"[committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91bb9136-f8a4-e516-3f42-ed6d66dc8ce0@codesourcery.com/mbox/"},{"id":109223,"url":"https://patchwork.plctlab.org/api/1.2/patches/109223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-1-murphyp@linux.ibm.com/","msgid":"<20230616160002.1854983-1-murphyp@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T16:00:01","name":"[1/2] go: update usage of TARGET_AIX to TARGET_AIX_OS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-1-murphyp@linux.ibm.com/mbox/"},{"id":109224,"url":"https://patchwork.plctlab.org/api/1.2/patches/109224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-2-murphyp@linux.ibm.com/","msgid":"<20230616160002.1854983-2-murphyp@linux.ibm.com>","list_archive_url":null,"date":"2023-06-16T16:00:02","name":"[2/2] rust: update usage of TARGET_AIX to TARGET_AIX_OS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230616160002.1854983-2-murphyp@linux.ibm.com/mbox/"},{"id":109236,"url":"https://patchwork.plctlab.org/api/1.2/patches/109236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rcj4c57.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:15:00","name":"Regenerate some autotools generated files (Was: Re: [PATCH v3] configure: Implement --enable-host-pie)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri68rcj4c57.fsf@suse.cz/mbox/"},{"id":109244,"url":"https://patchwork.plctlab.org/api/1.2/patches/109244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca7ca81-2c2e-4e2e-ce33-17f6289fc31a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:17:18","name":"OpenMP (C/C++): Keep pointer value of unmapped ptr with default mapping [PR110270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cca7ca81-2c2e-4e2e-ce33-17f6289fc31a@codesourcery.com/mbox/"},{"id":109245,"url":"https://patchwork.plctlab.org/api/1.2/patches/109245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jn74c08.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-06-16T16:17:59","name":"ipa-sra: Disable candidates with no known callers (PR 110276)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jn74c08.fsf@suse.cz/mbox/"},{"id":109250,"url":"https://patchwork.plctlab.org/api/1.2/patches/109250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com/","msgid":"<033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-16T16:27:17","name":"[x86_64] Two minor tweaks to ix86_expand_move.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/033d01d9a06f$6bdf2360$439d6a20$@nextmovesoftware.com/mbox/"},{"id":109293,"url":"https://patchwork.plctlab.org/api/1.2/patches/109293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com/","msgid":"<4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-16T17:57:19","name":"[ver,5] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4af2fbd155c4d2dbbf06335c390bc26efb1b37fd.camel@us.ibm.com/mbox/"},{"id":109333,"url":"https://patchwork.plctlab.org/api/1.2/patches/109333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQMgax3RS-nT0ac+J+7ZFqJ-BZEF-200SmHDWtxagL1w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-16T19:30:26","name":"libgo patch committed: Add benchmarks and examples to test list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQMgax3RS-nT0ac+J+7ZFqJ-BZEF-200SmHDWtxagL1w@mail.gmail.com/mbox/"},{"id":109439,"url":"https://patchwork.plctlab.org/api/1.2/patches/109439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJyZDofE5VhYpCgKKyHg8YSQBLBZMYJspfJ40Kf6J+PcA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-17T09:14:43","name":"[fortran] PR107900 Select type with intrinsic type inside associate causes ICE / Segmenation fault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJyZDofE5VhYpCgKKyHg8YSQBLBZMYJspfJ40Kf6J+PcA@mail.gmail.com/mbox/"},{"id":109504,"url":"https://patchwork.plctlab.org/api/1.2/patches/109504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617142325.2939112-1-pan2.li@intel.com/","msgid":"<20230617142325.2939112-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-17T14:23:25","name":"[v1] RISC-V: Bugfix for RVV float reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617142325.2939112-1-pan2.li@intel.com/mbox/"},{"id":109557,"url":"https://patchwork.plctlab.org/api/1.2/patches/109557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617225328.1175357-1-juzhe.zhong@rivai.ai/","msgid":"<20230617225328.1175357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-17T22:53:28","name":"[V7] VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230617225328.1175357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109566,"url":"https://patchwork.plctlab.org/api/1.2/patches/109566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618025732.717902-1-pan2.li@intel.com/","msgid":"<20230618025732.717902-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-18T02:57:32","name":"[v2] RISC-V: Bugfix for RVV float reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618025732.717902-1-pan2.li@intel.com/mbox/"},{"id":109578,"url":"https://patchwork.plctlab.org/api/1.2/patches/109578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp/","msgid":"<9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp>","list_archive_url":null,"date":"2023-06-18T07:07:12","name":"[1/2] xtensa: Remove TARGET_MEMORY_MOVE_COST hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e970f70-52e4-183e-b6af-91f62607793d@yahoo.co.jp/mbox/"},{"id":109577,"url":"https://patchwork.plctlab.org/api/1.2/patches/109577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfbb27df-1afd-2dbc-ffc5-a5143f6ccd2d@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-06-18T07:09:10","name":"[2/2] xtensa: constantsynth: Add new 2-insns synthesis pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfbb27df-1afd-2dbc-ffc5-a5143f6ccd2d@yahoo.co.jp/mbox/"},{"id":109593,"url":"https://patchwork.plctlab.org/api/1.2/patches/109593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com/","msgid":"<005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T09:05:48","name":"[x86] Standardize shift amount constants as QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005501d9a1c4$1443cd30$3ccb6790$@nextmovesoftware.com/mbox/"},{"id":109594,"url":"https://patchwork.plctlab.org/api/1.2/patches/109594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com/","msgid":"<006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T09:35:28","name":"[x86] Add alternate representation for {and,or,xor}b %ah,%dh.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006c01d9a1c8$38d0cf00$aa726d00$@nextmovesoftware.com/mbox/"},{"id":109597,"url":"https://patchwork.plctlab.org/api/1.2/patches/109597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com/","msgid":"<008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T10:22:46","name":"Improved SUBREG simplifications in simplify-rtx.cc'\''s simplify_subreg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com/mbox/"},{"id":109599,"url":"https://patchwork.plctlab.org/api/1.2/patches/109599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com/","msgid":"<000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T11:10:00","name":"[x86] Refactor new ix86_expand_carry to set the carry flag.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000f01d9a1d5$6d676960$48363c20$@nextmovesoftware.com/mbox/"},{"id":109600,"url":"https://patchwork.plctlab.org/api/1.2/patches/109600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618114157.3451886-1-lehua.ding@rivai.ai/","msgid":"<20230618114157.3451886-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-18T11:41:57","name":"RISC-V: Add tuple vector mode psABI checking and simplify code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618114157.3451886-1-lehua.ding@rivai.ai/mbox/"},{"id":109615,"url":"https://patchwork.plctlab.org/api/1.2/patches/109615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com/","msgid":"<002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-18T13:20:32","name":"[RFC] Workaround LRA reload issue with SUBREGs in SET_DEST.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002001d9a1e7$aa0daac0$fe290040$@nextmovesoftware.com/mbox/"},{"id":109629,"url":"https://patchwork.plctlab.org/api/1.2/patches/109629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618151329.1814812-1-pan2.li@intel.com/","msgid":"<20230618151329.1814812-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-18T15:13:29","name":"[v1] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618151329.1814812-1-pan2.li@intel.com/mbox/"},{"id":109631,"url":"https://patchwork.plctlab.org/api/1.2/patches/109631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI8owVx4aDXxwB8Y@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T15:54:41","name":"Optimize std::max early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI8owVx4aDXxwB8Y@kam.mff.cuni.cz/mbox/"},{"id":109638,"url":"https://patchwork.plctlab.org/api/1.2/patches/109638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com/","msgid":"<24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com>","list_archive_url":null,"date":"2023-06-18T17:29:08","name":"[committed] Fix arc assumption that insns are not re-recognized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24934666-4ca0-54c0-1811-c47a4ff1e439@gmail.com/mbox/"},{"id":109650,"url":"https://patchwork.plctlab.org/api/1.2/patches/109650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9MmdQ+OMehcdeg@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T18:27:37","name":"[libstdc++] Improve M_check_len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9MmdQ+OMehcdeg@kam.mff.cuni.cz/mbox/"},{"id":109660,"url":"https://patchwork.plctlab.org/api/1.2/patches/109660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aaAs9mnx3-+UKoXfVU8b6kZmn_HE0QivSzfYL62rpHdQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-18T20:12:11","name":"[COMMITTED] RTL: Change return type of predicate and callback functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aaAs9mnx3-+UKoXfVU8b6kZmn_HE0QivSzfYL62rpHdQ@mail.gmail.com/mbox/"},{"id":109661,"url":"https://patchwork.plctlab.org/api/1.2/patches/109661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9phUDoOu81ivtb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-18T20:31:01","name":"Extend fnsummary to predict SRA oppurtunities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZI9phUDoOu81ivtb@kam.mff.cuni.cz/mbox/"},{"id":109697,"url":"https://patchwork.plctlab.org/api/1.2/patches/109697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618230645.3673843-1-juzhe.zhong@rivai.ai/","msgid":"<20230618230645.3673843-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-18T23:06:45","name":"RISC-V: Add VLS modes for GNU vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230618230645.3673843-1-juzhe.zhong@rivai.ai/mbox/"},{"id":109702,"url":"https://patchwork.plctlab.org/api/1.2/patches/109702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc68688-7292-f739-5ad4-a2367b6e18bc@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T01:14:55","name":"[rs6000] Generate mfvsrwz for all platforms and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/acc68688-7292-f739-5ad4-a2367b6e18bc@linux.ibm.com/mbox/"},{"id":109724,"url":"https://patchwork.plctlab.org/api/1.2/patches/109724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619042617.31605-1-xuli1@eswincomputing.com/","msgid":"<20230619042617.31605-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-19T04:26:17","name":"RISC-V: Fix iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619042617.31605-1-xuli1@eswincomputing.com/mbox/"},{"id":109733,"url":"https://patchwork.plctlab.org/api/1.2/patches/109733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619055257.15858-1-xuli1@eswincomputing.com/","msgid":"<20230619055257.15858-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-19T05:52:57","name":"[v2] RISC-V: Fix VWEXTF iterator requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619055257.15858-1-xuli1@eswincomputing.com/mbox/"},{"id":109740,"url":"https://patchwork.plctlab.org/api/1.2/patches/109740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619062903.7E5103858415@sourceware.org/","msgid":"<20230619062903.7E5103858415@sourceware.org>","list_archive_url":null,"date":"2023-06-19T06:28:18","name":"Remove -save-temps from tests using -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619062903.7E5103858415@sourceware.org/mbox/"},{"id":109743,"url":"https://patchwork.plctlab.org/api/1.2/patches/109743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619064650.1410831-1-pan2.li@intel.com/","msgid":"<20230619064650.1410831-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T06:46:50","name":"[v2] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619064650.1410831-1-pan2.li@intel.com/mbox/"},{"id":109749,"url":"https://patchwork.plctlab.org/api/1.2/patches/109749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAIBuJCa6OWrM0x@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-19T07:47:18","name":"Tiny phiprop compile time optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAIBuJCa6OWrM0x@kam.mff.cuni.cz/mbox/"},{"id":109752,"url":"https://patchwork.plctlab.org/api/1.2/patches/109752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAJMPiUB4oxqZBR@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-19T07:52:16","name":"Do not account __builtin_unreachable guards in inliner","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJAJMPiUB4oxqZBR@kam.mff.cuni.cz/mbox/"},{"id":109758,"url":"https://patchwork.plctlab.org/api/1.2/patches/109758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0bce677-da4f-3ccd-d220-ef2e2bbba877@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:02:58","name":"[committed] libgomp.c/target-51.c: Accept more error-msg variants in dg-output (was: Re: [committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0bce677-da4f-3ccd-d220-ef2e2bbba877@codesourcery.com/mbox/"},{"id":109761,"url":"https://patchwork.plctlab.org/api/1.2/patches/109761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619080710.1536456-1-pan2.li@intel.com/","msgid":"<20230619080710.1536456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T08:07:10","name":"[v1] RISC-V: Fix out of range memory access when lto mode init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619080710.1536456-1-pan2.li@intel.com/mbox/"},{"id":109791,"url":"https://patchwork.plctlab.org/api/1.2/patches/109791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:50","name":"[v4,1/9] MIPS: Add basic support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3693ea791d430451a66ad39fb7050d0d3cbc703b.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109794,"url":"https://patchwork.plctlab.org/api/1.2/patches/109794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0f3e929f438106b51a1dcbe7a7c762bd90e1933.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:29:51","name":"[v4,2/9] MIPS: Add MOVx instructions support for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0f3e929f438106b51a1dcbe7a7c762bd90e1933.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109773,"url":"https://patchwork.plctlab.org/api/1.2/patches/109773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:52","name":"[v4,3/9] MIPS: Add instruction about global pointer register for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/110e80ba4273b314e80f576906d3ef37a2b97f8f.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109795,"url":"https://patchwork.plctlab.org/api/1.2/patches/109795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:53","name":"[v4,4/9] MIPS: Add bitwise instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/030d4fdfe082a5a76f469e21117389acd4a9b0eb.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109774,"url":"https://patchwork.plctlab.org/api/1.2/patches/109774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:54","name":"[v4,5/9] MIPS: Add LUI instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/041a36a59f72a2b9a3f3a15f8362dffc0c3be803.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109789,"url":"https://patchwork.plctlab.org/api/1.2/patches/109789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:55","name":"[v4,6/9] MIPS: Add load/store word left/right instructions for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d133575663a34329b415d1790389b537b9ad2e1.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109777,"url":"https://patchwork.plctlab.org/api/1.2/patches/109777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9d3a87f14aed2af9b637e639128ca7c2e1ae1d1.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:29:56","name":"[v4,7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9d3a87f14aed2af9b637e639128ca7c2e1ae1d1.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109790,"url":"https://patchwork.plctlab.org/api/1.2/patches/109790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:57","name":"[v4,8/9] MIPS: Add CACHE instruction for mips16e2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/750f5b2659f8df3cebf3565f6131c05a1c7c1d4c.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109784,"url":"https://patchwork.plctlab.org/api/1.2/patches/109784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com/","msgid":"<647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-06-19T08:29:58","name":"[v4,9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/647bd72134fcf571ec40ddcb0f42997d88d0979b.1687162620.git.jie.mei@oss.cipunited.com/mbox/"},{"id":109796,"url":"https://patchwork.plctlab.org/api/1.2/patches/109796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619083603.151CC385354A@sourceware.org/","msgid":"<20230619083603.151CC385354A@sourceware.org>","list_archive_url":null,"date":"2023-06-19T08:34:59","name":"Fix build of aarc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619083603.151CC385354A@sourceware.org/mbox/"},{"id":109819,"url":"https://patchwork.plctlab.org/api/1.2/patches/109819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rcfc039.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T08:44:58","name":"[committed] vect: Restore aarch64 bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8rcfc039.fsf@arm.com/mbox/"},{"id":109829,"url":"https://patchwork.plctlab.org/api/1.2/patches/109829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com/","msgid":"<96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T08:56:52","name":"[committed] Doc update: -foffload-options= examples + OpenMP in Fortran intrinsic modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96ff8db2-cd00-b7cb-6818-06a4ef1c160b@codesourcery.com/mbox/"},{"id":109831,"url":"https://patchwork.plctlab.org/api/1.2/patches/109831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090548.1574008-1-pan2.li@intel.com/","msgid":"<20230619090548.1574008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-19T09:05:48","name":"RISC-V: Fix out of range memory access of machine mode table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090548.1574008-1-pan2.li@intel.com/mbox/"},{"id":109834,"url":"https://patchwork.plctlab.org/api/1.2/patches/109834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090743.ADDD63858C78@sourceware.org/","msgid":"<20230619090743.ADDD63858C78@sourceware.org>","list_archive_url":null,"date":"2023-06-19T09:06:46","name":"tree-optimization/110298 - CFG cleanup and stale nb_iterations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619090743.ADDD63858C78@sourceware.org/mbox/"},{"id":109888,"url":"https://patchwork.plctlab.org/api/1.2/patches/109888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619101609.63E4F385840D@sourceware.org/","msgid":"<20230619101609.63E4F385840D@sourceware.org>","list_archive_url":null,"date":"2023-06-19T10:15:25","name":"debug/110295 - mixed up early/late debug for member DIEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619101609.63E4F385840D@sourceware.org/mbox/"},{"id":109898,"url":"https://patchwork.plctlab.org/api/1.2/patches/109898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5wveomg.fsf@euler.schwinge.homeip.net/","msgid":"<87a5wveomg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-19T10:24:23","name":"Fix DejaGnu directive syntax error in '\''libgomp.c/target-51.c'\'' (was: [committed] libgomp.c/target-51.c: Accept more error-msg variants in dg-output (was: Re: [committed] libgomp: Fix OMP_TARGET_OFFLOAD=mandatory))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5wveomg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":109903,"url":"https://patchwork.plctlab.org/api/1.2/patches/109903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T10:32:41","name":"Do not allow \"x + 0.0\" to \"x\" optimization with -fsignaling-nans","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com/mbox/"},{"id":109937,"url":"https://patchwork.plctlab.org/api/1.2/patches/109937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com/","msgid":"<01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T11:37:37","name":"[committed] amdgcn: Delete inactive libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01a623dc-887b-75d6-48ce-b132a8ba867c@codesourcery.com/mbox/"},{"id":109938,"url":"https://patchwork.plctlab.org/api/1.2/patches/109938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/afd440fa-a7b9-a539-9056-7f9e85060ef0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T11:37:52","name":"[committed] amdgcn: minimal V64TImode vector support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/afd440fa-a7b9-a539-9056-7f9e85060ef0@codesourcery.com/mbox/"},{"id":109939,"url":"https://patchwork.plctlab.org/api/1.2/patches/109939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com/","msgid":"<6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T11:38:09","name":"[committed] amdgcn: implement vector div and mod libfuncs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6531796c-78a2-c8d3-48a3-0d0e62712c8a@codesourcery.com/mbox/"},{"id":109966,"url":"https://patchwork.plctlab.org/api/1.2/patches/109966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619123606.2F5E73858431@sourceware.org/","msgid":"<20230619123606.2F5E73858431@sourceware.org>","list_archive_url":null,"date":"2023-06-19T12:35:21","name":"[i386] Reject too large vectors for partial vector vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619123606.2F5E73858431@sourceware.org/mbox/"},{"id":110034,"url":"https://patchwork.plctlab.org/api/1.2/patches/110034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619142356.345159-1-stefansf@linux.ibm.com/","msgid":"<20230619142356.345159-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-06-19T14:23:57","name":"[v2] combine: Narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619142356.345159-1-stefansf@linux.ibm.com/mbox/"},{"id":110040,"url":"https://patchwork.plctlab.org/api/1.2/patches/110040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+DWEukOn4iktqvvmoT+p6u+dh_DrmFVd7i4Mv9nBr9A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T14:46:18","name":"[committed] recog: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+DWEukOn4iktqvvmoT+p6u+dh_DrmFVd7i4Mv9nBr9A@mail.gmail.com/mbox/"},{"id":110084,"url":"https://patchwork.plctlab.org/api/1.2/patches/110084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com/","msgid":"<42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-19T15:57:32","name":"rs6000, __builtin_set_fpscr_rn add retrun value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42d27e659f56f16796c6bfab0799616bbdf6046a.camel@us.ibm.com/mbox/"},{"id":110094,"url":"https://patchwork.plctlab.org/api/1.2/patches/110094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619161705.251983-1-juzhe.zhong@rivai.ai/","msgid":"<20230619161705.251983-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-19T16:17:05","name":"VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619161705.251983-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110139,"url":"https://patchwork.plctlab.org/api/1.2/patches/110139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com/","msgid":"<35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-19T18:54:03","name":"[ver,6] rs6000: Add builtins for IEEE 128-bit floating point values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35552b6539d3469d7f74dbd9ec75061515a1d61c.camel@us.ibm.com/mbox/"},{"id":110163,"url":"https://patchwork.plctlab.org/api/1.2/patches/110163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com/","msgid":"<6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:25","name":"[01/14] Revert \"Assumed-size arrays with non-lexical data mappings\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5055a3ff4c70e5d9f312aca7e1c25363ba3d01.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110162,"url":"https://patchwork.plctlab.org/api/1.2/patches/110162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com/","msgid":"<82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:26","name":"[02/14] Revert \"Fix references declared in lexically-enclosing OpenACC data region\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/82b9a9c54f5ccea9b47afa4d4725241675a13228.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110164,"url":"https://patchwork.plctlab.org/api/1.2/patches/110164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com/","msgid":"<8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:27","name":"[03/14] Revert \"Fix implicit mapping for array slices on lexically-enclosing data constructs (PR70828)\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cd8053d9ca0e137abdeafd9733bd7253c44fdf9.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110161,"url":"https://patchwork.plctlab.org/api/1.2/patches/110161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com/","msgid":"<8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:28","name":"[04/14] Revert \"openmp: Handle C/C++ array reference base-pointers in array sections\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8db32dad90f031f27674ee9913f8db04046fa6d6.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110166,"url":"https://patchwork.plctlab.org/api/1.2/patches/110166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com/","msgid":"<62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:29","name":"[05/14] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62d6b93cf29c7d14e84013d31f38a28643bd998b.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110172,"url":"https://patchwork.plctlab.org/api/1.2/patches/110172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com/","msgid":"<8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:30","name":"[06/14] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b4918bb91c9d5abb0edf508190de177506b6c4b.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110165,"url":"https://patchwork.plctlab.org/api/1.2/patches/110165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/efe6a75a4f15d6d227478d2f2cd6e4a0e2b4a8c0.1687201315.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:31","name":"[07/14] OpenMP: implicitly map base pointer for array-section pointer components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/efe6a75a4f15d6d227478d2f2cd6e4a0e2b4a8c0.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110176,"url":"https://patchwork.plctlab.org/api/1.2/patches/110176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9312554aa15cd93c3e463f9dee84daccba31a67.1687201315.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:32","name":"[08/14] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9312554aa15cd93c3e463f9dee84daccba31a67.1687201315.git.julian@codesourcery.com/mbox/"},{"id":110173,"url":"https://patchwork.plctlab.org/api/1.2/patches/110173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com/","msgid":"<4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:33","name":"[09/14] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dc77f7c7e42290386fd15e23d67193f545113b5.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110177,"url":"https://patchwork.plctlab.org/api/1.2/patches/110177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com/","msgid":"<345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:34","name":"[10/14] OpenMP/OpenACC: Reorganise OMP map clause handling in gimplify.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/345e85675373f726303ba13847253a5376687608.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110178,"url":"https://patchwork.plctlab.org/api/1.2/patches/110178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com/","msgid":"<77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:35","name":"[11/14] OpenACC: Reimplement \"inheritance\" for lexically-nested offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/77c0972c0e363b485b5fe1aa57f40221794a25ac.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110179,"url":"https://patchwork.plctlab.org/api/1.2/patches/110179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com/","msgid":"<8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:36","name":"[12/14] OpenACC: \"declare create\" fixes wrt. \"allocatable\" variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c5fc0e8a53e228dbf299ba1ee824bf8fbcc06c8.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110167,"url":"https://patchwork.plctlab.org/api/1.2/patches/110167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com/","msgid":"<2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-19T21:17:37","name":"[13/14] OpenACC: Allow implicit uses of assumed-size arrays in offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cc6dd851955f96cf0e11c419b5105a5c0be6940.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110171,"url":"https://patchwork.plctlab.org/api/1.2/patches/110171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a02f67664b5ffd7c70dc1cd251673e40fbc2b569.1687201316.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T21:17:38","name":"[14/14] OpenACC: Improve implicit mapping for non-lexically nested offload regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a02f67664b5ffd7c70dc1cd251673e40fbc2b569.1687201316.git.julian@codesourcery.com/mbox/"},{"id":110180,"url":"https://patchwork.plctlab.org/api/1.2/patches/110180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7505008-3132-20e0-da7b-00ec1ee66cc3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-19T22:34:28","name":"[PR,target/110201] Fix operand types for various scalar crypto insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7505008-3132-20e0-da7b-00ec1ee66cc3@gmail.com/mbox/"},{"id":110181,"url":"https://patchwork.plctlab.org/api/1.2/patches/110181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619230406.308938-1-juzhe.zhong@rivai.ai/","msgid":"<20230619230406.308938-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-19T23:04:06","name":"RISC-V: Fix fails of testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230619230406.308938-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110242,"url":"https://patchwork.plctlab.org/api/1.2/patches/110242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620031450.146303-1-juzhe.zhong@rivai.ai/","msgid":"<20230620031450.146303-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T03:14:50","name":"RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620031450.146303-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110246,"url":"https://patchwork.plctlab.org/api/1.2/patches/110246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240FF414227232B91CACA98E85CA@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T03:58:23","name":"Change fma_reassoc_width tuning for ampere1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240FF414227232B91CACA98E85CA@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":110258,"url":"https://patchwork.plctlab.org/api/1.2/patches/110258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620060705.22235-1-xuli1@eswincomputing.com/","msgid":"<20230620060705.22235-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T06:07:05","name":"RISC-V: Set the natural size of constant vector mask modes to one RVV data vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620060705.22235-1-xuli1@eswincomputing.com/mbox/"},{"id":110262,"url":"https://patchwork.plctlab.org/api/1.2/patches/110262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620064618.31141-1-xuli1@eswincomputing.com/","msgid":"<20230620064618.31141-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T06:46:18","name":"[v2] RISC-V: Set the natural size of constant vector mask modes to one RVV data vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620064618.31141-1-xuli1@eswincomputing.com/mbox/"},{"id":110264,"url":"https://patchwork.plctlab.org/api/1.2/patches/110264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620070039.10D7638582A3@sourceware.org/","msgid":"<20230620070039.10D7638582A3@sourceware.org>","list_archive_url":null,"date":"2023-06-20T06:59:55","name":"Improve DSE to handle stores before __builtin_unreachable ()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620070039.10D7638582A3@sourceware.org/mbox/"},{"id":110265,"url":"https://patchwork.plctlab.org/api/1.2/patches/110265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com/","msgid":"<169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com>","list_archive_url":null,"date":"2023-06-20T07:06:57","name":"[v3] x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/169ca252-3828-b466-4d47-a8fe720ec4ef@suse.com/mbox/"},{"id":110287,"url":"https://patchwork.plctlab.org/api/1.2/patches/110287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074630.1252053-1-poulhies@adacore.com/","msgid":"<20230620074630.1252053-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:30","name":"[COMMITTED] ada: Fix edge case in Ada.Calendar.Formatting.Time_Of","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074630.1252053-1-poulhies@adacore.com/mbox/"},{"id":110288,"url":"https://patchwork.plctlab.org/api/1.2/patches/110288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074642.1252250-1-poulhies@adacore.com/","msgid":"<20230620074642.1252250-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:42","name":"[COMMITTED] ada: Spurious error on package instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074642.1252250-1-poulhies@adacore.com/mbox/"},{"id":110303,"url":"https://patchwork.plctlab.org/api/1.2/patches/110303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074644.1252313-1-poulhies@adacore.com/","msgid":"<20230620074644.1252313-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:44","name":"[COMMITTED] ada: Remove references to Might_Not_Return and Always_Return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074644.1252313-1-poulhies@adacore.com/mbox/"},{"id":110292,"url":"https://patchwork.plctlab.org/api/1.2/patches/110292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074646.1252375-1-poulhies@adacore.com/","msgid":"<20230620074646.1252375-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:46","name":"[COMMITTED] ada: Pass Error_Node to calls to Error_Msg in lib-load.adb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074646.1252375-1-poulhies@adacore.com/mbox/"},{"id":110293,"url":"https://patchwork.plctlab.org/api/1.2/patches/110293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074648.1252437-1-poulhies@adacore.com/","msgid":"<20230620074648.1252437-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:48","name":"[COMMITTED] ada: Fix type derivation of subtype of derived type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074648.1252437-1-poulhies@adacore.com/mbox/"},{"id":110302,"url":"https://patchwork.plctlab.org/api/1.2/patches/110302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074650.1252499-1-poulhies@adacore.com/","msgid":"<20230620074650.1252499-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:50","name":"[COMMITTED] ada: Update annotations in runtime for proof","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074650.1252499-1-poulhies@adacore.com/mbox/"},{"id":110310,"url":"https://patchwork.plctlab.org/api/1.2/patches/110310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074652.1252564-1-poulhies@adacore.com/","msgid":"<20230620074652.1252564-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:52","name":"[COMMITTED] ada: Introduce -gnateH switch to force reverse Bit_Order threshold to 64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074652.1252564-1-poulhies@adacore.com/mbox/"},{"id":110306,"url":"https://patchwork.plctlab.org/api/1.2/patches/110306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074654.1252681-1-poulhies@adacore.com/","msgid":"<20230620074654.1252681-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:54","name":"[COMMITTED] ada: Fix -fdiagnostics-format=json not printing all messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074654.1252681-1-poulhies@adacore.com/mbox/"},{"id":110289,"url":"https://patchwork.plctlab.org/api/1.2/patches/110289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074656.1252745-1-poulhies@adacore.com/","msgid":"<20230620074656.1252745-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:56","name":"[COMMITTED] ada: Fix internal error on aggregate within container aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074656.1252745-1-poulhies@adacore.com/mbox/"},{"id":110296,"url":"https://patchwork.plctlab.org/api/1.2/patches/110296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074658.1252808-1-poulhies@adacore.com/","msgid":"<20230620074658.1252808-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:46:58","name":"[COMMITTED] ada: Small fixes to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074658.1252808-1-poulhies@adacore.com/mbox/"},{"id":110291,"url":"https://patchwork.plctlab.org/api/1.2/patches/110291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074700.1252872-1-poulhies@adacore.com/","msgid":"<20230620074700.1252872-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:00","name":"[COMMITTED] ada: Add CHERI intrinsic bindings and helper functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074700.1252872-1-poulhies@adacore.com/mbox/"},{"id":110299,"url":"https://patchwork.plctlab.org/api/1.2/patches/110299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074703.1252933-1-poulhies@adacore.com/","msgid":"<20230620074703.1252933-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:03","name":"[COMMITTED] ada: Fix fallout of fix to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074703.1252933-1-poulhies@adacore.com/mbox/"},{"id":110304,"url":"https://patchwork.plctlab.org/api/1.2/patches/110304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074705.1252998-1-poulhies@adacore.com/","msgid":"<20230620074705.1252998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:05","name":"[COMMITTED] ada: Fix bug in predicate checks with address clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074705.1252998-1-poulhies@adacore.com/mbox/"},{"id":110312,"url":"https://patchwork.plctlab.org/api/1.2/patches/110312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074707.1253060-1-poulhies@adacore.com/","msgid":"<20230620074707.1253060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:47:07","name":"[COMMITTED] ada: Fix for quantified expressions in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620074707.1253060-1-poulhies@adacore.com/mbox/"},{"id":110319,"url":"https://patchwork.plctlab.org/api/1.2/patches/110319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075205.1253127-1-poulhies@adacore.com/","msgid":"<20230620075205.1253127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:05","name":"[COMMITTED] ada: Document partition-wide Ada signal handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075205.1253127-1-poulhies@adacore.com/mbox/"},{"id":110315,"url":"https://patchwork.plctlab.org/api/1.2/patches/110315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075208.1253570-1-poulhies@adacore.com/","msgid":"<20230620075208.1253570-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:08","name":"[COMMITTED] ada: Fix for attribute Range in Exceptional_Cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075208.1253570-1-poulhies@adacore.com/mbox/"},{"id":110313,"url":"https://patchwork.plctlab.org/api/1.2/patches/110313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075210.1253631-1-poulhies@adacore.com/","msgid":"<20230620075210.1253631-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:10","name":"[COMMITTED] ada: Add the ability to add error codes to error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075210.1253631-1-poulhies@adacore.com/mbox/"},{"id":110314,"url":"https://patchwork.plctlab.org/api/1.2/patches/110314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075212.1253692-1-poulhies@adacore.com/","msgid":"<20230620075212.1253692-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:12","name":"[COMMITTED] ada: Do not issue warning on postcondition in some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075212.1253692-1-poulhies@adacore.com/mbox/"},{"id":110318,"url":"https://patchwork.plctlab.org/api/1.2/patches/110318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075214.1253753-1-poulhies@adacore.com/","msgid":"<20230620075214.1253753-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T07:52:14","name":"[COMMITTED] ada: Fix couple of issues in documentation of overflow checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620075214.1253753-1-poulhies@adacore.com/mbox/"},{"id":110317,"url":"https://patchwork.plctlab.org/api/1.2/patches/110317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17403-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T07:52:22","name":"[committed] AArch64 remove test comment from *mov_aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17403-tamar@arm.com/mbox/"},{"id":110320,"url":"https://patchwork.plctlab.org/api/1.2/patches/110320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com/","msgid":"<5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com>","list_archive_url":null,"date":"2023-06-20T07:58:36","name":"RISC-V: Fix vmul test expectation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c993a6a-d869-6d6f-2c7a-177f6d6af5c2@gmail.com/mbox/"},{"id":110347,"url":"https://patchwork.plctlab.org/api/1.2/patches/110347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a008ca07-bf69-8ea0-34f2-0f78b496624b@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T08:49:04","name":"[PATCHv4,rs6000] Add two peephole2 patterns for mr. insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a008ca07-bf69-8ea0-34f2-0f78b496624b@linux.ibm.com/mbox/"},{"id":110355,"url":"https://patchwork.plctlab.org/api/1.2/patches/110355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620085452.132059-1-juzhe.zhong@rivai.ai/","msgid":"<20230620085452.132059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T08:54:52","name":"[V2] RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620085452.132059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110356,"url":"https://patchwork.plctlab.org/api/1.2/patches/110356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620090031.140730-1-juzhe.zhong@rivai.ai/","msgid":"<20230620090031.140730-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T09:00:31","name":"[V3] RISC-V: Optimize codegen of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620090031.140730-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110371,"url":"https://patchwork.plctlab.org/api/1.2/patches/110371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-2-gaofei@eswincomputing.com/","msgid":"<20230620094052.35993-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T09:40:51","name":"[1/2] allow target to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-2-gaofei@eswincomputing.com/mbox/"},{"id":110370,"url":"https://patchwork.plctlab.org/api/1.2/patches/110370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-3-gaofei@eswincomputing.com/","msgid":"<20230620094052.35993-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-06-20T09:40:52","name":"[2/2,RISC-V] resolve confilct between zcmp multi push/pop and shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094052.35993-3-gaofei@eswincomputing.com/mbox/"},{"id":110374,"url":"https://patchwork.plctlab.org/api/1.2/patches/110374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094517.3693077-1-lehua.ding@rivai.ai/","msgid":"<20230620094517.3693077-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-20T09:45:17","name":"RISC-V: Fix compiler warning of riscv_arg_has_vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620094517.3693077-1-lehua.ding@rivai.ai/mbox/"},{"id":110386,"url":"https://patchwork.plctlab.org/api/1.2/patches/110386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnXn5ArbP9zg2Pwu-_CWb=E4f5_dx95T+bSPCb0HsnE7A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T09:54:58","name":"[SVE,match.pd] Fix ICE observed in PR110280","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnXn5ArbP9zg2Pwu-_CWb=E4f5_dx95T+bSPCb0HsnE7A@mail.gmail.com/mbox/"},{"id":110412,"url":"https://patchwork.plctlab.org/api/1.2/patches/110412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com/","msgid":"<7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com>","list_archive_url":null,"date":"2023-06-20T10:50:36","name":"Fortran'\''s gfc_match_char: %S to match symbol with host_assoc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e2f6b2d-b1e2-8aed-f9ea-11f5a72c5794@codesourcery.com/mbox/"},{"id":110413,"url":"https://patchwork.plctlab.org/api/1.2/patches/110413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620105136.106423856634@sourceware.org/","msgid":"<20230620105136.106423856634@sourceware.org>","list_archive_url":null,"date":"2023-06-20T10:50:51","name":"Update virtual SSA form manually where easily possible in phiprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620105136.106423856634@sourceware.org/mbox/"},{"id":110426,"url":"https://patchwork.plctlab.org/api/1.2/patches/110426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112620.1299203-1-poulhies@adacore.com/","msgid":"<20230620112620.1299203-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:20","name":"[COMMITTED] ada: Remove outdated comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112620.1299203-1-poulhies@adacore.com/mbox/"},{"id":110430,"url":"https://patchwork.plctlab.org/api/1.2/patches/110430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112630.1299352-1-poulhies@adacore.com/","msgid":"<20230620112630.1299352-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:30","name":"[COMMITTED] ada: Further fixes to handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112630.1299352-1-poulhies@adacore.com/mbox/"},{"id":110427,"url":"https://patchwork.plctlab.org/api/1.2/patches/110427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112633.1299451-1-poulhies@adacore.com/","msgid":"<20230620112633.1299451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:33","name":"[COMMITTED] ada: Fix crash on inlining in GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112633.1299451-1-poulhies@adacore.com/mbox/"},{"id":110428,"url":"https://patchwork.plctlab.org/api/1.2/patches/110428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112635.1299512-1-poulhies@adacore.com/","msgid":"<20230620112635.1299512-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-20T11:26:35","name":"[COMMITTED] ada: Minor tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620112635.1299512-1-poulhies@adacore.com/mbox/"},{"id":110446,"url":"https://patchwork.plctlab.org/api/1.2/patches/110446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4a57c42-39fa-dc2a-de09-213f045edf40@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T12:01:48","name":"[committed] Fortran: Fix parse-dump-tree for OpenMP ALLOCATE clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4a57c42-39fa-dc2a-de09-213f045edf40@codesourcery.com/mbox/"},{"id":110459,"url":"https://patchwork.plctlab.org/api/1.2/patches/110459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com/","msgid":"<8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com>","list_archive_url":null,"date":"2023-06-20T12:47:43","name":"RISC-V: Implement autovec copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ea7c935-ee31-db3d-9672-14833b63d3b0@gmail.com/mbox/"},{"id":110498,"url":"https://patchwork.plctlab.org/api/1.2/patches/110498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620133858.166497-1-jwakely@redhat.com/","msgid":"<20230620133858.166497-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-20T13:38:58","name":"libstdc++: Use RAII in std::vector::_M_realloc_insert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620133858.166497-1-jwakely@redhat.com/mbox/"},{"id":110504,"url":"https://patchwork.plctlab.org/api/1.2/patches/110504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620134221.181173-1-juzhe.zhong@rivai.ai/","msgid":"<20230620134221.181173-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T13:42:21","name":"[V2] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620134221.181173-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110553,"url":"https://patchwork.plctlab.org/api/1.2/patches/110553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620150626.269383-1-juzhe.zhong@rivai.ai/","msgid":"<20230620150626.269383-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-20T15:06:26","name":"[V3] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620150626.269383-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110585,"url":"https://patchwork.plctlab.org/api/1.2/patches/110585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-2-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:44","name":"[V10,1/3] Introduce IR bit TYPE_INCLUDES_FLEXARRAY for the GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-2-qing.zhao@oracle.com/mbox/"},{"id":110579,"url":"https://patchwork.plctlab.org/api/1.2/patches/110579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-3-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:45","name":"[V10,2/3] Update documentation to clarify a GCC extension [PR77650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-3-qing.zhao@oracle.com/mbox/"},{"id":110583,"url":"https://patchwork.plctlab.org/api/1.2/patches/110583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-4-qing.zhao@oracle.com/","msgid":"<20230620152246.311493-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-06-20T15:22:46","name":"[V10,3/3] Use TYPE_INCLUDES_FLEXARRAY in __builtin_object_size [PR101832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620152246.311493-4-qing.zhao@oracle.com/mbox/"},{"id":110597,"url":"https://patchwork.plctlab.org/api/1.2/patches/110597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620161103.2964705-1-hongtao.liu@intel.com/","msgid":"<20230620161103.2964705-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-20T16:11:03","name":"[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620161103.2964705-1-hongtao.liu@intel.com/mbox/"},{"id":110598,"url":"https://patchwork.plctlab.org/api/1.2/patches/110598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKCiHkaBpuXXPD7_cG8O-P+tWju=CFCw9eiwLCZLvnOtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:19:07","name":"[fortran] PR108961 - Segfault when associating to pointer from C_F_POINTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKCiHkaBpuXXPD7_cG8O-P+tWju=CFCw9eiwLCZLvnOtw@mail.gmail.com/mbox/"},{"id":110599,"url":"https://patchwork.plctlab.org/api/1.2/patches/110599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620162211.922410-1-jason@redhat.com/","msgid":"<20230620162211.922410-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-20T16:22:11","name":"[pushed] wwwdocs: Add GCC Code of Conduct","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230620162211.922410-1-jason@redhat.com/mbox/"},{"id":110615,"url":"https://patchwork.plctlab.org/api/1.2/patches/110615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJHXpbRnyrPrFROM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:45:25","name":"tree-ssa-math-opts: Small uaddc/usubc pattern matching improvement [PR79173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJHXpbRnyrPrFROM@tucnak/mbox/"},{"id":110618,"url":"https://patchwork.plctlab.org/api/1.2/patches/110618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVszEL5dx4_OcRjLn24tBDBdCEMM8rSrvmWJcDRe8oq9Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T16:57:41","name":"libgo patch committed: Use a C function to call mmap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVszEL5dx4_OcRjLn24tBDBdCEMM8rSrvmWJcDRe8oq9Q@mail.gmail.com/mbox/"},{"id":110625,"url":"https://patchwork.plctlab.org/api/1.2/patches/110625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17410-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T17:17:51","name":"[gensupport] drop suppport for define_cond_exec from compact syntac","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17410-tamar@arm.com/mbox/"},{"id":110634,"url":"https://patchwork.plctlab.org/api/1.2/patches/110634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b2hQXwTRb+RFB+1inHyrLEcenHQ+B8GYKs=Cg=7SJkjw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T17:47:00","name":"[committed] calls: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b2hQXwTRb+RFB+1inHyrLEcenHQ+B8GYKs=Cg=7SJkjw@mail.gmail.com/mbox/"},{"id":110693,"url":"https://patchwork.plctlab.org/api/1.2/patches/110693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6r1amg4.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T20:49:31","name":"[pushed] aarch64: Robustify stack tie handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6r1amg4.fsf@arm.com/mbox/"},{"id":110694,"url":"https://patchwork.plctlab.org/api/1.2/patches/110694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkh9amf1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-20T20:50:10","name":"[pushed] aarch64: Fix gcc.target/aarch64/sve/pcs failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkh9amf1.fsf@arm.com/mbox/"},{"id":110774,"url":"https://patchwork.plctlab.org/api/1.2/patches/110774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621051713.573883-1-hongtao.liu@intel.com/","msgid":"<20230621051713.573883-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-21T05:17:13","name":"Refine maskloadmn pattern with UNSPEC_MASKLOAD.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621051713.573883-1-hongtao.liu@intel.com/mbox/"},{"id":110780,"url":"https://patchwork.plctlab.org/api/1.2/patches/110780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df9f403f4e3c1f9ad620e8d5e38adaa59be2332b.camel@microchip.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T05:57:20","name":"Update array address space in c_build_qualified_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df9f403f4e3c1f9ad620e8d5e38adaa59be2332b.camel@microchip.com/mbox/"},{"id":110781,"url":"https://patchwork.plctlab.org/api/1.2/patches/110781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com/","msgid":"<0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com>","list_archive_url":null,"date":"2023-06-21T05:59:44","name":"x86: add -mprefer-vector-width=512 to new avx512f-dupv2di.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0008d437-f7fc-36bd-e6ce-7293746dbac4@suse.com/mbox/"},{"id":110785,"url":"https://patchwork.plctlab.org/api/1.2/patches/110785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c643ed57-cdba-5487-1781-47904dbe6208@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T06:06:00","name":"[v2] x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c643ed57-cdba-5487-1781-47904dbe6208@suse.com/mbox/"},{"id":110786,"url":"https://patchwork.plctlab.org/api/1.2/patches/110786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621060842.189680-1-yanzhang.wang@intel.com/","msgid":"<20230621060842.189680-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-06-21T06:08:42","name":"RISC-V: convert the mulh with 0 to mov 0 to the reg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621060842.189680-1-yanzhang.wang@intel.com/mbox/"},{"id":110791,"url":"https://patchwork.plctlab.org/api/1.2/patches/110791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com/","msgid":"<457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com>","list_archive_url":null,"date":"2023-06-21T06:25:52","name":"[1/5] x86: use VPTERNLOG for further bitwise two-vector operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ffad0-9ecd-3e19-f5ab-6153ce4b8bad@suse.com/mbox/"},{"id":110793,"url":"https://patchwork.plctlab.org/api/1.2/patches/110793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com/","msgid":"<3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com>","list_archive_url":null,"date":"2023-06-21T06:27:11","name":"[2/5] x86: use VPTERNLOG also for certain andnot forms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cf55c98-d18a-d1ad-2fc2-015c63e217ca@suse.com/mbox/"},{"id":110794,"url":"https://patchwork.plctlab.org/api/1.2/patches/110794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com/","msgid":"<4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com>","list_archive_url":null,"date":"2023-06-21T06:27:32","name":"[3/5] x86: allow memory operand for AVX2 splitter for PR target/100711","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4080e2a5-7d77-0ff7-8dc6-935ac79da0ce@suse.com/mbox/"},{"id":110796,"url":"https://patchwork.plctlab.org/api/1.2/patches/110796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2607ae7-045a-d1bc-2cc8-d2f114677cb6@suse.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T06:27:51","name":"[4/5] x86: further PR target/100711-like splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2607ae7-045a-d1bc-2cc8-d2f114677cb6@suse.com/mbox/"},{"id":110797,"url":"https://patchwork.plctlab.org/api/1.2/patches/110797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com/","msgid":"<0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com>","list_archive_url":null,"date":"2023-06-21T06:28:12","name":"[5/5] x86: yet more PR target/100711-like splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0075f542-9dc0-33db-4cf9-cdd3ba502122@suse.com/mbox/"},{"id":110843,"url":"https://patchwork.plctlab.org/api/1.2/patches/110843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621073955.2567-1-shiyulong@iscas.ac.cn/","msgid":"<20230621073955.2567-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-06-21T07:39:55","name":"[V1] RISC-V:Add float16 tuple type abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621073955.2567-1-shiyulong@iscas.ac.cn/mbox/"},{"id":110844,"url":"https://patchwork.plctlab.org/api/1.2/patches/110844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075021.5A14738582BC@sourceware.org/","msgid":"<20230621075021.5A14738582BC@sourceware.org>","list_archive_url":null,"date":"2023-06-21T07:49:37","name":"[RFC] middle-end/110237 - wrong MEM_ATTRs for partial loads/stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075021.5A14738582BC@sourceware.org/mbox/"},{"id":110846,"url":"https://patchwork.plctlab.org/api/1.2/patches/110846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075824.1990571-1-pan2.li@intel.com/","msgid":"<20230621075824.1990571-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-21T07:58:24","name":"[v3] Streamer: Fix out of range memory access of machine mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621075824.1990571-1-pan2.li@intel.com/mbox/"},{"id":110910,"url":"https://patchwork.plctlab.org/api/1.2/patches/110910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17411-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T09:32:10","name":"[committed,docs] : replace backslashchar [PR 110329].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17411-tamar@arm.com/mbox/"},{"id":110984,"url":"https://patchwork.plctlab.org/api/1.2/patches/110984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621111252.236515-1-juzhe.zhong@rivai.ai/","msgid":"<20230621111252.236515-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T11:12:52","name":"RISC-V: Support RVV floating-point ternary auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621111252.236515-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110987,"url":"https://patchwork.plctlab.org/api/1.2/patches/110987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113141.909183856DF1@sourceware.org/","msgid":"<20230621113141.909183856DF1@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:30:54","name":"[1/3] Hide and refactor IVOPTs strip_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113141.909183856DF1@sourceware.org/mbox/"},{"id":110988,"url":"https://patchwork.plctlab.org/api/1.2/patches/110988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113152.B9E773857019@sourceware.org/","msgid":"<20230621113152.B9E773857019@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:31:08","name":"[2/3] Less strip_offset in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113152.B9E773857019@sourceware.org/mbox/"},{"id":110989,"url":"https://patchwork.plctlab.org/api/1.2/patches/110989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113206.3F9773856973@sourceware.org/","msgid":"<20230621113206.3F9773856973@sourceware.org>","list_archive_url":null,"date":"2023-06-21T11:31:21","name":"[3/3] Less strip_offset in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113206.3F9773856973@sourceware.org/mbox/"},{"id":110990,"url":"https://patchwork.plctlab.org/api/1.2/patches/110990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113338.290127-1-juzhe.zhong@rivai.ai/","msgid":"<20230621113338.290127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T11:33:38","name":": [NFC] Move can_vec_mask_load_store_p and get_len_load_store_mode from \"optabs-query\" into \"optabs-tree\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621113338.290127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":110998,"url":"https://patchwork.plctlab.org/api/1.2/patches/110998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621122207.302494-1-jwakely@redhat.com/","msgid":"<20230621122207.302494-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-21T12:22:07","name":"[committed,gcc-12] libstdc++: avoid bogus -Wrestrict [PR105651]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621122207.302494-1-jwakely@redhat.com/mbox/"},{"id":111002,"url":"https://patchwork.plctlab.org/api/1.2/patches/111002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee09dc9b-63d8-b166-7ceb-21f022d0eef6@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T12:57:24","name":"[v2] RISC-V: Implement autovec copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee09dc9b-63d8-b166-7ceb-21f022d0eef6@gmail.com/mbox/"},{"id":111048,"url":"https://patchwork.plctlab.org/api/1.2/patches/111048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621142819.307989-1-juzhe.zhong@rivai.ai/","msgid":"<20230621142819.307989-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T14:28:19","name":"[V2] RISC-V: Support RVV floating-point auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621142819.307989-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111124,"url":"https://patchwork.plctlab.org/api/1.2/patches/111124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621153618.134179-1-juzhe.zhong@rivai.ai/","msgid":"<20230621153618.134179-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T15:36:18","name":"[V4] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621153618.134179-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111134,"url":"https://patchwork.plctlab.org/api/1.2/patches/111134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621155314.183370-1-juzhe.zhong@rivai.ai/","msgid":"<20230621155314.183370-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T15:53:14","name":"[V3] RISC-V: Support RVV floating-point auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621155314.183370-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111183,"url":"https://patchwork.plctlab.org/api/1.2/patches/111183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJMpN1WebpMTlQHd@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T16:45:43","name":"[wwwdocs] cxx-status: Add C++26 papers (Spring 2023, Varna)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJMpN1WebpMTlQHd@redhat.com/mbox/"},{"id":111205,"url":"https://patchwork.plctlab.org/api/1.2/patches/111205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621171920.1283054-1-ppalka@redhat.com/","msgid":"<20230621171920.1283054-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-21T17:19:20","name":"c++: redundant targ coercion for var/alias tmpls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621171920.1283054-1-ppalka@redhat.com/mbox/"},{"id":111270,"url":"https://patchwork.plctlab.org/api/1.2/patches/111270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621185820.1766291-1-ben.boeckel@kitware.com/","msgid":"<20230621185820.1766291-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-06-21T18:58:20","name":"[1/1] libcpp: allow UCS_LIMIT codepoints in UTF-8 strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621185820.1766291-1-ben.boeckel@kitware.com/mbox/"},{"id":111298,"url":"https://patchwork.plctlab.org/api/1.2/patches/111298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZzjMJHVwn4vB6gCrd_gesLkRXAAGnv9dJBZBmVC+Hmag@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-21T19:57:50","name":"[committed] function: Change return type of predicate function from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZzjMJHVwn4vB6gCrd_gesLkRXAAGnv9dJBZBmVC+Hmag@mail.gmail.com/mbox/"},{"id":111332,"url":"https://patchwork.plctlab.org/api/1.2/patches/111332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621223842.259423-1-juzhe.zhong@rivai.ai/","msgid":"<20230621223842.259423-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-21T22:38:42","name":"RISC-V: Refactor the integer ternary autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230621223842.259423-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111334,"url":"https://patchwork.plctlab.org/api/1.2/patches/111334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com/","msgid":"<6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-21T22:46:05","name":"[ver,2] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6216c458dbb7163fea3d823cec39ef0cc9543b76.camel@us.ibm.com/mbox/"},{"id":111378,"url":"https://patchwork.plctlab.org/api/1.2/patches/111378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUBnHj_WyUkExtGPi2x96qBGZ7ZYAjT4EdW8HzoC0Usvw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T00:53:04","name":"Go patch committed: Determine types of Slice_{value, info} expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUBnHj_WyUkExtGPi2x96qBGZ7ZYAjT4EdW8HzoC0Usvw@mail.gmail.com/mbox/"},{"id":111481,"url":"https://patchwork.plctlab.org/api/1.2/patches/111481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622081413.EA6D53858C39@sourceware.org/","msgid":"<20230622081413.EA6D53858C39@sourceware.org>","list_archive_url":null,"date":"2023-06-22T08:13:28","name":"tree-optimization/110332 - fix ICE with phiprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622081413.EA6D53858C39@sourceware.org/mbox/"},{"id":111598,"url":"https://patchwork.plctlab.org/api/1.2/patches/111598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com/","msgid":"<4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com>","list_archive_url":null,"date":"2023-06-22T10:03:37","name":"[OpenACC,2.7] Adjust acc_map_data/acc_unmap_data interaction with reference counters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4f957b-03c7-ece2-b1c1-f2aa486b6adc@siemens.com/mbox/"},{"id":111618,"url":"https://patchwork.plctlab.org/api/1.2/patches/111618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622111154.2837175-1-philipp.tomsich@vrull.eu/","msgid":"<20230622111154.2837175-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-06-22T11:11:54","name":"cprop_hardreg: fix ORIGINAL_REGNO/REG_ATTRS/REG_POINTER handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622111154.2837175-1-philipp.tomsich@vrull.eu/mbox/"},{"id":111622,"url":"https://patchwork.plctlab.org/api/1.2/patches/111622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMRM9YmzmpuHTeMNAd1e2PKXkCkkkdnM1-M34YqGZ8b2w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T11:36:51","name":"LTO: buffer overflow in lto_output_init_mode_table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sMRM9YmzmpuHTeMNAd1e2PKXkCkkkdnM1-M34YqGZ8b2w@mail.gmail.com/mbox/"},{"id":111657,"url":"https://patchwork.plctlab.org/api/1.2/patches/111657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6f011d2-6629-9acb-4a4e-f3f079678f12@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-22T13:03:41","name":"RISC-V: Split VF iterators for Zvfh(min).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6f011d2-6629-9acb-4a4e-f3f079678f12@gmail.com/mbox/"},{"id":111656,"url":"https://patchwork.plctlab.org/api/1.2/patches/111656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com/","msgid":"<4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com>","list_archive_url":null,"date":"2023-06-22T13:03:43","name":"[committed] libgomp.texi: Improve OpenMP ICV description","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4039e86f-e0c7-3e6b-8305-25ec7125b2fb@codesourcery.com/mbox/"},{"id":111677,"url":"https://patchwork.plctlab.org/api/1.2/patches/111677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622135348.160496-1-juzhe.zhong@rivai.ai/","msgid":"<20230622135348.160496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-22T13:53:48","name":"[V5] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622135348.160496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111795,"url":"https://patchwork.plctlab.org/api/1.2/patches/111795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622194952.1834364-1-vultkayn@gcc.gnu.org/","msgid":"<20230622194952.1834364-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-22T19:49:54","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622194952.1834364-1-vultkayn@gcc.gnu.org/mbox/"},{"id":111797,"url":"https://patchwork.plctlab.org/api/1.2/patches/111797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622195522.1834793-1-vultkayn@gcc.gnu.org/","msgid":"<20230622195522.1834793-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-06-22T19:55:24","name":"analyzer: Fix regression bug after r14-1632-g9589a46ddadc8b [pr110198]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622195522.1834793-1-vultkayn@gcc.gnu.org/mbox/"},{"id":111799,"url":"https://patchwork.plctlab.org/api/1.2/patches/111799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-67cbfb46-d186-40df-86e8-fb36979a34a9-1687465404920@3c-app-gmx-bs06/","msgid":"","list_archive_url":null,"date":"2023-06-22T20:23:24","name":"Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-67cbfb46-d186-40df-86e8-fb36979a34a9-1687465404920@3c-app-gmx-bs06/mbox/"},{"id":111843,"url":"https://patchwork.plctlab.org/api/1.2/patches/111843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622235112.9407-1-juzhe.zhong@rivai.ai/","msgid":"<20230622235112.9407-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-22T23:51:12","name":"[V6] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230622235112.9407-1-juzhe.zhong@rivai.ai/mbox/"},{"id":111855,"url":"https://patchwork.plctlab.org/api/1.2/patches/111855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623002537.140375-1-polacek@redhat.com/","msgid":"<20230623002537.140375-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-23T00:25:37","name":"c++: Add support for -std={c,gnu}++2{c,6}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623002537.140375-1-polacek@redhat.com/mbox/"},{"id":111928,"url":"https://patchwork.plctlab.org/api/1.2/patches/111928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzvupwpr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-23T05:35:28","name":"[testsuite] note pitfall in how outputs.exp sets gld","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzvupwpr.fsf@lxoliva.fsfla.org/mbox/"},{"id":111944,"url":"https://patchwork.plctlab.org/api/1.2/patches/111944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623064417.598501331F@imap2.suse-dmz.suse.de/","msgid":"<20230623064417.598501331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T06:44:16","name":"Improve vector_vector_composition_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623064417.598501331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111966,"url":"https://patchwork.plctlab.org/api/1.2/patches/111966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623081138.552D21331F@imap2.suse-dmz.suse.de/","msgid":"<20230623081138.552D21331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:11:37","name":"Optimize vector codegen for invariant loads, fix SLP support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623081138.552D21331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111976,"url":"https://patchwork.plctlab.org/api/1.2/patches/111976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082613.00D381331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082613.00D381331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:26:12","name":"[RFC] Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082613.00D381331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111977,"url":"https://patchwork.plctlab.org/api/1.2/patches/111977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082642.0811A1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082642.0811A1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:26:41","name":"[1/6] Avoid shorten_binary_op on VECTOR_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082642.0811A1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111978,"url":"https://patchwork.plctlab.org/api/1.2/patches/111978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:04","name":"[2/6] Fix TYPE_PRECISION use in hashable_expr_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082704.5D4AB1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111980,"url":"https://patchwork.plctlab.org/api/1.2/patches/111980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082721.CF9571331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082721.CF9571331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:21","name":"[3/6] Properly guard vect_look_through_possible_promotion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082721.CF9571331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111979,"url":"https://patchwork.plctlab.org/api/1.2/patches/111979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:35","name":"[4/6] Fix tree_simple_nonnegative_warnv_p for VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082735.8C7AF1331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111982,"url":"https://patchwork.plctlab.org/api/1.2/patches/111982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082748.10FA71331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082748.10FA71331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:47","name":"[5/6] Bogus and missed folding on vector compares","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082748.10FA71331F@imap2.suse-dmz.suse.de/mbox/"},{"id":111981,"url":"https://patchwork.plctlab.org/api/1.2/patches/111981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082759.0DD281331F@imap2.suse-dmz.suse.de/","msgid":"<20230623082759.0DD281331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T08:27:58","name":"[6/6] Use element_precision for match.pd arith conversion optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623082759.0DD281331F@imap2.suse-dmz.suse.de/mbox/"},{"id":112044,"url":"https://patchwork.plctlab.org/api/1.2/patches/112044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623102759.DA3231331F@imap2.suse-dmz.suse.de/","msgid":"<20230623102759.DA3231331F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T10:27:59","name":"tree-optimization/96208 - SLP of non-grouped loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623102759.DA3231331F@imap2.suse-dmz.suse.de/mbox/"},{"id":112112,"url":"https://patchwork.plctlab.org/api/1.2/patches/112112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121442.3A967134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121442.3A967134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:14:41","name":"Deal with vector typed operands in conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121442.3A967134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112113,"url":"https://patchwork.plctlab.org/api/1.2/patches/112113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:14:52","name":"Fix initializer_constant_valid_p_1 TYPE_PRECISION use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121452.CF5F2134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112114,"url":"https://patchwork.plctlab.org/api/1.2/patches/112114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de/","msgid":"<20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-23T12:16:07","name":"narrowing initializers and initializer_constant_valid_p_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623121607.BC0F7134FB@imap2.suse-dmz.suse.de/mbox/"},{"id":112141,"url":"https://patchwork.plctlab.org/api/1.2/patches/112141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623134827.4093245-1-juzhe.zhong@rivai.ai/","msgid":"<20230623134827.4093245-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T13:48:27","name":"GIMPLE_FOLD: Apply LEN_MASK_{LOAD,STORE} into GIMPLE_FOLD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623134827.4093245-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112145,"url":"https://patchwork.plctlab.org/api/1.2/patches/112145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623135635.4100947-1-juzhe.zhong@rivai.ai/","msgid":"<20230623135635.4100947-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T13:56:35","name":"SSA ALIAS: Apply LEN_MASK_{LOAD, STORE} into SSA alias analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623135635.4100947-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112149,"url":"https://patchwork.plctlab.org/api/1.2/patches/112149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623140537.4156063-1-juzhe.zhong@rivai.ai/","msgid":"<20230623140537.4156063-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:05:37","name":"LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623140537.4156063-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112157,"url":"https://patchwork.plctlab.org/api/1.2/patches/112157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623141539.4165425-1-juzhe.zhong@rivai.ai/","msgid":"<20230623141539.4165425-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:15:39","name":"SSA ALIAS: Apply LEN_MASK_STORE to '\''ref_maybe_used_by_call_p_1'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623141539.4165425-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112161,"url":"https://patchwork.plctlab.org/api/1.2/patches/112161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623142103.16401-1-juzhe.zhong@rivai.ai/","msgid":"<20230623142103.16401-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:21:03","name":"IVOPTS: Add LEN_MASK_{LOAD, STORE} into '\''get_alias_ptr_type_for_ptr_address'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623142103.16401-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112172,"url":"https://patchwork.plctlab.org/api/1.2/patches/112172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143602.83510-1-dmalcolm@redhat.com/","msgid":"<20230623143602.83510-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-23T14:36:02","name":"text-art: remove explicit #include of C++ standard library headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143602.83510-1-dmalcolm@redhat.com/mbox/"},{"id":112175,"url":"https://patchwork.plctlab.org/api/1.2/patches/112175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143835.36983-1-iain@sandoe.co.uk/","msgid":"<20230623143835.36983-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-23T14:38:35","name":"[pushed] testsuite,objective-c++: Fix imported NSObjCRuntime.h.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623143835.36983-1-iain@sandoe.co.uk/mbox/"},{"id":112185,"url":"https://patchwork.plctlab.org/api/1.2/patches/112185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623144847.85698-1-juzhe.zhong@rivai.ai/","msgid":"<20230623144847.85698-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T14:48:47","name":"DSE: Add LEN_MASK_STORE analysis into DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623144847.85698-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112231,"url":"https://patchwork.plctlab.org/api/1.2/patches/112231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c34bd181-e25e-910b-7bc3-1c1d000d429b@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T16:49:18","name":"rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c34bd181-e25e-910b-7bc3-1c1d000d429b@linux.vnet.ibm.com/mbox/"},{"id":112242,"url":"https://patchwork.plctlab.org/api/1.2/patches/112242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJXU7UQY3oH8t4LH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T17:22:53","name":"[v2] c++: Add support for -std={c,gnu}++2{c,6}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJXU7UQY3oH8t4LH@redhat.com/mbox/"},{"id":112297,"url":"https://patchwork.plctlab.org/api/1.2/patches/112297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623210851.jnyyc24by7jomr2b@lug-owl.de/","msgid":"<20230623210851.jnyyc24by7jomr2b@lug-owl.de>","list_archive_url":null,"date":"2023-06-23T21:08:52","name":"GCC nvptx: Silence warning?","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623210851.jnyyc24by7jomr2b@lug-owl.de/mbox/"},{"id":112345,"url":"https://patchwork.plctlab.org/api/1.2/patches/112345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623220106.117866-1-dmalcolm@redhat.com/","msgid":"<20230623220106.117866-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-23T22:01:06","name":"[pushed] c++: provide #include hint for missing includes [PR110164]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623220106.117866-1-dmalcolm@redhat.com/mbox/"},{"id":112351,"url":"https://patchwork.plctlab.org/api/1.2/patches/112351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623222525.547651-1-polacek@redhat.com/","msgid":"<20230623222525.547651-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-23T22:25:25","name":"c++: fix error reporting routines re-entered ICE [PR110175]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623222525.547651-1-polacek@redhat.com/mbox/"},{"id":112376,"url":"https://patchwork.plctlab.org/api/1.2/patches/112376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVTmpCvvgudvjOjpOtHUni-9__=TKHwJoE6_E7Z_4ARCw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-23T23:17:31","name":"Go patch committed: Support bootstrapping Go 1.21","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVTmpCvvgudvjOjpOtHUni-9__=TKHwJoE6_E7Z_4ARCw@mail.gmail.com/mbox/"},{"id":112385,"url":"https://patchwork.plctlab.org/api/1.2/patches/112385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qi1pxnk.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-23T23:27:27","name":"[v3] Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qi1pxnk.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":112386,"url":"https://patchwork.plctlab.org/api/1.2/patches/112386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623234157.331911-1-juzhe.zhong@rivai.ai/","msgid":"<20230623234157.331911-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-23T23:41:57","name":"[V2] LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230623234157.331911-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112405,"url":"https://patchwork.plctlab.org/api/1.2/patches/112405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624012657.130267-1-dmalcolm@redhat.com/","msgid":"<20230624012657.130267-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-24T01:26:57","name":"[pushed:,v2] text-art: remove explicit #include of C++ standard library headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624012657.130267-1-dmalcolm@redhat.com/mbox/"},{"id":112409,"url":"https://patchwork.plctlab.org/api/1.2/patches/112409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e906272d-b875-32c5-8db7-aaebdd3565d4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-24T04:12:13","name":"[v6] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e906272d-b875-32c5-8db7-aaebdd3565d4@linux.ibm.com/mbox/"},{"id":112440,"url":"https://patchwork.plctlab.org/api/1.2/patches/112440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-1-kmatsui@cs.washington.edu/","msgid":"<20230624101210.57519-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:12:09","name":"[1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-1-kmatsui@cs.washington.edu/mbox/"},{"id":112441,"url":"https://patchwork.plctlab.org/api/1.2/patches/112441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-2-kmatsui@cs.washington.edu/","msgid":"<20230624101210.57519-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:12:10","name":"[2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624101210.57519-2-kmatsui@cs.washington.edu/mbox/"},{"id":112443,"url":"https://patchwork.plctlab.org/api/1.2/patches/112443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-1-kmatsui@cs.washington.edu/","msgid":"<20230624103848.68000-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:38:47","name":"[1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-1-kmatsui@cs.washington.edu/mbox/"},{"id":112444,"url":"https://patchwork.plctlab.org/api/1.2/patches/112444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-2-kmatsui@cs.washington.edu/","msgid":"<20230624103848.68000-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T10:38:48","name":"[2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624103848.68000-2-kmatsui@cs.washington.edu/mbox/"},{"id":112458,"url":"https://patchwork.plctlab.org/api/1.2/patches/112458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKPvpOMQSbx5tm9UGVvyGuDoEcQAR7WJMo7iQiYh9pL+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-24T13:18:54","name":"[fortran] PR49213 - [OOP] gfortran rejects structure constructor expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKPvpOMQSbx5tm9UGVvyGuDoEcQAR7WJMo7iQiYh9pL+A@mail.gmail.com/mbox/"},{"id":112459,"url":"https://patchwork.plctlab.org/api/1.2/patches/112459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-1-kmatsui@cs.washington.edu/","msgid":"<20230624134051.73203-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:40:50","name":"[v2,1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-1-kmatsui@cs.washington.edu/mbox/"},{"id":112460,"url":"https://patchwork.plctlab.org/api/1.2/patches/112460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-2-kmatsui@cs.washington.edu/","msgid":"<20230624134051.73203-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:40:51","name":"[v2,2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624134051.73203-2-kmatsui@cs.washington.edu/mbox/"},{"id":112462,"url":"https://patchwork.plctlab.org/api/1.2/patches/112462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-1-kmatsui@cs.washington.edu/","msgid":"<20230624135348.74428-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:53:47","name":"[v2,1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-1-kmatsui@cs.washington.edu/mbox/"},{"id":112464,"url":"https://patchwork.plctlab.org/api/1.2/patches/112464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-2-kmatsui@cs.washington.edu/","msgid":"<20230624135348.74428-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T13:53:48","name":"[v2,2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624135348.74428-2-kmatsui@cs.washington.edu/mbox/"},{"id":112468,"url":"https://patchwork.plctlab.org/api/1.2/patches/112468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-1-kmatsui@cs.washington.edu/","msgid":"<20230624142346.84325-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T14:23:45","name":"[v2,1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-1-kmatsui@cs.washington.edu/mbox/"},{"id":112469,"url":"https://patchwork.plctlab.org/api/1.2/patches/112469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-2-kmatsui@cs.washington.edu/","msgid":"<20230624142346.84325-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-06-24T14:23:46","name":"[v2,2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230624142346.84325-2-kmatsui@cs.washington.edu/mbox/"},{"id":112476,"url":"https://patchwork.plctlab.org/api/1.2/patches/112476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com/","msgid":"<00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-24T17:13:55","name":"[x86_64] Handle SUBREG conversions in TImode STV (for ptest).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401d9a6bf$42b20e70$c8162b50$@nextmovesoftware.com/mbox/"},{"id":112479,"url":"https://patchwork.plctlab.org/api/1.2/patches/112479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com/","msgid":"<010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-24T18:04:47","name":"[x86_PATCH] New *ashl_doubleword_highpart define_insn_and_split.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/010601d9a6c6$5e1d8a70$1a589f50$@nextmovesoftware.com/mbox/"},{"id":112490,"url":"https://patchwork.plctlab.org/api/1.2/patches/112490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b942f382-e8c1-4447-a562-0567f1f1f923-1687633555558@3c-app-gmx-bap37/","msgid":"","list_archive_url":null,"date":"2023-06-24T19:05:55","name":"[part2,committed] Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b942f382-e8c1-4447-a562-0567f1f1f923-1687633555558@3c-app-gmx-bap37/mbox/"},{"id":112509,"url":"https://patchwork.plctlab.org/api/1.2/patches/112509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com/","msgid":"<8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com>","list_archive_url":null,"date":"2023-06-25T02:09:25","name":"[PATCHv4,rs6000] Splat vector small V2DI constants with ISA 2.07 instructions [PR104124]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ae0f5d3-9e9f-3880-e651-34df2a8c4361@linux.ibm.com/mbox/"},{"id":112510,"url":"https://patchwork.plctlab.org/api/1.2/patches/112510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625030837.23389-1-xuli1@eswincomputing.com/","msgid":"<20230625030837.23389-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-25T03:08:37","name":"RISC-V: force arg and target to reg rtx under -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625030837.23389-1-xuli1@eswincomputing.com/mbox/"},{"id":112516,"url":"https://patchwork.plctlab.org/api/1.2/patches/112516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625033654.1150808-1-juzhe.zhong@rivai.ai/","msgid":"<20230625033654.1150808-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T03:36:54","name":"internal-fn: Fix bug of BIAS argument index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625033654.1150808-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112522,"url":"https://patchwork.plctlab.org/api/1.2/patches/112522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083207.289000-1-juzhe.zhong@rivai.ai/","msgid":"<20230625083207.289000-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T08:32:07","name":"RISC-V: Enable len_mask{load, store} and remove len_{load, store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083207.289000-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112526,"url":"https://patchwork.plctlab.org/api/1.2/patches/112526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083952.9771-1-juzhe.zhong@rivai.ai/","msgid":"<20230625083952.9771-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T08:39:52","name":"[V2] RISC-V: Enable len_mask{load, store} and remove len_{load, store}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625083952.9771-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112529,"url":"https://patchwork.plctlab.org/api/1.2/patches/112529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625090932.18330-1-xuli1@eswincomputing.com/","msgid":"<20230625090932.18330-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-25T09:09:32","name":"[v2] RISC-V: fix expand function of vlmul_ext RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625090932.18330-1-xuli1@eswincomputing.com/mbox/"},{"id":112530,"url":"https://patchwork.plctlab.org/api/1.2/patches/112530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625092128.44071-1-iain@sandoe.co.uk/","msgid":"<20230625092128.44071-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-25T09:21:28","name":"[pushed] configure, Darwin: Ensure overrides to host-pie are passed to gcc configure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625092128.44071-1-iain@sandoe.co.uk/mbox/"},{"id":112532,"url":"https://patchwork.plctlab.org/api/1.2/patches/112532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625095118.1854755-1-lehua.ding@rivai.ai/","msgid":"<20230625095118.1854755-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-25T09:51:18","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625095118.1854755-1-lehua.ding@rivai.ai/mbox/"},{"id":112559,"url":"https://patchwork.plctlab.org/api/1.2/patches/112559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625113229.79338-1-iain@sandoe.co.uk/","msgid":"<20230625113229.79338-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-06-25T11:32:29","name":"modula-2: Amend the handling of failed select() calls in RTint [PR108835].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625113229.79338-1-iain@sandoe.co.uk/mbox/"},{"id":112571,"url":"https://patchwork.plctlab.org/api/1.2/patches/112571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625122057.195433-1-juzhe.zhong@rivai.ai/","msgid":"<20230625122057.195433-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-25T12:20:57","name":"RISC-V: Optimize VSETVL codegen of SELECT_VL with LEN_MASK_{LOAD, STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625122057.195433-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112579,"url":"https://patchwork.plctlab.org/api/1.2/patches/112579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625124040.2335529-1-lehua.ding@rivai.ai/","msgid":"<20230625124040.2335529-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-06-25T12:40:40","name":"RISC-V: Add an experimental vector calling convention","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230625124040.2335529-1-lehua.ding@rivai.ai/mbox/"},{"id":112583,"url":"https://patchwork.plctlab.org/api/1.2/patches/112583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com/","msgid":"<4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com>","list_archive_url":null,"date":"2023-06-25T13:13:37","name":"[PING,RISCV,PR,target/110201] Fix operand types for various scalar crypto insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4524bcd7-53ec-b4b7-59ae-19728281d5bc@gmail.com/mbox/"},{"id":112685,"url":"https://patchwork.plctlab.org/api/1.2/patches/112685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626000415.277265-1-ibuclaw@gdcproject.org/","msgid":"<20230626000415.277265-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T00:04:15","name":"[committed] d: Merge upstream dmd, druntime a45f4e9f43, phobos 106038f2e.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626000415.277265-1-ibuclaw@gdcproject.org/mbox/"},{"id":112686,"url":"https://patchwork.plctlab.org/api/1.2/patches/112686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626005142.333366-1-ibuclaw@gdcproject.org/","msgid":"<20230626005142.333366-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T00:51:42","name":"[GCC13,committed] d: Fix crash in d/dmd/root/aav.d:127 dmd_aaGetRvalue from DsymbolTable::lookup (PR110113)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626005142.333366-1-ibuclaw@gdcproject.org/mbox/"},{"id":112693,"url":"https://patchwork.plctlab.org/api/1.2/patches/112693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-1-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:03","name":"[1/3] Use cvt_op to save intermediate type operand instead of \"subtle\" vec_dest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-1-hongtao.liu@intel.com/mbox/"},{"id":112691,"url":"https://patchwork.plctlab.org/api/1.2/patches/112691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-2-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:04","name":"[2/3] Don'\''t use intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-2-hongtao.liu@intel.com/mbox/"},{"id":112692,"url":"https://patchwork.plctlab.org/api/1.2/patches/112692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-3-hongtao.liu@intel.com/","msgid":"<20230626013105.18788-3-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T01:31:05","name":"[3/3,aarch64] Adjust testcase to match assembly output after r14-2007.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626013105.18788-3-hongtao.liu@intel.com/mbox/"},{"id":112694,"url":"https://patchwork.plctlab.org/api/1.2/patches/112694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626014940.36902-1-juzhe.zhong@rivai.ai/","msgid":"<20230626014940.36902-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T01:49:40","name":"GIMPLE_FOLD: Fix gimple fold for LEN_MASK_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626014940.36902-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112695,"url":"https://patchwork.plctlab.org/api/1.2/patches/112695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626015443.89052-1-juzhe.zhong@rivai.ai/","msgid":"<20230626015443.89052-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T01:54:43","name":"[V2] DSE: Add LEN_MASK_STORE analysis into DSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626015443.89052-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112696,"url":"https://patchwork.plctlab.org/api/1.2/patches/112696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626021222.419821-1-ibuclaw@gdcproject.org/","msgid":"<20230626021222.419821-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-26T02:12:22","name":"[committed] d: Suboptimal codegen for __builtin_expect(cond, false)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626021222.419821-1-ibuclaw@gdcproject.org/mbox/"},{"id":112698,"url":"https://patchwork.plctlab.org/api/1.2/patches/112698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626022913.32556-1-hongyu.wang@intel.com/","msgid":"<20230626022913.32556-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-06-26T02:29:13","name":"i386: Sync tune_string with arch_string for target attribute arch=*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626022913.32556-1-hongyu.wang@intel.com/mbox/"},{"id":112699,"url":"https://patchwork.plctlab.org/api/1.2/patches/112699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023204.1010610-1-juzhe.zhong@rivai.ai/","msgid":"<20230626023204.1010610-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T02:32:04","name":"SCCVN: Fix repeating variable name \"len\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023204.1010610-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112703,"url":"https://patchwork.plctlab.org/api/1.2/patches/112703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023408.33758-1-hongyu.wang@intel.com/","msgid":"<20230626023408.33758-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-06-26T02:34:08","name":"i386: Relax inline requirement for functions with different target attrs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023408.33758-1-hongyu.wang@intel.com/mbox/"},{"id":112704,"url":"https://patchwork.plctlab.org/api/1.2/patches/112704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023735.1013441-1-juzhe.zhong@rivai.ai/","msgid":"<20230626023735.1013441-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T02:37:35","name":"SSCV: Add LEN_MASK_STORE into SCCVN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626023735.1013441-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112718,"url":"https://patchwork.plctlab.org/api/1.2/patches/112718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626033830.6544-1-juzhe.zhong@rivai.ai/","msgid":"<20230626033830.6544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T03:38:30","name":"RISC-V: Remove redundant vcond patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626033830.6544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112751,"url":"https://patchwork.plctlab.org/api/1.2/patches/112751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626065101.75459-1-juzhe.zhong@rivai.ai/","msgid":"<20230626065101.75459-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T06:51:01","name":"RISC-V: Enhance RVV VLA SLP auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626065101.75459-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112754,"url":"https://patchwork.plctlab.org/api/1.2/patches/112754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626074342.2629716-1-juzhe.zhong@rivai.ai/","msgid":"<20230626074342.2629716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T07:43:42","name":"[V3] DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626074342.2629716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112758,"url":"https://patchwork.plctlab.org/api/1.2/patches/112758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626081155.2865595-1-juzhe.zhong@rivai.ai/","msgid":"<20230626081155.2865595-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T08:11:55","name":"[V2] GIMPLE_FOLD: Fix gimple fold for LEN_{MASK}_{LOAD,STORE}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626081155.2865595-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112778,"url":"https://patchwork.plctlab.org/api/1.2/patches/112778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626085417.1357574-1-hongtao.liu@intel.com/","msgid":"<20230626085417.1357574-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-26T08:54:17","name":"Issue a warning for conversion between short and __bf16 under TARGET_AVX512BF16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626085417.1357574-1-hongtao.liu@intel.com/mbox/"},{"id":112815,"url":"https://patchwork.plctlab.org/api/1.2/patches/112815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093656.502976-1-pan2.li@intel.com/","msgid":"<20230626093656.502976-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-26T09:36:56","name":"[v1] RISC-V: Remove duplicated extern function_base decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093656.502976-1-pan2.li@intel.com/mbox/"},{"id":112820,"url":"https://patchwork.plctlab.org/api/1.2/patches/112820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093846.3006718-1-juzhe.zhong@rivai.ai/","msgid":"<20230626093846.3006718-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T09:38:46","name":"[V2] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626093846.3006718-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112840,"url":"https://patchwork.plctlab.org/api/1.2/patches/112840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626104303.3098270-1-juzhe.zhong@rivai.ai/","msgid":"<20230626104303.3098270-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T10:43:03","name":"Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626104303.3098270-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112850,"url":"https://patchwork.plctlab.org/api/1.2/patches/112850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626110223.D451938582A4@sourceware.org/","msgid":"<20230626110223.D451938582A4@sourceware.org>","list_archive_url":null,"date":"2023-06-26T11:01:39","name":"tree-optimization/110392 - ICE with predicate analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626110223.D451938582A4@sourceware.org/mbox/"},{"id":112889,"url":"https://patchwork.plctlab.org/api/1.2/patches/112889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt352ee8qx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T11:57:42","name":"vect: Cost intermediate conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt352ee8qx.fsf@arm.com/mbox/"},{"id":112893,"url":"https://patchwork.plctlab.org/api/1.2/patches/112893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626120429.3403256-1-juzhe.zhong@rivai.ai/","msgid":"<20230626120429.3403256-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T12:04:29","name":"[V3] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626120429.3403256-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112898,"url":"https://patchwork.plctlab.org/api/1.2/patches/112898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121826.8030D385772D@sourceware.org/","msgid":"<20230626121826.8030D385772D@sourceware.org>","list_archive_url":null,"date":"2023-06-26T12:17:28","name":"tree-optimization/110381 - preserve SLP permutation with in-order reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121826.8030D385772D@sourceware.org/mbox/"},{"id":112900,"url":"https://patchwork.plctlab.org/api/1.2/patches/112900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121804.110219-1-juzhe.zhong@rivai.ai/","msgid":"<20230626121804.110219-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-26T12:18:04","name":"[V2] RISC-V: Support const vector expansion with step vector with base != 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626121804.110219-1-juzhe.zhong@rivai.ai/mbox/"},{"id":112955,"url":"https://patchwork.plctlab.org/api/1.2/patches/112955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com/","msgid":"<98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-06-26T13:55:48","name":"aarch64: Remove architecture dependencies from intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98b3efca-4c1c-7797-022c-0be09087d086@e124511.cambridge.arm.com/mbox/"},{"id":112957,"url":"https://patchwork.plctlab.org/api/1.2/patches/112957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9ef49e-9f22-cb6c-1914-3b30f6e33758@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T14:02:32","name":"[COMMITTED] PR tree-optimization/110251 - Avoid redundant GORI calcuations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc9ef49e-9f22-cb6c-1914-3b30f6e33758@redhat.com/mbox/"},{"id":112973,"url":"https://patchwork.plctlab.org/api/1.2/patches/112973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com/","msgid":"<1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-06-26T14:25:25","name":"[committed] docs: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1cdaeebf-4840-807b-e7f2-68505061dbd0@e124511.cambridge.arm.com/mbox/"},{"id":112976,"url":"https://patchwork.plctlab.org/api/1.2/patches/112976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com/","msgid":"<3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com>","list_archive_url":null,"date":"2023-06-26T14:26:58","name":"match.pd: Use element_mode instead of TYPE_MODE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3fc809a1-6667-daca-e95a-b0a58825e16f@gmail.com/mbox/"},{"id":112996,"url":"https://patchwork.plctlab.org/api/1.2/patches/112996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626150230.2483991-1-christophe.lyon@linaro.org/","msgid":"<20230626150230.2483991-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-26T15:02:30","name":"arm: Fix MVE intrinsics support with LTO (PR target/110268)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626150230.2483991-1-christophe.lyon@linaro.org/mbox/"},{"id":113015,"url":"https://patchwork.plctlab.org/api/1.2/patches/113015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153423.42763-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230626153423.42763-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-26T15:34:23","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153423.42763-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113016,"url":"https://patchwork.plctlab.org/api/1.2/patches/113016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153454.42824-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230626153454.42824-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-26T15:34:54","name":"[2/2] AArch64: New RTL for ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626153454.42824-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113043,"url":"https://patchwork.plctlab.org/api/1.2/patches/113043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJm82eCPnJ4r8nrP@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-26T16:29:13","name":"Fix profile of forwardes produced by cd-dce","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJm82eCPnJ4r8nrP@kam.mff.cuni.cz/mbox/"},{"id":113047,"url":"https://patchwork.plctlab.org/api/1.2/patches/113047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164345.270480-1-jwakely@redhat.com/","msgid":"<20230626164345.270480-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:28","name":"[committed] libstdc++: Qualify calls to debug mode helpers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164345.270480-1-jwakely@redhat.com/mbox/"},{"id":113048,"url":"https://patchwork.plctlab.org/api/1.2/patches/113048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164350.270495-1-jwakely@redhat.com/","msgid":"<20230626164350.270495-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:46","name":"[committed] libstdc++: Implement P2538R1 ADL-proof std::projected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164350.270495-1-jwakely@redhat.com/mbox/"},{"id":113049,"url":"https://patchwork.plctlab.org/api/1.2/patches/113049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164404.270512-1-jwakely@redhat.com/","msgid":"<20230626164404.270512-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-26T16:43:51","name":"[committed] libstdc++: Fix std::format for pointers [PR110239]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164404.270512-1-jwakely@redhat.com/mbox/"},{"id":113050,"url":"https://patchwork.plctlab.org/api/1.2/patches/113050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164512.11512-1-krebbel@linux.ibm.com/","msgid":"<20230626164512.11512-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-06-26T16:45:12","name":"[Committed] IBM zSystems: Assume symbols without explicit alignment to be ok","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626164512.11512-1-krebbel@linux.ibm.com/mbox/"},{"id":113051,"url":"https://patchwork.plctlab.org/api/1.2/patches/113051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUzBG31w-is2RFc-S8fxCv0HBwtakQKoFtbBybuS2F0sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T16:58:22","name":"Go patch committed: Support -fgo-importcfg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUzBG31w-is2RFc-S8fxCv0HBwtakQKoFtbBybuS2F0sw@mail.gmail.com/mbox/"},{"id":113089,"url":"https://patchwork.plctlab.org/api/1.2/patches/113089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc08596b-e2e1-b46c-5697-9e723427ac53@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T18:58:27","name":"RISC-V: Add autovec FP int->float conversion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc08596b-e2e1-b46c-5697-9e723427ac53@gmail.com/mbox/"},{"id":113091,"url":"https://patchwork.plctlab.org/api/1.2/patches/113091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89b515c2-df12-156e-c116-02f711a911d5@gmail.com/","msgid":"<89b515c2-df12-156e-c116-02f711a911d5@gmail.com>","list_archive_url":null,"date":"2023-06-26T18:58:52","name":"RISC-V: Add autovec FP widening/narrowing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89b515c2-df12-156e-c116-02f711a911d5@gmail.com/mbox/"},{"id":113092,"url":"https://patchwork.plctlab.org/api/1.2/patches/113092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f706d9ed-d0d6-8d9b-c515-17efc09a6bd9@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-26T18:59:10","name":"RISC-V: Add autovect widening/narrowing Integer/FP conversions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f706d9ed-d0d6-8d9b-c515-17efc09a6bd9@gmail.com/mbox/"},{"id":113134,"url":"https://patchwork.plctlab.org/api/1.2/patches/113134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626220737.24643-1-apinski@marvell.com/","msgid":"<20230626220737.24643-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-26T22:07:37","name":"[Committed] docs: Add @cindex for some attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230626220737.24643-1-apinski@marvell.com/mbox/"},{"id":113176,"url":"https://patchwork.plctlab.org/api/1.2/patches/113176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627023202.35018-1-apinski@marvell.com/","msgid":"<20230627023202.35018-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-27T02:32:02","name":"Fix __builtin_alloca_with_align_and_max defbuiltin usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627023202.35018-1-apinski@marvell.com/mbox/"},{"id":113187,"url":"https://patchwork.plctlab.org/api/1.2/patches/113187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627032449.37404-1-apinski@marvell.com/","msgid":"<20230627032449.37404-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-27T03:24:49","name":"Mark asm goto with outputs as volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627032449.37404-1-apinski@marvell.com/mbox/"},{"id":113225,"url":"https://patchwork.plctlab.org/api/1.2/patches/113225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627053806.2880955-1-hongtao.liu@intel.com/","msgid":"<20230627053806.2880955-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:38:06","name":"[x86] Refine maskstore patterns with UNSPEC_MASKMOV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627053806.2880955-1-hongtao.liu@intel.com/mbox/"},{"id":113226,"url":"https://patchwork.plctlab.org/api/1.2/patches/113226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz1ha2ik.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T05:38:11","name":"gengtype: Handle braced initialisers in structs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcz1ha2ik.fsf@arm.com/mbox/"},{"id":113232,"url":"https://patchwork.plctlab.org/api/1.2/patches/113232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-1-hongtao.liu@intel.com/","msgid":"<20230627055312.2881827-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:53:11","name":"[1/2] Don'\''t issue vzeroupper for vzeroupper call_insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-1-hongtao.liu@intel.com/mbox/"},{"id":113231,"url":"https://patchwork.plctlab.org/api/1.2/patches/113231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-2-hongtao.liu@intel.com/","msgid":"<20230627055312.2881827-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-06-27T05:53:12","name":"[2/2] Make option mvzeroupper independent of optimization level.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627055312.2881827-2-hongtao.liu@intel.com/mbox/"},{"id":113236,"url":"https://patchwork.plctlab.org/api/1.2/patches/113236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627060617.2250903-1-pan2.li@intel.com/","msgid":"<20230627060617.2250903-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-27T06:06:17","name":"[v1] RISC-V: Allow rounding mode control for RVV floating-point add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627060617.2250903-1-pan2.li@intel.com/mbox/"},{"id":113237,"url":"https://patchwork.plctlab.org/api/1.2/patches/113237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627061148.24656-1-xuli1@eswincomputing.com/","msgid":"<20230627061148.24656-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-06-27T06:11:48","name":"Extend streamer_mode_table size to MACHINE_MODE_BITSIZE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627061148.24656-1-xuli1@eswincomputing.com/mbox/"},{"id":113252,"url":"https://patchwork.plctlab.org/api/1.2/patches/113252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627064737.16257-1-juzhe.zhong@rivai.ai/","msgid":"<20230627064737.16257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-27T06:47:37","name":"[V4] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627064737.16257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113293,"url":"https://patchwork.plctlab.org/api/1.2/patches/113293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e12e9bb3-53ab-d5d4-fb86-d431e254153a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T08:13:19","name":"[v7] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e12e9bb3-53ab-d5d4-fb86-d431e254153a@linux.ibm.com/mbox/"},{"id":113329,"url":"https://patchwork.plctlab.org/api/1.2/patches/113329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627094533.C82C713462@imap2.suse-dmz.suse.de/","msgid":"<20230627094533.C82C713462@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-27T09:45:33","name":"Prevent TYPE_PRECISION on VECTOR_TYPEs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627094533.C82C713462@imap2.suse-dmz.suse.de/mbox/"},{"id":113381,"url":"https://patchwork.plctlab.org/api/1.2/patches/113381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnqru1VGD-A_cWLoQKjX4UntDrMLw3D49GfWYDK7CYKdg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T12:01:18","name":"[SVE] Fold svdupq to VEC_PERM_EXPR if elements are not constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnqru1VGD-A_cWLoQKjX4UntDrMLw3D49GfWYDK7CYKdg@mail.gmail.com/mbox/"},{"id":113382,"url":"https://patchwork.plctlab.org/api/1.2/patches/113382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120745.3419192-1-poulhies@adacore.com/","msgid":"<20230627120745.3419192-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:07:45","name":"[COMMITTED] ada: Fix expanding container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120745.3419192-1-poulhies@adacore.com/mbox/"},{"id":113388,"url":"https://patchwork.plctlab.org/api/1.2/patches/113388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120758.3419680-1-poulhies@adacore.com/","msgid":"<20230627120758.3419680-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:07:58","name":"[COMMITTED] ada: Update printing container aggregates for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120758.3419680-1-poulhies@adacore.com/mbox/"},{"id":113383,"url":"https://patchwork.plctlab.org/api/1.2/patches/113383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120800.3419785-1-poulhies@adacore.com/","msgid":"<20230627120800.3419785-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:00","name":"[COMMITTED] ada: Plug another loophole in the handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120800.3419785-1-poulhies@adacore.com/mbox/"},{"id":113384,"url":"https://patchwork.plctlab.org/api/1.2/patches/113384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120801.3419890-1-poulhies@adacore.com/","msgid":"<20230627120801.3419890-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:01","name":"[COMMITTED] ada: Plug small loophole in the handling of private views in instances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120801.3419890-1-poulhies@adacore.com/mbox/"},{"id":113389,"url":"https://patchwork.plctlab.org/api/1.2/patches/113389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120803.3419993-1-poulhies@adacore.com/","msgid":"<20230627120803.3419993-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:03","name":"[COMMITTED] ada: Fix too late finalization and secondary stack release in iterator loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120803.3419993-1-poulhies@adacore.com/mbox/"},{"id":113385,"url":"https://patchwork.plctlab.org/api/1.2/patches/113385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120805.3420102-1-poulhies@adacore.com/","msgid":"<20230627120805.3420102-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:05","name":"[COMMITTED] ada: Correct the contract of Ada.Text_IO.Get_Line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120805.3420102-1-poulhies@adacore.com/mbox/"},{"id":113392,"url":"https://patchwork.plctlab.org/api/1.2/patches/113392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120807.3420205-1-poulhies@adacore.com/","msgid":"<20230627120807.3420205-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:07","name":"[COMMITTED] ada: Fix incorrect handling of iterator specifications in recent change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120807.3420205-1-poulhies@adacore.com/mbox/"},{"id":113393,"url":"https://patchwork.plctlab.org/api/1.2/patches/113393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120809.3420308-1-poulhies@adacore.com/","msgid":"<20230627120809.3420308-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:09","name":"[COMMITTED] ada: Fix double finalization of case expression in concatenation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120809.3420308-1-poulhies@adacore.com/mbox/"},{"id":113394,"url":"https://patchwork.plctlab.org/api/1.2/patches/113394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120811.3420419-1-poulhies@adacore.com/","msgid":"<20230627120811.3420419-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:11","name":"[COMMITTED] ada: Make the identification of case expressions more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120811.3420419-1-poulhies@adacore.com/mbox/"},{"id":113395,"url":"https://patchwork.plctlab.org/api/1.2/patches/113395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120813.3420523-1-poulhies@adacore.com/","msgid":"<20230627120813.3420523-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:13","name":"[COMMITTED] ada: Fix bad interaction between inlining and thunk generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120813.3420523-1-poulhies@adacore.com/mbox/"},{"id":113396,"url":"https://patchwork.plctlab.org/api/1.2/patches/113396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120815.3420628-1-poulhies@adacore.com/","msgid":"<20230627120815.3420628-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-06-27T12:08:15","name":"[COMMITTED] ada: Fix build of GNAT tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627120815.3420628-1-poulhies@adacore.com/mbox/"},{"id":113426,"url":"https://patchwork.plctlab.org/api/1.2/patches/113426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJrhyTWosoCcEs8V@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-27T13:19:05","name":"Enable ranger for ipa-prop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJrhyTWosoCcEs8V@kam.mff.cuni.cz/mbox/"},{"id":113438,"url":"https://patchwork.plctlab.org/api/1.2/patches/113438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627140924.33604-1-juzhe.zhong@rivai.ai/","msgid":"<20230627140924.33604-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-27T14:09:24","name":"RISC-V: Fix bug of pre-calculated const vector mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230627140924.33604-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113490,"url":"https://patchwork.plctlab.org/api/1.2/patches/113490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAP2b4GPn7Ls+OOn-MeDss4tw1d3M3dRg85jdQN_5VHTE2pBvmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T16:05:40","name":"Basic asm blocks should always be volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAP2b4GPn7Ls+OOn-MeDss4tw1d3M3dRg85jdQN_5VHTE2pBvmg@mail.gmail.com/mbox/"},{"id":113516,"url":"https://patchwork.plctlab.org/api/1.2/patches/113516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com/","msgid":"<013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T17:22:14","name":"[x86] Add cbranchti4 pattern to i386.md (for -m32 compare_by_pieces).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/013101d9a91b$eb84cb60$c28e6220$@nextmovesoftware.com/mbox/"},{"id":113547,"url":"https://patchwork.plctlab.org/api/1.2/patches/113547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com/","msgid":"<020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T18:40:06","name":"[x86] Fix FAIL of gcc.target/i386/pr78794.c on ia32.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020901d9a926$cc4b7950$64e26bf0$@nextmovesoftware.com/mbox/"},{"id":113549,"url":"https://patchwork.plctlab.org/api/1.2/patches/113549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com/","msgid":"<68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com>","list_archive_url":null,"date":"2023-06-27T18:52:01","name":"[V3,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d7fbb3-59b3-6a59-a8ac-773d5d9c6817@linux.ibm.com/mbox/"},{"id":113558,"url":"https://patchwork.plctlab.org/api/1.2/patches/113558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d9a92d$72080150$561803f0$@nextmovesoftware.com/","msgid":"<004001d9a92d$72080150$561803f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-27T19:27:41","name":"[x86] Tweak ix86_expand_int_compare to use PTEST for vector equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004001d9a92d$72080150$561803f0$@nextmovesoftware.com/mbox/"},{"id":113623,"url":"https://patchwork.plctlab.org/api/1.2/patches/113623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479E84A7B3B6A8145B4AE469127A@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-27T21:26:02","name":"Fix collection and processing of autoprofile data for target libs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479E84A7B3B6A8145B4AE469127A@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":113649,"url":"https://patchwork.plctlab.org/api/1.2/patches/113649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628015944.112659-1-juzhe.zhong@rivai.ai/","msgid":"<20230628015944.112659-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T01:59:44","name":"[V2] RISC-V: Fix bug of pre-calculated const vector mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628015944.112659-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113676,"url":"https://patchwork.plctlab.org/api/1.2/patches/113676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628025925.135862-1-juzhe.zhong@rivai.ai/","msgid":"<20230628025925.135862-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T02:59:25","name":"RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628025925.135862-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113679,"url":"https://patchwork.plctlab.org/api/1.2/patches/113679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628031011.138575-1-juzhe.zhong@rivai.ai/","msgid":"<20230628031011.138575-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T03:10:11","name":"[V2] RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628031011.138575-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113680,"url":"https://patchwork.plctlab.org/api/1.2/patches/113680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032858.2614753-1-jason@redhat.com/","msgid":"<20230628032858.2614753-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T03:28:58","name":"[pushed] testsuite: std_list handling for { target c++26 }","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032858.2614753-1-jason@redhat.com/mbox/"},{"id":113681,"url":"https://patchwork.plctlab.org/api/1.2/patches/113681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032934.2615167-1-jason@redhat.com/","msgid":"<20230628032934.2615167-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T03:29:34","name":"[pushed] c++: C++26 constexpr cast from void* [PR110344]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628032934.2615167-1-jason@redhat.com/mbox/"},{"id":113683,"url":"https://patchwork.plctlab.org/api/1.2/patches/113683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628041512.188243-1-juzhe.zhong@rivai.ai/","msgid":"<20230628041512.188243-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T04:15:12","name":"RISC-V: Support vfwmul.vv combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628041512.188243-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113684,"url":"https://patchwork.plctlab.org/api/1.2/patches/113684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628044200.2636996-1-jason@redhat.com/","msgid":"<20230628044200.2636996-1-jason@redhat.com>","list_archive_url":null,"date":"2023-06-28T04:42:00","name":"[pushed] c++: inherited constructor attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628044200.2636996-1-jason@redhat.com/mbox/"},{"id":113685,"url":"https://patchwork.plctlab.org/api/1.2/patches/113685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628071605.203127-1-guojiufu@linux.ibm.com/","msgid":"<20230628071605.203127-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-06-28T07:16:05","name":"[V3] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628071605.203127-1-guojiufu@linux.ibm.com/mbox/"},{"id":113686,"url":"https://patchwork.plctlab.org/api/1.2/patches/113686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628072247.109808-1-apinski@marvell.com/","msgid":"<20230628072247.109808-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-06-28T07:22:48","name":"[COMMITTED] Add testcase for PR 110444","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628072247.109808-1-apinski@marvell.com/mbox/"},{"id":113690,"url":"https://patchwork.plctlab.org/api/1.2/patches/113690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628082707.256024-1-juzhe.zhong@rivai.ai/","msgid":"<20230628082707.256024-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T08:27:07","name":"RISC-V: Support vfwmacc combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628082707.256024-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113720,"url":"https://patchwork.plctlab.org/api/1.2/patches/113720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628091331.3400C3858416@sourceware.org/","msgid":"<20230628091331.3400C3858416@sourceware.org>","list_archive_url":null,"date":"2023-06-28T09:12:33","name":"tree-optimization/110443 - prevent SLP splat of gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628091331.3400C3858416@sourceware.org/mbox/"},{"id":113724,"url":"https://patchwork.plctlab.org/api/1.2/patches/113724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-1-christophe.lyon@linaro.org/","msgid":"<20230628092631.3173114-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-28T09:26:30","name":"[1/2,testsuite,arm] : Make nomve_fp_1.c require arm_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-1-christophe.lyon@linaro.org/mbox/"},{"id":113725,"url":"https://patchwork.plctlab.org/api/1.2/patches/113725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-2-christophe.lyon@linaro.org/","msgid":"<20230628092631.3173114-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-06-28T09:26:31","name":"[2/2,testsuite,arm] : Make mve_fp_fpu[12].c accept single or double precision FPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628092631.3173114-2-christophe.lyon@linaro.org/mbox/"},{"id":113739,"url":"https://patchwork.plctlab.org/api/1.2/patches/113739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628094752.332289-1-juzhe.zhong@rivai.ai/","msgid":"<20230628094752.332289-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T09:47:52","name":"[V3] RISC-V: Fix bug of pre-calculated const vector mask for VNx1BI, VNx2BI and VNx4BI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628094752.332289-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113771,"url":"https://patchwork.plctlab.org/api/1.2/patches/113771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628102228.5F11E3857C51@sourceware.org/","msgid":"<20230628102228.5F11E3857C51@sourceware.org>","list_archive_url":null,"date":"2023-06-28T10:21:45","name":"tree-optimization/110434 - avoid ={v} {CLOBBER} from NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628102228.5F11E3857C51@sourceware.org/mbox/"},{"id":113789,"url":"https://patchwork.plctlab.org/api/1.2/patches/113789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJwM98bEqz9tZ8kZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T10:35:35","name":"[v2,RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJwM98bEqz9tZ8kZ@arm.com/mbox/"},{"id":113796,"url":"https://patchwork.plctlab.org/api/1.2/patches/113796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628105209.1879240-1-lili.cui@intel.com/","msgid":"<20230628105209.1879240-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-06-28T10:52:09","name":"x86: Update model values for Alderlake, Rocketlake and Raptorlake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628105209.1879240-1-lili.cui@intel.com/mbox/"},{"id":113809,"url":"https://patchwork.plctlab.org/api/1.2/patches/113809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz1fg764.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-28T11:25:39","name":"[testsuite] tolerate enabled but missing language frontends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcz1fg764.fsf@lxoliva.fsfla.org/mbox/"},{"id":113822,"url":"https://patchwork.plctlab.org/api/1.2/patches/113822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628115559.116166-1-juzhe.zhong@rivai.ai/","msgid":"<20230628115559.116166-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-28T11:55:59","name":"RISC-V: Support vfwnmacc/vfwmsac/vfwnmsac combine lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628115559.116166-1-juzhe.zhong@rivai.ai/mbox/"},{"id":113826,"url":"https://patchwork.plctlab.org/api/1.2/patches/113826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628123442.E814E385840E@sourceware.org/","msgid":"<20230628123442.E814E385840E@sourceware.org>","list_archive_url":null,"date":"2023-06-28T12:33:59","name":"tree-optimization/110451 - hoist invariant compare after interchange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628123442.E814E385840E@sourceware.org/mbox/"},{"id":113861,"url":"https://patchwork.plctlab.org/api/1.2/patches/113861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628131753.9B5413858C66@sourceware.org/","msgid":"<20230628131753.9B5413858C66@sourceware.org>","list_archive_url":null,"date":"2023-06-28T13:17:09","name":"middle-end/110452 - bad code generation with AVX512 mask splat","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628131753.9B5413858C66@sourceware.org/mbox/"},{"id":113880,"url":"https://patchwork.plctlab.org/api/1.2/patches/113880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4gTZ706kqK1RA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:41:21","name":"[1/19] middle-end ifcvt: Support bitfield lowering of multiple-exit loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4gTZ706kqK1RA@arm.com/mbox/"},{"id":113882,"url":"https://patchwork.plctlab.org/api/1.2/patches/113882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4msITSZSb83WR@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:41:46","name":"[2/19,front-end] C/C++ front-end: add pragma GCC novector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw4msITSZSb83WR@arm.com/mbox/"},{"id":113886,"url":"https://patchwork.plctlab.org/api/1.2/patches/113886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5BcegL6zob2rC@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:43:33","name":"[4/19] middle-end: Fix scale_loop_frequencies segfault on multiple-exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5BcegL6zob2rC@arm.com/mbox/"},{"id":113888,"url":"https://patchwork.plctlab.org/api/1.2/patches/113888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5HgBu6Py9c9Z9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:43:58","name":"[5/19] middle-end: Enable bit-field vectorization to work correctly when we'\''re vectoring inside conds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5HgBu6Py9c9Z9@arm.com/mbox/"},{"id":113891,"url":"https://patchwork.plctlab.org/api/1.2/patches/113891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5OtpY61bsCZBR@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:44:26","name":"[6/19] middle-end: Don'\''t enter piecewise expansion if VF is not constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5OtpY61bsCZBR@arm.com/mbox/"},{"id":113894,"url":"https://patchwork.plctlab.org/api/1.2/patches/113894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5W5lP8SjYGPnX@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:44:59","name":"[7/19] middle-end: Refactor vectorizer loop conditionals and separate out IV to new variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5W5lP8SjYGPnX@arm.com/mbox/"},{"id":113896,"url":"https://patchwork.plctlab.org/api/1.2/patches/113896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5eojLVxxEsYpl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:45:30","name":"[8/19] middle-end: updated niters analysis to handle multiple exits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5eojLVxxEsYpl@arm.com/mbox/"},{"id":113898,"url":"https://patchwork.plctlab.org/api/1.2/patches/113898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5j6WOScQKJHZ5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:45:51","name":"[9/19] AArch64 middle-end: refactor vectorizable_comparison to make the main body re-usable.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5j6WOScQKJHZ5@arm.com/mbox/"},{"id":113903,"url":"https://patchwork.plctlab.org/api/1.2/patches/113903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5qICwz9HKBa98@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:46:16","name":"[10/19] middle-end: implement vectorizable_early_break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5qICwz9HKBa98@arm.com/mbox/"},{"id":113901,"url":"https://patchwork.plctlab.org/api/1.2/patches/113901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5vgFBUoR6BH4m@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:46:38","name":"[11/19] middle-end: implement code motion for early break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw5vgFBUoR6BH4m@arm.com/mbox/"},{"id":113904,"url":"https://patchwork.plctlab.org/api/1.2/patches/113904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw510c3/NpFrqbh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:03","name":"[12/19] middle-end: implement loop peeling and IV updates for early break.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw510c3/NpFrqbh@arm.com/mbox/"},{"id":113906,"url":"https://patchwork.plctlab.org/api/1.2/patches/113906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw560TYdHXPFCP0@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:23","name":"[13/19] middle-end testsuite: un-xfail TSVC loops that check for exit control flow vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw560TYdHXPFCP0@arm.com/mbox/"},{"id":113908,"url":"https://patchwork.plctlab.org/api/1.2/patches/113908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6AK5y1ad3p4AB@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:47:44","name":"[14/19] middle-end testsuite: Add new tests for early break vectorization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6AK5y1ad3p4AB@arm.com/mbox/"},{"id":113911,"url":"https://patchwork.plctlab.org/api/1.2/patches/113911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6GvvJJUSqmXhu@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:10","name":"[15/19] AArch64: Add implementation for vector cbranch for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6GvvJJUSqmXhu@arm.com/mbox/"},{"id":113912,"url":"https://patchwork.plctlab.org/api/1.2/patches/113912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6LhOUJ7LssONs@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:30","name":"[16/19] AArch64 Add optimization for vector != cbranch fed into compare with 0 for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6LhOUJ7LssONs@arm.com/mbox/"},{"id":113907,"url":"https://patchwork.plctlab.org/api/1.2/patches/113907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6SvUWBaXlpQoL@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:48:58","name":"[17/19] AArch64 Add optimization for vector cbranch combining SVE and Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6SvUWBaXlpQoL@arm.com/mbox/"},{"id":113910,"url":"https://patchwork.plctlab.org/api/1.2/patches/113910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6XxayCjJEfBTw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:49:19","name":"[18/19] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6XxayCjJEfBTw@arm.com/mbox/"},{"id":113909,"url":"https://patchwork.plctlab.org/api/1.2/patches/113909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6i/lre3vnMev/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T13:50:03","name":"[19/19] Arm: Add MVE cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJw6i/lre3vnMev/@arm.com/mbox/"},{"id":113913,"url":"https://patchwork.plctlab.org/api/1.2/patches/113913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628135614.846D938313B2@sourceware.org/","msgid":"<20230628135614.846D938313B2@sourceware.org>","list_archive_url":null,"date":"2023-06-28T13:54:53","name":"[vs] tree-optimization/110434 - avoid ={v} {CLOBBER} from NRV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628135614.846D938313B2@sourceware.org/mbox/"},{"id":113917,"url":"https://patchwork.plctlab.org/api/1.2/patches/113917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628140741.3045618-1-philipp.tomsich@vrull.eu/","msgid":"<20230628140741.3045618-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-06-28T14:07:41","name":"[COMMITTED,PR,110308] cprop_hardreg: fix ORIGINAL_REGNO/REG_ATTRS/REG_POINTER handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628140741.3045618-1-philipp.tomsich@vrull.eu/mbox/"},{"id":113937,"url":"https://patchwork.plctlab.org/api/1.2/patches/113937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bfgUqNRS2Sgffhm6t_pebpnF09YRVRrSGZLrG73tuA3w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T14:34:10","name":"[committed] final+varasm: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bfgUqNRS2Sgffhm6t_pebpnF09YRVRrSGZLrG73tuA3w@mail.gmail.com/mbox/"},{"id":113940,"url":"https://patchwork.plctlab.org/api/1.2/patches/113940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628150948.47843-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230628150948.47843-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-28T15:09:48","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628150948.47843-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113943,"url":"https://patchwork.plctlab.org/api/1.2/patches/113943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628151532.48412-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230628151532.48412-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-28T15:15:32","name":"[2/2] AArch64: New RTL for ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628151532.48412-1-oluwatamilore.adebayo@arm.com/mbox/"},{"id":113964,"url":"https://patchwork.plctlab.org/api/1.2/patches/113964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155347.2144291-1-ibuclaw@gdcproject.org/","msgid":"<20230628155347.2144291-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-28T15:53:47","name":"[committed] d: Fix d_signed_or_unsigned_type is invoked for vector types (PR110193)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155347.2144291-1-ibuclaw@gdcproject.org/mbox/"},{"id":113966,"url":"https://patchwork.plctlab.org/api/1.2/patches/113966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155703.2948377-1-tromey@adacore.com/","msgid":"<20230628155703.2948377-1-tromey@adacore.com>","list_archive_url":null,"date":"2023-06-28T15:57:03","name":"Relax type-printer regexp in libstdc++ test suite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628155703.2948377-1-tromey@adacore.com/mbox/"},{"id":113974,"url":"https://patchwork.plctlab.org/api/1.2/patches/113974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628165129.2429217-1-ppalka@redhat.com/","msgid":"<20230628165129.2429217-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-28T16:51:29","name":"c++: cache partial template specialization selection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628165129.2429217-1-ppalka@redhat.com/mbox/"},{"id":114002,"url":"https://patchwork.plctlab.org/api/1.2/patches/114002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628185357.2326251-1-ibuclaw@gdcproject.org/","msgid":"<20230628185357.2326251-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-06-28T18:53:57","name":"[committed] d: Fix wrong code-gen when returning structs by value.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628185357.2326251-1-ibuclaw@gdcproject.org/mbox/"},{"id":114050,"url":"https://patchwork.plctlab.org/api/1.2/patches/114050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d4716674-f97e-4e14-9de2-1b8cedc7f3e0-1687985065511@3c-app-gmx-bs03/","msgid":"","list_archive_url":null,"date":"2023-06-28T20:44:25","name":"[part3,committed] Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-d4716674-f97e-4e14-9de2-1b8cedc7f3e0-1687985065511@3c-app-gmx-bs03/mbox/"},{"id":114056,"url":"https://patchwork.plctlab.org/api/1.2/patches/114056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJyhfQRGFnzqdjFl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-28T21:09:17","name":"Enable early inlining into always_inline functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJyhfQRGFnzqdjFl@kam.mff.cuni.cz/mbox/"},{"id":114076,"url":"https://patchwork.plctlab.org/api/1.2/patches/114076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212228.013E720418@pchp3.se.axis.com/","msgid":"<20230628212228.013E720418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-28T21:22:27","name":"[committed] CRIS: Don'\''t apply PATTERN to insn before validation (PR 110144)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212228.013E720418@pchp3.se.axis.com/mbox/"},{"id":114077,"url":"https://patchwork.plctlab.org/api/1.2/patches/114077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212324.31DF620418@pchp3.se.axis.com/","msgid":"<20230628212324.31DF620418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-28T21:23:24","name":"[committed] testsuite: check_effective_target_lra: CRIS is LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230628212324.31DF620418@pchp3.se.axis.com/mbox/"},{"id":114079,"url":"https://patchwork.plctlab.org/api/1.2/patches/114079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8f76zh7.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-06-28T21:36:36","name":"A couple of va_gc_atomic tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8f76zh7.fsf@arm.com/mbox/"},{"id":114119,"url":"https://patchwork.plctlab.org/api/1.2/patches/114119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014014.3676175-1-pan2.li@intel.com/","msgid":"<20230629014014.3676175-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-29T01:40:14","name":"[v1] RISC-V: Support vfadd static rounding mode by mode switching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014014.3676175-1-pan2.li@intel.com/mbox/"},{"id":114121,"url":"https://patchwork.plctlab.org/api/1.2/patches/114121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014949.1995621-1-lili.cui@intel.com/","msgid":"<20230629014949.1995621-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-06-29T01:49:49","name":"PR gcc/110148:Avoid adding loop-carried ops to long chains","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629014949.1995621-1-lili.cui@intel.com/mbox/"},{"id":114136,"url":"https://patchwork.plctlab.org/api/1.2/patches/114136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629025105.1993837-1-lin1.hu@intel.com/","msgid":"<20230629025105.1993837-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-06-29T02:51:05","name":"i386: refactor macros.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629025105.1993837-1-lin1.hu@intel.com/mbox/"},{"id":114166,"url":"https://patchwork.plctlab.org/api/1.2/patches/114166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629060054.617743-1-pan2.li@intel.com/","msgid":"<20230629060054.617743-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-06-29T06:00:54","name":"[v1] RISC-V: Refactor vxrm_mode attr for type attr equal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629060054.617743-1-pan2.li@intel.com/mbox/"},{"id":114210,"url":"https://patchwork.plctlab.org/api/1.2/patches/114210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081301.965F13858C74@sourceware.org/","msgid":"<20230629081301.965F13858C74@sourceware.org>","list_archive_url":null,"date":"2023-06-29T08:12:18","name":"c/110454 - ICE with bogus TYPE_PRECISION use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081301.965F13858C74@sourceware.org/mbox/"},{"id":114211,"url":"https://patchwork.plctlab.org/api/1.2/patches/114211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081313.797F83858402@sourceware.org/","msgid":"<20230629081313.797F83858402@sourceware.org>","list_archive_url":null,"date":"2023-06-29T08:12:30","name":"middle-end/110461 - pattern applying wrongly to vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629081313.797F83858402@sourceware.org/mbox/"},{"id":114263,"url":"https://patchwork.plctlab.org/api/1.2/patches/114263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629095708.BEB40385840A@sourceware.org/","msgid":"<20230629095708.BEB40385840A@sourceware.org>","list_archive_url":null,"date":"2023-06-29T09:56:14","name":"tree-optimization/110460 - fend off vector types from vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629095708.BEB40385840A@sourceware.org/mbox/"},{"id":114273,"url":"https://patchwork.plctlab.org/api/1.2/patches/114273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com/","msgid":"<022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-29T10:49:30","name":"[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022c01d9aa77$62be0230$283a0690$@nextmovesoftware.com/mbox/"},{"id":114299,"url":"https://patchwork.plctlab.org/api/1.2/patches/114299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629122858.91689385840D@sourceware.org/","msgid":"<20230629122858.91689385840D@sourceware.org>","list_archive_url":null,"date":"2023-06-29T12:28:12","name":"[RFC] target/110456 - avoid loop masking with zero distance dependences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629122858.91689385840D@sourceware.org/mbox/"},{"id":114304,"url":"https://patchwork.plctlab.org/api/1.2/patches/114304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629125430.17021-1-chenglulu@loongson.cn/","msgid":"<20230629125430.17021-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-06-29T12:54:30","name":"LoongArch: Fix bug in loongarch_emit_stack_tie [PR110484].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629125430.17021-1-chenglulu@loongson.cn/mbox/"},{"id":114337,"url":"https://patchwork.plctlab.org/api/1.2/patches/114337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152009.607619-1-jwakely@redhat.com/","msgid":"<20230629152009.607619-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:19:15","name":"[committed] libstdc++: Do not use off64_t in calls to copy_file_range [PR110462]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152009.607619-1-jwakely@redhat.com/mbox/"},{"id":114333,"url":"https://patchwork.plctlab.org/api/1.2/patches/114333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152130.607676-1-jwakely@redhat.com/","msgid":"<20230629152130.607676-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:20:10","name":"[committed] libstdc++: Fix src/c++20/tzdb.cc for non-constexpr std::mutex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152130.607676-1-jwakely@redhat.com/mbox/"},{"id":114335,"url":"https://patchwork.plctlab.org/api/1.2/patches/114335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152247.3838584-1-ppalka@redhat.com/","msgid":"<20230629152247.3838584-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:22:47","name":"c++: NSDMI instantiation during overload resolution [PR110468]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152247.3838584-1-ppalka@redhat.com/mbox/"},{"id":114336,"url":"https://patchwork.plctlab.org/api/1.2/patches/114336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152255.3838604-1-ppalka@redhat.com/","msgid":"<20230629152255.3838604-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-06-29T15:22:55","name":"c++: unpropagated CONSTRUCTOR_MUTABLE_POISON [PR110463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629152255.3838604-1-ppalka@redhat.com/mbox/"},{"id":114338,"url":"https://patchwork.plctlab.org/api/1.2/patches/114338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b8V8ug_NZ8C9LSGQYXnmcqLif+MHZoma5xcf-8J0VAOg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-06-29T15:32:43","name":"[committed] cselib+expr+bitmap: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b8V8ug_NZ8C9LSGQYXnmcqLif+MHZoma5xcf-8J0VAOg@mail.gmail.com/mbox/"},{"id":114367,"url":"https://patchwork.plctlab.org/api/1.2/patches/114367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-1-aldyh@redhat.com/","msgid":"<20230629164833.495003-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-06-29T16:48:33","name":"[COMMITTED] Tidy up the range normalization code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-1-aldyh@redhat.com/mbox/"},{"id":114366,"url":"https://patchwork.plctlab.org/api/1.2/patches/114366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-2-aldyh@redhat.com/","msgid":"<20230629164833.495003-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-06-29T16:48:34","name":"[COMMITTED] Move maybe_set_nonzero_bits() to its only user.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629164833.495003-2-aldyh@redhat.com/mbox/"},{"id":114396,"url":"https://patchwork.plctlab.org/api/1.2/patches/114396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629190330.71131-1-polacek@redhat.com/","msgid":"<20230629190330.71131-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-29T19:03:30","name":"testsuite: Use -fno-report-bug in gcc.dg/plugin/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629190330.71131-1-polacek@redhat.com/mbox/"},{"id":114397,"url":"https://patchwork.plctlab.org/api/1.2/patches/114397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8f6ulzg.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-06-29T19:06:27","name":"[v2] Control flow redundancy hardening","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8f6ulzg.fsf@lxoliva.fsfla.org/mbox/"},{"id":114419,"url":"https://patchwork.plctlab.org/api/1.2/patches/114419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629200120.169263-1-polacek@redhat.com/","msgid":"<20230629200120.169263-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-06-29T20:01:20","name":"i386: add -fno-stack-protector to two tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230629200120.169263-1-polacek@redhat.com/mbox/"},{"id":114435,"url":"https://patchwork.plctlab.org/api/1.2/patches/114435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ3uUW7I2HcSq8Ml@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-06-29T20:49:21","name":"Extend ipa-fnsummary to skip __builtin_expect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ3uUW7I2HcSq8Ml@kam.mff.cuni.cz/mbox/"},{"id":114480,"url":"https://patchwork.plctlab.org/api/1.2/patches/114480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com/","msgid":"<2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com>","list_archive_url":null,"date":"2023-06-29T21:36:07","name":"[ver,3] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a385a78cb95e36090b6b04a673bba2883cc14ce.camel@us.ibm.com/mbox/"},{"id":114530,"url":"https://patchwork.plctlab.org/api/1.2/patches/114530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-2-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:09","name":"[v1,1/6] LoongArch: Added Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-2-panchenghui@loongson.cn/mbox/"},{"id":114535,"url":"https://patchwork.plctlab.org/api/1.2/patches/114535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-3-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:10","name":"[v1,2/6] LoongArch: Added Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-3-panchenghui@loongson.cn/mbox/"},{"id":114531,"url":"https://patchwork.plctlab.org/api/1.2/patches/114531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-4-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:11","name":"[v1,3/6] LoongArch: Added Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-4-panchenghui@loongson.cn/mbox/"},{"id":114534,"url":"https://patchwork.plctlab.org/api/1.2/patches/114534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-5-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:12","name":"[v1,4/6] LoongArch: Added Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-5-panchenghui@loongson.cn/mbox/"},{"id":114532,"url":"https://patchwork.plctlab.org/api/1.2/patches/114532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-6-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:13","name":"[v1,5/6] LoongArch: Added Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-6-panchenghui@loongson.cn/mbox/"},{"id":114536,"url":"https://patchwork.plctlab.org/api/1.2/patches/114536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-7-panchenghui@loongson.cn/","msgid":"<20230630021614.57201-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-06-30T02:16:14","name":"[v1,6/6] LoongArch: Added Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630021614.57201-7-panchenghui@loongson.cn/mbox/"},{"id":114537,"url":"https://patchwork.plctlab.org/api/1.2/patches/114537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630023618.3898001-1-juzhe.zhong@rivai.ai/","msgid":"<20230630023618.3898001-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-06-30T02:36:18","name":"[V2] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630023618.3898001-1-juzhe.zhong@rivai.ai/mbox/"},{"id":114547,"url":"https://patchwork.plctlab.org/api/1.2/patches/114547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630034847.0D200203F8@pchp3.se.axis.com/","msgid":"<20230630034847.0D200203F8@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-06-30T03:48:47","name":"PR108672 re-fixed after [PATCH] libstdc++: Synchronize PSTL with upstream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630034847.0D200203F8@pchp3.se.axis.com/mbox/"},{"id":114560,"url":"https://patchwork.plctlab.org/api/1.2/patches/114560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com/","msgid":"<743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:20:42","name":"tree.h: Hide wi::from_mpz from GENERATOR_FILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/743141ec-624e-0cab-f30e-54765c3c6b05@linux.ibm.com/mbox/"},{"id":114562,"url":"https://patchwork.plctlab.org/api/1.2/patches/114562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB34844532CF2CD395DE99B07E912AA@MN0PR21MB3484.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T05:27:55","name":"Collect both user and kernel events for autofdo tests and autoprofiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/MN0PR21MB34844532CF2CD395DE99B07E912AA@MN0PR21MB3484.namprd21.prod.outlook.com/mbox/"},{"id":114564,"url":"https://patchwork.plctlab.org/api/1.2/patches/114564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com/","msgid":"<7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:37:53","name":"[1/3] targhooks: Extend legitimate_address_p with code_helper [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7928a68a-cb83-3cd7-eacd-63e3f7c2445c@linux.ibm.com/mbox/"},{"id":114569,"url":"https://patchwork.plctlab.org/api/1.2/patches/114569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com/","msgid":"<10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:46:40","name":"[2/3] ivopts: Call valid_mem_ref_p with code_helper [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10aee741-5051-deeb-87bc-3b2e797b1a60@linux.ibm.com/mbox/"},{"id":114572,"url":"https://patchwork.plctlab.org/api/1.2/patches/114572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com/","msgid":"<62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T05:57:13","name":"[3/3] rs6000: Teach legitimate_address_p about LEN_{LOAD, STORE} [PR110248]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/62a04bba-f0b2-7cde-abca-ee72f524e256@linux.ibm.com/mbox/"},{"id":114590,"url":"https://patchwork.plctlab.org/api/1.2/patches/114590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630063521.796C5138F8@imap2.suse-dmz.suse.de/","msgid":"<20230630063521.796C5138F8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-06-30T06:35:19","name":"tree-optimization/110381 - fix testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630063521.796C5138F8@imap2.suse-dmz.suse.de/mbox/"},{"id":114601,"url":"https://patchwork.plctlab.org/api/1.2/patches/114601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com/","msgid":"<016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-06-30T07:29:14","name":"[x86] Add STV support for DImode and SImode rotations by constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/016001d9ab24$9388d1d0$ba9a7570$@nextmovesoftware.com/mbox/"},{"id":114610,"url":"https://patchwork.plctlab.org/api/1.2/patches/114610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8f5uzob.fsf@euler.schwinge.homeip.net/","msgid":"<87v8f5uzob.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-06-30T08:23:00","name":"LTO: Capture '\''lto_file_decl_data *file_data'\'' in '\''class lto_input_block'\'' (was: [PATCH v3] Streamer: Fix out of range memory access of machine mode)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8f5uzob.fsf@euler.schwinge.homeip.net/mbox/"},{"id":114611,"url":"https://patchwork.plctlab.org/api/1.2/patches/114611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630082611.112557-1-oluwatamilore.adebayo@arm.com/","msgid":"<20230630082611.112557-1-oluwatamilore.adebayo@arm.com>","list_archive_url":null,"date":"2023-06-30T08:26:11","name":"[1/2] Mid engine setup [SU]ABDL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630082611.112557-1-oluwatamilore.adebayo@arm.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-06/mbox/"},{"id":25,"url":"https://patchwork.plctlab.org/api/1.2/bundles/25/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-07/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-07","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":114788,"url":"https://patchwork.plctlab.org/api/1.2/patches/114788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-1-dmalcolm@redhat.com/","msgid":"<20230630155409.183039-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-30T15:54:08","name":"[pushed,1/2] jit: avoid using __vector in testcase [PR110466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-1-dmalcolm@redhat.com/mbox/"},{"id":114789,"url":"https://patchwork.plctlab.org/api/1.2/patches/114789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-2-dmalcolm@redhat.com/","msgid":"<20230630155409.183039-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-06-30T15:54:09","name":"[pushed,2/2] jit.exp: handle dwarf version mismatch in jit-check-debug-info [PR110466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630155409.183039-2-dmalcolm@redhat.com/mbox/"},{"id":114858,"url":"https://patchwork.plctlab.org/api/1.2/patches/114858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55d42cc902dfba9a0ae5fd5f670c535afb3f24e.1688151381.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:28","name":"[1/7] Fix up merge/formatting errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f55d42cc902dfba9a0ae5fd5f670c535afb3f24e.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114859,"url":"https://patchwork.plctlab.org/api/1.2/patches/114859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6d794fe1b6225f56be6a89e1df37ed4eebfa5a7.1688151381.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:29","name":"[2/7] OpenMP: OpenMP 5.2 semantics for pointers with unmapped target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6d794fe1b6225f56be6a89e1df37ed4eebfa5a7.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114864,"url":"https://patchwork.plctlab.org/api/1.2/patches/114864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com/","msgid":"<32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:30","name":"[3/7] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32eb81bf6d2682f03f742f6705529add6a6bc2a3.1688151381.git.julian@codesourcery.com/mbox/"},{"id":114861,"url":"https://patchwork.plctlab.org/api/1.2/patches/114861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com/","msgid":"<61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:31","name":"[4/7] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61a830c536143862a56f691d394e3688c554a8db.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114866,"url":"https://patchwork.plctlab.org/api/1.2/patches/114866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com/","msgid":"<1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:32","name":"[5/7] OpenMP: lvalue parsing for map clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f6114c5d351d4cd9a8f857c0362d67774484cc0.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114867,"url":"https://patchwork.plctlab.org/api/1.2/patches/114867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6878a9a33a285142f5314d8c5ddba744eccae3b.1688151382.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-06-30T19:23:33","name":"[6/7] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6878a9a33a285142f5314d8c5ddba744eccae3b.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114865,"url":"https://patchwork.plctlab.org/api/1.2/patches/114865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com/","msgid":"<5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-06-30T19:23:34","name":"[7/7] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5e6873bae7b0f45340ca4503dda048841d33b171.1688151382.git.julian@codesourcery.com/mbox/"},{"id":114868,"url":"https://patchwork.plctlab.org/api/1.2/patches/114868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com/","msgid":"<57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com>","list_archive_url":null,"date":"2023-06-30T19:26:35","name":"[V4,rs6000] Disable generation of scalar modulo instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/57a342c8-c3ae-b12b-f73a-9dc428acc91e@linux.ibm.com/mbox/"},{"id":114873,"url":"https://patchwork.plctlab.org/api/1.2/patches/114873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630201637.766018-1-jwakely@redhat.com/","msgid":"<20230630201637.766018-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-06-30T20:15:54","name":"libstdc++: Enable OpenMP 5.0 pragmas in PSTL headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630201637.766018-1-jwakely@redhat.com/mbox/"},{"id":114910,"url":"https://patchwork.plctlab.org/api/1.2/patches/114910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630225914.620150-1-lhyatt@gmail.com/","msgid":"<20230630225914.620150-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-06-30T22:59:14","name":"c-family: Implement pragma_lex () for preprocess-only mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630225914.620150-1-lhyatt@gmail.com/mbox/"},{"id":114925,"url":"https://patchwork.plctlab.org/api/1.2/patches/114925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630233315.212700-1-vineetg@rivosinc.com/","msgid":"<20230630233315.212700-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-06-30T23:33:15","name":"RISC-V: improve codegen for repeating large constants [3]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230630233315.212700-1-vineetg@rivosinc.com/mbox/"},{"id":114932,"url":"https://patchwork.plctlab.org/api/1.2/patches/114932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39733dc4b96c263db0e75b69c293e2654e2b7e5.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-01T00:58:39","name":"[ver,2] rs6000, __builtin_set_fpscr_rn add retrun value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39733dc4b96c263db0e75b69c293e2654e2b7e5.camel@us.ibm.com/mbox/"},{"id":114941,"url":"https://patchwork.plctlab.org/api/1.2/patches/114941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+dYsxW2YQrtz+A@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:28:34","name":"[v3,1/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+dYsxW2YQrtz+A@Thaum.localdomain/mbox/"},{"id":114942,"url":"https://patchwork.plctlab.org/api/1.2/patches/114942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+duCoetIZP3/mg@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:30:00","name":"[v3,2/3] c++: Improve constexpr error for dangling local variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+duCoetIZP3/mg@Thaum.localdomain/mbox/"},{"id":114943,"url":"https://patchwork.plctlab.org/api/1.2/patches/114943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+d3TmY/AADod0X@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-01T03:30:37","name":"[v3,3/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZJ+d3TmY/AADod0X@Thaum.localdomain/mbox/"},{"id":114959,"url":"https://patchwork.plctlab.org/api/1.2/patches/114959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67OcE1s+SkHUjyaSa0NxziY68xmzoXtoj5BEfEVmxLifPw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-01T05:21:25","name":"lto: Bypass assembler when generating LTO object files. & libiberty: lto: Addition of .symtab in elf file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67OcE1s+SkHUjyaSa0NxziY68xmzoXtoj5BEfEVmxLifPw@mail.gmail.com/mbox/"},{"id":115012,"url":"https://patchwork.plctlab.org/api/1.2/patches/115012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-1-apinski@marvell.com/","msgid":"<20230701082216.299104-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T08:22:15","name":"[1/2] Fix PR 110487: invalid signed boolean value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-1-apinski@marvell.com/mbox/"},{"id":115013,"url":"https://patchwork.plctlab.org/api/1.2/patches/115013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-2-apinski@marvell.com/","msgid":"<20230701082216.299104-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T08:22:16","name":"[2/2] PR 110487: `(a !=/== CST1 ? CST2 : CST3)` pattern for type safety","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701082216.299104-2-apinski@marvell.com/mbox/"},{"id":115020,"url":"https://patchwork.plctlab.org/api/1.2/patches/115020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-2-manolis.tsamis@vrull.eu/","msgid":"<20230701092413.2488806-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-01T09:24:12","name":"[1/2] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-2-manolis.tsamis@vrull.eu/mbox/"},{"id":115021,"url":"https://patchwork.plctlab.org/api/1.2/patches/115021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-3-manolis.tsamis@vrull.eu/","msgid":"<20230701092413.2488806-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-01T09:24:13","name":"[2/2] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701092413.2488806-3-manolis.tsamis@vrull.eu/mbox/"},{"id":115028,"url":"https://patchwork.plctlab.org/api/1.2/patches/115028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKAJV9rjbWo3XFWb@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-01T11:09:11","name":"Fix profile updates in copy-header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKAJV9rjbWo3XFWb@kam.mff.cuni.cz/mbox/"},{"id":115041,"url":"https://patchwork.plctlab.org/api/1.2/patches/115041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701141410.2891380-1-ibuclaw@gdcproject.org/","msgid":"<20230701141410.2891380-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T14:14:10","name":"[GCC,11,committed] d: Fix ICE in setValue, at d/dmd/dinterpret.c:7013","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701141410.2891380-1-ibuclaw@gdcproject.org/mbox/"},{"id":115050,"url":"https://patchwork.plctlab.org/api/1.2/patches/115050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701155556.2966102-1-ibuclaw@gdcproject.org/","msgid":"<20230701155556.2966102-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T15:55:56","name":"[committed] d: Don'\''t generate code that throws exceptions when compiling with `-fno-exceptions'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701155556.2966102-1-ibuclaw@gdcproject.org/mbox/"},{"id":115052,"url":"https://patchwork.plctlab.org/api/1.2/patches/115052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701161831.93249-1-iain@sandoe.co.uk/","msgid":"<20230701161831.93249-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-01T16:18:31","name":"[pushed] libphobos, testsuite: Disable forkgc2 on Darwin [PR103944]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701161831.93249-1-iain@sandoe.co.uk/mbox/"},{"id":115055,"url":"https://patchwork.plctlab.org/api/1.2/patches/115055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp/","msgid":"<6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp>","list_archive_url":null,"date":"2023-07-01T17:19:03","name":"[1/2] xtensa: Fix missing mode warning in \"*eqne_INT_MIN\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6827e2cd-4966-21be-4861-b99bc0aec8ca@yahoo.co.jp/mbox/"},{"id":115056,"url":"https://patchwork.plctlab.org/api/1.2/patches/115056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9dd8d5c-14d2-cfb8-d0e1-35b14a8eb4cb@yahoo.co.jp/","msgid":"","list_archive_url":null,"date":"2023-07-01T17:20:08","name":"[2/2] xtensa: The use of CLAMPS instruction also requires TARGET_MINMAX, as well as TARGET_CLAMPS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9dd8d5c-14d2-cfb8-d0e1-35b14a8eb4cb@yahoo.co.jp/mbox/"},{"id":115060,"url":"https://patchwork.plctlab.org/api/1.2/patches/115060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701212840.330022-1-apinski@marvell.com/","msgid":"<20230701212840.330022-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-01T21:28:40","name":"Use chain_next on eh_landing_pad_d for GTY (PR middle-end/110510)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701212840.330022-1-apinski@marvell.com/mbox/"},{"id":115064,"url":"https://patchwork.plctlab.org/api/1.2/patches/115064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701232147.3265358-1-ibuclaw@gdcproject.org/","msgid":"<20230701232147.3265358-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-01T23:21:47","name":"[committed] d: Fix accesses of immutable arrays using constant index still bounds checked","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230701232147.3265358-1-ibuclaw@gdcproject.org/mbox/"},{"id":115067,"url":"https://patchwork.plctlab.org/api/1.2/patches/115067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702014404.3398624-1-ibuclaw@gdcproject.org/","msgid":"<20230702014404.3398624-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T01:44:04","name":"[committed] d: Fix core.volatile.volatileLoad discarded if result is unused","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702014404.3398624-1-ibuclaw@gdcproject.org/mbox/"},{"id":115079,"url":"https://patchwork.plctlab.org/api/1.2/patches/115079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702102242.56435-1-iain@sandoe.co.uk/","msgid":"<20230702102242.56435-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-02T10:22:42","name":"libphobos: Handle Darwin Arm and AArch64 in fibre context asm.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702102242.56435-1-iain@sandoe.co.uk/mbox/"},{"id":115094,"url":"https://patchwork.plctlab.org/api/1.2/patches/115094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702135601.3632320-1-ibuclaw@gdcproject.org/","msgid":"<20230702135601.3632320-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T13:56:01","name":"[committed] d: Add testcase from PR108962","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702135601.3632320-1-ibuclaw@gdcproject.org/mbox/"},{"id":115095,"url":"https://patchwork.plctlab.org/api/1.2/patches/115095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702142641.21363-1-iain@sandoe.co.uk/","msgid":"<20230702142641.21363-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-02T14:26:41","name":"[pushed] Darwin, Objective-C: Support -fconstant-cfstrings [PR108743].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702142641.21363-1-iain@sandoe.co.uk/mbox/"},{"id":115099,"url":"https://patchwork.plctlab.org/api/1.2/patches/115099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKGPdiAZUtNk3yqa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-02T14:53:42","name":"tree-ssa-math-opts: Fix up ICE in match_uaddc_usubc [PR110508]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKGPdiAZUtNk3yqa@tucnak/mbox/"},{"id":115106,"url":"https://patchwork.plctlab.org/api/1.2/patches/115106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-3-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:09","name":"[v7,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-3-ben.boeckel@kitware.com/mbox/"},{"id":115102,"url":"https://patchwork.plctlab.org/api/1.2/patches/115102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-4-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:10","name":"[v7,3/4] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-4-ben.boeckel@kitware.com/mbox/"},{"id":115104,"url":"https://patchwork.plctlab.org/api/1.2/patches/115104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-5-ben.boeckel@kitware.com/","msgid":"<20230702163211.3396210-5-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-07-02T16:32:11","name":"[v7,4/4] c++modules: report module mapper files as a dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702163211.3396210-5-ben.boeckel@kitware.com/mbox/"},{"id":115150,"url":"https://patchwork.plctlab.org/api/1.2/patches/115150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe43f0e9-8051-4903-8088-e099f9f12528-1688330335546@3c-app-gmx-bs45/","msgid":"","list_archive_url":null,"date":"2023-07-02T20:38:55","name":"Fortran: fixes for procedures with ALLOCATABLE,INTENT(OUT) arguments [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-fe43f0e9-8051-4903-8088-e099f9f12528-1688330335546@3c-app-gmx-bs45/mbox/"},{"id":115161,"url":"https://patchwork.plctlab.org/api/1.2/patches/115161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702232339.3957011-1-ibuclaw@gdcproject.org/","msgid":"<20230702232339.3957011-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-02T23:23:39","name":"[committed] d: Fix testcase failure of gdc.dg/Wbuiltin_declaration_mismatch2.d.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230702232339.3957011-1-ibuclaw@gdcproject.org/mbox/"},{"id":115163,"url":"https://patchwork.plctlab.org/api/1.2/patches/115163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703011753.18876-1-kmatsui@cs.washington.edu/","msgid":"<20230703011753.18876-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T01:17:53","name":"libstdc++: use __is_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703011753.18876-1-kmatsui@cs.washington.edu/mbox/"},{"id":115166,"url":"https://patchwork.plctlab.org/api/1.2/patches/115166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703021500.165265-1-juzhe.zhong@rivai.ai/","msgid":"<20230703021500.165265-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T02:15:00","name":"[V6] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703021500.165265-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115172,"url":"https://patchwork.plctlab.org/api/1.2/patches/115172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com/","msgid":"<90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T02:57:58","name":"[2/9,v2] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER && gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90665240-729b-b07e-61a9-eed0cbdff95a@linux.ibm.com/mbox/"},{"id":115173,"url":"https://patchwork.plctlab.org/api/1.2/patches/115173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com/","msgid":"<06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T02:58:30","name":"[3/9,v2] vect: Adjust vectorizable_load costing on VMAT_INVARIANT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/06e499be-2151-5c64-52be-ac8f69c46ad9@linux.ibm.com/mbox/"},{"id":115174,"url":"https://patchwork.plctlab.org/api/1.2/patches/115174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0313117-cfd0-ff85-09eb-25cc5cf35dee@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T03:01:04","name":"[5/9,v2] vect: Adjust vectorizable_load costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0313117-cfd0-ff85-09eb-25cc5cf35dee@linux.ibm.com/mbox/"},{"id":115176,"url":"https://patchwork.plctlab.org/api/1.2/patches/115176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com/","msgid":"<67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T03:06:27","name":"[9/9,v2] vect: Adjust vectorizable_load costing on VMAT_CONTIGUOUS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/67a6481e-8963-8a05-5dc1-08f835b8fefc@linux.ibm.com/mbox/"},{"id":115185,"url":"https://patchwork.plctlab.org/api/1.2/patches/115185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703040744.258283-1-juzhe.zhong@rivai.ai/","msgid":"<20230703040744.258283-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T04:07:44","name":"Middle-end: Change order of LEN_MASK_LOAD/LEN_MASK_STORE arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703040744.258283-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115197,"url":"https://patchwork.plctlab.org/api/1.2/patches/115197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com/","msgid":"<08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-03T06:30:01","name":"[rs6000] Extract the element in dword0 by mfvsrd and shift/mask [PR110331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/08fef5da-91b2-9e26-4fb2-ce4bb72293e9@linux.ibm.com/mbox/"},{"id":115199,"url":"https://patchwork.plctlab.org/api/1.2/patches/115199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072307.9E9D73858438@sourceware.org/","msgid":"<20230703072307.9E9D73858438@sourceware.org>","list_archive_url":null,"date":"2023-07-03T07:22:23","name":"tree-optimization/110506 - bogus non-zero mask in CCP for vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072307.9E9D73858438@sourceware.org/mbox/"},{"id":115200,"url":"https://patchwork.plctlab.org/api/1.2/patches/115200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072403.17BB83858C1F@sourceware.org/","msgid":"<20230703072403.17BB83858C1F@sourceware.org>","list_archive_url":null,"date":"2023-07-03T07:22:36","name":"tree-optimization/110506 - ICE in pattern recog with TYPE_PRECISION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703072403.17BB83858C1F@sourceware.org/mbox/"},{"id":115211,"url":"https://patchwork.plctlab.org/api/1.2/patches/115211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703080805.1297008-1-pan2.li@intel.com/","msgid":"<20230703080805.1297008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-03T08:08:05","name":"[v1] RISC-V: Fix one typo of FRM dynamic definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703080805.1297008-1-pan2.li@intel.com/mbox/"},{"id":115234,"url":"https://patchwork.plctlab.org/api/1.2/patches/115234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs65uzvw.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T09:07:31","name":"aarch64: Fix vector-to-vector vec_extract","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs65uzvw.fsf@arm.com/mbox/"},{"id":115236,"url":"https://patchwork.plctlab.org/api/1.2/patches/115236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091026.305277-1-juzhe.zhong@rivai.ai/","msgid":"<20230703091026.305277-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T09:10:26","name":"[V2] Middle-end: Change order of LEN_MASK_LOAD/LEN_MASK_STORE arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091026.305277-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115237,"url":"https://patchwork.plctlab.org/api/1.2/patches/115237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091141.34764-1-kmatsui@cs.washington.edu/","msgid":"<20230703091141.34764-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:11:40","name":"[1/2] c++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091141.34764-1-kmatsui@cs.washington.edu/mbox/"},{"id":115238,"url":"https://patchwork.plctlab.org/api/1.2/patches/115238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-1-kmatsui@cs.washington.edu/","msgid":"<20230703091355.35269-1-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:13:54","name":"[1/2] c++, libstdc++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-1-kmatsui@cs.washington.edu/mbox/"},{"id":115239,"url":"https://patchwork.plctlab.org/api/1.2/patches/115239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-2-kmatsui@cs.washington.edu/","msgid":"<20230703091355.35269-2-kmatsui@cs.washington.edu>","list_archive_url":null,"date":"2023-07-03T09:13:55","name":"[2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703091355.35269-2-kmatsui@cs.washington.edu/mbox/"},{"id":115288,"url":"https://patchwork.plctlab.org/api/1.2/patches/115288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5104f927-d7db-c148-911c-0ca8e783a609@gmail.com/","msgid":"<5104f927-d7db-c148-911c-0ca8e783a609@gmail.com>","list_archive_url":null,"date":"2023-07-03T10:19:22","name":"gimple-isel: Recognize vec_extract pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5104f927-d7db-c148-911c-0ca8e783a609@gmail.com/mbox/"},{"id":115307,"url":"https://patchwork.plctlab.org/api/1.2/patches/115307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703105716.2909864-1-pan2.li@intel.com/","msgid":"<20230703105716.2909864-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-03T10:57:16","name":"[v1] RISC-V: Fix one typo for emit_mode_set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703105716.2909864-1-pan2.li@intel.com/mbox/"},{"id":115311,"url":"https://patchwork.plctlab.org/api/1.2/patches/115311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110742.3134160-1-christoph.muellner@vrull.eu/","msgid":"<20230703110742.3134160-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-03T11:07:42","name":"[v2] RISC-V: Add support for vector crypto extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110742.3134160-1-christoph.muellner@vrull.eu/mbox/"},{"id":115313,"url":"https://patchwork.plctlab.org/api/1.2/patches/115313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110912.15311-1-juzhe.zhong@rivai.ai/","msgid":"<20230703110912.15311-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T11:09:12","name":"[V7] Machine Description: Add LEN_MASK_{GATHER_LOAD, SCATTER_STORE} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703110912.15311-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115330,"url":"https://patchwork.plctlab.org/api/1.2/patches/115330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703122045.67AB53858D28@sourceware.org/","msgid":"<20230703122045.67AB53858D28@sourceware.org>","list_archive_url":null,"date":"2023-07-03T12:20:00","name":"middle-end/110495 - avoid associating constants with (VL) vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703122045.67AB53858D28@sourceware.org/mbox/"},{"id":115334,"url":"https://patchwork.plctlab.org/api/1.2/patches/115334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703123342.2341414-1-juzhe.zhong@rivai.ai/","msgid":"<20230703123342.2341414-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-03T12:33:42","name":"[VSETVL,PASS] RISC-V: Optimize local AVL propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703123342.2341414-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115344,"url":"https://patchwork.plctlab.org/api/1.2/patches/115344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703125655.35E62385700B@sourceware.org/","msgid":"<20230703125655.35E62385700B@sourceware.org>","list_archive_url":null,"date":"2023-07-03T12:56:08","name":"tree-optimization/110310 - move vector epilogue disabling to analysis phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703125655.35E62385700B@sourceware.org/mbox/"},{"id":115359,"url":"https://patchwork.plctlab.org/api/1.2/patches/115359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132700.880979-1-poulhies@adacore.com/","msgid":"<20230703132700.880979-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:00","name":"[COMMITTED] ada: Fix small inaccuracy in implementation of B.3.3(20/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132700.880979-1-poulhies@adacore.com/mbox/"},{"id":115360,"url":"https://patchwork.plctlab.org/api/1.2/patches/115360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132712.881166-1-poulhies@adacore.com/","msgid":"<20230703132712.881166-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:12","name":"[COMMITTED] ada: Fix discrepancy in expansion of untagged record equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132712.881166-1-poulhies@adacore.com/mbox/"},{"id":115361,"url":"https://patchwork.plctlab.org/api/1.2/patches/115361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132714.881227-1-poulhies@adacore.com/","msgid":"<20230703132714.881227-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-03T13:27:14","name":"[COMMITTED] ada: Fix renaming of predefined equality operator for unchecked union types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703132714.881227-1-poulhies@adacore.com/mbox/"},{"id":115393,"url":"https://patchwork.plctlab.org/api/1.2/patches/115393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZEF8Z5fuS-6WjLssJvEPRy8bbyaXT_YFPqHTBMEmGtRQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T14:38:11","name":"[committed] tree+ggc: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZEF8Z5fuS-6WjLssJvEPRy8bbyaXT_YFPqHTBMEmGtRQ@mail.gmail.com/mbox/"},{"id":115425,"url":"https://patchwork.plctlab.org/api/1.2/patches/115425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPju=KM4G1tw0SbGLc5h_dumXhRXyfYW=SdeX77C70UeEv4dcQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T16:02:57","name":"[v2] libstdc++: PSTL dispatch for C++20 range random access iterators [PR110512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPju=KM4G1tw0SbGLc5h_dumXhRXyfYW=SdeX77C70UeEv4dcQ@mail.gmail.com/mbox/"},{"id":115432,"url":"https://patchwork.plctlab.org/api/1.2/patches/115432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com/","msgid":"<9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com>","list_archive_url":null,"date":"2023-07-03T16:52:50","name":"vect: Treat vector widening IFN calls as '\''simple'\'' [PR110436]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bcc1810-a2a3-8eee-5926-f3ae0a4d2891@arm.com/mbox/"},{"id":115482,"url":"https://patchwork.plctlab.org/api/1.2/patches/115482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703192024.11486-1-iain@sandoe.co.uk/","msgid":"<20230703192024.11486-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-03T19:20:24","name":"[pushed] testsuite, Darwin: Remove an unnecessary flags addition.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703192024.11486-1-iain@sandoe.co.uk/mbox/"},{"id":115494,"url":"https://patchwork.plctlab.org/api/1.2/patches/115494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6de3ece999e215e7ebbbd124af64a39e726006c.1688418868.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T21:33:15","name":"[1/5] OpenMP: Fix \"exit data\" for array sections for ref-to-ptr components","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6de3ece999e215e7ebbbd124af64a39e726006c.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115496,"url":"https://patchwork.plctlab.org/api/1.2/patches/115496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7a1870f3b2578939796d7d87532e968a0a9f7be.1688418868.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T21:33:16","name":"[2/5] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7a1870f3b2578939796d7d87532e968a0a9f7be.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115495,"url":"https://patchwork.plctlab.org/api/1.2/patches/115495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com/","msgid":"<2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:17","name":"[3/5] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2825766094bb891df0df341574f6a6f0e85e80ba.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115497,"url":"https://patchwork.plctlab.org/api/1.2/patches/115497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com/","msgid":"<518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:18","name":"[4/5] OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/518aa24ef1ce08cdcffa905249b20df0fe230773.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115498,"url":"https://patchwork.plctlab.org/api/1.2/patches/115498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com/","msgid":"<8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-03T21:33:19","name":"[5/5] OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e7811a8e3679d60fb804ac4df7e7523e0c27364.1688418868.git.julian@codesourcery.com/mbox/"},{"id":115503,"url":"https://patchwork.plctlab.org/api/1.2/patches/115503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMmuTO_-n_We6J1k_OXeZAKja9B+7DwkjTrOX6g8NB1ziJWYVg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-03T22:13:05","name":"libstdc++: Split up pstl/set.cc testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMmuTO_-n_We6J1k_OXeZAKja9B+7DwkjTrOX6g8NB1ziJWYVg@mail.gmail.com/mbox/"},{"id":115509,"url":"https://patchwork.plctlab.org/api/1.2/patches/115509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230702.995484-1-jwakely@redhat.com/","msgid":"<20230703230702.995484-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-03T23:06:32","name":"[committed] libstdc++: Qualify calls to std::_Destroy and _Destroy_aux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230702.995484-1-jwakely@redhat.com/mbox/"},{"id":115510,"url":"https://patchwork.plctlab.org/api/1.2/patches/115510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230828.995791-1-jwakely@redhat.com/","msgid":"<20230703230828.995791-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-03T23:08:13","name":"[committed] libstdc++: Fix synopsis test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230703230828.995791-1-jwakely@redhat.com/mbox/"},{"id":115529,"url":"https://patchwork.plctlab.org/api/1.2/patches/115529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp/","msgid":"<932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp>","list_archive_url":null,"date":"2023-07-04T00:57:03","name":"xtensa: Use HARD_REG_SET instead of bare integer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/932ef16c-ce43-30a1-d1c0-a4d3af3918e8@yahoo.co.jp/mbox/"},{"id":115530,"url":"https://patchwork.plctlab.org/api/1.2/patches/115530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010629.31B8220418@pchp3.se.axis.com/","msgid":"<20230704010629.31B8220418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-07-04T01:06:29","name":"[committed] dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010629.31B8220418@pchp3.se.axis.com/mbox/"},{"id":115531,"url":"https://patchwork.plctlab.org/api/1.2/patches/115531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010758.8E35120418@pchp3.se.axis.com/","msgid":"<20230704010758.8E35120418@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-07-04T01:07:58","name":"[committed] CRIS: Replace unspec CRIS_UNSPEC_SWAP_BITS with rtx bitreverse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704010758.8E35120418@pchp3.se.axis.com/mbox/"},{"id":115543,"url":"https://patchwork.plctlab.org/api/1.2/patches/115543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704021832.1580584-1-guojiufu@linux.ibm.com/","msgid":"<20230704021832.1580584-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-04T02:18:32","name":"[V4,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704021832.1580584-1-guojiufu@linux.ibm.com/mbox/"},{"id":115545,"url":"https://patchwork.plctlab.org/api/1.2/patches/115545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704025035.1074040-1-hongtao.liu@intel.com/","msgid":"<20230704025035.1074040-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-04T02:50:35","name":"Break false dependence for vpternlog by inserting vpxor.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704025035.1074040-1-hongtao.liu@intel.com/mbox/"},{"id":115546,"url":"https://patchwork.plctlab.org/api/1.2/patches/115546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704031244.1074834-1-hongyu.wang@intel.com/","msgid":"<20230704031244.1074834-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-07-04T03:12:44","name":"[V2] i386: Inline function with default arch/tune to caller","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704031244.1074834-1-hongyu.wang@intel.com/mbox/"},{"id":115565,"url":"https://patchwork.plctlab.org/api/1.2/patches/115565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704055053.2308713-1-pan2.li@intel.com/","msgid":"<20230704055053.2308713-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T05:50:53","name":"[v1] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704055053.2308713-1-pan2.li@intel.com/mbox/"},{"id":115570,"url":"https://patchwork.plctlab.org/api/1.2/patches/115570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704064227.3432171-1-guojiufu@linux.ibm.com/","msgid":"<20230704064227.3432171-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-04T06:42:27","name":"[V3] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704064227.3432171-1-guojiufu@linux.ibm.com/mbox/"},{"id":115584,"url":"https://patchwork.plctlab.org/api/1.2/patches/115584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704070728.82C0D3858409@sourceware.org/","msgid":"<20230704070728.82C0D3858409@sourceware.org>","list_archive_url":null,"date":"2023-07-04T07:06:44","name":"[v2] middle-end/110495 - avoid associating constants with (VL) vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704070728.82C0D3858409@sourceware.org/mbox/"},{"id":115599,"url":"https://patchwork.plctlab.org/api/1.2/patches/115599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704075320.195407-1-juzhe.zhong@rivai.ai/","msgid":"<20230704075320.195407-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T07:53:20","name":"[V2] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704075320.195407-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115605,"url":"https://patchwork.plctlab.org/api/1.2/patches/115605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080806.2677374-1-pan2.li@intel.com/","msgid":"<20230704080806.2677374-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T08:08:06","name":"[v2] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080806.2677374-1-pan2.li@intel.com/mbox/"},{"id":115607,"url":"https://patchwork.plctlab.org/api/1.2/patches/115607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080929.998656-1-poulhies@adacore.com/","msgid":"<20230704080929.998656-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:29","name":"[COMMITTED] ada: Fix list of inherited subprograms in query for GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080929.998656-1-poulhies@adacore.com/mbox/"},{"id":115610,"url":"https://patchwork.plctlab.org/api/1.2/patches/115610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080945.998813-1-poulhies@adacore.com/","msgid":"<20230704080945.998813-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:45","name":"[COMMITTED] ada: Add No_Use_Of_Attribute & No_Use_Of_Pragma to gnat_rm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080945.998813-1-poulhies@adacore.com/mbox/"},{"id":115608,"url":"https://patchwork.plctlab.org/api/1.2/patches/115608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080947.998876-1-poulhies@adacore.com/","msgid":"<20230704080947.998876-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:47","name":"[COMMITTED] ada: Small adjustments to new procedure Expand_Unchecked_Union_Equality","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080947.998876-1-poulhies@adacore.com/mbox/"},{"id":115609,"url":"https://patchwork.plctlab.org/api/1.2/patches/115609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080950.998976-1-poulhies@adacore.com/","msgid":"<20230704080950.998976-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-04T08:09:50","name":"[COMMITTED] ada: Do not unnecessarily use component-wise loop for slice assignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704080950.998976-1-poulhies@adacore.com/mbox/"},{"id":115611,"url":"https://patchwork.plctlab.org/api/1.2/patches/115611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704081551.3422387-1-lili.cui@intel.com/","msgid":"<20230704081551.3422387-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-07-04T08:15:51","name":"x86: Enable ENQCMD and UINTR for march=sierraforest.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704081551.3422387-1-lili.cui@intel.com/mbox/"},{"id":115619,"url":"https://patchwork.plctlab.org/api/1.2/patches/115619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084045.233AB3858C30@sourceware.org/","msgid":"<20230704084045.233AB3858C30@sourceware.org>","list_archive_url":null,"date":"2023-07-04T08:39:59","name":"tree-optimization/110436 - bogus live/relevant for unused pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084045.233AB3858C30@sourceware.org/mbox/"},{"id":115620,"url":"https://patchwork.plctlab.org/api/1.2/patches/115620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084158.2976523-1-pan2.li@intel.com/","msgid":"<20230704084158.2976523-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T08:41:58","name":"[v1] RISC-V: Refine the insn pattern of fsrm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704084158.2976523-1-pan2.li@intel.com/mbox/"},{"id":115623,"url":"https://patchwork.plctlab.org/api/1.2/patches/115623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB863509CEB9A5B18AD42D986EE12EA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-04T08:51:00","name":"Vect: avoid using uninitialized variable (PR tree-optimization/110531)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB863509CEB9A5B18AD42D986EE12EA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":115633,"url":"https://patchwork.plctlab.org/api/1.2/patches/115633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704091554.7C7393857734@sourceware.org/","msgid":"<20230704091554.7C7393857734@sourceware.org>","list_archive_url":null,"date":"2023-07-04T09:14:43","name":"tree-optimization/110228 - avoid undefs in ifcombine more thoroughly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704091554.7C7393857734@sourceware.org/mbox/"},{"id":115679,"url":"https://patchwork.plctlab.org/api/1.2/patches/115679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095048.1065139-1-jie.mei@oss.cipunited.com/","msgid":"<20230704095048.1065139-1-jie.mei@oss.cipunited.com>","list_archive_url":null,"date":"2023-07-04T09:50:48","name":"MIPS: Adjust mips16e2 related tests for ifcvt costing changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095048.1065139-1-jie.mei@oss.cipunited.com/mbox/"},{"id":115680,"url":"https://patchwork.plctlab.org/api/1.2/patches/115680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095406.3518145-1-juzhe.zhong@rivai.ai/","msgid":"<20230704095406.3518145-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T09:54:06","name":"[V3] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704095406.3518145-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115696,"url":"https://patchwork.plctlab.org/api/1.2/patches/115696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103249.2396A385771F@sourceware.org/","msgid":"<20230704103249.2396A385771F@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:32:06","name":"tree-optimization/110376 - testcase for fixed bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103249.2396A385771F@sourceware.org/mbox/"},{"id":115697,"url":"https://patchwork.plctlab.org/api/1.2/patches/115697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103538.79F723857835@sourceware.org/","msgid":"<20230704103538.79F723857835@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:34:53","name":"Use mark_ssa_maybe_undefs in PHI-OPT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103538.79F723857835@sourceware.org/mbox/"},{"id":115698,"url":"https://patchwork.plctlab.org/api/1.2/patches/115698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103635.3A397385772E@sourceware.org/","msgid":"<20230704103635.3A397385772E@sourceware.org>","list_archive_url":null,"date":"2023-07-04T10:35:06","name":"Remove unnecessary check on scalar_niter == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704103635.3A397385772E@sourceware.org/mbox/"},{"id":115741,"url":"https://patchwork.plctlab.org/api/1.2/patches/115741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704121714.BE6E73856DDC@sourceware.org/","msgid":"<20230704121714.BE6E73856DDC@sourceware.org>","list_archive_url":null,"date":"2023-07-04T12:16:31","name":"tree-optimization/110491 - PHI-OPT and undefs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704121714.BE6E73856DDC@sourceware.org/mbox/"},{"id":115745,"url":"https://patchwork.plctlab.org/api/1.2/patches/115745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704122611.4128668-1-pan2.li@intel.com/","msgid":"<20230704122611.4128668-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T12:26:11","name":"[v1] RISC-V: Use FRM_DYN when add the rounding mode operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704122611.4128668-1-pan2.li@intel.com/mbox/"},{"id":115749,"url":"https://patchwork.plctlab.org/api/1.2/patches/115749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704124332.3961261-1-juzhe.zhong@rivai.ai/","msgid":"<20230704124332.3961261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T12:43:32","name":"[V4] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704124332.3961261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115761,"url":"https://patchwork.plctlab.org/api/1.2/patches/115761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704131000.4031672-1-juzhe.zhong@rivai.ai/","msgid":"<20230704131000.4031672-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-04T13:10:00","name":"[V5] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704131000.4031672-1-juzhe.zhong@rivai.ai/mbox/"},{"id":115807,"url":"https://patchwork.plctlab.org/api/1.2/patches/115807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704140536.680044-1-pan2.li@intel.com/","msgid":"<20230704140536.680044-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-04T14:05:36","name":"[v3] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704140536.680044-1-pan2.li@intel.com/mbox/"},{"id":115840,"url":"https://patchwork.plctlab.org/api/1.2/patches/115840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qjvfp1.fsf@euler.schwinge.homeip.net/","msgid":"<87h6qjvfp1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-04T15:50:34","name":"'\''unsigned int len'\'' field in '\''libcpp/include/symtab.h:struct ht_identifier'\'' (was: [PATCH] pch: Fix streaming of strings with embedded null bytes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qjvfp1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115845,"url":"https://patchwork.plctlab.org/api/1.2/patches/115845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlnvfb8.fsf@euler.schwinge.homeip.net/","msgid":"<87edlnvfb8.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-04T15:58:51","name":"GGC: Remove unused '\''bool is_string'\'' arguments to '\''ggc_pch_{count,alloc,write}_object'\'' (was: RFA - Remove GC zone allocator)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlnvfb8.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115850,"url":"https://patchwork.plctlab.org/api/1.2/patches/115850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704162532.205035-1-vultkayn@gcc.gnu.org/","msgid":"<20230704162532.205035-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-04T16:25:35","name":"analyzer: Add support of placement new and improved operator new [PR105948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230704162532.205035-1-vultkayn@gcc.gnu.org/mbox/"},{"id":115882,"url":"https://patchwork.plctlab.org/api/1.2/patches/115882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f73371d732237ed54ede44b7bd88624@ispras.ru/","msgid":"<8f73371d732237ed54ede44b7bd88624@ispras.ru>","list_archive_url":null,"date":"2023-07-04T18:25:00","name":"Generating all-ones zmm needs dep-breaking pxor before ternlog (PR target/110438)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f73371d732237ed54ede44b7bd88624@ispras.ru/mbox/"},{"id":115922,"url":"https://patchwork.plctlab.org/api/1.2/patches/115922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com/","msgid":"<3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com>","list_archive_url":null,"date":"2023-07-05T03:22:58","name":"[rs6000] Skip redundant vector extract if the element is first element of dword0 [PR110429]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com/mbox/"},{"id":115948,"url":"https://patchwork.plctlab.org/api/1.2/patches/115948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064004.1143580-1-jwakely@redhat.com/","msgid":"<20230705064004.1143580-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:39:39","name":"[committed] libstdc++: Add redundant '\''typename'\'' to std::projected","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064004.1143580-1-jwakely@redhat.com/mbox/"},{"id":115949,"url":"https://patchwork.plctlab.org/api/1.2/patches/115949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064010.1143604-1-jwakely@redhat.com/","msgid":"<20230705064010.1143604-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:40:05","name":"[committed] libstdc++: Use RAII in std::vector::_M_default_append","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064010.1143604-1-jwakely@redhat.com/mbox/"},{"id":115950,"url":"https://patchwork.plctlab.org/api/1.2/patches/115950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064106.1143618-1-jwakely@redhat.com/","msgid":"<20230705064106.1143618-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:40:11","name":"[committed] libstdc++: Fix std::__uninitialized_default_n for constant evaluation [PR110542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064106.1143618-1-jwakely@redhat.com/mbox/"},{"id":115951,"url":"https://patchwork.plctlab.org/api/1.2/patches/115951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064113.1143661-1-jwakely@redhat.com/","msgid":"<20230705064113.1143661-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T06:41:07","name":"[committed] libstdc++: Disable std::forward_list tests for C++98 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705064113.1143661-1-jwakely@redhat.com/mbox/"},{"id":115952,"url":"https://patchwork.plctlab.org/api/1.2/patches/115952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB86357ECFCF921CF3114FC894E12FA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T06:43:13","name":"Vect: use a small step to calculate induction for the unrolled loop (PR tree-optimization/110449)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB86357ECFCF921CF3114FC894E12FA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":115958,"url":"https://patchwork.plctlab.org/api/1.2/patches/115958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705065808.E438A3858408@sourceware.org/","msgid":"<20230705065808.E438A3858408@sourceware.org>","list_archive_url":null,"date":"2023-07-05T06:57:26","name":"middle-end/110541 - VEC_PERM_EXPR documentation is off","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705065808.E438A3858408@sourceware.org/mbox/"},{"id":115966,"url":"https://patchwork.plctlab.org/api/1.2/patches/115966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705070223.806580-1-pan2.li@intel.com/","msgid":"<20230705070223.806580-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-05T07:02:23","name":"[v4] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705070223.806580-1-pan2.li@intel.com/mbox/"},{"id":115987,"url":"https://patchwork.plctlab.org/api/1.2/patches/115987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkgqvlst.fsf@euler.schwinge.homeip.net/","msgid":"<87bkgqvlst.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T07:50:58","name":"GTY: Explicitly reject '\''string_length'\'' option for (fields in) global variables (was: [PATCH] pch: Fix streaming of strings with embedded null bytes)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkgqvlst.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115988,"url":"https://patchwork.plctlab.org/api/1.2/patches/115988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com/","msgid":"<59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com>","list_archive_url":null,"date":"2023-07-05T07:51:34","name":"x86: suppress avx512f-copysign.c testcase for 32-bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59ffe278-c104-4a8e-3eff-82193c15db2d@suse.com/mbox/"},{"id":115994,"url":"https://patchwork.plctlab.org/api/1.2/patches/115994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rbuvljs.fsf@euler.schwinge.homeip.net/","msgid":"<878rbuvljs.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T07:56:23","name":"GTY: Enhance '\''string_length'\'' option documentation (was: '\''unsigned int len'\'' field in '\''libcpp/include/symtab.h:struct ht_identifier'\'' (was: [PATCH] pch: Fix streaming of strings with embedded null bytes))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878rbuvljs.fsf@euler.schwinge.homeip.net/mbox/"},{"id":115997,"url":"https://patchwork.plctlab.org/api/1.2/patches/115997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com/","msgid":"<9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com>","list_archive_url":null,"date":"2023-07-05T08:00:23","name":"[1/2] x86: correct / simplify @vec_extract_hi_ and vec_extract_hi_v32qi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9406368b-8b88-9da9-a89c-1c610eb22f66@suse.com/mbox/"},{"id":115998,"url":"https://patchwork.plctlab.org/api/1.2/patches/115998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3e17c19-0cd4-9d07-bcfc-0312487f029a@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T08:00:55","name":"[2/2] x86: slightly correct / simplify *vec_extractv2ti","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c3e17c19-0cd4-9d07-bcfc-0312487f029a@suse.com/mbox/"},{"id":116000,"url":"https://patchwork.plctlab.org/api/1.2/patches/116000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705080852.2249A3858288@sourceware.org/","msgid":"<20230705080852.2249A3858288@sourceware.org>","list_archive_url":null,"date":"2023-07-05T08:08:09","name":"adjust testcase for now happening epilogue vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705080852.2249A3858288@sourceware.org/mbox/"},{"id":116001,"url":"https://patchwork.plctlab.org/api/1.2/patches/116001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6yvkwc.fsf@euler.schwinge.homeip.net/","msgid":"<875y6yvkwc.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T08:10:27","name":"GTY: Clean up obsolete '\''bool needs_cast_p'\'' field of '\''gcc/gengtype.cc:struct walk_type_data'\'' (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6yvkwc.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116002,"url":"https://patchwork.plctlab.org/api/1.2/patches/116002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705081129.92457-1-kito.cheng@sifive.com/","msgid":"<20230705081129.92457-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-05T08:11:29","name":"RISC-V: Handle rouding mode correctly on zfinx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705081129.92457-1-kito.cheng@sifive.com/mbox/"},{"id":116003,"url":"https://patchwork.plctlab.org/api/1.2/patches/116003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/873522vkmu.fsf@euler.schwinge.homeip.net/","msgid":"<873522vkmu.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T08:16:09","name":"GTY: Clean up obsolete parametrized structs remnants (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/873522vkmu.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116028,"url":"https://patchwork.plctlab.org/api/1.2/patches/116028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635E49C6DC6B89D31D6390FE12FA@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T08:46:26","name":"Vect: select small VF for epilog of unrolled loop (PR tree-optimization/110474)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635E49C6DC6B89D31D6390FE12FA@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":116030,"url":"https://patchwork.plctlab.org/api/1.2/patches/116030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32b33338-a294-1464-6a97-c77c7465eae6@gmail.com/","msgid":"<32b33338-a294-1464-6a97-c77c7465eae6@gmail.com>","list_archive_url":null,"date":"2023-07-05T09:12:00","name":"RISC-V: Allow variable index for vec_set.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32b33338-a294-1464-6a97-c77c7465eae6@gmail.com/mbox/"},{"id":116031,"url":"https://patchwork.plctlab.org/api/1.2/patches/116031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com/","msgid":"<9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com>","list_archive_url":null,"date":"2023-07-05T09:13:12","name":"RISC-V: Support variable index in vec_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9b896dcc-1612-22c6-6770-12159c9b1f07@gmail.com/mbox/"},{"id":116058,"url":"https://patchwork.plctlab.org/api/1.2/patches/116058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzveu08y.fsf@euler.schwinge.homeip.net/","msgid":"<87jzveu08y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T10:21:49","name":"GTY: Repair '\''enum gty_token'\'', '\''token_names'\'' desynchronization (was: [cxx-conversion] Support garbage-collected C++ templates)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzveu08y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116081,"url":"https://patchwork.plctlab.org/api/1.2/patches/116081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com/","msgid":"<56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-05T11:51:18","name":"rs6000: Don'\''t ICE when generating vector pair load/store insns [PR110411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56b3d9a9-fd0b-3760-3a62-25dcddd4dc85@linux.vnet.ibm.com/mbox/"},{"id":116122,"url":"https://patchwork.plctlab.org/api/1.2/patches/116122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d53db0b9-80ae-ff06-1bc9-f6884333c934@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T13:00:01","name":"RISC-V: Change truncate to float_truncate in narrowing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d53db0b9-80ae-ff06-1bc9-f6884333c934@gmail.com/mbox/"},{"id":116140,"url":"https://patchwork.plctlab.org/api/1.2/patches/116140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705134147.13325-1-drross@redhat.com/","msgid":"<20230705134147.13325-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-05T13:41:47","name":"match.pd: Implement missed optimization (~X | Y) ^ X -> ~(X & Y) [PR109986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705134147.13325-1-drross@redhat.com/mbox/"},{"id":116146,"url":"https://patchwork.plctlab.org/api/1.2/patches/116146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705135022.245282-1-juzhe.zhong@rivai.ai/","msgid":"<20230705135022.245282-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-05T13:50:22","name":"[v1] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705135022.245282-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116228,"url":"https://patchwork.plctlab.org/api/1.2/patches/116228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bE2GRmO-1Bwe8mRvA_jdBEr=FVE13rdWsNeWTMP-W-7A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T15:32:51","name":"[committed] sched: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bE2GRmO-1Bwe8mRvA_jdBEr=FVE13rdWsNeWTMP-W-7A@mail.gmail.com/mbox/"},{"id":116236,"url":"https://patchwork.plctlab.org/api/1.2/patches/116236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qitk0h.fsf@euler.schwinge.homeip.net/","msgid":"<87h6qitk0h.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:12:30","name":"[v2] GTY: Clean up obsolete parametrized structs remnants (was: [PATCH 3/3] remove gengtype support for param_is use_param, if_marked and splay tree allocators)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6qitk0h.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116239,"url":"https://patchwork.plctlab.org/api/1.2/patches/116239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705161442.1184446-1-jwakely@redhat.com/","msgid":"<20230705161442.1184446-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-05T16:14:14","name":"doc: Update my Contributors entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705161442.1184446-1-jwakely@redhat.com/mbox/"},{"id":116238,"url":"https://patchwork.plctlab.org/api/1.2/patches/116238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlmtjwh.fsf@euler.schwinge.homeip.net/","msgid":"<87edlmtjwh.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:14:54","name":"GGC, GTY: Tighten up a few things re '\''reorder'\'' option and strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edlmtjwh.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116245,"url":"https://patchwork.plctlab.org/api/1.2/patches/116245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5watjg1.fsf@euler.schwinge.homeip.net/","msgid":"<87a5watjg1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-05T16:24:46","name":"GGC, GTY: No pointer walking for '\''atomic'\'' in PCH '\''gt_pch_note_object'\'' (was: Patch: New GTY ((atomic)) option)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5watjg1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116256,"url":"https://patchwork.plctlab.org/api/1.2/patches/116256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705170136.581584-1-apinski@marvell.com/","msgid":"<20230705170136.581584-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-05T17:01:36","name":"Fix PR 110554: vec lowering introduces scalar signed-boolean:32 comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705170136.581584-1-apinski@marvell.com/mbox/"},{"id":116454,"url":"https://patchwork.plctlab.org/api/1.2/patches/116454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705215151.84788-1-polacek@redhat.com/","msgid":"<20230705215151.84788-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-05T21:51:51","name":"testsuite: fix dwarf2/utf-1.C with DWARF4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705215151.84788-1-polacek@redhat.com/mbox/"},{"id":116459,"url":"https://patchwork.plctlab.org/api/1.2/patches/116459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com/","msgid":"<121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com>","list_archive_url":null,"date":"2023-07-05T23:08:05","name":"[COMMITTED,1/5] Move relation discovery into compute_operand_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/121a95b0-6ab7-5cbb-5a38-1819f0ebeefb@redhat.com/mbox/"},{"id":116458,"url":"https://patchwork.plctlab.org/api/1.2/patches/116458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc3528ef-a7a6-5250-73b9-ec3897e0387f@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:14","name":"[COMMITTED,2/5] Simplify compute_operand_range for op1 and op2 case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc3528ef-a7a6-5250-73b9-ec3897e0387f@redhat.com/mbox/"},{"id":116460,"url":"https://patchwork.plctlab.org/api/1.2/patches/116460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com/","msgid":"<74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com>","list_archive_url":null,"date":"2023-07-05T23:08:21","name":"[COMMITTED,3/5] Make compute_operand1_range a leaf call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74df7fe5-ddc7-f200-78e9-8ce72f17b88b@redhat.com/mbox/"},{"id":116461,"url":"https://patchwork.plctlab.org/api/1.2/patches/116461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5662c87-368a-f072-3819-b6535baefeb1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:29","name":"[COMMITTED,4/5] Make compute_operand2_range a leaf call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f5662c87-368a-f072-3819-b6535baefeb1@redhat.com/mbox/"},{"id":116462,"url":"https://patchwork.plctlab.org/api/1.2/patches/116462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6b8901e-00e9-a30c-0892-aebd98199ee1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-05T23:08:35","name":"[COMMITTED,5/5] Make compute_operand_range a tail call.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b6b8901e-00e9-a30c-0892-aebd98199ee1@redhat.com/mbox/"},{"id":116463,"url":"https://patchwork.plctlab.org/api/1.2/patches/116463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705232724.631992-1-hjl.tools@gmail.com/","msgid":"<20230705232724.631992-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-05T23:27:24","name":"x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230705232724.631992-1-hjl.tools@gmail.com/mbox/"},{"id":116466,"url":"https://patchwork.plctlab.org/api/1.2/patches/116466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011204.3542905-1-hongtao.liu@intel.com/","msgid":"<20230706011204.3542905-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:12:04","name":"Disparage slightly for the alternative which move DFmode between SSE_REGS and GENERAL_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011204.3542905-1-hongtao.liu@intel.com/mbox/"},{"id":116468,"url":"https://patchwork.plctlab.org/api/1.2/patches/116468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-1-hongtao.liu@intel.com/","msgid":"<20230706011816.3543708-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:18:15","name":"[1/2,x86] Add pre_reload splitter to detect fp min/max pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-1-hongtao.liu@intel.com/mbox/"},{"id":116467,"url":"https://patchwork.plctlab.org/api/1.2/patches/116467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-2-hongtao.liu@intel.com/","msgid":"<20230706011816.3543708-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-06T01:18:16","name":"[2/2] Adjust rtx_cost for DF/SFmode AND/IOR/XOR/ANDN operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706011816.3543708-2-hongtao.liu@intel.com/mbox/"},{"id":116511,"url":"https://patchwork.plctlab.org/api/1.2/patches/116511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706052656.3191422-1-pan2.li@intel.com/","msgid":"<20230706052656.3191422-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-06T05:26:56","name":"[v5] RISC-V: Fix one bug for floating-point static frm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706052656.3191422-1-pan2.li@intel.com/mbox/"},{"id":116522,"url":"https://patchwork.plctlab.org/api/1.2/patches/116522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706061626.3420739-1-juzhe.zhong@rivai.ai/","msgid":"<20230706061626.3420739-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T06:16:26","name":"VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706061626.3420739-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116523,"url":"https://patchwork.plctlab.org/api/1.2/patches/116523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063712.409891-1-hongyu.wang@intel.com/","msgid":"<20230706063712.409891-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-07-06T06:37:12","name":"i386: Update document for inlining rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063712.409891-1-hongyu.wang@intel.com/mbox/"},{"id":116524,"url":"https://patchwork.plctlab.org/api/1.2/patches/116524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063713.376465-1-zewei.mo@intel.com/","msgid":"<20230706063713.376465-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-06T06:37:13","name":"Initial Granite Rapids D Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706063713.376465-1-zewei.mo@intel.com/mbox/"},{"id":116526,"url":"https://patchwork.plctlab.org/api/1.2/patches/116526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065135.3448078-1-juzhe.zhong@rivai.ai/","msgid":"<20230706065135.3448078-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T06:51:35","name":"[V2] VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065135.3448078-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116527,"url":"https://patchwork.plctlab.org/api/1.2/patches/116527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065501.3C425138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706065501.3C425138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T06:55:00","name":"Fix expectation on gcc.dg/vect/pr71264.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706065501.3C425138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116537,"url":"https://patchwork.plctlab.org/api/1.2/patches/116537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706072929.D6939138FC@imap2.suse-dmz.suse.de/","msgid":"<20230706072929.D6939138FC@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T07:29:29","name":"tree-optimization/110515 - wrong code with LIM + PRE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706072929.D6939138FC@imap2.suse-dmz.suse.de/mbox/"},{"id":116569,"url":"https://patchwork.plctlab.org/api/1.2/patches/116569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com/","msgid":"<001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-06T09:00:12","name":"[Committed] Handle COPYSIGN in dwarf2out.cc'\''d mem_loc_descriptor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001b01d9afe8$4762efc0$d628cf40$@nextmovesoftware.com/mbox/"},{"id":116620,"url":"https://patchwork.plctlab.org/api/1.2/patches/116620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706104845.604BE138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706104845.604BE138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T10:48:44","name":"tree-optimization/110563 - simplify epilogue VF checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706104845.604BE138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116635,"url":"https://patchwork.plctlab.org/api/1.2/patches/116635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113805.1765789-1-poulhies@adacore.com/","msgid":"<20230706113805.1765789-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:05","name":"[COMMITTED] ada: Finalization not performed for component of protected type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113805.1765789-1-poulhies@adacore.com/mbox/"},{"id":116634,"url":"https://patchwork.plctlab.org/api/1.2/patches/116634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113853.1765963-1-poulhies@adacore.com/","msgid":"<20230706113853.1765963-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:53","name":"[COMMITTED] ada: Improve error message on violation of SPARK_Mode rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113853.1765963-1-poulhies@adacore.com/mbox/"},{"id":116636,"url":"https://patchwork.plctlab.org/api/1.2/patches/116636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113855.1766024-1-poulhies@adacore.com/","msgid":"<20230706113855.1766024-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:55","name":"[COMMITTED] ada: Avoid crash in Find_Optional_Prim_Op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113855.1766024-1-poulhies@adacore.com/mbox/"},{"id":116638,"url":"https://patchwork.plctlab.org/api/1.2/patches/116638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113856.1766127-1-poulhies@adacore.com/","msgid":"<20230706113856.1766127-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:38:56","name":"[COMMITTED] ada: Reuse code in Is_Fully_Initialized_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113856.1766127-1-poulhies@adacore.com/mbox/"},{"id":116637,"url":"https://patchwork.plctlab.org/api/1.2/patches/116637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113907.1766190-1-poulhies@adacore.com/","msgid":"<20230706113907.1766190-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:07","name":"[COMMITTED] ada: Refer to non-Ada binding limitations in user guide","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113907.1766190-1-poulhies@adacore.com/mbox/"},{"id":116639,"url":"https://patchwork.plctlab.org/api/1.2/patches/116639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113908.1766256-1-poulhies@adacore.com/","msgid":"<20230706113908.1766256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:08","name":"[COMMITTED] ada: Evaluate static expressions in Range attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113908.1766256-1-poulhies@adacore.com/mbox/"},{"id":116640,"url":"https://patchwork.plctlab.org/api/1.2/patches/116640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113910.1766318-1-poulhies@adacore.com/","msgid":"<20230706113910.1766318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:10","name":"[COMMITTED] ada: Refactor the proof of the Value and Image runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113910.1766318-1-poulhies@adacore.com/mbox/"},{"id":116641,"url":"https://patchwork.plctlab.org/api/1.2/patches/116641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113913.1766423-1-poulhies@adacore.com/","msgid":"<20230706113913.1766423-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-06T11:39:13","name":"[COMMITTED] ada: Add specification source files of runtime units","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706113913.1766423-1-poulhies@adacore.com/mbox/"},{"id":116647,"url":"https://patchwork.plctlab.org/api/1.2/patches/116647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com/","msgid":"<014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-06T12:04:35","name":"[x86_64] Improve __int128 argument passing (in ix86_expand_move).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/014901d9b002$094f5ec0$1bee1c40$@nextmovesoftware.com/mbox/"},{"id":116700,"url":"https://patchwork.plctlab.org/api/1.2/patches/116700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706132434.77CF8138EE@imap2.suse-dmz.suse.de/","msgid":"<20230706132434.77CF8138EE@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-06T13:24:34","name":"tree-optimization/110556 - tail merging still pre-tuples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706132434.77CF8138EE@imap2.suse-dmz.suse.de/mbox/"},{"id":116731,"url":"https://patchwork.plctlab.org/api/1.2/patches/116731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706135748.2583541-1-claziss@gmail.com/","msgid":"<20230706135748.2583541-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-07-06T13:57:48","name":"[committed] arc: Update builtin documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706135748.2583541-1-claziss@gmail.com/mbox/"},{"id":116734,"url":"https://patchwork.plctlab.org/api/1.2/patches/116734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbNABv8JqSUlOaO@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-06T14:17:36","name":"update_bb_profile_for_threading TLC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbNABv8JqSUlOaO@kam.mff.cuni.cz/mbox/"},{"id":116737,"url":"https://patchwork.plctlab.org/api/1.2/patches/116737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706142551.598751-1-juzhe.zhong@rivai.ai/","msgid":"<20230706142551.598751-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-06T14:25:51","name":"[V2] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706142551.598751-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116753,"url":"https://patchwork.plctlab.org/api/1.2/patches/116753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbYkVxNoKnkW0Px@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-06T15:06:57","name":"Fix profile update after loop-ch and cunroll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKbYkVxNoKnkW0Px@kam.mff.cuni.cz/mbox/"},{"id":116766,"url":"https://patchwork.plctlab.org/api/1.2/patches/116766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706152826.1254690-1-jwakely@redhat.com/","msgid":"<20230706152826.1254690-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-06T15:28:02","name":"[committed] libstdc++: Document --enable-cstdio=stdio_pure [PR110574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706152826.1254690-1-jwakely@redhat.com/mbox/"},{"id":116765,"url":"https://patchwork.plctlab.org/api/1.2/patches/116765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com/","msgid":"<8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-06T15:33:57","name":"[v4] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8623b20d2a26fb43bbff006bdf68f67151fb3ec8.camel@us.ibm.com/mbox/"},{"id":116781,"url":"https://patchwork.plctlab.org/api/1.2/patches/116781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706155559.1041292-1-julian@codesourcery.com/","msgid":"<20230706155559.1041292-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-06T15:55:59","name":"[og13] OpenMP: Expand \"declare mapper\" mappers for target {enter, exit, } data directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706155559.1041292-1-julian@codesourcery.com/mbox/"},{"id":116797,"url":"https://patchwork.plctlab.org/api/1.2/patches/116797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706161521.6094-2-xry111@xry111.site/","msgid":"<20230706161521.6094-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-06T16:15:22","name":"vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230706161521.6094-2-xry111@xry111.site/mbox/"},{"id":116822,"url":"https://patchwork.plctlab.org/api/1.2/patches/116822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6wub1r.fsf@euler.schwinge.homeip.net/","msgid":"<875y6wub1r.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-07-06T18:53:04","name":"GGC: Remove '\''const char *'\'' '\''gt_ggc_mx'\'', '\''gt_pch_nx'\'' variants (was: [PATCH] support ggc hash_map and hash_set)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6wub1r.fsf@euler.schwinge.homeip.net/mbox/"},{"id":116849,"url":"https://patchwork.plctlab.org/api/1.2/patches/116849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062144220.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:35:54","name":"[1/3] testsuite: Add check for vectors of 128 bits being supported","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062144220.28892@tpp.orcam.me.uk/mbox/"},{"id":116850,"url":"https://patchwork.plctlab.org/api/1.2/patches/116850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062153310.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:36:12","name":"[2/3] testsuite: Require 128-bit vectors for bb-slp-pr95839.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062153310.28892@tpp.orcam.me.uk/mbox/"},{"id":116851,"url":"https://patchwork.plctlab.org/api/1.2/patches/116851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062204180.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-06T21:36:32","name":"[3/3] testsuite: Require vectors of doubles for pr97428.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307062204180.28892@tpp.orcam.me.uk/mbox/"},{"id":116889,"url":"https://patchwork.plctlab.org/api/1.2/patches/116889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk/","msgid":"<4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk>","list_archive_url":null,"date":"2023-07-07T00:08:20","name":"committed: Stepping down as maintainer for ARC and Epiphany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4309f5a7-c761-22c7-0abe-71849cc96019@amylaar.uk/mbox/"},{"id":116894,"url":"https://patchwork.plctlab.org/api/1.2/patches/116894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707010023.863732-1-juzhe.zhong@rivai.ai/","msgid":"<20230707010023.863732-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T01:00:23","name":"[V3] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707010023.863732-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116923,"url":"https://patchwork.plctlab.org/api/1.2/patches/116923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707040326.9223-1-juzhe.zhong@rivai.ai/","msgid":"<20230707040326.9223-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T04:03:26","name":"VECT: Add COND_LEN_* operations for loop control with length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707040326.9223-1-juzhe.zhong@rivai.ai/mbox/"},{"id":116967,"url":"https://patchwork.plctlab.org/api/1.2/patches/116967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707052914.3386877-1-hongtao.liu@intel.com/","msgid":"<20230707052914.3386877-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-07T05:29:14","name":"[V2,x86] Add pre_reload splitter to detect fp min/max pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707052914.3386877-1-hongtao.liu@intel.com/mbox/"},{"id":116982,"url":"https://patchwork.plctlab.org/api/1.2/patches/116982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67Mh9wMoNsZV8p1iDUsviNSDuaHkwc-SPjAgo0U-rWaGZw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T06:29:37","name":"lto: bypass-asm: Fixed test(U*) used but never defined error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67Mh9wMoNsZV8p1iDUsviNSDuaHkwc-SPjAgo0U-rWaGZw@mail.gmail.com/mbox/"},{"id":117003,"url":"https://patchwork.plctlab.org/api/1.2/patches/117003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707070727.658031-1-dkm@kataplop.net/","msgid":"<20230707070727.658031-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-07-07T07:07:27","name":"mklog: handle Signed-Off-By, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707070727.658031-1-dkm@kataplop.net/mbox/"},{"id":117027,"url":"https://patchwork.plctlab.org/api/1.2/patches/117027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-1-christophe.lyon@linaro.org/","msgid":"<20230707075145.2929681-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-07T07:51:44","name":"doc: Document arm_v8_1m_main_cde_mve_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-1-christophe.lyon@linaro.org/mbox/"},{"id":117028,"url":"https://patchwork.plctlab.org/api/1.2/patches/117028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-2-christophe.lyon@linaro.org/","msgid":"<20230707075145.2929681-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-07T07:51:45","name":"testsuite: Add _link flavor for several arm_arch* and arm* effective-targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075145.2929681-2-christophe.lyon@linaro.org/mbox/"},{"id":117031,"url":"https://patchwork.plctlab.org/api/1.2/patches/117031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-1-aldyh@redhat.com/","msgid":"<20230707075750.1248045-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:48","name":"[COMMITTED] Implement value/mask tracking for irange.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-1-aldyh@redhat.com/mbox/"},{"id":117030,"url":"https://patchwork.plctlab.org/api/1.2/patches/117030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-2-aldyh@redhat.com/","msgid":"<20230707075750.1248045-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:49","name":"[COMMITTED] The caller to irange::intersect (wide_int, wide_int) must normalize the range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-2-aldyh@redhat.com/mbox/"},{"id":117029,"url":"https://patchwork.plctlab.org/api/1.2/patches/117029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-3-aldyh@redhat.com/","msgid":"<20230707075750.1248045-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-07T07:57:50","name":"[COMMITTED] A singleton irange has all known bits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707075750.1248045-3-aldyh@redhat.com/mbox/"},{"id":117037,"url":"https://patchwork.plctlab.org/api/1.2/patches/117037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707082231.27703-1-xuli1@eswincomputing.com/","msgid":"<20230707082231.27703-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-07T08:22:31","name":"RISCV: Fix local_eliminate_vsetvl_insn bug in VSETVL PASS[PR110560]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707082231.27703-1-xuli1@eswincomputing.com/mbox/"},{"id":117049,"url":"https://patchwork.plctlab.org/api/1.2/patches/117049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17550-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T09:37:20","name":"[1/2] middle-end ifcvt: Reduce comparisons on conditionals by tracking truths [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17550-tamar@arm.com/mbox/"},{"id":117050,"url":"https://patchwork.plctlab.org/api/1.2/patches/117050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKfc66Pp1MdMvKL9@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T09:37:47","name":"[2/2] middle-end ifcvt: Sort PHI arguments not only occurrences but also complexity [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKfc66Pp1MdMvKL9@arm.com/mbox/"},{"id":117127,"url":"https://patchwork.plctlab.org/api/1.2/patches/117127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707104847.271195-1-juzhe.zhong@rivai.ai/","msgid":"<20230707104847.271195-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T10:48:47","name":"[V4] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707104847.271195-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117129,"url":"https://patchwork.plctlab.org/api/1.2/patches/117129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707131857.2386125-2-xry111@xry111.site/","msgid":"<20230707131857.2386125-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-07T13:18:58","name":"[v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707131857.2386125-2-xry111@xry111.site/mbox/"},{"id":117138,"url":"https://patchwork.plctlab.org/api/1.2/patches/117138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707135142.21579-1-jchrist@linux.ibm.com/","msgid":"<20230707135142.21579-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-07-07T13:51:42","name":"s390: Fix vec_init default expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707135142.21579-1-jchrist@linux.ibm.com/mbox/"},{"id":117139,"url":"https://patchwork.plctlab.org/api/1.2/patches/117139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c197435b-f141-5355-7b9b-bc45344178f1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T14:01:21","name":"[pushed,LRA,PR110372] : Refine reload pseudo class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c197435b-f141-5355-7b9b-bc45344178f1@redhat.com/mbox/"},{"id":117162,"url":"https://patchwork.plctlab.org/api/1.2/patches/117162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707143257.24129-1-juzhe.zhong@rivai.ai/","msgid":"<20230707143257.24129-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-07T14:32:57","name":"[V5] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707143257.24129-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117181,"url":"https://patchwork.plctlab.org/api/1.2/patches/117181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707151336.691534-1-hjl.tools@gmail.com/","msgid":"<20230707151336.691534-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-07T15:13:36","name":"[v2] x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707151336.691534-1-hjl.tools@gmail.com/mbox/"},{"id":117202,"url":"https://patchwork.plctlab.org/api/1.2/patches/117202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707163806.1537093-1-jwakely@redhat.com/","msgid":"<20230707163806.1537093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-07T16:36:16","name":"libstdc++: Fix --enable-cstdio=stdio_pure [PR110574]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707163806.1537093-1-jwakely@redhat.com/mbox/"},{"id":117205,"url":"https://patchwork.plctlab.org/api/1.2/patches/117205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707164019.1537221-1-jwakely@redhat.com/","msgid":"<20230707164019.1537221-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-07T16:38:22","name":"libstdc++: Compile basic_file_stdio.cc for LFS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707164019.1537221-1-jwakely@redhat.com/mbox/"},{"id":117222,"url":"https://patchwork.plctlab.org/api/1.2/patches/117222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhJISgInYN208nc@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-07T17:19:29","name":"Fix some profile consistency testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhJISgInYN208nc@kam.mff.cuni.cz/mbox/"},{"id":117224,"url":"https://patchwork.plctlab.org/api/1.2/patches/117224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhKDsbYPGpWEARA@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-07T17:23:26","name":"Cleanup force_edge_cold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKhKDsbYPGpWEARA@kam.mff.cuni.cz/mbox/"},{"id":117234,"url":"https://patchwork.plctlab.org/api/1.2/patches/117234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707175622.702351-1-apinski@marvell.com/","msgid":"<20230707175622.702351-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-07T17:56:22","name":"Fix PR 110539: missed optimization after moving two_value to match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707175622.702351-1-apinski@marvell.com/mbox/"},{"id":117241,"url":"https://patchwork.plctlab.org/api/1.2/patches/117241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5247d438-212e-429f-ac48-fefeeda3f07c-1688754739987@3c-app-gmx-bs47/","msgid":"","list_archive_url":null,"date":"2023-07-07T18:32:20","name":"Fortran: simplification of FINDLOC for constant complex arguments [PR110585]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-5247d438-212e-429f-ac48-fefeeda3f07c-1688754739987@3c-app-gmx-bs47/mbox/"},{"id":117262,"url":"https://patchwork.plctlab.org/api/1.2/patches/117262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707192923.465324-1-ibuclaw@gdcproject.org/","msgid":"<20230707192923.465324-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-07T19:29:23","name":"[committed] d: Fix PR 108842: Cannot use enum array with -fno-druntime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230707192923.465324-1-ibuclaw@gdcproject.org/mbox/"},{"id":117280,"url":"https://patchwork.plctlab.org/api/1.2/patches/117280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com/","msgid":"<34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-07T20:18:56","name":"[ver,3] rs6000, fix vec_replace_unaligned built-in arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34d77a273e2d65312dc3f4a71e33fe938821d1a1.camel@us.ibm.com/mbox/"},{"id":117285,"url":"https://patchwork.plctlab.org/api/1.2/patches/117285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7154d0d309b20945185e1634e08883b00d9f969.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-07T20:40:12","name":"[v5] rs6000: Update the vsx-vector-6.* tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7154d0d309b20945185e1634e08883b00d9f969.camel@us.ibm.com/mbox/"},{"id":117371,"url":"https://patchwork.plctlab.org/api/1.2/patches/117371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-1-kmatsui@gcc.gnu.org/","msgid":"<20230708044539.61276-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:45:38","name":"[v2,1/2] c++, libstdc++: implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117372,"url":"https://patchwork.plctlab.org/api/1.2/patches/117372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-2-kmatsui@gcc.gnu.org/","msgid":"<20230708044539.61276-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:45:39","name":"[v2,2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708044539.61276-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117373,"url":"https://patchwork.plctlab.org/api/1.2/patches/117373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708045005.61988-1-kmatsui@gcc.gnu.org/","msgid":"<20230708045005.61988-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T04:50:05","name":"[v2] libstdc++: use __is_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708045005.61988-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117375,"url":"https://patchwork.plctlab.org/api/1.2/patches/117375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-2-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:08","name":"[v8,1/6] c++: implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117374,"url":"https://patchwork.plctlab.org/api/1.2/patches/117374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-3-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:09","name":"[v8,2/6] libstdc++: use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-3-kmatsui@gcc.gnu.org/mbox/"},{"id":117377,"url":"https://patchwork.plctlab.org/api/1.2/patches/117377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-4-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:10","name":"[v8,3/6] c++: implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-4-kmatsui@gcc.gnu.org/mbox/"},{"id":117376,"url":"https://patchwork.plctlab.org/api/1.2/patches/117376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-5-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:11","name":"[v8,4/6] libstdc++: use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-5-kmatsui@gcc.gnu.org/mbox/"},{"id":117379,"url":"https://patchwork.plctlab.org/api/1.2/patches/117379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-6-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:12","name":"[v8,5/6] c++, libstdc++: implement __is_void built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-6-kmatsui@gcc.gnu.org/mbox/"},{"id":117378,"url":"https://patchwork.plctlab.org/api/1.2/patches/117378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-7-kmatsui@gcc.gnu.org/","msgid":"<20230708051137.63707-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:08:13","name":"[v8,6/6] libstdc++: make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051137.63707-7-kmatsui@gcc.gnu.org/mbox/"},{"id":117380,"url":"https://patchwork.plctlab.org/api/1.2/patches/117380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-1-kmatsui@gcc.gnu.org/","msgid":"<20230708051825.64839-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:18:24","name":"[v3,1/2] c++: implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117381,"url":"https://patchwork.plctlab.org/api/1.2/patches/117381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-2-kmatsui@gcc.gnu.org/","msgid":"<20230708051825.64839-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:18:25","name":"[v3,2/2] libstdc++: use new built-in trait __is_volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708051825.64839-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117382,"url":"https://patchwork.plctlab.org/api/1.2/patches/117382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052335.65718-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:23:34","name":"[v3,1/2] c++: implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117383,"url":"https://patchwork.plctlab.org/api/1.2/patches/117383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052335.65718-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:23:35","name":"[v3,2/2] libstdc++: use new built-in trait __is_array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052335.65718-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117384,"url":"https://patchwork.plctlab.org/api/1.2/patches/117384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052625.66538-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:26:24","name":"[v3,1/2] c++: implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117385,"url":"https://patchwork.plctlab.org/api/1.2/patches/117385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052625.66538-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:26:25","name":"[v3,2/2] libstdc++: use new built-in trait __is_const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052625.66538-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117386,"url":"https://patchwork.plctlab.org/api/1.2/patches/117386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-1-kmatsui@gcc.gnu.org/","msgid":"<20230708052928.67485-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:29:27","name":"[v2,1/2] c++: implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117388,"url":"https://patchwork.plctlab.org/api/1.2/patches/117388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-2-kmatsui@gcc.gnu.org/","msgid":"<20230708052928.67485-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:29:28","name":"[v2,2/2] libstdc++: use new built-in trait __remove_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708052928.67485-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117392,"url":"https://patchwork.plctlab.org/api/1.2/patches/117392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708055435.68714-1-kmatsui@gcc.gnu.org/","msgid":"<20230708055435.68714-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T05:54:34","name":"[v3,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708055435.68714-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117420,"url":"https://patchwork.plctlab.org/api/1.2/patches/117420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708092511.1581884-1-jwakely@redhat.com/","msgid":"<20230708092511.1581884-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-08T09:24:58","name":"[committed] doc: Fix typos in Warning Options [PR110596]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708092511.1581884-1-jwakely@redhat.com/mbox/"},{"id":117431,"url":"https://patchwork.plctlab.org/api/1.2/patches/117431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-1-kmatsui@gcc.gnu.org/","msgid":"<20230708111308.92402-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T11:13:07","name":"[v4,1/2] c++: implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117432,"url":"https://patchwork.plctlab.org/api/1.2/patches/117432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-2-kmatsui@gcc.gnu.org/","msgid":"<20230708111308.92402-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-08T11:13:08","name":"[v4,2/2] libstdc++: use new built-in trait __is_unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230708111308.92402-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117436,"url":"https://patchwork.plctlab.org/api/1.2/patches/117436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a53KgJRT_LM_kTW7a097JUZaBN1M9cfR1WjJftnYa2Ww@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T13:03:44","name":"[committed] gcse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4a53KgJRT_LM_kTW7a097JUZaBN1M9cfR1WjJftnYa2Ww@mail.gmail.com/mbox/"},{"id":117437,"url":"https://patchwork.plctlab.org/api/1.2/patches/117437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z8zYN4_qU5gWbmKdUXC07y2=-AvSjx0ZhLRR=SpB=mbg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T13:04:43","name":"[committed] cprop: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z8zYN4_qU5gWbmKdUXC07y2=-AvSjx0ZhLRR=SpB=mbg@mail.gmail.com/mbox/"},{"id":117440,"url":"https://patchwork.plctlab.org/api/1.2/patches/117440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLyCitnePwtiEucjcAhK8q_PBKuSdsvUpjKkE3iDVu06A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-08T14:23:31","name":"[fortran] Fix default type bugs in gfortran [PR99139, PR99368]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLyCitnePwtiEucjcAhK8q_PBKuSdsvUpjKkE3iDVu06A@mail.gmail.com/mbox/"},{"id":117450,"url":"https://patchwork.plctlab.org/api/1.2/patches/117450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKmKYTnGNGB/9GFW@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-08T16:10:09","name":"Fix profile update in tree-ssa/update-cunroll.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKmKYTnGNGB/9GFW@kam.mff.cuni.cz/mbox/"},{"id":117468,"url":"https://patchwork.plctlab.org/api/1.2/patches/117468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKnZ7Ey9BtAG2S86@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-08T21:49:32","name":"Add missing dump_file check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKnZ7Ey9BtAG2S86@kam.mff.cuni.cz/mbox/"},{"id":117486,"url":"https://patchwork.plctlab.org/api/1.2/patches/117486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-1-kmatsui@gcc.gnu.org/","msgid":"<20230709084717.20744-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T08:47:16","name":"[1/2] c++, libstdc++: implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117487,"url":"https://patchwork.plctlab.org/api/1.2/patches/117487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-2-kmatsui@gcc.gnu.org/","msgid":"<20230709084717.20744-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T08:47:17","name":"[2/2] libstdc++: use new built-in trait __is_signed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709084717.20744-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117488,"url":"https://patchwork.plctlab.org/api/1.2/patches/117488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKNWisMUzv3DQ9u7Cy8UE6Z98Ws3Vzpgc=RLh4Xpq21Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-09T08:52:38","name":"simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YKNWisMUzv3DQ9u7Cy8UE6Z98Ws3Vzpgc=RLh4Xpq21Q@mail.gmail.com/mbox/"},{"id":117502,"url":"https://patchwork.plctlab.org/api/1.2/patches/117502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-1-kmatsui@gcc.gnu.org/","msgid":"<20230709125715.26884-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T12:57:14","name":"[1/2] c++, libstdc++: implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117503,"url":"https://patchwork.plctlab.org/api/1.2/patches/117503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-2-kmatsui@gcc.gnu.org/","msgid":"<20230709125715.26884-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-09T12:57:15","name":"[2/2] libstdc++: use new built-in trait __is_arithmetic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230709125715.26884-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117506,"url":"https://patchwork.plctlab.org/api/1.2/patches/117506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKq18vCQLX4mFtw8@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-09T13:28:18","name":"Improve dumping of profile_count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKq18vCQLX4mFtw8@kam.mff.cuni.cz/mbox/"},{"id":117530,"url":"https://patchwork.plctlab.org/api/1.2/patches/117530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com/","msgid":"<035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-09T20:35:53","name":"[x86] Add AVX512 support for STV of SI/DImode rotation by constant.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/035a01d9b2a4$f6078950$e2169bf0$@nextmovesoftware.com/mbox/"},{"id":117533,"url":"https://patchwork.plctlab.org/api/1.2/patches/117533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com/","msgid":"<037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-09T21:30:28","name":"[X86] Add new insvti_lowpart_1 and insvdi_lowpart_1 patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/037001d9b2ac$9627f3a0$c277dae0$@nextmovesoftware.com/mbox/"},{"id":117539,"url":"https://patchwork.plctlab.org/api/1.2/patches/117539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011400.910408-1-ibuclaw@gdcproject.org/","msgid":"<20230710011400.910408-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-10T01:14:00","name":"[committed] d: Merge upstream dmd, druntime 17ccd12af3, phobos 8d3800bee.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011400.910408-1-ibuclaw@gdcproject.org/mbox/"},{"id":117541,"url":"https://patchwork.plctlab.org/api/1.2/patches/117541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011714.3615931-1-hongtao.liu@intel.com/","msgid":"<20230710011714.3615931-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-10T01:17:14","name":"Break false dependence for vpternlog by inserting vpxor or setting constraint of input operand to '\''0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710011714.3615931-1-hongtao.liu@intel.com/mbox/"},{"id":117603,"url":"https://patchwork.plctlab.org/api/1.2/patches/117603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-1-kmatsui@gcc.gnu.org/","msgid":"<20230710052310.48116-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:23:09","name":"[1/2] c++, libstdc++: implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117604,"url":"https://patchwork.plctlab.org/api/1.2/patches/117604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-2-kmatsui@gcc.gnu.org/","msgid":"<20230710052310.48116-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:23:10","name":"[2/2] libstdc++: use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710052310.48116-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117610,"url":"https://patchwork.plctlab.org/api/1.2/patches/117610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-1-kmatsui@gcc.gnu.org/","msgid":"<20230710053828.49793-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:38:27","name":"[v2,1/2] c++, libstdc++: implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-1-kmatsui@gcc.gnu.org/mbox/"},{"id":117611,"url":"https://patchwork.plctlab.org/api/1.2/patches/117611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-2-kmatsui@gcc.gnu.org/","msgid":"<20230710053828.49793-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-10T05:38:28","name":"[v2,2/2] libstdc++: use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710053828.49793-2-kmatsui@gcc.gnu.org/mbox/"},{"id":117659,"url":"https://patchwork.plctlab.org/api/1.2/patches/117659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710070612.233168-1-juzhe.zhong@rivai.ai/","msgid":"<20230710070612.233168-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T07:06:12","name":"GCSE: Export add_label_notes as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710070612.233168-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117679,"url":"https://patchwork.plctlab.org/api/1.2/patches/117679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710075600.114191-1-juzhe.zhong@rivai.ai/","msgid":"<20230710075600.114191-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T07:56:00","name":"GCSE: Export '\''insert_insn_end_basic_block'\'' as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710075600.114191-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117692,"url":"https://patchwork.plctlab.org/api/1.2/patches/117692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710081259.189869-1-juzhe.zhong@rivai.ai/","msgid":"<20230710081259.189869-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T08:12:59","name":"[v2] GCSE: Export '\''insert_insn_end_basic_block'\'' as global function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710081259.189869-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117869,"url":"https://patchwork.plctlab.org/api/1.2/patches/117869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710113547.142562-1-juzhe.zhong@rivai.ai/","msgid":"<20230710113547.142562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-10T11:35:47","name":"[V2] VECT: Add COND_LEN_* operations for loop control with length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710113547.142562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":117888,"url":"https://patchwork.plctlab.org/api/1.2/patches/117888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124337.2262944-1-poulhies@adacore.com/","msgid":"<20230710124337.2262944-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:37","name":"[COMMITTED] ada: Add leafy mode for zero-call-used-regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124337.2262944-1-poulhies@adacore.com/mbox/"},{"id":117891,"url":"https://patchwork.plctlab.org/api/1.2/patches/117891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124347.2263134-1-poulhies@adacore.com/","msgid":"<20230710124347.2263134-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:47","name":"[COMMITTED] ada: Adapt proof of System.Arith_Double to remove CVC4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124347.2263134-1-poulhies@adacore.com/mbox/"},{"id":117893,"url":"https://patchwork.plctlab.org/api/1.2/patches/117893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124349.2263234-1-poulhies@adacore.com/","msgid":"<20230710124349.2263234-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:49","name":"[COMMITTED] ada: hardcfr: mark throw-expected functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124349.2263234-1-poulhies@adacore.com/mbox/"},{"id":117894,"url":"https://patchwork.plctlab.org/api/1.2/patches/117894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124352.2263295-1-poulhies@adacore.com/","msgid":"<20230710124352.2263295-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:43:52","name":"[COMMITTED] ada: hardcfr: optionally disable in leaf functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124352.2263295-1-poulhies@adacore.com/mbox/"},{"id":117895,"url":"https://patchwork.plctlab.org/api/1.2/patches/117895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124425.2263356-1-poulhies@adacore.com/","msgid":"<20230710124425.2263356-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:25","name":"[COMMITTED] ada: Documentation for mixed declarations and statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124425.2263356-1-poulhies@adacore.com/mbox/"},{"id":117889,"url":"https://patchwork.plctlab.org/api/1.2/patches/117889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124427.2263633-1-poulhies@adacore.com/","msgid":"<20230710124427.2263633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:27","name":"[COMMITTED] ada: Simplify assertion to remove CodePeer message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124427.2263633-1-poulhies@adacore.com/mbox/"},{"id":117892,"url":"https://patchwork.plctlab.org/api/1.2/patches/117892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124429.2263694-1-poulhies@adacore.com/","msgid":"<20230710124429.2263694-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:29","name":"[COMMITTED] ada: Add typedefs to snames.h-tmpl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124429.2263694-1-poulhies@adacore.com/mbox/"},{"id":117890,"url":"https://patchwork.plctlab.org/api/1.2/patches/117890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124431.2263755-1-poulhies@adacore.com/","msgid":"<20230710124431.2263755-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-10T12:44:31","name":"[COMMITTED] ada: Follow-up fix for compilation issue with recent MinGW-w64 versions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710124431.2263755-1-poulhies@adacore.com/mbox/"},{"id":117914,"url":"https://patchwork.plctlab.org/api/1.2/patches/117914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710130847.2940323-1-christophe.lyon@linaro.org/","msgid":"<20230710130847.2940323-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-10T13:08:47","name":"[v2] arm: Fix MVE intrinsics support with LTO (PR target/110268)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710130847.2940323-1-christophe.lyon@linaro.org/mbox/"},{"id":117945,"url":"https://patchwork.plctlab.org/api/1.2/patches/117945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710141904.109665-1-kito.cheng@sifive.com/","msgid":"<20230710141904.109665-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-10T14:19:04","name":"doc: Add doc for RISC-V Operand Modifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710141904.109665-1-kito.cheng@sifive.com/mbox/"},{"id":117951,"url":"https://patchwork.plctlab.org/api/1.2/patches/117951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710150052.1793398-1-ppalka@redhat.com/","msgid":"<20230710150052.1793398-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-10T15:00:52","name":"[pushed] c++: redeclare_class_template and ttps [PR110523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710150052.1793398-1-ppalka@redhat.com/mbox/"},{"id":117955,"url":"https://patchwork.plctlab.org/api/1.2/patches/117955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710174826.48f9230c@vepi2/","msgid":"<20230710174826.48f9230c@vepi2>","list_archive_url":null,"date":"2023-07-10T15:48:26","name":"[Fortran] Allow ref'\''ing PDT'\''s len() in parameter-initializer [PR102003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710174826.48f9230c@vepi2/mbox/"},{"id":117960,"url":"https://patchwork.plctlab.org/api/1.2/patches/117960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.LSU.2.20.2307101549210.13548@wotan.suse.de/","msgid":"","list_archive_url":null,"date":"2023-07-10T15:55:27","name":"[x86-64] RFC: Add nosse abi attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.LSU.2.20.2307101549210.13548@wotan.suse.de/mbox/"},{"id":117974,"url":"https://patchwork.plctlab.org/api/1.2/patches/117974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com/","msgid":"<227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com>","list_archive_url":null,"date":"2023-07-10T16:47:55","name":"[OBVIOUS] rs6000: Remove redundant MEM_P predicate usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/227dcbda-843a-bcf1-5534-6ea2739e4355@linux.ibm.com/mbox/"},{"id":118008,"url":"https://patchwork.plctlab.org/api/1.2/patches/118008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0e6013f-ca38-b98d-dc01-b30adbd5901a@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-07-10T18:33:58","name":"[OpenACC,2.7] readonly modifier support in front-ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d0e6013f-ca38-b98d-dc01-b30adbd5901a@siemens.com/mbox/"},{"id":118014,"url":"https://patchwork.plctlab.org/api/1.2/patches/118014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzv7iold.fsf@oldenburg.str.redhat.com/","msgid":"<87jzv7iold.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-10T18:54:54","name":"libgcc: Fix -Wint-conversion warning in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzv7iold.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118028,"url":"https://patchwork.plctlab.org/api/1.2/patches/118028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710191138.1534922-1-qing.zhao@oracle.com/","msgid":"<20230710191138.1534922-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-07-10T19:11:38","name":"gcc-14/changes.html: Deprecate a GCC C extension on flexible array members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710191138.1534922-1-qing.zhao@oracle.com/mbox/"},{"id":118029,"url":"https://patchwork.plctlab.org/api/1.2/patches/118029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com/","msgid":"<32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-10T19:18:10","name":"[ver3] rs6000, Add return value to __builtin_set_fpscr_rn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32c26f202689add973239530dd52e99716221de2.camel@us.ibm.com/mbox/"},{"id":118048,"url":"https://patchwork.plctlab.org/api/1.2/patches/118048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhF+qhjby3+V3F@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:50:47","name":"Optimize vec_splats of vec_extract for V2DI/V2DF (PR target/99293)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhF+qhjby3+V3F@cowardly-lion.the-meissners.org/mbox/"},{"id":118049,"url":"https://patchwork.plctlab.org/api/1.2/patches/118049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhXGgvRPO1VgAK@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:51:56","name":"Improve 64->128 bit zero extension on PowerPC (PR target/108958)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxhXGgvRPO1VgAK@cowardly-lion.the-meissners.org/mbox/"},{"id":118050,"url":"https://patchwork.plctlab.org/api/1.2/patches/118050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZN4unwZ2+rFcyu+OLkqsqs2Ow5ZibUQedxP7txepNHjg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:55:51","name":"[committed] reorg: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZN4unwZ2+rFcyu+OLkqsqs2Ow5ZibUQedxP7txepNHjg@mail.gmail.com/mbox/"},{"id":118051,"url":"https://patchwork.plctlab.org/api/1.2/patches/118051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxjMDOl1K/d5z23@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-07-10T19:59:44","name":"Fix typo in insn name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZKxjMDOl1K/d5z23@cowardly-lion.the-meissners.org/mbox/"},{"id":118070,"url":"https://patchwork.plctlab.org/api/1.2/patches/118070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710203326.79631-1-polacek@redhat.com/","msgid":"<20230710203326.79631-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-10T20:33:26","name":"testsuite: fix allocator-opt1.C FAIL with old ABI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710203326.79631-1-polacek@redhat.com/mbox/"},{"id":118120,"url":"https://patchwork.plctlab.org/api/1.2/patches/118120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com/","msgid":"<59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com>","list_archive_url":null,"date":"2023-07-10T22:07:39","name":"libgomp: Update OpenMP memory allocation doc, fix omp_high_bw_mem_space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59099ed8-3e38-9532-f8ba-e776c356c3a0@codesourcery.com/mbox/"},{"id":118121,"url":"https://patchwork.plctlab.org/api/1.2/patches/118121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710220957.1579524-1-ibuclaw@gdcproject.org/","msgid":"<20230710220957.1579524-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-07-10T22:09:57","name":"[committed] d: Merge upstream dmd, druntime a88e1335f7, phobos 1921d29df.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230710220957.1579524-1-ibuclaw@gdcproject.org/mbox/"},{"id":118218,"url":"https://patchwork.plctlab.org/api/1.2/patches/118218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711031356.3066611-1-hongtao.liu@intel.com/","msgid":"<20230711031356.3066611-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T03:13:56","name":"Add peephole to eliminate redundant comparison after cmpccxadd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711031356.3066611-1-hongtao.liu@intel.com/mbox/"},{"id":118224,"url":"https://patchwork.plctlab.org/api/1.2/patches/118224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711033639.3081376-1-haochen.jiang@intel.com/","msgid":"<20230711033639.3081376-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-11T03:36:39","name":"i386: Guard 128 bit VAES builtins with AVX512VL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711033639.3081376-1-haochen.jiang@intel.com/mbox/"},{"id":118254,"url":"https://patchwork.plctlab.org/api/1.2/patches/118254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711040130.3090884-1-hongtao.liu@intel.com/","msgid":"<20230711040130.3090884-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T04:01:30","name":"[v2] Break false dependence for vpternlog by inserting vpxor or setting constraint of input operand to '\''0'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711040130.3090884-1-hongtao.liu@intel.com/mbox/"},{"id":118248,"url":"https://patchwork.plctlab.org/api/1.2/patches/118248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711044401.1405808-1-christoph.muellner@vrull.eu/","msgid":"<20230711044401.1405808-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-11T04:44:01","name":"riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711044401.1405808-1-christoph.muellner@vrull.eu/mbox/"},{"id":118273,"url":"https://patchwork.plctlab.org/api/1.2/patches/118273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b620e634-3adf-dba7-51a1-25220a150d6c@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T06:03:51","name":"[v3] x86: make better use of VBROADCASTSS / VPBROADCASTD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b620e634-3adf-dba7-51a1-25220a150d6c@suse.com/mbox/"},{"id":118275,"url":"https://patchwork.plctlab.org/api/1.2/patches/118275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d75a4d5a-8624-aa77-9f29-140767357b58@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T06:08:00","name":"x86: improve fast bfloat->float conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d75a4d5a-8624-aa77-9f29-140767357b58@suse.com/mbox/"},{"id":118283,"url":"https://patchwork.plctlab.org/api/1.2/patches/118283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711063828.331387-1-juzhe.zhong@rivai.ai/","msgid":"<20230711063828.331387-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-11T06:38:28","name":"RISC-V: Optimize permutation codegen with vcompress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711063828.331387-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118307,"url":"https://patchwork.plctlab.org/api/1.2/patches/118307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site/","msgid":"<2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site>","list_archive_url":null,"date":"2023-07-11T08:12:26","name":"[pushed] testsuite: Unbreak pr110557.cc where long is 32-bit (was Re: Pushed: [PATCH v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a5b1036e11476a31c79b0c9d53cca3d7bbe7db2.camel@xry111.site/mbox/"},{"id":118336,"url":"https://patchwork.plctlab.org/api/1.2/patches/118336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711090413.3587421-1-guojiufu@linux.ibm.com/","msgid":"<20230711090413.3587421-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-11T09:04:13","name":"[V4] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711090413.3587421-1-guojiufu@linux.ibm.com/mbox/"},{"id":118337,"url":"https://patchwork.plctlab.org/api/1.2/patches/118337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711091349.3376586-1-hongtao.liu@intel.com/","msgid":"<20230711091349.3376586-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T09:13:49","name":"Add peephole to eliminate redundant comparison after cmpccxadd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711091349.3376586-1-hongtao.liu@intel.com/mbox/"},{"id":118349,"url":"https://patchwork.plctlab.org/api/1.2/patches/118349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092548.2323955-1-poulhies@adacore.com/","msgid":"<20230711092548.2323955-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-11T09:25:48","name":"[COMMITTED] ada: Fix wrong resolution for hidden discriminant in predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092548.2323955-1-poulhies@adacore.com/mbox/"},{"id":118350,"url":"https://patchwork.plctlab.org/api/1.2/patches/118350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092559.2324105-1-poulhies@adacore.com/","msgid":"<20230711092559.2324105-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-11T09:25:59","name":"[COMMITTED] ada: Avoid renaming_decl in case of constrained array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711092559.2324105-1-poulhies@adacore.com/mbox/"},{"id":118356,"url":"https://patchwork.plctlab.org/api/1.2/patches/118356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6qeqma.fsf@oldenburg.str.redhat.com/","msgid":"<875y6qeqma.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:37:01","name":"aarch64: Fix warnings during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y6qeqma.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118364,"url":"https://patchwork.plctlab.org/api/1.2/patches/118364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg42dbzt.fsf@oldenburg.str.redhat.com/","msgid":"<87zg42dbzt.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:14","name":"m68k: Avoid implicit function declaration in libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg42dbzt.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118371,"url":"https://patchwork.plctlab.org/api/1.2/patches/118371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8eqdbz9.fsf@oldenburg.str.redhat.com/","msgid":"<87v8eqdbz9.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:34","name":"csky: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8eqdbz9.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118379,"url":"https://patchwork.plctlab.org/api/1.2/patches/118379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0pedbyq.fsf@oldenburg.str.redhat.com/","msgid":"<87r0pedbyq.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:38:53","name":"riscv: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0pedbyq.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118372,"url":"https://patchwork.plctlab.org/api/1.2/patches/118372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt02dby7.fsf@oldenburg.str.redhat.com/","msgid":"<87mt02dby7.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:39:12","name":"arc: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87mt02dby7.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118373,"url":"https://patchwork.plctlab.org/api/1.2/patches/118373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilaqdbxn.fsf@oldenburg.str.redhat.com/","msgid":"<87ilaqdbxn.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-07-11T09:39:32","name":"or1k: Fix -Wincompatible-pointer-types warning during libgcc build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ilaqdbxn.fsf@oldenburg.str.redhat.com/mbox/"},{"id":118406,"url":"https://patchwork.plctlab.org/api/1.2/patches/118406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711102308.129C83855587@sourceware.org/","msgid":"<20230711102308.129C83855587@sourceware.org>","list_archive_url":null,"date":"2023-07-11T10:22:23","name":"tree-optimization/110614 - SLP splat and re-align (optimized)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711102308.129C83855587@sourceware.org/mbox/"},{"id":118411,"url":"https://patchwork.plctlab.org/api/1.2/patches/118411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-2-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:51","name":"[1/3] fortran: defer class wrapper initialization after deallocation [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-2-mikael@gcc.gnu.org/mbox/"},{"id":118412,"url":"https://patchwork.plctlab.org/api/1.2/patches/118412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-3-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:52","name":"[2/3] fortran: Factor data references for scalar class argument wrapping [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-3-mikael@gcc.gnu.org/mbox/"},{"id":118413,"url":"https://patchwork.plctlab.org/api/1.2/patches/118413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-4-mikael@gcc.gnu.org/","msgid":"<20230711103253.1589353-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T10:32:53","name":"[3/3] fortran: Reorder array argument evaluation parts [PR92178]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711103253.1589353-4-mikael@gcc.gnu.org/mbox/"},{"id":118414,"url":"https://patchwork.plctlab.org/api/1.2/patches/118414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com/","msgid":"<34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com>","list_archive_url":null,"date":"2023-07-11T10:35:38","name":"libgomp: Use libnuma for OpenMP'\''s partition=nearest allocation trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34fce57b-69a0-a9fd-f8ff-671ee7f94227@codesourcery.com/mbox/"},{"id":118415,"url":"https://patchwork.plctlab.org/api/1.2/patches/118415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddd7f9cd-994e-0baf-33a3-34c27539f2b1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T10:37:19","name":"Include insn-opinit.h in PLUGIN_H [PR110610]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddd7f9cd-994e-0baf-33a3-34c27539f2b1@arm.com/mbox/"},{"id":118435,"url":"https://patchwork.plctlab.org/api/1.2/patches/118435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com/","msgid":"<8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com>","list_archive_url":null,"date":"2023-07-11T11:51:46","name":"genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8fd3db77-035d-6874-6c71-47c944c465b5@gmail.com/mbox/"},{"id":118437,"url":"https://patchwork.plctlab.org/api/1.2/patches/118437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711120835.2043753-1-mikael@gcc.gnu.org/","msgid":"<20230711120835.2043753-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-11T12:08:35","name":"fortran: Release symbols in reversed order [PR106050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711120835.2043753-1-mikael@gcc.gnu.org/mbox/"},{"id":118441,"url":"https://patchwork.plctlab.org/api/1.2/patches/118441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711121639.2421168-1-ppalka@redhat.com/","msgid":"<20230711121639.2421168-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-11T12:16:39","name":"c++: coercing variable template from current inst [PR110580]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711121639.2421168-1-ppalka@redhat.com/mbox/"},{"id":118492,"url":"https://patchwork.plctlab.org/api/1.2/patches/118492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK1PLZaV457x2pTt@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-11T12:46:37","name":"Loop-ch improvements, part 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK1PLZaV457x2pTt@kam.mff.cuni.cz/mbox/"},{"id":118525,"url":"https://patchwork.plctlab.org/api/1.2/patches/118525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d2aba95-9433-8419-126b-cae83075422e@gmail.com/","msgid":"<7d2aba95-9433-8419-126b-cae83075422e@gmail.com>","list_archive_url":null,"date":"2023-07-11T13:31:13","name":"genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d2aba95-9433-8419-126b-cae83075422e@gmail.com/mbox/"},{"id":118531,"url":"https://patchwork.plctlab.org/api/1.2/patches/118531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711133523.3617092-1-hongtao.liu@intel.com/","msgid":"<20230711133523.3617092-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-11T13:35:23","name":"Fix typo in the testcase.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711133523.3617092-1-hongtao.liu@intel.com/mbox/"},{"id":118614,"url":"https://patchwork.plctlab.org/api/1.2/patches/118614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711153949.6676-1-cooper.qu@linux.alibaba.com/","msgid":"<20230711153949.6676-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-11T15:39:49","name":"[1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711153949.6676-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":118646,"url":"https://patchwork.plctlab.org/api/1.2/patches/118646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YfabfMForrLNJp51ML5YNt8zSTFEx_NdGSgs0BzABOtw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-11T16:36:16","name":"[committed] cfg+gcse: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YfabfMForrLNJp51ML5YNt8zSTFEx_NdGSgs0BzABOtw@mail.gmail.com/mbox/"},{"id":118690,"url":"https://patchwork.plctlab.org/api/1.2/patches/118690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com/","msgid":"<5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-11T18:06:52","name":"[ver4] rs6000, Add return value to __builtin_set_fpscr_rn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5aed4393c2919f683dc9a950922c5fefdb613ef2.camel@us.ibm.com/mbox/"},{"id":118691,"url":"https://patchwork.plctlab.org/api/1.2/patches/118691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com/","msgid":"<028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-11T19:07:50","name":"[x86] PR target/110598: Fix rega = 0; rega ^= rega regression.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/028501d9b42a$fe59bba0$fb0d32e0$@nextmovesoftware.com/mbox/"},{"id":118693,"url":"https://patchwork.plctlab.org/api/1.2/patches/118693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-bb05afea-59cc-4557-8d76-9f901044315b-1689104371308@3c-app-gmx-bs33/","msgid":"","list_archive_url":null,"date":"2023-07-11T19:39:31","name":"Fortran: formal symbol attributes for intrinsic procedures [PR110288]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-bb05afea-59cc-4557-8d76-9f901044315b-1689104371308@3c-app-gmx-bs33/mbox/"},{"id":118702,"url":"https://patchwork.plctlab.org/api/1.2/patches/118702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com/","msgid":"<02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-11T20:07:10","name":"[x86] Fix FAIL of gcc.target/i386/pr91681-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02a401d9b433$47f0de80$d7d29b80$@nextmovesoftware.com/mbox/"},{"id":118707,"url":"https://patchwork.plctlab.org/api/1.2/patches/118707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com/","msgid":"<7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com>","list_archive_url":null,"date":"2023-07-11T20:24:44","name":"[v2] genopinit: Allow more than 256 modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4427e7-37f2-428e-7d6b-8196f688ee72@gmail.com/mbox/"},{"id":118727,"url":"https://patchwork.plctlab.org/api/1.2/patches/118727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-2-david.faust@oracle.com/","msgid":"<20230711215716.12980-2-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:08","name":"[1/9] c-family: add btf_decl_tag attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-2-david.faust@oracle.com/mbox/"},{"id":118720,"url":"https://patchwork.plctlab.org/api/1.2/patches/118720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-3-david.faust@oracle.com/","msgid":"<20230711215716.12980-3-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:09","name":"[2/9] include: add BTF decl tag defines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-3-david.faust@oracle.com/mbox/"},{"id":118722,"url":"https://patchwork.plctlab.org/api/1.2/patches/118722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-4-david.faust@oracle.com/","msgid":"<20230711215716.12980-4-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:10","name":"[3/9] dwarf: create annotation DIEs for decl tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-4-david.faust@oracle.com/mbox/"},{"id":118723,"url":"https://patchwork.plctlab.org/api/1.2/patches/118723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-5-david.faust@oracle.com/","msgid":"<20230711215716.12980-5-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:11","name":"[4/9] dwarf: expose get_die_parent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-5-david.faust@oracle.com/mbox/"},{"id":118721,"url":"https://patchwork.plctlab.org/api/1.2/patches/118721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-6-david.faust@oracle.com/","msgid":"<20230711215716.12980-6-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:12","name":"[5/9] ctf: add support to pass through BTF tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-6-david.faust@oracle.com/mbox/"},{"id":118725,"url":"https://patchwork.plctlab.org/api/1.2/patches/118725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-7-david.faust@oracle.com/","msgid":"<20230711215716.12980-7-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:13","name":"[6/9] dwarf2ctf: convert annotation DIEs to CTF types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-7-david.faust@oracle.com/mbox/"},{"id":118729,"url":"https://patchwork.plctlab.org/api/1.2/patches/118729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-8-david.faust@oracle.com/","msgid":"<20230711215716.12980-8-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:14","name":"[7/9] btf: create and output BTF_KIND_DECL_TAG types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-8-david.faust@oracle.com/mbox/"},{"id":118726,"url":"https://patchwork.plctlab.org/api/1.2/patches/118726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-9-david.faust@oracle.com/","msgid":"<20230711215716.12980-9-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:15","name":"[8/9] testsuite: add tests for BTF decl tags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-9-david.faust@oracle.com/mbox/"},{"id":118724,"url":"https://patchwork.plctlab.org/api/1.2/patches/118724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-10-david.faust@oracle.com/","msgid":"<20230711215716.12980-10-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-11T21:57:16","name":"[9/9] doc: document btf_decl_tag attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230711215716.12980-10-david.faust@oracle.com/mbox/"},{"id":118789,"url":"https://patchwork.plctlab.org/api/1.2/patches/118789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712031935.3908564-1-yunqiang.su@cipunited.com/","msgid":"<20230712031935.3908564-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-12T03:19:35","name":"[RFC] Store_bit_field_1: Use mode of SUBREG instead of REG","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712031935.3908564-1-yunqiang.su@cipunited.com/mbox/"},{"id":118792,"url":"https://patchwork.plctlab.org/api/1.2/patches/118792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712032730.40158-1-lehua.ding@rivai.ai/","msgid":"<20230712032730.40158-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-12T03:27:30","name":"RISC-V: Throw compilation error for unknown sub-extension or supervisor extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712032730.40158-1-lehua.ding@rivai.ai/mbox/"},{"id":118804,"url":"https://patchwork.plctlab.org/api/1.2/patches/118804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040133.88791-1-lehua.ding@rivai.ai/","msgid":"<20230712040133.88791-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:01:33","name":"mklog: Add --append option to auto add generate ChangeLog to patch file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040133.88791-1-lehua.ding@rivai.ai/mbox/"},{"id":118805,"url":"https://patchwork.plctlab.org/api/1.2/patches/118805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040502.3283038-1-pan2.li@intel.com/","msgid":"<20230712040502.3283038-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T04:05:02","name":"[V6] RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712040502.3283038-1-pan2.li@intel.com/mbox/"},{"id":118808,"url":"https://patchwork.plctlab.org/api/1.2/patches/118808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/","msgid":"<20230712042124.111818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:21:24","name":"VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118814,"url":"https://patchwork.plctlab.org/api/1.2/patches/118814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712044424.75724-1-juzhe.zhong@rivai.ai/","msgid":"<20230712044424.75724-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T04:44:24","name":"RISC-V: Support COND_LEN_* patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712044424.75724-1-juzhe.zhong@rivai.ai/mbox/"},{"id":118829,"url":"https://patchwork.plctlab.org/api/1.2/patches/118829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712054609.3958442-1-pan2.li@intel.com/","msgid":"<20230712054609.3958442-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T05:46:09","name":"[v1] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712054609.3958442-1-pan2.li@intel.com/mbox/"},{"id":118830,"url":"https://patchwork.plctlab.org/api/1.2/patches/118830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055053.4016796-1-pan2.li@intel.com/","msgid":"<20230712055053.4016796-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T05:50:53","name":"[v2] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055053.4016796-1-pan2.li@intel.com/mbox/"},{"id":118831,"url":"https://patchwork.plctlab.org/api/1.2/patches/118831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055613.1716215-1-zewei.mo@intel.com/","msgid":"<20230712055613.1716215-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-12T05:56:13","name":"Initial Granite Rapids D Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712055613.1716215-1-zewei.mo@intel.com/mbox/"},{"id":118839,"url":"https://patchwork.plctlab.org/api/1.2/patches/118839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712062855.13455-1-guojie@loongson.cn/","msgid":"<20230712062855.13455-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-07-12T06:28:55","name":"LoongArch: Fix the missing include file when using gcc plugins.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712062855.13455-1-guojie@loongson.cn/mbox/"},{"id":118944,"url":"https://patchwork.plctlab.org/api/1.2/patches/118944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712083923.92799-1-juzhe.zhong@rivai.ai/","msgid":"<20230712083923.92799-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T08:39:23","name":"RISC-V: Support integer mult highpart auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712083923.92799-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119025,"url":"https://patchwork.plctlab.org/api/1.2/patches/119025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712093849.102131-1-juzhe.zhong@rivai.ai/","msgid":"<20230712093849.102131-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T09:38:49","name":"[V7] RISC-V: RISC-V: Support gather_load/scatter RVV auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712093849.102131-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119056,"url":"https://patchwork.plctlab.org/api/1.2/patches/119056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712103621.47696-1-juzhe.zhong@rivai.ai/","msgid":"<20230712103621.47696-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T10:36:21","name":"[V2] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712103621.47696-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119077,"url":"https://patchwork.plctlab.org/api/1.2/patches/119077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712110100.3B3AD3857726@sourceware.org/","msgid":"<20230712110100.3B3AD3857726@sourceware.org>","list_archive_url":null,"date":"2023-07-12T11:00:16","name":"tree-optimization/110630 - enhance SLP permute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712110100.3B3AD3857726@sourceware.org/mbox/"},{"id":119083,"url":"https://patchwork.plctlab.org/api/1.2/patches/119083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com/","msgid":"<4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com>","list_archive_url":null,"date":"2023-07-12T11:05:10","name":"[IRA] Skip empty register classes in setup_reg_class_relations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c71614eec51bbefe18602f3fb6301efcf33f477.camel@microchip.com/mbox/"},{"id":119086,"url":"https://patchwork.plctlab.org/api/1.2/patches/119086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712111608.71951-1-juzhe.zhong@rivai.ai/","msgid":"<20230712111608.71951-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T11:16:08","name":"[V3] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712111608.71951-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119165,"url":"https://patchwork.plctlab.org/api/1.2/patches/119165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712131739.270277-1-juzhe.zhong@rivai.ai/","msgid":"<20230712131739.270277-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T13:17:39","name":"[V4] VECT: Apply COND_LEN_* into vectorizable_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712131739.270277-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119177,"url":"https://patchwork.plctlab.org/api/1.2/patches/119177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712133740.7216B3858020@sourceware.org/","msgid":"<20230712133740.7216B3858020@sourceware.org>","list_archive_url":null,"date":"2023-07-12T13:36:56","name":"tree-optimization/94864 - vector insert of vector extract simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712133740.7216B3858020@sourceware.org/mbox/"},{"id":119183,"url":"https://patchwork.plctlab.org/api/1.2/patches/119183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-1-julian@codesourcery.com/","msgid":"<20230712134207.123424-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T13:42:06","name":"[og13] OpenACC: Vector length warning fixes for implicit mapping/declare create tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-1-julian@codesourcery.com/mbox/"},{"id":119184,"url":"https://patchwork.plctlab.org/api/1.2/patches/119184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-2-julian@codesourcery.com/","msgid":"<20230712134207.123424-2-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T13:42:07","name":"OpenMP: Strided/rectangular '\''target update'\'' out-of-bounds array lookup fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712134207.123424-2-julian@codesourcery.com/mbox/"},{"id":119212,"url":"https://patchwork.plctlab.org/api/1.2/patches/119212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com/","msgid":"<4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com>","list_archive_url":null,"date":"2023-07-12T14:17:30","name":"[committed] libgomp.texi: add cross ref, remove duplicated entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e7cfa3e-1ffd-dc8e-b6e1-c52715352ad1@codesourcery.com/mbox/"},{"id":119224,"url":"https://patchwork.plctlab.org/api/1.2/patches/119224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZHTn7U9ejR8+K+f+GUy=sf=aN5_UorSVrDyezWadgb6g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T14:32:46","name":"[committed] ifcvt: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZHTn7U9ejR8+K+f+GUy=sf=aN5_UorSVrDyezWadgb6g@mail.gmail.com/mbox/"},{"id":119232,"url":"https://patchwork.plctlab.org/api/1.2/patches/119232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712150302.3517511-1-pan2.li@intel.com/","msgid":"<20230712150302.3517511-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-12T15:03:02","name":"[v1] RISC-V: Add more tests for RVV floating-point FRM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712150302.3517511-1-pan2.li@intel.com/mbox/"},{"id":119245,"url":"https://patchwork.plctlab.org/api/1.2/patches/119245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712152438.296209-1-juzhe.zhong@rivai.ai/","msgid":"<20230712152438.296209-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-12T15:24:38","name":"[V2] RISC-V: Support COND_LEN_* patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712152438.296209-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119251,"url":"https://patchwork.plctlab.org/api/1.2/patches/119251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712154138.2837658-1-ppalka@redhat.com/","msgid":"<20230712154138.2837658-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-12T15:41:38","name":"c++: constrained surrogate calls [PR110535]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712154138.2837658-1-ppalka@redhat.com/mbox/"},{"id":119259,"url":"https://patchwork.plctlab.org/api/1.2/patches/119259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712160802.998150-1-apinski@marvell.com/","msgid":"<20230712160802.998150-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-12T16:08:02","name":"Fix part of PR 110293: `A NEEQ (A NEEQ CST)` part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712160802.998150-1-apinski@marvell.com/mbox/"},{"id":119264,"url":"https://patchwork.plctlab.org/api/1.2/patches/119264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712162108.50227-1-aldyh@redhat.com/","msgid":"<20230712162108.50227-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T16:21:08","name":"[COMMITTED,range-op] Enable value/mask propagation in range-op.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712162108.50227-1-aldyh@redhat.com/mbox/"},{"id":119323,"url":"https://patchwork.plctlab.org/api/1.2/patches/119323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712184747.3213450-1-ppalka@redhat.com/","msgid":"<20230712184747.3213450-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-12T18:47:47","name":"c++: non-standalone surrogate call template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712184747.3213450-1-ppalka@redhat.com/mbox/"},{"id":119325,"url":"https://patchwork.plctlab.org/api/1.2/patches/119325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aRuKRYpydsdxmfLOuGgcuO08FXgeyD6AQt=0jjfQV1_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T19:11:50","name":"[committed] IRA+LRA: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aRuKRYpydsdxmfLOuGgcuO08FXgeyD6AQt=0jjfQV1_g@mail.gmail.com/mbox/"},{"id":119328,"url":"https://patchwork.plctlab.org/api/1.2/patches/119328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712200500.1914419-1-jwakely@redhat.com/","msgid":"<20230712200500.1914419-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-12T20:04:38","name":"[committed] libstdc++: Check conversion from filesystem::path to wide strings [PR95048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712200500.1914419-1-jwakely@redhat.com/mbox/"},{"id":119333,"url":"https://patchwork.plctlab.org/api/1.2/patches/119333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sPmfwnyQq4C2AQHgMbm6uxggVFGFK63_Q=yyXC+KCwTOA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-12T20:59:30","name":"RISC-V: Folding memory for FP + constant case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sPmfwnyQq4C2AQHgMbm6uxggVFGFK63_Q=yyXC+KCwTOA@mail.gmail.com/mbox/"},{"id":119346,"url":"https://patchwork.plctlab.org/api/1.2/patches/119346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-1-aldyh@redhat.com/","msgid":"<20230712211528.65888-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T21:15:27","name":"[COMMITTED,range-op] Take known set bits into account in popcount [PR107053]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-1-aldyh@redhat.com/mbox/"},{"id":119347,"url":"https://patchwork.plctlab.org/api/1.2/patches/119347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-2-aldyh@redhat.com/","msgid":"<20230712211528.65888-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-12T21:15:29","name":"[COMMITTED,range-op] Take known mask into account for bitwise ands [PR107043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230712211528.65888-2-aldyh@redhat.com/mbox/"},{"id":119414,"url":"https://patchwork.plctlab.org/api/1.2/patches/119414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK83jHIDeUA9U1LU@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-12T23:30:20","name":"Loop-ch improvements, part 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZK83jHIDeUA9U1LU@kam.mff.cuni.cz/mbox/"},{"id":119457,"url":"https://patchwork.plctlab.org/api/1.2/patches/119457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-1-kmatsui@gcc.gnu.org/","msgid":"<20230713011127.98367-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:11:25","name":"[v3,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119458,"url":"https://patchwork.plctlab.org/api/1.2/patches/119458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-2-kmatsui@gcc.gnu.org/","msgid":"<20230713011127.98367-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:11:26","name":"[v3,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713011127.98367-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119466,"url":"https://patchwork.plctlab.org/api/1.2/patches/119466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-1-kmatsui@gcc.gnu.org/","msgid":"<20230713014351.6442-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:43:50","name":"[v2,1/2] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119467,"url":"https://patchwork.plctlab.org/api/1.2/patches/119467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-2-kmatsui@gcc.gnu.org/","msgid":"<20230713014351.6442-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T01:43:51","name":"[v2,2/2] libstdc++: Use new built-in trait __is_signed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713014351.6442-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119483,"url":"https://patchwork.plctlab.org/api/1.2/patches/119483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-2-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:35","name":"[v10,1/5] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119482,"url":"https://patchwork.plctlab.org/api/1.2/patches/119482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-3-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:36","name":"[v10,2/5] libstdc++: Use new built-in trait __is_reference for std::is_reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-3-kmatsui@gcc.gnu.org/mbox/"},{"id":119484,"url":"https://patchwork.plctlab.org/api/1.2/patches/119484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-4-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:37","name":"[v10,3/5] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-4-kmatsui@gcc.gnu.org/mbox/"},{"id":119485,"url":"https://patchwork.plctlab.org/api/1.2/patches/119485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-5-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:38","name":"[v10,4/5] libstdc++: Use new built-in trait __is_function for std::is_function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-5-kmatsui@gcc.gnu.org/mbox/"},{"id":119486,"url":"https://patchwork.plctlab.org/api/1.2/patches/119486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-6-kmatsui@gcc.gnu.org/","msgid":"<20230713023731.15571-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T02:33:39","name":"[v10,5/5] libstdc++: Make std::is_object dispatch to new built-in traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713023731.15571-6-kmatsui@gcc.gnu.org/mbox/"},{"id":119490,"url":"https://patchwork.plctlab.org/api/1.2/patches/119490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-1-kmatsui@gcc.gnu.org/","msgid":"<20230713031601.17787-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:16:00","name":"[v4,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119492,"url":"https://patchwork.plctlab.org/api/1.2/patches/119492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-2-kmatsui@gcc.gnu.org/","msgid":"<20230713031601.17787-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:16:01","name":"[v4,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031601.17787-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119494,"url":"https://patchwork.plctlab.org/api/1.2/patches/119494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-1-kmatsui@gcc.gnu.org/","msgid":"<20230713031901.18162-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:19:00","name":"[v5,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-1-kmatsui@gcc.gnu.org/mbox/"},{"id":119497,"url":"https://patchwork.plctlab.org/api/1.2/patches/119497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-2-kmatsui@gcc.gnu.org/","msgid":"<20230713031901.18162-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T03:19:01","name":"[v5,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713031901.18162-2-kmatsui@gcc.gnu.org/mbox/"},{"id":119540,"url":"https://patchwork.plctlab.org/api/1.2/patches/119540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713050235.2864130-1-pan2.li@intel.com/","msgid":"<20230713050235.2864130-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-13T05:02:35","name":"[v3] RISC-V: Refactor riscv mode after for VXRM and FRM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713050235.2864130-1-pan2.li@intel.com/mbox/"},{"id":119541,"url":"https://patchwork.plctlab.org/api/1.2/patches/119541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051001.2869210-1-pan2.li@intel.com/","msgid":"<20230713051001.2869210-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-13T05:10:01","name":"[v2] RISC-V: Add more tests for RVV floating-point FRM.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051001.2869210-1-pan2.li@intel.com/mbox/"},{"id":119543,"url":"https://patchwork.plctlab.org/api/1.2/patches/119543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051716.3099259-1-juzhe.zhong@rivai.ai/","msgid":"<20230713051716.3099259-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T05:17:16","name":"SSA MATH: Support COND_LEN_FMA for floating-point math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713051716.3099259-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119551,"url":"https://patchwork.plctlab.org/api/1.2/patches/119551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-1-monk.chiang@sifive.com/","msgid":"<20230713053856.101950-1-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-07-13T05:38:55","name":"[1/2] RISC-V: Recognized zihintntl extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-1-monk.chiang@sifive.com/mbox/"},{"id":119552,"url":"https://patchwork.plctlab.org/api/1.2/patches/119552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-2-monk.chiang@sifive.com/","msgid":"<20230713053856.101950-2-monk.chiang@sifive.com>","list_archive_url":null,"date":"2023-07-13T05:38:56","name":"[2/2] RISC-V: Implement locality for __builtin_prefetch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713053856.101950-2-monk.chiang@sifive.com/mbox/"},{"id":119559,"url":"https://patchwork.plctlab.org/api/1.2/patches/119559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-2-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:32","name":"[1/4] Support Intel AVX-VNNI-INT16","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-2-haochen.jiang@intel.com/mbox/"},{"id":119557,"url":"https://patchwork.plctlab.org/api/1.2/patches/119557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-3-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:33","name":"[2/4] Support Intel SM3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-3-haochen.jiang@intel.com/mbox/"},{"id":119558,"url":"https://patchwork.plctlab.org/api/1.2/patches/119558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-4-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:34","name":"[3/4] Support Intel SHA512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-4-haochen.jiang@intel.com/mbox/"},{"id":119556,"url":"https://patchwork.plctlab.org/api/1.2/patches/119556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-5-haochen.jiang@intel.com/","msgid":"<20230713060335.203711-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:03:35","name":"[4/4] Support Intel SM4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713060335.203711-5-haochen.jiang@intel.com/mbox/"},{"id":119560,"url":"https://patchwork.plctlab.org/api/1.2/patches/119560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713061208.916308-1-yanzhang.wang@intel.com/","msgid":"<20230713061208.916308-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-13T06:12:08","name":"RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713061208.916308-1-yanzhang.wang@intel.com/mbox/"},{"id":119561,"url":"https://patchwork.plctlab.org/api/1.2/patches/119561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713063142.66310-1-chenyixuan@iscas.ac.cn/","msgid":"<20230713063142.66310-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-07-13T06:31:42","name":"Add VXRM enum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713063142.66310-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":119629,"url":"https://patchwork.plctlab.org/api/1.2/patches/119629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713083209.49847-1-lehua.ding@rivai.ai/","msgid":"<20230713083209.49847-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-13T08:32:09","name":"[V2] RISC-V: Throw compilation error for unknown sub-extension or supervisor extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713083209.49847-1-lehua.ding@rivai.ai/mbox/"},{"id":119669,"url":"https://patchwork.plctlab.org/api/1.2/patches/119669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-2-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:23","name":"[01/14] fortran: Outline final procedure pointer evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-2-mikael@gcc.gnu.org/mbox/"},{"id":119671,"url":"https://patchwork.plctlab.org/api/1.2/patches/119671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-3-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:24","name":"[02/14] fortran: Outline element size evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-3-mikael@gcc.gnu.org/mbox/"},{"id":119672,"url":"https://patchwork.plctlab.org/api/1.2/patches/119672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-4-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:25","name":"[03/14] fortran: Outline data reference descriptor evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-4-mikael@gcc.gnu.org/mbox/"},{"id":119673,"url":"https://patchwork.plctlab.org/api/1.2/patches/119673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-5-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-5-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:26","name":"[04/14] fortran: Inline gfc_build_final_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-5-mikael@gcc.gnu.org/mbox/"},{"id":119679,"url":"https://patchwork.plctlab.org/api/1.2/patches/119679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-6-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-6-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:27","name":"[05/14] fortran: Add missing cleanup blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-6-mikael@gcc.gnu.org/mbox/"},{"id":119675,"url":"https://patchwork.plctlab.org/api/1.2/patches/119675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-7-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-7-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:28","name":"[06/14] fortran: Reuse final procedure pointer expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-7-mikael@gcc.gnu.org/mbox/"},{"id":119670,"url":"https://patchwork.plctlab.org/api/1.2/patches/119670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-8-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-8-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:29","name":"[07/14] fortran: Push element size expression generation close to its usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-8-mikael@gcc.gnu.org/mbox/"},{"id":119684,"url":"https://patchwork.plctlab.org/api/1.2/patches/119684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-9-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-9-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:30","name":"[08/14] fortran: Push final procedure expr gen close to its one usage.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-9-mikael@gcc.gnu.org/mbox/"},{"id":119690,"url":"https://patchwork.plctlab.org/api/1.2/patches/119690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-10-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-10-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:31","name":"[09/14] fortran: Inline variable definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-10-mikael@gcc.gnu.org/mbox/"},{"id":119685,"url":"https://patchwork.plctlab.org/api/1.2/patches/119685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-11-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-11-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:32","name":"[10/14] fortran: Remove redundant argument in get_var_descr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-11-mikael@gcc.gnu.org/mbox/"},{"id":119674,"url":"https://patchwork.plctlab.org/api/1.2/patches/119674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-12-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-12-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:33","name":"[11/14] fortran: Outline virtual table pointer evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-12-mikael@gcc.gnu.org/mbox/"},{"id":119682,"url":"https://patchwork.plctlab.org/api/1.2/patches/119682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-13-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-13-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:34","name":"[12/14] fortran: Factor scalar descriptor generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-13-mikael@gcc.gnu.org/mbox/"},{"id":119694,"url":"https://patchwork.plctlab.org/api/1.2/patches/119694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-14-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-14-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:35","name":"[13/14] fortran: Use pre-evaluated class container if available [PR110618]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-14-mikael@gcc.gnu.org/mbox/"},{"id":119695,"url":"https://patchwork.plctlab.org/api/1.2/patches/119695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-15-mikael@gcc.gnu.org/","msgid":"<20230713085236.330222-15-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T08:52:36","name":"[14/14] fortran: Pass pre-calculated class container argument [pr110618]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085236.330222-15-mikael@gcc.gnu.org/mbox/"},{"id":119692,"url":"https://patchwork.plctlab.org/api/1.2/patches/119692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085434.3381643-1-juzhe.zhong@rivai.ai/","msgid":"<20230713085434.3381643-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T08:54:34","name":"[V2] SSA MATH: Support COND_LEN_FMA for floating-point math optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713085434.3381643-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119699,"url":"https://patchwork.plctlab.org/api/1.2/patches/119699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf9srxhj.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-07-13T09:07:04","name":"m2, build: Use LDLFAGS for mklink","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf9srxhj.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":119734,"url":"https://patchwork.plctlab.org/api/1.2/patches/119734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713095402.E26EA385770D@sourceware.org/","msgid":"<20230713095402.E26EA385770D@sourceware.org>","list_archive_url":null,"date":"2023-07-13T09:53:14","name":"[RFC] tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713095402.E26EA385770D@sourceware.org/mbox/"},{"id":119755,"url":"https://patchwork.plctlab.org/api/1.2/patches/119755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-1-christophe.lyon@linaro.org/","msgid":"<20230713102140.1161573-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:21:39","name":"[1/2,testsuite,arm] : Make nomve_fp_1.c require arm_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-1-christophe.lyon@linaro.org/mbox/"},{"id":119756,"url":"https://patchwork.plctlab.org/api/1.2/patches/119756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-2-christophe.lyon@linaro.org/","msgid":"<20230713102140.1161573-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:21:40","name":"[2/2,testsuite,arm] : Make mve_fp_fpu[12].c accept single or double precision FPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102140.1161573-2-christophe.lyon@linaro.org/mbox/"},{"id":119758,"url":"https://patchwork.plctlab.org/api/1.2/patches/119758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-1-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:19","name":"[1/6] arm: [MVE intrinsics] Factorize vcaddq vhcaddq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-1-christophe.lyon@linaro.org/mbox/"},{"id":119764,"url":"https://patchwork.plctlab.org/api/1.2/patches/119764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-2-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:20","name":"[2/6] arm: [MVE intrinsics] rework vcaddq vhcaddq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-2-christophe.lyon@linaro.org/mbox/"},{"id":119759,"url":"https://patchwork.plctlab.org/api/1.2/patches/119759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-3-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:21","name":"[3/6] arm: [MVE intrinsics factorize vcmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-3-christophe.lyon@linaro.org/mbox/"},{"id":119761,"url":"https://patchwork.plctlab.org/api/1.2/patches/119761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-4-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:22","name":"[4/6] arm: [MVE intrinsics] rework vcmulq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-4-christophe.lyon@linaro.org/mbox/"},{"id":119760,"url":"https://patchwork.plctlab.org/api/1.2/patches/119760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-5-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:23","name":"[5/6] arm: [MVE intrinsics] factorize vcmlaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-5-christophe.lyon@linaro.org/mbox/"},{"id":119757,"url":"https://patchwork.plctlab.org/api/1.2/patches/119757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-6-christophe.lyon@linaro.org/","msgid":"<20230713102224.1161596-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-07-13T10:22:24","name":"[6/6] arm: [MVE intrinsics] rework vcmlaq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713102224.1161596-6-christophe.lyon@linaro.org/mbox/"},{"id":119767,"url":"https://patchwork.plctlab.org/api/1.2/patches/119767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7abbe5a-2b77-00e6-a2ba-b390891d2a99@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T10:30:25","name":"vect: Handle demoting FLOAT and promoting FIX_TRUNC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7abbe5a-2b77-00e6-a2ba-b390891d2a99@gmail.com/mbox/"},{"id":119771,"url":"https://patchwork.plctlab.org/api/1.2/patches/119771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa222b94-ad9e-8c44-f99b-fbd8b8dc9d82@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T10:54:00","name":"[OpenACC,2.7,v2] Implement host_data must have use_device clause requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa222b94-ad9e-8c44-f99b-fbd8b8dc9d82@siemens.com/mbox/"},{"id":119786,"url":"https://patchwork.plctlab.org/api/1.2/patches/119786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713113247.249532-1-juzhe.zhong@rivai.ai/","msgid":"<20230713113247.249532-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T11:32:47","name":"RISC-V: Enable COND_LEN_FMA auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713113247.249532-1-juzhe.zhong@rivai.ai/mbox/"},{"id":119879,"url":"https://patchwork.plctlab.org/api/1.2/patches/119879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713132017.3289546-1-ppalka@redhat.com/","msgid":"<20230713132017.3289546-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-13T13:20:17","name":"c++: mangling template-id of unknown template [PR110524]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713132017.3289546-1-ppalka@redhat.com/mbox/"},{"id":119917,"url":"https://patchwork.plctlab.org/api/1.2/patches/119917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-2-manolis.tsamis@vrull.eu/","msgid":"<20230713140904.3274306-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:09:03","name":"[v2,1/2] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-2-manolis.tsamis@vrull.eu/mbox/"},{"id":119918,"url":"https://patchwork.plctlab.org/api/1.2/patches/119918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-3-manolis.tsamis@vrull.eu/","msgid":"<20230713140904.3274306-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:09:04","name":"[v2,2/2] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713140904.3274306-3-manolis.tsamis@vrull.eu/mbox/"},{"id":119923,"url":"https://patchwork.plctlab.org/api/1.2/patches/119923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713141336.3950751-1-manolis.tsamis@vrull.eu/","msgid":"<20230713141336.3950751-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-07-13T14:13:36","name":"[v3] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713141336.3950751-1-manolis.tsamis@vrull.eu/mbox/"},{"id":119948,"url":"https://patchwork.plctlab.org/api/1.2/patches/119948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ade5eae2-b01d-1b8c-7c73-24e8192202fe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T14:52:44","name":"[pushed,RA,PR109520] : Catch error when there are no enough registers for asm insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ade5eae2-b01d-1b8c-7c73-24e8192202fe@redhat.com/mbox/"},{"id":120018,"url":"https://patchwork.plctlab.org/api/1.2/patches/120018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bhA8NxhyeZrngN6n9hM+JHRpZK+dF+Wfet1pEM+4KzUQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T16:39:41","name":"[committed] alpha: Fix computation mode in alpha_emit_set_long_cost [PR106966]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bhA8NxhyeZrngN6n9hM+JHRpZK+dF+Wfet1pEM+4KzUQ@mail.gmail.com/mbox/"},{"id":120020,"url":"https://patchwork.plctlab.org/api/1.2/patches/120020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com/","msgid":"<03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-13T16:45:13","name":"[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03e401d9b5a9$661e42e0$325ac8a0$@nextmovesoftware.com/mbox/"},{"id":120025,"url":"https://patchwork.plctlab.org/api/1.2/patches/120025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713164756.3558785-2-mikpelinux@gmail.com/","msgid":"<20230713164756.3558785-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-07-13T16:47:57","name":"fix pdp11_expand_epilogue (PR target/107841)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713164756.3558785-2-mikpelinux@gmail.com/mbox/"},{"id":120031,"url":"https://patchwork.plctlab.org/api/1.2/patches/120031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713165948.1993395-1-jwakely@redhat.com/","msgid":"<20230713165948.1993395-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-13T16:59:30","name":"[committed] libstdc++: std::stoi etc. do not need C99 support [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713165948.1993395-1-jwakely@redhat.com/mbox/"},{"id":120055,"url":"https://patchwork.plctlab.org/api/1.2/patches/120055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com/","msgid":"<042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-13T17:10:47","name":"[x86] PR target/110588: Add *bt_setncqi_2 to generate btl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/042301d9b5ac$f84e3e60$e8eabb20$@nextmovesoftware.com/mbox/"},{"id":120084,"url":"https://patchwork.plctlab.org/api/1.2/patches/120084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713184923.3699777-1-ppalka@redhat.com/","msgid":"<20230713184923.3699777-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-13T18:49:23","name":"c++: copy elision of object arg in static memfn call [PR110441]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713184923.3699777-1-ppalka@redhat.com/mbox/"},{"id":120086,"url":"https://patchwork.plctlab.org/api/1.2/patches/120086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLBIYYzqbMkt+HaZ@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-13T18:54:25","name":"[v2] c++: wrong error with static constexpr var in tmpl [PR109876]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLBIYYzqbMkt+HaZ@redhat.com/mbox/"},{"id":120093,"url":"https://patchwork.plctlab.org/api/1.2/patches/120093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713191744.46960-1-iain@sandoe.co.uk/","msgid":"<20230713191744.46960-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-13T19:17:44","name":"[pushed] Darwin: Use -platform_version when available [PR110624].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713191744.46960-1-iain@sandoe.co.uk/mbox/"},{"id":120104,"url":"https://patchwork.plctlab.org/api/1.2/patches/120104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-1-kmatsui@gcc.gnu.org/","msgid":"<20230713204823.22303-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T20:48:22","name":"[v6,1/2] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120105,"url":"https://patchwork.plctlab.org/api/1.2/patches/120105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-2-kmatsui@gcc.gnu.org/","msgid":"<20230713204823.22303-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-13T20:48:23","name":"[v6,2/2] libstdc++: Use new built-in trait __is_pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713204823.22303-2-kmatsui@gcc.gnu.org/mbox/"},{"id":120119,"url":"https://patchwork.plctlab.org/api/1.2/patches/120119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713221709.3893367-1-juzhe.zhong@rivai.ai/","msgid":"<20230713221709.3893367-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-13T22:17:09","name":"[V2] RISC-V: Enable COND_LEN_FMA auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230713221709.3893367-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120186,"url":"https://patchwork.plctlab.org/api/1.2/patches/120186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714020205.16214-1-lidie@eswincomputing.com/","msgid":"<20230714020205.16214-1-lidie@eswincomputing.com>","list_archive_url":null,"date":"2023-07-14T02:02:05","name":"RISC-V: Remove the redundant expressions in the and3.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714020205.16214-1-lidie@eswincomputing.com/mbox/"},{"id":120187,"url":"https://patchwork.plctlab.org/api/1.2/patches/120187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de/","msgid":"<467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de>","list_archive_url":null,"date":"2023-07-14T02:08:41","name":"[SH,committed] Fix PR 101469","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/467fc2d9a524d2bbc0f9ae6d9317c17b23924b0c.camel@t-online.de/mbox/"},{"id":120197,"url":"https://patchwork.plctlab.org/api/1.2/patches/120197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025024.1408869-1-pan2.li@intel.com/","msgid":"<20230714025024.1408869-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-14T02:50:24","name":"[v1] RISC-V: Support basic floating-point dynamic rounding mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025024.1408869-1-pan2.li@intel.com/mbox/"},{"id":120200,"url":"https://patchwork.plctlab.org/api/1.2/patches/120200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025246.1757367-1-zewei.mo@intel.com/","msgid":"<20230714025246.1757367-1-zewei.mo@intel.com>","list_archive_url":null,"date":"2023-07-14T02:52:46","name":"Initial Lunar Lake, Arrow Lake and Arrow Lake S Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714025246.1757367-1-zewei.mo@intel.com/mbox/"},{"id":120249,"url":"https://patchwork.plctlab.org/api/1.2/patches/120249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714054908.1071907-1-naveenh@marvell.com/","msgid":"<20230714054908.1071907-1-naveenh@marvell.com>","list_archive_url":null,"date":"2023-07-14T05:49:08","name":"Implement Bit-field lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714054908.1071907-1-naveenh@marvell.com/mbox/"},{"id":120258,"url":"https://patchwork.plctlab.org/api/1.2/patches/120258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YrNr8GovPOMAhP29hw0edQeF7eBSKFif3NRu4RYF69+A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T06:22:51","name":"cprop: Do not set REG_EQUAL note when simplifying paradoxical subreg [PR110206]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YrNr8GovPOMAhP29hw0edQeF7eBSKFif3NRu4RYF69+A@mail.gmail.com/mbox/"},{"id":120259,"url":"https://patchwork.plctlab.org/api/1.2/patches/120259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714062413.2277485-1-haochen.jiang@intel.com/","msgid":"<20230714062413.2277485-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-14T06:24:13","name":"i386: Auto vectorize usdot_prod, udot_prod with AVXVNNIINT16 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714062413.2277485-1-haochen.jiang@intel.com/mbox/"},{"id":120329,"url":"https://patchwork.plctlab.org/api/1.2/patches/120329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714083530.F2E79138F8@imap2.suse-dmz.suse.de/","msgid":"<20230714083530.F2E79138F8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-14T08:35:30","name":"Provide extra checking for phi argument access from edge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714083530.F2E79138F8@imap2.suse-dmz.suse.de/mbox/"},{"id":120375,"url":"https://patchwork.plctlab.org/api/1.2/patches/120375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com/","msgid":"<620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com>","list_archive_url":null,"date":"2023-07-14T09:40:11","name":"x86: slightly enhance \"vec_dupv2df\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/620c187a-e6a6-0bd9-fe17-ecee0d00d6ea@suse.com/mbox/"},{"id":120376,"url":"https://patchwork.plctlab.org/api/1.2/patches/120376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7767255-af05-c9ab-aa54-107f02da8f32@suse.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T09:42:11","name":"x86: avoid maybe_gen_...()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7767255-af05-c9ab-aa54-107f02da8f32@suse.com/mbox/"},{"id":120377,"url":"https://patchwork.plctlab.org/api/1.2/patches/120377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com/","msgid":"<28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com>","list_archive_url":null,"date":"2023-07-14T09:44:16","name":"x86: replace \"extendhfdf2\" expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28de2fc1-79e6-6fef-400c-2991b25d13e1@suse.com/mbox/"},{"id":120425,"url":"https://patchwork.plctlab.org/api/1.2/patches/120425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c17b2b7d-f5bc-df4e-e4a2-3fec01c08e2c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T11:20:42","name":"[committed] libgomp.texi: Extend memory allocation documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c17b2b7d-f5bc-df4e-e4a2-3fec01c08e2c@codesourcery.com/mbox/"},{"id":120445,"url":"https://patchwork.plctlab.org/api/1.2/patches/120445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8emptx6.fsf@oracle.com/","msgid":"<87v8emptx6.fsf@oracle.com>","list_archive_url":null,"date":"2023-07-14T12:19:17","name":"[COMMITTED] bpf: enable instruction scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8emptx6.fsf@oracle.com/mbox/"},{"id":120446,"url":"https://patchwork.plctlab.org/api/1.2/patches/120446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLE+G4KvU7loJtji@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-14T12:22:51","name":"Loop-ch improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLE+G4KvU7loJtji@kam.mff.cuni.cz/mbox/"},{"id":120455,"url":"https://patchwork.plctlab.org/api/1.2/patches/120455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714123038.1017670-1-juzhe.zhong@rivai.ai/","msgid":"<20230714123038.1017670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-14T12:30:38","name":"RISC-V: Support non-SLP unordered reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714123038.1017670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120475,"url":"https://patchwork.plctlab.org/api/1.2/patches/120475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714132050.2728477-1-pan2.li@intel.com/","msgid":"<20230714132050.2728477-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-14T13:20:50","name":"[v1] RISC-V: Fix RVV frm run test failure on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714132050.2728477-1-pan2.li@intel.com/mbox/"},{"id":120507,"url":"https://patchwork.plctlab.org/api/1.2/patches/120507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLFa4p55G/H78vE2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-14T14:25:38","name":"Turn TODO_rebuild_frequencies to a pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLFa4p55G/H78vE2@kam.mff.cuni.cz/mbox/"},{"id":120526,"url":"https://patchwork.plctlab.org/api/1.2/patches/120526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com/","msgid":"<7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com>","list_archive_url":null,"date":"2023-07-14T15:11:25","name":"vectorizer: Avoid an OOB access from vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f2d155c-20e4-4bae-89d8-849882526a07@AZ-NEU-EX03.Arm.com/mbox/"},{"id":120528,"url":"https://patchwork.plctlab.org/api/1.2/patches/120528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com/","msgid":"<632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com>","list_archive_url":null,"date":"2023-07-14T15:16:41","name":"[v2] vect: Handle demoting FLOAT and promoting FIX_TRUNC.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/632f5e92-f1b7-816f-3f16-9ba09e53c5ab@gmail.com/mbox/"},{"id":120539,"url":"https://patchwork.plctlab.org/api/1.2/patches/120539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jm6sd0d.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-14T15:56:18","name":"[WIP,RFC] Add support for keyword-based attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jm6sd0d.fsf@arm.com/mbox/"},{"id":120555,"url":"https://patchwork.plctlab.org/api/1.2/patches/120555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-1-julian@codesourcery.com/","msgid":"<20230714163340.3464603-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-14T16:33:39","name":"[og13] OpenMP: Dimension ordering for array-shaping operator for C and C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-1-julian@codesourcery.com/mbox/"},{"id":120554,"url":"https://patchwork.plctlab.org/api/1.2/patches/120554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-2-julian@codesourcery.com/","msgid":"<20230714163340.3464603-2-julian@codesourcery.com>","list_archive_url":null,"date":"2023-07-14T16:33:40","name":"[og13] OpenMP: Enable c-c++-common/gomp/declare-mapper-3.c for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714163340.3464603-2-julian@codesourcery.com/mbox/"},{"id":120681,"url":"https://patchwork.plctlab.org/api/1.2/patches/120681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com/","msgid":"<001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-14T18:56:22","name":"Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001201d9b684$e319fdd0$a94df970$@nextmovesoftware.com/mbox/"},{"id":120696,"url":"https://patchwork.plctlab.org/api/1.2/patches/120696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714205542.1131700-1-apinski@marvell.com/","msgid":"<20230714205542.1131700-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-14T20:55:42","name":"Fix PR 110666: `(a != 2) == a` produces wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714205542.1131700-1-apinski@marvell.com/mbox/"},{"id":120700,"url":"https://patchwork.plctlab.org/api/1.2/patches/120700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714223744.264094-1-jason@redhat.com/","msgid":"<20230714223744.264094-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-14T22:37:44","name":"[pushed] c++: c++26 regression fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714223744.264094-1-jason@redhat.com/mbox/"},{"id":120704,"url":"https://patchwork.plctlab.org/api/1.2/patches/120704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714234500.75826-1-juzhe.zhong@rivai.ai/","msgid":"<20230714234500.75826-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-14T23:45:00","name":"VECT: Add mask_len_fold_left_plus for in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230714234500.75826-1-juzhe.zhong@rivai.ai/mbox/"},{"id":120717,"url":"https://patchwork.plctlab.org/api/1.2/patches/120717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1ji6ky5.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-07-15T01:08:02","name":"[v3] Introduce attribute reverse_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1ji6ky5.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":120728,"url":"https://patchwork.plctlab.org/api/1.2/patches/120728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715030156.26231-1-kmatsui@gcc.gnu.org/","msgid":"<20230715030156.26231-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T03:01:56","name":"libstdc++: Use __bool_constant entirely","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715030156.26231-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120734,"url":"https://patchwork.plctlab.org/api/1.2/patches/120734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-1-apinski@marvell.com/","msgid":"<20230715031957.1147225-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T03:19:56","name":"[1/2] Add flow_sensitive_info_storage and use it in gimple-fold.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-1-apinski@marvell.com/mbox/"},{"id":120735,"url":"https://patchwork.plctlab.org/api/1.2/patches/120735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-2-apinski@marvell.com/","msgid":"<20230715031957.1147225-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T03:19:57","name":"[2/2] Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info during match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715031957.1147225-2-apinski@marvell.com/mbox/"},{"id":120750,"url":"https://patchwork.plctlab.org/api/1.2/patches/120750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-1-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:17","name":"[v2,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-1-kmatsui@gcc.gnu.org/mbox/"},{"id":120751,"url":"https://patchwork.plctlab.org/api/1.2/patches/120751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-2-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:18","name":"[v2,2/3] libstdc++: Optimize is_arithmetic performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-2-kmatsui@gcc.gnu.org/mbox/"},{"id":120752,"url":"https://patchwork.plctlab.org/api/1.2/patches/120752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-3-kmatsui@gcc.gnu.org/","msgid":"<20230715045519.50684-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-15T04:55:19","name":"[v2,3/3] libstdc++: Optimize is_fundamental performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715045519.50684-3-kmatsui@gcc.gnu.org/mbox/"},{"id":120815,"url":"https://patchwork.plctlab.org/api/1.2/patches/120815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLLZwxcjxOxbEPVL@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-15T17:39:15","name":"[committed] hppa: Modify TLS patterns to provide both 32 and 64-bit support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLLZwxcjxOxbEPVL@mx3210.localdomain/mbox/"},{"id":120852,"url":"https://patchwork.plctlab.org/api/1.2/patches/120852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715213610.1191532-1-apinski@marvell.com/","msgid":"<20230715213610.1191532-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-15T21:36:10","name":"Update my contrib entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230715213610.1191532-1-apinski@marvell.com/mbox/"},{"id":120869,"url":"https://patchwork.plctlab.org/api/1.2/patches/120869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230716021622.2831938-1-pan2.li@intel.com/","msgid":"<20230716021622.2831938-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-16T02:16:22","name":"[v1|GCC-13] RISC-V: Bugfix for riscv-vsetvl pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230716021622.2831938-1-pan2.li@intel.com/mbox/"},{"id":120927,"url":"https://patchwork.plctlab.org/api/1.2/patches/120927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-442fa3d0-10b8-415b-a161-a5821d474fdb-1689539459265@3c-app-gmx-bap40/","msgid":"","list_archive_url":null,"date":"2023-07-16T20:30:59","name":"Fortran: intrinsics and deferred-length character arguments [PR95947,PR110658]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-442fa3d0-10b8-415b-a161-a5821d474fdb-1689539459265@3c-app-gmx-bap40/mbox/"},{"id":120985,"url":"https://patchwork.plctlab.org/api/1.2/patches/120985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com/","msgid":"<8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com>","list_archive_url":null,"date":"2023-07-17T02:22:32","name":"vect: Initialize new_temp to avoid false positive warning [PR110652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8baf564b-e742-0b95-c052-53b1082db372@linux.ibm.com/mbox/"},{"id":120997,"url":"https://patchwork.plctlab.org/api/1.2/patches/120997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717024247.1263484-1-apinski@marvell.com/","msgid":"<20230717024247.1263484-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-17T02:42:47","name":"PR 95923: More (boolean) bitop simplifications in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717024247.1263484-1-apinski@marvell.com/mbox/"},{"id":121017,"url":"https://patchwork.plctlab.org/api/1.2/patches/121017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717033334.2376251-1-haochen.jiang@intel.com/","msgid":"<20230717033334.2376251-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-17T03:33:34","name":"[gcc-wwwdocs] gcc-13/14: Mention Intel new ISA and march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717033334.2376251-1-haochen.jiang@intel.com/mbox/"},{"id":121022,"url":"https://patchwork.plctlab.org/api/1.2/patches/121022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc59eb5-eaff-cb23-328e-2bfff6fcccc6@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T03:40:57","name":"[V2] rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbc59eb5-eaff-cb23-328e-2bfff6fcccc6@linux.vnet.ibm.com/mbox/"},{"id":121045,"url":"https://patchwork.plctlab.org/api/1.2/patches/121045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717060423.31423-1-juzhe.zhong@rivai.ai/","msgid":"<20230717060423.31423-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T06:04:23","name":"RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717060423.31423-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121058,"url":"https://patchwork.plctlab.org/api/1.2/patches/121058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717062828.47511-1-juzhe.zhong@rivai.ai/","msgid":"<20230717062828.47511-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T06:28:28","name":"[V2] RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717062828.47511-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121080,"url":"https://patchwork.plctlab.org/api/1.2/patches/121080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-1-aldyh@redhat.com/","msgid":"<20230717071603.242424-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:16:02","name":"[COMMITTED] Normalize irange_bitmask before union/intersect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-1-aldyh@redhat.com/mbox/"},{"id":121081,"url":"https://patchwork.plctlab.org/api/1.2/patches/121081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-2-aldyh@redhat.com/","msgid":"<20230717071603.242424-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:16:03","name":"[COMMITTED] Add global setter for value/mask pair for SSA names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717071603.242424-2-aldyh@redhat.com/mbox/"},{"id":121100,"url":"https://patchwork.plctlab.org/api/1.2/patches/121100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717074838.2724136-1-hongtao.liu@intel.com/","msgid":"<20230717074838.2724136-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-17T07:48:38","name":"Remove # from one_cmpl2 assemble output.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717074838.2724136-1-hongtao.liu@intel.com/mbox/"},{"id":121101,"url":"https://patchwork.plctlab.org/api/1.2/patches/121101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075645.243653-1-aldyh@redhat.com/","msgid":"<20230717075645.243653-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:56:45","name":"Export value/mask known bits from CCP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075645.243653-1-aldyh@redhat.com/mbox/"},{"id":121102,"url":"https://patchwork.plctlab.org/api/1.2/patches/121102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075834.244277-1-aldyh@redhat.com/","msgid":"<20230717075834.244277-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T07:58:35","name":"Export value/mask known bits from IPA.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717075834.244277-1-aldyh@redhat.com/mbox/"},{"id":121114,"url":"https://patchwork.plctlab.org/api/1.2/patches/121114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmh6q3dkh6.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2023-07-17T08:13:09","name":"Use substituted GDCFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmh6q3dkh6.fsf@suse.de/mbox/"},{"id":121115,"url":"https://patchwork.plctlab.org/api/1.2/patches/121115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717082039.024683858D39@sourceware.org/","msgid":"<20230717082039.024683858D39@sourceware.org>","list_archive_url":null,"date":"2023-07-17T08:19:40","name":"tree-optimization/110669 - bogus matching of loop bitop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717082039.024683858D39@sourceware.org/mbox/"},{"id":121116,"url":"https://patchwork.plctlab.org/api/1.2/patches/121116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717081946.187709-1-juzhe.zhong@rivai.ai/","msgid":"<20230717081946.187709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T08:19:46","name":"[V2] RISC-V: Support non-SLP unordered reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717081946.187709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121135,"url":"https://patchwork.plctlab.org/api/1.2/patches/121135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717085915.2570743-1-christoph.muellner@vrull.eu/","msgid":"<20230717085915.2570743-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-07-17T08:59:15","name":"riscv: Fix warning in riscv_regno_ok_for_index_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717085915.2570743-1-christoph.muellner@vrull.eu/mbox/"},{"id":121137,"url":"https://patchwork.plctlab.org/api/1.2/patches/121137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-2-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-2-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:42","name":"[1/9] Native complex operations: Conditional lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-2-snoiry@kalrayinc.com/mbox/"},{"id":121138,"url":"https://patchwork.plctlab.org/api/1.2/patches/121138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-3-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-3-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:43","name":"[2/9] Native complex operations: Move functions to hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-3-snoiry@kalrayinc.com/mbox/"},{"id":121139,"url":"https://patchwork.plctlab.org/api/1.2/patches/121139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-4-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-4-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:44","name":"[3/9] Native complex operations: Add gen_rtx_complex hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-4-snoiry@kalrayinc.com/mbox/"},{"id":121140,"url":"https://patchwork.plctlab.org/api/1.2/patches/121140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-5-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-5-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:45","name":"[4/9] Native complex operations: Allow native complex regs and ops in rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-5-snoiry@kalrayinc.com/mbox/"},{"id":121142,"url":"https://patchwork.plctlab.org/api/1.2/patches/121142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-6-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-6-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:46","name":"[5/9] Native complex operations: Add the conjugate op in optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-6-snoiry@kalrayinc.com/mbox/"},{"id":121143,"url":"https://patchwork.plctlab.org/api/1.2/patches/121143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-7-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-7-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:47","name":"[6/9] Native complex operations: Update how complex rotations are handled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-7-snoiry@kalrayinc.com/mbox/"},{"id":121144,"url":"https://patchwork.plctlab.org/api/1.2/patches/121144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-8-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-8-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:48","name":"[7/9] Native complex operations: Vectorization of native complex operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-8-snoiry@kalrayinc.com/mbox/"},{"id":121141,"url":"https://patchwork.plctlab.org/api/1.2/patches/121141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-9-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-9-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:49","name":"[8/9] Native complex operations: Add explicit vector of complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-9-snoiry@kalrayinc.com/mbox/"},{"id":121145,"url":"https://patchwork.plctlab.org/api/1.2/patches/121145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-10-snoiry@kalrayinc.com/","msgid":"<20230717090250.4645-10-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-07-17T09:02:50","name":"[9/9] Native complex operation: Experimental support in x86 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717090250.4645-10-snoiry@kalrayinc.com/mbox/"},{"id":121161,"url":"https://patchwork.plctlab.org/api/1.2/patches/121161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717095259.326307-1-lehua.ding@rivai.ai/","msgid":"<20230717095259.326307-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-17T09:52:59","name":"RISC-V: Ensure all implied extensions are included[PR110696]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717095259.326307-1-lehua.ding@rivai.ai/mbox/"},{"id":121188,"url":"https://patchwork.plctlab.org/api/1.2/patches/121188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZbRiErCZ1pnYK@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:35:25","name":"Fix optimize_mask_stores profile update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZbRiErCZ1pnYK@kam.mff.cuni.cz/mbox/"},{"id":121190,"url":"https://patchwork.plctlab.org/api/1.2/patches/121190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZijWxHsRaiHC5@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:35:54","name":"Fix profile update in scale_profile_for_vect_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZijWxHsRaiHC5@kam.mff.cuni.cz/mbox/"},{"id":121193,"url":"https://patchwork.plctlab.org/api/1.2/patches/121193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZqJ1lJpCFTWCi@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T10:36:24","name":"Avoid double profile udpate in try_peel_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLUZqJ1lJpCFTWCi@kam.mff.cuni.cz/mbox/"},{"id":121245,"url":"https://patchwork.plctlab.org/api/1.2/patches/121245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnk_N=tgPNBhUu91yt8YN0HcCoWgQQYpshHMqhU=6WgAQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T12:14:13","name":"[RFC,v2] Extend fold_vec_perm to handle VLA vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMnk_N=tgPNBhUu91yt8YN0HcCoWgQQYpshHMqhU=6WgAQ@mail.gmail.com/mbox/"},{"id":121252,"url":"https://patchwork.plctlab.org/api/1.2/patches/121252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zg3ulo91.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-17T12:24:26","name":"[committed] Restore bootstrap by removing unused variable in tree-ssa-loop-ivcanon.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6zg3ulo91.fsf@suse.cz/mbox/"},{"id":121270,"url":"https://patchwork.plctlab.org/api/1.2/patches/121270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717123929.260814-1-juzhe.zhong@rivai.ai/","msgid":"<20230717123929.260814-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T12:39:29","name":"RTL_SSA: Relax PHI_MODE in phi_setup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717123929.260814-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121294,"url":"https://patchwork.plctlab.org/api/1.2/patches/121294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717131411.330650-1-aldyh@redhat.com/","msgid":"<20230717131411.330650-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-17T13:14:11","name":"Read global value/mask in IPA.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717131411.330650-1-aldyh@redhat.com/mbox/"},{"id":121311,"url":"https://patchwork.plctlab.org/api/1.2/patches/121311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com/","msgid":"<7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com>","list_archive_url":null,"date":"2023-07-17T13:26:27","name":"[committed] OpenMP/Fortran: Parsing support for '\''uses_allocators'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e45d213-5687-43b0-061c-f88ef9b67806@codesourcery.com/mbox/"},{"id":121356,"url":"https://patchwork.plctlab.org/api/1.2/patches/121356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717142002.295213-1-juzhe.zhong@rivai.ai/","msgid":"<20230717142002.295213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T14:20:02","name":"[V3] RISC-V: Add TARGET_MIN_VLEN > 4096 check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717142002.295213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121380,"url":"https://patchwork.plctlab.org/api/1.2/patches/121380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717144209.316540-1-juzhe.zhong@rivai.ai/","msgid":"<20230717144209.316540-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-17T14:42:09","name":"[V2] RTL_SSA: Relax PHI_MODE in phi_setup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717144209.316540-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121391,"url":"https://patchwork.plctlab.org/api/1.2/patches/121391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717150957.23119-1-jchrist@linux.ibm.com/","msgid":"<20230717150957.23119-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-07-17T15:09:57","name":"s390: Optimize vec_cmpge followed by vec_sel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717150957.23119-1-jchrist@linux.ibm.com/mbox/"},{"id":121561,"url":"https://patchwork.plctlab.org/api/1.2/patches/121561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com/","msgid":"<949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-17T19:19:57","name":"[1/2] rs6000, add argument to function find_instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/949827540816a434c5bac00f0714948638c37975.camel@us.ibm.com/mbox/"},{"id":121562,"url":"https://patchwork.plctlab.org/api/1.2/patches/121562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com/","msgid":"<150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-17T19:20:21","name":"[2/2,ver,4] rs6000, fix vec_replace_unaligned built-in arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/150f94d606180c2f5a34d0ce5775cae554c5e36d.camel@us.ibm.com/mbox/"},{"id":121585,"url":"https://patchwork.plctlab.org/api/1.2/patches/121585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+mxPA1xc1aqf3iqz_1iYVXw-K7QZAjQduUn_3NyHGAQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-17T20:16:27","name":"[committed] combine: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+mxPA1xc1aqf3iqz_1iYVXw-K7QZAjQduUn_3NyHGAQ@mail.gmail.com/mbox/"},{"id":121609,"url":"https://patchwork.plctlab.org/api/1.2/patches/121609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211808.946183-1-jason@redhat.com/","msgid":"<20230717211808.946183-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T21:18:08","name":"[pushed] c++: only cache constexpr calls that are constant exprs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211808.946183-1-jason@redhat.com/mbox/"},{"id":121611,"url":"https://patchwork.plctlab.org/api/1.2/patches/121611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211905.946580-1-jason@redhat.com/","msgid":"<20230717211905.946580-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T21:19:05","name":"[RFA,(fold)] c++: constexpr bit_cast with empty field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717211905.946580-1-jason@redhat.com/mbox/"},{"id":121612,"url":"https://patchwork.plctlab.org/api/1.2/patches/121612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212235.2971735-1-arsen@aarsen.me/","msgid":"<20230717212235.2971735-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-07-17T21:22:28","name":"[pushed] extend.texi: index __auto_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212235.2971735-1-arsen@aarsen.me/mbox/"},{"id":121613,"url":"https://patchwork.plctlab.org/api/1.2/patches/121613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212836.23056-1-patrick@rivosinc.com/","msgid":"<20230717212836.23056-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-17T21:28:36","name":"[RFC,v2] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717212836.23056-1-patrick@rivosinc.com/mbox/"},{"id":121693,"url":"https://patchwork.plctlab.org/api/1.2/patches/121693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717235711.972199-1-jason@redhat.com/","msgid":"<20230717235711.972199-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-17T23:57:11","name":"[FYI] c++: check for trying to cache non-constant expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230717235711.972199-1-jason@redhat.com/mbox/"},{"id":121714,"url":"https://patchwork.plctlab.org/api/1.2/patches/121714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718010351.240789-1-juzhe.zhong@rivai.ai/","msgid":"<20230718010351.240789-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T01:03:51","name":"RISC-V: Enable SLP un-order reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718010351.240789-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121735,"url":"https://patchwork.plctlab.org/api/1.2/patches/121735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718024953.1343484-1-pan2.li@intel.com/","msgid":"<20230718024953.1343484-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-18T02:49:53","name":"[v2] RISC-V: Fix RVV frm run test failure on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718024953.1343484-1-pan2.li@intel.com/mbox/"},{"id":121755,"url":"https://patchwork.plctlab.org/api/1.2/patches/121755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCrSp3DKxH3cz5VrKnN73A3mRp0j8n8zwz2PVfJTsjar=Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T04:05:44","name":"Committed: Tighten regexps in gcc.target/riscv/_Float16-zhinx-1.c .","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCrSp3DKxH3cz5VrKnN73A3mRp0j8n8zwz2PVfJTsjar=Q@mail.gmail.com/mbox/"},{"id":121761,"url":"https://patchwork.plctlab.org/api/1.2/patches/121761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpuUTjoaPzJvr7fxxWZm1d=FZ=K7feigkXOYx6A1yh+Sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T04:47:40","name":"cpymem for RISCV with v extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpuUTjoaPzJvr7fxxWZm1d=FZ=K7feigkXOYx6A1yh+Sw@mail.gmail.com/mbox/"},{"id":121775,"url":"https://patchwork.plctlab.org/api/1.2/patches/121775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqakjgGSZb_BFeAn=NbqXvpzznXG9n4sy9KWzKUVHDBXw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T06:02:46","name":"RISCV test infrastructure for d / v / zfh extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqakjgGSZb_BFeAn=NbqXvpzznXG9n4sy9KWzKUVHDBXw@mail.gmail.com/mbox/"},{"id":121791,"url":"https://patchwork.plctlab.org/api/1.2/patches/121791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062739.312774-1-juzhe.zhong@rivai.ai/","msgid":"<20230718062739.312774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T06:27:39","name":"RISC-V: Dynamic adjust size of VLA vector according to TARGET_MIN_VLEN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062739.312774-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121793,"url":"https://patchwork.plctlab.org/api/1.2/patches/121793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-1-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:43","name":"[v3,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-1-kmatsui@gcc.gnu.org/mbox/"},{"id":121796,"url":"https://patchwork.plctlab.org/api/1.2/patches/121796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-2-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:44","name":"[v3,2/3] libstdc++: Optimize is_arithmetic performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-2-kmatsui@gcc.gnu.org/mbox/"},{"id":121797,"url":"https://patchwork.plctlab.org/api/1.2/patches/121797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-3-kmatsui@gcc.gnu.org/","msgid":"<20230718062745.29470-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T06:27:45","name":"[v3,3/3] libstdc++: Optimize is_fundamental performance by __is_arithmetic built-in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718062745.29470-3-kmatsui@gcc.gnu.org/mbox/"},{"id":121802,"url":"https://patchwork.plctlab.org/api/1.2/patches/121802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718065512.2728118-1-lehua.ding@rivai.ai/","msgid":"<20230718065512.2728118-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-18T06:55:11","name":"RISC-V: Remove testcase that cannot be compiled because VLEN limitation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718065512.2728118-1-lehua.ding@rivai.ai/mbox/"},{"id":121824,"url":"https://patchwork.plctlab.org/api/1.2/patches/121824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-1-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:24","name":"[v4,1/4] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-1-kmatsui@gcc.gnu.org/mbox/"},{"id":121829,"url":"https://patchwork.plctlab.org/api/1.2/patches/121829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-2-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:25","name":"[v4,2/4] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-2-kmatsui@gcc.gnu.org/mbox/"},{"id":121831,"url":"https://patchwork.plctlab.org/api/1.2/patches/121831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-3-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:26","name":"[v4,3/4] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-3-kmatsui@gcc.gnu.org/mbox/"},{"id":121832,"url":"https://patchwork.plctlab.org/api/1.2/patches/121832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-4-kmatsui@gcc.gnu.org/","msgid":"<20230718074027.32270-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T07:40:27","name":"[v4,4/4] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074027.32270-4-kmatsui@gcc.gnu.org/mbox/"},{"id":121830,"url":"https://patchwork.plctlab.org/api/1.2/patches/121830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074249.236825-1-lehua.ding@rivai.ai/","msgid":"<20230718074249.236825-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-18T07:42:49","name":"RISC-V: Fix testcase failed when default -mcmodel=medany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074249.236825-1-lehua.ding@rivai.ai/mbox/"},{"id":121849,"url":"https://patchwork.plctlab.org/api/1.2/patches/121849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074958.2806939-1-yanzhang.wang@intel.com/","msgid":"<20230718074958.2806939-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-18T07:49:58","name":"[v3] RISCV: Add -m(no)-omit-leaf-frame-pointer support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718074958.2806939-1-yanzhang.wang@intel.com/mbox/"},{"id":121836,"url":"https://patchwork.plctlab.org/api/1.2/patches/121836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab576007-4f7d-59a9-5f2e-c4902572c616@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T07:56:02","name":"PING^1 [PATCH v7] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab576007-4f7d-59a9-5f2e-c4902572c616@linux.ibm.com/mbox/"},{"id":121837,"url":"https://patchwork.plctlab.org/api/1.2/patches/121837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1217cb9-79df-61a9-7e1b-f949344bf4e4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T07:58:08","name":"[PING^2] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1217cb9-79df-61a9-7e1b-f949344bf4e4@linux.ibm.com/mbox/"},{"id":121845,"url":"https://patchwork.plctlab.org/api/1.2/patches/121845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com/","msgid":"<2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T08:01:27","name":"[PING^2,3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ade0000-8132-4cb4-78a5-233be1ead4ab@linux.ibm.com/mbox/"},{"id":121864,"url":"https://patchwork.plctlab.org/api/1.2/patches/121864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718084411.310736-1-juzhe.zhong@rivai.ai/","msgid":"<20230718084411.310736-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T08:44:11","name":"[V2] RISC-V: Enable SLP un-order reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718084411.310736-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121896,"url":"https://patchwork.plctlab.org/api/1.2/patches/121896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718093437.595925-1-juzhe.zhong@rivai.ai/","msgid":"<20230718093437.595925-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-18T09:34:37","name":"MAINTAINERS: Add myself as riscv port reviewer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718093437.595925-1-juzhe.zhong@rivai.ai/mbox/"},{"id":121912,"url":"https://patchwork.plctlab.org/api/1.2/patches/121912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1412ccb5be14216ace46eb46cee29ab@ex13mbxc01n01.ikhex.ikoula.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T09:50:18","name":"aarch64: remove useless pairs of rev instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c1412ccb5be14216ace46eb46cee29ab@ex13mbxc01n01.ikhex.ikoula.com/mbox/"},{"id":121933,"url":"https://patchwork.plctlab.org/api/1.2/patches/121933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718102108.8837D134B0@imap2.suse-dmz.suse.de/","msgid":"<20230718102108.8837D134B0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T10:21:08","name":"middle-end/105715 - missed RTL if-conversion with COND_EXPR expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718102108.8837D134B0@imap2.suse-dmz.suse.de/mbox/"},{"id":121936,"url":"https://patchwork.plctlab.org/api/1.2/patches/121936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-2-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:18","name":"[v2,1/8] LoongArch: Added Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-2-panchenghui@loongson.cn/mbox/"},{"id":121941,"url":"https://patchwork.plctlab.org/api/1.2/patches/121941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-3-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:19","name":"[v2,2/8] LoongArch: Added Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-3-panchenghui@loongson.cn/mbox/"},{"id":121938,"url":"https://patchwork.plctlab.org/api/1.2/patches/121938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-4-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:20","name":"[v2,3/8] LoongArch: Added Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-4-panchenghui@loongson.cn/mbox/"},{"id":121937,"url":"https://patchwork.plctlab.org/api/1.2/patches/121937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-5-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:21","name":"[v2,4/8] LoongArch: Added Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-5-panchenghui@loongson.cn/mbox/"},{"id":121940,"url":"https://patchwork.plctlab.org/api/1.2/patches/121940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-6-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:22","name":"[v2,5/8] LoongArch: Added Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-6-panchenghui@loongson.cn/mbox/"},{"id":121942,"url":"https://patchwork.plctlab.org/api/1.2/patches/121942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-7-panchenghui@loongson.cn/","msgid":"<20230718110625.88834-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-07-18T11:06:23","name":"[v2,6/8] LoongArch: Added Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718110625.88834-7-panchenghui@loongson.cn/mbox/"},{"id":121949,"url":"https://patchwork.plctlab.org/api/1.2/patches/121949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718112545.BC5D413494@imap2.suse-dmz.suse.de/","msgid":"<20230718112545.BC5D413494@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T11:25:45","name":"middle-end/61747 - conditional move expansion and constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718112545.BC5D413494@imap2.suse-dmz.suse.de/mbox/"},{"id":121973,"url":"https://patchwork.plctlab.org/api/1.2/patches/121973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2990c55-5e3f-3418-d719-d9af0c649b6d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T12:11:13","name":"OpenMP/Fortran: Non-rectangular loops with constant steps other than 1 or -1 [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2990c55-5e3f-3418-d719-d9af0c649b6d@codesourcery.com/mbox/"},{"id":122009,"url":"https://patchwork.plctlab.org/api/1.2/patches/122009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131311.80670-1-poulhies@adacore.com/","msgid":"<20230718131311.80670-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:11","name":"[COMMITTED] ada: Fix Valid_Scalars attribute applied to types from limited with","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131311.80670-1-poulhies@adacore.com/mbox/"},{"id":122010,"url":"https://patchwork.plctlab.org/api/1.2/patches/122010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131323.80823-1-poulhies@adacore.com/","msgid":"<20230718131323.80823-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:23","name":"[COMMITTED] ada: Allow warnings with explain code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131323.80823-1-poulhies@adacore.com/mbox/"},{"id":122024,"url":"https://patchwork.plctlab.org/api/1.2/patches/122024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131325.80885-1-poulhies@adacore.com/","msgid":"<20230718131325.80885-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:25","name":"[COMMITTED] ada: Refactor s-pack* units to remove multiple returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131325.80885-1-poulhies@adacore.com/mbox/"},{"id":122016,"url":"https://patchwork.plctlab.org/api/1.2/patches/122016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131328.80948-1-poulhies@adacore.com/","msgid":"<20230718131328.80948-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:28","name":"[COMMITTED] ada: Expose expected_throw attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131328.80948-1-poulhies@adacore.com/mbox/"},{"id":122011,"url":"https://patchwork.plctlab.org/api/1.2/patches/122011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131329.81009-1-poulhies@adacore.com/","msgid":"<20230718131329.81009-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:29","name":"[COMMITTED] ada: Fix assertion failure introduced by latest change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131329.81009-1-poulhies@adacore.com/mbox/"},{"id":122013,"url":"https://patchwork.plctlab.org/api/1.2/patches/122013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131331.81070-1-poulhies@adacore.com/","msgid":"<20230718131331.81070-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:31","name":"[COMMITTED] ada: Fix internal error on aggregates of self-referencing types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131331.81070-1-poulhies@adacore.com/mbox/"},{"id":122025,"url":"https://patchwork.plctlab.org/api/1.2/patches/122025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131333.81169-1-poulhies@adacore.com/","msgid":"<20230718131333.81169-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:33","name":"[COMMITTED] ada: Tweak CPU affinity handling on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131333.81169-1-poulhies@adacore.com/mbox/"},{"id":122019,"url":"https://patchwork.plctlab.org/api/1.2/patches/122019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131335.81230-1-poulhies@adacore.com/","msgid":"<20230718131335.81230-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:35","name":"[COMMITTED] ada: Constraint_Error caused by interface conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131335.81230-1-poulhies@adacore.com/mbox/"},{"id":122033,"url":"https://patchwork.plctlab.org/api/1.2/patches/122033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131336.81291-1-poulhies@adacore.com/","msgid":"<20230718131336.81291-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:36","name":"[COMMITTED] ada: Improve error message for ambiguous subprogram call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131336.81291-1-poulhies@adacore.com/mbox/"},{"id":122031,"url":"https://patchwork.plctlab.org/api/1.2/patches/122031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131338.81390-1-poulhies@adacore.com/","msgid":"<20230718131338.81390-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:38","name":"[COMMITTED] ada: Fix expanding container aggregates with Iterator specification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131338.81390-1-poulhies@adacore.com/mbox/"},{"id":122017,"url":"https://patchwork.plctlab.org/api/1.2/patches/122017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131340.81451-1-poulhies@adacore.com/","msgid":"<20230718131340.81451-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:40","name":"[COMMITTED] ada: Apply correct element type for container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131340.81451-1-poulhies@adacore.com/mbox/"},{"id":122026,"url":"https://patchwork.plctlab.org/api/1.2/patches/122026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131342.81513-1-poulhies@adacore.com/","msgid":"<20230718131342.81513-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:42","name":"[COMMITTED] ada: Avoid iterator conflicts in container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131342.81513-1-poulhies@adacore.com/mbox/"},{"id":122035,"url":"https://patchwork.plctlab.org/api/1.2/patches/122035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131343.81574-1-poulhies@adacore.com/","msgid":"<20230718131343.81574-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:43","name":"[COMMITTED] ada: Constraint_Error caused by '\''Image applied to interface type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131343.81574-1-poulhies@adacore.com/mbox/"},{"id":122037,"url":"https://patchwork.plctlab.org/api/1.2/patches/122037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131345.81635-1-poulhies@adacore.com/","msgid":"<20230718131345.81635-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-18T13:13:45","name":"[COMMITTED] ada: Use new typedefs in gcc-interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718131345.81635-1-poulhies@adacore.com/mbox/"},{"id":122039,"url":"https://patchwork.plctlab.org/api/1.2/patches/122039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com/","msgid":"<2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T13:33:37","name":"[v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ce61669-1800-ea45-3436-b841ddf24ea7@linux.ibm.com/mbox/"},{"id":122060,"url":"https://patchwork.plctlab.org/api/1.2/patches/122060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-1-guojiufu@linux.ibm.com/","msgid":"<20230718140544.3497370-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T14:05:43","name":"[V5,1/2] Add overflow API for plus minus mult on range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-1-guojiufu@linux.ibm.com/mbox/"},{"id":122059,"url":"https://patchwork.plctlab.org/api/1.2/patches/122059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-2-guojiufu@linux.ibm.com/","msgid":"<20230718140544.3497370-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-07-18T14:05:44","name":"[V5,2/2] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718140544.3497370-2-guojiufu@linux.ibm.com/mbox/"},{"id":122062,"url":"https://patchwork.plctlab.org/api/1.2/patches/122062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com/","msgid":"<7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-07-18T14:15:40","name":"[releases/gcc-13,1/2] libgcc: Fix eh_frame fast path in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7302f8a2fa2f95252b32de2dc826591e75230662.1689689650.git.fweimer@redhat.com/mbox/"},{"id":122061,"url":"https://patchwork.plctlab.org/api/1.2/patches/122061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com/","msgid":"<6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-07-18T14:15:45","name":"[releases/gcc-13,2/2] libgcc: Fix -Wint-conversion warning in find_fde_tail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6f9dfb4d759146eebf7f88ad519010ea2191bf3a.1689689650.git.fweimer@redhat.com/mbox/"},{"id":122078,"url":"https://patchwork.plctlab.org/api/1.2/patches/122078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17577-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T14:43:21","name":"AArch64 fix regexp for live_1.c sve test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17577-tamar@arm.com/mbox/"},{"id":122080,"url":"https://patchwork.plctlab.org/api/1.2/patches/122080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718145253.CC67E134B0@imap2.suse-dmz.suse.de/","msgid":"<20230718145253.CC67E134B0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-18T14:52:53","name":"tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718145253.CC67E134B0@imap2.suse-dmz.suse.de/mbox/"},{"id":122101,"url":"https://patchwork.plctlab.org/api/1.2/patches/122101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718151807.665487-1-ppalka@redhat.com/","msgid":"<20230718151807.665487-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-18T15:18:07","name":"c++: deducing empty type vs non-type argument pack","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718151807.665487-1-ppalka@redhat.com/mbox/"},{"id":122128,"url":"https://patchwork.plctlab.org/api/1.2/patches/122128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bGkc0U4wk6v_1kj61rfAgw7OpnVRJCLiKu7SkKw8mDMA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-18T16:49:50","name":"[committed] dwarf2: Change return type of predicate functions from int to bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bGkc0U4wk6v_1kj61rfAgw7OpnVRJCLiKu7SkKw8mDMA@mail.gmail.com/mbox/"},{"id":122169,"url":"https://patchwork.plctlab.org/api/1.2/patches/122169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718173314.72666-1-polacek@redhat.com/","msgid":"<20230718173314.72666-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-18T17:33:14","name":"[pushed] c++: Add tests for P2621, no UB in lexer [PR110340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718173314.72666-1-polacek@redhat.com/mbox/"},{"id":122204,"url":"https://patchwork.plctlab.org/api/1.2/patches/122204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718191431.50059-1-someguy@effective-light.com/","msgid":"<20230718191431.50059-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-07-18T19:14:31","name":"[RESEND] c: add -Wmissing-variable-declarations [PR65213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718191431.50059-1-someguy@effective-light.com/mbox/"},{"id":122225,"url":"https://patchwork.plctlab.org/api/1.2/patches/122225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718211458.858343-1-polacek@redhat.com/","msgid":"<20230718211458.858343-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-18T21:14:58","name":"c++: fix ICE with is_really_empty_class [PR110106]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718211458.858343-1-polacek@redhat.com/mbox/"},{"id":122280,"url":"https://patchwork.plctlab.org/api/1.2/patches/122280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718223233.15328-1-kmatsui@gcc.gnu.org/","msgid":"<20230718223233.15328-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T22:32:33","name":"libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718223233.15328-1-kmatsui@gcc.gnu.org/mbox/"},{"id":122288,"url":"https://patchwork.plctlab.org/api/1.2/patches/122288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-2-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:43","name":"[1/8] c++, tree: Move TYPE_REF_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-2-kmatsui@gcc.gnu.org/mbox/"},{"id":122289,"url":"https://patchwork.plctlab.org/api/1.2/patches/122289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-3-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:44","name":"[2/8] gcc: Use TYPE_REF_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-3-kmatsui@gcc.gnu.org/mbox/"},{"id":122291,"url":"https://patchwork.plctlab.org/api/1.2/patches/122291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-4-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:45","name":"[3/8] c++, tree: Move TYPE_PTR_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-4-kmatsui@gcc.gnu.org/mbox/"},{"id":122292,"url":"https://patchwork.plctlab.org/api/1.2/patches/122292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-5-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:46","name":"[4/8] c++, tree: Move INDIRECT_TYPE_P to tree.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-5-kmatsui@gcc.gnu.org/mbox/"},{"id":122293,"url":"https://patchwork.plctlab.org/api/1.2/patches/122293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-7-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:48","name":"[6/8] tree: Remove POINTER_TYPE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-7-kmatsui@gcc.gnu.org/mbox/"},{"id":122294,"url":"https://patchwork.plctlab.org/api/1.2/patches/122294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-8-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:49","name":"[7/8] tree: Define TYPE_REF_IS_LVALUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-8-kmatsui@gcc.gnu.org/mbox/"},{"id":122295,"url":"https://patchwork.plctlab.org/api/1.2/patches/122295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-9-kmatsui@gcc.gnu.org/","msgid":"<20230718233301.28677-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-18T23:12:50","name":"[8/8] c++, lto: Use TYPE_REF_IS_LVALUE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230718233301.28677-9-kmatsui@gcc.gnu.org/mbox/"},{"id":122357,"url":"https://patchwork.plctlab.org/api/1.2/patches/122357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719015221.1383859-1-apinski@marvell.com/","msgid":"<20230719015221.1383859-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-19T01:52:21","name":"Fix PR110726: a | (a == b) can sometimes produce wrong code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719015221.1383859-1-apinski@marvell.com/mbox/"},{"id":122365,"url":"https://patchwork.plctlab.org/api/1.2/patches/122365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com/","msgid":"<531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com>","list_archive_url":null,"date":"2023-07-19T03:06:05","name":"[PATCH-1,combine] Don'\''t widen shift mode when target has rotate/mask instruction on original mode [PR93738]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/531959dd-1342-cbf1-054b-faf620907aea@linux.ibm.com/mbox/"},{"id":122363,"url":"https://patchwork.plctlab.org/api/1.2/patches/122363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com/","msgid":"<7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com>","list_archive_url":null,"date":"2023-07-19T03:06:22","name":"[PATCH-2,rs6000] Don'\''t widen shift mode when target has rotate/mask instruction on original mode [PR93738]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b77c8d6-d052-6606-e8b8-b441cf2543b9@linux.ibm.com/mbox/"},{"id":122366,"url":"https://patchwork.plctlab.org/api/1.2/patches/122366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719032822.85817-1-pan2.li@intel.com/","msgid":"<20230719032822.85817-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-19T03:28:22","name":"[v1] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719032822.85817-1-pan2.li@intel.com/mbox/"},{"id":122369,"url":"https://patchwork.plctlab.org/api/1.2/patches/122369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041432.2967226-1-yunqiang.su@cipunited.com/","msgid":"<20230719041432.2967226-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-19T04:14:32","name":"Store_bit_field_1: Use SUBREG instead of REG if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041432.2967226-1-yunqiang.su@cipunited.com/mbox/"},{"id":122371,"url":"https://patchwork.plctlab.org/api/1.2/patches/122371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041639.2967597-1-yunqiang.su@cipunited.com/","msgid":"<20230719041639.2967597-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-07-19T04:16:39","name":"[v2] Store_bit_field_1: Use SUBREG instead of REG if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719041639.2967597-1-yunqiang.su@cipunited.com/mbox/"},{"id":122388,"url":"https://patchwork.plctlab.org/api/1.2/patches/122388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635742E07E2076FA2BE0560E139A@SJ2PR01MB8635.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T04:33:48","name":"AArch64: Do not increase the vect reduction latency by multiplying count [PR110625]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SJ2PR01MB8635742E07E2076FA2BE0560E139A@SJ2PR01MB8635.prod.exchangelabs.com/mbox/"},{"id":122406,"url":"https://patchwork.plctlab.org/api/1.2/patches/122406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719062911.521348-1-pan2.li@intel.com/","msgid":"<20230719062911.521348-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-19T06:29:11","name":"[v2] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719062911.521348-1-pan2.li@intel.com/mbox/"},{"id":122449,"url":"https://patchwork.plctlab.org/api/1.2/patches/122449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719082126.265155-1-lehua.ding@rivai.ai/","msgid":"<20230719082126.265155-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-19T08:21:26","name":"mklog: fix bugs of --append option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719082126.265155-1-lehua.ding@rivai.ai/mbox/"},{"id":122454,"url":"https://patchwork.plctlab.org/api/1.2/patches/122454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee9e4937-ad2e-1e15-9d5d-6611bd9f572d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T08:26:12","name":"[committed] - Re: [patch] OpenMP/Fortran: Non-rectangular loops with constant steps other than 1 or -1 [PR107424]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee9e4937-ad2e-1e15-9d5d-6611bd9f572d@codesourcery.com/mbox/"},{"id":122505,"url":"https://patchwork.plctlab.org/api/1.2/patches/122505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-1-jwakely@redhat.com/","msgid":"<20230719100625.2494437-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:10","name":"[committed,1/3] libstdc++: Check autoconf macros for strtof and strtold [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-1-jwakely@redhat.com/mbox/"},{"id":122508,"url":"https://patchwork.plctlab.org/api/1.2/patches/122508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-2-jwakely@redhat.com/","msgid":"<20230719100625.2494437-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:11","name":"[committed,2/3] libstdc++: Define std::stof fallback in terms of std::stod [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-2-jwakely@redhat.com/mbox/"},{"id":122506,"url":"https://patchwork.plctlab.org/api/1.2/patches/122506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-3-jwakely@redhat.com/","msgid":"<20230719100625.2494437-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:05:12","name":"[committed,3/3] libstdc++: Enable tests for std::stoi etc. unconditionally [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719100625.2494437-3-jwakely@redhat.com/mbox/"},{"id":122520,"url":"https://patchwork.plctlab.org/api/1.2/patches/122520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101252.2494924-1-jwakely@redhat.com/","msgid":"<20230719101252.2494924-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T10:11:50","name":"[committed] libstdc++: Check for multiple modifiers in chrono format string [PR110708]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101252.2494924-1-jwakely@redhat.com/mbox/"},{"id":122513,"url":"https://patchwork.plctlab.org/api/1.2/patches/122513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-2-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-2-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:52","name":"[1/5,RISC-V] Recognize Zicond extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-2-zengxiao@eswincomputing.com/mbox/"},{"id":122509,"url":"https://patchwork.plctlab.org/api/1.2/patches/122509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-3-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-3-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:53","name":"[2/5,RISC-V] Generate Zicond instruction for basic semantics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-3-zengxiao@eswincomputing.com/mbox/"},{"id":122515,"url":"https://patchwork.plctlab.org/api/1.2/patches/122515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-4-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-4-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:54","name":"[3/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-4-zengxiao@eswincomputing.com/mbox/"},{"id":122511,"url":"https://patchwork.plctlab.org/api/1.2/patches/122511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-5-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-5-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:55","name":"[4/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to non-zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-5-zengxiao@eswincomputing.com/mbox/"},{"id":122512,"url":"https://patchwork.plctlab.org/api/1.2/patches/122512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-6-zengxiao@eswincomputing.com/","msgid":"<20230719101156.21771-6-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-19T10:11:56","name":"[5/5,RISC-V] Generate Zicond instruction for conditional execution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719101156.21771-6-zengxiao@eswincomputing.com/mbox/"},{"id":122547,"url":"https://patchwork.plctlab.org/api/1.2/patches/122547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307191141511.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:02:37","name":"[committed] testsuite: Add 64-bit vector variant for bb-slp-pr95839.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307191141511.28892@tpp.orcam.me.uk/mbox/"},{"id":122549,"url":"https://patchwork.plctlab.org/api/1.2/patches/122549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfDr9xICtYfTpCq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:06:23","name":"wide-int: Fix up wi::divmod_internal [PR110731]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfDr9xICtYfTpCq@tucnak/mbox/"},{"id":122564,"url":"https://patchwork.plctlab.org/api/1.2/patches/122564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113815.2510151-1-jwakely@redhat.com/","msgid":"<20230719113815.2510151-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T11:37:34","name":"[committed] libstdc++: Implement correct locale-specific chrono formatting [PR110719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113815.2510151-1-jwakely@redhat.com/mbox/"},{"id":122568,"url":"https://patchwork.plctlab.org/api/1.2/patches/122568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113829.2510208-1-jwakely@redhat.com/","msgid":"<20230719113829.2510208-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T11:38:17","name":"[committed] libstdc++: Avoid warning in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719113829.2510208-1-jwakely@redhat.com/mbox/"},{"id":122574,"url":"https://patchwork.plctlab.org/api/1.2/patches/122574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfO1++M5xx11xF5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-19T11:53:59","name":"[committed] tree-switch-conversion: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLfO1++M5xx11xF5@tucnak/mbox/"},{"id":122576,"url":"https://patchwork.plctlab.org/api/1.2/patches/122576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719115505.100294-1-juzhe.zhong@rivai.ai/","msgid":"<20230719115505.100294-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T11:55:05","name":"RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719115505.100294-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122587,"url":"https://patchwork.plctlab.org/api/1.2/patches/122587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1c20be2-5ac1-6644-5ffa-be2c85867d46@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T12:27:23","name":"[OG13,committed] gfortran.dg/gomp/affinity-clause-1.f90: Fix scan-tree-dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d1c20be2-5ac1-6644-5ffa-be2c85867d46@codesourcery.com/mbox/"},{"id":122610,"url":"https://patchwork.plctlab.org/api/1.2/patches/122610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com/","msgid":"<4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com>","list_archive_url":null,"date":"2023-07-19T12:59:16","name":"[OG13,committed] libgomp.fortran/map-subarray-5.f90: Fix for shared-mem device/host","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4471fdfc-8b27-b0f8-a98e-fdcc6c858f13@codesourcery.com/mbox/"},{"id":122680,"url":"https://patchwork.plctlab.org/api/1.2/patches/122680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17578-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T15:15:50","name":"[1/2,frontend] Add novector C++ pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17578-tamar@arm.com/mbox/"},{"id":122681,"url":"https://patchwork.plctlab.org/api/1.2/patches/122681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLf+UkEwHWUbkdzy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T15:16:34","name":"[2/2,frontend] : Add novector C pragma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLf+UkEwHWUbkdzy@arm.com/mbox/"},{"id":122698,"url":"https://patchwork.plctlab.org/api/1.2/patches/122698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155211.2545541-1-jwakely@redhat.com/","msgid":"<20230719155211.2545541-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T15:51:54","name":"[committed] libstdc++: Fix locale-specific duration formatting [PR110719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155211.2545541-1-jwakely@redhat.com/mbox/"},{"id":122699,"url":"https://patchwork.plctlab.org/api/1.2/patches/122699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155216.2545575-1-jwakely@redhat.com/","msgid":"<20230719155216.2545575-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T15:52:12","name":"[committed] libstdc++: Fix formatting of negative chrono::hh_mm_ss","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719155216.2545575-1-jwakely@redhat.com/mbox/"},{"id":122719,"url":"https://patchwork.plctlab.org/api/1.2/patches/122719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88fc414-c5b2-ac42-b531-dc0dd4268cff@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T16:44:08","name":"[GCC,13] aarch64: Remove architecture dependencies from intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e88fc414-c5b2-ac42-b531-dc0dd4268cff@e124511.cambridge.arm.com/mbox/"},{"id":122728,"url":"https://patchwork.plctlab.org/api/1.2/patches/122728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f173f4f8-2f33-c712-c400-d3b00ff43f84@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-19T16:46:48","name":"[V2] rs6000: Don'\''t allow AltiVec address in movoo & movxo pattern [PR110411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f173f4f8-2f33-c712-c400-d3b00ff43f84@linux.vnet.ibm.com/mbox/"},{"id":122758,"url":"https://patchwork.plctlab.org/api/1.2/patches/122758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com/","msgid":"<10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com>","list_archive_url":null,"date":"2023-07-19T17:59:04","name":"[pushed,LRA] : Check and update frame to stack pointer elimination after stack slot allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10df283b-93c8-1d05-fa8a-11c5b256f943@redhat.com/mbox/"},{"id":122759,"url":"https://patchwork.plctlab.org/api/1.2/patches/122759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180053.46101-1-polacek@redhat.com/","msgid":"<20230719180053.46101-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T18:00:53","name":"c++: fix ICE with designated initializer [PR110114]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180053.46101-1-polacek@redhat.com/mbox/"},{"id":122760,"url":"https://patchwork.plctlab.org/api/1.2/patches/122760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180536.2447863-1-ppalka@redhat.com/","msgid":"<20230719180536.2447863-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-19T18:05:36","name":"c++: passing partially inst tmpl as ttp [PR110566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719180536.2447863-1-ppalka@redhat.com/mbox/"},{"id":122765,"url":"https://patchwork.plctlab.org/api/1.2/patches/122765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLgyqE97WQkOyZc+@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-19T18:59:52","name":"Use strtol instead of std::stoi in gensupport.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLgyqE97WQkOyZc+@mx3210.localdomain/mbox/"},{"id":122769,"url":"https://patchwork.plctlab.org/api/1.2/patches/122769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719192047.449259-1-polacek@redhat.com/","msgid":"<20230719192047.449259-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T19:20:47","name":"c++: -Wmissing-field-initializers and empty class [PR110064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719192047.449259-1-polacek@redhat.com/mbox/"},{"id":122774,"url":"https://patchwork.plctlab.org/api/1.2/patches/122774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719193242.59472-1-kmatsui@gcc.gnu.org/","msgid":"<20230719193242.59472-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-19T19:32:42","name":"[v2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719193242.59472-1-kmatsui@gcc.gnu.org/mbox/"},{"id":122795,"url":"https://patchwork.plctlab.org/api/1.2/patches/122795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com/","msgid":"<009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-19T20:07:29","name":"[x86_64] More TImode parameter passing improvements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/009201d9ba7c$a64374d0$f2ca5e70$@nextmovesoftware.com/mbox/"},{"id":122822,"url":"https://patchwork.plctlab.org/api/1.2/patches/122822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719204522.2585813-1-jwakely@redhat.com/","msgid":"<20230719204522.2585813-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T20:43:58","name":"libstdc++: Fix preprocessor conditions for std::from_chars [PR109921]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719204522.2585813-1-jwakely@redhat.com/mbox/"},{"id":122845,"url":"https://patchwork.plctlab.org/api/1.2/patches/122845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719215122.513059-1-polacek@redhat.com/","msgid":"<20230719215122.513059-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-19T21:51:22","name":"c++: Improve printing of base classes [PR110745]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719215122.513059-1-polacek@redhat.com/mbox/"},{"id":122847,"url":"https://patchwork.plctlab.org/api/1.2/patches/122847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719220108.255662-1-dmalcolm@redhat.com/","msgid":"<20230719220108.255662-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:01:08","name":"[pushed] analyzer: fix ICE on division of tainted floating-point values [PR110700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719220108.255662-1-dmalcolm@redhat.com/mbox/"},{"id":122848,"url":"https://patchwork.plctlab.org/api/1.2/patches/122848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com/","msgid":"<003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-19T22:10:57","name":"PR c/110699: Defend against error_mark_node in gimplify.cc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003e01d9ba8d$e5cd4390$b167cab0$@nextmovesoftware.com/mbox/"},{"id":122867,"url":"https://patchwork.plctlab.org/api/1.2/patches/122867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224318.2599563-1-jwakely@redhat.com/","msgid":"<20230719224318.2599563-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:43:05","name":"[committed] libstdc++: Check for std::ratio in arithmetic and comparisons [PR110593]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224318.2599563-1-jwakely@redhat.com/mbox/"},{"id":122868,"url":"https://patchwork.plctlab.org/api/1.2/patches/122868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224441.2599589-1-jwakely@redhat.com/","msgid":"<20230719224441.2599589-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-19T22:43:19","name":"[committed] libstdc++: Do not define inaccurate from_chars for _Float128 [PR110077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224441.2599589-1-jwakely@redhat.com/mbox/"},{"id":122869,"url":"https://patchwork.plctlab.org/api/1.2/patches/122869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224502.67323-1-juzhe.zhong@rivai.ai/","msgid":"<20230719224502.67323-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T22:45:01","name":"[V2] RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719224502.67323-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122880,"url":"https://patchwork.plctlab.org/api/1.2/patches/122880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmyvzece.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-07-19T23:11:29","name":"[v4] Introduce attribute sym","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmyvzece.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":122891,"url":"https://patchwork.plctlab.org/api/1.2/patches/122891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719232120.80316-1-juzhe.zhong@rivai.ai/","msgid":"<20230719232120.80316-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-19T23:21:20","name":"[V3] RISC-V: Refactor RVV machine modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230719232120.80316-1-juzhe.zhong@rivai.ai/mbox/"},{"id":122952,"url":"https://patchwork.plctlab.org/api/1.2/patches/122952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720024142.1448443-1-apinski@marvell.com/","msgid":"<20230720024142.1448443-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-20T02:41:42","name":"Move combine over to statistics_counter_event.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720024142.1448443-1-apinski@marvell.com/mbox/"},{"id":122956,"url":"https://patchwork.plctlab.org/api/1.2/patches/122956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720031352.786458-1-haochen.jiang@intel.com/","msgid":"<20230720031352.786458-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-20T03:13:52","name":"Correct Granite Rapids{, D} documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720031352.786458-1-haochen.jiang@intel.com/mbox/"},{"id":122959,"url":"https://patchwork.plctlab.org/api/1.2/patches/122959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032157.869080-1-pan2.li@intel.com/","msgid":"<20230720032157.869080-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T03:21:57","name":"[v3] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032157.869080-1-pan2.li@intel.com/mbox/"},{"id":122960,"url":"https://patchwork.plctlab.org/api/1.2/patches/122960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032243.3643540-1-lhyatt@gmail.com/","msgid":"<20230720032243.3643540-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-20T03:22:43","name":"[committed] testsuite: Fix C++ UDL tests failing on 32-bit arch [PR103902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720032243.3643540-1-lhyatt@gmail.com/mbox/"},{"id":122973,"url":"https://patchwork.plctlab.org/api/1.2/patches/122973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com/","msgid":"<460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-20T04:35:28","name":"rs6000: Fix issue in specifying PTImode as an attribute [PR106895]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/460cd2bd-7c82-95d8-c58e-f32da70ab2a9@linux.vnet.ibm.com/mbox/"},{"id":122975,"url":"https://patchwork.plctlab.org/api/1.2/patches/122975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720045009.989895-1-hongtao.liu@intel.com/","msgid":"<20230720045009.989895-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-20T04:50:09","name":"Fix fp16 related testcase failure for i686.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720045009.989895-1-hongtao.liu@intel.com/mbox/"},{"id":122991,"url":"https://patchwork.plctlab.org/api/1.2/patches/122991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720060740.649611-1-juzhe.zhong@rivai.ai/","msgid":"<20230720060740.649611-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T06:07:40","name":"VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720060740.649611-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123007,"url":"https://patchwork.plctlab.org/api/1.2/patches/123007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720063250.1910048-1-pan2.li@intel.com/","msgid":"<20230720063250.1910048-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T06:32:50","name":"[v1] RISC-V: Align the pattern format in vector.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720063250.1910048-1-pan2.li@intel.com/mbox/"},{"id":123009,"url":"https://patchwork.plctlab.org/api/1.2/patches/123009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720064307.1943091-1-pan2.li@intel.com/","msgid":"<20230720064307.1943091-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T06:43:07","name":"[v4] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720064307.1943091-1-pan2.li@intel.com/mbox/"},{"id":123030,"url":"https://patchwork.plctlab.org/api/1.2/patches/123030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLjdpesBtEv9OFMF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T07:09:25","name":"loop-ch improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLjdpesBtEv9OFMF@kam.mff.cuni.cz/mbox/"},{"id":123051,"url":"https://patchwork.plctlab.org/api/1.2/patches/123051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073406.239379-1-juzhe.zhong@rivai.ai/","msgid":"<20230720073406.239379-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T07:34:06","name":"RISC-V: Support in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073406.239379-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123052,"url":"https://patchwork.plctlab.org/api/1.2/patches/123052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073516.2171485-1-hongtao.liu@intel.com/","msgid":"<20230720073516.2171485-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-20T07:35:16","name":"Optimize vlddqu to vmovdqu for TARGET_AVX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720073516.2171485-1-hongtao.liu@intel.com/mbox/"},{"id":123066,"url":"https://patchwork.plctlab.org/api/1.2/patches/123066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720080629.1060969-1-juzhe.zhong@rivai.ai/","msgid":"<20230720080629.1060969-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T08:06:29","name":"CODE STRUCTURE: Refine codes in Vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720080629.1060969-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123088,"url":"https://patchwork.plctlab.org/api/1.2/patches/123088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720083530.3260344-1-pan2.li@intel.com/","msgid":"<20230720083530.3260344-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-20T08:35:30","name":"[v1] RISC-V: Fix one incorrect match operand for RVV reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720083530.3260344-1-pan2.li@intel.com/mbox/"},{"id":123089,"url":"https://patchwork.plctlab.org/api/1.2/patches/123089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720085103.159227-1-juzhe.zhong@rivai.ai/","msgid":"<20230720085103.159227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T08:51:03","name":"[V2] RISC-V: Support in-order floating-point reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720085103.159227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123110,"url":"https://patchwork.plctlab.org/api/1.2/patches/123110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-2-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:24","name":"[1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-2-lehua.ding@rivai.ai/mbox/"},{"id":123112,"url":"https://patchwork.plctlab.org/api/1.2/patches/123112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-3-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:25","name":"[2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-3-lehua.ding@rivai.ai/mbox/"},{"id":123111,"url":"https://patchwork.plctlab.org/api/1.2/patches/123111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-4-lehua.ding@rivai.ai/","msgid":"<20230720090126.2976103-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-20T09:01:26","name":"[3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720090126.2976103-4-lehua.ding@rivai.ai/mbox/"},{"id":123134,"url":"https://patchwork.plctlab.org/api/1.2/patches/123134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLj/54VvX7Xz7wRk@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:35:35","name":"[v4,1/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLj/54VvX7Xz7wRk@Thaum.localdomain/mbox/"},{"id":123135,"url":"https://patchwork.plctlab.org/api/1.2/patches/123135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAGBfPXgFGt1ox@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:36:24","name":"[v4,2/3] c++: Improve constexpr error for dangling local variables [PR110619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAGBfPXgFGt1ox@Thaum.localdomain/mbox/"},{"id":123136,"url":"https://patchwork.plctlab.org/api/1.2/patches/123136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAUdydPj5lwahN@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-20T09:37:21","name":"[v4,3/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLkAUdydPj5lwahN@Thaum.localdomain/mbox/"},{"id":123159,"url":"https://patchwork.plctlab.org/api/1.2/patches/123159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a793b7d9-2235-f1c5-1591-92075b8c0b99@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T10:13:25","name":"testsuite: Add a test case for PR110729","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a793b7d9-2235-f1c5-1591-92075b8c0b99@linux.ibm.com/mbox/"},{"id":123161,"url":"https://patchwork.plctlab.org/api/1.2/patches/123161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com/","msgid":"<6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com>","list_archive_url":null,"date":"2023-07-20T10:16:43","name":"sccvn: Correct the index of bias for IFN_LEN_STORE [PR110744]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6213e534-245e-9c06-4c6d-2676c7dbdbff@linux.ibm.com/mbox/"},{"id":123240,"url":"https://patchwork.plctlab.org/api/1.2/patches/123240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720123919.ECBCE3858C33@sourceware.org/","msgid":"<20230720123919.ECBCE3858C33@sourceware.org>","list_archive_url":null,"date":"2023-07-20T12:38:36","name":"tree-optimization/110742 - fix latent issue with permuting existing vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720123919.ECBCE3858C33@sourceware.org/mbox/"},{"id":123248,"url":"https://patchwork.plctlab.org/api/1.2/patches/123248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720124636.A1DDA385558C@sourceware.org/","msgid":"<20230720124636.A1DDA385558C@sourceware.org>","list_archive_url":null,"date":"2023-07-20T12:45:52","name":"tree-optimization/110204 - second level redundancy and simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720124636.A1DDA385558C@sourceware.org/mbox/"},{"id":123282,"url":"https://patchwork.plctlab.org/api/1.2/patches/123282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720132910.210043-1-xry111@xry111.site/","msgid":"<20230720132910.210043-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-07-20T13:28:02","name":"LoongArch: Allow using --with-arch=native if host CPU is LoongArch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720132910.210043-1-xry111@xry111.site/mbox/"},{"id":123303,"url":"https://patchwork.plctlab.org/api/1.2/patches/123303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk+EOndV5f4UbuW@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:00:48","name":"Cleanup code determining number of iterations from cfg profile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk+EOndV5f4UbuW@kam.mff.cuni.cz/mbox/"},{"id":123309,"url":"https://patchwork.plctlab.org/api/1.2/patches/123309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk/z6F6HX5+zGLg@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:08:15","name":"[v2] c++: fix ICE with designated initializer [PR110114]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLk/z6F6HX5+zGLg@redhat.com/mbox/"},{"id":123312,"url":"https://patchwork.plctlab.org/api/1.2/patches/123312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea56d14fc5ca99685e8c5c6c94c28bdadd0bb757.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:35:19","name":"[1/3] gcc: xtensa: add mdynconfig option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ea56d14fc5ca99685e8c5c6c94c28bdadd0bb757.camel@espressif.com/mbox/"},{"id":123315,"url":"https://patchwork.plctlab.org/api/1.2/patches/123315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec6efca9301a39f9545f7285d43e0251af83d9fb.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:37:22","name":"[2/3] gcc: xtensa: use dynconfig settings as builtin-macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec6efca9301a39f9545f7285d43e0251af83d9fb.camel@espressif.com/mbox/"},{"id":123317,"url":"https://patchwork.plctlab.org/api/1.2/patches/123317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e20622aa6c7b3876b25cd59cbf0c6dcb0f3ae5.camel@espressif.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:37:59","name":"[3/3] gcc: xtensa: add xtensa*-esp*-elf multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0e20622aa6c7b3876b25cd59cbf0c6dcb0f3ae5.camel@espressif.com/mbox/"},{"id":123329,"url":"https://patchwork.plctlab.org/api/1.2/patches/123329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6ilaemyh0.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-20T14:47:23","name":"[committed] Document new analyzer parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6ilaemyh0.fsf@suse.cz/mbox/"},{"id":123382,"url":"https://patchwork.plctlab.org/api/1.2/patches/123382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com/","msgid":"<4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com>","list_archive_url":null,"date":"2023-07-20T16:31:39","name":"[committed] libgomp.texi: Split OpenMP routines chapter into sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4786fe69-93fb-ccb4-8f1e-2e3cf1123801@codesourcery.com/mbox/"},{"id":123429,"url":"https://patchwork.plctlab.org/api/1.2/patches/123429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9482c2a-285d-1ff0-c234-13f8e418d646@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T18:49:06","name":"[pushed,LRA] : Exclude reloading of frame pointer in subreg for some cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9482c2a-285d-1ff0-c234-13f8e418d646@redhat.com/mbox/"},{"id":123431,"url":"https://patchwork.plctlab.org/api/1.2/patches/123431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZMydG9qLjbcdCddg=Cd5B5MXoqcPsQ=xQpYj5dwTQKNQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T18:57:53","name":"[committed] i386: Double-word sign-extension missed-optimization [PR110717]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZMydG9qLjbcdCddg=Cd5B5MXoqcPsQ=xQpYj5dwTQKNQ@mail.gmail.com/mbox/"},{"id":123436,"url":"https://patchwork.plctlab.org/api/1.2/patches/123436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW1HBv_xLevgVtxR6U-J=OgnwAOHNN5e746ubBOu7Sz7Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-20T19:29:26","name":"libgo patch committet: Don'\''t collect package CGOLDFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW1HBv_xLevgVtxR6U-J=OgnwAOHNN5e746ubBOu7Sz7Q@mail.gmail.com/mbox/"},{"id":123482,"url":"https://patchwork.plctlab.org/api/1.2/patches/123482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720232004.240308-1-juzhe.zhong@rivai.ai/","msgid":"<20230720232004.240308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-20T23:20:04","name":"cleanup: Change LEN_MASK into MASK_LEN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230720232004.240308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123499,"url":"https://patchwork.plctlab.org/api/1.2/patches/123499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003148.339618-1-dmalcolm@redhat.com/","msgid":"<20230721003148.339618-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:31:48","name":"[pushed] analyzer: fix ICE on certain pointer subtractions [PR110387]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003148.339618-1-dmalcolm@redhat.com/mbox/"},{"id":123501,"url":"https://patchwork.plctlab.org/api/1.2/patches/123501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003201.339666-1-dmalcolm@redhat.com/","msgid":"<20230721003201.339666-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:32:01","name":"[pushed] analyzer/text-art: fix clang warnings [PR110433,PR110612]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003201.339666-1-dmalcolm@redhat.com/mbox/"},{"id":123500,"url":"https://patchwork.plctlab.org/api/1.2/patches/123500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003216.339710-1-dmalcolm@redhat.com/","msgid":"<20230721003216.339710-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-21T00:32:16","name":"[pushed] analyzer: avoid usage of TYPE_PRECISION on vector types [PR110455]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721003216.339710-1-dmalcolm@redhat.com/mbox/"},{"id":123505,"url":"https://patchwork.plctlab.org/api/1.2/patches/123505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com/","msgid":"<894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com>","list_archive_url":null,"date":"2023-07-21T01:32:16","name":"[PATCHv2,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/894768a2-5ebe-60f0-e6e9-73bdc9f1425d@linux.ibm.com/mbox/"},{"id":123513,"url":"https://patchwork.plctlab.org/api/1.2/patches/123513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721020900.298554-1-juzhe.zhong@rivai.ai/","msgid":"<20230721020900.298554-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T02:09:00","name":"cleanup: make all cond_len_* and mask_len_* consistent on the order of mask and len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721020900.298554-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123516,"url":"https://patchwork.plctlab.org/api/1.2/patches/123516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721022343.314043-1-juzhe.zhong@rivai.ai/","msgid":"<20230721022343.314043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T02:23:43","name":"cleanup: Change condition order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721022343.314043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123543,"url":"https://patchwork.plctlab.org/api/1.2/patches/123543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721040534.1511819-1-apinski@marvell.com/","msgid":"<20230721040534.1511819-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-21T04:05:34","name":"MATCH: Add Max,a> -> Max simplifcation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721040534.1511819-1-apinski@marvell.com/mbox/"},{"id":123563,"url":"https://patchwork.plctlab.org/api/1.2/patches/123563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721052911.1514944-1-apinski@marvell.com/","msgid":"<20230721052911.1514944-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-21T05:29:11","name":"libfortran: Fix build for targets that don'\''t have 10byte or 16 byte floating point","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721052911.1514944-1-apinski@marvell.com/mbox/"},{"id":123575,"url":"https://patchwork.plctlab.org/api/1.2/patches/123575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com/","msgid":"<07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com>","list_archive_url":null,"date":"2023-07-21T06:03:23","name":"vect: Don'\''t vectorize a single scalar iteration loop [PR110740]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07426582-50b4-de62-f5d7-d36e470f7fcb@linux.ibm.com/mbox/"},{"id":123625,"url":"https://patchwork.plctlab.org/api/1.2/patches/123625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074625.607468-1-haochen.jiang@intel.com/","msgid":"<20230721074625.607468-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-07-21T07:46:25","name":"Fix a typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074625.607468-1-haochen.jiang@intel.com/mbox/"},{"id":123623,"url":"https://patchwork.plctlab.org/api/1.2/patches/123623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074716.2007407-1-slyich@gmail.com/","msgid":"<20230721074716.2007407-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-07-21T07:47:16","name":"mh-mingw: drop unused BOOT_CXXFLAGS variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721074716.2007407-1-slyich@gmail.com/mbox/"},{"id":123640,"url":"https://patchwork.plctlab.org/api/1.2/patches/123640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLo5+wTc5gkQIIP/@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T07:55:39","name":"Improve loop dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLo5+wTc5gkQIIP/@kam.mff.cuni.cz/mbox/"},{"id":123710,"url":"https://patchwork.plctlab.org/api/1.2/patches/123710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721095727.221308-1-juzhe.zhong@rivai.ai/","msgid":"<20230721095727.221308-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T09:57:27","name":"[committed] RISC-V: Fix redundant variable declaration.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721095727.221308-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123718,"url":"https://patchwork.plctlab.org/api/1.2/patches/123718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721100532.1342700-1-juzhe.zhong@rivai.ai/","msgid":"<20230721100532.1342700-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T10:05:32","name":"[V2] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721100532.1342700-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123734,"url":"https://patchwork.plctlab.org/api/1.2/patches/123734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com/","msgid":"<202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-07-21T10:13:51","name":"ira: update allocated_hardreg_p[] in improve_allocation() [PR110254]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202aea78-0a16-c78b-206c-824ba7bab65d@linux.vnet.ibm.com/mbox/"},{"id":123785,"url":"https://patchwork.plctlab.org/api/1.2/patches/123785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721105722.1460089-1-juzhe.zhong@rivai.ai/","msgid":"<20230721105722.1460089-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T10:57:22","name":"[V3] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721105722.1460089-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123788,"url":"https://patchwork.plctlab.org/api/1.2/patches/123788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110603.1470072-1-juzhe.zhong@rivai.ai/","msgid":"<20230721110603.1470072-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-21T11:06:03","name":"[V4] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110603.1470072-1-juzhe.zhong@rivai.ai/mbox/"},{"id":123790,"url":"https://patchwork.plctlab.org/api/1.2/patches/123790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110813.3136547-1-dkm@kataplop.net/","msgid":"<20230721110813.3136547-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-07-21T11:08:13","name":"[v2] mklog: handle Signed-Off-By, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721110813.3136547-1-dkm@kataplop.net/mbox/"},{"id":123805,"url":"https://patchwork.plctlab.org/api/1.2/patches/123805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7af59d52ac0b134bd6617b8f45673c63981e13a.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:21:57","name":"[C] : Add Walloc-type to warn about insufficient size in allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f7af59d52ac0b134bd6617b8f45673c63981e13a.camel@tugraz.at/mbox/"},{"id":123812,"url":"https://patchwork.plctlab.org/api/1.2/patches/123812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpvtOUb8IBYs7zT@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:44:52","name":"finite_loop_p tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpvtOUb8IBYs7zT@kam.mff.cuni.cz/mbox/"},{"id":123819,"url":"https://patchwork.plctlab.org/api/1.2/patches/123819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721114835.23667-1-cupertino.miranda@oracle.com/","msgid":"<20230721114835.23667-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T11:48:35","name":"bpf: pseudo-c assembly dialect support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721114835.23667-1-cupertino.miranda@oracle.com/mbox/"},{"id":123820,"url":"https://patchwork.plctlab.org/api/1.2/patches/123820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpxj7Ue6W4xkFjC@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T11:52:47","name":"loop-ch improvements, part 5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLpxj7Ue6W4xkFjC@kam.mff.cuni.cz/mbox/"},{"id":123822,"url":"https://patchwork.plctlab.org/api/1.2/patches/123822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721115730.A4C49134BA@imap2.suse-dmz.suse.de/","msgid":"<20230721115730.A4C49134BA@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-21T11:57:30","name":"tree-optimization/41320 - remove bogus XFAILed testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721115730.A4C49134BA@imap2.suse-dmz.suse.de/mbox/"},{"id":123828,"url":"https://patchwork.plctlab.org/api/1.2/patches/123828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded23976-2873-45de-aebd-28839ec0ab82@AZ-NEU-EX03.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T12:11:38","name":"Reduce floating-point difficulties in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ded23976-2873-45de-aebd-28839ec0ab82@AZ-NEU-EX03.Arm.com/mbox/"},{"id":123909,"url":"https://patchwork.plctlab.org/api/1.2/patches/123909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqaIhXmspiXfoVl@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T14:45:54","name":"Fix sreal::to_int and implement sreal::to_nearest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqaIhXmspiXfoVl@kam.mff.cuni.cz/mbox/"},{"id":123910,"url":"https://patchwork.plctlab.org/api/1.2/patches/123910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721145046.93041-1-iain@sandoe.co.uk/","msgid":"<20230721145046.93041-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-07-21T14:50:46","name":"[pushed] Darwin: Handle linker '\''-demangle'\'' option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721145046.93041-1-iain@sandoe.co.uk/mbox/"},{"id":123912,"url":"https://patchwork.plctlab.org/api/1.2/patches/123912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721150851.94504-1-drross@redhat.com/","msgid":"<20230721150851.94504-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-21T15:08:51","name":"match.pd: Implement missed optimization (x << c) >> c -> -(x & 1) [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721150851.94504-1-drross@redhat.com/mbox/"},{"id":123914,"url":"https://patchwork.plctlab.org/api/1.2/patches/123914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721151626.67206-1-siddhesh@gotplt.org/","msgid":"<20230721151626.67206-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-07-21T15:16:26","name":"testsuite/110763: Ensure zero return from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721151626.67206-1-siddhesh@gotplt.org/mbox/"},{"id":123926,"url":"https://patchwork.plctlab.org/api/1.2/patches/123926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GFBmnmg1xSa0FEU-nENjdCZVCS28-3rVn2r1qCXxyyeag@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:35:11","name":"[WIP,RFC] analyzer: Add optional trim of the analyzer diagnostics going too deep [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKiQ0GFBmnmg1xSa0FEU-nENjdCZVCS28-3rVn2r1qCXxyyeag@mail.gmail.com/mbox/"},{"id":123928,"url":"https://patchwork.plctlab.org/api/1.2/patches/123928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmI1whqFD6yl0m@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:37:07","name":"Implement flat loop profile detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmI1whqFD6yl0m@kam.mff.cuni.cz/mbox/"},{"id":123929,"url":"https://patchwork.plctlab.org/api/1.2/patches/123929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmTxelBV+8iRmH@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-21T15:37:51","name":"Fix gcc.dg/tree-ssa/copy-headers-9.c and gcc.dg/tree-ssa/dce-1.c failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLqmTxelBV+8iRmH@kam.mff.cuni.cz/mbox/"},{"id":123963,"url":"https://patchwork.plctlab.org/api/1.2/patches/123963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721164332.29163-1-cupertino.miranda@oracle.com/","msgid":"<20230721164332.29163-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T16:43:32","name":"bpf: fixed template for neg (added second operand)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721164332.29163-1-cupertino.miranda@oracle.com/mbox/"},{"id":124043,"url":"https://patchwork.plctlab.org/api/1.2/patches/124043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721175552.2693295-1-vineetg@rivosinc.com/","msgid":"<20230721175552.2693295-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-21T17:55:52","name":"RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721175552.2693295-1-vineetg@rivosinc.com/mbox/"},{"id":124051,"url":"https://patchwork.plctlab.org/api/1.2/patches/124051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181839.119969-1-drross@redhat.com/","msgid":"<20230721181839.119969-1-drross@redhat.com>","list_archive_url":null,"date":"2023-07-21T18:18:39","name":"match.pd, v2: Implement missed optimization (~X | Y) ^ X -> ~(X & Y) [PR109986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181839.119969-1-drross@redhat.com/mbox/"},{"id":124052,"url":"https://patchwork.plctlab.org/api/1.2/patches/124052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181954.31073-1-cupertino.miranda@oracle.com/","msgid":"<20230721181954.31073-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-07-21T18:19:54","name":"[v4] bpf: fixed template for neg (added second operand)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721181954.31073-1-cupertino.miranda@oracle.com/mbox/"},{"id":124053,"url":"https://patchwork.plctlab.org/api/1.2/patches/124053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183035.2892020-1-vineetg@rivosinc.com/","msgid":"<20230721183035.2892020-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-21T18:30:35","name":"[v2] RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183035.2892020-1-vineetg@rivosinc.com/mbox/"},{"id":124055,"url":"https://patchwork.plctlab.org/api/1.2/patches/124055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183420.1806906-1-ppalka@redhat.com/","msgid":"<20230721183420.1806906-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-21T18:34:19","name":"[2/1] c++: passing partially inst ttp as ttp [PR110566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721183420.1806906-1-ppalka@redhat.com/mbox/"},{"id":124062,"url":"https://patchwork.plctlab.org/api/1.2/patches/124062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721190234.1018000-1-qing.zhao@oracle.com/","msgid":"<20230721190234.1018000-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-07-21T19:02:34","name":"gcc-13/changes.html: Add and fix URL to -fstrict-flex-array option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721190234.1018000-1-qing.zhao@oracle.com/mbox/"},{"id":124065,"url":"https://patchwork.plctlab.org/api/1.2/patches/124065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLriUhZiW+1cEByD@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-21T19:53:54","name":"[committed] Require target lra in gcc.c-torture/compile/asmgoto-6.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLriUhZiW+1cEByD@mx3210.localdomain/mbox/"},{"id":124105,"url":"https://patchwork.plctlab.org/api/1.2/patches/124105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAvei9q1OdtwLCJcog5omsftpaXjMfwdNqX=X5BpVYYrQjpYzw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T21:22:48","name":"libstdc++ Add cstdarg to freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAvei9q1OdtwLCJcog5omsftpaXjMfwdNqX=X5BpVYYrQjpYzw@mail.gmail.com/mbox/"},{"id":124110,"url":"https://patchwork.plctlab.org/api/1.2/patches/124110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721212937.1784983-1-thiago.bauermann@linaro.org/","msgid":"<20230721212937.1784983-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-07-21T21:29:37","name":"testsuite: Adjust g++.dg/gomp/pr58567.C to new compiler message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721212937.1784983-1-thiago.bauermann@linaro.org/mbox/"},{"id":124138,"url":"https://patchwork.plctlab.org/api/1.2/patches/124138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721223835.630543-1-polacek@redhat.com/","msgid":"<20230721223835.630543-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-21T22:38:35","name":"c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721223835.630543-1-polacek@redhat.com/mbox/"},{"id":124145,"url":"https://patchwork.plctlab.org/api/1.2/patches/124145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-2-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-2-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:48","name":"[v3,1/4] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-2-lhyatt@gmail.com/mbox/"},{"id":124142,"url":"https://patchwork.plctlab.org/api/1.2/patches/124142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-3-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-3-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:49","name":"[v3,2/4] diagnostics: Handle generated data locations in edit_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-3-lhyatt@gmail.com/mbox/"},{"id":124144,"url":"https://patchwork.plctlab.org/api/1.2/patches/124144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-4-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-4-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:50","name":"[v3,3/4] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-4-lhyatt@gmail.com/mbox/"},{"id":124143,"url":"https://patchwork.plctlab.org/api/1.2/patches/124143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-5-lhyatt@gmail.com/","msgid":"<20230721230851.1981434-5-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-21T23:08:51","name":"[v3,4/4] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230721230851.1981434-5-lhyatt@gmail.com/mbox/"},{"id":124149,"url":"https://patchwork.plctlab.org/api/1.2/patches/124149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef666dabca521f1afb9cc1cf6d65a3a9a0a17084.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-21T23:38:04","name":"[1/2,ver,2] rs6000, add argument to function find_instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef666dabca521f1afb9cc1cf6d65a3a9a0a17084.camel@us.ibm.com/mbox/"},{"id":124162,"url":"https://patchwork.plctlab.org/api/1.2/patches/124162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com/","msgid":"<6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com>","list_archive_url":null,"date":"2023-07-22T00:34:43","name":"[pushed,LRA] : Fix sparc bootstrap after recent patch for fp elimination for avr LRA port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6b6fdcd7-95c6-3d07-397b-56bca4327cc8@redhat.com/mbox/"},{"id":124326,"url":"https://patchwork.plctlab.org/api/1.2/patches/124326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com/","msgid":"<00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T14:17:40","name":"[x86] Don'\''t use insvti_{high, low}part with -O0 (for compile-time).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com/mbox/"},{"id":124330,"url":"https://patchwork.plctlab.org/api/1.2/patches/124330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyJ/BH+crWg3hD@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:13:43","name":"[v5,1/3] c++: Improve location information in constant evaluation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyJ/BH+crWg3hD@Thaum.localdomain/mbox/"},{"id":124331,"url":"https://patchwork.plctlab.org/api/1.2/patches/124331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyXbXiHvhfAjpu@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:14:37","name":"[v5,2/3] c++: Prevent dangling pointers from becoming nullptr in constexpr [PR110619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvyXbXiHvhfAjpu@Thaum.localdomain/mbox/"},{"id":124332,"url":"https://patchwork.plctlab.org/api/1.2/patches/124332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvygoqcP+PcF6hH@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-07-22T15:15:14","name":"[v5,3/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZLvygoqcP+PcF6hH@Thaum.localdomain/mbox/"},{"id":124333,"url":"https://patchwork.plctlab.org/api/1.2/patches/124333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com/","msgid":"<00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T15:37:39","name":"[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c701d9bcb2$733bcdc0$59b36940$@nextmovesoftware.com/mbox/"},{"id":124335,"url":"https://patchwork.plctlab.org/api/1.2/patches/124335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com/","msgid":"<9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com>","list_archive_url":null,"date":"2023-07-22T15:53:24","name":"[committed] Fix length computation bug in bfin port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cd24eab-f811-01fd-72f1-36c4c7a7f1ea@gmail.com/mbox/"},{"id":124340,"url":"https://patchwork.plctlab.org/api/1.2/patches/124340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com/","msgid":"<00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-22T16:44:48","name":"Replace lra-spill.cc'\''s return_regno_p with return_reg_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00ef01d9bcbb$d50aeeb0$7f20cc10$@nextmovesoftware.com/mbox/"},{"id":124342,"url":"https://patchwork.plctlab.org/api/1.2/patches/124342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307221710120.28892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-07-22T16:57:30","name":"[committed] testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2307221710120.28892@tpp.orcam.me.uk/mbox/"},{"id":124372,"url":"https://patchwork.plctlab.org/api/1.2/patches/124372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722205302.1611930-1-apinski@marvell.com/","msgid":"<20230722205302.1611930-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-22T20:53:02","name":"Fix alpha building","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722205302.1611930-1-apinski@marvell.com/mbox/"},{"id":124378,"url":"https://patchwork.plctlab.org/api/1.2/patches/124378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722214805.297932-1-vineetg@rivosinc.com/","msgid":"<20230722214805.297932-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-07-22T21:48:05","name":"[Committed] RISC-V: optim const DF +0.0 store to mem [PR/110748]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722214805.297932-1-vineetg@rivosinc.com/mbox/"},{"id":124392,"url":"https://patchwork.plctlab.org/api/1.2/patches/124392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722232649.1617746-1-apinski@marvell.com/","msgid":"<20230722232649.1617746-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-22T23:26:49","name":"Fix 100864: `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230722232649.1617746-1-apinski@marvell.com/mbox/"},{"id":124404,"url":"https://patchwork.plctlab.org/api/1.2/patches/124404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-1-apinski@marvell.com/","msgid":"<20230723010645.1622083-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-23T01:06:44","name":"[1/2] Fix PR 110066: crash with -pg -static on riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-1-apinski@marvell.com/mbox/"},{"id":124403,"url":"https://patchwork.plctlab.org/api/1.2/patches/124403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-2-apinski@marvell.com/","msgid":"<20230723010645.1622083-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-23T01:06:45","name":"[2/2] AARCH64: Turn off unwind tables for crtbeginT.o","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723010645.1622083-2-apinski@marvell.com/mbox/"},{"id":124418,"url":"https://patchwork.plctlab.org/api/1.2/patches/124418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723042333.1956144-1-lehua.ding@rivai.ai/","msgid":"<20230723042333.1956144-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-07-23T04:23:33","name":"[V5] VECT: Support floating-point in-order reduction for length loop control","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723042333.1956144-1-lehua.ding@rivai.ai/mbox/"},{"id":124450,"url":"https://patchwork.plctlab.org/api/1.2/patches/124450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723131120.3626085-1-pan2.li@intel.com/","msgid":"<20230723131120.3626085-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-23T13:11:20","name":"[v5] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723131120.3626085-1-pan2.li@intel.com/mbox/"},{"id":124457,"url":"https://patchwork.plctlab.org/api/1.2/patches/124457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723135421.3723462-1-pan2.li@intel.com/","msgid":"<20230723135421.3723462-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-23T13:54:21","name":"[v1] RISC-V: Bugfix for allowing incorrect dyn for static rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723135421.3723462-1-pan2.li@intel.com/mbox/"},{"id":124553,"url":"https://patchwork.plctlab.org/api/1.2/patches/124553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-2-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:17","name":"[V2,1/5] OpenMP: Add OMP_STRUCTURED_BLOCK and GIMPLE_OMP_STRUCTURED_BLOCK.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-2-sandra@codesourcery.com/mbox/"},{"id":124552,"url":"https://patchwork.plctlab.org/api/1.2/patches/124552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-3-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:18","name":"[V2,2/5] OpenMP: C front end support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-3-sandra@codesourcery.com/mbox/"},{"id":124555,"url":"https://patchwork.plctlab.org/api/1.2/patches/124555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-4-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:19","name":"[V2,3/5] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-4-sandra@codesourcery.com/mbox/"},{"id":124554,"url":"https://patchwork.plctlab.org/api/1.2/patches/124554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-5-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:20","name":"[V2,4/5] OpenMP: New C/C++ testcases for imperfectly nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-5-sandra@codesourcery.com/mbox/"},{"id":124556,"url":"https://patchwork.plctlab.org/api/1.2/patches/124556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-6-sandra@codesourcery.com/","msgid":"<20230723221521.3739463-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-07-23T22:15:21","name":"[V2,5/5] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230723221521.3739463-6-sandra@codesourcery.com/mbox/"},{"id":124580,"url":"https://patchwork.plctlab.org/api/1.2/patches/124580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724024209.3595212-1-pan2.li@intel.com/","msgid":"<20230724024209.3595212-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-24T02:42:09","name":"[v6] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724024209.3595212-1-pan2.li@intel.com/mbox/"},{"id":124590,"url":"https://patchwork.plctlab.org/api/1.2/patches/124590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACJEya+wn7RxPr5t=MYr5Xedh7q4q=CfwiA=qPP7mk4uRq7zNw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T03:28:02","name":"libstdc++: Add missing constexpr specifier and function overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACJEya+wn7RxPr5t=MYr5Xedh7q4q=CfwiA=qPP7mk4uRq7zNw@mail.gmail.com/mbox/"},{"id":124662,"url":"https://patchwork.plctlab.org/api/1.2/patches/124662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075008.5B449138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724075008.5B449138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T07:50:07","name":"tree-optimization/110777 - abnormals and recent PRE optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075008.5B449138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124663,"url":"https://patchwork.plctlab.org/api/1.2/patches/124663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T07:50:21","name":"tree-optimization/110766 - missing PHI location check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724075021.A2D6C138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124714,"url":"https://patchwork.plctlab.org/api/1.2/patches/124714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724090915.27231-1-jose.marchesi@oracle.com/","msgid":"<20230724090915.27231-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T09:09:15","name":"[COMMITTED] bpf: make use of the bswap{16,32,64} V4 BPF instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724090915.27231-1-jose.marchesi@oracle.com/mbox/"},{"id":124745,"url":"https://patchwork.plctlab.org/api/1.2/patches/124745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724095712.14497-1-jose.marchesi@oracle.com/","msgid":"<20230724095712.14497-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T09:57:12","name":"[COMMITTED] bpf: remove -mkernel option and BPF_KERNEL_VERSION_CODE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724095712.14497-1-jose.marchesi@oracle.com/mbox/"},{"id":124773,"url":"https://patchwork.plctlab.org/api/1.2/patches/124773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724102431.94955138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724102431.94955138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T10:24:31","name":"Remove SLP_TREE_VEC_STMTS in favor of SLP_TREE_VEC_DEFS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724102431.94955138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124792,"url":"https://patchwork.plctlab.org/api/1.2/patches/124792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com/","msgid":"<6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com>","list_archive_url":null,"date":"2023-07-24T11:02:29","name":"[Hashtable] Performance optimization through use of insertion hint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6841b337-c7a0-55d7-a513-e655c99df01a@gmail.com/mbox/"},{"id":124876,"url":"https://patchwork.plctlab.org/api/1.2/patches/124876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com/","msgid":"<021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-24T11:37:59","name":"[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com/mbox/"},{"id":124879,"url":"https://patchwork.plctlab.org/api/1.2/patches/124879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724114650.61923-1-juzhe.zhong@rivai.ai/","msgid":"<20230724114650.61923-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-24T11:46:50","name":"VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724114650.61923-1-juzhe.zhong@rivai.ai/mbox/"},{"id":124911,"url":"https://patchwork.plctlab.org/api/1.2/patches/124911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123251.6923E138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724123251.6923E138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T12:32:51","name":"[i386] remove unused tree-vectorizer.h includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123251.6923E138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":124912,"url":"https://patchwork.plctlab.org/api/1.2/patches/124912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123304.1DD21138E8@imap2.suse-dmz.suse.de/","msgid":"<20230724123304.1DD21138E8@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-24T12:33:03","name":"Remove unused tree-vectorizer.h include","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724123304.1DD21138E8@imap2.suse-dmz.suse.de/mbox/"},{"id":125006,"url":"https://patchwork.plctlab.org/api/1.2/patches/125006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d26218f5-6167-97a7-9f4c-0458b6ba8297@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T13:59:27","name":"[committed,RISC-V] Fix minor issues in diagnostic message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d26218f5-6167-97a7-9f4c-0458b6ba8297@gmail.com/mbox/"},{"id":125007,"url":"https://patchwork.plctlab.org/api/1.2/patches/125007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724140143.17350-1-jose.marchesi@oracle.com/","msgid":"<20230724140143.17350-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-24T14:01:43","name":"[COMMITTED] bpf: sdiv/smod are now part of BPF V4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724140143.17350-1-jose.marchesi@oracle.com/mbox/"},{"id":125010,"url":"https://patchwork.plctlab.org/api/1.2/patches/125010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com/","msgid":"<7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com>","list_archive_url":null,"date":"2023-07-24T14:14:37","name":"[committed] Use single quote rather than backquote in RISC-V diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ab38962-3068-cb94-f6b9-4331c7916898@gmail.com/mbox/"},{"id":125049,"url":"https://patchwork.plctlab.org/api/1.2/patches/125049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com/","msgid":"<8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com>","list_archive_url":null,"date":"2023-07-24T14:39:27","name":"[GCC13] PR tree-optimization/110315 - Add auto-resizing capability to irange'\''s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b98831c-23cd-0c27-58f3-62bbcb4b3347@redhat.com/mbox/"},{"id":125077,"url":"https://patchwork.plctlab.org/api/1.2/patches/125077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL6gc8/8THf1gN18@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-24T16:01:55","name":"range-op-float: Fix up -frounding-math frange_arithmetic +- handling [PR110755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL6gc8/8THf1gN18@tucnak/mbox/"},{"id":125169,"url":"https://patchwork.plctlab.org/api/1.2/patches/125169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724190858.8717-1-david.faust@oracle.com/","msgid":"<20230724190858.8717-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-24T19:08:58","name":"[COMMITTED] bpf: add pseudo-c asm dialect for \"nop\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724190858.8717-1-david.faust@oracle.com/mbox/"},{"id":125174,"url":"https://patchwork.plctlab.org/api/1.2/patches/125174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b915c835-71fb-ae37-487e-221a98ac22ec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T19:43:10","name":"OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b915c835-71fb-ae37-487e-221a98ac22ec@codesourcery.com/mbox/"},{"id":125179,"url":"https://patchwork.plctlab.org/api/1.2/patches/125179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200510.83085-1-jwakely@redhat.com/","msgid":"<20230724200510.83085-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-24T20:04:23","name":"[committed] libstdc++; Do not use strtold for hppa-hpux [PR110653]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200510.83085-1-jwakely@redhat.com/mbox/"},{"id":125180,"url":"https://patchwork.plctlab.org/api/1.2/patches/125180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200642.84915-1-jwakely@redhat.com/","msgid":"<20230724200642.84915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-24T20:05:32","name":"libstdc++: Reuse double overload of __convert_to_v if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724200642.84915-1-jwakely@redhat.com/mbox/"},{"id":125187,"url":"https://patchwork.plctlab.org/api/1.2/patches/125187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724203536.40091-1-hjl.tools@gmail.com/","msgid":"<20230724203536.40091-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-07-24T20:35:36","name":"[v3] x86: Properly find the maximum stack slot alignment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724203536.40091-1-hjl.tools@gmail.com/mbox/"},{"id":125211,"url":"https://patchwork.plctlab.org/api/1.2/patches/125211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL79Q71QB3UOT+nE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-24T22:37:55","name":"[v2] c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL79Q71QB3UOT+nE@redhat.com/mbox/"},{"id":125222,"url":"https://patchwork.plctlab.org/api/1.2/patches/125222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724234851.1736326-1-apinski@marvell.com/","msgid":"<20230724234851.1736326-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-24T23:48:51","name":"Fix PR 93044: extra cast is not removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230724234851.1736326-1-apinski@marvell.com/mbox/"},{"id":125262,"url":"https://patchwork.plctlab.org/api/1.2/patches/125262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com/","msgid":"<485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com>","list_archive_url":null,"date":"2023-07-25T02:10:16","name":"[PATCHv2,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/485dc9bf-fb4d-4a63-e9ec-0e58715d16da@linux.ibm.com/mbox/"},{"id":125335,"url":"https://patchwork.plctlab.org/api/1.2/patches/125335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725055156.595718-1-pan2.li@intel.com/","msgid":"<20230725055156.595718-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-25T05:51:56","name":"[v7] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725055156.595718-1-pan2.li@intel.com/mbox/"},{"id":125346,"url":"https://patchwork.plctlab.org/api/1.2/patches/125346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725063910.1568-1-jinma@linux.alibaba.com/","msgid":"<20230725063910.1568-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-25T06:39:10","name":"RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725063910.1568-1-jinma@linux.alibaba.com/mbox/"},{"id":125366,"url":"https://patchwork.plctlab.org/api/1.2/patches/125366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725072816.1629-1-jinma@linux.alibaba.com/","msgid":"<20230725072816.1629-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-25T07:28:16","name":"[v2] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725072816.1629-1-jinma@linux.alibaba.com/mbox/"},{"id":125529,"url":"https://patchwork.plctlab.org/api/1.2/patches/125529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com/","msgid":"<8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com>","list_archive_url":null,"date":"2023-07-25T11:14:03","name":"OpenMP/Fortran: Reject declarations between target + teams (was: [Patch] OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71065])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b5edd17-db3e-d4d7-121e-de8550fa9dbc@codesourcery.com/mbox/"},{"id":125530,"url":"https://patchwork.plctlab.org/api/1.2/patches/125530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com/","msgid":"<004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-25T11:31:45","name":"PR rtl-optimization/110587: Reduce useless moves in compile-time hog.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004c01d9beeb$98c6fcf0$ca54f6d0$@nextmovesoftware.com/mbox/"},{"id":125611,"url":"https://patchwork.plctlab.org/api/1.2/patches/125611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725125832.1399590-1-juzhe.zhong@rivai.ai/","msgid":"<20230725125832.1399590-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-25T12:58:32","name":"internal-fn: Refine macro define of COND_* and COND_LEN_* internal functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725125832.1399590-1-juzhe.zhong@rivai.ai/mbox/"},{"id":125618,"url":"https://patchwork.plctlab.org/api/1.2/patches/125618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725132352.1638772-1-poulhies@adacore.com/","msgid":"<20230725132352.1638772-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-25T13:23:52","name":"[COMMITTED] Adjust one Ada test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725132352.1638772-1-poulhies@adacore.com/mbox/"},{"id":125621,"url":"https://patchwork.plctlab.org/api/1.2/patches/125621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134050.706193856DF4@sourceware.org/","msgid":"<20230725134050.706193856DF4@sourceware.org>","list_archive_url":null,"date":"2023-07-25T13:40:04","name":"rtl-optimization/110587 - remove quadratic regno_in_use_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134050.706193856DF4@sourceware.org/mbox/"},{"id":125622,"url":"https://patchwork.plctlab.org/api/1.2/patches/125622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134122.51229385773F@sourceware.org/","msgid":"<20230725134122.51229385773F@sourceware.org>","list_archive_url":null,"date":"2023-07-25T13:40:33","name":"rtl-optimization/110587 - speedup find_hard_regno_for_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725134122.51229385773F@sourceware.org/mbox/"},{"id":125632,"url":"https://patchwork.plctlab.org/api/1.2/patches/125632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725140335.1739803-1-juzhe.zhong@rivai.ai/","msgid":"<20230725140335.1739803-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-25T14:03:35","name":"RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725140335.1739803-1-juzhe.zhong@rivai.ai/mbox/"},{"id":125712,"url":"https://patchwork.plctlab.org/api/1.2/patches/125712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com/","msgid":"<5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com>","list_archive_url":null,"date":"2023-07-25T15:52:06","name":"[OpenACC,2.7] Connect readonly modifier to points-to analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5196826c-e81a-ab5c-63e9-bd8509232da0@siemens.com/mbox/"},{"id":125725,"url":"https://patchwork.plctlab.org/api/1.2/patches/125725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL//joAT7GOtzusI@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-25T16:59:58","name":"[v3] c++: fix ICE with constexpr ARRAY_REF [PR110382]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZL//joAT7GOtzusI@redhat.com/mbox/"},{"id":125746,"url":"https://patchwork.plctlab.org/api/1.2/patches/125746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-2-patrick@rivosinc.com/","msgid":"<20230725180206.284777-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:55","name":"[gcc13,backport,01/12] RISC-V: Eliminate SYNC memory models","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-2-patrick@rivosinc.com/mbox/"},{"id":125749,"url":"https://patchwork.plctlab.org/api/1.2/patches/125749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-3-patrick@rivosinc.com/","msgid":"<20230725180206.284777-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:56","name":"[gcc13,backport,02/12] RISC-V: Enforce Libatomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-3-patrick@rivosinc.com/mbox/"},{"id":125747,"url":"https://patchwork.plctlab.org/api/1.2/patches/125747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-4-patrick@rivosinc.com/","msgid":"<20230725180206.284777-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:57","name":"[gcc13,backport,03/12] RISC-V: Enforce subword atomic LR/SC SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-4-patrick@rivosinc.com/mbox/"},{"id":125748,"url":"https://patchwork.plctlab.org/api/1.2/patches/125748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-5-patrick@rivosinc.com/","msgid":"<20230725180206.284777-5-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:58","name":"[gcc13,backport,04/12] RISC-V: Enforce atomic compare_exchange SEQ_CST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-5-patrick@rivosinc.com/mbox/"},{"id":125753,"url":"https://patchwork.plctlab.org/api/1.2/patches/125753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-6-patrick@rivosinc.com/","msgid":"<20230725180206.284777-6-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:01:59","name":"[gcc13,backport,05/12] RISC-V: Add AMO release bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-6-patrick@rivosinc.com/mbox/"},{"id":125750,"url":"https://patchwork.plctlab.org/api/1.2/patches/125750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-7-patrick@rivosinc.com/","msgid":"<20230725180206.284777-7-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:00","name":"[gcc13,backport,06/12] RISC-V: Strengthen atomic stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-7-patrick@rivosinc.com/mbox/"},{"id":125754,"url":"https://patchwork.plctlab.org/api/1.2/patches/125754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-8-patrick@rivosinc.com/","msgid":"<20230725180206.284777-8-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:01","name":"[gcc13,backport,07/12] RISC-V: Eliminate AMO op fences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-8-patrick@rivosinc.com/mbox/"},{"id":125752,"url":"https://patchwork.plctlab.org/api/1.2/patches/125752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-9-patrick@rivosinc.com/","msgid":"<20230725180206.284777-9-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:02","name":"[gcc13,backport,08/12] RISC-V: Weaken LR/SC pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-9-patrick@rivosinc.com/mbox/"},{"id":125751,"url":"https://patchwork.plctlab.org/api/1.2/patches/125751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-10-patrick@rivosinc.com/","msgid":"<20230725180206.284777-10-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:03","name":"[gcc13,backport,09/12] RISC-V: Weaken mem_thread_fence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-10-patrick@rivosinc.com/mbox/"},{"id":125756,"url":"https://patchwork.plctlab.org/api/1.2/patches/125756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-11-patrick@rivosinc.com/","msgid":"<20230725180206.284777-11-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:04","name":"[gcc13,backport,10/12] RISC-V: Weaken atomic loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-11-patrick@rivosinc.com/mbox/"},{"id":125755,"url":"https://patchwork.plctlab.org/api/1.2/patches/125755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-12-patrick@rivosinc.com/","msgid":"<20230725180206.284777-12-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:05","name":"[gcc13,backport,11/12] RISC-V: Table A.6 conformance tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-12-patrick@rivosinc.com/mbox/"},{"id":125757,"url":"https://patchwork.plctlab.org/api/1.2/patches/125757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-13-patrick@rivosinc.com/","msgid":"<20230725180206.284777-13-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-25T18:02:06","name":"[gcc13,backport,12/12] riscv: fix error: control reaches end of non-void function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725180206.284777-13-patrick@rivosinc.com/mbox/"},{"id":125759,"url":"https://patchwork.plctlab.org/api/1.2/patches/125759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725181118.27484-1-simonaytes.yan@ispras.ru/","msgid":"<20230725181118.27484-1-simonaytes.yan@ispras.ru>","list_archive_url":null,"date":"2023-07-25T18:11:18","name":"Replace invariant ternlog operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725181118.27484-1-simonaytes.yan@ispras.ru/mbox/"},{"id":125772,"url":"https://patchwork.plctlab.org/api/1.2/patches/125772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-1-aldyh@redhat.com/","msgid":"<20230725190739.37779-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:07:29","name":"[COMMITTED] Make some functions in CCP static.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-1-aldyh@redhat.com/mbox/"},{"id":125773,"url":"https://patchwork.plctlab.org/api/1.2/patches/125773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-3-aldyh@redhat.com/","msgid":"<20230725190739.37779-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:07:31","name":"Initialize value in bit_value_unop.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725190739.37779-3-aldyh@redhat.com/mbox/"},{"id":125775,"url":"https://patchwork.plctlab.org/api/1.2/patches/125775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-07-25T19:24:23","name":"List myself as \"nvptx port\" maintainer (was: Thomas Schwinge appointed co-maintainer of the nvptx backend)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs5bvlp4.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":125787,"url":"https://patchwork.plctlab.org/api/1.2/patches/125787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725195552.1249139-1-polacek@redhat.com/","msgid":"<20230725195552.1249139-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-25T19:55:52","name":"c++: clear tf_partial et al in instantiate_template [PR108960]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725195552.1249139-1-polacek@redhat.com/mbox/"},{"id":125819,"url":"https://patchwork.plctlab.org/api/1.2/patches/125819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com/","msgid":"<3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com>","list_archive_url":null,"date":"2023-07-25T21:45:54","name":"OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3bd8a5c7-3256-0e63-b7c4-1e969f6bba86@codesourcery.com/mbox/"},{"id":125828,"url":"https://patchwork.plctlab.org/api/1.2/patches/125828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725215534.1791062-1-apinski@marvell.com/","msgid":"<20230725215534.1791062-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-25T21:55:34","name":"[COMMITTED] Fix 110803: use of plain char instead of signed char","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725215534.1791062-1-apinski@marvell.com/mbox/"},{"id":125839,"url":"https://patchwork.plctlab.org/api/1.2/patches/125839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-1-david.faust@oracle.com/","msgid":"<20230725220821.11431-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:08:20","name":"[1/2] bpf: don'\''t print () in bpf_print_operand_address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-1-david.faust@oracle.com/mbox/"},{"id":125840,"url":"https://patchwork.plctlab.org/api/1.2/patches/125840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-2-david.faust@oracle.com/","msgid":"<20230725220821.11431-2-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:08:21","name":"[2/2] bpf: add v3 atomic instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725220821.11431-2-david.faust@oracle.com/mbox/"},{"id":125901,"url":"https://patchwork.plctlab.org/api/1.2/patches/125901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224308.12304-1-david.faust@oracle.com/","msgid":"<20230725224308.12304-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:43:08","name":"[v2,2/2] bpf: add v3 atomic instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224308.12304-1-david.faust@oracle.com/mbox/"},{"id":125906,"url":"https://patchwork.plctlab.org/api/1.2/patches/125906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224920.12392-1-david.faust@oracle.com/","msgid":"<20230725224920.12392-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-25T22:49:20","name":"[COMMITTED,v2,1/2] bpf: don'\''t print () in bpf_print_operand_address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230725224920.12392-1-david.faust@oracle.com/mbox/"},{"id":126030,"url":"https://patchwork.plctlab.org/api/1.2/patches/126030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726014423.2747726-1-jason@redhat.com/","msgid":"<20230726014423.2747726-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-26T01:44:23","name":"[pushed] testsuite: run C++11 tests in C++11 mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726014423.2747726-1-jason@redhat.com/mbox/"},{"id":126037,"url":"https://patchwork.plctlab.org/api/1.2/patches/126037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726021712.352-1-jinma@linux.alibaba.com/","msgid":"<20230726021712.352-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-26T02:17:12","name":"[v3] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726021712.352-1-jinma@linux.alibaba.com/mbox/"},{"id":126039,"url":"https://patchwork.plctlab.org/api/1.2/patches/126039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com/","msgid":"<7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com>","list_archive_url":null,"date":"2023-07-26T02:52:50","name":"vect: Treat VMAT_ELEMENTWISE as scalar load in costing [PR110776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7dacafa4-d2e8-c471-f251-406a60f291ed@linux.ibm.com/mbox/"},{"id":126040,"url":"https://patchwork.plctlab.org/api/1.2/patches/126040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b35db8fe-8397-607c-3e2d-035fe49380d2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T02:53:11","name":"rs6000: Correct vsx operands output for xxeval [PR110741]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b35db8fe-8397-607c-3e2d-035fe49380d2@linux.ibm.com/mbox/"},{"id":126051,"url":"https://patchwork.plctlab.org/api/1.2/patches/126051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726040429.30868-1-xuli1@eswincomputing.com/","msgid":"<20230726040429.30868-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T04:04:29","name":"RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726040429.30868-1-xuli1@eswincomputing.com/mbox/"},{"id":126114,"url":"https://patchwork.plctlab.org/api/1.2/patches/126114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726054104.403-1-jinma@linux.alibaba.com/","msgid":"<20230726054104.403-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-07-26T05:41:04","name":"[v4] RISC-V: Fixbug for fsflags instruction error using immediate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726054104.403-1-jinma@linux.alibaba.com/mbox/"},{"id":126135,"url":"https://patchwork.plctlab.org/api/1.2/patches/126135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMDEwXtgcXt8s3kE@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-26T07:01:21","name":"Fix profile_count::to_sreal_scale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMDEwXtgcXt8s3kE@kam.mff.cuni.cz/mbox/"},{"id":126164,"url":"https://patchwork.plctlab.org/api/1.2/patches/126164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sP4X5xFOS0295td32=BBvbtbbN2=h+G7SEJkeQ8hWrUKw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T07:54:53","name":"RISC-V: Replace unspec with bitreverse in riscv_brev8_ insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sP4X5xFOS0295td32=BBvbtbbN2=h+G7SEJkeQ8hWrUKw@mail.gmail.com/mbox/"},{"id":126166,"url":"https://patchwork.plctlab.org/api/1.2/patches/126166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726080008.14544-1-xuli1@eswincomputing.com/","msgid":"<20230726080008.14544-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T08:00:08","name":"[v2] RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726080008.14544-1-xuli1@eswincomputing.com/mbox/"},{"id":126171,"url":"https://patchwork.plctlab.org/api/1.2/patches/126171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726081836.16660-1-xuli1@eswincomputing.com/","msgid":"<20230726081836.16660-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-26T08:18:36","name":"RISC-V: Fix vector tuple intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726081836.16660-1-xuli1@eswincomputing.com/mbox/"},{"id":126182,"url":"https://patchwork.plctlab.org/api/1.2/patches/126182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-1-aldyh@redhat.com/","msgid":"<20230726084224.43416-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:15","name":"[COMMITTED,range-ops] Handle bitmasks for unary operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-1-aldyh@redhat.com/mbox/"},{"id":126183,"url":"https://patchwork.plctlab.org/api/1.2/patches/126183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-2-aldyh@redhat.com/","msgid":"<20230726084224.43416-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:16","name":"[COMMITTED,range-ops] Handle bitmasks for BIT_NOT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-2-aldyh@redhat.com/mbox/"},{"id":126184,"url":"https://patchwork.plctlab.org/api/1.2/patches/126184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-3-aldyh@redhat.com/","msgid":"<20230726084224.43416-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:17","name":"[COMMITTED,range-ops] Handle bitmasks for ABS_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-3-aldyh@redhat.com/mbox/"},{"id":126185,"url":"https://patchwork.plctlab.org/api/1.2/patches/126185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-4-aldyh@redhat.com/","msgid":"<20230726084224.43416-4-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T08:42:18","name":"[COMMITTED,range-ops] Handle bitmasks for ABSU_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726084224.43416-4-aldyh@redhat.com/mbox/"},{"id":126234,"url":"https://patchwork.plctlab.org/api/1.2/patches/126234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726094219.D4A98385AF89@sourceware.org/","msgid":"<20230726094219.D4A98385AF89@sourceware.org>","list_archive_url":null,"date":"2023-07-26T09:41:34","name":"tree-optimization/110799 - fix bug in code hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726094219.D4A98385AF89@sourceware.org/mbox/"},{"id":126243,"url":"https://patchwork.plctlab.org/api/1.2/patches/126243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com/","msgid":"<30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com>","list_archive_url":null,"date":"2023-07-26T09:57:25","name":"[committed] libgomp.texi: Add status item, @ref and document omp_in_explicit_task","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/30b8d6f8-00c6-1ac9-1ab7-a8692f383e74@codesourcery.com/mbox/"},{"id":126245,"url":"https://patchwork.plctlab.org/api/1.2/patches/126245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726101045.13125-1-jose.marchesi@oracle.com/","msgid":"<20230726101045.13125-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-26T10:10:45","name":"[COMMITTED] bpf: fix generation of neg and neg32 BPF instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726101045.13125-1-jose.marchesi@oracle.com/mbox/"},{"id":126247,"url":"https://patchwork.plctlab.org/api/1.2/patches/126247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bT=yF69w62M5ZsFmaoENaLw=-NdyPtXSSmfN4miw1cbQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T10:21:51","name":"[committed] i386: Clear upper half of XMM register for V2SFmode operations [PR110762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bT=yF69w62M5ZsFmaoENaLw=-NdyPtXSSmfN4miw1cbQ@mail.gmail.com/mbox/"},{"id":126272,"url":"https://patchwork.plctlab.org/api/1.2/patches/126272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726113557.97035-1-aldyh@redhat.com/","msgid":"<20230726113557.97035-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-07-26T11:35:54","name":"[COMMITTED,range-ops] Remove special case for handling bitmasks in casts.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726113557.97035-1-aldyh@redhat.com/mbox/"},{"id":126275,"url":"https://patchwork.plctlab.org/api/1.2/patches/126275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com/","msgid":"<04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-26T11:40:57","name":"PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04e101d9bfb6$0dacecd0$2906c670$@nextmovesoftware.com/mbox/"},{"id":126358,"url":"https://patchwork.plctlab.org/api/1.2/patches/126358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726132834.D12B5385C8B0@sourceware.org/","msgid":"<20230726132834.D12B5385C8B0@sourceware.org>","list_archive_url":null,"date":"2023-07-26T13:27:33","name":"tree-optimization/106081 - elide redundant permute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726132834.D12B5385C8B0@sourceware.org/mbox/"},{"id":126402,"url":"https://patchwork.plctlab.org/api/1.2/patches/126402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Zuc1F9BmG25Uh4i_XMMzG4XdOo8L4zbN=5V6oeBPjffQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T14:11:01","name":"[committed] testsuite: Fix gfortran.dg/ieee/comparisons_3.F90 testsuite failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Zuc1F9BmG25Uh4i_XMMzG4XdOo8L4zbN=5V6oeBPjffQ@mail.gmail.com/mbox/"},{"id":126412,"url":"https://patchwork.plctlab.org/api/1.2/patches/126412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726143332.749363-1-dmalcolm@redhat.com/","msgid":"<20230726143332.749363-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-07-26T14:33:32","name":"[pushed] analyzer: add symbol base class, moving region id to there [PR104940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726143332.749363-1-dmalcolm@redhat.com/mbox/"},{"id":126422,"url":"https://patchwork.plctlab.org/api/1.2/patches/126422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21466af-ae65-2e1b-49c2-ababe6047be3@arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T14:44:16","name":"aarch64: enable mixed-types for aarch64 simdclones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f21466af-ae65-2e1b-49c2-ababe6047be3@arm.com/mbox/"},{"id":126475,"url":"https://patchwork.plctlab.org/api/1.2/patches/126475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6e25a36-e2e8-4787-86bc-885faa1f0acc@AZ-NEU-EX03.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T15:58:54","name":"[committed] Add check_vect in a testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6e25a36-e2e8-4787-86bc-885faa1f0acc@AZ-NEU-EX03.Arm.com/mbox/"},{"id":126480,"url":"https://patchwork.plctlab.org/api/1.2/patches/126480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160320.220196-1-jwakely@redhat.com/","msgid":"<20230726160320.220196-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:02:53","name":"[committed] libstdc++: Add deprecated attribute to std::random_shuffle declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160320.220196-1-jwakely@redhat.com/mbox/"},{"id":126481,"url":"https://patchwork.plctlab.org/api/1.2/patches/126481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160344.220228-1-jwakely@redhat.com/","msgid":"<20230726160344.220228-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:03:21","name":"[committed] libstdc++: Avoid bogus overflow warnings in std::vector [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726160344.220228-1-jwakely@redhat.com/mbox/"},{"id":126483,"url":"https://patchwork.plctlab.org/api/1.2/patches/126483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc6f18335ec6dd5d87e06e3b77fee1e55b36529f.camel@gwdg.de/","msgid":"","list_archive_url":null,"date":"2023-07-26T16:06:49","name":"[C] Synthesize nonnull attribute for parameters declared with static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc6f18335ec6dd5d87e06e3b77fee1e55b36529f.camel@gwdg.de/mbox/"},{"id":126492,"url":"https://patchwork.plctlab.org/api/1.2/patches/126492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726163145.2905222-1-jason@redhat.com/","msgid":"<20230726163145.2905222-1-jason@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:31:45","name":"[pushed] c++: member vs global template [PR106310]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726163145.2905222-1-jason@redhat.com/mbox/"},{"id":126499,"url":"https://patchwork.plctlab.org/api/1.2/patches/126499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165735.2058945-1-ppalka@redhat.com/","msgid":"<20230726165735.2058945-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:57:34","name":"c++: constexpr empty subobject confusion [PR110197]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165735.2058945-1-ppalka@redhat.com/mbox/"},{"id":126498,"url":"https://patchwork.plctlab.org/api/1.2/patches/126498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165750.2062127-1-ppalka@redhat.com/","msgid":"<20230726165750.2062127-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-07-26T16:57:50","name":"c++: unifying REAL_CSTs [PR110809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726165750.2062127-1-ppalka@redhat.com/mbox/"},{"id":126508,"url":"https://patchwork.plctlab.org/api/1.2/patches/126508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMn5RHmbpYEZ=PZTJJ2552+sW0sAgh55+d+kNrDW9VfdvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-26T17:33:10","name":"[gcc-13] Backport PR10280 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMn5RHmbpYEZ=PZTJJ2552+sW0sAgh55+d+kNrDW9VfdvQ@mail.gmail.com/mbox/"},{"id":126520,"url":"https://patchwork.plctlab.org/api/1.2/patches/126520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726181204.229512-1-jwakely@redhat.com/","msgid":"<20230726181204.229512-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-26T18:11:47","name":"[committed] libstdc++: Require C++11 for 23_containers/vector/bool/110807.cc [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230726181204.229512-1-jwakely@redhat.com/mbox/"},{"id":126533,"url":"https://patchwork.plctlab.org/api/1.2/patches/126533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6616a0f7-d3f9-44be-9894-f2ec511ebd7c-1690398620691@3c-app-gmx-bap18/","msgid":"","list_archive_url":null,"date":"2023-07-26T19:10:20","name":"Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6616a0f7-d3f9-44be-9894-f2ec511ebd7c-1690398620691@3c-app-gmx-bap18/mbox/"},{"id":126534,"url":"https://patchwork.plctlab.org/api/1.2/patches/126534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cad2d682-af6b-77be-daf2-fff2daf78faf@gmx.de/","msgid":"","list_archive_url":null,"date":"2023-07-26T19:17:58","name":"[v2] Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cad2d682-af6b-77be-daf2-fff2daf78faf@gmx.de/mbox/"},{"id":126542,"url":"https://patchwork.plctlab.org/api/1.2/patches/126542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de/","msgid":"<6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de>","list_archive_url":null,"date":"2023-07-26T19:33:22","name":"[v3] Fortran: diagnose strings of non-constant length in DATA statements [PR68569]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e5a6a56-776a-1994-ffd3-f57e9d40ee20@gmx.de/mbox/"},{"id":126584,"url":"https://patchwork.plctlab.org/api/1.2/patches/126584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com/","msgid":"<05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com>","list_archive_url":null,"date":"2023-07-27T01:28:49","name":"[committed,RISC-V] Fix expected diagnostic messages in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05f66f09-3e40-a3f3-6d7d-f3ea9073b34f@ventanamicro.com/mbox/"},{"id":126611,"url":"https://patchwork.plctlab.org/api/1.2/patches/126611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727031940.162951-1-juzhe.zhong@rivai.ai/","msgid":"<20230727031940.162951-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T03:19:40","name":"[V2] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727031940.162951-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126822,"url":"https://patchwork.plctlab.org/api/1.2/patches/126822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727090640.65258-1-juzhe.zhong@rivai.ai/","msgid":"<20230727090640.65258-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T09:06:40","name":"[V3] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727090640.65258-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126878,"url":"https://patchwork.plctlab.org/api/1.2/patches/126878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727093438.31E2D38881C7@sourceware.org/","msgid":"<20230727093438.31E2D38881C7@sourceware.org>","list_archive_url":null,"date":"2023-07-27T09:31:49","name":"Remove recursive post-dominator traversal in sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727093438.31E2D38881C7@sourceware.org/mbox/"},{"id":126883,"url":"https://patchwork.plctlab.org/api/1.2/patches/126883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727094859.3884298-1-demin.han@starfivetech.com/","msgid":"<20230727094859.3884298-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-07-27T09:48:59","name":"RISC-V: Fix uninitialized and redundant use of which_alternative","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727094859.3884298-1-demin.han@starfivetech.com/mbox/"},{"id":126889,"url":"https://patchwork.plctlab.org/api/1.2/patches/126889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727103715.6CD7E3854803@sourceware.org/","msgid":"<20230727103715.6CD7E3854803@sourceware.org>","list_archive_url":null,"date":"2023-07-27T10:36:30","name":"XFAIL parts broken deliberately by r13-1762-gf9d4c3b45c5ed5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727103715.6CD7E3854803@sourceware.org/mbox/"},{"id":126895,"url":"https://patchwork.plctlab.org/api/1.2/patches/126895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727104353.3890397-1-pan2.li@intel.com/","msgid":"<20230727104353.3890397-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-27T10:43:53","name":"[v1] RISC-V: Remove unnecessary vread_csr/vwrite_csr intrinsic.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727104353.3890397-1-pan2.li@intel.com/mbox/"},{"id":126925,"url":"https://patchwork.plctlab.org/api/1.2/patches/126925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727114702.219531-1-juzhe.zhong@rivai.ai/","msgid":"<20230727114702.219531-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-27T11:47:02","name":"[V4] RISC-V: Enable basic VLS modes support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727114702.219531-1-juzhe.zhong@rivai.ai/mbox/"},{"id":126934,"url":"https://patchwork.plctlab.org/api/1.2/patches/126934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727120151.C9B03385B524@sourceware.org/","msgid":"<20230727120151.C9B03385B524@sourceware.org>","list_archive_url":null,"date":"2023-07-27T12:00:56","name":"tree-optimization/91838 - fix FAIL of g++.dg/opt/pr91838.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727120151.C9B03385B524@sourceware.org/mbox/"},{"id":126973,"url":"https://patchwork.plctlab.org/api/1.2/patches/126973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727133639.2208533-1-hongtao.liu@intel.com/","msgid":"<20230727133639.2208533-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-07-27T13:36:39","name":"[x86] Add UNSPEC_MASKOP to vpbroadcastm pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727133639.2208533-1-hongtao.liu@intel.com/mbox/"},{"id":126987,"url":"https://patchwork.plctlab.org/api/1.2/patches/126987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9Df2xIWL6wD35@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:19:57","name":"Fix profile_count::apply_probability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9Df2xIWL6wD35@kam.mff.cuni.cz/mbox/"},{"id":126988,"url":"https://patchwork.plctlab.org/api/1.2/patches/126988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9PZiYSPTP8YP0@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:20:45","name":"Fix profile update in tree-ssa-loop-im.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9PZiYSPTP8YP0@kam.mff.cuni.cz/mbox/"},{"id":126989,"url":"https://patchwork.plctlab.org/api/1.2/patches/126989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9eeM5DRrlLsTv@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T14:21:45","name":"Fix profile update in tree_transform_and_unroll_loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMJ9eeM5DRrlLsTv@kam.mff.cuni.cz/mbox/"},{"id":127002,"url":"https://patchwork.plctlab.org/api/1.2/patches/127002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727150345.303590-1-jwakely@redhat.com/","msgid":"<20230727150345.303590-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-07-27T15:03:11","name":"[committed] libstdc++: Fix std::format alternate form for floating-point [PR108046]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727150345.303590-1-jwakely@redhat.com/mbox/"},{"id":127054,"url":"https://patchwork.plctlab.org/api/1.2/patches/127054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com/","msgid":"<447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com>","list_archive_url":null,"date":"2023-07-27T16:36:49","name":"[committed] OpenMP/Fortran: Extend reject code between target + teams [PR71065, PR110725] (was: Re: [patch] OpenMP/Fortran: Reject declarations between target + teams (was: [Patch] OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447c2f24-912a-cfa7-5256-f5f560ed15f7@codesourcery.com/mbox/"},{"id":127071,"url":"https://patchwork.plctlab.org/api/1.2/patches/127071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlYWhZSKuUv3gX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:12:01","name":"[1/5] Middle-end _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlYWhZSKuUv3gX@tucnak/mbox/"},{"id":127073,"url":"https://patchwork.plctlab.org/api/1.2/patches/127073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlqT3aSPeqEHUB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:13:13","name":"[2/5] libgcc _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKlqT3aSPeqEHUB@tucnak/mbox/"},{"id":127072,"url":"https://patchwork.plctlab.org/api/1.2/patches/127072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKl72EbjP0gPNM7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:14:23","name":"[3/5] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKl72EbjP0gPNM7@tucnak/mbox/"},{"id":127074,"url":"https://patchwork.plctlab.org/api/1.2/patches/127074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmMICooUqjISC2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:15:28","name":"[4/5] testsuite part 1 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmMICooUqjISC2@tucnak/mbox/"},{"id":127076,"url":"https://patchwork.plctlab.org/api/1.2/patches/127076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmdrWbE6owq+KJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-27T17:16:38","name":"[5/5] testsuite part 2 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMKmdrWbE6owq+KJ@tucnak/mbox/"},{"id":127101,"url":"https://patchwork.plctlab.org/api/1.2/patches/127101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727181105.15595-1-david.faust@oracle.com/","msgid":"<20230727181105.15595-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T18:11:05","name":"bpf: correct pseudo-C template for add3 and sub3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727181105.15595-1-david.faust@oracle.com/mbox/"},{"id":127107,"url":"https://patchwork.plctlab.org/api/1.2/patches/127107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK34wjgBF4MnGD7@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T18:30:59","name":"Fix profile update after RTL unrolling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK34wjgBF4MnGD7@kam.mff.cuni.cz/mbox/"},{"id":127108,"url":"https://patchwork.plctlab.org/api/1.2/patches/127108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK4ac7zl/oNVi0H@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-27T18:33:13","name":"Make store likely in optimize_mask_stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMK4ac7zl/oNVi0H@kam.mff.cuni.cz/mbox/"},{"id":127129,"url":"https://patchwork.plctlab.org/api/1.2/patches/127129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-106acade-c06b-4bdf-8173-a189f07212dd-1690486793645@3c-app-gmx-bs10/","msgid":"","list_archive_url":null,"date":"2023-07-27T19:39:53","name":"Fortran: do not pass hidden character length for TYPE(*) dummy [PR110825]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-106acade-c06b-4bdf-8173-a189f07212dd-1690486793645@3c-app-gmx-bs10/mbox/"},{"id":127194,"url":"https://patchwork.plctlab.org/api/1.2/patches/127194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214120.18783-1-david.faust@oracle.com/","msgid":"<20230727214120.18783-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T21:41:20","name":"bpf: minor doc cleanup for command-line options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214120.18783-1-david.faust@oracle.com/mbox/"},{"id":127195,"url":"https://patchwork.plctlab.org/api/1.2/patches/127195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214324.18871-1-david.faust@oracle.com/","msgid":"<20230727214324.18871-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-07-27T21:43:24","name":"bpf: ISA V4 sign-extending move and load insns [PR110782, PR110784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727214324.18871-1-david.faust@oracle.com/mbox/"},{"id":127235,"url":"https://patchwork.plctlab.org/api/1.2/patches/127235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727225914.918081-1-lhyatt@gmail.com/","msgid":"<20230727225914.918081-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-07-27T22:59:14","name":"[v2] c-family: Implement pragma_lex () for preprocess-only mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230727225914.918081-1-lhyatt@gmail.com/mbox/"},{"id":127272,"url":"https://patchwork.plctlab.org/api/1.2/patches/127272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728011521.3280522-1-pan2.li@intel.com/","msgid":"<20230728011521.3280522-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-28T01:15:21","name":"[v8] RISC-V: Support CALL for RVV floating-point dynamic rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728011521.3280522-1-pan2.li@intel.com/mbox/"},{"id":127306,"url":"https://patchwork.plctlab.org/api/1.2/patches/127306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-1-kmatsui@gcc.gnu.org/","msgid":"<20230728035737.50181-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-28T03:57:35","name":"[v3,1/2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-1-kmatsui@gcc.gnu.org/mbox/"},{"id":127307,"url":"https://patchwork.plctlab.org/api/1.2/patches/127307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-2-kmatsui@gcc.gnu.org/","msgid":"<20230728035737.50181-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-07-28T03:57:36","name":"[v3,2/2] libstdc++: Use _GLIBCXX_HAS_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728035737.50181-2-kmatsui@gcc.gnu.org/mbox/"},{"id":127340,"url":"https://patchwork.plctlab.org/api/1.2/patches/127340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728055222.2382-1-xuli1@eswincomputing.com/","msgid":"<20230728055222.2382-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-28T05:52:22","name":"RISC-V: Remove vxrm parameter for vsadd[u] and vssub[u]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728055222.2382-1-xuli1@eswincomputing.com/mbox/"},{"id":127350,"url":"https://patchwork.plctlab.org/api/1.2/patches/127350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMNiIpP4cwLGlRSN@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T06:37:22","name":"loop-split improvements, part 1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMNiIpP4cwLGlRSN@kam.mff.cuni.cz/mbox/"},{"id":127357,"url":"https://patchwork.plctlab.org/api/1.2/patches/127357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728070552.50C1413276@imap2.suse-dmz.suse.de/","msgid":"<20230728070552.50C1413276@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-07-28T07:05:51","name":"[RFC] tree-optimization/92335 - Improve sinking heuristics for vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728070552.50C1413276@imap2.suse-dmz.suse.de/mbox/"},{"id":127362,"url":"https://patchwork.plctlab.org/api/1.2/patches/127362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728071039.107552-1-juzhe.zhong@rivai.ai/","msgid":"<20230728071039.107552-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-28T07:10:39","name":"[V2] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728071039.107552-1-juzhe.zhong@rivai.ai/mbox/"},{"id":127370,"url":"https://patchwork.plctlab.org/api/1.2/patches/127370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728072010.108620-1-juzhe.zhong@rivai.ai/","msgid":"<20230728072010.108620-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-28T07:20:10","name":"RISC-V: Support CALL conditional autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728072010.108620-1-juzhe.zhong@rivai.ai/mbox/"},{"id":127375,"url":"https://patchwork.plctlab.org/api/1.2/patches/127375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073032.1852060-1-poulhies@adacore.com/","msgid":"<20230728073032.1852060-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:32","name":"[COMMITTED] ada: Improve defense against illegal code in check for infinite loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073032.1852060-1-poulhies@adacore.com/mbox/"},{"id":127376,"url":"https://patchwork.plctlab.org/api/1.2/patches/127376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073042.1852207-1-poulhies@adacore.com/","msgid":"<20230728073042.1852207-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:42","name":"[COMMITTED] ada: Allow calls to Number_Formals when no formals are present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073042.1852207-1-poulhies@adacore.com/mbox/"},{"id":127381,"url":"https://patchwork.plctlab.org/api/1.2/patches/127381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073044.1852306-1-poulhies@adacore.com/","msgid":"<20230728073044.1852306-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:44","name":"[COMMITTED] ada: Fix typo in comment of Ada.Exceptions.Save_Occurrence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073044.1852306-1-poulhies@adacore.com/mbox/"},{"id":127385,"url":"https://patchwork.plctlab.org/api/1.2/patches/127385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073047.1852369-1-poulhies@adacore.com/","msgid":"<20230728073047.1852369-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:47","name":"[COMMITTED] ada: Emit enums rather than defines for various constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073047.1852369-1-poulhies@adacore.com/mbox/"},{"id":127387,"url":"https://patchwork.plctlab.org/api/1.2/patches/127387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073050.1852470-1-poulhies@adacore.com/","msgid":"<20230728073050.1852470-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:50","name":"[COMMITTED] ada: Leave detection of missing return in functions to GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073050.1852470-1-poulhies@adacore.com/mbox/"},{"id":127389,"url":"https://patchwork.plctlab.org/api/1.2/patches/127389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073052.1852535-1-poulhies@adacore.com/","msgid":"<20230728073052.1852535-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:52","name":"[COMMITTED] ada: Fix memory explosion on aggregate of nested packed array type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073052.1852535-1-poulhies@adacore.com/mbox/"},{"id":127378,"url":"https://patchwork.plctlab.org/api/1.2/patches/127378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073054.1852596-1-poulhies@adacore.com/","msgid":"<20230728073054.1852596-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:54","name":"[COMMITTED] ada: Add guard for detection of class-wide precondition subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073054.1852596-1-poulhies@adacore.com/mbox/"},{"id":127377,"url":"https://patchwork.plctlab.org/api/1.2/patches/127377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073056.1852677-1-poulhies@adacore.com/","msgid":"<20230728073056.1852677-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:56","name":"[COMMITTED] ada: Small refactor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073056.1852677-1-poulhies@adacore.com/mbox/"},{"id":127383,"url":"https://patchwork.plctlab.org/api/1.2/patches/127383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073058.1852740-1-poulhies@adacore.com/","msgid":"<20230728073058.1852740-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:30:58","name":"[COMMITTED] ada: Fix race condition in protected entry call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073058.1852740-1-poulhies@adacore.com/mbox/"},{"id":127382,"url":"https://patchwork.plctlab.org/api/1.2/patches/127382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073100.1852802-1-poulhies@adacore.com/","msgid":"<20230728073100.1852802-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:00","name":"[COMMITTED] ada: Add missing SCO generation for quantified expressions in object decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073100.1852802-1-poulhies@adacore.com/mbox/"},{"id":127390,"url":"https://patchwork.plctlab.org/api/1.2/patches/127390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073102.1852865-1-poulhies@adacore.com/","msgid":"<20230728073102.1852865-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:02","name":"[COMMITTED] ada: Add support for binding to a specific network interface controller.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073102.1852865-1-poulhies@adacore.com/mbox/"},{"id":127388,"url":"https://patchwork.plctlab.org/api/1.2/patches/127388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073105.1852928-1-poulhies@adacore.com/","msgid":"<20230728073105.1852928-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:05","name":"[COMMITTED] ada: Fix unsupported dispatching constructor call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073105.1852928-1-poulhies@adacore.com/mbox/"},{"id":127386,"url":"https://patchwork.plctlab.org/api/1.2/patches/127386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073107.1852989-1-poulhies@adacore.com/","msgid":"<20230728073107.1852989-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:07","name":"[COMMITTED] ada: Add an assert in Posix Interrupt_Wait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073107.1852989-1-poulhies@adacore.com/mbox/"},{"id":127380,"url":"https://patchwork.plctlab.org/api/1.2/patches/127380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073109.1853050-1-poulhies@adacore.com/","msgid":"<20230728073109.1853050-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-07-28T07:31:09","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728073109.1853050-1-poulhies@adacore.com/mbox/"},{"id":127394,"url":"https://patchwork.plctlab.org/api/1.2/patches/127394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMN1DOizIGX8AdGF@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T07:58:04","name":"Loop-split improvements, part 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMN1DOizIGX8AdGF@kam.mff.cuni.cz/mbox/"},{"id":127508,"url":"https://patchwork.plctlab.org/api/1.2/patches/127508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com/","msgid":"<805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com>","list_archive_url":null,"date":"2023-07-28T10:17:00","name":"gcse: Extract reg pressure handling into separate file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/805c3845-09e5-7c92-acee-1c4cf5d81a98@gmail.com/mbox/"},{"id":127526,"url":"https://patchwork.plctlab.org/api/1.2/patches/127526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMOjzRGv50hOfavs@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-28T11:17:33","name":"gimple-fold: Handle _BitInt in __builtin_clear_padding [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMOjzRGv50hOfavs@tucnak/mbox/"},{"id":127548,"url":"https://patchwork.plctlab.org/api/1.2/patches/127548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728115004.3071397-1-yanzhang.wang@intel.com/","msgid":"<20230728115004.3071397-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-07-28T11:50:04","name":"[v2] RISC-V: convert the mulh with 0 to mov 0 to the reg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728115004.3071397-1-yanzhang.wang@intel.com/mbox/"},{"id":127549,"url":"https://patchwork.plctlab.org/api/1.2/patches/127549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com/","msgid":"<12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T11:51:41","name":"libgomp: cuda.h and omp_target_memcpy_rect cleanup (was: [patch] OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/12ebc63d-9f48-a292-ae17-4ac70254c500@codesourcery.com/mbox/"},{"id":127613,"url":"https://patchwork.plctlab.org/api/1.2/patches/127613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMO7E9C9KBfbyJHH@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-28T12:56:51","name":"Loop-split improvements, part 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMO7E9C9KBfbyJHH@kam.mff.cuni.cz/mbox/"},{"id":127621,"url":"https://patchwork.plctlab.org/api/1.2/patches/127621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-2-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-2-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:30","name":"[1/4] openmp: Fix loop transformation tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-2-frederik@codesourcery.com/mbox/"},{"id":127625,"url":"https://patchwork.plctlab.org/api/1.2/patches/127625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-3-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-3-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:31","name":"[2/4] openmp: Fix initialization for '\''unroll full'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-3-frederik@codesourcery.com/mbox/"},{"id":127624,"url":"https://patchwork.plctlab.org/api/1.2/patches/127624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-4-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-4-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:32","name":"[3/4] openmp: Fix diagnostic message for \"omp unroll\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-4-frederik@codesourcery.com/mbox/"},{"id":127622,"url":"https://patchwork.plctlab.org/api/1.2/patches/127622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-5-frederik@codesourcery.com/","msgid":"<20230728130433.2377366-5-frederik@codesourcery.com>","list_archive_url":null,"date":"2023-07-28T13:04:33","name":"[4/4] openmp: Fix number of iterations computation for \"omp unroll full\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728130433.2377366-5-frederik@codesourcery.com/mbox/"},{"id":127684,"url":"https://patchwork.plctlab.org/api/1.2/patches/127684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com/","msgid":"<03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com>","list_archive_url":null,"date":"2023-07-28T15:00:01","name":"rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03ba5b4a0bdee9f3b2fd73ec15cc100f003e6868.camel@us.ibm.com/mbox/"},{"id":127729,"url":"https://patchwork.plctlab.org/api/1.2/patches/127729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMPpap9VO0EMUGCn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-07-28T16:14:34","name":"[RFC,WIP] _BitInt bit-field support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMPpap9VO0EMUGCn@tucnak/mbox/"},{"id":127740,"url":"https://patchwork.plctlab.org/api/1.2/patches/127740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728163758.377962-1-patrick@rivosinc.com/","msgid":"<20230728163758.377962-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-07-28T16:37:58","name":"[Committed] RISC-V: Specify -mabi in rv64 autovec testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728163758.377962-1-patrick@rivosinc.com/mbox/"},{"id":127835,"url":"https://patchwork.plctlab.org/api/1.2/patches/127835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728190304.8849-1-jose.marchesi@oracle.com/","msgid":"<20230728190304.8849-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-07-28T19:03:04","name":"[COMMITTED] bpf: disable tail call optimization in BPF targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230728190304.8849-1-jose.marchesi@oracle.com/mbox/"},{"id":127851,"url":"https://patchwork.plctlab.org/api/1.2/patches/127851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab58900340f81c5ebf4743d5a8b756878c21fa7e.camel@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-28T20:19:44","name":"[v2] SARIF and -ftime-report'\''s output [PR109361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ab58900340f81c5ebf4743d5a8b756878c21fa7e.camel@redhat.com/mbox/"},{"id":127855,"url":"https://patchwork.plctlab.org/api/1.2/patches/127855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com/","msgid":"<1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com>","list_archive_url":null,"date":"2023-07-28T20:37:56","name":"[COMMITTED] PR tree-optimization/110205 -Fix some warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d587ae8-a3ba-77b3-20c3-ebb92174d1a6@redhat.com/mbox/"},{"id":127857,"url":"https://patchwork.plctlab.org/api/1.2/patches/127857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0b9c100-afd5-aa5f-ae74-5b0a069d2880@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-07-28T20:38:06","name":"[COMMITTED] Remove value_query, push into sub&fold class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0b9c100-afd5-aa5f-ae74-5b0a069d2880@redhat.com/mbox/"},{"id":127856,"url":"https://patchwork.plctlab.org/api/1.2/patches/127856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4378bf33-4718-ff59-4083-769d4485c352@redhat.com/","msgid":"<4378bf33-4718-ff59-4083-769d4485c352@redhat.com>","list_archive_url":null,"date":"2023-07-28T20:38:13","name":"[COMMITTED] Add a merge_range to ssa_cache and use it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4378bf33-4718-ff59-4083-769d4485c352@redhat.com/mbox/"},{"id":128016,"url":"https://patchwork.plctlab.org/api/1.2/patches/128016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMSz67f92gUuX9Yz@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-07-29T06:38:35","name":"Fix profile update after loop versioning in vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMSz67f92gUuX9Yz@kam.mff.cuni.cz/mbox/"},{"id":128072,"url":"https://patchwork.plctlab.org/api/1.2/patches/128072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729091308.29792-1-zengxiao@eswincomputing.com/","msgid":"<20230729091308.29792-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-07-29T09:13:08","name":"[V2,3/5,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729091308.29792-1-zengxiao@eswincomputing.com/mbox/"},{"id":128161,"url":"https://patchwork.plctlab.org/api/1.2/patches/128161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com/","msgid":"<002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-29T16:13:29","name":"[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9c237$9e0c3410$da249c30$@nextmovesoftware.com/mbox/"},{"id":128163,"url":"https://patchwork.plctlab.org/api/1.2/patches/128163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729182120.2017374-1-apinski@marvell.com/","msgid":"<20230729182120.2017374-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-29T18:21:20","name":"[PATCHv2] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230729182120.2017374-1-apinski@marvell.com/mbox/"},{"id":128182,"url":"https://patchwork.plctlab.org/api/1.2/patches/128182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730021058.3359318-1-juzhe.zhong@rivai.ai/","msgid":"<20230730021058.3359318-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-30T02:10:58","name":"RISC-V: Enable basic VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730021058.3359318-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128228,"url":"https://patchwork.plctlab.org/api/1.2/patches/128228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com/","msgid":"<2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com>","list_archive_url":null,"date":"2023-07-30T13:55:19","name":"[committed] Fix several preprocessor directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c5a8abd-c03e-294f-74bc-9e3f3f1de393@gmail.com/mbox/"},{"id":128274,"url":"https://patchwork.plctlab.org/api/1.2/patches/128274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4abm7fZrKOYWMibFDM=uBk1TET0vSn7=5=-tYhcVrRdUA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-07-30T20:12:53","name":"[RFC] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4abm7fZrKOYWMibFDM=uBk1TET0vSn7=5=-tYhcVrRdUA@mail.gmail.com/mbox/"},{"id":128296,"url":"https://patchwork.plctlab.org/api/1.2/patches/128296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730223746.0000F33E7D@hamza.pair.com/","msgid":"<20230730223746.0000F33E7D@hamza.pair.com>","list_archive_url":null,"date":"2023-07-30T22:37:43","name":"[pushed] wwwdocs: gcc-4.5: Update link to GNU MPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230730223746.0000F33E7D@hamza.pair.com/mbox/"},{"id":128306,"url":"https://patchwork.plctlab.org/api/1.2/patches/128306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731012537.4398-1-xuli1@eswincomputing.com/","msgid":"<20230731012537.4398-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-07-31T01:25:37","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731012537.4398-1-xuli1@eswincomputing.com/mbox/"},{"id":128316,"url":"https://patchwork.plctlab.org/api/1.2/patches/128316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731021357.3815294-1-juzhe.zhong@rivai.ai/","msgid":"<20230731021357.3815294-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T02:13:57","name":"[V2] RISC-V: Enable basic VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731021357.3815294-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128322,"url":"https://patchwork.plctlab.org/api/1.2/patches/128322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731025646.1021646-1-pan2.li@intel.com/","msgid":"<20230731025646.1021646-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-07-31T02:56:46","name":"[v1] RISC-V: Bugfix for RVV floating-point rm suffix sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731025646.1021646-1-pan2.li@intel.com/mbox/"},{"id":128344,"url":"https://patchwork.plctlab.org/api/1.2/patches/128344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-1-apinski@marvell.com/","msgid":"<20230731053412.2102672-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T05:34:11","name":"[1/2] MATCH: PR 106164 : Optimize `(X CMP1 Y) AND/IOR (X CMP2 Y)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-1-apinski@marvell.com/mbox/"},{"id":128343,"url":"https://patchwork.plctlab.org/api/1.2/patches/128343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-2-apinski@marvell.com/","msgid":"<20230731053412.2102672-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T05:34:12","name":"[2/2] MATCH: Add `a == b | a cmp b` and `a != b & a cmp b` simplifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731053412.2102672-2-apinski@marvell.com/mbox/"},{"id":128351,"url":"https://patchwork.plctlab.org/api/1.2/patches/128351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731061629.2540150-1-lin1.hu@intel.com/","msgid":"<20230731061629.2540150-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-07-31T06:16:29","name":"Add myself for write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731061629.2540150-1-lin1.hu@intel.com/mbox/"},{"id":128369,"url":"https://patchwork.plctlab.org/api/1.2/patches/128369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731065228.69779-1-kito.cheng@sifive.com/","msgid":"<20230731065228.69779-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-07-31T06:52:28","name":"RISC-V: Return machine_mode rather than opt_machine_mode for get_mask_mode, NFC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731065228.69779-1-kito.cheng@sifive.com/mbox/"},{"id":128372,"url":"https://patchwork.plctlab.org/api/1.2/patches/128372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com/","msgid":"<001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-07-31T07:13:07","name":"[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001a01d9c37e$75abcfb0$61036f10$@nextmovesoftware.com/mbox/"},{"id":128506,"url":"https://patchwork.plctlab.org/api/1.2/patches/128506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/168d2ada-15df-7e97-9932-6a65104147ef@arm.com/","msgid":"<168d2ada-15df-7e97-9932-6a65104147ef@arm.com>","list_archive_url":null,"date":"2023-07-31T09:42:02","name":"Add POLY_INT_CST support to fold_ctor_reference in gimple-fold.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/168d2ada-15df-7e97-9932-6a65104147ef@arm.com/mbox/"},{"id":128590,"url":"https://patchwork.plctlab.org/api/1.2/patches/128590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-2-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:44","name":"[1/3] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-2-andrzej.turko@gmail.com/mbox/"},{"id":128589,"url":"https://patchwork.plctlab.org/api/1.2/patches/128589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-3-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:45","name":"[2/3] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-3-andrzej.turko@gmail.com/mbox/"},{"id":128592,"url":"https://patchwork.plctlab.org/api/1.2/patches/128592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-4-andrzej.turko@gmail.com/","msgid":"<20230731110346.174848-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-07-31T11:03:46","name":"[3/3] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731110346.174848-4-andrzej.turko@gmail.com/mbox/"},{"id":128624,"url":"https://patchwork.plctlab.org/api/1.2/patches/128624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731120120.651197-1-juzhe.zhong@rivai.ai/","msgid":"<20230731120120.651197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T12:01:20","name":"RISC-V: Support POPCOUNT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731120120.651197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128642,"url":"https://patchwork.plctlab.org/api/1.2/patches/128642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731122026.966504-1-juzhe.zhong@rivai.ai/","msgid":"<20230731122026.966504-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T12:20:26","name":"[committed] RISC-V: Fix bug of get_mask_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731122026.966504-1-juzhe.zhong@rivai.ai/mbox/"},{"id":128648,"url":"https://patchwork.plctlab.org/api/1.2/patches/128648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731124037.1FA743858425@sourceware.org/","msgid":"<20230731124037.1FA743858425@sourceware.org>","list_archive_url":null,"date":"2023-07-31T12:39:52","name":"Improve sinking with unrelated defs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731124037.1FA743858425@sourceware.org/mbox/"},{"id":128710,"url":"https://patchwork.plctlab.org/api/1.2/patches/128710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731140232.3EFC738582BC@sourceware.org/","msgid":"<20230731140232.3EFC738582BC@sourceware.org>","list_archive_url":null,"date":"2023-07-31T14:01:49","name":"tree-optimization/110838 - vectorization of widened shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731140232.3EFC738582BC@sourceware.org/mbox/"},{"id":128736,"url":"https://patchwork.plctlab.org/api/1.2/patches/128736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731141349.1188774-1-juzhe.zhong@rivai.ai/","msgid":"<20230731141349.1188774-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-07-31T14:13:49","name":"[V2] RISC-V: Support POPCOUNT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731141349.1188774-1-juzhe.zhong@rivai.ai/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-07/mbox/"},{"id":27,"url":"https://patchwork.plctlab.org/api/1.2/bundles/27/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-08","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":128781,"url":"https://patchwork.plctlab.org/api/1.2/patches/128781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com/","msgid":"<73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com>","list_archive_url":null,"date":"2023-07-31T16:06:40","name":"[COMMITTED] PR tree-optimization/110582 - fur_list should not use the range vector for non-ssa, operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/73a27325-37f9-255e-4902-4adf41f5f4a6@redhat.com/mbox/"},{"id":128790,"url":"https://patchwork.plctlab.org/api/1.2/patches/128790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mszcau6z.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-07-31T17:04:36","name":"ipa-sra: Don'\''t consider CLOBBERS as writes preventing splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6mszcau6z.fsf@suse.cz/mbox/"},{"id":128800,"url":"https://patchwork.plctlab.org/api/1.2/patches/128800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731170756.2130927-1-apinski@marvell.com/","msgid":"<20230731170756.2130927-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:07:56","name":"[COMMITTEDv3] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731170756.2130927-1-apinski@marvell.com/mbox/"},{"id":128809,"url":"https://patchwork.plctlab.org/api/1.2/patches/128809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-1-apinski@marvell.com/","msgid":"<20230731174606.2132534-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:46:05","name":"[1/2] Move `~X & X` and `~X | X` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-1-apinski@marvell.com/mbox/"},{"id":128810,"url":"https://patchwork.plctlab.org/api/1.2/patches/128810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-2-apinski@marvell.com/","msgid":"<20230731174606.2132534-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T17:46:06","name":"[2/2] Slightly improve bitwise_inverted_equal_p comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731174606.2132534-2-apinski@marvell.com/mbox/"},{"id":128860,"url":"https://patchwork.plctlab.org/api/1.2/patches/128860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731201637.2139398-1-apinski@marvell.com/","msgid":"<20230731201637.2139398-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-07-31T20:16:37","name":"PHIOPT: Mark the conditional lhs and rhs as to look at to see if DCEable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731201637.2139398-1-apinski@marvell.com/mbox/"},{"id":128879,"url":"https://patchwork.plctlab.org/api/1.2/patches/128879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731215206.1876739-1-polacek@redhat.com/","msgid":"<20230731215206.1876739-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-07-31T21:52:06","name":"c++: parser cleanup, remove dummy arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230731215206.1876739-1-polacek@redhat.com/mbox/"},{"id":128924,"url":"https://patchwork.plctlab.org/api/1.2/patches/128924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV4p8uf1bMBP5OhUb=nfy-WZDPvoDqRBznzdGoD3oHo=w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T00:01:53","name":"libbacktrace patch committed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV4p8uf1bMBP5OhUb=nfy-WZDPvoDqRBznzdGoD3oHo=w@mail.gmail.com/mbox/"},{"id":128925,"url":"https://patchwork.plctlab.org/api/1.2/patches/128925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801000507.2147978-1-apinski@marvell.com/","msgid":"<20230801000507.2147978-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-01T00:05:07","name":"[COMMITTEDv2] Fix PR 93044: extra cast is not removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801000507.2147978-1-apinski@marvell.com/mbox/"},{"id":128929,"url":"https://patchwork.plctlab.org/api/1.2/patches/128929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003456.994217-1-ppalka@redhat.com/","msgid":"<20230801003456.994217-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-01T00:34:56","name":"c++: improve debug_tree for templated types/decls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003456.994217-1-ppalka@redhat.com/mbox/"},{"id":128930,"url":"https://patchwork.plctlab.org/api/1.2/patches/128930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003505.994240-1-ppalka@redhat.com/","msgid":"<20230801003505.994240-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-01T00:35:05","name":"tree-pretty-print: handle COMPONENT_REF with non-decl RHS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801003505.994240-1-ppalka@redhat.com/mbox/"},{"id":128958,"url":"https://patchwork.plctlab.org/api/1.2/patches/128958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801022253.3286257-1-lhyatt@gmail.com/","msgid":"<20230801022253.3286257-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-01T02:22:53","name":"preprocessor: c++: Support `#pragma GCC target'\'' macros [PR87299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801022253.3286257-1-lhyatt@gmail.com/mbox/"},{"id":128992,"url":"https://patchwork.plctlab.org/api/1.2/patches/128992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801054416.2531911-1-hongtao.liu@intel.com/","msgid":"<20230801054416.2531911-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-01T05:44:16","name":"Adjust testcase for more optimal codegen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801054416.2531911-1-hongtao.liu@intel.com/mbox/"},{"id":128993,"url":"https://patchwork.plctlab.org/api/1.2/patches/128993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9a3f117-43b6-d7f4-bb5a-0cf5c512e61f@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T05:49:09","name":"x86: fold two of vec_dupv2df'\''s alternatives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9a3f117-43b6-d7f4-bb5a-0cf5c512e61f@suse.com/mbox/"},{"id":128994,"url":"https://patchwork.plctlab.org/api/1.2/patches/128994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com/","msgid":"<9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com>","list_archive_url":null,"date":"2023-08-01T05:55:22","name":"[RESEND] libatomic: drop redundant all-multi command","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c79db70-94a6-58e7-96f3-d7c60a9d5893@suse.com/mbox/"},{"id":129013,"url":"https://patchwork.plctlab.org/api/1.2/patches/129013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801063743.155666-1-juzhe.zhong@rivai.ai/","msgid":"<20230801063743.155666-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-01T06:37:43","name":"[V3] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801063743.155666-1-juzhe.zhong@rivai.ai/mbox/"},{"id":129032,"url":"https://patchwork.plctlab.org/api/1.2/patches/129032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801064831.3261727-1-pan2.li@intel.com/","msgid":"<20230801064831.3261727-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-01T06:48:31","name":"[v1] RISC-V: Support RVV VFSUB and VFRSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801064831.3261727-1-pan2.li@intel.com/mbox/"},{"id":129062,"url":"https://patchwork.plctlab.org/api/1.2/patches/129062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080746.2271226-1-poulhies@adacore.com/","msgid":"<20230801080746.2271226-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:07:46","name":"[COMMITTED] ada: Emit SCOs for nested decisions in quantified expressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080746.2271226-1-poulhies@adacore.com/mbox/"},{"id":129059,"url":"https://patchwork.plctlab.org/api/1.2/patches/129059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080812.2271398-1-poulhies@adacore.com/","msgid":"<20230801080812.2271398-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:12","name":"[COMMITTED] ada: check Atree.Get/Set_Field_Value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080812.2271398-1-poulhies@adacore.com/mbox/"},{"id":129060,"url":"https://patchwork.plctlab.org/api/1.2/patches/129060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080814.2271480-1-poulhies@adacore.com/","msgid":"<20230801080814.2271480-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:14","name":"[COMMITTED] ada: Fix generation of JSON output for data representation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080814.2271480-1-poulhies@adacore.com/mbox/"},{"id":129061,"url":"https://patchwork.plctlab.org/api/1.2/patches/129061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080816.2271563-1-poulhies@adacore.com/","msgid":"<20230801080816.2271563-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:16","name":"[COMMITTED] ada: Default Put_Image for composite derived types is missing information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080816.2271563-1-poulhies@adacore.com/mbox/"},{"id":129063,"url":"https://patchwork.plctlab.org/api/1.2/patches/129063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080818.2271624-1-poulhies@adacore.com/","msgid":"<20230801080818.2271624-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:18","name":"[COMMITTED] ada: Incorrect optimization for unconstrained limited record component type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080818.2271624-1-poulhies@adacore.com/mbox/"},{"id":129065,"url":"https://patchwork.plctlab.org/api/1.2/patches/129065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080820.2271686-1-poulhies@adacore.com/","msgid":"<20230801080820.2271686-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:20","name":"[COMMITTED] ada: Bugbox compiling Constrained_Protected_Object'\''Image","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080820.2271686-1-poulhies@adacore.com/mbox/"},{"id":129066,"url":"https://patchwork.plctlab.org/api/1.2/patches/129066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080821.2271747-1-poulhies@adacore.com/","msgid":"<20230801080821.2271747-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:21","name":"[COMMITTED] ada: Disable inlining of subprograms with Skip(_Flow_And)_Proof in GNATprove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080821.2271747-1-poulhies@adacore.com/mbox/"},{"id":129064,"url":"https://patchwork.plctlab.org/api/1.2/patches/129064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080823.2271808-1-poulhies@adacore.com/","msgid":"<20230801080823.2271808-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-01T08:08:23","name":"[COMMITTED] ada: Fix printing of numbers in JSON output for data representation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801080823.2271808-1-poulhies@adacore.com/mbox/"},{"id":129069,"url":"https://patchwork.plctlab.org/api/1.2/patches/129069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2d95051-53d2-ec5e-cf6b-9a410b7a5841@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T08:17:10","name":"[PING^1,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2d95051-53d2-ec5e-cf6b-9a410b7a5841@linux.ibm.com/mbox/"},{"id":129071,"url":"https://patchwork.plctlab.org/api/1.2/patches/129071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com/","msgid":"<1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T08:18:58","name":"[PING^3] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ac9603a-1d67-1170-16ee-22db2f0861a8@linux.ibm.com/mbox/"},{"id":129072,"url":"https://patchwork.plctlab.org/api/1.2/patches/129072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com/","msgid":"<1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T08:20:21","name":"PING^3] [PATCH 3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e865494-bad6-1204-86b2-4cd0cd5bfce1@linux.ibm.com/mbox/"},{"id":129085,"url":"https://patchwork.plctlab.org/api/1.2/patches/129085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801084447.1380635-1-christophe.lyon@linaro.org/","msgid":"<20230801084447.1380635-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-01T08:44:47","name":"[COMMITTED] doc: Fix spelling in arm_v8_1m_main_cde_mve_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801084447.1380635-1-christophe.lyon@linaro.org/mbox/"},{"id":129108,"url":"https://patchwork.plctlab.org/api/1.2/patches/129108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af5a8e98-d7d4-c7e6-2a51-f6ceb883d288@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T09:36:12","name":"MAINTAINERS: correct my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af5a8e98-d7d4-c7e6-2a51-f6ceb883d288@suse.com/mbox/"},{"id":129129,"url":"https://patchwork.plctlab.org/api/1.2/patches/129129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMja7SlWkRfppzOV@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-01T10:14:05","name":"Fix profile upate after vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMja7SlWkRfppzOV@kam.mff.cuni.cz/mbox/"},{"id":129294,"url":"https://patchwork.plctlab.org/api/1.2/patches/129294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de/","msgid":"<0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de>","list_archive_url":null,"date":"2023-08-01T13:03:32","name":"[avr,committed] Fix PR target/110220: Set JUMP_LABEL as required.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e42ec71-3927-b06a-e531-c70ca5b6ab34@gjlay.de/mbox/"},{"id":129315,"url":"https://patchwork.plctlab.org/api/1.2/patches/129315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANGHATU5pzXTNAgpsdua6M8d-YNtH7Jx=K9USKcT994vwmSw7Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-01T13:52:52","name":"analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CANGHATU5pzXTNAgpsdua6M8d-YNtH7Jx=K9USKcT994vwmSw7Q@mail.gmail.com/mbox/"},{"id":129317,"url":"https://patchwork.plctlab.org/api/1.2/patches/129317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com/","msgid":"<6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com>","list_archive_url":null,"date":"2023-08-01T13:56:16","name":"[committed] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fbb9f2b-1496-f2be-c9e9-965d560beae5@arm.com/mbox/"},{"id":129323,"url":"https://patchwork.plctlab.org/api/1.2/patches/129323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com/","msgid":"<163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com>","list_archive_url":null,"date":"2023-08-01T14:31:03","name":"RISC-V: Implement vector \"average\" autovec pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/163c273d-3c01-8ece-21a5-b6ce88174ac0@gmail.com/mbox/"},{"id":129355,"url":"https://patchwork.plctlab.org/api/1.2/patches/129355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com/","msgid":"<3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com>","list_archive_url":null,"date":"2023-08-01T15:35:16","name":"[OpenACC,2.7,v2] Implement default clause support for data constructs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f274de5-cc52-39c7-c399-f85a1a1a4640@siemens.com/mbox/"},{"id":129381,"url":"https://patchwork.plctlab.org/api/1.2/patches/129381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com/","msgid":"<1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com>","list_archive_url":null,"date":"2023-08-01T17:21:42","name":"arm: Remove unsigned variant of vcaddq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a7eb1a3-091f-f074-37cc-e60fb0de7aea@arm.com/mbox/"},{"id":129416,"url":"https://patchwork.plctlab.org/api/1.2/patches/129416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com/","msgid":"<18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-01T18:29:09","name":"[v2] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18319f27b2ef6cf19de41c3c3fc32c7680c62716.camel@us.ibm.com/mbox/"},{"id":129425,"url":"https://patchwork.plctlab.org/api/1.2/patches/129425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-2-cupertino.miranda@oracle.com/","msgid":"<20230801184307.179692-2-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-08-01T18:43:06","name":"[1/2] bpf: Implementation of BPF CO-RE builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-2-cupertino.miranda@oracle.com/mbox/"},{"id":129424,"url":"https://patchwork.plctlab.org/api/1.2/patches/129424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-3-cupertino.miranda@oracle.com/","msgid":"<20230801184307.179692-3-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-08-01T18:43:07","name":"[2/2] bpf: CO-RE builtins support tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801184307.179692-3-cupertino.miranda@oracle.com/mbox/"},{"id":129439,"url":"https://patchwork.plctlab.org/api/1.2/patches/129439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191226.64464-1-krebbel@linux.ibm.com/","msgid":"<20230801191226.64464-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-08-01T19:12:26","name":"[Committed] IBM Z: Handle unaligned symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191226.64464-1-krebbel@linux.ibm.com/mbox/"},{"id":129445,"url":"https://patchwork.plctlab.org/api/1.2/patches/129445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191831.432511-1-drross@redhat.com/","msgid":"<20230801191831.432511-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-01T19:18:31","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801191831.432511-1-drross@redhat.com/mbox/"},{"id":129447,"url":"https://patchwork.plctlab.org/api/1.2/patches/129447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801192033.432742-1-drross@redhat.com/","msgid":"<20230801192033.432742-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-01T19:20:33","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801192033.432742-1-drross@redhat.com/mbox/"},{"id":129456,"url":"https://patchwork.plctlab.org/api/1.2/patches/129456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801195104.2183011-1-maskray@google.com/","msgid":"<20230801195104.2183011-1-maskray@google.com>","list_archive_url":null,"date":"2023-08-01T19:51:04","name":"[v4] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230801195104.2183011-1-maskray@google.com/mbox/"},{"id":129538,"url":"https://patchwork.plctlab.org/api/1.2/patches/129538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802011311.771803-1-hongtao.liu@intel.com/","msgid":"<20230802011311.771803-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-02T01:13:11","name":"Support vec_fmaddsub/vec_fmsubadd for vector HFmode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802011311.771803-1-hongtao.liu@intel.com/mbox/"},{"id":129545,"url":"https://patchwork.plctlab.org/api/1.2/patches/129545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013141.772245-1-hongtao.liu@intel.com/","msgid":"<20230802013141.772245-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-02T01:31:41","name":"Optimize vlddqu + inserti128 to vbroadcasti128","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013141.772245-1-hongtao.liu@intel.com/mbox/"},{"id":129546,"url":"https://patchwork.plctlab.org/api/1.2/patches/129546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013813.14284-1-zengxiao@eswincomputing.com/","msgid":"<20230802013813.14284-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-08-02T01:38:13","name":"[v3,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802013813.14284-1-zengxiao@eswincomputing.com/mbox/"},{"id":129561,"url":"https://patchwork.plctlab.org/api/1.2/patches/129561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802023621.1954111-1-pan2.li@intel.com/","msgid":"<20230802023621.1954111-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T02:36:21","name":"[v1] RISC-V: Support RVV VFWADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802023621.1954111-1-pan2.li@intel.com/mbox/"},{"id":129613,"url":"https://patchwork.plctlab.org/api/1.2/patches/129613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee73ca29-bcb2-9e1f-60fc-a3f117c2b788@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T05:41:47","name":"[committed,RISC-V] Avoid sub-word mode comparisons with Zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee73ca29-bcb2-9e1f-60fc-a3f117c2b788@ventanamicro.com/mbox/"},{"id":129630,"url":"https://patchwork.plctlab.org/api/1.2/patches/129630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802063547.2663520-1-pan2.li@intel.com/","msgid":"<20230802063547.2663520-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T06:35:47","name":"[v2] RISC-V: Support RVV VFWADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802063547.2663520-1-pan2.li@intel.com/mbox/"},{"id":129669,"url":"https://patchwork.plctlab.org/api/1.2/patches/129669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMoFmriZhia9k7Wm@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-02T07:28:26","name":"Fix profile update after cancelled loop distribution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMoFmriZhia9k7Wm@kam.mff.cuni.cz/mbox/"},{"id":129689,"url":"https://patchwork.plctlab.org/api/1.2/patches/129689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802075924.3448107-1-pan2.li@intel.com/","msgid":"<20230802075924.3448107-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T07:59:24","name":"[v1] RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802075924.3448107-1-pan2.li@intel.com/mbox/"},{"id":129708,"url":"https://patchwork.plctlab.org/api/1.2/patches/129708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802084314.965951-1-jun.zhang@intel.com/","msgid":"<20230802084314.965951-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-08-02T08:43:14","name":"Enable tpause Exponential backoff and thread delay","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802084314.965951-1-jun.zhang@intel.com/mbox/"},{"id":129717,"url":"https://patchwork.plctlab.org/api/1.2/patches/129717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802090616.1214802-1-dkm@kataplop.net/","msgid":"<20230802090616.1214802-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-08-02T09:06:16","name":"[v3] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802090616.1214802-1-dkm@kataplop.net/mbox/"},{"id":129735,"url":"https://patchwork.plctlab.org/api/1.2/patches/129735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-2-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:25","name":"[1/3,v2] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-2-andrzej.turko@gmail.com/mbox/"},{"id":129736,"url":"https://patchwork.plctlab.org/api/1.2/patches/129736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-3-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:26","name":"[2/3,v2] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-3-andrzej.turko@gmail.com/mbox/"},{"id":129737,"url":"https://patchwork.plctlab.org/api/1.2/patches/129737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-4-andrzej.turko@gmail.com/","msgid":"<20230802095527.100830-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-02T09:55:27","name":"[3/3,v2] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802095527.100830-4-andrzej.turko@gmail.com/mbox/"},{"id":129743,"url":"https://patchwork.plctlab.org/api/1.2/patches/129743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802101907.3772871-1-pan2.li@intel.com/","msgid":"<20230802101907.3772871-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-02T10:19:07","name":"[v1] RISC-V: Support RVV VFWSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802101907.3772871-1-pan2.li@intel.com/mbox/"},{"id":129746,"url":"https://patchwork.plctlab.org/api/1.2/patches/129746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17618-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:21:59","name":"AArch64 update costing for MLA by invariant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17618-tamar@arm.com/mbox/"},{"id":129747,"url":"https://patchwork.plctlab.org/api/1.2/patches/129747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17624-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:22:41","name":"AArch64 update costing for combining vector conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17624-tamar@arm.com/mbox/"},{"id":129751,"url":"https://patchwork.plctlab.org/api/1.2/patches/129751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17620-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:25:12","name":"AArch64 Undo vec_widen_shiftl optabs [PR106346]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17620-tamar@arm.com/mbox/"},{"id":129752,"url":"https://patchwork.plctlab.org/api/1.2/patches/129752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17619-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T10:29:08","name":"[gensupport] : Don'\''t segfault on empty attrs list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17619-tamar@arm.com/mbox/"},{"id":129788,"url":"https://patchwork.plctlab.org/api/1.2/patches/129788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802115217.AC7123858436@sourceware.org/","msgid":"<20230802115217.AC7123858436@sourceware.org>","list_archive_url":null,"date":"2023-08-02T11:51:33","name":"Make add_phi_node_to_bb static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802115217.AC7123858436@sourceware.org/mbox/"},{"id":129796,"url":"https://patchwork.plctlab.org/api/1.2/patches/129796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c23e4ed4-ec72-a35a-4417-c589dca28a54@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T12:09:54","name":"aarch64: SVE/NEON Bridging intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c23e4ed4-ec72-a35a-4417-c589dca28a54@arm.com/mbox/"},{"id":129816,"url":"https://patchwork.plctlab.org/api/1.2/patches/129816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124506.DDA1A3857706@sourceware.org/","msgid":"<20230802124506.DDA1A3857706@sourceware.org>","list_archive_url":null,"date":"2023-08-02T12:44:23","name":"[1/2] Add virtual operand global liveness computation class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124506.DDA1A3857706@sourceware.org/mbox/"},{"id":129817,"url":"https://patchwork.plctlab.org/api/1.2/patches/129817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124532.69E863858000@sourceware.org/","msgid":"<20230802124532.69E863858000@sourceware.org>","list_archive_url":null,"date":"2023-08-02T12:44:48","name":"[2/2] Improve sinking with unrelated defs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802124532.69E863858000@sourceware.org/mbox/"},{"id":129850,"url":"https://patchwork.plctlab.org/api/1.2/patches/129850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802134910.2564339-2-stefansf@linux.ibm.com/","msgid":"<20230802134910.2564339-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-02T13:49:11","name":"PR combine/110867 Fix narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802134910.2564339-2-stefansf@linux.ibm.com/mbox/"},{"id":129925,"url":"https://patchwork.plctlab.org/api/1.2/patches/129925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB783923BF951C8BDF5B3D5BA9F70BA@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T15:48:59","name":"arm/aarch64: Add bti for all functions [PR106671]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB783923BF951C8BDF5B3D5BA9F70BA@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":129930,"url":"https://patchwork.plctlab.org/api/1.2/patches/129930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMp9YaTkwBZi7l69@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-02T15:59:29","name":"_BitInt bit-field support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMp9YaTkwBZi7l69@tucnak/mbox/"},{"id":129933,"url":"https://patchwork.plctlab.org/api/1.2/patches/129933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162014.24756-1-ef2648@columbia.edu/","msgid":"<20230802162014.24756-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-02T16:20:14","name":"[v2] analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162014.24756-1-ef2648@columbia.edu/mbox/"},{"id":129934,"url":"https://patchwork.plctlab.org/api/1.2/patches/129934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162322.447469-1-drross@redhat.com/","msgid":"<20230802162322.447469-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-02T16:23:22","name":"match.pd: Canonicalize (signed x << c) >> c [PR101955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802162322.447469-1-drross@redhat.com/mbox/"},{"id":129991,"url":"https://patchwork.plctlab.org/api/1.2/patches/129991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ea321ba0ede7a0834bd8a73098ab892d94e669.1690994309.git.ams@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-02T17:00:34","name":"[v2,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1ea321ba0ede7a0834bd8a73098ab892d94e669.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129989,"url":"https://patchwork.plctlab.org/api/1.2/patches/129989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com/","msgid":"<161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-02T17:00:35","name":"[v2,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/161001070f7573c98d2b72223933dbba49405fea.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129993,"url":"https://patchwork.plctlab.org/api/1.2/patches/129993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com/","msgid":"<285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-02T17:00:36","name":"[v2,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/285ac8634d3d0a9344dd534c18218363213a33f5.1690994309.git.ams@codesourcery.com/mbox/"},{"id":129998,"url":"https://patchwork.plctlab.org/api/1.2/patches/129998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com/","msgid":"<003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com>","list_archive_url":null,"date":"2023-08-02T17:20:40","name":"[committed,RISC-V] Fix 20010221-1.c with zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com/mbox/"},{"id":130057,"url":"https://patchwork.plctlab.org/api/1.2/patches/130057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802184547.26983-1-ef2648@columbia.edu/","msgid":"<20230802184547.26983-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-02T18:45:47","name":"[v3] analyzer: stash values for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802184547.26983-1-ef2648@columbia.edu/mbox/"},{"id":130167,"url":"https://patchwork.plctlab.org/api/1.2/patches/130167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com/","msgid":"<000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-02T22:18:44","name":"[x86] PR target/110792: Early clobber issues with rot32di2_doubleword.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/000901d9c58f$4e236d00$ea6a4700$@nextmovesoftware.com/mbox/"},{"id":130218,"url":"https://patchwork.plctlab.org/api/1.2/patches/130218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802235232.2265424-1-apinski@marvell.com/","msgid":"<20230802235232.2265424-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-02T23:52:32","name":"MATCH: first of the value replacement moving from phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230802235232.2265424-1-apinski@marvell.com/mbox/"},{"id":130238,"url":"https://patchwork.plctlab.org/api/1.2/patches/130238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803013807.3967176-1-pan2.li@intel.com/","msgid":"<20230803013807.3967176-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T01:38:07","name":"[v1] RISC-V: Support RVV VFMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803013807.3967176-1-pan2.li@intel.com/mbox/"},{"id":130243,"url":"https://patchwork.plctlab.org/api/1.2/patches/130243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803015835.447081-1-juzhe.zhong@rivai.ai/","msgid":"<20230803015835.447081-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-03T01:58:35","name":"[V2] RISC-V: Support CALL conditional autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803015835.447081-1-juzhe.zhong@rivai.ai/mbox/"},{"id":130245,"url":"https://patchwork.plctlab.org/api/1.2/patches/130245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803021059.516819-1-pan2.li@intel.com/","msgid":"<20230803021059.516819-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T02:10:59","name":"[v1] RISC-V: Remove redudant extern declaration in function base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803021059.516819-1-pan2.li@intel.com/mbox/"},{"id":130258,"url":"https://patchwork.plctlab.org/api/1.2/patches/130258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023110.2271301-1-apinski@marvell.com/","msgid":"<20230803023110.2271301-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T02:31:10","name":"Fix `~X & X` and `~X | X` patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023110.2271301-1-apinski@marvell.com/mbox/"},{"id":130259,"url":"https://patchwork.plctlab.org/api/1.2/patches/130259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023210.530982-1-pan2.li@intel.com/","msgid":"<20230803023210.530982-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T02:32:10","name":"[v2] RISC-V: Support RVV VFMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023210.530982-1-pan2.li@intel.com/mbox/"},{"id":130261,"url":"https://patchwork.plctlab.org/api/1.2/patches/130261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023404.2271442-1-apinski@marvell.com/","msgid":"<20230803023404.2271442-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T02:34:04","name":"Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023404.2271442-1-apinski@marvell.com/mbox/"},{"id":130268,"url":"https://patchwork.plctlab.org/api/1.2/patches/130268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023635.260926-1-juzhe.zhong@rivai.ai/","msgid":"<20230803023635.260926-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-03T02:36:35","name":"[V4] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803023635.260926-1-juzhe.zhong@rivai.ai/mbox/"},{"id":130290,"url":"https://patchwork.plctlab.org/api/1.2/patches/130290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803031713.912298-1-yunqiang.su@cipunited.com/","msgid":"<20230803031713.912298-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-08-03T03:17:13","name":"[RFC] Combine zero_extract and sign_extend for TARGET_TRULY_NOOP_TRUNCATION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803031713.912298-1-yunqiang.su@cipunited.com/mbox/"},{"id":130294,"url":"https://patchwork.plctlab.org/api/1.2/patches/130294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803032914.819141-1-pan2.li@intel.com/","msgid":"<20230803032914.819141-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T03:29:14","name":"[v1] RISC-V: Support RVV VFDIV and VFRDIV rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803032914.819141-1-pan2.li@intel.com/mbox/"},{"id":130317,"url":"https://patchwork.plctlab.org/api/1.2/patches/130317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803052844.1178854-1-pan2.li@intel.com/","msgid":"<20230803052844.1178854-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T05:28:44","name":"[v1] RISC-V: Support RVV VFWMUL rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803052844.1178854-1-pan2.li@intel.com/mbox/"},{"id":130325,"url":"https://patchwork.plctlab.org/api/1.2/patches/130325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803064806.951680-2-stefansf@linux.ibm.com/","msgid":"<20230803064806.951680-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-03T06:48:07","name":"s390: Enable vect_bswap test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803064806.951680-2-stefansf@linux.ibm.com/mbox/"},{"id":130326,"url":"https://patchwork.plctlab.org/api/1.2/patches/130326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803065059.951867-2-stefansf@linux.ibm.com/","msgid":"<20230803065059.951867-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-03T06:51:00","name":"s390: Try to emit vlbr/vstbr instead of vperm et al.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803065059.951867-2-stefansf@linux.ibm.com/mbox/"},{"id":130341,"url":"https://patchwork.plctlab.org/api/1.2/patches/130341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com/","msgid":"<00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-03T07:10:17","name":"[x86] Split SUBREGs of SSE vector registers into vec_select insns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00c601d9c5d9$8f5ad4d0$ae107e70$@nextmovesoftware.com/mbox/"},{"id":130343,"url":"https://patchwork.plctlab.org/api/1.2/patches/130343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jlgions.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-08-03T07:13:43","name":"Introduce -msmp to select /lib_smp/ on ppc-vx6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or4jlgions.fsf@lxoliva.fsfla.org/mbox/"},{"id":130376,"url":"https://patchwork.plctlab.org/api/1.2/patches/130376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com/","msgid":"<7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com>","list_archive_url":null,"date":"2023-08-03T08:09:56","name":"[01/10] x86: \"prefix_extra\" tidying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e28ba70-d18d-13ad-78bc-6e97ea6796a3@suse.com/mbox/"},{"id":130377,"url":"https://patchwork.plctlab.org/api/1.2/patches/130377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com/","msgid":"<2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com>","list_archive_url":null,"date":"2023-08-03T08:10:25","name":"[02/10] x86: \"sse4arg\" adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c74b105-09aa-2db4-d0be-4d8a6609b851@suse.com/mbox/"},{"id":130380,"url":"https://patchwork.plctlab.org/api/1.2/patches/130380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e98989aa-baf3-40a4-13ab-09d06b191362@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:10:46","name":"[03/10] x86: \"ssemuladd\" adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e98989aa-baf3-40a4-13ab-09d06b191362@suse.com/mbox/"},{"id":130379,"url":"https://patchwork.plctlab.org/api/1.2/patches/130379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com/","msgid":"<4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com>","list_archive_url":null,"date":"2023-08-03T08:11:30","name":"[04/10] x86: \"prefix_extra\" can'\''t really be \"2\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4576e023-ac1e-7557-2cc0-ed33ccd35f59@suse.com/mbox/"},{"id":130386,"url":"https://patchwork.plctlab.org/api/1.2/patches/130386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5fae9d-e240-c808-702b-93871e39be47@suse.com/","msgid":"<5a5fae9d-e240-c808-702b-93871e39be47@suse.com>","list_archive_url":null,"date":"2023-08-03T08:12:04","name":"[05/10] x86: replace/correct bogus \"prefix_extra\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5fae9d-e240-c808-702b-93871e39be47@suse.com/mbox/"},{"id":130389,"url":"https://patchwork.plctlab.org/api/1.2/patches/130389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b55b2669-518e-d956-ec4e-d93b542e40fb@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:12:26","name":"[06/10] x86: drop stray \"prefix_extra\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b55b2669-518e-d956-ec4e-d93b542e40fb@suse.com/mbox/"},{"id":130381,"url":"https://patchwork.plctlab.org/api/1.2/patches/130381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b44684ea-482e-8867-8b24-d6d08a596ee8@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:12:49","name":"[07/10] x86: add (adjust) XOP insn attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b44684ea-482e-8867-8b24-d6d08a596ee8@suse.com/mbox/"},{"id":130393,"url":"https://patchwork.plctlab.org/api/1.2/patches/130393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com/","msgid":"<0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com>","list_archive_url":null,"date":"2023-08-03T08:13:17","name":"[08/10] x86: add missing \"prefix\" attribute to VF{,C}MULC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com/mbox/"},{"id":130385,"url":"https://patchwork.plctlab.org/api/1.2/patches/130385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com/","msgid":"<8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com>","list_archive_url":null,"date":"2023-08-03T08:13:44","name":"[09/10] x86: correct \"length_immediate\" in a few cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d0663ed-123e-1428-8aef-17d82c1b5f17@suse.com/mbox/"},{"id":130398,"url":"https://patchwork.plctlab.org/api/1.2/patches/130398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8673f78-d3f7-8418-733a-79d61094a7d4@suse.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T08:14:07","name":"[10/10] x86: drop redundant \"prefix_data16\" attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8673f78-d3f7-8418-733a-79d61094a7d4@suse.com/mbox/"},{"id":130440,"url":"https://patchwork.plctlab.org/api/1.2/patches/130440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803091041.BE3EE3857C51@sourceware.org/","msgid":"<20230803091041.BE3EE3857C51@sourceware.org>","list_archive_url":null,"date":"2023-08-03T09:09:46","name":"Swap loop splitting and final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803091041.BE3EE3857C51@sourceware.org/mbox/"},{"id":130444,"url":"https://patchwork.plctlab.org/api/1.2/patches/130444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMtxqMF1PQhWrWnZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T09:21:44","name":"[v3,RFC] c-family: Implement __has_feature and __has_extension [PR60512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMtxqMF1PQhWrWnZ@arm.com/mbox/"},{"id":130459,"url":"https://patchwork.plctlab.org/api/1.2/patches/130459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMuE0AUpDPcENgeB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-03T10:43:28","name":"c-family: Add _BitInt support for __atomic_*fetch* [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMuE0AUpDPcENgeB@tucnak/mbox/"},{"id":130478,"url":"https://patchwork.plctlab.org/api/1.2/patches/130478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuW0ubRQ97nta7HgL18QXGDse1pfnCsC=mr5CP_KRtkh3Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T11:07:48","name":"[RFC] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuW0ubRQ97nta7HgL18QXGDse1pfnCsC=mr5CP_KRtkh3Q@mail.gmail.com/mbox/"},{"id":130482,"url":"https://patchwork.plctlab.org/api/1.2/patches/130482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-2-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:43","name":"[v3,1/8] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-2-panchenghui@loongson.cn/mbox/"},{"id":130488,"url":"https://patchwork.plctlab.org/api/1.2/patches/130488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-3-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:44","name":"[v3,2/8] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-3-panchenghui@loongson.cn/mbox/"},{"id":130485,"url":"https://patchwork.plctlab.org/api/1.2/patches/130485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-4-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:45","name":"[v3,3/8] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-4-panchenghui@loongson.cn/mbox/"},{"id":130483,"url":"https://patchwork.plctlab.org/api/1.2/patches/130483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-5-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:46","name":"[v3,4/8] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-5-panchenghui@loongson.cn/mbox/"},{"id":130486,"url":"https://patchwork.plctlab.org/api/1.2/patches/130486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-6-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:47","name":"[v3,5/8] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-6-panchenghui@loongson.cn/mbox/"},{"id":130484,"url":"https://patchwork.plctlab.org/api/1.2/patches/130484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-7-panchenghui@loongson.cn/","msgid":"<20230803111750.88323-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-03T11:17:48","name":"[v3,6/8] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803111750.88323-7-panchenghui@loongson.cn/mbox/"},{"id":130534,"url":"https://patchwork.plctlab.org/api/1.2/patches/130534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120844.2526382-1-poulhies@adacore.com/","msgid":"<20230803120844.2526382-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:08:44","name":"[COMMITTED] ada: Adjust again address arithmetics in System.Dwarf_Lines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120844.2526382-1-poulhies@adacore.com/mbox/"},{"id":130533,"url":"https://patchwork.plctlab.org/api/1.2/patches/130533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120904.2526668-1-poulhies@adacore.com/","msgid":"<20230803120904.2526668-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:04","name":"[COMMITTED] ada: Fix spurious error on '\''Input of private type with Type_Invariant aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120904.2526668-1-poulhies@adacore.com/mbox/"},{"id":130536,"url":"https://patchwork.plctlab.org/api/1.2/patches/130536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120906.2526729-1-poulhies@adacore.com/","msgid":"<20230803120906.2526729-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:06","name":"[COMMITTED] ada: Rewrite Set_Image_*_Unsigned routines to remove recursion.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120906.2526729-1-poulhies@adacore.com/mbox/"},{"id":130535,"url":"https://patchwork.plctlab.org/api/1.2/patches/130535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120907.2526791-1-poulhies@adacore.com/","msgid":"<20230803120907.2526791-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-03T12:09:07","name":"[COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803120907.2526791-1-poulhies@adacore.com/mbox/"},{"id":130542,"url":"https://patchwork.plctlab.org/api/1.2/patches/130542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803122307.3C86F3857C66@sourceware.org/","msgid":"<20230803122307.3C86F3857C66@sourceware.org>","list_archive_url":null,"date":"2023-08-03T12:22:20","name":"tree-optimization/110702 - avoid zero-based memory references in IVOPTs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803122307.3C86F3857C66@sourceware.org/mbox/"},{"id":130559,"url":"https://patchwork.plctlab.org/api/1.2/patches/130559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsz82t1q.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T12:45:37","name":"poly_int: Handle more can_div_trunc_p cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsz82t1q.fsf@arm.com/mbox/"},{"id":130584,"url":"https://patchwork.plctlab.org/api/1.2/patches/130584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803132715.000023858D35@sourceware.org/","msgid":"<20230803132715.000023858D35@sourceware.org>","list_archive_url":null,"date":"2023-08-03T13:26:29","name":"[libbacktrace] fix up broken test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803132715.000023858D35@sourceware.org/mbox/"},{"id":130609,"url":"https://patchwork.plctlab.org/api/1.2/patches/130609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d22d1b-0534-47f2-9d3b-3072314447d4@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T13:38:32","name":"mid-end: Use integral time intervals in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8d22d1b-0534-47f2-9d3b-3072314447d4@AZ-NEU-EX04.Arm.com/mbox/"},{"id":130625,"url":"https://patchwork.plctlab.org/api/1.2/patches/130625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803135243.1341761-1-dmalcolm@redhat.com/","msgid":"<20230803135243.1341761-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-03T13:52:43","name":"[committed] analyzer: fix ICE on zero-sized arrays [PR110882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803135243.1341761-1-dmalcolm@redhat.com/mbox/"},{"id":130661,"url":"https://patchwork.plctlab.org/api/1.2/patches/130661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-2-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:29","name":"[1/3,v3] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-2-andrzej.turko@gmail.com/mbox/"},{"id":130659,"url":"https://patchwork.plctlab.org/api/1.2/patches/130659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-3-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:30","name":"[2/3,v3] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-3-andrzej.turko@gmail.com/mbox/"},{"id":130660,"url":"https://patchwork.plctlab.org/api/1.2/patches/130660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-4-andrzej.turko@gmail.com/","msgid":"<20230803142131.250087-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-03T14:21:31","name":"[3/3,v3] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803142131.250087-4-andrzej.turko@gmail.com/mbox/"},{"id":130663,"url":"https://patchwork.plctlab.org/api/1.2/patches/130663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143152.2087444-1-pan2.li@intel.com/","msgid":"<20230803143152.2087444-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T14:31:52","name":"[v1] RISC-V: Fix one comment for binop_frm insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143152.2087444-1-pan2.li@intel.com/mbox/"},{"id":130669,"url":"https://patchwork.plctlab.org/api/1.2/patches/130669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143837.2092129-1-pan2.li@intel.com/","msgid":"<20230803143837.2092129-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-03T14:38:37","name":"[v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803143837.2092129-1-pan2.li@intel.com/mbox/"},{"id":130673,"url":"https://patchwork.plctlab.org/api/1.2/patches/130673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803144924.1348195-1-dmalcolm@redhat.com/","msgid":"<20230803144924.1348195-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-03T14:49:24","name":"[committed] testsuite, analyzer: add test case [PR108171]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803144924.1348195-1-dmalcolm@redhat.com/mbox/"},{"id":130676,"url":"https://patchwork.plctlab.org/api/1.2/patches/130676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc14c02e-2ea8-17e4-b44f-6991d1a992dc@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T15:05:09","name":"[committed,RISC-V] Remove errant hunk of code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cc14c02e-2ea8-17e4-b44f-6991d1a992dc@gmail.com/mbox/"},{"id":130729,"url":"https://patchwork.plctlab.org/api/1.2/patches/130729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803163117.1016079-1-qing.zhao@oracle.com/","msgid":"<20230803163117.1016079-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-03T16:31:17","name":"Add documentation for -Wflex-array-member-not-at-end.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803163117.1016079-1-qing.zhao@oracle.com/mbox/"},{"id":130733,"url":"https://patchwork.plctlab.org/api/1.2/patches/130733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803164038.2306774-1-apinski@marvell.com/","msgid":"<20230803164038.2306774-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-03T16:40:38","name":"[PATCHv2] Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230803164038.2306774-1-apinski@marvell.com/mbox/"},{"id":130784,"url":"https://patchwork.plctlab.org/api/1.2/patches/130784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af917818-2d7b-f75f-8088-d58e357ba281@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T18:25:47","name":"[COMMITTED] Automatically set type is certain Value_Range routines.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af917818-2d7b-f75f-8088-d58e357ba281@redhat.com/mbox/"},{"id":130785,"url":"https://patchwork.plctlab.org/api/1.2/patches/130785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com/","msgid":"<496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com>","list_archive_url":null,"date":"2023-08-03T18:25:53","name":"[COMMITTED] Provide a routine for NAME == NAME relation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/496bc1ca-ab30-6e79-7b00-5dd1fc54b261@redhat.com/mbox/"},{"id":130787,"url":"https://patchwork.plctlab.org/api/1.2/patches/130787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aae445c7-c137-1f0c-e746-016163509887@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-03T18:25:58","name":"[COMMITTED] Add operand ranges to op1_op2_relation API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aae445c7-c137-1f0c-e746-016163509887@redhat.com/mbox/"},{"id":130814,"url":"https://patchwork.plctlab.org/api/1.2/patches/130814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com/","msgid":"<014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-03T19:14:43","name":"Specify signed/unsigned/dontcare in calls to extract_bit_field_1.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/014d01d9c63e$c36294b0$4a27be10$@nextmovesoftware.com/mbox/"},{"id":130846,"url":"https://patchwork.plctlab.org/api/1.2/patches/130846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwRo+jeVaS73px2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-03T20:44:19","name":"Fix profiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwRo+jeVaS73px2@kam.mff.cuni.cz/mbox/"},{"id":130849,"url":"https://patchwork.plctlab.org/api/1.2/patches/130849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwSXdJyms5onlrv@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-03T20:47:25","name":"Update estimated iteraitons counts after splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMwSXdJyms5onlrv@kam.mff.cuni.cz/mbox/"},{"id":130919,"url":"https://patchwork.plctlab.org/api/1.2/patches/130919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804022205.53108-1-pan2.li@intel.com/","msgid":"<20230804022205.53108-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T02:22:05","name":"[v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804022205.53108-1-pan2.li@intel.com/mbox/"},{"id":130933,"url":"https://patchwork.plctlab.org/api/1.2/patches/130933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804025848.327107-1-pan2.li@intel.com/","msgid":"<20230804025848.327107-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T02:58:48","name":"[v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804025848.327107-1-pan2.li@intel.com/mbox/"},{"id":130942,"url":"https://patchwork.plctlab.org/api/1.2/patches/130942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804032828.596526-1-pan2.li@intel.com/","msgid":"<20230804032828.596526-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T03:28:28","name":"[v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804032828.596526-1-pan2.li@intel.com/mbox/"},{"id":130970,"url":"https://patchwork.plctlab.org/api/1.2/patches/130970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f041b82554fd897f2a609a4d274716ad62d33c66.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-04T06:04:14","name":"[C] _Generic should not warn in non-active branches [PR68193,PR97100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f041b82554fd897f2a609a4d274716ad62d33c66.camel@tugraz.at/mbox/"},{"id":130973,"url":"https://patchwork.plctlab.org/api/1.2/patches/130973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804061018.945633-1-pan2.li@intel.com/","msgid":"<20230804061018.945633-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-04T06:10:18","name":"[v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804061018.945633-1-pan2.li@intel.com/mbox/"},{"id":130984,"url":"https://patchwork.plctlab.org/api/1.2/patches/130984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMylmGqvOtxn7pEf@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-04T07:15:36","name":"Disable loop distribution for loops with estimated iterations 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZMylmGqvOtxn7pEf@kam.mff.cuni.cz/mbox/"},{"id":131023,"url":"https://patchwork.plctlab.org/api/1.2/patches/131023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6b47491-2423-d911-6232-2b3b97137b64@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-08-04T08:57:23","name":"[avr,committed] Fix some typos in avr-mcus.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e6b47491-2423-d911-6232-2b3b97137b64@gjlay.de/mbox/"},{"id":131024,"url":"https://patchwork.plctlab.org/api/1.2/patches/131024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de/","msgid":"<34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de>","list_archive_url":null,"date":"2023-08-04T09:02:33","name":"[avr,committed] Add some more devices to avr-mcus.def.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de/mbox/"},{"id":131054,"url":"https://patchwork.plctlab.org/api/1.2/patches/131054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2b7daef-7a54-4f81-9cec-5fe24196f634@AZ-NEU-EX04.Arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-04T09:41:08","name":"mid-end: Use integral time intervals in timevar.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2b7daef-7a54-4f81-9cec-5fe24196f634@AZ-NEU-EX04.Arm.com/mbox/"},{"id":131068,"url":"https://patchwork.plctlab.org/api/1.2/patches/131068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101537.C02F313904@imap2.suse-dmz.suse.de/","msgid":"<20230804101537.C02F313904@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-04T10:15:37","name":"tree-optimization/110838 - less aggressively fold out-of-bound shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101537.C02F313904@imap2.suse-dmz.suse.de/mbox/"},{"id":131072,"url":"https://patchwork.plctlab.org/api/1.2/patches/131072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101959.1008513904@imap2.suse-dmz.suse.de/","msgid":"<20230804101959.1008513904@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-04T10:19:58","name":"tree-optimization/110838 - vectorization of widened right shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804101959.1008513904@imap2.suse-dmz.suse.de/mbox/"},{"id":131170,"url":"https://patchwork.plctlab.org/api/1.2/patches/131170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com/","msgid":"<1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com>","list_archive_url":null,"date":"2023-08-04T13:16:30","name":"[pushed,LRA] Check input insn pattern hard regs against early clobber hard regs for live info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a178e39-3da5-320a-b2ce-281ce2d70b7f@redhat.com/mbox/"},{"id":131215,"url":"https://patchwork.plctlab.org/api/1.2/patches/131215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982E6D99993A9BC82615B368309A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-04T15:05:39","name":"libatomic: Improve ifunc selection on AArch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982E6D99993A9BC82615B368309A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":131284,"url":"https://patchwork.plctlab.org/api/1.2/patches/131284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu/","msgid":"<07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu>","list_archive_url":null,"date":"2023-08-04T17:57:16","name":"Add -Wdisabled-optimization warning for not optimizing sibling calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07d4723b-d449-ccd1-d3cb-c7ee80bb97a0@purdue.edu/mbox/"},{"id":131295,"url":"https://patchwork.plctlab.org/api/1.2/patches/131295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZM0/srtB/QHE+vs2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-04T18:13:06","name":"_Decimal* to _BitInt conversion support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZM0/srtB/QHE+vs2@tucnak/mbox/"},{"id":131320,"url":"https://patchwork.plctlab.org/api/1.2/patches/131320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-2-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:29","name":"[V2,1/3] Provide counted_by attribute to flexible array member field (PR108896)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-2-qing.zhao@oracle.com/mbox/"},{"id":131321,"url":"https://patchwork.plctlab.org/api/1.2/patches/131321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-3-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:30","name":"[V2,2/3] Use the counted_by atribute info in builtin object size [PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-3-qing.zhao@oracle.com/mbox/"},{"id":131322,"url":"https://patchwork.plctlab.org/api/1.2/patches/131322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-4-qing.zhao@oracle.com/","msgid":"<20230804194431.993958-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-04T19:44:31","name":"[V2,3/3] Use the counted_by attribute information in bound sanitizer[PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804194431.993958-4-qing.zhao@oracle.com/mbox/"},{"id":131340,"url":"https://patchwork.plctlab.org/api/1.2/patches/131340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202213.1447631-1-dmalcolm@redhat.com/","msgid":"<20230804202213.1447631-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-04T20:22:13","name":"[pushed] analyzer: fix some svalue::dump_to_pp implementations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202213.1447631-1-dmalcolm@redhat.com/mbox/"},{"id":131341,"url":"https://patchwork.plctlab.org/api/1.2/patches/131341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202251.1447735-1-dmalcolm@redhat.com/","msgid":"<20230804202251.1447735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-04T20:22:51","name":"[pushed] analyzer: handle function attribute \"alloc_size\" [PR110426]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804202251.1447735-1-dmalcolm@redhat.com/mbox/"},{"id":131372,"url":"https://patchwork.plctlab.org/api/1.2/patches/131372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804214817.1256642-1-drross@redhat.com/","msgid":"<20230804214817.1256642-1-drross@redhat.com>","list_archive_url":null,"date":"2023-08-04T21:48:17","name":"match.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230804214817.1256642-1-drross@redhat.com/mbox/"},{"id":131497,"url":"https://patchwork.plctlab.org/api/1.2/patches/131497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAN3w5K-qLb7GkxqHjvJhYGZLM2wBJ8Pmv5eu6f83c5aOue3rdA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-05T15:57:56","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAN3w5K-qLb7GkxqHjvJhYGZLM2wBJ8Pmv5eu6f83c5aOue3rdA@mail.gmail.com/mbox/"},{"id":131500,"url":"https://patchwork.plctlab.org/api/1.2/patches/131500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at/","msgid":"<8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-05T16:22:43","name":"[committed] c: Less warnings for parameters declared as arrays [PR98536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8283eb31e9bd32b704bd337a846ea980c1d4e182.camel@tugraz.at/mbox/"},{"id":131504,"url":"https://patchwork.plctlab.org/api/1.2/patches/131504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffd3c7b1b0c71e13f40471aeef643b9c9e3c0353.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-05T16:33:04","name":"[C] Support typename as selector in _Generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffd3c7b1b0c71e13f40471aeef643b9c9e3c0353.camel@tugraz.at/mbox/"},{"id":131546,"url":"https://patchwork.plctlab.org/api/1.2/patches/131546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230805204324.2434846-1-apinski@marvell.com/","msgid":"<20230805204324.2434846-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-05T20:43:24","name":"MATCH: Extend min_value/max_value to pointer types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230805204324.2434846-1-apinski@marvell.com/mbox/"},{"id":131559,"url":"https://patchwork.plctlab.org/api/1.2/patches/131559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806033612.1078855-1-pan2.li@intel.com/","msgid":"<20230806033612.1078855-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-06T03:36:12","name":"[v1] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806033612.1078855-1-pan2.li@intel.com/mbox/"},{"id":131580,"url":"https://patchwork.plctlab.org/api/1.2/patches/131580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com/","msgid":"<4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com>","list_archive_url":null,"date":"2023-08-06T12:34:45","name":"[committed,_GLIBCXX_INLINE_VERSION] Add __cxa_call_terminate symbol export","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b226b8d-6b63-f994-7eb0-9e4641576ce5@gmail.com/mbox/"},{"id":131586,"url":"https://patchwork.plctlab.org/api/1.2/patches/131586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-1-c@jia.je/","msgid":"<20230806125010.283900-1-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:49:58","name":"[1/9] LoongArch: Introduce loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-1-c@jia.je/mbox/"},{"id":131581,"url":"https://patchwork.plctlab.org/api/1.2/patches/131581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-2-c@jia.je/","msgid":"<20230806125010.283900-2-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:49:59","name":"[2/9] LoongArch: Fix default ISA setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-2-c@jia.je/mbox/"},{"id":131582,"url":"https://patchwork.plctlab.org/api/1.2/patches/131582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-3-c@jia.je/","msgid":"<20230806125010.283900-3-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:00","name":"[3/9] LoongArch: Fix SI division for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-3-c@jia.je/mbox/"},{"id":131583,"url":"https://patchwork.plctlab.org/api/1.2/patches/131583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-4-c@jia.je/","msgid":"<20230806125010.283900-4-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:01","name":"[4/9] LoongArch: Fix movgr2frh.w operand order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-4-c@jia.je/mbox/"},{"id":131587,"url":"https://patchwork.plctlab.org/api/1.2/patches/131587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-5-c@jia.je/","msgid":"<20230806125010.283900-5-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:02","name":"[5/9] LoongArch: Fix 64-bit move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-5-c@jia.je/mbox/"},{"id":131589,"url":"https://patchwork.plctlab.org/api/1.2/patches/131589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-6-c@jia.je/","msgid":"<20230806125010.283900-6-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:03","name":"[6/9] LoongArch: Fix 64-bit immediate move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-6-c@jia.je/mbox/"},{"id":131584,"url":"https://patchwork.plctlab.org/api/1.2/patches/131584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-7-c@jia.je/","msgid":"<20230806125010.283900-7-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:04","name":"[7/9] LoongArch: Fix signed 32-bit overflow for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-7-c@jia.je/mbox/"},{"id":131585,"url":"https://patchwork.plctlab.org/api/1.2/patches/131585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-8-c@jia.je/","msgid":"<20230806125010.283900-8-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:05","name":"[8/9] LoongArch: Do not emit SF/DF <-> DI conversion in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-8-c@jia.je/mbox/"},{"id":131588,"url":"https://patchwork.plctlab.org/api/1.2/patches/131588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-9-c@jia.je/","msgid":"<20230806125010.283900-9-c@jia.je>","list_archive_url":null,"date":"2023-08-06T12:50:06","name":"[9/9] LoongArch: Add: Add -march=loongarch64 to tests with -mabi=lp64d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806125010.283900-9-c@jia.je/mbox/"},{"id":131624,"url":"https://patchwork.plctlab.org/api/1.2/patches/131624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806181535.71101-1-gnaggnoyil@gmail.com/","msgid":"<20230806181535.71101-1-gnaggnoyil@gmail.com>","list_archive_url":null,"date":"2023-08-06T18:15:35","name":"c++: follow DR 2386 and update implementation of get_tuple_size [PR110216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230806181535.71101-1-gnaggnoyil@gmail.com/mbox/"},{"id":131626,"url":"https://patchwork.plctlab.org/api/1.2/patches/131626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAB3BD7KOYK4iiJ@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-06T20:26:04","name":"Fix profile update after peeled epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAB3BD7KOYK4iiJ@kam.mff.cuni.cz/mbox/"},{"id":131629,"url":"https://patchwork.plctlab.org/api/1.2/patches/131629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com/","msgid":"<004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-06T22:28:05","name":"[Committed] Avoid FAIL of gcc.target/i386/pr110792.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c8b5$465df9e0$d319eda0$@nextmovesoftware.com/mbox/"},{"id":131630,"url":"https://patchwork.plctlab.org/api/1.2/patches/131630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAlGtgck9vLOX9a@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-06T22:56:26","name":"Fix profile update after versioning ifconverted loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNAlGtgck9vLOX9a@kam.mff.cuni.cz/mbox/"},{"id":131657,"url":"https://patchwork.plctlab.org/api/1.2/patches/131657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807040140.14796-1-chenxiaolong@loongson.cn/","msgid":"<20230807040140.14796-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-07T04:01:40","name":"[v1] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807040140.14796-1-chenxiaolong@loongson.cn/mbox/"},{"id":131666,"url":"https://patchwork.plctlab.org/api/1.2/patches/131666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807050631.2514046-1-apinski@marvell.com/","msgid":"<20230807050631.2514046-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-07T05:06:31","name":"MATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807050631.2514046-1-apinski@marvell.com/mbox/"},{"id":131721,"url":"https://patchwork.plctlab.org/api/1.2/patches/131721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com/","msgid":"<004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-08-07T07:37:01","name":"PR target/107671: Make more use of btl/btq on x86_64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004b01d9c901$f5bb66b0$e1323410$@nextmovesoftware.com/mbox/"},{"id":131754,"url":"https://patchwork.plctlab.org/api/1.2/patches/131754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085401.288265-1-hongtao.liu@intel.com/","msgid":"<20230807085401.288265-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-07T08:54:01","name":"Fix ICE in rtl check when bootstrap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085401.288265-1-hongtao.liu@intel.com/mbox/"},{"id":131755,"url":"https://patchwork.plctlab.org/api/1.2/patches/131755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085701.302936-1-hongtao.liu@intel.com/","msgid":"<20230807085701.302936-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-07T08:57:01","name":"i386: Clear upper bits of XMM register for V4HFmode/V2HFmode operations [PR110762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807085701.302936-1-hongtao.liu@intel.com/mbox/"},{"id":131759,"url":"https://patchwork.plctlab.org/api/1.2/patches/131759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddbkfji5ax.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-07T09:13:10","name":"libsanitizer: Fix SPARC stacktraces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddbkfji5ax.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":131766,"url":"https://patchwork.plctlab.org/api/1.2/patches/131766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807092715.31994-1-juzhe.zhong@rivai.ai/","msgid":"<20230807092715.31994-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:27:15","name":"RISC-V: Support VLS basic operation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807092715.31994-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131768,"url":"https://patchwork.plctlab.org/api/1.2/patches/131768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093812.1716553-1-juzhe.zhong@rivai.ai/","msgid":"<20230807093812.1716553-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:38:12","name":"[V4] VECT: Support CALL vectorization for COND_LEN_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093812.1716553-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131769,"url":"https://patchwork.plctlab.org/api/1.2/patches/131769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093846.150132-1-juzhe.zhong@rivai.ai/","msgid":"<20230807093846.150132-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-07T09:38:46","name":"tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807093846.150132-1-juzhe.zhong@rivai.ai/mbox/"},{"id":131778,"url":"https://patchwork.plctlab.org/api/1.2/patches/131778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-2-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-2-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:58:59","name":"[1/3,v4] Support get_or_insert in ordered_hash_map","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-2-andrzej.turko@gmail.com/mbox/"},{"id":131780,"url":"https://patchwork.plctlab.org/api/1.2/patches/131780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-3-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-3-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:59:00","name":"[2/3,v4] genmatch: Reduce variability of generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-3-andrzej.turko@gmail.com/mbox/"},{"id":131779,"url":"https://patchwork.plctlab.org/api/1.2/patches/131779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-4-andrzej.turko@gmail.com/","msgid":"<20230807095901.267099-4-andrzej.turko@gmail.com>","list_archive_url":null,"date":"2023-08-07T09:59:01","name":"[3/3,v4] genmatch: Log line numbers indirectly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807095901.267099-4-andrzej.turko@gmail.com/mbox/"},{"id":131784,"url":"https://patchwork.plctlab.org/api/1.2/patches/131784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com/","msgid":"<5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com>","list_archive_url":null,"date":"2023-08-07T10:26:59","name":"fwprop: Allow UNARY_P and check register pressure.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a90c8a9-1570-5af4-bfdc-19d097bfee6e@gmail.com/mbox/"},{"id":131804,"url":"https://patchwork.plctlab.org/api/1.2/patches/131804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-2-arsen@aarsen.me/","msgid":"<20230807105935.2098236-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:43","name":"[01/24] toplevel: Substitute GDCFLAGS instead of using CFLAGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-2-arsen@aarsen.me/mbox/"},{"id":131810,"url":"https://patchwork.plctlab.org/api/1.2/patches/131810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-3-arsen@aarsen.me/","msgid":"<20230807105935.2098236-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:44","name":"[02/24] PR29961, plugin-api.h: \"Could not detect architecture endianess\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-3-arsen@aarsen.me/mbox/"},{"id":131807,"url":"https://patchwork.plctlab.org/api/1.2/patches/131807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-4-arsen@aarsen.me/","msgid":"<20230807105935.2098236-4-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:45","name":"[03/24] gcc-4.5 build fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-4-arsen@aarsen.me/mbox/"},{"id":131822,"url":"https://patchwork.plctlab.org/api/1.2/patches/131822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-5-arsen@aarsen.me/","msgid":"<20230807105935.2098236-5-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:46","name":"[04/24] Sync with binutils: GCC: Pass --plugin to AR and RANLIB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-5-arsen@aarsen.me/mbox/"},{"id":131818,"url":"https://patchwork.plctlab.org/api/1.2/patches/131818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-6-arsen@aarsen.me/","msgid":"<20230807105935.2098236-6-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:47","name":"[05/24] GCC: Check if AR works with --plugin and rc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-6-arsen@aarsen.me/mbox/"},{"id":131811,"url":"https://patchwork.plctlab.org/api/1.2/patches/131811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-7-arsen@aarsen.me/","msgid":"<20230807105935.2098236-7-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:48","name":"[06/24] toplevel: Recover tilegx/tilepro targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-7-arsen@aarsen.me/mbox/"},{"id":131815,"url":"https://patchwork.plctlab.org/api/1.2/patches/131815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-8-arsen@aarsen.me/","msgid":"<20230807105935.2098236-8-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:49","name":"[07/24] binutils, gdb: support zstd compressed debug sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-8-arsen@aarsen.me/mbox/"},{"id":131814,"url":"https://patchwork.plctlab.org/api/1.2/patches/131814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-9-arsen@aarsen.me/","msgid":"<20230807105935.2098236-9-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:50","name":"[08/24] configure: require libzstd >= 1.4.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-9-arsen@aarsen.me/mbox/"},{"id":131806,"url":"https://patchwork.plctlab.org/api/1.2/patches/131806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-10-arsen@aarsen.me/","msgid":"<20230807105935.2098236-10-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:51","name":"[09/24] add --enable-default-compressed-debug-sections-algorithm configure option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-10-arsen@aarsen.me/mbox/"},{"id":131835,"url":"https://patchwork.plctlab.org/api/1.2/patches/131835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-11-arsen@aarsen.me/","msgid":"<20230807105935.2098236-11-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:52","name":"[10/24] gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-11-arsen@aarsen.me/mbox/"},{"id":131809,"url":"https://patchwork.plctlab.org/api/1.2/patches/131809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-12-arsen@aarsen.me/","msgid":"<20230807105935.2098236-12-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:53","name":"[11/24] Disable year 2038 support on 32-bit hosts by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-12-arsen@aarsen.me/mbox/"},{"id":131819,"url":"https://patchwork.plctlab.org/api/1.2/patches/131819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-13-arsen@aarsen.me/","msgid":"<20230807105935.2098236-13-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:54","name":"[12/24] Pass PKG_CONFIG_PATH down from top-level Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-13-arsen@aarsen.me/mbox/"},{"id":131854,"url":"https://patchwork.plctlab.org/api/1.2/patches/131854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-14-arsen@aarsen.me/","msgid":"<20230807105935.2098236-14-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:55","name":"[13/24] configure: reinstate 32b PA-RISC HP-UX target in toplevel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-14-arsen@aarsen.me/mbox/"},{"id":131858,"url":"https://patchwork.plctlab.org/api/1.2/patches/131858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-15-arsen@aarsen.me/","msgid":"<20230807105935.2098236-15-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:56","name":"[14/24] libtool.m4: fix nm BSD flag detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-15-arsen@aarsen.me/mbox/"},{"id":131853,"url":"https://patchwork.plctlab.org/api/1.2/patches/131853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-16-arsen@aarsen.me/","msgid":"<20230807105935.2098236-16-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:57","name":"[15/24] libtool.m4: fix the NM=\"/nm/over/here -B/option/with/path\" case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-16-arsen@aarsen.me/mbox/"},{"id":131856,"url":"https://patchwork.plctlab.org/api/1.2/patches/131856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-17-arsen@aarsen.me/","msgid":"<20230807105935.2098236-17-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:58","name":"[16/24] Add support for the haiku operating system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-17-arsen@aarsen.me/mbox/"},{"id":131827,"url":"https://patchwork.plctlab.org/api/1.2/patches/131827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-18-arsen@aarsen.me/","msgid":"<20230807105935.2098236-18-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:32:59","name":"[17/24] egrep in binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-18-arsen@aarsen.me/mbox/"},{"id":131820,"url":"https://patchwork.plctlab.org/api/1.2/patches/131820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-19-arsen@aarsen.me/","msgid":"<20230807105935.2098236-19-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:00","name":"[18/24] PR27116, Spelling errors found by Debian style checker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-19-arsen@aarsen.me/mbox/"},{"id":131865,"url":"https://patchwork.plctlab.org/api/1.2/patches/131865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-20-arsen@aarsen.me/","msgid":"<20230807105935.2098236-20-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:01","name":"[19/24] Deprecate a.out support for NetBSD targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-20-arsen@aarsen.me/mbox/"},{"id":131825,"url":"https://patchwork.plctlab.org/api/1.2/patches/131825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-21-arsen@aarsen.me/","msgid":"<20230807105935.2098236-21-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:02","name":"[20/24] PKG_CHECK_MODULES: Check if $pkg_cv_[]$1[]_LIBS works","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-21-arsen@aarsen.me/mbox/"},{"id":131824,"url":"https://patchwork.plctlab.org/api/1.2/patches/131824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-22-arsen@aarsen.me/","msgid":"<20230807105935.2098236-22-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:03","name":"[21/24] PKG_CHECK_MODULES: Properly check if $pkg_cv_[]$1[]_LIBS works","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-22-arsen@aarsen.me/mbox/"},{"id":131868,"url":"https://patchwork.plctlab.org/api/1.2/patches/131868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-23-arsen@aarsen.me/","msgid":"<20230807105935.2098236-23-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:04","name":"[22/24] libtool.m4: augment symcode for Solaris 11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-23-arsen@aarsen.me/mbox/"},{"id":131837,"url":"https://patchwork.plctlab.org/api/1.2/patches/131837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-24-arsen@aarsen.me/","msgid":"<20230807105935.2098236-24-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:05","name":"[23/24] bfd: linker: merge .sframe sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-24-arsen@aarsen.me/mbox/"},{"id":131859,"url":"https://patchwork.plctlab.org/api/1.2/patches/131859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-25-arsen@aarsen.me/","msgid":"<20230807105935.2098236-25-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-07T10:33:06","name":"[24/24] toplevel: Makefile.def: add install-strip dependency on libsframe","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807105935.2098236-25-arsen@aarsen.me/mbox/"},{"id":131798,"url":"https://patchwork.plctlab.org/api/1.2/patches/131798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111622.2854826-1-poulhies@adacore.com/","msgid":"<20230807111622.2854826-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:22","name":"[COMMITTED] ada: Spurious error on class-wide preconditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111622.2854826-1-poulhies@adacore.com/mbox/"},{"id":131799,"url":"https://patchwork.plctlab.org/api/1.2/patches/131799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111637.2854994-1-poulhies@adacore.com/","msgid":"<20230807111637.2854994-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:37","name":"[COMMITTED] ada: Crash in GNATprove due to wrong detection of inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111637.2854994-1-poulhies@adacore.com/mbox/"},{"id":131800,"url":"https://patchwork.plctlab.org/api/1.2/patches/131800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111639.2855057-1-poulhies@adacore.com/","msgid":"<20230807111639.2855057-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:39","name":"[COMMITTED] ada: Extend precondition of Interfaces.C.String.Value with Length","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111639.2855057-1-poulhies@adacore.com/mbox/"},{"id":131801,"url":"https://patchwork.plctlab.org/api/1.2/patches/131801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111641.2855120-1-poulhies@adacore.com/","msgid":"<20230807111641.2855120-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-08-07T11:16:41","name":"[COMMITTED] ada: Refactor multiple returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807111641.2855120-1-poulhies@adacore.com/mbox/"},{"id":131849,"url":"https://patchwork.plctlab.org/api/1.2/patches/131849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807113105.437693-1-manolis.tsamis@vrull.eu/","msgid":"<20230807113105.437693-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-07T11:31:05","name":"cprop_hardreg: Allow more propagation of the stack pointer.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807113105.437693-1-manolis.tsamis@vrull.eu/mbox/"},{"id":131909,"url":"https://patchwork.plctlab.org/api/1.2/patches/131909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807122247.1881775-1-pan2.li@intel.com/","msgid":"<20230807122247.1881775-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-07T12:22:47","name":"[v1] Mode-Switching: Fix SET_SRC ICE when only one operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807122247.1881775-1-pan2.li@intel.com/mbox/"},{"id":131960,"url":"https://patchwork.plctlab.org/api/1.2/patches/131960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807131635.CE5733857C41@sourceware.org/","msgid":"<20230807131635.CE5733857C41@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:15:52","name":"Improve -fopt-info-vec for basic-block vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807131635.CE5733857C41@sourceware.org/mbox/"},{"id":131967,"url":"https://patchwork.plctlab.org/api/1.2/patches/131967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807132242.759603858000@sourceware.org/","msgid":"<20230807132242.759603858000@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:21:59","name":"Use RPO order for sinking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807132242.759603858000@sourceware.org/mbox/"},{"id":131984,"url":"https://patchwork.plctlab.org/api/1.2/patches/131984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133135.04FB838582A1@sourceware.org/","msgid":"<20230807133135.04FB838582A1@sourceware.org>","list_archive_url":null,"date":"2023-08-07T13:30:50","name":"tree-optimization/49955 - BB reduction with odd number of lanes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133135.04FB838582A1@sourceware.org/mbox/"},{"id":131992,"url":"https://patchwork.plctlab.org/api/1.2/patches/131992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133241.197319-2-stefansf@linux.ibm.com/","msgid":"<20230807133241.197319-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-07T13:32:42","name":"rtl-optimization/110869 Fix tests cmp-mem-const-*.c for sparc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807133241.197319-2-stefansf@linux.ibm.com/mbox/"},{"id":132025,"url":"https://patchwork.plctlab.org/api/1.2/patches/132025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5af4407-1538-802f-92ca-aae843258c15@siemens.com/","msgid":"","list_archive_url":null,"date":"2023-08-07T13:58:27","name":"[OpenACC,2.7,v2] readonly modifier support in front-ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5af4407-1538-802f-92ca-aae843258c15@siemens.com/mbox/"},{"id":132068,"url":"https://patchwork.plctlab.org/api/1.2/patches/132068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807142216.1857701-1-qing.zhao@oracle.com/","msgid":"<20230807142216.1857701-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-07T14:22:16","name":"[V2] gcc-14/changes.html: Deprecate a GCC C extension on flexible array members.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807142216.1857701-1-qing.zhao@oracle.com/mbox/"},{"id":132093,"url":"https://patchwork.plctlab.org/api/1.2/patches/132093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807143324.656791-1-manolis.tsamis@vrull.eu/","msgid":"<20230807143324.656791-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-07T14:33:24","name":"[v4] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807143324.656791-1-manolis.tsamis@vrull.eu/mbox/"},{"id":132115,"url":"https://patchwork.plctlab.org/api/1.2/patches/132115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807144534.2538500-1-apinski@marvell.com/","msgid":"<20230807144534.2538500-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-07T14:45:34","name":"VR-VALUES [PR28794]: optimize compare assignments also","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807144534.2538500-1-apinski@marvell.com/mbox/"},{"id":132133,"url":"https://patchwork.plctlab.org/api/1.2/patches/132133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com/","msgid":"<8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com>","list_archive_url":null,"date":"2023-08-07T15:06:25","name":"[committed,RISC-V] Handle more cases in riscv_expand_conditional_move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a79e0aa-f507-b5d3-c5a7-ca292c1b0aaf@gmail.com/mbox/"},{"id":132290,"url":"https://patchwork.plctlab.org/api/1.2/patches/132290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807172917.10439-1-david.faust@oracle.com/","msgid":"<20230807172917.10439-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-07T17:29:17","name":"[COMMITTED] MAINTAINERS: Add myself as a BPF port reviewer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807172917.10439-1-david.faust@oracle.com/mbox/"},{"id":132299,"url":"https://patchwork.plctlab.org/api/1.2/patches/132299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com/","msgid":"<5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-07T17:50:09","name":"[ver,3] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c776123d5122c174875a9a7e5e47e59f22a66ea.camel@us.ibm.com/mbox/"},{"id":132318,"url":"https://patchwork.plctlab.org/api/1.2/patches/132318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNE8SVeUupRLUJ1u@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-07T18:47:37","name":"_BitInt to _Decimal* conversion support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNE8SVeUupRLUJ1u@tucnak/mbox/"},{"id":132364,"url":"https://patchwork.plctlab.org/api/1.2/patches/132364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com/","msgid":"<4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com>","list_archive_url":null,"date":"2023-08-07T20:20:07","name":"vect: Add a popcount fallback.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d0d53a0-20d2-5b98-c4f9-67b624a27269@gmail.com/mbox/"},{"id":132368,"url":"https://patchwork.plctlab.org/api/1.2/patches/132368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f913b618-f708-2018-898b-57a8b84bb07f@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-07T20:36:37","name":"[committed,RISC-V] Don'\''t reject constants in cmov condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f913b618-f708-2018-898b-57a8b84bb07f@ventanamicro.com/mbox/"},{"id":132387,"url":"https://patchwork.plctlab.org/api/1.2/patches/132387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211234.701538-1-jwakely@redhat.com/","msgid":"<20230807211234.701538-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:12:11","name":"[committed] libstdc++: Fix past-the-end increment in std::format [PR110862]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211234.701538-1-jwakely@redhat.com/mbox/"},{"id":132388,"url":"https://patchwork.plctlab.org/api/1.2/patches/132388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211335.701619-1-jwakely@redhat.com/","msgid":"<20230807211335.701619-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:12:35","name":"[committed] i386: Fix grammar typo in diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211335.701619-1-jwakely@redhat.com/mbox/"},{"id":132391,"url":"https://patchwork.plctlab.org/api/1.2/patches/132391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211421.701784-1-jwakely@redhat.com/","msgid":"<20230807211421.701784-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:14:01","name":"[committed] libstdc++: Constrain __format::_Iter_sink for contiguous iterators [PR110917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211421.701784-1-jwakely@redhat.com/mbox/"},{"id":132390,"url":"https://patchwork.plctlab.org/api/1.2/patches/132390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211428.701867-1-jwakely@redhat.com/","msgid":"<20230807211428.701867-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-07T21:14:22","name":"[committed] libstdc++: Fix incorrect use of abs and log10 in std::format [PR110860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230807211428.701867-1-jwakely@redhat.com/mbox/"},{"id":132468,"url":"https://patchwork.plctlab.org/api/1.2/patches/132468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808005424.2563140-1-apinski@marvell.com/","msgid":"<20230808005424.2563140-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-08T00:54:24","name":"MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808005424.2563140-1-apinski@marvell.com/mbox/"},{"id":132477,"url":"https://patchwork.plctlab.org/api/1.2/patches/132477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808013709.168452-1-juzhe.zhong@rivai.ai/","msgid":"<20230808013709.168452-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T01:37:09","name":"RISC-V: Support VLS shift vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808013709.168452-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132481,"url":"https://patchwork.plctlab.org/api/1.2/patches/132481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808020902.11626-1-chenxiaolong@loongson.cn/","msgid":"<20230808020902.11626-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-08T02:09:02","name":"[v2] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808020902.11626-1-chenxiaolong@loongson.cn/mbox/"},{"id":132482,"url":"https://patchwork.plctlab.org/api/1.2/patches/132482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808021342.26774-1-chenxiaolong@loongson.cn/","msgid":"<20230808021342.26774-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-08T02:13:42","name":"[v2] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808021342.26774-1-chenxiaolong@loongson.cn/mbox/"},{"id":132488,"url":"https://patchwork.plctlab.org/api/1.2/patches/132488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGrEWUqh3KeQ9LD@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-08T02:40:17","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGrEWUqh3KeQ9LD@Thaum.localdomain/mbox/"},{"id":132489,"url":"https://patchwork.plctlab.org/api/1.2/patches/132489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGtCxzbJwkSXvCy@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-08T02:48:43","name":"c++: Report invalid id-expression in decltype [PR100482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNGtCxzbJwkSXvCy@Thaum.localdomain/mbox/"},{"id":132496,"url":"https://patchwork.plctlab.org/api/1.2/patches/132496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808030929.502310-1-pan2.li@intel.com/","msgid":"<20230808030929.502310-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-08T03:09:29","name":"[v2] Mode-Switching: Fix SET_SRC ICE when USE or CLOBBER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808030929.502310-1-pan2.li@intel.com/mbox/"},{"id":132497,"url":"https://patchwork.plctlab.org/api/1.2/patches/132497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808031016.262528-1-juzhe.zhong@rivai.ai/","msgid":"<20230808031016.262528-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T03:10:16","name":"RISC-V: Support neg VLS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808031016.262528-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132504,"url":"https://patchwork.plctlab.org/api/1.2/patches/132504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808041232.15387-1-shiyulong@iscas.ac.cn/","msgid":"<20230808041232.15387-1-shiyulong@iscas.ac.cn>","list_archive_url":null,"date":"2023-08-08T04:12:32","name":"[V1] RISC-V: Fix a bug that causes an error insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808041232.15387-1-shiyulong@iscas.ac.cn/mbox/"},{"id":132507,"url":"https://patchwork.plctlab.org/api/1.2/patches/132507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808052508.968486-1-pan2.li@intel.com/","msgid":"<20230808052508.968486-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-08T05:25:08","name":"[v2] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808052508.968486-1-pan2.li@intel.com/mbox/"},{"id":132510,"url":"https://patchwork.plctlab.org/api/1.2/patches/132510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-2-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:10","name":"[1/3] Initial support for AVX10.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-2-haochen.jiang@intel.com/mbox/"},{"id":132509,"url":"https://patchwork.plctlab.org/api/1.2/patches/132509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-3-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:11","name":"[2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-3-haochen.jiang@intel.com/mbox/"},{"id":132508,"url":"https://patchwork.plctlab.org/api/1.2/patches/132508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-4-haochen.jiang@intel.com/","msgid":"<20230808071312.1569559-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:13:12","name":"[3/3] Emit a warning when AVX10 options conflict in vector width","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071312.1569559-4-haochen.jiang@intel.com/mbox/"},{"id":132511,"url":"https://patchwork.plctlab.org/api/1.2/patches/132511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071947.1570053-1-haochen.jiang@intel.com/","msgid":"<20230808071947.1570053-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:19:47","name":"[1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808071947.1570053-1-haochen.jiang@intel.com/mbox/"},{"id":132512,"url":"https://patchwork.plctlab.org/api/1.2/patches/132512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072004.1570107-1-haochen.jiang@intel.com/","msgid":"<20230808072004.1570107-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:04","name":"[2/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072004.1570107-1-haochen.jiang@intel.com/mbox/"},{"id":132513,"url":"https://patchwork.plctlab.org/api/1.2/patches/132513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072019.1570162-1-haochen.jiang@intel.com/","msgid":"<20230808072019.1570162-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:19","name":"[3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072019.1570162-1-haochen.jiang@intel.com/mbox/"},{"id":132515,"url":"https://patchwork.plctlab.org/api/1.2/patches/132515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072031.1570222-1-haochen.jiang@intel.com/","msgid":"<20230808072031.1570222-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:31","name":"[4/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072031.1570222-1-haochen.jiang@intel.com/mbox/"},{"id":132514,"url":"https://patchwork.plctlab.org/api/1.2/patches/132514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072046.1570283-1-haochen.jiang@intel.com/","msgid":"<20230808072046.1570283-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:46","name":"[5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072046.1570283-1-haochen.jiang@intel.com/mbox/"},{"id":132516,"url":"https://patchwork.plctlab.org/api/1.2/patches/132516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072059.1570341-1-haochen.jiang@intel.com/","msgid":"<20230808072059.1570341-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-08T07:20:59","name":"[6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808072059.1570341-1-haochen.jiang@intel.com/mbox/"},{"id":132517,"url":"https://patchwork.plctlab.org/api/1.2/patches/132517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808075600.1878105-1-hongtao.liu@intel.com/","msgid":"<20230808075600.1878105-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-08T07:56:00","name":"[X86] Workaround possible CPUID bug in Sandy Bridge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808075600.1878105-1-hongtao.liu@intel.com/mbox/"},{"id":132518,"url":"https://patchwork.plctlab.org/api/1.2/patches/132518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808113259.363524-1-juzhe.zhong@rivai.ai/","msgid":"<20230808113259.363524-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-08T11:32:59","name":"RISC-V: Allow CONST_VECTOR for VLS modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808113259.363524-1-juzhe.zhong@rivai.ai/mbox/"},{"id":132521,"url":"https://patchwork.plctlab.org/api/1.2/patches/132521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808115709.380001-1-lehua.ding@rivai.ai/","msgid":"<20230808115709.380001-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-08T11:57:09","name":"RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808115709.380001-1-lehua.ding@rivai.ai/mbox/"},{"id":132522,"url":"https://patchwork.plctlab.org/api/1.2/patches/132522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808122353.CF6F713451@imap2.suse-dmz.suse.de/","msgid":"<20230808122353.CF6F713451@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-08T12:23:53","name":"tree-optimization/110924 - fix vop liveness for noreturn const CFG parts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808122353.CF6F713451@imap2.suse-dmz.suse.de/mbox/"},{"id":132523,"url":"https://patchwork.plctlab.org/api/1.2/patches/132523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com/","msgid":"<334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com>","list_archive_url":null,"date":"2023-08-08T13:04:21","name":"[GCC] aarch64: Add support for Cortex-A520 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com/mbox/"},{"id":132525,"url":"https://patchwork.plctlab.org/api/1.2/patches/132525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNJIRJ2p49HBjcMn@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-08T13:51:00","name":"testsuite: Add runtime _BitInt stdatomic.h tests [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNJIRJ2p49HBjcMn@tucnak/mbox/"},{"id":132527,"url":"https://patchwork.plctlab.org/api/1.2/patches/132527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808150121.318595-1-christophe.lyon@linaro.org/","msgid":"<20230808150121.318595-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-08T15:01:21","name":"testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-[123].c [PR 110426]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808150121.318595-1-christophe.lyon@linaro.org/mbox/"},{"id":132569,"url":"https://patchwork.plctlab.org/api/1.2/patches/132569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Ze_MJqEnWFkvukyRLBqWgyScgaPP5wN+bCfYN2yaVdqA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-08T16:59:58","name":"[committed] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Ze_MJqEnWFkvukyRLBqWgyScgaPP5wN+bCfYN2yaVdqA@mail.gmail.com/mbox/"},{"id":132589,"url":"https://patchwork.plctlab.org/api/1.2/patches/132589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ilqw4h.fsf@oracle.com/","msgid":"<87y1ilqw4h.fsf@oracle.com>","list_archive_url":null,"date":"2023-08-08T17:31:10","name":"bpf: Fixed GC mistakes in BPF builtins code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ilqw4h.fsf@oracle.com/mbox/"},{"id":132884,"url":"https://patchwork.plctlab.org/api/1.2/patches/132884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0433672-8310-b1aa-653c-a83b9bad3de3@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-08T21:40:07","name":"[committed,RISC-V] Fix bug in condition canonicalization for zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0433672-8310-b1aa-653c-a83b9bad3de3@ventanamicro.com/mbox/"},{"id":132900,"url":"https://patchwork.plctlab.org/api/1.2/patches/132900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808215214.19929-1-patrick@rivosinc.com/","msgid":"<20230808215214.19929-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-08T21:52:14","name":"[v3] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808215214.19929-1-patrick@rivosinc.com/mbox/"},{"id":132927,"url":"https://patchwork.plctlab.org/api/1.2/patches/132927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808223405.35178-1-palevichva@gmail.com/","msgid":"<20230808223405.35178-1-palevichva@gmail.com>","list_archive_url":null,"date":"2023-08-08T22:34:05","name":"libstdc++: fix memory clobbering in std::vector [PR110879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230808223405.35178-1-palevichva@gmail.com/mbox/"},{"id":133018,"url":"https://patchwork.plctlab.org/api/1.2/patches/133018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809014756.19615-1-hongtao.liu@intel.com/","msgid":"<20230809014756.19615-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-09T01:47:56","name":"[V2,X86] Workaround possible CPUID bug in Sandy Bridge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809014756.19615-1-hongtao.liu@intel.com/mbox/"},{"id":133035,"url":"https://patchwork.plctlab.org/api/1.2/patches/133035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809030511.857619-1-pan2.li@intel.com/","msgid":"<20230809030511.857619-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-09T03:05:11","name":"[v3] Mode-Switching: Fix SET_SRC ICE when CLOBBER insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809030511.857619-1-pan2.li@intel.com/mbox/"},{"id":133067,"url":"https://patchwork.plctlab.org/api/1.2/patches/133067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com/","msgid":"<7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:09:21","name":"RISC-V: Remove non-existing '\''Zve32d'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7997c0b9f3f205d6e16fa5017503dd8f80f5e951.1691561357.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133068,"url":"https://patchwork.plctlab.org/api/1.2/patches/133068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com/","msgid":"<83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:11:50","name":"[RFC,1/2] RISC-V: __builtin_riscv_pause for all environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83ae75c6dcbca1d37849305a79d9e2e712ceb5b0.1691561509.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133069,"url":"https://patchwork.plctlab.org/api/1.2/patches/133069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com/","msgid":"<9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-09T06:11:51","name":"[RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133071,"url":"https://patchwork.plctlab.org/api/1.2/patches/133071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809063622.316743-1-juzhe.zhong@rivai.ai/","msgid":"<20230809063622.316743-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T06:36:22","name":"VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809063622.316743-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133077,"url":"https://patchwork.plctlab.org/api/1.2/patches/133077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809065138.1392231-1-hongtao.liu@intel.com/","msgid":"<20230809065138.1392231-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-09T06:51:38","name":"Rename local variable subleaf_level to max_subleaf_level.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809065138.1392231-1-hongtao.liu@intel.com/mbox/"},{"id":133158,"url":"https://patchwork.plctlab.org/api/1.2/patches/133158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809105142.3163887-1-juzhe.zhong@rivai.ai/","msgid":"<20230809105142.3163887-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T10:51:42","name":"RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809105142.3163887-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133159,"url":"https://patchwork.plctlab.org/api/1.2/patches/133159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809110244.2966438582B0@sourceware.org/","msgid":"<20230809110244.2966438582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-09T11:02:00","name":"Remove insert location argument from vectorizable_live_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809110244.2966438582B0@sourceware.org/mbox/"},{"id":133171,"url":"https://patchwork.plctlab.org/api/1.2/patches/133171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-2-c@jia.je/","msgid":"<20230809115325.3716347-2-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:08","name":"[v2,01/14] LoongArch: Introduce loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-2-c@jia.je/mbox/"},{"id":133167,"url":"https://patchwork.plctlab.org/api/1.2/patches/133167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-3-c@jia.je/","msgid":"<20230809115325.3716347-3-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:09","name":"[v2,02/14] LoongArch: Fix default ISA setting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-3-c@jia.je/mbox/"},{"id":133174,"url":"https://patchwork.plctlab.org/api/1.2/patches/133174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-4-c@jia.je/","msgid":"<20230809115325.3716347-4-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:10","name":"[v2,03/14] LoongArch: Fix SI division for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-4-c@jia.je/mbox/"},{"id":133170,"url":"https://patchwork.plctlab.org/api/1.2/patches/133170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-5-c@jia.je/","msgid":"<20230809115325.3716347-5-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:11","name":"[v2,04/14] LoongArch: Fix movgr2frh.w operand order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-5-c@jia.je/mbox/"},{"id":133169,"url":"https://patchwork.plctlab.org/api/1.2/patches/133169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-6-c@jia.je/","msgid":"<20230809115325.3716347-6-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:12","name":"[v2,05/14] LoongArch: Fix 64-bit move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-6-c@jia.je/mbox/"},{"id":133173,"url":"https://patchwork.plctlab.org/api/1.2/patches/133173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-7-c@jia.je/","msgid":"<20230809115325.3716347-7-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:13","name":"[v2,06/14] LoongArch: Fix 64-bit immediate move for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-7-c@jia.je/mbox/"},{"id":133176,"url":"https://patchwork.plctlab.org/api/1.2/patches/133176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-8-c@jia.je/","msgid":"<20230809115325.3716347-8-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:14","name":"[v2,07/14] LoongArch: Fix signed 32-bit overflow for loongarch32 target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-8-c@jia.je/mbox/"},{"id":133177,"url":"https://patchwork.plctlab.org/api/1.2/patches/133177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-9-c@jia.je/","msgid":"<20230809115325.3716347-9-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:15","name":"[v2,08/14] LoongArch: Disable SF/DF -> unsigned DI expand in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-9-c@jia.je/mbox/"},{"id":133180,"url":"https://patchwork.plctlab.org/api/1.2/patches/133180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-10-c@jia.je/","msgid":"<20230809115325.3716347-10-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:16","name":"[v2,09/14] LoongArch: Add -march=loongarch64 to tests with -mabi=lp64d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-10-c@jia.je/mbox/"},{"id":133182,"url":"https://patchwork.plctlab.org/api/1.2/patches/133182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-11-c@jia.je/","msgid":"<20230809115325.3716347-11-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:17","name":"[v2,10/14] LoongArch: Forbid ADDRESS_REG_REG in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-11-c@jia.je/mbox/"},{"id":133186,"url":"https://patchwork.plctlab.org/api/1.2/patches/133186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-12-c@jia.je/","msgid":"<20230809115325.3716347-12-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:18","name":"[v2,11/14] LoongArch: Mark am* instructions as LA64-only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-12-c@jia.je/mbox/"},{"id":133172,"url":"https://patchwork.plctlab.org/api/1.2/patches/133172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-13-c@jia.je/","msgid":"<20230809115325.3716347-13-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:19","name":"[v2,12/14] LoongArch: Set long double width to 128 in la32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-13-c@jia.je/mbox/"},{"id":133181,"url":"https://patchwork.plctlab.org/api/1.2/patches/133181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-14-c@jia.je/","msgid":"<20230809115325.3716347-14-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:20","name":"[v2,13/14] LoongArch: Fix ilp32 detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-14-c@jia.je/mbox/"},{"id":133183,"url":"https://patchwork.plctlab.org/api/1.2/patches/133183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-15-c@jia.je/","msgid":"<20230809115325.3716347-15-c@jia.je>","list_archive_url":null,"date":"2023-08-09T11:46:21","name":"[v2,14/14] LoongArch: Allow ftintrz for DF->DI in loongarch32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809115325.3716347-15-c@jia.je/mbox/"},{"id":133197,"url":"https://patchwork.plctlab.org/api/1.2/patches/133197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809121840.3576116-1-juzhe.zhong@rivai.ai/","msgid":"<20230809121840.3576116-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-09T12:18:40","name":"RISC-V: Support NPATTERNS = 1 stepped vector[PR110950]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809121840.3576116-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133237,"url":"https://patchwork.plctlab.org/api/1.2/patches/133237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809132301.0F2F138582B0@sourceware.org/","msgid":"<20230809132301.0F2F138582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-09T13:22:15","name":"Handle in-order reductions when SLP vectorizing non-loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809132301.0F2F138582B0@sourceware.org/mbox/"},{"id":133278,"url":"https://patchwork.plctlab.org/api/1.2/patches/133278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142146.1014795-1-jwakely@redhat.com/","msgid":"<20230809142146.1014795-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:22","name":"[committed] libstdc++: Minor fixes for some warnings in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142146.1014795-1-jwakely@redhat.com/mbox/"},{"id":133280,"url":"https://patchwork.plctlab.org/api/1.2/patches/133280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142156.1014897-1-jwakely@redhat.com/","msgid":"<20230809142156.1014897-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:47","name":"[committed] libstdc++: Explicitly default some copy ctors and assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142156.1014897-1-jwakely@redhat.com/mbox/"},{"id":133279,"url":"https://patchwork.plctlab.org/api/1.2/patches/133279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142232.1014914-1-jwakely@redhat.com/","msgid":"<20230809142232.1014914-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:21:57","name":"[committed] libstdc++: Fix some -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142232.1014914-1-jwakely@redhat.com/mbox/"},{"id":133281,"url":"https://patchwork.plctlab.org/api/1.2/patches/133281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142240.1015004-1-jwakely@redhat.com/","msgid":"<20230809142240.1015004-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:35","name":"[committed] libstdc++: Fix some -Wmismatched-tags warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142240.1015004-1-jwakely@redhat.com/mbox/"},{"id":133284,"url":"https://patchwork.plctlab.org/api/1.2/patches/133284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142245.1015025-1-jwakely@redhat.com/","msgid":"<20230809142245.1015025-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:41","name":"[committed] libstdc++: Suppress clang -Wc99-extensions warnings in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142245.1015025-1-jwakely@redhat.com/mbox/"},{"id":133282,"url":"https://patchwork.plctlab.org/api/1.2/patches/133282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142252.1015042-1-jwakely@redhat.com/","msgid":"<20230809142252.1015042-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:47","name":"[committed] libstdc++: Fix a -Wsign-compare warning in std::list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142252.1015042-1-jwakely@redhat.com/mbox/"},{"id":133283,"url":"https://patchwork.plctlab.org/api/1.2/patches/133283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142300.1015066-1-jwakely@redhat.com/","msgid":"<20230809142300.1015066-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-09T14:22:53","name":"[committed] libstdc++: Fix constexpr functions to conform to older standards","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809142300.1015066-1-jwakely@redhat.com/mbox/"},{"id":133314,"url":"https://patchwork.plctlab.org/api/1.2/patches/133314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b028eb6689e9afdca0e06ed354b94d7ed615a802.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-09T15:52:46","name":"rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b028eb6689e9afdca0e06ed354b94d7ed615a802.camel@us.ibm.com/mbox/"},{"id":133329,"url":"https://patchwork.plctlab.org/api/1.2/patches/133329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809161340.2659544-1-apinski@marvell.com/","msgid":"<20230809161340.2659544-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-09T16:13:40","name":"VR-VALUES: Simplify comparison using range pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809161340.2659544-1-apinski@marvell.com/mbox/"},{"id":133402,"url":"https://patchwork.plctlab.org/api/1.2/patches/133402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:13","name":"[1/12] expr: Small optimization [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/"},{"id":133404,"url":"https://patchwork.plctlab.org/api/1.2/patches/133404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:54","name":"[2/12] lto-streamer-in: Adjust assert [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/mbox/"},{"id":133406,"url":"https://patchwork.plctlab.org/api/1.2/patches/133406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:17:09","name":"[3/12] phiopt: Fix phiopt ICE on vops [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/mbox/"},{"id":133407,"url":"https://patchwork.plctlab.org/api/1.2/patches/133407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:17:50","name":"[4/12] Middle-end _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/mbox/"},{"id":133409,"url":"https://patchwork.plctlab.org/api/1.2/patches/133409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:18:50","name":"[5/12] _BitInt lowering support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/mbox/"},{"id":133408,"url":"https://patchwork.plctlab.org/api/1.2/patches/133408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:19:41","name":"[6/12] i386: Enable _BitInt on x86-64 [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/mbox/"},{"id":133410,"url":"https://patchwork.plctlab.org/api/1.2/patches/133410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:20:37","name":"[7/12] ubsan: _BitInt -fsanitize=undefined support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/mbox/"},{"id":133411,"url":"https://patchwork.plctlab.org/api/1.2/patches/133411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:22:07","name":"[8/12] libgcc: Generated tables for _BitInt <-> _Decimal* conversions [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/mbox/"},{"id":133412,"url":"https://patchwork.plctlab.org/api/1.2/patches/133412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:23:05","name":"[9/12] libgcc _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/mbox/"},{"id":133413,"url":"https://patchwork.plctlab.org/api/1.2/patches/133413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:25:14","name":"[10/12] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/mbox/"},{"id":133415,"url":"https://patchwork.plctlab.org/api/1.2/patches/133415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:26:12","name":"[11/12] testsuite part 1 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/mbox/"},{"id":133416,"url":"https://patchwork.plctlab.org/api/1.2/patches/133416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:27:30","name":"[12/12] testsuite part 2 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/mbox/"},{"id":133443,"url":"https://patchwork.plctlab.org/api/1.2/patches/133443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809191954.2668047-1-apinski@marvell.com/","msgid":"<20230809191954.2668047-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-09T19:19:54","name":"MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809191954.2668047-1-apinski@marvell.com/mbox/"},{"id":133444,"url":"https://patchwork.plctlab.org/api/1.2/patches/133444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu/","msgid":"<97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-09T19:22:47","name":"[v2] analyzer: More features for CPython analyzer plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97dcec4bcbb4d0b6eaacfd9990f05d7cfc0b35a9.1691608483.git.ef2648@columbia.edu/mbox/"},{"id":133481,"url":"https://patchwork.plctlab.org/api/1.2/patches/133481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202104.1804417-1-dmalcolm@redhat.com/","msgid":"<20230809202104.1804417-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-09T20:21:04","name":"[pushed] analyzer: remove default return value from region_model::on_call_pre","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202104.1804417-1-dmalcolm@redhat.com/mbox/"},{"id":133483,"url":"https://patchwork.plctlab.org/api/1.2/patches/133483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-2-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:20","name":"[1/3] fortran: New predicate gfc_length_one_character_type_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-2-mikael@gcc.gnu.org/mbox/"},{"id":133482,"url":"https://patchwork.plctlab.org/api/1.2/patches/133482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-3-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:21","name":"[2/3] fortran: Fix length one character dummy arg type [PR110419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-3-mikael@gcc.gnu.org/mbox/"},{"id":133485,"url":"https://patchwork.plctlab.org/api/1.2/patches/133485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-4-mikael@gcc.gnu.org/","msgid":"<20230809202122.695376-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-09T20:21:22","name":"[3/3] testsuite: Use distinct explicit error codes in value_9.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809202122.695376-4-mikael@gcc.gnu.org/mbox/"},{"id":133587,"url":"https://patchwork.plctlab.org/api/1.2/patches/133587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-2-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-2-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:07","name":"[v4,1/8] libcpp: Add LC_GEN linemaps to support in-memory buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-2-lhyatt@gmail.com/mbox/"},{"id":133586,"url":"https://patchwork.plctlab.org/api/1.2/patches/133586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-3-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-3-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:08","name":"[v4,2/8] libcpp: diagnostics: Support generated data in expanded locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-3-lhyatt@gmail.com/mbox/"},{"id":133591,"url":"https://patchwork.plctlab.org/api/1.2/patches/133591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-4-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-4-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:09","name":"[v4,3/8] diagnostics: Refactor class file_cache_slot","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-4-lhyatt@gmail.com/mbox/"},{"id":133590,"url":"https://patchwork.plctlab.org/api/1.2/patches/133590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-5-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-5-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:10","name":"[v4,4/8] diagnostics: Support obtaining source code lines from generated data buffers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-5-lhyatt@gmail.com/mbox/"},{"id":133592,"url":"https://patchwork.plctlab.org/api/1.2/patches/133592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-6-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-6-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:11","name":"[v4,5/8] diagnostics: Support testing generated data in input.cc selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-6-lhyatt@gmail.com/mbox/"},{"id":133593,"url":"https://patchwork.plctlab.org/api/1.2/patches/133593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-7-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-7-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:12","name":"[v4,6/8] diagnostics: Full support for generated data locations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-7-lhyatt@gmail.com/mbox/"},{"id":133596,"url":"https://patchwork.plctlab.org/api/1.2/patches/133596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-8-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-8-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:13","name":"[v4,7/8] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-8-lhyatt@gmail.com/mbox/"},{"id":133588,"url":"https://patchwork.plctlab.org/api/1.2/patches/133588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-9-lhyatt@gmail.com/","msgid":"<20230809221414.2849878-9-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-09T22:14:14","name":"[v4,8/8] diagnostics: Support generated data locations in SARIF output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230809221414.2849878-9-lhyatt@gmail.com/mbox/"},{"id":133625,"url":"https://patchwork.plctlab.org/api/1.2/patches/133625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810001956.2680884-1-apinski@marvell.com/","msgid":"<20230810001956.2680884-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-10T00:19:56","name":"Fix PR 110954: wrong code with cmp | !cmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810001956.2680884-1-apinski@marvell.com/mbox/"},{"id":133627,"url":"https://patchwork.plctlab.org/api/1.2/patches/133627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810003026.214982-1-vineetg@rivosinc.com/","msgid":"<20230810003026.214982-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-10T00:30:26","name":"RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810003026.214982-1-vineetg@rivosinc.com/mbox/"},{"id":133634,"url":"https://patchwork.plctlab.org/api/1.2/patches/133634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810004728.15915-1-hongtao.liu@intel.com/","msgid":"<20230810004728.15915-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-10T00:47:28","name":"i386: Do not sanitize upper part of V2HFmode and V4HFmode reg with -fno-trapping-math [PR110832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810004728.15915-1-hongtao.liu@intel.com/mbox/"},{"id":133642,"url":"https://patchwork.plctlab.org/api/1.2/patches/133642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810011149.23432-1-hongtao.liu@intel.com/","msgid":"<20230810011149.23432-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-10T01:11:49","name":"Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810011149.23432-1-hongtao.liu@intel.com/mbox/"},{"id":133662,"url":"https://patchwork.plctlab.org/api/1.2/patches/133662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com/","msgid":"<22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:25:06","name":"[RFC,v2,1/2] RISC-V: __builtin_riscv_pause for all environment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22ed79b136f894744e86c1074998593e15c20e58.1691634305.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133661,"url":"https://patchwork.plctlab.org/api/1.2/patches/133661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com/","msgid":"<0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:25:07","name":"[RFC,v2,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d5372a64666bc70e72a781d81798e141a6ca208.1691634305.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133663,"url":"https://patchwork.plctlab.org/api/1.2/patches/133663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com/","msgid":"<22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T02:26:02","name":"[RFC,1/2] RISC-V: Make __builtin_riscv_pause '\''Zihintpause'\'' only","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/22150b9f9e14718d368a0223848a69920d54305d.1691634361.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133664,"url":"https://patchwork.plctlab.org/api/1.2/patches/133664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/efab3539fbece51c688b055579ab6670ff8ca8af.1691634361.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T02:26:03","name":"[RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/efab3539fbece51c688b055579ab6670ff8ca8af.1691634361.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133671,"url":"https://patchwork.plctlab.org/api/1.2/patches/133671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com/","msgid":"<97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-10T03:10:57","name":"[1/1] RISC-V: Make \"prefetch.i\" built-in usable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97c0d824fa5aeaee52a825da7f7a17ae8616c5ab.1691636916.git.research_trasio@irq.a4lg.com/mbox/"},{"id":133672,"url":"https://patchwork.plctlab.org/api/1.2/patches/133672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810031203.2539834-1-pan2.li@intel.com/","msgid":"<20230810031203.2539834-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T03:12:03","name":"[v3] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810031203.2539834-1-pan2.li@intel.com/mbox/"},{"id":133691,"url":"https://patchwork.plctlab.org/api/1.2/patches/133691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810050940.3694097-1-pan2.li@intel.com/","msgid":"<20230810050940.3694097-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T05:09:40","name":"[v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810050940.3694097-1-pan2.li@intel.com/mbox/"},{"id":133692,"url":"https://patchwork.plctlab.org/api/1.2/patches/133692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com/","msgid":"<1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com>","list_archive_url":null,"date":"2023-08-10T05:13:36","name":"sso-string@gnu-versioned-namespace [PR83077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1dc681f4-41b7-d171-02ac-b0194617bdee@gmail.com/mbox/"},{"id":133718,"url":"https://patchwork.plctlab.org/api/1.2/patches/133718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-2-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:43","name":"[V2,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-2-lehua.ding@rivai.ai/mbox/"},{"id":133719,"url":"https://patchwork.plctlab.org/api/1.2/patches/133719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-3-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:44","name":"[V2,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-3-lehua.ding@rivai.ai/mbox/"},{"id":133720,"url":"https://patchwork.plctlab.org/api/1.2/patches/133720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-4-lehua.ding@rivai.ai/","msgid":"<20230810070345.1623064-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:03:45","name":"[V2,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810070345.1623064-4-lehua.ding@rivai.ai/mbox/"},{"id":133736,"url":"https://patchwork.plctlab.org/api/1.2/patches/133736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810074909.492039-1-juzhe.zhong@rivai.ai/","msgid":"<20230810074909.492039-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T07:49:09","name":"[V2] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810074909.492039-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133757,"url":"https://patchwork.plctlab.org/api/1.2/patches/133757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810081954.1899125-1-pan2.li@intel.com/","msgid":"<20230810081954.1899125-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-10T08:19:54","name":"[v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810081954.1899125-1-pan2.li@intel.com/mbox/"},{"id":133764,"url":"https://patchwork.plctlab.org/api/1.2/patches/133764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810085518.725472-1-juzhe.zhong@rivai.ai/","msgid":"<20230810085518.725472-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T08:55:18","name":"RISC-V: Add missing modes to the iterators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810085518.725472-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133788,"url":"https://patchwork.plctlab.org/api/1.2/patches/133788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810092146.839668-1-juzhe.zhong@rivai.ai/","msgid":"<20230810092146.839668-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T09:21:46","name":"RISC-V: Support TU for integer ternary OP[PR110964]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810092146.839668-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133842,"url":"https://patchwork.plctlab.org/api/1.2/patches/133842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNS3f14lkWcbBDpR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T10:10:07","name":"[13/12] C _BitInt incremental fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNS3f14lkWcbBDpR@tucnak/mbox/"},{"id":133868,"url":"https://patchwork.plctlab.org/api/1.2/patches/133868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810103705.1697293-1-juzhe.zhong@rivai.ai/","msgid":"<20230810103705.1697293-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-10T10:37:05","name":"RISC-V: Add MASK vec_duplicate pattern[PR110962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810103705.1697293-1-juzhe.zhong@rivai.ai/mbox/"},{"id":133927,"url":"https://patchwork.plctlab.org/api/1.2/patches/133927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae3a8263-f29f-f8b2-0733-8dc1e3420859@in.tum.de/","msgid":"","list_archive_url":null,"date":"2023-08-10T11:33:53","name":"preserve base pointer for __deregister_frame [PR110956]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae3a8263-f29f-f8b2-0733-8dc1e3420859@in.tum.de/mbox/"},{"id":133928,"url":"https://patchwork.plctlab.org/api/1.2/patches/133928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at/","msgid":"<573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-10T11:39:45","name":"c: Support for -Wuseless-cast [RR84510]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/573a12823f25ecf649457f32018f2f53a2a8b3a2.camel@tugraz.at/mbox/"},{"id":133959,"url":"https://patchwork.plctlab.org/api/1.2/patches/133959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122119.1679030-1-lehua.ding@rivai.ai/","msgid":"<20230810122119.1679030-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-10T12:21:19","name":"[V2] RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122119.1679030-1-lehua.ding@rivai.ai/mbox/"},{"id":133961,"url":"https://patchwork.plctlab.org/api/1.2/patches/133961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122342.10BBA38582B0@sourceware.org/","msgid":"<20230810122342.10BBA38582B0@sourceware.org>","list_archive_url":null,"date":"2023-08-10T12:22:59","name":"Make ISEL used internal functions const/nothrow where appropriate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810122342.10BBA38582B0@sourceware.org/mbox/"},{"id":133974,"url":"https://patchwork.plctlab.org/api/1.2/patches/133974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810124235.9E9393857B8E@sourceware.org/","msgid":"<20230810124235.9E9393857B8E@sourceware.org>","list_archive_url":null,"date":"2023-08-10T12:41:51","name":"tree-optimization/110963 - more PRE when optimizing for size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810124235.9E9393857B8E@sourceware.org/mbox/"},{"id":134025,"url":"https://patchwork.plctlab.org/api/1.2/patches/134025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810130402.752335-2-stefansf@linux.ibm.com/","msgid":"<20230810130402.752335-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-10T13:04:03","name":"rtl-optimization/110939 Really fix narrow comparison of memory and constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810130402.752335-2-stefansf@linux.ibm.com/mbox/"},{"id":133999,"url":"https://patchwork.plctlab.org/api/1.2/patches/133999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a38a757a186a7ed0530bec6eed632d7230b5f3d5.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:02","name":"[1/5] OpenMP: Move Fortran '\''declare mapper'\'' instantiation code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a38a757a186a7ed0530bec6eed632d7230b5f3d5.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134002,"url":"https://patchwork.plctlab.org/api/1.2/patches/134002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcd6309ed81cddb4e8e029430e421f8208b52f8a.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:03","name":"[2/5] OpenMP: Reprocess expanded clauses after '\''declare mapper'\'' instantiation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcd6309ed81cddb4e8e029430e421f8208b52f8a.1691672603.git.julian@codesourcery.com/mbox/"},{"id":133998,"url":"https://patchwork.plctlab.org/api/1.2/patches/133998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com/","msgid":"<7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T13:33:04","name":"[3/5] OpenMP: Introduce C_ORT_{, OMP_}DECLARE_MAPPER c_omp_region_type types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f150aec826622376459cdecd2c870bc2e80d07b.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134001,"url":"https://patchwork.plctlab.org/api/1.2/patches/134001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d90c4df5a82eab4313b75f5e702f7bd0a613c304.1691672603.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T13:33:05","name":"[4/5] OpenMP: Look up '\''declare mapper'\'' definitions at resolution time not parse time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d90c4df5a82eab4313b75f5e702f7bd0a613c304.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134003,"url":"https://patchwork.plctlab.org/api/1.2/patches/134003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com/","msgid":"<0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T13:33:06","name":"[5/5] OpenMP: Enable '\''declare mapper'\'' mappers for '\''target update'\'' directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0b22f24553a75a560f7ed9f264aac0d5a1239191.1691672603.git.julian@codesourcery.com/mbox/"},{"id":134044,"url":"https://patchwork.plctlab.org/api/1.2/patches/134044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUA0zC/RG/cqnB5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:22:59","name":"[13/12,v2] C _BitInt incremental fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUA0zC/RG/cqnB5@tucnak/mbox/"},{"id":134045,"url":"https://patchwork.plctlab.org/api/1.2/patches/134045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDMvNw/UldnN9d@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:33:06","name":"c, v2: Add __typeof_unqual__ and __typeof_unqual support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDMvNw/UldnN9d@tucnak/mbox/"},{"id":134046,"url":"https://patchwork.plctlab.org/api/1.2/patches/134046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDrXSjHpgTuknm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:35:09","name":"c, c++, v2: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUDrXSjHpgTuknm@tucnak/mbox/"},{"id":134048,"url":"https://patchwork.plctlab.org/api/1.2/patches/134048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEZzW2H9zc/n4V@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:38:15","name":"c, v2: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEZzW2H9zc/n4V@tucnak/mbox/"},{"id":134050,"url":"https://patchwork.plctlab.org/api/1.2/patches/134050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEskNR0ezRW2Js@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:39:30","name":"stdckdint.h _BitInt test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUEskNR0ezRW2Js@tucnak/mbox/"},{"id":134054,"url":"https://patchwork.plctlab.org/api/1.2/patches/134054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUFhqrSn3Gcq09w@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-10T15:43:02","name":"match.pd, v2: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUFhqrSn3Gcq09w@tucnak/mbox/"},{"id":134073,"url":"https://patchwork.plctlab.org/api/1.2/patches/134073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160833.1513194-1-ppalka@redhat.com/","msgid":"<20230810160833.1513194-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:08:33","name":"c++: dependently scoped template-id in type-req [PR110927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160833.1513194-1-ppalka@redhat.com/mbox/"},{"id":134074,"url":"https://patchwork.plctlab.org/api/1.2/patches/134074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160842.1513222-1-ppalka@redhat.com/","msgid":"<20230810160842.1513222-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:08:42","name":"c++: recognize in-class var tmpl partial spec [PR71954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160842.1513222-1-ppalka@redhat.com/mbox/"},{"id":134075,"url":"https://patchwork.plctlab.org/api/1.2/patches/134075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160900.1513252-1-ppalka@redhat.com/","msgid":"<20230810160900.1513252-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-10T16:09:00","name":"c++: bogus warning w/ deduction guide in anon ns [PR106604]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810160900.1513252-1-ppalka@redhat.com/mbox/"},{"id":134110,"url":"https://patchwork.plctlab.org/api/1.2/patches/134110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUWx+6BCgS4Y7uX@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T16:56:39","name":"Fix undefined behaviour in profile_count::differs_from_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUWx+6BCgS4Y7uX@kam.mff.cuni.cz/mbox/"},{"id":134111,"url":"https://patchwork.plctlab.org/api/1.2/patches/134111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUW6q1p08h/OTLN@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T16:57:14","name":"Fix profile updating bug in tree-ssa-threadupdate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUW6q1p08h/OTLN@kam.mff.cuni.cz/mbox/"},{"id":134113,"url":"https://patchwork.plctlab.org/api/1.2/patches/134113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUYcP4Lm1v7fps9@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T17:03:44","name":"Fix profile update in duplicat_loop_body_to_header_edge for loops with 0 count_in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNUYcP4Lm1v7fps9@kam.mff.cuni.cz/mbox/"},{"id":134134,"url":"https://patchwork.plctlab.org/api/1.2/patches/134134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuUU3KtBmD4rgH=FbWSfmsaxCO6i2F3=4rq5W2VgR7YF=Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-10T18:06:36","name":"[RFC,v2] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuUU3KtBmD4rgH=FbWSfmsaxCO6i2F3=4rq5W2VgR7YF=Q@mail.gmail.com/mbox/"},{"id":134232,"url":"https://patchwork.plctlab.org/api/1.2/patches/134232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com/","msgid":"<5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com>","list_archive_url":null,"date":"2023-08-10T21:30:32","name":"config: Fix host -rdynamic detection for build != host != target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5f53789-e0f5-7c5a-a0b1-b098a076d572@codesourcery.com/mbox/"},{"id":134240,"url":"https://patchwork.plctlab.org/api/1.2/patches/134240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNVjtv70+OJlqcn2@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-10T22:24:54","name":"Fix division by zero in tree-ssa-loop-split","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNVjtv70+OJlqcn2@kam.mff.cuni.cz/mbox/"},{"id":134243,"url":"https://patchwork.plctlab.org/api/1.2/patches/134243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223344.1242452-1-jwakely@redhat.com/","msgid":"<20230810223344.1242452-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:32:21","name":"[committed] libstdc++: Use alias template for iterator_category [PR110970]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223344.1242452-1-jwakely@redhat.com/mbox/"},{"id":134242,"url":"https://patchwork.plctlab.org/api/1.2/patches/134242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223353.1242664-1-jwakely@redhat.com/","msgid":"<20230810223353.1242664-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:33:45","name":"[committed] libstdc++: Fix std::format for localized floats [PR110968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810223353.1242664-1-jwakely@redhat.com/mbox/"},{"id":134246,"url":"https://patchwork.plctlab.org/api/1.2/patches/134246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810224034.1259089-1-jwakely@redhat.com/","msgid":"<20230810224034.1259089-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-10T22:40:03","name":"[committed] libstdc++: Fix out-of-bounds read in format string \"{:{}.\" [PR110974]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810224034.1259089-1-jwakely@redhat.com/mbox/"},{"id":134251,"url":"https://patchwork.plctlab.org/api/1.2/patches/134251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810225121.2732876-1-apinski@marvell.com/","msgid":"<20230810225121.2732876-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-10T22:51:21","name":"[PATCHv2] Fix PR 110954: wrong code with cmp | !cmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230810225121.2732876-1-apinski@marvell.com/mbox/"},{"id":134260,"url":"https://patchwork.plctlab.org/api/1.2/patches/134260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811003810.2669080-1-hongtao.liu@intel.com/","msgid":"<20230811003810.2669080-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-11T00:38:10","name":"Software mitigation: Disable gather generation in vectorization for GDS affected Intel Processors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811003810.2669080-1-hongtao.liu@intel.com/mbox/"},{"id":134279,"url":"https://patchwork.plctlab.org/api/1.2/patches/134279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811022819.1113702-1-pan2.li@intel.com/","msgid":"<20230811022819.1113702-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T02:28:19","name":"[v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811022819.1113702-1-pan2.li@intel.com/mbox/"},{"id":134326,"url":"https://patchwork.plctlab.org/api/1.2/patches/134326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811055429.3654604-1-pan2.li@intel.com/","msgid":"<20230811055429.3654604-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T05:54:29","name":"[v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811055429.3654604-1-pan2.li@intel.com/mbox/"},{"id":134332,"url":"https://patchwork.plctlab.org/api/1.2/patches/134332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811060131.1494356-1-hongtao.liu@intel.com/","msgid":"<20230811060131.1494356-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-11T06:01:31","name":"[V2] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811060131.1494356-1-hongtao.liu@intel.com/mbox/"},{"id":134334,"url":"https://patchwork.plctlab.org/api/1.2/patches/134334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811063817.491547-1-juzhe.zhong@rivai.ai/","msgid":"<20230811063817.491547-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T06:38:17","name":"[V3] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811063817.491547-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134338,"url":"https://patchwork.plctlab.org/api/1.2/patches/134338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811064910.525721-1-juzhe.zhong@rivai.ai/","msgid":"<20230811064910.525721-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T06:49:10","name":"VECT: Add vec_mask_len_{load_lanes,store_lanes} patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811064910.525721-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134345,"url":"https://patchwork.plctlab.org/api/1.2/patches/134345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811071748.486528-1-pan2.li@intel.com/","msgid":"<20230811071748.486528-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T07:17:48","name":"[v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811071748.486528-1-pan2.li@intel.com/mbox/"},{"id":134355,"url":"https://patchwork.plctlab.org/api/1.2/patches/134355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNXstoaxDzI1OEwE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-11T08:09:26","name":"c, v3: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNXstoaxDzI1OEwE@tucnak/mbox/"},{"id":134357,"url":"https://patchwork.plctlab.org/api/1.2/patches/134357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081023.95408-1-mikael@gcc.gnu.org/","msgid":"<20230811081023.95408-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-11T08:10:23","name":"dg-cmp-results: Escape slash from variant argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081023.95408-1-mikael@gcc.gnu.org/mbox/"},{"id":134359,"url":"https://patchwork.plctlab.org/api/1.2/patches/134359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081117.1088622-1-pan2.li@intel.com/","msgid":"<20230811081117.1088622-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T08:11:17","name":"[v1] RISC-V: Support RVV VFNMADD rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811081117.1088622-1-pan2.li@intel.com/mbox/"},{"id":134370,"url":"https://patchwork.plctlab.org/api/1.2/patches/134370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811084526.237649-1-juzhe.zhong@rivai.ai/","msgid":"<20230811084526.237649-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T08:45:26","name":"RISC-V: Fix vec_series expander[PR110985]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811084526.237649-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134372,"url":"https://patchwork.plctlab.org/api/1.2/patches/134372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811090121.1789446-1-lehua.ding@rivai.ai/","msgid":"<20230811090121.1789446-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-11T09:01:21","name":"RISC-V: Revert the convert from vmv.s.x to vmv.v.i","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811090121.1789446-1-lehua.ding@rivai.ai/mbox/"},{"id":134375,"url":"https://patchwork.plctlab.org/api/1.2/patches/134375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com/","msgid":"<3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-11T09:11:39","name":"RISC-V: Revive test case PR 102957","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3aa13843de038d960fdb3415f416243e43b376f2.1691745095.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134377,"url":"https://patchwork.plctlab.org/api/1.2/patches/134377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-1-apinski@marvell.com/","msgid":"<20230811091551.2758227-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-11T09:15:50","name":"[1/2] PHI-OPT [PR 110984]: Add support for NE_EXPR/EQ_EXPR with casts to spaceship_replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-1-apinski@marvell.com/mbox/"},{"id":134378,"url":"https://patchwork.plctlab.org/api/1.2/patches/134378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-2-apinski@marvell.com/","msgid":"<20230811091551.2758227-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-11T09:15:51","name":"[2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811091551.2758227-2-apinski@marvell.com/mbox/"},{"id":134386,"url":"https://patchwork.plctlab.org/api/1.2/patches/134386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811095601.216255-1-juzhe.zhong@rivai.ai/","msgid":"<20230811095601.216255-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T09:56:01","name":"[V2] RISC-V: Allow CONST_VECTOR for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811095601.216255-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134397,"url":"https://patchwork.plctlab.org/api/1.2/patches/134397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811101153.1621235-1-pan2.li@intel.com/","msgid":"<20230811101153.1621235-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-11T10:11:53","name":"[v1] RISC-V: Support RVV VFMSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811101153.1621235-1-pan2.li@intel.com/mbox/"},{"id":134417,"url":"https://patchwork.plctlab.org/api/1.2/patches/134417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110606.08A7913592@imap2.suse-dmz.suse.de/","msgid":"<20230811110606.08A7913592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T11:06:05","name":"tree-optimization/110979 - fold-left reduction and partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110606.08A7913592@imap2.suse-dmz.suse.de/mbox/"},{"id":134418,"url":"https://patchwork.plctlab.org/api/1.2/patches/134418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110712.5486D13592@imap2.suse-dmz.suse.de/","msgid":"<20230811110712.5486D13592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T11:07:11","name":"Improve BB vectorization opt-info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811110712.5486D13592@imap2.suse-dmz.suse.de/mbox/"},{"id":134435,"url":"https://patchwork.plctlab.org/api/1.2/patches/134435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811114919.2556172-1-juzhe.zhong@rivai.ai/","msgid":"<20230811114919.2556172-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T11:49:19","name":"VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811114919.2556172-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134434,"url":"https://patchwork.plctlab.org/api/1.2/patches/134434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811115115.2277873-1-vultkayn@gcc.gnu.org/","msgid":"<20230811115115.2277873-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-11T11:51:15","name":"analyzer: New option fanalyzer-show-events-in-system-headers [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811115115.2277873-1-vultkayn@gcc.gnu.org/mbox/"},{"id":134474,"url":"https://patchwork.plctlab.org/api/1.2/patches/134474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811130321.D7EB613592@imap2.suse-dmz.suse.de/","msgid":"<20230811130321.D7EB613592@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-11T13:03:21","name":"[v2] tree-optimization/110979 - fold-left reduction and partial vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811130321.D7EB613592@imap2.suse-dmz.suse.de/mbox/"},{"id":134493,"url":"https://patchwork.plctlab.org/api/1.2/patches/134493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXE1WdcjEsGtU786dAEyg2Eq0z90nxPiHzc6XXBV1nEwg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-11T13:18:36","name":"[v3] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXE1WdcjEsGtU786dAEyg2Eq0z90nxPiHzc6XXBV1nEwg@mail.gmail.com/mbox/"},{"id":134510,"url":"https://patchwork.plctlab.org/api/1.2/patches/134510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811135542.2823827-1-juzhe.zhong@rivai.ai/","msgid":"<20230811135542.2823827-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T13:55:42","name":"[V2] VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811135542.2823827-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134522,"url":"https://patchwork.plctlab.org/api/1.2/patches/134522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140303.1390347-1-jwakely@redhat.com/","msgid":"<20230811140303.1390347-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T14:02:28","name":"[committed] libstdc++: Revert accidentally committed change to bits/stl_iterator.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140303.1390347-1-jwakely@redhat.com/mbox/"},{"id":134526,"url":"https://patchwork.plctlab.org/api/1.2/patches/134526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140332.1390523-1-jwakely@redhat.com/","msgid":"<20230811140332.1390523-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T14:03:12","name":"[committed] libstdc++: Handle invalid values in std::chrono pretty printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811140332.1390523-1-jwakely@redhat.com/mbox/"},{"id":134535,"url":"https://patchwork.plctlab.org/api/1.2/patches/134535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811142448.2913622-1-juzhe.zhong@rivai.ai/","msgid":"<20230811142448.2913622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-11T14:24:48","name":"[V4] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811142448.2913622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134561,"url":"https://patchwork.plctlab.org/api/1.2/patches/134561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com/","msgid":"<8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com>","list_archive_url":null,"date":"2023-08-11T15:32:19","name":"[pushed,LRA] : Implement output stack pointer reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8eda93dc-9cf8-c221-0f37-4cd604cc8808@redhat.com/mbox/"},{"id":134604,"url":"https://patchwork.plctlab.org/api/1.2/patches/134604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811172221.1432932-1-jwakely@redhat.com/","msgid":"<20230811172221.1432932-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T17:21:53","name":"[committed] libstdc++: Do not call log10(0.0) in std::format [PR110860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811172221.1432932-1-jwakely@redhat.com/mbox/"},{"id":134605,"url":"https://patchwork.plctlab.org/api/1.2/patches/134605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173025.12324-1-ef2648@columbia.edu/","msgid":"<20230811173025.12324-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-11T17:30:25","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173025.12324-1-ef2648@columbia.edu/mbox/"},{"id":134606,"url":"https://patchwork.plctlab.org/api/1.2/patches/134606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNZwXD4oLQPO98KZ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-11T17:31:08","name":"c, v4: Add stdckdint.h header for C23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNZwXD4oLQPO98KZ@tucnak/mbox/"},{"id":134610,"url":"https://patchwork.plctlab.org/api/1.2/patches/134610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173545.2116052-1-ppalka@redhat.com/","msgid":"<20230811173545.2116052-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-11T17:35:45","name":"tree-pretty-print: delimit TREE_VEC with braces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811173545.2116052-1-ppalka@redhat.com/mbox/"},{"id":134624,"url":"https://patchwork.plctlab.org/api/1.2/patches/134624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811174724.12604-1-ef2648@columbia.edu/","msgid":"<20230811174724.12604-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-11T17:47:24","name":"[COMMITTED] analyzer: More features for CPython analyzer plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811174724.12604-1-ef2648@columbia.edu/mbox/"},{"id":134640,"url":"https://patchwork.plctlab.org/api/1.2/patches/134640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185247.5228-1-jose.marchesi@oracle.com/","msgid":"<20230811185247.5228-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-11T18:52:47","name":"[COMMITTED] bpf: allow exceeding max num of args in BPF when always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185247.5228-1-jose.marchesi@oracle.com/mbox/"},{"id":134641,"url":"https://patchwork.plctlab.org/api/1.2/patches/134641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185258.5285-1-jose.marchesi@oracle.com/","msgid":"<20230811185258.5285-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-11T18:52:58","name":"[COMMITTED] bpf: liberate R9 for general register allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185258.5285-1-jose.marchesi@oracle.com/mbox/"},{"id":134645,"url":"https://patchwork.plctlab.org/api/1.2/patches/134645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185935.1438399-1-jwakely@redhat.com/","msgid":"<20230811185935.1438399-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T18:58:41","name":"[committed] libstdc++: Implement C++20 std::chrono::parse [PR104167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811185935.1438399-1-jwakely@redhat.com/mbox/"},{"id":134652,"url":"https://patchwork.plctlab.org/api/1.2/patches/134652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811191559.232535-1-patrick@rivosinc.com/","msgid":"<20230811191559.232535-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-11T19:15:59","name":"RISC-V: Specify -mabi for ztso testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811191559.232535-1-patrick@rivosinc.com/mbox/"},{"id":134728,"url":"https://patchwork.plctlab.org/api/1.2/patches/134728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce0a46f7-bc24-2585-dcd9-4b27a749bc16@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-11T21:55:48","name":"[committed] Fix subdi3 synthesis on rx port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce0a46f7-bc24-2585-dcd9-4b27a749bc16@gmail.com/mbox/"},{"id":134733,"url":"https://patchwork.plctlab.org/api/1.2/patches/134733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811221212.1959872-1-dmalcolm@redhat.com/","msgid":"<20230811221212.1959872-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-11T22:12:12","name":"[pushed] analyzer: new warning: -Wanalyzer-unterminated-string [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811221212.1959872-1-dmalcolm@redhat.com/mbox/"},{"id":134752,"url":"https://patchwork.plctlab.org/api/1.2/patches/134752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811223721.34729-1-jwakely@redhat.com/","msgid":"<20230811223721.34729-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-11T22:37:05","name":"[committed] libstdc++: Fix std::format_to_n return value [PR110990]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230811223721.34729-1-jwakely@redhat.com/mbox/"},{"id":134799,"url":"https://patchwork.plctlab.org/api/1.2/patches/134799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812023002.238780-1-juzhe.zhong@rivai.ai/","msgid":"<20230812023002.238780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-12T02:30:02","name":"RISC-V: Add TAREGT_VECTOR check into VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812023002.238780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134807,"url":"https://patchwork.plctlab.org/api/1.2/patches/134807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:18","name":"[1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134809,"url":"https://patchwork.plctlab.org/api/1.2/patches/134809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:19","name":"[2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d2983efeca02de33bb4efc6bbfb0da108754474.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134808,"url":"https://patchwork.plctlab.org/api/1.2/patches/134808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com/","msgid":"<6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-12T02:57:20","name":"[3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d0c9d647ac7d1e0df6d419e849f631373344802.1691809036.git.research_trasio@irq.a4lg.com/mbox/"},{"id":134813,"url":"https://patchwork.plctlab.org/api/1.2/patches/134813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812044822.2351566-1-pan2.li@intel.com/","msgid":"<20230812044822.2351566-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-12T04:48:22","name":"[v1] RISC-V: Support RVV VFNMSUB rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812044822.2351566-1-pan2.li@intel.com/mbox/"},{"id":134830,"url":"https://patchwork.plctlab.org/api/1.2/patches/134830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812080521.2814979-1-apinski@marvell.com/","msgid":"<20230812080521.2814979-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-12T08:05:21","name":"Add support for vector conitional not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812080521.2814979-1-apinski@marvell.com/mbox/"},{"id":134831,"url":"https://patchwork.plctlab.org/api/1.2/patches/134831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812081652.1851216-1-gnaggnoyil@gmail.com/","msgid":"<20230812081652.1851216-1-gnaggnoyil@gmail.com>","list_archive_url":null,"date":"2023-08-12T08:16:52","name":"[v1] c++: follow DR 2386 and update implementation of get_tuple_size [PR110216]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812081652.1851216-1-gnaggnoyil@gmail.com/mbox/"},{"id":134890,"url":"https://patchwork.plctlab.org/api/1.2/patches/134890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812141515.326096-1-juzhe.zhong@rivai.ai/","msgid":"<20230812141515.326096-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-12T14:15:15","name":"RISC-V: Fix autovec_length_operand predicate[PR110989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812141515.326096-1-juzhe.zhong@rivai.ai/mbox/"},{"id":134891,"url":"https://patchwork.plctlab.org/api/1.2/patches/134891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812143643.1511082-1-lehua.ding@rivai.ai/","msgid":"<20230812143643.1511082-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-12T14:36:43","name":"RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230812143643.1511082-1-lehua.ding@rivai.ai/mbox/"},{"id":134993,"url":"https://patchwork.plctlab.org/api/1.2/patches/134993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813005621.591927-1-pan2.li@intel.com/","msgid":"<20230813005621.591927-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-13T00:56:21","name":"[v4] Mode-Switching: Fix SET_SRC ICE for create_pre_exit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813005621.591927-1-pan2.li@intel.com/mbox/"},{"id":135018,"url":"https://patchwork.plctlab.org/api/1.2/patches/135018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813080231.2188040-1-pan2.li@intel.com/","msgid":"<20230813080231.2188040-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-13T08:02:31","name":"[v1] RISC-V: Support RVV VFWMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813080231.2188040-1-pan2.li@intel.com/mbox/"},{"id":135032,"url":"https://patchwork.plctlab.org/api/1.2/patches/135032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813134515.12498-1-iain@sandoe.co.uk/","msgid":"<20230813134515.12498-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-08-13T13:45:15","name":"[pushed] modula-2, plugin: Fix Darwin bootstrap issues.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813134515.12498-1-iain@sandoe.co.uk/mbox/"},{"id":135078,"url":"https://patchwork.plctlab.org/api/1.2/patches/135078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P195MB13982812469EE1DEFDF83A24AE16A@AS1P195MB1398.EURP195.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-08-13T19:19:56","name":"gcc/reload.h: Change type of x_spill_indirect_levels","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P195MB13982812469EE1DEFDF83A24AE16A@AS1P195MB1398.EURP195.PROD.OUTLOOK.COM/mbox/"},{"id":135080,"url":"https://patchwork.plctlab.org/api/1.2/patches/135080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-1-arsen@aarsen.me/","msgid":"<20230813195939.1099991-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-13T19:35:34","name":"[v2,1/2] libstdc++: Implement more maintainable header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-1-arsen@aarsen.me/mbox/"},{"id":135081,"url":"https://patchwork.plctlab.org/api/1.2/patches/135081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-2-arsen@aarsen.me/","msgid":"<20230813195939.1099991-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-08-13T19:35:35","name":"[v2,2/2] libstdc++: Replace all manual FTM definitions and use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230813195939.1099991-2-arsen@aarsen.me/mbox/"},{"id":135095,"url":"https://patchwork.plctlab.org/api/1.2/patches/135095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdf06990-a0fe-1bed-46db-44ff92f3a986@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T01:09:00","name":"[pushed] LRA]: Fix asserts for output stack pointer reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bdf06990-a0fe-1bed-46db-44ff92f3a986@redhat.com/mbox/"},{"id":135097,"url":"https://patchwork.plctlab.org/api/1.2/patches/135097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132212030.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:13:46","name":"[committed] Disable LRA for MMIX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132212030.11350@arjuna.pair.com/mbox/"},{"id":135098,"url":"https://patchwork.plctlab.org/api/1.2/patches/135098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132213580.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:16:17","name":"[committed] MMIX: Handle LRA FP-to-SP-elimination oddity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132213580.11350@arjuna.pair.com/mbox/"},{"id":135099,"url":"https://patchwork.plctlab.org/api/1.2/patches/135099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com/","msgid":"<61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T02:18:22","name":"[PATCHv4,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61c0d889-9535-f699-bb4d-3ab947fe2d2b@linux.ibm.com/mbox/"},{"id":135101,"url":"https://patchwork.plctlab.org/api/1.2/patches/135101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132216290.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:19:22","name":"[committed] MMIX: Re-enable LRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132216290.11350@arjuna.pair.com/mbox/"},{"id":135102,"url":"https://patchwork.plctlab.org/api/1.2/patches/135102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132219360.11350@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T02:20:31","name":"[committed] MMIX: Switch to lra_in_progress","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2308132219360.11350@arjuna.pair.com/mbox/"},{"id":135104,"url":"https://patchwork.plctlab.org/api/1.2/patches/135104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814023625.1355161-1-pan2.li@intel.com/","msgid":"<20230814023625.1355161-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T02:36:25","name":"[v1] RISC-V: Support RVV VFWNMACC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814023625.1355161-1-pan2.li@intel.com/mbox/"},{"id":135105,"url":"https://patchwork.plctlab.org/api/1.2/patches/135105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814024600.1594913-1-hongtao.liu@intel.com/","msgid":"<20230814024600.1594913-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-14T02:46:00","name":"Generate vmovapd instead of vmovsd for moving DFmode between SSE_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814024600.1594913-1-hongtao.liu@intel.com/mbox/"},{"id":135106,"url":"https://patchwork.plctlab.org/api/1.2/patches/135106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com/","msgid":"<89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T02:53:44","name":"RISC-V: Deduplicate #error messages in testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/89ded79ffaf3c2c5e3a6d35ee082a40de645f8f6.1691981620.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135113,"url":"https://patchwork.plctlab.org/api/1.2/patches/135113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814032909.1898090-1-pan2.li@intel.com/","msgid":"<20230814032909.1898090-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T03:29:09","name":"[v1] RISC-V: Support RVV VFWMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814032909.1898090-1-pan2.li@intel.com/mbox/"},{"id":135120,"url":"https://patchwork.plctlab.org/api/1.2/patches/135120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-1-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:02","name":"[v1,1/6] LoongArch: a symmetric multilib subdir layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-1-yangyujie@loongson.cn/mbox/"},{"id":135117,"url":"https://patchwork.plctlab.org/api/1.2/patches/135117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-2-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:03","name":"[v1,2/6] LoongArch: improved target configuration interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-2-yangyujie@loongson.cn/mbox/"},{"id":135116,"url":"https://patchwork.plctlab.org/api/1.2/patches/135116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-3-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:04","name":"[v1,3/6] LoongArch: define preprocessing macros \"__loongarch_{arch, tune}\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-3-yangyujie@loongson.cn/mbox/"},{"id":135118,"url":"https://patchwork.plctlab.org/api/1.2/patches/135118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-4-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:05","name":"[v1,4/6] LoongArch: use -mstrict-align by default when building libraries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-4-yangyujie@loongson.cn/mbox/"},{"id":135115,"url":"https://patchwork.plctlab.org/api/1.2/patches/135115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-5-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:06","name":"[v1,5/6] LoongArch: export headers for building GCC plugins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-5-yangyujie@loongson.cn/mbox/"},{"id":135119,"url":"https://patchwork.plctlab.org/api/1.2/patches/135119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-6-yangyujie@loongson.cn/","msgid":"<20230814035707.11272-6-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-14T03:57:07","name":"[v1,6/6] LoongArch: support loongarch*-elf target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814035707.11272-6-yangyujie@loongson.cn/mbox/"},{"id":135121,"url":"https://patchwork.plctlab.org/api/1.2/patches/135121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814043747.2877403-1-lili.cui@intel.com/","msgid":"<20230814043747.2877403-1-lili.cui@intel.com>","list_archive_url":null,"date":"2023-08-14T04:37:47","name":"x86: Update model values for Raptorlake.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814043747.2877403-1-lili.cui@intel.com/mbox/"},{"id":135128,"url":"https://patchwork.plctlab.org/api/1.2/patches/135128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com/","msgid":"<644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T05:32:09","name":"[1/2] RISC-V: Add support for the '\''Zfa'\'' extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/644737e9d806d1c9f9e5770153780efe8fc363ae.1691991126.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135129,"url":"https://patchwork.plctlab.org/api/1.2/patches/135129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16370ade4886697b0ed46ebf2d7835b89ab8cc2.1691991126.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T05:32:10","name":"[2/2] RISC-V: Constant FP Optimization with '\''Zfa'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b16370ade4886697b0ed46ebf2d7835b89ab8cc2.1691991126.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135132,"url":"https://patchwork.plctlab.org/api/1.2/patches/135132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-1-guojiufu@linux.ibm.com/","msgid":"<20230814054156.2068718-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T05:41:55","name":"[1/2] light expander sra v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-1-guojiufu@linux.ibm.com/mbox/"},{"id":135133,"url":"https://patchwork.plctlab.org/api/1.2/patches/135133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-2-guojiufu@linux.ibm.com/","msgid":"<20230814054156.2068718-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T05:41:56","name":"[2/2] combine nonconstant_array walker and expander_sra walker","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814054156.2068718-2-guojiufu@linux.ibm.com/mbox/"},{"id":135135,"url":"https://patchwork.plctlab.org/api/1.2/patches/135135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814055033.1995-1-jinma@linux.alibaba.com/","msgid":"<20230814055033.1995-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-14T05:50:33","name":"[v10] RISC-V: Add support for the Zfa extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814055033.1995-1-jinma@linux.alibaba.com/mbox/"},{"id":135138,"url":"https://patchwork.plctlab.org/api/1.2/patches/135138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814060702.4078649-1-pan2.li@intel.com/","msgid":"<20230814060702.4078649-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T06:07:02","name":"[v1] RISC-V: Support RVV VFWNMSAC rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814060702.4078649-1-pan2.li@intel.com/mbox/"},{"id":135143,"url":"https://patchwork.plctlab.org/api/1.2/patches/135143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c79e0c5a7c28518b41ac5d33c7817d921c91fadd.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T06:09:51","name":"[v2,1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c79e0c5a7c28518b41ac5d33c7817d921c91fadd.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135144,"url":"https://patchwork.plctlab.org/api/1.2/patches/135144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"<0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T06:09:52","name":"[v2,2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0404a8f4c12a3a2798f0ca18313949b9f268d305.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135142,"url":"https://patchwork.plctlab.org/api/1.2/patches/135142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com/","msgid":"<3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-14T06:09:53","name":"[v2,3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3091a5d106d2d8256723c6a74f08f8607c9f019f.1691993380.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135156,"url":"https://patchwork.plctlab.org/api/1.2/patches/135156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814064513.157363-1-juzhe.zhong@rivai.ai/","msgid":"<20230814064513.157363-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T06:45:13","name":"VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814064513.157363-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135186,"url":"https://patchwork.plctlab.org/api/1.2/patches/135186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814073902.722885-1-pan2.li@intel.com/","msgid":"<20230814073902.722885-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T07:39:02","name":"[v1] RISC-V: Support RVV VFSQRT rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814073902.722885-1-pan2.li@intel.com/mbox/"},{"id":135221,"url":"https://patchwork.plctlab.org/api/1.2/patches/135221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814083705.AA2713858C31@sourceware.org/","msgid":"<20230814083705.AA2713858C31@sourceware.org>","list_archive_url":null,"date":"2023-08-14T08:35:49","name":"Fix print_loop_info ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814083705.AA2713858C31@sourceware.org/mbox/"},{"id":135238,"url":"https://patchwork.plctlab.org/api/1.2/patches/135238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfdd58d9-577b-ea7b-d9fc-57ff565f5866@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T08:52:03","name":"vect: Remove several useless VMAT_INVARIANT checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bfdd58d9-577b-ea7b-d9fc-57ff565f5866@linux.ibm.com/mbox/"},{"id":135239,"url":"https://patchwork.plctlab.org/api/1.2/patches/135239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39e934e-869e-840d-eb7a-5b2de24146a8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-14T08:54:47","name":"vect: Move VMAT_LOAD_STORE_LANES handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b39e934e-869e-840d-eb7a-5b2de24146a8@linux.ibm.com/mbox/"},{"id":135240,"url":"https://patchwork.plctlab.org/api/1.2/patches/135240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com/","msgid":"<7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com>","list_archive_url":null,"date":"2023-08-14T08:59:11","name":"vect: Move VMAT_GATHER_SCATTER handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7314a4eb-26d0-e33e-94c2-31daca9f490e@linux.ibm.com/mbox/"},{"id":135283,"url":"https://patchwork.plctlab.org/api/1.2/patches/135283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814094218.3286920-1-juzhe.zhong@rivai.ai/","msgid":"<20230814094218.3286920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T09:42:18","name":"genrecog: Add SUBREG_BYTE.to_constant check to the genrecog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814094218.3286920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135297,"url":"https://patchwork.plctlab.org/api/1.2/patches/135297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se/","msgid":"<3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se>","list_archive_url":null,"date":"2023-08-14T09:57:09","name":"Fix for bug libstdc++/110860","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3311a355-15c8-4cdb-1644-b52d8aecbd63@pauldreik.se/mbox/"},{"id":135349,"url":"https://patchwork.plctlab.org/api/1.2/patches/135349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814112255.2071-1-jinma@linux.alibaba.com/","msgid":"<20230814112255.2071-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-14T11:22:55","name":"[v2] In the pipeline, USE or CLOBBER should delay execution if it starts a new live range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814112255.2071-1-jinma@linux.alibaba.com/mbox/"},{"id":135369,"url":"https://patchwork.plctlab.org/api/1.2/patches/135369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814121527.3482525-1-juzhe.zhong@rivai.ai/","msgid":"<20230814121527.3482525-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-14T12:15:27","name":"RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814121527.3482525-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135401,"url":"https://patchwork.plctlab.org/api/1.2/patches/135401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814124923.3108452-1-pan2.li@intel.com/","msgid":"<20230814124923.3108452-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T12:49:23","name":"[v1] RISC-V: Support RVV VFREC7 rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814124923.3108452-1-pan2.li@intel.com/mbox/"},{"id":135418,"url":"https://patchwork.plctlab.org/api/1.2/patches/135418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814132958.A6644385840B@sourceware.org/","msgid":"<20230814132958.A6644385840B@sourceware.org>","list_archive_url":null,"date":"2023-08-14T13:29:15","name":"tree-optimization/110991 - unroll size estimate after vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814132958.A6644385840B@sourceware.org/mbox/"},{"id":135465,"url":"https://patchwork.plctlab.org/api/1.2/patches/135465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com/","msgid":"<56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com>","list_archive_url":null,"date":"2023-08-14T14:15:52","name":"[GCC] aarch64: Add support for Cortex-A720 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56284602-b0f9-7bb0-2da6-420b5a97d90b@arm.com/mbox/"},{"id":135481,"url":"https://patchwork.plctlab.org/api/1.2/patches/135481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814144651.3437687-1-pan2.li@intel.com/","msgid":"<20230814144651.3437687-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-14T14:46:51","name":"[v2] RISC-V: Support RVV VFREC7 rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814144651.3437687-1-pan2.li@intel.com/mbox/"},{"id":135523,"url":"https://patchwork.plctlab.org/api/1.2/patches/135523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814154853.2371420-1-vultkayn@gcc.gnu.org/","msgid":"<20230814154853.2371420-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-14T15:48:55","name":"[v2] analyzer: New option fanalyzer-show-events-in-system-headers [PR110543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814154853.2371420-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135527,"url":"https://patchwork.plctlab.org/api/1.2/patches/135527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNpPecZj12tk5zbn@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-14T15:59:53","name":"Avoid division by zero in fold_loop_internal_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNpPecZj12tk5zbn@kam.mff.cuni.cz/mbox/"},{"id":135575,"url":"https://patchwork.plctlab.org/api/1.2/patches/135575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814173312.14980-1-jason@redhat.com/","msgid":"<20230814173312.14980-1-jason@redhat.com>","list_archive_url":null,"date":"2023-08-14T17:33:12","name":"[pushed] c++: -fconcepts and __cpp_concepts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814173312.14980-1-jason@redhat.com/mbox/"},{"id":135582,"url":"https://patchwork.plctlab.org/api/1.2/patches/135582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jl1cyky.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-14T17:39:57","name":"Fortran: Avoid accessing gfc_charlen when not looking at BT_CHARACTER (PR 110677)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri64jl1cyky.fsf@suse.cz/mbox/"},{"id":135584,"url":"https://patchwork.plctlab.org/api/1.2/patches/135584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814180105.1812551-1-christophe.lyon@linaro.org/","msgid":"<20230814180105.1812551-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:01:05","name":"arm: [MVE intrinsics] fix binary_acca_int32 and binary_acca_int64 shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814180105.1812551-1-christophe.lyon@linaro.org/mbox/"},{"id":135585,"url":"https://patchwork.plctlab.org/api/1.2/patches/135585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814181005.1905319-1-christophe.lyon@linaro.org/","msgid":"<20230814181005.1905319-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:10:05","name":"arm: [MVE intrinsics] Remove dead check for float type in parse_element_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814181005.1905319-1-christophe.lyon@linaro.org/mbox/"},{"id":135588,"url":"https://patchwork.plctlab.org/api/1.2/patches/135588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-1-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:14","name":"[1/9] arm: [MVE intrinsics] factorize vmullbq vmulltq","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-1-christophe.lyon@linaro.org/mbox/"},{"id":135589,"url":"https://patchwork.plctlab.org/api/1.2/patches/135589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-2-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:15","name":"[2/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-2-christophe.lyon@linaro.org/mbox/"},{"id":135592,"url":"https://patchwork.plctlab.org/api/1.2/patches/135592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-3-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:16","name":"[3/9] arm: [MVE intrinsics] add binary_widen shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-3-christophe.lyon@linaro.org/mbox/"},{"id":135595,"url":"https://patchwork.plctlab.org/api/1.2/patches/135595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-4-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:17","name":"[4/9] arm: [MVE intrinsics] rework vmullbq_int vmulltq_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-4-christophe.lyon@linaro.org/mbox/"},{"id":135590,"url":"https://patchwork.plctlab.org/api/1.2/patches/135590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-5-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:18","name":"[5/9] arm: [MVE intrinsics] add support for p8 and p16 polynomial types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-5-christophe.lyon@linaro.org/mbox/"},{"id":135591,"url":"https://patchwork.plctlab.org/api/1.2/patches/135591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-6-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:19","name":"[6/9] arm: [MVE intrinsics] add support for U and p formats in parse_element_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-6-christophe.lyon@linaro.org/mbox/"},{"id":135593,"url":"https://patchwork.plctlab.org/api/1.2/patches/135593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-7-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-7-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:20","name":"[7/9] arm: [MVE intrinsics] add binary_widen_poly shape","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-7-christophe.lyon@linaro.org/mbox/"},{"id":135594,"url":"https://patchwork.plctlab.org/api/1.2/patches/135594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-8-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-8-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:21","name":"[8/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull_poly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-8-christophe.lyon@linaro.org/mbox/"},{"id":135596,"url":"https://patchwork.plctlab.org/api/1.2/patches/135596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-9-christophe.lyon@linaro.org/","msgid":"<20230814183422.1905511-9-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-08-14T18:34:22","name":"[9/9] arm: [MVE intrinsics] rework vmullbq_poly vmulltq_poly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230814183422.1905511-9-christophe.lyon@linaro.org/mbox/"},{"id":135600,"url":"https://patchwork.plctlab.org/api/1.2/patches/135600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com/","msgid":"<780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com>","list_archive_url":null,"date":"2023-08-14T20:14:39","name":"[pushed,LRA] : Process output stack pointer reloads before emitting reload insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/780e30e6-6005-5ff8-bf30-8e65a573d4c3@redhat.com/mbox/"},{"id":135606,"url":"https://patchwork.plctlab.org/api/1.2/patches/135606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-2-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:32","name":"[v4,1/6] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-2-panchenghui@loongson.cn/mbox/"},{"id":135604,"url":"https://patchwork.plctlab.org/api/1.2/patches/135604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-3-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:33","name":"[v4,2/6] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-3-panchenghui@loongson.cn/mbox/"},{"id":135605,"url":"https://patchwork.plctlab.org/api/1.2/patches/135605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-4-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:34","name":"[v4,3/6] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-4-panchenghui@loongson.cn/mbox/"},{"id":135602,"url":"https://patchwork.plctlab.org/api/1.2/patches/135602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-5-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:35","name":"[v4,4/6] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-5-panchenghui@loongson.cn/mbox/"},{"id":135607,"url":"https://patchwork.plctlab.org/api/1.2/patches/135607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-6-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:36","name":"[v4,5/6] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-6-panchenghui@loongson.cn/mbox/"},{"id":135603,"url":"https://patchwork.plctlab.org/api/1.2/patches/135603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-7-panchenghui@loongson.cn/","msgid":"<20230815010537.1817292-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-15T01:05:37","name":"[v4,6/6] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815010537.1817292-7-panchenghui@loongson.cn/mbox/"},{"id":135614,"url":"https://patchwork.plctlab.org/api/1.2/patches/135614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815025525.3437008-1-pan2.li@intel.com/","msgid":"<20230815025525.3437008-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T02:55:25","name":"[v1] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815025525.3437008-1-pan2.li@intel.com/mbox/"},{"id":135615,"url":"https://patchwork.plctlab.org/api/1.2/patches/135615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com/","msgid":"<85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com>","list_archive_url":null,"date":"2023-08-15T03:13:08","name":"Makefile.in: Make recog.h depend on $(TREE_H)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85917744-79f6-2752-98a3-13c19c9fc65c@linux.ibm.com/mbox/"},{"id":135619,"url":"https://patchwork.plctlab.org/api/1.2/patches/135619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815045704.30B3A2042C@pchp3.se.axis.com/","msgid":"<20230815045704.30B3A2042C@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-15T04:57:04","name":"CRIS: Don'\''t include tree.h in cris-protos.h, PR bootstrap/111021","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815045704.30B3A2042C@pchp3.se.axis.com/mbox/"},{"id":135620,"url":"https://patchwork.plctlab.org/api/1.2/patches/135620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815050146.204188-1-pan2.li@intel.com/","msgid":"<20230815050146.204188-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T05:01:46","name":"[v1] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815050146.204188-1-pan2.li@intel.com/mbox/"},{"id":135622,"url":"https://patchwork.plctlab.org/api/1.2/patches/135622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815051952.6488F203F1@pchp3.se.axis.com/","msgid":"<20230815051952.6488F203F1@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-15T05:19:52","name":"[v2] CRIS: Don'\''t include tree.h in cris-protos.h, PR bootstrap/111021","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815051952.6488F203F1@pchp3.se.axis.com/mbox/"},{"id":135624,"url":"https://patchwork.plctlab.org/api/1.2/patches/135624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815064807.1314281-1-pan2.li@intel.com/","msgid":"<20230815064807.1314281-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T06:48:07","name":"[v1] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815064807.1314281-1-pan2.li@intel.com/mbox/"},{"id":135629,"url":"https://patchwork.plctlab.org/api/1.2/patches/135629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815080147.1986255-1-pan2.li@intel.com/","msgid":"<20230815080147.1986255-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T08:01:47","name":"[v1] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815080147.1986255-1-pan2.li@intel.com/mbox/"},{"id":135632,"url":"https://patchwork.plctlab.org/api/1.2/patches/135632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815083452.90040385700D@sourceware.org/","msgid":"<20230815083452.90040385700D@sourceware.org>","list_archive_url":null,"date":"2023-08-15T08:34:01","name":"Use find_loop_location from unrolling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815083452.90040385700D@sourceware.org/mbox/"},{"id":135636,"url":"https://patchwork.plctlab.org/api/1.2/patches/135636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815090730.2537591-1-pan2.li@intel.com/","msgid":"<20230815090730.2537591-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-15T09:07:30","name":"[v1] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815090730.2537591-1-pan2.li@intel.com/mbox/"},{"id":135645,"url":"https://patchwork.plctlab.org/api/1.2/patches/135645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815103943.21417-1-chenxiaolong@loongson.cn/","msgid":"<20230815103943.21417-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-15T10:39:43","name":"[v3] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815103943.21417-1-chenxiaolong@loongson.cn/mbox/"},{"id":135652,"url":"https://patchwork.plctlab.org/api/1.2/patches/135652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815121050.F2D9B3856DD0@sourceware.org/","msgid":"<20230815121050.F2D9B3856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-15T12:10:06","name":"Support constants and externals in BB reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815121050.F2D9B3856DD0@sourceware.org/mbox/"},{"id":135654,"url":"https://patchwork.plctlab.org/api/1.2/patches/135654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815122917.270596-1-juzhe.zhong@rivai.ai/","msgid":"<20230815122917.270596-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-15T12:29:17","name":"[V2] VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815122917.270596-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135659,"url":"https://patchwork.plctlab.org/api/1.2/patches/135659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815132829.57DF13856DD0@sourceware.org/","msgid":"<20230815132829.57DF13856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-15T13:27:42","name":"Cleanup BB vectorization roots handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815132829.57DF13856DD0@sourceware.org/mbox/"},{"id":135660,"url":"https://patchwork.plctlab.org/api/1.2/patches/135660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815133728.EE0D23856964@sourceware.org/","msgid":"<20230815133728.EE0D23856964@sourceware.org>","list_archive_url":null,"date":"2023-08-15T13:36:40","name":"Handle TYPE_OVERFLOW_UNDEFINED vectorized BB reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815133728.EE0D23856964@sourceware.org/mbox/"},{"id":135661,"url":"https://patchwork.plctlab.org/api/1.2/patches/135661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXNSpt28jn-ZG-kMHBNJSHKoY2wBkgF1Y-FarcrKeBePA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T13:41:58","name":"[v4] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuXNSpt28jn-ZG-kMHBNJSHKoY2wBkgF1Y-FarcrKeBePA@mail.gmail.com/mbox/"},{"id":135665,"url":"https://patchwork.plctlab.org/api/1.2/patches/135665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com/","msgid":"<4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com>","list_archive_url":null,"date":"2023-08-15T14:02:40","name":"IFN: Fix vector extraction into promoted subreg.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b3d91c7-6d6b-cfff-4279-ce991f761b16@gmail.com/mbox/"},{"id":135667,"url":"https://patchwork.plctlab.org/api/1.2/patches/135667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jztwcr05.fsf@euler.schwinge.homeip.net/","msgid":"<87jztwcr05.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-08-15T14:35:54","name":"[v3] OpenACC 2.7: default clause support for data constructs (was: [PATCH, OpenACC 2.7, v2] Implement default clause support for data constructs)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jztwcr05.fsf@euler.schwinge.homeip.net/mbox/"},{"id":135669,"url":"https://patchwork.plctlab.org/api/1.2/patches/135669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815151804.3588843-1-ibuclaw@gdcproject.org/","msgid":"<20230815151804.3588843-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-08-15T15:18:04","name":"[committed,GCC,12] d: Fix internal compiler error: in layout_aggregate_type, at d/types.cc:574","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815151804.3588843-1-ibuclaw@gdcproject.org/mbox/"},{"id":135674,"url":"https://patchwork.plctlab.org/api/1.2/patches/135674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3b347e3-55fc-ab4d-14c2-0c372167be34@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T15:49:42","name":"RISC-V: Fix reduc_strict_run-1 test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3b347e3-55fc-ab4d-14c2-0c372167be34@gmail.com/mbox/"},{"id":135675,"url":"https://patchwork.plctlab.org/api/1.2/patches/135675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2bf61f6-08a5-f21d-8cc3-3054c0d444ce@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-15T15:55:20","name":"[v2,GCC] aarch64: Add support for Cortex-A720 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2bf61f6-08a5-f21d-8cc3-3054c0d444ce@arm.com/mbox/"},{"id":135683,"url":"https://patchwork.plctlab.org/api/1.2/patches/135683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815172029.63-1-romain.geissler@amadeus.com/","msgid":"<20230815172029.63-1-romain.geissler@amadeus.com>","list_archive_url":null,"date":"2023-08-15T17:20:30","name":"[gcc,11,backport] Support ld.mold linker.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815172029.63-1-romain.geissler@amadeus.com/mbox/"},{"id":135685,"url":"https://patchwork.plctlab.org/api/1.2/patches/135685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815182913.2824479-1-ewlu@rivosinc.com/","msgid":"<20230815182913.2824479-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-15T18:29:10","name":"[V3] riscv: generate builtin macro for compilation with strict alignment:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815182913.2824479-1-ewlu@rivosinc.com/mbox/"},{"id":135686,"url":"https://patchwork.plctlab.org/api/1.2/patches/135686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815183208.330060-1-vultkayn@gcc.gnu.org/","msgid":"<20230815183208.330060-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-15T18:32:09","name":"testsuite: Remove unused dg-line in ce8cdf5bcf96a2db6d7b9f656fc9ba58d7942a83","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815183208.330060-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135688,"url":"https://patchwork.plctlab.org/api/1.2/patches/135688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184618.7396-1-david.faust@oracle.com/","msgid":"<20230815184618.7396-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-15T18:46:18","name":"bpf: fix pseudoc w regs for small modes [PR111029]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184618.7396-1-david.faust@oracle.com/mbox/"},{"id":135689,"url":"https://patchwork.plctlab.org/api/1.2/patches/135689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184908.7474-1-david.faust@oracle.com/","msgid":"<20230815184908.7474-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-15T18:49:08","name":"bpf: remove useless define_insn for extendsisi2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815184908.7474-1-david.faust@oracle.com/mbox/"},{"id":135694,"url":"https://patchwork.plctlab.org/api/1.2/patches/135694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193630.ltkwpmezkmw4rade@lug-owl.de/","msgid":"<20230815193630.ltkwpmezkmw4rade@lug-owl.de>","list_archive_url":null,"date":"2023-08-15T19:36:30","name":"config-list.mk i686-solaris2.11: Use --with-gnu-as","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193630.ltkwpmezkmw4rade@lug-owl.de/mbox/"},{"id":135695,"url":"https://patchwork.plctlab.org/api/1.2/patches/135695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193635.6lk7kqqjzkbfh22w@lug-owl.de/","msgid":"<20230815193635.6lk7kqqjzkbfh22w@lug-owl.de>","list_archive_url":null,"date":"2023-08-15T19:36:35","name":"config-list.mk Darwin: Use --with-gnu-as","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230815193635.6lk7kqqjzkbfh22w@lug-owl.de/mbox/"},{"id":135707,"url":"https://patchwork.plctlab.org/api/1.2/patches/135707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816010253.860803-1-thiago.bauermann@linaro.org/","msgid":"<20230816010253.860803-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-16T01:02:53","name":"Remove XFAIL from gcc/testsuite/gcc.dg/unroll-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816010253.860803-1-thiago.bauermann@linaro.org/mbox/"},{"id":135708,"url":"https://patchwork.plctlab.org/api/1.2/patches/135708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014519.3053770-1-juzhe.zhong@rivai.ai/","msgid":"<20230816014519.3053770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T01:45:19","name":"[V2] RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014519.3053770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135709,"url":"https://patchwork.plctlab.org/api/1.2/patches/135709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014822.20018-1-guojie@loongson.cn/","msgid":"<20230816014822.20018-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-08-16T01:48:22","name":"Loongarch: Fix plugin header missing install.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816014822.20018-1-guojie@loongson.cn/mbox/"},{"id":135714,"url":"https://patchwork.plctlab.org/api/1.2/patches/135714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e94df26f-39d2-4426-3fd1-f88946f34378@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T02:31:11","name":"Makefile.in: Add variable TM_P_H2 for TM_P_H dependency [PR111021]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e94df26f-39d2-4426-3fd1-f88946f34378@linux.ibm.com/mbox/"},{"id":135720,"url":"https://patchwork.plctlab.org/api/1.2/patches/135720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816051756.3827494-1-pan2.li@intel.com/","msgid":"<20230816051756.3827494-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T05:17:56","name":"[v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816051756.3827494-1-pan2.li@intel.com/mbox/"},{"id":135726,"url":"https://patchwork.plctlab.org/api/1.2/patches/135726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816062057.379965-1-pan2.li@intel.com/","msgid":"<20230816062057.379965-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T06:20:57","name":"[v2] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816062057.379965-1-pan2.li@intel.com/mbox/"},{"id":135729,"url":"https://patchwork.plctlab.org/api/1.2/patches/135729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816065055.653158-1-pan2.li@intel.com/","msgid":"<20230816065055.653158-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T06:50:55","name":"[v2] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816065055.653158-1-pan2.li@intel.com/mbox/"},{"id":135732,"url":"https://patchwork.plctlab.org/api/1.2/patches/135732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816073227.934463-1-pan2.li@intel.com/","msgid":"<20230816073227.934463-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T07:32:27","name":"[v2] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816073227.934463-1-pan2.li@intel.com/mbox/"},{"id":135735,"url":"https://patchwork.plctlab.org/api/1.2/patches/135735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816081007.1211587-1-pan2.li@intel.com/","msgid":"<20230816081007.1211587-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T08:10:07","name":"[v2] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816081007.1211587-1-pan2.li@intel.com/mbox/"},{"id":135736,"url":"https://patchwork.plctlab.org/api/1.2/patches/135736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816084038.2725233-1-yanzhang.wang@intel.com/","msgid":"<20230816084038.2725233-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-08-16T08:40:38","name":"RISC-V: Support simplify (-1-x) for vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816084038.2725233-1-yanzhang.wang@intel.com/mbox/"},{"id":135739,"url":"https://patchwork.plctlab.org/api/1.2/patches/135739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816094359.2230366-1-pan2.li@intel.com/","msgid":"<20230816094359.2230366-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T09:43:59","name":"[v1] RISC-V: Fix one build error for template default arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816094359.2230366-1-pan2.li@intel.com/mbox/"},{"id":135765,"url":"https://patchwork.plctlab.org/api/1.2/patches/135765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816121909.53047-1-vultkayn@gcc.gnu.org/","msgid":"<20230816121909.53047-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-16T12:19:11","name":"[WIP,RFC,v2] analyzer: Add support of placement new and improved operator new [PR105948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816121909.53047-1-vultkayn@gcc.gnu.org/mbox/"},{"id":135756,"url":"https://patchwork.plctlab.org/api/1.2/patches/135756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816125418.534962-1-pan2.li@intel.com/","msgid":"<20230816125418.534962-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-16T12:54:18","name":"[v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816125418.534962-1-pan2.li@intel.com/mbox/"},{"id":135758,"url":"https://patchwork.plctlab.org/api/1.2/patches/135758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816131205.233568-1-juzhe.zhong@rivai.ai/","msgid":"<20230816131205.233568-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T13:12:05","name":"gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816131205.233568-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135760,"url":"https://patchwork.plctlab.org/api/1.2/patches/135760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816132010.3628851-1-juzhe.zhong@rivai.ai/","msgid":"<20230816132010.3628851-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-16T13:20:10","name":"RISC-V: Add COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816132010.3628851-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135791,"url":"https://patchwork.plctlab.org/api/1.2/patches/135791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3fa64e0-bc2c-0c14-9062-d6f5c1690637@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T16:13:41","name":"[pushed,LRA] : Spill pseudos assigned to fp when fp->sp elimination became impossible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a3fa64e0-bc2c-0c14-9062-d6f5c1690637@redhat.com/mbox/"},{"id":135793,"url":"https://patchwork.plctlab.org/api/1.2/patches/135793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816162354.658102-1-jwakely@redhat.com/","msgid":"<20230816162354.658102-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T16:23:45","name":"[committed] libstdc++: Fix comment naming upstream PSTL test file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816162354.658102-1-jwakely@redhat.com/mbox/"},{"id":135794,"url":"https://patchwork.plctlab.org/api/1.2/patches/135794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfS94kca5MUXS=DQaoLqeCsEY57bwo=JVz8wrn2sb4Z=Dg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-16T16:32:07","name":"libgccjit: Add support for `restrict` attribute on function parameters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAOQCfS94kca5MUXS=DQaoLqeCsEY57bwo=JVz8wrn2sb4Z=Dg@mail.gmail.com/mbox/"},{"id":135807,"url":"https://patchwork.plctlab.org/api/1.2/patches/135807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190338.709392-1-jwakely@redhat.com/","msgid":"<20230816190338.709392-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T19:03:17","name":"[committed] libstdc++: Update __cplusplus value for C++23 in version.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190338.709392-1-jwakely@redhat.com/mbox/"},{"id":135808,"url":"https://patchwork.plctlab.org/api/1.2/patches/135808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190453.709520-1-jwakely@redhat.com/","msgid":"<20230816190453.709520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-16T19:04:07","name":"[committed] libstdc++: Fix std::basic_string::resize_and_overwrite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816190453.709520-1-jwakely@redhat.com/mbox/"},{"id":135809,"url":"https://patchwork.plctlab.org/api/1.2/patches/135809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf8ils0z.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-16T19:13:32","name":"build: Allow for Xcode 15 ld -v output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf8ils0z.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":135810,"url":"https://patchwork.plctlab.org/api/1.2/patches/135810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7j6lrpg.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-08-16T19:20:27","name":"fixincludes: Update darwin_flt_eval_method for macOS 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddo7j6lrpg.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":135817,"url":"https://patchwork.plctlab.org/api/1.2/patches/135817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0bfd1a02-eb97-4ceb-b34f-3f54b3c5cc2b-1692217001603@3c-app-gmx-bap14/","msgid":"","list_archive_url":null,"date":"2023-08-16T20:16:41","name":"[committed] Fortran: fix memleak for character,value dummy of bind(c) procedure [PR110360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-0bfd1a02-eb97-4ceb-b34f-3f54b3c5cc2b-1692217001603@3c-app-gmx-bap14/mbox/"},{"id":135819,"url":"https://patchwork.plctlab.org/api/1.2/patches/135819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816202324.90806-1-slyich@gmail.com/","msgid":"<20230816202324.90806-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-08-16T20:23:24","name":"Drop unused enum vrp_mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816202324.90806-1-slyich@gmail.com/mbox/"},{"id":135830,"url":"https://patchwork.plctlab.org/api/1.2/patches/135830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816223513.3084770-1-apinski@marvell.com/","msgid":"<20230816223513.3084770-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-16T22:35:13","name":"Add libstdc++-v3/include/bits/version.h to gcc_update touch part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816223513.3084770-1-apinski@marvell.com/mbox/"},{"id":135835,"url":"https://patchwork.plctlab.org/api/1.2/patches/135835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816231403.321156-1-patrick@rivosinc.com/","msgid":"<20230816231403.321156-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-16T23:14:03","name":"RISC-V: Add rotate immediate regression test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230816231403.321156-1-patrick@rivosinc.com/mbox/"},{"id":135836,"url":"https://patchwork.plctlab.org/api/1.2/patches/135836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com/","msgid":"<1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-17T00:19:21","name":"[ver,2] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com/mbox/"},{"id":135837,"url":"https://patchwork.plctlab.org/api/1.2/patches/135837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817011729.324315-1-patrick@rivosinc.com/","msgid":"<20230817011729.324315-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-17T01:17:29","name":"[v2] RISCV: Add rotate immediate regression test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817011729.324315-1-patrick@rivosinc.com/mbox/"},{"id":135838,"url":"https://patchwork.plctlab.org/api/1.2/patches/135838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817012302.2771487-1-pan2.li@intel.com/","msgid":"<20230817012302.2771487-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T01:23:02","name":"[v1] RISC-V: Support RVV VFNCVT.XU.F.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817012302.2771487-1-pan2.li@intel.com/mbox/"},{"id":135839,"url":"https://patchwork.plctlab.org/api/1.2/patches/135839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817013733.3093010-1-apinski@marvell.com/","msgid":"<20230817013733.3093010-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-17T01:37:33","name":"MATCH: Sink convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817013733.3093010-1-apinski@marvell.com/mbox/"},{"id":135840,"url":"https://patchwork.plctlab.org/api/1.2/patches/135840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817021815.3062069-1-pan2.li@intel.com/","msgid":"<20230817021815.3062069-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T02:18:15","name":"[v1] RISC-V: Support RVV VFNCVT.F.{X|XU|F}.W rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817021815.3062069-1-pan2.li@intel.com/mbox/"},{"id":135842,"url":"https://patchwork.plctlab.org/api/1.2/patches/135842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817030829.3352171-1-pan2.li@intel.com/","msgid":"<20230817030829.3352171-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T03:08:29","name":"[v1] RISC-V: Support RVV VFREDUSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817030829.3352171-1-pan2.li@intel.com/mbox/"},{"id":135847,"url":"https://patchwork.plctlab.org/api/1.2/patches/135847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817055906.2843802-1-juzhe.zhong@rivai.ai/","msgid":"<20230817055906.2843802-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-17T05:59:06","name":"RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817055906.2843802-1-juzhe.zhong@rivai.ai/mbox/"},{"id":135848,"url":"https://patchwork.plctlab.org/api/1.2/patches/135848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com/","msgid":"<1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com>","list_archive_url":null,"date":"2023-08-17T06:14:56","name":"Makefile.in: Make TM_P_H depend on $(TREE_H) [PR111021]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1683e0df-6d4f-6da9-1330-1cc1fb0144e0@linux.ibm.com/mbox/"},{"id":135849,"url":"https://patchwork.plctlab.org/api/1.2/patches/135849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f30054-581d-826a-bcf4-021e2f0407b6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T06:22:26","name":"vect: Factor out the handling on scatter store having gs_info.decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a0f30054-581d-826a-bcf4-021e2f0407b6@linux.ibm.com/mbox/"},{"id":135850,"url":"https://patchwork.plctlab.org/api/1.2/patches/135850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817062303.3727727-1-pan2.li@intel.com/","msgid":"<20230817062303.3727727-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T06:23:03","name":"[v1] RISC-V: Support RVV VFREDOSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817062303.3727727-1-pan2.li@intel.com/mbox/"},{"id":135853,"url":"https://patchwork.plctlab.org/api/1.2/patches/135853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-2-haochen.jiang@intel.com/","msgid":"<20230817065509.130068-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-17T06:55:08","name":"[1/2,1/2] Support AVX10.1 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-2-haochen.jiang@intel.com/mbox/"},{"id":135852,"url":"https://patchwork.plctlab.org/api/1.2/patches/135852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-3-haochen.jiang@intel.com/","msgid":"<20230817065509.130068-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-17T06:55:09","name":"[2/2,2/2] Support AVX10.1 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817065509.130068-3-haochen.jiang@intel.com/mbox/"},{"id":135854,"url":"https://patchwork.plctlab.org/api/1.2/patches/135854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072052.w62bmpzkxyktplnb@lug-owl.de/","msgid":"<20230817072052.w62bmpzkxyktplnb@lug-owl.de>","list_archive_url":null,"date":"2023-08-17T07:20:52","name":"Fix code_helper unused argument warning for fr30","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072052.w62bmpzkxyktplnb@lug-owl.de/mbox/"},{"id":135855,"url":"https://patchwork.plctlab.org/api/1.2/patches/135855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072612.4026035-1-pan2.li@intel.com/","msgid":"<20230817072612.4026035-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T07:26:12","name":"[v1] RISC-V: Support RVV VFWREDOSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817072612.4026035-1-pan2.li@intel.com/mbox/"},{"id":135857,"url":"https://patchwork.plctlab.org/api/1.2/patches/135857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074625.868621-1-jwakely@redhat.com/","msgid":"<20230817074625.868621-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T07:45:05","name":"[committed] libstdc++: Fix testsuite no_pch directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074625.868621-1-jwakely@redhat.com/mbox/"},{"id":135858,"url":"https://patchwork.plctlab.org/api/1.2/patches/135858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074719.868714-1-jwakely@redhat.com/","msgid":"<20230817074719.868714-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T07:46:27","name":"[committed] libstdc++: Disable PCH for tests that rely on include order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817074719.868714-1-jwakely@redhat.com/mbox/"},{"id":135859,"url":"https://patchwork.plctlab.org/api/1.2/patches/135859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817075655.165144-1-lehua.ding@rivai.ai/","msgid":"<20230817075655.165144-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T07:56:55","name":"RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817075655.165144-1-lehua.ding@rivai.ai/mbox/"},{"id":135861,"url":"https://patchwork.plctlab.org/api/1.2/patches/135861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817080558.117051-1-pan2.li@intel.com/","msgid":"<20230817080558.117051-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-17T08:05:58","name":"[v1] RISC-V: Support RVV VFWREDUSUM.VS rounding mode intrinsic API","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817080558.117051-1-pan2.li@intel.com/mbox/"},{"id":135870,"url":"https://patchwork.plctlab.org/api/1.2/patches/135870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com/","msgid":"<3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com>","list_archive_url":null,"date":"2023-08-17T10:30:58","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e2cd7fe-8fed-e793-a62f-0f33b9c12e88@arm.com/mbox/"},{"id":135871,"url":"https://patchwork.plctlab.org/api/1.2/patches/135871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com/","msgid":"<949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com>","list_archive_url":null,"date":"2023-08-17T10:31:26","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/949f5dd0-cdf0-715a-f04c-3de80c9b974f@arm.com/mbox/"},{"id":135872,"url":"https://patchwork.plctlab.org/api/1.2/patches/135872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZN34fH4L2SfD5smj@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T10:37:48","name":"doc: Fixes to RTL-SSA sample code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZN34fH4L2SfD5smj@arm.com/mbox/"},{"id":135873,"url":"https://patchwork.plctlab.org/api/1.2/patches/135873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlee9j4hr.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-17T11:24:48","name":"c: Add support for [[__extension__ ...]]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlee9j4hr.fsf_-_@arm.com/mbox/"},{"id":135875,"url":"https://patchwork.plctlab.org/api/1.2/patches/135875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817114320.3083675-1-lehua.ding@rivai.ai/","msgid":"<20230817114320.3083675-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T11:43:20","name":"RISC-V: Fix XPASS slp testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817114320.3083675-1-lehua.ding@rivai.ai/mbox/"},{"id":135878,"url":"https://patchwork.plctlab.org/api/1.2/patches/135878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122131.966663-1-jwakely@redhat.com/","msgid":"<20230817122131.966663-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T12:20:25","name":"[committed] libstdc++: Regenerate Makefile.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122131.966663-1-jwakely@redhat.com/mbox/"},{"id":135879,"url":"https://patchwork.plctlab.org/api/1.2/patches/135879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122226.966809-1-jwakely@redhat.com/","msgid":"<20230817122226.966809-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T12:21:50","name":"[committed] libstdc++: Fix std::format(\"{:F}\", inf) to use uppercase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122226.966809-1-jwakely@redhat.com/mbox/"},{"id":135881,"url":"https://patchwork.plctlab.org/api/1.2/patches/135881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122923.3114045-1-lehua.ding@rivai.ai/","msgid":"<20230817122923.3114045-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T12:29:23","name":"[V2] RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817122923.3114045-1-lehua.ding@rivai.ai/mbox/"},{"id":135882,"url":"https://patchwork.plctlab.org/api/1.2/patches/135882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124123.22274-1-jose.marchesi@oracle.com/","msgid":"<20230817124123.22274-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-17T12:41:23","name":"[COMMITTED] bpf: support `naked'\'' function attributes in BPF targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124123.22274-1-jose.marchesi@oracle.com/mbox/"},{"id":135883,"url":"https://patchwork.plctlab.org/api/1.2/patches/135883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124354.3137796-1-lehua.ding@rivai.ai/","msgid":"<20230817124354.3137796-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-17T12:43:54","name":"[V2] RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin or zhinxmin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817124354.3137796-1-lehua.ding@rivai.ai/mbox/"},{"id":135885,"url":"https://patchwork.plctlab.org/api/1.2/patches/135885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817132734.99FE23857016@sourceware.org/","msgid":"<20230817132734.99FE23857016@sourceware.org>","list_archive_url":null,"date":"2023-08-17T13:26:51","name":"tree-optimization/111039 - abnormals and bit test merging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817132734.99FE23857016@sourceware.org/mbox/"},{"id":135889,"url":"https://patchwork.plctlab.org/api/1.2/patches/135889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com/","msgid":"<9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com>","list_archive_url":null,"date":"2023-08-17T13:32:37","name":"[committed] libgomp: call numa_available first when using libnuma","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9cb0b7cb-1049-68c7-e38c-c02553aae7d7@codesourcery.com/mbox/"},{"id":135892,"url":"https://patchwork.plctlab.org/api/1.2/patches/135892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817140513.26888-1-jose.marchesi@oracle.com/","msgid":"<20230817140513.26888-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-17T14:05:13","name":"[V4] Add warning options -W[no-]compare-distinct-pointer-types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817140513.26888-1-jose.marchesi@oracle.com/mbox/"},{"id":135912,"url":"https://patchwork.plctlab.org/api/1.2/patches/135912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com/","msgid":"<8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com>","list_archive_url":null,"date":"2023-08-17T16:02:23","name":"[pushed,LRA] : When assigning stack slots to pseudos previously assigned to fp consider other spilled pseudos","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d04289d-a00e-20e0-38ce-c18b525d62b3@redhat.com/mbox/"},{"id":135924,"url":"https://patchwork.plctlab.org/api/1.2/patches/135924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8da8804e-be70-a023-253c-317327ff955d@redhat.com/","msgid":"<8da8804e-be70-a023-253c-317327ff955d@redhat.com>","list_archive_url":null,"date":"2023-08-17T17:40:03","name":"[COMMITTED] PR tree-optimization/111009 - Fix range-ops operator_addr.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8da8804e-be70-a023-253c-317327ff955d@redhat.com/mbox/"},{"id":135934,"url":"https://patchwork.plctlab.org/api/1.2/patches/135934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817181308.122802-2-ishitatsuyuki@gmail.com/","msgid":"<20230817181308.122802-2-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-08-17T18:12:51","name":"RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817181308.122802-2-ishitatsuyuki@gmail.com/mbox/"},{"id":136080,"url":"https://patchwork.plctlab.org/api/1.2/patches/136080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817184031.92165-1-egallager@gcc.gnu.org/","msgid":"<20230817184031.92165-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-17T18:40:32","name":"improve error when /usr/include isn'\''t found [PR90835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817184031.92165-1-egallager@gcc.gnu.org/mbox/"},{"id":136081,"url":"https://patchwork.plctlab.org/api/1.2/patches/136081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817185942.93988-1-egallager@gcc.gnu.org/","msgid":"<20230817185942.93988-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-17T18:59:43","name":"improve error when /usr/include isn'\''t found [PR90835]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817185942.93988-1-egallager@gcc.gnu.org/mbox/"},{"id":135940,"url":"https://patchwork.plctlab.org/api/1.2/patches/135940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817192554.3137209-1-apinski@marvell.com/","msgid":"<20230817192554.3137209-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-17T19:25:54","name":"Document cond_neg, cond_one_cmpl, cond_len_neg and cond_len_one_cmpl standard patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817192554.3137209-1-apinski@marvell.com/mbox/"},{"id":135941,"url":"https://patchwork.plctlab.org/api/1.2/patches/135941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203052.1131293-1-jwakely@redhat.com/","msgid":"<20230817203052.1131293-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:30:31","name":"[committed] libstdc++: Define std::string::resize_and_overwrite for C++11 and COW string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203052.1131293-1-jwakely@redhat.com/mbox/"},{"id":135942,"url":"https://patchwork.plctlab.org/api/1.2/patches/135942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203100.1131311-1-jwakely@redhat.com/","msgid":"<20230817203100.1131311-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:30:53","name":"[committed] libstdc++: Optimize std::to_string using std::string::resize_and_overwrite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203100.1131311-1-jwakely@redhat.com/mbox/"},{"id":135944,"url":"https://patchwork.plctlab.org/api/1.2/patches/135944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203107.1131333-1-jwakely@redhat.com/","msgid":"<20230817203107.1131333-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:01","name":"[committed] libstdc++: Implement std::to_string in terms of std::format (P2587R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203107.1131333-1-jwakely@redhat.com/mbox/"},{"id":135946,"url":"https://patchwork.plctlab.org/api/1.2/patches/135946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203118.1131359-1-jwakely@redhat.com/","msgid":"<20230817203118.1131359-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:08","name":"[committed] libstdc++: Rework std::format support for wchar_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203118.1131359-1-jwakely@redhat.com/mbox/"},{"id":135947,"url":"https://patchwork.plctlab.org/api/1.2/patches/135947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203136.1131390-1-jwakely@redhat.com/","msgid":"<20230817203136.1131390-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:19","name":"[committed] libstdc++: Simplify chrono::__units_suffix using std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203136.1131390-1-jwakely@redhat.com/mbox/"},{"id":135949,"url":"https://patchwork.plctlab.org/api/1.2/patches/135949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203151.1131407-1-jwakely@redhat.com/","msgid":"<20230817203151.1131407-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:37","name":"[committed] libstdc++: Make __cmp_cat::__unseq constructor consteval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203151.1131407-1-jwakely@redhat.com/mbox/"},{"id":135943,"url":"https://patchwork.plctlab.org/api/1.2/patches/135943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203200.1131474-1-jwakely@redhat.com/","msgid":"<20230817203200.1131474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:31:52","name":"[committed] libstdc++: Fix -Wunused-parameter in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203200.1131474-1-jwakely@redhat.com/mbox/"},{"id":135951,"url":"https://patchwork.plctlab.org/api/1.2/patches/135951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203213.1131496-1-jwakely@redhat.com/","msgid":"<20230817203213.1131496-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:01","name":"[committed] libstdc++: Define std::numeric_limits<_FloatNN> before C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203213.1131496-1-jwakely@redhat.com/mbox/"},{"id":135952,"url":"https://patchwork.plctlab.org/api/1.2/patches/135952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203218.1131547-1-jwakely@redhat.com/","msgid":"<20230817203218.1131547-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:14","name":"[committed] libstdc++: Add std::formatter specializations for extended float types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203218.1131547-1-jwakely@redhat.com/mbox/"},{"id":135945,"url":"https://patchwork.plctlab.org/api/1.2/patches/135945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203223.1131562-1-jwakely@redhat.com/","msgid":"<20230817203223.1131562-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:19","name":"[committed] libstdc++: Optimize std::string::assign(Iter, Iter) [PR110945]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203223.1131562-1-jwakely@redhat.com/mbox/"},{"id":135948,"url":"https://patchwork.plctlab.org/api/1.2/patches/135948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203228.1131577-1-jwakely@redhat.com/","msgid":"<20230817203228.1131577-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:24","name":"[committed] libstdc++: Micro-optimize construction of named std::locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203228.1131577-1-jwakely@redhat.com/mbox/"},{"id":135950,"url":"https://patchwork.plctlab.org/api/1.2/patches/135950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203237.1131595-1-jwakely@redhat.com/","msgid":"<20230817203237.1131595-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T20:32:29","name":"[committed] libstdc++: Reuse double overload of __convert_to_v if possible","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817203237.1131595-1-jwakely@redhat.com/mbox/"},{"id":135962,"url":"https://patchwork.plctlab.org/api/1.2/patches/135962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817232843.1231279-1-jwakely@redhat.com/","msgid":"<20230817232843.1231279-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-17T23:28:10","name":"[committed] libstdc++: Replace global std::string objects in tzdb.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230817232843.1231279-1-jwakely@redhat.com/mbox/"},{"id":135969,"url":"https://patchwork.plctlab.org/api/1.2/patches/135969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818023050.98368-1-thiago.bauermann@linaro.org/","msgid":"<20230818023050.98368-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-18T02:30:50","name":"testsuite: Improve test in dg-require-python-h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818023050.98368-1-thiago.bauermann@linaro.org/mbox/"},{"id":135971,"url":"https://patchwork.plctlab.org/api/1.2/patches/135971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025355.3280223-1-pan2.li@intel.com/","msgid":"<20230818025355.3280223-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-18T02:53:55","name":"[v1] RISC-V: Refactor RVV class by frm_op_type template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025355.3280223-1-pan2.li@intel.com/mbox/"},{"id":135972,"url":"https://patchwork.plctlab.org/api/1.2/patches/135972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025911.1281907-1-lehua.ding@rivai.ai/","msgid":"<20230818025911.1281907-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-18T02:59:11","name":"RISC-V: Fix -march error of zhinxmin testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818025911.1281907-1-lehua.ding@rivai.ai/mbox/"},{"id":135975,"url":"https://patchwork.plctlab.org/api/1.2/patches/135975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818031818.2161842-1-lipeng.zhu@intel.com/","msgid":"<20230818031818.2161842-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-08-18T03:18:19","name":"[v6] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818031818.2161842-1-lipeng.zhu@intel.com/mbox/"},{"id":135977,"url":"https://patchwork.plctlab.org/api/1.2/patches/135977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com/","msgid":"<6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-18T03:52:09","name":"[1/2] RISC-V: Add quotes to #error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6afb03099b118119ecca3dd8500e70ee9d523c6d.1692330726.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135978,"url":"https://patchwork.plctlab.org/api/1.2/patches/135978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a6e92e0a6293380c619392be305ab2d5d0108d.1692330726.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T03:52:10","name":"[2/2] RISC-V: Add quotes to #error messages (all)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0a6e92e0a6293380c619392be305ab2d5d0108d.1692330726.git.research_trasio@irq.a4lg.com/mbox/"},{"id":135984,"url":"https://patchwork.plctlab.org/api/1.2/patches/135984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818060131.1416714-1-haochen.jiang@intel.com/","msgid":"<20230818060131.1416714-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-08-18T06:01:31","name":"i386: Add AVX2 pragma wrapper for AVX512DQVL intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818060131.1416714-1-haochen.jiang@intel.com/mbox/"},{"id":135985,"url":"https://patchwork.plctlab.org/api/1.2/patches/135985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818064249.2103051-1-hongtao.liu@intel.com/","msgid":"<20230818064249.2103051-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-18T06:42:49","name":"Support -march=gracemont","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818064249.2103051-1-hongtao.liu@intel.com/mbox/"},{"id":135988,"url":"https://patchwork.plctlab.org/api/1.2/patches/135988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074607.14799138F0@imap2.suse-dmz.suse.de/","msgid":"<20230818074607.14799138F0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-18T07:46:06","name":"tree-optimization/111048 - avoid flawed logic in fold_vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074607.14799138F0@imap2.suse-dmz.suse.de/mbox/"},{"id":135989,"url":"https://patchwork.plctlab.org/api/1.2/patches/135989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074943.41754-1-manos.anagnostakis@vrull.eu/","msgid":"<20230818074943.41754-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-08-18T07:49:43","name":"aarch64: Fine-grained ldp and stp policies with test-cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818074943.41754-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":135993,"url":"https://patchwork.plctlab.org/api/1.2/patches/135993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818084437.1297460-1-jwakely@redhat.com/","msgid":"<20230818084437.1297460-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T08:44:16","name":"[committed] libstdc++: Fix incomplete rework of wchar_t support in std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818084437.1297460-1-jwakely@redhat.com/mbox/"},{"id":136013,"url":"https://patchwork.plctlab.org/api/1.2/patches/136013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818113147.1360843-1-jwakely@redhat.com/","msgid":"<20230818113147.1360843-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T11:31:15","name":"[committed] libstdc++: Replace non-type-dependent uses of wchar_t in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818113147.1360843-1-jwakely@redhat.com/mbox/"},{"id":136014,"url":"https://patchwork.plctlab.org/api/1.2/patches/136014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818120755.28912-1-jose.marchesi@oracle.com/","msgid":"<20230818120755.28912-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-18T12:07:55","name":"[COMMITTED] bpf: bump maximum frame size limit to 32767 bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818120755.28912-1-jose.marchesi@oracle.com/mbox/"},{"id":136015,"url":"https://patchwork.plctlab.org/api/1.2/patches/136015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818130433.D4E24138F0@imap2.suse-dmz.suse.de/","msgid":"<20230818130433.D4E24138F0@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-18T13:04:33","name":"tree-optimization/111019 - invariant motion and aliasing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818130433.D4E24138F0@imap2.suse-dmz.suse.de/mbox/"},{"id":136019,"url":"https://patchwork.plctlab.org/api/1.2/patches/136019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818135351.9177-1-jose.marchesi@oracle.com/","msgid":"<20230818135351.9177-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-18T13:53:51","name":"Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818135351.9177-1-jose.marchesi@oracle.com/mbox/"},{"id":136021,"url":"https://patchwork.plctlab.org/api/1.2/patches/136021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com/","msgid":"<6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com>","list_archive_url":null,"date":"2023-08-18T13:57:16","name":"RISC-V: Enable pressure-aware scheduling by default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c8b8a16-bbf9-b697-0f4c-26a838fb5665@gmail.com/mbox/"},{"id":136029,"url":"https://patchwork.plctlab.org/api/1.2/patches/136029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818154030.64004-1-aldyh@redhat.com/","msgid":"<20230818154030.64004-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-18T15:40:11","name":"[COMMITTED,irange] Return FALSE if updated bitmask is unchanged [PR110753]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818154030.64004-1-aldyh@redhat.com/mbox/"},{"id":136044,"url":"https://patchwork.plctlab.org/api/1.2/patches/136044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YnMqdb3uQD=FxmxNwfmdc6BxAU7F7ro7tS3vF-=Hs6sw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T17:12:42","name":"[committed] : i386: Use PUNPCKL?? to implement vector extend and zero_extend for TARGET_SSE2 [PR111023]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YnMqdb3uQD=FxmxNwfmdc6BxAU7F7ro7tS3vF-=Hs6sw@mail.gmail.com/mbox/"},{"id":136045,"url":"https://patchwork.plctlab.org/api/1.2/patches/136045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/07c94dde-f513-0177-51d7-05267694f383@codesourcery.com/","msgid":"<07c94dde-f513-0177-51d7-05267694f383@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:15:16","name":"omp-expand.cc: Fix wrong code with non-rectangular loop nest [PR111017]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/07c94dde-f513-0177-51d7-05267694f383@codesourcery.com/mbox/"},{"id":136046,"url":"https://patchwork.plctlab.org/api/1.2/patches/136046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-2-sandra@codesourcery.com/","msgid":"<20230818173938.430758-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:35","name":"[OG13,committed,1/3] OpenMP: C++ attribute syntax fixes/testcases for \"metadirective\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-2-sandra@codesourcery.com/mbox/"},{"id":136048,"url":"https://patchwork.plctlab.org/api/1.2/patches/136048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-3-sandra@codesourcery.com/","msgid":"<20230818173938.430758-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:36","name":"[OG13,committed,2/3] OpenMP: C++ attribute syntax fixes/testcases for \"declare mapper\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-3-sandra@codesourcery.com/mbox/"},{"id":136047,"url":"https://patchwork.plctlab.org/api/1.2/patches/136047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-4-sandra@codesourcery.com/","msgid":"<20230818173938.430758-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T17:39:37","name":"[OG13,committed,3/3] OpenMP: C++ attribute syntax fixes/testcases for loop transformations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818173938.430758-4-sandra@codesourcery.com/mbox/"},{"id":136054,"url":"https://patchwork.plctlab.org/api/1.2/patches/136054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T19:32:03","name":"RISC-V/testsuite: Add missing conversion tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"},{"id":136055,"url":"https://patchwork.plctlab.org/api/1.2/patches/136055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com/","msgid":"<9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com>","list_archive_url":null,"date":"2023-08-18T19:37:06","name":"RISC-V: Allow immediates 17-31 for vector shift.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a28abc7-b305-6ac3-19b7-4426b6c76b43@gmail.com/mbox/"},{"id":136063,"url":"https://patchwork.plctlab.org/api/1.2/patches/136063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edk05b4a.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-18T20:49:57","name":"ipa-sra: Allow IPA-SRA in presence of returns which will be removed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edk05b4a.fsf@suse.cz/mbox/"},{"id":136071,"url":"https://patchwork.plctlab.org/api/1.2/patches/136071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com/","msgid":"<5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T22:47:47","name":"[v7,1/5] OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c6375b091cac9b6532baf7d8f3d0a6670c36188.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136073,"url":"https://patchwork.plctlab.org/api/1.2/patches/136073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b96ae3b68fdc935bfd37f8343ba57e7058126c5d.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:48","name":"[v7,2/5] OpenMP/OpenACC: Rework clause expansion and nested struct handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b96ae3b68fdc935bfd37f8343ba57e7058126c5d.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136075,"url":"https://patchwork.plctlab.org/api/1.2/patches/136075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/af21c299f712718395612cd364f401bc0fd08416.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:49","name":"[v7,3/5] OpenMP: Pointers and member mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/af21c299f712718395612cd364f401bc0fd08416.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136074,"url":"https://patchwork.plctlab.org/api/1.2/patches/136074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com/","msgid":"<81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-08-18T22:47:50","name":"[v7,4/5] OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81839b2435cb8b4ae46c09f2ff240eb9f679d389.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136072,"url":"https://patchwork.plctlab.org/api/1.2/patches/136072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b32f791688b577bf57cefb38ad16594d17975c6c.1692398074.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T22:47:51","name":"[v7,5/5] OpenMP/OpenACC: Reorganise OMP map clause handling in gimplify.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b32f791688b577bf57cefb38ad16594d17975c6c.1692398074.git.julian@codesourcery.com/mbox/"},{"id":136076,"url":"https://patchwork.plctlab.org/api/1.2/patches/136076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818225026.1399063-1-jwakely@redhat.com/","msgid":"<20230818225026.1399063-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-18T22:49:56","name":"[committed] libstdc++: Revert pre-C++23 support for 16-bit float types [PR111060]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230818225026.1399063-1-jwakely@redhat.com/mbox/"},{"id":136083,"url":"https://patchwork.plctlab.org/api/1.2/patches/136083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f08933c-d988-c806-6a75-c8a12574c268@iki.fi/","msgid":"<8f08933c-d988-c806-6a75-c8a12574c268@iki.fi>","list_archive_url":null,"date":"2023-08-19T08:01:18","name":"[Ada] Fix syntax errors in expect.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f08933c-d988-c806-6a75-c8a12574c268@iki.fi/mbox/"},{"id":136122,"url":"https://patchwork.plctlab.org/api/1.2/patches/136122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB650764FB1A89623419FE5833BB18A@DB9PR08MB6507.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-19T11:42:10","name":"[PING] arm: Remove unsigned variant of vcaddq_m","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DB9PR08MB650764FB1A89623419FE5833BB18A@DB9PR08MB6507.eurprd08.prod.outlook.com/mbox/"},{"id":136234,"url":"https://patchwork.plctlab.org/api/1.2/patches/136234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820072526.3283744-1-apinski@marvell.com/","msgid":"<20230820072526.3283744-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-20T07:25:26","name":"[PATCHv2/COMMITTED] MATCH: Sink convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820072526.3283744-1-apinski@marvell.com/mbox/"},{"id":136235,"url":"https://patchwork.plctlab.org/api/1.2/patches/136235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4a132c6ba0ae8f1b670ef83f42bd8f3983577d9.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-08-20T07:26:26","name":"[committed] fix misleading identation breaking bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4a132c6ba0ae8f1b670ef83f42bd8f3983577d9.camel@tugraz.at/mbox/"},{"id":136242,"url":"https://patchwork.plctlab.org/api/1.2/patches/136242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820092054.380256-1-ibuclaw@gdcproject.org/","msgid":"<20230820092054.380256-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-08-20T09:20:54","name":"[committed] d: Merge upstream dmd, druntime 26f049fb26, phobos 330d6a4fd.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230820092054.380256-1-ibuclaw@gdcproject.org/mbox/"},{"id":136273,"url":"https://patchwork.plctlab.org/api/1.2/patches/136273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-20T15:57:29","name":"[committed] i386: Micro-optimize ix86_expand_sse_extend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YRkEBSRFm3AtTYmbPtANLbnGGHcvwBSq=RRc2Zv7ii3g@mail.gmail.com/mbox/"},{"id":136302,"url":"https://patchwork.plctlab.org/api/1.2/patches/136302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010326.395043-1-juzhe.zhong@rivai.ai/","msgid":"<20230821010326.395043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:03:26","name":"RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010326.395043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136303,"url":"https://patchwork.plctlab.org/api/1.2/patches/136303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010453.3916192-1-juzhe.zhong@rivai.ai/","msgid":"<20230821010453.3916192-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:04:53","name":"LCM: Export 2 helpful functions as global for VSETVL PASS use in RISC-V backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821010453.3916192-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136304,"url":"https://patchwork.plctlab.org/api/1.2/patches/136304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821011854.33004-1-yangyujie@loongson.cn/","msgid":"<20230821011854.33004-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-21T01:18:54","name":"LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821011854.33004-1-yangyujie@loongson.cn/mbox/"},{"id":136310,"url":"https://patchwork.plctlab.org/api/1.2/patches/136310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821015951.399184-1-juzhe.zhong@rivai.ai/","msgid":"<20230821015951.399184-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T01:59:51","name":"RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821015951.399184-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136311,"url":"https://patchwork.plctlab.org/api/1.2/patches/136311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821021005.3798870-1-hongtao.liu@intel.com/","msgid":"<20230821021005.3798870-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-21T02:10:05","name":"Mention Intel -march=gracemont for Alderlake-N.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821021005.3798870-1-hongtao.liu@intel.com/mbox/"},{"id":136313,"url":"https://patchwork.plctlab.org/api/1.2/patches/136313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821032123.3332286-1-apinski@marvell.com/","msgid":"<20230821032123.3332286-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-21T03:21:23","name":"MATCH: [PR111002] Sink view_convert for vec_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821032123.3332286-1-apinski@marvell.com/mbox/"},{"id":136334,"url":"https://patchwork.plctlab.org/api/1.2/patches/136334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com/","msgid":"<2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:44:03","name":"[PING^2,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e2b48f7-abfa-9b1f-9e91-04a912f4c863@linux.ibm.com/mbox/"},{"id":136335,"url":"https://patchwork.plctlab.org/api/1.2/patches/136335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com/","msgid":"<8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:45:19","name":"[PING^4,3/4] ree: Improve functionality of ree pass for rs6000 target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b994705-9e75-f2b7-4858-f45da8e5a9d6@linux.ibm.com/mbox/"},{"id":136336,"url":"https://patchwork.plctlab.org/api/1.2/patches/136336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com/","msgid":"<9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T06:46:44","name":"[PING^4] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9189fe00-8750-549b-8fb5-c62726d980ce@linux.ibm.com/mbox/"},{"id":136340,"url":"https://patchwork.plctlab.org/api/1.2/patches/136340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821072627.3984748-1-pan2.li@intel.com/","msgid":"<20230821072627.3984748-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-21T07:26:27","name":"[v1] Mode-Switching: Add optional EMIT_AFTER hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821072627.3984748-1-pan2.li@intel.com/mbox/"},{"id":136349,"url":"https://patchwork.plctlab.org/api/1.2/patches/136349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821080920.40614385B800@sourceware.org/","msgid":"<20230821080920.40614385B800@sourceware.org>","list_archive_url":null,"date":"2023-08-21T08:08:36","name":"tree-optimization/111070 - fix ICE with recent ifcombine fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821080920.40614385B800@sourceware.org/mbox/"},{"id":136353,"url":"https://patchwork.plctlab.org/api/1.2/patches/136353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821091227.0E895385773C@sourceware.org/","msgid":"<20230821091227.0E895385773C@sourceware.org>","list_archive_url":null,"date":"2023-08-21T09:11:29","name":"debug/111080 - avoid outputting debug info for unused restrict qualified type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821091227.0E895385773C@sourceware.org/mbox/"},{"id":136357,"url":"https://patchwork.plctlab.org/api/1.2/patches/136357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094701.1548195-1-jwakely@redhat.com/","msgid":"<20230821094701.1548195-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-21T09:46:11","name":"[committed] libstdc++: Remove reliance on unspecified behaviour in std::rethrow_if_nested test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094701.1548195-1-jwakely@redhat.com/mbox/"},{"id":136358,"url":"https://patchwork.plctlab.org/api/1.2/patches/136358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094834.34B663836E92@sourceware.org/","msgid":"<20230821094834.34B663836E92@sourceware.org>","list_archive_url":null,"date":"2023-08-21T09:47:49","name":"tree-optimization/111082 - bogus promoted min","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821094834.34B663836E92@sourceware.org/mbox/"},{"id":136362,"url":"https://patchwork.plctlab.org/api/1.2/patches/136362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821095913.1629336-1-hongtao.liu@intel.com/","msgid":"<20230821095913.1629336-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-21T09:59:13","name":"Adjust testcase for Intel GDS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821095913.1629336-1-hongtao.liu@intel.com/mbox/"},{"id":136365,"url":"https://patchwork.plctlab.org/api/1.2/patches/136365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com/","msgid":"<448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-08-21T10:32:06","name":"rs6000: Disable PCREL for unsupported targets [PR111045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/448048b2-1256-4d13-924e-695b4b3ff9ba@linux.vnet.ibm.com/mbox/"},{"id":136372,"url":"https://patchwork.plctlab.org/api/1.2/patches/136372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821105955.3471098-1-juzhe.zhong@rivai.ai/","msgid":"<20230821105955.3471098-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-21T10:59:55","name":"[V5] VECT: Support loop len control on EXTRACT_LAST vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821105955.3471098-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136374,"url":"https://patchwork.plctlab.org/api/1.2/patches/136374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821111301.4696A385B531@sourceware.org/","msgid":"<20230821111301.4696A385B531@sourceware.org>","list_archive_url":null,"date":"2023-08-21T11:12:15","name":"Fix gcc.dg/vect/bb-slp-46.c FAIL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821111301.4696A385B531@sourceware.org/mbox/"},{"id":136380,"url":"https://patchwork.plctlab.org/api/1.2/patches/136380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821115939.C86BE3857722@sourceware.org/","msgid":"<20230821115939.C86BE3857722@sourceware.org>","list_archive_url":null,"date":"2023-08-21T11:58:54","name":"Fix gcc.dg/vect/bb-slp-subgroups-2.c with 256bit vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821115939.C86BE3857722@sourceware.org/mbox/"},{"id":136386,"url":"https://patchwork.plctlab.org/api/1.2/patches/136386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821122540.496C5385B800@sourceware.org/","msgid":"<20230821122540.496C5385B800@sourceware.org>","list_archive_url":null,"date":"2023-08-21T12:24:55","name":"Fix FAIL: gcc.target/i386/pr87007-5.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821122540.496C5385B800@sourceware.org/mbox/"},{"id":136396,"url":"https://patchwork.plctlab.org/api/1.2/patches/136396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821134653.97329-1-aldyh@redhat.com/","msgid":"<20230821134653.97329-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-21T13:46:49","name":"[COMMITTED,frange] Return false if nothing changed in union_nans().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821134653.97329-1-aldyh@redhat.com/mbox/"},{"id":136408,"url":"https://patchwork.plctlab.org/api/1.2/patches/136408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155610.2553-2-stefansf@linux.ibm.com/","msgid":"<20230821155610.2553-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T15:56:11","name":"s390: Fix builtins vec_rli and verll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155610.2553-2-stefansf@linux.ibm.com/mbox/"},{"id":136407,"url":"https://patchwork.plctlab.org/api/1.2/patches/136407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155839.2680-2-stefansf@linux.ibm.com/","msgid":"<20230821155839.2680-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-08-21T15:58:40","name":"s390: Fix some builtin definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821155839.2680-2-stefansf@linux.ibm.com/mbox/"},{"id":136410,"url":"https://patchwork.plctlab.org/api/1.2/patches/136410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821163852.988058-1-ewlu@rivosinc.com/","msgid":"<20230821163852.988058-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-21T16:37:40","name":"RISC-V: Add Types to Missing Bitmanip Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821163852.988058-1-ewlu@rivosinc.com/mbox/"},{"id":136411,"url":"https://patchwork.plctlab.org/api/1.2/patches/136411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821165230.989216-1-ewlu@rivosinc.com/","msgid":"<20230821165230.989216-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-21T16:51:58","name":"RISC-V: Add Types to Un-Typed Sync Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821165230.989216-1-ewlu@rivosinc.com/mbox/"},{"id":136414,"url":"https://patchwork.plctlab.org/api/1.2/patches/136414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com/","msgid":"<70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com>","list_archive_url":null,"date":"2023-08-21T17:04:15","name":"Fix tests sensitive to internal library allocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/70988952-dab7-3ba6-4694-2d90c035f80f@gmail.com/mbox/"},{"id":136416,"url":"https://patchwork.plctlab.org/api/1.2/patches/136416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com/","msgid":"<0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com>","list_archive_url":null,"date":"2023-08-21T17:25:48","name":"[RISCV,committed] Remove spurious newline in ztso sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe0fbca-d8cc-2ac7-bae7-328bdab9bd47@gmail.com/mbox/"},{"id":136419,"url":"https://patchwork.plctlab.org/api/1.2/patches/136419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821180718.20489-1-jose.marchesi@oracle.com/","msgid":"<20230821180718.20489-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-08-21T18:07:18","name":"[V2] Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821180718.20489-1-jose.marchesi@oracle.com/mbox/"},{"id":136422,"url":"https://patchwork.plctlab.org/api/1.2/patches/136422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-465e9c23-c45c-40b4-b023-d80400782239-1692647313365@3c-app-gmx-bs15/","msgid":"","list_archive_url":null,"date":"2023-08-21T19:48:33","name":"Fortran: implement vector sections in DATA statements [PR49588]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-465e9c23-c45c-40b4-b023-d80400782239-1692647313365@3c-app-gmx-bs15/mbox/"},{"id":136426,"url":"https://patchwork.plctlab.org/api/1.2/patches/136426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa9724f1b198f6416bb8e05966f57b0742201b73.1692650021.git.mirai@makinata.eu/","msgid":"","list_archive_url":null,"date":"2023-08-21T20:34:02","name":"[1/2] libstdc++: Fix '\''doc-install-info'\'' rule.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fa9724f1b198f6416bb8e05966f57b0742201b73.1692650021.git.mirai@makinata.eu/mbox/"},{"id":136425,"url":"https://patchwork.plctlab.org/api/1.2/patches/136425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu/","msgid":"<450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu>","list_archive_url":null,"date":"2023-08-21T20:34:03","name":"[2/2] libstdc++: Update docbook xsl URI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/450d112caf44c54f15107fa069934893d1c613d6.1692650021.git.mirai@makinata.eu/mbox/"},{"id":136427,"url":"https://patchwork.plctlab.org/api/1.2/patches/136427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821210347.19947-1-david.faust@oracle.com/","msgid":"<20230821210347.19947-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-08-21T21:03:47","name":"bpf: neg instruction does not accept an immediate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230821210347.19947-1-david.faust@oracle.com/mbox/"},{"id":136434,"url":"https://patchwork.plctlab.org/api/1.2/patches/136434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-1-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:22","name":"[pushed,1/6] analyzer: convert note_adding_context to annotating_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-1-dmalcolm@redhat.com/mbox/"},{"id":136437,"url":"https://patchwork.plctlab.org/api/1.2/patches/136437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-2-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:23","name":"[pushed,2/6] analyzer: add ability for context to add events to a saved_diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-2-dmalcolm@redhat.com/mbox/"},{"id":136435,"url":"https://patchwork.plctlab.org/api/1.2/patches/136435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-3-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:24","name":"[pushed,3/6] analyzer: handle NULL inner context in region_model_context_decorator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-3-dmalcolm@redhat.com/mbox/"},{"id":136438,"url":"https://patchwork.plctlab.org/api/1.2/patches/136438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-4-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:25","name":"[pushed,4/6] analyzer: replace -Wanalyzer-unterminated-string with scan_for_null_terminator [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-4-dmalcolm@redhat.com/mbox/"},{"id":136436,"url":"https://patchwork.plctlab.org/api/1.2/patches/136436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-5-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:26","name":"[pushed,5/6] analyzer: add kf_fopen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-5-dmalcolm@redhat.com/mbox/"},{"id":136439,"url":"https://patchwork.plctlab.org/api/1.2/patches/136439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-6-dmalcolm@redhat.com/","msgid":"<20230822012127.2817996-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:21:27","name":"[pushed,6/6] analyzer: check format strings for null termination [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822012127.2817996-6-dmalcolm@redhat.com/mbox/"},{"id":136440,"url":"https://patchwork.plctlab.org/api/1.2/patches/136440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015139.1920183-1-ppalka@redhat.com/","msgid":"<20230822015139.1920183-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-22T01:51:38","name":"c++: refine CWG 2369 satisfaction vs non-dep convs [PR99599]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015139.1920183-1-ppalka@redhat.com/mbox/"},{"id":136442,"url":"https://patchwork.plctlab.org/api/1.2/patches/136442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015834.3540320-1-juzhe.zhong@rivai.ai/","msgid":"<20230822015834.3540320-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T01:58:34","name":"[V2] gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822015834.3540320-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136444,"url":"https://patchwork.plctlab.org/api/1.2/patches/136444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822022935.9877-1-xuli1@eswincomputing.com/","msgid":"<20230822022935.9877-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-08-22T02:29:35","name":"RISCV: Fix PR111074 [GCC13 BUG]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822022935.9877-1-xuli1@eswincomputing.com/mbox/"},{"id":136446,"url":"https://patchwork.plctlab.org/api/1.2/patches/136446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822025758.769581-1-hongtao.liu@intel.com/","msgid":"<20230822025758.769581-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-22T02:57:58","name":"[x86] Testcase fix.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822025758.769581-1-hongtao.liu@intel.com/mbox/"},{"id":136447,"url":"https://patchwork.plctlab.org/api/1.2/patches/136447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822030215.3566313-1-lehua.ding@rivai.ai/","msgid":"<20230822030215.3566313-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-22T03:02:15","name":"RISC-V: Change fnms testcases assertion to xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822030215.3566313-1-lehua.ding@rivai.ai/mbox/"},{"id":136451,"url":"https://patchwork.plctlab.org/api/1.2/patches/136451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822041924.1861884-1-pan2.li@intel.com/","msgid":"<20230822041924.1861884-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-22T04:19:24","name":"[v2] RISC-V: Refactor RVV class by frm_op_type template arg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822041924.1861884-1-pan2.li@intel.com/mbox/"},{"id":136455,"url":"https://patchwork.plctlab.org/api/1.2/patches/136455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822054128.1401166-1-lehua.ding@rivai.ai/","msgid":"<20230822054128.1401166-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-22T05:41:28","name":"RISC-V: Add conditional unary neg/abs/not autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822054128.1401166-1-lehua.ding@rivai.ai/mbox/"},{"id":136456,"url":"https://patchwork.plctlab.org/api/1.2/patches/136456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff3f47e9-ede7-edfe-c19e-ef5137f760f8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T06:28:54","name":"[PATCHv2,rs6000] Extract the element in dword0 by mfvsrd and shift/mask [PR110331]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff3f47e9-ede7-edfe-c19e-ef5137f760f8@linux.ibm.com/mbox/"},{"id":136460,"url":"https://patchwork.plctlab.org/api/1.2/patches/136460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORmH6QZK45sD1b/@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T07:39:11","name":"c++: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORmH6QZK45sD1b/@tucnak/mbox/"},{"id":136467,"url":"https://patchwork.plctlab.org/api/1.2/patches/136467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORuAJTB6/kkyFGG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T08:12:48","name":"c++: Fix up mangling of function/block scope static structured bindings [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORuAJTB6/kkyFGG@tucnak/mbox/"},{"id":136468,"url":"https://patchwork.plctlab.org/api/1.2/patches/136468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORukwAR0INoKBYP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T08:15:15","name":"doc: Remove obsolete sentence about _Float* not being supported in C++ [PR106652]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZORukwAR0INoKBYP@tucnak/mbox/"},{"id":136471,"url":"https://patchwork.plctlab.org/api/1.2/patches/136471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com/","msgid":"<31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:44:03","name":"vect: Replace DR_GROUP_STORE_COUNT with DR_GROUP_LAST_ELEMENT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/31596d79-c607-8180-3399-5013c1b53aef@linux.ibm.com/mbox/"},{"id":136472,"url":"https://patchwork.plctlab.org/api/1.2/patches/136472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com/","msgid":"<8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:45:28","name":"[1/3] vect: Remove some manual release in vectorizable_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8c6c6b96-0b97-4eed-5b88-bda2b3dcc902@linux.ibm.com/mbox/"},{"id":136474,"url":"https://patchwork.plctlab.org/api/1.2/patches/136474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com/","msgid":"<8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:49:33","name":"[2/3] vect: Move VMAT_LOAD_STORE_LANES handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a82c294-eaab-bfb2-5e2d-a08d38f3e570@linux.ibm.com/mbox/"},{"id":136475,"url":"https://patchwork.plctlab.org/api/1.2/patches/136475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com/","msgid":"<1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com>","list_archive_url":null,"date":"2023-08-22T08:52:41","name":"[3/3] vect: Move VMAT_GATHER_SCATTER handlings from final loop nest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c07d6a4-f322-6a1d-aaea-4d17733493fe@linux.ibm.com/mbox/"},{"id":136480,"url":"https://patchwork.plctlab.org/api/1.2/patches/136480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822090549.703E9385C6E9@sourceware.org/","msgid":"<20230822090549.703E9385C6E9@sourceware.org>","list_archive_url":null,"date":"2023-08-22T09:05:00","name":"tree-optimization/94864 - vector insert of vector extract simplification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822090549.703E9385C6E9@sourceware.org/mbox/"},{"id":136486,"url":"https://patchwork.plctlab.org/api/1.2/patches/136486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com/","msgid":"<8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com>","list_archive_url":null,"date":"2023-08-22T09:54:14","name":"OpenMP: Handle '\''all'\'' as category in defaultmap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b546fa4-2925-3d35-21f5-bca3ad567e71@codesourcery.com/mbox/"},{"id":136495,"url":"https://patchwork.plctlab.org/api/1.2/patches/136495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com/","msgid":"<27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com>","list_archive_url":null,"date":"2023-08-22T10:16:48","name":"libgomp.c/simd-math-1.c: Test scalb{, l}n{, f} and un-XFAIL for non-nvptx/amdgcn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27594869-f89b-e9c2-828e-dfa143f36e2e@codesourcery.com/mbox/"},{"id":136500,"url":"https://patchwork.plctlab.org/api/1.2/patches/136500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:12","name":"[01/11] aarch64: AARCH64_ISA_RCPC was defined twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80234f87136387abee4b1f0f4bac79c8c7921637.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136505,"url":"https://patchwork.plctlab.org/api/1.2/patches/136505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:20","name":"[02/11] Handle epilogues that contain jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/103b7db0ce64fb9f2757e1a7d98cb7fa3103c4f2.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136504,"url":"https://patchwork.plctlab.org/api/1.2/patches/136504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:27","name":"[03/11] aarch64: Use br instead of ret for eh_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/913cd5eb33e01ad279915b4a1f0ce4bd7afd5ad7.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136507,"url":"https://patchwork.plctlab.org/api/1.2/patches/136507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:38:35","name":"[04/11] aarch64: Do not force a stack frame for EH returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/343d71de3bf827c96ba98d2dc1d48e02b4ca0a31.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136509,"url":"https://patchwork.plctlab.org/api/1.2/patches/136509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6b7c47f58a448c09714dd397ec103c3b48b8ec3.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:42","name":"[05/11] aarch64: Add eh_return compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d6b7c47f58a448c09714dd397ec103c3b48b8ec3.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136501,"url":"https://patchwork.plctlab.org/api/1.2/patches/136501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9a619fcadf6e05dda1b92e83da0eb91cffb12a2.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:49","name":"[06/11] aarch64: Fix pac-ret eh_return tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c9a619fcadf6e05dda1b92e83da0eb91cffb12a2.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136502,"url":"https://patchwork.plctlab.org/api/1.2/patches/136502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8186167e2c5002b818172dfb3a593c1fdd99630.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:38:55","name":"[07/11] aarch64: Disable branch-protection for pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8186167e2c5002b818172dfb3a593c1fdd99630.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136503,"url":"https://patchwork.plctlab.org/api/1.2/patches/136503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:03","name":"[08/11] aarch64,arm: Remove accepted_branch_protection_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/18af2b82f07bfb47047cb4dcda3b59838f09a34a.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136506,"url":"https://patchwork.plctlab.org/api/1.2/patches/136506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:10","name":"[09/11] aarch64,arm: Fix branch-protection= parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25698cdb217b9737dd5db5b075a80a3f151b4fe5.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136508,"url":"https://patchwork.plctlab.org/api/1.2/patches/136508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com/","msgid":"<711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-08-22T10:39:17","name":"[10/11] aarch64: Fix branch-protection error message tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/711459e210437af7580296f5bff2ef72b6039e7c.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136510,"url":"https://patchwork.plctlab.org/api/1.2/patches/136510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a60da3d8be440de0fe327310c61e004f2263c38f.1692699125.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T10:39:24","name":"[11/11] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a60da3d8be440de0fe327310c61e004f2263c38f.1692699125.git.szabolcs.nagy@arm.com/mbox/"},{"id":136511,"url":"https://patchwork.plctlab.org/api/1.2/patches/136511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822105137.1308817-1-juzhe.zhong@rivai.ai/","msgid":"<20230822105137.1308817-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T10:51:37","name":"VECT: Add LEN_FOLD_EXTRACT_LAST pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822105137.1308817-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136514,"url":"https://patchwork.plctlab.org/api/1.2/patches/136514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOSbwEHbsEiu3Z/z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-22T11:28:00","name":"[14/12] libgcc _BitInt helper documentation [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOSbwEHbsEiu3Z/z@tucnak/mbox/"},{"id":136532,"url":"https://patchwork.plctlab.org/api/1.2/patches/136532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822120219.3997652-1-rearnsha@arm.com/","msgid":"<20230822120219.3997652-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-08-22T12:02:19","name":"rtl: Forward declare rtx_code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822120219.3997652-1-rearnsha@arm.com/mbox/"},{"id":136536,"url":"https://patchwork.plctlab.org/api/1.2/patches/136536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822124214.26030-1-chenglulu@loongson.cn/","msgid":"<20230822124214.26030-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-22T12:42:14","name":"[v1] libffi: Backport of LoongArch support for libffi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822124214.26030-1-chenglulu@loongson.cn/mbox/"},{"id":136539,"url":"https://patchwork.plctlab.org/api/1.2/patches/136539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822131900.977183858D1E@sourceware.org/","msgid":"<20230822131900.977183858D1E@sourceware.org>","list_archive_url":null,"date":"2023-08-22T13:18:17","name":"Simplify intereaved store vectorization processing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822131900.977183858D1E@sourceware.org/mbox/"},{"id":136573,"url":"https://patchwork.plctlab.org/api/1.2/patches/136573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4f5799e-4fd6-72f4-0882-ec0bef2f1f62@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-22T17:39:38","name":"[committed] RISC-V: Add multiarch support on riscv-linux-gnu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4f5799e-4fd6-72f4-0882-ec0bef2f1f62@ventanamicro.com/mbox/"},{"id":136574,"url":"https://patchwork.plctlab.org/api/1.2/patches/136574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822174031.782900-1-vineetg@rivosinc.com/","msgid":"<20230822174031.782900-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-22T17:40:31","name":"RISC-V: output Autovec params explicitly in --help ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822174031.782900-1-vineetg@rivosinc.com/mbox/"},{"id":136587,"url":"https://patchwork.plctlab.org/api/1.2/patches/136587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822180907.783650-1-vineetg@rivosinc.com/","msgid":"<20230822180907.783650-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-22T18:09:07","name":"[Committed] RISC-V: output Autovec params explicitly in --help ...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822180907.783650-1-vineetg@rivosinc.com/mbox/"},{"id":136600,"url":"https://patchwork.plctlab.org/api/1.2/patches/136600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-1-jason@redhat.com/","msgid":"<20230822183639.1425752-1-jason@redhat.com>","list_archive_url":null,"date":"2023-08-22T18:36:38","name":"[pushed,1/2] c++: constrained hidden friends [PR109751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-1-jason@redhat.com/mbox/"},{"id":136599,"url":"https://patchwork.plctlab.org/api/1.2/patches/136599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-2-jason@redhat.com/","msgid":"<20230822183639.1425752-2-jason@redhat.com>","list_archive_url":null,"date":"2023-08-22T18:36:39","name":"[pushed,2/2] c++: maybe_substitute_reqs_for fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822183639.1425752-2-jason@redhat.com/mbox/"},{"id":136609,"url":"https://patchwork.plctlab.org/api/1.2/patches/136609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822223958.2936206-1-dmalcolm@redhat.com/","msgid":"<20230822223958.2936206-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-22T22:39:58","name":"[pushed] analyzer: reimplement kf_strlen [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822223958.2936206-1-dmalcolm@redhat.com/mbox/"},{"id":136610,"url":"https://patchwork.plctlab.org/api/1.2/patches/136610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822230650.1383987-1-juzhe.zhong@rivai.ai/","msgid":"<20230822230650.1383987-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T23:06:50","name":"RISC-V: Add riscv-vsetvl.def to t-riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822230650.1383987-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136612,"url":"https://patchwork.plctlab.org/api/1.2/patches/136612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822232225.1385301-1-juzhe.zhong@rivai.ai/","msgid":"<20230822232225.1385301-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-22T23:22:25","name":"RISC-V: Clang format riscv-vsetvl.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230822232225.1385301-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136615,"url":"https://patchwork.plctlab.org/api/1.2/patches/136615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823011915.3481968-1-juzhe.zhong@rivai.ai/","msgid":"<20230823011915.3481968-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T01:19:15","name":"RISC-V: Adapt live-1.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823011915.3481968-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136622,"url":"https://patchwork.plctlab.org/api/1.2/patches/136622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021106.3498134-1-juzhe.zhong@rivai.ai/","msgid":"<20230823021106.3498134-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:11:06","name":"RISC-V: Add attribute to vtype change only vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021106.3498134-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136623,"url":"https://patchwork.plctlab.org/api/1.2/patches/136623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021504.3864764-1-keithp@keithp.com/","msgid":"<20230823021504.3864764-1-keithp@keithp.com>","list_archive_url":null,"date":"2023-08-23T02:15:04","name":"libgcc/m68k: Fixes for soft float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823021504.3864764-1-keithp@keithp.com/mbox/"},{"id":136624,"url":"https://patchwork.plctlab.org/api/1.2/patches/136624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823022122.3500305-1-juzhe.zhong@rivai.ai/","msgid":"<20230823022122.3500305-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:21:22","name":"RISC-V: Fix gather_load_run-12.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823022122.3500305-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136625,"url":"https://patchwork.plctlab.org/api/1.2/patches/136625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823023230.3501614-1-juzhe.zhong@rivai.ai/","msgid":"<20230823023230.3501614-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:32:30","name":"RISC-V: Fix VTYPE fuse rule bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823023230.3501614-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136626,"url":"https://patchwork.plctlab.org/api/1.2/patches/136626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823024201.3507755-1-juzhe.zhong@rivai.ai/","msgid":"<20230823024201.3507755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T02:42:01","name":"RISC-V: Fix potential ICE of global vsetvl elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823024201.3507755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136627,"url":"https://patchwork.plctlab.org/api/1.2/patches/136627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823025607.1848-1-chenglulu@loongson.cn/","msgid":"<20230823025607.1848-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-23T02:56:08","name":"[v2] libffi: Backport of LoongArch support for libffi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823025607.1848-1-chenglulu@loongson.cn/mbox/"},{"id":136628,"url":"https://patchwork.plctlab.org/api/1.2/patches/136628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823032846.3565511-1-lehua.ding@rivai.ai/","msgid":"<20230823032846.3565511-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T03:28:46","name":"[V2] RISC-V: Add conditional unary neg/abs/not autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823032846.3565511-1-lehua.ding@rivai.ai/mbox/"},{"id":136630,"url":"https://patchwork.plctlab.org/api/1.2/patches/136630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823043118.4118801-1-hongtao.liu@intel.com/","msgid":"<20230823043118.4118801-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-23T04:31:18","name":"Fix target_clone (\"arch=graniterapids-d\") and target_clone (\"arch=arrowlake-s\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823043118.4118801-1-hongtao.liu@intel.com/mbox/"},{"id":136632,"url":"https://patchwork.plctlab.org/api/1.2/patches/136632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/h48o7iyxs01.fsf@genoa.aus.stglabs.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T05:11:26","name":"[V1,1/2] light expander sra v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/h48o7iyxs01.fsf@genoa.aus.stglabs.ibm.com/mbox/"},{"id":136640,"url":"https://patchwork.plctlab.org/api/1.2/patches/136640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOXM6mIc0hZbwWeB@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-23T09:10:02","name":"Fix profile update in tree-ssa-reassoc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOXM6mIc0hZbwWeB@kam.mff.cuni.cz/mbox/"},{"id":136650,"url":"https://patchwork.plctlab.org/api/1.2/patches/136650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823105951.1758476-1-rearnsha@arm.com/","msgid":"<20230823105951.1758476-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-08-23T10:59:51","name":"rtl: use rtx_code for gen_ccmp_first and gen_ccmp_next","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823105951.1758476-1-rearnsha@arm.com/mbox/"},{"id":136651,"url":"https://patchwork.plctlab.org/api/1.2/patches/136651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823110317.4053846-1-lehua.ding@rivai.ai/","msgid":"<20230823110317.4053846-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T11:03:17","name":"RISC-V: Add conditional sign/zero extension and truncation autovec patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823110317.4053846-1-lehua.ding@rivai.ai/mbox/"},{"id":136653,"url":"https://patchwork.plctlab.org/api/1.2/patches/136653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823115357.3868382-1-lehua.ding@rivai.ai/","msgid":"<20230823115357.3868382-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-23T11:53:57","name":"RISC-V: Add conditional convert autovec patterns between FPs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823115357.3868382-1-lehua.ding@rivai.ai/mbox/"},{"id":136656,"url":"https://patchwork.plctlab.org/api/1.2/patches/136656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122452.2137204-1-juzhe.zhong@rivai.ai/","msgid":"<20230823122452.2137204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-23T12:24:52","name":"[V2] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122452.2137204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136657,"url":"https://patchwork.plctlab.org/api/1.2/patches/136657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122843.23512-1-liaozhangjin@eswincomputing.com/","msgid":"<20230823122843.23512-1-liaozhangjin@eswincomputing.com>","list_archive_url":null,"date":"2023-08-23T12:28:43","name":"RISC-V:add a more appropriate type attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823122843.23512-1-liaozhangjin@eswincomputing.com/mbox/"},{"id":136659,"url":"https://patchwork.plctlab.org/api/1.2/patches/136659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuVikf3frvm3t21ezn09nc-sagOpuOniaHycS44t80BL-w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T13:02:40","name":"[v5] c++: extend cold, hot attributes to classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAL=LcuVikf3frvm3t21ezn09nc-sagOpuOniaHycS44t80BL-w@mail.gmail.com/mbox/"},{"id":136663,"url":"https://patchwork.plctlab.org/api/1.2/patches/136663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823132502.72B64385482D@sourceware.org/","msgid":"<20230823132502.72B64385482D@sourceware.org>","list_archive_url":null,"date":"2023-08-23T13:24:17","name":"tree-optimization/111115 - SLP of masked stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823132502.72B64385482D@sourceware.org/mbox/"},{"id":136667,"url":"https://patchwork.plctlab.org/api/1.2/patches/136667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com/","msgid":"<80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com>","list_archive_url":null,"date":"2023-08-23T13:48:27","name":"RISC-V: Add initial pipeline description for an out-of-order core.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/80530cd8-b0b6-43af-48b1-6e6cccfe5d6d@gmail.com/mbox/"},{"id":136670,"url":"https://patchwork.plctlab.org/api/1.2/patches/136670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-2-ams@codesourcery.com/","msgid":"<20230823141426.320160-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:21","name":"[v2,1/6] libgomp: basic pinned memory on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-2-ams@codesourcery.com/mbox/"},{"id":136669,"url":"https://patchwork.plctlab.org/api/1.2/patches/136669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-3-ams@codesourcery.com/","msgid":"<20230823141426.320160-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:22","name":"[v2,2/6] libgomp, openmp: Add ompx_pinned_mem_alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-3-ams@codesourcery.com/mbox/"},{"id":136672,"url":"https://patchwork.plctlab.org/api/1.2/patches/136672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-4-ams@codesourcery.com/","msgid":"<20230823141426.320160-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:23","name":"[v2,3/6] openmp: Add -foffload-memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-4-ams@codesourcery.com/mbox/"},{"id":136673,"url":"https://patchwork.plctlab.org/api/1.2/patches/136673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-5-ams@codesourcery.com/","msgid":"<20230823141426.320160-5-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:24","name":"[v2,4/6] openmp: -foffload-memory=pinned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-5-ams@codesourcery.com/mbox/"},{"id":136671,"url":"https://patchwork.plctlab.org/api/1.2/patches/136671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-6-ams@codesourcery.com/","msgid":"<20230823141426.320160-6-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:25","name":"[v2,5/6] libgomp, nvptx: Cuda pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-6-ams@codesourcery.com/mbox/"},{"id":136674,"url":"https://patchwork.plctlab.org/api/1.2/patches/136674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-7-ams@codesourcery.com/","msgid":"<20230823141426.320160-7-ams@codesourcery.com>","list_archive_url":null,"date":"2023-08-23T14:14:26","name":"[v2,6/6] libgomp: fine-grained pinned memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823141426.320160-7-ams@codesourcery.com/mbox/"},{"id":136683,"url":"https://patchwork.plctlab.org/api/1.2/patches/136683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982AAADB78E0FBB98E28147831CA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T14:39:13","name":"AArch64: Fix MOPS memmove operand corruption [PR111121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982AAADB78E0FBB98E28147831CA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":136686,"url":"https://patchwork.plctlab.org/api/1.2/patches/136686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y8DZejELWcKZouxNx-nQgZyCmSszaznU7xRA8RfLBKmw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T14:53:05","name":"[committed] i386: Fix register spill failure with concat RTX [PR111010]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y8DZejELWcKZouxNx-nQgZyCmSszaznU7xRA8RfLBKmw@mail.gmail.com/mbox/"},{"id":136691,"url":"https://patchwork.plctlab.org/api/1.2/patches/136691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823152209.351604-1-aldyh@redhat.com/","msgid":"<20230823152209.351604-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-23T15:22:00","name":"[frange] Relax floating point relational folding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823152209.351604-1-aldyh@redhat.com/mbox/"},{"id":136698,"url":"https://patchwork.plctlab.org/api/1.2/patches/136698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823160322.237140-1-jwakely@redhat.com/","msgid":"<20230823160322.237140-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-23T16:02:05","name":"[RFC] libstdc++: Make --enable-libstdcxx-backtrace=auto default to yes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823160322.237140-1-jwakely@redhat.com/mbox/"},{"id":136706,"url":"https://patchwork.plctlab.org/api/1.2/patches/136706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffce06a5-59a8-56fd-b39e-a2bd38c609a3@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-23T17:35:14","name":"[_GLIBCXX_INLINE_VERSION] Fix friend declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffce06a5-59a8-56fd-b39e-a2bd38c609a3@gmail.com/mbox/"},{"id":136709,"url":"https://patchwork.plctlab.org/api/1.2/patches/136709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com/","msgid":"<921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com>","list_archive_url":null,"date":"2023-08-23T18:47:53","name":"[COMMITTED,1/2] Phi analyzer - Do not create phi groups with a single phi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/921b7149-303a-bf0f-e550-864d5d4b5056@redhat.com/mbox/"},{"id":136710,"url":"https://patchwork.plctlab.org/api/1.2/patches/136710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com/","msgid":"<42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com>","list_archive_url":null,"date":"2023-08-23T18:48:15","name":"[COMMITTED,2/2] tree-optimization/110918 - Phi analyzer - Initialize with a range instead of a tree.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42ea3288-ddc2-4a49-9e9c-41116dffc62e@redhat.com/mbox/"},{"id":136711,"url":"https://patchwork.plctlab.org/api/1.2/patches/136711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se/","msgid":"<3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se>","list_archive_url":null,"date":"2023-08-23T18:48:25","name":"Fix for bug libstdc++/111102 pointer arithmetic on nullptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3619b32b-e7cb-7e67-2fea-67e3d9c5377a@pauldreik.se/mbox/"},{"id":136715,"url":"https://patchwork.plctlab.org/api/1.2/patches/136715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-62b0634d-102b-44b5-b999-b8927b2ba50f-1692818168035@3c-app-gmx-bs30/","msgid":"","list_archive_url":null,"date":"2023-08-23T19:16:08","name":"Fortran: improve diagnostic message for COMMON with automatic object [PR32986]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-62b0634d-102b-44b5-b999-b8927b2ba50f-1692818168035@3c-app-gmx-bs30/mbox/"},{"id":136718,"url":"https://patchwork.plctlab.org/api/1.2/patches/136718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823194904.1925591-1-polacek@redhat.com/","msgid":"<20230823194904.1925591-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-23T19:49:04","name":"c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823194904.1925591-1-polacek@redhat.com/mbox/"},{"id":136721,"url":"https://patchwork.plctlab.org/api/1.2/patches/136721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com/","msgid":"<66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com>","list_archive_url":null,"date":"2023-08-23T20:13:58","name":"[committed] Improve quality of code from LRA register elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66015ebf-ebec-c249-1f48-3949da228b18@ventanamicro.com/mbox/"},{"id":136729,"url":"https://patchwork.plctlab.org/api/1.2/patches/136729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823214955.3494903-1-apinski@marvell.com/","msgid":"<20230823214955.3494903-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-23T21:49:55","name":"MATCH: [PR111109] Fix bit_ior(cond, cond) when comparisons are fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230823214955.3494903-1-apinski@marvell.com/mbox/"},{"id":136734,"url":"https://patchwork.plctlab.org/api/1.2/patches/136734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824010834.1525563-1-guojiufu@linux.ibm.com/","msgid":"<20230824010834.1525563-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-24T01:08:34","name":"[V5,1/4] rs6000: build constant via li;rotldi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824010834.1525563-1-guojiufu@linux.ibm.com/mbox/"},{"id":136737,"url":"https://patchwork.plctlab.org/api/1.2/patches/136737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824011738.5A3122040D@pchp3.se.axis.com/","msgid":"<20230824011738.5A3122040D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-08-24T01:17:38","name":"[committed] testsuite: Xfail gcc.dg/tree-ssa/update-threading.c for CRIS, PR110628","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824011738.5A3122040D@pchp3.se.axis.com/mbox/"},{"id":136738,"url":"https://patchwork.plctlab.org/api/1.2/patches/136738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824020836.48335-1-juzhe.zhong@rivai.ai/","msgid":"<20230824020836.48335-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T02:08:36","name":"VECT: Apply LEN_FOLD_EXTRACT_LAST into loop vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824020836.48335-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136739,"url":"https://patchwork.plctlab.org/api/1.2/patches/136739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824021925.1717486-1-juzhe.zhong@rivai.ai/","msgid":"<20230824021925.1717486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T02:19:25","name":"RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824021925.1717486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136743,"url":"https://patchwork.plctlab.org/api/1.2/patches/136743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824023815.3506414-1-apinski@marvell.com/","msgid":"<20230824023815.3506414-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T02:38:15","name":"MATCH: remove negate for 1bit types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824023815.3506414-1-apinski@marvell.com/mbox/"},{"id":136744,"url":"https://patchwork.plctlab.org/api/1.2/patches/136744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824025706.192064-1-thiago.bauermann@linaro.org/","msgid":"<20230824025706.192064-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2023-08-24T02:57:06","name":"testsuite: aarch64: Adjust SVE ACLE tests to new generated code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824025706.192064-1-thiago.bauermann@linaro.org/mbox/"},{"id":136746,"url":"https://patchwork.plctlab.org/api/1.2/patches/136746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-2-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-2-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:11","name":"[v5,1/6] LoongArch: Add Loongson SX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-2-panchenghui@loongson.cn/mbox/"},{"id":136748,"url":"https://patchwork.plctlab.org/api/1.2/patches/136748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-3-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:12","name":"[v5,2/6] LoongArch: Add Loongson SX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-3-panchenghui@loongson.cn/mbox/"},{"id":136750,"url":"https://patchwork.plctlab.org/api/1.2/patches/136750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-4-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:13","name":"[v5,3/6] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-4-panchenghui@loongson.cn/mbox/"},{"id":136745,"url":"https://patchwork.plctlab.org/api/1.2/patches/136745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-5-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:14","name":"[v5,4/6] LoongArch: Add Loongson ASX vector directive compilation framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-5-panchenghui@loongson.cn/mbox/"},{"id":136751,"url":"https://patchwork.plctlab.org/api/1.2/patches/136751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-6-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-6-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:15","name":"[v5,5/6] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-6-panchenghui@loongson.cn/mbox/"},{"id":136749,"url":"https://patchwork.plctlab.org/api/1.2/patches/136749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-7-panchenghui@loongson.cn/","msgid":"<20230824031316.16599-7-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-24T03:13:16","name":"[v5,6/6] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824031316.16599-7-panchenghui@loongson.cn/mbox/"},{"id":136757,"url":"https://patchwork.plctlab.org/api/1.2/patches/136757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824044907.4078472-1-pan2.li@intel.com/","msgid":"<20230824044907.4078472-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T04:49:07","name":"[v1] RISC-V: Support rounding mode for VFMADD/VFMACC autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824044907.4078472-1-pan2.li@intel.com/mbox/"},{"id":136760,"url":"https://patchwork.plctlab.org/api/1.2/patches/136760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824071104.298243-1-pan2.li@intel.com/","msgid":"<20230824071104.298243-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T07:11:04","name":"[v1] RISC-V: Support rounding mode for VFMSAC/VFMSUB autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824071104.298243-1-pan2.li@intel.com/mbox/"},{"id":136762,"url":"https://patchwork.plctlab.org/api/1.2/patches/136762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824073747.315274-1-pan2.li@intel.com/","msgid":"<20230824073747.315274-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T07:37:47","name":"[v1] RISC-V: Fix one typo in autovec.md pattern comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824073747.315274-1-pan2.li@intel.com/mbox/"},{"id":136765,"url":"https://patchwork.plctlab.org/api/1.2/patches/136765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824075851.2484291-1-hongtao.liu@intel.com/","msgid":"<20230824075851.2484291-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-24T07:58:51","name":"[x86] Refactor mode iterator V_128 and V_128H, V_256 and V_256H","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824075851.2484291-1-hongtao.liu@intel.com/mbox/"},{"id":136768,"url":"https://patchwork.plctlab.org/api/1.2/patches/136768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824081408.340237-1-pan2.li@intel.com/","msgid":"<20230824081408.340237-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T08:14:08","name":"[v2] RISC-V: Fix one typo in autovec.md pattern comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824081408.340237-1-pan2.li@intel.com/mbox/"},{"id":136773,"url":"https://patchwork.plctlab.org/api/1.2/patches/136773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824085931.5282A385414C@sourceware.org/","msgid":"<20230824085931.5282A385414C@sourceware.org>","list_archive_url":null,"date":"2023-08-24T08:58:46","name":"testsuite/111125 - disable BB vectorization for the test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824085931.5282A385414C@sourceware.org/mbox/"},{"id":136774,"url":"https://patchwork.plctlab.org/api/1.2/patches/136774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090040.CD4F6385C422@sourceware.org/","msgid":"<20230824090040.CD4F6385C422@sourceware.org>","list_archive_url":null,"date":"2023-08-24T08:59:53","name":"tree-optimization/111128 - fix shift pattern recog","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090040.CD4F6385C422@sourceware.org/mbox/"},{"id":136775,"url":"https://patchwork.plctlab.org/api/1.2/patches/136775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090320.9947D385DC19@sourceware.org/","msgid":"<20230824090320.9947D385DC19@sourceware.org>","list_archive_url":null,"date":"2023-08-24T09:02:34","name":"tree-optimization/111123 - indirect clobbers thrown away too early","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090320.9947D385DC19@sourceware.org/mbox/"},{"id":136776,"url":"https://patchwork.plctlab.org/api/1.2/patches/136776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090242.2997731-1-hongyu.wang@intel.com/","msgid":"<20230824090242.2997731-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-24T09:02:42","name":"Fix avx512ne2ps2bf16 wrong code [PR 111127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824090242.2997731-1-hongyu.wang@intel.com/mbox/"},{"id":136780,"url":"https://patchwork.plctlab.org/api/1.2/patches/136780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcyzcajbi.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T09:19:45","name":"aarch64: Account for different Advanced SIMD fusing options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptcyzcajbi.fsf@arm.com/mbox/"},{"id":136797,"url":"https://patchwork.plctlab.org/api/1.2/patches/136797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093446.651760-1-pan2.li@intel.com/","msgid":"<20230824093446.651760-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-24T09:34:46","name":"[v1] RISC-V: Support rounding mode for VFNMSAC/VFNMSUB autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093446.651760-1-pan2.li@intel.com/mbox/"},{"id":136798,"url":"https://patchwork.plctlab.org/api/1.2/patches/136798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093708.71A883856DD0@sourceware.org/","msgid":"<20230824093708.71A883856DD0@sourceware.org>","list_archive_url":null,"date":"2023-08-24T09:36:20","name":"tree-optimization/111125 - properly cost BB reduction remain stmt handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824093708.71A883856DD0@sourceware.org/mbox/"},{"id":136801,"url":"https://patchwork.plctlab.org/api/1.2/patches/136801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824100811.2468621-1-juzhe.zhong@rivai.ai/","msgid":"<20230824100811.2468621-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-24T10:08:11","name":"[V2] RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824100811.2468621-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136803,"url":"https://patchwork.plctlab.org/api/1.2/patches/136803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824105505.2481018-1-lehua.ding@rivai.ai/","msgid":"<20230824105505.2481018-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-24T10:55:05","name":"RISC-V: Add conditional autovec convert(INT<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824105505.2481018-1-lehua.ding@rivai.ai/mbox/"},{"id":136805,"url":"https://patchwork.plctlab.org/api/1.2/patches/136805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824110358.ACA0D3851C20@sourceware.org/","msgid":"<20230824110358.ACA0D3851C20@sourceware.org>","list_archive_url":null,"date":"2023-08-24T11:03:06","name":"tree-optimization/111125 - avoid BB vectorization in novector loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824110358.ACA0D3851C20@sourceware.org/mbox/"},{"id":136815,"url":"https://patchwork.plctlab.org/api/1.2/patches/136815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124122.431361-1-jwakely@redhat.com/","msgid":"<20230824124122.431361-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:41:08","name":"[committed] libstdc++: Declutter std::optional and std:variant pretty printers [PR110944]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124122.431361-1-jwakely@redhat.com/mbox/"},{"id":136817,"url":"https://patchwork.plctlab.org/api/1.2/patches/136817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124152.431392-1-jwakely@redhat.com/","msgid":"<20230824124152.431392-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:41:23","name":"[committed] libstdc++: Add pretty printer for std::locale","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124152.431392-1-jwakely@redhat.com/mbox/"},{"id":136816,"url":"https://patchwork.plctlab.org/api/1.2/patches/136816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124231.86E373853D1F@sourceware.org/","msgid":"<20230824124231.86E373853D1F@sourceware.org>","list_archive_url":null,"date":"2023-08-24T12:41:45","name":"Fix confusion about load_p in vect_build_slp_tree_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124231.86E373853D1F@sourceware.org/mbox/"},{"id":136818,"url":"https://patchwork.plctlab.org/api/1.2/patches/136818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124524.443635-1-jwakely@redhat.com/","msgid":"<20230824124524.443635-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:44:56","name":"[committed] libstdc++: Implement new SI prefixes in for C++23 (P2734R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124524.443635-1-jwakely@redhat.com/mbox/"},{"id":136820,"url":"https://patchwork.plctlab.org/api/1.2/patches/136820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124536.443669-1-jwakely@redhat.com/","msgid":"<20230824124536.443669-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:25","name":"[committed] libstdc++: Tweak some preprocessor conditions for feature tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124536.443669-1-jwakely@redhat.com/mbox/"},{"id":136819,"url":"https://patchwork.plctlab.org/api/1.2/patches/136819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124549.443683-1-jwakely@redhat.com/","msgid":"<20230824124549.443683-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:37","name":"[committed] libstdc++: Fix -Wunused-but-set-variable in std::format_to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124549.443683-1-jwakely@redhat.com/mbox/"},{"id":136821,"url":"https://patchwork.plctlab.org/api/1.2/patches/136821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124603.443712-1-jwakely@redhat.com/","msgid":"<20230824124603.443712-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-08-24T12:45:56","name":"[committed] libstdc++: Add test for illegal pointer arithmetic in format [PR111102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824124603.443712-1-jwakely@redhat.com/mbox/"},{"id":136826,"url":"https://patchwork.plctlab.org/api/1.2/patches/136826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdXuCEkw7On4xBo@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-08-24T13:14:32","name":"Check that passes do not forget to define profile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdXuCEkw7On4xBo@kam.mff.cuni.cz/mbox/"},{"id":136827,"url":"https://patchwork.plctlab.org/api/1.2/patches/136827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdiA7tyrtpll0FT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-24T13:58:27","name":"c++: Implement C++26 P2361R6 - Unevaluated strings [PR110342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdiA7tyrtpll0FT@tucnak/mbox/"},{"id":136829,"url":"https://patchwork.plctlab.org/api/1.2/patches/136829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdpmyv5gUOzAave@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-24T14:30:51","name":"c++: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdpmyv5gUOzAave@tucnak/mbox/"},{"id":136831,"url":"https://patchwork.plctlab.org/api/1.2/patches/136831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-2-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:55","name":"[1/9] analyzer: add logging to impl_path_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-2-dmalcolm@redhat.com/mbox/"},{"id":136837,"url":"https://patchwork.plctlab.org/api/1.2/patches/136837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-3-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:56","name":"[2/9] analyzer: handle symbolic bindings in scan_for_null_terminator [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-3-dmalcolm@redhat.com/mbox/"},{"id":136834,"url":"https://patchwork.plctlab.org/api/1.2/patches/136834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-4-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:57","name":"[3/9] analyzer: reimplement kf_strcpy [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-4-dmalcolm@redhat.com/mbox/"},{"id":136832,"url":"https://patchwork.plctlab.org/api/1.2/patches/136832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-5-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:58","name":"[4/9] analyzer: eliminate region_model::get_string_size [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-5-dmalcolm@redhat.com/mbox/"},{"id":136833,"url":"https://patchwork.plctlab.org/api/1.2/patches/136833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-6-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:38:59","name":"[5/9] analyzer: reimplement kf_memcpy_memmove","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-6-dmalcolm@redhat.com/mbox/"},{"id":136838,"url":"https://patchwork.plctlab.org/api/1.2/patches/136838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-7-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:00","name":"[6/9] analyzer: handle strlen(INIT_VAL(STRING_REG)) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-7-dmalcolm@redhat.com/mbox/"},{"id":136839,"url":"https://patchwork.plctlab.org/api/1.2/patches/136839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-8-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-8-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:01","name":"[7/9] analyzer: handle INIT_VAL(ELEMENT_REG(STRING_REG), CONSTANT_SVAL) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-8-dmalcolm@redhat.com/mbox/"},{"id":136840,"url":"https://patchwork.plctlab.org/api/1.2/patches/136840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-9-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-9-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:02","name":"[8/9] analyzer: handle strlen(BITS_WITHIN) [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-9-dmalcolm@redhat.com/mbox/"},{"id":136835,"url":"https://patchwork.plctlab.org/api/1.2/patches/136835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-10-dmalcolm@redhat.com/","msgid":"<20230824143903.3161185-10-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-24T14:39:03","name":"[9/9] analyzer: implement kf_strcat [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824143903.3161185-10-dmalcolm@redhat.com/mbox/"},{"id":136844,"url":"https://patchwork.plctlab.org/api/1.2/patches/136844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdyHqxbRshejb4n@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-08-24T15:07:10","name":"[RFC] gimple ssa: SCCP - A new PHI optimization pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOdyHqxbRshejb4n@fkdesktop.suse.cz/mbox/"},{"id":136847,"url":"https://patchwork.plctlab.org/api/1.2/patches/136847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNkyz3m7xU8FtArMmCW_nJY4WCzePdQpn_SQEmvErbwmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T15:45:12","name":"RISC-V: Fix stack_save_restore_1/2 test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sNkyz3m7xU8FtArMmCW_nJY4WCzePdQpn_SQEmvErbwmg@mail.gmail.com/mbox/"},{"id":136860,"url":"https://patchwork.plctlab.org/api/1.2/patches/136860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824180459.465060-1-patrick@rivosinc.com/","msgid":"<20230824180459.465060-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-08-24T18:04:59","name":"RISC-V: Move vector-abi testcases into rvv/base folder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824180459.465060-1-patrick@rivosinc.com/mbox/"},{"id":136864,"url":"https://patchwork.plctlab.org/api/1.2/patches/136864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824183919.2485913-1-vultkayn@gcc.gnu.org/","msgid":"<20230824183919.2485913-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-24T18:39:20","name":"analyzer: Move gcc.dg/analyzer tests to c-c++-common (1).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824183919.2485913-1-vultkayn@gcc.gnu.org/mbox/"},{"id":136866,"url":"https://patchwork.plctlab.org/api/1.2/patches/136866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-1-apinski@marvell.com/","msgid":"<20230824191455.3547513-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:53","name":"[1/3] MATCH: Move `a ? one_zero : one_zero` matching after min/max matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-1-apinski@marvell.com/mbox/"},{"id":136865,"url":"https://patchwork.plctlab.org/api/1.2/patches/136865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-2-apinski@marvell.com/","msgid":"<20230824191455.3547513-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:54","name":"[2/3] MATCH: `a | C -> C` when we know that `a & ~C == 0`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-2-apinski@marvell.com/mbox/"},{"id":136867,"url":"https://patchwork.plctlab.org/api/1.2/patches/136867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-3-apinski@marvell.com/","msgid":"<20230824191455.3547513-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-24T19:14:55","name":"[3/3] PHIOPT: Allow BIT_AND and BIT_IOR in early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824191455.3547513-3-apinski@marvell.com/mbox/"},{"id":136871,"url":"https://patchwork.plctlab.org/api/1.2/patches/136871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfe8e7a86de86b9ad1198418f93064484587b742.camel@us.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T19:53:29","name":"[ver,3] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dfe8e7a86de86b9ad1198418f93064484587b742.camel@us.ibm.com/mbox/"},{"id":136873,"url":"https://patchwork.plctlab.org/api/1.2/patches/136873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4afmk1bUhsEdOHumd_7h0r-1kSQhVS6=uxfh2kKKH+Hxw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-24T20:26:28","name":"[committed] i386: Optimize pinsrq of 0 with index 1 into movq [PR94866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4afmk1bUhsEdOHumd_7h0r-1kSQhVS6=uxfh2kKKH+Hxw@mail.gmail.com/mbox/"},{"id":136880,"url":"https://patchwork.plctlab.org/api/1.2/patches/136880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824211957.671151-1-ewlu@rivosinc.com/","msgid":"<20230824211957.671151-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-24T21:19:05","name":"[V2] RISC-V: Add Types to Un-Typed Sync Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230824211957.671151-1-ewlu@rivosinc.com/mbox/"},{"id":136883,"url":"https://patchwork.plctlab.org/api/1.2/patches/136883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-805c458b-39ea-45ab-bc59-6331fd8b952e-1692912489967@3c-app-gmx-bap48/","msgid":"","list_archive_url":null,"date":"2023-08-24T21:28:10","name":"Fortran: improve bounds checking for DATA with implied-do [PR35095]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-805c458b-39ea-45ab-bc59-6331fd8b952e-1692912489967@3c-app-gmx-bap48/mbox/"},{"id":136887,"url":"https://patchwork.plctlab.org/api/1.2/patches/136887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825014833.3971482-1-pan2.li@intel.com/","msgid":"<20230825014833.3971482-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-25T01:48:33","name":"[v1] RISC-V: Support rounding mode for VFNMADD/VFNMACC autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825014833.3971482-1-pan2.li@intel.com/mbox/"},{"id":136888,"url":"https://patchwork.plctlab.org/api/1.2/patches/136888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825015919.3478297-1-juzhe.zhong@rivai.ai/","msgid":"<20230825015919.3478297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-25T01:59:19","name":"RISC-V: Add early continue for ENTRY and EXIT block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825015919.3478297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136890,"url":"https://patchwork.plctlab.org/api/1.2/patches/136890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825020520.3485365-1-lehua.ding@rivai.ai/","msgid":"<20230825020520.3485365-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-25T02:05:20","name":"[V2] RISC-V: Add conditional autovec convert(INT<->INT) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825020520.3485365-1-lehua.ding@rivai.ai/mbox/"},{"id":136892,"url":"https://patchwork.plctlab.org/api/1.2/patches/136892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825030720.3495607-1-juzhe.zhong@rivai.ai/","msgid":"<20230825030720.3495607-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-25T03:07:20","name":"[V3] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825030720.3495607-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136894,"url":"https://patchwork.plctlab.org/api/1.2/patches/136894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825040156.9209-1-chenglulu@loongson.cn/","msgid":"<20230825040156.9209-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-25T04:01:56","name":"[v1] LoongArch: Remove the symbolic extension instruction due to the SLT directive.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825040156.9209-1-chenglulu@loongson.cn/mbox/"},{"id":136895,"url":"https://patchwork.plctlab.org/api/1.2/patches/136895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044357.1669621-1-hongtao.liu@intel.com/","msgid":"<20230825044357.1669621-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-25T04:43:57","name":"Use vmaskmov{ps, pd} for VI48_128_256 when TARGET_AVX2 is not available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044357.1669621-1-hongtao.liu@intel.com/mbox/"},{"id":136896,"url":"https://patchwork.plctlab.org/api/1.2/patches/136896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044712.348608-1-yangyujie@loongson.cn/","msgid":"<20230825044712.348608-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-25T04:46:05","name":"[PING] LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825044712.348608-1-yangyujie@loongson.cn/mbox/"},{"id":136898,"url":"https://patchwork.plctlab.org/api/1.2/patches/136898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825051614.2125893-1-vineetg@rivosinc.com/","msgid":"<20230825051614.2125893-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T05:16:14","name":"[v2] RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825051614.2125893-1-vineetg@rivosinc.com/mbox/"},{"id":136906,"url":"https://patchwork.plctlab.org/api/1.2/patches/136906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com/","msgid":"<68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-25T06:44:26","name":"[PATCH-1,rs6000] Enable SImode in FP register on P7 [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68d731d8-5dda-526b-8dbb-d08bde31d25b@linux.ibm.com/mbox/"},{"id":136907,"url":"https://patchwork.plctlab.org/api/1.2/patches/136907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfb389e5-079c-4557-fb8a-e041c4bf739e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T06:44:45","name":"[PATCH-2,rs6000] Implement 32bit inline lrint [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cfb389e5-079c-4557-fb8a-e041c4bf739e@linux.ibm.com/mbox/"},{"id":136908,"url":"https://patchwork.plctlab.org/api/1.2/patches/136908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825080204.3531681-1-lehua.ding@rivai.ai/","msgid":"<20230825080204.3531681-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-25T08:02:04","name":"RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825080204.3531681-1-lehua.ding@rivai.ai/mbox/"},{"id":136909,"url":"https://patchwork.plctlab.org/api/1.2/patches/136909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825081408.C9C121340A@imap2.suse-dmz.suse.de/","msgid":"<20230825081408.C9C121340A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T08:14:08","name":"tree-optimization/111136 - STMT_VINFO_SLP_VECT_ONLY and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825081408.C9C121340A@imap2.suse-dmz.suse.de/mbox/"},{"id":136910,"url":"https://patchwork.plctlab.org/api/1.2/patches/136910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YM0vVaVE6YHFstFormuBJ-Ff+2iG9rRj8KaaRD2i5atA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T08:24:44","name":"[committed] treewide: Rename TRUE/FALSE to true/false in *.cc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4YM0vVaVE6YHFstFormuBJ-Ff+2iG9rRj8KaaRD2i5atA@mail.gmail.com/mbox/"},{"id":136911,"url":"https://patchwork.plctlab.org/api/1.2/patches/136911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZNDHY-ihh-Vh72CohZ3izNgpg6L5raUogXONKTqS=2Sg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T08:26:31","name":"fortran: Rename TRUE/FALSE to true/false in *.cc files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZNDHY-ihh-Vh72CohZ3izNgpg6L5raUogXONKTqS=2Sg@mail.gmail.com/mbox/"},{"id":136912,"url":"https://patchwork.plctlab.org/api/1.2/patches/136912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825093156.14808-1-chenglulu@loongson.cn/","msgid":"<20230825093156.14808-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-25T09:31:57","name":"[v2] LoongArch: Remove redundant sign extension instructions caused by SLT instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825093156.14808-1-chenglulu@loongson.cn/mbox/"},{"id":136913,"url":"https://patchwork.plctlab.org/api/1.2/patches/136913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825111532.F27E6138F9@imap2.suse-dmz.suse.de/","msgid":"<20230825111532.F27E6138F9@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T11:15:32","name":"Apply some TLC to vect_slp_analyze_instance_dependence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825111532.F27E6138F9@imap2.suse-dmz.suse.de/mbox/"},{"id":136914,"url":"https://patchwork.plctlab.org/api/1.2/patches/136914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825123728.531381340A@imap2.suse-dmz.suse.de/","msgid":"<20230825123728.531381340A@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-25T12:37:27","name":"tree-optimization/111137 - dependence checking for SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825123728.531381340A@imap2.suse-dmz.suse.de/mbox/"},{"id":136916,"url":"https://patchwork.plctlab.org/api/1.2/patches/136916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825124433.3279791-1-dmalcolm@redhat.com/","msgid":"<20230825124433.3279791-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-25T12:44:33","name":"[pushed] analyzer: fix ICE in text art strings support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825124433.3279791-1-dmalcolm@redhat.com/mbox/"},{"id":136923,"url":"https://patchwork.plctlab.org/api/1.2/patches/136923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-2-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-2-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:23","name":"[V3,1/3] Provide counted_by attribute to flexible array member field (PR108896)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-2-qing.zhao@oracle.com/mbox/"},{"id":136924,"url":"https://patchwork.plctlab.org/api/1.2/patches/136924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-3-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-3-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:24","name":"[V3,2/3] Use the counted_by atribute info in builtin object size [PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-3-qing.zhao@oracle.com/mbox/"},{"id":136925,"url":"https://patchwork.plctlab.org/api/1.2/patches/136925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-4-qing.zhao@oracle.com/","msgid":"<20230825152425.2417656-4-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-08-25T15:24:25","name":"[V3,3/3] Use the counted_by attribute information in bound sanitizer[PR108896]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825152425.2417656-4-qing.zhao@oracle.com/mbox/"},{"id":136926,"url":"https://patchwork.plctlab.org/api/1.2/patches/136926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825162122.3599370-1-apinski@marvell.com/","msgid":"<20230825162122.3599370-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-25T16:21:22","name":"MATCH: Move `(X & ~Y) | (~X & Y)` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825162122.3599370-1-apinski@marvell.com/mbox/"},{"id":136927,"url":"https://patchwork.plctlab.org/api/1.2/patches/136927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825163331.3231278-1-ppalka@redhat.com/","msgid":"<20230825163331.3231278-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-25T16:33:31","name":"c++: use conversion_obstack_sentinel throughout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825163331.3231278-1-ppalka@redhat.com/mbox/"},{"id":136928,"url":"https://patchwork.plctlab.org/api/1.2/patches/136928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825164447.480720-1-polacek@redhat.com/","msgid":"<20230825164447.480720-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-25T16:44:47","name":"c++: CWG 2359, wrong copy-init with designated init [PR91319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825164447.480720-1-polacek@redhat.com/mbox/"},{"id":136930,"url":"https://patchwork.plctlab.org/api/1.2/patches/136930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825174146.3372968-1-ppalka@redhat.com/","msgid":"<20230825174146.3372968-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-08-25T17:41:45","name":"c++: more dummy non_constant_p arg avoidance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825174146.3372968-1-ppalka@redhat.com/mbox/"},{"id":136931,"url":"https://patchwork.plctlab.org/api/1.2/patches/136931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1f0b94e-602b-6f52-090a-6baac5b61b6b@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T18:17:22","name":"[wwwdocs] projects/gomp: Update implementation status and minor fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1f0b94e-602b-6f52-090a-6baac5b61b6b@codesourcery.com/mbox/"},{"id":136932,"url":"https://patchwork.plctlab.org/api/1.2/patches/136932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825183312.3604580-1-apinski@marvell.com/","msgid":"<20230825183312.3604580-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-25T18:33:12","name":"[COMMITTEDv2] MATCH: Move `a ? one_zero : one_zero` matching after min/max matching","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825183312.3604580-1-apinski@marvell.com/mbox/"},{"id":136933,"url":"https://patchwork.plctlab.org/api/1.2/patches/136933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825192428.2165663-1-vineetg@rivosinc.com/","msgid":"<20230825192428.2165663-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T19:24:28","name":"[Committed] RISC-V: Enable Hoist to GCSE simple constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825192428.2165663-1-vineetg@rivosinc.com/mbox/"},{"id":136934,"url":"https://patchwork.plctlab.org/api/1.2/patches/136934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-2-sandra@codesourcery.com/","msgid":"<20230825194714.627157-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:09","name":"[COMMITTED,V3,1/6] OpenMP: Add OMP_STRUCTURED_BLOCK and GIMPLE_OMP_STRUCTURED_BLOCK.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-2-sandra@codesourcery.com/mbox/"},{"id":136937,"url":"https://patchwork.plctlab.org/api/1.2/patches/136937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-3-sandra@codesourcery.com/","msgid":"<20230825194714.627157-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:10","name":"[COMMITTED,V3,2/6] OpenMP: C front end support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-3-sandra@codesourcery.com/mbox/"},{"id":136935,"url":"https://patchwork.plctlab.org/api/1.2/patches/136935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-4-sandra@codesourcery.com/","msgid":"<20230825194714.627157-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:11","name":"[COMMITTED,V3,3/6] OpenMP: C++ support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-4-sandra@codesourcery.com/mbox/"},{"id":136938,"url":"https://patchwork.plctlab.org/api/1.2/patches/136938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-5-sandra@codesourcery.com/","msgid":"<20230825194714.627157-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:12","name":"[COMMITTED,V3,4/6] OpenMP: New C/C++ testcases for imperfectly nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-5-sandra@codesourcery.com/mbox/"},{"id":136939,"url":"https://patchwork.plctlab.org/api/1.2/patches/136939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-6-sandra@codesourcery.com/","msgid":"<20230825194714.627157-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:13","name":"[COMMITTED,V3,5/6] OpenMP: Fortran support for imperfectly-nested loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-6-sandra@codesourcery.com/mbox/"},{"id":136936,"url":"https://patchwork.plctlab.org/api/1.2/patches/136936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-7-sandra@codesourcery.com/","msgid":"<20230825194714.627157-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-08-25T19:47:14","name":"[COMMITTED,V3,6/6] OpenMP: Document support for imperfectly-nested loops.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825194714.627157-7-sandra@codesourcery.com/mbox/"},{"id":136940,"url":"https://patchwork.plctlab.org/api/1.2/patches/136940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkQeH+HvpO8+iFY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-25T20:35:04","name":"c++: Implement C++ DR 2406 - [[fallthrough]] attribute and iteration statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkQeH+HvpO8+iFY@tucnak/mbox/"},{"id":136941,"url":"https://patchwork.plctlab.org/api/1.2/patches/136941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825204554.2440771-1-lhyatt@gmail.com/","msgid":"<20230825204554.2440771-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-08-25T20:45:54","name":"testsuite: Add test for already-fixed issue with _Pragma expansion [PR90400]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825204554.2440771-1-lhyatt@gmail.com/mbox/"},{"id":136942,"url":"https://patchwork.plctlab.org/api/1.2/patches/136942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkT1OwRjZWBntFR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-25T20:49:24","name":"c++: Implement C++26 P1854R4 - Making non-encodable string literals ill-formed [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOkT1OwRjZWBntFR@tucnak/mbox/"},{"id":136945,"url":"https://patchwork.plctlab.org/api/1.2/patches/136945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe44ae1c-93a9-9aea-b233-46082269f896@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-25T22:30:00","name":"[committed] RISC-V: Fix minor testsuite problem with zicond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe44ae1c-93a9-9aea-b233-46082269f896@ventanamicro.com/mbox/"},{"id":136946,"url":"https://patchwork.plctlab.org/api/1.2/patches/136946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com/","msgid":"<10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com>","list_archive_url":null,"date":"2023-08-25T22:36:22","name":"[committed] RISC-V: Make stack_save_restore tests more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10382874-cea3-93d3-de15-bc3b7383cd61@ventanamicro.com/mbox/"},{"id":136947,"url":"https://patchwork.plctlab.org/api/1.2/patches/136947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825233746.904433-1-polacek@redhat.com/","msgid":"<20230825233746.904433-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-25T23:37:46","name":"c++: tweaks for explicit conversion fns diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825233746.904433-1-polacek@redhat.com/mbox/"},{"id":136948,"url":"https://patchwork.plctlab.org/api/1.2/patches/136948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825234238.86902-1-ewlu@rivosinc.com/","msgid":"<20230825234238.86902-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-25T23:42:20","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230825234238.86902-1-ewlu@rivosinc.com/mbox/"},{"id":136952,"url":"https://patchwork.plctlab.org/api/1.2/patches/136952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021252.3623978-1-apinski@marvell.com/","msgid":"<20230826021252.3623978-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-26T02:12:52","name":"Fix phi-opt-34.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021252.3623978-1-apinski@marvell.com/mbox/"},{"id":136953,"url":"https://patchwork.plctlab.org/api/1.2/patches/136953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021458.3624086-1-apinski@marvell.com/","msgid":"<20230826021458.3624086-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-26T02:14:58","name":"PHIOPT: Add dump for match and simplify and early phiopt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826021458.3624086-1-apinski@marvell.com/mbox/"},{"id":136954,"url":"https://patchwork.plctlab.org/api/1.2/patches/136954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOndysJuo9q/Y5+8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-26T11:11:06","name":"libcpp: Small incremental patch for P1854R4 [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOndysJuo9q/Y5+8@tucnak/mbox/"},{"id":136955,"url":"https://patchwork.plctlab.org/api/1.2/patches/136955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826122219.2310080-1-vultkayn@gcc.gnu.org/","msgid":"<20230826122219.2310080-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-26T12:22:21","name":"[v2] analyzer: Move gcc.dg/analyzer tests to c-c++-common (1) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826122219.2310080-1-vultkayn@gcc.gnu.org/mbox/"},{"id":136956,"url":"https://patchwork.plctlab.org/api/1.2/patches/136956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826133634.610777-1-pan2.li@intel.com/","msgid":"<20230826133634.610777-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-26T13:36:34","name":"[v2] Mode-Switching: Add optional EMIT_AFTER hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230826133634.610777-1-pan2.li@intel.com/mbox/"},{"id":136957,"url":"https://patchwork.plctlab.org/api/1.2/patches/136957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at/","msgid":"<1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:20:57","name":"[C,1/6] c: reorganize recursive type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1df29de95ff41a02ffd218f4cd69f8f93df35321.camel@tugraz.at/mbox/"},{"id":136958,"url":"https://patchwork.plctlab.org/api/1.2/patches/136958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at/","msgid":"<97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:22:12","name":"[C,2/6] c23: recursive type checking of tagged type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/97de0d83b4ab5e463ed0e9206314d2aa97dc2ca4.camel@tugraz.at/mbox/"},{"id":136959,"url":"https://patchwork.plctlab.org/api/1.2/patches/136959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at/","msgid":"<00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:23:10","name":"[C,3/6] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f5c725f1e5234a8f5f396c393d4d09159c6eae.camel@tugraz.at/mbox/"},{"id":136960,"url":"https://patchwork.plctlab.org/api/1.2/patches/136960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at/","msgid":"<525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:24:04","name":"[C,4/6] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/525f0f422f6d907b415d42e16daf8acdbd92ebe6.camel@tugraz.at/mbox/"},{"id":136961,"url":"https://patchwork.plctlab.org/api/1.2/patches/136961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at/","msgid":"<340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:25:18","name":"[C,5/6] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/340e5e37051a32c9637ae221e17c75f9421840a8.camel@tugraz.at/mbox/"},{"id":136962,"url":"https://patchwork.plctlab.org/api/1.2/patches/136962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at/","msgid":"<748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:26:06","name":"[C,6/6] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/748ad71f62bb0e306d2fc050763b2e69ca81190f.camel@tugraz.at/mbox/"},{"id":136963,"url":"https://patchwork.plctlab.org/api/1.2/patches/136963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at/","msgid":"<157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at>","list_archive_url":null,"date":"2023-08-26T16:26:55","name":"[C] c: flag for tag compatibility rules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/157a7b1266c6d3b46b2be59f878d8469abdd21bc.camel@tugraz.at/mbox/"},{"id":136985,"url":"https://patchwork.plctlab.org/api/1.2/patches/136985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com/","msgid":"<0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T18:40:36","name":"[committed] RISC-V: Fix xtheadcondmov-indirect.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com/mbox/"},{"id":136986,"url":"https://patchwork.plctlab.org/api/1.2/patches/136986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com/","msgid":"<8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T18:54:16","name":"[committed] RISC-V: Fix spill-12 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8f9c80d7-a67d-20d0-148e-74db07a53360@ventanamicro.com/mbox/"},{"id":136987,"url":"https://patchwork.plctlab.org/api/1.2/patches/136987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com/","msgid":"<8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com>","list_archive_url":null,"date":"2023-08-27T19:01:45","name":"[committed] RISC-V: Fix spill-11.c testsuite failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e784353-c7d4-b125-7d48-005efee26438@ventanamicro.com/mbox/"},{"id":136988,"url":"https://patchwork.plctlab.org/api/1.2/patches/136988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827192246.2514665-1-mikael@gcc.gnu.org/","msgid":"<20230827192246.2514665-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-27T19:22:46","name":"fortran: Restore interface to its previous state on error [PR48776]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827192246.2514665-1-mikael@gcc.gnu.org/mbox/"},{"id":136989,"url":"https://patchwork.plctlab.org/api/1.2/patches/136989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827225754.3733610-1-apinski@marvell.com/","msgid":"<20230827225754.3733610-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-27T22:57:54","name":"IFCOMBINE: Remove outer condition for two same conditionals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230827225754.3733610-1-apinski@marvell.com/mbox/"},{"id":136991,"url":"https://patchwork.plctlab.org/api/1.2/patches/136991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828014840.1421800-1-juzhe.zhong@rivai.ai/","msgid":"<20230828014840.1421800-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T01:48:40","name":"RISC-V: Fix VSETVL test failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828014840.1421800-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136993,"url":"https://patchwork.plctlab.org/api/1.2/patches/136993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828030715.2310469-1-guojiufu@linux.ibm.com/","msgid":"<20230828030715.2310469-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-28T03:07:15","name":"rs6000: mark tieable between INT and FLOAT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828030715.2310469-1-guojiufu@linux.ibm.com/mbox/"},{"id":136994,"url":"https://patchwork.plctlab.org/api/1.2/patches/136994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828031217.2801549-1-juzhe.zhong@rivai.ai/","msgid":"<20230828031217.2801549-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T03:12:17","name":"RISC-V: Enable vec_init testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828031217.2801549-1-juzhe.zhong@rivai.ai/mbox/"},{"id":136995,"url":"https://patchwork.plctlab.org/api/1.2/patches/136995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034514.22681-1-chenglulu@loongson.cn/","msgid":"<20230828034514.22681-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-28T03:45:15","name":"[v1] LoongArch: Enable '\''-free'\'' starting at -O2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034514.22681-1-chenglulu@loongson.cn/mbox/"},{"id":136996,"url":"https://patchwork.plctlab.org/api/1.2/patches/136996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034652.22768-1-chenglulu@loongson.cn/","msgid":"<20230828034652.22768-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-08-28T03:46:53","name":"[v2] LoongArch: Enable '\''-free'\'' starting at -O2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828034652.22768-1-chenglulu@loongson.cn/mbox/"},{"id":137003,"url":"https://patchwork.plctlab.org/api/1.2/patches/137003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828035253.3745942-1-apinski@marvell.com/","msgid":"<20230828035253.3745942-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T03:52:53","name":"MATCH: Remove redundant pattern for `(x | y) & ~x`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828035253.3745942-1-apinski@marvell.com/mbox/"},{"id":137005,"url":"https://patchwork.plctlab.org/api/1.2/patches/137005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828061701.466521-1-aldyh@redhat.com/","msgid":"<20230828061701.466521-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-08-28T06:16:31","name":"[COMMITTED,frange] Handle relations in LTGT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828061701.466521-1-aldyh@redhat.com/mbox/"},{"id":137007,"url":"https://patchwork.plctlab.org/api/1.2/patches/137007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828071421.2049438-1-juzhe.zhong@rivai.ai/","msgid":"<20230828071421.2049438-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T07:14:21","name":"[V2] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828071421.2049438-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137008,"url":"https://patchwork.plctlab.org/api/1.2/patches/137008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-2-gaofei@eswincomputing.com/","msgid":"<20230828074759.21049-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-28T07:47:58","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-2-gaofei@eswincomputing.com/mbox/"},{"id":137009,"url":"https://patchwork.plctlab.org/api/1.2/patches/137009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-3-gaofei@eswincomputing.com/","msgid":"<20230828074759.21049-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-28T07:47:59","name":"[2/2,V5,RISC-V] support cm.push cm.pop cm.popret in zcmp and resolve confilct with shrink-wrap-separate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828074759.21049-3-gaofei@eswincomputing.com/mbox/"},{"id":137012,"url":"https://patchwork.plctlab.org/api/1.2/patches/137012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828080749.2064182-1-juzhe.zhong@rivai.ai/","msgid":"<20230828080749.2064182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T08:07:49","name":"RISC-V: Disable user vsetvl fusion into EMPTY block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828080749.2064182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137016,"url":"https://patchwork.plctlab.org/api/1.2/patches/137016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240086D3865DD3F4F4D4F99E8E0A@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-08-28T09:35:00","name":"alias-analyis: try to find ADDR_EXPR for SSA_NAME ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240086D3865DD3F4F4D4F99E8E0A@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":137017,"url":"https://patchwork.plctlab.org/api/1.2/patches/137017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828095319.2083553-1-juzhe.zhong@rivai.ai/","msgid":"<20230828095319.2083553-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T09:53:19","name":"[V2] RISC-V: Disable user vsetvl fusion into EMPTY or DIRTY (Polluted EMPTY) block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828095319.2083553-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137018,"url":"https://patchwork.plctlab.org/api/1.2/patches/137018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828101619.3023065-1-juzhe.zhong@rivai.ai/","msgid":"<20230828101619.3023065-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T10:16:19","name":"[V3] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828101619.3023065-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137026,"url":"https://patchwork.plctlab.org/api/1.2/patches/137026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114005.2100796-1-juzhe.zhong@rivai.ai/","msgid":"<20230828114005.2100796-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T11:40:05","name":"RISC-V: Fix uninitialized probability for GIMPLE IR tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114005.2100796-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137027,"url":"https://patchwork.plctlab.org/api/1.2/patches/137027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114249.2917296-1-juzhe.zhong@rivai.ai/","msgid":"<20230828114249.2917296-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-28T11:42:49","name":"[V4] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828114249.2917296-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137037,"url":"https://patchwork.plctlab.org/api/1.2/patches/137037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyn+6C9ImVbp+TA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T13:58:19","name":"c++, v2: Fix up mangling of function/block scope static structured bindings and emit abi tags [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyn+6C9ImVbp+TA@tucnak/mbox/"},{"id":137038,"url":"https://patchwork.plctlab.org/api/1.2/patches/137038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyokMq0swI+Yqe6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T14:00:48","name":"libcpp, v2: Small incremental patch for P1854R4 [PR110341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOyokMq0swI+Yqe6@tucnak/mbox/"},{"id":137043,"url":"https://patchwork.plctlab.org/api/1.2/patches/137043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOywZN6bAUr/4nqK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-28T14:34:12","name":"[RFC] > WIDE_INT_MAX_PREC support in wide-int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZOywZN6bAUr/4nqK@tucnak/mbox/"},{"id":137044,"url":"https://patchwork.plctlab.org/api/1.2/patches/137044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828143744.7574-1-manos.anagnostakis@vrull.eu/","msgid":"<20230828143744.7574-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-08-28T14:37:44","name":"[v2] aarch64: Fine-grained ldp and stp policies with test-cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828143744.7574-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":137071,"url":"https://patchwork.plctlab.org/api/1.2/patches/137071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828190432.2530773-1-ewlu@rivosinc.com/","msgid":"<20230828190432.2530773-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-28T19:03:15","name":"RISC-V: Add Types to Un-Typed Vector Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828190432.2530773-1-ewlu@rivosinc.com/mbox/"},{"id":137076,"url":"https://patchwork.plctlab.org/api/1.2/patches/137076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828193053.3783698-1-apinski@marvell.com/","msgid":"<20230828193053.3783698-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T19:30:53","name":"Fix cond-bool-2.c on powerpc and other targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828193053.3783698-1-apinski@marvell.com/mbox/"},{"id":137077,"url":"https://patchwork.plctlab.org/api/1.2/patches/137077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com/","msgid":"<7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com>","list_archive_url":null,"date":"2023-08-28T20:00:48","name":"[ver,4] rs6000, add overloaded DFP quantize support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b79bbc4c465d22e565ec627ed379575bf9f7cf5.camel@us.ibm.com/mbox/"},{"id":137079,"url":"https://patchwork.plctlab.org/api/1.2/patches/137079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828201402.3786409-1-apinski@marvell.com/","msgid":"<20230828201402.3786409-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-28T20:14:02","name":"MATCH: Move `(x | y) & (~x ^ y)` over to use bitwise_inverted_equal_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230828201402.3786409-1-apinski@marvell.com/mbox/"},{"id":137089,"url":"https://patchwork.plctlab.org/api/1.2/patches/137089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO0syEImf05gXw9J@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-28T23:24:56","name":"[v2] c++: tweaks for explicit conversion fns diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO0syEImf05gXw9J@redhat.com/mbox/"},{"id":137091,"url":"https://patchwork.plctlab.org/api/1.2/patches/137091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023642.154907-1-juzhe.zhong@rivai.ai/","msgid":"<20230829023642.154907-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T02:36:42","name":"RISC-V: Fix AVL/VL get ICE[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023642.154907-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137092,"url":"https://patchwork.plctlab.org/api/1.2/patches/137092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023715.155656-1-lehua.ding@rivai.ai/","msgid":"<20230829023715.155656-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T02:37:15","name":"[COMMITTED,V3] RISC-V: Fix error combine of pred_mov pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829023715.155656-1-lehua.ding@rivai.ai/mbox/"},{"id":137093,"url":"https://patchwork.plctlab.org/api/1.2/patches/137093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com/","msgid":"<528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com>","list_archive_url":null,"date":"2023-08-29T02:50:08","name":"[rs6000] Call vector load/store with length expand only on 64-bit Power10 [PR96762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/528dd350-d75e-d0d8-0b91-326151b274e5@linux.ibm.com/mbox/"},{"id":137094,"url":"https://patchwork.plctlab.org/api/1.2/patches/137094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829032228.1277784-1-juzhe.zhong@rivai.ai/","msgid":"<20230829032228.1277784-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:22:28","name":"RISC-V: Fix ASM check of vlmax_switch_vtype-16.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829032228.1277784-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137095,"url":"https://patchwork.plctlab.org/api/1.2/patches/137095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d496232ba289fc98cac4fd7139f50826d6969548.1693279731.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T03:28:56","name":"[v2] RISC-V: Make PR 102957 tests more comprehensive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d496232ba289fc98cac4fd7139f50826d6969548.1693279731.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137096,"url":"https://patchwork.plctlab.org/api/1.2/patches/137096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com/","msgid":"<1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:31:02","name":"RISC-V: Make arch-24.c to test \"success\" case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1e91ef9370945db330e810de564b0e50cc53abe8.1693279787.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137097,"url":"https://patchwork.plctlab.org/api/1.2/patches/137097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"<19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:39:31","name":"[v3,1/3] RISC-V: Add stub support for existing extensions (privileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19d23833ccf469122fa93a35b7f1c369012034b2.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137098,"url":"https://patchwork.plctlab.org/api/1.2/patches/137098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e8da2e7c301dc17870b98c2684be1ace3a847a.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T03:39:32","name":"[v3,2/3] RISC-V: Add stub support for existing extensions (vendor)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e8e8da2e7c301dc17870b98c2684be1ace3a847a.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137099,"url":"https://patchwork.plctlab.org/api/1.2/patches/137099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com/","msgid":"<50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:39:33","name":"[v3,3/3] RISC-V: Add stub support for existing extensions (unprivileged)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137100,"url":"https://patchwork.plctlab.org/api/1.2/patches/137100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com/","msgid":"<1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-29T03:40:52","name":"[1/1] RISC-V: Imply '\''Zicsr'\'' from '\''Zcmt'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c4f3e947919e720c18e5af9ecc7b6b76e06611a.1693280446.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137101,"url":"https://patchwork.plctlab.org/api/1.2/patches/137101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034321.174885-1-lehua.ding@rivai.ai/","msgid":"<20230829034321.174885-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:43:21","name":"[V2] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034321.174885-1-lehua.ding@rivai.ai/mbox/"},{"id":137102,"url":"https://patchwork.plctlab.org/api/1.2/patches/137102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034522.175560-1-lehua.ding@rivai.ai/","msgid":"<20230829034522.175560-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-29T03:45:22","name":"[V3] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829034522.175560-1-lehua.ding@rivai.ai/mbox/"},{"id":137103,"url":"https://patchwork.plctlab.org/api/1.2/patches/137103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYYP286MB1473877CFCA93B60E1651C1BAEE7A@TYYP286MB1473.JPNP286.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-08-29T05:25:07","name":"doc: Add fpatchable-function-entry to Option-Summary page[PR110983]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/TYYP286MB1473877CFCA93B60E1651C1BAEE7A@TYYP286MB1473.JPNP286.PROD.OUTLOOK.COM/mbox/"},{"id":137105,"url":"https://patchwork.plctlab.org/api/1.2/patches/137105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829065102.3279474-1-juzhe.zhong@rivai.ai/","msgid":"<20230829065102.3279474-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T06:51:02","name":"vect test: Remove xfail for riscv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829065102.3279474-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137106,"url":"https://patchwork.plctlab.org/api/1.2/patches/137106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829075100.621-1-jinma@linux.alibaba.com/","msgid":"<20230829075100.621-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-08-29T07:51:00","name":"RISC-V: Added zvfh support for zfa extensions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829075100.621-1-jinma@linux.alibaba.com/mbox/"},{"id":137107,"url":"https://patchwork.plctlab.org/api/1.2/patches/137107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO2m/wC1le8HupRf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-29T08:06:23","name":"tree-ssa-math-opts: Improve uaddc/usubc pattern matching [PR111209]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO2m/wC1le8HupRf@tucnak/mbox/"},{"id":137109,"url":"https://patchwork.plctlab.org/api/1.2/patches/137109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-2-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:44","name":"[1/3,V6,RISC-V] support cm.push cm.pop cm.popret in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-2-gaofei@eswincomputing.com/mbox/"},{"id":137110,"url":"https://patchwork.plctlab.org/api/1.2/patches/137110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-3-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:45","name":"[2/3,V2,RISC-V] support cm.popretz in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-3-gaofei@eswincomputing.com/mbox/"},{"id":137108,"url":"https://patchwork.plctlab.org/api/1.2/patches/137108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-4-gaofei@eswincomputing.com/","msgid":"<20230829083746.1458-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-29T08:37:46","name":"[3/3,V2,RISC-V] support cm.mva01s cm.mvsa01 in zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829083746.1458-4-gaofei@eswincomputing.com/mbox/"},{"id":137111,"url":"https://patchwork.plctlab.org/api/1.2/patches/137111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829093933.515708-1-juzhe.zhong@rivai.ai/","msgid":"<20230829093933.515708-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T09:39:33","name":"RISC-V: Remove movmisalign pattern for VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829093933.515708-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137113,"url":"https://patchwork.plctlab.org/api/1.2/patches/137113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829100738.2479550-1-juzhe.zhong@rivai.ai/","msgid":"<20230829100738.2479550-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-29T10:07:38","name":"RISC-V: Enable movmisalign for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829100738.2479550-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137114,"url":"https://patchwork.plctlab.org/api/1.2/patches/137114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829104921.4117031-1-pan2.li@intel.com/","msgid":"<20230829104921.4117031-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-08-29T10:49:21","name":"[v1] RISC-V: Fix one ICE for vect test vect-multitypes-5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829104921.4117031-1-pan2.li@intel.com/mbox/"},{"id":137115,"url":"https://patchwork.plctlab.org/api/1.2/patches/137115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2242694d4f868ec04c9766878762c5b466b0670.1693308232.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T11:23:53","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2242694d4f868ec04c9766878762c5b466b0670.1693308232.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137116,"url":"https://patchwork.plctlab.org/api/1.2/patches/137116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a84c14b1b71f6976614db5d92d2dfadb@gcc.mail.kapsi.fi/","msgid":"","list_archive_url":null,"date":"2023-08-29T12:04:46","name":"libstdc++: Fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a84c14b1b71f6976614db5d92d2dfadb@gcc.mail.kapsi.fi/mbox/"},{"id":137117,"url":"https://patchwork.plctlab.org/api/1.2/patches/137117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO30PQql2TablzpJ@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-08-29T13:35:57","name":"c++: Check for indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO30PQql2TablzpJ@Thaum.localdomain/mbox/"},{"id":137118,"url":"https://patchwork.plctlab.org/api/1.2/patches/137118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829150223.3824839-1-dmalcolm@redhat.com/","msgid":"<20230829150223.3824839-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-29T15:02:23","name":"[pushed] analyzer: improve strdup handling [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829150223.3824839-1-dmalcolm@redhat.com/mbox/"},{"id":137121,"url":"https://patchwork.plctlab.org/api/1.2/patches/137121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpMKSj-yvpWP5fyDhSivkYSwnf4zG5FLZfQ82s0m0x4+w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T15:40:30","name":"RFC: RISC-V sign extension dead code elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpMKSj-yvpWP5fyDhSivkYSwnf4zG5FLZfQ82s0m0x4+w@mail.gmail.com/mbox/"},{"id":137120,"url":"https://patchwork.plctlab.org/api/1.2/patches/137120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm356emd.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T15:40:42","name":"attribs: Use existing traits for excl_hash_traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptpm356emd.fsf@arm.com/mbox/"},{"id":137122,"url":"https://patchwork.plctlab.org/api/1.2/patches/137122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8363377-75b2-ad5d-5388-54c585dfaf39@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T16:12:58","name":"OpenMP (C only): omp allocate - handle stack vars, improve diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f8363377-75b2-ad5d-5388-54c585dfaf39@codesourcery.com/mbox/"},{"id":137123,"url":"https://patchwork.plctlab.org/api/1.2/patches/137123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829172818.3264-1-ef2648@columbia.edu/","msgid":"<20230829172818.3264-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-08-29T17:28:18","name":"analyzer: implement reference count checking for CPython plugin [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829172818.3264-1-ef2648@columbia.edu/mbox/"},{"id":137124,"url":"https://patchwork.plctlab.org/api/1.2/patches/137124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829190156.56643-1-polacek@redhat.com/","msgid":"<20230829190156.56643-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-08-29T19:01:56","name":"c++: disallow constinit on functions [PR111173]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829190156.56643-1-polacek@redhat.com/mbox/"},{"id":137125,"url":"https://patchwork.plctlab.org/api/1.2/patches/137125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO5KI3AIKG9PDiEL@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T19:42:27","name":"RFC: Introduce -fhardened to enable security-related flags","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO5KI3AIKG9PDiEL@redhat.com/mbox/"},{"id":137126,"url":"https://patchwork.plctlab.org/api/1.2/patches/137126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829221757.3870381-1-dmalcolm@redhat.com/","msgid":"<20230829221757.3870381-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-08-29T22:17:57","name":"[pushed] analyzer: new warning: -Wanalyzer-overlapping-buffers [PR99860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230829221757.3870381-1-dmalcolm@redhat.com/mbox/"},{"id":137127,"url":"https://patchwork.plctlab.org/api/1.2/patches/137127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1a33efe-c43a-f4f5-ea04-38e60e4f9c83@ventanamicro.com/","msgid":"","list_archive_url":null,"date":"2023-08-29T23:02:27","name":"[committed] RISC-V: Use splitter to generate zicond in another case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b1a33efe-c43a-f4f5-ea04-38e60e4f9c83@ventanamicro.com/mbox/"},{"id":137129,"url":"https://patchwork.plctlab.org/api/1.2/patches/137129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830011256.1898667-1-yanzhang.wang@intel.com/","msgid":"<20230830011256.1898667-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-08-30T01:09:04","name":"Bug 111071: fix the subr with -1 to not due to the simplify.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830011256.1898667-1-yanzhang.wang@intel.com/mbox/"},{"id":137132,"url":"https://patchwork.plctlab.org/api/1.2/patches/137132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-2-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:43","name":"[V3,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-2-lehua.ding@rivai.ai/mbox/"},{"id":137134,"url":"https://patchwork.plctlab.org/api/1.2/patches/137134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-3-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:44","name":"[V3,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-3-lehua.ding@rivai.ai/mbox/"},{"id":137133,"url":"https://patchwork.plctlab.org/api/1.2/patches/137133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-4-lehua.ding@rivai.ai/","msgid":"<20230830015445.597055-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T01:54:45","name":"[V3,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015445.597055-4-lehua.ding@rivai.ai/mbox/"},{"id":137138,"url":"https://patchwork.plctlab.org/api/1.2/patches/137138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-2-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:05","name":"[v2,1/4] LoongArch: improved target configuration interface","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-2-yangyujie@loongson.cn/mbox/"},{"id":137137,"url":"https://patchwork.plctlab.org/api/1.2/patches/137137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-3-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:06","name":"[v2,2/4] LoongArch: define preprocessing macros \"__loongarch_{arch, tune}\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-3-yangyujie@loongson.cn/mbox/"},{"id":137136,"url":"https://patchwork.plctlab.org/api/1.2/patches/137136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-4-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:07","name":"[v2,3/4] LoongArch: add new configure option --with-strict-align-lib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-4-yangyujie@loongson.cn/mbox/"},{"id":137139,"url":"https://patchwork.plctlab.org/api/1.2/patches/137139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-5-yangyujie@loongson.cn/","msgid":"<20230830015808.19870-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-08-30T01:58:08","name":"[v2,4/4] LoongArch: support loongarch*-elf target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830015808.19870-5-yangyujie@loongson.cn/mbox/"},{"id":137140,"url":"https://patchwork.plctlab.org/api/1.2/patches/137140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830022211.2242563-1-juzhe.zhong@rivai.ai/","msgid":"<20230830022211.2242563-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T02:22:11","name":"RISC-V: Make sure we get VL REG operand for VLMAX vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830022211.2242563-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137142,"url":"https://patchwork.plctlab.org/api/1.2/patches/137142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830031201.1901364-1-juzhe.zhong@rivai.ai/","msgid":"<20230830031201.1901364-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T03:12:01","name":"middle-end: Apply MASK_LEN_LOAD_LANES/MASK_LEN_STORE_LANES to ivopts/alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830031201.1901364-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137143,"url":"https://patchwork.plctlab.org/api/1.2/patches/137143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830050307.20356-1-palmer@rivosinc.com/","msgid":"<20230830050307.20356-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-08-30T05:03:07","name":"RISC-V: Document some -march special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830050307.20356-1-palmer@rivosinc.com/mbox/"},{"id":137145,"url":"https://patchwork.plctlab.org/api/1.2/patches/137145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com/","msgid":"<2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-30T06:44:12","name":"[RFC] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adcf40a405ec562076e5cdbc185ff3b7ddd48da.1693377796.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137146,"url":"https://patchwork.plctlab.org/api/1.2/patches/137146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-1-guojiufu@linux.ibm.com/","msgid":"<20230830074314.1539093-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T07:43:13","name":"[V4,1/2] rs6000: optimize moving to sf from highpart di","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-1-guojiufu@linux.ibm.com/mbox/"},{"id":137147,"url":"https://patchwork.plctlab.org/api/1.2/patches/137147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-2-guojiufu@linux.ibm.com/","msgid":"<20230830074314.1539093-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T07:43:14","name":"[V4,2/2] rs6000: use mtvsrws to move sf from si p9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830074314.1539093-2-guojiufu@linux.ibm.com/mbox/"},{"id":137148,"url":"https://patchwork.plctlab.org/api/1.2/patches/137148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO72LPw2t5Kqbdh7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-30T07:56:28","name":"store-merging: Fix up >= 64 bit insertion [PR111015]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO72LPw2t5Kqbdh7@tucnak/mbox/"},{"id":137149,"url":"https://patchwork.plctlab.org/api/1.2/patches/137149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830075653.356338-1-juzhe.zhong@rivai.ai/","msgid":"<20230830075653.356338-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T07:56:53","name":"[V5] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830075653.356338-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137150,"url":"https://patchwork.plctlab.org/api/1.2/patches/137150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830083403.3190749-1-juzhe.zhong@rivai.ai/","msgid":"<20230830083403.3190749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T08:34:03","name":"test: Add xfail for riscv_vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830083403.3190749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137151,"url":"https://patchwork.plctlab.org/api/1.2/patches/137151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO8AwqFXrkBrCAOV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-30T08:41:38","name":"tree-ssa-strlen: Fix up handling of conditionally zero memcpy [PR110914]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZO8AwqFXrkBrCAOV@tucnak/mbox/"},{"id":137152,"url":"https://patchwork.plctlab.org/api/1.2/patches/137152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830084444.869230-1-hongtao.liu@intel.com/","msgid":"<20230830084444.869230-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-30T08:44:44","name":"Refactor vector HF/BF mode iterators and patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830084444.869230-1-hongtao.liu@intel.com/mbox/"},{"id":137153,"url":"https://patchwork.plctlab.org/api/1.2/patches/137153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com/","msgid":"<9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com>","list_archive_url":null,"date":"2023-08-30T09:06:17","name":"[1/8] parloops: Copy target and optimizations when creating a function clone","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9c15446b-1f4d-62d7-9427-a19eb07ac8ee@arm.com/mbox/"},{"id":137154,"url":"https://patchwork.plctlab.org/api/1.2/patches/137154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com/","msgid":"<0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com>","list_archive_url":null,"date":"2023-08-30T09:08:27","name":"[2/8] parloops: Allow poly nit and bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0942baa7-f186-4d0b-f556-3b8f926a24ad@arm.com/mbox/"},{"id":137155,"url":"https://patchwork.plctlab.org/api/1.2/patches/137155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com/","msgid":"<6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com>","list_archive_url":null,"date":"2023-08-30T09:10:10","name":"[3/8] vect: Fix vect_get_smallest_scalar_type for simd clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6adafeff-e026-aec9-2b1a-8a5f736f813d@arm.com/mbox/"},{"id":137156,"url":"https://patchwork.plctlab.org/api/1.2/patches/137156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49eca251-630e-b26c-5d66-4f8b322ee801@arm.com/","msgid":"<49eca251-630e-b26c-5d66-4f8b322ee801@arm.com>","list_archive_url":null,"date":"2023-08-30T09:11:55","name":"[4/8] vect: don'\''t allow fully masked loops with non-masked simd clones [PR 110485]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49eca251-630e-b26c-5d66-4f8b322ee801@arm.com/mbox/"},{"id":137157,"url":"https://patchwork.plctlab.org/api/1.2/patches/137157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d96af71e-d8e8-0bff-d502-5e54768ac774@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T09:13:27","name":"[5/8] vect: Use inbranch simdclones in masked loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d96af71e-d8e8-0bff-d502-5e54768ac774@arm.com/mbox/"},{"id":137158,"url":"https://patchwork.plctlab.org/api/1.2/patches/137158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com/","msgid":"<4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com>","list_archive_url":null,"date":"2023-08-30T09:14:38","name":"[6/8] vect: Add vector_mode paramater to simd_clone_usable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com/mbox/"},{"id":137159,"url":"https://patchwork.plctlab.org/api/1.2/patches/137159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a65c1f78-1159-d6df-c355-d6f92032ccd2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T09:17:39","name":"[PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a65c1f78-1159-d6df-c355-d6f92032ccd2@arm.com/mbox/"},{"id":137160,"url":"https://patchwork.plctlab.org/api/1.2/patches/137160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com/","msgid":"<25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com>","list_archive_url":null,"date":"2023-08-30T09:19:46","name":"[8/8] aarch64: Add SVE support for simd clones [PR 96342]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/25cccf6c-1b3c-a032-7930-aba25a311dca@arm.com/mbox/"},{"id":137161,"url":"https://patchwork.plctlab.org/api/1.2/patches/137161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095134.3571077-1-lehua.ding@rivai.ai/","msgid":"<20230830095134.3571077-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T09:51:34","name":"RISC-V: Fix vsetvl pass ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095134.3571077-1-lehua.ding@rivai.ai/mbox/"},{"id":137162,"url":"https://patchwork.plctlab.org/api/1.2/patches/137162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095253.3571536-1-juzhe.zhong@rivai.ai/","msgid":"<20230830095253.3571536-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T09:52:53","name":"test: Fix XPASS of RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830095253.3571536-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137163,"url":"https://patchwork.plctlab.org/api/1.2/patches/137163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-2-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-2-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:57","name":"[v3,1/4] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-2-manolis.tsamis@vrull.eu/mbox/"},{"id":137164,"url":"https://patchwork.plctlab.org/api/1.2/patches/137164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-3-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-3-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:58","name":"[v3,2/4] ifcvt: Allow more operations in multiple set if conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-3-manolis.tsamis@vrull.eu/mbox/"},{"id":137166,"url":"https://patchwork.plctlab.org/api/1.2/patches/137166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-4-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-4-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:13:59","name":"[v3,3/4] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-4-manolis.tsamis@vrull.eu/mbox/"},{"id":137165,"url":"https://patchwork.plctlab.org/api/1.2/patches/137165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-5-manolis.tsamis@vrull.eu/","msgid":"<20230830101400.1539313-5-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-08-30T10:14:00","name":"[v3,4/4] ifcvt: Remove obsolete code for subreg handling in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830101400.1539313-5-manolis.tsamis@vrull.eu/mbox/"},{"id":137167,"url":"https://patchwork.plctlab.org/api/1.2/patches/137167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830103516.882926-1-hongtao.liu@intel.com/","msgid":"<20230830103516.882926-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-08-30T10:35:16","name":"Adjust costing of emulated vectorized gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830103516.882926-1-hongtao.liu@intel.com/mbox/"},{"id":137168,"url":"https://patchwork.plctlab.org/api/1.2/patches/137168/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830111835.1288365-1-juzhe.zhong@rivai.ai/","msgid":"<20230830111835.1288365-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:18:35","name":"test: Adapt slp-26.c check for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830111835.1288365-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137169,"url":"https://patchwork.plctlab.org/api/1.2/patches/137169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830114941.1294882-1-juzhe.zhong@rivai.ai/","msgid":"<20230830114941.1294882-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:49:41","name":"test: Add xfail into slp-reduc-7.c for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830114941.1294882-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137170,"url":"https://patchwork.plctlab.org/api/1.2/patches/137170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115327.1296036-1-lehua.ding@rivai.ai/","msgid":"<20230830115327.1296036-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-30T11:53:27","name":"RISC-V: Refactor and clean emit_{vlmax, nonvlmax}_xxx functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115327.1296036-1-lehua.ding@rivai.ai/mbox/"},{"id":137171,"url":"https://patchwork.plctlab.org/api/1.2/patches/137171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115447.3E5611353E@imap2.suse-dmz.suse.de/","msgid":"<20230830115447.3E5611353E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-08-30T11:54:46","name":"tree-optimization/111228 - combine two VEC_PERM_EXPRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830115447.3E5611353E@imap2.suse-dmz.suse.de/mbox/"},{"id":137172,"url":"https://patchwork.plctlab.org/api/1.2/patches/137172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830120549.1628109-1-juzhe.zhong@rivai.ai/","msgid":"<20230830120549.1628109-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-30T12:05:49","name":"[V6] RISC-V: Enable vec_int testsuite for RVV VLA vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830120549.1628109-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137173,"url":"https://patchwork.plctlab.org/api/1.2/patches/137173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e52abe71-2364-32e7-d29a-dc05452a06f5@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-30T12:22:13","name":"expmed: Allow extract_bit_field via mem for low-precision modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e52abe71-2364-32e7-d29a-dc05452a06f5@gmail.com/mbox/"},{"id":137194,"url":"https://patchwork.plctlab.org/api/1.2/patches/137194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830190646.969939-1-dimitar@dinux.eu/","msgid":"<20230830190646.969939-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-08-30T19:06:46","name":"[committed] pru: Add cstore expansion patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830190646.969939-1-dimitar@dinux.eu/mbox/"},{"id":137215,"url":"https://patchwork.plctlab.org/api/1.2/patches/137215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830215708.369610-1-vineetg@rivosinc.com/","msgid":"<20230830215708.369610-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-08-30T21:57:08","name":"RISC-V: zicond: remove bogus opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830215708.369610-1-vineetg@rivosinc.com/mbox/"},{"id":137216,"url":"https://patchwork.plctlab.org/api/1.2/patches/137216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830222511.685346-1-apinski@marvell.com/","msgid":"<20230830222511.685346-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-30T22:25:11","name":"MATCH: extend min_value/max_value match to vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230830222511.685346-1-apinski@marvell.com/mbox/"},{"id":137217,"url":"https://patchwork.plctlab.org/api/1.2/patches/137217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com/","msgid":"<36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com>","list_archive_url":null,"date":"2023-08-30T22:42:50","name":"rs6000: Update instruction counts to match vec_* calls [PR111228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36198454-b68c-5f9d-3248-5dcfcd8eae1b@linux.ibm.com/mbox/"},{"id":137218,"url":"https://patchwork.plctlab.org/api/1.2/patches/137218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com/","msgid":"<2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-08-30T22:54:57","name":"[RFC,v2,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2bcc867d332705a317d7a33c77ff65b8e1fcecc4.1693436086.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137221,"url":"https://patchwork.plctlab.org/api/1.2/patches/137221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831024657.57063-1-chenxiaolong@loongson.cn/","msgid":"<20230831024657.57063-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-31T02:46:57","name":"[v4] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831024657.57063-1-chenxiaolong@loongson.cn/mbox/"},{"id":137225,"url":"https://patchwork.plctlab.org/api/1.2/patches/137225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831033113.28028-1-wangfeng@eswincomputing.com/","msgid":"<20230831033113.28028-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T03:31:13","name":"[v2] RISC-V: Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831033113.28028-1-wangfeng@eswincomputing.com/mbox/"},{"id":137226,"url":"https://patchwork.plctlab.org/api/1.2/patches/137226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831050132.733545-1-claziss@gmail.com/","msgid":"<20230831050132.733545-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-08-31T05:01:32","name":"[committed] arc: Honor SWAP option for lsl16 instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831050132.733545-1-claziss@gmail.com/mbox/"},{"id":137230,"url":"https://patchwork.plctlab.org/api/1.2/patches/137230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b_iIXwWwO63ZE1ZSZHUIAdWyA2sqGsE3FM7eXfsInWogDyBZRsw8CwNsvFSDmEVmBtdq0pqb4zJ55HN2JCR7boDNramlEfne-R5PWdUXjbA=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T06:02:36","name":"[1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b_iIXwWwO63ZE1ZSZHUIAdWyA2sqGsE3FM7eXfsInWogDyBZRsw8CwNsvFSDmEVmBtdq0pqb4zJ55HN2JCR7boDNramlEfne-R5PWdUXjbA=@protonmail.com/mbox/"},{"id":137231,"url":"https://patchwork.plctlab.org/api/1.2/patches/137231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-2-gaofei@eswincomputing.com/","msgid":"<20230831062402.6810-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T06:24:01","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-2-gaofei@eswincomputing.com/mbox/"},{"id":137232,"url":"https://patchwork.plctlab.org/api/1.2/patches/137232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-3-gaofei@eswincomputing.com/","msgid":"<20230831062402.6810-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-08-31T06:24:02","name":"[2/2,RISC-V] Enalble zcmp for -Os","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831062402.6810-3-gaofei@eswincomputing.com/mbox/"},{"id":137233,"url":"https://patchwork.plctlab.org/api/1.2/patches/137233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com/","msgid":"<1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com>","list_archive_url":null,"date":"2023-08-31T06:46:58","name":"[2/2] c++: Extended diagnostics for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1xDDGk_jeMvdx0yPQAJHLLCzkYYCTdAk2f11ONoe0TAT4MBfhz7MeJnVZcuTwFFR7_CtGNiknplSXIjf8sjogjaYbJNmgXh9M60EC7-DgN0=@protonmail.com/mbox/"},{"id":137234,"url":"https://patchwork.plctlab.org/api/1.2/patches/137234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831070257.16848-1-chenxiaolong@loongson.cn/","msgid":"<20230831070257.16848-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-08-31T07:02:57","name":"[v5] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831070257.16848-1-chenxiaolong@loongson.cn/mbox/"},{"id":137235,"url":"https://patchwork.plctlab.org/api/1.2/patches/137235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPA/L5yBEUC3WZxu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T07:20:15","name":"c++: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPA/L5yBEUC3WZxu@tucnak/mbox/"},{"id":137236,"url":"https://patchwork.plctlab.org/api/1.2/patches/137236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPBKZyVxYKhGMBVY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T08:08:07","name":"[RFC] c++: Diagnose [basic.scope.block]/2 violations even for block externs [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPBKZyVxYKhGMBVY@tucnak/mbox/"},{"id":137241,"url":"https://patchwork.plctlab.org/api/1.2/patches/137241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-2-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:12","name":"[01/13,APX,EGPR] middle-end: Add insn argument to base_reg_class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-2-hongyu.wang@intel.com/mbox/"},{"id":137237,"url":"https://patchwork.plctlab.org/api/1.2/patches/137237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-3-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:13","name":"[02/13,APX,EGPR] middle-end: Add index_reg_class with insn argument.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-3-hongyu.wang@intel.com/mbox/"},{"id":137240,"url":"https://patchwork.plctlab.org/api/1.2/patches/137240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-4-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:14","name":"[03/13,APX_EGPR] Initial support for APX_F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-4-hongyu.wang@intel.com/mbox/"},{"id":137245,"url":"https://patchwork.plctlab.org/api/1.2/patches/137245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-5-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:15","name":"[04/13,APX,EGPR] Add 16 new integer general purpose registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-5-hongyu.wang@intel.com/mbox/"},{"id":137243,"url":"https://patchwork.plctlab.org/api/1.2/patches/137243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-6-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:16","name":"[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-6-hongyu.wang@intel.com/mbox/"},{"id":137239,"url":"https://patchwork.plctlab.org/api/1.2/patches/137239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-7-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:17","name":"[06/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-7-hongyu.wang@intel.com/mbox/"},{"id":137244,"url":"https://patchwork.plctlab.org/api/1.2/patches/137244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-8-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:18","name":"[07/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-8-hongyu.wang@intel.com/mbox/"},{"id":137238,"url":"https://patchwork.plctlab.org/api/1.2/patches/137238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-9-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:19","name":"[08/13,APX,EGPR] Handle GPR16 only vector move insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-9-hongyu.wang@intel.com/mbox/"},{"id":137246,"url":"https://patchwork.plctlab.org/api/1.2/patches/137246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-10-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:20","name":"[09/13,APX,EGPR] Handle legacy insn that only support GPR16 (1/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-10-hongyu.wang@intel.com/mbox/"},{"id":137247,"url":"https://patchwork.plctlab.org/api/1.2/patches/137247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-11-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:21","name":"[10/13,APX,EGPR] Handle legacy insns that only support GPR16 (2/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-11-hongyu.wang@intel.com/mbox/"},{"id":137242,"url":"https://patchwork.plctlab.org/api/1.2/patches/137242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-12-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:22","name":"[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-12-hongyu.wang@intel.com/mbox/"},{"id":137248,"url":"https://patchwork.plctlab.org/api/1.2/patches/137248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-13-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:23","name":"[12/13,APX_EGPR] Handle legacy insns that only support GPR16 (4/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-13-hongyu.wang@intel.com/mbox/"},{"id":137249,"url":"https://patchwork.plctlab.org/api/1.2/patches/137249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-14-hongyu.wang@intel.com/","msgid":"<20230831082024.314097-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-08-31T08:20:24","name":"[13/13,APX,EGPR] Handle vex insns that only support GPR16 (5/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831082024.314097-14-hongyu.wang@intel.com/mbox/"},{"id":137252,"url":"https://patchwork.plctlab.org/api/1.2/patches/137252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090547.71737-1-kito.cheng@sifive.com/","msgid":"<20230831090547.71737-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-08-31T09:05:47","name":"RISC-V: Emit .note.GNU-stack for non-linux target as well","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090547.71737-1-kito.cheng@sifive.com/mbox/"},{"id":137253,"url":"https://patchwork.plctlab.org/api/1.2/patches/137253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090621.2687116-1-lehua.ding@rivai.ai/","msgid":"<20230831090621.2687116-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-08-31T09:06:21","name":"RISC-V: Change vsetvl tail and mask policy to default policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090621.2687116-1-lehua.ding@rivai.ai/mbox/"},{"id":137254,"url":"https://patchwork.plctlab.org/api/1.2/patches/137254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-3-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-3-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:15","name":"[v6,2/4] LoongArch: Add Loongson SX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-3-panchenghui@loongson.cn/mbox/"},{"id":137255,"url":"https://patchwork.plctlab.org/api/1.2/patches/137255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-4-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-4-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:16","name":"[v6,3/4] LoongArch: Add Loongson ASX base instruction support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-4-panchenghui@loongson.cn/mbox/"},{"id":137256,"url":"https://patchwork.plctlab.org/api/1.2/patches/137256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-5-panchenghui@loongson.cn/","msgid":"<20230831090817.30636-5-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-08-31T09:08:17","name":"[v6,4/4] LoongArch: Add Loongson ASX directive builtin function support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831090817.30636-5-panchenghui@loongson.cn/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/mbox/"},{"id":30,"url":"https://patchwork.plctlab.org/api/1.2/bundles/30/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-09/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-09","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":137303,"url":"https://patchwork.plctlab.org/api/1.2/patches/137303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedjjz1hs.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:15:59","name":"aarch64: Fix return register handling in untyped_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedjjz1hs.fsf@arm.com/mbox/"},{"id":137305,"url":"https://patchwork.plctlab.org/api/1.2/patches/137305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qfjz13s.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:24:23","name":"lra: Avoid unfolded plus-0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qfjz13s.fsf@arm.com/mbox/"},{"id":137307,"url":"https://patchwork.plctlab.org/api/1.2/patches/137307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPS5khaviCHFDt8SNrL3GRy6WKmTSUW4PRBAhVAZ5LzkSqk47w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-31T15:25:45","name":"libstdc++: Use GLIBCXX_CHECK_LINKER_FEATURES for cross-builds (PR111238)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPS5khaviCHFDt8SNrL3GRy6WKmTSUW4PRBAhVAZ5LzkSqk47w@mail.gmail.com/mbox/"},{"id":137328,"url":"https://patchwork.plctlab.org/api/1.2/patches/137328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831172410.731800-1-apinski@marvell.com/","msgid":"<20230831172410.731800-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-08-31T17:24:10","name":"MATCH [PR19832]: Optimize some `(a != b) ? a OP b : c`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831172410.731800-1-apinski@marvell.com/mbox/"},{"id":137331,"url":"https://patchwork.plctlab.org/api/1.2/patches/137331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173218.583040-1-ewlu@rivosinc.com/","msgid":"<20230831173218.583040-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T17:32:01","name":"RISC-V: Add Types to Un-Typed Risc-v Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173218.583040-1-ewlu@rivosinc.com/mbox/"},{"id":137332,"url":"https://patchwork.plctlab.org/api/1.2/patches/137332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173637.583424-1-ewlu@rivosinc.com/","msgid":"<20230831173637.583424-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T17:36:26","name":"RISC-V Add Types to Un-Typed Thead Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831173637.583424-1-ewlu@rivosinc.com/mbox/"},{"id":137338,"url":"https://patchwork.plctlab.org/api/1.2/patches/137338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPDmi9mJYR6l8cJx@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-31T19:14:19","name":"c++, v3: Fix up mangling of function/block scope static structured bindings and emit abi tags [PR111069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPDmi9mJYR6l8cJx@tucnak/mbox/"},{"id":137347,"url":"https://patchwork.plctlab.org/api/1.2/patches/137347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b7254ea8-17ae-420c-8b4a-756e3fe2a5f1-1693514575672@3c-app-gmx-bap28/","msgid":"","list_archive_url":null,"date":"2023-08-31T20:42:55","name":"Fortran: runtime bounds-checking in presence of array constructors [PR31059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-b7254ea8-17ae-420c-8b4a-756e3fe2a5f1-1693514575672@3c-app-gmx-bap28/mbox/"},{"id":137353,"url":"https://patchwork.plctlab.org/api/1.2/patches/137353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831220452.3126200-1-vultkayn@gcc.gnu.org/","msgid":"<20230831220452.3126200-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-08-31T22:04:53","name":"analyzer: Add support of placement new and improved operator new [PR105948, PR94355]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831220452.3126200-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137361,"url":"https://patchwork.plctlab.org/api/1.2/patches/137361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831235713.1673863-1-ewlu@rivosinc.com/","msgid":"<20230831235713.1673863-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-08-31T23:01:43","name":"Add Types to Un-Typed Pic Instructions:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831235713.1673863-1-ewlu@rivosinc.com/mbox/"},{"id":137359,"url":"https://patchwork.plctlab.org/api/1.2/patches/137359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231000.1853225-1-juzhe.zhong@rivai.ai/","msgid":"<20230831231000.1853225-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-31T23:10:00","name":"RISC-V: Enable VECT_COMPARE_COSTS by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231000.1853225-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137360,"url":"https://patchwork.plctlab.org/api/1.2/patches/137360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231217.1853555-1-juzhe.zhong@rivai.ai/","msgid":"<20230831231217.1853555-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-08-31T23:12:17","name":"RISC-V: Add dynamic LMUL compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230831231217.1853555-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137362,"url":"https://patchwork.plctlab.org/api/1.2/patches/137362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901022632.754088-1-apinski@marvell.com/","msgid":"<20230901022632.754088-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T02:26:32","name":"MATCH: `(nop_convert)-a` into -(nop_convert)a if the negate is single use and a is known not to be signed min value","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901022632.754088-1-apinski@marvell.com/mbox/"},{"id":137365,"url":"https://patchwork.plctlab.org/api/1.2/patches/137365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901032242.57839-1-chenxiaolong@loongson.cn/","msgid":"<20230901032242.57839-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-01T03:22:42","name":"[v6] LoongArch:Implement 128-bit floating point functions in gcc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901032242.57839-1-chenxiaolong@loongson.cn/mbox/"},{"id":137366,"url":"https://patchwork.plctlab.org/api/1.2/patches/137366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901033332.1774189-1-pan2.li@intel.com/","msgid":"<20230901033332.1774189-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-01T03:33:32","name":"[v1] RISC-V: Support FP ADD/SUB/MUL/DIV autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901033332.1774189-1-pan2.li@intel.com/mbox/"},{"id":137369,"url":"https://patchwork.plctlab.org/api/1.2/patches/137369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-2-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:48","name":"[1/4] RISC-V: Adjust expand_cond_len_{unary,binop,op} api","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-2-lehua.ding@rivai.ai/mbox/"},{"id":137370,"url":"https://patchwork.plctlab.org/api/1.2/patches/137370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-3-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:49","name":"[2/4] RISC-V: Add conditional autovec convert(INT<->INT) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-3-lehua.ding@rivai.ai/mbox/"},{"id":137371,"url":"https://patchwork.plctlab.org/api/1.2/patches/137371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-4-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:50","name":"[3/4] RISC-V: Add conditional autovec convert(FP<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-4-lehua.ding@rivai.ai/mbox/"},{"id":137372,"url":"https://patchwork.plctlab.org/api/1.2/patches/137372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-5-lehua.ding@rivai.ai/","msgid":"<20230901054551.1953049-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-01T05:45:51","name":"[4/4] RISC-V: Add conditional autovec convert(INT<->FP) patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901054551.1953049-5-lehua.ding@rivai.ai/mbox/"},{"id":137375,"url":"https://patchwork.plctlab.org/api/1.2/patches/137375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901091731.710880-1-guojiufu@linux.ibm.com/","msgid":"<20230901091731.710880-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-01T09:17:31","name":"[V6] Optimize '\''(X - N * M) / N'\'' to '\''X / N - M'\'' if valid","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901091731.710880-1-guojiufu@linux.ibm.com/mbox/"},{"id":137376,"url":"https://patchwork.plctlab.org/api/1.2/patches/137376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c7fff1-1372-98c2-bada-3e732177262e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-01T09:55:55","name":"RISC-V: Add vec_extract for BI -> QI.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c7fff1-1372-98c2-bada-3e732177262e@gmail.com/mbox/"},{"id":137377,"url":"https://patchwork.plctlab.org/api/1.2/patches/137377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901102006.511665-1-christoph.muellner@vrull.eu/","msgid":"<20230901102006.511665-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-01T10:20:06","name":"riscv: xtheadcondmov: Don'\''t run tests with -Oz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901102006.511665-1-christoph.muellner@vrull.eu/mbox/"},{"id":137379,"url":"https://patchwork.plctlab.org/api/1.2/patches/137379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105513.226352-1-jwakely@redhat.com/","msgid":"<20230901105513.226352-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:00","name":"[committed] libstdc++: Simplify __format::_Sink::_M_reset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105513.226352-1-jwakely@redhat.com/mbox/"},{"id":137378,"url":"https://patchwork.plctlab.org/api/1.2/patches/137378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105519.226612-1-jwakely@redhat.com/","msgid":"<20230901105519.226612-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:15","name":"[committed] libstdc++: Do not allow chrono::parse to overflow for %C [PR111162]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105519.226612-1-jwakely@redhat.com/mbox/"},{"id":137380,"url":"https://patchwork.plctlab.org/api/1.2/patches/137380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105526.226787-1-jwakely@redhat.com/","msgid":"<20230901105526.226787-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T10:55:20","name":"[committed] libstdc++: Fix how chrono::parse handles errors for time-of-day values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901105526.226787-1-jwakely@redhat.com/mbox/"},{"id":137381,"url":"https://patchwork.plctlab.org/api/1.2/patches/137381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111713.229441-1-jwakely@redhat.com/","msgid":"<20230901111713.229441-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T11:16:53","name":"[committed] libstdc++: Avoid useless dependency on read_symlink from tzdb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111713.229441-1-jwakely@redhat.com/mbox/"},{"id":137382,"url":"https://patchwork.plctlab.org/api/1.2/patches/137382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111722.229474-1-jwakely@redhat.com/","msgid":"<20230901111722.229474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T11:17:14","name":"[committed] libstdc++: Use dg-require-filesystem-ts in link test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901111722.229474-1-jwakely@redhat.com/mbox/"},{"id":137383,"url":"https://patchwork.plctlab.org/api/1.2/patches/137383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-1-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:07","name":"[v5,1/4] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-1-kmatsui@gcc.gnu.org/mbox/"},{"id":137384,"url":"https://patchwork.plctlab.org/api/1.2/patches/137384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-2-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:08","name":"[v5,2/4] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137385,"url":"https://patchwork.plctlab.org/api/1.2/patches/137385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-3-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:09","name":"[v5,3/4] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137386,"url":"https://patchwork.plctlab.org/api/1.2/patches/137386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-4-kmatsui@gcc.gnu.org/","msgid":"<20230901112510.1562-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T11:25:10","name":"[v5,4/4] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901112510.1562-4-kmatsui@gcc.gnu.org/mbox/"},{"id":137387,"url":"https://patchwork.plctlab.org/api/1.2/patches/137387/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHXiqquRCNCREoX@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:22:34","name":"[v2] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHXiqquRCNCREoX@Thaum.localdomain/mbox/"},{"id":137388,"url":"https://patchwork.plctlab.org/api/1.2/patches/137388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYXvh9dleHKnOR@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:26:06","name":"[committed] testsuite: Fix up pr110915* tests on i686-linux [PR110915]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYXvh9dleHKnOR@tucnak/mbox/"},{"id":137389,"url":"https://patchwork.plctlab.org/api/1.2/patches/137389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYujtfjzFl2xR6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:27:38","name":"[committed] testsuite: Fix vectcond-1.C FAIL on i686-linux [PR19832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHYujtfjzFl2xR6@tucnak/mbox/"},{"id":137392,"url":"https://patchwork.plctlab.org/api/1.2/patches/137392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17716-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-01T12:55:03","name":"AArch64 xorsign: Fix scalar xorsign lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17716-tamar@arm.com/mbox/"},{"id":137393,"url":"https://patchwork.plctlab.org/api/1.2/patches/137393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-2-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:01","name":"[v8,1/4] spec: add a spec function to join arguments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-2-ben.boeckel@kitware.com/mbox/"},{"id":137395,"url":"https://patchwork.plctlab.org/api/1.2/patches/137395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-3-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-3-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:02","name":"[v8,2/4] p1689r5: initial support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-3-ben.boeckel@kitware.com/mbox/"},{"id":137394,"url":"https://patchwork.plctlab.org/api/1.2/patches/137394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-4-ben.boeckel@kitware.com/","msgid":"<20230901130407.259768-4-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-09-01T13:04:03","name":"[v8,3/4] c++modules: report imported CMI files as dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901130407.259768-4-ben.boeckel@kitware.com/mbox/"},{"id":137396,"url":"https://patchwork.plctlab.org/api/1.2/patches/137396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHmJl9P/CX5JViM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T13:24:54","name":"c++, v2: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHmJl9P/CX5JViM@tucnak/mbox/"},{"id":137397,"url":"https://patchwork.plctlab.org/api/1.2/patches/137397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHoWgZhqZFQP8cX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T13:34:18","name":"c++, v2: Diagnose [basic.scope.block]/2 violations even for block externs [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPHoWgZhqZFQP8cX@tucnak/mbox/"},{"id":137399,"url":"https://patchwork.plctlab.org/api/1.2/patches/137399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPH2dPVbDTDFSBpr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-01T14:34:28","name":"c++, v3: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPH2dPVbDTDFSBpr@tucnak/mbox/"},{"id":137400,"url":"https://patchwork.plctlab.org/api/1.2/patches/137400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150244.253651-1-jwakely@redhat.com/","msgid":"<20230901150244.253651-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T15:02:19","name":"[committed] libstdc++: Use a loop in atomic_ref::compare_exchange_strong [PR111077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150244.253651-1-jwakely@redhat.com/mbox/"},{"id":137401,"url":"https://patchwork.plctlab.org/api/1.2/patches/137401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150253.253679-1-jwakely@redhat.com/","msgid":"<20230901150253.253679-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T15:02:45","name":"[committed] libstdc++: Use std::string::__resize_and_overwrite in std::filesystem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901150253.253679-1-jwakely@redhat.com/mbox/"},{"id":137402,"url":"https://patchwork.plctlab.org/api/1.2/patches/137402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165608.283038-1-jwakely@redhat.com/","msgid":"<20230901165608.283038-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T16:55:51","name":"[committed] libstdc++: Add -Wno-self-move to two filesystem tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165608.283038-1-jwakely@redhat.com/mbox/"},{"id":137403,"url":"https://patchwork.plctlab.org/api/1.2/patches/137403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165613.283062-1-jwakely@redhat.com/","msgid":"<20230901165613.283062-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-01T16:56:09","name":"[committed] libstdc++: Fix debug-mode tests for constexpr algorithms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901165613.283062-1-jwakely@redhat.com/mbox/"},{"id":137404,"url":"https://patchwork.plctlab.org/api/1.2/patches/137404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901172348.445289-1-polacek@redhat.com/","msgid":"<20230901172348.445289-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-01T17:23:48","name":"c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901172348.445289-1-polacek@redhat.com/mbox/"},{"id":137405,"url":"https://patchwork.plctlab.org/api/1.2/patches/137405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-1-apinski@marvell.com/","msgid":"<20230901173059.791894-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T17:30:58","name":"[1/2] VR-VALUES: Rename op0/op1 to op1/op2 for test_for_singularity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-1-apinski@marvell.com/mbox/"},{"id":137406,"url":"https://patchwork.plctlab.org/api/1.2/patches/137406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-2-apinski@marvell.com/","msgid":"<20230901173059.791894-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-01T17:30:59","name":"[2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901173059.791894-2-apinski@marvell.com/mbox/"},{"id":137407,"url":"https://patchwork.plctlab.org/api/1.2/patches/137407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901185011.154880-1-someguy@effective-light.com/","msgid":"<20230901185011.154880-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-01T18:50:11","name":"c: don'\''t emit -Wmissing-variable-declarations for register variables [PR110947]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901185011.154880-1-someguy@effective-light.com/mbox/"},{"id":137408,"url":"https://patchwork.plctlab.org/api/1.2/patches/137408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901190241.157034-1-someguy@effective-light.com/","msgid":"<20230901190241.157034-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-01T19:02:41","name":"[v2] c: don'\''t emit -Wmissing-variable-declarations for register variables [PR110947]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901190241.157034-1-someguy@effective-light.com/mbox/"},{"id":137409,"url":"https://patchwork.plctlab.org/api/1.2/patches/137409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901191654.320202-1-mikael@gcc.gnu.org/","msgid":"<20230901191654.320202-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T19:16:54","name":"diagnostics: Delete config pointer before overwriting it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901191654.320202-1-mikael@gcc.gnu.org/mbox/"},{"id":137410,"url":"https://patchwork.plctlab.org/api/1.2/patches/137410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195311.761131-1-vineetg@rivosinc.com/","msgid":"<20230901195311.761131-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-09-01T19:53:11","name":"[v2] RISC-V: zicond: Fix opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195311.761131-1-vineetg@rivosinc.com/mbox/"},{"id":137411,"url":"https://patchwork.plctlab.org/api/1.2/patches/137411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195905.2800474-1-vultkayn@gcc.gnu.org/","msgid":"<20230901195905.2800474-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-01T19:59:06","name":"analyzer: call off a superseding when diagnostics are unrelated [PR110830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901195905.2800474-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137413,"url":"https://patchwork.plctlab.org/api/1.2/patches/137413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901225329.6C62533E60@hamza.pair.com/","msgid":"<20230901225329.6C62533E60@hamza.pair.com>","list_archive_url":null,"date":"2023-09-01T22:53:27","name":"[pushed] wwwdocs: gcc-12: Improve language around vectorizer and -O2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230901225329.6C62533E60@hamza.pair.com/mbox/"},{"id":137414,"url":"https://patchwork.plctlab.org/api/1.2/patches/137414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902000001.873118-1-polacek@redhat.com/","msgid":"<20230902000001.873118-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-02T00:00:01","name":"c++: improve verify_constant diagnostic [PR91483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902000001.873118-1-polacek@redhat.com/mbox/"},{"id":137415,"url":"https://patchwork.plctlab.org/api/1.2/patches/137415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902023238.814338-1-apinski@marvell.com/","msgid":"<20230902023238.814338-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T02:32:38","name":"ssa_name_has_boolean_range vs signed-boolean:31 types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902023238.814338-1-apinski@marvell.com/mbox/"},{"id":137416,"url":"https://patchwork.plctlab.org/api/1.2/patches/137416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902044739.28996-1-guojie@loongson.cn/","msgid":"<20230902044739.28996-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-02T04:47:39","name":"LoongArch: Support loading floating-point zero into MEM[base + index].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902044739.28996-1-guojie@loongson.cn/mbox/"},{"id":137417,"url":"https://patchwork.plctlab.org/api/1.2/patches/137417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902062433.23804-1-chenglulu@loongson.cn/","msgid":"<20230902062433.23804-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-02T06:24:33","name":"[1/2] LoongArch: Optimize switch with sign-extended index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902062433.23804-1-chenglulu@loongson.cn/mbox/"},{"id":137420,"url":"https://patchwork.plctlab.org/api/1.2/patches/137420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070005.824764-1-apinski@marvell.com/","msgid":"<20230902070005.824764-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T07:00:05","name":"MATCH: `(nop_convert)-(convert)a` into -(convert)a if we are converting from something smaller","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070005.824764-1-apinski@marvell.com/mbox/"},{"id":137421,"url":"https://patchwork.plctlab.org/api/1.2/patches/137421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070207.31651-1-guojie@loongson.cn/","msgid":"<20230902070207.31651-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-02T07:02:07","name":"[v2] LoongArch: Support storing floating-point zero into MEM[base + index].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902070207.31651-1-guojie@loongson.cn/mbox/"},{"id":137422,"url":"https://patchwork.plctlab.org/api/1.2/patches/137422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902085313.801607-1-pan2.li@intel.com/","msgid":"<20230902085313.801607-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-02T08:53:13","name":"[v1] RISC-V: Support FP MAX/MIN autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902085313.801607-1-pan2.li@intel.com/mbox/"},{"id":137423,"url":"https://patchwork.plctlab.org/api/1.2/patches/137423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902120138.909B133E4B@hamza.pair.com/","msgid":"<20230902120138.909B133E4B@hamza.pair.com>","list_archive_url":null,"date":"2023-09-02T12:01:36","name":"[pushed] wwwdocs: *: Use \"back end\" instead of \"backend\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902120138.909B133E4B@hamza.pair.com/mbox/"},{"id":137425,"url":"https://patchwork.plctlab.org/api/1.2/patches/137425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-1-apinski@marvell.com/","msgid":"<20230902150957.845269-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:55","name":"[1/3] Improve ssa_name_has_boolean_range slightly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-1-apinski@marvell.com/mbox/"},{"id":137424,"url":"https://patchwork.plctlab.org/api/1.2/patches/137424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-2-apinski@marvell.com/","msgid":"<20230902150957.845269-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:56","name":"[2/3] MATCH: Improve zero_one_valued_p by using ssa_name_has_boolean_range","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-2-apinski@marvell.com/mbox/"},{"id":137426,"url":"https://patchwork.plctlab.org/api/1.2/patches/137426/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-3-apinski@marvell.com/","msgid":"<20230902150957.845269-3-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-02T15:09:57","name":"[3/3] MATCH: Replace all uses of ssa_name_has_boolean_range with zero_one_valued_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230902150957.845269-3-apinski@marvell.com/mbox/"},{"id":137429,"url":"https://patchwork.plctlab.org/api/1.2/patches/137429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903161819.907375-1-apinski@marvell.com/","msgid":"<20230903161819.907375-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T16:18:19","name":"Improve rewrite_to_defined_overflow for lhs already the correct type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903161819.907375-1-apinski@marvell.com/mbox/"},{"id":137430,"url":"https://patchwork.plctlab.org/api/1.2/patches/137430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903162554.908044-1-apinski@marvell.com/","msgid":"<20230903162554.908044-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T16:25:54","name":"MATCH: Transform `(1 >> X) !=/== 0` into `X ==/!= 0`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903162554.908044-1-apinski@marvell.com/mbox/"},{"id":137432,"url":"https://patchwork.plctlab.org/api/1.2/patches/137432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903184706.259231-1-dkm@kataplop.net/","msgid":"<20230903184706.259231-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-03T18:47:06","name":"[v3] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903184706.259231-1-dkm@kataplop.net/mbox/"},{"id":137433,"url":"https://patchwork.plctlab.org/api/1.2/patches/137433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903204947.918766-1-apinski@marvell.com/","msgid":"<20230903204947.918766-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-03T20:49:47","name":"MATCH: Add pattern for `(x | y) & (x & z)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230903204947.918766-1-apinski@marvell.com/mbox/"},{"id":137434,"url":"https://patchwork.plctlab.org/api/1.2/patches/137434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com/","msgid":"<3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-04T00:20:45","name":"RISC-V: Fix Zicond ICE on large constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cc5403de383d7c8cfd1769948c2bcf9d54b97f9.1693786829.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137435,"url":"https://patchwork.plctlab.org/api/1.2/patches/137435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904002135.928111-1-apinski@marvell.com/","msgid":"<20230904002135.928111-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-04T00:21:35","name":"MATCH: Add `~MAX(~X, Y)` pattern: [PR96694]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904002135.928111-1-apinski@marvell.com/mbox/"},{"id":137436,"url":"https://patchwork.plctlab.org/api/1.2/patches/137436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904012536.930677-1-apinski@marvell.com/","msgid":"<20230904012536.930677-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-04T01:25:36","name":"MATCH: Add `(x | c) & ~(y | c)` and `x & ~(y | x)` patterns [PR98710]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904012536.930677-1-apinski@marvell.com/mbox/"},{"id":137437,"url":"https://patchwork.plctlab.org/api/1.2/patches/137437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904024210.64907-1-yangyujie@loongson.cn/","msgid":"<20230904024210.64907-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-04T02:42:10","name":"[v2] LoongArch: initial ada support on linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904024210.64907-1-yangyujie@loongson.cn/mbox/"},{"id":137438,"url":"https://patchwork.plctlab.org/api/1.2/patches/137438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904044906.2546875-1-lehua.ding@rivai.ai/","msgid":"<20230904044906.2546875-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-04T04:49:06","name":"RISC-V: Add conditional sqrt autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904044906.2546875-1-lehua.ding@rivai.ai/mbox/"},{"id":137440,"url":"https://patchwork.plctlab.org/api/1.2/patches/137440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com/","msgid":"<9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T05:33:28","name":"[PATCH-1v2,rs6000] Enable SImode in FP registers on P7 [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d7a1744-a01c-b54f-5818-7772f0c06b9b@linux.ibm.com/mbox/"},{"id":137439,"url":"https://patchwork.plctlab.org/api/1.2/patches/137439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com/","msgid":"<45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T05:33:45","name":"[PATCH-2v2,rs6000] Implement 32bit inline lrint [PR88558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/45dac533-e364-d6ba-a34c-3248a99cfa96@linux.ibm.com/mbox/"},{"id":137442,"url":"https://patchwork.plctlab.org/api/1.2/patches/137442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904071737.2736869-1-pan2.li@intel.com/","msgid":"<20230904071737.2736869-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-04T07:17:37","name":"[v1] RISC-V: Support FP16 for RVV VRGATHEREI16 intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904071737.2736869-1-pan2.li@intel.com/mbox/"},{"id":137443,"url":"https://patchwork.plctlab.org/api/1.2/patches/137443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com/","msgid":"<1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com>","list_archive_url":null,"date":"2023-09-04T07:57:42","name":"[3/4] Improve functionality of ree pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bb09ed3-460d-c9c1-0d36-6a8ad2557728@linux.ibm.com/mbox/"},{"id":137444,"url":"https://patchwork.plctlab.org/api/1.2/patches/137444/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904090834.148723-1-juzhe.zhong@rivai.ai/","msgid":"<20230904090834.148723-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-04T09:08:34","name":"RISC-V: Fix Dynamic LMUL compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904090834.148723-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137445,"url":"https://patchwork.plctlab.org/api/1.2/patches/137445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904101510.1380787-1-hongtao.liu@intel.com/","msgid":"<20230904101510.1380787-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-04T10:15:10","name":"Generate vmovsh instead of vpblendw for specific vec_merge.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904101510.1380787-1-hongtao.liu@intel.com/mbox/"},{"id":137446,"url":"https://patchwork.plctlab.org/api/1.2/patches/137446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904104725.49994-1-iain@sandoe.co.uk/","msgid":"<20230904104725.49994-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T10:47:25","name":"[pushed] Darwin, machopic: Debug printer for macho symbol flags.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904104725.49994-1-iain@sandoe.co.uk/mbox/"},{"id":137447,"url":"https://patchwork.plctlab.org/api/1.2/patches/137447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904105759.17192-1-iain@sandoe.co.uk/","msgid":"<20230904105759.17192-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T10:57:59","name":"[pushed] Darwin: Match system sections and relocs for exception tables.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904105759.17192-1-iain@sandoe.co.uk/mbox/"},{"id":137448,"url":"https://patchwork.plctlab.org/api/1.2/patches/137448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904111410.3362365-1-lehua.ding@rivai.ai/","msgid":"<20230904111410.3362365-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-04T11:14:10","name":"RISC-V: Keep vlmax vector operators in simple form until split1 pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904111410.3362365-1-lehua.ding@rivai.ai/mbox/"},{"id":137449,"url":"https://patchwork.plctlab.org/api/1.2/patches/137449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904112957.8713-1-iain@sandoe.co.uk/","msgid":"<20230904112957.8713-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T11:29:57","name":"Darwin: Place global inits in the correct section.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904112957.8713-1-iain@sandoe.co.uk/mbox/"},{"id":137450,"url":"https://patchwork.plctlab.org/api/1.2/patches/137450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904113519.8865-1-iain@sandoe.co.uk/","msgid":"<20230904113519.8865-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-04T11:35:19","name":"[pushed] Darwin, ppc: Add system stubs for all 32b PPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904113519.8865-1-iain@sandoe.co.uk/mbox/"},{"id":137451,"url":"https://patchwork.plctlab.org/api/1.2/patches/137451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904123113.2087352-1-christophe.lyon@linaro.org/","msgid":"<20230904123113.2087352-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-04T12:31:13","name":"testsuite: Remove unwanted '\''dg-do run'\'' from gcc.dg/vect tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904123113.2087352-1-christophe.lyon@linaro.org/mbox/"},{"id":137452,"url":"https://patchwork.plctlab.org/api/1.2/patches/137452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-09-04T12:54:26","name":"Add '\''libgomp.c-c++-common/pr100059-1.c'\'' [PR100059]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ttsat7y5.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":137453,"url":"https://patchwork.plctlab.org/api/1.2/patches/137453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904134745.177632-1-juzhe.zhong@rivai.ai/","msgid":"<20230904134745.177632-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-04T13:47:45","name":"RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904134745.177632-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137454,"url":"https://patchwork.plctlab.org/api/1.2/patches/137454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkehx5x1.fsf@euler.schwinge.homeip.net/","msgid":"<87bkehx5x1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-04T16:24:42","name":"[WIP] nvptx: Also allow immediate input operand to '\''bitrev2'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkehx5x1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137456,"url":"https://patchwork.plctlab.org/api/1.2/patches/137456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162909.515880-1-jwakely@redhat.com/","msgid":"<20230904162909.515880-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:28:48","name":"[committed] libstdc++: Add missing target selector to std::expected test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162909.515880-1-jwakely@redhat.com/mbox/"},{"id":137458,"url":"https://patchwork.plctlab.org/api/1.2/patches/137458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162914.515900-1-jwakely@redhat.com/","msgid":"<20230904162914.515900-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:10","name":"[committed] libstdc++: Add explicit -std=gnu++98 to tests that use { target c++98_only }","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162914.515900-1-jwakely@redhat.com/mbox/"},{"id":137455,"url":"https://patchwork.plctlab.org/api/1.2/patches/137455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162918.515915-1-jwakely@redhat.com/","msgid":"<20230904162918.515915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:15","name":"[committed] libstdc++: Add { target c++98_only } to tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162918.515915-1-jwakely@redhat.com/mbox/"},{"id":137457,"url":"https://patchwork.plctlab.org/api/1.2/patches/137457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162922.515929-1-jwakely@redhat.com/","msgid":"<20230904162922.515929-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:19","name":"[committed] libstdc++: Fix filenames and comments in tests [PR26142]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162922.515929-1-jwakely@redhat.com/mbox/"},{"id":137460,"url":"https://patchwork.plctlab.org/api/1.2/patches/137460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162926.515943-1-jwakely@redhat.com/","msgid":"<20230904162926.515943-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:23","name":"[committed] libstdc++: Enable std::auto_ptr tests for C++11 and later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162926.515943-1-jwakely@redhat.com/mbox/"},{"id":137459,"url":"https://patchwork.plctlab.org/api/1.2/patches/137459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162931.515957-1-jwakely@redhat.com/","msgid":"<20230904162931.515957-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:27","name":"[committed] libstdc++: Remove dg-options \"-std=c++98\" from TR1 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162931.515957-1-jwakely@redhat.com/mbox/"},{"id":137461,"url":"https://patchwork.plctlab.org/api/1.2/patches/137461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162936.515987-1-jwakely@redhat.com/","msgid":"<20230904162936.515987-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-04T16:29:32","name":"[committed] libstdc++: Remove unnecessary dg-options and outdated comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904162936.515987-1-jwakely@redhat.com/mbox/"},{"id":137462,"url":"https://patchwork.plctlab.org/api/1.2/patches/137462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904171858.2660517-1-vultkayn@gcc.gnu.org/","msgid":"<20230904171858.2660517-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-04T17:18:59","name":"c++: Additional warning for name-hiding [PR12341]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904171858.2660517-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137463,"url":"https://patchwork.plctlab.org/api/1.2/patches/137463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904180013.2680227-1-vultkayn@gcc.gnu.org/","msgid":"<20230904180013.2680227-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-04T18:00:14","name":"analyzer: Move gcc.dg/analyzer tests to c-c++-common (2) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904180013.2680227-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137464,"url":"https://patchwork.plctlab.org/api/1.2/patches/137464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-1-someguy@effective-light.com/","msgid":"<20230904185353.204611-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T18:53:52","name":"[1/2] strlen: fold strstr() even if the length isn'\''t previously known [PR96601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-1-someguy@effective-light.com/mbox/"},{"id":137465,"url":"https://patchwork.plctlab.org/api/1.2/patches/137465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-2-someguy@effective-light.com/","msgid":"<20230904185353.204611-2-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T18:53:53","name":"[2/2] strlen: call handle_builtin_strlen() from fold_strstr_to_strncmp()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904185353.204611-2-someguy@effective-light.com/mbox/"},{"id":137466,"url":"https://patchwork.plctlab.org/api/1.2/patches/137466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPYzJ03Dh62ug596@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-04T19:42:31","name":"[15/12] Add further _BitInt <-> floating point tests [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPYzJ03Dh62ug596@tucnak/mbox/"},{"id":137467,"url":"https://patchwork.plctlab.org/api/1.2/patches/137467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904195446.285310-1-dkm@kataplop.net/","msgid":"<20230904195446.285310-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-04T19:54:46","name":"[COMMITED,v4] mklog: handle Signed-off-by, minor cleanup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904195446.285310-1-dkm@kataplop.net/mbox/"},{"id":137468,"url":"https://patchwork.plctlab.org/api/1.2/patches/137468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-1-someguy@effective-light.com/","msgid":"<20230904205814.222166-1-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T20:58:13","name":"[v2,1/2] strlen: fold strstr() even if the length isn'\''t previously known [PR96601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-1-someguy@effective-light.com/mbox/"},{"id":137469,"url":"https://patchwork.plctlab.org/api/1.2/patches/137469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-2-someguy@effective-light.com/","msgid":"<20230904205814.222166-2-someguy@effective-light.com>","list_archive_url":null,"date":"2023-09-04T20:58:14","name":"[v2,2/2] strlen: call handle_builtin_strlen() from fold_strstr_to_strncmp()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230904205814.222166-2-someguy@effective-light.com/mbox/"},{"id":137470,"url":"https://patchwork.plctlab.org/api/1.2/patches/137470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jk9wsxq.fsf@euler.schwinge.homeip.net/","msgid":"<874jk9wsxq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-04T21:05:05","name":"[WIP] testsuite: Port '\''check-function-bodies'\'' to nvptx (was: Add dg test for matching function bodies)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jk9wsxq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137471,"url":"https://patchwork.plctlab.org/api/1.2/patches/137471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905021334.39124-1-ef2648@columbia.edu/","msgid":"<20230905021334.39124-1-ef2648@columbia.edu>","list_archive_url":null,"date":"2023-09-05T02:13:34","name":"analyzer: implement symbolic value support for CPython plugin'\''s refcnt checker [PR107646]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905021334.39124-1-ef2648@columbia.edu/mbox/"},{"id":137475,"url":"https://patchwork.plctlab.org/api/1.2/patches/137475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905060348.4207-1-chenglulu@loongson.cn/","msgid":"<20230905060348.4207-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-05T06:03:49","name":"[v1] LoongArch: Optimized multiply instruction generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905060348.4207-1-chenglulu@loongson.cn/mbox/"},{"id":137476,"url":"https://patchwork.plctlab.org/api/1.2/patches/137476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbV3yNSwdFY6khb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:16:47","name":"[16/12] _BitInt profile fixes [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbV3yNSwdFY6khb@tucnak/mbox/"},{"id":137477,"url":"https://patchwork.plctlab.org/api/1.2/patches/137477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbYgbXPHw1TkSZD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:28:01","name":"[17/12] _BitInt a ? ~b : b match.pd fix [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbYgbXPHw1TkSZD@tucnak/mbox/"},{"id":137478,"url":"https://patchwork.plctlab.org/api/1.2/patches/137478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbZGGqmV8L+/rni@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:30:32","name":"[18/12] Handle BITINT_TYPE in build_{, minus_}one_cst [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbZGGqmV8L+/rni@tucnak/mbox/"},{"id":137479,"url":"https://patchwork.plctlab.org/api/1.2/patches/137479/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbaXTuV2ARYl4ew@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T07:35:57","name":"[committed] tree-ssa-tail-merge: Fix a comment typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPbaXTuV2ARYl4ew@tucnak/mbox/"},{"id":137481,"url":"https://patchwork.plctlab.org/api/1.2/patches/137481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-2-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:50","name":"[V5,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-2-lehua.ding@rivai.ai/mbox/"},{"id":137480,"url":"https://patchwork.plctlab.org/api/1.2/patches/137480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-3-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:51","name":"[V5,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-3-lehua.ding@rivai.ai/mbox/"},{"id":137482,"url":"https://patchwork.plctlab.org/api/1.2/patches/137482/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-4-lehua.ding@rivai.ai/","msgid":"<20230905074452.3714603-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-05T07:44:52","name":"[V5,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905074452.3714603-4-lehua.ding@rivai.ai/mbox/"},{"id":137486,"url":"https://patchwork.plctlab.org/api/1.2/patches/137486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7tt4za.fsf@euler.schwinge.homeip.net/","msgid":"<87sf7tt4za.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-05T08:10:49","name":"GNU Tools Cauldron 2023","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7tt4za.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137487,"url":"https://patchwork.plctlab.org/api/1.2/patches/137487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-1-claziss@gmail.com/","msgid":"<20230905084234.114788-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-09-05T08:42:33","name":"[committed,1/2] arc: Remove obsolete mbbit-peephole option and unused patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-1-claziss@gmail.com/mbox/"},{"id":137488,"url":"https://patchwork.plctlab.org/api/1.2/patches/137488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-2-claziss@gmail.com/","msgid":"<20230905084234.114788-2-claziss@gmail.com>","list_archive_url":null,"date":"2023-09-05T08:42:34","name":"[committed,2/2] arc: Cleanup addsi3 instruction pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084234.114788-2-claziss@gmail.com/mbox/"},{"id":137489,"url":"https://patchwork.plctlab.org/api/1.2/patches/137489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084725.1212443-1-juzhe.zhong@rivai.ai/","msgid":"<20230905084725.1212443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-05T08:47:25","name":"RISC-V: Export functions as global extern preparing for dynamic LMUL patch use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905084725.1212443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137490,"url":"https://patchwork.plctlab.org/api/1.2/patches/137490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905085606.1216832-1-juzhe.zhong@rivai.ai/","msgid":"<20230905085606.1216832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-05T08:56:06","name":"[V2] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905085606.1216832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137494,"url":"https://patchwork.plctlab.org/api/1.2/patches/137494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp/","msgid":"<0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp>","list_archive_url":null,"date":"2023-09-05T09:27:35","name":"xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0164dc5a-35a7-2848-8153-5016f7582576@yahoo.co.jp/mbox/"},{"id":137495,"url":"https://patchwork.plctlab.org/api/1.2/patches/137495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905103204.2267415-1-pan2.li@intel.com/","msgid":"<20230905103204.2267415-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-05T10:32:04","name":"[v1] RISC-V: Support FP SGNJ autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905103204.2267415-1-pan2.li@intel.com/mbox/"},{"id":137496,"url":"https://patchwork.plctlab.org/api/1.2/patches/137496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110741.561950-1-poulhies@adacore.com/","msgid":"<20230905110741.561950-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:41","name":"[COMMITTED] Revert \"Adjust one Ada test\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110741.561950-1-poulhies@adacore.com/mbox/"},{"id":137501,"url":"https://patchwork.plctlab.org/api/1.2/patches/137501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110751.562099-1-poulhies@adacore.com/","msgid":"<20230905110751.562099-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:51","name":"[COMMITTED] ada: Tweak comment about tasking corner case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110751.562099-1-poulhies@adacore.com/mbox/"},{"id":137497,"url":"https://patchwork.plctlab.org/api/1.2/patches/137497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110753.562161-1-poulhies@adacore.com/","msgid":"<20230905110753.562161-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:53","name":"[COMMITTED] ada: Enforce subtype conformance of interface primitives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110753.562161-1-poulhies@adacore.com/mbox/"},{"id":137507,"url":"https://patchwork.plctlab.org/api/1.2/patches/137507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110755.562222-1-poulhies@adacore.com/","msgid":"<20230905110755.562222-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:55","name":"[COMMITTED] ada: Handle GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110755.562222-1-poulhies@adacore.com/mbox/"},{"id":137498,"url":"https://patchwork.plctlab.org/api/1.2/patches/137498/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110757.562283-1-poulhies@adacore.com/","msgid":"<20230905110757.562283-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:57","name":"[COMMITTED] ada: Add missing units to Makefile.rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110757.562283-1-poulhies@adacore.com/mbox/"},{"id":137499,"url":"https://patchwork.plctlab.org/api/1.2/patches/137499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110759.562386-1-poulhies@adacore.com/","msgid":"<20230905110759.562386-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:07:59","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110759.562386-1-poulhies@adacore.com/mbox/"},{"id":137511,"url":"https://patchwork.plctlab.org/api/1.2/patches/137511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110802.562452-1-poulhies@adacore.com/","msgid":"<20230905110802.562452-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:02","name":"[COMMITTED] ada: Fix internal error on instantiation with private component type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110802.562452-1-poulhies@adacore.com/mbox/"},{"id":137514,"url":"https://patchwork.plctlab.org/api/1.2/patches/137514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110804.562514-1-poulhies@adacore.com/","msgid":"<20230905110804.562514-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:04","name":"[COMMITTED] ada: Preserve capability validity in address arithmetic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110804.562514-1-poulhies@adacore.com/mbox/"},{"id":137517,"url":"https://patchwork.plctlab.org/api/1.2/patches/137517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110806.562575-1-poulhies@adacore.com/","msgid":"<20230905110806.562575-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:06","name":"[COMMITTED] ada: building_executable_programs_with_gnat.rst: fix -gnatw.x index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110806.562575-1-poulhies@adacore.com/mbox/"},{"id":137518,"url":"https://patchwork.plctlab.org/api/1.2/patches/137518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110808.562636-1-poulhies@adacore.com/","msgid":"<20230905110808.562636-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:08","name":"[COMMITTED] ada: Support setting task affinity on QNX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110808.562636-1-poulhies@adacore.com/mbox/"},{"id":137504,"url":"https://patchwork.plctlab.org/api/1.2/patches/137504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110810.562697-1-poulhies@adacore.com/","msgid":"<20230905110810.562697-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:10","name":"[COMMITTED] ada: Spurious warning about negative modular literal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110810.562697-1-poulhies@adacore.com/mbox/"},{"id":137502,"url":"https://patchwork.plctlab.org/api/1.2/patches/137502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110812.562762-1-poulhies@adacore.com/","msgid":"<20230905110812.562762-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:12","name":"[COMMITTED] ada: Compiler hangs on invalid postcondition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110812.562762-1-poulhies@adacore.com/mbox/"},{"id":137503,"url":"https://patchwork.plctlab.org/api/1.2/patches/137503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110814.562829-1-poulhies@adacore.com/","msgid":"<20230905110814.562829-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:14","name":"[COMMITTED] ada: Crash on function returning empty Ada 2022 aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110814.562829-1-poulhies@adacore.com/mbox/"},{"id":137506,"url":"https://patchwork.plctlab.org/api/1.2/patches/137506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110816.562928-1-poulhies@adacore.com/","msgid":"<20230905110816.562928-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:16","name":"[COMMITTED] ada: Pass -msmp when linking for ppc-vx6 --RTS=rtp-smp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110816.562928-1-poulhies@adacore.com/mbox/"},{"id":137508,"url":"https://patchwork.plctlab.org/api/1.2/patches/137508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110818.562990-1-poulhies@adacore.com/","msgid":"<20230905110818.562990-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:18","name":"[COMMITTED] ada: Crash on creation of extra formals on type extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110818.562990-1-poulhies@adacore.com/mbox/"},{"id":137510,"url":"https://patchwork.plctlab.org/api/1.2/patches/137510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110820.563052-1-poulhies@adacore.com/","msgid":"<20230905110820.563052-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:20","name":"[COMMITTED] ada: Remove TBC comment, no more needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110820.563052-1-poulhies@adacore.com/mbox/"},{"id":137500,"url":"https://patchwork.plctlab.org/api/1.2/patches/137500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110822.563115-1-poulhies@adacore.com/","msgid":"<20230905110822.563115-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:22","name":"[COMMITTED] ada: Fix assertion failure on very peculiar enumeration type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110822.563115-1-poulhies@adacore.com/mbox/"},{"id":137519,"url":"https://patchwork.plctlab.org/api/1.2/patches/137519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110824.563177-1-poulhies@adacore.com/","msgid":"<20230905110824.563177-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:24","name":"[COMMITTED] ada: Fix spurious warning emissions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110824.563177-1-poulhies@adacore.com/mbox/"},{"id":137505,"url":"https://patchwork.plctlab.org/api/1.2/patches/137505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110826.563238-1-poulhies@adacore.com/","msgid":"<20230905110826.563238-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:26","name":"[COMMITTED] ada: Fix crash on selected component lookup in generic instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110826.563238-1-poulhies@adacore.com/mbox/"},{"id":137515,"url":"https://patchwork.plctlab.org/api/1.2/patches/137515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110828.563299-1-poulhies@adacore.com/","msgid":"<20230905110828.563299-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:28","name":"[COMMITTED] ada: Fix problematic secondary stack management in protected entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110828.563299-1-poulhies@adacore.com/mbox/"},{"id":137509,"url":"https://patchwork.plctlab.org/api/1.2/patches/137509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110832.563364-1-poulhies@adacore.com/","msgid":"<20230905110832.563364-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:32","name":"[COMMITTED] ada: Remove redundant guard against an empty list of interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110832.563364-1-poulhies@adacore.com/mbox/"},{"id":137513,"url":"https://patchwork.plctlab.org/api/1.2/patches/137513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110833.563425-1-poulhies@adacore.com/","msgid":"<20230905110833.563425-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:33","name":"[COMMITTED] ada: Add guard before querying the type for its interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110833.563425-1-poulhies@adacore.com/mbox/"},{"id":137516,"url":"https://patchwork.plctlab.org/api/1.2/patches/137516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110835.563486-1-poulhies@adacore.com/","msgid":"<20230905110835.563486-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:35","name":"[COMMITTED] ada: Remove redundant protection against empty list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110835.563486-1-poulhies@adacore.com/mbox/"},{"id":137512,"url":"https://patchwork.plctlab.org/api/1.2/patches/137512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110837.563547-1-poulhies@adacore.com/","msgid":"<20230905110837.563547-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:37","name":"[COMMITTED] ada: Fix DWARF for certain arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110837.563547-1-poulhies@adacore.com/mbox/"},{"id":137520,"url":"https://patchwork.plctlab.org/api/1.2/patches/137520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110840.563652-1-poulhies@adacore.com/","msgid":"<20230905110840.563652-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-05T11:08:40","name":"[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905110840.563652-1-poulhies@adacore.com/mbox/"},{"id":137521,"url":"https://patchwork.plctlab.org/api/1.2/patches/137521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com/","msgid":"<37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-05T12:08:53","name":"[v2] RISC-V: Fix Zicond ICE on large constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/37a03341f16da30b83bec1f4ef51dce4e6f25264.1693915537.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137522,"url":"https://patchwork.plctlab.org/api/1.2/patches/137522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d143e140125ed69ab108f3623bfde61d662b4f18.1693915780.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T12:10:20","name":"[v3,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d143e140125ed69ab108f3623bfde61d662b4f18.1693915780.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137523,"url":"https://patchwork.plctlab.org/api/1.2/patches/137523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg20vmka.fsf@euler.schwinge.homeip.net/","msgid":"<87zg20vmka.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-05T12:20:21","name":"testsuite: Port '\''check-function-bodies'\'' to nvptx (was: Add dg test for matching function bodies)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg20vmka.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137524,"url":"https://patchwork.plctlab.org/api/1.2/patches/137524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPcxnxjX7quZWGNM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-05T13:48:15","name":"c: Don'\''t pedwarn on _FloatN{,x} or {f,F}N{,x} suffixes for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPcxnxjX7quZWGNM@tucnak/mbox/"},{"id":137525,"url":"https://patchwork.plctlab.org/api/1.2/patches/137525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f046d7d4-7dd4-28f2-10b9-6d266e3c0896@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T14:37:46","name":"contrib/gcc-changelog: Check whether revert-commit exists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f046d7d4-7dd4-28f2-10b9-6d266e3c0896@codesourcery.com/mbox/"},{"id":137528,"url":"https://patchwork.plctlab.org/api/1.2/patches/137528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com/","msgid":"<0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T14:56:09","name":"[committed] OpenMP: Avoid ICE in c_parser_omp_clause_allocate with invalid expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c1afc67-99d4-0fb7-48c8-5977c21ad350@codesourcery.com/mbox/"},{"id":137529,"url":"https://patchwork.plctlab.org/api/1.2/patches/137529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905152015.9738-1-vineetg@rivosinc.com/","msgid":"<20230905152015.9738-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-09-05T15:20:15","name":"[Committed] RISC-V: zicond: Fix opt2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905152015.9738-1-vineetg@rivosinc.com/mbox/"},{"id":137530,"url":"https://patchwork.plctlab.org/api/1.2/patches/137530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905154234.3316144-1-christoph.muellner@vrull.eu/","msgid":"<20230905154234.3316144-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-05T15:42:34","name":"riscv: xtheadbb: Enable constant synthesis with th.srri","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905154234.3316144-1-christoph.muellner@vrull.eu/mbox/"},{"id":137540,"url":"https://patchwork.plctlab.org/api/1.2/patches/137540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9aaf9e0db1da9dc8c1e163f4c3696ef73b66a46.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:21","name":"[1/8] OpenMP: lvalue parsing for map/to/from clauses (C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9aaf9e0db1da9dc8c1e163f4c3696ef73b66a46.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137538,"url":"https://patchwork.plctlab.org/api/1.2/patches/137538/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com/","msgid":"<78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:22","name":"[2/8] OpenMP: lvalue parsing for map/to/from clauses (C)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78fa6c4dae60578a8feffe204bfe24d85d19520c.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137539,"url":"https://patchwork.plctlab.org/api/1.2/patches/137539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba39536bd6229408ebabfc8c99fda28b2237787f.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:23","name":"[3/8] OpenMP: C++ \"declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba39536bd6229408ebabfc8c99fda28b2237787f.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137541,"url":"https://patchwork.plctlab.org/api/1.2/patches/137541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com/","msgid":"<8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:24","name":"[4/8] OpenMP: Support OpenMP 5.0 \"declare mapper\" directives for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8dec2802115e44fcd7d18b83729a44fa09c90b38.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137542,"url":"https://patchwork.plctlab.org/api/1.2/patches/137542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f1336860c3f9118c9984d7a0da38653070a80e.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:25","name":"[5/8] OpenMP, Fortran: Pass list number to gfc_free_omp_namelist","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f1336860c3f9118c9984d7a0da38653070a80e.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137543,"url":"https://patchwork.plctlab.org/api/1.2/patches/137543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2e6f0fe8f9827a0b176d4fa92798498ebe7fd50.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:26","name":"[6/8] OpenMP, Fortran: Per-directive control for gfc_trans_omp_clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2e6f0fe8f9827a0b176d4fa92798498ebe7fd50.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137544,"url":"https://patchwork.plctlab.org/api/1.2/patches/137544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f15d835e45a74558212895d272a9d7223b43edb6.1693941293.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-05T19:28:27","name":"[7/8] OpenMP, Fortran: Split out OMP clause checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f15d835e45a74558212895d272a9d7223b43edb6.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137545,"url":"https://patchwork.plctlab.org/api/1.2/patches/137545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com/","msgid":"<2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-05T19:28:28","name":"[8/8] OpenMP: Fortran \"!$omp declare mapper\" support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2aaa9204cded930d85531c3e2a32a6c07cf6d545.1693941293.git.julian@codesourcery.com/mbox/"},{"id":137547,"url":"https://patchwork.plctlab.org/api/1.2/patches/137547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905211559.2871358-1-christoph.muellner@vrull.eu/","msgid":"<20230905211559.2871358-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-05T21:15:59","name":"riscv: Synthesize all 11-bit-rotate constants with rori","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230905211559.2871358-1-christoph.muellner@vrull.eu/mbox/"},{"id":137548,"url":"https://patchwork.plctlab.org/api/1.2/patches/137548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com/","msgid":"<8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com>","list_archive_url":null,"date":"2023-09-05T21:41:50","name":"[committed] RISC-V: Expose bswapsi for TARGET_64BIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8a7a28fa-db2d-436a-80bb-ab4a290c746b@gmail.com/mbox/"},{"id":137549,"url":"https://patchwork.plctlab.org/api/1.2/patches/137549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906020216.5995-1-wangfeng@eswincomputing.com/","msgid":"<20230906020216.5995-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T02:02:16","name":"[v3] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906020216.5995-1-wangfeng@eswincomputing.com/mbox/"},{"id":137551,"url":"https://patchwork.plctlab.org/api/1.2/patches/137551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com/","msgid":"<254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-06T02:38:43","name":"[COMMITTED] RISC-V: typo: add closing paren to a comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/254100a9a003a16255a58eec3fa24168e6dc7124.1693967872.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137552,"url":"https://patchwork.plctlab.org/api/1.2/patches/137552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906031931.622583-1-jason@redhat.com/","msgid":"<20230906031931.622583-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-06T03:19:31","name":"[pushed] c++: [[no_unique_address]] and cv-qualified type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906031931.622583-1-jason@redhat.com/mbox/"},{"id":137553,"url":"https://patchwork.plctlab.org/api/1.2/patches/137553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com/","msgid":"<018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-06T05:47:07","name":"[v4,1/1] RISC-V: Add support for '\''XVentanaCondOps'\'' reusing '\''Zicond'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137554,"url":"https://patchwork.plctlab.org/api/1.2/patches/137554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c83c9f9f05bf5577eeaf3633c5c2e494ac0a11fd.1693991759.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T09:34:30","name":"[1/5] OpenMP, NVPTX: memcpy[23]D bias correction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c83c9f9f05bf5577eeaf3633c5c2e494ac0a11fd.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137555,"url":"https://patchwork.plctlab.org/api/1.2/patches/137555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com/","msgid":"<463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:31","name":"[2/5] OpenMP: Allow complete replacement of clause during map/to/from expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/463243d6ef75f09ad961f0f8044f82d1af2f32da.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137557,"url":"https://patchwork.plctlab.org/api/1.2/patches/137557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com/","msgid":"<4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:32","name":"[3/5] OpenMP: Support strided and shaped-array updates for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4911c9602145828d71f88dc885eb2bc5b5ff396c.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137558,"url":"https://patchwork.plctlab.org/api/1.2/patches/137558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c998e474d8ce5bf0e0507bcb1fd6550daca3ab6e.1693991759.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T09:34:33","name":"[4/5] OpenMP: Array shaping operator and strided \"target update\" for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c998e474d8ce5bf0e0507bcb1fd6550daca3ab6e.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137556,"url":"https://patchwork.plctlab.org/api/1.2/patches/137556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com/","msgid":"<2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:34:34","name":"[5/5] OpenMP: Noncontiguous \"target update\" for Fortran","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b85bf8067f775244ff9b3a6b35ede81473c3a55.1693991759.git.julian@codesourcery.com/mbox/"},{"id":137559,"url":"https://patchwork.plctlab.org/api/1.2/patches/137559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-2-gaofei@eswincomputing.com/","msgid":"<20230906093909.32207-2-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T09:39:08","name":"[1/2] allow targets to check shrink-wrap-separate enabled or not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-2-gaofei@eswincomputing.com/mbox/"},{"id":137560,"url":"https://patchwork.plctlab.org/api/1.2/patches/137560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-3-gaofei@eswincomputing.com/","msgid":"<20230906093909.32207-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-06T09:39:09","name":"[2/2,V2,RISC-V] enable muti push and pop for Zcmp when shrink-wrap-separate is ineffective","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906093909.32207-3-gaofei@eswincomputing.com/mbox/"},{"id":137561,"url":"https://patchwork.plctlab.org/api/1.2/patches/137561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906094759.4040203-1-juzhe.zhong@rivai.ai/","msgid":"<20230906094759.4040203-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T09:47:59","name":"RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906094759.4040203-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137562,"url":"https://patchwork.plctlab.org/api/1.2/patches/137562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095504.32204-1-julian@codesourcery.com/","msgid":"<20230906095504.32204-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-06T09:55:04","name":"OpenMP: Enable '\''declare mapper'\'' mappers for '\''target update'\'' directives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095504.32204-1-julian@codesourcery.com/mbox/"},{"id":137564,"url":"https://patchwork.plctlab.org/api/1.2/patches/137564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095747.25772-1-yangyujie@loongson.cn/","msgid":"<20230906095747.25772-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-06T09:57:47","name":"LoongArch: Fix unintentional bash-ism in r14-3665.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906095747.25772-1-yangyujie@loongson.cn/mbox/"},{"id":137565,"url":"https://patchwork.plctlab.org/api/1.2/patches/137565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100423.4181932-1-christoph.muellner@vrull.eu/","msgid":"<20230906100423.4181932-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T10:04:23","name":"riscv: xtheadbb: Fix xtheadbb-li-rotr test for rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100423.4181932-1-christoph.muellner@vrull.eu/mbox/"},{"id":137566,"url":"https://patchwork.plctlab.org/api/1.2/patches/137566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100628.26033-1-yangyujie@loongson.cn/","msgid":"<20230906100628.26033-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:06:28","name":"LoongArch: Link c++ header directory in the default ABI to the toplevel.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906100628.26033-1-yangyujie@loongson.cn/mbox/"},{"id":137567,"url":"https://patchwork.plctlab.org/api/1.2/patches/137567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104307.37244-2-chenxiaolong@loongson.cn/","msgid":"<20230906104307.37244-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:43:04","name":"[v1,1/4] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104307.37244-2-chenxiaolong@loongson.cn/mbox/"},{"id":137568,"url":"https://patchwork.plctlab.org/api/1.2/patches/137568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104512.46432-1-chenxiaolong@loongson.cn/","msgid":"<20230906104512.46432-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:12","name":"[v1,2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104512.46432-1-chenxiaolong@loongson.cn/mbox/"},{"id":137569,"url":"https://patchwork.plctlab.org/api/1.2/patches/137569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104526.47497-1-chenxiaolong@loongson.cn/","msgid":"<20230906104526.47497-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:26","name":"[v1,3/4] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104526.47497-1-chenxiaolong@loongson.cn/mbox/"},{"id":137570,"url":"https://patchwork.plctlab.org/api/1.2/patches/137570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104537.51583-1-chenxiaolong@loongson.cn/","msgid":"<20230906104537.51583-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-06T10:45:37","name":"[v1,4/4] LoongArch: Add tests for Loongson SX floating-point conversion instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104537.51583-1-chenxiaolong@loongson.cn/mbox/"},{"id":137571,"url":"https://patchwork.plctlab.org/api/1.2/patches/137571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104628.51362-1-xry111@xry111.site/","msgid":"<20230906104628.51362-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-06T10:46:28","name":"LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906104628.51362-1-xry111@xry111.site/mbox/"},{"id":137572,"url":"https://patchwork.plctlab.org/api/1.2/patches/137572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906121814.1445594-1-juzhe.zhong@rivai.ai/","msgid":"<20230906121814.1445594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T12:18:14","name":"RISC-V: Remove unreasonable TARGET_64BIT for VLS modes with size = 64bit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906121814.1445594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137573,"url":"https://patchwork.plctlab.org/api/1.2/patches/137573/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906124724.1455261-1-juzhe.zhong@rivai.ai/","msgid":"<20230906124724.1455261-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T12:47:24","name":"RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906124724.1455261-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137574,"url":"https://patchwork.plctlab.org/api/1.2/patches/137574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-1-shahab@synopsys.com/","msgid":"<20230906125026.16091-1-shahab@synopsys.com>","list_archive_url":null,"date":"2023-09-06T12:50:25","name":"[1/2] ARC: Use intrinsics for __builtin_add_overflow*()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-1-shahab@synopsys.com/mbox/"},{"id":137575,"url":"https://patchwork.plctlab.org/api/1.2/patches/137575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-2-shahab@synopsys.com/","msgid":"<20230906125026.16091-2-shahab@synopsys.com>","list_archive_url":null,"date":"2023-09-06T12:50:26","name":"[2/2] ARC: Use intrinsics for __builtin_sub_overflow*()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125026.16091-2-shahab@synopsys.com/mbox/"},{"id":137576,"url":"https://patchwork.plctlab.org/api/1.2/patches/137576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125156.1169003-1-pan2.li@intel.com/","msgid":"<20230906125156.1169003-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-06T12:51:56","name":"[v1] RISC-V: Fix incorrect folder for VRGATHERI16 test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906125156.1169003-1-pan2.li@intel.com/mbox/"},{"id":137577,"url":"https://patchwork.plctlab.org/api/1.2/patches/137577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134001.681629-1-dmalcolm@redhat.com/","msgid":"<20230906134001.681629-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:40:01","name":"ggc, jit: forcibly clear GTY roots in jit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134001.681629-1-dmalcolm@redhat.com/mbox/"},{"id":137578,"url":"https://patchwork.plctlab.org/api/1.2/patches/137578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134422.682275-1-dmalcolm@redhat.com/","msgid":"<20230906134422.682275-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:22","name":"[pushed] analyzer: add ctxt to fill_region/zero_fill_region","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134422.682275-1-dmalcolm@redhat.com/mbox/"},{"id":137579,"url":"https://patchwork.plctlab.org/api/1.2/patches/137579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134435.682348-1-dmalcolm@redhat.com/","msgid":"<20230906134435.682348-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:35","name":"[pushed] analyzer: implement kf_strncpy [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134435.682348-1-dmalcolm@redhat.com/mbox/"},{"id":137580,"url":"https://patchwork.plctlab.org/api/1.2/patches/137580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134444.682395-1-dmalcolm@redhat.com/","msgid":"<20230906134444.682395-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-06T13:44:44","name":"[pushed] analyzer: implement kf_strstr [PR105899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906134444.682395-1-dmalcolm@redhat.com/mbox/"},{"id":137581,"url":"https://patchwork.plctlab.org/api/1.2/patches/137581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-2-arthur.cohen@embecosm.com/","msgid":"<20230906135303.3643659-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-06T13:53:02","name":"[1/2] diagnostics: add error_meta","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-2-arthur.cohen@embecosm.com/mbox/"},{"id":137582,"url":"https://patchwork.plctlab.org/api/1.2/patches/137582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-3-arthur.cohen@embecosm.com/","msgid":"<20230906135303.3643659-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-06T13:53:03","name":"[2/2] Experiment with adding an error code to an error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906135303.3643659-3-arthur.cohen@embecosm.com/mbox/"},{"id":137583,"url":"https://patchwork.plctlab.org/api/1.2/patches/137583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906142803.499510-1-juzhe.zhong@rivai.ai/","msgid":"<20230906142803.499510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-06T14:28:03","name":"[Committed,V2] RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906142803.499510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137584,"url":"https://patchwork.plctlab.org/api/1.2/patches/137584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPijr7hRsYgEBADf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-06T16:07:11","name":"[committed,10/12,v2] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPijr7hRsYgEBADf@tucnak/mbox/"},{"id":137586,"url":"https://patchwork.plctlab.org/api/1.2/patches/137586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-2-christoph.muellner@vrull.eu/","msgid":"<20230906160734.2422522-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T16:07:33","name":"[v2,1/2] riscv: Add support for strlen inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-2-christoph.muellner@vrull.eu/mbox/"},{"id":137585,"url":"https://patchwork.plctlab.org/api/1.2/patches/137585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-3-christoph.muellner@vrull.eu/","msgid":"<20230906160734.2422522-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-06T16:07:34","name":"[v2,2/2] riscv: Add support for str(n)cmp inline expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906160734.2422522-3-christoph.muellner@vrull.eu/mbox/"},{"id":137587,"url":"https://patchwork.plctlab.org/api/1.2/patches/137587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPikTdeyDMHLOY0e@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-06T16:09:49","name":"[committed,19/12] Additional _BitInt test coverage [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPikTdeyDMHLOY0e@tucnak/mbox/"},{"id":137588,"url":"https://patchwork.plctlab.org/api/1.2/patches/137588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/977be071-0361-1868-26cb-532e06dc25f9@arm.com/","msgid":"<977be071-0361-1868-26cb-532e06dc25f9@arm.com>","list_archive_url":null,"date":"2023-09-06T17:19:12","name":"[PING,1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/977be071-0361-1868-26cb-532e06dc25f9@arm.com/mbox/"},{"id":137589,"url":"https://patchwork.plctlab.org/api/1.2/patches/137589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de90d80c-96b5-c67c-4b99-e913c33906d2@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T17:19:24","name":"[PING,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de90d80c-96b5-c67c-4b99-e913c33906d2@arm.com/mbox/"},{"id":137590,"url":"https://patchwork.plctlab.org/api/1.2/patches/137590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-2-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:19","name":"[1/5] RISC-V: Update Types for Vector Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-2-ewlu@rivosinc.com/mbox/"},{"id":137591,"url":"https://patchwork.plctlab.org/api/1.2/patches/137591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-3-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:20","name":"[2/5] RISC-V: Add Types for Un-Typed zc Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-3-ewlu@rivosinc.com/mbox/"},{"id":137593,"url":"https://patchwork.plctlab.org/api/1.2/patches/137593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-4-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:21","name":"[3/5] RISC-V: Add Types to Un-Typed Zicond Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-4-ewlu@rivosinc.com/mbox/"},{"id":137592,"url":"https://patchwork.plctlab.org/api/1.2/patches/137592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-5-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:22","name":"[4/5] RISC-V: Update Types for RISC-V Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-5-ewlu@rivosinc.com/mbox/"},{"id":137594,"url":"https://patchwork.plctlab.org/api/1.2/patches/137594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-6-ewlu@rivosinc.com/","msgid":"<20230906175025.935887-6-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-06T17:50:23","name":"[5/5] RISC-V: Remove Assert Protecting Types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906175025.935887-6-ewlu@rivosinc.com/mbox/"},{"id":137595,"url":"https://patchwork.plctlab.org/api/1.2/patches/137595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfkpy=UkaKq0R3B6YKA1zBacJ_vJs=EHAnOuNa3dHQBQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T18:38:04","name":"libgo patch committed: permit $AR to include options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVfkpy=UkaKq0R3B6YKA1zBacJ_vJs=EHAnOuNa3dHQBQ@mail.gmail.com/mbox/"},{"id":137596,"url":"https://patchwork.plctlab.org/api/1.2/patches/137596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906191618.3187438-1-vultkayn@gcc.gnu.org/","msgid":"<20230906191618.3187438-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-06T19:16:20","name":"[v2] analyzer: Call off a superseding when diagnostics are unrelated [PR110830]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906191618.3187438-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137598,"url":"https://patchwork.plctlab.org/api/1.2/patches/137598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906220737.4049357-1-ppalka@redhat.com/","msgid":"<20230906220737.4049357-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-06T22:07:37","name":"c++: cache conversion function lookup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906220737.4049357-1-ppalka@redhat.com/mbox/"},{"id":137599,"url":"https://patchwork.plctlab.org/api/1.2/patches/137599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906222913.784626-1-jwakely@redhat.com/","msgid":"<20230906222913.784626-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-06T22:28:54","name":"[committed] libstdc++: Disable support by default for freestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230906222913.784626-1-jwakely@redhat.com/mbox/"},{"id":137600,"url":"https://patchwork.plctlab.org/api/1.2/patches/137600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUnCVkWey4PYRFUumSx5zSmpv+pN4-L1sWdxF73pVwcTA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-06T22:32:47","name":"godump.cc patch committed: Handle _BitInt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUnCVkWey4PYRFUumSx5zSmpv+pN4-L1sWdxF73pVwcTA@mail.gmail.com/mbox/"},{"id":137602,"url":"https://patchwork.plctlab.org/api/1.2/patches/137602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907014320.1962038-1-hongtao.liu@intel.com/","msgid":"<20230907014320.1962038-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-07T01:43:20","name":"Support vpermw/vpermi2w/vpermt2w instructions for vector HF/BFmodes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907014320.1962038-1-hongtao.liu@intel.com/mbox/"},{"id":137607,"url":"https://patchwork.plctlab.org/api/1.2/patches/137607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907020245.2888379-1-guojiufu@linux.ibm.com/","msgid":"<20230907020245.2888379-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-07T02:02:45","name":"Checking undefined_p before using the vr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907020245.2888379-1-guojiufu@linux.ibm.com/mbox/"},{"id":137603,"url":"https://patchwork.plctlab.org/api/1.2/patches/137603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com/","msgid":"<3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-07T02:17:01","name":"[RFC,1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137604,"url":"https://patchwork.plctlab.org/api/1.2/patches/137604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68806e290262ac43dfaa898e883bb85eece71a6.1694053004.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T02:17:02","name":"[RFC,2/2] RISC-V: Update testsuite for type-changed builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d68806e290262ac43dfaa898e883bb85eece71a6.1694053004.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137605,"url":"https://patchwork.plctlab.org/api/1.2/patches/137605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907021750.14608-1-wangfeng@eswincomputing.com/","msgid":"<20230907021750.14608-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-07T02:17:50","name":"[v4] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907021750.14608-1-wangfeng@eswincomputing.com/mbox/"},{"id":137608,"url":"https://patchwork.plctlab.org/api/1.2/patches/137608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907033553.1289393-1-juzhe.zhong@rivai.ai/","msgid":"<20230907033553.1289393-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T03:35:53","name":"RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907033553.1289393-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137610,"url":"https://patchwork.plctlab.org/api/1.2/patches/137610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907065010.36145-1-yangyujie@loongson.cn/","msgid":"<20230907065010.36145-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-07T06:50:10","name":"[v2] LoongArch: Adjust C++ multilib header layout.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907065010.36145-1-yangyujie@loongson.cn/mbox/"},{"id":137611,"url":"https://patchwork.plctlab.org/api/1.2/patches/137611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-2-chenxiaolong@loongson.cn/","msgid":"<20230907070101.22062-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:00:58","name":"[v2,1/4] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-2-chenxiaolong@loongson.cn/mbox/"},{"id":137612,"url":"https://patchwork.plctlab.org/api/1.2/patches/137612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-3-chenxiaolong@loongson.cn/","msgid":"<20230907070101.22062-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:00:59","name":"[v2,2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070101.22062-3-chenxiaolong@loongson.cn/mbox/"},{"id":137613,"url":"https://patchwork.plctlab.org/api/1.2/patches/137613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070558.22563-1-chenxiaolong@loongson.cn/","msgid":"<20230907070558.22563-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:05:58","name":"[v2,3/4] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070558.22563-1-chenxiaolong@loongson.cn/mbox/"},{"id":137614,"url":"https://patchwork.plctlab.org/api/1.2/patches/137614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070613.22622-1-chenxiaolong@loongson.cn/","msgid":"<20230907070613.22622-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:06:13","name":"[v2,4/4] LoongArch:Add Loongson SX/ASX instruction support to LoongArch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907070613.22622-1-chenxiaolong@loongson.cn/mbox/"},{"id":137617,"url":"https://patchwork.plctlab.org/api/1.2/patches/137617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071128.866844-1-jwakely@redhat.com/","msgid":"<20230907071128.866844-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:13","name":"[committed] libstdc++: Avoid -Wunused-parameter warning in testsuite helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071128.866844-1-jwakely@redhat.com/mbox/"},{"id":137616,"url":"https://patchwork.plctlab.org/api/1.2/patches/137616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071134.866862-1-jwakely@redhat.com/","msgid":"<20230907071134.866862-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:29","name":"[committed] libstdc++: Relax range adaptors for move-only types (P2494R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071134.866862-1-jwakely@redhat.com/mbox/"},{"id":137615,"url":"https://patchwork.plctlab.org/api/1.2/patches/137615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071141.866877-1-jwakely@redhat.com/","msgid":"<20230907071141.866877-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:35","name":"[committed] libstdc++: Rename C++20 Customization Point Objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071141.866877-1-jwakely@redhat.com/mbox/"},{"id":137618,"url":"https://patchwork.plctlab.org/api/1.2/patches/137618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071146.866894-1-jwakely@redhat.com/","msgid":"<20230907071146.866894-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:42","name":"[committed] libstdc++: Simplify C++20 poison pill overloads (P2602R2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071146.866894-1-jwakely@redhat.com/mbox/"},{"id":137621,"url":"https://patchwork.plctlab.org/api/1.2/patches/137621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071150.866908-1-jwakely@redhat.com/","msgid":"<20230907071150.866908-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:47","name":"[committed] libstdc++: Fix tests that fail in C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071150.866908-1-jwakely@redhat.com/mbox/"},{"id":137619,"url":"https://patchwork.plctlab.org/api/1.2/patches/137619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071155.866923-1-jwakely@redhat.com/","msgid":"<20230907071155.866923-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T07:11:51","name":"[committed] libstdc++: Fix missing/misplaced { dg-options \"-std=gnu++20\" } in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071155.866923-1-jwakely@redhat.com/mbox/"},{"id":137622,"url":"https://patchwork.plctlab.org/api/1.2/patches/137622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-2-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:09","name":"[v1,2/4] LoongArch:Add vector subtraction arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-2-chenxiaolong@loongson.cn/mbox/"},{"id":137620,"url":"https://patchwork.plctlab.org/api/1.2/patches/137620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-3-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:10","name":"[v1,3/4] LoongArch:Add vector multiplication arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-3-chenxiaolong@loongson.cn/mbox/"},{"id":137623,"url":"https://patchwork.plctlab.org/api/1.2/patches/137623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-4-chenxiaolong@loongson.cn/","msgid":"<20230907071311.23302-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-07T07:13:11","name":"[v1,4/4] LoongArch:Add SX instructions for vector arithmetic operations other than multiplication, addition, and subtraction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907071311.23302-4-chenxiaolong@loongson.cn/mbox/"},{"id":137624,"url":"https://patchwork.plctlab.org/api/1.2/patches/137624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907072831.2168670-1-juzhe.zhong@rivai.ai/","msgid":"<20230907072831.2168670-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T07:28:31","name":"RISC-V: Enable RVV scalable vectorization by default[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907072831.2168670-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137625,"url":"https://patchwork.plctlab.org/api/1.2/patches/137625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b313276b-117a-0c7e-236a-876c9f96db70@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T08:56:04","name":"libgomp.texi: Fix ICV var name, document some memory management routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b313276b-117a-0c7e-236a-876c9f96db70@codesourcery.com/mbox/"},{"id":137626,"url":"https://patchwork.plctlab.org/api/1.2/patches/137626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPmWasamz75b66t1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-07T09:22:50","name":"[committed] middle-end: Avoid calling targetm.c.bitint_type_info inside of gcc_assert [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPmWasamz75b66t1@tucnak/mbox/"},{"id":137627,"url":"https://patchwork.plctlab.org/api/1.2/patches/137627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8cmpc0c.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T09:29:23","name":"Tweak language choice in config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8cmpc0c.fsf@arm.com/mbox/"},{"id":137628,"url":"https://patchwork.plctlab.org/api/1.2/patches/137628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907115526.1454562-1-juzhe.zhong@rivai.ai/","msgid":"<20230907115526.1454562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T11:55:26","name":"RISC-V: Add VLS mask modes mov patterns[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907115526.1454562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137629,"url":"https://patchwork.plctlab.org/api/1.2/patches/137629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133202.1013843-1-jwakely@redhat.com/","msgid":"<20230907133202.1013843-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T13:31:24","name":"libstdc++: Reduce output of '\''make check'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133202.1013843-1-jwakely@redhat.com/mbox/"},{"id":137631,"url":"https://patchwork.plctlab.org/api/1.2/patches/137631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-2-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:27","name":"[01/14] rust: Add skeleton support and documentation for targetrustm hooks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-2-arthur.cohen@embecosm.com/mbox/"},{"id":137630,"url":"https://patchwork.plctlab.org/api/1.2/patches/137630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-3-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:28","name":"[02/14] rust: Reintroduce TARGET_RUST_CPU_INFO hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-3-arthur.cohen@embecosm.com/mbox/"},{"id":137632,"url":"https://patchwork.plctlab.org/api/1.2/patches/137632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-4-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:29","name":"[03/14] rust: Reintroduce TARGET_RUST_OS_INFO hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-4-arthur.cohen@embecosm.com/mbox/"},{"id":137633,"url":"https://patchwork.plctlab.org/api/1.2/patches/137633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-5-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-5-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:30","name":"[04/14] rust: Implement TARGET_RUST_CPU_INFO for i[34567]86-*-* and x86_64-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-5-arthur.cohen@embecosm.com/mbox/"},{"id":137635,"url":"https://patchwork.plctlab.org/api/1.2/patches/137635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-6-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-6-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:31","name":"[05/14] rust: Implement TARGET_RUST_OS_INFO for *-*-darwin*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-6-arthur.cohen@embecosm.com/mbox/"},{"id":137637,"url":"https://patchwork.plctlab.org/api/1.2/patches/137637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-7-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-7-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:32","name":"[06/14] rust: Implement TARGET_RUST_OS_INFO for *-*-freebsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-7-arthur.cohen@embecosm.com/mbox/"},{"id":137639,"url":"https://patchwork.plctlab.org/api/1.2/patches/137639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-8-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-8-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:33","name":"[07/14] rust: Implement TARGET_RUST_OS_INFO for *-*-netbsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-8-arthur.cohen@embecosm.com/mbox/"},{"id":137641,"url":"https://patchwork.plctlab.org/api/1.2/patches/137641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-9-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-9-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:34","name":"[08/14] rust: Implement TARGET_RUST_OS_INFO for *-*-openbsd*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-9-arthur.cohen@embecosm.com/mbox/"},{"id":137643,"url":"https://patchwork.plctlab.org/api/1.2/patches/137643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-10-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-10-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:35","name":"[09/14] rust: Implement TARGET_RUST_OS_INFO for *-*-solaris2*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-10-arthur.cohen@embecosm.com/mbox/"},{"id":137640,"url":"https://patchwork.plctlab.org/api/1.2/patches/137640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-11-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-11-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:36","name":"[10/14] rust: Implement TARGET_RUST_OS_INFO for *-*-dragonfly*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-11-arthur.cohen@embecosm.com/mbox/"},{"id":137634,"url":"https://patchwork.plctlab.org/api/1.2/patches/137634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-12-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-12-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:37","name":"[11/14] rust: Implement TARGET_RUST_OS_INFO for *-*-vxworks*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-12-arthur.cohen@embecosm.com/mbox/"},{"id":137638,"url":"https://patchwork.plctlab.org/api/1.2/patches/137638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-13-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-13-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:38","name":"[12/14] rust: Implement TARGET_RUST_OS_INFO for *-*-fuchsia*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-13-arthur.cohen@embecosm.com/mbox/"},{"id":137636,"url":"https://patchwork.plctlab.org/api/1.2/patches/137636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-14-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-14-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:39","name":"[13/14] rust: Implement TARGET_RUST_OS_INFO for i[34567]86-*-mingw* and x86_64-*-mingw*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-14-arthur.cohen@embecosm.com/mbox/"},{"id":137642,"url":"https://patchwork.plctlab.org/api/1.2/patches/137642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-15-arthur.cohen@embecosm.com/","msgid":"<20230907133729.2518969-15-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-07T13:36:40","name":"[14/14] rust: Implement TARGET_RUST_OS_INFO for *-*-*linux*.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907133729.2518969-15-arthur.cohen@embecosm.com/mbox/"},{"id":137644,"url":"https://patchwork.plctlab.org/api/1.2/patches/137644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907140557.3378043-1-juzhe.zhong@rivai.ai/","msgid":"<20230907140557.3378043-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-07T14:05:57","name":"RISC-V: Replace rtx REG for zero REGS operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907140557.3378043-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137645,"url":"https://patchwork.plctlab.org/api/1.2/patches/137645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1ae20a6-b756-c9dd-6fed-d080de618d48@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T14:06:20","name":"[pushed,PR111225,LRA] : Don'\''t reuse chosen insn alternative with special memory constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1ae20a6-b756-c9dd-6fed-d080de618d48@redhat.com/mbox/"},{"id":137646,"url":"https://patchwork.plctlab.org/api/1.2/patches/137646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A6AA40749B74CAD14C5783EEA@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T14:06:33","name":"ARM: Block predication on atomics [PR111235]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A6AA40749B74CAD14C5783EEA@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":137647,"url":"https://patchwork.plctlab.org/api/1.2/patches/137647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907142217.3753564-1-jcmvbkbc@gmail.com/","msgid":"<20230907142217.3753564-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-09-07T14:22:17","name":"[RFC] gcc: xtensa: use salt/saltu in xtensa_expand_scc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907142217.3753564-1-jcmvbkbc@gmail.com/mbox/"},{"id":137648,"url":"https://patchwork.plctlab.org/api/1.2/patches/137648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPnq6g4nFQzR/RKL@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-07T15:23:22","name":"[v2] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPnq6g4nFQzR/RKL@redhat.com/mbox/"},{"id":137649,"url":"https://patchwork.plctlab.org/api/1.2/patches/137649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160639.1038285-1-jwakely@redhat.com/","msgid":"<20230907160639.1038285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:06:32","name":"[committed] libstdc++: Disable support by default for avr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160639.1038285-1-jwakely@redhat.com/mbox/"},{"id":137650,"url":"https://patchwork.plctlab.org/api/1.2/patches/137650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160737.1038358-1-jwakely@redhat.com/","msgid":"<20230907160737.1038358-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:06:50","name":"[committed] libstdc++: Add autoconf checks for mkdir, chmod, chdir, and getcwd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907160737.1038358-1-jwakely@redhat.com/mbox/"},{"id":137651,"url":"https://patchwork.plctlab.org/api/1.2/patches/137651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161407.27338-2-xry111@xry111.site/","msgid":"<20230907161407.27338-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-07T16:14:08","name":"LoongArch: Use LSX and LASX for block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161407.27338-2-xry111@xry111.site/mbox/"},{"id":137652,"url":"https://patchwork.plctlab.org/api/1.2/patches/137652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161837.4049453-1-sandra@codesourcery.com/","msgid":"<20230907161837.4049453-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-09-07T16:18:37","name":"OpenMP: Fix ICE in fixup_blocks_walker [PR111274]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907161837.4049453-1-sandra@codesourcery.com/mbox/"},{"id":137653,"url":"https://patchwork.plctlab.org/api/1.2/patches/137653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907163336.66198-2-xry111@xry111.site/","msgid":"<20230907163336.66198-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-07T16:33:37","name":"LoongArch: Slightly simplify loongarch_block_move_straight","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907163336.66198-2-xry111@xry111.site/mbox/"},{"id":137654,"url":"https://patchwork.plctlab.org/api/1.2/patches/137654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164136.1050285-1-jwakely@redhat.com/","msgid":"<20230907164136.1050285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:41:25","name":"[committed] libstdc++: Remove trailing whitespace from dejagnu files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164136.1050285-1-jwakely@redhat.com/mbox/"},{"id":137655,"url":"https://patchwork.plctlab.org/api/1.2/patches/137655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164204.1050382-1-jwakely@redhat.com/","msgid":"<20230907164204.1050382-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-07T16:41:53","name":"[committed] libstdc++: Simplify dejagnu target selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907164204.1050382-1-jwakely@redhat.com/mbox/"},{"id":137656,"url":"https://patchwork.plctlab.org/api/1.2/patches/137656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65y4m3p7o.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-09-07T16:47:23","name":"math-opts: Add dbgcounter for FMA formation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri65y4m3p7o.fsf@suse.cz/mbox/"},{"id":137685,"url":"https://patchwork.plctlab.org/api/1.2/patches/137685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com/","msgid":"<6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com>","list_archive_url":null,"date":"2023-09-07T19:21:20","name":"[COMMITTED] PR tree-optimization/110875 - Some ssa-names get incorrectly marked as always_current.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6130f27c-ca74-1d41-6edb-bc6b7cb88890@redhat.com/mbox/"},{"id":137686,"url":"https://patchwork.plctlab.org/api/1.2/patches/137686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi/","msgid":"<93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-09-07T19:30:00","name":"[v2] libstdc++: Fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/93b18ce6-aef3-4d0b-becc-a301aa8bb84d@gcc.mail.kapsi.fi/mbox/"},{"id":137688,"url":"https://patchwork.plctlab.org/api/1.2/patches/137688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907221213.103635-1-aldyh@redhat.com/","msgid":"<20230907221213.103635-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:12:06","name":"[COMMITTED,irange] Fix typo in contains_zero_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907221213.103635-1-aldyh@redhat.com/mbox/"},{"id":137689,"url":"https://patchwork.plctlab.org/api/1.2/patches/137689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224930.883908-1-dmalcolm@redhat.com/","msgid":"<20230907224930.883908-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:49:30","name":"[pushed] analyzer: fix -Wunused-parameter warnings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224930.883908-1-dmalcolm@redhat.com/mbox/"},{"id":137690,"url":"https://patchwork.plctlab.org/api/1.2/patches/137690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224935.883935-1-dmalcolm@redhat.com/","msgid":"<20230907224935.883935-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-07T22:49:35","name":"[pushed] analyzer: basic support for computed gotos (PR analyzer/110529)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230907224935.883935-1-dmalcolm@redhat.com/mbox/"},{"id":137691,"url":"https://patchwork.plctlab.org/api/1.2/patches/137691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com/","msgid":"<59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-08T01:03:13","name":"[RFC,1/1] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e884e254718724df55d9970f8049811081b130.1694134824.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137692,"url":"https://patchwork.plctlab.org/api/1.2/patches/137692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908012659.6629-1-wangfeng@eswincomputing.com/","msgid":"<20230908012659.6629-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-08T01:26:59","name":"[v5] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908012659.6629-1-wangfeng@eswincomputing.com/mbox/"},{"id":137693,"url":"https://patchwork.plctlab.org/api/1.2/patches/137693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908020021.3174-1-guojie@loongson.cn/","msgid":"<20230908020021.3174-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-08T02:00:21","name":"LoongArch: Enable -fsched-pressure by default at -O1 and higher.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908020021.3174-1-guojie@loongson.cn/mbox/"},{"id":137694,"url":"https://patchwork.plctlab.org/api/1.2/patches/137694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908031918.1035385-1-hongtao.liu@intel.com/","msgid":"<20230908031918.1035385-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-08T03:19:18","name":"Remove constraint modifier % for fcmaddcph/fcmulcph since there'\''re not commutative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908031918.1035385-1-hongtao.liu@intel.com/mbox/"},{"id":137696,"url":"https://patchwork.plctlab.org/api/1.2/patches/137696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908052415.3307098-1-lehua.ding@rivai.ai/","msgid":"<20230908052415.3307098-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T05:24:15","name":"Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908052415.3307098-1-lehua.ding@rivai.ai/mbox/"},{"id":137697,"url":"https://patchwork.plctlab.org/api/1.2/patches/137697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908060044.1915195-1-christoph.muellner@vrull.eu/","msgid":"<20230908060044.1915195-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:00:44","name":"riscv: xtheadbb: Fix extendqi insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908060044.1915195-1-christoph.muellner@vrull.eu/mbox/"},{"id":137698,"url":"https://patchwork.plctlab.org/api/1.2/patches/137698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908061600.1922301-1-christoph.muellner@vrull.eu/","msgid":"<20230908061600.1922301-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:16:00","name":"riscv: thead: Fix mode attribute for extension patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908061600.1922301-1-christoph.muellner@vrull.eu/mbox/"},{"id":137699,"url":"https://patchwork.plctlab.org/api/1.2/patches/137699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065330.2367271-1-christoph.muellner@vrull.eu/","msgid":"<20230908065330.2367271-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-09-08T06:53:30","name":"riscv: bitmanip: Remove duplicate zero_extendhi2 pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065330.2367271-1-christoph.muellner@vrull.eu/mbox/"},{"id":137700,"url":"https://patchwork.plctlab.org/api/1.2/patches/137700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065402.3875730-1-lehua.ding@rivai.ai/","msgid":"<20230908065402.3875730-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T06:54:02","name":"[V2] Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908065402.3875730-1-lehua.ding@rivai.ai/mbox/"},{"id":137703,"url":"https://patchwork.plctlab.org/api/1.2/patches/137703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908075203.2597443-1-juzhe.zhong@rivai.ai/","msgid":"<20230908075203.2597443-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-08T07:52:03","name":"RISC-V: Fix incorrect nregs calculation for VLS modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908075203.2597443-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137704,"url":"https://patchwork.plctlab.org/api/1.2/patches/137704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908082027.485267-1-juzhe.zhong@rivai.ai/","msgid":"<20230908082027.485267-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-08T08:20:27","name":"RISC-V: Suppress bogus warning for VLS types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908082027.485267-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137706,"url":"https://patchwork.plctlab.org/api/1.2/patches/137706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908084321.567591-1-christophe.lyon@linaro.org/","msgid":"<20230908084321.567591-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-08T08:43:21","name":"testsuite: Fix gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908084321.567591-1-christophe.lyon@linaro.org/mbox/"},{"id":137707,"url":"https://patchwork.plctlab.org/api/1.2/patches/137707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp/","msgid":"<010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp>","list_archive_url":null,"date":"2023-09-08T08:48:56","name":"xtensa: Optimize several boolean evaluations of EQ/NE against constant zero","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/010fff65-5d8b-774c-fce5-81136424e131@yahoo.co.jp/mbox/"},{"id":137708,"url":"https://patchwork.plctlab.org/api/1.2/patches/137708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908085419.494384-1-lehua.ding@rivai.ai/","msgid":"<20230908085419.494384-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-08T08:54:19","name":"[V3] Support folding min(poly,poly) to const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908085419.494384-1-lehua.ding@rivai.ai/mbox/"},{"id":137709,"url":"https://patchwork.plctlab.org/api/1.2/patches/137709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com/","msgid":"<4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com>","list_archive_url":null,"date":"2023-09-08T09:01:45","name":"gimple-match: Do not try UNCOND optimization with COND_LEN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b77e155-0936-67d6-ab2d-ae7ef49bfde0@gmail.com/mbox/"},{"id":137711,"url":"https://patchwork.plctlab.org/api/1.2/patches/137711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908100434.541577-1-mikael@gcc.gnu.org/","msgid":"<20230908100434.541577-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-08T10:04:34","name":"fortran: Remove redundant tree walk to delete element","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908100434.541577-1-mikael@gcc.gnu.org/mbox/"},{"id":137715,"url":"https://patchwork.plctlab.org/api/1.2/patches/137715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908104923.31154-1-ishitatsuyuki@gmail.com/","msgid":"<20230908104923.31154-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-09-08T10:49:23","name":"[v2] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908104923.31154-1-ishitatsuyuki@gmail.com/mbox/"},{"id":137718,"url":"https://patchwork.plctlab.org/api/1.2/patches/137718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9fafb66-b740-4905-7c96-0a1d98cd2034@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T11:12:17","name":"[committed] Update contrib + libgomp ChangeLogs for failed reject-commit testing (was: [Patch] contrib/gcc-changelog: Check whether revert-commit exists)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b9fafb66-b740-4905-7c96-0a1d98cd2034@codesourcery.com/mbox/"},{"id":137723,"url":"https://patchwork.plctlab.org/api/1.2/patches/137723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ledgzxcl.fsf@euler.schwinge.homeip.net/","msgid":"<87ledgzxcl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-08T12:02:50","name":"More '\''#ifdef ASM_OUTPUT_DEF'\'' -> '\''if (TARGET_SUPPORTS_ALIASES)'\'' etc. (was: [PATCH][v2] Introduce TARGET_SUPPORTS_ALIASES)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87ledgzxcl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137726,"url":"https://patchwork.plctlab.org/api/1.2/patches/137726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPsQipogkYUxlXLK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-08T12:16:10","name":"pretty-print: Fix up pp_wide_int [PR111329]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPsQipogkYUxlXLK@tucnak/mbox/"},{"id":137731,"url":"https://patchwork.plctlab.org/api/1.2/patches/137731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908123955.1196607-1-apinski@marvell.com/","msgid":"<20230908123955.1196607-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-08T12:39:55","name":"Fix PR 111331: wrong code for `a > 28 ? MIN : 29`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908123955.1196607-1-apinski@marvell.com/mbox/"},{"id":137740,"url":"https://patchwork.plctlab.org/api/1.2/patches/137740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908125840.789518-1-arthur.cohen@embecosm.com/","msgid":"<20230908125840.789518-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T12:58:40","name":"libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908125840.789518-1-arthur.cohen@embecosm.com/mbox/"},{"id":137746,"url":"https://patchwork.plctlab.org/api/1.2/patches/137746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908142519.899241-1-arthur.cohen@embecosm.com/","msgid":"<20230908142519.899241-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T14:25:20","name":"[v2] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908142519.899241-1-arthur.cohen@embecosm.com/mbox/"},{"id":137750,"url":"https://patchwork.plctlab.org/api/1.2/patches/137750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908145908.915341-1-arthur.cohen@embecosm.com/","msgid":"<20230908145908.915341-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-08T14:59:09","name":"[v3] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908145908.915341-1-arthur.cohen@embecosm.com/mbox/"},{"id":137761,"url":"https://patchwork.plctlab.org/api/1.2/patches/137761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7icmxvw.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T16:29:39","name":"Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7icmxvw.fsf@arm.com/mbox/"},{"id":137763,"url":"https://patchwork.plctlab.org/api/1.2/patches/137763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908170830.1700395-1-jwakely@redhat.com/","msgid":"<20230908170830.1700395-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-08T17:06:57","name":"[committed] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908170830.1700395-1-jwakely@redhat.com/mbox/"},{"id":137766,"url":"https://patchwork.plctlab.org/api/1.2/patches/137766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com/","msgid":"<368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com>","list_archive_url":null,"date":"2023-09-08T17:54:35","name":"match: Don'\''t sink comparisons into vec_cond operands.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/368038d2-e7a3-522d-18d1-6b04fa182896@gmail.com/mbox/"},{"id":137771,"url":"https://patchwork.plctlab.org/api/1.2/patches/137771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181603.1719292-1-jwakely@redhat.com/","msgid":"<20230908181603.1719292-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-08T18:15:09","name":"[committed] libstdc++: Update outdated default -std in testing docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181603.1719292-1-jwakely@redhat.com/mbox/"},{"id":137772,"url":"https://patchwork.plctlab.org/api/1.2/patches/137772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-2-ewlu@rivosinc.com/","msgid":"<20230908181659.3345602-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-08T18:16:45","name":"[v2,1/5] RISC-V: Update Types for Vector Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-2-ewlu@rivosinc.com/mbox/"},{"id":137774,"url":"https://patchwork.plctlab.org/api/1.2/patches/137774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-3-ewlu@rivosinc.com/","msgid":"<20230908181659.3345602-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-08T18:16:46","name":"[v2,2/5] RISC-V: Add Types for Un-Typed zc Instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908181659.3345602-3-ewlu@rivosinc.com/mbox/"},{"id":137788,"url":"https://patchwork.plctlab.org/api/1.2/patches/137788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPtmwqs+Aywe6ZAR@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-08T18:24:02","name":"[v3] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZPtmwqs+Aywe6ZAR@redhat.com/mbox/"},{"id":137796,"url":"https://patchwork.plctlab.org/api/1.2/patches/137796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908210412.817122-1-aldyh@redhat.com/","msgid":"<20230908210412.817122-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-08T21:04:07","name":"[COMMITTED,frange] Revert relation handling in LTGT_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230908210412.817122-1-aldyh@redhat.com/mbox/"},{"id":137820,"url":"https://patchwork.plctlab.org/api/1.2/patches/137820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043026.2001914-1-juzhe.zhong@rivai.ai/","msgid":"<20230909043026.2001914-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T04:30:26","name":"[Committed] RISC-V: Fix VLS floating-point operations predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043026.2001914-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137821,"url":"https://patchwork.plctlab.org/api/1.2/patches/137821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043814.2002924-1-juzhe.zhong@rivai.ai/","msgid":"<20230909043814.2002924-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T04:38:14","name":"RISC-V: Add VLS modes VEC_PERM support[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909043814.2002924-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137824,"url":"https://patchwork.plctlab.org/api/1.2/patches/137824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0e6dc5d6e4a5cca7f2abf52f0472da0ba9b80fb.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-09-09T07:03:40","name":"Pushed: [PATCH v2] LoongArch: Use LSX and LASX for block move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b0e6dc5d6e4a5cca7f2abf52f0472da0ba9b80fb.camel@xry111.site/mbox/"},{"id":137825,"url":"https://patchwork.plctlab.org/api/1.2/patches/137825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909074209.1187-1-chenglulu@loongson.cn/","msgid":"<20230909074209.1187-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-09T07:42:10","name":"[v1] LoongArch: Fix bug of '\''di3_fake'\''.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909074209.1187-1-chenglulu@loongson.cn/mbox/"},{"id":137826,"url":"https://patchwork.plctlab.org/api/1.2/patches/137826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909082014.100341-1-xry111@xry111.site/","msgid":"<20230909082014.100341-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-09-09T08:20:14","name":"LoongArch: Fix up memcpy-vec-3.c test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909082014.100341-1-xry111@xry111.site/mbox/"},{"id":137827,"url":"https://patchwork.plctlab.org/api/1.2/patches/137827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909084652.2655745-1-manolis.tsamis@vrull.eu/","msgid":"<20230909084652.2655745-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-09-09T08:46:51","name":"[v5] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909084652.2655745-1-manolis.tsamis@vrull.eu/mbox/"},{"id":137833,"url":"https://patchwork.plctlab.org/api/1.2/patches/137833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6o3z7lr.fsf@euler.schwinge.homeip.net/","msgid":"<87h6o3z7lr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-09T15:31:12","name":"Fix false positive for -Walloc-size-larger-than, part II [PR79132] (was: [PATCH] Fix false positive for -Walloc-size-larger-than (PR, bootstrap/79132))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6o3z7lr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":137848,"url":"https://patchwork.plctlab.org/api/1.2/patches/137848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909235744.1744713-1-juzhe.zhong@rivai.ai/","msgid":"<20230909235744.1744713-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-09T23:57:44","name":"RISC-V: Fix dump FILE of VSETVL PASS[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230909235744.1744713-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137849,"url":"https://patchwork.plctlab.org/api/1.2/patches/137849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910023304.1946754-1-juzhe.zhong@rivai.ai/","msgid":"<20230910023304.1946754-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T02:33:04","name":"RISC-V: Expand fixed-vlmax/vls vector permutation in targethook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910023304.1946754-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137852,"url":"https://patchwork.plctlab.org/api/1.2/patches/137852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910035538.2034153-1-juzhe.zhong@rivai.ai/","msgid":"<20230910035538.2034153-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T03:55:38","name":"RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910035538.2034153-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137854,"url":"https://patchwork.plctlab.org/api/1.2/patches/137854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at/","msgid":"<1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at>","list_archive_url":null,"date":"2023-09-10T08:17:29","name":"[C,1/6,v2] c: reorganize recursive type checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1c70f07c413a7880d703f0e5a4204b27c6ac0643.camel@tugraz.at/mbox/"},{"id":137861,"url":"https://patchwork.plctlab.org/api/1.2/patches/137861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf02c66f-a911-8ce0-9249-45bef80b418c@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-10T13:56:11","name":"[11/12/13/14,Regression] ABI break in _Hash_node_value_base since GCC 11 [PR 111050]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf02c66f-a911-8ce0-9249-45bef80b418c@gmail.com/mbox/"},{"id":137862,"url":"https://patchwork.plctlab.org/api/1.2/patches/137862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910140710.2167538-1-juzhe.zhong@rivai.ai/","msgid":"<20230910140710.2167538-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-10T14:07:10","name":"[V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910140710.2167538-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137863,"url":"https://patchwork.plctlab.org/api/1.2/patches/137863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910141022.89898-1-iain@sandoe.co.uk/","msgid":"<20230910141022.89898-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-10T14:10:22","name":"[pushed] Darwin: Partial reversion of r14-3648 (Inits Section).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910141022.89898-1-iain@sandoe.co.uk/mbox/"},{"id":137864,"url":"https://patchwork.plctlab.org/api/1.2/patches/137864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com/","msgid":"<0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-09-10T17:28:32","name":"[v2] swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0976f3cd-9e80-d7bf-ad9a-44e72452aebd@linux.vnet.ibm.com/mbox/"},{"id":137865,"url":"https://patchwork.plctlab.org/api/1.2/patches/137865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-1-christophe.lyon@linaro.org/","msgid":"<20230910193045.3549775-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-10T19:30:44","name":"[1/2] testsuite: Add and use thread_fence effective-target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-1-christophe.lyon@linaro.org/mbox/"},{"id":137866,"url":"https://patchwork.plctlab.org/api/1.2/patches/137866/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-2-christophe.lyon@linaro.org/","msgid":"<20230910193045.3549775-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-10T19:30:45","name":"[2/2] libstdc++: Add dg-require-thread-fence in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230910193045.3549775-2-christophe.lyon@linaro.org/mbox/"},{"id":137867,"url":"https://patchwork.plctlab.org/api/1.2/patches/137867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911011608.312795-1-hongtao.liu@intel.com/","msgid":"<20230911011608.312795-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-09-11T01:16:08","name":"Remove constraint modifier % for fcmaddcph/fmaddcph/fcmulcph since there'\''re not commutative.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911011608.312795-1-hongtao.liu@intel.com/mbox/"},{"id":137868,"url":"https://patchwork.plctlab.org/api/1.2/patches/137868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911021811.1347413-1-apinski@marvell.com/","msgid":"<20230911021811.1347413-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T02:18:11","name":"MATCH: [PR111346] `X CMP MINMAX` pattern missing :c on CMP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911021811.1347413-1-apinski@marvell.com/mbox/"},{"id":137870,"url":"https://patchwork.plctlab.org/api/1.2/patches/137870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032343.2482218-1-juzhe.zhong@rivai.ai/","msgid":"<20230911032343.2482218-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:23:43","name":"[Committed] RISC-V: Add missing VLS mask bool mode reg -> reg patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032343.2482218-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137871,"url":"https://patchwork.plctlab.org/api/1.2/patches/137871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032826.2483079-1-juzhe.zhong@rivai.ai/","msgid":"<20230911032826.2483079-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:28:26","name":"[Committed,V2] RISC-V: Add VLS modes VEC_PERM support[PR111311]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911032826.2483079-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137872,"url":"https://patchwork.plctlab.org/api/1.2/patches/137872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911033359.2484029-1-juzhe.zhong@rivai.ai/","msgid":"<20230911033359.2484029-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T03:33:59","name":"RISC-V: Use dominance analysis in global vsetvl elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911033359.2484029-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137874,"url":"https://patchwork.plctlab.org/api/1.2/patches/137874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-2-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:31","name":"[v3,1/9] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-2-chenxiaolong@loongson.cn/mbox/"},{"id":137873,"url":"https://patchwork.plctlab.org/api/1.2/patches/137873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-3-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:32","name":"[v3,2/9] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-3-chenxiaolong@loongson.cn/mbox/"},{"id":137876,"url":"https://patchwork.plctlab.org/api/1.2/patches/137876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-4-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:33","name":"[v3,3/9] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-4-chenxiaolong@loongson.cn/mbox/"},{"id":137877,"url":"https://patchwork.plctlab.org/api/1.2/patches/137877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-5-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:34","name":"[v3,4/9] LoongArch:Added support for SX vector floating-point instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-5-chenxiaolong@loongson.cn/mbox/"},{"id":137879,"url":"https://patchwork.plctlab.org/api/1.2/patches/137879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-6-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:35","name":"[v3,5/9] LoongArch:Add SX instructions for vector arithmetic addition operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-6-chenxiaolong@loongson.cn/mbox/"},{"id":137875,"url":"https://patchwork.plctlab.org/api/1.2/patches/137875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-7-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:36","name":"[v3,6/9] LoongArch:Add vector subtraction arithmetic operation SX instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-7-chenxiaolong@loongson.cn/mbox/"},{"id":137878,"url":"https://patchwork.plctlab.org/api/1.2/patches/137878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-8-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:37","name":"[v3,7/9] LoongArch:Add vector arithmetic addition vsadd instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-8-chenxiaolong@loongson.cn/mbox/"},{"id":137880,"url":"https://patchwork.plctlab.org/api/1.2/patches/137880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-9-chenxiaolong@loongson.cn/","msgid":"<20230911034439.8266-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:44:38","name":"[v3,8/9] LoongArch:Added SX vector arithmetic multiplication instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034439.8266-9-chenxiaolong@loongson.cn/mbox/"},{"id":137881,"url":"https://patchwork.plctlab.org/api/1.2/patches/137881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034827.8644-1-chenxiaolong@loongson.cn/","msgid":"<20230911034827.8644-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-11T03:48:27","name":"[v3,9/9] LoongArch:Add SX instructions for vector arithmetic operations other than multiplication, addition, and subtraction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911034827.8644-1-chenxiaolong@loongson.cn/mbox/"},{"id":137882,"url":"https://patchwork.plctlab.org/api/1.2/patches/137882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911075727.2536198-1-pan2.li@intel.com/","msgid":"<20230911075727.2536198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-11T07:57:27","name":"[v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911075727.2536198-1-pan2.li@intel.com/mbox/"},{"id":137883,"url":"https://patchwork.plctlab.org/api/1.2/patches/137883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911091930.2592988-1-juzhe.zhong@rivai.ai/","msgid":"<20230911091930.2592988-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:19:30","name":"RISC-V: Remove redundant functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911091930.2592988-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137884,"url":"https://patchwork.plctlab.org/api/1.2/patches/137884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911093846.3341212-1-juzhe.zhong@rivai.ai/","msgid":"<20230911093846.3341212-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:38:46","name":"[V2] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911093846.3341212-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137885,"url":"https://patchwork.plctlab.org/api/1.2/patches/137885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911094107.3342788-1-juzhe.zhong@rivai.ai/","msgid":"<20230911094107.3342788-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-11T09:41:07","name":"[V3] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911094107.3342788-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137886,"url":"https://patchwork.plctlab.org/api/1.2/patches/137886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911110740.1844291-1-jwakely@redhat.com/","msgid":"<20230911110740.1844291-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T11:06:19","name":"libstdc++: Check if getent is available in git config script [PR111359]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911110740.1844291-1-jwakely@redhat.com/mbox/"},{"id":137887,"url":"https://patchwork.plctlab.org/api/1.2/patches/137887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e368e8e6-1032-2dca-4a73-7c556b10d7f7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T11:44:07","name":"OpenMP (C only): omp allocate - extend parsing support, improve diagnostic (was: [Patch] OpenMP (C only): omp allocate - handle stack vars, improve diagnostic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e368e8e6-1032-2dca-4a73-7c556b10d7f7@codesourcery.com/mbox/"},{"id":137888,"url":"https://patchwork.plctlab.org/api/1.2/patches/137888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911123845.1870133-1-mikael@gcc.gnu.org/","msgid":"<20230911123845.1870133-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T12:38:45","name":"fortran: Undo new symbols in all namespaces [PR110996]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911123845.1870133-1-mikael@gcc.gnu.org/mbox/"},{"id":137889,"url":"https://patchwork.plctlab.org/api/1.2/patches/137889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/WBulHlEWtAC34Gaya2RM4wi1XPmBh-8mmo1nSuaXMEDszh07eeF8nzl7-GLWrO4yPF9GAa6DAiGE3IyYkgKCefnp54JfiQZGl4r-C9qy-tU=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T13:49:03","name":"[v2,1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/WBulHlEWtAC34Gaya2RM4wi1XPmBh-8mmo1nSuaXMEDszh07eeF8nzl7-GLWrO4yPF9GAa6DAiGE3IyYkgKCefnp54JfiQZGl4r-C9qy-tU=@protonmail.com/mbox/"},{"id":137890,"url":"https://patchwork.plctlab.org/api/1.2/patches/137890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911135742.1870920-1-jwakely@redhat.com/","msgid":"<20230911135742.1870920-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T13:57:08","name":"[committed] libstdc++: Formatting std::thread::id and std::stacktrace (P2693R1)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911135742.1870920-1-jwakely@redhat.com/mbox/"},{"id":137891,"url":"https://patchwork.plctlab.org/api/1.2/patches/137891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911142328.1378300-1-apinski@marvell.com/","msgid":"<20230911142328.1378300-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T14:23:28","name":"MATCH: [PR111349] add missing :c to cmp in the `(a CMP CST1) ? max : a` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911142328.1378300-1-apinski@marvell.com/mbox/"},{"id":137892,"url":"https://patchwork.plctlab.org/api/1.2/patches/137892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911144243.3506767-2-arthur.cohen@embecosm.com/","msgid":"<20230911144243.3506767-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-11T14:42:25","name":"[COMMITTED] gccrs: move functions from rust-gcc-diagnostics to rust-diagnostics.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911144243.3506767-2-arthur.cohen@embecosm.com/mbox/"},{"id":137893,"url":"https://patchwork.plctlab.org/api/1.2/patches/137893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911152703.22436-1-kmatsui@gcc.gnu.org/","msgid":"<20230911152703.22436-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T15:27:03","name":"libstdc++ Use _GLIBCXX_USE_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911152703.22436-1-kmatsui@gcc.gnu.org/mbox/"},{"id":137894,"url":"https://patchwork.plctlab.org/api/1.2/patches/137894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160811.1912603-1-jwakely@redhat.com/","msgid":"<20230911160811.1912603-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:07:36","name":"[committed] libstdc++: Move __glibcxx_assert_fail to its own file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160811.1912603-1-jwakely@redhat.com/mbox/"},{"id":137895,"url":"https://patchwork.plctlab.org/api/1.2/patches/137895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160836.1912657-1-jwakely@redhat.com/","msgid":"<20230911160836.1912657-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:08:12","name":"[committed] libstdc++: Remove unconditional use of atomics in Debug Mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911160836.1912657-1-jwakely@redhat.com/mbox/"},{"id":137896,"url":"https://patchwork.plctlab.org/api/1.2/patches/137896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-2-jwakely@redhat.com/","msgid":"<20230911163534.1913512-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:32","name":"[01/13] libstdc++: Add support for running tests with multiple -std options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-2-jwakely@redhat.com/mbox/"},{"id":137901,"url":"https://patchwork.plctlab.org/api/1.2/patches/137901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-3-jwakely@redhat.com/","msgid":"<20230911163534.1913512-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:33","name":"[02/13] libstdc++: Replace dg-options \"-std=c++11\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-3-jwakely@redhat.com/mbox/"},{"id":137897,"url":"https://patchwork.plctlab.org/api/1.2/patches/137897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-4-jwakely@redhat.com/","msgid":"<20230911163534.1913512-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:34","name":"[03/13] libstdc++: Replace dg-options \"-std=c++17\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-4-jwakely@redhat.com/mbox/"},{"id":137900,"url":"https://patchwork.plctlab.org/api/1.2/patches/137900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-5-jwakely@redhat.com/","msgid":"<20230911163534.1913512-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:35","name":"[04/13] libstdc++: Replace dg-options \"-std=c++20\" with dg-add-options strict_std","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-5-jwakely@redhat.com/mbox/"},{"id":137905,"url":"https://patchwork.plctlab.org/api/1.2/patches/137905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-6-jwakely@redhat.com/","msgid":"<20230911163534.1913512-6-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:36","name":"[05/13] libstdc++: Remove dg-options \"-std=c++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-6-jwakely@redhat.com/mbox/"},{"id":137898,"url":"https://patchwork.plctlab.org/api/1.2/patches/137898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-7-jwakely@redhat.com/","msgid":"<20230911163534.1913512-7-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:37","name":"[06/13] libstdc++: Remove dg-options \"-std=gnu++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-7-jwakely@redhat.com/mbox/"},{"id":137902,"url":"https://patchwork.plctlab.org/api/1.2/patches/137902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-8-jwakely@redhat.com/","msgid":"<20230911163534.1913512-8-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:38","name":"[07/13] libstdc++: Remove dg-options \"-std=gnu++2a\" from constrained algo tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-8-jwakely@redhat.com/mbox/"},{"id":137906,"url":"https://patchwork.plctlab.org/api/1.2/patches/137906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-9-jwakely@redhat.com/","msgid":"<20230911163534.1913512-9-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:39","name":"[08/13] libstdc++: Remove dg-options \"-std=gnu++20\" from std::format tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-9-jwakely@redhat.com/mbox/"},{"id":137903,"url":"https://patchwork.plctlab.org/api/1.2/patches/137903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-10-jwakely@redhat.com/","msgid":"<20230911163534.1913512-10-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:40","name":"[09/13] libstdc++: Remove dg-options \"-std=gnu++20\" from std::chrono tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-10-jwakely@redhat.com/mbox/"},{"id":137908,"url":"https://patchwork.plctlab.org/api/1.2/patches/137908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-11-jwakely@redhat.com/","msgid":"<20230911163534.1913512-11-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:41","name":"[10/13] libstdc++: Remove dg-options \"-std=gnu++23\" from std::expected tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-11-jwakely@redhat.com/mbox/"},{"id":137909,"url":"https://patchwork.plctlab.org/api/1.2/patches/137909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-12-jwakely@redhat.com/","msgid":"<20230911163534.1913512-12-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:42","name":"[11/13] libstdc++: Remove dg-options \"-std=gnu++23\" from remaining tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-12-jwakely@redhat.com/mbox/"},{"id":137904,"url":"https://patchwork.plctlab.org/api/1.2/patches/137904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-13-jwakely@redhat.com/","msgid":"<20230911163534.1913512-13-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:43","name":"[12/13] libstdc++: Remove dg-options \"-std=gnu++2a\" from XFAIL std::span tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-13-jwakely@redhat.com/mbox/"},{"id":137899,"url":"https://patchwork.plctlab.org/api/1.2/patches/137899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-14-jwakely@redhat.com/","msgid":"<20230911163534.1913512-14-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-11T16:16:44","name":"[13/13] libstdc++: Simplify dejagnu directives for some tests using threads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911163534.1913512-14-jwakely@redhat.com/mbox/"},{"id":137907,"url":"https://patchwork.plctlab.org/api/1.2/patches/137907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sM7F5ffvnEfFwNp0EozHTd1_YCK-4LhC7i-3HkPEZy+1Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T16:43:38","name":"RISC-V: Replace not + bitwise_imm with li + bitwise_not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sM7F5ffvnEfFwNp0EozHTd1_YCK-4LhC7i-3HkPEZy+1Q@mail.gmail.com/mbox/"},{"id":137911,"url":"https://patchwork.plctlab.org/api/1.2/patches/137911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-2-kmatsui@gcc.gnu.org/","msgid":"<20230911170828.73628-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:05:53","name":"[1/2] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137910,"url":"https://patchwork.plctlab.org/api/1.2/patches/137910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-3-kmatsui@gcc.gnu.org/","msgid":"<20230911170828.73628-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:05:54","name":"[2/2] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911170828.73628-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137912,"url":"https://patchwork.plctlab.org/api/1.2/patches/137912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9PdYVr65NKA89b@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-11T17:33:41","name":"sccvn: Avoid ICEs on _BitInt load BIT_AND_EXPR mask [PR111338]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9PdYVr65NKA89b@tucnak/mbox/"},{"id":137913,"url":"https://patchwork.plctlab.org/api/1.2/patches/137913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9RahtJvkQl7PFG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-11T17:42:02","name":"small _BitInt tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZP9RahtJvkQl7PFG@tucnak/mbox/"},{"id":137914,"url":"https://patchwork.plctlab.org/api/1.2/patches/137914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911174433.492082-1-vultkayn@gcc.gnu.org/","msgid":"<20230911174433.492082-1-vultkayn@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T17:44:34","name":"[WIP,RFC] analyzer: Move gcc.dg/analyzer tests to c-c++-common (3) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911174433.492082-1-vultkayn@gcc.gnu.org/mbox/"},{"id":137915,"url":"https://patchwork.plctlab.org/api/1.2/patches/137915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b+HNRom4GLgp6tHZyVkQVeqH=cQpw5X0s6=iq9GmFKug@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-11T18:59:24","name":"[committed] i386: Handle CONST_WIDE_INT in output_pic_addr_const [PR111340]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4b+HNRom4GLgp6tHZyVkQVeqH=cQpw5X0s6=iq9GmFKug@mail.gmail.com/mbox/"},{"id":137916,"url":"https://patchwork.plctlab.org/api/1.2/patches/137916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911203939.1394059-1-apinski@marvell.com/","msgid":"<20230911203939.1394059-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-11T20:39:39","name":"MATCH: [PR111348] add missing :c to cmp in the `(a CMP b) ? minmax : minmax` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911203939.1394059-1-apinski@marvell.com/mbox/"},{"id":137932,"url":"https://patchwork.plctlab.org/api/1.2/patches/137932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-2-kmatsui@gcc.gnu.org/","msgid":"<20230911221328.26133-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T22:11:41","name":"[1/2] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137933,"url":"https://patchwork.plctlab.org/api/1.2/patches/137933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-3-kmatsui@gcc.gnu.org/","msgid":"<20230911221328.26133-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-11T22:11:42","name":"[2/2] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911221328.26133-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137936,"url":"https://patchwork.plctlab.org/api/1.2/patches/137936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911225308.2275313-1-ewlu@rivosinc.com/","msgid":"<20230911225308.2275313-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-09-11T22:52:54","name":"RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230911225308.2275313-1-ewlu@rivosinc.com/mbox/"},{"id":137939,"url":"https://patchwork.plctlab.org/api/1.2/patches/137939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-2-kmatsui@gcc.gnu.org/","msgid":"<20230912001756.87388-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T00:16:05","name":"[1/2] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137940,"url":"https://patchwork.plctlab.org/api/1.2/patches/137940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-3-kmatsui@gcc.gnu.org/","msgid":"<20230912001756.87388-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T00:16:06","name":"[2/2] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912001756.87388-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137941,"url":"https://patchwork.plctlab.org/api/1.2/patches/137941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-1-ppalka@redhat.com/","msgid":"<20230912010852.1027184-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:50","name":"[1/3] libstdc++: Remove std::bind_front specialization for no bound args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-1-ppalka@redhat.com/mbox/"},{"id":137942,"url":"https://patchwork.plctlab.org/api/1.2/patches/137942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-2-ppalka@redhat.com/","msgid":"<20230912010852.1027184-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:51","name":"[2/3] libstdc++: Fix std::bind_front perfect forwarding [PR111327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-2-ppalka@redhat.com/mbox/"},{"id":137943,"url":"https://patchwork.plctlab.org/api/1.2/patches/137943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-3-ppalka@redhat.com/","msgid":"<20230912010852.1027184-3-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-12T01:08:52","name":"[3/3] libstdc++: Fix std::not_fn perfect forwarding [PR111327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912010852.1027184-3-ppalka@redhat.com/mbox/"},{"id":137945,"url":"https://patchwork.plctlab.org/api/1.2/patches/137945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/addbfa6b9ff68058beb7e248812d12d408a5afe6.1694482087.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T01:28:08","name":"[1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/addbfa6b9ff68058beb7e248812d12d408a5afe6.1694482087.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137944,"url":"https://patchwork.plctlab.org/api/1.2/patches/137944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com/","msgid":"<20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-12T01:28:09","name":"[2/2] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20f656ae84cf4312a901eebb9bb784a651066e55.1694482087.git.research_trasio@irq.a4lg.com/mbox/"},{"id":137948,"url":"https://patchwork.plctlab.org/api/1.2/patches/137948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912020825.12497-1-xuli1@eswincomputing.com/","msgid":"<20230912020825.12497-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T02:08:25","name":"RISC-V: Add vcreate intrinsics for RVV tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912020825.12497-1-xuli1@eswincomputing.com/mbox/"},{"id":137949,"url":"https://patchwork.plctlab.org/api/1.2/patches/137949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-2-kmatsui@gcc.gnu.org/","msgid":"<20230912024920.55120-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T02:38:38","name":"[1/2] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137950,"url":"https://patchwork.plctlab.org/api/1.2/patches/137950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-3-kmatsui@gcc.gnu.org/","msgid":"<20230912024920.55120-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T02:38:39","name":"[2/2] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912024920.55120-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137952,"url":"https://patchwork.plctlab.org/api/1.2/patches/137952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912042152.1412606-1-apinski@marvell.com/","msgid":"<20230912042152.1412606-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T04:21:52","name":"MATCH: Simplify (a CMP1 b) ^ (a CMP2 b)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912042152.1412606-1-apinski@marvell.com/mbox/"},{"id":137956,"url":"https://patchwork.plctlab.org/api/1.2/patches/137956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-2-kmatsui@gcc.gnu.org/","msgid":"<20230912044638.14504-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T04:26:18","name":"[1/2] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-2-kmatsui@gcc.gnu.org/mbox/"},{"id":137957,"url":"https://patchwork.plctlab.org/api/1.2/patches/137957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-3-kmatsui@gcc.gnu.org/","msgid":"<20230912044638.14504-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T04:26:19","name":"[2/2] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912044638.14504-3-kmatsui@gcc.gnu.org/mbox/"},{"id":137968,"url":"https://patchwork.plctlab.org/api/1.2/patches/137968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912055415.5786-1-xuli1@eswincomputing.com/","msgid":"<20230912055415.5786-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T05:54:15","name":"RISC-V: Elimilate warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912055415.5786-1-xuli1@eswincomputing.com/mbox/"},{"id":137975,"url":"https://patchwork.plctlab.org/api/1.2/patches/137975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912061304.7564-1-xuli1@eswincomputing.com/","msgid":"<20230912061304.7564-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T06:13:04","name":"[v2] RISC-V: Elimilate warning in class vcreate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912061304.7564-1-xuli1@eswincomputing.com/mbox/"},{"id":137977,"url":"https://patchwork.plctlab.org/api/1.2/patches/137977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912062013.9221-1-xuli1@eswincomputing.com/","msgid":"<20230912062013.9221-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T06:20:13","name":"[v3] RISC-V: Elimilate warning in class vcreate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912062013.9221-1-xuli1@eswincomputing.com/mbox/"},{"id":137980,"url":"https://patchwork.plctlab.org/api/1.2/patches/137980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912064932.647337-1-juzhe.zhong@rivai.ai/","msgid":"<20230912064932.647337-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T06:49:32","name":"[V4] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912064932.647337-1-juzhe.zhong@rivai.ai/mbox/"},{"id":137985,"url":"https://patchwork.plctlab.org/api/1.2/patches/137985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQANHzUrgBvCqzc2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:02:55","name":"testsuite work-around compound-assignment-1.c C++ failures on various targets [PR111377]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQANHzUrgBvCqzc2@tucnak/mbox/"},{"id":137993,"url":"https://patchwork.plctlab.org/api/1.2/patches/137993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c046d64f-b97e-c2e3-cd77-60f39cc03cf2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:18:38","name":"[PING,^0] rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c046d64f-b97e-c2e3-cd77-60f39cc03cf2@linux.ibm.com/mbox/"},{"id":137994,"url":"https://patchwork.plctlab.org/api/1.2/patches/137994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com/","msgid":"<6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com>","list_archive_url":null,"date":"2023-09-12T07:20:07","name":"[PING,^0,3/4] Improve functionality of ree pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6854c0cd-9a9b-eb6d-5ea9-8999ec41b3eb@linux.ibm.com/mbox/"},{"id":137995,"url":"https://patchwork.plctlab.org/api/1.2/patches/137995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912072038.1230798-1-pan2.li@intel.com/","msgid":"<20230912072038.1230798-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T07:20:38","name":"[v2] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912072038.1230798-1-pan2.li@intel.com/mbox/"},{"id":137997,"url":"https://patchwork.plctlab.org/api/1.2/patches/137997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com/","msgid":"<5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com>","list_archive_url":null,"date":"2023-09-12T07:21:28","name":"[PING^5] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ad7cdca-63e1-73af-b38d-d58898e21ef9@linux.ibm.com/mbox/"},{"id":138003,"url":"https://patchwork.plctlab.org/api/1.2/patches/138003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-2-kmatsui@gcc.gnu.org/","msgid":"<20230912074423.5248-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T07:23:28","name":"[1/2] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-2-kmatsui@gcc.gnu.org/mbox/"},{"id":138005,"url":"https://patchwork.plctlab.org/api/1.2/patches/138005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-3-kmatsui@gcc.gnu.org/","msgid":"<20230912074423.5248-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-12T07:23:29","name":"[2/2] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912074423.5248-3-kmatsui@gcc.gnu.org/mbox/"},{"id":138007,"url":"https://patchwork.plctlab.org/api/1.2/patches/138007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba6b6653-c926-6a49-a3b3-659d4af2b3a2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T07:46:48","name":"[PING^3,v8] tree-ssa-sink: Improve code sinking pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ba6b6653-c926-6a49-a3b3-659d4af2b3a2@linux.ibm.com/mbox/"},{"id":138032,"url":"https://patchwork.plctlab.org/api/1.2/patches/138032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edj3zsns.fsf@euler.schwinge.homeip.net/","msgid":"<87edj3zsns.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T08:45:27","name":"testsuite: Port '\''check-function-bodies'\'' to nvptx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edj3zsns.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138033,"url":"https://patchwork.plctlab.org/api/1.2/patches/138033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912084613.1552014-1-pan2.li@intel.com/","msgid":"<20230912084613.1552014-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T08:46:13","name":"[v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912084613.1552014-1-pan2.li@intel.com/mbox/"},{"id":138037,"url":"https://patchwork.plctlab.org/api/1.2/patches/138037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912085728.2155459-1-lehua.ding@rivai.ai/","msgid":"<20230912085728.2155459-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T08:57:28","name":"RISC-V: Add missed cond autovec testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912085728.2155459-1-lehua.ding@rivai.ai/mbox/"},{"id":138040,"url":"https://patchwork.plctlab.org/api/1.2/patches/138040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bke7zrw5.fsf@euler.schwinge.homeip.net/","msgid":"<87bke7zrw5.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:02:02","name":"nvptx '\''TARGET_USE_LOCAL_THUNK_ALIAS_P'\'', '\''TARGET_SUPPORTS_ALIASES'\'' (was: [committed][nvptx] Use .alias directive for mptx >= 6.3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bke7zrw5.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138048,"url":"https://patchwork.plctlab.org/api/1.2/patches/138048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912091805.2322-1-wangfeng@eswincomputing.com/","msgid":"<20230912091805.2322-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-09-12T09:18:05","name":"[v6] RISC-V:Optimize the MASK opt generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912091805.2322-1-wangfeng@eswincomputing.com/mbox/"},{"id":138062,"url":"https://patchwork.plctlab.org/api/1.2/patches/138062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y4fzqca.fsf@euler.schwinge.homeip.net/","msgid":"<875y4fzqca.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:35:33","name":"Pass '\''SYSROOT_CFLAGS_FOR_TARGET'\'' down to target libraries [PR109951] (was: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y4fzqca.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138064,"url":"https://patchwork.plctlab.org/api/1.2/patches/138064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jjzzqc2.fsf@euler.schwinge.homeip.net/","msgid":"<874jjzzqc2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T09:35:41","name":"libgomp: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR91884, PR109951] (was: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jjzzqc2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138077,"url":"https://patchwork.plctlab.org/api/1.2/patches/138077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-2-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-2-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:03","name":"[v2,01/11] Native complex ops : Conditional lowering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-2-snoiry@kalrayinc.com/mbox/"},{"id":138078,"url":"https://patchwork.plctlab.org/api/1.2/patches/138078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-3-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-3-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:04","name":"[v2,02/11] Native complex ops: Move functions to hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-3-snoiry@kalrayinc.com/mbox/"},{"id":138076,"url":"https://patchwork.plctlab.org/api/1.2/patches/138076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-4-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-4-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:05","name":"[v2,03/11] Native complex ops: Add gen_rtx_complex hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-4-snoiry@kalrayinc.com/mbox/"},{"id":138082,"url":"https://patchwork.plctlab.org/api/1.2/patches/138082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-5-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-5-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:06","name":"[v2,04/11] Native complex ops: Allow native complex regs and ops in rtl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-5-snoiry@kalrayinc.com/mbox/"},{"id":138085,"url":"https://patchwork.plctlab.org/api/1.2/patches/138085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-6-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-6-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:07","name":"[v2,05/11] Native complex ops: Add the conjugate op in optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-6-snoiry@kalrayinc.com/mbox/"},{"id":138080,"url":"https://patchwork.plctlab.org/api/1.2/patches/138080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-7-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-7-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:08","name":"[v2,06/11] Native complex ops: Update how complex rotations are handled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-7-snoiry@kalrayinc.com/mbox/"},{"id":138086,"url":"https://patchwork.plctlab.org/api/1.2/patches/138086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-8-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-8-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:09","name":"[v2,07/11] Native complex ops: Vectorization of native complex operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-8-snoiry@kalrayinc.com/mbox/"},{"id":138079,"url":"https://patchwork.plctlab.org/api/1.2/patches/138079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-9-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-9-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:10","name":"[v2,08/11] Native complex ops: Add explicit vector of complex","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-9-snoiry@kalrayinc.com/mbox/"},{"id":138083,"url":"https://patchwork.plctlab.org/api/1.2/patches/138083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-10-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-10-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:11","name":"[v2,09/11] Native complex ops: remove useless special cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-10-snoiry@kalrayinc.com/mbox/"},{"id":138081,"url":"https://patchwork.plctlab.org/api/1.2/patches/138081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-11-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-11-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:12","name":"[v2,10/11] Native complex ops: Add a fast complex multiplication pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-11-snoiry@kalrayinc.com/mbox/"},{"id":138084,"url":"https://patchwork.plctlab.org/api/1.2/patches/138084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-12-snoiry@kalrayinc.com/","msgid":"<20230912100713.1074-12-snoiry@kalrayinc.com>","list_archive_url":null,"date":"2023-09-12T10:07:13","name":"[v2,11/11] Native complex ops: Experimental support in x86 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912100713.1074-12-snoiry@kalrayinc.com/mbox/"},{"id":138095,"url":"https://patchwork.plctlab.org/api/1.2/patches/138095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qf3zmi4.fsf@euler.schwinge.homeip.net/","msgid":"<871qf3zmi4.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T10:58:27","name":"libffi: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH v5 GCC] libffi/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qf3zmi4.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138096,"url":"https://patchwork.plctlab.org/api/1.2/patches/138096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912110026.2310378-1-juzhe.zhong@rivai.ai/","msgid":"<20230912110026.2310378-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T11:00:25","name":"[V5] RISC-V: Support Dynamic LMUL Cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912110026.2310378-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138098,"url":"https://patchwork.plctlab.org/api/1.2/patches/138098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1hby7pb.fsf@euler.schwinge.homeip.net/","msgid":"<87y1hby7pb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T11:03:28","name":"libatomic: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH v4 1/5] libatomic/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1hby7pb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138102,"url":"https://patchwork.plctlab.org/api/1.2/patches/138102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7jy73y.fsf@euler.schwinge.homeip.net/","msgid":"<87sf7jy73y.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-12T11:16:17","name":"libgo: Consider '\''--with-build-sysroot=[...]'\'' for target libraries'\'' build-tree testing (instead of build-time '\''CC'\'' etc.) [PR109951] (was: [PATCH 3/4] libgo/test: Fix compilation for build sysroot)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf7jy73y.fsf@euler.schwinge.homeip.net/mbox/"},{"id":138117,"url":"https://patchwork.plctlab.org/api/1.2/patches/138117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114520.1978760-1-jwakely@redhat.com/","msgid":"<20230912114520.1978760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T11:45:08","name":"[committed] libstdc++: Format Python code according to PEP8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114520.1978760-1-jwakely@redhat.com/mbox/"},{"id":138118,"url":"https://patchwork.plctlab.org/api/1.2/patches/138118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114534.1978778-1-jwakely@redhat.com/","msgid":"<20230912114534.1978778-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T11:45:21","name":"[committed] contrib: Quote variable in test expression [PR111360]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912114534.1978778-1-jwakely@redhat.com/mbox/"},{"id":138167,"url":"https://patchwork.plctlab.org/api/1.2/patches/138167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912130254.1658075-1-pan2.li@intel.com/","msgid":"<20230912130254.1658075-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-12T13:02:54","name":"[v1] RISC-V: Remove unused structure in cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912130254.1658075-1-pan2.li@intel.com/mbox/"},{"id":138178,"url":"https://patchwork.plctlab.org/api/1.2/patches/138178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912131927.83094-1-juzhe.zhong@rivai.ai/","msgid":"<20230912131927.83094-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T13:19:27","name":"RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912131927.83094-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138184,"url":"https://patchwork.plctlab.org/api/1.2/patches/138184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912133202.94470-1-juzhe.zhong@rivai.ai/","msgid":"<20230912133202.94470-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-12T13:32:02","name":"[V2] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912133202.94470-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138190,"url":"https://patchwork.plctlab.org/api/1.2/patches/138190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912134044.1993413-1-jwakely@redhat.com/","msgid":"<20230912134044.1993413-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-12T13:39:52","name":"[14/13] libstdc++: Re-initialize static data files used by tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912134044.1993413-1-jwakely@redhat.com/mbox/"},{"id":138218,"url":"https://patchwork.plctlab.org/api/1.2/patches/138218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com/","msgid":"<10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com>","list_archive_url":null,"date":"2023-09-12T14:27:31","name":"libgomp, nvptx, amdgcn: parallel reverse offload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10e18da8-78b3-465f-8685-b8881d690357@codesourcery.com/mbox/"},{"id":138249,"url":"https://patchwork.plctlab.org/api/1.2/patches/138249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-2-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:11","name":"[01/19] aarch64: Use local frame vars in shrink-wrapping code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-2-richard.sandiford@arm.com/mbox/"},{"id":138254,"url":"https://patchwork.plctlab.org/api/1.2/patches/138254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-3-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:12","name":"[02/19] aarch64: Avoid a use of callee_offset","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-3-richard.sandiford@arm.com/mbox/"},{"id":138260,"url":"https://patchwork.plctlab.org/api/1.2/patches/138260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-4-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:13","name":"[03/19] aarch64: Explicitly handle frames with no saved registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-4-richard.sandiford@arm.com/mbox/"},{"id":138266,"url":"https://patchwork.plctlab.org/api/1.2/patches/138266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-5-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:14","name":"[04/19] aarch64: Add bytes_below_saved_regs to frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-5-richard.sandiford@arm.com/mbox/"},{"id":138252,"url":"https://patchwork.plctlab.org/api/1.2/patches/138252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-6-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:15","name":"[05/19] aarch64: Add bytes_below_hard_fp to frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-6-richard.sandiford@arm.com/mbox/"},{"id":138255,"url":"https://patchwork.plctlab.org/api/1.2/patches/138255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-7-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:16","name":"[06/19] aarch64: Tweak aarch64_save/restore_callee_saves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-7-richard.sandiford@arm.com/mbox/"},{"id":138251,"url":"https://patchwork.plctlab.org/api/1.2/patches/138251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-8-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-8-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:17","name":"[07/19] aarch64: Only calculate chain_offset if there is a chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-8-richard.sandiford@arm.com/mbox/"},{"id":138270,"url":"https://patchwork.plctlab.org/api/1.2/patches/138270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-9-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-9-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:18","name":"[08/19] aarch64: Rename locals_offset to bytes_above_locals","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-9-richard.sandiford@arm.com/mbox/"},{"id":138259,"url":"https://patchwork.plctlab.org/api/1.2/patches/138259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-10-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-10-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:19","name":"[09/19] aarch64: Rename hard_fp_offset to bytes_above_hard_fp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-10-richard.sandiford@arm.com/mbox/"},{"id":138262,"url":"https://patchwork.plctlab.org/api/1.2/patches/138262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-11-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-11-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:20","name":"[10/19] aarch64: Tweak frame_size comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-11-richard.sandiford@arm.com/mbox/"},{"id":138258,"url":"https://patchwork.plctlab.org/api/1.2/patches/138258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-12-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-12-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:21","name":"[11/19] aarch64: Measure reg_offset from the bottom of the frame","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-12-richard.sandiford@arm.com/mbox/"},{"id":138253,"url":"https://patchwork.plctlab.org/api/1.2/patches/138253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-13-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-13-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:22","name":"[12/19] aarch64: Simplify top of frame allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-13-richard.sandiford@arm.com/mbox/"},{"id":138263,"url":"https://patchwork.plctlab.org/api/1.2/patches/138263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-14-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-14-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:23","name":"[13/19] aarch64: Minor initial adjustment tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-14-richard.sandiford@arm.com/mbox/"},{"id":138267,"url":"https://patchwork.plctlab.org/api/1.2/patches/138267/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-15-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-15-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:24","name":"[14/19] aarch64: Tweak stack clash boundary condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-15-richard.sandiford@arm.com/mbox/"},{"id":138265,"url":"https://patchwork.plctlab.org/api/1.2/patches/138265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-16-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-16-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:25","name":"[15/19] aarch64: Put LR save probe in first 16 bytes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-16-richard.sandiford@arm.com/mbox/"},{"id":138271,"url":"https://patchwork.plctlab.org/api/1.2/patches/138271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-17-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-17-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:26","name":"[16/19] aarch64: Simplify probe of final frame allocation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-17-richard.sandiford@arm.com/mbox/"},{"id":138273,"url":"https://patchwork.plctlab.org/api/1.2/patches/138273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-18-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-18-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:27","name":"[17/19] aarch64: Explicitly record probe registers in frame info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-18-richard.sandiford@arm.com/mbox/"},{"id":138268,"url":"https://patchwork.plctlab.org/api/1.2/patches/138268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-19-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-19-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:28","name":"[18/19] aarch64: Remove below_hard_fp_saved_regs_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-19-richard.sandiford@arm.com/mbox/"},{"id":138272,"url":"https://patchwork.plctlab.org/api/1.2/patches/138272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-20-richard.sandiford@arm.com/","msgid":"<20230912152529.3322336-20-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-09-12T15:25:29","name":"[19/19] aarch64: Make stack smash canary protect saved registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152529.3322336-20-richard.sandiford@arm.com/mbox/"},{"id":138256,"url":"https://patchwork.plctlab.org/api/1.2/patches/138256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-1-apinski@marvell.com/","msgid":"<20230912152542.1440800-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T15:25:41","name":"[1/2] MATCH: [PR111364] Add some more minmax cmp operand simplifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-1-apinski@marvell.com/mbox/"},{"id":138274,"url":"https://patchwork.plctlab.org/api/1.2/patches/138274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-2-apinski@marvell.com/","msgid":"<20230912152542.1440800-2-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T15:25:42","name":"[2/2] MATCH: Move `X <= MAX(X, Y)` before `MIN (X, C1) < C2` pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912152542.1440800-2-apinski@marvell.com/mbox/"},{"id":138295,"url":"https://patchwork.plctlab.org/api/1.2/patches/138295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162514.2001863-1-lehua.ding@rivai.ai/","msgid":"<20230912162514.2001863-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:14","name":"RISC-V: Support cond vfsgnj.vv autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162514.2001863-1-lehua.ding@rivai.ai/mbox/"},{"id":138294,"url":"https://patchwork.plctlab.org/api/1.2/patches/138294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162527.2001917-1-lehua.ding@rivai.ai/","msgid":"<20230912162527.2001917-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:27","name":"RISC-V: Support cond vnsrl/vnsra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162527.2001917-1-lehua.ding@rivai.ai/mbox/"},{"id":138297,"url":"https://patchwork.plctlab.org/api/1.2/patches/138297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162540.2001990-1-lehua.ding@rivai.ai/","msgid":"<20230912162540.2001990-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-12T16:25:40","name":"RISC-V: Support cond vmulh.vv and vmulu.vv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912162540.2001990-1-lehua.ding@rivai.ai/mbox/"},{"id":138303,"url":"https://patchwork.plctlab.org/api/1.2/patches/138303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com/","msgid":"<92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com>","list_archive_url":null,"date":"2023-09-12T16:32:44","name":"[OG13,committed] libgomp, nvptx, amdgcn: parallel reverse offload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92f2b058-5004-4df0-a08a-4d193ef55a9a@codesourcery.com/mbox/"},{"id":138308,"url":"https://patchwork.plctlab.org/api/1.2/patches/138308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcff01b9-29c7-df6a-cab3-4883e7db95a3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T16:39:59","name":"[v1] rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bcff01b9-29c7-df6a-cab3-4883e7db95a3@linux.ibm.com/mbox/"},{"id":138331,"url":"https://patchwork.plctlab.org/api/1.2/patches/138331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172703.1929911-1-jason@redhat.com/","msgid":"<20230912172703.1929911-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:27:03","name":"[pushed] c++: ICE with -fno-exceptions and array init [PR107198]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172703.1929911-1-jason@redhat.com/mbox/"},{"id":138333,"url":"https://patchwork.plctlab.org/api/1.2/patches/138333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172744.1930180-1-jason@redhat.com/","msgid":"<20230912172744.1930180-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:27:44","name":"[pushed] c++: __integer_pack with class argument [PR111357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912172744.1930180-1-jason@redhat.com/mbox/"},{"id":138335,"url":"https://patchwork.plctlab.org/api/1.2/patches/138335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912173036.1930553-1-jason@redhat.com/","msgid":"<20230912173036.1930553-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-12T17:30:36","name":"[RFC] diagnostic: add permerror variants with opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912173036.1930553-1-jason@redhat.com/mbox/"},{"id":138381,"url":"https://patchwork.plctlab.org/api/1.2/patches/138381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912185436.314306-1-patrick@rivosinc.com/","msgid":"<20230912185436.314306-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-12T18:54:36","name":"check_GNU_style.py: Skip .md square bracket linting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912185436.314306-1-patrick@rivosinc.com/mbox/"},{"id":138390,"url":"https://patchwork.plctlab.org/api/1.2/patches/138390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sN-VprzcsPFuDwoQ+U0n+n-G+MU6+yTRqsD159qhdnsxw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-12T19:09:07","name":"[V2] RISC-V: Replace not + bitwise_imm with li + bitwise_not","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHso6sN-VprzcsPFuDwoQ+U0n+n-G+MU6+yTRqsD159qhdnsxw@mail.gmail.com/mbox/"},{"id":138459,"url":"https://patchwork.plctlab.org/api/1.2/patches/138459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912221013.1456582-1-apinski@marvell.com/","msgid":"<20230912221013.1456582-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-12T22:10:13","name":"MATCH: Simplify `(X % Y) < Y` pattern.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230912221013.1456582-1-apinski@marvell.com/mbox/"},{"id":138501,"url":"https://patchwork.plctlab.org/api/1.2/patches/138501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913003320.1896552-1-ppalka@redhat.com/","msgid":"<20230913003320.1896552-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T00:33:20","name":"c++: always check arity before deduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913003320.1896552-1-ppalka@redhat.com/mbox/"},{"id":138511,"url":"https://patchwork.plctlab.org/api/1.2/patches/138511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913005422.17544-1-chenglulu@loongson.cn/","msgid":"<20230913005422.17544-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-13T00:54:23","name":"[v2] LoongArch: Fix bug of '\''di3_fake'\''.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913005422.17544-1-chenglulu@loongson.cn/mbox/"},{"id":138572,"url":"https://patchwork.plctlab.org/api/1.2/patches/138572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913031116.19464-1-chenglulu@loongson.cn/","msgid":"<20230913031116.19464-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:11:16","name":"LoongArch: Change the value of branch_cost from 2 to 6.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913031116.19464-1-chenglulu@loongson.cn/mbox/"},{"id":138576,"url":"https://patchwork.plctlab.org/api/1.2/patches/138576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913032235.2853225-1-juzhe.zhong@rivai.ai/","msgid":"<20230913032235.2853225-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T03:22:35","name":"[committed] RISC-V: Remove redundant ABI test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913032235.2853225-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138578,"url":"https://patchwork.plctlab.org/api/1.2/patches/138578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-2-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:26","name":"[v4,01/23] LoongArch: Add tests of -mstrict-align option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-2-chenxiaolong@loongson.cn/mbox/"},{"id":138579,"url":"https://patchwork.plctlab.org/api/1.2/patches/138579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-3-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:27","name":"[v4,02/23] LoongArch: Add testsuite framework for Loongson SX/ASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-3-chenxiaolong@loongson.cn/mbox/"},{"id":138580,"url":"https://patchwork.plctlab.org/api/1.2/patches/138580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-4-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:28","name":"[v4,03/23] LoongArch: Add tests for Loongson SX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-4-chenxiaolong@loongson.cn/mbox/"},{"id":138581,"url":"https://patchwork.plctlab.org/api/1.2/patches/138581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-5-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:29","name":"[v4,04/23] LoongArch: Add tests for SX vector floating-point instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-5-chenxiaolong@loongson.cn/mbox/"},{"id":138582,"url":"https://patchwork.plctlab.org/api/1.2/patches/138582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-6-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:30","name":"[v4,05/23] LoongArch: Add tests for SX vector addition instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-6-chenxiaolong@loongson.cn/mbox/"},{"id":138583,"url":"https://patchwork.plctlab.org/api/1.2/patches/138583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-7-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:31","name":"[v4,06/23] LoongArch: Add tests for SX vector subtraction instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-7-chenxiaolong@loongson.cn/mbox/"},{"id":138585,"url":"https://patchwork.plctlab.org/api/1.2/patches/138585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-8-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:32","name":"[v4,07/23] LoongArch: Add tests for SX vector addition vsadd instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-8-chenxiaolong@loongson.cn/mbox/"},{"id":138584,"url":"https://patchwork.plctlab.org/api/1.2/patches/138584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-9-chenxiaolong@loongson.cn/","msgid":"<20230913033148.5752-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:31:33","name":"[v4,08/23] LoongArch: Add tests for the SX vector multiplication instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033148.5752-9-chenxiaolong@loongson.cn/mbox/"},{"id":138586,"url":"https://patchwork.plctlab.org/api/1.2/patches/138586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033443.5912-1-chenxiaolong@loongson.cn/","msgid":"<20230913033443.5912-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:34:43","name":"[v4,09/23] LoongArch: Add tests for SX vector vavg/vavgr instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033443.5912-1-chenxiaolong@loongson.cn/mbox/"},{"id":138592,"url":"https://patchwork.plctlab.org/api/1.2/patches/138592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-1-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:13","name":"[v4,10/23] LoongArch: Add tests for SX vector vmax/vmaxi/vmin/vmini instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-1-chenxiaolong@loongson.cn/mbox/"},{"id":138595,"url":"https://patchwork.plctlab.org/api/1.2/patches/138595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-2-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:14","name":"[v4,11/23] LoongArch: Add tests for SX vector vexth/vextl/vldi/vneg/vsat instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-2-chenxiaolong@loongson.cn/mbox/"},{"id":138589,"url":"https://patchwork.plctlab.org/api/1.2/patches/138589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-3-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:15","name":"[v4,12/23] LoongArch: Add tests for SX vector vabsd/vmskgez/vmskltz/vmsknz/vsigncov instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-3-chenxiaolong@loongson.cn/mbox/"},{"id":138588,"url":"https://patchwork.plctlab.org/api/1.2/patches/138588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-4-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:16","name":"[v4,13/23] LoongArch: Add tests for SX vector vdiv/vmod instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-4-chenxiaolong@loongson.cn/mbox/"},{"id":138591,"url":"https://patchwork.plctlab.org/api/1.2/patches/138591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-5-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:17","name":"[v4,14/23] LoongArch: Add tests for SX vector vsll/vslli/vsrl/vsrli/vsrln/vsrlni/vsrlr /vsrlri/vslrlrn/vsrlrni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-5-chenxiaolong@loongson.cn/mbox/"},{"id":138590,"url":"https://patchwork.plctlab.org/api/1.2/patches/138590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-6-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:18","name":"[v4,15/23] LoongArch: Add tests for SX vector vrotr/vrotri/vsra/vsrai/vsran/vsrani /vsrarn/vsrarni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-6-chenxiaolong@loongson.cn/mbox/"},{"id":138594,"url":"https://patchwork.plctlab.org/api/1.2/patches/138594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-7-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:19","name":"[v4,16/23] LoongArch: Add tests for SX vector vssran/vssrani/vssrarn/vssrarni/vssrln /vssrlni/vssrlrn/vssrlrni instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-7-chenxiaolong@loongson.cn/mbox/"},{"id":138600,"url":"https://patchwork.plctlab.org/api/1.2/patches/138600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-8-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:20","name":"[v4,17/23] LoongArch: Add tests for SX vector vbitclr/vbitclri/vbitrev/vbitrevi/ vbitsel/vbitseli/vbitset/vbitseti/vclo/vclz/vpcnt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-8-chenxiaolong@loongson.cn/mbox/"},{"id":138593,"url":"https://patchwork.plctlab.org/api/1.2/patches/138593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-9-chenxiaolong@loongson.cn/","msgid":"<20230913033522.5983-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:35:21","name":"[v4,18/23] LoongArch: Add tests for SX vector floating point arithmetic instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033522.5983-9-chenxiaolong@loongson.cn/mbox/"},{"id":138598,"url":"https://patchwork.plctlab.org/api/1.2/patches/138598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033638.6181-1-chenxiaolong@loongson.cn/","msgid":"<20230913033638.6181-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:36:37","name":"[v4,19/23] LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseqi/vsle /vslei/vslt/vslti instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033638.6181-1-chenxiaolong@loongson.cn/mbox/"},{"id":138604,"url":"https://patchwork.plctlab.org/api/1.2/patches/138604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-1-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:23","name":"[v4,20/23] LoongArch: Add tests for SX vector vfcmp instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-1-chenxiaolong@loongson.cn/mbox/"},{"id":138601,"url":"https://patchwork.plctlab.org/api/1.2/patches/138601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-2-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:24","name":"[v4,21/23] LoongArch: Add tests for SX vector handling and shuffle instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-2-chenxiaolong@loongson.cn/mbox/"},{"id":138599,"url":"https://patchwork.plctlab.org/api/1.2/patches/138599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-3-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:25","name":"[v4,22/23] LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vori/vnor/ vnori/vxor/vxori instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-3-chenxiaolong@loongson.cn/mbox/"},{"id":138602,"url":"https://patchwork.plctlab.org/api/1.2/patches/138602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-4-chenxiaolong@loongson.cn/","msgid":"<20230913033726.6408-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:37:26","name":"[v4,23/23] LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033726.6408-4-chenxiaolong@loongson.cn/mbox/"},{"id":138605,"url":"https://patchwork.plctlab.org/api/1.2/patches/138605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-2-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:38","name":"[v4,01/22] LoongArch: Add tests for ASX vector xvadd/xvadda/xvaddi/xvaddwev/ xvaddwodxvsadd instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-2-chenxiaolong@loongson.cn/mbox/"},{"id":138607,"url":"https://patchwork.plctlab.org/api/1.2/patches/138607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-3-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:39","name":"[v4,02/22] LoongArch: Add tests for ASX vector xvhadd/xvhaddw/xvmaddwev/xvmaddwod instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-3-chenxiaolong@loongson.cn/mbox/"},{"id":138608,"url":"https://patchwork.plctlab.org/api/1.2/patches/138608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-4-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:40","name":"[v4,03/22] LoongArch: Add tests for ASX vector subtraction instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-4-chenxiaolong@loongson.cn/mbox/"},{"id":138613,"url":"https://patchwork.plctlab.org/api/1.2/patches/138613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-5-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:41","name":"[v4,04/22] LoongArch: Add tests for ASX vector xvmul/xvmod/xvdiv instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-5-chenxiaolong@loongson.cn/mbox/"},{"id":138615,"url":"https://patchwork.plctlab.org/api/1.2/patches/138615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-6-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:42","name":"[v4,05/22] LoongArch: Add tests for ASX vector xvmax/xvmaxi/xvmin/xvmini instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-6-chenxiaolong@loongson.cn/mbox/"},{"id":138612,"url":"https://patchwork.plctlab.org/api/1.2/patches/138612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-7-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:43","name":"[v4,06/22] LoongArch: Add tests for ASX vector xvldi/xvmskgez/xvmskltz/xvmsknz/xvmuh /xvsigncov instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-7-chenxiaolong@loongson.cn/mbox/"},{"id":138617,"url":"https://patchwork.plctlab.org/api/1.2/patches/138617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-8-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:44","name":"[v4,07/22] LoongArch: Add tests for ASX vector xvand/xvandi/xvandn/xvor/xvori/ xvnor/xvnori/xvxor/xvxori instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-8-chenxiaolong@loongson.cn/mbox/"},{"id":138609,"url":"https://patchwork.plctlab.org/api/1.2/patches/138609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-9-chenxiaolong@loongson.cn/","msgid":"<20230913033859.6734-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:38:45","name":"[v4,08/22] LoongArch: Add tests for ASX vector xvsll/xvsrl instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913033859.6734-9-chenxiaolong@loongson.cn/mbox/"},{"id":138616,"url":"https://patchwork.plctlab.org/api/1.2/patches/138616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034010.7569-1-chenxiaolong@loongson.cn/","msgid":"<20230913034010.7569-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:10","name":"[v4,09/22] LoongArch: Add tests for ASX vector xvextl/xvsra/xvsran/xvsrarn instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034010.7569-1-chenxiaolong@loongson.cn/mbox/"},{"id":138620,"url":"https://patchwork.plctlab.org/api/1.2/patches/138620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-2-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:18","name":"[v4,11/22] LoongArch: Add tests for ASX vector xvbitclr/xvbitclri/xvbitrev/xvbitrevi/ xvbitsel/xvbitseli/xvbitset/xvbitseti/xvclo/xvclz/xvpcnt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-2-chenxiaolong@loongson.cn/mbox/"},{"id":138624,"url":"https://patchwork.plctlab.org/api/1.2/patches/138624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-3-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:19","name":"[v4,12/22] LoongArch: Add tests for ASX builtin functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-3-chenxiaolong@loongson.cn/mbox/"},{"id":138622,"url":"https://patchwork.plctlab.org/api/1.2/patches/138622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-4-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:20","name":"[v4,13/22] LoongArch: Add tests for ASX xvldrepl/xvstelm instruction generation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-4-chenxiaolong@loongson.cn/mbox/"},{"id":138614,"url":"https://patchwork.plctlab.org/api/1.2/patches/138614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-5-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:21","name":"[v4,14/22] LoongArch: Add tests for ASX vector floating-point operation instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-5-chenxiaolong@loongson.cn/mbox/"},{"id":138619,"url":"https://patchwork.plctlab.org/api/1.2/patches/138619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-6-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:22","name":"[v4,15/22] LoongArch: Add tests for ASX vector floating-point conversion instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-6-chenxiaolong@loongson.cn/mbox/"},{"id":138629,"url":"https://patchwork.plctlab.org/api/1.2/patches/138629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-7-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:23","name":"[v4,16/22] LoongArch: Add tests for ASX vector comparison and selection instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-7-chenxiaolong@loongson.cn/mbox/"},{"id":138631,"url":"https://patchwork.plctlab.org/api/1.2/patches/138631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-8-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:24","name":"[v4,17/22] LoongArch: Add tests for ASX vector xvfnmadd/xvfrstp/xvfstpi/xvhsubw/ xvmsub/xvrotr/xvrotri/xvld/xvst instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-8-chenxiaolong@loongson.cn/mbox/"},{"id":138621,"url":"https://patchwork.plctlab.org/api/1.2/patches/138621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-9-chenxiaolong@loongson.cn/","msgid":"<20230913034026.7751-9-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:40:25","name":"[v4,18/22] LoongArch: Add tests for ASX vector xvabsd/xvavg/xvavgr/xvbsll/xvbsrl/xvneg/ xvsat instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034026.7751-9-chenxiaolong@loongson.cn/mbox/"},{"id":138625,"url":"https://patchwork.plctlab.org/api/1.2/patches/138625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034305.8325-1-chenxiaolong@loongson.cn/","msgid":"<20230913034305.8325-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:05","name":"[v4,19/22] LoongArch: Add tests for ASX vector xvfcmp{caf/ceq/cle/clt/cne/cor/cun} instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034305.8325-1-chenxiaolong@loongson.cn/mbox/"},{"id":138628,"url":"https://patchwork.plctlab.org/api/1.2/patches/138628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-1-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:28","name":"[v4,20/22] LoongArch: Add tests for ASX vector xvfcmp{saf/seq/sle/slt/sne/sor/sun} instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-1-chenxiaolong@loongson.cn/mbox/"},{"id":138627,"url":"https://patchwork.plctlab.org/api/1.2/patches/138627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-2-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:29","name":"[v4,21/22] LoongArch: Add tests for ASX vector xvext2xv/xvexth/xvextins/xvilvh/xvilvl/xvinsgr2vr/ xvinsve0/xvprem/xvpremi instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-2-chenxiaolong@loongson.cn/mbox/"},{"id":138630,"url":"https://patchwork.plctlab.org/api/1.2/patches/138630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-3-chenxiaolong@loongson.cn/","msgid":"<20230913034330.8377-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-09-13T03:43:30","name":"[v4,22/22] LoongArch: Add tests for ASX vector xvpackev/xvpackod/xvpickev/xvpickod/ xvpickve2gr/xvreplgr2vr/xvreplve/xvreplve0/xvreplvei/xvshuf4i/xvshuf instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913034330.8377-3-chenxiaolong@loongson.cn/mbox/"},{"id":138654,"url":"https://patchwork.plctlab.org/api/1.2/patches/138654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913060630.3930824-1-pan2.li@intel.com/","msgid":"<20230913060630.3930824-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-13T06:06:30","name":"[v1] RISC-V: Bugfix PR111362 for incorrect frm emit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913060630.3930824-1-pan2.li@intel.com/mbox/"},{"id":138695,"url":"https://patchwork.plctlab.org/api/1.2/patches/138695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913082312.2E6193858296@sourceware.org/","msgid":"<20230913082312.2E6193858296@sourceware.org>","list_archive_url":null,"date":"2023-09-13T08:22:15","name":"tree-optimization/111397 - missed copy propagation involving abnormal dest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913082312.2E6193858296@sourceware.org/mbox/"},{"id":138724,"url":"https://patchwork.plctlab.org/api/1.2/patches/138724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913095214.125470-1-yangyujie@loongson.cn/","msgid":"<20230913095214.125470-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-09-13T09:52:14","name":"LoongArch: Reimplement multilib build option handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913095214.125470-1-yangyujie@loongson.cn/mbox/"},{"id":138755,"url":"https://patchwork.plctlab.org/api/1.2/patches/138755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913114232.930E83857029@sourceware.org/","msgid":"<20230913114232.930E83857029@sourceware.org>","list_archive_url":null,"date":"2023-09-13T11:41:46","name":"tree-optimization/111387 - BB SLP and irreducible regions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913114232.930E83857029@sourceware.org/mbox/"},{"id":138773,"url":"https://patchwork.plctlab.org/api/1.2/patches/138773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913121802.3521096-1-juzhe.zhong@rivai.ai/","msgid":"<20230913121802.3521096-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:18:02","name":"RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913121802.3521096-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138779,"url":"https://patchwork.plctlab.org/api/1.2/patches/138779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123117.3580126-1-lehua.ding@rivai.ai/","msgid":"<20230913123117.3580126-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:31:17","name":"[1/2] RISC-V: Cleanup redundant reduction patterns after refactor vector mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123117.3580126-1-lehua.ding@rivai.ai/mbox/"},{"id":138778,"url":"https://patchwork.plctlab.org/api/1.2/patches/138778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123137.3580445-1-lehua.ding@rivai.ai/","msgid":"<20230913123137.3580445-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-13T12:31:37","name":"[2/2] RISC-V: Refactor vector reduction patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123137.3580445-1-lehua.ding@rivai.ai/mbox/"},{"id":138780,"url":"https://patchwork.plctlab.org/api/1.2/patches/138780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123226.2083892-1-jwakely@redhat.com/","msgid":"<20230913123226.2083892-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-13T12:31:40","name":"libstdc++: Remove some more unconditional uses of atomics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913123226.2083892-1-jwakely@redhat.com/mbox/"},{"id":138789,"url":"https://patchwork.plctlab.org/api/1.2/patches/138789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913130122.1145168-1-juzhe.zhong@rivai.ai/","msgid":"<20230913130122.1145168-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T13:01:22","name":"RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913130122.1145168-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138807,"url":"https://patchwork.plctlab.org/api/1.2/patches/138807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913140308.3446121-1-juzhe.zhong@rivai.ai/","msgid":"<20230913140308.3446121-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-13T14:03:08","name":"[V2] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913140308.3446121-1-juzhe.zhong@rivai.ai/mbox/"},{"id":138835,"url":"https://patchwork.plctlab.org/api/1.2/patches/138835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826AB4E511294ABCE0563383F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:19:18","name":"AArch64: List official cores before codenames","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826AB4E511294ABCE0563383F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":138875,"url":"https://patchwork.plctlab.org/api/1.2/patches/138875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=3-d-Ui2h57NzeyoTWX3WTnmVKkSQa1bc=5RstoQoS-A@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:50:08","name":"[AArch64,testsuite] Adjust vect_copy_lane_1.c for new code-gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjM=3-d-Ui2h57NzeyoTWX3WTnmVKkSQa1bc=5RstoQoS-A@mail.gmail.com/mbox/"},{"id":138877,"url":"https://patchwork.plctlab.org/api/1.2/patches/138877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89823B565A671851A16FD40B83F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T14:54:28","name":"AArch64: Fix __sync_val_compare_and_swap [PR111404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89823B565A671851A16FD40B83F0A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":138989,"url":"https://patchwork.plctlab.org/api/1.2/patches/138989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175316.4083902-1-ppalka@redhat.com/","msgid":"<20230913175316.4083902-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T17:53:16","name":"c++: unifying identical tmpls from current inst [PR108347]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175316.4083902-1-ppalka@redhat.com/mbox/"},{"id":138990,"url":"https://patchwork.plctlab.org/api/1.2/patches/138990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175331.4084179-1-ppalka@redhat.com/","msgid":"<20230913175331.4084179-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T17:53:31","name":"c++: optimize unification of class specializations [PR89231]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913175331.4084179-1-ppalka@redhat.com/mbox/"},{"id":139086,"url":"https://patchwork.plctlab.org/api/1.2/patches/139086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQIiF7Ai7Ae44BxW@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-13T20:56:55","name":"[v4] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQIiF7Ai7Ae44BxW@redhat.com/mbox/"},{"id":139126,"url":"https://patchwork.plctlab.org/api/1.2/patches/139126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913222911.1516503-1-apinski@marvell.com/","msgid":"<20230913222911.1516503-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-13T22:29:11","name":"Improve error message for if with an else part while in switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913222911.1516503-1-apinski@marvell.com/mbox/"},{"id":139136,"url":"https://patchwork.plctlab.org/api/1.2/patches/139136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913225206.4188935-1-ppalka@redhat.com/","msgid":"<20230913225206.4188935-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-13T22:52:06","name":"libstdc++: Reduce integer std::to/from_chars symbol sizes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230913225206.4188935-1-ppalka@redhat.com/mbox/"},{"id":139170,"url":"https://patchwork.plctlab.org/api/1.2/patches/139170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQJNshEZ4KETz1a+@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T00:02:58","name":"[v5] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQJNshEZ4KETz1a+@redhat.com/mbox/"},{"id":139274,"url":"https://patchwork.plctlab.org/api/1.2/patches/139274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f33aa0cf786cf49250889463947b62632cf3f205.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:50","name":"[01/10] vect: Ensure vect store is supported for some VMAT_ELEMENTWISE case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f33aa0cf786cf49250889463947b62632cf3f205.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139269,"url":"https://patchwork.plctlab.org/api/1.2/patches/139269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com/","msgid":"<1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:51","name":"[02/10] vect: Move vect_model_store_cost next to the transform in vectorizable_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1539ec7d34af4e38467420b3aed342d708a64a48.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139278,"url":"https://patchwork.plctlab.org/api/1.2/patches/139278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com/","msgid":"<8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:52","name":"[03/10] vect: Adjust vectorizable_store costing on VMAT_GATHER_SCATTER","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8abc6ddb4683d9058ffb48eb54f3a717e655efb4.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139270,"url":"https://patchwork.plctlab.org/api/1.2/patches/139270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com/","msgid":"<308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:53","name":"[04/10] vect: Simplify costing on vectorizable_scan_store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/308240b9aff98d1edc15bcba7a2f015e42cdc371.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139272,"url":"https://patchwork.plctlab.org/api/1.2/patches/139272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com/","msgid":"<2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:54","name":"[05/10] vect: Adjust vectorizable_store costing on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2adef8b10433859b6642282b03a11df33c732d11.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139271,"url":"https://patchwork.plctlab.org/api/1.2/patches/139271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com/","msgid":"<048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:55","name":"[06/10] vect: Adjust vectorizable_store costing on VMAT_LOAD_STORE_LANES","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/048c90cf62145799aa31e3ca4edd6f7adc911a6c.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139277,"url":"https://patchwork.plctlab.org/api/1.2/patches/139277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com/","msgid":"<03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:56","name":"[07/10] vect: Adjust vectorizable_store costing on VMAT_CONTIGUOUS_PERMUTE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03074b183ea6c016691e6174a331de1443bdf326.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139275,"url":"https://patchwork.plctlab.org/api/1.2/patches/139275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc85799abb2616dcac511424a1b50b57e48c2556.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:57","name":"[PATCH/RFC,08/10] aarch64: Don'\''t use CEIL for vector_store in aarch64_stp_sequence_cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc85799abb2616dcac511424a1b50b57e48c2556.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139279,"url":"https://patchwork.plctlab.org/api/1.2/patches/139279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2f2a8081d2ffd2459b0ff161a559e502511d8a5.1694657494.git.linkw@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T03:11:58","name":"[09/10] vect: Get rid of vect_model_store_cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2f2a8081d2ffd2459b0ff161a559e502511d8a5.1694657494.git.linkw@linux.ibm.com/mbox/"},{"id":139280,"url":"https://patchwork.plctlab.org/api/1.2/patches/139280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com/","msgid":"<7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com>","list_archive_url":null,"date":"2023-09-14T03:11:59","name":"[10/10] vect: Consider vec_perm costing for VMAT_CONTIGUOUS_REVERSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7514680ad7b9b859a054ca1a59356f58b5ac9089.1694657495.git.linkw@linux.ibm.com/mbox/"},{"id":139298,"url":"https://patchwork.plctlab.org/api/1.2/patches/139298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914035854.1695213-1-juzhe.zhong@rivai.ai/","msgid":"<20230914035854.1695213-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T03:58:54","name":"RISC-V: Fix ICE in get_avl_or_vl_reg[PR111395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914035854.1695213-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139311,"url":"https://patchwork.plctlab.org/api/1.2/patches/139311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fad1cbed-e389-f499-42ce-6c768c00dfd8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T04:29:35","name":"[committed] Limit header synopsis test to normal namespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fad1cbed-e389-f499-42ce-6c768c00dfd8@gmail.com/mbox/"},{"id":139327,"url":"https://patchwork.plctlab.org/api/1.2/patches/139327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914053350.1533941-1-apinski@marvell.com/","msgid":"<20230914053350.1533941-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-14T05:33:50","name":"MATCH: Support `(a != (CST+1)) & (a > CST)` optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914053350.1533941-1-apinski@marvell.com/mbox/"},{"id":139349,"url":"https://patchwork.plctlab.org/api/1.2/patches/139349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com/","msgid":"<28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com>","list_archive_url":null,"date":"2023-09-14T06:41:22","name":"debug/111409 - don'\''t generate COMDAT macro sections for split DWARF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28b5f064b4f94531489383fa6a9979c4e1484aef.1694673609.git.osandov@osandov.com/mbox/"},{"id":139388,"url":"https://patchwork.plctlab.org/api/1.2/patches/139388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-2-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:40","name":"[v11,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-2-kmatsui@gcc.gnu.org/mbox/"},{"id":139386,"url":"https://patchwork.plctlab.org/api/1.2/patches/139386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-3-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:41","name":"[v11,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-3-kmatsui@gcc.gnu.org/mbox/"},{"id":139363,"url":"https://patchwork.plctlab.org/api/1.2/patches/139363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-4-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:42","name":"[v11,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-4-kmatsui@gcc.gnu.org/mbox/"},{"id":139390,"url":"https://patchwork.plctlab.org/api/1.2/patches/139390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-5-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:43","name":"[v11,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-5-kmatsui@gcc.gnu.org/mbox/"},{"id":139394,"url":"https://patchwork.plctlab.org/api/1.2/patches/139394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-6-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:44","name":"[v11,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-6-kmatsui@gcc.gnu.org/mbox/"},{"id":139399,"url":"https://patchwork.plctlab.org/api/1.2/patches/139399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-7-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:45","name":"[v11,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-7-kmatsui@gcc.gnu.org/mbox/"},{"id":139397,"url":"https://patchwork.plctlab.org/api/1.2/patches/139397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-8-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:46","name":"[v11,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-8-kmatsui@gcc.gnu.org/mbox/"},{"id":139393,"url":"https://patchwork.plctlab.org/api/1.2/patches/139393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-9-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:47","name":"[v11,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-9-kmatsui@gcc.gnu.org/mbox/"},{"id":139389,"url":"https://patchwork.plctlab.org/api/1.2/patches/139389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-10-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:48","name":"[v11,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-10-kmatsui@gcc.gnu.org/mbox/"},{"id":139379,"url":"https://patchwork.plctlab.org/api/1.2/patches/139379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-11-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:49","name":"[v11,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-11-kmatsui@gcc.gnu.org/mbox/"},{"id":139391,"url":"https://patchwork.plctlab.org/api/1.2/patches/139391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-12-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:50","name":"[v11,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-12-kmatsui@gcc.gnu.org/mbox/"},{"id":139407,"url":"https://patchwork.plctlab.org/api/1.2/patches/139407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-13-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:51","name":"[v11,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-13-kmatsui@gcc.gnu.org/mbox/"},{"id":139358,"url":"https://patchwork.plctlab.org/api/1.2/patches/139358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-14-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:52","name":"[v11,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-14-kmatsui@gcc.gnu.org/mbox/"},{"id":139402,"url":"https://patchwork.plctlab.org/api/1.2/patches/139402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-15-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:53","name":"[v11,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-15-kmatsui@gcc.gnu.org/mbox/"},{"id":139381,"url":"https://patchwork.plctlab.org/api/1.2/patches/139381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-16-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:54","name":"[v11,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-16-kmatsui@gcc.gnu.org/mbox/"},{"id":139396,"url":"https://patchwork.plctlab.org/api/1.2/patches/139396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-17-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:55","name":"[v11,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-17-kmatsui@gcc.gnu.org/mbox/"},{"id":139371,"url":"https://patchwork.plctlab.org/api/1.2/patches/139371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-18-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:56","name":"[v11,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-18-kmatsui@gcc.gnu.org/mbox/"},{"id":139369,"url":"https://patchwork.plctlab.org/api/1.2/patches/139369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-19-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:57","name":"[v11,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-19-kmatsui@gcc.gnu.org/mbox/"},{"id":139368,"url":"https://patchwork.plctlab.org/api/1.2/patches/139368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-20-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:58","name":"[v11,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-20-kmatsui@gcc.gnu.org/mbox/"},{"id":139406,"url":"https://patchwork.plctlab.org/api/1.2/patches/139406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-21-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:42:59","name":"[v11,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-21-kmatsui@gcc.gnu.org/mbox/"},{"id":139385,"url":"https://patchwork.plctlab.org/api/1.2/patches/139385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-22-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:00","name":"[v11,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-22-kmatsui@gcc.gnu.org/mbox/"},{"id":139377,"url":"https://patchwork.plctlab.org/api/1.2/patches/139377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-23-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:01","name":"[v11,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-23-kmatsui@gcc.gnu.org/mbox/"},{"id":139404,"url":"https://patchwork.plctlab.org/api/1.2/patches/139404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-24-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:02","name":"[v11,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-24-kmatsui@gcc.gnu.org/mbox/"},{"id":139364,"url":"https://patchwork.plctlab.org/api/1.2/patches/139364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-25-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:03","name":"[v11,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-25-kmatsui@gcc.gnu.org/mbox/"},{"id":139401,"url":"https://patchwork.plctlab.org/api/1.2/patches/139401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-26-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:04","name":"[v11,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-26-kmatsui@gcc.gnu.org/mbox/"},{"id":139376,"url":"https://patchwork.plctlab.org/api/1.2/patches/139376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-27-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:05","name":"[v11,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-27-kmatsui@gcc.gnu.org/mbox/"},{"id":139395,"url":"https://patchwork.plctlab.org/api/1.2/patches/139395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-28-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:06","name":"[v11,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-28-kmatsui@gcc.gnu.org/mbox/"},{"id":139398,"url":"https://patchwork.plctlab.org/api/1.2/patches/139398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-29-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:07","name":"[v11,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-29-kmatsui@gcc.gnu.org/mbox/"},{"id":139373,"url":"https://patchwork.plctlab.org/api/1.2/patches/139373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-30-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:08","name":"[v11,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-30-kmatsui@gcc.gnu.org/mbox/"},{"id":139400,"url":"https://patchwork.plctlab.org/api/1.2/patches/139400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-31-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:09","name":"[v11,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-31-kmatsui@gcc.gnu.org/mbox/"},{"id":139375,"url":"https://patchwork.plctlab.org/api/1.2/patches/139375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-32-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:10","name":"[v11,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-32-kmatsui@gcc.gnu.org/mbox/"},{"id":139384,"url":"https://patchwork.plctlab.org/api/1.2/patches/139384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-33-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:11","name":"[v11,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-33-kmatsui@gcc.gnu.org/mbox/"},{"id":139383,"url":"https://patchwork.plctlab.org/api/1.2/patches/139383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-34-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:12","name":"[v11,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-34-kmatsui@gcc.gnu.org/mbox/"},{"id":139380,"url":"https://patchwork.plctlab.org/api/1.2/patches/139380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-35-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:13","name":"[v11,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-35-kmatsui@gcc.gnu.org/mbox/"},{"id":139378,"url":"https://patchwork.plctlab.org/api/1.2/patches/139378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-36-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:14","name":"[v11,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-36-kmatsui@gcc.gnu.org/mbox/"},{"id":139360,"url":"https://patchwork.plctlab.org/api/1.2/patches/139360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-37-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:15","name":"[v11,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-37-kmatsui@gcc.gnu.org/mbox/"},{"id":139362,"url":"https://patchwork.plctlab.org/api/1.2/patches/139362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-38-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:16","name":"[v11,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-38-kmatsui@gcc.gnu.org/mbox/"},{"id":139370,"url":"https://patchwork.plctlab.org/api/1.2/patches/139370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-39-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:17","name":"[v11,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-39-kmatsui@gcc.gnu.org/mbox/"},{"id":139374,"url":"https://patchwork.plctlab.org/api/1.2/patches/139374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-40-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:18","name":"[v11,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-40-kmatsui@gcc.gnu.org/mbox/"},{"id":139403,"url":"https://patchwork.plctlab.org/api/1.2/patches/139403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-41-kmatsui@gcc.gnu.org/","msgid":"<20230914064949.29787-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-14T06:43:19","name":"[v11,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914064949.29787-41-kmatsui@gcc.gnu.org/mbox/"},{"id":139409,"url":"https://patchwork.plctlab.org/api/1.2/patches/139409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914073528.1344178-1-juzhe.zhong@rivai.ai/","msgid":"<20230914073528.1344178-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:35:28","name":"[V2] RISC-V: Fix ICE in get_avl_or_vl_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914073528.1344178-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139414,"url":"https://patchwork.plctlab.org/api/1.2/patches/139414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075213.3213806-1-juzhe.zhong@rivai.ai/","msgid":"<20230914075213.3213806-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:52:13","name":"[V3] RISC-V: Fix ICE in get_avl_or_vl_reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075213.3213806-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139416,"url":"https://patchwork.plctlab.org/api/1.2/patches/139416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075437.3222179-1-juzhe.zhong@rivai.ai/","msgid":"<20230914075437.3222179-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T07:54:37","name":"[Committed] RISC-V: Format VSETVL PASS code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914075437.3222179-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139428,"url":"https://patchwork.plctlab.org/api/1.2/patches/139428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914080321.3234794-1-juzhe.zhong@rivai.ai/","msgid":"<20230914080321.3234794-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T08:03:21","name":"[V3] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914080321.3234794-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139450,"url":"https://patchwork.plctlab.org/api/1.2/patches/139450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914090957.1896347-1-christophe.lyon@linaro.org/","msgid":"<20230914090957.1896347-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-09-14T09:09:57","name":"[v2,2/2] libstdc++: Add dg-require-thread-fence in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914090957.1896347-1-christophe.lyon@linaro.org/mbox/"},{"id":139492,"url":"https://patchwork.plctlab.org/api/1.2/patches/139492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0n1kpdv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T10:42:04","name":"aarch64: Coerce addresses to be suitable for LD1RQ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0n1kpdv.fsf@arm.com/mbox/"},{"id":139493,"url":"https://patchwork.plctlab.org/api/1.2/patches/139493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4eb2a39-2006-9b58-2d4e-8b5fea0076a1@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T10:45:50","name":"ira: Consider save/restore costs of callee-save registers [PR110071]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4eb2a39-2006-9b58-2d4e-8b5fea0076a1@linux.vnet.ibm.com/mbox/"},{"id":139495,"url":"https://patchwork.plctlab.org/api/1.2/patches/139495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914104952.4173011-1-juzhe.zhong@rivai.ai/","msgid":"<20230914104952.4173011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T10:49:52","name":"[V4] RISC-V: Expand VLS mode to scalar mode move[PR111391]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914104952.4173011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139507,"url":"https://patchwork.plctlab.org/api/1.2/patches/139507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914111720.32C2D3857B8E@sourceware.org/","msgid":"<20230914111720.32C2D3857B8E@sourceware.org>","list_archive_url":null,"date":"2023-09-14T11:16:35","name":"tree-optimization/111294 - better DCE after forwprop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914111720.32C2D3857B8E@sourceware.org/mbox/"},{"id":139509,"url":"https://patchwork.plctlab.org/api/1.2/patches/139509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914112102.10247-1-chenglulu@loongson.cn/","msgid":"<20230914112102.10247-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-14T11:21:02","name":"LoongArch: gcc: Modify gas uleb128 support test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914112102.10247-1-chenglulu@loongson.cn/mbox/"},{"id":139558,"url":"https://patchwork.plctlab.org/api/1.2/patches/139558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124358.2278212-1-juzhe.zhong@rivai.ai/","msgid":"<20230914124358.2278212-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-14T12:43:58","name":"RISC-V: Support VLS modes mask operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124358.2278212-1-juzhe.zhong@rivai.ai/mbox/"},{"id":139562,"url":"https://patchwork.plctlab.org/api/1.2/patches/139562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124552.1950767-1-poulhies@adacore.com/","msgid":"<20230914124552.1950767-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:45:52","name":"[COMMITTED] ada: Assertion failure adding extra formals to late overriding subp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124552.1950767-1-poulhies@adacore.com/mbox/"},{"id":139563,"url":"https://patchwork.plctlab.org/api/1.2/patches/139563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124608.1950944-1-poulhies@adacore.com/","msgid":"<20230914124608.1950944-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:08","name":"[COMMITTED] ada: Fix premature finalization in loop over limited iterable container","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124608.1950944-1-poulhies@adacore.com/mbox/"},{"id":139567,"url":"https://patchwork.plctlab.org/api/1.2/patches/139567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124609.1951006-1-poulhies@adacore.com/","msgid":"<20230914124609.1951006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:09","name":"[COMMITTED] ada: Fix late finalization for function call in delta aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124609.1951006-1-poulhies@adacore.com/mbox/"},{"id":139564,"url":"https://patchwork.plctlab.org/api/1.2/patches/139564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124611.1951068-1-poulhies@adacore.com/","msgid":"<20230914124611.1951068-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:11","name":"[COMMITTED] ada: Assertion failure on for-of loop iterating on selected component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124611.1951068-1-poulhies@adacore.com/mbox/"},{"id":139566,"url":"https://patchwork.plctlab.org/api/1.2/patches/139566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124612.1951129-1-poulhies@adacore.com/","msgid":"<20230914124612.1951129-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:12","name":"[COMMITTED] ada: Assertion failure on calculation of Large_Max_Size_Mutable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124612.1951129-1-poulhies@adacore.com/mbox/"},{"id":139568,"url":"https://patchwork.plctlab.org/api/1.2/patches/139568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124614.1951192-1-poulhies@adacore.com/","msgid":"<20230914124614.1951192-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:14","name":"[COMMITTED] ada: Assertion failure on expansion of record with invariant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124614.1951192-1-poulhies@adacore.com/mbox/"},{"id":139565,"url":"https://patchwork.plctlab.org/api/1.2/patches/139565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124615.1951253-1-poulhies@adacore.com/","msgid":"<20230914124615.1951253-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-14T12:46:15","name":"[COMMITTED] ada: Improve detection of deactivated code for warnings with -gnatwt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914124615.1951253-1-poulhies@adacore.com/mbox/"},{"id":139582,"url":"https://patchwork.plctlab.org/api/1.2/patches/139582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132401.E8C483858C3A@sourceware.org/","msgid":"<20230914132401.E8C483858C3A@sourceware.org>","list_archive_url":null,"date":"2023-09-14T13:23:13","name":"tree-optimization/111294 - backwards threader PHI costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132401.E8C483858C3A@sourceware.org/mbox/"},{"id":139584,"url":"https://patchwork.plctlab.org/api/1.2/patches/139584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132409.2381527-1-qing.zhao@oracle.com/","msgid":"<20230914132409.2381527-1-qing.zhao@oracle.com>","list_archive_url":null,"date":"2023-09-14T13:24:09","name":"tree optimization/111407--SSA corruption due to widening_mul opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132409.2381527-1-qing.zhao@oracle.com/mbox/"},{"id":139587,"url":"https://patchwork.plctlab.org/api/1.2/patches/139587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132728.2165656-1-jwakely@redhat.com/","msgid":"<20230914132728.2165656-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:27:09","name":"[committed] libstdc++: Remove some more unconditional uses of atomics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914132728.2165656-1-jwakely@redhat.com/mbox/"},{"id":139588,"url":"https://patchwork.plctlab.org/api/1.2/patches/139588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133214.2165670-1-jwakely@redhat.com/","msgid":"<20230914133214.2165670-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:27:30","name":"[committed] libstdc++: Support dg-additional-files in tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133214.2165670-1-jwakely@redhat.com/mbox/"},{"id":139589,"url":"https://patchwork.plctlab.org/api/1.2/patches/139589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133238.2165790-1-jwakely@redhat.com/","msgid":"<20230914133238.2165790-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-14T13:32:15","name":"[committed] libstdc++: Add testcase for std::make_integer_sequence bug [PR111357]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914133238.2165790-1-jwakely@redhat.com/mbox/"},{"id":139613,"url":"https://patchwork.plctlab.org/api/1.2/patches/139613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914141235.35160-1-ppalka@redhat.com/","msgid":"<20230914141235.35160-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-14T14:12:35","name":"libstdc++: Use C++20 constraints in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914141235.35160-1-ppalka@redhat.com/mbox/"},{"id":139616,"url":"https://patchwork.plctlab.org/api/1.2/patches/139616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu/","msgid":"<20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu>","list_archive_url":null,"date":"2023-09-14T14:24:33","name":"Harmonize headers between both dg-extract-results scripts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914142433.fifbjzmb6iu3yoqk@ws2202.lin.mbt.kalray.eu/mbox/"},{"id":139625,"url":"https://patchwork.plctlab.org/api/1.2/patches/139625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptled8lszh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T14:38:58","name":"aarch64: Restore SVE WHILE costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptled8lszh.fsf@arm.com/mbox/"},{"id":139643,"url":"https://patchwork.plctlab.org/api/1.2/patches/139643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982EE0BF538316B9E8F9CCE83F7A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T15:24:38","name":"AArch64: Improve immediate expansion [PR105928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982EE0BF538316B9E8F9CCE83F7A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":139644,"url":"https://patchwork.plctlab.org/api/1.2/patches/139644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe599ae1-2e91-1273-4876-5051bf2e42b1@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-14T15:28:33","name":"[pushed,RA] : Improve cost calculation of pseudos with equivalences","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe599ae1-2e91-1273-4876-5051bf2e42b1@redhat.com/mbox/"},{"id":139654,"url":"https://patchwork.plctlab.org/api/1.2/patches/139654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914155131.2352750-1-lehua.ding@rivai.ai/","msgid":"<20230914155131.2352750-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-14T15:51:31","name":"RISC-V: Support combine extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914155131.2352750-1-lehua.ding@rivai.ai/mbox/"},{"id":139706,"url":"https://patchwork.plctlab.org/api/1.2/patches/139706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi/","msgid":"<38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi>","list_archive_url":null,"date":"2023-09-14T16:58:47","name":"aarch64: Ensure const and sign correctness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/38b1578e-fc60-4c0b-bdb7-54c530246e83@gcc.mail.kapsi.fi/mbox/"},{"id":139753,"url":"https://patchwork.plctlab.org/api/1.2/patches/139753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914174847.1564836-1-apinski@marvell.com/","msgid":"<20230914174847.1564836-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-14T17:48:47","name":"MATCH: Fix `(1 >> X) != 0` pattern for vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914174847.1564836-1-apinski@marvell.com/mbox/"},{"id":139794,"url":"https://patchwork.plctlab.org/api/1.2/patches/139794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914191050.717517-1-jcmvbkbc@gmail.com/","msgid":"<20230914191050.717517-1-jcmvbkbc@gmail.com>","list_archive_url":null,"date":"2023-09-14T19:10:50","name":"[COMMITTED] gcc: xtensa: use salt/saltu in xtensa_expand_scc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914191050.717517-1-jcmvbkbc@gmail.com/mbox/"},{"id":139820,"url":"https://patchwork.plctlab.org/api/1.2/patches/139820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0926626-0e9e-4b9d-b9cf-a33b2b7eb9bb-1694722934093@3c-app-gmx-bs48/","msgid":"","list_archive_url":null,"date":"2023-09-14T20:22:14","name":"Fortran: improve bounds-checking for array sections [PR30802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a0926626-0e9e-4b9d-b9cf-a33b2b7eb9bb-1694722934093@3c-app-gmx-bs48/mbox/"},{"id":139823,"url":"https://patchwork.plctlab.org/api/1.2/patches/139823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203120.1791493-1-dmalcolm@redhat.com/","msgid":"<20230914203120.1791493-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:31:20","name":"[pushed] analyzer: use unique_ptr for rejected_constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203120.1791493-1-dmalcolm@redhat.com/mbox/"},{"id":139826,"url":"https://patchwork.plctlab.org/api/1.2/patches/139826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203914.1792717-1-dmalcolm@redhat.com/","msgid":"<20230914203914.1792717-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:39:14","name":"[pushed] analyzer: fix missing return in compatible_epath_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914203914.1792717-1-dmalcolm@redhat.com/mbox/"},{"id":139828,"url":"https://patchwork.plctlab.org/api/1.2/patches/139828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914204031.1792895-1-dmalcolm@redhat.com/","msgid":"<20230914204031.1792895-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-14T20:40:31","name":"[pushed] diagnostics: support multithreaded diagnostic paths","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230914204031.1792895-1-dmalcolm@redhat.com/mbox/"},{"id":139952,"url":"https://patchwork.plctlab.org/api/1.2/patches/139952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915010855.1582726-1-apinski@marvell.com/","msgid":"<20230915010855.1582726-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-15T01:08:55","name":"MATCH: Improve zero_one_valued_p for cases without range information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915010855.1582726-1-apinski@marvell.com/mbox/"},{"id":139955,"url":"https://patchwork.plctlab.org/api/1.2/patches/139955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915012008.17934-1-gaofei@eswincomputing.com/","msgid":"<20230915012008.17934-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-15T01:20:08","name":"[RISC-V] fix PR 111259 invalid zcmp mov predicate.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915012008.17934-1-gaofei@eswincomputing.com/mbox/"},{"id":139963,"url":"https://patchwork.plctlab.org/api/1.2/patches/139963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915013921.1868899-1-guojiufu@linux.ibm.com/","msgid":"<20230915013921.1868899-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-15T01:39:21","name":"use local range for one more pattern in match.pd","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915013921.1868899-1-guojiufu@linux.ibm.com/mbox/"},{"id":140053,"url":"https://patchwork.plctlab.org/api/1.2/patches/140053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-2-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:07","name":"[v12,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140032,"url":"https://patchwork.plctlab.org/api/1.2/patches/140032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-3-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:08","name":"[v12,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140052,"url":"https://patchwork.plctlab.org/api/1.2/patches/140052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-4-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:09","name":"[v12,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140035,"url":"https://patchwork.plctlab.org/api/1.2/patches/140035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-5-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:10","name":"[v12,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140004,"url":"https://patchwork.plctlab.org/api/1.2/patches/140004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-6-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:11","name":"[v12,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140014,"url":"https://patchwork.plctlab.org/api/1.2/patches/140014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-7-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:12","name":"[v12,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140058,"url":"https://patchwork.plctlab.org/api/1.2/patches/140058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-8-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:13","name":"[v12,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140047,"url":"https://patchwork.plctlab.org/api/1.2/patches/140047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-9-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:14","name":"[v12,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140055,"url":"https://patchwork.plctlab.org/api/1.2/patches/140055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-10-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:15","name":"[v12,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140059,"url":"https://patchwork.plctlab.org/api/1.2/patches/140059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-11-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:16","name":"[v12,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140012,"url":"https://patchwork.plctlab.org/api/1.2/patches/140012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-12-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:17","name":"[v12,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140062,"url":"https://patchwork.plctlab.org/api/1.2/patches/140062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-13-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:18","name":"[v12,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140067,"url":"https://patchwork.plctlab.org/api/1.2/patches/140067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-14-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:19","name":"[v12,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140046,"url":"https://patchwork.plctlab.org/api/1.2/patches/140046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-15-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:20","name":"[v12,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140061,"url":"https://patchwork.plctlab.org/api/1.2/patches/140061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-16-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:21","name":"[v12,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140008,"url":"https://patchwork.plctlab.org/api/1.2/patches/140008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-17-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:22","name":"[v12,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140037,"url":"https://patchwork.plctlab.org/api/1.2/patches/140037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-18-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:23","name":"[v12,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140069,"url":"https://patchwork.plctlab.org/api/1.2/patches/140069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-19-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:24","name":"[v12,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140049,"url":"https://patchwork.plctlab.org/api/1.2/patches/140049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-20-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:25","name":"[v12,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140028,"url":"https://patchwork.plctlab.org/api/1.2/patches/140028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-21-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:26","name":"[v12,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140016,"url":"https://patchwork.plctlab.org/api/1.2/patches/140016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-22-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:27","name":"[v12,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140027,"url":"https://patchwork.plctlab.org/api/1.2/patches/140027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-23-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:28","name":"[v12,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140031,"url":"https://patchwork.plctlab.org/api/1.2/patches/140031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-24-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:29","name":"[v12,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140034,"url":"https://patchwork.plctlab.org/api/1.2/patches/140034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-25-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:30","name":"[v12,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140019,"url":"https://patchwork.plctlab.org/api/1.2/patches/140019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-26-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:31","name":"[v12,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140013,"url":"https://patchwork.plctlab.org/api/1.2/patches/140013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-27-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:32","name":"[v12,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140017,"url":"https://patchwork.plctlab.org/api/1.2/patches/140017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-28-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:33","name":"[v12,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140005,"url":"https://patchwork.plctlab.org/api/1.2/patches/140005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-29-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:34","name":"[v12,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140009,"url":"https://patchwork.plctlab.org/api/1.2/patches/140009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-30-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:35","name":"[v12,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140038,"url":"https://patchwork.plctlab.org/api/1.2/patches/140038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-31-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:36","name":"[v12,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140056,"url":"https://patchwork.plctlab.org/api/1.2/patches/140056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-32-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:37","name":"[v12,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140022,"url":"https://patchwork.plctlab.org/api/1.2/patches/140022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-33-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:38","name":"[v12,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140023,"url":"https://patchwork.plctlab.org/api/1.2/patches/140023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-34-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:39","name":"[v12,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140011,"url":"https://patchwork.plctlab.org/api/1.2/patches/140011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-35-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:40","name":"[v12,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140057,"url":"https://patchwork.plctlab.org/api/1.2/patches/140057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-36-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:41","name":"[v12,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140036,"url":"https://patchwork.plctlab.org/api/1.2/patches/140036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-37-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:42","name":"[v12,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140025,"url":"https://patchwork.plctlab.org/api/1.2/patches/140025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-38-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:43","name":"[v12,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140026,"url":"https://patchwork.plctlab.org/api/1.2/patches/140026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-39-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:44","name":"[v12,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140048,"url":"https://patchwork.plctlab.org/api/1.2/patches/140048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-40-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:45","name":"[v12,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140020,"url":"https://patchwork.plctlab.org/api/1.2/patches/140020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-41-kmatsui@gcc.gnu.org/","msgid":"<20230915022305.74083-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:21:46","name":"[v12,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915022305.74083-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140080,"url":"https://patchwork.plctlab.org/api/1.2/patches/140080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-2-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:41","name":"[v13,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140114,"url":"https://patchwork.plctlab.org/api/1.2/patches/140114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-3-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:42","name":"[v13,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140088,"url":"https://patchwork.plctlab.org/api/1.2/patches/140088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-4-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:43","name":"[v13,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140100,"url":"https://patchwork.plctlab.org/api/1.2/patches/140100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-5-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:44","name":"[v13,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140093,"url":"https://patchwork.plctlab.org/api/1.2/patches/140093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-6-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:45","name":"[v13,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140097,"url":"https://patchwork.plctlab.org/api/1.2/patches/140097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-7-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:46","name":"[v13,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140068,"url":"https://patchwork.plctlab.org/api/1.2/patches/140068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-8-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:47","name":"[v13,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140089,"url":"https://patchwork.plctlab.org/api/1.2/patches/140089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-9-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:48","name":"[v13,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140060,"url":"https://patchwork.plctlab.org/api/1.2/patches/140060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-10-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:49","name":"[v13,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140081,"url":"https://patchwork.plctlab.org/api/1.2/patches/140081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-11-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:50","name":"[v13,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140111,"url":"https://patchwork.plctlab.org/api/1.2/patches/140111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-12-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:51","name":"[v13,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140090,"url":"https://patchwork.plctlab.org/api/1.2/patches/140090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-13-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:52","name":"[v13,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140082,"url":"https://patchwork.plctlab.org/api/1.2/patches/140082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-14-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:53","name":"[v13,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140102,"url":"https://patchwork.plctlab.org/api/1.2/patches/140102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-15-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:54","name":"[v13,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140109,"url":"https://patchwork.plctlab.org/api/1.2/patches/140109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-16-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:55","name":"[v13,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140054,"url":"https://patchwork.plctlab.org/api/1.2/patches/140054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-17-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:56","name":"[v13,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140070,"url":"https://patchwork.plctlab.org/api/1.2/patches/140070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-18-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:57","name":"[v13,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140094,"url":"https://patchwork.plctlab.org/api/1.2/patches/140094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-19-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:58","name":"[v13,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140087,"url":"https://patchwork.plctlab.org/api/1.2/patches/140087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-20-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:34:59","name":"[v13,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140117,"url":"https://patchwork.plctlab.org/api/1.2/patches/140117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-21-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:00","name":"[v13,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140079,"url":"https://patchwork.plctlab.org/api/1.2/patches/140079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-22-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:01","name":"[v13,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140092,"url":"https://patchwork.plctlab.org/api/1.2/patches/140092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-23-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:02","name":"[v13,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140095,"url":"https://patchwork.plctlab.org/api/1.2/patches/140095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-24-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:03","name":"[v13,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140101,"url":"https://patchwork.plctlab.org/api/1.2/patches/140101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-25-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:04","name":"[v13,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140066,"url":"https://patchwork.plctlab.org/api/1.2/patches/140066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-26-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:05","name":"[v13,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140115,"url":"https://patchwork.plctlab.org/api/1.2/patches/140115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-27-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:06","name":"[v13,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140104,"url":"https://patchwork.plctlab.org/api/1.2/patches/140104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-28-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:07","name":"[v13,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140077,"url":"https://patchwork.plctlab.org/api/1.2/patches/140077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-29-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:08","name":"[v13,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140105,"url":"https://patchwork.plctlab.org/api/1.2/patches/140105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-30-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:09","name":"[v13,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140091,"url":"https://patchwork.plctlab.org/api/1.2/patches/140091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-31-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:10","name":"[v13,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140075,"url":"https://patchwork.plctlab.org/api/1.2/patches/140075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-32-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:11","name":"[v13,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140110,"url":"https://patchwork.plctlab.org/api/1.2/patches/140110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-33-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:12","name":"[v13,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140076,"url":"https://patchwork.plctlab.org/api/1.2/patches/140076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-34-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:13","name":"[v13,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140112,"url":"https://patchwork.plctlab.org/api/1.2/patches/140112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-35-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:14","name":"[v13,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140103,"url":"https://patchwork.plctlab.org/api/1.2/patches/140103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-36-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:15","name":"[v13,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140098,"url":"https://patchwork.plctlab.org/api/1.2/patches/140098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-37-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:16","name":"[v13,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140063,"url":"https://patchwork.plctlab.org/api/1.2/patches/140063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-38-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:17","name":"[v13,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140119,"url":"https://patchwork.plctlab.org/api/1.2/patches/140119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-39-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:18","name":"[v13,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140118,"url":"https://patchwork.plctlab.org/api/1.2/patches/140118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-40-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:19","name":"[v13,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140096,"url":"https://patchwork.plctlab.org/api/1.2/patches/140096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-41-kmatsui@gcc.gnu.org/","msgid":"<20230915023640.75216-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T02:35:20","name":"[v13,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915023640.75216-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140108,"url":"https://patchwork.plctlab.org/api/1.2/patches/140108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915024000.20344-1-chenglulu@loongson.cn/","msgid":"<20230915024000.20344-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T02:40:00","name":"[v1] LoongArch: Check whether binutils supports the relax function. If supported, explicit relocs are turned off by default.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915024000.20344-1-chenglulu@loongson.cn/mbox/"},{"id":140121,"url":"https://patchwork.plctlab.org/api/1.2/patches/140121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915033302.21325-1-chenglulu@loongson.cn/","msgid":"<20230915033302.21325-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T03:33:03","name":"[v1] LoongArch: Add floating point conditional move support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915033302.21325-1-chenglulu@loongson.cn/mbox/"},{"id":140125,"url":"https://patchwork.plctlab.org/api/1.2/patches/140125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915035309.579545-1-juzhe.zhong@rivai.ai/","msgid":"<20230915035309.579545-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T03:53:08","name":"RISC-V: Support VLS modes vec_init auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915035309.579545-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140128,"url":"https://patchwork.plctlab.org/api/1.2/patches/140128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915040404.729860-1-mengqinggang@loongson.cn/","msgid":"<20230915040404.729860-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-15T04:04:04","name":"[v2] Modify gas uleb128 support test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915040404.729860-1-mengqinggang@loongson.cn/mbox/"},{"id":140144,"url":"https://patchwork.plctlab.org/api/1.2/patches/140144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915050613.22696-1-lehua.ding@rivai.ai/","msgid":"<20230915050613.22696-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-15T05:06:13","name":"RISC-V: Refactor expand_reduction and cleanup enum reduction_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915050613.22696-1-lehua.ding@rivai.ai/mbox/"},{"id":140156,"url":"https://patchwork.plctlab.org/api/1.2/patches/140156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915060710.23244-1-chenglulu@loongson.cn/","msgid":"<20230915060710.23244-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-09-15T06:07:11","name":"LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915060710.23244-1-chenglulu@loongson.cn/mbox/"},{"id":140178,"url":"https://patchwork.plctlab.org/api/1.2/patches/140178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915071847.135585-1-mikael@gcc.gnu.org/","msgid":"<20230915071847.135585-1-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T07:18:47","name":"fortran: Remove reference count update [PR108957]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915071847.135585-1-mikael@gcc.gnu.org/mbox/"},{"id":140216,"url":"https://patchwork.plctlab.org/api/1.2/patches/140216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedizludb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T08:21:20","name":"aarch64: Fix loose ldpstp check [PR111411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptedizludb.fsf@arm.com/mbox/"},{"id":140237,"url":"https://patchwork.plctlab.org/api/1.2/patches/140237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915083004.2241119-1-juzhe.zhong@rivai.ai/","msgid":"<20230915083004.2241119-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T08:30:04","name":"test: Remove XPASS for RISCV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915083004.2241119-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140269,"url":"https://patchwork.plctlab.org/api/1.2/patches/140269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915090349.2249556-1-juzhe.zhong@rivai.ai/","msgid":"<20230915090349.2249556-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:03:49","name":"test: Block slp-16.c check for target support vect_strided6","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915090349.2249556-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140285,"url":"https://patchwork.plctlab.org/api/1.2/patches/140285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915091636.2391436-1-juzhe.zhong@rivai.ai/","msgid":"<20230915091636.2391436-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:16:36","name":"test: Isolate slp-1.c check of target supports vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915091636.2391436-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140288,"url":"https://patchwork.plctlab.org/api/1.2/patches/140288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzsryerg.fsf@euler.schwinge.homeip.net/","msgid":"<87jzsryerg.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-15T09:20:03","name":"[WIP] Re-introduce '\''TREE_USED'\'' in tree streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzsryerg.fsf@euler.schwinge.homeip.net/mbox/"},{"id":140305,"url":"https://patchwork.plctlab.org/api/1.2/patches/140305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092647.2192116-1-jwakely@redhat.com/","msgid":"<20230915092647.2192116-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:24:41","name":"[committed] libstdc++: Add operator bool to result types (P2497R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092647.2192116-1-jwakely@redhat.com/mbox/"},{"id":140306,"url":"https://patchwork.plctlab.org/api/1.2/patches/140306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092737.2192232-1-jwakely@redhat.com/","msgid":"<20230915092737.2192232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:26:48","name":"[committed] libstdc++: Remove non-void static assertions in variant'\''s std::get [PR111172]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915092737.2192232-1-jwakely@redhat.com/mbox/"},{"id":140308,"url":"https://patchwork.plctlab.org/api/1.2/patches/140308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915093220.2192265-1-jwakely@redhat.com/","msgid":"<20230915093220.2192265-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T09:27:38","name":"[committed] libstdc++: Fix constraints for std::variant default constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915093220.2192265-1-jwakely@redhat.com/mbox/"},{"id":140316,"url":"https://patchwork.plctlab.org/api/1.2/patches/140316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915095444.2627943-1-juzhe.zhong@rivai.ai/","msgid":"<20230915095444.2627943-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T09:54:44","name":"test: Block vect_strided5 for slp-34-big-array.c SLP check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915095444.2627943-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140317,"url":"https://patchwork.plctlab.org/api/1.2/patches/140317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100024.2633114-1-juzhe.zhong@rivai.ai/","msgid":"<20230915100024.2633114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T10:00:24","name":"test: Block SLP check of slp-34.c for vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100024.2633114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140325,"url":"https://patchwork.plctlab.org/api/1.2/patches/140325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100603.2648810-1-juzhe.zhong@rivai.ai/","msgid":"<20230915100603.2648810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-15T10:06:03","name":"test: Block SLP check of slp-35.c for vect_strided5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915100603.2648810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140368,"url":"https://patchwork.plctlab.org/api/1.2/patches/140368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915111342.1895618-1-lehua.ding@rivai.ai/","msgid":"<20230915111342.1895618-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-15T11:13:42","name":"RISC-V: Fix using wrong mode to get reduction insn vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915111342.1895618-1-lehua.ding@rivai.ai/mbox/"},{"id":140379,"url":"https://patchwork.plctlab.org/api/1.2/patches/140379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915115010.D2F8513251@imap2.suse-dmz.suse.de/","msgid":"<20230915115010.D2F8513251@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-15T11:50:10","name":"[RFC] middle-end/106811 - document GENERIC/GIMPLE undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915115010.D2F8513251@imap2.suse-dmz.suse.de/mbox/"},{"id":140433,"url":"https://patchwork.plctlab.org/api/1.2/patches/140433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915132302.3468514-1-pan2.li@intel.com/","msgid":"<20230915132302.3468514-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-15T13:23:02","name":"[v1] RISC-V: Support FP SGNJX autovec for VLS mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915132302.3468514-1-pan2.li@intel.com/mbox/"},{"id":140451,"url":"https://patchwork.plctlab.org/api/1.2/patches/140451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com/","msgid":"<2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com>","list_archive_url":null,"date":"2023-09-15T14:13:47","name":"[COMMITTED,1/2] Fix indentation in range_of_phi.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e741213-66e4-fbc5-41ec-4b7e0c8b4844@redhat.com/mbox/"},{"id":140452,"url":"https://patchwork.plctlab.org/api/1.2/patches/140452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f6ac788a-4c2d-8e8b-3ccd-db2183770702@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T14:14:11","name":"[COMMITTED,2/2] Always do PHI analysis before loop analysis.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f6ac788a-4c2d-8e8b-3ccd-db2183770702@redhat.com/mbox/"},{"id":140456,"url":"https://patchwork.plctlab.org/api/1.2/patches/140456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142032.2100558-1-poulhies@adacore.com/","msgid":"<20230915142032.2100558-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:32","name":"[COMMITTED] ada: Crash on creation of extra formals on type extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142032.2100558-1-poulhies@adacore.com/mbox/"},{"id":140457,"url":"https://patchwork.plctlab.org/api/1.2/patches/140457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142050.2100712-1-poulhies@adacore.com/","msgid":"<20230915142050.2100712-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:50","name":"[COMMITTED] ada: Clean up scope depth and related code (tech debt)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142050.2100712-1-poulhies@adacore.com/mbox/"},{"id":140461,"url":"https://patchwork.plctlab.org/api/1.2/patches/140461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142052.2100773-1-poulhies@adacore.com/","msgid":"<20230915142052.2100773-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:52","name":"[COMMITTED] ada: Fix internal error on expression function with Refined_Post aspect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142052.2100773-1-poulhies@adacore.com/mbox/"},{"id":140464,"url":"https://patchwork.plctlab.org/api/1.2/patches/140464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142054.2100872-1-poulhies@adacore.com/","msgid":"<20230915142054.2100872-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:54","name":"[COMMITTED] ada: Remove GNAT Pro details regarding mold","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142054.2100872-1-poulhies@adacore.com/mbox/"},{"id":140458,"url":"https://patchwork.plctlab.org/api/1.2/patches/140458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142056.2100936-1-poulhies@adacore.com/","msgid":"<20230915142056.2100936-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:56","name":"[COMMITTED] ada: Fix internal error on aggregate nested in container aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142056.2100936-1-poulhies@adacore.com/mbox/"},{"id":140466,"url":"https://patchwork.plctlab.org/api/1.2/patches/140466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142058.2100998-1-poulhies@adacore.com/","msgid":"<20230915142058.2100998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:20:58","name":"[COMMITTED] ada: Fix internal error on misaligned component with variable nominal size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142058.2100998-1-poulhies@adacore.com/mbox/"},{"id":140463,"url":"https://patchwork.plctlab.org/api/1.2/patches/140463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142100.2101059-1-poulhies@adacore.com/","msgid":"<20230915142100.2101059-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:00","name":"[COMMITTED] ada: Generate runtime restrictions list when the standard library is suppressed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142100.2101059-1-poulhies@adacore.com/mbox/"},{"id":140462,"url":"https://patchwork.plctlab.org/api/1.2/patches/140462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142102.2101122-1-poulhies@adacore.com/","msgid":"<20230915142102.2101122-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:02","name":"[COMMITTED] ada: Do not perform local-exception-to-goto optimization on barrier functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142102.2101122-1-poulhies@adacore.com/mbox/"},{"id":140465,"url":"https://patchwork.plctlab.org/api/1.2/patches/140465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142104.2101183-1-poulhies@adacore.com/","msgid":"<20230915142104.2101183-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:04","name":"[COMMITTED] ada: Fix wrong optimization of extended return for discriminated record type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142104.2101183-1-poulhies@adacore.com/mbox/"},{"id":140471,"url":"https://patchwork.plctlab.org/api/1.2/patches/140471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142105.2101247-1-poulhies@adacore.com/","msgid":"<20230915142105.2101247-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:05","name":"[COMMITTED] ada: Explicitly analyze and expand null array aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142105.2101247-1-poulhies@adacore.com/mbox/"},{"id":140467,"url":"https://patchwork.plctlab.org/api/1.2/patches/140467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142107.2101308-1-poulhies@adacore.com/","msgid":"<20230915142107.2101308-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-15T14:21:07","name":"[COMMITTED] ada: Fix minor glitch in finish_record_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915142107.2101308-1-poulhies@adacore.com/mbox/"},{"id":140481,"url":"https://patchwork.plctlab.org/api/1.2/patches/140481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/db3c333e-549e-ccc7-b4ab-be57235ce389@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T14:44:55","name":"[RFC] New early __builtin_unreachable processing.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/db3c333e-549e-ccc7-b4ab-be57235ce389@redhat.com/mbox/"},{"id":140497,"url":"https://patchwork.plctlab.org/api/1.2/patches/140497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915150816.18190-1-polacek@redhat.com/","msgid":"<20230915150816.18190-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-09-15T15:08:16","name":"gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915150816.18190-1-polacek@redhat.com/mbox/"},{"id":140520,"url":"https://patchwork.plctlab.org/api/1.2/patches/140520/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160301.2245349-1-ppalka@redhat.com/","msgid":"<20230915160301.2245349-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T16:03:01","name":"c++: overeager type completion in convert_to_void [PR111419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160301.2245349-1-ppalka@redhat.com/mbox/"},{"id":140521,"url":"https://patchwork.plctlab.org/api/1.2/patches/140521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160308.2245377-1-ppalka@redhat.com/","msgid":"<20230915160308.2245377-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T16:03:08","name":"c++: visibility wrt template and ptrmem targs [PR70413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915160308.2245377-1-ppalka@redhat.com/mbox/"},{"id":140587,"url":"https://patchwork.plctlab.org/api/1.2/patches/140587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175311.1908421-1-dmalcolm@redhat.com/","msgid":"<20230915175311.1908421-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:11","name":"[pushed] analyzer: handle volatile ops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175311.1908421-1-dmalcolm@redhat.com/mbox/"},{"id":140588,"url":"https://patchwork.plctlab.org/api/1.2/patches/140588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175322.1908473-1-dmalcolm@redhat.com/","msgid":"<20230915175322.1908473-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:22","name":"[pushed] analyzer: introduce pending_location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175322.1908473-1-dmalcolm@redhat.com/mbox/"},{"id":140589,"url":"https://patchwork.plctlab.org/api/1.2/patches/140589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175332.1908520-1-dmalcolm@redhat.com/","msgid":"<20230915175332.1908520-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:53:32","name":"[pushed] analyzer: support diagnostics that don'\''t have a stmt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175332.1908520-1-dmalcolm@redhat.com/mbox/"},{"id":140592,"url":"https://patchwork.plctlab.org/api/1.2/patches/140592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175534.2315315-1-ppalka@redhat.com/","msgid":"<20230915175534.2315315-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-15T17:55:34","name":"c++: constness of decltype of NTTP object [PR98820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915175534.2315315-1-ppalka@redhat.com/mbox/"},{"id":140674,"url":"https://patchwork.plctlab.org/api/1.2/patches/140674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQS/ddll2R/hjMIp@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-15T20:32:53","name":"[v6] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQS/ddll2R/hjMIp@redhat.com/mbox/"},{"id":140689,"url":"https://patchwork.plctlab.org/api/1.2/patches/140689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915205525.2325175-1-jwakely@redhat.com/","msgid":"<20230915205525.2325175-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T20:54:51","name":"[v2,6/13] libstdc++: Remove dg-options \"-std=gnu++20\" from and tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915205525.2325175-1-jwakely@redhat.com/mbox/"},{"id":140750,"url":"https://patchwork.plctlab.org/api/1.2/patches/140750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230301.2328182-1-jwakely@redhat.com/","msgid":"<20230915230301.2328182-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:02:47","name":"[committed] libstdc++: Fix 29_atomics/headers/atomic/types_std_c++2a_neg.cc for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230301.2328182-1-jwakely@redhat.com/mbox/"},{"id":140751,"url":"https://patchwork.plctlab.org/api/1.2/patches/140751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230539.2328463-1-jwakely@redhat.com/","msgid":"<20230915230539.2328463-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:04:27","name":"[committed] libstdc++: Add log line to testsuite output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230539.2328463-1-jwakely@redhat.com/mbox/"},{"id":140752,"url":"https://patchwork.plctlab.org/api/1.2/patches/140752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230924.2328645-1-jwakely@redhat.com/","msgid":"<20230915230924.2328645-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:06:57","name":"[committed] libstdc++: Implement C++26 native handles for file streams (P1759R6)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915230924.2328645-1-jwakely@redhat.com/mbox/"},{"id":140756,"url":"https://patchwork.plctlab.org/api/1.2/patches/140756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915231748.2348413-1-jwakely@redhat.com/","msgid":"<20230915231748.2348413-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:17:37","name":"[committed] libstdc++: Add missing tests for std::basic_filebuf::native_handle()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915231748.2348413-1-jwakely@redhat.com/mbox/"},{"id":140759,"url":"https://patchwork.plctlab.org/api/1.2/patches/140759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-1-jwakely@redhat.com/","msgid":"<20230915232009.2348586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:49","name":"[committed,01/11] libstdc++: Remove dg-options \"-std=gnu++20\" from tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-1-jwakely@redhat.com/mbox/"},{"id":140757,"url":"https://patchwork.plctlab.org/api/1.2/patches/140757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-2-jwakely@redhat.com/","msgid":"<20230915232009.2348586-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:50","name":"[committed,02/11] libstdc++: Remove dg-options \"-std=gnu++20\" from tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-2-jwakely@redhat.com/mbox/"},{"id":140760,"url":"https://patchwork.plctlab.org/api/1.2/patches/140760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-3-jwakely@redhat.com/","msgid":"<20230915232009.2348586-3-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:51","name":"[committed,03/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 20_utils tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-3-jwakely@redhat.com/mbox/"},{"id":140763,"url":"https://patchwork.plctlab.org/api/1.2/patches/140763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-4-jwakely@redhat.com/","msgid":"<20230915232009.2348586-4-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:52","name":"[committed,04/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 21_strings tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-4-jwakely@redhat.com/mbox/"},{"id":140767,"url":"https://patchwork.plctlab.org/api/1.2/patches/140767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-5-jwakely@redhat.com/","msgid":"<20230915232009.2348586-5-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:53","name":"[committed,05/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 23_containers tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-5-jwakely@redhat.com/mbox/"},{"id":140762,"url":"https://patchwork.plctlab.org/api/1.2/patches/140762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-6-jwakely@redhat.com/","msgid":"<20230915232009.2348586-6-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:54","name":"[committed,06/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 24_iterators tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-6-jwakely@redhat.com/mbox/"},{"id":140765,"url":"https://patchwork.plctlab.org/api/1.2/patches/140765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-7-jwakely@redhat.com/","msgid":"<20230915232009.2348586-7-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:55","name":"[committed,07/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 26_numerics tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-7-jwakely@redhat.com/mbox/"},{"id":140770,"url":"https://patchwork.plctlab.org/api/1.2/patches/140770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-8-jwakely@redhat.com/","msgid":"<20230915232009.2348586-8-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:56","name":"[committed,08/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 27_io tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-8-jwakely@redhat.com/mbox/"},{"id":140764,"url":"https://patchwork.plctlab.org/api/1.2/patches/140764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-9-jwakely@redhat.com/","msgid":"<20230915232009.2348586-9-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:57","name":"[committed,09/11] libstdc++: Remove dg-options \"-std=gnu++20\" from 30_threads tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-9-jwakely@redhat.com/mbox/"},{"id":140766,"url":"https://patchwork.plctlab.org/api/1.2/patches/140766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-10-jwakely@redhat.com/","msgid":"<20230915232009.2348586-10-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:58","name":"[committed,10/11] libstdc++: Remove dg-options \"-std=gnu++20\" from remaining tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-10-jwakely@redhat.com/mbox/"},{"id":140768,"url":"https://patchwork.plctlab.org/api/1.2/patches/140768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-11-jwakely@redhat.com/","msgid":"<20230915232009.2348586-11-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-15T23:18:59","name":"[committed,11/11] libstdc++: Do not require effective target pthread for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915232009.2348586-11-jwakely@redhat.com/mbox/"},{"id":140836,"url":"https://patchwork.plctlab.org/api/1.2/patches/140836/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-2-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:47","name":"[v14,01/40] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-2-kmatsui@gcc.gnu.org/mbox/"},{"id":140799,"url":"https://patchwork.plctlab.org/api/1.2/patches/140799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-3-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:48","name":"[v14,02/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-3-kmatsui@gcc.gnu.org/mbox/"},{"id":140831,"url":"https://patchwork.plctlab.org/api/1.2/patches/140831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-4-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:49","name":"[v14,03/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-4-kmatsui@gcc.gnu.org/mbox/"},{"id":140779,"url":"https://patchwork.plctlab.org/api/1.2/patches/140779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-5-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:50","name":"[v14,04/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-5-kmatsui@gcc.gnu.org/mbox/"},{"id":140782,"url":"https://patchwork.plctlab.org/api/1.2/patches/140782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-6-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:51","name":"[v14,05/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-6-kmatsui@gcc.gnu.org/mbox/"},{"id":140834,"url":"https://patchwork.plctlab.org/api/1.2/patches/140834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-7-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:52","name":"[v14,06/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-7-kmatsui@gcc.gnu.org/mbox/"},{"id":140830,"url":"https://patchwork.plctlab.org/api/1.2/patches/140830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-8-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:53","name":"[v14,07/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-8-kmatsui@gcc.gnu.org/mbox/"},{"id":140788,"url":"https://patchwork.plctlab.org/api/1.2/patches/140788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-9-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:54","name":"[v14,08/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-9-kmatsui@gcc.gnu.org/mbox/"},{"id":140818,"url":"https://patchwork.plctlab.org/api/1.2/patches/140818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-10-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:55","name":"[v14,09/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-10-kmatsui@gcc.gnu.org/mbox/"},{"id":140826,"url":"https://patchwork.plctlab.org/api/1.2/patches/140826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-11-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:56","name":"[v14,10/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-11-kmatsui@gcc.gnu.org/mbox/"},{"id":140817,"url":"https://patchwork.plctlab.org/api/1.2/patches/140817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-12-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:57","name":"[v14,11/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-12-kmatsui@gcc.gnu.org/mbox/"},{"id":140781,"url":"https://patchwork.plctlab.org/api/1.2/patches/140781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-13-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:58","name":"[v14,12/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-13-kmatsui@gcc.gnu.org/mbox/"},{"id":140797,"url":"https://patchwork.plctlab.org/api/1.2/patches/140797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-14-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:50:59","name":"[v14,13/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-14-kmatsui@gcc.gnu.org/mbox/"},{"id":140820,"url":"https://patchwork.plctlab.org/api/1.2/patches/140820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-15-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:00","name":"[v14,14/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-15-kmatsui@gcc.gnu.org/mbox/"},{"id":140811,"url":"https://patchwork.plctlab.org/api/1.2/patches/140811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-16-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:01","name":"[v14,15/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-16-kmatsui@gcc.gnu.org/mbox/"},{"id":140783,"url":"https://patchwork.plctlab.org/api/1.2/patches/140783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-17-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:02","name":"[v14,16/40] c, c++: Use 16 bits for all use of enum rid for more keyword space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-17-kmatsui@gcc.gnu.org/mbox/"},{"id":140780,"url":"https://patchwork.plctlab.org/api/1.2/patches/140780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-18-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:03","name":"[v14,17/40] c-family: Fix C_SET_RID_CODE to handle 16-bit rid code correctly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-18-kmatsui@gcc.gnu.org/mbox/"},{"id":140829,"url":"https://patchwork.plctlab.org/api/1.2/patches/140829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-19-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:04","name":"[v14,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-19-kmatsui@gcc.gnu.org/mbox/"},{"id":140838,"url":"https://patchwork.plctlab.org/api/1.2/patches/140838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-20-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:05","name":"[v14,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-20-kmatsui@gcc.gnu.org/mbox/"},{"id":140825,"url":"https://patchwork.plctlab.org/api/1.2/patches/140825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-21-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:06","name":"[v14,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-21-kmatsui@gcc.gnu.org/mbox/"},{"id":140812,"url":"https://patchwork.plctlab.org/api/1.2/patches/140812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-22-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:07","name":"[v14,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-22-kmatsui@gcc.gnu.org/mbox/"},{"id":140806,"url":"https://patchwork.plctlab.org/api/1.2/patches/140806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-23-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:08","name":"[v14,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-23-kmatsui@gcc.gnu.org/mbox/"},{"id":140785,"url":"https://patchwork.plctlab.org/api/1.2/patches/140785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-24-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:09","name":"[v14,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-24-kmatsui@gcc.gnu.org/mbox/"},{"id":140796,"url":"https://patchwork.plctlab.org/api/1.2/patches/140796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-25-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:10","name":"[v14,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-25-kmatsui@gcc.gnu.org/mbox/"},{"id":140789,"url":"https://patchwork.plctlab.org/api/1.2/patches/140789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-26-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:11","name":"[v14,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-26-kmatsui@gcc.gnu.org/mbox/"},{"id":140790,"url":"https://patchwork.plctlab.org/api/1.2/patches/140790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-27-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:12","name":"[v14,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-27-kmatsui@gcc.gnu.org/mbox/"},{"id":140824,"url":"https://patchwork.plctlab.org/api/1.2/patches/140824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-28-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:13","name":"[v14,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-28-kmatsui@gcc.gnu.org/mbox/"},{"id":140835,"url":"https://patchwork.plctlab.org/api/1.2/patches/140835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-29-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:14","name":"[v14,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-29-kmatsui@gcc.gnu.org/mbox/"},{"id":140815,"url":"https://patchwork.plctlab.org/api/1.2/patches/140815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-30-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:15","name":"[v14,29/40] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-30-kmatsui@gcc.gnu.org/mbox/"},{"id":140827,"url":"https://patchwork.plctlab.org/api/1.2/patches/140827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-31-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:16","name":"[v14,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-31-kmatsui@gcc.gnu.org/mbox/"},{"id":140814,"url":"https://patchwork.plctlab.org/api/1.2/patches/140814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-32-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:17","name":"[v14,31/40] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-32-kmatsui@gcc.gnu.org/mbox/"},{"id":140795,"url":"https://patchwork.plctlab.org/api/1.2/patches/140795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-33-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:18","name":"[v14,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-33-kmatsui@gcc.gnu.org/mbox/"},{"id":140813,"url":"https://patchwork.plctlab.org/api/1.2/patches/140813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-34-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:19","name":"[v14,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-34-kmatsui@gcc.gnu.org/mbox/"},{"id":140828,"url":"https://patchwork.plctlab.org/api/1.2/patches/140828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-35-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:20","name":"[v14,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-35-kmatsui@gcc.gnu.org/mbox/"},{"id":140832,"url":"https://patchwork.plctlab.org/api/1.2/patches/140832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-36-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:21","name":"[v14,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-36-kmatsui@gcc.gnu.org/mbox/"},{"id":140804,"url":"https://patchwork.plctlab.org/api/1.2/patches/140804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-37-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:22","name":"[v14,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-37-kmatsui@gcc.gnu.org/mbox/"},{"id":140794,"url":"https://patchwork.plctlab.org/api/1.2/patches/140794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-38-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:23","name":"[v14,37/40] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-38-kmatsui@gcc.gnu.org/mbox/"},{"id":140819,"url":"https://patchwork.plctlab.org/api/1.2/patches/140819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-39-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:24","name":"[v14,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-39-kmatsui@gcc.gnu.org/mbox/"},{"id":140816,"url":"https://patchwork.plctlab.org/api/1.2/patches/140816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-40-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:25","name":"[v14,39/40] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-40-kmatsui@gcc.gnu.org/mbox/"},{"id":140803,"url":"https://patchwork.plctlab.org/api/1.2/patches/140803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-41-kmatsui@gcc.gnu.org/","msgid":"<20230915235353.19378-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-09-15T23:51:26","name":"[v14,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230915235353.19378-41-kmatsui@gcc.gnu.org/mbox/"},{"id":140845,"url":"https://patchwork.plctlab.org/api/1.2/patches/140845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916010009.3672058-1-lhyatt@gmail.com/","msgid":"<20230916010009.3672058-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-09-16T01:00:09","name":"libcpp: Fix ICE on #include after a line marker directive [PR61474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916010009.3672058-1-lhyatt@gmail.com/mbox/"},{"id":140938,"url":"https://patchwork.plctlab.org/api/1.2/patches/140938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916044539.3362257-1-juzhe.zhong@rivai.ai/","msgid":"<20230916044539.3362257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-16T04:45:39","name":"internal-fn: Convert uninitialized SSA_NAME into SCRATCH rtx[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916044539.3362257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":140961,"url":"https://patchwork.plctlab.org/api/1.2/patches/140961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916054920.1653864-1-apinski@marvell.com/","msgid":"<20230916054920.1653864-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-16T05:49:20","name":"MATCH: Add simplifications for `(a * zero_one) ==/!= CST`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916054920.1653864-1-apinski@marvell.com/mbox/"},{"id":141006,"url":"https://patchwork.plctlab.org/api/1.2/patches/141006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916091643.3160525-1-mengqinggang@loongson.cn/","msgid":"<20230916091643.3160525-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-16T09:16:43","name":"LoongArch: Fix lo_sum rtx cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916091643.3160525-1-mengqinggang@loongson.cn/mbox/"},{"id":141076,"url":"https://patchwork.plctlab.org/api/1.2/patches/141076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916155924.1679335-1-apinski@marvell.com/","msgid":"<20230916155924.1679335-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-16T15:59:24","name":"MATCH: Add simplifications of `(a == CST) & a`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230916155924.1679335-1-apinski@marvell.com/mbox/"},{"id":141119,"url":"https://patchwork.plctlab.org/api/1.2/patches/141119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917014418.1703031-1-apinski@marvell.com/","msgid":"<20230917014418.1703031-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T01:44:18","name":"MATCH: Avoid recusive zero_one_valued_p for conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917014418.1703031-1-apinski@marvell.com/mbox/"},{"id":141121,"url":"https://patchwork.plctlab.org/api/1.2/patches/141121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917020549.973008-1-juzhe.zhong@rivai.ai/","msgid":"<20230917020549.973008-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-17T02:05:49","name":"RISC-V: Support VLS modes reduction[PR111153]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917020549.973008-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141133,"url":"https://patchwork.plctlab.org/api/1.2/patches/141133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917074234.1541088-1-pan2.li@intel.com/","msgid":"<20230917074234.1541088-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-17T07:42:34","name":"[v1] RISC-V: Bugfix for scalar move with merged operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917074234.1541088-1-pan2.li@intel.com/mbox/"},{"id":141147,"url":"https://patchwork.plctlab.org/api/1.2/patches/141147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQb1FtC4Bwv26zNE@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-17T12:46:14","name":"[v2] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQb1FtC4Bwv26zNE@Thaum.localdomain/mbox/"},{"id":141152,"url":"https://patchwork.plctlab.org/api/1.2/patches/141152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917144749.1032038-1-juzhe.zhong@rivai.ai/","msgid":"<20230917144749.1032038-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-17T14:47:49","name":"[V2] internal-fn: Support undefined rtx for uninitialized SSA_NAME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917144749.1032038-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141179,"url":"https://patchwork.plctlab.org/api/1.2/patches/141179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917185140.1333132-1-ppalka@redhat.com/","msgid":"<20230917185140.1333132-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-17T18:51:40","name":"c++: non-dependent assignment checking [PR63198, PR18474]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917185140.1333132-1-ppalka@redhat.com/mbox/"},{"id":141183,"url":"https://patchwork.plctlab.org/api/1.2/patches/141183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917191304.1483576-1-ppalka@redhat.com/","msgid":"<20230917191304.1483576-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-17T19:13:04","name":"c++: optimize tsubst_template_decl for function templates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917191304.1483576-1-ppalka@redhat.com/mbox/"},{"id":141191,"url":"https://patchwork.plctlab.org/api/1.2/patches/141191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917194617.928955-1-dkm@kataplop.net/","msgid":"<20230917194617.928955-1-dkm@kataplop.net>","list_archive_url":null,"date":"2023-09-17T19:46:17","name":"Trivial typo fix in variadic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917194617.928955-1-dkm@kataplop.net/mbox/"},{"id":141197,"url":"https://patchwork.plctlab.org/api/1.2/patches/141197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com/","msgid":"<8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com>","list_archive_url":null,"date":"2023-09-17T20:41:13","name":"[_Hashtable] Avoid redundant usage of rehash policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8046050f-c7e7-e41a-caf6-ddf087719597@gmail.com/mbox/"},{"id":141201,"url":"https://patchwork.plctlab.org/api/1.2/patches/141201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214055.1752964-1-apinski@marvell.com/","msgid":"<20230917214055.1752964-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T21:40:55","name":"MATCH: Make zero_one_valued_p non-recusive fully","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214055.1752964-1-apinski@marvell.com/mbox/"},{"id":141203,"url":"https://patchwork.plctlab.org/api/1.2/patches/141203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214554.1753158-1-apinski@marvell.com/","msgid":"<20230917214554.1753158-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-17T21:45:54","name":"Remove xfail from gcc.dg/tree-ssa/20040204-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230917214554.1753158-1-apinski@marvell.com/mbox/"},{"id":141227,"url":"https://patchwork.plctlab.org/api/1.2/patches/141227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918014434.2566268-1-juzhe.zhong@rivai.ai/","msgid":"<20230918014434.2566268-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T01:44:34","name":"[V3] internal-fn: Support undefined rtx for uninitialized SSA_NAME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918014434.2566268-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141233,"url":"https://patchwork.plctlab.org/api/1.2/patches/141233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918025408.2591026-1-juzhe.zhong@rivai.ai/","msgid":"<20230918025408.2591026-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T02:54:08","name":"[Committed] RISC-V: Remove redundant codes of VLS patterns[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918025408.2591026-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141236,"url":"https://patchwork.plctlab.org/api/1.2/patches/141236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918032711.3807244-1-pan2.li@intel.com/","msgid":"<20230918032711.3807244-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-18T03:27:11","name":"[v1] RISC-V: Support VLS mode for vec_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918032711.3807244-1-pan2.li@intel.com/mbox/"},{"id":141239,"url":"https://patchwork.plctlab.org/api/1.2/patches/141239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918034008.3671734-1-jason@redhat.com/","msgid":"<20230918034008.3671734-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-18T03:40:08","name":"[pushed] doc: GTY((cache)) documentation tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918034008.3671734-1-jason@redhat.com/mbox/"},{"id":141242,"url":"https://patchwork.plctlab.org/api/1.2/patches/141242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918041925.26614-1-xuli1@eswincomputing.com/","msgid":"<20230918041925.26614-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-18T04:19:25","name":"RISC-V: Remove phase 6 of vsetvl pass in GCC13[PR111412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918041925.26614-1-xuli1@eswincomputing.com/mbox/"},{"id":141250,"url":"https://patchwork.plctlab.org/api/1.2/patches/141250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com/","msgid":"<65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com>","list_archive_url":null,"date":"2023-09-18T05:59:05","name":"PATCH v6 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com/mbox/"},{"id":141255,"url":"https://patchwork.plctlab.org/api/1.2/patches/141255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/feee9000-859a-3fae-66d5-9844be71fe3e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-18T06:26:21","name":"rs6000: Use default target option node for callee by default [PR111380]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/feee9000-859a-3fae-66d5-9844be71fe3e@linux.ibm.com/mbox/"},{"id":141256,"url":"https://patchwork.plctlab.org/api/1.2/patches/141256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com/","msgid":"<61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com>","list_archive_url":null,"date":"2023-09-18T06:26:56","name":"rs6000: Skip empty inline asm in rs6000_update_ipa_fn_target_info [PR111366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com/mbox/"},{"id":141262,"url":"https://patchwork.plctlab.org/api/1.2/patches/141262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918070713.3569601-1-juzhe.zhong@rivai.ai/","msgid":"<20230918070713.3569601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T07:07:13","name":"RISC-V: Remove autovec-vls.md file and clean up VLS move modes[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918070713.3569601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141321,"url":"https://patchwork.plctlab.org/api/1.2/patches/141321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918092351.4019900-1-liwei@loongson.cn/","msgid":"<20230918092351.4019900-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-09-18T09:23:51","name":"[v1] LoongArch: Adjust the vector cost model for better performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918092351.4019900-1-liwei@loongson.cn/mbox/"},{"id":141330,"url":"https://patchwork.plctlab.org/api/1.2/patches/141330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918095210.5373-1-gaofei@eswincomputing.com/","msgid":"<20230918095210.5373-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-09-18T09:52:10","name":"MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918095210.5373-1-gaofei@eswincomputing.com/mbox/"},{"id":141358,"url":"https://patchwork.plctlab.org/api/1.2/patches/141358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918110825.3134855-1-juzhe.zhong@rivai.ai/","msgid":"<20230918110825.3134855-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:08:25","name":"[Committed] RISC-V: Fix VSETVL PASS fusion bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918110825.3134855-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141361,"url":"https://patchwork.plctlab.org/api/1.2/patches/141361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918111807.2453946-1-jwakely@redhat.com/","msgid":"<20230918111807.2453946-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T11:17:47","name":"[committed] libstdc++: Minor update to installation docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918111807.2453946-1-jwakely@redhat.com/mbox/"},{"id":141365,"url":"https://patchwork.plctlab.org/api/1.2/patches/141365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918113717.3538058-1-lehua.ding@rivai.ai/","msgid":"<20230918113717.3538058-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:37:17","name":"RISC-V: Refactor and cleanup fma patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918113717.3538058-1-lehua.ding@rivai.ai/mbox/"},{"id":141368,"url":"https://patchwork.plctlab.org/api/1.2/patches/141368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918114414.3667280-1-juzhe.zhong@rivai.ai/","msgid":"<20230918114414.3667280-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T11:44:14","name":"[Committed] RISC-V: Support VLS reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918114414.3667280-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141393,"url":"https://patchwork.plctlab.org/api/1.2/patches/141393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918121324.3696866-1-lehua.ding@rivai.ai/","msgid":"<20230918121324.3696866-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:13:24","name":"RISC-V: Add fixed PR111255 testcase by other patch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918121324.3696866-1-lehua.ding@rivai.ai/mbox/"},{"id":141396,"url":"https://patchwork.plctlab.org/api/1.2/patches/141396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com/","msgid":"<98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com>","list_archive_url":null,"date":"2023-09-18T12:22:50","name":"OpenMP: Add ME support for '\''omp allocate'\'' stack variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98cc1611-7369-4a2b-a7df-73200eded3c9@codesourcery.com/mbox/"},{"id":141398,"url":"https://patchwork.plctlab.org/api/1.2/patches/141398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918122951.3703638-1-lehua.ding@rivai.ai/","msgid":"<20230918122951.3703638-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:29:51","name":"RISC-V: Removed misleading comments in testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918122951.3703638-1-lehua.ding@rivai.ai/mbox/"},{"id":141400,"url":"https://patchwork.plctlab.org/api/1.2/patches/141400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123141.3704086-1-juzhe.zhong@rivai.ai/","msgid":"<20230918123141.3704086-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:31:41","name":"[Committed] RISC-V: Fix bogus FAILs of vsetvl testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123141.3704086-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141401,"url":"https://patchwork.plctlab.org/api/1.2/patches/141401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123508.3705854-1-juzhe.zhong@rivai.ai/","msgid":"<20230918123508.3705854-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-18T12:35:08","name":"RISC-V: Remove redundant vec_duplicate pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918123508.3705854-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141413,"url":"https://patchwork.plctlab.org/api/1.2/patches/141413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918130141.2460012-1-jwakely@redhat.com/","msgid":"<20230918130141.2460012-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T13:01:33","name":"[wwwdocs] Document libstdc++ changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918130141.2460012-1-jwakely@redhat.com/mbox/"},{"id":141415,"url":"https://patchwork.plctlab.org/api/1.2/patches/141415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918131221.2462150-1-jwakely@redhat.com/","msgid":"<20230918131221.2462150-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T13:11:28","name":"[committed] libstdc++: Update C++20 and C++23 status docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918131221.2462150-1-jwakely@redhat.com/mbox/"},{"id":141428,"url":"https://patchwork.plctlab.org/api/1.2/patches/141428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918142311.2464732-1-jwakely@redhat.com/","msgid":"<20230918142311.2464732-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-09-18T14:22:54","name":"[committed] libstdc++: Minor tweak to C++20 status docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918142311.2464732-1-jwakely@redhat.com/mbox/"},{"id":141436,"url":"https://patchwork.plctlab.org/api/1.2/patches/141436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il87bku2.fsf@euler.schwinge.homeip.net/","msgid":"<87il87bku2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:46:29","name":"LTO: Get rid of '\''lto_mode_identity_table'\'' (was: Machine Mode ICE in RISC-V when LTO)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il87bku2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141438,"url":"https://patchwork.plctlab.org/api/1.2/patches/141438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkdzy1wm.fsf@euler.schwinge.homeip.net/","msgid":"<87bkdzy1wm.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:46:49","name":"Fix up '\''g++.dg/abi/nvptx-ptrmem1.C'\'' (was: [PTX] more register cleanups)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bkdzy1wm.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141440,"url":"https://patchwork.plctlab.org/api/1.2/patches/141440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5tjy1wa.fsf@euler.schwinge.homeip.net/","msgid":"<87a5tjy1wa.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:47:01","name":"Add '\''g++.target/nvptx/nvptx.exp'\'' for nvptx-specific C++ test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5tjy1wa.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141439,"url":"https://patchwork.plctlab.org/api/1.2/patches/141439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r93y1vp.fsf@euler.schwinge.homeip.net/","msgid":"<878r93y1vp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-18T14:47:22","name":"Move '\''g++.dg/abi/nvptx-[...].C'\'' -> '\''g++.target/nvptx/abi-[...].C'\'' (was: [PTX] parameters and return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r93y1vp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141451,"url":"https://patchwork.plctlab.org/api/1.2/patches/141451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153544.ECE0D33E99@hamza.pair.com/","msgid":"<20230918153544.ECE0D33E99@hamza.pair.com>","list_archive_url":null,"date":"2023-09-18T15:35:44","name":"[pushed] wwwdocs: conduct: Fix nested lists","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153544.ECE0D33E99@hamza.pair.com/mbox/"},{"id":141453,"url":"https://patchwork.plctlab.org/api/1.2/patches/141453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153622.1584614-1-lehua.ding@rivai.ai/","msgid":"<20230918153622.1584614-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-18T15:36:22","name":"RISC-V: Support combine cond extend and reduce sum to cond widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918153622.1584614-1-lehua.ding@rivai.ai/mbox/"},{"id":141464,"url":"https://patchwork.plctlab.org/api/1.2/patches/141464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-1-ppalka@redhat.com/","msgid":"<20230918161202.2884010-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-18T16:12:01","name":"[v2,1/2] c++: overeager type completion in convert_to_void [PR111419]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-1-ppalka@redhat.com/mbox/"},{"id":141465,"url":"https://patchwork.plctlab.org/api/1.2/patches/141465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-2-ppalka@redhat.com/","msgid":"<20230918161202.2884010-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-18T16:12:02","name":"[v2,2/2] c++: convert_to_void and volatile references","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918161202.2884010-2-ppalka@redhat.com/mbox/"},{"id":141486,"url":"https://patchwork.plctlab.org/api/1.2/patches/141486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiFCPMdK2Jrrgs1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-18T17:12:40","name":"c++, v2: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiFCPMdK2Jrrgs1@tucnak/mbox/"},{"id":141489,"url":"https://patchwork.plctlab.org/api/1.2/patches/141489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiHBe+ZImdAuuRr@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-18T17:21:09","name":"c++, v2: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQiHBe+ZImdAuuRr@tucnak/mbox/"},{"id":141511,"url":"https://patchwork.plctlab.org/api/1.2/patches/141511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918183614.41034-1-iain@sandoe.co.uk/","msgid":"<20230918183614.41034-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-18T18:36:14","name":"[pushed] configure, Darwin: Adjust handing of stdlib option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918183614.41034-1-iain@sandoe.co.uk/mbox/"},{"id":141514,"url":"https://patchwork.plctlab.org/api/1.2/patches/141514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918184144.41108-1-iain@sandoe.co.uk/","msgid":"<20230918184144.41108-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-18T18:41:44","name":"[pushed] Darwin, debug : Switch to DWARF 3 or 4 when dsymutil supports it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230918184144.41108-1-iain@sandoe.co.uk/mbox/"},{"id":141562,"url":"https://patchwork.plctlab.org/api/1.2/patches/141562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-97d8f744-3dad-4060-bd01-4e51b565ad52-1695068821367@3c-app-gmx-bap05/","msgid":"","list_archive_url":null,"date":"2023-09-18T20:27:01","name":"fortran: fix checking of CHARACTER lengths in array constructors [PR70231]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-97d8f744-3dad-4060-bd01-4e51b565ad52-1695068821367@3c-app-gmx-bap05/mbox/"},{"id":141580,"url":"https://patchwork.plctlab.org/api/1.2/patches/141580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0624c1f6b5c97100f80c2ddf55a0498ef6bf63.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-09-18T21:26:49","name":"[C,v2] Add Walloc-size to warn about insufficient size in allocations [PR71219]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc0624c1f6b5c97100f80c2ddf55a0498ef6bf63.camel@tugraz.at/mbox/"},{"id":141584,"url":"https://patchwork.plctlab.org/api/1.2/patches/141584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQjEQBas/GM+yjSq@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-18T21:42:24","name":"[v7] c++: Move consteval folding to cp_fold_r","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQjEQBas/GM+yjSq@redhat.com/mbox/"},{"id":141633,"url":"https://patchwork.plctlab.org/api/1.2/patches/141633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com/","msgid":"<375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-19T00:53:14","name":"RISC-V: Add builtin .def file dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/375a15e0c2c1c5d0a6f98378973eb7ec5fe941a2.1695084790.git.research_trasio@irq.a4lg.com/mbox/"},{"id":141661,"url":"https://patchwork.plctlab.org/api/1.2/patches/141661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919022559.1879725-1-juzhe.zhong@rivai.ai/","msgid":"<20230919022559.1879725-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T02:25:59","name":"RISC-V: Fix RVV can change mode class bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919022559.1879725-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141667,"url":"https://patchwork.plctlab.org/api/1.2/patches/141667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com/","msgid":"<7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-19T02:48:03","name":"[COMMITTED] RISC-V: Fix typos on comments (SVE -> RVV)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7f4fc87086b5ad57edaaf628ba6cb92649d14453.1695091631.git.research_trasio@irq.a4lg.com/mbox/"},{"id":141669,"url":"https://patchwork.plctlab.org/api/1.2/patches/141669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919025922.1898652-1-juzhe.zhong@rivai.ai/","msgid":"<20230919025922.1898652-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T02:59:22","name":"[V2] RISC-V: Fix RVV can change mode class bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919025922.1898652-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141702,"url":"https://patchwork.plctlab.org/api/1.2/patches/141702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-1-guojiufu@linux.ibm.com/","msgid":"<20230919052353.3208707-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T05:23:52","name":"[1/2] using overflow_free_p to simplify pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-1-guojiufu@linux.ibm.com/mbox/"},{"id":141703,"url":"https://patchwork.plctlab.org/api/1.2/patches/141703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-2-guojiufu@linux.ibm.com/","msgid":"<20230919052353.3208707-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T05:23:53","name":"[2/2] testcase: rename pr111303.c to pr111324.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919052353.3208707-2-guojiufu@linux.ibm.com/mbox/"},{"id":141710,"url":"https://patchwork.plctlab.org/api/1.2/patches/141710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919070109.573374-1-mengqinggang@loongson.cn/","msgid":"<20230919070109.573374-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-09-19T07:01:09","name":"[v3] Modify gas uleb128 support test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919070109.573374-1-mengqinggang@loongson.cn/mbox/"},{"id":141714,"url":"https://patchwork.plctlab.org/api/1.2/patches/141714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlMfsN2tNELdv0B@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:23:42","name":"v2: small _BitInt tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlMfsN2tNELdv0B@tucnak/mbox/"},{"id":141716,"url":"https://patchwork.plctlab.org/api/1.2/patches/141716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlOhbHYG3BQ5RHI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:32:21","name":"[committed] libgomp: Handle NULL environ like pointer to NULL pointer [PR111413]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlOhbHYG3BQ5RHI@tucnak/mbox/"},{"id":141720,"url":"https://patchwork.plctlab.org/api/1.2/patches/141720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlSYHDjdxvK5LtD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-19T07:48:48","name":"match.pd: Some build_nonstandard_integer_type tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQlSYHDjdxvK5LtD@tucnak/mbox/"},{"id":141734,"url":"https://patchwork.plctlab.org/api/1.2/patches/141734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919081611.2696019-1-juzhe.zhong@rivai.ai/","msgid":"<20230919081611.2696019-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T08:16:11","name":"[Committed] RISC-V: Support integer FMA/FNMA VLS modes autovectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919081611.2696019-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141741,"url":"https://patchwork.plctlab.org/api/1.2/patches/141741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084444.2089-1-jinma@linux.alibaba.com/","msgid":"<20230919084444.2089-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-09-19T08:44:43","name":"[RFC,1/2] RISC-V: Add support for _Bfloat16.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084444.2089-1-jinma@linux.alibaba.com/mbox/"},{"id":141743,"url":"https://patchwork.plctlab.org/api/1.2/patches/141743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084625.2183-1-jinma@linux.alibaba.com/","msgid":"<20230919084625.2183-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-09-19T08:46:25","name":"[RFC,2/2] RISC-V: Add '\''Zfbfmin'\'' extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919084625.2183-1-jinma@linux.alibaba.com/mbox/"},{"id":141744,"url":"https://patchwork.plctlab.org/api/1.2/patches/141744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y46y2f7.fsf@euler.schwinge.homeip.net/","msgid":"<875y46y2f7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-09-19T08:47:56","name":"[PING] More '\''#ifdef ASM_OUTPUT_DEF'\'' -> '\''if (TARGET_SUPPORTS_ALIASES)'\'' etc. (was: [PATCH][v2] Introduce TARGET_SUPPORTS_ALIASES)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y46y2f7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":141758,"url":"https://patchwork.plctlab.org/api/1.2/patches/141758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5fb2e05-9ab3-3b4f-2108-1790a708b34e@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T08:59:32","name":"[v7,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5fb2e05-9ab3-3b4f-2108-1790a708b34e@linux.ibm.com/mbox/"},{"id":141774,"url":"https://patchwork.plctlab.org/api/1.2/patches/141774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com/","msgid":"<9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T09:21:16","name":"[v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d06fa96-0a59-8e47-1869-d6e34a24163a@linux.ibm.com/mbox/"},{"id":141775,"url":"https://patchwork.plctlab.org/api/1.2/patches/141775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919092134.2722883-1-juzhe.zhong@rivai.ai/","msgid":"<20230919092134.2722883-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T09:21:34","name":"[Committed] RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919092134.2722883-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141813,"url":"https://patchwork.plctlab.org/api/1.2/patches/141813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919103900.A8F7D13458@imap2.suse-dmz.suse.de/","msgid":"<20230919103900.A8F7D13458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T10:39:00","name":"c/111468 - add unordered compare and pointer diff to GIMPLE FE parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919103900.A8F7D13458@imap2.suse-dmz.suse.de/mbox/"},{"id":141831,"url":"https://patchwork.plctlab.org/api/1.2/patches/141831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112311.8EC27134F3@imap2.suse-dmz.suse.de/","msgid":"<20230919112311.8EC27134F3@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T11:23:11","name":"tree-optimization/111465 - bougs jump threading with no-copy src block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112311.8EC27134F3@imap2.suse-dmz.suse.de/mbox/"},{"id":141833,"url":"https://patchwork.plctlab.org/api/1.2/patches/141833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112653.539780-1-juzhe.zhong@rivai.ai/","msgid":"<20230919112653.539780-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T11:26:53","name":"[Committed] RISC-V: Support VLS unary floating-point patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112653.539780-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141834,"url":"https://patchwork.plctlab.org/api/1.2/patches/141834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112716.2265251-1-poulhies@adacore.com/","msgid":"<20230919112716.2265251-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T11:27:16","name":"[COMMITTED] ada: Crash processing type invariants on child subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112716.2265251-1-poulhies@adacore.com/mbox/"},{"id":141835,"url":"https://patchwork.plctlab.org/api/1.2/patches/141835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112727.2265405-1-poulhies@adacore.com/","msgid":"<20230919112727.2265405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T11:27:27","name":"[COMMITTED] ada: Refine upper array bound for bit packed array","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919112727.2265405-1-poulhies@adacore.com/mbox/"},{"id":141842,"url":"https://patchwork.plctlab.org/api/1.2/patches/141842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120342.2276062-1-poulhies@adacore.com/","msgid":"<20230919120342.2276062-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T12:03:42","name":"[COMMITTED] ada: Private extensions with the keyword \"synchronized\" are always limited.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120342.2276062-1-poulhies@adacore.com/mbox/"},{"id":141846,"url":"https://patchwork.plctlab.org/api/1.2/patches/141846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120812.2277126-1-poulhies@adacore.com/","msgid":"<20230919120812.2277126-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-09-19T12:08:12","name":"[COMMITTED] ada: TSS finalize address subprogram generation for constrained...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919120812.2277126-1-poulhies@adacore.com/mbox/"},{"id":141852,"url":"https://patchwork.plctlab.org/api/1.2/patches/141852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919121858.572681-1-juzhe.zhong@rivai.ai/","msgid":"<20230919121858.572681-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-19T12:18:58","name":"RISC-V: Add FNMS floating-point VLS tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919121858.572681-1-juzhe.zhong@rivai.ai/mbox/"},{"id":141859,"url":"https://patchwork.plctlab.org/api/1.2/patches/141859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17720-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T12:30:22","name":"middle-end: relax validate_subreg to allow paradoxical subregs that change mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17720-tamar@arm.com/mbox/"},{"id":141868,"url":"https://patchwork.plctlab.org/api/1.2/patches/141868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124146.3418D13458@imap2.suse-dmz.suse.de/","msgid":"<20230919124146.3418D13458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T12:41:45","name":"c/111468 - dump unordered compare operators in their GIMPLE form with -gimple","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124146.3418D13458@imap2.suse-dmz.suse.de/mbox/"},{"id":141869,"url":"https://patchwork.plctlab.org/api/1.2/patches/141869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124241.8368713458@imap2.suse-dmz.suse.de/","msgid":"<20230919124241.8368713458@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-19T12:42:41","name":"target/30484 - testcase for exploration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919124241.8368713458@imap2.suse-dmz.suse.de/mbox/"},{"id":141896,"url":"https://patchwork.plctlab.org/api/1.2/patches/141896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17717-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T13:53:51","name":"middle-end ifcvt: replace C++ sort with vec::qsort [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17717-tamar@arm.com/mbox/"},{"id":141946,"url":"https://patchwork.plctlab.org/api/1.2/patches/141946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150444.356437-1-ppalka@redhat.com/","msgid":"<20230919150444.356437-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T15:04:44","name":"c++: further optimize tsubst_template_decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150444.356437-1-ppalka@redhat.com/mbox/"},{"id":141949,"url":"https://patchwork.plctlab.org/api/1.2/patches/141949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-2-mary.bennett@embecosm.com/","msgid":"<20230919150734.2854664-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-09-19T15:07:33","name":"[1/2] RISC-V: Add support for XCVmac extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-2-mary.bennett@embecosm.com/mbox/"},{"id":141950,"url":"https://patchwork.plctlab.org/api/1.2/patches/141950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-3-mary.bennett@embecosm.com/","msgid":"<20230919150734.2854664-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-09-19T15:07:34","name":"[2/2] RISC-V: Add support for XCValu extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919150734.2854664-3-mary.bennett@embecosm.com/mbox/"},{"id":141970,"url":"https://patchwork.plctlab.org/api/1.2/patches/141970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919152834.3988714-1-jason@redhat.com/","msgid":"<20230919152834.3988714-1-jason@redhat.com>","list_archive_url":null,"date":"2023-09-19T15:28:34","name":"[pushed] c++: inherited default constructor [CWG2799]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919152834.3988714-1-jason@redhat.com/mbox/"},{"id":141992,"url":"https://patchwork.plctlab.org/api/1.2/patches/141992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-1-aldyh@redhat.com/","msgid":"<20230919163052.865027-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:45","name":"[COMMITTED,frange] Add op2_range for operator_not_equal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-1-aldyh@redhat.com/mbox/"},{"id":141993,"url":"https://patchwork.plctlab.org/api/1.2/patches/141993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-2-aldyh@redhat.com/","msgid":"<20230919163052.865027-2-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:46","name":"[COMMITTED] Add frange::update_nan (const nan_state &).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-2-aldyh@redhat.com/mbox/"},{"id":141994,"url":"https://patchwork.plctlab.org/api/1.2/patches/141994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-3-aldyh@redhat.com/","msgid":"<20230919163052.865027-3-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:30:47","name":"[COMMITTED,frange] Remove redundant known_isnan() checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919163052.865027-3-aldyh@redhat.com/mbox/"},{"id":141995,"url":"https://patchwork.plctlab.org/api/1.2/patches/141995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919164055.728094-1-ppalka@redhat.com/","msgid":"<20230919164055.728094-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T16:40:54","name":"c++: improve class NTTP object pretty printing [PR111471]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919164055.728094-1-ppalka@redhat.com/mbox/"},{"id":142010,"url":"https://patchwork.plctlab.org/api/1.2/patches/142010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf026313-2297-4ce0-b9a1-f42ec56ba927@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T17:31:59","name":"[committed] Fix bogus operand predicate on iq2000","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bf026313-2297-4ce0-b9a1-f42ec56ba927@gmail.com/mbox/"},{"id":142039,"url":"https://patchwork.plctlab.org/api/1.2/patches/142039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919180423.452938-1-patrick@rivosinc.com/","msgid":"<20230919180423.452938-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-19T18:04:23","name":"RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919180423.452938-1-patrick@rivosinc.com/mbox/"},{"id":142044,"url":"https://patchwork.plctlab.org/api/1.2/patches/142044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479B004AEFB75D629A471F591FAA@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T18:16:21","name":"Fixes for profile count/probability maintenance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479B004AEFB75D629A471F591FAA@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":142045,"url":"https://patchwork.plctlab.org/api/1.2/patches/142045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479048C4F98A2BE82FEE30891FAA@DS7PR21MB3479.namprd21.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T18:16:34","name":"Remove .PHONY targets when building .fda files during autoprofiledbootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/DS7PR21MB3479048C4F98A2BE82FEE30891FAA@DS7PR21MB3479.namprd21.prod.outlook.com/mbox/"},{"id":142053,"url":"https://patchwork.plctlab.org/api/1.2/patches/142053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919184016.1059841-1-ppalka@redhat.com/","msgid":"<20230919184016.1059841-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-19T18:40:15","name":"[pushed] c++: fix cxx_print_type'\''s template-info dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230919184016.1059841-1-ppalka@redhat.com/mbox/"},{"id":142091,"url":"https://patchwork.plctlab.org/api/1.2/patches/142091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com/","msgid":"<4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com>","list_archive_url":null,"date":"2023-09-19T21:10:49","name":"[v8,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aed9b18-3c58-b640-e9ac-cd81cb6e4dfa@linux.ibm.com/mbox/"},{"id":142094,"url":"https://patchwork.plctlab.org/api/1.2/patches/142094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2154eb3-1f73-986b-c110-da910959ddab@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-09-19T21:21:03","name":"[Committed] RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e2154eb3-1f73-986b-c110-da910959ddab@rivosinc.com/mbox/"},{"id":142153,"url":"https://patchwork.plctlab.org/api/1.2/patches/142153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920011557.106634-1-panchenghui@loongson.cn/","msgid":"<20230920011557.106634-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-09-20T01:15:57","name":"[v1] Update check_effective_target_vect_int_mod according to LoongArch SX/ASX capabilities.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920011557.106634-1-panchenghui@loongson.cn/mbox/"},{"id":142170,"url":"https://patchwork.plctlab.org/api/1.2/patches/142170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920022440.3404964-1-juzhe.zhong@rivai.ai/","msgid":"<20230920022440.3404964-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T02:24:40","name":"[Committed] RISC-V: Extend VLS modes in '\''VWEXTI'\'' iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920022440.3404964-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142175,"url":"https://patchwork.plctlab.org/api/1.2/patches/142175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920023059.1728132-1-pan2.li@intel.com/","msgid":"<20230920023059.1728132-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-20T02:30:59","name":"[v1] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920023059.1728132-1-pan2.li@intel.com/mbox/"},{"id":142202,"url":"https://patchwork.plctlab.org/api/1.2/patches/142202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920033736.365110-1-yanzhang.wang@intel.com/","msgid":"<20230920033736.365110-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-09-20T03:36:20","name":"RISC-V: Support simplifying x/(-1) to neg for vector.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920033736.365110-1-yanzhang.wang@intel.com/mbox/"},{"id":142212,"url":"https://patchwork.plctlab.org/api/1.2/patches/142212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920041202.4099349-1-lhyatt@gmail.com/","msgid":"<20230920041202.4099349-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-09-20T04:12:02","name":"libcpp: Improve the diagnostic for poisoned identifiers [PR36887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920041202.4099349-1-lhyatt@gmail.com/mbox/"},{"id":142220,"url":"https://patchwork.plctlab.org/api/1.2/patches/142220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com/","msgid":"<55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com>","list_archive_url":null,"date":"2023-09-20T04:51:05","name":"[_GLIBCXX_INLINE_VERSION] Fix ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/55f0212a-f8d3-aa9e-8788-f5165484ac6c@gmail.com/mbox/"},{"id":142233,"url":"https://patchwork.plctlab.org/api/1.2/patches/142233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920053954.3454414-1-lehua.ding@rivai.ai/","msgid":"<20230920053954.3454414-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T05:39:54","name":"RISC-V: Fixed ICE caused by missing operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920053954.3454414-1-lehua.ding@rivai.ai/mbox/"},{"id":142235,"url":"https://patchwork.plctlab.org/api/1.2/patches/142235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg1he65o.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-09-20T05:59:47","name":"[v5] Introduce attribute sym_alias (was: Last call for bikeshedding on attribute sym/exalias/reverse_alias)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzg1he65o.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":142249,"url":"https://patchwork.plctlab.org/api/1.2/patches/142249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqVzpk6dV9FP0LD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T06:48:46","name":"[committed] openmp: Add omp::decl attribute support [PR111392]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqVzpk6dV9FP0LD@tucnak/mbox/"},{"id":142253,"url":"https://patchwork.plctlab.org/api/1.2/patches/142253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920070311.3472141-1-lehua.ding@rivai.ai/","msgid":"<20230920070311.3472141-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T07:03:11","name":"RISC-V: Reorganize and rename combine patterns in autovec-opt.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920070311.3472141-1-lehua.ding@rivai.ai/mbox/"},{"id":142254,"url":"https://patchwork.plctlab.org/api/1.2/patches/142254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJW7-4N-CkL5mH2K+RQomL9pYmZVZvDUjYdMUHHd+5UBA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:03:39","name":"[fortran] PR68155 - ICE on initializing character array in type (len_lhs <> len_rhs)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJW7-4N-CkL5mH2K+RQomL9pYmZVZvDUjYdMUHHd+5UBA@mail.gmail.com/mbox/"},{"id":142258,"url":"https://patchwork.plctlab.org/api/1.2/patches/142258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqciCpgLlyt+ZwJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:17:28","name":"c, c++, v3: Accept __builtin_classify_type (typename)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqciCpgLlyt+ZwJ@tucnak/mbox/"},{"id":142260,"url":"https://patchwork.plctlab.org/api/1.2/patches/142260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqd7dUVlrhR6wE7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-09-20T07:23:25","name":"middle-end: use MAX_FIXED_MODE_SIZE instead of precidion of TImode/DImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQqd7dUVlrhR6wE7@tucnak/mbox/"},{"id":142274,"url":"https://patchwork.plctlab.org/api/1.2/patches/142274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920075744.3514469-1-lehua.ding@rivai.ai/","msgid":"<20230920075744.3514469-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T07:57:44","name":"[V2] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920075744.3514469-1-lehua.ding@rivai.ai/mbox/"},{"id":142290,"url":"https://patchwork.plctlab.org/api/1.2/patches/142290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9e21160-58cb-e4a3-6cee-15ea291b8eba@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T08:49:16","name":"[rs6000] Enable vector compare for 16-byte memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9e21160-58cb-e4a3-6cee-15ea291b8eba@linux.ibm.com/mbox/"},{"id":142302,"url":"https://patchwork.plctlab.org/api/1.2/patches/142302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091921.BD9D91333E@imap2.suse-dmz.suse.de/","msgid":"<20230920091921.BD9D91333E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-20T09:19:21","name":"[1/2] tree-optimization/111489 - turn uninit limits to params","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091921.BD9D91333E@imap2.suse-dmz.suse.de/mbox/"},{"id":142303,"url":"https://patchwork.plctlab.org/api/1.2/patches/142303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091936.A39601333E@imap2.suse-dmz.suse.de/","msgid":"<20230920091936.A39601333E@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-09-20T09:19:36","name":"[2/2] tree-optimization/111489 - raise --param uninit-max-chain-len to 8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920091936.A39601333E@imap2.suse-dmz.suse.de/mbox/"},{"id":142311,"url":"https://patchwork.plctlab.org/api/1.2/patches/142311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920095748.84817-1-iain@sandoe.co.uk/","msgid":"<20230920095748.84817-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-09-20T09:57:48","name":"[pushed] Darwin: Move checking of the '\''shared'\'' driver spec.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920095748.84817-1-iain@sandoe.co.uk/mbox/"},{"id":142320,"url":"https://patchwork.plctlab.org/api/1.2/patches/142320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920100848.3241806-1-juzhe.zhong@rivai.ai/","msgid":"<20230920100848.3241806-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T10:08:48","name":"[Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920100848.3241806-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142360,"url":"https://patchwork.plctlab.org/api/1.2/patches/142360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b72396e437cb57d23c49260845743c03e6117bcd.1695207771.git.julian@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T11:13:59","name":"[1/3,og13] OpenMP: Call cuMemcpy2D/cuMemcpy3D for nvptx for omp_target_memcpy_rect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b72396e437cb57d23c49260845743c03e6117bcd.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142359,"url":"https://patchwork.plctlab.org/api/1.2/patches/142359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com/","msgid":"<33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:14:00","name":"[2/3,og13] OpenMP, NVPTX: memcpy[23]D bias correction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33eb021ad9d9e2957814cbddfa213f4e529ce097.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142361,"url":"https://patchwork.plctlab.org/api/1.2/patches/142361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com/","msgid":"<56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:14:01","name":"[3/3,og13] OpenMP: Support accelerated 2D/3D memory copies for AMD GCN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56a30c3c201c87bc8e59bac048afc9c911be32b0.1695207771.git.julian@codesourcery.com/mbox/"},{"id":142369,"url":"https://patchwork.plctlab.org/api/1.2/patches/142369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920114405.134100-1-julian@codesourcery.com/","msgid":"<20230920114405.134100-1-julian@codesourcery.com>","list_archive_url":null,"date":"2023-09-20T11:44:04","name":"OpenMP: Support accelerated 2D/3D memory copies for AMD GCN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920114405.134100-1-julian@codesourcery.com/mbox/"},{"id":142370,"url":"https://patchwork.plctlab.org/api/1.2/patches/142370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920115043.3434942-1-siddhesh@gotplt.org/","msgid":"<20230920115043.3434942-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-09-20T11:50:43","name":"Add a GCC Security policy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920115043.3434942-1-siddhesh@gotplt.org/mbox/"},{"id":142375,"url":"https://patchwork.plctlab.org/api/1.2/patches/142375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-1-arthur.cohen@embecosm.com/","msgid":"<20230920120311.14892-1-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-20T11:59:51","name":"[1/3] librust: Add libproc_macro and build system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-1-arthur.cohen@embecosm.com/mbox/"},{"id":142376,"url":"https://patchwork.plctlab.org/api/1.2/patches/142376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-3-arthur.cohen@embecosm.com/","msgid":"<20230920120311.14892-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-20T11:59:53","name":"[2/3] build: Add libgrust as compilation modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920120311.14892-3-arthur.cohen@embecosm.com/mbox/"},{"id":142391,"url":"https://patchwork.plctlab.org/api/1.2/patches/142391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920123934.167085-1-juzhe.zhong@rivai.ai/","msgid":"<20230920123934.167085-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T12:39:34","name":"[Committed] RISC-V: Support VLS floating-point extend/truncate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920123934.167085-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142401,"url":"https://patchwork.plctlab.org/api/1.2/patches/142401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130904.2329151-1-lehua.ding@rivai.ai/","msgid":"<20230920130904.2329151-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T13:09:04","name":"[1/2] match.pd: Support combine cond_len_op + vec_cond similar to cond_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130904.2329151-1-lehua.ding@rivai.ai/mbox/"},{"id":142402,"url":"https://patchwork.plctlab.org/api/1.2/patches/142402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130928.2479134-1-lehua.ding@rivai.ai/","msgid":"<20230920130928.2479134-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-20T13:09:28","name":"[2/2] RISC-V: Add assert of the number of vmerge in autovec cond testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920130928.2479134-1-lehua.ding@rivai.ai/mbox/"},{"id":142416,"url":"https://patchwork.plctlab.org/api/1.2/patches/142416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A64BB093DE2368050A9583F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T13:50:12","name":"AArch64: Fix strict-align cpymem/setmem [PR103100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982A64BB093DE2368050A9583F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142418,"url":"https://patchwork.plctlab.org/api/1.2/patches/142418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com/","msgid":"<0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com>","list_archive_url":null,"date":"2023-09-20T13:51:02","name":"ifcvt/vect: Emit COND_ADD for conditional scalar reduction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0193b63e-98dc-42bc-cd33-485361ea50bf@gmail.com/mbox/"},{"id":142430,"url":"https://patchwork.plctlab.org/api/1.2/patches/142430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920143747.1479843-1-ppalka@redhat.com/","msgid":"<20230920143747.1479843-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-20T14:37:46","name":"c++: missing SFINAE in grok_array_decl [PR111493]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920143747.1479843-1-ppalka@redhat.com/mbox/"},{"id":142476,"url":"https://patchwork.plctlab.org/api/1.2/patches/142476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920145849.1118927-1-juzhe.zhong@rivai.ai/","msgid":"<20230920145849.1118927-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-20T14:58:49","name":"[Committed,V4] internal-fn: Support undefined rtx for uninitialized SSA_NAME[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920145849.1118927-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142483,"url":"https://patchwork.plctlab.org/api/1.2/patches/142483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920151234.1015328-1-aldyh@redhat.com/","msgid":"<20230920151234.1015328-1-aldyh@redhat.com>","list_archive_url":null,"date":"2023-09-20T15:12:21","name":"[frange] Remove special casing from unordered operators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920151234.1015328-1-aldyh@redhat.com/mbox/"},{"id":142500,"url":"https://patchwork.plctlab.org/api/1.2/patches/142500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89820CEB177EEA9CA6597E2C83F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T16:07:53","name":"[v2] AArch64: Fix memmove operand corruption [PR111121]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89820CEB177EEA9CA6597E2C83F9A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142528,"url":"https://patchwork.plctlab.org/api/1.2/patches/142528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920170601.472906-1-patrick@rivosinc.com/","msgid":"<20230920170601.472906-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-20T17:06:01","name":"RISC-V: Remove math.h import to resolve missing stubs failures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920170601.472906-1-patrick@rivosinc.com/mbox/"},{"id":142530,"url":"https://patchwork.plctlab.org/api/1.2/patches/142530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920171026.1875871-1-ppalka@redhat.com/","msgid":"<20230920171026.1875871-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-09-20T17:10:26","name":"c++: constraint rewriting during ttp coercion [PR111485]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230920171026.1875871-1-ppalka@redhat.com/mbox/"},{"id":142567,"url":"https://patchwork.plctlab.org/api/1.2/patches/142567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8506f4a-8320-203e-6810-6fa3c77143b7@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-09-20T19:29:57","name":"[COMMITTED] Tweak ssa_cache::merge_range API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8506f4a-8320-203e-6810-6fa3c77143b7@redhat.com/mbox/"},{"id":142679,"url":"https://patchwork.plctlab.org/api/1.2/patches/142679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011137.9105-1-guojie@loongson.cn/","msgid":"<20230921011137.9105-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-21T01:11:37","name":"LoongArch: Optimizations of vector construction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011137.9105-1-guojie@loongson.cn/mbox/"},{"id":142680,"url":"https://patchwork.plctlab.org/api/1.2/patches/142680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011918.9384-1-guojie@loongson.cn/","msgid":"<20230921011918.9384-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-09-21T01:19:18","name":"LoongArch: Optimizations of vector construction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921011918.9384-1-guojie@loongson.cn/mbox/"},{"id":142694,"url":"https://patchwork.plctlab.org/api/1.2/patches/142694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921021746.3586923-1-juzhe.zhong@rivai.ai/","msgid":"<20230921021746.3586923-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T02:17:46","name":"[Committed] RISC-V: Support VLS INT <-> FP conversions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921021746.3586923-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142695,"url":"https://patchwork.plctlab.org/api/1.2/patches/142695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921023138.1789221-1-guojiufu@linux.ibm.com/","msgid":"<20230921023138.1789221-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-21T02:31:38","name":"check undefine_p for one more vr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921023138.1789221-1-guojiufu@linux.ibm.com/mbox/"},{"id":142697,"url":"https://patchwork.plctlab.org/api/1.2/patches/142697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921024313.1941378-1-apinski@marvell.com/","msgid":"<20230921024313.1941378-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-21T02:43:13","name":"MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921024313.1941378-1-apinski@marvell.com/mbox/"},{"id":142707,"url":"https://patchwork.plctlab.org/api/1.2/patches/142707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921031221.14656-1-xuli1@eswincomputing.com/","msgid":"<20230921031221.14656-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-21T03:12:21","name":"RISC-V: Optimized for strided load/store with stride == element width[PR111450]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921031221.14656-1-xuli1@eswincomputing.com/mbox/"},{"id":142714,"url":"https://patchwork.plctlab.org/api/1.2/patches/142714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921034443.3671012-1-lehua.ding@rivai.ai/","msgid":"<20230921034443.3671012-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T03:44:43","name":"RISC-V: Rename predicate vector_gs_scale_operand_16/32 to more generic names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921034443.3671012-1-lehua.ding@rivai.ai/mbox/"},{"id":142735,"url":"https://patchwork.plctlab.org/api/1.2/patches/142735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921053259.1382886-1-lehua.ding@rivai.ai/","msgid":"<20230921053259.1382886-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T05:32:59","name":"[V3] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921053259.1382886-1-lehua.ding@rivai.ai/mbox/"},{"id":142745,"url":"https://patchwork.plctlab.org/api/1.2/patches/142745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orled0dnm0.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-09-21T06:52:39","name":"[v2] Re: Introduce -finline-stringops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orled0dnm0.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":142747,"url":"https://patchwork.plctlab.org/api/1.2/patches/142747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921065433.3298121-1-juzhe.zhong@rivai.ai/","msgid":"<20230921065433.3298121-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T06:54:33","name":"RISC-V: Fix SUBREG move of VLS mode[PR111486]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921065433.3298121-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142750,"url":"https://patchwork.plctlab.org/api/1.2/patches/142750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921071118.3321383-1-lehua.ding@rivai.ai/","msgid":"<20230921071118.3321383-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T07:11:18","name":"RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921071118.3321383-1-lehua.ding@rivai.ai/mbox/"},{"id":142753,"url":"https://patchwork.plctlab.org/api/1.2/patches/142753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-2-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-2-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:56","name":"[01/18] Initial support for -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-2-lin1.hu@intel.com/mbox/"},{"id":142759,"url":"https://patchwork.plctlab.org/api/1.2/patches/142759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-4-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-4-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:58","name":"[03/18,2/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-4-lin1.hu@intel.com/mbox/"},{"id":142766,"url":"https://patchwork.plctlab.org/api/1.2/patches/142766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-5-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-5-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:19:59","name":"[04/18,3/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-5-lin1.hu@intel.com/mbox/"},{"id":142762,"url":"https://patchwork.plctlab.org/api/1.2/patches/142762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-6-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-6-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:00","name":"[05/18,4/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-6-lin1.hu@intel.com/mbox/"},{"id":142769,"url":"https://patchwork.plctlab.org/api/1.2/patches/142769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-7-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-7-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:01","name":"[06/18,5/5] Push evex512 target for 512 bit intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-7-lin1.hu@intel.com/mbox/"},{"id":142763,"url":"https://patchwork.plctlab.org/api/1.2/patches/142763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-8-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-8-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:02","name":"[07/18,1/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-8-lin1.hu@intel.com/mbox/"},{"id":142754,"url":"https://patchwork.plctlab.org/api/1.2/patches/142754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-9-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-9-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:03","name":"[08/18,2/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-9-lin1.hu@intel.com/mbox/"},{"id":142757,"url":"https://patchwork.plctlab.org/api/1.2/patches/142757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-10-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-10-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:04","name":"[09/18,3/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-10-lin1.hu@intel.com/mbox/"},{"id":142764,"url":"https://patchwork.plctlab.org/api/1.2/patches/142764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-11-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-11-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:05","name":"[10/18,4/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-11-lin1.hu@intel.com/mbox/"},{"id":142770,"url":"https://patchwork.plctlab.org/api/1.2/patches/142770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-12-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-12-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:06","name":"[11/18,5/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-12-lin1.hu@intel.com/mbox/"},{"id":142767,"url":"https://patchwork.plctlab.org/api/1.2/patches/142767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-13-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-13-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:07","name":"[12/18] Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-13-lin1.hu@intel.com/mbox/"},{"id":142768,"url":"https://patchwork.plctlab.org/api/1.2/patches/142768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-14-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-14-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:08","name":"[13/18] Support -mevex512 for AVX512F intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-14-lin1.hu@intel.com/mbox/"},{"id":142756,"url":"https://patchwork.plctlab.org/api/1.2/patches/142756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-15-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-15-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:09","name":"[14/18] Support -mevex512 for AVX512DQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-15-lin1.hu@intel.com/mbox/"},{"id":142765,"url":"https://patchwork.plctlab.org/api/1.2/patches/142765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-16-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-16-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:10","name":"[15/18] Support -mevex512 for AVX512BW intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-16-lin1.hu@intel.com/mbox/"},{"id":142755,"url":"https://patchwork.plctlab.org/api/1.2/patches/142755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-17-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-17-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:11","name":"[16/18] Support -mevex512 for AVX512{IFMA, VBMI, VNNI, BF16, VPOPCNTDQ, VBMI2, BITALG, VP2INTERSECT}, VAES, GFNI, VPCLMULQDQ intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-17-lin1.hu@intel.com/mbox/"},{"id":142760,"url":"https://patchwork.plctlab.org/api/1.2/patches/142760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-18-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-18-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:12","name":"[17/18] Support -mevex512 for AVX512FP16 intrins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-18-lin1.hu@intel.com/mbox/"},{"id":142758,"url":"https://patchwork.plctlab.org/api/1.2/patches/142758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-19-lin1.hu@intel.com/","msgid":"<20230921072013.2124750-19-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-09-21T07:20:13","name":"[18/18] Allow -mno-evex512 usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921072013.2124750-19-lin1.hu@intel.com/mbox/"},{"id":142772,"url":"https://patchwork.plctlab.org/api/1.2/patches/142772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921080931.1954219-1-apinski@marvell.com/","msgid":"<20230921080931.1954219-1-apinski@marvell.com>","list_archive_url":null,"date":"2023-09-21T08:09:31","name":"PHIOPT: Fix minmax_replacement for three way","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921080931.1954219-1-apinski@marvell.com/mbox/"},{"id":142774,"url":"https://patchwork.plctlab.org/api/1.2/patches/142774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921082017.1456735-1-juzhe.zhong@rivai.ai/","msgid":"<20230921082017.1456735-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T08:20:17","name":"RISC-V: Enable undefined support for RVV auto-vectorization[PR110751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921082017.1456735-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142777,"url":"https://patchwork.plctlab.org/api/1.2/patches/142777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921084600.40546-2-arthur.cohen@embecosm.com/","msgid":"<20230921084600.40546-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-21T08:44:30","name":"[3/3] build: Regenerate build files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921084600.40546-2-arthur.cohen@embecosm.com/mbox/"},{"id":142782,"url":"https://patchwork.plctlab.org/api/1.2/patches/142782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aaf9d765-ca62-487d-974a-9984d120235d@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T09:22:00","name":"[wwwdocs] OpenMP: gcc-14/changes.html and projects/gomp/ update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aaf9d765-ca62-487d-974a-9984d120235d@codesourcery.com/mbox/"},{"id":142784,"url":"https://patchwork.plctlab.org/api/1.2/patches/142784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921093415.128457-4-arthur.cohen@embecosm.com/","msgid":"<20230921093415.128457-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-09-21T09:32:49","name":"[3/3,v2] build: Regenerate build files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921093415.128457-4-arthur.cohen@embecosm.com/mbox/"},{"id":142785,"url":"https://patchwork.plctlab.org/api/1.2/patches/142785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921095027.143005-1-lehua.ding@rivai.ai/","msgid":"<20230921095027.143005-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-21T09:50:27","name":"[V2] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921095027.143005-1-lehua.ding@rivai.ai/mbox/"},{"id":142794,"url":"https://patchwork.plctlab.org/api/1.2/patches/142794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921103209.819164-1-pan2.li@intel.com/","msgid":"<20230921103209.819164-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-21T10:32:09","name":"[v2] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921103209.819164-1-pan2.li@intel.com/mbox/"},{"id":142798,"url":"https://patchwork.plctlab.org/api/1.2/patches/142798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921115410.1393445-1-juzhe.zhong@rivai.ai/","msgid":"<20230921115410.1393445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T11:54:10","name":"[Committed] RISC-V: Support VLS mult high","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921115410.1393445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142800,"url":"https://patchwork.plctlab.org/api/1.2/patches/142800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921123333.3451981-1-juzhe.zhong@rivai.ai/","msgid":"<20230921123333.3451981-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T12:33:33","name":"[Committed] RISC-V: Add more VLS unary tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921123333.3451981-1-juzhe.zhong@rivai.ai/mbox/"},{"id":142801,"url":"https://patchwork.plctlab.org/api/1.2/patches/142801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQxIGK4oIxNMun2i@Thaum.localdomain/","msgid":"","list_archive_url":null,"date":"2023-09-21T13:41:44","name":"[v3] c++: Catch indirect change of active union member in constexpr [PR101631]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZQxIGK4oIxNMun2i@Thaum.localdomain/mbox/"},{"id":142802,"url":"https://patchwork.plctlab.org/api/1.2/patches/142802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FFA5F943B02C53858EAD83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T14:24:44","name":"[v2] AArch64: Fix strict-align cpymem/setmem [PR103100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982FFA5F943B02C53858EAD83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142804,"url":"https://patchwork.plctlab.org/api/1.2/patches/142804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921151850.1697755-1-pan2.li@intel.com/","msgid":"<20230921151850.1697755-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-21T15:18:50","name":"[v3] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921151850.1697755-1-pan2.li@intel.com/mbox/"},{"id":142806,"url":"https://patchwork.plctlab.org/api/1.2/patches/142806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982074EA9925BC24E2DC43A83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-09-21T16:19:51","name":"AArch64: Add inline memmove expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB8982074EA9925BC24E2DC43A83F8A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":142971,"url":"https://patchwork.plctlab.org/api/1.2/patches/142971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921224722.3070110-1-juzhe.zhong@rivai.ai/","msgid":"<20230921224722.3070110-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-21T22:47:22","name":"[Committed] RISC-V: Add VLS integer ABS support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230921224722.3070110-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143023,"url":"https://patchwork.plctlab.org/api/1.2/patches/143023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922001238.97411-1-pan2.li@intel.com/","msgid":"<20230922001238.97411-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T00:12:38","name":"[v4] RISC-V: Support ceil and ceilf auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922001238.97411-1-pan2.li@intel.com/mbox/"},{"id":143055,"url":"https://patchwork.plctlab.org/api/1.2/patches/143055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922011251.335382-1-pan2.li@intel.com/","msgid":"<20230922011251.335382-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T01:12:51","name":"[v1] RISC-V: Leverage __builtin_xx instead of math.h for test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922011251.335382-1-pan2.li@intel.com/mbox/"},{"id":143069,"url":"https://patchwork.plctlab.org/api/1.2/patches/143069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922013309.21359-1-xuli1@eswincomputing.com/","msgid":"<20230922013309.21359-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-22T01:33:09","name":"RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922013309.21359-1-xuli1@eswincomputing.com/mbox/"},{"id":143105,"url":"https://patchwork.plctlab.org/api/1.2/patches/143105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922023743.332-1-xuli1@eswincomputing.com/","msgid":"<20230922023743.332-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-09-22T02:37:43","name":"[V2] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922023743.332-1-xuli1@eswincomputing.com/mbox/"},{"id":143123,"url":"https://patchwork.plctlab.org/api/1.2/patches/143123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030007.197448-1-lehua.ding@rivai.ai/","msgid":"<20230922030007.197448-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-22T03:00:07","name":"[COMMITTED] RISC-V: Split VLS avl_type from NONVLMAX avl_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030007.197448-1-lehua.ding@rivai.ai/mbox/"},{"id":143124,"url":"https://patchwork.plctlab.org/api/1.2/patches/143124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030026.197559-1-lehua.ding@rivai.ai/","msgid":"<20230922030026.197559-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-09-22T03:00:26","name":"[COMMITTED,V4] RISC-V: Support combine cond extend and reduce sum to widen reduce sum","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922030026.197559-1-lehua.ding@rivai.ai/mbox/"},{"id":143146,"url":"https://patchwork.plctlab.org/api/1.2/patches/143146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922033959.814278-1-pan2.li@intel.com/","msgid":"<20230922033959.814278-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T03:39:59","name":"[v1] RISC-V: Remove arch and abi option for run test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922033959.814278-1-pan2.li@intel.com/mbox/"},{"id":143149,"url":"https://patchwork.plctlab.org/api/1.2/patches/143149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922034644.843601-1-pan2.li@intel.com/","msgid":"<20230922034644.843601-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T03:46:44","name":"[v1] RISC-V: Rename the test macro for math autovec test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922034644.843601-1-pan2.li@intel.com/mbox/"},{"id":143206,"url":"https://patchwork.plctlab.org/api/1.2/patches/143206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922062306.1220795-1-pan2.li@intel.com/","msgid":"<20230922062306.1220795-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T06:23:06","name":"[v1] RISCV-V: Suport FP floor auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922062306.1220795-1-pan2.li@intel.com/mbox/"},{"id":143224,"url":"https://patchwork.plctlab.org/api/1.2/patches/143224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com/","msgid":"<47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-22T07:11:16","name":"[1/2] RISC-V: Define not broken prefetch builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/47f74393e89e5faefb19ba3f5ef5a0054e4fad71.1695366672.git.research_trasio@irq.a4lg.com/mbox/"},{"id":143225,"url":"https://patchwork.plctlab.org/api/1.2/patches/143225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com/","msgid":"<8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-09-22T07:11:17","name":"[2/2] RISC-V: Fix ICE by expansion and register coercion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8e1abc605be70b69b991b547234fc2412bb503e4.1695366672.git.research_trasio@irq.a4lg.com/mbox/"},{"id":143240,"url":"https://patchwork.plctlab.org/api/1.2/patches/143240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922075153.2220810-1-juzhe.zhong@rivai.ai/","msgid":"<20230922075153.2220810-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-22T07:51:53","name":"RISC-V: Add VLS conditional patterns support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922075153.2220810-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143247,"url":"https://patchwork.plctlab.org/api/1.2/patches/143247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-1-andrea.corallo@arm.com/","msgid":"<20230922080703.93612-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-09-22T08:07:01","name":"[1/3] recog: Improve parser for pattern new compact syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-1-andrea.corallo@arm.com/mbox/"},{"id":143246,"url":"https://patchwork.plctlab.org/api/1.2/patches/143246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-2-andrea.corallo@arm.com/","msgid":"<20230922080703.93612-2-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-09-22T08:07:02","name":"[2/3] recog: Support space in \"[ cons\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922080703.93612-2-andrea.corallo@arm.com/mbox/"},{"id":143259,"url":"https://patchwork.plctlab.org/api/1.2/patches/143259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922083057.980029-1-juzhe.zhong@rivai.ai/","msgid":"<20230922083057.980029-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-09-22T08:30:57","name":"[Committed] RISC-V: Remove @ of vec_duplicate pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922083057.980029-1-juzhe.zhong@rivai.ai/mbox/"},{"id":143281,"url":"https://patchwork.plctlab.org/api/1.2/patches/143281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922091158.1592808-1-pan2.li@intel.com/","msgid":"<20230922091158.1592808-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-09-22T09:11:58","name":"[v1] RISC-V: Move ceil test cases to unop folder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922091158.1592808-1-pan2.li@intel.com/mbox/"},{"id":143338,"url":"https://patchwork.plctlab.org/api/1.2/patches/143338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922102904.2270325-1-guojiufu@linux.ibm.com/","msgid":"<20230922102904.2270325-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-09-22T10:29:04","name":"light expander sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922102904.2270325-1-guojiufu@linux.ibm.com/mbox/"},{"id":143351,"url":"https://patchwork.plctlab.org/api/1.2/patches/143351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-2-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:19","name":"[01/13,APX,EGPR] middle-end: Add insn argument to base_reg_class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-2-hongyu.wang@intel.com/mbox/"},{"id":143347,"url":"https://patchwork.plctlab.org/api/1.2/patches/143347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-3-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:20","name":"[02/13,APX,EGPR] middle-end: Add index_reg_class with insn argument.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-3-hongyu.wang@intel.com/mbox/"},{"id":143350,"url":"https://patchwork.plctlab.org/api/1.2/patches/143350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-4-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:21","name":"[03/13,APX_EGPR] Initial support for APX_F","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-4-hongyu.wang@intel.com/mbox/"},{"id":143355,"url":"https://patchwork.plctlab.org/api/1.2/patches/143355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-5-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:22","name":"[04/13,APX,EGPR] Add 16 new integer general purpose registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-5-hongyu.wang@intel.com/mbox/"},{"id":143348,"url":"https://patchwork.plctlab.org/api/1.2/patches/143348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-6-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:23","name":"[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-6-hongyu.wang@intel.com/mbox/"},{"id":143356,"url":"https://patchwork.plctlab.org/api/1.2/patches/143356/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-7-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:24","name":"[06/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-7-hongyu.wang@intel.com/mbox/"},{"id":143349,"url":"https://patchwork.plctlab.org/api/1.2/patches/143349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-8-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:25","name":"[07/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-8-hongyu.wang@intel.com/mbox/"},{"id":143354,"url":"https://patchwork.plctlab.org/api/1.2/patches/143354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-12-hongyu.wang@intel.com/","msgid":"<20230922105631.2298849-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-09-22T10:56:29","name":"[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230922105631.2298849-12-hongyu.wang@intel.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-09/mbox/"},{"id":32,"url":"https://patchwork.plctlab.org/api/1.2/bundles/32/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-10/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-10","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":146975,"url":"https://patchwork.plctlab.org/api/1.2/patches/146975/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCr7wp7BF3ifNTRb4dD=ib_-n7Av_0SD0QG7NStL+7CjWA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-09-30T20:30:45","name":"RFA: RISC-V: Make riscv_vector::legitimize_move adjust SRC in the caller. (Was: Remove mem-to-mem VLS move pattern[PR111566])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCr7wp7BF3ifNTRb4dD=ib_-n7Av_0SD0QG7NStL+7CjWA@mail.gmail.com/mbox/"},{"id":146979,"url":"https://patchwork.plctlab.org/api/1.2/patches/146979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930204910.3544331-1-slyich@gmail.com/","msgid":"<20230930204910.3544331-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-09-30T20:49:10","name":"rtl: fix buidl failure on -fchecking=2 [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930204910.3544331-1-slyich@gmail.com/mbox/"},{"id":146981,"url":"https://patchwork.plctlab.org/api/1.2/patches/146981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930210254.3750973-1-slyich@gmail.com/","msgid":"<20230930210254.3750973-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-09-30T21:02:54","name":"[v2] rtl: fix build failure on -fchecking=2 [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930210254.3750973-1-slyich@gmail.com/mbox/"},{"id":147001,"url":"https://patchwork.plctlab.org/api/1.2/patches/147001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930230019.865326-1-patrick@rivosinc.com/","msgid":"<20230930230019.865326-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-09-30T23:00:19","name":"RISC-V: Use safe_grow_cleared for vector info [PR111469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20230930230019.865326-1-patrick@rivosinc.com/mbox/"},{"id":147002,"url":"https://patchwork.plctlab.org/api/1.2/patches/147002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da3d1e8c-3df2-2008-ad14-a3036b6f6665@rivosinc.com/","msgid":"","list_archive_url":null,"date":"2023-09-30T23:13:05","name":"[Committed] RISC-V: Use safe_grow_cleared for vector info [PR111469]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da3d1e8c-3df2-2008-ad14-a3036b6f6665@rivosinc.com/mbox/"},{"id":147076,"url":"https://patchwork.plctlab.org/api/1.2/patches/147076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001113827.54547-1-alx@kernel.org/","msgid":"<20231001113827.54547-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T11:38:28","name":"[v3] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001113827.54547-1-alx@kernel.org/mbox/"},{"id":147077,"url":"https://patchwork.plctlab.org/api/1.2/patches/147077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001114120.54695-1-alx@kernel.org/","msgid":"<20231001114120.54695-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T11:41:21","name":"[v4] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001114120.54695-1-alx@kernel.org/mbox/"},{"id":147131,"url":"https://patchwork.plctlab.org/api/1.2/patches/147131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001162400.68141-1-alx@kernel.org/","msgid":"<20231001162400.68141-1-alx@kernel.org>","list_archive_url":null,"date":"2023-10-01T16:24:00","name":"[v5] C, ObjC: Add -Wunterminated-string-initialization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001162400.68141-1-alx@kernel.org/mbox/"},{"id":147148,"url":"https://patchwork.plctlab.org/api/1.2/patches/147148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192742.145518-1-pinskia@gmail.com/","msgid":"<20231001192742.145518-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-01T19:27:43","name":"[COMMITTED/13] Fix PR 110386: backprop vs ABSU_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192742.145518-1-pinskia@gmail.com/mbox/"},{"id":147149,"url":"https://patchwork.plctlab.org/api/1.2/patches/147149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192943.3473530-1-slyich@gmail.com/","msgid":"<20231001192943.3473530-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-01T19:29:43","name":"[v2] ipa-utils: avoid uninitialized probabilities on ICF [PR111559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001192943.3473530-1-slyich@gmail.com/mbox/"},{"id":147152,"url":"https://patchwork.plctlab.org/api/1.2/patches/147152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-2-sandra@codesourcery.com/","msgid":"<20231001201021.785572-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:18","name":"[WIP,1/4] openacc: Rename OMP_CLAUSE_TILE to OMP_CLAUSE_OACC_TILE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-2-sandra@codesourcery.com/mbox/"},{"id":147153,"url":"https://patchwork.plctlab.org/api/1.2/patches/147153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-3-sandra@codesourcery.com/","msgid":"<20231001201021.785572-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:19","name":"[WIP,2/4] OpenMP: Language-independent parts of loop transform support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-3-sandra@codesourcery.com/mbox/"},{"id":147154,"url":"https://patchwork.plctlab.org/api/1.2/patches/147154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-4-sandra@codesourcery.com/","msgid":"<20231001201021.785572-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:20","name":"[WIP,3/4] OpenMP: Fortran front-end support for loop transforms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-4-sandra@codesourcery.com/mbox/"},{"id":147155,"url":"https://patchwork.plctlab.org/api/1.2/patches/147155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-5-sandra@codesourcery.com/","msgid":"<20231001201021.785572-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-01T20:10:21","name":"[WIP,4/4] OpenMP: C and C++ front-end support for loop transforms.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001201021.785572-5-sandra@codesourcery.com/mbox/"},{"id":147157,"url":"https://patchwork.plctlab.org/api/1.2/patches/147157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001202315.324838-1-pinskia@gmail.com/","msgid":"<20231001202315.324838-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-01T20:23:15","name":"[COMMITTED/13] Fix PR 111331: wrong code for `a > 28 ? MIN : 29`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231001202315.324838-1-pinskia@gmail.com/mbox/"},{"id":147165,"url":"https://patchwork.plctlab.org/api/1.2/patches/147165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqsxXsNQTsuEb5-TdeoqmK0njOOYBV-BN0-arSB2CRpZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-01T22:00:33","name":"Committed: Fix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqsxXsNQTsuEb5-TdeoqmK0njOOYBV-BN0-arSB2CRpZA@mail.gmail.com/mbox/"},{"id":147183,"url":"https://patchwork.plctlab.org/api/1.2/patches/147183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRonlN279jCTl5fZ@dj3ntoo/","msgid":"","list_archive_url":null,"date":"2023-10-02T02:14:44","name":"C/C++: add hints for strerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRonlN279jCTl5fZ@dj3ntoo/mbox/"},{"id":147186,"url":"https://patchwork.plctlab.org/api/1.2/patches/147186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpyPBkF-3hj2DiBLPm0TTP8R9RmyPqMEYjmk10MFp3qoQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T02:43:45","name":"[RISC-V] : Re: cpymem for RISCV with v extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCpyPBkF-3hj2DiBLPm0TTP8R9RmyPqMEYjmk10MFp3qoQ@mail.gmail.com/mbox/"},{"id":147193,"url":"https://patchwork.plctlab.org/api/1.2/patches/147193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkdhpmpn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T06:23:00","name":"[pushed] Fix profiledbootstrap poly_int fallout [PR111642]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkdhpmpn.fsf@arm.com/mbox/"},{"id":147197,"url":"https://patchwork.plctlab.org/api/1.2/patches/147197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002070154.71161-1-iain@sandoe.co.uk/","msgid":"<20231002070154.71161-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-02T07:01:54","name":"[pushed] testsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002070154.71161-1-iain@sandoe.co.uk/mbox/"},{"id":147202,"url":"https://patchwork.plctlab.org/api/1.2/patches/147202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17789-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:41:14","name":"[1/3] middle-end: Refactor vectorizer loop conditionals and separate out IV to new variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17789-tamar@arm.com/mbox/"},{"id":147204,"url":"https://patchwork.plctlab.org/api/1.2/patches/147204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0Q7ovA3FweWk4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:41:55","name":"[2/3] middle-end: updated niters analysis to handle multiple exits.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0Q7ovA3FweWk4@arm.com/mbox/"},{"id":147205,"url":"https://patchwork.plctlab.org/api/1.2/patches/147205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0VD9Z6w4st7GM@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T07:42:12","name":"[3/3] middle-end: maintain LCSSA throughout loop peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRp0VD9Z6w4st7GM@arm.com/mbox/"},{"id":147206,"url":"https://patchwork.plctlab.org/api/1.2/patches/147206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002080244.105205-1-kito.cheng@sifive.com/","msgid":"<20231002080244.105205-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-02T08:02:44","name":"options: Prevent multidimensional arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002080244.105205-1-kito.cheng@sifive.com/mbox/"},{"id":147256,"url":"https://patchwork.plctlab.org/api/1.2/patches/147256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002120545.1524306-1-slyich@gmail.com/","msgid":"<20231002120545.1524306-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-02T12:05:45","name":"Makefile.tpl: disable -Werror for feedback stage [PR111663]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002120545.1524306-1-slyich@gmail.com/mbox/"},{"id":147275,"url":"https://patchwork.plctlab.org/api/1.2/patches/147275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17792-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-02T12:38:53","name":"middle-end: Recursively check is_trivially_copyable_or_pair in vec.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17792-tamar@arm.com/mbox/"},{"id":147370,"url":"https://patchwork.plctlab.org/api/1.2/patches/147370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163308.4034749-1-dmalcolm@redhat.com/","msgid":"<20231002163308.4034749-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:08","name":"[pushed] diagnostics: fix missing init of set_locations_cb","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163308.4034749-1-dmalcolm@redhat.com/mbox/"},{"id":147372,"url":"https://patchwork.plctlab.org/api/1.2/patches/147372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163315.4034790-1-dmalcolm@redhat.com/","msgid":"<20231002163315.4034790-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:15","name":"[pushed] diagnostics: group together source printing fields of diagnostic_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163315.4034790-1-dmalcolm@redhat.com/mbox/"},{"id":147371,"url":"https://patchwork.plctlab.org/api/1.2/patches/147371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163319.4034817-1-dmalcolm@redhat.com/","msgid":"<20231002163319.4034817-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-02T16:33:19","name":"[pushed] diagnostics: add diagnostic_output_format class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002163319.4034817-1-dmalcolm@redhat.com/mbox/"},{"id":147420,"url":"https://patchwork.plctlab.org/api/1.2/patches/147420/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002182429.87779-1-iain@sandoe.co.uk/","msgid":"<20231002182429.87779-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-02T18:24:29","name":"[pushed] contrib: Update Darwin entries in config-list.mk","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002182429.87779-1-iain@sandoe.co.uk/mbox/"},{"id":147440,"url":"https://patchwork.plctlab.org/api/1.2/patches/147440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002193738.3900509-1-ppalka@redhat.com/","msgid":"<20231002193738.3900509-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-02T19:37:38","name":"c++: merge tsubst_copy into tsubst_copy_and_build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002193738.3900509-1-ppalka@redhat.com/mbox/"},{"id":147462,"url":"https://patchwork.plctlab.org/api/1.2/patches/147462/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsqv4QBkKMm-FN8@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:40:31","name":"[committed] Increase timeout factor for hppa*-*-* in gcc.dg/long_branch.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsqv4QBkKMm-FN8@mx3210.localdomain/mbox/"},{"id":147463,"url":"https://patchwork.plctlab.org/api/1.2/patches/147463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrTLV0PNuDW7Jl@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:42:52","name":"[committed] Require target lra in gcc.dg/pr108095.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrTLV0PNuDW7Jl@mx3210.localdomain/mbox/"},{"id":147465,"url":"https://patchwork.plctlab.org/api/1.2/patches/147465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrzoAdPY_HsVnj@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-02T20:45:02","name":"[committed] Add hppa*-*-* to dg-error targets at line 5 in gfortran.dg/pr95690.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRsrzoAdPY_HsVnj@mx3210.localdomain/mbox/"},{"id":147529,"url":"https://patchwork.plctlab.org/api/1.2/patches/147529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002222344.2714786-1-lhyatt@gmail.com/","msgid":"<20231002222344.2714786-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-10-02T22:23:44","name":"libcpp: testsuite: Add test for fixed _Pragma bug [PR82335]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231002222344.2714786-1-lhyatt@gmail.com/mbox/"},{"id":147596,"url":"https://patchwork.plctlab.org/api/1.2/patches/147596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003022724.2875-1-kito.cheng@sifive.com/","msgid":"<20231003022724.2875-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T02:27:24","name":"RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003022724.2875-1-kito.cheng@sifive.com/mbox/"},{"id":147601,"url":"https://patchwork.plctlab.org/api/1.2/patches/147601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003034619.15383-1-xry111@xry111.site/","msgid":"<20231003034619.15383-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-03T03:46:03","name":"LoongArch: Replace UNSPEC_FCOPYSIGN with copysign RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003034619.15383-1-xry111@xry111.site/mbox/"},{"id":147764,"url":"https://patchwork.plctlab.org/api/1.2/patches/147764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-2-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:31","name":"[v1,1/4] options: Define TARGET__P and TARGET__OPTS_P macro for Mask and InverseMask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-2-kito.cheng@sifive.com/mbox/"},{"id":147765,"url":"https://patchwork.plctlab.org/api/1.2/patches/147765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-3-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:32","name":"[v1,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-3-kito.cheng@sifive.com/mbox/"},{"id":147771,"url":"https://patchwork.plctlab.org/api/1.2/patches/147771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-4-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:33","name":"[v1,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-4-kito.cheng@sifive.com/mbox/"},{"id":147766,"url":"https://patchwork.plctlab.org/api/1.2/patches/147766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-5-kito.cheng@sifive.com/","msgid":"<20231003090934.12182-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-03T09:09:34","name":"[v1,4/4] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003090934.12182-5-kito.cheng@sifive.com/mbox/"},{"id":147796,"url":"https://patchwork.plctlab.org/api/1.2/patches/147796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a06f5460-e3fa-4788-9a9d-e41b7c711890@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-03T09:42:41","name":"[GCC] aarch64: Enable Cortex-X4 CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a06f5460-e3fa-4788-9a9d-e41b7c711890@arm.com/mbox/"},{"id":147847,"url":"https://patchwork.plctlab.org/api/1.2/patches/147847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003114532.2285429-1-manolis.tsamis@vrull.eu/","msgid":"<20231003114532.2285429-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-10-03T11:45:32","name":"[v6] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003114532.2285429-1-manolis.tsamis@vrull.eu/mbox/"},{"id":147849,"url":"https://patchwork.plctlab.org/api/1.2/patches/147849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edibkj6n.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-03T12:02:40","name":"contrib/mklog.py: Fix issues reported by flake8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edibkj6n.fsf@suse.cz/mbox/"},{"id":147896,"url":"https://patchwork.plctlab.org/api/1.2/patches/147896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003134455.4176066-1-dmalcolm@redhat.com/","msgid":"<20231003134455.4176066-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-03T13:44:54","name":"[pushed] diagnostics: add ctors to text_info; add m_ prefixes to fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003134455.4176066-1-dmalcolm@redhat.com/mbox/"},{"id":147902,"url":"https://patchwork.plctlab.org/api/1.2/patches/147902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com/","msgid":"<785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-10-03T14:07:25","name":"ira: Scale save/restore costs of callee save registers with block frequency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/785930be-87b2-4791-aa33-40940bdccf61@linux.vnet.ibm.com/mbox/"},{"id":147910,"url":"https://patchwork.plctlab.org/api/1.2/patches/147910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ff7d585-b793-a586-efe5-27874242742f@redhat.com/","msgid":"<6ff7d585-b793-a586-efe5-27874242742f@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:31:33","name":"[COMMITTED] Return TRUE only when a global value is updated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6ff7d585-b793-a586-efe5-27874242742f@redhat.com/mbox/"},{"id":147911,"url":"https://patchwork.plctlab.org/api/1.2/patches/147911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com/","msgid":"<248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:32:01","name":"[COMMITTED] Remove pass counting in VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/248800ec-0e0e-6cae-5aaa-a9c69cd5f46a@redhat.com/mbox/"},{"id":148303,"url":"https://patchwork.plctlab.org/api/1.2/patches/148303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004124718.3237337-1-jwakely@redhat.com/","msgid":"<20231004124718.3237337-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-03T14:45:57","name":"wwwdocs: Add ADL to C++ non-bugs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004124718.3237337-1-jwakely@redhat.com/mbox/"},{"id":147959,"url":"https://patchwork.plctlab.org/api/1.2/patches/147959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-2-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:32","name":"[1/6] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-2-victor.donascimento@arm.com/mbox/"},{"id":147957,"url":"https://patchwork.plctlab.org/api/1.2/patches/147957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-3-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:33","name":"[2/6] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-3-victor.donascimento@arm.com/mbox/"},{"id":147960,"url":"https://patchwork.plctlab.org/api/1.2/patches/147960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-4-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:34","name":"[3/6] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-4-victor.donascimento@arm.com/mbox/"},{"id":147956,"url":"https://patchwork.plctlab.org/api/1.2/patches/147956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-5-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:35","name":"[4/6] aarch64: Add basic target_print_operand support for CONST_STRING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-5-victor.donascimento@arm.com/mbox/"},{"id":147958,"url":"https://patchwork.plctlab.org/api/1.2/patches/147958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-6-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:36","name":"[5/6] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-6-victor.donascimento@arm.com/mbox/"},{"id":147955,"url":"https://patchwork.plctlab.org/api/1.2/patches/147955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-7-victor.donascimento@arm.com/","msgid":"<20231003151920.1853404-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-03T15:18:37","name":"[6/6] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003151920.1853404-7-victor.donascimento@arm.com/mbox/"},{"id":148006,"url":"https://patchwork.plctlab.org/api/1.2/patches/148006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003164812.13294-1-dmalcolm@redhat.com/","msgid":"<20231003164812.13294-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-03T16:48:12","name":"c++: print source code in print_instantiation_partial_context_line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003164812.13294-1-dmalcolm@redhat.com/mbox/"},{"id":148008,"url":"https://patchwork.plctlab.org/api/1.2/patches/148008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1gjiqgj.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:08:28","name":"[committed] ipa-modref: Fix dumping","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6y1gjiqgj.fsf@suse.cz/mbox/"},{"id":148022,"url":"https://patchwork.plctlab.org/api/1.2/patches/148022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-2-tromey@adacore.com/","msgid":"<20231003171851.1161340-2-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-03T17:18:50","name":"[1/2] libstdc++: Define _versioned_namespace in xmethods.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-2-tromey@adacore.com/mbox/"},{"id":148010,"url":"https://patchwork.plctlab.org/api/1.2/patches/148010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-3-tromey@adacore.com/","msgid":"<20231003171851.1161340-3-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-03T17:18:51","name":"[2/2] libstdc++: _versioned_namespace is always non-None","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003171851.1161340-3-tromey@adacore.com/mbox/"},{"id":148015,"url":"https://patchwork.plctlab.org/api/1.2/patches/148015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxRdeneRzguiH9R@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:37:57","name":"match.pd: Fix up a ? cst1 : cst2 regression on signed bool [PR111668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxRdeneRzguiH9R@tucnak/mbox/"},{"id":148016,"url":"https://patchwork.plctlab.org/api/1.2/patches/148016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxT3SAIdOD6/VGB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-03T17:48:13","name":"match.pd: Avoid other build_nonstandard_integer_type calls [PR111369]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZRxT3SAIdOD6/VGB@tucnak/mbox/"},{"id":148031,"url":"https://patchwork.plctlab.org/api/1.2/patches/148031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003190414.23822-1-bshanks@codeweavers.com/","msgid":"<20231003190414.23822-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-10-03T18:58:14","name":"[v2] libiberty: Use posix_spawn in pex-unix when available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003190414.23822-1-bshanks@codeweavers.com/mbox/"},{"id":148052,"url":"https://patchwork.plctlab.org/api/1.2/patches/148052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003201945.907116-1-patrick@rivosinc.com/","msgid":"<20231003201945.907116-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T20:19:45","name":"RISC-V: Unescape chars in pr111566.f90 test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003201945.907116-1-patrick@rivosinc.com/mbox/"},{"id":148059,"url":"https://patchwork.plctlab.org/api/1.2/patches/148059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003210916.1027930-1-jason@redhat.com/","msgid":"<20231003210916.1027930-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-03T21:09:16","name":"[v2,RFA] diagnostic: add permerror variants with opt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003210916.1027930-1-jason@redhat.com/mbox/"},{"id":148061,"url":"https://patchwork.plctlab.org/api/1.2/patches/148061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com/","msgid":"<0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com>","list_archive_url":null,"date":"2023-10-03T21:17:21","name":"[COMMITTED] Don'\''t use range_info_get_range for pointers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0fe4c141-dcf0-8383-6a11-e1ca33e23220@redhat.com/mbox/"},{"id":148075,"url":"https://patchwork.plctlab.org/api/1.2/patches/148075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-2-patrick@rivosinc.com/","msgid":"<20231003222700.909771-2-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:26:58","name":"[RFC,gcc13,backport,1/3] RISC-V: Add Ztso atomic mappings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-2-patrick@rivosinc.com/mbox/"},{"id":148074,"url":"https://patchwork.plctlab.org/api/1.2/patches/148074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-3-patrick@rivosinc.com/","msgid":"<20231003222700.909771-3-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:26:59","name":"[RFC,gcc13,backport,2/3] RISC-V: Specify -mabi for ztso testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-3-patrick@rivosinc.com/mbox/"},{"id":148073,"url":"https://patchwork.plctlab.org/api/1.2/patches/148073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-4-patrick@rivosinc.com/","msgid":"<20231003222700.909771-4-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-03T22:27:00","name":"[RFC,gcc13,backport,3/3,RISCV,committed] Remove spurious newline in ztso sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231003222700.909771-4-patrick@rivosinc.com/mbox/"},{"id":148147,"url":"https://patchwork.plctlab.org/api/1.2/patches/148147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004025538.489F220439@pchp3.se.axis.com/","msgid":"<20231004025538.489F220439@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T02:55:38","name":"[1/2] testsuite: Add dg-require-atomic-exchange non-atomic code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004025538.489F220439@pchp3.se.axis.com/mbox/"},{"id":148150,"url":"https://patchwork.plctlab.org/api/1.2/patches/148150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004031136.8B8BA2042A@pchp3.se.axis.com/","msgid":"<20231004031136.8B8BA2042A@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T03:11:36","name":"[2/2] testsuite: Replace many dg-require-thread-fence with dg-require-atomic-exchange","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004031136.8B8BA2042A@pchp3.se.axis.com/mbox/"},{"id":148167,"url":"https://patchwork.plctlab.org/api/1.2/patches/148167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004074906.15805-1-cooper.qu@linux.alibaba.com/","msgid":"<20231004074906.15805-1-cooper.qu@linux.alibaba.com>","list_archive_url":null,"date":"2023-10-04T07:49:06","name":"RISC-V: THead: Fix missing CFI directives for th.sdd in prologue.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004074906.15805-1-cooper.qu@linux.alibaba.com/mbox/"},{"id":148200,"url":"https://patchwork.plctlab.org/api/1.2/patches/148200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004092406.2F51A38618BF@sourceware.org/","msgid":"<20231004092406.2F51A38618BF@sourceware.org>","list_archive_url":null,"date":"2023-10-04T09:23:28","name":"ipa/111643 - clarify flatten attribute documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004092406.2F51A38618BF@sourceware.org/mbox/"},{"id":148218,"url":"https://patchwork.plctlab.org/api/1.2/patches/148218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMm2O=bSQBen=Mn7QdPKQEcJwRMs3MV8+wMuR7hvBr5n-w@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-04T10:16:14","name":"PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR folding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMm2O=bSQBen=Mn7QdPKQEcJwRMs3MV8+wMuR7hvBr5n-w@mail.gmail.com/mbox/"},{"id":148227,"url":"https://patchwork.plctlab.org/api/1.2/patches/148227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com/","msgid":"<1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com>","list_archive_url":null,"date":"2023-10-04T11:08:15","name":"libgomp.texi: Clarify that no other OpenMP context selectors are implemented","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1d94d208-6e24-4ab7-a204-a6a152abd496@codesourcery.com/mbox/"},{"id":148239,"url":"https://patchwork.plctlab.org/api/1.2/patches/148239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004112855.3297083-1-jwakely@redhat.com/","msgid":"<20231004112855.3297083-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-04T11:28:36","name":"[committed,gcc-11] libstdc++: Fix testsuite failures with -O0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004112855.3297083-1-jwakely@redhat.com/mbox/"},{"id":148286,"url":"https://patchwork.plctlab.org/api/1.2/patches/148286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-2-j@lambda.is/","msgid":"<20231004123921.634024-2-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:01","name":"[01/22] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-2-j@lambda.is/mbox/"},{"id":148279,"url":"https://patchwork.plctlab.org/api/1.2/patches/148279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-3-j@lambda.is/","msgid":"<20231004123921.634024-3-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:02","name":"[02/22] Add \"Condition coverage profiling\" term to --help","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-3-j@lambda.is/mbox/"},{"id":148280,"url":"https://patchwork.plctlab.org/api/1.2/patches/148280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-4-j@lambda.is/","msgid":"<20231004123921.634024-4-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:03","name":"[03/22] Mention relevant flags in condition coverage docs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-4-j@lambda.is/mbox/"},{"id":148282,"url":"https://patchwork.plctlab.org/api/1.2/patches/148282/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-5-j@lambda.is/","msgid":"<20231004123921.634024-5-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:04","name":"[04/22] Describe, remove ATTRIBUTE_UNUSED from tag_conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-5-j@lambda.is/mbox/"},{"id":148281,"url":"https://patchwork.plctlab.org/api/1.2/patches/148281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-6-j@lambda.is/","msgid":"<20231004123921.634024-6-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:05","name":"[05/22] Describe condition_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-6-j@lambda.is/mbox/"},{"id":148283,"url":"https://patchwork.plctlab.org/api/1.2/patches/148283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-7-j@lambda.is/","msgid":"<20231004123921.634024-7-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:06","name":"[06/22] Use popcount_hwi rather than builtin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-7-j@lambda.is/mbox/"},{"id":148288,"url":"https://patchwork.plctlab.org/api/1.2/patches/148288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-8-j@lambda.is/","msgid":"<20231004123921.634024-8-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:07","name":"[07/22] Describe add_condition_counts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-8-j@lambda.is/mbox/"},{"id":148293,"url":"https://patchwork.plctlab.org/api/1.2/patches/148293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-9-j@lambda.is/","msgid":"<20231004123921.634024-9-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:08","name":"[08/22] Describe output_conditions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-9-j@lambda.is/mbox/"},{"id":148297,"url":"https://patchwork.plctlab.org/api/1.2/patches/148297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-10-j@lambda.is/","msgid":"<20231004123921.634024-10-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:09","name":"[09/22] Find reachable conditions unbounded by dominators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-10-j@lambda.is/mbox/"},{"id":148284,"url":"https://patchwork.plctlab.org/api/1.2/patches/148284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-11-j@lambda.is/","msgid":"<20231004123921.634024-11-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:10","name":"[10/22] Prune search for boolean expr on goto, return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-11-j@lambda.is/mbox/"},{"id":148299,"url":"https://patchwork.plctlab.org/api/1.2/patches/148299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-12-j@lambda.is/","msgid":"<20231004123921.634024-12-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:11","name":"[11/22] Add test case showing cross-decision fusing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-12-j@lambda.is/mbox/"},{"id":148289,"url":"https://patchwork.plctlab.org/api/1.2/patches/148289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-13-j@lambda.is/","msgid":"<20231004123921.634024-13-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:12","name":"[12/22] Do two-phase filtering in expr isolation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-13-j@lambda.is/mbox/"},{"id":148295,"url":"https://patchwork.plctlab.org/api/1.2/patches/148295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-14-j@lambda.is/","msgid":"<20231004123921.634024-14-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:13","name":"[13/22] Handle split-outcome with intrusive flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-14-j@lambda.is/mbox/"},{"id":148298,"url":"https://patchwork.plctlab.org/api/1.2/patches/148298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-15-j@lambda.is/","msgid":"<20231004123921.634024-15-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:14","name":"[14/22] Unify expression candidate set refinement logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-15-j@lambda.is/mbox/"},{"id":148287,"url":"https://patchwork.plctlab.org/api/1.2/patches/148287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-16-j@lambda.is/","msgid":"<20231004123921.634024-16-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:15","name":"[15/22] Fix candidate, neighborhood set reduction phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-16-j@lambda.is/mbox/"},{"id":148285,"url":"https://patchwork.plctlab.org/api/1.2/patches/148285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-17-j@lambda.is/","msgid":"<20231004123921.634024-17-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:16","name":"[16/22] Rename pathological -> setjmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-17-j@lambda.is/mbox/"},{"id":148301,"url":"https://patchwork.plctlab.org/api/1.2/patches/148301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-18-j@lambda.is/","msgid":"<20231004123921.634024-18-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:17","name":"[17/22] Mark contracted-past nodes in reachable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-18-j@lambda.is/mbox/"},{"id":148290,"url":"https://patchwork.plctlab.org/api/1.2/patches/148290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-19-j@lambda.is/","msgid":"<20231004123921.634024-19-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:18","name":"[18/22] Don'\''t contract into random edge in multi-succ node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-19-j@lambda.is/mbox/"},{"id":148294,"url":"https://patchwork.plctlab.org/api/1.2/patches/148294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-20-j@lambda.is/","msgid":"<20231004123921.634024-20-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:19","name":"[19/22] Beautify assert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-20-j@lambda.is/mbox/"},{"id":148296,"url":"https://patchwork.plctlab.org/api/1.2/patches/148296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-21-j@lambda.is/","msgid":"<20231004123921.634024-21-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:20","name":"[20/22] Don'\''t try to reduce NG from dominators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-21-j@lambda.is/mbox/"},{"id":148302,"url":"https://patchwork.plctlab.org/api/1.2/patches/148302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-22-j@lambda.is/","msgid":"<20231004123921.634024-22-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:21","name":"[21/22] Walk the cfg in topological order, not depth-first","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-22-j@lambda.is/mbox/"},{"id":148300,"url":"https://patchwork.plctlab.org/api/1.2/patches/148300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-23-j@lambda.is/","msgid":"<20231004123921.634024-23-j@lambda.is>","list_archive_url":null,"date":"2023-10-04T12:39:22","name":"[22/22] Return value on separate line","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004123921.634024-23-j@lambda.is/mbox/"},{"id":148355,"url":"https://patchwork.plctlab.org/api/1.2/patches/148355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004150115.221636-1-juzhe.zhong@rivai.ai/","msgid":"<20231004150115.221636-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-04T15:01:15","name":"RISC-V: Remove @ of vec_series","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004150115.221636-1-juzhe.zhong@rivai.ai/mbox/"},{"id":148404,"url":"https://patchwork.plctlab.org/api/1.2/patches/148404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004151005.1676194-1-tromey@adacore.com/","msgid":"<20231004151005.1676194-1-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T15:10:05","name":"libstdc++: Correctly call _string_types function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004151005.1676194-1-tromey@adacore.com/mbox/"},{"id":148428,"url":"https://patchwork.plctlab.org/api/1.2/patches/148428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-2-tromey@adacore.com/","msgid":"<20231004165832.1750191-2-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T16:58:31","name":"[RFC,1/2] libstdc++: Use '\''black'\'' and '\''isort'\'' in pretty printers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-2-tromey@adacore.com/mbox/"},{"id":148424,"url":"https://patchwork.plctlab.org/api/1.2/patches/148424/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-3-tromey@adacore.com/","msgid":"<20231004165832.1750191-3-tromey@adacore.com>","list_archive_url":null,"date":"2023-10-04T16:58:32","name":"[RFC,2/2] libstdc++: Add flake8 configuration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004165832.1750191-3-tromey@adacore.com/mbox/"},{"id":148526,"url":"https://patchwork.plctlab.org/api/1.2/patches/148526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170455.76C1A2043D@pchp3.se.axis.com/","msgid":"<20231004170455.76C1A2043D@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T17:04:55","name":"[v2,1/2] testsuite: Add dg-require-atomic-cmpxchg-word","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170455.76C1A2043D@pchp3.se.axis.com/mbox/"},{"id":148465,"url":"https://patchwork.plctlab.org/api/1.2/patches/148465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170816.CAD8D20424@pchp3.se.axis.com/","msgid":"<20231004170816.CAD8D20424@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-10-04T17:08:16","name":"[v2,2/2] testsuite: Replace many dg-require-thread-fence with dg-require-atomic-cmpxchg-word","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004170816.CAD8D20424@pchp3.se.axis.com/mbox/"},{"id":148448,"url":"https://patchwork.plctlab.org/api/1.2/patches/148448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004183004.29161-1-bshanks@codeweavers.com/","msgid":"<20231004183004.29161-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-10-04T18:28:28","name":"[v3] libiberty: Use posix_spawn in pex-unix when available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004183004.29161-1-bshanks@codeweavers.com/mbox/"},{"id":148568,"url":"https://patchwork.plctlab.org/api/1.2/patches/148568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004192318.769779-1-ppalka@redhat.com/","msgid":"<20231004192318.769779-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-04T19:23:18","name":"[2/1] c++: rename tsubst_copy_and_build and tsubst_expr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004192318.769779-1-ppalka@redhat.com/mbox/"},{"id":148585,"url":"https://patchwork.plctlab.org/api/1.2/patches/148585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004215742.929536-1-patrick@rivosinc.com/","msgid":"<20231004215742.929536-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-04T21:57:42","name":"RISC-V: xfail gcc.dg/pr90263.c for riscv_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004215742.929536-1-patrick@rivosinc.com/mbox/"},{"id":148605,"url":"https://patchwork.plctlab.org/api/1.2/patches/148605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com/","msgid":"<012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-04T22:19:33","name":"Support g++ 4.8 as a host compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/012a01d9f710$db84ef40$928ecdc0$@nextmovesoftware.com/mbox/"},{"id":148641,"url":"https://patchwork.plctlab.org/api/1.2/patches/148641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004225527.930610-1-patrick@rivosinc.com/","msgid":"<20231004225527.930610-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-04T22:55:27","name":"[v2] RISC-V: Test memcpy inlined on riscv_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231004225527.930610-1-patrick@rivosinc.com/mbox/"},{"id":148672,"url":"https://patchwork.plctlab.org/api/1.2/patches/148672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-1-guojiufu@linux.ibm.com/","msgid":"<20231005041346.3625108-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T04:13:45","name":"[V5,1/2] rs6000: optimize moving to sf from highpart di","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-1-guojiufu@linux.ibm.com/mbox/"},{"id":148671,"url":"https://patchwork.plctlab.org/api/1.2/patches/148671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-2-guojiufu@linux.ibm.com/","msgid":"<20231005041346.3625108-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T04:13:46","name":"[V5,2/2] rs6000: use mtvsrws to move sf from si p9","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005041346.3625108-2-guojiufu@linux.ibm.com/mbox/"},{"id":148673,"url":"https://patchwork.plctlab.org/api/1.2/patches/148673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005064628.458478-1-stefansf@linux.ibm.com/","msgid":"<20231005064628.458478-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-05T06:46:28","name":"s390: Make use of new copysign RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005064628.458478-1-stefansf@linux.ibm.com/mbox/"},{"id":148674,"url":"https://patchwork.plctlab.org/api/1.2/patches/148674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005082559.8C3A83857C66@sourceware.org/","msgid":"<20231005082559.8C3A83857C66@sourceware.org>","list_archive_url":null,"date":"2023-10-05T08:25:06","name":"Avoid left around copies when value-numbering BBs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005082559.8C3A83857C66@sourceware.org/mbox/"},{"id":148676,"url":"https://patchwork.plctlab.org/api/1.2/patches/148676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com/","msgid":"<00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-05T09:06:33","name":"[X86] Split lea into shorter left shift by 2 or 3 bits with -Oz.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00cd01d9f76b$3db62990$b9227cb0$@nextmovesoftware.com/mbox/"},{"id":148677,"url":"https://patchwork.plctlab.org/api/1.2/patches/148677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005113731.454013856DD0@sourceware.org/","msgid":"<20231005113731.454013856DD0@sourceware.org>","list_archive_url":null,"date":"2023-10-05T11:37:06","name":"Fix SIMD call SLP discovery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005113731.454013856DD0@sourceware.org/mbox/"},{"id":148678,"url":"https://patchwork.plctlab.org/api/1.2/patches/148678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-1-claziss@gmail.com/","msgid":"<20231005114345.1707504-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:41","name":"[committed,1/5] arc: Remove unused/incomplete alignment assembly annotation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-1-claziss@gmail.com/mbox/"},{"id":148679,"url":"https://patchwork.plctlab.org/api/1.2/patches/148679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-2-claziss@gmail.com/","msgid":"<20231005114345.1707504-2-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:42","name":"[committed,2/5] arc: Update/remove ARC specific tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-2-claziss@gmail.com/mbox/"},{"id":148680,"url":"https://patchwork.plctlab.org/api/1.2/patches/148680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-3-claziss@gmail.com/","msgid":"<20231005114345.1707504-3-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:43","name":"[committed,3/5] arc: Remove '\''^'\'' print punct character","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-3-claziss@gmail.com/mbox/"},{"id":148682,"url":"https://patchwork.plctlab.org/api/1.2/patches/148682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-4-claziss@gmail.com/","msgid":"<20231005114345.1707504-4-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:44","name":"[committed,4/5] arc: Remove obsolete ccfsm instruction predication mechanism","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-4-claziss@gmail.com/mbox/"},{"id":148681,"url":"https://patchwork.plctlab.org/api/1.2/patches/148681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-5-claziss@gmail.com/","msgid":"<20231005114345.1707504-5-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-05T11:43:45","name":"[committed,5/5] arc: Update tests predicates when using linux toolchain.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005114345.1707504-5-claziss@gmail.com/mbox/"},{"id":148683,"url":"https://patchwork.plctlab.org/api/1.2/patches/148683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005115500.9B1F333EA4@hamza.pair.com/","msgid":"<20231005115500.9B1F333EA4@hamza.pair.com>","list_archive_url":null,"date":"2023-10-05T11:54:58","name":"[pushed] wwwdocs: conduct: Use
instead of
","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005115500.9B1F333EA4@hamza.pair.com/mbox/"},{"id":148684,"url":"https://patchwork.plctlab.org/api/1.2/patches/148684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edi9i8jw.fsf@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T11:59:47","name":"Revert \"ipa: Self-DCE of uses of removed call LHSs (PR 108007)\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ri6edi9i8jw.fsf@suse.cz/mbox/"},{"id":148685,"url":"https://patchwork.plctlab.org/api/1.2/patches/148685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f78f2739548afede5888c2b9f91b82eb2f151e93.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[1/3] ipa-cp: Templatize filtering of m_agg_values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f78f2739548afede5888c2b9f91b82eb2f151e93.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148687,"url":"https://patchwork.plctlab.org/api/1.2/patches/148687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5e5ac1cac6611bdf4873011582c63347ee62fe1.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[2/3] ipa: Prune any IPA-CP aggregate constants known by modref to be killed (111157)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5e5ac1cac6611bdf4873011582c63347ee62fe1.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148686,"url":"https://patchwork.plctlab.org/api/1.2/patches/148686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dce484200c834821ecf57f8fe1b4610e8e64b841.1696508299.git.mjambor@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:06:47","name":"[3/3] ipa: Limit pruning of IPA-CP aggregate constants if there are loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dce484200c834821ecf57f8fe1b4610e8e64b841.1696508299.git.mjambor@suse.cz/mbox/"},{"id":148688,"url":"https://patchwork.plctlab.org/api/1.2/patches/148688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6rbAKYvtP+kIzu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:26:20","name":"ipa: Remove ipa_bits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6rbAKYvtP+kIzu@tucnak/mbox/"},{"id":148689,"url":"https://patchwork.plctlab.org/api/1.2/patches/148689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6sokqvC68SZNrT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T12:31:30","name":"[committed] sreal: Fix typo in function name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR6sokqvC68SZNrT@tucnak/mbox/"},{"id":148691,"url":"https://patchwork.plctlab.org/api/1.2/patches/148691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de/","msgid":"<8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de>","list_archive_url":null,"date":"2023-10-05T13:05:49","name":"[avr,committed] Use monic denominator polynomials to save a multiplication.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bf79b39-f852-747b-7a35-60a74e15b4e8@gjlay.de/mbox/"},{"id":148692,"url":"https://patchwork.plctlab.org/api/1.2/patches/148692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR62FFoMl3B8i88F@nz/","msgid":"","list_archive_url":null,"date":"2023-10-05T13:11:48","name":"[v4] ipa-utils: avoid uninitialized probabilities on ICF [PR111559]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR62FFoMl3B8i88F@nz/mbox/"},{"id":148693,"url":"https://patchwork.plctlab.org/api/1.2/patches/148693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de/","msgid":"<8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de>","list_archive_url":null,"date":"2023-10-05T13:29:48","name":"[avr,committed] Remove all uses of attribute pure from LibF7.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cf641ba-1d7d-7daa-3da2-4a9bf5b8a909@gjlay.de/mbox/"},{"id":148716,"url":"https://patchwork.plctlab.org/api/1.2/patches/148716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005141023.1835802-1-j@lambda.is/","msgid":"<20231005141023.1835802-1-j@lambda.is>","list_archive_url":null,"date":"2023-10-05T14:10:23","name":"[v5] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005141023.1835802-1-j@lambda.is/mbox/"},{"id":148799,"url":"https://patchwork.plctlab.org/api/1.2/patches/148799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR7SBqJieJmTt5PG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-05T15:11:02","name":"[RFC] > WIDE_INT_MAX_PREC support in wide_int and widest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR7SBqJieJmTt5PG@tucnak/mbox/"},{"id":148813,"url":"https://patchwork.plctlab.org/api/1.2/patches/148813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bZgF-8HFxiU18ouCv7SCgSkks2XP2xnwiz=h+WB8AmvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T15:45:34","name":"[COMMITTED] i386: Improve memory copy from named address space [PR111657]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bZgF-8HFxiU18ouCv7SCgSkks2XP2xnwiz=h+WB8AmvQ@mail.gmail.com/mbox/"},{"id":148815,"url":"https://patchwork.plctlab.org/api/1.2/patches/148815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005154745.2663497-1-andrea.corallo@arm.com/","msgid":"<20231005154745.2663497-1-andrea.corallo@arm.com>","list_archive_url":null,"date":"2023-10-05T15:47:45","name":"[committed] contrib: add mdcompact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005154745.2663497-1-andrea.corallo@arm.com/mbox/"},{"id":148852,"url":"https://patchwork.plctlab.org/api/1.2/patches/148852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-2-siddhesh@gotplt.org/","msgid":"<20231005160516.13565-2-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-10-05T16:05:15","name":"[committed,1/2] secpol: add grammatically missing commas / remove one excess instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-2-siddhesh@gotplt.org/mbox/"},{"id":148854,"url":"https://patchwork.plctlab.org/api/1.2/patches/148854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-3-siddhesh@gotplt.org/","msgid":"<20231005160516.13565-3-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-10-05T16:05:16","name":"[committed,2/2] secpol: consistent indentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005160516.13565-3-siddhesh@gotplt.org/mbox/"},{"id":148976,"url":"https://patchwork.plctlab.org/api/1.2/patches/148976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com/","msgid":"<1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com>","list_archive_url":null,"date":"2023-10-05T17:03:36","name":"[_GLIBCXX_INLINE_VERSION] Add missing symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1bf2bf67-de92-0031-bd51-a3443b20cee7@gmail.com/mbox/"},{"id":148958,"url":"https://patchwork.plctlab.org/api/1.2/patches/148958/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com/","msgid":"<024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com>","list_archive_url":null,"date":"2023-10-05T17:34:03","name":"libgomp.texi: Document some of the device-memory routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/024726cc-ab05-4d3b-941f-1312d2d566d3@codesourcery.com/mbox/"},{"id":148973,"url":"https://patchwork.plctlab.org/api/1.2/patches/148973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17810-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:20:03","name":"middle-end ifcvt: Allow any const IFN in conditional blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17810-tamar@arm.com/mbox/"},{"id":148974,"url":"https://patchwork.plctlab.org/api/1.2/patches/148974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17811-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:20:43","name":"AArch64 Handle copysign (x, -1) expansion efficiently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17811-tamar@arm.com/mbox/"},{"id":148977,"url":"https://patchwork.plctlab.org/api/1.2/patches/148977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17809-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:21:21","name":"middle-end ifcvt: Add support for conditional copysign","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17809-tamar@arm.com/mbox/"},{"id":148978,"url":"https://patchwork.plctlab.org/api/1.2/patches/148978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17812-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T18:21:55","name":"AArch64 Add SVE implementation for cond_copysign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17812-tamar@arm.com/mbox/"},{"id":148991,"url":"https://patchwork.plctlab.org/api/1.2/patches/148991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com/","msgid":"<490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com>","list_archive_url":null,"date":"2023-10-05T19:04:37","name":"[COMMITTED,1/3] Add outgoing range vector calculation API.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/490a1ac3-8263-1a11-324c-46f4e92ca970@redhat.com/mbox/"},{"id":148990,"url":"https://patchwork.plctlab.org/api/1.2/patches/148990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffda943e-6747-240c-8e45-ccbf24bf0783@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T19:04:45","name":"[COMMITTED,2/3] Add a dom based ranger for fast VRP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ffda943e-6747-240c-8e45-ccbf24bf0783@redhat.com/mbox/"},{"id":148992,"url":"https://patchwork.plctlab.org/api/1.2/patches/148992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef20c273-c1a9-f145-6097-305d72bac940@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-05T19:04:58","name":"[COMMITTED,3/3] Create a fast VRP pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef20c273-c1a9-f145-6097-305d72bac940@redhat.com/mbox/"},{"id":149022,"url":"https://patchwork.plctlab.org/api/1.2/patches/149022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR8ZiMdxwDS6cRJ0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-10-05T20:16:08","name":"[committed] hppa: Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZR8ZiMdxwDS6cRJ0@mx3210.localdomain/mbox/"},{"id":149057,"url":"https://patchwork.plctlab.org/api/1.2/patches/149057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005231446.400239-1-pinskia@gmail.com/","msgid":"<20231005231446.400239-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-05T23:14:46","name":"MATCH: Fix infinite loop between `vec_cond(vec_cond(a, b, 0), c, d)` and `a & b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005231446.400239-1-pinskia@gmail.com/mbox/"},{"id":149063,"url":"https://patchwork.plctlab.org/api/1.2/patches/149063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005234552.954487-1-patrick@rivosinc.com/","msgid":"<20231005234552.954487-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-05T23:45:52","name":"[v2] RISC-V: Use stdint-gcc.h in rvv testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231005234552.954487-1-patrick@rivosinc.com/mbox/"},{"id":149087,"url":"https://patchwork.plctlab.org/api/1.2/patches/149087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006023847.428045-1-pan2.li@intel.com/","msgid":"<20231006023847.428045-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-06T02:38:47","name":"[v1] RISC-V: Update comments for FP rounding related autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006023847.428045-1-pan2.li@intel.com/mbox/"},{"id":149145,"url":"https://patchwork.plctlab.org/api/1.2/patches/149145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006074530.465276-2-stefansf@linux.ibm.com/","msgid":"<20231006074530.465276-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-06T07:45:31","name":"combine: Fix handling of unsigned constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006074530.465276-2-stefansf@linux.ibm.com/mbox/"},{"id":149165,"url":"https://patchwork.plctlab.org/api/1.2/patches/149165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-2-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:44","name":"[1/3,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-2-Ezra.Sitorus@arm.com/mbox/"},{"id":149166,"url":"https://patchwork.plctlab.org/api/1.2/patches/149166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-3-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:45","name":"[2/3,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-3-Ezra.Sitorus@arm.com/mbox/"},{"id":149167,"url":"https://patchwork.plctlab.org/api/1.2/patches/149167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-4-Ezra.Sitorus@arm.com/","msgid":"<20231006094946.21978-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T09:49:46","name":"[3/3,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006094946.21978-4-Ezra.Sitorus@arm.com/mbox/"},{"id":149208,"url":"https://patchwork.plctlab.org/api/1.2/patches/149208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-2-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:55:58","name":"[1/3,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-2-Ezra.Sitorus@arm.com/mbox/"},{"id":149209,"url":"https://patchwork.plctlab.org/api/1.2/patches/149209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-3-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:55:59","name":"[2/3,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-3-Ezra.Sitorus@arm.com/mbox/"},{"id":149210,"url":"https://patchwork.plctlab.org/api/1.2/patches/149210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-4-Ezra.Sitorus@arm.com/","msgid":"<20231006115600.20630-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-06T11:56:00","name":"[3/3,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006115600.20630-4-Ezra.Sitorus@arm.com/mbox/"},{"id":149243,"url":"https://patchwork.plctlab.org/api/1.2/patches/149243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com/","msgid":"<8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T13:18:14","name":"[committed] amdgcn: silence warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b7ca4a3-3888-4c10-81e8-74074a9076c0@codesourcery.com/mbox/"},{"id":149270,"url":"https://patchwork.plctlab.org/api/1.2/patches/149270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006140501.3370874-3-arsen@aarsen.me/","msgid":"<20231006140501.3370874-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-10-06T13:50:26","name":"[v2,2/2] *: add modern gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006140501.3370874-3-arsen@aarsen.me/mbox/"},{"id":149271,"url":"https://patchwork.plctlab.org/api/1.2/patches/149271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/86070729-25e3-4425-9092-f0f678440825@codesourcery.com/","msgid":"<86070729-25e3-4425-9092-f0f678440825@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T14:11:46","name":"[committed] amdgcn: switch mov insns to compact syntax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/86070729-25e3-4425-9092-f0f678440825@codesourcery.com/mbox/"},{"id":149329,"url":"https://patchwork.plctlab.org/api/1.2/patches/149329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006161555.2222785-1-sandra@codesourcery.com/","msgid":"<20231006161555.2222785-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-10-06T16:15:55","name":"[COMMITTED] Docs: Minimally document standard C/C++ attribute syntax.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006161555.2222785-1-sandra@codesourcery.com/mbox/"},{"id":149365,"url":"https://patchwork.plctlab.org/api/1.2/patches/149365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSBGwlLkLAukQYTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-06T17:41:22","name":"[RFC] > WIDE_INT_MAX_PREC support in wide_int and widest_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSBGwlLkLAukQYTu@tucnak/mbox/"},{"id":149375,"url":"https://patchwork.plctlab.org/api/1.2/patches/149375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006174954.392381-1-vineetg@rivosinc.com/","msgid":"<20231006174954.392381-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-06T17:49:54","name":"[v2] RISC-V: const: hide mvconst splitter from IRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006174954.392381-1-vineetg@rivosinc.com/mbox/"},{"id":149377,"url":"https://patchwork.plctlab.org/api/1.2/patches/149377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006182250.393162-1-vineetg@rivosinc.com/","msgid":"<20231006182250.393162-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-06T18:22:50","name":"[COMMITTED] RISC-V: const: hide mvconst splitter from IRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231006182250.393162-1-vineetg@rivosinc.com/mbox/"},{"id":149435,"url":"https://patchwork.plctlab.org/api/1.2/patches/149435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ab7a8fa-f054-4fbe-9f1c-b94e11b2a38d-1696624686073@3c-app-gmx-bap40/","msgid":"","list_archive_url":null,"date":"2023-10-06T20:38:06","name":"fortran: fix handling of options -ffpe-trap and -ffpe-summary [PR110957]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-1ab7a8fa-f054-4fbe-9f1c-b94e11b2a38d-1696624686073@3c-app-gmx-bap40/mbox/"},{"id":149489,"url":"https://patchwork.plctlab.org/api/1.2/patches/149489/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007031818.793-1-xuli1@eswincomputing.com/","msgid":"<20231007031818.793-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-10-07T03:18:18","name":"RISC-V: Fix scan-assembler-times of RVV test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007031818.793-1-xuli1@eswincomputing.com/mbox/"},{"id":149504,"url":"https://patchwork.plctlab.org/api/1.2/patches/149504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007044943.4153909-1-pan2.li@intel.com/","msgid":"<20231007044943.4153909-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-07T04:49:43","name":"[v1] RISC-V: Bugfix for legitimize address PR/111634","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007044943.4153909-1-pan2.li@intel.com/mbox/"},{"id":149508,"url":"https://patchwork.plctlab.org/api/1.2/patches/149508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007062530.20048-1-pan2.li@intel.com/","msgid":"<20231007062530.20048-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-07T06:25:30","name":"[v1] RISC-V: Add more run test for FP rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007062530.20048-1-pan2.li@intel.com/mbox/"},{"id":149509,"url":"https://patchwork.plctlab.org/api/1.2/patches/149509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007063452.3605029-1-haochen.jiang@intel.com/","msgid":"<20231007063452.3605029-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-07T06:34:52","name":"[v2,01/18] Initial support for -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007063452.3605029-1-haochen.jiang@intel.com/mbox/"},{"id":149511,"url":"https://patchwork.plctlab.org/api/1.2/patches/149511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef21a10b-4b6f-b195-d1df-c2d8c43cce33@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T06:42:50","name":"[v1] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef21a10b-4b6f-b195-d1df-c2d8c43cce33@linux.ibm.com/mbox/"},{"id":149516,"url":"https://patchwork.plctlab.org/api/1.2/patches/149516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007070458.460506-1-juzhe.zhong@rivai.ai/","msgid":"<20231007070458.460506-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T07:04:58","name":"RISC-V: Enable more tests of \"vect\" for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007070458.460506-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149542,"url":"https://patchwork.plctlab.org/api/1.2/patches/149542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007085012.3852069-3-yangyujie@loongson.cn/","msgid":"<20231007085012.3852069-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-10-07T08:50:14","name":"LoongArch: Adjust makefile dependency for loongarch headers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007085012.3852069-3-yangyujie@loongson.cn/mbox/"},{"id":149543,"url":"https://patchwork.plctlab.org/api/1.2/patches/149543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007092331.2590950-1-juzhe.zhong@rivai.ai/","msgid":"<20231007092331.2590950-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T09:23:31","name":"TEST: Fix XPASS of TSVC testsuites for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007092331.2590950-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149552,"url":"https://patchwork.plctlab.org/api/1.2/patches/149552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007113225.3196037-1-yanzhang.wang@intel.com/","msgid":"<20231007113225.3196037-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2023-10-07T11:32:25","name":"RISC-V: add static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007113225.3196037-1-yanzhang.wang@intel.com/mbox/"},{"id":149557,"url":"https://patchwork.plctlab.org/api/1.2/patches/149557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007114543.2455622-1-juzhe.zhong@rivai.ai/","msgid":"<20231007114543.2455622-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-07T11:45:43","name":"TEST: Fix vect_cond_arith_* dump checks for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231007114543.2455622-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149594,"url":"https://patchwork.plctlab.org/api/1.2/patches/149594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ced6c74e-f5ac-4b8e-b702-501596e91a03@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T15:40:10","name":"Fortran/OpenMP: Fix handling of strictly structured blocks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ced6c74e-f5ac-4b8e-b702-501596e91a03@codesourcery.com/mbox/"},{"id":149638,"url":"https://patchwork.plctlab.org/api/1.2/patches/149638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef0c54a5-c35c-3519-f062-9ac78ee66b81@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-07T19:04:27","name":"[v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ef0c54a5-c35c-3519-f062-9ac78ee66b81@linux.ibm.com/mbox/"},{"id":149666,"url":"https://patchwork.plctlab.org/api/1.2/patches/149666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008013346.2374788-1-juzhe.zhong@rivai.ai/","msgid":"<20231008013346.2374788-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T01:33:46","name":"[V2] TEST: Fix vect_cond_arith_* dump checks for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008013346.2374788-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149670,"url":"https://patchwork.plctlab.org/api/1.2/patches/149670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008015408.2865454-1-hongyu.wang@intel.com/","msgid":"<20231008015408.2865454-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-08T01:54:08","name":"[i386] Fix apx test fails on 32bit target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008015408.2865454-1-hongyu.wang@intel.com/mbox/"},{"id":149675,"url":"https://patchwork.plctlab.org/api/1.2/patches/149675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-1-hongtao.liu@intel.com/","msgid":"<20231008022727.2896829-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-08T02:27:26","name":"[1/2,x86] Support smin/smax for V2HF/V4HF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-1-hongtao.liu@intel.com/mbox/"},{"id":149676,"url":"https://patchwork.plctlab.org/api/1.2/patches/149676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-2-hongtao.liu@intel.com/","msgid":"<20231008022727.2896829-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-08T02:27:27","name":"[2/2] Support signbit/xorsign/copysign/abs/neg/and/xor/ior/andn for V2HF/V4HF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008022727.2896829-2-hongtao.liu@intel.com/mbox/"},{"id":149697,"url":"https://patchwork.plctlab.org/api/1.2/patches/149697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008072147.3030011-1-juzhe.zhong@rivai.ai/","msgid":"<20231008072147.3030011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T07:21:47","name":"RISC-V: Support movmisalign of RVV VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008072147.3030011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149707,"url":"https://patchwork.plctlab.org/api/1.2/patches/149707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008082005.3410115-1-juzhe.zhong@rivai.ai/","msgid":"<20231008082005.3410115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T08:20:05","name":"TEST: Fix dump FAIL for RVV (RISCV-V vector)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008082005.3410115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149735,"url":"https://patchwork.plctlab.org/api/1.2/patches/149735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008113531.3905091-1-juzhe.zhong@rivai.ai/","msgid":"<20231008113531.3905091-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T11:35:31","name":"TEST: Fix dump FAIL of vect-multitypes-16.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008113531.3905091-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149736,"url":"https://patchwork.plctlab.org/api/1.2/patches/149736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008120257.4184631-1-juzhe.zhong@rivai.ai/","msgid":"<20231008120257.4184631-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T12:02:57","name":"TEST: Fix dump FAIL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008120257.4184631-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149737,"url":"https://patchwork.plctlab.org/api/1.2/patches/149737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008123106.412529-1-juzhe.zhong@rivai.ai/","msgid":"<20231008123106.412529-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-08T12:31:06","name":"TEST: Fix XPASS of outer loop vectorization tests for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008123106.412529-1-juzhe.zhong@rivai.ai/mbox/"},{"id":149745,"url":"https://patchwork.plctlab.org/api/1.2/patches/149745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8cddbaa-9a23-41dc-860b-f162f26e94ce@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-08T13:13:02","name":"openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8cddbaa-9a23-41dc-860b-f162f26e94ce@codesourcery.com/mbox/"},{"id":149770,"url":"https://patchwork.plctlab.org/api/1.2/patches/149770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com/","msgid":"<002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-08T19:07:11","name":"[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/002701d9fa1a$a55dec70$f019c550$@nextmovesoftware.com/mbox/"},{"id":149779,"url":"https://patchwork.plctlab.org/api/1.2/patches/149779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225837.783598-1-dmalcolm@redhat.com/","msgid":"<20231008225837.783598-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:37","name":"[pushed] diagnostics: fix ICE on sarif output when source file is unreadable [PR111700]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225837.783598-1-dmalcolm@redhat.com/mbox/"},{"id":149780,"url":"https://patchwork.plctlab.org/api/1.2/patches/149780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225843.783633-1-dmalcolm@redhat.com/","msgid":"<20231008225843.783633-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:43","name":"[pushed] libcpp: \"const\" and other cleanups","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225843.783633-1-dmalcolm@redhat.com/mbox/"},{"id":149781,"url":"https://patchwork.plctlab.org/api/1.2/patches/149781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225848.783654-1-dmalcolm@redhat.com/","msgid":"<20231008225848.783654-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:48","name":"[pushed] libcpp: eliminate COMBINE_LOCATION_DATA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225848.783654-1-dmalcolm@redhat.com/mbox/"},{"id":149784,"url":"https://patchwork.plctlab.org/api/1.2/patches/149784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225854.783706-1-dmalcolm@redhat.com/","msgid":"<20231008225854.783706-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:54","name":"[pushed] analyzer: improvements to out-of-bounds diagrams [PR111155]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225854.783706-1-dmalcolm@redhat.com/mbox/"},{"id":149782,"url":"https://patchwork.plctlab.org/api/1.2/patches/149782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225859.783728-1-dmalcolm@redhat.com/","msgid":"<20231008225859.783728-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:58:59","name":"[pushed] libcpp: eliminate LINEMAPS_LAST_ALLOCATED{, _ORDINARY, _MACRO}_MAP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225859.783728-1-dmalcolm@redhat.com/mbox/"},{"id":149783,"url":"https://patchwork.plctlab.org/api/1.2/patches/149783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225903.783838-1-dmalcolm@redhat.com/","msgid":"<20231008225903.783838-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:59:03","name":"[pushed] libcpp: eliminate LINEMAPS_{,ORDINARY_,MACRO_}CACHE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225903.783838-1-dmalcolm@redhat.com/mbox/"},{"id":149785,"url":"https://patchwork.plctlab.org/api/1.2/patches/149785/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225908.783859-1-dmalcolm@redhat.com/","msgid":"<20231008225908.783859-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-08T22:59:08","name":"[pushed] libcpp: eliminate LINEMAPS_{ORDINARY,MACRO}_MAPS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231008225908.783859-1-dmalcolm@redhat.com/mbox/"},{"id":149804,"url":"https://patchwork.plctlab.org/api/1.2/patches/149804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65235160.170a0220.4cbca.5c7d@mx.google.com/","msgid":"<65235160.170a0220.4cbca.5c7d@mx.google.com>","list_archive_url":null,"date":"2023-10-09T01:03:23","name":"[v4] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65235160.170a0220.4cbca.5c7d@mx.google.com/mbox/"},{"id":149806,"url":"https://patchwork.plctlab.org/api/1.2/patches/149806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009020303.929293-1-hongyu.wang@intel.com/","msgid":"<20231009020303.929293-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-09T02:03:03","name":"[i386] APX EGPR: fix missing pattern that prohibits egpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009020303.929293-1-hongyu.wang@intel.com/mbox/"},{"id":149810,"url":"https://patchwork.plctlab.org/api/1.2/patches/149810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009022928.1499099-1-hongyu.wang@intel.com/","msgid":"<20231009022928.1499099-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-09T02:29:28","name":"[i386] APX EGPR: fix missing pattern that prohibits egpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009022928.1499099-1-hongyu.wang@intel.com/mbox/"},{"id":149811,"url":"https://patchwork.plctlab.org/api/1.2/patches/149811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com/","msgid":"<8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com>","list_archive_url":null,"date":"2023-10-09T02:30:15","name":"[PATCH-1,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bafe965-f392-8f5c-ad46-4efa5e5d695d@linux.ibm.com/mbox/"},{"id":149812,"url":"https://patchwork.plctlab.org/api/1.2/patches/149812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa42d6bc-151e-515b-81a6-d08925c047ac@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-09T02:30:38","name":"[PATCH-2,rs6000] Enable vector mode for memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/aa42d6bc-151e-515b-81a6-d08925c047ac@linux.ibm.com/mbox/"},{"id":149878,"url":"https://patchwork.plctlab.org/api/1.2/patches/149878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009085135.2038604-1-pan2.li@intel.com/","msgid":"<20231009085135.2038604-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-09T08:51:35","name":"[v1] RISC-V: Refine bswap16 auto vectorization code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009085135.2038604-1-pan2.li@intel.com/mbox/"},{"id":149920,"url":"https://patchwork.plctlab.org/api/1.2/patches/149920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6523cffe.170a0220.653b.72b9@mx.google.com/","msgid":"<6523cffe.170a0220.653b.72b9@mx.google.com>","list_archive_url":null,"date":"2023-10-09T10:03:36","name":"c++: Improve diagnostics for constexpr cast from void*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6523cffe.170a0220.653b.72b9@mx.google.com/mbox/"},{"id":149944,"url":"https://patchwork.plctlab.org/api/1.2/patches/149944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSPcBmLxejYfgyGq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-09T10:55:02","name":"wide-int: Allow up to 16320 bits wide_int and change widest_int precision to 32640 bits [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSPcBmLxejYfgyGq@tucnak/mbox/"},{"id":149951,"url":"https://patchwork.plctlab.org/api/1.2/patches/149951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009111403.221E8385B53E@sourceware.org/","msgid":"<20231009111403.221E8385B53E@sourceware.org>","list_archive_url":null,"date":"2023-10-09T11:13:38","name":"tree-optimization/111715 - improve TBAA for access paths with pun","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009111403.221E8385B53E@sourceware.org/mbox/"},{"id":149991,"url":"https://patchwork.plctlab.org/api/1.2/patches/149991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009120707.2746-1-juzhe.zhong@rivai.ai/","msgid":"<20231009120707.2746-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T12:07:07","name":"[V2] RISC-V: Support movmisalign of RVV VLA modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009120707.2746-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150036,"url":"https://patchwork.plctlab.org/api/1.2/patches/150036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009122451.8478-1-juzhe.zhong@rivai.ai/","msgid":"<20231009122451.8478-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T12:24:51","name":"RISC-V Regression test: Fix FAIL of fast-math-slp-38.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009122451.8478-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150076,"url":"https://patchwork.plctlab.org/api/1.2/patches/150076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130218.20525-1-juzhe.zhong@rivai.ai/","msgid":"<20231009130218.20525-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:02:18","name":"RISC-V Regression test: Fix FAIL of pr45752.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130218.20525-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150087,"url":"https://patchwork.plctlab.org/api/1.2/patches/150087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130929.2237485-1-pan2.li@intel.com/","msgid":"<20231009130929.2237485-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-09T13:09:29","name":"[v2] RISC-V: Refine bswap16 auto vectorization code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009130929.2237485-1-pan2.li@intel.com/mbox/"},{"id":150101,"url":"https://patchwork.plctlab.org/api/1.2/patches/150101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009131530.24496-1-juzhe.zhong@rivai.ai/","msgid":"<20231009131530.24496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:15:30","name":"RISC-V Regression tests: Fix FAIL of pr97832* for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009131530.24496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150102,"url":"https://patchwork.plctlab.org/api/1.2/patches/150102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133508.28747-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133508.28747-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:35:08","name":"RISC-V Regression test: Fix FAIL of slp-12a.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133508.28747-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150104,"url":"https://patchwork.plctlab.org/api/1.2/patches/150104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133707.29265-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133707.29265-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:37:07","name":"RISC-V Regression test: Adapt SLP tests like ARM SVE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133707.29265-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150110,"url":"https://patchwork.plctlab.org/api/1.2/patches/150110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133925.29739-1-juzhe.zhong@rivai.ai/","msgid":"<20231009133925.29739-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:39:25","name":"RISC-V Regression test: Fix slp-perm-4.c FAIL for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009133925.29739-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150111,"url":"https://patchwork.plctlab.org/api/1.2/patches/150111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009134123.30601-1-juzhe.zhong@rivai.ai/","msgid":"<20231009134123.30601-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T13:41:23","name":"RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009134123.30601-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150135,"url":"https://patchwork.plctlab.org/api/1.2/patches/150135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSQVTcoN+gxgCJCF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-09T14:59:25","name":"wide-int: Remove rwide_int, introduce dw_wide_int","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSQVTcoN+gxgCJCF@tucnak/mbox/"},{"id":150136,"url":"https://patchwork.plctlab.org/api/1.2/patches/150136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009145957.51655-1-juzhe.zhong@rivai.ai/","msgid":"<20231009145957.51655-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T14:59:57","name":"TEST: Add vectorization check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009145957.51655-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150216,"url":"https://patchwork.plctlab.org/api/1.2/patches/150216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com/","msgid":"<05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com>","list_archive_url":null,"date":"2023-10-09T17:10:28","name":"[COMMITTED] Remove unused get_identity_relation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05ff6998-7583-0d88-e959-35528bb7f37a@redhat.com/mbox/"},{"id":150217,"url":"https://patchwork.plctlab.org/api/1.2/patches/150217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com/","msgid":"<21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com>","list_archive_url":null,"date":"2023-10-09T17:10:35","name":"[COMMITTED] PR tree-optimization/111694 - Ensure float equivalences include + and - zero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21d344bf-fb9f-1f0a-31ba-27626e12562a@redhat.com/mbox/"},{"id":150328,"url":"https://patchwork.plctlab.org/api/1.2/patches/150328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009210250.947831-1-ewlu@rivosinc.com/","msgid":"<20231009210250.947831-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-10-09T21:02:09","name":"[RFC] RISC-V: Handle new types in scheduling descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009210250.947831-1-ewlu@rivosinc.com/mbox/"},{"id":150360,"url":"https://patchwork.plctlab.org/api/1.2/patches/150360/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009212751.474885-1-pinskia@gmail.com/","msgid":"<20231009212751.474885-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-09T21:27:51","name":"MATCH: [PR111679] Add alternative simplification of `a | ((~a) ^ b)`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009212751.474885-1-pinskia@gmail.com/mbox/"},{"id":150369,"url":"https://patchwork.plctlab.org/api/1.2/patches/150369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310092151030.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-10-09T21:52:59","name":"RISC-V/testsuite: Enable `vect_pack_trunc'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310092151030.5892@tpp.orcam.me.uk/mbox/"},{"id":150379,"url":"https://patchwork.plctlab.org/api/1.2/patches/150379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009224711.1105509-1-christoph.muellner@vrull.eu/","msgid":"<20231009224711.1105509-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-09T22:47:11","name":"RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009224711.1105509-1-christoph.muellner@vrull.eu/mbox/"},{"id":150418,"url":"https://patchwork.plctlab.org/api/1.2/patches/150418/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009232326.91336-1-juzhe.zhong@rivai.ai/","msgid":"<20231009232326.91336-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-09T23:23:26","name":"RISC-V: Add available vector size for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231009232326.91336-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150433,"url":"https://patchwork.plctlab.org/api/1.2/patches/150433/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010011638.103019-1-juzhe.zhong@rivai.ai/","msgid":"<20231010011638.103019-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T01:16:38","name":"RISC-V Regression: Fix dump check of bb-slp-68.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010011638.103019-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150439,"url":"https://patchwork.plctlab.org/api/1.2/patches/150439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010013904.105336-1-juzhe.zhong@rivai.ai/","msgid":"<20231010013904.105336-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T01:39:04","name":"RISC-V Regression: Fix FAIL of bb-slp-pr65935.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010013904.105336-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150447,"url":"https://patchwork.plctlab.org/api/1.2/patches/150447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010021840.3443697-1-guojiufu@linux.ibm.com/","msgid":"<20231010021840.3443697-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-10T02:18:39","name":"[V1] introduce light expander sra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010021840.3443697-1-guojiufu@linux.ibm.com/mbox/"},{"id":150450,"url":"https://patchwork.plctlab.org/api/1.2/patches/150450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010024742.3092307-1-juzhe.zhong@rivai.ai/","msgid":"<20231010024742.3092307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T02:47:42","name":"RISC-V Regression: Make match patterns more accurate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010024742.3092307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150451,"url":"https://patchwork.plctlab.org/api/1.2/patches/150451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025311.3642757-1-guojiufu@linux.ibm.com/","msgid":"<20231010025311.3642757-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-10T02:53:11","name":"use get_range_query to replace get_global_range_query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025311.3642757-1-guojiufu@linux.ibm.com/mbox/"},{"id":150452,"url":"https://patchwork.plctlab.org/api/1.2/patches/150452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025835.3109227-1-juzhe.zhong@rivai.ai/","msgid":"<20231010025835.3109227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T02:58:35","name":"RISC-V Regression: Fix FAIL of predcom-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010025835.3109227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150460,"url":"https://patchwork.plctlab.org/api/1.2/patches/150460/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-1-ppalka@redhat.com/","msgid":"<20231010032300.1057862-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-10T03:22:59","name":"[1/2] c++: sort candidates according to viability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-1-ppalka@redhat.com/mbox/"},{"id":150461,"url":"https://patchwork.plctlab.org/api/1.2/patches/150461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-2-ppalka@redhat.com/","msgid":"<20231010032300.1057862-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-10T03:23:00","name":"[2/2] c++: note other candidates when diagnosing deletedness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010032300.1057862-2-ppalka@redhat.com/mbox/"},{"id":150474,"url":"https://patchwork.plctlab.org/api/1.2/patches/150474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-2-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:02","name":"[v2,1/4] options: Define TARGET__P and TARGET__OPTS_P macro for Mask and InverseMask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-2-kito.cheng@sifive.com/mbox/"},{"id":150475,"url":"https://patchwork.plctlab.org/api/1.2/patches/150475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-3-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:03","name":"[v2,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-3-kito.cheng@sifive.com/mbox/"},{"id":150477,"url":"https://patchwork.plctlab.org/api/1.2/patches/150477/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-4-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:04","name":"[v2,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-4-kito.cheng@sifive.com/mbox/"},{"id":150476,"url":"https://patchwork.plctlab.org/api/1.2/patches/150476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-5-kito.cheng@sifive.com/","msgid":"<20231010041305.9111-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-10T04:13:05","name":"[v2,4/4] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010041305.9111-5-kito.cheng@sifive.com/mbox/"},{"id":150480,"url":"https://patchwork.plctlab.org/api/1.2/patches/150480/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010045952.572596-1-jun.zhang@intel.com/","msgid":"<20231010045952.572596-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-10-10T04:59:52","name":"x86: set spincount 1 for x86 hybrid platform [PR109812]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010045952.572596-1-jun.zhang@intel.com/mbox/"},{"id":150501,"url":"https://patchwork.plctlab.org/api/1.2/patches/150501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010064852.1108058-1-hongyu.wang@intel.com/","msgid":"<20231010064852.1108058-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-10-10T06:48:52","name":"[APX] Support Intel APX PUSH2POP2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010064852.1108058-1-hongyu.wang@intel.com/mbox/"},{"id":150502,"url":"https://patchwork.plctlab.org/api/1.2/patches/150502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010065945.1234266-1-hongtao.liu@intel.com/","msgid":"<20231010065945.1234266-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-10T06:59:45","name":"[x86] Refine predicate of operands[2] in divv4hf3 with register_operand.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010065945.1234266-1-hongtao.liu@intel.com/mbox/"},{"id":150527,"url":"https://patchwork.plctlab.org/api/1.2/patches/150527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010074645.1392417-1-lin1.hu@intel.com/","msgid":"<20231010074645.1392417-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-10-10T07:46:45","name":"Support Intel USER_MSR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010074645.1392417-1-lin1.hu@intel.com/mbox/"},{"id":150569,"url":"https://patchwork.plctlab.org/api/1.2/patches/150569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010083950.1549239-1-claziss@gmail.com/","msgid":"<20231010083950.1549239-1-claziss@gmail.com>","list_archive_url":null,"date":"2023-10-10T08:39:50","name":"[committed] arc: Refurbish add.f combiner patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010083950.1549239-1-claziss@gmail.com/mbox/"},{"id":150628,"url":"https://patchwork.plctlab.org/api/1.2/patches/150628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-2-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:15","name":"[v15,01/39] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-2-kmatsui@gcc.gnu.org/mbox/"},{"id":150630,"url":"https://patchwork.plctlab.org/api/1.2/patches/150630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-3-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:16","name":"[v15,02/39] c-family, c++: Look up traits through gperf instead of enum rid.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-3-kmatsui@gcc.gnu.org/mbox/"},{"id":150629,"url":"https://patchwork.plctlab.org/api/1.2/patches/150629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-4-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:17","name":"[v15,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-4-kmatsui@gcc.gnu.org/mbox/"},{"id":150631,"url":"https://patchwork.plctlab.org/api/1.2/patches/150631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-5-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:18","name":"[v15,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-5-kmatsui@gcc.gnu.org/mbox/"},{"id":150632,"url":"https://patchwork.plctlab.org/api/1.2/patches/150632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-6-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:19","name":"[v15,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-6-kmatsui@gcc.gnu.org/mbox/"},{"id":150633,"url":"https://patchwork.plctlab.org/api/1.2/patches/150633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-7-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:20","name":"[v15,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-7-kmatsui@gcc.gnu.org/mbox/"},{"id":150634,"url":"https://patchwork.plctlab.org/api/1.2/patches/150634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-8-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:21","name":"[v15,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-8-kmatsui@gcc.gnu.org/mbox/"},{"id":150635,"url":"https://patchwork.plctlab.org/api/1.2/patches/150635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-9-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:22","name":"[v15,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-9-kmatsui@gcc.gnu.org/mbox/"},{"id":150636,"url":"https://patchwork.plctlab.org/api/1.2/patches/150636/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-10-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:23","name":"[v15,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-10-kmatsui@gcc.gnu.org/mbox/"},{"id":150638,"url":"https://patchwork.plctlab.org/api/1.2/patches/150638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-11-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:24","name":"[v15,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-11-kmatsui@gcc.gnu.org/mbox/"},{"id":150637,"url":"https://patchwork.plctlab.org/api/1.2/patches/150637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-12-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:25","name":"[v15,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-12-kmatsui@gcc.gnu.org/mbox/"},{"id":150639,"url":"https://patchwork.plctlab.org/api/1.2/patches/150639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-13-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:26","name":"[v15,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-13-kmatsui@gcc.gnu.org/mbox/"},{"id":150640,"url":"https://patchwork.plctlab.org/api/1.2/patches/150640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-14-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:27","name":"[v15,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-14-kmatsui@gcc.gnu.org/mbox/"},{"id":150643,"url":"https://patchwork.plctlab.org/api/1.2/patches/150643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-15-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:28","name":"[v15,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-15-kmatsui@gcc.gnu.org/mbox/"},{"id":150642,"url":"https://patchwork.plctlab.org/api/1.2/patches/150642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-16-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:29","name":"[v15,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-16-kmatsui@gcc.gnu.org/mbox/"},{"id":150645,"url":"https://patchwork.plctlab.org/api/1.2/patches/150645/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-17-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:30","name":"[v15,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-17-kmatsui@gcc.gnu.org/mbox/"},{"id":150646,"url":"https://patchwork.plctlab.org/api/1.2/patches/150646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-18-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:31","name":"[v15,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-18-kmatsui@gcc.gnu.org/mbox/"},{"id":150647,"url":"https://patchwork.plctlab.org/api/1.2/patches/150647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-19-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:32","name":"[v15,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-19-kmatsui@gcc.gnu.org/mbox/"},{"id":150650,"url":"https://patchwork.plctlab.org/api/1.2/patches/150650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-20-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:33","name":"[v15,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-20-kmatsui@gcc.gnu.org/mbox/"},{"id":150651,"url":"https://patchwork.plctlab.org/api/1.2/patches/150651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-21-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:34","name":"[v15,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-21-kmatsui@gcc.gnu.org/mbox/"},{"id":150653,"url":"https://patchwork.plctlab.org/api/1.2/patches/150653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-22-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:35","name":"[v15,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-22-kmatsui@gcc.gnu.org/mbox/"},{"id":150654,"url":"https://patchwork.plctlab.org/api/1.2/patches/150654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-23-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:36","name":"[v15,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-23-kmatsui@gcc.gnu.org/mbox/"},{"id":150656,"url":"https://patchwork.plctlab.org/api/1.2/patches/150656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-24-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:37","name":"[v15,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-24-kmatsui@gcc.gnu.org/mbox/"},{"id":150655,"url":"https://patchwork.plctlab.org/api/1.2/patches/150655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-25-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:38","name":"[v15,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-25-kmatsui@gcc.gnu.org/mbox/"},{"id":150657,"url":"https://patchwork.plctlab.org/api/1.2/patches/150657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-26-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:39","name":"[v15,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-26-kmatsui@gcc.gnu.org/mbox/"},{"id":150658,"url":"https://patchwork.plctlab.org/api/1.2/patches/150658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-27-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:40","name":"[v15,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-27-kmatsui@gcc.gnu.org/mbox/"},{"id":150661,"url":"https://patchwork.plctlab.org/api/1.2/patches/150661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-28-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:41","name":"[v15,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-28-kmatsui@gcc.gnu.org/mbox/"},{"id":150659,"url":"https://patchwork.plctlab.org/api/1.2/patches/150659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-29-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:42","name":"[v15,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-29-kmatsui@gcc.gnu.org/mbox/"},{"id":150664,"url":"https://patchwork.plctlab.org/api/1.2/patches/150664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-30-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:43","name":"[v15,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-30-kmatsui@gcc.gnu.org/mbox/"},{"id":150671,"url":"https://patchwork.plctlab.org/api/1.2/patches/150671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-31-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:44","name":"[v15,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-31-kmatsui@gcc.gnu.org/mbox/"},{"id":150660,"url":"https://patchwork.plctlab.org/api/1.2/patches/150660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-32-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:45","name":"[v15,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-32-kmatsui@gcc.gnu.org/mbox/"},{"id":150663,"url":"https://patchwork.plctlab.org/api/1.2/patches/150663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-33-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:46","name":"[v15,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-33-kmatsui@gcc.gnu.org/mbox/"},{"id":150672,"url":"https://patchwork.plctlab.org/api/1.2/patches/150672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-34-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:47","name":"[v15,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-34-kmatsui@gcc.gnu.org/mbox/"},{"id":150667,"url":"https://patchwork.plctlab.org/api/1.2/patches/150667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-35-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:48","name":"[v15,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-35-kmatsui@gcc.gnu.org/mbox/"},{"id":150665,"url":"https://patchwork.plctlab.org/api/1.2/patches/150665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-36-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:49","name":"[v15,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-36-kmatsui@gcc.gnu.org/mbox/"},{"id":150669,"url":"https://patchwork.plctlab.org/api/1.2/patches/150669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-37-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:50","name":"[v15,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-37-kmatsui@gcc.gnu.org/mbox/"},{"id":150666,"url":"https://patchwork.plctlab.org/api/1.2/patches/150666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-38-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:51","name":"[v15,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-38-kmatsui@gcc.gnu.org/mbox/"},{"id":150668,"url":"https://patchwork.plctlab.org/api/1.2/patches/150668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-39-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:52","name":"[v15,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-39-kmatsui@gcc.gnu.org/mbox/"},{"id":150670,"url":"https://patchwork.plctlab.org/api/1.2/patches/150670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-40-kmatsui@gcc.gnu.org/","msgid":"<20231010095229.3364786-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T09:46:53","name":"[v15,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010095229.3364786-40-kmatsui@gcc.gnu.org/mbox/"},{"id":150680,"url":"https://patchwork.plctlab.org/api/1.2/patches/150680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010103846.F1467383C8FA@sourceware.org/","msgid":"<20231010103846.F1467383C8FA@sourceware.org>","list_archive_url":null,"date":"2023-10-10T10:38:20","name":"Fix missed CSE with a BLKmode entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010103846.F1467383C8FA@sourceware.org/mbox/"},{"id":150681,"url":"https://patchwork.plctlab.org/api/1.2/patches/150681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010104929.D13B53857709@sourceware.org/","msgid":"<20231010104929.D13B53857709@sourceware.org>","list_archive_url":null,"date":"2023-10-10T10:49:04","name":"tree-optimization/111519 - strlen optimization skips clobbering store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010104929.D13B53857709@sourceware.org/mbox/"},{"id":150692,"url":"https://patchwork.plctlab.org/api/1.2/patches/150692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010114901.4178775-1-juzhe.zhong@rivai.ai/","msgid":"<20231010114901.4178775-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T11:49:01","name":"[Committed] RISC-V: Add testcase for SCCVN optimization[PR111751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010114901.4178775-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150719,"url":"https://patchwork.plctlab.org/api/1.2/patches/150719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121445.3888198-1-poulhies@adacore.com/","msgid":"<20231010121445.3888198-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:45","name":"[COMMITTED] ada: Crash processing pragmas Compile_Time_Error and Compile_Time_Warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121445.3888198-1-poulhies@adacore.com/mbox/"},{"id":150723,"url":"https://patchwork.plctlab.org/api/1.2/patches/150723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121449.3888260-1-poulhies@adacore.com/","msgid":"<20231010121449.3888260-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:49","name":"[COMMITTED] ada: Tweak documentation comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121449.3888260-1-poulhies@adacore.com/mbox/"},{"id":150729,"url":"https://patchwork.plctlab.org/api/1.2/patches/150729/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121451.3888321-1-poulhies@adacore.com/","msgid":"<20231010121451.3888321-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:51","name":"[COMMITTED] ada: Fix filesystem entry filtering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121451.3888321-1-poulhies@adacore.com/mbox/"},{"id":150726,"url":"https://patchwork.plctlab.org/api/1.2/patches/150726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121452.3888382-1-poulhies@adacore.com/","msgid":"<20231010121452.3888382-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:52","name":"[COMMITTED] ada: Fix infinite loop with multiple limited with clauses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121452.3888382-1-poulhies@adacore.com/mbox/"},{"id":150720,"url":"https://patchwork.plctlab.org/api/1.2/patches/150720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121454.3888482-1-poulhies@adacore.com/","msgid":"<20231010121454.3888482-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:54","name":"[COMMITTED] ada: Fix bad finalization of limited aggregate in conditional expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121454.3888482-1-poulhies@adacore.com/mbox/"},{"id":150722,"url":"https://patchwork.plctlab.org/api/1.2/patches/150722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121455.3888544-1-poulhies@adacore.com/","msgid":"<20231010121455.3888544-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:55","name":"[COMMITTED] ada: Remove superfluous setter procedure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121455.3888544-1-poulhies@adacore.com/mbox/"},{"id":150725,"url":"https://patchwork.plctlab.org/api/1.2/patches/150725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121457.3888606-1-poulhies@adacore.com/","msgid":"<20231010121457.3888606-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:57","name":"[COMMITTED] ada: Tweak internal subprogram in Ada.Directories","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121457.3888606-1-poulhies@adacore.com/mbox/"},{"id":150727,"url":"https://patchwork.plctlab.org/api/1.2/patches/150727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121459.3888667-1-poulhies@adacore.com/","msgid":"<20231010121459.3888667-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-10T12:14:59","name":"[COMMITTED] ada: Fix internal error on too large representation clause for small component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121459.3888667-1-poulhies@adacore.com/mbox/"},{"id":150732,"url":"https://patchwork.plctlab.org/api/1.2/patches/150732/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121909.1803189-1-juzhe.zhong@rivai.ai/","msgid":"<20231010121909.1803189-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T12:19:09","name":"[Committed] RISC-V: Add VLS BOOL mode vcond_mask[PR111751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121909.1803189-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150731,"url":"https://patchwork.plctlab.org/api/1.2/patches/150731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121947.551323882004@sourceware.org/","msgid":"<20231010121947.551323882004@sourceware.org>","list_archive_url":null,"date":"2023-10-10T12:19:18","name":"tree-optimization/111751 - support 1024 bit vector constant reinterpretation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010121947.551323882004@sourceware.org/mbox/"},{"id":150739,"url":"https://patchwork.plctlab.org/api/1.2/patches/150739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com/","msgid":"<049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-10T12:28:29","name":"Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/049c01d9fb75$47c0bfa0$d7423ee0$@nextmovesoftware.com/mbox/"},{"id":150749,"url":"https://patchwork.plctlab.org/api/1.2/patches/150749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010124032.103935-1-christoph.muellner@vrull.eu/","msgid":"<20231010124032.103935-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-10T12:40:32","name":"[COMMITTED] MAINTAINERS: Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010124032.103935-1-christoph.muellner@vrull.eu/mbox/"},{"id":150750,"url":"https://patchwork.plctlab.org/api/1.2/patches/150750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b126b63b-258b-e63a-6d6e-fa79aefd90e8@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-10T12:44:00","name":"PATCH v3] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b126b63b-258b-e63a-6d6e-fa79aefd90e8@linux.ibm.com/mbox/"},{"id":150755,"url":"https://patchwork.plctlab.org/api/1.2/patches/150755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010125547.3682032-1-juzhe.zhong@rivai.ai/","msgid":"<20231010125547.3682032-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T12:55:47","name":"RISC-V Regression: Fix FAIL of pr65947-8.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010125547.3682032-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150795,"url":"https://patchwork.plctlab.org/api/1.2/patches/150795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSVUz5PH36aJ3en2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-10T13:42:39","name":"dwarf2out: Stop using wide_int in GC structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSVUz5PH36aJ3en2@tucnak/mbox/"},{"id":150804,"url":"https://patchwork.plctlab.org/api/1.2/patches/150804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65255623.620a0220.39bb2.41d9@mx.google.com/","msgid":"<65255623.620a0220.39bb2.41d9@mx.google.com>","list_archive_url":null,"date":"2023-10-10T13:48:12","name":"[v5] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65255623.620a0220.39bb2.41d9@mx.google.com/mbox/"},{"id":150808,"url":"https://patchwork.plctlab.org/api/1.2/patches/150808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-2-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:43","name":"[1/3,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-2-Ezra.Sitorus@arm.com/mbox/"},{"id":150807,"url":"https://patchwork.plctlab.org/api/1.2/patches/150807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-3-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:44","name":"[2/3,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-3-Ezra.Sitorus@arm.com/mbox/"},{"id":150809,"url":"https://patchwork.plctlab.org/api/1.2/patches/150809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-4-Ezra.Sitorus@arm.com/","msgid":"<20231010140445.2084-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-10T14:04:45","name":"[3/3,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010140445.2084-4-Ezra.Sitorus@arm.com/mbox/"},{"id":150830,"url":"https://patchwork.plctlab.org/api/1.2/patches/150830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010144913.2245394-1-juzhe.zhong@rivai.ai/","msgid":"<20231010144913.2245394-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T14:49:13","name":"RISC-V Regression: Fix FAIL of vect-multitypes-16.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010144913.2245394-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150834,"url":"https://patchwork.plctlab.org/api/1.2/patches/150834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010145746.2247025-1-juzhe.zhong@rivai.ai/","msgid":"<20231010145746.2247025-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-10T14:57:46","name":"RISC-V Regression: Make pattern match more accurate of vect-live-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010145746.2247025-1-juzhe.zhong@rivai.ai/mbox/"},{"id":150872,"url":"https://patchwork.plctlab.org/api/1.2/patches/150872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com/","msgid":"<457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com>","list_archive_url":null,"date":"2023-10-10T16:46:35","name":"Fortran: Support OpenMP'\''s '\''allocate'\'' directive for stack vars","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/457ea120-5cca-48e0-89d6-c3eab4234b61@codesourcery.com/mbox/"},{"id":150883,"url":"https://patchwork.plctlab.org/api/1.2/patches/150883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSWHycEfs6r1Wvki@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-10T17:20:09","name":"[v2] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSWHycEfs6r1Wvki@redhat.com/mbox/"},{"id":150972,"url":"https://patchwork.plctlab.org/api/1.2/patches/150972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010212305.121636-1-jason@redhat.com/","msgid":"<20231010212305.121636-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-10T21:23:05","name":"[pushed] c++: mangle multiple levels of template parms [PR109422]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010212305.121636-1-jason@redhat.com/mbox/"},{"id":150989,"url":"https://patchwork.plctlab.org/api/1.2/patches/150989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-2-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:52","name":"[v16,01/39] c++: Sort built-in identifiers alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-2-kmatsui@gcc.gnu.org/mbox/"},{"id":150990,"url":"https://patchwork.plctlab.org/api/1.2/patches/150990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-3-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:53","name":"[v16,02/39] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-3-kmatsui@gcc.gnu.org/mbox/"},{"id":150991,"url":"https://patchwork.plctlab.org/api/1.2/patches/150991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-4-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:54","name":"[v16,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-4-kmatsui@gcc.gnu.org/mbox/"},{"id":150992,"url":"https://patchwork.plctlab.org/api/1.2/patches/150992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-5-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:55","name":"[v16,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-5-kmatsui@gcc.gnu.org/mbox/"},{"id":150993,"url":"https://patchwork.plctlab.org/api/1.2/patches/150993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-6-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:56","name":"[v16,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-6-kmatsui@gcc.gnu.org/mbox/"},{"id":150994,"url":"https://patchwork.plctlab.org/api/1.2/patches/150994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-7-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:57","name":"[v16,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-7-kmatsui@gcc.gnu.org/mbox/"},{"id":150995,"url":"https://patchwork.plctlab.org/api/1.2/patches/150995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-8-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:58","name":"[v16,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-8-kmatsui@gcc.gnu.org/mbox/"},{"id":150996,"url":"https://patchwork.plctlab.org/api/1.2/patches/150996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-9-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:09:59","name":"[v16,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-9-kmatsui@gcc.gnu.org/mbox/"},{"id":151000,"url":"https://patchwork.plctlab.org/api/1.2/patches/151000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-10-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:00","name":"[v16,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-10-kmatsui@gcc.gnu.org/mbox/"},{"id":151008,"url":"https://patchwork.plctlab.org/api/1.2/patches/151008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-11-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:01","name":"[v16,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-11-kmatsui@gcc.gnu.org/mbox/"},{"id":151009,"url":"https://patchwork.plctlab.org/api/1.2/patches/151009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-12-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:02","name":"[v16,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-12-kmatsui@gcc.gnu.org/mbox/"},{"id":151011,"url":"https://patchwork.plctlab.org/api/1.2/patches/151011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-13-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:03","name":"[v16,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-13-kmatsui@gcc.gnu.org/mbox/"},{"id":151010,"url":"https://patchwork.plctlab.org/api/1.2/patches/151010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-14-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:04","name":"[v16,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-14-kmatsui@gcc.gnu.org/mbox/"},{"id":151013,"url":"https://patchwork.plctlab.org/api/1.2/patches/151013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-15-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:05","name":"[v16,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-15-kmatsui@gcc.gnu.org/mbox/"},{"id":151014,"url":"https://patchwork.plctlab.org/api/1.2/patches/151014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-16-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:06","name":"[v16,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-16-kmatsui@gcc.gnu.org/mbox/"},{"id":151016,"url":"https://patchwork.plctlab.org/api/1.2/patches/151016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-17-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:07","name":"[v16,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-17-kmatsui@gcc.gnu.org/mbox/"},{"id":151015,"url":"https://patchwork.plctlab.org/api/1.2/patches/151015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-18-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:08","name":"[v16,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-18-kmatsui@gcc.gnu.org/mbox/"},{"id":151018,"url":"https://patchwork.plctlab.org/api/1.2/patches/151018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-19-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:09","name":"[v16,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-19-kmatsui@gcc.gnu.org/mbox/"},{"id":151017,"url":"https://patchwork.plctlab.org/api/1.2/patches/151017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-20-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:10","name":"[v16,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-20-kmatsui@gcc.gnu.org/mbox/"},{"id":151021,"url":"https://patchwork.plctlab.org/api/1.2/patches/151021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-21-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:11","name":"[v16,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-21-kmatsui@gcc.gnu.org/mbox/"},{"id":151024,"url":"https://patchwork.plctlab.org/api/1.2/patches/151024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-22-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:12","name":"[v16,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-22-kmatsui@gcc.gnu.org/mbox/"},{"id":151031,"url":"https://patchwork.plctlab.org/api/1.2/patches/151031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-23-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:13","name":"[v16,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-23-kmatsui@gcc.gnu.org/mbox/"},{"id":151020,"url":"https://patchwork.plctlab.org/api/1.2/patches/151020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-24-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:14","name":"[v16,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-24-kmatsui@gcc.gnu.org/mbox/"},{"id":151019,"url":"https://patchwork.plctlab.org/api/1.2/patches/151019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-25-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:15","name":"[v16,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-25-kmatsui@gcc.gnu.org/mbox/"},{"id":151023,"url":"https://patchwork.plctlab.org/api/1.2/patches/151023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-26-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:16","name":"[v16,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-26-kmatsui@gcc.gnu.org/mbox/"},{"id":151022,"url":"https://patchwork.plctlab.org/api/1.2/patches/151022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-27-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:17","name":"[v16,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-27-kmatsui@gcc.gnu.org/mbox/"},{"id":151026,"url":"https://patchwork.plctlab.org/api/1.2/patches/151026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-28-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:18","name":"[v16,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-28-kmatsui@gcc.gnu.org/mbox/"},{"id":151030,"url":"https://patchwork.plctlab.org/api/1.2/patches/151030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-29-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:19","name":"[v16,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-29-kmatsui@gcc.gnu.org/mbox/"},{"id":151025,"url":"https://patchwork.plctlab.org/api/1.2/patches/151025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-30-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:20","name":"[v16,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-30-kmatsui@gcc.gnu.org/mbox/"},{"id":151028,"url":"https://patchwork.plctlab.org/api/1.2/patches/151028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-31-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:21","name":"[v16,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-31-kmatsui@gcc.gnu.org/mbox/"},{"id":151033,"url":"https://patchwork.plctlab.org/api/1.2/patches/151033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-32-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:22","name":"[v16,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-32-kmatsui@gcc.gnu.org/mbox/"},{"id":151032,"url":"https://patchwork.plctlab.org/api/1.2/patches/151032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-33-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:23","name":"[v16,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-33-kmatsui@gcc.gnu.org/mbox/"},{"id":151038,"url":"https://patchwork.plctlab.org/api/1.2/patches/151038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-34-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:24","name":"[v16,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-34-kmatsui@gcc.gnu.org/mbox/"},{"id":151035,"url":"https://patchwork.plctlab.org/api/1.2/patches/151035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-35-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:25","name":"[v16,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-35-kmatsui@gcc.gnu.org/mbox/"},{"id":151034,"url":"https://patchwork.plctlab.org/api/1.2/patches/151034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-36-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:26","name":"[v16,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-36-kmatsui@gcc.gnu.org/mbox/"},{"id":151036,"url":"https://patchwork.plctlab.org/api/1.2/patches/151036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-37-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:27","name":"[v16,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-37-kmatsui@gcc.gnu.org/mbox/"},{"id":151037,"url":"https://patchwork.plctlab.org/api/1.2/patches/151037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-38-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:28","name":"[v16,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-38-kmatsui@gcc.gnu.org/mbox/"},{"id":151039,"url":"https://patchwork.plctlab.org/api/1.2/patches/151039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-39-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:29","name":"[v16,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-39-kmatsui@gcc.gnu.org/mbox/"},{"id":151040,"url":"https://patchwork.plctlab.org/api/1.2/patches/151040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-40-kmatsui@gcc.gnu.org/","msgid":"<20231010221520.3680267-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-10T22:10:30","name":"[v16,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231010221520.3680267-40-kmatsui@gcc.gnu.org/mbox/"},{"id":150988,"url":"https://patchwork.plctlab.org/api/1.2/patches/150988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com/","msgid":"<001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com>","list_archive_url":null,"date":"2023-10-10T22:11:21","name":"[committed,PR,target/93062] RISC-V: Handle long conditional branches for RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/001ae968-da60-4e3b-8909-d6b99980ea63@ventanamicro.com/mbox/"},{"id":151055,"url":"https://patchwork.plctlab.org/api/1.2/patches/151055/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6525e4d7.170a0220.2ad8c.28d8@mx.google.com/","msgid":"<6525e4d7.170a0220.2ad8c.28d8@mx.google.com>","list_archive_url":null,"date":"2023-10-10T23:57:06","name":"[v2] c++: Improve diagnostics for constexpr cast from void*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6525e4d7.170a0220.2ad8c.28d8@mx.google.com/mbox/"},{"id":151090,"url":"https://patchwork.plctlab.org/api/1.2/patches/151090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011003602.80416-1-guojiufu@linux.ibm.com/","msgid":"<20231011003602.80416-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T00:36:02","name":"[V1] use more get_range_query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011003602.80416-1-guojiufu@linux.ibm.com/mbox/"},{"id":151091,"url":"https://patchwork.plctlab.org/api/1.2/patches/151091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011004537.3582095-1-pinskia@gmail.com/","msgid":"<20231011004537.3582095-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-11T00:45:37","name":"MATCH: [PR111282] Simplify `a & (b ^ ~a)` to `a & b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011004537.3582095-1-pinskia@gmail.com/mbox/"},{"id":151093,"url":"https://patchwork.plctlab.org/api/1.2/patches/151093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011012934.1370966-1-guojiufu@linux.ibm.com/","msgid":"<20231011012934.1370966-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T01:29:34","name":"early outs for functions in rs6000.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011012934.1370966-1-guojiufu@linux.ibm.com/mbox/"},{"id":151106,"url":"https://patchwork.plctlab.org/api/1.2/patches/151106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011032507.1755127-1-juzhe.zhong@rivai.ai/","msgid":"<20231011032507.1755127-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T03:25:07","name":"RISC-V: Remove XFAIL of ssa-dom-cse-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011032507.1755127-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151117,"url":"https://patchwork.plctlab.org/api/1.2/patches/151117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011051502.1695577-1-juzhe.zhong@rivai.ai/","msgid":"<20231011051502.1695577-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T05:15:02","name":"RISC-V: Enable full coverage vect tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011051502.1695577-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151208,"url":"https://patchwork.plctlab.org/api/1.2/patches/151208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011083928.2535012-1-jun.zhang@intel.com/","msgid":"<20231011083928.2535012-1-jun.zhang@intel.com>","list_archive_url":null,"date":"2023-10-11T08:39:28","name":"[v2] x86: set spincount 1 for x86 hybrid platform","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011083928.2535012-1-jun.zhang@intel.com/mbox/"},{"id":151209,"url":"https://patchwork.plctlab.org/api/1.2/patches/151209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084125.3027928-1-panchenghui@loongson.cn/","msgid":"<20231011084125.3027928-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-10-11T08:41:25","name":"[v1] LoongArch: Fix vec_initv32qiv16qi template to avoid ICE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084125.3027928-1-panchenghui@loongson.cn/mbox/"},{"id":151216,"url":"https://patchwork.plctlab.org/api/1.2/patches/151216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084703.2535206-1-lin1.hu@intel.com/","msgid":"<20231011084703.2535206-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-10-11T08:47:03","name":"Fix testcases that are raised by support -mevex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084703.2535206-1-lin1.hu@intel.com/mbox/"},{"id":151217,"url":"https://patchwork.plctlab.org/api/1.2/patches/151217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+NVx6b0ZtQ7gK8wHAA1o0Rrr6JUy82H0xV0gfv7VqcvQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T08:48:17","name":"[fortran] PR67740 - Wrong association status of allocatable character pointer in derived types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGi+NVx6b0ZtQ7gK8wHAA1o0Rrr6JUy82H0xV0gfv7VqcvQ@mail.gmail.com/mbox/"},{"id":151218,"url":"https://patchwork.plctlab.org/api/1.2/patches/151218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084953.3748731-1-pan2.li@intel.com/","msgid":"<20231011084953.3748731-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-11T08:49:53","name":"[v1] RISC-V: Support FP lrint/lrintf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011084953.3748731-1-pan2.li@intel.com/mbox/"},{"id":151232,"url":"https://patchwork.plctlab.org/api/1.2/patches/151232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011090309.2987108-1-juzhe.zhong@rivai.ai/","msgid":"<20231011090309.2987108-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:03:09","name":"RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011090309.2987108-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151234,"url":"https://patchwork.plctlab.org/api/1.2/patches/151234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com/","msgid":"<88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T09:05:59","name":"[PATCH-1v2,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/88cb6668-66dc-26ba-461c-64dd097b8eba@linux.ibm.com/mbox/"},{"id":151237,"url":"https://patchwork.plctlab.org/api/1.2/patches/151237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com/","msgid":"<19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com>","list_archive_url":null,"date":"2023-10-11T09:06:23","name":"[PATCH-2v2,rs6000] Enable vector mode for memory equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/19fc945f-cee9-d184-a92d-b0019e7c98b1@linux.ibm.com/mbox/"},{"id":151239,"url":"https://patchwork.plctlab.org/api/1.2/patches/151239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011093631.2993626-1-juzhe.zhong@rivai.ai/","msgid":"<20231011093631.2993626-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:36:31","name":"[V2] RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011093631.2993626-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151240,"url":"https://patchwork.plctlab.org/api/1.2/patches/151240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095444.2997562-1-juzhe.zhong@rivai.ai/","msgid":"<20231011095444.2997562-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T09:54:44","name":"[V3] RISC-V: Fix incorrect index(offset) of gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095444.2997562-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151242,"url":"https://patchwork.plctlab.org/api/1.2/patches/151242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095953.3184215-1-yangyujie@loongson.cn/","msgid":"<20231011095953.3184215-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-10-11T09:59:53","name":"[v2] LoongArch: Adjust makefile dependency for loongarch headers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011095953.3184215-1-yangyujie@loongson.cn/mbox/"},{"id":151326,"url":"https://patchwork.plctlab.org/api/1.2/patches/151326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com/","msgid":"<402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com>","list_archive_url":null,"date":"2023-10-11T11:50:09","name":"[v2] rs6000: Change bitwise xor to an equality operator [PR106907]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/402a4179-fea7-43b4-9e2e-4b164c76deb2@linux.vnet.ibm.com/mbox/"},{"id":151332,"url":"https://patchwork.plctlab.org/api/1.2/patches/151332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-2-mary.bennett@embecosm.com/","msgid":"<20231011120608.242927-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-11T12:06:07","name":"[v4,1/2] RISC-V: Add support for XCVmac extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-2-mary.bennett@embecosm.com/mbox/"},{"id":151333,"url":"https://patchwork.plctlab.org/api/1.2/patches/151333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-3-mary.bennett@embecosm.com/","msgid":"<20231011120608.242927-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-11T12:06:08","name":"[v4,2/2] RISC-V: Add support for XCValu extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011120608.242927-3-mary.bennett@embecosm.com/mbox/"},{"id":151410,"url":"https://patchwork.plctlab.org/api/1.2/patches/151410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011122715.3017753-1-juzhe.zhong@rivai.ai/","msgid":"<20231011122715.3017753-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-11T12:27:15","name":"VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011122715.3017753-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151466,"url":"https://patchwork.plctlab.org/api/1.2/patches/151466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5spun4n.fsf@oldenburg.str.redhat.com/","msgid":"<87a5spun4n.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:42:16","name":"C99 test suite readiness: Mark some C89 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5spun4n.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151473,"url":"https://patchwork.plctlab.org/api/1.2/patches/151473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSbRqzsy4z0zH0O9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-11T16:47:39","name":"wide-int: Allow up to 16320 bits wide_int and change widest_int precision to 32640 bits [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSbRqzsy4z0zH0O9@tucnak/mbox/"},{"id":151476,"url":"https://patchwork.plctlab.org/api/1.2/patches/151476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0pt80z.fsf@oldenburg.str.redhat.com/","msgid":"<87zg0pt80z.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:53:48","name":"C99 test suite conversation: Some unverified test case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0pt80z.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151478,"url":"https://patchwork.plctlab.org/api/1.2/patches/151478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0m1t7yc.fsf@oldenburg.str.redhat.com/","msgid":"<87r0m1t7yc.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-11T16:55:23","name":"C99 testsuite readiness: Some verified test case adjustments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0m1t7yc.fsf@oldenburg.str.redhat.com/mbox/"},{"id":151554,"url":"https://patchwork.plctlab.org/api/1.2/patches/151554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5be9e4b-fb8b-f385-ec81-cc7bede3fb5d@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T20:48:02","name":"[COMMITTED,GCC13] PR tree-optimization/111694 - Ensure float equivalences include + and - zero.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b5be9e4b-fb8b-f385-ec81-cc7bede3fb5d@redhat.com/mbox/"},{"id":151555,"url":"https://patchwork.plctlab.org/api/1.2/patches/151555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZScKIRt2x6B2uAIB@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-11T20:48:33","name":"[v2] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZScKIRt2x6B2uAIB@redhat.com/mbox/"},{"id":151567,"url":"https://patchwork.plctlab.org/api/1.2/patches/151567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-2-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:37","name":"[v17,01/39] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-2-kmatsui@gcc.gnu.org/mbox/"},{"id":151569,"url":"https://patchwork.plctlab.org/api/1.2/patches/151569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-3-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:38","name":"[v17,02/39] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-3-kmatsui@gcc.gnu.org/mbox/"},{"id":151574,"url":"https://patchwork.plctlab.org/api/1.2/patches/151574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-4-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:39","name":"[v17,03/39] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-4-kmatsui@gcc.gnu.org/mbox/"},{"id":151570,"url":"https://patchwork.plctlab.org/api/1.2/patches/151570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-5-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:40","name":"[v17,04/39] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-5-kmatsui@gcc.gnu.org/mbox/"},{"id":151575,"url":"https://patchwork.plctlab.org/api/1.2/patches/151575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-6-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:41","name":"[v17,05/39] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-6-kmatsui@gcc.gnu.org/mbox/"},{"id":151572,"url":"https://patchwork.plctlab.org/api/1.2/patches/151572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-7-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:42","name":"[v17,06/39] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-7-kmatsui@gcc.gnu.org/mbox/"},{"id":151588,"url":"https://patchwork.plctlab.org/api/1.2/patches/151588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-8-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:43","name":"[v17,07/39] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-8-kmatsui@gcc.gnu.org/mbox/"},{"id":151580,"url":"https://patchwork.plctlab.org/api/1.2/patches/151580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-9-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:44","name":"[v17,08/39] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-9-kmatsui@gcc.gnu.org/mbox/"},{"id":151595,"url":"https://patchwork.plctlab.org/api/1.2/patches/151595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-10-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:45","name":"[v17,09/39] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-10-kmatsui@gcc.gnu.org/mbox/"},{"id":151581,"url":"https://patchwork.plctlab.org/api/1.2/patches/151581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-11-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:46","name":"[v17,10/39] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-11-kmatsui@gcc.gnu.org/mbox/"},{"id":151587,"url":"https://patchwork.plctlab.org/api/1.2/patches/151587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-12-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:47","name":"[v17,11/39] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-12-kmatsui@gcc.gnu.org/mbox/"},{"id":151577,"url":"https://patchwork.plctlab.org/api/1.2/patches/151577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-13-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:48","name":"[v17,12/39] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-13-kmatsui@gcc.gnu.org/mbox/"},{"id":151576,"url":"https://patchwork.plctlab.org/api/1.2/patches/151576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-14-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:49","name":"[v17,13/39] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-14-kmatsui@gcc.gnu.org/mbox/"},{"id":151599,"url":"https://patchwork.plctlab.org/api/1.2/patches/151599/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-15-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:50","name":"[v17,14/39] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-15-kmatsui@gcc.gnu.org/mbox/"},{"id":151604,"url":"https://patchwork.plctlab.org/api/1.2/patches/151604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-16-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:51","name":"[v17,15/39] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-16-kmatsui@gcc.gnu.org/mbox/"},{"id":151586,"url":"https://patchwork.plctlab.org/api/1.2/patches/151586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-17-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:52","name":"[v17,16/39] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-17-kmatsui@gcc.gnu.org/mbox/"},{"id":151579,"url":"https://patchwork.plctlab.org/api/1.2/patches/151579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-18-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:53","name":"[v17,17/39] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-18-kmatsui@gcc.gnu.org/mbox/"},{"id":151596,"url":"https://patchwork.plctlab.org/api/1.2/patches/151596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-19-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:54","name":"[v17,18/39] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-19-kmatsui@gcc.gnu.org/mbox/"},{"id":151597,"url":"https://patchwork.plctlab.org/api/1.2/patches/151597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-20-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:55","name":"[v17,19/39] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-20-kmatsui@gcc.gnu.org/mbox/"},{"id":151601,"url":"https://patchwork.plctlab.org/api/1.2/patches/151601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-21-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:56","name":"[v17,20/39] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-21-kmatsui@gcc.gnu.org/mbox/"},{"id":151585,"url":"https://patchwork.plctlab.org/api/1.2/patches/151585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-22-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:57","name":"[v17,21/39] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-22-kmatsui@gcc.gnu.org/mbox/"},{"id":151612,"url":"https://patchwork.plctlab.org/api/1.2/patches/151612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-23-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:58","name":"[v17,22/39] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-23-kmatsui@gcc.gnu.org/mbox/"},{"id":151608,"url":"https://patchwork.plctlab.org/api/1.2/patches/151608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-24-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:45:59","name":"[v17,23/39] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-24-kmatsui@gcc.gnu.org/mbox/"},{"id":151607,"url":"https://patchwork.plctlab.org/api/1.2/patches/151607/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-25-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:00","name":"[v17,24/39] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-25-kmatsui@gcc.gnu.org/mbox/"},{"id":151610,"url":"https://patchwork.plctlab.org/api/1.2/patches/151610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-26-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:01","name":"[v17,25/39] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-26-kmatsui@gcc.gnu.org/mbox/"},{"id":151603,"url":"https://patchwork.plctlab.org/api/1.2/patches/151603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-27-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:02","name":"[v17,26/39] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-27-kmatsui@gcc.gnu.org/mbox/"},{"id":151605,"url":"https://patchwork.plctlab.org/api/1.2/patches/151605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-28-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:03","name":"[v17,27/39] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-28-kmatsui@gcc.gnu.org/mbox/"},{"id":151582,"url":"https://patchwork.plctlab.org/api/1.2/patches/151582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-29-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:04","name":"[v17,28/39] c++, libstdc++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-29-kmatsui@gcc.gnu.org/mbox/"},{"id":151611,"url":"https://patchwork.plctlab.org/api/1.2/patches/151611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-30-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:05","name":"[v17,29/39] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-30-kmatsui@gcc.gnu.org/mbox/"},{"id":151606,"url":"https://patchwork.plctlab.org/api/1.2/patches/151606/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-31-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:06","name":"[v17,30/39] c++, libstdc++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-31-kmatsui@gcc.gnu.org/mbox/"},{"id":151602,"url":"https://patchwork.plctlab.org/api/1.2/patches/151602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-32-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:07","name":"[v17,31/39] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-32-kmatsui@gcc.gnu.org/mbox/"},{"id":151598,"url":"https://patchwork.plctlab.org/api/1.2/patches/151598/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-33-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:08","name":"[v17,32/39] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-33-kmatsui@gcc.gnu.org/mbox/"},{"id":151613,"url":"https://patchwork.plctlab.org/api/1.2/patches/151613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-34-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:09","name":"[v17,33/39] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-34-kmatsui@gcc.gnu.org/mbox/"},{"id":151590,"url":"https://patchwork.plctlab.org/api/1.2/patches/151590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-35-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:10","name":"[v17,34/39] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-35-kmatsui@gcc.gnu.org/mbox/"},{"id":151584,"url":"https://patchwork.plctlab.org/api/1.2/patches/151584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-36-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:11","name":"[v17,35/39] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-36-kmatsui@gcc.gnu.org/mbox/"},{"id":151609,"url":"https://patchwork.plctlab.org/api/1.2/patches/151609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-37-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:12","name":"[v17,36/39] c++, libstdc++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-37-kmatsui@gcc.gnu.org/mbox/"},{"id":151600,"url":"https://patchwork.plctlab.org/api/1.2/patches/151600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-38-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:13","name":"[v17,37/39] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-38-kmatsui@gcc.gnu.org/mbox/"},{"id":151578,"url":"https://patchwork.plctlab.org/api/1.2/patches/151578/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-39-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:14","name":"[v17,38/39] c++, libstdc++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-39-kmatsui@gcc.gnu.org/mbox/"},{"id":151589,"url":"https://patchwork.plctlab.org/api/1.2/patches/151589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-40-kmatsui@gcc.gnu.org/","msgid":"<20231011215049.1052142-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-11T21:46:15","name":"[v17,39/39] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011215049.1052142-40-kmatsui@gcc.gnu.org/mbox/"},{"id":151614,"url":"https://patchwork.plctlab.org/api/1.2/patches/151614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com/","msgid":"<04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com>","list_archive_url":null,"date":"2023-10-11T22:26:41","name":"[committed] RISC-V: Adjust long unconditional branch sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04984416-680a-4768-92fb-95daab4c4017@ventanamicro.com/mbox/"},{"id":151629,"url":"https://patchwork.plctlab.org/api/1.2/patches/151629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011232317.5803-1-kito.cheng@sifive.com/","msgid":"<20231011232317.5803-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-11T23:23:17","name":"[committed] RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231011232317.5803-1-kito.cheng@sifive.com/mbox/"},{"id":151639,"url":"https://patchwork.plctlab.org/api/1.2/patches/151639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012015233.2918814-1-pan2.li@intel.com/","msgid":"<20231012015233.2918814-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T01:52:33","name":"[v1] RISC-V: Support FP irintf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012015233.2918814-1-pan2.li@intel.com/mbox/"},{"id":151680,"url":"https://patchwork.plctlab.org/api/1.2/patches/151680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012032825.378244-1-pan2.li@intel.com/","msgid":"<20231012032825.378244-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T03:28:25","name":"[v1] RISC-V: Support FP llrint auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012032825.378244-1-pan2.li@intel.com/mbox/"},{"id":151760,"url":"https://patchwork.plctlab.org/api/1.2/patches/151760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-1-hongtao.liu@intel.com/","msgid":"<20231012060209.4130200-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-12T06:02:08","name":"[1/2] Enable vectorization for V2HF/V4HF rounding operations and sqrt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-1-hongtao.liu@intel.com/mbox/"},{"id":151759,"url":"https://patchwork.plctlab.org/api/1.2/patches/151759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-2-hongtao.liu@intel.com/","msgid":"<20231012060209.4130200-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-12T06:02:09","name":"[2/2] Support 32/64-bit vectorization for conversion between _Float16 and integer/float.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012060209.4130200-2-hongtao.liu@intel.com/mbox/"},{"id":151780,"url":"https://patchwork.plctlab.org/api/1.2/patches/151780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012064137.733900-1-juzhe.zhong@rivai.ai/","msgid":"<20231012064137.733900-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-12T06:41:37","name":"[V2] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012064137.733900-1-juzhe.zhong@rivai.ai/mbox/"},{"id":151792,"url":"https://patchwork.plctlab.org/api/1.2/patches/151792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012070007.22047-1-chenglulu@loongson.cn/","msgid":"<20231012070007.22047-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-10-12T07:00:08","name":"[v2] LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012070007.22047-1-chenglulu@loongson.cn/mbox/"},{"id":151873,"url":"https://patchwork.plctlab.org/api/1.2/patches/151873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSemG6R7RSlzJUnI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-12T07:54:03","name":"libstdc++: Fix tr1/8_c_compatibility/cstdio/functions.cc regression with recent glibc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSemG6R7RSlzJUnI@tucnak/mbox/"},{"id":151815,"url":"https://patchwork.plctlab.org/api/1.2/patches/151815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012082153.E485B385CCA7@sourceware.org/","msgid":"<20231012082153.E485B385CCA7@sourceware.org>","list_archive_url":null,"date":"2023-10-12T08:21:05","name":"tree-optimization/111764 - wrong reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012082153.E485B385CCA7@sourceware.org/mbox/"},{"id":151816,"url":"https://patchwork.plctlab.org/api/1.2/patches/151816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSetIEIRNdLqvikN@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-12T08:24:00","name":"PR target/111778 - Fix undefined shifts in PowerPC compiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSetIEIRNdLqvikN@cowardly-lion.the-meissners.org/mbox/"},{"id":151832,"url":"https://patchwork.plctlab.org/api/1.2/patches/151832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com/","msgid":"<79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T08:42:38","name":"[v8] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79f04438-7473-2b01-d26a-9357ad9318af@linux.ibm.com/mbox/"},{"id":151834,"url":"https://patchwork.plctlab.org/api/1.2/patches/151834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6527b428.170a0220.810bd.457e@mx.google.com/","msgid":"<6527b428.170a0220.810bd.457e@mx.google.com>","list_archive_url":null,"date":"2023-10-12T08:53:55","name":"[v6] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6527b428.170a0220.810bd.457e@mx.google.com/mbox/"},{"id":151835,"url":"https://patchwork.plctlab.org/api/1.2/patches/151835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012085945.1057439-1-pan2.li@intel.com/","msgid":"<20231012085945.1057439-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T08:59:45","name":"[v1] RISC-V: Support FP lround/lroundf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012085945.1057439-1-pan2.li@intel.com/mbox/"},{"id":151837,"url":"https://patchwork.plctlab.org/api/1.2/patches/151837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012090145.196C73856DC8@sourceware.org/","msgid":"<20231012090145.196C73856DC8@sourceware.org>","list_archive_url":null,"date":"2023-10-12T09:01:17","name":"tree-optimization/111773 - avoid CD-DCE of noreturn special calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012090145.196C73856DC8@sourceware.org/mbox/"},{"id":151876,"url":"https://patchwork.plctlab.org/api/1.2/patches/151876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSe/UjWPIHPPUGyw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T09:41:38","name":"reg-notes.def: Fix up description of REG_NOALIAS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSe/UjWPIHPPUGyw@arm.com/mbox/"},{"id":151899,"url":"https://patchwork.plctlab.org/api/1.2/patches/151899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012100525.3355849-1-mary.bennett@embecosm.com/","msgid":"<20231012100525.3355849-1-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-10-12T10:05:25","name":"RISCV: Bugfix for incorrect documentation heading nesting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012100525.3355849-1-mary.bennett@embecosm.com/mbox/"},{"id":151920,"url":"https://patchwork.plctlab.org/api/1.2/patches/151920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012104523.2F2793858281@sourceware.org/","msgid":"<20231012104523.2F2793858281@sourceware.org>","list_archive_url":null,"date":"2023-10-12T10:44:46","name":"tree-optimization/111779 - Handle some BIT_FIELD_REFs in SRA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012104523.2F2793858281@sourceware.org/mbox/"},{"id":151922,"url":"https://patchwork.plctlab.org/api/1.2/patches/151922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae4dd96a-3b88-40dd-838b-cadcbac9d763@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T10:53:19","name":"libgomp.texi: Note to '\''Memory allocation'\'' sect and missing mem-memory routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae4dd96a-3b88-40dd-838b-cadcbac9d763@codesourcery.com/mbox/"},{"id":152003,"url":"https://patchwork.plctlab.org/api/1.2/patches/152003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com/","msgid":"<902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T12:32:53","name":"[v9] Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/902905ff-6cfe-c20a-57a3-b734b7be13f9@linux.ibm.com/mbox/"},{"id":152005,"url":"https://patchwork.plctlab.org/api/1.2/patches/152005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com/","msgid":"<4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com>","list_archive_url":null,"date":"2023-10-12T12:35:36","name":"[v9] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f7c0c8d-f16c-2fe8-c2e0-2ef4ef01c735@linux.ibm.com/mbox/"},{"id":152009,"url":"https://patchwork.plctlab.org/api/1.2/patches/152009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012130644.561301-1-christoph.muellner@vrull.eu/","msgid":"<20231012130644.561301-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-12T13:06:44","name":"[v2] RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012130644.561301-1-christoph.muellner@vrull.eu/mbox/"},{"id":152015,"url":"https://patchwork.plctlab.org/api/1.2/patches/152015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4e22a9c-1917-d868-9171-866c6625888a@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-10-12T13:38:52","name":"[avr,committed] Implement atan2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e4e22a9c-1917-d868-9171-866c6625888a@gjlay.de/mbox/"},{"id":152022,"url":"https://patchwork.plctlab.org/api/1.2/patches/152022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012141711.1303539-1-pan2.li@intel.com/","msgid":"<20231012141711.1303539-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-12T14:17:11","name":"[v1] RISC-V: Support FP lceil/lceilf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012141711.1303539-1-pan2.li@intel.com/mbox/"},{"id":152024,"url":"https://patchwork.plctlab.org/api/1.2/patches/152024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17819-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T14:24:05","name":"[5/6] AArch64: Fix Armv9-a warnings that get emitted whenever a ACLE header is used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17819-tamar@arm.com/mbox/"},{"id":152036,"url":"https://patchwork.plctlab.org/api/1.2/patches/152036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSgQeSv80fEpkeFW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-12T15:27:53","name":"[committed] wide-int: Fix build with gcc < 12 or clang++ [PR111787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSgQeSv80fEpkeFW@tucnak/mbox/"},{"id":152056,"url":"https://patchwork.plctlab.org/api/1.2/patches/152056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com/","msgid":"<2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com>","list_archive_url":null,"date":"2023-10-12T16:37:00","name":"libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2111df82-33ad-4165-8516-f9107de0fbf0@codesourcery.com/mbox/"},{"id":152117,"url":"https://patchwork.plctlab.org/api/1.2/patches/152117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012184029.21114-1-kito.cheng@sifive.com/","msgid":"<20231012184029.21114-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-10-12T18:40:29","name":"[v2] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012184029.21114-1-kito.cheng@sifive.com/mbox/"},{"id":152183,"url":"https://patchwork.plctlab.org/api/1.2/patches/152183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0f7bdc-d236-4f5b-9504-d5bfb215d023@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-12T20:45:23","name":"genemit: Split insn-emit.cc into ten files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de0f7bdc-d236-4f5b-9504-d5bfb215d023@gmail.com/mbox/"},{"id":152188,"url":"https://patchwork.plctlab.org/api/1.2/patches/152188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012210426.755503-1-polacek@redhat.com/","msgid":"<20231012210426.755503-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-12T21:04:26","name":"c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231012210426.755503-1-polacek@redhat.com/mbox/"},{"id":152243,"url":"https://patchwork.plctlab.org/api/1.2/patches/152243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013013803.3680171-1-pan2.li@intel.com/","msgid":"<20231013013803.3680171-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T01:38:03","name":"[v1] RISC-V: Support FP lfloor/lfloorf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013013803.3680171-1-pan2.li@intel.com/mbox/"},{"id":152255,"url":"https://patchwork.plctlab.org/api/1.2/patches/152255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013022224.3837020-1-pan2.li@intel.com/","msgid":"<20231013022224.3837020-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T02:22:24","name":"[v1] RISC-V: Leverage stdint-gcc.h for RVV test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013022224.3837020-1-pan2.li@intel.com/mbox/"},{"id":152307,"url":"https://patchwork.plctlab.org/api/1.2/patches/152307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013042926.201415-1-juzhe.zhong@rivai.ai/","msgid":"<20231013042926.201415-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T04:29:26","name":"[V3] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013042926.201415-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152311,"url":"https://patchwork.plctlab.org/api/1.2/patches/152311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013053347.1530185-1-pan2.li@intel.com/","msgid":"<20231013053347.1530185-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T05:33:47","name":"[v1] RISC-V: Add test for FP iroundf auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013053347.1530185-1-pan2.li@intel.com/mbox/"},{"id":152315,"url":"https://patchwork.plctlab.org/api/1.2/patches/152315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013054519.461486-1-juzhe.zhong@rivai.ai/","msgid":"<20231013054519.461486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T05:45:19","name":"RISC-V Regression: Fix FAIL of bb-slp-pr69907.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013054519.461486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152320,"url":"https://patchwork.plctlab.org/api/1.2/patches/152320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013060126.503655-1-juzhe.zhong@rivai.ai/","msgid":"<20231013060126.503655-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-13T06:01:26","name":"RISC-V Regression: Fix FAIL of bb-slp-68.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013060126.503655-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152331,"url":"https://patchwork.plctlab.org/api/1.2/patches/152331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013061522.1647330-1-pan2.li@intel.com/","msgid":"<20231013061522.1647330-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T06:15:22","name":"[v1] RISC-V: Add test for FP llround auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013061522.1647330-1-pan2.li@intel.com/mbox/"},{"id":152352,"url":"https://patchwork.plctlab.org/api/1.2/patches/152352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013072027.1687701-1-pan2.li@intel.com/","msgid":"<20231013072027.1687701-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T07:20:27","name":"[v1] RISC-V: Add test for FP llceil auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013072027.1687701-1-pan2.li@intel.com/mbox/"},{"id":152354,"url":"https://patchwork.plctlab.org/api/1.2/patches/152354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSjw33JtzEa4fWkt@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-13T07:25:19","name":"middle-end: Allow _BitInt(65535) [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSjw33JtzEa4fWkt@tucnak/mbox/"},{"id":152375,"url":"https://patchwork.plctlab.org/api/1.2/patches/152375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013080643.1813480-1-pan2.li@intel.com/","msgid":"<20231013080643.1813480-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T08:06:43","name":"[v1] RISC-V: Add test for FP iceil auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013080643.1813480-1-pan2.li@intel.com/mbox/"},{"id":152380,"url":"https://patchwork.plctlab.org/api/1.2/patches/152380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013082336.1845369-1-pan2.li@intel.com/","msgid":"<20231013082336.1845369-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T08:23:36","name":"[v1] RISC-V: Add test for FP ifloor auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013082336.1845369-1-pan2.li@intel.com/mbox/"},{"id":152445,"url":"https://patchwork.plctlab.org/api/1.2/patches/152445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4bf18e0-cf23-7915-30aa-7bef24593d68@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T09:32:45","name":"PATCH-1v3, expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c4bf18e0-cf23-7915-30aa-7bef24593d68@linux.ibm.com/mbox/"},{"id":152446,"url":"https://patchwork.plctlab.org/api/1.2/patches/152446/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSkPSjC21gLSx2mI@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-13T09:35:06","name":"middle-end, v2: Allow _BitInt(65535) [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSkPSjC21gLSx2mI@tucnak/mbox/"},{"id":152468,"url":"https://patchwork.plctlab.org/api/1.2/patches/152468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013094956.1888999-1-pan2.li@intel.com/","msgid":"<20231013094956.1888999-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T09:49:56","name":"[v1] RISC-V: Add test for FP llfloor auto vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013094956.1888999-1-pan2.li@intel.com/mbox/"},{"id":152469,"url":"https://patchwork.plctlab.org/api/1.2/patches/152469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013095247.BEA251358F@imap2.suse-dmz.suse.de/","msgid":"<20231013095247.BEA251358F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-13T09:52:37","name":"Add support for SLP vectorization of OpenMP SIMD clone calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013095247.BEA251358F@imap2.suse-dmz.suse.de/mbox/"},{"id":152510,"url":"https://patchwork.plctlab.org/api/1.2/patches/152510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013113541.1954338-1-pan2.li@intel.com/","msgid":"<20231013113541.1954338-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-13T11:35:41","name":"[v1] RISC-V: Refine run test cases of math autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013113541.1954338-1-pan2.li@intel.com/mbox/"},{"id":152553,"url":"https://patchwork.plctlab.org/api/1.2/patches/152553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de/","msgid":"<20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-13T12:00:55","name":"OMP SIMD inbranch call vectorization for AVX512 style masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013120056.6C3FF1358F@imap2.suse-dmz.suse.de/mbox/"},{"id":152581,"url":"https://patchwork.plctlab.org/api/1.2/patches/152581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/72519953-7b2c-5156-485d-75904da5a90a@redhat.com/","msgid":"<72519953-7b2c-5156-485d-75904da5a90a@redhat.com>","list_archive_url":null,"date":"2023-10-13T13:24:24","name":"[COMMITTED,GCC13] PR tree-optimization/111622 - Do not add partial equivalences with no uses.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/72519953-7b2c-5156-485d-75904da5a90a@redhat.com/mbox/"},{"id":152700,"url":"https://patchwork.plctlab.org/api/1.2/patches/152700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSmSDSf6kFZcyjKH@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T18:53:01","name":"[v2] c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSmSDSf6kFZcyjKH@redhat.com/mbox/"},{"id":152737,"url":"https://patchwork.plctlab.org/api/1.2/patches/152737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-2-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:57","name":"[v18,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-2-kmatsui@gcc.gnu.org/mbox/"},{"id":152738,"url":"https://patchwork.plctlab.org/api/1.2/patches/152738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-3-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:58","name":"[v18,02/40] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-3-kmatsui@gcc.gnu.org/mbox/"},{"id":152739,"url":"https://patchwork.plctlab.org/api/1.2/patches/152739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-4-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:03:59","name":"[v18,03/40] c++: Accept the use of non-function-like built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-4-kmatsui@gcc.gnu.org/mbox/"},{"id":152740,"url":"https://patchwork.plctlab.org/api/1.2/patches/152740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-5-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:00","name":"[v18,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-5-kmatsui@gcc.gnu.org/mbox/"},{"id":152743,"url":"https://patchwork.plctlab.org/api/1.2/patches/152743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-6-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:01","name":"[v18,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-6-kmatsui@gcc.gnu.org/mbox/"},{"id":152742,"url":"https://patchwork.plctlab.org/api/1.2/patches/152742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-7-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:02","name":"[v18,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-7-kmatsui@gcc.gnu.org/mbox/"},{"id":152741,"url":"https://patchwork.plctlab.org/api/1.2/patches/152741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-8-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:03","name":"[v18,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-8-kmatsui@gcc.gnu.org/mbox/"},{"id":152746,"url":"https://patchwork.plctlab.org/api/1.2/patches/152746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-9-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:04","name":"[v18,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-9-kmatsui@gcc.gnu.org/mbox/"},{"id":152747,"url":"https://patchwork.plctlab.org/api/1.2/patches/152747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-10-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:05","name":"[v18,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-10-kmatsui@gcc.gnu.org/mbox/"},{"id":152745,"url":"https://patchwork.plctlab.org/api/1.2/patches/152745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-11-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:06","name":"[v18,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-11-kmatsui@gcc.gnu.org/mbox/"},{"id":152749,"url":"https://patchwork.plctlab.org/api/1.2/patches/152749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-12-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:07","name":"[v18,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-12-kmatsui@gcc.gnu.org/mbox/"},{"id":152748,"url":"https://patchwork.plctlab.org/api/1.2/patches/152748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-13-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:08","name":"[v18,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-13-kmatsui@gcc.gnu.org/mbox/"},{"id":152750,"url":"https://patchwork.plctlab.org/api/1.2/patches/152750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-14-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:09","name":"[v18,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-14-kmatsui@gcc.gnu.org/mbox/"},{"id":152751,"url":"https://patchwork.plctlab.org/api/1.2/patches/152751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-15-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:10","name":"[v18,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-15-kmatsui@gcc.gnu.org/mbox/"},{"id":152753,"url":"https://patchwork.plctlab.org/api/1.2/patches/152753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-16-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:11","name":"[v18,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-16-kmatsui@gcc.gnu.org/mbox/"},{"id":152752,"url":"https://patchwork.plctlab.org/api/1.2/patches/152752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-17-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:12","name":"[v18,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-17-kmatsui@gcc.gnu.org/mbox/"},{"id":152754,"url":"https://patchwork.plctlab.org/api/1.2/patches/152754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-18-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:13","name":"[v18,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-18-kmatsui@gcc.gnu.org/mbox/"},{"id":152756,"url":"https://patchwork.plctlab.org/api/1.2/patches/152756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-19-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:14","name":"[v18,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-19-kmatsui@gcc.gnu.org/mbox/"},{"id":152755,"url":"https://patchwork.plctlab.org/api/1.2/patches/152755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-20-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:15","name":"[v18,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-20-kmatsui@gcc.gnu.org/mbox/"},{"id":152758,"url":"https://patchwork.plctlab.org/api/1.2/patches/152758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-21-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:16","name":"[v18,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-21-kmatsui@gcc.gnu.org/mbox/"},{"id":152757,"url":"https://patchwork.plctlab.org/api/1.2/patches/152757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-22-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:17","name":"[v18,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-22-kmatsui@gcc.gnu.org/mbox/"},{"id":152759,"url":"https://patchwork.plctlab.org/api/1.2/patches/152759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-23-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:18","name":"[v18,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-23-kmatsui@gcc.gnu.org/mbox/"},{"id":152760,"url":"https://patchwork.plctlab.org/api/1.2/patches/152760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-24-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:19","name":"[v18,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-24-kmatsui@gcc.gnu.org/mbox/"},{"id":152763,"url":"https://patchwork.plctlab.org/api/1.2/patches/152763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-25-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:20","name":"[v18,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-25-kmatsui@gcc.gnu.org/mbox/"},{"id":152762,"url":"https://patchwork.plctlab.org/api/1.2/patches/152762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-26-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:21","name":"[v18,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-26-kmatsui@gcc.gnu.org/mbox/"},{"id":152764,"url":"https://patchwork.plctlab.org/api/1.2/patches/152764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-27-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:22","name":"[v18,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-27-kmatsui@gcc.gnu.org/mbox/"},{"id":152765,"url":"https://patchwork.plctlab.org/api/1.2/patches/152765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-28-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:23","name":"[v18,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-28-kmatsui@gcc.gnu.org/mbox/"},{"id":152766,"url":"https://patchwork.plctlab.org/api/1.2/patches/152766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-29-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:24","name":"[v18,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-29-kmatsui@gcc.gnu.org/mbox/"},{"id":152768,"url":"https://patchwork.plctlab.org/api/1.2/patches/152768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-30-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:25","name":"[v18,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-30-kmatsui@gcc.gnu.org/mbox/"},{"id":152769,"url":"https://patchwork.plctlab.org/api/1.2/patches/152769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-31-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:26","name":"[v18,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-31-kmatsui@gcc.gnu.org/mbox/"},{"id":152770,"url":"https://patchwork.plctlab.org/api/1.2/patches/152770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-32-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:27","name":"[v18,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-32-kmatsui@gcc.gnu.org/mbox/"},{"id":152771,"url":"https://patchwork.plctlab.org/api/1.2/patches/152771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-33-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:28","name":"[v18,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-33-kmatsui@gcc.gnu.org/mbox/"},{"id":152772,"url":"https://patchwork.plctlab.org/api/1.2/patches/152772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-34-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:29","name":"[v18,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-34-kmatsui@gcc.gnu.org/mbox/"},{"id":152774,"url":"https://patchwork.plctlab.org/api/1.2/patches/152774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-35-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:30","name":"[v18,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-35-kmatsui@gcc.gnu.org/mbox/"},{"id":152773,"url":"https://patchwork.plctlab.org/api/1.2/patches/152773/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-36-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:31","name":"[v18,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-36-kmatsui@gcc.gnu.org/mbox/"},{"id":152775,"url":"https://patchwork.plctlab.org/api/1.2/patches/152775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-37-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:32","name":"[v18,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-37-kmatsui@gcc.gnu.org/mbox/"},{"id":152776,"url":"https://patchwork.plctlab.org/api/1.2/patches/152776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-38-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:33","name":"[v18,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-38-kmatsui@gcc.gnu.org/mbox/"},{"id":152777,"url":"https://patchwork.plctlab.org/api/1.2/patches/152777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-39-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:34","name":"[v18,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-39-kmatsui@gcc.gnu.org/mbox/"},{"id":152778,"url":"https://patchwork.plctlab.org/api/1.2/patches/152778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-40-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:35","name":"[v18,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-40-kmatsui@gcc.gnu.org/mbox/"},{"id":152779,"url":"https://patchwork.plctlab.org/api/1.2/patches/152779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-41-kmatsui@gcc.gnu.org/","msgid":"<20231013211206.1215663-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T21:04:36","name":"[v18,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013211206.1215663-41-kmatsui@gcc.gnu.org/mbox/"},{"id":152761,"url":"https://patchwork.plctlab.org/api/1.2/patches/152761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013212840.GA21815@ldh-imac.local/","msgid":"<20231013212840.GA21815@ldh-imac.local>","list_archive_url":null,"date":"2023-10-13T21:28:40","name":"ping: [PATCH] preprocessor: c++: Support `#pragma GCC target'\'' macros [PR87299]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013212840.GA21815@ldh-imac.local/mbox/"},{"id":152789,"url":"https://patchwork.plctlab.org/api/1.2/patches/152789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013221552.518072-1-polacek@redhat.com/","msgid":"<20231013221552.518072-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-13T22:15:52","name":"c++: fix truncated diagnostic in C++23 [PR111272]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013221552.518072-1-polacek@redhat.com/mbox/"},{"id":152792,"url":"https://patchwork.plctlab.org/api/1.2/patches/152792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-2-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:15","name":"[v19,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-2-kmatsui@gcc.gnu.org/mbox/"},{"id":152793,"url":"https://patchwork.plctlab.org/api/1.2/patches/152793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-3-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:16","name":"[v19,02/40] c-family, c++: Look up built-in traits through gperf","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-3-kmatsui@gcc.gnu.org/mbox/"},{"id":152794,"url":"https://patchwork.plctlab.org/api/1.2/patches/152794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-4-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:17","name":"[v19,03/40] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-4-kmatsui@gcc.gnu.org/mbox/"},{"id":152842,"url":"https://patchwork.plctlab.org/api/1.2/patches/152842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-5-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:18","name":"[v19,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-5-kmatsui@gcc.gnu.org/mbox/"},{"id":152799,"url":"https://patchwork.plctlab.org/api/1.2/patches/152799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-6-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:19","name":"[v19,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-6-kmatsui@gcc.gnu.org/mbox/"},{"id":152850,"url":"https://patchwork.plctlab.org/api/1.2/patches/152850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-7-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:20","name":"[v19,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-7-kmatsui@gcc.gnu.org/mbox/"},{"id":152804,"url":"https://patchwork.plctlab.org/api/1.2/patches/152804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-8-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:21","name":"[v19,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-8-kmatsui@gcc.gnu.org/mbox/"},{"id":152803,"url":"https://patchwork.plctlab.org/api/1.2/patches/152803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-9-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:22","name":"[v19,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-9-kmatsui@gcc.gnu.org/mbox/"},{"id":152846,"url":"https://patchwork.plctlab.org/api/1.2/patches/152846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-10-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:23","name":"[v19,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-10-kmatsui@gcc.gnu.org/mbox/"},{"id":152857,"url":"https://patchwork.plctlab.org/api/1.2/patches/152857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-11-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:24","name":"[v19,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-11-kmatsui@gcc.gnu.org/mbox/"},{"id":152801,"url":"https://patchwork.plctlab.org/api/1.2/patches/152801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-12-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:25","name":"[v19,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-12-kmatsui@gcc.gnu.org/mbox/"},{"id":152805,"url":"https://patchwork.plctlab.org/api/1.2/patches/152805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-13-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:26","name":"[v19,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-13-kmatsui@gcc.gnu.org/mbox/"},{"id":152813,"url":"https://patchwork.plctlab.org/api/1.2/patches/152813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-14-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:27","name":"[v19,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-14-kmatsui@gcc.gnu.org/mbox/"},{"id":152852,"url":"https://patchwork.plctlab.org/api/1.2/patches/152852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-15-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:28","name":"[v19,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-15-kmatsui@gcc.gnu.org/mbox/"},{"id":152827,"url":"https://patchwork.plctlab.org/api/1.2/patches/152827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-16-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:29","name":"[v19,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-16-kmatsui@gcc.gnu.org/mbox/"},{"id":152834,"url":"https://patchwork.plctlab.org/api/1.2/patches/152834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-17-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:30","name":"[v19,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-17-kmatsui@gcc.gnu.org/mbox/"},{"id":152807,"url":"https://patchwork.plctlab.org/api/1.2/patches/152807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-18-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:31","name":"[v19,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-18-kmatsui@gcc.gnu.org/mbox/"},{"id":152809,"url":"https://patchwork.plctlab.org/api/1.2/patches/152809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-19-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:32","name":"[v19,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-19-kmatsui@gcc.gnu.org/mbox/"},{"id":152853,"url":"https://patchwork.plctlab.org/api/1.2/patches/152853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-20-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:33","name":"[v19,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-20-kmatsui@gcc.gnu.org/mbox/"},{"id":152841,"url":"https://patchwork.plctlab.org/api/1.2/patches/152841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-21-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:34","name":"[v19,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-21-kmatsui@gcc.gnu.org/mbox/"},{"id":152802,"url":"https://patchwork.plctlab.org/api/1.2/patches/152802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-22-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:35","name":"[v19,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-22-kmatsui@gcc.gnu.org/mbox/"},{"id":152854,"url":"https://patchwork.plctlab.org/api/1.2/patches/152854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-23-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:36","name":"[v19,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-23-kmatsui@gcc.gnu.org/mbox/"},{"id":152806,"url":"https://patchwork.plctlab.org/api/1.2/patches/152806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-24-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:37","name":"[v19,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-24-kmatsui@gcc.gnu.org/mbox/"},{"id":152825,"url":"https://patchwork.plctlab.org/api/1.2/patches/152825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-25-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:38","name":"[v19,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-25-kmatsui@gcc.gnu.org/mbox/"},{"id":152800,"url":"https://patchwork.plctlab.org/api/1.2/patches/152800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-26-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:39","name":"[v19,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-26-kmatsui@gcc.gnu.org/mbox/"},{"id":152810,"url":"https://patchwork.plctlab.org/api/1.2/patches/152810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-27-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:40","name":"[v19,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-27-kmatsui@gcc.gnu.org/mbox/"},{"id":152837,"url":"https://patchwork.plctlab.org/api/1.2/patches/152837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-28-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:41","name":"[v19,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-28-kmatsui@gcc.gnu.org/mbox/"},{"id":152795,"url":"https://patchwork.plctlab.org/api/1.2/patches/152795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-29-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:42","name":"[v19,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-29-kmatsui@gcc.gnu.org/mbox/"},{"id":152856,"url":"https://patchwork.plctlab.org/api/1.2/patches/152856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-30-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:43","name":"[v19,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-30-kmatsui@gcc.gnu.org/mbox/"},{"id":152840,"url":"https://patchwork.plctlab.org/api/1.2/patches/152840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-31-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:44","name":"[v19,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-31-kmatsui@gcc.gnu.org/mbox/"},{"id":152808,"url":"https://patchwork.plctlab.org/api/1.2/patches/152808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-32-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:45","name":"[v19,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-32-kmatsui@gcc.gnu.org/mbox/"},{"id":152847,"url":"https://patchwork.plctlab.org/api/1.2/patches/152847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-33-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:46","name":"[v19,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-33-kmatsui@gcc.gnu.org/mbox/"},{"id":152844,"url":"https://patchwork.plctlab.org/api/1.2/patches/152844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-34-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:47","name":"[v19,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-34-kmatsui@gcc.gnu.org/mbox/"},{"id":152851,"url":"https://patchwork.plctlab.org/api/1.2/patches/152851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-35-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:48","name":"[v19,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-35-kmatsui@gcc.gnu.org/mbox/"},{"id":152839,"url":"https://patchwork.plctlab.org/api/1.2/patches/152839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-36-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:49","name":"[v19,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-36-kmatsui@gcc.gnu.org/mbox/"},{"id":152796,"url":"https://patchwork.plctlab.org/api/1.2/patches/152796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-37-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:50","name":"[v19,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-37-kmatsui@gcc.gnu.org/mbox/"},{"id":152849,"url":"https://patchwork.plctlab.org/api/1.2/patches/152849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-38-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:51","name":"[v19,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-38-kmatsui@gcc.gnu.org/mbox/"},{"id":152797,"url":"https://patchwork.plctlab.org/api/1.2/patches/152797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-39-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:52","name":"[v19,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-39-kmatsui@gcc.gnu.org/mbox/"},{"id":152798,"url":"https://patchwork.plctlab.org/api/1.2/patches/152798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-40-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:53","name":"[v19,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-40-kmatsui@gcc.gnu.org/mbox/"},{"id":152848,"url":"https://patchwork.plctlab.org/api/1.2/patches/152848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-41-kmatsui@gcc.gnu.org/","msgid":"<20231013223957.1634024-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-13T22:37:54","name":"[v19,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231013223957.1634024-41-kmatsui@gcc.gnu.org/mbox/"},{"id":152867,"url":"https://patchwork.plctlab.org/api/1.2/patches/152867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+fa515rWJR1LcL6ad-GBBBLGqmv0b1fwA=DVbK4sRZ7Ng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-13T23:32:59","name":"libstdc++: Workaround for LLVM-61763 in ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+fa515rWJR1LcL6ad-GBBBLGqmv0b1fwA=DVbK4sRZ7Ng@mail.gmail.com/mbox/"},{"id":152860,"url":"https://patchwork.plctlab.org/api/1.2/patches/152860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSnVmfS6Mi4n6V7C@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-13T23:41:13","name":"Power10: Add options to disable load and store vector pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSnVmfS6Mi4n6V7C@cowardly-lion.the-meissners.org/mbox/"},{"id":152868,"url":"https://patchwork.plctlab.org/api/1.2/patches/152868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014005713.2702564-1-pinskia@gmail.com/","msgid":"<20231014005713.2702564-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-14T00:57:13","name":"MATCH: [PR111432] Simplify `a & (x | CST)` to a when we know that (a & ~CST) == 0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014005713.2702564-1-pinskia@gmail.com/mbox/"},{"id":152886,"url":"https://patchwork.plctlab.org/api/1.2/patches/152886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014030602.3813735-1-juzhe.zhong@rivai.ai/","msgid":"<20231014030602.3813735-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-14T03:06:02","name":"[Committed] RISC-V: Remove redundant iterators.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014030602.3813735-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152915,"url":"https://patchwork.plctlab.org/api/1.2/patches/152915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpPVW+zyc9egEwc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-14T08:20:37","name":"wide-int: Fix estimation of buffer sizes for wide_int printing [PR111800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpPVW+zyc9egEwc@tucnak/mbox/"},{"id":152923,"url":"https://patchwork.plctlab.org/api/1.2/patches/152923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpkVdv/G5isFzXv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-14T09:50:13","name":"wide-int, v2: Fix estimation of buffer sizes for wide_int printing [PR111800]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZSpkVdv/G5isFzXv@tucnak/mbox/"},{"id":152939,"url":"https://patchwork.plctlab.org/api/1.2/patches/152939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122352.1665945-1-ibuclaw@gdcproject.org/","msgid":"<20231014122352.1665945-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-14T12:23:52","name":"[committed] d: Reduce code duplication of writing generated files.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122352.1665945-1-ibuclaw@gdcproject.org/mbox/"},{"id":152940,"url":"https://patchwork.plctlab.org/api/1.2/patches/152940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122601.1667638-1-ibuclaw@gdcproject.org/","msgid":"<20231014122601.1667638-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-14T12:26:01","name":"[committed] Fix ICE in set_cell_span, at text-art/table.cc:148 with D front-end and -fanalyzer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231014122601.1667638-1-ibuclaw@gdcproject.org/mbox/"},{"id":152941,"url":"https://patchwork.plctlab.org/api/1.2/patches/152941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at/","msgid":"<8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at>","list_archive_url":null,"date":"2023-10-14T12:28:30","name":"[C] error for function with external and internal linkage [PR111708]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8642fb1392c8e74c436feaf2b2f4e1d3641530eb.camel@tugraz.at/mbox/"},{"id":152954,"url":"https://patchwork.plctlab.org/api/1.2/patches/152954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com/","msgid":"<716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com>","list_archive_url":null,"date":"2023-10-14T19:38:44","name":"[committed] libgomp.fortran/allocate-6.f90: Run with -fdump-tree-gimple (was: [Patch] OpenMP: Add ME support for '\''omp allocate'\'' stack variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/716c6c93-7ec5-465a-8505-25368e02056b@codesourcery.com/mbox/"},{"id":152956,"url":"https://patchwork.plctlab.org/api/1.2/patches/152956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com/","msgid":"<507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com>","list_archive_url":null,"date":"2023-10-14T19:43:14","name":"libgomp.texi: Update \"Enabling OpenMP\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/507d6d48-1ca1-411a-a95d-45adb7a8f446@codesourcery.com/mbox/"},{"id":152957,"url":"https://patchwork.plctlab.org/api/1.2/patches/152957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f10a9a67-1e27-4c1e-a8c9-052685a02103@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-14T19:51:43","name":"libgomp.texi: Improve \"OpenACC Environment Variables\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f10a9a67-1e27-4c1e-a8c9-052685a02103@codesourcery.com/mbox/"},{"id":152972,"url":"https://patchwork.plctlab.org/api/1.2/patches/152972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com/","msgid":"<01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-14T22:14:29","name":"PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01f701d9feeb$ce8654e0$6b92fea0$@nextmovesoftware.com/mbox/"},{"id":152976,"url":"https://patchwork.plctlab.org/api/1.2/patches/152976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com/","msgid":"<020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-14T23:32:58","name":"Improved RTL expansion of 1LL << x.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/020d01d9fef6$c4fff920$4effeb60$@nextmovesoftware.com/mbox/"},{"id":152981,"url":"https://patchwork.plctlab.org/api/1.2/patches/152981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-1-pinskia@gmail.com/","msgid":"<20231015011648.1608638-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T01:16:47","name":"[1/2] Fix ICE due to c_safe_arg_type_equiv_p not checking for error_mark node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-1-pinskia@gmail.com/mbox/"},{"id":152980,"url":"https://patchwork.plctlab.org/api/1.2/patches/152980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-2-pinskia@gmail.com/","msgid":"<20231015011648.1608638-2-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T01:16:48","name":"[2/2,c] Fix PR 101364: ICE after error due to diagnose_arglist_conflict not checking for error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015011648.1608638-2-pinskia@gmail.com/mbox/"},{"id":152982,"url":"https://patchwork.plctlab.org/api/1.2/patches/152982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015030831.3921333-1-juzhe.zhong@rivai.ai/","msgid":"<20231015030831.3921333-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-15T03:08:31","name":"[Committed] RISC-V: Fix vsingle attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015030831.3921333-1-juzhe.zhong@rivai.ai/mbox/"},{"id":152995,"url":"https://patchwork.plctlab.org/api/1.2/patches/152995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com/","msgid":"<3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com>","list_archive_url":null,"date":"2023-10-15T10:39:50","name":"libgomp.texi: Use present not future tense (was: [Patch] libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3af1faed-9d02-4703-b60e-d2d1a721affc@codesourcery.com/mbox/"},{"id":152996,"url":"https://patchwork.plctlab.org/api/1.2/patches/152996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com/","msgid":"<7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com>","list_archive_url":null,"date":"2023-10-15T10:42:31","name":"libgomp.texi: Update \"Enabling OpenMP\" + OpenACC / invoke.texi: -fopenacc/-fopenmp update (was: Re: [patch] libgomp.texi: Update \"Enabling OpenMP\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ad5aa88-5e52-490c-b414-f5d1430e5f18@codesourcery.com/mbox/"},{"id":153006,"url":"https://patchwork.plctlab.org/api/1.2/patches/153006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com/","msgid":"<9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:11:45","name":"[PING,^0,v3] rs6000: fmr gets used instead of faster xxlor [PR93571]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9fd263b5-e500-4d38-89d0-f1ea309de2d8@linux.ibm.com/mbox/"},{"id":153007,"url":"https://patchwork.plctlab.org/api/1.2/patches/153007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com/","msgid":"<9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:13:24","name":"[PING,^0,v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9bab1f7d-58fc-4c87-8306-ca54893f2145@linux.ibm.com/mbox/"},{"id":153008,"url":"https://patchwork.plctlab.org/api/1.2/patches/153008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com/","msgid":"<316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:43:40","name":"[PING,^0,v8,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/316ff561-2180-4cc6-8675-b6e27623d6d9@linux.ibm.com/mbox/"},{"id":153009,"url":"https://patchwork.plctlab.org/api/1.2/patches/153009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com/","msgid":"<10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com>","list_archive_url":null,"date":"2023-10-15T12:58:51","name":"[PING,^0,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10b5f1a3-4f89-4b59-b4a1-b7fdebbf9149@linux.ibm.com/mbox/"},{"id":153022,"url":"https://patchwork.plctlab.org/api/1.2/patches/153022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144052.50FF533ED2@hamza.pair.com/","msgid":"<20231015144052.50FF533ED2@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T14:40:49","name":"[pushed] wwwdocs: conduct: Link creativecommons.org via https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144052.50FF533ED2@hamza.pair.com/mbox/"},{"id":153023,"url":"https://patchwork.plctlab.org/api/1.2/patches/153023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144207.F0A8F33ED2@hamza.pair.com/","msgid":"<20231015144207.F0A8F33ED2@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T14:42:06","name":"[pushed] wwwdocs: gcc-9: Editorial changes to porting_to.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015144207.F0A8F33ED2@hamza.pair.com/mbox/"},{"id":153039,"url":"https://patchwork.plctlab.org/api/1.2/patches/153039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015165629.19722-1-vapier@gentoo.org/","msgid":"<20231015165629.19722-1-vapier@gentoo.org>","list_archive_url":null,"date":"2023-10-15T16:56:29","name":"[PATCH/committed] sim: add distclean dep for gnulib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015165629.19722-1-vapier@gentoo.org/mbox/"},{"id":153048,"url":"https://patchwork.plctlab.org/api/1.2/patches/153048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015181644.886680-1-vineetg@rivosinc.com/","msgid":"<20231015181644.886680-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-15T18:16:44","name":"RISC-V/testsuite: add a default march (lacking zfa) to some fp tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015181644.886680-1-vineetg@rivosinc.com/mbox/"},{"id":153074,"url":"https://patchwork.plctlab.org/api/1.2/patches/153074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214241.B37BB33EB9@hamza.pair.com/","msgid":"<20231015214241.B37BB33EB9@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T21:42:39","name":"[pushed] wwwdocs: *: Remove unused buildstat pages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214241.B37BB33EB9@hamza.pair.com/mbox/"},{"id":153075,"url":"https://patchwork.plctlab.org/api/1.2/patches/153075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214627.3470F33ECF@hamza.pair.com/","msgid":"<20231015214627.3470F33ECF@hamza.pair.com>","list_archive_url":null,"date":"2023-10-15T21:46:25","name":"[pushed] wwwdocs: buildstat: Don'\''t reference buildstats we no longer carry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015214627.3470F33ECF@hamza.pair.com/mbox/"},{"id":153076,"url":"https://patchwork.plctlab.org/api/1.2/patches/153076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015215956.512326-1-pinskia@gmail.com/","msgid":"<20231015215956.512326-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-15T21:59:56","name":"MATCH: Improve `A CMP 0 ? A : -A` set of patterns to use bitwise_equal_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231015215956.512326-1-pinskia@gmail.com/mbox/"},{"id":153078,"url":"https://patchwork.plctlab.org/api/1.2/patches/153078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016000138.2235395-1-pinskia@gmail.com/","msgid":"<20231016000138.2235395-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-16T00:01:38","name":"Improve factor_out_conditional_operation for conversions and constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016000138.2235395-1-pinskia@gmail.com/mbox/"},{"id":153079,"url":"https://patchwork.plctlab.org/api/1.2/patches/153079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-2-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:45","name":"[v20,01/40] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-2-kmatsui@gcc.gnu.org/mbox/"},{"id":153081,"url":"https://patchwork.plctlab.org/api/1.2/patches/153081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-3-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:46","name":"[v20,02/40] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-3-kmatsui@gcc.gnu.org/mbox/"},{"id":153083,"url":"https://patchwork.plctlab.org/api/1.2/patches/153083/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-4-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:47","name":"[v20,03/40] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-4-kmatsui@gcc.gnu.org/mbox/"},{"id":153116,"url":"https://patchwork.plctlab.org/api/1.2/patches/153116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-5-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:48","name":"[v20,04/40] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-5-kmatsui@gcc.gnu.org/mbox/"},{"id":153088,"url":"https://patchwork.plctlab.org/api/1.2/patches/153088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-6-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:49","name":"[v20,05/40] libstdc++: Optimize is_const trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-6-kmatsui@gcc.gnu.org/mbox/"},{"id":153095,"url":"https://patchwork.plctlab.org/api/1.2/patches/153095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-7-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:50","name":"[v20,06/40] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-7-kmatsui@gcc.gnu.org/mbox/"},{"id":153117,"url":"https://patchwork.plctlab.org/api/1.2/patches/153117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-8-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:51","name":"[v20,07/40] libstdc++: Optimize is_volatile trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-8-kmatsui@gcc.gnu.org/mbox/"},{"id":153099,"url":"https://patchwork.plctlab.org/api/1.2/patches/153099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-9-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:52","name":"[v20,08/40] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-9-kmatsui@gcc.gnu.org/mbox/"},{"id":153100,"url":"https://patchwork.plctlab.org/api/1.2/patches/153100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-10-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:53","name":"[v20,09/40] libstdc++: Optimize is_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-10-kmatsui@gcc.gnu.org/mbox/"},{"id":153087,"url":"https://patchwork.plctlab.org/api/1.2/patches/153087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-11-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:54","name":"[v20,10/40] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-11-kmatsui@gcc.gnu.org/mbox/"},{"id":153096,"url":"https://patchwork.plctlab.org/api/1.2/patches/153096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-12-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:55","name":"[v20,11/40] libstdc++: Optimize is_unbounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-12-kmatsui@gcc.gnu.org/mbox/"},{"id":153092,"url":"https://patchwork.plctlab.org/api/1.2/patches/153092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-13-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:56","name":"[v20,12/40] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-13-kmatsui@gcc.gnu.org/mbox/"},{"id":153106,"url":"https://patchwork.plctlab.org/api/1.2/patches/153106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-14-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:57","name":"[v20,13/40] libstdc++: Optimize is_bounded_array trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-14-kmatsui@gcc.gnu.org/mbox/"},{"id":153089,"url":"https://patchwork.plctlab.org/api/1.2/patches/153089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-15-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:58","name":"[v20,14/40] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-15-kmatsui@gcc.gnu.org/mbox/"},{"id":153085,"url":"https://patchwork.plctlab.org/api/1.2/patches/153085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-16-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:09:59","name":"[v20,15/40] libstdc++: Optimize is_scoped_enum trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-16-kmatsui@gcc.gnu.org/mbox/"},{"id":153091,"url":"https://patchwork.plctlab.org/api/1.2/patches/153091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-17-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:00","name":"[v20,16/40] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-17-kmatsui@gcc.gnu.org/mbox/"},{"id":153097,"url":"https://patchwork.plctlab.org/api/1.2/patches/153097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-18-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:01","name":"[v20,17/40] libstdc++: Optimize is_member_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-18-kmatsui@gcc.gnu.org/mbox/"},{"id":153082,"url":"https://patchwork.plctlab.org/api/1.2/patches/153082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-19-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:02","name":"[v20,18/40] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-19-kmatsui@gcc.gnu.org/mbox/"},{"id":153090,"url":"https://patchwork.plctlab.org/api/1.2/patches/153090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-20-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:03","name":"[v20,19/40] libstdc++: Optimize is_member_function_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-20-kmatsui@gcc.gnu.org/mbox/"},{"id":153109,"url":"https://patchwork.plctlab.org/api/1.2/patches/153109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-21-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:04","name":"[v20,20/40] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-21-kmatsui@gcc.gnu.org/mbox/"},{"id":153114,"url":"https://patchwork.plctlab.org/api/1.2/patches/153114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-22-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:05","name":"[v20,21/40] libstdc++: Optimize is_member_object_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-22-kmatsui@gcc.gnu.org/mbox/"},{"id":153115,"url":"https://patchwork.plctlab.org/api/1.2/patches/153115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-23-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:06","name":"[v20,22/40] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-23-kmatsui@gcc.gnu.org/mbox/"},{"id":153084,"url":"https://patchwork.plctlab.org/api/1.2/patches/153084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-24-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:07","name":"[v20,23/40] libstdc++: Optimize is_reference trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-24-kmatsui@gcc.gnu.org/mbox/"},{"id":153111,"url":"https://patchwork.plctlab.org/api/1.2/patches/153111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-25-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:08","name":"[v20,24/40] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-25-kmatsui@gcc.gnu.org/mbox/"},{"id":153103,"url":"https://patchwork.plctlab.org/api/1.2/patches/153103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-26-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:09","name":"[v20,25/40] libstdc++: Optimize is_function trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-26-kmatsui@gcc.gnu.org/mbox/"},{"id":153105,"url":"https://patchwork.plctlab.org/api/1.2/patches/153105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-27-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:10","name":"[v20,26/40] libstdc++: Optimize is_object trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-27-kmatsui@gcc.gnu.org/mbox/"},{"id":153102,"url":"https://patchwork.plctlab.org/api/1.2/patches/153102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-28-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:11","name":"[v20,27/40] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-28-kmatsui@gcc.gnu.org/mbox/"},{"id":153104,"url":"https://patchwork.plctlab.org/api/1.2/patches/153104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-29-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:12","name":"[v20,28/40] libstdc++: Optimize remove_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-29-kmatsui@gcc.gnu.org/mbox/"},{"id":153118,"url":"https://patchwork.plctlab.org/api/1.2/patches/153118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-30-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:13","name":"[v20,29/40] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-30-kmatsui@gcc.gnu.org/mbox/"},{"id":153086,"url":"https://patchwork.plctlab.org/api/1.2/patches/153086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-31-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:14","name":"[v20,30/40] libstdc++: Optimize is_pointer trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-31-kmatsui@gcc.gnu.org/mbox/"},{"id":153112,"url":"https://patchwork.plctlab.org/api/1.2/patches/153112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-32-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:15","name":"[v20,31/40] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-32-kmatsui@gcc.gnu.org/mbox/"},{"id":153098,"url":"https://patchwork.plctlab.org/api/1.2/patches/153098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-33-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:16","name":"[v20,32/40] libstdc++: Optimize is_arithmetic trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-33-kmatsui@gcc.gnu.org/mbox/"},{"id":153094,"url":"https://patchwork.plctlab.org/api/1.2/patches/153094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-34-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:17","name":"[v20,33/40] libstdc++: Optimize is_fundamental trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-34-kmatsui@gcc.gnu.org/mbox/"},{"id":153101,"url":"https://patchwork.plctlab.org/api/1.2/patches/153101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-35-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-35-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:18","name":"[v20,34/40] libstdc++: Optimize is_compound trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-35-kmatsui@gcc.gnu.org/mbox/"},{"id":153113,"url":"https://patchwork.plctlab.org/api/1.2/patches/153113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-36-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-36-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:19","name":"[v20,35/40] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-36-kmatsui@gcc.gnu.org/mbox/"},{"id":153080,"url":"https://patchwork.plctlab.org/api/1.2/patches/153080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-37-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-37-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:20","name":"[v20,36/40] libstdc++: Optimize is_unsigned trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-37-kmatsui@gcc.gnu.org/mbox/"},{"id":153108,"url":"https://patchwork.plctlab.org/api/1.2/patches/153108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-38-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-38-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:21","name":"[v20,37/40] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-38-kmatsui@gcc.gnu.org/mbox/"},{"id":153110,"url":"https://patchwork.plctlab.org/api/1.2/patches/153110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-39-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-39-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:22","name":"[v20,38/40] libstdc++: Optimize is_signed trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-39-kmatsui@gcc.gnu.org/mbox/"},{"id":153093,"url":"https://patchwork.plctlab.org/api/1.2/patches/153093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-40-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-40-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:23","name":"[v20,39/40] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-40-kmatsui@gcc.gnu.org/mbox/"},{"id":153107,"url":"https://patchwork.plctlab.org/api/1.2/patches/153107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-41-kmatsui@gcc.gnu.org/","msgid":"<20231016001227.2717180-41-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T00:10:24","name":"[v20,40/40] libstdc++: Optimize is_scalar trait performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016001227.2717180-41-kmatsui@gcc.gnu.org/mbox/"},{"id":153135,"url":"https://patchwork.plctlab.org/api/1.2/patches/153135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-2-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:12","name":"[1/3] LoongArch:Implement avg and sad standard names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-2-xujiahao@loongson.cn/mbox/"},{"id":153136,"url":"https://patchwork.plctlab.org/api/1.2/patches/153136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-3-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:13","name":"[2/3] LoongArch:Implement vec_widen standard names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-3-xujiahao@loongson.cn/mbox/"},{"id":153134,"url":"https://patchwork.plctlab.org/api/1.2/patches/153134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-4-xujiahao@loongson.cn/","msgid":"<20231016020014.41979-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-16T02:00:14","name":"[3/3] LoongArch:Implement the new vector cost model framework.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016020014.41979-4-xujiahao@loongson.cn/mbox/"},{"id":153144,"url":"https://patchwork.plctlab.org/api/1.2/patches/153144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016023357.3394538-1-pinskia@gmail.com/","msgid":"<20231016023357.3394538-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-16T02:33:57","name":"[PR31531] MATCH: Improve ~a < ~b and ~a < CST, allow a nop cast inbetween ~ and a/b","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016023357.3394538-1-pinskia@gmail.com/mbox/"},{"id":153174,"url":"https://patchwork.plctlab.org/api/1.2/patches/153174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+cCGjnitL1eoxnkA0XML-NKqwJCUpx1dZiXAfezX-w1Tg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T03:55:36","name":"[v2] libstdc++: Workaround for LLVM-61763 in ranges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJGDH+cCGjnitL1eoxnkA0XML-NKqwJCUpx1dZiXAfezX-w1Tg@mail.gmail.com/mbox/"},{"id":153170,"url":"https://patchwork.plctlab.org/api/1.2/patches/153170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016035709.1390097-1-juzhe.zhong@rivai.ai/","msgid":"<20231016035709.1390097-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T03:57:09","name":"RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016035709.1390097-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153175,"url":"https://patchwork.plctlab.org/api/1.2/patches/153175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016050412.9960-1-ishitatsuyuki@gmail.com/","msgid":"<20231016050412.9960-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-10-16T05:04:12","name":"Do not prepend target triple to -fuse-ld=lld,mold.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016050412.9960-1-ishitatsuyuki@gmail.com/mbox/"},{"id":153208,"url":"https://patchwork.plctlab.org/api/1.2/patches/153208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-2-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:38","name":"[1/3] Initial Clear Water Forest Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-2-haochen.jiang@intel.com/mbox/"},{"id":153207,"url":"https://patchwork.plctlab.org/api/1.2/patches/153207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-3-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-3-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:39","name":"[2/3] x86: Add m_CORE_HYBRID for hybrid clients tuning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-3-haochen.jiang@intel.com/mbox/"},{"id":153209,"url":"https://patchwork.plctlab.org/api/1.2/patches/153209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-4-haochen.jiang@intel.com/","msgid":"<20231016062340.2639697-4-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-16T06:23:40","name":"[3/3] Initial Panther Lake Support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016062340.2639697-4-haochen.jiang@intel.com/mbox/"},{"id":153258,"url":"https://patchwork.plctlab.org/api/1.2/patches/153258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016082715.3417414-1-juzhe.zhong@rivai.ai/","msgid":"<20231016082715.3417414-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T08:27:15","name":"RISC-V: Use VLS modes if the NITERS is known and smaller than VLS mode elements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016082715.3417414-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153278,"url":"https://patchwork.plctlab.org/api/1.2/patches/153278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com/","msgid":"<928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com>","list_archive_url":null,"date":"2023-10-16T09:18:45","name":"nvptx: Use fatal_error when -march= is missing not an assert [PR111093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/928b02fd-2662-4a4d-9c55-ab538464b7fb@codesourcery.com/mbox/"},{"id":153285,"url":"https://patchwork.plctlab.org/api/1.2/patches/153285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310160141130.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-10-16T09:41:26","name":"[RFA] PR target/111815: VAX: Only accept the index scaler as the RHS operand to ASHIFT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2310160141130.5892@tpp.orcam.me.uk/mbox/"},{"id":153329,"url":"https://patchwork.plctlab.org/api/1.2/patches/153329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016110256.D4FF03858422@sourceware.org/","msgid":"<20231016110256.D4FF03858422@sourceware.org>","list_archive_url":null,"date":"2023-10-16T11:02:29","name":"tree-optimization/111807 - ICE in verify_sra_access_forest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016110256.D4FF03858422@sourceware.org/mbox/"},{"id":153343,"url":"https://patchwork.plctlab.org/api/1.2/patches/153343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016112013.512552-1-stefansf@linux.ibm.com/","msgid":"<20231016112013.512552-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-10-16T11:20:13","name":"s390: Fix expander popcountv8hi2_vx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016112013.512552-1-stefansf@linux.ibm.com/mbox/"},{"id":153349,"url":"https://patchwork.plctlab.org/api/1.2/patches/153349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016113108.877163-1-juzhe.zhong@rivai.ai/","msgid":"<20231016113108.877163-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T11:31:08","name":"[V2] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016113108.877163-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153365,"url":"https://patchwork.plctlab.org/api/1.2/patches/153365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898291CAEA27140073ADE93983D7A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T12:27:05","name":"[v2] AArch64: Add inline memmove expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898291CAEA27140073ADE93983D7A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":153406,"url":"https://patchwork.plctlab.org/api/1.2/patches/153406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/B5F16FC8-9E24-4826-9B7D-42404146DC27@pushface.org/","msgid":"","list_archive_url":null,"date":"2023-10-16T13:32:43","name":"Fix PR ada/111813 (Inconsistent limit in Ada.Calendar.Formatting)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/B5F16FC8-9E24-4826-9B7D-42404146DC27@pushface.org/mbox/"},{"id":153483,"url":"https://patchwork.plctlab.org/api/1.2/patches/153483/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016141446.1942361-1-juzhe.zhong@rivai.ai/","msgid":"<20231016141446.1942361-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T14:14:46","name":"[V3] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016141446.1942361-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153493,"url":"https://patchwork.plctlab.org/api/1.2/patches/153493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016145250.139806-1-lehua.ding@rivai.ai/","msgid":"<20231016145250.139806-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-16T14:52:50","name":"RISC-V: Refactor and cleanup vsetvl pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016145250.139806-1-lehua.ding@rivai.ai/mbox/"},{"id":153495,"url":"https://patchwork.plctlab.org/api/1.2/patches/153495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016151048.1238073-1-jason@redhat.com/","msgid":"<20231016151048.1238073-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-16T15:10:48","name":"[pushed] c++: improve fold-expr location","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016151048.1238073-1-jason@redhat.com/mbox/"},{"id":153695,"url":"https://patchwork.plctlab.org/api/1.2/patches/153695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a663b83c-356a-410c-871b-1897d12fd76a@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-16T17:11:46","name":"fortran/intrinsic.texi: Add '\''passed by value'\'' to signal handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a663b83c-356a-410c-871b-1897d12fd76a@codesourcery.com/mbox/"},{"id":153712,"url":"https://patchwork.plctlab.org/api/1.2/patches/153712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016180107.2019608-1-manolis.tsamis@vrull.eu/","msgid":"<20231016180107.2019608-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-10-16T18:01:07","name":"[v7] Implement new RTL optimizations pass: fold-mem-offsets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016180107.2019608-1-manolis.tsamis@vrull.eu/mbox/"},{"id":153714,"url":"https://patchwork.plctlab.org/api/1.2/patches/153714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182138.1304513-1-maskray@google.com/","msgid":"<20231016182138.1304513-1-maskray@google.com>","list_archive_url":null,"date":"2023-10-16T18:21:38","name":"[v5] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182138.1304513-1-maskray@google.com/mbox/"},{"id":153716,"url":"https://patchwork.plctlab.org/api/1.2/patches/153716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182447.bticawp4aps7tsso@google.com/","msgid":"<20231016182447.bticawp4aps7tsso@google.com>","list_archive_url":null,"date":"2023-10-16T18:24:47","name":"[v5] i386: Allow -mlarge-data-threshold with -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016182447.bticawp4aps7tsso@google.com/mbox/"},{"id":153721,"url":"https://patchwork.plctlab.org/api/1.2/patches/153721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-327edd0e-7e3a-45b6-9546-0df8a1315f96-1697483503726@3c-app-gmx-bap45/","msgid":"","list_archive_url":null,"date":"2023-10-16T19:11:43","name":"Fortran: out of bounds access with nested implied-do IO [PR111837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-327edd0e-7e3a-45b6-9546-0df8a1315f96-1697483503726@3c-app-gmx-bap45/mbox/"},{"id":153723,"url":"https://patchwork.plctlab.org/api/1.2/patches/153723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016194800.936405-1-vineetg@rivosinc.com/","msgid":"<20231016194800.936405-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-16T19:48:00","name":"[COMMITTED] RISC-V/testsuite: add a default march (lacking zfa) to some fp tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016194800.936405-1-vineetg@rivosinc.com/mbox/"},{"id":153727,"url":"https://patchwork.plctlab.org/api/1.2/patches/153727/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com/","msgid":"<26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com>","list_archive_url":null,"date":"2023-10-16T20:04:47","name":"[committed] RISC-V: NFC: Move scalar block move expansion code into riscv-string.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/26b66674-778a-49ad-bbf3-d25446b35814@ventanamicro.com/mbox/"},{"id":153803,"url":"https://patchwork.plctlab.org/api/1.2/patches/153803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231028.60866-1-dmalcolm@redhat.com/","msgid":"<20231016231028.60866-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-16T23:10:28","name":"[pushed] diagnostics: fix missing initialization of context->extra_output_kind","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231028.60866-1-dmalcolm@redhat.com/mbox/"},{"id":153804,"url":"https://patchwork.plctlab.org/api/1.2/patches/153804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231032.60929-1-dmalcolm@redhat.com/","msgid":"<20231016231032.60929-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-16T23:10:32","name":"[pushed] diagnostics: special-case -fdiagnostics-text-art-charset=ascii for LANG=C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016231032.60929-1-dmalcolm@redhat.com/mbox/"},{"id":153805,"url":"https://patchwork.plctlab.org/api/1.2/patches/153805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com/","msgid":"<6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com>","list_archive_url":null,"date":"2023-10-16T23:16:55","name":"[committed] Fix minor problem in stack probing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6227dee3-744e-418d-bc09-edf7da1923af@ventanamicro.com/mbox/"},{"id":153806,"url":"https://patchwork.plctlab.org/api/1.2/patches/153806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232038.353641-1-juzhe.zhong@rivai.ai/","msgid":"<20231016232038.353641-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-16T23:20:38","name":"[V4] RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL model for non-adjacent load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232038.353641-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153819,"url":"https://patchwork.plctlab.org/api/1.2/patches/153819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232939.91393-1-egallager@gcc.gnu.org/","msgid":"<20231016232939.91393-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-16T23:29:40","name":"Add files to discourage submissions of PRs to the GitHub mirror.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231016232939.91393-1-egallager@gcc.gnu.org/mbox/"},{"id":153825,"url":"https://patchwork.plctlab.org/api/1.2/patches/153825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017002328.3165172-1-ibuclaw@gdcproject.org/","msgid":"<20231017002328.3165172-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-17T00:23:28","name":"[committed] d: Forbid taking the address of an intrinsic with no implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017002328.3165172-1-ibuclaw@gdcproject.org/mbox/"},{"id":153833,"url":"https://patchwork.plctlab.org/api/1.2/patches/153833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS3X2OsF1uE/DRW4@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T00:39:52","name":"[v3] c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS3X2OsF1uE/DRW4@redhat.com/mbox/"},{"id":153897,"url":"https://patchwork.plctlab.org/api/1.2/patches/153897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017051327.110300-1-hongtao.liu@intel.com/","msgid":"<20231017051327.110300-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-17T05:13:27","name":"Support 32/64-bit vectorization for _Float16 fma related operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017051327.110300-1-hongtao.liu@intel.com/mbox/"},{"id":153928,"url":"https://patchwork.plctlab.org/api/1.2/patches/153928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017062640.9AACF3858C3A@sourceware.org/","msgid":"<20231017062640.9AACF3858C3A@sourceware.org>","list_archive_url":null,"date":"2023-10-17T06:26:07","name":"middle-end/111818 - failed DECL_NOT_GIMPLE_REG_P setting of volatile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017062640.9AACF3858C3A@sourceware.org/mbox/"},{"id":153929,"url":"https://patchwork.plctlab.org/api/1.2/patches/153929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017064324.1023901-1-juzhe.zhong@rivai.ai/","msgid":"<20231017064324.1023901-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-17T06:43:24","name":"[V4] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017064324.1023901-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153951,"url":"https://patchwork.plctlab.org/api/1.2/patches/153951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017073039.1485182-1-juzhe.zhong@rivai.ai/","msgid":"<20231017073039.1485182-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-17T07:30:39","name":"RISC-V: Enable more tests for dynamic LMUL and bug fix[PR111832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017073039.1485182-1-juzhe.zhong@rivai.ai/mbox/"},{"id":153955,"url":"https://patchwork.plctlab.org/api/1.2/patches/153955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com/","msgid":"<33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com>","list_archive_url":null,"date":"2023-10-17T07:47:38","name":"fortran/intrinsic.texi: Improve SIGNAL intrinsic entry (was: [patch] fortran/intrinsic.texi: Add '\''passed by value'\'' to signal handler)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/33a8ad77-3ef6-47e2-a6ad-6b480d21c141@codesourcery.com/mbox/"},{"id":153960,"url":"https://patchwork.plctlab.org/api/1.2/patches/153960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS5B3eGzU6A8nMqW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-17T08:12:13","name":"wide-int-print: Don'\''t print large numbers hexadecimally for print_dec{,s,u}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS5B3eGzU6A8nMqW@tucnak/mbox/"},{"id":154021,"url":"https://patchwork.plctlab.org/api/1.2/patches/154021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de/","msgid":"<1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de>","list_archive_url":null,"date":"2023-10-17T09:52:17","name":"[avr,committed] Implement fma, fmal.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1eff6955-3ddf-7d83-eb49-c56d47aa6637@gjlay.de/mbox/"},{"id":154023,"url":"https://patchwork.plctlab.org/api/1.2/patches/154023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017095738.1081807-1-lehua.ding@rivai.ai/","msgid":"<20231017095738.1081807-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T09:57:38","name":"RISC-V: Fix failed testcase when use -cmodel=medany","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017095738.1081807-1-lehua.ding@rivai.ai/mbox/"},{"id":154053,"url":"https://patchwork.plctlab.org/api/1.2/patches/154053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/652e636e.170a0220.9f5ea.3365@mx.google.com/","msgid":"<652e636e.170a0220.9f5ea.3365@mx.google.com>","list_archive_url":null,"date":"2023-10-17T10:35:21","name":"c++: Add missing auto_diagnostic_groups to constexpr.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/652e636e.170a0220.9f5ea.3365@mx.google.com/mbox/"},{"id":154089,"url":"https://patchwork.plctlab.org/api/1.2/patches/154089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-2-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:32","name":"[v21,01/30] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-2-kmatsui@gcc.gnu.org/mbox/"},{"id":154090,"url":"https://patchwork.plctlab.org/api/1.2/patches/154090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-3-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:33","name":"[v21,02/30] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-3-kmatsui@gcc.gnu.org/mbox/"},{"id":154098,"url":"https://patchwork.plctlab.org/api/1.2/patches/154098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-4-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:34","name":"[v21,03/30] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-4-kmatsui@gcc.gnu.org/mbox/"},{"id":154111,"url":"https://patchwork.plctlab.org/api/1.2/patches/154111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-5-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:35","name":"[v21,04/30] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-5-kmatsui@gcc.gnu.org/mbox/"},{"id":154102,"url":"https://patchwork.plctlab.org/api/1.2/patches/154102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-6-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:36","name":"[v21,05/30] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-6-kmatsui@gcc.gnu.org/mbox/"},{"id":154114,"url":"https://patchwork.plctlab.org/api/1.2/patches/154114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-7-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:37","name":"[v21,06/30] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-7-kmatsui@gcc.gnu.org/mbox/"},{"id":154110,"url":"https://patchwork.plctlab.org/api/1.2/patches/154110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-8-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:38","name":"[v21,07/30] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-8-kmatsui@gcc.gnu.org/mbox/"},{"id":154101,"url":"https://patchwork.plctlab.org/api/1.2/patches/154101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-9-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:39","name":"[v21,08/30] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-9-kmatsui@gcc.gnu.org/mbox/"},{"id":154117,"url":"https://patchwork.plctlab.org/api/1.2/patches/154117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-10-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:40","name":"[v21,09/30] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-10-kmatsui@gcc.gnu.org/mbox/"},{"id":154112,"url":"https://patchwork.plctlab.org/api/1.2/patches/154112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-11-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:41","name":"[v21,10/30] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-11-kmatsui@gcc.gnu.org/mbox/"},{"id":154124,"url":"https://patchwork.plctlab.org/api/1.2/patches/154124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-12-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:42","name":"[v21,11/30] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-12-kmatsui@gcc.gnu.org/mbox/"},{"id":154127,"url":"https://patchwork.plctlab.org/api/1.2/patches/154127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-13-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:43","name":"[v21,12/30] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-13-kmatsui@gcc.gnu.org/mbox/"},{"id":154109,"url":"https://patchwork.plctlab.org/api/1.2/patches/154109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-14-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:44","name":"[v21,13/30] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-14-kmatsui@gcc.gnu.org/mbox/"},{"id":154121,"url":"https://patchwork.plctlab.org/api/1.2/patches/154121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-15-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:45","name":"[v21,14/30] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-15-kmatsui@gcc.gnu.org/mbox/"},{"id":154104,"url":"https://patchwork.plctlab.org/api/1.2/patches/154104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-16-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:46","name":"[v21,15/30] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-16-kmatsui@gcc.gnu.org/mbox/"},{"id":154145,"url":"https://patchwork.plctlab.org/api/1.2/patches/154145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-17-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:47","name":"[v21,16/30] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-17-kmatsui@gcc.gnu.org/mbox/"},{"id":154142,"url":"https://patchwork.plctlab.org/api/1.2/patches/154142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-18-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:48","name":"[v21,17/30] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-18-kmatsui@gcc.gnu.org/mbox/"},{"id":154151,"url":"https://patchwork.plctlab.org/api/1.2/patches/154151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-19-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:49","name":"[v21,18/30] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-19-kmatsui@gcc.gnu.org/mbox/"},{"id":154119,"url":"https://patchwork.plctlab.org/api/1.2/patches/154119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-20-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:50","name":"[v21,19/30] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-20-kmatsui@gcc.gnu.org/mbox/"},{"id":154108,"url":"https://patchwork.plctlab.org/api/1.2/patches/154108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-21-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:51","name":"[v21,20/30] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-21-kmatsui@gcc.gnu.org/mbox/"},{"id":154134,"url":"https://patchwork.plctlab.org/api/1.2/patches/154134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-22-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:52","name":"[v21,21/30] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-22-kmatsui@gcc.gnu.org/mbox/"},{"id":154138,"url":"https://patchwork.plctlab.org/api/1.2/patches/154138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-23-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:53","name":"[v21,22/30] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-23-kmatsui@gcc.gnu.org/mbox/"},{"id":154148,"url":"https://patchwork.plctlab.org/api/1.2/patches/154148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-24-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:54","name":"[v21,23/30] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-24-kmatsui@gcc.gnu.org/mbox/"},{"id":154097,"url":"https://patchwork.plctlab.org/api/1.2/patches/154097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-25-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:55","name":"[v21,24/30] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-25-kmatsui@gcc.gnu.org/mbox/"},{"id":154132,"url":"https://patchwork.plctlab.org/api/1.2/patches/154132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-26-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:56","name":"[v21,25/30] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-26-kmatsui@gcc.gnu.org/mbox/"},{"id":154120,"url":"https://patchwork.plctlab.org/api/1.2/patches/154120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-27-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:57","name":"[v21,26/30] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-27-kmatsui@gcc.gnu.org/mbox/"},{"id":154125,"url":"https://patchwork.plctlab.org/api/1.2/patches/154125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-28-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:58","name":"[v21,27/30] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-28-kmatsui@gcc.gnu.org/mbox/"},{"id":154131,"url":"https://patchwork.plctlab.org/api/1.2/patches/154131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-29-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:27:59","name":"[v21,28/30] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-29-kmatsui@gcc.gnu.org/mbox/"},{"id":154115,"url":"https://patchwork.plctlab.org/api/1.2/patches/154115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-30-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:28:00","name":"[v21,29/30] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-30-kmatsui@gcc.gnu.org/mbox/"},{"id":154099,"url":"https://patchwork.plctlab.org/api/1.2/patches/154099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-31-kmatsui@gcc.gnu.org/","msgid":"<20231017113242.664523-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:28:01","name":"[v21,30/30] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113242.664523-31-kmatsui@gcc.gnu.org/mbox/"},{"id":154091,"url":"https://patchwork.plctlab.org/api/1.2/patches/154091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-2-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:47","name":"[V2,01/14] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-2-lehua.ding@rivai.ai/mbox/"},{"id":154095,"url":"https://patchwork.plctlab.org/api/1.2/patches/154095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-3-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:48","name":"[V2,02/14] RISC-V: P2: Refactor and cleanup demand system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-3-lehua.ding@rivai.ai/mbox/"},{"id":154092,"url":"https://patchwork.plctlab.org/api/1.2/patches/154092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-4-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:49","name":"[V2,03/14] RISC-V: P3: Refactor vector_infos_manager","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-4-lehua.ding@rivai.ai/mbox/"},{"id":154094,"url":"https://patchwork.plctlab.org/api/1.2/patches/154094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-5-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:50","name":"[V2,04/14] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-5-lehua.ding@rivai.ai/mbox/"},{"id":154093,"url":"https://patchwork.plctlab.org/api/1.2/patches/154093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-6-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:51","name":"[V2,05/14] RISC-V: P5: combine phase 1 and 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-6-lehua.ding@rivai.ai/mbox/"},{"id":154100,"url":"https://patchwork.plctlab.org/api/1.2/patches/154100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-7-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:52","name":"[V2,06/14] RISC-V: P6: Add computing reaching definition data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-7-lehua.ding@rivai.ai/mbox/"},{"id":154096,"url":"https://patchwork.plctlab.org/api/1.2/patches/154096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-8-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:53","name":"[V2,07/14] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-8-lehua.ding@rivai.ai/mbox/"},{"id":154106,"url":"https://patchwork.plctlab.org/api/1.2/patches/154106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-9-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-9-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:54","name":"[V2,08/14] RISC-V: P8: Unified insert and delete of vsetvl insn into Phase 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-9-lehua.ding@rivai.ai/mbox/"},{"id":154103,"url":"https://patchwork.plctlab.org/api/1.2/patches/154103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-10-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-10-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:55","name":"[V2,09/14] RISC-V: P9: Cleanup post optimize phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-10-lehua.ding@rivai.ai/mbox/"},{"id":154118,"url":"https://patchwork.plctlab.org/api/1.2/patches/154118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-11-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-11-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:56","name":"[V2,10/14] RISC-V: P10: Cleanup helper functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-11-lehua.ding@rivai.ai/mbox/"},{"id":154113,"url":"https://patchwork.plctlab.org/api/1.2/patches/154113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-12-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-12-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:57","name":"[V2,11/14] RISC-V: P11: Adjust vector_block_info to vsetvl_block_info class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-12-lehua.ding@rivai.ai/mbox/"},{"id":154105,"url":"https://patchwork.plctlab.org/api/1.2/patches/154105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-13-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-13-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:58","name":"[V2,12/14] RISC-V: P12: Delete riscv-vsetvl.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-13-lehua.ding@rivai.ai/mbox/"},{"id":154128,"url":"https://patchwork.plctlab.org/api/1.2/patches/154128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-14-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-14-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:34:59","name":"[V2,13/14] RISC-V: P13: Reorganize functions used to modify RTL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-14-lehua.ding@rivai.ai/mbox/"},{"id":154123,"url":"https://patchwork.plctlab.org/api/1.2/patches/154123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-15-lehua.ding@rivai.ai/","msgid":"<20231017113500.1160997-15-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-17T11:35:00","name":"[V2,14/14] RISC-V: P14: Adjust and add testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113500.1160997-15-lehua.ding@rivai.ai/mbox/"},{"id":154130,"url":"https://patchwork.plctlab.org/api/1.2/patches/154130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-2-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:22","name":"[v22,01/31] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-2-kmatsui@gcc.gnu.org/mbox/"},{"id":154107,"url":"https://patchwork.plctlab.org/api/1.2/patches/154107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-3-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:23","name":"[v22,02/31] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-3-kmatsui@gcc.gnu.org/mbox/"},{"id":154137,"url":"https://patchwork.plctlab.org/api/1.2/patches/154137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-4-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:24","name":"[v22,03/31] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-4-kmatsui@gcc.gnu.org/mbox/"},{"id":154155,"url":"https://patchwork.plctlab.org/api/1.2/patches/154155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-5-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:25","name":"[v22,04/31] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-5-kmatsui@gcc.gnu.org/mbox/"},{"id":154116,"url":"https://patchwork.plctlab.org/api/1.2/patches/154116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-6-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:26","name":"[v22,05/31] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-6-kmatsui@gcc.gnu.org/mbox/"},{"id":154133,"url":"https://patchwork.plctlab.org/api/1.2/patches/154133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-7-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:27","name":"[v22,06/31] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-7-kmatsui@gcc.gnu.org/mbox/"},{"id":154122,"url":"https://patchwork.plctlab.org/api/1.2/patches/154122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-8-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:28","name":"[v22,07/31] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-8-kmatsui@gcc.gnu.org/mbox/"},{"id":154135,"url":"https://patchwork.plctlab.org/api/1.2/patches/154135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-9-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:29","name":"[v22,08/31] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-9-kmatsui@gcc.gnu.org/mbox/"},{"id":154153,"url":"https://patchwork.plctlab.org/api/1.2/patches/154153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-10-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:30","name":"[v22,09/31] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-10-kmatsui@gcc.gnu.org/mbox/"},{"id":154141,"url":"https://patchwork.plctlab.org/api/1.2/patches/154141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-11-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:31","name":"[v22,10/31] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-11-kmatsui@gcc.gnu.org/mbox/"},{"id":154162,"url":"https://patchwork.plctlab.org/api/1.2/patches/154162/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-12-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:32","name":"[v22,11/31] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-12-kmatsui@gcc.gnu.org/mbox/"},{"id":154129,"url":"https://patchwork.plctlab.org/api/1.2/patches/154129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-13-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:33","name":"[v22,12/31] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-13-kmatsui@gcc.gnu.org/mbox/"},{"id":154154,"url":"https://patchwork.plctlab.org/api/1.2/patches/154154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-14-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:34","name":"[v22,13/31] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-14-kmatsui@gcc.gnu.org/mbox/"},{"id":154143,"url":"https://patchwork.plctlab.org/api/1.2/patches/154143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-15-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:35","name":"[v22,14/31] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-15-kmatsui@gcc.gnu.org/mbox/"},{"id":154157,"url":"https://patchwork.plctlab.org/api/1.2/patches/154157/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-16-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:36","name":"[v22,15/31] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-16-kmatsui@gcc.gnu.org/mbox/"},{"id":154147,"url":"https://patchwork.plctlab.org/api/1.2/patches/154147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-17-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:37","name":"[v22,16/31] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-17-kmatsui@gcc.gnu.org/mbox/"},{"id":154159,"url":"https://patchwork.plctlab.org/api/1.2/patches/154159/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-18-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:38","name":"[v22,17/31] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-18-kmatsui@gcc.gnu.org/mbox/"},{"id":154152,"url":"https://patchwork.plctlab.org/api/1.2/patches/154152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-19-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:39","name":"[v22,18/31] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-19-kmatsui@gcc.gnu.org/mbox/"},{"id":154144,"url":"https://patchwork.plctlab.org/api/1.2/patches/154144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-20-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:40","name":"[v22,19/31] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-20-kmatsui@gcc.gnu.org/mbox/"},{"id":154158,"url":"https://patchwork.plctlab.org/api/1.2/patches/154158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-21-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:41","name":"[v22,20/31] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-21-kmatsui@gcc.gnu.org/mbox/"},{"id":154136,"url":"https://patchwork.plctlab.org/api/1.2/patches/154136/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-22-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:42","name":"[v22,21/31] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-22-kmatsui@gcc.gnu.org/mbox/"},{"id":154160,"url":"https://patchwork.plctlab.org/api/1.2/patches/154160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-23-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:43","name":"[v22,22/31] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-23-kmatsui@gcc.gnu.org/mbox/"},{"id":154140,"url":"https://patchwork.plctlab.org/api/1.2/patches/154140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-24-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:44","name":"[v22,23/31] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-24-kmatsui@gcc.gnu.org/mbox/"},{"id":154146,"url":"https://patchwork.plctlab.org/api/1.2/patches/154146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-25-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:45","name":"[v22,24/31] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-25-kmatsui@gcc.gnu.org/mbox/"},{"id":154156,"url":"https://patchwork.plctlab.org/api/1.2/patches/154156/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-26-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:46","name":"[v22,25/31] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-26-kmatsui@gcc.gnu.org/mbox/"},{"id":154150,"url":"https://patchwork.plctlab.org/api/1.2/patches/154150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-27-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:47","name":"[v22,26/31] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-27-kmatsui@gcc.gnu.org/mbox/"},{"id":154126,"url":"https://patchwork.plctlab.org/api/1.2/patches/154126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-28-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:48","name":"[v22,27/31] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-28-kmatsui@gcc.gnu.org/mbox/"},{"id":154161,"url":"https://patchwork.plctlab.org/api/1.2/patches/154161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-29-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:49","name":"[v22,28/31] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-29-kmatsui@gcc.gnu.org/mbox/"},{"id":154139,"url":"https://patchwork.plctlab.org/api/1.2/patches/154139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-30-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:50","name":"[v22,29/31] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-30-kmatsui@gcc.gnu.org/mbox/"},{"id":154149,"url":"https://patchwork.plctlab.org/api/1.2/patches/154149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-31-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:51","name":"[v22,30/31] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-31-kmatsui@gcc.gnu.org/mbox/"},{"id":154163,"url":"https://patchwork.plctlab.org/api/1.2/patches/154163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-32-kmatsui@gcc.gnu.org/","msgid":"<20231017113822.677344-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-17T11:36:52","name":"[v22,31/31] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017113822.677344-32-kmatsui@gcc.gnu.org/mbox/"},{"id":154250,"url":"https://patchwork.plctlab.org/api/1.2/patches/154250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017122742.0FFAB385C6DB@sourceware.org/","msgid":"<20231017122742.0FFAB385C6DB@sourceware.org>","list_archive_url":null,"date":"2023-10-17T12:27:11","name":"tree-optimization/111846 - put simd-clone-info into SLP tree","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017122742.0FFAB385C6DB@sourceware.org/mbox/"},{"id":154265,"url":"https://patchwork.plctlab.org/api/1.2/patches/154265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com/","msgid":"<007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-17T13:08:57","name":"[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007b01da00fb$179e69e0$46db3da0$@nextmovesoftware.com/mbox/"},{"id":154294,"url":"https://patchwork.plctlab.org/api/1.2/patches/154294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com/","msgid":"<319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com>","list_archive_url":null,"date":"2023-10-17T13:21:56","name":"[v10] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/319f0053-b18e-4e36-96cd-8713c6de31a7@linux.ibm.com/mbox/"},{"id":154300,"url":"https://patchwork.plctlab.org/api/1.2/patches/154300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017140706.21281-1-xry111@xry111.site/","msgid":"<20231017140706.21281-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-17T14:06:47","name":"LoongArch: Use fcmp.caf.s instead of movgr2cf for zeroing a fcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017140706.21281-1-xry111@xry111.site/mbox/"},{"id":154408,"url":"https://patchwork.plctlab.org/api/1.2/patches/154408/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017180728.11846-1-vineetg@rivosinc.com/","msgid":"<20231017180728.11846-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T18:07:28","name":"RISC-V/testsuite/pr111466.c: fix expected output to not detect SEXT.W","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017180728.11846-1-vineetg@rivosinc.com/mbox/"},{"id":154417,"url":"https://patchwork.plctlab.org/api/1.2/patches/154417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017185153.90833-1-vineetg@rivosinc.com/","msgid":"<20231017185153.90833-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T18:51:53","name":"[v2] RISC-V/testsuite/pr111466.c: update test and expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017185153.90833-1-vineetg@rivosinc.com/mbox/"},{"id":154425,"url":"https://patchwork.plctlab.org/api/1.2/patches/154425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com/","msgid":"<022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-17T19:05:49","name":"[x86] PR target/110511: Fix reg allocation for widening multiplications.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022301da012c$f1f00a00$d5d01e00$@nextmovesoftware.com/mbox/"},{"id":154491,"url":"https://patchwork.plctlab.org/api/1.2/patches/154491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017201425.98668-1-vineetg@rivosinc.com/","msgid":"<20231017201425.98668-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-17T20:14:25","name":"[COMMITTED] RISC-V/testsuite/pr111466.c: update test and expected output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017201425.98668-1-vineetg@rivosinc.com/mbox/"},{"id":154519,"url":"https://patchwork.plctlab.org/api/1.2/patches/154519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yiPmkNmgUNDrh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:00","name":"[01/11] rtl-ssa: Fix bug in function_info::add_insn_after","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yiPmkNmgUNDrh@arm.com/mbox/"},{"id":154524,"url":"https://patchwork.plctlab.org/api/1.2/patches/154524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yomVmZjy4PJK1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:26","name":"[02/11] rtl-ssa: Add drop_memory_access helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yomVmZjy4PJK1@arm.com/mbox/"},{"id":154525,"url":"https://patchwork.plctlab.org/api/1.2/patches/154525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yvoPreGQ+BDt5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:46:54","name":"[03/11] rtl-ssa: Add entry point to allow re-parenting uses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7yvoPreGQ+BDt5@arm.com/mbox/"},{"id":154526,"url":"https://patchwork.plctlab.org/api/1.2/patches/154526/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y4oIFl/ju3DZu@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:47:30","name":"[04/11] rtl-ssa: Support inferring uses of mem in change_insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y4oIFl/ju3DZu@arm.com/mbox/"},{"id":154527,"url":"https://patchwork.plctlab.org/api/1.2/patches/154527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y+bf7KQk28SIH@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:47:53","name":"[05/11] rtl-ssa: Support for inserting new insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7y+bf7KQk28SIH@arm.com/mbox/"},{"id":154528,"url":"https://patchwork.plctlab.org/api/1.2/patches/154528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zE+uo4mdL6dr4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:48:19","name":"[06/11] haifa-sched: Allow for NOTE_INSN_DELETED at start of epilogue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zE+uo4mdL6dr4@arm.com/mbox/"},{"id":154529,"url":"https://patchwork.plctlab.org/api/1.2/patches/154529/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zMtkX9y9QzmO6@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:48:50","name":"[07/11] aarch64, testsuite: Prevent stp in lr_free_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zMtkX9y9QzmO6@arm.com/mbox/"},{"id":154530,"url":"https://patchwork.plctlab.org/api/1.2/patches/154530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zS9xTDJNnjpQl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:49:15","name":"[08/11] aarch64, testsuite: Tweak sve/pcs/args_9.c to allow stps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zS9xTDJNnjpQl@arm.com/mbox/"},{"id":154531,"url":"https://patchwork.plctlab.org/api/1.2/patches/154531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zZtFfaT6+QUen@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:49:42","name":"[09/11] aarch64, testsuite: Fix up pr71727.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zZtFfaT6+QUen@arm.com/mbox/"},{"id":154532,"url":"https://patchwork.plctlab.org/api/1.2/patches/154532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7ziVpbMVpY2aU6@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:50:17","name":"[10/11] aarch64: Generalise TFmode load/store pair patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7ziVpbMVpY2aU6@arm.com/mbox/"},{"id":154534,"url":"https://patchwork.plctlab.org/api/1.2/patches/154534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zrn0Hp4EWRvav@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T20:50:54","name":"[11/11] aarch64: Add new load/store pair fusion pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS7zrn0Hp4EWRvav@arm.com/mbox/"},{"id":154576,"url":"https://patchwork.plctlab.org/api/1.2/patches/154576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213110.1485201-1-jason@redhat.com/","msgid":"<20231017213110.1485201-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-17T21:31:10","name":"[pushed] c++: mangling tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213110.1485201-1-jason@redhat.com/mbox/"},{"id":154577,"url":"https://patchwork.plctlab.org/api/1.2/patches/154577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213826.1040138-1-polacek@redhat.com/","msgid":"<20231017213826.1040138-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-17T21:38:26","name":"c++: accepts-invalid with =delete(\"\") [PR111840]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231017213826.1040138-1-polacek@redhat.com/mbox/"},{"id":154584,"url":"https://patchwork.plctlab.org/api/1.2/patches/154584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cnk3ly6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:48:01","name":"[1/2] aarch64: Use vecs to store register save order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7cnk3ly6.fsf@arm.com/mbox/"},{"id":154585,"url":"https://patchwork.plctlab.org/api/1.2/patches/154585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qds3lwq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:48:53","name":"[2/2] aarch64: Put LR save slot first in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt1qds3lwq.fsf@arm.com/mbox/"},{"id":154602,"url":"https://patchwork.plctlab.org/api/1.2/patches/154602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620B67E5DAFB16E5BE35BF4ACD6A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-10-17T22:50:40","name":"libstdc++: testsuite: Enhance codecvt_unicode with tests for length()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB1620B67E5DAFB16E5BE35BF4ACD6A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":154609,"url":"https://patchwork.plctlab.org/api/1.2/patches/154609/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018012009.849697-1-pan2.li@intel.com/","msgid":"<20231018012009.849697-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-18T01:20:09","name":"[v1] RISC-V: Remove the type size restriction of vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018012009.849697-1-pan2.li@intel.com/mbox/"},{"id":154626,"url":"https://patchwork.plctlab.org/api/1.2/patches/154626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018043259.1873023-1-juzhe.zhong@rivai.ai/","msgid":"<20231018043259.1873023-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T04:32:59","name":"RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vx","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018043259.1873023-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154660,"url":"https://patchwork.plctlab.org/api/1.2/patches/154660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb808aab-2d4b-0d0d-8fa2-f3693bcd4bf1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T05:09:15","name":"vect: Cost adjacent vector loads/stores together [PR111784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb808aab-2d4b-0d0d-8fa2-f3693bcd4bf1@linux.ibm.com/mbox/"},{"id":154743,"url":"https://patchwork.plctlab.org/api/1.2/patches/154743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081020.1919314-1-haochen.jiang@intel.com/","msgid":"<20231018081020.1919314-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-18T08:10:20","name":"x86: Correct ISA enabled for clients since Arrow Lake","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081020.1919314-1-haochen.jiang@intel.com/mbox/"},{"id":154745,"url":"https://patchwork.plctlab.org/api/1.2/patches/154745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081831.A7A333856943@sourceware.org/","msgid":"<20231018081831.A7A333856943@sourceware.org>","list_archive_url":null,"date":"2023-10-18T08:17:55","name":"Re-instantiate integer mask to traditional vector mask support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018081831.A7A333856943@sourceware.org/mbox/"},{"id":154755,"url":"https://patchwork.plctlab.org/api/1.2/patches/154755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018083259.2386650-1-hongtao.liu@intel.com/","msgid":"<20231018083259.2386650-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-18T08:32:59","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big. 65; 6800; 1c There'\''s loop in vect_peel_nonlinear_iv_init to get init_expr * pow (step_expr, skip_niters). When skipn_iters is to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018083259.2386650-1-hongtao.liu@intel.com/mbox/"},{"id":154770,"url":"https://patchwork.plctlab.org/api/1.2/patches/154770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01d52528-7616-422a-8e8f-6073af049b39@gmail.com/","msgid":"<01d52528-7616-422a-8e8f-6073af049b39@gmail.com>","list_archive_url":null,"date":"2023-10-18T09:20:04","name":"RISC-V: Add popcount fallback expander.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01d52528-7616-422a-8e8f-6073af049b39@gmail.com/mbox/"},{"id":154786,"url":"https://patchwork.plctlab.org/api/1.2/patches/154786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018094044.66965-1-iain@sandoe.co.uk/","msgid":"<20231018094044.66965-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-18T09:40:44","name":"[pushed] Darwin: Check as for .build_version support and use it if available.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018094044.66965-1-iain@sandoe.co.uk/mbox/"},{"id":154790,"url":"https://patchwork.plctlab.org/api/1.2/patches/154790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS+tXfdF8uqZRvjQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-10-18T10:03:09","name":"tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZS+tXfdF8uqZRvjQ@tucnak/mbox/"},{"id":154794,"url":"https://patchwork.plctlab.org/api/1.2/patches/154794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102149.2634849-1-juzhe.zhong@rivai.ai/","msgid":"<20231018102149.2634849-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T10:21:49","name":"RISC-V: Fix failed hoist in LICM of vmv.v.x instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102149.2634849-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154795,"url":"https://patchwork.plctlab.org/api/1.2/patches/154795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102533.2643245-1-juzhe.zhong@rivai.ai/","msgid":"<20231018102533.2643245-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T10:25:33","name":"[V2] RISC-V: Fix failed hoist in LICM of vmv.v.x instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018102533.2643245-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154854,"url":"https://patchwork.plctlab.org/api/1.2/patches/154854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB162045D122DE0DE016CE0A26ACD5A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2023-10-18T10:52:20","name":"[v2] libstdc++: testsuite: Enhance codecvt_unicode with tests for length()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/AS1P192MB162045D122DE0DE016CE0A26ACD5A@AS1P192MB1620.EURP192.PROD.OUTLOOK.COM/mbox/"},{"id":154813,"url":"https://patchwork.plctlab.org/api/1.2/patches/154813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com/","msgid":"<8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com>","list_archive_url":null,"date":"2023-10-18T10:56:01","name":"OpenMP: Avoid ICE with LTO and '\''omp allocate (was: [Patch] Fortran: Support OpenMP'\''s '\''allocate'\'' directive for stack vars)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d407d7b-c546-4454-92c1-707ef00f0ba0@codesourcery.com/mbox/"},{"id":154867,"url":"https://patchwork.plctlab.org/api/1.2/patches/154867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018123642.427403-1-juzhe.zhong@rivai.ai/","msgid":"<20231018123642.427403-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-18T12:36:42","name":"[V5] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018123642.427403-1-juzhe.zhong@rivai.ai/mbox/"},{"id":154904,"url":"https://patchwork.plctlab.org/api/1.2/patches/154904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8a4dc84-c867-441a-93d6-8a3c932f0fa6@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T14:19:22","name":"vect: Allow same precision for bit-precision conversions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8a4dc84-c867-441a-93d6-8a3c932f0fa6@gmail.com/mbox/"},{"id":154910,"url":"https://patchwork.plctlab.org/api/1.2/patches/154910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com/","msgid":"<8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com>","list_archive_url":null,"date":"2023-10-18T14:41:17","name":"[PATCH6/8] omp: Reorder call for TARGET_SIMD_CLONE_ADJUST (was Re: [PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8bc378c8-b87d-4fa6-a8f6-7665612352d8@arm.com/mbox/"},{"id":154909,"url":"https://patchwork.plctlab.org/api/1.2/patches/154909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f996e7f4-316f-4e76-b2b6-a83b4cd088f1@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-18T14:41:30","name":"[0/8] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f996e7f4-316f-4e76-b2b6-a83b4cd088f1@arm.com/mbox/"},{"id":154920,"url":"https://patchwork.plctlab.org/api/1.2/patches/154920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-2-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:42","name":"[V2,1/7] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-2-victor.donascimento@arm.com/mbox/"},{"id":154922,"url":"https://patchwork.plctlab.org/api/1.2/patches/154922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-3-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:43","name":"[V2,2/7] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-3-victor.donascimento@arm.com/mbox/"},{"id":154924,"url":"https://patchwork.plctlab.org/api/1.2/patches/154924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-4-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:44","name":"[V2,3/7] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-4-victor.donascimento@arm.com/mbox/"},{"id":154918,"url":"https://patchwork.plctlab.org/api/1.2/patches/154918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-5-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:45","name":"[V2,4/7] aarch64: Add basic target_print_operand support for CONST_STRING","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-5-victor.donascimento@arm.com/mbox/"},{"id":154919,"url":"https://patchwork.plctlab.org/api/1.2/patches/154919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-6-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:46","name":"[V2,5/7] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-6-victor.donascimento@arm.com/mbox/"},{"id":154923,"url":"https://patchwork.plctlab.org/api/1.2/patches/154923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-7-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:47","name":"[V2,6/7] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-7-victor.donascimento@arm.com/mbox/"},{"id":154921,"url":"https://patchwork.plctlab.org/api/1.2/patches/154921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-8-victor.donascimento@arm.com/","msgid":"<20231018150310.253793-8-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-10-18T15:02:48","name":"[V2,7/7] aarch64: Add system register duplication check selftest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018150310.253793-8-victor.donascimento@arm.com/mbox/"},{"id":154933,"url":"https://patchwork.plctlab.org/api/1.2/patches/154933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com/","msgid":"<90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:24:36","name":"aarch64: Replace duplicated selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/90f070dd-b4ca-7f59-47db-dd1e10db2fba@e124511.cambridge.arm.com/mbox/"},{"id":154936,"url":"https://patchwork.plctlab.org/api/1.2/patches/154936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com/","msgid":"<2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:42:36","name":"[1/3] Add support for target_version attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a9e5b6e-9720-602b-5449-28fb5d88a40c@e124511.cambridge.arm.com/mbox/"},{"id":154937,"url":"https://patchwork.plctlab.org/api/1.2/patches/154937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com/","msgid":"<3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:44:08","name":"[2/3,aarch64] Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ab87b1b-04c8-bf92-f678-9b7a58611f1a@e124511.cambridge.arm.com/mbox/"},{"id":154938,"url":"https://patchwork.plctlab.org/api/1.2/patches/154938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com/","msgid":"<36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-10-18T15:44:55","name":"[3/3] WIP/RFC: Fix name mangling for target_clones","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36b6307f-10f5-c03e-0263-0671d3219eb9@e124511.cambridge.arm.com/mbox/"},{"id":154973,"url":"https://patchwork.plctlab.org/api/1.2/patches/154973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018162838.3531886-1-ppalka@redhat.com/","msgid":"<20231018162838.3531886-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-18T16:28:38","name":"c++/modules: ICE with lambda initializing local var [PR105322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018162838.3531886-1-ppalka@redhat.com/mbox/"},{"id":154982,"url":"https://patchwork.plctlab.org/api/1.2/patches/154982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de/","msgid":"<4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de>","list_archive_url":null,"date":"2023-10-18T17:03:57","name":"[avr,committed] LibF7: Implement a function that was missing for devices without MUL.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64ce1d-790e-6c66-9824-5b31b9a4b662@gjlay.de/mbox/"},{"id":155022,"url":"https://patchwork.plctlab.org/api/1.2/patches/155022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018171842.266046-1-dimitar@dinux.eu/","msgid":"<20231018171842.266046-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-10-18T17:18:42","name":"[committed] pru: Implement TARGET_INSN_COST","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018171842.266046-1-dimitar@dinux.eu/mbox/"},{"id":155192,"url":"https://patchwork.plctlab.org/api/1.2/patches/155192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018211542.1516517-1-lhyatt@gmail.com/","msgid":"<20231018211542.1516517-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-10-18T21:15:42","name":"c++: Make -Wunknown-pragmas controllable by #pragma GCC diagnostic [PR89038]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018211542.1516517-1-lhyatt@gmail.com/mbox/"},{"id":155201,"url":"https://patchwork.plctlab.org/api/1.2/patches/155201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018223432.2519596-1-pinskia@gmail.com/","msgid":"<20231018223432.2519596-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-18T22:34:32","name":"[COMMITTED] Fix expansion of `(a & 2) != 1`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231018223432.2519596-1-pinskia@gmail.com/mbox/"},{"id":155233,"url":"https://patchwork.plctlab.org/api/1.2/patches/155233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBxkkoelVIxvnEy@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:00:18","name":"[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBxkkoelVIxvnEy@cowardly-lion.the-meissners.org/mbox/"},{"id":155234,"url":"https://patchwork.plctlab.org/api/1.2/patches/155234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBx8rGikeUfgp1c@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:01:54","name":"[3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBx8rGikeUfgp1c@cowardly-lion.the-meissners.org/mbox/"},{"id":155235,"url":"https://patchwork.plctlab.org/api/1.2/patches/155235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTByNkF+jxxDIyEK@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:03:02","name":"[4/6] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTByNkF+jxxDIyEK@cowardly-lion.the-meissners.org/mbox/"},{"id":155236,"url":"https://patchwork.plctlab.org/api/1.2/patches/155236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBynMSpnS9pUvel@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:04:44","name":"[5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBynMSpnS9pUvel@cowardly-lion.the-meissners.org/mbox/"},{"id":155237,"url":"https://patchwork.plctlab.org/api/1.2/patches/155237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBy/OekceZLGEAo@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T00:06:20","name":"[6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTBy/OekceZLGEAo@cowardly-lion.the-meissners.org/mbox/"},{"id":155279,"url":"https://patchwork.plctlab.org/api/1.2/patches/155279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019040519.2655598-1-pinskia@gmail.com/","msgid":"<20231019040519.2655598-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T04:05:19","name":"aarch64: [PR110986] Emit csinv again for `a ? ~b : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019040519.2655598-1-pinskia@gmail.com/mbox/"},{"id":155319,"url":"https://patchwork.plctlab.org/api/1.2/patches/155319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f61f9026-94b3-497b-bbe5-807054399500@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T04:55:48","name":"[_Hashtable] Fix merge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f61f9026-94b3-497b-bbe5-807054399500@gmail.com/mbox/"},{"id":155326,"url":"https://patchwork.plctlab.org/api/1.2/patches/155326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019061422.281377-1-hongtao.liu@intel.com/","msgid":"<20231019061422.281377-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-19T06:14:22","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019061422.281377-1-hongtao.liu@intel.com/mbox/"},{"id":155328,"url":"https://patchwork.plctlab.org/api/1.2/patches/155328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019063128.512979-1-haochen.jiang@intel.com/","msgid":"<20231019063128.512979-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-19T06:31:28","name":"[v2] x86: Correct ISA enabled for clients since Arrow Lake","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019063128.512979-1-haochen.jiang@intel.com/mbox/"},{"id":155358,"url":"https://patchwork.plctlab.org/api/1.2/patches/155358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhrdowb.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-19T07:58:44","name":"return edge in make_eh_edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhrdowb.fsf@lxoliva.fsfla.org/mbox/"},{"id":155372,"url":"https://patchwork.plctlab.org/api/1.2/patches/155372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-2-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:23","name":"[V3,01/11] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info/vector_block_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-2-lehua.ding@rivai.ai/mbox/"},{"id":155369,"url":"https://patchwork.plctlab.org/api/1.2/patches/155369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-3-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:24","name":"[V3,02/11] RISC-V: P2: Refactor and cleanup demand system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-3-lehua.ding@rivai.ai/mbox/"},{"id":155373,"url":"https://patchwork.plctlab.org/api/1.2/patches/155373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-4-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:25","name":"[V3,03/11] RISC-V: P3: Refactor vector_infos_manager","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-4-lehua.ding@rivai.ai/mbox/"},{"id":155371,"url":"https://patchwork.plctlab.org/api/1.2/patches/155371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-5-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:26","name":"[V3,04/11] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-5-lehua.ding@rivai.ai/mbox/"},{"id":155374,"url":"https://patchwork.plctlab.org/api/1.2/patches/155374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-6-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:27","name":"[V3,05/11] RISC-V: P5: Combine phase 1 and 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-6-lehua.ding@rivai.ai/mbox/"},{"id":155380,"url":"https://patchwork.plctlab.org/api/1.2/patches/155380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-7-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:28","name":"[V3,06/11] RISC-V: P6: Add computing reaching definition data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-7-lehua.ding@rivai.ai/mbox/"},{"id":155379,"url":"https://patchwork.plctlab.org/api/1.2/patches/155379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-8-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:29","name":"[V3,07/11] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-8-lehua.ding@rivai.ai/mbox/"},{"id":155376,"url":"https://patchwork.plctlab.org/api/1.2/patches/155376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-9-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-9-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:30","name":"[V3,08/11] RISC-V: P8: Refactor emit-vsetvl phase and delete post optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-9-lehua.ding@rivai.ai/mbox/"},{"id":155378,"url":"https://patchwork.plctlab.org/api/1.2/patches/155378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-10-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-10-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:31","name":"[V3,09/11] RISC-V: P9: Cleanup and reorganize helper functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-10-lehua.ding@rivai.ai/mbox/"},{"id":155382,"url":"https://patchwork.plctlab.org/api/1.2/patches/155382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-11-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-11-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:32","name":"[V3,10/11] RISC-V: P10: Delete riscv-vsetvl.h and adjust riscv-vsetvl.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-11-lehua.ding@rivai.ai/mbox/"},{"id":155381,"url":"https://patchwork.plctlab.org/api/1.2/patches/155381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-12-lehua.ding@rivai.ai/","msgid":"<20231019083333.2052340-12-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-10-19T08:33:33","name":"[V3,11/11] RISC-V: P11: Adjust and add testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019083333.2052340-12-lehua.ding@rivai.ai/mbox/"},{"id":155395,"url":"https://patchwork.plctlab.org/api/1.2/patches/155395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il73rohj.fsf@oldenburg.str.redhat.com/","msgid":"<87il73rohj.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-19T08:43:52","name":"c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il73rohj.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155396,"url":"https://patchwork.plctlab.org/api/1.2/patches/155396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b46ca497-0070-47c5-bdde-7d69390d35fb@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T08:58:13","name":"[committed] amdgcn: deprecate Fiji device and multilib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b46ca497-0070-47c5-bdde-7d69390d35fb@codesourcery.com/mbox/"},{"id":155406,"url":"https://patchwork.plctlab.org/api/1.2/patches/155406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8b37ye7.fsf@euler.schwinge.homeip.net/","msgid":"<87v8b37ye7.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-10-19T09:30:08","name":"Enable top-level recursive '\''autoreconf'\'' (was: Hints on reconfiguring GCC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8b37ye7.fsf@euler.schwinge.homeip.net/mbox/"},{"id":155416,"url":"https://patchwork.plctlab.org/api/1.2/patches/155416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b430291b-4cb0-4a81-8d58-9d5268d17c95@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T09:49:14","name":"wwwdocs: gcc-14: mark amdgcn fiji deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b430291b-4cb0-4a81-8d58-9d5268d17c95@codesourcery.com/mbox/"},{"id":155457,"url":"https://patchwork.plctlab.org/api/1.2/patches/155457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114725.E7DBE385840A@sourceware.org/","msgid":"<20231019114725.E7DBE385840A@sourceware.org>","list_archive_url":null,"date":"2023-10-19T11:46:58","name":"[1/2] Refactor x86 vectorized gather path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114725.E7DBE385840A@sourceware.org/mbox/"},{"id":155458,"url":"https://patchwork.plctlab.org/api/1.2/patches/155458/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114804.055643858438@sourceware.org/","msgid":"<20231019114804.055643858438@sourceware.org>","list_archive_url":null,"date":"2023-10-19T11:47:14","name":"[2/2] tree-optimization/111131 - SLP for non-IFN gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019114804.055643858438@sourceware.org/mbox/"},{"id":155494,"url":"https://patchwork.plctlab.org/api/1.2/patches/155494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17859-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:29:54","name":"middle-end: don'\''t create LC-SSA PHI variables for PHI nodes who dominate loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17859-tamar@arm.com/mbox/"},{"id":155500,"url":"https://patchwork.plctlab.org/api/1.2/patches/155500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89829CCDE1529CE888C094AF83D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:43:00","name":"AArch64: Improve immediate generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89829CCDE1529CE888C094AF83D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":155502,"url":"https://patchwork.plctlab.org/api/1.2/patches/155502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898262EC1D06EA3207A4372483D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T12:51:14","name":"AArch64: Cleanup memset expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB898262EC1D06EA3207A4372483D4A@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":155569,"url":"https://patchwork.plctlab.org/api/1.2/patches/155569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-2-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:25","name":"[1/3,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-2-Ezra.Sitorus@arm.com/mbox/"},{"id":155570,"url":"https://patchwork.plctlab.org/api/1.2/patches/155570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-3-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:26","name":"[2/3,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-3-Ezra.Sitorus@arm.com/mbox/"},{"id":155567,"url":"https://patchwork.plctlab.org/api/1.2/patches/155567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-4-Ezra.Sitorus@arm.com/","msgid":"<20231019134127.4685-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-10-19T13:41:27","name":"[3/3,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019134127.4685-4-Ezra.Sitorus@arm.com/mbox/"},{"id":155582,"url":"https://patchwork.plctlab.org/api/1.2/patches/155582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-2-xry111@xry111.site/","msgid":"<20231019140300.50323-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:56","name":"[1/5] LoongArch: Add enum-style -mexplicit-relocs= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-2-xry111@xry111.site/mbox/"},{"id":155586,"url":"https://patchwork.plctlab.org/api/1.2/patches/155586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-3-xry111@xry111.site/","msgid":"<20231019140300.50323-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:57","name":"[2/5] LoongArch: Use explicit relocs for GOT access when -mexplicit-relocs=auto and LTO during a final link with linker plugin","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-3-xry111@xry111.site/mbox/"},{"id":155580,"url":"https://patchwork.plctlab.org/api/1.2/patches/155580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140257.360669-1-dmalcolm@redhat.com/","msgid":"<20231019140257.360669-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-19T14:02:57","name":"[RFC] Add function attribute: null_terminated_string_arg(PARAM_IDX)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140257.360669-1-dmalcolm@redhat.com/mbox/"},{"id":155583,"url":"https://patchwork.plctlab.org/api/1.2/patches/155583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-4-xry111@xry111.site/","msgid":"<20231019140300.50323-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:02:58","name":"[3/5] LoongArch: Use explicit relocs for TLS access with -mexplicit-relocs=auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-4-xry111@xry111.site/mbox/"},{"id":155585,"url":"https://patchwork.plctlab.org/api/1.2/patches/155585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-6-xry111@xry111.site/","msgid":"<20231019140300.50323-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-10-19T14:03:00","name":"[5/5] LoongArch: Document -mexplicit-relocs={auto,none,always}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019140300.50323-6-xry111@xry111.site/mbox/"},{"id":155623,"url":"https://patchwork.plctlab.org/api/1.2/patches/155623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144130.339314-1-poulhies@adacore.com/","msgid":"<20231019144130.339314-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:30","name":"[COMMITTED] ada: Simplify \"not Present\" with \"No\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144130.339314-1-poulhies@adacore.com/mbox/"},{"id":155624,"url":"https://patchwork.plctlab.org/api/1.2/patches/155624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144150.339469-1-poulhies@adacore.com/","msgid":"<20231019144150.339469-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:50","name":"[COMMITTED] ada: Seize opportunity to reuse List_Length","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144150.339469-1-poulhies@adacore.com/mbox/"},{"id":155625,"url":"https://patchwork.plctlab.org/api/1.2/patches/155625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144156.339532-1-poulhies@adacore.com/","msgid":"<20231019144156.339532-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:53","name":"[COMMITTED] ada: Document gnatbind -Q switch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144156.339532-1-poulhies@adacore.com/mbox/"},{"id":155626,"url":"https://patchwork.plctlab.org/api/1.2/patches/155626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144159.339597-1-poulhies@adacore.com/","msgid":"<20231019144159.339597-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:41:58","name":"[COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144159.339597-1-poulhies@adacore.com/mbox/"},{"id":155627,"url":"https://patchwork.plctlab.org/api/1.2/patches/155627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144202.339662-1-poulhies@adacore.com/","msgid":"<20231019144202.339662-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:42:02","name":"[COMMITTED] ada: Refactor code to remove GNATcheck violation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144202.339662-1-poulhies@adacore.com/mbox/"},{"id":155628,"url":"https://patchwork.plctlab.org/api/1.2/patches/155628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144206.339725-1-poulhies@adacore.com/","msgid":"<20231019144206.339725-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-10-19T14:42:04","name":"[COMMITTED] ada: Support new SPARK aspect Side_Effects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019144206.339725-1-poulhies@adacore.com/mbox/"},{"id":155630,"url":"https://patchwork.plctlab.org/api/1.2/patches/155630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTFDa/6aOhyZIAMz@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-19T14:55:39","name":"[v2,11/11] aarch64: Add new load/store pair fusion pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTFDa/6aOhyZIAMz@arm.com/mbox/"},{"id":155631,"url":"https://patchwork.plctlab.org/api/1.2/patches/155631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019151130.1929663-1-jason@redhat.com/","msgid":"<20231019151130.1929663-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:11:30","name":"ABOUT-GCC-NLS: add usage guidance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019151130.1929663-1-jason@redhat.com/mbox/"},{"id":155632,"url":"https://patchwork.plctlab.org/api/1.2/patches/155632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153158.1937301-1-jason@redhat.com/","msgid":"<20231019153158.1937301-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:31:58","name":"[pushed] c++: use G_ instead of _","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153158.1937301-1-jason@redhat.com/mbox/"},{"id":155637,"url":"https://patchwork.plctlab.org/api/1.2/patches/155637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153731.1394423-1-pinskia@gmail.com/","msgid":"<20231019153731.1394423-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T15:37:31","name":"c: [PR104822] Don'\''t warn about converting NULL to different sso endian","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153731.1394423-1-pinskia@gmail.com/mbox/"},{"id":155638,"url":"https://patchwork.plctlab.org/api/1.2/patches/155638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153857.1248815-1-pinskia@gmail.com/","msgid":"<20231019153857.1248815-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-19T15:38:57","name":"c: [PR100532] Fix ICE when an agrgument was an error mark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019153857.1248815-1-pinskia@gmail.com/mbox/"},{"id":155639,"url":"https://patchwork.plctlab.org/api/1.2/patches/155639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019154501.1939309-1-jason@redhat.com/","msgid":"<20231019154501.1939309-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-19T15:45:01","name":"[RFA] diagnostic: rename new permerror overloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019154501.1939309-1-jason@redhat.com/mbox/"},{"id":155642,"url":"https://patchwork.plctlab.org/api/1.2/patches/155642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de/","msgid":"<817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de>","list_archive_url":null,"date":"2023-10-19T15:55:46","name":"[libgcc,contrib] : Add some auto-generated files deps to gcc_update.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/817f3bd3-3add-745a-6a64-6bd7061b6513@gjlay.de/mbox/"},{"id":155696,"url":"https://patchwork.plctlab.org/api/1.2/patches/155696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com/","msgid":"<17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com>","list_archive_url":null,"date":"2023-10-19T19:48:18","name":"omp_lib.f90.in: Deprecate omp_lock_hint_* for OpenMP 5.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17133bf5-db9d-406f-b39d-265fe64f90af@codesourcery.com/mbox/"},{"id":155705,"url":"https://patchwork.plctlab.org/api/1.2/patches/155705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019201738.653232-1-polacek@redhat.com/","msgid":"<20231019201738.653232-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-19T20:17:37","name":"[pushed] doc: Update contrib.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231019201738.653232-1-polacek@redhat.com/mbox/"},{"id":155708,"url":"https://patchwork.plctlab.org/api/1.2/patches/155708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs26pbh2.fsf@oldenburg.str.redhat.com/","msgid":"<87fs26pbh2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-19T21:07:53","name":"c: Add -Wreturn-mismatch warning, split from -Wreturn-type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs26pbh2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155761,"url":"https://patchwork.plctlab.org/api/1.2/patches/155761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020021855.482999-1-hongtao.liu@intel.com/","msgid":"<20231020021855.482999-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-20T02:18:55","name":"Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when iteration count is too big.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020021855.482999-1-hongtao.liu@intel.com/mbox/"},{"id":155775,"url":"https://patchwork.plctlab.org/api/1.2/patches/155775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0lqc7at.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T03:16:26","name":"testsuite: check for and use -mno-strict-align where needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orr0lqc7at.fsf@lxoliva.fsfla.org/mbox/"},{"id":155812,"url":"https://patchwork.plctlab.org/api/1.2/patches/155812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhpdg3z.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T05:20:48","name":"[v3] Control flow redundancy hardening","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredhpdg3z.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155813,"url":"https://patchwork.plctlab.org/api/1.2/patches/155813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5sddfmu.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T05:31:05","name":"[v4] Introduce hardbool attribute for C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5sddfmu.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155818,"url":"https://patchwork.plctlab.org/api/1.2/patches/155818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y31de5m.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T06:03:01","name":"[v4] Introduce strub: machine-independent stack scrubbing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or5y31de5m.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155819,"url":"https://patchwork.plctlab.org/api/1.2/patches/155819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1fxbza4.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-20T06:09:39","name":"rename make_eh_edges to make_eh_edge (was: return edge in make_eh_edges)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1fxbza4.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":155825,"url":"https://patchwork.plctlab.org/api/1.2/patches/155825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020062050.971264-1-haochen.jiang@intel.com/","msgid":"<20231020062050.971264-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-20T06:20:50","name":"i386: Prevent splitting to xmm16+ when !TARGET_AVX512VL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020062050.971264-1-haochen.jiang@intel.com/mbox/"},{"id":155847,"url":"https://patchwork.plctlab.org/api/1.2/patches/155847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734y523et.fsf@oldenburg.str.redhat.com/","msgid":"<8734y523et.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T06:50:34","name":"[v2] c: Add -Wreturn-mismatch warning, split from -Wreturn-type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734y523et.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155846,"url":"https://patchwork.plctlab.org/api/1.2/patches/155846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com/","msgid":"<32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com>","list_archive_url":null,"date":"2023-10-20T06:50:44","name":"[v9,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/32ca6e0e-ef68-4d4d-b864-c586a688b2c7@linux.ibm.com/mbox/"},{"id":155848,"url":"https://patchwork.plctlab.org/api/1.2/patches/155848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1fxzszn.fsf@oldenburg.str.redhat.com/","msgid":"<87y1fxzszn.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T06:51:40","name":"c: -Wint-conversion should cover pointer/integer mismatches in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1fxzszn.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155849,"url":"https://patchwork.plctlab.org/api/1.2/patches/155849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020065401.1086359-1-hongtao.liu@intel.com/","msgid":"<20231020065401.1086359-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-20T06:54:01","name":"[x86] Remove unused mmx_pinsrw.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020065401.1086359-1-hongtao.liu@intel.com/mbox/"},{"id":155851,"url":"https://patchwork.plctlab.org/api/1.2/patches/155851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020071506.27021-1-chenglulu@loongson.cn/","msgid":"<20231020071506.27021-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-10-20T07:15:06","name":"LoongArch: Define macro CLEAR_INSN_CACHE.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020071506.27021-1-chenglulu@loongson.cn/mbox/"},{"id":155858,"url":"https://patchwork.plctlab.org/api/1.2/patches/155858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com/","msgid":"<992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com>","list_archive_url":null,"date":"2023-10-20T07:22:52","name":"[PATCH-1v4,expand] Enable vector mode for compare_by_pieces [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/992fc509-51d6-3dbd-ee9d-393378227fc5@linux.ibm.com/mbox/"},{"id":155863,"url":"https://patchwork.plctlab.org/api/1.2/patches/155863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020073748.2172313584@imap2.suse-dmz.suse.de/","msgid":"<20231020073748.2172313584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T07:37:47","name":"Fixup vect_get_and_check_slp_defs for gathers and .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020073748.2172313584@imap2.suse-dmz.suse.de/mbox/"},{"id":155873,"url":"https://patchwork.plctlab.org/api/1.2/patches/155873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020082557.2104496-1-juzhe.zhong@rivai.ai/","msgid":"<20231020082557.2104496-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-20T08:25:57","name":"RISC-V: Rename some variables of vector_block_info[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020082557.2104496-1-juzhe.zhong@rivai.ai/mbox/"},{"id":155878,"url":"https://patchwork.plctlab.org/api/1.2/patches/155878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020083442.4148800-1-pan2.li@intel.com/","msgid":"<20231020083442.4148800-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-20T08:34:42","name":"[v1] RISC-V: Support partial VLS mode when preference fixed-vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020083442.4148800-1-pan2.li@intel.com/mbox/"},{"id":155893,"url":"https://patchwork.plctlab.org/api/1.2/patches/155893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm19znaa.fsf@oldenburg.str.redhat.com/","msgid":"<87pm19znaa.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T08:54:53","name":"c: -Wincompatible-pointer-types should cover mismatches in ?:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87pm19znaa.fsf@oldenburg.str.redhat.com/mbox/"},{"id":155915,"url":"https://patchwork.plctlab.org/api/1.2/patches/155915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020092327.C732A13584@imap2.suse-dmz.suse.de/","msgid":"<20231020092327.C732A13584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T09:23:27","name":"Rewrite more refs for epilogue vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020092327.C732A13584@imap2.suse-dmz.suse.de/mbox/"},{"id":155943,"url":"https://patchwork.plctlab.org/api/1.2/patches/155943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTJLpun/ghfYhY2d@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T09:43:02","name":"rtl-ssa: Don'\''t leave NOTE_INSN_DELETED around","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTJLpun/ghfYhY2d@arm.com/mbox/"},{"id":155948,"url":"https://patchwork.plctlab.org/api/1.2/patches/155948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-2-christoph.muellner@vrull.eu/","msgid":"<20231020095348.2455729-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-20T09:53:47","name":"[v2,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-2-christoph.muellner@vrull.eu/mbox/"},{"id":155947,"url":"https://patchwork.plctlab.org/api/1.2/patches/155947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-3-christoph.muellner@vrull.eu/","msgid":"<20231020095348.2455729-3-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-20T09:53:48","name":"[v2,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020095348.2455729-3-christoph.muellner@vrull.eu/mbox/"},{"id":155949,"url":"https://patchwork.plctlab.org/api/1.2/patches/155949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020100130.D526713584@imap2.suse-dmz.suse.de/","msgid":"<20231020100130.D526713584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T10:01:30","name":"Document {L,R}ROTATE_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020100130.D526713584@imap2.suse-dmz.suse.de/mbox/"},{"id":155998,"url":"https://patchwork.plctlab.org/api/1.2/patches/155998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17865-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T10:50:19","name":"middle-end: don'\''t pass loop_vinfo to vect_set_loop_condition during prolog peeling [PR111866]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17865-tamar@arm.com/mbox/"},{"id":156012,"url":"https://patchwork.plctlab.org/api/1.2/patches/156012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020111940.8FD0A13584@imap2.suse-dmz.suse.de/","msgid":"<20231020111940.8FD0A13584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T11:19:40","name":"tree-optimization/111000 - restrict invariant motion of shifts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020111940.8FD0A13584@imap2.suse-dmz.suse.de/mbox/"},{"id":156081,"url":"https://patchwork.plctlab.org/api/1.2/patches/156081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b99badf1-895a-4ff1-b68f-abc665a85625@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T11:51:03","name":"[committed] amdgcn: add -march=gfx1030 EXPERIMENTAL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b99badf1-895a-4ff1-b68f-abc665a85625@codesourcery.com/mbox/"},{"id":156089,"url":"https://patchwork.plctlab.org/api/1.2/patches/156089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020121357.9F55713584@imap2.suse-dmz.suse.de/","msgid":"<20231020121357.9F55713584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T12:13:57","name":"tree-optimization/111891 - fix assert in vectorizable_simd_clone_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020121357.9F55713584@imap2.suse-dmz.suse.de/mbox/"},{"id":156095,"url":"https://patchwork.plctlab.org/api/1.2/patches/156095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020125951.114236-1-pan2.li@intel.com/","msgid":"<20231020125951.114236-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-20T12:59:51","name":"[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020125951.114236-1-pan2.li@intel.com/mbox/"},{"id":156102,"url":"https://patchwork.plctlab.org/api/1.2/patches/156102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131353.7E572138E2@imap2.suse-dmz.suse.de/","msgid":"<20231020131353.7E572138E2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:13:53","name":"tree-optimization/110243 - IVOPTs introducing undefined overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131353.7E572138E2@imap2.suse-dmz.suse.de/mbox/"},{"id":156103,"url":"https://patchwork.plctlab.org/api/1.2/patches/156103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131810.0AC64138E2@imap2.suse-dmz.suse.de/","msgid":"<20231020131810.0AC64138E2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:18:09","name":"tree-optimization/111445 - simple_iv simplification fault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020131810.0AC64138E2@imap2.suse-dmz.suse.de/mbox/"},{"id":156113,"url":"https://patchwork.plctlab.org/api/1.2/patches/156113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTKFoVCHmwalBmVD@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-10-20T13:50:25","name":"A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTKFoVCHmwalBmVD@fkdesktop.suse.cz/mbox/"},{"id":156114,"url":"https://patchwork.plctlab.org/api/1.2/patches/156114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135259.F1B4613584@imap2.suse-dmz.suse.de/","msgid":"<20231020135259.F1B4613584@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-10-20T13:52:59","name":"tree-optimization/111383 - testcase for fixed PR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135259.F1B4613584@imap2.suse-dmz.suse.de/mbox/"},{"id":156116,"url":"https://patchwork.plctlab.org/api/1.2/patches/156116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-2-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:20","name":"[v23,01/33] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-2-kmatsui@gcc.gnu.org/mbox/"},{"id":156118,"url":"https://patchwork.plctlab.org/api/1.2/patches/156118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-3-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:21","name":"[v23,02/33] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-3-kmatsui@gcc.gnu.org/mbox/"},{"id":156121,"url":"https://patchwork.plctlab.org/api/1.2/patches/156121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-4-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:22","name":"[v23,03/33] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-4-kmatsui@gcc.gnu.org/mbox/"},{"id":156122,"url":"https://patchwork.plctlab.org/api/1.2/patches/156122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-5-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:23","name":"[v23,04/33] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-5-kmatsui@gcc.gnu.org/mbox/"},{"id":156131,"url":"https://patchwork.plctlab.org/api/1.2/patches/156131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-6-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:24","name":"[v23,05/33] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-6-kmatsui@gcc.gnu.org/mbox/"},{"id":156144,"url":"https://patchwork.plctlab.org/api/1.2/patches/156144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-7-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:25","name":"[v23,06/33] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-7-kmatsui@gcc.gnu.org/mbox/"},{"id":156139,"url":"https://patchwork.plctlab.org/api/1.2/patches/156139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-8-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:26","name":"[v23,07/33] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-8-kmatsui@gcc.gnu.org/mbox/"},{"id":156148,"url":"https://patchwork.plctlab.org/api/1.2/patches/156148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-9-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:27","name":"[v23,08/33] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-9-kmatsui@gcc.gnu.org/mbox/"},{"id":156125,"url":"https://patchwork.plctlab.org/api/1.2/patches/156125/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-10-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:28","name":"[v23,09/33] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-10-kmatsui@gcc.gnu.org/mbox/"},{"id":156126,"url":"https://patchwork.plctlab.org/api/1.2/patches/156126/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-11-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:29","name":"[v23,10/33] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-11-kmatsui@gcc.gnu.org/mbox/"},{"id":156127,"url":"https://patchwork.plctlab.org/api/1.2/patches/156127/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-12-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:30","name":"[v23,11/33] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-12-kmatsui@gcc.gnu.org/mbox/"},{"id":156141,"url":"https://patchwork.plctlab.org/api/1.2/patches/156141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-13-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:31","name":"[v23,12/33] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-13-kmatsui@gcc.gnu.org/mbox/"},{"id":156128,"url":"https://patchwork.plctlab.org/api/1.2/patches/156128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-14-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:32","name":"[v23,13/33] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-14-kmatsui@gcc.gnu.org/mbox/"},{"id":156149,"url":"https://patchwork.plctlab.org/api/1.2/patches/156149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-15-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:33","name":"[v23,14/33] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-15-kmatsui@gcc.gnu.org/mbox/"},{"id":156124,"url":"https://patchwork.plctlab.org/api/1.2/patches/156124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-16-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:34","name":"[v23,15/33] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-16-kmatsui@gcc.gnu.org/mbox/"},{"id":156146,"url":"https://patchwork.plctlab.org/api/1.2/patches/156146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-17-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:35","name":"[v23,16/33] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-17-kmatsui@gcc.gnu.org/mbox/"},{"id":156130,"url":"https://patchwork.plctlab.org/api/1.2/patches/156130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-18-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:36","name":"[v23,17/33] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-18-kmatsui@gcc.gnu.org/mbox/"},{"id":156145,"url":"https://patchwork.plctlab.org/api/1.2/patches/156145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-19-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:37","name":"[v23,18/33] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-19-kmatsui@gcc.gnu.org/mbox/"},{"id":156133,"url":"https://patchwork.plctlab.org/api/1.2/patches/156133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-20-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:38","name":"[v23,19/33] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-20-kmatsui@gcc.gnu.org/mbox/"},{"id":156147,"url":"https://patchwork.plctlab.org/api/1.2/patches/156147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-21-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:39","name":"[v23,20/33] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-21-kmatsui@gcc.gnu.org/mbox/"},{"id":156137,"url":"https://patchwork.plctlab.org/api/1.2/patches/156137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-22-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:40","name":"[v23,21/33] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-22-kmatsui@gcc.gnu.org/mbox/"},{"id":156132,"url":"https://patchwork.plctlab.org/api/1.2/patches/156132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-23-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:41","name":"[v23,22/33] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-23-kmatsui@gcc.gnu.org/mbox/"},{"id":156153,"url":"https://patchwork.plctlab.org/api/1.2/patches/156153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-24-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:42","name":"[v23,23/33] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-24-kmatsui@gcc.gnu.org/mbox/"},{"id":156143,"url":"https://patchwork.plctlab.org/api/1.2/patches/156143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-25-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-25-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:43","name":"[v23,24/33] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-25-kmatsui@gcc.gnu.org/mbox/"},{"id":156123,"url":"https://patchwork.plctlab.org/api/1.2/patches/156123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-26-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-26-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:44","name":"[v23,25/33] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-26-kmatsui@gcc.gnu.org/mbox/"},{"id":156142,"url":"https://patchwork.plctlab.org/api/1.2/patches/156142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-27-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-27-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:45","name":"[v23,26/33] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-27-kmatsui@gcc.gnu.org/mbox/"},{"id":156151,"url":"https://patchwork.plctlab.org/api/1.2/patches/156151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-28-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-28-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:46","name":"[v23,27/33] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-28-kmatsui@gcc.gnu.org/mbox/"},{"id":156140,"url":"https://patchwork.plctlab.org/api/1.2/patches/156140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-29-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-29-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:47","name":"[v23,28/33] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-29-kmatsui@gcc.gnu.org/mbox/"},{"id":156155,"url":"https://patchwork.plctlab.org/api/1.2/patches/156155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-30-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-30-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:48","name":"[v23,29/33] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-30-kmatsui@gcc.gnu.org/mbox/"},{"id":156134,"url":"https://patchwork.plctlab.org/api/1.2/patches/156134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-31-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-31-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:49","name":"[v23,30/33] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-31-kmatsui@gcc.gnu.org/mbox/"},{"id":156150,"url":"https://patchwork.plctlab.org/api/1.2/patches/156150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-32-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-32-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:50","name":"[v23,31/33] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-32-kmatsui@gcc.gnu.org/mbox/"},{"id":156154,"url":"https://patchwork.plctlab.org/api/1.2/patches/156154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-33-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-33-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:51","name":"[v23,32/33] c++: Implement __is_invocable built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-33-kmatsui@gcc.gnu.org/mbox/"},{"id":156152,"url":"https://patchwork.plctlab.org/api/1.2/patches/156152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-34-kmatsui@gcc.gnu.org/","msgid":"<20231020135748.1846670-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T13:53:52","name":"[v23,33/33] libstdc++: Optimize std::is_invocable compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020135748.1846670-34-kmatsui@gcc.gnu.org/mbox/"},{"id":156115,"url":"https://patchwork.plctlab.org/api/1.2/patches/156115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17863-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T13:55:57","name":"middle-end: don'\''t keep .MEM guard nodes for PHI nodes who dominate loop [PR111860]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17863-tamar@arm.com/mbox/"},{"id":156120,"url":"https://patchwork.plctlab.org/api/1.2/patches/156120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com/","msgid":"<6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com>","list_archive_url":null,"date":"2023-10-20T14:02:39","name":"Fortran: Fix incompatible types between INTEGER(8) and TYPE(c_ptr)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6fc6a877-2dc7-4551-b141-fd117c66ecfa@codesourcery.com/mbox/"},{"id":156198,"url":"https://patchwork.plctlab.org/api/1.2/patches/156198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com/","msgid":"<63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com>","list_archive_url":null,"date":"2023-10-20T15:48:54","name":"vect: Don'\''t set excess bits in unform masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/63e907af-cde8-4f63-bba9-d39fcd5623fb@codesourcery.com/mbox/"},{"id":156225,"url":"https://patchwork.plctlab.org/api/1.2/patches/156225/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020162115.2307797-34-kmatsui@gcc.gnu.org/","msgid":"<20231020162115.2307797-34-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-20T16:17:02","name":"[v24,33/33] libstdc++: Optimize std::is_invocable compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020162115.2307797-34-kmatsui@gcc.gnu.org/mbox/"},{"id":156226,"url":"https://patchwork.plctlab.org/api/1.2/patches/156226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163121.25120-1-polacek@redhat.com/","msgid":"<20231020163121.25120-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-20T16:31:21","name":"c-family: char8_t and aliasing in C vs C++ [PR111884]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163121.25120-1-polacek@redhat.com/mbox/"},{"id":156246,"url":"https://patchwork.plctlab.org/api/1.2/patches/156246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163413.25404-1-polacek@redhat.com/","msgid":"<20231020163413.25404-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-10-20T16:34:13","name":"[pushed] libstdc++: add casts to from_chars in [PR111883]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020163413.25404-1-polacek@redhat.com/mbox/"},{"id":156229,"url":"https://patchwork.plctlab.org/api/1.2/patches/156229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc154f12-bd63-4223-9baf-19fa092be4a9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T16:49:58","name":"OpenMP: Add C++ support for '\''omp allocate'\'' with stack variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bc154f12-bd63-4223-9baf-19fa092be4a9@codesourcery.com/mbox/"},{"id":156239,"url":"https://patchwork.plctlab.org/api/1.2/patches/156239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMkP2ZTUq9_YN+4_kCzfPBDroFE-YUVSS4h9=NFWxhetwA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-20T17:25:44","name":"PR111754","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMkP2ZTUq9_YN+4_kCzfPBDroFE-YUVSS4h9=NFWxhetwA@mail.gmail.com/mbox/"},{"id":156245,"url":"https://patchwork.plctlab.org/api/1.2/patches/156245/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020173630.2328347-1-ppalka@redhat.com/","msgid":"<20231020173630.2328347-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-20T17:36:30","name":"rust: build failure after NON_DEPENDENT_EXPR removal [PR111899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020173630.2328347-1-ppalka@redhat.com/mbox/"},{"id":156272,"url":"https://patchwork.plctlab.org/api/1.2/patches/156272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf65w1v0.fsf@oldenburg.str.redhat.com/","msgid":"<87sf65w1v0.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T19:05:55","name":"C99 testsuite readiness: Some unverified test case reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf65w1v0.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156273,"url":"https://patchwork.plctlab.org/api/1.2/patches/156273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gtw1uo.fsf@oldenburg.str.redhat.com/","msgid":"<87o7gtw1uo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-20T19:06:07","name":"C99 testsuite readiness: Compile more tests with -std=gnu89","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gtw1uo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156303,"url":"https://patchwork.plctlab.org/api/1.2/patches/156303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020202953.2247779-1-jason@redhat.com/","msgid":"<20231020202953.2247779-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T20:29:53","name":"[pushed] c++: fix tourney logic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020202953.2247779-1-jason@redhat.com/mbox/"},{"id":156304,"url":"https://patchwork.plctlab.org/api/1.2/patches/156304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020203019.2248454-1-jason@redhat.com/","msgid":"<20231020203019.2248454-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T20:30:19","name":"[pushed] testsuite: constexpr-diag1.C and implicit constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020203019.2248454-1-jason@redhat.com/mbox/"},{"id":156352,"url":"https://patchwork.plctlab.org/api/1.2/patches/156352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020215043.2277730-1-jason@redhat.com/","msgid":"<20231020215043.2277730-1-jason@redhat.com>","list_archive_url":null,"date":"2023-10-20T21:50:43","name":"[pushed] c++: abstract class and overload resolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231020215043.2277730-1-jason@redhat.com/mbox/"},{"id":156392,"url":"https://patchwork.plctlab.org/api/1.2/patches/156392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb6a45366c1c1cc8a317c9bd7a58d4f6d3b74615.1697866322.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-21T05:32:22","name":"RISC-V: '\''Zfa'\'' extension is now ratified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb6a45366c1c1cc8a317c9bd7a58d4f6d3b74615.1697866322.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156393,"url":"https://patchwork.plctlab.org/api/1.2/patches/156393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com/","msgid":"<92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-21T05:32:56","name":"RISC-V: Prohibit combination of '\''E'\'' and '\''H'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92fad87801003eaa4cf9f47a1ab8d6e6f015ed12.1697866371.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156396,"url":"https://patchwork.plctlab.org/api/1.2/patches/156396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qdoculr.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-10-21T07:17:36","name":"[PR111520] set hardcmp eh probs (was: rename make_eh_edges to make_eh_edge)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qdoculr.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":156430,"url":"https://patchwork.plctlab.org/api/1.2/patches/156430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eaddf187-4d16-4fc8-8b16-99931bca1220@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-21T10:21:59","name":"[v10,4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eaddf187-4d16-4fc8-8b16-99931bca1220@linux.ibm.com/mbox/"},{"id":156443,"url":"https://patchwork.plctlab.org/api/1.2/patches/156443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021110910.155119-1-jwakely@redhat.com/","msgid":"<20231021110910.155119-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-10-21T10:54:37","name":"[committed] libstdc++: Fix formatting of filesystem directory iterators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021110910.155119-1-jwakely@redhat.com/mbox/"},{"id":156436,"url":"https://patchwork.plctlab.org/api/1.2/patches/156436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at/","msgid":"<564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at>","list_archive_url":null,"date":"2023-10-21T11:09:42","name":"[PING,2,C] Synthesize nonnull attribute for parameters declared with static","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/564177ba373bb73cfc2c2b106b7e57b4bcbc512e.camel@tugraz.at/mbox/"},{"id":156447,"url":"https://patchwork.plctlab.org/api/1.2/patches/156447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021132749.1053942-1-j@lambda.is/","msgid":"<20231021132749.1053942-1-j@lambda.is>","list_archive_url":null,"date":"2023-10-21T13:27:49","name":"[v6] Add condition coverage profiling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021132749.1053942-1-j@lambda.is/mbox/"},{"id":156485,"url":"https://patchwork.plctlab.org/api/1.2/patches/156485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021180712.370694-1-pinskia@gmail.com/","msgid":"<20231021180712.370694-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-21T18:07:12","name":"convert_to_complex vs invalid_conversion [PR111903]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231021180712.370694-1-pinskia@gmail.com/mbox/"},{"id":156509,"url":"https://patchwork.plctlab.org/api/1.2/patches/156509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022001232.2713374-1-pinskia@gmail.com/","msgid":"<20231022001232.2713374-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T00:12:33","name":"[PATCHv2] move the (a-b) CMP 0 ? (a-b) : (b-a) optimization from fold_cond_expr_with_comparison to match","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022001232.2713374-1-pinskia@gmail.com/mbox/"},{"id":156514,"url":"https://patchwork.plctlab.org/api/1.2/patches/156514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e302a7008b07633f19c308d495968dba5f00f147.1697946445.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-22T03:49:22","name":"[RFC] RISC-V: Initial RV64E and LP64E support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e302a7008b07633f19c308d495968dba5f00f147.1697946445.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156521,"url":"https://patchwork.plctlab.org/api/1.2/patches/156521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jijje0h.fsf@oldenburg.str.redhat.com/","msgid":"<874jijje0h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-22T07:46:22","name":"gcc.c-torture/execute/builtins/pr93262-chk.c: Remove return statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jijje0h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156522,"url":"https://patchwork.plctlab.org/api/1.2/patches/156522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0bhzep.fsf@oldenburg.str.redhat.com/","msgid":"<87zg0bhzep.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-22T07:47:10","name":"gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zg0bhzep.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156600,"url":"https://patchwork.plctlab.org/api/1.2/patches/156600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022201500.2802972-1-ppalka@redhat.com/","msgid":"<20231022201500.2802972-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-22T20:15:00","name":"[pushed] objc++: type/expr tsubst conflation [PR111920]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022201500.2802972-1-ppalka@redhat.com/mbox/"},{"id":156604,"url":"https://patchwork.plctlab.org/api/1.2/patches/156604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022210050.1359773-1-ibuclaw@gdcproject.org/","msgid":"<20231022210050.1359773-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-10-22T21:00:50","name":"[committed] d: Merge upstream dmd f4be7f6f7b.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022210050.1359773-1-ibuclaw@gdcproject.org/mbox/"},{"id":156608,"url":"https://patchwork.plctlab.org/api/1.2/patches/156608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022222230.1633485-1-pinskia@gmail.com/","msgid":"<20231022222230.1633485-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T22:22:30","name":"Use error_mark_node after error in convert","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022222230.1633485-1-pinskia@gmail.com/mbox/"},{"id":156610,"url":"https://patchwork.plctlab.org/api/1.2/patches/156610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022223205.1646902-1-pinskia@gmail.com/","msgid":"<20231022223205.1646902-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-22T22:32:05","name":"[Committedv2] aarch64: [PR110986] Emit csinv again for `a ? ~b : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022223205.1646902-1-pinskia@gmail.com/mbox/"},{"id":156611,"url":"https://patchwork.plctlab.org/api/1.2/patches/156611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022224643.1445215-1-juzhe.zhong@rivai.ai/","msgid":"<20231022224643.1445215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-22T22:46:43","name":"RISC-V: Fix AVL_TYPE attribute of tuple mode mov","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231022224643.1445215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156616,"url":"https://patchwork.plctlab.org/api/1.2/patches/156616/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-1-mark@harmstone.com/","msgid":"<20231023005531.19921-1-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:27","name":"[1/5] Remove obsolete debugging formats from names list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-1-mark@harmstone.com/mbox/"},{"id":156621,"url":"https://patchwork.plctlab.org/api/1.2/patches/156621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-2-mark@harmstone.com/","msgid":"<20231023005531.19921-2-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:28","name":"[2/5] Support for CodeView debugging format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-2-mark@harmstone.com/mbox/"},{"id":156619,"url":"https://patchwork.plctlab.org/api/1.2/patches/156619/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-3-mark@harmstone.com/","msgid":"<20231023005531.19921-3-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:29","name":"[3/5] Output file checksums in CodeView section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-3-mark@harmstone.com/mbox/"},{"id":156620,"url":"https://patchwork.plctlab.org/api/1.2/patches/156620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-4-mark@harmstone.com/","msgid":"<20231023005531.19921-4-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:30","name":"[4/5] Output line numbers in CodeView section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-4-mark@harmstone.com/mbox/"},{"id":156617,"url":"https://patchwork.plctlab.org/api/1.2/patches/156617/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-5-mark@harmstone.com/","msgid":"<20231023005531.19921-5-mark@harmstone.com>","list_archive_url":null,"date":"2023-10-23T00:55:31","name":"[5/5] Output S_COMPILE3 symbol in CodeView debug section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023005531.19921-5-mark@harmstone.com/mbox/"},{"id":156626,"url":"https://patchwork.plctlab.org/api/1.2/patches/156626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023012614.1420783-1-pan2.li@intel.com/","msgid":"<20231023012614.1420783-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T01:26:14","name":"[v1] RISC-V: Bugfix for merging undefined tmp register in math","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023012614.1420783-1-pan2.li@intel.com/mbox/"},{"id":156630,"url":"https://patchwork.plctlab.org/api/1.2/patches/156630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQBLOre=--Mu_0onwxCETNX=3PP+eJL6j6Gch865pkew@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:44:15","name":"Go patch committed: pass Gogo to more passes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcUQBLOre=--Mu_0onwxCETNX=3PP+eJL6j6Gch865pkew@mail.gmail.com/mbox/"},{"id":156631,"url":"https://patchwork.plctlab.org/api/1.2/patches/156631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVurV48N+2u7+w3O4VH_W6v74+1J7kRCHO720bNrJM1PQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:46:23","name":"Go patch committed: Remove name_ field from Type_switch_statement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVurV48N+2u7+w3O4VH_W6v74+1J7kRCHO720bNrJM1PQ@mail.gmail.com/mbox/"},{"id":156632,"url":"https://patchwork.plctlab.org/api/1.2/patches/156632/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXa-YSZDONvOPW6qhr0GOJV9qkJ-635zrnk3Jy5JnhHkg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T01:48:48","name":"Go patch committed: Remove the traverse_assignments code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcXa-YSZDONvOPW6qhr0GOJV9qkJ-635zrnk3Jy5JnhHkg@mail.gmail.com/mbox/"},{"id":156637,"url":"https://patchwork.plctlab.org/api/1.2/patches/156637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021324.2767717-1-panchenghui@loongson.cn/","msgid":"<20231023021324.2767717-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-10-23T02:13:24","name":"[v1] LoongArch: Fix vfrint-releated comments in lsxintrin.h and lasxintrin.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021324.2767717-1-panchenghui@loongson.cn/mbox/"},{"id":156640,"url":"https://patchwork.plctlab.org/api/1.2/patches/156640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021810.2134824-1-haochen.jiang@intel.com/","msgid":"<20231023021810.2134824-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-10-23T02:18:10","name":"[gccwwwdocs] gcc-13/14: Mention Intel new ISA and march support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023021810.2134824-1-haochen.jiang@intel.com/mbox/"},{"id":156642,"url":"https://patchwork.plctlab.org/api/1.2/patches/156642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023023904.1881908-1-pan2.li@intel.com/","msgid":"<20231023023904.1881908-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T02:39:04","name":"[v1] RISC-V: Remove unnecessary asm check for rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023023904.1881908-1-pan2.li@intel.com/mbox/"},{"id":156658,"url":"https://patchwork.plctlab.org/api/1.2/patches/156658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67O4wsQBw_VYTr9WjYYUCU8aNixuqjc4QJvNvafH35NZrA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T03:32:42","name":"[WIP] libiberty: Support for relocation output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67O4wsQBw_VYTr9WjYYUCU8aNixuqjc4QJvNvafH35NZrA@mail.gmail.com/mbox/"},{"id":156660,"url":"https://patchwork.plctlab.org/api/1.2/patches/156660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67NDE_iQ4d7RNVuMfwPt57-7+8+pgov=VapZ0og97+ieHg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T03:36:42","name":"[WIP] dwarf2out: extend to output debug section directly to object file during debug_early phase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CA+1a67NDE_iQ4d7RNVuMfwPt57-7+8+pgov=VapZ0og97+ieHg@mail.gmail.com/mbox/"},{"id":156673,"url":"https://patchwork.plctlab.org/api/1.2/patches/156673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023054851.1205436-1-neal.frager@amd.com/","msgid":"<20231023054851.1205436-1-neal.frager@amd.com>","list_archive_url":null,"date":"2023-10-23T05:48:51","name":"[v1,1/1] gcc: config: microblaze: fix cpu version check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023054851.1205436-1-neal.frager@amd.com/mbox/"},{"id":156674,"url":"https://patchwork.plctlab.org/api/1.2/patches/156674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023060110.2603191-1-pan2.li@intel.com/","msgid":"<20231023060110.2603191-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T06:01:10","name":"[v1] RISC-V: Remove unnecessary asm check for binop constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023060110.2603191-1-pan2.li@intel.com/mbox/"},{"id":156684,"url":"https://patchwork.plctlab.org/api/1.2/patches/156684/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com/","msgid":"<1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com>","list_archive_url":null,"date":"2023-10-23T06:43:18","name":"[V11] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b7c3ee2-5c44-4d79-9708-c0183d6634c9@linux.ibm.com/mbox/"},{"id":156695,"url":"https://patchwork.plctlab.org/api/1.2/patches/156695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77808ffa394b3d5a322d4d1a83aca13004190cd.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T07:22:52","name":"[1/4] RISC-V: Recategorize \"prefetch\" availabilities","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e77808ffa394b3d5a322d4d1a83aca13004190cd.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156694,"url":"https://patchwork.plctlab.org/api/1.2/patches/156694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023072252.1716510-1-juzhe.zhong@rivai.ai/","msgid":"<20231023072252.1716510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T07:22:52","name":"[Committed] RISC-V: Fix typo[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023072252.1716510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156696,"url":"https://patchwork.plctlab.org/api/1.2/patches/156696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"<68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-23T07:22:53","name":"[2/4] RISC-V: Remove broken __builtin_riscv_zicbop_cbo_prefetchi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156697,"url":"https://patchwork.plctlab.org/api/1.2/patches/156697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"<671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com>","list_archive_url":null,"date":"2023-10-23T07:22:54","name":"[3/4] RISC-V: Add not broken RW prefetch RTL instructions without offsets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/671a5e3bc2ca33b9050c54d2f53dd0580339b858.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156698,"url":"https://patchwork.plctlab.org/api/1.2/patches/156698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1156590d83afbb22bed387ace4ed9a743df0340.1698045769.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T07:22:55","name":"[4/4] RISC-V: Fix ICE by expansion and register coercion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f1156590d83afbb22bed387ace4ed9a743df0340.1698045769.git.research_trasio@irq.a4lg.com/mbox/"},{"id":156713,"url":"https://patchwork.plctlab.org/api/1.2/patches/156713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023075335.3063731-1-pan2.li@intel.com/","msgid":"<20231023075335.3063731-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T07:53:35","name":"[v1] RISC-V: Bugfix for merging undef tmp register for trunc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023075335.3063731-1-pan2.li@intel.com/mbox/"},{"id":156746,"url":"https://patchwork.plctlab.org/api/1.2/patches/156746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com/","msgid":"<79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com>","list_archive_url":null,"date":"2023-10-23T08:32:34","name":"[PING,^1,v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79bef311-09e8-4df9-9a3d-b929f8d5b30c@linux.ibm.com/mbox/"},{"id":156747,"url":"https://patchwork.plctlab.org/api/1.2/patches/156747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jihybsu.fsf@oldenburg.str.redhat.com/","msgid":"<874jihybsu.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-10-23T08:37:21","name":"[v2] gcc.c-torture/execute/builtins/fputs.c: fputs_unlocked prototype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jihybsu.fsf@oldenburg.str.redhat.com/mbox/"},{"id":156753,"url":"https://patchwork.plctlab.org/api/1.2/patches/156753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023084803.1600456-1-hongtao.liu@intel.com/","msgid":"<20231023084803.1600456-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-10-23T08:48:03","name":"Support vec_cmpmn/vcondmn for v2hf/v4hf.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023084803.1600456-1-hongtao.liu@intel.com/mbox/"},{"id":156761,"url":"https://patchwork.plctlab.org/api/1.2/patches/156761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023090401.1724890-1-juzhe.zhong@rivai.ai/","msgid":"<20231023090401.1724890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T09:04:01","name":"RISC-V: Fix ICE for the fusion case from vsetvl to scalar move[PR111927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023090401.1724890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156766,"url":"https://patchwork.plctlab.org/api/1.2/patches/156766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023091915.385-1-xujiahao@loongson.cn/","msgid":"<20231023091915.385-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T09:19:15","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023091915.385-1-xujiahao@loongson.cn/mbox/"},{"id":156784,"url":"https://patchwork.plctlab.org/api/1.2/patches/156784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094034.1728130-1-juzhe.zhong@rivai.ai/","msgid":"<20231023094034.1728130-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-10-23T09:40:34","name":"[V2] RISC-V: Fix ICE for the fusion case from vsetvl to scalar move[PR111927]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094034.1728130-1-juzhe.zhong@rivai.ai/mbox/"},{"id":156794,"url":"https://patchwork.plctlab.org/api/1.2/patches/156794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094629.5189-1-xujiahao@loongson.cn/","msgid":"<20231023094629.5189-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T09:46:29","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023094629.5189-1-xujiahao@loongson.cn/mbox/"},{"id":156800,"url":"https://patchwork.plctlab.org/api/1.2/patches/156800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023095457.3675888-1-pan2.li@intel.com/","msgid":"<20231023095457.3675888-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-10-23T09:54:57","name":"[v1] RISC-V: Remove unnecessary asm check for vec cvt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023095457.3675888-1-pan2.li@intel.com/mbox/"},{"id":156818,"url":"https://patchwork.plctlab.org/api/1.2/patches/156818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100054.6387-1-xujiahao@loongson.cn/","msgid":"<20231023100054.6387-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T10:00:54","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100054.6387-1-xujiahao@loongson.cn/mbox/"},{"id":156820,"url":"https://patchwork.plctlab.org/api/1.2/patches/156820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100319.7208-1-xujiahao@loongson.cn/","msgid":"<20231023100319.7208-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-10-23T10:03:19","name":"LoongArch:Enable vcond_mask_mn expanders for SF/DF modes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023100319.7208-1-xujiahao@loongson.cn/mbox/"},{"id":156821,"url":"https://patchwork.plctlab.org/api/1.2/patches/156821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6274430-da03-4c9f-88e3-6780dee79850@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T10:03:41","name":"[V12,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c6274430-da03-4c9f-88e3-6780dee79850@linux.ibm.com/mbox/"},{"id":156834,"url":"https://patchwork.plctlab.org/api/1.2/patches/156834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023103504.0C30D3858414@sourceware.org/","msgid":"<20231023103504.0C30D3858414@sourceware.org>","list_archive_url":null,"date":"2023-10-23T10:34:36","name":"tree-optimization/111917 - bougs IL after guard hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023103504.0C30D3858414@sourceware.org/mbox/"},{"id":156860,"url":"https://patchwork.plctlab.org/api/1.2/patches/156860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023124350.432036-1-slyich@gmail.com/","msgid":"<20231023124350.432036-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-10-23T12:43:50","name":"libgcc: make heap-based trampolines conditional on libc presence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023124350.432036-1-slyich@gmail.com/mbox/"},{"id":156867,"url":"https://patchwork.plctlab.org/api/1.2/patches/156867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023131839.6244-1-iain@sandoe.co.uk/","msgid":"<20231023131839.6244-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2023-10-23T13:18:39","name":"[pushed] configure, libquadmath: Remove unintended AC_CHECK_LIBM [PR111928]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023131839.6244-1-iain@sandoe.co.uk/mbox/"},{"id":156881,"url":"https://patchwork.plctlab.org/api/1.2/patches/156881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a684f28033020f45021de3ef40a1599e78fececf.camel@t-online.de/","msgid":"","list_archive_url":null,"date":"2023-10-23T13:28:15","name":"[SH,committed] Fix PR 111001","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a684f28033020f45021de3ef40a1599e78fececf.camel@t-online.de/mbox/"},{"id":156887,"url":"https://patchwork.plctlab.org/api/1.2/patches/156887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTZ1wAAwCWg0hFMH@arm.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T13:31:44","name":"Backport PR106878 fixes to GCC 12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTZ1wAAwCWg0hFMH@arm.com/mbox/"},{"id":156885,"url":"https://patchwork.plctlab.org/api/1.2/patches/156885/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133225.B77493857707@sourceware.org/","msgid":"<20231023133225.B77493857707@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:00","name":"ipa/111914 - perform parameter init after remapping types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133225.B77493857707@sourceware.org/mbox/"},{"id":156886,"url":"https://patchwork.plctlab.org/api/1.2/patches/156886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133240.CF3AB3858C60@sourceware.org/","msgid":"<20231023133240.CF3AB3858C60@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:14","name":"tree-optimization/111915 - mixing grouped and non-grouped accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133240.CF3AB3858C60@sourceware.org/mbox/"},{"id":156889,"url":"https://patchwork.plctlab.org/api/1.2/patches/156889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133328.EC8E53857012@sourceware.org/","msgid":"<20231023133328.EC8E53857012@sourceware.org>","list_archive_url":null,"date":"2023-10-23T13:32:29","name":"tree-optimization/111916 - SRA of BIT_FIELD_REF of constant pool entries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023133328.EC8E53857012@sourceware.org/mbox/"},{"id":156927,"url":"https://patchwork.plctlab.org/api/1.2/patches/156927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com/","msgid":"<008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-10-23T14:47:43","name":"[x86] Fine tune STV register conversion costs for -Os.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/008701da05bf$e2196b20$a64c4160$@nextmovesoftware.com/mbox/"},{"id":156964,"url":"https://patchwork.plctlab.org/api/1.2/patches/156964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9b33876-cf75-417e-85b3-89e00e17435f@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T16:09:58","name":"internal-fn: Add VCOND_MASK_LEN.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e9b33876-cf75-417e-85b3-89e00e17435f@gmail.com/mbox/"},{"id":157072,"url":"https://patchwork.plctlab.org/api/1.2/patches/157072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTbIxWiL27+PeZAG@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T19:25:57","name":"[v3] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZTbIxWiL27+PeZAG@redhat.com/mbox/"},{"id":157097,"url":"https://patchwork.plctlab.org/api/1.2/patches/157097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU493DggQLbcvZK9CJ7aNeXQb2pHqdKbKp8_bbO0+1qMw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:03:49","name":"libgo patch committed: Add missing type conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU493DggQLbcvZK9CJ7aNeXQb2pHqdKbKp8_bbO0+1qMw@mail.gmail.com/mbox/"},{"id":157098,"url":"https://patchwork.plctlab.org/api/1.2/patches/157098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU3j0sDsO0Q9pav_ZmDXoo-3qs7LqB9PFcjD2+K-BbaBQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:06:13","name":"Go patch committed: Add Expression::is_untyped method","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcU3j0sDsO0Q9pav_ZmDXoo-3qs7LqB9PFcjD2+K-BbaBQ@mail.gmail.com/mbox/"},{"id":157108,"url":"https://patchwork.plctlab.org/api/1.2/patches/157108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV=onhFGYmqDYM1j27sW3vNziwuGn-NdOS2MJSzAF9NTQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:08:51","name":"Go patch committed: Pass Gogo to Runtime::make_call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcV=onhFGYmqDYM1j27sW3vNziwuGn-NdOS2MJSzAF9NTQ@mail.gmail.com/mbox/"},{"id":157110,"url":"https://patchwork.plctlab.org/api/1.2/patches/157110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVGOxZRUakFJ97=rj3W6mxfJF3AgjvkcjWzDrvEMw4gjA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:14:28","name":"Go patch committed: Make xx_constant_value methods non-const","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVGOxZRUakFJ97=rj3W6mxfJF3AgjvkcjWzDrvEMw4gjA@mail.gmail.com/mbox/"},{"id":157111,"url":"https://patchwork.plctlab.org/api/1.2/patches/157111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW0wZAzZJKOQZpVDesbprupOf47Vum=fTqWu9jvorzT2Q@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-10-23T21:16:53","name":"Go patch committed: Move Selector_expression up in file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcW0wZAzZJKOQZpVDesbprupOf47Vum=fTqWu9jvorzT2Q@mail.gmail.com/mbox/"},{"id":157131,"url":"https://patchwork.plctlab.org/api/1.2/patches/157131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023230348.606997-1-pinskia@gmail.com/","msgid":"<20231023230348.606997-1-pinskia@gmail.com>","list_archive_url":null,"date":"2023-10-23T23:03:48","name":"match: Fix the `popcnt(a&b) + popcnt(a|b)` patthern for types [PR111913]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023230348.606997-1-pinskia@gmail.com/mbox/"},{"id":157142,"url":"https://patchwork.plctlab.org/api/1.2/patches/157142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023234924.2971461-1-ppalka@redhat.com/","msgid":"<20231023234924.2971461-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:49:24","name":"c++: cp_stabilize_reference and non-dep exprs [PR111919]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023234924.2971461-1-ppalka@redhat.com/mbox/"},{"id":157143,"url":"https://patchwork.plctlab.org/api/1.2/patches/157143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-1-ppalka@redhat.com/","msgid":"<20231023235154.2971561-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:52","name":"[v2,1/3] c++: sort candidates according to viability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-1-ppalka@redhat.com/mbox/"},{"id":157144,"url":"https://patchwork.plctlab.org/api/1.2/patches/157144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-2-ppalka@redhat.com/","msgid":"<20231023235154.2971561-2-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:53","name":"[v2,2/3] c++: remember candidates that we ignored","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-2-ppalka@redhat.com/mbox/"},{"id":157145,"url":"https://patchwork.plctlab.org/api/1.2/patches/157145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-3-ppalka@redhat.com/","msgid":"<20231023235154.2971561-3-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-23T23:51:54","name":"[v2,3/3] c++: note other candidates when diagnosing deletedness","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231023235154.2971561-3-ppalka@redhat.com/mbox/"},{"id":157200,"url":"https://patchwork.plctlab.org/api/1.2/patches/157200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-2-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:44","name":"[v25,01/33] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-2-kmatsui@gcc.gnu.org/mbox/"},{"id":157195,"url":"https://patchwork.plctlab.org/api/1.2/patches/157195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-3-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:45","name":"[v25,02/33] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-3-kmatsui@gcc.gnu.org/mbox/"},{"id":157199,"url":"https://patchwork.plctlab.org/api/1.2/patches/157199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-4-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:46","name":"[v25,03/33] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-4-kmatsui@gcc.gnu.org/mbox/"},{"id":157197,"url":"https://patchwork.plctlab.org/api/1.2/patches/157197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-5-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:47","name":"[v25,04/33] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-5-kmatsui@gcc.gnu.org/mbox/"},{"id":157196,"url":"https://patchwork.plctlab.org/api/1.2/patches/157196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-6-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:48","name":"[v25,05/33] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-6-kmatsui@gcc.gnu.org/mbox/"},{"id":157201,"url":"https://patchwork.plctlab.org/api/1.2/patches/157201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-9-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:51","name":"[v25,08/33] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-9-kmatsui@gcc.gnu.org/mbox/"},{"id":157203,"url":"https://patchwork.plctlab.org/api/1.2/patches/157203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-11-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:00:53","name":"[v25,10/33] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-11-kmatsui@gcc.gnu.org/mbox/"},{"id":157202,"url":"https://patchwork.plctlab.org/api/1.2/patches/157202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-23-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:01:05","name":"[v25,22/33] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-23-kmatsui@gcc.gnu.org/mbox/"},{"id":157198,"url":"https://patchwork.plctlab.org/api/1.2/patches/157198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-24-kmatsui@gcc.gnu.org/","msgid":"<20231024020424.699427-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-10-24T02:01:06","name":"[v25,23/33] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231024020424.699427-24-kmatsui@gcc.gnu.org/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-10/mbox/"},{"id":39,"url":"https://patchwork.plctlab.org/api/1.2/bundles/39/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-11/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-11","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":160173,"url":"https://patchwork.plctlab.org/api/1.2/patches/160173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com/","msgid":"<27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com>","list_archive_url":null,"date":"2023-10-31T15:47:00","name":"[pushed,PR111917,RA] : Fixing LRA cycling for multi-reg variable containing a fixed reg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com/mbox/"},{"id":160285,"url":"https://patchwork.plctlab.org/api/1.2/patches/160285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-1-christoph.muellner@vrull.eu/","msgid":"<20231031171123.569951-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-31T17:11:22","name":"[committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-1-christoph.muellner@vrull.eu/mbox/"},{"id":160284,"url":"https://patchwork.plctlab.org/api/1.2/patches/160284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-2-christoph.muellner@vrull.eu/","msgid":"<20231031171123.569951-2-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-10-31T17:11:23","name":"[committed,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031171123.569951-2-christoph.muellner@vrull.eu/mbox/"},{"id":160306,"url":"https://patchwork.plctlab.org/api/1.2/patches/160306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031181726.3944801-1-ppalka@redhat.com/","msgid":"<20231031181726.3944801-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-10-31T18:17:26","name":"c++: constantness of local var in constexpr fn [PR111703, PR112269]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031181726.3944801-1-ppalka@redhat.com/mbox/"},{"id":160309,"url":"https://patchwork.plctlab.org/api/1.2/patches/160309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031183504.832611-1-vineetg@rivosinc.com/","msgid":"<20231031183504.832611-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T18:35:04","name":"RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031183504.832611-1-vineetg@rivosinc.com/mbox/"},{"id":160311,"url":"https://patchwork.plctlab.org/api/1.2/patches/160311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b56c707834dbf0434545d5f66a92f4426bfa4d35.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-10-31T19:05:09","name":"Reduce false positives for -Wnonnull for VLA parameters [PR98541]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b56c707834dbf0434545d5f66a92f4426bfa4d35.camel@tugraz.at/mbox/"},{"id":160348,"url":"https://patchwork.plctlab.org/api/1.2/patches/160348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211552.1907869-1-dmalcolm@redhat.com/","msgid":"<20231031211552.1907869-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:52","name":"[pushed] pretty-print: gracefully handle null URLs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211552.1907869-1-dmalcolm@redhat.com/mbox/"},{"id":160349,"url":"https://patchwork.plctlab.org/api/1.2/patches/160349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211556.1907893-1-dmalcolm@redhat.com/","msgid":"<20231031211556.1907893-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:56","name":"[pushed] opts.cc: fix comment about DOCUMENTATION_ROOT_URL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211556.1907893-1-dmalcolm@redhat.com/mbox/"},{"id":160350,"url":"https://patchwork.plctlab.org/api/1.2/patches/160350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211559.1907917-1-dmalcolm@redhat.com/","msgid":"<20231031211559.1907917-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:15:59","name":"[pushed] libcpp: eliminate MACRO_MAP_EXPANSION_POINT_LOCATION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211559.1907917-1-dmalcolm@redhat.com/mbox/"},{"id":160351,"url":"https://patchwork.plctlab.org/api/1.2/patches/160351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211604.1907952-1-dmalcolm@redhat.com/","msgid":"<20231031211604.1907952-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-10-31T21:16:04","name":"[pushed] analyzer: move class record_layout to its own .h/.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031211604.1907952-1-dmalcolm@redhat.com/mbox/"},{"id":160379,"url":"https://patchwork.plctlab.org/api/1.2/patches/160379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031225144.24448-1-ewlu@rivosinc.com/","msgid":"<20231031225144.24448-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T22:51:44","name":"[RFC] Make genautomata.cc output reflect insn-attr.h expectation:","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031225144.24448-1-ewlu@rivosinc.com/mbox/"},{"id":160382,"url":"https://patchwork.plctlab.org/api/1.2/patches/160382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031232525.27391-1-patrick@rivosinc.com/","msgid":"<20231031232525.27391-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-10-31T23:25:25","name":"[v2] RISC-V: Enable ztso tests on rv32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231031232525.27391-1-patrick@rivosinc.com/mbox/"},{"id":160414,"url":"https://patchwork.plctlab.org/api/1.2/patches/160414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101005051.607257-1-juzhe.zhong@rivai.ai/","msgid":"<20231101005051.607257-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T00:50:51","name":"[Committed] NFC: Fix whitespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101005051.607257-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160419,"url":"https://patchwork.plctlab.org/api/1.2/patches/160419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101014302.2457445-1-juzhe.zhong@rivai.ai/","msgid":"<20231101014302.2457445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T01:43:02","name":"[Commit,Pending,V2] RISC-V: Support strided load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101014302.2457445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160437,"url":"https://patchwork.plctlab.org/api/1.2/patches/160437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101050512.33961-1-patrick@rivosinc.com/","msgid":"<20231101050512.33961-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T05:05:12","name":"RISC-V: Use riscv_subword_address for atomic_test_and_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101050512.33961-1-patrick@rivosinc.com/mbox/"},{"id":160443,"url":"https://patchwork.plctlab.org/api/1.2/patches/160443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101063519.33245-1-xuli1@eswincomputing.com/","msgid":"<20231101063519.33245-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-01T06:35:19","name":"RISC-V: Support vundefine intrinsics for tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101063519.33245-1-xuli1@eswincomputing.com/mbox/"},{"id":160449,"url":"https://patchwork.plctlab.org/api/1.2/patches/160449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101065639.158911-1-juzhe.zhong@rivai.ai/","msgid":"<20231101065639.158911-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-01T06:56:39","name":"RISC-V: Allow dest operand and accumulator operand overlap of widen reduction instruction[PR112327]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101065639.158911-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160493,"url":"https://patchwork.plctlab.org/api/1.2/patches/160493/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at/","msgid":"<01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-01T09:39:16","name":"RFC [PATCH] c: Add missing cases where vla sizes are not instrumented by UBSan [PR98608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01ed76d1286383f7a7e0a378be6c82bec12a2fd8.camel@tugraz.at/mbox/"},{"id":160495,"url":"https://patchwork.plctlab.org/api/1.2/patches/160495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bgAW=cxxv=H1N-gsfmeGM8uqC7wkfRCOw+x_D+EsM6hw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-01T09:45:37","name":"[PUSHED] i386: Improve stack protector patterns and peephole2s","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bgAW=cxxv=H1N-gsfmeGM8uqC7wkfRCOw+x_D+EsM6hw@mail.gmail.com/mbox/"},{"id":160500,"url":"https://patchwork.plctlab.org/api/1.2/patches/160500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101100822.2126091-1-hongtao.liu@intel.com/","msgid":"<20231101100822.2126091-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-01T10:08:22","name":"Support cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101100822.2126091-1-hongtao.liu@intel.com/mbox/"},{"id":160597,"url":"https://patchwork.plctlab.org/api/1.2/patches/160597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101161439.41429-1-patrick@rivosinc.com/","msgid":"<20231101161439.41429-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T16:14:39","name":"[v2] RISC-V: Use riscv_subword_address for atomic_test_and_set","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101161439.41429-1-patrick@rivosinc.com/mbox/"},{"id":160647,"url":"https://patchwork.plctlab.org/api/1.2/patches/160647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101181713.54765-1-ewlu@rivosinc.com/","msgid":"<20231101181713.54765-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T18:17:13","name":"RISC-V: Add check for types without insn reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101181713.54765-1-ewlu@rivosinc.com/mbox/"},{"id":160695,"url":"https://patchwork.plctlab.org/api/1.2/patches/160695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215132.879718-1-vineetg@rivosinc.com/","msgid":"<20231101215132.879718-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-01T21:51:32","name":"[[Committed] ] RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215132.879718-1-vineetg@rivosinc.com/mbox/"},{"id":160696,"url":"https://patchwork.plctlab.org/api/1.2/patches/160696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215457.3935908-1-lhyatt@gmail.com/","msgid":"<20231101215457.3935908-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-11-01T21:54:57","name":"preprocessor: Reinitialize frontend parser after loading a PCH [PR112319]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231101215457.3935908-1-lhyatt@gmail.com/mbox/"},{"id":160743,"url":"https://patchwork.plctlab.org/api/1.2/patches/160743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005432.21119-1-xuli1@eswincomputing.com/","msgid":"<20231102005432.21119-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-02T00:54:32","name":"RISC-V: Support vcreate intrinsics for non-tuple types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005432.21119-1-xuli1@eswincomputing.com/mbox/"},{"id":160744,"url":"https://patchwork.plctlab.org/api/1.2/patches/160744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005737.2418307-1-juzhe.zhong@rivai.ai/","msgid":"<20231102005737.2418307-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T00:57:37","name":"[tree-optimization/111721] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102005737.2418307-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160745,"url":"https://patchwork.plctlab.org/api/1.2/patches/160745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvxnemj.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-02T01:11:16","name":"testsuite: introduce hostedlib effective target","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvxnemj.fsf@lxoliva.fsfla.org/mbox/"},{"id":160752,"url":"https://patchwork.plctlab.org/api/1.2/patches/160752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102024651.2347027-1-juzhe.zhong@rivai.ai/","msgid":"<20231102024651.2347027-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T02:46:51","name":"[Committed] RISC-V: Fix redundant attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102024651.2347027-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160764,"url":"https://patchwork.plctlab.org/api/1.2/patches/160764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102030611.2653544-1-juzhe.zhong@rivai.ai/","msgid":"<20231102030611.2653544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T03:06:11","name":"RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102030611.2653544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160767,"url":"https://patchwork.plctlab.org/api/1.2/patches/160767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102031423.3751965-1-pan2.li@intel.com/","msgid":"<20231102031423.3751965-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-02T03:14:23","name":"[v1] EXPMED: Allow vector mode for DSE extract_low_bits [PR111720]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102031423.3751965-1-pan2.li@intel.com/mbox/"},{"id":160778,"url":"https://patchwork.plctlab.org/api/1.2/patches/160778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102033427.178709-1-juzhe.zhong@rivai.ai/","msgid":"<20231102033427.178709-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T03:34:27","name":"[V2] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102033427.178709-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160799,"url":"https://patchwork.plctlab.org/api/1.2/patches/160799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102075019.4111564-1-yunqiang.su@cipunited.com/","msgid":"<20231102075019.4111564-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-02T07:50:19","name":"MIPS: Use -mnan value for -mabs if not specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102075019.4111564-1-yunqiang.su@cipunited.com/mbox/"},{"id":160807,"url":"https://patchwork.plctlab.org/api/1.2/patches/160807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-1-sam@gentoo.org/","msgid":"<20231102084058.1142941-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:05","name":"[1/4] contrib: add generate_snapshot_index.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-1-sam@gentoo.org/mbox/"},{"id":160808,"url":"https://patchwork.plctlab.org/api/1.2/patches/160808/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-2-sam@gentoo.org/","msgid":"<20231102084058.1142941-2-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:06","name":"[2/4] maintainer-scripts/gcc_release: create index between snapshots <-> commits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-2-sam@gentoo.org/mbox/"},{"id":160809,"url":"https://patchwork.plctlab.org/api/1.2/patches/160809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-3-sam@gentoo.org/","msgid":"<20231102084058.1142941-3-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:07","name":"[3/4] maintainer-scripts/gcc_release: use HTTPS for links","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-3-sam@gentoo.org/mbox/"},{"id":160810,"url":"https://patchwork.plctlab.org/api/1.2/patches/160810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-4-sam@gentoo.org/","msgid":"<20231102084058.1142941-4-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T08:39:08","name":"[4/4] maintainer-scripts/gcc_release: cleanup whitespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084058.1142941-4-sam@gentoo.org/mbox/"},{"id":160811,"url":"https://patchwork.plctlab.org/api/1.2/patches/160811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084540.2869665-1-arsen@aarsen.me/","msgid":"<20231102084540.2869665-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-02T08:45:37","name":"[v3,2/2] *: add modern gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102084540.2869665-1-arsen@aarsen.me/mbox/"},{"id":160812,"url":"https://patchwork.plctlab.org/api/1.2/patches/160812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102090234.1145382-1-sam@gentoo.org/","msgid":"<20231102090234.1145382-1-sam@gentoo.org>","list_archive_url":null,"date":"2023-11-02T09:02:30","name":"doc: explicitly say '\''lifetime'\'' for DCE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102090234.1145382-1-sam@gentoo.org/mbox/"},{"id":160822,"url":"https://patchwork.plctlab.org/api/1.2/patches/160822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102103109.E2A02385B522@sourceware.org/","msgid":"<20231102103109.E2A02385B522@sourceware.org>","list_archive_url":null,"date":"2023-11-02T10:30:36","name":"tree-optimization/112320 - bougs debug IL after SCCP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102103109.E2A02385B522@sourceware.org/mbox/"},{"id":160838,"url":"https://patchwork.plctlab.org/api/1.2/patches/160838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102113023.2225297-1-juzhe.zhong@rivai.ai/","msgid":"<20231102113023.2225297-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-02T11:30:23","name":"RISC-V: Fix bug of AVL propagation PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102113023.2225297-1-juzhe.zhong@rivai.ai/mbox/"},{"id":160851,"url":"https://patchwork.plctlab.org/api/1.2/patches/160851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102114802.17020-1-pan2.li@intel.com/","msgid":"<20231102114802.17020-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-02T11:48:02","name":"[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102114802.17020-1-pan2.li@intel.com/mbox/"},{"id":160852,"url":"https://patchwork.plctlab.org/api/1.2/patches/160852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com/","msgid":"<025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-02T11:50:38","name":"[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift..","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/025901da0d82$cd5aa3f0$680febd0$@nextmovesoftware.com/mbox/"},{"id":160853,"url":"https://patchwork.plctlab.org/api/1.2/patches/160853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026501da0d83$457b0d20$d0712760$@nextmovesoftware.com/","msgid":"<026501da0d83$457b0d20$d0712760$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-02T11:54:00","name":"[AVR] Improvements to SImode and PSImode shifts by constants.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026501da0d83$457b0d20$d0712760$@nextmovesoftware.com/mbox/"},{"id":160869,"url":"https://patchwork.plctlab.org/api/1.2/patches/160869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124852.2156995-1-dmalcolm@redhat.com/","msgid":"<20231102124852.2156995-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T12:48:52","name":"[pushed] analyzer: fix clang warnings [PR112317]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124852.2156995-1-dmalcolm@redhat.com/mbox/"},{"id":160870,"url":"https://patchwork.plctlab.org/api/1.2/patches/160870/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124855.3226695-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231102124855.3226695-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-02T12:48:55","name":"Format gotools.sum closer to what DejaGnu does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102124855.3226695-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":160872,"url":"https://patchwork.plctlab.org/api/1.2/patches/160872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUOdUqCW0a8NIAuf@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-11-02T13:00:02","name":"[v2] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUOdUqCW0a8NIAuf@fkdesktop.suse.cz/mbox/"},{"id":160878,"url":"https://patchwork.plctlab.org/api/1.2/patches/160878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-2-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:30","name":"[1/4] c/c++: rework pragma parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-2-dmalcolm@redhat.com/mbox/"},{"id":160877,"url":"https://patchwork.plctlab.org/api/1.2/patches/160877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-3-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:31","name":"[2/4] c: add #pragma GCC show_layout","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-3-dmalcolm@redhat.com/mbox/"},{"id":160876,"url":"https://patchwork.plctlab.org/api/1.2/patches/160876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-4-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:32","name":"[3/4] diagnostics: add automatic URL-ification within messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-4-dmalcolm@redhat.com/mbox/"},{"id":160879,"url":"https://patchwork.plctlab.org/api/1.2/patches/160879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-5-dmalcolm@redhat.com/","msgid":"<20231102131933.2161191-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:19:33","name":"[4/4] RFC: add contrib/regenerate-index-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102131933.2161191-5-dmalcolm@redhat.com/mbox/"},{"id":160881,"url":"https://patchwork.plctlab.org/api/1.2/patches/160881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2697c64-9453-4b2b-9419-be4bf594d54e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T13:34:13","name":"[committed] Improve H8 sequences for single bit sign extractions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2697c64-9453-4b2b-9419-be4bf594d54e@gmail.com/mbox/"},{"id":160911,"url":"https://patchwork.plctlab.org/api/1.2/patches/160911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135439.2777314-1-jwakely@redhat.com/","msgid":"<20231102135439.2777314-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T13:53:56","name":"[committed] libstdc++: Fix warning during configure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135439.2777314-1-jwakely@redhat.com/mbox/"},{"id":160886,"url":"https://patchwork.plctlab.org/api/1.2/patches/160886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135719.33814-1-ibuclaw@gdcproject.org/","msgid":"<20231102135719.33814-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-02T13:57:19","name":"[committed] d: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e7","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102135719.33814-1-ibuclaw@gdcproject.org/mbox/"},{"id":160971,"url":"https://patchwork.plctlab.org/api/1.2/patches/160971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145434.2812083-1-jwakely@redhat.com/","msgid":"<20231102145434.2812083-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T14:54:01","name":"[committed] libstdc++: Add assertion to std::string_view::remove_suffix [PR112314]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145434.2812083-1-jwakely@redhat.com/mbox/"},{"id":160972,"url":"https://patchwork.plctlab.org/api/1.2/patches/160972/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145522.2813330-1-jwakely@redhat.com/","msgid":"<20231102145522.2813330-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-02T14:54:59","name":"libstdc++: Improve static assert messages for monadic operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102145522.2813330-1-jwakely@redhat.com/mbox/"},{"id":160910,"url":"https://patchwork.plctlab.org/api/1.2/patches/160910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/962ec283-a600-42e9-942a-7811d10f8f7b@arm.com/","msgid":"<962ec283-a600-42e9-942a-7811d10f8f7b@arm.com>","list_archive_url":null,"date":"2023-11-02T14:58:11","name":"vect: allow using inbranch simdclones for masked loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/962ec283-a600-42e9-942a-7811d10f8f7b@arm.com/mbox/"},{"id":160942,"url":"https://patchwork.plctlab.org/api/1.2/patches/160942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUPAK/ZeelV4yAIa@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T15:28:43","name":"[v3] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUPAK/ZeelV4yAIa@redhat.com/mbox/"},{"id":160989,"url":"https://patchwork.plctlab.org/api/1.2/patches/160989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-2-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:29","name":"[V3,1/6] aarch64: Sync system register information with Binutils","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-2-victor.donascimento@arm.com/mbox/"},{"id":160987,"url":"https://patchwork.plctlab.org/api/1.2/patches/160987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-3-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:30","name":"[V3,2/6] aarch64: Add support for aarch64-sys-regs.def","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-3-victor.donascimento@arm.com/mbox/"},{"id":160991,"url":"https://patchwork.plctlab.org/api/1.2/patches/160991/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-4-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-4-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:31","name":"[V3,3/6] aarch64: Implement system register validation tools","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-4-victor.donascimento@arm.com/mbox/"},{"id":160990,"url":"https://patchwork.plctlab.org/api/1.2/patches/160990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-5-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-5-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:32","name":"[V3,4/6] aarch64: Implement system register r/w arm ACLE intrinsic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-5-victor.donascimento@arm.com/mbox/"},{"id":160986,"url":"https://patchwork.plctlab.org/api/1.2/patches/160986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-6-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-6-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:33","name":"[V3,5/6] aarch64: Add front-end argument type checking for target builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-6-victor.donascimento@arm.com/mbox/"},{"id":160988,"url":"https://patchwork.plctlab.org/api/1.2/patches/160988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-7-victor.donascimento@arm.com/","msgid":"<20231102163852.1860658-7-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-02T16:38:34","name":"[V3,6/6] aarch64: Add system register duplication check selftest","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102163852.1860658-7-victor.donascimento@arm.com/mbox/"},{"id":161092,"url":"https://patchwork.plctlab.org/api/1.2/patches/161092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102190911.66763-1-patrick@rivosinc.com/","msgid":"<20231102190911.66763-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-02T19:09:11","name":"gfortran: Rely on dg-do-what-default to avoid running pr85853.f90, pr107254.f90 and vect-alias-check-1.F90 on non-vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102190911.66763-1-patrick@rivosinc.com/mbox/"},{"id":161110,"url":"https://patchwork.plctlab.org/api/1.2/patches/161110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102195652.9965-1-ben.sherman@chicagotrading.com/","msgid":"<20231102195652.9965-1-ben.sherman@chicagotrading.com>","list_archive_url":null,"date":"2023-11-02T19:56:53","name":"libstdc++: avoid uninitialized read in basic_string constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102195652.9965-1-ben.sherman@chicagotrading.com/mbox/"},{"id":161111,"url":"https://patchwork.plctlab.org/api/1.2/patches/161111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200104.723881-1-jason@redhat.com/","msgid":"<20231102200104.723881-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-02T20:01:04","name":"[pushed] c++: retval dtor on rethrow [PR112301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200104.723881-1-jason@redhat.com/mbox/"},{"id":161112,"url":"https://patchwork.plctlab.org/api/1.2/patches/161112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200129.724441-1-jason@redhat.com/","msgid":"<20231102200129.724441-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-02T20:01:29","name":"[pushed] c++: use hash_set in nrv_data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102200129.724441-1-jason@redhat.com/mbox/"},{"id":161122,"url":"https://patchwork.plctlab.org/api/1.2/patches/161122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed1ab120-cb87-4f1f-a219-0e0c6e8929e2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-02T20:50:21","name":"tree-optimization: Add register pressure heuristics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ed1ab120-cb87-4f1f-a219-0e0c6e8929e2@linux.ibm.com/mbox/"},{"id":161142,"url":"https://patchwork.plctlab.org/api/1.2/patches/161142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102234527.77231-1-patrick@rivosinc.com/","msgid":"<20231102234527.77231-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-02T23:45:27","name":"g++: Rely on dg-do-what-default to avoid running pr102788.cc on non-vector targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231102234527.77231-1-patrick@rivosinc.com/mbox/"},{"id":161145,"url":"https://patchwork.plctlab.org/api/1.2/patches/161145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103003603.3613011-1-juzhe.zhong@rivai.ai/","msgid":"<20231103003603.3613011-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T00:36:03","name":"[Committed,V3] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103003603.3613011-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161147,"url":"https://patchwork.plctlab.org/api/1.2/patches/161147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65444a6a.170a0220.5f247.11c7@mx.google.com/","msgid":"<65444a6a.170a0220.5f247.11c7@mx.google.com>","list_archive_url":null,"date":"2023-11-03T01:18:29","name":"c++: End lifetime of objects in constexpr after destructor call [PR71093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65444a6a.170a0220.5f247.11c7@mx.google.com/mbox/"},{"id":161152,"url":"https://patchwork.plctlab.org/api/1.2/patches/161152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVP8wFc_SLyWMjhD8sGeNk5XH=XSP7PN2MEY0e8cqWbmA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T03:04:26","name":"libstdc++ patch RFA: Fix dl_iterate_phdr configury for libbacktrace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOyqgcVP8wFc_SLyWMjhD8sGeNk5XH=XSP7PN2MEY0e8cqWbmA@mail.gmail.com/mbox/"},{"id":161155,"url":"https://patchwork.plctlab.org/api/1.2/patches/161155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103032634.2983364-1-pan2.li@intel.com/","msgid":"<20231103032634.2983364-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-03T03:26:34","name":"[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103032634.2983364-1-pan2.li@intel.com/mbox/"},{"id":161169,"url":"https://patchwork.plctlab.org/api/1.2/patches/161169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103061849.79159-1-patrick@rivosinc.com/","msgid":"<20231103061849.79159-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-03T06:18:49","name":"g++: Add require-effective-target to multi-input file testcase pr95401.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103061849.79159-1-patrick@rivosinc.com/mbox/"},{"id":161170,"url":"https://patchwork.plctlab.org/api/1.2/patches/161170/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103064113.823617-1-juzhe.zhong@rivai.ai/","msgid":"<20231103064113.823617-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T06:41:13","name":"[tree-optimization/111721,V2] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103064113.823617-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161191,"url":"https://patchwork.plctlab.org/api/1.2/patches/161191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKWiCVkVTrPbyRWExyg1vL3xqfBYk6_h0_o9s3Hpva1gg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T06:44:35","name":"[fortran] PR112316 - [13 Regression] Fix for PR87477 rejects valid code with a bogus error...","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiKWiCVkVTrPbyRWExyg1vL3xqfBYk6_h0_o9s3Hpva1gg@mail.gmail.com/mbox/"},{"id":161179,"url":"https://patchwork.plctlab.org/api/1.2/patches/161179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103071105.DE25413907@imap2.suse-dmz.suse.de/","msgid":"<20231103071105.DE25413907@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T07:11:05","name":"[doc] middle-end/112296 - __builtin_constant_p and side-effects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103071105.DE25413907@imap2.suse-dmz.suse.de/mbox/"},{"id":161190,"url":"https://patchwork.plctlab.org/api/1.2/patches/161190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee5ebd2a-2702-4c10-9efa-96672506e666@linux.vnet.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T07:44:22","name":"[v3] rs6000/p8swap: Fix incorrect lane extraction by vec_extract() [PR106770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ee5ebd2a-2702-4c10-9efa-96672506e666@linux.vnet.ibm.com/mbox/"},{"id":161206,"url":"https://patchwork.plctlab.org/api/1.2/patches/161206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103084827.1306269-1-juzhe.zhong@rivai.ai/","msgid":"<20231103084827.1306269-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-03T08:48:27","name":"OPTAB: Add mask_len_strided_load/mask_len_strided_store optab","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103084827.1306269-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161203,"url":"https://patchwork.plctlab.org/api/1.2/patches/161203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103090136.1672669-1-panchenghui@loongson.cn/","msgid":"<20231103090136.1672669-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-11-03T09:01:36","name":"[v1] LoongArch: Fix instruction name typo in lsx_vreplgr2vr_ template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103090136.1672669-1-panchenghui@loongson.cn/mbox/"},{"id":161227,"url":"https://patchwork.plctlab.org/api/1.2/patches/161227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bKQg28H+6fx4KtT9OFGMOf9xK1OiV4oPhyt3gJiG4k9g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T10:34:12","name":"[RFC,RFA] i386: Handle multiple address register classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4bKQg28H+6fx4KtT9OFGMOf9xK1OiV4oPhyt3gJiG4k9g@mail.gmail.com/mbox/"},{"id":161228,"url":"https://patchwork.plctlab.org/api/1.2/patches/161228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103103446.1B3F31348C@imap2.suse-dmz.suse.de/","msgid":"<20231103103446.1B3F31348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T10:34:45","name":"tree-optimization/112310 - code hoisting undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103103446.1B3F31348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161238,"url":"https://patchwork.plctlab.org/api/1.2/patches/161238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103110048.9D5211348C@imap2.suse-dmz.suse.de/","msgid":"<20231103110048.9D5211348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T11:00:48","name":"tree-optimization/112366 - remove assert for failed live lane code gen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103110048.9D5211348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161239,"url":"https://patchwork.plctlab.org/api/1.2/patches/161239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvvt7yt.fsf@euler.schwinge.homeip.net/","msgid":"<87msvvt7yt.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:03:06","name":"Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvvt7yt.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161241,"url":"https://patchwork.plctlab.org/api/1.2/patches/161241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqzt7qb.fsf@euler.schwinge.homeip.net/","msgid":"<87jzqzt7qb.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:08:12","name":"Skip a number of '\''g++.dg/compat/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqzt7qb.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161242,"url":"https://patchwork.plctlab.org/api/1.2/patches/161242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6m3t7mk.fsf@euler.schwinge.homeip.net/","msgid":"<87h6m3t7mk.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:10:27","name":"Skip a number of '\''g++.dg/lto/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ \"split files\" test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) te","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6m3t7mk.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161243,"url":"https://patchwork.plctlab.org/api/1.2/patches/161243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edh7t7ir.fsf@euler.schwinge.homeip.net/","msgid":"<87edh7t7ir.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T11:12:44","name":"Skip a number of '\''g++.dg/tree-prof/'\'' test cases for '\''-fno-exceptions'\'' testing (was: Skip a number of C++ test cases for '\''-fno-exceptions'\'' testing (was: Support in the GCC(/C++) test suites for '\''-fno-exceptions'\''))","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edh7t7ir.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161272,"url":"https://patchwork.plctlab.org/api/1.2/patches/161272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7fatws.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T12:44:03","name":"[pushed] aarch64: Remove unnecessary can_create_pseudo_p condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7fatws.fsf@arm.com/mbox/"},{"id":161274,"url":"https://patchwork.plctlab.org/api/1.2/patches/161274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103125401.3238220-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231103125401.3238220-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-03T12:54:01","name":"[v2] Format gotools.sum closer to what DejaGnu does","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103125401.3238220-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":161273,"url":"https://patchwork.plctlab.org/api/1.2/patches/161273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-03T12:54:33","name":"Fortran: Fix generate_error library function fnspec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6544edb1.c80a0220.1973f.13e3SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":161319,"url":"https://patchwork.plctlab.org/api/1.2/patches/161319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103141615.6FD4913907@imap2.suse-dmz.suse.de/","msgid":"<20231103141615.6FD4913907@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T14:16:15","name":"Cleanup vectorizable_live_operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103141615.6FD4913907@imap2.suse-dmz.suse.de/mbox/"},{"id":161330,"url":"https://patchwork.plctlab.org/api/1.2/patches/161330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103145431.910551348C@imap2.suse-dmz.suse.de/","msgid":"<20231103145431.910551348C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-03T14:54:31","name":"Testcases for vectorizer peeling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103145431.910551348C@imap2.suse-dmz.suse.de/mbox/"},{"id":161331,"url":"https://patchwork.plctlab.org/api/1.2/patches/161331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gavqdx.fsf@euler.schwinge.homeip.net/","msgid":"<87o7gavqdx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-03T14:54:34","name":"GCN: Address undeclared '\''NULL'\'' usage in '\''libgcc/config/gcn/gthr-gcn.h:__gthread_getspecific'\'' (was: [PATCH 1/3] Create GCN-specific gthreads)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87o7gavqdx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":161337,"url":"https://patchwork.plctlab.org/api/1.2/patches/161337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:08","name":"[v2,1/7] aarch64: Use br instead of ret for eh_return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e94445d1e342a47a9676c33376564e112fbc8af.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161341,"url":"https://patchwork.plctlab.org/api/1.2/patches/161341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae13c81e51afd2f628af10485d286b3dc7ab8daa.1699025214.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:36:14","name":"[v2,2/7] aarch64: Do not force a stack frame for EH returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ae13c81e51afd2f628af10485d286b3dc7ab8daa.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161339,"url":"https://patchwork.plctlab.org/api/1.2/patches/161339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:20","name":"[v2,3/7] aarch64: Add eh_return compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60a89113beb96fc0183c8ebc2a0dc8d6feb91478.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161342,"url":"https://patchwork.plctlab.org/api/1.2/patches/161342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:26","name":"[v2,4/7] aarch64: Disable branch-protection for pcs tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161338,"url":"https://patchwork.plctlab.org/api/1.2/patches/161338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com/","msgid":"<8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:32","name":"[v2,5/7] aarch64,arm: Remove accepted_branch_protection_string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ebe0679d0d92c8c39bffc98e1f30e2b29770e00.1699025214.git.szabolcs.nagy@arm.com/mbox/"},{"id":161340,"url":"https://patchwork.plctlab.org/api/1.2/patches/161340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb77dcc324aba915b045d65857d1f093e7d6815d.1699025215.git.szabolcs.nagy@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:36:38","name":"[v2,6/7] aarch64,arm: Fix branch-protection= parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cb77dcc324aba915b045d65857d1f093e7d6815d.1699025215.git.szabolcs.nagy@arm.com/mbox/"},{"id":161343,"url":"https://patchwork.plctlab.org/api/1.2/patches/161343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com/","msgid":"<69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-11-03T15:36:44","name":"[v2,7/7] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/69a6baa924519053eef92766189d23da1f7afa7c.1699025215.git.szabolcs.nagy@arm.com/mbox/"},{"id":161344,"url":"https://patchwork.plctlab.org/api/1.2/patches/161344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+=T6VRyKwhOaPv3mBVJyv9b9d5UKb-n-GroRCUuzRJQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T15:39:42","name":"[COMMITTED] : i386: Handle multiple address register classes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Y+=T6VRyKwhOaPv3mBVJyv9b9d5UKb-n-GroRCUuzRJQ@mail.gmail.com/mbox/"},{"id":161373,"url":"https://patchwork.plctlab.org/api/1.2/patches/161373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/14b069dc-711f-4643-97a0-b64142017f24@redhat.com/","msgid":"<14b069dc-711f-4643-97a0-b64142017f24@redhat.com>","list_archive_url":null,"date":"2023-11-03T17:14:19","name":"[COMMITTED,1/2] Remove simple ranges from trailing zero bitmasks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/14b069dc-711f-4643-97a0-b64142017f24@redhat.com/mbox/"},{"id":161374,"url":"https://patchwork.plctlab.org/api/1.2/patches/161374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9134381d-fb7e-4422-9435-d2709d109a36@redhat.com/","msgid":"<9134381d-fb7e-4422-9435-d2709d109a36@redhat.com>","list_archive_url":null,"date":"2023-11-03T17:14:32","name":"[COMMITTED,2/2] PR tree-optimization/111766 - Adjust operators equal and not_equal to check bitmasks against constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9134381d-fb7e-4422-9435-d2709d109a36@redhat.com/mbox/"},{"id":161389,"url":"https://patchwork.plctlab.org/api/1.2/patches/161389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103180241.2338051-1-dmalcolm@redhat.com/","msgid":"<20231103180241.2338051-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-03T18:02:41","name":"[pushed] diagnostics: consolidate group-handling fields in diagnostic_context","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231103180241.2338051-1-dmalcolm@redhat.com/mbox/"},{"id":161414,"url":"https://patchwork.plctlab.org/api/1.2/patches/161414/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUVGA1bODUejH+jE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-03T19:12:03","name":"attribs: Fix ICE with -Wno-attributes= [PR112339]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUVGA1bODUejH+jE@tucnak/mbox/"},{"id":161421,"url":"https://patchwork.plctlab.org/api/1.2/patches/161421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com/","msgid":"<00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-03T19:43:08","name":"[ARC] Provide a TARGET_FOLD_BUILTIN target hook.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00d401da0e8d$f9ea4b30$edbee190$@nextmovesoftware.com/mbox/"},{"id":161454,"url":"https://patchwork.plctlab.org/api/1.2/patches/161454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUV5ZDgmrPJlLSdd@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-03T22:51:16","name":"[v4] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUV5ZDgmrPJlLSdd@redhat.com/mbox/"},{"id":161509,"url":"https://patchwork.plctlab.org/api/1.2/patches/161509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104014106.2914085-1-pan2.li@intel.com/","msgid":"<20231104014106.2914085-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-04T01:41:06","name":"[v1] RISC-V: Remove HF modes of FP to INT rounding autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104014106.2914085-1-pan2.li@intel.com/mbox/"},{"id":161510,"url":"https://patchwork.plctlab.org/api/1.2/patches/161510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015331.2388202-1-dmalcolm@redhat.com/","msgid":"<20231104015331.2388202-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-04T01:53:31","name":"[pushed] diagnostics: convert diagnostic_context to a class","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015331.2388202-1-dmalcolm@redhat.com/mbox/"},{"id":161511,"url":"https://patchwork.plctlab.org/api/1.2/patches/161511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015955.2389603-1-dmalcolm@redhat.com/","msgid":"<20231104015955.2389603-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-04T01:59:55","name":"[pushed] diagnostics: add automatic URL-ification within messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104015955.2389603-1-dmalcolm@redhat.com/mbox/"},{"id":161540,"url":"https://patchwork.plctlab.org/api/1.2/patches/161540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX9vqowoNJhBq3L@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-04T08:15:58","name":"[committed] openmp: Add support for omp::directive and omp::sequence attributes in C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX9vqowoNJhBq3L@tucnak/mbox/"},{"id":161541,"url":"https://patchwork.plctlab.org/api/1.2/patches/161541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX99pqtT+0bL/8t@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-04T08:16:54","name":"[committed] openmp: Add omp::decl support for C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUX99pqtT+0bL/8t@tucnak/mbox/"},{"id":161557,"url":"https://patchwork.plctlab.org/api/1.2/patches/161557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104083347.3015361-1-jwakely@redhat.com/","msgid":"<20231104083347.3015361-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-04T08:33:03","name":"[committed] libstdc++: Replace \"_N\" in examples of naming conventions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104083347.3015361-1-jwakely@redhat.com/mbox/"},{"id":161558,"url":"https://patchwork.plctlab.org/api/1.2/patches/161558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104084442.3016638-1-jwakely@redhat.com/","msgid":"<20231104084442.3016638-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-04T08:44:11","name":"[committed] libstdc++: Use strerror_r in std::generic_category()::message(int) [PR110133]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104084442.3016638-1-jwakely@redhat.com/mbox/"},{"id":161595,"url":"https://patchwork.plctlab.org/api/1.2/patches/161595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104162318.4142088-1-slyich@gmail.com/","msgid":"<20231104162318.4142088-1-slyich@gmail.com>","list_archive_url":null,"date":"2023-11-04T16:23:18","name":"diagnostics: fix gcc-urlifier.cc bootstrap failure [PR112379]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231104162318.4142088-1-slyich@gmail.com/mbox/"},{"id":161615,"url":"https://patchwork.plctlab.org/api/1.2/patches/161615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105023744.2158302-1-juzhe.zhong@rivai.ai/","msgid":"<20231105023744.2158302-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-05T02:37:44","name":"[Committed] RISC-V: Fix bug of vlds attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105023744.2158302-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161624,"url":"https://patchwork.plctlab.org/api/1.2/patches/161624/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105093011.2038618-1-pan2.li@intel.com/","msgid":"<20231105093011.2038618-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-05T09:30:11","name":"[v1] RISC-V: Support FP rint to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231105093011.2038618-1-pan2.li@intel.com/mbox/"},{"id":161647,"url":"https://patchwork.plctlab.org/api/1.2/patches/161647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZG2WDVCdLtacVkulha-uk_Zc_jGWnffHmnXdaLViuAxMIESijh7Y6-Y-dxnq6e7njeAU47WSBVbTYkBKvY-U8G3xemu8dCalJ9bdv4eqo5E=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:06:09","name":"[v4,1/2] c++: Initial support for P0847R7 (Deducing this) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZG2WDVCdLtacVkulha-uk_Zc_jGWnffHmnXdaLViuAxMIESijh7Y6-Y-dxnq6e7njeAU47WSBVbTYkBKvY-U8G3xemu8dCalJ9bdv4eqo5E=@protonmail.com/mbox/"},{"id":161648,"url":"https://patchwork.plctlab.org/api/1.2/patches/161648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/RqBEJfZ4EpHLvN6GOqUoQV6JJ5d2ahvs7gLHynIQOKulN-kWOn0MN9lUwk82_hKCpdsZKyK8FS2KYmdTY2K7WQsqsXzy5p7IdFtX7sE5O-0=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:06:36","name":"[v4,2/2] c++: Diagnostics for P0847R7 (Deducing this) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/RqBEJfZ4EpHLvN6GOqUoQV6JJ5d2ahvs7gLHynIQOKulN-kWOn0MN9lUwk82_hKCpdsZKyK8FS2KYmdTY2K7WQsqsXzy5p7IdFtX7sE5O-0=@protonmail.com/mbox/"},{"id":161649,"url":"https://patchwork.plctlab.org/api/1.2/patches/161649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPhjCZKFuOB+84b-b_0a_uMq=bsT3HUks6Q7eCaJpDrrDQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T15:38:25","name":"Remove unnecessary \"& 1\" in year_month_day_last::day()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPhjCZKFuOB+84b-b_0a_uMq=bsT3HUks6Q7eCaJpDrrDQ@mail.gmail.com/mbox/"},{"id":161739,"url":"https://patchwork.plctlab.org/api/1.2/patches/161739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfS8IgWPHbXxQpU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:37:52","name":"[committed] openmp: Adjust handling of __has_attribute (omp::directive)/sequence and add omp::decl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfS8IgWPHbXxQpU@tucnak/mbox/"},{"id":161740,"url":"https://patchwork.plctlab.org/api/1.2/patches/161740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfTGznWFGz3Db61@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:38:35","name":"[committed] openmp: Mention C attribute syntax in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfTGznWFGz3Db61@tucnak/mbox/"},{"id":161741,"url":"https://patchwork.plctlab.org/api/1.2/patches/161741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfUB5r2Y7J3GPbv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-05T17:42:31","name":"c++: Fix error recovery ICE [PR112365]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUfUB5r2Y7J3GPbv@tucnak/mbox/"},{"id":161748,"url":"https://patchwork.plctlab.org/api/1.2/patches/161748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPjargvCuk4KNC+7Hs719JFmWeW9Fwx43nG9NH0AYWhBWw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:01:43","name":"Simplify year::is_leap().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAOfgUPjargvCuk4KNC+7Hs719JFmWeW9Fwx43nG9NH0AYWhBWw@mail.gmail.com/mbox/"},{"id":161750,"url":"https://patchwork.plctlab.org/api/1.2/patches/161750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l49hu0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:27:03","name":"[pushed] read-rtl: Fix infinite loop while parsing [...]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l49hu0.fsf@arm.com/mbox/"},{"id":161751,"url":"https://patchwork.plctlab.org/api/1.2/patches/161751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlebc9hnb.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:31:04","name":"[pushed] mode-switching: Remove unused bbnum field","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlebc9hnb.fsf@arm.com/mbox/"},{"id":161752,"url":"https://patchwork.plctlab.org/api/1.2/patches/161752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k9hla.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:32:17","name":"explow: Allow dynamic allocations after vregs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k9hla.fsf@arm.com/mbox/"},{"id":161753,"url":"https://patchwork.plctlab.org/api/1.2/patches/161753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs9hjr.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:33:12","name":"explow: Avoid unnecessary alignment operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs9hjr.fsf@arm.com/mbox/"},{"id":161756,"url":"https://patchwork.plctlab.org/api/1.2/patches/161756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuw82dh.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:46:18","name":"[01/12] mode-switching: Tweak the macro/hook documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuw82dh.fsf@arm.com/mbox/"},{"id":161757,"url":"https://patchwork.plctlab.org/api/1.2/patches/161757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l482cv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:46:40","name":"[02/12] mode-switching: Add note problem","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0l482cv.fsf@arm.com/mbox/"},{"id":161758,"url":"https://patchwork.plctlab.org/api/1.2/patches/161758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k82bn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:47:24","name":"[04/12] mode-switching: Fix the mode passed to the emit hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfs1k82bn.fsf@arm.com/mbox/"},{"id":161759,"url":"https://patchwork.plctlab.org/api/1.2/patches/161759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs82b3.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:47:44","name":"[05/12] mode-switching: Simplify recording of transparency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rs82b3.fsf@arm.com/mbox/"},{"id":161760,"url":"https://patchwork.plctlab.org/api/1.2/patches/161760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4ji082ag.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:07","name":"[06/12] mode-switching: Tweak entry/exit handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4ji082ag.fsf@arm.com/mbox/"},{"id":161761,"url":"https://patchwork.plctlab.org/api/1.2/patches/161761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1fc6npe.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:29","name":"[07/12] mode-switching: Allow targets to set the mode for EH handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1fc6npe.fsf@arm.com/mbox/"},{"id":161762,"url":"https://patchwork.plctlab.org/api/1.2/patches/161762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf5k6nos.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:48:51","name":"[08/12] mode-switching: Pass set of live registers to the needed hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf5k6nos.fsf@arm.com/mbox/"},{"id":161763,"url":"https://patchwork.plctlab.org/api/1.2/patches/161763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvs6nnx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:49:22","name":"[09/12] mode-switching: Pass the set of live registers to the after hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvs6nnx.fsf@arm.com/mbox/"},{"id":161764,"url":"https://patchwork.plctlab.org/api/1.2/patches/161764/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6m06nne.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:49:41","name":"[10/12] mode-switching: Use 1-based edge aux fields","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6m06nne.fsf@arm.com/mbox/"},{"id":161765,"url":"https://patchwork.plctlab.org/api/1.2/patches/161765/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkc86nmt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:50:02","name":"[11/12] mode-switching: Add a target-configurable confluence operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbkc86nmt.fsf@arm.com/mbox/"},{"id":161766,"url":"https://patchwork.plctlab.org/api/1.2/patches/161766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y2g6nm9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T18:50:22","name":"[12/12] mode-switching: Add a backprop hook","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y2g6nm9.fsf@arm.com/mbox/"},{"id":161772,"url":"https://patchwork.plctlab.org/api/1.2/patches/161772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aMEf2bBVU2-Fvy66v9kAESOKrJSe_SWNwc-tB3UABuXw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-05T20:02:18","name":"[committed] i386: Add LEGACY_INDEX_REG register class.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4aMEf2bBVU2-Fvy66v9kAESOKrJSe_SWNwc-tB3UABuXw@mail.gmail.com/mbox/"},{"id":161806,"url":"https://patchwork.plctlab.org/api/1.2/patches/161806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com/","msgid":"<92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T02:36:03","name":"[PATCH-2,rs6000] Enable vector mode for by pieces equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/92676187-37ed-4d1f-aad1-c8eb4c938fa5@linux.ibm.com/mbox/"},{"id":161807,"url":"https://patchwork.plctlab.org/api/1.2/patches/161807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com/","msgid":"<35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T02:38:57","name":"[PATCH-3,rs6000] Enable 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/35c10f52-facc-4da5-b3f9-d9a59dab424b@linux.ibm.com/mbox/"},{"id":161820,"url":"https://patchwork.plctlab.org/api/1.2/patches/161820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106033426.45920-1-juzhe.zhong@rivai.ai/","msgid":"<20231106033426.45920-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T03:34:26","name":"RISC-V: Enhance AVL propagation for complicate reduction auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106033426.45920-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161833,"url":"https://patchwork.plctlab.org/api/1.2/patches/161833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065205.290215-1-juzhe.zhong@rivai.ai/","msgid":"<20231106065205.290215-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T06:52:04","name":"[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065205.290215-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161834,"url":"https://patchwork.plctlab.org/api/1.2/patches/161834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065508.305413-1-juzhe.zhong@rivai.ai/","msgid":"<20231106065508.305413-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T06:55:08","name":"[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106065508.305413-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161840,"url":"https://patchwork.plctlab.org/api/1.2/patches/161840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106072004.3002543-1-guojiufu@linux.ibm.com/","msgid":"<20231106072004.3002543-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T07:20:04","name":"rs6000, testcase: Add require-effective-target has_arch_ppc64 to pr106550_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106072004.3002543-1-guojiufu@linux.ibm.com/mbox/"},{"id":161845,"url":"https://patchwork.plctlab.org/api/1.2/patches/161845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXqW9l8x4XH8wZ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:13","name":"[1/21] middle-end testsuite: Add more pragma novector to new tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXqW9l8x4XH8wZ@arm.com/mbox/"},{"id":161849,"url":"https://patchwork.plctlab.org/api/1.2/patches/161849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXvMPNnRWVys7f@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:32","name":"[2/21] middle-end testsuite: Add tests for early break vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiXvMPNnRWVys7f@arm.com/mbox/"},{"id":161848,"url":"https://patchwork.plctlab.org/api/1.2/patches/161848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiX060rI5bvYKzL@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:37:55","name":"[3/21] middle-end: Implement code motion and dependency analysis for early breaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiX060rI5bvYKzL@arm.com/mbox/"},{"id":161850,"url":"https://patchwork.plctlab.org/api/1.2/patches/161850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYCIg0KPALrH50@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:38:48","name":"[6/21] middle-end: support multiple exits in loop versioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYCIg0KPALrH50@arm.com/mbox/"},{"id":161851,"url":"https://patchwork.plctlab.org/api/1.2/patches/161851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYG7mRzlNStIYa@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:07","name":"[7/21] middle-end: update IV update code to support early breaks and arbitrary exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYG7mRzlNStIYa@arm.com/mbox/"},{"id":161852,"url":"https://patchwork.plctlab.org/api/1.2/patches/161852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYLW1r3kBr9Vvh@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:25","name":"[8/21] middle-end: update vectorizable_live_reduction with support for multiple exits and different exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYLW1r3kBr9Vvh@arm.com/mbox/"},{"id":161853,"url":"https://patchwork.plctlab.org/api/1.2/patches/161853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYTRUsWotTs677@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:39:57","name":"[10/21] middle-end: implement relevancy analysis support for control flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYTRUsWotTs677@arm.com/mbox/"},{"id":161904,"url":"https://patchwork.plctlab.org/api/1.2/patches/161904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYcOPCGYeyht2/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:40:32","name":"[12/21] middle-end: Add remaining changes to peeling and vectorizer to support early breaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYcOPCGYeyht2/@arm.com/mbox/"},{"id":161905,"url":"https://patchwork.plctlab.org/api/1.2/patches/161905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYgMOPSBbV8F+/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:40:48","name":"[13/21] middle-end: Update loop form analysis to support early break","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYgMOPSBbV8F+/@arm.com/mbox/"},{"id":161897,"url":"https://patchwork.plctlab.org/api/1.2/patches/161897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYlM8SDtLV3SaA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:08","name":"[14/21] middle-end: Change loop analysis from looking at at number of BB to actual cfg","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYlM8SDtLV3SaA@arm.com/mbox/"},{"id":161854,"url":"https://patchwork.plctlab.org/api/1.2/patches/161854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYpncaG9ka5vKl@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:26","name":"[15/21] middle-end: [RFC] conditionally support forcing final edge for debugging","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYpncaG9ka5vKl@arm.com/mbox/"},{"id":161894,"url":"https://patchwork.plctlab.org/api/1.2/patches/161894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYubLqDwbtatgQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:45","name":"[16/21] middle-end testsuite: un-xfail TSVC loops that check for exit control flow vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYubLqDwbtatgQ@arm.com/mbox/"},{"id":161910,"url":"https://patchwork.plctlab.org/api/1.2/patches/161910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYxpi9sMkZCiZ5@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:41:58","name":"[17/21] AArch64: Add implementation for vector cbranch for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiYxpi9sMkZCiZ5@arm.com/mbox/"},{"id":161895,"url":"https://patchwork.plctlab.org/api/1.2/patches/161895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY17ZhkfUlc4tp@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:15","name":"[18/21] AArch64: Add optimization for vector != cbranch fed into compare with 0 for Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY17ZhkfUlc4tp@arm.com/mbox/"},{"id":161909,"url":"https://patchwork.plctlab.org/api/1.2/patches/161909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY5kCaDxBhT5V/@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:30","name":"[19/21] AArch64: Add optimization for vector cbranch combining SVE and Advanced SIMD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY5kCaDxBhT5V/@arm.com/mbox/"},{"id":161911,"url":"https://patchwork.plctlab.org/api/1.2/patches/161911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY9RNjyt2BLJ/t@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:42:45","name":"[20/21] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiY9RNjyt2BLJ/t@arm.com/mbox/"},{"id":161855,"url":"https://patchwork.plctlab.org/api/1.2/patches/161855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiZBGiekebMPwxn@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T07:43:00","name":"[21/21] Arm: Add MVE cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUiZBGiekebMPwxn@arm.com/mbox/"},{"id":161856,"url":"https://patchwork.plctlab.org/api/1.2/patches/161856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075511.1165228-1-xry111@xry111.site/","msgid":"<20231106075511.1165228-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T07:50:25","name":"LoongArch: Disable relaxation if the assembler don'\''t support conditional branch relaxation [PR112330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075511.1165228-1-xry111@xry111.site/mbox/"},{"id":161858,"url":"https://patchwork.plctlab.org/api/1.2/patches/161858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075720.1166450-1-xry111@xry111.site/","msgid":"<20231106075720.1166450-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T07:57:02","name":"LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106075720.1166450-1-xry111@xry111.site/mbox/"},{"id":161879,"url":"https://patchwork.plctlab.org/api/1.2/patches/161879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106083302.2361300-1-pan2.li@intel.com/","msgid":"<20231106083302.2361300-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-06T08:33:02","name":"[v1] RISC-V: Adjust FP rint round tests for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106083302.2361300-1-pan2.li@intel.com/mbox/"},{"id":161898,"url":"https://patchwork.plctlab.org/api/1.2/patches/161898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106085622.5B5C93858439@sourceware.org/","msgid":"<20231106085622.5B5C93858439@sourceware.org>","list_archive_url":null,"date":"2023-11-06T08:55:58","name":"tree-optimization/112369 - strip_float_extensions and vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106085622.5B5C93858439@sourceware.org/mbox/"},{"id":161912,"url":"https://patchwork.plctlab.org/api/1.2/patches/161912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com/","msgid":"<201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com>","list_archive_url":null,"date":"2023-11-06T09:47:53","name":"[PATCH-3v2,rs6000] Enable 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/201dd572-e1fc-48c4-bd18-2f894ce31cb0@linux.ibm.com/mbox/"},{"id":161922,"url":"https://patchwork.plctlab.org/api/1.2/patches/161922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17982-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T10:20:01","name":"[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17982-tamar@arm.com/mbox/"},{"id":161923,"url":"https://patchwork.plctlab.org/api/1.2/patches/161923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUi94WJQcd9fq5vi@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T10:20:17","name":"[v3,2/2] middle-end match.pd: optimize fneg (fabs (x)) to copysign (x, -1) [PR109154]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUi94WJQcd9fq5vi@arm.com/mbox/"},{"id":161932,"url":"https://patchwork.plctlab.org/api/1.2/patches/161932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106103103.3374589-1-hongtao.liu@intel.com/","msgid":"<20231106103103.3374589-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-06T10:31:03","name":"Avoid generating RTL code when d->testing_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106103103.3374589-1-hongtao.liu@intel.com/mbox/"},{"id":161940,"url":"https://patchwork.plctlab.org/api/1.2/patches/161940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com/","msgid":"<3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com>","list_archive_url":null,"date":"2023-11-06T10:53:21","name":"[committed] libgfortran: Fix calloc call by swapping arg order [PR112364]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ff033dd-0187-48bb-ba7c-797232cb6000@codesourcery.com/mbox/"},{"id":161941,"url":"https://patchwork.plctlab.org/api/1.2/patches/161941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106105831.3861671-1-poulhies@adacore.com/","msgid":"<20231106105831.3861671-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T10:57:16","name":"testsuite: skip gcc.target/i386/pr106910-1.c test when using newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106105831.3861671-1-poulhies@adacore.com/mbox/"},{"id":161942,"url":"https://patchwork.plctlab.org/api/1.2/patches/161942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110013.3862412-1-poulhies@adacore.com/","msgid":"<20231106110013.3862412-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T10:59:18","name":"testsuite: require avx_runtime for some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110013.3862412-1-poulhies@adacore.com/mbox/"},{"id":161945,"url":"https://patchwork.plctlab.org/api/1.2/patches/161945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110153.3863209-1-poulhies@adacore.com/","msgid":"<20231106110153.3863209-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-06T11:01:17","name":"testsuite: refine gcc.dg/analyzer/fd-4.c test for newlib","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106110153.3863209-1-poulhies@adacore.com/mbox/"},{"id":161949,"url":"https://patchwork.plctlab.org/api/1.2/patches/161949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com/","msgid":"<701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com>","list_archive_url":null,"date":"2023-11-06T11:20:00","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/701bb1cb-e7e5-4b3a-ab87-11d03647644e@arm.com/mbox/"},{"id":161950,"url":"https://patchwork.plctlab.org/api/1.2/patches/161950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com/","msgid":"<21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com>","list_archive_url":null,"date":"2023-11-06T11:20:06","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/21f686aa-3fc1-4098-9888-0b5c6c95eae6@arm.com/mbox/"},{"id":161952,"url":"https://patchwork.plctlab.org/api/1.2/patches/161952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106113809.1193236-1-xry111@xry111.site/","msgid":"<20231106113809.1193236-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-06T11:36:04","name":"LoongArch: Remove redundant barrier instructions before LL-SC loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106113809.1193236-1-xry111@xry111.site/mbox/"},{"id":161954,"url":"https://patchwork.plctlab.org/api/1.2/patches/161954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-2-mikael@gcc.gnu.org/","msgid":"<20231106114325.828968-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-06T11:43:24","name":"[1/2] libgfortran: Remove early return if extent is zero [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-2-mikael@gcc.gnu.org/mbox/"},{"id":161953,"url":"https://patchwork.plctlab.org/api/1.2/patches/161953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-3-mikael@gcc.gnu.org/","msgid":"<20231106114325.828968-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-06T11:43:25","name":"[2/2] libgfortran: Remove empty array descriptor first dimension overwrite [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106114325.828968-3-mikael@gcc.gnu.org/mbox/"},{"id":161956,"url":"https://patchwork.plctlab.org/api/1.2/patches/161956/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106115232.8F584385842C@sourceware.org/","msgid":"<20231106115232.8F584385842C@sourceware.org>","list_archive_url":null,"date":"2023-11-06T11:52:08","name":"libstdc++/112351 - deal with __gthread_once failure during locale init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106115232.8F584385842C@sourceware.org/mbox/"},{"id":161993,"url":"https://patchwork.plctlab.org/api/1.2/patches/161993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7bcbp5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:23:34","name":"[1/3] attribs: Cache the gnu namespace","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt8r7bcbp5.fsf@arm.com/mbox/"},{"id":161994,"url":"https://patchwork.plctlab.org/api/1.2/patches/161994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuvax2x.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:24:38","name":"[3/3] attribs: Namespace-aware lookup_attribute_spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmuvax2x.fsf@arm.com/mbox/"},{"id":161995,"url":"https://patchwork.plctlab.org/api/1.2/patches/161995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106122643.3639195-1-juzhe.zhong@rivai.ai/","msgid":"<20231106122643.3639195-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T12:26:43","name":"RISC-V: Early expand DImode vec_duplicate in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106122643.3639195-1-juzhe.zhong@rivai.ai/mbox/"},{"id":161996,"url":"https://patchwork.plctlab.org/api/1.2/patches/161996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvrawsm.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T12:30:49","name":"Ping: [PATCH] Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsvrawsm.fsf@arm.com/mbox/"},{"id":162007,"url":"https://patchwork.plctlab.org/api/1.2/patches/162007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130145.3265828-1-maxim.a.blinov@gmail.com/","msgid":"<20231106130145.3265828-1-maxim.a.blinov@gmail.com>","list_archive_url":null,"date":"2023-11-06T13:01:45","name":"RISC-V: VECT: Remember to assert any_known_not_updated_vssa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130145.3265828-1-maxim.a.blinov@gmail.com/mbox/"},{"id":162009,"url":"https://patchwork.plctlab.org/api/1.2/patches/162009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130916.CCDC43875DF2@sourceware.org/","msgid":"<20231106130916.CCDC43875DF2@sourceware.org>","list_archive_url":null,"date":"2023-11-06T13:08:53","name":"tree-optimization/112404 - two issues with SLP of .MASK_LOAD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106130916.CCDC43875DF2@sourceware.org/mbox/"},{"id":162013,"url":"https://patchwork.plctlab.org/api/1.2/patches/162013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106131540.54A2C3836E85@sourceware.org/","msgid":"<20231106131540.54A2C3836E85@sourceware.org>","list_archive_url":null,"date":"2023-11-06T13:14:23","name":"tree-optimization/111950 - vectorizer loop copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106131540.54A2C3836E85@sourceware.org/mbox/"},{"id":162025,"url":"https://patchwork.plctlab.org/api/1.2/patches/162025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhzgemo.fsf@oldenburg.str.redhat.com/","msgid":"<874jhzgemo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T14:06:39","name":"[v2] c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhzgemo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162027,"url":"https://patchwork.plctlab.org/api/1.2/patches/162027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141248.1378051-1-juzhe.zhong@rivai.ai/","msgid":"<20231106141248.1378051-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T14:12:48","name":"[V2] RISC-V: Early expand DImode vec_duplicate in RV32 system","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141248.1378051-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162028,"url":"https://patchwork.plctlab.org/api/1.2/patches/162028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141623.3076456-1-pan2.li@intel.com/","msgid":"<20231106141623.3076456-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-06T14:16:23","name":"[v1] RISC-V: Support FP round to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106141623.3076456-1-pan2.li@intel.com/mbox/"},{"id":162038,"url":"https://patchwork.plctlab.org/api/1.2/patches/162038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106143107.F09F23861824@sourceware.org/","msgid":"<20231106143107.F09F23861824@sourceware.org>","list_archive_url":null,"date":"2023-11-06T14:30:41","name":"tree-optimization/112405 - SIMD clone calls with (loop) mask","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106143107.F09F23861824@sourceware.org/mbox/"},{"id":162043,"url":"https://patchwork.plctlab.org/api/1.2/patches/162043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqvudxr.fsf@euler.schwinge.homeip.net/","msgid":"<87jzqvudxr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-06T14:57:52","name":"nvptx: Use the usual '\''#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)'\'' (was: libstdc++ \"freestanding\" ('\''--disable-hosted-libstdcxx'\'') with '\''-fno-rtti'\'', '\''-fno-exceptions'\'': '\''libstdc++-v3/libsupc++/tinfo.cc'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqvudxr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":162044,"url":"https://patchwork.plctlab.org/api/1.2/patches/162044/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f232d697-dff3-8aed-2e27-516903bcfe8@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T15:03:25","name":"[committed] c: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR107954]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f232d697-dff3-8aed-2e27-516903bcfe8@codesourcery.com/mbox/"},{"id":162049,"url":"https://patchwork.plctlab.org/api/1.2/patches/162049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4agoL5PDAy+7_OOi32LBWgTyBk53bcFN7cS2D=LqAfXPQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T15:31:10","name":"[committed] i386: Use \"addr\" attribute to limit address regclass to non-REX regs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4agoL5PDAy+7_OOi32LBWgTyBk53bcFN7cS2D=LqAfXPQ@mail.gmail.com/mbox/"},{"id":162068,"url":"https://patchwork.plctlab.org/api/1.2/patches/162068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com/","msgid":"<05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com>","list_archive_url":null,"date":"2023-11-06T16:05:02","name":"libgomp.texi: Update OpenMP 6.0-preview implementation-status list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05120dc8-a98c-4518-996a-7fb6c32a3b63@codesourcery.com/mbox/"},{"id":162091,"url":"https://patchwork.plctlab.org/api/1.2/patches/162091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-06T17:03:05","name":"Fix configure script comments(!?!) (Was: Re: [PATCH] genemit: Split insn-emit.cc into ten files)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65491c69.670a0220.24aca.643bSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":162095,"url":"https://patchwork.plctlab.org/api/1.2/patches/162095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com/","msgid":"<01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-06T17:30:06","name":"[ARC] Improved DImode rotates and right shifts by one bit.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01fd01da10d6$e3c2ef60$ab48ce20$@nextmovesoftware.com/mbox/"},{"id":162096,"url":"https://patchwork.plctlab.org/api/1.2/patches/162096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvqeqbc.fsf@oldenburg.str.redhat.com/","msgid":"<87msvqeqbc.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T17:37:11","name":"c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msvqeqbc.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162097,"url":"https://patchwork.plctlab.org/api/1.2/patches/162097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il6eeq9v.fsf@oldenburg.str.redhat.com/","msgid":"<87il6eeq9v.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-06T17:38:04","name":"Avoid undeclared use of abort in gcc.dg/cpp/wchar-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il6eeq9v.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162108,"url":"https://patchwork.plctlab.org/api/1.2/patches/162108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb7ee1e7-ffae-4aeb-9bc3-d2483d1c8394@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T18:15:06","name":"[GCC13] PR tree-optimization/105834 - Choose better initial values for ranger.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bb7ee1e7-ffae-4aeb-9bc3-d2483d1c8394@redhat.com/mbox/"},{"id":162122,"url":"https://patchwork.plctlab.org/api/1.2/patches/162122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com/","msgid":"<02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-06T18:37:15","name":"[ARC] Consistent use of whitespace in assembler templates.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02c901da10e0$4537e260$cfa7a720$@nextmovesoftware.com/mbox/"},{"id":162151,"url":"https://patchwork.plctlab.org/api/1.2/patches/162151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194442.1446416-1-christoph.muellner@vrull.eu/","msgid":"<20231106194442.1446416-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-06T19:44:42","name":"RISC-V: Add ABI requirement for XTheadFMemIdx tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194442.1446416-1-christoph.muellner@vrull.eu/mbox/"},{"id":162153,"url":"https://patchwork.plctlab.org/api/1.2/patches/162153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-1-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:32","name":"[pushed,1/4] diagnostics: eliminate diagnostic_kind_count","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-1-dmalcolm@redhat.com/mbox/"},{"id":162152,"url":"https://patchwork.plctlab.org/api/1.2/patches/162152/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-2-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:33","name":"[pushed,2/4] diagnostics: make diagnostic_context::m_urlifier private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-2-dmalcolm@redhat.com/mbox/"},{"id":162154,"url":"https://patchwork.plctlab.org/api/1.2/patches/162154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-3-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:34","name":"[pushed,3/4] diagnostics: introduce class diagnostic_option_classifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-3-dmalcolm@redhat.com/mbox/"},{"id":162155,"url":"https://patchwork.plctlab.org/api/1.2/patches/162155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-4-dmalcolm@redhat.com/","msgid":"<20231106194935.2693735-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T19:49:35","name":"[pushed,4/4] diagnostics: split out struct diagnostic_source_printing_options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106194935.2693735-4-dmalcolm@redhat.com/mbox/"},{"id":162181,"url":"https://patchwork.plctlab.org/api/1.2/patches/162181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlUVdALm2uEQCcE@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-06T21:02:13","name":"[committed] hppa: Enable generation of GNU stack notes on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlUVdALm2uEQCcE@mx3210.localdomain/mbox/"},{"id":162185,"url":"https://patchwork.plctlab.org/api/1.2/patches/162185/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlVN8QURPmBlipa@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-06T21:05:59","name":"[committed] hppa: Fix typo in PA 2.0 trampoline template","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlVN8QURPmBlipa@mx3210.localdomain/mbox/"},{"id":162206,"url":"https://patchwork.plctlab.org/api/1.2/patches/162206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106222959.2707741-3-dmalcolm@redhat.com/","msgid":"<20231106222959.2707741-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-06T22:29:58","name":"[2/2] libdiagnostics: work-in-progress implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106222959.2707741-3-dmalcolm@redhat.com/mbox/"},{"id":162208,"url":"https://patchwork.plctlab.org/api/1.2/patches/162208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlp93ZwnARyoEia@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-06T22:34:31","name":"[v4] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUlp93ZwnARyoEia@redhat.com/mbox/"},{"id":162207,"url":"https://patchwork.plctlab.org/api/1.2/patches/162207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223503.3271116-1-juzhe.zhong@rivai.ai/","msgid":"<20231106223503.3271116-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T22:35:03","name":"test: Fix XPASS of bb-slp-43.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223503.3271116-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162209,"url":"https://patchwork.plctlab.org/api/1.2/patches/162209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223531.3271166-1-juzhe.zhong@rivai.ai/","msgid":"<20231106223531.3271166-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T22:35:31","name":"test: Fix XPASS of bb-slp-43.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106223531.3271166-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162223,"url":"https://patchwork.plctlab.org/api/1.2/patches/162223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106230343.3273494-1-juzhe.zhong@rivai.ai/","msgid":"<20231106230343.3273494-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-06T23:03:43","name":"test: Fix FAIL of bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231106230343.3273494-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162238,"url":"https://patchwork.plctlab.org/api/1.2/patches/162238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7a8cc9f-bd7c-7d56-61d3-e5a95f2ee7af@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-07T00:20:43","name":"c: Refer more consistently to C23 not C2X","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7a8cc9f-bd7c-7d56-61d3-e5a95f2ee7af@codesourcery.com/mbox/"},{"id":162243,"url":"https://patchwork.plctlab.org/api/1.2/patches/162243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107022734.368277-1-haochen.jiang@intel.com/","msgid":"<20231107022734.368277-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-07T02:27:34","name":"i386: Fix isa attribute for TI/TF andnot mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107022734.368277-1-haochen.jiang@intel.com/mbox/"},{"id":162244,"url":"https://patchwork.plctlab.org/api/1.2/patches/162244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107023212.3383839-1-juzhe.zhong@rivai.ai/","msgid":"<20231107023212.3383839-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T02:32:12","name":"RISC-V regression test: Fix FAIL of bb-slp-39.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107023212.3383839-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162251,"url":"https://patchwork.plctlab.org/api/1.2/patches/162251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107030415.1105-1-jinma@linux.alibaba.com/","msgid":"<20231107030415.1105-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-07T03:04:15","name":"riscv: thead: Add support for the XTheadInt ISA extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107030415.1105-1-jinma@linux.alibaba.com/mbox/"},{"id":162255,"url":"https://patchwork.plctlab.org/api/1.2/patches/162255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107033644.3733354-1-juzhe.zhong@rivai.ai/","msgid":"<20231107033644.3733354-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T03:36:44","name":"test: Fix FAIL of SAD tests for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107033644.3733354-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162256,"url":"https://patchwork.plctlab.org/api/1.2/patches/162256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035014.3880317-1-juzhe.zhong@rivai.ai/","msgid":"<20231107035014.3880317-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T03:50:14","name":"test: Fix FAIL of vect-sdiv-pow2-1.c for RVV test: Fix FAIL of vect-sdiv-pow2-1.c for RVV#","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035014.3880317-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162259,"url":"https://patchwork.plctlab.org/api/1.2/patches/162259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035339.28242-1-chenxiaolong@loongson.cn/","msgid":"<20231107035339.28242-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-07T03:53:39","name":"[v1] LoongArch: Add instructions for the use of vector functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107035339.28242-1-chenxiaolong@loongson.cn/mbox/"},{"id":162260,"url":"https://patchwork.plctlab.org/api/1.2/patches/162260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107040606.332-1-chenxiaolong@loongson.cn/","msgid":"<20231107040606.332-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-07T04:06:06","name":"[v1] LoongArch: Add modifiers for lsx and lasx.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107040606.332-1-chenxiaolong@loongson.cn/mbox/"},{"id":162276,"url":"https://patchwork.plctlab.org/api/1.2/patches/162276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107060539.443303-1-hongtao.liu@intel.com/","msgid":"<20231107060539.443303-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-07T06:05:39","name":"[V2] Handle bitop with INTEGER_CST in analyze_and_compute_bitop_with_inv_effect.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107060539.443303-1-hongtao.liu@intel.com/mbox/"},{"id":162284,"url":"https://patchwork.plctlab.org/api/1.2/patches/162284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107064115.1848826-1-pan2.li@intel.com/","msgid":"<20231107064115.1848826-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-07T06:41:15","name":"[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107064115.1848826-1-pan2.li@intel.com/mbox/"},{"id":162294,"url":"https://patchwork.plctlab.org/api/1.2/patches/162294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107073321.479349-1-hongyu.wang@intel.com/","msgid":"<20231107073321.479349-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-07T07:33:21","name":"[i386] APX: Fix ICE due to movti postreload splitter [PR112394]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107073321.479349-1-hongyu.wang@intel.com/mbox/"},{"id":162295,"url":"https://patchwork.plctlab.org/api/1.2/patches/162295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074451.3990710-1-juzhe.zhong@rivai.ai/","msgid":"<20231107074451.3990710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T07:44:51","name":"test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074451.3990710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162296,"url":"https://patchwork.plctlab.org/api/1.2/patches/162296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074933.4025916-1-lehua.ding@rivai.ai/","msgid":"<20231107074933.4025916-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-07T07:49:33","name":"RISC-V: Fixed failed rvv combine testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107074933.4025916-1-lehua.ding@rivai.ai/mbox/"},{"id":162301,"url":"https://patchwork.plctlab.org/api/1.2/patches/162301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107080627.4178732-1-juzhe.zhong@rivai.ai/","msgid":"<20231107080627.4178732-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T08:06:27","name":"RISC-V regression test: Fix FAIL bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107080627.4178732-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162317,"url":"https://patchwork.plctlab.org/api/1.2/patches/162317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107084725.178816-1-juzhe.zhong@rivai.ai/","msgid":"<20231107084725.178816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T08:47:25","name":"test: Fix bb-slp-33.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107084725.178816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162324,"url":"https://patchwork.plctlab.org/api/1.2/patches/162324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091854.3904987-1-poulhies@adacore.com/","msgid":"<20231107091854.3904987-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:18:54","name":"[COMMITTED] ada: Fix internal error on address of element of packed array component","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091854.3904987-1-poulhies@adacore.com/mbox/"},{"id":162325,"url":"https://patchwork.plctlab.org/api/1.2/patches/162325/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091907.3905160-1-poulhies@adacore.com/","msgid":"<20231107091907.3905160-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:06","name":"[COMMITTED] ada: Fix scope of semantic style_check pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091907.3905160-1-poulhies@adacore.com/mbox/"},{"id":162328,"url":"https://patchwork.plctlab.org/api/1.2/patches/162328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091912.3905235-1-poulhies@adacore.com/","msgid":"<20231107091912.3905235-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:12","name":"[COMMITTED] ada: Simplify code for Ignore_Style_Checks_Pragmas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091912.3905235-1-poulhies@adacore.com/mbox/"},{"id":162329,"url":"https://patchwork.plctlab.org/api/1.2/patches/162329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091915.3905306-1-poulhies@adacore.com/","msgid":"<20231107091915.3905306-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:15","name":"[COMMITTED] ada: Fix handling of actual subtypes for expanded names","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091915.3905306-1-poulhies@adacore.com/mbox/"},{"id":162326,"url":"https://patchwork.plctlab.org/api/1.2/patches/162326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091919.3905379-1-poulhies@adacore.com/","msgid":"<20231107091919.3905379-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:19","name":"[COMMITTED] ada: Cleanup getting of actual subtypes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091919.3905379-1-poulhies@adacore.com/mbox/"},{"id":162327,"url":"https://patchwork.plctlab.org/api/1.2/patches/162327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091929.3905481-1-poulhies@adacore.com/","msgid":"<20231107091929.3905481-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:29","name":"[COMMITTED] ada: Fix style in declaration of routine for expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091929.3905481-1-poulhies@adacore.com/mbox/"},{"id":162331,"url":"https://patchwork.plctlab.org/api/1.2/patches/162331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091932.3905575-1-poulhies@adacore.com/","msgid":"<20231107091932.3905575-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:32","name":"[COMMITTED] ada: Change local variables to constants in expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091932.3905575-1-poulhies@adacore.com/mbox/"},{"id":162335,"url":"https://patchwork.plctlab.org/api/1.2/patches/162335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091937.3905649-1-poulhies@adacore.com/","msgid":"<20231107091937.3905649-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:37","name":"[COMMITTED] ada: Simplify handling of known values in expansion of packed arrays","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091937.3905649-1-poulhies@adacore.com/mbox/"},{"id":162333,"url":"https://patchwork.plctlab.org/api/1.2/patches/162333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091942.3905723-1-poulhies@adacore.com/","msgid":"<20231107091942.3905723-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:42","name":"[COMMITTED] ada: Avoid extra conversion in expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091942.3905723-1-poulhies@adacore.com/mbox/"},{"id":162337,"url":"https://patchwork.plctlab.org/api/1.2/patches/162337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091945.3905796-1-poulhies@adacore.com/","msgid":"<20231107091945.3905796-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:45","name":"[COMMITTED] ada: Fix extra whitespace after END keywords","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091945.3905796-1-poulhies@adacore.com/mbox/"},{"id":162334,"url":"https://patchwork.plctlab.org/api/1.2/patches/162334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091951.3905875-1-poulhies@adacore.com/","msgid":"<20231107091951.3905875-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:51","name":"[COMMITTED] ada: Simplify expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091951.3905875-1-poulhies@adacore.com/mbox/"},{"id":162340,"url":"https://patchwork.plctlab.org/api/1.2/patches/162340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091954.3905945-1-poulhies@adacore.com/","msgid":"<20231107091954.3905945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:54","name":"[COMMITTED] ada: Remove duplicated code for expansion of packed array assignments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091954.3905945-1-poulhies@adacore.com/mbox/"},{"id":162330,"url":"https://patchwork.plctlab.org/api/1.2/patches/162330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091958.3906017-1-poulhies@adacore.com/","msgid":"<20231107091958.3906017-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:19:58","name":"[COMMITTED] ada: Error in prefix-notation call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107091958.3906017-1-poulhies@adacore.com/mbox/"},{"id":162347,"url":"https://patchwork.plctlab.org/api/1.2/patches/162347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092005.3906089-1-poulhies@adacore.com/","msgid":"<20231107092005.3906089-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:01","name":"[COMMITTED] ada: New Local_Restrictions and User_Aspect aspects.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092005.3906089-1-poulhies@adacore.com/mbox/"},{"id":162339,"url":"https://patchwork.plctlab.org/api/1.2/patches/162339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092009.3906170-1-poulhies@adacore.com/","msgid":"<20231107092009.3906170-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:09","name":"[COMMITTED] ada: Fix documentation of -gnatwc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092009.3906170-1-poulhies@adacore.com/mbox/"},{"id":162343,"url":"https://patchwork.plctlab.org/api/1.2/patches/162343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092012.3906244-1-poulhies@adacore.com/","msgid":"<20231107092012.3906244-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:12","name":"[COMMITTED] ada: Cleanup more \"not Present\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092012.3906244-1-poulhies@adacore.com/mbox/"},{"id":162341,"url":"https://patchwork.plctlab.org/api/1.2/patches/162341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092015.3906320-1-poulhies@adacore.com/","msgid":"<20231107092015.3906320-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:15","name":"[COMMITTED] ada: Cleanup \"not Present\" on List_Id","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092015.3906320-1-poulhies@adacore.com/mbox/"},{"id":162348,"url":"https://patchwork.plctlab.org/api/1.2/patches/162348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092018.3906393-1-poulhies@adacore.com/","msgid":"<20231107092018.3906393-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:18","name":"[COMMITTED] ada: Minor tweaks for comparison operators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092018.3906393-1-poulhies@adacore.com/mbox/"},{"id":162349,"url":"https://patchwork.plctlab.org/api/1.2/patches/162349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092022.3906466-1-poulhies@adacore.com/","msgid":"<20231107092022.3906466-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:21","name":"[COMMITTED] ada: Implement Aspects as fields under nodes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092022.3906466-1-poulhies@adacore.com/mbox/"},{"id":162350,"url":"https://patchwork.plctlab.org/api/1.2/patches/162350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092027.3906542-1-poulhies@adacore.com/","msgid":"<20231107092027.3906542-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:27","name":"[COMMITTED] ada: Rename Is_Limited_View to reflect actual query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092027.3906542-1-poulhies@adacore.com/mbox/"},{"id":162332,"url":"https://patchwork.plctlab.org/api/1.2/patches/162332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092031.3906616-1-poulhies@adacore.com/","msgid":"<20231107092031.3906616-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:31","name":"[COMMITTED] ada: Fix expansion of type aspects with handling of aspects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092031.3906616-1-poulhies@adacore.com/mbox/"},{"id":162345,"url":"https://patchwork.plctlab.org/api/1.2/patches/162345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092034.3906691-1-poulhies@adacore.com/","msgid":"<20231107092034.3906691-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:33","name":"[COMMITTED] ada: Elide temporary for aliased array with unconstrained nominal subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092034.3906691-1-poulhies@adacore.com/mbox/"},{"id":162346,"url":"https://patchwork.plctlab.org/api/1.2/patches/162346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092036.3906764-1-poulhies@adacore.com/","msgid":"<20231107092036.3906764-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:36","name":"[COMMITTED] ada: Fix Ada.Directories.Modification_Time on Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092036.3906764-1-poulhies@adacore.com/mbox/"},{"id":162336,"url":"https://patchwork.plctlab.org/api/1.2/patches/162336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092039.3906837-1-poulhies@adacore.com/","msgid":"<20231107092039.3906837-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:39","name":"[COMMITTED] ada: Fix incorrect resolution of overloaded function call in instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092039.3906837-1-poulhies@adacore.com/mbox/"},{"id":162351,"url":"https://patchwork.plctlab.org/api/1.2/patches/162351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092042.3906911-1-poulhies@adacore.com/","msgid":"<20231107092042.3906911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:42","name":"[COMMITTED] ada: Update the logo in the gnat doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092042.3906911-1-poulhies@adacore.com/mbox/"},{"id":162342,"url":"https://patchwork.plctlab.org/api/1.2/patches/162342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092045.3906982-1-poulhies@adacore.com/","msgid":"<20231107092045.3906982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:45","name":"[COMMITTED] ada: Compiler crash on early alignment clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092045.3906982-1-poulhies@adacore.com/mbox/"},{"id":162352,"url":"https://patchwork.plctlab.org/api/1.2/patches/162352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092047.3907065-1-poulhies@adacore.com/","msgid":"<20231107092047.3907065-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:47","name":"[COMMITTED] ada: Fix spurious -Wstringop-overflow with link time optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092047.3907065-1-poulhies@adacore.com/mbox/"},{"id":162338,"url":"https://patchwork.plctlab.org/api/1.2/patches/162338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092050.3907141-1-poulhies@adacore.com/","msgid":"<20231107092050.3907141-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-07T09:20:50","name":"[COMMITTED] ada: Fix debug info for aliased packed array with unconstrained nominal subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092050.3907141-1-poulhies@adacore.com/mbox/"},{"id":162344,"url":"https://patchwork.plctlab.org/api/1.2/patches/162344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092317.732045-1-juzhe.zhong@rivai.ai/","msgid":"<20231107092317.732045-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T09:23:17","name":"test: Fix FAIL of pr65518.c for RVV[PR112420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107092317.732045-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162354,"url":"https://patchwork.plctlab.org/api/1.2/patches/162354/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107094519.1822582-1-christoph.muellner@vrull.eu/","msgid":"<20231107094519.1822582-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-07T09:45:19","name":"RISC-V: Use stdint-gcc.h in rvv testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107094519.1822582-1-christoph.muellner@vrull.eu/mbox/"},{"id":162370,"url":"https://patchwork.plctlab.org/api/1.2/patches/162370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-2-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-2-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:02","name":"[v2,1/3] libgfortran: Don'\''t skip allocation if size is zero [PR112412]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-2-mikael@gcc.gnu.org/mbox/"},{"id":162437,"url":"https://patchwork.plctlab.org/api/1.2/patches/162437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-3-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-3-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:03","name":"[v2,2/3] libgfortran: Remove early return if extent is zero [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-3-mikael@gcc.gnu.org/mbox/"},{"id":162438,"url":"https://patchwork.plctlab.org/api/1.2/patches/162438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-4-mikael@gcc.gnu.org/","msgid":"<20231107102404.1723120-4-mikael@gcc.gnu.org>","list_archive_url":null,"date":"2023-11-07T10:24:04","name":"[v2,3/3] libgfortran: Remove empty array descriptor first dimension overwrite [PR112371]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107102404.1723120-4-mikael@gcc.gnu.org/mbox/"},{"id":162392,"url":"https://patchwork.plctlab.org/api/1.2/patches/162392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107103211.2837188-2-victor.donascimento@arm.com/","msgid":"<20231107103211.2837188-2-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-11-07T10:30:10","name":"[1/5] aarch64: Add march flags for +the and +d128 arch extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107103211.2837188-2-victor.donascimento@arm.com/mbox/"},{"id":162435,"url":"https://patchwork.plctlab.org/api/1.2/patches/162435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107114814.851059-1-juzhe.zhong@rivai.ai/","msgid":"<20231107114814.851059-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T11:48:14","name":"RISC-V: Add RISC-V into vect_cmdline_needed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107114814.851059-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162442,"url":"https://patchwork.plctlab.org/api/1.2/patches/162442/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107120927.1675589-1-juzhe.zhong@rivai.ai/","msgid":"<20231107120927.1675589-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T12:09:27","name":"[V2] test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107120927.1675589-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162517,"url":"https://patchwork.plctlab.org/api/1.2/patches/162517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107143054.3011942-1-pan2.li@intel.com/","msgid":"<20231107143054.3011942-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-07T14:30:54","name":"[v1] ISC-V: Support FP floor to i/l/ll diff size autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107143054.3011942-1-pan2.li@intel.com/mbox/"},{"id":162518,"url":"https://patchwork.plctlab.org/api/1.2/patches/162518/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107144505.2879197-1-juzhe.zhong@rivai.ai/","msgid":"<20231107144505.2879197-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T14:45:05","name":"test: Recover sdiv_pow2 check and remove test of RISC-V","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107144505.2879197-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162582,"url":"https://patchwork.plctlab.org/api/1.2/patches/162582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107150838.1031324-1-ppalka@redhat.com/","msgid":"<20231107150838.1031324-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T15:08:38","name":"c++: fix tf_decltype manipulation for COMPOUND_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107150838.1031324-1-ppalka@redhat.com/mbox/"},{"id":162575,"url":"https://patchwork.plctlab.org/api/1.2/patches/162575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151315.2881621-1-juzhe.zhong@rivai.ai/","msgid":"<20231107151315.2881621-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T15:13:15","name":"[V2] test: Fix bb-slp-33.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151315.2881621-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162621,"url":"https://patchwork.plctlab.org/api/1.2/patches/162621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151859.2882293-1-juzhe.zhong@rivai.ai/","msgid":"<20231107151859.2882293-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-07T15:18:59","name":"[V3] test: Fix FAIL of pr97428.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107151859.2882293-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162639,"url":"https://patchwork.plctlab.org/api/1.2/patches/162639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ada8og.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-07T15:23:59","name":"[pushed] aarch64: Add a %Z operand modifier for SVE registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptv8ada8og.fsf@arm.com/mbox/"},{"id":162642,"url":"https://patchwork.plctlab.org/api/1.2/patches/162642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com/","msgid":"<483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com>","list_archive_url":null,"date":"2023-11-07T15:30:27","name":"[committed] OpenMP: invoke.texi - mention C attribute syntax for -fopenmp(-simd)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/483351d9-71e7-4476-9b35-5f86333a0b25@codesourcery.com/mbox/"},{"id":162681,"url":"https://patchwork.plctlab.org/api/1.2/patches/162681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107172931.25778-1-manos.anagnostakis@vrull.eu/","msgid":"<20231107172931.25778-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-11-07T17:29:31","name":"aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107172931.25778-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":162687,"url":"https://patchwork.plctlab.org/api/1.2/patches/162687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-07T17:52:35","name":"gcc/configure: Regenerate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/654a797c.050a0220.62acc.30e5SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":162695,"url":"https://patchwork.plctlab.org/api/1.2/patches/162695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf5h9y7h.fsf@oldenburg.str.redhat.com/","msgid":"<87sf5h9y7h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-07T19:10:10","name":"[v3] c-family: Enable -fpermissive for C and ObjC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf5h9y7h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162701,"url":"https://patchwork.plctlab.org/api/1.2/patches/162701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195237.1658753-1-ppalka@redhat.com/","msgid":"<20231107195237.1658753-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T19:52:37","name":"c++: decltype of capture proxy [PR79378, PR96917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195237.1658753-1-ppalka@redhat.com/mbox/"},{"id":162702,"url":"https://patchwork.plctlab.org/api/1.2/patches/162702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195244.1658781-1-ppalka@redhat.com/","msgid":"<20231107195244.1658781-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-07T19:52:44","name":"c++: decltype of (by-value captured reference) [PR79620]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231107195244.1658781-1-ppalka@redhat.com/mbox/"},{"id":162704,"url":"https://patchwork.plctlab.org/api/1.2/patches/162704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com/","msgid":"<958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com>","list_archive_url":null,"date":"2023-11-07T20:04:21","name":"[committed] c: Change T2X_* format checking macros to T23_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/958be09c-a334-cc4c-a6ae-2f84a2dedb85@codesourcery.com/mbox/"},{"id":162834,"url":"https://patchwork.plctlab.org/api/1.2/patches/162834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com/","msgid":"<66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com>","list_archive_url":null,"date":"2023-11-08T00:22:07","name":"[committed] testsuite: Rename c2x-*, gnu2x-* tests to c23-*, gnu23-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66cb9961-52c8-e83a-da29-57e411f954@codesourcery.com/mbox/"},{"id":162875,"url":"https://patchwork.plctlab.org/api/1.2/patches/162875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-2-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-2-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:34","name":"[1/7] ira: Refactor the handling of register conflicts to make it more general","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-2-lehua.ding@rivai.ai/mbox/"},{"id":162877,"url":"https://patchwork.plctlab.org/api/1.2/patches/162877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-4-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:36","name":"[3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-4-lehua.ding@rivai.ai/mbox/"},{"id":162878,"url":"https://patchwork.plctlab.org/api/1.2/patches/162878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-5-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:37","name":"[4/7] ira: Support subreg copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-5-lehua.ding@rivai.ai/mbox/"},{"id":162876,"url":"https://patchwork.plctlab.org/api/1.2/patches/162876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-6-lehua.ding@rivai.ai/","msgid":"<20231108034740.834590-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T03:47:38","name":"[5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108034740.834590-6-lehua.ding@rivai.ai/mbox/"},{"id":162889,"url":"https://patchwork.plctlab.org/api/1.2/patches/162889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108061035.3975866-1-juzhe.zhong@rivai.ai/","msgid":"<20231108061035.3975866-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T06:10:35","name":"RISC-V: Normalize user vsetvl intrinsics[PR112092]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108061035.3975866-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162899,"url":"https://patchwork.plctlab.org/api/1.2/patches/162899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUsw14bVvAyCni7X@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-08T06:55:19","name":"libgcc: Add {unsigned ,}__int128 <-> _Decimal{32,64,128} conversion support [PR65833]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUsw14bVvAyCni7X@tucnak/mbox/"},{"id":162916,"url":"https://patchwork.plctlab.org/api/1.2/patches/162916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cmsaanz.fsf@oldenburg.str.redhat.com/","msgid":"<877cmsaanz.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T08:53:20","name":"gcc.dg/Wmissing-parameter-type*: Test the intended warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cmsaanz.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162918,"url":"https://patchwork.plctlab.org/api/1.2/patches/162918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108090938.8206-1-xuli1@eswincomputing.com/","msgid":"<20231108090938.8206-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-08T09:09:38","name":"RISC-V: Eliminate unused parameter warning.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108090938.8206-1-xuli1@eswincomputing.com/mbox/"},{"id":162924,"url":"https://patchwork.plctlab.org/api/1.2/patches/162924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqs8s4h.fsf@oldenburg.str.redhat.com/","msgid":"<87jzqs8s4h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T10:19:10","name":"Improve C99 compatibility of gcc.dg/setjmp-7.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzqs8s4h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":162947,"url":"https://patchwork.plctlab.org/api/1.2/patches/162947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108105317.1786716-1-juzhe.zhong@rivai.ai/","msgid":"<20231108105317.1786716-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T10:53:17","name":"Middle-end: Fix bug of induction variable vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108105317.1786716-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162950,"url":"https://patchwork.plctlab.org/api/1.2/patches/162950/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-2-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:12","name":"[1/3] RISC-V: Add support for XCVelw extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-2-mary.bennett@embecosm.com/mbox/"},{"id":162951,"url":"https://patchwork.plctlab.org/api/1.2/patches/162951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-3-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:13","name":"[2/3] RISC-V: Update XCValu constraints to match other vendors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-3-mary.bennett@embecosm.com/mbox/"},{"id":162952,"url":"https://patchwork.plctlab.org/api/1.2/patches/162952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-4-mary.bennett@embecosm.com/","msgid":"<20231108110914.2710021-4-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-08T11:09:14","name":"[3/3] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108110914.2710021-4-mary.bennett@embecosm.com/mbox/"},{"id":162989,"url":"https://patchwork.plctlab.org/api/1.2/patches/162989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108113306.1820431-1-juzhe.zhong@rivai.ai/","msgid":"<20231108113306.1820431-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-08T11:33:06","name":"[Committed] RISC-V: Fix VSETVL VL check condition bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108113306.1820431-1-juzhe.zhong@rivai.ai/mbox/"},{"id":162994,"url":"https://patchwork.plctlab.org/api/1.2/patches/162994/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de/","msgid":"<3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de>","list_archive_url":null,"date":"2023-11-08T11:53:28","name":"[avr,committed] Tweak IEEE double multiplication","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3a6f29b8-73ae-4f8b-babf-c772c02fa709@gjlay.de/mbox/"},{"id":163026,"url":"https://patchwork.plctlab.org/api/1.2/patches/163026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108131237.3672914-1-chenyixuan@iscas.ac.cn/","msgid":"<20231108131237.3672914-1-chenyixuan@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-08T13:12:37","name":"minimal support for xtheadv","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108131237.3672914-1-chenyixuan@iscas.ac.cn/mbox/"},{"id":163030,"url":"https://patchwork.plctlab.org/api/1.2/patches/163030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108132725.1331224-1-lehua.ding@rivai.ai/","msgid":"<20231108132725.1331224-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-08T13:27:25","name":"RISC-V: Removed unnecessary sign-extend for vsetvl","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108132725.1331224-1-lehua.ding@rivai.ai/mbox/"},{"id":163075,"url":"https://patchwork.plctlab.org/api/1.2/patches/163075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y2c8fca.fsf@oldenburg.str.redhat.com/","msgid":"<875y2c8fca.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-08T14:55:17","name":"i386: Fix C99 compatibility issues in the x86-64 AVX ABI test suite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y2c8fca.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163077,"url":"https://patchwork.plctlab.org/api/1.2/patches/163077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com/","msgid":"<908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com>","list_archive_url":null,"date":"2023-11-08T15:00:23","name":"tree-ssa-loop-ivopts : Add live analysis in regs used in decision making","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/908bdc21-ea98-436e-9566-01e4d8da9132@linux.ibm.com/mbox/"},{"id":163078,"url":"https://patchwork.plctlab.org/api/1.2/patches/163078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:02:54","name":"[1/4] Fix SLP of masked loads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150254.8F9F9133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163079,"url":"https://patchwork.plctlab.org/api/1.2/patches/163079/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150309.85118133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150309.85118133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:09","name":"[2/4] TLC to vect_check_store_rhs and vect_slp_child_index_for_operand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150309.85118133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163080,"url":"https://patchwork.plctlab.org/api/1.2/patches/163080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:24","name":"[3/4] Fix SLP of emulated gathers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150324.E6D3A133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163081,"url":"https://patchwork.plctlab.org/api/1.2/patches/163081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150336.96BCC133F5@imap2.suse-dmz.suse.de/","msgid":"<20231108150336.96BCC133F5@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:03:36","name":"[4/4] Refactor x86 decl based scatter vectorization, prepare SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108150336.96BCC133F5@imap2.suse-dmz.suse.de/mbox/"},{"id":163088,"url":"https://patchwork.plctlab.org/api/1.2/patches/163088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108153646.5100A138F2@imap2.suse-dmz.suse.de/","msgid":"<20231108153646.5100A138F2@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-08T15:36:45","name":"Fix SIMD clone SLP a bit more","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108153646.5100A138F2@imap2.suse-dmz.suse.de/mbox/"},{"id":163094,"url":"https://patchwork.plctlab.org/api/1.2/patches/163094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qd0jlac.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:51:23","name":"skip debug stmts when assigning locus discriminators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qd0jlac.fsf@lxoliva.fsfla.org/mbox/"},{"id":163095,"url":"https://patchwork.plctlab.org/api/1.2/patches/163095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmusi6j2.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:55:29","name":"testsuite: arg-pushing reqs -mno-accumulate-outgoing-args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmusi6j2.fsf@lxoliva.fsfla.org/mbox/"},{"id":163096,"url":"https://patchwork.plctlab.org/api/1.2/patches/163096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf5gi6gz.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:56:44","name":"testsuite: adjust gomp test for x86 -m32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf5gi6gz.fsf@lxoliva.fsfla.org/mbox/"},{"id":163097,"url":"https://patchwork.plctlab.org/api/1.2/patches/163097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7g4i6fr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T15:57:28","name":"testsuite: force PIC/PIE off for pr58245-1.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7g4i6fr.fsf@lxoliva.fsfla.org/mbox/"},{"id":163118,"url":"https://patchwork.plctlab.org/api/1.2/patches/163118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCohe0qW4BGjbXSvBauJeAzkqoNNbSU+rCZV-jJgo+uAKg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:00:58","name":"RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCohe0qW4BGjbXSvBauJeAzkqoNNbSU+rCZV-jJgo+uAKg@mail.gmail.com/mbox/"},{"id":163098,"url":"https://patchwork.plctlab.org/api/1.2/patches/163098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzqsi68k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:01:47","name":"testsuite: xfail scev-[35].c on ia32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzqsi68k.fsf@lxoliva.fsfla.org/mbox/"},{"id":163119,"url":"https://patchwork.plctlab.org/api/1.2/patches/163119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1gi5ud.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:10:18","name":"libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1gi5ud.fsf@lxoliva.fsfla.org/mbox/"},{"id":163101,"url":"https://patchwork.plctlab.org/api/1.2/patches/163101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzfzogq0h.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:37:34","name":"[v2] i386 PIE: accept @GOTOFF in load/store multi base address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orzfzogq0h.fsf@lxoliva.fsfla.org/mbox/"},{"id":163105,"url":"https://patchwork.plctlab.org/api/1.2/patches/163105/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8acgpru.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-08T16:42:45","name":"[v2,PR83782] ifunc: back-propagate ifunc_resolver to aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv8acgpru.fsf@lxoliva.fsfla.org/mbox/"},{"id":163109,"url":"https://patchwork.plctlab.org/api/1.2/patches/163109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com/","msgid":"<60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com>","list_archive_url":null,"date":"2023-11-08T16:58:10","name":"OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60940754-edc6-4110-b7ba-5bed2133bbb6@codesourcery.com/mbox/"},{"id":163174,"url":"https://patchwork.plctlab.org/api/1.2/patches/163174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108215904.2779753-1-ppalka@redhat.com/","msgid":"<20231108215904.2779753-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-08T21:59:04","name":"c++: non-dependent .* folding [PR112427]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231108215904.2779753-1-ppalka@redhat.com/mbox/"},{"id":163208,"url":"https://patchwork.plctlab.org/api/1.2/patches/163208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvnhgj2.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:17:05","name":"[v2] libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsvnhgj2.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":163196,"url":"https://patchwork.plctlab.org/api/1.2/patches/163196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com/","msgid":"<7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T01:31:52","name":"[PATCH-2v2,rs6000] Enable vector mode for by pieces equality compare [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7ce9bdb2-7603-4ab5-af7c-0f3deb1f75fa@linux.ibm.com/mbox/"},{"id":163197,"url":"https://patchwork.plctlab.org/api/1.2/patches/163197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com/","msgid":"<4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T01:32:07","name":"[PATCH-3v3,rs6000] Fix regression cases caused 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4aad8e36-0947-4bf8-9e3c-1c105c89e9a2@linux.ibm.com/mbox/"},{"id":163198,"url":"https://patchwork.plctlab.org/api/1.2/patches/163198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1fhf0k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:49:47","name":"testsuite: tsan: add fallback overload for pthread_cond_clockwait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs1fhf0k.fsf@lxoliva.fsfla.org/mbox/"},{"id":163199,"url":"https://patchwork.plctlab.org/api/1.2/patches/163199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109015537.3967177-1-juzhe.zhong@rivai.ai/","msgid":"<20231109015537.3967177-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T01:55:37","name":"[Committed] RISC-V: Fix dynamic tests [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109015537.3967177-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163200,"url":"https://patchwork.plctlab.org/api/1.2/patches/163200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkc3heqh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T01:55:50","name":"libsupc++: try cxa_thread_atexit_impl at runtime","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkc3heqh.fsf@lxoliva.fsfla.org/mbox/"},{"id":163205,"url":"https://patchwork.plctlab.org/api/1.2/patches/163205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109023917.3985192-1-juzhe.zhong@rivai.ai/","msgid":"<20231109023917.3985192-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T02:39:17","name":"RISC-V: Fix dynamic LMUL cost model ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109023917.3985192-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163215,"url":"https://patchwork.plctlab.org/api/1.2/patches/163215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cmrha2f.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-09T03:36:40","name":"[v3] libstdc++: optimize bit iterators assuming normalization [PR110807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or7cmrha2f.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":163226,"url":"https://patchwork.plctlab.org/api/1.2/patches/163226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8fef393-68f9-4ea8-8903-fb280e0f46d3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-09T05:41:18","name":"[expand] Call misaligned memory reference in expand_builtin_return [PR112417]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8fef393-68f9-4ea8-8903-fb280e0f46d3@linux.ibm.com/mbox/"},{"id":163242,"url":"https://patchwork.plctlab.org/api/1.2/patches/163242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109060858.3067686-1-pan2.li@intel.com/","msgid":"<20231109060858.3067686-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T06:08:58","name":"[v2] DSE: Allow vector type for get_stored_val when read < store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109060858.3067686-1-pan2.li@intel.com/mbox/"},{"id":163250,"url":"https://patchwork.plctlab.org/api/1.2/patches/163250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109065057.3179104-1-pan2.li@intel.com/","msgid":"<20231109065057.3179104-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T06:50:57","name":"[v1] RISC-V: Refine frm emit after bb end in succ edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109065057.3179104-1-pan2.li@intel.com/mbox/"},{"id":163257,"url":"https://patchwork.plctlab.org/api/1.2/patches/163257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109071457.2574044-1-lin1.hu@intel.com/","msgid":"<20231109071457.2574044-1-lin1.hu@intel.com>","list_archive_url":null,"date":"2023-11-09T07:14:57","name":"Avoid generate vblendps with ymm16+","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109071457.2574044-1-lin1.hu@intel.com/mbox/"},{"id":163271,"url":"https://patchwork.plctlab.org/api/1.2/patches/163271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109074008.580-1-jinma@linux.alibaba.com/","msgid":"<20231109074008.580-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-09T07:40:08","name":"RISC-V: Fix the illegal operands for the XTheadMemidx extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109074008.580-1-jinma@linux.alibaba.com/mbox/"},{"id":163278,"url":"https://patchwork.plctlab.org/api/1.2/patches/163278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082123.3120267-1-hongtao.liu@intel.com/","msgid":"<20231109082123.3120267-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-09T08:21:23","name":"Fix wrong code due to vec_merge + pcmp to blendvb splitter.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082123.3120267-1-hongtao.liu@intel.com/mbox/"},{"id":163280,"url":"https://patchwork.plctlab.org/api/1.2/patches/163280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-1-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:09","name":"[1/3] s390: Recognize further vpdi and vmr{l,h} pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-1-stefansf@linux.ibm.com/mbox/"},{"id":163286,"url":"https://patchwork.plctlab.org/api/1.2/patches/163286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-2-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:10","name":"[2/3] s390: Add expand_perm_reverse_elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-2-stefansf@linux.ibm.com/mbox/"},{"id":163281,"url":"https://patchwork.plctlab.org/api/1.2/patches/163281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-3-stefansf@linux.ibm.com/","msgid":"<20231109082211.2505-3-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:22:11","name":"[3/3] s390: Revise vector reverse elements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082211.2505-3-stefansf@linux.ibm.com/mbox/"},{"id":163285,"url":"https://patchwork.plctlab.org/api/1.2/patches/163285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082409.2890-1-stefansf@linux.ibm.com/","msgid":"<20231109082409.2890-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-09T08:24:09","name":"s390: Reduce number of patterns where the condition is false anyway","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109082409.2890-1-stefansf@linux.ibm.com/mbox/"},{"id":163342,"url":"https://patchwork.plctlab.org/api/1.2/patches/163342/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103037.281290-1-yunqiang.su@cipunited.com/","msgid":"<20231109103037.281290-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-09T10:30:36","name":"[committed] MIPS: Use -mnan value for -mabs if not specified","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103037.281290-1-yunqiang.su@cipunited.com/mbox/"},{"id":163343,"url":"https://patchwork.plctlab.org/api/1.2/patches/163343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103201.286626-1-yunqiang.su@cipunited.com/","msgid":"<20231109103201.286626-1-yunqiang.su@cipunited.com>","list_archive_url":null,"date":"2023-11-09T10:32:01","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109103201.286626-1-yunqiang.su@cipunited.com/mbox/"},{"id":163346,"url":"https://patchwork.plctlab.org/api/1.2/patches/163346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105114.3A7EC385B800@sourceware.org/","msgid":"<20231109105114.3A7EC385B800@sourceware.org>","list_archive_url":null,"date":"2023-11-09T10:50:48","name":"tree-optimization/112444 - avoid bougs PHI value-numbering","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105114.3A7EC385B800@sourceware.org/mbox/"},{"id":163347,"url":"https://patchwork.plctlab.org/api/1.2/patches/163347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105542.4013483-2-mary.bennett@embecosm.com/","msgid":"<20231109105542.4013483-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T10:55:42","name":"[1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109105542.4013483-2-mary.bennett@embecosm.com/mbox/"},{"id":163350,"url":"https://patchwork.plctlab.org/api/1.2/patches/163350/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com/","msgid":"<74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-09T11:26:27","name":"[2/4] aarch64: Fix tme intrinsic availability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74c28cf9-9a02-c17b-fc97-09ff9abe9096@e124511.cambridge.arm.com/mbox/"},{"id":163351,"url":"https://patchwork.plctlab.org/api/1.2/patches/163351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com/","msgid":"<9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-09T11:26:55","name":"[3/4] aarch64: Fix memtag intrinsic availability","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e6ff577-22b0-a3fe-6dc0-384d8b426ef0@e124511.cambridge.arm.com/mbox/"},{"id":163358,"url":"https://patchwork.plctlab.org/api/1.2/patches/163358/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109113650.EB1D63858296@sourceware.org/","msgid":"<20231109113650.EB1D63858296@sourceware.org>","list_archive_url":null,"date":"2023-11-09T11:36:24","name":"tree-optimization/112450 - avoid AVX512 style masking for BImode masks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109113650.EB1D63858296@sourceware.org/mbox/"},{"id":163378,"url":"https://patchwork.plctlab.org/api/1.2/patches/163378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109115736.541131-2-mary.bennett@embecosm.com/","msgid":"<20231109115736.541131-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T11:57:36","name":"[1/1] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109115736.541131-2-mary.bennett@embecosm.com/mbox/"},{"id":163385,"url":"https://patchwork.plctlab.org/api/1.2/patches/163385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109120038.109612-1-juzhe.zhong@rivai.ai/","msgid":"<20231109120038.109612-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T12:00:38","name":"[Committed] RISC-V: Add PR112450 test to avoid regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109120038.109612-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163391,"url":"https://patchwork.plctlab.org/api/1.2/patches/163391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109124219.966619-2-mary.bennett@embecosm.com/","msgid":"<20231109124219.966619-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-11-09T12:42:19","name":"[1/1] RISC-V: Add support for XCVmem extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109124219.966619-2-mary.bennett@embecosm.com/mbox/"},{"id":163407,"url":"https://patchwork.plctlab.org/api/1.2/patches/163407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109143338.307725-1-pan2.li@intel.com/","msgid":"<20231109143338.307725-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-09T14:33:38","name":"[v1] Internal-fn: Add FLOATN support for l/ll round and rint [PR/112432]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109143338.307725-1-pan2.li@intel.com/mbox/"},{"id":163411,"url":"https://patchwork.plctlab.org/api/1.2/patches/163411/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUz0fdighFsO3Na6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-09T15:02:21","name":"Add type-generic clz/ctz/clrsb/ffs/parity/popcount builtins [PR111309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZUz0fdighFsO3Na6@tucnak/mbox/"},{"id":163523,"url":"https://patchwork.plctlab.org/api/1.2/patches/163523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109160028.2829009-1-ppalka@redhat.com/","msgid":"<20231109160028.2829009-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-09T16:00:28","name":"libstdc++: Fix forwarding in __take/drop_of_repeat_view [PR112453]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109160028.2829009-1-ppalka@redhat.com/mbox/"},{"id":163537,"url":"https://patchwork.plctlab.org/api/1.2/patches/163537/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com/","msgid":"<0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com>","list_archive_url":null,"date":"2023-11-09T18:25:44","name":"[pushed,IRA] : Fixing conflict calculation from region landing pads.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0430c00f-f8b4-dd19-4e47-e76a3e9dccb0@redhat.com/mbox/"},{"id":163581,"url":"https://patchwork.plctlab.org/api/1.2/patches/163581/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109193009.2391070-1-arsen@aarsen.me/","msgid":"<20231109193009.2391070-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-09T19:25:34","name":"[1/2] libstdc++: declare std::allocator in !HOSTED as an extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109193009.2391070-1-arsen@aarsen.me/mbox/"},{"id":163623,"url":"https://patchwork.plctlab.org/api/1.2/patches/163623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109223140.2989474-1-dmalcolm@redhat.com/","msgid":"<20231109223140.2989474-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-09T22:31:40","name":"[pushed] diagnostics: cleanups to diagnostic-show-locus.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109223140.2989474-1-dmalcolm@redhat.com/mbox/"},{"id":163633,"url":"https://patchwork.plctlab.org/api/1.2/patches/163633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109233325.2189755-1-juzhe.zhong@rivai.ai/","msgid":"<20231109233325.2189755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-09T23:33:25","name":"RISC-V: Move cond_copysign from combine pattern to autovec pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109233325.2189755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163634,"url":"https://patchwork.plctlab.org/api/1.2/patches/163634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109234945.4108-1-jose.marchesi@oracle.com/","msgid":"<20231109234945.4108-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-09T23:49:45","name":"[COMMITED] bpf: testsuite: fix expected regexp in gcc.target/bpf/ldxdw.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231109234945.4108-1-jose.marchesi@oracle.com/mbox/"},{"id":163690,"url":"https://patchwork.plctlab.org/api/1.2/patches/163690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110001720.20880-1-jose.marchesi@oracle.com/","msgid":"<20231110001720.20880-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-10T00:17:20","name":"[COMMITTED] bpf: fix pseudo-c asm emitted for *mulsidi3_zeroextend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110001720.20880-1-jose.marchesi@oracle.com/mbox/"},{"id":163717,"url":"https://patchwork.plctlab.org/api/1.2/patches/163717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110014158.371690-2-haochen.jiang@intel.com/","msgid":"<20231110014158.371690-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-10T01:41:58","name":"Initial support for AVX10.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110014158.371690-2-haochen.jiang@intel.com/mbox/"},{"id":163719,"url":"https://patchwork.plctlab.org/api/1.2/patches/163719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110015202.650942-1-hongtao.liu@intel.com/","msgid":"<20231110015202.650942-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T01:52:02","name":"Simplify vector ((VCE?(a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE:a cmp VCE:b) ? c : d.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110015202.650942-1-hongtao.liu@intel.com/mbox/"},{"id":163763,"url":"https://patchwork.plctlab.org/api/1.2/patches/163763/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033316.1126689-1-juzhe.zhong@rivai.ai/","msgid":"<20231110033316.1126689-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T03:33:16","name":"RISC-V: Robustify vec_init pattern[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033316.1126689-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163771,"url":"https://patchwork.plctlab.org/api/1.2/patches/163771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033651.1127125-1-juzhe.zhong@rivai.ai/","msgid":"<20231110033651.1127125-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T03:36:51","name":"RISC-V: Add combine optimization by slideup for vec_init vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033651.1127125-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163772,"url":"https://patchwork.plctlab.org/api/1.2/patches/163772/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033900.246872-1-hongtao.liu@intel.com/","msgid":"<20231110033900.246872-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T03:39:00","name":"Support vec_set/vec_extract/vec_init for V4HF/V2HF.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110033900.246872-1-hongtao.liu@intel.com/mbox/"},{"id":163775,"url":"https://patchwork.plctlab.org/api/1.2/patches/163775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110061228.1411882-1-hongtao.liu@intel.com/","msgid":"<20231110061228.1411882-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-10T06:12:28","name":"Simplify vector ((VCE?(a cmp b ? -1 : 0)) < 0) ? c : d to just VCE:((a cmp b) ? (VCE c) : (VCE d)).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110061228.1411882-1-hongtao.liu@intel.com/mbox/"},{"id":163776,"url":"https://patchwork.plctlab.org/api/1.2/patches/163776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110062237.3267408-1-pan2.li@intel.com/","msgid":"<20231110062237.3267408-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-10T06:22:37","name":"[v1] RISC-V: Support vec_init for trailing same element","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110062237.3267408-1-pan2.li@intel.com/mbox/"},{"id":163777,"url":"https://patchwork.plctlab.org/api/1.2/patches/163777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com/","msgid":"<6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T07:09:02","name":"[PING,^1,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6c3e359d-d8f8-4267-af0e-5b144687ef94@linux.ibm.com/mbox/"},{"id":163778,"url":"https://patchwork.plctlab.org/api/1.2/patches/163778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110071431.1580-1-jinma@linux.alibaba.com/","msgid":"<20231110071431.1580-1-jinma@linux.alibaba.com>","list_archive_url":null,"date":"2023-11-10T07:14:31","name":"RISC-V: Fix bug that XTheadMemPair extension caused fcsr not to be saved and restored before and after interrupt.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110071431.1580-1-jinma@linux.alibaba.com/mbox/"},{"id":163788,"url":"https://patchwork.plctlab.org/api/1.2/patches/163788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com/","msgid":"<3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T07:58:58","name":"[PING,V15,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3eca0f35-b925-4118-8987-1a05a849898e@linux.ibm.com/mbox/"},{"id":163790,"url":"https://patchwork.plctlab.org/api/1.2/patches/163790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110081435.3963830-1-pan2.li@intel.com/","msgid":"<20231110081435.3963830-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-10T08:14:35","name":"[v1] RISC-V: Add HFmode for l/ll round and rint autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110081435.3963830-1-pan2.li@intel.com/mbox/"},{"id":163791,"url":"https://patchwork.plctlab.org/api/1.2/patches/163791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com/","msgid":"<3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com>","list_archive_url":null,"date":"2023-11-10T09:22:41","name":"[PATCH-3v4,rs6000] Fix regression cases caused 16-byte by pieces move [PR111449]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3ad4024b-22a0-426a-acc3-7a30cacce3b3@linux.ibm.com/mbox/"},{"id":163793,"url":"https://patchwork.plctlab.org/api/1.2/patches/163793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com/","msgid":"<49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com>","list_archive_url":null,"date":"2023-11-10T10:15:42","name":"[committed] amdgcn: Fix vector min/max ICE (pr112313)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e97674-bb26-447f-b0c2-a771a7e8feec@codesourcery.com/mbox/"},{"id":163794,"url":"https://patchwork.plctlab.org/api/1.2/patches/163794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kx6eez.fsf@oldenburg.str.redhat.com/","msgid":"<87r0kx6eez.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T11:22:44","name":"aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kx6eez.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163795,"url":"https://patchwork.plctlab.org/api/1.2/patches/163795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110122011.3626658-1-juzhe.zhong@rivai.ai/","msgid":"<20231110122011.3626658-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T12:20:11","name":"[V2] Middle-end: Fix bug of induction variable vectorization for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110122011.3626658-1-juzhe.zhong@rivai.ai/mbox/"},{"id":163797,"url":"https://patchwork.plctlab.org/api/1.2/patches/163797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110131658.09A5D13398@imap2.suse-dmz.suse.de/","msgid":"<20231110131658.09A5D13398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-10T13:16:57","name":"tree-optimization/110221 - SLP and loop mask/len","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110131658.09A5D13398@imap2.suse-dmz.suse.de/mbox/"},{"id":163798,"url":"https://patchwork.plctlab.org/api/1.2/patches/163798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca309ae63920109cf88da3e4106a8a24576302fc.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-10T16:02:17","name":"libgccjit: Fix GGC segfault when using -flto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca309ae63920109cf88da3e4106a8a24576302fc.camel@zoho.com/mbox/"},{"id":163799,"url":"https://patchwork.plctlab.org/api/1.2/patches/163799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com/","msgid":"<6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com>","list_archive_url":null,"date":"2023-11-10T16:48:25","name":"[pushed,PR112337,IRA] : Check autoinc and memory address after temporary equivalence substitution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6aeff2d2-55af-2d2c-0542-dd2cd9c2e607@redhat.com/mbox/"},{"id":163913,"url":"https://patchwork.plctlab.org/api/1.2/patches/163913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht5tsq.fsf@oldenburg.str.redhat.com/","msgid":"<874jht5tsq.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T18:48:05","name":"aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht5tsq.fsf@oldenburg.str.redhat.com/mbox/"},{"id":163998,"url":"https://patchwork.plctlab.org/api/1.2/patches/163998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-2-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:44","name":"[1/3] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-2-dmalcolm@redhat.com/mbox/"},{"id":163999,"url":"https://patchwork.plctlab.org/api/1.2/patches/163999/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-3-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:45","name":"[2/3] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-3-dmalcolm@redhat.com/mbox/"},{"id":163997,"url":"https://patchwork.plctlab.org/api/1.2/patches/163997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-4-dmalcolm@redhat.com/","msgid":"<20231110214246.3087291-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-10T21:42:46","name":"[3/3] diagnostics: use the .opt.urls files to urlify quoted text","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110214246.3087291-4-dmalcolm@redhat.com/mbox/"},{"id":164000,"url":"https://patchwork.plctlab.org/api/1.2/patches/164000/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311101822270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-10T21:54:07","name":"[committed] RISC-V: Fix indentation of \"length\" attribute for branches and jumps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311101822270.5892@tpp.orcam.me.uk/mbox/"},{"id":164001,"url":"https://patchwork.plctlab.org/api/1.2/patches/164001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leb5462f.fsf@oldenburg.str.redhat.com/","msgid":"<87leb5462f.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:00","name":"C99 testsuite readiness: -fpermissive tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leb5462f.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164002,"url":"https://patchwork.plctlab.org/api/1.2/patches/164002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6lt461j.fsf@oldenburg.str.redhat.com/","msgid":"<87h6lt461j.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:32","name":"C99 testsuite readiness: Verified un-reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6lt461j.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164003,"url":"https://patchwork.plctlab.org/api/1.2/patches/164003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cywh460x.fsf@oldenburg.str.redhat.com/","msgid":"<87cywh460x.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:06:54","name":"C99 testsuite readiness: More unverified testcase un-reductions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87cywh460x.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164004,"url":"https://patchwork.plctlab.org/api/1.2/patches/164004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r75460h.fsf@oldenburg.str.redhat.com/","msgid":"<878r75460h.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:10","name":"C99 testsuite readiness: Compile more tests with -std=gnu89","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r75460h.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164006,"url":"https://patchwork.plctlab.org/api/1.2/patches/164006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht45zo.fsf@oldenburg.str.redhat.com/","msgid":"<874jht45zo.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:39","name":"C99 testsuite readiness: Add missing abort, exit declarations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jht45zo.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164005,"url":"https://patchwork.plctlab.org/api/1.2/patches/164005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfzl2res.fsf@oldenburg.str.redhat.com/","msgid":"<87zfzl2res.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-10T22:07:55","name":"C99 testsuite readiness: Cleanup of execute tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfzl2res.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164021,"url":"https://patchwork.plctlab.org/api/1.2/patches/164021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU60wCU3w1RkyOY/@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T22:54:56","name":"[V2] Power10: Add options to disable load and store vector pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU60wCU3w1RkyOY/@cowardly-lion.the-meissners.org/mbox/"},{"id":164022,"url":"https://patchwork.plctlab.org/api/1.2/patches/164022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64KEIl6pE7e0sm@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:09:28","name":"[1/4] Add support for floating point vector pair built-in functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64KEIl6pE7e0sm@cowardly-lion.the-meissners.org/mbox/"},{"id":164025,"url":"https://patchwork.plctlab.org/api/1.2/patches/164025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64mCbRp3nb8OJL@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:11:20","name":"[2/4] Add support for integer vector pair built-ins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU64mCbRp3nb8OJL@cowardly-lion.the-meissners.org/mbox/"},{"id":164023,"url":"https://patchwork.plctlab.org/api/1.2/patches/164023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU6472jUQslwl1Fe@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:12:47","name":"[3/4] Add support for initializing and extracting from vector pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU6472jUQslwl1Fe@cowardly-lion.the-meissners.org/mbox/"},{"id":164024,"url":"https://patchwork.plctlab.org/api/1.2/patches/164024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU65NlATqRKTwKDO@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-10T23:13:58","name":"[4/4] Add support for doing a horizontal add on vector pair elements.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU65NlATqRKTwKDO@cowardly-lion.the-meissners.org/mbox/"},{"id":164026,"url":"https://patchwork.plctlab.org/api/1.2/patches/164026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110232754.1399391-1-juzhe.zhong@rivai.ai/","msgid":"<20231110232754.1399391-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-10T23:27:54","name":"[Committed] RISC-V: Add test for PR112469","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231110232754.1399391-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164040,"url":"https://patchwork.plctlab.org/api/1.2/patches/164040/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111003846.496197-1-polacek@redhat.com/","msgid":"<20231111003846.496197-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:38:46","name":"[pushed] testsuite: fix lambda-decltype3.C in C++11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111003846.496197-1-polacek@redhat.com/mbox/"},{"id":164059,"url":"https://patchwork.plctlab.org/api/1.2/patches/164059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004433.66232-1-jwakely@redhat.com/","msgid":"<20231111004433.66232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:43:48","name":"[committed] libstdc++: Remove handling for underscore-prefixed libm functions [PR111638]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004433.66232-1-jwakely@redhat.com/mbox/"},{"id":164048,"url":"https://patchwork.plctlab.org/api/1.2/patches/164048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004440.77760-1-jwakely@redhat.com/","msgid":"<20231111004440.77760-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:35","name":"[committed] libstdc++: Add [[nodiscard]] to std::span members","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004440.77760-1-jwakely@redhat.com/mbox/"},{"id":164047,"url":"https://patchwork.plctlab.org/api/1.2/patches/164047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004446.77907-1-jwakely@redhat.com/","msgid":"<20231111004446.77907-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:41","name":"[committed] libstdc++: Add [[nodiscard]] to lock types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004446.77907-1-jwakely@redhat.com/mbox/"},{"id":164046,"url":"https://patchwork.plctlab.org/api/1.2/patches/164046/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004453.78040-1-jwakely@redhat.com/","msgid":"<20231111004453.78040-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:47","name":"[committed] libstdc++: Deprecate std::atomic_xxx overloads for std::shared_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004453.78040-1-jwakely@redhat.com/mbox/"},{"id":164041,"url":"https://patchwork.plctlab.org/api/1.2/patches/164041/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004458.78235-1-jwakely@redhat.com/","msgid":"<20231111004458.78235-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:54","name":"[committed] libstdc++: Fix test that fails with -ffreestanding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004458.78235-1-jwakely@redhat.com/mbox/"},{"id":164052,"url":"https://patchwork.plctlab.org/api/1.2/patches/164052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004505.78351-1-jwakely@redhat.com/","msgid":"<20231111004505.78351-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:44:59","name":"[committed] libstdc++: Add static_assert to std::integer_sequence [PR112473]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004505.78351-1-jwakely@redhat.com/mbox/"},{"id":164050,"url":"https://patchwork.plctlab.org/api/1.2/patches/164050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004510.78546-1-jwakely@redhat.com/","msgid":"<20231111004510.78546-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:45:06","name":"[committed] libstdc++: Fix broken tests for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111004510.78546-1-jwakely@redhat.com/mbox/"},{"id":164051,"url":"https://patchwork.plctlab.org/api/1.2/patches/164051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111005834.93376-1-jwakely@redhat.com/","msgid":"<20231111005834.93376-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-11T00:58:14","name":"[committed] libstdc++: Do not use assume attribute for Clang [PR112467]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111005834.93376-1-jwakely@redhat.com/mbox/"},{"id":164043,"url":"https://patchwork.plctlab.org/api/1.2/patches/164043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU7VOhuVUvCPnqqG@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-11T01:13:30","name":"[v2] c++: fix parsing with auto(x) [PR112410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU7VOhuVUvCPnqqG@redhat.com/mbox/"},{"id":164102,"url":"https://patchwork.plctlab.org/api/1.2/patches/164102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU854tpVwxxWwFRX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:22:58","name":"c, c++: Add new value for vector types for __builtin_classify_type (type)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU854tpVwxxWwFRX@tucnak/mbox/"},{"id":164103,"url":"https://patchwork.plctlab.org/api/1.2/patches/164103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU864Q9ltkW8n94Z@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:27:13","name":"tree-ssa-math-opts: Fix up gsi_remove order in match_uaddc_usubc [PR112430]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU864Q9ltkW8n94Z@tucnak/mbox/"},{"id":164104,"url":"https://patchwork.plctlab.org/api/1.2/patches/164104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU885F2AArMH9y5M@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-11T08:35:48","name":"gimple-range-cache: Fix ICEs when dumping details [PR111967]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZU885F2AArMH9y5M@tucnak/mbox/"},{"id":164110,"url":"https://patchwork.plctlab.org/api/1.2/patches/164110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJ9KDmOZqgHH9eM1ytPGTtjG_-F+ekP0f5w46OjcEZNkw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-11T10:15:45","name":"[fortran] PR112459 - gfortran -w option causes derived-type finalization at creation time","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiJ9KDmOZqgHH9eM1ytPGTtjG_-F+ekP0f5w46OjcEZNkw@mail.gmail.com/mbox/"},{"id":164122,"url":"https://patchwork.plctlab.org/api/1.2/patches/164122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111110039.143319-1-xry111@xry111.site/","msgid":"<20231111110039.143319-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-11T10:58:19","name":"[v2] LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111110039.143319-1-xry111@xry111.site/mbox/"},{"id":164132,"url":"https://patchwork.plctlab.org/api/1.2/patches/164132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2245595.iZASKD2KPV@fomalhaut/","msgid":"<2245595.iZASKD2KPV@fomalhaut>","list_archive_url":null,"date":"2023-11-11T12:11:28","name":"Handle addresses of more constants in IPA-CP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2245595.iZASKD2KPV@fomalhaut/mbox/"},{"id":164172,"url":"https://patchwork.plctlab.org/api/1.2/patches/164172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111231146.31932-1-bshanks@codeweavers.com/","msgid":"<20231111231146.31932-1-bshanks@codeweavers.com>","list_archive_url":null,"date":"2023-11-11T23:11:12","name":"testsuite: Fix bad-mapper-1.C test failures with posix_spawn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231111231146.31932-1-bshanks@codeweavers.com/mbox/"},{"id":164175,"url":"https://patchwork.plctlab.org/api/1.2/patches/164175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112010047.496937-1-xry111@xry111.site/","msgid":"<20231112010047.496937-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-12T01:00:13","name":"LoongArch: Use simplify_gen_subreg instead of gen_rtx_SUBREG in loongarch_expand_vec_cond_mask_expr [PR112476]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112010047.496937-1-xry111@xry111.site/mbox/"},{"id":164242,"url":"https://patchwork.plctlab.org/api/1.2/patches/164242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-4-lehua.ding@rivai.ai/","msgid":"<20231112095858.3669003-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T09:58:54","name":"[V2,3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-4-lehua.ding@rivai.ai/mbox/"},{"id":164243,"url":"https://patchwork.plctlab.org/api/1.2/patches/164243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-6-lehua.ding@rivai.ai/","msgid":"<20231112095858.3669003-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T09:58:56","name":"[V2,5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112095858.3669003-6-lehua.ding@rivai.ai/mbox/"},{"id":164246,"url":"https://patchwork.plctlab.org/api/1.2/patches/164246/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-3-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-3-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:12","name":"[V3,2/7] ira: Switch to live_subreg data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-3-lehua.ding@rivai.ai/mbox/"},{"id":164249,"url":"https://patchwork.plctlab.org/api/1.2/patches/164249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-4-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-4-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:13","name":"[V3,3/7] ira: Support subreg live range track","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-4-lehua.ding@rivai.ai/mbox/"},{"id":164247,"url":"https://patchwork.plctlab.org/api/1.2/patches/164247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-5-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-5-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:14","name":"[V3,4/7] ira: Support subreg copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-5-lehua.ding@rivai.ai/mbox/"},{"id":164250,"url":"https://patchwork.plctlab.org/api/1.2/patches/164250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-6-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-6-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:15","name":"[V3,5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-6-lehua.ding@rivai.ai/mbox/"},{"id":164248,"url":"https://patchwork.plctlab.org/api/1.2/patches/164248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-7-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-7-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:16","name":"[V3,6/7] lra: Switch to live_subreg data flow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-7-lehua.ding@rivai.ai/mbox/"},{"id":164251,"url":"https://patchwork.plctlab.org/api/1.2/patches/164251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-8-lehua.ding@rivai.ai/","msgid":"<20231112120817.2635864-8-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-12T12:08:17","name":"[V3,7/7] lra: Support subreg live range track and conflict detect","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112120817.2635864-8-lehua.ding@rivai.ai/mbox/"},{"id":164252,"url":"https://patchwork.plctlab.org/api/1.2/patches/164252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112134751.2972640-1-pan2.li@intel.com/","msgid":"<20231112134751.2972640-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-12T13:47:51","name":"[v1] RISC-V: Support FP l/ll round and rint HF mode autovec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112134751.2972640-1-pan2.li@intel.com/mbox/"},{"id":164254,"url":"https://patchwork.plctlab.org/api/1.2/patches/164254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-5-richard.sandiford@arm.com/","msgid":"<20231112145229.2924713-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-11-12T14:52:28","name":"[4/5] ira: Handle register filters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-5-richard.sandiford@arm.com/mbox/"},{"id":164255,"url":"https://patchwork.plctlab.org/api/1.2/patches/164255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-6-richard.sandiford@arm.com/","msgid":"<20231112145229.2924713-6-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-11-12T14:52:29","name":"[5/5] Add an aligned_register_operand predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112145229.2924713-6-richard.sandiford@arm.com/mbox/"},{"id":164286,"url":"https://patchwork.plctlab.org/api/1.2/patches/164286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112202603.228074-2-xry111@xry111.site/","msgid":"<20231112202603.228074-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-12T20:25:26","name":"Fix (fcopysign x, NEGATIVE_CONST) -> (fneg (fabs x)) simplification [PR112483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231112202603.228074-2-xry111@xry111.site/mbox/"},{"id":164291,"url":"https://patchwork.plctlab.org/api/1.2/patches/164291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com/","msgid":"<015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-11-12T23:24:25","name":"PR112380: Defend against CLOBBERs in RTX expressions in combine.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/015801da15bf$6147e750$23d7b5f0$@nextmovesoftware.com/mbox/"},{"id":164340,"url":"https://patchwork.plctlab.org/api/1.2/patches/164340/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113031001.1370500-1-pan2.li@intel.com/","msgid":"<20231113031001.1370500-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-13T03:10:01","name":"[v1] RISC-V: Fix RVV dynamic frm tests failure","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113031001.1370500-1-pan2.li@intel.com/mbox/"},{"id":164341,"url":"https://patchwork.plctlab.org/api/1.2/patches/164341/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113032237.1379330-1-pan2.li@intel.com/","msgid":"<20231113032237.1379330-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-13T03:22:37","name":"[v4] DSE: Allow vector type for get_stored_val when read < store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113032237.1379330-1-pan2.li@intel.com/mbox/"},{"id":164345,"url":"https://patchwork.plctlab.org/api/1.2/patches/164345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113033706.175135-1-juzhe.zhong@rivai.ai/","msgid":"<20231113033706.175135-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T03:37:06","name":"RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113033706.175135-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164648,"url":"https://patchwork.plctlab.org/api/1.2/patches/164648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/becd09c9-1353-40ed-a085-be4f938ddf0b@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T08:06:35","name":"RISC-V: vsetvl: Refine REG_EQUAL equality.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/becd09c9-1353-40ed-a085-be4f938ddf0b@gmail.com/mbox/"},{"id":164366,"url":"https://patchwork.plctlab.org/api/1.2/patches/164366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113084158.829807-1-juzhe.zhong@rivai.ai/","msgid":"<20231113084158.829807-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T08:41:58","name":"[V2] RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113084158.829807-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164367,"url":"https://patchwork.plctlab.org/api/1.2/patches/164367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVHjzAPbjBAPIYhK@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-13T08:52:28","name":"[committed] i386: Remove j constraint letter from list of unused letters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVHjzAPbjBAPIYhK@tucnak/mbox/"},{"id":164388,"url":"https://patchwork.plctlab.org/api/1.2/patches/164388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com/","msgid":"<02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com>","list_archive_url":null,"date":"2023-11-13T09:32:09","name":"[wwwdocs,committed] projects/gomp: Update for TR12, update impl. status","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/02e3880b-3fdc-462c-8d1f-a451d513c59c@codesourcery.com/mbox/"},{"id":164407,"url":"https://patchwork.plctlab.org/api/1.2/patches/164407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113110636.149485-1-juzhe.zhong@rivai.ai/","msgid":"<20231113110636.149485-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T11:06:36","name":"[Committed,V3] RISC-V: Optimize combine sequence by merge approach","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113110636.149485-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164412,"url":"https://patchwork.plctlab.org/api/1.2/patches/164412/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhp3nwf.fsf@oldenburg.str.redhat.com/","msgid":"<874jhp3nwf.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-13T11:15:12","name":"gm2: Add missing declaration of m2pim_M2RTS_Terminate to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhp3nwf.fsf@oldenburg.str.redhat.com/mbox/"},{"id":164439,"url":"https://patchwork.plctlab.org/api/1.2/patches/164439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVINdo+Hef8H+H5w@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-13T11:50:14","name":"c++: Implement C++26 P2864R2 - Remove Deprecated Arithmetic Conversion on Enumerations From C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVINdo+Hef8H+H5w@tucnak/mbox/"},{"id":164443,"url":"https://patchwork.plctlab.org/api/1.2/patches/164443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113120050.608605-1-juzhe.zhong@rivai.ai/","msgid":"<20231113120050.608605-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-13T12:00:50","name":"[Committed] RISC-V: Adapt VLS init tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113120050.608605-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164454,"url":"https://patchwork.plctlab.org/api/1.2/patches/164454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113123958.22A821358C@imap2.suse-dmz.suse.de/","msgid":"<20231113123958.22A821358C@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T12:39:57","name":"tree-optimization/111792 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113123958.22A821358C@imap2.suse-dmz.suse.de/mbox/"},{"id":164472,"url":"https://patchwork.plctlab.org/api/1.2/patches/164472/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7ee58c567233aab1b36b9d09f79af6d0108a98b.1699879818.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T13:09:57","name":"[1/6] c-family: Introduce pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7ee58c567233aab1b36b9d09f79af6d0108a98b.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164473,"url":"https://patchwork.plctlab.org/api/1.2/patches/164473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com/","msgid":"<5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:10:34","name":"[2/6] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5b20c39f10a387650728861d055eebb6774eb876.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164474,"url":"https://patchwork.plctlab.org/api/1.2/patches/164474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com/","msgid":"<309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:11:05","name":"[4/6] c: Turn -Wimplicit-int into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/309d163cd3eff4b3fbe9be5198443ccf231d65ba.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164476,"url":"https://patchwork.plctlab.org/api/1.2/patches/164476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f036ee4b116bfe608ff3cf094f1f42f2c8235761.1699879818.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-13T13:11:14","name":"[5/6] c: Turn -Wreturn-mismatch into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f036ee4b116bfe608ff3cf094f1f42f2c8235761.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164478,"url":"https://patchwork.plctlab.org/api/1.2/patches/164478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com/","msgid":"<212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-13T13:11:21","name":"[6/6] c: Turn -Wincompatible-pointer-types into a pedpermerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/212c5e6a96543257d45471b92a8c4e994ff33151.1699879818.git.fweimer@redhat.com/mbox/"},{"id":164490,"url":"https://patchwork.plctlab.org/api/1.2/patches/164490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133830.E0A6613398@imap2.suse-dmz.suse.de/","msgid":"<20231113133830.E0A6613398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T13:38:30","name":"tree-optimization/112495 - alias versioning and address spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133830.E0A6613398@imap2.suse-dmz.suse.de/mbox/"},{"id":164491,"url":"https://patchwork.plctlab.org/api/1.2/patches/164491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133844.16AD213398@imap2.suse-dmz.suse.de/","msgid":"<20231113133844.16AD213398@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-13T13:38:43","name":"middle-end/112487 - inline and parameter mismatch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113133844.16AD213398@imap2.suse-dmz.suse.de/mbox/"},{"id":164501,"url":"https://patchwork.plctlab.org/api/1.2/patches/164501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-2-rearnsha@arm.com/","msgid":"<20231113142658.69039-2-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:37","name":"[committed,01/22] arm: testsuite: correctly detect armv6t2 hardware for acle execution tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-2-rearnsha@arm.com/mbox/"},{"id":164502,"url":"https://patchwork.plctlab.org/api/1.2/patches/164502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-3-rearnsha@arm.com/","msgid":"<20231113142658.69039-3-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:38","name":"[committed,02/22] arm: testsuite: correctly detect hard_float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-3-rearnsha@arm.com/mbox/"},{"id":164504,"url":"https://patchwork.plctlab.org/api/1.2/patches/164504/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-5-rearnsha@arm.com/","msgid":"<20231113142658.69039-5-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:40","name":"[committed,04/22] arm: testsuite: avoid problems with -mfpu=auto in pacbti-m-predef-11.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-5-rearnsha@arm.com/mbox/"},{"id":164506,"url":"https://patchwork.plctlab.org/api/1.2/patches/164506/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-6-rearnsha@arm.com/","msgid":"<20231113142658.69039-6-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:41","name":"[committed,05/22] arm: testsuite: avoid problems with -mfpu=auto in attr-crypto.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-6-rearnsha@arm.com/mbox/"},{"id":164509,"url":"https://patchwork.plctlab.org/api/1.2/patches/164509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-10-rearnsha@arm.com/","msgid":"<20231113142658.69039-10-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:45","name":"[committed,09/22] arm: testsuite: tidy up pr65647-2.c pre-checks.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-10-rearnsha@arm.com/mbox/"},{"id":164503,"url":"https://patchwork.plctlab.org/api/1.2/patches/164503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-11-rearnsha@arm.com/","msgid":"<20231113142658.69039-11-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:46","name":"[committed,10/22] arm: testsuite: improve compatibility of arm/pr78353-*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-11-rearnsha@arm.com/mbox/"},{"id":164505,"url":"https://patchwork.plctlab.org/api/1.2/patches/164505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-12-rearnsha@arm.com/","msgid":"<20231113142658.69039-12-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:47","name":"[committed,11/22] arm: testsuite: improve compatibility of pr88648-asm-syntax-unified.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-12-rearnsha@arm.com/mbox/"},{"id":164507,"url":"https://patchwork.plctlab.org/api/1.2/patches/164507/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-13-rearnsha@arm.com/","msgid":"<20231113142658.69039-13-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:48","name":"[committed,12/22] arm: testsuite: improve compatibility of pragma_arch_attribute*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-13-rearnsha@arm.com/mbox/"},{"id":164512,"url":"https://patchwork.plctlab.org/api/1.2/patches/164512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-16-rearnsha@arm.com/","msgid":"<20231113142658.69039-16-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:51","name":"[committed,15/22] arm: testsuite: improve compatibility of ftest-armv7m-thumb.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-16-rearnsha@arm.com/mbox/"},{"id":164511,"url":"https://patchwork.plctlab.org/api/1.2/patches/164511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-17-rearnsha@arm.com/","msgid":"<20231113142658.69039-17-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:52","name":"[committed,16/22] arm: testsuite: improve compatibility of gcc.target/arm/macro_defs*.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-17-rearnsha@arm.com/mbox/"},{"id":164513,"url":"https://patchwork.plctlab.org/api/1.2/patches/164513/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-19-rearnsha@arm.com/","msgid":"<20231113142658.69039-19-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:54","name":"[committed,18/22] arm: testsuite: improve compatibility of gcc.target/arm/pr19599.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-19-rearnsha@arm.com/mbox/"},{"id":164508,"url":"https://patchwork.plctlab.org/api/1.2/patches/164508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-20-rearnsha@arm.com/","msgid":"<20231113142658.69039-20-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:55","name":"[committed,19/22] arm: testsuite: improve compatibility of gcc.target/arm/pr59575.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-20-rearnsha@arm.com/mbox/"},{"id":164510,"url":"https://patchwork.plctlab.org/api/1.2/patches/164510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-21-rearnsha@arm.com/","msgid":"<20231113142658.69039-21-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:56","name":"[committed,20/22] testsuite: arm: tighten up mode-specific ISA tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-21-rearnsha@arm.com/mbox/"},{"id":164514,"url":"https://patchwork.plctlab.org/api/1.2/patches/164514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-23-rearnsha@arm.com/","msgid":"<20231113142658.69039-23-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-13T14:26:58","name":"[committed,22/22] arm: testsuite: improve compatibility of gcc.dg/debug/pr57351.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113142658.69039-23-rearnsha@arm.com/mbox/"},{"id":164602,"url":"https://patchwork.plctlab.org/api/1.2/patches/164602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113190401.759232-1-jwakely@redhat.com/","msgid":"<20231113190401.759232-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T19:01:18","name":"c++: Link extended FP conversion pedwarns to -Wnarrowing [PR111842]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113190401.759232-1-jwakely@redhat.com/mbox/"},{"id":164637,"url":"https://patchwork.plctlab.org/api/1.2/patches/164637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113200840.339229-1-xry111@xry111.site/","msgid":"<20231113200840.339229-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-13T20:07:14","name":"LoongArch: Handle vectorized copysign (x, -1) expansion efficiently","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113200840.339229-1-xry111@xry111.site/mbox/"},{"id":164656,"url":"https://patchwork.plctlab.org/api/1.2/patches/164656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223542.11562-1-cupertino.miranda@oracle.com/","msgid":"<20231113223542.11562-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:35:42","name":"bpf: Delayed the removal of the parser enum plugin handler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223542.11562-1-cupertino.miranda@oracle.com/mbox/"},{"id":164657,"url":"https://patchwork.plctlab.org/api/1.2/patches/164657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223638.11660-1-cupertino.miranda@oracle.com/","msgid":"<20231113223638.11660-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:36:38","name":"bpf: Corrected condition in core_mark_as_access_index.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223638.11660-1-cupertino.miranda@oracle.com/mbox/"},{"id":164658,"url":"https://patchwork.plctlab.org/api/1.2/patches/164658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223723.11760-1-cupertino.miranda@oracle.com/","msgid":"<20231113223723.11760-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:37:23","name":"bpf: Forces __buildin_memcmp not to generate a call upto 1024 bytes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223723.11760-1-cupertino.miranda@oracle.com/mbox/"},{"id":164659,"url":"https://patchwork.plctlab.org/api/1.2/patches/164659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223739.11844-1-cupertino.miranda@oracle.com/","msgid":"<20231113223739.11844-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2023-11-13T22:37:39","name":"Fixed problem with BTF defining smaller enums.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113223739.11844-1-cupertino.miranda@oracle.com/mbox/"},{"id":164674,"url":"https://patchwork.plctlab.org/api/1.2/patches/164674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113231837.369907-1-xry111@xry111.site/","msgid":"<20231113231837.369907-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-13T23:18:02","name":"LoongArch: Use finer-grained DBAR hints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113231837.369907-1-xry111@xry111.site/mbox/"},{"id":164689,"url":"https://patchwork.plctlab.org/api/1.2/patches/164689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232313.809520-1-jwakely@redhat.com/","msgid":"<20231113232313.809520-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T23:22:54","name":"[committed] libstdc++: Micro-optimization for std::optional [PR112480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232313.809520-1-jwakely@redhat.com/mbox/"},{"id":164675,"url":"https://patchwork.plctlab.org/api/1.2/patches/164675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232322.809541-1-jwakely@redhat.com/","msgid":"<20231113232322.809541-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-13T23:23:14","name":"[committed] libstdc++: Add dg-timeout-factor to remaining IO tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231113232322.809541-1-jwakely@redhat.com/mbox/"},{"id":164687,"url":"https://patchwork.plctlab.org/api/1.2/patches/164687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114001304.3290842-1-arsen@aarsen.me/","msgid":"<20231114001304.3290842-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-14T00:12:37","name":"[committed] libcpp: Regenerate config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114001304.3290842-1-arsen@aarsen.me/mbox/"},{"id":164693,"url":"https://patchwork.plctlab.org/api/1.2/patches/164693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114005555.2139904-1-hongtao.liu@intel.com/","msgid":"<20231114005555.2139904-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-14T00:55:55","name":"Fix ICE in vectorizable_nonlinear_induction with bitfield.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114005555.2139904-1-hongtao.liu@intel.com/mbox/"},{"id":164710,"url":"https://patchwork.plctlab.org/api/1.2/patches/164710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032116.3273076-1-juzhe.zhong@rivai.ai/","msgid":"<20231114032116.3273076-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:21:16","name":"[Committed] RISC-V: Fix init-2.c assembly check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032116.3273076-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164711,"url":"https://patchwork.plctlab.org/api/1.2/patches/164711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032837.1687779-1-juzhe.zhong@rivai.ai/","msgid":"<20231114032837.1687779-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:28:37","name":"[Commit,QUEUE,V3] RISC-V: Support strided load/store","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114032837.1687779-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164713,"url":"https://patchwork.plctlab.org/api/1.2/patches/164713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114033932.1696221-1-juzhe.zhong@rivai.ai/","msgid":"<20231114033932.1696221-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:39:32","name":"DOC/IFN/OPTAB: Add mask_len_strided_load/mask_len_strided_store DOC/OPTAB/IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114033932.1696221-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164715,"url":"https://patchwork.plctlab.org/api/1.2/patches/164715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114034614.1697097-1-juzhe.zhong@rivai.ai/","msgid":"<20231114034614.1697097-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T03:46:14","name":"VECT: Add MASK_LEN_STRIDED_LOAD/MASK_LEN_STRIDED_STORE into loop vectorizer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114034614.1697097-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164743,"url":"https://patchwork.plctlab.org/api/1.2/patches/164743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMfGw8fJRZnO0Fg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T07:17:47","name":"tree: Handle BITINT_TYPE in type_contains_placeholder_1 [PR112511]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMfGw8fJRZnO0Fg@tucnak/mbox/"},{"id":164745,"url":"https://patchwork.plctlab.org/api/1.2/patches/164745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMi4s6J4BoYPbJc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T07:33:54","name":"libcpp, contrib: Update to Unicode 15.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVMi4s6J4BoYPbJc@tucnak/mbox/"},{"id":164778,"url":"https://patchwork.plctlab.org/api/1.2/patches/164778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114090044.1452311-1-lehua.ding@rivai.ai/","msgid":"<20231114090044.1452311-1-lehua.ding@rivai.ai>","list_archive_url":null,"date":"2023-11-14T09:00:44","name":"x86: Make testcase apx-spill_to_egprs-1.c more robust","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114090044.1452311-1-lehua.ding@rivai.ai/mbox/"},{"id":164796,"url":"https://patchwork.plctlab.org/api/1.2/patches/164796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114094500.8160-1-chenglulu@loongson.cn/","msgid":"<20231114094500.8160-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-14T09:45:01","name":"[v1] LoongArch: Added code generation support for call36 function calls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114094500.8160-1-chenglulu@loongson.cn/mbox/"},{"id":164802,"url":"https://patchwork.plctlab.org/api/1.2/patches/164802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114100320.47373-1-xry111@xry111.site/","msgid":"<20231114100320.47373-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-14T09:59:44","name":"Only allow (copysign x, NEG_CONST) -> (fneg (fabs x)) simplification for constant folding [PR112483]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114100320.47373-1-xry111@xry111.site/mbox/"},{"id":164812,"url":"https://patchwork.plctlab.org/api/1.2/patches/164812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de/","msgid":"<36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de>","list_archive_url":null,"date":"2023-11-14T10:15:02","name":"[avr,committed] Libf7: Use paper-pencil algorithm for sqrt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/36ed7679-485e-4cc9-a575-8532abeb45ee@gjlay.de/mbox/"},{"id":164822,"url":"https://patchwork.plctlab.org/api/1.2/patches/164822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105118.303519-1-krebbel@linux.ibm.com/","msgid":"<20231114105118.303519-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T10:51:18","name":"[Committed] IBM Z: Fix ICE with overloading and checking enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105118.303519-1-krebbel@linux.ibm.com/mbox/"},{"id":164823,"url":"https://patchwork.plctlab.org/api/1.2/patches/164823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105127.303538-1-krebbel@linux.ibm.com/","msgid":"<20231114105127.303538-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T10:51:27","name":"[Committed] IBM Z: Add GTY marker to builtin data structures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114105127.303538-1-krebbel@linux.ibm.com/mbox/"},{"id":164868,"url":"https://patchwork.plctlab.org/api/1.2/patches/164868/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114113803.4192929-1-juzhe.zhong@rivai.ai/","msgid":"<20231114113803.4192929-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-14T11:38:03","name":"RISC-V: Support trailing vec_init optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114113803.4192929-1-juzhe.zhong@rivai.ai/mbox/"},{"id":164871,"url":"https://patchwork.plctlab.org/api/1.2/patches/164871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114114454.557933-2-stefansf@linux.ibm.com/","msgid":"<20231114114454.557933-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T11:44:55","name":"s390: Fix vec_scatter_element for vectors of floats","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114114454.557933-2-stefansf@linux.ibm.com/mbox/"},{"id":164875,"url":"https://patchwork.plctlab.org/api/1.2/patches/164875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115933.833533857342@sourceware.org/","msgid":"<20231114115933.833533857342@sourceware.org>","list_archive_url":null,"date":"2023-11-14T11:59:04","name":"tree-optimization/112281 - loop distribution and zero dependence distances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115933.833533857342@sourceware.org/mbox/"},{"id":164876,"url":"https://patchwork.plctlab.org/api/1.2/patches/164876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115941.5B7D13856DE7@sourceware.org/","msgid":"<20231114115941.5B7D13856DE7@sourceware.org>","list_archive_url":null,"date":"2023-11-14T11:59:16","name":"Loop distribution fix for SCC detection","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114115941.5B7D13856DE7@sourceware.org/mbox/"},{"id":164877,"url":"https://patchwork.plctlab.org/api/1.2/patches/164877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVNi36Ljh1Rhi27B@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T12:06:55","name":"i386: Fix up 3_doubleword_lowpart [PR112523]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVNi36Ljh1Rhi27B@tucnak/mbox/"},{"id":164926,"url":"https://patchwork.plctlab.org/api/1.2/patches/164926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141352.F3BC2385840E@sourceware.org/","msgid":"<20231114141352.F3BC2385840E@sourceware.org>","list_archive_url":null,"date":"2023-11-14T14:13:27","name":"tree-optimization/111233 - loop splitting miscompile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141352.F3BC2385840E@sourceware.org/mbox/"},{"id":164942,"url":"https://patchwork.plctlab.org/api/1.2/patches/164942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141455.24465-1-kito.cheng@sifive.com/","msgid":"<20231114141455.24465-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-14T14:14:55","name":"RISC-V: Save/restore ra register correctly [PR112478]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141455.24465-1-kito.cheng@sifive.com/mbox/"},{"id":164943,"url":"https://patchwork.plctlab.org/api/1.2/patches/164943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141513.24515-1-kito.cheng@sifive.com/","msgid":"<20231114141513.24515-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-14T14:15:13","name":"[v2] RISC-V: Implement target attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114141513.24515-1-kito.cheng@sifive.com/mbox/"},{"id":164990,"url":"https://patchwork.plctlab.org/api/1.2/patches/164990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114151958.575444-2-stefansf@linux.ibm.com/","msgid":"<20231114151958.575444-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-14T15:19:59","name":"s390: Fix builtins floating-point convert to/from fixed","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114151958.575444-2-stefansf@linux.ibm.com/mbox/"},{"id":164998,"url":"https://patchwork.plctlab.org/api/1.2/patches/164998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/755c6708-2200-4a22-a065-45b721bf692a@redhat.com/","msgid":"<755c6708-2200-4a22-a065-45b721bf692a@redhat.com>","list_archive_url":null,"date":"2023-11-14T15:33:46","name":"[COMMITTED] PR tree-optimization/112509 - Use case label type to create case range.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/755c6708-2200-4a22-a065-45b721bf692a@redhat.com/mbox/"},{"id":165026,"url":"https://patchwork.plctlab.org/api/1.2/patches/165026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114155848.892568-1-jwakely@redhat.com/","msgid":"<20231114155848.892568-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T15:58:29","name":"[committed] libstdc++: Fix std::deque::size() Xmethod [PR112491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114155848.892568-1-jwakely@redhat.com/mbox/"},{"id":165011,"url":"https://patchwork.plctlab.org/api/1.2/patches/165011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114161044.985367-1-ppalka@redhat.com/","msgid":"<20231114161044.985367-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:10:44","name":"c++: decltype of (non-captured variable) [PR83167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114161044.985367-1-ppalka@redhat.com/mbox/"},{"id":165013,"url":"https://patchwork.plctlab.org/api/1.2/patches/165013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163215.3689629-1-dmalcolm@redhat.com/","msgid":"<20231114163215.3689629-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:32:15","name":"[pushed] json: reduce use of naked new in json-building code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163215.3689629-1-dmalcolm@redhat.com/mbox/"},{"id":165014,"url":"https://patchwork.plctlab.org/api/1.2/patches/165014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163219.3689663-1-dmalcolm@redhat.com/","msgid":"<20231114163219.3689663-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:32:19","name":"[pushed] input.h: eliminate implicit users of global_dc'\''s file_cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163219.3689663-1-dmalcolm@redhat.com/mbox/"},{"id":165018,"url":"https://patchwork.plctlab.org/api/1.2/patches/165018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163536.1208039-1-ppalka@redhat.com/","msgid":"<20231114163536.1208039-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T16:35:36","name":"c++: direct enum init from type-dep elt [PR112515]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114163536.1208039-1-ppalka@redhat.com/mbox/"},{"id":165027,"url":"https://patchwork.plctlab.org/api/1.2/patches/165027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVOwnzHtcJahNKGh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:38:39","name":"c++, v2: Implement C++26 P2864R2 - Remove Deprecated Arithmetic Conversion on Enumerations From C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVOwnzHtcJahNKGh@tucnak/mbox/"},{"id":165033,"url":"https://patchwork.plctlab.org/api/1.2/patches/165033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com/","msgid":"<8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:16","name":"[v2,1/8] Add tests for validating future C permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8cc6c84650efbc55326ccaf82982d493aa5cc5f2.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165034,"url":"https://patchwork.plctlab.org/api/1.2/patches/165034/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com/","msgid":"<64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:26","name":"[v2,2/8] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/64b3080a229e541cd6f1a687cbe0690bc0d1c2c5.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165035,"url":"https://patchwork.plctlab.org/api/1.2/patches/165035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8fa47abb2dcfb91f8707178973db942fdd0f3c2.1699983736.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:50:35","name":"[v2,3/8] c: Turn -Wimplicit-function-declaration into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b8fa47abb2dcfb91f8707178973db942fdd0f3c2.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165038,"url":"https://patchwork.plctlab.org/api/1.2/patches/165038/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com/","msgid":"<78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:44","name":"[v2,5/8] c: Do not ignore some forms of -Wimplicit-int in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/78cec351fe80ff14ef5881e726aa53d1ec69c750.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165036,"url":"https://patchwork.plctlab.org/api/1.2/patches/165036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com/","msgid":"<84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:48","name":"[v2,6/8] c: Turn -Wreturn-mismatch into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/84c3f9253de98c4856ea6536286c5783d8496676.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165037,"url":"https://patchwork.plctlab.org/api/1.2/patches/165037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com/","msgid":"<3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-14T17:50:53","name":"[v2,7/8] c: Turn -Wincompatible-pointer-types into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3941cfcc512a1b0e5b1f8f5b5dea25574b82d9dd.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165039,"url":"https://patchwork.plctlab.org/api/1.2/patches/165039/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5f0cb7b4691598e5f61634f08d162f5d7e90d38.1699983736.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-14T17:50:58","name":"[v2,8/8] c: Add new -Wdeclaration-missing-parameter-type permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5f0cb7b4691598e5f61634f08d162f5d7e90d38.1699983736.git.fweimer@redhat.com/mbox/"},{"id":165056,"url":"https://patchwork.plctlab.org/api/1.2/patches/165056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191309.3709363-1-dmalcolm@redhat.com/","msgid":"<20231114191309.3709363-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:09","name":"[pushed] diagnostics: convert diagnostic_ready_p to an inline function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191309.3709363-1-dmalcolm@redhat.com/mbox/"},{"id":165057,"url":"https://patchwork.plctlab.org/api/1.2/patches/165057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191313.3709388-1-dmalcolm@redhat.com/","msgid":"<20231114191313.3709388-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:13","name":"[pushed] diagnostics: make m_text_callbacks private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191313.3709388-1-dmalcolm@redhat.com/mbox/"},{"id":165058,"url":"https://patchwork.plctlab.org/api/1.2/patches/165058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191319.3709422-1-dmalcolm@redhat.com/","msgid":"<20231114191319.3709422-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T19:13:19","name":"[pushed] diagnostics: make option-handling callbacks private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114191319.3709422-1-dmalcolm@redhat.com/mbox/"},{"id":165063,"url":"https://patchwork.plctlab.org/api/1.2/patches/165063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114200014.2394259-1-dimitar@dinux.eu/","msgid":"<20231114200014.2394259-1-dimitar@dinux.eu>","list_archive_url":null,"date":"2023-11-14T20:00:14","name":"[committed] testsuite: Ignore warning for unsupported option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114200014.2394259-1-dimitar@dinux.eu/mbox/"},{"id":165081,"url":"https://patchwork.plctlab.org/api/1.2/patches/165081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114205638.3720804-1-dmalcolm@redhat.com/","msgid":"<20231114205638.3720804-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-14T20:56:38","name":"[pushed] analyzer: enable taint state machine by default [PR103533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114205638.3720804-1-dmalcolm@redhat.com/mbox/"},{"id":165087,"url":"https://patchwork.plctlab.org/api/1.2/patches/165087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114210445.1469279-1-ppalka@redhat.com/","msgid":"<20231114210445.1469279-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-14T21:04:45","name":"c++: partially inst requires-expr in noexcept-spec [PR101043]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114210445.1469279-1-ppalka@redhat.com/mbox/"},{"id":165101,"url":"https://patchwork.plctlab.org/api/1.2/patches/165101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114215404.163508-2-xry111@xry111.site/","msgid":"<20231114215404.163508-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-14T21:52:28","name":"[v2] LoongArch: Remove redundant barrier instructions before LL-SC loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114215404.163508-2-xry111@xry111.site/mbox/"},{"id":165107,"url":"https://patchwork.plctlab.org/api/1.2/patches/165107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114220825.22074-4-sebastian.huber@embedded-brains.de/","msgid":"<20231114220825.22074-4-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-14T22:08:24","name":"[3/4] gcov: Add gen_counter_update()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114220825.22074-4-sebastian.huber@embedded-brains.de/mbox/"},{"id":165129,"url":"https://patchwork.plctlab.org/api/1.2/patches/165129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114223251.951537-1-jwakely@redhat.com/","msgid":"<20231114223251.951537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T22:32:21","name":"[committed] libstdc++: Fix std::hash [PR112348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114223251.951537-1-jwakely@redhat.com/mbox/"},{"id":165131,"url":"https://patchwork.plctlab.org/api/1.2/patches/165131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114224539.988344-1-jwakely@redhat.com/","msgid":"<20231114224539.988344-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-14T22:45:23","name":"[committed] libstdc++: Fix uses of signed types with functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231114224539.988344-1-jwakely@redhat.com/mbox/"},{"id":165132,"url":"https://patchwork.plctlab.org/api/1.2/patches/165132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115002128.2143444-1-vineetg@rivosinc.com/","msgid":"<20231115002128.2143444-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T00:21:28","name":"[RESEND,v4] RISC-V: elide unnecessary sign extend when expanding cmp_and_jump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115002128.2143444-1-vineetg@rivosinc.com/mbox/"},{"id":165134,"url":"https://patchwork.plctlab.org/api/1.2/patches/165134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005203.3748210-1-dmalcolm@redhat.com/","msgid":"<20231115005203.3748210-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-15T00:52:03","name":"[pushed] json.cc: use SELFTEST_LOCATION in selftests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005203.3748210-1-dmalcolm@redhat.com/mbox/"},{"id":165135,"url":"https://patchwork.plctlab.org/api/1.2/patches/165135/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005457.3748674-1-dmalcolm@redhat.com/","msgid":"<20231115005457.3748674-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-15T00:54:57","name":"[PATCH/RFC] json.cc: format JSON output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115005457.3748674-1-dmalcolm@redhat.com/mbox/"},{"id":165142,"url":"https://patchwork.plctlab.org/api/1.2/patches/165142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115013317.88282-1-patrick@rivosinc.com/","msgid":"<20231115013317.88282-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T01:33:17","name":"RISC-V: Fix ICE in non-canonical march parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115013317.88282-1-patrick@rivosinc.com/mbox/"},{"id":165140,"url":"https://patchwork.plctlab.org/api/1.2/patches/165140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com/","msgid":"<4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T02:24:10","name":"Clean up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4d66d2b2-94d7-4955-81a3-83622c00585a@linux.ibm.com/mbox/"},{"id":165141,"url":"https://patchwork.plctlab.org/api/1.2/patches/165141/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com/","msgid":"<87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T02:26:28","name":"Clean up by_pieces_ninsns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edf7bc-1096-486d-a029-f6a3450739c9@linux.ibm.com/mbox/"},{"id":165144,"url":"https://patchwork.plctlab.org/api/1.2/patches/165144/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd6311b1-9371-4c3f-b023-d3400c70fea6@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T03:01:26","name":"rs6000: Only enable PCREL on supported ABIs [PR111045]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd6311b1-9371-4c3f-b023-d3400c70fea6@linux.ibm.com/mbox/"},{"id":165145,"url":"https://patchwork.plctlab.org/api/1.2/patches/165145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-1-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:35","name":"[V2,1/3] rs6000: update num_insns_constant for 2 insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-1-guojiufu@linux.ibm.com/mbox/"},{"id":165147,"url":"https://patchwork.plctlab.org/api/1.2/patches/165147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-2-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:36","name":"[V2,2/3] Using pli to split 34bits constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-2-guojiufu@linux.ibm.com/mbox/"},{"id":165146,"url":"https://patchwork.plctlab.org/api/1.2/patches/165146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-3-guojiufu@linux.ibm.com/","msgid":"<20231115030237.1188073-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T03:02:37","name":"[V2,3/3] split complicate constant to memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115030237.1188073-3-guojiufu@linux.ibm.com/mbox/"},{"id":165179,"url":"https://patchwork.plctlab.org/api/1.2/patches/165179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115034801.979185-1-pan2.li@intel.com/","msgid":"<20231115034801.979185-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-15T03:48:01","name":"[v1] RISC-V: Refine the mask generation for vec_init case 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115034801.979185-1-pan2.li@intel.com/mbox/"},{"id":165186,"url":"https://patchwork.plctlab.org/api/1.2/patches/165186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115053014.166349-1-tom@tromey.com/","msgid":"<20231115053014.166349-1-tom@tromey.com>","list_archive_url":null,"date":"2023-11-15T05:30:14","name":"Fix crash in libcc1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115053014.166349-1-tom@tromey.com/mbox/"},{"id":165188,"url":"https://patchwork.plctlab.org/api/1.2/patches/165188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115064107.2151843-1-vineetg@rivosinc.com/","msgid":"<20231115064107.2151843-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T06:41:07","name":"RISC-V: fix vsetvli pass testsuite failure [PR/112447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115064107.2151843-1-vineetg@rivosinc.com/mbox/"},{"id":165191,"url":"https://patchwork.plctlab.org/api/1.2/patches/165191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071236.1250103-1-pan2.li@intel.com/","msgid":"<20231115071236.1250103-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-15T07:12:36","name":"[v2] RISC-V: Refine the mask generation for vec_init case 2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071236.1250103-1-pan2.li@intel.com/mbox/"},{"id":165192,"url":"https://patchwork.plctlab.org/api/1.2/patches/165192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071508.3273813-1-juzhe.zhong@rivai.ai/","msgid":"<20231115071508.3273813-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-15T07:15:08","name":"RISC-V: Disallow RVV mode address for any load/store[PR112535]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115071508.3273813-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165195,"url":"https://patchwork.plctlab.org/api/1.2/patches/165195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVR6Ggrw8q5oUsi7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T07:58:18","name":"[committed] testsuite: Adjust gcc.dg/cpp/if-2.c for 16-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVR6Ggrw8q5oUsi7@tucnak/mbox/"},{"id":165202,"url":"https://patchwork.plctlab.org/api/1.2/patches/165202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be4a62d2-32eb-eb3b-56de-801d602e364d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T09:01:46","name":"sched: Remove debug counter sched_block","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be4a62d2-32eb-eb3b-56de-801d602e364d@linux.ibm.com/mbox/"},{"id":165219,"url":"https://patchwork.plctlab.org/api/1.2/patches/165219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7b0d8fb-64a0-2ed2-f333-06b79133e68f@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T09:16:15","name":"rs6000: New pass to mitigate SP float load perf issue on Power10","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b7b0d8fb-64a0-2ed2-f333-06b79133e68f@linux.ibm.com/mbox/"},{"id":165228,"url":"https://patchwork.plctlab.org/api/1.2/patches/165228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094327.3976469-1-hongyu.wang@intel.com/","msgid":"<20231115094327.3976469-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:43:27","name":"[i386] APX: Fix EGPR usage in several patterns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094327.3976469-1-hongyu.wang@intel.com/mbox/"},{"id":165232,"url":"https://patchwork.plctlab.org/api/1.2/patches/165232/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-2-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:50","name":"[01/16,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-2-hongyu.wang@intel.com/mbox/"},{"id":165229,"url":"https://patchwork.plctlab.org/api/1.2/patches/165229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-3-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:51","name":"[02/16,APX,NDD] Restrict TImode register usage when NDD enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-3-hongyu.wang@intel.com/mbox/"},{"id":165235,"url":"https://patchwork.plctlab.org/api/1.2/patches/165235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-4-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:52","name":"[03/16,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-4-hongyu.wang@intel.com/mbox/"},{"id":165230,"url":"https://patchwork.plctlab.org/api/1.2/patches/165230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-5-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:53","name":"[04/16,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-5-hongyu.wang@intel.com/mbox/"},{"id":165238,"url":"https://patchwork.plctlab.org/api/1.2/patches/165238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-6-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:54","name":"[05/16,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-6-hongyu.wang@intel.com/mbox/"},{"id":165231,"url":"https://patchwork.plctlab.org/api/1.2/patches/165231/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-7-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:55","name":"[06/16,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-7-hongyu.wang@intel.com/mbox/"},{"id":165239,"url":"https://patchwork.plctlab.org/api/1.2/patches/165239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-8-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:56","name":"[07/16,APX,NDD] Support APX NDD for sbb insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-8-hongyu.wang@intel.com/mbox/"},{"id":165233,"url":"https://patchwork.plctlab.org/api/1.2/patches/165233/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-9-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:57","name":"[08/16,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-9-hongyu.wang@intel.com/mbox/"},{"id":165236,"url":"https://patchwork.plctlab.org/api/1.2/patches/165236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-10-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:58","name":"[09/16,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-10-hongyu.wang@intel.com/mbox/"},{"id":165241,"url":"https://patchwork.plctlab.org/api/1.2/patches/165241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-11-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:46:59","name":"[10/16,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-11-hongyu.wang@intel.com/mbox/"},{"id":165242,"url":"https://patchwork.plctlab.org/api/1.2/patches/165242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-12-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:00","name":"[11/16,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-12-hongyu.wang@intel.com/mbox/"},{"id":165237,"url":"https://patchwork.plctlab.org/api/1.2/patches/165237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-13-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:01","name":"[12/16,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-13-hongyu.wang@intel.com/mbox/"},{"id":165244,"url":"https://patchwork.plctlab.org/api/1.2/patches/165244/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-14-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:02","name":"[13/16,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-14-hongyu.wang@intel.com/mbox/"},{"id":165234,"url":"https://patchwork.plctlab.org/api/1.2/patches/165234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-15-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:03","name":"[14/16,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-15-hongyu.wang@intel.com/mbox/"},{"id":165243,"url":"https://patchwork.plctlab.org/api/1.2/patches/165243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-16-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:04","name":"[15/16,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-16-hongyu.wang@intel.com/mbox/"},{"id":165240,"url":"https://patchwork.plctlab.org/api/1.2/patches/165240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-17-hongyu.wang@intel.com/","msgid":"<20231115094705.3976553-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-15T09:47:05","name":"[16/16,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115094705.3976553-17-hongyu.wang@intel.com/mbox/"},{"id":165275,"url":"https://patchwork.plctlab.org/api/1.2/patches/165275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115104854.1784462-1-rearnsha@arm.com/","msgid":"<20231115104854.1784462-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-15T10:48:54","name":"[committed] arm: testsuite: fix test for armv6t2 hardware","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115104854.1784462-1-rearnsha@arm.com/mbox/"},{"id":165278,"url":"https://patchwork.plctlab.org/api/1.2/patches/165278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkIHRolM2qc0o4@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T10:57:36","name":"[2/4] libsanitizer: Apply local patches","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkIHRolM2qc0o4@tucnak/mbox/"},{"id":165279,"url":"https://patchwork.plctlab.org/api/1.2/patches/165279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkgWx1fGtpCl07@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T10:59:13","name":"[3/4] libsanitizer: Adjust the asan/sanity-check-pure-c-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSkgWx1fGtpCl07@tucnak/mbox/"},{"id":165280,"url":"https://patchwork.plctlab.org/api/1.2/patches/165280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlPz/p3ZzphPeF@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-15T11:02:23","name":"[4/4] libsanitizer: Readd __ubsan_handle_function_type_mismatch_v1{,_abort}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlPz/p3ZzphPeF@tucnak/mbox/"},{"id":165281,"url":"https://patchwork.plctlab.org/api/1.2/patches/165281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlSHRh9Q1vGvMH@localhost.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-15T11:02:32","name":"[PING,v2] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVSlSHRh9Q1vGvMH@localhost.localdomain/mbox/"},{"id":165331,"url":"https://patchwork.plctlab.org/api/1.2/patches/165331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113001.1048257-1-jwakely@redhat.com/","msgid":"<20231115113001.1048257-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-15T11:28:38","name":"[committed] libstdc++: std::stacktrace tweaks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113001.1048257-1-jwakely@redhat.com/mbox/"},{"id":165343,"url":"https://patchwork.plctlab.org/api/1.2/patches/165343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113019.1048370-1-jwakely@redhat.com/","msgid":"<20231115113019.1048370-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-15T11:30:03","name":"[committed] libstdc++: Fix std::deque::operator[] Xmethod [PR112491]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115113019.1048370-1-jwakely@redhat.com/mbox/"},{"id":165321,"url":"https://patchwork.plctlab.org/api/1.2/patches/165321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121204.1B4C5385C410@sourceware.org/","msgid":"<20231115121204.1B4C5385C410@sourceware.org>","list_archive_url":null,"date":"2023-11-15T12:11:35","name":"Fix ICE with SLP and -fdbg-cnt","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121204.1B4C5385C410@sourceware.org/mbox/"},{"id":165322,"url":"https://patchwork.plctlab.org/api/1.2/patches/165322/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121218.09387385B531@sourceware.org/","msgid":"<20231115121218.09387385B531@sourceware.org>","list_archive_url":null,"date":"2023-11-15T12:11:50","name":"tree-optimization/112282 - wrong-code with ifcvt hoisting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115121218.09387385B531@sourceware.org/mbox/"},{"id":165344,"url":"https://patchwork.plctlab.org/api/1.2/patches/165344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131252.25924-1-jchrist@linux.ibm.com/","msgid":"<20231115131252.25924-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:12:52","name":"s390: Fix ICE in testcase pr89233","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131252.25924-1-jchrist@linux.ibm.com/mbox/"},{"id":165345,"url":"https://patchwork.plctlab.org/api/1.2/patches/165345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131519.26144-1-jchrist@linux.ibm.com/","msgid":"<20231115131519.26144-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:15:19","name":"s390: split int128 load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131519.26144-1-jchrist@linux.ibm.com/mbox/"},{"id":165346,"url":"https://patchwork.plctlab.org/api/1.2/patches/165346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131525.26166-1-jchrist@linux.ibm.com/","msgid":"<20231115131525.26166-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:15:25","name":"s390: implement flags output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115131525.26166-1-jchrist@linux.ibm.com/mbox/"},{"id":165363,"url":"https://patchwork.plctlab.org/api/1.2/patches/165363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115132949.1726209-1-stefansf@linux.ibm.com/","msgid":"<20231115132949.1726209-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T13:29:49","name":"s390: Fix generation of s390-gen-builtins.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115132949.1726209-1-stefansf@linux.ibm.com/mbox/"},{"id":165392,"url":"https://patchwork.plctlab.org/api/1.2/patches/165392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com/","msgid":"<8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com>","list_archive_url":null,"date":"2023-11-15T14:09:36","name":"[committed] amdgcn: simplify secondary reload patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8785e1cc-1e61-4487-80fa-4ef1d6220121@codesourcery.com/mbox/"},{"id":165393,"url":"https://patchwork.plctlab.org/api/1.2/patches/165393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd91ab4e-7e7a-46a7-a4df-207b323140b9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T14:10:47","name":"[committed] amdgcn: Add Accelerator VGPR registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd91ab4e-7e7a-46a7-a4df-207b323140b9@codesourcery.com/mbox/"},{"id":165399,"url":"https://patchwork.plctlab.org/api/1.2/patches/165399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5rfum3v.fsf@euler.schwinge.homeip.net/","msgid":"<87a5rfum3v.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-15T14:28:36","name":"nvptx: Extend '\''brev'\'' test cases (was: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5rfum3v.fsf@euler.schwinge.homeip.net/mbox/"},{"id":165407,"url":"https://patchwork.plctlab.org/api/1.2/patches/165407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y23ulq5.fsf@euler.schwinge.homeip.net/","msgid":"<875y23ulq5.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-15T14:36:50","name":"nvptx: Fix copy'\''n'\''paste-o in '\''__builtin_nvptx_brev'\'' description (was: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/875y23ulq5.fsf@euler.schwinge.homeip.net/mbox/"},{"id":165497,"url":"https://patchwork.plctlab.org/api/1.2/patches/165497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com/","msgid":"<4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com>","list_archive_url":null,"date":"2023-11-15T16:51:20","name":"Fortran: fix reallocation on assignment of polymorphic variables [PR110415]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e478077-4d4c-4e2f-8453-5fe77cf24b8b@codesourcery.com/mbox/"},{"id":165502,"url":"https://patchwork.plctlab.org/api/1.2/patches/165502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18011-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:02:10","name":"AArch64: only discount MLA for vector and scalar statements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18011-tamar@arm.com/mbox/"},{"id":165509,"url":"https://patchwork.plctlab.org/api/1.2/patches/165509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT6y12WEa9cwQqo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:07:23","name":"[2/6] AArch64: Remove special handling of generic cpu.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT6y12WEa9cwQqo@arm.com/mbox/"},{"id":165512,"url":"https://patchwork.plctlab.org/api/1.2/patches/165512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT7EuX7I1X0+xfV@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T17:08:34","name":"[6/6] AArch64: only emit mismatch error when features would be disabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVT7EuX7I1X0+xfV@arm.com/mbox/"},{"id":165525,"url":"https://patchwork.plctlab.org/api/1.2/patches/165525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173706.2159712-1-vineetg@rivosinc.com/","msgid":"<20231115173706.2159712-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T17:37:06","name":"[Committed] RISC-V: elide unnecessary sign extend when expanding cmp_and_jump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173706.2159712-1-vineetg@rivosinc.com/mbox/"},{"id":165540,"url":"https://patchwork.plctlab.org/api/1.2/patches/165540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173913.2159755-1-vineetg@rivosinc.com/","msgid":"<20231115173913.2159755-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T17:39:13","name":"[Committed] RISC-V: fix vsetvli pass testsuite failure [PR/112447]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115173913.2159755-1-vineetg@rivosinc.com/mbox/"},{"id":165543,"url":"https://patchwork.plctlab.org/api/1.2/patches/165543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115180350.2126787-1-ppalka@redhat.com/","msgid":"<20231115180350.2126787-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-15T18:03:49","name":"c++: constantness of call to function pointer [PR111703]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115180350.2126787-1-ppalka@redhat.com/mbox/"},{"id":165545,"url":"https://patchwork.plctlab.org/api/1.2/patches/165545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115182815.98917-1-patrick@rivosinc.com/","msgid":"<20231115182815.98917-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T18:28:15","name":"[Committed] RISC-V: Fix ICE in non-canonical march parsing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115182815.98917-1-patrick@rivosinc.com/mbox/"},{"id":165560,"url":"https://patchwork.plctlab.org/api/1.2/patches/165560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115193125.1888314-1-mjw@redhat.com/","msgid":"<20231115193125.1888314-1-mjw@redhat.com>","list_archive_url":null,"date":"2023-11-15T19:31:25","name":"[COMMITTED] Regenerate libiberty/aclocal.m4 with aclocal 1.15.1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115193125.1888314-1-mjw@redhat.com/mbox/"},{"id":165627,"url":"https://patchwork.plctlab.org/api/1.2/patches/165627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVVFBevWkXfRbaVe@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-15T22:24:05","name":"[v3] c++: fix parsing with auto(x) [PR112410]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVVFBevWkXfRbaVe@redhat.com/mbox/"},{"id":165629,"url":"https://patchwork.plctlab.org/api/1.2/patches/165629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115233042.557245-1-ewlu@rivosinc.com/","msgid":"<20231115233042.557245-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-11-15T23:30:42","name":"RISC-V: Change unaligned fast/slow/avoid macros to misaligned [PR111557]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231115233042.557245-1-ewlu@rivosinc.com/mbox/"},{"id":165631,"url":"https://patchwork.plctlab.org/api/1.2/patches/165631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com/","msgid":"<1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com>","list_archive_url":null,"date":"2023-11-15T23:50:17","name":"rs6000: Disassemble opaque modes using subregs to allow optimizations [PR109116]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f32e2bf-83c2-4664-b7f3-4a6996978a5e@linux.ibm.com/mbox/"},{"id":165690,"url":"https://patchwork.plctlab.org/api/1.2/patches/165690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116040907.1647406-1-juzhe.zhong@rivai.ai/","msgid":"<20231116040907.1647406-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-16T04:09:07","name":"VECT: Clear LOOP_VINFO_USING_SELECT_VL_P when loop is not partial vectorized","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116040907.1647406-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165698,"url":"https://patchwork.plctlab.org/api/1.2/patches/165698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116053614.3352917-1-hongtao.liu@intel.com/","msgid":"<20231116053614.3352917-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-16T05:36:14","name":"Fix ICE of unrecognizable insn.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116053614.3352917-1-hongtao.liu@intel.com/mbox/"},{"id":165700,"url":"https://patchwork.plctlab.org/api/1.2/patches/165700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061551.1218932-1-philipp.tomsich@vrull.eu/","msgid":"<20231116061551.1218932-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-11-16T06:15:51","name":"aarch64: costs: update for TARGET_CSSC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061551.1218932-1-philipp.tomsich@vrull.eu/mbox/"},{"id":165701,"url":"https://patchwork.plctlab.org/api/1.2/patches/165701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061607.1218967-1-philipp.tomsich@vrull.eu/","msgid":"<20231116061607.1218967-1-philipp.tomsich@vrull.eu>","list_archive_url":null,"date":"2023-11-16T06:16:07","name":"aarch64: Add support for Ampere-1B (-mcpu=ampere1b) CPU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061607.1218967-1-philipp.tomsich@vrull.eu/mbox/"},{"id":165702,"url":"https://patchwork.plctlab.org/api/1.2/patches/165702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061709.9897-1-xujiahao@loongson.cn/","msgid":"<20231116061709.9897-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T06:17:09","name":"LoongArch: Increase cost of vector aligned store/load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116061709.9897-1-xujiahao@loongson.cn/mbox/"},{"id":165712,"url":"https://patchwork.plctlab.org/api/1.2/patches/165712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVW+SSY4R6bixlAJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-16T07:01:29","name":"slp: Fix handling of IFN_CLZ/CTZ [PR112536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVW+SSY4R6bixlAJ@tucnak/mbox/"},{"id":165714,"url":"https://patchwork.plctlab.org/api/1.2/patches/165714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVXBySqtaPRGHAmX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-16T07:16:25","name":"i386: Fix mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi peephole2 [PR112526]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVXBySqtaPRGHAmX@tucnak/mbox/"},{"id":165717,"url":"https://patchwork.plctlab.org/api/1.2/patches/165717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116072745.6177-1-chenglulu@loongson.cn/","msgid":"<20231116072745.6177-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-16T07:27:46","name":"[v2] LoongArch: Add code generation support for call36 function calls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116072745.6177-1-chenglulu@loongson.cn/mbox/"},{"id":165719,"url":"https://patchwork.plctlab.org/api/1.2/patches/165719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080113.1250131-1-yangyujie@loongson.cn/","msgid":"<20231116080113.1250131-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-16T08:01:13","name":"libsanitizer: adjust triplet pattern to allow loongarch64-linux* targets.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080113.1250131-1-yangyujie@loongson.cn/mbox/"},{"id":165735,"url":"https://patchwork.plctlab.org/api/1.2/patches/165735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-1-jwakely@redhat.com/","msgid":"<20231116080314.1218556-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:02:20","name":"[committed,1/2] libstdc++: Adjust feature test in and ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-1-jwakely@redhat.com/mbox/"},{"id":165720,"url":"https://patchwork.plctlab.org/api/1.2/patches/165720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-2-jwakely@redhat.com/","msgid":"<20231116080314.1218556-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:02:21","name":"[committed,2/2] libstdc++: Use 202100L as feature test check for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116080314.1218556-2-jwakely@redhat.com/mbox/"},{"id":165743,"url":"https://patchwork.plctlab.org/api/1.2/patches/165743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-1-jwakely@redhat.com/","msgid":"<20231116081135.1220930-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:11:00","name":"[committed,1/2] libstdc++: Test for feature test macros more accurately","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-1-jwakely@redhat.com/mbox/"},{"id":165742,"url":"https://patchwork.plctlab.org/api/1.2/patches/165742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-2-jwakely@redhat.com/","msgid":"<20231116081135.1220930-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:11:01","name":"[committed,2/2] libstdc++: Only declare feature test macros in standard headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081135.1220930-2-jwakely@redhat.com/mbox/"},{"id":165736,"url":"https://patchwork.plctlab.org/api/1.2/patches/165736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081324.1221069-1-jwakely@redhat.com/","msgid":"<20231116081324.1221069-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T08:12:39","name":"[committed] libstdc++: Implement std::out_ptr and std::inout_ptr for C++23 [PR111667]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116081324.1221069-1-jwakely@redhat.com/mbox/"},{"id":165723,"url":"https://patchwork.plctlab.org/api/1.2/patches/165723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116082744.5839-1-xujiahao@loongson.cn/","msgid":"<20231116082744.5839-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T08:27:44","name":"[1/2] LoongArch: Increase cost of vector aligned store/load.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116082744.5839-1-xujiahao@loongson.cn/mbox/"},{"id":165737,"url":"https://patchwork.plctlab.org/api/1.2/patches/165737/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e07b1b73-b64d-469a-8d45-3e0e6b967791@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T09:33:39","name":"[V2] tree-optimization: Add register pressure heuristics and appropriate use of profile data","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e07b1b73-b64d-469a-8d45-3e0e6b967791@linux.ibm.com/mbox/"},{"id":165744,"url":"https://patchwork.plctlab.org/api/1.2/patches/165744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116100155.2460745-1-yangyujie@loongson.cn/","msgid":"<20231116100155.2460745-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-16T10:01:55","name":"libphobos: Fix static build.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116100155.2460745-1-yangyujie@loongson.cn/mbox/"},{"id":165755,"url":"https://patchwork.plctlab.org/api/1.2/patches/165755/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116104710.1279964-1-hongtao.liu@intel.com/","msgid":"<20231116104710.1279964-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-16T10:47:10","name":"[V2] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VCE d))).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116104710.1279964-1-hongtao.liu@intel.com/mbox/"},{"id":165786,"url":"https://patchwork.plctlab.org/api/1.2/patches/165786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120730.1312100-1-stefansf@linux.ibm.com/","msgid":"<20231116120730.1312100-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-16T12:07:30","name":"s390: Streamline NNPA builtins with their LLVM counterparts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120730.1312100-1-stefansf@linux.ibm.com/mbox/"},{"id":165781,"url":"https://patchwork.plctlab.org/api/1.2/patches/165781/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120815.23279-1-xujiahao@loongson.cn/","msgid":"<20231116120815.23279-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:08:15","name":"LoongArch: Fix scan-assembler-times of lasx/lsx test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116120815.23279-1-xujiahao@loongson.cn/mbox/"},{"id":165788,"url":"https://patchwork.plctlab.org/api/1.2/patches/165788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123004.3731806-1-liwei@loongson.cn/","msgid":"<20231116123004.3731806-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:30:04","name":"[v1] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123004.3731806-1-liwei@loongson.cn/mbox/"},{"id":165789,"url":"https://patchwork.plctlab.org/api/1.2/patches/165789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123109.41084-1-xujiahao@loongson.cn/","msgid":"<20231116123109.41084-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-16T12:31:09","name":"LoongArch: Fix scan-assembler-times of lasx/lsx test case.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116123109.41084-1-xujiahao@loongson.cn/mbox/"},{"id":165794,"url":"https://patchwork.plctlab.org/api/1.2/patches/165794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce3c556f-a63e-4328-bab3-6530126f5187@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T13:01:38","name":"Fortran: Accept -std=f2023 support, update line-length for Fortran 2023","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce3c556f-a63e-4328-bab3-6530126f5187@codesourcery.com/mbox/"},{"id":165806,"url":"https://patchwork.plctlab.org/api/1.2/patches/165806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-3-xry111@xry111.site/","msgid":"<20231116131836.504699-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:33","name":"[1/5] LoongArch: Switch loongarch-def to C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-3-xry111@xry111.site/mbox/"},{"id":165805,"url":"https://patchwork.plctlab.org/api/1.2/patches/165805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-4-xry111@xry111.site/","msgid":"<20231116131836.504699-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:34","name":"[2/5] LoongArch: genopts: Add infrastructure to generate code for new features in ISA evolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-4-xry111@xry111.site/mbox/"},{"id":165803,"url":"https://patchwork.plctlab.org/api/1.2/patches/165803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-5-xry111@xry111.site/","msgid":"<20231116131836.504699-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:35","name":"[3/5] LoongArch: Take the advantage of -mdiv32 if it'\''s enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-5-xry111@xry111.site/mbox/"},{"id":165804,"url":"https://patchwork.plctlab.org/api/1.2/patches/165804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-6-xry111@xry111.site/","msgid":"<20231116131836.504699-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:36","name":"[4/5] LoongArch: Don'\''t emit dbar 0x700 if -mld-seq-sa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-6-xry111@xry111.site/mbox/"},{"id":165807,"url":"https://patchwork.plctlab.org/api/1.2/patches/165807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-7-xry111@xry111.site/","msgid":"<20231116131836.504699-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-16T13:18:37","name":"[5/5] LoongArch: Add -march=la664 and -mtune=la664","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116131836.504699-7-xry111@xry111.site/mbox/"},{"id":165809,"url":"https://patchwork.plctlab.org/api/1.2/patches/165809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116133643.3989600-1-dmalcolm@redhat.com/","msgid":"<20231116133643.3989600-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:36:43","name":"[pushed] diagnostics: make m_lang_mask private","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116133643.3989600-1-dmalcolm@redhat.com/mbox/"},{"id":165819,"url":"https://patchwork.plctlab.org/api/1.2/patches/165819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-1-jwakely@redhat.com/","msgid":"<20231116134736.1287539-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:45:37","name":"[1/2] libstdc++: Atomic wait/notify ABI stabilization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-1-jwakely@redhat.com/mbox/"},{"id":165853,"url":"https://patchwork.plctlab.org/api/1.2/patches/165853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-2-jwakely@redhat.com/","msgid":"<20231116134736.1287539-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-16T13:45:38","name":"[2/2] libstdc++: Pass __wait_args to internal API by const pointer","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116134736.1287539-2-jwakely@redhat.com/mbox/"},{"id":165831,"url":"https://patchwork.plctlab.org/api/1.2/patches/165831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8a1rdwy.fsf@oldenburg.str.redhat.com/","msgid":"<87v8a1rdwy.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-16T14:06:05","name":"[COMMITTED] gcc.c-torture/execute/931004-13.c: Fix declaration of main","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v8a1rdwy.fsf@oldenburg.str.redhat.com/mbox/"},{"id":165837,"url":"https://patchwork.plctlab.org/api/1.2/patches/165837/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-2-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:55","name":"[1/4] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-2-dmalcolm@redhat.com/mbox/"},{"id":165842,"url":"https://patchwork.plctlab.org/api/1.2/patches/165842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-3-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:56","name":"[2/4] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-3-dmalcolm@redhat.com/mbox/"},{"id":165840,"url":"https://patchwork.plctlab.org/api/1.2/patches/165840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-4-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:57","name":"[3/4] opts: add logic to generate options-urls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-4-dmalcolm@redhat.com/mbox/"},{"id":165839,"url":"https://patchwork.plctlab.org/api/1.2/patches/165839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-5-dmalcolm@redhat.com/","msgid":"<20231116142858.3996740-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-16T14:28:58","name":"[4/4] options: wire up options-urls.cc into gcc_urlifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116142858.3996740-5-dmalcolm@redhat.com/mbox/"},{"id":165854,"url":"https://patchwork.plctlab.org/api/1.2/patches/165854/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-1-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:12","name":"[1/6] arm: Fix arm_simd_types and MVE scalar_types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-1-christophe.lyon@linaro.org/mbox/"},{"id":165856,"url":"https://patchwork.plctlab.org/api/1.2/patches/165856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-2-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-2-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:13","name":"[2/6] arm: [MVE intrinsics] Add support for void and load/store pointers as argument types.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-2-christophe.lyon@linaro.org/mbox/"},{"id":165858,"url":"https://patchwork.plctlab.org/api/1.2/patches/165858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-3-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-3-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:14","name":"[3/6] arm: [MVE intrinsics] Add support for contiguous loads and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-3-christophe.lyon@linaro.org/mbox/"},{"id":165855,"url":"https://patchwork.plctlab.org/api/1.2/patches/165855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-4-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-4-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:15","name":"[4/6] arm: [MVE intrinsics] add load and store shapes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-4-christophe.lyon@linaro.org/mbox/"},{"id":165857,"url":"https://patchwork.plctlab.org/api/1.2/patches/165857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-5-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-5-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:16","name":"[5/6] arm: [MVE intrinsics] fix vst1 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-5-christophe.lyon@linaro.org/mbox/"},{"id":165859,"url":"https://patchwork.plctlab.org/api/1.2/patches/165859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-6-christophe.lyon@linaro.org/","msgid":"<20231116152617.2193377-6-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-16T15:26:17","name":"[6/6] arm: [MVE intrinsics] rework vldq1 vst1q","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116152617.2193377-6-christophe.lyon@linaro.org/mbox/"},{"id":165883,"url":"https://patchwork.plctlab.org/api/1.2/patches/165883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116155108.2207222-1-ppalka@redhat.com/","msgid":"<20231116155108.2207222-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-16T15:51:07","name":"[pushed] c++: add fixed testcases [PR98614, PR104802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231116155108.2207222-1-ppalka@redhat.com/mbox/"},{"id":165898,"url":"https://patchwork.plctlab.org/api/1.2/patches/165898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-16T16:49:55","name":"sra: SRA of non-escaped aggregates passed by reference to calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65564869.050a0220.fc37f.b9bfSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":165901,"url":"https://patchwork.plctlab.org/api/1.2/patches/165901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/jghdu6aruqa5acmjpeb32o2tskao4t27c6xcyt7vfhj4cnxare@4vxlgjyirna4/","msgid":"","list_archive_url":null,"date":"2023-11-16T17:15:34","name":"[COMMITTED] Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/jghdu6aruqa5acmjpeb32o2tskao4t27c6xcyt7vfhj4cnxare@4vxlgjyirna4/mbox/"},{"id":165908,"url":"https://patchwork.plctlab.org/api/1.2/patches/165908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZXWV_WT5f9H4v5@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-16T17:54:33","name":"[committed] hppa: Revise REG+D address support to allow long displacements before reload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZXWV_WT5f9H4v5@mx3210.localdomain/mbox/"},{"id":165910,"url":"https://patchwork.plctlab.org/api/1.2/patches/165910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaRu6BvaxQVqJ4@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:07:02","name":"[02/11] rtl-ssa: Add some helpers for removing accesses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaRu6BvaxQVqJ4@arm.com/mbox/"},{"id":165911,"url":"https://patchwork.plctlab.org/api/1.2/patches/165911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaXJY/K04w2ojw@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:07:24","name":"[03/11] aarch64, testsuite: Fix up auto-init-padding tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZaXJY/K04w2ojw@arm.com/mbox/"},{"id":165915,"url":"https://patchwork.plctlab.org/api/1.2/patches/165915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbB0KHxzDkN0ci@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:10:15","name":"[09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbB0KHxzDkN0ci@arm.com/mbox/"},{"id":165917,"url":"https://patchwork.plctlab.org/api/1.2/patches/165917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbYrRa/M+jTFcm@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T18:11:46","name":"[11/11] aarch64: Use individual loads/stores for mem{cpy,set} expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVZbYrRa/M+jTFcm@arm.com/mbox/"},{"id":165938,"url":"https://patchwork.plctlab.org/api/1.2/patches/165938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVaAylotDULKTs/N@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T20:51:22","name":"[v5] gcc: Introduce -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVaAylotDULKTs/N@redhat.com/mbox/"},{"id":165942,"url":"https://patchwork.plctlab.org/api/1.2/patches/165942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at/","msgid":"<3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-16T21:38:08","name":"[1/4] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e5e3ecbfd65851bbee77c7c70644b50d3d0895a.camel@tugraz.at/mbox/"},{"id":165943,"url":"https://patchwork.plctlab.org/api/1.2/patches/165943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb7bd855a76bcf89b5b0823882a8ec0d828c7291.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-16T21:38:47","name":"[2/4] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/eb7bd855a76bcf89b5b0823882a8ec0d828c7291.camel@tugraz.at/mbox/"},{"id":165944,"url":"https://patchwork.plctlab.org/api/1.2/patches/165944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at/","msgid":"<223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-16T21:39:26","name":"[3/4] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/223aa096afbdbb177d4ad5245696d439ad4cf87f.camel@tugraz.at/mbox/"},{"id":165945,"url":"https://patchwork.plctlab.org/api/1.2/patches/165945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e926b4d4153c5feb41a22ba10f54f571bc38a19b.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-16T21:40:09","name":"[4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e926b4d4153c5feb41a22ba10f54f571bc38a19b.camel@tugraz.at/mbox/"},{"id":165947,"url":"https://patchwork.plctlab.org/api/1.2/patches/165947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/531885fa576a672454e6630549858842588c800e.camel@zoho.com/","msgid":"<531885fa576a672454e6630549858842588c800e.camel@zoho.com>","list_archive_url":null,"date":"2023-11-16T22:28:05","name":"libgccjit: Fix ira cost segfault","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/531885fa576a672454e6630549858842588c800e.camel@zoho.com/mbox/"},{"id":165953,"url":"https://patchwork.plctlab.org/api/1.2/patches/165953/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7ffe995942c43dd8f462b16d234e475a73e4e86.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-16T22:36:36","name":"libgccjit Fix a RTL bug for libgccjit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7ffe995942c43dd8f462b16d234e475a73e4e86.camel@zoho.com/mbox/"},{"id":165965,"url":"https://patchwork.plctlab.org/api/1.2/patches/165965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-1-hongtao.liu@intel.com/","msgid":"<20231117000934.2301995-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T00:09:33","name":"[1/2] Support reduc_{plus, xor, and, ior}_scal_m for vector integer mode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-1-hongtao.liu@intel.com/mbox/"},{"id":165964,"url":"https://patchwork.plctlab.org/api/1.2/patches/165964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-2-hongtao.liu@intel.com/","msgid":"<20231117000934.2301995-2-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T00:09:34","name":"[2/2] Add i?86-*-* and x86_64-*-* to vect_logical_reduc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117000934.2301995-2-hongtao.liu@intel.com/mbox/"},{"id":165976,"url":"https://patchwork.plctlab.org/api/1.2/patches/165976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117023802.476523-1-liwei@loongson.cn/","msgid":"<20231117023802.476523-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-17T02:38:02","name":"[v2] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117023802.476523-1-liwei@loongson.cn/mbox/"},{"id":165977,"url":"https://patchwork.plctlab.org/api/1.2/patches/165977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com/","msgid":"<408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-17T02:53:05","name":"[v2,2/5] c-family: Simplify attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/408e5c77-961f-4613-009f-d0dea61a37ca@e124511.cambridge.arm.com/mbox/"},{"id":165978,"url":"https://patchwork.plctlab.org/api/1.2/patches/165978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com/","msgid":"<10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-11-17T02:54:17","name":"[v2,3/5] ada: Improve attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10532e77-2eb3-5043-0b71-faf415c5a1af@e124511.cambridge.arm.com/mbox/"},{"id":165980,"url":"https://patchwork.plctlab.org/api/1.2/patches/165980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117044319.3912782-1-juzhe.zhong@rivai.ai/","msgid":"<20231117044319.3912782-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T04:43:19","name":"RISC-V: Optimize VLA SLP with duplicate VLA shuffle indice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117044319.3912782-1-juzhe.zhong@rivai.ai/mbox/"},{"id":165983,"url":"https://patchwork.plctlab.org/api/1.2/patches/165983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051058.535141-1-hongtao.liu@intel.com/","msgid":"<20231117051058.535141-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-17T05:10:58","name":"Support cbranchm for Vector HI/QImode.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051058.535141-1-hongtao.liu@intel.com/mbox/"},{"id":165984,"url":"https://patchwork.plctlab.org/api/1.2/patches/165984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051232.10396-1-xuli1@eswincomputing.com/","msgid":"<20231117051232.10396-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-11-17T05:12:32","name":"RISC-V: Implement -mmemcpy-strategy= options[PR112537]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117051232.10396-1-xuli1@eswincomputing.com/mbox/"},{"id":165990,"url":"https://patchwork.plctlab.org/api/1.2/patches/165990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117063640.1242505-1-yangyujie@loongson.cn/","msgid":"<20231117063640.1242505-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-11-17T06:36:40","name":"LoongArch: Fix eh_return epilogue for normal returns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117063640.1242505-1-yangyujie@loongson.cn/mbox/"},{"id":166001,"url":"https://patchwork.plctlab.org/api/1.2/patches/166001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f97dabfe-37f9-4b83-b293-64d0421782a4@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T07:25:23","name":"[V12] tree-ssa-sink: Improve code sinking pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f97dabfe-37f9-4b83-b293-64d0421782a4@linux.ibm.com/mbox/"},{"id":166002,"url":"https://patchwork.plctlab.org/api/1.2/patches/166002/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117072548.3543202-1-hongyu.wang@intel.com/","msgid":"<20231117072548.3543202-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-17T07:25:48","name":"[APX,PPX] Support Intel APX PPX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117072548.3543202-1-hongyu.wang@intel.com/mbox/"},{"id":166005,"url":"https://patchwork.plctlab.org/api/1.2/patches/166005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117073549.1841897-1-juzhe.zhong@rivai.ai/","msgid":"<20231117073549.1841897-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T07:35:49","name":"RISC-V: Fix bug of tuple move splitter[PR112561]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117073549.1841897-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166006,"url":"https://patchwork.plctlab.org/api/1.2/patches/166006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com/","msgid":"<2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com>","list_archive_url":null,"date":"2023-11-17T07:46:40","name":"[V3] tree-optimization: Add register pressure heuristics and appropriate use of profile data.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cd811ca-2d69-4b61-af7a-727a7f08779a@linux.ibm.com/mbox/"},{"id":166926,"url":"https://patchwork.plctlab.org/api/1.2/patches/166926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117090021.16805-1-xujiahao@loongson.cn/","msgid":"<20231117090021.16805-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-11-17T09:00:21","name":"LoongArch: Add support for xorsign.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117090021.16805-1-xujiahao@loongson.cn/mbox/"},{"id":166148,"url":"https://patchwork.plctlab.org/api/1.2/patches/166148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/69673087-0686-4642-adaf-70d40c08db6c@gjlay.de/","msgid":"<69673087-0686-4642-adaf-70d40c08db6c@gjlay.de>","list_archive_url":null,"date":"2023-11-17T12:21:12","name":"[avr,committed] PR target/53372: Don'\''t ignore section attribute with address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/69673087-0686-4642-adaf-70d40c08db6c@gjlay.de/mbox/"},{"id":166178,"url":"https://patchwork.plctlab.org/api/1.2/patches/166178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdsZJor+tYlrQKm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T13:36:36","name":"vect: Fix check_reduction_path [PR112374]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdsZJor+tYlrQKm@tucnak/mbox/"},{"id":166179,"url":"https://patchwork.plctlab.org/api/1.2/patches/166179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdu8BjuGofK3TeU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T13:47:28","name":"match.pd: Optimize ctz/popcount/parity/ffs on extended argument [PR112566]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdu8BjuGofK3TeU@tucnak/mbox/"},{"id":166180,"url":"https://patchwork.plctlab.org/api/1.2/patches/166180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117134800.1004906-1-juzhe.zhong@rivai.ai/","msgid":"<20231117134800.1004906-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-17T13:48:00","name":"[V2] RISC-V: Fix bug of tuple move splitter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117134800.1004906-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166181,"url":"https://patchwork.plctlab.org/api/1.2/patches/166181/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de/","msgid":"<20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de>","list_archive_url":null,"date":"2023-11-17T13:50:55","name":"tree-optimization/112585 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117135055.F1BFF1341F@imap2.suse-dmz.suse.de/mbox/"},{"id":166182,"url":"https://patchwork.plctlab.org/api/1.2/patches/166182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdyIFfKpN9rkOWh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T14:01:04","name":"tree-ssa-math-opts: popcount (X) == 1 to (X ^ (X - 1)) > (X - 1) optimization [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdyIFfKpN9rkOWh@tucnak/mbox/"},{"id":166183,"url":"https://patchwork.plctlab.org/api/1.2/patches/166183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdy3Dpq5YryeUpb@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-17T14:04:12","name":"middle-end, v2: Add new value for vector types for __builtin_classify_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVdy3Dpq5YryeUpb@tucnak/mbox/"},{"id":166237,"url":"https://patchwork.plctlab.org/api/1.2/patches/166237/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144156.1469262-1-jwakely@redhat.com/","msgid":"<20231117144156.1469262-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:41:43","name":"[committed] libstdc++: Fix Doxygen markup","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144156.1469262-1-jwakely@redhat.com/mbox/"},{"id":166240,"url":"https://patchwork.plctlab.org/api/1.2/patches/166240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144838.1478158-1-jwakely@redhat.com/","msgid":"<20231117144838.1478158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:48:19","name":"[committed] libstdc++: Add more Doxygen comments and another test for std::out_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144838.1478158-1-jwakely@redhat.com/mbox/"},{"id":166250,"url":"https://patchwork.plctlab.org/api/1.2/patches/166250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144911.1481829-1-jwakely@redhat.com/","msgid":"<20231117144911.1481829-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T14:49:05","name":"[committed] libstdc++: Adjust std::in_range template parameter name","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117144911.1481829-1-jwakely@redhat.com/mbox/"},{"id":166218,"url":"https://patchwork.plctlab.org/api/1.2/patches/166218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf541jy9.fsf@euler.schwinge.homeip.net/","msgid":"<87sf541jy9.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-17T15:24:46","name":"Add '\''libgomp.c++/static-local-variable-1.C'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf541jy9.fsf@euler.schwinge.homeip.net/mbox/"},{"id":166259,"url":"https://patchwork.plctlab.org/api/1.2/patches/166259/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117153138.1510158-1-jwakely@redhat.com/","msgid":"<20231117153138.1510158-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:29:17","name":"[committed] libstdc++: Define C++26 saturation arithmetic functions (P0543R3)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117153138.1510158-1-jwakely@redhat.com/mbox/"},{"id":166274,"url":"https://patchwork.plctlab.org/api/1.2/patches/166274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117154139.1510875-1-jwakely@redhat.com/","msgid":"<20231117154139.1510875-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:41:29","name":"[committed] libstdc++: Regenerate config.h.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117154139.1510875-1-jwakely@redhat.com/mbox/"},{"id":166275,"url":"https://patchwork.plctlab.org/api/1.2/patches/166275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155300.1513586-1-jwakely@redhat.com/","msgid":"<20231117155300.1513586-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:49:47","name":"libstdc++: Define std::ranges::to for C++23 (P1206R7) [PR111055]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155300.1513586-1-jwakely@redhat.com/mbox/"},{"id":166238,"url":"https://patchwork.plctlab.org/api/1.2/patches/166238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155420.1513704-1-jwakely@redhat.com/","msgid":"<20231117155420.1513704-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:53:15","name":"libstdc++: Add fast path for std::format(\"{}\", x) [PR110801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117155420.1513704-1-jwakely@redhat.com/mbox/"},{"id":166276,"url":"https://patchwork.plctlab.org/api/1.2/patches/166276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-1-jwakely@redhat.com/","msgid":"<20231117160320.1513815-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:54:38","name":"[1/2] libstdc++: Implement C++23 header [PR107760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-1-jwakely@redhat.com/mbox/"},{"id":166239,"url":"https://patchwork.plctlab.org/api/1.2/patches/166239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-2-jwakely@redhat.com/","msgid":"<20231117160320.1513815-2-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-17T15:54:39","name":"[2/2] libstdc++: Ensure valid UTF-8 in std::vprint_unicode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117160320.1513815-2-jwakely@redhat.com/mbox/"},{"id":166281,"url":"https://patchwork.plctlab.org/api/1.2/patches/166281/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rcqnyq.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T17:38:53","name":"[1/5] aarch64: Add +sme2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5rcqnyq.fsf@arm.com/mbox/"},{"id":166315,"url":"https://patchwork.plctlab.org/api/1.2/patches/166315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz/","msgid":"<81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:16:37","name":"[1/7] lto: Skip flag OPT_fltrans_output_list_.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/81dd3d9d61f5b1907f91ca35209167049e5bee54.1700222403.git.mjires@suse.cz/mbox/"},{"id":166316,"url":"https://patchwork.plctlab.org/api/1.2/patches/166316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz/","msgid":"<1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:16:52","name":"[2/7] lto: Remove random_seed from section name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ab98391f1f12962c48d1dd4d7309fc219454c96.1700222403.git.mjires@suse.cz/mbox/"},{"id":166318,"url":"https://patchwork.plctlab.org/api/1.2/patches/166318/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0af7bafad94bf9d146be76842d41fadfe24be23.1700222403.git.mjires@suse.cz/","msgid":"","list_archive_url":null,"date":"2023-11-17T20:17:01","name":"[3/7] Lockfile.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e0af7bafad94bf9d146be76842d41fadfe24be23.1700222403.git.mjires@suse.cz/mbox/"},{"id":166317,"url":"https://patchwork.plctlab.org/api/1.2/patches/166317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz/","msgid":"<788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:11","name":"[4/7] lto: Implement ltrans cache","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/788aa123a8fd4bbfa8a80eda37fbacf38ec78c9b.1700222403.git.mjires@suse.cz/mbox/"},{"id":166321,"url":"https://patchwork.plctlab.org/api/1.2/patches/166321/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz/","msgid":"<6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:18","name":"[5/7] lto: Implement cache partitioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d4cad01621dec0d30d7e4565469f440c87cb588.1700222403.git.mjires@suse.cz/mbox/"},{"id":166327,"url":"https://patchwork.plctlab.org/api/1.2/patches/166327/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz/","msgid":"<1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:26","name":"[6/7] lto: squash order of symbols in partitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1169efeea8ca079fc9297a4f95ad292558b1bbcf.1700222403.git.mjires@suse.cz/mbox/"},{"id":166329,"url":"https://patchwork.plctlab.org/api/1.2/patches/166329/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz/","msgid":"<7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz>","list_archive_url":null,"date":"2023-11-17T20:17:34","name":"[7/7] lto: partition specific lto_clone_numbers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7c76f258995c20eb0b44eb021f44039718dc45ce.1700222403.git.mjires@suse.cz/mbox/"},{"id":166331,"url":"https://patchwork.plctlab.org/api/1.2/patches/166331/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-3-xry111@xry111.site/","msgid":"<20231117204323.453536-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:19","name":"[v2,2/6] LoongArch: genopts: Add infrastructure to generate code for new features in ISA evolution","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-3-xry111@xry111.site/mbox/"},{"id":166335,"url":"https://patchwork.plctlab.org/api/1.2/patches/166335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-4-xry111@xry111.site/","msgid":"<20231117204323.453536-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:20","name":"[v2,3/6] LoongArch: Add evolution features of base ISA revisions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-4-xry111@xry111.site/mbox/"},{"id":166334,"url":"https://patchwork.plctlab.org/api/1.2/patches/166334/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-5-xry111@xry111.site/","msgid":"<20231117204323.453536-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:21","name":"[v2,4/6] LoongArch: Take the advantage of -mdiv32 if it'\''s enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-5-xry111@xry111.site/mbox/"},{"id":166332,"url":"https://patchwork.plctlab.org/api/1.2/patches/166332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-6-xry111@xry111.site/","msgid":"<20231117204323.453536-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:22","name":"[v2,5/6] LoongArch: Don'\''t emit dbar 0x700 if -mld-seq-sa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-6-xry111@xry111.site/mbox/"},{"id":166333,"url":"https://patchwork.plctlab.org/api/1.2/patches/166333/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-7-xry111@xry111.site/","msgid":"<20231117204323.453536-7-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:43:23","name":"[v2,6/6] LoongArch: Add fine-grained control for LAM_BH and LAMCAS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204323.453536-7-xry111@xry111.site/mbox/"},{"id":166336,"url":"https://patchwork.plctlab.org/api/1.2/patches/166336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204818.454828-3-xry111@xry111.site/","msgid":"<20231117204818.454828-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-17T20:48:20","name":"LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117204818.454828-3-xry111@xry111.site/mbox/"},{"id":166402,"url":"https://patchwork.plctlab.org/api/1.2/patches/166402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117214610.173872-1-polacek@redhat.com/","msgid":"<20231117214610.173872-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-11-17T21:46:10","name":"c++: P2280R4, Using unknown refs in constant expr [PR106650]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231117214610.173872-1-polacek@redhat.com/mbox/"},{"id":166416,"url":"https://patchwork.plctlab.org/api/1.2/patches/166416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fedb53cc48e2062a25d9ba401f96735f42b0e9c8.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-11-17T22:36:50","name":"libgccjit: Add vector permutation and vector access operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fedb53cc48e2062a25d9ba401f96735f42b0e9c8.camel@zoho.com/mbox/"},{"id":166419,"url":"https://patchwork.plctlab.org/api/1.2/patches/166419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118010347.39147-1-dmalcolm@redhat.com/","msgid":"<20231118010347.39147-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-18T01:03:47","name":"[pushed] analyzer: new warning: -Wanalyzer-infinite-loop [PR106147]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118010347.39147-1-dmalcolm@redhat.com/mbox/"},{"id":166431,"url":"https://patchwork.plctlab.org/api/1.2/patches/166431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031149.1010835-1-juzhe.zhong@rivai.ai/","msgid":"<20231118031149.1010835-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-18T03:11:49","name":"RISC-V: Refactor RVV iterators[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031149.1010835-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166432,"url":"https://patchwork.plctlab.org/api/1.2/patches/166432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031513.31109-1-chenglulu@loongson.cn/","msgid":"<20231118031513.31109-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-18T03:15:13","name":"LoongArch: Modify MUSL_DYNAMIC_LINKER.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118031513.31109-1-chenglulu@loongson.cn/mbox/"},{"id":166457,"url":"https://patchwork.plctlab.org/api/1.2/patches/166457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118065916.14855-1-guojie@loongson.cn/","msgid":"<20231118065916.14855-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-18T06:59:16","name":"LoongArch: Optimize the loading of immediate numbers with the same high and low 32-bit values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118065916.14855-1-guojie@loongson.cn/mbox/"},{"id":166470,"url":"https://patchwork.plctlab.org/api/1.2/patches/166470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com/","msgid":"<1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com>","list_archive_url":null,"date":"2023-11-18T08:36:14","name":"tree-optimization: Add register pressure in LICM at tree-ssa level optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1894603a-deee-4ef4-8bea-9c0dcd672336@linux.ibm.com/mbox/"},{"id":166481,"url":"https://patchwork.plctlab.org/api/1.2/patches/166481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZViRqiN7i3waSY2v@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T10:27:54","name":"tree-ssa-math-opts: popcount (X) == 1 to (X ^ (X - 1)) > (X - 1) optimization for direct optab [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZViRqiN7i3waSY2v@tucnak/mbox/"},{"id":166494,"url":"https://patchwork.plctlab.org/api/1.2/patches/166494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118104248.11513-1-kito.cheng@sifive.com/","msgid":"<20231118104248.11513-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-11-18T10:42:48","name":"[committed] RISC-V: Fix mismatched new delete for unique_ptr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118104248.11513-1-kito.cheng@sifive.com/mbox/"},{"id":166584,"url":"https://patchwork.plctlab.org/api/1.2/patches/166584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171637280.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-18T16:50:43","name":"[13/44] RISC-V/testsuite: Add branchless cases for FP cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171637280.5892@tpp.orcam.me.uk/mbox/"},{"id":166608,"url":"https://patchwork.plctlab.org/api/1.2/patches/166608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118174554.25661-2-xry111@xry111.site/","msgid":"<20231118174554.25661-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-18T17:45:55","name":"LoongArch: Fix \"-mexplict-relocs=none -mcmodel=medium\" producing %call36 when the assembler does not support it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118174554.25661-2-xry111@xry111.site/mbox/"},{"id":166649,"url":"https://patchwork.plctlab.org/api/1.2/patches/166649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118195008.579211-1-arsen@aarsen.me/","msgid":"<20231118195008.579211-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-11-18T18:46:56","name":"libstdc++: implement std::generator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118195008.579211-1-arsen@aarsen.me/mbox/"},{"id":166626,"url":"https://patchwork.plctlab.org/api/1.2/patches/166626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkQ8KJMpceSkrbj@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:30:56","name":"c-family, middle-end: Add __builtin_c[lt]zg (arg, 0ULL) exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkQ8KJMpceSkrbj@tucnak/mbox/"},{"id":166647,"url":"https://patchwork.plctlab.org/api/1.2/patches/166647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkSgmHeKHwnznyf@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:37:38","name":"c: Add __builtin_bit_complement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkSgmHeKHwnznyf@tucnak/mbox/"},{"id":166648,"url":"https://patchwork.plctlab.org/api/1.2/patches/166648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkTsF8twXnINNrz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-18T19:42:40","name":"c: Add __builtin_stdc_bit_{width,floor,ceil} builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVkTsF8twXnINNrz@tucnak/mbox/"},{"id":166650,"url":"https://patchwork.plctlab.org/api/1.2/patches/166650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c179e0ea10f1d14b56ada367b0cda0fafe5b5632.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:12:32","name":"[1/4] c: runtime checking for assigment of VM types 1/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c179e0ea10f1d14b56ada367b0cda0fafe5b5632.camel@tugraz.at/mbox/"},{"id":166651,"url":"https://patchwork.plctlab.org/api/1.2/patches/166651/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at/","msgid":"<2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-18T21:13:03","name":"[2/4] c: runtime checking for assigment of VM types 2/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ef9124eecefe8f39eab9557e5ce76f42e8d6c7c.camel@tugraz.at/mbox/"},{"id":166652,"url":"https://patchwork.plctlab.org/api/1.2/patches/166652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at/","msgid":"<5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at>","list_archive_url":null,"date":"2023-11-18T21:13:44","name":"[3/4] c: runtime checking for assigment of VM types 3/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5af943163b8c49f75022e2bae151c18afd4b7c0c.camel@tugraz.at/mbox/"},{"id":166653,"url":"https://patchwork.plctlab.org/api/1.2/patches/166653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec98368eda9967482368e0bdf0cfb7ed7790c3c3.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:14:17","name":"[4/4] c: runtime checking for assigment of VM types 4/4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ec98368eda9967482368e0bdf0cfb7ed7790c3c3.camel@tugraz.at/mbox/"},{"id":166654,"url":"https://patchwork.plctlab.org/api/1.2/patches/166654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqQpP8SQeLwAgsmXDt47dFL5MTxLOpx73wGjSy7-7jnmg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-18T21:42:02","name":"RFA: RISC-V: Add support for XCVhwlp extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAMqJFCqQpP8SQeLwAgsmXDt47dFL5MTxLOpx73wGjSy7-7jnmg@mail.gmail.com/mbox/"},{"id":166656,"url":"https://patchwork.plctlab.org/api/1.2/patches/166656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214432.1636488-1-jwakely@redhat.com/","msgid":"<20231118214432.1636488-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-18T21:44:02","name":"[committed,v2] libstdc++: Add fast path for std::format(\"{}\", x) [PR110801]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214432.1636488-1-jwakely@redhat.com/mbox/"},{"id":166657,"url":"https://patchwork.plctlab.org/api/1.2/patches/166657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214511.1636561-1-jwakely@redhat.com/","msgid":"<20231118214511.1636561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-18T21:44:36","name":"[committed] libstdc++: Check string value_type in std::make_format_args [PR112607]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231118214511.1636561-1-jwakely@redhat.com/mbox/"},{"id":166658,"url":"https://patchwork.plctlab.org/api/1.2/patches/166658/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVljEevbGcssSuh8@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-19T01:21:21","name":"Propagate value ranges of return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVljEevbGcssSuh8@kam.mff.cuni.cz/mbox/"},{"id":166659,"url":"https://patchwork.plctlab.org/api/1.2/patches/166659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014318.203251-1-dmalcolm@redhat.com/","msgid":"<20231119014318.203251-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-19T01:43:18","name":"[pushed] analyzer: new warning: -Wanalyzer-undefined-behavior-strtok [PR107573]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014318.203251-1-dmalcolm@redhat.com/mbox/"},{"id":166660,"url":"https://patchwork.plctlab.org/api/1.2/patches/166660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014533.1838815-1-juzhe.zhong@rivai.ai/","msgid":"<20231119014533.1838815-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-19T01:45:33","name":"[Committed,V3] RISC-V: Fix bug of tuple move splitter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119014533.1838815-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166673,"url":"https://patchwork.plctlab.org/api/1.2/patches/166673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171317470.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:21","name":"[01/44] testsuite: Add cases for conditional-move and conditional-add operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171317470.5892@tpp.orcam.me.uk/mbox/"},{"id":166674,"url":"https://patchwork.plctlab.org/api/1.2/patches/166674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171344110.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:39","name":"[02/44] RISC-V/testsuite: Add cases for integer SFB cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171344110.5892@tpp.orcam.me.uk/mbox/"},{"id":166675,"url":"https://patchwork.plctlab.org/api/1.2/patches/166675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171356430.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:35:53","name":"[03/44] RISC-V: Reorder comment on SFB patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171356430.5892@tpp.orcam.me.uk/mbox/"},{"id":166676,"url":"https://patchwork.plctlab.org/api/1.2/patches/166676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171401210.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:03","name":"[04/44] RISC-V: Sanitise NEED_EQ_NE_P case with `riscv_emit_int_compare'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171401210.5892@tpp.orcam.me.uk/mbox/"},{"id":166677,"url":"https://patchwork.plctlab.org/api/1.2/patches/166677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171416130.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:12","name":"[05/44] RISC-V: Fix `mode'\'' usage in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171416130.5892@tpp.orcam.me.uk/mbox/"},{"id":166678,"url":"https://patchwork.plctlab.org/api/1.2/patches/166678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171423450.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:21","name":"[06/44] RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171423450.5892@tpp.orcam.me.uk/mbox/"},{"id":166680,"url":"https://patchwork.plctlab.org/api/1.2/patches/166680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171447330.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:31","name":"[07/44] RISC-V: Use `nullptr'\'' in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171447330.5892@tpp.orcam.me.uk/mbox/"},{"id":166679,"url":"https://patchwork.plctlab.org/api/1.2/patches/166679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171455150.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:41","name":"[08/44] RISC-V: Simplify EQ vs NE selection in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171455150.5892@tpp.orcam.me.uk/mbox/"},{"id":166681,"url":"https://patchwork.plctlab.org/api/1.2/patches/166681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171501110.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:36:52","name":"[09/44] RISC-V: Rework branch costing model for if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171501110.5892@tpp.orcam.me.uk/mbox/"},{"id":166682,"url":"https://patchwork.plctlab.org/api/1.2/patches/166682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171516550.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:06","name":"[10/44] RISC-V/testsuite: Add branched cases for integer cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171516550.5892@tpp.orcam.me.uk/mbox/"},{"id":166683,"url":"https://patchwork.plctlab.org/api/1.2/patches/166683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171619400.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:20","name":"[11/44] RISC-V/testsuite: Add branchless cases for integer cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171619400.5892@tpp.orcam.me.uk/mbox/"},{"id":166685,"url":"https://patchwork.plctlab.org/api/1.2/patches/166685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171632580.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:37:34","name":"[12/44] RISC-V/testsuite: Add branched cases for FP cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171632580.5892@tpp.orcam.me.uk/mbox/"},{"id":166687,"url":"https://patchwork.plctlab.org/api/1.2/patches/166687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171722590.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:04","name":"[14/44] RISC-V: Also invert the cond-move condition for GEU and LEU","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311171722590.5892@tpp.orcam.me.uk/mbox/"},{"id":166691,"url":"https://patchwork.plctlab.org/api/1.2/patches/166691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180358190.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:13","name":"[15/44] RISC-V/testsuite: Add branched cases for GEU and LEU cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180358190.5892@tpp.orcam.me.uk/mbox/"},{"id":166686,"url":"https://patchwork.plctlab.org/api/1.2/patches/166686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180416250.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:24","name":"[16/44] RISC-V/testsuite: Add branchless cases for GEU and LEU cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180416250.5892@tpp.orcam.me.uk/mbox/"},{"id":166688,"url":"https://patchwork.plctlab.org/api/1.2/patches/166688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180424040.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:35","name":"[17/44] RISC-V: Avoid extraneous EQ or NE operation in cond-move expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311180424040.5892@tpp.orcam.me.uk/mbox/"},{"id":166689,"url":"https://patchwork.plctlab.org/api/1.2/patches/166689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181735420.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:38:47","name":"[18/44] RISC-V/testsuite: Add branched cases for equality cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181735420.5892@tpp.orcam.me.uk/mbox/"},{"id":166690,"url":"https://patchwork.plctlab.org/api/1.2/patches/166690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181747220.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:00","name":"[19/44] RISC-V/testsuite: Add branchless cases for equality cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181747220.5892@tpp.orcam.me.uk/mbox/"},{"id":166692,"url":"https://patchwork.plctlab.org/api/1.2/patches/166692/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181755221.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:13","name":"[20/44] RISC-V: Also accept constants for T-Head cond-move comparison operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181755221.5892@tpp.orcam.me.uk/mbox/"},{"id":166693,"url":"https://patchwork.plctlab.org/api/1.2/patches/166693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181804140.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:39:25","name":"[21/44] RISC-V: Also accept constants for T-Head cond-move data input operands","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181804140.5892@tpp.orcam.me.uk/mbox/"},{"id":166694,"url":"https://patchwork.plctlab.org/api/1.2/patches/166694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181813500.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:03","name":"[22/44] RISC-V: Fold all the cond-move variants together","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181813500.5892@tpp.orcam.me.uk/mbox/"},{"id":166695,"url":"https://patchwork.plctlab.org/api/1.2/patches/166695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181823240.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:13","name":"[23/44] RISC-V/testsuite: Add branched cases for T-Head non-equality cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181823240.5892@tpp.orcam.me.uk/mbox/"},{"id":166697,"url":"https://patchwork.plctlab.org/api/1.2/patches/166697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181827560.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:26","name":"[24/44] RISC-V/testsuite: Add branchless cases for T-Head non-equality cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181827560.5892@tpp.orcam.me.uk/mbox/"},{"id":166696,"url":"https://patchwork.plctlab.org/api/1.2/patches/166696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181830580.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:38","name":"[25/44] RISC-V: Implement `riscv_emit_unary'\'' helper","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181830580.5892@tpp.orcam.me.uk/mbox/"},{"id":166698,"url":"https://patchwork.plctlab.org/api/1.2/patches/166698/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181833450.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:48","name":"[26/44] RISC-V: Add `movMODEcc'\'' implementation for generic targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311181833450.5892@tpp.orcam.me.uk/mbox/"},{"id":166701,"url":"https://patchwork.plctlab.org/api/1.2/patches/166701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182042320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:40:59","name":"[27/44] RISC-V/testsuite: Add branched cases for generic integer cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182042320.5892@tpp.orcam.me.uk/mbox/"},{"id":166699,"url":"https://patchwork.plctlab.org/api/1.2/patches/166699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182049270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:12","name":"[28/44] RISC-V/testsuite: Add branchless cases for generic integer cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182049270.5892@tpp.orcam.me.uk/mbox/"},{"id":166704,"url":"https://patchwork.plctlab.org/api/1.2/patches/166704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182054440.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:24","name":"[29/44] RISC-V: Add `addMODEcc'\'' implementation for generic targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182054440.5892@tpp.orcam.me.uk/mbox/"},{"id":166700,"url":"https://patchwork.plctlab.org/api/1.2/patches/166700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182112500.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:33","name":"[30/44] RISC-V/testsuite: Add branched cases for generic integer cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182112500.5892@tpp.orcam.me.uk/mbox/"},{"id":166702,"url":"https://patchwork.plctlab.org/api/1.2/patches/166702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182117360.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:41:47","name":"[31/44] RISC-V/testsuite: Add branchless cases for generic integer cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182117360.5892@tpp.orcam.me.uk/mbox/"},{"id":166706,"url":"https://patchwork.plctlab.org/api/1.2/patches/166706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182127160.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:01","name":"[32/44] RISC-V: Only use SUBREG if applicable in `riscv_expand_float_scc'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182127160.5892@tpp.orcam.me.uk/mbox/"},{"id":166703,"url":"https://patchwork.plctlab.org/api/1.2/patches/166703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182143010.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:13","name":"[33/44] RISC-V: Also allow FP conditions in `riscv_expand_conditional_move'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182143010.5892@tpp.orcam.me.uk/mbox/"},{"id":166705,"url":"https://patchwork.plctlab.org/api/1.2/patches/166705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182155320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:23","name":"[34/44] RISC-V: Provide FP conditional-branch instructions for if-conversion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182155320.5892@tpp.orcam.me.uk/mbox/"},{"id":166708,"url":"https://patchwork.plctlab.org/api/1.2/patches/166708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182249380.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:37","name":"[35/44] RISC-V: Avoid extraneous integer comparison for FP comparisons","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182249380.5892@tpp.orcam.me.uk/mbox/"},{"id":166710,"url":"https://patchwork.plctlab.org/api/1.2/patches/166710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182330230.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:42:48","name":"[36/44] RISC-V/testsuite: Add branched cases for generic FP cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182330230.5892@tpp.orcam.me.uk/mbox/"},{"id":166707,"url":"https://patchwork.plctlab.org/api/1.2/patches/166707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182335270.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:00","name":"[37/44] RISC-V/testsuite: Add branchless cases for generic FP cond moves","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182335270.5892@tpp.orcam.me.uk/mbox/"},{"id":166709,"url":"https://patchwork.plctlab.org/api/1.2/patches/166709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182342520.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:09","name":"[38/44] RISC-V/testsuite: Add branched cases for generic FP cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311182342520.5892@tpp.orcam.me.uk/mbox/"},{"id":166712,"url":"https://patchwork.plctlab.org/api/1.2/patches/166712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190132400.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:21","name":"[39/44] RISC-V/testsuite: Add branchless cases for generic FP cond adds","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190132400.5892@tpp.orcam.me.uk/mbox/"},{"id":166711,"url":"https://patchwork.plctlab.org/api/1.2/patches/166711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190143100.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:34","name":"[40/44] RISC-V: Handle FP NE operator via inversion in cond-operation expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190143100.5892@tpp.orcam.me.uk/mbox/"},{"id":166713,"url":"https://patchwork.plctlab.org/api/1.2/patches/166713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190156200.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:45","name":"[41/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190156200.5892@tpp.orcam.me.uk/mbox/"},{"id":166714,"url":"https://patchwork.plctlab.org/api/1.2/patches/166714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190204040.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:43:56","name":"[42/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190204040.5892@tpp.orcam.me.uk/mbox/"},{"id":166715,"url":"https://patchwork.plctlab.org/api/1.2/patches/166715/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190216320.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:44:07","name":"[43/44] RISC-V/testsuite: Add branched cases for FP NE cond-add operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190216320.5892@tpp.orcam.me.uk/mbox/"},{"id":166716,"url":"https://patchwork.plctlab.org/api/1.2/patches/166716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190221350.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T05:44:17","name":"[44/44] RISC-V/testsuite: Add branchless cases for FP NE cond-add operation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190221350.5892@tpp.orcam.me.uk/mbox/"},{"id":166717,"url":"https://patchwork.plctlab.org/api/1.2/patches/166717/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119070102.3053-2-xry111@xry111.site/","msgid":"<20231119070102.3053-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T07:01:03","name":"LoongArch: Optimize LSX vector shuffle on floating-point vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119070102.3053-2-xry111@xry111.site/mbox/"},{"id":166758,"url":"https://patchwork.plctlab.org/api/1.2/patches/166758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190609100.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T11:24:37","name":"RISC-V: Remove duplicate `order_operator'\'' predicate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190609100.5892@tpp.orcam.me.uk/mbox/"},{"id":166759,"url":"https://patchwork.plctlab.org/api/1.2/patches/166759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190446360.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-19T11:27:02","name":"testsuite: Fix subexpressions with `scan-assembler-times'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311190446360.5892@tpp.orcam.me.uk/mbox/"},{"id":166786,"url":"https://patchwork.plctlab.org/api/1.2/patches/166786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119113331.265881-1-dmalcolm@redhat.com/","msgid":"<20231119113331.265881-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-19T11:33:31","name":"[pushed] libcpp: split decls out to rich-location.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119113331.265881-1-dmalcolm@redhat.com/mbox/"},{"id":166811,"url":"https://patchwork.plctlab.org/api/1.2/patches/166811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119140803.4168318-1-juzhe.zhong@rivai.ai/","msgid":"<20231119140803.4168318-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-19T14:08:03","name":"[Committed,V2] RISC-V: Optimize constant AVL for LRA pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119140803.4168318-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166816,"url":"https://patchwork.plctlab.org/api/1.2/patches/166816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-2-xry111@xry111.site/","msgid":"<20231119143037.16443-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:35","name":"[v2,1/3] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-2-xry111@xry111.site/mbox/"},{"id":166814,"url":"https://patchwork.plctlab.org/api/1.2/patches/166814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-3-xry111@xry111.site/","msgid":"<20231119143037.16443-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:36","name":"[v2,2/3] LoongArch: Use standard pattern name and RTX code for LSX/LASX muh instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-3-xry111@xry111.site/mbox/"},{"id":166815,"url":"https://patchwork.plctlab.org/api/1.2/patches/166815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-4-xry111@xry111.site/","msgid":"<20231119143037.16443-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-19T14:30:37","name":"[v2,3/3] LoongArch: Use standard pattern name and RTX code for LSX/LASX rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231119143037.16443-4-xry111@xry111.site/mbox/"},{"id":166889,"url":"https://patchwork.plctlab.org/api/1.2/patches/166889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com/","msgid":"<289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com>","list_archive_url":null,"date":"2023-11-19T21:19:50","name":"[committed] RISC-V: Infrastructure for instruction fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/289c3d37-398f-4761-b8be-4213d65d6df7@ventanamicro.com/mbox/"},{"id":166906,"url":"https://patchwork.plctlab.org/api/1.2/patches/166906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVqD4QG/X2nj6GrP@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-19T21:53:37","name":"libstdc++: Speed up push_back","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVqD4QG/X2nj6GrP@kam.mff.cuni.cz/mbox/"},{"id":166910,"url":"https://patchwork.plctlab.org/api/1.2/patches/166910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-2-xry111@xry111.site/","msgid":"<20231120004728.205167-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:24","name":"[v3,1/5] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-2-xry111@xry111.site/mbox/"},{"id":166911,"url":"https://patchwork.plctlab.org/api/1.2/patches/166911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-3-xry111@xry111.site/","msgid":"<20231120004728.205167-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:25","name":"[v3,2/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX muh instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-3-xry111@xry111.site/mbox/"},{"id":166912,"url":"https://patchwork.plctlab.org/api/1.2/patches/166912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-4-xry111@xry111.site/","msgid":"<20231120004728.205167-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:26","name":"[v3,3/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-4-xry111@xry111.site/mbox/"},{"id":166913,"url":"https://patchwork.plctlab.org/api/1.2/patches/166913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-5-xry111@xry111.site/","msgid":"<20231120004728.205167-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:27","name":"[v3,4/5] LoongArch: Remove lrint_allow_inexact","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-5-xry111@xry111.site/mbox/"},{"id":166914,"url":"https://patchwork.plctlab.org/api/1.2/patches/166914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-6-xry111@xry111.site/","msgid":"<20231120004728.205167-6-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-20T00:47:28","name":"[v3,5/5] LoongArch: Use LSX for scalar FP rounding with explicit rounding mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120004728.205167-6-xry111@xry111.site/mbox/"},{"id":166915,"url":"https://patchwork.plctlab.org/api/1.2/patches/166915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com/","msgid":"<6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com>","list_archive_url":null,"date":"2023-11-20T00:47:56","name":"[RFA] New pass for sign/zero extension elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6d5f8ba7-0c60-4789-87ae-68617ce6ac2c@ventanamicro.com/mbox/"},{"id":166923,"url":"https://patchwork.plctlab.org/api/1.2/patches/166923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025356.2937834-1-jason@redhat.com/","msgid":"<20231120025356.2937834-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:53:56","name":"[pushed] c++: add DECL_IMPLICIT_TEMPLATE_PARM_P macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025356.2937834-1-jason@redhat.com/mbox/"},{"id":166924,"url":"https://patchwork.plctlab.org/api/1.2/patches/166924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025415.2938041-1-jason@redhat.com/","msgid":"<20231120025415.2938041-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:54:15","name":"[pushed] c++: compare one level of template parms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025415.2938041-1-jason@redhat.com/mbox/"},{"id":166925,"url":"https://patchwork.plctlab.org/api/1.2/patches/166925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025517.1678251-1-hongtao.liu@intel.com/","msgid":"<20231120025517.1678251-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-20T02:55:17","name":"[x86] Support reduc_{and, ior, xor}_scal_m for V4HI/V8QI/V4QImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025517.1678251-1-hongtao.liu@intel.com/mbox/"},{"id":166935,"url":"https://patchwork.plctlab.org/api/1.2/patches/166935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025547.2938444-1-jason@redhat.com/","msgid":"<20231120025547.2938444-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-20T02:55:47","name":"[RFC] c++: mangle function template constraints","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120025547.2938444-1-jason@redhat.com/mbox/"},{"id":166936,"url":"https://patchwork.plctlab.org/api/1.2/patches/166936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120041211.3957366-1-juzhe.zhong@rivai.ai/","msgid":"<20231120041211.3957366-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T04:12:11","name":"[BUG,FIX] RISC-V: Fix VLS DI mode of slide1 instruction attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120041211.3957366-1-juzhe.zhong@rivai.ai/mbox/"},{"id":166943,"url":"https://patchwork.plctlab.org/api/1.2/patches/166943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfJWSMWzTwLWDu@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:23:01","name":"[1/4] Add vector pair modes to PowerPC (patch attached)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfJWSMWzTwLWDu@cowardly-lion.the-meissners.org/mbox/"},{"id":166944,"url":"https://patchwork.plctlab.org/api/1.2/patches/166944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfXZj3iaioq8FP@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:23:57","name":"[2/4] Vector pair floating point support for PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrfXZj3iaioq8FP@cowardly-lion.the-meissners.org/mbox/"},{"id":166945,"url":"https://patchwork.plctlab.org/api/1.2/patches/166945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrf21be5Lm4hvRF@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:26:03","name":"[3/4] Add integer vector pair mode support to PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrf21be5Lm4hvRF@cowardly-lion.the-meissners.org/mbox/"},{"id":166946,"url":"https://patchwork.plctlab.org/api/1.2/patches/166946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrgEJGzDEnnQiH5@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2023-11-20T04:26:56","name":"[4/4] Add vector pair tests to PowerPC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVrgEJGzDEnnQiH5@cowardly-lion.the-meissners.org/mbox/"},{"id":166982,"url":"https://patchwork.plctlab.org/api/1.2/patches/166982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/944137EFF18E5234+2023112016463085631915@rivai.ai/","msgid":"<944137EFF18E5234+2023112016463085631915@rivai.ai>","list_archive_url":null,"date":"2023-11-20T08:46:31","name":"??????: Re: [PATCH] DOC/IFN/OPTAB: Add mask_len_strided_load/mask_len_strided_store DOC/OPTAB/IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/944137EFF18E5234+2023112016463085631915@rivai.ai/mbox/"},{"id":166986,"url":"https://patchwork.plctlab.org/api/1.2/patches/166986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5r8kdei.fsf@euler.schwinge.homeip.net/","msgid":"<87a5r8kdei.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-20T09:00:21","name":"GCC developer room at FOSDEM 2024: Call for Participation open","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5r8kdei.fsf@euler.schwinge.homeip.net/mbox/"},{"id":167015,"url":"https://patchwork.plctlab.org/api/1.2/patches/167015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com/","msgid":"<6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:55:49","name":"[v3,01/11] aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6a18b92d17c1b465ebf6b4d6f94ee9050c49feac.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167016,"url":"https://patchwork.plctlab.org/api/1.2/patches/167016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcab4866c14b323b00d92348ddb975d79f713ef9.1700473918.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-20T09:55:54","name":"[v3,02/11] aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dcab4866c14b323b00d92348ddb975d79f713ef9.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167019,"url":"https://patchwork.plctlab.org/api/1.2/patches/167019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2be3b364f48b17c37fe882e45c0569cd73c481e.1700473918.git.fweimer@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-20T09:55:59","name":"[v3,03/11] gm2: Add missing declaration of m2pim_M2RTS_Terminate to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d2be3b364f48b17c37fe882e45c0569cd73c481e.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167021,"url":"https://patchwork.plctlab.org/api/1.2/patches/167021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com/","msgid":"<39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:03","name":"[v3,04/11] Add tests for validating future C permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/39c669e5eb8d904ce59ad18f3cd0368959ec067b.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167022,"url":"https://patchwork.plctlab.org/api/1.2/patches/167022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com/","msgid":"<145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:09","name":"[v3,05/11] c: Turn int-conversion warnings into permerrors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/145518b7d8fc4d04b8d00b69375e27860c5c1000.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167020,"url":"https://patchwork.plctlab.org/api/1.2/patches/167020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com/","msgid":"<7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:26","name":"[v3,08/11] c: Do not ignore some forms of -Wimplicit-int in system headers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7b09c1315253d91868e0f4e95debb75c41a62873.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167023,"url":"https://patchwork.plctlab.org/api/1.2/patches/167023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com/","msgid":"<2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:30","name":"[v3,09/11] c: Turn -Wreturn-mismatch into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2a00ce2d44edbda185460d72519a879fbac9bf59.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167025,"url":"https://patchwork.plctlab.org/api/1.2/patches/167025/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com/","msgid":"<9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:36","name":"[v3,10/11] c: Turn -Wincompatible-pointer-types into a permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e40a64880a14cf27d788ecbaf23365b9a5ac069.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167024,"url":"https://patchwork.plctlab.org/api/1.2/patches/167024/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com/","msgid":"<700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com>","list_archive_url":null,"date":"2023-11-20T09:56:42","name":"[v3,11/11] c: Add new -Wdeclaration-missing-parameter-type permerror","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/700d70e4a2874645ddb67a8a335131d83b242e69.1700473918.git.fweimer@redhat.com/mbox/"},{"id":167031,"url":"https://patchwork.plctlab.org/api/1.2/patches/167031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120104158.4141376-1-juzhe.zhong@rivai.ai/","msgid":"<20231120104158.4141376-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T10:41:58","name":"RISC-V Regression: Remove scalable compile option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120104158.4141376-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167032,"url":"https://patchwork.plctlab.org/api/1.2/patches/167032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com/","msgid":"<545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com>","list_archive_url":null,"date":"2023-11-20T10:42:02","name":"OpenMP: Add uses_allocators support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/545c0550-b8ed-41f4-bfd7-4e79aaf6be79@codesourcery.com/mbox/"},{"id":167095,"url":"https://patchwork.plctlab.org/api/1.2/patches/167095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120120649.672893-2-maxim.kuvyrkov@linaro.org/","msgid":"<20231120120649.672893-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-20T12:06:49","name":"[1/1] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120120649.672893-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":167114,"url":"https://patchwork.plctlab.org/api/1.2/patches/167114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131114.2801087-1-juzhe.zhong@rivai.ai/","msgid":"<20231120131114.2801087-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-20T13:11:14","name":"[BUG,FIX] RISC-V: Fix intermediate mode on slide1 instruction for SEW64 on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131114.2801087-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167190,"url":"https://patchwork.plctlab.org/api/1.2/patches/167190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131237.1825680-1-jwakely@redhat.com/","msgid":"<20231120131237.1825680-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-20T13:12:29","name":"[wwwdocs] Add new libstdc++ features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131237.1825680-1-jwakely@redhat.com/mbox/"},{"id":167256,"url":"https://patchwork.plctlab.org/api/1.2/patches/167256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131726.52280-1-ishitatsuyuki@gmail.com/","msgid":"<20231120131726.52280-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-11-20T13:17:26","name":"[v3] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120131726.52280-1-ishitatsuyuki@gmail.com/mbox/"},{"id":167129,"url":"https://patchwork.plctlab.org/api/1.2/patches/167129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120132659.3577496-1-ben.boeckel@kitware.com/","msgid":"<20231120132659.3577496-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T13:26:59","name":"[1/1] gcc-14: document P1689R5 scanning output support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120132659.3577496-1-ben.boeckel@kitware.com/mbox/"},{"id":167147,"url":"https://patchwork.plctlab.org/api/1.2/patches/167147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140023.591B83891C17@sourceware.org/","msgid":"<20231120140023.591B83891C17@sourceware.org>","list_archive_url":null,"date":"2023-11-20T13:59:56","name":"tree-optimization/112618 - unused .MASK_CALL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140023.591B83891C17@sourceware.org/mbox/"},{"id":167148,"url":"https://patchwork.plctlab.org/api/1.2/patches/167148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140036.CEB293882060@sourceware.org/","msgid":"<20231120140036.CEB293882060@sourceware.org>","list_archive_url":null,"date":"2023-11-20T14:00:09","name":"tree-optimization/112281 - loop distribution and zero dependence distances","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140036.CEB293882060@sourceware.org/mbox/"},{"id":167149,"url":"https://patchwork.plctlab.org/api/1.2/patches/167149/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140107.821F83890433@sourceware.org/","msgid":"<20231120140107.821F83890433@sourceware.org>","list_archive_url":null,"date":"2023-11-20T14:00:25","name":"middle-end/112622 - convert and vector-to-float","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120140107.821F83890433@sourceware.org/mbox/"},{"id":167207,"url":"https://patchwork.plctlab.org/api/1.2/patches/167207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120144854.676590-1-maxim.kuvyrkov@linaro.org/","msgid":"<20231120144854.676590-1-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-20T14:48:54","name":"[v2] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120144854.676590-1-maxim.kuvyrkov@linaro.org/mbox/"},{"id":167254,"url":"https://patchwork.plctlab.org/api/1.2/patches/167254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162225.3620105-1-ben.boeckel@kitware.com/","msgid":"<20231120162225.3620105-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T16:22:25","name":"[1/1] email: fix bug and patch email addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162225.3620105-1-ben.boeckel@kitware.com/mbox/"},{"id":167255,"url":"https://patchwork.plctlab.org/api/1.2/patches/167255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162256.3620350-1-ben.boeckel@kitware.com/","msgid":"<20231120162256.3620350-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-20T16:22:56","name":"[1/1] gcc-14: document P1689R5 scanning output support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120162256.3620350-1-ben.boeckel@kitware.com/mbox/"},{"id":167370,"url":"https://patchwork.plctlab.org/api/1.2/patches/167370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120191447.2189928-1-jiawei@iscas.ac.cn/","msgid":"<20231120191447.2189928-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-20T19:14:47","name":"[RFC] RISC-V: Support RISC-V Profiles in -march option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231120191447.2189928-1-jiawei@iscas.ac.cn/mbox/"},{"id":167473,"url":"https://patchwork.plctlab.org/api/1.2/patches/167473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121021837.1558057-1-juzhe.zhong@rivai.ai/","msgid":"<20231121021837.1558057-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T02:18:37","name":"[Committed] RISC-V: Fix reduc_run-9.c test value check bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121021837.1558057-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167485,"url":"https://patchwork.plctlab.org/api/1.2/patches/167485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1fe7bb89af19e0cb17386057431ffa4e908b8ff.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-11-21T03:09:58","name":"Pushed: LoongArch: Fix libgcc build failure when libc is not available (was Re: genopts: Add infrastructure to generate code for new features in ISA evolution)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a1fe7bb89af19e0cb17386057431ffa4e908b8ff.camel@xry111.site/mbox/"},{"id":167491,"url":"https://patchwork.plctlab.org/api/1.2/patches/167491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-1-ben.boeckel@kitware.com/","msgid":"<20231121043959.3683025-1-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-21T04:39:58","name":"[1/1] email: fix bug and patch email addresses","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-1-ben.boeckel@kitware.com/mbox/"},{"id":167492,"url":"https://patchwork.plctlab.org/api/1.2/patches/167492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-2-ben.boeckel@kitware.com/","msgid":"<20231121043959.3683025-2-ben.boeckel@kitware.com>","list_archive_url":null,"date":"2023-11-21T04:39:59","name":"[2/2] bugzilla: remove `gcc-bugs@` mailing list address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121043959.3683025-2-ben.boeckel@kitware.com/mbox/"},{"id":167519,"url":"https://patchwork.plctlab.org/api/1.2/patches/167519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121072042.A6D4E3858C2F@sourceware.org/","msgid":"<20231121072042.A6D4E3858C2F@sourceware.org>","list_archive_url":null,"date":"2023-11-21T07:20:16","name":"tree-optimization/111970 - fix issue with SLP of emulated gather/scatter","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121072042.A6D4E3858C2F@sourceware.org/mbox/"},{"id":167527,"url":"https://patchwork.plctlab.org/api/1.2/patches/167527/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121074133.359B43858C2B@sourceware.org/","msgid":"<20231121074133.359B43858C2B@sourceware.org>","list_archive_url":null,"date":"2023-11-21T07:41:07","name":"middle-end/112622 - adjust arm testcases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121074133.359B43858C2B@sourceware.org/mbox/"},{"id":167534,"url":"https://patchwork.plctlab.org/api/1.2/patches/167534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxnFzQjWHKc90u9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T08:15:21","name":"builtins: Fix fold_builtin_query clzg/ctzg side-effects handling [PR112639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxnFzQjWHKc90u9@tucnak/mbox/"},{"id":167552,"url":"https://patchwork.plctlab.org/api/1.2/patches/167552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com/","msgid":"<033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com>","list_archive_url":null,"date":"2023-11-21T08:30:17","name":"rtl-optimization: Modify loop live data with livein of loop header","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/033c8799-cbdf-4d57-8d96-af33841d1a4f@linux.ibm.com/mbox/"},{"id":167558,"url":"https://patchwork.plctlab.org/api/1.2/patches/167558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxuwE3jA7cIIf71@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T08:48:00","name":"testsuite: Fix up pr111309-2.c on arm [PR111309]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVxuwE3jA7cIIf71@tucnak/mbox/"},{"id":167610,"url":"https://patchwork.plctlab.org/api/1.2/patches/167610/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121100209.315304-1-juzhe.zhong@rivai.ai/","msgid":"<20231121100209.315304-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T10:02:09","name":"[BUG,FIX] RISC-V: Disallow COSNT_VECTOR for DI on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121100209.315304-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167633,"url":"https://patchwork.plctlab.org/api/1.2/patches/167633/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121102958.53303-1-sebastian.huber@embedded-brains.de/","msgid":"<20231121102958.53303-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-21T10:29:58","name":"[v2] gcov: Fix integer types in gen_counter_update()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121102958.53303-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":167661,"url":"https://patchwork.plctlab.org/api/1.2/patches/167661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89v5pnp.fsf@euler.schwinge.homeip.net/","msgid":"<87v89v5pnp.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-21T11:09:14","name":"Fix '\''gcc.dg/tree-ssa/return-value-range-1.c'\'' (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89v5pnp.fsf@euler.schwinge.homeip.net/mbox/"},{"id":167742,"url":"https://patchwork.plctlab.org/api/1.2/patches/167742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121125642.2665901-1-juzhe.zhong@rivai.ai/","msgid":"<20231121125642.2665901-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-21T12:56:42","name":"[Committed] RISC-V: Add missing dump check of pr112438.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121125642.2665901-1-juzhe.zhong@rivai.ai/mbox/"},{"id":167745,"url":"https://patchwork.plctlab.org/api/1.2/patches/167745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dWYu-AKeY4Tx7EvAMCbTpi8vcvr8Xl_o3ZRez4jYtClI9TD5vOf8Qk41sEh6gBbyjlvCOQHPI1woLPVnHY9g9JJu8FRm6eqUtE2L0hsNc=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-21T13:04:35","name":"[v5,1/1] c++: Initial support for P0847R7 (Deducing This) [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e1dWYu-AKeY4Tx7EvAMCbTpi8vcvr8Xl_o3ZRez4jYtClI9TD5vOf8Qk41sEh6gBbyjlvCOQHPI1woLPVnHY9g9JJu8FRm6eqUtE2L0hsNc=@protonmail.com/mbox/"},{"id":167746,"url":"https://patchwork.plctlab.org/api/1.2/patches/167746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121133224.105698-1-ibuclaw@gdcproject.org/","msgid":"<20231121133224.105698-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-21T13:32:24","name":"[committed] d: Merge upstream dmd 65a3da148c, phobos fc06c514a.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121133224.105698-1-ibuclaw@gdcproject.org/mbox/"},{"id":167777,"url":"https://patchwork.plctlab.org/api/1.2/patches/167777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121140827.109435-1-ibuclaw@gdcproject.org/","msgid":"<20231121140827.109435-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-11-21T14:08:27","name":"[committed] d: Merge upstream dmd ff57fec515, druntime ff57fec515, phobos 17bafda79.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121140827.109435-1-ibuclaw@gdcproject.org/mbox/"},{"id":167794,"url":"https://patchwork.plctlab.org/api/1.2/patches/167794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143505.AA1DA3858401@sourceware.org/","msgid":"<20231121143505.AA1DA3858401@sourceware.org>","list_archive_url":null,"date":"2023-11-21T14:34:36","name":"Move VF based dependence check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143505.AA1DA3858401@sourceware.org/mbox/"},{"id":167795,"url":"https://patchwork.plctlab.org/api/1.2/patches/167795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143529.5B1003858C30@sourceware.org/","msgid":"<20231121143529.5B1003858C30@sourceware.org>","list_archive_url":null,"date":"2023-11-21T14:35:02","name":"tree-optimization/112623 - forwprop VEC_PACK_TRUNC generation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121143529.5B1003858C30@sourceware.org/mbox/"},{"id":167800,"url":"https://patchwork.plctlab.org/api/1.2/patches/167800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhfi2k2.fsf@oldenburg.str.redhat.com/","msgid":"<874jhfi2k2.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-11-21T14:49:49","name":"gcc.misc-tests/linkage-y.c: Compatibility with C99+ system compilers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/874jhfi2k2.fsf@oldenburg.str.redhat.com/mbox/"},{"id":167815,"url":"https://patchwork.plctlab.org/api/1.2/patches/167815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160633.2174974-1-rearnsha@arm.com/","msgid":"<20231121160633.2174974-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-21T16:06:33","name":"arm: libgcc: provide implementations of __sync_synchronize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160633.2174974-1-rearnsha@arm.com/mbox/"},{"id":167858,"url":"https://patchwork.plctlab.org/api/1.2/patches/167858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160845.2030365-1-jwakely@redhat.com/","msgid":"<20231121160845.2030365-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:08:14","name":"[committed] libstdc++: Fix std::tr2::dynamic_bitset support for alternate characters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121160845.2030365-1-jwakely@redhat.com/mbox/"},{"id":167859,"url":"https://patchwork.plctlab.org/api/1.2/patches/167859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161026.2031101-1-jwakely@redhat.com/","msgid":"<20231121161026.2031101-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:10:17","name":"[committed] libstdc++: Add std::span::at for C++26 (P2821R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161026.2031101-1-jwakely@redhat.com/mbox/"},{"id":167860,"url":"https://patchwork.plctlab.org/api/1.2/patches/167860/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161105.2031146-1-jwakely@redhat.com/","msgid":"<20231121161105.2031146-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:10:27","name":"[committed] libstdc++: Add freestanding feature test macros (P2407R5)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161105.2031146-1-jwakely@redhat.com/mbox/"},{"id":167856,"url":"https://patchwork.plctlab.org/api/1.2/patches/167856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161136.2031190-1-jwakely@redhat.com/","msgid":"<20231121161136.2031190-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-21T16:11:07","name":"[committed] libstdc++: Do not declare strtok for C++26 freestanding (P2937R0)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121161136.2031190-1-jwakely@redhat.com/mbox/"},{"id":167855,"url":"https://patchwork.plctlab.org/api/1.2/patches/167855/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzZptbmO3+I4mZt@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-11-21T16:24:06","name":"libstdc++: Turn memmove to memcpy in vector reallocations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzZptbmO3+I4mZt@kam.mff.cuni.cz/mbox/"},{"id":167849,"url":"https://patchwork.plctlab.org/api/1.2/patches/167849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzmDvmAqHI4SulJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T17:17:02","name":"c++, v3: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZVzmDvmAqHI4SulJ@tucnak/mbox/"},{"id":167863,"url":"https://patchwork.plctlab.org/api/1.2/patches/167863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180054.3949602-1-manolis.tsamis@vrull.eu/","msgid":"<20231121180054.3949602-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-11-21T18:00:54","name":"[v2] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180054.3949602-1-manolis.tsamis@vrull.eu/mbox/"},{"id":167867,"url":"https://patchwork.plctlab.org/api/1.2/patches/167867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180434.3991921-1-manolis.tsamis@vrull.eu/","msgid":"<20231121180434.3991921-1-manolis.tsamis@vrull.eu>","list_archive_url":null,"date":"2023-11-21T18:04:34","name":"[v2] ifcvt: Remove obsolete code for subreg handling in noce_convert_multiple_sets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121180434.3991921-1-manolis.tsamis@vrull.eu/mbox/"},{"id":167920,"url":"https://patchwork.plctlab.org/api/1.2/patches/167920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV0NjIfSpsMuqr7+@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-21T20:05:32","name":"[committed] sanitizer: Fix build on SPARC/Solaris with Solaris as [PR112562]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV0NjIfSpsMuqr7+@tucnak/mbox/"},{"id":167957,"url":"https://patchwork.plctlab.org/api/1.2/patches/167957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kiu7f3.fsf@euler.schwinge.homeip.net/","msgid":"<87r0kiu7f3.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-21T21:24:00","name":"Fix '\''gcc.dg/tree-ssa/return-value-range-1.c'\'' for '\''char'\'' defaulting to '\''unsigned'\'' (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87r0kiu7f3.fsf@euler.schwinge.homeip.net/mbox/"},{"id":168007,"url":"https://patchwork.plctlab.org/api/1.2/patches/168007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-2-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:14","name":"[1/5] libdiagnostics v2: header and examples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-2-dmalcolm@redhat.com/mbox/"},{"id":168005,"url":"https://patchwork.plctlab.org/api/1.2/patches/168005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-6-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-6-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:18","name":"[5/5] diagnostics: don'\''t print annotation lines when there'\''s no column info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-6-dmalcolm@redhat.com/mbox/"},{"id":168010,"url":"https://patchwork.plctlab.org/api/1.2/patches/168010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-7-dmalcolm@redhat.com/","msgid":"<20231121222019.646253-7-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-21T22:20:19","name":"binutils: v2: experimental use of libdiagnostics in gas","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121222019.646253-7-dmalcolm@redhat.com/mbox/"},{"id":168035,"url":"https://patchwork.plctlab.org/api/1.2/patches/168035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121232704.12336-3-palmer@rivosinc.com/","msgid":"<20231121232704.12336-3-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-11-21T23:27:05","name":"[1/2] testsuite/unroll-8: Avoid triggering undefined behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231121232704.12336-3-palmer@rivosinc.com/mbox/"},{"id":168058,"url":"https://patchwork.plctlab.org/api/1.2/patches/168058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311220044380.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-22T01:40:48","name":"ARM/testsuite: Use non-capturing parentheses with pr53447-5.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311220044380.5892@tpp.orcam.me.uk/mbox/"},{"id":168062,"url":"https://patchwork.plctlab.org/api/1.2/patches/168062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122020423.4699F20424@pchp3.se.axis.com/","msgid":"<20231122020423.4699F20424@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-22T02:04:23","name":"testsuite: Tweak xfail bogus g++.dg/warn/Wstringop-overflow-4.C:144, PR106120","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122020423.4699F20424@pchp3.se.axis.com/mbox/"},{"id":168076,"url":"https://patchwork.plctlab.org/api/1.2/patches/168076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031652.3403525-1-quic_apinski@quicinc.com/","msgid":"<20231122031652.3403525-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-22T03:16:52","name":"Fix gcc.target/aarch64/movk.c testcase after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031652.3403525-1-quic_apinski@quicinc.com/mbox/"},{"id":168077,"url":"https://patchwork.plctlab.org/api/1.2/patches/168077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031756.3403606-1-quic_apinski@quicinc.com/","msgid":"<20231122031756.3403606-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-22T03:17:56","name":"Fix gcc.target/aarch64/movk.c testcase after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122031756.3403606-1-quic_apinski@quicinc.com/mbox/"},{"id":168082,"url":"https://patchwork.plctlab.org/api/1.2/patches/168082/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033108.3654950-1-hongyu.wang@intel.com/","msgid":"<20231122033108.3654950-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-11-22T03:31:08","name":"[APX,PUSH2POP2] Adjust operand order for PUSH2POP2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033108.3654950-1-hongyu.wang@intel.com/mbox/"},{"id":168090,"url":"https://patchwork.plctlab.org/api/1.2/patches/168090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033729.3335056-1-jason@redhat.com/","msgid":"<20231122033729.3335056-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T03:37:29","name":"[pushed] c++: start_preparsed_function tweak","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122033729.3335056-1-jason@redhat.com/mbox/"},{"id":168095,"url":"https://patchwork.plctlab.org/api/1.2/patches/168095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122041548.3655374-1-hongtao.liu@intel.com/","msgid":"<20231122041548.3655374-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-22T04:15:48","name":"Set AVOID_256FMA_CHAINS TO m_GENERIC as it'\''s generally good to new platforms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122041548.3655374-1-hongtao.liu@intel.com/mbox/"},{"id":168108,"url":"https://patchwork.plctlab.org/api/1.2/patches/168108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122061201.3690516-1-juzhe.zhong@rivai.ai/","msgid":"<20231122061201.3690516-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-22T06:12:01","name":"RISC-V: Fix permutation indice mode bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122061201.3690516-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168262,"url":"https://patchwork.plctlab.org/api/1.2/patches/168262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122095455.2215921-1-christophe.lyon@linaro.org/","msgid":"<20231122095455.2215921-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-22T09:54:55","name":"arm: [MVE intrinsics] Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122095455.2215921-1-christophe.lyon@linaro.org/mbox/"},{"id":168268,"url":"https://patchwork.plctlab.org/api/1.2/patches/168268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3RVUdjeIKL0c6x@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:00:53","name":"c++, v4: Implement C++26 P2741R3 - user-generated static_assert messages [PR110348]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3RVUdjeIKL0c6x@tucnak/mbox/"},{"id":168292,"url":"https://patchwork.plctlab.org/api/1.2/patches/168292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3YF+HaB1/Zj9N6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:29:43","name":"tree: Fix up try_catch_may_fallthru [PR112619]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3YF+HaB1/Zj9N6@tucnak/mbox/"},{"id":168295,"url":"https://patchwork.plctlab.org/api/1.2/patches/168295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3ZKmCC+HrLTXwP@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-22T10:34:18","name":"[committed] testsuite: Add testcase for already fixed PR112518","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV3ZKmCC+HrLTXwP@tucnak/mbox/"},{"id":168303,"url":"https://patchwork.plctlab.org/api/1.2/patches/168303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122105322.1478693-1-juzhe.zhong@rivai.ai/","msgid":"<20231122105322.1478693-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-22T10:53:22","name":"RISC-V: Fix incorrect use of vcompress in permutation auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122105322.1478693-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168311,"url":"https://patchwork.plctlab.org/api/1.2/patches/168311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-2-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-2-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:08","name":"[v3,1/8] sched-deps.cc (find_modifiable_mems): Avoid exponential behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-2-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168314,"url":"https://patchwork.plctlab.org/api/1.2/patches/168314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-3-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-3-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:09","name":"[v3,2/8] Unify implementations of print_hard_reg_set()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-3-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168315,"url":"https://patchwork.plctlab.org/api/1.2/patches/168315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-4-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-4-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:10","name":"[v3,3/8] Simplify handling of INSN_ and EXPR_LISTs in sched-rgn.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-4-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168316,"url":"https://patchwork.plctlab.org/api/1.2/patches/168316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-5-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-5-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:11","name":"[v3,4/8] Improve and fix sched-deps.cc: dump_dep() and dump_lists().","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-5-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168312,"url":"https://patchwork.plctlab.org/api/1.2/patches/168312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-6-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-6-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:12","name":"[v3,5/8] Add a bit more logging scheduler'\''s dependency analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-6-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168313,"url":"https://patchwork.plctlab.org/api/1.2/patches/168313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-7-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-7-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:13","name":"[v3,6/8] sched_deps.cc: Simplify initialization of dependency contexts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-7-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168317,"url":"https://patchwork.plctlab.org/api/1.2/patches/168317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-8-maxim.kuvyrkov@linaro.org/","msgid":"<20231122111415.815147-8-maxim.kuvyrkov@linaro.org>","list_archive_url":null,"date":"2023-11-22T11:14:14","name":"[v3,7/8] Improve logging of register data in scheduler dependency analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122111415.815147-8-maxim.kuvyrkov@linaro.org/mbox/"},{"id":168386,"url":"https://patchwork.plctlab.org/api/1.2/patches/168386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com/","msgid":"<7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com>","list_archive_url":null,"date":"2023-11-22T14:06:10","name":"[pushed,PR112610,IRA] : Fix using undefined dump file in IRA code during insn scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d9aad3c-2ac8-21f5-4ee1-49d6042bdb07@redhat.com/mbox/"},{"id":168396,"url":"https://patchwork.plctlab.org/api/1.2/patches/168396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f840b1c7-581e-4132-8c7c-bf60bf9e18b9@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-22T14:27:55","name":"[committed] amdgcn: Fix vector TImode reload loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f840b1c7-581e-4132-8c7c-bf60bf9e18b9@codesourcery.com/mbox/"},{"id":168402,"url":"https://patchwork.plctlab.org/api/1.2/patches/168402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122143911.16620-1-jose.marchesi@oracle.com/","msgid":"<20231122143911.16620-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-22T14:39:11","name":"libgcc: mark __hardcfr_check_fail as always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122143911.16620-1-jose.marchesi@oracle.com/mbox/"},{"id":168403,"url":"https://patchwork.plctlab.org/api/1.2/patches/168403/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122144041.C53983858C33@sourceware.org/","msgid":"<20231122144041.C53983858C33@sourceware.org>","list_archive_url":null,"date":"2023-11-22T14:40:16","name":"tree-optimization/112344 - wrong final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122144041.C53983858C33@sourceware.org/mbox/"},{"id":168409,"url":"https://patchwork.plctlab.org/api/1.2/patches/168409/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311221501050.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-11-22T15:21:27","name":"AArch64/testsuite: Use non-capturing parentheses with ccmp_1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2311221501050.5892@tpp.orcam.me.uk/mbox/"},{"id":168486,"url":"https://patchwork.plctlab.org/api/1.2/patches/168486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leapu2sq.fsf@euler.schwinge.homeip.net/","msgid":"<87leapu2sq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-22T17:16:05","name":"Adjust '\''libgomp.c/declare-variant-{3,4}-[...]'\'' for inter-procedural value range propagation (was: Propagate value ranges of return values)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87leapu2sq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":168491,"url":"https://patchwork.plctlab.org/api/1.2/patches/168491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122172657.542419-1-ppalka@redhat.com/","msgid":"<20231122172657.542419-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-22T17:26:57","name":"c++: alias template of non-template class [PR112633]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122172657.542419-1-ppalka@redhat.com/mbox/"},{"id":168548,"url":"https://patchwork.plctlab.org/api/1.2/patches/168548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5ih3BNkEn-7As4@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-22T20:20:23","name":"[committed] hppa: Fix integer REG+D address reloads","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5ih3BNkEn-7As4@mx3210.localdomain/mbox/"},{"id":168549,"url":"https://patchwork.plctlab.org/api/1.2/patches/168549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5j6Akii0sC2caT@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-22T20:26:16","name":"[committed] hppa: Define MAX_FIXED_MODE_SIZE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV5j6Akii0sC2caT@mx3210.localdomain/mbox/"},{"id":168596,"url":"https://patchwork.plctlab.org/api/1.2/patches/168596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-1-jason@redhat.com/","msgid":"<20231122211235.3503229-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T21:12:34","name":"[1/2] c-family: -Waddress-of-packed-member and casts","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-1-jason@redhat.com/mbox/"},{"id":168597,"url":"https://patchwork.plctlab.org/api/1.2/patches/168597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-2-jason@redhat.com/","msgid":"<20231122211235.3503229-2-jason@redhat.com>","list_archive_url":null,"date":"2023-11-22T21:12:35","name":"[2/2] c-family: rename warn_for_address_or_pointer_of_packed_member","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122211235.3503229-2-jason@redhat.com/mbox/"},{"id":168631,"url":"https://patchwork.plctlab.org/api/1.2/patches/168631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122220731.1121607-1-ppalka@redhat.com/","msgid":"<20231122220731.1121607-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-22T22:07:31","name":"c++: Implement P2582R1, CTAD from inherited constructors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122220731.1121607-1-ppalka@redhat.com/mbox/"},{"id":168661,"url":"https://patchwork.plctlab.org/api/1.2/patches/168661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232350.1C78333ECB@hamza.pair.com/","msgid":"<20231122232350.1C78333ECB@hamza.pair.com>","list_archive_url":null,"date":"2023-11-22T23:23:48","name":"[pushed] wwwdocs: branching: No longer refer to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232350.1C78333ECB@hamza.pair.com/mbox/"},{"id":168664,"url":"https://patchwork.plctlab.org/api/1.2/patches/168664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232520.39C4733E8D@hamza.pair.com/","msgid":"<20231122232520.39C4733E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-22T23:25:18","name":"[pushed] wwwdocs: releasing: No longer refer to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231122232520.39C4733E8D@hamza.pair.com/mbox/"},{"id":168671,"url":"https://patchwork.plctlab.org/api/1.2/patches/168671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123004751.7797533EC4@hamza.pair.com/","msgid":"<20231123004751.7797533EC4@hamza.pair.com>","list_archive_url":null,"date":"2023-11-23T00:47:49","name":"[pushed] wwwdocs: faq: Refer to gcc-testresults instead of buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123004751.7797533EC4@hamza.pair.com/mbox/"},{"id":168680,"url":"https://patchwork.plctlab.org/api/1.2/patches/168680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com/","msgid":"<447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com>","list_archive_url":null,"date":"2023-11-23T01:22:30","name":"[PATCHv2] Clean up by_pieces_ninsns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447b3443-49b7-4c39-a4f5-0eb07da378dd@linux.ibm.com/mbox/"},{"id":168709,"url":"https://patchwork.plctlab.org/api/1.2/patches/168709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030417.29993-1-guojie@loongson.cn/","msgid":"<20231123030417.29993-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-23T03:04:17","name":"[v2] LoongArch: Optimize the loading of immediate numbers with the same high and low 32-bit values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030417.29993-1-guojie@loongson.cn/mbox/"},{"id":168711,"url":"https://patchwork.plctlab.org/api/1.2/patches/168711/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030556.31356-1-guojie@loongson.cn/","msgid":"<20231123030556.31356-1-guojie@loongson.cn>","list_archive_url":null,"date":"2023-11-23T03:05:56","name":"LoongArch: Fix runtime error in a gcc build with --with-build-config=bootstrap-ubsan","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123030556.31356-1-guojie@loongson.cn/mbox/"},{"id":168719,"url":"https://patchwork.plctlab.org/api/1.2/patches/168719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123054758.28829-1-wangfeng@eswincomputing.com/","msgid":"<20231123054758.28829-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-23T05:47:58","name":"gimple-vr-values:Add constraint for gimple-cond optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123054758.28829-1-wangfeng@eswincomputing.com/mbox/"},{"id":168720,"url":"https://patchwork.plctlab.org/api/1.2/patches/168720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123060949.618089-1-haochen.jiang@intel.com/","msgid":"<20231123060949.618089-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-11-23T06:09:49","name":"i386: Fix AVX512 and AVX10 option issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123060949.618089-1-haochen.jiang@intel.com/mbox/"},{"id":168768,"url":"https://patchwork.plctlab.org/api/1.2/patches/168768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123080116.2449B3858426@sourceware.org/","msgid":"<20231123080116.2449B3858426@sourceware.org>","list_archive_url":null,"date":"2023-11-23T08:00:49","name":"middle-end/32667 - document cpymem and memcpy exact overlap requirement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123080116.2449B3858426@sourceware.org/mbox/"},{"id":168825,"url":"https://patchwork.plctlab.org/api/1.2/patches/168825/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8eh+8HZl/ejibp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T09:42:31","name":"lower-bitint: Fix up -fnon-call-exceptions bit-field load lowering [PR112668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8eh+8HZl/ejibp@tucnak/mbox/"},{"id":168840,"url":"https://patchwork.plctlab.org/api/1.2/patches/168840/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8jppJSXdScNAjH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T10:04:22","name":"expr: Fix &bitint_var handling in initializers [PR112336]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV8jppJSXdScNAjH@tucnak/mbox/"},{"id":168897,"url":"https://patchwork.plctlab.org/api/1.2/patches/168897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105527.2347252-1-jwakely@redhat.com/","msgid":"<20231123105527.2347252-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T10:54:56","name":"c++: Make g++.dg/opt/pr110879.C require C++11 [PR110879]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105527.2347252-1-jwakely@redhat.com/mbox/"},{"id":168867,"url":"https://patchwork.plctlab.org/api/1.2/patches/168867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105503.3913200-1-juzhe.zhong@rivai.ai/","msgid":"<20231123105503.3913200-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T10:55:03","name":"[Committed] RISC-V: Refine some codes of riscv-v.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123105503.3913200-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168873,"url":"https://patchwork.plctlab.org/api/1.2/patches/168873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123110409.3914102-1-juzhe.zhong@rivai.ai/","msgid":"<20231123110409.3914102-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T11:04:09","name":"RISC-V: Disable AVL propagation of vrgather instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123110409.3914102-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168888,"url":"https://patchwork.plctlab.org/api/1.2/patches/168888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmxC+Lk1Fk7o4iGhy0G=svOB3ZoYfAdf835-PUvc5rMZw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-11-23T11:36:24","name":"[aarch64] PR111702 - ICE in insert_regs after interleave+zip1 vector initialization patch","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAAgBjMmxC+Lk1Fk7o4iGhy0G=svOB3ZoYfAdf835-PUvc5rMZw@mail.gmail.com/mbox/"},{"id":168898,"url":"https://patchwork.plctlab.org/api/1.2/patches/168898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123115952.1502588-1-juzhe.zhong@rivai.ai/","msgid":"<20231123115952.1502588-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T11:59:52","name":"[Committed,V2] RISC-V: Disable AVL propagation of vrgather instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123115952.1502588-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168902,"url":"https://patchwork.plctlab.org/api/1.2/patches/168902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123120735.1632594-1-juzhe.zhong@rivai.ai/","msgid":"<20231123120735.1632594-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T12:07:35","name":"[Committed] RISC-V: Add wrapper for emit vec_extract[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123120735.1632594-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168925,"url":"https://patchwork.plctlab.org/api/1.2/patches/168925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123125910.1889955-1-juzhe.zhong@rivai.ai/","msgid":"<20231123125910.1889955-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T12:59:10","name":"RISC-V: Optimize a special case of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123125910.1889955-1-juzhe.zhong@rivai.ai/mbox/"},{"id":168948,"url":"https://patchwork.plctlab.org/api/1.2/patches/168948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123134751.25302-1-sebastian.huber@embedded-brains.de/","msgid":"<20231123134751.25302-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-23T13:47:51","name":"gcov: No atomic ops for -fprofile-update=single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123134751.25302-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":168952,"url":"https://patchwork.plctlab.org/api/1.2/patches/168952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV9aCyCiwKDkpvwy@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-23T13:56:27","name":"lower-bitint, v3: Fix up -fnon-call-exceptions bit-field load lowering [PR112668]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV9aCyCiwKDkpvwy@tucnak/mbox/"},{"id":168955,"url":"https://patchwork.plctlab.org/api/1.2/patches/168955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com/","msgid":"<43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com>","list_archive_url":null,"date":"2023-11-23T14:21:41","name":"OpenMP: Accept argument to depobj'\''s destroy clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/43e9e456-5114-468b-95a1-b22d8abea73c@codesourcery.com/mbox/"},{"id":168977,"url":"https://patchwork.plctlab.org/api/1.2/patches/168977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123151656.30332-1-jose.marchesi@oracle.com/","msgid":"<20231123151656.30332-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-23T15:16:56","name":"[V2] libgcc: mark __hardcfr_check_fail as always_inline","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123151656.30332-1-jose.marchesi@oracle.com/mbox/"},{"id":169011,"url":"https://patchwork.plctlab.org/api/1.2/patches/169011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123155627.2335026-1-christophe.lyon@linaro.org/","msgid":"<20231123155627.2335026-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-23T15:56:27","name":"arm: [MVE intrinsics] Add default clause to full_width_access::memory_vector_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123155627.2335026-1-christophe.lyon@linaro.org/mbox/"},{"id":169027,"url":"https://patchwork.plctlab.org/api/1.2/patches/169027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV+B5aYQheJ347xT@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-23T16:46:29","name":"[v5] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV+B5aYQheJ347xT@redhat.com/mbox/"},{"id":169054,"url":"https://patchwork.plctlab.org/api/1.2/patches/169054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170736.40CD020427@pchp3.se.axis.com/","msgid":"<20231123170736.40CD020427@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:07:36","name":"[1/3] contrib/regression/btest-gcc.sh: Handle multiple options.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170736.40CD020427@pchp3.se.axis.com/mbox/"},{"id":169056,"url":"https://patchwork.plctlab.org/api/1.2/patches/169056/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170820.5BB4120432@pchp3.se.axis.com/","msgid":"<20231123170820.5BB4120432@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:08:20","name":"[2/3] contrib/regression/btest-gcc.sh: Simplify option handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170820.5BB4120432@pchp3.se.axis.com/mbox/"},{"id":169057,"url":"https://patchwork.plctlab.org/api/1.2/patches/169057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170926.D33BA20432@pchp3.se.axis.com/","msgid":"<20231123170926.D33BA20432@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-23T17:09:26","name":"[3/3] contrib/regression/btest-gcc.sh: Optionally handle XPASS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123170926.D33BA20432@pchp3.se.axis.com/mbox/"},{"id":169088,"url":"https://patchwork.plctlab.org/api/1.2/patches/169088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123174450.2450203-1-jwakely@redhat.com/","msgid":"<20231123174450.2450203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T17:44:37","name":"[committed] libstdc++: Fix access error in __gnu_test::uneq_allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123174450.2450203-1-jwakely@redhat.com/mbox/"},{"id":169087,"url":"https://patchwork.plctlab.org/api/1.2/patches/169087/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123175247.2451163-1-jwakely@redhat.com/","msgid":"<20231123175247.2451163-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-23T17:51:38","name":"[committed,v2] libstdc++: Define std::ranges::to for C++23 (P1206R7) [PR111055]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123175247.2451163-1-jwakely@redhat.com/mbox/"},{"id":169084,"url":"https://patchwork.plctlab.org/api/1.2/patches/169084/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7b2e5fb-593d-45ac-999c-20811a75467d@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-11-23T18:09:51","name":"[avr,committed] Fix PR86776","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d7b2e5fb-593d-45ac-999c-20811a75467d@gjlay.de/mbox/"},{"id":169089,"url":"https://patchwork.plctlab.org/api/1.2/patches/169089/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-mtaDZJhqKnOgs@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T19:23:33","name":"[committed] hppa: Don'\''t skip check for warning at line 411 in Wattributes.c on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-mtaDZJhqKnOgs@mx3210.localdomain/mbox/"},{"id":169090,"url":"https://patchwork.plctlab.org/api/1.2/patches/169090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-noM-Cr2S9p5VU@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T19:27:28","name":"[committed] hppa: xfail scan-assembler-not check in g++.dg/cpp0x/initlist-const1.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-noM-Cr2S9p5VU@mx3210.localdomain/mbox/"},{"id":169120,"url":"https://patchwork.plctlab.org/api/1.2/patches/169120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-7qGTqufuUgo4P@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:52:56","name":"[committed] hppa: Export main in pr104869.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-7qGTqufuUgo4P@mx3210.localdomain/mbox/"},{"id":169121,"url":"https://patchwork.plctlab.org/api/1.2/patches/169121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-8ZH8myH1bUMhj@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:56:04","name":"[committed] hppa: Fix gcc.dg/analyzer/fd-4.c on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-8ZH8myH1bUMhj@mx3210.localdomain/mbox/"},{"id":169122,"url":"https://patchwork.plctlab.org/api/1.2/patches/169122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-9DtsY8vncIp5V@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-23T20:58:54","name":"[committed] hppa: Fix g++.dg/modules/bad-mapper-1.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZV-9DtsY8vncIp5V@mx3210.localdomain/mbox/"},{"id":169124,"url":"https://patchwork.plctlab.org/api/1.2/patches/169124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123213854.2B7D333E9E@hamza.pair.com/","msgid":"<20231123213854.2B7D333E9E@hamza.pair.com>","list_archive_url":null,"date":"2023-11-23T21:38:51","name":"[pushed] wwwdocs: conduct: Use licensebuttons.net","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123213854.2B7D333E9E@hamza.pair.com/mbox/"},{"id":169132,"url":"https://patchwork.plctlab.org/api/1.2/patches/169132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123231800.3823357-1-juzhe.zhong@rivai.ai/","msgid":"<20231123231800.3823357-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-23T23:18:00","name":"[V2] RISC-V: Optimize a special case of VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231123231800.3823357-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169171,"url":"https://patchwork.plctlab.org/api/1.2/patches/169171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124050418.1547599-1-juzhe.zhong@rivai.ai/","msgid":"<20231124050418.1547599-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-24T05:04:18","name":"[Committed] RISC-V: Disable BSWAP optimization for NUNITS < 4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124050418.1547599-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169173,"url":"https://patchwork.plctlab.org/api/1.2/patches/169173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124053241.64194-1-xry111@xry111.site/","msgid":"<20231124053241.64194-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-24T05:28:22","name":"Only allow (int)trunc(x) to (int)x simplification with -ffp-int-builtin-inexact [PR107723]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124053241.64194-1-xry111@xry111.site/mbox/"},{"id":169220,"url":"https://patchwork.plctlab.org/api/1.2/patches/169220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124070128.0F706132E2@imap2.dmz-prg2.suse.org/","msgid":"<20231124070128.0F706132E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-11-24T07:01:27","name":"tree-optimization/112344 - relax final value-replacement fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124070128.0F706132E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":169275,"url":"https://patchwork.plctlab.org/api/1.2/patches/169275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBbkuhQ8TzBgrhU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:15:14","name":"lower-bitint: Lower FLOAT_EXPR from BITINT_TYPE INTEGER_CST [PR112679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBbkuhQ8TzBgrhU@tucnak/mbox/"},{"id":169276,"url":"https://patchwork.plctlab.org/api/1.2/patches/169276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBdDpASQrBk+5+0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:21:34","name":"match.pd: Avoid simplification into invalid BIT_FIELD_REFs [PR112673]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBdDpASQrBk+5+0@tucnak/mbox/"},{"id":169278,"url":"https://patchwork.plctlab.org/api/1.2/patches/169278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBfOrpCVK8K1m34@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:30:50","name":"i386: Fix ICE during cbranchv16qi4 expansion [PR112681]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBfOrpCVK8K1m34@tucnak/mbox/"},{"id":169279,"url":"https://patchwork.plctlab.org/api/1.2/patches/169279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124083428.3153486-1-juzhe.zhong@rivai.ai/","msgid":"<20231124083428.3153486-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-24T08:34:28","name":"RISC-V: Fix inconsistency among all vectorization hooks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124083428.3153486-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169280,"url":"https://patchwork.plctlab.org/api/1.2/patches/169280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBgF6OXcpQ8HMAM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T08:34:31","name":"c++, v3: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWBgF6OXcpQ8HMAM@tucnak/mbox/"},{"id":169297,"url":"https://patchwork.plctlab.org/api/1.2/patches/169297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com/","msgid":"<2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com>","list_archive_url":null,"date":"2023-11-24T08:42:50","name":"[Binutils] AArch64: Enable Debug (FEAT_DEBUGv8p9) extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2e7c29c1-0ae0-484d-a227-6a8d5d7998d9@arm.com/mbox/"},{"id":169378,"url":"https://patchwork.plctlab.org/api/1.2/patches/169378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7836aa028e374b3d127fcd4ab01655697db94be.1700821042.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T10:18:13","name":"[v1,1/1] RISC-V: Initial RV64E and LP64E support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e7836aa028e374b3d127fcd4ab01655697db94be.1700821042.git.research_trasio@irq.a4lg.com/mbox/"},{"id":169379,"url":"https://patchwork.plctlab.org/api/1.2/patches/169379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org/","msgid":"<20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-11-24T10:25:32","name":"tree-optimization/112677 - stack corruption with .COND_* reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124102537.34DF8132E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":169402,"url":"https://patchwork.plctlab.org/api/1.2/patches/169402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45565a8-53d6-49a8-a46a-7b885f4e6188@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T12:24:43","name":"[v3] OpenMP: Accept argument to depobj'\''s destroy clause","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45565a8-53d6-49a8-a46a-7b885f4e6188@codesourcery.com/mbox/"},{"id":169406,"url":"https://patchwork.plctlab.org/api/1.2/patches/169406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ens4hq.fsf@euler.schwinge.homeip.net/","msgid":"<87y1ens4hq.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T12:46:57","name":"testsuite: Add '\''only_for_offload_target'\'' wrapper for '\''scan-offload-tree-dump'\'' etc. (was: drop -aux{dir,base}, revamp -dump{dir,base})","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1ens4hq.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169435,"url":"https://patchwork.plctlab.org/api/1.2/patches/169435/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com/","msgid":"<958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T13:51:28","name":"OpenMP: Add -Wopenmp and use it","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/958dc0d6-7b1f-4a03-b7d4-1e13b47a545b@codesourcery.com/mbox/"},{"id":169452,"url":"https://patchwork.plctlab.org/api/1.2/patches/169452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89rryiv.fsf@euler.schwinge.homeip.net/","msgid":"<87v89rryiv.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T14:55:52","name":"GCN: Tag '\''-march=[...]'\'', '\''-mtune=[...]'\'' as '\''Negative'\'' of themselves [PR112669] (was: [gcn][patch] Add -mgpu option and plumb in assembler/linker)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87v89rryiv.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169459,"url":"https://patchwork.plctlab.org/api/1.2/patches/169459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf4vry1i.fsf@euler.schwinge.homeip.net/","msgid":"<87sf4vry1i.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-24T15:06:17","name":"GCN: Remove '\''last_arg'\'' spec function (was: GCN: Tag '\''-march=[...]'\'', '\''-mtune=[...]'\'' as '\''Negative'\'' of themselves [PR112669])","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87sf4vry1i.fsf@euler.schwinge.homeip.net/mbox/"},{"id":169484,"url":"https://patchwork.plctlab.org/api/1.2/patches/169484/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDHDJ9ih0esQnlM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T15:53:48","name":"mips: Fix up mips*-sde-elf* build [PR112300]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDHDJ9ih0esQnlM@tucnak/mbox/"},{"id":169486,"url":"https://patchwork.plctlab.org/api/1.2/patches/169486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/be2d7503-cf71-47ea-9fb5-5f069e3cdd9c@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T16:07:50","name":"[GCN] install.texi: Update GCN entry - @uref and LLVM version remark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/be2d7503-cf71-47ea-9fb5-5f069e3cdd9c@codesourcery.com/mbox/"},{"id":169491,"url":"https://patchwork.plctlab.org/api/1.2/patches/169491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com/","msgid":"<9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T16:20:27","name":"[wwwdocs,GCN] gcc-14/changes.html: GCN - Mention improvements due to VGPR register use","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a1b7f88-4c27-40d3-bf77-c8e13de6a13b@codesourcery.com/mbox/"},{"id":169492,"url":"https://patchwork.plctlab.org/api/1.2/patches/169492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9847458-8898-4a5b-a461-659ea771fbec@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T16:22:22","name":"[wwwdocs,OpenACC] gcc-14/changes.html: OpenACC - mention support for first 2.7 features","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f9847458-8898-4a5b-a461-659ea771fbec@codesourcery.com/mbox/"},{"id":169494,"url":"https://patchwork.plctlab.org/api/1.2/patches/169494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cm7jex5.fsf@oracle.com/","msgid":"<877cm7jex5.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-24T16:26:30","name":"bpf: Throw error when external libcalls are generated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877cm7jex5.fsf@oracle.com/mbox/"},{"id":169495,"url":"https://patchwork.plctlab.org/api/1.2/patches/169495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com/","msgid":"<13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com>","list_archive_url":null,"date":"2023-11-24T16:26:44","name":"[wwwdocs,OpenMP] gcc-14/changes.html + projects/gomp/: OpenMP update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/13ee2772-40d5-4cc3-a088-62eae1199806@codesourcery.com/mbox/"},{"id":169519,"url":"https://patchwork.plctlab.org/api/1.2/patches/169519/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com/","msgid":"<96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com>","list_archive_url":null,"date":"2023-11-24T16:53:04","name":"PR tree-optimization/111922 - Ensure wi_fold arguments match precisions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/96de63b4-649f-46e5-9e28-47fe9a65b948@redhat.com/mbox/"},{"id":169532,"url":"https://patchwork.plctlab.org/api/1.2/patches/169532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDd6GTD5UUV50Ht@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-24T17:31:20","name":"[committed] hppa: Use INT14_OK_STRICT in a couple of places in pa_emit_move_sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDd6GTD5UUV50Ht@mx3210.localdomain/mbox/"},{"id":169535,"url":"https://patchwork.plctlab.org/api/1.2/patches/169535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDmZeOZWcb9K2N0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-24T18:07:33","name":"aarch64: Fix up aarch64_simd_stp [PR109977]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWDmZeOZWcb9K2N0@tucnak/mbox/"},{"id":169536,"url":"https://patchwork.plctlab.org/api/1.2/patches/169536/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124180922.1302655-1-ppalka@redhat.com/","msgid":"<20231124180922.1302655-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-24T18:09:22","name":"c++/modules: alias CTAD and specializations table","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231124180922.1302655-1-ppalka@redhat.com/mbox/"},{"id":169547,"url":"https://patchwork.plctlab.org/api/1.2/patches/169547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7574843-ce81-4fdd-abf9-186640112a69@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-24T18:56:21","name":"[committed] c-family/c.opt (-Wopenmp): Add missing tailing '\''.'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c7574843-ce81-4fdd-abf9-186640112a69@codesourcery.com/mbox/"},{"id":169629,"url":"https://patchwork.plctlab.org/api/1.2/patches/169629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125031536.DA3EE2042A@pchp3.se.axis.com/","msgid":"<20231125031536.DA3EE2042A@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-25T03:15:36","name":"testsuite/gcc.dg/uninit-pred-9_b.c:20: Fix XPASS for various targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125031536.DA3EE2042A@pchp3.se.axis.com/mbox/"},{"id":169637,"url":"https://patchwork.plctlab.org/api/1.2/patches/169637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWGf3nsyohGl2pLd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-25T07:18:54","name":"i386: Fix up *jcc_bt*_mask{,_1} [PR111408]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWGf3nsyohGl2pLd@tucnak/mbox/"},{"id":169659,"url":"https://patchwork.plctlab.org/api/1.2/patches/169659/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125082432.630165-1-juzhe.zhong@rivai.ai/","msgid":"<20231125082432.630165-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-25T08:24:32","name":"RISC-V: Remove incorrect function gate gather_scatter_valid_offset_mode_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125082432.630165-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169688,"url":"https://patchwork.plctlab.org/api/1.2/patches/169688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125094721.18913-1-jose.marchesi@oracle.com/","msgid":"<20231125094721.18913-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-25T09:47:21","name":"Emit funcall external declarations only if actually used.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125094721.18913-1-jose.marchesi@oracle.com/mbox/"},{"id":169689,"url":"https://patchwork.plctlab.org/api/1.2/patches/169689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com/","msgid":"<3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com>","list_archive_url":null,"date":"2023-11-25T09:50:38","name":"[pushed] wwwdocs: readings: Update OpenPOWER link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3b49a101-0f41-f7a6-1a70-4b764916081b@pfeifer.com/mbox/"},{"id":169693,"url":"https://patchwork.plctlab.org/api/1.2/patches/169693/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWHJzN4hJHFSZ28f@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-25T10:17:48","name":"rs6000: Canonicalize copysign (x, -1) back to -abs (x) in the backend [PR112606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWHJzN4hJHFSZ28f@tucnak/mbox/"},{"id":169700,"url":"https://patchwork.plctlab.org/api/1.2/patches/169700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125111907.5731533E8D@hamza.pair.com/","msgid":"<20231125111907.5731533E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T11:19:05","name":"[pushed] doc: Update ISO C++ reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125111907.5731533E8D@hamza.pair.com/mbox/"},{"id":169701,"url":"https://patchwork.plctlab.org/api/1.2/patches/169701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125112534.13312-1-sebastian.huber@embedded-brains.de/","msgid":"<20231125112534.13312-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-25T11:25:34","name":"Update GMP/MPFR/MPC/ISL/gettext to latest release","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125112534.13312-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":169714,"url":"https://patchwork.plctlab.org/api/1.2/patches/169714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125123348.19E1633EA0@hamza.pair.com/","msgid":"<20231125123348.19E1633EA0@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T12:33:46","name":"[pushed] doc: Remove obsolete notes on GCC 4.x on FreeBSD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125123348.19E1633EA0@hamza.pair.com/mbox/"},{"id":169731,"url":"https://patchwork.plctlab.org/api/1.2/patches/169731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125131103.A4C0833E8B@hamza.pair.com/","msgid":"<20231125131103.A4C0833E8B@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T13:11:02","name":"[pushed] doc: Complete and sort the list of front ends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125131103.A4C0833E8B@hamza.pair.com/mbox/"},{"id":169747,"url":"https://patchwork.plctlab.org/api/1.2/patches/169747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144320.855A033EA0@hamza.pair.com/","msgid":"<20231125144320.855A033EA0@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T14:43:18","name":"[pushed] wwwdocs: gcc-13: Refer to GCC (instead of gcc)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144320.855A033EA0@hamza.pair.com/mbox/"},{"id":169748,"url":"https://patchwork.plctlab.org/api/1.2/patches/169748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144527.2699733E8D@hamza.pair.com/","msgid":"<20231125144527.2699733E8D@hamza.pair.com>","list_archive_url":null,"date":"2023-11-25T14:45:25","name":"[pushed] wwwdocs: reading: Update the MicroBlaze section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231125144527.2699733E8D@hamza.pair.com/mbox/"},{"id":169814,"url":"https://patchwork.plctlab.org/api/1.2/patches/169814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126004616.2690148-1-juzhe.zhong@rivai.ai/","msgid":"<20231126004616.2690148-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-26T00:46:16","name":"[Committed] RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126004616.2690148-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169826,"url":"https://patchwork.plctlab.org/api/1.2/patches/169826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-1-quic_apinski@quicinc.com/","msgid":"<20231126025800.1381015-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T02:57:59","name":"[1/2] Fix contracts-tmpl-spec2.C on targets where plain char is unsigned by default","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-1-quic_apinski@quicinc.com/mbox/"},{"id":169827,"url":"https://patchwork.plctlab.org/api/1.2/patches/169827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-2-quic_apinski@quicinc.com/","msgid":"<20231126025800.1381015-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T02:58:00","name":"[2/2] Fix gcc.target/aarch64/simd/vmulxd_{f64, f32}_2.c after after IPA-VRP improvement for return values","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126025800.1381015-2-quic_apinski@quicinc.com/mbox/"},{"id":169829,"url":"https://patchwork.plctlab.org/api/1.2/patches/169829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126043003.1412233-1-quic_apinski@quicinc.com/","msgid":"<20231126043003.1412233-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-26T04:30:03","name":"[COMMITTED] Fix gcc.dg/vla-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126043003.1412233-1-quic_apinski@quicinc.com/mbox/"},{"id":169845,"url":"https://patchwork.plctlab.org/api/1.2/patches/169845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126091355.2309349-1-juzhe.zhong@rivai.ai/","msgid":"<20231126091355.2309349-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-26T09:13:55","name":"[Committed] RISC-V: Disable AVL propagation of slidedown instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126091355.2309349-1-juzhe.zhong@rivai.ai/mbox/"},{"id":169889,"url":"https://patchwork.plctlab.org/api/1.2/patches/169889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN0hSsiN29KT7J4@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:38:29","name":"[committed] hppa: Really fix g++.dg/modules/bad-mapper-1.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN0hSsiN29KT7J4@mx3210.localdomain/mbox/"},{"id":169890,"url":"https://patchwork.plctlab.org/api/1.2/patches/169890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126163858.9328-1-amonakov@ispras.ru/","msgid":"<20231126163858.9328-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-11-26T16:38:58","name":"[committed] sort.cc: fix mentions of sorting networks in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126163858.9328-1-amonakov@ispras.ru/mbox/"},{"id":169891,"url":"https://patchwork.plctlab.org/api/1.2/patches/169891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN1Oz2R-p6TXRsf@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:41:31","name":"[committed] hppa: Fix pr104869.C on hpux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN1Oz2R-p6TXRsf@mx3210.localdomain/mbox/"},{"id":169892,"url":"https://patchwork.plctlab.org/api/1.2/patches/169892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2NbuWyWNxe4ce@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:45:41","name":"[committed] Skip analyzer socket tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2NbuWyWNxe4ce@mx3210.localdomain/mbox/"},{"id":169893,"url":"https://patchwork.plctlab.org/api/1.2/patches/169893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2twQpxjbt_yhY@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-11-26T16:47:51","name":"[committed] Skip analyzer strndup test on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWN2twQpxjbt_yhY@mx3210.localdomain/mbox/"},{"id":169916,"url":"https://patchwork.plctlab.org/api/1.2/patches/169916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126233154.3D67420425@pchp3.se.axis.com/","msgid":"<20231126233154.3D67420425@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-11-26T23:31:54","name":"[Committed] testsuite/gcc.dg/uninit-pred-9_b.c:23: Un-xfail for MMIX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231126233154.3D67420425@pchp3.se.axis.com/mbox/"},{"id":169967,"url":"https://patchwork.plctlab.org/api/1.2/patches/169967/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127043333.1955900-1-quic_apinski@quicinc.com/","msgid":"<20231127043333.1955900-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T04:33:33","name":"aarch64: Improve cost of `a ? {-,}1 : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127043333.1955900-1-quic_apinski@quicinc.com/mbox/"},{"id":169968,"url":"https://patchwork.plctlab.org/api/1.2/patches/169968/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com/","msgid":"<56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T04:40:11","name":"[PING^2,V15,4/4] ree: Improve ree pass using defined abi interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/56459107-1acc-4f32-8772-9f4b48e65501@linux.ibm.com/mbox/"},{"id":169969,"url":"https://patchwork.plctlab.org/api/1.2/patches/169969/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8cc83-b615-43ed-929a-8b6c35842cc3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T04:43:31","name":"[PING,^2,v2,3/4] Improve functionality of ree pass with various constants with AND operation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4c8cc83-b615-43ed-929a-8b6c35842cc3@linux.ibm.com/mbox/"},{"id":170005,"url":"https://patchwork.plctlab.org/api/1.2/patches/170005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127062618.21624-1-jose.marchesi@oracle.com/","msgid":"<20231127062618.21624-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-11-27T06:26:18","name":"[COMMITTED] bpf: remove bpf-helpers.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127062618.21624-1-jose.marchesi@oracle.com/mbox/"},{"id":170050,"url":"https://patchwork.plctlab.org/api/1.2/patches/170050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127083458.307226-1-shihua@iscas.ac.cn/","msgid":"<20231127083458.307226-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-11-27T08:34:57","name":"Add C intrinsics for scalar crypto extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127083458.307226-1-shihua@iscas.ac.cn/mbox/"},{"id":170068,"url":"https://patchwork.plctlab.org/api/1.2/patches/170068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127094330.EB06E3857BBB@sourceware.org/","msgid":"<20231127094330.EB06E3857BBB@sourceware.org>","list_archive_url":null,"date":"2023-11-27T09:42:59","name":"tree-optimization/112706 - missed simplification of condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127094330.EB06E3857BBB@sourceware.org/mbox/"},{"id":170069,"url":"https://patchwork.plctlab.org/api/1.2/patches/170069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127095355.1535636-2-stefansf@linux.ibm.com/","msgid":"<20231127095355.1535636-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T09:53:56","name":"s390: Fixup builtins vec_rli and verll","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127095355.1535636-2-stefansf@linux.ibm.com/mbox/"},{"id":170104,"url":"https://patchwork.plctlab.org/api/1.2/patches/170104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4rxun8.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T12:12:11","name":"Treat \"p\" in asms as addressing VOIDmode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4rxun8.fsf@arm.com/mbox/"},{"id":170117,"url":"https://patchwork.plctlab.org/api/1.2/patches/170117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127123819.1772162-2-stefansf@linux.ibm.com/","msgid":"<20231127123819.1772162-2-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-11-27T12:38:20","name":"s390: Add missing builtin type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127123819.1772162-2-stefansf@linux.ibm.com/mbox/"},{"id":170131,"url":"https://patchwork.plctlab.org/api/1.2/patches/170131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzfyzz75d.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-11-27T12:56:46","name":"libsanitizer: Check assembler support for symbol assignment [PR112563]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddzfyzz75d.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":170134,"url":"https://patchwork.plctlab.org/api/1.2/patches/170134/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7e3bc8332cd58ce6039292b92e112b6d2a9dd84.camel@tugraz.at/","msgid":"","list_archive_url":null,"date":"2023-11-27T13:16:48","name":"[V4,4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a7e3bc8332cd58ce6039292b92e112b6d2a9dd84.camel@tugraz.at/mbox/"},{"id":170137,"url":"https://patchwork.plctlab.org/api/1.2/patches/170137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127132412.2440640-1-juzhe.zhong@rivai.ai/","msgid":"<20231127132412.2440640-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-27T13:24:12","name":"RISC-V: Fix VSETVL PASS regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127132412.2440640-1-juzhe.zhong@rivai.ai/mbox/"},{"id":170138,"url":"https://patchwork.plctlab.org/api/1.2/patches/170138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com/","msgid":"<4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com>","list_archive_url":null,"date":"2023-11-27T13:38:48","name":"[committed] amdgcn: Disallow TImode vector permute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f16e1fb-e42b-4aca-b675-a37e8fcec48b@codesourcery.com/mbox/"},{"id":170188,"url":"https://patchwork.plctlab.org/api/1.2/patches/170188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127143154.6FA693857735@sourceware.org/","msgid":"<20231127143154.6FA693857735@sourceware.org>","list_archive_url":null,"date":"2023-11-27T14:31:22","name":"tree-optimization/112653 - PTA and return","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127143154.6FA693857735@sourceware.org/mbox/"},{"id":170208,"url":"https://patchwork.plctlab.org/api/1.2/patches/170208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzb6pc.fsf@oracle.com/","msgid":"<87msuzb6pc.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-27T14:40:15","name":"bpf: Throw error when external libcalls are generated.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzb6pc.fsf@oracle.com/mbox/"},{"id":170210,"url":"https://patchwork.plctlab.org/api/1.2/patches/170210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttp7w8zx.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T14:45:06","name":"[pushed] aarch64: Move and generalise vect_all_same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttp7w8zx.fsf@arm.com/mbox/"},{"id":170211,"url":"https://patchwork.plctlab.org/api/1.2/patches/170211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7ffw8yv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T14:45:44","name":"[pushed] aarch64: Remove redundant zeroing/merging in SVE intrinsics [PR106326]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpto7ffw8yv.fsf@arm.com/mbox/"},{"id":170212,"url":"https://patchwork.plctlab.org/api/1.2/patches/170212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzs14u.fsf@euler.schwinge.homeip.net/","msgid":"<87msuzs14u.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-27T14:48:33","name":"hurd: Add multilib paths for gnu-x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87msuzs14u.fsf@euler.schwinge.homeip.net/mbox/"},{"id":170217,"url":"https://patchwork.plctlab.org/api/1.2/patches/170217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3s0z1.fsf@euler.schwinge.homeip.net/","msgid":"<87jzq3s0z1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-27T14:52:02","name":"hurd: Ad default-pie and static-pie support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3s0z1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":170344,"url":"https://patchwork.plctlab.org/api/1.2/patches/170344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3az8b.fsf@oracle.com/","msgid":"<87jzq3az8b.fsf@oracle.com>","list_archive_url":null,"date":"2023-11-27T17:21:40","name":"[v2] Fixed problem with BTF defining smaller enums.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87jzq3az8b.fsf@oracle.com/mbox/"},{"id":170348,"url":"https://patchwork.plctlab.org/api/1.2/patches/170348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com/","msgid":"<4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com>","list_archive_url":null,"date":"2023-11-27T17:35:22","name":"[v2] Fortran: fix reallocation on assignment of polymorphic variables [PR110415]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4733a0ea-1a3e-4cf3-8b1e-3e1efac91dd0@codesourcery.com/mbox/"},{"id":170352,"url":"https://patchwork.plctlab.org/api/1.2/patches/170352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127180209.548531-1-rearnsha@arm.com/","msgid":"<20231127180209.548531-1-rearnsha@arm.com>","list_archive_url":null,"date":"2023-11-27T18:02:09","name":"[committed] arm: libgcc: tweak warning from __sync_synchronize","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127180209.548531-1-rearnsha@arm.com/mbox/"},{"id":170357,"url":"https://patchwork.plctlab.org/api/1.2/patches/170357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-11-27T18:16:17","name":"tree-sra: Avoid returns of references to SRA candidates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6564dd10.050a0220.5a111.9cebSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":170486,"url":"https://patchwork.plctlab.org/api/1.2/patches/170486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18033-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T22:40:37","name":"middle-end: prevent LIM from hoising vector compares from gconds if target does not support it.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18033-tamar@arm.com/mbox/"},{"id":170487,"url":"https://patchwork.plctlab.org/api/1.2/patches/170487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18034-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-27T22:40:58","name":"middle-end: refactor vectorizable_live_operation into helper method for codegen","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18034-tamar@arm.com/mbox/"},{"id":170495,"url":"https://patchwork.plctlab.org/api/1.2/patches/170495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127225818.613815-1-quic_apinski@quicinc.com/","msgid":"<20231127225818.613815-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T22:58:18","name":"[COMMITTED] Fix time-profiler-3.c after r14-5628-g53ba8d669550d3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127225818.613815-1-quic_apinski@quicinc.com/mbox/"},{"id":170496,"url":"https://patchwork.plctlab.org/api/1.2/patches/170496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127230845.615689-1-quic_apinski@quicinc.com/","msgid":"<20231127230845.615689-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-27T23:08:45","name":"aarch64: Improve cost of `a ? {-,}1 : b`","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231127230845.615689-1-quic_apinski@quicinc.com/mbox/"},{"id":170509,"url":"https://patchwork.plctlab.org/api/1.2/patches/170509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWUreYSYOpXs0jze@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-27T23:51:21","name":"fold-mem-offsets: Fix powerpc64le-linux profiledbootstrap [PR111601]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWUreYSYOpXs0jze@tucnak/mbox/"},{"id":170521,"url":"https://patchwork.plctlab.org/api/1.2/patches/170521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128023227.36200-1-gaofei@eswincomputing.com/","msgid":"<20231128023227.36200-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T02:32:24","name":"[1/4,RISC-V] prefer Zicond primitive semantics to SFB","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128023227.36200-1-gaofei@eswincomputing.com/mbox/"},{"id":170522,"url":"https://patchwork.plctlab.org/api/1.2/patches/170522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128025527.36740-1-wangfeng@eswincomputing.com/","msgid":"<20231128025527.36740-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T02:55:27","name":"[v2] gimple-match.pd Add more optimization for gimple_cond","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128025527.36740-1-wangfeng@eswincomputing.com/mbox/"},{"id":170530,"url":"https://patchwork.plctlab.org/api/1.2/patches/170530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128044326.734466-1-quic_apinski@quicinc.com/","msgid":"<20231128044326.734466-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-11-28T04:43:26","name":"MATCH: Fix invalid signed boolean type usage","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128044326.734466-1-quic_apinski@quicinc.com/mbox/"},{"id":170574,"url":"https://patchwork.plctlab.org/api/1.2/patches/170574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073837.2451935-1-liwei@loongson.cn/","msgid":"<20231128073837.2451935-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:38:37","name":"[v1,1/2] LoongArch: Accelerate optimization of scalar signed/unsigned popcount.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073837.2451935-1-liwei@loongson.cn/mbox/"},{"id":170575,"url":"https://patchwork.plctlab.org/api/1.2/patches/170575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073900.2452086-1-liwei@loongson.cn/","msgid":"<20231128073900.2452086-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:39:00","name":"[v1,2/2] LoongArch: Optimize vector constant extract-{even/odd} permutation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128073900.2452086-1-liwei@loongson.cn/mbox/"},{"id":170576,"url":"https://patchwork.plctlab.org/api/1.2/patches/170576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/deee9182-fe94-42a3-b53a-6336f6b1bec3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-11-28T07:43:21","name":"Expand: Pass down equality only flag to cmpmem expand","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/deee9182-fe94-42a3-b53a-6336f6b1bec3@linux.ibm.com/mbox/"},{"id":170579,"url":"https://patchwork.plctlab.org/api/1.2/patches/170579/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075212.3526692-1-hongtao.liu@intel.com/","msgid":"<20231128075212.3526692-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-11-28T07:52:12","name":"Take register pressure into account for vec_construct when the components are not loaded from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075212.3526692-1-hongtao.liu@intel.com/mbox/"},{"id":170580,"url":"https://patchwork.plctlab.org/api/1.2/patches/170580/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075424.18703-1-chenxiaolong@loongson.cn/","msgid":"<20231128075424.18703-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:54:24","name":"[v1] LoongArch: Added vectorized hardware inspection for testsuite.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075424.18703-1-chenxiaolong@loongson.cn/mbox/"},{"id":170582,"url":"https://patchwork.plctlab.org/api/1.2/patches/170582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075635.2484351-1-liwei@loongson.cn/","msgid":"<20231128075635.2484351-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-11-28T07:56:35","name":"[v1] LoongArch: Remove duplicate definition of CLZ_DEFINED_VALUE_AT_ZERO.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128075635.2484351-1-liwei@loongson.cn/mbox/"},{"id":170584,"url":"https://patchwork.plctlab.org/api/1.2/patches/170584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128080033.1105900-1-juzhe.zhong@rivai.ai/","msgid":"<20231128080033.1105900-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-28T08:00:33","name":"RISC-V: Disallow poly (1,1) VLA SLP interleave vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128080033.1105900-1-juzhe.zhong@rivai.ai/mbox/"},{"id":170600,"url":"https://patchwork.plctlab.org/api/1.2/patches/170600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWjN0dxBKkIod2F@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:22:15","name":"c++: Fix up __has_extension (cxx_init_captures)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWjN0dxBKkIod2F@tucnak/mbox/"},{"id":170602,"url":"https://patchwork.plctlab.org/api/1.2/patches/170602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128082716.1437220-1-dmalcolm@redhat.com/","msgid":"<20231128082716.1437220-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-11-28T08:27:15","name":"[pushed] analyzer: install header files for use by plugins [PR109077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128082716.1437220-1-dmalcolm@redhat.com/mbox/"},{"id":170605,"url":"https://patchwork.plctlab.org/api/1.2/patches/170605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWk9ObmRt5RlIuV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:29:40","name":"match.pd: Fix popcount (X) + popcount (Y) simplification [PR112719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWk9ObmRt5RlIuV@tucnak/mbox/"},{"id":170618,"url":"https://patchwork.plctlab.org/api/1.2/patches/170618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWmdfKznvpqZ2Ua@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:36:05","name":"match.pd: Fix parity (X) ^ parity (Y) simplification [PR112719]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWmdfKznvpqZ2Ua@tucnak/mbox/"},{"id":170637,"url":"https://patchwork.plctlab.org/api/1.2/patches/170637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWrgW9blojZXhV1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-11-28T08:57:37","name":"testsuite: Fix up pr111754.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWWrgW9blojZXhV1@tucnak/mbox/"},{"id":170643,"url":"https://patchwork.plctlab.org/api/1.2/patches/170643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093809.2970405-1-poulhies@adacore.com/","msgid":"<20231128093809.2970405-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:09","name":"[COMMITTED] ada: Fix predicate failure that occurred in a test case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093809.2970405-1-poulhies@adacore.com/mbox/"},{"id":170644,"url":"https://patchwork.plctlab.org/api/1.2/patches/170644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093829.2970640-1-poulhies@adacore.com/","msgid":"<20231128093829.2970640-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:29","name":"[COMMITTED] ada: Remove dependency on System.Val_Bool in System.Img_Bool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093829.2970640-1-poulhies@adacore.com/mbox/"},{"id":170646,"url":"https://patchwork.plctlab.org/api/1.2/patches/170646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093842.2970706-1-poulhies@adacore.com/","msgid":"<20231128093842.2970706-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:42","name":"[COMMITTED] ada: Handle unchecked conversion in bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093842.2970706-1-poulhies@adacore.com/mbox/"},{"id":170648,"url":"https://patchwork.plctlab.org/api/1.2/patches/170648/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093851.2970777-1-poulhies@adacore.com/","msgid":"<20231128093851.2970777-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:38:51","name":"[COMMITTED] ada: Fix internal error on declare expression in expression function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093851.2970777-1-poulhies@adacore.com/mbox/"},{"id":170647,"url":"https://patchwork.plctlab.org/api/1.2/patches/170647/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093900.2970843-1-poulhies@adacore.com/","msgid":"<20231128093900.2970843-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:00","name":"[COMMITTED] ada: Type error on container aggregate with loop_parameter_specification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093900.2970843-1-poulhies@adacore.com/mbox/"},{"id":170649,"url":"https://patchwork.plctlab.org/api/1.2/patches/170649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093912.2970916-1-poulhies@adacore.com/","msgid":"<20231128093912.2970916-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:12","name":"[COMMITTED] ada: Add new predicate Is_Address_Compatible_Type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093912.2970916-1-poulhies@adacore.com/mbox/"},{"id":170650,"url":"https://patchwork.plctlab.org/api/1.2/patches/170650/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093921.2970982-1-poulhies@adacore.com/","msgid":"<20231128093921.2970982-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:21","name":"[COMMITTED] ada: Fix premature finalization for nested return within extended one","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093921.2970982-1-poulhies@adacore.com/mbox/"},{"id":170653,"url":"https://patchwork.plctlab.org/api/1.2/patches/170653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093931.2971051-1-poulhies@adacore.com/","msgid":"<20231128093931.2971051-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:31","name":"[COMMITTED] ada: Fix incorrect quoting in documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093931.2971051-1-poulhies@adacore.com/mbox/"},{"id":170652,"url":"https://patchwork.plctlab.org/api/1.2/patches/170652/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093940.2971116-1-poulhies@adacore.com/","msgid":"<20231128093940.2971116-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:40","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093940.2971116-1-poulhies@adacore.com/mbox/"},{"id":170656,"url":"https://patchwork.plctlab.org/api/1.2/patches/170656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093950.2971184-1-poulhies@adacore.com/","msgid":"<20231128093950.2971184-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:50","name":"[COMMITTED] ada: False alarms from -gnatw.t with generic functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093950.2971184-1-poulhies@adacore.com/mbox/"},{"id":170654,"url":"https://patchwork.plctlab.org/api/1.2/patches/170654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093959.2971252-1-poulhies@adacore.com/","msgid":"<20231128093959.2971252-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:39:59","name":"[COMMITTED] ada: Errors on instance of Multiway_Trees with discriminated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128093959.2971252-1-poulhies@adacore.com/mbox/"},{"id":170655,"url":"https://patchwork.plctlab.org/api/1.2/patches/170655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128094008.2971318-1-poulhies@adacore.com/","msgid":"<20231128094008.2971318-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-28T09:40:08","name":"[COMMITTED] ada: Error compiling reduction expression with overloaded reducer subprogram","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128094008.2971318-1-poulhies@adacore.com/mbox/"},{"id":170670,"url":"https://patchwork.plctlab.org/api/1.2/patches/170670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128101047.12989-1-gaofei@eswincomputing.com/","msgid":"<20231128101047.12989-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-11-28T10:10:47","name":"[ifcvt,V2] optimize x=c ? (y and z) : y, where z is a reg or imm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231128101047.12989-1-gaofei@eswincomputing.com/mbox/"},{"id":170735,"url":"https://patchwork.plctlab.org/api/1.2/patches/170735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e15951ed-3430-46bf-9a5f-2d57c16452d0@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-11-28T11:28:05","name":"OpenMP: Support acquires/release in '\''omp require atomic_default_mem_order'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e15951ed-3430-46bf-9a5f-2d57c16452d0@codesourcery.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-11/mbox/"},{"id":46,"url":"https://patchwork.plctlab.org/api/1.2/bundles/46/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2023-12","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":172177,"url":"https://patchwork.plctlab.org/api/1.2/patches/172177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129114905.3057404-1-christoph.muellner@vrull.eu/","msgid":"<20231129114905.3057404-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-11-29T11:49:05","name":"[RFC] RISC-V: Remove f{r,s}flags builtins","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129114905.3057404-1-christoph.muellner@vrull.eu/mbox/"},{"id":171653,"url":"https://patchwork.plctlab.org/api/1.2/patches/171653/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129231446.204221-1-juzhe.zhong@rivai.ai/","msgid":"<20231129231446.204221-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-29T23:14:46","name":"[Committed] RISC-V: Rename vconstraint into group_overlap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231129231446.204221-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171654,"url":"https://patchwork.plctlab.org/api/1.2/patches/171654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org/","msgid":"<4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org>","list_archive_url":null,"date":"2023-11-29T23:46:07","name":": gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b4e73fc-5f38-4c65-b055-3ee57927cb0a@jguk.org/mbox/"},{"id":171655,"url":"https://patchwork.plctlab.org/api/1.2/patches/171655/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130000547.GA62552@ldh-imac.local/","msgid":"<20231130000547.GA62552@ldh-imac.local>","list_archive_url":null,"date":"2023-11-30T00:05:47","name":"ping: [PATCH] diagnostics: Fix behavior of permerror options after diagnostic pop [PR111918]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130000547.GA62552@ldh-imac.local/mbox/"},{"id":171704,"url":"https://patchwork.plctlab.org/api/1.2/patches/171704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130023842.2332222-1-juzhe.zhong@rivai.ai/","msgid":"<20231130023842.2332222-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T02:38:42","name":"[Committed] RISC-V: Support highpart overlap for floating-point widen instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130023842.2332222-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171718,"url":"https://patchwork.plctlab.org/api/1.2/patches/171718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc7b70fa3497664a58b3c0b36fa94f9ec87d4f22.1701312907.git.research_trasio@irq.a4lg.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T02:55:44","name":"[committed,(pre-approved)] RISC-V: Fix '\''E'\'' extension version to test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fc7b70fa3497664a58b3c0b36fa94f9ec87d4f22.1701312907.git.research_trasio@irq.a4lg.com/mbox/"},{"id":171722,"url":"https://patchwork.plctlab.org/api/1.2/patches/171722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130032206.17968-1-chenglulu@loongson.cn/","msgid":"<20231130032206.17968-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-11-30T03:22:06","name":"[v2] LoongArch: Add intrinsic function descriptions for LSX and LASX instructions to doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130032206.17968-1-chenglulu@loongson.cn/mbox/"},{"id":171734,"url":"https://patchwork.plctlab.org/api/1.2/patches/171734/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130050027.700656-1-jason@redhat.com/","msgid":"<20231130050027.700656-1-jason@redhat.com>","list_archive_url":null,"date":"2023-11-30T05:00:27","name":"[pushed] c++: remove LAMBDA_EXPR_MUTABLE_P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130050027.700656-1-jason@redhat.com/mbox/"},{"id":171742,"url":"https://patchwork.plctlab.org/api/1.2/patches/171742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130061652.1382-1-wangfeng@eswincomputing.com/","msgid":"<20231130061652.1382-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-11-30T06:16:52","name":"RISC-V: Update crypto vector ISA info with latest spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130061652.1382-1-wangfeng@eswincomputing.com/mbox/"},{"id":171748,"url":"https://patchwork.plctlab.org/api/1.2/patches/171748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130064905.2716758-1-juzhe.zhong@rivai.ai/","msgid":"<20231130064905.2716758-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T06:49:05","name":"RISC-V: Support widening register overlap for vf4/vf8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130064905.2716758-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171750,"url":"https://patchwork.plctlab.org/api/1.2/patches/171750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130072105.2462309-1-pan2.li@intel.com/","msgid":"<20231130072105.2462309-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-11-30T07:21:05","name":"[v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130072105.2462309-1-pan2.li@intel.com/mbox/"},{"id":171762,"url":"https://patchwork.plctlab.org/api/1.2/patches/171762/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qc71xqw.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-11-30T07:55:19","name":"hardcfr: libgcc sym versioning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or1qc71xqw.fsf@lxoliva.fsfla.org/mbox/"},{"id":171771,"url":"https://patchwork.plctlab.org/api/1.2/patches/171771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240A5E3CCDD06E80624CE9BE882A@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T08:27:33","name":"aarch64: modify Ampere CPU tunings on reassociation/FMA","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240A5E3CCDD06E80624CE9BE882A@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":171792,"url":"https://patchwork.plctlab.org/api/1.2/patches/171792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130094623.14211-1-xry111@xry111.site/","msgid":"<20231130094623.14211-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-30T09:46:18","name":"doc: Update the status of build directory not fully separated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130094623.14211-1-xry111@xry111.site/mbox/"},{"id":171798,"url":"https://patchwork.plctlab.org/api/1.2/patches/171798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101545.3206213-1-christophe.lyon@linaro.org/","msgid":"<20231130101545.3206213-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-11-30T10:15:45","name":"testsuite/arm: Fix bfloat16_vector_typecheck_[12].c tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101545.3206213-1-christophe.lyon@linaro.org/mbox/"},{"id":171799,"url":"https://patchwork.plctlab.org/api/1.2/patches/171799/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101848.3093719-1-poulhies@adacore.com/","msgid":"<20231130101848.3093719-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:18:47","name":"[COMMITTED] ada: Constant_Indexing used when context requires a variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101848.3093719-1-poulhies@adacore.com/mbox/"},{"id":171800,"url":"https://patchwork.plctlab.org/api/1.2/patches/171800/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101900.3093876-1-poulhies@adacore.com/","msgid":"<20231130101900.3093876-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:00","name":"[COMMITTED] ada: Fix wrong finalization for qualified aggregate of limited type in allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101900.3093876-1-poulhies@adacore.com/mbox/"},{"id":171801,"url":"https://patchwork.plctlab.org/api/1.2/patches/171801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101902.3093945-1-poulhies@adacore.com/","msgid":"<20231130101902.3093945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:02","name":"[COMMITTED] ada: Fix predicate check failure in Expand_Allocator_Expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101902.3093945-1-poulhies@adacore.com/mbox/"},{"id":171805,"url":"https://patchwork.plctlab.org/api/1.2/patches/171805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101904.3094006-1-poulhies@adacore.com/","msgid":"<20231130101904.3094006-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:03","name":"[COMMITTED] ada: Too-strict conformance checking for formal discriminated type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101904.3094006-1-poulhies@adacore.com/mbox/"},{"id":171802,"url":"https://patchwork.plctlab.org/api/1.2/patches/171802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101905.3094070-1-poulhies@adacore.com/","msgid":"<20231130101905.3094070-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:05","name":"[COMMITTED] ada: Add comment describing Partition_Elaboration_Policy dependency.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101905.3094070-1-poulhies@adacore.com/mbox/"},{"id":171806,"url":"https://patchwork.plctlab.org/api/1.2/patches/171806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101909.3094195-1-poulhies@adacore.com/","msgid":"<20231130101909.3094195-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:09","name":"[COMMITTED] ada: Crash initializing component of private record type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101909.3094195-1-poulhies@adacore.com/mbox/"},{"id":171814,"url":"https://patchwork.plctlab.org/api/1.2/patches/171814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101910.3094256-1-poulhies@adacore.com/","msgid":"<20231130101910.3094256-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:10","name":"[COMMITTED] ada: Fix spelling of functions with(out) \"side effects\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101910.3094256-1-poulhies@adacore.com/mbox/"},{"id":171815,"url":"https://patchwork.plctlab.org/api/1.2/patches/171815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101912.3094317-1-poulhies@adacore.com/","msgid":"<20231130101912.3094317-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:12","name":"[COMMITTED] ada: Ignore defered compile time errors without backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101912.3094317-1-poulhies@adacore.com/mbox/"},{"id":171811,"url":"https://patchwork.plctlab.org/api/1.2/patches/171811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101914.3094378-1-poulhies@adacore.com/","msgid":"<20231130101914.3094378-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:14","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101914.3094378-1-poulhies@adacore.com/mbox/"},{"id":171819,"url":"https://patchwork.plctlab.org/api/1.2/patches/171819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101916.3094439-1-poulhies@adacore.com/","msgid":"<20231130101916.3094439-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:16","name":"[COMMITTED] ada: Remove SPARK legality checks","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101916.3094439-1-poulhies@adacore.com/mbox/"},{"id":171816,"url":"https://patchwork.plctlab.org/api/1.2/patches/171816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101918.3094500-1-poulhies@adacore.com/","msgid":"<20231130101918.3094500-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:17","name":"[COMMITTED] ada: Support Put_Image for types in user-defined instances of predefined generics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101918.3094500-1-poulhies@adacore.com/mbox/"},{"id":171817,"url":"https://patchwork.plctlab.org/api/1.2/patches/171817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101919.3094562-1-poulhies@adacore.com/","msgid":"<20231130101919.3094562-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-11-30T10:19:19","name":"[COMMITTED] ada: Rework fix for wrong finalization of qualified aggregate in allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130101919.3094562-1-poulhies@adacore.com/mbox/"},{"id":171820,"url":"https://patchwork.plctlab.org/api/1.2/patches/171820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130102014.3198938-1-juzhe.zhong@rivai.ai/","msgid":"<20231130102014.3198938-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-11-30T10:20:14","name":"RISC-V: Remove earlyclobber for wx/wf instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130102014.3198938-1-juzhe.zhong@rivai.ai/mbox/"},{"id":171884,"url":"https://patchwork.plctlab.org/api/1.2/patches/171884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130134205.12445-1-xry111@xry111.site/","msgid":"<20231130134205.12445-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-11-30T13:41:07","name":"[v2] doc: Update the status of build directory not fully separated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130134205.12445-1-xry111@xry111.site/mbox/"},{"id":171927,"url":"https://patchwork.plctlab.org/api/1.2/patches/171927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt34wne3hn.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:10:28","name":"Ping: [PATCH] Add a late-combine pass [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt34wne3hn.fsf@arm.com/mbox/"},{"id":171928,"url":"https://patchwork.plctlab.org/api/1.2/patches/171928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmtzcous.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:11:55","name":"Ping: [PATCH] Allow target attributes in non-gnu namespaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmtzcous.fsf@arm.com/mbox/"},{"id":171943,"url":"https://patchwork.plctlab.org/api/1.2/patches/171943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWihkd4+/v4UmLkD@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-11-30T14:52:01","name":"[wwwdocs] gcc-14/changes.html: Update C++ news for GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWihkd4+/v4UmLkD@redhat.com/mbox/"},{"id":171944,"url":"https://patchwork.plctlab.org/api/1.2/patches/171944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qv5lwl.fsf@euler.schwinge.homeip.net/","msgid":"<87a5qv5lwl.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-30T14:57:30","name":"In '\''libgomp.c/declare-variant-{3,4}-*.c'\'', restrict '\''scan-offload-tree-dump'\''s to '\''only_for_offload_target [...]'\'' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qv5lwl.fsf@euler.schwinge.homeip.net/mbox/"},{"id":171949,"url":"https://patchwork.plctlab.org/api/1.2/patches/171949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/877clz5lta.fsf@euler.schwinge.homeip.net/","msgid":"<877clz5lta.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-11-30T14:59:29","name":"Spin '\''dg-do run'\'' part of '\''libgomp.c/declare-variant-3-sm30.c'\'' off into new '\''libgomp.c/declare-variant-3.c'\'' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/877clz5lta.fsf@euler.schwinge.homeip.net/mbox/"},{"id":171952,"url":"https://patchwork.plctlab.org/api/1.2/patches/171952/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com/","msgid":"<8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com>","list_archive_url":null,"date":"2023-11-30T15:15:04","name":"Fix '\''libgomp.c/declare-variant-4-*.c'\'', add '\''libgomp.c/declare-variant-4.c'\'' (was: [PATCH] amdgcn: Support AMD-specific '\''isa'\'' traits in OpenMP context selectors)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8734wn2ryf.fsf@dem-tschwing-1.ger.mentorg.com/mbox/"},{"id":171965,"url":"https://patchwork.plctlab.org/api/1.2/patches/171965/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154547.17694-1-jchrist@linux.ibm.com/","msgid":"<20231130154547.17694-1-jchrist@linux.ibm.com>","list_archive_url":null,"date":"2023-11-30T15:45:47","name":"s390x: Fix PR112753","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154547.17694-1-jchrist@linux.ibm.com/mbox/"},{"id":172016,"url":"https://patchwork.plctlab.org/api/1.2/patches/172016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154744.74164-1-jwakely@redhat.com/","msgid":"<20231130154744.74164-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:47:24","name":"[committed] libstdc++: Fix std::ranges::to errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130154744.74164-1-jwakely@redhat.com/mbox/"},{"id":171966,"url":"https://patchwork.plctlab.org/api/1.2/patches/171966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155041.74365-1-jwakely@redhat.com/","msgid":"<20231130155041.74365-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:49:59","name":"libstdc++: Implement LGW 4016 for std::ranges::to","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155041.74365-1-jwakely@redhat.com/mbox/"},{"id":172003,"url":"https://patchwork.plctlab.org/api/1.2/patches/172003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155155.74430-1-jwakely@redhat.com/","msgid":"<20231130155155.74430-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-11-30T15:50:50","name":"libstdc++: Add workaround to std::ranges::subrange [PR111948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130155155.74430-1-jwakely@redhat.com/mbox/"},{"id":171990,"url":"https://patchwork.plctlab.org/api/1.2/patches/171990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130162054.89738-1-sebastian.huber@embedded-brains.de/","msgid":"<20231130162054.89738-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-11-30T16:20:54","name":"gcov: Fix __LIBGCC_HAVE_LIBATOMIC definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130162054.89738-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":172081,"url":"https://patchwork.plctlab.org/api/1.2/patches/172081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org/","msgid":"<5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org>","list_archive_url":null,"date":"2023-11-30T17:59:56","name":"htdocs/git.html: correct spelling and use git in example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5a5c0c9c-728c-4427-8adc-620599a60a50@jguk.org/mbox/"},{"id":172118,"url":"https://patchwork.plctlab.org/api/1.2/patches/172118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130192252.3123291-1-ppalka@redhat.com/","msgid":"<20231130192252.3123291-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-11-30T19:22:52","name":"libstdc++: Simplify ranges::to closure objects","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130192252.3123291-1-ppalka@redhat.com/mbox/"},{"id":172160,"url":"https://patchwork.plctlab.org/api/1.2/patches/172160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130213149.25254-1-manos.anagnostakis@vrull.eu/","msgid":"<20231130213149.25254-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-11-30T21:31:49","name":"[v3] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130213149.25254-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":172145,"url":"https://patchwork.plctlab.org/api/1.2/patches/172145/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221727.3044519-1-indu.bhagat@oracle.com/","msgid":"<20231130221727.3044519-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-11-30T22:17:27","name":"btf: fix PR debug/112768","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221727.3044519-1-indu.bhagat@oracle.com/mbox/"},{"id":172147,"url":"https://patchwork.plctlab.org/api/1.2/patches/172147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221818.3044556-1-indu.bhagat@oracle.com/","msgid":"<20231130221818.3044556-1-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-11-30T22:18:18","name":"btf: fix PR debug/112656","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231130221818.3044556-1-indu.bhagat@oracle.com/mbox/"},{"id":172146,"url":"https://patchwork.plctlab.org/api/1.2/patches/172146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com/","msgid":"<2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com>","list_archive_url":null,"date":"2023-11-30T22:22:35","name":"RISC-V: Vectorized str(n)cmp and strlen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2cf2fa3f-541b-4c39-8689-161c7a047f7a@gmail.com/mbox/"},{"id":172194,"url":"https://patchwork.plctlab.org/api/1.2/patches/172194/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201005110.2689714-1-juzhe.zhong@rivai.ai/","msgid":"<20231201005110.2689714-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T00:51:10","name":"RISC-V: Fix VSETVL PASS regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201005110.2689714-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172217,"url":"https://patchwork.plctlab.org/api/1.2/patches/172217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201022100.955917-2-haochen.jiang@intel.com/","msgid":"<20231201022100.955917-2-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-01T02:21:00","name":"i386: Mark Xeon Phi ISAs as deprecated","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201022100.955917-2-haochen.jiang@intel.com/mbox/"},{"id":172220,"url":"https://patchwork.plctlab.org/api/1.2/patches/172220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201023850.1118763-1-hongtao.liu@intel.com/","msgid":"<20231201023850.1118763-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-01T02:38:50","name":"Take register pressure into account for vec_construct/scalar_to_vec when the components are not loaded from memory.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201023850.1118763-1-hongtao.liu@intel.com/mbox/"},{"id":172222,"url":"https://patchwork.plctlab.org/api/1.2/patches/172222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com/","msgid":"<770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com>","list_archive_url":null,"date":"2023-12-01T02:41:43","name":"[patch-1,rs6000] enable fctiw on old archs [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/770bdc23-24cc-4699-af13-38eab3f32b80@linux.ibm.com/mbox/"},{"id":172221,"url":"https://patchwork.plctlab.org/api/1.2/patches/172221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com/","msgid":"<85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com>","list_archive_url":null,"date":"2023-12-01T02:42:03","name":"[patch-2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85055699-d7d4-4bfb-90e1-3fdcc82b714a@linux.ibm.com/mbox/"},{"id":172235,"url":"https://patchwork.plctlab.org/api/1.2/patches/172235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201035003.857697-1-jason@redhat.com/","msgid":"<20231201035003.857697-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-01T03:50:03","name":"c++: lambda capture and explicit object parm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201035003.857697-1-jason@redhat.com/mbox/"},{"id":172286,"url":"https://patchwork.plctlab.org/api/1.2/patches/172286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201070027.581910-1-juzhe.zhong@rivai.ai/","msgid":"<20231201070027.581910-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T07:00:27","name":"RISC-V: Support highpart register overlap for widen vx/vf instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201070027.581910-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172301,"url":"https://patchwork.plctlab.org/api/1.2/patches/172301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmLSvbSQY8TVNnp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:29:14","name":"lower-bitint: Fix _BitInt .{ADD,SUB}_OVERFLOW lowering [PR112750]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmLSvbSQY8TVNnp@tucnak/mbox/"},{"id":172302,"url":"https://patchwork.plctlab.org/api/1.2/patches/172302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmMi5qkXwmNgBYY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:34:35","name":"lower-bitint: Fix ICE on bitint-39.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmMi5qkXwmNgBYY@tucnak/mbox/"},{"id":172304,"url":"https://patchwork.plctlab.org/api/1.2/patches/172304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-2-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:24","name":"[v2,1/3] LoongArch: Adjust D version strings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-2-yangyujie@loongson.cn/mbox/"},{"id":172306,"url":"https://patchwork.plctlab.org/api/1.2/patches/172306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-3-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:25","name":"[v2,2/3] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-3-yangyujie@loongson.cn/mbox/"},{"id":172305,"url":"https://patchwork.plctlab.org/api/1.2/patches/172305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-4-yangyujie@loongson.cn/","msgid":"<20231201074626.2943513-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T07:46:26","name":"[v2,3/3] libphobos: LoongArch hardware support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201074626.2943513-4-yangyujie@loongson.cn/mbox/"},{"id":172307,"url":"https://patchwork.plctlab.org/api/1.2/patches/172307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201075235.2345384-1-pan2.li@intel.com/","msgid":"<20231201075235.2345384-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-01T07:52:35","name":"[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201075235.2345384-1-pan2.li@intel.com/mbox/"},{"id":172308,"url":"https://patchwork.plctlab.org/api/1.2/patches/172308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmSCTzJaaBoRJjq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T07:58:01","name":"lower-bitint: Fix up maximum addition/subtraction/multiplication result computations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmSCTzJaaBoRJjq@tucnak/mbox/"},{"id":172310,"url":"https://patchwork.plctlab.org/api/1.2/patches/172310/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmTzwDzPS0bLtv9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T08:05:35","name":"lower-bitint: Fix up handle_operand_addr for 0 constants [PR112771]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmTzwDzPS0bLtv9@tucnak/mbox/"},{"id":172311,"url":"https://patchwork.plctlab.org/api/1.2/patches/172311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmU57saVAdB1wGp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T08:10:15","name":"lower-bitint: Fix lowering of middle sized _BitInt operations which can throw [PR112770]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWmU57saVAdB1wGp@tucnak/mbox/"},{"id":172312,"url":"https://patchwork.plctlab.org/api/1.2/patches/172312/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081410.1441609-1-juzhe.zhong@rivai.ai/","msgid":"<20231201081410.1441609-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T08:14:10","name":"RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081410.1441609-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172313,"url":"https://patchwork.plctlab.org/api/1.2/patches/172313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081902.33740-1-sebastian.huber@embedded-brains.de/","msgid":"<20231201081902.33740-1-sebastian.huber@embedded-brains.de>","list_archive_url":null,"date":"2023-12-01T08:19:02","name":"gcov: Fix use of __LIBGCC_HAVE_LIBATOMIC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201081902.33740-1-sebastian.huber@embedded-brains.de/mbox/"},{"id":172337,"url":"https://patchwork.plctlab.org/api/1.2/patches/172337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com/","msgid":"<004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-01T09:22:44","name":"[RISC-V] Improve style to work around PR 60994 in host compiler.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/004901da2437$f1f6b750$d5e425f0$@nextmovesoftware.com/mbox/"},{"id":172380,"url":"https://patchwork.plctlab.org/api/1.2/patches/172380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201094726.14266-1-jose.marchesi@oracle.com/","msgid":"<20231201094726.14266-1-jose.marchesi@oracle.com>","list_archive_url":null,"date":"2023-12-01T09:47:26","name":"[COMMITTED] bpf: quote section names whenever necessary in assembly output","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201094726.14266-1-jose.marchesi@oracle.com/mbox/"},{"id":172386,"url":"https://patchwork.plctlab.org/api/1.2/patches/172386/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201095524.1896396-1-mengqinggang@loongson.cn/","msgid":"<20231201095524.1896396-1-mengqinggang@loongson.cn>","list_archive_url":null,"date":"2023-12-01T09:55:24","name":"LoongArch: Add support for TLS descriptors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201095524.1896396-1-mengqinggang@loongson.cn/mbox/"},{"id":172399,"url":"https://patchwork.plctlab.org/api/1.2/patches/172399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-2-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:25","name":"[v3,1/3] LoongArch: Adjust D version strings.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-2-yangyujie@loongson.cn/mbox/"},{"id":172401,"url":"https://patchwork.plctlab.org/api/1.2/patches/172401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-3-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:26","name":"[v3,2/3] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-3-yangyujie@loongson.cn/mbox/"},{"id":172400,"url":"https://patchwork.plctlab.org/api/1.2/patches/172400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-4-yangyujie@loongson.cn/","msgid":"<20231201100827.227376-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-01T10:08:27","name":"[v3,3/3] libruntime: Add fiber context switch code for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201100827.227376-4-yangyujie@loongson.cn/mbox/"},{"id":172402,"url":"https://patchwork.plctlab.org/api/1.2/patches/172402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201101158.2774595-1-pan2.li@intel.com/","msgid":"<20231201101158.2774595-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-01T10:11:58","name":"[v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201101158.2774595-1-pan2.li@intel.com/mbox/"},{"id":172404,"url":"https://patchwork.plctlab.org/api/1.2/patches/172404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWm00S+EZNfpqn2l@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T10:26:25","name":"extend.texi: Fix up defbuiltin* with spaces in return type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWm00S+EZNfpqn2l@tucnak/mbox/"},{"id":172448,"url":"https://patchwork.plctlab.org/api/1.2/patches/172448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuuyxkj.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T11:25:00","name":"[v7] Introduce attribute sym_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuuyxkj.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":172449,"url":"https://patchwork.plctlab.org/api/1.2/patches/172449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWnDFz+FcrkpsHzE@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-01T11:27:19","name":"testsuite: Tweak some further tests for modern C changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWnDFz+FcrkpsHzE@tucnak/mbox/"},{"id":172450,"url":"https://patchwork.plctlab.org/api/1.2/patches/172450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201112739.7352F13928@imap2.dmz-prg2.suse.org/","msgid":"<20231201112739.7352F13928@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-01T11:27:38","name":"Fix ambiguity between vect_get_vec_defs with/without vectype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201112739.7352F13928@imap2.dmz-prg2.suse.org/mbox/"},{"id":172474,"url":"https://patchwork.plctlab.org/api/1.2/patches/172474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201123150.1940367-1-juzhe.zhong@rivai.ai/","msgid":"<20231201123150.1940367-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-01T12:31:50","name":"RISC-V: Fix incorrect combine of extended scalar pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201123150.1940367-1-juzhe.zhong@rivai.ai/mbox/"},{"id":172478,"url":"https://patchwork.plctlab.org/api/1.2/patches/172478/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oril5iytae.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T12:57:29","name":"hardcfr: make builtin_return tests more portable [PR112334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oril5iytae.fsf@lxoliva.fsfla.org/mbox/"},{"id":172497,"url":"https://patchwork.plctlab.org/api/1.2/patches/172497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-1-dmalcolm@redhat.com/","msgid":"<20231201135851.1841421-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-01T13:58:49","name":"[pushed] docs: remove stray reference to -fanalyzer-checker=taint [PR103533]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-1-dmalcolm@redhat.com/mbox/"},{"id":172499,"url":"https://patchwork.plctlab.org/api/1.2/patches/172499/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-2-dmalcolm@redhat.com/","msgid":"<20231201135851.1841421-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-01T13:58:50","name":"[pushed] diagnostics, analyzer: add optional per-diagnostic property bags to SARIF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201135851.1841421-2-dmalcolm@redhat.com/mbox/"},{"id":172523,"url":"https://patchwork.plctlab.org/api/1.2/patches/172523/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg6yn48.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:10:47","name":"untyped calls: enable target switching [PR112334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg6yn48.fsf@lxoliva.fsfla.org/mbox/"},{"id":172524,"url":"https://patchwork.plctlab.org/api/1.2/patches/172524/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddfs0mt0oc.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:14:27","name":"ada: Fix Ada bootstrap on macOS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddfs0mt0oc.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":172539,"url":"https://patchwork.plctlab.org/api/1.2/patches/172539/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9eef014-3fc1-45d2-88bf-6aa4bb0b2fe8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:20:30","name":"RISC-V: Fix rawmemchr implementation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d9eef014-3fc1-45d2-88bf-6aa4bb0b2fe8@gmail.com/mbox/"},{"id":172540,"url":"https://patchwork.plctlab.org/api/1.2/patches/172540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com/","msgid":"<10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com>","list_archive_url":null,"date":"2023-12-01T15:21:10","name":"RISC-V: Rename and unify stringop strategy handling [NFC].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/10a0156e-6bbb-4832-9a3c-350a99f3fa46@gmail.com/mbox/"},{"id":172541,"url":"https://patchwork.plctlab.org/api/1.2/patches/172541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com/","msgid":"<072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com>","list_archive_url":null,"date":"2023-12-01T15:21:47","name":"RISC-V: Add vectorized strlen.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/072e8569-e08b-4a22-adb5-64e888bd471b@gmail.com/mbox/"},{"id":172542,"url":"https://patchwork.plctlab.org/api/1.2/patches/172542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/da68b14f-5562-4533-b583-6469c1e0414e@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T15:23:13","name":"RISC-V: Add vectorized strcmp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/da68b14f-5562-4533-b583-6469c1e0414e@gmail.com/mbox/"},{"id":172547,"url":"https://patchwork.plctlab.org/api/1.2/patches/172547/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs0luded.fsf@euler.schwinge.homeip.net/","msgid":"<87fs0luded.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-01T15:54:18","name":"c: Turn -Wimplicit-function-declaration into a permerror: Fix '\''gcc.dg/gnu23-builtins-no-dfp-1.c'\'' (was: [PATCH v3 06/11] c: Turn -Wimplicit-function-declaration into a permerror)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87fs0luded.fsf@euler.schwinge.homeip.net/mbox/"},{"id":172603,"url":"https://patchwork.plctlab.org/api/1.2/patches/172603/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172428.C114A33E6C@hamza.pair.com/","msgid":"<20231201172428.C114A33E6C@hamza.pair.com>","list_archive_url":null,"date":"2023-12-01T17:24:26","name":"[pushed] wwwdocs: conduct: Change further creativecommons.org links to https","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172428.C114A33E6C@hamza.pair.com/mbox/"},{"id":172612,"url":"https://patchwork.plctlab.org/api/1.2/patches/172612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172837.8BA1633E4C@hamza.pair.com/","msgid":"<20231201172837.8BA1633E4C@hamza.pair.com>","list_archive_url":null,"date":"2023-12-01T17:28:34","name":"[pushed] wwwdocs: benchmarks: Remove http://annwm.lbl.gov/bench/","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201172837.8BA1633E4C@hamza.pair.com/mbox/"},{"id":172615,"url":"https://patchwork.plctlab.org/api/1.2/patches/172615/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com/","msgid":"<04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com>","list_archive_url":null,"date":"2023-12-01T18:02:21","name":"[pushed,PR112445,LRA] : Fix \"unable to find a register to spill\" error","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04553fec-4d68-108a-2b2f-e568c917e2b7@redhat.com/mbox/"},{"id":172630,"url":"https://patchwork.plctlab.org/api/1.2/patches/172630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com/","msgid":"<6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com>","list_archive_url":null,"date":"2023-12-01T19:13:53","name":"[COMMITTED] Use range_compatible_p in check_operands_p.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6899d17b-14c3-4ce4-b2bf-ed11afce1e01@redhat.com/mbox/"},{"id":172631,"url":"https://patchwork.plctlab.org/api/1.2/patches/172631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201193359.108618-1-polacek@redhat.com/","msgid":"<20231201193359.108618-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-01T19:33:59","name":"gcc: Disallow trampolines when -fhardened","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231201193359.108618-1-polacek@redhat.com/mbox/"},{"id":172686,"url":"https://patchwork.plctlab.org/api/1.2/patches/172686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWpuJTrUXSL9nSPS@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-01T23:37:09","name":"[v6] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWpuJTrUXSL9nSPS@redhat.com/mbox/"},{"id":172731,"url":"https://patchwork.plctlab.org/api/1.2/patches/172731/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202005914.3621843-1-pan2.li@intel.com/","msgid":"<20231202005914.3621843-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-02T00:59:14","name":"[v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202005914.3621843-1-pan2.li@intel.com/mbox/"},{"id":172739,"url":"https://patchwork.plctlab.org/api/1.2/patches/172739/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-2-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:23","name":"[1/3] MATCH: Fix zero_one_valued_p'\''s convert pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-2-quic_apinski@quicinc.com/mbox/"},{"id":172740,"url":"https://patchwork.plctlab.org/api/1.2/patches/172740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-3-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-3-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:24","name":"[2/3] Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-3-quic_apinski@quicinc.com/mbox/"},{"id":172741,"url":"https://patchwork.plctlab.org/api/1.2/patches/172741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-4-quic_apinski@quicinc.com/","msgid":"<20231202063725.3405094-4-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-02T06:37:25","name":"[3/3] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202063725.3405094-4-quic_apinski@quicinc.com/mbox/"},{"id":172751,"url":"https://patchwork.plctlab.org/api/1.2/patches/172751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-2-chenglulu@loongson.cn/","msgid":"<20231202081441.4799-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-02T08:14:40","name":"[v1,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-2-chenglulu@loongson.cn/mbox/"},{"id":172750,"url":"https://patchwork.plctlab.org/api/1.2/patches/172750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-3-chenglulu@loongson.cn/","msgid":"<20231202081441.4799-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-02T08:14:41","name":"[v1,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202081441.4799-3-chenglulu@loongson.cn/mbox/"},{"id":172802,"url":"https://patchwork.plctlab.org/api/1.2/patches/172802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsKeJlGr1NLWweo@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T10:44:08","name":"pro_and_epilogue: Call df_note_add_problem () if SHRINK_WRAPPING_ENABLED [PR112760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsKeJlGr1NLWweo@tucnak/mbox/"},{"id":172805,"url":"https://patchwork.plctlab.org/api/1.2/patches/172805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsMN6iX/Cp+B5qJ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T10:51:35","name":"c++: #pragma GCC unroll C++ fixes [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsMN6iX/Cp+B5qJ@tucnak/mbox/"},{"id":172806,"url":"https://patchwork.plctlab.org/api/1.2/patches/172806/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsPafxjNGE9t0M1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-02T11:05:13","name":"lower-bitint: Fix up lower_addsub_overflow [PR112807]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWsPafxjNGE9t0M1@tucnak/mbox/"},{"id":172816,"url":"https://patchwork.plctlab.org/api/1.2/patches/172816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0df7f13-58a2-42fd-9180-87d8bd6f3163@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-12-02T11:57:52","name":"htdocs/contribute.html: correct disctinct->distinct spelling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f0df7f13-58a2-42fd-9180-87d8bd6f3163@jguk.org/mbox/"},{"id":172829,"url":"https://patchwork.plctlab.org/api/1.2/patches/172829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edg4epw5.fsf@oldenburg.str.redhat.com/","msgid":"<87edg4epw5.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-12-02T12:43:22","name":"libgcov: Call __builtin_fork instead of fork","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edg4epw5.fsf@oldenburg.str.redhat.com/mbox/"},{"id":172859,"url":"https://patchwork.plctlab.org/api/1.2/patches/172859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202155249.1334525-1-arsen@aarsen.me/","msgid":"<20231202155249.1334525-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-02T15:47:56","name":"download_prerequisites: add --only-gettext","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202155249.1334525-1-arsen@aarsen.me/mbox/"},{"id":172867,"url":"https://patchwork.plctlab.org/api/1.2/patches/172867/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuswkss.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-02T17:56:03","name":"[v5] Introduce strub: machine-independent stack scrubbing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ormsuswkss.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":172875,"url":"https://patchwork.plctlab.org/api/1.2/patches/172875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202211554.2319770-1-christoph.muellner@vrull.eu/","msgid":"<20231202211554.2319770-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-02T21:15:54","name":"RISC-V: Document optimization parameter riscv-strcmp-inline-limit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231202211554.2319770-1-christoph.muellner@vrull.eu/mbox/"},{"id":172894,"url":"https://patchwork.plctlab.org/api/1.2/patches/172894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddc1341d-9c7c-46e2-a1d4-50223f31c089@jguk.org/","msgid":"","list_archive_url":null,"date":"2023-12-03T00:17:40","name":"gcc/doc: spelling mistakes and example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ddc1341d-9c7c-46e2-a1d4-50223f31c089@jguk.org/mbox/"},{"id":172897,"url":"https://patchwork.plctlab.org/api/1.2/patches/172897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-2-ams@codesourcery.com/","msgid":"<20231203003224.1638841-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:22","name":"[v3,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-2-ams@codesourcery.com/mbox/"},{"id":172896,"url":"https://patchwork.plctlab.org/api/1.2/patches/172896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-3-ams@codesourcery.com/","msgid":"<20231203003224.1638841-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:23","name":"[v3,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-3-ams@codesourcery.com/mbox/"},{"id":172898,"url":"https://patchwork.plctlab.org/api/1.2/patches/172898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-4-ams@codesourcery.com/","msgid":"<20231203003224.1638841-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-03T00:32:24","name":"[v3,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203003224.1638841-4-ams@codesourcery.com/mbox/"},{"id":172895,"url":"https://patchwork.plctlab.org/api/1.2/patches/172895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org/","msgid":"<367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org>","list_archive_url":null,"date":"2023-12-03T00:32:29","name":"wwwdocs: spelling mistakes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/367077b6-945e-4ac0-a7df-41dba3cf6f81@jguk.org/mbox/"},{"id":172904,"url":"https://patchwork.plctlab.org/api/1.2/patches/172904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca9c93a6-d9f2-4cd8-87b5-d7b0b68502c1@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:00:19","name":"[committed] Fix frv build after C99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ca9c93a6-d9f2-4cd8-87b5-d7b0b68502c1@gmail.com/mbox/"},{"id":172905,"url":"https://patchwork.plctlab.org/api/1.2/patches/172905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbb5313e-ba18-42c0-b310-9f9b41a8abbe@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:04:52","name":"[committed] Fix minor testsuite problems on H8 after C99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cbb5313e-ba18-42c0-b310-9f9b41a8abbe@gmail.com/mbox/"},{"id":172906,"url":"https://patchwork.plctlab.org/api/1.2/patches/172906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fdadd430-7724-4c18-be25-936147176a4a@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:10:16","name":"[committed] Fix rx build failure in libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fdadd430-7724-4c18-be25-936147176a4a@gmail.com/mbox/"},{"id":172907,"url":"https://patchwork.plctlab.org/api/1.2/patches/172907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com/","msgid":"<012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:14:49","name":"[committed] Fix nios2 tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/012d6223-8007-48b7-b63a-eac8e4fee869@gmail.com/mbox/"},{"id":172909,"url":"https://patchwork.plctlab.org/api/1.2/patches/172909/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com/","msgid":"<3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:25:02","name":"[committed] Fix a few arc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com/mbox/"},{"id":172911,"url":"https://patchwork.plctlab.org/api/1.2/patches/172911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c39d1bb0-a8fe-4644-ae0e-0977a430f183@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:33:57","name":"[committed] Fix comp-goto-1.c on 16 bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c39d1bb0-a8fe-4644-ae0e-0977a430f183@gmail.com/mbox/"},{"id":172912,"url":"https://patchwork.plctlab.org/api/1.2/patches/172912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d38084ec-7007-4454-9f0a-5f5f9e8dac40@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T05:41:48","name":"[committed] Fix pr65369.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d38084ec-7007-4454-9f0a-5f5f9e8dac40@gmail.com/mbox/"},{"id":172913,"url":"https://patchwork.plctlab.org/api/1.2/patches/172913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com/","msgid":"<66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:47:30","name":"[committed] Fix build of libgcc on ports using FDPIC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/66ce7b3d-607f-48b5-b3f7-562f4ec5a535@gmail.com/mbox/"},{"id":172914,"url":"https://patchwork.plctlab.org/api/1.2/patches/172914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com/","msgid":"<3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com>","list_archive_url":null,"date":"2023-12-03T05:55:58","name":"[committed] Fix gnu23-builtins-no-dfp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3dbc2b93-78fb-47b3-95a6-1efc76d78077@gmail.com/mbox/"},{"id":172926,"url":"https://patchwork.plctlab.org/api/1.2/patches/172926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7clva91r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-03T10:13:04","name":"lra: Updates of biggest mode for hard regs [PR112278]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt7clva91r.fsf@arm.com/mbox/"},{"id":172944,"url":"https://patchwork.plctlab.org/api/1.2/patches/172944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/656c78b2.170a0220.62689.59e8@mx.google.com/","msgid":"<656c78b2.170a0220.62689.59e8@mx.google.com>","list_archive_url":null,"date":"2023-12-03T12:46:36","name":"c++/modules: Prevent treating suppressed debug info as extern template [PR112820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/656c78b2.170a0220.62689.59e8@mx.google.com/mbox/"},{"id":172970,"url":"https://patchwork.plctlab.org/api/1.2/patches/172970/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzJot9+UHOofuSX@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-03T18:32:02","name":"testsuite: Fix up gcc.target/aarch64/pr112406.c for modern C [PR112406]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzJot9+UHOofuSX@tucnak/mbox/"},{"id":172971,"url":"https://patchwork.plctlab.org/api/1.2/patches/172971/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzKks5+qQ/i4t2A@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-03T18:36:02","name":"testsuite: Fix up gcc.target/s390/pr96127.c test for modern C [PR96127]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZWzKks5+qQ/i4t2A@tucnak/mbox/"},{"id":173020,"url":"https://patchwork.plctlab.org/api/1.2/patches/173020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203224741.3438009-1-juzhe.zhong@rivai.ai/","msgid":"<20231203224741.3438009-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-03T22:47:41","name":"[Committed] RISC-V: Robostify the W43, W86, W87 constraint enabled attribute","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231203224741.3438009-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173027,"url":"https://patchwork.plctlab.org/api/1.2/patches/173027/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com/","msgid":"<006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-03T23:24:12","name":"Workaround array_slice constructor portability issues (with older g++).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/006601da263f$d455aa30$7d00fe90$@nextmovesoftware.com/mbox/"},{"id":173049,"url":"https://patchwork.plctlab.org/api/1.2/patches/173049/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-2-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:04","name":"[2/7] RISC-V: Add intrinsic functions for crypto vector Zvbc extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-2-wangfeng@eswincomputing.com/mbox/"},{"id":173050,"url":"https://patchwork.plctlab.org/api/1.2/patches/173050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-3-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:05","name":"[3/7] RISC-V: Add intrinsic functions for crypto vector Zvkg extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-3-wangfeng@eswincomputing.com/mbox/"},{"id":173051,"url":"https://patchwork.plctlab.org/api/1.2/patches/173051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-4-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:06","name":"[4/7] RISC-V: Add intrinsic functions for crypto vector Zvkned extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-4-wangfeng@eswincomputing.com/mbox/"},{"id":173053,"url":"https://patchwork.plctlab.org/api/1.2/patches/173053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-5-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-5-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:07","name":"[5/7] RISC-V: Add intrinsic functions for crypto vector Zvknh[ab] extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-5-wangfeng@eswincomputing.com/mbox/"},{"id":173052,"url":"https://patchwork.plctlab.org/api/1.2/patches/173052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-6-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-6-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:08","name":"[6/7] RISC-V: Add intrinsic functions for crypto vector Zvksed extension.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-6-wangfeng@eswincomputing.com/mbox/"},{"id":173054,"url":"https://patchwork.plctlab.org/api/1.2/patches/173054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-7-wangfeng@eswincomputing.com/","msgid":"<20231204025709.3783-7-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T02:57:09","name":"[7/7] RISC-V: Add intrinsic functions for crypto vector Zvksh extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204025709.3783-7-wangfeng@eswincomputing.com/mbox/"},{"id":173067,"url":"https://patchwork.plctlab.org/api/1.2/patches/173067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204043945.367103-1-juzhe.zhong@rivai.ai/","msgid":"<20231204043945.367103-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T04:39:45","name":"RISC-V: Fix overlap group incorrect overlap on v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204043945.367103-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173068,"url":"https://patchwork.plctlab.org/api/1.2/patches/173068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204053208.908533-1-hongtao.liu@intel.com/","msgid":"<20231204053208.908533-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-04T05:32:08","name":"Don'\''t vectorize when vector stmts are only vec_contruct and stores","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204053208.908533-1-hongtao.liu@intel.com/mbox/"},{"id":173074,"url":"https://patchwork.plctlab.org/api/1.2/patches/173074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064003.80016-1-kito.cheng@sifive.com/","msgid":"<20231204064003.80016-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:03","name":"[committed] RISC-V: Refine riscv_subset_list::parse [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064003.80016-1-kito.cheng@sifive.com/mbox/"},{"id":173075,"url":"https://patchwork.plctlab.org/api/1.2/patches/173075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064010.80032-1-kito.cheng@sifive.com/","msgid":"<20231204064010.80032-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:10","name":"[committed] RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional implication [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064010.80032-1-kito.cheng@sifive.com/mbox/"},{"id":173076,"url":"https://patchwork.plctlab.org/api/1.2/patches/173076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064018.80048-1-kito.cheng@sifive.com/","msgid":"<20231204064018.80048-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T06:40:18","name":"[committed] RISC-V: Add sifive-x280 to -mcpu","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064018.80048-1-kito.cheng@sifive.com/mbox/"},{"id":173078,"url":"https://patchwork.plctlab.org/api/1.2/patches/173078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064319.30859-1-wangfeng@eswincomputing.com/","msgid":"<20231204064319.30859-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-04T06:43:19","name":"[v2] RISC-V: Update crypto vector ISA info with latest spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204064319.30859-1-wangfeng@eswincomputing.com/mbox/"},{"id":173080,"url":"https://patchwork.plctlab.org/api/1.2/patches/173080/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204070118.1092995-1-hongtao.liu@intel.com/","msgid":"<20231204070118.1092995-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-04T07:01:18","name":"Support udot_prodv*qi with emulation sdot_prodv*hi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204070118.1092995-1-hongtao.liu@intel.com/mbox/"},{"id":173090,"url":"https://patchwork.plctlab.org/api/1.2/patches/173090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2BNARKl5/NbRVg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:35:16","name":"i386: Fix up signbit2 expander [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2BNARKl5/NbRVg@tucnak/mbox/"},{"id":173091,"url":"https://patchwork.plctlab.org/api/1.2/patches/173091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2Bmkzh2VZDhtT9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:36:58","name":"extend.texi: Mark builtin arguments with @var{...}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2Bmkzh2VZDhtT9@tucnak/mbox/"},{"id":173093,"url":"https://patchwork.plctlab.org/api/1.2/patches/173093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2CrlKlvGbe8zpT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-04T07:41:34","name":"i386: Fix rtl checking ICE in ix86_elim_entry_set_got [PR112837]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW2CrlKlvGbe8zpT@tucnak/mbox/"},{"id":173096,"url":"https://patchwork.plctlab.org/api/1.2/patches/173096/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204074823.17970-1-kito.cheng@sifive.com/","msgid":"<20231204074823.17970-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-04T07:48:23","name":"RISC-V: Check if zcd conflicts with zcmt and zcmp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204074823.17970-1-kito.cheng@sifive.com/mbox/"},{"id":173123,"url":"https://patchwork.plctlab.org/api/1.2/patches/173123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204080907.444794-1-pan2.li@intel.com/","msgid":"<20231204080907.444794-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-04T08:09:07","name":"[v1] RISC-V: Add test case for bug PR112813","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204080907.444794-1-pan2.li@intel.com/mbox/"},{"id":173140,"url":"https://patchwork.plctlab.org/api/1.2/patches/173140/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204085106.400729-1-juzhe.zhong@rivai.ai/","msgid":"<20231204085106.400729-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T08:51:06","name":"RISC-V: Remove earlyclobber from widen reduction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204085106.400729-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173150,"url":"https://patchwork.plctlab.org/api/1.2/patches/173150/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093506.E9DA913588@imap2.dmz-prg2.suse.org/","msgid":"<20231204093506.E9DA913588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T09:35:06","name":"[1/2,RFC] middle-end/112830 - memcpy expansion drops address-spaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093506.E9DA913588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173153,"url":"https://patchwork.plctlab.org/api/1.2/patches/173153/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093538.661DF13588@imap2.dmz-prg2.suse.org/","msgid":"<20231204093538.661DF13588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T09:35:38","name":"[2/2] middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204093538.661DF13588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173180,"url":"https://patchwork.plctlab.org/api/1.2/patches/173180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b40da958-d5ee-817b-3e0c-30cb4bc3a091@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T09:49:17","name":"range: Workaround different type precision issue between _Float128 and long double [PR112788]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b40da958-d5ee-817b-3e0c-30cb4bc3a091@linux.ibm.com/mbox/"},{"id":173183,"url":"https://patchwork.plctlab.org/api/1.2/patches/173183/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204095500.1569673-1-christoph.muellner@vrull.eu/","msgid":"<20231204095500.1569673-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-04T09:55:00","name":"[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204095500.1569673-1-christoph.muellner@vrull.eu/mbox/"},{"id":173189,"url":"https://patchwork.plctlab.org/api/1.2/patches/173189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR0102MB348749DE7F642DFC46298CEBE186A@SN6PR0102MB3487.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:05:05","name":"tree-optimization/PR112774 - SCEV: extend the chrec tree with a nonwrapping flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR0102MB348749DE7F642DFC46298CEBE186A@SN6PR0102MB3487.prod.exchangelabs.com/mbox/"},{"id":173195,"url":"https://patchwork.plctlab.org/api/1.2/patches/173195/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101142.411128-1-juzhe.zhong@rivai.ai/","msgid":"<20231204101142.411128-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T10:11:42","name":"RISC-V: Support highest-number regno overlap for widen ternary vx instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101142.411128-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173200,"url":"https://patchwork.plctlab.org/api/1.2/patches/173200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101408.570468-1-stefansf@linux.ibm.com/","msgid":"<20231204101408.570468-1-stefansf@linux.ibm.com>","list_archive_url":null,"date":"2023-12-04T10:14:08","name":"s390: Fix expansion of vec_step","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204101408.570468-1-stefansf@linux.ibm.com/mbox/"},{"id":173209,"url":"https://patchwork.plctlab.org/api/1.2/patches/173209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddwmtus1y1.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:21:26","name":"libiberty: Fix pex_unix_wait return type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddwmtus1y1.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173216,"url":"https://patchwork.plctlab.org/api/1.2/patches/173216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf4is1p2.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:26:49","name":"gm2: Fix mc/mc.flex compilation on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddsf4is1p2.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173217,"url":"https://patchwork.plctlab.org/api/1.2/patches/173217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddleaas1e1.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:33:26","name":"ada: Fix Ada bootstrap on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddleaas1e1.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173218,"url":"https://patchwork.plctlab.org/api/1.2/patches/173218/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddh6kys0zi.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-04T10:42:09","name":"libssp: Fix gets-chk.c compilation on Solaris","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/yddh6kys0zi.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":173221,"url":"https://patchwork.plctlab.org/api/1.2/patches/173221/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com/","msgid":"<005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com>","list_archive_url":null,"date":"2023-12-04T10:55:14","name":"expmed: Perform mask extraction via QImode [PR112773].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005985aa-0ebb-4e22-b725-ffd32587d427@gmail.com/mbox/"},{"id":173235,"url":"https://patchwork.plctlab.org/api/1.2/patches/173235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204115340.CA9C813588@imap2.dmz-prg2.suse.org/","msgid":"<20231204115340.CA9C813588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T11:53:40","name":"tree-optimization/112827 - corrupt SCEV cache during SCCP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204115340.CA9C813588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173257,"url":"https://patchwork.plctlab.org/api/1.2/patches/173257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204121433.54245-1-chenxiaolong@loongson.cn/","msgid":"<20231204121433.54245-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-04T12:14:33","name":"[v1] LoongArch: Modify the check type of the vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204121433.54245-1-chenxiaolong@loongson.cn/mbox/"},{"id":173271,"url":"https://patchwork.plctlab.org/api/1.2/patches/173271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org/","msgid":"<20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T12:34:44","name":"c/86869 - preserve address-space info when building qualified ARRAY_TYPE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204123445.1FE40139E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":173302,"url":"https://patchwork.plctlab.org/api/1.2/patches/173302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/157b3c54-d18f-4908-b20b-b6726545b999@gmail.com/","msgid":"<157b3c54-d18f-4908-b20b-b6726545b999@gmail.com>","list_archive_url":null,"date":"2023-12-04T13:17:43","name":"RISC-V: Fix two testscases related to -std changes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/157b3c54-d18f-4908-b20b-b6726545b999@gmail.com/mbox/"},{"id":173303,"url":"https://patchwork.plctlab.org/api/1.2/patches/173303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleaa6r6u.fsf_-_@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T13:19:21","name":"Restore build with GCC 4.8 to GCC 5 (was Re: [PATCH] Workaround array_slice constructor portability issues (with older g++).)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptleaa6r6u.fsf_-_@arm.com/mbox/"},{"id":173320,"url":"https://patchwork.plctlab.org/api/1.2/patches/173320/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org/","msgid":"<20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T13:24:29","name":"c/89270 - honor registered_builtin_types in type_for_size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132429.AB3CA13588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173330,"url":"https://patchwork.plctlab.org/api/1.2/patches/173330/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132549.809D513588@imap2.dmz-prg2.suse.org/","msgid":"<20231204132549.809D513588@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T13:25:49","name":"tree-optimization/112818 - re-instantiate vector type size check for bswap","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204132549.809D513588@imap2.dmz-prg2.suse.org/mbox/"},{"id":173337,"url":"https://patchwork.plctlab.org/api/1.2/patches/173337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204133206.444790-1-juzhe.zhong@rivai.ai/","msgid":"<20231204133206.444790-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T13:32:06","name":"[V2] RISC-V: Support highest-number regno overlap for widen ternary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204133206.444790-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173344,"url":"https://patchwork.plctlab.org/api/1.2/patches/173344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204134456.453587-1-juzhe.zhong@rivai.ai/","msgid":"<20231204134456.453587-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-04T13:44:56","name":"[Committed,V2] RISC-V: Fix overlap group incorrect overlap on v0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204134456.453587-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173402,"url":"https://patchwork.plctlab.org/api/1.2/patches/173402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org/","msgid":"<20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-04T14:33:41","name":"middle-end/112785 - guard against last_clique overflow","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204143342.1EBC4139E2@imap2.dmz-prg2.suse.org/mbox/"},{"id":173486,"url":"https://patchwork.plctlab.org/api/1.2/patches/173486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204164231.784822-1-hawkinsw@obs.cr/","msgid":"<20231204164231.784822-1-hawkinsw@obs.cr>","list_archive_url":null,"date":"2023-12-04T16:42:31","name":"libstdc++: Add test for LWG Issue 3897","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204164231.784822-1-hawkinsw@obs.cr/mbox/"},{"id":173464,"url":"https://patchwork.plctlab.org/api/1.2/patches/173464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com/","msgid":"<2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com>","list_archive_url":null,"date":"2023-12-04T17:09:19","name":"[committed] Fix HImode load mnemonic on microblaze port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2fd89c4a-4a37-45fa-9561-54abd7fcbf8c@gmail.com/mbox/"},{"id":173490,"url":"https://patchwork.plctlab.org/api/1.2/patches/173490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204180042.12450-1-manos.anagnostakis@vrull.eu/","msgid":"<20231204180042.12450-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-04T18:00:42","name":"[v4] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204180042.12450-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":173565,"url":"https://patchwork.plctlab.org/api/1.2/patches/173565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW41P9Vh3DjB0BYE@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-04T20:23:27","name":"[v7] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW41P9Vh3DjB0BYE@redhat.com/mbox/"},{"id":173604,"url":"https://patchwork.plctlab.org/api/1.2/patches/173604/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234129.1445044-1-jason@redhat.com/","msgid":"<20231204234129.1445044-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-04T23:41:29","name":"[pushed] c++: fix constexpr noreturn diagnostic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234129.1445044-1-jason@redhat.com/mbox/"},{"id":173605,"url":"https://patchwork.plctlab.org/api/1.2/patches/173605/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234715.9773-1-david.faust@oracle.com/","msgid":"<20231204234715.9773-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-12-04T23:47:15","name":"btf: avoid wrong DATASEC entries for extern vars [PR112849]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231204234715.9773-1-david.faust@oracle.com/mbox/"},{"id":173626,"url":"https://patchwork.plctlab.org/api/1.2/patches/173626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW5yUyoZa6jJUfzU@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T00:44:03","name":"[v8] c++: implement P2564, consteval needs to propagate up [PR107687]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW5yUyoZa6jJUfzU@redhat.com/mbox/"},{"id":173627,"url":"https://patchwork.plctlab.org/api/1.2/patches/173627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205005541.38072-1-vincenzopalazzodev@gmail.com/","msgid":"<20231205005541.38072-1-vincenzopalazzodev@gmail.com>","list_archive_url":null,"date":"2023-12-05T00:55:37","name":"[RFC,1/1] nix: add a simple flake nix shell","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205005541.38072-1-vincenzopalazzodev@gmail.com/mbox/"},{"id":173688,"url":"https://patchwork.plctlab.org/api/1.2/patches/173688/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-2-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:32","name":"[01/17,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-2-hongyu.wang@intel.com/mbox/"},{"id":173685,"url":"https://patchwork.plctlab.org/api/1.2/patches/173685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-3-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:33","name":"[02/17,APX,NDD] Restrict TImode register usage when NDD enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-3-hongyu.wang@intel.com/mbox/"},{"id":173681,"url":"https://patchwork.plctlab.org/api/1.2/patches/173681/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-4-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:34","name":"[03/17,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-4-hongyu.wang@intel.com/mbox/"},{"id":173677,"url":"https://patchwork.plctlab.org/api/1.2/patches/173677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-5-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:35","name":"[04/17,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-5-hongyu.wang@intel.com/mbox/"},{"id":173690,"url":"https://patchwork.plctlab.org/api/1.2/patches/173690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-6-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:36","name":"[05/17,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-6-hongyu.wang@intel.com/mbox/"},{"id":173679,"url":"https://patchwork.plctlab.org/api/1.2/patches/173679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-7-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:37","name":"[06/17,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-7-hongyu.wang@intel.com/mbox/"},{"id":173682,"url":"https://patchwork.plctlab.org/api/1.2/patches/173682/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-9-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:39","name":"[08/17,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-9-hongyu.wang@intel.com/mbox/"},{"id":173686,"url":"https://patchwork.plctlab.org/api/1.2/patches/173686/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-10-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:40","name":"[09/17,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-10-hongyu.wang@intel.com/mbox/"},{"id":173689,"url":"https://patchwork.plctlab.org/api/1.2/patches/173689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-11-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:41","name":"[10/17,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-11-hongyu.wang@intel.com/mbox/"},{"id":173687,"url":"https://patchwork.plctlab.org/api/1.2/patches/173687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-12-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:42","name":"[11/17,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-12-hongyu.wang@intel.com/mbox/"},{"id":173695,"url":"https://patchwork.plctlab.org/api/1.2/patches/173695/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-13-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:43","name":"[12/17,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-13-hongyu.wang@intel.com/mbox/"},{"id":173706,"url":"https://patchwork.plctlab.org/api/1.2/patches/173706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-14-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:44","name":"[13/17,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-14-hongyu.wang@intel.com/mbox/"},{"id":173694,"url":"https://patchwork.plctlab.org/api/1.2/patches/173694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-15-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:45","name":"[14/17,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-15-hongyu.wang@intel.com/mbox/"},{"id":173703,"url":"https://patchwork.plctlab.org/api/1.2/patches/173703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-16-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:46","name":"[15/17,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-16-hongyu.wang@intel.com/mbox/"},{"id":173680,"url":"https://patchwork.plctlab.org/api/1.2/patches/173680/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-17-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:47","name":"[16/17,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-17-hongyu.wang@intel.com/mbox/"},{"id":173691,"url":"https://patchwork.plctlab.org/api/1.2/patches/173691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-18-hongyu.wang@intel.com/","msgid":"<20231205022948.504790-18-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-05T02:29:48","name":"[17/17,APX,NDD] Support TImode shift for NDD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205022948.504790-18-hongyu.wang@intel.com/mbox/"},{"id":173676,"url":"https://patchwork.plctlab.org/api/1.2/patches/173676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-2-chenglulu@loongson.cn/","msgid":"<20231205023019.32452-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-05T02:30:18","name":"[v2,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-2-chenglulu@loongson.cn/mbox/"},{"id":173678,"url":"https://patchwork.plctlab.org/api/1.2/patches/173678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-3-chenglulu@loongson.cn/","msgid":"<20231205023019.32452-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-05T02:30:19","name":"[v2,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205023019.32452-3-chenglulu@loongson.cn/mbox/"},{"id":173712,"url":"https://patchwork.plctlab.org/api/1.2/patches/173712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205032250.1270125-1-juzhe.zhong@rivai.ai/","msgid":"<20231205032250.1270125-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-05T03:22:50","name":"RISC-V: Add blocker for gather/scatter auto-vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205032250.1270125-1-juzhe.zhong@rivai.ai/mbox/"},{"id":173740,"url":"https://patchwork.plctlab.org/api/1.2/patches/173740/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205064435.61292-1-chenxiaolong@loongson.cn/","msgid":"<20231205064435.61292-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-05T06:44:35","name":"[v2] LoongArch: Add asm modifiers to the LSX and LASX directives in the doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205064435.61292-1-chenxiaolong@loongson.cn/mbox/"},{"id":173742,"url":"https://patchwork.plctlab.org/api/1.2/patches/173742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7JaQLM06KIRzzO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T06:55:37","name":"c++: Further #pragma GCC unroll C++ fix [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7JaQLM06KIRzzO@tucnak/mbox/"},{"id":173748,"url":"https://patchwork.plctlab.org/api/1.2/patches/173748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7KsNfUi1xWiLqA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:01:04","name":"i386: Improve code generation for vector __builtin_signbit (x.x[i]) ? -1 : 0 [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7KsNfUi1xWiLqA@tucnak/mbox/"},{"id":173751,"url":"https://patchwork.plctlab.org/api/1.2/patches/173751/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-2-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:43","name":"[v2,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-2-xujiahao@loongson.cn/mbox/"},{"id":173750,"url":"https://patchwork.plctlab.org/api/1.2/patches/173750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-3-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:44","name":"[v2,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-3-xujiahao@loongson.cn/mbox/"},{"id":173752,"url":"https://patchwork.plctlab.org/api/1.2/patches/173752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-4-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:45","name":"[v2,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-4-xujiahao@loongson.cn/mbox/"},{"id":173753,"url":"https://patchwork.plctlab.org/api/1.2/patches/173753/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-5-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-5-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:46","name":"[v2,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-5-xujiahao@loongson.cn/mbox/"},{"id":173754,"url":"https://patchwork.plctlab.org/api/1.2/patches/173754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-6-xujiahao@loongson.cn/","msgid":"<20231205070147.53352-6-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-05T07:01:47","name":"[v2,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070147.53352-6-xujiahao@loongson.cn/mbox/"},{"id":173749,"url":"https://patchwork.plctlab.org/api/1.2/patches/173749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070152.38360-1-ishitatsuyuki@gmail.com/","msgid":"<20231205070152.38360-1-ishitatsuyuki@gmail.com>","list_archive_url":null,"date":"2023-12-05T07:01:52","name":"[v4] RISC-V: Implement TLS Descriptors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205070152.38360-1-ishitatsuyuki@gmail.com/mbox/"},{"id":173756,"url":"https://patchwork.plctlab.org/api/1.2/patches/173756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Pa/CMxK3y4X/q@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:21:15","name":"lower-bitint: Make temporarily wrong IL less wrong [PR112843]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Pa/CMxK3y4X/q@tucnak/mbox/"},{"id":173758,"url":"https://patchwork.plctlab.org/api/1.2/patches/173758/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205072952.8E9B63857022@sourceware.org/","msgid":"<20231205072952.8E9B63857022@sourceware.org>","list_archive_url":null,"date":"2023-12-05T07:25:43","name":"tree-optimization/112827 - more SCEV cprop fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205072952.8E9B63857022@sourceware.org/mbox/"},{"id":173757,"url":"https://patchwork.plctlab.org/api/1.2/patches/173757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Q+r/AEiTcoPYO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:27:54","name":"i386: Fix -fcf-protection -Os ICE due to movabsq peephole2 [PR112845]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Q+r/AEiTcoPYO@tucnak/mbox/"},{"id":173767,"url":"https://patchwork.plctlab.org/api/1.2/patches/173767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7T8HZqnnI2FXJQ@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:40:32","name":"c++: Implement C++ DR 2262 - Attributes for asm-definition [PR110734]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7T8HZqnnI2FXJQ@tucnak/mbox/"},{"id":173775,"url":"https://patchwork.plctlab.org/api/1.2/patches/173775/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Wl3w5VO475hHc@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T07:51:51","name":"c++: Fix parsing [[]][[]];","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Wl3w5VO475hHc@tucnak/mbox/"},{"id":173779,"url":"https://patchwork.plctlab.org/api/1.2/patches/173779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Zs6KdXyx1k+K1@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T08:05:07","name":"lower-bitint, v2: Make temporarily wrong IL less wrong [PR112843]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW7Zs6KdXyx1k+K1@tucnak/mbox/"},{"id":173788,"url":"https://patchwork.plctlab.org/api/1.2/patches/173788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-1-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-1-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:44","name":"[1/5,V3,ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-1-gaofei@eswincomputing.com/mbox/"},{"id":173789,"url":"https://patchwork.plctlab.org/api/1.2/patches/173789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-3-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-3-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:46","name":"[3/5,ifcvt] optimize x=c ? (y AND z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-3-gaofei@eswincomputing.com/mbox/"},{"id":173790,"url":"https://patchwork.plctlab.org/api/1.2/patches/173790/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-4-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-4-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:47","name":"[4/5,ifcvt] optimize x=c ? (y op const_int) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-4-gaofei@eswincomputing.com/mbox/"},{"id":173791,"url":"https://patchwork.plctlab.org/api/1.2/patches/173791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-5-gaofei@eswincomputing.com/","msgid":"<20231205081248.2106-5-gaofei@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:12:48","name":"[5/5,ifcvt] optimize extension for x=c ? (y op z) : y by RISC-V Zicond like insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205081248.2106-5-gaofei@eswincomputing.com/mbox/"},{"id":173792,"url":"https://patchwork.plctlab.org/api/1.2/patches/173792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205082237.16713-1-xuli1@eswincomputing.com/","msgid":"<20231205082237.16713-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:22:37","name":"RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205082237.16713-1-xuli1@eswincomputing.com/mbox/"},{"id":173797,"url":"https://patchwork.plctlab.org/api/1.2/patches/173797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083139.5D23C384F9BB@sourceware.org/","msgid":"<20231205083139.5D23C384F9BB@sourceware.org>","list_archive_url":null,"date":"2023-12-05T08:27:18","name":"tree-optimization/112843 - update_stmt doing wrong things","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083139.5D23C384F9BB@sourceware.org/mbox/"},{"id":173805,"url":"https://patchwork.plctlab.org/api/1.2/patches/173805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083804.27652-1-xuli1@eswincomputing.com/","msgid":"<20231205083804.27652-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-05T08:38:04","name":"[v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205083804.27652-1-xuli1@eswincomputing.com/mbox/"},{"id":173831,"url":"https://patchwork.plctlab.org/api/1.2/patches/173831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5qp3shy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:31:37","name":"[pushed] Allow prologues and epilogues to be inserted later","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5qp3shy.fsf@arm.com/mbox/"},{"id":173832,"url":"https://patchwork.plctlab.org/api/1.2/patches/173832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qc15728.fsf@euler.schwinge.homeip.net/","msgid":"<871qc15728.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-05T09:31:43","name":"[v2] c: Turn -Wimplicit-function-declaration into a permerror: Fix '\''gcc.dg/gnu23-builtins-no-dfp-1.c'\'' (was: [committed] Fix gnu23-builtins-no-dfp)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/871qc15728.fsf@euler.schwinge.homeip.net/mbox/"},{"id":173841,"url":"https://patchwork.plctlab.org/api/1.2/patches/173841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wmtt3sam.fsf@euler.schwinge.homeip.net/","msgid":"<87wmtt3sam.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-05T09:36:01","name":"Modula-2: Support '\''-isysroot [...]'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87wmtt3sam.fsf@euler.schwinge.homeip.net/mbox/"},{"id":173842,"url":"https://patchwork.plctlab.org/api/1.2/patches/173842/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jgx3s8r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:37:08","name":"Add a target hook for sibcall epilogues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jgx3s8r.fsf@arm.com/mbox/"},{"id":173851,"url":"https://patchwork.plctlab.org/api/1.2/patches/173851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1e92da6.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:45:37","name":"Add a new target hook: TARGET_START_CALL_ARGS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpty1e92da6.fsf@arm.com/mbox/"},{"id":173862,"url":"https://patchwork.plctlab.org/api/1.2/patches/173862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4h2cuo.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T09:54:55","name":"[pushed] Allow targets to add USEs to asms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf4h2cuo.fsf@arm.com/mbox/"},{"id":173894,"url":"https://patchwork.plctlab.org/api/1.2/patches/173894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-2-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:12:59","name":"[pushed,v2,01/25] aarch64: Generalise require_immediate_lane_index","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-2-richard.sandiford@arm.com/mbox/"},{"id":173896,"url":"https://patchwork.plctlab.org/api/1.2/patches/173896/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-3-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:00","name":"[pushed,v2,02/25] aarch64: Use SVE'\''s RDVL instruction","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-3-richard.sandiford@arm.com/mbox/"},{"id":173895,"url":"https://patchwork.plctlab.org/api/1.2/patches/173895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-4-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:01","name":"[pushed,v2,03/25] aarch64: Make AARCH64_FL_SVE requirements explicit","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-4-richard.sandiford@arm.com/mbox/"},{"id":173897,"url":"https://patchwork.plctlab.org/api/1.2/patches/173897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-5-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:02","name":"[pushed,v2,04/25] aarch64: Add group suffixes to SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-5-richard.sandiford@arm.com/mbox/"},{"id":173903,"url":"https://patchwork.plctlab.org/api/1.2/patches/173903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-7-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-7-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:04","name":"[pushed,v2,06/25] aarch64: Generalise some SVE ACLE error messages","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-7-richard.sandiford@arm.com/mbox/"},{"id":173902,"url":"https://patchwork.plctlab.org/api/1.2/patches/173902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-8-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-8-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:05","name":"[pushed,v2,07/25] aarch64: Replace vague \"previous arguments\" message","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-8-richard.sandiford@arm.com/mbox/"},{"id":173899,"url":"https://patchwork.plctlab.org/api/1.2/patches/173899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-10-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-10-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:07","name":"[pushed,v2,09/25] aarch64: Tweak error message for (tuple, vector) pairs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-10-richard.sandiford@arm.com/mbox/"},{"id":173900,"url":"https://patchwork.plctlab.org/api/1.2/patches/173900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-11-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-11-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:08","name":"[pushed,v2,10/25] aarch64: Add tuple forms of svreinterpret","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-11-richard.sandiford@arm.com/mbox/"},{"id":173904,"url":"https://patchwork.plctlab.org/api/1.2/patches/173904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-12-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-12-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:09","name":"[pushed,v2,11/25] aarch64: Add arm_streaming(_compatible) attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-12-richard.sandiford@arm.com/mbox/"},{"id":173907,"url":"https://patchwork.plctlab.org/api/1.2/patches/173907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-14-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-14-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:11","name":"[pushed,v2,13/25] aarch64: Distinguish streaming-compatible AdvSIMD insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-14-richard.sandiford@arm.com/mbox/"},{"id":173912,"url":"https://patchwork.plctlab.org/api/1.2/patches/173912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-15-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-15-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:12","name":"[pushed,v2,14/25] aarch64: Mark relevant SVE instructions as non-streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-15-richard.sandiford@arm.com/mbox/"},{"id":173908,"url":"https://patchwork.plctlab.org/api/1.2/patches/173908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-16-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-16-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:13","name":"[pushed,v2,15/25] aarch64: Switch PSTATE.SM around calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-16-richard.sandiford@arm.com/mbox/"},{"id":173910,"url":"https://patchwork.plctlab.org/api/1.2/patches/173910/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-17-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-17-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:14","name":"[pushed,v2,16/25] aarch64: Add support for SME ZA attributes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-17-richard.sandiford@arm.com/mbox/"},{"id":173905,"url":"https://patchwork.plctlab.org/api/1.2/patches/173905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-18-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-18-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:15","name":"[pushed,v2,17/25] aarch64: Add a register class for w12-w15","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-18-richard.sandiford@arm.com/mbox/"},{"id":173906,"url":"https://patchwork.plctlab.org/api/1.2/patches/173906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-19-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-19-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:16","name":"[pushed,v2,18/25] aarch64: Add a VNx1TI mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-19-richard.sandiford@arm.com/mbox/"},{"id":173911,"url":"https://patchwork.plctlab.org/api/1.2/patches/173911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-20-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-20-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:17","name":"[pushed,v2,19/25] aarch64: Generalise unspec_based_function_base","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-20-richard.sandiford@arm.com/mbox/"},{"id":173915,"url":"https://patchwork.plctlab.org/api/1.2/patches/173915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-21-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-21-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:18","name":"[pushed,v2,20/25] aarch64: Generalise _m rules for SVE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-21-richard.sandiford@arm.com/mbox/"},{"id":173917,"url":"https://patchwork.plctlab.org/api/1.2/patches/173917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-22-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-22-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:19","name":"[pushed,v2,21/25] aarch64: Add support for ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-22-richard.sandiford@arm.com/mbox/"},{"id":173901,"url":"https://patchwork.plctlab.org/api/1.2/patches/173901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-23-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-23-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:20","name":"[pushed,v2,22/25] aarch64: Add support for __arm_locally_streaming","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-23-richard.sandiford@arm.com/mbox/"},{"id":173913,"url":"https://patchwork.plctlab.org/api/1.2/patches/173913/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-24-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-24-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:21","name":"[pushed,v2,23/25] aarch64: Handle PSTATE.SM across abnormal edges","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-24-richard.sandiford@arm.com/mbox/"},{"id":173914,"url":"https://patchwork.plctlab.org/api/1.2/patches/173914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-25-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-25-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:22","name":"[pushed,v2,24/25] aarch64: Enforce inlining restrictions for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-25-richard.sandiford@arm.com/mbox/"},{"id":173916,"url":"https://patchwork.plctlab.org/api/1.2/patches/173916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-26-richard.sandiford@arm.com/","msgid":"<20231205101323.1914247-26-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:13:23","name":"[pushed,v2,25/25] aarch64: Update sibcall handling for SME","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205101323.1914247-26-richard.sandiford@arm.com/mbox/"},{"id":173918,"url":"https://patchwork.plctlab.org/api/1.2/patches/173918/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-2-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-2-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:24:59","name":"[pushed,v2,1/5] aarch64: Add +sme2","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-2-richard.sandiford@arm.com/mbox/"},{"id":173920,"url":"https://patchwork.plctlab.org/api/1.2/patches/173920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-3-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-3-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:00","name":"[pushed,v2,2/5] aarch64: Add svcount_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-3-richard.sandiford@arm.com/mbox/"},{"id":173919,"url":"https://patchwork.plctlab.org/api/1.2/patches/173919/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-4-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-4-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:01","name":"[pushed,v2,3/5] aarch64: Add svboolx2_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-4-richard.sandiford@arm.com/mbox/"},{"id":173921,"url":"https://patchwork.plctlab.org/api/1.2/patches/173921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-5-richard.sandiford@arm.com/","msgid":"<20231205102503.1923331-5-richard.sandiford@arm.com>","list_archive_url":null,"date":"2023-12-05T10:25:02","name":"[pushed,v2,4/5] aarch64: Add ZT0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205102503.1923331-5-richard.sandiford@arm.com/mbox/"},{"id":173922,"url":"https://patchwork.plctlab.org/api/1.2/patches/173922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW78YWaxl9JCrqMh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:33:05","name":"libgfortran: Fix -Wincompatible-pointer-types errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW78YWaxl9JCrqMh@tucnak/mbox/"},{"id":173960,"url":"https://patchwork.plctlab.org/api/1.2/patches/173960/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8BTQWe6/1wk+Qo@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:54:05","name":"[v2,06/11] aarch64: Fix up aarch64_print_operand xzr/wzr case","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8BTQWe6/1wk+Qo@arm.com/mbox/"},{"id":173964,"url":"https://patchwork.plctlab.org/api/1.2/patches/173964/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CJOWPBqyA/uqm@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:57:40","name":"[v2,09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CJOWPBqyA/uqm@arm.com/mbox/"},{"id":173963,"url":"https://patchwork.plctlab.org/api/1.2/patches/173963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CM4RO7kxacSjh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T10:57:55","name":"driver: Fix bootstrap with --enable-default-pie","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8CM4RO7kxacSjh@tucnak/mbox/"},{"id":173980,"url":"https://patchwork.plctlab.org/api/1.2/patches/173980/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8HrtwZd4pBIjty@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T11:21:18","name":"[v2,08/11] aarch64: Generalize writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW8HrtwZd4pBIjty@arm.com/mbox/"},{"id":174017,"url":"https://patchwork.plctlab.org/api/1.2/patches/174017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-2-shihua@iscas.ac.cn/","msgid":"<20231205120312.2821765-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-05T12:03:11","name":"[1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-2-shihua@iscas.ac.cn/mbox/"},{"id":174018,"url":"https://patchwork.plctlab.org/api/1.2/patches/174018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-3-shihua@iscas.ac.cn/","msgid":"<20231205120312.2821765-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-05T12:03:12","name":"[2/2] RISC-V: Add C intrinsics of Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205120312.2821765-3-shihua@iscas.ac.cn/mbox/"},{"id":174042,"url":"https://patchwork.plctlab.org/api/1.2/patches/174042/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205125727.1805615-1-juzhe.zhong@rivai.ai/","msgid":"<20231205125727.1805615-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-05T12:57:27","name":"RISC-V: Block VLSmodes according to TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205125727.1805615-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174047,"url":"https://patchwork.plctlab.org/api/1.2/patches/174047/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131449.71AAD3857437@sourceware.org/","msgid":"<20231205131449.71AAD3857437@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:10:39","name":"tree-optimization/112856 - fix LC SSA after loop header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131449.71AAD3857437@sourceware.org/mbox/"},{"id":174048,"url":"https://patchwork.plctlab.org/api/1.2/patches/174048/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131539.8FFE73857BA7@sourceware.org/","msgid":"<20231205131539.8FFE73857BA7@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:11:27","name":"middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205131539.8FFE73857BA7@sourceware.org/mbox/"},{"id":174057,"url":"https://patchwork.plctlab.org/api/1.2/patches/174057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135854.970253858032@sourceware.org/","msgid":"<20231205135854.970253858032@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:54:45","name":"ipa/92606 - IPA ICF merging variables in different address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135854.970253858032@sourceware.org/mbox/"},{"id":174058,"url":"https://patchwork.plctlab.org/api/1.2/patches/174058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135923.72256385C6FD@sourceware.org/","msgid":"<20231205135923.72256385C6FD@sourceware.org>","list_archive_url":null,"date":"2023-12-05T13:55:05","name":"sanitizer/111736 - skip ASAN for globals in alternate address-space","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205135923.72256385C6FD@sourceware.org/mbox/"},{"id":174059,"url":"https://patchwork.plctlab.org/api/1.2/patches/174059/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com/","msgid":"<007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-05T13:59:48","name":"[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/007e01da2783$50bb6b70$f2324250$@nextmovesoftware.com/mbox/"},{"id":174063,"url":"https://patchwork.plctlab.org/api/1.2/patches/174063/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205142220.CDC273853337@sourceware.org/","msgid":"<20231205142220.CDC273853337@sourceware.org>","list_archive_url":null,"date":"2023-12-05T14:18:05","name":"middle-end/112860 - -fgimple can skip ISEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205142220.CDC273853337@sourceware.org/mbox/"},{"id":174065,"url":"https://patchwork.plctlab.org/api/1.2/patches/174065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205143016.17956-1-manos.anagnostakis@vrull.eu/","msgid":"<20231205143016.17956-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-05T14:30:16","name":"[v5] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205143016.17956-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":174073,"url":"https://patchwork.plctlab.org/api/1.2/patches/174073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205150946.3542939-1-victor.donascimento@arm.com/","msgid":"<20231205150946.3542939-1-victor.donascimento@arm.com>","list_archive_url":null,"date":"2023-12-05T15:09:41","name":"[v3] aarch64: Implement the ACLE instruction/data prefetch functions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205150946.3542939-1-victor.donascimento@arm.com/mbox/"},{"id":174075,"url":"https://patchwork.plctlab.org/api/1.2/patches/174075/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com/","msgid":"<6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com>","list_archive_url":null,"date":"2023-12-05T15:13:22","name":"RISC-V: Add vec_init expander for masks [PR112854].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6e9a07e9-7b5b-40f7-8a7f-e2abcc37e283@gmail.com/mbox/"},{"id":174077,"url":"https://patchwork.plctlab.org/api/1.2/patches/174077/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151631.3202932-1-christoph.muellner@vrull.eu/","msgid":"<20231205151631.3202932-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-05T15:16:31","name":"RISC-V: xtheadfmemidx: Disable if xtheadmemidx is not available","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151631.3202932-1-christoph.muellner@vrull.eu/mbox/"},{"id":174078,"url":"https://patchwork.plctlab.org/api/1.2/patches/174078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151644.3203029-1-christoph.muellner@vrull.eu/","msgid":"<20231205151644.3203029-1-christoph.muellner@vrull.eu>","list_archive_url":null,"date":"2023-12-05T15:16:44","name":"RISC-V: xtheadmemidx: Document inline asm issue with memory constraint","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205151644.3203029-1-christoph.muellner@vrull.eu/mbox/"},{"id":174106,"url":"https://patchwork.plctlab.org/api/1.2/patches/174106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9JwlgLTEUHgY/y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T16:03:14","name":"c++, v2: Further #pragma GCC unroll C++ fix [PR112795]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9JwlgLTEUHgY/y@tucnak/mbox/"},{"id":174112,"url":"https://patchwork.plctlab.org/api/1.2/patches/174112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205164151.27101-1-egallager@gcc.gnu.org/","msgid":"<20231205164151.27101-1-egallager@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-05T16:41:52","name":"remove qmtest-related Makefile targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205164151.27101-1-egallager@gcc.gnu.org/mbox/"},{"id":174151,"url":"https://patchwork.plctlab.org/api/1.2/patches/174151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205165002.565846-1-jwakely@redhat.com/","msgid":"<20231205165002.565846-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-05T16:49:40","name":"[committed] libstdc++: Disable std::formatter::set_debug_format [PR112832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205165002.565846-1-jwakely@redhat.com/mbox/"},{"id":174138,"url":"https://patchwork.plctlab.org/api/1.2/patches/174138/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9XL+ac5rY9XbF9@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T17:00:31","name":"c++, v2: Fix parsing [[]][[]];","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW9XL+ac5rY9XbF9@tucnak/mbox/"},{"id":174147,"url":"https://patchwork.plctlab.org/api/1.2/patches/174147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com/","msgid":"<4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com>","list_archive_url":null,"date":"2023-12-05T17:29:10","name":"tsystem.h: Declare calloc/realloc #ifdef inhibit_libc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4acc4d97-bc80-4d2b-b00e-4eaa872d5f53@codesourcery.com/mbox/"},{"id":174169,"url":"https://patchwork.plctlab.org/api/1.2/patches/174169/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205184929.76195-1-polacek@redhat.com/","msgid":"<20231205184929.76195-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-05T18:49:29","name":"build: unbreak bootstrap on uclinux targets [PR112762]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205184929.76195-1-polacek@redhat.com/mbox/"},{"id":174175,"url":"https://patchwork.plctlab.org/api/1.2/patches/174175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com/","msgid":"<206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:30:14","name":"aarch64: Add missing driver-aarch64 dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/206e842c-e451-55a2-4712-f8847bd2190e@e124511.cambridge.arm.com/mbox/"},{"id":174176,"url":"https://patchwork.plctlab.org/api/1.2/patches/174176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com/","msgid":"<0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:32:43","name":"aarch64 testsuite: Check entire .arch string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c74a3e7-afd2-35bc-b4d5-7eb48e126d71@e124511.cambridge.arm.com/mbox/"},{"id":174178,"url":"https://patchwork.plctlab.org/api/1.2/patches/174178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com/","msgid":"<58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-05T19:33:33","name":"aarch64: Fix +nocrypto handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/58ac7f4d-04d3-260c-1612-1ca09c420ce5@e124511.cambridge.arm.com/mbox/"},{"id":174180,"url":"https://patchwork.plctlab.org/api/1.2/patches/174180/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd8d2cd0-35b7-f32d-2c9a-f9ddfb924530@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-05T19:34:21","name":"aarch64: Fix +nopredres, +nols64 and +nomops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fd8d2cd0-35b7-f32d-2c9a-f9ddfb924530@e124511.cambridge.arm.com/mbox/"},{"id":174184,"url":"https://patchwork.plctlab.org/api/1.2/patches/174184/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205195619.547273-1-j@lambda.is/","msgid":"<20231205195619.547273-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-05T19:56:19","name":"[v7] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205195619.547273-1-j@lambda.is/mbox/"},{"id":174188,"url":"https://patchwork.plctlab.org/api/1.2/patches/174188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205203136.94832-1-polacek@redhat.com/","msgid":"<20231205203136.94832-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-05T20:31:36","name":"c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205203136.94832-1-polacek@redhat.com/mbox/"},{"id":174208,"url":"https://patchwork.plctlab.org/api/1.2/patches/174208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-2-indu.bhagat@oracle.com/","msgid":"<20231205213632.947369-2-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-12-05T21:36:31","name":"[[PATCH,GCC13] 1/2] bfd: linker: merge .sframe sections","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-2-indu.bhagat@oracle.com/mbox/"},{"id":174209,"url":"https://patchwork.plctlab.org/api/1.2/patches/174209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-3-indu.bhagat@oracle.com/","msgid":"<20231205213632.947369-3-indu.bhagat@oracle.com>","list_archive_url":null,"date":"2023-12-05T21:36:32","name":"[[PATCH,GCC13] 2/2] toplevel: Makefile.def: add install-strip dependency on libsframe","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205213632.947369-3-indu.bhagat@oracle.com/mbox/"},{"id":174217,"url":"https://patchwork.plctlab.org/api/1.2/patches/174217/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+e17v8kftQKh57@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:06:15","name":"libiberty: Fix build with GCC < 7","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+e17v8kftQKh57@tucnak/mbox/"},{"id":174220,"url":"https://patchwork.plctlab.org/api/1.2/patches/174220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+hoNiyGaXIYKV8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:18:08","name":"lower-bitint: Fix arithmetics followed by extension by many bits [PR112809]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+hoNiyGaXIYKV8@tucnak/mbox/"},{"id":174222,"url":"https://patchwork.plctlab.org/api/1.2/patches/174222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+i2GmeDAwxA0ZB@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-05T22:23:20","name":"i386: Move vzeroupper pass from after reload pass to after postreload_cse [PR112760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZW+i2GmeDAwxA0ZB@tucnak/mbox/"},{"id":174238,"url":"https://patchwork.plctlab.org/api/1.2/patches/174238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205233450.614809-1-jwakely@redhat.com/","msgid":"<20231205233450.614809-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-05T23:34:27","name":"[committed] libstdc++: Redefine __glibcxx_assert to work in C++23 constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231205233450.614809-1-jwakely@redhat.com/mbox/"},{"id":174243,"url":"https://patchwork.plctlab.org/api/1.2/patches/174243/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206003906.2945650-1-ewlu@rivosinc.com/","msgid":"<20231206003906.2945650-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-06T00:39:06","name":"RISC-V: Remove xfail from ssa-fre-3.c testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206003906.2945650-1-ewlu@rivosinc.com/mbox/"},{"id":174270,"url":"https://patchwork.plctlab.org/api/1.2/patches/174270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206015211.682650-1-lhyatt@gmail.com/","msgid":"<20231206015211.682650-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-06T01:52:11","name":"c-family: Fix ICE with large column number after restoring a PCH [PR105608]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206015211.682650-1-lhyatt@gmail.com/mbox/"},{"id":174273,"url":"https://patchwork.plctlab.org/api/1.2/patches/174273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg0rshb.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-06T02:10:24","name":"[v8] Introduce attribute sym_alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredg0rshb.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":174289,"url":"https://patchwork.plctlab.org/api/1.2/patches/174289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022101.1695009-1-jason@redhat.com/","msgid":"<20231206022101.1695009-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-06T02:21:01","name":"[RFA,(libstdc++)] c++: partial ordering of object parameter [PR53499]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022101.1695009-1-jason@redhat.com/mbox/"},{"id":174275,"url":"https://patchwork.plctlab.org/api/1.2/patches/174275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022931.33437-1-yangyujie@loongson.cn/","msgid":"<20231206022931.33437-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-06T02:29:31","name":"testsuite: Adjust for the new permerror -Wincompatible-pointer-types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206022931.33437-1-yangyujie@loongson.cn/mbox/"},{"id":174276,"url":"https://patchwork.plctlab.org/api/1.2/patches/174276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-1-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:21","name":"[1/4] RISC-V: Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-1-wangfeng@eswincomputing.com/mbox/"},{"id":174277,"url":"https://patchwork.plctlab.org/api/1.2/patches/174277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-2-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:22","name":"[2/4] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-2-wangfeng@eswincomputing.com/mbox/"},{"id":174278,"url":"https://patchwork.plctlab.org/api/1.2/patches/174278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-3-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:23","name":"[3/4] RISC-V: Add crypto vector machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-3-wangfeng@eswincomputing.com/mbox/"},{"id":174279,"url":"https://patchwork.plctlab.org/api/1.2/patches/174279/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-4-wangfeng@eswincomputing.com/","msgid":"<20231206024524.10792-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T02:45:24","name":"[4/4] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206024524.10792-4-wangfeng@eswincomputing.com/mbox/"},{"id":174290,"url":"https://patchwork.plctlab.org/api/1.2/patches/174290/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18055-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T04:03:00","name":"middle-end: correct loop bounds for early breaks and peeled vector loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18055-tamar@arm.com/mbox/"},{"id":174291,"url":"https://patchwork.plctlab.org/api/1.2/patches/174291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18056-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T04:03:33","name":"middle-end: Fix peeled vect loop IV values.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18056-tamar@arm.com/mbox/"},{"id":174293,"url":"https://patchwork.plctlab.org/api/1.2/patches/174293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206044936.16515-1-xuli1@eswincomputing.com/","msgid":"<20231206044936.16515-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-06T04:49:36","name":"RISC-V: Remove useless modes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206044936.16515-1-xuli1@eswincomputing.com/mbox/"},{"id":174295,"url":"https://patchwork.plctlab.org/api/1.2/patches/174295/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-1-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:25","name":"[V3,1/3] rs6000: update num_insns_constant for 2 insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-1-guojiufu@linux.ibm.com/mbox/"},{"id":174296,"url":"https://patchwork.plctlab.org/api/1.2/patches/174296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-2-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:26","name":"[V3,2/3] Using pli for constant splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-2-guojiufu@linux.ibm.com/mbox/"},{"id":174297,"url":"https://patchwork.plctlab.org/api/1.2/patches/174297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-3-guojiufu@linux.ibm.com/","msgid":"<20231206052427.143889-3-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T05:24:27","name":"[V3,3/3] split complicate constant to memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206052427.143889-3-guojiufu@linux.ibm.com/mbox/"},{"id":174332,"url":"https://patchwork.plctlab.org/api/1.2/patches/174332/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206064416.1450871-1-yangyujie@loongson.cn/","msgid":"<20231206064416.1450871-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-06T06:44:16","name":"[v2] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206064416.1450871-1-yangyujie@loongson.cn/mbox/"},{"id":174335,"url":"https://patchwork.plctlab.org/api/1.2/patches/174335/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-2-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-2-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:49","name":"[v3,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-2-xujiahao@loongson.cn/mbox/"},{"id":174338,"url":"https://patchwork.plctlab.org/api/1.2/patches/174338/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-3-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-3-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:50","name":"[v3,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-3-xujiahao@loongson.cn/mbox/"},{"id":174336,"url":"https://patchwork.plctlab.org/api/1.2/patches/174336/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-4-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-4-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:51","name":"[v3,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-4-xujiahao@loongson.cn/mbox/"},{"id":174339,"url":"https://patchwork.plctlab.org/api/1.2/patches/174339/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-5-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-5-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:52","name":"[v3,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-5-xujiahao@loongson.cn/mbox/"},{"id":174337,"url":"https://patchwork.plctlab.org/api/1.2/patches/174337/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-6-xujiahao@loongson.cn/","msgid":"<20231206070453.3252-6-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-06T07:04:53","name":"[v3,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206070453.3252-6-xujiahao@loongson.cn/mbox/"},{"id":174383,"url":"https://patchwork.plctlab.org/api/1.2/patches/174383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-2-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-2-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:21","name":"[01/16,APX,NDD] Support Intel APX NDD for legacy add insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-2-hongyu.wang@intel.com/mbox/"},{"id":174396,"url":"https://patchwork.plctlab.org/api/1.2/patches/174396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-3-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-3-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:22","name":"[02/16,APX,NDD] Support APX NDD for optimization patterns of add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-3-hongyu.wang@intel.com/mbox/"},{"id":174385,"url":"https://patchwork.plctlab.org/api/1.2/patches/174385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-4-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-4-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:23","name":"[03/16,APX,NDD] Disable seg_prefixed memory usage for NDD add","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-4-hongyu.wang@intel.com/mbox/"},{"id":174390,"url":"https://patchwork.plctlab.org/api/1.2/patches/174390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-5-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-5-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:24","name":"[04/16,APX,NDD] Support APX NDD for adc insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-5-hongyu.wang@intel.com/mbox/"},{"id":174399,"url":"https://patchwork.plctlab.org/api/1.2/patches/174399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-6-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-6-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:25","name":"[05/16,APX,NDD] Support APX NDD for sub insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-6-hongyu.wang@intel.com/mbox/"},{"id":174391,"url":"https://patchwork.plctlab.org/api/1.2/patches/174391/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-7-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-7-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:26","name":"[06/16,APX,NDD] Support APX NDD for sbb insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-7-hongyu.wang@intel.com/mbox/"},{"id":174393,"url":"https://patchwork.plctlab.org/api/1.2/patches/174393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-8-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-8-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:27","name":"[07/16,APX,NDD] Support APX NDD for neg insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-8-hongyu.wang@intel.com/mbox/"},{"id":174382,"url":"https://patchwork.plctlab.org/api/1.2/patches/174382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-9-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-9-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:28","name":"[08/16,APX,NDD] Support APX NDD for not insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-9-hongyu.wang@intel.com/mbox/"},{"id":174392,"url":"https://patchwork.plctlab.org/api/1.2/patches/174392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-10-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-10-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:29","name":"[09/16,APX,NDD] Support APX NDD for and insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-10-hongyu.wang@intel.com/mbox/"},{"id":174389,"url":"https://patchwork.plctlab.org/api/1.2/patches/174389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-11-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-11-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:30","name":"[10/16,APX,NDD] Support APX NDD for or/xor insn","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-11-hongyu.wang@intel.com/mbox/"},{"id":174397,"url":"https://patchwork.plctlab.org/api/1.2/patches/174397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-12-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-12-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:31","name":"[11/16,APX,NDD] Support APX NDD for left shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-12-hongyu.wang@intel.com/mbox/"},{"id":174398,"url":"https://patchwork.plctlab.org/api/1.2/patches/174398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-13-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-13-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:32","name":"[12/16,APX,NDD] Support APX NDD for right shift insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-13-hongyu.wang@intel.com/mbox/"},{"id":174401,"url":"https://patchwork.plctlab.org/api/1.2/patches/174401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-14-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-14-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:33","name":"[13/16,APX,NDD] Support APX NDD for rotate insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-14-hongyu.wang@intel.com/mbox/"},{"id":174395,"url":"https://patchwork.plctlab.org/api/1.2/patches/174395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-15-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-15-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:34","name":"[14/16,APX,NDD] Support APX NDD for shld/shrd insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-15-hongyu.wang@intel.com/mbox/"},{"id":174394,"url":"https://patchwork.plctlab.org/api/1.2/patches/174394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-16-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-16-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:35","name":"[15/16,APX,NDD] Support APX NDD for cmove insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-16-hongyu.wang@intel.com/mbox/"},{"id":174400,"url":"https://patchwork.plctlab.org/api/1.2/patches/174400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-17-hongyu.wang@intel.com/","msgid":"<20231206080636.178863-17-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-06T08:06:36","name":"[16/16,APX,NDD] Support TImode shift for NDD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206080636.178863-17-hongyu.wang@intel.com/mbox/"},{"id":174406,"url":"https://patchwork.plctlab.org/api/1.2/patches/174406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/df01d123-2ae1-4d43-b0c9-2e2f9b5d29e1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T08:13:08","name":"[patch-1v2,rs6000] enable fctiw on old archs [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/df01d123-2ae1-4d43-b0c9-2e2f9b5d29e1@linux.ibm.com/mbox/"},{"id":174407,"url":"https://patchwork.plctlab.org/api/1.2/patches/174407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com/","msgid":"<98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T08:13:49","name":"[patch-2v2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com/mbox/"},{"id":174440,"url":"https://patchwork.plctlab.org/api/1.2/patches/174440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206092758.1000447-1-guojiufu@linux.ibm.com/","msgid":"<20231206092758.1000447-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-06T09:27:58","name":"treat argp-based mem as frame related in dse","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206092758.1000447-1-guojiufu@linux.ibm.com/mbox/"},{"id":174441,"url":"https://patchwork.plctlab.org/api/1.2/patches/174441/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXBHF0Qggxkoz/ej@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-06T10:04:07","name":"libgcc: Avoid -Wbuiltin-declaration-mismatch warnings in emutls.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXBHF0Qggxkoz/ej@tucnak/mbox/"},{"id":174562,"url":"https://patchwork.plctlab.org/api/1.2/patches/174562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f622a1-4d4d-e79d-8886-339e56b30b7d@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T12:44:26","name":"[1/5] aarch64: Add cpu feature detection to libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a4f622a1-4d4d-e79d-8886-339e56b30b7d@e124511.cambridge.arm.com/mbox/"},{"id":174563,"url":"https://patchwork.plctlab.org/api/1.2/patches/174563/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com/","msgid":"<53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-06T12:45:08","name":"[v3,2/5] c-family: Simplify attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/53309896-3cb3-e114-7471-a2f320464bef@e124511.cambridge.arm.com/mbox/"},{"id":174564,"url":"https://patchwork.plctlab.org/api/1.2/patches/174564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e195769a-c51a-83c1-9b64-42bdd7f21155@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T12:45:53","name":"[v3,3/5] ada: Improve attribute exclusion handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e195769a-c51a-83c1-9b64-42bdd7f21155@e124511.cambridge.arm.com/mbox/"},{"id":174565,"url":"https://patchwork.plctlab.org/api/1.2/patches/174565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com/","msgid":"<2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-06T12:47:15","name":"[v3,5/5] aarch64: Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2224863c-2f8b-3c82-4c3b-8dfee7a974b7@e124511.cambridge.arm.com/mbox/"},{"id":174570,"url":"https://patchwork.plctlab.org/api/1.2/patches/174570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206130351.2573949-1-juzhe.zhong@rivai.ai/","msgid":"<20231206130351.2573949-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T13:03:50","name":"RISC-V: Fix VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206130351.2573949-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174577,"url":"https://patchwork.plctlab.org/api/1.2/patches/174577/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206134653.29261-1-manos.anagnostakis@vrull.eu/","msgid":"<20231206134653.29261-1-manos.anagnostakis@vrull.eu>","list_archive_url":null,"date":"2023-12-06T13:46:53","name":"[v6] aarch64: New RTL optimization pass avoid-store-forwarding.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206134653.29261-1-manos.anagnostakis@vrull.eu/mbox/"},{"id":174593,"url":"https://patchwork.plctlab.org/api/1.2/patches/174593/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCA4SDkDbMT4Gaa@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-06T14:10:41","name":"c++: Don'\''t diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCA4SDkDbMT4Gaa@tucnak/mbox/"},{"id":174666,"url":"https://patchwork.plctlab.org/api/1.2/patches/174666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142930.739485-1-jwakely@redhat.com/","msgid":"<20231206142930.739485-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-06T14:18:12","name":"libstdc++: Make __gnu_debug::vector usable in constant expressions [PR109536]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142930.739485-1-jwakely@redhat.com/mbox/"},{"id":174601,"url":"https://patchwork.plctlab.org/api/1.2/patches/174601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142646.3402479-1-juzhe.zhong@rivai.ai/","msgid":"<20231206142646.3402479-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T14:26:46","name":"[Committed,V2] RISC-V: Fix VSETVL PASS bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206142646.3402479-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174602,"url":"https://patchwork.plctlab.org/api/1.2/patches/174602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206143444.2760326-1-gb.devel@gmail.com/","msgid":"<20231206143444.2760326-1-gb.devel@gmail.com>","list_archive_url":null,"date":"2023-12-06T14:34:44","name":"libstdc++: Fix testsuite with -Wformat","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206143444.2760326-1-gb.devel@gmail.com/mbox/"},{"id":174644,"url":"https://patchwork.plctlab.org/api/1.2/patches/174644/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCWo0zhECpJlU9A@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-06T15:43:31","name":"[committed] Fix c-c++-common/fhardened-[12].c test fails on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXCWo0zhECpJlU9A@mx3210.localdomain/mbox/"},{"id":174646,"url":"https://patchwork.plctlab.org/api/1.2/patches/174646/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206154833.2878478-1-gb.devel@gmail.com/","msgid":"<20231206154833.2878478-1-gb.devel@gmail.com>","list_archive_url":null,"date":"2023-12-06T15:48:33","name":"c++: Handle '\''#pragma GCC target optimize'\'' early [PR48026]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206154833.2878478-1-gb.devel@gmail.com/mbox/"},{"id":174667,"url":"https://patchwork.plctlab.org/api/1.2/patches/174667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLZaogJSoL7S2T_JKfMU=NAmEee15064K2aktPGttvUow@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-06T16:09:36","name":"{Patch, fortran] PR112834 - Class array function selector causes chain of syntax and other spurious errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLZaogJSoL7S2T_JKfMU=NAmEee15064K2aktPGttvUow@mail.gmail.com/mbox/"},{"id":174673,"url":"https://patchwork.plctlab.org/api/1.2/patches/174673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com/","msgid":"<24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com>","list_archive_url":null,"date":"2023-12-06T16:50:48","name":"libiberty/buildargv: POSIX behaviour for backslash handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/24a8d878590403540bc9b579ba58805985a4d2f7.1701881419.git.aburgess@redhat.com/mbox/"},{"id":174677,"url":"https://patchwork.plctlab.org/api/1.2/patches/174677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-2-ams@codesourcery.com/","msgid":"<20231206170020.1675302-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:18","name":"[committed,v4,1/3] libgomp, nvptx: low-latency memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-2-ams@codesourcery.com/mbox/"},{"id":174675,"url":"https://patchwork.plctlab.org/api/1.2/patches/174675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-3-ams@codesourcery.com/","msgid":"<20231206170020.1675302-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:19","name":"[committed,v4,2/3] openmp, nvptx: low-lat memory access traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-3-ams@codesourcery.com/mbox/"},{"id":174676,"url":"https://patchwork.plctlab.org/api/1.2/patches/174676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-4-ams@codesourcery.com/","msgid":"<20231206170020.1675302-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-06T17:00:20","name":"[committed,v4,3/3] amdgcn, libgomp: low-latency allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206170020.1675302-4-ams@codesourcery.com/mbox/"},{"id":174683,"url":"https://patchwork.plctlab.org/api/1.2/patches/174683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206174245.2462114-1-dmalcolm@redhat.com/","msgid":"<20231206174245.2462114-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-06T17:42:45","name":"[pushed] diagnostics: use const and references for diagnostic_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206174245.2462114-1-dmalcolm@redhat.com/mbox/"},{"id":174687,"url":"https://patchwork.plctlab.org/api/1.2/patches/174687/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206175011.2462694-1-dmalcolm@redhat.com/","msgid":"<20231206175011.2462694-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-06T17:50:11","name":"[pushed] v2: diagnostics: prettify JSON output formats","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206175011.2462694-1-dmalcolm@redhat.com/mbox/"},{"id":174707,"url":"https://patchwork.plctlab.org/api/1.2/patches/174707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3350dc3b-3471-453b-b631-810939609ba9@arm.com/","msgid":"<3350dc3b-3471-453b-b631-810939609ba9@arm.com>","list_archive_url":null,"date":"2023-12-06T18:49:23","name":"veclower: improve selection of vector mode when lowering [PR 112787]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3350dc3b-3471-453b-b631-810939609ba9@arm.com/mbox/"},{"id":174742,"url":"https://patchwork.plctlab.org/api/1.2/patches/174742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca36c23-78f7-478f-bdce-6bfe0afaf92b-1701894736658@3c-app-gmx-bap48/","msgid":"","list_archive_url":null,"date":"2023-12-06T20:32:16","name":"Fortran: function returning contiguous class array [PR105543]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-eca36c23-78f7-478f-bdce-6bfe0afaf92b-1701894736658@3c-app-gmx-bap48/mbox/"},{"id":174749,"url":"https://patchwork.plctlab.org/api/1.2/patches/174749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org/","msgid":"<9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org>","list_archive_url":null,"date":"2023-12-06T22:33:14","name":"htdocs: correct spelling and use https in examples","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9d252656-3c8f-4621-92f4-fa5d1ff63ec1@jguk.org/mbox/"},{"id":174750,"url":"https://patchwork.plctlab.org/api/1.2/patches/174750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206223502.2323591-1-juzhe.zhong@rivai.ai/","msgid":"<20231206223502.2323591-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-06T22:35:02","name":"[Committed] RISC-V: Fix PR112888 ICE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206223502.2323591-1-juzhe.zhong@rivai.ai/mbox/"},{"id":174780,"url":"https://patchwork.plctlab.org/api/1.2/patches/174780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206235431.69392-1-polacek@redhat.com/","msgid":"<20231206235431.69392-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-06T23:54:31","name":"aarch64: add -fno-stack-protector to tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231206235431.69392-1-polacek@redhat.com/mbox/"},{"id":174815,"url":"https://patchwork.plctlab.org/api/1.2/patches/174815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207002822.2498142-1-dmalcolm@redhat.com/","msgid":"<20231207002822.2498142-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-07T00:28:22","name":"[pushed] analyzer: fix taint false positives with UNKNOWN [PR112850]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207002822.2498142-1-dmalcolm@redhat.com/mbox/"},{"id":174872,"url":"https://patchwork.plctlab.org/api/1.2/patches/174872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207014011.1512-2-yangyujie@loongson.cn/","msgid":"<20231207014011.1512-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-07T01:40:11","name":"[v3] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207014011.1512-2-yangyujie@loongson.cn/mbox/"},{"id":174877,"url":"https://patchwork.plctlab.org/api/1.2/patches/174877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-1-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:11","name":"[1/4,v2] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-1-wangfeng@eswincomputing.com/mbox/"},{"id":174879,"url":"https://patchwork.plctlab.org/api/1.2/patches/174879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-2-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:12","name":"[2/4,v2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-2-wangfeng@eswincomputing.com/mbox/"},{"id":174880,"url":"https://patchwork.plctlab.org/api/1.2/patches/174880/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-3-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:13","name":"[3/4,v2] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-3-wangfeng@eswincomputing.com/mbox/"},{"id":174881,"url":"https://patchwork.plctlab.org/api/1.2/patches/174881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-4-wangfeng@eswincomputing.com/","msgid":"<20231207021514.10248-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T02:15:14","name":"[4/4,v2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207021514.10248-4-wangfeng@eswincomputing.com/mbox/"},{"id":174895,"url":"https://patchwork.plctlab.org/api/1.2/patches/174895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpqd6u0.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-07T03:33:59","name":"strub: enable conditional support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpqd6u0.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":174924,"url":"https://patchwork.plctlab.org/api/1.2/patches/174924/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-2-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:56","name":"[v26,01/23] c++: Sort built-in traits alphabetically","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-2-kmatsui@gcc.gnu.org/mbox/"},{"id":174925,"url":"https://patchwork.plctlab.org/api/1.2/patches/174925/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-3-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:57","name":"[v26,02/23] c-family, c++: Look up built-in traits via identifier node","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-3-kmatsui@gcc.gnu.org/mbox/"},{"id":174926,"url":"https://patchwork.plctlab.org/api/1.2/patches/174926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-4-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:58","name":"[v26,03/23] c++: Accept the use of built-in trait identifiers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-4-kmatsui@gcc.gnu.org/mbox/"},{"id":174927,"url":"https://patchwork.plctlab.org/api/1.2/patches/174927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-5-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:32:59","name":"[v26,04/23] c++: Implement __is_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-5-kmatsui@gcc.gnu.org/mbox/"},{"id":174928,"url":"https://patchwork.plctlab.org/api/1.2/patches/174928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-6-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:00","name":"[v26,05/23] libstdc++: Optimize std::is_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-6-kmatsui@gcc.gnu.org/mbox/"},{"id":174929,"url":"https://patchwork.plctlab.org/api/1.2/patches/174929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-7-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:01","name":"[v26,06/23] c++: Implement __is_bounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-7-kmatsui@gcc.gnu.org/mbox/"},{"id":174930,"url":"https://patchwork.plctlab.org/api/1.2/patches/174930/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-8-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:02","name":"[v26,07/23] libstdc++: Optimize std::is_bounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-8-kmatsui@gcc.gnu.org/mbox/"},{"id":174931,"url":"https://patchwork.plctlab.org/api/1.2/patches/174931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-9-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:03","name":"[v26,08/23] c++: Implement __is_scoped_enum built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-9-kmatsui@gcc.gnu.org/mbox/"},{"id":174932,"url":"https://patchwork.plctlab.org/api/1.2/patches/174932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-10-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:04","name":"[v26,09/23] libstdc++: Optimize std::is_scoped_enum compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-10-kmatsui@gcc.gnu.org/mbox/"},{"id":174933,"url":"https://patchwork.plctlab.org/api/1.2/patches/174933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-11-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:05","name":"[v26,10/23] c++: Implement __is_member_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-11-kmatsui@gcc.gnu.org/mbox/"},{"id":174934,"url":"https://patchwork.plctlab.org/api/1.2/patches/174934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-12-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:06","name":"[v26,11/23] libstdc++: Optimize std::is_member_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-12-kmatsui@gcc.gnu.org/mbox/"},{"id":174935,"url":"https://patchwork.plctlab.org/api/1.2/patches/174935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-13-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:07","name":"[v26,12/23] c++: Implement __is_member_function_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-13-kmatsui@gcc.gnu.org/mbox/"},{"id":174936,"url":"https://patchwork.plctlab.org/api/1.2/patches/174936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-14-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:08","name":"[v26,13/23] libstdc++: Optimize std::is_member_function_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-14-kmatsui@gcc.gnu.org/mbox/"},{"id":174937,"url":"https://patchwork.plctlab.org/api/1.2/patches/174937/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-15-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:09","name":"[v26,14/23] c++: Implement __is_member_object_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-15-kmatsui@gcc.gnu.org/mbox/"},{"id":174938,"url":"https://patchwork.plctlab.org/api/1.2/patches/174938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-16-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-16-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:10","name":"[v26,15/23] libstdc++: Optimize std::is_member_object_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-16-kmatsui@gcc.gnu.org/mbox/"},{"id":174939,"url":"https://patchwork.plctlab.org/api/1.2/patches/174939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-17-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-17-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:11","name":"[v26,16/23] c++: Implement __is_reference built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-17-kmatsui@gcc.gnu.org/mbox/"},{"id":174940,"url":"https://patchwork.plctlab.org/api/1.2/patches/174940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-18-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-18-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:12","name":"[v26,17/23] libstdc++: Optimize std::is_reference compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-18-kmatsui@gcc.gnu.org/mbox/"},{"id":174941,"url":"https://patchwork.plctlab.org/api/1.2/patches/174941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-19-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-19-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:13","name":"[v26,18/23] c++: Implement __is_function built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-19-kmatsui@gcc.gnu.org/mbox/"},{"id":174943,"url":"https://patchwork.plctlab.org/api/1.2/patches/174943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-20-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-20-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:14","name":"[v26,19/23] libstdc++: Optimize std::is_function compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-20-kmatsui@gcc.gnu.org/mbox/"},{"id":174942,"url":"https://patchwork.plctlab.org/api/1.2/patches/174942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-21-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-21-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:15","name":"[v26,20/23] c++: Implement __is_object built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-21-kmatsui@gcc.gnu.org/mbox/"},{"id":174945,"url":"https://patchwork.plctlab.org/api/1.2/patches/174945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-22-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-22-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:16","name":"[v26,21/23] libstdc++: Optimize std::is_object compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-22-kmatsui@gcc.gnu.org/mbox/"},{"id":174944,"url":"https://patchwork.plctlab.org/api/1.2/patches/174944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-23-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-23-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:17","name":"[v26,22/23] c++: Implement __remove_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-23-kmatsui@gcc.gnu.org/mbox/"},{"id":174946,"url":"https://patchwork.plctlab.org/api/1.2/patches/174946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-24-kmatsui@gcc.gnu.org/","msgid":"<20231207053633.1001720-24-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-07T05:33:18","name":"[v26,23/23] libstdc++: Optimize std::remove_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207053633.1001720-24-kmatsui@gcc.gnu.org/mbox/"},{"id":174981,"url":"https://patchwork.plctlab.org/api/1.2/patches/174981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5JuY6sJleFmQu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:49:58","name":"tree-ssa-dce: Fix up maybe_optimize_arith_overflow for BITINT_TYPE [PR112880]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5JuY6sJleFmQu@tucnak/mbox/"},{"id":174982,"url":"https://patchwork.plctlab.org/api/1.2/patches/174982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5iPc/yqEcx8yS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:51:36","name":"expr: Handle BITINT_TYPE in count_type_elements [PR112881]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF5iPc/yqEcx8yS@tucnak/mbox/"},{"id":174983,"url":"https://patchwork.plctlab.org/api/1.2/patches/174983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF6Afn0+K3Mx+I7@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T07:53:37","name":"c-family: Fix up -fno-debug-cpp [PR111965]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXF6Afn0+K3Mx+I7@tucnak/mbox/"},{"id":175017,"url":"https://patchwork.plctlab.org/api/1.2/patches/175017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEBmzbYlbFIlyv@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:36:22","name":"Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEBmzbYlbFIlyv@tucnak/mbox/"},{"id":175021,"url":"https://patchwork.plctlab.org/api/1.2/patches/175021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEqWQnsyIHljTu@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:39:05","name":"v2: Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGEqWQnsyIHljTu@tucnak/mbox/"},{"id":175023,"url":"https://patchwork.plctlab.org/api/1.2/patches/175023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGHrGaIVD5gZxbz@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T08:51:56","name":"[committed] testsuite: Add testcase for already fixed PR [PR111068]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGHrGaIVD5gZxbz@tucnak/mbox/"},{"id":175061,"url":"https://patchwork.plctlab.org/api/1.2/patches/175061/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGQVwm2w+l5T3RC@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-07T09:28:55","name":"c++: Unshare folded SAVE_EXPR arguments during cp_fold [PR112727]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXGQVwm2w+l5T3RC@tucnak/mbox/"},{"id":175071,"url":"https://patchwork.plctlab.org/api/1.2/patches/175071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101526.3649249-1-juzhe.zhong@rivai.ai/","msgid":"<20231207101526.3649249-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T10:15:26","name":"RISC-V: Support interleave vector with different step sequence for VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101526.3649249-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175072,"url":"https://patchwork.plctlab.org/api/1.2/patches/175072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-2-shihua@iscas.ac.cn/","msgid":"<20231207101639.3695340-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-07T10:16:38","name":"[V2,1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-2-shihua@iscas.ac.cn/mbox/"},{"id":175073,"url":"https://patchwork.plctlab.org/api/1.2/patches/175073/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-3-shihua@iscas.ac.cn/","msgid":"<20231207101639.3695340-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-07T10:16:39","name":"[V2,2/2] RISC-V: Add C intrinsics of Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207101639.3695340-3-shihua@iscas.ac.cn/mbox/"},{"id":175074,"url":"https://patchwork.plctlab.org/api/1.2/patches/175074/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207102440.3721252-1-juzhe.zhong@rivai.ai/","msgid":"<20231207102440.3721252-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T10:24:40","name":"RISC-V: Support interleave vector with different step sequence for VLA SLP","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207102440.3721252-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175100,"url":"https://patchwork.plctlab.org/api/1.2/patches/175100/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-2-iii@linux.ibm.com/","msgid":"<20231207121005.3425208-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2023-12-07T12:08:26","name":"[1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-2-iii@linux.ibm.com/mbox/"},{"id":175101,"url":"https://patchwork.plctlab.org/api/1.2/patches/175101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-3-iii@linux.ibm.com/","msgid":"<20231207121005.3425208-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2023-12-07T12:08:27","name":"[2/2] asan: Align .LASANPC on function boundary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121005.3425208-3-iii@linux.ibm.com/mbox/"},{"id":175102,"url":"https://patchwork.plctlab.org/api/1.2/patches/175102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121220.3351398-1-juzhe.zhong@rivai.ai/","msgid":"<20231207121220.3351398-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T12:12:20","name":"RISC-V: Fix AVL propagation ICE for vleff/vlsegff","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121220.3351398-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175103,"url":"https://patchwork.plctlab.org/api/1.2/patches/175103/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121727.1940-1-wangfeng@eswincomputing.com/","msgid":"<20231207121727.1940-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-07T12:17:27","name":"RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207121727.1940-1-wangfeng@eswincomputing.com/mbox/"},{"id":175112,"url":"https://patchwork.plctlab.org/api/1.2/patches/175112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207122014.19826-2-xry111@xry111.site/","msgid":"<20231207122014.19826-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-07T12:20:15","name":"LoongArch: Allow -mcmodel=extreme and model attribute with -mexplicit-relocs=auto","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207122014.19826-2-xry111@xry111.site/mbox/"},{"id":175187,"url":"https://patchwork.plctlab.org/api/1.2/patches/175187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHaEK7W9JFjejWQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:43:28","name":"[v3,08/11] aarch64: Generalize writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHaEK7W9JFjejWQ@arm.com/mbox/"},{"id":175188,"url":"https://patchwork.plctlab.org/api/1.2/patches/175188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHamDMfAEnFxERI@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:45:44","name":"[v3,09/11] aarch64: Rewrite non-writeback ldp/stp patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHamDMfAEnFxERI@arm.com/mbox/"},{"id":175189,"url":"https://patchwork.plctlab.org/api/1.2/patches/175189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHbUKrMdYHxJ7Dg@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T14:48:48","name":"[v3,10/11] aarch64: Add new load/store pair fusion pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXHbUKrMdYHxJ7Dg@arm.com/mbox/"},{"id":175205,"url":"https://patchwork.plctlab.org/api/1.2/patches/175205/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-2-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:54","name":"[v2,1/3,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175204,"url":"https://patchwork.plctlab.org/api/1.2/patches/175204/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-3-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:55","name":"[v2,2/3,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175203,"url":"https://patchwork.plctlab.org/api/1.2/patches/175203/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-4-Ezra.Sitorus@arm.com/","msgid":"<20231207152156.1426-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:21:56","name":"[v2,3/3,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152156.1426-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175209,"url":"https://patchwork.plctlab.org/api/1.2/patches/175209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-2-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:42","name":"[v2,1/3,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175208,"url":"https://patchwork.plctlab.org/api/1.2/patches/175208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-3-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:43","name":"[v2,2/3,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175210,"url":"https://patchwork.plctlab.org/api/1.2/patches/175210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-4-Ezra.Sitorus@arm.com/","msgid":"<20231207152844.2255-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:28:44","name":"[v2,3/3,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207152844.2255-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175213,"url":"https://patchwork.plctlab.org/api/1.2/patches/175213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-2-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:50","name":"[v2,1/3,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175211,"url":"https://patchwork.plctlab.org/api/1.2/patches/175211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-3-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:51","name":"[v2,2/3,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175212,"url":"https://patchwork.plctlab.org/api/1.2/patches/175212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-4-Ezra.Sitorus@arm.com/","msgid":"<20231207153652.4384-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:36:52","name":"[v2,3/3,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207153652.4384-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175216,"url":"https://patchwork.plctlab.org/api/1.2/patches/175216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-2-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:04","name":"[v2,1/3,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-2-Ezra.Sitorus@arm.com/mbox/"},{"id":175215,"url":"https://patchwork.plctlab.org/api/1.2/patches/175215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-3-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:05","name":"[v2,2/3,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-3-Ezra.Sitorus@arm.com/mbox/"},{"id":175214,"url":"https://patchwork.plctlab.org/api/1.2/patches/175214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-4-Ezra.Sitorus@arm.com/","msgid":"<20231207154106.4808-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2023-12-07T15:41:06","name":"[v2,3/3,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207154106.4808-4-Ezra.Sitorus@arm.com/mbox/"},{"id":175256,"url":"https://patchwork.plctlab.org/api/1.2/patches/175256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-2-sandra@codesourcery.com/","msgid":"<20231207155247.372718-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:44","name":"[V3,1/4] OpenMP: Introduce accessor macros and constructors for context selectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-2-sandra@codesourcery.com/mbox/"},{"id":175249,"url":"https://patchwork.plctlab.org/api/1.2/patches/175249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-3-sandra@codesourcery.com/","msgid":"<20231207155247.372718-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:45","name":"[V3,2/4] OpenMP: Unify representation of name-list properties.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-3-sandra@codesourcery.com/mbox/"},{"id":175264,"url":"https://patchwork.plctlab.org/api/1.2/patches/175264/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-4-sandra@codesourcery.com/","msgid":"<20231207155247.372718-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:46","name":"[V3,3/4] OpenMP: Use enumerators for names of trait-sets and traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-4-sandra@codesourcery.com/mbox/"},{"id":175257,"url":"https://patchwork.plctlab.org/api/1.2/patches/175257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-5-sandra@codesourcery.com/","msgid":"<20231207155247.372718-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-07T15:52:47","name":"[V3,4/4] OpenMP: Permit additional selector properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207155247.372718-5-sandra@codesourcery.com/mbox/"},{"id":175276,"url":"https://patchwork.plctlab.org/api/1.2/patches/175276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162651.685329-1-poulhies@adacore.com/","msgid":"<20231207162651.685329-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-07T16:25:39","name":"testsuite: add missing dg-require ifunc in pr105554.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162651.685329-1-poulhies@adacore.com/mbox/"},{"id":175278,"url":"https://patchwork.plctlab.org/api/1.2/patches/175278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162817.686879-1-poulhies@adacore.com/","msgid":"<20231207162817.686879-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-07T16:28:09","name":"testsuite: require avx_runtime for vect-simd-clone-17f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207162817.686879-1-poulhies@adacore.com/mbox/"},{"id":175288,"url":"https://patchwork.plctlab.org/api/1.2/patches/175288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:46:38","name":"[2/4] libgcc: aarch64: Configure check for __getauxval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/745fcb769f068bb7a99513197f64955e02e79558.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175289,"url":"https://patchwork.plctlab.org/api/1.2/patches/175289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:46:51","name":"[3/4] libgcc: aarch64: Add SME runtime support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5d8154cf64f6c0d7b09dbac44b763c97dcb408fe.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175291,"url":"https://patchwork.plctlab.org/api/1.2/patches/175291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com/","msgid":"<7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-07T16:47:05","name":"[4/4] libgcc: aarch64: Add SME unwinder support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com/mbox/"},{"id":175313,"url":"https://patchwork.plctlab.org/api/1.2/patches/175313/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or34wddhnw.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-07T17:52:19","name":"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or34wddhnw.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":175363,"url":"https://patchwork.plctlab.org/api/1.2/patches/175363/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlea5x05m.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-07T19:50:13","name":"[pushed,v2] aarch64: Add an early RA for strided registers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptlea5x05m.fsf@arm.com/mbox/"},{"id":175367,"url":"https://patchwork.plctlab.org/api/1.2/patches/175367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207200046.79350-1-ewlu@rivosinc.com/","msgid":"<20231207200046.79350-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-07T20:00:46","name":"RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207200046.79350-1-ewlu@rivosinc.com/mbox/"},{"id":175450,"url":"https://patchwork.plctlab.org/api/1.2/patches/175450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205558.950070-1-jwakely@redhat.com/","msgid":"<20231207205558.950070-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:55:45","name":"[committed] libstdc++: Fix recent changes to __glibcxx_assert [PR112882]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205558.950070-1-jwakely@redhat.com/mbox/"},{"id":175464,"url":"https://patchwork.plctlab.org/api/1.2/patches/175464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205625.950093-1-jwakely@redhat.com/","msgid":"<20231207205625.950093-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:56:00","name":"[committed] libstdc++: Use instead of in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205625.950093-1-jwakely@redhat.com/mbox/"},{"id":175455,"url":"https://patchwork.plctlab.org/api/1.2/patches/175455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205720.950537-1-jwakely@redhat.com/","msgid":"<20231207205720.950537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-07T20:57:07","name":"[committed] libstdc++: Fix misleading typedef name in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207205720.950537-1-jwakely@redhat.com/mbox/"},{"id":175451,"url":"https://patchwork.plctlab.org/api/1.2/patches/175451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207220910.3487816-1-juzhe.zhong@rivai.ai/","msgid":"<20231207220910.3487816-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-07T22:09:10","name":"[Committed,V2] RISC-V: Support interleave vector with different step sequence","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231207220910.3487816-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175457,"url":"https://patchwork.plctlab.org/api/1.2/patches/175457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com/","msgid":"<295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:26:01","name":"libgccjit: Fix get_size of size_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/295f32d194b7b26bd02ce540f8df75a86fc20982.camel@zoho.com/mbox/"},{"id":175467,"url":"https://patchwork.plctlab.org/api/1.2/patches/175467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com/","msgid":"<2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:29:55","name":"libgccjit: Make new_array_type take unsigned long","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2660ad377160743a11f73345771fae8fdb7880ac.camel@zoho.com/mbox/"},{"id":175465,"url":"https://patchwork.plctlab.org/api/1.2/patches/175465/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com/","msgid":"<2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:32:06","name":"libgccjit: Make is_int return false on vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ec3366055db69e275db048f4d15846c4fdcb2f9.camel@zoho.com/mbox/"},{"id":175466,"url":"https://patchwork.plctlab.org/api/1.2/patches/175466/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com/","msgid":"<447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com>","list_archive_url":null,"date":"2023-12-07T22:34:23","name":"libgccjit: Add type checks in gcc_jit_block_add_assignment_op","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/447a6c24782a4275736dd38f35e17e42612ee80d.camel@zoho.com/mbox/"},{"id":175528,"url":"https://patchwork.plctlab.org/api/1.2/patches/175528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208021655.1595917-1-hongtao.liu@intel.com/","msgid":"<20231208021655.1595917-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-08T02:16:55","name":"Don'\''t assume it'\''s AVX_U128_CLEAN after call_insn whose abi.mode_clobber(V4DImode) deosn'\''t contains all SSE_REGS.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208021655.1595917-1-hongtao.liu@intel.com/mbox/"},{"id":175533,"url":"https://patchwork.plctlab.org/api/1.2/patches/175533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208024439.10538-1-wangfeng@eswincomputing.com/","msgid":"<20231208024439.10538-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-08T02:44:39","name":"[v2] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208024439.10538-1-wangfeng@eswincomputing.com/mbox/"},{"id":175611,"url":"https://patchwork.plctlab.org/api/1.2/patches/175611/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208063510.1806832-1-juzhe.zhong@rivai.ai/","msgid":"<20231208063510.1806832-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-08T06:35:10","name":"[Committed] RISC-V: Remove redundant check of better_main_loop_than_p in COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208063510.1806832-1-juzhe.zhong@rivai.ai/mbox/"},{"id":175635,"url":"https://patchwork.plctlab.org/api/1.2/patches/175635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208070250.2837967-1-haochen.jiang@intel.com/","msgid":"<20231208070250.2837967-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-08T07:02:50","name":"[gcc-wwwdocs] gcc-13/14: Mention recent update for x86_64 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208070250.2837967-1-haochen.jiang@intel.com/mbox/"},{"id":175642,"url":"https://patchwork.plctlab.org/api/1.2/patches/175642/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208071200.3238127-1-hongtao.liu@intel.com/","msgid":"<20231208071200.3238127-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-08T07:12:00","name":"[ICE] Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208071200.3238127-1-hongtao.liu@intel.com/mbox/"},{"id":175654,"url":"https://patchwork.plctlab.org/api/1.2/patches/175654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLHoMaZQbNKF3vh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:37:04","name":"haifa-sched: Avoid overflows in extend_h_i_d [PR112411]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLHoMaZQbNKF3vh@tucnak/mbox/"},{"id":175661,"url":"https://patchwork.plctlab.org/api/1.2/patches/175661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLInnHKUBvv3lkg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:41:18","name":"vr-values: Avoid ICEs on large _BitInt cast to floating point [PR112901]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLInnHKUBvv3lkg@tucnak/mbox/"},{"id":175671,"url":"https://patchwork.plctlab.org/api/1.2/patches/175671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLMEHNbRSol8kS2@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T07:56:00","name":"lower-bitint: Avoid merging non-mergeable stmt with cast and mergeable stmt [PR112902]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXLMEHNbRSol8kS2@tucnak/mbox/"},{"id":175673,"url":"https://patchwork.plctlab.org/api/1.2/patches/175673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208080047.875024-1-pan2.li@intel.com/","msgid":"<20231208080047.875024-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-08T08:00:47","name":"[v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208080047.875024-1-pan2.li@intel.com/mbox/"},{"id":175675,"url":"https://patchwork.plctlab.org/api/1.2/patches/175675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208082037.6960F138FF@imap2.dmz-prg2.suse.org/","msgid":"<20231208082037.6960F138FF@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-08T08:20:36","name":"Shrink out-of-SSA dump","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208082037.6960F138FF@imap2.dmz-prg2.suse.org/mbox/"},{"id":175714,"url":"https://patchwork.plctlab.org/api/1.2/patches/175714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208095446.344402-1-yangyujie@loongson.cn/","msgid":"<20231208095446.344402-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T09:54:46","name":"[v4] LoongArch: Fix eh_return epilogue for normal returns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208095446.344402-1-yangyujie@loongson.cn/mbox/"},{"id":175716,"url":"https://patchwork.plctlab.org/api/1.2/patches/175716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100118.344571-1-yangyujie@loongson.cn/","msgid":"<20231208100118.344571-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:01:18","name":"[v5] LoongArch: Fix eh_return epilogue for normal returns.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100118.344571-1-yangyujie@loongson.cn/mbox/"},{"id":175722,"url":"https://patchwork.plctlab.org/api/1.2/patches/175722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-2-yangyujie@loongson.cn/","msgid":"<20231208100942.344748-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:09:41","name":"[v3,1/2] libruntime: Add fiber context switch code for LoongArch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-2-yangyujie@loongson.cn/mbox/"},{"id":175723,"url":"https://patchwork.plctlab.org/api/1.2/patches/175723/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-3-yangyujie@loongson.cn/","msgid":"<20231208100942.344748-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2023-12-08T10:09:42","name":"[v3,2/2] libphobos: Update build scripts for LoongArch64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208100942.344748-3-yangyujie@loongson.cn/mbox/"},{"id":175789,"url":"https://patchwork.plctlab.org/api/1.2/patches/175789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2066e8c2-df88-4d25-a5f0-60fe92102486-1702031284725@3c-app-gmx-bs48/","msgid":"","list_archive_url":null,"date":"2023-12-08T10:28:04","name":"Fortran: allow NULL() for POINTER, OPTIONAL, CONTIGUOUS dummy [PR111503]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-2066e8c2-df88-4d25-a5f0-60fe92102486-1702031284725@3c-app-gmx-bs48/mbox/"},{"id":175756,"url":"https://patchwork.plctlab.org/api/1.2/patches/175756/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208103109.A8303138FF@imap2.dmz-prg2.suse.org/","msgid":"<20231208103109.A8303138FF@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-08T10:31:09","name":"tree-optimization/112909 - uninit diagnostic with abnormal copy","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208103109.A8303138FF@imap2.dmz-prg2.suse.org/mbox/"},{"id":175776,"url":"https://patchwork.plctlab.org/api/1.2/patches/175776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXL1MK1Bt7gCzwXx@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T10:51:28","name":"[v2] libgcc: aarch64: Add SME runtime support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXL1MK1Bt7gCzwXx@arm.com/mbox/"},{"id":175801,"url":"https://patchwork.plctlab.org/api/1.2/patches/175801/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208123737.3611857-1-szabolcs.nagy@arm.com/","msgid":"<20231208123737.3611857-1-szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-08T12:37:37","name":"[committed] libgcc: Fix config.in","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208123737.3611857-1-szabolcs.nagy@arm.com/mbox/"},{"id":175814,"url":"https://patchwork.plctlab.org/api/1.2/patches/175814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208134950.14883-2-amonakov@ispras.ru/","msgid":"<20231208134950.14883-2-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-12-08T13:49:50","name":"[1/1] object lifetime instrumentation for Valgrind [PR66487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208134950.14883-2-amonakov@ispras.ru/mbox/"},{"id":175820,"url":"https://patchwork.plctlab.org/api/1.2/patches/175820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c45f7b80-b8d6-4f5c-ab3b-5841c04e2c46@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T14:28:59","name":"OpenMP: Handle same-directive mapped vars with pointer predefined firstprivate [PR110639]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c45f7b80-b8d6-4f5c-ab3b-5841c04e2c46@codesourcery.com/mbox/"},{"id":175873,"url":"https://patchwork.plctlab.org/api/1.2/patches/175873/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXMzFgCxnBWu6Cen@fkdesktop.suse.cz/","msgid":"","list_archive_url":null,"date":"2023-12-08T15:15:34","name":"[v3] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXMzFgCxnBWu6Cen@fkdesktop.suse.cz/mbox/"},{"id":175933,"url":"https://patchwork.plctlab.org/api/1.2/patches/175933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at/","msgid":"<6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-08T16:43:50","name":"[C] Fix regression causing ICE for structs with VLAs [PR 112488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6194d2a421117c3830d2afbe2bf3bb53b4f9565e.camel@tugraz.at/mbox/"},{"id":175982,"url":"https://patchwork.plctlab.org/api/1.2/patches/175982/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXNX/AUfHDOf+57y@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-08T17:53:00","name":"c++, v2: Don'\''t diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXNX/AUfHDOf+57y@tucnak/mbox/"},{"id":176005,"url":"https://patchwork.plctlab.org/api/1.2/patches/176005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208184624.90158-1-polacek@redhat.com/","msgid":"<20231208184624.90158-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-08T18:46:24","name":"[pushed] c++: Add fixed test [PR88848]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208184624.90158-1-polacek@redhat.com/mbox/"},{"id":176030,"url":"https://patchwork.plctlab.org/api/1.2/patches/176030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com/","msgid":"<85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com>","list_archive_url":null,"date":"2023-12-08T20:53:26","name":"[pushed,PR112875,LRA] : Fix an assert in lra elimination code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/85356fe6-9331-b089-6b0f-3ef8ddd77365@redhat.com/mbox/"},{"id":176031,"url":"https://patchwork.plctlab.org/api/1.2/patches/176031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210256.2705893-1-dmalcolm@redhat.com/","msgid":"<20231208210256.2705893-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-08T21:02:56","name":"[pushed] analyzer: fix ICE on infoleak with poisoned size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210256.2705893-1-dmalcolm@redhat.com/mbox/"},{"id":176033,"url":"https://patchwork.plctlab.org/api/1.2/patches/176033/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210304.2705943-1-dmalcolm@redhat.com/","msgid":"<20231208210304.2705943-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-08T21:03:04","name":"[pushed] analyzer: avoid taint for (TAINTED % NON_TAINTED)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208210304.2705943-1-dmalcolm@redhat.com/mbox/"},{"id":176043,"url":"https://patchwork.plctlab.org/api/1.2/patches/176043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXOHWR4pNh5gNs2C@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-08T21:15:05","name":"[v2] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXOHWR4pNh5gNs2C@redhat.com/mbox/"},{"id":176078,"url":"https://patchwork.plctlab.org/api/1.2/patches/176078/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208233759.2732806-1-ewlu@rivosinc.com/","msgid":"<20231208233759.2732806-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-08T23:37:59","name":"[V2] RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231208233759.2732806-1-ewlu@rivosinc.com/mbox/"},{"id":176088,"url":"https://patchwork.plctlab.org/api/1.2/patches/176088/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209004356.67577-1-mark@klomp.org/","msgid":"<20231209004356.67577-1-mark@klomp.org>","list_archive_url":null,"date":"2023-12-09T00:43:56","name":"[gcc-wwwdocs,COMMITTED] Disallow /cgit for web robots","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209004356.67577-1-mark@klomp.org/mbox/"},{"id":176110,"url":"https://patchwork.plctlab.org/api/1.2/patches/176110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkb0b00e.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:08:49","name":"strub: add note on attribute access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkb0b00e.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":176111,"url":"https://patchwork.plctlab.org/api/1.2/patches/176111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1e49kpn.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:24:36","name":"-finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ory1e49kpn.fsf@lxoliva.fsfla.org/mbox/"},{"id":176112,"url":"https://patchwork.plctlab.org/api/1.2/patches/176112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttos9kni.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:25:53","name":"-finline-stringops: don'\''t assume ptr_mode ptr in memset [PR112804]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttos9kni.fsf@lxoliva.fsfla.org/mbox/"},{"id":176113,"url":"https://patchwork.plctlab.org/api/1.2/patches/176113/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplzg9jqu.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:45:29","name":"-finline-stringops: check base blksize for memset [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplzg9jqu.fsf@lxoliva.fsfla.org/mbox/"},{"id":176114,"url":"https://patchwork.plctlab.org/api/1.2/patches/176114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea49jm5.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T02:48:18","name":"multiflags: fix doc warning","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea49jm5.fsf@lxoliva.fsfla.org/mbox/"},{"id":176117,"url":"https://patchwork.plctlab.org/api/1.2/patches/176117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209040629.1104489-1-juzhe.zhong@rivai.ai/","msgid":"<20231209040629.1104489-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-09T04:06:29","name":"RISC-V: Support highest overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209040629.1104489-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176132,"url":"https://patchwork.plctlab.org/api/1.2/patches/176132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyvfambh.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-09T07:04:34","name":"[v2] -finline-stringops: check base blksize for memset [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyvfambh.fsf@lxoliva.fsfla.org/mbox/"},{"id":176148,"url":"https://patchwork.plctlab.org/api/1.2/patches/176148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209083153.1131680-1-juzhe.zhong@rivai.ai/","msgid":"<20231209083153.1131680-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-09T08:31:53","name":"[Committed] RISC-V: Fix VLS mode movmiaslign bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209083153.1131680-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176151,"url":"https://patchwork.plctlab.org/api/1.2/patches/176151/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXQ0yJgLGWxAYnm0@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-09T09:35:04","name":"phiopt: Fix ICE with large --param l1-cache-line-size= [PR112887]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXQ0yJgLGWxAYnm0@tucnak/mbox/"},{"id":176178,"url":"https://patchwork.plctlab.org/api/1.2/patches/176178/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5cad739-77d0-4712-ac59-ec5b853bd964@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-09T13:18:36","name":"RISC-V: Recognize stepped series in expand_vec_perm_const.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5cad739-77d0-4712-ac59-ec5b853bd964@gmail.com/mbox/"},{"id":176191,"url":"https://patchwork.plctlab.org/api/1.2/patches/176191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140706.1100111-1-jwakely@redhat.com/","msgid":"<20231209140706.1100111-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-09T14:06:50","name":"[committed] libstdc++: Fix resolution of LWG 4016 for std::ranges::to [PR112876]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140706.1100111-1-jwakely@redhat.com/mbox/"},{"id":176193,"url":"https://patchwork.plctlab.org/api/1.2/patches/176193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140830.1100203-1-jwakely@redhat.com/","msgid":"<20231209140830.1100203-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-09T14:07:26","name":"[committed] libstdc++: Fix value of __cpp_lib_format macro [PR111826]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209140830.1100203-1-jwakely@redhat.com/mbox/"},{"id":176189,"url":"https://patchwork.plctlab.org/api/1.2/patches/176189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXR6bqrAb2qXdjuU@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-09T14:32:14","name":"[committed] testsuite: Add testcase for already fixed PR [PR112924]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXR6bqrAb2qXdjuU@tucnak/mbox/"},{"id":176192,"url":"https://patchwork.plctlab.org/api/1.2/patches/176192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209153944.3746165-1-lipeng.zhu@intel.com/","msgid":"<20231209153944.3746165-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-12-09T15:39:45","name":"[v7] libgfortran: Replace mutex with rwlock","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209153944.3746165-1-lipeng.zhu@intel.com/mbox/"},{"id":176196,"url":"https://patchwork.plctlab.org/api/1.2/patches/176196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209163831.5320-1-xry111@xry111.site/","msgid":"<20231209163831.5320-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T16:38:11","name":"LoongArch: Fix warnings building libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209163831.5320-1-xry111@xry111.site/mbox/"},{"id":176200,"url":"https://patchwork.plctlab.org/api/1.2/patches/176200/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-3-xry111@xry111.site/","msgid":"<20231209170347.12601-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:46","name":"[1/3] LoongArch: Include rtl.h for COSTS_N_INSNS instead of hard coding our own","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-3-xry111@xry111.site/mbox/"},{"id":176199,"url":"https://patchwork.plctlab.org/api/1.2/patches/176199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-4-xry111@xry111.site/","msgid":"<20231209170347.12601-4-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:47","name":"[2/3] LoongArch: Fix instruction costs [PR112936]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-4-xry111@xry111.site/mbox/"},{"id":176201,"url":"https://patchwork.plctlab.org/api/1.2/patches/176201/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-5-xry111@xry111.site/","msgid":"<20231209170347.12601-5-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-09T17:03:48","name":"[3/3] LoongArch: Add alslsi3_extend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209170347.12601-5-xry111@xry111.site/mbox/"},{"id":176224,"url":"https://patchwork.plctlab.org/api/1.2/patches/176224/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at/","msgid":"<7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-09T19:58:11","name":"v2 [C PATCH] Fix regression causing ICE for structs with VLAs [PR 112488]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7e4a91d16011c4d5ac5ab37412de78118a77fa63.camel@tugraz.at/mbox/"},{"id":176241,"url":"https://patchwork.plctlab.org/api/1.2/patches/176241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209205653.3930232-1-tom@tromey.com/","msgid":"<20231209205653.3930232-1-tom@tromey.com>","list_archive_url":null,"date":"2023-12-09T20:56:53","name":"Add some new DW_IDX_* constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231209205653.3930232-1-tom@tromey.com/mbox/"},{"id":176309,"url":"https://patchwork.plctlab.org/api/1.2/patches/176309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210085546.1531375-1-quic_apinski@quicinc.com/","msgid":"<20231210085546.1531375-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T08:55:46","name":"aarch64: Fix wrong code for bfloat when f16 is enabled [PR 111867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210085546.1531375-1-quic_apinski@quicinc.com/mbox/"},{"id":176315,"url":"https://patchwork.plctlab.org/api/1.2/patches/176315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210092125.1535761-1-quic_apinski@quicinc.com/","msgid":"<20231210092125.1535761-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T09:21:25","name":"expr: catch more `a*bool` while expanding [PR 112935]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210092125.1535761-1-quic_apinski@quicinc.com/mbox/"},{"id":176349,"url":"https://patchwork.plctlab.org/api/1.2/patches/176349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT37r+cbCfdcvS1naPELSSyeveg_ueSdzNB-dS+8AaybHA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T14:59:47","name":"tree-cfg: Fix misleading error message in verify_gimple_assign_single","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT37r+cbCfdcvS1naPELSSyeveg_ueSdzNB-dS+8AaybHA@mail.gmail.com/mbox/"},{"id":176361,"url":"https://patchwork.plctlab.org/api/1.2/patches/176361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210152015.126126-2-xndchn@gmail.com/","msgid":"<20231210152015.126126-2-xndchn@gmail.com>","list_archive_url":null,"date":"2023-12-10T15:20:15","name":"tree-cfg: Fix misleading error message in verify_gimple_assign_single.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210152015.126126-2-xndchn@gmail.com/mbox/"},{"id":176368,"url":"https://patchwork.plctlab.org/api/1.2/patches/176368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8bce888-17ba-4349-9d69-ef7ca66b0923@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T16:36:10","name":"[committed] Fix length computation for logical shifts on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c8bce888-17ba-4349-9d69-ef7ca66b0923@gmail.com/mbox/"},{"id":176370,"url":"https://patchwork.plctlab.org/api/1.2/patches/176370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com/","msgid":"<52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com>","list_archive_url":null,"date":"2023-12-10T17:08:15","name":"[committed] Fix length computation of single bit bitfield extraction on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/52975f8c-5656-4105-aac4-ae46b923c2b6@gmail.com/mbox/"},{"id":176376,"url":"https://patchwork.plctlab.org/api/1.2/patches/176376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b20a943c-30b3-4b6a-a045-08b3f5a99dd7@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T17:33:01","name":"[committed] Provide patterns for signed bitfield extractions on H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b20a943c-30b3-4b6a-a045-08b3f5a99dd7@gmail.com/mbox/"},{"id":176379,"url":"https://patchwork.plctlab.org/api/1.2/patches/176379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03662208-651f-458c-93a9-7aebdbc02586@gmail.com/","msgid":"<03662208-651f-458c-93a9-7aebdbc02586@gmail.com>","list_archive_url":null,"date":"2023-12-10T17:44:00","name":"[committed] Support uaddv and usubv on the H8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03662208-651f-458c-93a9-7aebdbc02586@gmail.com/mbox/"},{"id":176394,"url":"https://patchwork.plctlab.org/api/1.2/patches/176394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzfyhkf6g.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:53:11","name":"[pushed] aarch64: Add -funwind-tables to some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptzfyhkf6g.fsf@arm.com/mbox/"},{"id":176395,"url":"https://patchwork.plctlab.org/api/1.2/patches/176395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf49kf5l.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:53:42","name":"[pushed] aarch64: Skip some SME register save tests on BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptsf49kf5l.fsf@arm.com/mbox/"},{"id":176396,"url":"https://patchwork.plctlab.org/api/1.2/patches/176396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsuhkf4r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:54:12","name":"[pushed] aarch64: XFAIL some SME tests for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptmsuhkf4r.fsf@arm.com/mbox/"},{"id":176397,"url":"https://patchwork.plctlab.org/api/1.2/patches/176397/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6kpkf3r.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-10T19:54:48","name":"[pushed] aarch64: Fix SMSTART/SMSTOP save/restore for BE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpth6kpkf3r.fsf@arm.com/mbox/"},{"id":176399,"url":"https://patchwork.plctlab.org/api/1.2/patches/176399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-2-quic_apinski@quicinc.com/","msgid":"<20231210195650.1772459-2-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T19:56:49","name":"[1/2] analyzer: Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-2-quic_apinski@quicinc.com/mbox/"},{"id":176398,"url":"https://patchwork.plctlab.org/api/1.2/patches/176398/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-3-quic_apinski@quicinc.com/","msgid":"<20231210195650.1772459-3-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-10T19:56:50","name":"[PATCHv2,2/2] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231210195650.1772459-3-quic_apinski@quicinc.com/mbox/"},{"id":176417,"url":"https://patchwork.plctlab.org/api/1.2/patches/176417/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211011417.18263-1-wangfeng@eswincomputing.com/","msgid":"<20231211011417.18263-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-11T01:14:17","name":"[v3] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211011417.18263-1-wangfeng@eswincomputing.com/mbox/"},{"id":176421,"url":"https://patchwork.plctlab.org/api/1.2/patches/176421/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com/","msgid":"<1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T01:49:26","name":"[rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1a15d34c-f6fd-4e08-ac88-ccc5662d092a@linux.ibm.com/mbox/"},{"id":176436,"url":"https://patchwork.plctlab.org/api/1.2/patches/176436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3179721-0e0a-4790-b244-55c95465ecc3@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T02:54:32","name":"[rs6000] Clean up pre-checking of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/e3179721-0e0a-4790-b244-55c95465ecc3@linux.ibm.com/mbox/"},{"id":176447,"url":"https://patchwork.plctlab.org/api/1.2/patches/176447/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-1-guojiufu@linux.ibm.com/","msgid":"<20231211032604.3299841-1-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T03:26:03","name":"[V4,1/3] rs6000: accurate num_insns_constant_gpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-1-guojiufu@linux.ibm.com/mbox/"},{"id":176448,"url":"https://patchwork.plctlab.org/api/1.2/patches/176448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-2-guojiufu@linux.ibm.com/","msgid":"<20231211032604.3299841-2-guojiufu@linux.ibm.com>","list_archive_url":null,"date":"2023-12-11T03:26:04","name":"[V4,2/3] Using pli for constant splitting","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211032604.3299841-2-guojiufu@linux.ibm.com/mbox/"},{"id":176475,"url":"https://patchwork.plctlab.org/api/1.2/patches/176475/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211051919.3236502-1-juzhe.zhong@rivai.ai/","msgid":"<20231211051919.3236502-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T05:19:19","name":"RISC-V: Remove poly selftest when --preference=fixed-vlmax","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211051919.3236502-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176503,"url":"https://patchwork.plctlab.org/api/1.2/patches/176503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211064939.1751320-1-hongtao.liu@intel.com/","msgid":"<20231211064939.1751320-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-11T06:49:39","name":"[v3] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VCE d))).","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211064939.1751320-1-hongtao.liu@intel.com/mbox/"},{"id":176511,"url":"https://patchwork.plctlab.org/api/1.2/patches/176511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211073019.2352703-1-juzhe.zhong@rivai.ai/","msgid":"<20231211073019.2352703-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T07:30:19","name":"[Committed] RISC-V: Fix ICE in extract_single_source","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211073019.2352703-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176533,"url":"https://patchwork.plctlab.org/api/1.2/patches/176533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211083734.2548970-1-juzhe.zhong@rivai.ai/","msgid":"<20231211083734.2548970-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T08:37:34","name":"RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211083734.2548970-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176534,"url":"https://patchwork.plctlab.org/api/1.2/patches/176534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXbK8qYENq521KSd@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-11T08:40:18","name":"testsuite: Disable -fstack-protector* for some strub tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXbK8qYENq521KSd@tucnak/mbox/"},{"id":176553,"url":"https://patchwork.plctlab.org/api/1.2/patches/176553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211091928.D2392385840C@sourceware.org/","msgid":"<20231211091928.D2392385840C@sourceware.org>","list_archive_url":null,"date":"2023-12-11T09:17:58","name":"ipa/92606 - properly handle no_icf attribute for variables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211091928.D2392385840C@sourceware.org/mbox/"},{"id":176557,"url":"https://patchwork.plctlab.org/api/1.2/patches/176557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c41ae3-d053-41b9-8b66-35e88d1590e7@gjlay.de/","msgid":"","list_archive_url":null,"date":"2023-12-11T09:28:31","name":"[avr] PR112944: Support .rodata in RAM for AVR64* and AVR128* devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a9c41ae3-d053-41b9-8b66-35e88d1590e7@gjlay.de/mbox/"},{"id":176564,"url":"https://patchwork.plctlab.org/api/1.2/patches/176564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-2-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-2-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:26","name":"[1/3] RISC-V: movmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-2-slewis@rivosinc.com/mbox/"},{"id":176565,"url":"https://patchwork.plctlab.org/api/1.2/patches/176565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-3-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-3-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:27","name":"[2/3] RISC-V: setmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-3-slewis@rivosinc.com/mbox/"},{"id":176566,"url":"https://patchwork.plctlab.org/api/1.2/patches/176566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-4-slewis@rivosinc.com/","msgid":"<20231211094728.1623032-4-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-11T09:47:28","name":"[3/3] RISC-V: cmpmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211094728.1623032-4-slewis@rivosinc.com/mbox/"},{"id":176576,"url":"https://patchwork.plctlab.org/api/1.2/patches/176576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211100710.348988-1-ibuclaw@gdcproject.org/","msgid":"<20231211100710.348988-1-ibuclaw@gdcproject.org>","list_archive_url":null,"date":"2023-12-11T10:07:10","name":"[committed] d: Merge upstream dmd, druntime 2bbf64907c, phobos b64bfbf91","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211100710.348988-1-ibuclaw@gdcproject.org/mbox/"},{"id":176586,"url":"https://patchwork.plctlab.org/api/1.2/patches/176586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd5y15qbec.fsf@CeBiTec.Uni-Bielefeld.DE/","msgid":"","list_archive_url":null,"date":"2023-12-11T10:30:35","name":"ada: Fix Ada bootstrap on FreeBSD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ydd5y15qbec.fsf@CeBiTec.Uni-Bielefeld.DE/mbox/"},{"id":176613,"url":"https://patchwork.plctlab.org/api/1.2/patches/176613/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com/","msgid":"<16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T11:45:27","name":"OpenMP: Minor '\''!$omp allocators'\'' cleanup - and still: Re: [patch] OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/16bc2d0c-7228-43f8-803b-74a980510370@codesourcery.com/mbox/"},{"id":176634,"url":"https://patchwork.plctlab.org/api/1.2/patches/176634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211120156.1720292-1-juzhe.zhong@rivai.ai/","msgid":"<20231211120156.1720292-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T12:01:56","name":"RISC-V: Robostify shuffle index used by vrgather and fix regression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211120156.1720292-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176654,"url":"https://patchwork.plctlab.org/api/1.2/patches/176654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211121903.1864526-1-juzhe.zhong@rivai.ai/","msgid":"<20231211121903.1864526-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-11T12:19:03","name":"[COMMITTED,V2] RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211121903.1864526-1-juzhe.zhong@rivai.ai/mbox/"},{"id":176671,"url":"https://patchwork.plctlab.org/api/1.2/patches/176671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211122020.3645581-1-hongyu.wang@intel.com/","msgid":"<20231211122020.3645581-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-11T12:20:20","name":"i386: Fix missed APX_NDD check for shift/rotate expanders [PR 112943]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211122020.3645581-1-hongyu.wang@intel.com/mbox/"},{"id":176696,"url":"https://patchwork.plctlab.org/api/1.2/patches/176696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211125158.2872910-2-mikpelinux@gmail.com/","msgid":"<20231211125158.2872910-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2023-12-11T12:51:39","name":"wrong code on m68k with -mlong-jump-table-offsets and -malign-int (PR target/112413)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211125158.2872910-2-mikpelinux@gmail.com/mbox/"},{"id":176722,"url":"https://patchwork.plctlab.org/api/1.2/patches/176722/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211135401.1227845-1-poulhies@adacore.com/","msgid":"<20231211135401.1227845-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-11T13:35:52","name":"[v2] testsuite: adjust call to abort in excess-precision-12","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211135401.1227845-1-poulhies@adacore.com/mbox/"},{"id":176721,"url":"https://patchwork.plctlab.org/api/1.2/patches/176721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com/","msgid":"<76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com>","list_archive_url":null,"date":"2023-12-11T13:40:37","name":"RISC-V: testsuite: Fix strcmp-run.c test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/76c97d30-6c37-4f90-95f7-4e6231dd4331@gmail.com/mbox/"},{"id":176728,"url":"https://patchwork.plctlab.org/api/1.2/patches/176728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com/","msgid":"<20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com>","list_archive_url":null,"date":"2023-12-11T14:21:30","name":"Add myself to write after approval","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211142130.5jaawtw7ei6dyd6o@kalrayinc.com/mbox/"},{"id":176741,"url":"https://patchwork.plctlab.org/api/1.2/patches/176741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com/","msgid":"<3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com>","list_archive_url":null,"date":"2023-12-11T15:13:03","name":"[v4] aarch64: SVE/NEON Bridging intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3caeab7f-c38f-4640-bc51-d8245c05c860@arm.com/mbox/"},{"id":176742,"url":"https://patchwork.plctlab.org/api/1.2/patches/176742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y14g3vt.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T15:23:02","name":"Ping: [PATCH] Treat \"p\" in asms as addressing VOIDmode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y14g3vt.fsf@arm.com/mbox/"},{"id":176743,"url":"https://patchwork.plctlab.org/api/1.2/patches/176743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttooepa1.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-11T15:23:50","name":"Ping: [PATCH] Add a late-combine pass [PR106594]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptttooepa1.fsf@arm.com/mbox/"},{"id":176809,"url":"https://patchwork.plctlab.org/api/1.2/patches/176809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170004.1393588-1-ppalka@redhat.com/","msgid":"<20231211170004.1393588-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-11T17:00:04","name":"[pushed] c++: add fixed testcase [PR63378]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170004.1393588-1-ppalka@redhat.com/mbox/"},{"id":176810,"url":"https://patchwork.plctlab.org/api/1.2/patches/176810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-2-ams@codesourcery.com/","msgid":"<20231211170405.2538247-2-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:00","name":"[v3,1/6] libgomp: basic pinned memory on Linux","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-2-ams@codesourcery.com/mbox/"},{"id":176811,"url":"https://patchwork.plctlab.org/api/1.2/patches/176811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-3-ams@codesourcery.com/","msgid":"<20231211170405.2538247-3-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:01","name":"[v3,2/6] libgomp, openmp: Add ompx_pinned_mem_alloc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-3-ams@codesourcery.com/mbox/"},{"id":176812,"url":"https://patchwork.plctlab.org/api/1.2/patches/176812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-4-ams@codesourcery.com/","msgid":"<20231211170405.2538247-4-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:02","name":"[v3,3/6] openmp: Add -foffload-memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-4-ams@codesourcery.com/mbox/"},{"id":176814,"url":"https://patchwork.plctlab.org/api/1.2/patches/176814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-5-ams@codesourcery.com/","msgid":"<20231211170405.2538247-5-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:03","name":"[v3,4/6] openmp: -foffload-memory=pinned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-5-ams@codesourcery.com/mbox/"},{"id":176813,"url":"https://patchwork.plctlab.org/api/1.2/patches/176813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-6-ams@codesourcery.com/","msgid":"<20231211170405.2538247-6-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:04","name":"[v3,5/6] libgomp, nvptx: Cuda pinned memory","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-6-ams@codesourcery.com/mbox/"},{"id":176815,"url":"https://patchwork.plctlab.org/api/1.2/patches/176815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-7-ams@codesourcery.com/","msgid":"<20231211170405.2538247-7-ams@codesourcery.com>","list_archive_url":null,"date":"2023-12-11T17:04:05","name":"[v3,6/6] libgomp: fine-grained pinned memory allocator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211170405.2538247-7-ams@codesourcery.com/mbox/"},{"id":176856,"url":"https://patchwork.plctlab.org/api/1.2/patches/176856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkaw8vlx.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-11T18:03:38","name":"[v2,FYI] -finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkaw8vlx.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":176892,"url":"https://patchwork.plctlab.org/api/1.2/patches/176892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211191039.957070-1-jason@redhat.com/","msgid":"<20231211191039.957070-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-11T19:10:39","name":"[pushed] testsuite: update mangling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211191039.957070-1-jason@redhat.com/mbox/"},{"id":176917,"url":"https://patchwork.plctlab.org/api/1.2/patches/176917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211212240.3029438-1-dmalcolm@redhat.com/","msgid":"<20231211212240.3029438-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-11T21:22:40","name":"analyzer: fix uninitialized bitmap [PR112955]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231211212240.3029438-1-dmalcolm@redhat.com/mbox/"},{"id":177005,"url":"https://patchwork.plctlab.org/api/1.2/patches/177005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttoo6wb7.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T01:31:24","name":"multiflags: fix doc warning properly","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orttoo6wb7.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177006,"url":"https://patchwork.plctlab.org/api/1.2/patches/177006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea06uut.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T02:02:50","name":"[#1/2] strub: handle volatile promoted args in internal strub [PR112938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orlea06uut.fsf@lxoliva.fsfla.org/mbox/"},{"id":177009,"url":"https://patchwork.plctlab.org/api/1.2/patches/177009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020310.21388-1-wangfeng@eswincomputing.com/","msgid":"<20231212020310.21388-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:03:10","name":"[committed] MAINTAINERS: Add myself to write after approval and DCO","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020310.21388-1-wangfeng@eswincomputing.com/mbox/"},{"id":177011,"url":"https://patchwork.plctlab.org/api/1.2/patches/177011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020638.4131759-1-juzhe.zhong@rivai.ai/","msgid":"<20231212020638.4131759-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T02:06:38","name":"[Committed] RISC-V: Move RVV POLY VALUE estimation from riscv.cc to riscv-v.cc[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212020638.4131759-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177012,"url":"https://patchwork.plctlab.org/api/1.2/patches/177012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021326.36564-1-wangfeng@eswincomputing.com/","msgid":"<20231212021326.36564-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:13:26","name":"[committed] RISC-V: Add avail interface into function_group_info","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021326.36564-1-wangfeng@eswincomputing.com/mbox/"},{"id":177013,"url":"https://patchwork.plctlab.org/api/1.2/patches/177013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021910.8078-1-wangfeng@eswincomputing.com/","msgid":"<20231212021910.8078-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-12T02:19:10","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212021910.8078-1-wangfeng@eswincomputing.com/mbox/"},{"id":177050,"url":"https://patchwork.plctlab.org/api/1.2/patches/177050/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212023259.3053155-1-dmalcolm@redhat.com/","msgid":"<20231212023259.3053155-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-12T02:32:59","name":"[pushed] analyzer: add more test coverage for tainted modulus","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212023259.3053155-1-dmalcolm@redhat.com/mbox/"},{"id":177060,"url":"https://patchwork.plctlab.org/api/1.2/patches/177060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6ko6sr3.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-12T02:48:16","name":"[#2/2] strub: drop volatile from wrapper args [PR112938]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6ko6sr3.fsf@lxoliva.fsfla.org/mbox/"},{"id":177062,"url":"https://patchwork.plctlab.org/api/1.2/patches/177062/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212030031.1023808-1-jason@redhat.com/","msgid":"<20231212030031.1023808-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-12T03:00:31","name":"contrib: add git gcc-style alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212030031.1023808-1-jason@redhat.com/mbox/"},{"id":177104,"url":"https://patchwork.plctlab.org/api/1.2/patches/177104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212061208.234184-1-hongtao.liu@intel.com/","msgid":"<20231212061208.234184-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-12T06:12:08","name":"Adjust vectorized cost for reduction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212061208.234184-1-hongtao.liu@intel.com/mbox/"},{"id":177106,"url":"https://patchwork.plctlab.org/api/1.2/patches/177106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212064754.6623-1-xry111@xry111.site/","msgid":"<20231212064754.6623-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-12T06:47:28","name":"LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212064754.6623-1-xry111@xry111.site/mbox/"},{"id":177110,"url":"https://patchwork.plctlab.org/api/1.2/patches/177110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55a3078-56d0-1646-a96c-4e923a90833d@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T07:02:49","name":"[draft,v2] sched: Don'\''t skip empty block in scheduling [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c55a3078-56d0-1646-a96c-4e923a90833d@linux.ibm.com/mbox/"},{"id":177114,"url":"https://patchwork.plctlab.org/api/1.2/patches/177114/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212071552.2CAE4385AC1C@sourceware.org/","msgid":"<20231212071552.2CAE4385AC1C@sourceware.org>","list_archive_url":null,"date":"2023-12-12T07:14:23","name":"tree-optimization/112939 - VN PHI visiting and -ftrivial-auto-var-init","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212071552.2CAE4385AC1C@sourceware.org/mbox/"},{"id":177132,"url":"https://patchwork.plctlab.org/api/1.2/patches/177132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXgVTUV4I01zdMRS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T08:09:49","name":"[committed] libquadmath: Restore linking against -lm on most targets [PR112963]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXgVTUV4I01zdMRS@tucnak/mbox/"},{"id":177137,"url":"https://patchwork.plctlab.org/api/1.2/patches/177137/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082129.2556235-1-quic_apinski@quicinc.com/","msgid":"<20231212082129.2556235-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-12T08:21:29","name":"aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082129.2556235-1-quic_apinski@quicinc.com/mbox/"},{"id":177175,"url":"https://patchwork.plctlab.org/api/1.2/patches/177175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082849.1845268-1-pan2.li@intel.com/","msgid":"<20231212082849.1845268-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-12T08:28:49","name":"[v1] RISC-V: Disable RVV VCOMPRESS avl propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212082849.1845268-1-pan2.li@intel.com/mbox/"},{"id":177208,"url":"https://patchwork.plctlab.org/api/1.2/patches/177208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212095006.12830-1-xujiahao@loongson.cn/","msgid":"<20231212095006.12830-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-12T09:50:06","name":"LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212095006.12830-1-xujiahao@loongson.cn/mbox/"},{"id":177215,"url":"https://patchwork.plctlab.org/api/1.2/patches/177215/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212100132.3006956-1-demin.han@starfivetech.com/","msgid":"<20231212100132.3006956-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-12T10:01:32","name":"RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212100132.3006956-1-demin.han@starfivetech.com/mbox/"},{"id":177234,"url":"https://patchwork.plctlab.org/api/1.2/patches/177234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105315.55F403857BA4@sourceware.org/","msgid":"<20231212105315.55F403857BA4@sourceware.org>","list_archive_url":null,"date":"2023-12-12T10:51:40","name":"tree-optimization/112736 - avoid overread with non-grouped SLP load","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105315.55F403857BA4@sourceware.org/mbox/"},{"id":177235,"url":"https://patchwork.plctlab.org/api/1.2/patches/177235/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105411.1184445-1-juzhe.zhong@rivai.ai/","msgid":"<20231212105411.1184445-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T10:54:11","name":"RISC-V: Refactor Dynamic LMUL codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212105411.1184445-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177261,"url":"https://patchwork.plctlab.org/api/1.2/patches/177261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212111412.29351-1-xujiahao@loongson.cn/","msgid":"<20231212111412.29351-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-12T11:14:12","name":"[v2] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212111412.29351-1-xujiahao@loongson.cn/mbox/"},{"id":177275,"url":"https://patchwork.plctlab.org/api/1.2/patches/177275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-1-j@lambda.is/","msgid":"<20231212114125.1998866-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-12T11:41:24","name":"[v8,1/2] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-1-j@lambda.is/mbox/"},{"id":177274,"url":"https://patchwork.plctlab.org/api/1.2/patches/177274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-2-j@lambda.is/","msgid":"<20231212114125.1998866-2-j@lambda.is>","list_archive_url":null,"date":"2023-12-12T11:41:25","name":"[v8,2/2] Add gcov MC/DC tests for GDC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212114125.1998866-2-j@lambda.is/mbox/"},{"id":177288,"url":"https://patchwork.plctlab.org/api/1.2/patches/177288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212120809.13996-1-jiawei@iscas.ac.cn/","msgid":"<20231212120809.13996-1-jiawei@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-12T12:08:09","name":"[v2] RISC-V: Supports RISC-V Profiles in '\''-march'\'' option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212120809.13996-1-jiawei@iscas.ac.cn/mbox/"},{"id":177289,"url":"https://patchwork.plctlab.org/api/1.2/patches/177289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T12:09:22","name":"[committed] testsuite: Fix up test directive syntax errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"},{"id":177419,"url":"https://patchwork.plctlab.org/api/1.2/patches/177419/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745200.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:04:33","name":"[DejaGNU,1/1] Support per-test execution timeout factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745200.5892@tpp.orcam.me.uk/mbox/"},{"id":177370,"url":"https://patchwork.plctlab.org/api/1.2/patches/177370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745330.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:04:51","name":"[GCC,1/1] testsuite: Support test execution timeout factor as a keyword","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2312111745330.5892@tpp.orcam.me.uk/mbox/"},{"id":177374,"url":"https://patchwork.plctlab.org/api/1.2/patches/177374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212141410.8B98C385C419@sourceware.org/","msgid":"<20231212141410.8B98C385C419@sourceware.org>","list_archive_url":null,"date":"2023-12-12T14:12:39","name":"tree-optimization/112961 - include latch in if-conversion CSE","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212141410.8B98C385C419@sourceware.org/mbox/"},{"id":177377,"url":"https://patchwork.plctlab.org/api/1.2/patches/177377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212142552.102285-1-juzhe.zhong@rivai.ai/","msgid":"<20231212142552.102285-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-12T14:25:52","name":"RISC-V: Apply vla vs. vls mode heuristic vector COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212142552.102285-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177382,"url":"https://patchwork.plctlab.org/api/1.2/patches/177382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhwQVQzBiy2hv89@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2023-12-12T14:37:53","name":"Disable FMADD in chains for Zen4 and generic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhwQVQzBiy2hv89@kam.mff.cuni.cz/mbox/"},{"id":177405,"url":"https://patchwork.plctlab.org/api/1.2/patches/177405/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212152258.4164170-1-szabolcs.nagy@arm.com/","msgid":"<20231212152258.4164170-1-szabolcs.nagy@arm.com>","list_archive_url":null,"date":"2023-12-12T15:22:58","name":"[v3] aarch64,arm: Move branch-protection data to targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212152258.4164170-1-szabolcs.nagy@arm.com/mbox/"},{"id":177468,"url":"https://patchwork.plctlab.org/api/1.2/patches/177468/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2023-12-12T16:50:19","name":"SRA: Force gimple operand in an additional corner case (PR 112822)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65788f77.c80a0220.8cc2f.840fSMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":177502,"url":"https://patchwork.plctlab.org/api/1.2/patches/177502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212174845.1197227-1-jason@redhat.com/","msgid":"<20231212174845.1197227-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-12T17:48:45","name":"[pushed] testsuite: fix is_nothrow_default_constructible8.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212174845.1197227-1-jason@redhat.com/mbox/"},{"id":177508,"url":"https://patchwork.plctlab.org/api/1.2/patches/177508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184037.3040106-1-ppalka@redhat.com/","msgid":"<20231212184037.3040106-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-12T18:40:37","name":"c++: unifying FUNCTION_DECLs [PR93740]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184037.3040106-1-ppalka@redhat.com/mbox/"},{"id":177509,"url":"https://patchwork.plctlab.org/api/1.2/patches/177509/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184436.64547-1-xry111@xry111.site/","msgid":"<20231212184436.64547-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-12T18:43:36","name":"[pushed] LoongArch: testsuite: Remove XFAIL in vect-ftint-no-inexact.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212184436.64547-1-xry111@xry111.site/mbox/"},{"id":177530,"url":"https://patchwork.plctlab.org/api/1.2/patches/177530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6a844a01ebf4b6bb72efbc5f1c3e919@DRWHoldings.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T19:29:40","name":"c++: Fix warmth propagation for member function templates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a6a844a01ebf4b6bb72efbc5f1c3e919@DRWHoldings.com/mbox/"},{"id":177533,"url":"https://patchwork.plctlab.org/api/1.2/patches/177533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-2-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:51","name":"[v4,1/3] RISC-V: Add support for XCVelw extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-2-mary.bennett@embecosm.com/mbox/"},{"id":177534,"url":"https://patchwork.plctlab.org/api/1.2/patches/177534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-3-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:52","name":"[v4,2/3] RISC-V: Update XCValu constraints to match other vendors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-3-mary.bennett@embecosm.com/mbox/"},{"id":177535,"url":"https://patchwork.plctlab.org/api/1.2/patches/177535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-4-mary.bennett@embecosm.com/","msgid":"<20231212193253.220195-4-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2023-12-12T19:32:53","name":"[v4,3/3] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212193253.220195-4-mary.bennett@embecosm.com/mbox/"},{"id":177602,"url":"https://patchwork.plctlab.org/api/1.2/patches/177602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212212143.64983-1-ppalka@redhat.com/","msgid":"<20231212212143.64983-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-12T21:21:43","name":"c++: unifying constants vs their type [PR99186, PR104867]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212212143.64983-1-ppalka@redhat.com/mbox/"},{"id":177634,"url":"https://patchwork.plctlab.org/api/1.2/patches/177634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212223511.15390-1-david.faust@oracle.com/","msgid":"<20231212223511.15390-1-david.faust@oracle.com>","list_archive_url":null,"date":"2023-12-12T22:35:11","name":"btf: change encoding of forward-declared enums [PR111735]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212223511.15390-1-david.faust@oracle.com/mbox/"},{"id":177690,"url":"https://patchwork.plctlab.org/api/1.2/patches/177690/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224646.1518312-1-jwakely@redhat.com/","msgid":"<20231212224646.1518312-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:18","name":"[committed] libstdc++: Remove redundant -std flags from Makefile","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224646.1518312-1-jwakely@redhat.com/mbox/"},{"id":177673,"url":"https://patchwork.plctlab.org/api/1.2/patches/177673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224654.1518338-1-jwakely@redhat.com/","msgid":"<20231212224654.1518338-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:47","name":"[committed] libstdc++: Fix std::format output of %C for negative years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224654.1518338-1-jwakely@redhat.com/mbox/"},{"id":177716,"url":"https://patchwork.plctlab.org/api/1.2/patches/177716/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224702.1518352-1-jwakely@redhat.com/","msgid":"<20231212224702.1518352-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-12T22:46:55","name":"[committed] libstdc++: Fix std::format(\"{}\", '\''c'\'')","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212224702.1518352-1-jwakely@redhat.com/mbox/"},{"id":177635,"url":"https://patchwork.plctlab.org/api/1.2/patches/177635/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXjjT8Yn80pq7Bky@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-12T22:48:47","name":"[v3] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXjjT8Yn80pq7Bky@redhat.com/mbox/"},{"id":177668,"url":"https://patchwork.plctlab.org/api/1.2/patches/177668/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212231803.339670-1-lhyatt@gmail.com/","msgid":"<20231212231803.339670-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-12T23:18:03","name":"libcpp: Fix macro expansion for argument of __has_include [PR110558]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212231803.339670-1-lhyatt@gmail.com/mbox/"},{"id":177735,"url":"https://patchwork.plctlab.org/api/1.2/patches/177735/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213013107.34464-1-chenxiaolong@loongson.cn/","msgid":"<20231213013107.34464-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-13T01:31:07","name":"[v2] LoongArch: Modify the check type of the vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213013107.34464-1-chenxiaolong@loongson.cn/mbox/"},{"id":177752,"url":"https://patchwork.plctlab.org/api/1.2/patches/177752/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213021752.348476-1-haochen.jiang@intel.com/","msgid":"<20231213021752.348476-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-13T02:17:52","name":"i386: Fix PR110790 testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213021752.348476-1-haochen.jiang@intel.com/mbox/"},{"id":177759,"url":"https://patchwork.plctlab.org/api/1.2/patches/177759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkau6bvu.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-13T03:04:53","name":"[#2a/2] ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orbkau6bvu.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177760,"url":"https://patchwork.plctlab.org/api/1.2/patches/177760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5qe6btb.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-13T03:06:24","name":"[#2a/2] strub: indirect volatile parms in wrappers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ora5qe6btb.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":177766,"url":"https://patchwork.plctlab.org/api/1.2/patches/177766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213032451.8054-1-zengxiao@eswincomputing.com/","msgid":"<20231213032451.8054-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T03:24:51","name":"RISC-V: Add Zvfbfmin extension to the -march= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213032451.8054-1-zengxiao@eswincomputing.com/mbox/"},{"id":177769,"url":"https://patchwork.plctlab.org/api/1.2/patches/177769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213035405.2118-1-palmer@rivosinc.com/","msgid":"<20231213035405.2118-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-13T03:54:05","name":"RISC-V: Don'\''t make Ztso imply A","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213035405.2118-1-palmer@rivosinc.com/mbox/"},{"id":177782,"url":"https://patchwork.plctlab.org/api/1.2/patches/177782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213054811.331836-1-juzhe.zhong@rivai.ai/","msgid":"<20231213054811.331836-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-13T05:48:11","name":"RISC-V: Postpone full available optimization [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213054811.331836-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177807,"url":"https://patchwork.plctlab.org/api/1.2/patches/177807/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213072558.805297-1-demin.han@starfivetech.com/","msgid":"<20231213072558.805297-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-13T07:25:58","name":"RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213072558.805297-1-demin.han@starfivetech.com/mbox/"},{"id":177811,"url":"https://patchwork.plctlab.org/api/1.2/patches/177811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213080009.3E0F4385AE43@sourceware.org/","msgid":"<20231213080009.3E0F4385AE43@sourceware.org>","list_archive_url":null,"date":"2023-12-13T07:58:40","name":"middle-end/111591 - explain why TBAA doesn'\''t need adjustment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213080009.3E0F4385AE43@sourceware.org/mbox/"},{"id":177814,"url":"https://patchwork.plctlab.org/api/1.2/patches/177814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213082244.3760797-1-shihua@iscas.ac.cn/","msgid":"<20231213082244.3760797-1-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-13T08:22:44","name":"RISC-V: fix scalar crypto pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213082244.3760797-1-shihua@iscas.ac.cn/mbox/"},{"id":177815,"url":"https://patchwork.plctlab.org/api/1.2/patches/177815/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlqLxcI69T1ypbA@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:24:15","name":"attribs: Fix valgrind failures on -Wno-attributes* tests [PR112953]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlqLxcI69T1ypbA@tucnak/mbox/"},{"id":177817,"url":"https://patchwork.plctlab.org/api/1.2/patches/177817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXltpRf/CIlKnbxD@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:39:01","name":"libcpp: Fix valgrind errors on pr88974.c [PR112956]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXltpRf/CIlKnbxD@tucnak/mbox/"},{"id":177818,"url":"https://patchwork.plctlab.org/api/1.2/patches/177818/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084337.89B8A385B534@sourceware.org/","msgid":"<20231213084337.89B8A385B534@sourceware.org>","list_archive_url":null,"date":"2023-12-13T08:42:09","name":"tree-optimization/112991 - re-do PR112961 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084337.89B8A385B534@sourceware.org/mbox/"},{"id":177819,"url":"https://patchwork.plctlab.org/api/1.2/patches/177819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlu12NJxQVbvYfG@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T08:44:07","name":"i386: Fix ICE on __builtin_ia32_pabsd128 without lhs [PR112962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXlu12NJxQVbvYfG@tucnak/mbox/"},{"id":177820,"url":"https://patchwork.plctlab.org/api/1.2/patches/177820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084617.687873860745@sourceware.org/","msgid":"<20231213084617.687873860745@sourceware.org>","list_archive_url":null,"date":"2023-12-13T08:44:50","name":"tree-optimization/112990 - unsupported VEC_PERM from match pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213084617.687873860745@sourceware.org/mbox/"},{"id":177823,"url":"https://patchwork.plctlab.org/api/1.2/patches/177823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213090800.5F671385B526@sourceware.org/","msgid":"<20231213090800.5F671385B526@sourceware.org>","list_archive_url":null,"date":"2023-12-13T09:06:20","name":"Avoid losing MEM_REF offset in MEM_EXPR adjustment for stack slot sharing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213090800.5F671385B526@sourceware.org/mbox/"},{"id":177826,"url":"https://patchwork.plctlab.org/api/1.2/patches/177826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-1-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:47","name":"[v2,1/4] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-1-wangfeng@eswincomputing.com/mbox/"},{"id":177827,"url":"https://patchwork.plctlab.org/api/1.2/patches/177827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-2-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:48","name":"[v3,2/4] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-2-wangfeng@eswincomputing.com/mbox/"},{"id":177828,"url":"https://patchwork.plctlab.org/api/1.2/patches/177828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-3-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:49","name":"[v3,3/4] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-3-wangfeng@eswincomputing.com/mbox/"},{"id":177829,"url":"https://patchwork.plctlab.org/api/1.2/patches/177829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-4-wangfeng@eswincomputing.com/","msgid":"<20231213091250.30539-4-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T09:12:50","name":"[v3,4/4] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213091250.30539-4-wangfeng@eswincomputing.com/mbox/"},{"id":177831,"url":"https://patchwork.plctlab.org/api/1.2/patches/177831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213092107.191733-1-juzhe.zhong@rivai.ai/","msgid":"<20231213092107.191733-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-13T09:21:07","name":"Middle-end: Adjust decrement IV style partial vectorization COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213092107.191733-1-juzhe.zhong@rivai.ai/mbox/"},{"id":177832,"url":"https://patchwork.plctlab.org/api/1.2/patches/177832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl3pyJVPCP9L521@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T09:21:43","name":"i386: Make most MD builtins nothrow, leaf [PR112962]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl3pyJVPCP9L521@tucnak/mbox/"},{"id":177841,"url":"https://patchwork.plctlab.org/api/1.2/patches/177841/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl+DgQFUfnH5dJY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T09:49:02","name":"c++: Fix tinst_level::to_list [PR112968]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXl+DgQFUfnH5dJY@tucnak/mbox/"},{"id":177843,"url":"https://patchwork.plctlab.org/api/1.2/patches/177843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXmAzPc15GJrckZM@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-13T10:00:44","name":"lower-bitint: Fix lowering of non-_BitInt to _BitInt cast merged with some wider cast [PR112940]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXmAzPc15GJrckZM@tucnak/mbox/"},{"id":177881,"url":"https://patchwork.plctlab.org/api/1.2/patches/177881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213110733.4089129-1-c@jia.je/","msgid":"<20231213110733.4089129-1-c@jia.je>","list_archive_url":null,"date":"2023-12-13T11:07:22","name":"extend.texi: Fix typos in LSX intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213110733.4089129-1-c@jia.je/mbox/"},{"id":177890,"url":"https://patchwork.plctlab.org/api/1.2/patches/177890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213111203.618197-1-demin.han@starfivetech.com/","msgid":"<20231213111203.618197-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-13T11:12:03","name":"[v2] RISC-V: Fix dynamic lmul tests depended on abi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213111203.618197-1-demin.han@starfivetech.com/mbox/"},{"id":178036,"url":"https://patchwork.plctlab.org/api/1.2/patches/178036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123140.1610945-1-jwakely@redhat.com/","msgid":"<20231213123140.1610945-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-13T12:30:35","name":"[committed] libstdc++: Fix regression in std::format output of %Y for negative years","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123140.1610945-1-jwakely@redhat.com/mbox/"},{"id":177942,"url":"https://patchwork.plctlab.org/api/1.2/patches/177942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123224.0020C385332C@sourceware.org/","msgid":"<20231213123224.0020C385332C@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:30:52","name":"[1/6] Reduce the number of get_vectype_for_scalar_type calls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123224.0020C385332C@sourceware.org/mbox/"},{"id":177944,"url":"https://patchwork.plctlab.org/api/1.2/patches/177944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123257.BA2D6384DEF7@sourceware.org/","msgid":"<20231213123257.BA2D6384DEF7@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:30:59","name":"[2/6] Set LOOP_VINFO_VECT_FACTOR only when it is final","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123257.BA2D6384DEF7@sourceware.org/mbox/"},{"id":177946,"url":"https://patchwork.plctlab.org/api/1.2/patches/177946/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123306.2BC39388300A@sourceware.org/","msgid":"<20231213123306.2BC39388300A@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:05","name":"[3/6] Query an appropriate offset vector type in vect_gather_scatter_fn_p","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123306.2BC39388300A@sourceware.org/mbox/"},{"id":177943,"url":"https://patchwork.plctlab.org/api/1.2/patches/177943/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123246.16BE53845159@sourceware.org/","msgid":"<20231213123246.16BE53845159@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:12","name":"[4/6] More explicit vector types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123246.16BE53845159@sourceware.org/mbox/"},{"id":177945,"url":"https://patchwork.plctlab.org/api/1.2/patches/177945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123300.DFB4D387543C@sourceware.org/","msgid":"<20231213123300.DFB4D387543C@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:20","name":"[5/6] Allow poly_uint64 for group_size args to vector type query routines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123300.DFB4D387543C@sourceware.org/mbox/"},{"id":177947,"url":"https://patchwork.plctlab.org/api/1.2/patches/177947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123336.4544D3858D39@sourceware.org/","msgid":"<20231213123336.4544D3858D39@sourceware.org>","list_archive_url":null,"date":"2023-12-13T12:31:27","name":"[6/6] Defer assigning vector types until after VF is determined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213123336.4544D3858D39@sourceware.org/mbox/"},{"id":177985,"url":"https://patchwork.plctlab.org/api/1.2/patches/177985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213131748.35135-1-wangfeng@eswincomputing.com/","msgid":"<20231213131748.35135-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-13T13:17:48","name":"[committed] RISC-V:Add crypto vector implied ISA info.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213131748.35135-1-wangfeng@eswincomputing.com/mbox/"},{"id":177993,"url":"https://patchwork.plctlab.org/api/1.2/patches/177993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213134927.3453856-1-pan2.li@intel.com/","msgid":"<20231213134927.3453856-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-13T13:49:27","name":"[v1] RISC-V: Refine test cases for both PR112929 and PR112988","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213134927.3453856-1-pan2.li@intel.com/mbox/"},{"id":178043,"url":"https://patchwork.plctlab.org/api/1.2/patches/178043/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213142240.7974-1-xry111@xry111.site/","msgid":"<20231213142240.7974-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-13T14:20:09","name":"LoongArch: Use the movcf2gr instruction to implement cstore4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213142240.7974-1-xry111@xry111.site/mbox/"},{"id":178065,"url":"https://patchwork.plctlab.org/api/1.2/patches/178065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2ebaca6-7bae-7130-a160-33c4e7152670@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T14:47:47","name":"[committed,v2] aarch64: Add missing driver-aarch64 dependencies","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c2ebaca6-7bae-7130-a160-33c4e7152670@e124511.cambridge.arm.com/mbox/"},{"id":178066,"url":"https://patchwork.plctlab.org/api/1.2/patches/178066/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com/","msgid":"<4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-13T14:49:50","name":"[committed,v2] aarch64 testsuite: Check entire .arch string","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c6b3d33-103b-04be-f451-df04e2b0fd6c@e124511.cambridge.arm.com/mbox/"},{"id":178067,"url":"https://patchwork.plctlab.org/api/1.2/patches/178067/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com/","msgid":"<4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-13T14:52:26","name":"[v2] aarch64: Fix +nocrypto handling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4b906d4e-0624-184b-b296-283ac3479d5a@e124511.cambridge.arm.com/mbox/"},{"id":178069,"url":"https://patchwork.plctlab.org/api/1.2/patches/178069/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bffc7bdd-e883-697a-d210-729aab43d67d@e124511.cambridge.arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T14:58:45","name":"[v2] aarch64: Fix +nopredres, +nols64 and +nomops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bffc7bdd-e883-697a-d210-729aab43d67d@e124511.cambridge.arm.com/mbox/"},{"id":178085,"url":"https://patchwork.plctlab.org/api/1.2/patches/178085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c65c1f10-1591-40c2-a3a8-2281ab5a7ff3@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T15:17:52","name":"[wwwdocs] gcc-14/changes.html + project/gomp/: Update OpenMP status","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c65c1f10-1591-40c2-a3a8-2281ab5a7ff3@codesourcery.com/mbox/"},{"id":178101,"url":"https://patchwork.plctlab.org/api/1.2/patches/178101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213152615.4132230-1-c@jia.je/","msgid":"<20231213152615.4132230-1-c@jia.je>","list_archive_url":null,"date":"2023-12-13T15:26:01","name":"[v2] extend.texi: Fix typos in LSX intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213152615.4132230-1-c@jia.je/mbox/"},{"id":178142,"url":"https://patchwork.plctlab.org/api/1.2/patches/178142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4031e78-a5a0-4856-b951-643c4cc9de07@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T15:46:45","name":"[committed] amdgcn: XNACK support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4031e78-a5a0-4856-b951-643c4cc9de07@codesourcery.com/mbox/"},{"id":178147,"url":"https://patchwork.plctlab.org/api/1.2/patches/178147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXnX24ZRkpHr7B-m@localhost.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-13T16:12:11","name":"[v4] A new copy propagation and PHI elimination pass","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXnX24ZRkpHr7B-m@localhost.localdomain/mbox/"},{"id":178172,"url":"https://patchwork.plctlab.org/api/1.2/patches/178172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-1-jason@redhat.com/","msgid":"<20231213164740.1591535-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:37","name":"[pushed,1/4] c++: copy location to AGGR_INIT_EXPR","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-1-jason@redhat.com/mbox/"},{"id":178175,"url":"https://patchwork.plctlab.org/api/1.2/patches/178175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-2-jason@redhat.com/","msgid":"<20231213164740.1591535-2-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:38","name":"[pushed,2/4] c++: constant direct-initialization [PR108243]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-2-jason@redhat.com/mbox/"},{"id":178173,"url":"https://patchwork.plctlab.org/api/1.2/patches/178173/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-3-jason@redhat.com/","msgid":"<20231213164740.1591535-3-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:39","name":"[pushed,3/4] c++: fix in-charge parm in constexpr","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-3-jason@redhat.com/mbox/"},{"id":178174,"url":"https://patchwork.plctlab.org/api/1.2/patches/178174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-4-jason@redhat.com/","msgid":"<20231213164740.1591535-4-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T16:47:40","name":"[pushed,4/4] c++: End lifetime of objects in constexpr after destructor call [PR71093]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213164740.1591535-4-jason@redhat.com/mbox/"},{"id":178176,"url":"https://patchwork.plctlab.org/api/1.2/patches/178176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213165100.3260078-1-quic_apinski@quicinc.com/","msgid":"<20231213165100.3260078-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-13T16:51:00","name":"middle-end: Fix up constant handling in emit_conditional_move [PR111260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213165100.3260078-1-quic_apinski@quicinc.com/mbox/"},{"id":178291,"url":"https://patchwork.plctlab.org/api/1.2/patches/178291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213200622.1648999-1-jason@redhat.com/","msgid":"<20231213200622.1648999-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-13T20:06:22","name":"[pushed] c++: TARGET_EXPR location in default arg [PR96997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213200622.1648999-1-jason@redhat.com/mbox/"},{"id":178292,"url":"https://patchwork.plctlab.org/api/1.2/patches/178292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qd97s2.fsf@euler.schwinge.homeip.net/","msgid":"<87a5qd97s2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-13T20:17:33","name":"Fix '\''libgomp/config/linux/allocator.c'\'' '\''size_t'\'' vs. '\''%ld'\'' format string mismatch (was: Build breakage)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87a5qd97s2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178303,"url":"https://patchwork.plctlab.org/api/1.2/patches/178303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXob/Cn/URXcaNVP@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-13T21:02:52","name":"[2/2] aarch64: Handle autoinc addresses in ld1rq splitter [PR112906]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXob/Cn/URXcaNVP@arm.com/mbox/"},{"id":178304,"url":"https://patchwork.plctlab.org/api/1.2/patches/178304/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213210754.2641613-1-ewlu@rivosinc.com/","msgid":"<20231213210754.2641613-1-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-13T21:07:54","name":"[V3] RISC-V: XFAIL scan dump fails for autovec PR111311","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231213210754.2641613-1-ewlu@rivosinc.com/mbox/"},{"id":178383,"url":"https://patchwork.plctlab.org/api/1.2/patches/178383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39c1ec0-e16d-4235-9f6d-77f61cb3162b@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T00:26:20","name":"[committed] Minor testsuite fallout from c99 changes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f39c1ec0-e16d-4235-9f6d-77f61cb3162b@gmail.com/mbox/"},{"id":178415,"url":"https://patchwork.plctlab.org/api/1.2/patches/178415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214010904.1724915-1-jwakely@redhat.com/","msgid":"<20231214010904.1724915-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-14T01:07:32","name":"libstdc++: Optimize std::is_trivially_destructible_v","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214010904.1724915-1-jwakely@redhat.com/mbox/"},{"id":178402,"url":"https://patchwork.plctlab.org/api/1.2/patches/178402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214012301.2193148-1-vladimir.mezentsev@oracle.com/","msgid":"<20231214012301.2193148-1-vladimir.mezentsev@oracle.com>","list_archive_url":null,"date":"2023-12-14T01:23:01","name":"gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214012301.2193148-1-vladimir.mezentsev@oracle.com/mbox/"},{"id":178427,"url":"https://patchwork.plctlab.org/api/1.2/patches/178427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214025530.2007037-1-haochen.jiang@intel.com/","msgid":"<20231214025530.2007037-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-14T02:55:30","name":"i386: Remove RAO-INT from Grand Ridge","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214025530.2007037-1-haochen.jiang@intel.com/mbox/"},{"id":178440,"url":"https://patchwork.plctlab.org/api/1.2/patches/178440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214032343.124505-1-juzhe.zhong@rivai.ai/","msgid":"<20231214032343.124505-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T03:23:43","name":"RISC-V: Add RVV builtin vectorization cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214032343.124505-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178560,"url":"https://patchwork.plctlab.org/api/1.2/patches/178560/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqrcOiMerjD2VnT@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:14:56","name":"[committed] testsuite: Fix up target-enter-data-1.c on 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqrcOiMerjD2VnT@tucnak/mbox/"},{"id":178542,"url":"https://patchwork.plctlab.org/api/1.2/patches/178542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwHvSUCdIHr3tp@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:34:54","name":"match.pd: Simplify (t * u) / v -> t * (u / v) [PR112994]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwHvSUCdIHr3tp@tucnak/mbox/"},{"id":178544,"url":"https://patchwork.plctlab.org/api/1.2/patches/178544/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwuCz6am3WB+9c@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T07:37:28","name":"match.pd: Simplify (t * u) / (t * v) [PR112994]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXqwuCz6am3WB+9c@tucnak/mbox/"},{"id":178549,"url":"https://patchwork.plctlab.org/api/1.2/patches/178549/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org/","msgid":"<20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T07:41:00","name":"tree-optimization/110640 - testcase for fixed bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074105.5F1BC138F2@imap2.dmz-prg2.suse.org/mbox/"},{"id":178555,"url":"https://patchwork.plctlab.org/api/1.2/patches/178555/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074752.6196-1-juzhe.zhong@rivai.ai/","msgid":"<20231214074752.6196-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T07:47:52","name":"[Committed] RISC-V: Add failed SLP testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214074752.6196-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178556,"url":"https://patchwork.plctlab.org/api/1.2/patches/178556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214075402.464671-1-hongyu.wang@intel.com/","msgid":"<20231214075402.464671-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-14T07:54:02","name":"i386: Sync move_max/store_max with prefer-vector-width [PR112824]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214075402.464671-1-hongyu.wang@intel.com/mbox/"},{"id":178561,"url":"https://patchwork.plctlab.org/api/1.2/patches/178561/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com/","msgid":"<67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com>","list_archive_url":null,"date":"2023-12-14T08:18:47","name":"expmed: Get vec_extract element mode from insn_data, [PR112999]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/67552cb3-e08e-4003-a45d-9ed64bd7da43@gmail.com/mbox/"},{"id":178670,"url":"https://patchwork.plctlab.org/api/1.2/patches/178670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214112645.6454-1-xujiahao@loongson.cn/","msgid":"<20231214112645.6454-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-14T11:26:45","name":"LoongArch: Fix incorrect code generation for sad pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214112645.6454-1-xujiahao@loongson.cn/mbox/"},{"id":178697,"url":"https://patchwork.plctlab.org/api/1.2/patches/178697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214120713.23896-1-wangfeng@eswincomputing.com/","msgid":"<20231214120713.23896-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-14T12:07:13","name":"Revert \"RISC-V: Add avail interface into function_group_info\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214120713.23896-1-wangfeng@eswincomputing.com/mbox/"},{"id":178712,"url":"https://patchwork.plctlab.org/api/1.2/patches/178712/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214124904.5801-1-xujiahao@loongson.cn/","msgid":"<20231214124904.5801-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2023-12-14T12:49:04","name":"[v2] LoongArch: Fix incorrect code generation for sad pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214124904.5801-1-xujiahao@loongson.cn/mbox/"},{"id":178714,"url":"https://patchwork.plctlab.org/api/1.2/patches/178714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214125453.9824-1-wangfeng@eswincomputing.com/","msgid":"<20231214125453.9824-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-14T12:54:53","name":"[committed] Revert \"RISC-V: Add avail interface into function_group_info\"","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214125453.9824-1-wangfeng@eswincomputing.com/mbox/"},{"id":178725,"url":"https://patchwork.plctlab.org/api/1.2/patches/178725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfyc7wc1.fsf@euler.schwinge.homeip.net/","msgid":"<87zfyc7wc1.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-14T13:22:22","name":"In '\''gcc/gimple-ssa-sccopy.cc'\'', '\''#define INCLUDE_ALGORITHM'\'' instead of '\''#include '\'' (was: [PATCH v4] A new copy propagation and PHI elimination pass)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87zfyc7wc1.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178738,"url":"https://patchwork.plctlab.org/api/1.2/patches/178738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f530c44f-450a-43b9-98ed-d390ebf5f3c8@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T13:33:24","name":"[committed] Fix m68k testcase for c99","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f530c44f-450a-43b9-98ed-d390ebf5f3c8@gmail.com/mbox/"},{"id":178743,"url":"https://patchwork.plctlab.org/api/1.2/patches/178743/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214134559.137710-1-juzhe.zhong@rivai.ai/","msgid":"<20231214134559.137710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T13:45:59","name":"Middle-end: Do not model address cost for SELECT_VL style vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214134559.137710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178744,"url":"https://patchwork.plctlab.org/api/1.2/patches/178744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y10vqun.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T13:46:56","name":"aarch64: Improve handling of accumulators in early-ra","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt5y10vqun.fsf@arm.com/mbox/"},{"id":178747,"url":"https://patchwork.plctlab.org/api/1.2/patches/178747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214141340.3301765-1-dmalcolm@redhat.com/","msgid":"<20231214141340.3301765-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T14:13:40","name":"[pushed] analyzer: cleanups [PR112655]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214141340.3301765-1-dmalcolm@redhat.com/mbox/"},{"id":178769,"url":"https://patchwork.plctlab.org/api/1.2/patches/178769/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-2-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:40","name":"[1/4;,v3] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-2-dmalcolm@redhat.com/mbox/"},{"id":178771,"url":"https://patchwork.plctlab.org/api/1.2/patches/178771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-3-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:41","name":"[2/4;,v3] Add generated .opt.urls files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-3-dmalcolm@redhat.com/mbox/"},{"id":178766,"url":"https://patchwork.plctlab.org/api/1.2/patches/178766/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-4-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-4-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:42","name":"[3/4;,v2] opts: add logic to generate options-urls.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-4-dmalcolm@redhat.com/mbox/"},{"id":178767,"url":"https://patchwork.plctlab.org/api/1.2/patches/178767/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-5-dmalcolm@redhat.com/","msgid":"<20231214150143.3305661-5-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T15:01:43","name":"[4/4;,v2] options: wire up options-urls.cc into gcc_urlifier","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150143.3305661-5-dmalcolm@redhat.com/mbox/"},{"id":178768,"url":"https://patchwork.plctlab.org/api/1.2/patches/178768/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-2-arthur.cohen@embecosm.com/","msgid":"<20231214150539.12345-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-12-14T15:05:37","name":"[COMMITTED,1/4] libgrust: Add ChangeLog file","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-2-arthur.cohen@embecosm.com/mbox/"},{"id":178770,"url":"https://patchwork.plctlab.org/api/1.2/patches/178770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-3-arthur.cohen@embecosm.com/","msgid":"<20231214150539.12345-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2023-12-14T15:05:39","name":"[COMMITTED,2/4] libgrust: Add entry for maintainers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150539.12345-3-arthur.cohen@embecosm.com/mbox/"},{"id":178776,"url":"https://patchwork.plctlab.org/api/1.2/patches/178776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150806.519A1134B0@imap2.dmz-prg2.suse.org/","msgid":"<20231214150806.519A1134B0@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T15:08:05","name":"tree-optimization/112793 - SLP of constant/external code-generated twice","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214150806.519A1134B0@imap2.dmz-prg2.suse.org/mbox/"},{"id":178786,"url":"https://patchwork.plctlab.org/api/1.2/patches/178786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214155543.0B013138F2@imap2.dmz-prg2.suse.org/","msgid":"<20231214155543.0B013138F2@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-14T15:55:42","name":"tree-optimization/113018 - ICE with BB reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214155543.0B013138F2@imap2.dmz-prg2.suse.org/mbox/"},{"id":178881,"url":"https://patchwork.plctlab.org/api/1.2/patches/178881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191719.1941342-1-ppalka@redhat.com/","msgid":"<20231214191719.1941342-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-14T19:17:19","name":"c++: abi_tag attribute on templates [PR109715]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191719.1941342-1-ppalka@redhat.com/mbox/"},{"id":178882,"url":"https://patchwork.plctlab.org/api/1.2/patches/178882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191725.1941372-1-ppalka@redhat.com/","msgid":"<20231214191725.1941372-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-14T19:17:25","name":"c++: section attribute on templates [PR70435, PR88061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214191725.1941372-1-ppalka@redhat.com/mbox/"},{"id":178887,"url":"https://patchwork.plctlab.org/api/1.2/patches/178887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmtg36na.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:50:49","name":"hardened: use LD_PIE_SPEC only if defined","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orwmtg36na.fsf@lxoliva.fsfla.org/mbox/"},{"id":178888,"url":"https://patchwork.plctlab.org/api/1.2/patches/178888/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf4436ki.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:52:29","name":"strub: avoid lto inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orsf4436ki.fsf@lxoliva.fsfla.org/mbox/"},{"id":178890,"url":"https://patchwork.plctlab.org/api/1.2/patches/178890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7es36hr.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T19:54:08","name":"strub: use opt_for_fn during ipa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oro7es36hr.fsf@lxoliva.fsfla.org/mbox/"},{"id":178894,"url":"https://patchwork.plctlab.org/api/1.2/patches/178894/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpg35fe.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T20:17:09","name":"[#1/2] strub: sparc: omit frame in strub_leave [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orjzpg35fe.fsf@lxoliva.fsfla.org/mbox/"},{"id":178901,"url":"https://patchwork.plctlab.org/api/1.2/patches/178901/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXttN88kOtvRVn4t@redhat.com/","msgid":"","list_archive_url":null,"date":"2023-12-14T21:01:43","name":"[v4] c++: fix ICE with sizeof in a template [PR112869]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXttN88kOtvRVn4t@redhat.com/mbox/"},{"id":178902,"url":"https://patchwork.plctlab.org/api/1.2/patches/178902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214210227.1190177-1-polacek@redhat.com/","msgid":"<20231214210227.1190177-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-14T21:02:27","name":"c++: fix parsing with auto(x) at block scope [PR112482]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214210227.1190177-1-polacek@redhat.com/mbox/"},{"id":178903,"url":"https://patchwork.plctlab.org/api/1.2/patches/178903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il504hnr.fsf@euler.schwinge.homeip.net/","msgid":"<87il504hnr.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-14T21:07:36","name":"Update '\''gcc.dg/vect/vect-simd-clone-*.c'\'' GCN '\''dg-warning'\''s (was: [PATCH] aarch64: enable mixed-types for aarch64 simdclones)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87il504hnr.fsf@euler.schwinge.homeip.net/mbox/"},{"id":178911,"url":"https://patchwork.plctlab.org/api/1.2/patches/178911/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs04324k.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-14T21:28:27","name":"[#2/2] strub: sparc64: unbias the stack address [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orfs04324k.fsf@lxoliva.fsfla.org/mbox/"},{"id":178912,"url":"https://patchwork.plctlab.org/api/1.2/patches/178912/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213201.180346-1-patrick@rivosinc.com/","msgid":"<20231214213201.180346-1-patrick@rivosinc.com>","list_archive_url":null,"date":"2023-12-14T21:32:01","name":"RISC-V: Add -fno-vect-cost-model to pr112773 testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213201.180346-1-patrick@rivosinc.com/mbox/"},{"id":178914,"url":"https://patchwork.plctlab.org/api/1.2/patches/178914/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213800.796944-1-quic_apinski@quicinc.com/","msgid":"<20231214213800.796944-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-14T21:38:00","name":"[COMMITTED] middle-end: Fix up constant handling in emit_conditional_move [PR111260]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214213800.796944-1-quic_apinski@quicinc.com/mbox/"},{"id":178929,"url":"https://patchwork.plctlab.org/api/1.2/patches/178929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214215544.3328245-1-dmalcolm@redhat.com/","msgid":"<20231214215544.3328245-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-14T21:55:44","name":"[pushed] testsuite: move more analyzer test cases to c-c++-common (3) [PR96395]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214215544.3328245-1-dmalcolm@redhat.com/mbox/"},{"id":178932,"url":"https://patchwork.plctlab.org/api/1.2/patches/178932/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt+RP0GTiKhocIW@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:14:28","name":"lower-bitint: Fix .{ADD,SUB,MUL}_OVERFLOW with _BitInt large/huge INTEGER_CST arguments [PR113003]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt+RP0GTiKhocIW@tucnak/mbox/"},{"id":178934,"url":"https://patchwork.plctlab.org/api/1.2/patches/178934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt/yRs1g4MhLj+W@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:20:57","name":"bitint: Introduce abi_limb_mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXt/yRs1g4MhLj+W@tucnak/mbox/"},{"id":178936,"url":"https://patchwork.plctlab.org/api/1.2/patches/178936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222206.59796-1-juzhe.zhong@rivai.ai/","msgid":"<20231214222206.59796-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T22:22:06","name":"[Committed] RISC-V: Adjust test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222206.59796-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178940,"url":"https://patchwork.plctlab.org/api/1.2/patches/178940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222432.60088-1-juzhe.zhong@rivai.ai/","msgid":"<20231214222432.60088-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-14T22:24:32","name":"[Committed] RISC-V: Tweak generic vector COST model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231214222432.60088-1-juzhe.zhong@rivai.ai/mbox/"},{"id":178942,"url":"https://patchwork.plctlab.org/api/1.2/patches/178942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXuBaGAdwlccjKq8@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-14T22:27:52","name":"match.pd: Optimize sign-extension followed by truncation [PR113024]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXuBaGAdwlccjKq8@tucnak/mbox/"},{"id":178986,"url":"https://patchwork.plctlab.org/api/1.2/patches/178986/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000208.2068561-1-jwakely@redhat.com/","msgid":"<20231215000208.2068561-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:01:46","name":"[committed] libstdc++: Fix %S format of duration with floating-point rep","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000208.2068561-1-jwakely@redhat.com/mbox/"},{"id":178985,"url":"https://patchwork.plctlab.org/api/1.2/patches/178985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000216.2068946-1-jwakely@redhat.com/","msgid":"<20231215000216.2068946-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:09","name":"[committed] libstdc++: Add dg-output to two tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000216.2068946-1-jwakely@redhat.com/mbox/"},{"id":178988,"url":"https://patchwork.plctlab.org/api/1.2/patches/178988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000224.2069098-1-jwakely@redhat.com/","msgid":"<20231215000224.2069098-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:17","name":"[committed] libstdc++: Tweaks for std::format fast path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000224.2069098-1-jwakely@redhat.com/mbox/"},{"id":178987,"url":"https://patchwork.plctlab.org/api/1.2/patches/178987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000243.2069266-1-jwakely@redhat.com/","msgid":"<20231215000243.2069266-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:25","name":"[committed] libstdc++: Fix filebuf::native_handle() for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000243.2069266-1-jwakely@redhat.com/mbox/"},{"id":178993,"url":"https://patchwork.plctlab.org/api/1.2/patches/178993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000350.2069578-1-jwakely@redhat.com/","msgid":"<20231215000350.2069578-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T00:02:44","name":"[committed] libstdc++: Implement C++23 header [PR107760]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215000350.2069578-1-jwakely@redhat.com/mbox/"},{"id":178989,"url":"https://patchwork.plctlab.org/api/1.2/patches/178989/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215012258.31512-1-zengxiao@eswincomputing.com/","msgid":"<20231215012258.31512-1-zengxiao@eswincomputing.com>","list_archive_url":null,"date":"2023-12-15T01:22:58","name":"[PING^1] RISC-V: Add Zvfbfmin extension to the -march= option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215012258.31512-1-zengxiao@eswincomputing.com/mbox/"},{"id":178996,"url":"https://patchwork.plctlab.org/api/1.2/patches/178996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215023314.2708937-1-haochen.jiang@intel.com/","msgid":"<20231215023314.2708937-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-15T02:33:14","name":"i386: Allow 64 bit mask register for -mno-evex512","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215023314.2708937-1-haochen.jiang@intel.com/mbox/"},{"id":179019,"url":"https://patchwork.plctlab.org/api/1.2/patches/179019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215025750.159162-1-juzhe.zhong@rivai.ai/","msgid":"<20231215025750.159162-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T02:57:50","name":"RISC-V: Fix vmerge optimization bug in vec_perm vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215025750.159162-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179020,"url":"https://patchwork.plctlab.org/api/1.2/patches/179020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215030115.2757951-1-hongyu.wang@intel.com/","msgid":"<20231215030115.2757951-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2023-12-15T03:01:15","name":"testsuite: Require dfp for pr112943.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215030115.2757951-1-hongyu.wang@intel.com/mbox/"},{"id":179085,"url":"https://patchwork.plctlab.org/api/1.2/patches/179085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215080610.92416-1-juzhe.zhong@rivai.ai/","msgid":"<20231215080610.92416-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T08:06:10","name":"[Committed] RISC-V: Remove xfail for some of the SLP tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215080610.92416-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179095,"url":"https://patchwork.plctlab.org/api/1.2/patches/179095/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082234.421EE33E93@hamza.pair.com/","msgid":"<20231215082234.421EE33E93@hamza.pair.com>","list_archive_url":null,"date":"2023-12-15T08:22:28","name":"[pushed] doc: Update nvptx-tools Github link","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082234.421EE33E93@hamza.pair.com/mbox/"},{"id":179098,"url":"https://patchwork.plctlab.org/api/1.2/patches/179098/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082512.7FF7633E7A@hamza.pair.com/","msgid":"<20231215082512.7FF7633E7A@hamza.pair.com>","list_archive_url":null,"date":"2023-12-15T08:25:07","name":"[pushed] wwwdocs: projects/cli: Update ECMA reference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215082512.7FF7633E7A@hamza.pair.com/mbox/"},{"id":179111,"url":"https://patchwork.plctlab.org/api/1.2/patches/179111/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com/","msgid":"<834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com>","list_archive_url":null,"date":"2023-12-15T08:52:01","name":"sel-sched: Verify change before replacing dest in EXPR_INSN_RTX [PR112995]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/834db636-da81-ded9-3385-ae65a4cb7c91@linux.ibm.com/mbox/"},{"id":179117,"url":"https://patchwork.plctlab.org/api/1.2/patches/179117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215090223.3311-1-xry111@xry111.site/","msgid":"<20231215090223.3311-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-15T08:57:31","name":"[v2] LoongArch: Implement FCCmode reload and cstore4","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215090223.3311-1-xry111@xry111.site/mbox/"},{"id":179196,"url":"https://patchwork.plctlab.org/api/1.2/patches/179196/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215112809.0EBC513912@imap2.dmz-prg2.suse.org/","msgid":"<20231215112809.0EBC513912@imap2.dmz-prg2.suse.org>","list_archive_url":null,"date":"2023-12-15T11:28:08","name":"tree-optimization/113026 - avoid vector epilog in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215112809.0EBC513912@imap2.dmz-prg2.suse.org/mbox/"},{"id":179258,"url":"https://patchwork.plctlab.org/api/1.2/patches/179258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125531.279066-1-juzhe.zhong@rivai.ai/","msgid":"<20231215125531.279066-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-15T12:55:31","name":"[V2] RISC-V: Fix vmerge optimization bug in vec_perm vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125531.279066-1-juzhe.zhong@rivai.ai/mbox/"},{"id":179262,"url":"https://patchwork.plctlab.org/api/1.2/patches/179262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125727.308264-1-xry111@xry111.site/","msgid":"<20231215125727.308264-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-15T12:56:35","name":"LoongArch: Remove constraint z from movsi_internal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215125727.308264-1-xry111@xry111.site/mbox/"},{"id":179346,"url":"https://patchwork.plctlab.org/api/1.2/patches/179346/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132227.2139454-1-jwakely@redhat.com/","msgid":"<20231215132227.2139454-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:21:51","name":"[committed] libstdc++: Do not add padding for std::print to std::ostream","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132227.2139454-1-jwakely@redhat.com/mbox/"},{"id":179347,"url":"https://patchwork.plctlab.org/api/1.2/patches/179347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132244.2139474-1-jwakely@redhat.com/","msgid":"<20231215132244.2139474-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:22:28","name":"[committed] libstdc++: Simplify std::vprint_unicode for non-Windows targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132244.2139474-1-jwakely@redhat.com/mbox/"},{"id":179284,"url":"https://patchwork.plctlab.org/api/1.2/patches/179284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132254.2139490-1-jwakely@redhat.com/","msgid":"<20231215132254.2139490-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-15T13:22:45","name":"[committed] libstdc++: Fix std::print test case for Windows","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215132254.2139490-1-jwakely@redhat.com/mbox/"},{"id":179514,"url":"https://patchwork.plctlab.org/api/1.2/patches/179514/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-2-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:26","name":"[1/3,RFC] RISC-V: Add non-vector types to pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-2-ewlu@rivosinc.com/mbox/"},{"id":179515,"url":"https://patchwork.plctlab.org/api/1.2/patches/179515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-3-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:27","name":"[2/3,RFC] RISC-V: Add vector related reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-3-ewlu@rivosinc.com/mbox/"},{"id":179516,"url":"https://patchwork.plctlab.org/api/1.2/patches/179516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-4-ewlu@rivosinc.com/","msgid":"<20231215185328.794425-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2023-12-15T18:53:28","name":"[3/3,RFC] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231215185328.794425-4-ewlu@rivosinc.com/mbox/"},{"id":179678,"url":"https://patchwork.plctlab.org/api/1.2/patches/179678/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/657ced36.170a0220.f138a.ff27@mx.google.com/","msgid":"<657ced36.170a0220.f138a.ff27@mx.google.com>","list_archive_url":null,"date":"2023-12-16T00:20:02","name":"c++: Fix unchecked use of CLASSTYPE_AS_BASE [PR113031]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/657ced36.170a0220.f138a.ff27@mx.google.com/mbox/"},{"id":179720,"url":"https://patchwork.plctlab.org/api/1.2/patches/179720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com/","msgid":"<3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com>","list_archive_url":null,"date":"2023-12-16T00:47:23","name":"[committed,v4,5/5] aarch64: Add function multiversioning support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d63370a-9a38-0bac-36ab-ebe72fe4b1c4@e124511.cambridge.arm.com/mbox/"},{"id":179852,"url":"https://patchwork.plctlab.org/api/1.2/patches/179852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216140544.3424839-1-dmalcolm@redhat.com/","msgid":"<20231216140544.3424839-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T14:05:44","name":"[pushed] analyzer: use bit-level granularity for concrete bounds-checking [PR112792]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216140544.3424839-1-dmalcolm@redhat.com/mbox/"},{"id":179864,"url":"https://patchwork.plctlab.org/api/1.2/patches/179864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216155609.562884-1-hjl.tools@gmail.com/","msgid":"<20231216155609.562884-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-12-16T15:56:09","name":"x86: Get the previous shadow stack pointer from the restore token","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216155609.562884-1-hjl.tools@gmail.com/mbox/"},{"id":179915,"url":"https://patchwork.plctlab.org/api/1.2/patches/179915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-aad8c14c-b211-4687-96a9-db32950c47a1-1702751317953@3c-app-gmx-bs38/","msgid":"","list_archive_url":null,"date":"2023-12-16T18:28:37","name":"Fortran: fix argument passing to CONTIGUOUS,TARGET dummy [PR97592]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-aad8c14c-b211-4687-96a9-db32950c47a1-1702751317953@3c-app-gmx-bs38/mbox/"},{"id":179916,"url":"https://patchwork.plctlab.org/api/1.2/patches/179916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216184406.1779682-1-hjl.tools@gmail.com/","msgid":"<20231216184406.1779682-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2023-12-16T18:44:06","name":"libstdc++: Update some baseline_symbols.txt (x32)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216184406.1779682-1-hjl.tools@gmail.com/mbox/"},{"id":179921,"url":"https://patchwork.plctlab.org/api/1.2/patches/179921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKqmYPYDrC+fm=WdDj6x=9xkZT3FfWgyUBH0L-7yz_yScAN7Qg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-16T20:10:33","name":"PR libstdc++/112682 More efficient std::basic_string move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAKqmYPYDrC+fm=WdDj6x=9xkZT3FfWgyUBH0L-7yz_yScAN7Qg@mail.gmail.com/mbox/"},{"id":179926,"url":"https://patchwork.plctlab.org/api/1.2/patches/179926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212341.3443227-1-dmalcolm@redhat.com/","msgid":"<20231216212341.3443227-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T21:23:41","name":"[pushed] json: fix escaping of object keys","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212341.3443227-1-dmalcolm@redhat.com/mbox/"},{"id":179927,"url":"https://patchwork.plctlab.org/api/1.2/patches/179927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212347.3443252-1-dmalcolm@redhat.com/","msgid":"<20231216212347.3443252-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2023-12-16T21:23:47","name":"[pushed] analyzer: add sarif properties for bounds checking diagnostics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216212347.3443252-1-dmalcolm@redhat.com/mbox/"},{"id":179929,"url":"https://patchwork.plctlab.org/api/1.2/patches/179929/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225519.2306598-1-jwakely@redhat.com/","msgid":"<20231216225519.2306598-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-16T22:54:40","name":"[wwwdocs] Document std::print and std::ranges::to for C++23","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225519.2306598-1-jwakely@redhat.com/mbox/"},{"id":179936,"url":"https://patchwork.plctlab.org/api/1.2/patches/179936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225604.2306724-1-jwakely@redhat.com/","msgid":"<20231216225604.2306724-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-16T22:55:55","name":"[wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231216225604.2306724-1-jwakely@redhat.com/mbox/"},{"id":179931,"url":"https://patchwork.plctlab.org/api/1.2/patches/179931/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217000341.2325821-1-jwakely@redhat.com/","msgid":"<20231217000341.2325821-1-jwakely@redhat.com>","list_archive_url":null,"date":"2023-12-17T00:03:24","name":"[committed] libstdc++: Fix bootstrap on AIX due to fileno macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217000341.2325821-1-jwakely@redhat.com/mbox/"},{"id":179941,"url":"https://patchwork.plctlab.org/api/1.2/patches/179941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217012149.AA1DE33E9F@hamza.pair.com/","msgid":"<20231217012149.AA1DE33E9F@hamza.pair.com>","list_archive_url":null,"date":"2023-12-17T01:21:44","name":"[pushed] doc: Remove references to buildstat.html","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217012149.AA1DE33E9F@hamza.pair.com/mbox/"},{"id":179942,"url":"https://patchwork.plctlab.org/api/1.2/patches/179942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com/","msgid":"<4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com>","list_archive_url":null,"date":"2023-12-17T01:35:24","name":"install: Streamline the hppa*-hp-hpux* section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e180914-6f69-a2bc-157d-1d8fdb88142e@pfeifer.com/mbox/"},{"id":179966,"url":"https://patchwork.plctlab.org/api/1.2/patches/179966/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217072809.A836633EA9@hamza.pair.com/","msgid":"<20231217072809.A836633EA9@hamza.pair.com>","list_archive_url":null,"date":"2023-12-17T07:28:04","name":"[doc] install: Drop hppa*-hp-hpux10, remove old notes on hppa*-hp-hpux11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217072809.A836633EA9@hamza.pair.com/mbox/"},{"id":180031,"url":"https://patchwork.plctlab.org/api/1.2/patches/180031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151309.4128-2-xry111@xry111.site/","msgid":"<20231217151309.4128-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-17T15:12:18","name":"LoongArch: Fix FP vector comparsons [PR113034]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151309.4128-2-xry111@xry111.site/mbox/"},{"id":180032,"url":"https://patchwork.plctlab.org/api/1.2/patches/180032/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151713.4959-1-xry111@xry111.site/","msgid":"<20231217151713.4959-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-17T15:16:37","name":"LoongArch: Add sign_extend pattern for 32-bit rotate shift","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217151713.4959-1-xry111@xry111.site/mbox/"},{"id":180036,"url":"https://patchwork.plctlab.org/api/1.2/patches/180036/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfk6dr6.fsf@oldenburg.str.redhat.com/","msgid":"<87edfk6dr6.fsf@oldenburg.str.redhat.com>","list_archive_url":null,"date":"2023-12-17T15:38:05","name":"c-family: Use -Wdiscarded-qualifiers for ignored qualifiers in __atomic_*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfk6dr6.fsf@oldenburg.str.redhat.com/mbox/"},{"id":180051,"url":"https://patchwork.plctlab.org/api/1.2/patches/180051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at/","msgid":"<0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:41:50","name":"[V5,C,1/4] c23: tag compatibility rules for struct and unions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0ddfc2244740988d57b41c021b899f28f781c381.camel@tugraz.at/mbox/"},{"id":180052,"url":"https://patchwork.plctlab.org/api/1.2/patches/180052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at/","msgid":"<28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:02","name":"[V5,C,2/4] c23: tag compatibility rules for enums","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28350926d4c9d1c44272cf1237d5326453080bf2.camel@tugraz.at/mbox/"},{"id":180053,"url":"https://patchwork.plctlab.org/api/1.2/patches/180053/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at/","msgid":"<4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:29","name":"[V5,C,3/4] c23: aliasing of compatible tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4e466b016a63f97abf38094d1ec601c8c99f205a.camel@tugraz.at/mbox/"},{"id":180054,"url":"https://patchwork.plctlab.org/api/1.2/patches/180054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at/","msgid":"<65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-17T17:42:41","name":"[V5,C,4/4] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65c6d12e3a15500931f1aa2de73320cf6d374ccd.camel@tugraz.at/mbox/"},{"id":180057,"url":"https://patchwork.plctlab.org/api/1.2/patches/180057/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190242.4132478-1-sandra@codesourcery.com/","msgid":"<20231217190242.4132478-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-17T19:02:41","name":"[V4,3/5] OpenMP: Use enumerators for names of trait-sets and traits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190242.4132478-1-sandra@codesourcery.com/mbox/"},{"id":180058,"url":"https://patchwork.plctlab.org/api/1.2/patches/180058/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190310.4132740-1-sandra@codesourcery.com/","msgid":"<20231217190310.4132740-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-17T19:03:10","name":"[5/5] OpenMP: Add prettyprinter support for context selectors.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231217190310.4132740-1-sandra@codesourcery.com/mbox/"},{"id":180076,"url":"https://patchwork.plctlab.org/api/1.2/patches/180076/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/657f6d54.170a0220.7e557.2d05@mx.google.com/","msgid":"<657f6d54.170a0220.7e557.2d05@mx.google.com>","list_archive_url":null,"date":"2023-12-17T21:51:11","name":"c++: Check null pointer deref when calling memfn in constexpr [PR102420]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/657f6d54.170a0220.7e557.2d05@mx.google.com/mbox/"},{"id":180097,"url":"https://patchwork.plctlab.org/api/1.2/patches/180097/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218002223.2899237-1-pan2.li@intel.com/","msgid":"<20231218002223.2899237-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T00:22:23","name":"[v1] RISC-V: Fix POLY INT handle bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218002223.2899237-1-pan2.li@intel.com/mbox/"},{"id":180107,"url":"https://patchwork.plctlab.org/api/1.2/patches/180107/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com/","msgid":"<17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T02:43:40","name":"[Patchv2,rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/17f04e5b-da04-4303-874c-2596bcab4251@linux.ibm.com/mbox/"},{"id":180108,"url":"https://patchwork.plctlab.org/api/1.2/patches/180108/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com/","msgid":"<15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T02:44:09","name":"[Patchv2,rs6000] Clean up pre-checkings of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/15d40d24-f546-4351-9bed-e99b503ec1b9@linux.ibm.com/mbox/"},{"id":180128,"url":"https://patchwork.plctlab.org/api/1.2/patches/180128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032013.99095-1-juzhe.zhong@rivai.ai/","msgid":"<20231218032013.99095-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T03:20:13","name":"RISC-V: Fix natural regsize for fixed-vlmax of -march=rv64gc_zve32f","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032013.99095-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180131,"url":"https://patchwork.plctlab.org/api/1.2/patches/180131/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032800.18938-1-wangfeng@eswincomputing.com/","msgid":"<20231218032800.18938-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T03:28:00","name":"RISC-V: Add required_extensions in function_group","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218032800.18938-1-wangfeng@eswincomputing.com/mbox/"},{"id":180132,"url":"https://patchwork.plctlab.org/api/1.2/patches/180132/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-1-syq@gcc.gnu.org/","msgid":"<20231218034422.2668628-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-18T03:44:21","name":"[1/2] MIPS: host_detect_local_cpu, init ret with concat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-1-syq@gcc.gnu.org/mbox/"},{"id":180133,"url":"https://patchwork.plctlab.org/api/1.2/patches/180133/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-2-syq@gcc.gnu.org/","msgid":"<20231218034422.2668628-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-18T03:44:22","name":"[2/2] libiberty/reconcat: Add note about append string to NULL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218034422.2668628-2-syq@gcc.gnu.org/mbox/"},{"id":180155,"url":"https://patchwork.plctlab.org/api/1.2/patches/180155/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218064035.36034-1-xuli1@eswincomputing.com/","msgid":"<20231218064035.36034-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T06:40:35","name":"testsuite: Fix cpymem-1.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218064035.36034-1-xuli1@eswincomputing.com/mbox/"},{"id":180161,"url":"https://patchwork.plctlab.org/api/1.2/patches/180161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218065256.203306-1-juzhe.zhong@rivai.ai/","msgid":"<20231218065256.203306-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T06:52:56","name":"RISC-V: Enable vect test for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218065256.203306-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180163,"url":"https://patchwork.plctlab.org/api/1.2/patches/180163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070433.2000339-1-pan2.li@intel.com/","msgid":"<20231218070433.2000339-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T07:04:33","name":"[v1] RISC-V: Bugfix for the RVV const vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070433.2000339-1-pan2.li@intel.com/mbox/"},{"id":180165,"url":"https://patchwork.plctlab.org/api/1.2/patches/180165/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070502.11111-1-xuli1@eswincomputing.com/","msgid":"<20231218070502.11111-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-18T07:05:02","name":"[v2] testsuite: Fix cpymem-1.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218070502.11111-1-xuli1@eswincomputing.com/mbox/"},{"id":180177,"url":"https://patchwork.plctlab.org/api/1.2/patches/180177/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218073557.2020740-1-pan2.li@intel.com/","msgid":"<20231218073557.2020740-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-18T07:35:57","name":"[v2] RISC-V: Bugfix for the RVV const vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218073557.2020740-1-pan2.li@intel.com/mbox/"},{"id":180202,"url":"https://patchwork.plctlab.org/api/1.2/patches/180202/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAEH+Oi9+15lmzw@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T08:34:39","name":"tree-object-size: Robustify alloc_size attribute handling [PR113013]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAEH+Oi9+15lmzw@tucnak/mbox/"},{"id":180209,"url":"https://patchwork.plctlab.org/api/1.2/patches/180209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r5r99or.fsf@calavera/","msgid":"<878r5r99or.fsf@calavera>","list_archive_url":null,"date":"2023-12-18T08:36:37","name":"Patch: Remove unneeded double operation in libstdc++-v3/src/c++17/fs_path.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/878r5r99or.fsf@calavera/mbox/"},{"id":180210,"url":"https://patchwork.plctlab.org/api/1.2/patches/180210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAIw7rXF2tx9CBg@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T08:54:27","name":"[committed] testsuite: Fix up abi-tag25a.C test for C++11","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAIw7rXF2tx9CBg@tucnak/mbox/"},{"id":180230,"url":"https://patchwork.plctlab.org/api/1.2/patches/180230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218094908.54114-1-juzhe.zhong@rivai.ai/","msgid":"<20231218094908.54114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T09:49:08","name":"[V2] RISC-V: Enable vect test for RV32","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218094908.54114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180277,"url":"https://patchwork.plctlab.org/api/1.2/patches/180277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218105929.65434-1-juzhe.zhong@rivai.ai/","msgid":"<20231218105929.65434-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T10:59:29","name":"RISC-V: Support one more overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218105929.65434-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180278,"url":"https://patchwork.plctlab.org/api/1.2/patches/180278/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAnI7An6G6XWFSm@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T11:04:03","name":"[committed] libgomp: Make libgomp.c/declare-variant-1.c test x86 specific","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYAnI7An6G6XWFSm@tucnak/mbox/"},{"id":180287,"url":"https://patchwork.plctlab.org/api/1.2/patches/180287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218113521.71738-1-juzhe.zhong@rivai.ai/","msgid":"<20231218113521.71738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-18T11:35:21","name":"[V2] RISC-V: Support one more overlap for wv instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218113521.71738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180316,"url":"https://patchwork.plctlab.org/api/1.2/patches/180316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115144.23CE43857C63@sourceware.org/","msgid":"<20231218115144.23CE43857C63@sourceware.org>","list_archive_url":null,"date":"2023-12-18T11:50:06","name":"c/111975 - GIMPLE FE dumping and parsing of TARGET_MEM_REF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115144.23CE43857C63@sourceware.org/mbox/"},{"id":180326,"url":"https://patchwork.plctlab.org/api/1.2/patches/180326/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-2-andre.simoesdiasvieira@arm.com/","msgid":"<20231218115323.15980-2-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2023-12-18T11:53:22","name":"[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-2-andre.simoesdiasvieira@arm.com/mbox/"},{"id":180328,"url":"https://patchwork.plctlab.org/api/1.2/patches/180328/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-3-andre.simoesdiasvieira@arm.com/","msgid":"<20231218115323.15980-3-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2023-12-18T11:53:23","name":"[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218115323.15980-3-andre.simoesdiasvieira@arm.com/mbox/"},{"id":180428,"url":"https://patchwork.plctlab.org/api/1.2/patches/180428/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134251.1513432-1-xry111@xry111.site/","msgid":"<20231218134251.1513432-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-18T13:42:02","name":"middle-end: Call negate_rtx instead of simplify_gen_unary expanding rotate shift [PR113033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134251.1513432-1-xry111@xry111.site/mbox/"},{"id":180430,"url":"https://patchwork.plctlab.org/api/1.2/patches/180430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134414.1513666-1-xry111@xry111.site/","msgid":"<20231218134414.1513666-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-18T13:43:43","name":"LoongArch: Expand left rotate to right rotate with negated amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218134414.1513666-1-xry111@xry111.site/mbox/"},{"id":180450,"url":"https://patchwork.plctlab.org/api/1.2/patches/180450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218141024.89DCC3857C56@sourceware.org/","msgid":"<20231218141024.89DCC3857C56@sourceware.org>","list_archive_url":null,"date":"2023-12-18T14:08:49","name":"middle-end/111975 - dump -> GIMPLE FE roundtrip improvements","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218141024.89DCC3857C56@sourceware.org/mbox/"},{"id":180456,"url":"https://patchwork.plctlab.org/api/1.2/patches/180456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org/","msgid":"<610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org>","list_archive_url":null,"date":"2023-12-18T14:35:06","name":"SECURITY.txt: Drop \"exploitable\" in reference to hardening issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/610f86be-79bb-451f-a9c1-6fcbdc78a2c9@gotplt.org/mbox/"},{"id":180553,"url":"https://patchwork.plctlab.org/api/1.2/patches/180553/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218163424.1066771-1-quic_apinski@quicinc.com/","msgid":"<20231218163424.1066771-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-18T16:34:24","name":"[COMMITTED] SCCP: Fix ODR issues when compiling with LTO [PR 113054}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218163424.1066771-1-quic_apinski@quicinc.com/mbox/"},{"id":180558,"url":"https://patchwork.plctlab.org/api/1.2/patches/180558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218164252.1963249-1-siddhesh@gotplt.org/","msgid":"<20231218164252.1963249-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-12-18T16:42:52","name":"tree-object-size: Always set computed bit for bdos [PR113012]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218164252.1963249-1-siddhesh@gotplt.org/mbox/"},{"id":180570,"url":"https://patchwork.plctlab.org/api/1.2/patches/180570/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218165221.44037-2-xndchn@gmail.com/","msgid":"<20231218165221.44037-2-xndchn@gmail.com>","list_archive_url":null,"date":"2023-12-18T16:52:21","name":"gimple-fold.cc: enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contain padding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218165221.44037-2-xndchn@gmail.com/mbox/"},{"id":180571,"url":"https://patchwork.plctlab.org/api/1.2/patches/180571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6kfsazx.fsf@euler.schwinge.homeip.net/","msgid":"<87h6kfsazx.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-18T16:58:58","name":"libgrust: '\''AM_ENABLE_MULTILIB'\'' only for target builds [PR113056] (was: [PATCH v2 2/4] libgrust: Add libproc_macro and build system)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87h6kfsazx.fsf@euler.schwinge.homeip.net/mbox/"},{"id":180587,"url":"https://patchwork.plctlab.org/api/1.2/patches/180587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/01db01da31d6$33055200$990ff600$@nextmovesoftware.com/","msgid":"<01db01da31d6$33055200$990ff600$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-18T17:18:19","name":"[x86] Improved TImode (128-bit) integer constants on x86_64.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/01db01da31d6$33055200$990ff600$@nextmovesoftware.com/mbox/"},{"id":180627,"url":"https://patchwork.plctlab.org/api/1.2/patches/180627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6dbf6f4f-922c-4228-a34b-1b17489db6cd-1702923119190@3c-app-gmx-bs40/","msgid":"","list_archive_url":null,"date":"2023-12-18T18:11:59","name":"Fortran: update DATE_AND_TIME intrinsic for Fortran 2018 [PR96580]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-6dbf6f4f-922c-4228-a34b-1b17489db6cd-1702923119190@3c-app-gmx-bs40/mbox/"},{"id":180620,"url":"https://patchwork.plctlab.org/api/1.2/patches/180620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218185251.57671-1-krebbel@linux.ibm.com/","msgid":"<20231218185251.57671-1-krebbel@linux.ibm.com>","list_archive_url":null,"date":"2023-12-18T18:52:51","name":"[Committed] IBM Z: Cover weak symbols with -munaligned-symbols","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218185251.57671-1-krebbel@linux.ibm.com/mbox/"},{"id":180626,"url":"https://patchwork.plctlab.org/api/1.2/patches/180626/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYCaIpyzJkqFTJBq@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-18T19:14:42","name":"c: Split -Wcalloc-transposed-args warning from -Walloc-size, -Walloc-size fixes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYCaIpyzJkqFTJBq@tucnak/mbox/"},{"id":180637,"url":"https://patchwork.plctlab.org/api/1.2/patches/180637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195004.1238589-1-ppalka@redhat.com/","msgid":"<20231218195004.1238589-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:04","name":"c++: [[deprecated]] on template redecl [PR84542]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195004.1238589-1-ppalka@redhat.com/mbox/"},{"id":180638,"url":"https://patchwork.plctlab.org/api/1.2/patches/180638/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45c5452-1b17-43fe-a858-7bce23ee88f1@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T19:50:09","name":"fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a45c5452-1b17-43fe-a858-7bce23ee88f1@gmail.com/mbox/"},{"id":180639,"url":"https://patchwork.plctlab.org/api/1.2/patches/180639/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195013.1241371-1-ppalka@redhat.com/","msgid":"<20231218195013.1241371-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:13","name":"c++: local class memfn synth from uneval context [PR113063]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195013.1241371-1-ppalka@redhat.com/mbox/"},{"id":180640,"url":"https://patchwork.plctlab.org/api/1.2/patches/180640/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195021.1244349-1-ppalka@redhat.com/","msgid":"<20231218195021.1244349-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T19:50:21","name":"c++: bad direct reference binding [PR113064]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218195021.1244349-1-ppalka@redhat.com/mbox/"},{"id":180654,"url":"https://patchwork.plctlab.org/api/1.2/patches/180654/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z2AumLYtfSzYa_c=O5L35Q-C4ChERqj0ixXRsH+Khp_g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T21:27:19","name":"[committed] i386: Eliminate redundant compare between set{z, nz} and j{z, nz}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4Z2AumLYtfSzYa_c=O5L35Q-C4ChERqj0ixXRsH+Khp_g@mail.gmail.com/mbox/"},{"id":180656,"url":"https://patchwork.plctlab.org/api/1.2/patches/180656/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218213135.2720773-1-jason@redhat.com/","msgid":"<20231218213135.2720773-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-18T21:31:35","name":"[RFC] c++/modules: __class_type_info and modules","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218213135.2720773-1-jason@redhat.com/mbox/"},{"id":180667,"url":"https://patchwork.plctlab.org/api/1.2/patches/180667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/269d021e-7aad-22de-1469-f332abbfede9@redhat.com/","msgid":"<269d021e-7aad-22de-1469-f332abbfede9@redhat.com>","list_archive_url":null,"date":"2023-12-18T22:16:38","name":"[pushed,PR112918,LRA] : Fixing IRA ICE on m68k","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/269d021e-7aad-22de-1469-f332abbfede9@redhat.com/mbox/"},{"id":180670,"url":"https://patchwork.plctlab.org/api/1.2/patches/180670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYDHvnz5bi//bzdQ@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-18T22:29:18","name":"aarch64: Fix parens in aarch64_stp_reg_operand [PR113061]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYDHvnz5bi//bzdQ@arm.com/mbox/"},{"id":180683,"url":"https://patchwork.plctlab.org/api/1.2/patches/180683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218230631.1779040-1-ppalka@redhat.com/","msgid":"<20231218230631.1779040-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-18T23:06:31","name":"[pushed] libstdc++: Make ranges::to closure objects SFINAE-friendly [PR112802]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231218230631.1779040-1-ppalka@redhat.com/mbox/"},{"id":180702,"url":"https://patchwork.plctlab.org/api/1.2/patches/180702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219012341.11792-1-wangfeng@eswincomputing.com/","msgid":"<20231219012341.11792-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T01:23:41","name":"[committed] RISC-V: Add required_extensions in function_group","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219012341.11792-1-wangfeng@eswincomputing.com/mbox/"},{"id":180705,"url":"https://patchwork.plctlab.org/api/1.2/patches/180705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219013049.3165982-1-syq@gcc.gnu.org/","msgid":"<20231219013049.3165982-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-19T01:30:49","name":"[v2] MIPS: Put the ret to the end of args of reconcat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219013049.3165982-1-syq@gcc.gnu.org/mbox/"},{"id":180709,"url":"https://patchwork.plctlab.org/api/1.2/patches/180709/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219014455.33713-1-xuli1@eswincomputing.com/","msgid":"<20231219014455.33713-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T01:44:55","name":"testsuite: Fix cpymem-2.c dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219014455.33713-1-xuli1@eswincomputing.com/mbox/"},{"id":180738,"url":"https://patchwork.plctlab.org/api/1.2/patches/180738/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219041633.209503-1-juzhe.zhong@rivai.ai/","msgid":"<20231219041633.209503-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T04:16:33","name":"[Committed] RISC-V: Remove 256/512/1024 VLS vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219041633.209503-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180748,"url":"https://patchwork.plctlab.org/api/1.2/patches/180748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219043523.215375-1-juzhe.zhong@rivai.ai/","msgid":"<20231219043523.215375-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T04:35:23","name":"[Committed] RISC-V: Fix FAIL of dynamic-lmul2-7.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219043523.215375-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180759,"url":"https://patchwork.plctlab.org/api/1.2/patches/180759/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053000.2741-1-xuli1@eswincomputing.com/","msgid":"<20231219053000.2741-1-xuli1@eswincomputing.com>","list_archive_url":null,"date":"2023-12-19T05:30:00","name":"testsuite: Fix dump checks under different riscv-sim for RVV.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053000.2741-1-xuli1@eswincomputing.com/mbox/"},{"id":180761,"url":"https://patchwork.plctlab.org/api/1.2/patches/180761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053853.3764283-1-hongtao.liu@intel.com/","msgid":"<20231219053853.3764283-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2023-12-19T05:38:53","name":"Optimize A < B ? A : B to MIN_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219053853.3764283-1-hongtao.liu@intel.com/mbox/"},{"id":180788,"url":"https://patchwork.plctlab.org/api/1.2/patches/180788/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-2-xry111@xry111.site/","msgid":"<20231219065957.70665-2-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-19T06:59:56","name":"[1/2] LoongArch: Use force_reg instead of gen_reg_rtx + emit_move_insn in vec_init expander [PR113033]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-2-xry111@xry111.site/mbox/"},{"id":180789,"url":"https://patchwork.plctlab.org/api/1.2/patches/180789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-3-xry111@xry111.site/","msgid":"<20231219065957.70665-3-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-19T06:59:57","name":"[2/2] LoongArch: Clean up vec_init expander","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219065957.70665-3-xry111@xry111.site/mbox/"},{"id":180828,"url":"https://patchwork.plctlab.org/api/1.2/patches/180828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084231.1758550-1-juzhe.zhong@rivai.ai/","msgid":"<20231219084231.1758550-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T08:42:30","name":"[Committed] RISC-V: Force scalable vector on all vsetvl tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084231.1758550-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180827,"url":"https://patchwork.plctlab.org/api/1.2/patches/180827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084317.58579-1-chenxiaolong@loongson.cn/","msgid":"<20231219084317.58579-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-19T08:43:17","name":"[v1] LoongArch: Fix builtin function prototypes for LASX in doc.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219084317.58579-1-chenxiaolong@loongson.cn/mbox/"},{"id":180839,"url":"https://patchwork.plctlab.org/api/1.2/patches/180839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFbkrzkdwHhPghN@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-19T09:00:02","name":"i386: Fix mmx.md signbit expanders [PR112816]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFbkrzkdwHhPghN@tucnak/mbox/"},{"id":180844,"url":"https://patchwork.plctlab.org/api/1.2/patches/180844/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFgN6TSlhCDc6xA@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-19T09:19:51","name":"aarch64: Validate register operands early in ldp fusion pass [PR113062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYFgN6TSlhCDc6xA@arm.com/mbox/"},{"id":180851,"url":"https://patchwork.plctlab.org/api/1.2/patches/180851/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-2-slewis@rivosinc.com/","msgid":"<20231219095348.356551-2-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:46","name":"[v2,1/3] RISC-V: movmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-2-slewis@rivosinc.com/mbox/"},{"id":180853,"url":"https://patchwork.plctlab.org/api/1.2/patches/180853/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-3-slewis@rivosinc.com/","msgid":"<20231219095348.356551-3-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:47","name":"[v2,2/3] RISC-V: setmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-3-slewis@rivosinc.com/mbox/"},{"id":180852,"url":"https://patchwork.plctlab.org/api/1.2/patches/180852/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-4-slewis@rivosinc.com/","msgid":"<20231219095348.356551-4-slewis@rivosinc.com>","list_archive_url":null,"date":"2023-12-19T09:53:48","name":"[v2,3/3] RISC-V: cmpmem for RISCV with V extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219095348.356551-4-slewis@rivosinc.com/mbox/"},{"id":180862,"url":"https://patchwork.plctlab.org/api/1.2/patches/180862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219105635.2566878-1-juzhe.zhong@rivai.ai/","msgid":"<20231219105635.2566878-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T10:56:35","name":"[Committed] RISC-V: Refine some codes of expand_const_vector [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219105635.2566878-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180872,"url":"https://patchwork.plctlab.org/api/1.2/patches/180872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219110449.30805-1-chenglulu@loongson.cn/","msgid":"<20231219110449.30805-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-19T11:04:50","name":"LoongArch: Added TLS Le Relax support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219110449.30805-1-chenglulu@loongson.cn/mbox/"},{"id":180876,"url":"https://patchwork.plctlab.org/api/1.2/patches/180876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219111913.2568903-1-juzhe.zhong@rivai.ai/","msgid":"<20231219111913.2568903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T11:19:13","name":"Regression FIX: Remove vect_variable_length XFAIL from some tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219111913.2568903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180877,"url":"https://patchwork.plctlab.org/api/1.2/patches/180877/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net/","msgid":"<87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-19T11:20:01","name":"Unify OpenACC/C and C++ behavior re duplicate OpenACC '\''declare'\'' directives for '\''extern'\'' variables [PR90868] (was: [committed] [PR90868] Document status quo for duplicate OpenACC '\''declare'\'' directives for '\''extern'\'' variables)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87y1dqv3q6.fsf@dirichlet.schwinge.homeip.net/mbox/"},{"id":180883,"url":"https://patchwork.plctlab.org/api/1.2/patches/180883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219114048.2570818-1-juzhe.zhong@rivai.ai/","msgid":"<20231219114048.2570818-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-19T11:40:48","name":"RISC-V: Fix FAIL of bb-slp-cond-1.c for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219114048.2570818-1-juzhe.zhong@rivai.ai/mbox/"},{"id":180904,"url":"https://patchwork.plctlab.org/api/1.2/patches/180904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123235.08F453861816@sourceware.org/","msgid":"<20231219123235.08F453861816@sourceware.org>","list_archive_url":null,"date":"2023-12-19T12:30:58","name":"tree-optimization/113073 - amend PR112736 fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123235.08F453861816@sourceware.org/mbox/"},{"id":180905,"url":"https://patchwork.plctlab.org/api/1.2/patches/180905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123251.29740386076C@sourceware.org/","msgid":"<20231219123251.29740386076C@sourceware.org>","list_archive_url":null,"date":"2023-12-19T12:31:13","name":"tree-optimization/113080 - missing final value replacement","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219123251.29740386076C@sourceware.org/mbox/"},{"id":180987,"url":"https://patchwork.plctlab.org/api/1.2/patches/180987/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219142956.454370-1-poulhies@adacore.com/","msgid":"<20231219142956.454370-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:29:56","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219142956.454370-1-poulhies@adacore.com/mbox/"},{"id":180988,"url":"https://patchwork.plctlab.org/api/1.2/patches/180988/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143005.454530-1-poulhies@adacore.com/","msgid":"<20231219143005.454530-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:05","name":"[COMMITTED] ada: Illegal instance of Generic_1.Generic_2 incorrectly accepted","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143005.454530-1-poulhies@adacore.com/mbox/"},{"id":180990,"url":"https://patchwork.plctlab.org/api/1.2/patches/180990/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143008.454633-1-poulhies@adacore.com/","msgid":"<20231219143008.454633-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:08","name":"[COMMITTED] ada: Cleanup SPARK legality checking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143008.454633-1-poulhies@adacore.com/mbox/"},{"id":181014,"url":"https://patchwork.plctlab.org/api/1.2/patches/181014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143027.454697-1-poulhies@adacore.com/","msgid":"<20231219143027.454697-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:10","name":"[COMMITTED] ada: Do not issue SPARK legality error if SPARK_Mode ignored","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143027.454697-1-poulhies@adacore.com/mbox/"},{"id":180992,"url":"https://patchwork.plctlab.org/api/1.2/patches/180992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143030.454782-1-poulhies@adacore.com/","msgid":"<20231219143030.454782-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:30","name":"[COMMITTED] ada: Restore object constraint optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143030.454782-1-poulhies@adacore.com/mbox/"},{"id":180995,"url":"https://patchwork.plctlab.org/api/1.2/patches/180995/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143032.454847-1-poulhies@adacore.com/","msgid":"<20231219143032.454847-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:32","name":"[COMMITTED] ada: Cope with Sem_Util.Enclosing_Declaration oddness.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143032.454847-1-poulhies@adacore.com/mbox/"},{"id":180993,"url":"https://patchwork.plctlab.org/api/1.2/patches/180993/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143034.454911-1-poulhies@adacore.com/","msgid":"<20231219143034.454911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:33","name":"[COMMITTED] ada: Plug small loophole in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143034.454911-1-poulhies@adacore.com/mbox/"},{"id":180997,"url":"https://patchwork.plctlab.org/api/1.2/patches/180997/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143035.454977-1-poulhies@adacore.com/","msgid":"<20231219143035.454977-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:35","name":"[COMMITTED] ada: Fix spurious visibility error on parent'\''s component in instance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143035.454977-1-poulhies@adacore.com/mbox/"},{"id":181015,"url":"https://patchwork.plctlab.org/api/1.2/patches/181015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143037.455041-1-poulhies@adacore.com/","msgid":"<20231219143037.455041-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:37","name":"[COMMITTED] ada: Add missing guard to previous change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143037.455041-1-poulhies@adacore.com/mbox/"},{"id":180998,"url":"https://patchwork.plctlab.org/api/1.2/patches/180998/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143039.455106-1-poulhies@adacore.com/","msgid":"<20231219143039.455106-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:39","name":"[COMMITTED] ada: Fix SPARK expansion of container aggregates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143039.455106-1-poulhies@adacore.com/mbox/"},{"id":181008,"url":"https://patchwork.plctlab.org/api/1.2/patches/181008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143041.455170-1-poulhies@adacore.com/","msgid":"<20231219143041.455170-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:41","name":"[COMMITTED] ada: Further cleanup in finalization machinery","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143041.455170-1-poulhies@adacore.com/mbox/"},{"id":181004,"url":"https://patchwork.plctlab.org/api/1.2/patches/181004/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143043.455234-1-poulhies@adacore.com/","msgid":"<20231219143043.455234-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:43","name":"[COMMITTED] ada: Fix crash on concurrent type aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143043.455234-1-poulhies@adacore.com/mbox/"},{"id":180996,"url":"https://patchwork.plctlab.org/api/1.2/patches/180996/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143045.455298-1-poulhies@adacore.com/","msgid":"<20231219143045.455298-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:45","name":"[COMMITTED] ada: Adapt Ada.Command_Line to work on configurable runtimes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143045.455298-1-poulhies@adacore.com/mbox/"},{"id":181001,"url":"https://patchwork.plctlab.org/api/1.2/patches/181001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143047.455362-1-poulhies@adacore.com/","msgid":"<20231219143047.455362-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:47","name":"[COMMITTED] ada: Remove No_Dynamic_Priorities from Restricted_Tasking","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143047.455362-1-poulhies@adacore.com/mbox/"},{"id":181016,"url":"https://patchwork.plctlab.org/api/1.2/patches/181016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143049.455426-1-poulhies@adacore.com/","msgid":"<20231219143049.455426-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:49","name":"[COMMITTED] ada: Rename Is_Constr_Subt_For_UN_Aliased flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143049.455426-1-poulhies@adacore.com/mbox/"},{"id":181003,"url":"https://patchwork.plctlab.org/api/1.2/patches/181003/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143050.455490-1-poulhies@adacore.com/","msgid":"<20231219143050.455490-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:50","name":"[COMMITTED] ada: Ignore unconstrained components as inputs for Depends","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143050.455490-1-poulhies@adacore.com/mbox/"},{"id":181011,"url":"https://patchwork.plctlab.org/api/1.2/patches/181011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143052.455554-1-poulhies@adacore.com/","msgid":"<20231219143052.455554-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:52","name":"[COMMITTED] ada: Optimize performance and remove dynamic frame requirement.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143052.455554-1-poulhies@adacore.com/mbox/"},{"id":181017,"url":"https://patchwork.plctlab.org/api/1.2/patches/181017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143054.455618-1-poulhies@adacore.com/","msgid":"<20231219143054.455618-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:54","name":"[COMMITTED] ada: gnatbind: Do not generate Ada.Command_Line references when not used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143054.455618-1-poulhies@adacore.com/mbox/"},{"id":181006,"url":"https://patchwork.plctlab.org/api/1.2/patches/181006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143056.455682-1-poulhies@adacore.com/","msgid":"<20231219143056.455682-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:56","name":"[COMMITTED] ada: Remove unreferenced utility routine Get_Logical_Line_Number_Img","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143056.455682-1-poulhies@adacore.com/mbox/"},{"id":181007,"url":"https://patchwork.plctlab.org/api/1.2/patches/181007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143057.455747-1-poulhies@adacore.com/","msgid":"<20231219143057.455747-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:57","name":"[COMMITTED] ada: Fix style and typos in comments","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143057.455747-1-poulhies@adacore.com/mbox/"},{"id":181009,"url":"https://patchwork.plctlab.org/api/1.2/patches/181009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143059.455817-1-poulhies@adacore.com/","msgid":"<20231219143059.455817-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:30:59","name":"[COMMITTED] ada: Compiler hangs on container aggregate with function call as key expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143059.455817-1-poulhies@adacore.com/mbox/"},{"id":181013,"url":"https://patchwork.plctlab.org/api/1.2/patches/181013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143101.455881-1-poulhies@adacore.com/","msgid":"<20231219143101.455881-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:01","name":"[COMMITTED] ada: Rework comment in Expand_Ctrl_Function_Call","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143101.455881-1-poulhies@adacore.com/mbox/"},{"id":181018,"url":"https://patchwork.plctlab.org/api/1.2/patches/181018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143103.455945-1-poulhies@adacore.com/","msgid":"<20231219143103.455945-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:03","name":"[COMMITTED] ada: Remove GNATcheck violations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143103.455945-1-poulhies@adacore.com/mbox/"},{"id":181020,"url":"https://patchwork.plctlab.org/api/1.2/patches/181020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143104.456009-1-poulhies@adacore.com/","msgid":"<20231219143104.456009-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:04","name":"[COMMITTED] ada: Missing error on positional container aggregates for types with Add_Named","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143104.456009-1-poulhies@adacore.com/mbox/"},{"id":181010,"url":"https://patchwork.plctlab.org/api/1.2/patches/181010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143106.456073-1-poulhies@adacore.com/","msgid":"<20231219143106.456073-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:06","name":"[COMMITTED] ada: Check all interfaces for valid iterator type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143106.456073-1-poulhies@adacore.com/mbox/"},{"id":181023,"url":"https://patchwork.plctlab.org/api/1.2/patches/181023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143108.456179-1-poulhies@adacore.com/","msgid":"<20231219143108.456179-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:08","name":"[COMMITTED] ada: Fix internal error on call with parameter of predicated subtype","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143108.456179-1-poulhies@adacore.com/mbox/"},{"id":181005,"url":"https://patchwork.plctlab.org/api/1.2/patches/181005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143109.456243-1-poulhies@adacore.com/","msgid":"<20231219143109.456243-1-poulhies@adacore.com>","list_archive_url":null,"date":"2023-12-19T14:31:09","name":"[COMMITTED] ada: Add makefile targets for building/installing html doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219143109.456243-1-poulhies@adacore.com/mbox/"},{"id":181130,"url":"https://patchwork.plctlab.org/api/1.2/patches/181130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219172153.2298161-1-siddhesh@gotplt.org/","msgid":"<20231219172153.2298161-1-siddhesh@gotplt.org>","list_archive_url":null,"date":"2023-12-19T17:21:53","name":"tree-object-size: Clean up unknown propagation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219172153.2298161-1-siddhesh@gotplt.org/mbox/"},{"id":181258,"url":"https://patchwork.plctlab.org/api/1.2/patches/181258/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com/","msgid":"<42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com>","list_archive_url":null,"date":"2023-12-19T20:54:34","name":"gprofng: a new GNU profiler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/42a43f0f-07a9-08fe-a0e9-02eb41398501@oracle.com/mbox/"},{"id":181308,"url":"https://patchwork.plctlab.org/api/1.2/patches/181308/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221731.2944661-1-jason@redhat.com/","msgid":"<20231219221731.2944661-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-19T22:17:31","name":"[RFA] opts: -Werror=foo always implies -Wfoo [PR106213]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221731.2944661-1-jason@redhat.com/mbox/"},{"id":181309,"url":"https://patchwork.plctlab.org/api/1.2/patches/181309/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221935.79287-1-polacek@redhat.com/","msgid":"<20231219221935.79287-1-polacek@redhat.com>","list_archive_url":null,"date":"2023-12-19T22:19:35","name":"sccopy: remove unused data member [PR113069]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231219221935.79287-1-polacek@redhat.com/mbox/"},{"id":181343,"url":"https://patchwork.plctlab.org/api/1.2/patches/181343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplz13g5q.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-19T23:51:13","name":"[#2v2/2] strub: sparc64: unbias the stack address [PR112917]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orplz13g5q.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":181422,"url":"https://patchwork.plctlab.org/api/1.2/patches/181422/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6kd38ob.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T02:32:52","name":"[FYI] -finline-stringops: copy timeout factor from memcmp-1.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orh6kd38ob.fsf@lxoliva.fsfla.org/mbox/"},{"id":181423,"url":"https://patchwork.plctlab.org/api/1.2/patches/181423/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220023922.1076198-1-pan2.li@intel.com/","msgid":"<20231220023922.1076198-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T02:39:22","name":"[v1] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220023922.1076198-1-pan2.li@intel.com/mbox/"},{"id":181429,"url":"https://patchwork.plctlab.org/api/1.2/patches/181429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyv137pa.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T02:53:53","name":"-finline-stringops: allow expansion into edges [PR113002]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orcyv137pa.fsf@lxoliva.fsfla.org/mbox/"},{"id":181453,"url":"https://patchwork.plctlab.org/api/1.2/patches/181453/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com/","msgid":"<346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com>","list_archive_url":null,"date":"2023-12-20T04:25:23","name":"[committed] Stop forcing unsigned bitfields on mcore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/346be05f-d96a-432a-84f7-30511cdd28e6@gmail.com/mbox/"},{"id":181455,"url":"https://patchwork.plctlab.org/api/1.2/patches/181455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com/","msgid":"<4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com>","list_archive_url":null,"date":"2023-12-20T04:29:12","name":"[committed,gcc-wwwdocs] Add blurb about bitfield signedness on mcore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4f228ab7-cc8f-4ca7-b32c-58e530771796@gmail.com/mbox/"},{"id":181461,"url":"https://patchwork.plctlab.org/api/1.2/patches/181461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFmAMQ214FmTReOkMaxCuxEiCKO7gWGAittA=H08K3x8ewTJbw@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T04:32:37","name":"Fortran: Use non conflicting file extensions for intermediates [PR81615]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFmAMQ214FmTReOkMaxCuxEiCKO7gWGAittA=H08K3x8ewTJbw@mail.gmail.com/mbox/"},{"id":181481,"url":"https://patchwork.plctlab.org/api/1.2/patches/181481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8r5p2xmp.fsf@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T06:31:26","name":"compare_tests: distinguish c-c++-common results by tool","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/or8r5p2xmp.fsf@lxoliva.fsfla.org/mbox/"},{"id":181485,"url":"https://patchwork.plctlab.org/api/1.2/patches/181485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065011.2696544-1-juzhe.zhong@rivai.ai/","msgid":"<20231220065011.2696544-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T06:50:11","name":"RISC-V: Fix bug of VSETVL fusion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065011.2696544-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181486,"url":"https://patchwork.plctlab.org/api/1.2/patches/181486/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065526.2698027-1-juzhe.zhong@rivai.ai/","msgid":"<20231220065526.2698027-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T06:55:26","name":"RISC-V: Optimize SELECT_VL codegen when length is known as smaller than VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065526.2698027-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181488,"url":"https://patchwork.plctlab.org/api/1.2/patches/181488/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065606.2695737-1-pan2.li@intel.com/","msgid":"<20231220065606.2695737-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T06:56:06","name":"[v2] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220065606.2695737-1-pan2.li@intel.com/mbox/"},{"id":181490,"url":"https://patchwork.plctlab.org/api/1.2/patches/181490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-1-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:28","name":"[v4,1/3] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-1-wangfeng@eswincomputing.com/mbox/"},{"id":181491,"url":"https://patchwork.plctlab.org/api/1.2/patches/181491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-2-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:29","name":"[v4,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-2-wangfeng@eswincomputing.com/mbox/"},{"id":181492,"url":"https://patchwork.plctlab.org/api/1.2/patches/181492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-3-wangfeng@eswincomputing.com/","msgid":"<20231220070530.5381-3-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-20T07:05:30","name":"[v4,3/3] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220070530.5381-3-wangfeng@eswincomputing.com/mbox/"},{"id":181521,"url":"https://patchwork.plctlab.org/api/1.2/patches/181521/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220081537.2013818-1-demin.han@starfivetech.com/","msgid":"<20231220081537.2013818-1-demin.han@starfivetech.com>","list_archive_url":null,"date":"2023-12-20T08:15:37","name":"RISC-V: Fix calculation of max live vregs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220081537.2013818-1-demin.han@starfivetech.com/mbox/"},{"id":181522,"url":"https://patchwork.plctlab.org/api/1.2/patches/181522/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv88tz3v8.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:15:39","name":"[FYI] www: new AdaCore-contributed hardening features in gcc 13 and 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/orv88tz3v8.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":181525,"url":"https://patchwork.plctlab.org/api/1.2/patches/181525/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220082040.2920483-1-juzhe.zhong@rivai.ai/","msgid":"<20231220082040.2920483-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-20T08:20:40","name":"[Committed] RISC-V: Fix ICE of moving SUBREG of vector mode to DImode scalar register on RV32 system.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220082040.2920483-1-juzhe.zhong@rivai.ai/mbox/"},{"id":181531,"url":"https://patchwork.plctlab.org/api/1.2/patches/181531/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7Ut6SzciCSpBkUvpN=Rook1q4pOWPZ3uC+tprZRa4YdMQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:39:24","name":"RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7Ut6SzciCSpBkUvpN=Rook1q4pOWPZ3uC+tprZRa4YdMQ@mail.gmail.com/mbox/"},{"id":181545,"url":"https://patchwork.plctlab.org/api/1.2/patches/181545/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c10d0643-4cab-42a7-96ac-3fee9106f46a@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:51:19","name":"[Patchv3,rs6000] Correct definition of macro of fixed point efficient unaligned","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c10d0643-4cab-42a7-96ac-3fee9106f46a@linux.ibm.com/mbox/"},{"id":181546,"url":"https://patchwork.plctlab.org/api/1.2/patches/181546/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f440fe00-9ac5-48b8-a33e-b0672cf5be94@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T08:56:26","name":"[rs6000] Call library for block memory compare when optimizing for size","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f440fe00-9ac5-48b8-a33e-b0672cf5be94@linux.ibm.com/mbox/"},{"id":181551,"url":"https://patchwork.plctlab.org/api/1.2/patches/181551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com/","msgid":"<3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com>","list_archive_url":null,"date":"2023-12-20T09:25:42","name":"sched: Don'\''t skip empty block by removing no_real_insns_p [PR108273]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3262ddae-efdf-b008-dc9e-342b283062af@linux.ibm.com/mbox/"},{"id":181552,"url":"https://patchwork.plctlab.org/api/1.2/patches/181552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYKz2fbKlwr0hIHC@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-20T09:28:57","name":"[v2] aarch64: Validate register operands early in ldp fusion pass [PR113062]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYKz2fbKlwr0hIHC@arm.com/mbox/"},{"id":181554,"url":"https://patchwork.plctlab.org/api/1.2/patches/181554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220093533.3390676-1-pan2.li@intel.com/","msgid":"<20231220093533.3390676-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-20T09:35:33","name":"[v3] RISC-V: Bugfix for the const vector in single steps","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220093533.3390676-1-pan2.li@intel.com/mbox/"},{"id":181597,"url":"https://patchwork.plctlab.org/api/1.2/patches/181597/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYLAaEykjTR0a36e@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-20T10:22:32","name":"lower-bitint: Fix up handling of nested casts in mergeable stmt handling [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYLAaEykjTR0a36e@tucnak/mbox/"},{"id":181629,"url":"https://patchwork.plctlab.org/api/1.2/patches/181629/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123039.502-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231220123039.502-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-20T12:30:39","name":"[v3,3/6] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123039.502-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":181630,"url":"https://patchwork.plctlab.org/api/1.2/patches/181630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123419.608-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231220123419.608-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-20T12:34:19","name":"[v3,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220123419.608-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":181643,"url":"https://patchwork.plctlab.org/api/1.2/patches/181643/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220134450.CBA93386181E@sourceware.org/","msgid":"<20231220134450.CBA93386181E@sourceware.org>","list_archive_url":null,"date":"2023-12-20T13:43:13","name":"Improve DCE of dead parts of a permute chain","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220134450.CBA93386181E@sourceware.org/mbox/"},{"id":181661,"url":"https://patchwork.plctlab.org/api/1.2/patches/181661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfhrmf2.fsf@euler.schwinge.homeip.net/","msgid":"<87edfhrmf2.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2023-12-20T14:14:25","name":"No libstdc++ for GCN (was: No libstdc++ for nvptx)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87edfhrmf2.fsf@euler.schwinge.homeip.net/mbox/"},{"id":181665,"url":"https://patchwork.plctlab.org/api/1.2/patches/181665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220144829.765056-1-abidh@codesourcery.com/","msgid":"<20231220144829.765056-1-abidh@codesourcery.com>","list_archive_url":null,"date":"2023-12-20T14:48:29","name":"[OpenACC] Add tests for implied copy of variables in reduction clause.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220144829.765056-1-abidh@codesourcery.com/mbox/"},{"id":181741,"url":"https://patchwork.plctlab.org/api/1.2/patches/181741/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173104.3105138-1-jason@redhat.com/","msgid":"<20231220173104.3105138-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-20T17:31:04","name":"[pushed] c++: xvalue array subscript [PR103185]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173104.3105138-1-jason@redhat.com/mbox/"},{"id":181742,"url":"https://patchwork.plctlab.org/api/1.2/patches/181742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173117.3105333-1-jason@redhat.com/","msgid":"<20231220173117.3105333-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-20T17:31:17","name":"[pushed] c++: throwing dtor and empty try [PR113088]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220173117.3105333-1-jason@redhat.com/mbox/"},{"id":181745,"url":"https://patchwork.plctlab.org/api/1.2/patches/181745/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220180836.24936-1-palmer@rivosinc.com/","msgid":"<20231220180836.24936-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:08:36","name":"RISC-V: Document -mcmodel=large","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220180836.24936-1-palmer@rivosinc.com/mbox/"},{"id":181746,"url":"https://patchwork.plctlab.org/api/1.2/patches/181746/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220181639.25609-2-palmer@rivosinc.com/","msgid":"<20231220181639.25609-2-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:16:40","name":"[wwwdocs] RISC-V: Add -mcmodel=large for GCC-14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220181639.25609-2-palmer@rivosinc.com/mbox/"},{"id":181747,"url":"https://patchwork.plctlab.org/api/1.2/patches/181747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220184109.27977-1-palmer@rivosinc.com/","msgid":"<20231220184109.27977-1-palmer@rivosinc.com>","list_archive_url":null,"date":"2023-12-20T18:41:09","name":"RISC-V: Add --with-cmodel configure-time argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220184109.27977-1-palmer@rivosinc.com/mbox/"},{"id":181749,"url":"https://patchwork.plctlab.org/api/1.2/patches/181749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220190824.399818-1-kmatsui@gcc.gnu.org/","msgid":"<20231220190824.399818-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-20T19:08:24","name":"testsuite: Remove testsuite_tr1.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220190824.399818-1-kmatsui@gcc.gnu.org/mbox/"},{"id":181750,"url":"https://patchwork.plctlab.org/api/1.2/patches/181750/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYM+cZIJOmWDZTSH@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-20T19:20:17","name":"c++: Enable -Walloc-size and -Wcalloc-transposed-args warnings for C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYM+cZIJOmWDZTSH@tucnak/mbox/"},{"id":181789,"url":"https://patchwork.plctlab.org/api/1.2/patches/181789/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220220749.632100-1-ppalka@redhat.com/","msgid":"<20231220220749.632100-1-ppalka@redhat.com>","list_archive_url":null,"date":"2023-12-20T22:07:49","name":"c++: fix -Wparentheses with boolean-like class types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231220220749.632100-1-ppalka@redhat.com/mbox/"},{"id":181940,"url":"https://patchwork.plctlab.org/api/1.2/patches/181940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com/","msgid":"<138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com>","list_archive_url":null,"date":"2023-12-21T01:37:52","name":"[Patchv3,rs6000] Clean up pre-checkings of expand_block_compare","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/138fd05a-75c8-4a4b-b358-9633e087da20@linux.ibm.com/mbox/"},{"id":181942,"url":"https://patchwork.plctlab.org/api/1.2/patches/181942/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221020627.3266898-1-jason@redhat.com/","msgid":"<20231221020627.3266898-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-21T02:06:27","name":"[pushed] c++: computed goto warning [PR37722]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221020627.3266898-1-jason@redhat.com/mbox/"},{"id":181944,"url":"https://patchwork.plctlab.org/api/1.2/patches/181944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221022518.4175834-1-pan2.li@intel.com/","msgid":"<20231221022518.4175834-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-21T02:25:18","name":"[v1] RISC-V: XFail the signbit-5 run test for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221022518.4175834-1-pan2.li@intel.com/mbox/"},{"id":181951,"url":"https://patchwork.plctlab.org/api/1.2/patches/181951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221024805.7671-1-wangfeng@eswincomputing.com/","msgid":"<20231221024805.7671-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-21T02:48:05","name":"[v5,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221024805.7671-1-wangfeng@eswincomputing.com/mbox/"},{"id":182005,"url":"https://patchwork.plctlab.org/api/1.2/patches/182005/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredfgytmv.fsf_-_@lxoliva.fsfla.org/","msgid":"","list_archive_url":null,"date":"2023-12-21T06:08:56","name":"[2/2,FYI] -finline-stringops: drop obsolete comment [PR112778]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/oredfgytmv.fsf_-_@lxoliva.fsfla.org/mbox/"},{"id":182017,"url":"https://patchwork.plctlab.org/api/1.2/patches/182017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPidUHpLRVI4+tY@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-21T07:00:05","name":"lower-bitint: Avoid nested casts in muldiv/float operands [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPidUHpLRVI4+tY@tucnak/mbox/"},{"id":182018,"url":"https://patchwork.plctlab.org/api/1.2/patches/182018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPjpltT0cX5jauL@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-21T07:05:10","name":"ubsan: Add workaround for missing bitint libubsan support for shifts [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYPjpltT0cX5jauL@tucnak/mbox/"},{"id":182045,"url":"https://patchwork.plctlab.org/api/1.2/patches/182045/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221082558.449203-1-haochen.jiang@intel.com/","msgid":"<20231221082558.449203-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2023-12-21T08:25:58","name":"[gcc-wwwdocs,v2] gcc-13/14: Mention recent update for x86_64 backend","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221082558.449203-1-haochen.jiang@intel.com/mbox/"},{"id":182060,"url":"https://patchwork.plctlab.org/api/1.2/patches/182060/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221085750.3541650-1-juzhe.zhong@rivai.ai/","msgid":"<20231221085750.3541650-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-21T08:57:50","name":"[Committed] RISC-V: Add dynamic LMUL test for x264","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221085750.3541650-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182142,"url":"https://patchwork.plctlab.org/api/1.2/patches/182142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfrzvluu4.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T10:21:23","name":"[pushed] aarch64: Fix cut-&-pasto in early RA pass [PR112948]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptfrzvluu4.fsf@arm.com/mbox/"},{"id":182143,"url":"https://patchwork.plctlab.org/api/1.2/patches/182143/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5q3lut9.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T10:21:54","name":"[pushed] aarch64: Fix early RA handling of deleted insns [PR113094]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpta5q3lut9.fsf@arm.com/mbox/"},{"id":182172,"url":"https://patchwork.plctlab.org/api/1.2/patches/182172/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221123750.2303405-1-lhyatt@gmail.com/","msgid":"<20231221123750.2303405-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2023-12-21T12:37:50","name":"libcpp: Fix __has_include_next ICE in the last directory of the path [PR80755]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221123750.2303405-1-lhyatt@gmail.com/mbox/"},{"id":182229,"url":"https://patchwork.plctlab.org/api/1.2/patches/182229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com/","msgid":"<9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com>","list_archive_url":null,"date":"2023-12-21T13:33:39","name":"libgccjit: Allow comparing aligned int types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e79a3d614b1db87c564b0e50f7091c2c203d246.camel@zoho.com/mbox/"},{"id":182247,"url":"https://patchwork.plctlab.org/api/1.2/patches/182247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com/","msgid":"<455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com>","list_archive_url":null,"date":"2023-12-21T13:42:11","name":"libgccjit: Support signed char flag","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/455400c598a6a9e0932c4c5b15c5d8fc30355ade.camel@zoho.com/mbox/"},{"id":182287,"url":"https://patchwork.plctlab.org/api/1.2/patches/182287/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZfQ=uDLqEoutbKMj5Y3qOT0T4GcBNrNybT3jP6+oNEEA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T15:02:58","name":"[committed] i386: Fix shifts with high register input operand [PR113044]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZfQ=uDLqEoutbKMj5Y3qOT0T4GcBNrNybT3jP6+oNEEA@mail.gmail.com/mbox/"},{"id":182388,"url":"https://patchwork.plctlab.org/api/1.2/patches/182388/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221164914.943125-1-christophe.lyon@linaro.org/","msgid":"<20231221164914.943125-1-christophe.lyon@linaro.org>","list_archive_url":null,"date":"2023-12-21T16:49:14","name":"Allow overriding EXPECT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221164914.943125-1-christophe.lyon@linaro.org/mbox/"},{"id":182362,"url":"https://patchwork.plctlab.org/api/1.2/patches/182362/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5e30c7a9f9d27a2ef19d1f7ee5335aa14c7860e.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T16:59:45","name":"libgccjit: Allow sending a const pointer as argument","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5e30c7a9f9d27a2ef19d1f7ee5335aa14c7860e.camel@zoho.com/mbox/"},{"id":182432,"url":"https://patchwork.plctlab.org/api/1.2/patches/182432/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221193243.368541-1-arsen@aarsen.me/","msgid":"<20231221193243.368541-1-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T19:19:29","name":"toplevel: don'\''t override gettext-runtime/configure-discovered build args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221193243.368541-1-arsen@aarsen.me/mbox/"},{"id":182454,"url":"https://patchwork.plctlab.org/api/1.2/patches/182454/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-2-arsen@aarsen.me/","msgid":"<20231221211909.371736-2-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T20:01:31","name":"[v2,1/2] libstdc++: add missing include in ranges_util.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-2-arsen@aarsen.me/mbox/"},{"id":182464,"url":"https://patchwork.plctlab.org/api/1.2/patches/182464/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-3-arsen@aarsen.me/","msgid":"<20231221211909.371736-3-arsen@aarsen.me>","list_archive_url":null,"date":"2023-12-21T20:01:32","name":"[v2,2/2] libstdc++: implement std::generator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221211909.371736-3-arsen@aarsen.me/mbox/"},{"id":182445,"url":"https://patchwork.plctlab.org/api/1.2/patches/182445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221201041.2709909-1-quic_apinski@quicinc.com/","msgid":"<20231221201041.2709909-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-21T20:10:41","name":"Document cond_copysign and cond_len_copysign optabs [PR112951]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231221201041.2709909-1-quic_apinski@quicinc.com/mbox/"},{"id":182451,"url":"https://patchwork.plctlab.org/api/1.2/patches/182451/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b963fdad41d8b038e9da2e85319427c9472cff57.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-21T21:01:27","name":"libgccjit: Add convert vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b963fdad41d8b038e9da2e85319427c9472cff57.camel@zoho.com/mbox/"},{"id":182455,"url":"https://patchwork.plctlab.org/api/1.2/patches/182455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at/","msgid":"<9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-21T21:47:59","name":"[V6] c23: construct composite type for tagged types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9346830c959b3d2fdc71bb174a6e81970b29e153.camel@tugraz.at/mbox/"},{"id":182490,"url":"https://patchwork.plctlab.org/api/1.2/patches/182490/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222001945.3536355-1-jason@redhat.com/","msgid":"<20231222001945.3536355-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T00:19:45","name":"[pushed] testsuite: suppress mangling compatibility aliases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222001945.3536355-1-jason@redhat.com/mbox/"},{"id":182491,"url":"https://patchwork.plctlab.org/api/1.2/patches/182491/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222002002.3536507-1-jason@redhat.com/","msgid":"<20231222002002.3536507-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T00:20:02","name":"[pushed] c++: sizeof... mangling with alias template [PR95298]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222002002.3536507-1-jason@redhat.com/mbox/"},{"id":182495,"url":"https://patchwork.plctlab.org/api/1.2/patches/182495/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222005914.13748-1-wangfeng@eswincomputing.com/","msgid":"<20231222005914.13748-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T00:59:14","name":"[v6,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222005914.13748-1-wangfeng@eswincomputing.com/mbox/"},{"id":182500,"url":"https://patchwork.plctlab.org/api/1.2/patches/182500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222013806.5853-1-wangfeng@eswincomputing.com/","msgid":"<20231222013806.5853-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T01:38:06","name":"[v7,2/3] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222013806.5853-1-wangfeng@eswincomputing.com/mbox/"},{"id":182505,"url":"https://patchwork.plctlab.org/api/1.2/patches/182505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222015936.8935-1-wangfeng@eswincomputing.com/","msgid":"<20231222015936.8935-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2023-12-22T01:59:36","name":"RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222015936.8935-1-wangfeng@eswincomputing.com/mbox/"},{"id":182508,"url":"https://patchwork.plctlab.org/api/1.2/patches/182508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222022901.1253705-1-sandra@codesourcery.com/","msgid":"<20231222022901.1253705-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2023-12-22T02:29:01","name":"[Committed,obvious] Testsuite: Fix failures in g++.dg/analyzer/placement-new-size.C","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222022901.1253705-1-sandra@codesourcery.com/mbox/"},{"id":182512,"url":"https://patchwork.plctlab.org/api/1.2/patches/182512/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222023605.3894839-1-lipeng.zhu@intel.com/","msgid":"<20231222023605.3894839-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2023-12-22T02:36:06","name":"libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222023605.3894839-1-lipeng.zhu@intel.com/mbox/"},{"id":182511,"url":"https://patchwork.plctlab.org/api/1.2/patches/182511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222031754.3556161-1-jason@redhat.com/","msgid":"<20231222031754.3556161-1-jason@redhat.com>","list_archive_url":null,"date":"2023-12-22T03:17:54","name":"[pushed] c++: computed goto from catch block [PR81438]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222031754.3556161-1-jason@redhat.com/mbox/"},{"id":182587,"url":"https://patchwork.plctlab.org/api/1.2/patches/182587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVE5zMA/0hCcNxV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:12:23","name":"lower-bitint: Fix handle_cast ICE [PR113102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVE5zMA/0hCcNxV@tucnak/mbox/"},{"id":182588,"url":"https://patchwork.plctlab.org/api/1.2/patches/182588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVGEs0RMZelMjez@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:17:22","name":"lower-bitint: Handle unreleased SSA_NAMEs from earlier passes gracefully [PR113102]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVGEs0RMZelMjez@tucnak/mbox/"},{"id":182589,"url":"https://patchwork.plctlab.org/api/1.2/patches/182589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222081844.782313-1-panchenghui@loongson.cn/","msgid":"<20231222081844.782313-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-12-22T08:18:44","name":"[v1] LoongArch: Fix ICE when passing two same vector argument consecutively","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222081844.782313-1-panchenghui@loongson.cn/mbox/"},{"id":182591,"url":"https://patchwork.plctlab.org/api/1.2/patches/182591/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVHCsf63PsOhpIS@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:21:30","name":"symtab-thunks: Use aggregate_value_p even on is_gimple_reg_type returns [PR112941]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVHCsf63PsOhpIS@tucnak/mbox/"},{"id":182592,"url":"https://patchwork.plctlab.org/api/1.2/patches/182592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222082203.888077-1-panchenghui@loongson.cn/","msgid":"<20231222082203.888077-1-panchenghui@loongson.cn>","list_archive_url":null,"date":"2023-12-22T08:22:03","name":"[v1] LoongArch: Fix insn output of vec_concat templates for LASX.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222082203.888077-1-panchenghui@loongson.cn/mbox/"},{"id":182595,"url":"https://patchwork.plctlab.org/api/1.2/patches/182595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVKa0ZMbjsP+n1h@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-22T08:35:55","name":"combine: Don'\''t optimize paradoxical SUBREG AND CONST_INT on WORD_REGISTER_OPERATIONS targets [PR112758]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYVKa0ZMbjsP+n1h@tucnak/mbox/"},{"id":182596,"url":"https://patchwork.plctlab.org/api/1.2/patches/182596/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7U-33VeGbCXsu2Xo2=5=aESTZTw8DEE7t1xQ_eogp=cNA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-22T09:23:13","name":"RISC-V: Support -m[no-]unaligned-access","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAHtqR7U-33VeGbCXsu2Xo2=5=aESTZTw8DEE7t1xQ_eogp=cNA@mail.gmail.com/mbox/"},{"id":182602,"url":"https://patchwork.plctlab.org/api/1.2/patches/182602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222095156.304068-1-juzhe.zhong@rivai.ai/","msgid":"<20231222095156.304068-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-22T09:51:56","name":"RISC-V: Make PHI initial value occupy live V_REG in dynamic LMUL cost model analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222095156.304068-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182608,"url":"https://patchwork.plctlab.org/api/1.2/patches/182608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222100547.454123-1-kmatsui@gcc.gnu.org/","msgid":"<20231222100547.454123-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-22T10:05:47","name":"[committed] c++: testsuite: Remove testsuite_tr1.h includes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222100547.454123-1-kmatsui@gcc.gnu.org/mbox/"},{"id":182612,"url":"https://patchwork.plctlab.org/api/1.2/patches/182612/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com/","msgid":"<026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-22T10:14:06","name":"[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/026301da34bf$9992e5f0$ccb8b1d0$@nextmovesoftware.com/mbox/"},{"id":182614,"url":"https://patchwork.plctlab.org/api/1.2/patches/182614/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com/","msgid":"<027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-22T10:25:39","name":"[x86_64] PR target/112992: Optimize mode for broadcast of constants.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/027c01da34c1$369974d0$a3cc5e70$@nextmovesoftware.com/mbox/"},{"id":182676,"url":"https://patchwork.plctlab.org/api/1.2/patches/182676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222141038.6657-1-amonakov@ispras.ru/","msgid":"<20231222141038.6657-1-amonakov@ispras.ru>","list_archive_url":null,"date":"2023-12-22T14:10:38","name":"[v2] object lifetime instrumentation for Valgrind [PR66487]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222141038.6657-1-amonakov@ispras.ru/mbox/"},{"id":182679,"url":"https://patchwork.plctlab.org/api/1.2/patches/182679/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e0f36d10599dcbda88502b9631c3aae1119644.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2023-12-22T14:39:48","name":"libgccjit: Add missing builtins needed by optimizations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e0f36d10599dcbda88502b9631c3aae1119644.camel@zoho.com/mbox/"},{"id":182702,"url":"https://patchwork.plctlab.org/api/1.2/patches/182702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com/","msgid":"<8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com>","list_archive_url":null,"date":"2023-12-22T15:25:41","name":"libgccjit: Implement sizeof operator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8d25e331b0c28ca9b632bf3fb3a239661592af78.camel@zoho.com/mbox/"},{"id":182770,"url":"https://patchwork.plctlab.org/api/1.2/patches/182770/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222194513.294048-1-vineetg@rivosinc.com/","msgid":"<20231222194513.294048-1-vineetg@rivosinc.com>","list_archive_url":null,"date":"2023-12-22T19:45:13","name":"RISC-V: RVV: add toggle to control vsetvl pass behavior","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222194513.294048-1-vineetg@rivosinc.com/mbox/"},{"id":182787,"url":"https://patchwork.plctlab.org/api/1.2/patches/182787/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222205230.182419-1-mark@klomp.org/","msgid":"<20231222205230.182419-1-mark@klomp.org>","list_archive_url":null,"date":"2023-12-22T20:52:30","name":"[COMMITTED] robots.txt: Disallow a few more bugzilla queries","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222205230.182419-1-mark@klomp.org/mbox/"},{"id":182803,"url":"https://patchwork.plctlab.org/api/1.2/patches/182803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222230742.1807755-1-juzhe.zhong@rivai.ai/","msgid":"<20231222230742.1807755-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-22T23:07:42","name":"[Committed] RISC-V: Make PHI initial value occupy live V_REG in dynamic LMUL cost model analysis","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231222230742.1807755-1-juzhe.zhong@rivai.ai/mbox/"},{"id":182938,"url":"https://patchwork.plctlab.org/api/1.2/patches/182938/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-1-syq@gcc.gnu.org/","msgid":"<20231223084835.4135176-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:48:34","name":"[commit,v3,1/2] MIPS: Put the ret to the end of args of reconcat [PR112759]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-1-syq@gcc.gnu.org/mbox/"},{"id":182939,"url":"https://patchwork.plctlab.org/api/1.2/patches/182939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-2-syq@gcc.gnu.org/","msgid":"<20231223084835.4135176-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:48:35","name":"[commit,v3,2/2] MIPS: Don'\''t add nan2008 option for -mtune=native","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223084835.4135176-2-syq@gcc.gnu.org/mbox/"},{"id":182940,"url":"https://patchwork.plctlab.org/api/1.2/patches/182940/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223085858.4136369-1-syq@gcc.gnu.org/","msgid":"<20231223085858.4136369-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T08:58:58","name":"[v3] EXPR: Emit an truncate if 31+ bits polluted for SImode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223085858.4136369-1-syq@gcc.gnu.org/mbox/"},{"id":182949,"url":"https://patchwork.plctlab.org/api/1.2/patches/182949/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223110733.2565292-1-pan2.li@intel.com/","msgid":"<20231223110733.2565292-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-23T11:07:33","name":"[v1] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223110733.2565292-1-pan2.li@intel.com/mbox/"},{"id":182955,"url":"https://patchwork.plctlab.org/api/1.2/patches/182955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223123957.2652658-1-pan2.li@intel.com/","msgid":"<20231223123957.2652658-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-23T12:39:57","name":"[v2] RISC-V: XFail the signbit-5 run test for RVV","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223123957.2652658-1-pan2.li@intel.com/mbox/"},{"id":183001,"url":"https://patchwork.plctlab.org/api/1.2/patches/183001/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223183516.3712049-1-quic_apinski@quicinc.com/","msgid":"<20231223183516.3712049-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-23T18:35:16","name":"reassoc vs uninitialized variable {PR112581]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223183516.3712049-1-quic_apinski@quicinc.com/mbox/"},{"id":183008,"url":"https://patchwork.plctlab.org/api/1.2/patches/183008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-2-kmatsui@gcc.gnu.org/","msgid":"<20231223213542.448971-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T21:20:26","name":"[1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-2-kmatsui@gcc.gnu.org/mbox/"},{"id":183009,"url":"https://patchwork.plctlab.org/api/1.2/patches/183009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-3-kmatsui@gcc.gnu.org/","msgid":"<20231223213542.448971-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T21:20:27","name":"[2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223213542.448971-3-kmatsui@gcc.gnu.org/mbox/"},{"id":183010,"url":"https://patchwork.plctlab.org/api/1.2/patches/183010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-2-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:42","name":"[v2,1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-2-kmatsui@gcc.gnu.org/mbox/"},{"id":183011,"url":"https://patchwork.plctlab.org/api/1.2/patches/183011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-3-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:43","name":"[v2,2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-3-kmatsui@gcc.gnu.org/mbox/"},{"id":183012,"url":"https://patchwork.plctlab.org/api/1.2/patches/183012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-4-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:44","name":"[v2,3/8] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-4-kmatsui@gcc.gnu.org/mbox/"},{"id":183013,"url":"https://patchwork.plctlab.org/api/1.2/patches/183013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-5-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:45","name":"[v2,4/8] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-5-kmatsui@gcc.gnu.org/mbox/"},{"id":183015,"url":"https://patchwork.plctlab.org/api/1.2/patches/183015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-6-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:46","name":"[v2,5/8] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-6-kmatsui@gcc.gnu.org/mbox/"},{"id":183014,"url":"https://patchwork.plctlab.org/api/1.2/patches/183014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-7-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:47","name":"[v2,6/8] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-7-kmatsui@gcc.gnu.org/mbox/"},{"id":183016,"url":"https://patchwork.plctlab.org/api/1.2/patches/183016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-8-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:48","name":"[v2,7/8] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-8-kmatsui@gcc.gnu.org/mbox/"},{"id":183017,"url":"https://patchwork.plctlab.org/api/1.2/patches/183017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-9-kmatsui@gcc.gnu.org/","msgid":"<20231223220432.712093-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T22:02:49","name":"[v2,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223220432.712093-9-kmatsui@gcc.gnu.org/mbox/"},{"id":183022,"url":"https://patchwork.plctlab.org/api/1.2/patches/183022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223230558.849031-1-kmatsui@gcc.gnu.org/","msgid":"<20231223230558.849031-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-23T23:05:58","name":"[v2] libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231223230558.849031-1-kmatsui@gcc.gnu.org/mbox/"},{"id":183023,"url":"https://patchwork.plctlab.org/api/1.2/patches/183023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com/","msgid":"<013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-23T23:37:50","name":"[ARC] Table-driven ashlsi implementation for better code/rtx_costs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/013701da35f9$0c4cf5b0$24e6e110$@nextmovesoftware.com/mbox/"},{"id":183026,"url":"https://patchwork.plctlab.org/api/1.2/patches/183026/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224004716.6D2D62043F@pchp3.se.axis.com/","msgid":"<20231224004716.6D2D62043F@pchp3.se.axis.com>","list_archive_url":null,"date":"2023-12-24T00:47:16","name":"[committed] CRIS: Fix PR middle-end/113109; \"throw\" failing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224004716.6D2D62043F@pchp3.se.axis.com/mbox/"},{"id":183051,"url":"https://patchwork.plctlab.org/api/1.2/patches/183051/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224123608.6650-1-xry111@xry111.site/","msgid":"<20231224123608.6650-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-24T12:33:14","name":"[v2] LoongArch: Expand left rotate to right rotate with negated amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231224123608.6650-1-xry111@xry111.site/mbox/"},{"id":183109,"url":"https://patchwork.plctlab.org/api/1.2/patches/183109/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYiCY3BstREB_3Yy@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2023-12-24T19:11:31","name":"[committed] hppa: Fix pr110279-1.c on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZYiCY3BstREB_3Yy@mx3210.localdomain/mbox/"},{"id":183110,"url":"https://patchwork.plctlab.org/api/1.2/patches/183110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18110-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-24T19:15:33","name":"[testsuite] : Add more pragma novector to new tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18110-tamar@arm.com/mbox/"},{"id":183117,"url":"https://patchwork.plctlab.org/api/1.2/patches/183117/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225032023.3061334-1-liwei@loongson.cn/","msgid":"<20231225032023.3061334-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-25T03:20:23","name":"[v1] LoongArch: Fixed bug in *bstrins__for_ior_mask template.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225032023.3061334-1-liwei@loongson.cn/mbox/"},{"id":183118,"url":"https://patchwork.plctlab.org/api/1.2/patches/183118/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225040034.251374-1-quic_apinski@quicinc.com/","msgid":"<20231225040034.251374-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-25T04:00:34","name":"[COMMITTED] match: Improve `(a != b) ? (a + b) : (2 * a)` pattern [PR19832]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225040034.251374-1-quic_apinski@quicinc.com/mbox/"},{"id":183129,"url":"https://patchwork.plctlab.org/api/1.2/patches/183129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225061952.897770-1-juzhe.zhong@rivai.ai/","msgid":"<20231225061952.897770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-25T06:19:52","name":"[Committed] RISC-V: Add one more ASM check in PR113112-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225061952.897770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183130,"url":"https://patchwork.plctlab.org/api/1.2/patches/183130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225062939.767-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231225062939.767-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-25T06:29:39","name":"[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225062939.767-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183161,"url":"https://patchwork.plctlab.org/api/1.2/patches/183161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225084521.78251-1-kito.cheng@sifive.com/","msgid":"<20231225084521.78251-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2023-12-25T08:45:21","name":"RISC-V: Fix misaligned stack offset for interrupt function","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225084521.78251-1-kito.cheng@sifive.com/mbox/"},{"id":183164,"url":"https://patchwork.plctlab.org/api/1.2/patches/183164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225091725.1574738-1-juzhe.zhong@rivai.ai/","msgid":"<20231225091725.1574738-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-25T09:17:25","name":"RISC-V: Move RVV V_REGS liveness computation into analyze_loop_vinfo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225091725.1574738-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183222,"url":"https://patchwork.plctlab.org/api/1.2/patches/183222/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225161723.3197-1-xry111@xry111.site/","msgid":"<20231225161723.3197-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-25T16:14:02","name":"[v2] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231225161723.3197-1-xry111@xry111.site/mbox/"},{"id":183271,"url":"https://patchwork.plctlab.org/api/1.2/patches/183271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-2-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-2-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:04","name":"[V3,1/3] RISC-V: Remove the Scalar Bitmanip and Crypto Built-In function testsuites","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-2-shihua@iscas.ac.cn/mbox/"},{"id":183272,"url":"https://patchwork.plctlab.org/api/1.2/patches/183272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-3-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:05","name":"[V3,2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-3-shihua@iscas.ac.cn/mbox/"},{"id":183273,"url":"https://patchwork.plctlab.org/api/1.2/patches/183273/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-4-shihua@iscas.ac.cn/","msgid":"<20231226054606.1351637-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2023-12-26T05:46:06","name":"[V3,3/3] RISC-V: Add C intrinsic for Scalar Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226054606.1351637-4-shihua@iscas.ac.cn/mbox/"},{"id":183286,"url":"https://patchwork.plctlab.org/api/1.2/patches/183286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226084227.2466936-1-juzhe.zhong@rivai.ai/","msgid":"<20231226084227.2466936-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-26T08:42:27","name":"[Committed] RISC-V: Some minior tweak on dynamic LMUL cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226084227.2466936-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183288,"url":"https://patchwork.plctlab.org/api/1.2/patches/183288/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226093445.1860961-1-pan2.li@intel.com/","msgid":"<20231226093445.1860961-1-pan2.li@intel.com>","list_archive_url":null,"date":"2023-12-26T09:34:45","name":"[v2] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226093445.1860961-1-pan2.li@intel.com/mbox/"},{"id":183306,"url":"https://patchwork.plctlab.org/api/1.2/patches/183306/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226105349.2755983-1-juzhe.zhong@rivai.ai/","msgid":"<20231226105349.2755983-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-26T10:53:49","name":"[Committed] RISC-V: Fix typo","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226105349.2755983-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183381,"url":"https://patchwork.plctlab.org/api/1.2/patches/183381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226223818.128525-1-xry111@xry111.site/","msgid":"<20231226223818.128525-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-26T22:37:20","name":"LoongArch: Fix infinite secondary reloading of FCCmode [PR113148]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231226223818.128525-1-xry111@xry111.site/mbox/"},{"id":183390,"url":"https://patchwork.plctlab.org/api/1.2/patches/183390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227015222.3393770-1-juzhe.zhong@rivai.ai/","msgid":"<20231227015222.3393770-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T01:52:22","name":"RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length is in range [0, 31]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227015222.3393770-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183393,"url":"https://patchwork.plctlab.org/api/1.2/patches/183393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227023826.226460-1-juzhe.zhong@rivai.ai/","msgid":"<20231227023826.226460-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T02:38:26","name":"[V2] RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length is in range [0, 31]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227023826.226460-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183436,"url":"https://patchwork.plctlab.org/api/1.2/patches/183436/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227081641.1031426-1-juzhe.zhong@rivai.ai/","msgid":"<20231227081641.1031426-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-27T08:16:41","name":"[Committed] RISC-V: Make known NITERS loop be aware of dynamic lmul cost model liveness information","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227081641.1031426-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183438,"url":"https://patchwork.plctlab.org/api/1.2/patches/183438/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-2-chenglulu@loongson.cn/","msgid":"<20231227084654.20614-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-27T08:46:53","name":"[1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-2-chenglulu@loongson.cn/mbox/"},{"id":183437,"url":"https://patchwork.plctlab.org/api/1.2/patches/183437/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-3-chenglulu@loongson.cn/","msgid":"<20231227084654.20614-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2023-12-27T08:46:54","name":"[2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231227084654.20614-3-chenglulu@loongson.cn/mbox/"},{"id":183456,"url":"https://patchwork.plctlab.org/api/1.2/patches/183456/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240670EE838D161E6A3810BE89FA@SN6PR01MB4240.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-27T10:40:57","name":"aarch64: add '\''AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/SN6PR01MB4240670EE838D161E6A3810BE89FA@SN6PR01MB4240.prod.exchangelabs.com/mbox/"},{"id":183552,"url":"https://patchwork.plctlab.org/api/1.2/patches/183552/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at/","msgid":"<8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at>","list_archive_url":null,"date":"2023-12-27T19:23:50","name":"[C] C: Fix type compatibility for structs with variable sized fields.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8ec71de2b1c42f2ed75a97cabced6561861791ab.camel@tugraz.at/mbox/"},{"id":183601,"url":"https://patchwork.plctlab.org/api/1.2/patches/183601/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228013332.1707891-1-juzhe.zhong@rivai.ai/","msgid":"<20231228013332.1707891-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-28T01:33:32","name":"[Committed] RISC-V: Make dynamic LMUL cost model more accurate for conversion codes","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228013332.1707891-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183660,"url":"https://patchwork.plctlab.org/api/1.2/patches/183660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228065906.3356210-1-liwei@loongson.cn/","msgid":"<20231228065906.3356210-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-28T06:59:06","name":"[v1] LoongArch: Merge constant vector permuatation implementations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228065906.3356210-1-liwei@loongson.cn/mbox/"},{"id":183699,"url":"https://patchwork.plctlab.org/api/1.2/patches/183699/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZD_jCdu6jTbHVyh3=u_kt7cbzZgBT5Ejdr8E8nhoyLaQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-28T11:33:13","name":"[committed] i386: Cleanup ix86_expand_{unary|binary}_operator issues","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZD_jCdu6jTbHVyh3=u_kt7cbzZgBT5Ejdr8E8nhoyLaQ@mail.gmail.com/mbox/"},{"id":183714,"url":"https://patchwork.plctlab.org/api/1.2/patches/183714/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228122646.2594388-1-liwei@loongson.cn/","msgid":"<20231228122646.2594388-1-liwei@loongson.cn>","list_archive_url":null,"date":"2023-12-28T12:26:46","name":"[v2] LoongArch: Merge constant vector permuatation implementations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228122646.2594388-1-liwei@loongson.cn/mbox/"},{"id":183736,"url":"https://patchwork.plctlab.org/api/1.2/patches/183736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228135631.3581609-1-syq@gcc.gnu.org/","msgid":"<20231228135631.3581609-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-28T13:56:31","name":"MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228135631.3581609-1-syq@gcc.gnu.org/mbox/"},{"id":183754,"url":"https://patchwork.plctlab.org/api/1.2/patches/183754/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/005901da399e$7d13b330$773b1990$@nextmovesoftware.com/","msgid":"<005901da399e$7d13b330$773b1990$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-28T14:59:40","name":"Improved RTL expansion of field assignments into promoted registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/005901da399e$7d13b330$773b1990$@nextmovesoftware.com/mbox/"},{"id":183776,"url":"https://patchwork.plctlab.org/api/1.2/patches/183776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228161611.10555-1-xry111@xry111.site/","msgid":"<20231228161611.10555-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-28T16:11:51","name":"[v3] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231228161611.10555-1-xry111@xry111.site/mbox/"},{"id":183816,"url":"https://patchwork.plctlab.org/api/1.2/patches/183816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229012102.2424314-1-juzhe.zhong@rivai.ai/","msgid":"<20231229012102.2424314-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-29T01:21:02","name":"RISC-V: Count pointer type SSA into RVV regs liveness for dynamic LMUL cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229012102.2424314-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183817,"url":"https://patchwork.plctlab.org/api/1.2/patches/183817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229013936.2576234-1-juzhe.zhong@rivai.ai/","msgid":"<20231229013936.2576234-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2023-12-29T01:39:36","name":"[Committed] RISC-V: Robostify testcase pr113112-1.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229013936.2576234-1-juzhe.zhong@rivai.ai/mbox/"},{"id":183819,"url":"https://patchwork.plctlab.org/api/1.2/patches/183819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014515.40945-1-chenxiaolong@loongson.cn/","msgid":"<20231229014515.40945-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T01:45:15","name":"[v1] LoongArch: testsuite:Fix FAIL in lasx-xvstelm.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014515.40945-1-chenxiaolong@loongson.cn/mbox/"},{"id":183820,"url":"https://patchwork.plctlab.org/api/1.2/patches/183820/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014634.926-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229014634.926-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T01:46:34","name":"[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014634.926-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183821,"url":"https://patchwork.plctlab.org/api/1.2/patches/183821/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014923.979-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229014923.979-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T01:49:23","name":"[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229014923.979-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183823,"url":"https://patchwork.plctlab.org/api/1.2/patches/183823/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com/","msgid":"<291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:09:51","name":"?????????[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/291eec1e-db82-4c6d-a117-75c83e37eeb8.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183824,"url":"https://patchwork.plctlab.org/api/1.2/patches/183824/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com/","msgid":"<60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:11:10","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/60b021f1-b0db-4bb4-a1cd-0acc7bcc9c8a.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183826,"url":"https://patchwork.plctlab.org/api/1.2/patches/183826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021222.24002-1-chenxiaolong@loongson.cn/","msgid":"<20231229021222.24002-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:22","name":"[v1,1/8] LoongArch: testsuite:Add detection procedures supported by the target.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021222.24002-1-chenxiaolong@loongson.cn/mbox/"},{"id":183827,"url":"https://patchwork.plctlab.org/api/1.2/patches/183827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021235.24065-1-chenxiaolong@loongson.cn/","msgid":"<20231229021235.24065-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:35","name":"[v1,2/8] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021235.24065-1-chenxiaolong@loongson.cn/mbox/"},{"id":183831,"url":"https://patchwork.plctlab.org/api/1.2/patches/183831/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021246.24122-1-chenxiaolong@loongson.cn/","msgid":"<20231229021246.24122-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:46","name":"[v1,3/8] LoongArch: testsuite:Added test support for vect-{82, 83}.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021246.24122-1-chenxiaolong@loongson.cn/mbox/"},{"id":183832,"url":"https://patchwork.plctlab.org/api/1.2/patches/183832/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021256.24210-1-chenxiaolong@loongson.cn/","msgid":"<20231229021256.24210-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:12:56","name":"[v1,4/8] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021256.24210-1-chenxiaolong@loongson.cn/mbox/"},{"id":183828,"url":"https://patchwork.plctlab.org/api/1.2/patches/183828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021308.24800-1-chenxiaolong@loongson.cn/","msgid":"<20231229021308.24800-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:08","name":"[v1,5/8] LoongArch: testsuite:Modify the test behavior in file pr60510.f.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021308.24800-1-chenxiaolong@loongson.cn/mbox/"},{"id":183830,"url":"https://patchwork.plctlab.org/api/1.2/patches/183830/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021318.28603-1-chenxiaolong@loongson.cn/","msgid":"<20231229021318.28603-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:18","name":"[v1,6/8] LoongArch: testsuite:Added additional vectorization \"-mlasx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021318.28603-1-chenxiaolong@loongson.cn/mbox/"},{"id":183829,"url":"https://patchwork.plctlab.org/api/1.2/patches/183829/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021327.30356-1-chenxiaolong@loongson.cn/","msgid":"<20231229021327.30356-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:27","name":"[v1,7/8] LoongArch: testsuite:Added additional vectorization \"-mlsx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021327.30356-1-chenxiaolong@loongson.cn/mbox/"},{"id":183833,"url":"https://patchwork.plctlab.org/api/1.2/patches/183833/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021337.32306-1-chenxiaolong@loongson.cn/","msgid":"<20231229021337.32306-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T02:13:37","name":"[v1,8/8] LoongArch: testsuite:Modify the result check in the FMA file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229021337.32306-1-chenxiaolong@loongson.cn/mbox/"},{"id":183834,"url":"https://patchwork.plctlab.org/api/1.2/patches/183834/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com/","msgid":"<3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T02:17:24","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3e159083-e4e8-4d0b-9147-daa9119b3a63.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183835,"url":"https://patchwork.plctlab.org/api/1.2/patches/183835/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b64626-1ddc-4d85-8ba9-2a5927045ba3.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T02:25:04","name":"Re???Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f2b64626-1ddc-4d85-8ba9-2a5927045ba3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183838,"url":"https://patchwork.plctlab.org/api/1.2/patches/183838/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d093d0eb-0fa5-4567-88f8-c2d45e4b5241.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T02:30:57","name":"Re???[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d093d0eb-0fa5-4567-88f8-c2d45e4b5241.cooper.joshua@linux.alibaba.com/mbox/"},{"id":183845,"url":"https://patchwork.plctlab.org/api/1.2/patches/183845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040015.6275-1-chenxiaolong@loongson.cn/","msgid":"<20231229040015.6275-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T04:00:15","name":"[v1] LoongArch: testsuite:Add the \"-ffast-math\" compilation option for the file vect-fmin-3.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040015.6275-1-chenxiaolong@loongson.cn/mbox/"},{"id":183846,"url":"https://patchwork.plctlab.org/api/1.2/patches/183846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040517.1100-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229040517.1100-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:05:17","name":"[v4] RISC-V: Refactor riscv-vector-builtins-bases.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229040517.1100-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183847,"url":"https://patchwork.plctlab.org/api/1.2/patches/183847/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229041355.1313-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229041355.1313-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:13:55","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229041355.1313-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183848,"url":"https://patchwork.plctlab.org/api/1.2/patches/183848/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042114.1419-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229042114.1419-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:21:14","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042114.1419-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183849,"url":"https://patchwork.plctlab.org/api/1.2/patches/183849/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042158.1472-1-cooper.joshua@linux.alibaba.com/","msgid":"<20231229042158.1472-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2023-12-29T04:21:58","name":"[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229042158.1472-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":183850,"url":"https://patchwork.plctlab.org/api/1.2/patches/183850/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229044849.2340165-1-quic_apinski@quicinc.com/","msgid":"<20231229044849.2340165-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2023-12-29T04:48:49","name":"Fix gen-vect-26.c testcase after loops with multiple exits [PR113167]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229044849.2340165-1-quic_apinski@quicinc.com/mbox/"},{"id":183861,"url":"https://patchwork.plctlab.org/api/1.2/patches/183861/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074417.19547-1-chenxiaolong@loongson.cn/","msgid":"<20231229074417.19547-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T07:44:17","name":"[v1] LoongArch: testsuite:Add loongarch to gcc.dg/vect/slp-21.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074417.19547-1-chenxiaolong@loongson.cn/mbox/"},{"id":183865,"url":"https://patchwork.plctlab.org/api/1.2/patches/183865/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074806.20549-1-chenxiaolong@loongson.cn/","msgid":"<20231229074806.20549-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2023-12-29T07:48:06","name":"[v1] LoongArch: testsuite:Add loongarch to gcc.dg/vect/slp-26.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229074806.20549-1-chenxiaolong@loongson.cn/mbox/"},{"id":183876,"url":"https://patchwork.plctlab.org/api/1.2/patches/183876/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZoDVk7zoznZbtrwuog-VGHfvk-arfVse1MRsWgFTkVCQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T08:55:39","name":"[committed] i386: Fix TARGET_USE_VECTOR_FP_CONVERTS SF->DF float_extend splitter [PR113133]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAFULd4ZoDVk7zoznZbtrwuog-VGHfvk-arfVse1MRsWgFTkVCQ@mail.gmail.com/mbox/"},{"id":183889,"url":"https://patchwork.plctlab.org/api/1.2/patches/183889/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A0BE148A219601098F3CF79DA@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T10:28:38","name":"Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A0BE148A219601098F3CF79DA@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":183891,"url":"https://patchwork.plctlab.org/api/1.2/patches/183891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-1-syq@gcc.gnu.org/","msgid":"<20231229110004.2724974-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T11:00:03","name":"[1/2] MIPS: add pattern insqisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-1-syq@gcc.gnu.org/mbox/"},{"id":183892,"url":"https://patchwork.plctlab.org/api/1.2/patches/183892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-2-syq@gcc.gnu.org/","msgid":"<20231229110004.2724974-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T11:00:04","name":"[2/2] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229110004.2724974-2-syq@gcc.gnu.org/mbox/"},{"id":183899,"url":"https://patchwork.plctlab.org/api/1.2/patches/183899/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5d29a764f3cc8357e0dd344b96b2861335b9588.camel@xry111.site/","msgid":"","list_archive_url":null,"date":"2023-12-29T12:11:36","name":"Pushed: [PATCH v4] LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c5d29a764f3cc8357e0dd344b96b2861335b9588.camel@xry111.site/mbox/"},{"id":183900,"url":"https://patchwork.plctlab.org/api/1.2/patches/183900/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229121301.47289-1-xry111@xry111.site/","msgid":"<20231229121301.47289-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-29T12:12:38","name":"[pushed] LoongArch: Fix the format of bstrins__for_ior_mask condition (NFC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229121301.47289-1-xry111@xry111.site/mbox/"},{"id":183915,"url":"https://patchwork.plctlab.org/api/1.2/patches/183915/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18115-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T14:41:08","name":"AArch64 Update costing for vector conversions [PR110625]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18115-tamar@arm.com/mbox/"},{"id":183916,"url":"https://patchwork.plctlab.org/api/1.2/patches/183916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17512-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2023-12-29T14:42:52","name":"[20/21] Arm: Add Advanced SIMD cbranch implementation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-17512-tamar@arm.com/mbox/"},{"id":183922,"url":"https://patchwork.plctlab.org/api/1.2/patches/183922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-1-syq@gcc.gnu.org/","msgid":"<20231229161754.2802162-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T16:17:53","name":"[v2,1/2] MIPS: add pattern insqisi_extended and inshisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-1-syq@gcc.gnu.org/mbox/"},{"id":183923,"url":"https://patchwork.plctlab.org/api/1.2/patches/183923/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-2-syq@gcc.gnu.org/","msgid":"<20231229161754.2802162-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T16:17:54","name":"[v2,2/2] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229161754.2802162-2-syq@gcc.gnu.org/mbox/"},{"id":183927,"url":"https://patchwork.plctlab.org/api/1.2/patches/183927/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-1-syq@gcc.gnu.org/","msgid":"<20231229174649.2811234-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T17:46:48","name":"[1/2] RTX_COST: Count instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-1-syq@gcc.gnu.org/mbox/"},{"id":183928,"url":"https://patchwork.plctlab.org/api/1.2/patches/183928/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-2-syq@gcc.gnu.org/","msgid":"<20231229174649.2811234-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2023-12-29T17:46:49","name":"[2/2] MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231229174649.2811234-2-syq@gcc.gnu.org/mbox/"},{"id":183974,"url":"https://patchwork.plctlab.org/api/1.2/patches/183974/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk/","msgid":"<91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk>","list_archive_url":null,"date":"2023-12-30T00:29:43","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91c79cd-b451-523f-fc26-9f7750dced85@polyomino.org.uk/mbox/"},{"id":183976,"url":"https://patchwork.plctlab.org/api/1.2/patches/183976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292020210.28105@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-12-30T01:23:31","name":"libstdc++ testsuite/20_util/hash/quality.cc: Increase timeout 3x","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292020210.28105@arjuna.pair.com/mbox/"},{"id":183977,"url":"https://patchwork.plctlab.org/api/1.2/patches/183977/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292023350.28105@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2023-12-30T01:41:26","name":"libstdc++ testsuite/std/ranges/iota/max_size_type.cc: Reduce /10 for simulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2312292023350.28105@arjuna.pair.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/mbox/"},{"id":56,"url":"https://patchwork.plctlab.org/api/1.2/bundles/56/","web_url":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"gcc-patch_2024-01","owner":{"id":3,"url":"https://patchwork.plctlab.org/api/1.2/users/3/","username":"patchwork-bot","first_name":"","last_name":"","email":"ouuuleilei@gmail.com"},"patches":[{"id":184129,"url":"https://patchwork.plctlab.org/api/1.2/patches/184129/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-1-j@lambda.is/","msgid":"<20231231155127.506883-1-j@lambda.is>","list_archive_url":null,"date":"2023-12-31T15:51:26","name":"[v9,1/2] Add condition coverage (MC/DC)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-1-j@lambda.is/mbox/"},{"id":184128,"url":"https://patchwork.plctlab.org/api/1.2/patches/184128/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-2-j@lambda.is/","msgid":"<20231231155127.506883-2-j@lambda.is>","list_archive_url":null,"date":"2023-12-31T15:51:27","name":"[v9,2/2] Add gcov MC/DC tests for GDC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231155127.506883-2-j@lambda.is/mbox/"},{"id":184130,"url":"https://patchwork.plctlab.org/api/1.2/patches/184130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com/","msgid":"<04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com>","list_archive_url":null,"date":"2023-12-31T16:23:18","name":"[middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/04d301da3c05$aadbb740$009325c0$@nextmovesoftware.com/mbox/"},{"id":184142,"url":"https://patchwork.plctlab.org/api/1.2/patches/184142/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231191738.126529-1-xry111@xry111.site/","msgid":"<20231231191738.126529-1-xry111@xry111.site>","list_archive_url":null,"date":"2023-12-31T19:15:10","name":"LoongArch: Provide fmin/fmax RTL pattern for vectors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231231191738.126529-1-xry111@xry111.site/mbox/"},{"id":184154,"url":"https://patchwork.plctlab.org/api/1.2/patches/184154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101040329.3895909-1-quic_apinski@quicinc.com/","msgid":"<20240101040329.3895909-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-01T04:03:29","name":"Match: Improve inverted_equal_p for bool and `^` and `==` [PR113186]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101040329.3895909-1-quic_apinski@quicinc.com/mbox/"},{"id":184161,"url":"https://patchwork.plctlab.org/api/1.2/patches/184161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-1-bugaevc@gmail.com/","msgid":"<20240101115356.614446-1-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:54","name":"[gcc,1/3] Move GNU/Hurd startfile spec from config/i386/gnu.h to config/gnu.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-1-bugaevc@gmail.com/mbox/"},{"id":184160,"url":"https://patchwork.plctlab.org/api/1.2/patches/184160/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-2-bugaevc@gmail.com/","msgid":"<20240101115356.614446-2-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:55","name":"[gcc,2/3] aarch64: Add support for aarch64-gnu (GNU/Hurd on AArch64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-2-bugaevc@gmail.com/mbox/"},{"id":184158,"url":"https://patchwork.plctlab.org/api/1.2/patches/184158/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-3-bugaevc@gmail.com/","msgid":"<20240101115356.614446-3-bugaevc@gmail.com>","list_archive_url":null,"date":"2024-01-01T11:53:56","name":"[gcc,3/3] libgcc: Add basic support for aarch64-gnu (GNU/Hurd on AArch64)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101115356.614446-3-bugaevc@gmail.com/mbox/"},{"id":184175,"url":"https://patchwork.plctlab.org/api/1.2/patches/184175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101164807.3812140-1-syq@gcc.gnu.org/","msgid":"<20240101164807.3812140-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-01T16:48:07","name":"config-ml.in: Fix multi-os-dir search","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240101164807.3812140-1-syq@gcc.gnu.org/mbox/"},{"id":184182,"url":"https://patchwork.plctlab.org/api/1.2/patches/184182/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com/","msgid":"<49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com>","list_archive_url":null,"date":"2024-01-01T21:04:42","name":"[RFA,V3] new pass for sign/zero extension elimination","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49a49758-e209-4022-991a-b5d3866cf248@ventanamicro.com/mbox/"},{"id":184189,"url":"https://patchwork.plctlab.org/api/1.2/patches/184189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102012032.21154-1-wangfeng@eswincomputing.com/","msgid":"<20240102012032.21154-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T01:20:32","name":"[committed] RISC-V: Add crypto machine descriptions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102012032.21154-1-wangfeng@eswincomputing.com/mbox/"},{"id":184193,"url":"https://patchwork.plctlab.org/api/1.2/patches/184193/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102015204.2146749-1-juzhe.zhong@rivai.ai/","msgid":"<20240102015204.2146749-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T01:52:04","name":"[Committed] RISC-V: Declare STMT_VINFO_TYPE (...) as local variable","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102015204.2146749-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184199,"url":"https://patchwork.plctlab.org/api/1.2/patches/184199/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102022513.29490-1-wangfeng@eswincomputing.com/","msgid":"<20240102022513.29490-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T02:25:13","name":"[committed] RISC-V: Modify copyright year of vector-crypto.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102022513.29490-1-wangfeng@eswincomputing.com/mbox/"},{"id":184206,"url":"https://patchwork.plctlab.org/api/1.2/patches/184206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com/","msgid":"<3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T03:03:11","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3d3ea286-f78d-4ebb-9623-13b25737b11a.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184207,"url":"https://patchwork.plctlab.org/api/1.2/patches/184207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2401012219490.56278@arjuna.pair.com/","msgid":"","list_archive_url":null,"date":"2024-01-02T03:22:53","name":"testsuite: Reduce gcc.dg/torture/inline-mem-cpy-1.c by 11 for simulators","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.BSF.2.20.16.2401012219490.56278@arjuna.pair.com/mbox/"},{"id":184208,"url":"https://patchwork.plctlab.org/api/1.2/patches/184208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102033743.2158114-1-juzhe.zhong@rivai.ai/","msgid":"<20240102033743.2158114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T03:37:43","name":"RISC-V: Make liveness be aware of rgroup number of LENS[dynamic LMUL]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102033743.2158114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184209,"url":"https://patchwork.plctlab.org/api/1.2/patches/184209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com/","msgid":"<6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T03:40:01","name":"Re???Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/6da66007-46ff-4446-b182-c3d4cbc42227.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184268,"url":"https://patchwork.plctlab.org/api/1.2/patches/184268/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102072655.1533350-1-juzhe.zhong@rivai.ai/","msgid":"<20240102072655.1533350-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-02T07:26:55","name":"[Committed] RISC-V: Add simplification of dummy len and dummy mask COND_LEN_xxx pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102072655.1533350-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184274,"url":"https://patchwork.plctlab.org/api/1.2/patches/184274/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-1-wangfeng@eswincomputing.com/","msgid":"<20240102074706.35947-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T07:47:05","name":"[v5,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-1-wangfeng@eswincomputing.com/mbox/"},{"id":184275,"url":"https://patchwork.plctlab.org/api/1.2/patches/184275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-2-wangfeng@eswincomputing.com/","msgid":"<20240102074706.35947-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T07:47:06","name":"[v5,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102074706.35947-2-wangfeng@eswincomputing.com/mbox/"},{"id":184289,"url":"https://patchwork.plctlab.org/api/1.2/patches/184289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102091814.8445-1-wangfeng@eswincomputing.com/","msgid":"<20240102091814.8445-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-02T09:18:14","name":"[v6,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102091814.8445-1-wangfeng@eswincomputing.com/mbox/"},{"id":184291,"url":"https://patchwork.plctlab.org/api/1.2/patches/184291/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-2-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-2-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:34","name":"[v3,01/12,GCC] arm: vld1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-2-Ezra.Sitorus@arm.com/mbox/"},{"id":184298,"url":"https://patchwork.plctlab.org/api/1.2/patches/184298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-3-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-3-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:35","name":"[v3,02/12,GCC] arm: vld1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-3-Ezra.Sitorus@arm.com/mbox/"},{"id":184292,"url":"https://patchwork.plctlab.org/api/1.2/patches/184292/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-4-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-4-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:36","name":"[v3,03/12,GCC] arm: vld1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-4-Ezra.Sitorus@arm.com/mbox/"},{"id":184296,"url":"https://patchwork.plctlab.org/api/1.2/patches/184296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-5-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-5-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:37","name":"[v3,04/12,GCC] arm: vst1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-5-Ezra.Sitorus@arm.com/mbox/"},{"id":184293,"url":"https://patchwork.plctlab.org/api/1.2/patches/184293/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-6-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-6-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:38","name":"[v3,05/12,GCC] arm: vst1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-6-Ezra.Sitorus@arm.com/mbox/"},{"id":184300,"url":"https://patchwork.plctlab.org/api/1.2/patches/184300/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-7-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-7-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:39","name":"[v3,06/12,GCC] arm: vst1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-7-Ezra.Sitorus@arm.com/mbox/"},{"id":184297,"url":"https://patchwork.plctlab.org/api/1.2/patches/184297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-8-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-8-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:40","name":"[v3,07/12,GCC] arm: vst1q_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-8-Ezra.Sitorus@arm.com/mbox/"},{"id":184301,"url":"https://patchwork.plctlab.org/api/1.2/patches/184301/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-9-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-9-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:41","name":"[v3,08/12,GCC] arm: vst1q_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-9-Ezra.Sitorus@arm.com/mbox/"},{"id":184299,"url":"https://patchwork.plctlab.org/api/1.2/patches/184299/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-10-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-10-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:42","name":"[v3,09/12,GCC] arm: vst1q_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-10-Ezra.Sitorus@arm.com/mbox/"},{"id":184294,"url":"https://patchwork.plctlab.org/api/1.2/patches/184294/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-11-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-11-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:43","name":"[v3,10/12,GCC] arm: vld1_types_x2 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-11-Ezra.Sitorus@arm.com/mbox/"},{"id":184302,"url":"https://patchwork.plctlab.org/api/1.2/patches/184302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-12-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-12-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:44","name":"[v3,11/12,GCC] arm: vld1_types_x3 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-12-Ezra.Sitorus@arm.com/mbox/"},{"id":184303,"url":"https://patchwork.plctlab.org/api/1.2/patches/184303/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-13-Ezra.Sitorus@arm.com/","msgid":"<20240102092345.28370-13-Ezra.Sitorus@arm.com>","list_archive_url":null,"date":"2024-01-02T09:23:45","name":"[v3,12/12,GCC] arm: vld1_types_x4 ACLE intrinsics","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102092345.28370-13-Ezra.Sitorus@arm.com/mbox/"},{"id":184305,"url":"https://patchwork.plctlab.org/api/1.2/patches/184305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8655609-aa36-4d1d-845e-da3f7fa3be89.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-02T09:48:38","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a8655609-aa36-4d1d-845e-da3f7fa3be89.cooper.joshua@linux.alibaba.com/mbox/"},{"id":184348,"url":"https://patchwork.plctlab.org/api/1.2/patches/184348/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102115538.1471137-1-pan2.li@intel.com/","msgid":"<20240102115538.1471137-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-02T11:55:38","name":"[v3] RISC-V: Bugfix for doesn'\''t honor no-signed-zeros option","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102115538.1471137-1-pan2.li@intel.com/mbox/"},{"id":184319,"url":"https://patchwork.plctlab.org/api/1.2/patches/184319/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102123943.1525-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240102123943.1525-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-02T12:39:43","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102123943.1525-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184357,"url":"https://patchwork.plctlab.org/api/1.2/patches/184357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmil4bj0t1.fsf@suse.de/","msgid":"","list_archive_url":null,"date":"2024-01-02T13:56:58","name":"libsanitizer: Enable LSan and TSan for riscv64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mvmil4bj0t1.fsf@suse.de/mbox/"},{"id":184392,"url":"https://patchwork.plctlab.org/api/1.2/patches/184392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw/","msgid":"<1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw>","list_archive_url":null,"date":"2024-01-02T15:21:21","name":"[OpenACC,2.7] Implement reductions for arrays and structs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1ee7eb45-6bf1-40e5-9aec-48f2a8d28196@pllab.cs.nthu.edu.tw/mbox/"},{"id":184431,"url":"https://patchwork.plctlab.org/api/1.2/patches/184431/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102174826.1868173-1-ppalka@redhat.com/","msgid":"<20240102174826.1868173-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-02T17:48:26","name":"libstdc++: testsuite: reduce max_size_type.cc exec time [PR113175]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102174826.1868173-1-ppalka@redhat.com/mbox/"},{"id":184440,"url":"https://patchwork.plctlab.org/api/1.2/patches/184440/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-2-iii@linux.ibm.com/","msgid":"<20240102194511.3171559-2-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-02T19:41:37","name":"[v2,1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-2-iii@linux.ibm.com/mbox/"},{"id":184439,"url":"https://patchwork.plctlab.org/api/1.2/patches/184439/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-3-iii@linux.ibm.com/","msgid":"<20240102194511.3171559-3-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-02T19:41:38","name":"[v2,2/2] asan: Align .LASANPC on function boundary","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102194511.3171559-3-iii@linux.ibm.com/mbox/"},{"id":184443,"url":"https://patchwork.plctlab.org/api/1.2/patches/184443/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102201720.1526-1-trdthg47@gmail.com/","msgid":"<20240102201720.1526-1-trdthg47@gmail.com>","list_archive_url":null,"date":"2024-01-02T20:17:20","name":"RISC-V: Implement ZACAS extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102201720.1526-1-trdthg47@gmail.com/mbox/"},{"id":184534,"url":"https://patchwork.plctlab.org/api/1.2/patches/184534/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659490fd.170a0220.1ce2e.503a@mx.google.com/","msgid":"<659490fd.170a0220.1ce2e.503a@mx.google.com>","list_archive_url":null,"date":"2024-01-02T22:40:55","name":"c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659490fd.170a0220.1ce2e.503a@mx.google.com/mbox/"},{"id":184535,"url":"https://patchwork.plctlab.org/api/1.2/patches/184535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659491a5.170a0220.6af69.6797@mx.google.com/","msgid":"<659491a5.170a0220.6af69.6797@mx.google.com>","list_archive_url":null,"date":"2024-01-02T22:43:44","name":"c++/modules: Fix ICE when writing nontrivial variable initializers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659491a5.170a0220.6af69.6797@mx.google.com/mbox/"},{"id":184540,"url":"https://patchwork.plctlab.org/api/1.2/patches/184540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102233830.339489-1-dmalcolm@redhat.com/","msgid":"<20240102233830.339489-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-02T23:38:30","name":"[1/4;,v4] options: add gcc/regenerate-opt-urls.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240102233830.339489-1-dmalcolm@redhat.com/mbox/"},{"id":184548,"url":"https://patchwork.plctlab.org/api/1.2/patches/184548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103010109.21997-1-wangfeng@eswincomputing.com/","msgid":"<20240103010109.21997-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-03T01:01:09","name":"[v6,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103010109.21997-1-wangfeng@eswincomputing.com/mbox/"},{"id":184554,"url":"https://patchwork.plctlab.org/api/1.2/patches/184554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103012828.2446443-3-victor.donascimento@arm.com/","msgid":"<20240103012828.2446443-3-victor.donascimento@arm.com>","list_archive_url":null,"date":"2024-01-03T01:28:19","name":"[v3,2/3] libatomic: Enable LSE128 128-bit atomics for armv9.4-a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103012828.2446443-3-victor.donascimento@arm.com/mbox/"},{"id":184628,"url":"https://patchwork.plctlab.org/api/1.2/patches/184628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103052145.28042-1-wangfeng@eswincomputing.com/","msgid":"<20240103052145.28042-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-03T05:21:45","name":"[v7,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103052145.28042-1-wangfeng@eswincomputing.com/mbox/"},{"id":184630,"url":"https://patchwork.plctlab.org/api/1.2/patches/184630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103061535.1737-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240103061535.1737-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-03T06:15:35","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103061535.1737-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184689,"url":"https://patchwork.plctlab.org/api/1.2/patches/184689/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65953088.050a0220.d187.0c52@mx.google.com/","msgid":"<65953088.050a0220.d187.0c52@mx.google.com>","list_archive_url":null,"date":"2024-01-03T10:01:38","name":"c++: Export usings referring to global module fragment [PR109679]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65953088.050a0220.d187.0c52@mx.google.com/mbox/"},{"id":184691,"url":"https://patchwork.plctlab.org/api/1.2/patches/184691/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103100652.3891154-1-juzhe.zhong@rivai.ai/","msgid":"<20240103100652.3891154-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T10:06:52","name":"RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103100652.3891154-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184702,"url":"https://patchwork.plctlab.org/api/1.2/patches/184702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103105058.3068052-1-juzhe.zhong@rivai.ai/","msgid":"<20240103105058.3068052-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T10:50:58","name":"[V2] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103105058.3068052-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184713,"url":"https://patchwork.plctlab.org/api/1.2/patches/184713/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZVH3QTlOXjznnGf@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-03T11:41:17","name":"[committed] Small tweaks for update-copyright.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZVH3QTlOXjznnGf@tucnak/mbox/"},{"id":184733,"url":"https://patchwork.plctlab.org/api/1.2/patches/184733/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65955649.170a0220.e1f37.25c3@mx.google.com/","msgid":"<65955649.170a0220.e1f37.25c3@mx.google.com>","list_archive_url":null,"date":"2024-01-03T12:42:43","name":"[v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65955649.170a0220.e1f37.25c3@mx.google.com/mbox/"},{"id":184774,"url":"https://patchwork.plctlab.org/api/1.2/patches/184774/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com/","msgid":"<79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T14:47:54","name":"[committed] Re: [PATCH] openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/79a12614-a2b8-4da6-8316-c172abda6dbf@codesourcery.com/mbox/"},{"id":184784,"url":"https://patchwork.plctlab.org/api/1.2/patches/184784/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT2zjNN6Pf88rkKw5c0P0k4McCeYpkKO9-VCE1bvB4tmAg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-03T15:42:58","name":"Ping: [PATCH] enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contains padding","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT2zjNN6Pf88rkKw5c0P0k4McCeYpkKO9-VCE1bvB4tmAg@mail.gmail.com/mbox/"},{"id":184786,"url":"https://patchwork.plctlab.org/api/1.2/patches/184786/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com/","msgid":"<598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T15:54:13","name":"[committed] Re: [PATCH] openmp: Add support for the '\''indirect'\'' clause in C/C++","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/598af23e-c225-45e3-9298-370823cf7f1d@codesourcery.com/mbox/"},{"id":184817,"url":"https://patchwork.plctlab.org/api/1.2/patches/184817/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com/","msgid":"<7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com>","list_archive_url":null,"date":"2024-01-03T18:31:25","name":"libgomp.texi: Document omp_display_env","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7280b435-a7ee-4df5-b7ea-011ae17993d7@codesourcery.com/mbox/"},{"id":184822,"url":"https://patchwork.plctlab.org/api/1.2/patches/184822/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103184906.2568371-1-ppalka@redhat.com/","msgid":"<20240103184906.2568371-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-03T18:49:06","name":"c++: explicit inst w/ many constrained partial specs [PR104634]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103184906.2568371-1-ppalka@redhat.com/mbox/"},{"id":184826,"url":"https://patchwork.plctlab.org/api/1.2/patches/184826/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103200628.2795374-1-ppalka@redhat.com/","msgid":"<20240103200628.2795374-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-03T20:06:28","name":"[2/1] c++: access of class-scope partial tmpl spec","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103200628.2795374-1-ppalka@redhat.com/mbox/"},{"id":184857,"url":"https://patchwork.plctlab.org/api/1.2/patches/184857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103223843.2236692-1-juzhe.zhong@rivai.ai/","msgid":"<20240103223843.2236692-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T22:38:43","name":"[Committed,V3] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103223843.2236692-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184858,"url":"https://patchwork.plctlab.org/api/1.2/patches/184858/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103224331.2237500-1-juzhe.zhong@rivai.ai/","msgid":"<20240103224331.2237500-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-03T22:43:31","name":"[Committed] RISC-V: Fix indent","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240103224331.2237500-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184890,"url":"https://patchwork.plctlab.org/api/1.2/patches/184890/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-1-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:16","name":"[committed] MIPS: define_attr perf_ratio in mips.md","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-1-syq@gcc.gnu.org/mbox/"},{"id":184891,"url":"https://patchwork.plctlab.org/api/1.2/patches/184891/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-2-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-2-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:17","name":"[committed] MIPS: Implement TARGET_INSN_COSTS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-2-syq@gcc.gnu.org/mbox/"},{"id":184892,"url":"https://patchwork.plctlab.org/api/1.2/patches/184892/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-3-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-3-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:18","name":"[committed] MIPS: Add pattern insqisi_extended and inshisi_extended","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-3-syq@gcc.gnu.org/mbox/"},{"id":184893,"url":"https://patchwork.plctlab.org/api/1.2/patches/184893/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-4-syq@gcc.gnu.org/","msgid":"<20240104015819.353901-4-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-04T01:58:19","name":"[committed] MIPS/testsuite: Include stdio.h in mipscop tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104015819.353901-4-syq@gcc.gnu.org/mbox/"},{"id":184895,"url":"https://patchwork.plctlab.org/api/1.2/patches/184895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104022912.1896-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104022912.1896-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T02:29:12","name":"[v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104022912.1896-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184897,"url":"https://patchwork.plctlab.org/api/1.2/patches/184897/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023407.1949-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104023407.1949-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T02:34:07","name":"[v4] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023407.1949-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184898,"url":"https://patchwork.plctlab.org/api/1.2/patches/184898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023753.22590-1-chenglulu@loongson.cn/","msgid":"<20240104023753.22590-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-04T02:37:53","name":"LoongArch: Fixed the problem of incorrect judgment of the immediate field of the [x]vld/[x]vst instruction.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104023753.22590-1-chenglulu@loongson.cn/mbox/"},{"id":184908,"url":"https://patchwork.plctlab.org/api/1.2/patches/184908/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104044835.1088123-1-sandra@codesourcery.com/","msgid":"<20240104044835.1088123-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-04T04:48:35","name":"[committed,obvious] OpenMP: trivial cleanups to omp-general.cc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104044835.1088123-1-sandra@codesourcery.com/mbox/"},{"id":184916,"url":"https://patchwork.plctlab.org/api/1.2/patches/184916/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104065233.3958-1-juzhe.zhong@rivai.ai/","msgid":"<20240104065233.3958-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T06:52:33","name":"[Committed] RISC-V: Refine LMUL computation for MASK_LEN_LOAD/MASK_LEN_STORE IFN","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104065233.3958-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184935,"url":"https://patchwork.plctlab.org/api/1.2/patches/184935/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104082726.16368-1-juzhe.zhong@rivai.ai/","msgid":"<20240104082726.16368-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T08:27:26","name":"RISC-V: Teach liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104082726.16368-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184944,"url":"https://patchwork.plctlab.org/api/1.2/patches/184944/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104084606.220114-1-juzhe.zhong@rivai.ai/","msgid":"<20240104084606.220114-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T08:46:06","name":"[Committed,V2] RISC-V: Make liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104084606.220114-1-juzhe.zhong@rivai.ai/mbox/"},{"id":184945,"url":"https://patchwork.plctlab.org/api/1.2/patches/184945/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZw8ospwLFcL1GR@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T08:48:50","name":"lower-bitint: Punt .*_OVERFLOW optimization if cast from IMAGPART_EXPR appears before REALPART_EXPR [PR113119]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZw8ospwLFcL1GR@tucnak/mbox/"},{"id":184947,"url":"https://patchwork.plctlab.org/api/1.2/patches/184947/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZzov90j4WZ/03I@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:00:18","name":"lower-bitint: Fix up lowering of huge _BitInt 0 PHI args [PR113120]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZzov90j4WZ/03I@tucnak/mbox/"},{"id":184955,"url":"https://patchwork.plctlab.org/api/1.2/patches/184955/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ2PI1JG//L1n0m@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:11:24","name":"Improve __builtin_popcount* (x) == 1 generation if x is known != 0 [PR90693]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ2PI1JG//L1n0m@tucnak/mbox/"},{"id":184957,"url":"https://patchwork.plctlab.org/api/1.2/patches/184957/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092425.1844-2-mikpelinux@gmail.com/","msgid":"<20240104092425.1844-2-mikpelinux@gmail.com>","list_archive_url":null,"date":"2024-01-04T09:23:53","name":"Avoid ICE with m68k-elf -malign-int and libcalls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092425.1844-2-mikpelinux@gmail.com/mbox/"},{"id":184959,"url":"https://patchwork.plctlab.org/api/1.2/patches/184959/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092833.1116-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240104092833.1116-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-04T09:28:33","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104092833.1116-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":184962,"url":"https://patchwork.plctlab.org/api/1.2/patches/184962/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ7vGAu19HuMlge@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-04T09:34:52","name":"scev: Avoid ICE on results used in abnormal PHI args [PR113201]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZZ7vGAu19HuMlge@tucnak/mbox/"},{"id":184983,"url":"https://patchwork.plctlab.org/api/1.2/patches/184983/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104122915.3580970-1-juzhe.zhong@rivai.ai/","msgid":"<20240104122915.3580970-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-04T12:29:15","name":"[Committed,V3] RISC-V: Make liveness estimation be aware of .vi variant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104122915.3580970-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185013,"url":"https://patchwork.plctlab.org/api/1.2/patches/185013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104140724.3053486-1-jwakely@redhat.com/","msgid":"<20240104140724.3053486-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:06:49","name":"contrib: Add script name to usage error in gen_wcwidth.py","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104140724.3053486-1-jwakely@redhat.com/mbox/"},{"id":185021,"url":"https://patchwork.plctlab.org/api/1.2/patches/185021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142701.427320-1-dmalcolm@redhat.com/","msgid":"<20240104142701.427320-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:01","name":"[pushed] analyzer: handle arrays of unknown size in access diagrams [PR113222]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142701.427320-1-dmalcolm@redhat.com/mbox/"},{"id":185022,"url":"https://patchwork.plctlab.org/api/1.2/patches/185022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142716.427365-1-dmalcolm@redhat.com/","msgid":"<20240104142716.427365-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:16","name":"[pushed] analyzer: fix deref-before-check false positives due to inlining [PR112790]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142716.427365-1-dmalcolm@redhat.com/mbox/"},{"id":185023,"url":"https://patchwork.plctlab.org/api/1.2/patches/185023/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142728.427423-1-dmalcolm@redhat.com/","msgid":"<20240104142728.427423-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-04T14:27:28","name":"[pushed] analyzer: add sarif properties for checker events","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104142728.427423-1-dmalcolm@redhat.com/mbox/"},{"id":185030,"url":"https://patchwork.plctlab.org/api/1.2/patches/185030/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZbHOli2kMYK3n6r@kam.mff.cuni.cz/","msgid":"","list_archive_url":null,"date":"2024-01-04T14:56:58","name":"Add -falign-all-functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZbHOli2kMYK3n6r@kam.mff.cuni.cz/mbox/"},{"id":185035,"url":"https://patchwork.plctlab.org/api/1.2/patches/185035/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104150405.3055716-1-jwakely@redhat.com/","msgid":"<20240104150405.3055716-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-04T15:02:51","name":"contrib: Remove C-style comments from Python files","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104150405.3055716-1-jwakely@redhat.com/mbox/"},{"id":185052,"url":"https://patchwork.plctlab.org/api/1.2/patches/185052/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104153735.2356348-2-arthur.cohen@embecosm.com/","msgid":"<20240104153735.2356348-2-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-04T15:33:53","name":"[COMMITTED] libcpp: add function to check XID properties","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104153735.2356348-2-arthur.cohen@embecosm.com/mbox/"},{"id":185064,"url":"https://patchwork.plctlab.org/api/1.2/patches/185064/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de/","msgid":"<83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de>","list_archive_url":null,"date":"2024-01-04T16:28:02","name":"[avr,applied] PR target/112952 Fix attribute \"io\" et al. handling.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/83b90302-bd7b-4064-8c8e-7495ebd3931e@gjlay.de/mbox/"},{"id":185122,"url":"https://patchwork.plctlab.org/api/1.2/patches/185122/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-1-arsen@aarsen.me/","msgid":"<20240104185321.3276425-1-arsen@aarsen.me>","list_archive_url":null,"date":"2024-01-04T18:52:58","name":"[pushed,1/2] libstdc++: rename _A badname in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-1-arsen@aarsen.me/mbox/"},{"id":185121,"url":"https://patchwork.plctlab.org/api/1.2/patches/185121/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-2-arsen@aarsen.me/","msgid":"<20240104185321.3276425-2-arsen@aarsen.me>","list_archive_url":null,"date":"2024-01-04T18:52:59","name":"[pushed,2/2] libstdc++: fix typo in ","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240104185321.3276425-2-arsen@aarsen.me/mbox/"},{"id":185124,"url":"https://patchwork.plctlab.org/api/1.2/patches/185124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea/","msgid":"<2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea>","list_archive_url":null,"date":"2024-01-04T19:16:27","name":":Re: [PATCH v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2c3536c9-623a-8e02-45ea-8aaddb4ff5f5@idea/mbox/"},{"id":185161,"url":"https://patchwork.plctlab.org/api/1.2/patches/185161/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8ae8f6f-97c3-4c93-b253-db8d653b560e@hazardy.de/","msgid":"","list_archive_url":null,"date":"2024-01-04T22:33:28","name":"[5/4] libbacktrace: improve getting debug information for loaded dlls","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d8ae8f6f-97c3-4c93-b253-db8d653b560e@hazardy.de/mbox/"},{"id":185175,"url":"https://patchwork.plctlab.org/api/1.2/patches/185175/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105004732.1804-1-wangfeng@eswincomputing.com/","msgid":"<20240105004732.1804-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T00:47:32","name":"[committed] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105004732.1804-1-wangfeng@eswincomputing.com/mbox/"},{"id":185176,"url":"https://patchwork.plctlab.org/api/1.2/patches/185176/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105005044.4712-1-wangfeng@eswincomputing.com/","msgid":"<20240105005044.4712-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T00:50:44","name":"[committed] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105005044.4712-1-wangfeng@eswincomputing.com/mbox/"},{"id":185186,"url":"https://patchwork.plctlab.org/api/1.2/patches/185186/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105014325.1490280-1-lipeng.zhu@intel.com/","msgid":"<20240105014325.1490280-1-lipeng.zhu@intel.com>","list_archive_url":null,"date":"2024-01-05T01:43:26","name":"[v2] libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105014325.1490280-1-lipeng.zhu@intel.com/mbox/"},{"id":185191,"url":"https://patchwork.plctlab.org/api/1.2/patches/185191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105015335.2892020-1-juzhe.zhong@rivai.ai/","msgid":"<20240105015335.2892020-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-05T01:53:35","name":"RISC-V: Teach liveness computation loop invariant shift amount[Dynamic LMUL]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105015335.2892020-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185207,"url":"https://patchwork.plctlab.org/api/1.2/patches/185207/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-2-chenglulu@loongson.cn/","msgid":"<20240105034021.30177-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:40:20","name":"[v2,1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-2-chenglulu@loongson.cn/mbox/"},{"id":185206,"url":"https://patchwork.plctlab.org/api/1.2/patches/185206/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-3-chenglulu@loongson.cn/","msgid":"<20240105034021.30177-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:40:21","name":"[v2,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034021.30177-3-chenglulu@loongson.cn/mbox/"},{"id":185210,"url":"https://patchwork.plctlab.org/api/1.2/patches/185210/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-2-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-2-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:23","name":"[v2,1/7] LoongArch: testsuite:Added support for vector object detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-2-chenxiaolong@loongson.cn/mbox/"},{"id":185208,"url":"https://patchwork.plctlab.org/api/1.2/patches/185208/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-3-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-3-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:24","name":"[v2,2/7] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-3-chenxiaolong@loongson.cn/mbox/"},{"id":185211,"url":"https://patchwork.plctlab.org/api/1.2/patches/185211/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-4-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-4-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:25","name":"[v2,3/7] LoongArch: testsuite:Added detection support for LoongArch architecture in vect-{82, 83}.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-4-chenxiaolong@loongson.cn/mbox/"},{"id":185212,"url":"https://patchwork.plctlab.org/api/1.2/patches/185212/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-5-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-5-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:26","name":"[v2,4/7] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-5-chenxiaolong@loongson.cn/mbox/"},{"id":185213,"url":"https://patchwork.plctlab.org/api/1.2/patches/185213/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-6-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-6-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:27","name":"[v2,5/7] LoongArch: testsuite:Delete the default run behavior in pr60510.f.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-6-chenxiaolong@loongson.cn/mbox/"},{"id":185214,"url":"https://patchwork.plctlab.org/api/1.2/patches/185214/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-7-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-7-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:28","name":"[v2,6/7] LoongArch: testsuite:Added additional vectorization \"-mlasx\" compilation option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-7-chenxiaolong@loongson.cn/mbox/"},{"id":185209,"url":"https://patchwork.plctlab.org/api/1.2/patches/185209/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-8-chenxiaolong@loongson.cn/","msgid":"<20240105034329.21117-8-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T03:43:29","name":"[v2,7/7] LoongArch: testsuite:Give up the detection of the gcc.dg/fma-{3, 4, 6, 7}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105034329.21117-8-chenxiaolong@loongson.cn/mbox/"},{"id":185216,"url":"https://patchwork.plctlab.org/api/1.2/patches/185216/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105040711.2146204-1-juzhe.zhong@rivai.ai/","msgid":"<20240105040711.2146204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-05T04:07:11","name":"RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105040711.2146204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185219,"url":"https://patchwork.plctlab.org/api/1.2/patches/185219/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105050300.3455412-1-admin@levyhsu.com/","msgid":"<20240105050300.3455412-1-admin@levyhsu.com>","list_archive_url":null,"date":"2024-01-05T05:03:00","name":"[x86_64] PR target/107563: Add 3-instruction subroutine vector shift in ix86_expand_vec_perm_const_1","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105050300.3455412-1-admin@levyhsu.com/mbox/"},{"id":185228,"url":"https://patchwork.plctlab.org/api/1.2/patches/185228/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105060522.26253-1-chenxiaolong@loongson.cn/","msgid":"<20240105060522.26253-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:05:22","name":"[v3] LoongArch: testsuite:Added support for vector object detection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105060522.26253-1-chenxiaolong@loongson.cn/mbox/"},{"id":185239,"url":"https://patchwork.plctlab.org/api/1.2/patches/185239/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-2-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:32","name":"[1/4] LoongArch: Handle ISA evolution switches along with other options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-2-yangyujie@loongson.cn/mbox/"},{"id":185238,"url":"https://patchwork.plctlab.org/api/1.2/patches/185238/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-3-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:33","name":"[2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-3-yangyujie@loongson.cn/mbox/"},{"id":185242,"url":"https://patchwork.plctlab.org/api/1.2/patches/185242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-4-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:34","name":"[3/4] LoongArch: Use enums for constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-4-yangyujie@loongson.cn/mbox/"},{"id":185241,"url":"https://patchwork.plctlab.org/api/1.2/patches/185241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-5-yangyujie@loongson.cn/","msgid":"<20240105065535.1364530-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T06:55:35","name":"[4/4] LoongArch: Simplify -mexplicit-reloc definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105065535.1364530-5-yangyujie@loongson.cn/mbox/"},{"id":185247,"url":"https://patchwork.plctlab.org/api/1.2/patches/185247/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-1-cederman@gaisler.com/","msgid":"<20240105071913.593978-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:10","name":"sparc: Char arrays are 64-bit aligned on SPARC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-1-cederman@gaisler.com/mbox/"},{"id":185248,"url":"https://patchwork.plctlab.org/api/1.2/patches/185248/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-2-cederman@gaisler.com/","msgid":"<20240105071913.593978-2-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:11","name":"[1/2] sparc: Revert membar optimization that is not suitable for LEON5","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-2-cederman@gaisler.com/mbox/"},{"id":185249,"url":"https://patchwork.plctlab.org/api/1.2/patches/185249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-3-cederman@gaisler.com/","msgid":"<20240105071913.593978-3-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:12","name":"sparc: Treat instructions with length 0 as empty","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-3-cederman@gaisler.com/mbox/"},{"id":185250,"url":"https://patchwork.plctlab.org/api/1.2/patches/185250/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-4-cederman@gaisler.com/","msgid":"<20240105071913.593978-4-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-05T07:19:13","name":"[2/2] sparc: Add errata workaround to membar patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105071913.593978-4-cederman@gaisler.com/mbox/"},{"id":185251,"url":"https://patchwork.plctlab.org/api/1.2/patches/185251/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073713.1799828-1-xujiahao@loongson.cn/","msgid":"<20240105073713.1799828-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:37:13","name":"LoongArch: Improve lasx_xvpermi_q_ insn pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073713.1799828-1-xujiahao@loongson.cn/mbox/"},{"id":185252,"url":"https://patchwork.plctlab.org/api/1.2/patches/185252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073744.1800307-1-xujiahao@loongson.cn/","msgid":"<20240105073744.1800307-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:37:44","name":"LoongArch: Optimize zero_extendqisi2 and zero_extendqidi2 patterns","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073744.1800307-1-xujiahao@loongson.cn/mbox/"},{"id":185253,"url":"https://patchwork.plctlab.org/api/1.2/patches/185253/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073825.1806927-1-xujiahao@loongson.cn/","msgid":"<20240105073825.1806927-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:38:25","name":"LoongArch: Implenment vec_init where N is a LSX vector mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105073825.1806927-1-xujiahao@loongson.cn/mbox/"},{"id":185254,"url":"https://patchwork.plctlab.org/api/1.2/patches/185254/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074330.2309587-1-quic_apinski@quicinc.com/","msgid":"<20240105074330.2309587-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-05T07:43:30","name":"[PATCHv2] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074330.2309587-1-quic_apinski@quicinc.com/mbox/"},{"id":185256,"url":"https://patchwork.plctlab.org/api/1.2/patches/185256/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-2-chenglulu@loongson.cn/","msgid":"<20240105074412.14096-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:44:11","name":"[v3,1/2] LoongArch: Add the macro implementation of mcmodel=extreme.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-2-chenglulu@loongson.cn/mbox/"},{"id":185255,"url":"https://patchwork.plctlab.org/api/1.2/patches/185255/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-3-chenglulu@loongson.cn/","msgid":"<20240105074412.14096-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-05T07:44:12","name":"[v3,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105074412.14096-3-chenglulu@loongson.cn/mbox/"},{"id":185285,"url":"https://patchwork.plctlab.org/api/1.2/patches/185285/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083908.349586-1-kito.cheng@sifive.com/","msgid":"<20240105083908.349586-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-05T08:39:08","name":"[committed] RISC-V: Clean up testsuite for multi-lib testing [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083908.349586-1-kito.cheng@sifive.com/mbox/"},{"id":185286,"url":"https://patchwork.plctlab.org/api/1.2/patches/185286/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083923.349630-1-kito.cheng@sifive.com/","msgid":"<20240105083923.349630-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-05T08:39:23","name":"[committed] RISC-V: Clean up unused variable [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105083923.349630-1-kito.cheng@sifive.com/mbox/"},{"id":185296,"url":"https://patchwork.plctlab.org/api/1.2/patches/185296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105085152.18530-1-wangfeng@eswincomputing.com/","msgid":"<20240105085152.18530-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T08:51:52","name":"[v7,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105085152.18530-1-wangfeng@eswincomputing.com/mbox/"},{"id":185316,"url":"https://patchwork.plctlab.org/api/1.2/patches/185316/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105092344.23778-1-wangfeng@eswincomputing.com/","msgid":"<20240105092344.23778-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-05T09:23:44","name":"RISC-V: Fix avl-type operand index error for ZVBC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105092344.23778-1-wangfeng@eswincomputing.com/mbox/"},{"id":185355,"url":"https://patchwork.plctlab.org/api/1.2/patches/185355/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102432.3180887-1-jwakely@redhat.com/","msgid":"<20240105102432.3180887-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:23:48","name":"[committed] libstdc++: Use if-constexpr in std::__try_use_facet [PR113099]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102432.3180887-1-jwakely@redhat.com/mbox/"},{"id":185359,"url":"https://patchwork.plctlab.org/api/1.2/patches/185359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102514.3180917-1-jwakely@redhat.com/","msgid":"<20240105102514.3180917-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:24:33","name":"[committed] libstdc++: Remove UB from month and weekday additions and subtractions.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102514.3180917-1-jwakely@redhat.com/mbox/"},{"id":185374,"url":"https://patchwork.plctlab.org/api/1.2/patches/185374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102537.3180942-1-jwakely@redhat.com/","msgid":"<20240105102537.3180942-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T10:25:15","name":"[committed] libstdc++: Fix std::char_traits::move [PR113200]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105102537.3180942-1-jwakely@redhat.com/mbox/"},{"id":185390,"url":"https://patchwork.plctlab.org/api/1.2/patches/185390/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105124815.2739660-1-yangyujie@loongson.cn/","msgid":"<20240105124815.2739660-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-05T12:48:15","name":"LoongArch: Implement option save/restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105124815.2739660-1-yangyujie@loongson.cn/mbox/"},{"id":185434,"url":"https://patchwork.plctlab.org/api/1.2/patches/185434/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105142815.3250409-1-jwakely@redhat.com/","msgid":"<20240105142815.3250409-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:27:41","name":"[committed] libstdc++: Do not use __is_convertible unconditionally [PR113241]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105142815.3250409-1-jwakely@redhat.com/mbox/"},{"id":185450,"url":"https://patchwork.plctlab.org/api/1.2/patches/185450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144120.3257340-1-jwakely@redhat.com/","msgid":"<20240105144120.3257340-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:36:32","name":"libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144120.3257340-1-jwakely@redhat.com/mbox/"},{"id":185445,"url":"https://patchwork.plctlab.org/api/1.2/patches/185445/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144324.3257646-1-jwakely@redhat.com/","msgid":"<20240105144324.3257646-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-05T14:42:56","name":"[committed] libstdc++: Avoid overflow when appending to std::filesystem::path","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105144324.3257646-1-jwakely@redhat.com/mbox/"},{"id":185455,"url":"https://patchwork.plctlab.org/api/1.2/patches/185455/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0iv4uh5.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-05T16:26:30","name":"[pushed] aarch64: Extend VECT_COMPARE_COSTS to !SVE [PR113104]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptr0iv4uh5.fsf@arm.com/mbox/"},{"id":185457,"url":"https://patchwork.plctlab.org/api/1.2/patches/185457/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9z4u9z.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-05T16:30:48","name":"aarch64: Rework uxtl->zip optimisation [PR113196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9z4u9z.fsf@arm.com/mbox/"},{"id":185467,"url":"https://patchwork.plctlab.org/api/1.2/patches/185467/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105165056.571235-1-ppalka@redhat.com/","msgid":"<20240105165056.571235-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-05T16:50:56","name":"c++: address of NTTP object as targ [PR113242]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105165056.571235-1-ppalka@redhat.com/mbox/"},{"id":185470,"url":"https://patchwork.plctlab.org/api/1.2/patches/185470/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com/","msgid":"<0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com>","list_archive_url":null,"date":"2024-01-05T17:09:15","name":"libgccjit: Add support for setting the comment ident","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c37a2a72b2e3a5f85844d27f8d59c21d10ca7f6.camel@zoho.com/mbox/"},{"id":185476,"url":"https://patchwork.plctlab.org/api/1.2/patches/185476/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105175224.3012-3-andre.simoesdiasvieira@arm.com/","msgid":"<20240105175224.3012-3-andre.simoesdiasvieira@arm.com>","list_archive_url":null,"date":"2024-01-05T17:52:24","name":"[v2,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105175224.3012-3-andre.simoesdiasvieira@arm.com/mbox/"},{"id":185516,"url":"https://patchwork.plctlab.org/api/1.2/patches/185516/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com/","msgid":"<0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com>","list_archive_url":null,"date":"2024-01-05T18:55:56","name":"omp_target_is_accessible (was: [patch] libgomp.texi: Document omp_display_env)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0cb9d98b-04b3-447e-a83d-090fe6a23186@codesourcery.com/mbox/"},{"id":185532,"url":"https://patchwork.plctlab.org/api/1.2/patches/185532/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105200116.1382389-1-ppalka@redhat.com/","msgid":"<20240105200116.1382389-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-05T20:01:16","name":"c++: reference variable as default targ [PR101463]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240105200116.1382389-1-ppalka@redhat.com/mbox/"},{"id":185554,"url":"https://patchwork.plctlab.org/api/1.2/patches/185554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-49bdfa50-9653-4b2e-837d-7e0f676da71f-1704490707716@3c-app-gmx-bs15/","msgid":"","list_archive_url":null,"date":"2024-01-05T21:38:27","name":"Fortran: bogus warnings with REPEAT intrinsic and -Wconversion-extra [PR96724]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-49bdfa50-9653-4b2e-837d-7e0f676da71f-1704490707716@3c-app-gmx-bs15/mbox/"},{"id":185551,"url":"https://patchwork.plctlab.org/api/1.2/patches/185551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiAHl_TMOICKNPx@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T22:18:06","name":"PR target/112886, Add %S to print_operand for vector pair support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiAHl_TMOICKNPx@cowardly-lion.the-meissners.org/mbox/"},{"id":185564,"url":"https://patchwork.plctlab.org/api/1.2/patches/185564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSSeBqMdd64W7V@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:35:37","name":"Repost [PATCH 1/6] Add -mcpu=future","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSSeBqMdd64W7V@cowardly-lion.the-meissners.org/mbox/"},{"id":185565,"url":"https://patchwork.plctlab.org/api/1.2/patches/185565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSrcdY46vL40E4@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:37:17","name":"Repost [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiSrcdY46vL40E4@cowardly-lion.the-meissners.org/mbox/"},{"id":185566,"url":"https://patchwork.plctlab.org/api/1.2/patches/185566/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiS7-05Y1n48bjk@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:38:23","name":"Repost [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiS7-05Y1n48bjk@cowardly-lion.the-meissners.org/mbox/"},{"id":185567,"url":"https://patchwork.plctlab.org/api/1.2/patches/185567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTS0adUUPx7wjY@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:39:55","name":"Repost [PATCH 4/6] PowerPC: Make MMA insns support DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTS0adUUPx7wjY@cowardly-lion.the-meissners.org/mbox/"},{"id":185568,"url":"https://patchwork.plctlab.org/api/1.2/patches/185568/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTiojbYNzVvJEV@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:40:58","name":"Repost [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTiojbYNzVvJEV@cowardly-lion.the-meissners.org/mbox/"},{"id":185569,"url":"https://patchwork.plctlab.org/api/1.2/patches/185569/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTyrsBFO92FG84@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-05T23:42:02","name":"Repost [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZiTyrsBFO92FG84@cowardly-lion.the-meissners.org/mbox/"},{"id":185572,"url":"https://patchwork.plctlab.org/api/1.2/patches/185572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106003223.910964-1-mark@klomp.org/","msgid":"<20240106003223.910964-1-mark@klomp.org>","list_archive_url":null,"date":"2024-01-06T00:32:23","name":"[COMMITTED] Regenerate libgomp/configure for copyright year update","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106003223.910964-1-mark@klomp.org/mbox/"},{"id":185575,"url":"https://patchwork.plctlab.org/api/1.2/patches/185575/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106020855.1556409-1-juzhe.zhong@rivai.ai/","msgid":"<20240106020855.1556409-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T02:08:55","name":"[Committed,V2] RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106020855.1556409-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185576,"url":"https://patchwork.plctlab.org/api/1.2/patches/185576/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106022921.1714868-1-juzhe.zhong@rivai.ai/","msgid":"<20240106022921.1714868-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T02:29:21","name":"[Committed,V2] RISC-V: Teach liveness computation loop invariant shift amount","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106022921.1714868-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185588,"url":"https://patchwork.plctlab.org/api/1.2/patches/185588/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-2-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:35","name":"[v3,1/8] c++: Implement __is_const built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-2-kmatsui@gcc.gnu.org/mbox/"},{"id":185582,"url":"https://patchwork.plctlab.org/api/1.2/patches/185582/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-3-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:36","name":"[v3,2/8] libstdc++: Optimize std::is_const compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-3-kmatsui@gcc.gnu.org/mbox/"},{"id":185583,"url":"https://patchwork.plctlab.org/api/1.2/patches/185583/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-4-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:37","name":"[v3,3/8] c++: Implement __is_volatile built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-4-kmatsui@gcc.gnu.org/mbox/"},{"id":185584,"url":"https://patchwork.plctlab.org/api/1.2/patches/185584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-5-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:38","name":"[v3,4/8] libstdc++: Optimize std::is_volatile compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-5-kmatsui@gcc.gnu.org/mbox/"},{"id":185586,"url":"https://patchwork.plctlab.org/api/1.2/patches/185586/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-6-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:39","name":"[v3,5/8] c++: Implement __is_pointer built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-6-kmatsui@gcc.gnu.org/mbox/"},{"id":185587,"url":"https://patchwork.plctlab.org/api/1.2/patches/185587/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-7-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:40","name":"[v3,6/8] libstdc++: Optimize std::is_pointer compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-7-kmatsui@gcc.gnu.org/mbox/"},{"id":185585,"url":"https://patchwork.plctlab.org/api/1.2/patches/185585/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-8-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:41","name":"[v3,7/8] c++: Implement __is_unbounded_array built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-8-kmatsui@gcc.gnu.org/mbox/"},{"id":185589,"url":"https://patchwork.plctlab.org/api/1.2/patches/185589/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-9-kmatsui@gcc.gnu.org/","msgid":"<20240106050754.3054782-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-06T05:05:42","name":"[v3,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106050754.3054782-9-kmatsui@gcc.gnu.org/mbox/"},{"id":185590,"url":"https://patchwork.plctlab.org/api/1.2/patches/185590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106051038.213211-1-juzhe.zhong@rivai.ai/","msgid":"<20240106051038.213211-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-06T05:10:38","name":"[Committed] RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106051038.213211-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185618,"url":"https://patchwork.plctlab.org/api/1.2/patches/185618/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkSSMmtFTYYKjAE@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-06T08:41:44","name":"gimplify: Fix ICE in recalculate_side_effects [PR113228]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkSSMmtFTYYKjAE@tucnak/mbox/"},{"id":185621,"url":"https://patchwork.plctlab.org/api/1.2/patches/185621/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-1-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:07","name":"[1/3] LoongArch: Optimized some of the symbolic expansion instructions generated during bitwise operations.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-1-chenglulu@loongson.cn/mbox/"},{"id":185620,"url":"https://patchwork.plctlab.org/api/1.2/patches/185620/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-2-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-2-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:08","name":"[2/3] LoongArch: Redundant sign extension elimination optimization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-2-chenglulu@loongson.cn/mbox/"},{"id":185622,"url":"https://patchwork.plctlab.org/api/1.2/patches/185622/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-3-chenglulu@loongson.cn/","msgid":"<20240106085409.25985-3-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-06T08:54:09","name":"[3/3] LoongArch: Redundant sign extension elimination optimization 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106085409.25985-3-chenglulu@loongson.cn/mbox/"},{"id":185623,"url":"https://patchwork.plctlab.org/api/1.2/patches/185623/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkWh7Sz1/ugsVjU@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-06T08:59:51","name":"vect: Fix ICE in vect_analyze_loop_costing [PR113210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZkWh7Sz1/ugsVjU@tucnak/mbox/"},{"id":185634,"url":"https://patchwork.plctlab.org/api/1.2/patches/185634/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com/","msgid":"<03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-06T13:30:34","name":"[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/03c401da40a4$8819fe30$984dfa90$@nextmovesoftware.com/mbox/"},{"id":185657,"url":"https://patchwork.plctlab.org/api/1.2/patches/185657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106151802.3356059-1-jwakely@redhat.com/","msgid":"<20240106151802.3356059-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-06T15:17:49","name":"[v2] libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106151802.3356059-1-jwakely@redhat.com/mbox/"},{"id":185663,"url":"https://patchwork.plctlab.org/api/1.2/patches/185663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLh4RyAki7FV8vVLJDZydqT3hcaLKyMFjt4qvkEmWQiLg@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-06T17:26:16","name":"[Patch, fortran PR89645/99065 No IMPLICIT type error with: ASSOCIATE( X => function() )","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAGkQGiLh4RyAki7FV8vVLJDZydqT3hcaLKyMFjt4qvkEmWQiLg@mail.gmail.com/mbox/"},{"id":185669,"url":"https://patchwork.plctlab.org/api/1.2/patches/185669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de/","msgid":"<74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de>","list_archive_url":null,"date":"2024-01-06T18:36:05","name":"[testsuite,applied] PR52641: Fix more sloppy tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74b65293-8db4-46c5-9795-db42e99c1c5e@gjlay.de/mbox/"},{"id":185670,"url":"https://patchwork.plctlab.org/api/1.2/patches/185670/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-2-sandra@codesourcery.com/","msgid":"<20240106185257.126445-2-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:49","name":"[1/8] OpenMP: metadirective tree data structures and front-end interfaces","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-2-sandra@codesourcery.com/mbox/"},{"id":185671,"url":"https://patchwork.plctlab.org/api/1.2/patches/185671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-3-sandra@codesourcery.com/","msgid":"<20240106185257.126445-3-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:50","name":"[2/8] OpenMP: middle-end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-3-sandra@codesourcery.com/mbox/"},{"id":185672,"url":"https://patchwork.plctlab.org/api/1.2/patches/185672/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-4-sandra@codesourcery.com/","msgid":"<20240106185257.126445-4-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:51","name":"[3/8] libgomp: runtime support for target_device selector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-4-sandra@codesourcery.com/mbox/"},{"id":185673,"url":"https://patchwork.plctlab.org/api/1.2/patches/185673/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-5-sandra@codesourcery.com/","msgid":"<20240106185257.126445-5-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:52","name":"[4/8] OpenMP: C front end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-5-sandra@codesourcery.com/mbox/"},{"id":185674,"url":"https://patchwork.plctlab.org/api/1.2/patches/185674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-6-sandra@codesourcery.com/","msgid":"<20240106185257.126445-6-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:53","name":"[5/8] OpenMP: C++ front-end support for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-6-sandra@codesourcery.com/mbox/"},{"id":185677,"url":"https://patchwork.plctlab.org/api/1.2/patches/185677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-7-sandra@codesourcery.com/","msgid":"<20240106185257.126445-7-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:54","name":"[6/8] OpenMP: common c/c++ testcases for metadirectives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-7-sandra@codesourcery.com/mbox/"},{"id":185675,"url":"https://patchwork.plctlab.org/api/1.2/patches/185675/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-8-sandra@codesourcery.com/","msgid":"<20240106185257.126445-8-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:55","name":"[7/8] OpenMP: Fortran front-end support for metadirectives.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-8-sandra@codesourcery.com/mbox/"},{"id":185676,"url":"https://patchwork.plctlab.org/api/1.2/patches/185676/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-9-sandra@codesourcery.com/","msgid":"<20240106185257.126445-9-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-06T18:52:56","name":"[8/8] OpenMP: Update documentation of metadirective implementation status.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240106185257.126445-9-sandra@codesourcery.com/mbox/"},{"id":185685,"url":"https://patchwork.plctlab.org/api/1.2/patches/185685/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f09b2f16-ea11-45d9-b74c-a983be908e91@net-b.de/","msgid":"","list_archive_url":null,"date":"2024-01-06T21:20:48","name":"gcn.h: Add builtin_define (\"__gfx1030\")","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f09b2f16-ea11-45d9-b74c-a983be908e91@net-b.de/mbox/"},{"id":185696,"url":"https://patchwork.plctlab.org/api/1.2/patches/185696/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/qFJs-vqcMVgr5VFvNrULQ3BL2GM2v_qgabqCA6KH3aDONEBK2La5VDARf_AJplVr5hafQ2T7SO6eQLh3omCRDfONNa2_p_mcsZWmPmM0Ajc=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-07T00:00:10","name":"[v8,1/4] c++: P0847R7 (deducing this) - prerequisite changes. [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/qFJs-vqcMVgr5VFvNrULQ3BL2GM2v_qgabqCA6KH3aDONEBK2La5VDARf_AJplVr5hafQ2T7SO6eQLh3omCRDfONNa2_p_mcsZWmPmM0Ajc=@protonmail.com/mbox/"},{"id":185697,"url":"https://patchwork.plctlab.org/api/1.2/patches/185697/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/O5vVsH8QiXR-oPGrQJkZJA5M1iFbHewAJ3RfeDGvo-sXwz2qRjs7QyevmuzV792p3A8S8wQsubjri-Sy1DJtePA7NuEJhA_15EWsOrqd0Dg=@protonmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-07T00:03:19","name":"[v8,3/4] c++: P0847R7 (deducing this) - diagnostics. [PR102609]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/O5vVsH8QiXR-oPGrQJkZJA5M1iFbHewAJ3RfeDGvo-sXwz2qRjs7QyevmuzV792p3A8S8wQsubjri-Sy1DJtePA7NuEJhA_15EWsOrqd0Dg=@protonmail.com/mbox/"},{"id":185702,"url":"https://patchwork.plctlab.org/api/1.2/patches/185702/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107003654.1629705-1-juzhe.zhong@rivai.ai/","msgid":"<20240107003654.1629705-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-07T00:36:54","name":"[Committed] RISC-V: Use MAX instead of std::max [VSETVL PASS]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107003654.1629705-1-juzhe.zhong@rivai.ai/mbox/"},{"id":185707,"url":"https://patchwork.plctlab.org/api/1.2/patches/185707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010049.3402703-1-jwakely@redhat.com/","msgid":"<20240107010049.3402703-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-07T01:00:27","name":"[committed] libstdc++: Remove dg-timeout-factor from test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010049.3402703-1-jwakely@redhat.com/mbox/"},{"id":185704,"url":"https://patchwork.plctlab.org/api/1.2/patches/185704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010056.3402724-1-jwakely@redhat.com/","msgid":"<20240107010056.3402724-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-07T01:00:51","name":"[committed] libstdc++: Avoid conflicting declaration in eh_call.cc [PR112997]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107010056.3402724-1-jwakely@redhat.com/mbox/"},{"id":185725,"url":"https://patchwork.plctlab.org/api/1.2/patches/185725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc7da78e-c215-4129-94ce-442277596802@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T12:14:10","name":"[testsuite,applied] PR52641: Fix more fallout from sloppy tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/dc7da78e-c215-4129-94ce-442277596802@gjlay.de/mbox/"},{"id":185736,"url":"https://patchwork.plctlab.org/api/1.2/patches/185736/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com/","msgid":"<9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com>","list_archive_url":null,"date":"2024-01-07T12:56:48","name":"Add __cow_string C string constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9a2de7f9-7ac3-4d4a-a4cd-6a379c4217bc@gmail.com/mbox/"},{"id":185742,"url":"https://patchwork.plctlab.org/api/1.2/patches/185742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5db37f0-9e5e-471a-9ac3-16176d215e33@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T15:53:04","name":"[testsuite,applied] PR52641 Fix more fallout from sloppy tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a5db37f0-9e5e-471a-9ac3-16176d215e33@gjlay.de/mbox/"},{"id":185747,"url":"https://patchwork.plctlab.org/api/1.2/patches/185747/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com/","msgid":"<51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com>","list_archive_url":null,"date":"2024-01-07T16:55:01","name":"[committed] Fix typo in last change","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/51d2b99d-7101-4fb3-973b-0d23df96b6d8@gmail.com/mbox/"},{"id":185757,"url":"https://patchwork.plctlab.org/api/1.2/patches/185757/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b53b0b78-c963-4d4f-83c5-2aa6071f5163@net-b.de/","msgid":"","list_archive_url":null,"date":"2024-01-07T19:20:19","name":"GCN: Add pre-initial support for gfx1100","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b53b0b78-c963-4d4f-83c5-2aa6071f5163@net-b.de/mbox/"},{"id":185760,"url":"https://patchwork.plctlab.org/api/1.2/patches/185760/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de/","msgid":"<2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de>","list_archive_url":null,"date":"2024-01-07T20:12:01","name":"[avr,applied] Fix some avr test cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2b2e3cab-a87e-402f-9820-d785a6056e6a@gjlay.de/mbox/"},{"id":185761,"url":"https://patchwork.plctlab.org/api/1.2/patches/185761/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107203259.1705373-1-ppalka@redhat.com/","msgid":"<20240107203259.1705373-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-07T20:32:59","name":"libstdc++: reduce std::variant template instantiation depth","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240107203259.1705373-1-ppalka@redhat.com/mbox/"},{"id":185771,"url":"https://patchwork.plctlab.org/api/1.2/patches/185771/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401072322250.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-08T00:06:20","name":"RISC-V: Also handle sign extension in branch costing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401072322250.5892@tpp.orcam.me.uk/mbox/"},{"id":185776,"url":"https://patchwork.plctlab.org/api/1.2/patches/185776/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108005831.35467-1-wangfeng@eswincomputing.com/","msgid":"<20240108005831.35467-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T00:58:31","name":"[committed] RISC-V: Fix avl-type operand index error for ZVBC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108005831.35467-1-wangfeng@eswincomputing.com/mbox/"},{"id":185777,"url":"https://patchwork.plctlab.org/api/1.2/patches/185777/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT3=TCsF2GcsawmbOReDjwVPmxpSLw1_CTZX5NE6HUtu+g@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T01:01:48","name":"libstdc++: atomic: Add missing clear_padding in __atomic_float constructor","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAJ=gGT3=TCsF2GcsawmbOReDjwVPmxpSLw1_CTZX5NE6HUtu+g@mail.gmail.com/mbox/"},{"id":185782,"url":"https://patchwork.plctlab.org/api/1.2/patches/185782/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-2-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-2-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:07","name":"[v2,1/4] LoongArch: Handle ISA evolution switches along with other options","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-2-yangyujie@loongson.cn/mbox/"},{"id":185783,"url":"https://patchwork.plctlab.org/api/1.2/patches/185783/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-3-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-3-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:08","name":"[v2,2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-3-yangyujie@loongson.cn/mbox/"},{"id":185779,"url":"https://patchwork.plctlab.org/api/1.2/patches/185779/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-4-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-4-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:09","name":"[v2,3/4] LoongArch: Use enums for constants","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-4-yangyujie@loongson.cn/mbox/"},{"id":185780,"url":"https://patchwork.plctlab.org/api/1.2/patches/185780/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-5-yangyujie@loongson.cn/","msgid":"<20240108011410.305003-5-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-08T01:14:10","name":"[v2,4/4] LoongArch: Simplify -mexplicit-reloc definitions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011410.305003-5-yangyujie@loongson.cn/mbox/"},{"id":185791,"url":"https://patchwork.plctlab.org/api/1.2/patches/185791/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011621.3670359-1-jwakely@redhat.com/","msgid":"<20240108011621.3670359-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:15:50","name":"[committed] libstdc++: Implement P2909R4 (\"Dude, where'\''s my char?\") for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011621.3670359-1-jwakely@redhat.com/mbox/"},{"id":185797,"url":"https://patchwork.plctlab.org/api/1.2/patches/185797/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011829.3670492-1-jwakely@redhat.com/","msgid":"<20240108011829.3670492-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:17:14","name":"[committed,V3] libstdc++: Add Unicode-aware width estimation for std::format","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011829.3670492-1-jwakely@redhat.com/mbox/"},{"id":185796,"url":"https://patchwork.plctlab.org/api/1.2/patches/185796/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-1-jwakely@redhat.com/","msgid":"<20240108011930.3670651-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:19:01","name":"[committed,1/2] libstdc++: Implement P2905R2 \"Runtime format strings\" for C++20","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-1-jwakely@redhat.com/mbox/"},{"id":185778,"url":"https://patchwork.plctlab.org/api/1.2/patches/185778/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-2-jwakely@redhat.com/","msgid":"<20240108011930.3670651-2-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T01:19:02","name":"[committed,2/2] libstdc++: Implement P2918R0 \"Runtime format strings II\" for C++26","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108011930.3670651-2-jwakely@redhat.com/mbox/"},{"id":185792,"url":"https://patchwork.plctlab.org/api/1.2/patches/185792/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com/","msgid":"<91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com>","list_archive_url":null,"date":"2024-01-08T02:35:07","name":"strub: Only unbias stack point for SPARC_STACK_BOUNDARY_HACK [PR113100]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/91d2c107-0168-791b-b5fa-de21c2345f84@linux.ibm.com/mbox/"},{"id":185793,"url":"https://patchwork.plctlab.org/api/1.2/patches/185793/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d768bc05-07db-9bd3-eade-f264e81ae952@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:23","name":"testsuite, rs6000: Adjust pcrel-sibcall-1.c with noipa [PR112751]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d768bc05-07db-9bd3-eade-f264e81ae952@linux.ibm.com/mbox/"},{"id":185794,"url":"https://patchwork.plctlab.org/api/1.2/patches/185794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/de211e8d-761f-8b37-745e-138ed9284013@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:46","name":"rs6000: Eliminate zext fed by vclzlsbb [PR111480]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/de211e8d-761f-8b37-745e-138ed9284013@linux.ibm.com/mbox/"},{"id":185795,"url":"https://patchwork.plctlab.org/api/1.2/patches/185795/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4bc12b8-2d66-3227-6101-bbb0bcb1e3b1@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T02:35:52","name":"rs6000: Make copysign (x, -1) back to -abs (x) for IEEE128 float [PR112606]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b4bc12b8-2d66-3227-6101-bbb0bcb1e3b1@linux.ibm.com/mbox/"},{"id":185798,"url":"https://patchwork.plctlab.org/api/1.2/patches/185798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108030830.1303730-1-hongyu.wang@intel.com/","msgid":"<20240108030830.1303730-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-08T03:08:30","name":"i386: [APX] Add missing document for APX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108030830.1303730-1-hongyu.wang@intel.com/mbox/"},{"id":185813,"url":"https://patchwork.plctlab.org/api/1.2/patches/185813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108061126.792885-1-kito.cheng@sifive.com/","msgid":"<20240108061126.792885-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T06:11:26","name":"[committed] RISC-V: Fix testsuite","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108061126.792885-1-kito.cheng@sifive.com/mbox/"},{"id":185814,"url":"https://patchwork.plctlab.org/api/1.2/patches/185814/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com/","msgid":"<05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com>","list_archive_url":null,"date":"2024-01-08T06:15:54","name":"[1/2] arm: Add cortex-m52 core","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/05750a1e-8f51-4109-9342-3b0b9670cbd2@gmail.com/mbox/"},{"id":185816,"url":"https://patchwork.plctlab.org/api/1.2/patches/185816/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com/","msgid":"<0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com>","list_archive_url":null,"date":"2024-01-08T06:16:37","name":"[2/2] arm: Add cortex-m52 doc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0c5c7a33-93c9-46ad-85f3-b6f4bb3d5ddd@gmail.com/mbox/"},{"id":185839,"url":"https://patchwork.plctlab.org/api/1.2/patches/185839/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108082029.751159-1-cederman@gaisler.com/","msgid":"<20240108082029.751159-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-08T08:20:29","name":"testsuite: Skip ifcvt-4.c for SPARC V8","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108082029.751159-1-cederman@gaisler.com/mbox/"},{"id":185843,"url":"https://patchwork.plctlab.org/api/1.2/patches/185843/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108084049.2591110-1-haochen.jiang@intel.com/","msgid":"<20240108084049.2591110-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-08T08:40:49","name":"i386: Fix recent testcase fail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108084049.2591110-1-haochen.jiang@intel.com/mbox/"},{"id":185862,"url":"https://patchwork.plctlab.org/api/1.2/patches/185862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-1-wangfeng@eswincomputing.com/","msgid":"<20240108091201.8087-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T09:12:00","name":"[v8,2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-1-wangfeng@eswincomputing.com/mbox/"},{"id":185863,"url":"https://patchwork.plctlab.org/api/1.2/patches/185863/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-2-wangfeng@eswincomputing.com/","msgid":"<20240108091201.8087-2-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-08T09:12:01","name":"[v7,1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108091201.8087-2-wangfeng@eswincomputing.com/mbox/"},{"id":185871,"url":"https://patchwork.plctlab.org/api/1.2/patches/185871/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108092434.554918-1-iii@linux.ibm.com/","msgid":"<20240108092434.554918-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-08T09:22:57","name":"asan: Do not call asan_function_start () without the current function [PR113251]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108092434.554918-1-iii@linux.ibm.com/mbox/"},{"id":185878,"url":"https://patchwork.plctlab.org/api/1.2/patches/185878/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108095641.D66D8385842A@sourceware.org/","msgid":"<20240108095641.D66D8385842A@sourceware.org>","list_archive_url":null,"date":"2024-01-08T09:50:44","name":"Clarify -mmovbe documentation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108095641.D66D8385842A@sourceware.org/mbox/"},{"id":185879,"url":"https://patchwork.plctlab.org/api/1.2/patches/185879/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659bc714.170a0220.c04dd.cc6a@mx.google.com/","msgid":"<659bc714.170a0220.c04dd.cc6a@mx.google.com>","list_archive_url":null,"date":"2024-01-08T09:57:35","name":"[v2] c++/modules: Differentiate extern templates and TYPE_DECL_SUPPRESS_DEBUG [PR112820]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659bc714.170a0220.c04dd.cc6a@mx.google.com/mbox/"},{"id":185886,"url":"https://patchwork.plctlab.org/api/1.2/patches/185886/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com/","msgid":"<49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com>","list_archive_url":null,"date":"2024-01-08T10:01:23","name":"[committed] amdgcn: Don'\''t double-count AVGPRs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/49e7bf47-f67b-4db0-b2d6-b3a121a363a1@codesourcery.com/mbox/"},{"id":185887,"url":"https://patchwork.plctlab.org/api/1.2/patches/185887/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbb77a85-a528-4ba0-bf50-8515bca5e4a7@codesourcery.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T10:03:48","name":"[committed] amdgcn: Match new XNACK defaults in mkoffload","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/bbb77a85-a528-4ba0-bf50-8515bca5e4a7@codesourcery.com/mbox/"},{"id":185907,"url":"https://patchwork.plctlab.org/api/1.2/patches/185907/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108105552.714778-1-cupertino.miranda@oracle.com/","msgid":"<20240108105552.714778-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2024-01-08T10:55:52","name":"btf: print string position as comment for validation and testing purposes.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108105552.714778-1-cupertino.miranda@oracle.com/mbox/"},{"id":185895,"url":"https://patchwork.plctlab.org/api/1.2/patches/185895/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108110505.715284-1-cupertino.miranda@oracle.com/","msgid":"<20240108110505.715284-1-cupertino.miranda@oracle.com>","list_archive_url":null,"date":"2024-01-08T11:05:05","name":"bpf: Correct BTF for kernel_helper attributed decls.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108110505.715284-1-cupertino.miranda@oracle.com/mbox/"},{"id":185917,"url":"https://patchwork.plctlab.org/api/1.2/patches/185917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108113513.554483858CDB@sourceware.org/","msgid":"<20240108113513.554483858CDB@sourceware.org>","list_archive_url":null,"date":"2024-01-08T11:29:24","name":"tree-optimization/113026 - avoid vector epilog in more cases","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108113513.554483858CDB@sourceware.org/mbox/"},{"id":185985,"url":"https://patchwork.plctlab.org/api/1.2/patches/185985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18133-tamar@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-08T12:56:38","name":"[frontend] : don'\''t ice with pragma NOVECTOR if loop in C has no condition [PR113267]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/patch-18133-tamar@arm.com/mbox/"},{"id":185992,"url":"https://patchwork.plctlab.org/api/1.2/patches/185992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108131456.803003-2-mary.bennett@embecosm.com/","msgid":"<20240108131456.803003-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-08T13:14:56","name":"[v5,1/1] RISC-V: Add support for XCVbi extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108131456.803003-2-mary.bennett@embecosm.com/mbox/"},{"id":186006,"url":"https://patchwork.plctlab.org/api/1.2/patches/186006/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-2-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-2-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:34","name":"[1/5] RISC-V: Extract part parsing base ISA logic into a standalone function [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-2-kito.cheng@sifive.com/mbox/"},{"id":186007,"url":"https://patchwork.plctlab.org/api/1.2/patches/186007/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-3-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-3-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:35","name":"[2/5] RISC-V: Relax the -march string for accept any order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-3-kito.cheng@sifive.com/mbox/"},{"id":186008,"url":"https://patchwork.plctlab.org/api/1.2/patches/186008/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-4-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-4-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:36","name":"[3/5] RISC-V: Remove unused function in riscv_subset_list [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-4-kito.cheng@sifive.com/mbox/"},{"id":186012,"url":"https://patchwork.plctlab.org/api/1.2/patches/186012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-5-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-5-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:37","name":"[4/5] RISC-V: Update testsuite due to -march string relaxation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-5-kito.cheng@sifive.com/mbox/"},{"id":186015,"url":"https://patchwork.plctlab.org/api/1.2/patches/186015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-6-kito.cheng@sifive.com/","msgid":"<20240108134738.998804-6-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-08T13:47:38","name":"[5/5] RISC-V: Document the syntax of -march","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108134738.998804-6-kito.cheng@sifive.com/mbox/"},{"id":186065,"url":"https://patchwork.plctlab.org/api/1.2/patches/186065/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com/","msgid":"<00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-08T16:07:29","name":"[libatomic] Fix testsuite regressions on ARM [raspberry pi].","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00e701da424c$c8bb0b60$5a312220$@nextmovesoftware.com/mbox/"},{"id":186072,"url":"https://patchwork.plctlab.org/api/1.2/patches/186072/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108161333.3785051-1-jwakely@redhat.com/","msgid":"<20240108161333.3785051-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-08T16:13:05","name":"[committed] libstdc++: Remove std::__unicode::__null_sentinel","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108161333.3785051-1-jwakely@redhat.com/mbox/"},{"id":186101,"url":"https://patchwork.plctlab.org/api/1.2/patches/186101/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108184010.2235409-1-ppalka@redhat.com/","msgid":"<20240108184010.2235409-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:40:10","name":"c++: non-dep array list-init w/ non-triv dtor [PR109899]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240108184010.2235409-1-ppalka@redhat.com/mbox/"},{"id":186106,"url":"https://patchwork.plctlab.org/api/1.2/patches/186106/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com/","msgid":"<815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:53:21","name":"[committed] MAINTAINERS: Update my email address","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/815d6e2-c785-e1c6-3a77-29e59c988a8@redhat.com/mbox/"},{"id":186110,"url":"https://patchwork.plctlab.org/api/1.2/patches/186110/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com/","msgid":"<28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com>","list_archive_url":null,"date":"2024-01-08T18:59:38","name":"[committed] steering.html: Update my affiliation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/28c67da-cc81-25de-46ed-adcb9afeadb5@redhat.com/mbox/"},{"id":186139,"url":"https://patchwork.plctlab.org/api/1.2/patches/186139/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZxdVv8wUQ0dVY55@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T20:38:46","name":"[committed] hppa: Fix bind_c_coms.f90 and bind_c_vars.f90 tests on hppa","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZxdVv8wUQ0dVY55@mx3210.localdomain/mbox/"},{"id":186146,"url":"https://patchwork.plctlab.org/api/1.2/patches/186146/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx2CtWx8EMNjxS0@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T22:24:10","name":"[committed] Skip gfortran.dg/dec_math.f90 on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx2CtWx8EMNjxS0@mx3210.localdomain/mbox/"},{"id":186147,"url":"https://patchwork.plctlab.org/api/1.2/patches/186147/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx4jvGxSRkS0vAw@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-08T22:34:54","name":"[committed] xfail dg-final \"Sunk statements: 5\" on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZx4jvGxSRkS0vAw@mx3210.localdomain/mbox/"},{"id":186171,"url":"https://patchwork.plctlab.org/api/1.2/patches/186171/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV3P223MB091644C520D34FF0A7166513D66B2@LV3P223MB0916.NAMP223.PROD.OUTLOOK.COM/","msgid":"","list_archive_url":null,"date":"2024-01-08T23:32:16","name":"Resolve issue with Canadian build for x86_64-w64-mingw32 multilibs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV3P223MB091644C520D34FF0A7166513D66B2@LV3P223MB0916.NAMP223.PROD.OUTLOOK.COM/mbox/"},{"id":186187,"url":"https://patchwork.plctlab.org/api/1.2/patches/186187/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109012453.675353-1-juzhe.zhong@rivai.ai/","msgid":"<20240109012453.675353-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T01:24:53","name":"RISC-V: Fix loop invariant check","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109012453.675353-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186188,"url":"https://patchwork.plctlab.org/api/1.2/patches/186188/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090941460629701@eswincomputing.com/","msgid":"<202401090941460629701@eswincomputing.com>","list_archive_url":null,"date":"2024-01-09T01:41:46","name":"??????: Re: [PATCH v8 2/2] RISC-V: Add crypto vector api-testing cases.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090941460629701@eswincomputing.com/mbox/"},{"id":186189,"url":"https://patchwork.plctlab.org/api/1.2/patches/186189/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090942058650372@eswincomputing.com/","msgid":"<202401090942058650372@eswincomputing.com>","list_archive_url":null,"date":"2024-01-09T01:42:06","name":"??????: Re: [PATCH v7 1/2] RISC-V: Add crypto vector builtin function.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/202401090942058650372@eswincomputing.com/mbox/"},{"id":186190,"url":"https://patchwork.plctlab.org/api/1.2/patches/186190/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021054.1095824-1-juzhe.zhong@rivai.ai/","msgid":"<20240109021054.1095824-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T02:10:54","name":"[Committed] RISC-V: Fix comments of segment load/store intrinsic[NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021054.1095824-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186191,"url":"https://patchwork.plctlab.org/api/1.2/patches/186191/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com/","msgid":"<2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T02:12:26","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2ceba0d5-757c-410b-a8eb-72dcf61467f3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186192,"url":"https://patchwork.plctlab.org/api/1.2/patches/186192/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021340.1129665-1-juzhe.zhong@rivai.ai/","msgid":"<20240109021340.1129665-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-09T02:13:40","name":"[Committed] RISC-V: Fix comments of segment load/store intrinsic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109021340.1129665-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186197,"url":"https://patchwork.plctlab.org/api/1.2/patches/186197/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109031851.1026-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240109031851.1026-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T03:18:51","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109031851.1026-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186198,"url":"https://patchwork.plctlab.org/api/1.2/patches/186198/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com/","msgid":"<8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-09T03:23:05","name":"Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/8b20e71a-2019-410d-b03f-d246856f4382.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186227,"url":"https://patchwork.plctlab.org/api/1.2/patches/186227/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070211.325219-1-haochen.jiang@intel.com/","msgid":"<20240109070211.325219-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:02:11","name":"Add -mevex512 into invoke.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070211.325219-1-haochen.jiang@intel.com/mbox/"},{"id":186229,"url":"https://patchwork.plctlab.org/api/1.2/patches/186229/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070702.413866-1-hongyu.wang@intel.com/","msgid":"<20240109070702.413866-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:07:02","name":"i386: [APX] Document inline asm behavior and new switch for APX","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109070702.413866-1-hongyu.wang@intel.com/mbox/"},{"id":186230,"url":"https://patchwork.plctlab.org/api/1.2/patches/186230/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109071205.417812-1-hongyu.wang@intel.com/","msgid":"<20240109071205.417812-1-hongyu.wang@intel.com>","list_archive_url":null,"date":"2024-01-09T07:12:04","name":"[wwwdocs] gcc-14/changes: Update APX inline asm behavior for x86_64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109071205.417812-1-hongyu.wang@intel.com/mbox/"},{"id":186249,"url":"https://patchwork.plctlab.org/api/1.2/patches/186249/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSk8vgLAXGVJb_TZq+yJL1EEZ2B9x6yFnDDkruu5tTUUZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:20:02","name":"c++: side effect in nullptr_t conversion fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSk8vgLAXGVJb_TZq+yJL1EEZ2B9x6yFnDDkruu5tTUUZA@mail.gmail.com/mbox/"},{"id":186277,"url":"https://patchwork.plctlab.org/api/1.2/patches/186277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0HuOnrY+ZxfYQu@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:45:44","name":"vect: Ensure both NITERSM1 and NITERS are INTEGER_CSTs or neither of them [PR113210]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0HuOnrY+ZxfYQu@tucnak/mbox/"},{"id":186283,"url":"https://patchwork.plctlab.org/api/1.2/patches/186283/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0JQX+D1CeEH9aB@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T08:52:17","name":"c-family: copy attribute diagnostic fixes [PR113262]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0JQX+D1CeEH9aB@tucnak/mbox/"},{"id":186284,"url":"https://patchwork.plctlab.org/api/1.2/patches/186284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0LVCjnhnI4r5qs@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T09:01:08","name":"[committed] libgomp: Use absolute pathname to testsuite/flock [PR113192]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ0LVCjnhnI4r5qs@tucnak/mbox/"},{"id":186297,"url":"https://patchwork.plctlab.org/api/1.2/patches/186297/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3275505.44csPzL39Z@fomalhaut/","msgid":"<3275505.44csPzL39Z@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:16:22","name":"Fix PR rtl-optimization/113140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3275505.44csPzL39Z@fomalhaut/mbox/"},{"id":186298,"url":"https://patchwork.plctlab.org/api/1.2/patches/186298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3783379.kQq0lBPeGt@fomalhaut/","msgid":"<3783379.kQq0lBPeGt@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:23:44","name":"[Ada] Fix PR ada/113195","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3783379.kQq0lBPeGt@fomalhaut/mbox/"},{"id":186296,"url":"https://patchwork.plctlab.org/api/1.2/patches/186296/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5902287.MhkbZ0Pkbq@fomalhaut/","msgid":"<5902287.MhkbZ0Pkbq@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:27:10","name":"Fix PR rtl-optimization/113140","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5902287.MhkbZ0Pkbq@fomalhaut/mbox/"},{"id":186302,"url":"https://patchwork.plctlab.org/api/1.2/patches/186302/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2177833.Mh6RI2rZIc@fomalhaut/","msgid":"<2177833.Mh6RI2rZIc@fomalhaut>","list_archive_url":null,"date":"2024-01-09T09:50:27","name":"[Ada] Fix PR ada/112781 (1/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2177833.Mh6RI2rZIc@fomalhaut/mbox/"},{"id":186307,"url":"https://patchwork.plctlab.org/api/1.2/patches/186307/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2180612.Icojqenx9y@fomalhaut/","msgid":"<2180612.Icojqenx9y@fomalhaut>","list_archive_url":null,"date":"2024-01-09T10:07:46","name":"[Ada] Fix PR ada/112781 (2/2)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2180612.Icojqenx9y@fomalhaut/mbox/"},{"id":186311,"url":"https://patchwork.plctlab.org/api/1.2/patches/186311/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109104648.675293-1-hongtao.liu@intel.com/","msgid":"<20240109104648.675293-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-09T10:46:48","name":"Optimize A < B ? A : B to MIN_EXPR.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109104648.675293-1-hongtao.liu@intel.com/mbox/"},{"id":186317,"url":"https://patchwork.plctlab.org/api/1.2/patches/186317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109105253.332676-1-iii@linux.ibm.com/","msgid":"<20240109105253.332676-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-09T10:51:16","name":"rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109105253.332676-1-iii@linux.ibm.com/mbox/"},{"id":186323,"url":"https://patchwork.plctlab.org/api/1.2/patches/186323/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccb585d7-8db8-4500-9a19-2c4e47f5bcfa@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T11:14:36","name":"rs6000: New pass for replacement of adjacent lxv with lxvp.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ccb585d7-8db8-4500-9a19-2c4e47f5bcfa@linux.ibm.com/mbox/"},{"id":186349,"url":"https://patchwork.plctlab.org/api/1.2/patches/186349/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109123646.555D13858292@sourceware.org/","msgid":"<20240109123646.555D13858292@sourceware.org>","list_archive_url":null,"date":"2024-01-09T12:31:00","name":"tree-optimization/113026 - fix vector epilogue maximum iter bound","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109123646.555D13858292@sourceware.org/mbox/"},{"id":186393,"url":"https://patchwork.plctlab.org/api/1.2/patches/186393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109124340.3886305-1-jwakely@redhat.com/","msgid":"<20240109124340.3886305-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T12:33:10","name":"[gcc-13] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109124340.3886305-1-jwakely@redhat.com/mbox/"},{"id":186361,"url":"https://patchwork.plctlab.org/api/1.2/patches/186361/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ1FgF0xzHtfSefX@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-09T13:09:20","name":"[committed] aarch64: Fix up GC of aarch64_simd_types [PR113270]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ1FgF0xzHtfSefX@tucnak/mbox/"},{"id":186366,"url":"https://patchwork.plctlab.org/api/1.2/patches/186366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131529.743785-1-poulhies@adacore.com/","msgid":"<20240109131529.743785-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:29","name":"[COMMITTED] ada: Avoid xref on out params of TSS","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131529.743785-1-poulhies@adacore.com/mbox/"},{"id":186369,"url":"https://patchwork.plctlab.org/api/1.2/patches/186369/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131530.743848-1-poulhies@adacore.com/","msgid":"<20240109131530.743848-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:30","name":"[COMMITTED] ada: Remove unreachable code in Resolve_Extension_Aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131530.743848-1-poulhies@adacore.com/mbox/"},{"id":186364,"url":"https://patchwork.plctlab.org/api/1.2/patches/186364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131532.743911-1-poulhies@adacore.com/","msgid":"<20240109131532.743911-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:32","name":"[COMMITTED] ada: Fix precondition in Interfaces.C.Strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131532.743911-1-poulhies@adacore.com/mbox/"},{"id":186365,"url":"https://patchwork.plctlab.org/api/1.2/patches/186365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131533.744010-1-poulhies@adacore.com/","msgid":"<20240109131533.744010-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:33","name":"[COMMITTED] ada: Error compiling Ada 2022 object renaming with no subtype mark","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131533.744010-1-poulhies@adacore.com/mbox/"},{"id":186368,"url":"https://patchwork.plctlab.org/api/1.2/patches/186368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131535.744072-1-poulhies@adacore.com/","msgid":"<20240109131535.744072-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:35","name":"[COMMITTED] ada: Fix bug in Sem_Util.Enclosing_Declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131535.744072-1-poulhies@adacore.com/mbox/"},{"id":186367,"url":"https://patchwork.plctlab.org/api/1.2/patches/186367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131537.744133-1-poulhies@adacore.com/","msgid":"<20240109131537.744133-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:37","name":"[COMMITTED] ada: Fix uses of not Present","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131537.744133-1-poulhies@adacore.com/mbox/"},{"id":186375,"url":"https://patchwork.plctlab.org/api/1.2/patches/186375/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131538.744194-1-poulhies@adacore.com/","msgid":"<20240109131538.744194-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:38","name":"[COMMITTED] ada: Remove dead code for GNATprove inlining","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131538.744194-1-poulhies@adacore.com/mbox/"},{"id":186378,"url":"https://patchwork.plctlab.org/api/1.2/patches/186378/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131540.744255-1-poulhies@adacore.com/","msgid":"<20240109131540.744255-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:40","name":"[COMMITTED] ada: Remove dead detection of recursive inlined subprograms","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131540.744255-1-poulhies@adacore.com/mbox/"},{"id":186380,"url":"https://patchwork.plctlab.org/api/1.2/patches/186380/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131542.744317-1-poulhies@adacore.com/","msgid":"<20240109131542.744317-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:42","name":"[COMMITTED] ada: More aggressive inlining of subprogram calls in GNATprove mode","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131542.744317-1-poulhies@adacore.com/mbox/"},{"id":186374,"url":"https://patchwork.plctlab.org/api/1.2/patches/186374/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131544.744378-1-poulhies@adacore.com/","msgid":"<20240109131544.744378-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:44","name":"[COMMITTED] ada: Remove side effects depending on the context of subtype declaration","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131544.744378-1-poulhies@adacore.com/mbox/"},{"id":186370,"url":"https://patchwork.plctlab.org/api/1.2/patches/186370/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131545.744441-1-poulhies@adacore.com/","msgid":"<20240109131545.744441-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:45","name":"[COMMITTED] ada: Cannot requeue to a procedure implemented by an entry","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131545.744441-1-poulhies@adacore.com/mbox/"},{"id":186373,"url":"https://patchwork.plctlab.org/api/1.2/patches/186373/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131547.744502-1-poulhies@adacore.com/","msgid":"<20240109131547.744502-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:47","name":"[COMMITTED] ada: Add __atomic_store_n binding to System.Atomic_Primitives","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131547.744502-1-poulhies@adacore.com/mbox/"},{"id":186377,"url":"https://patchwork.plctlab.org/api/1.2/patches/186377/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131549.744564-1-poulhies@adacore.com/","msgid":"<20240109131549.744564-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:49","name":"[COMMITTED] ada: Fix internal error on class-wide allocator inside if-expression","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131549.744564-1-poulhies@adacore.com/mbox/"},{"id":186376,"url":"https://patchwork.plctlab.org/api/1.2/patches/186376/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131551.744625-1-poulhies@adacore.com/","msgid":"<20240109131551.744625-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:51","name":"[COMMITTED] ada: Fix limited_with in Check_Scil; allow for <> in pp of aggregate","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131551.744625-1-poulhies@adacore.com/mbox/"},{"id":186381,"url":"https://patchwork.plctlab.org/api/1.2/patches/186381/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131553.744686-1-poulhies@adacore.com/","msgid":"<20240109131553.744686-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:53","name":"[COMMITTED] ada: Remove unused runtime entity","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131553.744686-1-poulhies@adacore.com/mbox/"},{"id":186372,"url":"https://patchwork.plctlab.org/api/1.2/patches/186372/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131554.744749-1-poulhies@adacore.com/","msgid":"<20240109131554.744749-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:54","name":"[COMMITTED] ada: Excess elements created for indexed aggregates with iterator_specifications","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131554.744749-1-poulhies@adacore.com/mbox/"},{"id":186382,"url":"https://patchwork.plctlab.org/api/1.2/patches/186382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131556.744810-1-poulhies@adacore.com/","msgid":"<20240109131556.744810-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:56","name":"[COMMITTED] ada: Allow passing private types to generic formal incomplete types","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131556.744810-1-poulhies@adacore.com/mbox/"},{"id":186371,"url":"https://patchwork.plctlab.org/api/1.2/patches/186371/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131557.744875-1-poulhies@adacore.com/","msgid":"<20240109131557.744875-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:57","name":"[COMMITTED] ada: Minor change replacing \"not Present\" tests with \"No\" tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131557.744875-1-poulhies@adacore.com/mbox/"},{"id":186383,"url":"https://patchwork.plctlab.org/api/1.2/patches/186383/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131559.744937-1-poulhies@adacore.com/","msgid":"<20240109131559.744937-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:15:59","name":"[COMMITTED] ada: Do not count comparison of addresses as a modification","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131559.744937-1-poulhies@adacore.com/mbox/"},{"id":186379,"url":"https://patchwork.plctlab.org/api/1.2/patches/186379/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131601.744998-1-poulhies@adacore.com/","msgid":"<20240109131601.744998-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:16:00","name":"[COMMITTED] ada: Preliminary cleanup in aliasing support code","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131601.744998-1-poulhies@adacore.com/mbox/"},{"id":186384,"url":"https://patchwork.plctlab.org/api/1.2/patches/186384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131602.745077-1-poulhies@adacore.com/","msgid":"<20240109131602.745077-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:16:02","name":"[COMMITTED] ada: Fix bogus Constraint_Error on allocator for access to array of access type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109131602.745077-1-poulhies@adacore.com/mbox/"},{"id":186389,"url":"https://patchwork.plctlab.org/api/1.2/patches/186389/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109133640.752216-1-poulhies@adacore.com/","msgid":"<20240109133640.752216-1-poulhies@adacore.com>","list_archive_url":null,"date":"2024-01-09T13:36:21","name":"[COMMITTED] ada: Document new SPARK aspect and pragma Always_Terminates","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109133640.752216-1-poulhies@adacore.com/mbox/"},{"id":186463,"url":"https://patchwork.plctlab.org/api/1.2/patches/186463/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109164659.1822407-1-hjl.tools@gmail.com/","msgid":"<20240109164659.1822407-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2024-01-09T16:46:59","name":"hwasan: Check if Intel LAM_U57 is enabled","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109164659.1822407-1-hjl.tools@gmail.com/mbox/"},{"id":186469,"url":"https://patchwork.plctlab.org/api/1.2/patches/186469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ymbmewlenjtl77ddxvqzcdwpulgspxbimddcbnloo7hsfdpw6y@y5gsaomrxx6b/","msgid":"","list_archive_url":null,"date":"2024-01-09T16:49:34","name":"[2/7,v2] lto: Remove random_seed from section name.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ymbmewlenjtl77ddxvqzcdwpulgspxbimddcbnloo7hsfdpw6y@y5gsaomrxx6b/mbox/"},{"id":186471,"url":"https://patchwork.plctlab.org/api/1.2/patches/186471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb5f51fa-dbbc-463f-968d-a28a71ecc535@gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T17:10:45","name":"[committed] Fix minor bug on mn103 port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fb5f51fa-dbbc-463f-968d-a28a71ecc535@gmail.com/mbox/"},{"id":186473,"url":"https://patchwork.plctlab.org/api/1.2/patches/186473/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d45fd0b5-9706-48a8-88df-f355904954a3@gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-09T17:19:37","name":"[committed] Fix minor bug in epiphany port","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d45fd0b5-9706-48a8-88df-f355904954a3@gmail.com/mbox/"},{"id":186511,"url":"https://patchwork.plctlab.org/api/1.2/patches/186511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109172054.3968493-1-jwakely@redhat.com/","msgid":"<20240109172054.3968493-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T17:20:39","name":"[committed] libstdc++: Simplify some chrono formatters","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109172054.3968493-1-jwakely@redhat.com/mbox/"},{"id":186562,"url":"https://patchwork.plctlab.org/api/1.2/patches/186562/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3238326.AJdgDx1Vlc@fomalhaut/","msgid":"<3238326.AJdgDx1Vlc@fomalhaut>","list_archive_url":null,"date":"2024-01-09T20:17:29","name":"Fix debug info for enumeration types with reverse Scalar_Storage_Order","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3238326.AJdgDx1Vlc@fomalhaut/mbox/"},{"id":186572,"url":"https://patchwork.plctlab.org/api/1.2/patches/186572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87plyauqmd.fsf@igel.home/","msgid":"<87plyauqmd.fsf@igel.home>","list_archive_url":null,"date":"2024-01-09T21:46:34","name":"Fix spurious match in extract_symvers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87plyauqmd.fsf@igel.home/mbox/"},{"id":186595,"url":"https://patchwork.plctlab.org/api/1.2/patches/186595/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109215933.4054953-1-jwakely@redhat.com/","msgid":"<20240109215933.4054953-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T21:57:25","name":"libstdc++: Prefer posix_memalign for aligned-new [PR113258]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109215933.4054953-1-jwakely@redhat.com/mbox/"},{"id":186637,"url":"https://patchwork.plctlab.org/api/1.2/patches/186637/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109234450.4142610-1-jwakely@redhat.com/","msgid":"<20240109234450.4142610-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-09T23:44:34","name":"[committed] libstdc++: Fix Unicode property detection functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109234450.4142610-1-jwakely@redhat.com/mbox/"},{"id":186625,"url":"https://patchwork.plctlab.org/api/1.2/patches/186625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109235210.605208-1-iii@linux.ibm.com/","msgid":"<20240109235210.605208-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-09T23:47:39","name":"[v2] rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240109235210.605208-1-iii@linux.ibm.com/mbox/"},{"id":186641,"url":"https://patchwork.plctlab.org/api/1.2/patches/186641/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110010005.463710-1-juzhe.zhong@rivai.ai/","msgid":"<20240110010005.463710-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T01:00:05","name":"[Committed] RISC-V: Robostify dynamic lmul test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110010005.463710-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186662,"url":"https://patchwork.plctlab.org/api/1.2/patches/186662/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-2-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:56","name":"[V2,1/4,RFC] RISC-V: Add non-vector types to dfa pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-2-ewlu@rivosinc.com/mbox/"},{"id":186660,"url":"https://patchwork.plctlab.org/api/1.2/patches/186660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-3-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:57","name":"[V2,2/4,RFC] RISC-V: Add vector related reservations","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-3-ewlu@rivosinc.com/mbox/"},{"id":186663,"url":"https://patchwork.plctlab.org/api/1.2/patches/186663/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-4-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:58","name":"[V2,3/4,RFC] RISC-V: Use default cost model for insn scheduling for tests affected in PR113249","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-4-ewlu@rivosinc.com/mbox/"},{"id":186661,"url":"https://patchwork.plctlab.org/api/1.2/patches/186661/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-5-ewlu@rivosinc.com/","msgid":"<20240110013159.2645757-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-10T01:31:59","name":"[V2,4/4,RFC] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013159.2645757-5-ewlu@rivosinc.com/mbox/"},{"id":186664,"url":"https://patchwork.plctlab.org/api/1.2/patches/186664/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com/","msgid":"<1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com>","list_archive_url":null,"date":"2024-01-10T01:35:24","name":"[rs6000] Refactor expand_compare_loop and split it to two functions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1f65b341-3c17-44e4-93e3-1a4b1519faa0@linux.ibm.com/mbox/"},{"id":186665,"url":"https://patchwork.plctlab.org/api/1.2/patches/186665/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013802.912942-1-juzhe.zhong@rivai.ai/","msgid":"<20240110013802.912942-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T01:38:02","name":"RISC-V: Minor tweak dynamic cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110013802.912942-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186666,"url":"https://patchwork.plctlab.org/api/1.2/patches/186666/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020210.2062140-1-hongtao.liu@intel.com/","msgid":"<20240110020210.2062140-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-10T02:02:10","name":"Update documents for fcf-protection=","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020210.2062140-1-hongtao.liu@intel.com/mbox/"},{"id":186667,"url":"https://patchwork.plctlab.org/api/1.2/patches/186667/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020445.23201-1-vapier@gentoo.org/","msgid":"<20240110020445.23201-1-vapier@gentoo.org>","list_archive_url":null,"date":"2024-01-10T02:04:45","name":"config: delete unused CYG_AC_PATH_LIBERTY macro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110020445.23201-1-vapier@gentoo.org/mbox/"},{"id":186669,"url":"https://patchwork.plctlab.org/api/1.2/patches/186669/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110022249.1079-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110022249.1079-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T02:22:49","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110022249.1079-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186671,"url":"https://patchwork.plctlab.org/api/1.2/patches/186671/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110023452.2312519-1-haochen.jiang@intel.com/","msgid":"<20240110023452.2312519-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-10T02:34:52","name":"Add -mevex512 into invoke.texi","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110023452.2312519-1-haochen.jiang@intel.com/mbox/"},{"id":186674,"url":"https://patchwork.plctlab.org/api/1.2/patches/186674/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com/","msgid":"<634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T02:57:39","name":"Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/634afce7-51d0-4a7b-971f-41b10a2eb95d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186677,"url":"https://patchwork.plctlab.org/api/1.2/patches/186677/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110030650.1338056-1-juzhe.zhong@rivai.ai/","msgid":"<20240110030650.1338056-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T03:06:50","name":"[V2] RISC-V: Minor tweak dynamic cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110030650.1338056-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186683,"url":"https://patchwork.plctlab.org/api/1.2/patches/186683/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110050538.2465410-1-juzhe.zhong@rivai.ai/","msgid":"<20240110050538.2465410-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T05:05:38","name":"RISC-V: Refine unsigned avg_floor/avg_ceil","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110050538.2465410-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186694,"url":"https://patchwork.plctlab.org/api/1.2/patches/186694/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com/","msgid":"<446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com>","list_archive_url":null,"date":"2024-01-10T07:06:55","name":"[wwwdoc] gcc-14: Add arm cortex-m52 cpu support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/446482c1-fa7f-48a7-b70c-d04c94075b8c@gmail.com/mbox/"},{"id":186701,"url":"https://patchwork.plctlab.org/api/1.2/patches/186701/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com/","msgid":"<5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T07:16:43","name":"Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5df4be3c-8285-4ed6-b5cb-25c0ce1c5f17.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186704,"url":"https://patchwork.plctlab.org/api/1.2/patches/186704/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072459.8851-1-chenxiaolong@loongson.cn/","msgid":"<20240110072459.8851-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-10T07:24:59","name":"[v1] LoongArch: testsuite:Fixed a bug that added a target check error.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072459.8851-1-chenxiaolong@loongson.cn/mbox/"},{"id":186703,"url":"https://patchwork.plctlab.org/api/1.2/patches/186703/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072521.8916-1-chenxiaolong@loongson.cn/","msgid":"<20240110072521.8916-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-10T07:25:21","name":"[v2] LoongArch: testsuite:Added support for loongarch.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110072521.8916-1-chenxiaolong@loongson.cn/mbox/"},{"id":186705,"url":"https://patchwork.plctlab.org/api/1.2/patches/186705/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d06bcdaa-52c5-4e43-9679-cff63bf4938c.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T07:26:44","name":"?????????Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d06bcdaa-52c5-4e43-9679-cff63bf4938c.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186706,"url":"https://patchwork.plctlab.org/api/1.2/patches/186706/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cd3b62c3-1f15-4f8b-af72-eeb5b1f0376c.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T07:28:22","name":"Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cd3b62c3-1f15-4f8b-af72-eeb5b1f0376c.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186708,"url":"https://patchwork.plctlab.org/api/1.2/patches/186708/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110073455.1656619-1-haochen.jiang@intel.com/","msgid":"<20240110073455.1656619-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-10T07:34:55","name":"i386: Add AVX10.1 related macros","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110073455.1656619-1-haochen.jiang@intel.com/mbox/"},{"id":186710,"url":"https://patchwork.plctlab.org/api/1.2/patches/186710/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110074457.1749380-1-hongtao.liu@intel.com/","msgid":"<20240110074457.1749380-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2024-01-10T07:44:57","name":"Document refactoring of the option -fcf-protection=x.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110074457.1749380-1-hongtao.liu@intel.com/mbox/"},{"id":187019,"url":"https://patchwork.plctlab.org/api/1.2/patches/187019/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-2-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:52","name":"[01/14] c++: Implement __is_integral built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187018,"url":"https://patchwork.plctlab.org/api/1.2/patches/187018/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-3-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-3-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:53","name":"[02/14] libstdc++: Optimize std::is_integral compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-3-kmatsui@gcc.gnu.org/mbox/"},{"id":187020,"url":"https://patchwork.plctlab.org/api/1.2/patches/187020/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-4-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-4-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:54","name":"[03/14] c++: Implement __is_floating_point built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-4-kmatsui@gcc.gnu.org/mbox/"},{"id":187010,"url":"https://patchwork.plctlab.org/api/1.2/patches/187010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-5-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-5-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:55","name":"[04/14] libstdc++: Optimize std::is_floating_point compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-5-kmatsui@gcc.gnu.org/mbox/"},{"id":187022,"url":"https://patchwork.plctlab.org/api/1.2/patches/187022/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-6-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-6-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:56","name":"[05/14] c++: Implement __is_arithmetic built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-6-kmatsui@gcc.gnu.org/mbox/"},{"id":187011,"url":"https://patchwork.plctlab.org/api/1.2/patches/187011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-7-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-7-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:57","name":"[06/14] libstdc++: Optimize std::is_arithmetic compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-7-kmatsui@gcc.gnu.org/mbox/"},{"id":187017,"url":"https://patchwork.plctlab.org/api/1.2/patches/187017/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-8-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-8-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:58","name":"[07/14] libstdc++: Optimize std::is_fundamental compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-8-kmatsui@gcc.gnu.org/mbox/"},{"id":187016,"url":"https://patchwork.plctlab.org/api/1.2/patches/187016/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-9-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-9-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:22:59","name":"[08/14] libstdc++: Optimize std::is_compound compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-9-kmatsui@gcc.gnu.org/mbox/"},{"id":187013,"url":"https://patchwork.plctlab.org/api/1.2/patches/187013/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-10-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-10-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:00","name":"[09/14] c++: Implement __is_unsigned built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-10-kmatsui@gcc.gnu.org/mbox/"},{"id":187009,"url":"https://patchwork.plctlab.org/api/1.2/patches/187009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-11-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-11-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:01","name":"[10/14] libstdc++: Optimize std::is_unsigned compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-11-kmatsui@gcc.gnu.org/mbox/"},{"id":187015,"url":"https://patchwork.plctlab.org/api/1.2/patches/187015/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-12-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-12-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:02","name":"[11/14] c++: Implement __is_signed built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-12-kmatsui@gcc.gnu.org/mbox/"},{"id":187021,"url":"https://patchwork.plctlab.org/api/1.2/patches/187021/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-13-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-13-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:03","name":"[12/14] libstdc++: Optimize std::is_signed compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-13-kmatsui@gcc.gnu.org/mbox/"},{"id":187012,"url":"https://patchwork.plctlab.org/api/1.2/patches/187012/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-14-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-14-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:04","name":"[13/14] c++: Implement __is_scalar built-in trait","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-14-kmatsui@gcc.gnu.org/mbox/"},{"id":187014,"url":"https://patchwork.plctlab.org/api/1.2/patches/187014/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-15-kmatsui@gcc.gnu.org/","msgid":"<20240110194031.2384005-15-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-10T09:23:05","name":"[14/14] libstdc++: Optimize std::is_scalar compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110194031.2384005-15-kmatsui@gcc.gnu.org/mbox/"},{"id":186725,"url":"https://patchwork.plctlab.org/api/1.2/patches/186725/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110092737.1238-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110092737.1238-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:27:36","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110092737.1238-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186726,"url":"https://patchwork.plctlab.org/api/1.2/patches/186726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110093141.1291-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240110093141.1291-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:31:41","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110093141.1291-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":186728,"url":"https://patchwork.plctlab.org/api/1.2/patches/186728/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ5m3bq5IlVoU9fK@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T09:43:57","name":"sra: Partial fix for BITINT_TYPEs [PR113120]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ5m3bq5IlVoU9fK@tucnak/mbox/"},{"id":186744,"url":"https://patchwork.plctlab.org/api/1.2/patches/186744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com/","msgid":"<4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T09:55:16","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4c64eb28-a047-432b-80fa-f3cf817997c9.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186748,"url":"https://patchwork.plctlab.org/api/1.2/patches/186748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110095828.3863165-1-juzhe.zhong@rivai.ai/","msgid":"<20240110095828.3863165-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T09:58:28","name":"RISC-V: Switch RVV cost model to generic vector cost model","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110095828.3863165-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186794,"url":"https://patchwork.plctlab.org/api/1.2/patches/186794/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com/","msgid":"<09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T11:06:06","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/09711c53-1709-4ffd-93c1-9a7bd344c0e1.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186798,"url":"https://patchwork.plctlab.org/api/1.2/patches/186798/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3295706-8095-4dc3-8a8e-26c9a9bb50f1.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T11:08:53","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b3295706-8095-4dc3-8a8e-26c9a9bb50f1.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186805,"url":"https://patchwork.plctlab.org/api/1.2/patches/186805/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com/","msgid":"<514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-10T11:14:12","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/514dd6d7-1ac7-40e1-aedb-e2a7bc0aebd5.cooper.joshua@linux.alibaba.com/mbox/"},{"id":186804,"url":"https://patchwork.plctlab.org/api/1.2/patches/186804/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ58BGhG67Pw0tY6@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T11:14:12","name":"libgomp, v2: Use absolute pathname to testsuite/flock [PR113192]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ58BGhG67Pw0tY6@tucnak/mbox/"},{"id":186857,"url":"https://patchwork.plctlab.org/api/1.2/patches/186857/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ6MFMMbnTl6jlOk@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T12:22:44","name":"[v2] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ6MFMMbnTl6jlOk@arm.com/mbox/"},{"id":186862,"url":"https://patchwork.plctlab.org/api/1.2/patches/186862/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110130318.976927-1-julian@codesourcery.com/","msgid":"<20240110130318.976927-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-10T13:03:18","name":"OpenMP: Fix new lvalue-parsing map/to/from tests for 32-bit targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110130318.976927-1-julian@codesourcery.com/mbox/"},{"id":186864,"url":"https://patchwork.plctlab.org/api/1.2/patches/186864/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110131448.989596-1-julian@codesourcery.com/","msgid":"<20240110131448.989596-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-10T13:14:48","name":"OpenMP: Fix g++.dg/gomp/bad-array-section-10.C for C++23 and up","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110131448.989596-1-julian@codesourcery.com/mbox/"},{"id":186882,"url":"https://patchwork.plctlab.org/api/1.2/patches/186882/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-1-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:03","name":"[pushed,1/3] pretty-print: add selftest coverage for numbered args","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-1-dmalcolm@redhat.com/mbox/"},{"id":186884,"url":"https://patchwork.plctlab.org/api/1.2/patches/186884/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-2-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-2-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:04","name":"[pushed,2/3] pretty-print: support urlification in phase 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-2-dmalcolm@redhat.com/mbox/"},{"id":186883,"url":"https://patchwork.plctlab.org/api/1.2/patches/186883/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-3-dmalcolm@redhat.com/","msgid":"<20240110134105.749310-3-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-10T13:41:05","name":"[pushed,3/3] gcc-urlifier: handle option prefixes such as '\''-fno-'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110134105.749310-3-dmalcolm@redhat.com/mbox/"},{"id":186917,"url":"https://patchwork.plctlab.org/api/1.2/patches/186917/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110142702.6AEDA3857C62@sourceware.org/","msgid":"<20240110142702.6AEDA3857C62@sourceware.org>","list_archive_url":null,"date":"2024-01-10T14:21:13","name":"tree-optimization/113078 - conditional subtraction reduction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110142702.6AEDA3857C62@sourceware.org/mbox/"},{"id":186920,"url":"https://patchwork.plctlab.org/api/1.2/patches/186920/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110143244.7CF7C385DC1C@sourceware.org/","msgid":"<20240110143244.7CF7C385DC1C@sourceware.org>","list_archive_url":null,"date":"2024-01-10T14:25:57","name":"middle-end/112740 - vector boolean CTOR expansion issue","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110143244.7CF7C385DC1C@sourceware.org/mbox/"},{"id":186941,"url":"https://patchwork.plctlab.org/api/1.2/patches/186941/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110154521.146111-1-juzhe.zhong@rivai.ai/","msgid":"<20240110154521.146111-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-10T15:45:21","name":"[V2] RISC-V: Switch RVV cost model.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110154521.146111-1-juzhe.zhong@rivai.ai/mbox/"},{"id":186948,"url":"https://patchwork.plctlab.org/api/1.2/patches/186948/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ7D2DRQbU1cWJcp@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-10T16:20:40","name":"[committed] testsuite: Add testcase for already fixed PR [PR112734]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ7D2DRQbU1cWJcp@tucnak/mbox/"},{"id":186954,"url":"https://patchwork.plctlab.org/api/1.2/patches/186954/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401101525220.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-10T16:40:55","name":"[committed] RISC-V/testsuite: Fix comment termination in pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401101525220.5892@tpp.orcam.me.uk/mbox/"},{"id":187086,"url":"https://patchwork.plctlab.org/api/1.2/patches/187086/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ8H6HIA1GDmR2T/@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T21:11:04","name":"[v3] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ8H6HIA1GDmR2T/@arm.com/mbox/"},{"id":187090,"url":"https://patchwork.plctlab.org/api/1.2/patches/187090/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659F0AAE000252DE0C340001@message.bloomberg.net/","msgid":"<659F0AAE000252DE0C340001@message.bloomberg.net>","list_archive_url":null,"date":"2024-01-10T21:22:54","name":"libstdc++: std/ranges - Remove a duplicate define directive","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659F0AAE000252DE0C340001@message.bloomberg.net/mbox/"},{"id":187091,"url":"https://patchwork.plctlab.org/api/1.2/patches/187091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b294d87f-8994-4d8d-8498-943784df4415@jguk.org/","msgid":"","list_archive_url":null,"date":"2024-01-10T21:25:28","name":"[v2] gcc/doc: spelling mistakes and example","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b294d87f-8994-4d8d-8498-943784df4415@jguk.org/mbox/"},{"id":187092,"url":"https://patchwork.plctlab.org/api/1.2/patches/187092/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org/","msgid":"<74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org>","list_archive_url":null,"date":"2024-01-10T21:28:09","name":"[v2] : gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/74e2f370-c3ec-4bdb-a9a5-fe037797a7d1@jguk.org/mbox/"},{"id":187102,"url":"https://patchwork.plctlab.org/api/1.2/patches/187102/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110214007.2478417-1-ppalka@redhat.com/","msgid":"<20240110214007.2478417-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-10T21:40:07","name":"libstdc++/ranges: Use perfect forwarding in _Pipe and _Partial ctors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110214007.2478417-1-ppalka@redhat.com/mbox/"},{"id":187104,"url":"https://patchwork.plctlab.org/api/1.2/patches/187104/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110220813.2501087-1-ppalka@redhat.com/","msgid":"<20240110220813.2501087-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-10T22:08:13","name":"libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT for _Nth_type","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240110220813.2501087-1-ppalka@redhat.com/mbox/"},{"id":187099,"url":"https://patchwork.plctlab.org/api/1.2/patches/187099/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-80e5478a-8a63-4954-a58d-6a37b29fc223-1704925462311@3c-app-gmx-bap04/","msgid":"","list_archive_url":null,"date":"2024-01-10T22:24:22","name":"Fortran: annotations for DO CONCURRENT loops [PR113305]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-80e5478a-8a63-4954-a58d-6a37b29fc223-1704925462311@3c-app-gmx-bap04/mbox/"},{"id":187115,"url":"https://patchwork.plctlab.org/api/1.2/patches/187115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A8288448AC9BB7DA2517F7692@LV2PR01MB7839.prod.exchangelabs.com/","msgid":"","list_archive_url":null,"date":"2024-01-10T23:42:45","name":"PING: [PATCH] Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/LV2PR01MB7839A8288448AC9BB7DA2517F7692@LV2PR01MB7839.prod.exchangelabs.com/mbox/"},{"id":187123,"url":"https://patchwork.plctlab.org/api/1.2/patches/187123/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111002623.2514687-1-ppalka@redhat.com/","msgid":"<20240111002623.2514687-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-11T00:26:23","name":"libstdc++/ranges: Use C++23 deducing this for _Pipe and _Partial","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111002623.2514687-1-ppalka@redhat.com/mbox/"},{"id":187120,"url":"https://patchwork.plctlab.org/api/1.2/patches/187120/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111010710.354540-1-yangyujie@loongson.cn/","msgid":"<20240111010710.354540-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:07:10","name":"[v2] LoongArch: Implement option save/restore","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111010710.354540-1-yangyujie@loongson.cn/mbox/"},{"id":187124,"url":"https://patchwork.plctlab.org/api/1.2/patches/187124/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012045.354659-1-yangyujie@loongson.cn/","msgid":"<20240111012045.354659-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:20:45","name":"LoongArch: Split loongarch_option_override_internal into smaller procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012045.354659-1-yangyujie@loongson.cn/mbox/"},{"id":187130,"url":"https://patchwork.plctlab.org/api/1.2/patches/187130/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012810.354901-1-yangyujie@loongson.cn/","msgid":"<20240111012810.354901-1-yangyujie@loongson.cn>","list_archive_url":null,"date":"2024-01-11T01:28:10","name":"[v2] LoongArch: Split loongarch_option_override_internal into smaller procedures","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111012810.354901-1-yangyujie@loongson.cn/mbox/"},{"id":187119,"url":"https://patchwork.plctlab.org/api/1.2/patches/187119/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111013842.925454-1-pan2.li@intel.com/","msgid":"<20240111013842.925454-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-11T01:38:42","name":"[v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111013842.925454-1-pan2.li@intel.com/mbox/"},{"id":187148,"url":"https://patchwork.plctlab.org/api/1.2/patches/187148/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111024223.264227-1-juzhe.zhong@rivai.ai/","msgid":"<20240111024223.264227-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T02:42:23","name":"RISC-V: VLA preempts VLS on unknown NITERS loop","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111024223.264227-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187154,"url":"https://patchwork.plctlab.org/api/1.2/patches/187154/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111034415.431657-1-maskray@google.com/","msgid":"<20240111034415.431657-1-maskray@google.com>","list_archive_url":null,"date":"2024-01-11T03:44:15","name":"i386: Add \"z\" constraint for symbolic address/label reference [PR105576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111034415.431657-1-maskray@google.com/mbox/"},{"id":187163,"url":"https://patchwork.plctlab.org/api/1.2/patches/187163/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111041416.4172875-1-kmatsui@gcc.gnu.org/","msgid":"<20240111041416.4172875-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T04:14:16","name":"[committed] libstdc++: Optimize std::is_compound compilation performance","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111041416.4172875-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187166,"url":"https://patchwork.plctlab.org/api/1.2/patches/187166/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111042343.1172849-1-quic_apinski@quicinc.com/","msgid":"<20240111042343.1172849-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-11T04:23:43","name":"match: Delay folding of 1/x into `(x+1u)<2u?x:0` until late [PR113301]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111042343.1172849-1-quic_apinski@quicinc.com/mbox/"},{"id":187174,"url":"https://patchwork.plctlab.org/api/1.2/patches/187174/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/659f86dd.050a0220.c8110.0a09@mx.google.com/","msgid":"<659f86dd.050a0220.c8110.0a09@mx.google.com>","list_archive_url":null,"date":"2024-01-11T06:12:41","name":"c++/modules: Support thread_local statics in header modules [PR113292]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/659f86dd.050a0220.c8110.0a09@mx.google.com/mbox/"},{"id":187179,"url":"https://patchwork.plctlab.org/api/1.2/patches/187179/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111062222.525186-1-kmatsui@gcc.gnu.org/","msgid":"<20240111062222.525186-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T06:22:22","name":"libstdc++: Fix error handling for std::filesystem::equivalent [PR113250]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111062222.525186-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187220,"url":"https://patchwork.plctlab.org/api/1.2/patches/187220/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111075915.45BB13861821@sourceware.org/","msgid":"<20240111075915.45BB13861821@sourceware.org>","list_archive_url":null,"date":"2024-01-11T07:53:27","name":"tree-optimization/111003 - new testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111075915.45BB13861821@sourceware.org/mbox/"},{"id":187223,"url":"https://patchwork.plctlab.org/api/1.2/patches/187223/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ+kwBq3N0gXC/LO@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-11T08:20:16","name":"libgcc: Use may_alias attribute in bitint handlers","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ+kwBq3N0gXC/LO@tucnak/mbox/"},{"id":187234,"url":"https://patchwork.plctlab.org/api/1.2/patches/187234/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111082329.1198064-1-juzhe.zhong@rivai.ai/","msgid":"<20240111082329.1198064-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T08:23:29","name":"RISC-V: Increase scalar_to_vec_cost from 1 to 3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111082329.1198064-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187236,"url":"https://patchwork.plctlab.org/api/1.2/patches/187236/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/edc970c5-024a-4466-a0fe-9d237b9316c2@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T08:28:59","name":"[rs6000] Eliminate unnecessary byte swaps for block clear on P8 LE [PR113325]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/edc970c5-024a-4466-a0fe-9d237b9316c2@linux.ibm.com/mbox/"},{"id":187241,"url":"https://patchwork.plctlab.org/api/1.2/patches/187241/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111084640.1397-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111084640.1397-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T08:46:40","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111084640.1397-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187242,"url":"https://patchwork.plctlab.org/api/1.2/patches/187242/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111085043.1246942-1-pan2.li@intel.com/","msgid":"<20240111085043.1246942-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-11T08:50:43","name":"[v5] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111085043.1246942-1-pan2.li@intel.com/mbox/"},{"id":187260,"url":"https://patchwork.plctlab.org/api/1.2/patches/187260/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111090609.1043115-1-kito.cheng@sifive.com/","msgid":"<20240111090609.1043115-1-kito.cheng@sifive.com>","list_archive_url":null,"date":"2024-01-11T09:06:09","name":"RISC-V: Documnet the list of supported extensions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111090609.1043115-1-kito.cheng@sifive.com/mbox/"},{"id":187261,"url":"https://patchwork.plctlab.org/api/1.2/patches/187261/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/a25951ff-b66f-46ff-ad4f-46398f32cae6.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:11:09","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/a25951ff-b66f-46ff-ad4f-46398f32cae6.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187262,"url":"https://patchwork.plctlab.org/api/1.2/patches/187262/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5c1ab2b-5a15-4dd9-9bc1-c69d5b852f73.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:14:23","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d5c1ab2b-5a15-4dd9-9bc1-c69d5b852f73.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187263,"url":"https://patchwork.plctlab.org/api/1.2/patches/187263/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b04e4d2b-e8b3-4233-8a32-66144d8a5c3d.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:21:48","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b04e4d2b-e8b3-4233-8a32-66144d8a5c3d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187265,"url":"https://patchwork.plctlab.org/api/1.2/patches/187265/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff66ca2e-d5c5-474d-af6c-7dcf37efb07e.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:26:20","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ff66ca2e-d5c5-474d-af6c-7dcf37efb07e.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187266,"url":"https://patchwork.plctlab.org/api/1.2/patches/187266/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com/","msgid":"<0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:29:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0f98fd53-6e9f-4d9d-8824-313ad1f9aa0f.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187269,"url":"https://patchwork.plctlab.org/api/1.2/patches/187269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d99c1d06-b029-4997-bb0b-9b886901220b.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:35:39","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d99c1d06-b029-4997-bb0b-9b886901220b.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187270,"url":"https://patchwork.plctlab.org/api/1.2/patches/187270/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com/","msgid":"<5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:38:00","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5c7c5b2d-986b-460d-820e-0971f80c8aa3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187271,"url":"https://patchwork.plctlab.org/api/1.2/patches/187271/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-1-kmatsui@gcc.gnu.org/","msgid":"<20240111094038.876653-1-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:40:37","name":"[v2,1/2] libstdc++: Fix error handling in filesystem::equivalent [PR113250]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-1-kmatsui@gcc.gnu.org/mbox/"},{"id":187272,"url":"https://patchwork.plctlab.org/api/1.2/patches/187272/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-2-kmatsui@gcc.gnu.org/","msgid":"<20240111094038.876653-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:40:38","name":"[v2,2/2] libstdc++: Use using instead of typedef in opts-common.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111094038.876653-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187275,"url":"https://patchwork.plctlab.org/api/1.2/patches/187275/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095210.1450-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111095210.1450-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T09:52:10","name":"[v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095210.1450-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187276,"url":"https://patchwork.plctlab.org/api/1.2/patches/187276/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6c4cd7-993d-43f2-a3c2-541f13bbbf1f.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T09:54:09","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/fe6c4cd7-993d-43f2-a3c2-541f13bbbf1f.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187277,"url":"https://patchwork.plctlab.org/api/1.2/patches/187277/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095922.2148110-1-syq@gcc.gnu.org/","msgid":"<20240111095922.2148110-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T09:59:21","name":"[commit] MIPS: Add ATTRIBUTE_UNUSED to mips_start_function_definition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111095922.2148110-1-syq@gcc.gnu.org/mbox/"},{"id":187280,"url":"https://patchwork.plctlab.org/api/1.2/patches/187280/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111101202.952224-2-kmatsui@gcc.gnu.org/","msgid":"<20240111101202.952224-2-kmatsui@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-11T10:12:02","name":"[v3,2/2] libstdc++: Use using instead of typedef in opts-common.h","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111101202.952224-2-kmatsui@gcc.gnu.org/mbox/"},{"id":187284,"url":"https://patchwork.plctlab.org/api/1.2/patches/187284/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111103217.1306207-1-quic_apinski@quicinc.com/","msgid":"<20240111103217.1306207-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-11T10:32:17","name":"expr: Limit the store flag optimization for single bit to non-vectors [PR113322]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111103217.1306207-1-quic_apinski@quicinc.com/mbox/"},{"id":187298,"url":"https://patchwork.plctlab.org/api/1.2/patches/187298/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e75feb-9a34-4fce-845e-536ae3ed43c0.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T10:54:50","name":"Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d4e75feb-9a34-4fce-845e-536ae3ed43c0.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187305,"url":"https://patchwork.plctlab.org/api/1.2/patches/187305/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111110322.1503-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240111110322.1503-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T11:03:22","name":"[v5] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111110322.1503-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187314,"url":"https://patchwork.plctlab.org/api/1.2/patches/187314/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113619.2063055-1-liwei@loongson.cn/","msgid":"<20240111113619.2063055-1-liwei@loongson.cn>","list_archive_url":null,"date":"2024-01-11T11:36:19","name":"[v2,1/2] LoongArch: Redundant sign extension elimination optimization.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113619.2063055-1-liwei@loongson.cn/mbox/"},{"id":187315,"url":"https://patchwork.plctlab.org/api/1.2/patches/187315/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113633.2063159-1-liwei@loongson.cn/","msgid":"<20240111113633.2063159-1-liwei@loongson.cn>","list_archive_url":null,"date":"2024-01-11T11:36:33","name":"[v2,2/2] LoongArch: Redundant sign extension elimination optimization 2.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111113633.2063159-1-liwei@loongson.cn/mbox/"},{"id":187317,"url":"https://patchwork.plctlab.org/api/1.2/patches/187317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ_Tlecj-1lW6uN_@elastic.org/","msgid":"","list_archive_url":null,"date":"2024-01-11T11:40:05","name":"[wwwdocs] tweak for sourceware account request alias","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZZ_Tlecj-1lW6uN_@elastic.org/mbox/"},{"id":187347,"url":"https://patchwork.plctlab.org/api/1.2/patches/187347/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com/","msgid":"<801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T12:05:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/801d769f-9edf-4048-b5ba-957081df1dd3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187359,"url":"https://patchwork.plctlab.org/api/1.2/patches/187359/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c51e9768-8ff2-498b-aac7-5b2a4cd26142.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T12:18:22","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c51e9768-8ff2-498b-aac7-5b2a4cd26142.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187364,"url":"https://patchwork.plctlab.org/api/1.2/patches/187364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com/","msgid":"<2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-11T12:31:18","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2250dc81-cd45-43c8-9ec0-2c5e313d777d.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187365,"url":"https://patchwork.plctlab.org/api/1.2/patches/187365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf5f8efe-48aa-4488-92c3-fed6cf5d80a3.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T12:36:52","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/cf5f8efe-48aa-4488-92c3-fed6cf5d80a3.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187399,"url":"https://patchwork.plctlab.org/api/1.2/patches/187399/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111124909.208285-1-jwakely@redhat.com/","msgid":"<20240111124909.208285-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T12:48:32","name":"[wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111124909.208285-1-jwakely@redhat.com/mbox/"},{"id":187396,"url":"https://patchwork.plctlab.org/api/1.2/patches/187396/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111125046.208397-1-jwakely@redhat.com/","msgid":"<20240111125046.208397-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T12:49:20","name":"[wwwdocs] Document additional symbols in libstdc++exp.a for GCC 13.3","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111125046.208397-1-jwakely@redhat.com/mbox/"},{"id":187382,"url":"https://patchwork.plctlab.org/api/1.2/patches/187382/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de/","msgid":"<693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de>","list_archive_url":null,"date":"2024-01-11T13:39:20","name":"[avr,applied] Small improvements to texi documentation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/693bfccb-4ebb-488f-b584-3550091d776c@gjlay.de/mbox/"},{"id":187384,"url":"https://patchwork.plctlab.org/api/1.2/patches/187384/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111135012.8A68B3857BB0@sourceware.org/","msgid":"<20240111135012.8A68B3857BB0@sourceware.org>","list_archive_url":null,"date":"2024-01-11T13:44:18","name":"tree-optimization/112636 - estimate niters before header copying","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111135012.8A68B3857BB0@sourceware.org/mbox/"},{"id":187385,"url":"https://patchwork.plctlab.org/api/1.2/patches/187385/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111134948.3112510-1-juzhe.zhong@rivai.ai/","msgid":"<20240111134948.3112510-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-11T13:49:48","name":"[V2] RISC-V: Adjust scalar_to_vec cost accurately","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111134948.3112510-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187392,"url":"https://patchwork.plctlab.org/api/1.2/patches/187392/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111140407.E34013857BB0@sourceware.org/","msgid":"<20240111140407.E34013857BB0@sourceware.org>","list_archive_url":null,"date":"2024-01-11T13:58:23","name":"[s390] target/112280 - properly guard permute query","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111140407.E34013857BB0@sourceware.org/mbox/"},{"id":187394,"url":"https://patchwork.plctlab.org/api/1.2/patches/187394/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141328.AB719386186A@sourceware.org/","msgid":"<20240111141328.AB719386186A@sourceware.org>","list_archive_url":null,"date":"2024-01-11T14:07:34","name":"tree-optimization/112505 - bit-precision induction vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141328.AB719386186A@sourceware.org/mbox/"},{"id":187395,"url":"https://patchwork.plctlab.org/api/1.2/patches/187395/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141340.7F7D738618AB@sourceware.org/","msgid":"<20240111141340.7F7D738618AB@sourceware.org>","list_archive_url":null,"date":"2024-01-11T14:07:45","name":"tree-optimization/113126 - vector extension compare optimization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111141340.7F7D738618AB@sourceware.org/mbox/"},{"id":187393,"url":"https://patchwork.plctlab.org/api/1.2/patches/187393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c05200b5-0d3d-4a9c-b67b-f9a98bc24c2e.cooper.joshua@linux.alibaba.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T14:11:11","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c05200b5-0d3d-4a9c-b67b-f9a98bc24c2e.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187401,"url":"https://patchwork.plctlab.org/api/1.2/patches/187401/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-3-arthur.cohen@embecosm.com/","msgid":"<20240111142355.1110429-3-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:22:08","name":"[1/2] gccrs: fixup: Fix bootstrap build","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-3-arthur.cohen@embecosm.com/mbox/"},{"id":187400,"url":"https://patchwork.plctlab.org/api/1.2/patches/187400/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-4-arthur.cohen@embecosm.com/","msgid":"<20240111142355.1110429-4-arthur.cohen@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:22:09","name":"[2/2] gccrs: fixup: Fix missing build dependency","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111142355.1110429-4-arthur.cohen@embecosm.com/mbox/"},{"id":187402,"url":"https://patchwork.plctlab.org/api/1.2/patches/187402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com/","msgid":"<937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com>","list_archive_url":null,"date":"2024-01-11T14:35:10","name":"[pushed,PR112918,LRA] : Fixing IRA ICE on m68k","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/937f4ee1-3ed3-6d66-7e19-2bd69a30d6cf@redhat.com/mbox/"},{"id":187407,"url":"https://patchwork.plctlab.org/api/1.2/patches/187407/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111144118.274895-2-mary.bennett@embecosm.com/","msgid":"<20240111144118.274895-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-11T14:41:18","name":"[v2,1/1] RISC-V: Add support for XCVmem extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111144118.274895-2-mary.bennett@embecosm.com/mbox/"},{"id":187425,"url":"https://patchwork.plctlab.org/api/1.2/patches/187425/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de/","msgid":"<7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de>","list_archive_url":null,"date":"2024-01-11T15:35:53","name":"[avr,applied] invoke.texi: Move avr internal options to their own @subsubsection.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/7d7e8719-4f1a-4432-af77-ecf87052685c@gjlay.de/mbox/"},{"id":187429,"url":"https://patchwork.plctlab.org/api/1.2/patches/187429/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111155202.1518245-1-jason@redhat.com/","msgid":"<20240111155202.1518245-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T15:52:02","name":"testsuite: remove xfail","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111155202.1518245-1-jason@redhat.com/mbox/"},{"id":187461,"url":"https://patchwork.plctlab.org/api/1.2/patches/187461/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com/","msgid":"<1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com>","list_archive_url":null,"date":"2024-01-11T16:03:15","name":"libstdc++: use updated type for __unexpected_handler","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/1b3b0692001991a287db705ca5fc0d49245197db.camel@kernkonzept.com/mbox/"},{"id":187459,"url":"https://patchwork.plctlab.org/api/1.2/patches/187459/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaAlc7laA0EbGjRn@cowardly-lion.the-meissners.org/","msgid":"","list_archive_url":null,"date":"2024-01-11T17:29:23","name":"[V2] PR target/112886, Add %S to print_operand for vector pair support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaAlc7laA0EbGjRn@cowardly-lion.the-meissners.org/mbox/"},{"id":187471,"url":"https://patchwork.plctlab.org/api/1.2/patches/187471/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111175837.420604-1-jwakely@redhat.com/","msgid":"<20240111175837.420604-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T17:56:46","name":"[committed] libstdc++: Add GDB printer for std::integral_constant","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111175837.420604-1-jwakely@redhat.com/mbox/"},{"id":187474,"url":"https://patchwork.plctlab.org/api/1.2/patches/187474/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111180442.421194-1-jwakely@redhat.com/","msgid":"<20240111180442.421194-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T18:03:21","name":"libstdc++: Make PSTL algorithms accept C++20 iterators [PR110512]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111180442.421194-1-jwakely@redhat.com/mbox/"},{"id":187469,"url":"https://patchwork.plctlab.org/api/1.2/patches/187469/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111182425.547195-1-maskray@google.com/","msgid":"<20240111182425.547195-1-maskray@google.com>","list_archive_url":null,"date":"2024-01-11T18:24:25","name":"i386: Add \"Ws\" constraint for symbolic address/label reference [PR105576]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111182425.547195-1-maskray@google.com/mbox/"},{"id":187481,"url":"https://patchwork.plctlab.org/api/1.2/patches/187481/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201346.566341-1-julian@codesourcery.com/","msgid":"<20240111201346.566341-1-julian@codesourcery.com>","list_archive_url":null,"date":"2024-01-11T20:13:46","name":"OpenMP 5.1: WIP delimited (begin/end) '\''declare variant'\'' support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201346.566341-1-julian@codesourcery.com/mbox/"},{"id":187492,"url":"https://patchwork.plctlab.org/api/1.2/patches/187492/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201900.491691-1-jwakely@redhat.com/","msgid":"<20240111201900.491691-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T20:18:29","name":"[committed] libstdc++: Document addition of libstdc++exp.a","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111201900.491691-1-jwakely@redhat.com/mbox/"},{"id":187496,"url":"https://patchwork.plctlab.org/api/1.2/patches/187496/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111202352.513513-1-jwakely@redhat.com/","msgid":"<20240111202352.513513-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T20:23:07","name":"libstdc++: Fix std::runtime_format deviations from the spec [PR113320]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111202352.513513-1-jwakely@redhat.com/mbox/"},{"id":187487,"url":"https://patchwork.plctlab.org/api/1.2/patches/187487/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSmw7cVkTP6w9gwQDH2u48XQCciJLGr2G3qABzMpq2PmMQ@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T20:34:33","name":"[v2] c++: side effect in nullptr_t conversion fix","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CAPfxnSmw7cVkTP6w9gwQDH2u48XQCciJLGr2G3qABzMpq2PmMQ@mail.gmail.com/mbox/"},{"id":187503,"url":"https://patchwork.plctlab.org/api/1.2/patches/187503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111212819.533282-1-jwakely@redhat.com/","msgid":"<20240111212819.533282-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T21:26:52","name":"[committed] libstdc++: Fix spelling mistake in new doc addition","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111212819.533282-1-jwakely@redhat.com/mbox/"},{"id":187497,"url":"https://patchwork.plctlab.org/api/1.2/patches/187497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111213310.1566285-1-jason@redhat.com/","msgid":"<20240111213310.1566285-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T21:33:10","name":"[RFC] codingconventions: add lambda guidelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111213310.1566285-1-jason@redhat.com/mbox/"},{"id":187502,"url":"https://patchwork.plctlab.org/api/1.2/patches/187502/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111220148.1575375-1-jason@redhat.com/","msgid":"<20240111220148.1575375-1-jason@redhat.com>","list_archive_url":null,"date":"2024-01-11T22:01:48","name":"[pushed] c++: corresponding object parms [PR113191]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111220148.1575375-1-jason@redhat.com/mbox/"},{"id":187508,"url":"https://patchwork.plctlab.org/api/1.2/patches/187508/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111221651.585639-1-jwakely@redhat.com/","msgid":"<20240111221651.585639-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T22:16:35","name":"libstdc++: Implement P2255R2 dangling checks for std::tuple [PR108822]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111221651.585639-1-jwakely@redhat.com/mbox/"},{"id":187505,"url":"https://patchwork.plctlab.org/api/1.2/patches/187505/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111230548.623208-1-jwakely@redhat.com/","msgid":"<20240111230548.623208-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-11T23:04:29","name":"libstdc++: Fix non-portable results from 64-bit std::subtract_with_carry_engine [PR107466]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240111230548.623208-1-jwakely@redhat.com/mbox/"},{"id":187510,"url":"https://patchwork.plctlab.org/api/1.2/patches/187510/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112306560.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:35:37","name":"[1/2] RISC-V/testsuite: Widen coverage for pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112306560.5892@tpp.orcam.me.uk/mbox/"},{"id":187511,"url":"https://patchwork.plctlab.org/api/1.2/patches/187511/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112325170.5892@tpp.orcam.me.uk/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:35:49","name":"[2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/alpine.DEB.2.20.2401112325170.5892@tpp.orcam.me.uk/mbox/"},{"id":187515,"url":"https://patchwork.plctlab.org/api/1.2/patches/187515/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce5b809b30de16c037120c35859e5180903aa949.camel@zoho.com/","msgid":"","list_archive_url":null,"date":"2024-01-11T23:42:43","name":"libgccjit: Fix float playback for cross-compilation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ce5b809b30de16c037120c35859e5180903aa949.camel@zoho.com/mbox/"},{"id":187528,"url":"https://patchwork.plctlab.org/api/1.2/patches/187528/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com/","msgid":"<98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T00:49:58","name":"?????????Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98151345-52d3-4349-9cdb-f3562cd9ec76.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187533,"url":"https://patchwork.plctlab.org/api/1.2/patches/187533/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112013511.24964-1-wangfeng@eswincomputing.com/","msgid":"<20240112013511.24964-1-wangfeng@eswincomputing.com>","list_archive_url":null,"date":"2024-01-12T01:35:11","name":"RISC-V: Modify ABI-name length of vfloat16m8_t","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112013511.24964-1-wangfeng@eswincomputing.com/mbox/"},{"id":187542,"url":"https://patchwork.plctlab.org/api/1.2/patches/187542/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015205.4402-1-chenxiaolong@loongson.cn/","msgid":"<20240112015205.4402-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-12T01:52:05","name":"[v1] LoongArch: testsuite:Added additional vectorization \"-mlsx\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015205.4402-1-chenxiaolong@loongson.cn/mbox/"},{"id":187543,"url":"https://patchwork.plctlab.org/api/1.2/patches/187543/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015224.4476-1-chenxiaolong@loongson.cn/","msgid":"<20240112015224.4476-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-12T01:52:24","name":"[v1] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112015224.4476-1-chenxiaolong@loongson.cn/mbox/"},{"id":187548,"url":"https://patchwork.plctlab.org/api/1.2/patches/187548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112022543.1380261-1-haochen.jiang@intel.com/","msgid":"<20240112022543.1380261-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2024-01-12T02:25:43","name":"i386: Remove redundant move in vnni pattern","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112022543.1380261-1-haochen.jiang@intel.com/mbox/"},{"id":187554,"url":"https://patchwork.plctlab.org/api/1.2/patches/187554/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112025215.1776738-1-pan2.li@intel.com/","msgid":"<20240112025215.1776738-1-pan2.li@intel.com>","list_archive_url":null,"date":"2024-01-12T02:52:15","name":"[v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112025215.1776738-1-pan2.li@intel.com/mbox/"},{"id":187557,"url":"https://patchwork.plctlab.org/api/1.2/patches/187557/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032029.1609-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240112032029.1609-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:20:29","name":"[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032029.1609-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187558,"url":"https://patchwork.plctlab.org/api/1.2/patches/187558/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032210.1715-1-cooper.joshua@linux.alibaba.com/","msgid":"<20240112032210.1715-1-cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:22:10","name":"[v6] RISC-V: Handle differences between XTheadvector and Vector","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112032210.1715-1-cooper.joshua@linux.alibaba.com/mbox/"},{"id":187559,"url":"https://patchwork.plctlab.org/api/1.2/patches/187559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com/","msgid":"<9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com>","list_archive_url":null,"date":"2024-01-12T03:26:35","name":"Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/9e66a4f4-aede-4635-86a7-704e38d12969.cooper.joshua@linux.alibaba.com/mbox/"},{"id":187567,"url":"https://patchwork.plctlab.org/api/1.2/patches/187567/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112045633.2643599-1-sandra@codesourcery.com/","msgid":"<20240112045633.2643599-1-sandra@codesourcery.com>","list_archive_url":null,"date":"2024-01-12T04:56:32","name":"[Committed] libgcc, nios2: Fix exception handling on nios2 with -fpic","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112045633.2643599-1-sandra@codesourcery.com/mbox/"},{"id":187584,"url":"https://patchwork.plctlab.org/api/1.2/patches/187584/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com/","msgid":"<166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com>","list_archive_url":null,"date":"2024-01-12T06:48:44","name":"[rs6000] Enable block compare expand on P9 with m32 and mpowerpc64","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/166fd582-e55f-4d5f-8be0-67f5ec67fc49@linux.ibm.com/mbox/"},{"id":187600,"url":"https://patchwork.plctlab.org/api/1.2/patches/187600/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112074035.3683903-1-juzhe.zhong@rivai.ai/","msgid":"<20240112074035.3683903-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-12T07:40:35","name":"[Committed] RISC-V: Enhance a testcase","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112074035.3683903-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187602,"url":"https://patchwork.plctlab.org/api/1.2/patches/187602/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112085025.641DA136A4@imap1.dmz-prg2.suse.org/","msgid":"<20240112085025.641DA136A4@imap1.dmz-prg2.suse.org>","list_archive_url":null,"date":"2024-01-12T08:50:16","name":"middle-end/113344 - is_truth_type_for vs GENERIC tcc_comparison","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112085025.641DA136A4@imap1.dmz-prg2.suse.org/mbox/"},{"id":187625,"url":"https://patchwork.plctlab.org/api/1.2/patches/187625/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112092844.260890-1-juzhe.zhong@rivai.ai/","msgid":"<20240112092844.260890-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-12T09:28:44","name":"[V3] RISC-V: Adjust scalar_to_vec cost","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112092844.260890-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187627,"url":"https://patchwork.plctlab.org/api/1.2/patches/187627/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEGUldmPTM5d31b@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:28:51","name":"c: Avoid _BitInt indexes > sizetype in ARRAY_REFs [PR113315]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEGUldmPTM5d31b@tucnak/mbox/"},{"id":187628,"url":"https://patchwork.plctlab.org/api/1.2/patches/187628/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEHikflGhduPrnv@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:34:04","name":"lower-bitint: Fix up handling of uninitialized large/huge _BitInt call arguments [PR113316]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEHikflGhduPrnv@tucnak/mbox/"},{"id":187630,"url":"https://patchwork.plctlab.org/api/1.2/patches/187630/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEIaLhkFP2KOwCC@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:37:46","name":"lower-bitint: Fix a typo in a condition [PR113323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEIaLhkFP2KOwCC@tucnak/mbox/"},{"id":187631,"url":"https://patchwork.plctlab.org/api/1.2/patches/187631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:43:27","name":"sra: Punt for too large _BitInt accesses [PR113330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"},{"id":187700,"url":"https://patchwork.plctlab.org/api/1.2/patches/187700/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094507.683543-1-jwakely@redhat.com/","msgid":"<20240112094507.683543-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T09:44:52","name":"[committed] libstdc++: Fix incorrect PR number in comment","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094507.683543-1-jwakely@redhat.com/mbox/"},{"id":187707,"url":"https://patchwork.plctlab.org/api/1.2/patches/187707/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094855.684825-1-jwakely@redhat.com/","msgid":"<20240112094855.684825-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T09:48:20","name":"[committed] libstdc++: Implement C++23 P1951R1 (Default Args for pair'\''s Forwarding Ctor) [PR105505]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112094855.684825-1-jwakely@redhat.com/mbox/"},{"id":187649,"url":"https://patchwork.plctlab.org/api/1.2/patches/187649/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaELkogkBMt9fsWx@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:51:14","name":"[committed] testsuite: Fix up preprocessor conditions in bitint-31.c test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaELkogkBMt9fsWx@tucnak/mbox/"},{"id":187657,"url":"https://patchwork.plctlab.org/api/1.2/patches/187657/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEMw1B73Ngv3ie1@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:56:19","name":"lower-bitint: Fix up handling of unsigned INTEGER_CSTs operands with lots of 1s in the upper bits [PR113334]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEMw1B73Ngv3ie1@tucnak/mbox/"},{"id":187660,"url":"https://patchwork.plctlab.org/api/1.2/patches/187660/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEOgF4jwjfK6QwE@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T10:03:44","name":"varasm: Fix up process_pending_assemble_externals [PR113182]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEOgF4jwjfK6QwE@tucnak/mbox/"},{"id":187718,"url":"https://patchwork.plctlab.org/api/1.2/patches/187718/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzoespp0.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:26:19","name":"[PATCHv3] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptjzoespp0.fsf@arm.com/mbox/"},{"id":187719,"url":"https://patchwork.plctlab.org/api/1.2/patches/187719/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9qspgy.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:31:09","name":"[1/2] aarch64: Use a separate group for SME builtins [PR112989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptbk9qspgy.fsf@arm.com/mbox/"},{"id":187720,"url":"https://patchwork.plctlab.org/api/1.2/patches/187720/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jfispfv.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:31:48","name":"[2/2] aarch64: Use a global map to detect duplicated overloads [PR112989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mpt4jfispfv.fsf@arm.com/mbox/"},{"id":187721,"url":"https://patchwork.plctlab.org/api/1.2/patches/187721/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmseraih.fsf@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:39:34","name":"[pushed] aarch64: Rework uxtl->zip optimisation [PR113196]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/mptwmseraih.fsf@arm.com/mbox/"},{"id":187724,"url":"https://patchwork.plctlab.org/api/1.2/patches/187724/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaE0eq4+3Fn78jqj@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T12:45:46","name":"c++, demangle: Implement https://github.com/itanium-cxx-abi/cxx-abi/issues/148 non-proposal","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaE0eq4+3Fn78jqj@tucnak/mbox/"},{"id":187726,"url":"https://patchwork.plctlab.org/api/1.2/patches/187726/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de/","msgid":"<238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de>","list_archive_url":null,"date":"2024-01-12T12:51:41","name":"[avr,applied] Fix PR107201 -nodevicelib not working for all devices.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/238c0c70-5c89-483f-9387-1c6f1b4db6b2@gjlay.de/mbox/"},{"id":187742,"url":"https://patchwork.plctlab.org/api/1.2/patches/187742/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bk9q8xac.fsf@euler.schwinge.homeip.net/","msgid":"<87bk9q8xac.fsf@euler.schwinge.homeip.net>","list_archive_url":null,"date":"2024-01-12T14:02:35","name":"GCN: Enable effective-target '\''vect_early_break'\'', '\''vect_early_break_hw'\''","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/87bk9q8xac.fsf@euler.schwinge.homeip.net/mbox/"},{"id":187744,"url":"https://patchwork.plctlab.org/api/1.2/patches/187744/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112140658.62598-1-iain@sandoe.co.uk/","msgid":"<20240112140658.62598-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-12T14:06:58","name":"[pushed] Darwin, powerpc: Fix bootstrap.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112140658.62598-1-iain@sandoe.co.uk/mbox/"},{"id":187748,"url":"https://patchwork.plctlab.org/api/1.2/patches/187748/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141230.62685-1-iain@sandoe.co.uk/","msgid":"<20240112141230.62685-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-12T14:12:30","name":"[pushed] Objective-C, Darwin: Fix a regression in handling bad receivers.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141230.62685-1-iain@sandoe.co.uk/mbox/"},{"id":187749,"url":"https://patchwork.plctlab.org/api/1.2/patches/187749/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141616.353D913782@imap1.dmz-prg2.suse.org/","msgid":"<20240112141616.353D913782@imap1.dmz-prg2.suse.org>","list_archive_url":null,"date":"2024-01-12T14:16:11","name":"tree-optimization/109893 - allow more backwards jump threading","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112141616.353D913782@imap1.dmz-prg2.suse.org/mbox/"},{"id":187802,"url":"https://patchwork.plctlab.org/api/1.2/patches/187802/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0409d57-9d8f-4f45-85f1-e8204f464245@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-12T17:52:36","name":"[avr,applied] Fix documentation for attribute \"address\".","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/c0409d57-9d8f-4f45-85f1-e8204f464245@gjlay.de/mbox/"},{"id":187803,"url":"https://patchwork.plctlab.org/api/1.2/patches/187803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de/","msgid":"<0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de>","list_archive_url":null,"date":"2024-01-12T18:07:01","name":"[avr,applied] Add link to sample ld-script in avr-gcc wiki.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/0622968f-2662-4b03-ae59-a068db1f1b88@gjlay.de/mbox/"},{"id":187809,"url":"https://patchwork.plctlab.org/api/1.2/patches/187809/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-2-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-2-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:40","name":"[V3,1/4] RISC-V: Add non-vector types to dfa pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-2-ewlu@rivosinc.com/mbox/"},{"id":187810,"url":"https://patchwork.plctlab.org/api/1.2/patches/187810/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-3-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-3-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:41","name":"[V3,2/4] RISC-V: Add vector related pipelines","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-3-ewlu@rivosinc.com/mbox/"},{"id":187812,"url":"https://patchwork.plctlab.org/api/1.2/patches/187812/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-4-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-4-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:42","name":"[V3,3/4] RISC-V: Use default cost model for insn scheduling","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-4-ewlu@rivosinc.com/mbox/"},{"id":187811,"url":"https://patchwork.plctlab.org/api/1.2/patches/187811/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-5-ewlu@rivosinc.com/","msgid":"<20240112180844.2005246-5-ewlu@rivosinc.com>","list_archive_url":null,"date":"2024-01-12T18:08:43","name":"[V3,4/4] RISC-V: Enable assert for insn_has_dfa_reservation","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112180844.2005246-5-ewlu@rivosinc.com/mbox/"},{"id":187819,"url":"https://patchwork.plctlab.org/api/1.2/patches/187819/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de/","msgid":"<5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de>","list_archive_url":null,"date":"2024-01-12T19:23:20","name":"[v2] Fortran: annotations for DO CONCURRENT loops [PR113305]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/5ccdd809-5483-42df-8cc2-965584285ecf@gmx.de/mbox/"},{"id":187827,"url":"https://patchwork.plctlab.org/api/1.2/patches/187827/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-1-ppalka@redhat.com/","msgid":"<20240112200909.2649164-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-12T20:09:08","name":"[1/2] libstdc++: Use C++23 deducing this in std::bind_front","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-1-ppalka@redhat.com/mbox/"},{"id":187828,"url":"https://patchwork.plctlab.org/api/1.2/patches/187828/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-2-ppalka@redhat.com/","msgid":"<20240112200909.2649164-2-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-12T20:09:09","name":"[2/2] libstdc++: Implement C++23 std::bind_pack from P2387R3 [PR108827]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112200909.2649164-2-ppalka@redhat.com/mbox/"},{"id":187845,"url":"https://patchwork.plctlab.org/api/1.2/patches/187845/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112224145.1090544-1-jwakely@redhat.com/","msgid":"<20240112224145.1090544-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T22:29:03","name":"[WIP] libstdc++: Implement C++26 std::text_encoding [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112224145.1090544-1-jwakely@redhat.com/mbox/"},{"id":187846,"url":"https://patchwork.plctlab.org/api/1.2/patches/187846/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112225924.1097416-1-jwakely@redhat.com/","msgid":"<20240112225924.1097416-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-12T22:58:29","name":"libstdc++: Update tzdata to 2023d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240112225924.1097416-1-jwakely@redhat.com/mbox/"},{"id":187856,"url":"https://patchwork.plctlab.org/api/1.2/patches/187856/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113005515.1029712-1-thiago.bauermann@linaro.org/","msgid":"<20240113005515.1029712-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2024-01-13T00:55:15","name":"testsuite: Fix fallout of turning warnings into errors on 32-bit Arm","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113005515.1029712-1-thiago.bauermann@linaro.org/mbox/"},{"id":187859,"url":"https://patchwork.plctlab.org/api/1.2/patches/187859/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113015133.741517-1-juzhe.zhong@rivai.ai/","msgid":"<20240113015133.741517-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-13T01:51:33","name":"RISC-V: Adjust loop len by costing 1 when NITER < VF [GCC 14 regression]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113015133.741517-1-juzhe.zhong@rivai.ai/mbox/"},{"id":187869,"url":"https://patchwork.plctlab.org/api/1.2/patches/187869/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113043706.2216775-1-quic_apinski@quicinc.com/","msgid":"<20240113043706.2216775-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-13T04:37:06","name":"[COMMITTED] Add a few testcases for fix missed optimization regressions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113043706.2216775-1-quic_apinski@quicinc.com/mbox/"},{"id":187872,"url":"https://patchwork.plctlab.org/api/1.2/patches/187872/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113063709.19072-1-chenglulu@loongson.cn/","msgid":"<20240113063709.19072-1-chenglulu@loongson.cn>","list_archive_url":null,"date":"2024-01-13T06:37:09","name":"LoongArch: Assign the '\''/u'\'' attribute to the mem to which the global offset table belongs.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113063709.19072-1-chenglulu@loongson.cn/mbox/"},{"id":187874,"url":"https://patchwork.plctlab.org/api/1.2/patches/187874/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072817.31932-1-chenxiaolong@loongson.cn/","msgid":"<20240113072817.31932-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-13T07:28:17","name":"[v2] LoongArch: testsuite:Added additional vectorization \"-mlsx\" option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072817.31932-1-chenxiaolong@loongson.cn/mbox/"},{"id":187875,"url":"https://patchwork.plctlab.org/api/1.2/patches/187875/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072834.32021-1-chenxiaolong@loongson.cn/","msgid":"<20240113072834.32021-1-chenxiaolong@loongson.cn>","list_archive_url":null,"date":"2024-01-13T07:28:34","name":"[v2] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113072834.32021-1-chenxiaolong@loongson.cn/mbox/"},{"id":187881,"url":"https://patchwork.plctlab.org/api/1.2/patches/187881/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaJbBs0d2PeCzubq@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-13T09:42:30","name":"lower-bitint: Fix up handle_operand_addr INTEGER_CST handling [PR113361]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaJbBs0d2PeCzubq@tucnak/mbox/"},{"id":187898,"url":"https://patchwork.plctlab.org/api/1.2/patches/187898/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4mkmPfFHVrzEHg6SA_o8YMs3QHv2dpX_f3E+rrdv4iYuA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T11:18:37","name":"[v2] libstdc++: Update tzdata to 2023d","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CACb0b4mkmPfFHVrzEHg6SA_o8YMs3QHv2dpX_f3E+rrdv4iYuA@mail.gmail.com/mbox/"},{"id":187902,"url":"https://patchwork.plctlab.org/api/1.2/patches/187902/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113124834.1296437-1-jwakely@redhat.com/","msgid":"<20240113124834.1296437-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-13T12:44:01","name":"[v2] libstdc++: Implement C++26 std::text_encoding [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113124834.1296437-1-jwakely@redhat.com/mbox/"},{"id":187903,"url":"https://patchwork.plctlab.org/api/1.2/patches/187903/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-2-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-2-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:15","name":"[1/4] testsuite, jit: test-alias-attribute.c requires alias support.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-2-iain@sandoe.co.uk/mbox/"},{"id":187904,"url":"https://patchwork.plctlab.org/api/1.2/patches/187904/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-3-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-3-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:16","name":"[2/4] testsuite, jit: Handle whitespace in test-link-section-assembler.c.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-3-iain@sandoe.co.uk/mbox/"},{"id":187906,"url":"https://patchwork.plctlab.org/api/1.2/patches/187906/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-4-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-4-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:17","name":"[3/4] testsuite, jit: Allow for target-specific assembler scans.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-4-iain@sandoe.co.uk/mbox/"},{"id":187905,"url":"https://patchwork.plctlab.org/api/1.2/patches/187905/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-5-iain@sandoe.co.uk/","msgid":"<20240113135718.57643-5-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-13T13:57:18","name":"[4/4] testsuite,jit: Handle Darwin/Mach-O in assembler tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113135718.57643-5-iain@sandoe.co.uk/mbox/"},{"id":187921,"url":"https://patchwork.plctlab.org/api/1.2/patches/187921/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKv0rFkGjlDO14D@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T15:44:18","name":"[2/4] rtl-ssa: Support for creating new uses [PR113070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKv0rFkGjlDO14D@arm.com/mbox/"},{"id":187922,"url":"https://patchwork.plctlab.org/api/1.2/patches/187922/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKwCA4MBjcT5ViR@arm.com/","msgid":"","list_archive_url":null,"date":"2024-01-13T15:45:12","name":"[3/4] rtl-ssa: Ensure new defs get inserted [PR113070]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaKwCA4MBjcT5ViR@arm.com/mbox/"},{"id":187926,"url":"https://patchwork.plctlab.org/api/1.2/patches/187926/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaLSbt_K2DroYebC@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-13T18:11:58","name":"[committed] hppa64: Fix fmt_f_default_field_width_3.f90 and fmt_g_default_field_width_3.f90","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaLSbt_K2DroYebC@mx3210.localdomain/mbox/"},{"id":187933,"url":"https://patchwork.plctlab.org/api/1.2/patches/187933/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113204655.1052804-1-thiago.bauermann@linaro.org/","msgid":"<20240113204655.1052804-1-thiago.bauermann@linaro.org>","list_archive_url":null,"date":"2024-01-13T20:46:55","name":"testsuite: Turn errors back into warnings in arm/acle/cde-mve-error-2.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113204655.1052804-1-thiago.bauermann@linaro.org/mbox/"},{"id":187934,"url":"https://patchwork.plctlab.org/api/1.2/patches/187934/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a5fb737b-a44a-44b3-a0a0-599d2c1f89bf-1705180362791@3c-app-gmx-bs12/","msgid":"","list_archive_url":null,"date":"2024-01-13T21:12:42","name":"Fortran: intrinsic ISHFTC and missing optional argument SIZE [PR67277]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/trinity-a5fb737b-a44a-44b3-a0a0-599d2c1f89bf-1705180362791@3c-app-gmx-bs12/mbox/"},{"id":187936,"url":"https://patchwork.plctlab.org/api/1.2/patches/187936/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113221251.2180315-1-lhyatt@gmail.com/","msgid":"<20240113221251.2180315-1-lhyatt@gmail.com>","list_archive_url":null,"date":"2024-01-13T22:12:51","name":"libcpp: Support extended characters for #pragma {push, pop}_macro [PR109704]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240113221251.2180315-1-lhyatt@gmail.com/mbox/"},{"id":187939,"url":"https://patchwork.plctlab.org/api/1.2/patches/187939/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240114000534.1775261-1-me@jdemille.com/","msgid":"<20240114000534.1775261-1-me@jdemille.com>","list_archive_url":null,"date":"2024-01-14T00:05:27","name":"libsupc++: Fix UB terminating on foreign exception","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240114000534.1775261-1-me@jdemille.com/mbox/"},{"id":187961,"url":"https://patchwork.plctlab.org/api/1.2/patches/187961/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de/","msgid":"<3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de>","list_archive_url":null,"date":"2024-01-14T13:05:11","name":"[avr,ping,#3] PR target/112944: Support .rodata in RAM for AVR64* and AVR128* devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3f4dc44a-95ba-42c7-bba2-eb6bfde6482d@gjlay.de/mbox/"},{"id":187963,"url":"https://patchwork.plctlab.org/api/1.2/patches/187963/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/98216ca7-6a10-4342-b510-1f362127f619@net-b.de/","msgid":"<98216ca7-6a10-4342-b510-1f362127f619@net-b.de>","list_archive_url":null,"date":"2024-01-14T14:26:59","name":"libgomp.texi: Document omp_pause_resource{,_all}","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/98216ca7-6a10-4342-b510-1f362127f619@net-b.de/mbox/"},{"id":187973,"url":"https://patchwork.plctlab.org/api/1.2/patches/187973/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4131a17-61dd-4720-8667-b20ec240d1f0@linux.ibm.com/","msgid":"","list_archive_url":null,"date":"2024-01-14T15:25:39","name":"[V1] rs6000: New pass for replacement of adjacent (load) lxv with lxvp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/f4131a17-61dd-4720-8667-b20ec240d1f0@linux.ibm.com/mbox/"},{"id":187976,"url":"https://patchwork.plctlab.org/api/1.2/patches/187976/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQn8iXTqDDMPQUN@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T18:29:06","name":"[committed] Skip several analyzer socket tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQn8iXTqDDMPQUN@mx3210.localdomain/mbox/"},{"id":187978,"url":"https://patchwork.plctlab.org/api/1.2/patches/187978/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de/","msgid":"<61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de>","list_archive_url":null,"date":"2024-01-14T18:41:30","name":"[wwwdocs,avr,applied] Add AVR news for v14.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/61b591db-1eb7-411a-8e08-3935a8419d41@gjlay.de/mbox/"},{"id":187979,"url":"https://patchwork.plctlab.org/api/1.2/patches/187979/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQsIUJHRKtUzBiP@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T18:46:57","name":"[committed] Fix dg-warning on hppa*64*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaQsIUJHRKtUzBiP@mx3210.localdomain/mbox/"},{"id":187981,"url":"https://patchwork.plctlab.org/api/1.2/patches/187981/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com/","msgid":"<00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-14T19:32:18","name":"[PATCH/RFC] Add --with-dwarf4 configure option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/00f401da4720$64e86b90$2eb942b0$@nextmovesoftware.com/mbox/"},{"id":187984,"url":"https://patchwork.plctlab.org/api/1.2/patches/187984/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRFHhlb7Ncc_lTW@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T20:33:34","name":"[committed] Skip several gcc.dg/builtin-dynamic-object-size tests on hppa*-*-hpux*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRFHhlb7Ncc_lTW@mx3210.localdomain/mbox/"},{"id":187985,"url":"https://patchwork.plctlab.org/api/1.2/patches/187985/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRJ2yYFlRieBHVD@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-14T20:53:47","name":"[committed] Disable tests for strdup/strndup on __hpux__ in various builtin-object-size tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaRJ2yYFlRieBHVD@mx3210.localdomain/mbox/"},{"id":187992,"url":"https://patchwork.plctlab.org/api/1.2/patches/187992/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de/","msgid":"<301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de>","list_archive_url":null,"date":"2024-01-14T23:15:32","name":"libgomp.texi: Document omp_pause_resource{,_all} and omp_target_memcpy* (was: [Patch] libgomp.texi: Document omp_pause_resource{,_all})","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/301e4198-4dbd-453f-8746-95d5d1ec2bf2@net-b.de/mbox/"},{"id":188009,"url":"https://patchwork.plctlab.org/api/1.2/patches/188009/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115012240.3180569-1-juzhe.zhong@rivai.ai/","msgid":"<20240115012240.3180569-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T01:22:40","name":"RISC-V: Adjust loop len by costing 1 when NITER < VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115012240.3180569-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188010,"url":"https://patchwork.plctlab.org/api/1.2/patches/188010/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115024953.4166360-1-juzhe.zhong@rivai.ai/","msgid":"<20240115024953.4166360-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T02:49:53","name":"RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115024953.4166360-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188028,"url":"https://patchwork.plctlab.org/api/1.2/patches/188028/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115055420.2427723-1-syq@gcc.gnu.org/","msgid":"<20240115055420.2427723-1-syq@gcc.gnu.org>","list_archive_url":null,"date":"2024-01-15T05:54:20","name":"MIPS: avoid $gp store if global_pointer is not $gp","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115055420.2427723-1-syq@gcc.gnu.org/mbox/"},{"id":188029,"url":"https://patchwork.plctlab.org/api/1.2/patches/188029/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-1-yanzhang.wang@intel.com/","msgid":"<20240115060515.1603031-1-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2024-01-15T06:00:30","name":"[1/2] RISC-V: delete all the vector psabi checking.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-1-yanzhang.wang@intel.com/mbox/"},{"id":188031,"url":"https://patchwork.plctlab.org/api/1.2/patches/188031/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-2-yanzhang.wang@intel.com/","msgid":"<20240115060515.1603031-2-yanzhang.wang@intel.com>","list_archive_url":null,"date":"2024-01-15T06:00:31","name":"[2/2] RISC-V: delete vector abi checking in all relevant tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115060515.1603031-2-yanzhang.wang@intel.com/mbox/"},{"id":188037,"url":"https://patchwork.plctlab.org/api/1.2/patches/188037/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115065738.869086-1-juzhe.zhong@rivai.ai/","msgid":"<20240115065738.869086-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T06:57:38","name":"[Committed] RISC-V: Fix attributes bug configuration of ternary instructions","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115065738.869086-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188070,"url":"https://patchwork.plctlab.org/api/1.2/patches/188070/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-3-shihua@iscas.ac.cn/","msgid":"<20240115083135.2120665-3-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2024-01-15T08:31:34","name":"[v4,2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-3-shihua@iscas.ac.cn/mbox/"},{"id":188071,"url":"https://patchwork.plctlab.org/api/1.2/patches/188071/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-4-shihua@iscas.ac.cn/","msgid":"<20240115083135.2120665-4-shihua@iscas.ac.cn>","list_archive_url":null,"date":"2024-01-15T08:31:35","name":"[v4,3/3] RISC-V: Add C intrinsic for Scalar Bitmanip Extension","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115083135.2120665-4-shihua@iscas.ac.cn/mbox/"},{"id":188068,"url":"https://patchwork.plctlab.org/api/1.2/patches/188068/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaTt3wGIOZSH4AaT@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-15T08:33:35","name":"lower-bitint: Fix up handling of INTEGER_CSTs in handle_operand in right shifts or comparisons [PR113370]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaTt3wGIOZSH4AaT@tucnak/mbox/"},{"id":188081,"url":"https://patchwork.plctlab.org/api/1.2/patches/188081/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115092537.1706919-1-iii@linux.ibm.com/","msgid":"<20240115092537.1706919-1-iii@linux.ibm.com>","list_archive_url":null,"date":"2024-01-15T09:22:28","name":"Mark ASM_OUTPUT_FUNCTION_LABEL ()'\''s DECL argument as used","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115092537.1706919-1-iii@linux.ibm.com/mbox/"},{"id":188091,"url":"https://patchwork.plctlab.org/api/1.2/patches/188091/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a4fdbe.050a0220.b4d36.7277@mx.google.com/","msgid":"<65a4fdbe.050a0220.b4d36.7277@mx.google.com>","list_archive_url":null,"date":"2024-01-15T09:41:14","name":"c++: Fix ENABLE_SCOPE_CHECKING printing","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a4fdbe.050a0220.b4d36.7277@mx.google.com/mbox/"},{"id":188093,"url":"https://patchwork.plctlab.org/api/1.2/patches/188093/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2200ee1-d467-41ec-b380-dd437586a6ed@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-15T09:50:03","name":"[avr,applied] Fix PR target/113156 - ICE when building libgcc","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b2200ee1-d467-41ec-b380-dd437586a6ed@gjlay.de/mbox/"},{"id":188094,"url":"https://patchwork.plctlab.org/api/1.2/patches/188094/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115095050.1870115-1-juzhe.zhong@rivai.ai/","msgid":"<20240115095050.1870115-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T09:50:50","name":"[Committed] RISC-V: Add optimized dump check of VLS reduc tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115095050.1870115-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188112,"url":"https://patchwork.plctlab.org/api/1.2/patches/188112/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115113240.B85A03857B8B@sourceware.org/","msgid":"<20240115113240.B85A03857B8B@sourceware.org>","list_archive_url":null,"date":"2024-01-15T11:26:48","name":"tree-optimization/113385 - wrong loop father with early exit vectorization","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115113240.B85A03857B8B@sourceware.org/mbox/"},{"id":188115,"url":"https://patchwork.plctlab.org/api/1.2/patches/188115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115114348.3149415-1-juzhe.zhong@rivai.ai/","msgid":"<20240115114348.3149415-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T11:43:48","name":"[Committed,V3] RISC-V: Adjust loop len by costing 1 when NITER < VF","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115114348.3149415-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188116,"url":"https://patchwork.plctlab.org/api/1.2/patches/188116/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115120014.3526204-1-juzhe.zhong@rivai.ai/","msgid":"<20240115120014.3526204-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-15T12:00:14","name":"[Committed,V2] RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115120014.3526204-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188164,"url":"https://patchwork.plctlab.org/api/1.2/patches/188164/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134013.752A73858C54@sourceware.org/","msgid":"<20240115134013.752A73858C54@sourceware.org>","list_archive_url":null,"date":"2024-01-15T13:34:23","name":"[1/2] rtl-optimization/113255 - base_alias_check vs. pointer difference","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134013.752A73858C54@sourceware.org/mbox/"},{"id":188167,"url":"https://patchwork.plctlab.org/api/1.2/patches/188167/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134112.E83AB3858418@sourceware.org/","msgid":"<20240115134112.E83AB3858418@sourceware.org>","list_archive_url":null,"date":"2024-01-15T13:34:28","name":"[2/2] find_base_value part","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115134112.E83AB3858418@sourceware.org/mbox/"},{"id":188226,"url":"https://patchwork.plctlab.org/api/1.2/patches/188226/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2719a083-baca-3671-7a49-e7796d68adfb@redhat.com/","msgid":"<2719a083-baca-3671-7a49-e7796d68adfb@redhat.com>","list_archive_url":null,"date":"2024-01-15T15:26:48","name":"[pushed,PR113354,LRA] : Fixing LRA failure on building MIPS GCC","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2719a083-baca-3671-7a49-e7796d68adfb@redhat.com/mbox/"},{"id":188240,"url":"https://patchwork.plctlab.org/api/1.2/patches/188240/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e03910-0224-4717-aa4c-66466ded245a@gjlay.de/","msgid":"<59e03910-0224-4717-aa4c-66466ded245a@gjlay.de>","list_archive_url":null,"date":"2024-01-15T16:11:59","name":"[avr,applied] Document -mskip-bug","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/59e03910-0224-4717-aa4c-66466ded245a@gjlay.de/mbox/"},{"id":188257,"url":"https://patchwork.plctlab.org/api/1.2/patches/188257/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaVfSC1DDWgeXD44@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-15T16:37:28","name":"[committed] testsuite: Add testcase for already fixed PR [PR113048]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaVfSC1DDWgeXD44@tucnak/mbox/"},{"id":188269,"url":"https://patchwork.plctlab.org/api/1.2/patches/188269/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115171829.1500537-1-jwakely@redhat.com/","msgid":"<20240115171829.1500537-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-15T17:18:11","name":"[committed] libstdc++: Use variable template to fix -fconcepts-ts error [PR113366]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115171829.1500537-1-jwakely@redhat.com/mbox/"},{"id":188324,"url":"https://patchwork.plctlab.org/api/1.2/patches/188324/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115184920.2752407-1-ppalka@redhat.com/","msgid":"<20240115184920.2752407-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-15T18:49:20","name":"libstdc++: Implement P2836R1 changes to const_iterator","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115184920.2752407-1-ppalka@redhat.com/mbox/"},{"id":188317,"url":"https://patchwork.plctlab.org/api/1.2/patches/188317/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115191841.1208268-1-hjl.tools@gmail.com/","msgid":"<20240115191841.1208268-1-hjl.tools@gmail.com>","list_archive_url":null,"date":"2024-01-15T19:18:41","name":"Remove --save-temps from some compile tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115191841.1208268-1-hjl.tools@gmail.com/mbox/"},{"id":188343,"url":"https://patchwork.plctlab.org/api/1.2/patches/188343/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115204803.1550804-1-jwakely@redhat.com/","msgid":"<20240115204803.1550804-1-jwakely@redhat.com>","list_archive_url":null,"date":"2024-01-15T20:45:33","name":"[v3] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115204803.1550804-1-jwakely@redhat.com/mbox/"},{"id":188344,"url":"https://patchwork.plctlab.org/api/1.2/patches/188344/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221448.498382-1-polacek@redhat.com/","msgid":"<20240115221448.498382-1-polacek@redhat.com>","list_archive_url":null,"date":"2024-01-15T22:14:48","name":"c++: ICE with auto in template arg [PR110065]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221448.498382-1-polacek@redhat.com/mbox/"},{"id":188345,"url":"https://patchwork.plctlab.org/api/1.2/patches/188345/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221905.3644823-1-quic_apinski@quicinc.com/","msgid":"<20240115221905.3644823-1-quic_apinski@quicinc.com>","list_archive_url":null,"date":"2024-01-15T22:19:05","name":"[COMMITTED] Add myself to the DCO section","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240115221905.3644823-1-quic_apinski@quicinc.com/mbox/"},{"id":188351,"url":"https://patchwork.plctlab.org/api/1.2/patches/188351/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000540.1054362-1-dmalcolm@redhat.com/","msgid":"<20240116000540.1054362-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-16T00:05:40","name":"[pushed] analyzer: casting all zeroes should give all zeroes [PR113333]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000540.1054362-1-dmalcolm@redhat.com/mbox/"},{"id":188352,"url":"https://patchwork.plctlab.org/api/1.2/patches/188352/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000550.1054419-1-dmalcolm@redhat.com/","msgid":"<20240116000550.1054419-1-dmalcolm@redhat.com>","list_archive_url":null,"date":"2024-01-16T00:05:50","name":"[pushed] analyzer: fix false +ves from -Wanalyzer-tainted-array-index with unsigned char index [PR106229]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116000550.1054419-1-dmalcolm@redhat.com/mbox/"},{"id":188353,"url":"https://patchwork.plctlab.org/api/1.2/patches/188353/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/022001da4819$20d652b0$6282f810$@nextmovesoftware.com/","msgid":"<022001da4819$20d652b0$6282f810$@nextmovesoftware.com>","list_archive_url":null,"date":"2024-01-16T01:12:50","name":"PR rtl-optimization/111267: Improved forward propagation.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/022001da4819$20d652b0$6282f810$@nextmovesoftware.com/mbox/"},{"id":188357,"url":"https://patchwork.plctlab.org/api/1.2/patches/188357/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com/","msgid":"<4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com>","list_archive_url":null,"date":"2024-01-16T02:04:38","name":"[expand] Add const0 move checking for CLEAR_BY_PIECES optabs","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/4dbb7f96-1ba1-4ab3-88d9-0e82de1b0124@linux.ibm.com/mbox/"},{"id":188364,"url":"https://patchwork.plctlab.org/api/1.2/patches/188364/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022320.51782-1-xujiahao@loongson.cn/","msgid":"<20240116022320.51782-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:23:20","name":"LoongArch: Split vec_selects of bottom elements into simple move","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022320.51782-1-xujiahao@loongson.cn/mbox/"},{"id":188365,"url":"https://patchwork.plctlab.org/api/1.2/patches/188365/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022417.51862-1-xujiahao@loongson.cn/","msgid":"<20240116022417.51862-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:24:17","name":"LoongArch: Fix pattern vec_concatz","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116022417.51862-1-xujiahao@loongson.cn/mbox/"},{"id":188366,"url":"https://patchwork.plctlab.org/api/1.2/patches/188366/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116023231.53164-1-xujiahao@loongson.cn/","msgid":"<20240116023231.53164-1-xujiahao@loongson.cn>","list_archive_url":null,"date":"2024-01-16T02:32:31","name":"[v3] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116023231.53164-1-xujiahao@loongson.cn/mbox/"},{"id":188367,"url":"https://patchwork.plctlab.org/api/1.2/patches/188367/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com/","msgid":"<53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com>","list_archive_url":null,"date":"2024-01-16T02:42:29","name":"testsuite: Fix vect_long_mult on Power [PR109705]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/53887523-ea6c-3a7e-6bb6-59268b9d3a4f@linux.ibm.com/mbox/"},{"id":188368,"url":"https://patchwork.plctlab.org/api/1.2/patches/188368/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116030449.379762-1-juzhe.zhong@rivai.ai/","msgid":"<20240116030449.379762-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T03:04:49","name":"RISC-V: Report Sorry when users enable RVV in big-endian mode [PR113404]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116030449.379762-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188427,"url":"https://patchwork.plctlab.org/api/1.2/patches/188427/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116063510.3692246-1-juzhe.zhong@rivai.ai/","msgid":"<20240116063510.3692246-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T06:35:10","name":"test regression fix: Remove xfail for variable length targets","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116063510.3692246-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188430,"url":"https://patchwork.plctlab.org/api/1.2/patches/188430/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116065216.3834327-1-juzhe.zhong@rivai.ai/","msgid":"<20240116065216.3834327-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T06:52:16","name":"test regression fix: Remove xfail for variable length targets of bb-slp-subgroups-3.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116065216.3834327-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188448,"url":"https://patchwork.plctlab.org/api/1.2/patches/188448/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116080400.4059284-1-juzhe.zhong@rivai.ai/","msgid":"<20240116080400.4059284-1-juzhe.zhong@rivai.ai>","list_archive_url":null,"date":"2024-01-16T08:04:00","name":"[v2] test regression fix: Add vect128 for bb-slp-43.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116080400.4059284-1-juzhe.zhong@rivai.ai/mbox/"},{"id":188450,"url":"https://patchwork.plctlab.org/api/1.2/patches/188450/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY7tdB4aoXBPNql@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-16T08:17:57","name":"cfgexpand: Workaround CSE of ADDR_EXPRs in VAR_DECL partitioning [PR113372]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY7tdB4aoXBPNql@tucnak/mbox/"},{"id":188452,"url":"https://patchwork.plctlab.org/api/1.2/patches/188452/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY8/lXoOQ82jN//@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-16T08:23:26","name":"libgcc: Fix __builtin_nested_func_ptr_{created,deleted} symbol versions [PR113402]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaY8/lXoOQ82jN//@tucnak/mbox/"},{"id":188485,"url":"https://patchwork.plctlab.org/api/1.2/patches/188485/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/d497e5d1-108b-48af-9eaf-e5bd089db414@gjlay.de/","msgid":"","list_archive_url":null,"date":"2024-01-16T10:42:16","name":"[avr,applied] Add support for AVR16EB, ABR16EA and AVR32EA devices","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/d497e5d1-108b-48af-9eaf-e5bd089db414@gjlay.de/mbox/"},{"id":188494,"url":"https://patchwork.plctlab.org/api/1.2/patches/188494/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116110523.2365505-1-tejas.belagod@arm.com/","msgid":"<20240116110523.2365505-1-tejas.belagod@arm.com>","list_archive_url":null,"date":"2024-01-16T11:05:23","name":"AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116110523.2365505-1-tejas.belagod@arm.com/mbox/"},{"id":188497,"url":"https://patchwork.plctlab.org/api/1.2/patches/188497/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111025.14659-1-iain@sandoe.co.uk/","msgid":"<20240116111025.14659-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:10:25","name":"jit, Darwin: Implement library exports list.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111025.14659-1-iain@sandoe.co.uk/mbox/"},{"id":188500,"url":"https://patchwork.plctlab.org/api/1.2/patches/188500/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111213.42899-1-iain@sandoe.co.uk/","msgid":"<20240116111213.42899-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:12:13","name":"testsuite, jit: Stabilize error output.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111213.42899-1-iain@sandoe.co.uk/mbox/"},{"id":188501,"url":"https://patchwork.plctlab.org/api/1.2/patches/188501/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111335.55596-1-iain@sandoe.co.uk/","msgid":"<20240116111335.55596-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T11:13:35","name":"testsuite, jit, Darwin: Add libSystem to a test.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116111335.55596-1-iain@sandoe.co.uk/mbox/"},{"id":188503,"url":"https://patchwork.plctlab.org/api/1.2/patches/188503/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/2170135.irdbgypaU6@fomalhaut/","msgid":"<2170135.irdbgypaU6@fomalhaut>","list_archive_url":null,"date":"2024-01-16T11:17:56","name":"[c-family] Fix PR ada/113397","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/2170135.irdbgypaU6@fomalhaut/mbox/"},{"id":188517,"url":"https://patchwork.plctlab.org/api/1.2/patches/188517/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com/","msgid":"<65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com>","list_archive_url":null,"date":"2024-01-16T12:39:27","name":"ipa: Self-DCE of uses of removed call LHSs (PR 108007)","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/65a67939.050a0220.74661.c491SMTPIN_ADDED_BROKEN@mx.google.com/mbox/"},{"id":188530,"url":"https://patchwork.plctlab.org/api/1.2/patches/188530/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116140500.43D0D3858C29@sourceware.org/","msgid":"<20240116140500.43D0D3858C29@sourceware.org>","list_archive_url":null,"date":"2024-01-16T13:59:00","name":"tree-optimization/113371 - avoid prologue peeling for peeled early exits","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116140500.43D0D3858C29@sourceware.org/mbox/"},{"id":188548,"url":"https://patchwork.plctlab.org/api/1.2/patches/188548/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaaNfgr8IuHDy4F5@zen.kayari.org/","msgid":"","list_archive_url":null,"date":"2024-01-16T14:06:54","name":"[v4] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaaNfgr8IuHDy4F5@zen.kayari.org/mbox/"},{"id":188535,"url":"https://patchwork.plctlab.org/api/1.2/patches/188535/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116141139.3477027-1-cederman@gaisler.com/","msgid":"<20240116141139.3477027-1-cederman@gaisler.com>","list_archive_url":null,"date":"2024-01-16T14:11:39","name":"libsanitizer: Replace memcpy with internal version in sanitizer_common","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116141139.3477027-1-cederman@gaisler.com/mbox/"},{"id":188556,"url":"https://patchwork.plctlab.org/api/1.2/patches/188556/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116143818.3336042-1-ppalka@redhat.com/","msgid":"<20240116143818.3336042-1-ppalka@redhat.com>","list_archive_url":null,"date":"2024-01-16T14:38:18","name":"libstdc++: Implement P2540R1 change to views::cartesian_product()","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116143818.3336042-1-ppalka@redhat.com/mbox/"},{"id":188540,"url":"https://patchwork.plctlab.org/api/1.2/patches/188540/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116144916.8449F386180D@sourceware.org/","msgid":"<20240116144916.8449F386180D@sourceware.org>","list_archive_url":null,"date":"2024-01-16T14:43:15","name":"tree-optimization/113373 - work around early exit vect missing LC PHI","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116144916.8449F386180D@sourceware.org/mbox/"},{"id":188541,"url":"https://patchwork.plctlab.org/api/1.2/patches/188541/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116150016.3471-1-iain@sandoe.co.uk/","msgid":"<20240116150016.3471-1-iain@sandoe.co.uk>","list_archive_url":null,"date":"2024-01-16T15:00:16","name":"lto, Darwin: Fix offload section names.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116150016.3471-1-iain@sandoe.co.uk/mbox/"},{"id":188551,"url":"https://patchwork.plctlab.org/api/1.2/patches/188551/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr/","msgid":"<3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr>","list_archive_url":null,"date":"2024-01-16T15:25:10","name":"Spec Files: remove documentation about obsolete spec strings","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/3940c57a-b256-4331-aa19-dbc55f21ba41@cea.fr/mbox/"},{"id":188559,"url":"https://patchwork.plctlab.org/api/1.2/patches/188559/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116162552.461635-2-mary.bennett@embecosm.com/","msgid":"<20240116162552.461635-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:25:52","name":"[v2,1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116162552.461635-2-mary.bennett@embecosm.com/mbox/"},{"id":188565,"url":"https://patchwork.plctlab.org/api/1.2/patches/188565/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-2-mary.bennett@embecosm.com/","msgid":"<20240116163529.623568-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:35:28","name":"[v2,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-2-mary.bennett@embecosm.com/mbox/"},{"id":188564,"url":"https://patchwork.plctlab.org/api/1.2/patches/188564/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-3-mary.bennett@embecosm.com/","msgid":"<20240116163529.623568-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T16:35:29","name":"[v2,2/2] RISC-V: Fix XCValu test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116163529.623568-3-mary.bennett@embecosm.com/mbox/"},{"id":188572,"url":"https://patchwork.plctlab.org/api/1.2/patches/188572/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-2-mary.bennett@embecosm.com/","msgid":"<20240116171351.913881-2-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T17:13:50","name":"[v3,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-2-mary.bennett@embecosm.com/mbox/"},{"id":188571,"url":"https://patchwork.plctlab.org/api/1.2/patches/188571/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-3-mary.bennett@embecosm.com/","msgid":"<20240116171351.913881-3-mary.bennett@embecosm.com>","list_archive_url":null,"date":"2024-01-16T17:13:51","name":"[v3,2/2] RISC-V: Fix XCValu test","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20240116171351.913881-3-mary.bennett@embecosm.com/mbox/"},{"id":188574,"url":"https://patchwork.plctlab.org/api/1.2/patches/188574/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826A88BC9275089F005A3D83732@PAWPR08MB8982.eurprd08.prod.outlook.com/","msgid":"","list_archive_url":null,"date":"2024-01-16T17:23:17","name":"AArch64: Add -mcpu=cobalt-100","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/PAWPR08MB89826A88BC9275089F005A3D83732@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/"},{"id":188590,"url":"https://patchwork.plctlab.org/api/1.2/patches/188590/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zaba3-29rbMcC2pR@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T19:37:03","name":"[committed] xfail all scan-tree-dump-times checks on hppa*64*-*-* in sra-17.c and sra-18.c","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zaba3-29rbMcC2pR@mx3210.localdomain/mbox/"},{"id":188592,"url":"https://patchwork.plctlab.org/api/1.2/patches/188592/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZabkNqYZVt-rC5ng@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T20:16:54","name":"[committed] Skip various cmp-mem-const tests on lp64 hppa*-*-*","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZabkNqYZVt-rC5ng@mx3210.localdomain/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/mbox/"}]' + bundle_id=56 + git-pw bundle add 56 188608 +------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | Property | Value | |------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------| | ID | 56 | | Name | gcc-patch_2024-01 | | URL | https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/ | | Owner | patchwork-bot | | Project | gcc-patch | | Public | True | | Patches | 184129 [v9,1/2] Add condition coverage (MC/DC) | | | 184128 [v9,2/2] Add gcov MC/DC tests for GDC | | | 184130 [middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations. | | | 184142 LoongArch: Provide fmin/fmax RTL pattern for vectors | | | 184154 Match: Improve inverted_equal_p for bool and `^` and `==` [PR113186] | | | 184161 [gcc,1/3] Move GNU/Hurd startfile spec from config/i386/gnu.h to config/gnu.h | | | 184160 [gcc,2/3] aarch64: Add support for aarch64-gnu (GNU/Hurd on AArch64) | | | 184158 [gcc,3/3] libgcc: Add basic support for aarch64-gnu (GNU/Hurd on AArch64) | | | 184175 config-ml.in: Fix multi-os-dir search | | | 184182 [RFA,V3] new pass for sign/zero extension elimination | | | 184189 [committed] RISC-V: Add crypto machine descriptions | | | 184193 [Committed] RISC-V: Declare STMT_VINFO_TYPE (...) as local variable | | | 184199 [committed] RISC-V: Modify copyright year of vector-crypto.md | | | 184206 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184207 testsuite: Reduce gcc.dg/torture/inline-mem-cpy-1.c by 11 for simulators | | | 184208 RISC-V: Make liveness be aware of rgroup number of LENS[dynamic LMUL] | | | 184209 Re???Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184268 [Committed] RISC-V: Add simplification of dummy len and dummy mask COND_LEN_xxx pattern | | | 184274 [v5,1/2] RISC-V: Add crypto vector builtin function. | | | 184275 [v5,2/2] RISC-V: Add crypto vector api-testing cases. | | | 184289 [v6,1/2] RISC-V: Add crypto vector builtin function. | | | 184291 [v3,01/12,GCC] arm: vld1q_types_x2 ACLE intrinsics | | | 184298 [v3,02/12,GCC] arm: vld1q_types_x3 ACLE intrinsics | | | 184292 [v3,03/12,GCC] arm: vld1q_types_x4 ACLE intrinsics | | | 184296 [v3,04/12,GCC] arm: vst1_types_x2 ACLE intrinsics | | | 184293 [v3,05/12,GCC] arm: vst1_types_x3 ACLE intrinsics | | | 184300 [v3,06/12,GCC] arm: vst1_types_x4 ACLE intrinsics | | | 184297 [v3,07/12,GCC] arm: vst1q_types_x2 ACLE intrinsics | | | 184301 [v3,08/12,GCC] arm: vst1q_types_x3 ACLE intrinsics | | | 184299 [v3,09/12,GCC] arm: vst1q_types_x4 ACLE intrinsics | | | 184294 [v3,10/12,GCC] arm: vld1_types_x2 ACLE intrinsics | | | 184302 [v3,11/12,GCC] arm: vld1_types_x3 ACLE intrinsics | | | 184303 [v3,12/12,GCC] arm: vld1_types_x4 ACLE intrinsics | | | 184305 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184348 [v3] RISC-V: Bugfix for doesn't honor no-signed-zeros option | | | 184319 [v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184357 libsanitizer: Enable LSan and TSan for riscv64 | | | 184392 [OpenACC,2.7] Implement reductions for arrays and structs | | | 184431 libstdc++: testsuite: reduce max_size_type.cc exec time [PR113175] | | | 184440 [v2,1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL | | | 184439 [v2,2/2] asan: Align .LASANPC on function boundary | | | 184443 RISC-V: Implement ZACAS extensions | | | 184534 c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899] | | | 184535 c++/modules: Fix ICE when writing nontrivial variable initializers | | | 184540 [1/4;,v4] options: add gcc/regenerate-opt-urls.py | | | 184548 [v6,2/2] RISC-V: Add crypto vector api-testing cases. | | | 184554 [v3,2/3] libatomic: Enable LSE128 128-bit atomics for armv9.4-a | | | 184628 [v7,2/2] RISC-V: Add crypto vector api-testing cases. | | | 184630 [v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184689 c++: Export usings referring to global module fragment [PR109679] | | | 184691 RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS] | | | 184702 [V2] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS] | | | 184713 [committed] Small tweaks for update-copyright.py | | | 184733 [v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899] | | | 184774 [committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ | | | 184784 Ping: [PATCH] enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contains padding | | | 184786 [committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ | | | 184817 libgomp.texi: Document omp_display_env | | | 184822 c++: explicit inst w/ many constrained partial specs [PR104634] | | | 184826 [2/1] c++: access of class-scope partial tmpl spec | | | 184857 [Committed,V3] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS] | | | 184858 [Committed] RISC-V: Fix indent | | | 184890 [committed] MIPS: define_attr perf_ratio in mips.md | | | 184891 [committed] MIPS: Implement TARGET_INSN_COSTS | | | 184892 [committed] MIPS: Add pattern insqisi_extended and inshisi_extended | | | 184893 [committed] MIPS/testsuite: Include stdio.h in mipscop tests | | | 184895 [v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184897 [v4] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 184898 LoongArch: Fixed the problem of incorrect judgment of the immediate field of the [x]vld/[x]vst instruction. | | | 184908 [committed,obvious] OpenMP: trivial cleanups to omp-general.cc | | | 184916 [Committed] RISC-V: Refine LMUL computation for MASK_LEN_LOAD/MASK_LEN_STORE IFN | | | 184935 RISC-V: Teach liveness estimation be aware of .vi variant | | | 184944 [Committed,V2] RISC-V: Make liveness estimation be aware of .vi variant | | | 184945 lower-bitint: Punt .*_OVERFLOW optimization if cast from IMAGPART_EXPR appears before REALPART_EXPR [PR113119] | | | 184947 lower-bitint: Fix up lowering of huge _BitInt 0 PHI args [PR113120] | | | 184955 Improve __builtin_popcount* (x) == 1 generation if x is known != 0 [PR90693] | | | 184957 Avoid ICE with m68k-elf -malign-int and libcalls | | | 184959 [v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0 | | | 184962 scev: Avoid ICE on results used in abnormal PHI args [PR113201] | | | 184983 [Committed,V3] RISC-V: Make liveness estimation be aware of .vi variant | | | 185013 contrib: Add script name to usage error in gen_wcwidth.py | | | 185021 [pushed] analyzer: handle arrays of unknown size in access diagrams [PR113222] | | | 185022 [pushed] analyzer: fix deref-before-check false positives due to inlining [PR112790] | | | 185023 [pushed] analyzer: add sarif properties for checker events | | | 185030 Add -falign-all-functions | | | 185035 contrib: Remove C-style comments from Python files | | | 185052 [COMMITTED] libcpp: add function to check XID properties | | | 185064 [avr,applied] PR target/112952 Fix attribute "io" et al. handling. | | | 185122 [pushed,1/2] libstdc++: rename _A badname in | | | 185121 [pushed,2/2] libstdc++: fix typo in | | | 185124 :Re: [PATCH v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899] | | | 185161 [5/4] libbacktrace: improve getting debug information for loaded dlls | | | 185175 [committed] RISC-V: Add crypto vector builtin function. | | | 185176 [committed] RISC-V: Add crypto vector api-testing cases. | | | 185186 [v2] libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD | | | 185191 RISC-V: Teach liveness computation loop invariant shift amount[Dynamic LMUL] | | | 185207 [v2,1/2] LoongArch: Add the macro implementation of mcmodel=extreme. | | | 185206 [v2,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs. | | | 185210 [v2,1/7] LoongArch: testsuite:Added support for vector object detection. | | | 185208 [v2,2/7] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file. | | | 185211 [v2,3/7] LoongArch: testsuite:Added detection support for LoongArch architecture in vect-{82, 83}.c. | | | 185212 [v2,4/7] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90. | | | 185213 [v2,5/7] LoongArch: testsuite:Delete the default run behavior in pr60510.f. | | | 185214 [v2,6/7] LoongArch: testsuite:Added additional vectorization "-mlasx" compilation option. | | | 185209 [v2,7/7] LoongArch: testsuite:Give up the detection of the gcc.dg/fma-{3, 4, 6, 7}.c file. | | | 185216 RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move | | | 185219 [x86_64] PR target/107563: Add 3-instruction subroutine vector shift in ix86_expand_vec_perm_const_1 | | | 185228 [v3] LoongArch: testsuite:Added support for vector object detection. | | | 185239 [1/4] LoongArch: Handle ISA evolution switches along with other options | | | 185238 [2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64 | | | 185242 [3/4] LoongArch: Use enums for constants | | | 185241 [4/4] LoongArch: Simplify -mexplicit-reloc definitions | | | 185247 sparc: Char arrays are 64-bit aligned on SPARC | | | 185248 [1/2] sparc: Revert membar optimization that is not suitable for LEON5 | | | 185249 sparc: Treat instructions with length 0 as empty | | | 185250 [2/2] sparc: Add errata workaround to membar patterns | | | 185251 LoongArch: Improve lasx_xvpermi_q_ insn pattern | | | 185252 LoongArch: Optimize zero_extendqisi2 and zero_extendqidi2 patterns | | | 185253 LoongArch: Implenment vec_init where N is a LSX vector mode | | | 185254 [PATCHv2] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942] | | | 185256 [v3,1/2] LoongArch: Add the macro implementation of mcmodel=extreme. | | | 185255 [v3,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs. | | | 185285 [committed] RISC-V: Clean up testsuite for multi-lib testing [NFC] | | | 185286 [committed] RISC-V: Clean up unused variable [NFC] | | | 185296 [v7,1/2] RISC-V: Add crypto vector builtin function. | | | 185316 RISC-V: Fix avl-type operand index error for ZVBC | | | 185355 [committed] libstdc++: Use if-constexpr in std::__try_use_facet [PR113099] | | | 185359 [committed] libstdc++: Remove UB from month and weekday additions and subtractions. | | | 185374 [committed] libstdc++: Fix std::char_traits::move [PR113200] | | | 185390 LoongArch: Implement option save/restore | | | 185434 [committed] libstdc++: Do not use __is_convertible unconditionally [PR113241] | | | 185450 libstdc++: Add Unicode-aware width estimation for std::format | | | 185445 [committed] libstdc++: Avoid overflow when appending to std::filesystem::path | | | 185455 [pushed] aarch64: Extend VECT_COMPARE_COSTS to !SVE [PR113104] | | | 185457 aarch64: Rework uxtl->zip optimisation [PR113196] | | | 185467 c++: address of NTTP object as targ [PR113242] | | | 185470 libgccjit: Add support for setting the comment ident | | | 185476 [v2,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops | | | 185516 omp_target_is_accessible (was: [patch] libgomp.texi: Document omp_display_env) | | | 185532 c++: reference variable as default targ [PR101463] | | | 185554 Fortran: bogus warnings with REPEAT intrinsic and -Wconversion-extra [PR96724] | | | 185551 PR target/112886, Add %S to print_operand for vector pair support | | | 185564 Repost [PATCH 1/6] Add -mcpu=future | | | 185565 Repost [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. | | | 185566 Repost [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers. | | | 185567 Repost [PATCH 4/6] PowerPC: Make MMA insns support DMR registers. | | | 185568 Repost [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations. | | | 185569 Repost [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers. | | | 185572 [COMMITTED] Regenerate libgomp/configure for copyright year update | | | 185575 [Committed,V2] RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move | | | 185576 [Committed,V2] RISC-V: Teach liveness computation loop invariant shift amount | | | 185588 [v3,1/8] c++: Implement __is_const built-in trait | | | 185582 [v3,2/8] libstdc++: Optimize std::is_const compilation performance | | | 185583 [v3,3/8] c++: Implement __is_volatile built-in trait | | | 185584 [v3,4/8] libstdc++: Optimize std::is_volatile compilation performance | | | 185586 [v3,5/8] c++: Implement __is_pointer built-in trait | | | 185587 [v3,6/8] libstdc++: Optimize std::is_pointer compilation performance | | | 185585 [v3,7/8] c++: Implement __is_unbounded_array built-in trait | | | 185589 [v3,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance | | | 185590 [Committed] RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS] | | | 185618 gimplify: Fix ICE in recalculate_side_effects [PR113228] | | | 185621 [1/3] LoongArch: Optimized some of the symbolic expansion instructions generated during bitwise operations. | | | 185620 [2/3] LoongArch: Redundant sign extension elimination optimization. | | | 185622 [3/3] LoongArch: Redundant sign extension elimination optimization 2. | | | 185623 vect: Fix ICE in vect_analyze_loop_costing [PR113210] | | | 185634 [x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass. | | | 185657 [v2] libstdc++: Add Unicode-aware width estimation for std::format | | | 185663 [Patch, fortran PR89645/99065 No IMPLICIT type error with: ASSOCIATE( X => function() ) | | | 185669 [testsuite,applied] PR52641: Fix more sloppy tests | | | 185670 [1/8] OpenMP: metadirective tree data structures and front-end interfaces | | | 185671 [2/8] OpenMP: middle-end support for metadirectives | | | 185672 [3/8] libgomp: runtime support for target_device selector | | | 185673 [4/8] OpenMP: C front end support for metadirectives | | | 185674 [5/8] OpenMP: C++ front-end support for metadirectives | | | 185677 [6/8] OpenMP: common c/c++ testcases for metadirectives | | | 185675 [7/8] OpenMP: Fortran front-end support for metadirectives. | | | 185676 [8/8] OpenMP: Update documentation of metadirective implementation status. | | | 185685 gcn.h: Add builtin_define ("__gfx1030") | | | 185696 [v8,1/4] c++: P0847R7 (deducing this) - prerequisite changes. [PR102609] | | | 185697 [v8,3/4] c++: P0847R7 (deducing this) - diagnostics. [PR102609] | | | 185702 [Committed] RISC-V: Use MAX instead of std::max [VSETVL PASS] | | | 185707 [committed] libstdc++: Remove dg-timeout-factor from test | | | 185704 [committed] libstdc++: Avoid conflicting declaration in eh_call.cc [PR112997] | | | 185725 [testsuite,applied] PR52641: Fix more fallout from sloppy tests. | | | 185736 Add __cow_string C string constructor | | | 185742 [testsuite,applied] PR52641 Fix more fallout from sloppy tests. | | | 185747 [committed] Fix typo in last change | | | 185757 GCN: Add pre-initial support for gfx1100 | | | 185760 [avr,applied] Fix some avr test cases | | | 185761 libstdc++: reduce std::variant template instantiation depth | | | 185771 RISC-V: Also handle sign extension in branch costing | | | 185776 [committed] RISC-V: Fix avl-type operand index error for ZVBC | | | 185777 libstdc++: atomic: Add missing clear_padding in __atomic_float constructor | | | 185782 [v2,1/4] LoongArch: Handle ISA evolution switches along with other options | | | 185783 [v2,2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64 | | | 185779 [v2,3/4] LoongArch: Use enums for constants | | | 185780 [v2,4/4] LoongArch: Simplify -mexplicit-reloc definitions | | | 185791 [committed] libstdc++: Implement P2909R4 ("Dude, where's my char?") for C++20 | | | 185797 [committed,V3] libstdc++: Add Unicode-aware width estimation for std::format | | | 185796 [committed,1/2] libstdc++: Implement P2905R2 "Runtime format strings" for C++20 | | | 185778 [committed,2/2] libstdc++: Implement P2918R0 "Runtime format strings II" for C++26 | | | 185792 strub: Only unbias stack point for SPARC_STACK_BOUNDARY_HACK [PR113100] | | | 185793 testsuite, rs6000: Adjust pcrel-sibcall-1.c with noipa [PR112751] | | | 185794 rs6000: Eliminate zext fed by vclzlsbb [PR111480] | | | 185795 rs6000: Make copysign (x, -1) back to -abs (x) for IEEE128 float [PR112606] | | | 185798 i386: [APX] Add missing document for APX | | | 185813 [committed] RISC-V: Fix testsuite | | | 185814 [1/2] arm: Add cortex-m52 core | | | 185816 [2/2] arm: Add cortex-m52 doc | | | 185839 testsuite: Skip ifcvt-4.c for SPARC V8 | | | 185843 i386: Fix recent testcase fail | | | 185862 [v8,2/2] RISC-V: Add crypto vector api-testing cases. | | | 185863 [v7,1/2] RISC-V: Add crypto vector builtin function. | | | 185871 asan: Do not call asan_function_start () without the current function [PR113251] | | | 185878 Clarify -mmovbe documentation | | | 185879 [v2] c++/modules: Differentiate extern templates and TYPE_DECL_SUPPRESS_DEBUG [PR112820] | | | 185886 [committed] amdgcn: Don't double-count AVGPRs | | | 185887 [committed] amdgcn: Match new XNACK defaults in mkoffload | | | 185907 btf: print string position as comment for validation and testing purposes. | | | 185895 bpf: Correct BTF for kernel_helper attributed decls. | | | 185917 tree-optimization/113026 - avoid vector epilog in more cases | | | 185985 [frontend] : don't ice with pragma NOVECTOR if loop in C has no condition [PR113267] | | | 185992 [v5,1/1] RISC-V: Add support for XCVbi extension in CV32E40P | | | 186006 [1/5] RISC-V: Extract part parsing base ISA logic into a standalone function [NFC] | | | 186007 [2/5] RISC-V: Relax the -march string for accept any order | | | 186008 [3/5] RISC-V: Remove unused function in riscv_subset_list [NFC] | | | 186012 [4/5] RISC-V: Update testsuite due to -march string relaxation | | | 186015 [5/5] RISC-V: Document the syntax of -march | | | 186065 [libatomic] Fix testsuite regressions on ARM [raspberry pi]. | | | 186072 [committed] libstdc++: Remove std::__unicode::__null_sentinel | | | 186101 c++: non-dep array list-init w/ non-triv dtor [PR109899] | | | 186106 [committed] MAINTAINERS: Update my email address | | | 186110 [committed] steering.html: Update my affiliation | | | 186139 [committed] hppa: Fix bind_c_coms.f90 and bind_c_vars.f90 tests on hppa | | | 186146 [committed] Skip gfortran.dg/dec_math.f90 on hppa*-*-hpux* | | | 186147 [committed] xfail dg-final "Sunk statements: 5" on hppa*64*-*-* | | | 186171 Resolve issue with Canadian build for x86_64-w64-mingw32 multilibs | | | 186187 RISC-V: Fix loop invariant check | | | 186188 ??????: Re: [PATCH v8 2/2] RISC-V: Add crypto vector api-testing cases. | | | 186189 ??????: Re: [PATCH v7 1/2] RISC-V: Add crypto vector builtin function. | | | 186190 [Committed] RISC-V: Fix comments of segment load/store intrinsic[NFC] | | | 186191 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 186192 [Committed] RISC-V: Fix comments of segment load/store intrinsic | | | 186197 [v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186198 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 186227 Add -mevex512 into invoke.texi | | | 186229 i386: [APX] Document inline asm behavior and new switch for APX | | | 186230 [wwwdocs] gcc-14/changes: Update APX inline asm behavior for x86_64 | | | 186249 c++: side effect in nullptr_t conversion fix | | | 186277 vect: Ensure both NITERSM1 and NITERS are INTEGER_CSTs or neither of them [PR113210] | | | 186283 c-family: copy attribute diagnostic fixes [PR113262] | | | 186284 [committed] libgomp: Use absolute pathname to testsuite/flock [PR113192] | | | 186297 Fix PR rtl-optimization/113140 | | | 186298 [Ada] Fix PR ada/113195 | | | 186296 Fix PR rtl-optimization/113140 | | | 186302 [Ada] Fix PR ada/112781 (1/2) | | | 186307 [Ada] Fix PR ada/112781 (2/2) | | | 186311 Optimize A < B ? A : B to MIN_EXPR. | | | 186317 rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284] | | | 186323 rs6000: New pass for replacement of adjacent lxv with lxvp. | | | 186349 tree-optimization/113026 - fix vector epilogue maximum iter bound | | | 186393 [gcc-13] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a | | | 186361 [committed] aarch64: Fix up GC of aarch64_simd_types [PR113270] | | | 186366 [COMMITTED] ada: Avoid xref on out params of TSS | | | 186369 [COMMITTED] ada: Remove unreachable code in Resolve_Extension_Aggregate | | | 186364 [COMMITTED] ada: Fix precondition in Interfaces.C.Strings | | | 186365 [COMMITTED] ada: Error compiling Ada 2022 object renaming with no subtype mark | | | 186368 [COMMITTED] ada: Fix bug in Sem_Util.Enclosing_Declaration | | | 186367 [COMMITTED] ada: Fix uses of not Present | | | 186375 [COMMITTED] ada: Remove dead code for GNATprove inlining | | | 186378 [COMMITTED] ada: Remove dead detection of recursive inlined subprograms | | | 186380 [COMMITTED] ada: More aggressive inlining of subprogram calls in GNATprove mode | | | 186374 [COMMITTED] ada: Remove side effects depending on the context of subtype declaration | | | 186370 [COMMITTED] ada: Cannot requeue to a procedure implemented by an entry | | | 186373 [COMMITTED] ada: Add __atomic_store_n binding to System.Atomic_Primitives | | | 186377 [COMMITTED] ada: Fix internal error on class-wide allocator inside if-expression | | | 186376 [COMMITTED] ada: Fix limited_with in Check_Scil; allow for <> in pp of aggregate | | | 186381 [COMMITTED] ada: Remove unused runtime entity | | | 186372 [COMMITTED] ada: Excess elements created for indexed aggregates with iterator_specifications | | | 186382 [COMMITTED] ada: Allow passing private types to generic formal incomplete types | | | 186371 [COMMITTED] ada: Minor change replacing "not Present" tests with "No" tests | | | 186383 [COMMITTED] ada: Do not count comparison of addresses as a modification | | | 186379 [COMMITTED] ada: Preliminary cleanup in aliasing support code | | | 186384 [COMMITTED] ada: Fix bogus Constraint_Error on allocator for access to array of access type | | | 186389 [COMMITTED] ada: Document new SPARK aspect and pragma Always_Terminates | | | 186463 hwasan: Check if Intel LAM_U57 is enabled | | | 186469 [2/7,v2] lto: Remove random_seed from section name. | | | 186471 [committed] Fix minor bug on mn103 port | | | 186473 [committed] Fix minor bug in epiphany port | | | 186511 [committed] libstdc++: Simplify some chrono formatters | | | 186562 Fix debug info for enumeration types with reverse Scalar_Storage_Order | | | 186572 Fix spurious match in extract_symvers | | | 186595 libstdc++: Prefer posix_memalign for aligned-new [PR113258] | | | 186637 [committed] libstdc++: Fix Unicode property detection functions | | | 186625 [v2] rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284] | | | 186641 [Committed] RISC-V: Robostify dynamic lmul test | | | 186662 [V2,1/4,RFC] RISC-V: Add non-vector types to dfa pipelines | | | 186660 [V2,2/4,RFC] RISC-V: Add vector related reservations | | | 186663 [V2,3/4,RFC] RISC-V: Use default cost model for insn scheduling for tests affected in PR113249 | | | 186661 [V2,4/4,RFC] RISC-V: Enable assert for insn_has_dfa_reservation | | | 186664 [rs6000] Refactor expand_compare_loop and split it to two functions | | | 186665 RISC-V: Minor tweak dynamic cost model | | | 186666 Update documents for fcf-protection= | | | 186667 config: delete unused CYG_AC_PATH_LIBERTY macro | | | 186669 [v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186671 Add -mevex512 into invoke.texi | | | 186674 Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186677 [V2] RISC-V: Minor tweak dynamic cost model | | | 186683 RISC-V: Refine unsigned avg_floor/avg_ceil | | | 186694 [wwwdoc] gcc-14: Add arm cortex-m52 cpu support | | | 186701 Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186704 [v1] LoongArch: testsuite:Fixed a bug that added a target check error. | | | 186703 [v2] LoongArch: testsuite:Added support for loongarch. | | | 186705 ?????????Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186706 Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186708 i386: Add AVX10.1 related macros | | | 186710 Document refactoring of the option -fcf-protection=x. | | | 187019 [01/14] c++: Implement __is_integral built-in trait | | | 187018 [02/14] libstdc++: Optimize std::is_integral compilation performance | | | 187020 [03/14] c++: Implement __is_floating_point built-in trait | | | 187010 [04/14] libstdc++: Optimize std::is_floating_point compilation performance | | | 187022 [05/14] c++: Implement __is_arithmetic built-in trait | | | 187011 [06/14] libstdc++: Optimize std::is_arithmetic compilation performance | | | 187017 [07/14] libstdc++: Optimize std::is_fundamental compilation performance | | | 187016 [08/14] libstdc++: Optimize std::is_compound compilation performance | | | 187013 [09/14] c++: Implement __is_unsigned built-in trait | | | 187009 [10/14] libstdc++: Optimize std::is_unsigned compilation performance | | | 187015 [11/14] c++: Implement __is_signed built-in trait | | | 187021 [12/14] libstdc++: Optimize std::is_signed compilation performance | | | 187012 [13/14] c++: Implement __is_scalar built-in trait | | | 187014 [14/14] libstdc++: Optimize std::is_scalar compilation performance | | | 186725 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186726 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186728 sra: Partial fix for BITINT_TYPEs [PR113120] | | | 186744 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186748 RISC-V: Switch RVV cost model to generic vector cost model | | | 186794 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186798 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186804 libgomp, v2: Use absolute pathname to testsuite/flock [PR113192] | | | 186805 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186857 [v2] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077] | | | 186862 OpenMP: Fix new lvalue-parsing map/to/from tests for 32-bit targets | | | 186864 OpenMP: Fix g++.dg/gomp/bad-array-section-10.C for C++23 and up | | | 186882 [pushed,1/3] pretty-print: add selftest coverage for numbered args | | | 186884 [pushed,2/3] pretty-print: support urlification in phase 3 | | | 186883 [pushed,3/3] gcc-urlifier: handle option prefixes such as '-fno-' | | | 186917 tree-optimization/113078 - conditional subtraction reduction vectorization | | | 186920 middle-end/112740 - vector boolean CTOR expansion issue | | | 186941 [V2] RISC-V: Switch RVV cost model. | | | 186948 [committed] testsuite: Add testcase for already fixed PR [PR112734] | | | 186954 [committed] RISC-V/testsuite: Fix comment termination in pr105314.c | | | 187086 [v3] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077] | | | 187090 libstdc++: std/ranges - Remove a duplicate define directive | | | 187091 [v2] gcc/doc: spelling mistakes and example | | | 187092 [v2] : gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION | | | 187102 libstdc++/ranges: Use perfect forwarding in _Pipe and _Partial ctors | | | 187104 libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT for _Nth_type | | | 187099 Fortran: annotations for DO CONCURRENT loops [PR113305] | | | 187115 PING: [PATCH] Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091] | | | 187123 libstdc++/ranges: Use C++23 deducing this for _Pipe and _Partial | | | 187120 [v2] LoongArch: Implement option save/restore | | | 187124 LoongArch: Split loongarch_option_override_internal into smaller procedures | | | 187130 [v2] LoongArch: Split loongarch_option_override_internal into smaller procedures | | | 187119 [v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion | | | 187148 RISC-V: VLA preempts VLS on unknown NITERS loop | | | 187154 i386: Add "z" constraint for symbolic address/label reference [PR105576] | | | 187163 [committed] libstdc++: Optimize std::is_compound compilation performance | | | 187166 match: Delay folding of 1/x into `(x+1u)<2u?x:0` until late [PR113301] | | | 187174 c++/modules: Support thread_local statics in header modules [PR113292] | | | 187179 libstdc++: Fix error handling for std::filesystem::equivalent [PR113250] | | | 187220 tree-optimization/111003 - new testcase | | | 187223 libgcc: Use may_alias attribute in bitint handlers | | | 187234 RISC-V: Increase scalar_to_vec_cost from 1 to 3 | | | 187236 [rs6000] Eliminate unnecessary byte swaps for block clear on P8 LE [PR113325] | | | 187241 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187242 [v5] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion | | | 187260 RISC-V: Documnet the list of supported extensions | | | 187261 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187262 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187263 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187265 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187266 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187269 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187270 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187271 [v2,1/2] libstdc++: Fix error handling in filesystem::equivalent [PR113250] | | | 187272 [v2,2/2] libstdc++: Use using instead of typedef in opts-common.h | | | 187275 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187276 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187277 [commit] MIPS: Add ATTRIBUTE_UNUSED to mips_start_function_definition | | | 187280 [v3,2/2] libstdc++: Use using instead of typedef in opts-common.h | | | 187284 expr: Limit the store flag optimization for single bit to non-vectors [PR113322] | | | 187298 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187305 [v5] RISC-V: Handle differences between XTheadvector and Vector | | | 187314 [v2,1/2] LoongArch: Redundant sign extension elimination optimization. | | | 187315 [v2,2/2] LoongArch: Redundant sign extension elimination optimization 2. | | | 187317 [wwwdocs] tweak for sourceware account request alias | | | 187347 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187359 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187364 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187365 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187399 [wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14 | | | 187396 [wwwdocs] Document additional symbols in libstdc++exp.a for GCC 13.3 | | | 187382 [avr,applied] Small improvements to texi documentation. | | | 187384 tree-optimization/112636 - estimate niters before header copying | | | 187385 [V2] RISC-V: Adjust scalar_to_vec cost accurately | | | 187392 [s390] target/112280 - properly guard permute query | | | 187394 tree-optimization/112505 - bit-precision induction vectorization | | | 187395 tree-optimization/113126 - vector extension compare optimization | | | 187393 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187401 [1/2] gccrs: fixup: Fix bootstrap build | | | 187400 [2/2] gccrs: fixup: Fix missing build dependency | | | 187402 [pushed,PR112918,LRA] : Fixing IRA ICE on m68k | | | 187407 [v2,1/1] RISC-V: Add support for XCVmem extension in CV32E40P | | | 187425 [avr,applied] invoke.texi: Move avr internal options to their own @subsubsection. | | | 187429 testsuite: remove xfail | | | 187461 libstdc++: use updated type for __unexpected_handler | | | 187459 [V2] PR target/112886, Add %S to print_operand for vector pair support. | | | 187471 [committed] libstdc++: Add GDB printer for std::integral_constant | | | 187474 libstdc++: Make PSTL algorithms accept C++20 iterators [PR110512] | | | 187469 i386: Add "Ws" constraint for symbolic address/label reference [PR105576] | | | 187481 OpenMP 5.1: WIP delimited (begin/end) 'declare variant' support | | | 187492 [committed] libstdc++: Document addition of libstdc++exp.a | | | 187496 libstdc++: Fix std::runtime_format deviations from the spec [PR113320] | | | 187487 [v2] c++: side effect in nullptr_t conversion fix | | | 187503 [committed] libstdc++: Fix spelling mistake in new doc addition | | | 187497 [RFC] codingconventions: add lambda guidelines | | | 187502 [pushed] c++: corresponding object parms [PR113191] | | | 187508 libstdc++: Implement P2255R2 dangling checks for std::tuple [PR108822] | | | 187505 libstdc++: Fix non-portable results from 64-bit std::subtract_with_carry_engine [PR107466] | | | 187510 [1/2] RISC-V/testsuite: Widen coverage for pr105314.c | | | 187511 [2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c | | | 187515 libgccjit: Fix float playback for cross-compilation | | | 187528 ?????????Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187533 RISC-V: Modify ABI-name length of vfloat16m8_t | | | 187542 [v1] LoongArch: testsuite:Added additional vectorization "-mlsx" option. | | | 187543 [v1] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file. | | | 187548 i386: Remove redundant move in vnni pattern | | | 187554 [v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC] | | | 187557 [v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0 | | | 187558 [v6] RISC-V: Handle differences between XTheadvector and Vector | | | 187559 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187567 [Committed] libgcc, nios2: Fix exception handling on nios2 with -fpic | | | 187584 [rs6000] Enable block compare expand on P9 with m32 and mpowerpc64 | | | 187600 [Committed] RISC-V: Enhance a testcase | | | 187602 middle-end/113344 - is_truth_type_for vs GENERIC tcc_comparison | | | 187625 [V3] RISC-V: Adjust scalar_to_vec cost | | | 187627 c: Avoid _BitInt indexes > sizetype in ARRAY_REFs [PR113315] | | | 187628 lower-bitint: Fix up handling of uninitialized large/huge _BitInt call arguments [PR113316] | | | 187630 lower-bitint: Fix a typo in a condition [PR113323] | | | 187631 sra: Punt for too large _BitInt accesses [PR113330] | | | 187700 [committed] libstdc++: Fix incorrect PR number in comment | | | 187707 [committed] libstdc++: Implement C++23 P1951R1 (Default Args for pair's Forwarding Ctor) [PR105505] | | | 187649 [committed] testsuite: Fix up preprocessor conditions in bitint-31.c test | | | 187657 lower-bitint: Fix up handling of unsigned INTEGER_CSTs operands with lots of 1s in the upper bits [PR113334] | | | 187660 varasm: Fix up process_pending_assemble_externals [PR113182] | | | 187718 [PATCHv3] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942] | | | 187719 [1/2] aarch64: Use a separate group for SME builtins [PR112989] | | | 187720 [2/2] aarch64: Use a global map to detect duplicated overloads [PR112989] | | | 187721 [pushed] aarch64: Rework uxtl->zip optimisation [PR113196] | | | 187724 c++, demangle: Implement https://github.com/itanium-cxx-abi/cxx-abi/issues/148 non-proposal | | | 187726 [avr,applied] Fix PR107201 -nodevicelib not working for all devices. | | | 187742 GCN: Enable effective-target 'vect_early_break', 'vect_early_break_hw' | | | 187744 [pushed] Darwin, powerpc: Fix bootstrap. | | | 187748 [pushed] Objective-C, Darwin: Fix a regression in handling bad receivers. | | | 187749 tree-optimization/109893 - allow more backwards jump threading | | | 187802 [avr,applied] Fix documentation for attribute "address". | | | 187803 [avr,applied] Add link to sample ld-script in avr-gcc wiki. | | | 187809 [V3,1/4] RISC-V: Add non-vector types to dfa pipelines | | | 187810 [V3,2/4] RISC-V: Add vector related pipelines | | | 187812 [V3,3/4] RISC-V: Use default cost model for insn scheduling | | | 187811 [V3,4/4] RISC-V: Enable assert for insn_has_dfa_reservation | | | 187819 [v2] Fortran: annotations for DO CONCURRENT loops [PR113305] | | | 187827 [1/2] libstdc++: Use C++23 deducing this in std::bind_front | | | 187828 [2/2] libstdc++: Implement C++23 std::bind_pack from P2387R3 [PR108827] | | | 187845 [WIP] libstdc++: Implement C++26 std::text_encoding [PR113318] | | | 187846 libstdc++: Update tzdata to 2023d | | | 187856 testsuite: Fix fallout of turning warnings into errors on 32-bit Arm | | | 187859 RISC-V: Adjust loop len by costing 1 when NITER < VF [GCC 14 regression] | | | 187869 [COMMITTED] Add a few testcases for fix missed optimization regressions | | | 187872 LoongArch: Assign the '/u' attribute to the mem to which the global offset table belongs. | | | 187874 [v2] LoongArch: testsuite:Added additional vectorization "-mlsx" option. | | | 187875 [v2] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file. | | | 187881 lower-bitint: Fix up handle_operand_addr INTEGER_CST handling [PR113361] | | | 187898 [v2] libstdc++: Update tzdata to 2023d | | | 187902 [v2] libstdc++: Implement C++26 std::text_encoding [PR113318] | | | 187903 [1/4] testsuite, jit: test-alias-attribute.c requires alias support. | | | 187904 [2/4] testsuite, jit: Handle whitespace in test-link-section-assembler.c. | | | 187906 [3/4] testsuite, jit: Allow for target-specific assembler scans. | | | 187905 [4/4] testsuite,jit: Handle Darwin/Mach-O in assembler tests. | | | 187921 [2/4] rtl-ssa: Support for creating new uses [PR113070] | | | 187922 [3/4] rtl-ssa: Ensure new defs get inserted [PR113070] | | | 187926 [committed] hppa64: Fix fmt_f_default_field_width_3.f90 and fmt_g_default_field_width_3.f90 | | | 187933 testsuite: Turn errors back into warnings in arm/acle/cde-mve-error-2.c | | | 187934 Fortran: intrinsic ISHFTC and missing optional argument SIZE [PR67277] | | | 187936 libcpp: Support extended characters for #pragma {push, pop}_macro [PR109704] | | | 187939 libsupc++: Fix UB terminating on foreign exception | | | 187961 [avr,ping,#3] PR target/112944: Support .rodata in RAM for AVR64* and AVR128* devices | | | 187963 libgomp.texi: Document omp_pause_resource{,_all} | | | 187973 [V1] rs6000: New pass for replacement of adjacent (load) lxv with lxvp | | | 187976 [committed] Skip several analyzer socket tests on hppa*-*-hpux* | | | 187978 [wwwdocs,avr,applied] Add AVR news for v14. | | | 187979 [committed] Fix dg-warning on hppa*64*-*-* | | | 187981 [PATCH/RFC] Add --with-dwarf4 configure option. | | | 187984 [committed] Skip several gcc.dg/builtin-dynamic-object-size tests on hppa*-*-hpux* | | | 187985 [committed] Disable tests for strdup/strndup on __hpux__ in various builtin-object-size tests | | | 187992 libgomp.texi: Document omp_pause_resource{,_all} and omp_target_memcpy* (was: [Patch] libgomp.texi: Document omp_pause_resource{,_all}) | | | 188009 RISC-V: Adjust loop len by costing 1 when NITER < VF | | | 188010 RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro | | | 188028 MIPS: avoid $gp store if global_pointer is not $gp | | | 188029 [1/2] RISC-V: delete all the vector psabi checking. | | | 188031 [2/2] RISC-V: delete vector abi checking in all relevant tests. | | | 188037 [Committed] RISC-V: Fix attributes bug configuration of ternary instructions | | | 188070 [v4,2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension | | | 188071 [v4,3/3] RISC-V: Add C intrinsic for Scalar Bitmanip Extension | | | 188068 lower-bitint: Fix up handling of INTEGER_CSTs in handle_operand in right shifts or comparisons [PR113370] | | | 188081 Mark ASM_OUTPUT_FUNCTION_LABEL ()'s DECL argument as used | | | 188091 c++: Fix ENABLE_SCOPE_CHECKING printing | | | 188093 [avr,applied] Fix PR target/113156 - ICE when building libgcc | | | 188094 [Committed] RISC-V: Add optimized dump check of VLS reduc tests | | | 188112 tree-optimization/113385 - wrong loop father with early exit vectorization | | | 188115 [Committed,V3] RISC-V: Adjust loop len by costing 1 when NITER < VF | | | 188116 [Committed,V2] RISC-V: Fix regression (GCC-14 compare with GCC-13.2) of SHA256 from coremark-pro | | | 188164 [1/2] rtl-optimization/113255 - base_alias_check vs. pointer difference | | | 188167 [2/2] find_base_value part | | | 188226 [pushed,PR113354,LRA] : Fixing LRA failure on building MIPS GCC | | | 188240 [avr,applied] Document -mskip-bug | | | 188257 [committed] testsuite: Add testcase for already fixed PR [PR113048] | | | 188269 [committed] libstdc++: Use variable template to fix -fconcepts-ts error [PR113366] | | | 188324 libstdc++: Implement P2836R1 changes to const_iterator | | | 188317 Remove --save-temps from some compile tests | | | 188343 [v3] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318] | | | 188344 c++: ICE with auto in template arg [PR110065] | | | 188345 [COMMITTED] Add myself to the DCO section | | | 188351 [pushed] analyzer: casting all zeroes should give all zeroes [PR113333] | | | 188352 [pushed] analyzer: fix false +ves from -Wanalyzer-tainted-array-index with unsigned char index [PR106229] | | | 188353 PR rtl-optimization/111267: Improved forward propagation. | | | 188357 [expand] Add const0 move checking for CLEAR_BY_PIECES optabs | | | 188364 LoongArch: Split vec_selects of bottom elements into simple move | | | 188365 LoongArch: Fix pattern vec_concatz | | | 188366 [v3] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT | | | 188367 testsuite: Fix vect_long_mult on Power [PR109705] | | | 188368 RISC-V: Report Sorry when users enable RVV in big-endian mode [PR113404] | | | 188427 test regression fix: Remove xfail for variable length targets | | | 188430 test regression fix: Remove xfail for variable length targets of bb-slp-subgroups-3.c | | | 188448 [v2] test regression fix: Add vect128 for bb-slp-43.c | | | 188450 cfgexpand: Workaround CSE of ADDR_EXPRs in VAR_DECL partitioning [PR113372] | | | 188452 libgcc: Fix __builtin_nested_func_ptr_{created,deleted} symbol versions [PR113402] | | | 188485 [avr,applied] Add support for AVR16EB, ABR16EA and AVR32EA devices | | | 188494 AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577] | | | 188497 jit, Darwin: Implement library exports list. | | | 188500 testsuite, jit: Stabilize error output. | | | 188501 testsuite, jit, Darwin: Add libSystem to a test. | | | 188503 [c-family] Fix PR ada/113397 | | | 188517 ipa: Self-DCE of uses of removed call LHSs (PR 108007) | | | 188530 tree-optimization/113371 - avoid prologue peeling for peeled early exits | | | 188548 [v4] libstdc++: Implement C++26 std::text_encoding (P1885R12) [PR113318] | | | 188535 libsanitizer: Replace memcpy with internal version in sanitizer_common | | | 188556 libstdc++: Implement P2540R1 change to views::cartesian_product() | | | 188540 tree-optimization/113373 - work around early exit vect missing LC PHI | | | 188541 lto, Darwin: Fix offload section names. | | | 188551 Spec Files: remove documentation about obsolete spec strings | | | 188559 [v2,1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P | | | 188565 [v2,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P | | | 188564 [v2,2/2] RISC-V: Fix XCValu test | | | 188572 [v3,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P | | | 188571 [v3,2/2] RISC-V: Fix XCValu test | | | 188574 AArch64: Add -mcpu=cobalt-100 | | | 188590 [committed] xfail all scan-tree-dump-times checks on hppa*64*-*-* in sra-17.c and sra-18.c | | | 188592 [committed] Skip various cmp-mem-const tests on lp64 hppa*-*-* | | | 188608 [committed] Require target lto in several tests | +------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:plctlab/patchwork-gcc * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://github.com/gcc-mirror/gcc.git + git pull upstream master From https://github.com/gcc-mirror/gcc * branch master -> FETCH_HEAD * [new branch] master -> upstream/master fatal: refusing to merge unrelated histories + git push -u origin upstream-master Everything up-to-date branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master fatal: refusing to merge unrelated histories + git push -u origin master Everything up-to-date branch 'master' set up to track 'origin/master'. + branchname=series77951-patch188608 ++ git branch -a ++ grep 'series77951-patch188608$' + checkbranch= + checkbranchresult=null + '[' null = series77951-patch188608 ']' + git checkout -b series77951-patch188608 Switched to a new branch 'series77951-patch188608' ++ curl https://patchwork.plctlab.org/api/1.2/series/77951/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 1356 100 1356 0 0 54240 0 --:--:-- --:--:-- --:--:-- 54240 + series_response='{"id":77951,"url":"https://patchwork.plctlab.org/api/1.2/series/77951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=77951","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"[committed] Require target lto in several tests","date":"2024-01-16T20:23:49","submitter":{"id":3283,"url":"https://patchwork.plctlab.org/api/1.2/people/3283/","name":"John David Anglin","email":"dave@parisc-linux.org"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/77951/mbox/","cover_letter":null,"patches":[{"id":188608,"url":"https://patchwork.plctlab.org/api/1.2/patches/188608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T20:23:49","name":"[committed] Require target lto in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' ++ echo '{"id":77951,"url":"https://patchwork.plctlab.org/api/1.2/series/77951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=77951","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"[committed] Require target lto in several tests","date":"2024-01-16T20:23:49","submitter":{"id":3283,"url":"https://patchwork.plctlab.org/api/1.2/people/3283/","name":"John David Anglin","email":"dave@parisc-linux.org"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/77951/mbox/","cover_letter":null,"patches":[{"id":188608,"url":"https://patchwork.plctlab.org/api/1.2/patches/188608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/","msgid":"","list_archive_url":null,"date":"2024-01-16T20:23:49","name":"[committed] Require target lto in several tests","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/"}]}' + patchid_patchurl='"188608,https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/"' + echo '"188608,https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/"' + IFS=, + read -r series_patch_id series_patch_url ++ echo '"188608' ++ sed 's/"//g' + series_patch_id=188608 ++ echo 'https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++ git rev-parse HEAD + commitid_before=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + eval '+++ declare -p bout bret declare -- bout="Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k +++ bout='\''\'\'''\''Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k +++ bout='\''Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins14534779616875864991.sh: line 129: +++: command not found ++ declare -- 'bout=Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k +++ bout='\''Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins14534779616875864991.sh: line 172: ++: command not found ++ ++ declare -p berr /tmp/jenkins14534779616875864991.sh: line 173: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k +++ bout='\''Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k +++ bout='Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k 100 7911 100 7911 0 0 309k 0 --:--:-- --:--:-- --:--:-- 297k +++ bout='Applying: Require target lto in several tests Using index info to reconstruct a base tree... A gcc/testsuite/gcc.dg/c23-tag-alias-2.c A gcc/testsuite/gcc.dg/c23-tag-alias-3.c A gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c A gcc/testsuite/gcc.dg/scantest-lto.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.dg/scantest-lto.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/scantest-lto.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-3.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-3.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.dg/c23-tag-alias-2.c deleted in HEAD and modified in Require target lto in several tests. Version Require target lto in several tests of gcc/testsuite/gcc.dg/c23-tag-alias-2.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 Require target lto in several tests When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ Failed to merge in the changes ]] + submit_check warning Unresolved https://patchwork.plctlab.org/jenkins/job/gcc-patch/15918/consoleText 'Git am fail log' + check_state=warning + patch_state=Unresolved + repo_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/15918/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/15918/consoleText -F context=gcc-patch-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/188608/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 970 100 429 100 541 5876 7410 --:--:-- --:--:-- --:--:-- 13287 {"id":18476,"url":"https://patchwork.plctlab.org/api/patches/188608/checks/18476/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2024-01-16T21:21:35.655477","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/gcc-patch/15918/consoleText","context":"gcc-patch-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F state=Unresolved https://patchwork.plctlab.org/api/1.2/patches/188608/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":188608,"url":"https://patchwork.plctlab.org/api/1.2/patches/188608/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2024-01-16T20:23:49","name":"[committed] Require target lto in several tests","commit_ref":null,"pull_url":null,"state":"unresolved","archived":false,"hash":"69946575af79e2eaecfe47f9f127c09aa26cb89f","submitter":{"id":3283,"url":"https://patchwork.plctlab.org/api/1.2/people/3283/","name":"John David Anglin","email":"dave@parisc-linux.org"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/Zabl1c0fZzvupukC@mx3210.localdomain/mbox/","series":[{"id":77951,"url":"https://patchwork.plctlab.org/api/1.2/series/77951/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=77951","date":"2024-01-16T20:23:49","name":"[committed] Require target lto in several tests","version":1,"mbox":"https://patchwork.plctlab.org/series/77951/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/188608/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/188608/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","gcc-patches@gcc.gnu.org"],"Received":["by 2002:a05:7300:42cf:b0:101:a8e8:374 with SMTP id q15csp504498dye;\n Tue, 16 Jan 2024 12:24:55 -0800 (PST)","from server2.sourceware.org (server2.sourceware.org. [8.43.85.97])\n by mx.google.com with ESMTPS id\n h13-20020ac85e0d000000b0042a09c94802si1018386qtx.563.2024.01.16.12.24.54\n for \n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Tue, 16 Jan 2024 12:24:54 -0800 (PST)","from server2.sourceware.org (localhost [IPv6:::1])\n\tby sourceware.org (Postfix) with ESMTP id 6E8EB3858C54\n\tfor ; Tue, 16 Jan 2024 20:24:54 +0000 (GMT)","from dellerweb.de (unknown [IPv6:2a02:c207:3003:236::1])\n by sourceware.org (Postfix) with ESMTPS id 4AFCA3858C42\n for ; Tue, 16 Jan 2024 20:24:03 +0000 (GMT)","from mx3210.localdomain (unknown [142.126.114.79])\n by dellerweb.de (Postfix) with ESMTPSA id 8A931160002E;\n Tue, 16 Jan 2024 21:24:01 +0100 (CET)","by mx3210.localdomain (Postfix, from userid 1000)\n id C72A422011C; Tue, 16 Jan 2024 20:23:49 +0000 (UTC)"],"X-Google-Smtp-Source":"\n AGHT+IEFrZDjp/+wuP9AAl0Uv+ZI4bAR9QpO3PXUx8iwLFqkL6Ez50IJCqkVBK+VLURtfxWp25+1","X-Received":"by 2002:a9d:739a:0:b0:6dc:129:22df with SMTP id\n j26-20020a9d739a000000b006dc012922dfmr6794444otk.11.1705436694733;\n Tue, 16 Jan 2024 12:24:54 -0800 (PST)","ARC-Seal":["i=2; a=rsa-sha256; t=1705436694; cv=pass;\n d=google.com; s=arc-20160816;\n b=i9R/QEtjxsbXjIPcPyA9p1iyRmPvr3Aw+P42712+Vn6o7iYe3P5IM+jiHuXfeF9Fyw\n ADDCwJkq+ddDs+ngME56HsZ0tYYUUnkIdIRSDtTLXAOabjiaYvRqnEMiy6M/Y5pLX7je\n YUYaL7N+U4wTReMeWxyCz1/1z35upfXADRC+omZElU4K/gTxL/y7/GNCThzSOyN4ED+w\n R7g3E7K29gTaaTKmLH/tXeVJYyKMzRGwbOzs82PsVi4+4bjQfTfohQB+6eqvZ/yXeiY7\n tUw/SR5fuXDfI44rVlaNI2fXZ4Y6RD49S0rM9dQQrpY/Fybf7d3pqevj+/nUOvWDyYuI\n +DNg==","i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705436645; cv=none;\n b=CXE7HzUgJ+XAWtAzmkHiI4l47OEjhTx05COeWv+HHm+EuiuxV4Pz6dIwiIkYPDiZdTmkyw1LG6lw4DtinQFi6SrksHRe3E93TS82uKXPdaly9jUIVFmuCHkppFTIOyku94L6yjwhEFnBqpcpVNNtoV53MOrDsxd3HHpLTHcC1PY="],"ARC-Message-Signature":["i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com;\n s=arc-20160816;\n h=errors-to:list-subscribe:list-help:list-post:list-archive\n :list-unsubscribe:list-id:precedence:content-disposition\n :mime-version:message-id:subject:to:from:date:arc-filter\n :dmarc-filter:delivered-to;\n bh=m2kP03yAtfMEW4DgorVfFee6C5T9TJ/oWThAHAjtaH8=;\n fh=1L2/IiukS00vgiXcKREcvt+pFBEM8GuYOng2C1a9k1k=;\n b=K+isLmQze5J2fFZLfJZD4Gl/LqbFTdMHcuflzyG4S2lRMYm9abHAWqJ7qHo1Xb+b7L\n pfQ4wn5VKlKSIoQoGV0Akg3PwJ3F2GYHQQhgG71WpuN9IJcKZnnXBKFzroGOoWBL7ggr\n akKwNN0xfvDehjj/x8vaG/dQxmMF2ymUpQHeREphqE0qb67au46A+BHsbh9oTEPUQRuA\n 96OZadBRzPv+NOtzoXlypiAdIjLm3go859leFVxF8z9OCMAr1nige9SmXY9UGVAfOqQq\n yqYJcadFoiQXmXhXr3KCI+K6b7mDc89WtAStdgMTGDiayPovVmx7TQygvA+8WyZsaGdb\n 26YA==","i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1705436645; c=relaxed/simple;\n bh=+p/M+iHRvV+Ssz6Iy8C/YsOrm84UQCAb/xQWrLxLTus=;\n h=Date:From:To:Subject:Message-ID:MIME-Version;\n b=SvdHNEJh+rGCFQaMOxearn3UJLSeQN/rYzmialwJEnsvIyEe1sOllWrimXKqv8vlhE45Vqdwr4TzkJa5hFIcoQ3Ko1pzClf42Wv/HpBMXfu09VYUgZHau5S8ih5idraSnV0d9gj4Ww1otwNyi1xDf45xI6eEMrlukINfFMn/Ixk="],"ARC-Authentication-Results":["i=2; mx.google.com;\n arc=pass (i=1);\n spf=pass (google.com: domain of\n gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as\n permitted sender)\n smtp.mailfrom=\"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org\"","i=1; server2.sourceware.org"],"Received-SPF":"pass (google.com: domain of\n gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as\n permitted sender) client-ip=8.43.85.97;","Authentication-Results":["mx.google.com;\n arc=pass (i=1);\n spf=pass (google.com: domain of\n gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as\n permitted sender)\n smtp.mailfrom=\"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org\"","sourceware.org; dmarc=none (p=none dis=none)\n header.from=parisc-linux.org","sourceware.org;\n spf=pass smtp.mailfrom=parisc-linux.org","server2.sourceware.org;\n arc=none smtp.remote-ip=2a02:c207:3003:236::1"],"X-Original-To":"gcc-patches@gcc.gnu.org","DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org 4AFCA3858C42","ARC-Filter":"OpenARC Filter v1.0.0 sourceware.org 4AFCA3858C42","Date":"Tue, 16 Jan 2024 20:23:49 +0000","From":"John David Anglin ","To":"GCC Patches ","Subject":"[committed] Require target lto in several tests","Message-ID":"","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n protocol=\"application/pgp-signature\"; boundary=\"frPtHKBDWB41wnA1\"","Content-Disposition":"inline","X-Spam-Status":"No, score=-9.4 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP,\n T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n server2.sourceware.org","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org","X-getmail-retrieved-from-mailbox":"INBOX","X-GMAIL-THRID":"1788279987726932737","X-GMAIL-MSGID":"1788279987726932737"},"content":"Tested on hppa64-hp-hpux11.11 with lto disabled. Committed to trunk.\n\nDave\n---\n\nRequire target lto in several tests\n\n2024-01-16 John David Anglin \n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.dg/c23-tag-alias-2.c: Require target lto.\n\t* gcc.dg/c23-tag-alias-3.c: Likewise.\n\t* gcc.dg/gnu23-tag-alias-3.c: Likewise.\n\t* gcc.dg/scantest-lto.c: Likewise.","diff":"diff --git a/gcc/testsuite/gcc.dg/c23-tag-al 100 9692 100 9542 100 150 190k 3061 --:--:-- --:--:-- --:--:-- 193k ias-2.c b/gcc/testsuite/gcc.dg/c23-tag-alias-2.c\nindex 64ff67d8552..1a4097b629d 100644\n--- a/gcc/testsuite/gcc.dg/c23-tag-alias-2.c\n+++ b/gcc/testsuite/gcc.dg/c23-tag-alias-2.c\n@@ -1,4 +1,4 @@\n-/* { dg-do run }\n+/* { dg-do run { target lto } }\n * { dg-options \"-std=c23 -flto -O2\" }\n */\n \ndiff --git a/gcc/testsuite/gcc.dg/c23-tag-alias-3.c b/gcc/testsuite/gcc.dg/c23-tag-alias-3.c\nindex b9fe6f3b407..76bc4dfcd23 100644\n--- a/gcc/testsuite/gcc.dg/c23-tag-alias-3.c\n+++ b/gcc/testsuite/gcc.dg/c23-tag-alias-3.c\n@@ -1,4 +1,4 @@\n-/* { dg-do run }\n+/* { dg-do run { target lto } }\n * { dg-options \"-std=c23 -O2\" }\n */\n \ndiff --git a/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c b/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c\nindex c2fd4e930ef..9d7e7e11c7f 100644\n--- a/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c\n+++ b/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c\n@@ -1,4 +1,4 @@\n-/* { dg-do run }\n+/* { dg-do run { target lto } }\n * { dg-options \"-std=gnu23 -flto -O2\" }\n */\n \ndiff --git a/gcc/testsuite/gcc.dg/scantest-lto.c b/gcc/testsuite/gcc.dg/scantest-lto.c\nindex 5f8abaf77f3..46c21f20bfc 100644\n--- a/gcc/testsuite/gcc.dg/scantest-lto.c\n+++ b/gcc/testsuite/gcc.dg/scantest-lto.c\n@@ -1,3 +1,4 @@\n+/* { dg-do compile { target lto } }\n /* { dg-options \"-O2 -flto\" } */\n \n void foo ()\n","prefixes":["committed"]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE